diff --git a/FaustCode/WaveReader.h b/FaustCode/WaveReader.h
deleted file mode 100644
index b9e9f5dd..00000000
--- a/FaustCode/WaveReader.h
+++ /dev/null
@@ -1,256 +0,0 @@
-/************************** BEGIN WaveReader.h **************************/
-/************************************************************************
- FAUST Architecture File
- Copyright (C) 2020 GRAME, Centre National de Creation Musicale
- ---------------------------------------------------------------------
- This Architecture section is free software; you can redistribute it
- and/or modify it under the terms of the GNU General Public License
- as published by the Free Software Foundation; either version 3 of
- the License, or (at your option) any later version.
- 
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- GNU General Public License for more details.
- 
- You should have received a copy of the GNU General Public License
- along with this program; If not, see <http://www.gnu.org/licenses/>.
- 
- EXCEPTION : As a special exception, you may create a larger work
- that contains this FAUST architecture section and distribute
- that work under terms of your choice, so long as this FAUST
- architecture section is not modified.
- ************************************************************************/
-
-#ifndef __WaveReader__
-#define __WaveReader__
-
-#undef min
-#undef max
-
-#include <string>
-#include "Resource.h"
-
-// WAVE file description
-class WaveFile {
-public:
-    // The canonical WAVE format starts with the RIFF header
-    
-    /**
-     Variable: chunk_id
-     Contains the letters "RIFF" in ASCII form (0x52494646 big-endian form).
-     **/
-    int chunk_id;
-    
-    /**
-     Variable: chunk_size
-     36 + SubChunk2Size, or more precisely: 4 + (8 + SubChunk1Size) + (8 + SubChunk2Size)
-     This is the size of the rest of the chunk following this number.
-     This is the size of the entire file in bytes minus 8 bytes for the
-     two fields not included in this count: ChunkID and ChunkSize.
-     **/
-    int chunk_size;
-    
-    /**
-     Variable: format
-     Contains the letters "WAVE" (0x57415645 big-endian form).
-     **/
-    int format;
-    
-    // The "WAVE" format consists of two subchunks: "fmt " and "data":
-    // The "fmt " subchunk describes the sound data's format:
-    
-    /**
-     Variable: subchunk_1_id
-     Contains the letters "fmt " (0x666d7420 big-endian form).
-     **/
-    int subchunk_1_id;
-    
-    /**
-     Variable: subchunk_1_size
-     16 for PCM. This is the size of the rest of the Subchunk which follows this number.
-     **/
-    int subchunk_1_size;
-    
-    /**
-     Variable: audio_format
-     PCM = 1 (i.e. Linear quantization) Values other than 1 indicate some form of compression.
-     **/
-    short audio_format;
-    
-    /**
-     Variable: num_channels
-     Mono = 1, Stereo = 2, etc.
-     **/
-    short num_channels;
-    
-    /**
-     Variable: sample_rate
-     8000, 44100, etc.
-     **/
-    int sample_rate;
-    
-    /**
-     Variable: byte_rate
-     == SampleRate * NumChannels * BitsPerSample/8
-     **/
-    int byte_rate;
-    
-    /**
-     Variable: block_align
-     == NumChannels * BitsPerSample/8
-     The number of bytes for one sample including all channels. I wonder what happens
-     when this number isn't an integer?
-     **/
-    short block_align;
-    
-    /**
-     Variable: bits_per_sample
-     8 bits = 8, 16 bits = 16, etc.
-     **/
-    short bits_per_sample;
-    
-    /**
-     Here should come some extra parameters which i will avoid.
-     **/
-    
-    // The "data" subchunk contains the size of the data and the actual sound:
-    
-    /**
-     Variable: subchunk_2_id
-     Contains the letters "data" (0x64617461 big-endian form).
-     **/
-    int subchunk_2_id;
-    
-    /**
-     Variable: subchunk_2_size
-     == NumSamples * NumChannels * BitsPerSample/8
-     This is the number of bytes in the data. You can also think of this as the size
-     of the read of the subchunk following this number.
-     **/
-    int subchunk_2_size;
-    
-    /**
-     Variable: data
-     The actual sound data.
-     **/
-    char* data;
-    
-};
-
-// Base reader
-class WaveReader {
-public:    
-    WaveFile* fWave;
-
-    WaveReader() {
-        fWave = new WaveFile();
-    }
-
-    virtual ~WaveReader() {
-        if (fWave->data != NULL)
-            delete[] fWave->data;
-        delete fWave;
-    }
-
-    bool loadWaveHeader() {
-        char buffer[4];
-        
-        read(buffer, 4);
-        if (strncmp(buffer, "RIFF", 4) != 0) {
-            debugMessage("Not a valid WAV file!");
-            return false;
-        }
-
-        fWave->chunk_id = toInt(buffer, 4);
-        
-        read(buffer, 4);
-        fWave->chunk_size = toInt(buffer, 4);
-        
-        read(buffer, 4);
-        fWave->format = toInt(buffer, 4);
-        
-        read(buffer, 4);
-        fWave->subchunk_1_id = toInt(buffer, 4);
-        
-        read(buffer, 4);
-        fWave->subchunk_1_size = toInt(buffer, 4);
-        
-        read(buffer, 2);
-        fWave->audio_format = toInt(buffer, 2);
-        read(buffer, 2);
-        fWave->num_channels = toInt(buffer, 2);
-        
-        read(buffer, 4);
-        fWave->sample_rate = toInt(buffer, 4);
-        
-        read(buffer, 4);
-        fWave->byte_rate = toInt(buffer, 4);
-        
-        read(buffer, 2);
-        fWave->block_align = toInt(buffer, 2);
-        read(buffer, 2);
-        fWave->bits_per_sample = toInt(buffer, 2);
-        
-        read(buffer, 4);
-        if (strncmp(buffer, "data", 4) != 0) {
-            read(buffer, 4);
-            int _extra_size = toInt(buffer, 4);
-            char _extra_data[_extra_size];
-            read(_extra_data, _extra_size);
-            read(buffer, 4);
-            fWave->subchunk_2_id = toInt(buffer, 4);
-        } else {
-            fWave->subchunk_2_id = toInt(buffer, 4);
-        }
-        
-        read(buffer, 4);
-        fWave->subchunk_2_size = toInt(buffer, 4);
-        return true;
-    }
-    
-    void loadWave()
-    {
-        // Read sound data
-        fWave->data = new char[fWave->subchunk_2_size];
-        read(fWave->data, fWave->subchunk_2_size);
-    }
-
-    virtual void read(char* buffer, unsigned int size) = 0;
-
-protected:
-    inline int toInt(char* buffer, int len)
-    {
-        int a = 0;
-        for(int i = 0; i < len; i++) {
-            ((char*)&a)[i] = buffer[i];
-        }
-        return a;
-    }   
-};
-
-/*
- * WAV file reader that handles resource parser
- */
-class WaveResourceReader : public WaveReader {
-public:
-    WaveResourceReader(const char* name) :
-        offset(0) {
-        resource = Resource::open(name);
-    };
-
-    ~WaveResourceReader() {
-        Resource::destroy(resource);
-    };
-
-    void read(char* buffer, unsigned int size) override {
-        size_t read_len = resource->read((void*)buffer, size, offset);
-        offset += read_len;
-    }
-private:
-    Resource* resource;
-    size_t offset;
-};
-
-#endif
-/**************************  END  WaveReader.h **************************/
diff --git a/FaustSource/owl.cpp b/FaustSource/owl.cpp
index b8ba5071..c2160777 100644
--- a/FaustSource/owl.cpp
+++ b/FaustSource/owl.cpp
@@ -989,21 +989,20 @@ struct OwlMemoryManager : public dsp_memory_manager {
         // fDSP->buildUserInterface(&fUI);
 
         fBend = 1.0f;
-        fDSP = new mydsp();
+        mydsp::fManager = &mem; // set custom memory manager
+        fDSP = mydsp::create();
         fDSP->metadata(&fUI.meta);
         if (fUI.meta.message != NULL)
             debugMessage(fUI.meta.message);
         fUI.addVOct();
 
-        mydsp::fManager = &mem; // set custom memory manager
         mydsp::classInit(int(getSampleRate())); // initialise static tables
         fDSP->instanceInit(int(getSampleRate())); // initialise DSP instance
         fDSP->buildUserInterface(&fUI); // Map OWL parameters
     }
 
     ~FaustPatch() {
-        delete fDSP;
-        // mem.destroy(fDSP);
+        mydsp::destroy(fDSP);
         // DSP static data is destroyed using classDestroy.
         mydsp::classDestroy();
     }
diff --git a/GenSource/GenPatch.hpp b/GenSource/GenPatch.hpp
index b14e644e..3c60e1ab 100644
--- a/GenSource/GenPatch.hpp
+++ b/GenSource/GenPatch.hpp
@@ -99,6 +99,7 @@ class MonoVoiceAllocator {
 
 class GenParameterBase {
 public:
+  ~GenParameterBase(){}
   virtual void update(Patch* patch, CommonState *context){}
 };
 
@@ -272,10 +273,10 @@ class GenPatch : public Patch {
 
   ~GenPatch() {
     gen::destroy(context);
-    for(int i=0; i<param_count; ++i)
+    for(size_t i=0; i<param_count; ++i)
       delete params[i];
     delete[] params;
-    for(int i=getNumberOfChannels(); i<gen::num_outputs(); ++i)
+    for(size_t i=getNumberOfChannels(); i<gen::num_outputs(); ++i)
       delete[] buffers[i];
     delete[] buffers;
     delete[] outputs.getData();
@@ -286,14 +287,14 @@ class GenPatch : public Patch {
   }
 
   void processAudio(AudioBuffer &buffer) {
-    for(int i=0; i<param_count; ++i)
+    for(size_t i=0; i<param_count; ++i)
       params[i]->update(this, context);
     size_t channels = buffer.getChannels();
     size_t ch;
     for(ch=0; ch<channels; ++ch)
       buffers[ch] = buffer.getSamples(ch);
     gen::perform(context, buffers, channels, buffers, gen::num_outputs(), buffer.getSize());
-    for(int i=0; i<outputs.getSize(); ++i){
+    for(size_t i=0; i<outputs.getSize(); ++i){
       if(outputs[i].id > 0x100){
 	float maxvalue = outputs[i].buffer.getMaxValue();
 	setButton((PatchButtonId)(outputs[i].id-0x100), maxvalue > 0.5);
diff --git a/HISTORY.md b/HISTORY.md
index 86e2c347..16e8af17 100644
--- a/HISTORY.md
+++ b/HISTORY.md
@@ -1,3 +1,13 @@
+* Added InterpolatingWavetableOscillator
+* Added MovingAverage::process(FloatArray) and ::getAverage()
+* Added TakeoverValue
+* Added EnvelopeFollower
+* Added ExponentialMovingAverage and SimpleMovingAverage
+* Added KaiserWindow (from the Loris C++ Class Library)
+* Added LinearValue, ExponentialValue and LogarithmicValue
+* Refactored Smooth and StiffValue
+* Added InterpolatingSignalGenerator
+
 v22.2
 -----
 
diff --git a/LibSource/BiquadFilter.h b/LibSource/BiquadFilter.h
index 0a1fe600..b4693319 100644
--- a/LibSource/BiquadFilter.h
+++ b/LibSource/BiquadFilter.h
@@ -11,7 +11,7 @@ class FilterStage {
   FloatArray state;
   static constexpr float BESSEL_Q = 0.57735026919f; // 1/sqrt(3)
   static constexpr float SALLEN_KEY_Q = 0.5f; // 1/2
-  static constexpr float BUTTERWORTH_Q = 0.70710678118f; // 1/sqrt(2)
+  static constexpr float BUTTERWORTH_Q = M_SQRT1_2; // 1/sqrt(2)
 
   FilterStage(FloatArray co, FloatArray st) : coefficients(co), state(st){}
 
diff --git a/LibSource/CircularBuffer.h b/LibSource/CircularBuffer.h
index ab0942eb..25e8982e 100644
--- a/LibSource/CircularBuffer.h
+++ b/LibSource/CircularBuffer.h
@@ -201,10 +201,10 @@ class CircularBuffer {
   }
 
   IndexType getContiguousReadCapacity() const {
-    if(writepos < readpos)
-      return size - readpos;
-    else
+    if(writepos > readpos)
       return writepos - readpos;
+    else
+      return size - readpos;
   }
 
   void setAll(const DataType value){
diff --git a/LibSource/ColourScreenPatch.cpp b/LibSource/ColourScreenPatch.cpp
index aa163f08..72e17efb 100644
--- a/LibSource/ColourScreenPatch.cpp
+++ b/LibSource/ColourScreenPatch.cpp
@@ -24,6 +24,13 @@ ColourScreenPatch::ColourScreenPatch(){
 
 ColourScreenPatch::~ColourScreenPatch(){}
 
+uint16_t ColourScreenPatch::getScreenWidth(){
+  return 64;
+}
+uint16_t ColourScreenPatch::getScreenHeight(){
+  return 64;
+}
+
 template<>
 Colour ColourScreenBuffer::getPixel(unsigned int x, unsigned int y){
   if(x >= width || y >= height)
diff --git a/LibSource/ColourScreenPatch.h b/LibSource/ColourScreenPatch.h
index 11d2e022..a14d7ae9 100644
--- a/LibSource/ColourScreenPatch.h
+++ b/LibSource/ColourScreenPatch.h
@@ -1,3 +1,6 @@
+#ifndef __ColourScreenPatch_h__
+#define __ColourScreenPatch_h__
+
 #include "Patch.h"
 #include "ScreenBuffer.h"
 
@@ -26,3 +29,5 @@ class ColourScreenPatch : public Patch {
   uint16_t getScreenHeight();
   virtual void processScreen(ColourScreenBuffer& screen) = 0;
 };
+
+#endif // __ColourScreenPatch_h__
diff --git a/LibSource/EnvelopeFollower.h b/LibSource/EnvelopeFollower.h
new file mode 100644
index 00000000..688c7b91
--- /dev/null
+++ b/LibSource/EnvelopeFollower.h
@@ -0,0 +1,37 @@
+#ifndef __EnvelopeFollower_h__
+#define __EnvelopeFollower_h__
+
+#include "SignalProcessor.h"
+
+/**
+ * Envelope follower. Rectifies and smooths the input signal
+ * to track changes in intensity over time.
+ */
+class EnvelopeFollower : public SignalProcessor {
+private:
+  const float lambda;
+  float y;
+public:  
+  EnvelopeFollower(float lambda = 0.995): lambda(lambda), y(0) {}
+  float process(float x){
+    y = y*lambda + abs(x)*(1.0f - lambda);
+    return y;
+  }
+  void process(FloatArray in, FloatArray out){
+    float* input = in.getData();
+    float* output = out.getData();
+    size_t len = in.getSize();
+    while(len--){
+      y = y*lambda + abs(*input++)*(1.0f - lambda);
+      *output++ = y;
+    }
+  }
+  static EnvelopeFollower* create(float lambda){
+    return new EnvelopeFollower(lambda);
+  }
+  static void destroy(EnvelopeFollower* obj){
+    delete obj;
+  }
+};
+
+#endif // __EnvelopeFollower_h__
diff --git a/LibSource/FastFourierTransform.cpp b/LibSource/FastFourierTransform.cpp
index 0b786e0b..a6d7ab0a 100644
--- a/LibSource/FastFourierTransform.cpp
+++ b/LibSource/FastFourierTransform.cpp
@@ -15,7 +15,8 @@ FastFourierTransform::~FastFourierTransform(){}
 void FastFourierTransform::init(size_t len){
   ASSERT(len==32 || len ==64 || len==128 || len==256 || len==512 || len==1024 || len==2048 || len==4096, "Unsupported FFT size");
   void* args[] = {(void*)&instance, (void*)&len};
-  getProgramVector()->serviceCall(OWL_SERVICE_ARM_RFFT_FAST_INIT_F32, args, 2);
+  int ret = getProgramVector()->serviceCall(OWL_SERVICE_ARM_RFFT_FAST_INIT_F32, args, 2);
+  ASSERT(ret == OWL_SERVICE_OK, "FFT init failed");
   // arm_rfft_fast_init_f32(&instance, len);
   // Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
 }
diff --git a/LibSource/InterpolatingCircularBuffer.h b/LibSource/InterpolatingCircularBuffer.h
index 2736c462..7ca4291b 100644
--- a/LibSource/InterpolatingCircularBuffer.h
+++ b/LibSource/InterpolatingCircularBuffer.h
@@ -107,6 +107,12 @@ class InterpolatingCircularFloatBuffer : public CircularBuffer<float> {
   }
 };
 
+template<>
+float InterpolatingCircularFloatBuffer<NO_INTERPOLATION>::readAt(float index){
+  size_t idx = (size_t)roundf(index);
+  return CircularFloatBuffer::readAt(idx);
+}
+
 template<>
 float InterpolatingCircularFloatBuffer<LINEAR_INTERPOLATION>::readAt(float index){
   size_t idx = (size_t)index;
diff --git a/LibSource/InterpolatingSignalGenerator.h b/LibSource/InterpolatingSignalGenerator.h
new file mode 100644
index 00000000..db15f86b
--- /dev/null
+++ b/LibSource/InterpolatingSignalGenerator.h
@@ -0,0 +1,254 @@
+#ifndef __InterpolatingSignalGenerator_h__
+#define __InterpolatingSignalGenerator_h__
+
+#include "FloatArray.h"
+#include "CircularBuffer.h"
+#include "Interpolator.h"
+
+/**
+ * Signal Generator that generates an arbitrary number of in-between points,
+ * interpolated between two (linear, cosine) or more (cubic, hermite) reference
+ * points.
+ * Can be used e.g. to convert a block rate signal to audio rate.
+ */
+template<InterpolationMethod im = LINEAR_INTERPOLATION>
+class InterpolatingSignalGenerator {
+protected:
+  CircularFloatBuffer* points;
+  float mu = 0;
+  float inc = 0;
+  static InterpolatingSignalGenerator<im>* allocate(size_t len){
+    CircularFloatBuffer* points = CircularFloatBuffer::create(len);
+    return new InterpolatingSignalGenerator<im>(points);
+  }
+public:
+  InterpolatingSignalGenerator(CircularFloatBuffer* points): points(points){}
+  /** Set period in samples */
+  void setPeriod(float period){
+    inc = 1/period;
+  }
+  /** Get period in samples */
+  float getPeriod(){
+    return 1/inc;
+  }
+  /** 
+   * Update the interpolator with a new reference point.
+   * update() must be called once every period.
+   */
+  void update(float x){
+    points->write(x);
+    mu = 0;
+  }
+  /**
+   * Reset interpolator to a fixed value.
+   * Sets all reference points to `x`.
+   */
+  void set(float x){
+    points->setAll(x);
+    mu = 0;
+  }
+  float generate();
+  void generate(FloatArray output);
+  static InterpolatingSignalGenerator<im>* create();
+  static InterpolatingSignalGenerator<im>* create(size_t period){
+    InterpolatingSignalGenerator<im>* obj = create();
+    obj->setPeriod(period);
+    return obj;
+  }
+  static void destroy(InterpolatingSignalGenerator<im>* obj){
+    CircularFloatBuffer::destroy(obj->points);
+    delete obj;
+  }
+};
+
+template<>
+void InterpolatingSignalGenerator<NO_INTERPOLATION>::generate(FloatArray output){
+  output.setAll(points->read());
+}
+
+template<>
+float InterpolatingSignalGenerator<NO_INTERPOLATION>::generate(){
+  return points->read();
+}
+
+template<>
+InterpolatingSignalGenerator<NO_INTERPOLATION>*
+InterpolatingSignalGenerator<NO_INTERPOLATION>::create(){
+  return allocate(1);
+}
+
+template<>
+float InterpolatingSignalGenerator<LINEAR_INTERPOLATION>::generate(){
+  float pts[2];
+  points->setDelay(2);
+  points->read(pts, 2);
+  float y = Interpolator::linear(pts[0], pts[1], mu);
+  mu += inc;
+  return y;
+}
+
+template<>
+void InterpolatingSignalGenerator<LINEAR_INTERPOLATION>::generate(FloatArray output){
+  float pts[2];
+  points->setDelay(2);
+  points->read(pts, 2);
+  size_t len = output.getSize();
+  float* out = output.getData();
+  while(len--){
+    *out++ = Interpolator::linear(pts[0], pts[1], mu);
+    mu += inc;
+  }
+}
+
+template<>
+InterpolatingSignalGenerator<LINEAR_INTERPOLATION>*
+InterpolatingSignalGenerator<LINEAR_INTERPOLATION>::create(){
+  return allocate(2);
+}
+
+template<>
+float InterpolatingSignalGenerator<COSINE_INTERPOLATION>::generate(){
+  float pts[2];
+  points->setDelay(2);
+  points->read(pts, 2);
+  float y = Interpolator::cosine(pts[0], pts[1], mu);
+  mu += inc;
+  return y;
+}
+
+template<>
+void InterpolatingSignalGenerator<COSINE_INTERPOLATION>::generate(FloatArray output){
+  float pts[2];
+  points->setDelay(2);
+  points->read(pts, 2);
+  size_t len = output.getSize();
+  float* out = output.getData();
+  while(len--){
+    *out++ = Interpolator::cosine(pts[0], pts[1], mu);
+    mu += inc;
+  }
+}
+
+template<>
+InterpolatingSignalGenerator<COSINE_INTERPOLATION>*
+InterpolatingSignalGenerator<COSINE_INTERPOLATION>::create(){
+  return allocate(2);
+}
+
+template<>
+float InterpolatingSignalGenerator<CUBIC_3P_INTERPOLATION>::generate(){
+  float pts[3];
+  points->setDelay(3);
+  points->read(pts, 3);
+  float y = Interpolator::cubic(pts[0], pts[1], pts[2], mu);
+  mu += inc;
+  return y;
+}
+
+template<>
+void InterpolatingSignalGenerator<CUBIC_3P_INTERPOLATION>::generate(FloatArray output){
+  float pts[3];
+  points->setDelay(3);
+  points->read(pts, 3);
+  size_t len = output.getSize();
+  float* out = output.getData();
+  while(len--){
+    *out++ = Interpolator::cubic(pts[0], pts[1], pts[2], mu);
+    mu += inc;
+  }
+}
+
+template<>
+InterpolatingSignalGenerator<CUBIC_3P_INTERPOLATION>*
+InterpolatingSignalGenerator<CUBIC_3P_INTERPOLATION>::create(){
+  return allocate(3);
+}
+
+template<>
+float InterpolatingSignalGenerator<CUBIC_4P_INTERPOLATION>::generate(){
+  float pts[4];
+  points->setDelay(4);
+  points->read(pts, 4);
+  float y = Interpolator::cubic(pts[0], pts[1], pts[2], pts[3], mu);
+  mu += inc;
+  return y;
+}
+
+template<>
+void InterpolatingSignalGenerator<CUBIC_4P_INTERPOLATION>::generate(FloatArray output){
+  float pts[4];
+  points->setDelay(4);
+  points->read(pts, 4);
+  size_t len = output.getSize();
+  float* out = output.getData();
+  while(len--){
+    *out++ = Interpolator::cubic(pts[0], pts[1], pts[2], pts[3], mu);
+    mu += inc;
+  }
+}
+
+template<>
+InterpolatingSignalGenerator<CUBIC_4P_INTERPOLATION>*
+InterpolatingSignalGenerator<CUBIC_4P_INTERPOLATION>::create(){
+  return allocate(4);
+}
+
+template<>
+float InterpolatingSignalGenerator<CUBIC_4P_SMOOTH_INTERPOLATION>::generate(){
+  float pts[4];
+  points->setDelay(4);
+  points->read(pts, 4);
+  float y = Interpolator::cubicSmooth(pts[0], pts[1], pts[2], pts[3], mu);
+  mu += inc;
+  return y;
+}
+
+template<>
+void InterpolatingSignalGenerator<CUBIC_4P_SMOOTH_INTERPOLATION>::generate(FloatArray output){
+  float pts[4];
+  points->setDelay(4);
+  points->read(pts, 4);
+  size_t len = output.getSize();
+  float* out = output.getData();
+  while(len--){
+    *out++ = Interpolator::cubicSmooth(pts[0], pts[1], pts[2], pts[3], mu);
+    mu += inc;
+  }
+}
+
+template<>
+InterpolatingSignalGenerator<CUBIC_4P_SMOOTH_INTERPOLATION>*
+InterpolatingSignalGenerator<CUBIC_4P_SMOOTH_INTERPOLATION>::create(){
+  return allocate(4);
+}
+
+template<>
+float InterpolatingSignalGenerator<HERMITE_INTERPOLATION>::generate(){
+  float pts[4];
+  points->setDelay(4);
+  points->read(pts, 4);
+  float y = Interpolator::hermite(pts[0], pts[1], pts[2], pts[3], mu);
+  mu += inc;
+  return y;
+}
+
+template<>
+void InterpolatingSignalGenerator<HERMITE_INTERPOLATION>::generate(FloatArray output){
+  float pts[4];
+  points->setDelay(4);
+  points->read(pts, 4);
+  size_t len = output.getSize();
+  float* out = output.getData();
+  while(len--){
+    *out++ = Interpolator::hermite(pts[0], pts[1], pts[2], pts[3], mu);
+    mu += inc;
+  }
+}
+
+template<>
+InterpolatingSignalGenerator<HERMITE_INTERPOLATION>*
+InterpolatingSignalGenerator<HERMITE_INTERPOLATION>::create(){
+  return allocate(4);
+}
+
+#endif // __InterpolatingSignalGenerator_h__
diff --git a/LibSource/Interpolator.h b/LibSource/Interpolator.h
index fd261e22..a605f730 100644
--- a/LibSource/Interpolator.h
+++ b/LibSource/Interpolator.h
@@ -67,6 +67,7 @@ class Interpolator {
 };
 
 enum InterpolationMethod {
+  NO_INTERPOLATION,
   LINEAR_INTERPOLATION,
   COSINE_INTERPOLATION,
   CUBIC_3P_INTERPOLATION,
diff --git a/LibSource/KaiserWindow.h b/LibSource/KaiserWindow.h
new file mode 100644
index 00000000..d57b1a75
--- /dev/null
+++ b/LibSource/KaiserWindow.h
@@ -0,0 +1,217 @@
+/*
+ * Adapted from the Loris C++ Class Library, implementing analysis, 
+ * manipulation, and synthesis of digitized sounds using the Reassigned 
+ * Bandwidth-Enhanced Additive Sound Model.
+ *
+ * Loris is Copyright (c) 1999-2010 by Kelly Fitz and Lippold Haken
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY, without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ *
+ * KaiserWindow.C
+ *
+ * Implementation of class Loris::KaiserWindow.
+ *
+ * Kelly Fitz, 14 Dec 1999
+ * loris@cerlsoundgroup.org
+ *
+ * http://www.cerlsoundgroup.org/Loris/
+ *
+ */
+
+#include "Window.h"
+
+class KaiserWindow : public Window {
+public:
+  KaiserWindow(): Window(){}
+  KaiserWindow(float* data, size_t size): Window(data, size){}
+  
+  static KaiserWindow create(float shape, size_t size, bool derivative = false){
+    KaiserWindow win(new float[size], size);
+    if(derivative)
+      buildWindow(win, shape);
+    else
+      buildTimeDerivativeWindow(win, shape);
+    return win;
+  }
+
+  static void destroy(KaiserWindow obj){
+    Window::destroy(obj);
+  }
+
+  // ---------------------------------------------------------------------------
+  //  buildWindow
+  // ---------------------------------------------------------------------------
+  //! Build a new Kaiser analysis window having the specified shaping
+  //! parameter. See Oppenheim and Schafer:  "Digital Signal Processing" 
+  //! (1975), p. 452 for further explanation of the Kaiser window. Also, 
+  //! see Kaiser and Schafer, 1980.
+  //!
+  //! \param      win is the vector that will store the window
+  //!             samples. The number of samples computed will be
+  //!             equal to the length of this vector. Any previous
+  //!             contents will be overwritten.
+  //! \param      shape is the Kaiser shaping parameter, controlling
+  //!             the sidelobe rejection level.
+  // α is a non-negative real number that determines the shape of the window.
+  // In the frequency domain, it determines the trade-off between main-lobe width
+  // and side lobe level, which is a central decision in window design.
+  // Sometimes the Kaiser window is parametrized by β, where β = πα.
+  //
+  static void buildWindow(FloatArray win, float shape){   
+    //  Pre-compute the shared denominator in the Kaiser equation. 
+    const float oneOverDenom = 1.0 / zeroethOrderBessel( shape );
+    const unsigned int N = win.getSize() - 1;
+    const float oneOverN = 1.0 / N;
+    float* data = win.getData();
+    for(unsigned int n = 0; n <= N; ++n){
+      const float K = (2.0 * n * oneOverN) - 1.0;
+      const float arg = sqrtf( 1.0 - (K * K) );        
+      data[n] = zeroethOrderBessel(shape * arg) * oneOverDenom;
+      // consider using std::cyl_bessel_jf(0, shape * arg) (c++17)
+    }
+  }
+
+ 
+  // ---------------------------------------------------------------------------
+  //  createDerivativeWindow
+  // ---------------------------------------------------------------------------
+  //! Build a new time-derivative Kaiser analysis window having the
+  //! specified shaping parameter, for computing frequency reassignment.
+  //! The closed form for the time derivative can be obtained from the
+  //! property of modified Bessel functions that the derivative of the
+  //! zeroeth order function is equal to the first order function.
+  //!
+  //! \param      win is the vector that will store the window
+  //!             samples. The number of samples computed will be
+  //!             equal to the length of this vector. Any previous
+  //!             contents will be overwritten.
+  //! \param      shape is the Kaiser shaping parameter, controlling
+  //!             the sidelobe rejection level.
+  //
+  static void buildTimeDerivativeWindow(FloatArray win, float shape){   
+    //  Pre-compute the common factor that does not depend on n.
+    const unsigned int N = win.getSize() - 1;
+    const float oneOverN = 1.0 / N;
+    const float commonFac = - 2.0 * shape / (N * zeroethOrderBessel(shape) );
+      //  w'[0] = w'[N] = 0
+    win[0] = win[N] = 0.0;    
+    float* data = win.getData();
+    for(unsigned int n = 1; n < N; ++n){
+      const float K = (2.0 * n * oneOverN) - 1.0;
+      const float arg = sqrtf( 1.0 - (K * K) );
+      data[n] = commonFac * firstOrderBessel(shape * arg) * K / arg;
+      // consider using std::cyl_bessel_jf(1, shape * arg) (c++17)
+    }
+  }
+ 
+  // ---------------------------------------------------------------------------
+  //  zeroethOrderBessel
+  // ---------------------------------------------------------------------------
+  //  Compute the zeroeth order modified Bessel function of the first kind 
+  //  at x using the series expansion, used to compute the Kasier window
+  //  function.
+  //
+  static float zeroethOrderBessel(float x){
+    const float eps = 0.000001;
+    
+    //  initialize the series term for m=0 and the result
+    float besselValue = 0;
+    float term = 1;
+    float m = 0;
+    
+    //  accumulate terms as long as they are significant
+    while(term  > eps * besselValue){
+      besselValue += term;
+        
+      //  update the term
+      ++m;
+      term *= (x*x) / (4*m*m);
+    }
+    
+    return besselValue;
+  }
+
+  // ---------------------------------------------------------------------------
+  //  firstOrderBessel
+  // ---------------------------------------------------------------------------
+  //  Compute the first order modified Bessel function of the first kind 
+  //  at x using the series expansion, used to compute the time derivative
+  //  of the Kasier window function for computing frequency reassignment.
+  //
+  static float firstOrderBessel(float x){
+    const float eps = 0.000001;
+    
+    //  initialize the series term for m=0 and the result
+    float besselValue = 0;
+    float term = .5*x;
+    float m = 0;
+    
+    //  accumulate terms as long as they are significant
+    while(term  > eps * besselValue)
+      {
+        besselValue += term;
+        
+        //  update the term
+        ++m;
+        term *= (x*x) / (4*m*(m+1));
+      }
+    
+    return besselValue;
+  }
+
+  // ---------------------------------------------------------------------------
+  //  computeShape
+  // ---------------------------------------------------------------------------
+  //  Compute the Kaiser window shaping parameter from the specified attenuation 
+  //  of side lobes. This algorithm is given in Kaiser an Schafer,1980 and is 
+  //  supposed to give better than 0.36% accuracy (Kaiser and Schafer 1980).
+  //
+  static float computeShape(float atten){
+    ASSERT(atten >= 0, "Kaiser window shape must be > 0dB");
+    float alpha;
+    if (atten > 60.0){
+      alpha = 0.12438 * (atten + 6.3);
+    }else if(atten > 13.26){
+      alpha = 0.76609L * ( powf((atten - 13.26), 0.4) ) + 
+	0.09834L * (atten - 13.26L);
+    }else{
+      //  can't have less than 13dB.
+      alpha = 0.0;
+    }    
+    return alpha;
+  }
+ 
+  // ---------------------------------------------------------------------------
+  //  computeLength
+  // ---------------------------------------------------------------------------
+  //  Compute the length (in samples) of the Kaiser window from the desired 
+  //  (approximate) main lobe width and the control parameter. Of course, since 
+  //  the window must be an integer number of samples in length, your actual 
+  //  lobal mileage may vary. This equation appears in Kaiser and Schafer 1980
+  //  (on the use of the I0 window class for spectral analysis) as Equation 9.
+  //
+  //  The main width of the main lobe must be normalized by the sample rate,
+  //  that is, it is a fraction of the sample rate.
+  //
+  static size_t computeLength(float width, float alpha) {
+    //  The last 0.5 is cheap rounding.
+    //  But I think I don't need cheap rounding because the equation 
+    //  from Kaiser and Schafer has a +1 that appears to be a cheap
+    //  ceiling function.
+    return long(1.0 + (2. * sqrtf((M_PI*M_PI) + (alpha*alpha)) / (M_PI * width)) /* + 0.5 */);
+  }
+
+};
diff --git a/LibSource/MidiMessage.h b/LibSource/MidiMessage.h
index 54234b0f..6bd4bf8d 100644
--- a/LibSource/MidiMessage.h
+++ b/LibSource/MidiMessage.h
@@ -78,6 +78,9 @@ class MidiMessage {
   uint8_t getProgramChange(){
     return data[1];
   }
+  /**
+   * Get pitch bend value as a signed integer between -8192 and 8191
+   */
   int16_t getPitchBend(){
     int16_t pb = (data[2] | (data[3]<<7)) - 8192;
     return pb;
diff --git a/LibSource/MonochromeScreenPatch.cpp b/LibSource/MonochromeScreenPatch.cpp
index b2523232..15376692 100644
--- a/LibSource/MonochromeScreenPatch.cpp
+++ b/LibSource/MonochromeScreenPatch.cpp
@@ -24,6 +24,13 @@ MonochromeScreenPatch::MonochromeScreenPatch(){
 
 MonochromeScreenPatch::~MonochromeScreenPatch(){}
 
+uint16_t MonochromeScreenPatch::getScreenWidth(){
+  return 128;
+}
+uint16_t MonochromeScreenPatch::getScreenHeight(){
+  return 64;
+}
+
 template<>
 Colour MonochromeScreenBuffer::getPixel(unsigned int x, unsigned int y){
   if(x >= width || y >= height)
diff --git a/LibSource/MonochromeScreenPatch.h b/LibSource/MonochromeScreenPatch.h
index 74bb7d87..e415968c 100644
--- a/LibSource/MonochromeScreenPatch.h
+++ b/LibSource/MonochromeScreenPatch.h
@@ -1,3 +1,6 @@
+#ifndef __MonochromeScreenPatch_h__
+#define __MonochromeScreenPatch_h__
+
 #include "Patch.h"
 #include "ScreenBuffer.h"
 
@@ -19,3 +22,5 @@ class MonochromeScreenPatch : public Patch {
   uint16_t getScreenHeight();
   virtual void processScreen(MonochromeScreenBuffer& screen) = 0;
 };
+
+#endif // __MonochromeScreenScreenPatch_h__
diff --git a/LibSource/MovingAverage.h b/LibSource/MovingAverage.h
new file mode 100644
index 00000000..5127eefc
--- /dev/null
+++ b/LibSource/MovingAverage.h
@@ -0,0 +1,137 @@
+#ifndef __MovingAverage_h__
+#define __MovingAverage_h__
+
+#include "SignalProcessor.h"
+
+/**
+ * Exponential Moving Average EMA
+ */
+class ExponentialMovingAverage : public SignalProcessor {
+private:
+  float lambda;
+  float y;
+public:  
+  ExponentialMovingAverage(float lambda = 0.995, float y=0): lambda(lambda), y(y) {}
+  void set(float value){
+    y = value;
+  }
+  /**
+   * Set the exponential decay time coefficient. Lambda should be a value
+   * between 0 and 1, typically greater than 0.9. 
+   * Higher values gives more smoothing.
+   */
+  void setLambda(float value){
+    lambda = value;
+  }
+  float getLambda(){
+    return lambda;
+  }
+  /**
+   * Set lambda (time coefficient) as amount of smoothing over number of 
+   * observations.
+   * With smoothing = 2.0 and observations = N, this corresponds roughly to 
+   * an N-point SMA.
+   */
+  void setSmoothing(size_t observations, float smoothing = 2){
+    lambda = smoothing / (observations + 1);
+  }
+  /**
+   * Set lambda (time coefficient) as 1/N.
+   * Known as a Modified Moving Average MMA, Smoothed Moving Average SMMA, or 
+   * Running Moving Average RMA.
+   */
+  void setModifiedMovingAverage(size_t N){
+    lambda = 1/N;
+  }
+  /**
+   * Set lambda (time coefficient) as the -3dB cutoff frequency, in radians.
+   * (i.e. radians = pi times frequency / sample rate).
+   * Ref: https://dsp.stackexchange.com/questions/28308/exponential-weighted-moving-average-time-constant
+   */
+  void setCutoff(float fc){
+    float cfc = cosf(fc);
+    lambda = cfc - 1 + sqrtf(cfc*cfc - 4*cfc + 3);
+  }
+  /** RMS detection with smoothing coefficient (Moving RMS) as per:
+   * R. J. Cassidy, “Level Detection Tunings and Techniques for the Dynamic Range Compression of Audio Signals,” presented at the 117th Convention of the Audio Engineering Society (2004 Oct.), convention paper 6235.
+   * Referenced in https://www.eecs.qmul.ac.uk/~josh/documents/2012/GiannoulisMassbergReiss-dynamicrangecompression-JAES2012.pdf
+   */
+  float getNextAverage(float x){
+    y = y*lambda + x*(1.0f - lambda);
+    return y;
+  }
+  float getAverage(){
+    return y;
+  }
+  /* process a single sample and return the result */
+  float process(float in){
+    return getNextAverage(in);
+  }
+  void process(FloatArray input){
+    for(size_t i=0; i<input.getSize(); i++)
+      getNextAverage(input[i]);
+  }
+  using SignalProcessor::process;
+  static ExponentialMovingAverage* create(float lambda){
+    return new ExponentialMovingAverage(lambda);
+  }
+  static void destroy(ExponentialMovingAverage* obj){
+    delete obj;
+  }
+};
+
+/**
+ * Simple Moving Average SMA
+ */
+class SimpleMovingAverage : public SignalProcessor {
+private:
+  FloatArray buffer;
+  size_t writeIndex = 0;
+  float sum = 0;
+public:
+  SimpleMovingAverage() {}
+  SimpleMovingAverage(FloatArray buf) : buffer(buf), sum(buf.getSum()) {}
+  void reset(){
+    buffer.clear();
+    sum = 0;
+  }
+  void set(float value){
+    buffer.setAll(value);
+    sum = value * buffer.getSize();
+  }
+  float getNextSum(float value){
+    sum = sum - buffer[writeIndex] + value;
+    buffer[writeIndex] = value;
+    // sum = sum - head() + value;
+    // write(value);
+    if(++writeIndex == buffer.getSize())
+      writeIndex = 0;
+    return sum;
+  }
+  float getNextAverage(float push){
+    return getNextSum(push)/buffer.getSize();
+  }
+  float getAverage(){
+    return sum/buffer.getSize();
+  }
+  size_t getSize(){
+    return buffer.getSize();
+  }
+  float process(float in){
+    return getNextAverage(in);
+  }
+  void process(FloatArray input){
+    for(size_t i=0; i<input.getSize(); i++)
+      getNextSum(input[i]);
+  }
+  using SignalProcessor::process;
+  static SimpleMovingAverage* create(int samples){
+    return new SimpleMovingAverage(FloatArray::create(samples));
+  }
+  static void destroy(SimpleMovingAverage* buf){
+    FloatArray::destroy(buf->buffer);
+    delete buf;
+  }
+};
+
+#endif // __MovingAverage_h__
diff --git a/LibSource/OpenWareLibrary.h b/LibSource/OpenWareLibrary.h
index be1e6fdc..c34d2777 100644
--- a/LibSource/OpenWareLibrary.h
+++ b/LibSource/OpenWareLibrary.h
@@ -2,6 +2,7 @@
 #define __OpenWareLibrary_h__
 
 #include "AbstractSynth.h"
+#include "AdsrEnvelope.h"
 #include "AgnesiOscillator.h"
 #include "AudioBuffer.h"
 #include "BiquadFilter.h"
@@ -16,6 +17,7 @@
 #include "DelayProcessor.h"
 #include "DryWetProcessor.h"
 #include "Envelope.h"
+#include "EnvelopeFollower.h"
 #include "ExponentialDecayEnvelope.h"
 #include "FastFourierTransform.h"
 #include "FeedbackProcessor.h"
@@ -26,12 +28,14 @@
 #include "IntArray.h"
 #include "Interpolator.h"
 #include "InterpolatingCircularBuffer.h"
-#include "AdsrEnvelope.h"
+#include "InterpolatingSignalGenerator.h"
+#include "KaiserWindow.h"
 #include "MidiProcessor.h"
 #include "MidiPolyphonicExpressionProcessor.h"
 #include "MidiStatus.h"
 #include "MorphingOscillator.h"
 #include "MonophonicProcessor.h"
+#include "MovingAverage.h"
 #include "NoiseGenerator.h"
 #include "NoiseOscillator.h"
 #include "OpenWareMidiControl.h"
@@ -46,7 +50,7 @@
 #include "Resource.h"
 #include "SampleOscillator.h"
 #include "ShortArray.h"
-#include "ShortFastFourierTransform.h"
+/* #include "ShortFastFourierTransform.h" links in static q15 coefficients */
 #include "SignalGenerator.h"
 #include "SignalProcessor.h"
 #include "SineOscillator.h"
@@ -56,6 +60,7 @@
 #include "SquareWaveOscillator.h"
 #include "Synth.h"
 #include "TapTempo.h"
+#include "TakeoverValue.h"
 #include "TriangleOscillator.h"
 #include "VariableShapeOscillator.h"
 #include "VoltsPerOctave.h"
diff --git a/LibSource/Patch.h b/LibSource/Patch.h
index 8e1b6f4c..49c5251f 100644
--- a/LibSource/Patch.h
+++ b/LibSource/Patch.h
@@ -6,7 +6,6 @@
 #include "Resource.h"
 #include "FloatArray.h"
 #include "PatchParameter.h"
-#include "SmoothValue.h"
 #include "AudioBuffer.h"
 #include "OpenWareMidiControl.h"
 
diff --git a/LibSource/Resample.h b/LibSource/Resample.h
index 9deae606..c1d18414 100644
--- a/LibSource/Resample.h
+++ b/LibSource/Resample.h
@@ -35,8 +35,8 @@ class [[deprecated("use UpSampler and DownSampler instead.")]] Resampler {
     BiquadFilter::destroy(downfilter);
   }
   void init(){
-    upfilter=BiquadFilter::create(upsampleStages);
-    downfilter=BiquadFilter::create(downsampleStages);
+    upfilter=BiquadFilter::create(0, upsampleStages);
+    downfilter=BiquadFilter::create(0, downsampleStages);
     // [B, A]=cheby1(2, 2, 0.25); then use [B, -A(2:end)] , note the minus sign in front of the A coefficients!!!!
     //alternatively, we could use FilterStage to compute the coefficients
     static float downCoeffs[5]={0.07609109, 0.15218218, 0.07609109, +1.16511283,  -0.54828486};
@@ -79,7 +79,7 @@ class UpSampler : public SignalProcessor {
 public:
   UpSampler(BiquadFilter* filter, int factor=4): filter(filter), factor(factor) {}
   static UpSampler* create(int stages, int factor=4){
-    BiquadFilter* filter = BiquadFilter::create(stages);
+    BiquadFilter* filter = BiquadFilter::create(0, stages);
     // [B, A]=cheby1(2, 2, 0.25); then use [B, -A(2:end)] , note the minus sign in front of the A coefficients!!!!
     //alternatively, we could use FilterStage to compute the coefficients
     float upCoeffs[5]= {0.07609109, 0.15218218, 0.07609109, +1.16511283,  -0.54828486};
@@ -115,7 +115,7 @@ class DownSampler : public SignalProcessor {
 public:
   DownSampler(BiquadFilter* filter, int factor=4): filter(filter), factor(factor) {}
   static DownSampler* create(int stages, int factor=4){
-    BiquadFilter* filter = BiquadFilter::create(stages);
+    BiquadFilter* filter = BiquadFilter::create(0, stages);
     // [B, A]=cheby1(2, 2, 0.25); then use [B, -A(2:end)] , note the minus sign in front of the A coefficients!!!!
     //alternatively, we could use FilterStage to compute the coefficients
     static float downCoeffs[5]={0.07609109, 0.15218218, 0.07609109, +1.16511283,  -0.54828486};
diff --git a/LibSource/ShortFastFourierTransform.cpp b/LibSource/ShortFastFourierTransform.cpp
index 644a35c1..1e212741 100644
--- a/LibSource/ShortFastFourierTransform.cpp
+++ b/LibSource/ShortFastFourierTransform.cpp
@@ -15,8 +15,6 @@ ShortFastFourierTransform::~ShortFastFourierTransform(){}
 void ShortFastFourierTransform::init(int aSize){
   len = aSize;
   ASSERT(len==32 || len ==64 || len==128 || len==256 || len==512 || len==1024 || len==2048 || len==4096, "Unsupported FFT size");
-  void* args[] = {(void*)&instance, (void*)&len};
-  // getProgramVector()->serviceCall(OWL_SERVICE_ARM_RFFT_FAST_INIT_Q15, args, 2);
   // Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
 }
 
diff --git a/LibSource/ShortFastFourierTransform.h b/LibSource/ShortFastFourierTransform.h
index bb42d302..63f8d6ff 100644
--- a/LibSource/ShortFastFourierTransform.h
+++ b/LibSource/ShortFastFourierTransform.h
@@ -12,6 +12,7 @@
 
 /**
  * This class performs direct and inverse ShortFast Fourier Transform.
+ * Note that on ARM, this links in static coefficients for all supported FFT sizes!
  */ 
 class ShortFastFourierTransform {
 private:
diff --git a/LibSource/SimpleValue.cpp b/LibSource/SimpleValue.cpp
new file mode 100644
index 00000000..d06c6e7a
--- /dev/null
+++ b/LibSource/SimpleValue.cpp
@@ -0,0 +1,21 @@
+#include "SimpleValue.h"
+#include "math.h"
+
+/**
+ * The int constants are meant to provide reasonable defaults for use
+ * with OWL parameters, which are generally 12 bit fixed point, i.e. Q12.
+ */
+#define Q12_FACTOR ((float)(1<<12))
+
+template<> const float SimpleValue<float>::DEFAULT_LAMBDA = 0.9;
+template<> const float SimpleValue<float>::DEFAULT_DELTA = 0.02;
+template<> const float SimpleValue<float>::DEFAULT_EXP_C = 1;
+template<> const float SimpleValue<float>::DEFAULT_EXP_K = 2*M_LN2;
+template<> const float SimpleValue<float>::DEFAULT_LOG_C = 1.6487212707;
+template<> const float SimpleValue<float>::DEFAULT_LOG_K = 5.74033482823*M_LN2;
+template<> const int SimpleValue<int>::DEFAULT_LAMBDA = (int)(0.9*Q12_FACTOR);
+template<> const int SimpleValue<int>::DEFAULT_DELTA = (int)(0.02*Q12_FACTOR);
+template<> const int SimpleValue<int>::DEFAULT_EXP_C = (int)(1*Q12_FACTOR);
+template<> const int SimpleValue<int>::DEFAULT_EXP_K = (int)(2*M_LN2*Q12_FACTOR);
+template<> const int SimpleValue<int>::DEFAULT_LOG_C = (int)(1.6487212707*Q12_FACTOR);
+template<> const int SimpleValue<int>::DEFAULT_LOG_K = (int)(5.74033482823*M_LN2*Q12_FACTOR);
diff --git a/LibSource/SimpleValue.h b/LibSource/SimpleValue.h
new file mode 100644
index 00000000..a60e3713
--- /dev/null
+++ b/LibSource/SimpleValue.h
@@ -0,0 +1,73 @@
+#ifndef __SimpleValue_h__
+#define __SimpleValue_h__
+
+/**
+ * Base class for a value that can be set, updated and retrieved (get).
+ * Used to selectively add smoothing, hysteresis and ranging to floats and ints.
+ * For absolute value updates use the `=` assignment operator, or `update()`.
+ * For relative value updates use the `+=` and/or `-=` assignment operators.
+ * For value scaling use the `*=` and/or `/=` assignment operators.
+ */
+template <typename T>
+class SimpleValue {
+protected:
+  T value;
+public:
+  SimpleValue() : value(0) {}
+  SimpleValue(T value) : value(value) {}
+  SimpleValue(const SimpleValue<T>& other) : value(other.value) {}
+  T get(){
+    return value;
+  }
+  void reset(T x){
+    value = x;
+  }
+  void update(T x){
+    value = x;    
+  }
+  SimpleValue<T>& operator=(const T& other){
+    update(other);
+    return *this;
+  }
+  SimpleValue<T>& operator+=(const T& other){
+    update(value + other);
+    return *this;
+  }
+  SimpleValue<T>& operator-=(const T& other){
+    update(value - other);
+    return *this;
+  }
+  SimpleValue<T>& operator*=(const T& other){
+    update(value * other);
+    return *this;
+  }
+  SimpleValue<T>& operator/=(const T& other){
+    update(value / other);
+    return *this;
+  }
+  operator T(){
+    return get();
+  }
+  static const T DEFAULT_LAMBDA;
+  static const T DEFAULT_DELTA;
+  static const T DEFAULT_EXP_C;
+  static const T DEFAULT_EXP_K;
+  static const T DEFAULT_LOG_C;
+  static const T DEFAULT_LOG_K;
+};
+
+// prevent -Wundefined-var-template warnings
+template<> const float SimpleValue<float>::DEFAULT_LAMBDA;
+template<> const float SimpleValue<float>::DEFAULT_DELTA;
+template<> const float SimpleValue<float>::DEFAULT_EXP_C;
+template<> const float SimpleValue<float>::DEFAULT_EXP_K;
+template<> const float SimpleValue<float>::DEFAULT_LOG_C;
+template<> const float SimpleValue<float>::DEFAULT_LOG_K;
+template<> const int SimpleValue<int>::DEFAULT_LAMBDA;
+template<> const int SimpleValue<int>::DEFAULT_DELTA;
+template<> const int SimpleValue<int>::DEFAULT_EXP_C;
+template<> const int SimpleValue<int>::DEFAULT_EXP_K;
+template<> const int SimpleValue<int>::DEFAULT_LOG_C;
+template<> const int SimpleValue<int>::DEFAULT_LOG_K;
+
+#endif /* __SimpleValue_h__ */
diff --git a/LibSource/SmoothValue.cpp b/LibSource/SmoothValue.cpp
deleted file mode 100755
index c8a3025c..00000000
--- a/LibSource/SmoothValue.cpp
+++ /dev/null
@@ -1,72 +0,0 @@
-#include "SmoothValue.h"
-#include "basicmaths.h"
-
-template<>
-SmoothFloat::SmoothValue()
-  : value(0.0), lambda(0.9) {}
-
-template<>
-SmoothFloat::SmoothValue(float l)
-  : value(0.0), lambda(l) {}
-
-template<>
-SmoothFloat::SmoothValue(float l, float initialValue)
-  : value(initialValue), lambda(l) {}
-
-template<>
-SmoothInt::SmoothValue(int divider)
-  : value(0), lambda(divider) {
-// lambda = 1 - 1/divider
-// divider 4:0.75, 5:0.8, 6:0.833, 7:0.857, 8:0.875, 9:0.888, 10:0.9 et c
-}
-
-template<>
-SmoothInt::SmoothValue(int divider, int initialValue) 
-  : value(initialValue), lambda(divider) {}
-
-template<>
-void SmoothFloat::update(float newValue){
-  value = value*lambda + newValue*(1.0f - lambda);
-}
-
-template<>
-void SmoothInt::update(int newValue){
-  value = (value*lambda + newValue)/(lambda+1);
-}
-
-template<>
-void SmoothStiffFloat::update(float newValue){
-  if(abs(value-newValue) >= delta)
-    value = value*lambda + newValue*(1.0f - lambda);
-}
-
-template<>
-void SmoothStiffInt::update(int newValue){
-  if(abs(value-newValue) >= delta)
-    value = (value*lambda + newValue)/(lambda+1);
-}
-
-template<>
-float SmoothValue<float>::normal(float lambda, int blocksize){
-  return lambda*128.0f/blocksize;
-}
-
-template<>
-int SmoothValue<int>::normal(float lambda, int blocksize){
-  return (1.0f/(1.0-lambda))*128.0f/blocksize;
-}
-
-template<>
-float StiffValue<float>::normal(float delta){
-  return delta;
-}
-
-template<>
-int StiffValue<int>::normal(float delta){
-  return delta;
-}
-
-template class SmoothValue<int>;
-template class SmoothValue<float>;
-template class SmoothStiffValue<int>;
-template class SmoothStiffValue<float>;
diff --git a/LibSource/SmoothValue.h b/LibSource/SmoothValue.h
index 9ae6f2fe..b1665756 100644
--- a/LibSource/SmoothValue.h
+++ b/LibSource/SmoothValue.h
@@ -1,6 +1,8 @@
 #ifndef __SmoothValue_h__
 #define __SmoothValue_h__
 
+#include "SimpleValue.h"
+
 /**
  * Applies exponential smoothing to a scalar value.
  * y(n) = lambda*y(n-1) + (1.0-lambda)*y(n) for floats
@@ -9,52 +11,45 @@
  * todo: adjust for sampling frequency / blocksize (time delay of the response (mean) is 1/α data points)
  * https://en.wikipedia.org/wiki/Exponential_smoothing
  */
-template<typename T>
-class SmoothValue {
-private:
-  T value;
+template<typename T, typename Value = SimpleValue<T>>
+class SmoothValue : public Value {
 public:
-  T lambda;
-  SmoothValue();
-  SmoothValue(T lambda);
-  SmoothValue(T lambda, T initialValue);
-  SmoothValue(const SmoothValue<T>& other)
-    : value(other.value), lambda(other.lambda){
-    // copy constructor: not needed?
-  }
-  void update(T newValue);
-  void reset(T newValue){
-    value = newValue;
-  }
-  T getValue(){
-    return value;
-  }
-  SmoothValue<T>& operator=(const T& other){
-    update(other);
+  T lambda = Value::DEFAULT_LAMBDA;
+  SmoothValue() {}
+  SmoothValue(T value) : Value(value) {}
+  SmoothValue(T lambda, T init) : Value(init), lambda(lambda) {}
+  SmoothValue(const SmoothValue<T, Value>& other) : Value(other), lambda(other.lambda) {}
+  void update(T x){
+    Value::update(Value::get()*lambda + x*(1.0f - lambda));
+  }
+  SmoothValue<T, Value>& operator=(const T& x){
+    update(x);
     return *this;
   }
-  SmoothValue<T>& operator+=(const T& other){
-    update(value+other);
+  SmoothValue<T, Value>& operator+=(const T& other){
+    update(Value::get() + other);
     return *this;
   }
-  SmoothValue<T>& operator-=(const T& other){
-    update(value-other);
+  SmoothValue<T, Value>& operator-=(const T& other){
+    update(Value::get() - other);
     return *this;
   }
-  SmoothValue<T>& operator*=(const T& other){
-    update(value*other);
+  SmoothValue<T, Value>& operator*=(const T& other){
+    update(Value::get() * other);
     return *this;
   }
-  SmoothValue<T>& operator/=(const T& other){
-    update(value/other);
+  SmoothValue<T, Value>& operator/=(const T& other){
+    update(Value::get() / other);
     return *this;
   }
   operator T(){
-    return getValue();
+    return Value::get();
   }
   static T normal(float lambda, int blocksize);
 };
 
+template class SmoothValue<int>;
+template class SmoothValue<float>;
 typedef SmoothValue<float> SmoothFloat;
 typedef SmoothValue<int> SmoothInt;
 
@@ -62,106 +57,251 @@ typedef SmoothValue<int> SmoothInt;
  * Applies simple hysteresis to a scalar.
  * Only updates the value if the absolute difference is greater than delta
  */
-template<typename T>
-class StiffValue {  
-private:
-  T value;
+template<typename T, typename Value = SimpleValue<T>>
+class StiffValue : public Value {
 public:
-  T delta;
-  StiffValue()
-    : value(0.0), delta(0.02){}
-  StiffValue(T d)
-    : value(0.0), delta(d){}
-  StiffValue(T d, T initialValue)
-    : value(initialValue), delta(d){}
+  T delta = Value::DEFAULT_DELTA;
+  StiffValue() {}
+  StiffValue(T value) : Value(value) {}
+  StiffValue(T delta, T init) : Value(init), delta(delta) {}
+  StiffValue(const StiffValue<T, Value>& other) : Value(other), delta(other.delta) {}
   void update(T newValue){
-    if(abs(value-newValue) > delta)
-      value = newValue;
-  }
-  void reset(T newValue){
-    value = newValue;
+    if(abs(Value::get() - newValue) > delta)
+      Value::update(newValue);
   }
-  T getValue(){
-    return value;
-  }
-  StiffValue<T>& operator=(const T& other){
+  StiffValue<T, Value>& operator=(const T& other){
     update(other);
     return *this;
   }
-  StiffValue<T>& operator+=(const T& other){
-    update(value+other);
+  StiffValue<T, Value>& operator+=(const T& other){
+    update(Value::get() + other);
     return *this;
   }
-  StiffValue<T>& operator-=(const T& other){
-    update(value-other);
+  StiffValue<T, Value>& operator-=(const T& other){
+    update(Value::get() - other);
     return *this;
   }
-  StiffValue<T>& operator*=(const T& other){
-    update(value*other);
+  StiffValue<T, Value>& operator*=(const T& other){
+    update(Value::get() * other);
     return *this;
   }
-  StiffValue<T>& operator/=(const T& other){
-    update(value/other);
+  StiffValue<T, Value>& operator/=(const T& other){
+    update(Value::get() / other);
     return *this;
   }
   operator T(){
-    return getValue();
+    return Value::get();
   }
   static T normal(float delta);
 };
 
+template class StiffValue<int>;
+template class StiffValue<float>;
 typedef StiffValue<float> StiffFloat;
 typedef StiffValue<int> StiffInt;
+typedef SmoothValue<float, StiffFloat> SmoothStiffFloat;
+typedef SmoothValue<int, StiffInt> SmoothStiffInt;
+
+template<class T>
+using SmoothStiffValue = SmoothValue<T, StiffValue<T>>;
 
 /**
- * Applies hysteresis and smoothing to a scalar.
+ * Linearly scaled value. Scales an input on the range [0, 1] linearly to the range [min, max].
+ * Minimum may be less than maximum for inverted scale.
  */
-template<typename T>
-class SmoothStiffValue {
-  // simple hysteresis
-private:
-  T lambda;
-  T delta;
-  T value;
+template<typename T, typename Value = SimpleValue<T>>
+class LinearValue : public Value {
+protected:
+  T scale;
+  T adjust;
+  T offset;
 public:
-  SmoothStiffValue(){}
-  SmoothStiffValue(T l, T d)
-    : lambda(d), delta(d){}
-  SmoothStiffValue(T l, T d, T initialValue)
-    : lambda(d), delta(d), value(initialValue) {}
-  void update(T newValue);
-  void reset(T newValue){
-    value = newValue;
-  }
-  T getValue(){
-    return value;
-  }
-  SmoothStiffValue<T>& operator=(const T& other){
-    update(other);
+  LinearValue(T value = 0): Value(value), scale(1), adjust(0), offset(0) {}
+  LinearValue(const LinearValue<T, Value>& other):
+    Value(other), scale(other.scale), adjust(other.adjust), offset(other.offset) {}
+  LinearValue(T minimum, T maximum, T init): Value(init) {
+    setRange(minimum, maximum);
+  }
+  void setRange(T minimum, T maximum){
+    scale = maximum - minimum;
+    adjust = 0;
+    offset = minimum;
+  }
+  void setRange(T from_lo, T from_hi, T to_lo, T to_hi){
+    // return (x - in_min) * (out_max - out_min) / (in_max - in_min) + out_min;
+    //                       * scale + 
+    scale = (to_hi - to_lo) / (from_hi - from_lo);
+    offset = to_lo;
+    adjust = from_lo;
+    // todo: verify!
+  }
+  /** 
+   * Get the input value
+   */
+  T getControl(){
+    return (Value::get() - offset) / scale + adjust;
+  }
+  void update(T x){
+    Value::update((x - adjust) * scale + offset);
+  }  
+  LinearValue<T, Value>& operator=(const T& x){
+    update(x);
     return *this;
   }
-  SmoothStiffValue<T>& operator+=(const T& other){
-    update(value+other);
+  LinearValue<T, Value>& operator+=(const T& other){
+    update(Value::get() + other);
     return *this;
   }
-  SmoothStiffValue<T>& operator-=(const T& other){
-    update(value-other);
+  LinearValue<T, Value>& operator-=(const T& other){
+    update(Value::get() - other);
     return *this;
   }
-  SmoothStiffValue<T>& operator*=(const T& other){
-    update(value*other);
+  LinearValue<T, Value>& operator*=(const T& other){
+    update(Value::get() * other);
     return *this;
   }
-  SmoothStiffValue<T>& operator/=(const T& other){
-    update(value/other);
+  LinearValue<T, Value>& operator/=(const T& other){
+    update(Value::get() / other);
     return *this;
   }
   operator T(){
-    return getValue();
+    return Value::get();
+  }
+};
+
+template class LinearValue<int>;
+template class LinearValue<float>;
+typedef LinearValue<float>  LinearFloat;
+typedef LinearValue<int>  LinearInt;
+typedef SmoothValue<float, LinearFloat> SmoothLinearFloat;
+typedef SmoothValue<int, LinearInt> SmoothLinearInt;
+
+/**
+ * Exponentially scaled value. Scales an input on the range [0, 1] exponentially to the range [min, max].
+ * Minimum may be less than maximum for inverted scale.
+ * Note that configured minimum and maximum values must be greater than 0.
+ *
+ * Ref: https://www.desmos.com/calculator/wehcvtggk7
+ */
+template<typename T, typename Value = SimpleValue<T>>
+class ExponentialValue : public Value {
+protected:
+  T c = Value::DEFAULT_EXP_C;
+  T k = Value::DEFAULT_EXP_K;
+public:
+  /** Default range scales [0, 1] to [0.5, 2] */
+  ExponentialValue() {}
+  ExponentialValue(T value): Value(value) {}
+  ExponentialValue(const ExponentialValue<T>& other): Value(other), c(other.c), k(other.k) {}
+  ExponentialValue(T minimum, T maximum, T init): Value(init) {
+    setRange(minimum, maximum);
+  }
+  void setRange(T minimum, T maximum){
+    ASSERT(minimum > 0 && maximum > 0, "Exponential min/max must be greater than 0");
+    c = minimum;
+    k = logf(maximum/minimum);
+  }
+  /**
+   * Get the input value
+   */
+  T getControl(){
+    return logf(Value::get()/c)/k;
+  }
+  void update(T x){
+    Value::update(c * expf(k * x));
+  }
+  operator T(){
+    return Value::get();
+  }  
+  ExponentialValue<T, Value>& operator=(const T& x){
+    update(x);
+    return *this;
+  }
+  ExponentialValue<T, Value>& operator+=(const T& other){
+    update(Value::get() + other);
+    return *this;
+  }
+  ExponentialValue<T, Value>& operator-=(const T& other){
+    update(Value::get() - other);
+    return *this;
+  }
+  ExponentialValue<T, Value>& operator*=(const T& other){
+    update(Value::get() * other);
+    return *this;
+  }
+  ExponentialValue<T, Value>& operator/=(const T& other){
+    update(Value::get() / other);
+    return *this;
+  }
+};
+
+template class ExponentialValue<int>;
+template class ExponentialValue<float>;
+typedef ExponentialValue<int>  ExponentialInt;
+typedef ExponentialValue<float>  ExponentialFloat;
+typedef SmoothValue<int, ExponentialInt> SmoothExponentialInt;
+typedef SmoothValue<float, ExponentialFloat> SmoothExponentialFloat;
+
+/**
+ * Logarithmically scaled value. Scales an input on the range [0, 1] logarithmically to the range [min, max].
+ * Minimum may be less than maximum for inverted scale.
+ * Note: coefficients scale exponentially with range and may explode!
+ *
+ * Ref: https://www.desmos.com/calculator/xljgqopbhy
+ */
+template<typename T, typename Value = SimpleValue<T>>
+class LogarithmicValue : public Value {
+protected:
+  T c = Value::DEFAULT_LOG_C;
+  T k = Value::DEFAULT_LOG_K;
+public:
+  /** Default range scales [0, 1] to [0.5, 2] */
+  LogarithmicValue() {}
+  LogarithmicValue(T value): Value(value) {}
+  LogarithmicValue(const LogarithmicValue<T>& other): Value(other), c(other.c), k(other.k) {}
+  LogarithmicValue(T a, T b, T init): Value(init) {
+    setRange(a, b);
+  }
+  void setRange(T a, T b){
+    c = expf(a);
+    k = expf(b) - c;
+  }
+  void update(T x){
+    Value::update(logf(k * x + c));
+  }
+  T getControl(){
+    return (expf(Value::get()) - c) / k;
+  }
+  /* value cast operator */
+  operator T(){
+    return Value::get();
+  }  
+  /* assignment operator */
+  LogarithmicValue<T, Value>& operator=(const T& x){
+    update(x);
+    return *this;
+  }
+  LogarithmicValue<T, Value>& operator+=(const T& other){
+    update(Value::get() + other);
+    return *this;
+  }
+  LogarithmicValue<T, Value>& operator-=(const T& other){
+    update(Value::get() - other);
+    return *this;
+  }
+  LogarithmicValue<T, Value>& operator*=(const T& other){
+    update(Value::get() * other);
+    return *this;
+  }
+  LogarithmicValue<T, Value>& operator/=(const T& other){
+    update(Value::get() / other);
+    return *this;
   }
 };
 
-typedef SmoothStiffValue<float> SmoothStiffFloat;
-typedef SmoothStiffValue<int> SmoothStiffInt;
+template class LogarithmicValue<float>;
+template class LogarithmicValue<int>;
+typedef LogarithmicValue<float> LogarithmicFloat;
+typedef LogarithmicValue<int> LogarithmicInt;
 
 #endif /* __SmoothValue_h__ */
diff --git a/LibSource/TakeoverValue.h b/LibSource/TakeoverValue.h
new file mode 100644
index 00000000..535aff29
--- /dev/null
+++ b/LibSource/TakeoverValue.h
@@ -0,0 +1,70 @@
+#ifndef __TakeoverValue_h__
+#define __TakeoverValue_h__
+
+#include "SimpleValue.h"
+
+/**
+ * TakeoverValue allows parameters to implement Takeover logic.
+ * Takeover logic, also known as 'Match' or 'Soft Takeover', allows for 
+ * controls to be multiplexed while avoiding sudden jumps in settings.
+ * Other common control modes are 'Relative' and 'Jump-to' or 'Skip'.
+ * 
+ * A TakeoverValue can be locked by calling `setLocked(true)`.
+ * Further updates are then prevented, until either the TakeoverValue
+ * is manually unlocked (i.e. with `setLocked(false)`), or the new value
+ * falls within a given threshold of the previously set value.
+ * 
+ */
+template<typename T, typename Value = SimpleValue<T>>
+class TakeoverValue : public Value {
+protected:
+  bool locked = false;
+  T threshold = Value::DEFAULT_DELTA;
+public:
+  TakeoverValue() {}
+  TakeoverValue(T value): Value(value) {}
+  TakeoverValue(const TakeoverValue<T>& other): Value(other), locked(other.locked), threshold(other.threshold) {}
+  TakeoverValue(T threshold, T init): Value(init), threshold(threshold) {}
+  void setLocked(bool value){
+    locked = value;
+  }
+  bool isLocked(){
+    return locked;
+  }
+  void update(T x){
+    if(locked && abs(Value::get() - x) <= threshold)
+      locked = false;
+    if(!locked)
+      Value::update(x);
+  }
+  operator T(){
+    return Value::get();
+  }  
+  TakeoverValue<T, Value>& operator=(const T& x){
+    update(x);
+    return *this;
+  }
+  TakeoverValue<T, Value>& operator+=(const T& other){
+    update(Value::get() + other);
+    return *this;
+  }
+  TakeoverValue<T, Value>& operator-=(const T& other){
+    update(Value::get() - other);
+    return *this;
+  }
+  TakeoverValue<T, Value>& operator*=(const T& other){
+    update(Value::get() * other);
+    return *this;
+  }
+  TakeoverValue<T, Value>& operator/=(const T& other){
+    update(Value::get() / other);
+    return *this;
+  }
+};
+
+template class TakeoverValue<int>;
+template class TakeoverValue<float>;
+typedef TakeoverValue<float>  TakeoverFloat;
+typedef TakeoverValue<int>  TakeoverInt;
+
+#endif /* __TakeoverValue_h__ */
diff --git a/LibSource/WavFile.h b/LibSource/WavFile.h
index 24f9ef52..8b42715e 100644
--- a/LibSource/WavFile.h
+++ b/LibSource/WavFile.h
@@ -48,6 +48,8 @@ class WavFile {
        strncmp(datachunk->id, "data", 4) ||
        datachunk->size == 0)
       return false;
+    if(getNumberOfChannels() == 0 || getNumberOfSamples() == 0)
+      return false;
     if(header->audio_format == 1 && header->bps == 8)
       return true; // 8-bit PCM
     if(header->audio_format == 1 && header->bps == 16)
diff --git a/LibSource/WavetableOscillator.cpp b/LibSource/WavetableOscillator.cpp
deleted file mode 100644
index 12a1169c..00000000
--- a/LibSource/WavetableOscillator.cpp
+++ /dev/null
@@ -1,81 +0,0 @@
-#include "WavetableOscillator.h"
-#include <stdint.h>
-
-WavetableOscillator::WavetableOscillator(float sr, const FloatArray wavetable):
-  mul(1.0f/sr),
-  wave(wavetable),
-  acc(0.0f), inc(0.1f)
-{}
- 
-void WavetableOscillator::setSampleRate(float sr){
-  mul = 1.0f/sr;
-}
-
-float WavetableOscillator::getSampleRate(){
-  return 1.0f/mul;
-}
-
-void WavetableOscillator::setFrequency(float freq){
-  inc = freq*mul;
-}
-
-float WavetableOscillator::getFrequency(){
-  return inc/mul;
-}
-
-float WavetableOscillator::getSample(float phase){
-  uint32_t size = wave.getSize();
-  uint32_t index = phase*(size-1);
-  index = min(index, size-1);
-  return wave[index];
-}
-
-void WavetableOscillator::setPhase(float phase){
-  acc = phase/(2*M_PI);
-}
-
-float WavetableOscillator::getPhase(){
-  return acc*2*M_PI;
-}
-
-float WavetableOscillator::generate(){
-  float s = getSample(acc);
-  acc += inc;
-  if(acc >= 1.0f)
-    acc -= 1.0f;
-  return s;
-}
-
-float WavetableOscillator::generate(float fm){
-  float s = getSample(acc);
-  acc += inc * (1 + fm);
-  if(acc > 1.0f)
-    acc -= 1.0f;
-  return s;
-}
-
-void WavetableOscillator::generate(FloatArray samples){
-  for(size_t i=0; i<samples.getSize();++i)
-    samples[i] = generate();
-}
-
-void WavetableOscillator::generate(FloatArray output, FloatArray fm){
-  for(size_t i=0; i<output.getSize(); ++i){
-    output[i] = getSample(acc);
-    acc += inc * (1 + fm[i]);
-    if(acc > 1.0f)
-      acc -= 1.0f;
-  }
-}
-
-WavetableOscillator* WavetableOscillator::create(float sr, size_t size) {
-  FloatArray wave = FloatArray::create(size);
-  for(size_t i=0; i<size; ++i)
-    wave[i] = sinf(2*M_PI*i/(size-1));    
-  return new WavetableOscillator(sr, wave);
-}
-
-void WavetableOscillator::destroy(WavetableOscillator* osc){
-  FloatArray::destroy(osc->wave);
-  delete osc;
-}
diff --git a/LibSource/WavetableOscillator.h b/LibSource/WavetableOscillator.h
index 639166a3..bf0ec0f6 100644
--- a/LibSource/WavetableOscillator.h
+++ b/LibSource/WavetableOscillator.h
@@ -1,33 +1,86 @@
 #ifndef __WavetableOscillator_h__
 #define __WavetableOscillator_h__
 
-#include "FloatArray.h"
 #include "Oscillator.h"
 
-class WavetableOscillator : public Oscillator {
+class WavetableOscillator : public OscillatorTemplate<WavetableOscillator> {
 private:
-  float mul;
   FloatArray wave;
-  float acc;
-  float inc;
 public:
-  WavetableOscillator(float sr, const FloatArray wavetable);
-  void setSampleRate(float sr);
-  float getSampleRate();
-  void setFrequency(float freq);
-  float getFrequency();
-  float getSample(float phase);
-  void setPhase(float phase);
-  void reset(){
-    setPhase(0);
-  }
-  float getPhase();
-  float generate();
-  float generate(float fm);
-  void generate(FloatArray samples);
-  void generate(FloatArray output, FloatArray fm);
-  static WavetableOscillator* create(float sr, size_t size);
-  static void destroy(WavetableOscillator* osc);
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  WavetableOscillator(){}
+  WavetableOscillator(float sr){
+    setSampleRate(sr);
+  }
+  WavetableOscillator(float sr, const FloatArray wavetable): wave(wavetable) {
+    setSampleRate(sr);
+  }
+  FloatArray getWavetable(){
+    return wave;
+  }    
+  float getSample(){
+    size_t index = phase*wave.getSize();
+    // index = min(index, size-1);
+    return wave[index];
+  }
+};
+
+
+class AntialiasedWavetableOscillator : public OscillatorTemplate<AntialiasedWavetableOscillator> {
+private:
+  FloatArray wave;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  AntialiasedWavetableOscillator(){}
+  AntialiasedWavetableOscillator(float sr){
+    setSampleRate(sr);
+  }  
+  AntialiasedWavetableOscillator(float sr, FloatArray wave):wave(wave){
+    setSampleRate(sr);
+  }  
+  float getSample(){
+    size_t index = phase*wave.getSize();
+    float sample = wave[index];
+    sample -= polyblep(phase, incr);
+    return sample;
+  }
+  using OscillatorTemplate<AntialiasedWavetableOscillator>::generate;  
+};
+
+template<InterpolationMethod im = LINEAR_INTERPOLATION>
+class InterpolatingWavetableOscillator : public OscillatorTemplate<InterpolatingWavetableOscillator<im>> {
+private:
+  InterpolatingCircularFloatBuffer<im> wave = NULL;
+public:
+  static constexpr float begin_phase = 0;
+  static constexpr float end_phase = 1;
+  InterpolatingWavetableOscillator(){}
+  InterpolatingWavetableOscillator(float sr){
+    OscillatorTemplate<InterpolatingWavetableOscillator<im>>::setSampleRate(sr);
+  }
+  InterpolatingWavetableOscillator(float sr, FloatArray data)
+    : wave(data.getData(), data.getSize()) {
+    OscillatorTemplate<InterpolatingWavetableOscillator<im>>::setSampleRate(sr);
+  }
+  FloatArray getWavetable(){
+    return FloatArray(wave.getData(), wave.getSize());
+  }
+  void setWavetable(FloatArray wavetable){
+    wave.setData(wavetable.getData(), wavetable.getSize());
+  }
+  float getSample(){
+    float index = OscillatorTemplate<InterpolatingWavetableOscillator<im>>::phase * wave.getSize();
+    return wave.readAt(index);
+  }
+  static InterpolatingWavetableOscillator<im>* create(float sr, size_t length){
+    return new InterpolatingWavetableOscillator<im>(sr, FloatArray::create(length));
+  }
+  static void destroy(InterpolatingWavetableOscillator<im>* obj){
+    FloatArray::destroy(obj->getWavetable());
+    delete obj;
+  }
 };
 
 #endif /* __WavetableOscillator_h__ */
diff --git a/LibSource/Window.h b/LibSource/Window.h
index f0f6d7de..3e0578c8 100644
--- a/LibSource/Window.h
+++ b/LibSource/Window.h
@@ -26,7 +26,9 @@ class Window : public FloatArray, SignalProcessor {
     HannWindow,
     HanningWindow,
     TriangularWindow,
-    RectangularWindow // no window
+    RectangularWindow,
+    WelchWindow,
+    SineWindow
   } WindowType;
   Window(){}
   Window(float* win, int size) : FloatArray(win, size) {}
@@ -63,6 +65,12 @@ class Window : public FloatArray, SignalProcessor {
     case HammingWindow:
       hamming(window, size);
       break;
+    case WelchWindow:
+      welch(window, size);
+      break;
+    case SineWindow:
+      sine(window, size);
+      break;
     case TriangularWindow:
       triangular(window, size);
       break;
@@ -84,6 +92,17 @@ class Window : public FloatArray, SignalProcessor {
     for(int n=0; n<size; n++)
       window[n] = 0.54-0.46*cosf((float)n/(size-1)*2*M_PI);
   }
+  static void welch(float *window, int size){
+    for(int n=0; n<size; n++){
+      float x = (n - size/2)/(size/2);
+      window[n] = 1 - x*x;
+    }
+  }
+  static void sine(float *window, int size){
+    for(int n=0; n<size; n++){
+      window[n] = sinf((M_PI*n)/size);
+    }
+  }
   static void triangular(float *window, int size){
     float rampStep = 1/(size/2.0f);
     float ramp = 0;
diff --git a/Libraries/CMSIS/Core/Include/cachel1_armv7.h b/Libraries/CMSIS/Core/Include/cachel1_armv7.h
new file mode 100644
index 00000000..abebc95f
--- /dev/null
+++ b/Libraries/CMSIS/Core/Include/cachel1_armv7.h
@@ -0,0 +1,411 @@
+/******************************************************************************
+ * @file     cachel1_armv7.h
+ * @brief    CMSIS Level 1 Cache API for Armv7-M and later
+ * @version  V1.0.1
+ * @date     19. April 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header    /* treat file as system include file */
+#endif
+
+#ifndef ARM_CACHEL1_ARMV7_H
+#define ARM_CACHEL1_ARMV7_H
+
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_CacheFunctions Cache Functions
+  \brief    Functions that configure Instruction and Data cache.
+  @{
+ */
+
+/* Cache Size ID Register Macros */
+#define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
+#define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
+
+#ifndef __SCB_DCACHE_LINE_SIZE
+#define __SCB_DCACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
+#endif
+
+#ifndef __SCB_ICACHE_LINE_SIZE
+#define __SCB_ICACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
+#endif
+
+/**
+  \brief   Enable I-Cache
+  \details Turns on I-Cache
+  */
+__STATIC_FORCEINLINE void SCB_EnableICache (void)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
+
+    __DSB();
+    __ISB();
+    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
+    __DSB();
+    __ISB();
+    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Disable I-Cache
+  \details Turns off I-Cache
+  */
+__STATIC_FORCEINLINE void SCB_DisableICache (void)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    __DSB();
+    __ISB();
+    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  /* disable I-Cache */
+    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Invalidate I-Cache
+  \details Invalidates I-Cache
+  */
+__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    __DSB();
+    __ISB();
+    SCB->ICIALLU = 0UL;
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   I-Cache Invalidate by address
+  \details Invalidates I-Cache for the given address.
+           I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           I-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
+  \param[in]   isize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if ( isize > 0 ) {
+       int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->ICIMVAU = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_ICACHE_LINE_SIZE;
+        op_size -= __SCB_ICACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
+  \brief   Enable D-Cache
+  \details Turns on D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_EnableDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+    __DSB();
+
+    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Disable D-Cache
+  \details Turns off D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_DisableDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean & invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Invalidate D-Cache
+  \details Invalidates D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Clean D-Cache
+  \details Cleans D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_CleanDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
+                      ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Clean & Invalidate D-Cache
+  \details Cleans and Invalidates D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean & invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   D-Cache Invalidate by address
+  \details Invalidates D-Cache for the given address.
+           D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
+  \param[in]   dsize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) {
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
+  \brief   D-Cache Clean by address
+  \details Cleans D-Cache for the given address
+           D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned.
+  \param[in]   addr    address
+  \param[in]   dsize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) {
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->DCCMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
+  \brief   D-Cache Clean and Invalidate by address
+  \details Cleans and invalidates D_Cache for the given address
+           D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
+  \param[in]   addr    address (aligned to 32-byte boundary)
+  \param[in]   dsize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) {
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->DCCIMVAC = op_addr;            /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr +=          __SCB_DCACHE_LINE_SIZE;
+        op_size -=          __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+/*@} end of CMSIS_Core_CacheFunctions */
+
+#endif /* ARM_CACHEL1_ARMV7_H */
diff --git a/Libraries/CMSIS/Include/cmsis_armcc.h b/Libraries/CMSIS/Core/Include/cmsis_armcc.h
similarity index 93%
rename from Libraries/CMSIS/Include/cmsis_armcc.h
rename to Libraries/CMSIS/Core/Include/cmsis_armcc.h
index da9d654e..a955d471 100644
--- a/Libraries/CMSIS/Include/cmsis_armcc.h
+++ b/Libraries/CMSIS/Core/Include/cmsis_armcc.h
@@ -1,894 +1,888 @@
-/**************************************************************************//**
- * @file     cmsis_armcc.h
- * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
- * @version  V5.1.0
- * @date     08. May 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_ARMCC_H
-#define __CMSIS_ARMCC_H
-
-
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
-  #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* CMSIS compiler control architecture macros */
-#if ((defined (__TARGET_ARCH_6_M  ) && (__TARGET_ARCH_6_M   == 1)) || \
-     (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M  == 1))   )
-  #define __ARM_ARCH_6M__           1
-#endif
-
-#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M  == 1))
-  #define __ARM_ARCH_7M__           1
-#endif
-
-#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
-  #define __ARM_ARCH_7EM__          1
-#endif
-
-  /* __ARM_ARCH_8M_BASE__  not applicable */
-  /* __ARM_ARCH_8M_MAIN__  not applicable */
-
-/* CMSIS compiler control DSP macros */
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-  #define __ARM_FEATURE_DSP         1
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
-#endif
-#ifndef   __STATIC_FORCEINLINE                 
-  #define __STATIC_FORCEINLINE                   static __forceinline
-#endif           
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __declspec(noreturn)
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        __packed struct
-#endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         __packed union
-#endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
-#endif
-#ifndef   __COMPILER_BARRIER
-  #define __COMPILER_BARRIER()                   __memory_changed()
-#endif
-
-/* #########################  Startup and Lowlevel Init  ######################## */
-
-#ifndef __PROGRAM_START
-#define __PROGRAM_START           __main
-#endif
-
-#ifndef __INITIAL_SP
-#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
-#endif
-
-#ifndef __STACK_LIMIT
-#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
-#endif
-
-#ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __Vectors
-#endif
-
-#ifndef __VECTOR_TABLE_ATTRIBUTE
-#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
-#endif
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __enable_irq();     */
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __disable_irq();    */
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  register uint32_t __regControl         __ASM("control");
-  return(__regControl);
-}
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  register uint32_t __regControl         __ASM("control");
-  __regControl = control;
-}
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  register uint32_t __regIPSR          __ASM("ipsr");
-  return(__regIPSR);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
-  register uint32_t __regAPSR          __ASM("apsr");
-  return(__regAPSR);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  register uint32_t __regXPSR          __ASM("xpsr");
-  return(__regXPSR);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  return(__regProcessStackPointer);
-}
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  __regProcessStackPointer = topOfProcStack;
-}
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  return(__regMainStackPointer);
-}
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  __regMainStackPointer = topOfMainStack;
-}
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  return(__regPriMask);
-}
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  __regPriMask = (priMask);
-}
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  return(__regBasePri);
-}
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  __regBasePri = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  register uint32_t __regBasePriMax      __ASM("basepri_max");
-  __regBasePriMax = (basePri & 0xFFU);
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  return(__regFaultMask);
-}
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  __regFaultMask = (faultMask & (uint32_t)1U);
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
-#else
-   return(0U);
-#endif
-}
-
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
-#else
-  (void)fpscr;
-#endif
-}
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP                             __nop
-
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI                             __wfi
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE                             __wfe
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV                             __sev
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-#define __ISB() do {\
-                   __schedule_barrier();\
-                   __isb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB() do {\
-                   __schedule_barrier();\
-                   __dsb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-#define __DMB() do {\
-                   __schedule_barrier();\
-                   __dmb(0xF);\
-                   __schedule_barrier();\
-                } while (0U)
-
-                  
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV                             __rev
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
-{
-  rev16 r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
-{
-  revsh r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-#define __ROR                             __ror
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __breakpoint(value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-  #define __RBIT                          __rbit
-#else
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value != 0U; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-  return result;
-}
-#endif
-
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-#define __CLZ                             __clz
-
-
-#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
-#else
-  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
-#else
-  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
-#else
-  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
-  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
-#else
-  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
-#endif
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX                           __clrex
-
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT                            __ssat
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT                            __usat
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-#ifndef __NO_EMBEDDED_ASM
-__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
-{
-  rrx r0, r0
-  bx lr
-}
-#endif
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRBT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRHT(value, ptr)               __strt(value, ptr)
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-#define __STRT(value, ptr)                __strt(value, ptr)
-
-#else  /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
-    }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
-}
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
-    }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
-           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
-
-#define __SADD8                           __sadd8
-#define __QADD8                           __qadd8
-#define __SHADD8                          __shadd8
-#define __UADD8                           __uadd8
-#define __UQADD8                          __uqadd8
-#define __UHADD8                          __uhadd8
-#define __SSUB8                           __ssub8
-#define __QSUB8                           __qsub8
-#define __SHSUB8                          __shsub8
-#define __USUB8                           __usub8
-#define __UQSUB8                          __uqsub8
-#define __UHSUB8                          __uhsub8
-#define __SADD16                          __sadd16
-#define __QADD16                          __qadd16
-#define __SHADD16                         __shadd16
-#define __UADD16                          __uadd16
-#define __UQADD16                         __uqadd16
-#define __UHADD16                         __uhadd16
-#define __SSUB16                          __ssub16
-#define __QSUB16                          __qsub16
-#define __SHSUB16                         __shsub16
-#define __USUB16                          __usub16
-#define __UQSUB16                         __uqsub16
-#define __UHSUB16                         __uhsub16
-#define __SASX                            __sasx
-#define __QASX                            __qasx
-#define __SHASX                           __shasx
-#define __UASX                            __uasx
-#define __UQASX                           __uqasx
-#define __UHASX                           __uhasx
-#define __SSAX                            __ssax
-#define __QSAX                            __qsax
-#define __SHSAX                           __shsax
-#define __USAX                            __usax
-#define __UQSAX                           __uqsax
-#define __UHSAX                           __uhsax
-#define __USAD8                           __usad8
-#define __USADA8                          __usada8
-#define __SSAT16                          __ssat16
-#define __USAT16                          __usat16
-#define __UXTB16                          __uxtb16
-#define __UXTAB16                         __uxtab16
-#define __SXTB16                          __sxtb16
-#define __SXTAB16                         __sxtab16
-#define __SMUAD                           __smuad
-#define __SMUADX                          __smuadx
-#define __SMLAD                           __smlad
-#define __SMLADX                          __smladx
-#define __SMLALD                          __smlald
-#define __SMLALDX                         __smlaldx
-#define __SMUSD                           __smusd
-#define __SMUSDX                          __smusdx
-#define __SMLSD                           __smlsd
-#define __SMLSDX                          __smlsdx
-#define __SMLSLD                          __smlsld
-#define __SMLSLDX                         __smlsldx
-#define __SEL                             __sel
-#define __QADD                            __qadd
-#define __QSUB                            __qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
-                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))
-
-#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCC_H */
+/**************************************************************************//**
+ * @file     cmsis_armcc.h
+ * @brief    CMSIS compiler ARMCC (Arm Compiler 5) header file
+ * @version  V5.3.2
+ * @date     27. May 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_ARMCC_H
+#define __CMSIS_ARMCC_H
+
+
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 400677)
+  #error "Please use Arm Compiler Toolchain V4.0.677 or later!"
+#endif
+
+/* CMSIS compiler control architecture macros */
+#if ((defined (__TARGET_ARCH_6_M  ) && (__TARGET_ARCH_6_M   == 1)) || \
+     (defined (__TARGET_ARCH_6S_M ) && (__TARGET_ARCH_6S_M  == 1))   )
+  #define __ARM_ARCH_6M__           1
+#endif
+
+#if (defined (__TARGET_ARCH_7_M ) && (__TARGET_ARCH_7_M  == 1))
+  #define __ARM_ARCH_7M__           1
+#endif
+
+#if (defined (__TARGET_ARCH_7E_M) && (__TARGET_ARCH_7E_M == 1))
+  #define __ARM_ARCH_7EM__          1
+#endif
+
+  /* __ARM_ARCH_8M_BASE__  not applicable */
+  /* __ARM_ARCH_8M_MAIN__  not applicable */
+  /* __ARM_ARCH_8_1M_MAIN__  not applicable */
+
+/* CMSIS compiler control DSP macros */
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+  #define __ARM_FEATURE_DSP         1
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   static __forceinline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __declspec(noreturn)
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        __packed struct
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         __packed union
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #define __UNALIGNED_UINT32(x)                  (*((__packed uint32_t *)(x)))
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    ((*((__packed uint16_t *)(addr))) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #define __UNALIGNED_UINT16_READ(addr)          (*((const __packed uint16_t *)(addr)))
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    ((*((__packed uint32_t *)(addr))) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #define __UNALIGNED_UINT32_READ(addr)          (*((const __packed uint32_t *)(addr)))
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __memory_changed()
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section("RESET")))
+#endif
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP                             __nop
+
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI                             __wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE                             __wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV                             __sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB()                           __isb(0xF)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()                           __dsb(0xF)
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB()                           __dmb(0xF)
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV                             __rev
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rev16_text"))) __STATIC_INLINE __ASM uint32_t __REV16(uint32_t value)
+{
+  rev16 r0, r0
+  bx lr
+}
+#endif
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".revsh_text"))) __STATIC_INLINE __ASM int16_t __REVSH(int16_t value)
+{
+  revsh r0, r0
+  bx lr
+}
+#endif
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+#define __ROR                             __ror
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __breakpoint(value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+  #define __RBIT                          __rbit
+#else
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result;
+  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
+
+  result = value;                      /* r will be reversed bits of v; first get LSB of v */
+  for (value >>= 1U; value != 0U; value >>= 1U)
+  {
+    result <<= 1U;
+    result |= value & 1U;
+    s--;
+  }
+  result <<= s;                        /* shift when v's highest bits are zero */
+  return result;
+}
+#endif
+
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+#define __CLZ                             __clz
+
+
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __LDREXB(ptr)                                                        ((uint8_t ) __ldrex(ptr))
+#else
+  #define __LDREXB(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint8_t ) __ldrex(ptr))  _Pragma("pop")
+#endif
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __LDREXH(ptr)                                                        ((uint16_t) __ldrex(ptr))
+#else
+  #define __LDREXH(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint16_t) __ldrex(ptr))  _Pragma("pop")
+#endif
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __LDREXW(ptr)                                                        ((uint32_t ) __ldrex(ptr))
+#else
+  #define __LDREXW(ptr)          _Pragma("push") _Pragma("diag_suppress 3731") ((uint32_t ) __ldrex(ptr))  _Pragma("pop")
+#endif
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __STREXB(value, ptr)                                                 __strex(value, ptr)
+#else
+  #define __STREXB(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#endif
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __STREXH(value, ptr)                                                 __strex(value, ptr)
+#else
+  #define __STREXH(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#endif
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#if defined(__ARMCC_VERSION) && (__ARMCC_VERSION < 5060020)
+  #define __STREXW(value, ptr)                                                 __strex(value, ptr)
+#else
+  #define __STREXW(value, ptr)   _Pragma("push") _Pragma("diag_suppress 3731") __strex(value, ptr)        _Pragma("pop")
+#endif
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX                           __clrex
+
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT                            __ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT                            __usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+#ifndef __NO_EMBEDDED_ASM
+__attribute__((section(".rrx_text"))) __STATIC_INLINE __ASM uint32_t __RRX(uint32_t value)
+{
+  rrx r0, r0
+  bx lr
+}
+#endif
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDRBT(ptr)                      ((uint8_t )  __ldrt(ptr))
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDRHT(ptr)                      ((uint16_t)  __ldrt(ptr))
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDRT(ptr)                       ((uint32_t ) __ldrt(ptr))
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+#define __STRBT(value, ptr)               __strt(value, ptr)
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+#define __STRHT(value, ptr)               __strt(value, ptr)
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+#define __STRT(value, ptr)                __strt(value, ptr)
+
+#else  /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __enable_irq();     */
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+/* intrinsic void __disable_irq();    */
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_INLINE uint32_t __get_CONTROL(void)
+{
+  register uint32_t __regControl         __ASM("control");
+  return(__regControl);
+}
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_INLINE void __set_CONTROL(uint32_t control)
+{
+  register uint32_t __regControl         __ASM("control");
+  __regControl = control;
+  __ISB();
+}
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_IPSR(void)
+{
+  register uint32_t __regIPSR          __ASM("ipsr");
+  return(__regIPSR);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_INLINE uint32_t __get_APSR(void)
+{
+  register uint32_t __regAPSR          __ASM("apsr");
+  return(__regAPSR);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_INLINE uint32_t __get_xPSR(void)
+{
+  register uint32_t __regXPSR          __ASM("xpsr");
+  return(__regXPSR);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_INLINE uint32_t __get_PSP(void)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  return(__regProcessStackPointer);
+}
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  register uint32_t __regProcessStackPointer  __ASM("psp");
+  __regProcessStackPointer = topOfProcStack;
+}
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_INLINE uint32_t __get_MSP(void)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  return(__regMainStackPointer);
+}
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  register uint32_t __regMainStackPointer     __ASM("msp");
+  __regMainStackPointer = topOfMainStack;
+}
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_INLINE uint32_t __get_PRIMASK(void)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  return(__regPriMask);
+}
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
+{
+  register uint32_t __regPriMask         __ASM("primask");
+  __regPriMask = (priMask);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+     (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+#define __enable_fault_irq                __enable_fiq
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+#define __disable_fault_irq               __disable_fiq
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_INLINE uint32_t  __get_BASEPRI(void)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  return(__regBasePri);
+}
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
+{
+  register uint32_t __regBasePri         __ASM("basepri");
+  __regBasePri = (basePri & 0xFFU);
+}
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  register uint32_t __regBasePriMax      __ASM("basepri_max");
+  __regBasePriMax = (basePri & 0xFFU);
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_INLINE uint32_t __get_FAULTMASK(void)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  return(__regFaultMask);
+}
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  register uint32_t __regFaultMask       __ASM("faultmask");
+  __regFaultMask = (faultMask & (uint32_t)1U);
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__  == 1)) || \
+           (defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+__STATIC_INLINE uint32_t __get_FPSCR(void)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+  register uint32_t __regfpscr         __ASM("fpscr");
+  return(__regfpscr);
+#else
+   return(0U);
+#endif
+}
+
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+  register uint32_t __regfpscr         __ASM("fpscr");
+  __regfpscr = (fpscr);
+#else
+  (void)fpscr;
+#endif
+}
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     )
+
+#define __SADD8                           __sadd8
+#define __QADD8                           __qadd8
+#define __SHADD8                          __shadd8
+#define __UADD8                           __uadd8
+#define __UQADD8                          __uqadd8
+#define __UHADD8                          __uhadd8
+#define __SSUB8                           __ssub8
+#define __QSUB8                           __qsub8
+#define __SHSUB8                          __shsub8
+#define __USUB8                           __usub8
+#define __UQSUB8                          __uqsub8
+#define __UHSUB8                          __uhsub8
+#define __SADD16                          __sadd16
+#define __QADD16                          __qadd16
+#define __SHADD16                         __shadd16
+#define __UADD16                          __uadd16
+#define __UQADD16                         __uqadd16
+#define __UHADD16                         __uhadd16
+#define __SSUB16                          __ssub16
+#define __QSUB16                          __qsub16
+#define __SHSUB16                         __shsub16
+#define __USUB16                          __usub16
+#define __UQSUB16                         __uqsub16
+#define __UHSUB16                         __uhsub16
+#define __SASX                            __sasx
+#define __QASX                            __qasx
+#define __SHASX                           __shasx
+#define __UASX                            __uasx
+#define __UQASX                           __uqasx
+#define __UHASX                           __uhasx
+#define __SSAX                            __ssax
+#define __QSAX                            __qsax
+#define __SHSAX                           __shsax
+#define __USAX                            __usax
+#define __UQSAX                           __uqsax
+#define __UHSAX                           __uhsax
+#define __USAD8                           __usad8
+#define __USADA8                          __usada8
+#define __SSAT16                          __ssat16
+#define __USAT16                          __usat16
+#define __UXTB16                          __uxtb16
+#define __UXTAB16                         __uxtab16
+#define __SXTB16                          __sxtb16
+#define __SXTAB16                         __sxtab16
+#define __SMUAD                           __smuad
+#define __SMUADX                          __smuadx
+#define __SMLAD                           __smlad
+#define __SMLADX                          __smladx
+#define __SMLALD                          __smlald
+#define __SMLALDX                         __smlaldx
+#define __SMUSD                           __smusd
+#define __SMUSDX                          __smusdx
+#define __SMLSD                           __smlsd
+#define __SMLSDX                          __smlsdx
+#define __SMLSLD                          __smlsld
+#define __SMLSLDX                         __smlsldx
+#define __SEL                             __sel
+#define __QADD                            __qadd
+#define __QSUB                            __qsub
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+#define __SMMLA(ARG1,ARG2,ARG3)          ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
+                                                      ((int64_t)(ARG3) << 32U)     ) >> 32U))
+
+#define __SXTB16_RORn(ARG1, ARG2)        __SXTB16(__ROR(ARG1, ARG2))
+
+#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3))
+
+#endif /* ((defined (__ARM_ARCH_7EM__) && (__ARM_ARCH_7EM__ == 1))     ) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCC_H */
diff --git a/Libraries/CMSIS/Include/cmsis_armclang.h b/Libraries/CMSIS/Core/Include/cmsis_armclang.h
similarity index 86%
rename from Libraries/CMSIS/Include/cmsis_armclang.h
rename to Libraries/CMSIS/Core/Include/cmsis_armclang.h
index 478f75bb..69114177 100644
--- a/Libraries/CMSIS/Include/cmsis_armclang.h
+++ b/Libraries/CMSIS/Core/Include/cmsis_armclang.h
@@ -1,1444 +1,1503 @@
-/**************************************************************************//**
- * @file     cmsis_armclang.h
- * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V5.2.0
- * @date     08. May 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
-
-#ifndef __CMSIS_ARMCLANG_H
-#define __CMSIS_ARMCLANG_H
-
-#pragma clang system_header   /* treat file as system include file */
-
-#ifndef __ARM_COMPAT_H
-#include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
-#endif
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
-#endif
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __attribute__((__noreturn__))
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
-  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
-  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
-  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
-  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
-  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
-#endif
-#ifndef   __COMPILER_BARRIER
-  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
-#endif
-
-/* #########################  Startup and Lowlevel Init  ######################## */
-
-#ifndef __PROGRAM_START
-#define __PROGRAM_START           __main
-#endif
-
-#ifndef __INITIAL_SP
-#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
-#endif
-
-#ifndef __STACK_LIMIT
-#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
-#endif
-
-#ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __Vectors
-#endif
-
-#ifndef __VECTOR_TABLE_ATTRIBUTE
-#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
-#endif
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __enable_irq();  see arm_compat.h */
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __disable_irq();  see arm_compat.h */
-
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Control Register (non-secure)
-  \details Returns the content of the non-secure Control Register when in secure mode.
-  \return               non-secure Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
-{
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Control Register (non-secure)
-  \details Writes the given value to the non-secure Control Register when in secure state.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
-{
-  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_APSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSP(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Process Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
-  \return               PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSP(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, msp" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Main Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
-  \return               MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Main Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
-}
-#endif
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
-  \return               SP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
-  \param [in]    topOfStack  Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
-{
-  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
-}
-#endif
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Priority Mask (non-secure)
-  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
-  \return               Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Priority Mask (non-secure)
-  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
-}
-#endif
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Base Priority (non-secure)
-  \details Returns the current value of the non-secure Base Priority register when in secure state.
-  \return               Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Base Priority (non-secure)
-  \details Assigns the given value to the non-secure Base Priority register when in secure state.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Fault Mask (non-secure)
-  \details Returns the current value of the non-secure Fault Mask register when in secure state.
-  \return               Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Fault Mask (non-secure)
-  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-/**
-  \brief   Get Process Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always in non-secure
-  mode.
-  
-  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
-  \return               PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
-  return result;
-#endif
-}
-
-#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Process Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always in non-secure
-  mode.
-
-  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \return               PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
-  return result;
-#endif
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored in non-secure
-  mode.
-  
-  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
-#else
-  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored in non-secure
-  mode.
-
-  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
-#else
-  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
-#endif
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always.
-
-  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
-  \return               MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
-  return result;
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Get Main Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always.
-
-  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
-  \return               MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
-  return result;
-#endif
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored.
-
-  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
-  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
-#else
-  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Set Main Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored.
-
-  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
-  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
-#else
-  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
-#else
-#define __get_FPSCR()      ((uint32_t)0U)
-#endif
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#define __set_FPSCR      __builtin_arm_set_fpscr
-#else
-#define __set_FPSCR(x)      ((void)(x))
-#endif
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_RW_REG(r) "+l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_RW_REG(r) "+r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP          __builtin_arm_nop
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI          __builtin_arm_wfi
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE          __builtin_arm_wfe
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV          __builtin_arm_sev
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-#define __ISB()        __builtin_arm_isb(0xF)
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB()        __builtin_arm_dsb(0xF)
-
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-#define __DMB()        __builtin_arm_dmb(0xF)
-
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV(value)   __builtin_bswap32(value)
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV16(value) __ROR(__REV(value), 16)
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REVSH(value) (int16_t)__builtin_bswap16(value)
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  op2 %= 32U;
-  if (op2 == 0U)
-  {
-    return op1;
-  }
-  return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)     __ASM volatile ("bkpt "#value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __RBIT            __builtin_arm_rbit
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
-{
-  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
-     __builtin_clz(0) is undefined behaviour, so handle this case specially.
-     This guarantees ARM-compatible results if happening to compile on a non-ARM
-     target, and ensures the compiler doesn't decide to activate any
-     optimisations using the logic "value was passed to __builtin_clz, so it
-     is non-zero".
-     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
-     single CLZ instruction.
-   */
-  if (value == 0U)
-  {
-    return 32U;
-  }
-  return __builtin_clz(value);
-}
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDREXB        (uint8_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDREXH        (uint16_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDREXW        (uint32_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXB        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXH        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXW        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX             __builtin_arm_clrex
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT             __builtin_arm_ssat
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT             __builtin_arm_usat
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return(result);
-}
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
-{
-  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
-{
-  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
-{
-  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
-}
-
-#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
-    }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
-}
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
-    }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-/**
-  \brief   Load-Acquire (8 bit)
-  \details Executes a LDAB instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint8_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (16 bit)
-  \details Executes a LDAH instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint16_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (32 bit)
-  \details Executes a LDA instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return(result);
-}
-
-
-/**
-  \brief   Store-Release (8 bit)
-  \details Executes a STLB instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
-{
-  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (16 bit)
-  \details Executes a STLH instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
-{
-  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (32 bit)
-  \details Executes a STL instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
-{
-  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Load-Acquire Exclusive (8 bit)
-  \details Executes a LDAB exclusive instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Load-Acquire Exclusive (16 bit)
-  \details Executes a LDAH exclusive instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Load-Acquire Exclusive (32 bit)
-  \details Executes a LDA exclusive instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Store-Release Exclusive (8 bit)
-  \details Executes a STLB exclusive instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
-
-
-/**
-  \brief   Store-Release Exclusive (16 bit)
-  \details Executes a STLH exclusive instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
-
-
-/**
-  \brief   Store-Release Exclusive (32 bit)
-  \details Executes a STL exclusive instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEX                  (uint32_t)__builtin_arm_stlex
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
-
-#define     __SADD8                 __builtin_arm_sadd8
-#define     __QADD8                 __builtin_arm_qadd8
-#define     __SHADD8                __builtin_arm_shadd8
-#define     __UADD8                 __builtin_arm_uadd8
-#define     __UQADD8                __builtin_arm_uqadd8
-#define     __UHADD8                __builtin_arm_uhadd8
-#define     __SSUB8                 __builtin_arm_ssub8
-#define     __QSUB8                 __builtin_arm_qsub8
-#define     __SHSUB8                __builtin_arm_shsub8
-#define     __USUB8                 __builtin_arm_usub8
-#define     __UQSUB8                __builtin_arm_uqsub8
-#define     __UHSUB8                __builtin_arm_uhsub8
-#define     __SADD16                __builtin_arm_sadd16
-#define     __QADD16                __builtin_arm_qadd16
-#define     __SHADD16               __builtin_arm_shadd16
-#define     __UADD16                __builtin_arm_uadd16
-#define     __UQADD16               __builtin_arm_uqadd16
-#define     __UHADD16               __builtin_arm_uhadd16
-#define     __SSUB16                __builtin_arm_ssub16
-#define     __QSUB16                __builtin_arm_qsub16
-#define     __SHSUB16               __builtin_arm_shsub16
-#define     __USUB16                __builtin_arm_usub16
-#define     __UQSUB16               __builtin_arm_uqsub16
-#define     __UHSUB16               __builtin_arm_uhsub16
-#define     __SASX                  __builtin_arm_sasx
-#define     __QASX                  __builtin_arm_qasx
-#define     __SHASX                 __builtin_arm_shasx
-#define     __UASX                  __builtin_arm_uasx
-#define     __UQASX                 __builtin_arm_uqasx
-#define     __UHASX                 __builtin_arm_uhasx
-#define     __SSAX                  __builtin_arm_ssax
-#define     __QSAX                  __builtin_arm_qsax
-#define     __SHSAX                 __builtin_arm_shsax
-#define     __USAX                  __builtin_arm_usax
-#define     __UQSAX                 __builtin_arm_uqsax
-#define     __UHSAX                 __builtin_arm_uhsax
-#define     __USAD8                 __builtin_arm_usad8
-#define     __USADA8                __builtin_arm_usada8
-#define     __SSAT16                __builtin_arm_ssat16
-#define     __USAT16                __builtin_arm_usat16
-#define     __UXTB16                __builtin_arm_uxtb16
-#define     __UXTAB16               __builtin_arm_uxtab16
-#define     __SXTB16                __builtin_arm_sxtb16
-#define     __SXTAB16               __builtin_arm_sxtab16
-#define     __SMUAD                 __builtin_arm_smuad
-#define     __SMUADX                __builtin_arm_smuadx
-#define     __SMLAD                 __builtin_arm_smlad
-#define     __SMLADX                __builtin_arm_smladx
-#define     __SMLALD                __builtin_arm_smlald
-#define     __SMLALDX               __builtin_arm_smlaldx
-#define     __SMUSD                 __builtin_arm_smusd
-#define     __SMUSDX                __builtin_arm_smusdx
-#define     __SMLSD                 __builtin_arm_smlsd
-#define     __SMLSDX                __builtin_arm_smlsdx
-#define     __SMLSLD                __builtin_arm_smlsld
-#define     __SMLSLDX               __builtin_arm_smlsldx
-#define     __SEL                   __builtin_arm_sel
-#define     __QADD                  __builtin_arm_qadd
-#define     __QSUB                  __builtin_arm_qsub
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
-  int32_t result;
-
-  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#endif /* (__ARM_FEATURE_DSP == 1) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCLANG_H */
+/**************************************************************************//**
+ * @file     cmsis_armclang.h
+ * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
+ * @version  V5.4.3
+ * @date     27. May 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
+
+#ifndef __CMSIS_ARMCLANG_H
+#define __CMSIS_ARMCLANG_H
+
+#pragma clang system_header   /* treat file as system include file */
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section("RESET")))
+#endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#ifndef __STACK_SEAL
+#define __STACK_SEAL              Image$$STACKSEAL$$ZI$$Base
+#endif
+
+#ifndef __TZ_STACK_SEAL_SIZE
+#define __TZ_STACK_SEAL_SIZE      8U
+#endif
+
+#ifndef __TZ_STACK_SEAL_VALUE
+#define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
+#endif
+
+
+__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
+  *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
+}
+#endif
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_RW_REG(r) "+l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_RW_REG(r) "+r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP          __builtin_arm_nop
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI          __builtin_arm_wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE          __builtin_arm_wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV          __builtin_arm_sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB()        __builtin_arm_isb(0xF)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()        __builtin_arm_dsb(0xF)
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB()        __builtin_arm_dmb(0xF)
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV(value)   __builtin_bswap32(value)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV16(value) __ROR(__REV(value), 16)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REVSH(value) (int16_t)__builtin_bswap16(value)
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)     __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __RBIT            __builtin_arm_rbit
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__       ) && (__ARM_ARCH_7M__        == 1)) || \
+     (defined (__ARM_ARCH_7EM__      ) && (__ARM_ARCH_7EM__       == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__  ) && (__ARM_ARCH_8M_BASE__   == 1)) || \
+     (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     )
+
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB        (uint8_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH        (uint16_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW        (uint32_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXB        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXH        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXW        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX             __builtin_arm_clrex
+
+#endif /* ((defined (__ARM_ARCH_7M__       ) && (__ARM_ARCH_7M__        == 1)) || \
+           (defined (__ARM_ARCH_7EM__      ) && (__ARM_ARCH_7EM__       == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__  ) && (__ARM_ARCH_8M_BASE__   == 1)) || \
+           (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     ) */
+
+
+#if ((defined (__ARM_ARCH_7M__       ) && (__ARM_ARCH_7M__        == 1)) || \
+     (defined (__ARM_ARCH_7EM__      ) && (__ARM_ARCH_7EM__       == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+     (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     )
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT             __builtin_arm_ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT             __builtin_arm_usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else /* ((defined (__ARM_ARCH_7M__       ) && (__ARM_ARCH_7M__        == 1)) || \
+          (defined (__ARM_ARCH_7EM__      ) && (__ARM_ARCH_7EM__       == 1)) || \
+          (defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+          (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__       ) && (__ARM_ARCH_7M__        == 1)) || \
+           (defined (__ARM_ARCH_7EM__      ) && (__ARM_ARCH_7EM__       == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+           (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__  ) && (__ARM_ARCH_8M_BASE__   == 1)) || \
+     (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     )
+
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+  return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+  return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+  return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEX                  (uint32_t)__builtin_arm_stlex
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__  ) && (__ARM_ARCH_8M_BASE__   == 1)) || \
+           (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+#ifndef __ARM_COMPAT_H
+__STATIC_FORCEINLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+#endif
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+#ifndef __ARM_COMPAT_H
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+#endif
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+  __ISB();
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+  __ISB();
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__       ) && (__ARM_ARCH_7M__        == 1)) || \
+     (defined (__ARM_ARCH_7EM__      ) && (__ARM_ARCH_7EM__       == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+     (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __enable_fault_irq(void)
+{
+  __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_fault_irq(void)
+{
+  __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__       ) && (__ARM_ARCH_7M__        == 1)) || \
+           (defined (__ARM_ARCH_7EM__      ) && (__ARM_ARCH_7EM__       == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+           (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__  ) && (__ARM_ARCH_8M_BASE__   == 1)) || \
+     (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) )
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) )
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) )
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!((defined (__ARM_ARCH_8M_MAIN__   ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+       (defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1))   ) )
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__  ) && (__ARM_ARCH_8M_MAIN__   == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__  ) && (__ARM_ARCH_8M_BASE__   == 1)) || \
+           (defined (__ARM_ARCH_8_1M_MAIN__) && (__ARM_ARCH_8_1M_MAIN__ == 1))     ) */
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
+#else
+#define __get_FPSCR()      ((uint32_t)0U)
+#endif
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __set_FPSCR      __builtin_arm_set_fpscr
+#else
+#define __set_FPSCR(x)      ((void)(x))
+#endif
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+#define     __SADD8                 __builtin_arm_sadd8
+#define     __QADD8                 __builtin_arm_qadd8
+#define     __SHADD8                __builtin_arm_shadd8
+#define     __UADD8                 __builtin_arm_uadd8
+#define     __UQADD8                __builtin_arm_uqadd8
+#define     __UHADD8                __builtin_arm_uhadd8
+#define     __SSUB8                 __builtin_arm_ssub8
+#define     __QSUB8                 __builtin_arm_qsub8
+#define     __SHSUB8                __builtin_arm_shsub8
+#define     __USUB8                 __builtin_arm_usub8
+#define     __UQSUB8                __builtin_arm_uqsub8
+#define     __UHSUB8                __builtin_arm_uhsub8
+#define     __SADD16                __builtin_arm_sadd16
+#define     __QADD16                __builtin_arm_qadd16
+#define     __SHADD16               __builtin_arm_shadd16
+#define     __UADD16                __builtin_arm_uadd16
+#define     __UQADD16               __builtin_arm_uqadd16
+#define     __UHADD16               __builtin_arm_uhadd16
+#define     __SSUB16                __builtin_arm_ssub16
+#define     __QSUB16                __builtin_arm_qsub16
+#define     __SHSUB16               __builtin_arm_shsub16
+#define     __USUB16                __builtin_arm_usub16
+#define     __UQSUB16               __builtin_arm_uqsub16
+#define     __UHSUB16               __builtin_arm_uhsub16
+#define     __SASX                  __builtin_arm_sasx
+#define     __QASX                  __builtin_arm_qasx
+#define     __SHASX                 __builtin_arm_shasx
+#define     __UASX                  __builtin_arm_uasx
+#define     __UQASX                 __builtin_arm_uqasx
+#define     __UHASX                 __builtin_arm_uhasx
+#define     __SSAX                  __builtin_arm_ssax
+#define     __QSAX                  __builtin_arm_qsax
+#define     __SHSAX                 __builtin_arm_shsax
+#define     __USAX                  __builtin_arm_usax
+#define     __UQSAX                 __builtin_arm_uqsax
+#define     __UHSAX                 __builtin_arm_uhsax
+#define     __USAD8                 __builtin_arm_usad8
+#define     __USADA8                __builtin_arm_usada8
+#define     __SSAT16                __builtin_arm_ssat16
+#define     __USAT16                __builtin_arm_usat16
+#define     __UXTB16                __builtin_arm_uxtb16
+#define     __UXTAB16               __builtin_arm_uxtab16
+#define     __SXTB16                __builtin_arm_sxtb16
+#define     __SXTAB16               __builtin_arm_sxtab16
+#define     __SMUAD                 __builtin_arm_smuad
+#define     __SMUADX                __builtin_arm_smuadx
+#define     __SMLAD                 __builtin_arm_smlad
+#define     __SMLADX                __builtin_arm_smladx
+#define     __SMLALD                __builtin_arm_smlald
+#define     __SMLALDX               __builtin_arm_smlaldx
+#define     __SMUSD                 __builtin_arm_smusd
+#define     __SMUSDX                __builtin_arm_smusdx
+#define     __SMLSD                 __builtin_arm_smlsd
+#define     __SMLSDX                __builtin_arm_smlsdx
+#define     __SMLSLD                __builtin_arm_smlsld
+#define     __SMLSLDX               __builtin_arm_smlsldx
+#define     __SEL                   __builtin_arm_sel
+#define     __QADD                  __builtin_arm_qadd
+#define     __QSUB                  __builtin_arm_qsub
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+#define __SXTB16_RORn(ARG1, ARG2)        __SXTB16(__ROR(ARG1, ARG2))
+
+#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3))
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+  int32_t result;
+
+  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Libraries/CMSIS/Include/cmsis_armclang_ltm.h b/Libraries/CMSIS/Core/Include/cmsis_armclang_ltm.h
similarity index 94%
rename from Libraries/CMSIS/Include/cmsis_armclang_ltm.h
rename to Libraries/CMSIS/Core/Include/cmsis_armclang_ltm.h
index 1b5a9652..1e255d59 100644
--- a/Libraries/CMSIS/Include/cmsis_armclang_ltm.h
+++ b/Libraries/CMSIS/Core/Include/cmsis_armclang_ltm.h
@@ -1,1891 +1,1928 @@
-/**************************************************************************//**
- * @file     cmsis_armclang_ltm.h
- * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
- * @version  V1.2.0
- * @date     08. May 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
-
-#ifndef __CMSIS_ARMCLANG_H
-#define __CMSIS_ARMCLANG_H
-
-#pragma clang system_header   /* treat file as system include file */
-
-#ifndef __ARM_COMPAT_H
-#include <arm_compat.h>    /* Compatibility header for Arm Compiler 5 intrinsics */
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               __inline
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static __inline
-#endif
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
-#endif
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __attribute__((__noreturn__))
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
-  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
-  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
-  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
-  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wpacked"
-/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
-  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-  #pragma clang diagnostic pop
-  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
-#endif
-#ifndef   __COMPILER_BARRIER
-  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
-#endif
-
-/* #########################  Startup and Lowlevel Init  ######################## */
-
-#ifndef __PROGRAM_START
-#define __PROGRAM_START           __main
-#endif
-
-#ifndef __INITIAL_SP
-#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
-#endif
-
-#ifndef __STACK_LIMIT
-#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
-#endif
-
-#ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __Vectors
-#endif
-
-#ifndef __VECTOR_TABLE_ATTRIBUTE
-#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section("RESET")))
-#endif
-
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __enable_irq();  see arm_compat.h */
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-/* intrinsic void __disable_irq();  see arm_compat.h */
-
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Control Register (non-secure)
-  \details Returns the content of the non-secure Control Register when in secure mode.
-  \return               non-secure Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
-{
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Control Register (non-secure)
-  \details Writes the given value to the non-secure Control Register when in secure state.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
-{
-  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_APSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSP(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Process Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
-  \return               PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSP(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, msp" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Main Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
-  \return               MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Main Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
-}
-#endif
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
-  \return               SP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
-  \param [in]    topOfStack  Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
-{
-  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
-}
-#endif
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Priority Mask (non-secure)
-  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
-  \return               Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Priority Mask (non-secure)
-  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
-}
-#endif
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq   /* see arm_compat.h */
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq   /* see arm_compat.h */
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Base Priority (non-secure)
-  \details Returns the current value of the non-secure Base Priority register when in secure state.
-  \return               Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Base Priority (non-secure)
-  \details Assigns the given value to the non-secure Base Priority register when in secure state.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Fault Mask (non-secure)
-  \details Returns the current value of the non-secure Fault Mask register when in secure state.
-  \return               Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Fault Mask (non-secure)
-  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-/**
-  \brief   Get Process Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always in non-secure
-  mode.
-  
-  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
-  \return               PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
-  return result;
-#endif
-}
-
-#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Process Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always in non-secure
-  mode.
-
-  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \return               PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
-  return result;
-#endif
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored in non-secure
-  mode.
-  
-  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
-#else
-  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored in non-secure
-  mode.
-
-  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
-#else
-  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
-#endif
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always.
-
-  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
-  \return               MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
-  return result;
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Get Main Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always.
-
-  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
-  \return               MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
-  return result;
-#endif
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored.
-
-  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
-  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
-#else
-  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Set Main Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored.
-
-  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
-  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
-#else
-  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
-#else
-#define __get_FPSCR()      ((uint32_t)0U)
-#endif
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#define __set_FPSCR      __builtin_arm_set_fpscr
-#else
-#define __set_FPSCR(x)      ((void)(x))
-#endif
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP          __builtin_arm_nop
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI          __builtin_arm_wfi
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE          __builtin_arm_wfe
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV          __builtin_arm_sev
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-#define __ISB()        __builtin_arm_isb(0xF)
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-#define __DSB()        __builtin_arm_dsb(0xF)
-
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-#define __DMB()        __builtin_arm_dmb(0xF)
-
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV(value)   __builtin_bswap32(value)
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REV16(value) __ROR(__REV(value), 16)
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __REVSH(value) (int16_t)__builtin_bswap16(value)
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  op2 %= 32U;
-  if (op2 == 0U)
-  {
-    return op1;
-  }
-  return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)     __ASM volatile ("bkpt "#value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-#define __RBIT            __builtin_arm_rbit
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
-{
-  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
-     __builtin_clz(0) is undefined behaviour, so handle this case specially.
-     This guarantees ARM-compatible results if happening to compile on a non-ARM
-     target, and ensures the compiler doesn't decide to activate any
-     optimisations using the logic "value was passed to __builtin_clz, so it
-     is non-zero".
-     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
-     single CLZ instruction.
-   */
-  if (value == 0U)
-  {
-    return 32U;
-  }
-  return __builtin_clz(value);
-}
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define __LDREXB        (uint8_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define __LDREXH        (uint16_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define __LDREXW        (uint32_t)__builtin_arm_ldrex
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXB        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXH        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define __STREXW        (uint32_t)__builtin_arm_strex
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-#define __CLREX             __builtin_arm_clrex
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT             __builtin_arm_ssat
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT             __builtin_arm_usat
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return(result);
-}
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
-{
-  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
-{
-  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
-{
-  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
-}
-
-#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
-    }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
-}
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
-    }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-/**
-  \brief   Load-Acquire (8 bit)
-  \details Executes a LDAB instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint8_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (16 bit)
-  \details Executes a LDAH instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return ((uint16_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (32 bit)
-  \details Executes a LDA instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
-{
-  uint32_t result;
-
-  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
-  return(result);
-}
-
-
-/**
-  \brief   Store-Release (8 bit)
-  \details Executes a STLB instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
-{
-  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (16 bit)
-  \details Executes a STLH instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
-{
-  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (32 bit)
-  \details Executes a STL instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
-{
-  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Load-Acquire Exclusive (8 bit)
-  \details Executes a LDAB exclusive instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Load-Acquire Exclusive (16 bit)
-  \details Executes a LDAH exclusive instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Load-Acquire Exclusive (32 bit)
-  \details Executes a LDA exclusive instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
-
-
-/**
-  \brief   Store-Release Exclusive (8 bit)
-  \details Executes a STLB exclusive instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
-
-
-/**
-  \brief   Store-Release Exclusive (16 bit)
-  \details Executes a STLH exclusive instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
-
-
-/**
-  \brief   Store-Release Exclusive (32 bit)
-  \details Executes a STL exclusive instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-#define     __STLEX                  (uint32_t)__builtin_arm_stlex
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
-
-__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
-  int32_t result;
-
-  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#endif /* (__ARM_FEATURE_DSP == 1) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#endif /* __CMSIS_ARMCLANG_H */
+/**************************************************************************//**
+ * @file     cmsis_armclang_ltm.h
+ * @brief    CMSIS compiler armclang (Arm Compiler 6) header file
+ * @version  V1.5.3
+ * @date     27. May 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*lint -esym(9058, IRQn)*/ /* disable MISRA 2012 Rule 2.4 for IRQn */
+
+#ifndef __CMSIS_ARMCLANG_H
+#define __CMSIS_ARMCLANG_H
+
+#pragma clang system_header   /* treat file as system include file */
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               __inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static __inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static __inline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32 */
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_WRITE */
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT16_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT16_READ */
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_WRITE)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_WRITE */
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma clang diagnostic push
+  #pragma clang diagnostic ignored "-Wpacked"
+/*lint -esym(9058, T_UINT32_READ)*/ /* disable MISRA 2012 Rule 2.4 for T_UINT32_READ */
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma clang diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __main
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              Image$$ARM_LIB_STACK$$ZI$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             Image$$ARM_LIB_STACK$$ZI$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section("RESET")))
+#endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#ifndef __STACK_SEAL
+#define __STACK_SEAL              Image$$STACKSEAL$$ZI$$Base
+#endif
+
+#ifndef __TZ_STACK_SEAL_SIZE
+#define __TZ_STACK_SEAL_SIZE      8U
+#endif
+
+#ifndef __TZ_STACK_SEAL_VALUE
+#define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
+#endif
+
+
+__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
+  *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
+}
+#endif
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP          __builtin_arm_nop
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI          __builtin_arm_wfi
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE          __builtin_arm_wfe
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV          __builtin_arm_sev
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+#define __ISB()        __builtin_arm_isb(0xF)
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+#define __DSB()        __builtin_arm_dsb(0xF)
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+#define __DMB()        __builtin_arm_dmb(0xF)
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV(value)   __builtin_bswap32(value)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REV16(value) __ROR(__REV(value), 16)
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __REVSH(value) (int16_t)__builtin_bswap16(value)
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)     __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+#define __RBIT            __builtin_arm_rbit
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM Compiler 6.10 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define __LDREXB        (uint8_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define __LDREXH        (uint16_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define __LDREXW        (uint32_t)__builtin_arm_ldrex
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXB        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXH        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define __STREXW        (uint32_t)__builtin_arm_strex
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+#define __CLREX             __builtin_arm_clrex
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT             __builtin_arm_ssat
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT             __builtin_arm_usat
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+  return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+  return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+  return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+  uint32_t result;
+
+  __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+  return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+  __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+  __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+  __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+#define     __LDAEXB                 (uint8_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+#define     __LDAEXH                 (uint16_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+#define     __LDAEX                  (uint32_t)__builtin_arm_ldaex
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXB                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEXH                 (uint32_t)__builtin_arm_stlex
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+#define     __STLEX                  (uint32_t)__builtin_arm_stlex
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+#ifndef __ARM_COMPAT_H
+__STATIC_FORCEINLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+#endif
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+#ifndef __ARM_COMPAT_H
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+#endif
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+  __ISB();
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+  __ISB();
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __enable_fault_irq(void)
+{
+  __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_fault_irq(void)
+{
+  __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __get_FPSCR      (uint32_t)__builtin_arm_get_fpscr
+#else
+#define __get_FPSCR()      ((uint32_t)0U)
+#endif
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#define __set_FPSCR      __builtin_arm_set_fpscr
+#else
+#define __set_FPSCR(x)      ((void)(x))
+#endif
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#define __SSAT16(ARG1,ARG2) \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+#define __USAT16(ARG1,ARG2) \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
+  __RES; \
+ })
+
+__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
+                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
+
+#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
+                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
+
+#define __SXTB16_RORn(ARG1, ARG2)        __SXTB16(__ROR(ARG1, ARG2))
+
+#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3))
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+  int32_t result;
+
+  __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#endif /* __CMSIS_ARMCLANG_H */
diff --git a/Libraries/CMSIS/Include/cmsis_compiler.h b/Libraries/CMSIS/Core/Include/cmsis_compiler.h
similarity index 97%
rename from Libraries/CMSIS/Include/cmsis_compiler.h
rename to Libraries/CMSIS/Core/Include/cmsis_compiler.h
index 21a2c711..adbf296f 100644
--- a/Libraries/CMSIS/Include/cmsis_compiler.h
+++ b/Libraries/CMSIS/Core/Include/cmsis_compiler.h
@@ -1,283 +1,283 @@
-/**************************************************************************//**
- * @file     cmsis_compiler.h
- * @brief    CMSIS compiler generic header file
- * @version  V5.1.0
- * @date     09. October 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_COMPILER_H
-#define __CMSIS_COMPILER_H
-
-#include <stdint.h>
-
-/*
- * Arm Compiler 4/5
- */
-#if   defined ( __CC_ARM )
-  #include "cmsis_armcc.h"
-
-
-/*
- * Arm Compiler 6.6 LTM (armclang)
- */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
-  #include "cmsis_armclang_ltm.h"
-
-  /*
- * Arm Compiler above 6.10.1 (armclang)
- */
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
-  #include "cmsis_armclang.h"
-
-
-/*
- * GNU Compiler
- */
-#elif defined ( __GNUC__ )
-  #include "cmsis_gcc.h"
-
-
-/*
- * IAR Compiler
- */
-#elif defined ( __ICCARM__ )
-  #include <cmsis_iccarm.h>
-
-
-/*
- * TI Arm Compiler
- */
-#elif defined ( __TI_ARM__ )
-  #include <cmsis_ccs.h>
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __attribute__((packed))
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __attribute__((packed))
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)                           __attribute__((aligned(x)))
-  #endif
-  #ifndef   __RESTRICT
-    #define __RESTRICT                             __restrict
-  #endif
-  #ifndef   __COMPILER_BARRIER
-    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
-    #define __COMPILER_BARRIER()                   (void)0
-  #endif
-
-
-/*
- * TASKING Compiler
- */
-#elif defined ( __TASKING__ )
-  /*
-   * The CMSIS functions have been implemented as intrinsics in the compiler.
-   * Please use "carm -?i" to get an up to date list of all intrinsics,
-   * Including the CMSIS ones.
-   */
-
-  #ifndef   __ASM
-    #define __ASM                                  __asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    #define __NO_RETURN                            __attribute__((noreturn))
-  #endif
-  #ifndef   __USED
-    #define __USED                                 __attribute__((used))
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __attribute__((weak))
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               __packed__
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        struct __packed__
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         union __packed__
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    struct __packed__ T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #define __ALIGNED(x)              __align(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-  #ifndef   __COMPILER_BARRIER
-    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
-    #define __COMPILER_BARRIER()                   (void)0
-  #endif
-
-
-/*
- * COSMIC Compiler
- */
-#elif defined ( __CSMC__ )
-   #include <cmsis_csm.h>
-
- #ifndef   __ASM
-    #define __ASM                                  _asm
-  #endif
-  #ifndef   __INLINE
-    #define __INLINE                               inline
-  #endif
-  #ifndef   __STATIC_INLINE
-    #define __STATIC_INLINE                        static inline
-  #endif
-  #ifndef   __STATIC_FORCEINLINE
-    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
-  #endif
-  #ifndef   __NO_RETURN
-    // NO RETURN is automatically detected hence no warning here
-    #define __NO_RETURN
-  #endif
-  #ifndef   __USED
-    #warning No compiler specific solution for __USED. __USED is ignored.
-    #define __USED
-  #endif
-  #ifndef   __WEAK
-    #define __WEAK                                 __weak
-  #endif
-  #ifndef   __PACKED
-    #define __PACKED                               @packed
-  #endif
-  #ifndef   __PACKED_STRUCT
-    #define __PACKED_STRUCT                        @packed struct
-  #endif
-  #ifndef   __PACKED_UNION
-    #define __PACKED_UNION                         @packed union
-  #endif
-  #ifndef   __UNALIGNED_UINT32        /* deprecated */
-    @packed struct T_UINT32 { uint32_t v; };
-    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT16_WRITE
-    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT16_READ
-    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __UNALIGNED_UINT32_WRITE
-    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-  #endif
-  #ifndef   __UNALIGNED_UINT32_READ
-    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-  #endif
-  #ifndef   __ALIGNED
-    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-  #ifndef   __RESTRICT
-    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
-    #define __RESTRICT
-  #endif
-  #ifndef   __COMPILER_BARRIER
-    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
-    #define __COMPILER_BARRIER()                   (void)0
-  #endif
-
-
-#else
-  #error Unknown compiler.
-#endif
-
-
-#endif /* __CMSIS_COMPILER_H */
-
+/**************************************************************************//**
+ * @file     cmsis_compiler.h
+ * @brief    CMSIS compiler generic header file
+ * @version  V5.1.0
+ * @date     09. October 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_COMPILER_H
+#define __CMSIS_COMPILER_H
+
+#include <stdint.h>
+
+/*
+ * Arm Compiler 4/5
+ */
+#if   defined ( __CC_ARM )
+  #include "cmsis_armcc.h"
+
+
+/*
+ * Arm Compiler 6.6 LTM (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) && (__ARMCC_VERSION < 6100100)
+  #include "cmsis_armclang_ltm.h"
+
+  /*
+ * Arm Compiler above 6.10.1 (armclang)
+ */
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100)
+  #include "cmsis_armclang.h"
+
+
+/*
+ * GNU Compiler
+ */
+#elif defined ( __GNUC__ )
+  #include "cmsis_gcc.h"
+
+
+/*
+ * IAR Compiler
+ */
+#elif defined ( __ICCARM__ )
+  #include <cmsis_iccarm.h>
+
+
+/*
+ * TI Arm Compiler
+ */
+#elif defined ( __TI_ARM__ )
+  #include <cmsis_ccs.h>
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __attribute__((packed))
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __attribute__((packed))
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void*)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)                           __attribute__((aligned(x)))
+  #endif
+  #ifndef   __RESTRICT
+    #define __RESTRICT                             __restrict
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * TASKING Compiler
+ */
+#elif defined ( __TASKING__ )
+  /*
+   * The CMSIS functions have been implemented as intrinsics in the compiler.
+   * Please use "carm -?i" to get an up to date list of all intrinsics,
+   * Including the CMSIS ones.
+   */
+
+  #ifndef   __ASM
+    #define __ASM                                  __asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    #define __NO_RETURN                            __attribute__((noreturn))
+  #endif
+  #ifndef   __USED
+    #define __USED                                 __attribute__((used))
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __attribute__((weak))
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               __packed__
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        struct __packed__
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         union __packed__
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    struct __packed__ T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #define __ALIGNED(x)              __align(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+/*
+ * COSMIC Compiler
+ */
+#elif defined ( __CSMC__ )
+   #include <cmsis_csm.h>
+
+ #ifndef   __ASM
+    #define __ASM                                  _asm
+  #endif
+  #ifndef   __INLINE
+    #define __INLINE                               inline
+  #endif
+  #ifndef   __STATIC_INLINE
+    #define __STATIC_INLINE                        static inline
+  #endif
+  #ifndef   __STATIC_FORCEINLINE
+    #define __STATIC_FORCEINLINE                   __STATIC_INLINE
+  #endif
+  #ifndef   __NO_RETURN
+    // NO RETURN is automatically detected hence no warning here
+    #define __NO_RETURN
+  #endif
+  #ifndef   __USED
+    #warning No compiler specific solution for __USED. __USED is ignored.
+    #define __USED
+  #endif
+  #ifndef   __WEAK
+    #define __WEAK                                 __weak
+  #endif
+  #ifndef   __PACKED
+    #define __PACKED                               @packed
+  #endif
+  #ifndef   __PACKED_STRUCT
+    #define __PACKED_STRUCT                        @packed struct
+  #endif
+  #ifndef   __PACKED_UNION
+    #define __PACKED_UNION                         @packed union
+  #endif
+  #ifndef   __UNALIGNED_UINT32        /* deprecated */
+    @packed struct T_UINT32 { uint32_t v; };
+    #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT16_WRITE
+    __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+    #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT16_READ
+    __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+    #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __UNALIGNED_UINT32_WRITE
+    __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+    #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+  #endif
+  #ifndef   __UNALIGNED_UINT32_READ
+    __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+    #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+  #endif
+  #ifndef   __ALIGNED
+    #warning No compiler specific solution for __ALIGNED. __ALIGNED is ignored.
+    #define __ALIGNED(x)
+  #endif
+  #ifndef   __RESTRICT
+    #warning No compiler specific solution for __RESTRICT. __RESTRICT is ignored.
+    #define __RESTRICT
+  #endif
+  #ifndef   __COMPILER_BARRIER
+    #warning No compiler specific solution for __COMPILER_BARRIER. __COMPILER_BARRIER is ignored.
+    #define __COMPILER_BARRIER()                   (void)0
+  #endif
+
+
+#else
+  #error Unknown compiler.
+#endif
+
+
+#endif /* __CMSIS_COMPILER_H */
+
diff --git a/Libraries/CMSIS/Include/cmsis_gcc.h b/Libraries/CMSIS/Core/Include/cmsis_gcc.h
similarity index 89%
rename from Libraries/CMSIS/Include/cmsis_gcc.h
rename to Libraries/CMSIS/Core/Include/cmsis_gcc.h
index 1e08e7e8..67bda4ef 100644
--- a/Libraries/CMSIS/Include/cmsis_gcc.h
+++ b/Libraries/CMSIS/Core/Include/cmsis_gcc.h
@@ -1,2168 +1,2211 @@
-/**************************************************************************//**
- * @file     cmsis_gcc.h
- * @brief    CMSIS compiler GCC header file
- * @version  V5.2.0
- * @date     08. May 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef __CMSIS_GCC_H
-#define __CMSIS_GCC_H
-
-/* ignore some GCC warnings */
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wsign-conversion"
-#pragma GCC diagnostic ignored "-Wconversion"
-#pragma GCC diagnostic ignored "-Wunused-parameter"
-
-/* Fallback for __has_builtin */
-#ifndef __has_builtin
-  #define __has_builtin(x) (0)
-#endif
-
-/* CMSIS compiler specific defines */
-#ifndef   __ASM
-  #define __ASM                                  __asm
-#endif
-#ifndef   __INLINE
-  #define __INLINE                               inline
-#endif
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE                        static inline
-#endif
-#ifndef   __STATIC_FORCEINLINE                 
-  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
-#endif                                           
-#ifndef   __NO_RETURN
-  #define __NO_RETURN                            __attribute__((__noreturn__))
-#endif
-#ifndef   __USED
-  #define __USED                                 __attribute__((used))
-#endif
-#ifndef   __WEAK
-  #define __WEAK                                 __attribute__((weak))
-#endif
-#ifndef   __PACKED
-  #define __PACKED                               __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_STRUCT
-  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __PACKED_UNION
-  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
-#endif
-#ifndef   __UNALIGNED_UINT32        /* deprecated */
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
-#endif
-#ifndef   __UNALIGNED_UINT16_WRITE
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT16_READ
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __UNALIGNED_UINT32_WRITE
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
-#endif
-#ifndef   __UNALIGNED_UINT32_READ
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wpacked"
-  #pragma GCC diagnostic ignored "-Wattributes"
-  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
-  #pragma GCC diagnostic pop
-  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
-#endif
-#ifndef   __ALIGNED
-  #define __ALIGNED(x)                           __attribute__((aligned(x)))
-#endif
-#ifndef   __RESTRICT
-  #define __RESTRICT                             __restrict
-#endif
-#ifndef   __COMPILER_BARRIER
-  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
-#endif
-
-/* #########################  Startup and Lowlevel Init  ######################## */
-
-#ifndef __PROGRAM_START
-
-/**
-  \brief   Initializes data and bss sections
-  \details This default implementations initialized all data and additional bss
-           sections relying on .copy.table and .zero.table specified properly
-           in the used linker script.
-  
- */
-__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
-{
-  extern void _start(void) __NO_RETURN;
-  
-  typedef struct {
-    uint32_t const* src;
-    uint32_t* dest;
-    uint32_t  wlen;
-  } __copy_table_t;
-  
-  typedef struct {
-    uint32_t* dest;
-    uint32_t  wlen;
-  } __zero_table_t;
-  
-  extern const __copy_table_t __copy_table_start__;
-  extern const __copy_table_t __copy_table_end__;
-  extern const __zero_table_t __zero_table_start__;
-  extern const __zero_table_t __zero_table_end__;
-
-  for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
-    for(uint32_t i=0u; i<pTable->wlen; ++i) {
-      pTable->dest[i] = pTable->src[i];
-    }
-  }
- 
-  for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
-    for(uint32_t i=0u; i<pTable->wlen; ++i) {
-      pTable->dest[i] = 0u;
-    }
-  }
- 
-  _start();
-}
-  
-#define __PROGRAM_START           __cmsis_start
-#endif
-
-#ifndef __INITIAL_SP
-#define __INITIAL_SP              __StackTop
-#endif
-
-#ifndef __STACK_LIMIT
-#define __STACK_LIMIT             __StackLimit
-#endif
-
-#ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __Vectors
-#endif
-
-#ifndef __VECTOR_TABLE_ATTRIBUTE
-#define __VECTOR_TABLE_ATTRIBUTE  __attribute((used, section(".vectors")))
-#endif
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-/**
-  \brief   Enable IRQ Interrupts
-  \details Enables IRQ interrupts by clearing the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __enable_irq(void)
-{
-  __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/**
-  \brief   Disable IRQ Interrupts
-  \details Disables IRQ interrupts by setting the I-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __disable_irq(void)
-{
-  __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/**
-  \brief   Get Control Register
-  \details Returns the content of the Control Register.
-  \return               Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Control Register (non-secure)
-  \details Returns the content of the non-secure Control Register when in secure mode.
-  \return               non-secure Control Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Control Register
-  \details Writes the given value to the Control Register.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
-{
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Control Register (non-secure)
-  \details Writes the given value to the non-secure Control Register when in secure state.
-  \param [in]    control  Control Register value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
-{
-  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Get IPSR Register
-  \details Returns the content of the IPSR Register.
-  \return               IPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get APSR Register
-  \details Returns the content of the APSR Register.
-  \return               APSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_APSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get xPSR Register
-  \details Returns the content of the xPSR Register.
-  \return               xPSR Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Get Process Stack Pointer
-  \details Returns the current value of the Process Stack Pointer (PSP).
-  \return               PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSP(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Process Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
-  \return               PSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer
-  \details Assigns the given value to the Process Stack Pointer (PSP).
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
-  \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer
-  \details Returns the current value of the Main Stack Pointer (MSP).
-  \return               MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSP(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, msp" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Main Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
-  \return               MSP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer
-  \details Assigns the given value to the Main Stack Pointer (MSP).
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Main Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
-  \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
-}
-#endif
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Stack Pointer (non-secure)
-  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
-  \return               SP Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
-  return(result);
-}
-
-
-/**
-  \brief   Set Stack Pointer (non-secure)
-  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
-  \param [in]    topOfStack  Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
-{
-  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
-}
-#endif
-
-
-/**
-  \brief   Get Priority Mask
-  \details Returns the current state of the priority mask bit from the Priority Mask Register.
-  \return               Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) :: "memory");
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Priority Mask (non-secure)
-  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
-  \return               Priority Mask value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) :: "memory");
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Priority Mask
-  \details Assigns the given value to the Priority Mask Register.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Priority Mask (non-secure)
-  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
-  \param [in]    priMask  Priority Mask
- */
-__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
-}
-#endif
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-/**
-  \brief   Enable FIQ
-  \details Enables FIQ interrupts by clearing the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __enable_fault_irq(void)
-{
-  __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/**
-  \brief   Disable FIQ
-  \details Disables FIQ interrupts by setting the F-bit in the CPSR.
-           Can only be executed in Privileged modes.
- */
-__STATIC_FORCEINLINE void __disable_fault_irq(void)
-{
-  __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/**
-  \brief   Get Base Priority
-  \details Returns the current value of the Base Priority register.
-  \return               Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Base Priority (non-secure)
-  \details Returns the current value of the non-secure Base Priority register when in secure state.
-  \return               Base Priority register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority
-  \details Assigns the given value to the Base Priority register.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Base Priority (non-secure)
-  \details Assigns the given value to the non-secure Base Priority register when in secure state.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
-}
-#endif
-
-
-/**
-  \brief   Set Base Priority with condition
-  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
-           or the new value increases the BASEPRI priority level.
-  \param [in]    basePri  Base Priority value to set
- */
-__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
-{
-  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
-}
-
-
-/**
-  \brief   Get Fault Mask
-  \details Returns the current value of the Fault Mask register.
-  \return               Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Fault Mask (non-secure)
-  \details Returns the current value of the non-secure Fault Mask register when in secure state.
-  \return               Fault Mask register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
-  return(result);
-}
-#endif
-
-
-/**
-  \brief   Set Fault Mask
-  \details Assigns the given value to the Fault Mask register.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Set Fault Mask (non-secure)
-  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
-  \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-/**
-  \brief   Get Process Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always in non-secure
-  mode.
-  
-  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
-  \return               PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
-  return result;
-#endif
-}
-
-#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
-/**
-  \brief   Get Process Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always.
-
-  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \return               PSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
-  return result;
-#endif
-}
-#endif
-
-
-/**
-  \brief   Set Process Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored in non-secure
-  mode.
-  
-  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
-#else
-  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Set Process Stack Pointer (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored.
-
-  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
-  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure PSPLIM is RAZ/WI
-  (void)ProcStackPtrLimit;
-#else
-  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
-#endif
-}
-#endif
-
-
-/**
-  \brief   Get Main Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always in non-secure
-  mode.
-
-  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
-  \return               MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
-  return result;
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Get Main Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence zero is returned always.
-
-  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
-  \return               MSPLIM Register value
- */
-__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  return 0U;
-#else
-  uint32_t result;
-  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
-  return result;
-#endif
-}
-#endif
-
-
-/**
-  \brief   Set Main Stack Pointer Limit
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored in non-secure
-  mode.
-
-  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
-  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
- */
-__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
-#else
-  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-
-
-#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
-/**
-  \brief   Set Main Stack Pointer Limit (non-secure)
-  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
-  Stack Pointer Limit register hence the write is silently ignored.
-
-  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
-  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
- */
-__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
-{
-#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
-  // without main extensions, the non-secure MSPLIM is RAZ/WI
-  (void)MainStackPtrLimit;
-#else
-  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
-#endif
-}
-#endif
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-
-/**
-  \brief   Get FPSCR
-  \details Returns the current value of the Floating Point Status/Control register.
-  \return               Floating Point Status/Control register value
- */
-__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#if __has_builtin(__builtin_arm_get_fpscr) 
-// Re-enable using built-in when GCC has been fixed
-// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
-  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
-  return __builtin_arm_get_fpscr();
-#else
-  uint32_t result;
-
-  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
-  return(result);
-#endif
-#else
-  return(0U);
-#endif
-}
-
-
-/**
-  \brief   Set FPSCR
-  \details Assigns the given value to the Floating Point Status/Control register.
-  \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-#if __has_builtin(__builtin_arm_set_fpscr)
-// Re-enable using built-in when GCC has been fixed
-// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
-  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
-  __builtin_arm_set_fpscr(fpscr);
-#else
-  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
-#endif
-#else
-  (void)fpscr;
-#endif
-}
-
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-
-/* ##########################  Core Instruction Access  ######################### */
-/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
-  Access to dedicated instructions
-  @{
-*/
-
-/* Define macros for porting to both thumb1 and thumb2.
- * For thumb1, use low register (r0-r7), specified by constraint "l"
- * Otherwise, use general registers, specified by constraint "r" */
-#if defined (__thumb__) && !defined (__thumb2__)
-#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
-#define __CMSIS_GCC_RW_REG(r) "+l" (r)
-#define __CMSIS_GCC_USE_REG(r) "l" (r)
-#else
-#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
-#define __CMSIS_GCC_RW_REG(r) "+r" (r)
-#define __CMSIS_GCC_USE_REG(r) "r" (r)
-#endif
-
-/**
-  \brief   No Operation
-  \details No Operation does nothing. This instruction can be used for code alignment purposes.
- */
-#define __NOP()                             __ASM volatile ("nop")
-
-/**
-  \brief   Wait For Interrupt
-  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
- */
-#define __WFI()                             __ASM volatile ("wfi")
-
-
-/**
-  \brief   Wait For Event
-  \details Wait For Event is a hint instruction that permits the processor to enter
-           a low-power state until one of a number of events occurs.
- */
-#define __WFE()                             __ASM volatile ("wfe")
-
-
-/**
-  \brief   Send Event
-  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
- */
-#define __SEV()                             __ASM volatile ("sev")
-
-
-/**
-  \brief   Instruction Synchronization Barrier
-  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
-           so that all instructions following the ISB are fetched from cache or memory,
-           after the instruction has been completed.
- */
-__STATIC_FORCEINLINE void __ISB(void)
-{
-  __ASM volatile ("isb 0xF":::"memory");
-}
-
-
-/**
-  \brief   Data Synchronization Barrier
-  \details Acts as a special kind of Data Memory Barrier.
-           It completes when all explicit memory accesses before this instruction complete.
- */
-__STATIC_FORCEINLINE void __DSB(void)
-{
-  __ASM volatile ("dsb 0xF":::"memory");
-}
-
-
-/**
-  \brief   Data Memory Barrier
-  \details Ensures the apparent order of the explicit memory operations before
-           and after the instruction, without ensuring their completion.
- */
-__STATIC_FORCEINLINE void __DMB(void)
-{
-  __ASM volatile ("dmb 0xF":::"memory");
-}
-
-
-/**
-  \brief   Reverse byte order (32 bit)
-  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
-  return __builtin_bswap32(value);
-#else
-  uint32_t result;
-
-  __ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
-#endif
-}
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
-}
-
-
-/**
-  \brief   Reverse byte order (16 bit)
-  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
-{
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-  return (int16_t)__builtin_bswap16(value);
-#else
-  int16_t result;
-
-  __ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return result;
-#endif
-}
-
-
-/**
-  \brief   Rotate Right in unsigned value (32 bit)
-  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
-  \param [in]    op1  Value to rotate
-  \param [in]    op2  Number of Bits to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
-{
-  op2 %= 32U;
-  if (op2 == 0U)
-  {
-    return op1;
-  }
-  return (op1 >> op2) | (op1 << (32U - op2));
-}
-
-
-/**
-  \brief   Breakpoint
-  \details Causes the processor to enter Debug state.
-           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
-  \param [in]    value  is ignored by the processor.
-                 If required, a debugger can use it to store additional information about the breakpoint.
- */
-#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
-
-
-/**
-  \brief   Reverse bit order of value
-  \details Reverses the bit order of the given value.
-  \param [in]    value  Value to reverse
-  \return               Reversed value
- */
-__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
-{
-  uint32_t result;
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-   __ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
-#else
-  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
-
-  result = value;                      /* r will be reversed bits of v; first get LSB of v */
-  for (value >>= 1U; value != 0U; value >>= 1U)
-  {
-    result <<= 1U;
-    result |= value & 1U;
-    s--;
-  }
-  result <<= s;                        /* shift when v's highest bits are zero */
-#endif
-  return result;
-}
-
-
-/**
-  \brief   Count leading zeros
-  \details Counts the number of leading zeros of a data value.
-  \param [in]  value  Value to count the leading zeros
-  \return             number of leading zeros in value
- */
-__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
-{
-  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
-     __builtin_clz(0) is undefined behaviour, so handle this case specially.
-     This guarantees ARM-compatible results if happening to compile on a non-ARM
-     target, and ensures the compiler doesn't decide to activate any
-     optimisations using the logic "value was passed to __builtin_clz, so it
-     is non-zero".
-     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
-     single CLZ instruction.
-   */
-  if (value == 0U)
-  {
-    return 32U;
-  }
-  return __builtin_clz(value);
-}
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-/**
-  \brief   LDR Exclusive (8 bit)
-  \details Executes a exclusive LDR instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDR Exclusive (16 bit)
-  \details Executes a exclusive LDR instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
-#endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDR Exclusive (32 bit)
-  \details Executes a exclusive LDR instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (8 bit)
-  \details Executes a exclusive STR instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (16 bit)
-  \details Executes a exclusive STR instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   STR Exclusive (32 bit)
-  \details Executes a exclusive STR instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
-{
-   uint32_t result;
-
-   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
-   return(result);
-}
-
-
-/**
-  \brief   Remove the exclusive lock
-  \details Removes the exclusive lock which is created by LDREX.
- */
-__STATIC_FORCEINLINE void __CLREX(void)
-{
-  __ASM volatile ("clrex" ::: "memory");
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  ARG1  Value to be saturated
-  \param [in]  ARG2  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-#define __SSAT(ARG1,ARG2) \
-__extension__ \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  ARG1  Value to be saturated
-  \param [in]  ARG2  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-#define __USAT(ARG1,ARG2) \
- __extension__ \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-
-/**
-  \brief   Rotate Right with Extend (32 bit)
-  \details Moves each bit of a bitstring right by one bit.
-           The carry input is shifted in at the left end of the bitstring.
-  \param [in]    value  Value to rotate
-  \return               Rotated value
- */
-__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
-{
-  uint32_t result;
-
-  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
-  return(result);
-}
-
-
-/**
-  \brief   LDRT Unprivileged (8 bit)
-  \details Executes a Unprivileged LDRT instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
-#endif
-   return ((uint8_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (16 bit)
-  \details Executes a Unprivileged LDRT instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
-{
-    uint32_t result;
-
-#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
-   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
-#else
-    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
-       accepted by assembler. So has to use following less efficient pattern.
-    */
-   __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
-#endif
-   return ((uint16_t) result);    /* Add explicit type cast here */
-}
-
-
-/**
-  \brief   LDRT Unprivileged (32 bit)
-  \details Executes a Unprivileged LDRT instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
-}
-
-
-/**
-  \brief   STRT Unprivileged (8 bit)
-  \details Executes a Unprivileged STRT instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
-{
-   __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (16 bit)
-  \details Executes a Unprivileged STRT instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
-{
-   __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   STRT Unprivileged (32 bit)
-  \details Executes a Unprivileged STRT instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
-{
-   __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
-}
-
-#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-/**
-  \brief   Signed Saturate
-  \details Saturates a signed value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (1..32)
-  \return             Saturated value
- */
-__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
-{
-  if ((sat >= 1U) && (sat <= 32U))
-  {
-    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-    const int32_t min = -1 - max ;
-    if (val > max)
-    {
-      return max;
-    }
-    else if (val < min)
-    {
-      return min;
-    }
-  }
-  return val;
-}
-
-/**
-  \brief   Unsigned Saturate
-  \details Saturates an unsigned value.
-  \param [in]  value  Value to be saturated
-  \param [in]    sat  Bit position to saturate to (0..31)
-  \return             Saturated value
- */
-__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
-{
-  if (sat <= 31U)
-  {
-    const uint32_t max = ((1U << sat) - 1U);
-    if (val > (int32_t)max)
-    {
-      return max;
-    }
-    else if (val < 0)
-    {
-      return 0U;
-    }
-  }
-  return (uint32_t)val;
-}
-
-#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
-           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
-           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
-
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-/**
-  \brief   Load-Acquire (8 bit)
-  \details Executes a LDAB instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint8_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (16 bit)
-  \details Executes a LDAH instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint16_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire (32 bit)
-  \details Executes a LDA instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
-}
-
-
-/**
-  \brief   Store-Release (8 bit)
-  \details Executes a STLB instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
-{
-   __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (16 bit)
-  \details Executes a STLH instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
-{
-   __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Store-Release (32 bit)
-  \details Executes a STL instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
- */
-__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
-{
-   __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
-}
-
-
-/**
-  \brief   Load-Acquire Exclusive (8 bit)
-  \details Executes a LDAB exclusive instruction for 8 bit value.
-  \param [in]    ptr  Pointer to data
-  \return             value of type uint8_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint8_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire Exclusive (16 bit)
-  \details Executes a LDAH exclusive instruction for 16 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint16_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return ((uint16_t) result);
-}
-
-
-/**
-  \brief   Load-Acquire Exclusive (32 bit)
-  \details Executes a LDA exclusive instruction for 32 bit values.
-  \param [in]    ptr  Pointer to data
-  \return        value of type uint32_t at (*ptr)
- */
-__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
-{
-    uint32_t result;
-
-   __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
-   return(result);
-}
-
-
-/**
-  \brief   Store-Release Exclusive (8 bit)
-  \details Executes a STLB exclusive instruction for 8 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
-{
-   uint32_t result;
-
-   __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   Store-Release Exclusive (16 bit)
-  \details Executes a STLH exclusive instruction for 16 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
-{
-   uint32_t result;
-
-   __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-
-/**
-  \brief   Store-Release Exclusive (32 bit)
-  \details Executes a STL exclusive instruction for 32 bit values.
-  \param [in]  value  Value to store
-  \param [in]    ptr  Pointer to location
-  \return          0  Function succeeded
-  \return          1  Function failed
- */
-__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
-{
-   uint32_t result;
-
-   __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
-   return(result);
-}
-
-#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
-
-/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
-
-
-/* ###################  Compiler specific Intrinsics  ########################### */
-/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
-  Access to dedicated SIMD instructions
-  @{
-*/
-
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
-
-__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-
-__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-#define __SSAT16(ARG1,ARG2) \
-({                          \
-  int32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-#define __USAT16(ARG1,ARG2) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1); \
-  __ASM ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) ); \
-  __RES; \
- })
-
-__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
-{
-  uint32_t result;
-
-  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
-{
-  union llreg_u{
-    uint32_t w32[2];
-    uint64_t w64;
-  } llr;
-  llr.w64 = acc;
-
-#ifndef __ARMEB__   /* Little endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
-#else               /* Big endian */
-  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
-#endif
-
-  return(llr.w64);
-}
-
-__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
-{
-  uint32_t result;
-
-  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
-{
-  int32_t result;
-
-  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
-  return(result);
-}
-
-#if 0
-#define __PKHBT(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-
-#define __PKHTB(ARG1,ARG2,ARG3) \
-({                          \
-  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
-  if (ARG3 == 0) \
-    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
-  else \
-    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
-  __RES; \
- })
-#endif
-
-#define __PKHBT(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0x0000FFFFUL) |  \
-                                           ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL)  )
-
-#define __PKHTB(ARG1,ARG2,ARG3)          ( ((((uint32_t)(ARG1))          ) & 0xFFFF0000UL) |  \
-                                           ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL)  )
-
-__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
-{
- int32_t result;
-
- __ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
- return(result);
-}
-
-#endif /* (__ARM_FEATURE_DSP == 1) */
-/*@} end of group CMSIS_SIMD_intrinsics */
-
-
-#pragma GCC diagnostic pop
-
-#endif /* __CMSIS_GCC_H */
+/**************************************************************************//**
+ * @file     cmsis_gcc.h
+ * @brief    CMSIS compiler GCC header file
+ * @version  V5.4.1
+ * @date     27. May 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __CMSIS_GCC_H
+#define __CMSIS_GCC_H
+
+/* ignore some GCC warnings */
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+
+/* Fallback for __has_builtin */
+#ifndef __has_builtin
+  #define __has_builtin(x) (0)
+#endif
+
+/* CMSIS compiler specific defines */
+#ifndef   __ASM
+  #define __ASM                                  __asm
+#endif
+#ifndef   __INLINE
+  #define __INLINE                               inline
+#endif
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE                        static inline
+#endif
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE                   __attribute__((always_inline)) static inline
+#endif
+#ifndef   __NO_RETURN
+  #define __NO_RETURN                            __attribute__((__noreturn__))
+#endif
+#ifndef   __USED
+  #define __USED                                 __attribute__((used))
+#endif
+#ifndef   __WEAK
+  #define __WEAK                                 __attribute__((weak))
+#endif
+#ifndef   __PACKED
+  #define __PACKED                               __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_STRUCT
+  #define __PACKED_STRUCT                        struct __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __PACKED_UNION
+  #define __PACKED_UNION                         union __attribute__((packed, aligned(1)))
+#endif
+#ifndef   __UNALIGNED_UINT32        /* deprecated */
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  struct __attribute__((packed)) T_UINT32 { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32(x)                  (((struct T_UINT32 *)(x))->v)
+#endif
+#ifndef   __UNALIGNED_UINT16_WRITE
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT16_WRITE(addr, val)    (void)((((struct T_UINT16_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT16_READ
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT16_READ { uint16_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT16_READ(addr)          (((const struct T_UINT16_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __UNALIGNED_UINT32_WRITE
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32_WRITE(addr, val)    (void)((((struct T_UINT32_WRITE *)(void *)(addr))->v) = (val))
+#endif
+#ifndef   __UNALIGNED_UINT32_READ
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wpacked"
+  #pragma GCC diagnostic ignored "-Wattributes"
+  __PACKED_STRUCT T_UINT32_READ { uint32_t v; };
+  #pragma GCC diagnostic pop
+  #define __UNALIGNED_UINT32_READ(addr)          (((const struct T_UINT32_READ *)(const void *)(addr))->v)
+#endif
+#ifndef   __ALIGNED
+  #define __ALIGNED(x)                           __attribute__((aligned(x)))
+#endif
+#ifndef   __RESTRICT
+  #define __RESTRICT                             __restrict
+#endif
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER()                   __ASM volatile("":::"memory")
+#endif
+
+/* #########################  Startup and Lowlevel Init  ######################## */
+
+#ifndef __PROGRAM_START
+
+/**
+  \brief   Initializes data and bss sections
+  \details This default implementations initialized all data and additional bss
+           sections relying on .copy.table and .zero.table specified properly
+           in the used linker script.
+
+ */
+__STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
+{
+  extern void _start(void) __NO_RETURN;
+
+  typedef struct {
+    uint32_t const* src;
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __copy_table_t;
+
+  typedef struct {
+    uint32_t* dest;
+    uint32_t  wlen;
+  } __zero_table_t;
+
+  extern const __copy_table_t __copy_table_start__;
+  extern const __copy_table_t __copy_table_end__;
+  extern const __zero_table_t __zero_table_start__;
+  extern const __zero_table_t __zero_table_end__;
+
+  for (__copy_table_t const* pTable = &__copy_table_start__; pTable < &__copy_table_end__; ++pTable) {
+    for(uint32_t i=0u; i<pTable->wlen; ++i) {
+      pTable->dest[i] = pTable->src[i];
+    }
+  }
+
+  for (__zero_table_t const* pTable = &__zero_table_start__; pTable < &__zero_table_end__; ++pTable) {
+    for(uint32_t i=0u; i<pTable->wlen; ++i) {
+      pTable->dest[i] = 0u;
+    }
+  }
+
+  _start();
+}
+
+#define __PROGRAM_START           __cmsis_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              __StackTop
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             __StackLimit
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __Vectors
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section(".vectors")))
+#endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#ifndef __STACK_SEAL
+#define __STACK_SEAL              __StackSeal
+#endif
+
+#ifndef __TZ_STACK_SEAL_SIZE
+#define __TZ_STACK_SEAL_SIZE      8U
+#endif
+
+#ifndef __TZ_STACK_SEAL_VALUE
+#define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
+#endif
+
+
+__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
+  *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
+}
+#endif
+
+
+/* ##########################  Core Instruction Access  ######################### */
+/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
+  Access to dedicated instructions
+  @{
+*/
+
+/* Define macros for porting to both thumb1 and thumb2.
+ * For thumb1, use low register (r0-r7), specified by constraint "l"
+ * Otherwise, use general registers, specified by constraint "r" */
+#if defined (__thumb__) && !defined (__thumb2__)
+#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
+#define __CMSIS_GCC_RW_REG(r) "+l" (r)
+#define __CMSIS_GCC_USE_REG(r) "l" (r)
+#else
+#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
+#define __CMSIS_GCC_RW_REG(r) "+r" (r)
+#define __CMSIS_GCC_USE_REG(r) "r" (r)
+#endif
+
+/**
+  \brief   No Operation
+  \details No Operation does nothing. This instruction can be used for code alignment purposes.
+ */
+#define __NOP()                             __ASM volatile ("nop")
+
+/**
+  \brief   Wait For Interrupt
+  \details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
+ */
+#define __WFI()                             __ASM volatile ("wfi":::"memory")
+
+
+/**
+  \brief   Wait For Event
+  \details Wait For Event is a hint instruction that permits the processor to enter
+           a low-power state until one of a number of events occurs.
+ */
+#define __WFE()                             __ASM volatile ("wfe":::"memory")
+
+
+/**
+  \brief   Send Event
+  \details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
+ */
+#define __SEV()                             __ASM volatile ("sev")
+
+
+/**
+  \brief   Instruction Synchronization Barrier
+  \details Instruction Synchronization Barrier flushes the pipeline in the processor,
+           so that all instructions following the ISB are fetched from cache or memory,
+           after the instruction has been completed.
+ */
+__STATIC_FORCEINLINE void __ISB(void)
+{
+  __ASM volatile ("isb 0xF":::"memory");
+}
+
+
+/**
+  \brief   Data Synchronization Barrier
+  \details Acts as a special kind of Data Memory Barrier.
+           It completes when all explicit memory accesses before this instruction complete.
+ */
+__STATIC_FORCEINLINE void __DSB(void)
+{
+  __ASM volatile ("dsb 0xF":::"memory");
+}
+
+
+/**
+  \brief   Data Memory Barrier
+  \details Ensures the apparent order of the explicit memory operations before
+           and after the instruction, without ensuring their completion.
+ */
+__STATIC_FORCEINLINE void __DMB(void)
+{
+  __ASM volatile ("dmb 0xF":::"memory");
+}
+
+
+/**
+  \brief   Reverse byte order (32 bit)
+  \details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE uint32_t __REV(uint32_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
+  return __builtin_bswap32(value);
+#else
+  uint32_t result;
+
+  __ASM ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return result;
+#endif
+}
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE uint32_t __REV16(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return result;
+}
+
+
+/**
+  \brief   Reverse byte order (16 bit)
+  \details Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE int16_t __REVSH(int16_t value)
+{
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+  return (int16_t)__builtin_bswap16(value);
+#else
+  int16_t result;
+
+  __ASM ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return result;
+#endif
+}
+
+
+/**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+/**
+  \brief   Breakpoint
+  \details Causes the processor to enter Debug state.
+           Debug tools can use this to investigate system state when the instruction at a particular address is reached.
+  \param [in]    value  is ignored by the processor.
+                 If required, a debugger can use it to store additional information about the breakpoint.
+ */
+#define __BKPT(value)                       __ASM volatile ("bkpt "#value)
+
+
+/**
+  \brief   Reverse bit order of value
+  \details Reverses the bit order of the given value.
+  \param [in]    value  Value to reverse
+  \return               Reversed value
+ */
+__STATIC_FORCEINLINE uint32_t __RBIT(uint32_t value)
+{
+  uint32_t result;
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+   __ASM ("rbit %0, %1" : "=r" (result) : "r" (value) );
+#else
+  uint32_t s = (4U /*sizeof(v)*/ * 8U) - 1U; /* extra shift needed at end */
+
+  result = value;                      /* r will be reversed bits of v; first get LSB of v */
+  for (value >>= 1U; value != 0U; value >>= 1U)
+  {
+    result <<= 1U;
+    result |= value & 1U;
+    s--;
+  }
+  result <<= s;                        /* shift when v's highest bits are zero */
+#endif
+  return result;
+}
+
+
+/**
+  \brief   Count leading zeros
+  \details Counts the number of leading zeros of a data value.
+  \param [in]  value  Value to count the leading zeros
+  \return             number of leading zeros in value
+ */
+__STATIC_FORCEINLINE uint8_t __CLZ(uint32_t value)
+{
+  /* Even though __builtin_clz produces a CLZ instruction on ARM, formally
+     __builtin_clz(0) is undefined behaviour, so handle this case specially.
+     This guarantees ARM-compatible results if happening to compile on a non-ARM
+     target, and ensures the compiler doesn't decide to activate any
+     optimisations using the logic "value was passed to __builtin_clz, so it
+     is non-zero".
+     ARM GCC 7.3 and possibly earlier will optimise this test away, leaving a
+     single CLZ instruction.
+   */
+  if (value == 0U)
+  {
+    return 32U;
+  }
+  return __builtin_clz(value);
+}
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   LDR Exclusive (8 bit)
+  \details Executes a exclusive LDR instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDREXB(volatile uint8_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDR Exclusive (16 bit)
+  \details Executes a exclusive LDR instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDREXH(volatile uint16_t *addr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
+#endif
+   return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDR Exclusive (32 bit)
+  \details Executes a exclusive LDR instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
+   return(result);
+}
+
+
+/**
+  \brief   STR Exclusive (8 bit)
+  \details Executes a exclusive STR instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/**
+  \brief   STR Exclusive (16 bit)
+  \details Executes a exclusive STR instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
+   return(result);
+}
+
+
+/**
+  \brief   STR Exclusive (32 bit)
+  \details Executes a exclusive STR instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
+{
+   uint32_t result;
+
+   __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
+   return(result);
+}
+
+
+/**
+  \brief   Remove the exclusive lock
+  \details Removes the exclusive lock which is created by LDREX.
+ */
+__STATIC_FORCEINLINE void __CLREX(void)
+{
+  __ASM volatile ("clrex" ::: "memory");
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  ARG1  Value to be saturated
+  \param [in]  ARG2  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+#define __SSAT(ARG1, ARG2) \
+__extension__ \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM volatile ("ssat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
+  __RES; \
+ })
+
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  ARG1  Value to be saturated
+  \param [in]  ARG2  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+#define __USAT(ARG1, ARG2) \
+__extension__ \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM volatile ("usat %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
+  __RES; \
+ })
+
+
+/**
+  \brief   Rotate Right with Extend (32 bit)
+  \details Moves each bit of a bitstring right by one bit.
+           The carry input is shifted in at the left end of the bitstring.
+  \param [in]    value  Value to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __RRX(uint32_t value)
+{
+  uint32_t result;
+
+  __ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
+  return(result);
+}
+
+
+/**
+  \brief   LDRT Unprivileged (8 bit)
+  \details Executes a Unprivileged LDRT instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDRBT(volatile uint8_t *ptr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
+#endif
+   return ((uint8_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (16 bit)
+  \details Executes a Unprivileged LDRT instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDRHT(volatile uint16_t *ptr)
+{
+    uint32_t result;
+
+#if (__GNUC__ > 4) || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
+   __ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
+#else
+    /* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
+       accepted by assembler. So has to use following less efficient pattern.
+    */
+   __ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
+#endif
+   return ((uint16_t) result);    /* Add explicit type cast here */
+}
+
+
+/**
+  \brief   LDRT Unprivileged (32 bit)
+  \details Executes a Unprivileged LDRT instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDRT(volatile uint32_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
+   return(result);
+}
+
+
+/**
+  \brief   STRT Unprivileged (8 bit)
+  \details Executes a Unprivileged STRT instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
+{
+   __ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (16 bit)
+  \details Executes a Unprivileged STRT instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
+{
+   __ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
+}
+
+
+/**
+  \brief   STRT Unprivileged (32 bit)
+  \details Executes a Unprivileged STRT instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
+{
+   __ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
+}
+
+#else  /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+/**
+  \brief   Signed Saturate
+  \details Saturates a signed value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (1..32)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+{
+  if ((sat >= 1U) && (sat <= 32U))
+  {
+    const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+    const int32_t min = -1 - max ;
+    if (val > max)
+    {
+      return max;
+    }
+    else if (val < min)
+    {
+      return min;
+    }
+  }
+  return val;
+}
+
+/**
+  \brief   Unsigned Saturate
+  \details Saturates an unsigned value.
+  \param [in]  value  Value to be saturated
+  \param [in]    sat  Bit position to saturate to (0..31)
+  \return             Saturated value
+ */
+__STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+{
+  if (sat <= 31U)
+  {
+    const uint32_t max = ((1U << sat) - 1U);
+    if (val > (int32_t)max)
+    {
+      return max;
+    }
+    else if (val < 0)
+    {
+      return 0U;
+    }
+  }
+  return (uint32_t)val;
+}
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+/**
+  \brief   Load-Acquire (8 bit)
+  \details Executes a LDAB instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAB(volatile uint8_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+   return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (16 bit)
+  \details Executes a LDAH instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAH(volatile uint16_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+   return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire (32 bit)
+  \details Executes a LDA instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDA(volatile uint32_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release (8 bit)
+  \details Executes a STLB instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
+{
+   __ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Store-Release (16 bit)
+  \details Executes a STLH instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
+{
+   __ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Store-Release (32 bit)
+  \details Executes a STL instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+ */
+__STATIC_FORCEINLINE void __STL(uint32_t value, volatile uint32_t *ptr)
+{
+   __ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (8 bit)
+  \details Executes a LDAB exclusive instruction for 8 bit value.
+  \param [in]    ptr  Pointer to data
+  \return             value of type uint8_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+   return ((uint8_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (16 bit)
+  \details Executes a LDAH exclusive instruction for 16 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint16_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+   return ((uint16_t) result);
+}
+
+
+/**
+  \brief   Load-Acquire Exclusive (32 bit)
+  \details Executes a LDA exclusive instruction for 32 bit values.
+  \param [in]    ptr  Pointer to data
+  \return        value of type uint32_t at (*ptr)
+ */
+__STATIC_FORCEINLINE uint32_t __LDAEX(volatile uint32_t *ptr)
+{
+    uint32_t result;
+
+   __ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) : "memory" );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release Exclusive (8 bit)
+  \details Executes a STLB exclusive instruction for 8 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
+{
+   uint32_t result;
+
+   __ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release Exclusive (16 bit)
+  \details Executes a STLH exclusive instruction for 16 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
+{
+   uint32_t result;
+
+   __ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+   return(result);
+}
+
+
+/**
+  \brief   Store-Release Exclusive (32 bit)
+  \details Executes a STL exclusive instruction for 32 bit values.
+  \param [in]  value  Value to store
+  \param [in]    ptr  Pointer to location
+  \return          0  Function succeeded
+  \return          1  Function failed
+ */
+__STATIC_FORCEINLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
+{
+   uint32_t result;
+
+   __ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) : "memory" );
+   return(result);
+}
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+/*@}*/ /* end of group CMSIS_Core_InstructionInterface */
+
+
+/* ###########################  Core Function Access  ########################### */
+/** \ingroup  CMSIS_Core_FunctionInterface
+    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
+  @{
+ */
+
+/**
+  \brief   Enable IRQ Interrupts
+  \details Enables IRQ interrupts by clearing special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __enable_irq(void)
+{
+  __ASM volatile ("cpsie i" : : : "memory");
+}
+
+
+/**
+  \brief   Disable IRQ Interrupts
+  \details Disables IRQ interrupts by setting special-purpose register PRIMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_irq(void)
+{
+  __ASM volatile ("cpsid i" : : : "memory");
+}
+
+
+/**
+  \brief   Get Control Register
+  \details Returns the content of the Control Register.
+  \return               Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Control Register (non-secure)
+  \details Returns the content of the non-secure Control Register when in secure mode.
+  \return               non-secure Control Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_CONTROL_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, control_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Control Register
+  \details Writes the given value to the Control Register.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
+  __ISB();
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Control Register (non-secure)
+  \details Writes the given value to the non-secure Control Register when in secure state.
+  \param [in]    control  Control Register value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
+  __ISB();
+}
+#endif
+
+
+/**
+  \brief   Get IPSR Register
+  \details Returns the content of the IPSR Register.
+  \return               IPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_IPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get APSR Register
+  \details Returns the content of the APSR Register.
+  \return               APSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_APSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get xPSR Register
+  \details Returns the content of the xPSR Register.
+  \return               xPSR Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_xPSR(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Get Process Stack Pointer
+  \details Returns the current value of the Process Stack Pointer (PSP).
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp"  : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
+  \return               PSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, psp_ns"  : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer
+  \details Assigns the given value to the Process Stack Pointer (PSP).
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
+  \param [in]    topOfProcStack  Process Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
+{
+  __ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer
+  \details Returns the current value of the Main Stack Pointer (MSP).
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSP(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Main Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
+  \return               MSP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer
+  \details Assigns the given value to the Main Stack Pointer (MSP).
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Main Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
+  \param [in]    topOfMainStack  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
+{
+  __ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
+}
+#endif
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Stack Pointer (non-secure)
+  \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
+  \return               SP Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_SP_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
+  return(result);
+}
+
+
+/**
+  \brief   Set Stack Pointer (non-secure)
+  \details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
+  \param [in]    topOfStack  Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_SP_NS(uint32_t topOfStack)
+{
+  __ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
+}
+#endif
+
+
+/**
+  \brief   Get Priority Mask
+  \details Returns the current state of the priority mask bit from the Priority Mask Register.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Priority Mask (non-secure)
+  \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
+  \return               Priority Mask value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PRIMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Priority Mask
+  \details Assigns the given value to the Priority Mask Register.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Priority Mask (non-secure)
+  \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
+  \param [in]    priMask  Priority Mask
+ */
+__STATIC_FORCEINLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
+{
+  __ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
+}
+#endif
+
+
+#if ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+     (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+     (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    )
+/**
+  \brief   Enable FIQ
+  \details Enables FIQ interrupts by clearing special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __enable_fault_irq(void)
+{
+  __ASM volatile ("cpsie f" : : : "memory");
+}
+
+
+/**
+  \brief   Disable FIQ
+  \details Disables FIQ interrupts by setting special-purpose register FAULTMASK.
+           Can only be executed in Privileged modes.
+ */
+__STATIC_FORCEINLINE void __disable_fault_irq(void)
+{
+  __ASM volatile ("cpsid f" : : : "memory");
+}
+
+
+/**
+  \brief   Get Base Priority
+  \details Returns the current value of the Base Priority register.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Base Priority (non-secure)
+  \details Returns the current value of the non-secure Base Priority register when in secure state.
+  \return               Base Priority register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_BASEPRI_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority
+  \details Assigns the given value to the Base Priority register.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Base Priority (non-secure)
+  \details Assigns the given value to the non-secure Base Priority register when in secure state.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
+}
+#endif
+
+
+/**
+  \brief   Set Base Priority with condition
+  \details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
+           or the new value increases the BASEPRI priority level.
+  \param [in]    basePri  Base Priority value to set
+ */
+__STATIC_FORCEINLINE void __set_BASEPRI_MAX(uint32_t basePri)
+{
+  __ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
+}
+
+
+/**
+  \brief   Get Fault Mask
+  \details Returns the current value of the Fault Mask register.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
+  return(result);
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Fault Mask (non-secure)
+  \details Returns the current value of the non-secure Fault Mask register when in secure state.
+  \return               Fault Mask register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_FAULTMASK_NS(void)
+{
+  uint32_t result;
+
+  __ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
+  return(result);
+}
+#endif
+
+
+/**
+  \brief   Set Fault Mask
+  \details Assigns the given value to the Fault Mask register.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Set Fault Mask (non-secure)
+  \details Assigns the given value to the non-secure Fault Mask register when in secure state.
+  \param [in]    faultMask  Fault Mask value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
+{
+  __ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_7M__      ) && (__ARM_ARCH_7M__      == 1)) || \
+           (defined (__ARM_ARCH_7EM__     ) && (__ARM_ARCH_7EM__     == 1)) || \
+           (defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1))    ) */
+
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+/**
+  \brief   Get Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim"  : "=r" (result) );
+  return result;
+#endif
+}
+
+#if (defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3))
+/**
+  \brief   Get Process Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \return               PSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, psplim_ns"  : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Process Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Process Stack Pointer (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
+  \param [in]    ProcStackPtrLimit  Process Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure PSPLIM is RAZ/WI
+  (void)ProcStackPtrLimit;
+#else
+  __ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
+#endif
+}
+#endif
+
+
+/**
+  \brief   Get Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always in non-secure
+  mode.
+
+  \details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim" : "=r" (result) );
+  return result;
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Get Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence zero is returned always.
+
+  \details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
+  \return               MSPLIM Register value
+ */
+__STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  return 0U;
+#else
+  uint32_t result;
+  __ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
+  return result;
+#endif
+}
+#endif
+
+
+/**
+  \brief   Set Main Stack Pointer Limit
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored in non-secure
+  mode.
+
+  \details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
+  \param [in]    MainStackPtrLimit  Main Stack Pointer Limit value to set
+ */
+__STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+    (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+
+
+#if (defined (__ARM_FEATURE_CMSE  ) && (__ARM_FEATURE_CMSE   == 3))
+/**
+  \brief   Set Main Stack Pointer Limit (non-secure)
+  Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
+  Stack Pointer Limit register hence the write is silently ignored.
+
+  \details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
+  \param [in]    MainStackPtrLimit  Main Stack Pointer value to set
+ */
+__STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
+{
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)))
+  // without main extensions, the non-secure MSPLIM is RAZ/WI
+  (void)MainStackPtrLimit;
+#else
+  __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
+#endif
+}
+#endif
+
+#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+           (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    ) */
+
+
+/**
+  \brief   Get FPSCR
+  \details Returns the current value of the Floating Point Status/Control register.
+  \return               Floating Point Status/Control register value
+ */
+__STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#if __has_builtin(__builtin_arm_get_fpscr)
+// Re-enable using built-in when GCC has been fixed
+// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
+  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+  return __builtin_arm_get_fpscr();
+#else
+  uint32_t result;
+
+  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
+  return(result);
+#endif
+#else
+  return(0U);
+#endif
+}
+
+
+/**
+  \brief   Set FPSCR
+  \details Assigns the given value to the Floating Point Status/Control register.
+  \param [in]    fpscr  Floating Point Status/Control value to set
+ */
+__STATIC_FORCEINLINE void __set_FPSCR(uint32_t fpscr)
+{
+#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+     (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+#if __has_builtin(__builtin_arm_set_fpscr)
+// Re-enable using built-in when GCC has been fixed
+// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
+  /* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
+  __builtin_arm_set_fpscr(fpscr);
+#else
+  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
+#endif
+#else
+  (void)fpscr;
+#endif
+}
+
+
+/*@} end of CMSIS_Core_RegAccFunctions */
+
+
+/* ###################  Compiler specific Intrinsics  ########################### */
+/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
+  Access to dedicated SIMD instructions
+  @{
+*/
+
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+
+__STATIC_FORCEINLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+#define __SSAT16(ARG1, ARG2) \
+__extension__ \
+({                          \
+  int32_t __RES, __ARG1 = (ARG1); \
+  __ASM volatile ("ssat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
+  __RES; \
+ })
+
+#define __USAT16(ARG1, ARG2) \
+__extension__ \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1); \
+  __ASM volatile ("usat16 %0, %1, %2" : "=r" (__RES) :  "I" (ARG2), "r" (__ARG1) : "cc" ); \
+  __RES; \
+ })
+
+__STATIC_FORCEINLINE uint32_t __UXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTB16(uint32_t op1)
+{
+  uint32_t result;
+
+  __ASM ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTB16_RORn(uint32_t op1, uint32_t rotate)
+{
+  uint32_t result;
+  if (__builtin_constant_p(rotate) && ((rotate == 8U) || (rotate == 16U) || (rotate == 24U))) {
+    __ASM volatile ("sxtb16 %0, %1, ROR %2" : "=r" (result) : "r" (op1), "i" (rotate) );
+  } else {
+    result = __SXTB16(__ROR(op1, rotate)) ;
+  }
+  return result;
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate)
+{
+  uint32_t result;
+  if (__builtin_constant_p(rotate) && ((rotate == 8U) || (rotate == 16U) || (rotate == 24U))) {
+    __ASM volatile ("sxtab16 %0, %1, %2, ROR %3" : "=r" (result) : "r" (op1) , "r" (op2) , "i" (rotate));
+  } else {
+    result = __SXTAB16(op1, __ROR(op2, rotate));
+  }
+  return result;
+}
+
+
+__STATIC_FORCEINLINE uint32_t __SMUAD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSD  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
+{
+  uint32_t result;
+
+  __ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
+{
+  union llreg_u{
+    uint32_t w32[2];
+    uint64_t w64;
+  } llr;
+  llr.w64 = acc;
+
+#ifndef __ARMEB__   /* Little endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
+#else               /* Big endian */
+  __ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
+#endif
+
+  return(llr.w64);
+}
+
+__STATIC_FORCEINLINE uint32_t __SEL  (uint32_t op1, uint32_t op2)
+{
+  uint32_t result;
+
+  __ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QADD( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+__STATIC_FORCEINLINE  int32_t __QSUB( int32_t op1,  int32_t op2)
+{
+  int32_t result;
+
+  __ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
+  return(result);
+}
+
+
+#define __PKHBT(ARG1,ARG2,ARG3) \
+__extension__ \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+  __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
+  __RES; \
+ })
+
+#define __PKHTB(ARG1,ARG2,ARG3) \
+__extension__ \
+({                          \
+  uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
+  if (ARG3 == 0) \
+    __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2)  ); \
+  else \
+    __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) :  "r" (__ARG1), "r" (__ARG2), "I" (ARG3)  ); \
+  __RES; \
+ })
+
+
+__STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
+{
+ int32_t result;
+
+ __ASM ("smmla %0, %1, %2, %3" : "=r" (result): "r"  (op1), "r" (op2), "r" (op3) );
+ return(result);
+}
+
+#endif /* (__ARM_FEATURE_DSP == 1) */
+/*@} end of group CMSIS_SIMD_intrinsics */
+
+
+#pragma GCC diagnostic pop
+
+#endif /* __CMSIS_GCC_H */
diff --git a/Libraries/CMSIS/Include/cmsis_iccarm.h b/Libraries/CMSIS/Core/Include/cmsis_iccarm.h
similarity index 94%
rename from Libraries/CMSIS/Include/cmsis_iccarm.h
rename to Libraries/CMSIS/Core/Include/cmsis_iccarm.h
index 7af75628..65b824b0 100644
--- a/Libraries/CMSIS/Include/cmsis_iccarm.h
+++ b/Libraries/CMSIS/Core/Include/cmsis_iccarm.h
@@ -1,964 +1,1002 @@
-/**************************************************************************//**
- * @file     cmsis_iccarm.h
- * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
- * @version  V5.1.0
- * @date     08. May 2019
- ******************************************************************************/
-
-//------------------------------------------------------------------------------
-//
-// Copyright (c) 2017-2019 IAR Systems
-// Copyright (c) 2017-2019 Arm Limited. All rights reserved. 
-//
-// Licensed under the Apache License, Version 2.0 (the "License")
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-//
-//------------------------------------------------------------------------------
-
-
-#ifndef __CMSIS_ICCARM_H__
-#define __CMSIS_ICCARM_H__
-
-#ifndef __ICCARM__
-  #error This file should only be compiled by ICCARM
-#endif
-
-#pragma system_include
-
-#define __IAR_FT _Pragma("inline=forced") __intrinsic
-
-#if (__VER__ >= 8000000)
-  #define __ICCARM_V8 1
-#else
-  #define __ICCARM_V8 0
-#endif
-
-#ifndef __ALIGNED
-  #if __ICCARM_V8
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #elif (__VER__ >= 7080000)
-    /* Needs IAR language extensions */
-    #define __ALIGNED(x) __attribute__((aligned(x)))
-  #else
-    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
-    #define __ALIGNED(x)
-  #endif
-#endif
-
-
-/* Define compiler macros for CPU architecture, used in CMSIS 5.
- */
-#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
-/* Macros already defined */
-#else
-  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
-    #if __ARM_ARCH == 6
-      #define __ARM_ARCH_6M__ 1
-    #elif __ARM_ARCH == 7
-      #if __ARM_FEATURE_DSP
-        #define __ARM_ARCH_7EM__ 1
-      #else
-        #define __ARM_ARCH_7M__ 1
-      #endif
-    #endif /* __ARM_ARCH */
-  #endif /* __ARM_ARCH_PROFILE == 'M' */
-#endif
-
-/* Alternativ core deduction for older ICCARM's */
-#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
-    !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
-  #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
-    #define __ARM_ARCH_6M__ 1
-  #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
-    #define __ARM_ARCH_7M__ 1
-  #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
-    #define __ARM_ARCH_7EM__  1
-  #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
-    #define __ARM_ARCH_8M_BASE__ 1
-  #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
-    #define __ARM_ARCH_8M_MAIN__ 1
-  #else
-    #error "Unknown target."
-  #endif
-#endif
-
-
-
-#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
-  #define __IAR_M0_FAMILY  1
-#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
-  #define __IAR_M0_FAMILY  1
-#else
-  #define __IAR_M0_FAMILY  0
-#endif
-
-
-#ifndef __ASM
-  #define __ASM __asm
-#endif
-
-#ifndef   __COMPILER_BARRIER
-  #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
-#endif
-
-#ifndef __INLINE
-  #define __INLINE inline
-#endif
-
-#ifndef   __NO_RETURN
-  #if __ICCARM_V8
-    #define __NO_RETURN __attribute__((__noreturn__))
-  #else
-    #define __NO_RETURN _Pragma("object_attribute=__noreturn")
-  #endif
-#endif
-
-#ifndef   __PACKED
-  #if __ICCARM_V8
-    #define __PACKED __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED __packed
-  #endif
-#endif
-
-#ifndef   __PACKED_STRUCT
-  #if __ICCARM_V8
-    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_STRUCT __packed struct
-  #endif
-#endif
-
-#ifndef   __PACKED_UNION
-  #if __ICCARM_V8
-    #define __PACKED_UNION union __attribute__((packed, aligned(1)))
-  #else
-    /* Needs IAR language extensions */
-    #define __PACKED_UNION __packed union
-  #endif
-#endif
-
-#ifndef   __RESTRICT
-  #if __ICCARM_V8
-    #define __RESTRICT            __restrict
-  #else
-    /* Needs IAR language extensions */
-    #define __RESTRICT            restrict
-  #endif
-#endif
-
-#ifndef   __STATIC_INLINE
-  #define __STATIC_INLINE       static inline
-#endif
-
-#ifndef   __FORCEINLINE
-  #define __FORCEINLINE         _Pragma("inline=forced")
-#endif
-
-#ifndef   __STATIC_FORCEINLINE
-  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE
-#endif
-
-#ifndef __UNALIGNED_UINT16_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
-{
-  return *(__packed uint16_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
-#endif
-
-
-#ifndef __UNALIGNED_UINT16_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
-{
-  *(__packed uint16_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32_READ
-#pragma language=save
-#pragma language=extended
-__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
-{
-  return *(__packed uint32_t*)(ptr);
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
-#endif
-
-#ifndef __UNALIGNED_UINT32_WRITE
-#pragma language=save
-#pragma language=extended
-__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
-{
-  *(__packed uint32_t*)(ptr) = val;;
-}
-#pragma language=restore
-#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
-#endif
-
-#ifndef __UNALIGNED_UINT32   /* deprecated */
-#pragma language=save
-#pragma language=extended
-__packed struct  __iar_u32 { uint32_t v; };
-#pragma language=restore
-#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
-#endif
-
-#ifndef   __USED
-  #if __ICCARM_V8
-    #define __USED __attribute__((used))
-  #else
-    #define __USED _Pragma("__root")
-  #endif
-#endif
-
-#ifndef   __WEAK
-  #if __ICCARM_V8
-    #define __WEAK __attribute__((weak))
-  #else
-    #define __WEAK _Pragma("__weak")
-  #endif
-#endif
-
-#ifndef __PROGRAM_START
-#define __PROGRAM_START           __iar_program_start
-#endif
-
-#ifndef __INITIAL_SP
-#define __INITIAL_SP              CSTACK$$Limit
-#endif
-
-#ifndef __STACK_LIMIT
-#define __STACK_LIMIT             CSTACK$$Base
-#endif
-
-#ifndef __VECTOR_TABLE
-#define __VECTOR_TABLE            __vector_table
-#endif
-
-#ifndef __VECTOR_TABLE_ATTRIBUTE
-#define __VECTOR_TABLE_ATTRIBUTE  @".intvec"
-#endif
-
-#ifndef __ICCARM_INTRINSICS_VERSION__
-  #define __ICCARM_INTRINSICS_VERSION__  0
-#endif
-
-#if __ICCARM_INTRINSICS_VERSION__ == 2
-
-  #if defined(__CLZ)
-    #undef __CLZ
-  #endif
-  #if defined(__REVSH)
-    #undef __REVSH
-  #endif
-  #if defined(__RBIT)
-    #undef __RBIT
-  #endif
-  #if defined(__SSAT)
-    #undef __SSAT
-  #endif
-  #if defined(__USAT)
-    #undef __USAT
-  #endif
-
-  #include "iccarm_builtin.h"
-
-  #define __disable_fault_irq __iar_builtin_disable_fiq
-  #define __disable_irq       __iar_builtin_disable_interrupt
-  #define __enable_fault_irq  __iar_builtin_enable_fiq
-  #define __enable_irq        __iar_builtin_enable_interrupt
-  #define __arm_rsr           __iar_builtin_rsr
-  #define __arm_wsr           __iar_builtin_wsr
-
-
-  #define __get_APSR()                (__arm_rsr("APSR"))
-  #define __get_BASEPRI()             (__arm_rsr("BASEPRI"))
-  #define __get_CONTROL()             (__arm_rsr("CONTROL"))
-  #define __get_FAULTMASK()           (__arm_rsr("FAULTMASK"))
-
-  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
-    #define __get_FPSCR()             (__arm_rsr("FPSCR"))
-    #define __set_FPSCR(VALUE)        (__arm_wsr("FPSCR", (VALUE)))
-  #else
-    #define __get_FPSCR()             ( 0 )
-    #define __set_FPSCR(VALUE)        ((void)VALUE)
-  #endif
-
-  #define __get_IPSR()                (__arm_rsr("IPSR"))
-  #define __get_MSP()                 (__arm_rsr("MSP"))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __get_MSPLIM()            (0U)
-  #else
-    #define __get_MSPLIM()            (__arm_rsr("MSPLIM"))
-  #endif
-  #define __get_PRIMASK()             (__arm_rsr("PRIMASK"))
-  #define __get_PSP()                 (__arm_rsr("PSP"))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __get_PSPLIM()            (0U)
-  #else
-    #define __get_PSPLIM()            (__arm_rsr("PSPLIM"))
-  #endif
-
-  #define __get_xPSR()                (__arm_rsr("xPSR"))
-
-  #define __set_BASEPRI(VALUE)        (__arm_wsr("BASEPRI", (VALUE)))
-  #define __set_BASEPRI_MAX(VALUE)    (__arm_wsr("BASEPRI_MAX", (VALUE)))
-  #define __set_CONTROL(VALUE)        (__arm_wsr("CONTROL", (VALUE)))
-  #define __set_FAULTMASK(VALUE)      (__arm_wsr("FAULTMASK", (VALUE)))
-  #define __set_MSP(VALUE)            (__arm_wsr("MSP", (VALUE)))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure MSPLIM is RAZ/WI
-    #define __set_MSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_MSPLIM(VALUE)       (__arm_wsr("MSPLIM", (VALUE)))
-  #endif
-  #define __set_PRIMASK(VALUE)        (__arm_wsr("PRIMASK", (VALUE)))
-  #define __set_PSP(VALUE)            (__arm_wsr("PSP", (VALUE)))
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __set_PSPLIM(VALUE)       ((void)(VALUE))
-  #else
-    #define __set_PSPLIM(VALUE)       (__arm_wsr("PSPLIM", (VALUE)))
-  #endif
-
-  #define __TZ_get_CONTROL_NS()       (__arm_rsr("CONTROL_NS"))
-  #define __TZ_set_CONTROL_NS(VALUE)  (__arm_wsr("CONTROL_NS", (VALUE)))
-  #define __TZ_get_PSP_NS()           (__arm_rsr("PSP_NS"))
-  #define __TZ_set_PSP_NS(VALUE)      (__arm_wsr("PSP_NS", (VALUE)))
-  #define __TZ_get_MSP_NS()           (__arm_rsr("MSP_NS"))
-  #define __TZ_set_MSP_NS(VALUE)      (__arm_wsr("MSP_NS", (VALUE)))
-  #define __TZ_get_SP_NS()            (__arm_rsr("SP_NS"))
-  #define __TZ_set_SP_NS(VALUE)       (__arm_wsr("SP_NS", (VALUE)))
-  #define __TZ_get_PRIMASK_NS()       (__arm_rsr("PRIMASK_NS"))
-  #define __TZ_set_PRIMASK_NS(VALUE)  (__arm_wsr("PRIMASK_NS", (VALUE)))
-  #define __TZ_get_BASEPRI_NS()       (__arm_rsr("BASEPRI_NS"))
-  #define __TZ_set_BASEPRI_NS(VALUE)  (__arm_wsr("BASEPRI_NS", (VALUE)))
-  #define __TZ_get_FAULTMASK_NS()     (__arm_rsr("FAULTMASK_NS"))
-  #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
-
-  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
-    // without main extensions, the non-secure PSPLIM is RAZ/WI
-    #define __TZ_get_PSPLIM_NS()      (0U)
-    #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
-  #else
-    #define __TZ_get_PSPLIM_NS()      (__arm_rsr("PSPLIM_NS"))
-    #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
-  #endif
-
-  #define __TZ_get_MSPLIM_NS()        (__arm_rsr("MSPLIM_NS"))
-  #define __TZ_set_MSPLIM_NS(VALUE)   (__arm_wsr("MSPLIM_NS", (VALUE)))
-
-  #define __NOP     __iar_builtin_no_operation
-
-  #define __CLZ     __iar_builtin_CLZ
-  #define __CLREX   __iar_builtin_CLREX
-
-  #define __DMB     __iar_builtin_DMB
-  #define __DSB     __iar_builtin_DSB
-  #define __ISB     __iar_builtin_ISB
-
-  #define __LDREXB  __iar_builtin_LDREXB
-  #define __LDREXH  __iar_builtin_LDREXH
-  #define __LDREXW  __iar_builtin_LDREX
-
-  #define __RBIT    __iar_builtin_RBIT
-  #define __REV     __iar_builtin_REV
-  #define __REV16   __iar_builtin_REV16
-
-  __IAR_FT int16_t __REVSH(int16_t val)
-  {
-    return (int16_t) __iar_builtin_REVSH(val);
-  }
-
-  #define __ROR     __iar_builtin_ROR
-  #define __RRX     __iar_builtin_RRX
-
-  #define __SEV     __iar_builtin_SEV
-
-  #if !__IAR_M0_FAMILY
-    #define __SSAT    __iar_builtin_SSAT
-  #endif
-
-  #define __STREXB  __iar_builtin_STREXB
-  #define __STREXH  __iar_builtin_STREXH
-  #define __STREXW  __iar_builtin_STREX
-
-  #if !__IAR_M0_FAMILY
-    #define __USAT    __iar_builtin_USAT
-  #endif
-
-  #define __WFE     __iar_builtin_WFE
-  #define __WFI     __iar_builtin_WFI
-
-  #if __ARM_MEDIA__
-    #define __SADD8   __iar_builtin_SADD8
-    #define __QADD8   __iar_builtin_QADD8
-    #define __SHADD8  __iar_builtin_SHADD8
-    #define __UADD8   __iar_builtin_UADD8
-    #define __UQADD8  __iar_builtin_UQADD8
-    #define __UHADD8  __iar_builtin_UHADD8
-    #define __SSUB8   __iar_builtin_SSUB8
-    #define __QSUB8   __iar_builtin_QSUB8
-    #define __SHSUB8  __iar_builtin_SHSUB8
-    #define __USUB8   __iar_builtin_USUB8
-    #define __UQSUB8  __iar_builtin_UQSUB8
-    #define __UHSUB8  __iar_builtin_UHSUB8
-    #define __SADD16  __iar_builtin_SADD16
-    #define __QADD16  __iar_builtin_QADD16
-    #define __SHADD16 __iar_builtin_SHADD16
-    #define __UADD16  __iar_builtin_UADD16
-    #define __UQADD16 __iar_builtin_UQADD16
-    #define __UHADD16 __iar_builtin_UHADD16
-    #define __SSUB16  __iar_builtin_SSUB16
-    #define __QSUB16  __iar_builtin_QSUB16
-    #define __SHSUB16 __iar_builtin_SHSUB16
-    #define __USUB16  __iar_builtin_USUB16
-    #define __UQSUB16 __iar_builtin_UQSUB16
-    #define __UHSUB16 __iar_builtin_UHSUB16
-    #define __SASX    __iar_builtin_SASX
-    #define __QASX    __iar_builtin_QASX
-    #define __SHASX   __iar_builtin_SHASX
-    #define __UASX    __iar_builtin_UASX
-    #define __UQASX   __iar_builtin_UQASX
-    #define __UHASX   __iar_builtin_UHASX
-    #define __SSAX    __iar_builtin_SSAX
-    #define __QSAX    __iar_builtin_QSAX
-    #define __SHSAX   __iar_builtin_SHSAX
-    #define __USAX    __iar_builtin_USAX
-    #define __UQSAX   __iar_builtin_UQSAX
-    #define __UHSAX   __iar_builtin_UHSAX
-    #define __USAD8   __iar_builtin_USAD8
-    #define __USADA8  __iar_builtin_USADA8
-    #define __SSAT16  __iar_builtin_SSAT16
-    #define __USAT16  __iar_builtin_USAT16
-    #define __UXTB16  __iar_builtin_UXTB16
-    #define __UXTAB16 __iar_builtin_UXTAB16
-    #define __SXTB16  __iar_builtin_SXTB16
-    #define __SXTAB16 __iar_builtin_SXTAB16
-    #define __SMUAD   __iar_builtin_SMUAD
-    #define __SMUADX  __iar_builtin_SMUADX
-    #define __SMMLA   __iar_builtin_SMMLA
-    #define __SMLAD   __iar_builtin_SMLAD
-    #define __SMLADX  __iar_builtin_SMLADX
-    #define __SMLALD  __iar_builtin_SMLALD
-    #define __SMLALDX __iar_builtin_SMLALDX
-    #define __SMUSD   __iar_builtin_SMUSD
-    #define __SMUSDX  __iar_builtin_SMUSDX
-    #define __SMLSD   __iar_builtin_SMLSD
-    #define __SMLSDX  __iar_builtin_SMLSDX
-    #define __SMLSLD  __iar_builtin_SMLSLD
-    #define __SMLSLDX __iar_builtin_SMLSLDX
-    #define __SEL     __iar_builtin_SEL
-    #define __QADD    __iar_builtin_QADD
-    #define __QSUB    __iar_builtin_QSUB
-    #define __PKHBT   __iar_builtin_PKHBT
-    #define __PKHTB   __iar_builtin_PKHTB
-  #endif
-
-#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #define __CLZ  __cmsis_iar_clz_not_active
-    #define __SSAT __cmsis_iar_ssat_not_active
-    #define __USAT __cmsis_iar_usat_not_active
-    #define __RBIT __cmsis_iar_rbit_not_active
-    #define __get_APSR  __cmsis_iar_get_APSR_not_active
-  #endif
-
-
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
-    #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
-  #endif
-
-  #ifdef __INTRINSICS_INCLUDED
-  #error intrinsics.h is already included previously!
-  #endif
-
-  #include <intrinsics.h>
-
-  #if __IAR_M0_FAMILY
-   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
-    #undef __CLZ
-    #undef __SSAT
-    #undef __USAT
-    #undef __RBIT
-    #undef __get_APSR
-
-    __STATIC_INLINE uint8_t __CLZ(uint32_t data)
-    {
-      if (data == 0U) { return 32U; }
-
-      uint32_t count = 0U;
-      uint32_t mask = 0x80000000U;
-
-      while ((data & mask) == 0U)
-      {
-        count += 1U;
-        mask = mask >> 1U;
-      }
-      return count;
-    }
-
-    __STATIC_INLINE uint32_t __RBIT(uint32_t v)
-    {
-      uint8_t sc = 31U;
-      uint32_t r = v;
-      for (v >>= 1U; v; v >>= 1U)
-      {
-        r <<= 1U;
-        r |= v & 1U;
-        sc--;
-      }
-      return (r << sc);
-    }
-
-    __STATIC_INLINE  uint32_t __get_APSR(void)
-    {
-      uint32_t res;
-      __asm("MRS      %0,APSR" : "=r" (res));
-      return res;
-    }
-
-  #endif
-
-  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
-         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
-    #undef __get_FPSCR
-    #undef __set_FPSCR
-    #define __get_FPSCR()       (0)
-    #define __set_FPSCR(VALUE)  ((void)VALUE)
-  #endif
-
-  #pragma diag_suppress=Pe940
-  #pragma diag_suppress=Pe177
-
-  #define __enable_irq    __enable_interrupt
-  #define __disable_irq   __disable_interrupt
-  #define __NOP           __no_operation
-
-  #define __get_xPSR      __get_PSR
-
-  #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
-
-    __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
-    {
-      return __LDREX((unsigned long *)ptr);
-    }
-
-    __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
-    {
-      return __STREX(value, (unsigned long *)ptr);
-    }
-  #endif
-
-
-  /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-  #if (__CORTEX_M >= 0x03)
-
-    __IAR_FT uint32_t __RRX(uint32_t value)
-    {
-      uint32_t result;
-      __ASM("RRX      %0, %1" : "=r"(result) : "r" (value) : "cc");
-      return(result);
-    }
-
-    __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_MAX,%0"::"r" (value));
-    }
-
-
-    #define __enable_fault_irq  __enable_fiq
-    #define __disable_fault_irq __disable_fiq
-
-
-  #endif /* (__CORTEX_M >= 0x03) */
-
-  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
-  {
-    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
-  }
-
-  #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-       (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-   __IAR_FT uint32_t __get_MSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,MSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_MSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure MSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      MSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __get_PSPLIM(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,PSPLIM" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __set_PSPLIM(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      PSPLIM,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,CONTROL_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_CONTROL_NS(uint32_t value)
-    {
-      __asm volatile("MSR      CONTROL_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSP_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_SP_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,SP_NS" : "=r" (res));
-      return res;
-    }
-    __IAR_FT void   __TZ_set_SP_NS(uint32_t value)
-    {
-      __asm volatile("MSR      SP_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PRIMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,PRIMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PRIMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      PRIMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_BASEPRI_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,BASEPRI_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_BASEPRI_NS(uint32_t value)
-    {
-      __asm volatile("MSR      BASEPRI_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_FAULTMASK_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,FAULTMASK_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_FAULTMASK_NS(uint32_t value)
-    {
-      __asm volatile("MSR      FAULTMASK_NS,%0" :: "r" (value));
-    }
-
-    __IAR_FT uint32_t   __TZ_get_PSPLIM_NS(void)
-    {
-      uint32_t res;
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      res = 0U;
-    #else
-      __asm volatile("MRS      %0,PSPLIM_NS" : "=r" (res));
-    #endif
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_PSPLIM_NS(uint32_t value)
-    {
-    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
-         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
-      // without main extensions, the non-secure PSPLIM is RAZ/WI
-      (void)value;
-    #else
-      __asm volatile("MSR      PSPLIM_NS,%0" :: "r" (value));
-    #endif
-    }
-
-    __IAR_FT uint32_t   __TZ_get_MSPLIM_NS(void)
-    {
-      uint32_t res;
-      __asm volatile("MRS      %0,MSPLIM_NS" : "=r" (res));
-      return res;
-    }
-
-    __IAR_FT void   __TZ_set_MSPLIM_NS(uint32_t value)
-    {
-      __asm volatile("MSR      MSPLIM_NS,%0" :: "r" (value));
-    }
-
-  #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */
-
-#define __BKPT(value)    __asm volatile ("BKPT     %0" : : "i"(value))
-
-#if __IAR_M0_FAMILY
-  __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
-  {
-    if ((sat >= 1U) && (sat <= 32U))
-    {
-      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-      const int32_t min = -1 - max ;
-      if (val > max)
-      {
-        return max;
-      }
-      else if (val < min)
-      {
-        return min;
-      }
-    }
-    return val;
-  }
-
-  __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
-  {
-    if (sat <= 31U)
-    {
-      const uint32_t max = ((1U << sat) - 1U);
-      if (val > (int32_t)max)
-      {
-        return max;
-      }
-      else if (val < 0)
-      {
-        return 0U;
-      }
-    }
-    return (uint32_t)val;
-  }
-#endif
-
-#if (__CORTEX_M >= 0x03)   /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
-
-  __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
-  {
-    uint32_t res;
-    __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
-    return res;
-  }
-
-  __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
-  {
-    __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
-
-  __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
-  {
-    __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
-  }
-
-  __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
-  {
-    __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
-  }
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
-     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
-
-
-  __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return res;
-  }
-
-  __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
-  {
-    __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
-  {
-    __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
-  {
-    __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
-  }
-
-  __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint8_t)res);
-  }
-
-  __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return ((uint16_t)res);
-  }
-
-  __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-  __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
-  {
-    uint32_t res;
-    __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
-    return res;
-  }
-
-#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
-
-#undef __IAR_FT
-#undef __IAR_M0_FAMILY
-#undef __ICCARM_V8
-
-#pragma diag_default=Pe940
-#pragma diag_default=Pe177
-
-#endif /* __CMSIS_ICCARM_H__ */
+/**************************************************************************//**
+ * @file     cmsis_iccarm.h
+ * @brief    CMSIS compiler ICCARM (IAR Compiler for Arm) header file
+ * @version  V5.3.0
+ * @date     14. April 2021
+ ******************************************************************************/
+
+//------------------------------------------------------------------------------
+//
+// Copyright (c) 2017-2021 IAR Systems
+// Copyright (c) 2017-2021 Arm Limited. All rights reserved.
+//
+// SPDX-License-Identifier: Apache-2.0
+//
+// Licensed under the Apache License, Version 2.0 (the "License")
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+//------------------------------------------------------------------------------
+
+
+#ifndef __CMSIS_ICCARM_H__
+#define __CMSIS_ICCARM_H__
+
+#ifndef __ICCARM__
+  #error This file should only be compiled by ICCARM
+#endif
+
+#pragma system_include
+
+#define __IAR_FT _Pragma("inline=forced") __intrinsic
+
+#if (__VER__ >= 8000000)
+  #define __ICCARM_V8 1
+#else
+  #define __ICCARM_V8 0
+#endif
+
+#ifndef __ALIGNED
+  #if __ICCARM_V8
+    #define __ALIGNED(x) __attribute__((aligned(x)))
+  #elif (__VER__ >= 7080000)
+    /* Needs IAR language extensions */
+    #define __ALIGNED(x) __attribute__((aligned(x)))
+  #else
+    #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
+    #define __ALIGNED(x)
+  #endif
+#endif
+
+
+/* Define compiler macros for CPU architecture, used in CMSIS 5.
+ */
+#if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
+/* Macros already defined */
+#else
+  #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
+    #define __ARM_ARCH_8M_MAIN__ 1
+  #elif defined(__ARM8M_BASELINE__)
+    #define __ARM_ARCH_8M_BASE__ 1
+  #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
+    #if __ARM_ARCH == 6
+      #define __ARM_ARCH_6M__ 1
+    #elif __ARM_ARCH == 7
+      #if __ARM_FEATURE_DSP
+        #define __ARM_ARCH_7EM__ 1
+      #else
+        #define __ARM_ARCH_7M__ 1
+      #endif
+    #endif /* __ARM_ARCH */
+  #endif /* __ARM_ARCH_PROFILE == 'M' */
+#endif
+
+/* Alternativ core deduction for older ICCARM's */
+#if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
+    !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
+  #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
+    #define __ARM_ARCH_6M__ 1
+  #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
+    #define __ARM_ARCH_7M__ 1
+  #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
+    #define __ARM_ARCH_7EM__  1
+  #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
+    #define __ARM_ARCH_8M_BASE__ 1
+  #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
+    #define __ARM_ARCH_8M_MAIN__ 1
+  #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
+    #define __ARM_ARCH_8M_MAIN__ 1
+  #else
+    #error "Unknown target."
+  #endif
+#endif
+
+
+
+#if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
+  #define __IAR_M0_FAMILY  1
+#elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
+  #define __IAR_M0_FAMILY  1
+#else
+  #define __IAR_M0_FAMILY  0
+#endif
+
+
+#ifndef __ASM
+  #define __ASM __asm
+#endif
+
+#ifndef   __COMPILER_BARRIER
+  #define __COMPILER_BARRIER() __ASM volatile("":::"memory")
+#endif
+
+#ifndef __INLINE
+  #define __INLINE inline
+#endif
+
+#ifndef   __NO_RETURN
+  #if __ICCARM_V8
+    #define __NO_RETURN __attribute__((__noreturn__))
+  #else
+    #define __NO_RETURN _Pragma("object_attribute=__noreturn")
+  #endif
+#endif
+
+#ifndef   __PACKED
+  #if __ICCARM_V8
+    #define __PACKED __attribute__((packed, aligned(1)))
+  #else
+    /* Needs IAR language extensions */
+    #define __PACKED __packed
+  #endif
+#endif
+
+#ifndef   __PACKED_STRUCT
+  #if __ICCARM_V8
+    #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
+  #else
+    /* Needs IAR language extensions */
+    #define __PACKED_STRUCT __packed struct
+  #endif
+#endif
+
+#ifndef   __PACKED_UNION
+  #if __ICCARM_V8
+    #define __PACKED_UNION union __attribute__((packed, aligned(1)))
+  #else
+    /* Needs IAR language extensions */
+    #define __PACKED_UNION __packed union
+  #endif
+#endif
+
+#ifndef   __RESTRICT
+  #if __ICCARM_V8
+    #define __RESTRICT            __restrict
+  #else
+    /* Needs IAR language extensions */
+    #define __RESTRICT            restrict
+  #endif
+#endif
+
+#ifndef   __STATIC_INLINE
+  #define __STATIC_INLINE       static inline
+#endif
+
+#ifndef   __FORCEINLINE
+  #define __FORCEINLINE         _Pragma("inline=forced")
+#endif
+
+#ifndef   __STATIC_FORCEINLINE
+  #define __STATIC_FORCEINLINE  __FORCEINLINE __STATIC_INLINE
+#endif
+
+#ifndef __UNALIGNED_UINT16_READ
+#pragma language=save
+#pragma language=extended
+__IAR_FT uint16_t __iar_uint16_read(void const *ptr)
+{
+  return *(__packed uint16_t*)(ptr);
+}
+#pragma language=restore
+#define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
+#endif
+
+
+#ifndef __UNALIGNED_UINT16_WRITE
+#pragma language=save
+#pragma language=extended
+__IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
+{
+  *(__packed uint16_t*)(ptr) = val;;
+}
+#pragma language=restore
+#define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
+#endif
+
+#ifndef __UNALIGNED_UINT32_READ
+#pragma language=save
+#pragma language=extended
+__IAR_FT uint32_t __iar_uint32_read(void const *ptr)
+{
+  return *(__packed uint32_t*)(ptr);
+}
+#pragma language=restore
+#define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
+#endif
+
+#ifndef __UNALIGNED_UINT32_WRITE
+#pragma language=save
+#pragma language=extended
+__IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
+{
+  *(__packed uint32_t*)(ptr) = val;;
+}
+#pragma language=restore
+#define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
+#endif
+
+#ifndef __UNALIGNED_UINT32   /* deprecated */
+#pragma language=save
+#pragma language=extended
+__packed struct  __iar_u32 { uint32_t v; };
+#pragma language=restore
+#define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
+#endif
+
+#ifndef   __USED
+  #if __ICCARM_V8
+    #define __USED __attribute__((used))
+  #else
+    #define __USED _Pragma("__root")
+  #endif
+#endif
+
+#undef __WEAK                           /* undo the definition from DLib_Defaults.h */
+#ifndef   __WEAK
+  #if __ICCARM_V8
+    #define __WEAK __attribute__((weak))
+  #else
+    #define __WEAK _Pragma("__weak")
+  #endif
+#endif
+
+#ifndef __PROGRAM_START
+#define __PROGRAM_START           __iar_program_start
+#endif
+
+#ifndef __INITIAL_SP
+#define __INITIAL_SP              CSTACK$$Limit
+#endif
+
+#ifndef __STACK_LIMIT
+#define __STACK_LIMIT             CSTACK$$Base
+#endif
+
+#ifndef __VECTOR_TABLE
+#define __VECTOR_TABLE            __vector_table
+#endif
+
+#ifndef __VECTOR_TABLE_ATTRIBUTE
+#define __VECTOR_TABLE_ATTRIBUTE  @".intvec"
+#endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+#ifndef __STACK_SEAL
+#define __STACK_SEAL              STACKSEAL$$Base
+#endif
+
+#ifndef __TZ_STACK_SEAL_SIZE
+#define __TZ_STACK_SEAL_SIZE      8U
+#endif
+
+#ifndef __TZ_STACK_SEAL_VALUE
+#define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
+#endif
+
+__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
+  *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
+}
+#endif
+
+#ifndef __ICCARM_INTRINSICS_VERSION__
+  #define __ICCARM_INTRINSICS_VERSION__  0
+#endif
+
+#if __ICCARM_INTRINSICS_VERSION__ == 2
+
+  #if defined(__CLZ)
+    #undef __CLZ
+  #endif
+  #if defined(__REVSH)
+    #undef __REVSH
+  #endif
+  #if defined(__RBIT)
+    #undef __RBIT
+  #endif
+  #if defined(__SSAT)
+    #undef __SSAT
+  #endif
+  #if defined(__USAT)
+    #undef __USAT
+  #endif
+
+  #include "iccarm_builtin.h"
+
+  #define __disable_fault_irq __iar_builtin_disable_fiq
+  #define __disable_irq       __iar_builtin_disable_interrupt
+  #define __enable_fault_irq  __iar_builtin_enable_fiq
+  #define __enable_irq        __iar_builtin_enable_interrupt
+  #define __arm_rsr           __iar_builtin_rsr
+  #define __arm_wsr           __iar_builtin_wsr
+
+
+  #define __get_APSR()                (__arm_rsr("APSR"))
+  #define __get_BASEPRI()             (__arm_rsr("BASEPRI"))
+  #define __get_CONTROL()             (__arm_rsr("CONTROL"))
+  #define __get_FAULTMASK()           (__arm_rsr("FAULTMASK"))
+
+  #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+       (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     )
+    #define __get_FPSCR()             (__arm_rsr("FPSCR"))
+    #define __set_FPSCR(VALUE)        (__arm_wsr("FPSCR", (VALUE)))
+  #else
+    #define __get_FPSCR()             ( 0 )
+    #define __set_FPSCR(VALUE)        ((void)VALUE)
+  #endif
+
+  #define __get_IPSR()                (__arm_rsr("IPSR"))
+  #define __get_MSP()                 (__arm_rsr("MSP"))
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    #define __get_MSPLIM()            (0U)
+  #else
+    #define __get_MSPLIM()            (__arm_rsr("MSPLIM"))
+  #endif
+  #define __get_PRIMASK()             (__arm_rsr("PRIMASK"))
+  #define __get_PSP()                 (__arm_rsr("PSP"))
+
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    #define __get_PSPLIM()            (0U)
+  #else
+    #define __get_PSPLIM()            (__arm_rsr("PSPLIM"))
+  #endif
+
+  #define __get_xPSR()                (__arm_rsr("xPSR"))
+
+  #define __set_BASEPRI(VALUE)        (__arm_wsr("BASEPRI", (VALUE)))
+  #define __set_BASEPRI_MAX(VALUE)    (__arm_wsr("BASEPRI_MAX", (VALUE)))
+
+__STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
+{
+  __arm_wsr("CONTROL", control);
+  __iar_builtin_ISB();
+}
+
+  #define __set_FAULTMASK(VALUE)      (__arm_wsr("FAULTMASK", (VALUE)))
+  #define __set_MSP(VALUE)            (__arm_wsr("MSP", (VALUE)))
+
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure MSPLIM is RAZ/WI
+    #define __set_MSPLIM(VALUE)       ((void)(VALUE))
+  #else
+    #define __set_MSPLIM(VALUE)       (__arm_wsr("MSPLIM", (VALUE)))
+  #endif
+  #define __set_PRIMASK(VALUE)        (__arm_wsr("PRIMASK", (VALUE)))
+  #define __set_PSP(VALUE)            (__arm_wsr("PSP", (VALUE)))
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    #define __set_PSPLIM(VALUE)       ((void)(VALUE))
+  #else
+    #define __set_PSPLIM(VALUE)       (__arm_wsr("PSPLIM", (VALUE)))
+  #endif
+
+  #define __TZ_get_CONTROL_NS()       (__arm_rsr("CONTROL_NS"))
+
+__STATIC_FORCEINLINE void __TZ_set_CONTROL_NS(uint32_t control)
+{
+  __arm_wsr("CONTROL_NS", control);
+  __iar_builtin_ISB();
+}
+
+  #define __TZ_get_PSP_NS()           (__arm_rsr("PSP_NS"))
+  #define __TZ_set_PSP_NS(VALUE)      (__arm_wsr("PSP_NS", (VALUE)))
+  #define __TZ_get_MSP_NS()           (__arm_rsr("MSP_NS"))
+  #define __TZ_set_MSP_NS(VALUE)      (__arm_wsr("MSP_NS", (VALUE)))
+  #define __TZ_get_SP_NS()            (__arm_rsr("SP_NS"))
+  #define __TZ_set_SP_NS(VALUE)       (__arm_wsr("SP_NS", (VALUE)))
+  #define __TZ_get_PRIMASK_NS()       (__arm_rsr("PRIMASK_NS"))
+  #define __TZ_set_PRIMASK_NS(VALUE)  (__arm_wsr("PRIMASK_NS", (VALUE)))
+  #define __TZ_get_BASEPRI_NS()       (__arm_rsr("BASEPRI_NS"))
+  #define __TZ_set_BASEPRI_NS(VALUE)  (__arm_wsr("BASEPRI_NS", (VALUE)))
+  #define __TZ_get_FAULTMASK_NS()     (__arm_rsr("FAULTMASK_NS"))
+  #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
+
+  #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+       (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
+    // without main extensions, the non-secure PSPLIM is RAZ/WI
+    #define __TZ_get_PSPLIM_NS()      (0U)
+    #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
+  #else
+    #define __TZ_get_PSPLIM_NS()      (__arm_rsr("PSPLIM_NS"))
+    #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
+  #endif
+
+  #define __TZ_get_MSPLIM_NS()        (__arm_rsr("MSPLIM_NS"))
+  #define __TZ_set_MSPLIM_NS(VALUE)   (__arm_wsr("MSPLIM_NS", (VALUE)))
+
+  #define __NOP     __iar_builtin_no_operation
+
+  #define __CLZ     __iar_builtin_CLZ
+  #define __CLREX   __iar_builtin_CLREX
+
+  #define __DMB     __iar_builtin_DMB
+  #define __DSB     __iar_builtin_DSB
+  #define __ISB     __iar_builtin_ISB
+
+  #define __LDREXB  __iar_builtin_LDREXB
+  #define __LDREXH  __iar_builtin_LDREXH
+  #define __LDREXW  __iar_builtin_LDREX
+
+  #define __RBIT    __iar_builtin_RBIT
+  #define __REV     __iar_builtin_REV
+  #define __REV16   __iar_builtin_REV16
+
+  __IAR_FT int16_t __REVSH(int16_t val)
+  {
+    return (int16_t) __iar_builtin_REVSH(val);
+  }
+
+  #define __ROR     __iar_builtin_ROR
+  #define __RRX     __iar_builtin_RRX
+
+  #define __SEV     __iar_builtin_SEV
+
+  #if !__IAR_M0_FAMILY
+    #define __SSAT    __iar_builtin_SSAT
+  #endif
+
+  #define __STREXB  __iar_builtin_STREXB
+  #define __STREXH  __iar_builtin_STREXH
+  #define __STREXW  __iar_builtin_STREX
+
+  #if !__IAR_M0_FAMILY
+    #define __USAT    __iar_builtin_USAT
+  #endif
+
+  #define __WFE     __iar_builtin_WFE
+  #define __WFI     __iar_builtin_WFI
+
+  #if __ARM_MEDIA__
+    #define __SADD8   __iar_builtin_SADD8
+    #define __QADD8   __iar_builtin_QADD8
+    #define __SHADD8  __iar_builtin_SHADD8
+    #define __UADD8   __iar_builtin_UADD8
+    #define __UQADD8  __iar_builtin_UQADD8
+    #define __UHADD8  __iar_builtin_UHADD8
+    #define __SSUB8   __iar_builtin_SSUB8
+    #define __QSUB8   __iar_builtin_QSUB8
+    #define __SHSUB8  __iar_builtin_SHSUB8
+    #define __USUB8   __iar_builtin_USUB8
+    #define __UQSUB8  __iar_builtin_UQSUB8
+    #define __UHSUB8  __iar_builtin_UHSUB8
+    #define __SADD16  __iar_builtin_SADD16
+    #define __QADD16  __iar_builtin_QADD16
+    #define __SHADD16 __iar_builtin_SHADD16
+    #define __UADD16  __iar_builtin_UADD16
+    #define __UQADD16 __iar_builtin_UQADD16
+    #define __UHADD16 __iar_builtin_UHADD16
+    #define __SSUB16  __iar_builtin_SSUB16
+    #define __QSUB16  __iar_builtin_QSUB16
+    #define __SHSUB16 __iar_builtin_SHSUB16
+    #define __USUB16  __iar_builtin_USUB16
+    #define __UQSUB16 __iar_builtin_UQSUB16
+    #define __UHSUB16 __iar_builtin_UHSUB16
+    #define __SASX    __iar_builtin_SASX
+    #define __QASX    __iar_builtin_QASX
+    #define __SHASX   __iar_builtin_SHASX
+    #define __UASX    __iar_builtin_UASX
+    #define __UQASX   __iar_builtin_UQASX
+    #define __UHASX   __iar_builtin_UHASX
+    #define __SSAX    __iar_builtin_SSAX
+    #define __QSAX    __iar_builtin_QSAX
+    #define __SHSAX   __iar_builtin_SHSAX
+    #define __USAX    __iar_builtin_USAX
+    #define __UQSAX   __iar_builtin_UQSAX
+    #define __UHSAX   __iar_builtin_UHSAX
+    #define __USAD8   __iar_builtin_USAD8
+    #define __USADA8  __iar_builtin_USADA8
+    #define __SSAT16  __iar_builtin_SSAT16
+    #define __USAT16  __iar_builtin_USAT16
+    #define __UXTB16  __iar_builtin_UXTB16
+    #define __UXTAB16 __iar_builtin_UXTAB16
+    #define __SXTB16  __iar_builtin_SXTB16
+    #define __SXTAB16 __iar_builtin_SXTAB16
+    #define __SMUAD   __iar_builtin_SMUAD
+    #define __SMUADX  __iar_builtin_SMUADX
+    #define __SMMLA   __iar_builtin_SMMLA
+    #define __SMLAD   __iar_builtin_SMLAD
+    #define __SMLADX  __iar_builtin_SMLADX
+    #define __SMLALD  __iar_builtin_SMLALD
+    #define __SMLALDX __iar_builtin_SMLALDX
+    #define __SMUSD   __iar_builtin_SMUSD
+    #define __SMUSDX  __iar_builtin_SMUSDX
+    #define __SMLSD   __iar_builtin_SMLSD
+    #define __SMLSDX  __iar_builtin_SMLSDX
+    #define __SMLSLD  __iar_builtin_SMLSLD
+    #define __SMLSLDX __iar_builtin_SMLSLDX
+    #define __SEL     __iar_builtin_SEL
+    #define __QADD    __iar_builtin_QADD
+    #define __QSUB    __iar_builtin_QSUB
+    #define __PKHBT   __iar_builtin_PKHBT
+    #define __PKHTB   __iar_builtin_PKHTB
+  #endif
+
+#else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
+
+  #if __IAR_M0_FAMILY
+   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
+    #define __CLZ  __cmsis_iar_clz_not_active
+    #define __SSAT __cmsis_iar_ssat_not_active
+    #define __USAT __cmsis_iar_usat_not_active
+    #define __RBIT __cmsis_iar_rbit_not_active
+    #define __get_APSR  __cmsis_iar_get_APSR_not_active
+  #endif
+
+
+  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
+    #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
+    #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
+  #endif
+
+  #ifdef __INTRINSICS_INCLUDED
+  #error intrinsics.h is already included previously!
+  #endif
+
+  #include <intrinsics.h>
+
+  #if __IAR_M0_FAMILY
+   /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
+    #undef __CLZ
+    #undef __SSAT
+    #undef __USAT
+    #undef __RBIT
+    #undef __get_APSR
+
+    __STATIC_INLINE uint8_t __CLZ(uint32_t data)
+    {
+      if (data == 0U) { return 32U; }
+
+      uint32_t count = 0U;
+      uint32_t mask = 0x80000000U;
+
+      while ((data & mask) == 0U)
+      {
+        count += 1U;
+        mask = mask >> 1U;
+      }
+      return count;
+    }
+
+    __STATIC_INLINE uint32_t __RBIT(uint32_t v)
+    {
+      uint8_t sc = 31U;
+      uint32_t r = v;
+      for (v >>= 1U; v; v >>= 1U)
+      {
+        r <<= 1U;
+        r |= v & 1U;
+        sc--;
+      }
+      return (r << sc);
+    }
+
+    __STATIC_INLINE  uint32_t __get_APSR(void)
+    {
+      uint32_t res;
+      __asm("MRS      %0,APSR" : "=r" (res));
+      return res;
+    }
+
+  #endif
+
+  #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
+         (defined (__FPU_USED   ) && (__FPU_USED    == 1U))     ))
+    #undef __get_FPSCR
+    #undef __set_FPSCR
+    #define __get_FPSCR()       (0)
+    #define __set_FPSCR(VALUE)  ((void)VALUE)
+  #endif
+
+  #pragma diag_suppress=Pe940
+  #pragma diag_suppress=Pe177
+
+  #define __enable_irq    __enable_interrupt
+  #define __disable_irq   __disable_interrupt
+  #define __NOP           __no_operation
+
+  #define __get_xPSR      __get_PSR
+
+  #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
+
+    __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
+    {
+      return __LDREX((unsigned long *)ptr);
+    }
+
+    __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
+    {
+      return __STREX(value, (unsigned long *)ptr);
+    }
+  #endif
+
+
+  /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
+  #if (__CORTEX_M >= 0x03)
+
+    __IAR_FT uint32_t __RRX(uint32_t value)
+    {
+      uint32_t result;
+      __ASM volatile("RRX      %0, %1" : "=r"(result) : "r" (value));
+      return(result);
+    }
+
+    __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
+    {
+      __asm volatile("MSR      BASEPRI_MAX,%0"::"r" (value));
+    }
+
+
+    #define __enable_fault_irq  __enable_fiq
+    #define __disable_fault_irq __disable_fiq
+
+
+  #endif /* (__CORTEX_M >= 0x03) */
+
+  __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
+  {
+    return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
+  }
+
+  #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+       (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+   __IAR_FT uint32_t __get_MSPLIM(void)
+    {
+      uint32_t res;
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure MSPLIM is RAZ/WI
+      res = 0U;
+    #else
+      __asm volatile("MRS      %0,MSPLIM" : "=r" (res));
+    #endif
+      return res;
+    }
+
+    __IAR_FT void   __set_MSPLIM(uint32_t value)
+    {
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure MSPLIM is RAZ/WI
+      (void)value;
+    #else
+      __asm volatile("MSR      MSPLIM,%0" :: "r" (value));
+    #endif
+    }
+
+    __IAR_FT uint32_t __get_PSPLIM(void)
+    {
+      uint32_t res;
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      res = 0U;
+    #else
+      __asm volatile("MRS      %0,PSPLIM" : "=r" (res));
+    #endif
+      return res;
+    }
+
+    __IAR_FT void   __set_PSPLIM(uint32_t value)
+    {
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      (void)value;
+    #else
+      __asm volatile("MSR      PSPLIM,%0" :: "r" (value));
+    #endif
+    }
+
+    __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,CONTROL_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_CONTROL_NS(uint32_t value)
+    {
+      __asm volatile("MSR      CONTROL_NS,%0" :: "r" (value));
+      __iar_builtin_ISB();
+    }
+
+    __IAR_FT uint32_t   __TZ_get_PSP_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,PSP_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_PSP_NS(uint32_t value)
+    {
+      __asm volatile("MSR      PSP_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_MSP_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,MSP_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_MSP_NS(uint32_t value)
+    {
+      __asm volatile("MSR      MSP_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_SP_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,SP_NS" : "=r" (res));
+      return res;
+    }
+    __IAR_FT void   __TZ_set_SP_NS(uint32_t value)
+    {
+      __asm volatile("MSR      SP_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_PRIMASK_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,PRIMASK_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_PRIMASK_NS(uint32_t value)
+    {
+      __asm volatile("MSR      PRIMASK_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_BASEPRI_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,BASEPRI_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_BASEPRI_NS(uint32_t value)
+    {
+      __asm volatile("MSR      BASEPRI_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_FAULTMASK_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,FAULTMASK_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_FAULTMASK_NS(uint32_t value)
+    {
+      __asm volatile("MSR      FAULTMASK_NS,%0" :: "r" (value));
+    }
+
+    __IAR_FT uint32_t   __TZ_get_PSPLIM_NS(void)
+    {
+      uint32_t res;
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      res = 0U;
+    #else
+      __asm volatile("MRS      %0,PSPLIM_NS" : "=r" (res));
+    #endif
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_PSPLIM_NS(uint32_t value)
+    {
+    #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+         (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
+      // without main extensions, the non-secure PSPLIM is RAZ/WI
+      (void)value;
+    #else
+      __asm volatile("MSR      PSPLIM_NS,%0" :: "r" (value));
+    #endif
+    }
+
+    __IAR_FT uint32_t   __TZ_get_MSPLIM_NS(void)
+    {
+      uint32_t res;
+      __asm volatile("MRS      %0,MSPLIM_NS" : "=r" (res));
+      return res;
+    }
+
+    __IAR_FT void   __TZ_set_MSPLIM_NS(uint32_t value)
+    {
+      __asm volatile("MSR      MSPLIM_NS,%0" :: "r" (value));
+    }
+
+  #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
+
+#endif   /* __ICCARM_INTRINSICS_VERSION__ == 2 */
+
+#define __BKPT(value)    __asm volatile ("BKPT     %0" : : "i"(value))
+
+#if __IAR_M0_FAMILY
+  __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
+  {
+    if ((sat >= 1U) && (sat <= 32U))
+    {
+      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+      const int32_t min = -1 - max ;
+      if (val > max)
+      {
+        return max;
+      }
+      else if (val < min)
+      {
+        return min;
+      }
+    }
+    return val;
+  }
+
+  __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
+  {
+    if (sat <= 31U)
+    {
+      const uint32_t max = ((1U << sat) - 1U);
+      if (val > (int32_t)max)
+      {
+        return max;
+      }
+      else if (val < 0)
+      {
+        return 0U;
+      }
+    }
+    return (uint32_t)val;
+  }
+#endif
+
+#if (__CORTEX_M >= 0x03)   /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
+
+  __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
+    return ((uint8_t)res);
+  }
+
+  __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
+    return ((uint16_t)res);
+  }
+
+  __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
+    return res;
+  }
+
+  __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
+  {
+    __ASM volatile ("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
+  }
+
+  __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
+  {
+    __ASM volatile ("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
+  }
+
+  __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
+  {
+    __ASM volatile ("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
+  }
+
+#endif /* (__CORTEX_M >= 0x03) */
+
+#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
+     (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1))    )
+
+
+  __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint8_t)res);
+  }
+
+  __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint16_t)res);
+  }
+
+  __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return res;
+  }
+
+  __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
+  {
+    __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
+  }
+
+  __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
+  {
+    __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
+  }
+
+  __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
+  {
+    __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
+  }
+
+  __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint8_t)res);
+  }
+
+  __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return ((uint16_t)res);
+  }
+
+  __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
+    return res;
+  }
+
+  __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
+    return res;
+  }
+
+  __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
+    return res;
+  }
+
+  __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
+  {
+    uint32_t res;
+    __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
+    return res;
+  }
+
+#endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
+
+#undef __IAR_FT
+#undef __IAR_M0_FAMILY
+#undef __ICCARM_V8
+
+#pragma diag_default=Pe940
+#pragma diag_default=Pe177
+
+#define __SXTB16_RORn(ARG1, ARG2) __SXTB16(__ROR(ARG1, ARG2))
+
+#define __SXTAB16_RORn(ARG1, ARG2, ARG3) __SXTAB16(ARG1, __ROR(ARG2, ARG3))
+
+#endif /* __CMSIS_ICCARM_H__ */
diff --git a/Libraries/CMSIS/Include/cmsis_version.h b/Libraries/CMSIS/Core/Include/cmsis_version.h
similarity index 91%
rename from Libraries/CMSIS/Include/cmsis_version.h
rename to Libraries/CMSIS/Core/Include/cmsis_version.h
index 3174cf60..eb9f7ca3 100644
--- a/Libraries/CMSIS/Include/cmsis_version.h
+++ b/Libraries/CMSIS/Core/Include/cmsis_version.h
@@ -1,39 +1,39 @@
-/**************************************************************************//**
- * @file     cmsis_version.h
- * @brief    CMSIS Core(M) Version definitions
- * @version  V5.0.3
- * @date     24. June 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CMSIS_VERSION_H
-#define __CMSIS_VERSION_H
-
-/*  CMSIS Version definitions */
-#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
-#define __CM_CMSIS_VERSION_SUB   ( 3U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
-#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
-                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
-#endif
+/**************************************************************************//**
+ * @file     cmsis_version.h
+ * @brief    CMSIS Core(M) Version definitions
+ * @version  V5.0.4
+ * @date     23. July 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 ARM Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CMSIS_VERSION_H
+#define __CMSIS_VERSION_H
+
+/*  CMSIS Version definitions */
+#define __CM_CMSIS_VERSION_MAIN  ( 5U)                                      /*!< [31:16] CMSIS Core(M) main version */
+#define __CM_CMSIS_VERSION_SUB   ( 5U)                                      /*!< [15:0]  CMSIS Core(M) sub version */
+#define __CM_CMSIS_VERSION       ((__CM_CMSIS_VERSION_MAIN << 16U) | \
+                                   __CM_CMSIS_VERSION_SUB           )       /*!< CMSIS Core(M) version number */
+#endif
diff --git a/Libraries/CMSIS/Core/Include/core_armv81mml.h b/Libraries/CMSIS/Core/Include/core_armv81mml.h
new file mode 100644
index 00000000..94128a1a
--- /dev/null
+++ b/Libraries/CMSIS/Core/Include/core_armv81mml.h
@@ -0,0 +1,4228 @@
+/**************************************************************************//**
+ * @file     core_armv81mml.h
+ * @brief    CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File
+ * @version  V1.4.2
+ * @date     13. October 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include                        /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header                   /* treat file as system include file */
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic ignored "-Wpedantic"   /* disable pedantic warning due to unnamed structs/unions */
+#endif
+
+#ifndef __CORE_ARMV81MML_H_GENERIC
+#define __CORE_ARMV81MML_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMV81MML
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS ARMV81MML definitions */
+#define __ARMv81MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv81MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv81MML_CMSIS_VERSION       ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv81MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                      (81U)                                       /*!< Cortex-M Core */
+
+#if defined ( __CC_ARM )
+  #error Legacy Arm Compiler does not support Armv8.1-M target architecture.
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV81MML_H_DEPENDANT
+#define __CORE_ARMV81MML_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv81MML_REV
+    #define __ARMv81MML_REV               0x0000U
+    #warning "__ARMv81MML_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #if __FPU_PRESENT != 0U
+    #ifndef __FPU_DP
+      #define __FPU_DP             0U
+      #warning "__FPU_DP not defined in device header file; using default!"
+    #endif
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ICACHE_PRESENT
+    #define __ICACHE_PRESENT          0U
+    #warning "__ICACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DCACHE_PRESENT
+    #define __DCACHE_PRESENT          0U
+    #warning "__DCACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __PMU_PRESENT
+    #define __PMU_PRESENT             0U
+    #warning "__PMU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #if __PMU_PRESENT != 0U
+    #ifndef __PMU_NUM_EVENTCNT
+      #define __PMU_NUM_EVENTCNT      2U
+      #warning "__PMU_NUM_EVENTCNT not defined in device header file; using default!"
+    #elif (__PMU_NUM_EVENTCNT > 31 || __PMU_NUM_EVENTCNT < 2)
+    #error "__PMU_NUM_EVENTCNT is out of range in device header file!" */
+    #endif
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv81MML */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED7[21U];
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x0E4 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x0E8 (R/W)  Secure Fault Address Register */
+        uint32_t RESERVED3[69U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+  __IOM uint32_t RFSR;                   /*!< Offset: 0x204 (R/W)  RAS Fault Status Register */
+        uint32_t RESERVED4[14U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+  __OM  uint32_t BPIALL;                 /*!< Offset: 0x278 ( /W)  Branch Predictor Invalidate All */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_IESB_Pos                  5U                                            /*!< SCB AIRCR: Implicit ESB Enable Position */
+#define SCB_AIRCR_IESB_Msk                 (1UL << SCB_AIRCR_IESB_Pos)                    /*!< SCB AIRCR: Implicit ESB Enable Mask */
+
+#define SCB_AIRCR_DIT_Pos                   4U                                            /*!< SCB AIRCR: Data Independent Timing Position */
+#define SCB_AIRCR_DIT_Msk                  (1UL << SCB_AIRCR_DIT_Pos)                     /*!< SCB AIRCR: Data Independent Timing Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_TRD_Pos                    20U                                            /*!< SCB CCR: TRD Position */
+#define SCB_CCR_TRD_Msk                    (1UL << SCB_CCR_TRD_Pos)                       /*!< SCB CCR: TRD Mask */
+
+#define SCB_CCR_LOB_Pos                    19U                                            /*!< SCB CCR: LOB Position */
+#define SCB_CCR_LOB_Msk                    (1UL << SCB_CCR_LOB_Pos)                       /*!< SCB CCR: LOB Mask */
+
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 5U)                 /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_PMU_Pos                    5U                                            /*!< SCB DFSR: PMU Position */
+#define SCB_DFSR_PMU_Msk                   (1UL << SCB_DFSR_PMU_Pos)                      /*!< SCB DFSR: PMU Mask */
+
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CP7_Pos                   7U                                            /*!< SCB NSACR: CP7 Position */
+#define SCB_NSACR_CP7_Msk                  (1UL << SCB_NSACR_CP7_Pos)                     /*!< SCB NSACR: CP7 Mask */
+
+#define SCB_NSACR_CP6_Pos                   6U                                            /*!< SCB NSACR: CP6 Position */
+#define SCB_NSACR_CP6_Msk                  (1UL << SCB_NSACR_CP6_Pos)                     /*!< SCB NSACR: CP6 Mask */
+
+#define SCB_NSACR_CP5_Pos                   5U                                            /*!< SCB NSACR: CP5 Position */
+#define SCB_NSACR_CP5_Msk                  (1UL << SCB_NSACR_CP5_Pos)                     /*!< SCB NSACR: CP5 Mask */
+
+#define SCB_NSACR_CP4_Pos                   4U                                            /*!< SCB NSACR: CP4 Position */
+#define SCB_NSACR_CP4_Msk                  (1UL << SCB_NSACR_CP4_Pos)                     /*!< SCB NSACR: CP4 Mask */
+
+#define SCB_NSACR_CP3_Pos                   3U                                            /*!< SCB NSACR: CP3 Position */
+#define SCB_NSACR_CP3_Msk                  (1UL << SCB_NSACR_CP3_Pos)                     /*!< SCB NSACR: CP3 Mask */
+
+#define SCB_NSACR_CP2_Pos                   2U                                            /*!< SCB NSACR: CP2 Position */
+#define SCB_NSACR_CP2_Msk                  (1UL << SCB_NSACR_CP2_Pos)                     /*!< SCB NSACR: CP2 Mask */
+
+#define SCB_NSACR_CP1_Pos                   1U                                            /*!< SCB NSACR: CP1 Position */
+#define SCB_NSACR_CP1_Msk                  (1UL << SCB_NSACR_CP1_Pos)                     /*!< SCB NSACR: CP1 Mask */
+
+#define SCB_NSACR_CP0_Pos                   0U                                            /*!< SCB NSACR: CP0 Position */
+#define SCB_NSACR_CP0_Msk                  (1UL /*<< SCB_NSACR_CP0_Pos*/)                 /*!< SCB NSACR: CP0 Mask */
+
+/* SCB Debug Feature Register 0 Definitions */
+#define SCB_ID_DFR_UDE_Pos                 28U                                            /*!< SCB ID_DFR: UDE Position */
+#define SCB_ID_DFR_UDE_Msk                 (0xFUL << SCB_ID_DFR_UDE_Pos)                  /*!< SCB ID_DFR: UDE Mask */
+
+#define SCB_ID_DFR_MProfDbg_Pos            20U                                            /*!< SCB ID_DFR: MProfDbg Position */
+#define SCB_ID_DFR_MProfDbg_Msk            (0xFUL << SCB_ID_DFR_MProfDbg_Pos)             /*!< SCB ID_DFR: MProfDbg Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB RAS Fault Status Register Definitions */
+#define SCB_RFSR_V_Pos                     31U                                            /*!< SCB RFSR: V Position */
+#define SCB_RFSR_V_Msk                     (1UL << SCB_RFSR_V_Pos)                        /*!< SCB RFSR: V Mask */
+
+#define SCB_RFSR_IS_Pos                    16U                                            /*!< SCB RFSR: IS Position */
+#define SCB_RFSR_IS_Msk                    (0x7FFFUL << SCB_RFSR_IS_Pos)                  /*!< SCB RFSR: IS Mask */
+
+#define SCB_RFSR_UET_Pos                    0U                                            /*!< SCB RFSR: UET Position */
+#define SCB_RFSR_UET_Msk                   (3UL /*<< SCB_RFSR_UET_Pos*/)                  /*!< SCB RFSR: UET Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[3U];
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  ITM Device Type Register */
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[809U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
+        uint32_t RESERVED4[4U];
+  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
+#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFmt_Pos                  0U                                         /*!< TPI FFCR: EnFmt Position */
+#define TPI_FFCR_EnFmt_Msk                 (0x3UL << /*TPI_FFCR_EnFmt_Pos*/)           /*!< TPI FFCR: EnFmt Mask */
+
+/* TPI Periodic Synchronization Control Register Definitions */
+#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
+#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
+
+/* TPI Software Lock Status Register Definitions */
+#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
+#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
+
+#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
+#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
+
+#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
+#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_PMU     Performance Monitoring Unit (PMU)
+  \brief    Type definitions for the Performance Monitoring Unit (PMU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Performance Monitoring Unit (PMU).
+ */
+typedef struct
+{
+  __IOM uint32_t EVCNTR[__PMU_NUM_EVENTCNT];        /*!< Offset: 0x0 (R/W)    PMU Event Counter Registers */
+#if __PMU_NUM_EVENTCNT<31
+        uint32_t RESERVED0[31U-__PMU_NUM_EVENTCNT];
+#endif
+  __IOM uint32_t CCNTR;                             /*!< Offset: 0x7C (R/W)   PMU Cycle Counter Register */
+        uint32_t RESERVED1[224];
+  __IOM uint32_t EVTYPER[__PMU_NUM_EVENTCNT];       /*!< Offset: 0x400 (R/W)  PMU Event Type and Filter Registers */
+#if __PMU_NUM_EVENTCNT<31
+        uint32_t RESERVED2[31U-__PMU_NUM_EVENTCNT];
+#endif
+  __IOM uint32_t CCFILTR;                           /*!< Offset: 0x47C (R/W)  PMU Cycle Counter Filter Register */
+        uint32_t RESERVED3[480];
+  __IOM uint32_t CNTENSET;                          /*!< Offset: 0xC00 (R/W)  PMU Count Enable Set Register */
+        uint32_t RESERVED4[7];
+  __IOM uint32_t CNTENCLR;                          /*!< Offset: 0xC20 (R/W)  PMU Count Enable Clear Register */
+        uint32_t RESERVED5[7];
+  __IOM uint32_t INTENSET;                          /*!< Offset: 0xC40 (R/W)  PMU Interrupt Enable Set Register */
+        uint32_t RESERVED6[7];
+  __IOM uint32_t INTENCLR;                          /*!< Offset: 0xC60 (R/W)  PMU Interrupt Enable Clear Register */
+        uint32_t RESERVED7[7];
+  __IOM uint32_t OVSCLR;                            /*!< Offset: 0xC80 (R/W)  PMU Overflow Flag Status Clear Register */
+        uint32_t RESERVED8[7];
+  __IOM uint32_t SWINC;                             /*!< Offset: 0xCA0 (R/W)  PMU Software Increment Register */
+        uint32_t RESERVED9[7];
+  __IOM uint32_t OVSSET;                            /*!< Offset: 0xCC0 (R/W)  PMU Overflow Flag Status Set Register */
+        uint32_t RESERVED10[79];
+  __IOM uint32_t TYPE;                              /*!< Offset: 0xE00 (R/W)  PMU Type Register */
+  __IOM uint32_t CTRL;                              /*!< Offset: 0xE04 (R/W)  PMU Control Register */
+        uint32_t RESERVED11[108];
+  __IOM uint32_t AUTHSTATUS;                        /*!< Offset: 0xFB8 (R/W)  PMU Authentication Status Register */
+  __IOM uint32_t DEVARCH;                           /*!< Offset: 0xFBC (R/W)  PMU Device Architecture Register */
+        uint32_t RESERVED12[3];
+  __IOM uint32_t DEVTYPE;                           /*!< Offset: 0xFCC (R/W)  PMU Device Type Register */
+  __IOM uint32_t PIDR4;                             /*!< Offset: 0xFD0 (R/W)  PMU Peripheral Identification Register 4 */
+        uint32_t RESERVED13[3];
+  __IOM uint32_t PIDR0;                             /*!< Offset: 0xFE0 (R/W)  PMU Peripheral Identification Register 0 */
+  __IOM uint32_t PIDR1;                             /*!< Offset: 0xFE4 (R/W)  PMU Peripheral Identification Register 1 */
+  __IOM uint32_t PIDR2;                             /*!< Offset: 0xFE8 (R/W)  PMU Peripheral Identification Register 2 */
+  __IOM uint32_t PIDR3;                             /*!< Offset: 0xFEC (R/W)  PMU Peripheral Identification Register 3 */
+  __IOM uint32_t CIDR0;                             /*!< Offset: 0xFF0 (R/W)  PMU Component Identification Register 0 */
+  __IOM uint32_t CIDR1;                             /*!< Offset: 0xFF4 (R/W)  PMU Component Identification Register 1 */
+  __IOM uint32_t CIDR2;                             /*!< Offset: 0xFF8 (R/W)  PMU Component Identification Register 2 */
+  __IOM uint32_t CIDR3;                             /*!< Offset: 0xFFC (R/W)  PMU Component Identification Register 3 */
+} PMU_Type;
+
+/** \brief PMU Event Counter Registers (0-30) Definitions  */
+
+#define PMU_EVCNTR_CNT_Pos                    0U                                           /*!< PMU EVCNTR: Counter Position */
+#define PMU_EVCNTR_CNT_Msk                   (0xFFFFUL /*<< PMU_EVCNTRx_CNT_Pos*/)         /*!< PMU EVCNTR: Counter Mask */
+
+/** \brief PMU Event Type and Filter Registers (0-30) Definitions  */
+
+#define PMU_EVTYPER_EVENTTOCNT_Pos            0U                                           /*!< PMU EVTYPER: Event to Count Position */
+#define PMU_EVTYPER_EVENTTOCNT_Msk           (0xFFFFUL /*<< EVTYPERx_EVENTTOCNT_Pos*/)     /*!< PMU EVTYPER: Event to Count Mask */
+
+/** \brief PMU Count Enable Set Register Definitions */
+
+#define PMU_CNTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU CNTENSET: Event Counter 0 Enable Set Position */
+#define PMU_CNTENSET_CNT0_ENABLE_Msk         (1UL /*<< PMU_CNTENSET_CNT0_ENABLE_Pos*/)     /*!< PMU CNTENSET: Event Counter 0 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT1_ENABLE_Pos          1U                                           /*!< PMU CNTENSET: Event Counter 1 Enable Set Position */
+#define PMU_CNTENSET_CNT1_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT1_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 1 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT2_ENABLE_Pos          2U                                           /*!< PMU CNTENSET: Event Counter 2 Enable Set Position */
+#define PMU_CNTENSET_CNT2_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT2_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 2 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT3_ENABLE_Pos          3U                                           /*!< PMU CNTENSET: Event Counter 3 Enable Set Position */
+#define PMU_CNTENSET_CNT3_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT3_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 3 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT4_ENABLE_Pos          4U                                           /*!< PMU CNTENSET: Event Counter 4 Enable Set Position */
+#define PMU_CNTENSET_CNT4_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT4_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 4 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT5_ENABLE_Pos          5U                                           /*!< PMU CNTENSET: Event Counter 5 Enable Set Position */
+#define PMU_CNTENSET_CNT5_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT5_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 5 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT6_ENABLE_Pos          6U                                           /*!< PMU CNTENSET: Event Counter 6 Enable Set Position */
+#define PMU_CNTENSET_CNT6_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT6_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 6 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT7_ENABLE_Pos          7U                                           /*!< PMU CNTENSET: Event Counter 7 Enable Set Position */
+#define PMU_CNTENSET_CNT7_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT7_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 7 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT8_ENABLE_Pos          8U                                           /*!< PMU CNTENSET: Event Counter 8 Enable Set Position */
+#define PMU_CNTENSET_CNT8_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT8_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 8 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT9_ENABLE_Pos          9U                                           /*!< PMU CNTENSET: Event Counter 9 Enable Set Position */
+#define PMU_CNTENSET_CNT9_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT9_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 9 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT10_ENABLE_Pos         10U                                          /*!< PMU CNTENSET: Event Counter 10 Enable Set Position */
+#define PMU_CNTENSET_CNT10_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT10_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 10 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT11_ENABLE_Pos         11U                                          /*!< PMU CNTENSET: Event Counter 11 Enable Set Position */
+#define PMU_CNTENSET_CNT11_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT11_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 11 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT12_ENABLE_Pos         12U                                          /*!< PMU CNTENSET: Event Counter 12 Enable Set Position */
+#define PMU_CNTENSET_CNT12_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT12_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 12 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT13_ENABLE_Pos         13U                                          /*!< PMU CNTENSET: Event Counter 13 Enable Set Position */
+#define PMU_CNTENSET_CNT13_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT13_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 13 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT14_ENABLE_Pos         14U                                          /*!< PMU CNTENSET: Event Counter 14 Enable Set Position */
+#define PMU_CNTENSET_CNT14_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT14_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 14 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT15_ENABLE_Pos         15U                                          /*!< PMU CNTENSET: Event Counter 15 Enable Set Position */
+#define PMU_CNTENSET_CNT15_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT15_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 15 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT16_ENABLE_Pos         16U                                          /*!< PMU CNTENSET: Event Counter 16 Enable Set Position */
+#define PMU_CNTENSET_CNT16_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT16_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 16 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT17_ENABLE_Pos         17U                                          /*!< PMU CNTENSET: Event Counter 17 Enable Set Position */
+#define PMU_CNTENSET_CNT17_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT17_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 17 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT18_ENABLE_Pos         18U                                          /*!< PMU CNTENSET: Event Counter 18 Enable Set Position */
+#define PMU_CNTENSET_CNT18_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT18_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 18 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT19_ENABLE_Pos         19U                                          /*!< PMU CNTENSET: Event Counter 19 Enable Set Position */
+#define PMU_CNTENSET_CNT19_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT19_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 19 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT20_ENABLE_Pos         20U                                          /*!< PMU CNTENSET: Event Counter 20 Enable Set Position */
+#define PMU_CNTENSET_CNT20_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT20_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 20 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT21_ENABLE_Pos         21U                                          /*!< PMU CNTENSET: Event Counter 21 Enable Set Position */
+#define PMU_CNTENSET_CNT21_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT21_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 21 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT22_ENABLE_Pos         22U                                          /*!< PMU CNTENSET: Event Counter 22 Enable Set Position */
+#define PMU_CNTENSET_CNT22_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT22_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 22 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT23_ENABLE_Pos         23U                                          /*!< PMU CNTENSET: Event Counter 23 Enable Set Position */
+#define PMU_CNTENSET_CNT23_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT23_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 23 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT24_ENABLE_Pos         24U                                          /*!< PMU CNTENSET: Event Counter 24 Enable Set Position */
+#define PMU_CNTENSET_CNT24_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT24_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 24 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT25_ENABLE_Pos         25U                                          /*!< PMU CNTENSET: Event Counter 25 Enable Set Position */
+#define PMU_CNTENSET_CNT25_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT25_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 25 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT26_ENABLE_Pos         26U                                          /*!< PMU CNTENSET: Event Counter 26 Enable Set Position */
+#define PMU_CNTENSET_CNT26_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT26_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 26 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT27_ENABLE_Pos         27U                                          /*!< PMU CNTENSET: Event Counter 27 Enable Set Position */
+#define PMU_CNTENSET_CNT27_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT27_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 27 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT28_ENABLE_Pos         28U                                          /*!< PMU CNTENSET: Event Counter 28 Enable Set Position */
+#define PMU_CNTENSET_CNT28_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT28_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 28 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT29_ENABLE_Pos         29U                                          /*!< PMU CNTENSET: Event Counter 29 Enable Set Position */
+#define PMU_CNTENSET_CNT29_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT29_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 29 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT30_ENABLE_Pos         30U                                          /*!< PMU CNTENSET: Event Counter 30 Enable Set Position */
+#define PMU_CNTENSET_CNT30_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT30_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 30 Enable Set Mask */
+
+#define PMU_CNTENSET_CCNTR_ENABLE_Pos         31U                                          /*!< PMU CNTENSET: Cycle Counter Enable Set Position */
+#define PMU_CNTENSET_CCNTR_ENABLE_Msk        (1UL << PMU_CNTENSET_CCNTR_ENABLE_Pos)        /*!< PMU CNTENSET: Cycle Counter Enable Set Mask */
+
+/** \brief PMU Count Enable Clear Register Definitions */
+
+#define PMU_CNTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Position */
+#define PMU_CNTENCLR_CNT0_ENABLE_Msk         (1UL /*<< PMU_CNTENCLR_CNT0_ENABLE_Pos*/)     /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT1_ENABLE_Pos          1U                                           /*!< PMU CNTENCLR: Event Counter 1 Enable Clear Position */
+#define PMU_CNTENCLR_CNT1_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT1_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 1 Enable Clear */
+
+#define PMU_CNTENCLR_CNT2_ENABLE_Pos          2U                                           /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Position */
+#define PMU_CNTENCLR_CNT2_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT2_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT3_ENABLE_Pos          3U                                           /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Position */
+#define PMU_CNTENCLR_CNT3_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT3_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT4_ENABLE_Pos          4U                                           /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Position */
+#define PMU_CNTENCLR_CNT4_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT4_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT5_ENABLE_Pos          5U                                           /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Position */
+#define PMU_CNTENCLR_CNT5_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT5_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT6_ENABLE_Pos          6U                                           /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Position */
+#define PMU_CNTENCLR_CNT6_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT6_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT7_ENABLE_Pos          7U                                           /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Position */
+#define PMU_CNTENCLR_CNT7_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT7_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT8_ENABLE_Pos          8U                                           /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Position */
+#define PMU_CNTENCLR_CNT8_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT8_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT9_ENABLE_Pos          9U                                           /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Position */
+#define PMU_CNTENCLR_CNT9_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT9_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT10_ENABLE_Pos         10U                                          /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Position */
+#define PMU_CNTENCLR_CNT10_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT10_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT11_ENABLE_Pos         11U                                          /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Position */
+#define PMU_CNTENCLR_CNT11_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT11_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT12_ENABLE_Pos         12U                                          /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Position */
+#define PMU_CNTENCLR_CNT12_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT12_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT13_ENABLE_Pos         13U                                          /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Position */
+#define PMU_CNTENCLR_CNT13_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT13_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT14_ENABLE_Pos         14U                                          /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Position */
+#define PMU_CNTENCLR_CNT14_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT14_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT15_ENABLE_Pos         15U                                          /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Position */
+#define PMU_CNTENCLR_CNT15_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT15_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT16_ENABLE_Pos         16U                                          /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Position */
+#define PMU_CNTENCLR_CNT16_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT16_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT17_ENABLE_Pos         17U                                          /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Position */
+#define PMU_CNTENCLR_CNT17_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT17_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT18_ENABLE_Pos         18U                                          /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Position */
+#define PMU_CNTENCLR_CNT18_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT18_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT19_ENABLE_Pos         19U                                          /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Position */
+#define PMU_CNTENCLR_CNT19_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT19_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT20_ENABLE_Pos         20U                                          /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Position */
+#define PMU_CNTENCLR_CNT20_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT20_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT21_ENABLE_Pos         21U                                          /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Position */
+#define PMU_CNTENCLR_CNT21_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT21_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT22_ENABLE_Pos         22U                                          /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Position */
+#define PMU_CNTENCLR_CNT22_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT22_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT23_ENABLE_Pos         23U                                          /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Position */
+#define PMU_CNTENCLR_CNT23_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT23_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT24_ENABLE_Pos         24U                                          /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Position */
+#define PMU_CNTENCLR_CNT24_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT24_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT25_ENABLE_Pos         25U                                          /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Position */
+#define PMU_CNTENCLR_CNT25_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT25_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT26_ENABLE_Pos         26U                                          /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Position */
+#define PMU_CNTENCLR_CNT26_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT26_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT27_ENABLE_Pos         27U                                          /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Position */
+#define PMU_CNTENCLR_CNT27_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT27_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT28_ENABLE_Pos         28U                                          /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Position */
+#define PMU_CNTENCLR_CNT28_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT28_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT29_ENABLE_Pos         29U                                          /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Position */
+#define PMU_CNTENCLR_CNT29_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT29_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT30_ENABLE_Pos         30U                                          /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Position */
+#define PMU_CNTENCLR_CNT30_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT30_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CCNTR_ENABLE_Pos         31U                                          /*!< PMU CNTENCLR: Cycle Counter Enable Clear Position */
+#define PMU_CNTENCLR_CCNTR_ENABLE_Msk        (1UL << PMU_CNTENCLR_CCNTR_ENABLE_Pos)        /*!< PMU CNTENCLR: Cycle Counter Enable Clear Mask */
+
+/** \brief PMU Interrupt Enable Set Register Definitions */
+
+#define PMU_INTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT0_ENABLE_Msk         (1UL /*<< PMU_INTENSET_CNT0_ENABLE_Pos*/)     /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT1_ENABLE_Pos          1U                                           /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT1_ENABLE_Msk         (1UL << PMU_INTENSET_CNT1_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT2_ENABLE_Pos          2U                                           /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT2_ENABLE_Msk         (1UL << PMU_INTENSET_CNT2_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT3_ENABLE_Pos          3U                                           /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT3_ENABLE_Msk         (1UL << PMU_INTENSET_CNT3_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT4_ENABLE_Pos          4U                                           /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT4_ENABLE_Msk         (1UL << PMU_INTENSET_CNT4_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT5_ENABLE_Pos          5U                                           /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT5_ENABLE_Msk         (1UL << PMU_INTENSET_CNT5_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT6_ENABLE_Pos          6U                                           /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT6_ENABLE_Msk         (1UL << PMU_INTENSET_CNT6_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT7_ENABLE_Pos          7U                                           /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT7_ENABLE_Msk         (1UL << PMU_INTENSET_CNT7_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT8_ENABLE_Pos          8U                                           /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT8_ENABLE_Msk         (1UL << PMU_INTENSET_CNT8_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT9_ENABLE_Pos          9U                                           /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT9_ENABLE_Msk         (1UL << PMU_INTENSET_CNT9_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT10_ENABLE_Pos         10U                                          /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT10_ENABLE_Msk        (1UL << PMU_INTENSET_CNT10_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT11_ENABLE_Pos         11U                                          /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT11_ENABLE_Msk        (1UL << PMU_INTENSET_CNT11_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT12_ENABLE_Pos         12U                                          /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT12_ENABLE_Msk        (1UL << PMU_INTENSET_CNT12_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT13_ENABLE_Pos         13U                                          /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT13_ENABLE_Msk        (1UL << PMU_INTENSET_CNT13_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT14_ENABLE_Pos         14U                                          /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT14_ENABLE_Msk        (1UL << PMU_INTENSET_CNT14_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT15_ENABLE_Pos         15U                                          /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT15_ENABLE_Msk        (1UL << PMU_INTENSET_CNT15_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT16_ENABLE_Pos         16U                                          /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT16_ENABLE_Msk        (1UL << PMU_INTENSET_CNT16_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT17_ENABLE_Pos         17U                                          /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT17_ENABLE_Msk        (1UL << PMU_INTENSET_CNT17_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT18_ENABLE_Pos         18U                                          /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT18_ENABLE_Msk        (1UL << PMU_INTENSET_CNT18_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT19_ENABLE_Pos         19U                                          /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT19_ENABLE_Msk        (1UL << PMU_INTENSET_CNT19_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT20_ENABLE_Pos         20U                                          /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT20_ENABLE_Msk        (1UL << PMU_INTENSET_CNT20_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT21_ENABLE_Pos         21U                                          /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT21_ENABLE_Msk        (1UL << PMU_INTENSET_CNT21_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT22_ENABLE_Pos         22U                                          /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT22_ENABLE_Msk        (1UL << PMU_INTENSET_CNT22_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT23_ENABLE_Pos         23U                                          /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT23_ENABLE_Msk        (1UL << PMU_INTENSET_CNT23_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT24_ENABLE_Pos         24U                                          /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT24_ENABLE_Msk        (1UL << PMU_INTENSET_CNT24_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT25_ENABLE_Pos         25U                                          /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT25_ENABLE_Msk        (1UL << PMU_INTENSET_CNT25_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT26_ENABLE_Pos         26U                                          /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT26_ENABLE_Msk        (1UL << PMU_INTENSET_CNT26_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT27_ENABLE_Pos         27U                                          /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT27_ENABLE_Msk        (1UL << PMU_INTENSET_CNT27_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT28_ENABLE_Pos         28U                                          /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT28_ENABLE_Msk        (1UL << PMU_INTENSET_CNT28_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT29_ENABLE_Pos         29U                                          /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT29_ENABLE_Msk        (1UL << PMU_INTENSET_CNT29_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT30_ENABLE_Pos         30U                                          /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT30_ENABLE_Msk        (1UL << PMU_INTENSET_CNT30_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CYCCNT_ENABLE_Pos        31U                                          /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Position */
+#define PMU_INTENSET_CCYCNT_ENABLE_Msk       (1UL << PMU_INTENSET_CYCCNT_ENABLE_Pos)       /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Mask */
+
+/** \brief PMU Interrupt Enable Clear Register Definitions */
+
+#define PMU_INTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT0_ENABLE_Msk         (1UL /*<< PMU_INTENCLR_CNT0_ENABLE_Pos*/)     /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT1_ENABLE_Pos          1U                                           /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT1_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT1_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear */
+
+#define PMU_INTENCLR_CNT2_ENABLE_Pos          2U                                           /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT2_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT2_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT3_ENABLE_Pos          3U                                           /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT3_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT3_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT4_ENABLE_Pos          4U                                           /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT4_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT4_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT5_ENABLE_Pos          5U                                           /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT5_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT5_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT6_ENABLE_Pos          6U                                           /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT6_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT6_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT7_ENABLE_Pos          7U                                           /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT7_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT7_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT8_ENABLE_Pos          8U                                           /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT8_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT8_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT9_ENABLE_Pos          9U                                           /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT9_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT9_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT10_ENABLE_Pos         10U                                          /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT10_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT10_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT11_ENABLE_Pos         11U                                          /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT11_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT11_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT12_ENABLE_Pos         12U                                          /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT12_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT12_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT13_ENABLE_Pos         13U                                          /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT13_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT13_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT14_ENABLE_Pos         14U                                          /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT14_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT14_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT15_ENABLE_Pos         15U                                          /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT15_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT15_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT16_ENABLE_Pos         16U                                          /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT16_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT16_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT17_ENABLE_Pos         17U                                          /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT17_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT17_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT18_ENABLE_Pos         18U                                          /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT18_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT18_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT19_ENABLE_Pos         19U                                          /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT19_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT19_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT20_ENABLE_Pos         20U                                          /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT20_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT20_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT21_ENABLE_Pos         21U                                          /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT21_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT21_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT22_ENABLE_Pos         22U                                          /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT22_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT22_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT23_ENABLE_Pos         23U                                          /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT23_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT23_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT24_ENABLE_Pos         24U                                          /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT24_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT24_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT25_ENABLE_Pos         25U                                          /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT25_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT25_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT26_ENABLE_Pos         26U                                          /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT26_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT26_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT27_ENABLE_Pos         27U                                          /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT27_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT27_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT28_ENABLE_Pos         28U                                          /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT28_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT28_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT29_ENABLE_Pos         29U                                          /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT29_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT29_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT30_ENABLE_Pos         30U                                          /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT30_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT30_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CYCCNT_ENABLE_Pos        31U                                          /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CYCCNT_ENABLE_Msk       (1UL << PMU_INTENCLR_CYCCNT_ENABLE_Pos)       /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Mask */
+
+/** \brief PMU Overflow Flag Status Set Register Definitions */
+
+#define PMU_OVSSET_CNT0_STATUS_Pos            0U                                           /*!< PMU OVSSET: Event Counter 0 Overflow Set Position */
+#define PMU_OVSSET_CNT0_STATUS_Msk           (1UL /*<< PMU_OVSSET_CNT0_STATUS_Pos*/)       /*!< PMU OVSSET: Event Counter 0 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT1_STATUS_Pos            1U                                           /*!< PMU OVSSET: Event Counter 1 Overflow Set Position */
+#define PMU_OVSSET_CNT1_STATUS_Msk           (1UL << PMU_OVSSET_CNT1_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 1 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT2_STATUS_Pos            2U                                           /*!< PMU OVSSET: Event Counter 2 Overflow Set Position */
+#define PMU_OVSSET_CNT2_STATUS_Msk           (1UL << PMU_OVSSET_CNT2_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 2 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT3_STATUS_Pos            3U                                           /*!< PMU OVSSET: Event Counter 3 Overflow Set Position */
+#define PMU_OVSSET_CNT3_STATUS_Msk           (1UL << PMU_OVSSET_CNT3_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 3 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT4_STATUS_Pos            4U                                           /*!< PMU OVSSET: Event Counter 4 Overflow Set Position */
+#define PMU_OVSSET_CNT4_STATUS_Msk           (1UL << PMU_OVSSET_CNT4_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 4 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT5_STATUS_Pos            5U                                           /*!< PMU OVSSET: Event Counter 5 Overflow Set Position */
+#define PMU_OVSSET_CNT5_STATUS_Msk           (1UL << PMU_OVSSET_CNT5_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 5 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT6_STATUS_Pos            6U                                           /*!< PMU OVSSET: Event Counter 6 Overflow Set Position */
+#define PMU_OVSSET_CNT6_STATUS_Msk           (1UL << PMU_OVSSET_CNT6_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 6 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT7_STATUS_Pos            7U                                           /*!< PMU OVSSET: Event Counter 7 Overflow Set Position */
+#define PMU_OVSSET_CNT7_STATUS_Msk           (1UL << PMU_OVSSET_CNT7_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 7 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT8_STATUS_Pos            8U                                           /*!< PMU OVSSET: Event Counter 8 Overflow Set Position */
+#define PMU_OVSSET_CNT8_STATUS_Msk           (1UL << PMU_OVSSET_CNT8_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 8 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT9_STATUS_Pos            9U                                           /*!< PMU OVSSET: Event Counter 9 Overflow Set Position */
+#define PMU_OVSSET_CNT9_STATUS_Msk           (1UL << PMU_OVSSET_CNT9_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 9 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT10_STATUS_Pos           10U                                          /*!< PMU OVSSET: Event Counter 10 Overflow Set Position */
+#define PMU_OVSSET_CNT10_STATUS_Msk          (1UL << PMU_OVSSET_CNT10_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 10 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT11_STATUS_Pos           11U                                          /*!< PMU OVSSET: Event Counter 11 Overflow Set Position */
+#define PMU_OVSSET_CNT11_STATUS_Msk          (1UL << PMU_OVSSET_CNT11_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 11 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT12_STATUS_Pos           12U                                          /*!< PMU OVSSET: Event Counter 12 Overflow Set Position */
+#define PMU_OVSSET_CNT12_STATUS_Msk          (1UL << PMU_OVSSET_CNT12_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 12 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT13_STATUS_Pos           13U                                          /*!< PMU OVSSET: Event Counter 13 Overflow Set Position */
+#define PMU_OVSSET_CNT13_STATUS_Msk          (1UL << PMU_OVSSET_CNT13_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 13 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT14_STATUS_Pos           14U                                          /*!< PMU OVSSET: Event Counter 14 Overflow Set Position */
+#define PMU_OVSSET_CNT14_STATUS_Msk          (1UL << PMU_OVSSET_CNT14_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 14 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT15_STATUS_Pos           15U                                          /*!< PMU OVSSET: Event Counter 15 Overflow Set Position */
+#define PMU_OVSSET_CNT15_STATUS_Msk          (1UL << PMU_OVSSET_CNT15_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 15 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT16_STATUS_Pos           16U                                          /*!< PMU OVSSET: Event Counter 16 Overflow Set Position */
+#define PMU_OVSSET_CNT16_STATUS_Msk          (1UL << PMU_OVSSET_CNT16_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 16 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT17_STATUS_Pos           17U                                          /*!< PMU OVSSET: Event Counter 17 Overflow Set Position */
+#define PMU_OVSSET_CNT17_STATUS_Msk          (1UL << PMU_OVSSET_CNT17_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 17 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT18_STATUS_Pos           18U                                          /*!< PMU OVSSET: Event Counter 18 Overflow Set Position */
+#define PMU_OVSSET_CNT18_STATUS_Msk          (1UL << PMU_OVSSET_CNT18_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 18 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT19_STATUS_Pos           19U                                          /*!< PMU OVSSET: Event Counter 19 Overflow Set Position */
+#define PMU_OVSSET_CNT19_STATUS_Msk          (1UL << PMU_OVSSET_CNT19_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 19 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT20_STATUS_Pos           20U                                          /*!< PMU OVSSET: Event Counter 20 Overflow Set Position */
+#define PMU_OVSSET_CNT20_STATUS_Msk          (1UL << PMU_OVSSET_CNT20_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 20 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT21_STATUS_Pos           21U                                          /*!< PMU OVSSET: Event Counter 21 Overflow Set Position */
+#define PMU_OVSSET_CNT21_STATUS_Msk          (1UL << PMU_OVSSET_CNT21_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 21 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT22_STATUS_Pos           22U                                          /*!< PMU OVSSET: Event Counter 22 Overflow Set Position */
+#define PMU_OVSSET_CNT22_STATUS_Msk          (1UL << PMU_OVSSET_CNT22_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 22 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT23_STATUS_Pos           23U                                          /*!< PMU OVSSET: Event Counter 23 Overflow Set Position */
+#define PMU_OVSSET_CNT23_STATUS_Msk          (1UL << PMU_OVSSET_CNT23_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 23 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT24_STATUS_Pos           24U                                          /*!< PMU OVSSET: Event Counter 24 Overflow Set Position */
+#define PMU_OVSSET_CNT24_STATUS_Msk          (1UL << PMU_OVSSET_CNT24_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 24 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT25_STATUS_Pos           25U                                          /*!< PMU OVSSET: Event Counter 25 Overflow Set Position */
+#define PMU_OVSSET_CNT25_STATUS_Msk          (1UL << PMU_OVSSET_CNT25_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 25 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT26_STATUS_Pos           26U                                          /*!< PMU OVSSET: Event Counter 26 Overflow Set Position */
+#define PMU_OVSSET_CNT26_STATUS_Msk          (1UL << PMU_OVSSET_CNT26_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 26 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT27_STATUS_Pos           27U                                          /*!< PMU OVSSET: Event Counter 27 Overflow Set Position */
+#define PMU_OVSSET_CNT27_STATUS_Msk          (1UL << PMU_OVSSET_CNT27_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 27 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT28_STATUS_Pos           28U                                          /*!< PMU OVSSET: Event Counter 28 Overflow Set Position */
+#define PMU_OVSSET_CNT28_STATUS_Msk          (1UL << PMU_OVSSET_CNT28_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 28 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT29_STATUS_Pos           29U                                          /*!< PMU OVSSET: Event Counter 29 Overflow Set Position */
+#define PMU_OVSSET_CNT29_STATUS_Msk          (1UL << PMU_OVSSET_CNT29_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 29 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT30_STATUS_Pos           30U                                          /*!< PMU OVSSET: Event Counter 30 Overflow Set Position */
+#define PMU_OVSSET_CNT30_STATUS_Msk          (1UL << PMU_OVSSET_CNT30_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 30 Overflow Set Mask */
+
+#define PMU_OVSSET_CYCCNT_STATUS_Pos          31U                                          /*!< PMU OVSSET: Cycle Counter Overflow Set Position */
+#define PMU_OVSSET_CYCCNT_STATUS_Msk         (1UL << PMU_OVSSET_CYCCNT_STATUS_Pos)         /*!< PMU OVSSET: Cycle Counter Overflow Set Mask */
+
+/** \brief PMU Overflow Flag Status Clear Register Definitions */
+
+#define PMU_OVSCLR_CNT0_STATUS_Pos            0U                                           /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Position */
+#define PMU_OVSCLR_CNT0_STATUS_Msk           (1UL /*<< PMU_OVSCLR_CNT0_STATUS_Pos*/)       /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT1_STATUS_Pos            1U                                           /*!< PMU OVSCLR: Event Counter 1 Overflow Clear Position */
+#define PMU_OVSCLR_CNT1_STATUS_Msk           (1UL << PMU_OVSCLR_CNT1_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 1 Overflow Clear */
+
+#define PMU_OVSCLR_CNT2_STATUS_Pos            2U                                           /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Position */
+#define PMU_OVSCLR_CNT2_STATUS_Msk           (1UL << PMU_OVSCLR_CNT2_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT3_STATUS_Pos            3U                                           /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Position */
+#define PMU_OVSCLR_CNT3_STATUS_Msk           (1UL << PMU_OVSCLR_CNT3_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT4_STATUS_Pos            4U                                           /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Position */
+#define PMU_OVSCLR_CNT4_STATUS_Msk           (1UL << PMU_OVSCLR_CNT4_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT5_STATUS_Pos            5U                                           /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Position */
+#define PMU_OVSCLR_CNT5_STATUS_Msk           (1UL << PMU_OVSCLR_CNT5_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT6_STATUS_Pos            6U                                           /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Position */
+#define PMU_OVSCLR_CNT6_STATUS_Msk           (1UL << PMU_OVSCLR_CNT6_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT7_STATUS_Pos            7U                                           /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Position */
+#define PMU_OVSCLR_CNT7_STATUS_Msk           (1UL << PMU_OVSCLR_CNT7_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT8_STATUS_Pos            8U                                           /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Position */
+#define PMU_OVSCLR_CNT8_STATUS_Msk           (1UL << PMU_OVSCLR_CNT8_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT9_STATUS_Pos            9U                                           /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Position */
+#define PMU_OVSCLR_CNT9_STATUS_Msk           (1UL << PMU_OVSCLR_CNT9_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT10_STATUS_Pos           10U                                          /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Position */
+#define PMU_OVSCLR_CNT10_STATUS_Msk          (1UL << PMU_OVSCLR_CNT10_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT11_STATUS_Pos           11U                                          /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Position */
+#define PMU_OVSCLR_CNT11_STATUS_Msk          (1UL << PMU_OVSCLR_CNT11_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT12_STATUS_Pos           12U                                          /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Position */
+#define PMU_OVSCLR_CNT12_STATUS_Msk          (1UL << PMU_OVSCLR_CNT12_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT13_STATUS_Pos           13U                                          /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Position */
+#define PMU_OVSCLR_CNT13_STATUS_Msk          (1UL << PMU_OVSCLR_CNT13_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT14_STATUS_Pos           14U                                          /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Position */
+#define PMU_OVSCLR_CNT14_STATUS_Msk          (1UL << PMU_OVSCLR_CNT14_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT15_STATUS_Pos           15U                                          /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Position */
+#define PMU_OVSCLR_CNT15_STATUS_Msk          (1UL << PMU_OVSCLR_CNT15_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT16_STATUS_Pos           16U                                          /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Position */
+#define PMU_OVSCLR_CNT16_STATUS_Msk          (1UL << PMU_OVSCLR_CNT16_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT17_STATUS_Pos           17U                                          /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Position */
+#define PMU_OVSCLR_CNT17_STATUS_Msk          (1UL << PMU_OVSCLR_CNT17_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT18_STATUS_Pos           18U                                          /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Position */
+#define PMU_OVSCLR_CNT18_STATUS_Msk          (1UL << PMU_OVSCLR_CNT18_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT19_STATUS_Pos           19U                                          /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Position */
+#define PMU_OVSCLR_CNT19_STATUS_Msk          (1UL << PMU_OVSCLR_CNT19_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT20_STATUS_Pos           20U                                          /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Position */
+#define PMU_OVSCLR_CNT20_STATUS_Msk          (1UL << PMU_OVSCLR_CNT20_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT21_STATUS_Pos           21U                                          /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Position */
+#define PMU_OVSCLR_CNT21_STATUS_Msk          (1UL << PMU_OVSCLR_CNT21_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT22_STATUS_Pos           22U                                          /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Position */
+#define PMU_OVSCLR_CNT22_STATUS_Msk          (1UL << PMU_OVSCLR_CNT22_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT23_STATUS_Pos           23U                                          /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Position */
+#define PMU_OVSCLR_CNT23_STATUS_Msk          (1UL << PMU_OVSCLR_CNT23_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT24_STATUS_Pos           24U                                          /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Position */
+#define PMU_OVSCLR_CNT24_STATUS_Msk          (1UL << PMU_OVSCLR_CNT24_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT25_STATUS_Pos           25U                                          /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Position */
+#define PMU_OVSCLR_CNT25_STATUS_Msk          (1UL << PMU_OVSCLR_CNT25_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT26_STATUS_Pos           26U                                          /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Position */
+#define PMU_OVSCLR_CNT26_STATUS_Msk          (1UL << PMU_OVSCLR_CNT26_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT27_STATUS_Pos           27U                                          /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Position */
+#define PMU_OVSCLR_CNT27_STATUS_Msk          (1UL << PMU_OVSCLR_CNT27_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT28_STATUS_Pos           28U                                          /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Position */
+#define PMU_OVSCLR_CNT28_STATUS_Msk          (1UL << PMU_OVSCLR_CNT28_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT29_STATUS_Pos           29U                                          /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Position */
+#define PMU_OVSCLR_CNT29_STATUS_Msk          (1UL << PMU_OVSCLR_CNT29_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT30_STATUS_Pos           30U                                          /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Position */
+#define PMU_OVSCLR_CNT30_STATUS_Msk          (1UL << PMU_OVSCLR_CNT30_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CYCCNT_STATUS_Pos          31U                                          /*!< PMU OVSCLR: Cycle Counter Overflow Clear Position */
+#define PMU_OVSCLR_CYCCNT_STATUS_Msk         (1UL << PMU_OVSCLR_CYCCNT_STATUS_Pos)         /*!< PMU OVSCLR: Cycle Counter Overflow Clear Mask */
+
+/** \brief PMU Software Increment Counter */
+
+#define PMU_SWINC_CNT0_Pos                    0U                                           /*!< PMU SWINC: Event Counter 0 Software Increment Position */
+#define PMU_SWINC_CNT0_Msk                   (1UL /*<< PMU_SWINC_CNT0_Pos */)              /*!< PMU SWINC: Event Counter 0 Software Increment Mask */
+
+#define PMU_SWINC_CNT1_Pos                    1U                                           /*!< PMU SWINC: Event Counter 1 Software Increment Position */
+#define PMU_SWINC_CNT1_Msk                   (1UL << PMU_SWINC_CNT1_Pos)                   /*!< PMU SWINC: Event Counter 1 Software Increment Mask */
+
+#define PMU_SWINC_CNT2_Pos                    2U                                           /*!< PMU SWINC: Event Counter 2 Software Increment Position */
+#define PMU_SWINC_CNT2_Msk                   (1UL << PMU_SWINC_CNT2_Pos)                   /*!< PMU SWINC: Event Counter 2 Software Increment Mask */
+
+#define PMU_SWINC_CNT3_Pos                    3U                                           /*!< PMU SWINC: Event Counter 3 Software Increment Position */
+#define PMU_SWINC_CNT3_Msk                   (1UL << PMU_SWINC_CNT3_Pos)                   /*!< PMU SWINC: Event Counter 3 Software Increment Mask */
+
+#define PMU_SWINC_CNT4_Pos                    4U                                           /*!< PMU SWINC: Event Counter 4 Software Increment Position */
+#define PMU_SWINC_CNT4_Msk                   (1UL << PMU_SWINC_CNT4_Pos)                   /*!< PMU SWINC: Event Counter 4 Software Increment Mask */
+
+#define PMU_SWINC_CNT5_Pos                    5U                                           /*!< PMU SWINC: Event Counter 5 Software Increment Position */
+#define PMU_SWINC_CNT5_Msk                   (1UL << PMU_SWINC_CNT5_Pos)                   /*!< PMU SWINC: Event Counter 5 Software Increment Mask */
+
+#define PMU_SWINC_CNT6_Pos                    6U                                           /*!< PMU SWINC: Event Counter 6 Software Increment Position */
+#define PMU_SWINC_CNT6_Msk                   (1UL << PMU_SWINC_CNT6_Pos)                   /*!< PMU SWINC: Event Counter 6 Software Increment Mask */
+
+#define PMU_SWINC_CNT7_Pos                    7U                                           /*!< PMU SWINC: Event Counter 7 Software Increment Position */
+#define PMU_SWINC_CNT7_Msk                   (1UL << PMU_SWINC_CNT7_Pos)                   /*!< PMU SWINC: Event Counter 7 Software Increment Mask */
+
+#define PMU_SWINC_CNT8_Pos                    8U                                           /*!< PMU SWINC: Event Counter 8 Software Increment Position */
+#define PMU_SWINC_CNT8_Msk                   (1UL << PMU_SWINC_CNT8_Pos)                   /*!< PMU SWINC: Event Counter 8 Software Increment Mask */
+
+#define PMU_SWINC_CNT9_Pos                    9U                                           /*!< PMU SWINC: Event Counter 9 Software Increment Position */
+#define PMU_SWINC_CNT9_Msk                   (1UL << PMU_SWINC_CNT9_Pos)                   /*!< PMU SWINC: Event Counter 9 Software Increment Mask */
+
+#define PMU_SWINC_CNT10_Pos                   10U                                          /*!< PMU SWINC: Event Counter 10 Software Increment Position */
+#define PMU_SWINC_CNT10_Msk                  (1UL << PMU_SWINC_CNT10_Pos)                  /*!< PMU SWINC: Event Counter 10 Software Increment Mask */
+
+#define PMU_SWINC_CNT11_Pos                   11U                                          /*!< PMU SWINC: Event Counter 11 Software Increment Position */
+#define PMU_SWINC_CNT11_Msk                  (1UL << PMU_SWINC_CNT11_Pos)                  /*!< PMU SWINC: Event Counter 11 Software Increment Mask */
+
+#define PMU_SWINC_CNT12_Pos                   12U                                          /*!< PMU SWINC: Event Counter 12 Software Increment Position */
+#define PMU_SWINC_CNT12_Msk                  (1UL << PMU_SWINC_CNT12_Pos)                  /*!< PMU SWINC: Event Counter 12 Software Increment Mask */
+
+#define PMU_SWINC_CNT13_Pos                   13U                                          /*!< PMU SWINC: Event Counter 13 Software Increment Position */
+#define PMU_SWINC_CNT13_Msk                  (1UL << PMU_SWINC_CNT13_Pos)                  /*!< PMU SWINC: Event Counter 13 Software Increment Mask */
+
+#define PMU_SWINC_CNT14_Pos                   14U                                          /*!< PMU SWINC: Event Counter 14 Software Increment Position */
+#define PMU_SWINC_CNT14_Msk                  (1UL << PMU_SWINC_CNT14_Pos)                  /*!< PMU SWINC: Event Counter 14 Software Increment Mask */
+
+#define PMU_SWINC_CNT15_Pos                   15U                                          /*!< PMU SWINC: Event Counter 15 Software Increment Position */
+#define PMU_SWINC_CNT15_Msk                  (1UL << PMU_SWINC_CNT15_Pos)                  /*!< PMU SWINC: Event Counter 15 Software Increment Mask */
+
+#define PMU_SWINC_CNT16_Pos                   16U                                          /*!< PMU SWINC: Event Counter 16 Software Increment Position */
+#define PMU_SWINC_CNT16_Msk                  (1UL << PMU_SWINC_CNT16_Pos)                  /*!< PMU SWINC: Event Counter 16 Software Increment Mask */
+
+#define PMU_SWINC_CNT17_Pos                   17U                                          /*!< PMU SWINC: Event Counter 17 Software Increment Position */
+#define PMU_SWINC_CNT17_Msk                  (1UL << PMU_SWINC_CNT17_Pos)                  /*!< PMU SWINC: Event Counter 17 Software Increment Mask */
+
+#define PMU_SWINC_CNT18_Pos                   18U                                          /*!< PMU SWINC: Event Counter 18 Software Increment Position */
+#define PMU_SWINC_CNT18_Msk                  (1UL << PMU_SWINC_CNT18_Pos)                  /*!< PMU SWINC: Event Counter 18 Software Increment Mask */
+
+#define PMU_SWINC_CNT19_Pos                   19U                                          /*!< PMU SWINC: Event Counter 19 Software Increment Position */
+#define PMU_SWINC_CNT19_Msk                  (1UL << PMU_SWINC_CNT19_Pos)                  /*!< PMU SWINC: Event Counter 19 Software Increment Mask */
+
+#define PMU_SWINC_CNT20_Pos                   20U                                          /*!< PMU SWINC: Event Counter 20 Software Increment Position */
+#define PMU_SWINC_CNT20_Msk                  (1UL << PMU_SWINC_CNT20_Pos)                  /*!< PMU SWINC: Event Counter 20 Software Increment Mask */
+
+#define PMU_SWINC_CNT21_Pos                   21U                                          /*!< PMU SWINC: Event Counter 21 Software Increment Position */
+#define PMU_SWINC_CNT21_Msk                  (1UL << PMU_SWINC_CNT21_Pos)                  /*!< PMU SWINC: Event Counter 21 Software Increment Mask */
+
+#define PMU_SWINC_CNT22_Pos                   22U                                          /*!< PMU SWINC: Event Counter 22 Software Increment Position */
+#define PMU_SWINC_CNT22_Msk                  (1UL << PMU_SWINC_CNT22_Pos)                  /*!< PMU SWINC: Event Counter 22 Software Increment Mask */
+
+#define PMU_SWINC_CNT23_Pos                   23U                                          /*!< PMU SWINC: Event Counter 23 Software Increment Position */
+#define PMU_SWINC_CNT23_Msk                  (1UL << PMU_SWINC_CNT23_Pos)                  /*!< PMU SWINC: Event Counter 23 Software Increment Mask */
+
+#define PMU_SWINC_CNT24_Pos                   24U                                          /*!< PMU SWINC: Event Counter 24 Software Increment Position */
+#define PMU_SWINC_CNT24_Msk                  (1UL << PMU_SWINC_CNT24_Pos)                  /*!< PMU SWINC: Event Counter 24 Software Increment Mask */
+
+#define PMU_SWINC_CNT25_Pos                   25U                                          /*!< PMU SWINC: Event Counter 25 Software Increment Position */
+#define PMU_SWINC_CNT25_Msk                  (1UL << PMU_SWINC_CNT25_Pos)                  /*!< PMU SWINC: Event Counter 25 Software Increment Mask */
+
+#define PMU_SWINC_CNT26_Pos                   26U                                          /*!< PMU SWINC: Event Counter 26 Software Increment Position */
+#define PMU_SWINC_CNT26_Msk                  (1UL << PMU_SWINC_CNT26_Pos)                  /*!< PMU SWINC: Event Counter 26 Software Increment Mask */
+
+#define PMU_SWINC_CNT27_Pos                   27U                                          /*!< PMU SWINC: Event Counter 27 Software Increment Position */
+#define PMU_SWINC_CNT27_Msk                  (1UL << PMU_SWINC_CNT27_Pos)                  /*!< PMU SWINC: Event Counter 27 Software Increment Mask */
+
+#define PMU_SWINC_CNT28_Pos                   28U                                          /*!< PMU SWINC: Event Counter 28 Software Increment Position */
+#define PMU_SWINC_CNT28_Msk                  (1UL << PMU_SWINC_CNT28_Pos)                  /*!< PMU SWINC: Event Counter 28 Software Increment Mask */
+
+#define PMU_SWINC_CNT29_Pos                   29U                                          /*!< PMU SWINC: Event Counter 29 Software Increment Position */
+#define PMU_SWINC_CNT29_Msk                  (1UL << PMU_SWINC_CNT29_Pos)                  /*!< PMU SWINC: Event Counter 29 Software Increment Mask */
+
+#define PMU_SWINC_CNT30_Pos                   30U                                          /*!< PMU SWINC: Event Counter 30 Software Increment Position */
+#define PMU_SWINC_CNT30_Msk                  (1UL << PMU_SWINC_CNT30_Pos)                  /*!< PMU SWINC: Event Counter 30 Software Increment Mask */
+
+/** \brief PMU Control Register Definitions */
+
+#define PMU_CTRL_ENABLE_Pos                   0U                                           /*!< PMU CTRL: ENABLE Position */
+#define PMU_CTRL_ENABLE_Msk                  (1UL /*<< PMU_CTRL_ENABLE_Pos*/)              /*!< PMU CTRL: ENABLE Mask */
+
+#define PMU_CTRL_EVENTCNT_RESET_Pos           1U                                           /*!< PMU CTRL: Event Counter Reset Position */
+#define PMU_CTRL_EVENTCNT_RESET_Msk          (1UL << PMU_CTRL_EVENTCNT_RESET_Pos)          /*!< PMU CTRL: Event Counter Reset Mask */
+
+#define PMU_CTRL_CYCCNT_RESET_Pos             2U                                           /*!< PMU CTRL: Cycle Counter Reset Position */
+#define PMU_CTRL_CYCCNT_RESET_Msk            (1UL << PMU_CTRL_CYCCNT_RESET_Pos)            /*!< PMU CTRL: Cycle Counter Reset Mask */
+
+#define PMU_CTRL_CYCCNT_DISABLE_Pos           5U                                           /*!< PMU CTRL: Disable Cycle Counter Position */
+#define PMU_CTRL_CYCCNT_DISABLE_Msk          (1UL << PMU_CTRL_CYCCNT_DISABLE_Pos)          /*!< PMU CTRL: Disable Cycle Counter Mask */
+
+#define PMU_CTRL_FRZ_ON_OV_Pos                9U                                           /*!< PMU CTRL: Freeze-on-overflow Position */
+#define PMU_CTRL_FRZ_ON_OV_Msk               (1UL << PMU_CTRL_FRZ_ON_OVERFLOW_Pos)         /*!< PMU CTRL: Freeze-on-overflow Mask */
+
+#define PMU_CTRL_TRACE_ON_OV_Pos              11U                                          /*!< PMU CTRL: Trace-on-overflow Position */
+#define PMU_CTRL_TRACE_ON_OV_Msk             (1UL << PMU_CTRL_TRACE_ON_OVERFLOW_Pos)       /*!< PMU CTRL: Trace-on-overflow Mask */
+
+/** \brief PMU Type Register Definitions */
+
+#define PMU_TYPE_NUM_CNTS_Pos                 0U                                           /*!< PMU TYPE: Number of Counters Position */
+#define PMU_TYPE_NUM_CNTS_Msk                (0xFFUL /*<< PMU_TYPE_NUM_CNTS_Pos*/)         /*!< PMU TYPE: Number of Counters Mask */
+
+#define PMU_TYPE_SIZE_CNTS_Pos                8U                                           /*!< PMU TYPE: Size of Counters Position */
+#define PMU_TYPE_SIZE_CNTS_Msk               (0x3FUL << PMU_TYPE_SIZE_CNTS_Pos)            /*!< PMU TYPE: Size of Counters Mask */
+
+#define PMU_TYPE_CYCCNT_PRESENT_Pos           14U                                          /*!< PMU TYPE: Cycle Counter Present Position */
+#define PMU_TYPE_CYCCNT_PRESENT_Msk          (1UL << PMU_TYPE_CYCCNT_PRESENT_Pos)          /*!< PMU TYPE: Cycle Counter Present Mask */
+
+#define PMU_TYPE_FRZ_OV_SUPPORT_Pos           21U                                          /*!< PMU TYPE: Freeze-on-overflow Support Position */
+#define PMU_TYPE_FRZ_OV_SUPPORT_Msk          (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos)          /*!< PMU TYPE: Freeze-on-overflow Support Mask */
+
+#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Pos      23U                                          /*!< PMU TYPE: Trace-on-overflow Support Position */
+#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Msk     (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos)          /*!< PMU TYPE: Trace-on-overflow Support Mask */
+
+/** \brief PMU Authentication Status Register Definitions */
+
+#define PMU_AUTHSTATUS_NSID_Pos               0U                                           /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Position */
+#define PMU_AUTHSTATUS_NSID_Msk              (0x3UL /*<< PMU_AUTHSTATUS_NSID_Pos*/)        /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_NSNID_Pos              2U                                           /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_NSNID_Msk             (0x3UL << PMU_AUTHSTATUS_NSNID_Pos)           /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SID_Pos                4U                                           /*!< PMU AUTHSTATUS: Secure Invasive Debug Position */
+#define PMU_AUTHSTATUS_SID_Msk               (0x3UL << PMU_AUTHSTATUS_SID_Pos)             /*!< PMU AUTHSTATUS: Secure Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SNID_Pos               6U                                           /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_SNID_Msk              (0x3UL << PMU_AUTHSTATUS_SNID_Pos)            /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_NSUID_Pos              16U                                          /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Position */
+#define PMU_AUTHSTATUS_NSUID_Msk             (0x3UL << PMU_AUTHSTATUS_NSUID_Pos)           /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_NSUNID_Pos             18U                                          /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_NSUNID_Msk            (0x3UL << PMU_AUTHSTATUS_NSUNID_Pos)          /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SUID_Pos               20U                                          /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Position */
+#define PMU_AUTHSTATUS_SUID_Msk              (0x3UL << PMU_AUTHSTATUS_SUID_Pos)            /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SUNID_Pos              22U                                          /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_SUNID_Msk             (0x3UL << PMU_AUTHSTATUS_SUNID_Pos)           /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Mask */
+
+/*@} end of group CMSIS_PMU */
+#endif
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_PXN_Pos                    4U                                            /*!< MPU RLAR: PXN Position */
+#define MPU_RLAR_PXN_Msk                   (1UL << MPU_RLAR_PXN_Pos)                      /*!< MPU RLAR: PXN Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (7UL << MPU_RLAR_AttrIndx_Pos)                 /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and VFP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+#define FPU_FPDSCR_FZ16_Pos                19U                                            /*!< FPDSCR: FZ16 bit Position */
+#define FPU_FPDSCR_FZ16_Msk                (1UL << FPU_FPDSCR_FZ16_Pos)                   /*!< FPDSCR: FZ16 bit Mask */
+
+#define FPU_FPDSCR_LTPSIZE_Pos             16U                                            /*!< FPDSCR: LTPSIZE bit Position */
+#define FPU_FPDSCR_LTPSIZE_Msk             (7UL << FPU_FPDSCR_LTPSIZE_Pos)                /*!< FPDSCR: LTPSIZE bit Mask */
+
+/* Media and VFP Feature Register 0 Definitions */
+#define FPU_MVFR0_FPRound_Pos              28U                                            /*!< MVFR0: FPRound bits Position */
+#define FPU_MVFR0_FPRound_Msk              (0xFUL << FPU_MVFR0_FPRound_Pos)               /*!< MVFR0: FPRound bits Mask */
+
+#define FPU_MVFR0_FPSqrt_Pos               20U                                            /*!< MVFR0: FPSqrt bits Position */
+#define FPU_MVFR0_FPSqrt_Msk               (0xFUL << FPU_MVFR0_FPSqrt_Pos)                 /*!< MVFR0: FPSqrt bits Mask */
+
+#define FPU_MVFR0_FPDivide_Pos             16U                                            /*!< MVFR0: FPDivide bits Position */
+#define FPU_MVFR0_FPDivide_Msk             (0xFUL << FPU_MVFR0_FPDivide_Pos)              /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FPDP_Pos                  8U                                            /*!< MVFR0: FPDP bits Position */
+#define FPU_MVFR0_FPDP_Msk                 (0xFUL << FPU_MVFR0_FPDP_Pos)                  /*!< MVFR0: FPDP bits Mask */
+
+#define FPU_MVFR0_FPSP_Pos                  4U                                            /*!< MVFR0: FPSP bits Position */
+#define FPU_MVFR0_FPSP_Msk                 (0xFUL << FPU_MVFR0_FPSP_Pos)                  /*!< MVFR0: FPSP bits Mask */
+
+#define FPU_MVFR0_SIMDReg_Pos               0U                                            /*!< MVFR0: SIMDReg bits Position */
+#define FPU_MVFR0_SIMDReg_Msk              (0xFUL /*<< FPU_MVFR0_SIMDReg_Pos*/)           /*!< MVFR0: SIMDReg bits Mask */
+
+/* Media and VFP Feature Register 1 Definitions */
+#define FPU_MVFR1_FMAC_Pos                 28U                                            /*!< MVFR1: FMAC bits Position */
+#define FPU_MVFR1_FMAC_Msk                 (0xFUL << FPU_MVFR1_FMAC_Pos)                  /*!< MVFR1: FMAC bits Mask */
+
+#define FPU_MVFR1_FPHP_Pos                 24U                                            /*!< MVFR1: FPHP bits Position */
+#define FPU_MVFR1_FPHP_Msk                 (0xFUL << FPU_MVFR1_FPHP_Pos)                  /*!< MVFR1: FPHP bits Mask */
+
+#define FPU_MVFR1_FP16_Pos                 20U                                            /*!< MVFR1: FP16 bits Position */
+#define FPU_MVFR1_FP16_Msk                 (0xFUL << FPU_MVFR1_FP16_Pos)                  /*!< MVFR1: FP16 bits Mask */
+
+#define FPU_MVFR1_MVE_Pos                   8U                                            /*!< MVFR1: MVE bits Position */
+#define FPU_MVFR1_MVE_Msk                  (0xFUL << FPU_MVFR1_MVE_Pos)                   /*!< MVFR1: MVE bits Mask */
+
+#define FPU_MVFR1_FPDNaN_Pos                4U                                            /*!< MVFR1: FPDNaN bits Position */
+#define FPU_MVFR1_FPDNaN_Msk               (0xFUL << FPU_MVFR1_FPDNaN_Pos)                /*!< MVFR1: FPDNaN bits Mask */
+
+#define FPU_MVFR1_FPFtZ_Pos                 0U                                            /*!< MVFR1: FPFtZ bits Position */
+#define FPU_MVFR1_FPFtZ_Msk                (0xFUL /*<< FPU_MVFR1_FPFtZ_Pos*/)             /*!< MVFR1: FPFtZ bits Mask */
+
+/* Media and VFP Feature Register 2 Definitions */
+#define FPU_MVFR2_FPMisc_Pos                4U                                            /*!< MVFR2: FPMisc bits Position */
+#define FPU_MVFR2_FPMisc_Msk               (0xFUL << FPU_MVFR2_FPMisc_Pos)                /*!< MVFR2: FPMisc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  \deprecated Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __OM  uint32_t DSCEMCR;                /*!< Offset: 0x010 ( /W)  Debug Set Clear Exception and Monitor Control Register */
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_FPD_Pos          23U                                            /*!< \deprecated CoreDebug DHCSR: S_FPD Position */
+#define CoreDebug_DHCSR_S_FPD_Msk          (1UL << CoreDebug_DHCSR_S_FPD_Pos)             /*!< \deprecated CoreDebug DHCSR: S_FPD Mask */
+
+#define CoreDebug_DHCSR_S_SUIDE_Pos        22U                                            /*!< \deprecated CoreDebug DHCSR: S_SUIDE Position */
+#define CoreDebug_DHCSR_S_SUIDE_Msk        (1UL << CoreDebug_DHCSR_S_SUIDE_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SUIDE Mask */
+
+#define CoreDebug_DHCSR_S_NSUIDE_Pos       21U                                            /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Position */
+#define CoreDebug_DHCSR_S_NSUIDE_Msk       (1UL << CoreDebug_DHCSR_S_NSUIDE_Pos)          /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Mask */
+
+#define CoreDebug_DHCSR_S_SDE_Pos          20U                                            /*!< \deprecated CoreDebug DHCSR: S_SDE Position */
+#define CoreDebug_DHCSR_S_SDE_Msk          (1UL << CoreDebug_DHCSR_S_SDE_Pos)             /*!< \deprecated CoreDebug DHCSR: S_SDE Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< \deprecated CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_PMOV_Pos          6U                                            /*!< \deprecated CoreDebug DHCSR: C_PMOV Position */
+#define CoreDebug_DHCSR_C_PMOV_Msk         (1UL << CoreDebug_DHCSR_C_PMOV_Pos)            /*!< \deprecated CoreDebug DHCSR: C_PMOV Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< \deprecated CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< \deprecated CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< \deprecated CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< \deprecated CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< \deprecated CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< \deprecated CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Set Clear Exception and Monitor Control Register Definitions */
+#define CoreDebug_DSCEMCR_CLR_MON_REQ_Pos  19U                                            /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Position */
+#define CoreDebug_DSCEMCR_CLR_MON_REQ_Msk  (1UL << CoreDebug_DSCEMCR_CLR_MON_REQ_Pos)     /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Mask */
+
+#define CoreDebug_DSCEMCR_CLR_MON_PEND_Pos 17U                                            /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Position */
+#define CoreDebug_DSCEMCR_CLR_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_PEND_Pos)    /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Mask */
+
+#define CoreDebug_DSCEMCR_SET_MON_REQ_Pos   3U                                            /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Position */
+#define CoreDebug_DSCEMCR_SET_MON_REQ_Msk  (1UL << CoreDebug_DSCEMCR_SET_MON_REQ_Pos)     /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Mask */
+
+#define CoreDebug_DSCEMCR_SET_MON_PEND_Pos  1U                                            /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Position */
+#define CoreDebug_DSCEMCR_SET_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_PEND_Pos)    /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_UIDEN_Pos      10U                                            /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Position */
+#define CoreDebug_DAUTHCTRL_UIDEN_Msk      (1UL << CoreDebug_DAUTHCTRL_UIDEN_Pos)         /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_UIDAPEN_Pos     9U                                            /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Position */
+#define CoreDebug_DAUTHCTRL_UIDAPEN_Msk    (1UL << CoreDebug_DAUTHCTRL_UIDAPEN_Pos)       /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_FSDMA_Pos       8U                                            /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Position */
+#define CoreDebug_DAUTHCTRL_FSDMA_Msk      (1UL << CoreDebug_DAUTHCTRL_FSDMA_Pos)         /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< \deprecated CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< \deprecated CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DCB       Debug Control Block
+  \brief    Type definitions for the Debug Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Control Block Registers (DCB).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __OM  uint32_t DSCEMCR;                /*!< Offset: 0x010 ( /W)  Debug Set Clear Exception and Monitor Control Register */
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} DCB_Type;
+
+/* DHCSR, Debug Halting Control and Status Register Definitions */
+#define DCB_DHCSR_DBGKEY_Pos               16U                                            /*!< DCB DHCSR: Debug key Position */
+#define DCB_DHCSR_DBGKEY_Msk               (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos)             /*!< DCB DHCSR: Debug key Mask */
+
+#define DCB_DHCSR_S_RESTART_ST_Pos         26U                                            /*!< DCB DHCSR: Restart sticky status Position */
+#define DCB_DHCSR_S_RESTART_ST_Msk         (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos)          /*!< DCB DHCSR: Restart sticky status Mask */
+
+#define DCB_DHCSR_S_RESET_ST_Pos           25U                                            /*!< DCB DHCSR: Reset sticky status Position */
+#define DCB_DHCSR_S_RESET_ST_Msk           (0x1UL << DCB_DHCSR_S_RESET_ST_Pos)            /*!< DCB DHCSR: Reset sticky status Mask */
+
+#define DCB_DHCSR_S_RETIRE_ST_Pos          24U                                            /*!< DCB DHCSR: Retire sticky status Position */
+#define DCB_DHCSR_S_RETIRE_ST_Msk          (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos)           /*!< DCB DHCSR: Retire sticky status Mask */
+
+#define DCB_DHCSR_S_FPD_Pos                23U                                            /*!< DCB DHCSR: Floating-point registers Debuggable Position */
+#define DCB_DHCSR_S_FPD_Msk                (0x1UL << DCB_DHCSR_S_FPD_Pos)                 /*!< DCB DHCSR: Floating-point registers Debuggable Mask */
+
+#define DCB_DHCSR_S_SUIDE_Pos              22U                                            /*!< DCB DHCSR: Secure unprivileged halting debug enabled Position */
+#define DCB_DHCSR_S_SUIDE_Msk              (0x1UL << DCB_DHCSR_S_SUIDE_Pos)               /*!< DCB DHCSR: Secure unprivileged halting debug enabled Mask */
+
+#define DCB_DHCSR_S_NSUIDE_Pos             21U                                            /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Position */
+#define DCB_DHCSR_S_NSUIDE_Msk             (0x1UL << DCB_DHCSR_S_NSUIDE_Pos)              /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Mask */
+
+#define DCB_DHCSR_S_SDE_Pos                20U                                            /*!< DCB DHCSR: Secure debug enabled Position */
+#define DCB_DHCSR_S_SDE_Msk                (0x1UL << DCB_DHCSR_S_SDE_Pos)                 /*!< DCB DHCSR: Secure debug enabled Mask */
+
+#define DCB_DHCSR_S_LOCKUP_Pos             19U                                            /*!< DCB DHCSR: Lockup status Position */
+#define DCB_DHCSR_S_LOCKUP_Msk             (0x1UL << DCB_DHCSR_S_LOCKUP_Pos)              /*!< DCB DHCSR: Lockup status Mask */
+
+#define DCB_DHCSR_S_SLEEP_Pos              18U                                            /*!< DCB DHCSR: Sleeping status Position */
+#define DCB_DHCSR_S_SLEEP_Msk              (0x1UL << DCB_DHCSR_S_SLEEP_Pos)               /*!< DCB DHCSR: Sleeping status Mask */
+
+#define DCB_DHCSR_S_HALT_Pos               17U                                            /*!< DCB DHCSR: Halted status Position */
+#define DCB_DHCSR_S_HALT_Msk               (0x1UL << DCB_DHCSR_S_HALT_Pos)                /*!< DCB DHCSR: Halted status Mask */
+
+#define DCB_DHCSR_S_REGRDY_Pos             16U                                            /*!< DCB DHCSR: Register ready status Position */
+#define DCB_DHCSR_S_REGRDY_Msk             (0x1UL << DCB_DHCSR_S_REGRDY_Pos)              /*!< DCB DHCSR: Register ready status Mask */
+
+#define DCB_DHCSR_C_PMOV_Pos                6U                                            /*!< DCB DHCSR: Halt on PMU overflow control Position */
+#define DCB_DHCSR_C_PMOV_Msk               (0x1UL << DCB_DHCSR_C_PMOV_Pos)                /*!< DCB DHCSR: Halt on PMU overflow control Mask */
+
+#define DCB_DHCSR_C_SNAPSTALL_Pos           5U                                            /*!< DCB DHCSR: Snap stall control Position */
+#define DCB_DHCSR_C_SNAPSTALL_Msk          (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos)           /*!< DCB DHCSR: Snap stall control Mask */
+
+#define DCB_DHCSR_C_MASKINTS_Pos            3U                                            /*!< DCB DHCSR: Mask interrupts control Position */
+#define DCB_DHCSR_C_MASKINTS_Msk           (0x1UL << DCB_DHCSR_C_MASKINTS_Pos)            /*!< DCB DHCSR: Mask interrupts control Mask */
+
+#define DCB_DHCSR_C_STEP_Pos                2U                                            /*!< DCB DHCSR: Step control Position */
+#define DCB_DHCSR_C_STEP_Msk               (0x1UL << DCB_DHCSR_C_STEP_Pos)                /*!< DCB DHCSR: Step control Mask */
+
+#define DCB_DHCSR_C_HALT_Pos                1U                                            /*!< DCB DHCSR: Halt control Position */
+#define DCB_DHCSR_C_HALT_Msk               (0x1UL << DCB_DHCSR_C_HALT_Pos)                /*!< DCB DHCSR: Halt control Mask */
+
+#define DCB_DHCSR_C_DEBUGEN_Pos             0U                                            /*!< DCB DHCSR: Debug enable control Position */
+#define DCB_DHCSR_C_DEBUGEN_Msk            (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/)         /*!< DCB DHCSR: Debug enable control Mask */
+
+/* DCRSR, Debug Core Register Select Register Definitions */
+#define DCB_DCRSR_REGWnR_Pos               16U                                            /*!< DCB DCRSR: Register write/not-read Position */
+#define DCB_DCRSR_REGWnR_Msk               (0x1UL << DCB_DCRSR_REGWnR_Pos)                /*!< DCB DCRSR: Register write/not-read Mask */
+
+#define DCB_DCRSR_REGSEL_Pos                0U                                            /*!< DCB DCRSR: Register selector Position */
+#define DCB_DCRSR_REGSEL_Msk               (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/)           /*!< DCB DCRSR: Register selector Mask */
+
+/* DCRDR, Debug Core Register Data Register Definitions */
+#define DCB_DCRDR_DBGTMP_Pos                0U                                            /*!< DCB DCRDR: Data temporary buffer Position */
+#define DCB_DCRDR_DBGTMP_Msk               (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/)     /*!< DCB DCRDR: Data temporary buffer Mask */
+
+/* DEMCR, Debug Exception and Monitor Control Register Definitions */
+#define DCB_DEMCR_TRCENA_Pos               24U                                            /*!< DCB DEMCR: Trace enable Position */
+#define DCB_DEMCR_TRCENA_Msk               (0x1UL << DCB_DEMCR_TRCENA_Pos)                /*!< DCB DEMCR: Trace enable Mask */
+
+#define DCB_DEMCR_MONPRKEY_Pos             23U                                            /*!< DCB DEMCR: Monitor pend req key Position */
+#define DCB_DEMCR_MONPRKEY_Msk             (0x1UL << DCB_DEMCR_MONPRKEY_Pos)              /*!< DCB DEMCR: Monitor pend req key Mask */
+
+#define DCB_DEMCR_UMON_EN_Pos              21U                                            /*!< DCB DEMCR: Unprivileged monitor enable Position */
+#define DCB_DEMCR_UMON_EN_Msk              (0x1UL << DCB_DEMCR_UMON_EN_Pos)               /*!< DCB DEMCR: Unprivileged monitor enable Mask */
+
+#define DCB_DEMCR_SDME_Pos                 20U                                            /*!< DCB DEMCR: Secure DebugMonitor enable Position */
+#define DCB_DEMCR_SDME_Msk                 (0x1UL << DCB_DEMCR_SDME_Pos)                  /*!< DCB DEMCR: Secure DebugMonitor enable Mask */
+
+#define DCB_DEMCR_MON_REQ_Pos              19U                                            /*!< DCB DEMCR: Monitor request Position */
+#define DCB_DEMCR_MON_REQ_Msk              (0x1UL << DCB_DEMCR_MON_REQ_Pos)               /*!< DCB DEMCR: Monitor request Mask */
+
+#define DCB_DEMCR_MON_STEP_Pos             18U                                            /*!< DCB DEMCR: Monitor step Position */
+#define DCB_DEMCR_MON_STEP_Msk             (0x1UL << DCB_DEMCR_MON_STEP_Pos)              /*!< DCB DEMCR: Monitor step Mask */
+
+#define DCB_DEMCR_MON_PEND_Pos             17U                                            /*!< DCB DEMCR: Monitor pend Position */
+#define DCB_DEMCR_MON_PEND_Msk             (0x1UL << DCB_DEMCR_MON_PEND_Pos)              /*!< DCB DEMCR: Monitor pend Mask */
+
+#define DCB_DEMCR_MON_EN_Pos               16U                                            /*!< DCB DEMCR: Monitor enable Position */
+#define DCB_DEMCR_MON_EN_Msk               (0x1UL << DCB_DEMCR_MON_EN_Pos)                /*!< DCB DEMCR: Monitor enable Mask */
+
+#define DCB_DEMCR_VC_SFERR_Pos             11U                                            /*!< DCB DEMCR: Vector Catch SecureFault Position */
+#define DCB_DEMCR_VC_SFERR_Msk             (0x1UL << DCB_DEMCR_VC_SFERR_Pos)              /*!< DCB DEMCR: Vector Catch SecureFault Mask */
+
+#define DCB_DEMCR_VC_HARDERR_Pos           10U                                            /*!< DCB DEMCR: Vector Catch HardFault errors Position */
+#define DCB_DEMCR_VC_HARDERR_Msk           (0x1UL << DCB_DEMCR_VC_HARDERR_Pos)            /*!< DCB DEMCR: Vector Catch HardFault errors Mask */
+
+#define DCB_DEMCR_VC_INTERR_Pos             9U                                            /*!< DCB DEMCR: Vector Catch interrupt errors Position */
+#define DCB_DEMCR_VC_INTERR_Msk            (0x1UL << DCB_DEMCR_VC_INTERR_Pos)             /*!< DCB DEMCR: Vector Catch interrupt errors Mask */
+
+#define DCB_DEMCR_VC_BUSERR_Pos             8U                                            /*!< DCB DEMCR: Vector Catch BusFault errors Position */
+#define DCB_DEMCR_VC_BUSERR_Msk            (0x1UL << DCB_DEMCR_VC_BUSERR_Pos)             /*!< DCB DEMCR: Vector Catch BusFault errors Mask */
+
+#define DCB_DEMCR_VC_STATERR_Pos            7U                                            /*!< DCB DEMCR: Vector Catch state errors Position */
+#define DCB_DEMCR_VC_STATERR_Msk           (0x1UL << DCB_DEMCR_VC_STATERR_Pos)            /*!< DCB DEMCR: Vector Catch state errors Mask */
+
+#define DCB_DEMCR_VC_CHKERR_Pos             6U                                            /*!< DCB DEMCR: Vector Catch check errors Position */
+#define DCB_DEMCR_VC_CHKERR_Msk            (0x1UL << DCB_DEMCR_VC_CHKERR_Pos)             /*!< DCB DEMCR: Vector Catch check errors Mask */
+
+#define DCB_DEMCR_VC_NOCPERR_Pos            5U                                            /*!< DCB DEMCR: Vector Catch NOCP errors Position */
+#define DCB_DEMCR_VC_NOCPERR_Msk           (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos)            /*!< DCB DEMCR: Vector Catch NOCP errors Mask */
+
+#define DCB_DEMCR_VC_MMERR_Pos              4U                                            /*!< DCB DEMCR: Vector Catch MemManage errors Position */
+#define DCB_DEMCR_VC_MMERR_Msk             (0x1UL << DCB_DEMCR_VC_MMERR_Pos)              /*!< DCB DEMCR: Vector Catch MemManage errors Mask */
+
+#define DCB_DEMCR_VC_CORERESET_Pos          0U                                            /*!< DCB DEMCR: Vector Catch Core reset Position */
+#define DCB_DEMCR_VC_CORERESET_Msk         (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/)      /*!< DCB DEMCR: Vector Catch Core reset Mask */
+
+/* DSCEMCR, Debug Set Clear Exception and Monitor Control Register Definitions */
+#define DCB_DSCEMCR_CLR_MON_REQ_Pos        19U                                            /*!< DCB DSCEMCR: Clear monitor request Position */
+#define DCB_DSCEMCR_CLR_MON_REQ_Msk        (0x1UL << DCB_DSCEMCR_CLR_MON_REQ_Pos)         /*!< DCB DSCEMCR: Clear monitor request Mask */
+
+#define DCB_DSCEMCR_CLR_MON_PEND_Pos       17U                                            /*!< DCB DSCEMCR: Clear monitor pend Position */
+#define DCB_DSCEMCR_CLR_MON_PEND_Msk       (0x1UL << DCB_DSCEMCR_CLR_MON_PEND_Pos)        /*!< DCB DSCEMCR: Clear monitor pend Mask */
+
+#define DCB_DSCEMCR_SET_MON_REQ_Pos         3U                                            /*!< DCB DSCEMCR: Set monitor request Position */
+#define DCB_DSCEMCR_SET_MON_REQ_Msk        (0x1UL << DCB_DSCEMCR_SET_MON_REQ_Pos)         /*!< DCB DSCEMCR: Set monitor request Mask */
+
+#define DCB_DSCEMCR_SET_MON_PEND_Pos        1U                                            /*!< DCB DSCEMCR: Set monitor pend Position */
+#define DCB_DSCEMCR_SET_MON_PEND_Msk       (0x1UL << DCB_DSCEMCR_SET_MON_PEND_Pos)        /*!< DCB DSCEMCR: Set monitor pend Mask */
+
+/* DAUTHCTRL, Debug Authentication Control Register Definitions */
+#define DCB_DAUTHCTRL_UIDEN_Pos            10U                                            /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Position */
+#define DCB_DAUTHCTRL_UIDEN_Msk            (0x1UL << DCB_DAUTHCTRL_UIDEN_Pos)             /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Mask */
+
+#define DCB_DAUTHCTRL_UIDAPEN_Pos           9U                                            /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Position */
+#define DCB_DAUTHCTRL_UIDAPEN_Msk          (0x1UL << DCB_DAUTHCTRL_UIDAPEN_Pos)           /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Mask */
+
+#define DCB_DAUTHCTRL_FSDMA_Pos             8U                                            /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Position */
+#define DCB_DAUTHCTRL_FSDMA_Msk            (0x1UL << DCB_DAUTHCTRL_FSDMA_Pos)             /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Mask */
+
+#define DCB_DAUTHCTRL_INTSPNIDEN_Pos        3U                                            /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Msk       (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos)        /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPNIDENSEL_Pos        2U                                            /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPNIDENSEL_Msk       (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos)        /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */
+
+#define DCB_DAUTHCTRL_INTSPIDEN_Pos         1U                                            /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPIDEN_Msk        (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos)         /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPIDENSEL_Pos         0U                                            /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPIDENSEL_Msk        (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/)     /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */
+
+/* DSCSR, Debug Security Control and Status Register Definitions */
+#define DCB_DSCSR_CDSKEY_Pos               17U                                            /*!< DCB DSCSR: CDS write-enable key Position */
+#define DCB_DSCSR_CDSKEY_Msk               (0x1UL << DCB_DSCSR_CDSKEY_Pos)                /*!< DCB DSCSR: CDS write-enable key Mask */
+
+#define DCB_DSCSR_CDS_Pos                  16U                                            /*!< DCB DSCSR: Current domain Secure Position */
+#define DCB_DSCSR_CDS_Msk                  (0x1UL << DCB_DSCSR_CDS_Pos)                   /*!< DCB DSCSR: Current domain Secure Mask */
+
+#define DCB_DSCSR_SBRSEL_Pos                1U                                            /*!< DCB DSCSR: Secure banked register select Position */
+#define DCB_DSCSR_SBRSEL_Msk               (0x1UL << DCB_DSCSR_SBRSEL_Pos)                /*!< DCB DSCSR: Secure banked register select Mask */
+
+#define DCB_DSCSR_SBRSELEN_Pos              0U                                            /*!< DCB DSCSR: Secure banked register select enable Position */
+#define DCB_DSCSR_SBRSELEN_Msk             (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/)          /*!< DCB DSCSR: Secure banked register select enable Mask */
+
+/*@} end of group CMSIS_DCB */
+
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DIB       Debug Identification Block
+  \brief    Type definitions for the Debug Identification Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Identification Block Registers (DIB).
+ */
+typedef struct
+{
+  __OM  uint32_t DLAR;                   /*!< Offset: 0x000 ( /W)  SCS Software Lock Access Register */
+  __IM  uint32_t DLSR;                   /*!< Offset: 0x004 (R/ )  SCS Software Lock Status Register */
+  __IM  uint32_t DAUTHSTATUS;            /*!< Offset: 0x008 (R/ )  Debug Authentication Status Register */
+  __IM  uint32_t DDEVARCH;               /*!< Offset: 0x00C (R/ )  SCS Device Architecture Register */
+  __IM  uint32_t DDEVTYPE;               /*!< Offset: 0x010 (R/ )  SCS Device Type Register */
+} DIB_Type;
+
+/* DLAR, SCS Software Lock Access Register Definitions */
+#define DIB_DLAR_KEY_Pos                    0U                                            /*!< DIB DLAR: KEY Position */
+#define DIB_DLAR_KEY_Msk                   (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */)        /*!< DIB DLAR: KEY Mask */
+
+/* DLSR, SCS Software Lock Status Register Definitions */
+#define DIB_DLSR_nTT_Pos                    2U                                            /*!< DIB DLSR: Not thirty-two bit Position */
+#define DIB_DLSR_nTT_Msk                   (0x1UL << DIB_DLSR_nTT_Pos )                   /*!< DIB DLSR: Not thirty-two bit Mask */
+
+#define DIB_DLSR_SLK_Pos                    1U                                            /*!< DIB DLSR: Software Lock status Position */
+#define DIB_DLSR_SLK_Msk                   (0x1UL << DIB_DLSR_SLK_Pos )                   /*!< DIB DLSR: Software Lock status Mask */
+
+#define DIB_DLSR_SLI_Pos                    0U                                            /*!< DIB DLSR: Software Lock implemented Position */
+#define DIB_DLSR_SLI_Msk                   (0x1UL /*<< DIB_DLSR_SLI_Pos*/)                /*!< DIB DLSR: Software Lock implemented Mask */
+
+/* DAUTHSTATUS, Debug Authentication Status Register Definitions */
+#define DIB_DAUTHSTATUS_SUNID_Pos          22U                                            /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Position */
+#define DIB_DAUTHSTATUS_SUNID_Msk          (0x3UL << DIB_DAUTHSTATUS_SUNID_Pos )          /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Mask */
+
+#define DIB_DAUTHSTATUS_SUID_Pos           20U                                            /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Position */
+#define DIB_DAUTHSTATUS_SUID_Msk           (0x3UL << DIB_DAUTHSTATUS_SUID_Pos )           /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Mask */
+
+#define DIB_DAUTHSTATUS_NSUNID_Pos         18U                                            /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Position */
+#define DIB_DAUTHSTATUS_NSUNID_Msk         (0x3UL << DIB_DAUTHSTATUS_NSUNID_Pos )         /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Mask */
+
+#define DIB_DAUTHSTATUS_NSUID_Pos          16U                                            /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Position */
+#define DIB_DAUTHSTATUS_NSUID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSUID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Mask */
+
+#define DIB_DAUTHSTATUS_SNID_Pos            6U                                            /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_SNID_Msk           (0x3UL << DIB_DAUTHSTATUS_SNID_Pos )           /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_SID_Pos             4U                                            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_SID_Msk            (0x3UL << DIB_DAUTHSTATUS_SID_Pos )            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSNID_Pos           2U                                            /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSNID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSID_Pos            0U                                            /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSID_Msk           (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/)        /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */
+
+/* DDEVARCH, SCS Device Architecture Register Definitions */
+#define DIB_DDEVARCH_ARCHITECT_Pos         21U                                            /*!< DIB DDEVARCH: Architect Position */
+#define DIB_DDEVARCH_ARCHITECT_Msk         (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos )       /*!< DIB DDEVARCH: Architect Mask */
+
+#define DIB_DDEVARCH_PRESENT_Pos           20U                                            /*!< DIB DDEVARCH: DEVARCH Present Position */
+#define DIB_DDEVARCH_PRESENT_Msk           (0x1FUL << DIB_DDEVARCH_PRESENT_Pos )          /*!< DIB DDEVARCH: DEVARCH Present Mask */
+
+#define DIB_DDEVARCH_REVISION_Pos          16U                                            /*!< DIB DDEVARCH: Revision Position */
+#define DIB_DDEVARCH_REVISION_Msk          (0xFUL << DIB_DDEVARCH_REVISION_Pos )          /*!< DIB DDEVARCH: Revision Mask */
+
+#define DIB_DDEVARCH_ARCHVER_Pos           12U                                            /*!< DIB DDEVARCH: Architecture Version Position */
+#define DIB_DDEVARCH_ARCHVER_Msk           (0xFUL << DIB_DDEVARCH_ARCHVER_Pos )           /*!< DIB DDEVARCH: Architecture Version Mask */
+
+#define DIB_DDEVARCH_ARCHPART_Pos           0U                                            /*!< DIB DDEVARCH: Architecture Part Position */
+#define DIB_DDEVARCH_ARCHPART_Msk          (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/)     /*!< DIB DDEVARCH: Architecture Part Mask */
+
+/* DDEVTYPE, SCS Device Type Register Definitions */
+#define DIB_DDEVTYPE_SUB_Pos                4U                                            /*!< DIB DDEVTYPE: Sub-type Position */
+#define DIB_DDEVTYPE_SUB_Msk               (0xFUL << DIB_DDEVTYPE_SUB_Pos )               /*!< DIB DDEVTYPE: Sub-type Mask */
+
+#define DIB_DDEVTYPE_MAJOR_Pos              0U                                            /*!< DIB DDEVTYPE: Major type Position */
+#define DIB_DDEVTYPE_MAJOR_Msk             (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/)          /*!< DIB DDEVTYPE: Major type Mask */
+
+
+/*@} end of group CMSIS_DIB */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< \deprecated Core Debug Base Address */
+  #define DCB_BASE            (0xE000EDF0UL)                             /*!< DCB Base Address */
+  #define DIB_BASE            (0xE000EFB0UL)                             /*!< DIB Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< \deprecated Core Debug configuration struct */
+  #define DCB                 ((DCB_Type       *)     DCB_BASE         ) /*!< DCB configuration struct */
+  #define DIB                 ((DIB_Type       *)     DIB_BASE         ) /*!< DIB configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U)
+    #define PMU_BASE          (0xE0003000UL)                             /*!< PMU Base Address */
+    #define PMU               ((PMU_Type       *)     PMU_BASE         ) /*!< PMU configuration struct */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< \deprecated Core Debug Base Address           (non-secure address space) */
+  #define DCB_BASE_NS         (0xE002EDF0UL)                             /*!< DCB Base Address                  (non-secure address space) */
+  #define DIB_BASE_NS         (0xE002EFB0UL)                             /*!< DIB Base Address                  (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct   (non-secure address space) */
+  #define DCB_NS              ((DCB_Type       *)     DCB_BASE_NS      ) /*!< DCB configuration struct          (non-secure address space) */
+  #define DIB_NS              ((DIB_Type       *)     DIB_BASE_NS      ) /*!< DIB configuration struct          (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_register_aliases     Backwards Compatibility Aliases
+  \brief      Register alias definitions for backwards compatibility.
+  @{
+ */
+#define ID_ADR  (ID_AFR)    /*!< SCB Auxiliary Feature Register */
+/*@} */
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  PMU functions and events  #################################### */
+
+#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U)
+
+#include "pmu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+/* ##########################  MVE functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_MveFunctions MVE Functions
+  \brief    Function that provides MVE type.
+  @{
+ */
+
+/**
+  \brief   get MVE type
+  \details returns the MVE type
+  \returns
+   - \b  0: No Vector Extension (MVE)
+   - \b  1: Integer Vector Extension (MVE-I)
+   - \b  2: Floating-point Vector Extension (MVE-F)
+ */
+__STATIC_INLINE uint32_t SCB_GetMVEType(void)
+{
+  const uint32_t mvfr1 = FPU->MVFR1;
+  if      ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x2U << FPU_MVFR1_MVE_Pos))
+  {
+    return 2U;
+  }
+  else if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x1U << FPU_MVFR1_MVE_Pos))
+  {
+    return 1U;
+  }
+  else
+  {
+    return 0U;
+  }
+}
+
+
+/*@} end of CMSIS_Core_MveFunctions */
+
+
+/* ##########################  Cache functions  #################################### */
+
+#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \
+     (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)))
+#include "cachel1_armv7.h"
+#endif
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    Debug Control function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DCBFunctions Debug Control Functions
+  \brief    Functions that access the Debug Control Block.
+  @{
+ */
+
+
+/**
+  \brief   Set Debug Authentication Control Register
+  \details writes to Debug Authentication Control register.
+  \param [in]  value  value to be writen.
+ */
+__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register
+  \details Reads Debug Authentication Control register.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void)
+{
+    return (DCB->DAUTHCTRL);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Debug Authentication Control Register (non-secure)
+  \details writes to non-secure Debug Authentication Control register when in secure state.
+  \param [in]  value  value to be writen
+ */
+__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB_NS->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register (non-secure)
+  \details Reads non-secure Debug Authentication Control register when in secure state.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
+{
+    return (DCB_NS->DAUTHCTRL);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    Debug Identification function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions
+  \brief    Functions that access the Debug Identification Block.
+  @{
+ */
+
+
+/**
+  \brief   Get Debug Authentication Status Register
+  \details Reads Debug Authentication Status register.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t DIB_GetAuthStatus(void)
+{
+    return (DIB->DAUTHSTATUS);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Debug Authentication Status Register (non-secure)
+  \details Reads non-secure Debug Authentication Status register when in secure state.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void)
+{
+    return (DIB_NS->DAUTHSTATUS);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV81MML_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_armv8mbl.h b/Libraries/CMSIS/Core/Include/core_armv8mbl.h
similarity index 80%
rename from Libraries/CMSIS/Include/core_armv8mbl.h
rename to Libraries/CMSIS/Core/Include/core_armv8mbl.h
index 266f180a..932d3d18 100644
--- a/Libraries/CMSIS/Include/core_armv8mbl.h
+++ b/Libraries/CMSIS/Core/Include/core_armv8mbl.h
@@ -1,1921 +1,2222 @@
-/**************************************************************************//**
- * @file     core_armv8mbl.h
- * @brief    CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     12. November 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_ARMV8MBL_H_GENERIC
-#define __CORE_ARMV8MBL_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_ARMv8MBL
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS definitions */
-#define __ARMv8MBL_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __ARMv8MBL_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __ARMv8MBL_CMSIS_VERSION       ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \
-                                         __ARMv8MBL_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                     ( 2U)                                            /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MBL_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_ARMV8MBL_H_DEPENDANT
-#define __CORE_ARMV8MBL_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __ARMv8MBL_REV
-    #define __ARMv8MBL_REV               0x0000U
-    #warning "__ARMv8MBL_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __VTOR_PRESENT
-    #define __VTOR_PRESENT            0U
-    #warning "__VTOR_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-
-  #ifndef __ETM_PRESENT
-    #define __ETM_PRESENT             0U
-    #warning "__ETM_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MTB_PRESENT
-    #define __MTB_PRESENT             0U
-    #warning "__MTB_PRESENT not defined in device header file; using default!"
-  #endif
-
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group ARMv8MBL */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
-        uint32_t RESERVED5[16U];
-  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-#else
-        uint32_t RESERVED0;
-#endif
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-        uint32_t RESERVED0[6U];
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-        uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-        uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-        uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
-        uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
-        uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
-        uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
-        uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
-        uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
-        uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
-        uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
-        uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
-        uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
-        uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
-        uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
-        uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
-        uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
-        uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
-        uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
-        uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
-        uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
-        uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
-        uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
-        uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
-        uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
-        uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
-        uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
-        uint32_t RESERVED3[809U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
-        uint32_t RESERVED4[4U];
-  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
-#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI Periodic Synchronization Control Register Definitions */
-#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
-#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
-
-/* TPI Software Lock Status Register Definitions */
-#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
-#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
-
-#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
-#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
-
-#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
-#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
-#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
-        uint32_t RESERVED0[7U];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  1U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
-#endif
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< CoreDebug DEMCR: DWTENA Position */
-#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< CoreDebug DEMCR: DWTENA Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
-
-
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
-
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
-
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
-#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
-#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
-#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
-#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
-#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
-#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
-#else
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
-#endif
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-           If VTOR is not present address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
-  uint32_t *vectors = (uint32_t *)0x0U;
-#endif
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  __DSB();
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
-  uint32_t *vectors = (uint32_t *)0x0U;
-#endif
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MBL_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_armv8mbl.h
+ * @brief    CMSIS Armv8-M Baseline Core Peripheral Access Layer Header File
+ * @version  V5.1.0
+ * @date     27. March 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include                        /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header                   /* treat file as system include file */
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic ignored "-Wpedantic"   /* disable pedantic warning due to unnamed structs/unions */
+#endif
+
+#ifndef __CORE_ARMV8MBL_H_GENERIC
+#define __CORE_ARMV8MBL_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMv8MBL
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS definitions */
+#define __ARMv8MBL_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv8MBL_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv8MBL_CMSIS_VERSION       ((__ARMv8MBL_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv8MBL_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                     (2U)                                        /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MBL_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV8MBL_H_DEPENDANT
+#define __CORE_ARMV8MBL_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv8MBL_REV
+    #define __ARMv8MBL_REV               0x0000U
+    #warning "__ARMv8MBL_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT            0U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ETM_PRESENT
+    #define __ETM_PRESENT             0U
+    #warning "__ETM_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MTB_PRESENT
+    #define __MTB_PRESENT             0U
+    #warning "__MTB_PRESENT not defined in device header file; using default!"
+  #endif
+
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv8MBL */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+#else
+        uint32_t RESERVED0;
+#endif
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+        uint32_t RESERVED0[6U];
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[809U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
+        uint32_t RESERVED4[4U];
+  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
+#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI Periodic Synchronization Control Register Definitions */
+#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
+#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
+
+/* TPI Software Lock Status Register Definitions */
+#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
+#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
+
+#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
+#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
+
+#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
+#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+        uint32_t RESERVED0[7U];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  1U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#endif
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  \deprecated Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< \deprecated CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< \deprecated CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< \deprecated CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< \deprecated CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< \deprecated CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< \deprecated CoreDebug DEMCR: DWTENA Position */
+#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< \deprecated CoreDebug DEMCR: DWTENA Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< \deprecated CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< \deprecated CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup CMSIS_DCB       Debug Control Block
+  \brief    Type definitions for the Debug Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Control Block Registers (DCB).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} DCB_Type;
+
+/* DHCSR, Debug Halting Control and Status Register Definitions */
+#define DCB_DHCSR_DBGKEY_Pos               16U                                            /*!< DCB DHCSR: Debug key Position */
+#define DCB_DHCSR_DBGKEY_Msk               (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos)             /*!< DCB DHCSR: Debug key Mask */
+
+#define DCB_DHCSR_S_RESTART_ST_Pos         26U                                            /*!< DCB DHCSR: Restart sticky status Position */
+#define DCB_DHCSR_S_RESTART_ST_Msk         (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos)          /*!< DCB DHCSR: Restart sticky status Mask */
+
+#define DCB_DHCSR_S_RESET_ST_Pos           25U                                            /*!< DCB DHCSR: Reset sticky status Position */
+#define DCB_DHCSR_S_RESET_ST_Msk           (0x1UL << DCB_DHCSR_S_RESET_ST_Pos)            /*!< DCB DHCSR: Reset sticky status Mask */
+
+#define DCB_DHCSR_S_RETIRE_ST_Pos          24U                                            /*!< DCB DHCSR: Retire sticky status Position */
+#define DCB_DHCSR_S_RETIRE_ST_Msk          (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos)           /*!< DCB DHCSR: Retire sticky status Mask */
+
+#define DCB_DHCSR_S_SDE_Pos                20U                                            /*!< DCB DHCSR: Secure debug enabled Position */
+#define DCB_DHCSR_S_SDE_Msk                (0x1UL << DCB_DHCSR_S_SDE_Pos)                 /*!< DCB DHCSR: Secure debug enabled Mask */
+
+#define DCB_DHCSR_S_LOCKUP_Pos             19U                                            /*!< DCB DHCSR: Lockup status Position */
+#define DCB_DHCSR_S_LOCKUP_Msk             (0x1UL << DCB_DHCSR_S_LOCKUP_Pos)              /*!< DCB DHCSR: Lockup status Mask */
+
+#define DCB_DHCSR_S_SLEEP_Pos              18U                                            /*!< DCB DHCSR: Sleeping status Position */
+#define DCB_DHCSR_S_SLEEP_Msk              (0x1UL << DCB_DHCSR_S_SLEEP_Pos)               /*!< DCB DHCSR: Sleeping status Mask */
+
+#define DCB_DHCSR_S_HALT_Pos               17U                                            /*!< DCB DHCSR: Halted status Position */
+#define DCB_DHCSR_S_HALT_Msk               (0x1UL << DCB_DHCSR_S_HALT_Pos)                /*!< DCB DHCSR: Halted status Mask */
+
+#define DCB_DHCSR_S_REGRDY_Pos             16U                                            /*!< DCB DHCSR: Register ready status Position */
+#define DCB_DHCSR_S_REGRDY_Msk             (0x1UL << DCB_DHCSR_S_REGRDY_Pos)              /*!< DCB DHCSR: Register ready status Mask */
+
+#define DCB_DHCSR_C_MASKINTS_Pos            3U                                            /*!< DCB DHCSR: Mask interrupts control Position */
+#define DCB_DHCSR_C_MASKINTS_Msk           (0x1UL << DCB_DHCSR_C_MASKINTS_Pos)            /*!< DCB DHCSR: Mask interrupts control Mask */
+
+#define DCB_DHCSR_C_STEP_Pos                2U                                            /*!< DCB DHCSR: Step control Position */
+#define DCB_DHCSR_C_STEP_Msk               (0x1UL << DCB_DHCSR_C_STEP_Pos)                /*!< DCB DHCSR: Step control Mask */
+
+#define DCB_DHCSR_C_HALT_Pos                1U                                            /*!< DCB DHCSR: Halt control Position */
+#define DCB_DHCSR_C_HALT_Msk               (0x1UL << DCB_DHCSR_C_HALT_Pos)                /*!< DCB DHCSR: Halt control Mask */
+
+#define DCB_DHCSR_C_DEBUGEN_Pos             0U                                            /*!< DCB DHCSR: Debug enable control Position */
+#define DCB_DHCSR_C_DEBUGEN_Msk            (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/)         /*!< DCB DHCSR: Debug enable control Mask */
+
+/* DCRSR, Debug Core Register Select Register Definitions */
+#define DCB_DCRSR_REGWnR_Pos               16U                                            /*!< DCB DCRSR: Register write/not-read Position */
+#define DCB_DCRSR_REGWnR_Msk               (0x1UL << DCB_DCRSR_REGWnR_Pos)                /*!< DCB DCRSR: Register write/not-read Mask */
+
+#define DCB_DCRSR_REGSEL_Pos                0U                                            /*!< DCB DCRSR: Register selector Position */
+#define DCB_DCRSR_REGSEL_Msk               (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/)           /*!< DCB DCRSR: Register selector Mask */
+
+/* DCRDR, Debug Core Register Data Register Definitions */
+#define DCB_DCRDR_DBGTMP_Pos                0U                                            /*!< DCB DCRDR: Data temporary buffer Position */
+#define DCB_DCRDR_DBGTMP_Msk               (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/)     /*!< DCB DCRDR: Data temporary buffer Mask */
+
+/* DEMCR, Debug Exception and Monitor Control Register Definitions */
+#define DCB_DEMCR_TRCENA_Pos               24U                                            /*!< DCB DEMCR: Trace enable Position */
+#define DCB_DEMCR_TRCENA_Msk               (0x1UL << DCB_DEMCR_TRCENA_Pos)                /*!< DCB DEMCR: Trace enable Mask */
+
+#define DCB_DEMCR_VC_HARDERR_Pos           10U                                            /*!< DCB DEMCR: Vector Catch HardFault errors Position */
+#define DCB_DEMCR_VC_HARDERR_Msk           (0x1UL << DCB_DEMCR_VC_HARDERR_Pos)            /*!< DCB DEMCR: Vector Catch HardFault errors Mask */
+
+#define DCB_DEMCR_VC_CORERESET_Pos          0U                                            /*!< DCB DEMCR: Vector Catch Core reset Position */
+#define DCB_DEMCR_VC_CORERESET_Msk         (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/)      /*!< DCB DEMCR: Vector Catch Core reset Mask */
+
+/* DAUTHCTRL, Debug Authentication Control Register Definitions */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Pos        3U                                            /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Msk       (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos)        /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPNIDENSEL_Pos        2U                                            /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPNIDENSEL_Msk       (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos)        /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */
+
+#define DCB_DAUTHCTRL_INTSPIDEN_Pos         1U                                            /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPIDEN_Msk        (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos)         /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPIDENSEL_Pos         0U                                            /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPIDENSEL_Msk        (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/)     /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */
+
+/* DSCSR, Debug Security Control and Status Register Definitions */
+#define DCB_DSCSR_CDSKEY_Pos               17U                                            /*!< DCB DSCSR: CDS write-enable key Position */
+#define DCB_DSCSR_CDSKEY_Msk               (0x1UL << DCB_DSCSR_CDSKEY_Pos)                /*!< DCB DSCSR: CDS write-enable key Mask */
+
+#define DCB_DSCSR_CDS_Pos                  16U                                            /*!< DCB DSCSR: Current domain Secure Position */
+#define DCB_DSCSR_CDS_Msk                  (0x1UL << DCB_DSCSR_CDS_Pos)                   /*!< DCB DSCSR: Current domain Secure Mask */
+
+#define DCB_DSCSR_SBRSEL_Pos                1U                                            /*!< DCB DSCSR: Secure banked register select Position */
+#define DCB_DSCSR_SBRSEL_Msk               (0x1UL << DCB_DSCSR_SBRSEL_Pos)                /*!< DCB DSCSR: Secure banked register select Mask */
+
+#define DCB_DSCSR_SBRSELEN_Pos              0U                                            /*!< DCB DSCSR: Secure banked register select enable Position */
+#define DCB_DSCSR_SBRSELEN_Msk             (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/)          /*!< DCB DSCSR: Secure banked register select enable Mask */
+
+/*@} end of group CMSIS_DCB */
+
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DIB       Debug Identification Block
+  \brief    Type definitions for the Debug Identification Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Identification Block Registers (DIB).
+ */
+typedef struct
+{
+  __OM  uint32_t DLAR;                   /*!< Offset: 0x000 ( /W)  SCS Software Lock Access Register */
+  __IM  uint32_t DLSR;                   /*!< Offset: 0x004 (R/ )  SCS Software Lock Status Register */
+  __IM  uint32_t DAUTHSTATUS;            /*!< Offset: 0x008 (R/ )  Debug Authentication Status Register */
+  __IM  uint32_t DDEVARCH;               /*!< Offset: 0x00C (R/ )  SCS Device Architecture Register */
+  __IM  uint32_t DDEVTYPE;               /*!< Offset: 0x010 (R/ )  SCS Device Type Register */
+} DIB_Type;
+
+/* DLAR, SCS Software Lock Access Register Definitions */
+#define DIB_DLAR_KEY_Pos                    0U                                            /*!< DIB DLAR: KEY Position */
+#define DIB_DLAR_KEY_Msk                   (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */)        /*!< DIB DLAR: KEY Mask */
+
+/* DLSR, SCS Software Lock Status Register Definitions */
+#define DIB_DLSR_nTT_Pos                    2U                                            /*!< DIB DLSR: Not thirty-two bit Position */
+#define DIB_DLSR_nTT_Msk                   (0x1UL << DIB_DLSR_nTT_Pos )                   /*!< DIB DLSR: Not thirty-two bit Mask */
+
+#define DIB_DLSR_SLK_Pos                    1U                                            /*!< DIB DLSR: Software Lock status Position */
+#define DIB_DLSR_SLK_Msk                   (0x1UL << DIB_DLSR_SLK_Pos )                   /*!< DIB DLSR: Software Lock status Mask */
+
+#define DIB_DLSR_SLI_Pos                    0U                                            /*!< DIB DLSR: Software Lock implemented Position */
+#define DIB_DLSR_SLI_Msk                   (0x1UL /*<< DIB_DLSR_SLI_Pos*/)                /*!< DIB DLSR: Software Lock implemented Mask */
+
+/* DAUTHSTATUS, Debug Authentication Status Register Definitions */
+#define DIB_DAUTHSTATUS_SNID_Pos            6U                                            /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_SNID_Msk           (0x3UL << DIB_DAUTHSTATUS_SNID_Pos )           /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_SID_Pos             4U                                            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_SID_Msk            (0x3UL << DIB_DAUTHSTATUS_SID_Pos )            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSNID_Pos           2U                                            /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSNID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSID_Pos            0U                                            /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSID_Msk           (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/)        /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */
+
+/* DDEVARCH, SCS Device Architecture Register Definitions */
+#define DIB_DDEVARCH_ARCHITECT_Pos         21U                                            /*!< DIB DDEVARCH: Architect Position */
+#define DIB_DDEVARCH_ARCHITECT_Msk         (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos )       /*!< DIB DDEVARCH: Architect Mask */
+
+#define DIB_DDEVARCH_PRESENT_Pos           20U                                            /*!< DIB DDEVARCH: DEVARCH Present Position */
+#define DIB_DDEVARCH_PRESENT_Msk           (0x1FUL << DIB_DDEVARCH_PRESENT_Pos )          /*!< DIB DDEVARCH: DEVARCH Present Mask */
+
+#define DIB_DDEVARCH_REVISION_Pos          16U                                            /*!< DIB DDEVARCH: Revision Position */
+#define DIB_DDEVARCH_REVISION_Msk          (0xFUL << DIB_DDEVARCH_REVISION_Pos )          /*!< DIB DDEVARCH: Revision Mask */
+
+#define DIB_DDEVARCH_ARCHVER_Pos           12U                                            /*!< DIB DDEVARCH: Architecture Version Position */
+#define DIB_DDEVARCH_ARCHVER_Msk           (0xFUL << DIB_DDEVARCH_ARCHVER_Pos )           /*!< DIB DDEVARCH: Architecture Version Mask */
+
+#define DIB_DDEVARCH_ARCHPART_Pos           0U                                            /*!< DIB DDEVARCH: Architecture Part Position */
+#define DIB_DDEVARCH_ARCHPART_Msk          (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/)     /*!< DIB DDEVARCH: Architecture Part Mask */
+
+/* DDEVTYPE, SCS Device Type Register Definitions */
+#define DIB_DDEVTYPE_SUB_Pos                4U                                            /*!< DIB DDEVTYPE: Sub-type Position */
+#define DIB_DDEVTYPE_SUB_Msk               (0xFUL << DIB_DDEVTYPE_SUB_Pos )               /*!< DIB DDEVTYPE: Sub-type Mask */
+
+#define DIB_DDEVTYPE_MAJOR_Pos              0U                                            /*!< DIB DDEVTYPE: Major type Position */
+#define DIB_DDEVTYPE_MAJOR_Msk             (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/)          /*!< DIB DDEVTYPE: Major type Mask */
+
+
+/*@} end of group CMSIS_DIB */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< \deprecated Core Debug Base Address */
+  #define DCB_BASE            (0xE000EDF0UL)                             /*!< DCB Base Address */
+  #define DIB_BASE            (0xE000EFB0UL)                             /*!< DIB Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< \deprecated Core Debug configuration struct */
+  #define DCB                 ((DCB_Type       *)     DCB_BASE         ) /*!< DCB configuration struct */
+  #define DIB                 ((DIB_Type       *)     DIB_BASE         ) /*!< DIB configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< \deprecated Core Debug Base Address           (non-secure address space) */
+  #define DCB_BASE_NS         (0xE002EDF0UL)                             /*!< DCB Base Address                  (non-secure address space) */
+  #define DIB_BASE_NS         (0xE002EFB0UL)                             /*!< DIB Base Address                  (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct   (non-secure address space) */
+  #define DCB_NS              ((DCB_Type       *)     DCB_BASE_NS      ) /*!< DCB configuration struct          (non-secure address space) */
+  #define DIB_NS              ((DIB_Type       *)     DIB_BASE_NS      ) /*!< DIB configuration struct          (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+           If VTOR is not present address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    Debug Control function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DCBFunctions Debug Control Functions
+  \brief    Functions that access the Debug Control Block.
+  @{
+ */
+
+ 
+/**
+  \brief   Set Debug Authentication Control Register
+  \details writes to Debug Authentication Control register.
+  \param [in]  value  value to be writen.
+ */
+__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register
+  \details Reads Debug Authentication Control register.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void)
+{
+    return (DCB->DAUTHCTRL);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Debug Authentication Control Register (non-secure)
+  \details writes to non-secure Debug Authentication Control register when in secure state.
+  \param [in]  value  value to be writen
+ */
+__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB_NS->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register (non-secure)
+  \details Reads non-secure Debug Authentication Control register when in secure state.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
+{
+    return (DCB_NS->DAUTHCTRL);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    Debug Identification function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions
+  \brief    Functions that access the Debug Identification Block.
+  @{
+ */
+
+ 
+/**
+  \brief   Get Debug Authentication Status Register
+  \details Reads Debug Authentication Status register.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t DIB_GetAuthStatus(void)
+{
+    return (DIB->DAUTHSTATUS);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Debug Authentication Status Register (non-secure)
+  \details Reads non-secure Debug Authentication Status register when in secure state.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void)
+{
+    return (DIB_NS->DAUTHSTATUS);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MBL_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_armv8mml.h b/Libraries/CMSIS/Core/Include/core_armv8mml.h
similarity index 83%
rename from Libraries/CMSIS/Include/core_armv8mml.h
rename to Libraries/CMSIS/Core/Include/core_armv8mml.h
index ba5d83ff..c119fbf2 100644
--- a/Libraries/CMSIS/Include/core_armv8mml.h
+++ b/Libraries/CMSIS/Core/Include/core_armv8mml.h
@@ -1,2835 +1,3209 @@
-/**************************************************************************//**
- * @file     core_armv8mml.h
- * @brief    CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File
- * @version  V5.1.0
- * @date     12. September 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_ARMV8MML_H_GENERIC
-#define __CORE_ARMV8MML_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_ARMv8MML
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS Armv8MML definitions */
-#define __ARMv8MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __ARMv8MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __ARMv8MML_CMSIS_VERSION       ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \
-                                         __ARMv8MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MML_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_ARMV8MML_H_DEPENDANT
-#define __CORE_ARMV8MML_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __ARMv8MML_REV
-    #define __ARMv8MML_REV               0x0000U
-    #warning "__ARMv8MML_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DSP_PRESENT
-    #define __DSP_PRESENT             0U
-    #warning "__DSP_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group ARMv8MML */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
-    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
-    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
-#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
-
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
-        uint32_t RESERVED5[16U];
-  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED6[580U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
-        uint32_t RESERVED3[92U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
-        uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
-        uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
-        uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
-#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
-#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
-
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
-#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
-#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Non-Secure Access Control Register Definitions */
-#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
-#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
-
-#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
-#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
-
-#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
-#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[32U];
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
-        uint32_t RESERVED6[4U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Stimulus Port Register Definitions */
-#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
-#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
-
-#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
-#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
-#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
-
-#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
-#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-        uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-        uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-        uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
-        uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
-        uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
-        uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
-        uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
-        uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
-        uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
-        uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
-        uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
-        uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
-        uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
-        uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
-        uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
-        uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
-        uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
-        uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
-        uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
-        uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
-        uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
-        uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
-        uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
-        uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
-        uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
-        uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
-        uint32_t RESERVED32[934U];
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
-        uint32_t RESERVED33[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
-#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
-        uint32_t RESERVED3[809U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
-        uint32_t RESERVED4[4U];
-  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
-#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI Periodic Synchronization Control Register Definitions */
-#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
-#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
-
-/* TPI Software Lock Status Register Definitions */
-#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
-#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
-
-#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
-#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
-
-#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
-#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
-#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
-  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
-  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
-  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
-        uint32_t RESERVED0[1];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
-#else
-        uint32_t RESERVED0[3];
-#endif
-  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
-  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/* Secure Fault Status Register Definitions */
-#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
-#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
-
-#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
-#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
-
-#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
-#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
-
-#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
-#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
-
-#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
-#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
-
-#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
-#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
-
-#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
-#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
-
-#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
-#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
-#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
-
-#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
-#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
-
-#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
-#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
-
-#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
-#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
-
-#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
-#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
-
-#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
-#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
-#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
-#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
-
-  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
-
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
-
-  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
-  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
-
-  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
-
-  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
-  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
-#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
-#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
-#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
-#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
-#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
-#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
-#else
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
-#endif
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  __DSB();
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Priority Grouping (non-secure)
-  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */
-  SCB_NS->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping (non-secure)
-  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
-{
-  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = FPU->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
-  {
-    return 2U;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV8MML_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_armv8mml.h
+ * @brief    CMSIS Armv8-M Mainline Core Peripheral Access Layer Header File
+ * @version  V5.2.3
+ * @date     13. October 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include                        /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header                   /* treat file as system include file */
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic ignored "-Wpedantic"   /* disable pedantic warning due to unnamed structs/unions */
+#endif
+
+#ifndef __CORE_ARMV8MML_H_GENERIC
+#define __CORE_ARMV8MML_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_ARMv8MML
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS Armv8MML definitions */
+#define __ARMv8MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __ARMv8MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __ARMv8MML_CMSIS_VERSION       ((__ARMv8MML_CMSIS_VERSION_MAIN << 16U) | \
+                                         __ARMv8MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                     (80U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MML_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_ARMV8MML_H_DEPENDANT
+#define __CORE_ARMV8MML_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __ARMv8MML_REV
+    #define __ARMv8MML_REV               0x0000U
+    #warning "__ARMv8MML_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group ARMv8MML */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED7[21U];
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x0E4 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x0E8 (R/W)  Secure Fault Address Register */
+        uint32_t RESERVED3[69U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+  __OM  uint32_t BPIALL;                 /*!< Offset: 0x278 ( /W)  Branch Predictor Invalidate All */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 5U)                 /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[809U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
+        uint32_t RESERVED4[4U];
+  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
+#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI Periodic Synchronization Control Register Definitions */
+#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
+#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
+
+/* TPI Software Lock Status Register Definitions */
+#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
+#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
+
+#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
+#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
+
+#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
+#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and VFP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and VFP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and VFP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/* Media and VFP Feature Register 2 Definitions */
+#define FPU_MVFR2_FPMisc_Pos                4U                                            /*!< MVFR2: FPMisc bits Position */
+#define FPU_MVFR2_FPMisc_Msk               (0xFUL << FPU_MVFR2_FPMisc_Pos)                /*!< MVFR2: FPMisc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  \deprecated Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< \deprecated CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< \deprecated CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< \deprecated CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< \deprecated CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< \deprecated CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< \deprecated CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< \deprecated CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< \deprecated CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< \deprecated CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup CMSIS_DCB       Debug Control Block
+  \brief    Type definitions for the Debug Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Control Block Registers (DCB).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} DCB_Type;
+
+/* DHCSR, Debug Halting Control and Status Register Definitions */
+#define DCB_DHCSR_DBGKEY_Pos               16U                                            /*!< DCB DHCSR: Debug key Position */
+#define DCB_DHCSR_DBGKEY_Msk               (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos)             /*!< DCB DHCSR: Debug key Mask */
+
+#define DCB_DHCSR_S_RESTART_ST_Pos         26U                                            /*!< DCB DHCSR: Restart sticky status Position */
+#define DCB_DHCSR_S_RESTART_ST_Msk         (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos)          /*!< DCB DHCSR: Restart sticky status Mask */
+
+#define DCB_DHCSR_S_RESET_ST_Pos           25U                                            /*!< DCB DHCSR: Reset sticky status Position */
+#define DCB_DHCSR_S_RESET_ST_Msk           (0x1UL << DCB_DHCSR_S_RESET_ST_Pos)            /*!< DCB DHCSR: Reset sticky status Mask */
+
+#define DCB_DHCSR_S_RETIRE_ST_Pos          24U                                            /*!< DCB DHCSR: Retire sticky status Position */
+#define DCB_DHCSR_S_RETIRE_ST_Msk          (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos)           /*!< DCB DHCSR: Retire sticky status Mask */
+
+#define DCB_DHCSR_S_SDE_Pos                20U                                            /*!< DCB DHCSR: Secure debug enabled Position */
+#define DCB_DHCSR_S_SDE_Msk                (0x1UL << DCB_DHCSR_S_SDE_Pos)                 /*!< DCB DHCSR: Secure debug enabled Mask */
+
+#define DCB_DHCSR_S_LOCKUP_Pos             19U                                            /*!< DCB DHCSR: Lockup status Position */
+#define DCB_DHCSR_S_LOCKUP_Msk             (0x1UL << DCB_DHCSR_S_LOCKUP_Pos)              /*!< DCB DHCSR: Lockup status Mask */
+
+#define DCB_DHCSR_S_SLEEP_Pos              18U                                            /*!< DCB DHCSR: Sleeping status Position */
+#define DCB_DHCSR_S_SLEEP_Msk              (0x1UL << DCB_DHCSR_S_SLEEP_Pos)               /*!< DCB DHCSR: Sleeping status Mask */
+
+#define DCB_DHCSR_S_HALT_Pos               17U                                            /*!< DCB DHCSR: Halted status Position */
+#define DCB_DHCSR_S_HALT_Msk               (0x1UL << DCB_DHCSR_S_HALT_Pos)                /*!< DCB DHCSR: Halted status Mask */
+
+#define DCB_DHCSR_S_REGRDY_Pos             16U                                            /*!< DCB DHCSR: Register ready status Position */
+#define DCB_DHCSR_S_REGRDY_Msk             (0x1UL << DCB_DHCSR_S_REGRDY_Pos)              /*!< DCB DHCSR: Register ready status Mask */
+
+#define DCB_DHCSR_C_SNAPSTALL_Pos           5U                                            /*!< DCB DHCSR: Snap stall control Position */
+#define DCB_DHCSR_C_SNAPSTALL_Msk          (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos)           /*!< DCB DHCSR: Snap stall control Mask */
+
+#define DCB_DHCSR_C_MASKINTS_Pos            3U                                            /*!< DCB DHCSR: Mask interrupts control Position */
+#define DCB_DHCSR_C_MASKINTS_Msk           (0x1UL << DCB_DHCSR_C_MASKINTS_Pos)            /*!< DCB DHCSR: Mask interrupts control Mask */
+
+#define DCB_DHCSR_C_STEP_Pos                2U                                            /*!< DCB DHCSR: Step control Position */
+#define DCB_DHCSR_C_STEP_Msk               (0x1UL << DCB_DHCSR_C_STEP_Pos)                /*!< DCB DHCSR: Step control Mask */
+
+#define DCB_DHCSR_C_HALT_Pos                1U                                            /*!< DCB DHCSR: Halt control Position */
+#define DCB_DHCSR_C_HALT_Msk               (0x1UL << DCB_DHCSR_C_HALT_Pos)                /*!< DCB DHCSR: Halt control Mask */
+
+#define DCB_DHCSR_C_DEBUGEN_Pos             0U                                            /*!< DCB DHCSR: Debug enable control Position */
+#define DCB_DHCSR_C_DEBUGEN_Msk            (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/)         /*!< DCB DHCSR: Debug enable control Mask */
+
+/* DCRSR, Debug Core Register Select Register Definitions */
+#define DCB_DCRSR_REGWnR_Pos               16U                                            /*!< DCB DCRSR: Register write/not-read Position */
+#define DCB_DCRSR_REGWnR_Msk               (0x1UL << DCB_DCRSR_REGWnR_Pos)                /*!< DCB DCRSR: Register write/not-read Mask */
+
+#define DCB_DCRSR_REGSEL_Pos                0U                                            /*!< DCB DCRSR: Register selector Position */
+#define DCB_DCRSR_REGSEL_Msk               (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/)           /*!< DCB DCRSR: Register selector Mask */
+
+/* DCRDR, Debug Core Register Data Register Definitions */
+#define DCB_DCRDR_DBGTMP_Pos                0U                                            /*!< DCB DCRDR: Data temporary buffer Position */
+#define DCB_DCRDR_DBGTMP_Msk               (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/)     /*!< DCB DCRDR: Data temporary buffer Mask */
+
+/* DEMCR, Debug Exception and Monitor Control Register Definitions */
+#define DCB_DEMCR_TRCENA_Pos               24U                                            /*!< DCB DEMCR: Trace enable Position */
+#define DCB_DEMCR_TRCENA_Msk               (0x1UL << DCB_DEMCR_TRCENA_Pos)                /*!< DCB DEMCR: Trace enable Mask */
+
+#define DCB_DEMCR_MONPRKEY_Pos             23U                                            /*!< DCB DEMCR: Monitor pend req key Position */
+#define DCB_DEMCR_MONPRKEY_Msk             (0x1UL << DCB_DEMCR_MONPRKEY_Pos)              /*!< DCB DEMCR: Monitor pend req key Mask */
+
+#define DCB_DEMCR_UMON_EN_Pos              21U                                            /*!< DCB DEMCR: Unprivileged monitor enable Position */
+#define DCB_DEMCR_UMON_EN_Msk              (0x1UL << DCB_DEMCR_UMON_EN_Pos)               /*!< DCB DEMCR: Unprivileged monitor enable Mask */
+
+#define DCB_DEMCR_SDME_Pos                 20U                                            /*!< DCB DEMCR: Secure DebugMonitor enable Position */
+#define DCB_DEMCR_SDME_Msk                 (0x1UL << DCB_DEMCR_SDME_Pos)                  /*!< DCB DEMCR: Secure DebugMonitor enable Mask */
+
+#define DCB_DEMCR_MON_REQ_Pos              19U                                            /*!< DCB DEMCR: Monitor request Position */
+#define DCB_DEMCR_MON_REQ_Msk              (0x1UL << DCB_DEMCR_MON_REQ_Pos)               /*!< DCB DEMCR: Monitor request Mask */
+
+#define DCB_DEMCR_MON_STEP_Pos             18U                                            /*!< DCB DEMCR: Monitor step Position */
+#define DCB_DEMCR_MON_STEP_Msk             (0x1UL << DCB_DEMCR_MON_STEP_Pos)              /*!< DCB DEMCR: Monitor step Mask */
+
+#define DCB_DEMCR_MON_PEND_Pos             17U                                            /*!< DCB DEMCR: Monitor pend Position */
+#define DCB_DEMCR_MON_PEND_Msk             (0x1UL << DCB_DEMCR_MON_PEND_Pos)              /*!< DCB DEMCR: Monitor pend Mask */
+
+#define DCB_DEMCR_MON_EN_Pos               16U                                            /*!< DCB DEMCR: Monitor enable Position */
+#define DCB_DEMCR_MON_EN_Msk               (0x1UL << DCB_DEMCR_MON_EN_Pos)                /*!< DCB DEMCR: Monitor enable Mask */
+
+#define DCB_DEMCR_VC_SFERR_Pos             11U                                            /*!< DCB DEMCR: Vector Catch SecureFault Position */
+#define DCB_DEMCR_VC_SFERR_Msk             (0x1UL << DCB_DEMCR_VC_SFERR_Pos)              /*!< DCB DEMCR: Vector Catch SecureFault Mask */
+
+#define DCB_DEMCR_VC_HARDERR_Pos           10U                                            /*!< DCB DEMCR: Vector Catch HardFault errors Position */
+#define DCB_DEMCR_VC_HARDERR_Msk           (0x1UL << DCB_DEMCR_VC_HARDERR_Pos)            /*!< DCB DEMCR: Vector Catch HardFault errors Mask */
+
+#define DCB_DEMCR_VC_INTERR_Pos             9U                                            /*!< DCB DEMCR: Vector Catch interrupt errors Position */
+#define DCB_DEMCR_VC_INTERR_Msk            (0x1UL << DCB_DEMCR_VC_INTERR_Pos)             /*!< DCB DEMCR: Vector Catch interrupt errors Mask */
+
+#define DCB_DEMCR_VC_BUSERR_Pos             8U                                            /*!< DCB DEMCR: Vector Catch BusFault errors Position */
+#define DCB_DEMCR_VC_BUSERR_Msk            (0x1UL << DCB_DEMCR_VC_BUSERR_Pos)             /*!< DCB DEMCR: Vector Catch BusFault errors Mask */
+
+#define DCB_DEMCR_VC_STATERR_Pos            7U                                            /*!< DCB DEMCR: Vector Catch state errors Position */
+#define DCB_DEMCR_VC_STATERR_Msk           (0x1UL << DCB_DEMCR_VC_STATERR_Pos)            /*!< DCB DEMCR: Vector Catch state errors Mask */
+
+#define DCB_DEMCR_VC_CHKERR_Pos             6U                                            /*!< DCB DEMCR: Vector Catch check errors Position */
+#define DCB_DEMCR_VC_CHKERR_Msk            (0x1UL << DCB_DEMCR_VC_CHKERR_Pos)             /*!< DCB DEMCR: Vector Catch check errors Mask */
+
+#define DCB_DEMCR_VC_NOCPERR_Pos            5U                                            /*!< DCB DEMCR: Vector Catch NOCP errors Position */
+#define DCB_DEMCR_VC_NOCPERR_Msk           (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos)            /*!< DCB DEMCR: Vector Catch NOCP errors Mask */
+
+#define DCB_DEMCR_VC_MMERR_Pos              4U                                            /*!< DCB DEMCR: Vector Catch MemManage errors Position */
+#define DCB_DEMCR_VC_MMERR_Msk             (0x1UL << DCB_DEMCR_VC_MMERR_Pos)              /*!< DCB DEMCR: Vector Catch MemManage errors Mask */
+
+#define DCB_DEMCR_VC_CORERESET_Pos          0U                                            /*!< DCB DEMCR: Vector Catch Core reset Position */
+#define DCB_DEMCR_VC_CORERESET_Msk         (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/)      /*!< DCB DEMCR: Vector Catch Core reset Mask */
+
+/* DAUTHCTRL, Debug Authentication Control Register Definitions */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Pos        3U                                            /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Msk       (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos)        /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPNIDENSEL_Pos        2U                                            /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPNIDENSEL_Msk       (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos)        /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */
+
+#define DCB_DAUTHCTRL_INTSPIDEN_Pos         1U                                            /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPIDEN_Msk        (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos)         /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPIDENSEL_Pos         0U                                            /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPIDENSEL_Msk        (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/)     /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */
+
+/* DSCSR, Debug Security Control and Status Register Definitions */
+#define DCB_DSCSR_CDSKEY_Pos               17U                                            /*!< DCB DSCSR: CDS write-enable key Position */
+#define DCB_DSCSR_CDSKEY_Msk               (0x1UL << DCB_DSCSR_CDSKEY_Pos)                /*!< DCB DSCSR: CDS write-enable key Mask */
+
+#define DCB_DSCSR_CDS_Pos                  16U                                            /*!< DCB DSCSR: Current domain Secure Position */
+#define DCB_DSCSR_CDS_Msk                  (0x1UL << DCB_DSCSR_CDS_Pos)                   /*!< DCB DSCSR: Current domain Secure Mask */
+
+#define DCB_DSCSR_SBRSEL_Pos                1U                                            /*!< DCB DSCSR: Secure banked register select Position */
+#define DCB_DSCSR_SBRSEL_Msk               (0x1UL << DCB_DSCSR_SBRSEL_Pos)                /*!< DCB DSCSR: Secure banked register select Mask */
+
+#define DCB_DSCSR_SBRSELEN_Pos              0U                                            /*!< DCB DSCSR: Secure banked register select enable Position */
+#define DCB_DSCSR_SBRSELEN_Msk             (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/)          /*!< DCB DSCSR: Secure banked register select enable Mask */
+
+/*@} end of group CMSIS_DCB */
+
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DIB       Debug Identification Block
+  \brief    Type definitions for the Debug Identification Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Identification Block Registers (DIB).
+ */
+typedef struct
+{
+  __OM  uint32_t DLAR;                   /*!< Offset: 0x000 ( /W)  SCS Software Lock Access Register */
+  __IM  uint32_t DLSR;                   /*!< Offset: 0x004 (R/ )  SCS Software Lock Status Register */
+  __IM  uint32_t DAUTHSTATUS;            /*!< Offset: 0x008 (R/ )  Debug Authentication Status Register */
+  __IM  uint32_t DDEVARCH;               /*!< Offset: 0x00C (R/ )  SCS Device Architecture Register */
+  __IM  uint32_t DDEVTYPE;               /*!< Offset: 0x010 (R/ )  SCS Device Type Register */
+} DIB_Type;
+
+/* DLAR, SCS Software Lock Access Register Definitions */
+#define DIB_DLAR_KEY_Pos                    0U                                            /*!< DIB DLAR: KEY Position */
+#define DIB_DLAR_KEY_Msk                   (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */)        /*!< DIB DLAR: KEY Mask */
+
+/* DLSR, SCS Software Lock Status Register Definitions */
+#define DIB_DLSR_nTT_Pos                    2U                                            /*!< DIB DLSR: Not thirty-two bit Position */
+#define DIB_DLSR_nTT_Msk                   (0x1UL << DIB_DLSR_nTT_Pos )                   /*!< DIB DLSR: Not thirty-two bit Mask */
+
+#define DIB_DLSR_SLK_Pos                    1U                                            /*!< DIB DLSR: Software Lock status Position */
+#define DIB_DLSR_SLK_Msk                   (0x1UL << DIB_DLSR_SLK_Pos )                   /*!< DIB DLSR: Software Lock status Mask */
+
+#define DIB_DLSR_SLI_Pos                    0U                                            /*!< DIB DLSR: Software Lock implemented Position */
+#define DIB_DLSR_SLI_Msk                   (0x1UL /*<< DIB_DLSR_SLI_Pos*/)                /*!< DIB DLSR: Software Lock implemented Mask */
+
+/* DAUTHSTATUS, Debug Authentication Status Register Definitions */
+#define DIB_DAUTHSTATUS_SNID_Pos            6U                                            /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_SNID_Msk           (0x3UL << DIB_DAUTHSTATUS_SNID_Pos )           /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_SID_Pos             4U                                            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_SID_Msk            (0x3UL << DIB_DAUTHSTATUS_SID_Pos )            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSNID_Pos           2U                                            /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSNID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSID_Pos            0U                                            /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSID_Msk           (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/)        /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */
+
+/* DDEVARCH, SCS Device Architecture Register Definitions */
+#define DIB_DDEVARCH_ARCHITECT_Pos         21U                                            /*!< DIB DDEVARCH: Architect Position */
+#define DIB_DDEVARCH_ARCHITECT_Msk         (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos )       /*!< DIB DDEVARCH: Architect Mask */
+
+#define DIB_DDEVARCH_PRESENT_Pos           20U                                            /*!< DIB DDEVARCH: DEVARCH Present Position */
+#define DIB_DDEVARCH_PRESENT_Msk           (0x1FUL << DIB_DDEVARCH_PRESENT_Pos )          /*!< DIB DDEVARCH: DEVARCH Present Mask */
+
+#define DIB_DDEVARCH_REVISION_Pos          16U                                            /*!< DIB DDEVARCH: Revision Position */
+#define DIB_DDEVARCH_REVISION_Msk          (0xFUL << DIB_DDEVARCH_REVISION_Pos )          /*!< DIB DDEVARCH: Revision Mask */
+
+#define DIB_DDEVARCH_ARCHVER_Pos           12U                                            /*!< DIB DDEVARCH: Architecture Version Position */
+#define DIB_DDEVARCH_ARCHVER_Msk           (0xFUL << DIB_DDEVARCH_ARCHVER_Pos )           /*!< DIB DDEVARCH: Architecture Version Mask */
+
+#define DIB_DDEVARCH_ARCHPART_Pos           0U                                            /*!< DIB DDEVARCH: Architecture Part Position */
+#define DIB_DDEVARCH_ARCHPART_Msk          (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/)     /*!< DIB DDEVARCH: Architecture Part Mask */
+
+/* DDEVTYPE, SCS Device Type Register Definitions */
+#define DIB_DDEVTYPE_SUB_Pos                4U                                            /*!< DIB DDEVTYPE: Sub-type Position */
+#define DIB_DDEVTYPE_SUB_Msk               (0xFUL << DIB_DDEVTYPE_SUB_Pos )               /*!< DIB DDEVTYPE: Sub-type Mask */
+
+#define DIB_DDEVTYPE_MAJOR_Pos              0U                                            /*!< DIB DDEVTYPE: Major type Position */
+#define DIB_DDEVTYPE_MAJOR_Msk             (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/)          /*!< DIB DDEVTYPE: Major type Mask */
+
+
+/*@} end of group CMSIS_DIB */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< \deprecated Core Debug Base Address */
+  #define DCB_BASE            (0xE000EDF0UL)                             /*!< DCB Base Address */
+  #define DIB_BASE            (0xE000EFB0UL)                             /*!< DIB Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< \deprecated Core Debug configuration struct */
+  #define DCB                 ((DCB_Type       *)     DCB_BASE         ) /*!< DCB configuration struct */
+  #define DIB                 ((DIB_Type       *)     DIB_BASE         ) /*!< DIB configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< \deprecated Core Debug Base Address           (non-secure address space) */
+  #define DCB_BASE_NS         (0xE002EDF0UL)                             /*!< DCB Base Address                  (non-secure address space) */
+  #define DIB_BASE_NS         (0xE002EFB0UL)                             /*!< DIB Base Address                  (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct   (non-secure address space) */
+  #define DCB_NS              ((DCB_Type       *)     DCB_BASE_NS      ) /*!< DCB configuration struct          (non-secure address space) */
+  #define DIB_NS              ((DIB_Type       *)     DIB_BASE_NS      ) /*!< DIB configuration struct          (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_register_aliases     Backwards Compatibility Aliases
+  \brief      Register alias definitions for backwards compatibility.
+  @{
+ */
+#define ID_ADR  (ID_AFR)    /*!< SCB Auxiliary Feature Register */
+/*@} */
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+/* ##########################  Cache functions  #################################### */
+
+#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \
+     (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)))
+#include "cachel1_armv7.h"
+#endif
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    Debug Control function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DCBFunctions Debug Control Functions
+  \brief    Functions that access the Debug Control Block.
+  @{
+ */
+
+
+/**
+  \brief   Set Debug Authentication Control Register
+  \details writes to Debug Authentication Control register.
+  \param [in]  value  value to be writen.
+ */
+__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register
+  \details Reads Debug Authentication Control register.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void)
+{
+    return (DCB->DAUTHCTRL);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Debug Authentication Control Register (non-secure)
+  \details writes to non-secure Debug Authentication Control register when in secure state.
+  \param [in]  value  value to be writen
+ */
+__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB_NS->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register (non-secure)
+  \details Reads non-secure Debug Authentication Control register when in secure state.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
+{
+    return (DCB_NS->DAUTHCTRL);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    Debug Identification function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions
+  \brief    Functions that access the Debug Identification Block.
+  @{
+ */
+
+
+/**
+  \brief   Get Debug Authentication Status Register
+  \details Reads Debug Authentication Status register.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t DIB_GetAuthStatus(void)
+{
+    return (DIB->DAUTHSTATUS);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Debug Authentication Status Register (non-secure)
+  \details Reads non-secure Debug Authentication Status register when in secure state.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void)
+{
+    return (DIB_NS->DAUTHSTATUS);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_ARMV8MML_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm0.h b/Libraries/CMSIS/Core/Include/core_cm0.h
similarity index 97%
rename from Libraries/CMSIS/Include/core_cm0.h
rename to Libraries/CMSIS/Core/Include/core_cm0.h
index 70e45053..6441ff34 100644
--- a/Libraries/CMSIS/Include/core_cm0.h
+++ b/Libraries/CMSIS/Core/Include/core_cm0.h
@@ -1,952 +1,952 @@
-/**************************************************************************//**
- * @file     core_cm0.h
- * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
- * @version  V5.0.6
- * @date     13. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0_H_GENERIC
-#define __CORE_CM0_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M0
-  @{
- */
-
-#include "cmsis_version.h"
- 
-/*  CMSIS CM0 definitions */
-#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM0_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (0U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0_H_DEPENDANT
-#define __CORE_CM0_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM0_REV
-    #define __CM0_REV               0x0000U
-    #warning "__CM0_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M0 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RESERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-        uint32_t RESERVED0;
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M0 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           Address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t vectors = 0x0U;
-  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
-  /* ARM Application Note 321 states that the M0 does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t vectors = 0x0U;
-  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm0.h
+ * @brief    CMSIS Cortex-M0 Core Peripheral Access Layer Header File
+ * @version  V5.0.8
+ * @date     21. August 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM0_H_GENERIC
+#define __CORE_CM0_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M0
+  @{
+ */
+
+#include "cmsis_version.h"
+ 
+/*  CMSIS CM0 definitions */
+#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM0_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                (0U)                                   /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM0_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM0_H_DEPENDANT
+#define __CORE_CM0_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM0_REV
+    #define __CM0_REV               0x0000U
+    #warning "__CM0_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M0 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+        uint32_t RESERVED0;
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Cortex-M0 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the Cortex-M0 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           Address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2);      /* point to 1st user interrupt */
+  *(vectors + (int32_t)IRQn) = vector;                              /* use pointer arithmetic to access vector */
+  /* ARM Application Note 321 states that the M0 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2);      /* point to 1st user interrupt */
+  return *(vectors + (int32_t)IRQn);                                /* use pointer arithmetic to access vector */
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM0_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm0plus.h b/Libraries/CMSIS/Core/Include/core_cm0plus.h
similarity index 97%
rename from Libraries/CMSIS/Include/core_cm0plus.h
rename to Libraries/CMSIS/Core/Include/core_cm0plus.h
index fe7b424e..4e7179a6 100644
--- a/Libraries/CMSIS/Include/core_cm0plus.h
+++ b/Libraries/CMSIS/Core/Include/core_cm0plus.h
@@ -1,1085 +1,1087 @@
-/**************************************************************************//**
- * @file     core_cm0plus.h
- * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
- * @version  V5.0.7
- * @date     13. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM0PLUS_H_GENERIC
-#define __CORE_CM0PLUS_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex-M0+
-  @{
- */
-
-#include "cmsis_version.h"
- 
-/*  CMSIS CM0+ definitions */
-#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM0PLUS_CMSIS_VERSION_SUB  (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM0PLUS_CMSIS_VERSION      ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \
-                                       __CM0PLUS_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                   (0U)                                       /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0PLUS_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM0PLUS_H_DEPENDANT
-#define __CORE_CM0PLUS_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM0PLUS_REV
-    #define __CM0PLUS_REV             0x0000U
-    #warning "__CM0PLUS_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __VTOR_PRESENT
-    #define __VTOR_PRESENT            0U
-    #warning "__VTOR_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex-M0+ */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RESERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-#else
-        uint32_t RESERVED0;
-#endif
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 8U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  1U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M0+ header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0+ */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-           If VTOR is not present address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t vectors = SCB->VTOR;
-#else
-  uint32_t vectors = 0x0U;
-#endif
-  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
-  /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t vectors = SCB->VTOR;
-#else
-  uint32_t vectors = 0x0U;
-#endif
-  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM0PLUS_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm0plus.h
+ * @brief    CMSIS Cortex-M0+ Core Peripheral Access Layer Header File
+ * @version  V5.0.9
+ * @date     21. August 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM0PLUS_H_GENERIC
+#define __CORE_CM0PLUS_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex-M0+
+  @{
+ */
+
+#include "cmsis_version.h"
+ 
+/*  CMSIS CM0+ definitions */
+#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM0PLUS_CMSIS_VERSION_SUB  (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM0PLUS_CMSIS_VERSION      ((__CM0PLUS_CMSIS_VERSION_MAIN << 16U) | \
+                                       __CM0PLUS_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                   (0U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM0PLUS_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM0PLUS_H_DEPENDANT
+#define __CORE_CM0PLUS_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM0PLUS_REV
+    #define __CM0PLUS_REV             0x0000U
+    #warning "__CM0PLUS_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT            0U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex-M0+ */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core MPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+#else
+        uint32_t RESERVED0;
+#endif
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 8U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0xFFFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  1U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Cortex-M0+ Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the Cortex-M0+ header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0+ */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+           If VTOR is not present address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+#else
+  uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2);      /* point to 1st user interrupt */
+  *(vectors + (int32_t)IRQn) = vector;                              /* use pointer arithmetic to access vector */
+#endif
+  /* ARM Application Note 321 states that the M0+ does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+#else
+  uint32_t *vectors = (uint32_t *)(NVIC_USER_IRQ_OFFSET << 2);      /* point to 1st user interrupt */
+  return *(vectors + (int32_t)IRQn);                                /* use pointer arithmetic to access vector */
+#endif
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM0PLUS_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm1.h b/Libraries/CMSIS/Core/Include/core_cm1.h
similarity index 97%
rename from Libraries/CMSIS/Include/core_cm1.h
rename to Libraries/CMSIS/Core/Include/core_cm1.h
index 44c2a491..76b45697 100644
--- a/Libraries/CMSIS/Include/core_cm1.h
+++ b/Libraries/CMSIS/Core/Include/core_cm1.h
@@ -1,979 +1,979 @@
-/**************************************************************************//**
- * @file     core_cm1.h
- * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File
- * @version  V1.0.1
- * @date     12. November 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM1_H_GENERIC
-#define __CORE_CM1_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M1
-  @{
- */
-
-#include "cmsis_version.h"
- 
-/*  CMSIS CM1 definitions */
-#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM1_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (1U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM1_H_DEPENDANT
-#define __CORE_CM1_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM1_REV
-    #define __CM1_REV               0x0100U
-    #warning "__CM1_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M1 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-        uint32_t RESERVED0;
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_ITCMUAEN_Pos            4U                                        /*!< ACTLR: Instruction TCM Upper Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMUAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos)         /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */
-
-#define SCnSCB_ACTLR_ITCMLAEN_Pos            3U                                        /*!< ACTLR: Instruction TCM Lower Alias Enable Position */
-#define SCnSCB_ACTLR_ITCMLAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos)         /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the Cortex-M1 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M1 */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           Address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  /* ARM Application Note 321 states that the M1 does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)0x0U;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM1_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm1.h
+ * @brief    CMSIS Cortex-M1 Core Peripheral Access Layer Header File
+ * @version  V1.0.1
+ * @date     12. November 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM1_H_GENERIC
+#define __CORE_CM1_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M1
+  @{
+ */
+
+#include "cmsis_version.h"
+ 
+/*  CMSIS CM1 definitions */
+#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM1_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                (1U)                                   /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM1_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM1_H_DEPENDANT
+#define __CORE_CM1_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM1_REV
+    #define __CM1_REV               0x0100U
+    #warning "__CM1_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M1 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+        uint32_t RESERVED0;
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_ITCMUAEN_Pos            4U                                        /*!< ACTLR: Instruction TCM Upper Alias Enable Position */
+#define SCnSCB_ACTLR_ITCMUAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMUAEN_Pos)         /*!< ACTLR: Instruction TCM Upper Alias Enable Mask */
+
+#define SCnSCB_ACTLR_ITCMLAEN_Pos            3U                                        /*!< ACTLR: Instruction TCM Lower Alias Enable Position */
+#define SCnSCB_ACTLR_ITCMLAEN_Msk           (1UL << SCnSCB_ACTLR_ITCMLAEN_Pos)         /*!< ACTLR: Instruction TCM Lower Alias Enable Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Cortex-M1 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the Cortex-M1 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M1 */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           Address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)0x0U;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M1 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)0x0U;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM1_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm23.h b/Libraries/CMSIS/Core/Include/core_cm23.h
similarity index 81%
rename from Libraries/CMSIS/Include/core_cm23.h
rename to Libraries/CMSIS/Core/Include/core_cm23.h
index 49f4a5b0..55fff995 100644
--- a/Libraries/CMSIS/Include/core_cm23.h
+++ b/Libraries/CMSIS/Core/Include/core_cm23.h
@@ -1,1996 +1,2297 @@
-/**************************************************************************//**
- * @file     core_cm23.h
- * @brief    CMSIS Cortex-M23 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     12. November 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM23_H_GENERIC
-#define __CORE_CM23_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M23
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS definitions */
-#define __CM23_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM23_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM23_CMSIS_VERSION       ((__CM23_CMSIS_VERSION_MAIN << 16U) | \
-                                     __CM23_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                 (23U)                                       /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM23_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM23_H_DEPENDANT
-#define __CORE_CM23_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM23_REV
-    #define __CM23_REV                0x0000U
-    #warning "__CM23_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __VTOR_PRESENT
-    #define __VTOR_PRESENT            0U
-    #warning "__VTOR_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-
-  #ifndef __ETM_PRESENT
-    #define __ETM_PRESENT             0U
-    #warning "__ETM_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MTB_PRESENT
-    #define __MTB_PRESENT             0U
-    #warning "__MTB_PRESENT not defined in device header file; using default!"
-  #endif
-
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M23 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
-        uint32_t RESERVED5[16U];
-  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-#else
-        uint32_t RESERVED0;
-#endif
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED1;
-  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-        uint32_t RESERVED0[6U];
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-        uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-        uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-        uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
-        uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
-        uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
-        uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
-        uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
-        uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
-        uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
-        uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
-        uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
-        uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
-        uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
-        uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
-        uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
-        uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
-        uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
-        uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
-        uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
-        uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
-        uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
-        uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
-        uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
-        uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
-        uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
-        uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
-  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
-  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
-  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration Test FIFO Test Data 0 Register Definitions */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
-#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
-#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
-#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 2 Register Definitions */
-#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
-#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
-#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
-#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
-
-#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
-#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
-
-/* TPI Integration Test FIFO Test Data 1 Register Definitions */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
-#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
-#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
-#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 0 Definitions */
-#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
-#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
-#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
-#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
-
-#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
-#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
-#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
-        uint32_t RESERVED0[7U];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  1U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
-#endif
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register */
-#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< CoreDebug DEMCR: DWTENA Position */
-#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< CoreDebug DEMCR: DWTENA Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
-
-
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
-
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
-
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Cortex-M23 */
-/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Cortex-M23 */
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
-#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
-#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
-#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
-#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
-#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
-#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
-#else 
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
-#endif
-
-	
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-#define __NVIC_SetPriorityGrouping(X) (void)(X)
-#define __NVIC_GetPriorityGrouping()  (0U)
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-           If VTOR is not present address 0 must be mapped to SRAM.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
-  uint32_t *vectors = (uint32_t *)0x0U;
-#endif
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  __DSB();
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-#else
-  uint32_t *vectors = (uint32_t *)0x0U;
-#endif
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM23_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm23.h
+ * @brief    CMSIS Cortex-M23 Core Peripheral Access Layer Header File
+ * @version  V5.1.0
+ * @date     11. February 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include                        /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header                   /* treat file as system include file */
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic ignored "-Wpedantic"   /* disable pedantic warning due to unnamed structs/unions */
+#endif
+
+#ifndef __CORE_CM23_H_GENERIC
+#define __CORE_CM23_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M23
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS definitions */
+#define __CM23_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM23_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM23_CMSIS_VERSION       ((__CM23_CMSIS_VERSION_MAIN << 16U) | \
+                                     __CM23_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (23U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM23_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM23_H_DEPENDANT
+#define __CORE_CM23_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM23_REV
+    #define __CM23_REV                0x0000U
+    #warning "__CM23_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT            0U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ETM_PRESENT
+    #define __ETM_PRESENT             0U
+    #warning "__ETM_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MTB_PRESENT
+    #define __MTB_PRESENT             0U
+    #warning "__MTB_PRESENT not defined in device header file; using default!"
+  #endif
+
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M23 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint32_t IPR[124U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+#else
+        uint32_t RESERVED0;
+#endif
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED1;
+  __IOM uint32_t SHPR[2U];               /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+        uint32_t RESERVED0[6U];
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x3UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+        uint32_t RESERVED0[7U];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  1U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: EN Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: EN Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#endif
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  \deprecated Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< \deprecated CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< \deprecated CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< \deprecated CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< \deprecated CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< \deprecated CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register */
+#define CoreDebug_DEMCR_DWTENA_Pos         24U                                            /*!< \deprecated CoreDebug DEMCR: DWTENA Position */
+#define CoreDebug_DEMCR_DWTENA_Msk         (1UL << CoreDebug_DEMCR_DWTENA_Pos)            /*!< \deprecated CoreDebug DEMCR: DWTENA Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< \deprecated CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< \deprecated CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup CMSIS_DCB       Debug Control Block
+  \brief    Type definitions for the Debug Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Control Block Registers (DCB).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} DCB_Type;
+
+/* DHCSR, Debug Halting Control and Status Register Definitions */
+#define DCB_DHCSR_DBGKEY_Pos               16U                                            /*!< DCB DHCSR: Debug key Position */
+#define DCB_DHCSR_DBGKEY_Msk               (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos)             /*!< DCB DHCSR: Debug key Mask */
+
+#define DCB_DHCSR_S_RESTART_ST_Pos         26U                                            /*!< DCB DHCSR: Restart sticky status Position */
+#define DCB_DHCSR_S_RESTART_ST_Msk         (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos)          /*!< DCB DHCSR: Restart sticky status Mask */
+
+#define DCB_DHCSR_S_RESET_ST_Pos           25U                                            /*!< DCB DHCSR: Reset sticky status Position */
+#define DCB_DHCSR_S_RESET_ST_Msk           (0x1UL << DCB_DHCSR_S_RESET_ST_Pos)            /*!< DCB DHCSR: Reset sticky status Mask */
+
+#define DCB_DHCSR_S_RETIRE_ST_Pos          24U                                            /*!< DCB DHCSR: Retire sticky status Position */
+#define DCB_DHCSR_S_RETIRE_ST_Msk          (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos)           /*!< DCB DHCSR: Retire sticky status Mask */
+
+#define DCB_DHCSR_S_SDE_Pos                20U                                            /*!< DCB DHCSR: Secure debug enabled Position */
+#define DCB_DHCSR_S_SDE_Msk                (0x1UL << DCB_DHCSR_S_SDE_Pos)                 /*!< DCB DHCSR: Secure debug enabled Mask */
+
+#define DCB_DHCSR_S_LOCKUP_Pos             19U                                            /*!< DCB DHCSR: Lockup status Position */
+#define DCB_DHCSR_S_LOCKUP_Msk             (0x1UL << DCB_DHCSR_S_LOCKUP_Pos)              /*!< DCB DHCSR: Lockup status Mask */
+
+#define DCB_DHCSR_S_SLEEP_Pos              18U                                            /*!< DCB DHCSR: Sleeping status Position */
+#define DCB_DHCSR_S_SLEEP_Msk              (0x1UL << DCB_DHCSR_S_SLEEP_Pos)               /*!< DCB DHCSR: Sleeping status Mask */
+
+#define DCB_DHCSR_S_HALT_Pos               17U                                            /*!< DCB DHCSR: Halted status Position */
+#define DCB_DHCSR_S_HALT_Msk               (0x1UL << DCB_DHCSR_S_HALT_Pos)                /*!< DCB DHCSR: Halted status Mask */
+
+#define DCB_DHCSR_S_REGRDY_Pos             16U                                            /*!< DCB DHCSR: Register ready status Position */
+#define DCB_DHCSR_S_REGRDY_Msk             (0x1UL << DCB_DHCSR_S_REGRDY_Pos)              /*!< DCB DHCSR: Register ready status Mask */
+
+#define DCB_DHCSR_C_MASKINTS_Pos            3U                                            /*!< DCB DHCSR: Mask interrupts control Position */
+#define DCB_DHCSR_C_MASKINTS_Msk           (0x1UL << DCB_DHCSR_C_MASKINTS_Pos)            /*!< DCB DHCSR: Mask interrupts control Mask */
+
+#define DCB_DHCSR_C_STEP_Pos                2U                                            /*!< DCB DHCSR: Step control Position */
+#define DCB_DHCSR_C_STEP_Msk               (0x1UL << DCB_DHCSR_C_STEP_Pos)                /*!< DCB DHCSR: Step control Mask */
+
+#define DCB_DHCSR_C_HALT_Pos                1U                                            /*!< DCB DHCSR: Halt control Position */
+#define DCB_DHCSR_C_HALT_Msk               (0x1UL << DCB_DHCSR_C_HALT_Pos)                /*!< DCB DHCSR: Halt control Mask */
+
+#define DCB_DHCSR_C_DEBUGEN_Pos             0U                                            /*!< DCB DHCSR: Debug enable control Position */
+#define DCB_DHCSR_C_DEBUGEN_Msk            (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/)         /*!< DCB DHCSR: Debug enable control Mask */
+
+/* DCRSR, Debug Core Register Select Register Definitions */
+#define DCB_DCRSR_REGWnR_Pos               16U                                            /*!< DCB DCRSR: Register write/not-read Position */
+#define DCB_DCRSR_REGWnR_Msk               (0x1UL << DCB_DCRSR_REGWnR_Pos)                /*!< DCB DCRSR: Register write/not-read Mask */
+
+#define DCB_DCRSR_REGSEL_Pos                0U                                            /*!< DCB DCRSR: Register selector Position */
+#define DCB_DCRSR_REGSEL_Msk               (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/)           /*!< DCB DCRSR: Register selector Mask */
+
+/* DCRDR, Debug Core Register Data Register Definitions */
+#define DCB_DCRDR_DBGTMP_Pos                0U                                            /*!< DCB DCRDR: Data temporary buffer Position */
+#define DCB_DCRDR_DBGTMP_Msk               (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/)     /*!< DCB DCRDR: Data temporary buffer Mask */
+
+/* DEMCR, Debug Exception and Monitor Control Register Definitions */
+#define DCB_DEMCR_TRCENA_Pos               24U                                            /*!< DCB DEMCR: Trace enable Position */
+#define DCB_DEMCR_TRCENA_Msk               (0x1UL << DCB_DEMCR_TRCENA_Pos)                /*!< DCB DEMCR: Trace enable Mask */
+
+#define DCB_DEMCR_VC_HARDERR_Pos           10U                                            /*!< DCB DEMCR: Vector Catch HardFault errors Position */
+#define DCB_DEMCR_VC_HARDERR_Msk           (0x1UL << DCB_DEMCR_VC_HARDERR_Pos)            /*!< DCB DEMCR: Vector Catch HardFault errors Mask */
+
+#define DCB_DEMCR_VC_CORERESET_Pos          0U                                            /*!< DCB DEMCR: Vector Catch Core reset Position */
+#define DCB_DEMCR_VC_CORERESET_Msk         (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/)      /*!< DCB DEMCR: Vector Catch Core reset Mask */
+
+/* DAUTHCTRL, Debug Authentication Control Register Definitions */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Pos        3U                                            /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Msk       (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos)        /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPNIDENSEL_Pos        2U                                            /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPNIDENSEL_Msk       (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos)        /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */
+
+#define DCB_DAUTHCTRL_INTSPIDEN_Pos         1U                                            /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPIDEN_Msk        (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos)         /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPIDENSEL_Pos         0U                                            /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPIDENSEL_Msk        (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/)     /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */
+
+/* DSCSR, Debug Security Control and Status Register Definitions */
+#define DCB_DSCSR_CDSKEY_Pos               17U                                            /*!< DCB DSCSR: CDS write-enable key Position */
+#define DCB_DSCSR_CDSKEY_Msk               (0x1UL << DCB_DSCSR_CDSKEY_Pos)                /*!< DCB DSCSR: CDS write-enable key Mask */
+
+#define DCB_DSCSR_CDS_Pos                  16U                                            /*!< DCB DSCSR: Current domain Secure Position */
+#define DCB_DSCSR_CDS_Msk                  (0x1UL << DCB_DSCSR_CDS_Pos)                   /*!< DCB DSCSR: Current domain Secure Mask */
+
+#define DCB_DSCSR_SBRSEL_Pos                1U                                            /*!< DCB DSCSR: Secure banked register select Position */
+#define DCB_DSCSR_SBRSEL_Msk               (0x1UL << DCB_DSCSR_SBRSEL_Pos)                /*!< DCB DSCSR: Secure banked register select Mask */
+
+#define DCB_DSCSR_SBRSELEN_Pos              0U                                            /*!< DCB DSCSR: Secure banked register select enable Position */
+#define DCB_DSCSR_SBRSELEN_Msk             (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/)          /*!< DCB DSCSR: Secure banked register select enable Mask */
+
+/*@} end of group CMSIS_DCB */
+
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DIB       Debug Identification Block
+  \brief    Type definitions for the Debug Identification Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Identification Block Registers (DIB).
+ */
+typedef struct
+{
+  __OM  uint32_t DLAR;                   /*!< Offset: 0x000 ( /W)  SCS Software Lock Access Register */
+  __IM  uint32_t DLSR;                   /*!< Offset: 0x004 (R/ )  SCS Software Lock Status Register */
+  __IM  uint32_t DAUTHSTATUS;            /*!< Offset: 0x008 (R/ )  Debug Authentication Status Register */
+  __IM  uint32_t DDEVARCH;               /*!< Offset: 0x00C (R/ )  SCS Device Architecture Register */
+  __IM  uint32_t DDEVTYPE;               /*!< Offset: 0x010 (R/ )  SCS Device Type Register */
+} DIB_Type;
+
+/* DLAR, SCS Software Lock Access Register Definitions */
+#define DIB_DLAR_KEY_Pos                    0U                                            /*!< DIB DLAR: KEY Position */
+#define DIB_DLAR_KEY_Msk                   (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */)        /*!< DIB DLAR: KEY Mask */
+
+/* DLSR, SCS Software Lock Status Register Definitions */
+#define DIB_DLSR_nTT_Pos                    2U                                            /*!< DIB DLSR: Not thirty-two bit Position */
+#define DIB_DLSR_nTT_Msk                   (0x1UL << DIB_DLSR_nTT_Pos )                   /*!< DIB DLSR: Not thirty-two bit Mask */
+
+#define DIB_DLSR_SLK_Pos                    1U                                            /*!< DIB DLSR: Software Lock status Position */
+#define DIB_DLSR_SLK_Msk                   (0x1UL << DIB_DLSR_SLK_Pos )                   /*!< DIB DLSR: Software Lock status Mask */
+
+#define DIB_DLSR_SLI_Pos                    0U                                            /*!< DIB DLSR: Software Lock implemented Position */
+#define DIB_DLSR_SLI_Msk                   (0x1UL /*<< DIB_DLSR_SLI_Pos*/)                /*!< DIB DLSR: Software Lock implemented Mask */
+
+/* DAUTHSTATUS, Debug Authentication Status Register Definitions */
+#define DIB_DAUTHSTATUS_SNID_Pos            6U                                            /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_SNID_Msk           (0x3UL << DIB_DAUTHSTATUS_SNID_Pos )           /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_SID_Pos             4U                                            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_SID_Msk            (0x3UL << DIB_DAUTHSTATUS_SID_Pos )            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSNID_Pos           2U                                            /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSNID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSID_Pos            0U                                            /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSID_Msk           (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/)        /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */
+
+/* DDEVARCH, SCS Device Architecture Register Definitions */
+#define DIB_DDEVARCH_ARCHITECT_Pos         21U                                            /*!< DIB DDEVARCH: Architect Position */
+#define DIB_DDEVARCH_ARCHITECT_Msk         (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos )       /*!< DIB DDEVARCH: Architect Mask */
+
+#define DIB_DDEVARCH_PRESENT_Pos           20U                                            /*!< DIB DDEVARCH: DEVARCH Present Position */
+#define DIB_DDEVARCH_PRESENT_Msk           (0x1FUL << DIB_DDEVARCH_PRESENT_Pos )          /*!< DIB DDEVARCH: DEVARCH Present Mask */
+
+#define DIB_DDEVARCH_REVISION_Pos          16U                                            /*!< DIB DDEVARCH: Revision Position */
+#define DIB_DDEVARCH_REVISION_Msk          (0xFUL << DIB_DDEVARCH_REVISION_Pos )          /*!< DIB DDEVARCH: Revision Mask */
+
+#define DIB_DDEVARCH_ARCHVER_Pos           12U                                            /*!< DIB DDEVARCH: Architecture Version Position */
+#define DIB_DDEVARCH_ARCHVER_Msk           (0xFUL << DIB_DDEVARCH_ARCHVER_Pos )           /*!< DIB DDEVARCH: Architecture Version Mask */
+
+#define DIB_DDEVARCH_ARCHPART_Pos           0U                                            /*!< DIB DDEVARCH: Architecture Part Position */
+#define DIB_DDEVARCH_ARCHPART_Msk          (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/)     /*!< DIB DDEVARCH: Architecture Part Mask */
+
+/* DDEVTYPE, SCS Device Type Register Definitions */
+#define DIB_DDEVTYPE_SUB_Pos                4U                                            /*!< DIB DDEVTYPE: Sub-type Position */
+#define DIB_DDEVTYPE_SUB_Msk               (0xFUL << DIB_DDEVTYPE_SUB_Pos )               /*!< DIB DDEVTYPE: Sub-type Mask */
+
+#define DIB_DDEVTYPE_MAJOR_Pos              0U                                            /*!< DIB DDEVTYPE: Major type Position */
+#define DIB_DDEVTYPE_MAJOR_Msk             (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/)          /*!< DIB DDEVTYPE: Major type Mask */
+
+
+/*@} end of group CMSIS_DIB */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< \deprecated Core Debug Base Address */
+  #define DCB_BASE            (0xE000EDF0UL)                             /*!< DCB Base Address */
+  #define DIB_BASE            (0xE000EFB0UL)                             /*!< DIB Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< \deprecated Core Debug configuration struct */
+  #define DCB                 ((DCB_Type       *)     DCB_BASE         ) /*!< DCB configuration struct */
+  #define DIB                 ((DIB_Type       *)     DIB_BASE         ) /*!< DIB configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< \deprecated Core Debug Base Address           (non-secure address space) */
+  #define DCB_BASE_NS         (0xE002EDF0UL)                             /*!< DCB Base Address                  (non-secure address space) */
+  #define DIB_BASE_NS         (0xE002EFB0UL)                             /*!< DIB Base Address                  (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct   (non-secure address space) */
+  #define DCB_NS              ((DCB_Type       *)     DCB_BASE_NS      ) /*!< DCB configuration struct          (non-secure address space) */
+  #define DIB_NS              ((DIB_Type       *)     DIB_BASE_NS      ) /*!< DIB configuration struct          (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for Cortex-M23 */
+/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for Cortex-M23 */
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+#define __NVIC_SetPriorityGrouping(X) (void)(X)
+#define __NVIC_GetPriorityGrouping()  (0U)
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+           If VTOR is not present address 0 must be mapped to SRAM.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+#if defined (__VTOR_PRESENT) && (__VTOR_PRESENT == 1U)
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+#else
+  uint32_t *vectors = (uint32_t *)0x0U;
+#endif
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC_NS->IPR[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB_NS->SHPR[_SHP_IDX(IRQn)] = ((uint32_t)(SCB_NS->SHPR[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IPR[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB_NS->SHPR[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    Debug Control function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DCBFunctions Debug Control Functions
+  \brief    Functions that access the Debug Control Block.
+  @{
+ */
+
+ 
+/**
+  \brief   Set Debug Authentication Control Register
+  \details writes to Debug Authentication Control register.
+  \param [in]  value  value to be writen.
+ */
+__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register
+  \details Reads Debug Authentication Control register.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void)
+{
+    return (DCB->DAUTHCTRL);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Debug Authentication Control Register (non-secure)
+  \details writes to non-secure Debug Authentication Control register when in secure state.
+  \param [in]  value  value to be writen
+ */
+__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB_NS->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register (non-secure)
+  \details Reads non-secure Debug Authentication Control register when in secure state.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
+{
+    return (DCB_NS->DAUTHCTRL);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    Debug Identification function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions
+  \brief    Functions that access the Debug Identification Block.
+  @{
+ */
+
+ 
+/**
+  \brief   Get Debug Authentication Status Register
+  \details Reads Debug Authentication Status register.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t DIB_GetAuthStatus(void)
+{
+    return (DIB->DAUTHSTATUS);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Debug Authentication Status Register (non-secure)
+  \details Reads non-secure Debug Authentication Status register when in secure state.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void)
+{
+    return (DIB_NS->DAUTHSTATUS);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM23_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm3.h b/Libraries/CMSIS/Core/Include/core_cm3.h
similarity index 97%
rename from Libraries/CMSIS/Include/core_cm3.h
rename to Libraries/CMSIS/Core/Include/core_cm3.h
index 1f69e8bd..74fb87e5 100644
--- a/Libraries/CMSIS/Include/core_cm3.h
+++ b/Libraries/CMSIS/Core/Include/core_cm3.h
@@ -1,1937 +1,1943 @@
-/**************************************************************************//**
- * @file     core_cm3.h
- * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
- * @version  V5.1.0
- * @date     13. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM3_H_GENERIC
-#define __CORE_CM3_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M3
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS CM3 definitions */
-#define __CM3_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM3_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM3_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (3U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM3_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM3_H_DEPENDANT
-#define __CORE_CM3_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM3_REV
-    #define __CM3_REV               0x0200U
-    #warning "__CM3_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M3 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
-    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
-    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
-    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RESERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[5U];
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#if defined (__CM3_REV) && (__CM3_REV < 0x0201U)                   /* core r2p1 */
-#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
-#else
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-#endif
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-#else
-        uint32_t RESERVED1[1U];
-#endif
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
-#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
-#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
-
-#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
-#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-#endif
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[32U];
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-   #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) );               /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
-  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM3_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm3.h
+ * @brief    CMSIS Cortex-M3 Core Peripheral Access Layer Header File
+ * @version  V5.1.2
+ * @date     04. June 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM3_H_GENERIC
+#define __CORE_CM3_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M3
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/* CMSIS CM3 definitions */
+#define __CM3_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM3_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM3_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                (3U)                                   /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM3_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM3_H_DEPENDANT
+#define __CORE_CM3_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM3_REV
+    #define __CM3_REV               0x0200U
+    #warning "__CM3_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M3 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[5U];
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#if defined (__CM3_REV) && (__CM3_REV < 0x0201U)                   /* core r2p1 */
+#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
+#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
+
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
+#else
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+#endif
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+#else
+        uint32_t RESERVED1[1U];
+#endif
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+#if defined (__CM3_REV) && (__CM3_REV >= 0x200U)
+#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+#endif
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM3_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm33.h b/Libraries/CMSIS/Core/Include/core_cm33.h
similarity index 83%
rename from Libraries/CMSIS/Include/core_cm33.h
rename to Libraries/CMSIS/Core/Include/core_cm33.h
index 2f1d98e2..18a2e6fb 100644
--- a/Libraries/CMSIS/Include/core_cm33.h
+++ b/Libraries/CMSIS/Core/Include/core_cm33.h
@@ -1,2910 +1,3277 @@
-/**************************************************************************//**
- * @file     core_cm33.h
- * @brief    CMSIS Cortex-M33 Core Peripheral Access Layer Header File
- * @version  V5.1.0
- * @date     12. November 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM33_H_GENERIC
-#define __CORE_CM33_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M33
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS CM33 definitions */
-#define __CM33_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM33_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM33_CMSIS_VERSION       ((__CM33_CMSIS_VERSION_MAIN << 16U) | \
-                                     __CM33_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                 (33U)                                       /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined (__TARGET_FPU_VFP)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined (__ARM_FP)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined (__ARMVFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined (__TI_VFP_SUPPORT__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined (__FPU_VFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM33_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM33_H_DEPENDANT
-#define __CORE_CM33_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM33_REV
-    #define __CM33_REV                0x0000U
-    #warning "__CM33_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DSP_PRESENT
-    #define __DSP_PRESENT             0U
-    #warning "__DSP_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M33 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
-    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
-    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
-#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
-
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
-        uint32_t RESERVED5[16U];
-  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED6[580U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
-        uint32_t RESERVED3[92U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
-        uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
-        uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
-        uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
-#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
-#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
-
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
-#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
-#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Non-Secure Access Control Register Definitions */
-#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
-#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
-
-#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
-#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
-
-#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
-#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[32U];
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
-        uint32_t RESERVED6[4U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Stimulus Port Register Definitions */
-#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
-#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
-
-#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
-#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
-#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
-
-#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
-#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-        uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-        uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-        uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
-        uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
-        uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
-        uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
-        uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
-        uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
-        uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
-        uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
-        uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
-        uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
-        uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
-        uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
-        uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
-        uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
-        uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
-        uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
-        uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
-        uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
-        uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
-        uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
-        uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
-        uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
-        uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
-        uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
-        uint32_t RESERVED32[934U];
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
-        uint32_t RESERVED33[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
-#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
-  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
-  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
-  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration Test FIFO Test Data 0 Register Definitions */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
-#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
-#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
-#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 2 Register Definitions */
-#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
-#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
-#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
-#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
-
-#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
-#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
-
-/* TPI Integration Test FIFO Test Data 1 Register Definitions */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
-#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
-#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
-#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 0 Definitions */
-#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
-#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
-#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
-#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
-
-#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
-#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
-#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
-  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
-  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
-  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
-        uint32_t RESERVED0[1];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
-#else
-        uint32_t RESERVED0[3];
-#endif
-  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
-  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/* Secure Fault Status Register Definitions */
-#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
-#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
-
-#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
-#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
-
-#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
-#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
-
-#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
-#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
-
-#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
-#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
-
-#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
-#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
-
-#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
-#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
-
-#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
-#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
-#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
-
-#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
-#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
-
-#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
-#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
-
-#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
-#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
-
-#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
-#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
-
-#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
-#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
-#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
-#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
-
-  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
-
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
-
-  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
-  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
-
-  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
-
-  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
-  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
-#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
-#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
-#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
-#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
-#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
-#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
-#else 
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
-#endif
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  __DSB();
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Priority Grouping (non-secure)
-  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB_NS->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping (non-secure)
-  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
-{
-  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = FPU->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
-  {
-    return 2U;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM33_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm33.h
+ * @brief    CMSIS Cortex-M33 Core Peripheral Access Layer Header File
+ * @version  V5.2.3
+ * @date     13. October 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include                        /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header                   /* treat file as system include file */
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic ignored "-Wpedantic"   /* disable pedantic warning due to unnamed structs/unions */
+#endif
+
+#ifndef __CORE_CM33_H_GENERIC
+#define __CORE_CM33_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M33
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS CM33 definitions */
+#define __CM33_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM33_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM33_CMSIS_VERSION       ((__CM33_CMSIS_VERSION_MAIN << 16U) | \
+                                     __CM33_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (33U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined (__TARGET_FPU_VFP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined (__ARM_FP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined (__ARMVFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined (__TI_VFP_SUPPORT__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined (__FPU_VFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM33_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM33_H_DEPENDANT
+#define __CORE_CM33_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM33_REV
+    #define __CM33_REV                0x0000U
+    #warning "__CM33_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M33 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED7[21U];
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x0E4 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x0E8 (R/W)  Secure Fault Address Register */
+        uint32_t RESERVED3[69U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+  __OM  uint32_t BPIALL;                 /*!< Offset: 0x278 ( /W)  Branch Predictor Invalidate All */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 5U)                 /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and VFP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and VFP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and VFP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/* Media and VFP Feature Register 2 Definitions */
+#define FPU_MVFR2_FPMisc_Pos                4U                                            /*!< MVFR2: FPMisc bits Position */
+#define FPU_MVFR2_FPMisc_Msk               (0xFUL << FPU_MVFR2_FPMisc_Pos)                /*!< MVFR2: FPMisc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  \deprecated Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< \deprecated CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< \deprecated CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< \deprecated CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< \deprecated CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< \deprecated CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< \deprecated CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< \deprecated CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< \deprecated CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< \deprecated CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup CMSIS_DCB       Debug Control Block
+  \brief    Type definitions for the Debug Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Control Block Registers (DCB).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} DCB_Type;
+
+/* DHCSR, Debug Halting Control and Status Register Definitions */
+#define DCB_DHCSR_DBGKEY_Pos               16U                                            /*!< DCB DHCSR: Debug key Position */
+#define DCB_DHCSR_DBGKEY_Msk               (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos)             /*!< DCB DHCSR: Debug key Mask */
+
+#define DCB_DHCSR_S_RESTART_ST_Pos         26U                                            /*!< DCB DHCSR: Restart sticky status Position */
+#define DCB_DHCSR_S_RESTART_ST_Msk         (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos)          /*!< DCB DHCSR: Restart sticky status Mask */
+
+#define DCB_DHCSR_S_RESET_ST_Pos           25U                                            /*!< DCB DHCSR: Reset sticky status Position */
+#define DCB_DHCSR_S_RESET_ST_Msk           (0x1UL << DCB_DHCSR_S_RESET_ST_Pos)            /*!< DCB DHCSR: Reset sticky status Mask */
+
+#define DCB_DHCSR_S_RETIRE_ST_Pos          24U                                            /*!< DCB DHCSR: Retire sticky status Position */
+#define DCB_DHCSR_S_RETIRE_ST_Msk          (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos)           /*!< DCB DHCSR: Retire sticky status Mask */
+
+#define DCB_DHCSR_S_SDE_Pos                20U                                            /*!< DCB DHCSR: Secure debug enabled Position */
+#define DCB_DHCSR_S_SDE_Msk                (0x1UL << DCB_DHCSR_S_SDE_Pos)                 /*!< DCB DHCSR: Secure debug enabled Mask */
+
+#define DCB_DHCSR_S_LOCKUP_Pos             19U                                            /*!< DCB DHCSR: Lockup status Position */
+#define DCB_DHCSR_S_LOCKUP_Msk             (0x1UL << DCB_DHCSR_S_LOCKUP_Pos)              /*!< DCB DHCSR: Lockup status Mask */
+
+#define DCB_DHCSR_S_SLEEP_Pos              18U                                            /*!< DCB DHCSR: Sleeping status Position */
+#define DCB_DHCSR_S_SLEEP_Msk              (0x1UL << DCB_DHCSR_S_SLEEP_Pos)               /*!< DCB DHCSR: Sleeping status Mask */
+
+#define DCB_DHCSR_S_HALT_Pos               17U                                            /*!< DCB DHCSR: Halted status Position */
+#define DCB_DHCSR_S_HALT_Msk               (0x1UL << DCB_DHCSR_S_HALT_Pos)                /*!< DCB DHCSR: Halted status Mask */
+
+#define DCB_DHCSR_S_REGRDY_Pos             16U                                            /*!< DCB DHCSR: Register ready status Position */
+#define DCB_DHCSR_S_REGRDY_Msk             (0x1UL << DCB_DHCSR_S_REGRDY_Pos)              /*!< DCB DHCSR: Register ready status Mask */
+
+#define DCB_DHCSR_C_SNAPSTALL_Pos           5U                                            /*!< DCB DHCSR: Snap stall control Position */
+#define DCB_DHCSR_C_SNAPSTALL_Msk          (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos)           /*!< DCB DHCSR: Snap stall control Mask */
+
+#define DCB_DHCSR_C_MASKINTS_Pos            3U                                            /*!< DCB DHCSR: Mask interrupts control Position */
+#define DCB_DHCSR_C_MASKINTS_Msk           (0x1UL << DCB_DHCSR_C_MASKINTS_Pos)            /*!< DCB DHCSR: Mask interrupts control Mask */
+
+#define DCB_DHCSR_C_STEP_Pos                2U                                            /*!< DCB DHCSR: Step control Position */
+#define DCB_DHCSR_C_STEP_Msk               (0x1UL << DCB_DHCSR_C_STEP_Pos)                /*!< DCB DHCSR: Step control Mask */
+
+#define DCB_DHCSR_C_HALT_Pos                1U                                            /*!< DCB DHCSR: Halt control Position */
+#define DCB_DHCSR_C_HALT_Msk               (0x1UL << DCB_DHCSR_C_HALT_Pos)                /*!< DCB DHCSR: Halt control Mask */
+
+#define DCB_DHCSR_C_DEBUGEN_Pos             0U                                            /*!< DCB DHCSR: Debug enable control Position */
+#define DCB_DHCSR_C_DEBUGEN_Msk            (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/)         /*!< DCB DHCSR: Debug enable control Mask */
+
+/* DCRSR, Debug Core Register Select Register Definitions */
+#define DCB_DCRSR_REGWnR_Pos               16U                                            /*!< DCB DCRSR: Register write/not-read Position */
+#define DCB_DCRSR_REGWnR_Msk               (0x1UL << DCB_DCRSR_REGWnR_Pos)                /*!< DCB DCRSR: Register write/not-read Mask */
+
+#define DCB_DCRSR_REGSEL_Pos                0U                                            /*!< DCB DCRSR: Register selector Position */
+#define DCB_DCRSR_REGSEL_Msk               (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/)           /*!< DCB DCRSR: Register selector Mask */
+
+/* DCRDR, Debug Core Register Data Register Definitions */
+#define DCB_DCRDR_DBGTMP_Pos                0U                                            /*!< DCB DCRDR: Data temporary buffer Position */
+#define DCB_DCRDR_DBGTMP_Msk               (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/)     /*!< DCB DCRDR: Data temporary buffer Mask */
+
+/* DEMCR, Debug Exception and Monitor Control Register Definitions */
+#define DCB_DEMCR_TRCENA_Pos               24U                                            /*!< DCB DEMCR: Trace enable Position */
+#define DCB_DEMCR_TRCENA_Msk               (0x1UL << DCB_DEMCR_TRCENA_Pos)                /*!< DCB DEMCR: Trace enable Mask */
+
+#define DCB_DEMCR_MONPRKEY_Pos             23U                                            /*!< DCB DEMCR: Monitor pend req key Position */
+#define DCB_DEMCR_MONPRKEY_Msk             (0x1UL << DCB_DEMCR_MONPRKEY_Pos)              /*!< DCB DEMCR: Monitor pend req key Mask */
+
+#define DCB_DEMCR_UMON_EN_Pos              21U                                            /*!< DCB DEMCR: Unprivileged monitor enable Position */
+#define DCB_DEMCR_UMON_EN_Msk              (0x1UL << DCB_DEMCR_UMON_EN_Pos)               /*!< DCB DEMCR: Unprivileged monitor enable Mask */
+
+#define DCB_DEMCR_SDME_Pos                 20U                                            /*!< DCB DEMCR: Secure DebugMonitor enable Position */
+#define DCB_DEMCR_SDME_Msk                 (0x1UL << DCB_DEMCR_SDME_Pos)                  /*!< DCB DEMCR: Secure DebugMonitor enable Mask */
+
+#define DCB_DEMCR_MON_REQ_Pos              19U                                            /*!< DCB DEMCR: Monitor request Position */
+#define DCB_DEMCR_MON_REQ_Msk              (0x1UL << DCB_DEMCR_MON_REQ_Pos)               /*!< DCB DEMCR: Monitor request Mask */
+
+#define DCB_DEMCR_MON_STEP_Pos             18U                                            /*!< DCB DEMCR: Monitor step Position */
+#define DCB_DEMCR_MON_STEP_Msk             (0x1UL << DCB_DEMCR_MON_STEP_Pos)              /*!< DCB DEMCR: Monitor step Mask */
+
+#define DCB_DEMCR_MON_PEND_Pos             17U                                            /*!< DCB DEMCR: Monitor pend Position */
+#define DCB_DEMCR_MON_PEND_Msk             (0x1UL << DCB_DEMCR_MON_PEND_Pos)              /*!< DCB DEMCR: Monitor pend Mask */
+
+#define DCB_DEMCR_MON_EN_Pos               16U                                            /*!< DCB DEMCR: Monitor enable Position */
+#define DCB_DEMCR_MON_EN_Msk               (0x1UL << DCB_DEMCR_MON_EN_Pos)                /*!< DCB DEMCR: Monitor enable Mask */
+
+#define DCB_DEMCR_VC_SFERR_Pos             11U                                            /*!< DCB DEMCR: Vector Catch SecureFault Position */
+#define DCB_DEMCR_VC_SFERR_Msk             (0x1UL << DCB_DEMCR_VC_SFERR_Pos)              /*!< DCB DEMCR: Vector Catch SecureFault Mask */
+
+#define DCB_DEMCR_VC_HARDERR_Pos           10U                                            /*!< DCB DEMCR: Vector Catch HardFault errors Position */
+#define DCB_DEMCR_VC_HARDERR_Msk           (0x1UL << DCB_DEMCR_VC_HARDERR_Pos)            /*!< DCB DEMCR: Vector Catch HardFault errors Mask */
+
+#define DCB_DEMCR_VC_INTERR_Pos             9U                                            /*!< DCB DEMCR: Vector Catch interrupt errors Position */
+#define DCB_DEMCR_VC_INTERR_Msk            (0x1UL << DCB_DEMCR_VC_INTERR_Pos)             /*!< DCB DEMCR: Vector Catch interrupt errors Mask */
+
+#define DCB_DEMCR_VC_BUSERR_Pos             8U                                            /*!< DCB DEMCR: Vector Catch BusFault errors Position */
+#define DCB_DEMCR_VC_BUSERR_Msk            (0x1UL << DCB_DEMCR_VC_BUSERR_Pos)             /*!< DCB DEMCR: Vector Catch BusFault errors Mask */
+
+#define DCB_DEMCR_VC_STATERR_Pos            7U                                            /*!< DCB DEMCR: Vector Catch state errors Position */
+#define DCB_DEMCR_VC_STATERR_Msk           (0x1UL << DCB_DEMCR_VC_STATERR_Pos)            /*!< DCB DEMCR: Vector Catch state errors Mask */
+
+#define DCB_DEMCR_VC_CHKERR_Pos             6U                                            /*!< DCB DEMCR: Vector Catch check errors Position */
+#define DCB_DEMCR_VC_CHKERR_Msk            (0x1UL << DCB_DEMCR_VC_CHKERR_Pos)             /*!< DCB DEMCR: Vector Catch check errors Mask */
+
+#define DCB_DEMCR_VC_NOCPERR_Pos            5U                                            /*!< DCB DEMCR: Vector Catch NOCP errors Position */
+#define DCB_DEMCR_VC_NOCPERR_Msk           (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos)            /*!< DCB DEMCR: Vector Catch NOCP errors Mask */
+
+#define DCB_DEMCR_VC_MMERR_Pos              4U                                            /*!< DCB DEMCR: Vector Catch MemManage errors Position */
+#define DCB_DEMCR_VC_MMERR_Msk             (0x1UL << DCB_DEMCR_VC_MMERR_Pos)              /*!< DCB DEMCR: Vector Catch MemManage errors Mask */
+
+#define DCB_DEMCR_VC_CORERESET_Pos          0U                                            /*!< DCB DEMCR: Vector Catch Core reset Position */
+#define DCB_DEMCR_VC_CORERESET_Msk         (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/)      /*!< DCB DEMCR: Vector Catch Core reset Mask */
+
+/* DAUTHCTRL, Debug Authentication Control Register Definitions */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Pos        3U                                            /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Msk       (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos)        /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPNIDENSEL_Pos        2U                                            /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPNIDENSEL_Msk       (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos)        /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */
+
+#define DCB_DAUTHCTRL_INTSPIDEN_Pos         1U                                            /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPIDEN_Msk        (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos)         /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPIDENSEL_Pos         0U                                            /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPIDENSEL_Msk        (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/)     /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */
+
+/* DSCSR, Debug Security Control and Status Register Definitions */
+#define DCB_DSCSR_CDSKEY_Pos               17U                                            /*!< DCB DSCSR: CDS write-enable key Position */
+#define DCB_DSCSR_CDSKEY_Msk               (0x1UL << DCB_DSCSR_CDSKEY_Pos)                /*!< DCB DSCSR: CDS write-enable key Mask */
+
+#define DCB_DSCSR_CDS_Pos                  16U                                            /*!< DCB DSCSR: Current domain Secure Position */
+#define DCB_DSCSR_CDS_Msk                  (0x1UL << DCB_DSCSR_CDS_Pos)                   /*!< DCB DSCSR: Current domain Secure Mask */
+
+#define DCB_DSCSR_SBRSEL_Pos                1U                                            /*!< DCB DSCSR: Secure banked register select Position */
+#define DCB_DSCSR_SBRSEL_Msk               (0x1UL << DCB_DSCSR_SBRSEL_Pos)                /*!< DCB DSCSR: Secure banked register select Mask */
+
+#define DCB_DSCSR_SBRSELEN_Pos              0U                                            /*!< DCB DSCSR: Secure banked register select enable Position */
+#define DCB_DSCSR_SBRSELEN_Msk             (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/)          /*!< DCB DSCSR: Secure banked register select enable Mask */
+
+/*@} end of group CMSIS_DCB */
+
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DIB       Debug Identification Block
+  \brief    Type definitions for the Debug Identification Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Identification Block Registers (DIB).
+ */
+typedef struct
+{
+  __OM  uint32_t DLAR;                   /*!< Offset: 0x000 ( /W)  SCS Software Lock Access Register */
+  __IM  uint32_t DLSR;                   /*!< Offset: 0x004 (R/ )  SCS Software Lock Status Register */
+  __IM  uint32_t DAUTHSTATUS;            /*!< Offset: 0x008 (R/ )  Debug Authentication Status Register */
+  __IM  uint32_t DDEVARCH;               /*!< Offset: 0x00C (R/ )  SCS Device Architecture Register */
+  __IM  uint32_t DDEVTYPE;               /*!< Offset: 0x010 (R/ )  SCS Device Type Register */
+} DIB_Type;
+
+/* DLAR, SCS Software Lock Access Register Definitions */
+#define DIB_DLAR_KEY_Pos                    0U                                            /*!< DIB DLAR: KEY Position */
+#define DIB_DLAR_KEY_Msk                   (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */)        /*!< DIB DLAR: KEY Mask */
+
+/* DLSR, SCS Software Lock Status Register Definitions */
+#define DIB_DLSR_nTT_Pos                    2U                                            /*!< DIB DLSR: Not thirty-two bit Position */
+#define DIB_DLSR_nTT_Msk                   (0x1UL << DIB_DLSR_nTT_Pos )                   /*!< DIB DLSR: Not thirty-two bit Mask */
+
+#define DIB_DLSR_SLK_Pos                    1U                                            /*!< DIB DLSR: Software Lock status Position */
+#define DIB_DLSR_SLK_Msk                   (0x1UL << DIB_DLSR_SLK_Pos )                   /*!< DIB DLSR: Software Lock status Mask */
+
+#define DIB_DLSR_SLI_Pos                    0U                                            /*!< DIB DLSR: Software Lock implemented Position */
+#define DIB_DLSR_SLI_Msk                   (0x1UL /*<< DIB_DLSR_SLI_Pos*/)                /*!< DIB DLSR: Software Lock implemented Mask */
+
+/* DAUTHSTATUS, Debug Authentication Status Register Definitions */
+#define DIB_DAUTHSTATUS_SNID_Pos            6U                                            /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_SNID_Msk           (0x3UL << DIB_DAUTHSTATUS_SNID_Pos )           /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_SID_Pos             4U                                            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_SID_Msk            (0x3UL << DIB_DAUTHSTATUS_SID_Pos )            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSNID_Pos           2U                                            /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSNID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSID_Pos            0U                                            /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSID_Msk           (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/)        /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */
+
+/* DDEVARCH, SCS Device Architecture Register Definitions */
+#define DIB_DDEVARCH_ARCHITECT_Pos         21U                                            /*!< DIB DDEVARCH: Architect Position */
+#define DIB_DDEVARCH_ARCHITECT_Msk         (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos )       /*!< DIB DDEVARCH: Architect Mask */
+
+#define DIB_DDEVARCH_PRESENT_Pos           20U                                            /*!< DIB DDEVARCH: DEVARCH Present Position */
+#define DIB_DDEVARCH_PRESENT_Msk           (0x1FUL << DIB_DDEVARCH_PRESENT_Pos )          /*!< DIB DDEVARCH: DEVARCH Present Mask */
+
+#define DIB_DDEVARCH_REVISION_Pos          16U                                            /*!< DIB DDEVARCH: Revision Position */
+#define DIB_DDEVARCH_REVISION_Msk          (0xFUL << DIB_DDEVARCH_REVISION_Pos )          /*!< DIB DDEVARCH: Revision Mask */
+
+#define DIB_DDEVARCH_ARCHVER_Pos           12U                                            /*!< DIB DDEVARCH: Architecture Version Position */
+#define DIB_DDEVARCH_ARCHVER_Msk           (0xFUL << DIB_DDEVARCH_ARCHVER_Pos )           /*!< DIB DDEVARCH: Architecture Version Mask */
+
+#define DIB_DDEVARCH_ARCHPART_Pos           0U                                            /*!< DIB DDEVARCH: Architecture Part Position */
+#define DIB_DDEVARCH_ARCHPART_Msk          (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/)     /*!< DIB DDEVARCH: Architecture Part Mask */
+
+/* DDEVTYPE, SCS Device Type Register Definitions */
+#define DIB_DDEVTYPE_SUB_Pos                4U                                            /*!< DIB DDEVTYPE: Sub-type Position */
+#define DIB_DDEVTYPE_SUB_Msk               (0xFUL << DIB_DDEVTYPE_SUB_Pos )               /*!< DIB DDEVTYPE: Sub-type Mask */
+
+#define DIB_DDEVTYPE_MAJOR_Pos              0U                                            /*!< DIB DDEVTYPE: Major type Position */
+#define DIB_DDEVTYPE_MAJOR_Msk             (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/)          /*!< DIB DDEVTYPE: Major type Mask */
+
+
+/*@} end of group CMSIS_DIB */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< \deprecated Core Debug Base Address */
+  #define DCB_BASE            (0xE000EDF0UL)                             /*!< DCB Base Address */
+  #define DIB_BASE            (0xE000EFB0UL)                             /*!< DIB Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< \deprecated Core Debug configuration struct */
+  #define DCB                 ((DCB_Type       *)     DCB_BASE         ) /*!< DCB configuration struct */
+  #define DIB                 ((DIB_Type       *)     DIB_BASE         ) /*!< DIB configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< \deprecated Core Debug Base Address           (non-secure address space) */
+  #define DCB_BASE_NS         (0xE002EDF0UL)                             /*!< DCB Base Address                  (non-secure address space) */
+  #define DIB_BASE_NS         (0xE002EFB0UL)                             /*!< DIB Base Address                  (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct   (non-secure address space) */
+  #define DCB_NS              ((DCB_Type       *)     DCB_BASE_NS      ) /*!< DCB configuration struct          (non-secure address space) */
+  #define DIB_NS              ((DIB_Type       *)     DIB_BASE_NS      ) /*!< DIB configuration struct          (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_register_aliases     Backwards Compatibility Aliases
+  \brief      Register alias definitions for backwards compatibility.
+  @{
+ */
+#define ID_ADR  (ID_AFR)    /*!< SCB Auxiliary Feature Register */
+/*@} */
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    Debug Control function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DCBFunctions Debug Control Functions
+  \brief    Functions that access the Debug Control Block.
+  @{
+ */
+
+
+/**
+  \brief   Set Debug Authentication Control Register
+  \details writes to Debug Authentication Control register.
+  \param [in]  value  value to be writen.
+ */
+__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register
+  \details Reads Debug Authentication Control register.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void)
+{
+    return (DCB->DAUTHCTRL);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Debug Authentication Control Register (non-secure)
+  \details writes to non-secure Debug Authentication Control register when in secure state.
+  \param [in]  value  value to be writen
+ */
+__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB_NS->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register (non-secure)
+  \details Reads non-secure Debug Authentication Control register when in secure state.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
+{
+    return (DCB_NS->DAUTHCTRL);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    Debug Identification function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions
+  \brief    Functions that access the Debug Identification Block.
+  @{
+ */
+
+
+/**
+  \brief   Get Debug Authentication Status Register
+  \details Reads Debug Authentication Status register.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t DIB_GetAuthStatus(void)
+{
+    return (DIB->DAUTHSTATUS);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Debug Authentication Status Register (non-secure)
+  \details Reads non-secure Debug Authentication Status register when in secure state.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void)
+{
+    return (DIB_NS->DAUTHSTATUS);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM33_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm35p.h b/Libraries/CMSIS/Core/Include/core_cm35p.h
similarity index 83%
rename from Libraries/CMSIS/Include/core_cm35p.h
rename to Libraries/CMSIS/Core/Include/core_cm35p.h
index 7d343679..3843d954 100644
--- a/Libraries/CMSIS/Include/core_cm35p.h
+++ b/Libraries/CMSIS/Core/Include/core_cm35p.h
@@ -1,2910 +1,3277 @@
-/**************************************************************************//**
- * @file     core_cm35p.h
- * @brief    CMSIS Cortex-M35P Core Peripheral Access Layer Header File
- * @version  V1.0.0
- * @date     12. November 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM35P_H_GENERIC
-#define __CORE_CM35P_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M35P
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS CM35P definitions */
-#define __CM35P_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM35P_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM35P_CMSIS_VERSION       ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \
-                                      __CM35P_CMSIS_VERSION_SUB           )    /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                 (35U)                                       /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined (__TARGET_FPU_VFP)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined (__ARM_FP)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined (__ARMVFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
-    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined (__TI_VFP_SUPPORT__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined (__FPU_VFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM35P_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM35P_H_DEPENDANT
-#define __CORE_CM35P_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM35P_REV
-    #define __CM35P_REV               0x0000U
-    #warning "__CM35P_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DSP_PRESENT
-    #define __DSP_PRESENT             0U
-    #warning "__DSP_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M35P */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
-    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
-    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
-#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
-
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
-        uint32_t RESERVED5[16U];
-  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED6[580U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
-        uint32_t RESERVED3[92U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
-        uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
-        uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
-        uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
-#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
-#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
-
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
-#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
-#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Non-Secure Access Control Register Definitions */
-#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
-#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
-
-#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
-#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
-
-#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
-#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[32U];
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
-        uint32_t RESERVED6[4U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Stimulus Port Register Definitions */
-#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
-#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
-
-#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
-#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
-#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
-
-#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
-#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-        uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-        uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-        uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
-        uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
-        uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
-        uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
-        uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
-        uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
-        uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
-        uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
-        uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
-        uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
-        uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
-        uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
-        uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
-        uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
-        uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
-        uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
-        uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
-        uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
-        uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
-        uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
-        uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
-        uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
-        uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
-        uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
-        uint32_t RESERVED32[934U];
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
-        uint32_t RESERVED33[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
-#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
-  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
-  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
-  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
-#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration Test FIFO Test Data 0 Register Definitions */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
-#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
-#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
-#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
-
-#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
-#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 2 Register Definitions */
-#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
-#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
-#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
-#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
-
-#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
-#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
-
-/* TPI Integration Test FIFO Test Data 1 Register Definitions */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
-#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
-#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
-
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
-#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
-#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
-#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
-
-#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
-#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
-
-/* TPI Integration Test ATB Control Register 0 Definitions */
-#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
-#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
-
-#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
-#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
-
-#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
-#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
-
-#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
-#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
-#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
-  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
-  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
-  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
-        uint32_t RESERVED0[1];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
-#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
-
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
-#else
-        uint32_t RESERVED0[3];
-#endif
-  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
-  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/* Secure Fault Status Register Definitions */
-#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
-#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
-
-#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
-#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
-
-#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
-#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
-
-#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
-#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
-
-#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
-#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
-
-#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
-#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
-
-#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
-#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
-
-#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
-#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
-#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
-
-#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
-#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
-
-#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
-#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
-
-#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
-#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
-
-#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
-#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
-
-#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
-#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
-#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
-#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
-
-  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
-
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
-
-  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
-  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
-
-  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
-
-  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
-  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
-
-/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
-#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
-
-/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
-#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
-#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
-#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
-#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
-#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
-#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
-#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
-
-/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
-#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
-#else 
-#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
-#endif
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  __DSB();
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Priority Grouping (non-secure)
-  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB_NS->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping (non-secure)
-  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
-{
-  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = FPU->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
-  {
-    return 2U;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM35P_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm35p.h
+ * @brief    CMSIS Cortex-M35P Core Peripheral Access Layer Header File
+ * @version  V1.1.3
+ * @date     13. October 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include                        /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header                   /* treat file as system include file */
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic ignored "-Wpedantic"   /* disable pedantic warning due to unnamed structs/unions */
+#endif
+
+#ifndef __CORE_CM35P_H_GENERIC
+#define __CORE_CM35P_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M35P
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS CM35P definitions */
+#define __CM35P_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM35P_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM35P_CMSIS_VERSION       ((__CM35P_CMSIS_VERSION_MAIN << 16U) | \
+                                      __CM35P_CMSIS_VERSION_SUB           )    /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                 (35U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined (__TARGET_FPU_VFP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined (__ARM_FP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined (__ARMVFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined (__TI_VFP_SUPPORT__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined (__FPU_VFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM35P_H_DEPENDANT
+#define __CORE_CM35P_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM35P_REV
+    #define __CM35P_REV               0x0000U
+    #warning "__CM35P_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M35P */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED7[21U];
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x0E4 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x0E8 (R/W)  Secure Fault Address Register */
+        uint32_t RESERVED3[69U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+  __OM  uint32_t BPIALL;                 /*!< Offset: 0x278 ( /W)  Branch Predictor Invalidate All */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 5U)                 /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and VFP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and VFP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and VFP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/* Media and VFP Feature Register 2 Definitions */
+#define FPU_MVFR2_FPMisc_Pos                4U                                            /*!< MVFR2: FPMisc bits Position */
+#define FPU_MVFR2_FPMisc_Msk               (0xFUL << FPU_MVFR2_FPMisc_Pos)                /*!< MVFR2: FPMisc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  \deprecated Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< \deprecated CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< \deprecated CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< \deprecated CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< \deprecated CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< \deprecated CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< \deprecated CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< \deprecated CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< \deprecated CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< \deprecated CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup CMSIS_DCB       Debug Control Block
+  \brief    Type definitions for the Debug Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Control Block Registers (DCB).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} DCB_Type;
+
+/* DHCSR, Debug Halting Control and Status Register Definitions */
+#define DCB_DHCSR_DBGKEY_Pos               16U                                            /*!< DCB DHCSR: Debug key Position */
+#define DCB_DHCSR_DBGKEY_Msk               (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos)             /*!< DCB DHCSR: Debug key Mask */
+
+#define DCB_DHCSR_S_RESTART_ST_Pos         26U                                            /*!< DCB DHCSR: Restart sticky status Position */
+#define DCB_DHCSR_S_RESTART_ST_Msk         (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos)          /*!< DCB DHCSR: Restart sticky status Mask */
+
+#define DCB_DHCSR_S_RESET_ST_Pos           25U                                            /*!< DCB DHCSR: Reset sticky status Position */
+#define DCB_DHCSR_S_RESET_ST_Msk           (0x1UL << DCB_DHCSR_S_RESET_ST_Pos)            /*!< DCB DHCSR: Reset sticky status Mask */
+
+#define DCB_DHCSR_S_RETIRE_ST_Pos          24U                                            /*!< DCB DHCSR: Retire sticky status Position */
+#define DCB_DHCSR_S_RETIRE_ST_Msk          (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos)           /*!< DCB DHCSR: Retire sticky status Mask */
+
+#define DCB_DHCSR_S_SDE_Pos                20U                                            /*!< DCB DHCSR: Secure debug enabled Position */
+#define DCB_DHCSR_S_SDE_Msk                (0x1UL << DCB_DHCSR_S_SDE_Pos)                 /*!< DCB DHCSR: Secure debug enabled Mask */
+
+#define DCB_DHCSR_S_LOCKUP_Pos             19U                                            /*!< DCB DHCSR: Lockup status Position */
+#define DCB_DHCSR_S_LOCKUP_Msk             (0x1UL << DCB_DHCSR_S_LOCKUP_Pos)              /*!< DCB DHCSR: Lockup status Mask */
+
+#define DCB_DHCSR_S_SLEEP_Pos              18U                                            /*!< DCB DHCSR: Sleeping status Position */
+#define DCB_DHCSR_S_SLEEP_Msk              (0x1UL << DCB_DHCSR_S_SLEEP_Pos)               /*!< DCB DHCSR: Sleeping status Mask */
+
+#define DCB_DHCSR_S_HALT_Pos               17U                                            /*!< DCB DHCSR: Halted status Position */
+#define DCB_DHCSR_S_HALT_Msk               (0x1UL << DCB_DHCSR_S_HALT_Pos)                /*!< DCB DHCSR: Halted status Mask */
+
+#define DCB_DHCSR_S_REGRDY_Pos             16U                                            /*!< DCB DHCSR: Register ready status Position */
+#define DCB_DHCSR_S_REGRDY_Msk             (0x1UL << DCB_DHCSR_S_REGRDY_Pos)              /*!< DCB DHCSR: Register ready status Mask */
+
+#define DCB_DHCSR_C_SNAPSTALL_Pos           5U                                            /*!< DCB DHCSR: Snap stall control Position */
+#define DCB_DHCSR_C_SNAPSTALL_Msk          (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos)           /*!< DCB DHCSR: Snap stall control Mask */
+
+#define DCB_DHCSR_C_MASKINTS_Pos            3U                                            /*!< DCB DHCSR: Mask interrupts control Position */
+#define DCB_DHCSR_C_MASKINTS_Msk           (0x1UL << DCB_DHCSR_C_MASKINTS_Pos)            /*!< DCB DHCSR: Mask interrupts control Mask */
+
+#define DCB_DHCSR_C_STEP_Pos                2U                                            /*!< DCB DHCSR: Step control Position */
+#define DCB_DHCSR_C_STEP_Msk               (0x1UL << DCB_DHCSR_C_STEP_Pos)                /*!< DCB DHCSR: Step control Mask */
+
+#define DCB_DHCSR_C_HALT_Pos                1U                                            /*!< DCB DHCSR: Halt control Position */
+#define DCB_DHCSR_C_HALT_Msk               (0x1UL << DCB_DHCSR_C_HALT_Pos)                /*!< DCB DHCSR: Halt control Mask */
+
+#define DCB_DHCSR_C_DEBUGEN_Pos             0U                                            /*!< DCB DHCSR: Debug enable control Position */
+#define DCB_DHCSR_C_DEBUGEN_Msk            (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/)         /*!< DCB DHCSR: Debug enable control Mask */
+
+/* DCRSR, Debug Core Register Select Register Definitions */
+#define DCB_DCRSR_REGWnR_Pos               16U                                            /*!< DCB DCRSR: Register write/not-read Position */
+#define DCB_DCRSR_REGWnR_Msk               (0x1UL << DCB_DCRSR_REGWnR_Pos)                /*!< DCB DCRSR: Register write/not-read Mask */
+
+#define DCB_DCRSR_REGSEL_Pos                0U                                            /*!< DCB DCRSR: Register selector Position */
+#define DCB_DCRSR_REGSEL_Msk               (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/)           /*!< DCB DCRSR: Register selector Mask */
+
+/* DCRDR, Debug Core Register Data Register Definitions */
+#define DCB_DCRDR_DBGTMP_Pos                0U                                            /*!< DCB DCRDR: Data temporary buffer Position */
+#define DCB_DCRDR_DBGTMP_Msk               (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/)     /*!< DCB DCRDR: Data temporary buffer Mask */
+
+/* DEMCR, Debug Exception and Monitor Control Register Definitions */
+#define DCB_DEMCR_TRCENA_Pos               24U                                            /*!< DCB DEMCR: Trace enable Position */
+#define DCB_DEMCR_TRCENA_Msk               (0x1UL << DCB_DEMCR_TRCENA_Pos)                /*!< DCB DEMCR: Trace enable Mask */
+
+#define DCB_DEMCR_MONPRKEY_Pos             23U                                            /*!< DCB DEMCR: Monitor pend req key Position */
+#define DCB_DEMCR_MONPRKEY_Msk             (0x1UL << DCB_DEMCR_MONPRKEY_Pos)              /*!< DCB DEMCR: Monitor pend req key Mask */
+
+#define DCB_DEMCR_UMON_EN_Pos              21U                                            /*!< DCB DEMCR: Unprivileged monitor enable Position */
+#define DCB_DEMCR_UMON_EN_Msk              (0x1UL << DCB_DEMCR_UMON_EN_Pos)               /*!< DCB DEMCR: Unprivileged monitor enable Mask */
+
+#define DCB_DEMCR_SDME_Pos                 20U                                            /*!< DCB DEMCR: Secure DebugMonitor enable Position */
+#define DCB_DEMCR_SDME_Msk                 (0x1UL << DCB_DEMCR_SDME_Pos)                  /*!< DCB DEMCR: Secure DebugMonitor enable Mask */
+
+#define DCB_DEMCR_MON_REQ_Pos              19U                                            /*!< DCB DEMCR: Monitor request Position */
+#define DCB_DEMCR_MON_REQ_Msk              (0x1UL << DCB_DEMCR_MON_REQ_Pos)               /*!< DCB DEMCR: Monitor request Mask */
+
+#define DCB_DEMCR_MON_STEP_Pos             18U                                            /*!< DCB DEMCR: Monitor step Position */
+#define DCB_DEMCR_MON_STEP_Msk             (0x1UL << DCB_DEMCR_MON_STEP_Pos)              /*!< DCB DEMCR: Monitor step Mask */
+
+#define DCB_DEMCR_MON_PEND_Pos             17U                                            /*!< DCB DEMCR: Monitor pend Position */
+#define DCB_DEMCR_MON_PEND_Msk             (0x1UL << DCB_DEMCR_MON_PEND_Pos)              /*!< DCB DEMCR: Monitor pend Mask */
+
+#define DCB_DEMCR_MON_EN_Pos               16U                                            /*!< DCB DEMCR: Monitor enable Position */
+#define DCB_DEMCR_MON_EN_Msk               (0x1UL << DCB_DEMCR_MON_EN_Pos)                /*!< DCB DEMCR: Monitor enable Mask */
+
+#define DCB_DEMCR_VC_SFERR_Pos             11U                                            /*!< DCB DEMCR: Vector Catch SecureFault Position */
+#define DCB_DEMCR_VC_SFERR_Msk             (0x1UL << DCB_DEMCR_VC_SFERR_Pos)              /*!< DCB DEMCR: Vector Catch SecureFault Mask */
+
+#define DCB_DEMCR_VC_HARDERR_Pos           10U                                            /*!< DCB DEMCR: Vector Catch HardFault errors Position */
+#define DCB_DEMCR_VC_HARDERR_Msk           (0x1UL << DCB_DEMCR_VC_HARDERR_Pos)            /*!< DCB DEMCR: Vector Catch HardFault errors Mask */
+
+#define DCB_DEMCR_VC_INTERR_Pos             9U                                            /*!< DCB DEMCR: Vector Catch interrupt errors Position */
+#define DCB_DEMCR_VC_INTERR_Msk            (0x1UL << DCB_DEMCR_VC_INTERR_Pos)             /*!< DCB DEMCR: Vector Catch interrupt errors Mask */
+
+#define DCB_DEMCR_VC_BUSERR_Pos             8U                                            /*!< DCB DEMCR: Vector Catch BusFault errors Position */
+#define DCB_DEMCR_VC_BUSERR_Msk            (0x1UL << DCB_DEMCR_VC_BUSERR_Pos)             /*!< DCB DEMCR: Vector Catch BusFault errors Mask */
+
+#define DCB_DEMCR_VC_STATERR_Pos            7U                                            /*!< DCB DEMCR: Vector Catch state errors Position */
+#define DCB_DEMCR_VC_STATERR_Msk           (0x1UL << DCB_DEMCR_VC_STATERR_Pos)            /*!< DCB DEMCR: Vector Catch state errors Mask */
+
+#define DCB_DEMCR_VC_CHKERR_Pos             6U                                            /*!< DCB DEMCR: Vector Catch check errors Position */
+#define DCB_DEMCR_VC_CHKERR_Msk            (0x1UL << DCB_DEMCR_VC_CHKERR_Pos)             /*!< DCB DEMCR: Vector Catch check errors Mask */
+
+#define DCB_DEMCR_VC_NOCPERR_Pos            5U                                            /*!< DCB DEMCR: Vector Catch NOCP errors Position */
+#define DCB_DEMCR_VC_NOCPERR_Msk           (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos)            /*!< DCB DEMCR: Vector Catch NOCP errors Mask */
+
+#define DCB_DEMCR_VC_MMERR_Pos              4U                                            /*!< DCB DEMCR: Vector Catch MemManage errors Position */
+#define DCB_DEMCR_VC_MMERR_Msk             (0x1UL << DCB_DEMCR_VC_MMERR_Pos)              /*!< DCB DEMCR: Vector Catch MemManage errors Mask */
+
+#define DCB_DEMCR_VC_CORERESET_Pos          0U                                            /*!< DCB DEMCR: Vector Catch Core reset Position */
+#define DCB_DEMCR_VC_CORERESET_Msk         (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/)      /*!< DCB DEMCR: Vector Catch Core reset Mask */
+
+/* DAUTHCTRL, Debug Authentication Control Register Definitions */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Pos        3U                                            /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Msk       (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos)        /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPNIDENSEL_Pos        2U                                            /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPNIDENSEL_Msk       (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos)        /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */
+
+#define DCB_DAUTHCTRL_INTSPIDEN_Pos         1U                                            /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPIDEN_Msk        (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos)         /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPIDENSEL_Pos         0U                                            /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPIDENSEL_Msk        (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/)     /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */
+
+/* DSCSR, Debug Security Control and Status Register Definitions */
+#define DCB_DSCSR_CDSKEY_Pos               17U                                            /*!< DCB DSCSR: CDS write-enable key Position */
+#define DCB_DSCSR_CDSKEY_Msk               (0x1UL << DCB_DSCSR_CDSKEY_Pos)                /*!< DCB DSCSR: CDS write-enable key Mask */
+
+#define DCB_DSCSR_CDS_Pos                  16U                                            /*!< DCB DSCSR: Current domain Secure Position */
+#define DCB_DSCSR_CDS_Msk                  (0x1UL << DCB_DSCSR_CDS_Pos)                   /*!< DCB DSCSR: Current domain Secure Mask */
+
+#define DCB_DSCSR_SBRSEL_Pos                1U                                            /*!< DCB DSCSR: Secure banked register select Position */
+#define DCB_DSCSR_SBRSEL_Msk               (0x1UL << DCB_DSCSR_SBRSEL_Pos)                /*!< DCB DSCSR: Secure banked register select Mask */
+
+#define DCB_DSCSR_SBRSELEN_Pos              0U                                            /*!< DCB DSCSR: Secure banked register select enable Position */
+#define DCB_DSCSR_SBRSELEN_Msk             (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/)          /*!< DCB DSCSR: Secure banked register select enable Mask */
+
+/*@} end of group CMSIS_DCB */
+
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DIB       Debug Identification Block
+  \brief    Type definitions for the Debug Identification Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Identification Block Registers (DIB).
+ */
+typedef struct
+{
+  __OM  uint32_t DLAR;                   /*!< Offset: 0x000 ( /W)  SCS Software Lock Access Register */
+  __IM  uint32_t DLSR;                   /*!< Offset: 0x004 (R/ )  SCS Software Lock Status Register */
+  __IM  uint32_t DAUTHSTATUS;            /*!< Offset: 0x008 (R/ )  Debug Authentication Status Register */
+  __IM  uint32_t DDEVARCH;               /*!< Offset: 0x00C (R/ )  SCS Device Architecture Register */
+  __IM  uint32_t DDEVTYPE;               /*!< Offset: 0x010 (R/ )  SCS Device Type Register */
+} DIB_Type;
+
+/* DLAR, SCS Software Lock Access Register Definitions */
+#define DIB_DLAR_KEY_Pos                    0U                                            /*!< DIB DLAR: KEY Position */
+#define DIB_DLAR_KEY_Msk                   (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */)        /*!< DIB DLAR: KEY Mask */
+
+/* DLSR, SCS Software Lock Status Register Definitions */
+#define DIB_DLSR_nTT_Pos                    2U                                            /*!< DIB DLSR: Not thirty-two bit Position */
+#define DIB_DLSR_nTT_Msk                   (0x1UL << DIB_DLSR_nTT_Pos )                   /*!< DIB DLSR: Not thirty-two bit Mask */
+
+#define DIB_DLSR_SLK_Pos                    1U                                            /*!< DIB DLSR: Software Lock status Position */
+#define DIB_DLSR_SLK_Msk                   (0x1UL << DIB_DLSR_SLK_Pos )                   /*!< DIB DLSR: Software Lock status Mask */
+
+#define DIB_DLSR_SLI_Pos                    0U                                            /*!< DIB DLSR: Software Lock implemented Position */
+#define DIB_DLSR_SLI_Msk                   (0x1UL /*<< DIB_DLSR_SLI_Pos*/)                /*!< DIB DLSR: Software Lock implemented Mask */
+
+/* DAUTHSTATUS, Debug Authentication Status Register Definitions */
+#define DIB_DAUTHSTATUS_SNID_Pos            6U                                            /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_SNID_Msk           (0x3UL << DIB_DAUTHSTATUS_SNID_Pos )           /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_SID_Pos             4U                                            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_SID_Msk            (0x3UL << DIB_DAUTHSTATUS_SID_Pos )            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSNID_Pos           2U                                            /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSNID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSID_Pos            0U                                            /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSID_Msk           (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/)        /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */
+
+/* DDEVARCH, SCS Device Architecture Register Definitions */
+#define DIB_DDEVARCH_ARCHITECT_Pos         21U                                            /*!< DIB DDEVARCH: Architect Position */
+#define DIB_DDEVARCH_ARCHITECT_Msk         (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos )       /*!< DIB DDEVARCH: Architect Mask */
+
+#define DIB_DDEVARCH_PRESENT_Pos           20U                                            /*!< DIB DDEVARCH: DEVARCH Present Position */
+#define DIB_DDEVARCH_PRESENT_Msk           (0x1FUL << DIB_DDEVARCH_PRESENT_Pos )          /*!< DIB DDEVARCH: DEVARCH Present Mask */
+
+#define DIB_DDEVARCH_REVISION_Pos          16U                                            /*!< DIB DDEVARCH: Revision Position */
+#define DIB_DDEVARCH_REVISION_Msk          (0xFUL << DIB_DDEVARCH_REVISION_Pos )          /*!< DIB DDEVARCH: Revision Mask */
+
+#define DIB_DDEVARCH_ARCHVER_Pos           12U                                            /*!< DIB DDEVARCH: Architecture Version Position */
+#define DIB_DDEVARCH_ARCHVER_Msk           (0xFUL << DIB_DDEVARCH_ARCHVER_Pos )           /*!< DIB DDEVARCH: Architecture Version Mask */
+
+#define DIB_DDEVARCH_ARCHPART_Pos           0U                                            /*!< DIB DDEVARCH: Architecture Part Position */
+#define DIB_DDEVARCH_ARCHPART_Msk          (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/)     /*!< DIB DDEVARCH: Architecture Part Mask */
+
+/* DDEVTYPE, SCS Device Type Register Definitions */
+#define DIB_DDEVTYPE_SUB_Pos                4U                                            /*!< DIB DDEVTYPE: Sub-type Position */
+#define DIB_DDEVTYPE_SUB_Msk               (0xFUL << DIB_DDEVTYPE_SUB_Pos )               /*!< DIB DDEVTYPE: Sub-type Mask */
+
+#define DIB_DDEVTYPE_MAJOR_Pos              0U                                            /*!< DIB DDEVTYPE: Major type Position */
+#define DIB_DDEVTYPE_MAJOR_Msk             (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/)          /*!< DIB DDEVTYPE: Major type Mask */
+
+
+/*@} end of group CMSIS_DIB */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< \deprecated Core Debug Base Address */
+  #define DCB_BASE            (0xE000EDF0UL)                             /*!< DCB Base Address */
+  #define DIB_BASE            (0xE000EFB0UL)                             /*!< DIB Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< \deprecated Core Debug configuration struct */
+  #define DCB                 ((DCB_Type       *)     DCB_BASE         ) /*!< DCB configuration struct */
+  #define DIB                 ((DIB_Type       *)     DIB_BASE         ) /*!< DIB configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< \deprecated Core Debug Base Address           (non-secure address space) */
+  #define DCB_BASE_NS         (0xE002EDF0UL)                             /*!< DCB Base Address                  (non-secure address space) */
+  #define DIB_BASE_NS         (0xE002EFB0UL)                             /*!< DIB Base Address                  (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct   (non-secure address space) */
+  #define DCB_NS              ((DCB_Type       *)     DCB_BASE_NS      ) /*!< DCB configuration struct          (non-secure address space) */
+  #define DIB_NS              ((DIB_Type       *)     DIB_BASE_NS      ) /*!< DIB configuration struct          (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_register_aliases     Backwards Compatibility Aliases
+  \brief      Register alias definitions for backwards compatibility.
+  @{
+ */
+#define ID_ADR  (ID_AFR)    /*!< SCB Auxiliary Feature Register */
+/*@} */
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    Debug Control function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DCBFunctions Debug Control Functions
+  \brief    Functions that access the Debug Control Block.
+  @{
+ */
+
+
+/**
+  \brief   Set Debug Authentication Control Register
+  \details writes to Debug Authentication Control register.
+  \param [in]  value  value to be writen.
+ */
+__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register
+  \details Reads Debug Authentication Control register.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void)
+{
+    return (DCB->DAUTHCTRL);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Debug Authentication Control Register (non-secure)
+  \details writes to non-secure Debug Authentication Control register when in secure state.
+  \param [in]  value  value to be writen
+ */
+__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB_NS->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register (non-secure)
+  \details Reads non-secure Debug Authentication Control register when in secure state.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
+{
+    return (DCB_NS->DAUTHCTRL);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    Debug Identification function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions
+  \brief    Functions that access the Debug Identification Block.
+  @{
+ */
+
+
+/**
+  \brief   Get Debug Authentication Status Register
+  \details Reads Debug Authentication Status register.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t DIB_GetAuthStatus(void)
+{
+    return (DIB->DAUTHSTATUS);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Debug Authentication Status Register (non-secure)
+  \details Reads non-secure Debug Authentication Status register when in secure state.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void)
+{
+    return (DIB_NS->DAUTHSTATUS);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM35P_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm4.h b/Libraries/CMSIS/Core/Include/core_cm4.h
similarity index 97%
rename from Libraries/CMSIS/Include/core_cm4.h
rename to Libraries/CMSIS/Core/Include/core_cm4.h
index 90c2a72d..e21cd149 100644
--- a/Libraries/CMSIS/Include/core_cm4.h
+++ b/Libraries/CMSIS/Core/Include/core_cm4.h
@@ -1,2124 +1,2129 @@
-/**************************************************************************//**
- * @file     core_cm4.h
- * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
- * @version  V5.1.0
- * @date     13. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM4_H_GENERIC
-#define __CORE_CM4_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M4
-  @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM4 definitions */
-#define __CM4_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM4_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM4_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (4U)                                   /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM4_H_DEPENDANT
-#define __CORE_CM4_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM4_REV
-    #define __CM4_REV               0x0000U
-    #warning "__CM4_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M4 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
-    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
-    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RESERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[5U];
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
-#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
-
-#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
-#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[32U];
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/* Media and FP Feature Register 2 Definitions */
-
-#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
-#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
-#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */
-#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */
-#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
-  /* ARM Application Note 321 states that the M4 does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = FPU->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM4_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm4.h
+ * @brief    CMSIS Cortex-M4 Core Peripheral Access Layer Header File
+ * @version  V5.1.2
+ * @date     04. June 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM4_H_GENERIC
+#define __CORE_CM4_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M4
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/* CMSIS CM4 definitions */
+#define __CM4_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM4_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM4_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                (4U)                                   /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM4_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM4_H_DEPENDANT
+#define __CORE_CM4_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM4_REV
+    #define __CM4_REV               0x0000U
+    #warning "__CM4_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M4 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[5U];
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 5U)                 /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISOOFP_Pos            9U                                         /*!< ACTLR: DISOOFP Position */
+#define SCnSCB_ACTLR_DISOOFP_Msk           (1UL << SCnSCB_ACTLR_DISOOFP_Pos)           /*!< ACTLR: DISOOFP Mask */
+
+#define SCnSCB_ACTLR_DISFPCA_Pos            8U                                         /*!< ACTLR: DISFPCA Position */
+#define SCnSCB_ACTLR_DISFPCA_Msk           (1UL << SCnSCB_ACTLR_DISFPCA_Pos)           /*!< ACTLR: DISFPCA Mask */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/* Media and FP Feature Register 2 Definitions */
+
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
+#endif
+
+#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
+#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */
+#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */
+#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M4 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM4_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Core/Include/core_cm55.h b/Libraries/CMSIS/Core/Include/core_cm55.h
new file mode 100644
index 00000000..878d0941
--- /dev/null
+++ b/Libraries/CMSIS/Core/Include/core_cm55.h
@@ -0,0 +1,4289 @@
+/**************************************************************************//**
+ * @file     core_cm55.h
+ * @brief    CMSIS Cortex-M55 Core Peripheral Access Layer Header File
+ * @version  V1.2.2
+ * @date     13. October 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2018-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include                        /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header                   /* treat file as system include file */
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic ignored "-Wpedantic"   /* disable pedantic warning due to unnamed structs/unions */
+#endif
+
+#ifndef __CORE_CM55_H_GENERIC
+#define __CORE_CM55_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_CM55
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS CM55 definitions */
+#define __CM55_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM55_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                   /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM55_CMSIS_VERSION       ((__CM55_CMSIS_VERSION_MAIN << 16U) | \
+                                     __CM55_CMSIS_VERSION_SUB           )     /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                      (55U)                                 /*!< Cortex-M Core */
+
+#if defined ( __CC_ARM )
+  #error Legacy Arm Compiler does not support Armv8.1-M target architecture.
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED       0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined(__ARM_FEATURE_DSP)
+    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM55_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM55_H_DEPENDANT
+#define __CORE_CM55_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM55_REV
+    #define __CM55_REV               0x0000U
+    #warning "__CM55_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #if __FPU_PRESENT != 0U
+    #ifndef __FPU_DP
+      #define __FPU_DP             0U
+      #warning "__FPU_DP not defined in device header file; using default!"
+    #endif
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ICACHE_PRESENT
+    #define __ICACHE_PRESENT          0U
+    #warning "__ICACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DCACHE_PRESENT
+    #define __DCACHE_PRESENT          0U
+    #warning "__DCACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __PMU_PRESENT
+    #define __PMU_PRESENT             0U
+    #warning "__PMU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #if __PMU_PRESENT != 0U
+    #ifndef __PMU_NUM_EVENTCNT
+      #define __PMU_NUM_EVENTCNT      8U
+      #warning "__PMU_NUM_EVENTCNT not defined in device header file; using default!"
+    #elif (__PMU_NUM_EVENTCNT > 8 || __PMU_NUM_EVENTCNT < 2)
+    #error "__PMU_NUM_EVENTCNT is out of range in device header file!" */
+    #endif
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M55 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED7[21U];
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x0E4 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x0E8 (R/W)  Secure Fault Address Register */
+        uint32_t RESERVED3[69U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+  __IOM uint32_t RFSR;                   /*!< Offset: 0x204 (R/W)  RAS Fault Status Register */
+        uint32_t RESERVED4[14U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+  __OM  uint32_t BPIALL;                 /*!< Offset: 0x278 ( /W)  Branch Predictor Invalidate All */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_IESB_Pos                  5U                                            /*!< SCB AIRCR: Implicit ESB Enable Position */
+#define SCB_AIRCR_IESB_Msk                 (1UL << SCB_AIRCR_IESB_Pos)                    /*!< SCB AIRCR: Implicit ESB Enable Mask */
+
+#define SCB_AIRCR_DIT_Pos                   4U                                            /*!< SCB AIRCR: Data Independent Timing Position */
+#define SCB_AIRCR_DIT_Msk                  (1UL << SCB_AIRCR_DIT_Pos)                     /*!< SCB AIRCR: Data Independent Timing Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_TRD_Pos                    20U                                            /*!< SCB CCR: TRD Position */
+#define SCB_CCR_TRD_Msk                    (1UL << SCB_CCR_TRD_Pos)                       /*!< SCB CCR: TRD Mask */
+
+#define SCB_CCR_LOB_Pos                    19U                                            /*!< SCB CCR: LOB Position */
+#define SCB_CCR_LOB_Msk                    (1UL << SCB_CCR_LOB_Pos)                       /*!< SCB CCR: LOB Mask */
+
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 5U)                 /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_PMU_Pos                    5U                                            /*!< SCB DFSR: PMU Position */
+#define SCB_DFSR_PMU_Msk                   (1UL << SCB_DFSR_PMU_Pos)                      /*!< SCB DFSR: PMU Mask */
+
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CP7_Pos                   7U                                            /*!< SCB NSACR: CP7 Position */
+#define SCB_NSACR_CP7_Msk                  (1UL << SCB_NSACR_CP7_Pos)                     /*!< SCB NSACR: CP7 Mask */
+
+#define SCB_NSACR_CP6_Pos                   6U                                            /*!< SCB NSACR: CP6 Position */
+#define SCB_NSACR_CP6_Msk                  (1UL << SCB_NSACR_CP6_Pos)                     /*!< SCB NSACR: CP6 Mask */
+
+#define SCB_NSACR_CP5_Pos                   5U                                            /*!< SCB NSACR: CP5 Position */
+#define SCB_NSACR_CP5_Msk                  (1UL << SCB_NSACR_CP5_Pos)                     /*!< SCB NSACR: CP5 Mask */
+
+#define SCB_NSACR_CP4_Pos                   4U                                            /*!< SCB NSACR: CP4 Position */
+#define SCB_NSACR_CP4_Msk                  (1UL << SCB_NSACR_CP4_Pos)                     /*!< SCB NSACR: CP4 Mask */
+
+#define SCB_NSACR_CP3_Pos                   3U                                            /*!< SCB NSACR: CP3 Position */
+#define SCB_NSACR_CP3_Msk                  (1UL << SCB_NSACR_CP3_Pos)                     /*!< SCB NSACR: CP3 Mask */
+
+#define SCB_NSACR_CP2_Pos                   2U                                            /*!< SCB NSACR: CP2 Position */
+#define SCB_NSACR_CP2_Msk                  (1UL << SCB_NSACR_CP2_Pos)                     /*!< SCB NSACR: CP2 Mask */
+
+#define SCB_NSACR_CP1_Pos                   1U                                            /*!< SCB NSACR: CP1 Position */
+#define SCB_NSACR_CP1_Msk                  (1UL << SCB_NSACR_CP1_Pos)                     /*!< SCB NSACR: CP1 Mask */
+
+#define SCB_NSACR_CP0_Pos                   0U                                            /*!< SCB NSACR: CP0 Position */
+#define SCB_NSACR_CP0_Msk                  (1UL /*<< SCB_NSACR_CP0_Pos*/)                 /*!< SCB NSACR: CP0 Mask */
+
+/* SCB Debug Feature Register 0 Definitions */
+#define SCB_ID_DFR_UDE_Pos                 28U                                            /*!< SCB ID_DFR: UDE Position */
+#define SCB_ID_DFR_UDE_Msk                 (0xFUL << SCB_ID_DFR_UDE_Pos)                  /*!< SCB ID_DFR: UDE Mask */
+
+#define SCB_ID_DFR_MProfDbg_Pos            20U                                            /*!< SCB ID_DFR: MProfDbg Position */
+#define SCB_ID_DFR_MProfDbg_Msk            (0xFUL << SCB_ID_DFR_MProfDbg_Pos)             /*!< SCB ID_DFR: MProfDbg Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB RAS Fault Status Register Definitions */
+#define SCB_RFSR_V_Pos                     31U                                            /*!< SCB RFSR: V Position */
+#define SCB_RFSR_V_Msk                     (1UL << SCB_RFSR_V_Pos)                        /*!< SCB RFSR: V Mask */
+
+#define SCB_RFSR_IS_Pos                    16U                                            /*!< SCB RFSR: IS Position */
+#define SCB_RFSR_IS_Msk                    (0x7FFFUL << SCB_RFSR_IS_Pos)                  /*!< SCB RFSR: IS Mask */
+
+#define SCB_RFSR_UET_Pos                    0U                                            /*!< SCB RFSR: UET Position */
+#define SCB_RFSR_UET_Msk                   (3UL /*<< SCB_RFSR_UET_Pos*/)                  /*!< SCB RFSR: UET Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[3U];
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  ITM Device Type Register */
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup PwrModCtl_Type     Power Mode Control Registers
+  \brief    Type definitions for the Power Mode Control Registers (PWRMODCTL)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Power Mode Control Registers (PWRMODCTL).
+ */
+typedef struct
+{
+  __IOM uint32_t CPDLPSTATE;
+  __IOM uint32_t DPDLPSTATE;
+} PwrModCtl_Type;
+
+
+/* PWRMODCTL Core Power Domain Low Power State (CPDLPSTATE) Register Definitions */
+#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Pos                 0U                           /*!< PWRMODCTL CPDLPSTATE CLPSTATE Position */
+#define PWRMODCTL_CPDLPSTATE_CLPSTATE_Msk                 3UL                          /*!< PWRMODCTL CPDLPSTATE CLPSTATE Mask */
+
+#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Pos                 4U                           /*!< PWRMODCTL CPDLPSTATE ELPSTATE Position */
+#define PWRMODCTL_CPDLPSTATE_ELPSTATE_Msk                 3UL                          /*!< PWRMODCTL CPDLPSTATE ELPSTATE Mask */
+
+#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Pos                 8U                           /*!< PWRMODCTL CPDLPSTATE RLPSTATE Position */
+#define PWRMODCTL_CPDLPSTATE_RLPSTATE_Msk                 3UL                          /*!< PWRMODCTL CPDLPSTATE RLPSTATE Mask */
+
+/* PWRMODCTL Debug Power Domain Low Power State (DPDLPSTATE) Register Definitions */
+#define PWRMODCTL_DPDLPSTATE_DLPSTATE_Pos                 0U                           /*!< PWRMODCTL DPDLPSTATE DLPSTATE Position */
+#define PWRMODCTL_DPDLPSTATE_DLPSTATE_Msk                 3UL                          /*!< PWRMODCTL DPDLPSTATE DLPSTATE Mask */
+
+/*@}*/ /* end of group CMSIS_PWRMODCTL */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[809U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  Software Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  Software Lock Status Register */
+        uint32_t RESERVED4[4U];
+  __IM  uint32_t TYPE;                   /*!< Offset: 0xFC8 (R/ )  Device Identifier Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_SWOSCALER_Pos              0U                                         /*!< TPI ACPR: SWOSCALER Position */
+#define TPI_ACPR_SWOSCALER_Msk             (0xFFFFUL /*<< TPI_ACPR_SWOSCALER_Pos*/)    /*!< TPI ACPR: SWOSCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFmt_Pos                  0U                                         /*!< TPI FFCR: EnFmt Position */
+#define TPI_FFCR_EnFmt_Msk                 (0x3UL << /*TPI_FFCR_EnFmt_Pos*/)           /*!< TPI FFCR: EnFmt Mask */
+
+/* TPI Periodic Synchronization Control Register Definitions */
+#define TPI_PSCR_PSCount_Pos                0U                                         /*!< TPI PSCR: PSCount Position */
+#define TPI_PSCR_PSCount_Msk               (0x1FUL /*<< TPI_PSCR_PSCount_Pos*/)        /*!< TPI PSCR: TPSCount Mask */
+
+/* TPI Software Lock Status Register Definitions */
+#define TPI_LSR_nTT_Pos                     1U                                         /*!< TPI LSR: Not thirty-two bit. Position */
+#define TPI_LSR_nTT_Msk                    (0x1UL << TPI_LSR_nTT_Pos)                  /*!< TPI LSR: Not thirty-two bit. Mask */
+
+#define TPI_LSR_SLK_Pos                     1U                                         /*!< TPI LSR: Software Lock status Position */
+#define TPI_LSR_SLK_Msk                    (0x1UL << TPI_LSR_SLK_Pos)                  /*!< TPI LSR: Software Lock status Mask */
+
+#define TPI_LSR_SLI_Pos                     0U                                         /*!< TPI LSR: Software Lock implemented Position */
+#define TPI_LSR_SLI_Msk                    (0x1UL /*<< TPI_LSR_SLI_Pos*/)              /*!< TPI LSR: Software Lock implemented Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFO depth Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFO depth Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_PMU     Performance Monitoring Unit (PMU)
+  \brief    Type definitions for the Performance Monitoring Unit (PMU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Performance Monitoring Unit (PMU).
+ */
+typedef struct
+{
+  __IOM uint32_t EVCNTR[__PMU_NUM_EVENTCNT];        /*!< Offset: 0x0 (R/W)    PMU Event Counter Registers */
+#if __PMU_NUM_EVENTCNT<31
+        uint32_t RESERVED0[31U-__PMU_NUM_EVENTCNT];
+#endif
+  __IOM uint32_t CCNTR;                             /*!< Offset: 0x7C (R/W)   PMU Cycle Counter Register */
+        uint32_t RESERVED1[224];
+  __IOM uint32_t EVTYPER[__PMU_NUM_EVENTCNT];       /*!< Offset: 0x400 (R/W)  PMU Event Type and Filter Registers */
+#if __PMU_NUM_EVENTCNT<31
+        uint32_t RESERVED2[31U-__PMU_NUM_EVENTCNT];
+#endif
+  __IOM uint32_t CCFILTR;                           /*!< Offset: 0x47C (R/W)  PMU Cycle Counter Filter Register */
+        uint32_t RESERVED3[480];
+  __IOM uint32_t CNTENSET;                          /*!< Offset: 0xC00 (R/W)  PMU Count Enable Set Register */
+        uint32_t RESERVED4[7];
+  __IOM uint32_t CNTENCLR;                          /*!< Offset: 0xC20 (R/W)  PMU Count Enable Clear Register */
+        uint32_t RESERVED5[7];
+  __IOM uint32_t INTENSET;                          /*!< Offset: 0xC40 (R/W)  PMU Interrupt Enable Set Register */
+        uint32_t RESERVED6[7];
+  __IOM uint32_t INTENCLR;                          /*!< Offset: 0xC60 (R/W)  PMU Interrupt Enable Clear Register */
+        uint32_t RESERVED7[7];
+  __IOM uint32_t OVSCLR;                            /*!< Offset: 0xC80 (R/W)  PMU Overflow Flag Status Clear Register */
+        uint32_t RESERVED8[7];
+  __IOM uint32_t SWINC;                             /*!< Offset: 0xCA0 (R/W)  PMU Software Increment Register */
+        uint32_t RESERVED9[7];
+  __IOM uint32_t OVSSET;                            /*!< Offset: 0xCC0 (R/W)  PMU Overflow Flag Status Set Register */
+        uint32_t RESERVED10[79];
+  __IOM uint32_t TYPE;                              /*!< Offset: 0xE00 (R/W)  PMU Type Register */
+  __IOM uint32_t CTRL;                              /*!< Offset: 0xE04 (R/W)  PMU Control Register */
+        uint32_t RESERVED11[108];
+  __IOM uint32_t AUTHSTATUS;                        /*!< Offset: 0xFB8 (R/W)  PMU Authentication Status Register */
+  __IOM uint32_t DEVARCH;                           /*!< Offset: 0xFBC (R/W)  PMU Device Architecture Register */
+        uint32_t RESERVED12[3];
+  __IOM uint32_t DEVTYPE;                           /*!< Offset: 0xFCC (R/W)  PMU Device Type Register */
+  __IOM uint32_t PIDR4;                             /*!< Offset: 0xFD0 (R/W)  PMU Peripheral Identification Register 4 */
+        uint32_t RESERVED13[3];
+  __IOM uint32_t PIDR0;                             /*!< Offset: 0xFE0 (R/W)  PMU Peripheral Identification Register 0 */
+  __IOM uint32_t PIDR1;                             /*!< Offset: 0xFE4 (R/W)  PMU Peripheral Identification Register 1 */
+  __IOM uint32_t PIDR2;                             /*!< Offset: 0xFE8 (R/W)  PMU Peripheral Identification Register 2 */
+  __IOM uint32_t PIDR3;                             /*!< Offset: 0xFEC (R/W)  PMU Peripheral Identification Register 3 */
+  __IOM uint32_t CIDR0;                             /*!< Offset: 0xFF0 (R/W)  PMU Component Identification Register 0 */
+  __IOM uint32_t CIDR1;                             /*!< Offset: 0xFF4 (R/W)  PMU Component Identification Register 1 */
+  __IOM uint32_t CIDR2;                             /*!< Offset: 0xFF8 (R/W)  PMU Component Identification Register 2 */
+  __IOM uint32_t CIDR3;                             /*!< Offset: 0xFFC (R/W)  PMU Component Identification Register 3 */
+} PMU_Type;
+
+/** \brief PMU Event Counter Registers (0-30) Definitions  */
+
+#define PMU_EVCNTR_CNT_Pos                    0U                                           /*!< PMU EVCNTR: Counter Position */
+#define PMU_EVCNTR_CNT_Msk                   (0xFFFFUL /*<< PMU_EVCNTRx_CNT_Pos*/)         /*!< PMU EVCNTR: Counter Mask */
+
+/** \brief PMU Event Type and Filter Registers (0-30) Definitions  */
+
+#define PMU_EVTYPER_EVENTTOCNT_Pos            0U                                           /*!< PMU EVTYPER: Event to Count Position */
+#define PMU_EVTYPER_EVENTTOCNT_Msk           (0xFFFFUL /*<< EVTYPERx_EVENTTOCNT_Pos*/)     /*!< PMU EVTYPER: Event to Count Mask */
+
+/** \brief PMU Count Enable Set Register Definitions */
+
+#define PMU_CNTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU CNTENSET: Event Counter 0 Enable Set Position */
+#define PMU_CNTENSET_CNT0_ENABLE_Msk         (1UL /*<< PMU_CNTENSET_CNT0_ENABLE_Pos*/)     /*!< PMU CNTENSET: Event Counter 0 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT1_ENABLE_Pos          1U                                           /*!< PMU CNTENSET: Event Counter 1 Enable Set Position */
+#define PMU_CNTENSET_CNT1_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT1_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 1 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT2_ENABLE_Pos          2U                                           /*!< PMU CNTENSET: Event Counter 2 Enable Set Position */
+#define PMU_CNTENSET_CNT2_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT2_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 2 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT3_ENABLE_Pos          3U                                           /*!< PMU CNTENSET: Event Counter 3 Enable Set Position */
+#define PMU_CNTENSET_CNT3_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT3_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 3 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT4_ENABLE_Pos          4U                                           /*!< PMU CNTENSET: Event Counter 4 Enable Set Position */
+#define PMU_CNTENSET_CNT4_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT4_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 4 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT5_ENABLE_Pos          5U                                           /*!< PMU CNTENSET: Event Counter 5 Enable Set Position */
+#define PMU_CNTENSET_CNT5_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT5_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 5 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT6_ENABLE_Pos          6U                                           /*!< PMU CNTENSET: Event Counter 6 Enable Set Position */
+#define PMU_CNTENSET_CNT6_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT6_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 6 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT7_ENABLE_Pos          7U                                           /*!< PMU CNTENSET: Event Counter 7 Enable Set Position */
+#define PMU_CNTENSET_CNT7_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT7_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 7 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT8_ENABLE_Pos          8U                                           /*!< PMU CNTENSET: Event Counter 8 Enable Set Position */
+#define PMU_CNTENSET_CNT8_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT8_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 8 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT9_ENABLE_Pos          9U                                           /*!< PMU CNTENSET: Event Counter 9 Enable Set Position */
+#define PMU_CNTENSET_CNT9_ENABLE_Msk         (1UL << PMU_CNTENSET_CNT9_ENABLE_Pos)         /*!< PMU CNTENSET: Event Counter 9 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT10_ENABLE_Pos         10U                                          /*!< PMU CNTENSET: Event Counter 10 Enable Set Position */
+#define PMU_CNTENSET_CNT10_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT10_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 10 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT11_ENABLE_Pos         11U                                          /*!< PMU CNTENSET: Event Counter 11 Enable Set Position */
+#define PMU_CNTENSET_CNT11_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT11_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 11 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT12_ENABLE_Pos         12U                                          /*!< PMU CNTENSET: Event Counter 12 Enable Set Position */
+#define PMU_CNTENSET_CNT12_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT12_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 12 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT13_ENABLE_Pos         13U                                          /*!< PMU CNTENSET: Event Counter 13 Enable Set Position */
+#define PMU_CNTENSET_CNT13_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT13_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 13 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT14_ENABLE_Pos         14U                                          /*!< PMU CNTENSET: Event Counter 14 Enable Set Position */
+#define PMU_CNTENSET_CNT14_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT14_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 14 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT15_ENABLE_Pos         15U                                          /*!< PMU CNTENSET: Event Counter 15 Enable Set Position */
+#define PMU_CNTENSET_CNT15_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT15_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 15 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT16_ENABLE_Pos         16U                                          /*!< PMU CNTENSET: Event Counter 16 Enable Set Position */
+#define PMU_CNTENSET_CNT16_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT16_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 16 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT17_ENABLE_Pos         17U                                          /*!< PMU CNTENSET: Event Counter 17 Enable Set Position */
+#define PMU_CNTENSET_CNT17_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT17_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 17 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT18_ENABLE_Pos         18U                                          /*!< PMU CNTENSET: Event Counter 18 Enable Set Position */
+#define PMU_CNTENSET_CNT18_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT18_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 18 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT19_ENABLE_Pos         19U                                          /*!< PMU CNTENSET: Event Counter 19 Enable Set Position */
+#define PMU_CNTENSET_CNT19_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT19_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 19 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT20_ENABLE_Pos         20U                                          /*!< PMU CNTENSET: Event Counter 20 Enable Set Position */
+#define PMU_CNTENSET_CNT20_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT20_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 20 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT21_ENABLE_Pos         21U                                          /*!< PMU CNTENSET: Event Counter 21 Enable Set Position */
+#define PMU_CNTENSET_CNT21_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT21_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 21 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT22_ENABLE_Pos         22U                                          /*!< PMU CNTENSET: Event Counter 22 Enable Set Position */
+#define PMU_CNTENSET_CNT22_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT22_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 22 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT23_ENABLE_Pos         23U                                          /*!< PMU CNTENSET: Event Counter 23 Enable Set Position */
+#define PMU_CNTENSET_CNT23_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT23_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 23 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT24_ENABLE_Pos         24U                                          /*!< PMU CNTENSET: Event Counter 24 Enable Set Position */
+#define PMU_CNTENSET_CNT24_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT24_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 24 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT25_ENABLE_Pos         25U                                          /*!< PMU CNTENSET: Event Counter 25 Enable Set Position */
+#define PMU_CNTENSET_CNT25_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT25_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 25 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT26_ENABLE_Pos         26U                                          /*!< PMU CNTENSET: Event Counter 26 Enable Set Position */
+#define PMU_CNTENSET_CNT26_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT26_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 26 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT27_ENABLE_Pos         27U                                          /*!< PMU CNTENSET: Event Counter 27 Enable Set Position */
+#define PMU_CNTENSET_CNT27_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT27_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 27 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT28_ENABLE_Pos         28U                                          /*!< PMU CNTENSET: Event Counter 28 Enable Set Position */
+#define PMU_CNTENSET_CNT28_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT28_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 28 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT29_ENABLE_Pos         29U                                          /*!< PMU CNTENSET: Event Counter 29 Enable Set Position */
+#define PMU_CNTENSET_CNT29_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT29_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 29 Enable Set Mask */
+
+#define PMU_CNTENSET_CNT30_ENABLE_Pos         30U                                          /*!< PMU CNTENSET: Event Counter 30 Enable Set Position */
+#define PMU_CNTENSET_CNT30_ENABLE_Msk        (1UL << PMU_CNTENSET_CNT30_ENABLE_Pos)        /*!< PMU CNTENSET: Event Counter 30 Enable Set Mask */
+
+#define PMU_CNTENSET_CCNTR_ENABLE_Pos         31U                                          /*!< PMU CNTENSET: Cycle Counter Enable Set Position */
+#define PMU_CNTENSET_CCNTR_ENABLE_Msk        (1UL << PMU_CNTENSET_CCNTR_ENABLE_Pos)        /*!< PMU CNTENSET: Cycle Counter Enable Set Mask */
+
+/** \brief PMU Count Enable Clear Register Definitions */
+
+#define PMU_CNTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Position */
+#define PMU_CNTENCLR_CNT0_ENABLE_Msk         (1UL /*<< PMU_CNTENCLR_CNT0_ENABLE_Pos*/)     /*!< PMU CNTENCLR: Event Counter 0 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT1_ENABLE_Pos          1U                                           /*!< PMU CNTENCLR: Event Counter 1 Enable Clear Position */
+#define PMU_CNTENCLR_CNT1_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT1_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 1 Enable Clear */
+
+#define PMU_CNTENCLR_CNT2_ENABLE_Pos          2U                                           /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Position */
+#define PMU_CNTENCLR_CNT2_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT2_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 2 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT3_ENABLE_Pos          3U                                           /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Position */
+#define PMU_CNTENCLR_CNT3_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT3_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 3 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT4_ENABLE_Pos          4U                                           /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Position */
+#define PMU_CNTENCLR_CNT4_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT4_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 4 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT5_ENABLE_Pos          5U                                           /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Position */
+#define PMU_CNTENCLR_CNT5_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT5_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 5 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT6_ENABLE_Pos          6U                                           /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Position */
+#define PMU_CNTENCLR_CNT6_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT6_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 6 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT7_ENABLE_Pos          7U                                           /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Position */
+#define PMU_CNTENCLR_CNT7_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT7_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 7 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT8_ENABLE_Pos          8U                                           /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Position */
+#define PMU_CNTENCLR_CNT8_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT8_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 8 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT9_ENABLE_Pos          9U                                           /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Position */
+#define PMU_CNTENCLR_CNT9_ENABLE_Msk         (1UL << PMU_CNTENCLR_CNT9_ENABLE_Pos)         /*!< PMU CNTENCLR: Event Counter 9 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT10_ENABLE_Pos         10U                                          /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Position */
+#define PMU_CNTENCLR_CNT10_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT10_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 10 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT11_ENABLE_Pos         11U                                          /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Position */
+#define PMU_CNTENCLR_CNT11_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT11_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 11 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT12_ENABLE_Pos         12U                                          /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Position */
+#define PMU_CNTENCLR_CNT12_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT12_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 12 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT13_ENABLE_Pos         13U                                          /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Position */
+#define PMU_CNTENCLR_CNT13_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT13_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 13 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT14_ENABLE_Pos         14U                                          /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Position */
+#define PMU_CNTENCLR_CNT14_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT14_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 14 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT15_ENABLE_Pos         15U                                          /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Position */
+#define PMU_CNTENCLR_CNT15_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT15_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 15 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT16_ENABLE_Pos         16U                                          /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Position */
+#define PMU_CNTENCLR_CNT16_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT16_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 16 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT17_ENABLE_Pos         17U                                          /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Position */
+#define PMU_CNTENCLR_CNT17_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT17_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 17 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT18_ENABLE_Pos         18U                                          /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Position */
+#define PMU_CNTENCLR_CNT18_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT18_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 18 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT19_ENABLE_Pos         19U                                          /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Position */
+#define PMU_CNTENCLR_CNT19_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT19_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 19 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT20_ENABLE_Pos         20U                                          /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Position */
+#define PMU_CNTENCLR_CNT20_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT20_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 20 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT21_ENABLE_Pos         21U                                          /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Position */
+#define PMU_CNTENCLR_CNT21_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT21_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 21 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT22_ENABLE_Pos         22U                                          /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Position */
+#define PMU_CNTENCLR_CNT22_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT22_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 22 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT23_ENABLE_Pos         23U                                          /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Position */
+#define PMU_CNTENCLR_CNT23_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT23_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 23 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT24_ENABLE_Pos         24U                                          /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Position */
+#define PMU_CNTENCLR_CNT24_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT24_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 24 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT25_ENABLE_Pos         25U                                          /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Position */
+#define PMU_CNTENCLR_CNT25_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT25_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 25 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT26_ENABLE_Pos         26U                                          /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Position */
+#define PMU_CNTENCLR_CNT26_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT26_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 26 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT27_ENABLE_Pos         27U                                          /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Position */
+#define PMU_CNTENCLR_CNT27_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT27_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 27 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT28_ENABLE_Pos         28U                                          /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Position */
+#define PMU_CNTENCLR_CNT28_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT28_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 28 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT29_ENABLE_Pos         29U                                          /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Position */
+#define PMU_CNTENCLR_CNT29_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT29_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 29 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CNT30_ENABLE_Pos         30U                                          /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Position */
+#define PMU_CNTENCLR_CNT30_ENABLE_Msk        (1UL << PMU_CNTENCLR_CNT30_ENABLE_Pos)        /*!< PMU CNTENCLR: Event Counter 30 Enable Clear Mask */
+
+#define PMU_CNTENCLR_CCNTR_ENABLE_Pos         31U                                          /*!< PMU CNTENCLR: Cycle Counter Enable Clear Position */
+#define PMU_CNTENCLR_CCNTR_ENABLE_Msk        (1UL << PMU_CNTENCLR_CCNTR_ENABLE_Pos)        /*!< PMU CNTENCLR: Cycle Counter Enable Clear Mask */
+
+/** \brief PMU Interrupt Enable Set Register Definitions */
+
+#define PMU_INTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT0_ENABLE_Msk         (1UL /*<< PMU_INTENSET_CNT0_ENABLE_Pos*/)     /*!< PMU INTENSET: Event Counter 0 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT1_ENABLE_Pos          1U                                           /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT1_ENABLE_Msk         (1UL << PMU_INTENSET_CNT1_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 1 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT2_ENABLE_Pos          2U                                           /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT2_ENABLE_Msk         (1UL << PMU_INTENSET_CNT2_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 2 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT3_ENABLE_Pos          3U                                           /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT3_ENABLE_Msk         (1UL << PMU_INTENSET_CNT3_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 3 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT4_ENABLE_Pos          4U                                           /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT4_ENABLE_Msk         (1UL << PMU_INTENSET_CNT4_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 4 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT5_ENABLE_Pos          5U                                           /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT5_ENABLE_Msk         (1UL << PMU_INTENSET_CNT5_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 5 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT6_ENABLE_Pos          6U                                           /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT6_ENABLE_Msk         (1UL << PMU_INTENSET_CNT6_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 6 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT7_ENABLE_Pos          7U                                           /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT7_ENABLE_Msk         (1UL << PMU_INTENSET_CNT7_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 7 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT8_ENABLE_Pos          8U                                           /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT8_ENABLE_Msk         (1UL << PMU_INTENSET_CNT8_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 8 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT9_ENABLE_Pos          9U                                           /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT9_ENABLE_Msk         (1UL << PMU_INTENSET_CNT9_ENABLE_Pos)         /*!< PMU INTENSET: Event Counter 9 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT10_ENABLE_Pos         10U                                          /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT10_ENABLE_Msk        (1UL << PMU_INTENSET_CNT10_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 10 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT11_ENABLE_Pos         11U                                          /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT11_ENABLE_Msk        (1UL << PMU_INTENSET_CNT11_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 11 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT12_ENABLE_Pos         12U                                          /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT12_ENABLE_Msk        (1UL << PMU_INTENSET_CNT12_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 12 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT13_ENABLE_Pos         13U                                          /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT13_ENABLE_Msk        (1UL << PMU_INTENSET_CNT13_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 13 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT14_ENABLE_Pos         14U                                          /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT14_ENABLE_Msk        (1UL << PMU_INTENSET_CNT14_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 14 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT15_ENABLE_Pos         15U                                          /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT15_ENABLE_Msk        (1UL << PMU_INTENSET_CNT15_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 15 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT16_ENABLE_Pos         16U                                          /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT16_ENABLE_Msk        (1UL << PMU_INTENSET_CNT16_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 16 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT17_ENABLE_Pos         17U                                          /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT17_ENABLE_Msk        (1UL << PMU_INTENSET_CNT17_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 17 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT18_ENABLE_Pos         18U                                          /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT18_ENABLE_Msk        (1UL << PMU_INTENSET_CNT18_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 18 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT19_ENABLE_Pos         19U                                          /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT19_ENABLE_Msk        (1UL << PMU_INTENSET_CNT19_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 19 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT20_ENABLE_Pos         20U                                          /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT20_ENABLE_Msk        (1UL << PMU_INTENSET_CNT20_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 20 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT21_ENABLE_Pos         21U                                          /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT21_ENABLE_Msk        (1UL << PMU_INTENSET_CNT21_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 21 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT22_ENABLE_Pos         22U                                          /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT22_ENABLE_Msk        (1UL << PMU_INTENSET_CNT22_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 22 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT23_ENABLE_Pos         23U                                          /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT23_ENABLE_Msk        (1UL << PMU_INTENSET_CNT23_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 23 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT24_ENABLE_Pos         24U                                          /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT24_ENABLE_Msk        (1UL << PMU_INTENSET_CNT24_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 24 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT25_ENABLE_Pos         25U                                          /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT25_ENABLE_Msk        (1UL << PMU_INTENSET_CNT25_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 25 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT26_ENABLE_Pos         26U                                          /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT26_ENABLE_Msk        (1UL << PMU_INTENSET_CNT26_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 26 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT27_ENABLE_Pos         27U                                          /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT27_ENABLE_Msk        (1UL << PMU_INTENSET_CNT27_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 27 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT28_ENABLE_Pos         28U                                          /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT28_ENABLE_Msk        (1UL << PMU_INTENSET_CNT28_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 28 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT29_ENABLE_Pos         29U                                          /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT29_ENABLE_Msk        (1UL << PMU_INTENSET_CNT29_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 29 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CNT30_ENABLE_Pos         30U                                          /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Position */
+#define PMU_INTENSET_CNT30_ENABLE_Msk        (1UL << PMU_INTENSET_CNT30_ENABLE_Pos)        /*!< PMU INTENSET: Event Counter 30 Interrupt Enable Set Mask */
+
+#define PMU_INTENSET_CYCCNT_ENABLE_Pos        31U                                          /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Position */
+#define PMU_INTENSET_CCYCNT_ENABLE_Msk       (1UL << PMU_INTENSET_CYCCNT_ENABLE_Pos)       /*!< PMU INTENSET: Cycle Counter Interrupt Enable Set Mask */
+
+/** \brief PMU Interrupt Enable Clear Register Definitions */
+
+#define PMU_INTENSET_CNT0_ENABLE_Pos          0U                                           /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT0_ENABLE_Msk         (1UL /*<< PMU_INTENCLR_CNT0_ENABLE_Pos*/)     /*!< PMU INTENCLR: Event Counter 0 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT1_ENABLE_Pos          1U                                           /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT1_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT1_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 1 Interrupt Enable Clear */
+
+#define PMU_INTENCLR_CNT2_ENABLE_Pos          2U                                           /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT2_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT2_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 2 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT3_ENABLE_Pos          3U                                           /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT3_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT3_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 3 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT4_ENABLE_Pos          4U                                           /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT4_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT4_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 4 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT5_ENABLE_Pos          5U                                           /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT5_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT5_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 5 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT6_ENABLE_Pos          6U                                           /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT6_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT6_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 6 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT7_ENABLE_Pos          7U                                           /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT7_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT7_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 7 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT8_ENABLE_Pos          8U                                           /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT8_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT8_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 8 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT9_ENABLE_Pos          9U                                           /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT9_ENABLE_Msk         (1UL << PMU_INTENCLR_CNT9_ENABLE_Pos)         /*!< PMU INTENCLR: Event Counter 9 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT10_ENABLE_Pos         10U                                          /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT10_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT10_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 10 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT11_ENABLE_Pos         11U                                          /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT11_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT11_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 11 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT12_ENABLE_Pos         12U                                          /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT12_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT12_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 12 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT13_ENABLE_Pos         13U                                          /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT13_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT13_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 13 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT14_ENABLE_Pos         14U                                          /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT14_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT14_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 14 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT15_ENABLE_Pos         15U                                          /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT15_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT15_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 15 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT16_ENABLE_Pos         16U                                          /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT16_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT16_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 16 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT17_ENABLE_Pos         17U                                          /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT17_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT17_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 17 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT18_ENABLE_Pos         18U                                          /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT18_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT18_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 18 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT19_ENABLE_Pos         19U                                          /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT19_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT19_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 19 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT20_ENABLE_Pos         20U                                          /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT20_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT20_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 20 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT21_ENABLE_Pos         21U                                          /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT21_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT21_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 21 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT22_ENABLE_Pos         22U                                          /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT22_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT22_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 22 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT23_ENABLE_Pos         23U                                          /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT23_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT23_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 23 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT24_ENABLE_Pos         24U                                          /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT24_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT24_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 24 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT25_ENABLE_Pos         25U                                          /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT25_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT25_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 25 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT26_ENABLE_Pos         26U                                          /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT26_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT26_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 26 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT27_ENABLE_Pos         27U                                          /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT27_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT27_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 27 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT28_ENABLE_Pos         28U                                          /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT28_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT28_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 28 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT29_ENABLE_Pos         29U                                          /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT29_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT29_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 29 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CNT30_ENABLE_Pos         30U                                          /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CNT30_ENABLE_Msk        (1UL << PMU_INTENCLR_CNT30_ENABLE_Pos)        /*!< PMU INTENCLR: Event Counter 30 Interrupt Enable Clear Mask */
+
+#define PMU_INTENCLR_CYCCNT_ENABLE_Pos        31U                                          /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Position */
+#define PMU_INTENCLR_CYCCNT_ENABLE_Msk       (1UL << PMU_INTENCLR_CYCCNT_ENABLE_Pos)       /*!< PMU INTENCLR: Cycle Counter Interrupt Enable Clear Mask */
+
+/** \brief PMU Overflow Flag Status Set Register Definitions */
+
+#define PMU_OVSSET_CNT0_STATUS_Pos            0U                                           /*!< PMU OVSSET: Event Counter 0 Overflow Set Position */
+#define PMU_OVSSET_CNT0_STATUS_Msk           (1UL /*<< PMU_OVSSET_CNT0_STATUS_Pos*/)       /*!< PMU OVSSET: Event Counter 0 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT1_STATUS_Pos            1U                                           /*!< PMU OVSSET: Event Counter 1 Overflow Set Position */
+#define PMU_OVSSET_CNT1_STATUS_Msk           (1UL << PMU_OVSSET_CNT1_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 1 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT2_STATUS_Pos            2U                                           /*!< PMU OVSSET: Event Counter 2 Overflow Set Position */
+#define PMU_OVSSET_CNT2_STATUS_Msk           (1UL << PMU_OVSSET_CNT2_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 2 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT3_STATUS_Pos            3U                                           /*!< PMU OVSSET: Event Counter 3 Overflow Set Position */
+#define PMU_OVSSET_CNT3_STATUS_Msk           (1UL << PMU_OVSSET_CNT3_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 3 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT4_STATUS_Pos            4U                                           /*!< PMU OVSSET: Event Counter 4 Overflow Set Position */
+#define PMU_OVSSET_CNT4_STATUS_Msk           (1UL << PMU_OVSSET_CNT4_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 4 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT5_STATUS_Pos            5U                                           /*!< PMU OVSSET: Event Counter 5 Overflow Set Position */
+#define PMU_OVSSET_CNT5_STATUS_Msk           (1UL << PMU_OVSSET_CNT5_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 5 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT6_STATUS_Pos            6U                                           /*!< PMU OVSSET: Event Counter 6 Overflow Set Position */
+#define PMU_OVSSET_CNT6_STATUS_Msk           (1UL << PMU_OVSSET_CNT6_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 6 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT7_STATUS_Pos            7U                                           /*!< PMU OVSSET: Event Counter 7 Overflow Set Position */
+#define PMU_OVSSET_CNT7_STATUS_Msk           (1UL << PMU_OVSSET_CNT7_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 7 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT8_STATUS_Pos            8U                                           /*!< PMU OVSSET: Event Counter 8 Overflow Set Position */
+#define PMU_OVSSET_CNT8_STATUS_Msk           (1UL << PMU_OVSSET_CNT8_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 8 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT9_STATUS_Pos            9U                                           /*!< PMU OVSSET: Event Counter 9 Overflow Set Position */
+#define PMU_OVSSET_CNT9_STATUS_Msk           (1UL << PMU_OVSSET_CNT9_STATUS_Pos)           /*!< PMU OVSSET: Event Counter 9 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT10_STATUS_Pos           10U                                          /*!< PMU OVSSET: Event Counter 10 Overflow Set Position */
+#define PMU_OVSSET_CNT10_STATUS_Msk          (1UL << PMU_OVSSET_CNT10_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 10 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT11_STATUS_Pos           11U                                          /*!< PMU OVSSET: Event Counter 11 Overflow Set Position */
+#define PMU_OVSSET_CNT11_STATUS_Msk          (1UL << PMU_OVSSET_CNT11_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 11 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT12_STATUS_Pos           12U                                          /*!< PMU OVSSET: Event Counter 12 Overflow Set Position */
+#define PMU_OVSSET_CNT12_STATUS_Msk          (1UL << PMU_OVSSET_CNT12_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 12 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT13_STATUS_Pos           13U                                          /*!< PMU OVSSET: Event Counter 13 Overflow Set Position */
+#define PMU_OVSSET_CNT13_STATUS_Msk          (1UL << PMU_OVSSET_CNT13_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 13 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT14_STATUS_Pos           14U                                          /*!< PMU OVSSET: Event Counter 14 Overflow Set Position */
+#define PMU_OVSSET_CNT14_STATUS_Msk          (1UL << PMU_OVSSET_CNT14_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 14 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT15_STATUS_Pos           15U                                          /*!< PMU OVSSET: Event Counter 15 Overflow Set Position */
+#define PMU_OVSSET_CNT15_STATUS_Msk          (1UL << PMU_OVSSET_CNT15_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 15 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT16_STATUS_Pos           16U                                          /*!< PMU OVSSET: Event Counter 16 Overflow Set Position */
+#define PMU_OVSSET_CNT16_STATUS_Msk          (1UL << PMU_OVSSET_CNT16_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 16 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT17_STATUS_Pos           17U                                          /*!< PMU OVSSET: Event Counter 17 Overflow Set Position */
+#define PMU_OVSSET_CNT17_STATUS_Msk          (1UL << PMU_OVSSET_CNT17_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 17 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT18_STATUS_Pos           18U                                          /*!< PMU OVSSET: Event Counter 18 Overflow Set Position */
+#define PMU_OVSSET_CNT18_STATUS_Msk          (1UL << PMU_OVSSET_CNT18_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 18 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT19_STATUS_Pos           19U                                          /*!< PMU OVSSET: Event Counter 19 Overflow Set Position */
+#define PMU_OVSSET_CNT19_STATUS_Msk          (1UL << PMU_OVSSET_CNT19_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 19 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT20_STATUS_Pos           20U                                          /*!< PMU OVSSET: Event Counter 20 Overflow Set Position */
+#define PMU_OVSSET_CNT20_STATUS_Msk          (1UL << PMU_OVSSET_CNT20_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 20 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT21_STATUS_Pos           21U                                          /*!< PMU OVSSET: Event Counter 21 Overflow Set Position */
+#define PMU_OVSSET_CNT21_STATUS_Msk          (1UL << PMU_OVSSET_CNT21_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 21 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT22_STATUS_Pos           22U                                          /*!< PMU OVSSET: Event Counter 22 Overflow Set Position */
+#define PMU_OVSSET_CNT22_STATUS_Msk          (1UL << PMU_OVSSET_CNT22_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 22 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT23_STATUS_Pos           23U                                          /*!< PMU OVSSET: Event Counter 23 Overflow Set Position */
+#define PMU_OVSSET_CNT23_STATUS_Msk          (1UL << PMU_OVSSET_CNT23_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 23 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT24_STATUS_Pos           24U                                          /*!< PMU OVSSET: Event Counter 24 Overflow Set Position */
+#define PMU_OVSSET_CNT24_STATUS_Msk          (1UL << PMU_OVSSET_CNT24_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 24 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT25_STATUS_Pos           25U                                          /*!< PMU OVSSET: Event Counter 25 Overflow Set Position */
+#define PMU_OVSSET_CNT25_STATUS_Msk          (1UL << PMU_OVSSET_CNT25_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 25 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT26_STATUS_Pos           26U                                          /*!< PMU OVSSET: Event Counter 26 Overflow Set Position */
+#define PMU_OVSSET_CNT26_STATUS_Msk          (1UL << PMU_OVSSET_CNT26_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 26 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT27_STATUS_Pos           27U                                          /*!< PMU OVSSET: Event Counter 27 Overflow Set Position */
+#define PMU_OVSSET_CNT27_STATUS_Msk          (1UL << PMU_OVSSET_CNT27_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 27 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT28_STATUS_Pos           28U                                          /*!< PMU OVSSET: Event Counter 28 Overflow Set Position */
+#define PMU_OVSSET_CNT28_STATUS_Msk          (1UL << PMU_OVSSET_CNT28_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 28 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT29_STATUS_Pos           29U                                          /*!< PMU OVSSET: Event Counter 29 Overflow Set Position */
+#define PMU_OVSSET_CNT29_STATUS_Msk          (1UL << PMU_OVSSET_CNT29_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 29 Overflow Set Mask */
+
+#define PMU_OVSSET_CNT30_STATUS_Pos           30U                                          /*!< PMU OVSSET: Event Counter 30 Overflow Set Position */
+#define PMU_OVSSET_CNT30_STATUS_Msk          (1UL << PMU_OVSSET_CNT30_STATUS_Pos)          /*!< PMU OVSSET: Event Counter 30 Overflow Set Mask */
+
+#define PMU_OVSSET_CYCCNT_STATUS_Pos          31U                                          /*!< PMU OVSSET: Cycle Counter Overflow Set Position */
+#define PMU_OVSSET_CYCCNT_STATUS_Msk         (1UL << PMU_OVSSET_CYCCNT_STATUS_Pos)         /*!< PMU OVSSET: Cycle Counter Overflow Set Mask */
+
+/** \brief PMU Overflow Flag Status Clear Register Definitions */
+
+#define PMU_OVSCLR_CNT0_STATUS_Pos            0U                                           /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Position */
+#define PMU_OVSCLR_CNT0_STATUS_Msk           (1UL /*<< PMU_OVSCLR_CNT0_STATUS_Pos*/)       /*!< PMU OVSCLR: Event Counter 0 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT1_STATUS_Pos            1U                                           /*!< PMU OVSCLR: Event Counter 1 Overflow Clear Position */
+#define PMU_OVSCLR_CNT1_STATUS_Msk           (1UL << PMU_OVSCLR_CNT1_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 1 Overflow Clear */
+
+#define PMU_OVSCLR_CNT2_STATUS_Pos            2U                                           /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Position */
+#define PMU_OVSCLR_CNT2_STATUS_Msk           (1UL << PMU_OVSCLR_CNT2_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 2 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT3_STATUS_Pos            3U                                           /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Position */
+#define PMU_OVSCLR_CNT3_STATUS_Msk           (1UL << PMU_OVSCLR_CNT3_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 3 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT4_STATUS_Pos            4U                                           /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Position */
+#define PMU_OVSCLR_CNT4_STATUS_Msk           (1UL << PMU_OVSCLR_CNT4_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 4 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT5_STATUS_Pos            5U                                           /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Position */
+#define PMU_OVSCLR_CNT5_STATUS_Msk           (1UL << PMU_OVSCLR_CNT5_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 5 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT6_STATUS_Pos            6U                                           /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Position */
+#define PMU_OVSCLR_CNT6_STATUS_Msk           (1UL << PMU_OVSCLR_CNT6_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 6 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT7_STATUS_Pos            7U                                           /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Position */
+#define PMU_OVSCLR_CNT7_STATUS_Msk           (1UL << PMU_OVSCLR_CNT7_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 7 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT8_STATUS_Pos            8U                                           /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Position */
+#define PMU_OVSCLR_CNT8_STATUS_Msk           (1UL << PMU_OVSCLR_CNT8_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 8 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT9_STATUS_Pos            9U                                           /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Position */
+#define PMU_OVSCLR_CNT9_STATUS_Msk           (1UL << PMU_OVSCLR_CNT9_STATUS_Pos)           /*!< PMU OVSCLR: Event Counter 9 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT10_STATUS_Pos           10U                                          /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Position */
+#define PMU_OVSCLR_CNT10_STATUS_Msk          (1UL << PMU_OVSCLR_CNT10_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 10 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT11_STATUS_Pos           11U                                          /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Position */
+#define PMU_OVSCLR_CNT11_STATUS_Msk          (1UL << PMU_OVSCLR_CNT11_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 11 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT12_STATUS_Pos           12U                                          /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Position */
+#define PMU_OVSCLR_CNT12_STATUS_Msk          (1UL << PMU_OVSCLR_CNT12_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 12 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT13_STATUS_Pos           13U                                          /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Position */
+#define PMU_OVSCLR_CNT13_STATUS_Msk          (1UL << PMU_OVSCLR_CNT13_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 13 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT14_STATUS_Pos           14U                                          /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Position */
+#define PMU_OVSCLR_CNT14_STATUS_Msk          (1UL << PMU_OVSCLR_CNT14_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 14 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT15_STATUS_Pos           15U                                          /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Position */
+#define PMU_OVSCLR_CNT15_STATUS_Msk          (1UL << PMU_OVSCLR_CNT15_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 15 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT16_STATUS_Pos           16U                                          /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Position */
+#define PMU_OVSCLR_CNT16_STATUS_Msk          (1UL << PMU_OVSCLR_CNT16_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 16 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT17_STATUS_Pos           17U                                          /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Position */
+#define PMU_OVSCLR_CNT17_STATUS_Msk          (1UL << PMU_OVSCLR_CNT17_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 17 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT18_STATUS_Pos           18U                                          /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Position */
+#define PMU_OVSCLR_CNT18_STATUS_Msk          (1UL << PMU_OVSCLR_CNT18_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 18 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT19_STATUS_Pos           19U                                          /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Position */
+#define PMU_OVSCLR_CNT19_STATUS_Msk          (1UL << PMU_OVSCLR_CNT19_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 19 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT20_STATUS_Pos           20U                                          /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Position */
+#define PMU_OVSCLR_CNT20_STATUS_Msk          (1UL << PMU_OVSCLR_CNT20_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 20 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT21_STATUS_Pos           21U                                          /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Position */
+#define PMU_OVSCLR_CNT21_STATUS_Msk          (1UL << PMU_OVSCLR_CNT21_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 21 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT22_STATUS_Pos           22U                                          /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Position */
+#define PMU_OVSCLR_CNT22_STATUS_Msk          (1UL << PMU_OVSCLR_CNT22_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 22 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT23_STATUS_Pos           23U                                          /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Position */
+#define PMU_OVSCLR_CNT23_STATUS_Msk          (1UL << PMU_OVSCLR_CNT23_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 23 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT24_STATUS_Pos           24U                                          /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Position */
+#define PMU_OVSCLR_CNT24_STATUS_Msk          (1UL << PMU_OVSCLR_CNT24_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 24 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT25_STATUS_Pos           25U                                          /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Position */
+#define PMU_OVSCLR_CNT25_STATUS_Msk          (1UL << PMU_OVSCLR_CNT25_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 25 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT26_STATUS_Pos           26U                                          /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Position */
+#define PMU_OVSCLR_CNT26_STATUS_Msk          (1UL << PMU_OVSCLR_CNT26_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 26 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT27_STATUS_Pos           27U                                          /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Position */
+#define PMU_OVSCLR_CNT27_STATUS_Msk          (1UL << PMU_OVSCLR_CNT27_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 27 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT28_STATUS_Pos           28U                                          /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Position */
+#define PMU_OVSCLR_CNT28_STATUS_Msk          (1UL << PMU_OVSCLR_CNT28_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 28 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT29_STATUS_Pos           29U                                          /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Position */
+#define PMU_OVSCLR_CNT29_STATUS_Msk          (1UL << PMU_OVSCLR_CNT29_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 29 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CNT30_STATUS_Pos           30U                                          /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Position */
+#define PMU_OVSCLR_CNT30_STATUS_Msk          (1UL << PMU_OVSCLR_CNT30_STATUS_Pos)          /*!< PMU OVSCLR: Event Counter 30 Overflow Clear Mask */
+
+#define PMU_OVSCLR_CYCCNT_STATUS_Pos          31U                                          /*!< PMU OVSCLR: Cycle Counter Overflow Clear Position */
+#define PMU_OVSCLR_CYCCNT_STATUS_Msk         (1UL << PMU_OVSCLR_CYCCNT_STATUS_Pos)         /*!< PMU OVSCLR: Cycle Counter Overflow Clear Mask */
+
+/** \brief PMU Software Increment Counter */
+
+#define PMU_SWINC_CNT0_Pos                    0U                                           /*!< PMU SWINC: Event Counter 0 Software Increment Position */
+#define PMU_SWINC_CNT0_Msk                   (1UL /*<< PMU_SWINC_CNT0_Pos */)              /*!< PMU SWINC: Event Counter 0 Software Increment Mask */
+
+#define PMU_SWINC_CNT1_Pos                    1U                                           /*!< PMU SWINC: Event Counter 1 Software Increment Position */
+#define PMU_SWINC_CNT1_Msk                   (1UL << PMU_SWINC_CNT1_Pos)                   /*!< PMU SWINC: Event Counter 1 Software Increment Mask */
+
+#define PMU_SWINC_CNT2_Pos                    2U                                           /*!< PMU SWINC: Event Counter 2 Software Increment Position */
+#define PMU_SWINC_CNT2_Msk                   (1UL << PMU_SWINC_CNT2_Pos)                   /*!< PMU SWINC: Event Counter 2 Software Increment Mask */
+
+#define PMU_SWINC_CNT3_Pos                    3U                                           /*!< PMU SWINC: Event Counter 3 Software Increment Position */
+#define PMU_SWINC_CNT3_Msk                   (1UL << PMU_SWINC_CNT3_Pos)                   /*!< PMU SWINC: Event Counter 3 Software Increment Mask */
+
+#define PMU_SWINC_CNT4_Pos                    4U                                           /*!< PMU SWINC: Event Counter 4 Software Increment Position */
+#define PMU_SWINC_CNT4_Msk                   (1UL << PMU_SWINC_CNT4_Pos)                   /*!< PMU SWINC: Event Counter 4 Software Increment Mask */
+
+#define PMU_SWINC_CNT5_Pos                    5U                                           /*!< PMU SWINC: Event Counter 5 Software Increment Position */
+#define PMU_SWINC_CNT5_Msk                   (1UL << PMU_SWINC_CNT5_Pos)                   /*!< PMU SWINC: Event Counter 5 Software Increment Mask */
+
+#define PMU_SWINC_CNT6_Pos                    6U                                           /*!< PMU SWINC: Event Counter 6 Software Increment Position */
+#define PMU_SWINC_CNT6_Msk                   (1UL << PMU_SWINC_CNT6_Pos)                   /*!< PMU SWINC: Event Counter 6 Software Increment Mask */
+
+#define PMU_SWINC_CNT7_Pos                    7U                                           /*!< PMU SWINC: Event Counter 7 Software Increment Position */
+#define PMU_SWINC_CNT7_Msk                   (1UL << PMU_SWINC_CNT7_Pos)                   /*!< PMU SWINC: Event Counter 7 Software Increment Mask */
+
+#define PMU_SWINC_CNT8_Pos                    8U                                           /*!< PMU SWINC: Event Counter 8 Software Increment Position */
+#define PMU_SWINC_CNT8_Msk                   (1UL << PMU_SWINC_CNT8_Pos)                   /*!< PMU SWINC: Event Counter 8 Software Increment Mask */
+
+#define PMU_SWINC_CNT9_Pos                    9U                                           /*!< PMU SWINC: Event Counter 9 Software Increment Position */
+#define PMU_SWINC_CNT9_Msk                   (1UL << PMU_SWINC_CNT9_Pos)                   /*!< PMU SWINC: Event Counter 9 Software Increment Mask */
+
+#define PMU_SWINC_CNT10_Pos                   10U                                          /*!< PMU SWINC: Event Counter 10 Software Increment Position */
+#define PMU_SWINC_CNT10_Msk                  (1UL << PMU_SWINC_CNT10_Pos)                  /*!< PMU SWINC: Event Counter 10 Software Increment Mask */
+
+#define PMU_SWINC_CNT11_Pos                   11U                                          /*!< PMU SWINC: Event Counter 11 Software Increment Position */
+#define PMU_SWINC_CNT11_Msk                  (1UL << PMU_SWINC_CNT11_Pos)                  /*!< PMU SWINC: Event Counter 11 Software Increment Mask */
+
+#define PMU_SWINC_CNT12_Pos                   12U                                          /*!< PMU SWINC: Event Counter 12 Software Increment Position */
+#define PMU_SWINC_CNT12_Msk                  (1UL << PMU_SWINC_CNT12_Pos)                  /*!< PMU SWINC: Event Counter 12 Software Increment Mask */
+
+#define PMU_SWINC_CNT13_Pos                   13U                                          /*!< PMU SWINC: Event Counter 13 Software Increment Position */
+#define PMU_SWINC_CNT13_Msk                  (1UL << PMU_SWINC_CNT13_Pos)                  /*!< PMU SWINC: Event Counter 13 Software Increment Mask */
+
+#define PMU_SWINC_CNT14_Pos                   14U                                          /*!< PMU SWINC: Event Counter 14 Software Increment Position */
+#define PMU_SWINC_CNT14_Msk                  (1UL << PMU_SWINC_CNT14_Pos)                  /*!< PMU SWINC: Event Counter 14 Software Increment Mask */
+
+#define PMU_SWINC_CNT15_Pos                   15U                                          /*!< PMU SWINC: Event Counter 15 Software Increment Position */
+#define PMU_SWINC_CNT15_Msk                  (1UL << PMU_SWINC_CNT15_Pos)                  /*!< PMU SWINC: Event Counter 15 Software Increment Mask */
+
+#define PMU_SWINC_CNT16_Pos                   16U                                          /*!< PMU SWINC: Event Counter 16 Software Increment Position */
+#define PMU_SWINC_CNT16_Msk                  (1UL << PMU_SWINC_CNT16_Pos)                  /*!< PMU SWINC: Event Counter 16 Software Increment Mask */
+
+#define PMU_SWINC_CNT17_Pos                   17U                                          /*!< PMU SWINC: Event Counter 17 Software Increment Position */
+#define PMU_SWINC_CNT17_Msk                  (1UL << PMU_SWINC_CNT17_Pos)                  /*!< PMU SWINC: Event Counter 17 Software Increment Mask */
+
+#define PMU_SWINC_CNT18_Pos                   18U                                          /*!< PMU SWINC: Event Counter 18 Software Increment Position */
+#define PMU_SWINC_CNT18_Msk                  (1UL << PMU_SWINC_CNT18_Pos)                  /*!< PMU SWINC: Event Counter 18 Software Increment Mask */
+
+#define PMU_SWINC_CNT19_Pos                   19U                                          /*!< PMU SWINC: Event Counter 19 Software Increment Position */
+#define PMU_SWINC_CNT19_Msk                  (1UL << PMU_SWINC_CNT19_Pos)                  /*!< PMU SWINC: Event Counter 19 Software Increment Mask */
+
+#define PMU_SWINC_CNT20_Pos                   20U                                          /*!< PMU SWINC: Event Counter 20 Software Increment Position */
+#define PMU_SWINC_CNT20_Msk                  (1UL << PMU_SWINC_CNT20_Pos)                  /*!< PMU SWINC: Event Counter 20 Software Increment Mask */
+
+#define PMU_SWINC_CNT21_Pos                   21U                                          /*!< PMU SWINC: Event Counter 21 Software Increment Position */
+#define PMU_SWINC_CNT21_Msk                  (1UL << PMU_SWINC_CNT21_Pos)                  /*!< PMU SWINC: Event Counter 21 Software Increment Mask */
+
+#define PMU_SWINC_CNT22_Pos                   22U                                          /*!< PMU SWINC: Event Counter 22 Software Increment Position */
+#define PMU_SWINC_CNT22_Msk                  (1UL << PMU_SWINC_CNT22_Pos)                  /*!< PMU SWINC: Event Counter 22 Software Increment Mask */
+
+#define PMU_SWINC_CNT23_Pos                   23U                                          /*!< PMU SWINC: Event Counter 23 Software Increment Position */
+#define PMU_SWINC_CNT23_Msk                  (1UL << PMU_SWINC_CNT23_Pos)                  /*!< PMU SWINC: Event Counter 23 Software Increment Mask */
+
+#define PMU_SWINC_CNT24_Pos                   24U                                          /*!< PMU SWINC: Event Counter 24 Software Increment Position */
+#define PMU_SWINC_CNT24_Msk                  (1UL << PMU_SWINC_CNT24_Pos)                  /*!< PMU SWINC: Event Counter 24 Software Increment Mask */
+
+#define PMU_SWINC_CNT25_Pos                   25U                                          /*!< PMU SWINC: Event Counter 25 Software Increment Position */
+#define PMU_SWINC_CNT25_Msk                  (1UL << PMU_SWINC_CNT25_Pos)                  /*!< PMU SWINC: Event Counter 25 Software Increment Mask */
+
+#define PMU_SWINC_CNT26_Pos                   26U                                          /*!< PMU SWINC: Event Counter 26 Software Increment Position */
+#define PMU_SWINC_CNT26_Msk                  (1UL << PMU_SWINC_CNT26_Pos)                  /*!< PMU SWINC: Event Counter 26 Software Increment Mask */
+
+#define PMU_SWINC_CNT27_Pos                   27U                                          /*!< PMU SWINC: Event Counter 27 Software Increment Position */
+#define PMU_SWINC_CNT27_Msk                  (1UL << PMU_SWINC_CNT27_Pos)                  /*!< PMU SWINC: Event Counter 27 Software Increment Mask */
+
+#define PMU_SWINC_CNT28_Pos                   28U                                          /*!< PMU SWINC: Event Counter 28 Software Increment Position */
+#define PMU_SWINC_CNT28_Msk                  (1UL << PMU_SWINC_CNT28_Pos)                  /*!< PMU SWINC: Event Counter 28 Software Increment Mask */
+
+#define PMU_SWINC_CNT29_Pos                   29U                                          /*!< PMU SWINC: Event Counter 29 Software Increment Position */
+#define PMU_SWINC_CNT29_Msk                  (1UL << PMU_SWINC_CNT29_Pos)                  /*!< PMU SWINC: Event Counter 29 Software Increment Mask */
+
+#define PMU_SWINC_CNT30_Pos                   30U                                          /*!< PMU SWINC: Event Counter 30 Software Increment Position */
+#define PMU_SWINC_CNT30_Msk                  (1UL << PMU_SWINC_CNT30_Pos)                  /*!< PMU SWINC: Event Counter 30 Software Increment Mask */
+
+/** \brief PMU Control Register Definitions */
+
+#define PMU_CTRL_ENABLE_Pos                   0U                                           /*!< PMU CTRL: ENABLE Position */
+#define PMU_CTRL_ENABLE_Msk                  (1UL /*<< PMU_CTRL_ENABLE_Pos*/)              /*!< PMU CTRL: ENABLE Mask */
+
+#define PMU_CTRL_EVENTCNT_RESET_Pos           1U                                           /*!< PMU CTRL: Event Counter Reset Position */
+#define PMU_CTRL_EVENTCNT_RESET_Msk          (1UL << PMU_CTRL_EVENTCNT_RESET_Pos)          /*!< PMU CTRL: Event Counter Reset Mask */
+
+#define PMU_CTRL_CYCCNT_RESET_Pos             2U                                           /*!< PMU CTRL: Cycle Counter Reset Position */
+#define PMU_CTRL_CYCCNT_RESET_Msk            (1UL << PMU_CTRL_CYCCNT_RESET_Pos)            /*!< PMU CTRL: Cycle Counter Reset Mask */
+
+#define PMU_CTRL_CYCCNT_DISABLE_Pos           5U                                           /*!< PMU CTRL: Disable Cycle Counter Position */
+#define PMU_CTRL_CYCCNT_DISABLE_Msk          (1UL << PMU_CTRL_CYCCNT_DISABLE_Pos)          /*!< PMU CTRL: Disable Cycle Counter Mask */
+
+#define PMU_CTRL_FRZ_ON_OV_Pos                9U                                           /*!< PMU CTRL: Freeze-on-overflow Position */
+#define PMU_CTRL_FRZ_ON_OV_Msk               (1UL << PMU_CTRL_FRZ_ON_OVERFLOW_Pos)         /*!< PMU CTRL: Freeze-on-overflow Mask */
+
+#define PMU_CTRL_TRACE_ON_OV_Pos              11U                                          /*!< PMU CTRL: Trace-on-overflow Position */
+#define PMU_CTRL_TRACE_ON_OV_Msk             (1UL << PMU_CTRL_TRACE_ON_OVERFLOW_Pos)       /*!< PMU CTRL: Trace-on-overflow Mask */
+
+/** \brief PMU Type Register Definitions */
+
+#define PMU_TYPE_NUM_CNTS_Pos                 0U                                           /*!< PMU TYPE: Number of Counters Position */
+#define PMU_TYPE_NUM_CNTS_Msk                (0xFFUL /*<< PMU_TYPE_NUM_CNTS_Pos*/)         /*!< PMU TYPE: Number of Counters Mask */
+
+#define PMU_TYPE_SIZE_CNTS_Pos                8U                                           /*!< PMU TYPE: Size of Counters Position */
+#define PMU_TYPE_SIZE_CNTS_Msk               (0x3FUL << PMU_TYPE_SIZE_CNTS_Pos)            /*!< PMU TYPE: Size of Counters Mask */
+
+#define PMU_TYPE_CYCCNT_PRESENT_Pos           14U                                          /*!< PMU TYPE: Cycle Counter Present Position */
+#define PMU_TYPE_CYCCNT_PRESENT_Msk          (1UL << PMU_TYPE_CYCCNT_PRESENT_Pos)          /*!< PMU TYPE: Cycle Counter Present Mask */
+
+#define PMU_TYPE_FRZ_OV_SUPPORT_Pos           21U                                          /*!< PMU TYPE: Freeze-on-overflow Support Position */
+#define PMU_TYPE_FRZ_OV_SUPPORT_Msk          (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos)          /*!< PMU TYPE: Freeze-on-overflow Support Mask */
+
+#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Pos      23U                                          /*!< PMU TYPE: Trace-on-overflow Support Position */
+#define PMU_TYPE_TRACE_ON_OV_SUPPORT_Msk     (1UL << PMU_TYPE_FRZ_OV_SUPPORT_Pos)          /*!< PMU TYPE: Trace-on-overflow Support Mask */
+
+/** \brief PMU Authentication Status Register Definitions */
+
+#define PMU_AUTHSTATUS_NSID_Pos               0U                                           /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Position */
+#define PMU_AUTHSTATUS_NSID_Msk              (0x3UL /*<< PMU_AUTHSTATUS_NSID_Pos*/)        /*!< PMU AUTHSTATUS: Non-secure Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_NSNID_Pos              2U                                           /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_NSNID_Msk             (0x3UL << PMU_AUTHSTATUS_NSNID_Pos)           /*!< PMU AUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SID_Pos                4U                                           /*!< PMU AUTHSTATUS: Secure Invasive Debug Position */
+#define PMU_AUTHSTATUS_SID_Msk               (0x3UL << PMU_AUTHSTATUS_SID_Pos)             /*!< PMU AUTHSTATUS: Secure Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SNID_Pos               6U                                           /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_SNID_Msk              (0x3UL << PMU_AUTHSTATUS_SNID_Pos)            /*!< PMU AUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_NSUID_Pos              16U                                          /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Position */
+#define PMU_AUTHSTATUS_NSUID_Msk             (0x3UL << PMU_AUTHSTATUS_NSUID_Pos)           /*!< PMU AUTHSTATUS: Non-secure Unprivileged Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_NSUNID_Pos             18U                                          /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_NSUNID_Msk            (0x3UL << PMU_AUTHSTATUS_NSUNID_Pos)          /*!< PMU AUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SUID_Pos               20U                                          /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Position */
+#define PMU_AUTHSTATUS_SUID_Msk              (0x3UL << PMU_AUTHSTATUS_SUID_Pos)            /*!< PMU AUTHSTATUS: Secure Unprivileged Invasive Debug Mask */
+
+#define PMU_AUTHSTATUS_SUNID_Pos              22U                                          /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Position */
+#define PMU_AUTHSTATUS_SUNID_Msk             (0x3UL << PMU_AUTHSTATUS_SUNID_Pos)           /*!< PMU AUTHSTATUS: Secure Unprivileged Non-invasive Debug Mask */
+
+
+/*@} end of group CMSIS_PMU */
+#endif
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_PXN_Pos                    4U                                            /*!< MPU RLAR: PXN Position */
+#define MPU_RLAR_PXN_Msk                   (1UL << MPU_RLAR_PXN_Pos)                      /*!< MPU RLAR: PXN Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (7UL << MPU_RLAR_AttrIndx_Pos)                 /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and VFP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+#define FPU_FPDSCR_FZ16_Pos                19U                                            /*!< FPDSCR: FZ16 bit Position */
+#define FPU_FPDSCR_FZ16_Msk                (1UL << FPU_FPDSCR_FZ16_Pos)                   /*!< FPDSCR: FZ16 bit Mask */
+
+#define FPU_FPDSCR_LTPSIZE_Pos             16U                                            /*!< FPDSCR: LTPSIZE bit Position */
+#define FPU_FPDSCR_LTPSIZE_Msk             (7UL << FPU_FPDSCR_LTPSIZE_Pos)                /*!< FPDSCR: LTPSIZE bit Mask */
+
+/* Media and VFP Feature Register 0 Definitions */
+#define FPU_MVFR0_FPRound_Pos              28U                                            /*!< MVFR0: FPRound bits Position */
+#define FPU_MVFR0_FPRound_Msk              (0xFUL << FPU_MVFR0_FPRound_Pos)               /*!< MVFR0: FPRound bits Mask */
+
+#define FPU_MVFR0_FPSqrt_Pos               20U                                            /*!< MVFR0: FPSqrt bits Position */
+#define FPU_MVFR0_FPSqrt_Msk               (0xFUL << FPU_MVFR0_FPSqrt_Pos)                 /*!< MVFR0: FPSqrt bits Mask */
+
+#define FPU_MVFR0_FPDivide_Pos             16U                                            /*!< MVFR0: FPDivide bits Position */
+#define FPU_MVFR0_FPDivide_Msk             (0xFUL << FPU_MVFR0_FPDivide_Pos)              /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FPDP_Pos                  8U                                            /*!< MVFR0: FPDP bits Position */
+#define FPU_MVFR0_FPDP_Msk                 (0xFUL << FPU_MVFR0_FPDP_Pos)                  /*!< MVFR0: FPDP bits Mask */
+
+#define FPU_MVFR0_FPSP_Pos                  4U                                            /*!< MVFR0: FPSP bits Position */
+#define FPU_MVFR0_FPSP_Msk                 (0xFUL << FPU_MVFR0_FPSP_Pos)                  /*!< MVFR0: FPSP bits Mask */
+
+#define FPU_MVFR0_SIMDReg_Pos               0U                                            /*!< MVFR0: SIMDReg bits Position */
+#define FPU_MVFR0_SIMDReg_Msk              (0xFUL /*<< FPU_MVFR0_SIMDReg_Pos*/)           /*!< MVFR0: SIMDReg bits Mask */
+
+/* Media and VFP Feature Register 1 Definitions */
+#define FPU_MVFR1_FMAC_Pos                 28U                                            /*!< MVFR1: FMAC bits Position */
+#define FPU_MVFR1_FMAC_Msk                 (0xFUL << FPU_MVFR1_FMAC_Pos)                  /*!< MVFR1: FMAC bits Mask */
+
+#define FPU_MVFR1_FPHP_Pos                 24U                                            /*!< MVFR1: FPHP bits Position */
+#define FPU_MVFR1_FPHP_Msk                 (0xFUL << FPU_MVFR1_FPHP_Pos)                  /*!< MVFR1: FPHP bits Mask */
+
+#define FPU_MVFR1_FP16_Pos                 20U                                            /*!< MVFR1: FP16 bits Position */
+#define FPU_MVFR1_FP16_Msk                 (0xFUL << FPU_MVFR1_FP16_Pos)                  /*!< MVFR1: FP16 bits Mask */
+
+#define FPU_MVFR1_MVE_Pos                   8U                                            /*!< MVFR1: MVE bits Position */
+#define FPU_MVFR1_MVE_Msk                  (0xFUL << FPU_MVFR1_MVE_Pos)                   /*!< MVFR1: MVE bits Mask */
+
+#define FPU_MVFR1_FPDNaN_Pos                4U                                            /*!< MVFR1: FPDNaN bits Position */
+#define FPU_MVFR1_FPDNaN_Msk               (0xFUL << FPU_MVFR1_FPDNaN_Pos)                /*!< MVFR1: FPDNaN bits Mask */
+
+#define FPU_MVFR1_FPFtZ_Pos                 0U                                            /*!< MVFR1: FPFtZ bits Position */
+#define FPU_MVFR1_FPFtZ_Msk                (0xFUL /*<< FPU_MVFR1_FPFtZ_Pos*/)             /*!< MVFR1: FPFtZ bits Mask */
+
+/* Media and VFP Feature Register 2 Definitions */
+#define FPU_MVFR2_FPMisc_Pos                4U                                            /*!< MVFR2: FPMisc bits Position */
+#define FPU_MVFR2_FPMisc_Msk               (0xFUL << FPU_MVFR2_FPMisc_Pos)                /*!< MVFR2: FPMisc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+/* CoreDebug is deprecated. replaced by DCB (Debug Control Block) */
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  \deprecated Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __OM  uint32_t DSCEMCR;                /*!< Offset: 0x010 ( /W)  Debug Set Clear Exception and Monitor Control Register */
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< \deprecated CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< \deprecated CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< \deprecated CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< \deprecated CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< \deprecated CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_FPD_Pos          23U                                            /*!< \deprecated CoreDebug DHCSR: S_FPD Position */
+#define CoreDebug_DHCSR_S_FPD_Msk          (1UL << CoreDebug_DHCSR_S_FPD_Pos)             /*!< \deprecated CoreDebug DHCSR: S_FPD Mask */
+
+#define CoreDebug_DHCSR_S_SUIDE_Pos        22U                                            /*!< \deprecated CoreDebug DHCSR: S_SUIDE Position */
+#define CoreDebug_DHCSR_S_SUIDE_Msk        (1UL << CoreDebug_DHCSR_S_SUIDE_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SUIDE Mask */
+
+#define CoreDebug_DHCSR_S_NSUIDE_Pos       21U                                            /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Position */
+#define CoreDebug_DHCSR_S_NSUIDE_Msk       (1UL << CoreDebug_DHCSR_S_NSUIDE_Pos)          /*!< \deprecated CoreDebug DHCSR: S_NSUIDE Mask */
+
+#define CoreDebug_DHCSR_S_SDE_Pos          20U                                            /*!< \deprecated CoreDebug DHCSR: S_SDE Position */
+#define CoreDebug_DHCSR_S_SDE_Msk          (1UL << CoreDebug_DHCSR_S_SDE_Pos)             /*!< \deprecated CoreDebug DHCSR: S_SDE Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< \deprecated CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< \deprecated CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< \deprecated CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< \deprecated CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< \deprecated CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< \deprecated CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_PMOV_Pos          6U                                            /*!< \deprecated CoreDebug DHCSR: C_PMOV Position */
+#define CoreDebug_DHCSR_C_PMOV_Msk         (1UL << CoreDebug_DHCSR_C_PMOV_Pos)            /*!< \deprecated CoreDebug DHCSR: C_PMOV Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< \deprecated CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< \deprecated CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< \deprecated CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< \deprecated CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< \deprecated CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< \deprecated CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< \deprecated CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< \deprecated CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< \deprecated CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< \deprecated CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< \deprecated CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< \deprecated CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< \deprecated CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< \deprecated CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< \deprecated CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< \deprecated CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< \deprecated CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< \deprecated CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< \deprecated CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< \deprecated CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< \deprecated CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< \deprecated CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< \deprecated CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< \deprecated CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< \deprecated CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< \deprecated CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< \deprecated CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Set Clear Exception and Monitor Control Register Definitions */
+#define CoreDebug_DSCEMCR_CLR_MON_REQ_Pos  19U                                            /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Position */
+#define CoreDebug_DSCEMCR_CLR_MON_REQ_Msk  (1UL << CoreDebug_DSCEMCR_CLR_MON_REQ_Pos)     /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_REQ, Mask */
+
+#define CoreDebug_DSCEMCR_CLR_MON_PEND_Pos 17U                                            /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Position */
+#define CoreDebug_DSCEMCR_CLR_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_CLR_MON_PEND_Pos)    /*!< \deprecated CoreDebug DSCEMCR: CLR_MON_PEND, Mask */
+
+#define CoreDebug_DSCEMCR_SET_MON_REQ_Pos   3U                                            /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Position */
+#define CoreDebug_DSCEMCR_SET_MON_REQ_Msk  (1UL << CoreDebug_DSCEMCR_SET_MON_REQ_Pos)     /*!< \deprecated CoreDebug DSCEMCR: SET_MON_REQ, Mask */
+
+#define CoreDebug_DSCEMCR_SET_MON_PEND_Pos  1U                                            /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Position */
+#define CoreDebug_DSCEMCR_SET_MON_PEND_Msk (1UL << CoreDebug_DSCEMCR_SET_MON_PEND_Pos)    /*!< \deprecated CoreDebug DSCEMCR: SET_MON_PEND, Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_UIDEN_Pos      10U                                            /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Position */
+#define CoreDebug_DAUTHCTRL_UIDEN_Msk      (1UL << CoreDebug_DAUTHCTRL_UIDEN_Pos)         /*!< \deprecated CoreDebug DAUTHCTRL: UIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_UIDAPEN_Pos     9U                                            /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Position */
+#define CoreDebug_DAUTHCTRL_UIDAPEN_Msk    (1UL << CoreDebug_DAUTHCTRL_UIDAPEN_Pos)       /*!< \deprecated CoreDebug DAUTHCTRL: UIDAPEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_FSDMA_Pos       8U                                            /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Position */
+#define CoreDebug_DAUTHCTRL_FSDMA_Msk      (1UL << CoreDebug_DAUTHCTRL_FSDMA_Pos)         /*!< \deprecated CoreDebug DAUTHCTRL: FSDMA, Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< \deprecated CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< \deprecated CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< \deprecated CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< \deprecated CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< \deprecated CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< \deprecated CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< \deprecated CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< \deprecated CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< \deprecated CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DCB       Debug Control Block
+  \brief    Type definitions for the Debug Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Control Block Registers (DCB).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+  __OM  uint32_t DSCEMCR;                /*!< Offset: 0x010 ( /W)  Debug Set Clear Exception and Monitor Control Register */
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} DCB_Type;
+
+/* DHCSR, Debug Halting Control and Status Register Definitions */
+#define DCB_DHCSR_DBGKEY_Pos               16U                                            /*!< DCB DHCSR: Debug key Position */
+#define DCB_DHCSR_DBGKEY_Msk               (0xFFFFUL << DCB_DHCSR_DBGKEY_Pos)             /*!< DCB DHCSR: Debug key Mask */
+
+#define DCB_DHCSR_S_RESTART_ST_Pos         26U                                            /*!< DCB DHCSR: Restart sticky status Position */
+#define DCB_DHCSR_S_RESTART_ST_Msk         (0x1UL << DCB_DHCSR_S_RESTART_ST_Pos)          /*!< DCB DHCSR: Restart sticky status Mask */
+
+#define DCB_DHCSR_S_RESET_ST_Pos           25U                                            /*!< DCB DHCSR: Reset sticky status Position */
+#define DCB_DHCSR_S_RESET_ST_Msk           (0x1UL << DCB_DHCSR_S_RESET_ST_Pos)            /*!< DCB DHCSR: Reset sticky status Mask */
+
+#define DCB_DHCSR_S_RETIRE_ST_Pos          24U                                            /*!< DCB DHCSR: Retire sticky status Position */
+#define DCB_DHCSR_S_RETIRE_ST_Msk          (0x1UL << DCB_DHCSR_S_RETIRE_ST_Pos)           /*!< DCB DHCSR: Retire sticky status Mask */
+
+#define DCB_DHCSR_S_FPD_Pos                23U                                            /*!< DCB DHCSR: Floating-point registers Debuggable Position */
+#define DCB_DHCSR_S_FPD_Msk                (0x1UL << DCB_DHCSR_S_FPD_Pos)                 /*!< DCB DHCSR: Floating-point registers Debuggable Mask */
+
+#define DCB_DHCSR_S_SUIDE_Pos              22U                                            /*!< DCB DHCSR: Secure unprivileged halting debug enabled Position */
+#define DCB_DHCSR_S_SUIDE_Msk              (0x1UL << DCB_DHCSR_S_SUIDE_Pos)               /*!< DCB DHCSR: Secure unprivileged halting debug enabled Mask */
+
+#define DCB_DHCSR_S_NSUIDE_Pos             21U                                            /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Position */
+#define DCB_DHCSR_S_NSUIDE_Msk             (0x1UL << DCB_DHCSR_S_NSUIDE_Pos)              /*!< DCB DHCSR: Non-secure unprivileged halting debug enabled Mask */
+
+#define DCB_DHCSR_S_SDE_Pos                20U                                            /*!< DCB DHCSR: Secure debug enabled Position */
+#define DCB_DHCSR_S_SDE_Msk                (0x1UL << DCB_DHCSR_S_SDE_Pos)                 /*!< DCB DHCSR: Secure debug enabled Mask */
+
+#define DCB_DHCSR_S_LOCKUP_Pos             19U                                            /*!< DCB DHCSR: Lockup status Position */
+#define DCB_DHCSR_S_LOCKUP_Msk             (0x1UL << DCB_DHCSR_S_LOCKUP_Pos)              /*!< DCB DHCSR: Lockup status Mask */
+
+#define DCB_DHCSR_S_SLEEP_Pos              18U                                            /*!< DCB DHCSR: Sleeping status Position */
+#define DCB_DHCSR_S_SLEEP_Msk              (0x1UL << DCB_DHCSR_S_SLEEP_Pos)               /*!< DCB DHCSR: Sleeping status Mask */
+
+#define DCB_DHCSR_S_HALT_Pos               17U                                            /*!< DCB DHCSR: Halted status Position */
+#define DCB_DHCSR_S_HALT_Msk               (0x1UL << DCB_DHCSR_S_HALT_Pos)                /*!< DCB DHCSR: Halted status Mask */
+
+#define DCB_DHCSR_S_REGRDY_Pos             16U                                            /*!< DCB DHCSR: Register ready status Position */
+#define DCB_DHCSR_S_REGRDY_Msk             (0x1UL << DCB_DHCSR_S_REGRDY_Pos)              /*!< DCB DHCSR: Register ready status Mask */
+
+#define DCB_DHCSR_C_PMOV_Pos                6U                                            /*!< DCB DHCSR: Halt on PMU overflow control Position */
+#define DCB_DHCSR_C_PMOV_Msk               (0x1UL << DCB_DHCSR_C_PMOV_Pos)                /*!< DCB DHCSR: Halt on PMU overflow control Mask */
+
+#define DCB_DHCSR_C_SNAPSTALL_Pos           5U                                            /*!< DCB DHCSR: Snap stall control Position */
+#define DCB_DHCSR_C_SNAPSTALL_Msk          (0x1UL << DCB_DHCSR_C_SNAPSTALL_Pos)           /*!< DCB DHCSR: Snap stall control Mask */
+
+#define DCB_DHCSR_C_MASKINTS_Pos            3U                                            /*!< DCB DHCSR: Mask interrupts control Position */
+#define DCB_DHCSR_C_MASKINTS_Msk           (0x1UL << DCB_DHCSR_C_MASKINTS_Pos)            /*!< DCB DHCSR: Mask interrupts control Mask */
+
+#define DCB_DHCSR_C_STEP_Pos                2U                                            /*!< DCB DHCSR: Step control Position */
+#define DCB_DHCSR_C_STEP_Msk               (0x1UL << DCB_DHCSR_C_STEP_Pos)                /*!< DCB DHCSR: Step control Mask */
+
+#define DCB_DHCSR_C_HALT_Pos                1U                                            /*!< DCB DHCSR: Halt control Position */
+#define DCB_DHCSR_C_HALT_Msk               (0x1UL << DCB_DHCSR_C_HALT_Pos)                /*!< DCB DHCSR: Halt control Mask */
+
+#define DCB_DHCSR_C_DEBUGEN_Pos             0U                                            /*!< DCB DHCSR: Debug enable control Position */
+#define DCB_DHCSR_C_DEBUGEN_Msk            (0x1UL /*<< DCB_DHCSR_C_DEBUGEN_Pos*/)         /*!< DCB DHCSR: Debug enable control Mask */
+
+/* DCRSR, Debug Core Register Select Register Definitions */
+#define DCB_DCRSR_REGWnR_Pos               16U                                            /*!< DCB DCRSR: Register write/not-read Position */
+#define DCB_DCRSR_REGWnR_Msk               (0x1UL << DCB_DCRSR_REGWnR_Pos)                /*!< DCB DCRSR: Register write/not-read Mask */
+
+#define DCB_DCRSR_REGSEL_Pos                0U                                            /*!< DCB DCRSR: Register selector Position */
+#define DCB_DCRSR_REGSEL_Msk               (0x7FUL /*<< DCB_DCRSR_REGSEL_Pos*/)           /*!< DCB DCRSR: Register selector Mask */
+
+/* DCRDR, Debug Core Register Data Register Definitions */
+#define DCB_DCRDR_DBGTMP_Pos                0U                                            /*!< DCB DCRDR: Data temporary buffer Position */
+#define DCB_DCRDR_DBGTMP_Msk               (0xFFFFFFFFUL /*<< DCB_DCRDR_DBGTMP_Pos*/)     /*!< DCB DCRDR: Data temporary buffer Mask */
+
+/* DEMCR, Debug Exception and Monitor Control Register Definitions */
+#define DCB_DEMCR_TRCENA_Pos               24U                                            /*!< DCB DEMCR: Trace enable Position */
+#define DCB_DEMCR_TRCENA_Msk               (0x1UL << DCB_DEMCR_TRCENA_Pos)                /*!< DCB DEMCR: Trace enable Mask */
+
+#define DCB_DEMCR_MONPRKEY_Pos             23U                                            /*!< DCB DEMCR: Monitor pend req key Position */
+#define DCB_DEMCR_MONPRKEY_Msk             (0x1UL << DCB_DEMCR_MONPRKEY_Pos)              /*!< DCB DEMCR: Monitor pend req key Mask */
+
+#define DCB_DEMCR_UMON_EN_Pos              21U                                            /*!< DCB DEMCR: Unprivileged monitor enable Position */
+#define DCB_DEMCR_UMON_EN_Msk              (0x1UL << DCB_DEMCR_UMON_EN_Pos)               /*!< DCB DEMCR: Unprivileged monitor enable Mask */
+
+#define DCB_DEMCR_SDME_Pos                 20U                                            /*!< DCB DEMCR: Secure DebugMonitor enable Position */
+#define DCB_DEMCR_SDME_Msk                 (0x1UL << DCB_DEMCR_SDME_Pos)                  /*!< DCB DEMCR: Secure DebugMonitor enable Mask */
+
+#define DCB_DEMCR_MON_REQ_Pos              19U                                            /*!< DCB DEMCR: Monitor request Position */
+#define DCB_DEMCR_MON_REQ_Msk              (0x1UL << DCB_DEMCR_MON_REQ_Pos)               /*!< DCB DEMCR: Monitor request Mask */
+
+#define DCB_DEMCR_MON_STEP_Pos             18U                                            /*!< DCB DEMCR: Monitor step Position */
+#define DCB_DEMCR_MON_STEP_Msk             (0x1UL << DCB_DEMCR_MON_STEP_Pos)              /*!< DCB DEMCR: Monitor step Mask */
+
+#define DCB_DEMCR_MON_PEND_Pos             17U                                            /*!< DCB DEMCR: Monitor pend Position */
+#define DCB_DEMCR_MON_PEND_Msk             (0x1UL << DCB_DEMCR_MON_PEND_Pos)              /*!< DCB DEMCR: Monitor pend Mask */
+
+#define DCB_DEMCR_MON_EN_Pos               16U                                            /*!< DCB DEMCR: Monitor enable Position */
+#define DCB_DEMCR_MON_EN_Msk               (0x1UL << DCB_DEMCR_MON_EN_Pos)                /*!< DCB DEMCR: Monitor enable Mask */
+
+#define DCB_DEMCR_VC_SFERR_Pos             11U                                            /*!< DCB DEMCR: Vector Catch SecureFault Position */
+#define DCB_DEMCR_VC_SFERR_Msk             (0x1UL << DCB_DEMCR_VC_SFERR_Pos)              /*!< DCB DEMCR: Vector Catch SecureFault Mask */
+
+#define DCB_DEMCR_VC_HARDERR_Pos           10U                                            /*!< DCB DEMCR: Vector Catch HardFault errors Position */
+#define DCB_DEMCR_VC_HARDERR_Msk           (0x1UL << DCB_DEMCR_VC_HARDERR_Pos)            /*!< DCB DEMCR: Vector Catch HardFault errors Mask */
+
+#define DCB_DEMCR_VC_INTERR_Pos             9U                                            /*!< DCB DEMCR: Vector Catch interrupt errors Position */
+#define DCB_DEMCR_VC_INTERR_Msk            (0x1UL << DCB_DEMCR_VC_INTERR_Pos)             /*!< DCB DEMCR: Vector Catch interrupt errors Mask */
+
+#define DCB_DEMCR_VC_BUSERR_Pos             8U                                            /*!< DCB DEMCR: Vector Catch BusFault errors Position */
+#define DCB_DEMCR_VC_BUSERR_Msk            (0x1UL << DCB_DEMCR_VC_BUSERR_Pos)             /*!< DCB DEMCR: Vector Catch BusFault errors Mask */
+
+#define DCB_DEMCR_VC_STATERR_Pos            7U                                            /*!< DCB DEMCR: Vector Catch state errors Position */
+#define DCB_DEMCR_VC_STATERR_Msk           (0x1UL << DCB_DEMCR_VC_STATERR_Pos)            /*!< DCB DEMCR: Vector Catch state errors Mask */
+
+#define DCB_DEMCR_VC_CHKERR_Pos             6U                                            /*!< DCB DEMCR: Vector Catch check errors Position */
+#define DCB_DEMCR_VC_CHKERR_Msk            (0x1UL << DCB_DEMCR_VC_CHKERR_Pos)             /*!< DCB DEMCR: Vector Catch check errors Mask */
+
+#define DCB_DEMCR_VC_NOCPERR_Pos            5U                                            /*!< DCB DEMCR: Vector Catch NOCP errors Position */
+#define DCB_DEMCR_VC_NOCPERR_Msk           (0x1UL << DCB_DEMCR_VC_NOCPERR_Pos)            /*!< DCB DEMCR: Vector Catch NOCP errors Mask */
+
+#define DCB_DEMCR_VC_MMERR_Pos              4U                                            /*!< DCB DEMCR: Vector Catch MemManage errors Position */
+#define DCB_DEMCR_VC_MMERR_Msk             (0x1UL << DCB_DEMCR_VC_MMERR_Pos)              /*!< DCB DEMCR: Vector Catch MemManage errors Mask */
+
+#define DCB_DEMCR_VC_CORERESET_Pos          0U                                            /*!< DCB DEMCR: Vector Catch Core reset Position */
+#define DCB_DEMCR_VC_CORERESET_Msk         (0x1UL /*<< DCB_DEMCR_VC_CORERESET_Pos*/)      /*!< DCB DEMCR: Vector Catch Core reset Mask */
+
+/* DSCEMCR, Debug Set Clear Exception and Monitor Control Register Definitions */
+#define DCB_DSCEMCR_CLR_MON_REQ_Pos        19U                                            /*!< DCB DSCEMCR: Clear monitor request Position */
+#define DCB_DSCEMCR_CLR_MON_REQ_Msk        (0x1UL << DCB_DSCEMCR_CLR_MON_REQ_Pos)         /*!< DCB DSCEMCR: Clear monitor request Mask */
+
+#define DCB_DSCEMCR_CLR_MON_PEND_Pos       17U                                            /*!< DCB DSCEMCR: Clear monitor pend Position */
+#define DCB_DSCEMCR_CLR_MON_PEND_Msk       (0x1UL << DCB_DSCEMCR_CLR_MON_PEND_Pos)        /*!< DCB DSCEMCR: Clear monitor pend Mask */
+
+#define DCB_DSCEMCR_SET_MON_REQ_Pos         3U                                            /*!< DCB DSCEMCR: Set monitor request Position */
+#define DCB_DSCEMCR_SET_MON_REQ_Msk        (0x1UL << DCB_DSCEMCR_SET_MON_REQ_Pos)         /*!< DCB DSCEMCR: Set monitor request Mask */
+
+#define DCB_DSCEMCR_SET_MON_PEND_Pos        1U                                            /*!< DCB DSCEMCR: Set monitor pend Position */
+#define DCB_DSCEMCR_SET_MON_PEND_Msk       (0x1UL << DCB_DSCEMCR_SET_MON_PEND_Pos)        /*!< DCB DSCEMCR: Set monitor pend Mask */
+
+/* DAUTHCTRL, Debug Authentication Control Register Definitions */
+#define DCB_DAUTHCTRL_UIDEN_Pos            10U                                            /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Position */
+#define DCB_DAUTHCTRL_UIDEN_Msk            (0x1UL << DCB_DAUTHCTRL_UIDEN_Pos)             /*!< DCB DAUTHCTRL: Unprivileged Invasive Debug Enable Mask */
+
+#define DCB_DAUTHCTRL_UIDAPEN_Pos           9U                                            /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Position */
+#define DCB_DAUTHCTRL_UIDAPEN_Msk          (0x1UL << DCB_DAUTHCTRL_UIDAPEN_Pos)           /*!< DCB DAUTHCTRL: Unprivileged Invasive DAP Access Enable Mask */
+
+#define DCB_DAUTHCTRL_FSDMA_Pos             8U                                            /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Position */
+#define DCB_DAUTHCTRL_FSDMA_Msk            (0x1UL << DCB_DAUTHCTRL_FSDMA_Pos)             /*!< DCB DAUTHCTRL: Force Secure DebugMonitor Allowed Mask */
+
+#define DCB_DAUTHCTRL_INTSPNIDEN_Pos        3U                                            /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPNIDEN_Msk       (0x1UL << DCB_DAUTHCTRL_INTSPNIDEN_Pos)        /*!< DCB DAUTHCTRL: Internal Secure non-invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPNIDENSEL_Pos        2U                                            /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPNIDENSEL_Msk       (0x1UL << DCB_DAUTHCTRL_SPNIDENSEL_Pos)        /*!< DCB DAUTHCTRL: Secure non-invasive debug enable select Mask */
+
+#define DCB_DAUTHCTRL_INTSPIDEN_Pos         1U                                            /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Position */
+#define DCB_DAUTHCTRL_INTSPIDEN_Msk        (0x1UL << DCB_DAUTHCTRL_INTSPIDEN_Pos)         /*!< DCB DAUTHCTRL: Internal Secure invasive debug enable Mask */
+
+#define DCB_DAUTHCTRL_SPIDENSEL_Pos         0U                                            /*!< DCB DAUTHCTRL: Secure invasive debug enable select Position */
+#define DCB_DAUTHCTRL_SPIDENSEL_Msk        (0x1UL /*<< DCB_DAUTHCTRL_SPIDENSEL_Pos*/)     /*!< DCB DAUTHCTRL: Secure invasive debug enable select Mask */
+
+/* DSCSR, Debug Security Control and Status Register Definitions */
+#define DCB_DSCSR_CDSKEY_Pos               17U                                            /*!< DCB DSCSR: CDS write-enable key Position */
+#define DCB_DSCSR_CDSKEY_Msk               (0x1UL << DCB_DSCSR_CDSKEY_Pos)                /*!< DCB DSCSR: CDS write-enable key Mask */
+
+#define DCB_DSCSR_CDS_Pos                  16U                                            /*!< DCB DSCSR: Current domain Secure Position */
+#define DCB_DSCSR_CDS_Msk                  (0x1UL << DCB_DSCSR_CDS_Pos)                   /*!< DCB DSCSR: Current domain Secure Mask */
+
+#define DCB_DSCSR_SBRSEL_Pos                1U                                            /*!< DCB DSCSR: Secure banked register select Position */
+#define DCB_DSCSR_SBRSEL_Msk               (0x1UL << DCB_DSCSR_SBRSEL_Pos)                /*!< DCB DSCSR: Secure banked register select Mask */
+
+#define DCB_DSCSR_SBRSELEN_Pos              0U                                            /*!< DCB DSCSR: Secure banked register select enable Position */
+#define DCB_DSCSR_SBRSELEN_Msk             (0x1UL /*<< DCB_DSCSR_SBRSELEN_Pos*/)          /*!< DCB DSCSR: Secure banked register select enable Mask */
+
+/*@} end of group CMSIS_DCB */
+
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DIB       Debug Identification Block
+  \brief    Type definitions for the Debug Identification Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Debug Identification Block Registers (DIB).
+ */
+typedef struct
+{
+  __OM  uint32_t DLAR;                   /*!< Offset: 0x000 ( /W)  SCS Software Lock Access Register */
+  __IM  uint32_t DLSR;                   /*!< Offset: 0x004 (R/ )  SCS Software Lock Status Register */
+  __IM  uint32_t DAUTHSTATUS;            /*!< Offset: 0x008 (R/ )  Debug Authentication Status Register */
+  __IM  uint32_t DDEVARCH;               /*!< Offset: 0x00C (R/ )  SCS Device Architecture Register */
+  __IM  uint32_t DDEVTYPE;               /*!< Offset: 0x010 (R/ )  SCS Device Type Register */
+} DIB_Type;
+
+/* DLAR, SCS Software Lock Access Register Definitions */
+#define DIB_DLAR_KEY_Pos                    0U                                            /*!< DIB DLAR: KEY Position */
+#define DIB_DLAR_KEY_Msk                   (0xFFFFFFFFUL /*<< DIB_DLAR_KEY_Pos */)        /*!< DIB DLAR: KEY Mask */
+
+/* DLSR, SCS Software Lock Status Register Definitions */
+#define DIB_DLSR_nTT_Pos                    2U                                            /*!< DIB DLSR: Not thirty-two bit Position */
+#define DIB_DLSR_nTT_Msk                   (0x1UL << DIB_DLSR_nTT_Pos )                   /*!< DIB DLSR: Not thirty-two bit Mask */
+
+#define DIB_DLSR_SLK_Pos                    1U                                            /*!< DIB DLSR: Software Lock status Position */
+#define DIB_DLSR_SLK_Msk                   (0x1UL << DIB_DLSR_SLK_Pos )                   /*!< DIB DLSR: Software Lock status Mask */
+
+#define DIB_DLSR_SLI_Pos                    0U                                            /*!< DIB DLSR: Software Lock implemented Position */
+#define DIB_DLSR_SLI_Msk                   (0x1UL /*<< DIB_DLSR_SLI_Pos*/)                /*!< DIB DLSR: Software Lock implemented Mask */
+
+/* DAUTHSTATUS, Debug Authentication Status Register Definitions */
+#define DIB_DAUTHSTATUS_SUNID_Pos          22U                                            /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Position */
+#define DIB_DAUTHSTATUS_SUNID_Msk          (0x3UL << DIB_DAUTHSTATUS_SUNID_Pos )          /*!< DIB DAUTHSTATUS: Secure Unprivileged Non-invasive Debug Allowed Mask */
+
+#define DIB_DAUTHSTATUS_SUID_Pos           20U                                            /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Position */
+#define DIB_DAUTHSTATUS_SUID_Msk           (0x3UL << DIB_DAUTHSTATUS_SUID_Pos )           /*!< DIB DAUTHSTATUS: Secure Unprivileged Invasive Debug Allowed Mask */
+
+#define DIB_DAUTHSTATUS_NSUNID_Pos         18U                                            /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Position */
+#define DIB_DAUTHSTATUS_NSUNID_Msk         (0x3UL << DIB_DAUTHSTATUS_NSUNID_Pos )         /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Non-invasive Debug Allo Mask */
+
+#define DIB_DAUTHSTATUS_NSUID_Pos          16U                                            /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Position */
+#define DIB_DAUTHSTATUS_NSUID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSUID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Unprivileged Invasive Debug Allowed Mask */
+
+#define DIB_DAUTHSTATUS_SNID_Pos            6U                                            /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_SNID_Msk           (0x3UL << DIB_DAUTHSTATUS_SNID_Pos )           /*!< DIB DAUTHSTATUS: Secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_SID_Pos             4U                                            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_SID_Msk            (0x3UL << DIB_DAUTHSTATUS_SID_Pos )            /*!< DIB DAUTHSTATUS: Secure Invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSNID_Pos           2U                                            /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSNID_Msk          (0x3UL << DIB_DAUTHSTATUS_NSNID_Pos )          /*!< DIB DAUTHSTATUS: Non-secure Non-invasive Debug Mask */
+
+#define DIB_DAUTHSTATUS_NSID_Pos            0U                                            /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Position */
+#define DIB_DAUTHSTATUS_NSID_Msk           (0x3UL /*<< DIB_DAUTHSTATUS_NSID_Pos*/)        /*!< DIB DAUTHSTATUS: Non-secure Invasive Debug Mask */
+
+/* DDEVARCH, SCS Device Architecture Register Definitions */
+#define DIB_DDEVARCH_ARCHITECT_Pos         21U                                            /*!< DIB DDEVARCH: Architect Position */
+#define DIB_DDEVARCH_ARCHITECT_Msk         (0x7FFUL << DIB_DDEVARCH_ARCHITECT_Pos )       /*!< DIB DDEVARCH: Architect Mask */
+
+#define DIB_DDEVARCH_PRESENT_Pos           20U                                            /*!< DIB DDEVARCH: DEVARCH Present Position */
+#define DIB_DDEVARCH_PRESENT_Msk           (0x1FUL << DIB_DDEVARCH_PRESENT_Pos )          /*!< DIB DDEVARCH: DEVARCH Present Mask */
+
+#define DIB_DDEVARCH_REVISION_Pos          16U                                            /*!< DIB DDEVARCH: Revision Position */
+#define DIB_DDEVARCH_REVISION_Msk          (0xFUL << DIB_DDEVARCH_REVISION_Pos )          /*!< DIB DDEVARCH: Revision Mask */
+
+#define DIB_DDEVARCH_ARCHVER_Pos           12U                                            /*!< DIB DDEVARCH: Architecture Version Position */
+#define DIB_DDEVARCH_ARCHVER_Msk           (0xFUL << DIB_DDEVARCH_ARCHVER_Pos )           /*!< DIB DDEVARCH: Architecture Version Mask */
+
+#define DIB_DDEVARCH_ARCHPART_Pos           0U                                            /*!< DIB DDEVARCH: Architecture Part Position */
+#define DIB_DDEVARCH_ARCHPART_Msk          (0xFFFUL /*<< DIB_DDEVARCH_ARCHPART_Pos*/)     /*!< DIB DDEVARCH: Architecture Part Mask */
+
+/* DDEVTYPE, SCS Device Type Register Definitions */
+#define DIB_DDEVTYPE_SUB_Pos                4U                                            /*!< DIB DDEVTYPE: Sub-type Position */
+#define DIB_DDEVTYPE_SUB_Msk               (0xFUL << DIB_DDEVTYPE_SUB_Pos )               /*!< DIB DDEVTYPE: Sub-type Mask */
+
+#define DIB_DDEVTYPE_MAJOR_Pos              0U                                            /*!< DIB DDEVTYPE: Major type Position */
+#define DIB_DDEVTYPE_MAJOR_Msk             (0xFUL /*<< DIB_DDEVTYPE_MAJOR_Pos*/)          /*!< DIB DDEVTYPE: Major type Mask */
+
+
+/*@} end of group CMSIS_DIB */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define PWRMODCTL_BASE      (0xE001E300UL)                             /*!< Power Mode Control Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< \deprecated Core Debug Base Address */
+  #define DCB_BASE            (0xE000EDF0UL)                             /*!< DCB Base Address */
+  #define DIB_BASE            (0xE000EFB0UL)                             /*!< DIB Base Address */
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define PWRMODCTL           ((PwrModCtl_Type *)     PWRMODCTL_BASE   ) /*!< Power Mode Control configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< \deprecated Core Debug configuration struct */
+  #define DCB                 ((DCB_Type       *)     DCB_BASE         ) /*!< DCB configuration struct */
+  #define DIB                 ((DIB_Type       *)     DIB_BASE         ) /*!< DIB configuration struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U)
+    #define PMU_BASE          (0xE0003000UL)                             /*!< PMU Base Address */
+    #define PMU               ((PMU_Type       *)     PMU_BASE         ) /*!< PMU configuration struct */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< \deprecated Core Debug Base Address           (non-secure address space) */
+  #define DCB_BASE_NS         (0xE002EDF0UL)                             /*!< DCB Base Address                  (non-secure address space) */
+  #define DIB_BASE_NS         (0xE002EFB0UL)                             /*!< DIB Base Address                  (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< \deprecated Core Debug configuration struct   (non-secure address space) */
+  #define DCB_NS              ((DCB_Type       *)     DCB_BASE_NS      ) /*!< DCB configuration struct          (non-secure address space) */
+  #define DIB_NS              ((DIB_Type       *)     DIB_BASE_NS      ) /*!< DIB configuration struct          (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_register_aliases     Backwards Compatibility Aliases
+  \brief      Register alias definitions for backwards compatibility.
+  @{
+ */
+#define ID_ADR  (ID_AFR)    /*!< SCB Auxiliary Feature Register */
+/*@} */
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)                      );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  PMU functions and events  #################################### */
+
+#if defined (__PMU_PRESENT) && (__PMU_PRESENT == 1U)
+
+#include "pmu_armv8.h"
+
+/**
+  \brief   Cortex-M55 PMU events
+  \note    Architectural PMU events can be found in pmu_armv8.h
+*/
+
+#define ARMCM55_PMU_ECC_ERR                          0xC000             /*!< Any ECC error */
+#define ARMCM55_PMU_ECC_ERR_FATAL                    0xC001             /*!< Any fatal ECC error */
+#define ARMCM55_PMU_ECC_ERR_DCACHE                   0xC010             /*!< Any ECC error in the data cache */
+#define ARMCM55_PMU_ECC_ERR_ICACHE                   0xC011             /*!< Any ECC error in the instruction cache */
+#define ARMCM55_PMU_ECC_ERR_FATAL_DCACHE             0xC012             /*!< Any fatal ECC error in the data cache */
+#define ARMCM55_PMU_ECC_ERR_FATAL_ICACHE             0xC013             /*!< Any fatal ECC error in the instruction cache*/
+#define ARMCM55_PMU_ECC_ERR_DTCM                     0xC020             /*!< Any ECC error in the DTCM */
+#define ARMCM55_PMU_ECC_ERR_ITCM                     0xC021             /*!< Any ECC error in the ITCM */
+#define ARMCM55_PMU_ECC_ERR_FATAL_DTCM               0xC022             /*!< Any fatal ECC error in the DTCM */
+#define ARMCM55_PMU_ECC_ERR_FATAL_ITCM               0xC023             /*!< Any fatal ECC error in the ITCM */
+#define ARMCM55_PMU_PF_LINEFILL                      0xC100             /*!< A prefetcher starts a line-fill */
+#define ARMCM55_PMU_PF_CANCEL                        0xC101             /*!< A prefetcher stops prefetching */
+#define ARMCM55_PMU_PF_DROP_LINEFILL                 0xC102             /*!< A linefill triggered by a prefetcher has been dropped because of lack of buffering */
+#define ARMCM55_PMU_NWAMODE_ENTER                    0xC200             /*!< No write-allocate mode entry */
+#define ARMCM55_PMU_NWAMODE                          0xC201             /*!< Write-allocate store is not allocated into the data cache due to no-write-allocate mode */
+#define ARMCM55_PMU_SAHB_ACCESS                      0xC300             /*!< Read or write access on the S-AHB interface to the TCM */
+#define ARMCM55_PMU_DOSTIMEOUT_DOUBLE                0xC400             /*!< Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress */
+#define ARMCM55_PMU_DOSTIMEOUT_TRIPLE                0xC401             /*!< Denial of Service timeout has fired three times and blocked the LSU to force forward progress */
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_FPSP_Msk | FPU_MVFR0_FPDP_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+/* ##########################  MVE functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_MveFunctions MVE Functions
+  \brief    Function that provides MVE type.
+  @{
+ */
+
+/**
+  \brief   get MVE type
+  \details returns the MVE type
+  \returns
+   - \b  0: No Vector Extension (MVE)
+   - \b  1: Integer Vector Extension (MVE-I)
+   - \b  2: Floating-point Vector Extension (MVE-F)
+ */
+__STATIC_INLINE uint32_t SCB_GetMVEType(void)
+{
+  const uint32_t mvfr1 = FPU->MVFR1;
+  if      ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x2U << FPU_MVFR1_MVE_Pos))
+  {
+    return 2U;
+  }
+  else if ((mvfr1 & FPU_MVFR1_MVE_Msk) == (0x1U << FPU_MVFR1_MVE_Pos))
+  {
+    return 1U;
+  }
+  else
+  {
+    return 0U;
+  }
+}
+
+
+/*@} end of CMSIS_Core_MveFunctions */
+
+
+/* ##########################  Cache functions  #################################### */
+
+#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \
+     (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)))
+#include "cachel1_armv7.h"
+#endif
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+
+
+/* ##################################    Debug Control function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DCBFunctions Debug Control Functions
+  \brief    Functions that access the Debug Control Block.
+  @{
+ */
+
+
+/**
+  \brief   Set Debug Authentication Control Register
+  \details writes to Debug Authentication Control register.
+  \param [in]  value  value to be writen.
+ */
+__STATIC_INLINE void DCB_SetAuthCtrl(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register
+  \details Reads Debug Authentication Control register.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t DCB_GetAuthCtrl(void)
+{
+    return (DCB->DAUTHCTRL);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Debug Authentication Control Register (non-secure)
+  \details writes to non-secure Debug Authentication Control register when in secure state.
+  \param [in]  value  value to be writen
+ */
+__STATIC_INLINE void TZ_DCB_SetAuthCtrl_NS(uint32_t value)
+{
+    __DSB();
+    __ISB();
+    DCB_NS->DAUTHCTRL = value;
+    __DSB();
+    __ISB();
+}
+
+
+/**
+  \brief   Get Debug Authentication Control Register (non-secure)
+  \details Reads non-secure Debug Authentication Control register when in secure state.
+  \return             Debug Authentication Control Register.
+ */
+__STATIC_INLINE uint32_t TZ_DCB_GetAuthCtrl_NS(void)
+{
+    return (DCB_NS->DAUTHCTRL);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    Debug Identification function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_DIBFunctions Debug Identification Functions
+  \brief    Functions that access the Debug Identification Block.
+  @{
+ */
+
+
+/**
+  \brief   Get Debug Authentication Status Register
+  \details Reads Debug Authentication Status register.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t DIB_GetAuthStatus(void)
+{
+    return (DIB->DAUTHSTATUS);
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Debug Authentication Status Register (non-secure)
+  \details Reads non-secure Debug Authentication Status register when in secure state.
+  \return             Debug Authentication Status Register.
+ */
+__STATIC_INLINE uint32_t TZ_DIB_GetAuthStatus_NS(void)
+{
+    return (DIB_NS->DAUTHSTATUS);
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_DCBFunctions */
+
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM55_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_cm7.h b/Libraries/CMSIS/Core/Include/core_cm7.h
similarity index 90%
rename from Libraries/CMSIS/Include/core_cm7.h
rename to Libraries/CMSIS/Core/Include/core_cm7.h
index 3da3c43e..010506e9 100644
--- a/Libraries/CMSIS/Include/core_cm7.h
+++ b/Libraries/CMSIS/Core/Include/core_cm7.h
@@ -1,2725 +1,2366 @@
-/**************************************************************************//**
- * @file     core_cm7.h
- * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
- * @version  V5.1.1
- * @date     28. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_CM7_H_GENERIC
-#define __CORE_CM7_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_M7
-  @{
- */
-
-#include "cmsis_version.h"
-
-/* CMSIS CM7 definitions */
-#define __CM7_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __CM7_CMSIS_VERSION_SUB   ( __CM_CMSIS_VERSION_SUB)                  /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN << 16U) | \
-                                    __CM7_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                (7U)                                       /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_CM7_H_DEPENDANT
-#define __CORE_CM7_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __CM7_REV
-    #define __CM7_REV               0x0000U
-    #warning "__CM7_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __ICACHE_PRESENT
-    #define __ICACHE_PRESENT          0U
-    #warning "__ICACHE_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DCACHE_PRESENT
-    #define __DCACHE_PRESENT          0U
-    #warning "__DCACHE_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DTCM_PRESENT
-    #define __DTCM_PRESENT            0U
-    #warning "__DTCM_PRESENT        not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group Cortex_M7 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
-    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
-    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
-    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RESERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MFR[4U];             /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[5U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-        uint32_t RESERVED3[93U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
-        uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
-        uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
-        uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-        uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                      18U                                           /*!< SCB CCR: Branch prediction enable bit Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: Branch prediction enable bit Mask */
-
-#define SCB_CCR_IC_Pos                      17U                                           /*!< SCB CCR: Instruction cache enable bit Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: Instruction cache enable bit Mask */
-
-#define SCB_CCR_DC_Pos                      16U                                           /*!< SCB CCR: Cache enable bit Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: Cache enable bit Mask */
-
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
-
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISDYNADD_Pos         26U                                         /*!< ACTLR: DISDYNADD Position */
-#define SCnSCB_ACTLR_DISDYNADD_Msk         (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)         /*!< ACTLR: DISDYNADD Mask */
-
-#define SCnSCB_ACTLR_DISISSCH1_Pos         21U                                         /*!< ACTLR: DISISSCH1 Position */
-#define SCnSCB_ACTLR_DISISSCH1_Msk         (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)      /*!< ACTLR: DISISSCH1 Mask */
-
-#define SCnSCB_ACTLR_DISDI_Pos             16U                                         /*!< ACTLR: DISDI Position */
-#define SCnSCB_ACTLR_DISDI_Msk             (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)          /*!< ACTLR: DISDI Mask */
-
-#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos     15U                                         /*!< ACTLR: DISCRITAXIRUR Position */
-#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk     (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)     /*!< ACTLR: DISCRITAXIRUR Mask */
-
-#define SCnSCB_ACTLR_DISBTACALLOC_Pos      14U                                         /*!< ACTLR: DISBTACALLOC Position */
-#define SCnSCB_ACTLR_DISBTACALLOC_Msk      (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)      /*!< ACTLR: DISBTACALLOC Mask */
-
-#define SCnSCB_ACTLR_DISBTACREAD_Pos       13U                                         /*!< ACTLR: DISBTACREAD Position */
-#define SCnSCB_ACTLR_DISBTACREAD_Msk       (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)       /*!< ACTLR: DISBTACREAD Mask */
-
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */
-#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */
-
-#define SCnSCB_ACTLR_DISRAMODE_Pos         11U                                         /*!< ACTLR: DISRAMODE Position */
-#define SCnSCB_ACTLR_DISRAMODE_Msk         (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)         /*!< ACTLR: DISRAMODE Mask */
-
-#define SCnSCB_ACTLR_FPEXCODIS_Pos         10U                                         /*!< ACTLR: FPEXCODIS Position */
-#define SCnSCB_ACTLR_FPEXCODIS_Msk         (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)         /*!< ACTLR: FPEXCODIS Mask */
-
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[32U];
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED3[981U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 (  W)  Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/* Media and FP Feature Register 2 Definitions */
-
-#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
-#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
-#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */
-#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */
-#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]                >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
-  __DSB();
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv7.h"
-
-#endif
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = SCB->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
-  {
-    return 2U;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################  Cache functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_CacheFunctions Cache Functions
-  \brief    Functions that configure Instruction and Data cache.
-  @{
- */
-
-/* Cache Size ID Register Macros */
-#define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
-#define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
-
-#define __SCB_DCACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
-#define __SCB_ICACHE_LINE_SIZE  32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
-
-/**
-  \brief   Enable I-Cache
-  \details Turns on I-Cache
-  */
-__STATIC_FORCEINLINE void SCB_EnableICache (void)
-{
-  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
-    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
-
-    __DSB();
-    __ISB();
-    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
-    __DSB();
-    __ISB();
-    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Disable I-Cache
-  \details Turns off I-Cache
-  */
-__STATIC_FORCEINLINE void SCB_DisableICache (void)
-{
-  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  /* disable I-Cache */
-    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Invalidate I-Cache
-  \details Invalidates I-Cache
-  */
-__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
-{
-  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
-    __DSB();
-    __ISB();
-    SCB->ICIALLU = 0UL;
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   I-Cache Invalidate by address
-  \details Invalidates I-Cache for the given address.
-           I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
-           I-Cache memory blocks which are part of given address + given size are invalidated.
-  \param[in]   addr    address
-  \param[in]   isize   size of memory block (in number of bytes)
-*/
-__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize)
-{
-  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
-    if ( isize > 0 ) {
-       int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
-      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
-
-      __DSB();
-
-      do {
-        SCB->ICIMVAU = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
-        op_addr += __SCB_ICACHE_LINE_SIZE;
-        op_size -= __SCB_ICACHE_LINE_SIZE;
-      } while ( op_size > 0 );
-
-      __DSB();
-      __ISB();
-    }
-  #endif
-}
-
-
-/**
-  \brief   Enable D-Cache
-  \details Turns on D-Cache
-  */
-__STATIC_FORCEINLINE void SCB_EnableDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
-
-    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
-                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-    __DSB();
-
-    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Disable D-Cache
-  \details Turns off D-Cache
-  */
-__STATIC_FORCEINLINE void SCB_DisableDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
-    __DSB();
-
-    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean & invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
-                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Invalidate D-Cache
-  \details Invalidates D-Cache
-  */
-__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
-                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Clean D-Cache
-  \details Cleans D-Cache
-  */
-__STATIC_FORCEINLINE void SCB_CleanDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
-                      ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   Clean & Invalidate D-Cache
-  \details Cleans and Invalidates D-Cache
-  */
-__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    uint32_t ccsidr;
-    uint32_t sets;
-    uint32_t ways;
-
-    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
-    __DSB();
-
-    ccsidr = SCB->CCSIDR;
-
-                                            /* clean & invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
-    do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
-      do {
-        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
-                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
-        #if defined ( __CC_ARM )
-          __schedule_barrier();
-        #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
-
-    __DSB();
-    __ISB();
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Invalidate by address
-  \details Invalidates D-Cache for the given address.
-           D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
-           D-Cache memory blocks which are part of given address + given size are invalidated.
-  \param[in]   addr    address
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    if ( dsize > 0 ) { 
-       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
-      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
-    
-      __DSB();
-
-      do {
-        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
-        op_addr += __SCB_DCACHE_LINE_SIZE;
-        op_size -= __SCB_DCACHE_LINE_SIZE;
-      } while ( op_size > 0 );
-
-      __DSB();
-      __ISB();
-    }
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Clean by address
-  \details Cleans D-Cache for the given address
-           D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
-           D-Cache memory blocks which are part of given address + given size are cleaned.
-  \param[in]   addr    address
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    if ( dsize > 0 ) { 
-       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
-      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
-    
-      __DSB();
-
-      do {
-        SCB->DCCMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
-        op_addr += __SCB_DCACHE_LINE_SIZE;
-        op_size -= __SCB_DCACHE_LINE_SIZE;
-      } while ( op_size > 0 );
-
-      __DSB();
-      __ISB();
-    }
-  #endif
-}
-
-
-/**
-  \brief   D-Cache Clean and Invalidate by address
-  \details Cleans and invalidates D_Cache for the given address
-           D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
-           D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
-  \param[in]   addr    address (aligned to 32-byte boundary)
-  \param[in]   dsize   size of memory block (in number of bytes)
-*/
-__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
-{
-  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
-    if ( dsize > 0 ) { 
-       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
-      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
-    
-      __DSB();
-
-      do {
-        SCB->DCCIMVAC = op_addr;            /* register accepts only 32byte aligned values, only bits 31..5 are valid */
-        op_addr +=          __SCB_DCACHE_LINE_SIZE;
-        op_size -=          __SCB_DCACHE_LINE_SIZE;
-      } while ( op_size > 0 );
-
-      __DSB();
-      __ISB();
-    }
-  #endif
-}
-
-/*@} end of CMSIS_Core_CacheFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_CM7_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_cm7.h
+ * @brief    CMSIS Cortex-M7 Core Peripheral Access Layer Header File
+ * @version  V5.1.6
+ * @date     04. June 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_CM7_H_GENERIC
+#define __CORE_CM7_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_M7
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/* CMSIS CM7 definitions */
+#define __CM7_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                  /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __CM7_CMSIS_VERSION_SUB   ( __CM_CMSIS_VERSION_SUB)                  /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN << 16U) | \
+                                    __CM7_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_M                (7U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM7_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_CM7_H_DEPENDANT
+#define __CORE_CM7_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __CM7_REV
+    #define __CM7_REV               0x0000U
+    #warning "__CM7_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ICACHE_PRESENT
+    #define __ICACHE_PRESENT          0U
+    #warning "__ICACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DCACHE_PRESENT
+    #define __DCACHE_PRESENT          0U
+    #warning "__DCACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DTCM_PRESENT
+    #define __DTCM_PRESENT            0U
+    #warning "__DTCM_PRESENT        not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_M7 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t FPCA:1;                     /*!< bit:      2  FP extension active flag */
+    uint32_t _reserved0:29;              /*!< bit:  3..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MFR[4U];             /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[5U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+        uint32_t RESERVED3[93U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+  __OM  uint32_t BPIALL;                 /*!< Offset: 0x278 ( /W)  Branch Predictor Invalidate All */
+        uint32_t RESERVED7[5U];
+  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
+  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
+  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
+  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                      18U                                           /*!< SCB CCR: Branch prediction enable bit Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: Branch prediction enable bit Mask */
+
+#define SCB_CCR_IC_Pos                      17U                                           /*!< SCB CCR: Instruction cache enable bit Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: Instruction cache enable bit Mask */
+
+#define SCB_CCR_DC_Pos                      16U                                           /*!< SCB CCR: Cache enable bit Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: Cache enable bit Mask */
+
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 5U)                 /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean by Set-way Register Definitions */
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/* Instruction Tightly-Coupled Memory Control Register Definitions */
+#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
+#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
+
+#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
+#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
+
+#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
+#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
+
+#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
+
+/* Data Tightly-Coupled Memory Control Register Definitions */
+#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
+#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
+
+#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
+#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
+
+#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
+#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
+
+#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
+
+/* AHBP Control Register Definitions */
+#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
+#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
+
+#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
+#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
+
+/* L1 Cache Control Register Definitions */
+#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
+#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
+
+#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< \deprecated SCB CACR: ECCEN Position */
+#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< \deprecated SCB CACR: ECCEN Mask */
+
+#define SCB_CACR_ECCDIS_Pos                 1U                                            /*!< SCB CACR: ECCDIS Position */
+#define SCB_CACR_ECCDIS_Msk                (1UL << SCB_CACR_ECCDIS_Pos)                   /*!< SCB CACR: ECCDIS Mask */
+
+#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
+#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
+
+/* AHBS Control Register Definitions */
+#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
+#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBSCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
+
+#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
+#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBSCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
+
+#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
+#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBSCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
+
+/* Auxiliary Bus Fault Status Register Definitions */
+#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
+#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
+
+#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
+#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
+
+#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
+#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
+
+#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
+#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
+
+#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
+#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
+
+#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
+#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISDYNADD_Pos         26U                                         /*!< ACTLR: DISDYNADD Position */
+#define SCnSCB_ACTLR_DISDYNADD_Msk         (1UL << SCnSCB_ACTLR_DISDYNADD_Pos)         /*!< ACTLR: DISDYNADD Mask */
+
+#define SCnSCB_ACTLR_DISISSCH1_Pos         21U                                         /*!< ACTLR: DISISSCH1 Position */
+#define SCnSCB_ACTLR_DISISSCH1_Msk         (0x1FUL << SCnSCB_ACTLR_DISISSCH1_Pos)      /*!< ACTLR: DISISSCH1 Mask */
+
+#define SCnSCB_ACTLR_DISDI_Pos             16U                                         /*!< ACTLR: DISDI Position */
+#define SCnSCB_ACTLR_DISDI_Msk             (0x1FUL << SCnSCB_ACTLR_DISDI_Pos)          /*!< ACTLR: DISDI Mask */
+
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Pos     15U                                         /*!< ACTLR: DISCRITAXIRUR Position */
+#define SCnSCB_ACTLR_DISCRITAXIRUR_Msk     (1UL << SCnSCB_ACTLR_DISCRITAXIRUR_Pos)     /*!< ACTLR: DISCRITAXIRUR Mask */
+
+#define SCnSCB_ACTLR_DISBTACALLOC_Pos      14U                                         /*!< ACTLR: DISBTACALLOC Position */
+#define SCnSCB_ACTLR_DISBTACALLOC_Msk      (1UL << SCnSCB_ACTLR_DISBTACALLOC_Pos)      /*!< ACTLR: DISBTACALLOC Mask */
+
+#define SCnSCB_ACTLR_DISBTACREAD_Pos       13U                                         /*!< ACTLR: DISBTACREAD Position */
+#define SCnSCB_ACTLR_DISBTACREAD_Msk       (1UL << SCnSCB_ACTLR_DISBTACREAD_Pos)       /*!< ACTLR: DISBTACREAD Mask */
+
+#define SCnSCB_ACTLR_DISITMATBFLUSH_Pos    12U                                         /*!< ACTLR: DISITMATBFLUSH Position */
+#define SCnSCB_ACTLR_DISITMATBFLUSH_Msk    (1UL << SCnSCB_ACTLR_DISITMATBFLUSH_Pos)    /*!< ACTLR: DISITMATBFLUSH Mask */
+
+#define SCnSCB_ACTLR_DISRAMODE_Pos         11U                                         /*!< ACTLR: DISRAMODE Position */
+#define SCnSCB_ACTLR_DISRAMODE_Msk         (1UL << SCnSCB_ACTLR_DISRAMODE_Pos)         /*!< ACTLR: DISRAMODE Mask */
+
+#define SCnSCB_ACTLR_FPEXCODIS_Pos         10U                                         /*!< ACTLR: FPEXCODIS Position */
+#define SCnSCB_ACTLR_FPEXCODIS_Msk         (1UL << SCnSCB_ACTLR_FPEXCODIS_Pos)         /*!< ACTLR: FPEXCODIS Mask */
+
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED3[981U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 (  W)  Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif /* defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and FP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and FP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and FP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/* Media and FP Feature Register 2 Definitions */
+
+#define FPU_MVFR2_VFP_Misc_Pos              4U                                            /*!< MVFR2: VFP Misc bits Position */
+#define FPU_MVFR2_VFP_Misc_Msk             (0xFUL << FPU_MVFR2_VFP_Misc_Pos)              /*!< MVFR2: VFP Misc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
+#endif
+
+#define FPU_BASE            (SCS_BASE +  0x0F30UL)                    /*!< Floating Point Unit */
+#define FPU                 ((FPU_Type       *)     FPU_BASE      )   /*!< Floating Point Unit */
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+#define EXC_RETURN_HANDLER_FPU     (0xFFFFFFE1UL)     /* return to Handler mode, uses MSP after return, restore floating-point state */
+#define EXC_RETURN_THREAD_MSP_FPU  (0xFFFFFFE9UL)     /* return to Thread mode, uses MSP after return, restore floating-point state  */
+#define EXC_RETURN_THREAD_PSP_FPU  (0xFFFFFFEDUL)     /* return to Thread mode, uses PSP after return, restore floating-point state  */
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]                = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]                >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv7.h"
+
+#endif
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = SCB->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+/* ##########################  Cache functions  #################################### */
+
+#if ((defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)) || \
+     (defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)))
+#include "cachel1_armv7.h"
+#endif
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_CM7_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_sc000.h b/Libraries/CMSIS/Core/Include/core_sc000.h
similarity index 97%
rename from Libraries/CMSIS/Include/core_sc000.h
rename to Libraries/CMSIS/Core/Include/core_sc000.h
index f315013b..dbc755ff 100644
--- a/Libraries/CMSIS/Include/core_sc000.h
+++ b/Libraries/CMSIS/Core/Include/core_sc000.h
@@ -1,1025 +1,1030 @@
-/**************************************************************************//**
- * @file     core_sc000.h
- * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
- * @version  V5.0.6
- * @date     12. November 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_SC000_H_GENERIC
-#define __CORE_SC000_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup SC000
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS SC000 definitions */
-#define __SC000_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __SC000_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN << 16U) | \
-                                      __SC000_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_SC                 (000U)                                   /*!< Cortex secure core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC000_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_SC000_H_DEPENDANT
-#define __CORE_SC000_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __SC000_REV
-    #define __SC000_REV             0x0000U
-    #warning "__SC000_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          2U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group SC000 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[31U];
-  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[31U];
-  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[31U];
-  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[31U];
-        uint32_t RESERVED4[64U];
-  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
-}  NVIC_Type;
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-        uint32_t RESERVED1[154U];
-  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
-            Therefore they are not covered by the SC000 header file.
-  @{
- */
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for SC000 */
-/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for SC000 */
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-/*#define NVIC_GetActive              __NVIC_GetActive             not available for SC000 */
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
-/* The following MACROS handle generation of the register offset and byte masks */
-#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
-#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
-#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-  else
-  {
-    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
-       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  /* ARM Application Note 321 states that the M0 and M0+ do not require the architectural barrier - assume SC000 is the same */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                 SCB_AIRCR_SYSRESETREQ_Msk);
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC000_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_sc000.h
+ * @brief    CMSIS SC000 Core Peripheral Access Layer Header File
+ * @version  V5.0.7
+ * @date     27. March 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_SC000_H_GENERIC
+#define __CORE_SC000_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup SC000
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/* CMSIS SC000 definitions */
+#define __SC000_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __SC000_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN << 16U) | \
+                                      __SC000_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_SC                 (000U)                                   /*!< Cortex secure core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_SC000_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_SC000_H_DEPENDANT
+#define __CORE_SC000_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __SC000_REV
+    #define __SC000_REV             0x0000U
+    #warning "__SC000_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             0U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+  
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          2U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group SC000 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core MPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:28;              /*!< bit:  0..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:15;              /*!< bit:  9..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t _reserved1:3;               /*!< bit: 25..27  Reserved */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:1;               /*!< bit:      0  Reserved */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[1U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[31U];
+  __IOM uint32_t ICER[1U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[31U];
+  __IOM uint32_t ISPR[1U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[31U];
+  __IOM uint32_t ICPR[1U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[31U];
+        uint32_t RESERVED4[64U];
+  __IOM uint32_t IP[8U];                 /*!< Offset: 0x300 (R/W)  Interrupt Priority Register */
+}  NVIC_Type;
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t SHP[2U];                /*!< Offset: 0x01C (R/W)  System Handlers Priority Registers. [0] is RESERVED */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+        uint32_t RESERVED1[154U];
+  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   8U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0xFFFFFFUL << MPU_RBAR_ADDR_Pos)              /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    SC000 Core Debug Registers (DCB registers, SHCSR, and DFSR) are only accessible over DAP and not via processor.
+            Therefore they are not covered by the SC000 header file.
+  @{
+ */
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+/*#define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping   not available for SC000 */
+/*#define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping   not available for SC000 */
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+/*#define NVIC_GetActive              __NVIC_GetActive             not available for SC000 */
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/* Interrupt Priorities are WORD accessible only under Armv6-M                  */
+/* The following MACROS handle generation of the register offset and byte masks */
+#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &  0x03UL) * 8UL)
+#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) & 0x0FUL)-8UL) >>    2UL)      )
+#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                >>    2UL)      )
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[0U] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[0U] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[_IP_IDX(IRQn)]  = ((uint32_t)(NVIC->IP[_IP_IDX(IRQn)]  & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+  else
+  {
+    SCB->SHP[_SHP_IDX(IRQn)] = ((uint32_t)(SCB->SHP[_SHP_IDX(IRQn)] & ~(0xFFUL << _BIT_SHIFT(IRQn))) |
+       (((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL) << _BIT_SHIFT(IRQn)));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IP[ _IP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return((uint32_t)(((SCB->SHP[_SHP_IDX(IRQn)] >> _BIT_SHIFT(IRQn) ) & (uint32_t)0xFFUL) >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M0 and M0+ do not require the architectural barrier - assume SC000 is the same */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                 SCB_AIRCR_SYSRESETREQ_Msk);
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_SC000_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_sc300.h b/Libraries/CMSIS/Core/Include/core_sc300.h
similarity index 97%
rename from Libraries/CMSIS/Include/core_sc300.h
rename to Libraries/CMSIS/Core/Include/core_sc300.h
index ad031f23..d6662103 100644
--- a/Libraries/CMSIS/Include/core_sc300.h
+++ b/Libraries/CMSIS/Core/Include/core_sc300.h
@@ -1,1912 +1,1917 @@
-/**************************************************************************//**
- * @file     core_sc300.h
- * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
- * @version  V5.0.8
- * @date     31. May 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2009-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_SC300_H_GENERIC
-#define __CORE_SC300_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup SC3000
-  @{
- */
-
-#include "cmsis_version.h"
-
-/*  CMSIS SC300 definitions */
-#define __SC300_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __SC300_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN << 16U) | \
-                                      __SC300_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_SC                 (300U)                                   /*!< Cortex secure core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    This core does not support an FPU at all
-*/
-#define __FPU_USED       0U
-
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC300_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_SC300_H_DEPENDANT
-#define __CORE_SC300_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __SC300_REV
-    #define __SC300_REV               0x0000U
-    #warning "__SC300_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group SC300 */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
-    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
-    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
-    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
-#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
-#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
-    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[24U];
-  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RESERVED1[24U];
-  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[24U];
-  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[24U];
-  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[56U];
-  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED5[644U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-        uint32_t RESERVED0[5U];
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-        uint32_t RESERVED1[129U];
-  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
-#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
-#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
-
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
-#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
-#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
-#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/* Auxiliary Control Register Definitions */
-#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
-#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
-
-#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
-#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
-
-#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
-#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[32U];
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[6U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
-#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Mask Register Definitions */
-#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
-#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
-#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
-
-#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
-#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
-#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
-
-#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
-#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
-
-#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
-#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
-
-#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
-#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
-
-#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
-#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
-#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
-
-#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
-#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
-#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
-
-#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
-#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
-  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
-  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
-  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
-} MPU_Type;
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
-#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
-
-#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
-#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
-
-/* MPU Region Attribute and Size Register Definitions */
-#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
-#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
-
-#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
-#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
-
-#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
-#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
-
-#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
-#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
-
-#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
-#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
-
-#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
-#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
-
-#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
-#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
-
-#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
-#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
-
-#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
-#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
-
-#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
-#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
-#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
-#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
-#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
-#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
-#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
-#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
-#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
-
-#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
-#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
-#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
-#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
-#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
-#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
-#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
-#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
-  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
-#endif
-
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-/* The following EXC_RETURN values are saved the LR on exception entry */
-#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
-#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
-#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    __COMPILER_BARRIER();
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __COMPILER_BARRIER();
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  (* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;
-  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t vectors = (uint32_t )SCB->VTOR;
-  return (uint32_t)(* (int *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-    return 0U;           /* No FPU */
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_SC300_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_sc300.h
+ * @brief    CMSIS SC300 Core Peripheral Access Layer Header File
+ * @version  V5.0.10
+ * @date     04. June 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_SC300_H_GENERIC
+#define __CORE_SC300_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup SC3000
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/* CMSIS SC300 definitions */
+#define __SC300_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __SC300_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                 /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN << 16U) | \
+                                      __SC300_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
+
+#define __CORTEX_SC                 (300U)                                   /*!< Cortex secure core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    This core does not support an FPU at all
+*/
+#define __FPU_USED       0U
+
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined __ARM_FP
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined __TI_VFP_SUPPORT__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined __FPU_VFP__
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_SC300_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_SC300_H_DEPENDANT
+#define __CORE_SC300_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __SC300_REV
+    #define __SC300_REV               0x0000U
+    #warning "__SC300_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __VTOR_PRESENT
+    #define __VTOR_PRESENT             1U
+    #warning "__VTOR_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group SC300 */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:27;              /*!< bit:  0..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:1;               /*!< bit:      9  Reserved */
+    uint32_t ICI_IT_1:6;                 /*!< bit: 10..15  ICI/IT part 1 */
+    uint32_t _reserved1:8;               /*!< bit: 16..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit */
+    uint32_t ICI_IT_2:2;                 /*!< bit: 25..26  ICI/IT part 2 */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_ICI_IT_2_Pos                  25U                                            /*!< xPSR: ICI/IT part 2 Position */
+#define xPSR_ICI_IT_2_Msk                  (3UL << xPSR_ICI_IT_2_Pos)                     /*!< xPSR: ICI/IT part 2 Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_ICI_IT_1_Pos                  10U                                            /*!< xPSR: ICI/IT part 1 Position */
+#define xPSR_ICI_IT_1_Msk                  (0x3FUL << xPSR_ICI_IT_1_Pos)                  /*!< xPSR: ICI/IT part 1 Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack to be used */
+    uint32_t _reserved1:30;              /*!< bit:  2..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[8U];               /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[24U];
+  __IOM uint32_t ICER[8U];               /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RESERVED1[24U];
+  __IOM uint32_t ISPR[8U];               /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[24U];
+  __IOM uint32_t ICPR[8U];               /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[24U];
+  __IOM uint32_t IABR[8U];               /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[56U];
+  __IOM uint8_t  IP[240U];               /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED5[644U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHP[12U];               /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t PFR[2U];                /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t DFR;                    /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ADR;                    /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t MMFR[4U];               /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ISAR[5U];               /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[5U];
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+        uint32_t RESERVED1[129U];
+  __IOM uint32_t SFCR;                   /*!< Offset: 0x290 (R/W)  Security Features Control Register */
+} SCB_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_NMIPENDSET_Pos            31U                                            /*!< SCB ICSR: NMIPENDSET Position */
+#define SCB_ICSR_NMIPENDSET_Msk            (1UL << SCB_ICSR_NMIPENDSET_Pos)               /*!< SCB ICSR: NMIPENDSET Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLBASE_Pos               29U                                            /*!< SCB VTOR: TBLBASE Position */
+#define SCB_VTOR_TBLBASE_Msk               (1UL << SCB_VTOR_TBLBASE_Pos)                  /*!< SCB VTOR: TBLBASE Mask */
+
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x3FFFFFUL << SCB_VTOR_TBLOFF_Pos)            /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+#define SCB_AIRCR_VECTRESET_Pos             0U                                            /*!< SCB AIRCR: VECTRESET Position */
+#define SCB_AIRCR_VECTRESET_Msk            (1UL /*<< SCB_AIRCR_VECTRESET_Pos*/)           /*!< SCB AIRCR: VECTRESET Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_STKALIGN_Pos                9U                                            /*!< SCB CCR: STKALIGN Position */
+#define SCB_CCR_STKALIGN_Msk               (1UL << SCB_CCR_STKALIGN_Pos)                  /*!< SCB CCR: STKALIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+#define SCB_CCR_NONBASETHRDENA_Pos          0U                                            /*!< SCB CCR: NONBASETHRDENA Position */
+#define SCB_CCR_NONBASETHRDENA_Msk         (1UL /*<< SCB_CCR_NONBASETHRDENA_Pos*/)        /*!< SCB CCR: NONBASETHRDENA Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 7U)                 /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_CFSR_MEMFAULTSR_Pos + 4U)                 /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_CFSR_MEMFAULTSR_Pos + 3U)                 /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 1U)                 /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_CFSR_MEMFAULTSR_Pos + 0U)                 /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/* Auxiliary Control Register Definitions */
+#define SCnSCB_ACTLR_DISFOLD_Pos            2U                                         /*!< ACTLR: DISFOLD Position */
+#define SCnSCB_ACTLR_DISFOLD_Msk           (1UL << SCnSCB_ACTLR_DISFOLD_Pos)           /*!< ACTLR: DISFOLD Mask */
+
+#define SCnSCB_ACTLR_DISDEFWBUF_Pos         1U                                         /*!< ACTLR: DISDEFWBUF Position */
+#define SCnSCB_ACTLR_DISDEFWBUF_Msk        (1UL << SCnSCB_ACTLR_DISDEFWBUF_Pos)        /*!< ACTLR: DISDEFWBUF Mask */
+
+#define SCnSCB_ACTLR_DISMCYCINT_Pos         0U                                         /*!< ACTLR: DISMCYCINT Position */
+#define SCnSCB_ACTLR_DISMCYCINT_Msk        (1UL /*<< SCnSCB_ACTLR_DISMCYCINT_Pos*/)    /*!< ACTLR: DISMCYCINT Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[6U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TraceBusID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TraceBusID_Msk             (0x7FUL << ITM_TCR_TraceBusID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPrescale_Pos              8U                                            /*!< ITM TCR: TSPrescale Position */
+#define ITM_TCR_TSPrescale_Msk             (3UL << ITM_TCR_TSPrescale_Pos)                /*!< ITM TCR: TSPrescale Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+  __IOM uint32_t MASK0;                  /*!< Offset: 0x024 (R/W)  Mask Register 0 */
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+  __IOM uint32_t MASK1;                  /*!< Offset: 0x034 (R/W)  Mask Register 1 */
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+  __IOM uint32_t MASK2;                  /*!< Offset: 0x044 (R/W)  Mask Register 2 */
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+  __IOM uint32_t MASK3;                  /*!< Offset: 0x054 (R/W)  Mask Register 3 */
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Mask Register Definitions */
+#define DWT_MASK_MASK_Pos                   0U                                         /*!< DWT MASK: MASK Position */
+#define DWT_MASK_MASK_Msk                  (0x1FUL /*<< DWT_MASK_MASK_Pos*/)           /*!< DWT MASK: MASK Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVADDR1_Pos        16U                                         /*!< DWT FUNCTION: DATAVADDR1 Position */
+#define DWT_FUNCTION_DATAVADDR1_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR1_Pos)      /*!< DWT FUNCTION: DATAVADDR1 Mask */
+
+#define DWT_FUNCTION_DATAVADDR0_Pos        12U                                         /*!< DWT FUNCTION: DATAVADDR0 Position */
+#define DWT_FUNCTION_DATAVADDR0_Msk        (0xFUL << DWT_FUNCTION_DATAVADDR0_Pos)      /*!< DWT FUNCTION: DATAVADDR0 Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_LNK1ENA_Pos            9U                                         /*!< DWT FUNCTION: LNK1ENA Position */
+#define DWT_FUNCTION_LNK1ENA_Msk           (0x1UL << DWT_FUNCTION_LNK1ENA_Pos)         /*!< DWT FUNCTION: LNK1ENA Mask */
+
+#define DWT_FUNCTION_DATAVMATCH_Pos         8U                                         /*!< DWT FUNCTION: DATAVMATCH Position */
+#define DWT_FUNCTION_DATAVMATCH_Msk        (0x1UL << DWT_FUNCTION_DATAVMATCH_Pos)      /*!< DWT FUNCTION: DATAVMATCH Mask */
+
+#define DWT_FUNCTION_CYCMATCH_Pos           7U                                         /*!< DWT FUNCTION: CYCMATCH Position */
+#define DWT_FUNCTION_CYCMATCH_Msk          (0x1UL << DWT_FUNCTION_CYCMATCH_Pos)        /*!< DWT FUNCTION: CYCMATCH Mask */
+
+#define DWT_FUNCTION_EMITRANGE_Pos          5U                                         /*!< DWT FUNCTION: EMITRANGE Position */
+#define DWT_FUNCTION_EMITRANGE_Msk         (0x1UL << DWT_FUNCTION_EMITRANGE_Pos)       /*!< DWT FUNCTION: EMITRANGE Mask */
+
+#define DWT_FUNCTION_FUNCTION_Pos           0U                                         /*!< DWT FUNCTION: FUNCTION Position */
+#define DWT_FUNCTION_FUNCTION_Msk          (0xFUL /*<< DWT_FUNCTION_FUNCTION_Pos*/)    /*!< DWT FUNCTION: FUNCTION Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
+  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
+  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration ETM Data Register Definitions (FIFO0) */
+#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
+#define TPI_FIFO0_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
+
+#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
+#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
+
+#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
+#define TPI_FIFO0_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
+
+#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
+#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
+
+#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
+#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
+
+#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
+#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
+
+#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
+#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
+
+/* TPI ITATBCTR2 Register Definitions */
+#define TPI_ITATBCTR2_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY2 Position */
+#define TPI_ITATBCTR2_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY2_Pos*/)   /*!< TPI ITATBCTR2: ATREADY2 Mask */
+
+#define TPI_ITATBCTR2_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR2: ATREADY1 Position */
+#define TPI_ITATBCTR2_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR2_ATREADY1_Pos*/)   /*!< TPI ITATBCTR2: ATREADY1 Mask */
+
+/* TPI Integration ITM Data Register Definitions (FIFO1) */
+#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
+#define TPI_FIFO1_ITM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
+
+#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
+#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
+
+#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
+#define TPI_FIFO1_ETM_ATVALID_Msk          (0x1UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
+
+#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
+#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
+
+#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
+#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
+
+#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
+#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
+
+#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
+#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
+
+/* TPI ITATBCTR0 Register Definitions */
+#define TPI_ITATBCTR0_ATREADY2_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY2 Position */
+#define TPI_ITATBCTR0_ATREADY2_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY2_Pos*/)   /*!< TPI ITATBCTR0: ATREADY2 Mask */
+
+#define TPI_ITATBCTR0_ATREADY1_Pos          0U                                         /*!< TPI ITATBCTR0: ATREADY1 Position */
+#define TPI_ITATBCTR0_ATREADY1_Msk         (0x1UL /*<< TPI_ITATBCTR0_ATREADY1_Pos*/)   /*!< TPI ITATBCTR0: ATREADY1 Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
+#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
+
+#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
+#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region RNRber Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RASR;                   /*!< Offset: 0x010 (R/W)  MPU Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Alias 1 Region Base Address Register */
+  __IOM uint32_t RASR_A1;                /*!< Offset: 0x018 (R/W)  MPU Alias 1 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Alias 2 Region Base Address Register */
+  __IOM uint32_t RASR_A2;                /*!< Offset: 0x020 (R/W)  MPU Alias 2 Region Attribute and Size Register */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Alias 3 Region Base Address Register */
+  __IOM uint32_t RASR_A3;                /*!< Offset: 0x028 (R/W)  MPU Alias 3 Region Attribute and Size Register */
+} MPU_Type;
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
+#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
+
+#define MPU_RBAR_VALID_Pos                  4U                                            /*!< MPU RBAR: VALID Position */
+#define MPU_RBAR_VALID_Msk                 (1UL << MPU_RBAR_VALID_Pos)                    /*!< MPU RBAR: VALID Mask */
+
+#define MPU_RBAR_REGION_Pos                 0U                                            /*!< MPU RBAR: REGION Position */
+#define MPU_RBAR_REGION_Msk                (0xFUL /*<< MPU_RBAR_REGION_Pos*/)             /*!< MPU RBAR: REGION Mask */
+
+/* MPU Region Attribute and Size Register Definitions */
+#define MPU_RASR_ATTRS_Pos                 16U                                            /*!< MPU RASR: MPU Region Attribute field Position */
+#define MPU_RASR_ATTRS_Msk                 (0xFFFFUL << MPU_RASR_ATTRS_Pos)               /*!< MPU RASR: MPU Region Attribute field Mask */
+
+#define MPU_RASR_XN_Pos                    28U                                            /*!< MPU RASR: ATTRS.XN Position */
+#define MPU_RASR_XN_Msk                    (1UL << MPU_RASR_XN_Pos)                       /*!< MPU RASR: ATTRS.XN Mask */
+
+#define MPU_RASR_AP_Pos                    24U                                            /*!< MPU RASR: ATTRS.AP Position */
+#define MPU_RASR_AP_Msk                    (0x7UL << MPU_RASR_AP_Pos)                     /*!< MPU RASR: ATTRS.AP Mask */
+
+#define MPU_RASR_TEX_Pos                   19U                                            /*!< MPU RASR: ATTRS.TEX Position */
+#define MPU_RASR_TEX_Msk                   (0x7UL << MPU_RASR_TEX_Pos)                    /*!< MPU RASR: ATTRS.TEX Mask */
+
+#define MPU_RASR_S_Pos                     18U                                            /*!< MPU RASR: ATTRS.S Position */
+#define MPU_RASR_S_Msk                     (1UL << MPU_RASR_S_Pos)                        /*!< MPU RASR: ATTRS.S Mask */
+
+#define MPU_RASR_C_Pos                     17U                                            /*!< MPU RASR: ATTRS.C Position */
+#define MPU_RASR_C_Msk                     (1UL << MPU_RASR_C_Pos)                        /*!< MPU RASR: ATTRS.C Mask */
+
+#define MPU_RASR_B_Pos                     16U                                            /*!< MPU RASR: ATTRS.B Position */
+#define MPU_RASR_B_Msk                     (1UL << MPU_RASR_B_Pos)                        /*!< MPU RASR: ATTRS.B Mask */
+
+#define MPU_RASR_SRD_Pos                    8U                                            /*!< MPU RASR: Sub-Region Disable Position */
+#define MPU_RASR_SRD_Msk                   (0xFFUL << MPU_RASR_SRD_Pos)                   /*!< MPU RASR: Sub-Region Disable Mask */
+
+#define MPU_RASR_SIZE_Pos                   1U                                            /*!< MPU RASR: Region Size Field Position */
+#define MPU_RASR_SIZE_Msk                  (0x1FUL << MPU_RASR_SIZE_Pos)                  /*!< MPU RASR: Region Size Field Mask */
+
+#define MPU_RASR_ENABLE_Pos                 0U                                            /*!< MPU RASR: Region enable bit Position */
+#define MPU_RASR_ENABLE_Msk                (1UL /*<< MPU_RASR_ENABLE_Pos*/)               /*!< MPU RASR: Region enable bit Disable Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+#define SCS_BASE            (0xE000E000UL)                            /*!< System Control Space Base Address */
+#define ITM_BASE            (0xE0000000UL)                            /*!< ITM Base Address */
+#define DWT_BASE            (0xE0001000UL)                            /*!< DWT Base Address */
+#define TPI_BASE            (0xE0040000UL)                            /*!< TPI Base Address */
+#define CoreDebug_BASE      (0xE000EDF0UL)                            /*!< Core Debug Base Address */
+#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    /*!< SysTick Base Address */
+#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    /*!< NVIC Base Address */
+#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    /*!< System Control Block Base Address */
+
+#define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE      )   /*!< System control Register not in SCB */
+#define SCB                 ((SCB_Type       *)     SCB_BASE      )   /*!< SCB configuration struct */
+#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   /*!< SysTick configuration struct */
+#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   /*!< NVIC configuration struct */
+#define ITM                 ((ITM_Type       *)     ITM_BASE      )   /*!< ITM configuration struct */
+#define DWT                 ((DWT_Type       *)     DWT_BASE      )   /*!< DWT configuration struct */
+#define TPI                 ((TPI_Type       *)     TPI_BASE      )   /*!< TPI configuration struct */
+#define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE)   /*!< Core Debug configuration struct */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+  #define MPU_BASE          (SCS_BASE +  0x0D90UL)                    /*!< Memory Protection Unit */
+  #define MPU               ((MPU_Type       *)     MPU_BASE      )   /*!< Memory Protection Unit */
+#endif
+
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* The following EXC_RETURN values are saved the LR on exception entry */
+#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     /* return to Handler mode, uses MSP after return                               */
+#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     /* return to Thread mode, uses MSP after return                                */
+#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     /* return to Thread mode, uses PSP after return                                */
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IP[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IP[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  /* ARM Application Note 321 states that the M3 does not require the architectural barrier */
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses included
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+    return 0U;           /* No FPU */
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_SC300_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/core_armv81mml.h b/Libraries/CMSIS/Core/Include/core_star.h
similarity index 84%
rename from Libraries/CMSIS/Include/core_armv81mml.h
rename to Libraries/CMSIS/Core/Include/core_star.h
index 8cee9306..2bc9546f 100644
--- a/Libraries/CMSIS/Include/core_armv81mml.h
+++ b/Libraries/CMSIS/Core/Include/core_star.h
@@ -1,2968 +1,3378 @@
-/**************************************************************************//**
- * @file     core_armv81mml.h
- * @brief    CMSIS Armv8.1-M Mainline Core Peripheral Access Layer Header File
- * @version  V1.0.0
- * @date     15. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2018-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef __CORE_ARMV81MML_H_GENERIC
-#define __CORE_ARMV81MML_H_GENERIC
-
-#include <stdint.h>
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/**
-  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
-  CMSIS violates the following MISRA-C:2004 rules:
-
-   \li Required Rule 8.5, object/function definition in header file.<br>
-     Function definitions in header files are used to allow 'inlining'.
-
-   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
-     Unions are used for effective representation of core registers.
-
-   \li Advisory Rule 19.7, Function-like macro defined.<br>
-     Function-like macros are used to allow more efficient code.
- */
-
-
-/*******************************************************************************
- *                 CMSIS definitions
- ******************************************************************************/
-/**
-  \ingroup Cortex_ARMV81MML
-  @{
- */
-
-#include "cmsis_version.h"
- 
-#define __ARM_ARCH_8M_MAIN__    1  // patching for now
-/*  CMSIS ARMV81MML definitions */
-#define __ARMv81MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
-#define __ARMv81MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
-#define __ARMv81MML_CMSIS_VERSION       ((__ARMv81MML_CMSIS_VERSION_MAIN << 16U) | \
-                                         __ARMv81MML_CMSIS_VERSION_SUB           )  /*!< \deprecated CMSIS HAL version number */
-
-#define __CORTEX_M                     (81U)                                       /*!< Cortex-M Core */
-
-/** __FPU_USED indicates whether an FPU is used or not.
-    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
-*/
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-  
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-  #if defined __ARM_FP
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-
-#elif defined ( __GNUC__ )
-  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-  
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-  
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-  #if defined(__ARM_FEATURE_DSP)
-    #if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
-      #define __DSP_USED       1U
-    #else
-      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
-      #define __DSP_USED         0U    
-    #endif
-  #else
-    #define __DSP_USED         0U
-  #endif
-  
-#elif defined ( __TI_ARM__ )
-  #if defined __TI_VFP_SUPPORT__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __TASKING__ )
-  #if defined __FPU_VFP__
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#elif defined ( __CSMC__ )
-  #if ( __CSMC__ & 0x400U)
-    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
-      #define __FPU_USED       1U
-    #else
-      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
-      #define __FPU_USED       0U
-    #endif
-  #else
-    #define __FPU_USED         0U
-  #endif
-
-#endif
-
-#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV81MML_H_GENERIC */
-
-#ifndef __CMSIS_GENERIC
-
-#ifndef __CORE_ARMV81MML_H_DEPENDANT
-#define __CORE_ARMV81MML_H_DEPENDANT
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* check device defines and use defaults */
-#if defined __CHECK_DEVICE_DEFINES
-  #ifndef __ARMv81MML_REV
-    #define __ARMv81MML_REV               0x0000U
-    #warning "__ARMv81MML_REV not defined in device header file; using default!"
-  #endif
-
-  #ifndef __FPU_PRESENT
-    #define __FPU_PRESENT             0U
-    #warning "__FPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __MPU_PRESENT
-    #define __MPU_PRESENT             0U
-    #warning "__MPU_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __SAUREGION_PRESENT
-    #define __SAUREGION_PRESENT       0U
-    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __DSP_PRESENT
-    #define __DSP_PRESENT             0U
-    #warning "__DSP_PRESENT not defined in device header file; using default!"
-  #endif
-
-  #ifndef __NVIC_PRIO_BITS
-    #define __NVIC_PRIO_BITS          3U
-    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
-  #endif
-
-  #ifndef __Vendor_SysTickConfig
-    #define __Vendor_SysTickConfig    0U
-    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
-  #endif
-#endif
-
-/* IO definitions (access restrictions to peripheral registers) */
-/**
-    \defgroup CMSIS_glob_defs CMSIS Global Defines
-
-    <strong>IO Type Qualifiers</strong> are used
-    \li to specify the access to peripheral variables.
-    \li for automatic generation of peripheral register debug information.
-*/
-#ifdef __cplusplus
-  #define   __I     volatile             /*!< Defines 'read only' permissions */
-#else
-  #define   __I     volatile const       /*!< Defines 'read only' permissions */
-#endif
-#define     __O     volatile             /*!< Defines 'write only' permissions */
-#define     __IO    volatile             /*!< Defines 'read / write' permissions */
-
-/* following defines should be used for structure members */
-#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
-#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
-#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
-
-/*@} end of group ARMv81MML */
-
-
-
-/*******************************************************************************
- *                 Register Abstraction
-  Core Register contain:
-  - Core Register
-  - Core NVIC Register
-  - Core SCB Register
-  - Core SysTick Register
-  - Core Debug Register
-  - Core MPU Register
-  - Core SAU Register
-  - Core FPU Register
- ******************************************************************************/
-/**
-  \defgroup CMSIS_core_register Defines and Type Definitions
-  \brief Type definitions and defines for Cortex-M processor based devices.
-*/
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_CORE  Status and Control Registers
-  \brief      Core Register type definitions.
-  @{
- */
-
-/**
-  \brief  Union type to access the Application Program Status Register (APSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} APSR_Type;
-
-/* APSR Register Definitions */
-#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
-#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
-
-#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
-#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
-
-#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
-#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
-
-#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
-#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
-
-#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
-#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
-
-#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
-#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
-
-
-/**
-  \brief  Union type to access the Interrupt Program Status Register (IPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} IPSR_Type;
-
-/* IPSR Register Definitions */
-#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
-#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
-    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
-    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
-    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
-    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
-    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
-    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
-    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
-    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
-    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
-    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} xPSR_Type;
-
-/* xPSR Register Definitions */
-#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
-#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
-
-#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
-#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
-
-#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
-#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
-
-#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
-#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
-
-#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
-#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
-
-#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
-#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
-
-#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
-#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
-
-#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
-#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
-
-#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
-#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
-
-
-/**
-  \brief  Union type to access the Control Registers (CONTROL).
- */
-typedef union
-{
-  struct
-  {
-    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
-    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
-    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
-    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
-    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
-  } b;                                   /*!< Structure used for bit  access */
-  uint32_t w;                            /*!< Type      used for word access */
-} CONTROL_Type;
-
-/* CONTROL Register Definitions */
-#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
-#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
-
-#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
-#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
-
-#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
-#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
-
-#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
-#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
-
-/*@} end of group CMSIS_CORE */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
-  \brief      Type definitions for the NVIC Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
- */
-typedef struct
-{
-  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
-        uint32_t RESERVED0[16U];
-  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
-        uint32_t RSERVED1[16U];
-  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
-        uint32_t RESERVED2[16U];
-  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
-        uint32_t RESERVED3[16U];
-  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
-        uint32_t RESERVED4[16U];
-  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
-        uint32_t RESERVED5[16U];
-  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
-        uint32_t RESERVED6[580U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
-}  NVIC_Type;
-
-/* Software Triggered Interrupt Register Definitions */
-#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
-#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_NVIC */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCB     System Control Block (SCB)
-  \brief    Type definitions for the System Control Block Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control Block (SCB).
- */
-typedef struct
-{
-  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
-  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
-  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
-  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
-  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
-  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
-  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
-  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
-  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
-  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
-  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
-  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
-  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
-  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
-  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
-  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
-  __IM  uint32_t ID_ADR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
-  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
-  __IM  uint32_t ID_ISAR[6U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
-  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
-  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
-  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
-  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
-  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
-  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
-        uint32_t RESERVED3[92U];
-  __OM  uint32_t STIR;                   /*!< Offset: 0x200 ( /W)  Software Triggered Interrupt Register */
-        uint32_t RESERVED4[15U];
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
-  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
-        uint32_t RESERVED5[1U];
-  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
-        uint32_t RESERVED6[1U];
-  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
-  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
-  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
-  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
-  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
-  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
-  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
-  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
-        uint32_t RESERVED7[6U];
-  __IOM uint32_t ITCMCR;                 /*!< Offset: 0x290 (R/W)  Instruction Tightly-Coupled Memory Control Register */
-  __IOM uint32_t DTCMCR;                 /*!< Offset: 0x294 (R/W)  Data Tightly-Coupled Memory Control Registers */
-  __IOM uint32_t AHBPCR;                 /*!< Offset: 0x298 (R/W)  AHBP Control Register */
-  __IOM uint32_t CACR;                   /*!< Offset: 0x29C (R/W)  L1 Cache Control Register */
-  __IOM uint32_t AHBSCR;                 /*!< Offset: 0x2A0 (R/W)  AHB Slave Control Register */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t ABFSR;                  /*!< Offset: 0x2A8 (R/W)  Auxiliary Bus Fault Status Register */
-} SCB_Type;
-
-/* SCB CPUID Register Definitions */
-#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
-#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
-
-#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
-#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
-
-#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
-#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
-
-#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
-#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
-
-#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
-#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
-
-/* SCB Interrupt Control State Register Definitions */
-#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
-#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
-
-#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
-#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
-
-#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
-#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
-
-#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
-#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
-
-#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
-#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
-
-#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
-#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
-
-#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
-#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
-
-#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
-#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
-
-#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
-#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
-
-#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
-#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
-
-#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
-#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
-
-#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
-#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
-
-#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
-#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
-
-/* SCB Vector Table Offset Register Definitions */
-#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
-#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
-
-/* SCB Application Interrupt and Reset Control Register Definitions */
-#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
-#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
-
-#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
-#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
-
-#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
-#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
-
-#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
-#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
-
-#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
-#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
-
-#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
-#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
-
-#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
-#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
-
-#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
-#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
-
-#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
-#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
-
-/* SCB System Control Register Definitions */
-#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
-#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
-
-#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
-#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
-
-#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
-#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
-
-#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
-#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
-
-/* SCB Configuration Control Register Definitions */
-#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
-#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
-
-#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
-#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
-
-#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
-#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
-
-#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
-#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
-
-#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
-#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
-
-#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
-#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
-
-#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
-#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
-
-#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
-#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
-
-/* SCB System Handler Control and State Register Definitions */
-#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
-#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
-#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
-
-#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
-#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
-
-#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
-#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
-
-#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
-#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
-
-#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
-#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
-
-#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
-#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
-
-#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
-#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
-
-#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
-#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
-
-#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
-#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
-
-#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
-#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
-
-#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
-#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
-
-#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
-#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
-
-#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
-#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
-
-#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
-#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
-
-#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
-#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
-
-#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
-#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
-
-#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
-#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
-
-#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
-#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
-
-#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
-#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
-
-/* SCB Configurable Fault Status Register Definitions */
-#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
-#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
-
-#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
-#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
-
-#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
-#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
-
-/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
-#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
-
-#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
-#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
-
-#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
-#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
-
-#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
-#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
-
-#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
-#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
-
-#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
-#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
-
-/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
-#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
-
-#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
-#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
-
-#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
-#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
-
-#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
-#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
-
-#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
-#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
-
-#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
-#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
-
-#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
-#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
-
-/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
-#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
-#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
-
-#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
-#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
-
-#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
-#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
-
-#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
-#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
-
-#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
-#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
-
-#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
-#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
-
-#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
-#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
-
-/* SCB Hard Fault Status Register Definitions */
-#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
-#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
-
-#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
-#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
-
-#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
-#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
-
-/* SCB Debug Fault Status Register Definitions */
-#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
-#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
-
-#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
-#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
-
-#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
-#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
-
-#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
-#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
-
-#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
-#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
-
-/* SCB Non-Secure Access Control Register Definitions */
-#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
-#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
-
-#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
-#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
-
-#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
-#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
-
-/* SCB Cache Level ID Register Definitions */
-#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
-#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
-
-#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
-#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
-
-/* SCB Cache Type Register Definitions */
-#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
-#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
-
-#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
-#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
-
-#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
-#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
-
-#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
-#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
-
-#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
-#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
-
-/* SCB Cache Size ID Register Definitions */
-#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
-#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
-
-#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
-#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
-
-#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
-#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
-
-#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
-#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
-
-#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
-#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
-
-#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
-#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
-
-#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
-#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
-
-/* SCB Cache Size Selection Register Definitions */
-#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
-#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
-
-#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
-#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
-
-/* SCB Software Triggered Interrupt Register Definitions */
-#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
-#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
-
-/* SCB D-Cache Invalidate by Set-way Register Definitions */
-#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
-#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
-
-#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
-#define SCB_DCISW_SET_Msk                  (0x1FFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
-
-/* SCB D-Cache Clean by Set-way Register Definitions */
-#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
-#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
-
-#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
-#define SCB_DCCSW_SET_Msk                  (0x1FFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
-
-/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
-#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
-#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
-
-#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
-#define SCB_DCCISW_SET_Msk                 (0x1FFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
-
-/* Instruction Tightly-Coupled Memory Control Register Definitions */
-#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
-#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
-
-#define SCB_ITCMCR_RETEN_Pos                2U                                            /*!< SCB ITCMCR: RETEN Position */
-#define SCB_ITCMCR_RETEN_Msk               (1UL << SCB_ITCMCR_RETEN_Pos)                  /*!< SCB ITCMCR: RETEN Mask */
-
-#define SCB_ITCMCR_RMW_Pos                  1U                                            /*!< SCB ITCMCR: RMW Position */
-#define SCB_ITCMCR_RMW_Msk                 (1UL << SCB_ITCMCR_RMW_Pos)                    /*!< SCB ITCMCR: RMW Mask */
-
-#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
-#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
-
-/* Data Tightly-Coupled Memory Control Register Definitions */
-#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
-#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
-
-#define SCB_DTCMCR_RETEN_Pos                2U                                            /*!< SCB DTCMCR: RETEN Position */
-#define SCB_DTCMCR_RETEN_Msk               (1UL << SCB_DTCMCR_RETEN_Pos)                   /*!< SCB DTCMCR: RETEN Mask */
-
-#define SCB_DTCMCR_RMW_Pos                  1U                                            /*!< SCB DTCMCR: RMW Position */
-#define SCB_DTCMCR_RMW_Msk                 (1UL << SCB_DTCMCR_RMW_Pos)                    /*!< SCB DTCMCR: RMW Mask */
-
-#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
-#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
-
-/* AHBP Control Register Definitions */
-#define SCB_AHBPCR_SZ_Pos                   1U                                            /*!< SCB AHBPCR: SZ Position */
-#define SCB_AHBPCR_SZ_Msk                  (7UL << SCB_AHBPCR_SZ_Pos)                     /*!< SCB AHBPCR: SZ Mask */
-
-#define SCB_AHBPCR_EN_Pos                   0U                                            /*!< SCB AHBPCR: EN Position */
-#define SCB_AHBPCR_EN_Msk                  (1UL /*<< SCB_AHBPCR_EN_Pos*/)                 /*!< SCB AHBPCR: EN Mask */
-
-/* L1 Cache Control Register Definitions */
-#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
-#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
-
-#define SCB_CACR_ECCEN_Pos                  1U                                            /*!< SCB CACR: ECCEN Position */
-#define SCB_CACR_ECCEN_Msk                 (1UL << SCB_CACR_ECCEN_Pos)                    /*!< SCB CACR: ECCEN Mask */
-
-#define SCB_CACR_SIWT_Pos                   0U                                            /*!< SCB CACR: SIWT Position */
-#define SCB_CACR_SIWT_Msk                  (1UL /*<< SCB_CACR_SIWT_Pos*/)                 /*!< SCB CACR: SIWT Mask */
-
-/* AHBS Control Register Definitions */
-#define SCB_AHBSCR_INITCOUNT_Pos           11U                                            /*!< SCB AHBSCR: INITCOUNT Position */
-#define SCB_AHBSCR_INITCOUNT_Msk           (0x1FUL << SCB_AHBPCR_INITCOUNT_Pos)           /*!< SCB AHBSCR: INITCOUNT Mask */
-
-#define SCB_AHBSCR_TPRI_Pos                 2U                                            /*!< SCB AHBSCR: TPRI Position */
-#define SCB_AHBSCR_TPRI_Msk                (0x1FFUL << SCB_AHBPCR_TPRI_Pos)               /*!< SCB AHBSCR: TPRI Mask */
-
-#define SCB_AHBSCR_CTL_Pos                  0U                                            /*!< SCB AHBSCR: CTL Position*/
-#define SCB_AHBSCR_CTL_Msk                 (3UL /*<< SCB_AHBPCR_CTL_Pos*/)                /*!< SCB AHBSCR: CTL Mask */
-
-/* Auxiliary Bus Fault Status Register Definitions */
-#define SCB_ABFSR_AXIMTYPE_Pos              8U                                            /*!< SCB ABFSR: AXIMTYPE Position*/
-#define SCB_ABFSR_AXIMTYPE_Msk             (3UL << SCB_ABFSR_AXIMTYPE_Pos)                /*!< SCB ABFSR: AXIMTYPE Mask */
-
-#define SCB_ABFSR_EPPB_Pos                  4U                                            /*!< SCB ABFSR: EPPB Position*/
-#define SCB_ABFSR_EPPB_Msk                 (1UL << SCB_ABFSR_EPPB_Pos)                    /*!< SCB ABFSR: EPPB Mask */
-
-#define SCB_ABFSR_AXIM_Pos                  3U                                            /*!< SCB ABFSR: AXIM Position*/
-#define SCB_ABFSR_AXIM_Msk                 (1UL << SCB_ABFSR_AXIM_Pos)                    /*!< SCB ABFSR: AXIM Mask */
-
-#define SCB_ABFSR_AHBP_Pos                  2U                                            /*!< SCB ABFSR: AHBP Position*/
-#define SCB_ABFSR_AHBP_Msk                 (1UL << SCB_ABFSR_AHBP_Pos)                    /*!< SCB ABFSR: AHBP Mask */
-
-#define SCB_ABFSR_DTCM_Pos                  1U                                            /*!< SCB ABFSR: DTCM Position*/
-#define SCB_ABFSR_DTCM_Msk                 (1UL << SCB_ABFSR_DTCM_Pos)                    /*!< SCB ABFSR: DTCM Mask */
-
-#define SCB_ABFSR_ITCM_Pos                  0U                                            /*!< SCB ABFSR: ITCM Position*/
-#define SCB_ABFSR_ITCM_Msk                 (1UL /*<< SCB_ABFSR_ITCM_Pos*/)                /*!< SCB ABFSR: ITCM Mask */
-
-/*@} end of group CMSIS_SCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
-  \brief    Type definitions for the System Control and ID Register not in the SCB
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Control and ID Register not in the SCB.
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
-  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
-  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
-} SCnSCB_Type;
-
-/* Interrupt Controller Type Register Definitions */
-#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
-#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
-
-/*@} end of group CMSIS_SCnotSCB */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
-  \brief    Type definitions for the System Timer Registers.
-  @{
- */
-
-/**
-  \brief  Structure type to access the System Timer (SysTick).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
-  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
-  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
-  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
-} SysTick_Type;
-
-/* SysTick Control / Status Register Definitions */
-#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
-#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
-
-#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
-#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
-
-#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
-#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
-
-#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
-#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
-
-/* SysTick Reload Register Definitions */
-#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
-#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
-
-/* SysTick Current Register Definitions */
-#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
-#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
-
-/* SysTick Calibration Register Definitions */
-#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
-#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
-
-#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
-#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
-
-#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
-#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
-
-/*@} end of group CMSIS_SysTick */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
-  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
- */
-typedef struct
-{
-  __OM  union
-  {
-    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
-    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
-    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
-  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
-        uint32_t RESERVED0[864U];
-  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
-        uint32_t RESERVED1[15U];
-  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
-        uint32_t RESERVED2[15U];
-  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
-        uint32_t RESERVED3[29U];
-  __OM  uint32_t IWR;                    /*!< Offset: 0xEF8 ( /W)  ITM Integration Write Register */
-  __IM  uint32_t IRR;                    /*!< Offset: 0xEFC (R/ )  ITM Integration Read Register */
-  __IOM uint32_t IMCR;                   /*!< Offset: 0xF00 (R/W)  ITM Integration Mode Control Register */
-        uint32_t RESERVED4[43U];
-  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
-        uint32_t RESERVED5[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
-        uint32_t RESERVED6[4U];
-  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
-  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
-  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
-  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
-  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
-  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
-  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
-  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
-  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
-  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
-  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
-  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
-} ITM_Type;
-
-/* ITM Stimulus Port Register Definitions */
-#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
-#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
-
-#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
-#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
-
-/* ITM Trace Privilege Register Definitions */
-#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
-#define ITM_TPR_PRIVMASK_Msk               (0xFUL /*<< ITM_TPR_PRIVMASK_Pos*/)            /*!< ITM TPR: PRIVMASK Mask */
-
-/* ITM Trace Control Register Definitions */
-#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
-#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
-
-#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
-#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
-
-#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
-#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
-
-#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
-#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
-
-#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
-#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
-
-#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
-#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
-
-#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
-#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
-
-#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
-#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
-
-#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
-#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
-
-#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
-#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
-
-/* ITM Integration Write Register Definitions */
-#define ITM_IWR_ATVALIDM_Pos                0U                                            /*!< ITM IWR: ATVALIDM Position */
-#define ITM_IWR_ATVALIDM_Msk               (1UL /*<< ITM_IWR_ATVALIDM_Pos*/)              /*!< ITM IWR: ATVALIDM Mask */
-
-/* ITM Integration Read Register Definitions */
-#define ITM_IRR_ATREADYM_Pos                0U                                            /*!< ITM IRR: ATREADYM Position */
-#define ITM_IRR_ATREADYM_Msk               (1UL /*<< ITM_IRR_ATREADYM_Pos*/)              /*!< ITM IRR: ATREADYM Mask */
-
-/* ITM Integration Mode Control Register Definitions */
-#define ITM_IMCR_INTEGRATION_Pos            0U                                            /*!< ITM IMCR: INTEGRATION Position */
-#define ITM_IMCR_INTEGRATION_Msk           (1UL /*<< ITM_IMCR_INTEGRATION_Pos*/)          /*!< ITM IMCR: INTEGRATION Mask */
-
-/* ITM Lock Status Register Definitions */
-#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
-#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
-
-#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
-#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
-
-#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
-#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
-
-/*@}*/ /* end of group CMSIS_ITM */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
-  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
-  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
-  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
-  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
-  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
-  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
-  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
-  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
-  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
-        uint32_t RESERVED1[1U];
-  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
-        uint32_t RESERVED2[1U];
-  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
-        uint32_t RESERVED3[1U];
-  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
-        uint32_t RESERVED5[1U];
-  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
-        uint32_t RESERVED6[1U];
-  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
-        uint32_t RESERVED7[1U];
-  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
-        uint32_t RESERVED8[1U];
-  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
-        uint32_t RESERVED9[1U];
-  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
-        uint32_t RESERVED10[1U];
-  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
-        uint32_t RESERVED11[1U];
-  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
-        uint32_t RESERVED12[1U];
-  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
-        uint32_t RESERVED13[1U];
-  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
-        uint32_t RESERVED14[1U];
-  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
-        uint32_t RESERVED15[1U];
-  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
-        uint32_t RESERVED16[1U];
-  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
-        uint32_t RESERVED17[1U];
-  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
-        uint32_t RESERVED18[1U];
-  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
-        uint32_t RESERVED19[1U];
-  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
-        uint32_t RESERVED20[1U];
-  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
-        uint32_t RESERVED21[1U];
-  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
-        uint32_t RESERVED22[1U];
-  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
-        uint32_t RESERVED23[1U];
-  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
-        uint32_t RESERVED24[1U];
-  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
-        uint32_t RESERVED25[1U];
-  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
-        uint32_t RESERVED26[1U];
-  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
-        uint32_t RESERVED27[1U];
-  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
-        uint32_t RESERVED28[1U];
-  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
-        uint32_t RESERVED29[1U];
-  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
-        uint32_t RESERVED30[1U];
-  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
-        uint32_t RESERVED31[1U];
-  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
-        uint32_t RESERVED32[934U];
-  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
-        uint32_t RESERVED33[1U];
-  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
-} DWT_Type;
-
-/* DWT Control Register Definitions */
-#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
-#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
-
-#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
-#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
-
-#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
-#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
-
-#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
-#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
-
-#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
-#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
-
-#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
-#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
-
-#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
-#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
-
-#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
-#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
-
-#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
-#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
-
-#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
-#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
-
-#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
-#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
-
-#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
-#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
-
-#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
-#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
-
-#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
-#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
-
-#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
-#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
-
-#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
-#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
-
-#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
-#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
-
-#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
-#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
-
-#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
-#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
-
-/* DWT CPI Count Register Definitions */
-#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
-#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
-
-/* DWT Exception Overhead Count Register Definitions */
-#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
-#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
-
-/* DWT Sleep Count Register Definitions */
-#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
-#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
-
-/* DWT LSU Count Register Definitions */
-#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
-#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
-
-/* DWT Folded-instruction Count Register Definitions */
-#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
-#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
-
-/* DWT Comparator Function Register Definitions */
-#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
-#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
-
-#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
-#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
-
-#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
-#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
-
-#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
-#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
-
-#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
-#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
-
-/*@}*/ /* end of group CMSIS_DWT */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
-  \brief    Type definitions for the Trace Port Interface (TPI)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Trace Port Interface Register (TPI).
- */
-typedef struct
-{
-  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Sizes Register */
-  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Sizes Register */
-        uint32_t RESERVED0[2U];
-  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
-        uint32_t RESERVED1[55U];
-  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
-        uint32_t RESERVED2[131U];
-  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
-  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
-  __IM  uint32_t FSCR;                   /*!< Offset: 0x308 (R/ )  Formatter Synchronization Counter Register */
-        uint32_t RESERVED3[759U];
-  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER */
-  __IM  uint32_t FIFO0;                  /*!< Offset: 0xEEC (R/ )  Integration ETM Data */
-  __IM  uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/ )  ITATBCTR2 */
-        uint32_t RESERVED4[1U];
-  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  ITATBCTR0 */
-  __IM  uint32_t FIFO1;                  /*!< Offset: 0xEFC (R/ )  Integration ITM Data */
-  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
-        uint32_t RESERVED5[39U];
-  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
-  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
-        uint32_t RESERVED7[8U];
-  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  TPIU_DEVID */
-  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  TPIU_DEVTYPE */
-} TPI_Type;
-
-/* TPI Asynchronous Clock Prescaler Register Definitions */
-#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
-#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
-
-/* TPI Selected Pin Protocol Register Definitions */
-#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
-#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
-
-/* TPI Formatter and Flush Status Register Definitions */
-#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
-#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
-
-#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
-#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
-
-#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
-#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
-
-#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
-#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
-
-/* TPI Formatter and Flush Control Register Definitions */
-#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
-#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
-
-#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
-#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
-
-/* TPI TRIGGER Register Definitions */
-#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
-#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
-
-/* TPI Integration ETM Data Register Definitions (FIFO0) */
-#define TPI_FIFO0_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO0: ITM_ATVALID Position */
-#define TPI_FIFO0_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ITM_ATVALID_Pos)        /*!< TPI FIFO0: ITM_ATVALID Mask */
-
-#define TPI_FIFO0_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO0: ITM_bytecount Position */
-#define TPI_FIFO0_ITM_bytecount_Msk        (0x3UL << TPI_FIFO0_ITM_bytecount_Pos)      /*!< TPI FIFO0: ITM_bytecount Mask */
-
-#define TPI_FIFO0_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO0: ETM_ATVALID Position */
-#define TPI_FIFO0_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO0_ETM_ATVALID_Pos)        /*!< TPI FIFO0: ETM_ATVALID Mask */
-
-#define TPI_FIFO0_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO0: ETM_bytecount Position */
-#define TPI_FIFO0_ETM_bytecount_Msk        (0x3UL << TPI_FIFO0_ETM_bytecount_Pos)      /*!< TPI FIFO0: ETM_bytecount Mask */
-
-#define TPI_FIFO0_ETM2_Pos                 16U                                         /*!< TPI FIFO0: ETM2 Position */
-#define TPI_FIFO0_ETM2_Msk                 (0xFFUL << TPI_FIFO0_ETM2_Pos)              /*!< TPI FIFO0: ETM2 Mask */
-
-#define TPI_FIFO0_ETM1_Pos                  8U                                         /*!< TPI FIFO0: ETM1 Position */
-#define TPI_FIFO0_ETM1_Msk                 (0xFFUL << TPI_FIFO0_ETM1_Pos)              /*!< TPI FIFO0: ETM1 Mask */
-
-#define TPI_FIFO0_ETM0_Pos                  0U                                         /*!< TPI FIFO0: ETM0 Position */
-#define TPI_FIFO0_ETM0_Msk                 (0xFFUL /*<< TPI_FIFO0_ETM0_Pos*/)          /*!< TPI FIFO0: ETM0 Mask */
-
-/* TPI ITATBCTR2 Register Definitions */
-#define TPI_ITATBCTR2_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR2: ATREADY Position */
-#define TPI_ITATBCTR2_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR2_ATREADY_Pos*/)    /*!< TPI ITATBCTR2: ATREADY Mask */
-
-/* TPI Integration ITM Data Register Definitions (FIFO1) */
-#define TPI_FIFO1_ITM_ATVALID_Pos          29U                                         /*!< TPI FIFO1: ITM_ATVALID Position */
-#define TPI_FIFO1_ITM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ITM_ATVALID_Pos)        /*!< TPI FIFO1: ITM_ATVALID Mask */
-
-#define TPI_FIFO1_ITM_bytecount_Pos        27U                                         /*!< TPI FIFO1: ITM_bytecount Position */
-#define TPI_FIFO1_ITM_bytecount_Msk        (0x3UL << TPI_FIFO1_ITM_bytecount_Pos)      /*!< TPI FIFO1: ITM_bytecount Mask */
-
-#define TPI_FIFO1_ETM_ATVALID_Pos          26U                                         /*!< TPI FIFO1: ETM_ATVALID Position */
-#define TPI_FIFO1_ETM_ATVALID_Msk          (0x3UL << TPI_FIFO1_ETM_ATVALID_Pos)        /*!< TPI FIFO1: ETM_ATVALID Mask */
-
-#define TPI_FIFO1_ETM_bytecount_Pos        24U                                         /*!< TPI FIFO1: ETM_bytecount Position */
-#define TPI_FIFO1_ETM_bytecount_Msk        (0x3UL << TPI_FIFO1_ETM_bytecount_Pos)      /*!< TPI FIFO1: ETM_bytecount Mask */
-
-#define TPI_FIFO1_ITM2_Pos                 16U                                         /*!< TPI FIFO1: ITM2 Position */
-#define TPI_FIFO1_ITM2_Msk                 (0xFFUL << TPI_FIFO1_ITM2_Pos)              /*!< TPI FIFO1: ITM2 Mask */
-
-#define TPI_FIFO1_ITM1_Pos                  8U                                         /*!< TPI FIFO1: ITM1 Position */
-#define TPI_FIFO1_ITM1_Msk                 (0xFFUL << TPI_FIFO1_ITM1_Pos)              /*!< TPI FIFO1: ITM1 Mask */
-
-#define TPI_FIFO1_ITM0_Pos                  0U                                         /*!< TPI FIFO1: ITM0 Position */
-#define TPI_FIFO1_ITM0_Msk                 (0xFFUL /*<< TPI_FIFO1_ITM0_Pos*/)          /*!< TPI FIFO1: ITM0 Mask */
-
-/* TPI ITATBCTR0 Register Definitions */
-#define TPI_ITATBCTR0_ATREADY_Pos           0U                                         /*!< TPI ITATBCTR0: ATREADY Position */
-#define TPI_ITATBCTR0_ATREADY_Msk          (0x1UL /*<< TPI_ITATBCTR0_ATREADY_Pos*/)    /*!< TPI ITATBCTR0: ATREADY Mask */
-
-/* TPI Integration Mode Control Register Definitions */
-#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
-#define TPI_ITCTRL_Mode_Msk                (0x1UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
-
-/* TPI DEVID Register Definitions */
-#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
-#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
-
-#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
-#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
-
-#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
-#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
-
-#define TPI_DEVID_MinBufSz_Pos              6U                                         /*!< TPI DEVID: MinBufSz Position */
-#define TPI_DEVID_MinBufSz_Msk             (0x7UL << TPI_DEVID_MinBufSz_Pos)           /*!< TPI DEVID: MinBufSz Mask */
-
-#define TPI_DEVID_AsynClkIn_Pos             5U                                         /*!< TPI DEVID: AsynClkIn Position */
-#define TPI_DEVID_AsynClkIn_Msk            (0x1UL << TPI_DEVID_AsynClkIn_Pos)          /*!< TPI DEVID: AsynClkIn Mask */
-
-#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
-#define TPI_DEVID_NrTraceInput_Msk         (0x1FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
-
-/* TPI DEVTYPE Register Definitions */
-#define TPI_DEVTYPE_MajorType_Pos           4U                                         /*!< TPI DEVTYPE: MajorType Position */
-#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
-
-#define TPI_DEVTYPE_SubType_Pos             0U                                         /*!< TPI DEVTYPE: SubType Position */
-#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
-
-/*@}*/ /* end of group CMSIS_TPI */
-
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
-  \brief    Type definitions for the Memory Protection Unit (MPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Memory Protection Unit (MPU).
- */
-typedef struct
-{
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
-  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
-  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
-  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
-  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
-  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
-  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
-        uint32_t RESERVED0[1];
-  union {
-  __IOM uint32_t MAIR[2];
-  struct {
-  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
-  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
-  };
-  };
-} MPU_Type;
-
-#define MPU_TYPE_RALIASES                  4U
-
-/* MPU Type Register Definitions */
-#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
-#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
-
-#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
-#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
-
-#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
-#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
-
-/* MPU Control Register Definitions */
-#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
-#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
-
-#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
-#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
-
-#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
-#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
-
-/* MPU Region Number Register Definitions */
-#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
-#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
-
-/* MPU Region Base Address Register Definitions */
-#define MPU_RBAR_ADDR_Pos                   5U                                            /*!< MPU RBAR: ADDR Position */
-#define MPU_RBAR_ADDR_Msk                  (0x7FFFFFFUL << MPU_RBAR_ADDR_Pos)             /*!< MPU RBAR: ADDR Mask */
-
-#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
-#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
-
-#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
-#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
-
-#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
-#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
-
-/* MPU Region Limit Address Register Definitions */
-#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
-#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
-
-#define MPU_RLAR_PXN_Pos                    4U                                            /*!< MPU RLAR: PXN Position */
-#define MPU_RLAR_PXN_Msk                   (0x1UL << MPU_RLAR_PXN_Pos)                    /*!< MPU RLAR: PXN Mask */
-
-#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
-#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
-
-#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
-#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
-
-/* MPU Memory Attribute Indirection Register 0 Definitions */
-#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
-#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
-
-#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
-#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
-
-#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
-#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
-
-#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
-#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
-
-/* MPU Memory Attribute Indirection Register 1 Definitions */
-#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
-#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
-
-#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
-#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
-
-#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
-#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
-
-#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
-#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
-
-/*@} end of group CMSIS_MPU */
-#endif
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
-  \brief    Type definitions for the Security Attribution Unit (SAU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Security Attribution Unit (SAU).
- */
-typedef struct
-{
-  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
-  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
-  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
-  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
-#else
-        uint32_t RESERVED0[3];
-#endif
-  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
-  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
-} SAU_Type;
-
-/* SAU Control Register Definitions */
-#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
-#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
-
-#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
-#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
-
-/* SAU Type Register Definitions */
-#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
-#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
-
-#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
-/* SAU Region Number Register Definitions */
-#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
-#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
-
-/* SAU Region Base Address Register Definitions */
-#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
-#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
-
-/* SAU Region Limit Address Register Definitions */
-#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
-#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
-
-#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
-#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
-
-#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
-#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
-
-#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
-
-/* Secure Fault Status Register Definitions */
-#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
-#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
-
-#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
-#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
-
-#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
-#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
-
-#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
-#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
-
-#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
-#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
-
-#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
-#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
-
-#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
-#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
-
-#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
-#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
-
-/*@} end of group CMSIS_SAU */
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
-  \brief    Type definitions for the Floating Point Unit (FPU)
-  @{
- */
-
-/**
-  \brief  Structure type to access the Floating Point Unit (FPU).
- */
-typedef struct
-{
-        uint32_t RESERVED0[1U];
-  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
-  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
-  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
-  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and FP Feature Register 0 */
-  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and FP Feature Register 1 */
-} FPU_Type;
-
-/* Floating-Point Context Control Register Definitions */
-#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
-#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
-
-#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
-#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
-
-#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
-#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
-
-#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
-#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
-
-#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
-#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
-
-#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
-#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
-
-#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
-#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
-
-#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
-#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
-
-#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
-#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
-
-#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
-#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
-
-#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
-#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
-
-#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
-#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
-
-#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
-#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
-
-#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
-#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
-
-#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
-#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
-
-#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
-#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
-
-#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
-#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
-
-/* Floating-Point Context Address Register Definitions */
-#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
-#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
-
-/* Floating-Point Default Status Control Register Definitions */
-#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
-#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
-
-#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
-#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
-
-#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
-#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
-
-#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
-#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
-
-/* Media and FP Feature Register 0 Definitions */
-#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
-#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
-
-#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
-#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
-
-#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
-#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
-
-#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
-#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
-
-#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
-#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
-
-#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
-#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
-
-#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
-#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
-
-#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
-#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
-
-/* Media and FP Feature Register 1 Definitions */
-#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
-#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
-
-#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
-#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
-
-#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
-#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
-
-#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
-#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
-
-/*@} end of group CMSIS_FPU */
-
-
-/**
-  \ingroup  CMSIS_core_register
-  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
-  \brief    Type definitions for the Core Debug Registers
-  @{
- */
-
-/**
-  \brief  Structure type to access the Core Debug Register (CoreDebug).
- */
-typedef struct
-{
-  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
-  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
-  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
-  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
-        uint32_t RESERVED4[1U];
-  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
-  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
-} CoreDebug_Type;
-
-/* Debug Halting Control and Status Register Definitions */
-#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
-#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
-
-#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
-#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
-
-#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
-#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
-
-#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
-#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
-
-#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
-#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
-
-#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
-#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
-
-#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
-#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
-
-#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
-#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
-
-#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
-#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
-
-#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
-#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
-
-#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
-#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
-
-#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
-#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
-
-#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
-#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
-
-/* Debug Core Register Selector Register Definitions */
-#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
-#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
-
-#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
-#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
-
-/* Debug Exception and Monitor Control Register Definitions */
-#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
-#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
-
-#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
-#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
-
-#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
-#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
-
-#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
-#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
-
-#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
-#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
-
-#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
-#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
-
-#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
-#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
-
-#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
-#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
-
-#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
-#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
-
-#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
-#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
-
-#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
-#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
-
-#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
-#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
-
-#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
-#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
-
-/* Debug Authentication Control Register Definitions */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
-#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
-
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
-
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
-#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
-
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
-#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
-
-/* Debug Security Control and Status Register Definitions */
-#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
-#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
-
-#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
-#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
-
-#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
-#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
-
-/*@} end of group CMSIS_CoreDebug */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_bitfield     Core register bit field macros
-  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
-  @{
- */
-
-/**
-  \brief   Mask and shift a bit field value for use in a register bit range.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted value.
-*/
-#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
-
-/**
-  \brief     Mask and shift a register value to extract a bit filed value.
-  \param[in] field  Name of the register bit field.
-  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
-  \return           Masked and shifted bit field value.
-*/
-#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
-
-/*@} end of group CMSIS_core_bitfield */
-
-
-/**
-  \ingroup    CMSIS_core_register
-  \defgroup   CMSIS_core_base     Core Definitions
-  \brief      Definitions for base addresses, unions, and structures.
-  @{
- */
-
-/* Memory mapping of Core Hardware */
-  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
-  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
-  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
-  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
-  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
-  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
-  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
-  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
-
-  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
-  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
-  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
-  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
-  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
-  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
-  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
-  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
-    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
-  #endif
-
-  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
-    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
-  #endif
-
-  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
-  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
-  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
-  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
-  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
-  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
-
-  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
-  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
-  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
-  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
-  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
-
-  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
-    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
-  #endif
-
-  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
-  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-/*@} */
-
-
-
-/*******************************************************************************
- *                Hardware Abstraction Layer
-  Core Function Interface contains:
-  - Core NVIC Functions
-  - Core SysTick Functions
-  - Core Debug Functions
-  - Core Register Access Functions
- ******************************************************************************/
-/**
-  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
-*/
-
-
-
-/* ##########################   NVIC functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
-  \brief    Functions that manage interrupts and exceptions via the NVIC.
-  @{
- */
-
-#ifdef CMSIS_NVIC_VIRTUAL
-  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
-    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
-  #endif
-  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
-  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
-  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
-  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
-  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
-  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
-  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
-  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
-  #define NVIC_GetActive              __NVIC_GetActive
-  #define NVIC_SetPriority            __NVIC_SetPriority
-  #define NVIC_GetPriority            __NVIC_GetPriority
-  #define NVIC_SystemReset            __NVIC_SystemReset
-#endif /* CMSIS_NVIC_VIRTUAL */
-
-#ifdef CMSIS_VECTAB_VIRTUAL
-  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
-  #endif
-  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
-#else
-  #define NVIC_SetVector              __NVIC_SetVector
-  #define NVIC_GetVector              __NVIC_GetVector
-#endif  /* (CMSIS_VECTAB_VIRTUAL) */
-
-#define NVIC_USER_IRQ_OFFSET          16
-
-
-
-/**
-  \brief   Set Priority Grouping
-  \details Sets the priority grouping field using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping
-  \details Reads the priority grouping field from the NVIC Interrupt Controller.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
-{
-  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt
-  \details Enables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status
-  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt
-  \details Disables a device specific interrupt in the NVIC interrupt controller.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-    __DSB();
-    __ISB();
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt
-  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt
-  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt
-  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt
-  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Get Interrupt Target State
-  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-  \return             1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Target State
-  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Clear Interrupt Target State
-  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  if interrupt is assigned to Secure
-                      1  if interrupt is assigned to Non Secure
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
-    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-
-/**
-  \brief   Set Interrupt Priority
-  \details Sets the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every processor exception.
- */
-__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority
-  \details Reads the priority of a device specific interrupt or a processor exception.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority.
-                      Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-
-
-/**
-  \brief   Encode Priority
-  \details Encodes the priority for an interrupt with the given priority group,
-           preemptive priority value, and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]     PriorityGroup  Used priority group.
-  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
-  \param [in]       SubPriority  Subpriority value (starting from 0).
-  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
- */
-__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  return (
-           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
-           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
-         );
-}
-
-
-/**
-  \brief   Decode Priority
-  \details Decodes an interrupt priority value with a given priority group to
-           preemptive priority value and subpriority value.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
-  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
-  \param [in]     PriorityGroup  Used priority group.
-  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
-  \param [out]     pSubPriority  Subpriority value (starting from 0).
- */
-__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
-{
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
-  uint32_t PreemptPriorityBits;
-  uint32_t SubPriorityBits;
-
-  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
-  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
-
-  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
-  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
-}
-
-
-/**
-  \brief   Set Interrupt Vector
-  \details Sets an interrupt vector in SRAM based interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-           VTOR must been relocated to SRAM before.
-  \param [in]   IRQn      Interrupt number
-  \param [in]   vector    Address of interrupt handler function
- */
-__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
-  __DSB();
-}
-
-
-/**
-  \brief   Get Interrupt Vector
-  \details Reads an interrupt vector from interrupt vector table.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn      Interrupt number.
-  \return                 Address of interrupt handler function
- */
-__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
-{
-  uint32_t *vectors = (uint32_t *)SCB->VTOR;
-  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
-}
-
-
-/**
-  \brief   System Reset
-  \details Initiates a system reset request to reset the MCU.
- */
-__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
-{
-  __DSB();                                                          /* Ensure all outstanding memory accesses included
-                                                                       buffered write are completed before reset */
-  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
-                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
-                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
-  __DSB();                                                          /* Ensure completion of memory access */
-
-  for(;;)                                                           /* wait until reset */
-  {
-    __NOP();
-  }
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   Set Priority Grouping (non-secure)
-  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
-           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
-           Only values from 0..7 are used.
-           In case of a conflict between priority grouping and available
-           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
-  \param [in]      PriorityGroup  Priority grouping field.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
-{
-  uint32_t reg_value;
-  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
-
-  reg_value  =  SCB_NS->AIRCR;                                                   /* read old register configuration    */
-  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk));             /* clear bits to change               */
-  reg_value  =  (reg_value                                   |
-                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
-                (PriorityGroupTmp << 8U)                      );              /* Insert write key and priorty group */
-  SCB_NS->AIRCR =  reg_value;
-}
-
-
-/**
-  \brief   Get Priority Grouping (non-secure)
-  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
-  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
-{
-  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
-}
-
-
-/**
-  \brief   Enable Interrupt (non-secure)
-  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Enable status (non-secure)
-  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt is not enabled.
-  \return             1  Interrupt is enabled.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Disable Interrupt (non-secure)
-  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Pending Interrupt (non-secure)
-  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not pending.
-  \return             1  Interrupt status is pending.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Pending Interrupt (non-secure)
-  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Clear Pending Interrupt (non-secure)
-  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
-  \param [in]      IRQn  Device specific interrupt number.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
-  }
-}
-
-
-/**
-  \brief   Get Active Interrupt (non-secure)
-  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
-  \param [in]      IRQn  Device specific interrupt number.
-  \return             0  Interrupt status is not active.
-  \return             1  Interrupt status is active.
-  \note    IRQn must not be negative.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
-  }
-  else
-  {
-    return(0U);
-  }
-}
-
-
-/**
-  \brief   Set Interrupt Priority (non-secure)
-  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]      IRQn  Interrupt number.
-  \param [in]  priority  Priority to set.
-  \note    The priority cannot be set for every non-secure processor exception.
- */
-__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
-{
-  if ((int32_t)(IRQn) >= 0)
-  {
-    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-  else
-  {
-    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
-  }
-}
-
-
-/**
-  \brief   Get Interrupt Priority (non-secure)
-  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
-           The interrupt number can be positive to specify a device specific interrupt,
-           or negative to specify a processor exception.
-  \param [in]   IRQn  Interrupt number.
-  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
- */
-__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
-{
-
-  if ((int32_t)(IRQn) >= 0)
-  {
-    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
-  }
-  else
-  {
-    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
-  }
-}
-#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_NVICFunctions */
-
-/* ##########################  MPU functions  #################################### */
-
-#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
-
-#include "mpu_armv8.h"
-
-#endif
-
-/* ##########################  FPU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_FpuFunctions FPU Functions
-  \brief    Function that provides FPU type.
-  @{
- */
-
-/**
-  \brief   get FPU type
-  \details returns the FPU type
-  \returns
-   - \b  0: No FPU
-   - \b  1: Single precision FPU
-   - \b  2: Double + Single precision FPU
- */
-__STATIC_INLINE uint32_t SCB_GetFPUType(void)
-{
-  uint32_t mvfr0;
-
-  mvfr0 = FPU->MVFR0;
-  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
-  {
-    return 2U;           /* Double + Single precision FPU */
-  }
-  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
-  {
-    return 1U;           /* Single precision FPU */
-  }
-  else
-  {
-    return 0U;           /* No FPU */
-  }
-}
-
-
-/*@} end of CMSIS_Core_FpuFunctions */
-
-
-
-/* ##########################   SAU functions  #################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SAUFunctions SAU Functions
-  \brief    Functions that configure the SAU.
-  @{
- */
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-
-/**
-  \brief   Enable SAU
-  \details Enables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Enable(void)
-{
-    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
-}
-
-
-
-/**
-  \brief   Disable SAU
-  \details Disables the Security Attribution Unit (SAU).
- */
-__STATIC_INLINE void TZ_SAU_Disable(void)
-{
-    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
-}
-
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-/*@} end of CMSIS_Core_SAUFunctions */
-
-
-
-
-/* ##################################    SysTick function  ############################################ */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
-  \brief    Functions that configure the System.
-  @{
- */
-
-#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
-
-/**
-  \brief   System Tick Configuration
-  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
- */
-__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                   /* Reload value impossible */
-  }
-
-  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
-  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
-  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                   SysTick_CTRL_TICKINT_Msk   |
-                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                     /* Function successful */
-}
-
-#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
-/**
-  \brief   System Tick Configuration (non-secure)
-  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
-           Counter is in free running mode to generate periodic interrupts.
-  \param [in]  ticks  Number of ticks between two interrupts.
-  \return          0  Function succeeded.
-  \return          1  Function failed.
-  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
-           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
-           must contain a vendor-specific implementation of this function.
-
- */
-__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
-{
-  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
-  {
-    return (1UL);                                                         /* Reload value impossible */
-  }
-
-  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
-  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
-  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
-  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
-                      SysTick_CTRL_TICKINT_Msk   |
-                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
-  return (0UL);                                                           /* Function successful */
-}
-#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
-
-#endif
-
-/*@} end of CMSIS_Core_SysTickFunctions */
-
-
-
-/* ##################################### Debug In/Output function ########################################### */
-/**
-  \ingroup  CMSIS_Core_FunctionInterface
-  \defgroup CMSIS_core_DebugFunctions ITM Functions
-  \brief    Functions that access the ITM debug interface.
-  @{
- */
-
-extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
-#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
-
-
-/**
-  \brief   ITM Send Character
-  \details Transmits a character via the ITM channel 0, and
-           \li Just returns when no debugger is connected that has booked the output.
-           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
-  \param [in]     ch  Character to transmit.
-  \returns            Character to transmit.
- */
-__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
-{
-  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
-      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
-  {
-    while (ITM->PORT[0U].u32 == 0UL)
-    {
-      __NOP();
-    }
-    ITM->PORT[0U].u8 = (uint8_t)ch;
-  }
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Receive Character
-  \details Inputs a character via the external variable \ref ITM_RxBuffer.
-  \return             Received character.
-  \return         -1  No character pending.
- */
-__STATIC_INLINE int32_t ITM_ReceiveChar (void)
-{
-  int32_t ch = -1;                           /* no character available */
-
-  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
-  {
-    ch = ITM_RxBuffer;
-    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
-  }
-
-  return (ch);
-}
-
-
-/**
-  \brief   ITM Check Character
-  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
-  \return          0  No character available.
-  \return          1  Character available.
- */
-__STATIC_INLINE int32_t ITM_CheckChar (void)
-{
-
-  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
-  {
-    return (0);                              /* no character available */
-  }
-  else
-  {
-    return (1);                              /*    character available */
-  }
-}
-
-/*@} end of CMSIS_core_DebugFunctions */
-
-
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __CORE_ARMV81MML_H_DEPENDANT */
-
-#endif /* __CMSIS_GENERIC */
+/**************************************************************************//**
+ * @file     core_star.h
+ * @brief    CMSIS ArmChina STAR Core Peripheral Access Layer Header File
+ * @version  V1.0.0
+ * @date     12. June 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2009-2018 Arm Limited. 
+ * Copyright (c) 2018-2020 ArmChina. 
+ * All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef __CORE_STAR_H_GENERIC
+#define __CORE_STAR_H_GENERIC
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/**
+  \page CMSIS_MISRA_Exceptions  MISRA-C:2004 Compliance Exceptions
+  CMSIS violates the following MISRA-C:2004 rules:
+
+   \li Required Rule 8.5, object/function definition in header file.<br>
+     Function definitions in header files are used to allow 'inlining'.
+
+   \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
+     Unions are used for effective representation of core registers.
+
+   \li Advisory Rule 19.7, Function-like macro defined.<br>
+     Function-like macros are used to allow more efficient code.
+ */
+
+
+/*******************************************************************************
+ *                 CMSIS definitions
+ ******************************************************************************/
+/**
+  \ingroup Cortex_STAR
+  @{
+ */
+
+#include "cmsis_version.h"
+
+/*  CMSIS STAR definitions */
+#define __STAR_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                   /*!< \deprecated [31:16] CMSIS HAL main version */
+#define __STAR_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                    /*!< \deprecated [15:0]  CMSIS HAL sub version */
+#define __STAR_CMSIS_VERSION       ((__STAR_CMSIS_VERSION_MAIN << 16U) | \
+                                     __STAR_CMSIS_VERSION_SUB           )      /*!< \deprecated CMSIS HAL version number */
+
+/* DCore to be changed for STAR */
+#define __CORTEX_M                 (33U)                                       /*!< Cortex-M Core */
+
+/** __FPU_USED indicates whether an FPU is used or not.
+    For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
+*/
+#if defined ( __CC_ARM )
+  #if defined (__TARGET_FPU_VFP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
+  #if defined (__ARM_FP)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __GNUC__ )
+  #if defined (__VFP_FP__) && !defined(__SOFTFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined (__ARMVFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+  #if defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1U)
+    #if defined (__DSP_PRESENT) && (__DSP_PRESENT == 1U)
+      #define __DSP_USED       1U
+    #else
+      #error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
+      #define __DSP_USED         0U
+    #endif
+  #else
+    #define __DSP_USED         0U
+  #endif
+
+#elif defined ( __TI_ARM__ )
+  #if defined (__TI_VFP_SUPPORT__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __TASKING__ )
+  #if defined (__FPU_VFP__)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#elif defined ( __CSMC__ )
+  #if ( __CSMC__ & 0x400U)
+    #if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
+      #define __FPU_USED       1U
+    #else
+      #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
+      #define __FPU_USED       0U
+    #endif
+  #else
+    #define __FPU_USED         0U
+  #endif
+
+#endif
+
+#include "cmsis_compiler.h"               /* CMSIS compiler specific defines */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_STAR_H_GENERIC */
+
+#ifndef __CMSIS_GENERIC
+
+#ifndef __CORE_STAR_H_DEPENDANT
+#define __CORE_STAR_H_DEPENDANT
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* check device defines and use defaults */
+#if defined __CHECK_DEVICE_DEFINES
+  #ifndef __STAR_REV
+    #define __STAR_REV                0x0000U
+    #warning "__STAR_REV not defined in device header file; using default!"
+  #endif
+
+  #ifndef __FPU_PRESENT
+    #define __FPU_PRESENT             0U
+    #warning "__FPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __MPU_PRESENT
+    #define __MPU_PRESENT             0U
+    #warning "__MPU_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __SAUREGION_PRESENT
+    #define __SAUREGION_PRESENT       0U
+    #warning "__SAUREGION_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DSP_PRESENT
+    #define __DSP_PRESENT             0U
+    #warning "__DSP_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __ICACHE_PRESENT
+    #define __ICACHE_PRESENT          0U
+    #warning "__ICACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DCACHE_PRESENT
+    #define __DCACHE_PRESENT          0U
+    #warning "__DCACHE_PRESENT not defined in device header file; using default!"
+  #endif
+
+  #ifndef __DTCM_PRESENT
+    #define __DTCM_PRESENT            0U
+    #warning "__DTCM_PRESENT        not defined in device header file; using default!"
+  #endif
+
+  #ifndef __NVIC_PRIO_BITS
+    #define __NVIC_PRIO_BITS          3U
+    #warning "__NVIC_PRIO_BITS not defined in device header file; using default!"
+  #endif
+
+  #ifndef __Vendor_SysTickConfig
+    #define __Vendor_SysTickConfig    0U
+    #warning "__Vendor_SysTickConfig not defined in device header file; using default!"
+  #endif
+#endif
+
+/* IO definitions (access restrictions to peripheral registers) */
+/**
+    \defgroup CMSIS_glob_defs CMSIS Global Defines
+
+    <strong>IO Type Qualifiers</strong> are used
+    \li to specify the access to peripheral variables.
+    \li for automatic generation of peripheral register debug information.
+*/
+#ifdef __cplusplus
+  #define   __I     volatile             /*!< Defines 'read only' permissions */
+#else
+  #define   __I     volatile const       /*!< Defines 'read only' permissions */
+#endif
+#define     __O     volatile             /*!< Defines 'write only' permissions */
+#define     __IO    volatile             /*!< Defines 'read / write' permissions */
+
+/* following defines should be used for structure members */
+#define     __IM     volatile const      /*! Defines 'read only' structure member permissions */
+#define     __OM     volatile            /*! Defines 'write only' structure member permissions */
+#define     __IOM    volatile            /*! Defines 'read / write' structure member permissions */
+
+/*@} end of group Cortex_STAR */
+
+
+
+/*******************************************************************************
+ *                 Register Abstraction
+  Core Register contain:
+  - Core Register
+  - Core NVIC Register
+  - Core SCB Register
+  - Core SysTick Register
+  - Core Debug Register
+  - Core MPU Register
+  - Core SAU Register
+  - Core FPU Register
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_core_register Defines and Type Definitions
+  \brief Type definitions and defines for Cortex-M processor based devices.
+*/
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_CORE  Status and Control Registers
+  \brief      Core Register type definitions.
+  @{
+ */
+
+/**
+  \brief  Union type to access the Application Program Status Register (APSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t _reserved0:16;              /*!< bit:  0..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:7;               /*!< bit: 20..26  Reserved */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} APSR_Type;
+
+/* APSR Register Definitions */
+#define APSR_N_Pos                         31U                                            /*!< APSR: N Position */
+#define APSR_N_Msk                         (1UL << APSR_N_Pos)                            /*!< APSR: N Mask */
+
+#define APSR_Z_Pos                         30U                                            /*!< APSR: Z Position */
+#define APSR_Z_Msk                         (1UL << APSR_Z_Pos)                            /*!< APSR: Z Mask */
+
+#define APSR_C_Pos                         29U                                            /*!< APSR: C Position */
+#define APSR_C_Msk                         (1UL << APSR_C_Pos)                            /*!< APSR: C Mask */
+
+#define APSR_V_Pos                         28U                                            /*!< APSR: V Position */
+#define APSR_V_Msk                         (1UL << APSR_V_Pos)                            /*!< APSR: V Mask */
+
+#define APSR_Q_Pos                         27U                                            /*!< APSR: Q Position */
+#define APSR_Q_Msk                         (1UL << APSR_Q_Pos)                            /*!< APSR: Q Mask */
+
+#define APSR_GE_Pos                        16U                                            /*!< APSR: GE Position */
+#define APSR_GE_Msk                        (0xFUL << APSR_GE_Pos)                         /*!< APSR: GE Mask */
+
+
+/**
+  \brief  Union type to access the Interrupt Program Status Register (IPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:23;              /*!< bit:  9..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} IPSR_Type;
+
+/* IPSR Register Definitions */
+#define IPSR_ISR_Pos                        0U                                            /*!< IPSR: ISR Position */
+#define IPSR_ISR_Msk                       (0x1FFUL /*<< IPSR_ISR_Pos*/)                  /*!< IPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Special-Purpose Program Status Registers (xPSR).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t ISR:9;                      /*!< bit:  0.. 8  Exception number */
+    uint32_t _reserved0:7;               /*!< bit:  9..15  Reserved */
+    uint32_t GE:4;                       /*!< bit: 16..19  Greater than or Equal flags */
+    uint32_t _reserved1:4;               /*!< bit: 20..23  Reserved */
+    uint32_t T:1;                        /*!< bit:     24  Thumb bit        (read 0) */
+    uint32_t IT:2;                       /*!< bit: 25..26  saved IT state   (read 0) */
+    uint32_t Q:1;                        /*!< bit:     27  Saturation condition flag */
+    uint32_t V:1;                        /*!< bit:     28  Overflow condition code flag */
+    uint32_t C:1;                        /*!< bit:     29  Carry condition code flag */
+    uint32_t Z:1;                        /*!< bit:     30  Zero condition code flag */
+    uint32_t N:1;                        /*!< bit:     31  Negative condition code flag */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} xPSR_Type;
+
+/* xPSR Register Definitions */
+#define xPSR_N_Pos                         31U                                            /*!< xPSR: N Position */
+#define xPSR_N_Msk                         (1UL << xPSR_N_Pos)                            /*!< xPSR: N Mask */
+
+#define xPSR_Z_Pos                         30U                                            /*!< xPSR: Z Position */
+#define xPSR_Z_Msk                         (1UL << xPSR_Z_Pos)                            /*!< xPSR: Z Mask */
+
+#define xPSR_C_Pos                         29U                                            /*!< xPSR: C Position */
+#define xPSR_C_Msk                         (1UL << xPSR_C_Pos)                            /*!< xPSR: C Mask */
+
+#define xPSR_V_Pos                         28U                                            /*!< xPSR: V Position */
+#define xPSR_V_Msk                         (1UL << xPSR_V_Pos)                            /*!< xPSR: V Mask */
+
+#define xPSR_Q_Pos                         27U                                            /*!< xPSR: Q Position */
+#define xPSR_Q_Msk                         (1UL << xPSR_Q_Pos)                            /*!< xPSR: Q Mask */
+
+#define xPSR_IT_Pos                        25U                                            /*!< xPSR: IT Position */
+#define xPSR_IT_Msk                        (3UL << xPSR_IT_Pos)                           /*!< xPSR: IT Mask */
+
+#define xPSR_T_Pos                         24U                                            /*!< xPSR: T Position */
+#define xPSR_T_Msk                         (1UL << xPSR_T_Pos)                            /*!< xPSR: T Mask */
+
+#define xPSR_GE_Pos                        16U                                            /*!< xPSR: GE Position */
+#define xPSR_GE_Msk                        (0xFUL << xPSR_GE_Pos)                         /*!< xPSR: GE Mask */
+
+#define xPSR_ISR_Pos                        0U                                            /*!< xPSR: ISR Position */
+#define xPSR_ISR_Msk                       (0x1FFUL /*<< xPSR_ISR_Pos*/)                  /*!< xPSR: ISR Mask */
+
+
+/**
+  \brief  Union type to access the Control Registers (CONTROL).
+ */
+typedef union
+{
+  struct
+  {
+    uint32_t nPRIV:1;                    /*!< bit:      0  Execution privilege in Thread mode */
+    uint32_t SPSEL:1;                    /*!< bit:      1  Stack-pointer select */
+    uint32_t FPCA:1;                     /*!< bit:      2  Floating-point context active */
+    uint32_t SFPA:1;                     /*!< bit:      3  Secure floating-point active */
+    uint32_t _reserved1:28;              /*!< bit:  4..31  Reserved */
+  } b;                                   /*!< Structure used for bit  access */
+  uint32_t w;                            /*!< Type      used for word access */
+} CONTROL_Type;
+
+/* CONTROL Register Definitions */
+#define CONTROL_SFPA_Pos                    3U                                            /*!< CONTROL: SFPA Position */
+#define CONTROL_SFPA_Msk                   (1UL << CONTROL_SFPA_Pos)                      /*!< CONTROL: SFPA Mask */
+
+#define CONTROL_FPCA_Pos                    2U                                            /*!< CONTROL: FPCA Position */
+#define CONTROL_FPCA_Msk                   (1UL << CONTROL_FPCA_Pos)                      /*!< CONTROL: FPCA Mask */
+
+#define CONTROL_SPSEL_Pos                   1U                                            /*!< CONTROL: SPSEL Position */
+#define CONTROL_SPSEL_Msk                  (1UL << CONTROL_SPSEL_Pos)                     /*!< CONTROL: SPSEL Mask */
+
+#define CONTROL_nPRIV_Pos                   0U                                            /*!< CONTROL: nPRIV Position */
+#define CONTROL_nPRIV_Msk                  (1UL /*<< CONTROL_nPRIV_Pos*/)                 /*!< CONTROL: nPRIV Mask */
+
+/*@} end of group CMSIS_CORE */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_NVIC  Nested Vectored Interrupt Controller (NVIC)
+  \brief      Type definitions for the NVIC Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Nested Vectored Interrupt Controller (NVIC).
+ */
+typedef struct
+{
+  __IOM uint32_t ISER[16U];              /*!< Offset: 0x000 (R/W)  Interrupt Set Enable Register */
+        uint32_t RESERVED0[16U];
+  __IOM uint32_t ICER[16U];              /*!< Offset: 0x080 (R/W)  Interrupt Clear Enable Register */
+        uint32_t RSERVED1[16U];
+  __IOM uint32_t ISPR[16U];              /*!< Offset: 0x100 (R/W)  Interrupt Set Pending Register */
+        uint32_t RESERVED2[16U];
+  __IOM uint32_t ICPR[16U];              /*!< Offset: 0x180 (R/W)  Interrupt Clear Pending Register */
+        uint32_t RESERVED3[16U];
+  __IOM uint32_t IABR[16U];              /*!< Offset: 0x200 (R/W)  Interrupt Active bit Register */
+        uint32_t RESERVED4[16U];
+  __IOM uint32_t ITNS[16U];              /*!< Offset: 0x280 (R/W)  Interrupt Non-Secure State Register */
+        uint32_t RESERVED5[16U];
+  __IOM uint8_t  IPR[496U];              /*!< Offset: 0x300 (R/W)  Interrupt Priority Register (8Bit wide) */
+        uint32_t RESERVED6[580U];
+  __OM  uint32_t STIR;                   /*!< Offset: 0xE00 ( /W)  Software Trigger Interrupt Register */
+}  NVIC_Type;
+
+/* Software Triggered Interrupt Register Definitions */
+#define NVIC_STIR_INTID_Pos                 0U                                         /*!< STIR: INTLINESNUM Position */
+#define NVIC_STIR_INTID_Msk                (0x1FFUL /*<< NVIC_STIR_INTID_Pos*/)        /*!< STIR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_NVIC */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCB     System Control Block (SCB)
+  \brief    Type definitions for the System Control Block Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control Block (SCB).
+ */
+typedef struct
+{
+  __IM  uint32_t CPUID;                  /*!< Offset: 0x000 (R/ )  CPUID Base Register */
+  __IOM uint32_t ICSR;                   /*!< Offset: 0x004 (R/W)  Interrupt Control and State Register */
+  __IOM uint32_t VTOR;                   /*!< Offset: 0x008 (R/W)  Vector Table Offset Register */
+  __IOM uint32_t AIRCR;                  /*!< Offset: 0x00C (R/W)  Application Interrupt and Reset Control Register */
+  __IOM uint32_t SCR;                    /*!< Offset: 0x010 (R/W)  System Control Register */
+  __IOM uint32_t CCR;                    /*!< Offset: 0x014 (R/W)  Configuration Control Register */
+  __IOM uint8_t  SHPR[12U];              /*!< Offset: 0x018 (R/W)  System Handlers Priority Registers (4-7, 8-11, 12-15) */
+  __IOM uint32_t SHCSR;                  /*!< Offset: 0x024 (R/W)  System Handler Control and State Register */
+  __IOM uint32_t CFSR;                   /*!< Offset: 0x028 (R/W)  Configurable Fault Status Register */
+  __IOM uint32_t HFSR;                   /*!< Offset: 0x02C (R/W)  HardFault Status Register */
+  __IOM uint32_t DFSR;                   /*!< Offset: 0x030 (R/W)  Debug Fault Status Register */
+  __IOM uint32_t MMFAR;                  /*!< Offset: 0x034 (R/W)  MemManage Fault Address Register */
+  __IOM uint32_t BFAR;                   /*!< Offset: 0x038 (R/W)  BusFault Address Register */
+  __IOM uint32_t AFSR;                   /*!< Offset: 0x03C (R/W)  Auxiliary Fault Status Register */
+  __IM  uint32_t ID_PFR[2U];             /*!< Offset: 0x040 (R/ )  Processor Feature Register */
+  __IM  uint32_t ID_DFR;                 /*!< Offset: 0x048 (R/ )  Debug Feature Register */
+  __IM  uint32_t ID_AFR;                 /*!< Offset: 0x04C (R/ )  Auxiliary Feature Register */
+  __IM  uint32_t ID_MMFR[4U];            /*!< Offset: 0x050 (R/ )  Memory Model Feature Register */
+  __IM  uint32_t ID_ISAR[5U];            /*!< Offset: 0x060 (R/ )  Instruction Set Attributes Register */
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t CLIDR;                  /*!< Offset: 0x078 (R/ )  Cache Level ID register */
+  __IM  uint32_t CTR;                    /*!< Offset: 0x07C (R/ )  Cache Type register */
+  __IM  uint32_t CCSIDR;                 /*!< Offset: 0x080 (R/ )  Cache Size ID Register */
+  __IOM uint32_t CSSELR;                 /*!< Offset: 0x084 (R/W)  Cache Size Selection Register */
+  __IOM uint32_t CPACR;                  /*!< Offset: 0x088 (R/W)  Coprocessor Access Control Register */
+  __IOM uint32_t NSACR;                  /*!< Offset: 0x08C (R/W)  Non-Secure Access Control Register */
+        uint32_t RESERVED_ADD1[21U];      
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x0E4 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x0E8 (R/W)  Secure Fault Address Register */
+        uint32_t RESERVED3[69U];
+  __OM  uint32_t STIR;                   /*!< Offset: F00-D00=0x200 ( /W)  Software Triggered Interrupt Register */
+        uint32_t RESERVED4[15U];
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x240 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x244 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x248 (R/ )  Media and VFP Feature Register 2 */
+        uint32_t RESERVED5[1U];
+  __OM  uint32_t ICIALLU;                /*!< Offset: 0x250 ( /W)  I-Cache Invalidate All to PoU */
+        uint32_t RESERVED6[1U];
+  __OM  uint32_t ICIMVAU;                /*!< Offset: 0x258 ( /W)  I-Cache Invalidate by MVA to PoU */
+  __OM  uint32_t DCIMVAC;                /*!< Offset: 0x25C ( /W)  D-Cache Invalidate by MVA to PoC */
+  __OM  uint32_t DCISW;                  /*!< Offset: 0x260 ( /W)  D-Cache Invalidate by Set-way */
+  __OM  uint32_t DCCMVAU;                /*!< Offset: 0x264 ( /W)  D-Cache Clean by MVA to PoU */
+  __OM  uint32_t DCCMVAC;                /*!< Offset: 0x268 ( /W)  D-Cache Clean by MVA to PoC */
+  __OM  uint32_t DCCSW;                  /*!< Offset: 0x26C ( /W)  D-Cache Clean by Set-way */
+  __OM  uint32_t DCCIMVAC;               /*!< Offset: 0x270 ( /W)  D-Cache Clean and Invalidate by MVA to PoC */
+  __OM  uint32_t DCCISW;                 /*!< Offset: 0x274 ( /W)  D-Cache Clean and Invalidate by Set-way */
+} SCB_Type;
+
+typedef struct
+{
+  __IOM uint32_t CACR;				       /*!< Offset: 0x0 (R/W)  L1 Cache Control Register */
+  __IOM uint32_t ITCMCR;				   /*!< Offset: 0x10 (R/W)  Instruction Tightly-Coupled Memory Control Register */
+  __IOM uint32_t DTCMCR;				   /*!< Offset: 0x14 (R/W)  Data Tightly-Coupled Memory Control Registers */ 
+}EMSS_Type;
+
+/* SCB CPUID Register Definitions */
+#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            /*!< SCB CPUID: IMPLEMENTER Position */
+#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL << SCB_CPUID_IMPLEMENTER_Pos)          /*!< SCB CPUID: IMPLEMENTER Mask */
+
+#define SCB_CPUID_VARIANT_Pos              20U                                            /*!< SCB CPUID: VARIANT Position */
+#define SCB_CPUID_VARIANT_Msk              (0xFUL << SCB_CPUID_VARIANT_Pos)               /*!< SCB CPUID: VARIANT Mask */
+
+#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            /*!< SCB CPUID: ARCHITECTURE Position */
+#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL << SCB_CPUID_ARCHITECTURE_Pos)          /*!< SCB CPUID: ARCHITECTURE Mask */
+
+#define SCB_CPUID_PARTNO_Pos                4U                                            /*!< SCB CPUID: PARTNO Position */
+#define SCB_CPUID_PARTNO_Msk               (0xFFFUL << SCB_CPUID_PARTNO_Pos)              /*!< SCB CPUID: PARTNO Mask */
+
+#define SCB_CPUID_REVISION_Pos              0U                                            /*!< SCB CPUID: REVISION Position */
+#define SCB_CPUID_REVISION_Msk             (0xFUL /*<< SCB_CPUID_REVISION_Pos*/)          /*!< SCB CPUID: REVISION Mask */
+
+/* SCB Interrupt Control State Register Definitions */
+#define SCB_ICSR_PENDNMISET_Pos            31U                                            /*!< SCB ICSR: PENDNMISET Position */
+#define SCB_ICSR_PENDNMISET_Msk            (1UL << SCB_ICSR_PENDNMISET_Pos)               /*!< SCB ICSR: PENDNMISET Mask */
+
+#define SCB_ICSR_NMIPENDSET_Pos            SCB_ICSR_PENDNMISET_Pos                        /*!< SCB ICSR: NMIPENDSET Position, backward compatibility */
+#define SCB_ICSR_NMIPENDSET_Msk            SCB_ICSR_PENDNMISET_Msk                        /*!< SCB ICSR: NMIPENDSET Mask, backward compatibility */
+
+#define SCB_ICSR_PENDNMICLR_Pos            30U                                            /*!< SCB ICSR: PENDNMICLR Position */
+#define SCB_ICSR_PENDNMICLR_Msk            (1UL << SCB_ICSR_PENDNMICLR_Pos)               /*!< SCB ICSR: PENDNMICLR Mask */
+
+#define SCB_ICSR_PENDSVSET_Pos             28U                                            /*!< SCB ICSR: PENDSVSET Position */
+#define SCB_ICSR_PENDSVSET_Msk             (1UL << SCB_ICSR_PENDSVSET_Pos)                /*!< SCB ICSR: PENDSVSET Mask */
+
+#define SCB_ICSR_PENDSVCLR_Pos             27U                                            /*!< SCB ICSR: PENDSVCLR Position */
+#define SCB_ICSR_PENDSVCLR_Msk             (1UL << SCB_ICSR_PENDSVCLR_Pos)                /*!< SCB ICSR: PENDSVCLR Mask */
+
+#define SCB_ICSR_PENDSTSET_Pos             26U                                            /*!< SCB ICSR: PENDSTSET Position */
+#define SCB_ICSR_PENDSTSET_Msk             (1UL << SCB_ICSR_PENDSTSET_Pos)                /*!< SCB ICSR: PENDSTSET Mask */
+
+#define SCB_ICSR_PENDSTCLR_Pos             25U                                            /*!< SCB ICSR: PENDSTCLR Position */
+#define SCB_ICSR_PENDSTCLR_Msk             (1UL << SCB_ICSR_PENDSTCLR_Pos)                /*!< SCB ICSR: PENDSTCLR Mask */
+
+#define SCB_ICSR_STTNS_Pos                 24U                                            /*!< SCB ICSR: STTNS Position (Security Extension) */
+#define SCB_ICSR_STTNS_Msk                 (1UL << SCB_ICSR_STTNS_Pos)                    /*!< SCB ICSR: STTNS Mask (Security Extension) */
+
+#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            /*!< SCB ICSR: ISRPREEMPT Position */
+#define SCB_ICSR_ISRPREEMPT_Msk            (1UL << SCB_ICSR_ISRPREEMPT_Pos)               /*!< SCB ICSR: ISRPREEMPT Mask */
+
+#define SCB_ICSR_ISRPENDING_Pos            22U                                            /*!< SCB ICSR: ISRPENDING Position */
+#define SCB_ICSR_ISRPENDING_Msk            (1UL << SCB_ICSR_ISRPENDING_Pos)               /*!< SCB ICSR: ISRPENDING Mask */
+
+#define SCB_ICSR_VECTPENDING_Pos           12U                                            /*!< SCB ICSR: VECTPENDING Position */
+#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL << SCB_ICSR_VECTPENDING_Pos)          /*!< SCB ICSR: VECTPENDING Mask */
+
+#define SCB_ICSR_RETTOBASE_Pos             11U                                            /*!< SCB ICSR: RETTOBASE Position */
+#define SCB_ICSR_RETTOBASE_Msk             (1UL << SCB_ICSR_RETTOBASE_Pos)                /*!< SCB ICSR: RETTOBASE Mask */
+
+#define SCB_ICSR_VECTACTIVE_Pos             0U                                            /*!< SCB ICSR: VECTACTIVE Position */
+#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL /*<< SCB_ICSR_VECTACTIVE_Pos*/)       /*!< SCB ICSR: VECTACTIVE Mask */
+
+/* SCB Vector Table Offset Register Definitions */
+#define SCB_VTOR_TBLOFF_Pos                 7U                                            /*!< SCB VTOR: TBLOFF Position */
+#define SCB_VTOR_TBLOFF_Msk                (0x1FFFFFFUL << SCB_VTOR_TBLOFF_Pos)           /*!< SCB VTOR: TBLOFF Mask */
+
+/* SCB Application Interrupt and Reset Control Register Definitions */
+#define SCB_AIRCR_VECTKEY_Pos              16U                                            /*!< SCB AIRCR: VECTKEY Position */
+#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL << SCB_AIRCR_VECTKEY_Pos)            /*!< SCB AIRCR: VECTKEY Mask */
+
+#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            /*!< SCB AIRCR: VECTKEYSTAT Position */
+#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL << SCB_AIRCR_VECTKEYSTAT_Pos)        /*!< SCB AIRCR: VECTKEYSTAT Mask */
+
+#define SCB_AIRCR_ENDIANESS_Pos            15U                                            /*!< SCB AIRCR: ENDIANESS Position */
+#define SCB_AIRCR_ENDIANESS_Msk            (1UL << SCB_AIRCR_ENDIANESS_Pos)               /*!< SCB AIRCR: ENDIANESS Mask */
+
+#define SCB_AIRCR_PRIS_Pos                 14U                                            /*!< SCB AIRCR: PRIS Position */
+#define SCB_AIRCR_PRIS_Msk                 (1UL << SCB_AIRCR_PRIS_Pos)                    /*!< SCB AIRCR: PRIS Mask */
+
+#define SCB_AIRCR_BFHFNMINS_Pos            13U                                            /*!< SCB AIRCR: BFHFNMINS Position */
+#define SCB_AIRCR_BFHFNMINS_Msk            (1UL << SCB_AIRCR_BFHFNMINS_Pos)               /*!< SCB AIRCR: BFHFNMINS Mask */
+
+#define SCB_AIRCR_PRIGROUP_Pos              8U                                            /*!< SCB AIRCR: PRIGROUP Position */
+#define SCB_AIRCR_PRIGROUP_Msk             (7UL << SCB_AIRCR_PRIGROUP_Pos)                /*!< SCB AIRCR: PRIGROUP Mask */
+
+#define SCB_AIRCR_SYSRESETREQS_Pos          3U                                            /*!< SCB AIRCR: SYSRESETREQS Position */
+#define SCB_AIRCR_SYSRESETREQS_Msk         (1UL << SCB_AIRCR_SYSRESETREQS_Pos)            /*!< SCB AIRCR: SYSRESETREQS Mask */
+
+#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            /*!< SCB AIRCR: SYSRESETREQ Position */
+#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL << SCB_AIRCR_SYSRESETREQ_Pos)             /*!< SCB AIRCR: SYSRESETREQ Mask */
+
+#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            /*!< SCB AIRCR: VECTCLRACTIVE Position */
+#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL << SCB_AIRCR_VECTCLRACTIVE_Pos)           /*!< SCB AIRCR: VECTCLRACTIVE Mask */
+
+/* SCB System Control Register Definitions */
+#define SCB_SCR_SEVONPEND_Pos               4U                                            /*!< SCB SCR: SEVONPEND Position */
+#define SCB_SCR_SEVONPEND_Msk              (1UL << SCB_SCR_SEVONPEND_Pos)                 /*!< SCB SCR: SEVONPEND Mask */
+
+#define SCB_SCR_SLEEPDEEPS_Pos              3U                                            /*!< SCB SCR: SLEEPDEEPS Position */
+#define SCB_SCR_SLEEPDEEPS_Msk             (1UL << SCB_SCR_SLEEPDEEPS_Pos)                /*!< SCB SCR: SLEEPDEEPS Mask */
+
+#define SCB_SCR_SLEEPDEEP_Pos               2U                                            /*!< SCB SCR: SLEEPDEEP Position */
+#define SCB_SCR_SLEEPDEEP_Msk              (1UL << SCB_SCR_SLEEPDEEP_Pos)                 /*!< SCB SCR: SLEEPDEEP Mask */
+
+#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            /*!< SCB SCR: SLEEPONEXIT Position */
+#define SCB_SCR_SLEEPONEXIT_Msk            (1UL << SCB_SCR_SLEEPONEXIT_Pos)               /*!< SCB SCR: SLEEPONEXIT Mask */
+
+/* SCB Configuration Control Register Definitions */
+#define SCB_CCR_BP_Pos                     18U                                            /*!< SCB CCR: BP Position */
+#define SCB_CCR_BP_Msk                     (1UL << SCB_CCR_BP_Pos)                        /*!< SCB CCR: BP Mask */
+
+#define SCB_CCR_IC_Pos                     17U                                            /*!< SCB CCR: IC Position */
+#define SCB_CCR_IC_Msk                     (1UL << SCB_CCR_IC_Pos)                        /*!< SCB CCR: IC Mask */
+
+#define SCB_CCR_DC_Pos                     16U                                            /*!< SCB CCR: DC Position */
+#define SCB_CCR_DC_Msk                     (1UL << SCB_CCR_DC_Pos)                        /*!< SCB CCR: DC Mask */
+
+#define SCB_CCR_STKOFHFNMIGN_Pos           10U                                            /*!< SCB CCR: STKOFHFNMIGN Position */
+#define SCB_CCR_STKOFHFNMIGN_Msk           (1UL << SCB_CCR_STKOFHFNMIGN_Pos)              /*!< SCB CCR: STKOFHFNMIGN Mask */
+
+#define SCB_CCR_BFHFNMIGN_Pos               8U                                            /*!< SCB CCR: BFHFNMIGN Position */
+#define SCB_CCR_BFHFNMIGN_Msk              (1UL << SCB_CCR_BFHFNMIGN_Pos)                 /*!< SCB CCR: BFHFNMIGN Mask */
+
+#define SCB_CCR_DIV_0_TRP_Pos               4U                                            /*!< SCB CCR: DIV_0_TRP Position */
+#define SCB_CCR_DIV_0_TRP_Msk              (1UL << SCB_CCR_DIV_0_TRP_Pos)                 /*!< SCB CCR: DIV_0_TRP Mask */
+
+#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            /*!< SCB CCR: UNALIGN_TRP Position */
+#define SCB_CCR_UNALIGN_TRP_Msk            (1UL << SCB_CCR_UNALIGN_TRP_Pos)               /*!< SCB CCR: UNALIGN_TRP Mask */
+
+#define SCB_CCR_USERSETMPEND_Pos            1U                                            /*!< SCB CCR: USERSETMPEND Position */
+#define SCB_CCR_USERSETMPEND_Msk           (1UL << SCB_CCR_USERSETMPEND_Pos)              /*!< SCB CCR: USERSETMPEND Mask */
+
+/* SCB System Handler Control and State Register Definitions */
+#define SCB_SHCSR_HARDFAULTPENDED_Pos      21U                                            /*!< SCB SHCSR: HARDFAULTPENDED Position */
+#define SCB_SHCSR_HARDFAULTPENDED_Msk      (1UL << SCB_SHCSR_HARDFAULTPENDED_Pos)         /*!< SCB SHCSR: HARDFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTPENDED_Pos    20U                                            /*!< SCB SHCSR: SECUREFAULTPENDED Position */
+#define SCB_SHCSR_SECUREFAULTPENDED_Msk    (1UL << SCB_SHCSR_SECUREFAULTPENDED_Pos)       /*!< SCB SHCSR: SECUREFAULTPENDED Mask */
+
+#define SCB_SHCSR_SECUREFAULTENA_Pos       19U                                            /*!< SCB SHCSR: SECUREFAULTENA Position */
+#define SCB_SHCSR_SECUREFAULTENA_Msk       (1UL << SCB_SHCSR_SECUREFAULTENA_Pos)          /*!< SCB SHCSR: SECUREFAULTENA Mask */
+
+#define SCB_SHCSR_USGFAULTENA_Pos          18U                                            /*!< SCB SHCSR: USGFAULTENA Position */
+#define SCB_SHCSR_USGFAULTENA_Msk          (1UL << SCB_SHCSR_USGFAULTENA_Pos)             /*!< SCB SHCSR: USGFAULTENA Mask */
+
+#define SCB_SHCSR_BUSFAULTENA_Pos          17U                                            /*!< SCB SHCSR: BUSFAULTENA Position */
+#define SCB_SHCSR_BUSFAULTENA_Msk          (1UL << SCB_SHCSR_BUSFAULTENA_Pos)             /*!< SCB SHCSR: BUSFAULTENA Mask */
+
+#define SCB_SHCSR_MEMFAULTENA_Pos          16U                                            /*!< SCB SHCSR: MEMFAULTENA Position */
+#define SCB_SHCSR_MEMFAULTENA_Msk          (1UL << SCB_SHCSR_MEMFAULTENA_Pos)             /*!< SCB SHCSR: MEMFAULTENA Mask */
+
+#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            /*!< SCB SHCSR: SVCALLPENDED Position */
+#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL << SCB_SHCSR_SVCALLPENDED_Pos)            /*!< SCB SHCSR: SVCALLPENDED Mask */
+
+#define SCB_SHCSR_BUSFAULTPENDED_Pos       14U                                            /*!< SCB SHCSR: BUSFAULTPENDED Position */
+#define SCB_SHCSR_BUSFAULTPENDED_Msk       (1UL << SCB_SHCSR_BUSFAULTPENDED_Pos)          /*!< SCB SHCSR: BUSFAULTPENDED Mask */
+
+#define SCB_SHCSR_MEMFAULTPENDED_Pos       13U                                            /*!< SCB SHCSR: MEMFAULTPENDED Position */
+#define SCB_SHCSR_MEMFAULTPENDED_Msk       (1UL << SCB_SHCSR_MEMFAULTPENDED_Pos)          /*!< SCB SHCSR: MEMFAULTPENDED Mask */
+
+#define SCB_SHCSR_USGFAULTPENDED_Pos       12U                                            /*!< SCB SHCSR: USGFAULTPENDED Position */
+#define SCB_SHCSR_USGFAULTPENDED_Msk       (1UL << SCB_SHCSR_USGFAULTPENDED_Pos)          /*!< SCB SHCSR: USGFAULTPENDED Mask */
+
+#define SCB_SHCSR_SYSTICKACT_Pos           11U                                            /*!< SCB SHCSR: SYSTICKACT Position */
+#define SCB_SHCSR_SYSTICKACT_Msk           (1UL << SCB_SHCSR_SYSTICKACT_Pos)              /*!< SCB SHCSR: SYSTICKACT Mask */
+
+#define SCB_SHCSR_PENDSVACT_Pos            10U                                            /*!< SCB SHCSR: PENDSVACT Position */
+#define SCB_SHCSR_PENDSVACT_Msk            (1UL << SCB_SHCSR_PENDSVACT_Pos)               /*!< SCB SHCSR: PENDSVACT Mask */
+
+#define SCB_SHCSR_MONITORACT_Pos            8U                                            /*!< SCB SHCSR: MONITORACT Position */
+#define SCB_SHCSR_MONITORACT_Msk           (1UL << SCB_SHCSR_MONITORACT_Pos)              /*!< SCB SHCSR: MONITORACT Mask */
+
+#define SCB_SHCSR_SVCALLACT_Pos             7U                                            /*!< SCB SHCSR: SVCALLACT Position */
+#define SCB_SHCSR_SVCALLACT_Msk            (1UL << SCB_SHCSR_SVCALLACT_Pos)               /*!< SCB SHCSR: SVCALLACT Mask */
+
+#define SCB_SHCSR_NMIACT_Pos                5U                                            /*!< SCB SHCSR: NMIACT Position */
+#define SCB_SHCSR_NMIACT_Msk               (1UL << SCB_SHCSR_NMIACT_Pos)                  /*!< SCB SHCSR: NMIACT Mask */
+
+#define SCB_SHCSR_SECUREFAULTACT_Pos        4U                                            /*!< SCB SHCSR: SECUREFAULTACT Position */
+#define SCB_SHCSR_SECUREFAULTACT_Msk       (1UL << SCB_SHCSR_SECUREFAULTACT_Pos)          /*!< SCB SHCSR: SECUREFAULTACT Mask */
+
+#define SCB_SHCSR_USGFAULTACT_Pos           3U                                            /*!< SCB SHCSR: USGFAULTACT Position */
+#define SCB_SHCSR_USGFAULTACT_Msk          (1UL << SCB_SHCSR_USGFAULTACT_Pos)             /*!< SCB SHCSR: USGFAULTACT Mask */
+
+#define SCB_SHCSR_HARDFAULTACT_Pos          2U                                            /*!< SCB SHCSR: HARDFAULTACT Position */
+#define SCB_SHCSR_HARDFAULTACT_Msk         (1UL << SCB_SHCSR_HARDFAULTACT_Pos)            /*!< SCB SHCSR: HARDFAULTACT Mask */
+
+#define SCB_SHCSR_BUSFAULTACT_Pos           1U                                            /*!< SCB SHCSR: BUSFAULTACT Position */
+#define SCB_SHCSR_BUSFAULTACT_Msk          (1UL << SCB_SHCSR_BUSFAULTACT_Pos)             /*!< SCB SHCSR: BUSFAULTACT Mask */
+
+#define SCB_SHCSR_MEMFAULTACT_Pos           0U                                            /*!< SCB SHCSR: MEMFAULTACT Position */
+#define SCB_SHCSR_MEMFAULTACT_Msk          (1UL /*<< SCB_SHCSR_MEMFAULTACT_Pos*/)         /*!< SCB SHCSR: MEMFAULTACT Mask */
+
+/* SCB Configurable Fault Status Register Definitions */
+#define SCB_CFSR_USGFAULTSR_Pos            16U                                            /*!< SCB CFSR: Usage Fault Status Register Position */
+#define SCB_CFSR_USGFAULTSR_Msk            (0xFFFFUL << SCB_CFSR_USGFAULTSR_Pos)          /*!< SCB CFSR: Usage Fault Status Register Mask */
+
+#define SCB_CFSR_BUSFAULTSR_Pos             8U                                            /*!< SCB CFSR: Bus Fault Status Register Position */
+#define SCB_CFSR_BUSFAULTSR_Msk            (0xFFUL << SCB_CFSR_BUSFAULTSR_Pos)            /*!< SCB CFSR: Bus Fault Status Register Mask */
+
+#define SCB_CFSR_MEMFAULTSR_Pos             0U                                            /*!< SCB CFSR: Memory Manage Fault Status Register Position */
+#define SCB_CFSR_MEMFAULTSR_Msk            (0xFFUL /*<< SCB_CFSR_MEMFAULTSR_Pos*/)        /*!< SCB CFSR: Memory Manage Fault Status Register Mask */
+
+/* MemManage Fault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_MMARVALID_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 7U)               /*!< SCB CFSR (MMFSR): MMARVALID Position */
+#define SCB_CFSR_MMARVALID_Msk             (1UL << SCB_CFSR_MMARVALID_Pos)                /*!< SCB CFSR (MMFSR): MMARVALID Mask */
+
+#define SCB_CFSR_MLSPERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 5U)               /*!< SCB CFSR (MMFSR): MLSPERR Position */
+#define SCB_CFSR_MLSPERR_Msk               (1UL << SCB_CFSR_MLSPERR_Pos)                  /*!< SCB CFSR (MMFSR): MLSPERR Mask */
+
+#define SCB_CFSR_MSTKERR_Pos               (SCB_SHCSR_MEMFAULTACT_Pos + 4U)               /*!< SCB CFSR (MMFSR): MSTKERR Position */
+#define SCB_CFSR_MSTKERR_Msk               (1UL << SCB_CFSR_MSTKERR_Pos)                  /*!< SCB CFSR (MMFSR): MSTKERR Mask */
+
+#define SCB_CFSR_MUNSTKERR_Pos             (SCB_SHCSR_MEMFAULTACT_Pos + 3U)               /*!< SCB CFSR (MMFSR): MUNSTKERR Position */
+#define SCB_CFSR_MUNSTKERR_Msk             (1UL << SCB_CFSR_MUNSTKERR_Pos)                /*!< SCB CFSR (MMFSR): MUNSTKERR Mask */
+
+#define SCB_CFSR_DACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 1U)               /*!< SCB CFSR (MMFSR): DACCVIOL Position */
+#define SCB_CFSR_DACCVIOL_Msk              (1UL << SCB_CFSR_DACCVIOL_Pos)                 /*!< SCB CFSR (MMFSR): DACCVIOL Mask */
+
+#define SCB_CFSR_IACCVIOL_Pos              (SCB_SHCSR_MEMFAULTACT_Pos + 0U)               /*!< SCB CFSR (MMFSR): IACCVIOL Position */
+#define SCB_CFSR_IACCVIOL_Msk              (1UL /*<< SCB_CFSR_IACCVIOL_Pos*/)             /*!< SCB CFSR (MMFSR): IACCVIOL Mask */
+
+/* BusFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_BFARVALID_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 7U)                  /*!< SCB CFSR (BFSR): BFARVALID Position */
+#define SCB_CFSR_BFARVALID_Msk            (1UL << SCB_CFSR_BFARVALID_Pos)                 /*!< SCB CFSR (BFSR): BFARVALID Mask */
+
+#define SCB_CFSR_LSPERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 5U)                  /*!< SCB CFSR (BFSR): LSPERR Position */
+#define SCB_CFSR_LSPERR_Msk               (1UL << SCB_CFSR_LSPERR_Pos)                    /*!< SCB CFSR (BFSR): LSPERR Mask */
+
+#define SCB_CFSR_STKERR_Pos               (SCB_CFSR_BUSFAULTSR_Pos + 4U)                  /*!< SCB CFSR (BFSR): STKERR Position */
+#define SCB_CFSR_STKERR_Msk               (1UL << SCB_CFSR_STKERR_Pos)                    /*!< SCB CFSR (BFSR): STKERR Mask */
+
+#define SCB_CFSR_UNSTKERR_Pos             (SCB_CFSR_BUSFAULTSR_Pos + 3U)                  /*!< SCB CFSR (BFSR): UNSTKERR Position */
+#define SCB_CFSR_UNSTKERR_Msk             (1UL << SCB_CFSR_UNSTKERR_Pos)                  /*!< SCB CFSR (BFSR): UNSTKERR Mask */
+
+#define SCB_CFSR_IMPRECISERR_Pos          (SCB_CFSR_BUSFAULTSR_Pos + 2U)                  /*!< SCB CFSR (BFSR): IMPRECISERR Position */
+#define SCB_CFSR_IMPRECISERR_Msk          (1UL << SCB_CFSR_IMPRECISERR_Pos)               /*!< SCB CFSR (BFSR): IMPRECISERR Mask */
+
+#define SCB_CFSR_PRECISERR_Pos            (SCB_CFSR_BUSFAULTSR_Pos + 1U)                  /*!< SCB CFSR (BFSR): PRECISERR Position */
+#define SCB_CFSR_PRECISERR_Msk            (1UL << SCB_CFSR_PRECISERR_Pos)                 /*!< SCB CFSR (BFSR): PRECISERR Mask */
+
+#define SCB_CFSR_IBUSERR_Pos              (SCB_CFSR_BUSFAULTSR_Pos + 0U)                  /*!< SCB CFSR (BFSR): IBUSERR Position */
+#define SCB_CFSR_IBUSERR_Msk              (1UL << SCB_CFSR_IBUSERR_Pos)                   /*!< SCB CFSR (BFSR): IBUSERR Mask */
+
+/* UsageFault Status Register (part of SCB Configurable Fault Status Register) */
+#define SCB_CFSR_DIVBYZERO_Pos            (SCB_CFSR_USGFAULTSR_Pos + 9U)                  /*!< SCB CFSR (UFSR): DIVBYZERO Position */
+#define SCB_CFSR_DIVBYZERO_Msk            (1UL << SCB_CFSR_DIVBYZERO_Pos)                 /*!< SCB CFSR (UFSR): DIVBYZERO Mask */
+
+#define SCB_CFSR_UNALIGNED_Pos            (SCB_CFSR_USGFAULTSR_Pos + 8U)                  /*!< SCB CFSR (UFSR): UNALIGNED Position */
+#define SCB_CFSR_UNALIGNED_Msk            (1UL << SCB_CFSR_UNALIGNED_Pos)                 /*!< SCB CFSR (UFSR): UNALIGNED Mask */
+
+#define SCB_CFSR_STKOF_Pos                (SCB_CFSR_USGFAULTSR_Pos + 4U)                  /*!< SCB CFSR (UFSR): STKOF Position */
+#define SCB_CFSR_STKOF_Msk                (1UL << SCB_CFSR_STKOF_Pos)                     /*!< SCB CFSR (UFSR): STKOF Mask */
+
+#define SCB_CFSR_NOCP_Pos                 (SCB_CFSR_USGFAULTSR_Pos + 3U)                  /*!< SCB CFSR (UFSR): NOCP Position */
+#define SCB_CFSR_NOCP_Msk                 (1UL << SCB_CFSR_NOCP_Pos)                      /*!< SCB CFSR (UFSR): NOCP Mask */
+
+#define SCB_CFSR_INVPC_Pos                (SCB_CFSR_USGFAULTSR_Pos + 2U)                  /*!< SCB CFSR (UFSR): INVPC Position */
+#define SCB_CFSR_INVPC_Msk                (1UL << SCB_CFSR_INVPC_Pos)                     /*!< SCB CFSR (UFSR): INVPC Mask */
+
+#define SCB_CFSR_INVSTATE_Pos             (SCB_CFSR_USGFAULTSR_Pos + 1U)                  /*!< SCB CFSR (UFSR): INVSTATE Position */
+#define SCB_CFSR_INVSTATE_Msk             (1UL << SCB_CFSR_INVSTATE_Pos)                  /*!< SCB CFSR (UFSR): INVSTATE Mask */
+
+#define SCB_CFSR_UNDEFINSTR_Pos           (SCB_CFSR_USGFAULTSR_Pos + 0U)                  /*!< SCB CFSR (UFSR): UNDEFINSTR Position */
+#define SCB_CFSR_UNDEFINSTR_Msk           (1UL << SCB_CFSR_UNDEFINSTR_Pos)                /*!< SCB CFSR (UFSR): UNDEFINSTR Mask */
+
+/* SCB Hard Fault Status Register Definitions */
+#define SCB_HFSR_DEBUGEVT_Pos              31U                                            /*!< SCB HFSR: DEBUGEVT Position */
+#define SCB_HFSR_DEBUGEVT_Msk              (1UL << SCB_HFSR_DEBUGEVT_Pos)                 /*!< SCB HFSR: DEBUGEVT Mask */
+
+#define SCB_HFSR_FORCED_Pos                30U                                            /*!< SCB HFSR: FORCED Position */
+#define SCB_HFSR_FORCED_Msk                (1UL << SCB_HFSR_FORCED_Pos)                   /*!< SCB HFSR: FORCED Mask */
+
+#define SCB_HFSR_VECTTBL_Pos                1U                                            /*!< SCB HFSR: VECTTBL Position */
+#define SCB_HFSR_VECTTBL_Msk               (1UL << SCB_HFSR_VECTTBL_Pos)                  /*!< SCB HFSR: VECTTBL Mask */
+
+/* SCB Debug Fault Status Register Definitions */
+#define SCB_DFSR_EXTERNAL_Pos               4U                                            /*!< SCB DFSR: EXTERNAL Position */
+#define SCB_DFSR_EXTERNAL_Msk              (1UL << SCB_DFSR_EXTERNAL_Pos)                 /*!< SCB DFSR: EXTERNAL Mask */
+
+#define SCB_DFSR_VCATCH_Pos                 3U                                            /*!< SCB DFSR: VCATCH Position */
+#define SCB_DFSR_VCATCH_Msk                (1UL << SCB_DFSR_VCATCH_Pos)                   /*!< SCB DFSR: VCATCH Mask */
+
+#define SCB_DFSR_DWTTRAP_Pos                2U                                            /*!< SCB DFSR: DWTTRAP Position */
+#define SCB_DFSR_DWTTRAP_Msk               (1UL << SCB_DFSR_DWTTRAP_Pos)                  /*!< SCB DFSR: DWTTRAP Mask */
+
+#define SCB_DFSR_BKPT_Pos                   1U                                            /*!< SCB DFSR: BKPT Position */
+#define SCB_DFSR_BKPT_Msk                  (1UL << SCB_DFSR_BKPT_Pos)                     /*!< SCB DFSR: BKPT Mask */
+
+#define SCB_DFSR_HALTED_Pos                 0U                                            /*!< SCB DFSR: HALTED Position */
+#define SCB_DFSR_HALTED_Msk                (1UL /*<< SCB_DFSR_HALTED_Pos*/)               /*!< SCB DFSR: HALTED Mask */
+
+/* SCB Non-Secure Access Control Register Definitions */
+#define SCB_NSACR_CP11_Pos                 11U                                            /*!< SCB NSACR: CP11 Position */
+#define SCB_NSACR_CP11_Msk                 (1UL << SCB_NSACR_CP11_Pos)                    /*!< SCB NSACR: CP11 Mask */
+
+#define SCB_NSACR_CP10_Pos                 10U                                            /*!< SCB NSACR: CP10 Position */
+#define SCB_NSACR_CP10_Msk                 (1UL << SCB_NSACR_CP10_Pos)                    /*!< SCB NSACR: CP10 Mask */
+
+#define SCB_NSACR_CPn_Pos                   0U                                            /*!< SCB NSACR: CPn Position */
+#define SCB_NSACR_CPn_Msk                  (1UL /*<< SCB_NSACR_CPn_Pos*/)                 /*!< SCB NSACR: CPn Mask */
+
+/* SCB Cache Level ID Register Definitions */
+#define SCB_CLIDR_LOUU_Pos                 27U                                            /*!< SCB CLIDR: LoUU Position */
+#define SCB_CLIDR_LOUU_Msk                 (7UL << SCB_CLIDR_LOUU_Pos)                    /*!< SCB CLIDR: LoUU Mask */
+
+#define SCB_CLIDR_LOC_Pos                  24U                                            /*!< SCB CLIDR: LoC Position */
+#define SCB_CLIDR_LOC_Msk                  (7UL << SCB_CLIDR_LOC_Pos)                     /*!< SCB CLIDR: LoC Mask */
+
+#define SCB_CLIDR_IC_Pos                   0U                                             /*!< SCB CLIDR: IC Position */
+#define SCB_CLIDR_IC_Msk                   (1UL << SCB_CLIDR_IC_Pos)                      /*!< SCB CLIDR: IC Mask */
+
+#define SCB_CLIDR_DC_Pos                   1U                                             /*!< SCB CLIDR: DC Position */
+#define SCB_CLIDR_DC_Msk                   (1UL << SCB_CLIDR_DC_Pos)                      /*!< SCB CLIDR: DC Mask */
+
+
+
+/* SCB Cache Type Register Definitions */
+#define SCB_CTR_FORMAT_Pos                 29U                                            /*!< SCB CTR: Format Position */
+#define SCB_CTR_FORMAT_Msk                 (7UL << SCB_CTR_FORMAT_Pos)                    /*!< SCB CTR: Format Mask */
+
+#define SCB_CTR_CWG_Pos                    24U                                            /*!< SCB CTR: CWG Position */
+#define SCB_CTR_CWG_Msk                    (0xFUL << SCB_CTR_CWG_Pos)                     /*!< SCB CTR: CWG Mask */
+
+#define SCB_CTR_ERG_Pos                    20U                                            /*!< SCB CTR: ERG Position */
+#define SCB_CTR_ERG_Msk                    (0xFUL << SCB_CTR_ERG_Pos)                     /*!< SCB CTR: ERG Mask */
+
+#define SCB_CTR_DMINLINE_Pos               16U                                            /*!< SCB CTR: DminLine Position */
+#define SCB_CTR_DMINLINE_Msk               (0xFUL << SCB_CTR_DMINLINE_Pos)                /*!< SCB CTR: DminLine Mask */
+
+#define SCB_CTR_IMINLINE_Pos                0U                                            /*!< SCB CTR: ImInLine Position */
+#define SCB_CTR_IMINLINE_Msk               (0xFUL /*<< SCB_CTR_IMINLINE_Pos*/)            /*!< SCB CTR: ImInLine Mask */
+
+/* SCB Cache Size ID Register Definitions */
+#define SCB_CCSIDR_WT_Pos                  31U                                            /*!< SCB CCSIDR: WT Position */
+#define SCB_CCSIDR_WT_Msk                  (1UL << SCB_CCSIDR_WT_Pos)                     /*!< SCB CCSIDR: WT Mask */
+
+#define SCB_CCSIDR_WB_Pos                  30U                                            /*!< SCB CCSIDR: WB Position */
+#define SCB_CCSIDR_WB_Msk                  (1UL << SCB_CCSIDR_WB_Pos)                     /*!< SCB CCSIDR: WB Mask */
+
+#define SCB_CCSIDR_RA_Pos                  29U                                            /*!< SCB CCSIDR: RA Position */
+#define SCB_CCSIDR_RA_Msk                  (1UL << SCB_CCSIDR_RA_Pos)                     /*!< SCB CCSIDR: RA Mask */
+
+#define SCB_CCSIDR_WA_Pos                  28U                                            /*!< SCB CCSIDR: WA Position */
+#define SCB_CCSIDR_WA_Msk                  (1UL << SCB_CCSIDR_WA_Pos)                     /*!< SCB CCSIDR: WA Mask */
+
+#define SCB_CCSIDR_NUMSETS_Pos             13U                                            /*!< SCB CCSIDR: NumSets Position */
+#define SCB_CCSIDR_NUMSETS_Msk             (0x7FFFUL << SCB_CCSIDR_NUMSETS_Pos)           /*!< SCB CCSIDR: NumSets Mask */
+
+#define SCB_CCSIDR_ASSOCIATIVITY_Pos        3U                                            /*!< SCB CCSIDR: Associativity Position */
+#define SCB_CCSIDR_ASSOCIATIVITY_Msk       (0x3FFUL << SCB_CCSIDR_ASSOCIATIVITY_Pos)      /*!< SCB CCSIDR: Associativity Mask */
+
+#define SCB_CCSIDR_LINESIZE_Pos             0U                                            /*!< SCB CCSIDR: LineSize Position */
+#define SCB_CCSIDR_LINESIZE_Msk            (7UL /*<< SCB_CCSIDR_LINESIZE_Pos*/)           /*!< SCB CCSIDR: LineSize Mask */
+
+/* SCB Cache Size Selection Register Definitions */
+#define SCB_CSSELR_LEVEL_Pos                1U                                            /*!< SCB CSSELR: Level Position */
+#define SCB_CSSELR_LEVEL_Msk               (7UL << SCB_CSSELR_LEVEL_Pos)                  /*!< SCB CSSELR: Level Mask */
+
+#define SCB_CSSELR_IND_Pos                  0U                                            /*!< SCB CSSELR: InD Position */
+#define SCB_CSSELR_IND_Msk                 (1UL /*<< SCB_CSSELR_IND_Pos*/)                /*!< SCB CSSELR: InD Mask */
+
+/* SCB Software Triggered Interrupt Register Definitions */
+#define SCB_STIR_INTID_Pos                  0U                                            /*!< SCB STIR: INTID Position */
+#define SCB_STIR_INTID_Msk                 (0x1FFUL /*<< SCB_STIR_INTID_Pos*/)            /*!< SCB STIR: INTID Mask */
+
+/* SCB D-Cache line Invalidate by Set-way Register Definitions */
+#define SCB_DCISW_LEVEL_Pos                1U                                             /*!< SCB DCISW: Level Position */
+#define SCB_DCISW_LEVEL_Msk                (7UL << SCB_DCISW_LEVEL_Pos)                   /*!< SCB DCISW: Level Mask */
+
+#define SCB_DCISW_WAY_Pos                  30U                                            /*!< SCB DCISW: Way Position */
+#define SCB_DCISW_WAY_Msk                  (3UL << SCB_DCISW_WAY_Pos)                     /*!< SCB DCISW: Way Mask */
+
+#define SCB_DCISW_SET_Pos                   5U                                            /*!< SCB DCISW: Set Position */
+#define SCB_DCISW_SET_Msk                  (0xFFUL << SCB_DCISW_SET_Pos)                 /*!< SCB DCISW: Set Mask */
+
+/* SCB D-Cache Clean line by Set-way Register Definitions */
+#define SCB_DCCSW_LEVEL_Pos                1U                                             /*!< SCB DCCSW: Level Position */
+#define SCB_DCCSW_LEVEL_Msk                (7UL << SCB_DCCSW_LEVEL_Pos)                   /*!< SCB DCCSW: Level Mask */
+
+#define SCB_DCCSW_WAY_Pos                  30U                                            /*!< SCB DCCSW: Way Position */
+#define SCB_DCCSW_WAY_Msk                  (3UL << SCB_DCCSW_WAY_Pos)                     /*!< SCB DCCSW: Way Mask */
+
+#define SCB_DCCSW_SET_Pos                   5U                                            /*!< SCB DCCSW: Set Position */
+#define SCB_DCCSW_SET_Msk                  (0xFFUL << SCB_DCCSW_SET_Pos)                 /*!< SCB DCCSW: Set Mask */
+
+/* SCB D-Cache Clean and Invalidate by Set-way Register Definitions */
+#define SCB_DCCISW_LEVEL_Pos               1U                                             /*!< SCB DCCISW: Level Position */
+#define SCB_DCCISW_LEVEL_Msk               (7UL << SCB_DCCISW_LEVEL_Pos)                  /*!< SCB DCCISW: Level Mask */
+
+#define SCB_DCCISW_WAY_Pos                 30U                                            /*!< SCB DCCISW: Way Position */
+#define SCB_DCCISW_WAY_Msk                 (3UL << SCB_DCCISW_WAY_Pos)                    /*!< SCB DCCISW: Way Mask */
+
+#define SCB_DCCISW_SET_Pos                  5U                                            /*!< SCB DCCISW: Set Position */
+#define SCB_DCCISW_SET_Msk                 (0xFFUL << SCB_DCCISW_SET_Pos)                /*!< SCB DCCISW: Set Mask */
+
+/* ArmChina: Implementation Defined */
+/* Instruction Tightly-Coupled Memory Control Register Definitions */
+#define SCB_ITCMCR_SZ_Pos                   3U                                            /*!< SCB ITCMCR: SZ Position */
+#define SCB_ITCMCR_SZ_Msk                  (0xFUL << SCB_ITCMCR_SZ_Pos)                   /*!< SCB ITCMCR: SZ Mask */
+#define SCB_ITCMCR_EN_Pos                   0U                                            /*!< SCB ITCMCR: EN Position */
+#define SCB_ITCMCR_EN_Msk                  (1UL /*<< SCB_ITCMCR_EN_Pos*/)                 /*!< SCB ITCMCR: EN Mask */
+/* Data Tightly-Coupled Memory Control Register Definitions */
+#define SCB_DTCMCR_SZ_Pos                   3U                                            /*!< SCB DTCMCR: SZ Position */
+#define SCB_DTCMCR_SZ_Msk                  (0xFUL << SCB_DTCMCR_SZ_Pos)                   /*!< SCB DTCMCR: SZ Mask */
+#define SCB_DTCMCR_EN_Pos                   0U                                            /*!< SCB DTCMCR: EN Position */
+#define SCB_DTCMCR_EN_Msk                  (1UL /*<< SCB_DTCMCR_EN_Pos*/)                 /*!< SCB DTCMCR: EN Mask */
+/* L1 Cache Control Register Definitions */
+#define SCB_CACR_DCCLEAN_Pos                16U                                            /*!< SCB CACR: DCCLEAN Position */
+#define SCB_CACR_DCCLEAN_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: DCCLEAN Mask */
+#define SCB_CACR_ICACTIVE_Pos                13U                                            /*!< SCB CACR: ICACTIVE Position */
+#define SCB_CACR_ICACTIVE_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: ICACTIVE Mask */
+#define SCB_CACR_DCACTIVE_Pos                12U                                            /*!< SCB CACR: DCACTIVE Position */
+#define SCB_CACR_DCACTIVE_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: DCACTIVE Mask */
+#define SCB_CACR_FORCEWT_Pos                2U                                            /*!< SCB CACR: FORCEWT Position */
+#define SCB_CACR_FORCEWT_Msk               (1UL << SCB_CACR_FORCEWT_Pos)                  /*!< SCB CACR: FORCEWT Mask */
+
+/*@} end of group CMSIS_SCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SCnSCB System Controls not in SCB (SCnSCB)
+  \brief    Type definitions for the System Control and ID Register not in the SCB
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Control and ID Register not in the SCB.
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IM  uint32_t ICTR;                   /*!< Offset: 0x004 (R/ )  Interrupt Controller Type Register */
+  __IOM uint32_t ACTLR;                  /*!< Offset: 0x008 (R/W)  Auxiliary Control Register */
+  __IOM uint32_t CPPWR;                  /*!< Offset: 0x00C (R/W)  Coprocessor Power Control  Register */
+} SCnSCB_Type;
+
+/* Interrupt Controller Type Register Definitions */
+#define SCnSCB_ICTR_INTLINESNUM_Pos         0U                                         /*!< ICTR: INTLINESNUM Position */
+#define SCnSCB_ICTR_INTLINESNUM_Msk        (0xFUL /*<< SCnSCB_ICTR_INTLINESNUM_Pos*/)  /*!< ICTR: INTLINESNUM Mask */
+
+/*@} end of group CMSIS_SCnotSCB */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SysTick     System Tick Timer (SysTick)
+  \brief    Type definitions for the System Timer Registers.
+  @{
+ */
+
+/**
+  \brief  Structure type to access the System Timer (SysTick).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SysTick Control and Status Register */
+  __IOM uint32_t LOAD;                   /*!< Offset: 0x004 (R/W)  SysTick Reload Value Register */
+  __IOM uint32_t VAL;                    /*!< Offset: 0x008 (R/W)  SysTick Current Value Register */
+  __IM  uint32_t CALIB;                  /*!< Offset: 0x00C (R/ )  SysTick Calibration Register */
+} SysTick_Type;
+
+/* SysTick Control / Status Register Definitions */
+#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            /*!< SysTick CTRL: COUNTFLAG Position */
+#define SysTick_CTRL_COUNTFLAG_Msk         (1UL << SysTick_CTRL_COUNTFLAG_Pos)            /*!< SysTick CTRL: COUNTFLAG Mask */
+
+#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            /*!< SysTick CTRL: CLKSOURCE Position */
+#define SysTick_CTRL_CLKSOURCE_Msk         (1UL << SysTick_CTRL_CLKSOURCE_Pos)            /*!< SysTick CTRL: CLKSOURCE Mask */
+
+#define SysTick_CTRL_TICKINT_Pos            1U                                            /*!< SysTick CTRL: TICKINT Position */
+#define SysTick_CTRL_TICKINT_Msk           (1UL << SysTick_CTRL_TICKINT_Pos)              /*!< SysTick CTRL: TICKINT Mask */
+
+#define SysTick_CTRL_ENABLE_Pos             0U                                            /*!< SysTick CTRL: ENABLE Position */
+#define SysTick_CTRL_ENABLE_Msk            (1UL /*<< SysTick_CTRL_ENABLE_Pos*/)           /*!< SysTick CTRL: ENABLE Mask */
+
+/* SysTick Reload Register Definitions */
+#define SysTick_LOAD_RELOAD_Pos             0U                                            /*!< SysTick LOAD: RELOAD Position */
+#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL /*<< SysTick_LOAD_RELOAD_Pos*/)    /*!< SysTick LOAD: RELOAD Mask */
+
+/* SysTick Current Register Definitions */
+#define SysTick_VAL_CURRENT_Pos             0U                                            /*!< SysTick VAL: CURRENT Position */
+#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL /*<< SysTick_VAL_CURRENT_Pos*/)    /*!< SysTick VAL: CURRENT Mask */
+
+/* SysTick Calibration Register Definitions */
+#define SysTick_CALIB_NOREF_Pos            31U                                            /*!< SysTick CALIB: NOREF Position */
+#define SysTick_CALIB_NOREF_Msk            (1UL << SysTick_CALIB_NOREF_Pos)               /*!< SysTick CALIB: NOREF Mask */
+
+#define SysTick_CALIB_SKEW_Pos             30U                                            /*!< SysTick CALIB: SKEW Position */
+#define SysTick_CALIB_SKEW_Msk             (1UL << SysTick_CALIB_SKEW_Pos)                /*!< SysTick CALIB: SKEW Mask */
+
+#define SysTick_CALIB_TENMS_Pos             0U                                            /*!< SysTick CALIB: TENMS Position */
+#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL /*<< SysTick_CALIB_TENMS_Pos*/)    /*!< SysTick CALIB: TENMS Mask */
+
+/*@} end of group CMSIS_SysTick */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_ITM     Instrumentation Trace Macrocell (ITM)
+  \brief    Type definitions for the Instrumentation Trace Macrocell (ITM)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Instrumentation Trace Macrocell Register (ITM).
+ */
+typedef struct
+{
+  __OM  union
+  {
+    __OM  uint8_t    u8;                 /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 8-bit */
+    __OM  uint16_t   u16;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 16-bit */
+    __OM  uint32_t   u32;                /*!< Offset: 0x000 ( /W)  ITM Stimulus Port 32-bit */
+  }  PORT [32U];                         /*!< Offset: 0x000 ( /W)  ITM Stimulus Port Registers */
+        uint32_t RESERVED0[864U];
+  __IOM uint32_t TER;                    /*!< Offset: 0xE00 (R/W)  ITM Trace Enable Register */
+        uint32_t RESERVED1[15U];
+  __IOM uint32_t TPR;                    /*!< Offset: 0xE40 (R/W)  ITM Trace Privilege Register */
+        uint32_t RESERVED2[15U];
+  __IOM uint32_t TCR;                    /*!< Offset: 0xE80 (R/W)  ITM Trace Control Register */
+        uint32_t RESERVED3[32U];
+        uint32_t RESERVED4[43U];
+  __OM  uint32_t LAR;                    /*!< Offset: 0xFB0 ( /W)  ITM Lock Access Register */
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R/ )  ITM Lock Status Register */
+        uint32_t RESERVED5[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  ITM Device Architecture Register */
+        uint32_t RESERVED6[4U];
+  __IM  uint32_t PID4;                   /*!< Offset: 0xFD0 (R/ )  ITM Peripheral Identification Register #4 */
+  __IM  uint32_t PID5;                   /*!< Offset: 0xFD4 (R/ )  ITM Peripheral Identification Register #5 */
+  __IM  uint32_t PID6;                   /*!< Offset: 0xFD8 (R/ )  ITM Peripheral Identification Register #6 */
+  __IM  uint32_t PID7;                   /*!< Offset: 0xFDC (R/ )  ITM Peripheral Identification Register #7 */
+  __IM  uint32_t PID0;                   /*!< Offset: 0xFE0 (R/ )  ITM Peripheral Identification Register #0 */
+  __IM  uint32_t PID1;                   /*!< Offset: 0xFE4 (R/ )  ITM Peripheral Identification Register #1 */
+  __IM  uint32_t PID2;                   /*!< Offset: 0xFE8 (R/ )  ITM Peripheral Identification Register #2 */
+  __IM  uint32_t PID3;                   /*!< Offset: 0xFEC (R/ )  ITM Peripheral Identification Register #3 */
+  __IM  uint32_t CID0;                   /*!< Offset: 0xFF0 (R/ )  ITM Component  Identification Register #0 */
+  __IM  uint32_t CID1;                   /*!< Offset: 0xFF4 (R/ )  ITM Component  Identification Register #1 */
+  __IM  uint32_t CID2;                   /*!< Offset: 0xFF8 (R/ )  ITM Component  Identification Register #2 */
+  __IM  uint32_t CID3;                   /*!< Offset: 0xFFC (R/ )  ITM Component  Identification Register #3 */
+} ITM_Type;
+
+/* ITM Stimulus Port Register Definitions */
+#define ITM_STIM_DISABLED_Pos               1U                                            /*!< ITM STIM: DISABLED Position */
+#define ITM_STIM_DISABLED_Msk              (0x1UL << ITM_STIM_DISABLED_Pos)               /*!< ITM STIM: DISABLED Mask */
+
+#define ITM_STIM_FIFOREADY_Pos              0U                                            /*!< ITM STIM: FIFOREADY Position */
+#define ITM_STIM_FIFOREADY_Msk             (0x1UL /*<< ITM_STIM_FIFOREADY_Pos*/)          /*!< ITM STIM: FIFOREADY Mask */
+
+/* ITM Trace Privilege Register Definitions */
+#define ITM_TPR_PRIVMASK_Pos                0U                                            /*!< ITM TPR: PRIVMASK Position */
+#define ITM_TPR_PRIVMASK_Msk               (0xFFFFFFFFUL /*<< ITM_TPR_PRIVMASK_Pos*/)     /*!< ITM TPR: PRIVMASK Mask */
+
+/* ITM Trace Control Register Definitions */
+#define ITM_TCR_BUSY_Pos                   23U                                            /*!< ITM TCR: BUSY Position */
+#define ITM_TCR_BUSY_Msk                   (1UL << ITM_TCR_BUSY_Pos)                      /*!< ITM TCR: BUSY Mask */
+
+#define ITM_TCR_TRACEBUSID_Pos             16U                                            /*!< ITM TCR: ATBID Position */
+#define ITM_TCR_TRACEBUSID_Msk             (0x7FUL << ITM_TCR_TRACEBUSID_Pos)             /*!< ITM TCR: ATBID Mask */
+
+#define ITM_TCR_GTSFREQ_Pos                10U                                            /*!< ITM TCR: Global timestamp frequency Position */
+#define ITM_TCR_GTSFREQ_Msk                (3UL << ITM_TCR_GTSFREQ_Pos)                   /*!< ITM TCR: Global timestamp frequency Mask */
+
+#define ITM_TCR_TSPRESCALE_Pos              8U                                            /*!< ITM TCR: TSPRESCALE Position */
+#define ITM_TCR_TSPRESCALE_Msk             (3UL << ITM_TCR_TSPRESCALE_Pos)                /*!< ITM TCR: TSPRESCALE Mask */
+
+#define ITM_TCR_STALLENA_Pos                5U                                            /*!< ITM TCR: STALLENA Position */
+#define ITM_TCR_STALLENA_Msk               (1UL << ITM_TCR_STALLENA_Pos)                  /*!< ITM TCR: STALLENA Mask */
+
+#define ITM_TCR_SWOENA_Pos                  4U                                            /*!< ITM TCR: SWOENA Position */
+#define ITM_TCR_SWOENA_Msk                 (1UL << ITM_TCR_SWOENA_Pos)                    /*!< ITM TCR: SWOENA Mask */
+
+#define ITM_TCR_DWTENA_Pos                  3U                                            /*!< ITM TCR: DWTENA Position */
+#define ITM_TCR_DWTENA_Msk                 (1UL << ITM_TCR_DWTENA_Pos)                    /*!< ITM TCR: DWTENA Mask */
+
+#define ITM_TCR_SYNCENA_Pos                 2U                                            /*!< ITM TCR: SYNCENA Position */
+#define ITM_TCR_SYNCENA_Msk                (1UL << ITM_TCR_SYNCENA_Pos)                   /*!< ITM TCR: SYNCENA Mask */
+
+#define ITM_TCR_TSENA_Pos                   1U                                            /*!< ITM TCR: TSENA Position */
+#define ITM_TCR_TSENA_Msk                  (1UL << ITM_TCR_TSENA_Pos)                     /*!< ITM TCR: TSENA Mask */
+
+#define ITM_TCR_ITMENA_Pos                  0U                                            /*!< ITM TCR: ITM Enable bit Position */
+#define ITM_TCR_ITMENA_Msk                 (1UL /*<< ITM_TCR_ITMENA_Pos*/)                /*!< ITM TCR: ITM Enable bit Mask */
+
+/* ITM Lock Status Register Definitions */
+#define ITM_LSR_ByteAcc_Pos                 2U                                            /*!< ITM LSR: ByteAcc Position */
+#define ITM_LSR_ByteAcc_Msk                (1UL << ITM_LSR_ByteAcc_Pos)                   /*!< ITM LSR: ByteAcc Mask */
+
+#define ITM_LSR_Access_Pos                  1U                                            /*!< ITM LSR: Access Position */
+#define ITM_LSR_Access_Msk                 (1UL << ITM_LSR_Access_Pos)                    /*!< ITM LSR: Access Mask */
+
+#define ITM_LSR_Present_Pos                 0U                                            /*!< ITM LSR: Present Position */
+#define ITM_LSR_Present_Msk                (1UL /*<< ITM_LSR_Present_Pos*/)               /*!< ITM LSR: Present Mask */
+
+/*@}*/ /* end of group CMSIS_ITM */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_DWT     Data Watchpoint and Trace (DWT)
+  \brief    Type definitions for the Data Watchpoint and Trace (DWT)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Data Watchpoint and Trace Register (DWT).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  Control Register */
+  __IOM uint32_t CYCCNT;                 /*!< Offset: 0x004 (R/W)  Cycle Count Register */
+  __IOM uint32_t CPICNT;                 /*!< Offset: 0x008 (R/W)  CPI Count Register */
+  __IOM uint32_t EXCCNT;                 /*!< Offset: 0x00C (R/W)  Exception Overhead Count Register */
+  __IOM uint32_t SLEEPCNT;               /*!< Offset: 0x010 (R/W)  Sleep Count Register */
+  __IOM uint32_t LSUCNT;                 /*!< Offset: 0x014 (R/W)  LSU Count Register */
+  __IOM uint32_t FOLDCNT;                /*!< Offset: 0x018 (R/W)  Folded-instruction Count Register */
+  __IM  uint32_t PCSR;                   /*!< Offset: 0x01C (R/ )  Program Counter Sample Register */
+  __IOM uint32_t COMP0;                  /*!< Offset: 0x020 (R/W)  Comparator Register 0 */
+        uint32_t RESERVED1[1U];
+  __IOM uint32_t FUNCTION0;              /*!< Offset: 0x028 (R/W)  Function Register 0 */
+        uint32_t RESERVED2[1U];
+  __IOM uint32_t COMP1;                  /*!< Offset: 0x030 (R/W)  Comparator Register 1 */
+        uint32_t RESERVED3[1U];
+  __IOM uint32_t FUNCTION1;              /*!< Offset: 0x038 (R/W)  Function Register 1 */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t COMP2;                  /*!< Offset: 0x040 (R/W)  Comparator Register 2 */
+        uint32_t RESERVED5[1U];
+  __IOM uint32_t FUNCTION2;              /*!< Offset: 0x048 (R/W)  Function Register 2 */
+        uint32_t RESERVED6[1U];
+  __IOM uint32_t COMP3;                  /*!< Offset: 0x050 (R/W)  Comparator Register 3 */
+        uint32_t RESERVED7[1U];
+  __IOM uint32_t FUNCTION3;              /*!< Offset: 0x058 (R/W)  Function Register 3 */
+        uint32_t RESERVED8[1U];
+  __IOM uint32_t COMP4;                  /*!< Offset: 0x060 (R/W)  Comparator Register 4 */
+        uint32_t RESERVED9[1U];
+  __IOM uint32_t FUNCTION4;              /*!< Offset: 0x068 (R/W)  Function Register 4 */
+        uint32_t RESERVED10[1U];
+  __IOM uint32_t COMP5;                  /*!< Offset: 0x070 (R/W)  Comparator Register 5 */
+        uint32_t RESERVED11[1U];
+  __IOM uint32_t FUNCTION5;              /*!< Offset: 0x078 (R/W)  Function Register 5 */
+        uint32_t RESERVED12[1U];
+  __IOM uint32_t COMP6;                  /*!< Offset: 0x080 (R/W)  Comparator Register 6 */
+        uint32_t RESERVED13[1U];
+  __IOM uint32_t FUNCTION6;              /*!< Offset: 0x088 (R/W)  Function Register 6 */
+        uint32_t RESERVED14[1U];
+  __IOM uint32_t COMP7;                  /*!< Offset: 0x090 (R/W)  Comparator Register 7 */
+        uint32_t RESERVED15[1U];
+  __IOM uint32_t FUNCTION7;              /*!< Offset: 0x098 (R/W)  Function Register 7 */
+        uint32_t RESERVED16[1U];
+  __IOM uint32_t COMP8;                  /*!< Offset: 0x0A0 (R/W)  Comparator Register 8 */
+        uint32_t RESERVED17[1U];
+  __IOM uint32_t FUNCTION8;              /*!< Offset: 0x0A8 (R/W)  Function Register 8 */
+        uint32_t RESERVED18[1U];
+  __IOM uint32_t COMP9;                  /*!< Offset: 0x0B0 (R/W)  Comparator Register 9 */
+        uint32_t RESERVED19[1U];
+  __IOM uint32_t FUNCTION9;              /*!< Offset: 0x0B8 (R/W)  Function Register 9 */
+        uint32_t RESERVED20[1U];
+  __IOM uint32_t COMP10;                 /*!< Offset: 0x0C0 (R/W)  Comparator Register 10 */
+        uint32_t RESERVED21[1U];
+  __IOM uint32_t FUNCTION10;             /*!< Offset: 0x0C8 (R/W)  Function Register 10 */
+        uint32_t RESERVED22[1U];
+  __IOM uint32_t COMP11;                 /*!< Offset: 0x0D0 (R/W)  Comparator Register 11 */
+        uint32_t RESERVED23[1U];
+  __IOM uint32_t FUNCTION11;             /*!< Offset: 0x0D8 (R/W)  Function Register 11 */
+        uint32_t RESERVED24[1U];
+  __IOM uint32_t COMP12;                 /*!< Offset: 0x0E0 (R/W)  Comparator Register 12 */
+        uint32_t RESERVED25[1U];
+  __IOM uint32_t FUNCTION12;             /*!< Offset: 0x0E8 (R/W)  Function Register 12 */
+        uint32_t RESERVED26[1U];
+  __IOM uint32_t COMP13;                 /*!< Offset: 0x0F0 (R/W)  Comparator Register 13 */
+        uint32_t RESERVED27[1U];
+  __IOM uint32_t FUNCTION13;             /*!< Offset: 0x0F8 (R/W)  Function Register 13 */
+        uint32_t RESERVED28[1U];
+  __IOM uint32_t COMP14;                 /*!< Offset: 0x100 (R/W)  Comparator Register 14 */
+        uint32_t RESERVED29[1U];
+  __IOM uint32_t FUNCTION14;             /*!< Offset: 0x108 (R/W)  Function Register 14 */
+        uint32_t RESERVED30[1U];
+  __IOM uint32_t COMP15;                 /*!< Offset: 0x110 (R/W)  Comparator Register 15 */
+        uint32_t RESERVED31[1U];
+  __IOM uint32_t FUNCTION15;             /*!< Offset: 0x118 (R/W)  Function Register 15 */
+        uint32_t RESERVED32[934U];
+  __IM  uint32_t LSR;                    /*!< Offset: 0xFB4 (R  )  Lock Status Register */
+        uint32_t RESERVED33[1U];
+  __IM  uint32_t DEVARCH;                /*!< Offset: 0xFBC (R/ )  Device Architecture Register */
+} DWT_Type;
+
+/* DWT Control Register Definitions */
+#define DWT_CTRL_NUMCOMP_Pos               28U                                         /*!< DWT CTRL: NUMCOMP Position */
+#define DWT_CTRL_NUMCOMP_Msk               (0xFUL << DWT_CTRL_NUMCOMP_Pos)             /*!< DWT CTRL: NUMCOMP Mask */
+
+#define DWT_CTRL_NOTRCPKT_Pos              27U                                         /*!< DWT CTRL: NOTRCPKT Position */
+#define DWT_CTRL_NOTRCPKT_Msk              (0x1UL << DWT_CTRL_NOTRCPKT_Pos)            /*!< DWT CTRL: NOTRCPKT Mask */
+
+#define DWT_CTRL_NOEXTTRIG_Pos             26U                                         /*!< DWT CTRL: NOEXTTRIG Position */
+#define DWT_CTRL_NOEXTTRIG_Msk             (0x1UL << DWT_CTRL_NOEXTTRIG_Pos)           /*!< DWT CTRL: NOEXTTRIG Mask */
+
+#define DWT_CTRL_NOCYCCNT_Pos              25U                                         /*!< DWT CTRL: NOCYCCNT Position */
+#define DWT_CTRL_NOCYCCNT_Msk              (0x1UL << DWT_CTRL_NOCYCCNT_Pos)            /*!< DWT CTRL: NOCYCCNT Mask */
+
+#define DWT_CTRL_NOPRFCNT_Pos              24U                                         /*!< DWT CTRL: NOPRFCNT Position */
+#define DWT_CTRL_NOPRFCNT_Msk              (0x1UL << DWT_CTRL_NOPRFCNT_Pos)            /*!< DWT CTRL: NOPRFCNT Mask */
+
+#define DWT_CTRL_CYCDISS_Pos               23U                                         /*!< DWT CTRL: CYCDISS Position */
+#define DWT_CTRL_CYCDISS_Msk               (0x1UL << DWT_CTRL_CYCDISS_Pos)             /*!< DWT CTRL: CYCDISS Mask */
+
+#define DWT_CTRL_CYCEVTENA_Pos             22U                                         /*!< DWT CTRL: CYCEVTENA Position */
+#define DWT_CTRL_CYCEVTENA_Msk             (0x1UL << DWT_CTRL_CYCEVTENA_Pos)           /*!< DWT CTRL: CYCEVTENA Mask */
+
+#define DWT_CTRL_FOLDEVTENA_Pos            21U                                         /*!< DWT CTRL: FOLDEVTENA Position */
+#define DWT_CTRL_FOLDEVTENA_Msk            (0x1UL << DWT_CTRL_FOLDEVTENA_Pos)          /*!< DWT CTRL: FOLDEVTENA Mask */
+
+#define DWT_CTRL_LSUEVTENA_Pos             20U                                         /*!< DWT CTRL: LSUEVTENA Position */
+#define DWT_CTRL_LSUEVTENA_Msk             (0x1UL << DWT_CTRL_LSUEVTENA_Pos)           /*!< DWT CTRL: LSUEVTENA Mask */
+
+#define DWT_CTRL_SLEEPEVTENA_Pos           19U                                         /*!< DWT CTRL: SLEEPEVTENA Position */
+#define DWT_CTRL_SLEEPEVTENA_Msk           (0x1UL << DWT_CTRL_SLEEPEVTENA_Pos)         /*!< DWT CTRL: SLEEPEVTENA Mask */
+
+#define DWT_CTRL_EXCEVTENA_Pos             18U                                         /*!< DWT CTRL: EXCEVTENA Position */
+#define DWT_CTRL_EXCEVTENA_Msk             (0x1UL << DWT_CTRL_EXCEVTENA_Pos)           /*!< DWT CTRL: EXCEVTENA Mask */
+
+#define DWT_CTRL_CPIEVTENA_Pos             17U                                         /*!< DWT CTRL: CPIEVTENA Position */
+#define DWT_CTRL_CPIEVTENA_Msk             (0x1UL << DWT_CTRL_CPIEVTENA_Pos)           /*!< DWT CTRL: CPIEVTENA Mask */
+
+#define DWT_CTRL_EXCTRCENA_Pos             16U                                         /*!< DWT CTRL: EXCTRCENA Position */
+#define DWT_CTRL_EXCTRCENA_Msk             (0x1UL << DWT_CTRL_EXCTRCENA_Pos)           /*!< DWT CTRL: EXCTRCENA Mask */
+
+#define DWT_CTRL_PCSAMPLENA_Pos            12U                                         /*!< DWT CTRL: PCSAMPLENA Position */
+#define DWT_CTRL_PCSAMPLENA_Msk            (0x1UL << DWT_CTRL_PCSAMPLENA_Pos)          /*!< DWT CTRL: PCSAMPLENA Mask */
+
+#define DWT_CTRL_SYNCTAP_Pos               10U                                         /*!< DWT CTRL: SYNCTAP Position */
+#define DWT_CTRL_SYNCTAP_Msk               (0x3UL << DWT_CTRL_SYNCTAP_Pos)             /*!< DWT CTRL: SYNCTAP Mask */
+
+#define DWT_CTRL_CYCTAP_Pos                 9U                                         /*!< DWT CTRL: CYCTAP Position */
+#define DWT_CTRL_CYCTAP_Msk                (0x1UL << DWT_CTRL_CYCTAP_Pos)              /*!< DWT CTRL: CYCTAP Mask */
+
+#define DWT_CTRL_POSTINIT_Pos               5U                                         /*!< DWT CTRL: POSTINIT Position */
+#define DWT_CTRL_POSTINIT_Msk              (0xFUL << DWT_CTRL_POSTINIT_Pos)            /*!< DWT CTRL: POSTINIT Mask */
+
+#define DWT_CTRL_POSTPRESET_Pos             1U                                         /*!< DWT CTRL: POSTPRESET Position */
+#define DWT_CTRL_POSTPRESET_Msk            (0xFUL << DWT_CTRL_POSTPRESET_Pos)          /*!< DWT CTRL: POSTPRESET Mask */
+
+#define DWT_CTRL_CYCCNTENA_Pos              0U                                         /*!< DWT CTRL: CYCCNTENA Position */
+#define DWT_CTRL_CYCCNTENA_Msk             (0x1UL /*<< DWT_CTRL_CYCCNTENA_Pos*/)       /*!< DWT CTRL: CYCCNTENA Mask */
+
+/* DWT CPI Count Register Definitions */
+#define DWT_CPICNT_CPICNT_Pos               0U                                         /*!< DWT CPICNT: CPICNT Position */
+#define DWT_CPICNT_CPICNT_Msk              (0xFFUL /*<< DWT_CPICNT_CPICNT_Pos*/)       /*!< DWT CPICNT: CPICNT Mask */
+
+/* DWT Exception Overhead Count Register Definitions */
+#define DWT_EXCCNT_EXCCNT_Pos               0U                                         /*!< DWT EXCCNT: EXCCNT Position */
+#define DWT_EXCCNT_EXCCNT_Msk              (0xFFUL /*<< DWT_EXCCNT_EXCCNT_Pos*/)       /*!< DWT EXCCNT: EXCCNT Mask */
+
+/* DWT Sleep Count Register Definitions */
+#define DWT_SLEEPCNT_SLEEPCNT_Pos           0U                                         /*!< DWT SLEEPCNT: SLEEPCNT Position */
+#define DWT_SLEEPCNT_SLEEPCNT_Msk          (0xFFUL /*<< DWT_SLEEPCNT_SLEEPCNT_Pos*/)   /*!< DWT SLEEPCNT: SLEEPCNT Mask */
+
+/* DWT LSU Count Register Definitions */
+#define DWT_LSUCNT_LSUCNT_Pos               0U                                         /*!< DWT LSUCNT: LSUCNT Position */
+#define DWT_LSUCNT_LSUCNT_Msk              (0xFFUL /*<< DWT_LSUCNT_LSUCNT_Pos*/)       /*!< DWT LSUCNT: LSUCNT Mask */
+
+/* DWT Folded-instruction Count Register Definitions */
+#define DWT_FOLDCNT_FOLDCNT_Pos             0U                                         /*!< DWT FOLDCNT: FOLDCNT Position */
+#define DWT_FOLDCNT_FOLDCNT_Msk            (0xFFUL /*<< DWT_FOLDCNT_FOLDCNT_Pos*/)     /*!< DWT FOLDCNT: FOLDCNT Mask */
+
+/* DWT Comparator Function Register Definitions */
+#define DWT_FUNCTION_ID_Pos                27U                                         /*!< DWT FUNCTION: ID Position */
+#define DWT_FUNCTION_ID_Msk                (0x1FUL << DWT_FUNCTION_ID_Pos)             /*!< DWT FUNCTION: ID Mask */
+
+#define DWT_FUNCTION_MATCHED_Pos           24U                                         /*!< DWT FUNCTION: MATCHED Position */
+#define DWT_FUNCTION_MATCHED_Msk           (0x1UL << DWT_FUNCTION_MATCHED_Pos)         /*!< DWT FUNCTION: MATCHED Mask */
+
+#define DWT_FUNCTION_DATAVSIZE_Pos         10U                                         /*!< DWT FUNCTION: DATAVSIZE Position */
+#define DWT_FUNCTION_DATAVSIZE_Msk         (0x3UL << DWT_FUNCTION_DATAVSIZE_Pos)       /*!< DWT FUNCTION: DATAVSIZE Mask */
+
+#define DWT_FUNCTION_ACTION_Pos             4U                                         /*!< DWT FUNCTION: ACTION Position */
+#define DWT_FUNCTION_ACTION_Msk            (0x1UL << DWT_FUNCTION_ACTION_Pos)          /*!< DWT FUNCTION: ACTION Mask */
+
+#define DWT_FUNCTION_MATCH_Pos              0U                                         /*!< DWT FUNCTION: MATCH Position */
+#define DWT_FUNCTION_MATCH_Msk             (0xFUL /*<< DWT_FUNCTION_MATCH_Pos*/)       /*!< DWT FUNCTION: MATCH Mask */
+
+/*@}*/ /* end of group CMSIS_DWT */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_TPI     Trace Port Interface (TPI)
+  \brief    Type definitions for the Trace Port Interface (TPI)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Trace Port Interface Register (TPI).
+ */
+typedef struct
+{
+  __IM  uint32_t SSPSR;                  /*!< Offset: 0x000 (R/ )  Supported Parallel Port Size Register */
+  __IOM uint32_t CSPSR;                  /*!< Offset: 0x004 (R/W)  Current Parallel Port Size Register */
+        uint32_t RESERVED0[2U];
+  __IOM uint32_t ACPR;                   /*!< Offset: 0x010 (R/W)  Asynchronous Clock Prescaler Register */
+        uint32_t RESERVED1[55U];
+  __IOM uint32_t SPPR;                   /*!< Offset: 0x0F0 (R/W)  Selected Pin Protocol Register */
+        uint32_t RESERVED2[131U];
+  __IM  uint32_t FFSR;                   /*!< Offset: 0x300 (R/ )  Formatter and Flush Status Register */
+  __IOM uint32_t FFCR;                   /*!< Offset: 0x304 (R/W)  Formatter and Flush Control Register */
+  __IOM uint32_t PSCR;                   /*!< Offset: 0x308 (R/W)  Periodic Synchronization Control Register */
+        uint32_t RESERVED3[759U];
+  __IM  uint32_t TRIGGER;                /*!< Offset: 0xEE8 (R/ )  TRIGGER Register */
+  __IM  uint32_t ITFTTD0;                /*!< Offset: 0xEEC (R/ )  Integration Test FIFO Test Data 0 Register */
+  __IOM uint32_t ITATBCTR2;              /*!< Offset: 0xEF0 (R/W)  Integration Test ATB Control Register 2 */
+        uint32_t RESERVED4[1U];
+  __IM  uint32_t ITATBCTR0;              /*!< Offset: 0xEF8 (R/ )  Integration Test ATB Control Register 0 */
+  __IM  uint32_t ITFTTD1;                /*!< Offset: 0xEFC (R/ )  Integration Test FIFO Test Data 1 Register */
+  __IOM uint32_t ITCTRL;                 /*!< Offset: 0xF00 (R/W)  Integration Mode Control */
+        uint32_t RESERVED5[39U];
+  __IOM uint32_t CLAIMSET;               /*!< Offset: 0xFA0 (R/W)  Claim tag set */
+  __IOM uint32_t CLAIMCLR;               /*!< Offset: 0xFA4 (R/W)  Claim tag clear */
+        uint32_t RESERVED7[8U];
+  __IM  uint32_t DEVID;                  /*!< Offset: 0xFC8 (R/ )  Device Configuration Register */
+  __IM  uint32_t DEVTYPE;                /*!< Offset: 0xFCC (R/ )  Device Type Identifier Register */
+} TPI_Type;
+
+/* TPI Asynchronous Clock Prescaler Register Definitions */
+#define TPI_ACPR_PRESCALER_Pos              0U                                         /*!< TPI ACPR: PRESCALER Position */
+#define TPI_ACPR_PRESCALER_Msk             (0x1FFFUL /*<< TPI_ACPR_PRESCALER_Pos*/)    /*!< TPI ACPR: PRESCALER Mask */
+
+/* TPI Selected Pin Protocol Register Definitions */
+#define TPI_SPPR_TXMODE_Pos                 0U                                         /*!< TPI SPPR: TXMODE Position */
+#define TPI_SPPR_TXMODE_Msk                (0x3UL /*<< TPI_SPPR_TXMODE_Pos*/)          /*!< TPI SPPR: TXMODE Mask */
+
+/* TPI Formatter and Flush Status Register Definitions */
+#define TPI_FFSR_FtNonStop_Pos              3U                                         /*!< TPI FFSR: FtNonStop Position */
+#define TPI_FFSR_FtNonStop_Msk             (0x1UL << TPI_FFSR_FtNonStop_Pos)           /*!< TPI FFSR: FtNonStop Mask */
+
+#define TPI_FFSR_TCPresent_Pos              2U                                         /*!< TPI FFSR: TCPresent Position */
+#define TPI_FFSR_TCPresent_Msk             (0x1UL << TPI_FFSR_TCPresent_Pos)           /*!< TPI FFSR: TCPresent Mask */
+
+#define TPI_FFSR_FtStopped_Pos              1U                                         /*!< TPI FFSR: FtStopped Position */
+#define TPI_FFSR_FtStopped_Msk             (0x1UL << TPI_FFSR_FtStopped_Pos)           /*!< TPI FFSR: FtStopped Mask */
+
+#define TPI_FFSR_FlInProg_Pos               0U                                         /*!< TPI FFSR: FlInProg Position */
+#define TPI_FFSR_FlInProg_Msk              (0x1UL /*<< TPI_FFSR_FlInProg_Pos*/)        /*!< TPI FFSR: FlInProg Mask */
+
+/* TPI Formatter and Flush Control Register Definitions */
+#define TPI_FFCR_TrigIn_Pos                 8U                                         /*!< TPI FFCR: TrigIn Position */
+#define TPI_FFCR_TrigIn_Msk                (0x1UL << TPI_FFCR_TrigIn_Pos)              /*!< TPI FFCR: TrigIn Mask */
+
+#define TPI_FFCR_FOnMan_Pos                 6U                                         /*!< TPI FFCR: FOnMan Position */
+#define TPI_FFCR_FOnMan_Msk                (0x1UL << TPI_FFCR_FOnMan_Pos)              /*!< TPI FFCR: FOnMan Mask */
+
+#define TPI_FFCR_EnFCont_Pos                1U                                         /*!< TPI FFCR: EnFCont Position */
+#define TPI_FFCR_EnFCont_Msk               (0x1UL << TPI_FFCR_EnFCont_Pos)             /*!< TPI FFCR: EnFCont Mask */
+
+/* TPI TRIGGER Register Definitions */
+#define TPI_TRIGGER_TRIGGER_Pos             0U                                         /*!< TPI TRIGGER: TRIGGER Position */
+#define TPI_TRIGGER_TRIGGER_Msk            (0x1UL /*<< TPI_TRIGGER_TRIGGER_Pos*/)      /*!< TPI TRIGGER: TRIGGER Mask */
+
+/* TPI Integration Test FIFO Test Data 0 Register Definitions */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD0: ATB Interface 2 ATVALIDPosition */
+#define TPI_ITFTTD0_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD0: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD0_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD0_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD0_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD0: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD0: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD0_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD0_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD0: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data2_Pos      16U                                         /*!< TPI ITFTTD0: ATB Interface 1 data2 Position */
+#define TPI_ITFTTD0_ATB_IF1_data2_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data2 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data1_Pos       8U                                         /*!< TPI ITFTTD0: ATB Interface 1 data1 Position */
+#define TPI_ITFTTD0_ATB_IF1_data1_Msk      (0xFFUL << TPI_ITFTTD0_ATB_IF1_data1_Pos)   /*!< TPI ITFTTD0: ATB Interface 1 data1 Mask */
+
+#define TPI_ITFTTD0_ATB_IF1_data0_Pos       0U                                          /*!< TPI ITFTTD0: ATB Interface 1 data0 Position */
+#define TPI_ITFTTD0_ATB_IF1_data0_Msk      (0xFFUL /*<< TPI_ITFTTD0_ATB_IF1_data0_Pos*/) /*!< TPI ITFTTD0: ATB Interface 1 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 2 Register Definitions */
+#define TPI_ITATBCTR2_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID2S Position */
+#define TPI_ITATBCTR2_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID2S_Pos)      /*!< TPI ITATBCTR2: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR2_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR2: AFVALID1S Position */
+#define TPI_ITATBCTR2_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR2_AFVALID1S_Pos)      /*!< TPI ITATBCTR2: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR2_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY2S Position */
+#define TPI_ITATBCTR2_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY2S Mask */
+
+#define TPI_ITATBCTR2_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR2: ATREADY1S Position */
+#define TPI_ITATBCTR2_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR2_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR2: ATREADY1S Mask */
+
+/* TPI Integration Test FIFO Test Data 1 Register Definitions */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Pos    29U                                         /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF2_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF2_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 2 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Pos  27U                                         /*!< TPI ITFTTD1: ATB Interface 2 byte count Position */
+#define TPI_ITFTTD1_ATB_IF2_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF2_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 2 byte count Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Pos    26U                                         /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Position */
+#define TPI_ITFTTD1_ATB_IF1_ATVALID_Msk    (0x3UL << TPI_ITFTTD1_ATB_IF1_ATVALID_Pos)  /*!< TPI ITFTTD1: ATB Interface 1 ATVALID Mask */
+
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Pos  24U                                         /*!< TPI ITFTTD1: ATB Interface 1 byte count Position */
+#define TPI_ITFTTD1_ATB_IF1_bytecount_Msk  (0x3UL << TPI_ITFTTD1_ATB_IF1_bytecount_Pos) /*!< TPI ITFTTD1: ATB Interface 1 byte countt Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data2_Pos      16U                                         /*!< TPI ITFTTD1: ATB Interface 2 data2 Position */
+#define TPI_ITFTTD1_ATB_IF2_data2_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data2 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data1_Pos       8U                                         /*!< TPI ITFTTD1: ATB Interface 2 data1 Position */
+#define TPI_ITFTTD1_ATB_IF2_data1_Msk      (0xFFUL << TPI_ITFTTD1_ATB_IF2_data1_Pos)   /*!< TPI ITFTTD1: ATB Interface 2 data1 Mask */
+
+#define TPI_ITFTTD1_ATB_IF2_data0_Pos       0U                                          /*!< TPI ITFTTD1: ATB Interface 2 data0 Position */
+#define TPI_ITFTTD1_ATB_IF2_data0_Msk      (0xFFUL /*<< TPI_ITFTTD1_ATB_IF2_data0_Pos*/) /*!< TPI ITFTTD1: ATB Interface 2 data0 Mask */
+
+/* TPI Integration Test ATB Control Register 0 Definitions */
+#define TPI_ITATBCTR0_AFVALID2S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID2S Position */
+#define TPI_ITATBCTR0_AFVALID2S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID2S_Pos)      /*!< TPI ITATBCTR0: AFVALID2SS Mask */
+
+#define TPI_ITATBCTR0_AFVALID1S_Pos         1U                                         /*!< TPI ITATBCTR0: AFVALID1S Position */
+#define TPI_ITATBCTR0_AFVALID1S_Msk        (0x1UL << TPI_ITATBCTR0_AFVALID1S_Pos)      /*!< TPI ITATBCTR0: AFVALID1SS Mask */
+
+#define TPI_ITATBCTR0_ATREADY2S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY2S Position */
+#define TPI_ITATBCTR0_ATREADY2S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY2S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY2S Mask */
+
+#define TPI_ITATBCTR0_ATREADY1S_Pos         0U                                         /*!< TPI ITATBCTR0: ATREADY1S Position */
+#define TPI_ITATBCTR0_ATREADY1S_Msk        (0x1UL /*<< TPI_ITATBCTR0_ATREADY1S_Pos*/)  /*!< TPI ITATBCTR0: ATREADY1S Mask */
+
+/* TPI Integration Mode Control Register Definitions */
+#define TPI_ITCTRL_Mode_Pos                 0U                                         /*!< TPI ITCTRL: Mode Position */
+#define TPI_ITCTRL_Mode_Msk                (0x3UL /*<< TPI_ITCTRL_Mode_Pos*/)          /*!< TPI ITCTRL: Mode Mask */
+
+/* TPI DEVID Register Definitions */
+#define TPI_DEVID_NRZVALID_Pos             11U                                         /*!< TPI DEVID: NRZVALID Position */
+#define TPI_DEVID_NRZVALID_Msk             (0x1UL << TPI_DEVID_NRZVALID_Pos)           /*!< TPI DEVID: NRZVALID Mask */
+
+#define TPI_DEVID_MANCVALID_Pos            10U                                         /*!< TPI DEVID: MANCVALID Position */
+#define TPI_DEVID_MANCVALID_Msk            (0x1UL << TPI_DEVID_MANCVALID_Pos)          /*!< TPI DEVID: MANCVALID Mask */
+
+#define TPI_DEVID_PTINVALID_Pos             9U                                         /*!< TPI DEVID: PTINVALID Position */
+#define TPI_DEVID_PTINVALID_Msk            (0x1UL << TPI_DEVID_PTINVALID_Pos)          /*!< TPI DEVID: PTINVALID Mask */
+
+#define TPI_DEVID_FIFOSZ_Pos                6U                                         /*!< TPI DEVID: FIFOSZ Position */
+#define TPI_DEVID_FIFOSZ_Msk               (0x7UL << TPI_DEVID_FIFOSZ_Pos)             /*!< TPI DEVID: FIFOSZ Mask */
+
+#define TPI_DEVID_NrTraceInput_Pos          0U                                         /*!< TPI DEVID: NrTraceInput Position */
+#define TPI_DEVID_NrTraceInput_Msk         (0x3FUL /*<< TPI_DEVID_NrTraceInput_Pos*/)  /*!< TPI DEVID: NrTraceInput Mask */
+
+/* TPI DEVTYPE Register Definitions */
+#define TPI_DEVTYPE_SubType_Pos             4U                                         /*!< TPI DEVTYPE: SubType Position */
+#define TPI_DEVTYPE_SubType_Msk            (0xFUL /*<< TPI_DEVTYPE_SubType_Pos*/)      /*!< TPI DEVTYPE: SubType Mask */
+
+#define TPI_DEVTYPE_MajorType_Pos           0U                                         /*!< TPI DEVTYPE: MajorType Position */
+#define TPI_DEVTYPE_MajorType_Msk          (0xFUL << TPI_DEVTYPE_MajorType_Pos)        /*!< TPI DEVTYPE: MajorType Mask */
+
+/*@}*/ /* end of group CMSIS_TPI */
+
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_MPU     Memory Protection Unit (MPU)
+  \brief    Type definitions for the Memory Protection Unit (MPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Memory Protection Unit (MPU).
+ */
+typedef struct
+{
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x000 (R/ )  MPU Type Register */
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x004 (R/W)  MPU Control Register */
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  MPU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  MPU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  MPU Region Limit Address Register */
+  __IOM uint32_t RBAR_A1;                /*!< Offset: 0x014 (R/W)  MPU Region Base Address Register Alias 1 */
+  __IOM uint32_t RLAR_A1;                /*!< Offset: 0x018 (R/W)  MPU Region Limit Address Register Alias 1 */
+  __IOM uint32_t RBAR_A2;                /*!< Offset: 0x01C (R/W)  MPU Region Base Address Register Alias 2 */
+  __IOM uint32_t RLAR_A2;                /*!< Offset: 0x020 (R/W)  MPU Region Limit Address Register Alias 2 */
+  __IOM uint32_t RBAR_A3;                /*!< Offset: 0x024 (R/W)  MPU Region Base Address Register Alias 3 */
+  __IOM uint32_t RLAR_A3;                /*!< Offset: 0x028 (R/W)  MPU Region Limit Address Register Alias 3 */
+        uint32_t RESERVED0[1];
+  union {
+  __IOM uint32_t MAIR[2];
+  struct {
+  __IOM uint32_t MAIR0;                  /*!< Offset: 0x030 (R/W)  MPU Memory Attribute Indirection Register 0 */
+  __IOM uint32_t MAIR1;                  /*!< Offset: 0x034 (R/W)  MPU Memory Attribute Indirection Register 1 */
+  };
+  };
+} MPU_Type;
+
+#define MPU_TYPE_RALIASES                  4U
+
+/* MPU Type Register Definitions */
+#define MPU_TYPE_IREGION_Pos               16U                                            /*!< MPU TYPE: IREGION Position */
+#define MPU_TYPE_IREGION_Msk               (0xFFUL << MPU_TYPE_IREGION_Pos)               /*!< MPU TYPE: IREGION Mask */
+
+#define MPU_TYPE_DREGION_Pos                8U                                            /*!< MPU TYPE: DREGION Position */
+#define MPU_TYPE_DREGION_Msk               (0xFFUL << MPU_TYPE_DREGION_Pos)               /*!< MPU TYPE: DREGION Mask */
+
+#define MPU_TYPE_SEPARATE_Pos               0U                                            /*!< MPU TYPE: SEPARATE Position */
+#define MPU_TYPE_SEPARATE_Msk              (1UL /*<< MPU_TYPE_SEPARATE_Pos*/)             /*!< MPU TYPE: SEPARATE Mask */
+
+/* MPU Control Register Definitions */
+#define MPU_CTRL_PRIVDEFENA_Pos             2U                                            /*!< MPU CTRL: PRIVDEFENA Position */
+#define MPU_CTRL_PRIVDEFENA_Msk            (1UL << MPU_CTRL_PRIVDEFENA_Pos)               /*!< MPU CTRL: PRIVDEFENA Mask */
+
+#define MPU_CTRL_HFNMIENA_Pos               1U                                            /*!< MPU CTRL: HFNMIENA Position */
+#define MPU_CTRL_HFNMIENA_Msk              (1UL << MPU_CTRL_HFNMIENA_Pos)                 /*!< MPU CTRL: HFNMIENA Mask */
+
+#define MPU_CTRL_ENABLE_Pos                 0U                                            /*!< MPU CTRL: ENABLE Position */
+#define MPU_CTRL_ENABLE_Msk                (1UL /*<< MPU_CTRL_ENABLE_Pos*/)               /*!< MPU CTRL: ENABLE Mask */
+
+/* MPU Region Number Register Definitions */
+#define MPU_RNR_REGION_Pos                  0U                                            /*!< MPU RNR: REGION Position */
+#define MPU_RNR_REGION_Msk                 (0xFFUL /*<< MPU_RNR_REGION_Pos*/)             /*!< MPU RNR: REGION Mask */
+
+/* MPU Region Base Address Register Definitions */
+#define MPU_RBAR_BASE_Pos                   5U                                            /*!< MPU RBAR: BASE Position */
+#define MPU_RBAR_BASE_Msk                  (0x7FFFFFFUL << MPU_RBAR_BASE_Pos)             /*!< MPU RBAR: BASE Mask */
+
+#define MPU_RBAR_SH_Pos                     3U                                            /*!< MPU RBAR: SH Position */
+#define MPU_RBAR_SH_Msk                    (0x3UL << MPU_RBAR_SH_Pos)                     /*!< MPU RBAR: SH Mask */
+
+#define MPU_RBAR_AP_Pos                     1U                                            /*!< MPU RBAR: AP Position */
+#define MPU_RBAR_AP_Msk                    (0x3UL << MPU_RBAR_AP_Pos)                     /*!< MPU RBAR: AP Mask */
+
+#define MPU_RBAR_XN_Pos                     0U                                            /*!< MPU RBAR: XN Position */
+#define MPU_RBAR_XN_Msk                    (01UL /*<< MPU_RBAR_XN_Pos*/)                  /*!< MPU RBAR: XN Mask */
+
+/* MPU Region Limit Address Register Definitions */
+#define MPU_RLAR_LIMIT_Pos                  5U                                            /*!< MPU RLAR: LIMIT Position */
+#define MPU_RLAR_LIMIT_Msk                 (0x7FFFFFFUL << MPU_RLAR_LIMIT_Pos)            /*!< MPU RLAR: LIMIT Mask */
+
+#define MPU_RLAR_AttrIndx_Pos               1U                                            /*!< MPU RLAR: AttrIndx Position */
+#define MPU_RLAR_AttrIndx_Msk              (0x7UL << MPU_RLAR_AttrIndx_Pos)               /*!< MPU RLAR: AttrIndx Mask */
+
+#define MPU_RLAR_EN_Pos                     0U                                            /*!< MPU RLAR: Region enable bit Position */
+#define MPU_RLAR_EN_Msk                    (1UL /*<< MPU_RLAR_EN_Pos*/)                   /*!< MPU RLAR: Region enable bit Disable Mask */
+
+/* MPU Memory Attribute Indirection Register 0 Definitions */
+#define MPU_MAIR0_Attr3_Pos                24U                                            /*!< MPU MAIR0: Attr3 Position */
+#define MPU_MAIR0_Attr3_Msk                (0xFFUL << MPU_MAIR0_Attr3_Pos)                /*!< MPU MAIR0: Attr3 Mask */
+
+#define MPU_MAIR0_Attr2_Pos                16U                                            /*!< MPU MAIR0: Attr2 Position */
+#define MPU_MAIR0_Attr2_Msk                (0xFFUL << MPU_MAIR0_Attr2_Pos)                /*!< MPU MAIR0: Attr2 Mask */
+
+#define MPU_MAIR0_Attr1_Pos                 8U                                            /*!< MPU MAIR0: Attr1 Position */
+#define MPU_MAIR0_Attr1_Msk                (0xFFUL << MPU_MAIR0_Attr1_Pos)                /*!< MPU MAIR0: Attr1 Mask */
+
+#define MPU_MAIR0_Attr0_Pos                 0U                                            /*!< MPU MAIR0: Attr0 Position */
+#define MPU_MAIR0_Attr0_Msk                (0xFFUL /*<< MPU_MAIR0_Attr0_Pos*/)            /*!< MPU MAIR0: Attr0 Mask */
+
+/* MPU Memory Attribute Indirection Register 1 Definitions */
+#define MPU_MAIR1_Attr7_Pos                24U                                            /*!< MPU MAIR1: Attr7 Position */
+#define MPU_MAIR1_Attr7_Msk                (0xFFUL << MPU_MAIR1_Attr7_Pos)                /*!< MPU MAIR1: Attr7 Mask */
+
+#define MPU_MAIR1_Attr6_Pos                16U                                            /*!< MPU MAIR1: Attr6 Position */
+#define MPU_MAIR1_Attr6_Msk                (0xFFUL << MPU_MAIR1_Attr6_Pos)                /*!< MPU MAIR1: Attr6 Mask */
+
+#define MPU_MAIR1_Attr5_Pos                 8U                                            /*!< MPU MAIR1: Attr5 Position */
+#define MPU_MAIR1_Attr5_Msk                (0xFFUL << MPU_MAIR1_Attr5_Pos)                /*!< MPU MAIR1: Attr5 Mask */
+
+#define MPU_MAIR1_Attr4_Pos                 0U                                            /*!< MPU MAIR1: Attr4 Position */
+#define MPU_MAIR1_Attr4_Msk                (0xFFUL /*<< MPU_MAIR1_Attr4_Pos*/)            /*!< MPU MAIR1: Attr4 Mask */
+
+/*@} end of group CMSIS_MPU */
+#endif
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_SAU     Security Attribution Unit (SAU)
+  \brief    Type definitions for the Security Attribution Unit (SAU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Security Attribution Unit (SAU).
+ */
+typedef struct
+{
+  __IOM uint32_t CTRL;                   /*!< Offset: 0x000 (R/W)  SAU Control Register */
+  __IM  uint32_t TYPE;                   /*!< Offset: 0x004 (R/ )  SAU Type Register */
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+  __IOM uint32_t RNR;                    /*!< Offset: 0x008 (R/W)  SAU Region Number Register */
+  __IOM uint32_t RBAR;                   /*!< Offset: 0x00C (R/W)  SAU Region Base Address Register */
+  __IOM uint32_t RLAR;                   /*!< Offset: 0x010 (R/W)  SAU Region Limit Address Register */
+#else
+        uint32_t RESERVED0[3];
+#endif
+  __IOM uint32_t SFSR;                   /*!< Offset: 0x014 (R/W)  Secure Fault Status Register */
+  __IOM uint32_t SFAR;                   /*!< Offset: 0x018 (R/W)  Secure Fault Address Register */
+} SAU_Type;
+
+/* SAU Control Register Definitions */
+#define SAU_CTRL_ALLNS_Pos                  1U                                            /*!< SAU CTRL: ALLNS Position */
+#define SAU_CTRL_ALLNS_Msk                 (1UL << SAU_CTRL_ALLNS_Pos)                    /*!< SAU CTRL: ALLNS Mask */
+
+#define SAU_CTRL_ENABLE_Pos                 0U                                            /*!< SAU CTRL: ENABLE Position */
+#define SAU_CTRL_ENABLE_Msk                (1UL /*<< SAU_CTRL_ENABLE_Pos*/)               /*!< SAU CTRL: ENABLE Mask */
+
+/* SAU Type Register Definitions */
+#define SAU_TYPE_SREGION_Pos                0U                                            /*!< SAU TYPE: SREGION Position */
+#define SAU_TYPE_SREGION_Msk               (0xFFUL /*<< SAU_TYPE_SREGION_Pos*/)           /*!< SAU TYPE: SREGION Mask */
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+/* SAU Region Number Register Definitions */
+#define SAU_RNR_REGION_Pos                  0U                                            /*!< SAU RNR: REGION Position */
+#define SAU_RNR_REGION_Msk                 (0xFFUL /*<< SAU_RNR_REGION_Pos*/)             /*!< SAU RNR: REGION Mask */
+
+/* SAU Region Base Address Register Definitions */
+#define SAU_RBAR_BADDR_Pos                  5U                                            /*!< SAU RBAR: BADDR Position */
+#define SAU_RBAR_BADDR_Msk                 (0x7FFFFFFUL << SAU_RBAR_BADDR_Pos)            /*!< SAU RBAR: BADDR Mask */
+
+/* SAU Region Limit Address Register Definitions */
+#define SAU_RLAR_LADDR_Pos                  5U                                            /*!< SAU RLAR: LADDR Position */
+#define SAU_RLAR_LADDR_Msk                 (0x7FFFFFFUL << SAU_RLAR_LADDR_Pos)            /*!< SAU RLAR: LADDR Mask */
+
+#define SAU_RLAR_NSC_Pos                    1U                                            /*!< SAU RLAR: NSC Position */
+#define SAU_RLAR_NSC_Msk                   (1UL << SAU_RLAR_NSC_Pos)                      /*!< SAU RLAR: NSC Mask */
+
+#define SAU_RLAR_ENABLE_Pos                 0U                                            /*!< SAU RLAR: ENABLE Position */
+#define SAU_RLAR_ENABLE_Msk                (1UL /*<< SAU_RLAR_ENABLE_Pos*/)               /*!< SAU RLAR: ENABLE Mask */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+/* Secure Fault Status Register Definitions */
+#define SAU_SFSR_LSERR_Pos                  7U                                            /*!< SAU SFSR: LSERR Position */
+#define SAU_SFSR_LSERR_Msk                 (1UL << SAU_SFSR_LSERR_Pos)                    /*!< SAU SFSR: LSERR Mask */
+
+#define SAU_SFSR_SFARVALID_Pos              6U                                            /*!< SAU SFSR: SFARVALID Position */
+#define SAU_SFSR_SFARVALID_Msk             (1UL << SAU_SFSR_SFARVALID_Pos)                /*!< SAU SFSR: SFARVALID Mask */
+
+#define SAU_SFSR_LSPERR_Pos                 5U                                            /*!< SAU SFSR: LSPERR Position */
+#define SAU_SFSR_LSPERR_Msk                (1UL << SAU_SFSR_LSPERR_Pos)                   /*!< SAU SFSR: LSPERR Mask */
+
+#define SAU_SFSR_INVTRAN_Pos                4U                                            /*!< SAU SFSR: INVTRAN Position */
+#define SAU_SFSR_INVTRAN_Msk               (1UL << SAU_SFSR_INVTRAN_Pos)                  /*!< SAU SFSR: INVTRAN Mask */
+
+#define SAU_SFSR_AUVIOL_Pos                 3U                                            /*!< SAU SFSR: AUVIOL Position */
+#define SAU_SFSR_AUVIOL_Msk                (1UL << SAU_SFSR_AUVIOL_Pos)                   /*!< SAU SFSR: AUVIOL Mask */
+
+#define SAU_SFSR_INVER_Pos                  2U                                            /*!< SAU SFSR: INVER Position */
+#define SAU_SFSR_INVER_Msk                 (1UL << SAU_SFSR_INVER_Pos)                    /*!< SAU SFSR: INVER Mask */
+
+#define SAU_SFSR_INVIS_Pos                  1U                                            /*!< SAU SFSR: INVIS Position */
+#define SAU_SFSR_INVIS_Msk                 (1UL << SAU_SFSR_INVIS_Pos)                    /*!< SAU SFSR: INVIS Mask */
+
+#define SAU_SFSR_INVEP_Pos                  0U                                            /*!< SAU SFSR: INVEP Position */
+#define SAU_SFSR_INVEP_Msk                 (1UL /*<< SAU_SFSR_INVEP_Pos*/)                /*!< SAU SFSR: INVEP Mask */
+
+/*@} end of group CMSIS_SAU */
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_FPU     Floating Point Unit (FPU)
+  \brief    Type definitions for the Floating Point Unit (FPU)
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Floating Point Unit (FPU).
+ */
+typedef struct
+{
+        uint32_t RESERVED0[1U];
+  __IOM uint32_t FPCCR;                  /*!< Offset: 0x004 (R/W)  Floating-Point Context Control Register */
+  __IOM uint32_t FPCAR;                  /*!< Offset: 0x008 (R/W)  Floating-Point Context Address Register */
+  __IOM uint32_t FPDSCR;                 /*!< Offset: 0x00C (R/W)  Floating-Point Default Status Control Register */
+  __IM  uint32_t MVFR0;                  /*!< Offset: 0x010 (R/ )  Media and VFP Feature Register 0 */
+  __IM  uint32_t MVFR1;                  /*!< Offset: 0x014 (R/ )  Media and VFP Feature Register 1 */
+  __IM  uint32_t MVFR2;                  /*!< Offset: 0x018 (R/ )  Media and VFP Feature Register 2 */
+} FPU_Type;
+
+/* Floating-Point Context Control Register Definitions */
+#define FPU_FPCCR_ASPEN_Pos                31U                                            /*!< FPCCR: ASPEN bit Position */
+#define FPU_FPCCR_ASPEN_Msk                (1UL << FPU_FPCCR_ASPEN_Pos)                   /*!< FPCCR: ASPEN bit Mask */
+
+#define FPU_FPCCR_LSPEN_Pos                30U                                            /*!< FPCCR: LSPEN Position */
+#define FPU_FPCCR_LSPEN_Msk                (1UL << FPU_FPCCR_LSPEN_Pos)                   /*!< FPCCR: LSPEN bit Mask */
+
+#define FPU_FPCCR_LSPENS_Pos               29U                                            /*!< FPCCR: LSPENS Position */
+#define FPU_FPCCR_LSPENS_Msk               (1UL << FPU_FPCCR_LSPENS_Pos)                  /*!< FPCCR: LSPENS bit Mask */
+
+#define FPU_FPCCR_CLRONRET_Pos             28U                                            /*!< FPCCR: CLRONRET Position */
+#define FPU_FPCCR_CLRONRET_Msk             (1UL << FPU_FPCCR_CLRONRET_Pos)                /*!< FPCCR: CLRONRET bit Mask */
+
+#define FPU_FPCCR_CLRONRETS_Pos            27U                                            /*!< FPCCR: CLRONRETS Position */
+#define FPU_FPCCR_CLRONRETS_Msk            (1UL << FPU_FPCCR_CLRONRETS_Pos)               /*!< FPCCR: CLRONRETS bit Mask */
+
+#define FPU_FPCCR_TS_Pos                   26U                                            /*!< FPCCR: TS Position */
+#define FPU_FPCCR_TS_Msk                   (1UL << FPU_FPCCR_TS_Pos)                      /*!< FPCCR: TS bit Mask */
+
+#define FPU_FPCCR_UFRDY_Pos                10U                                            /*!< FPCCR: UFRDY Position */
+#define FPU_FPCCR_UFRDY_Msk                (1UL << FPU_FPCCR_UFRDY_Pos)                   /*!< FPCCR: UFRDY bit Mask */
+
+#define FPU_FPCCR_SPLIMVIOL_Pos             9U                                            /*!< FPCCR: SPLIMVIOL Position */
+#define FPU_FPCCR_SPLIMVIOL_Msk            (1UL << FPU_FPCCR_SPLIMVIOL_Pos)               /*!< FPCCR: SPLIMVIOL bit Mask */
+
+#define FPU_FPCCR_MONRDY_Pos                8U                                            /*!< FPCCR: MONRDY Position */
+#define FPU_FPCCR_MONRDY_Msk               (1UL << FPU_FPCCR_MONRDY_Pos)                  /*!< FPCCR: MONRDY bit Mask */
+
+#define FPU_FPCCR_SFRDY_Pos                 7U                                            /*!< FPCCR: SFRDY Position */
+#define FPU_FPCCR_SFRDY_Msk                (1UL << FPU_FPCCR_SFRDY_Pos)                   /*!< FPCCR: SFRDY bit Mask */
+
+#define FPU_FPCCR_BFRDY_Pos                 6U                                            /*!< FPCCR: BFRDY Position */
+#define FPU_FPCCR_BFRDY_Msk                (1UL << FPU_FPCCR_BFRDY_Pos)                   /*!< FPCCR: BFRDY bit Mask */
+
+#define FPU_FPCCR_MMRDY_Pos                 5U                                            /*!< FPCCR: MMRDY Position */
+#define FPU_FPCCR_MMRDY_Msk                (1UL << FPU_FPCCR_MMRDY_Pos)                   /*!< FPCCR: MMRDY bit Mask */
+
+#define FPU_FPCCR_HFRDY_Pos                 4U                                            /*!< FPCCR: HFRDY Position */
+#define FPU_FPCCR_HFRDY_Msk                (1UL << FPU_FPCCR_HFRDY_Pos)                   /*!< FPCCR: HFRDY bit Mask */
+
+#define FPU_FPCCR_THREAD_Pos                3U                                            /*!< FPCCR: processor mode bit Position */
+#define FPU_FPCCR_THREAD_Msk               (1UL << FPU_FPCCR_THREAD_Pos)                  /*!< FPCCR: processor mode active bit Mask */
+
+#define FPU_FPCCR_S_Pos                     2U                                            /*!< FPCCR: Security status of the FP context bit Position */
+#define FPU_FPCCR_S_Msk                    (1UL << FPU_FPCCR_S_Pos)                       /*!< FPCCR: Security status of the FP context bit Mask */
+
+#define FPU_FPCCR_USER_Pos                  1U                                            /*!< FPCCR: privilege level bit Position */
+#define FPU_FPCCR_USER_Msk                 (1UL << FPU_FPCCR_USER_Pos)                    /*!< FPCCR: privilege level bit Mask */
+
+#define FPU_FPCCR_LSPACT_Pos                0U                                            /*!< FPCCR: Lazy state preservation active bit Position */
+#define FPU_FPCCR_LSPACT_Msk               (1UL /*<< FPU_FPCCR_LSPACT_Pos*/)              /*!< FPCCR: Lazy state preservation active bit Mask */
+
+/* Floating-Point Context Address Register Definitions */
+#define FPU_FPCAR_ADDRESS_Pos               3U                                            /*!< FPCAR: ADDRESS bit Position */
+#define FPU_FPCAR_ADDRESS_Msk              (0x1FFFFFFFUL << FPU_FPCAR_ADDRESS_Pos)        /*!< FPCAR: ADDRESS bit Mask */
+
+/* Floating-Point Default Status Control Register Definitions */
+#define FPU_FPDSCR_AHP_Pos                 26U                                            /*!< FPDSCR: AHP bit Position */
+#define FPU_FPDSCR_AHP_Msk                 (1UL << FPU_FPDSCR_AHP_Pos)                    /*!< FPDSCR: AHP bit Mask */
+
+#define FPU_FPDSCR_DN_Pos                  25U                                            /*!< FPDSCR: DN bit Position */
+#define FPU_FPDSCR_DN_Msk                  (1UL << FPU_FPDSCR_DN_Pos)                     /*!< FPDSCR: DN bit Mask */
+
+#define FPU_FPDSCR_FZ_Pos                  24U                                            /*!< FPDSCR: FZ bit Position */
+#define FPU_FPDSCR_FZ_Msk                  (1UL << FPU_FPDSCR_FZ_Pos)                     /*!< FPDSCR: FZ bit Mask */
+
+#define FPU_FPDSCR_RMode_Pos               22U                                            /*!< FPDSCR: RMode bit Position */
+#define FPU_FPDSCR_RMode_Msk               (3UL << FPU_FPDSCR_RMode_Pos)                  /*!< FPDSCR: RMode bit Mask */
+
+/* Media and VFP Feature Register 0 Definitions */
+#define FPU_MVFR0_FP_rounding_modes_Pos    28U                                            /*!< MVFR0: FP rounding modes bits Position */
+#define FPU_MVFR0_FP_rounding_modes_Msk    (0xFUL << FPU_MVFR0_FP_rounding_modes_Pos)     /*!< MVFR0: FP rounding modes bits Mask */
+
+#define FPU_MVFR0_Short_vectors_Pos        24U                                            /*!< MVFR0: Short vectors bits Position */
+#define FPU_MVFR0_Short_vectors_Msk        (0xFUL << FPU_MVFR0_Short_vectors_Pos)         /*!< MVFR0: Short vectors bits Mask */
+
+#define FPU_MVFR0_Square_root_Pos          20U                                            /*!< MVFR0: Square root bits Position */
+#define FPU_MVFR0_Square_root_Msk          (0xFUL << FPU_MVFR0_Square_root_Pos)           /*!< MVFR0: Square root bits Mask */
+
+#define FPU_MVFR0_Divide_Pos               16U                                            /*!< MVFR0: Divide bits Position */
+#define FPU_MVFR0_Divide_Msk               (0xFUL << FPU_MVFR0_Divide_Pos)                /*!< MVFR0: Divide bits Mask */
+
+#define FPU_MVFR0_FP_excep_trapping_Pos    12U                                            /*!< MVFR0: FP exception trapping bits Position */
+#define FPU_MVFR0_FP_excep_trapping_Msk    (0xFUL << FPU_MVFR0_FP_excep_trapping_Pos)     /*!< MVFR0: FP exception trapping bits Mask */
+
+#define FPU_MVFR0_Double_precision_Pos      8U                                            /*!< MVFR0: Double-precision bits Position */
+#define FPU_MVFR0_Double_precision_Msk     (0xFUL << FPU_MVFR0_Double_precision_Pos)      /*!< MVFR0: Double-precision bits Mask */
+
+#define FPU_MVFR0_Single_precision_Pos      4U                                            /*!< MVFR0: Single-precision bits Position */
+#define FPU_MVFR0_Single_precision_Msk     (0xFUL << FPU_MVFR0_Single_precision_Pos)      /*!< MVFR0: Single-precision bits Mask */
+
+#define FPU_MVFR0_A_SIMD_registers_Pos      0U                                            /*!< MVFR0: A_SIMD registers bits Position */
+#define FPU_MVFR0_A_SIMD_registers_Msk     (0xFUL /*<< FPU_MVFR0_A_SIMD_registers_Pos*/)  /*!< MVFR0: A_SIMD registers bits Mask */
+
+/* Media and VFP Feature Register 1 Definitions */
+#define FPU_MVFR1_FP_fused_MAC_Pos         28U                                            /*!< MVFR1: FP fused MAC bits Position */
+#define FPU_MVFR1_FP_fused_MAC_Msk         (0xFUL << FPU_MVFR1_FP_fused_MAC_Pos)          /*!< MVFR1: FP fused MAC bits Mask */
+
+#define FPU_MVFR1_FP_HPFP_Pos              24U                                            /*!< MVFR1: FP HPFP bits Position */
+#define FPU_MVFR1_FP_HPFP_Msk              (0xFUL << FPU_MVFR1_FP_HPFP_Pos)               /*!< MVFR1: FP HPFP bits Mask */
+
+#define FPU_MVFR1_D_NaN_mode_Pos            4U                                            /*!< MVFR1: D_NaN mode bits Position */
+#define FPU_MVFR1_D_NaN_mode_Msk           (0xFUL << FPU_MVFR1_D_NaN_mode_Pos)            /*!< MVFR1: D_NaN mode bits Mask */
+
+#define FPU_MVFR1_FtZ_mode_Pos              0U                                            /*!< MVFR1: FtZ mode bits Position */
+#define FPU_MVFR1_FtZ_mode_Msk             (0xFUL /*<< FPU_MVFR1_FtZ_mode_Pos*/)          /*!< MVFR1: FtZ mode bits Mask */
+
+/* Media and VFP Feature Register 2 Definitions */
+#define FPU_MVFR2_FPMisc_Pos                4U                                            /*!< MVFR2: FPMisc bits Position */
+#define FPU_MVFR2_FPMisc_Msk               (0xFUL << FPU_MVFR2_FPMisc_Pos)                /*!< MVFR2: FPMisc bits Mask */
+
+/*@} end of group CMSIS_FPU */
+
+
+/**
+  \ingroup  CMSIS_core_register
+  \defgroup CMSIS_CoreDebug       Core Debug Registers (CoreDebug)
+  \brief    Type definitions for the Core Debug Registers
+  @{
+ */
+
+/**
+  \brief  Structure type to access the Core Debug Register (CoreDebug).
+ */
+typedef struct
+{
+  __IOM uint32_t DHCSR;                  /*!< Offset: 0x000 (R/W)  Debug Halting Control and Status Register */
+  __OM  uint32_t DCRSR;                  /*!< Offset: 0x004 ( /W)  Debug Core Register Selector Register */
+  __IOM uint32_t DCRDR;                  /*!< Offset: 0x008 (R/W)  Debug Core Register Data Register */
+  __IOM uint32_t DEMCR;                  /*!< Offset: 0x00C (R/W)  Debug Exception and Monitor Control Register */
+        uint32_t RESERVED4[1U];
+  __IOM uint32_t DAUTHCTRL;              /*!< Offset: 0x014 (R/W)  Debug Authentication Control Register */
+  __IOM uint32_t DSCSR;                  /*!< Offset: 0x018 (R/W)  Debug Security Control and Status Register */
+} CoreDebug_Type;
+
+/* Debug Halting Control and Status Register Definitions */
+#define CoreDebug_DHCSR_DBGKEY_Pos         16U                                            /*!< CoreDebug DHCSR: DBGKEY Position */
+#define CoreDebug_DHCSR_DBGKEY_Msk         (0xFFFFUL << CoreDebug_DHCSR_DBGKEY_Pos)       /*!< CoreDebug DHCSR: DBGKEY Mask */
+
+#define CoreDebug_DHCSR_S_RESTART_ST_Pos   26U                                            /*!< CoreDebug DHCSR: S_RESTART_ST Position */
+#define CoreDebug_DHCSR_S_RESTART_ST_Msk   (1UL << CoreDebug_DHCSR_S_RESTART_ST_Pos)      /*!< CoreDebug DHCSR: S_RESTART_ST Mask */
+
+#define CoreDebug_DHCSR_S_RESET_ST_Pos     25U                                            /*!< CoreDebug DHCSR: S_RESET_ST Position */
+#define CoreDebug_DHCSR_S_RESET_ST_Msk     (1UL << CoreDebug_DHCSR_S_RESET_ST_Pos)        /*!< CoreDebug DHCSR: S_RESET_ST Mask */
+
+#define CoreDebug_DHCSR_S_RETIRE_ST_Pos    24U                                            /*!< CoreDebug DHCSR: S_RETIRE_ST Position */
+#define CoreDebug_DHCSR_S_RETIRE_ST_Msk    (1UL << CoreDebug_DHCSR_S_RETIRE_ST_Pos)       /*!< CoreDebug DHCSR: S_RETIRE_ST Mask */
+
+#define CoreDebug_DHCSR_S_LOCKUP_Pos       19U                                            /*!< CoreDebug DHCSR: S_LOCKUP Position */
+#define CoreDebug_DHCSR_S_LOCKUP_Msk       (1UL << CoreDebug_DHCSR_S_LOCKUP_Pos)          /*!< CoreDebug DHCSR: S_LOCKUP Mask */
+
+#define CoreDebug_DHCSR_S_SLEEP_Pos        18U                                            /*!< CoreDebug DHCSR: S_SLEEP Position */
+#define CoreDebug_DHCSR_S_SLEEP_Msk        (1UL << CoreDebug_DHCSR_S_SLEEP_Pos)           /*!< CoreDebug DHCSR: S_SLEEP Mask */
+
+#define CoreDebug_DHCSR_S_HALT_Pos         17U                                            /*!< CoreDebug DHCSR: S_HALT Position */
+#define CoreDebug_DHCSR_S_HALT_Msk         (1UL << CoreDebug_DHCSR_S_HALT_Pos)            /*!< CoreDebug DHCSR: S_HALT Mask */
+
+#define CoreDebug_DHCSR_S_REGRDY_Pos       16U                                            /*!< CoreDebug DHCSR: S_REGRDY Position */
+#define CoreDebug_DHCSR_S_REGRDY_Msk       (1UL << CoreDebug_DHCSR_S_REGRDY_Pos)          /*!< CoreDebug DHCSR: S_REGRDY Mask */
+
+#define CoreDebug_DHCSR_C_SNAPSTALL_Pos     5U                                            /*!< CoreDebug DHCSR: C_SNAPSTALL Position */
+#define CoreDebug_DHCSR_C_SNAPSTALL_Msk    (1UL << CoreDebug_DHCSR_C_SNAPSTALL_Pos)       /*!< CoreDebug DHCSR: C_SNAPSTALL Mask */
+
+#define CoreDebug_DHCSR_C_MASKINTS_Pos      3U                                            /*!< CoreDebug DHCSR: C_MASKINTS Position */
+#define CoreDebug_DHCSR_C_MASKINTS_Msk     (1UL << CoreDebug_DHCSR_C_MASKINTS_Pos)        /*!< CoreDebug DHCSR: C_MASKINTS Mask */
+
+#define CoreDebug_DHCSR_C_STEP_Pos          2U                                            /*!< CoreDebug DHCSR: C_STEP Position */
+#define CoreDebug_DHCSR_C_STEP_Msk         (1UL << CoreDebug_DHCSR_C_STEP_Pos)            /*!< CoreDebug DHCSR: C_STEP Mask */
+
+#define CoreDebug_DHCSR_C_HALT_Pos          1U                                            /*!< CoreDebug DHCSR: C_HALT Position */
+#define CoreDebug_DHCSR_C_HALT_Msk         (1UL << CoreDebug_DHCSR_C_HALT_Pos)            /*!< CoreDebug DHCSR: C_HALT Mask */
+
+#define CoreDebug_DHCSR_C_DEBUGEN_Pos       0U                                            /*!< CoreDebug DHCSR: C_DEBUGEN Position */
+#define CoreDebug_DHCSR_C_DEBUGEN_Msk      (1UL /*<< CoreDebug_DHCSR_C_DEBUGEN_Pos*/)     /*!< CoreDebug DHCSR: C_DEBUGEN Mask */
+
+/* Debug Core Register Selector Register Definitions */
+#define CoreDebug_DCRSR_REGWnR_Pos         16U                                            /*!< CoreDebug DCRSR: REGWnR Position */
+#define CoreDebug_DCRSR_REGWnR_Msk         (1UL << CoreDebug_DCRSR_REGWnR_Pos)            /*!< CoreDebug DCRSR: REGWnR Mask */
+
+#define CoreDebug_DCRSR_REGSEL_Pos          0U                                            /*!< CoreDebug DCRSR: REGSEL Position */
+#define CoreDebug_DCRSR_REGSEL_Msk         (0x1FUL /*<< CoreDebug_DCRSR_REGSEL_Pos*/)     /*!< CoreDebug DCRSR: REGSEL Mask */
+
+/* Debug Exception and Monitor Control Register Definitions */
+#define CoreDebug_DEMCR_TRCENA_Pos         24U                                            /*!< CoreDebug DEMCR: TRCENA Position */
+#define CoreDebug_DEMCR_TRCENA_Msk         (1UL << CoreDebug_DEMCR_TRCENA_Pos)            /*!< CoreDebug DEMCR: TRCENA Mask */
+
+#define CoreDebug_DEMCR_MON_REQ_Pos        19U                                            /*!< CoreDebug DEMCR: MON_REQ Position */
+#define CoreDebug_DEMCR_MON_REQ_Msk        (1UL << CoreDebug_DEMCR_MON_REQ_Pos)           /*!< CoreDebug DEMCR: MON_REQ Mask */
+
+#define CoreDebug_DEMCR_MON_STEP_Pos       18U                                            /*!< CoreDebug DEMCR: MON_STEP Position */
+#define CoreDebug_DEMCR_MON_STEP_Msk       (1UL << CoreDebug_DEMCR_MON_STEP_Pos)          /*!< CoreDebug DEMCR: MON_STEP Mask */
+
+#define CoreDebug_DEMCR_MON_PEND_Pos       17U                                            /*!< CoreDebug DEMCR: MON_PEND Position */
+#define CoreDebug_DEMCR_MON_PEND_Msk       (1UL << CoreDebug_DEMCR_MON_PEND_Pos)          /*!< CoreDebug DEMCR: MON_PEND Mask */
+
+#define CoreDebug_DEMCR_MON_EN_Pos         16U                                            /*!< CoreDebug DEMCR: MON_EN Position */
+#define CoreDebug_DEMCR_MON_EN_Msk         (1UL << CoreDebug_DEMCR_MON_EN_Pos)            /*!< CoreDebug DEMCR: MON_EN Mask */
+
+#define CoreDebug_DEMCR_VC_HARDERR_Pos     10U                                            /*!< CoreDebug DEMCR: VC_HARDERR Position */
+#define CoreDebug_DEMCR_VC_HARDERR_Msk     (1UL << CoreDebug_DEMCR_VC_HARDERR_Pos)        /*!< CoreDebug DEMCR: VC_HARDERR Mask */
+
+#define CoreDebug_DEMCR_VC_INTERR_Pos       9U                                            /*!< CoreDebug DEMCR: VC_INTERR Position */
+#define CoreDebug_DEMCR_VC_INTERR_Msk      (1UL << CoreDebug_DEMCR_VC_INTERR_Pos)         /*!< CoreDebug DEMCR: VC_INTERR Mask */
+
+#define CoreDebug_DEMCR_VC_BUSERR_Pos       8U                                            /*!< CoreDebug DEMCR: VC_BUSERR Position */
+#define CoreDebug_DEMCR_VC_BUSERR_Msk      (1UL << CoreDebug_DEMCR_VC_BUSERR_Pos)         /*!< CoreDebug DEMCR: VC_BUSERR Mask */
+
+#define CoreDebug_DEMCR_VC_STATERR_Pos      7U                                            /*!< CoreDebug DEMCR: VC_STATERR Position */
+#define CoreDebug_DEMCR_VC_STATERR_Msk     (1UL << CoreDebug_DEMCR_VC_STATERR_Pos)        /*!< CoreDebug DEMCR: VC_STATERR Mask */
+
+#define CoreDebug_DEMCR_VC_CHKERR_Pos       6U                                            /*!< CoreDebug DEMCR: VC_CHKERR Position */
+#define CoreDebug_DEMCR_VC_CHKERR_Msk      (1UL << CoreDebug_DEMCR_VC_CHKERR_Pos)         /*!< CoreDebug DEMCR: VC_CHKERR Mask */
+
+#define CoreDebug_DEMCR_VC_NOCPERR_Pos      5U                                            /*!< CoreDebug DEMCR: VC_NOCPERR Position */
+#define CoreDebug_DEMCR_VC_NOCPERR_Msk     (1UL << CoreDebug_DEMCR_VC_NOCPERR_Pos)        /*!< CoreDebug DEMCR: VC_NOCPERR Mask */
+
+#define CoreDebug_DEMCR_VC_MMERR_Pos        4U                                            /*!< CoreDebug DEMCR: VC_MMERR Position */
+#define CoreDebug_DEMCR_VC_MMERR_Msk       (1UL << CoreDebug_DEMCR_VC_MMERR_Pos)          /*!< CoreDebug DEMCR: VC_MMERR Mask */
+
+#define CoreDebug_DEMCR_VC_CORERESET_Pos    0U                                            /*!< CoreDebug DEMCR: VC_CORERESET Position */
+#define CoreDebug_DEMCR_VC_CORERESET_Msk   (1UL /*<< CoreDebug_DEMCR_VC_CORERESET_Pos*/)  /*!< CoreDebug DEMCR: VC_CORERESET Mask */
+
+/* Debug Authentication Control Register Definitions */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos  3U                                            /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Position */
+#define CoreDebug_DAUTHCTRL_INTSPNIDEN_Msk (1UL << CoreDebug_DAUTHCTRL_INTSPNIDEN_Pos)    /*!< CoreDebug DAUTHCTRL: INTSPNIDEN, Mask */
+
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos  2U                                            /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPNIDENSEL_Msk (1UL << CoreDebug_DAUTHCTRL_SPNIDENSEL_Pos)    /*!< CoreDebug DAUTHCTRL: SPNIDENSEL Mask */
+
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Pos   1U                                            /*!< CoreDebug DAUTHCTRL: INTSPIDEN Position */
+#define CoreDebug_DAUTHCTRL_INTSPIDEN_Msk  (1UL << CoreDebug_DAUTHCTRL_INTSPIDEN_Pos)     /*!< CoreDebug DAUTHCTRL: INTSPIDEN Mask */
+
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Pos   0U                                            /*!< CoreDebug DAUTHCTRL: SPIDENSEL Position */
+#define CoreDebug_DAUTHCTRL_SPIDENSEL_Msk  (1UL /*<< CoreDebug_DAUTHCTRL_SPIDENSEL_Pos*/) /*!< CoreDebug DAUTHCTRL: SPIDENSEL Mask */
+
+/* Debug Security Control and Status Register Definitions */
+#define CoreDebug_DSCSR_CDS_Pos            16U                                            /*!< CoreDebug DSCSR: CDS Position */
+#define CoreDebug_DSCSR_CDS_Msk            (1UL << CoreDebug_DSCSR_CDS_Pos)               /*!< CoreDebug DSCSR: CDS Mask */
+
+#define CoreDebug_DSCSR_SBRSEL_Pos          1U                                            /*!< CoreDebug DSCSR: SBRSEL Position */
+#define CoreDebug_DSCSR_SBRSEL_Msk         (1UL << CoreDebug_DSCSR_SBRSEL_Pos)            /*!< CoreDebug DSCSR: SBRSEL Mask */
+
+#define CoreDebug_DSCSR_SBRSELEN_Pos        0U                                            /*!< CoreDebug DSCSR: SBRSELEN Position */
+#define CoreDebug_DSCSR_SBRSELEN_Msk       (1UL /*<< CoreDebug_DSCSR_SBRSELEN_Pos*/)      /*!< CoreDebug DSCSR: SBRSELEN Mask */
+
+/*@} end of group CMSIS_CoreDebug */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_bitfield     Core register bit field macros
+  \brief      Macros for use with bit field definitions (xxx_Pos, xxx_Msk).
+  @{
+ */
+
+/**
+  \brief   Mask and shift a bit field value for use in a register bit range.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of the bit field. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted value.
+*/
+#define _VAL2FLD(field, value)    (((uint32_t)(value) << field ## _Pos) & field ## _Msk)
+
+/**
+  \brief     Mask and shift a register value to extract a bit filed value.
+  \param[in] field  Name of the register bit field.
+  \param[in] value  Value of register. This parameter is interpreted as an uint32_t type.
+  \return           Masked and shifted bit field value.
+*/
+#define _FLD2VAL(field, value)    (((uint32_t)(value) & field ## _Msk) >> field ## _Pos)
+
+/*@} end of group CMSIS_core_bitfield */
+
+
+/**
+  \ingroup    CMSIS_core_register
+  \defgroup   CMSIS_core_base     Core Definitions
+  \brief      Definitions for base addresses, unions, and structures.
+  @{
+ */
+
+/* Memory mapping of Core Hardware */
+  #define SCS_BASE            (0xE000E000UL)                             /*!< System Control Space Base Address */
+  #define ITM_BASE            (0xE0000000UL)                             /*!< ITM Base Address */
+  #define DWT_BASE            (0xE0001000UL)                             /*!< DWT Base Address */
+  #define TPI_BASE            (0xE0040000UL)                             /*!< TPI Base Address */
+  #define CoreDebug_BASE      (0xE000EDF0UL)                             /*!< Core Debug Base Address */
+  #define EMSS_BASE           (0xE001E000UL)                             /*!<Enhanced Memory SubSystem Base Address */
+  
+  #define SysTick_BASE        (SCS_BASE +  0x0010UL)                     /*!< SysTick Base Address */
+  #define NVIC_BASE           (SCS_BASE +  0x0100UL)                     /*!< NVIC Base Address */
+  #define SCB_BASE            (SCS_BASE +  0x0D00UL)                     /*!< System Control Block Base Address */
+
+  #define SCnSCB              ((SCnSCB_Type    *)     SCS_BASE         ) /*!< System control Register not in SCB */
+  #define SCB                 ((SCB_Type       *)     SCB_BASE         ) /*!< SCB configuration struct */
+  #define SysTick             ((SysTick_Type   *)     SysTick_BASE     ) /*!< SysTick configuration struct */
+  #define NVIC                ((NVIC_Type      *)     NVIC_BASE        ) /*!< NVIC configuration struct */
+  #define ITM                 ((ITM_Type       *)     ITM_BASE         ) /*!< ITM configuration struct */
+  #define DWT                 ((DWT_Type       *)     DWT_BASE         ) /*!< DWT configuration struct */
+  #define TPI                 ((TPI_Type       *)     TPI_BASE         ) /*!< TPI configuration struct */
+  #define CoreDebug           ((CoreDebug_Type *)     CoreDebug_BASE   ) /*!< Core Debug configuration struct */
+  #define EMSS                ((EMSS_Type      *)     EMSS_BASE        ) /*!<Ehanced MSS Registers struct */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE          (SCS_BASE +  0x0D90UL)                     /*!< Memory Protection Unit */
+    #define MPU               ((MPU_Type       *)     MPU_BASE         ) /*!< Memory Protection Unit */
+  #endif
+
+  #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+    #define SAU_BASE          (SCS_BASE +  0x0DD0UL)                     /*!< Security Attribution Unit */
+    #define SAU               ((SAU_Type       *)     SAU_BASE         ) /*!< Security Attribution Unit */
+  #endif
+
+  #define FPU_BASE            (SCS_BASE +  0x0F30UL)                     /*!< Floating Point Unit */
+  #define FPU                 ((FPU_Type       *)     FPU_BASE         ) /*!< Floating Point Unit */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+  #define SCS_BASE_NS         (0xE002E000UL)                             /*!< System Control Space Base Address (non-secure address space) */
+  #define CoreDebug_BASE_NS   (0xE002EDF0UL)                             /*!< Core Debug Base Address           (non-secure address space) */
+  #define SysTick_BASE_NS     (SCS_BASE_NS +  0x0010UL)                  /*!< SysTick Base Address              (non-secure address space) */
+  #define NVIC_BASE_NS        (SCS_BASE_NS +  0x0100UL)                  /*!< NVIC Base Address                 (non-secure address space) */
+  #define SCB_BASE_NS         (SCS_BASE_NS +  0x0D00UL)                  /*!< System Control Block Base Address (non-secure address space) */
+
+  #define SCnSCB_NS           ((SCnSCB_Type    *)     SCS_BASE_NS      ) /*!< System control Register not in SCB(non-secure address space) */
+  #define SCB_NS              ((SCB_Type       *)     SCB_BASE_NS      ) /*!< SCB configuration struct          (non-secure address space) */
+  #define SysTick_NS          ((SysTick_Type   *)     SysTick_BASE_NS  ) /*!< SysTick configuration struct      (non-secure address space) */
+  #define NVIC_NS             ((NVIC_Type      *)     NVIC_BASE_NS     ) /*!< NVIC configuration struct         (non-secure address space) */
+  #define CoreDebug_NS        ((CoreDebug_Type *)     CoreDebug_BASE_NS) /*!< Core Debug configuration struct   (non-secure address space) */
+
+  #if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+    #define MPU_BASE_NS       (SCS_BASE_NS +  0x0D90UL)                  /*!< Memory Protection Unit            (non-secure address space) */
+    #define MPU_NS            ((MPU_Type       *)     MPU_BASE_NS      ) /*!< Memory Protection Unit            (non-secure address space) */
+  #endif
+
+  #define FPU_BASE_NS         (SCS_BASE_NS +  0x0F30UL)                  /*!< Floating Point Unit               (non-secure address space) */
+  #define FPU_NS              ((FPU_Type       *)     FPU_BASE_NS      ) /*!< Floating Point Unit               (non-secure address space) */
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+/*@} */
+
+
+
+/*******************************************************************************
+ *                Hardware Abstraction Layer
+  Core Function Interface contains:
+  - Core NVIC Functions
+  - Core SysTick Functions
+  - Core Debug Functions
+  - Core Register Access Functions
+ ******************************************************************************/
+/**
+  \defgroup CMSIS_Core_FunctionInterface Functions and Instructions Reference
+*/
+
+
+
+/* ##########################   NVIC functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_NVICFunctions NVIC Functions
+  \brief    Functions that manage interrupts and exceptions via the NVIC.
+  @{
+ */
+
+#ifdef CMSIS_NVIC_VIRTUAL
+  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
+    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
+  #endif
+  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping
+  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping
+  #define NVIC_EnableIRQ              __NVIC_EnableIRQ
+  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ
+  #define NVIC_DisableIRQ             __NVIC_DisableIRQ
+  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ
+  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ
+  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ
+  #define NVIC_GetActive              __NVIC_GetActive
+  #define NVIC_SetPriority            __NVIC_SetPriority
+  #define NVIC_GetPriority            __NVIC_GetPriority
+  #define NVIC_SystemReset            __NVIC_SystemReset
+  #define SW_SystemReset              __SW_SystemReset
+#endif /* CMSIS_NVIC_VIRTUAL */
+
+#ifdef CMSIS_VECTAB_VIRTUAL
+  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
+  #endif
+  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
+#else
+  #define NVIC_SetVector              __NVIC_SetVector
+  #define NVIC_GetVector              __NVIC_GetVector
+#endif  /* (CMSIS_VECTAB_VIRTUAL) */
+
+#define NVIC_USER_IRQ_OFFSET          16
+
+
+/* Special LR values for Secure/Non-Secure call handling and exception handling                                               */
+
+/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS                   */ 
+#define FNC_RETURN                 (0xFEFFFFFFUL)     /* bit [0] ignored when processing a branch                             */
+
+/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
+#define EXC_RETURN_PREFIX          (0xFF000000UL)     /* bits [31:24] set to indicate an EXC_RETURN value                     */
+#define EXC_RETURN_S               (0x00000040UL)     /* bit [6] stack used to push registers: 0=Non-secure 1=Secure          */
+#define EXC_RETURN_DCRS            (0x00000020UL)     /* bit [5] stacking rules for called registers: 0=skipped 1=saved       */
+#define EXC_RETURN_FTYPE           (0x00000010UL)     /* bit [4] allocate stack for floating-point context: 0=done 1=skipped  */
+#define EXC_RETURN_MODE            (0x00000008UL)     /* bit [3] processor mode for return: 0=Handler mode 1=Thread mode      */
+#define EXC_RETURN_SPSEL           (0x00000004UL)     /* bit [2] stack pointer used to restore context: 0=MSP 1=PSP           */
+#define EXC_RETURN_ES              (0x00000001UL)     /* bit [0] security state exception was taken to: 0=Non-secure 1=Secure */
+
+/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking                            */
+#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)  /* Value for processors with floating-point extension:                  */
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125AUL)     /* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE                   */
+#else 
+#define EXC_INTEGRITY_SIGNATURE     (0xFEFA125BUL)     /* Value for processors without floating-point extension                */
+#endif
+
+
+/**
+  \brief   Set Priority Grouping
+  \details Sets the priority grouping field using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB->AIRCR;                                                   /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping
+  \details Reads the priority grouping field from the NVIC Interrupt Controller.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
+{
+  return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt
+  \details Enables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    __COMPILER_BARRIER();
+    NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __COMPILER_BARRIER();
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status
+  \details Returns a device specific interrupt enable status from the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt
+  \details Disables a device specific interrupt in the NVIC interrupt controller.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+    __DSB();
+    __ISB();
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt
+  \details Reads the NVIC pending register and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt
+  \details Sets the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt
+  \details Clears the pending bit of a device specific interrupt in the NVIC pending register.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt
+  \details Reads the active register in the NVIC and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Get Interrupt Target State
+  \details Reads the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+  \return             1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_GetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Target State
+  \details Sets the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_SetTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] |=  ((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Clear Interrupt Target State
+  \details Clears the interrupt target field in the NVIC and returns the interrupt target bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  if interrupt is assigned to Secure
+                      1  if interrupt is assigned to Non Secure
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t NVIC_ClearTargetState(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] &= ~((uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)));
+    return((uint32_t)(((NVIC->ITNS[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+
+/**
+  \brief   Set Interrupt Priority
+  \details Sets the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every processor exception.
+ */
+__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority
+  \details Reads the priority of a device specific interrupt or a processor exception.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority.
+                      Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+
+
+/**
+  \brief   Encode Priority
+  \details Encodes the priority for an interrupt with the given priority group,
+           preemptive priority value, and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]     PriorityGroup  Used priority group.
+  \param [in]   PreemptPriority  Preemptive priority value (starting from 0).
+  \param [in]       SubPriority  Subpriority value (starting from 0).
+  \return                        Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
+ */
+__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  return (
+           ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
+           ((SubPriority     & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL)))
+         );
+}
+
+
+/**
+  \brief   Decode Priority
+  \details Decodes an interrupt priority value with a given priority group to
+           preemptive priority value and subpriority value.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.
+  \param [in]         Priority   Priority value, which can be retrieved with the function \ref NVIC_GetPriority().
+  \param [in]     PriorityGroup  Used priority group.
+  \param [out] pPreemptPriority  Preemptive priority value (starting from 0).
+  \param [out]     pSubPriority  Subpriority value (starting from 0).
+ */
+__STATIC_INLINE void NVIC_DecodePriority (uint32_t Priority, uint32_t PriorityGroup, uint32_t* const pPreemptPriority, uint32_t* const pSubPriority)
+{
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);   /* only values 0..7 are used          */
+  uint32_t PreemptPriorityBits;
+  uint32_t SubPriorityBits;
+
+  PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
+  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
+
+  *pPreemptPriority = (Priority >> SubPriorityBits) & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL);
+  *pSubPriority     = (Priority                   ) & (uint32_t)((1UL << (SubPriorityBits    )) - 1UL);
+}
+
+
+/**
+  \brief   Set Interrupt Vector
+  \details Sets an interrupt vector in SRAM based interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+           VTOR must been relocated to SRAM before.
+  \param [in]   IRQn      Interrupt number
+  \param [in]   vector    Address of interrupt handler function
+ */
+__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET] = vector;
+  __DSB();
+}
+
+
+/**
+  \brief   Get Interrupt Vector
+  \details Reads an interrupt vector from interrupt vector table.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn      Interrupt number.
+  \return                 Address of interrupt handler function
+ */
+__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)
+{
+  uint32_t *vectors = (uint32_t *)SCB->VTOR;
+  return vectors[(int32_t)IRQn + NVIC_USER_IRQ_OFFSET];
+}
+
+
+/**
+  \brief   System Reset
+  \details Initiates a system reset request to reset the MCU.
+ */
+__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses including
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) |
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         /* Keep priority group unchanged */
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+/**
+  \brief   Software Reset
+  \details Initiates a system reset request to reset the CPU.
+ */
+__NO_RETURN __STATIC_INLINE void __SW_SystemReset(void)
+{
+  __DSB();                                                          /* Ensure all outstanding memory accesses including
+                                                                       buffered write are completed before reset */
+  SCB->AIRCR  = (uint32_t)((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)    |
+                           (SCB->AIRCR & SCB_AIRCR_BFHFNMINS_Msk) | /* Keep BFHFNMINS unchanged. Use this Reset function in case your case need to keep it */
+                           (SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) | /* Keep priority group unchanged */
+                            SCB_AIRCR_SYSRESETREQ_Msk    );         
+  __DSB();                                                          /* Ensure completion of memory access */
+
+  for(;;)                                                           /* wait until reset */
+  {
+    __NOP();
+  }
+}
+
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   Set Priority Grouping (non-secure)
+  \details Sets the non-secure priority grouping field when in secure state using the required unlock sequence.
+           The parameter PriorityGroup is assigned to the field SCB->AIRCR [10:8] PRIGROUP field.
+           Only values from 0..7 are used.
+           In case of a conflict between priority grouping and available
+           priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
+  \param [in]      PriorityGroup  Priority grouping field.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriorityGrouping_NS(uint32_t PriorityGroup)
+{
+  uint32_t reg_value;
+  uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL);             /* only values 0..7 are used          */
+
+  reg_value  =  SCB_NS->AIRCR;                                                /* read old register configuration    */
+  reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change               */
+  reg_value  =  (reg_value                                   |
+                ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
+                (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos)  );              /* Insert write key and priority group */
+  SCB_NS->AIRCR =  reg_value;
+}
+
+
+/**
+  \brief   Get Priority Grouping (non-secure)
+  \details Reads the priority grouping field from the non-secure NVIC when in secure state.
+  \return                Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriorityGrouping_NS(void)
+{
+  return ((uint32_t)((SCB_NS->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
+}
+
+
+/**
+  \brief   Enable Interrupt (non-secure)
+  \details Enables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_EnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Enable status (non-secure)
+  \details Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt is not enabled.
+  \return             1  Interrupt is enabled.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetEnableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISER[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Disable Interrupt (non-secure)
+  \details Disables a device specific interrupt in the non-secure NVIC interrupt controller when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_DisableIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Pending Interrupt (non-secure)
+  \details Reads the NVIC pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not pending.
+  \return             1  Interrupt status is pending.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Pending Interrupt (non-secure)
+  \details Sets the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ISPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Clear Pending Interrupt (non-secure)
+  \details Clears the pending bit of a device specific interrupt in the non-secure NVIC pending register when in secure state.
+  \param [in]      IRQn  Device specific interrupt number.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE void TZ_NVIC_ClearPendingIRQ_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->ICPR[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
+  }
+}
+
+
+/**
+  \brief   Get Active Interrupt (non-secure)
+  \details Reads the active register in non-secure NVIC when in secure state and returns the active bit for the device specific interrupt.
+  \param [in]      IRQn  Device specific interrupt number.
+  \return             0  Interrupt status is not active.
+  \return             1  Interrupt status is active.
+  \note    IRQn must not be negative.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetActive_NS(IRQn_Type IRQn)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return((uint32_t)(((NVIC_NS->IABR[(((uint32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
+  }
+  else
+  {
+    return(0U);
+  }
+}
+
+
+/**
+  \brief   Set Interrupt Priority (non-secure)
+  \details Sets the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]      IRQn  Interrupt number.
+  \param [in]  priority  Priority to set.
+  \note    The priority cannot be set for every non-secure processor exception.
+ */
+__STATIC_INLINE void TZ_NVIC_SetPriority_NS(IRQn_Type IRQn, uint32_t priority)
+{
+  if ((int32_t)(IRQn) >= 0)
+  {
+    NVIC_NS->IPR[((uint32_t)IRQn)]               = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+  else
+  {
+    SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
+  }
+}
+
+
+/**
+  \brief   Get Interrupt Priority (non-secure)
+  \details Reads the priority of a non-secure device specific interrupt or a non-secure processor exception when in secure state.
+           The interrupt number can be positive to specify a device specific interrupt,
+           or negative to specify a processor exception.
+  \param [in]   IRQn  Interrupt number.
+  \return             Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller.
+ */
+__STATIC_INLINE uint32_t TZ_NVIC_GetPriority_NS(IRQn_Type IRQn)
+{
+
+  if ((int32_t)(IRQn) >= 0)
+  {
+    return(((uint32_t)NVIC_NS->IPR[((uint32_t)IRQn)]               >> (8U - __NVIC_PRIO_BITS)));
+  }
+  else
+  {
+    return(((uint32_t)SCB_NS->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] >> (8U - __NVIC_PRIO_BITS)));
+  }
+}
+#endif /*  defined (__ARM_FEATURE_CMSE) &&(__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_NVICFunctions */
+
+/* ##########################  MPU functions  #################################### */
+
+#if defined (__MPU_PRESENT) && (__MPU_PRESENT == 1U)
+
+#include "mpu_armv8.h"
+
+#endif
+
+/* ##########################  FPU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_FpuFunctions FPU Functions
+  \brief    Function that provides FPU type.
+  @{
+ */
+
+/**
+  \brief   get FPU type
+  \details returns the FPU type
+  \returns
+   - \b  0: No FPU
+   - \b  1: Single precision FPU
+   - \b  2: Double + Single precision FPU
+ */
+__STATIC_INLINE uint32_t SCB_GetFPUType(void)
+{
+  uint32_t mvfr0;
+
+  mvfr0 = FPU->MVFR0;
+  if      ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x220U)
+  {
+    return 2U;           /* Double + Single precision FPU */
+  }
+  else if ((mvfr0 & (FPU_MVFR0_Single_precision_Msk | FPU_MVFR0_Double_precision_Msk)) == 0x020U)
+  {
+    return 1U;           /* Single precision FPU */
+  }
+  else
+  {
+    return 0U;           /* No FPU */
+  }
+}
+
+
+/*@} end of CMSIS_Core_FpuFunctions */
+
+
+
+/* ##########################   SAU functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SAUFunctions SAU Functions
+  \brief    Functions that configure the SAU.
+  @{
+ */
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+
+/**
+  \brief   Enable SAU
+  \details Enables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Enable(void)
+{
+    SAU->CTRL |=  (SAU_CTRL_ENABLE_Msk);
+}
+
+
+
+/**
+  \brief   Disable SAU
+  \details Disables the Security Attribution Unit (SAU).
+ */
+__STATIC_INLINE void TZ_SAU_Disable(void)
+{
+    SAU->CTRL &= ~(SAU_CTRL_ENABLE_Msk);
+}
+
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+/*@} end of CMSIS_Core_SAUFunctions */
+
+
+/* ##########################  Cache functions  #################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_CacheFunctions Cache Functions
+  \brief    Functions that configure Instruction and Data cache.
+  @{
+ */
+
+/* Cache Size ID Register Macros */
+#define CCSIDR_WAYS(x)         (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
+#define CCSIDR_SETS(x)         (((x) & SCB_CCSIDR_NUMSETS_Msk      ) >> SCB_CCSIDR_NUMSETS_Pos      )
+
+#define __SCB_DCACHE_LINE_SIZE  32U /*!< STAR cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
+#define __SCB_ICACHE_LINE_SIZE  32U /*!< STAR cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
+
+/**
+  \brief   Enable I-Cache
+  \details Turns on I-Cache
+  */
+__STATIC_FORCEINLINE void SCB_EnableICache (void)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if (SCB->CCR & SCB_CCR_IC_Msk) return;  /* return if ICache is already enabled */
+
+    __DSB();
+    __ISB();
+    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
+    __DSB();
+    __ISB();
+    SCB->CCR |=  (uint32_t)SCB_CCR_IC_Msk;  /* enable I-Cache */
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Disable I-Cache
+  \details Turns off I-Cache
+  */
+__STATIC_FORCEINLINE void SCB_DisableICache (void)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    __DSB();
+    __ISB();
+    SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk;  /* disable I-Cache */
+    SCB->ICIALLU = 0UL;                     /* invalidate I-Cache */
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Invalidate I-Cache
+  \details Invalidates I-Cache
+  */
+__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    __DSB();
+    __ISB();
+    SCB->ICIALLU = 0UL;
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   I-Cache Invalidate by address
+  \details Invalidates I-Cache for the given address.
+           I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           I-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
+  \param[in]   isize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (void *addr, int32_t isize)
+{
+  #if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
+    if ( isize > 0 ) {
+       int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
+
+      __DSB();
+
+      do {
+        SCB->ICIMVAU = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_ICACHE_LINE_SIZE;
+        op_size -= __SCB_ICACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
+  \brief   Enable D-Cache
+  \details Turns on D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_EnableDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    if (SCB->CCR & SCB_CCR_DC_Msk) return;  /* return if DCache is already enabled */
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+    __DSB();
+
+    SCB->CCR |=  (uint32_t)SCB_CCR_DC_Msk;  /* enable D-Cache */
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Disable D-Cache
+  \details Turns off D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_DisableDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean & invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Invalidate D-Cache
+  \details Invalidates D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
+                      ((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Clean D-Cache
+  \details Cleans D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_CleanDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
+                      ((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   Clean & Invalidate D-Cache
+  \details Cleans and Invalidates D-Cache
+  */
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    uint32_t ccsidr;
+    uint32_t sets;
+    uint32_t ways;
+
+    SCB->CSSELR = 0U;                       /* select Level 1 data cache */
+    __DSB();
+
+    ccsidr = SCB->CCSIDR;
+
+                                            /* clean & invalidate D-Cache */
+    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    do {
+      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      do {
+        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
+        #if defined ( __CC_ARM )
+          __schedule_barrier();
+        #endif
+      } while (ways-- != 0U);
+    } while(sets-- != 0U);
+
+    __DSB();
+    __ISB();
+  #endif
+}
+
+
+/**
+  \brief   D-Cache Invalidate by address
+  \details Invalidates D-Cache for the given address.
+           D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are invalidated.
+  \param[in]   addr    address
+  \param[in]   dsize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsize)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
+
+      do {
+        SCB->DCIMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
+  \brief   D-Cache Clean by address
+  \details Cleans D-Cache for the given address
+           D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned.
+  \param[in]   addr    address
+  \param[in]   dsize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
+
+      do {
+        SCB->DCCMVAC = op_addr;             /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr += __SCB_DCACHE_LINE_SIZE;
+        op_size -= __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+
+/**
+  \brief   D-Cache Clean and Invalidate by address
+  \details Cleans and invalidates D_Cache for the given address
+           D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
+           D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
+  \param[in]   addr    address (aligned to 32-byte boundary)
+  \param[in]   dsize   size of memory block (in number of bytes)
+*/
+__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (uint32_t *addr, int32_t dsize)
+{
+  #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    if ( dsize > 0 ) { 
+       int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
+      uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
+    
+      __DSB();
+
+      do {
+        SCB->DCCIMVAC = op_addr;            /* register accepts only 32byte aligned values, only bits 31..5 are valid */
+        op_addr +=          __SCB_DCACHE_LINE_SIZE;
+        op_size -=          __SCB_DCACHE_LINE_SIZE;
+      } while ( op_size > 0 );
+
+      __DSB();
+      __ISB();
+    }
+  #endif
+}
+
+/*@} end of CMSIS_Core_CacheFunctions */
+
+
+/* ##################################    SysTick function  ############################################ */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_Core_SysTickFunctions SysTick Functions
+  \brief    Functions that configure the System.
+  @{
+ */
+
+#if defined (__Vendor_SysTickConfig) && (__Vendor_SysTickConfig == 0U)
+
+/**
+  \brief   System Tick Configuration
+  \details Initializes the System Timer and its interrupt, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+ */
+__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                   /* Reload value impossible */
+  }
+
+  SysTick->LOAD  = (uint32_t)(ticks - 1UL);                         /* set reload register */
+  NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick->VAL   = 0UL;                                             /* Load the SysTick Counter Value */
+  SysTick->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                   SysTick_CTRL_TICKINT_Msk   |
+                   SysTick_CTRL_ENABLE_Msk;                         /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                     /* Function successful */
+}
+
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U)
+/**
+  \brief   System Tick Configuration (non-secure)
+  \details Initializes the non-secure System Timer and its interrupt when in secure state, and starts the System Tick Timer.
+           Counter is in free running mode to generate periodic interrupts.
+  \param [in]  ticks  Number of ticks between two interrupts.
+  \return          0  Function succeeded.
+  \return          1  Function failed.
+  \note    When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
+           function <b>TZ_SysTick_Config_NS</b> is not included. In this case, the file <b><i>device</i>.h</b>
+           must contain a vendor-specific implementation of this function.
+
+ */
+__STATIC_INLINE uint32_t TZ_SysTick_Config_NS(uint32_t ticks)
+{
+  if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
+  {
+    return (1UL);                                                         /* Reload value impossible */
+  }
+
+  SysTick_NS->LOAD  = (uint32_t)(ticks - 1UL);                            /* set reload register */
+  TZ_NVIC_SetPriority_NS (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
+  SysTick_NS->VAL   = 0UL;                                                /* Load the SysTick Counter Value */
+  SysTick_NS->CTRL  = SysTick_CTRL_CLKSOURCE_Msk |
+                      SysTick_CTRL_TICKINT_Msk   |
+                      SysTick_CTRL_ENABLE_Msk;                            /* Enable SysTick IRQ and SysTick Timer */
+  return (0UL);                                                           /* Function successful */
+}
+#endif /* defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) */
+
+#endif
+
+/*@} end of CMSIS_Core_SysTickFunctions */
+
+
+
+/* ##################################### Debug In/Output function ########################################### */
+/**
+  \ingroup  CMSIS_Core_FunctionInterface
+  \defgroup CMSIS_core_DebugFunctions ITM Functions
+  \brief    Functions that access the ITM debug interface.
+  @{
+ */
+
+extern volatile int32_t ITM_RxBuffer;                              /*!< External variable to receive characters. */
+#define                 ITM_RXBUFFER_EMPTY  ((int32_t)0x5AA55AA5U) /*!< Value identifying \ref ITM_RxBuffer is ready for next character. */
+
+
+/**
+  \brief   ITM Send Character
+  \details Transmits a character via the ITM channel 0, and
+           \li Just returns when no debugger is connected that has booked the output.
+           \li Is blocking when a debugger is connected, but the previous character sent has not been transmitted.
+  \param [in]     ch  Character to transmit.
+  \returns            Character to transmit.
+ */
+__STATIC_INLINE uint32_t ITM_SendChar (uint32_t ch)
+{
+  if (((ITM->TCR & ITM_TCR_ITMENA_Msk) != 0UL) &&      /* ITM enabled */
+      ((ITM->TER & 1UL               ) != 0UL)   )     /* ITM Port #0 enabled */
+  {
+    while (ITM->PORT[0U].u32 == 0UL)
+    {
+      __NOP();
+    }
+    ITM->PORT[0U].u8 = (uint8_t)ch;
+  }
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Receive Character
+  \details Inputs a character via the external variable \ref ITM_RxBuffer.
+  \return             Received character.
+  \return         -1  No character pending.
+ */
+__STATIC_INLINE int32_t ITM_ReceiveChar (void)
+{
+  int32_t ch = -1;                           /* no character available */
+
+  if (ITM_RxBuffer != ITM_RXBUFFER_EMPTY)
+  {
+    ch = ITM_RxBuffer;
+    ITM_RxBuffer = ITM_RXBUFFER_EMPTY;       /* ready for next character */
+  }
+
+  return (ch);
+}
+
+
+/**
+  \brief   ITM Check Character
+  \details Checks whether a character is pending for reading in the variable \ref ITM_RxBuffer.
+  \return          0  No character available.
+  \return          1  Character available.
+ */
+__STATIC_INLINE int32_t ITM_CheckChar (void)
+{
+
+  if (ITM_RxBuffer == ITM_RXBUFFER_EMPTY)
+  {
+    return (0);                              /* no character available */
+  }
+  else
+  {
+    return (1);                              /*    character available */
+  }
+}
+
+/*@} end of CMSIS_core_DebugFunctions */
+
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CORE_STAR_H_DEPENDANT */
+
+#endif /* __CMSIS_GENERIC */
diff --git a/Libraries/CMSIS/Include/mpu_armv7.h b/Libraries/CMSIS/Core/Include/mpu_armv7.h
similarity index 94%
rename from Libraries/CMSIS/Include/mpu_armv7.h
rename to Libraries/CMSIS/Core/Include/mpu_armv7.h
index 337eb655..d9eedf81 100644
--- a/Libraries/CMSIS/Include/mpu_armv7.h
+++ b/Libraries/CMSIS/Core/Include/mpu_armv7.h
@@ -1,272 +1,275 @@
-/******************************************************************************
- * @file     mpu_armv7.h
- * @brief    CMSIS MPU API for Armv7-M MPU
- * @version  V5.1.0
- * @date     08. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
- 
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
-#endif
- 
-#ifndef ARM_MPU_ARMV7_H
-#define ARM_MPU_ARMV7_H
-
-#define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
-#define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
-#define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
-#define ARM_MPU_REGION_SIZE_256B     ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
-#define ARM_MPU_REGION_SIZE_512B     ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
-#define ARM_MPU_REGION_SIZE_1KB      ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
-#define ARM_MPU_REGION_SIZE_2KB      ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
-#define ARM_MPU_REGION_SIZE_4KB      ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
-#define ARM_MPU_REGION_SIZE_8KB      ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
-#define ARM_MPU_REGION_SIZE_16KB     ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
-#define ARM_MPU_REGION_SIZE_32KB     ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
-#define ARM_MPU_REGION_SIZE_64KB     ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
-#define ARM_MPU_REGION_SIZE_128KB    ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
-#define ARM_MPU_REGION_SIZE_256KB    ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
-#define ARM_MPU_REGION_SIZE_512KB    ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
-#define ARM_MPU_REGION_SIZE_1MB      ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
-#define ARM_MPU_REGION_SIZE_2MB      ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
-#define ARM_MPU_REGION_SIZE_4MB      ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
-#define ARM_MPU_REGION_SIZE_8MB      ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
-#define ARM_MPU_REGION_SIZE_16MB     ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
-#define ARM_MPU_REGION_SIZE_32MB     ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
-#define ARM_MPU_REGION_SIZE_64MB     ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
-#define ARM_MPU_REGION_SIZE_128MB    ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
-#define ARM_MPU_REGION_SIZE_256MB    ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
-#define ARM_MPU_REGION_SIZE_512MB    ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
-#define ARM_MPU_REGION_SIZE_1GB      ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
-#define ARM_MPU_REGION_SIZE_2GB      ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
-#define ARM_MPU_REGION_SIZE_4GB      ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
-
-#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
-#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
-#define ARM_MPU_AP_URO  2U ///!< MPU Access Permission unprivileged access read-only
-#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
-#define ARM_MPU_AP_PRO  5U ///!< MPU Access Permission privileged access read-only
-#define ARM_MPU_AP_RO   6U ///!< MPU Access Permission read-only access
-
-/** MPU Region Base Address Register Value
-*
-* \param Region The region to be configured, number 0 to 15.
-* \param BaseAddress The base address for the region.
-*/
-#define ARM_MPU_RBAR(Region, BaseAddress) \
-  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \
-   ((Region) & MPU_RBAR_REGION_Msk)    |  \
-   (MPU_RBAR_VALID_Msk))
-
-/**
-* MPU Memory Access Attributes
-* 
-* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable       Region is shareable between multiple bus masters.
-* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-*/  
-#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \
-  ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                  | \
-   (((IsShareable)  << MPU_RASR_S_Pos)   & MPU_RASR_S_Msk)                    | \
-   (((IsCacheable)  << MPU_RASR_C_Pos)   & MPU_RASR_C_Msk)                    | \
-   (((IsBufferable) << MPU_RASR_B_Pos)   & MPU_RASR_B_Msk))
-
-/**
-* MPU Region Attribute and Size Register Value
-* 
-* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param AccessAttributes  Memory access attribution, see \ref ARM_MPU_ACCESS_.
-* \param SubRegionDisable  Sub-region disable field.
-* \param Size              Region size of the region to be configured, for example 4K, 8K.
-*/
-#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)    \
-  ((((DisableExec)      << MPU_RASR_XN_Pos)   & MPU_RASR_XN_Msk)                                  | \
-   (((AccessPermission) << MPU_RASR_AP_Pos)   & MPU_RASR_AP_Msk)                                  | \
-   (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
-   (((SubRegionDisable) << MPU_RASR_SRD_Pos)  & MPU_RASR_SRD_Msk)                                 | \
-   (((Size)             << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk)                                | \
-   (((MPU_RASR_ENABLE_Msk))))
-
-/**
-* MPU Region Attribute and Size Register Value
-* 
-* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
-* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
-* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
-* \param IsShareable       Region is shareable between multiple bus masters.
-* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
-* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
-* \param SubRegionDisable  Sub-region disable field.
-* \param Size              Region size of the region to be configured, for example 4K, 8K.
-*/                         
-#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
-  ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
-
-/**
-* MPU Memory Access Attribute for strongly ordered memory.
-*  - TEX: 000b
-*  - Shareable
-*  - Non-cacheable
-*  - Non-bufferable
-*/ 
-#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
-
-/**
-* MPU Memory Access Attribute for device memory.
-*  - TEX: 000b (if shareable) or 010b (if non-shareable)
-*  - Shareable or non-shareable
-*  - Non-cacheable
-*  - Bufferable (if shareable) or non-bufferable (if non-shareable)
-*
-* \param IsShareable Configures the device memory as shareable or non-shareable.
-*/ 
-#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
-
-/**
-* MPU Memory Access Attribute for normal memory.
-*  - TEX: 1BBb (reflecting outer cacheability rules)
-*  - Shareable or non-shareable
-*  - Cacheable or non-cacheable (reflecting inner cacheability rules)
-*  - Bufferable or non-bufferable (reflecting inner cacheability rules)
-*
-* \param OuterCp Configures the outer cache policy.
-* \param InnerCp Configures the inner cache policy.
-* \param IsShareable Configures the memory as shareable or non-shareable.
-*/ 
-#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
-
-/**
-* MPU Memory Access Attribute non-cacheable policy.
-*/
-#define ARM_MPU_CACHEP_NOCACHE 0U
-
-/**
-* MPU Memory Access Attribute write-back, write and read allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_WRA 1U
-
-/**
-* MPU Memory Access Attribute write-through, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WT_NWA 2U
-
-/**
-* MPU Memory Access Attribute write-back, no write allocate policy.
-*/
-#define ARM_MPU_CACHEP_WB_NWA 3U
-
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR; //!< The region base address register value (RBAR)
-  uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
-} ARM_MPU_Region_t;
-    
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  __DSB();
-  __ISB();
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
-  __DMB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
-  MPU->RNR = rnr;
-  MPU->RASR = 0U;
-}
-
-/** Configure an MPU region.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
-{
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rsar Value for RSAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
-{
-  MPU->RNR = rnr;
-  MPU->RBAR = rbar;
-  MPU->RASR = rasr;
-}
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  while (cnt > MPU_TYPE_RALIASES) {
-    ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
-    table += MPU_TYPE_RALIASES;
-    cnt -= MPU_TYPE_RALIASES;
-  }
-  ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
-}
-
-#endif
+/******************************************************************************
+ * @file     mpu_armv7.h
+ * @brief    CMSIS MPU API for Armv7-M MPU
+ * @version  V5.1.2
+ * @date     25. May 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+ 
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header    /* treat file as system include file */
+#endif
+ 
+#ifndef ARM_MPU_ARMV7_H
+#define ARM_MPU_ARMV7_H
+
+#define ARM_MPU_REGION_SIZE_32B      ((uint8_t)0x04U) ///!< MPU Region Size 32 Bytes
+#define ARM_MPU_REGION_SIZE_64B      ((uint8_t)0x05U) ///!< MPU Region Size 64 Bytes
+#define ARM_MPU_REGION_SIZE_128B     ((uint8_t)0x06U) ///!< MPU Region Size 128 Bytes
+#define ARM_MPU_REGION_SIZE_256B     ((uint8_t)0x07U) ///!< MPU Region Size 256 Bytes
+#define ARM_MPU_REGION_SIZE_512B     ((uint8_t)0x08U) ///!< MPU Region Size 512 Bytes
+#define ARM_MPU_REGION_SIZE_1KB      ((uint8_t)0x09U) ///!< MPU Region Size 1 KByte
+#define ARM_MPU_REGION_SIZE_2KB      ((uint8_t)0x0AU) ///!< MPU Region Size 2 KBytes
+#define ARM_MPU_REGION_SIZE_4KB      ((uint8_t)0x0BU) ///!< MPU Region Size 4 KBytes
+#define ARM_MPU_REGION_SIZE_8KB      ((uint8_t)0x0CU) ///!< MPU Region Size 8 KBytes
+#define ARM_MPU_REGION_SIZE_16KB     ((uint8_t)0x0DU) ///!< MPU Region Size 16 KBytes
+#define ARM_MPU_REGION_SIZE_32KB     ((uint8_t)0x0EU) ///!< MPU Region Size 32 KBytes
+#define ARM_MPU_REGION_SIZE_64KB     ((uint8_t)0x0FU) ///!< MPU Region Size 64 KBytes
+#define ARM_MPU_REGION_SIZE_128KB    ((uint8_t)0x10U) ///!< MPU Region Size 128 KBytes
+#define ARM_MPU_REGION_SIZE_256KB    ((uint8_t)0x11U) ///!< MPU Region Size 256 KBytes
+#define ARM_MPU_REGION_SIZE_512KB    ((uint8_t)0x12U) ///!< MPU Region Size 512 KBytes
+#define ARM_MPU_REGION_SIZE_1MB      ((uint8_t)0x13U) ///!< MPU Region Size 1 MByte
+#define ARM_MPU_REGION_SIZE_2MB      ((uint8_t)0x14U) ///!< MPU Region Size 2 MBytes
+#define ARM_MPU_REGION_SIZE_4MB      ((uint8_t)0x15U) ///!< MPU Region Size 4 MBytes
+#define ARM_MPU_REGION_SIZE_8MB      ((uint8_t)0x16U) ///!< MPU Region Size 8 MBytes
+#define ARM_MPU_REGION_SIZE_16MB     ((uint8_t)0x17U) ///!< MPU Region Size 16 MBytes
+#define ARM_MPU_REGION_SIZE_32MB     ((uint8_t)0x18U) ///!< MPU Region Size 32 MBytes
+#define ARM_MPU_REGION_SIZE_64MB     ((uint8_t)0x19U) ///!< MPU Region Size 64 MBytes
+#define ARM_MPU_REGION_SIZE_128MB    ((uint8_t)0x1AU) ///!< MPU Region Size 128 MBytes
+#define ARM_MPU_REGION_SIZE_256MB    ((uint8_t)0x1BU) ///!< MPU Region Size 256 MBytes
+#define ARM_MPU_REGION_SIZE_512MB    ((uint8_t)0x1CU) ///!< MPU Region Size 512 MBytes
+#define ARM_MPU_REGION_SIZE_1GB      ((uint8_t)0x1DU) ///!< MPU Region Size 1 GByte
+#define ARM_MPU_REGION_SIZE_2GB      ((uint8_t)0x1EU) ///!< MPU Region Size 2 GBytes
+#define ARM_MPU_REGION_SIZE_4GB      ((uint8_t)0x1FU) ///!< MPU Region Size 4 GBytes
+
+#define ARM_MPU_AP_NONE 0U ///!< MPU Access Permission no access
+#define ARM_MPU_AP_PRIV 1U ///!< MPU Access Permission privileged access only
+#define ARM_MPU_AP_URO  2U ///!< MPU Access Permission unprivileged access read-only
+#define ARM_MPU_AP_FULL 3U ///!< MPU Access Permission full access
+#define ARM_MPU_AP_PRO  5U ///!< MPU Access Permission privileged access read-only
+#define ARM_MPU_AP_RO   6U ///!< MPU Access Permission read-only access
+
+/** MPU Region Base Address Register Value
+*
+* \param Region The region to be configured, number 0 to 15.
+* \param BaseAddress The base address for the region.
+*/
+#define ARM_MPU_RBAR(Region, BaseAddress) \
+  (((BaseAddress) & MPU_RBAR_ADDR_Msk) |  \
+   ((Region) & MPU_RBAR_REGION_Msk)    |  \
+   (MPU_RBAR_VALID_Msk))
+
+/**
+* MPU Memory Access Attributes
+* 
+* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
+* \param IsShareable       Region is shareable between multiple bus masters.
+* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
+* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
+*/  
+#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable)   \
+  ((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk)                  | \
+   (((IsShareable)  << MPU_RASR_S_Pos)   & MPU_RASR_S_Msk)                    | \
+   (((IsCacheable)  << MPU_RASR_C_Pos)   & MPU_RASR_C_Msk)                    | \
+   (((IsBufferable) << MPU_RASR_B_Pos)   & MPU_RASR_B_Msk))
+
+/**
+* MPU Region Attribute and Size Register Value
+* 
+* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
+* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
+* \param AccessAttributes  Memory access attribution, see \ref ARM_MPU_ACCESS_.
+* \param SubRegionDisable  Sub-region disable field.
+* \param Size              Region size of the region to be configured, for example 4K, 8K.
+*/
+#define ARM_MPU_RASR_EX(DisableExec, AccessPermission, AccessAttributes, SubRegionDisable, Size)    \
+  ((((DisableExec)      << MPU_RASR_XN_Pos)   & MPU_RASR_XN_Msk)                                  | \
+   (((AccessPermission) << MPU_RASR_AP_Pos)   & MPU_RASR_AP_Msk)                                  | \
+   (((AccessAttributes) & (MPU_RASR_TEX_Msk | MPU_RASR_S_Msk | MPU_RASR_C_Msk | MPU_RASR_B_Msk))) | \
+   (((SubRegionDisable) << MPU_RASR_SRD_Pos)  & MPU_RASR_SRD_Msk)                                 | \
+   (((Size)             << MPU_RASR_SIZE_Pos) & MPU_RASR_SIZE_Msk)                                | \
+   (((MPU_RASR_ENABLE_Msk))))
+
+/**
+* MPU Region Attribute and Size Register Value
+* 
+* \param DisableExec       Instruction access disable bit, 1= disable instruction fetches.
+* \param AccessPermission  Data access permissions, allows you to configure read/write access for User and Privileged mode.
+* \param TypeExtField      Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
+* \param IsShareable       Region is shareable between multiple bus masters.
+* \param IsCacheable       Region is cacheable, i.e. its value may be kept in cache.
+* \param IsBufferable      Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
+* \param SubRegionDisable  Sub-region disable field.
+* \param Size              Region size of the region to be configured, for example 4K, 8K.
+*/                         
+#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
+  ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
+
+/**
+* MPU Memory Access Attribute for strongly ordered memory.
+*  - TEX: 000b
+*  - Shareable
+*  - Non-cacheable
+*  - Non-bufferable
+*/ 
+#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
+
+/**
+* MPU Memory Access Attribute for device memory.
+*  - TEX: 000b (if shareable) or 010b (if non-shareable)
+*  - Shareable or non-shareable
+*  - Non-cacheable
+*  - Bufferable (if shareable) or non-bufferable (if non-shareable)
+*
+* \param IsShareable Configures the device memory as shareable or non-shareable.
+*/ 
+#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
+
+/**
+* MPU Memory Access Attribute for normal memory.
+*  - TEX: 1BBb (reflecting outer cacheability rules)
+*  - Shareable or non-shareable
+*  - Cacheable or non-cacheable (reflecting inner cacheability rules)
+*  - Bufferable or non-bufferable (reflecting inner cacheability rules)
+*
+* \param OuterCp Configures the outer cache policy.
+* \param InnerCp Configures the inner cache policy.
+* \param IsShareable Configures the memory as shareable or non-shareable.
+*/ 
+#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) >> 1U), ((InnerCp) & 1U))
+
+/**
+* MPU Memory Access Attribute non-cacheable policy.
+*/
+#define ARM_MPU_CACHEP_NOCACHE 0U
+
+/**
+* MPU Memory Access Attribute write-back, write and read allocate policy.
+*/
+#define ARM_MPU_CACHEP_WB_WRA 1U
+
+/**
+* MPU Memory Access Attribute write-through, no write allocate policy.
+*/
+#define ARM_MPU_CACHEP_WT_NWA 2U
+
+/**
+* MPU Memory Access Attribute write-back, no write allocate policy.
+*/
+#define ARM_MPU_CACHEP_WB_NWA 3U
+
+
+/**
+* Struct for a single MPU Region
+*/
+typedef struct {
+  uint32_t RBAR; //!< The region base address register value (RBAR)
+  uint32_t RASR; //!< The region attribute and size register value (RASR) \ref MPU_RASR
+} ARM_MPU_Region_t;
+    
+/** Enable the MPU.
+* \param MPU_Control Default access permissions for unconfigured regions.
+*/
+__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
+{
+  __DMB();
+  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  __DSB();
+  __ISB();
+}
+
+/** Disable the MPU.
+*/
+__STATIC_INLINE void ARM_MPU_Disable(void)
+{
+  __DMB();
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+  __DSB();
+  __ISB();
+}
+
+/** Clear and disable the given MPU region.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
+{
+  MPU->RNR = rnr;
+  MPU->RASR = 0U;
+}
+
+/** Configure an MPU region.
+* \param rbar Value for RBAR register.
+* \param rasr Value for RASR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
+{
+  MPU->RBAR = rbar;
+  MPU->RASR = rasr;
+}
+
+/** Configure the given MPU region.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rasr Value for RASR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t rasr)
+{
+  MPU->RNR = rnr;
+  MPU->RBAR = rbar;
+  MPU->RASR = rasr;
+}
+
+/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_Load().
+* \param dst Destination data is copied to.
+* \param src Source data is copied from.
+* \param len Amount of data words to be copied.
+*/
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+{
+  uint32_t i;
+  for (i = 0U; i < len; ++i) 
+  {
+    dst[i] = src[i];
+  }
+}
+
+/** Load the given number of MPU regions from a table.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_Load(ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
+  while (cnt > MPU_TYPE_RALIASES) {
+    ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), MPU_TYPE_RALIASES*rowWordSize);
+    table += MPU_TYPE_RALIASES;
+    cnt -= MPU_TYPE_RALIASES;
+  }
+  ARM_MPU_OrderedMemcpy(&(MPU->RBAR), &(table->RBAR), cnt*rowWordSize);
+}
+
+#endif
diff --git a/Libraries/CMSIS/Include/mpu_armv8.h b/Libraries/CMSIS/Core/Include/mpu_armv8.h
similarity index 90%
rename from Libraries/CMSIS/Include/mpu_armv8.h
rename to Libraries/CMSIS/Core/Include/mpu_armv8.h
index 2fe28b68..3de16efc 100644
--- a/Libraries/CMSIS/Include/mpu_armv8.h
+++ b/Libraries/CMSIS/Core/Include/mpu_armv8.h
@@ -1,346 +1,352 @@
-/******************************************************************************
- * @file     mpu_armv8.h
- * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU
- * @version  V5.1.0
- * @date     08. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2019 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header    /* treat file as system include file */
-#endif
-
-#ifndef ARM_MPU_ARMV8_H
-#define ARM_MPU_ARMV8_H
-
-/** \brief Attribute for device memory (outer only) */
-#define ARM_MPU_ATTR_DEVICE                           ( 0U )
-
-/** \brief Attribute for non-cacheable, normal memory */
-#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )
-
-/** \brief Attribute for normal memory (outer and inner)
-* \param NT Non-Transient: Set to 1 for non-transient data.
-* \param WB Write-Back: Set to 1 to use write-back update policy.
-* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
-* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
-*/
-#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
-  (((NT & 1U) << 3U) | ((WB & 1U) << 2U) | ((RA & 1U) << 1U) | (WA & 1U))
-
-/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
-
-/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)
-
-/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)
-
-/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
-#define ARM_MPU_ATTR_DEVICE_GRE    (3U)
-
-/** \brief Memory Attribute
-* \param O Outer memory attributes
-* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
-*/
-#define ARM_MPU_ATTR(O, I) (((O & 0xFU) << 4U) | (((O & 0xFU) != 0U) ? (I & 0xFU) : ((I & 0x3U) << 2U)))
-
-/** \brief Normal memory non-shareable  */
-#define ARM_MPU_SH_NON   (0U)
-
-/** \brief Normal memory outer shareable  */
-#define ARM_MPU_SH_OUTER (2U)
-
-/** \brief Normal memory inner shareable  */
-#define ARM_MPU_SH_INNER (3U)
-
-/** \brief Memory access permissions
-* \param RO Read-Only: Set to 1 for read-only memory.
-* \param NP Non-Privileged: Set to 1 for non-privileged memory.
-*/
-#define ARM_MPU_AP_(RO, NP) (((RO & 1U) << 1U) | (NP & 1U))
-
-/** \brief Region Base Address Register value
-* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
-* \param SH Defines the Shareability domain for this memory region.
-* \param RO Read-Only: Set to 1 for a read-only memory region.
-* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
-* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
-*/
-#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
-  ((BASE & MPU_RBAR_BASE_Msk) | \
-  ((SH << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
-  ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
-  ((XN << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
-
-/** \brief Region Limit Address Register value
-* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
-* \param IDX The attribute index to be associated with this memory region.
-*/
-#define ARM_MPU_RLAR(LIMIT, IDX) \
-  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
-  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
-  (MPU_RLAR_EN_Msk))
-
-#if defined(MPU_RLAR_PXN_Pos)
-  
-/** \brief Region Limit Address Register with PXN value
-* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
-* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
-* \param IDX The attribute index to be associated with this memory region.
-*/
-#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
-  ((LIMIT & MPU_RLAR_LIMIT_Msk) | \
-  ((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
-  ((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
-  (MPU_RLAR_EN_Msk))
-  
-#endif
-
-/**
-* Struct for a single MPU Region
-*/
-typedef struct {
-  uint32_t RBAR;                   /*!< Region Base Address Register value */
-  uint32_t RLAR;                   /*!< Region Limit Address Register value */
-} ARM_MPU_Region_t;
-    
-/** Enable the MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
-{
-  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  __DSB();
-  __ISB();
-}
-
-/** Disable the MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable(void)
-{
-  __DMB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-
-#ifdef MPU_NS
-/** Enable the Non-secure MPU.
-* \param MPU_Control Default access permissions for unconfigured regions.
-*/
-__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
-{
-  MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  __DSB();
-  __ISB();
-}
-
-/** Disable the Non-secure MPU.
-*/
-__STATIC_INLINE void ARM_MPU_Disable_NS(void)
-{
-  __DMB();
-#ifdef SCB_SHCSR_MEMFAULTENA_Msk
-  SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
-#endif
-  MPU_NS->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
-}
-#endif
-
-/** Set the memory attribute encoding to the given MPU.
-* \param mpu Pointer to the MPU to be configured.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
-{
-  const uint8_t reg = idx / 4U;
-  const uint32_t pos = ((idx % 4U) * 8U);
-  const uint32_t mask = 0xFFU << pos;
-  
-  if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
-    return; // invalid index
-  }
-  
-  mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
-}
-
-/** Set the memory attribute encoding.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
-{
-  ARM_MPU_SetMemAttrEx(MPU, idx, attr);
-}
-
-#ifdef MPU_NS
-/** Set the memory attribute encoding to the Non-secure MPU.
-* \param idx The attribute index to be set [0-7]
-* \param attr The attribute value to be set.
-*/
-__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
-{
-  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
-}
-#endif
-
-/** Clear and disable the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
-{
-  mpu->RNR = rnr;
-  mpu->RLAR = 0U;
-}
-
-/** Clear and disable the given MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
-{
-  ARM_MPU_ClrRegionEx(MPU, rnr);
-}
-
-#ifdef MPU_NS
-/** Clear and disable the given Non-secure MPU region.
-* \param rnr Region number to be cleared.
-*/
-__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
-{  
-  ARM_MPU_ClrRegionEx(MPU_NS, rnr);
-}
-#endif
-
-/** Configure the given MPU region of the given MPU.
-* \param mpu Pointer to MPU to be used.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  mpu->RNR = rnr;
-  mpu->RBAR = rbar;
-  mpu->RLAR = rlar;
-}
-
-/** Configure the given MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
-}
-
-#ifdef MPU_NS
-/** Configure the given Non-secure MPU region.
-* \param rnr Region number to be configured.
-* \param rbar Value for RBAR register.
-* \param rlar Value for RLAR register.
-*/   
-__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
-{
-  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
-}
-#endif
-
-/** Memcopy with strictly ordered memory access, e.g. for register targets.
-* \param dst Destination data is copied to.
-* \param src Source data is copied from.
-* \param len Amount of data words to be copied.
-*/
-__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
-{
-  uint32_t i;
-  for (i = 0U; i < len; ++i) 
-  {
-    dst[i] = src[i];
-  }
-}
-
-/** Load the given number of MPU regions from a table to the given MPU.
-* \param mpu Pointer to the MPU registers to be used.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
-  if (cnt == 1U) {
-    mpu->RNR = rnr;
-    ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
-  } else {
-    uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
-    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
-    
-    mpu->RNR = rnrBase;
-    while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
-      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
-      ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
-      table += c;
-      cnt -= c;
-      rnrOffset = 0U;
-      rnrBase += MPU_TYPE_RALIASES;
-      mpu->RNR = rnrBase;
-    }
-    
-    ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
-  }
-}
-
-/** Load the given number of MPU regions from a table.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  ARM_MPU_LoadEx(MPU, rnr, table, cnt);
-}
-
-#ifdef MPU_NS
-/** Load the given number of MPU regions from a table to the Non-secure MPU.
-* \param rnr First region number to be configured.
-* \param table Pointer to the MPU configuration table.
-* \param cnt Amount of regions to be configured.
-*/
-__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
-{
-  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
-}
-#endif
-
-#endif
-
+/******************************************************************************
+ * @file     mpu_armv8.h
+ * @brief    CMSIS MPU API for Armv8-M and Armv8.1-M MPU
+ * @version  V5.1.3
+ * @date     03. February 2021
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2021 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header    /* treat file as system include file */
+#endif
+
+#ifndef ARM_MPU_ARMV8_H
+#define ARM_MPU_ARMV8_H
+
+/** \brief Attribute for device memory (outer only) */
+#define ARM_MPU_ATTR_DEVICE                           ( 0U )
+
+/** \brief Attribute for non-cacheable, normal memory */
+#define ARM_MPU_ATTR_NON_CACHEABLE                    ( 4U )
+
+/** \brief Attribute for normal memory (outer and inner)
+* \param NT Non-Transient: Set to 1 for non-transient data.
+* \param WB Write-Back: Set to 1 to use write-back update policy.
+* \param RA Read Allocation: Set to 1 to use cache allocation on read miss.
+* \param WA Write Allocation: Set to 1 to use cache allocation on write miss.
+*/
+#define ARM_MPU_ATTR_MEMORY_(NT, WB, RA, WA) \
+  ((((NT) & 1U) << 3U) | (((WB) & 1U) << 2U) | (((RA) & 1U) << 1U) | ((WA) & 1U))
+
+/** \brief Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_nGnRnE (0U)
+
+/** \brief Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_nGnRE  (1U)
+
+/** \brief Device memory type non Gathering, Re-ordering, Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_nGRE   (2U)
+
+/** \brief Device memory type Gathering, Re-ordering, Early Write Acknowledgement */
+#define ARM_MPU_ATTR_DEVICE_GRE    (3U)
+
+/** \brief Memory Attribute
+* \param O Outer memory attributes
+* \param I O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes
+*/
+#define ARM_MPU_ATTR(O, I) ((((O) & 0xFU) << 4U) | ((((O) & 0xFU) != 0U) ? ((I) & 0xFU) : (((I) & 0x3U) << 2U)))
+
+/** \brief Normal memory non-shareable  */
+#define ARM_MPU_SH_NON   (0U)
+
+/** \brief Normal memory outer shareable  */
+#define ARM_MPU_SH_OUTER (2U)
+
+/** \brief Normal memory inner shareable  */
+#define ARM_MPU_SH_INNER (3U)
+
+/** \brief Memory access permissions
+* \param RO Read-Only: Set to 1 for read-only memory.
+* \param NP Non-Privileged: Set to 1 for non-privileged memory.
+*/
+#define ARM_MPU_AP_(RO, NP) ((((RO) & 1U) << 1U) | ((NP) & 1U))
+
+/** \brief Region Base Address Register value
+* \param BASE The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned.
+* \param SH Defines the Shareability domain for this memory region.
+* \param RO Read-Only: Set to 1 for a read-only memory region.
+* \param NP Non-Privileged: Set to 1 for a non-privileged memory region.
+* \oaram XN eXecute Never: Set to 1 for a non-executable memory region.
+*/
+#define ARM_MPU_RBAR(BASE, SH, RO, NP, XN) \
+  (((BASE) & MPU_RBAR_BASE_Msk) | \
+  (((SH) << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk) | \
+  ((ARM_MPU_AP_(RO, NP) << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk) | \
+  (((XN) << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk))
+
+/** \brief Region Limit Address Register value
+* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
+* \param IDX The attribute index to be associated with this memory region.
+*/
+#define ARM_MPU_RLAR(LIMIT, IDX) \
+  (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
+  (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
+  (MPU_RLAR_EN_Msk))
+
+#if defined(MPU_RLAR_PXN_Pos)
+  
+/** \brief Region Limit Address Register with PXN value
+* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
+* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
+* \param IDX The attribute index to be associated with this memory region.
+*/
+#define ARM_MPU_RLAR_PXN(LIMIT, PXN, IDX) \
+  (((LIMIT) & MPU_RLAR_LIMIT_Msk) | \
+  (((PXN) << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
+  (((IDX) << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
+  (MPU_RLAR_EN_Msk))
+  
+#endif
+
+/**
+* Struct for a single MPU Region
+*/
+typedef struct {
+  uint32_t RBAR;                   /*!< Region Base Address Register value */
+  uint32_t RLAR;                   /*!< Region Limit Address Register value */
+} ARM_MPU_Region_t;
+    
+/** Enable the MPU.
+* \param MPU_Control Default access permissions for unconfigured regions.
+*/
+__STATIC_INLINE void ARM_MPU_Enable(uint32_t MPU_Control)
+{
+  __DMB();
+  MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  __DSB();
+  __ISB();
+}
+
+/** Disable the MPU.
+*/
+__STATIC_INLINE void ARM_MPU_Disable(void)
+{
+  __DMB();
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  MPU->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+  __DSB();
+  __ISB();
+}
+
+#ifdef MPU_NS
+/** Enable the Non-secure MPU.
+* \param MPU_Control Default access permissions for unconfigured regions.
+*/
+__STATIC_INLINE void ARM_MPU_Enable_NS(uint32_t MPU_Control)
+{
+  __DMB();
+  MPU_NS->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk;
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB_NS->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  __DSB();
+  __ISB();
+}
+
+/** Disable the Non-secure MPU.
+*/
+__STATIC_INLINE void ARM_MPU_Disable_NS(void)
+{
+  __DMB();
+#ifdef SCB_SHCSR_MEMFAULTENA_Msk
+  SCB_NS->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk;
+#endif
+  MPU_NS->CTRL  &= ~MPU_CTRL_ENABLE_Msk;
+  __DSB();
+  __ISB();
+}
+#endif
+
+/** Set the memory attribute encoding to the given MPU.
+* \param mpu Pointer to the MPU to be configured.
+* \param idx The attribute index to be set [0-7]
+* \param attr The attribute value to be set.
+*/
+__STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t attr)
+{
+  const uint8_t reg = idx / 4U;
+  const uint32_t pos = ((idx % 4U) * 8U);
+  const uint32_t mask = 0xFFU << pos;
+  
+  if (reg >= (sizeof(mpu->MAIR) / sizeof(mpu->MAIR[0]))) {
+    return; // invalid index
+  }
+  
+  mpu->MAIR[reg] = ((mpu->MAIR[reg] & ~mask) | ((attr << pos) & mask));
+}
+
+/** Set the memory attribute encoding.
+* \param idx The attribute index to be set [0-7]
+* \param attr The attribute value to be set.
+*/
+__STATIC_INLINE void ARM_MPU_SetMemAttr(uint8_t idx, uint8_t attr)
+{
+  ARM_MPU_SetMemAttrEx(MPU, idx, attr);
+}
+
+#ifdef MPU_NS
+/** Set the memory attribute encoding to the Non-secure MPU.
+* \param idx The attribute index to be set [0-7]
+* \param attr The attribute value to be set.
+*/
+__STATIC_INLINE void ARM_MPU_SetMemAttr_NS(uint8_t idx, uint8_t attr)
+{
+  ARM_MPU_SetMemAttrEx(MPU_NS, idx, attr);
+}
+#endif
+
+/** Clear and disable the given MPU region of the given MPU.
+* \param mpu Pointer to MPU to be used.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegionEx(MPU_Type* mpu, uint32_t rnr)
+{
+  mpu->RNR = rnr;
+  mpu->RLAR = 0U;
+}
+
+/** Clear and disable the given MPU region.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
+{
+  ARM_MPU_ClrRegionEx(MPU, rnr);
+}
+
+#ifdef MPU_NS
+/** Clear and disable the given Non-secure MPU region.
+* \param rnr Region number to be cleared.
+*/
+__STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
+{  
+  ARM_MPU_ClrRegionEx(MPU_NS, rnr);
+}
+#endif
+
+/** Configure the given MPU region of the given MPU.
+* \param mpu Pointer to MPU to be used.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rlar Value for RLAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t rbar, uint32_t rlar)
+{
+  mpu->RNR = rnr;
+  mpu->RBAR = rbar;
+  mpu->RLAR = rlar;
+}
+
+/** Configure the given MPU region.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rlar Value for RLAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rlar)
+{
+  ARM_MPU_SetRegionEx(MPU, rnr, rbar, rlar);
+}
+
+#ifdef MPU_NS
+/** Configure the given Non-secure MPU region.
+* \param rnr Region number to be configured.
+* \param rbar Value for RBAR register.
+* \param rlar Value for RLAR register.
+*/   
+__STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t rlar)
+{
+  ARM_MPU_SetRegionEx(MPU_NS, rnr, rbar, rlar);  
+}
+#endif
+
+/** Memcpy with strictly ordered memory access, e.g. used by code in ARM_MPU_LoadEx()
+* \param dst Destination data is copied to.
+* \param src Source data is copied from.
+* \param len Amount of data words to be copied.
+*/
+__STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_t* __RESTRICT src, uint32_t len)
+{
+  uint32_t i;
+  for (i = 0U; i < len; ++i) 
+  {
+    dst[i] = src[i];
+  }
+}
+
+/** Load the given number of MPU regions from a table to the given MPU.
+* \param mpu Pointer to the MPU registers to be used.
+* \param rnr First region number to be configured.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  const uint32_t rowWordSize = sizeof(ARM_MPU_Region_t)/4U;
+  if (cnt == 1U) {
+    mpu->RNR = rnr;
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR), &(table->RBAR), rowWordSize);
+  } else {
+    uint32_t rnrBase   = rnr & ~(MPU_TYPE_RALIASES-1U);
+    uint32_t rnrOffset = rnr % MPU_TYPE_RALIASES;
+    
+    mpu->RNR = rnrBase;
+    while ((rnrOffset + cnt) > MPU_TYPE_RALIASES) {
+      uint32_t c = MPU_TYPE_RALIASES - rnrOffset;
+      ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), c*rowWordSize);
+      table += c;
+      cnt -= c;
+      rnrOffset = 0U;
+      rnrBase += MPU_TYPE_RALIASES;
+      mpu->RNR = rnrBase;
+    }
+    
+    ARM_MPU_OrderedMemcpy(&(mpu->RBAR)+(rnrOffset*2U), &(table->RBAR), cnt*rowWordSize);
+  }
+}
+
+/** Load the given number of MPU regions from a table.
+* \param rnr First region number to be configured.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  ARM_MPU_LoadEx(MPU, rnr, table, cnt);
+}
+
+#ifdef MPU_NS
+/** Load the given number of MPU regions from a table to the Non-secure MPU.
+* \param rnr First region number to be configured.
+* \param table Pointer to the MPU configuration table.
+* \param cnt Amount of regions to be configured.
+*/
+__STATIC_INLINE void ARM_MPU_Load_NS(uint32_t rnr, ARM_MPU_Region_t const* table, uint32_t cnt) 
+{
+  ARM_MPU_LoadEx(MPU_NS, rnr, table, cnt);
+}
+#endif
+
+#endif
+
diff --git a/Libraries/CMSIS/Core/Include/pmu_armv8.h b/Libraries/CMSIS/Core/Include/pmu_armv8.h
new file mode 100644
index 00000000..f8f3d893
--- /dev/null
+++ b/Libraries/CMSIS/Core/Include/pmu_armv8.h
@@ -0,0 +1,337 @@
+/******************************************************************************
+ * @file     pmu_armv8.h
+ * @brief    CMSIS PMU API for Armv8.1-M PMU
+ * @version  V1.0.1
+ * @date     15. April 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2020 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header    /* treat file as system include file */
+#endif
+
+#ifndef ARM_PMU_ARMV8_H
+#define ARM_PMU_ARMV8_H
+
+/**
+ * \brief PMU Events
+ * \note  See the Armv8.1-M Architecture Reference Manual for full details on these PMU events.
+ * */
+
+#define ARM_PMU_SW_INCR                              0x0000             /*!< Software update to the PMU_SWINC register, architecturally executed and condition code check pass */
+#define ARM_PMU_L1I_CACHE_REFILL                     0x0001             /*!< L1 I-Cache refill */
+#define ARM_PMU_L1D_CACHE_REFILL                     0x0003             /*!< L1 D-Cache refill */
+#define ARM_PMU_L1D_CACHE                            0x0004             /*!< L1 D-Cache access */
+#define ARM_PMU_LD_RETIRED                           0x0006             /*!< Memory-reading instruction architecturally executed and condition code check pass */
+#define ARM_PMU_ST_RETIRED                           0x0007             /*!< Memory-writing instruction architecturally executed and condition code check pass */
+#define ARM_PMU_INST_RETIRED                         0x0008             /*!< Instruction architecturally executed */
+#define ARM_PMU_EXC_TAKEN                            0x0009             /*!< Exception entry */
+#define ARM_PMU_EXC_RETURN                           0x000A             /*!< Exception return instruction architecturally executed and the condition code check pass */
+#define ARM_PMU_PC_WRITE_RETIRED                     0x000C             /*!< Software change to the Program Counter (PC). Instruction is architecturally executed and condition code check pass */
+#define ARM_PMU_BR_IMMED_RETIRED                     0x000D             /*!< Immediate branch architecturally executed */
+#define ARM_PMU_BR_RETURN_RETIRED                    0x000E             /*!< Function return instruction architecturally executed and the condition code check pass */
+#define ARM_PMU_UNALIGNED_LDST_RETIRED               0x000F             /*!< Unaligned memory memory-reading or memory-writing instruction architecturally executed and condition code check pass */
+#define ARM_PMU_BR_MIS_PRED                          0x0010             /*!< Mispredicted or not predicted branch speculatively executed */
+#define ARM_PMU_CPU_CYCLES                           0x0011             /*!< Cycle */
+#define ARM_PMU_BR_PRED                              0x0012             /*!< Predictable branch speculatively executed */
+#define ARM_PMU_MEM_ACCESS                           0x0013             /*!< Data memory access */
+#define ARM_PMU_L1I_CACHE                            0x0014             /*!< Level 1 instruction cache access */
+#define ARM_PMU_L1D_CACHE_WB                         0x0015             /*!< Level 1 data cache write-back */
+#define ARM_PMU_L2D_CACHE                            0x0016             /*!< Level 2 data cache access */
+#define ARM_PMU_L2D_CACHE_REFILL                     0x0017             /*!< Level 2 data cache refill */
+#define ARM_PMU_L2D_CACHE_WB                         0x0018             /*!< Level 2 data cache write-back */
+#define ARM_PMU_BUS_ACCESS                           0x0019             /*!< Bus access */
+#define ARM_PMU_MEMORY_ERROR                         0x001A             /*!< Local memory error */
+#define ARM_PMU_INST_SPEC                            0x001B             /*!< Instruction speculatively executed */
+#define ARM_PMU_BUS_CYCLES                           0x001D             /*!< Bus cycles */
+#define ARM_PMU_CHAIN                                0x001E             /*!< For an odd numbered counter, increment when an overflow occurs on the preceding even-numbered counter on the same PE */
+#define ARM_PMU_L1D_CACHE_ALLOCATE                   0x001F             /*!< Level 1 data cache allocation without refill */
+#define ARM_PMU_L2D_CACHE_ALLOCATE                   0x0020             /*!< Level 2 data cache allocation without refill */
+#define ARM_PMU_BR_RETIRED                           0x0021             /*!< Branch instruction architecturally executed */
+#define ARM_PMU_BR_MIS_PRED_RETIRED                  0x0022             /*!< Mispredicted branch instruction architecturally executed */
+#define ARM_PMU_STALL_FRONTEND                       0x0023             /*!< No operation issued because of the frontend */
+#define ARM_PMU_STALL_BACKEND                        0x0024             /*!< No operation issued because of the backend */
+#define ARM_PMU_L2I_CACHE                            0x0027             /*!< Level 2 instruction cache access */
+#define ARM_PMU_L2I_CACHE_REFILL                     0x0028             /*!< Level 2 instruction cache refill */
+#define ARM_PMU_L3D_CACHE_ALLOCATE                   0x0029             /*!< Level 3 data cache allocation without refill */
+#define ARM_PMU_L3D_CACHE_REFILL                     0x002A             /*!< Level 3 data cache refill */
+#define ARM_PMU_L3D_CACHE                            0x002B             /*!< Level 3 data cache access */
+#define ARM_PMU_L3D_CACHE_WB                         0x002C             /*!< Level 3 data cache write-back */
+#define ARM_PMU_LL_CACHE_RD                          0x0036             /*!< Last level data cache read */
+#define ARM_PMU_LL_CACHE_MISS_RD                     0x0037             /*!< Last level data cache read miss */
+#define ARM_PMU_L1D_CACHE_MISS_RD                    0x0039             /*!< Level 1 data cache read miss */
+#define ARM_PMU_OP_COMPLETE                          0x003A             /*!< Operation retired */
+#define ARM_PMU_OP_SPEC                              0x003B             /*!< Operation speculatively executed */
+#define ARM_PMU_STALL                                0x003C             /*!< Stall cycle for instruction or operation not sent for execution */
+#define ARM_PMU_STALL_OP_BACKEND                     0x003D             /*!< Stall cycle for instruction or operation not sent for execution due to pipeline backend */
+#define ARM_PMU_STALL_OP_FRONTEND                    0x003E             /*!< Stall cycle for instruction or operation not sent for execution due to pipeline frontend */
+#define ARM_PMU_STALL_OP                             0x003F             /*!< Instruction or operation slots not occupied each cycle */
+#define ARM_PMU_L1D_CACHE_RD                         0x0040             /*!< Level 1 data cache read */
+#define ARM_PMU_LE_RETIRED                           0x0100             /*!< Loop end instruction executed */
+#define ARM_PMU_LE_SPEC                              0x0101             /*!< Loop end instruction speculatively executed */
+#define ARM_PMU_BF_RETIRED                           0x0104             /*!< Branch future instruction architecturally executed and condition code check pass */
+#define ARM_PMU_BF_SPEC                              0x0105             /*!< Branch future instruction speculatively executed and condition code check pass */
+#define ARM_PMU_LE_CANCEL                            0x0108             /*!< Loop end instruction not taken */
+#define ARM_PMU_BF_CANCEL                            0x0109             /*!< Branch future instruction not taken */
+#define ARM_PMU_SE_CALL_S                            0x0114             /*!< Call to secure function, resulting in Security state change */
+#define ARM_PMU_SE_CALL_NS                           0x0115             /*!< Call to non-secure function, resulting in Security state change */
+#define ARM_PMU_DWT_CMPMATCH0                        0x0118             /*!< DWT comparator 0 match */
+#define ARM_PMU_DWT_CMPMATCH1                        0x0119             /*!< DWT comparator 1 match */
+#define ARM_PMU_DWT_CMPMATCH2                        0x011A             /*!< DWT comparator 2 match */
+#define ARM_PMU_DWT_CMPMATCH3                        0x011B             /*!< DWT comparator 3 match */
+#define ARM_PMU_MVE_INST_RETIRED                     0x0200             /*!< MVE instruction architecturally executed */
+#define ARM_PMU_MVE_INST_SPEC                        0x0201             /*!< MVE instruction speculatively executed */
+#define ARM_PMU_MVE_FP_RETIRED                       0x0204             /*!< MVE floating-point instruction architecturally executed */
+#define ARM_PMU_MVE_FP_SPEC                          0x0205             /*!< MVE floating-point instruction speculatively executed */
+#define ARM_PMU_MVE_FP_HP_RETIRED                    0x0208             /*!< MVE half-precision floating-point instruction architecturally executed */
+#define ARM_PMU_MVE_FP_HP_SPEC                       0x0209             /*!< MVE half-precision floating-point instruction speculatively executed */
+#define ARM_PMU_MVE_FP_SP_RETIRED                    0x020C             /*!< MVE single-precision floating-point instruction architecturally executed */
+#define ARM_PMU_MVE_FP_SP_SPEC                       0x020D             /*!< MVE single-precision floating-point instruction speculatively executed */
+#define ARM_PMU_MVE_FP_MAC_RETIRED                   0x0214             /*!< MVE floating-point multiply or multiply-accumulate instruction architecturally executed */
+#define ARM_PMU_MVE_FP_MAC_SPEC                      0x0215             /*!< MVE floating-point multiply or multiply-accumulate instruction speculatively executed */
+#define ARM_PMU_MVE_INT_RETIRED                      0x0224             /*!< MVE integer instruction architecturally executed */
+#define ARM_PMU_MVE_INT_SPEC                         0x0225             /*!< MVE integer instruction speculatively executed */
+#define ARM_PMU_MVE_INT_MAC_RETIRED                  0x0228             /*!< MVE multiply or multiply-accumulate instruction architecturally executed */
+#define ARM_PMU_MVE_INT_MAC_SPEC                     0x0229             /*!< MVE multiply or multiply-accumulate instruction speculatively executed */
+#define ARM_PMU_MVE_LDST_RETIRED                     0x0238             /*!< MVE load or store instruction architecturally executed */
+#define ARM_PMU_MVE_LDST_SPEC                        0x0239             /*!< MVE load or store instruction speculatively executed */
+#define ARM_PMU_MVE_LD_RETIRED                       0x023C             /*!< MVE load instruction architecturally executed */
+#define ARM_PMU_MVE_LD_SPEC                          0x023D             /*!< MVE load instruction speculatively executed */
+#define ARM_PMU_MVE_ST_RETIRED                       0x0240             /*!< MVE store instruction architecturally executed */
+#define ARM_PMU_MVE_ST_SPEC                          0x0241             /*!< MVE store instruction speculatively executed */
+#define ARM_PMU_MVE_LDST_CONTIG_RETIRED              0x0244             /*!< MVE contiguous load or store instruction architecturally executed */
+#define ARM_PMU_MVE_LDST_CONTIG_SPEC                 0x0245             /*!< MVE contiguous load or store instruction speculatively executed */
+#define ARM_PMU_MVE_LD_CONTIG_RETIRED                0x0248             /*!< MVE contiguous load instruction architecturally executed */
+#define ARM_PMU_MVE_LD_CONTIG_SPEC                   0x0249             /*!< MVE contiguous load instruction speculatively executed */
+#define ARM_PMU_MVE_ST_CONTIG_RETIRED                0x024C             /*!< MVE contiguous store instruction architecturally executed */
+#define ARM_PMU_MVE_ST_CONTIG_SPEC                   0x024D             /*!< MVE contiguous store instruction speculatively executed */
+#define ARM_PMU_MVE_LDST_NONCONTIG_RETIRED           0x0250             /*!< MVE non-contiguous load or store instruction architecturally executed */
+#define ARM_PMU_MVE_LDST_NONCONTIG_SPEC              0x0251             /*!< MVE non-contiguous load or store instruction speculatively executed */
+#define ARM_PMU_MVE_LD_NONCONTIG_RETIRED             0x0254             /*!< MVE non-contiguous load instruction architecturally executed */
+#define ARM_PMU_MVE_LD_NONCONTIG_SPEC                0x0255             /*!< MVE non-contiguous load instruction speculatively executed */
+#define ARM_PMU_MVE_ST_NONCONTIG_RETIRED             0x0258             /*!< MVE non-contiguous store instruction architecturally executed */
+#define ARM_PMU_MVE_ST_NONCONTIG_SPEC                0x0259             /*!< MVE non-contiguous store instruction speculatively executed */
+#define ARM_PMU_MVE_LDST_MULTI_RETIRED               0x025C             /*!< MVE memory instruction targeting multiple registers architecturally executed */
+#define ARM_PMU_MVE_LDST_MULTI_SPEC                  0x025D             /*!< MVE memory instruction targeting multiple registers speculatively executed */
+#define ARM_PMU_MVE_LD_MULTI_RETIRED                 0x0260             /*!< MVE memory load instruction targeting multiple registers architecturally executed */
+#define ARM_PMU_MVE_LD_MULTI_SPEC                    0x0261             /*!< MVE memory load instruction targeting multiple registers speculatively executed */
+#define ARM_PMU_MVE_ST_MULTI_RETIRED                 0x0261             /*!< MVE memory store instruction targeting multiple registers architecturally executed */
+#define ARM_PMU_MVE_ST_MULTI_SPEC                    0x0265             /*!< MVE memory store instruction targeting multiple registers speculatively executed */
+#define ARM_PMU_MVE_LDST_UNALIGNED_RETIRED           0x028C             /*!< MVE unaligned memory load or store instruction architecturally executed */
+#define ARM_PMU_MVE_LDST_UNALIGNED_SPEC              0x028D             /*!< MVE unaligned memory load or store instruction speculatively executed */
+#define ARM_PMU_MVE_LD_UNALIGNED_RETIRED             0x0290             /*!< MVE unaligned load instruction architecturally executed */
+#define ARM_PMU_MVE_LD_UNALIGNED_SPEC                0x0291             /*!< MVE unaligned load instruction speculatively executed */
+#define ARM_PMU_MVE_ST_UNALIGNED_RETIRED             0x0294             /*!< MVE unaligned store instruction architecturally executed */
+#define ARM_PMU_MVE_ST_UNALIGNED_SPEC                0x0295             /*!< MVE unaligned store instruction speculatively executed */
+#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_RETIRED 0x0298             /*!< MVE unaligned noncontiguous load or store instruction architecturally executed */
+#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_SPEC    0x0299             /*!< MVE unaligned noncontiguous load or store instruction speculatively executed */
+#define ARM_PMU_MVE_VREDUCE_RETIRED                  0x02A0             /*!< MVE vector reduction instruction architecturally executed */
+#define ARM_PMU_MVE_VREDUCE_SPEC                     0x02A1             /*!< MVE vector reduction instruction speculatively executed */
+#define ARM_PMU_MVE_VREDUCE_FP_RETIRED               0x02A4             /*!< MVE floating-point vector reduction instruction architecturally executed */
+#define ARM_PMU_MVE_VREDUCE_FP_SPEC                  0x02A5             /*!< MVE floating-point vector reduction instruction speculatively executed */
+#define ARM_PMU_MVE_VREDUCE_INT_RETIRED              0x02A8             /*!< MVE integer vector reduction instruction architecturally executed */
+#define ARM_PMU_MVE_VREDUCE_INT_SPEC                 0x02A9             /*!< MVE integer vector reduction instruction speculatively executed */
+#define ARM_PMU_MVE_PRED                             0x02B8             /*!< Cycles where one or more predicated beats architecturally executed */
+#define ARM_PMU_MVE_STALL                            0x02CC             /*!< Stall cycles caused by an MVE instruction */
+#define ARM_PMU_MVE_STALL_RESOURCE                   0x02CD             /*!< Stall cycles caused by an MVE instruction because of resource conflicts */
+#define ARM_PMU_MVE_STALL_RESOURCE_MEM               0x02CE             /*!< Stall cycles caused by an MVE instruction because of memory resource conflicts */
+#define ARM_PMU_MVE_STALL_RESOURCE_FP                0x02CF             /*!< Stall cycles caused by an MVE instruction because of floating-point resource conflicts */
+#define ARM_PMU_MVE_STALL_RESOURCE_INT               0x02D0             /*!< Stall cycles caused by an MVE instruction because of integer resource conflicts */
+#define ARM_PMU_MVE_STALL_BREAK                      0x02D3             /*!< Stall cycles caused by an MVE chain break */
+#define ARM_PMU_MVE_STALL_DEPENDENCY                 0x02D4             /*!< Stall cycles caused by MVE register dependency */
+#define ARM_PMU_ITCM_ACCESS                          0x4007             /*!< Instruction TCM access */
+#define ARM_PMU_DTCM_ACCESS                          0x4008             /*!< Data TCM access */
+#define ARM_PMU_TRCEXTOUT0                           0x4010             /*!< ETM external output 0 */
+#define ARM_PMU_TRCEXTOUT1                           0x4011             /*!< ETM external output 1 */
+#define ARM_PMU_TRCEXTOUT2                           0x4012             /*!< ETM external output 2 */
+#define ARM_PMU_TRCEXTOUT3                           0x4013             /*!< ETM external output 3 */
+#define ARM_PMU_CTI_TRIGOUT4                         0x4018             /*!< Cross-trigger Interface output trigger 4 */
+#define ARM_PMU_CTI_TRIGOUT5                         0x4019             /*!< Cross-trigger Interface output trigger 5 */
+#define ARM_PMU_CTI_TRIGOUT6                         0x401A             /*!< Cross-trigger Interface output trigger 6 */
+#define ARM_PMU_CTI_TRIGOUT7                         0x401B             /*!< Cross-trigger Interface output trigger 7 */
+
+/** \brief PMU Functions */
+
+__STATIC_INLINE void ARM_PMU_Enable(void);
+__STATIC_INLINE void ARM_PMU_Disable(void);
+
+__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type);
+
+__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void);
+__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void);
+
+__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask);
+__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask);
+
+__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void);
+__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num);
+
+__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void);
+__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask);
+
+__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask);
+__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask);
+
+__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask);
+
+/** 
+  \brief   Enable the PMU
+*/
+__STATIC_INLINE void ARM_PMU_Enable(void) 
+{
+  PMU->CTRL |= PMU_CTRL_ENABLE_Msk;
+}
+
+/** 
+  \brief   Disable the PMU
+*/
+__STATIC_INLINE void ARM_PMU_Disable(void) 
+{
+  PMU->CTRL &= ~PMU_CTRL_ENABLE_Msk;
+}
+
+/** 
+  \brief   Set event to count for PMU eventer counter
+  \param [in]    num     Event counter (0-30) to configure
+  \param [in]    type    Event to count
+*/
+__STATIC_INLINE void ARM_PMU_Set_EVTYPER(uint32_t num, uint32_t type)
+{
+  PMU->EVTYPER[num] = type;
+}
+
+/** 
+  \brief  Reset cycle counter
+*/
+__STATIC_INLINE void ARM_PMU_CYCCNT_Reset(void)
+{
+  PMU->CTRL |= PMU_CTRL_CYCCNT_RESET_Msk;
+}
+
+/** 
+  \brief  Reset all event counters
+*/
+__STATIC_INLINE void ARM_PMU_EVCNTR_ALL_Reset(void)
+{
+  PMU->CTRL |= PMU_CTRL_EVENTCNT_RESET_Msk;
+}
+
+/** 
+  \brief  Enable counters 
+  \param [in]     mask    Counters to enable
+  \note   Enables one or more of the following:
+          - event counters (0-30)
+          - cycle counter
+*/
+__STATIC_INLINE void ARM_PMU_CNTR_Enable(uint32_t mask)
+{
+  PMU->CNTENSET = mask;
+}
+
+/** 
+  \brief  Disable counters
+  \param [in]     mask    Counters to enable
+  \note   Disables one or more of the following:
+          - event counters (0-30)
+          - cycle counter
+*/
+__STATIC_INLINE void ARM_PMU_CNTR_Disable(uint32_t mask)
+{
+  PMU->CNTENCLR = mask;
+}
+
+/** 
+  \brief  Read cycle counter
+  \return                 Cycle count
+*/
+__STATIC_INLINE uint32_t ARM_PMU_Get_CCNTR(void)
+{
+  return PMU->CCNTR;
+}
+
+/** 
+  \brief   Read event counter
+  \param [in]     num     Event counter (0-30) to read
+  \return                 Event count
+*/
+__STATIC_INLINE uint32_t ARM_PMU_Get_EVCNTR(uint32_t num)
+{
+  return PMU_EVCNTR_CNT_Msk & PMU->EVCNTR[num];
+}
+
+/** 
+  \brief   Read counter overflow status
+  \return  Counter overflow status bits for the following:
+          - event counters (0-30)
+          - cycle counter
+*/
+__STATIC_INLINE uint32_t ARM_PMU_Get_CNTR_OVS(void)
+{
+  return PMU->OVSSET;	
+}
+
+/** 
+  \brief   Clear counter overflow status
+  \param [in]     mask    Counter overflow status bits to clear
+  \note    Clears overflow status bits for one or more of the following:
+           - event counters (0-30)
+           - cycle counter
+*/
+__STATIC_INLINE void ARM_PMU_Set_CNTR_OVS(uint32_t mask)
+{
+  PMU->OVSCLR = mask;
+}
+
+/** 
+  \brief   Enable counter overflow interrupt request 
+  \param [in]     mask    Counter overflow interrupt request bits to set
+  \note    Sets overflow interrupt request bits for one or more of the following:
+           - event counters (0-30)
+           - cycle counter
+*/
+__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Enable(uint32_t mask)
+{
+  PMU->INTENSET = mask;
+}
+
+/** 
+  \brief   Disable counter overflow interrupt request 
+  \param [in]     mask    Counter overflow interrupt request bits to clear
+  \note    Clears overflow interrupt request bits for one or more of the following:
+           - event counters (0-30)
+           - cycle counter
+*/
+__STATIC_INLINE void ARM_PMU_Set_CNTR_IRQ_Disable(uint32_t mask)
+{
+  PMU->INTENCLR = mask;
+}
+
+/** 
+  \brief   Software increment event counter 
+  \param [in]     mask    Counters to increment
+  \note    Software increment bits for one or more event counters (0-30)
+*/
+__STATIC_INLINE void ARM_PMU_CNTR_Increment(uint32_t mask)
+{
+  PMU->SWINC = mask;
+}
+
+#endif
diff --git a/Libraries/CMSIS/Include/tz_context.h b/Libraries/CMSIS/Core/Include/tz_context.h
similarity index 97%
rename from Libraries/CMSIS/Include/tz_context.h
rename to Libraries/CMSIS/Core/Include/tz_context.h
index d4c1474f..0d09749f 100644
--- a/Libraries/CMSIS/Include/tz_context.h
+++ b/Libraries/CMSIS/Core/Include/tz_context.h
@@ -1,70 +1,70 @@
-/******************************************************************************
- * @file     tz_context.h
- * @brief    Context Management for Armv8-M TrustZone
- * @version  V1.0.1
- * @date     10. January 2018
- ******************************************************************************/
-/*
- * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#if   defined ( __ICCARM__ )
-  #pragma system_include         /* treat file as system include file for MISRA check */
-#elif defined (__clang__)
-  #pragma clang system_header   /* treat file as system include file */
-#endif
-
-#ifndef TZ_CONTEXT_H
-#define TZ_CONTEXT_H
- 
-#include <stdint.h>
- 
-#ifndef TZ_MODULEID_T
-#define TZ_MODULEID_T
-/// \details Data type that identifies secure software modules called by a process.
-typedef uint32_t TZ_ModuleId_t;
-#endif
- 
-/// \details TZ Memory ID identifies an allocated memory slot.
-typedef uint32_t TZ_MemoryId_t;
-  
-/// Initialize secure context memory system
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_InitContextSystem_S (void);
- 
-/// Allocate context memory for calling secure software modules in TrustZone
-/// \param[in]  module   identifies software modules called from non-secure mode
-/// \return value != 0 id TrustZone memory slot identifier
-/// \return value 0    no memory available or internal error
-TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
- 
-/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
- 
-/// Load secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
- 
-/// Store secure context (called on RTOS thread context switch)
-/// \param[in]  id  TrustZone memory slot identifier
-/// \return execution status (1: success, 0: error)
-uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
- 
-#endif  // TZ_CONTEXT_H
+/******************************************************************************
+ * @file     tz_context.h
+ * @brief    Context Management for Armv8-M TrustZone
+ * @version  V1.0.1
+ * @date     10. January 2018
+ ******************************************************************************/
+/*
+ * Copyright (c) 2017-2018 Arm Limited. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if   defined ( __ICCARM__ )
+  #pragma system_include         /* treat file as system include file for MISRA check */
+#elif defined (__clang__)
+  #pragma clang system_header   /* treat file as system include file */
+#endif
+
+#ifndef TZ_CONTEXT_H
+#define TZ_CONTEXT_H
+ 
+#include <stdint.h>
+ 
+#ifndef TZ_MODULEID_T
+#define TZ_MODULEID_T
+/// \details Data type that identifies secure software modules called by a process.
+typedef uint32_t TZ_ModuleId_t;
+#endif
+ 
+/// \details TZ Memory ID identifies an allocated memory slot.
+typedef uint32_t TZ_MemoryId_t;
+  
+/// Initialize secure context memory system
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_InitContextSystem_S (void);
+ 
+/// Allocate context memory for calling secure software modules in TrustZone
+/// \param[in]  module   identifies software modules called from non-secure mode
+/// \return value != 0 id TrustZone memory slot identifier
+/// \return value 0    no memory available or internal error
+TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module);
+ 
+/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id);
+ 
+/// Load secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_LoadContext_S (TZ_MemoryId_t id);
+ 
+/// Store secure context (called on RTOS thread context switch)
+/// \param[in]  id  TrustZone memory slot identifier
+/// \return execution status (1: success, 0: error)
+uint32_t TZ_StoreContext_S (TZ_MemoryId_t id);
+ 
+#endif  // TZ_CONTEXT_H
diff --git a/Libraries/CMSIS/DSP/Include/arm_common_tables.h b/Libraries/CMSIS/DSP/Include/arm_common_tables.h
index cf6586fd..3e72c806 100644
--- a/Libraries/CMSIS/DSP/Include/arm_common_tables.h
+++ b/Libraries/CMSIS/DSP/Include/arm_common_tables.h
@@ -1,378 +1,539 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_common_tables.h
- * Description:  Extern declaration for common tables
- *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef _ARM_COMMON_TABLES_H
-#define _ARM_COMMON_TABLES_H
-
-#include "arm_math.h"
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) 
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
-    extern const uint16_t armBitRevTable[1024];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
-    extern const float32_t twiddleCoef_16[32];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
-    extern const float32_t twiddleCoef_32[64];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
-    extern const float32_t twiddleCoef_64[128];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
-    extern const float32_t twiddleCoef_128[256];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
-    extern const float32_t twiddleCoef_256[512];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
-    extern const float32_t twiddleCoef_512[1024];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
-    extern const float32_t twiddleCoef_1024[2048];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
-    extern const float32_t twiddleCoef_2048[4096];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
-    extern const float32_t twiddleCoef_4096[8192];
-    #define twiddleCoef twiddleCoef_4096
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
-    extern const q31_t twiddleCoef_16_q31[24];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
-    extern const q31_t twiddleCoef_32_q31[48];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
-    extern const q31_t twiddleCoef_64_q31[96];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
-    extern const q31_t twiddleCoef_128_q31[192];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
-    extern const q31_t twiddleCoef_256_q31[384];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
-    extern const q31_t twiddleCoef_512_q31[768];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
-    extern const q31_t twiddleCoef_1024_q31[1536];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
-    extern const q31_t twiddleCoef_2048_q31[3072];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
-    extern const q31_t twiddleCoef_4096_q31[6144];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
-    extern const q15_t twiddleCoef_16_q15[24];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
-    extern const q15_t twiddleCoef_32_q15[48];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
-    extern const q15_t twiddleCoef_64_q15[96];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
-    extern const q15_t twiddleCoef_128_q15[192];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
-    extern const q15_t twiddleCoef_256_q15[384];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
-    extern const q15_t twiddleCoef_512_q15[768];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
-    extern const q15_t twiddleCoef_1024_q15[1536];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
-    extern const q15_t twiddleCoef_2048_q15[3072];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
-    extern const q15_t twiddleCoef_4096_q15[6144];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
-    extern const float32_t twiddleCoef_rfft_32[32];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
-    extern const float32_t twiddleCoef_rfft_64[64];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
-    extern const float32_t twiddleCoef_rfft_128[128];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
-    extern const float32_t twiddleCoef_rfft_256[256];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
-    extern const float32_t twiddleCoef_rfft_512[512];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
-    extern const float32_t twiddleCoef_rfft_1024[1024];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
-    extern const float32_t twiddleCoef_rfft_2048[2048];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
-    extern const float32_t twiddleCoef_rfft_4096[4096];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  /* floating-point bit reversal tables */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
-    #define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
-    extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
-    #define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
-    extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
-    #define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
-    extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
-    #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
-    extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
-    #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
-    extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
-    #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
-    extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
-    #define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
-    extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
-    #define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
-    extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
-    #define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
-    extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  
-  /* fixed-point bit reversal tables */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
-    #define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
-    extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
-    #define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
-    extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
-    #define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
-    extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
-    #define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
-    extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
-    #define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
-    extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
-    #define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
-    extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
-    #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
-    extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
-    #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
-    extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
-    #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
-    extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
-    extern const float32_t realCoefA[8192];
-    extern const float32_t realCoefB[8192];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
-    extern const q31_t realCoefAQ31[8192];
-    extern const q31_t realCoefBQ31[8192];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
-    extern const q15_t realCoefAQ15[8192];
-    extern const q15_t realCoefBQ15[8192];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
-    extern const float32_t Weights_128[256];
-    extern const float32_t cos_factors_128[128];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
-    extern const float32_t Weights_512[1024];
-    extern const float32_t cos_factors_512[512];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
-    extern const float32_t Weights_2048[4096];
-    extern const float32_t cos_factors_2048[2048];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
-    extern const float32_t Weights_8192[16384];
-    extern const float32_t cos_factors_8192[8192];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
-    extern const q15_t WeightsQ15_128[256];
-    extern const q15_t cos_factorsQ15_128[128];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
-    extern const q15_t WeightsQ15_512[1024];
-    extern const q15_t cos_factorsQ15_512[512];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
-    extern const q15_t WeightsQ15_2048[4096];
-    extern const q15_t cos_factorsQ15_2048[2048];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
-    extern const q15_t WeightsQ15_8192[16384];
-    extern const q15_t cos_factorsQ15_8192[8192];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)  
-    extern const q31_t WeightsQ31_128[256];
-    extern const q31_t cos_factorsQ31_128[128];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) 
-    extern const q31_t WeightsQ31_512[1024];
-    extern const q31_t cos_factorsQ31_512[512];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) 
-    extern const q31_t WeightsQ31_2048[4096];
-    extern const q31_t cos_factorsQ31_2048[2048];
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) 
-    extern const q31_t WeightsQ31_8192[16384];
-    extern const q31_t cos_factorsQ31_8192[8192];
-  #endif
-    
-#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
-    extern const q15_t armRecipTableQ15[64];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
-    extern const q31_t armRecipTableQ31[64];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
-  
-  /* Tables for Fast Math Sine and Cosine */
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
-    extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
-    extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
-  
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
-    extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
-  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
-
-#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
-
-#endif /*  ARM_COMMON_TABLES_H */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables.h
+ * Description:  Extern declaration for common tables
+ *
+ * @version  V1.10.0
+ * @date     08 July 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_COMMON_TABLES_H
+#define _ARM_COMMON_TABLES_H
+
+#include "arm_math_types.h"
+#include "dsp/fast_math_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+  /* Double Precision Float CFFT twiddles */
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+    extern const uint16_t armBitRevTable[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_16)
+    extern const uint64_t twiddleCoefF64_16[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_32)
+    extern const uint64_t twiddleCoefF64_32[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_64)
+    extern const uint64_t twiddleCoefF64_64[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_128)
+    extern const uint64_t twiddleCoefF64_128[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_256)
+    extern const uint64_t twiddleCoefF64_256[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_512)
+    extern const uint64_t twiddleCoefF64_512[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_1024)
+    extern const uint64_t twiddleCoefF64_1024[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_2048)
+    extern const uint64_t twiddleCoefF64_2048[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_4096)
+    extern const uint64_t twiddleCoefF64_4096[8192];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
+    extern const float32_t twiddleCoef_16[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+    extern const float32_t twiddleCoef_32[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
+    extern const float32_t twiddleCoef_64[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+    extern const float32_t twiddleCoef_128[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
+    extern const float32_t twiddleCoef_256[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
+    extern const float32_t twiddleCoef_512[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
+    extern const float32_t twiddleCoef_1024[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
+    extern const float32_t twiddleCoef_2048[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+    extern const float32_t twiddleCoef_4096[8192];
+    #define twiddleCoef twiddleCoef_4096
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  /* Q31 */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
+    extern const q31_t twiddleCoef_16_q31[24];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
+    extern const q31_t twiddleCoef_32_q31[48];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
+    extern const q31_t twiddleCoef_64_q31[96];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
+    extern const q31_t twiddleCoef_128_q31[192];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
+    extern const q31_t twiddleCoef_256_q31[384];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
+    extern const q31_t twiddleCoef_512_q31[768];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
+    extern const q31_t twiddleCoef_1024_q31[1536];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
+    extern const q31_t twiddleCoef_2048_q31[3072];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
+    extern const q31_t twiddleCoef_4096_q31[6144];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
+    extern const q15_t twiddleCoef_16_q15[24];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
+    extern const q15_t twiddleCoef_32_q15[48];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
+    extern const q15_t twiddleCoef_64_q15[96];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
+    extern const q15_t twiddleCoef_128_q15[192];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
+    extern const q15_t twiddleCoef_256_q15[384];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
+    extern const q15_t twiddleCoef_512_q15[768];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
+    extern const q15_t twiddleCoef_1024_q15[1536];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
+    extern const q15_t twiddleCoef_2048_q15[3072];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
+    extern const q15_t twiddleCoef_4096_q15[6144];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  /* Double Precision Float RFFT twiddles */
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32)
+    extern const uint64_t twiddleCoefF64_rfft_32[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64)
+    extern const uint64_t twiddleCoefF64_rfft_64[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128)
+    extern const uint64_t twiddleCoefF64_rfft_128[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256)
+    extern const uint64_t twiddleCoefF64_rfft_256[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512)
+    extern const uint64_t twiddleCoefF64_rfft_512[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024)
+    extern const uint64_t twiddleCoefF64_rfft_1024[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048)
+    extern const uint64_t twiddleCoefF64_rfft_2048[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096)
+    extern const uint64_t twiddleCoefF64_rfft_4096[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
+    extern const float32_t twiddleCoef_rfft_32[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
+    extern const float32_t twiddleCoef_rfft_64[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
+    extern const float32_t twiddleCoef_rfft_128[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
+    extern const float32_t twiddleCoef_rfft_256[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
+    extern const float32_t twiddleCoef_rfft_512[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
+    extern const float32_t twiddleCoef_rfft_1024[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
+    extern const float32_t twiddleCoef_rfft_2048[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
+    extern const float32_t twiddleCoef_rfft_4096[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+
+  /* Double precision floating-point bit reversal tables */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_16)
+    #define ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH ((uint16_t)12)
+    extern const uint16_t armBitRevIndexTableF64_16[ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_32)
+    #define ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH ((uint16_t)24)
+    extern const uint16_t armBitRevIndexTableF64_32[ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_64)
+    #define ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH ((uint16_t)56)
+    extern const uint16_t armBitRevIndexTableF64_64[ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_128)
+    #define ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH ((uint16_t)112)
+    extern const uint16_t armBitRevIndexTableF64_128[ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_256)
+    #define ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH ((uint16_t)240)
+    extern const uint16_t armBitRevIndexTableF64_256[ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_512)
+    #define ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH ((uint16_t)480)
+    extern const uint16_t armBitRevIndexTableF64_512[ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_1024)
+    #define ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH ((uint16_t)992)
+    extern const uint16_t armBitRevIndexTableF64_1024[ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_2048)
+    #define ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH ((uint16_t)1984)
+    extern const uint16_t armBitRevIndexTableF64_2048[ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_4096)
+    #define ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH ((uint16_t)4032)
+    extern const uint16_t armBitRevIndexTableF64_4096[ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  /* floating-point bit reversal tables */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
+    #define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
+    extern const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
+    #define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
+    extern const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
+    #define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
+    extern const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
+    #define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
+    extern const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
+    #define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
+    extern const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
+    #define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
+    extern const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
+    #define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
+    extern const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
+    #define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
+    extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
+    #define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
+    extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+
+  /* fixed-point bit reversal tables */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
+    #define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
+    extern const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
+    #define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
+    extern const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
+    #define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
+    extern const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
+    #define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
+    extern const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
+    #define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
+    extern const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
+    #define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
+    extern const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
+    #define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
+    extern const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
+    #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
+    extern const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
+    #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
+    extern const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
+    extern const float32_t realCoefA[8192];
+    extern const float32_t realCoefB[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
+    extern const q31_t realCoefAQ31[8192];
+    extern const q31_t realCoefBQ31[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
+    extern const q15_t realCoefAQ15[8192];
+    extern const q15_t realCoefBQ15[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+    extern const float32_t Weights_128[256];
+    extern const float32_t cos_factors_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+    extern const float32_t Weights_512[1024];
+    extern const float32_t cos_factors_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+    extern const float32_t Weights_2048[4096];
+    extern const float32_t cos_factors_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    extern const float32_t Weights_8192[16384];
+    extern const float32_t cos_factors_8192[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+    extern const q15_t WeightsQ15_128[256];
+    extern const q15_t cos_factorsQ15_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+    extern const q15_t WeightsQ15_512[1024];
+    extern const q15_t cos_factorsQ15_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+    extern const q15_t WeightsQ15_2048[4096];
+    extern const q15_t cos_factorsQ15_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    extern const q15_t WeightsQ15_8192[16384];
+    extern const q15_t cos_factorsQ15_8192[8192];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
+    extern const q31_t WeightsQ31_128[256];
+    extern const q31_t cos_factorsQ31_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
+    extern const q31_t WeightsQ31_512[1024];
+    extern const q31_t cos_factorsQ31_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
+    extern const q31_t WeightsQ31_2048[4096];
+    extern const q31_t cos_factorsQ31_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
+    extern const q31_t WeightsQ31_8192[16384];
+    extern const q31_t cos_factorsQ31_8192[8192];
+  #endif
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
+    extern const q15_t armRecipTableQ15[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
+    extern const q31_t armRecipTableQ31[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+  /* Tables for Fast Math Sine and Cosine */
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+    extern const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+    extern const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
+    extern const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+  /* Fast vector sqrt */
+  #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+     #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE)
+       extern const q31_t sqrtTable_Q31[256];
+     #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  #endif 
+
+  /* Accurate scalar sqrt */
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31) 
+       extern const q31_t sqrt_initial_lut_q31[32];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15) 
+       extern const q15_t sqrt_initial_lut_q15[16];
+  #endif
+
+  #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+     #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE)
+       extern const q15_t sqrtTable_Q15[256];
+     #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+  #endif
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+       extern const float32_t exp_tab[8];
+       extern const float32_t __logf_lut_f32[8];
+#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+extern const unsigned char hwLUT[256];
+#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /*  ARM_COMMON_TABLES_H */
+
diff --git a/Libraries/CMSIS/DSP/Include/arm_common_tables_f16.h b/Libraries/CMSIS/DSP/Include/arm_common_tables_f16.h
new file mode 100755
index 00000000..f9a63fee
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_common_tables_f16.h
@@ -0,0 +1,132 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables_f16.h
+ * Description:  Extern declaration for common tables
+ *
+ * @version  V1.10.0
+ * @date     08 July 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_COMMON_TABLES_F16_H
+#define _ARM_COMMON_TABLES_F16_H
+
+#include "arm_math_types_f16.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+  /* F16 */
+  #if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED)
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16)
+    extern const float16_t twiddleCoefF16_16[32];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_32)
+    extern const float16_t twiddleCoefF16_32[64];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64)
+    extern const float16_t twiddleCoefF16_64[128];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_128)
+    extern const float16_t twiddleCoefF16_128[256];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256)
+    extern const float16_t twiddleCoefF16_256[512];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_512)
+    extern const float16_t twiddleCoefF16_512[1024];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024)
+    extern const float16_t twiddleCoefF16_1024[2048];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048)
+    extern const float16_t twiddleCoefF16_2048[4096];
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096)
+    extern const float16_t twiddleCoefF16_4096[8192];
+    #define twiddleCoefF16 twiddleCoefF16_4096
+  #endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+  
+ 
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32)
+  extern const float16_t twiddleCoefF16_rfft_32[32];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64)
+  extern const float16_t twiddleCoefF16_rfft_64[64];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128)
+  extern const float16_t twiddleCoefF16_rfft_128[128];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256)
+  extern const float16_t twiddleCoefF16_rfft_256[256];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512)
+  extern const float16_t twiddleCoefF16_rfft_512[512];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024)
+  extern const float16_t twiddleCoefF16_rfft_1024[1024];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048)
+  extern const float16_t twiddleCoefF16_rfft_2048[2048];
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096)
+  extern const float16_t twiddleCoefF16_rfft_4096[4096];
+  #endif
+
+  #endif /* ARMAC5 */
+    
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+
+#if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED)
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+       extern const float16_t exp_tab_f16[8];
+       extern const float16_t __logf_lut_f16[8];
+#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */
+#endif 
+       
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /*  _ARM_COMMON_TABLES_F16_H */
+
+  
diff --git a/Libraries/CMSIS/DSP/Include/arm_const_structs.h b/Libraries/CMSIS/DSP/Include/arm_const_structs.h
index 677073e5..59026db5 100644
--- a/Libraries/CMSIS/DSP/Include/arm_const_structs.h
+++ b/Libraries/CMSIS/DSP/Include/arm_const_structs.h
@@ -1,66 +1,86 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_const_structs.h
- * Description:  Constant structs that are initialized for user convenience.
- *               For example, some can be given as arguments to the arm_cfft_f32() function.
- *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef _ARM_CONST_STRUCTS_H
-#define _ARM_CONST_STRUCTS_H
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
-
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
-
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
-
-#endif
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs.h
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() function.
+ *
+ * @version  V1.10.0
+ * @date     08 July 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_CONST_STRUCTS_H
+#define _ARM_CONST_STRUCTS_H
+
+#include "arm_math_types.h"
+#include "arm_common_tables.h"
+#include "dsp/transform_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len16;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len32;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len64;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len128;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len256;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len512;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048;
+   extern const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096;
+
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/Libraries/CMSIS/DSP/Include/arm_const_structs_f16.h b/Libraries/CMSIS/DSP/Include/arm_const_structs_f16.h
new file mode 100755
index 00000000..0984d74a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_const_structs_f16.h
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs_f16.h
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f16() function.
+ *
+ * @version  V1.10.0
+ * @date     08 July 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_CONST_STRUCTS_F16_H
+#define _ARM_CONST_STRUCTS_F16_H
+
+#include "arm_math_types_f16.h"
+#include "arm_common_tables.h"
+#include "arm_common_tables_f16.h"
+#include "dsp/transform_functions_f16.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if !defined(__CC_ARM) && defined(ARM_FLOAT16_SUPPORTED)
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len16;
+   #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len32;
+    #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len64;
+    #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len128;
+    #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len256;
+    #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len512;
+    #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024;
+    #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048;
+    #endif
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
+   extern const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096;
+  #endif
+#endif
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Include/arm_helium_utils.h b/Libraries/CMSIS/DSP/Include/arm_helium_utils.h
new file mode 100755
index 00000000..ae9037cf
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_helium_utils.h
@@ -0,0 +1,753 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_helium_utils.h
+ * Description:  Utility functions for Helium development
+ *
+ * @version  V1.10.0
+ * @date     08 July 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_UTILS_HELIUM_H_
+#define _ARM_UTILS_HELIUM_H_
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+/***************************************
+
+Definitions available for MVEF and MVEI
+
+***************************************/
+#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI))  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define INACTIVELANE            0 /* inactive lane content */
+
+
+#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) */
+
+/***************************************
+
+Definitions available for MVEF only
+
+***************************************/
+#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF))  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+__STATIC_FORCEINLINE float32_t vecAddAcrossF32Mve(float32x4_t in)
+{
+    float32_t acc;
+
+    acc = vgetq_lane(in, 0) + vgetq_lane(in, 1) +
+          vgetq_lane(in, 2) + vgetq_lane(in, 3);
+
+    return acc;
+}
+
+
+
+
+/* newton initial guess */
+#define INVSQRT_MAGIC_F32           0x5f3759df
+#define INV_NEWTON_INIT_F32         0x7EF127EA
+
+
+#define INVSQRT_NEWTON_MVE_F32(invSqrt, xHalf, xStart)\
+{                                                     \
+    float32x4_t tmp;                                  \
+                                                      \
+    /* tmp = xhalf * x * x */                         \
+    tmp = vmulq(xStart, xStart);                      \
+    tmp = vmulq(tmp, xHalf);                          \
+    /* (1.5f - xhalf * x * x) */                      \
+    tmp = vsubq(vdupq_n_f32(1.5f), tmp);              \
+    /* x = x*(1.5f-xhalf*x*x); */                     \
+    invSqrt = vmulq(tmp, xStart);                     \
+}
+#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) */
+
+
+/***************************************
+
+Definitions available for f16 datatype with HW acceleration only
+
+***************************************/
+#if defined(ARM_FLOAT16_SUPPORTED)
+#if defined (ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+__STATIC_FORCEINLINE float16_t vecAddAcrossF16Mve(float16x8_t in)
+{
+    float16x8_t tmpVec;
+    _Float16 acc;
+
+    tmpVec = (float16x8_t) vrev32q_s16((int16x8_t) in);
+    in = vaddq_f16(tmpVec, in);
+    tmpVec = (float16x8_t) vrev64q_s32((int32x4_t) in);
+    in = vaddq_f16(tmpVec, in);
+    acc = (_Float16)vgetq_lane_f16(in, 0) + (_Float16)vgetq_lane_f16(in, 4);
+
+    return acc;
+}
+
+__STATIC_FORCEINLINE float16x8_t __mve_cmplx_sum_intra_vec_f16(
+    float16x8_t   vecIn)
+{
+    float16x8_t   vecTmp, vecOut;
+    uint32_t    tmp;
+
+    vecTmp = (float16x8_t) vrev64q_s32((int32x4_t) vecIn);
+    // TO TRACK : using canonical addition leads to unefficient code generation for f16
+    // vecTmp = vecTmp + vecAccCpx0;
+    /*
+     * Compute
+     *  re0+re1 | im0+im1 | re0+re1 | im0+im1
+     *  re2+re3 | im2+im3 | re2+re3 | im2+im3
+     */
+    vecTmp = vaddq_f16(vecTmp, vecIn);
+    vecOut = vecTmp;
+    /*
+     * shift left, random tmp insertion in bottom
+     */
+    vecOut = vreinterpretq_f16_s32(vshlcq_s32(vreinterpretq_s32_f16(vecOut)   , &tmp, 32));
+    /*
+     * Compute:
+     *    DONTCARE     |    DONTCARE     | re0+re1+re0+re1 |im0+im1+im0+im1
+     * re0+re1+re2+re3 | im0+im1+im2+im3 | re2+re3+re2+re3 |im2+im3+im2+im3
+     */
+    vecOut = vaddq_f16(vecOut, vecTmp);
+    /*
+     * Cmplx sum is in 4rd & 5th f16 elt
+     * return full vector
+     */
+    return vecOut;
+}
+
+
+#define mve_cmplx_sum_intra_r_i_f16(vec, Re, Im)                \
+{                                                               \
+    float16x8_t   vecOut = __mve_cmplx_sum_intra_vec_f16(vec);    \
+    Re = vgetq_lane(vecOut, 4);                                 \
+    Im = vgetq_lane(vecOut, 5);                                 \
+}
+
+__STATIC_FORCEINLINE void mve_cmplx_sum_intra_vec_f16(
+    float16x8_t   vecIn,
+    float16_t  *pOut)
+{
+    float16x8_t   vecOut = __mve_cmplx_sum_intra_vec_f16(vecIn);
+    /*
+     * Cmplx sum is in 4rd & 5th f16 elt
+     * use 32-bit extraction
+     */
+    *(float32_t *) pOut = ((float32x4_t) vecOut)[2];
+}
+
+
+#define INVSQRT_MAGIC_F16           0x59ba      /*  ( 0x1ba = 0x3759df >> 13) */
+
+/* canonical version of INVSQRT_NEWTON_MVE_F16 leads to bad performance */
+#define INVSQRT_NEWTON_MVE_F16(invSqrt, xHalf, xStart)                  \
+{                                                                       \
+    float16x8_t tmp;                                                      \
+                                                                        \
+    /* tmp = xhalf * x * x */                                           \
+    tmp = vmulq(xStart, xStart);                                        \
+    tmp = vmulq(tmp, xHalf);                                            \
+    /* (1.5f - xhalf * x * x) */                                        \
+    tmp = vsubq(vdupq_n_f16((float16_t)1.5), tmp);                      \
+    /* x = x*(1.5f-xhalf*x*x); */                                       \
+    invSqrt = vmulq(tmp, xStart);                                       \
+}
+
+#endif
+#endif 
+
+/***************************************
+
+Definitions available for MVEI and MVEF only
+
+***************************************/
+#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI))  && !defined(ARM_MATH_AUTOVECTORIZE)
+/* Following functions are used to transpose matrix in f32 and q31 cases */
+__STATIC_INLINE arm_status arm_mat_trans_32bit_2x2_mve(
+    uint32_t * pDataSrc,
+    uint32_t * pDataDest)
+{
+    static const uint32x4_t vecOffs = { 0, 2, 1, 3 };
+    /*
+     *
+     * | 0   1 |   =>  |  0   2 |
+     * | 2   3 |       |  1   3 |
+     *
+     */
+    uint32x4_t vecIn = vldrwq_u32((uint32_t const *)pDataSrc);
+    vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs, vecIn);
+
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_trans_32bit_3x3_mve(
+    uint32_t * pDataSrc,
+    uint32_t * pDataDest)
+{
+    const uint32x4_t vecOffs1 = { 0, 3, 6, 1};
+    const uint32x4_t vecOffs2 = { 4, 7, 2, 5};
+    /*
+     *
+     *  | 0   1   2 |       | 0   3   6 |  4 x 32 flattened version | 0   3   6   1 |
+     *  | 3   4   5 |   =>  | 1   4   7 |            =>             | 4   7   2   5 |
+     *  | 6   7   8 |       | 2   5   8 |       (row major)         | 8   .   .   . |
+     *
+     */
+    uint32x4_t vecIn1 = vldrwq_u32((uint32_t const *) pDataSrc);
+    uint32x4_t vecIn2 = vldrwq_u32((uint32_t const *) &pDataSrc[4]);
+
+    vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs1, vecIn1);
+    vstrwq_scatter_shifted_offset_u32(pDataDest, vecOffs2, vecIn2);
+
+    pDataDest[8] = pDataSrc[8];
+
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_trans_32bit_4x4_mve(uint32_t * pDataSrc, uint32_t * pDataDest)
+{
+    /*
+     * 4x4 Matrix transposition
+     * is 4 x de-interleave operation
+     *
+     * 0   1   2   3       0   4   8   12
+     * 4   5   6   7       1   5   9   13
+     * 8   9   10  11      2   6   10  14
+     * 12  13  14  15      3   7   11  15
+     */
+
+    uint32x4x4_t vecIn;
+
+    vecIn = vld4q((uint32_t const *) pDataSrc);
+    vstrwq(pDataDest, vecIn.val[0]);
+    pDataDest += 4;
+    vstrwq(pDataDest, vecIn.val[1]);
+    pDataDest += 4;
+    vstrwq(pDataDest, vecIn.val[2]);
+    pDataDest += 4;
+    vstrwq(pDataDest, vecIn.val[3]);
+
+    return (ARM_MATH_SUCCESS);
+}
+
+
+__STATIC_INLINE arm_status arm_mat_trans_32bit_generic_mve(
+    uint16_t    srcRows,
+    uint16_t    srcCols,
+    uint32_t  * pDataSrc,
+    uint32_t  * pDataDest)
+{
+    uint32x4_t vecOffs;
+    uint32_t  i;
+    uint32_t  blkCnt;
+    uint32_t const *pDataC;
+    uint32_t *pDataDestR;
+    uint32x4_t vecIn;
+
+    vecOffs = vidupq_u32((uint32_t)0, 1);
+    vecOffs = vecOffs * srcCols;
+
+    i = srcCols;
+    do
+    {
+        pDataC = (uint32_t const *) pDataSrc;
+        pDataDestR = pDataDest;
+
+        blkCnt = srcRows >> 2;
+        while (blkCnt > 0U)
+        {
+            vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs);
+            vstrwq(pDataDestR, vecIn); 
+            pDataDestR += 4;
+            pDataC = pDataC + srcCols * 4;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /*
+         * tail
+         */
+        blkCnt = srcRows & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+            vecIn = vldrwq_gather_shifted_offset_u32(pDataC, vecOffs);
+            vstrwq_p(pDataDestR, vecIn, p0);
+        }
+
+        pDataSrc += 1;
+        pDataDest += srcRows;
+    }
+    while (--i);
+
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_cmplx_trans_32bit(
+    uint16_t    srcRows,
+    uint16_t    srcCols,
+    uint32_t   *pDataSrc,
+    uint16_t    dstRows,
+    uint16_t    dstCols,
+    uint32_t   *pDataDest)
+{
+    uint32_t        i;
+    uint32_t const *pDataC;
+    uint32_t       *pDataRow;
+    uint32_t       *pDataDestR, *pDataDestRow;
+    uint32x4_t      vecOffsRef, vecOffsCur;
+    uint32_t        blkCnt;
+    uint32x4_t      vecIn;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+    /*
+     * Check for matrix mismatch condition
+     */
+    if ((srcRows != dstCols) || (srcCols != dstRows))
+    {
+        /*
+         * Set status as ARM_MATH_SIZE_MISMATCH
+         */
+        return ARM_MATH_SIZE_MISMATCH;
+    }
+#else
+    (void)dstRows;
+    (void)dstCols;
+#endif
+
+    /* 2x2, 3x3 and 4x4 specialization to be added */
+
+    vecOffsRef[0] = 0;
+    vecOffsRef[1] = 1;
+    vecOffsRef[2] = srcCols << 1;
+    vecOffsRef[3] = (srcCols << 1) + 1;
+
+    pDataRow = pDataSrc;
+    pDataDestRow = pDataDest;
+    i = srcCols;
+    do
+    {
+        pDataC = (uint32_t const *) pDataRow;
+        pDataDestR = pDataDestRow;
+        vecOffsCur = vecOffsRef;
+
+        blkCnt = (srcRows * CMPLX_DIM) >> 2;
+        while (blkCnt > 0U)
+        {
+            vecIn = vldrwq_gather_shifted_offset(pDataC, vecOffsCur);
+            vstrwq(pDataDestR, vecIn); 
+            pDataDestR += 4;
+            vecOffsCur = vaddq(vecOffsCur, (srcCols << 2));
+            /*
+             * Decrement the blockSize loop counter
+             */
+             blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = (srcRows * CMPLX_DIM) & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+            vecIn = vldrwq_gather_shifted_offset(pDataC, vecOffsCur);
+            vstrwq_p(pDataDestR, vecIn, p0);
+        }
+
+        pDataRow += CMPLX_DIM;
+        pDataDestRow += (srcRows * CMPLX_DIM);
+    }
+    while (--i);
+
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_trans_16bit_2x2(uint16_t * pDataSrc, uint16_t * pDataDest)
+{
+    pDataDest[0] = pDataSrc[0];
+    pDataDest[3] = pDataSrc[3];
+    pDataDest[2] = pDataSrc[1];
+    pDataDest[1] = pDataSrc[2];
+
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_trans_16bit_3x3_mve(uint16_t * pDataSrc, uint16_t * pDataDest)
+{
+    static const uint16_t stridesTr33[8] = { 0, 3, 6, 1, 4, 7, 2, 5 };
+    uint16x8_t    vecOffs1;
+    uint16x8_t    vecIn1;
+    /*
+     *
+     *  | 0   1   2 |       | 0   3   6 |  8 x 16 flattened version | 0   3   6   1   4   7   2   5 |
+     *  | 3   4   5 | =>    | 1   4   7 |            =>             | 8   .   .   .   .   .   .   . |
+     *  | 6   7   8 |       | 2   5   8 |       (row major)
+     *
+     */
+    vecOffs1 = vldrhq_u16((uint16_t const *) stridesTr33);
+    vecIn1 = vldrhq_u16((uint16_t const *) pDataSrc);
+
+    vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs1, vecIn1);
+
+    pDataDest[8] = pDataSrc[8];
+
+    return (ARM_MATH_SUCCESS);
+}
+
+
+__STATIC_INLINE arm_status arm_mat_trans_16bit_4x4_mve(uint16_t * pDataSrc, uint16_t * pDataDest)
+{
+    static const uint16_t stridesTr44_1[8] = { 0, 4, 8, 12, 1, 5, 9, 13 };
+    static const uint16_t stridesTr44_2[8] = { 2, 6, 10, 14, 3, 7, 11, 15 };
+    uint16x8_t    vecOffs1, vecOffs2;
+    uint16x8_t    vecIn1, vecIn2;
+    uint16_t const * pDataSrcVec = (uint16_t const *) pDataSrc;
+
+    /*
+     * 4x4 Matrix transposition
+     *
+     * | 0   1   2   3  |       | 0   4   8   12 |   8 x 16 flattened version
+     * | 4   5   6   7  |  =>   | 1   5   9   13 |   =>      [0   4   8   12  1   5   9   13]
+     * | 8   9   10  11 |       | 2   6   10  14 |           [2   6   10  14  3   7   11  15]
+     * | 12  13  14  15 |       | 3   7   11  15 |
+     */
+
+    vecOffs1 = vldrhq_u16((uint16_t const *) stridesTr44_1);
+    vecOffs2 = vldrhq_u16((uint16_t const *) stridesTr44_2);
+    vecIn1 = vldrhq_u16(pDataSrcVec);
+    pDataSrcVec += 8;
+    vecIn2 = vldrhq_u16(pDataSrcVec);
+
+    vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs1, vecIn1);
+    vstrhq_scatter_shifted_offset_u16(pDataDest, vecOffs2, vecIn2);
+
+
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+__STATIC_INLINE arm_status arm_mat_trans_16bit_generic(
+    uint16_t    srcRows,
+    uint16_t    srcCols,
+    uint16_t  * pDataSrc,
+    uint16_t  * pDataDest)
+{
+    uint16x8_t    vecOffs;
+    uint32_t        i;
+    uint32_t        blkCnt;
+    uint16_t const *pDataC;
+    uint16_t       *pDataDestR;
+    uint16x8_t    vecIn;
+
+    vecOffs = vidupq_u16((uint32_t)0, 1);
+    vecOffs = vecOffs * srcCols;
+
+    i = srcCols;
+    while(i > 0U)
+    {
+        pDataC = (uint16_t const *) pDataSrc;
+        pDataDestR = pDataDest;
+
+        blkCnt = srcRows >> 3;
+        while (blkCnt > 0U)
+        {
+            vecIn = vldrhq_gather_shifted_offset_u16(pDataC, vecOffs);
+            vstrhq_u16(pDataDestR, vecIn); 
+            pDataDestR += 8;
+            pDataC = pDataC + srcCols * 8;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /*
+         * tail
+         */
+        blkCnt = srcRows & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+            vecIn = vldrhq_gather_shifted_offset_u16(pDataC, vecOffs);
+            vstrhq_p_u16(pDataDestR, vecIn, p0);
+        }
+        pDataSrc += 1;
+        pDataDest += srcRows;
+        i--;
+    }
+
+    return (ARM_MATH_SUCCESS);
+}
+
+
+__STATIC_INLINE arm_status arm_mat_cmplx_trans_16bit(
+    uint16_t    srcRows,
+    uint16_t    srcCols,
+    uint16_t   *pDataSrc,
+    uint16_t    dstRows,
+    uint16_t    dstCols,
+    uint16_t   *pDataDest)
+{
+    static const uint16_t loadCmplxCol[8] = { 0, 0, 1, 1, 2, 2, 3, 3 };
+    int             i;
+    uint16x8_t    vecOffsRef, vecOffsCur;
+    uint16_t const *pDataC;
+    uint16_t       *pDataRow;
+    uint16_t       *pDataDestR, *pDataDestRow;
+    uint32_t        blkCnt;
+    uint16x8_t    vecIn;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+    /*
+     * Check for matrix mismatch condition
+     */
+    if ((srcRows != dstCols) || (srcCols != dstRows))
+    {
+        /*
+         * Set status as ARM_MATH_SIZE_MISMATCH
+         */
+        return ARM_MATH_SIZE_MISMATCH;
+    }
+#else
+    (void)dstRows;
+    (void)dstCols;
+#endif
+
+    /*
+     * 2x2, 3x3 and 4x4 specialization to be added
+     */
+
+
+    /*
+     * build  [0, 1, 2xcol, 2xcol+1, 4xcol, 4xcol+1, 6xcol, 6xcol+1]
+     */
+    vecOffsRef = vldrhq_u16((uint16_t const *) loadCmplxCol);
+    vecOffsRef = vmulq(vecOffsRef, (uint16_t) (srcCols * CMPLX_DIM))
+                    + viwdupq_u16((uint32_t)0, (uint16_t) 2, 1);
+
+    pDataRow = pDataSrc;
+    pDataDestRow = pDataDest;
+    i = srcCols;
+    do
+    {
+        pDataC = (uint16_t const *) pDataRow;
+        pDataDestR = pDataDestRow;
+        vecOffsCur = vecOffsRef;
+
+        blkCnt = (srcRows * CMPLX_DIM) >> 3;
+        while (blkCnt > 0U)
+        {
+            vecIn = vldrhq_gather_shifted_offset(pDataC, vecOffsCur);
+            vstrhq(pDataDestR, vecIn);  
+            pDataDestR+= 8; // VEC_LANES_U16
+            vecOffsCur = vaddq(vecOffsCur, (srcCols << 3));
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = (srcRows * CMPLX_DIM) & 0x7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+            vecIn = vldrhq_gather_shifted_offset(pDataC, vecOffsCur);
+            vstrhq_p(pDataDestR, vecIn, p0);
+        }
+
+        pDataRow += CMPLX_DIM;
+        pDataDestRow += (srcRows * CMPLX_DIM);
+    }
+    while (--i);
+
+    return (ARM_MATH_SUCCESS);
+}
+#endif /* MVEF and MVEI */
+
+/***************************************
+
+Definitions available for MVEI only
+
+***************************************/
+#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI))  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_common_tables.h"
+
+#define MVE_ASRL_SAT16(acc, shift)          ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff)
+#define MVE_ASRL_SAT32(acc, shift)          ((sqrshrl(acc, -(32-shift)) >> 32) & 0xffffffff)
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE)
+__STATIC_INLINE q31x4_t FAST_VSQRT_Q31(q31x4_t vecIn)
+{
+    q63x2_t         vecTmpLL;
+    q31x4_t         vecTmp0, vecTmp1;
+    q31_t           scale;
+    q63_t           tmp64;
+    q31x4_t         vecNrm, vecDst, vecIdx, vecSignBits;
+
+
+    vecSignBits = vclsq(vecIn);
+    vecSignBits = vbicq_n_s32(vecSignBits, 1);
+    /*
+     * in = in << no_of_sign_bits;
+     */
+    vecNrm = vshlq(vecIn, vecSignBits);
+    /*
+     * index = in >> 24;
+     */
+    vecIdx = vecNrm >> 24;
+    vecIdx = vecIdx << 1;
+
+    vecTmp0 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, (uint32x4_t)vecIdx);
+
+    vecIdx = vecIdx + 1;
+
+    vecTmp1 = vldrwq_gather_shifted_offset_s32(sqrtTable_Q31, (uint32x4_t)vecIdx);
+
+    vecTmp1 = vqrdmulhq(vecTmp1, vecNrm);
+    vecTmp0 = vecTmp0 - vecTmp1;
+    vecTmp1 = vqrdmulhq(vecTmp0, vecTmp0);
+    vecTmp1 = vqrdmulhq(vecNrm, vecTmp1);
+    vecTmp1 = vdupq_n_s32(0x18000000) - vecTmp1;
+    vecTmp0 = vqrdmulhq(vecTmp0, vecTmp1);
+    vecTmpLL = vmullbq_int(vecNrm, vecTmp0);
+
+    /*
+     * scale elements 0, 2
+     */
+    scale = 26 + (vecSignBits[0] >> 1);
+    tmp64 = asrl(vecTmpLL[0], scale);
+    vecDst[0] = (q31_t) tmp64;
+
+    scale = 26 + (vecSignBits[2] >> 1);
+    tmp64 = asrl(vecTmpLL[1], scale);
+    vecDst[2] = (q31_t) tmp64;
+
+    vecTmpLL = vmulltq_int(vecNrm, vecTmp0);
+
+    /*
+     * scale elements 1, 3
+     */
+    scale = 26 + (vecSignBits[1] >> 1);
+    tmp64 = asrl(vecTmpLL[0], scale);
+    vecDst[1] = (q31_t) tmp64;
+
+    scale = 26 + (vecSignBits[3] >> 1);
+    tmp64 = asrl(vecTmpLL[1], scale);
+    vecDst[3] = (q31_t) tmp64;
+    /*
+     * set negative values to 0
+     */
+    vecDst = vdupq_m(vecDst, 0, vcmpltq_n_s32(vecIn, 0));
+
+    return vecDst;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE)
+__STATIC_INLINE q15x8_t FAST_VSQRT_Q15(q15x8_t vecIn)
+{
+    q31x4_t         vecTmpLev, vecTmpLodd, vecSignL;
+    q15x8_t         vecTmp0, vecTmp1;
+    q15x8_t         vecNrm, vecDst, vecIdx, vecSignBits;
+
+    vecDst = vuninitializedq_s16();
+
+    vecSignBits = vclsq(vecIn);
+    vecSignBits = vbicq_n_s16(vecSignBits, 1);
+    /*
+     * in = in << no_of_sign_bits;
+     */
+    vecNrm = vshlq(vecIn, vecSignBits);
+
+    vecIdx = vecNrm >> 8;
+    vecIdx = vecIdx << 1;
+
+    vecTmp0 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, (uint16x8_t)vecIdx);
+
+    vecIdx = vecIdx + 1;
+
+    vecTmp1 = vldrhq_gather_shifted_offset_s16(sqrtTable_Q15, (uint16x8_t)vecIdx);
+
+    vecTmp1 = vqrdmulhq(vecTmp1, vecNrm);
+    vecTmp0 = vecTmp0 - vecTmp1;
+    vecTmp1 = vqrdmulhq(vecTmp0, vecTmp0);
+    vecTmp1 = vqrdmulhq(vecNrm, vecTmp1);
+    vecTmp1 = vdupq_n_s16(0x1800) - vecTmp1;
+    vecTmp0 = vqrdmulhq(vecTmp0, vecTmp1);
+
+    vecSignBits = vecSignBits >> 1;
+
+    vecTmpLev = vmullbq_int(vecNrm, vecTmp0);
+    vecTmpLodd = vmulltq_int(vecNrm, vecTmp0);
+
+    vecTmp0 = vecSignBits + 10;
+    /*
+     * negate sign to apply register based vshl
+     */
+    vecTmp0 = -vecTmp0;
+
+    /*
+     * shift even elements
+     */
+    vecSignL = vmovlbq(vecTmp0);
+    vecTmpLev = vshlq(vecTmpLev, vecSignL);
+    /*
+     * shift odd elements
+     */
+    vecSignL = vmovltq(vecTmp0);
+    vecTmpLodd = vshlq(vecTmpLodd, vecSignL);
+    /*
+     * merge and narrow odd and even parts
+     */
+    vecDst = vmovnbq_s32(vecDst, vecTmpLev);
+    vecDst = vmovntq_s32(vecDst, vecTmpLodd);
+    /*
+     * set negative values to 0
+     */
+    vecDst = vdupq_m(vecDst, 0, vcmpltq_n_s16(vecIn, 0));
+
+    return vecDst;
+}
+#endif
+
+#endif /* defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI) */
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Include/arm_math.h b/Libraries/CMSIS/DSP/Include/arm_math.h
index fb2bce51..300c5cf4 100644
--- a/Libraries/CMSIS/DSP/Include/arm_math.h
+++ b/Libraries/CMSIS/DSP/Include/arm_math.h
@@ -1,7361 +1,236 @@
-/******************************************************************************
- * @file     arm_math.h
- * @brief    Public header file for CMSIS DSP Library
- * @version  V1.6.0
- * @date     18. March 2019
- ******************************************************************************/
-/*
- * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-/**
-   \mainpage CMSIS DSP Software Library
-   *
-   * Introduction
-   * ------------
-   *
-   * This user manual describes the CMSIS DSP software library,
-   * a suite of common signal processing functions for use on Cortex-M processor based devices.
-   *
-   * The library is divided into a number of functions each covering a specific category:
-   * - Basic math functions
-   * - Fast math functions
-   * - Complex math functions
-   * - Filters
-   * - Matrix functions
-   * - Transform functions
-   * - Motor control functions
-   * - Statistical functions
-   * - Support functions
-   * - Interpolation functions
-   *
-   * The library has separate functions for operating on 8-bit integers, 16-bit integers,
-   * 32-bit integer and 32-bit floating-point values.
-   *
-   * Using the Library
-   * ------------
-   *
-   * The library installer contains prebuilt versions of the libraries in the <code>Lib</code> folder.
-   * - arm_cortexM7lfdp_math.lib (Cortex-M7, Little endian, Double Precision Floating Point Unit)
-   * - arm_cortexM7bfdp_math.lib (Cortex-M7, Big endian, Double Precision Floating Point Unit)
-   * - arm_cortexM7lfsp_math.lib (Cortex-M7, Little endian, Single Precision Floating Point Unit)
-   * - arm_cortexM7bfsp_math.lib (Cortex-M7, Big endian and Single Precision Floating Point Unit on)
-   * - arm_cortexM7l_math.lib (Cortex-M7, Little endian)
-   * - arm_cortexM7b_math.lib (Cortex-M7, Big endian)
-   * - arm_cortexM4lf_math.lib (Cortex-M4, Little endian, Floating Point Unit)
-   * - arm_cortexM4bf_math.lib (Cortex-M4, Big endian, Floating Point Unit)
-   * - arm_cortexM4l_math.lib (Cortex-M4, Little endian)
-   * - arm_cortexM4b_math.lib (Cortex-M4, Big endian)
-   * - arm_cortexM3l_math.lib (Cortex-M3, Little endian)
-   * - arm_cortexM3b_math.lib (Cortex-M3, Big endian)
-   * - arm_cortexM0l_math.lib (Cortex-M0 / Cortex-M0+, Little endian)
-   * - arm_cortexM0b_math.lib (Cortex-M0 / Cortex-M0+, Big endian)
-   * - arm_ARMv8MBLl_math.lib (Armv8-M Baseline, Little endian)
-   * - arm_ARMv8MMLl_math.lib (Armv8-M Mainline, Little endian)
-   * - arm_ARMv8MMLlfsp_math.lib (Armv8-M Mainline, Little endian, Single Precision Floating Point Unit)
-   * - arm_ARMv8MMLld_math.lib (Armv8-M Mainline, Little endian, DSP instructions)
-   * - arm_ARMv8MMLldfsp_math.lib (Armv8-M Mainline, Little endian, DSP instructions, Single Precision Floating Point Unit)
-   *
-   * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
-   * Simply include this file and link the appropriate library in the application and begin calling the library functions. The Library supports single
-   * public header file <code> arm_math.h</code> for Cortex-M cores with little endian and big endian. Same header file will be used for floating point unit(FPU) variants.
-   *
-   *
-   * Examples
-   * --------
-   *
-   * The library ships with a number of examples which demonstrate how to use the library functions.
-   *
-   * Toolchain Support
-   * ------------
-   *
-   * The library has been developed and tested with MDK version 5.14.0.0
-   * The library is being tested in GCC and IAR toolchains and updates on this activity will be made available shortly.
-   *
-   * Building the Library
-   * ------------
-   *
-   * The library installer contains a project file to rebuild libraries on MDK toolchain in the <code>CMSIS\\DSP\\Projects\\ARM</code> folder.
-   * - arm_cortexM_math.uvprojx
-   *
-   *
-   * The libraries can be built by opening the arm_cortexM_math.uvprojx project in MDK-ARM, selecting a specific target, and defining the optional preprocessor macros detailed above.
-   *
-   * Preprocessor Macros
-   * ------------
-   *
-   * Each library project have different preprocessor macros.
-   *
-   * - ARM_MATH_BIG_ENDIAN:
-   *
-   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
-   *
-   * - ARM_MATH_MATRIX_CHECK:
-   *
-   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
-   *
-   * - ARM_MATH_ROUNDING:
-   *
-   * Define macro ARM_MATH_ROUNDING for rounding on support functions
-   *
-   * - ARM_MATH_LOOPUNROLL:
-   *
-   * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
-   *
-   * - ARM_MATH_NEON:
-   *
-   * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
-   * It is not enabled by default when Neon is available because performances are 
-   * dependent on the compiler and target architecture.
-   *
-   * - ARM_MATH_NEON_EXPERIMENTAL:
-   *
-   * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of 
-   * of some DSP functions. Experimental Neon versions currently do not have better
-   * performances than the scalar versions.
-   *
-   * <hr>
-   * CMSIS-DSP in ARM::CMSIS Pack
-   * -----------------------------
-   *
-   * The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directories:
-   * |File/Folder                      |Content                                                                 |
-   * |---------------------------------|------------------------------------------------------------------------|
-   * |\b CMSIS\\Documentation\\DSP     | This documentation                                                     |
-   * |\b CMSIS\\DSP\\DSP_Lib_TestSuite | DSP_Lib test suite                                                     |
-   * |\b CMSIS\\DSP\\Examples          | Example projects demonstrating the usage of the library functions      |
-   * |\b CMSIS\\DSP\\Include           | DSP_Lib include files                                                  |
-   * |\b CMSIS\\DSP\\Lib               | DSP_Lib binaries                                                       |
-   * |\b CMSIS\\DSP\\Projects          | Projects to rebuild DSP_Lib binaries                                   |
-   * |\b CMSIS\\DSP\\Source            | DSP_Lib source files                                                   |
-   *
-   * <hr>
-   * Revision History of CMSIS-DSP
-   * ------------
-   * Please refer to \ref ChangeLog_pg.
-   */
-
-
-/**
- * @defgroup groupMath Basic Math Functions
- */
-
-/**
- * @defgroup groupFastMath Fast Math Functions
- * This set of functions provides a fast approximation to sine, cosine, and square root.
- * As compared to most of the other functions in the CMSIS math library, the fast math functions
- * operate on individual values and not arrays.
- * There are separate functions for Q15, Q31, and floating-point data.
- *
- */
-
-/**
- * @defgroup groupCmplxMath Complex Math Functions
- * This set of functions operates on complex data vectors.
- * The data in the complex arrays is stored in an interleaved fashion
- * (real, imag, real, imag, ...).
- * In the API functions, the number of samples in a complex array refers
- * to the number of complex values; the array contains twice this number of
- * real values.
- */
-
-/**
- * @defgroup groupFilters Filtering Functions
- */
-
-/**
- * @defgroup groupMatrix Matrix Functions
- *
- * This set of functions provides basic matrix math operations.
- * The functions operate on matrix data structures.  For example,
- * the type
- * definition for the floating-point matrix structure is shown
- * below:
- * <pre>
- *     typedef struct
- *     {
- *       uint16_t numRows;     // number of rows of the matrix.
- *       uint16_t numCols;     // number of columns of the matrix.
- *       float32_t *pData;     // points to the data of the matrix.
- *     } arm_matrix_instance_f32;
- * </pre>
- * There are similar definitions for Q15 and Q31 data types.
- *
- * The structure specifies the size of the matrix and then points to
- * an array of data.  The array is of size <code>numRows X numCols</code>
- * and the values are arranged in row order.  That is, the
- * matrix element (i, j) is stored at:
- * <pre>
- *     pData[i*numCols + j]
- * </pre>
- *
- * \par Init Functions
- * There is an associated initialization function for each type of matrix
- * data structure.
- * The initialization function sets the values of the internal structure fields.
- * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
- * for floating-point, Q31 and Q15 types,  respectively.
- *
- * \par
- * Use of the initialization function is optional. However, if initialization function is used
- * then the instance structure cannot be placed into a const data section.
- * To place the instance structure in a const data
- * section, manually initialize the data structure.  For example:
- * <pre>
- * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
- * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
- * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
- * </pre>
- * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
- * specifies the number of columns, and <code>pData</code> points to the
- * data array.
- *
- * \par Size Checking
- * By default all of the matrix functions perform size checking on the input and
- * output matrices. For example, the matrix addition function verifies that the
- * two input matrices and the output matrix all have the same number of rows and
- * columns. If the size check fails the functions return:
- * <pre>
- *     ARM_MATH_SIZE_MISMATCH
- * </pre>
- * Otherwise the functions return
- * <pre>
- *     ARM_MATH_SUCCESS
- * </pre>
- * There is some overhead associated with this matrix size checking.
- * The matrix size checking is enabled via the \#define
- * <pre>
- *     ARM_MATH_MATRIX_CHECK
- * </pre>
- * within the library project settings.  By default this macro is defined
- * and size checking is enabled. By changing the project settings and
- * undefining this macro size checking is eliminated and the functions
- * run a bit faster. With size checking disabled the functions always
- * return <code>ARM_MATH_SUCCESS</code>.
- */
-
-/**
- * @defgroup groupTransforms Transform Functions
- */
-
-/**
- * @defgroup groupController Controller Functions
- */
-
-/**
- * @defgroup groupStats Statistics Functions
- */
-
-/**
- * @defgroup groupSupport Support Functions
- */
-
-/**
- * @defgroup groupInterpolation Interpolation Functions
- * These functions perform 1- and 2-dimensional interpolation of data.
- * Linear interpolation is used for 1-dimensional data and
- * bilinear interpolation is used for 2-dimensional data.
- */
-
-/**
- * @defgroup groupExamples Examples
- */
-
-
-#ifndef _ARM_MATH_H
-#define _ARM_MATH_H
-
-/* Compiler specific diagnostic adjustment */
-#if   defined ( __CC_ARM )
-
-#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
-
-#elif defined ( __GNUC__ )
-  #pragma GCC diagnostic push
-  #pragma GCC diagnostic ignored "-Wsign-conversion"
-  #pragma GCC diagnostic ignored "-Wconversion"
-  #pragma GCC diagnostic ignored "-Wunused-parameter"
-
-#elif defined ( __ICCARM__ )
-
-#elif defined ( __TI_ARM__ )
-
-#elif defined ( __CSMC__ )
-
-#elif defined ( __TASKING__ )
-
-#elif defined ( _MSC_VER )
-
-#else
-  #error Unknown compiler
-#endif
-
-
-/* Included for instrinsics definitions */
-#if !defined ( _MSC_VER )
-#include "cmsis_compiler.h"
-#else
-#include <stdint.h>
-#define __STATIC_FORCEINLINE static __forceinline
-#define __ALIGNED(x) __declspec(align(x))
-#define LOW_OPTIMIZATION_ENTER
-#define LOW_OPTIMIZATION_EXIT
-#define IAR_ONLY_LOW_OPTIMIZATION_ENTER 
-#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-#endif
-
-#include "string.h"
-#include "math.h"
-#include "float.h"
-
-/* evaluate ARM DSP feature */
-#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
-  #define ARM_MATH_DSP                   1
-#endif
-
-#if defined(__ARM_NEON)
-#include <arm_neon.h>
-#endif
-
-
-#ifdef   __cplusplus
-extern "C"
-{
-#endif
-
-
-  /**
-   * @brief Macros required for reciprocal calculation in Normalized LMS
-   */
-
-#define DELTA_Q31          (0x100)
-#define DELTA_Q15          0x5
-#define INDEX_MASK         0x0000003F
-#ifndef PI
-  #define PI               3.14159265358979f
-#endif
-
-  /**
-   * @brief Macros required for SINE and COSINE Fast math approximations
-   */
-
-#define FAST_MATH_TABLE_SIZE  512
-#define FAST_MATH_Q31_SHIFT   (32 - 10)
-#define FAST_MATH_Q15_SHIFT   (16 - 10)
-#define CONTROLLER_Q31_SHIFT  (32 - 9)
-#define TABLE_SPACING_Q31     0x400000
-#define TABLE_SPACING_Q15     0x80
-
-  /**
-   * @brief Macros required for SINE and COSINE Controller functions
-   */
-  /* 1.31(q31) Fixed value of 2/360 */
-  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
-#define INPUT_SPACING         0xB60B61
-
-
-  /**
-   * @brief Error status returned by some functions in the library.
-   */
-
-  typedef enum
-  {
-    ARM_MATH_SUCCESS        =  0,        /**< No error */
-    ARM_MATH_ARGUMENT_ERROR = -1,        /**< One or more arguments are incorrect */
-    ARM_MATH_LENGTH_ERROR   = -2,        /**< Length of data buffer is incorrect */
-    ARM_MATH_SIZE_MISMATCH  = -3,        /**< Size of matrices is not compatible with the operation */
-    ARM_MATH_NANINF         = -4,        /**< Not-a-number (NaN) or infinity is generated */
-    ARM_MATH_SINGULAR       = -5,        /**< Input matrix is singular and cannot be inverted */
-    ARM_MATH_TEST_FAILURE   = -6         /**< Test Failed */
-  } arm_status;
-
-  /**
-   * @brief 8-bit fractional data type in 1.7 format.
-   */
-  typedef int8_t q7_t;
-
-  /**
-   * @brief 16-bit fractional data type in 1.15 format.
-   */
-  typedef int16_t q15_t;
-
-  /**
-   * @brief 32-bit fractional data type in 1.31 format.
-   */
-  typedef int32_t q31_t;
-
-  /**
-   * @brief 64-bit fractional data type in 1.63 format.
-   */
-  typedef int64_t q63_t;
-
-  /**
-   * @brief 32-bit floating-point type definition.
-   */
-  typedef float float32_t;
-
-  /**
-   * @brief 64-bit floating-point type definition.
-   */
-  typedef double float64_t;
-
-
-/**
-  @brief definition to read/write two 16 bit values.
-  @deprecated
- */
-#if   defined ( __CC_ARM )
-  #define __SIMD32_TYPE int32_t __packed
-#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
-  #define __SIMD32_TYPE int32_t
-#elif defined ( __GNUC__ )
-  #define __SIMD32_TYPE int32_t
-#elif defined ( __ICCARM__ )
-  #define __SIMD32_TYPE int32_t __packed
-#elif defined ( __TI_ARM__ )
-  #define __SIMD32_TYPE int32_t
-#elif defined ( __CSMC__ )
-  #define __SIMD32_TYPE int32_t
-#elif defined ( __TASKING__ )
-  #define __SIMD32_TYPE __un(aligned) int32_t
-#elif defined(_MSC_VER )
-  #define __SIMD32_TYPE int32_t
-#else
-  #error Unknown compiler
-#endif
-
-#define __SIMD32(addr)        (*(__SIMD32_TYPE **) & (addr))
-#define __SIMD32_CONST(addr)  ( (__SIMD32_TYPE * )   (addr))
-#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE * )   (addr))
-#define __SIMD64(addr)        (*(      int64_t **) & (addr))
-
-/* SIMD replacement */
-
-
-/**
-  @brief         Read 2 Q15 from Q15 pointer.
-  @param[in]     pQ15      points to input value
-  @return        Q31 value
- */
-__STATIC_FORCEINLINE q31_t read_q15x2 (
-  q15_t * pQ15)
-{
-  q31_t val;
-
-  memcpy (&val, pQ15, 4);
-
-  return (val);
-}
-
-/**
-  @brief         Read 2 Q15 from Q15 pointer and increment pointer afterwards.
-  @param[in]     pQ15      points to input value
-  @return        Q31 value
- */
-__STATIC_FORCEINLINE q31_t read_q15x2_ia (
-  q15_t ** pQ15)
-{
-  q31_t val;
-
-  memcpy (&val, *pQ15, 4);
-  *pQ15 += 2;
-
-  return (val);
-}
-
-/**
-  @brief         Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
-  @param[in]     pQ15      points to input value
-  @return        Q31 value
- */
-__STATIC_FORCEINLINE q31_t read_q15x2_da (
-  q15_t ** pQ15)
-{
-  q31_t val;
-
-  memcpy (&val, *pQ15, 4);
-  *pQ15 -= 2;
-
-  return (val);
-}
-
-/**
-  @brief         Write 2 Q15 to Q15 pointer and increment pointer afterwards.
-  @param[in]     pQ15      points to input value
-  @param[in]     value     Q31 value
-  @return        none
- */
-__STATIC_FORCEINLINE void write_q15x2_ia (
-  q15_t ** pQ15,
-  q31_t    value)
-{
-  q31_t val = value;
-
-  memcpy (*pQ15, &val, 4);
-  *pQ15 += 2;
-}
-
-/**
-  @brief         Write 2 Q15 to Q15 pointer.
-  @param[in]     pQ15      points to input value
-  @param[in]     value     Q31 value
-  @return        none
- */
-__STATIC_FORCEINLINE void write_q15x2 (
-  q15_t * pQ15,
-  q31_t   value)
-{
-  q31_t val = value;
-
-  memcpy (pQ15, &val, 4);
-}
-
-
-/**
-  @brief         Read 4 Q7 from Q7 pointer and increment pointer afterwards.
-  @param[in]     pQ7       points to input value
-  @return        Q31 value
- */
-__STATIC_FORCEINLINE q31_t read_q7x4_ia (
-  q7_t ** pQ7)
-{
-  q31_t val;
-
-  memcpy (&val, *pQ7, 4);
-  *pQ7 += 4;
-
-  return (val);
-}
-
-/**
-  @brief         Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
-  @param[in]     pQ7       points to input value
-  @return        Q31 value
- */
-__STATIC_FORCEINLINE q31_t read_q7x4_da (
-  q7_t ** pQ7)
-{
-  q31_t val;
-
-  memcpy (&val, *pQ7, 4);
-  *pQ7 -= 4;
-
-  return (val);
-}
-
-/**
-  @brief         Write 4 Q7 to Q7 pointer and increment pointer afterwards.
-  @param[in]     pQ7       points to input value
-  @param[in]     value     Q31 value
-  @return        none
- */
-__STATIC_FORCEINLINE void write_q7x4_ia (
-  q7_t ** pQ7,
-  q31_t   value)
-{
-  q31_t val = value;
-
-  memcpy (*pQ7, &val, 4);
-  *pQ7 += 4;
-}
-
-/*
-
-Normally those kind of definitions are in a compiler file
-in Core or Core_A.
-
-But for MSVC compiler it is a bit special. The goal is very specific
-to CMSIS-DSP and only to allow the use of this library from other
-systems like Python or Matlab.
-
-MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
-compiler file in Core or Core_A would not make sense.
-
-*/
-#if defined ( _MSC_VER )
-    __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
-    {
-      if (data == 0U) { return 32U; }
-
-      uint32_t count = 0U;
-      uint32_t mask = 0x80000000U;
-
-      while ((data & mask) == 0U)
-      {
-        count += 1U;
-        mask = mask >> 1U;
-      }
-      return count;
-    }
-
-  __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
-  {
-    if ((sat >= 1U) && (sat <= 32U))
-    {
-      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
-      const int32_t min = -1 - max ;
-      if (val > max)
-      {
-        return max;
-      }
-      else if (val < min)
-      {
-        return min;
-      }
-    }
-    return val;
-  }
-
-  __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
-  {
-    if (sat <= 31U)
-    {
-      const uint32_t max = ((1U << sat) - 1U);
-      if (val > (int32_t)max)
-      {
-        return max;
-      }
-      else if (val < 0)
-      {
-        return 0U;
-      }
-    }
-    return (uint32_t)val;
-  }
-#endif
-
-#ifndef ARM_MATH_DSP
-  /**
-   * @brief definition to pack two 16 bit values.
-   */
-  #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0x0000FFFF) | \
-                                      (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
-  #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0xFFFF0000) | \
-                                      (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
-#endif
-
-   /**
-   * @brief definition to pack four 8 bit values.
-   */
-#ifndef ARM_MATH_BIG_ENDIAN
-  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
-                                  (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
-                                  (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
-                                  (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
-#else
-  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
-                                  (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
-                                  (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
-                                  (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
-#endif
-
-
-  /**
-   * @brief Clips Q63 to Q31 values.
-   */
-  __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
-  }
-
-  /**
-   * @brief Clips Q63 to Q15 values.
-   */
-  __STATIC_FORCEINLINE q15_t clip_q63_to_q15(
-  q63_t x)
-  {
-    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
-  }
-
-  /**
-   * @brief Clips Q31 to Q7 values.
-   */
-  __STATIC_FORCEINLINE q7_t clip_q31_to_q7(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
-      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
-  }
-
-  /**
-   * @brief Clips Q31 to Q15 values.
-   */
-  __STATIC_FORCEINLINE q15_t clip_q31_to_q15(
-  q31_t x)
-  {
-    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
-      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
-  }
-
-  /**
-   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
-   */
-  __STATIC_FORCEINLINE q63_t mult32x64(
-  q63_t x,
-  q31_t y)
-  {
-    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
-            (((q63_t) (x >> 32)                * y)      )  );
-  }
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
-   */
-  __STATIC_FORCEINLINE uint32_t arm_recip_q31(
-        q31_t in,
-        q31_t * dst,
-  const q31_t * pRecipTable)
-  {
-    q31_t out;
-    uint32_t tempVal;
-    uint32_t index, i;
-    uint32_t signBits;
-
-    if (in > 0)
-    {
-      signBits = ((uint32_t) (__CLZ( in) - 1));
-    }
-    else
-    {
-      signBits = ((uint32_t) (__CLZ(-in) - 1));
-    }
-
-    /* Convert input sample to 1.31 format */
-    in = (in << signBits);
-
-    /* calculation of index for initial approximated Val */
-    index = (uint32_t)(in >> 24);
-    index = (index & INDEX_MASK);
-
-    /* 1.31 with exp 1 */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0U; i < 2U; i++)
-    {
-      tempVal = (uint32_t) (((q63_t) in * out) >> 31);
-      tempVal = 0x7FFFFFFFu - tempVal;
-      /*      1.31 with exp 1 */
-      /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
-      out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
-    }
-
-    /* write output */
-    *dst = out;
-
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1U);
-  }
-
-
-  /**
-   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
-   */
-  __STATIC_FORCEINLINE uint32_t arm_recip_q15(
-        q15_t in,
-        q15_t * dst,
-  const q15_t * pRecipTable)
-  {
-    q15_t out = 0;
-    uint32_t tempVal = 0;
-    uint32_t index = 0, i = 0;
-    uint32_t signBits = 0;
-
-    if (in > 0)
-    {
-      signBits = ((uint32_t)(__CLZ( in) - 17));
-    }
-    else
-    {
-      signBits = ((uint32_t)(__CLZ(-in) - 17));
-    }
-
-    /* Convert input sample to 1.15 format */
-    in = (in << signBits);
-
-    /* calculation of index for initial approximated Val */
-    index = (uint32_t)(in >>  8);
-    index = (index & INDEX_MASK);
-
-    /*      1.15 with exp 1  */
-    out = pRecipTable[index];
-
-    /* calculation of reciprocal value */
-    /* running approximation for two iterations */
-    for (i = 0U; i < 2U; i++)
-    {
-      tempVal = (uint32_t) (((q31_t) in * out) >> 15);
-      tempVal = 0x7FFFu - tempVal;
-      /*      1.15 with exp 1 */
-      out = (q15_t) (((q31_t) out * tempVal) >> 14);
-      /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
-    }
-
-    /* write output */
-    *dst = out;
-
-    /* return num of signbits of out = 1/in value */
-    return (signBits + 1);
-  }
-
-#if defined(ARM_MATH_NEON)
-
-static inline float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t  x)
-{
-    float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN));
-    float32x4_t e = vrsqrteq_f32(x1);
-    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
-    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
-    return vmulq_f32(x, e);
-}
-
-static inline int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec)
-{
-    float32x4_t tempF;
-    int32x4_t tempHI,tempLO;
-
-    tempLO = vmovl_s16(vget_low_s16(vec));
-    tempF = vcvtq_n_f32_s32(tempLO,15);
-    tempF = __arm_vec_sqrt_f32_neon(tempF);
-    tempLO = vcvtq_n_s32_f32(tempF,15);
-
-    tempHI = vmovl_s16(vget_high_s16(vec));
-    tempF = vcvtq_n_f32_s32(tempHI,15);
-    tempF = __arm_vec_sqrt_f32_neon(tempF);
-    tempHI = vcvtq_n_s32_f32(tempF,15);
-
-    return(vcombine_s16(vqmovn_s32(tempLO),vqmovn_s32(tempHI)));
-}
-
-static inline int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec)
-{
-  float32x4_t temp;
-
-  temp = vcvtq_n_f32_s32(vec,31);
-  temp = __arm_vec_sqrt_f32_neon(temp);
-  return(vcvtq_n_s32_f32(temp,31));
-}
-
-#endif
-
-/*
- * @brief C custom defined intrinsic functions
- */
-#if !defined (ARM_MATH_DSP)
-
-  /*
-   * @brief C custom defined QADD8
-   */
-  __STATIC_FORCEINLINE uint32_t __QADD8(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s, t, u;
-
-    r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
-    s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
-    t = __SSAT(((((q31_t)x <<  8) >> 24) + (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
-    u = __SSAT(((((q31_t)x      ) >> 24) + (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
-
-    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QSUB8
-   */
-  __STATIC_FORCEINLINE uint32_t __QSUB8(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s, t, u;
-
-    r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
-    s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
-    t = __SSAT(((((q31_t)x <<  8) >> 24) - (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
-    u = __SSAT(((((q31_t)x      ) >> 24) - (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
-
-    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QADD16
-   */
-  __STATIC_FORCEINLINE uint32_t __QADD16(
-  uint32_t x,
-  uint32_t y)
-  {
-/*  q31_t r,     s;  without initialisation 'arm_offset_q15 test' fails  but 'intrinsic' tests pass! for armCC */
-    q31_t r = 0, s = 0;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHADD16
-   */
-  __STATIC_FORCEINLINE uint32_t __SHADD16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QSUB16
-   */
-  __STATIC_FORCEINLINE uint32_t __QSUB16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHSUB16
-   */
-  __STATIC_FORCEINLINE uint32_t __SHSUB16(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QASX
-   */
-  __STATIC_FORCEINLINE uint32_t __QASX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHASX
-   */
-  __STATIC_FORCEINLINE uint32_t __SHASX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined QSAX
-   */
-  __STATIC_FORCEINLINE uint32_t __QSAX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
-    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SHSAX
-   */
-  __STATIC_FORCEINLINE uint32_t __SHSAX(
-  uint32_t x,
-  uint32_t y)
-  {
-    q31_t r, s;
-
-    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-    s = (((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
-
-    return ((uint32_t)((s << 16) | (r      )));
-  }
-
-
-  /*
-   * @brief C custom defined SMUSDX
-   */
-  __STATIC_FORCEINLINE uint32_t __SMUSDX(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
-  }
-
-  /*
-   * @brief C custom defined SMUADX
-   */
-  __STATIC_FORCEINLINE uint32_t __SMUADX(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined QADD
-   */
-  __STATIC_FORCEINLINE int32_t __QADD(
-  int32_t x,
-  int32_t y)
-  {
-    return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
-  }
-
-
-  /*
-   * @brief C custom defined QSUB
-   */
-  __STATIC_FORCEINLINE int32_t __QSUB(
-  int32_t x,
-  int32_t y)
-  {
-    return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
-  }
-
-
-  /*
-   * @brief C custom defined SMLAD
-   */
-  __STATIC_FORCEINLINE uint32_t __SMLAD(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLADX
-   */
-  __STATIC_FORCEINLINE uint32_t __SMLADX(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLSDX
-   */
-  __STATIC_FORCEINLINE uint32_t __SMLSDX(
-  uint32_t x,
-  uint32_t y,
-  uint32_t sum)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q31_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLALD
-   */
-  __STATIC_FORCEINLINE uint64_t __SMLALD(
-  uint32_t x,
-  uint32_t y,
-  uint64_t sum)
-  {
-/*  return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
-    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ( ((q63_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMLALDX
-   */
-  __STATIC_FORCEINLINE uint64_t __SMLALDX(
-  uint32_t x,
-  uint32_t y,
-  uint64_t sum)
-  {
-/*  return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
-    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ( ((q63_t)sum    )                                  )   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMUAD
-   */
-  __STATIC_FORCEINLINE uint32_t __SMUAD(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined SMUSD
-   */
-  __STATIC_FORCEINLINE uint32_t __SMUSD(
-  uint32_t x,
-  uint32_t y)
-  {
-    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
-                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
-  }
-
-
-  /*
-   * @brief C custom defined SXTB16
-   */
-  __STATIC_FORCEINLINE uint32_t __SXTB16(
-  uint32_t x)
-  {
-    return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
-                       ((((q31_t)x <<  8) >>  8) & (q31_t)0xFFFF0000)  ));
-  }
-
-  /*
-   * @brief C custom defined SMMLA
-   */
-  __STATIC_FORCEINLINE int32_t __SMMLA(
-  int32_t x,
-  int32_t y,
-  int32_t sum)
-  {
-    return (sum + (int32_t) (((int64_t) x * y) >> 32));
-  }
-
-#endif /* !defined (ARM_MATH_DSP) */
-
-
-  /**
-   * @brief Instance structure for the Q7 FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;        /**< number of filter coefficients in the filter. */
-          q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    const q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q7;
-
-  /**
-   * @brief Instance structure for the Q15 FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-          q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    const q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-  } arm_fir_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
-          q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    const q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;     /**< number of filter coefficients in the filter. */
-          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-    const float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-  } arm_fir_instance_f32;
-
-  /**
-   * @brief Processing function for the Q7 FIR filter.
-   * @param[in]  S          points to an instance of the Q7 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q7 FIR filter.
-   * @param[in,out] S          points to an instance of the Q7 FIR structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed.
-   */
-  void arm_fir_init_q7(
-        arm_fir_instance_q7 * S,
-        uint16_t numTaps,
-  const q7_t * pCoeffs,
-        q7_t * pState,
-        uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q15 FIR filter.
-   * @param[in]  S          points to an instance of the Q15 FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the fast Q15 FIR filter (fast version).
-   * @param[in]  S          points to an instance of the Q15 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q15 FIR filter.
-   * @param[in,out] S          points to an instance of the Q15 FIR filter structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   * @return     The function returns either
-   * <code>ARM_MATH_SUCCESS</code> if initialization was successful or
-   * <code>ARM_MATH_ARGUMENT_ERROR</code> if <code>numTaps</code> is not a supported value.
-   */
-  arm_status arm_fir_init_q15(
-        arm_fir_instance_q15 * S,
-        uint16_t numTaps,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR filter.
-   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the fast Q31 FIR filter (fast version).
-   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q31 FIR filter.
-   * @param[in,out] S          points to an instance of the Q31 FIR structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   */
-  void arm_fir_init_q31(
-        arm_fir_instance_q31 * S,
-        uint16_t numTaps,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the floating-point FIR filter.
-   * @param[in]  S          points to an instance of the floating-point FIR structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the floating-point FIR filter.
-   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
-   * @param[in]     numTaps    Number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of samples that are processed at a time.
-   */
-  void arm_fir_init_f32(
-        arm_fir_instance_f32 * S,
-        uint16_t numTaps,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        uint32_t blockSize);
-
-  /**
-   * @brief Instance structure for the Q15 Biquad cascade filter.
-   */
-  typedef struct
-  {
-          int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-          q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    const q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-          int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */
-  } arm_biquad_casd_df1_inst_q15;
-
-  /**
-   * @brief Instance structure for the Q31 Biquad cascade filter.
-   */
-  typedef struct
-  {
-          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-          q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    const q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-          uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
-  } arm_biquad_casd_df1_inst_q31;
-
-  /**
-   * @brief Instance structure for the floating-point Biquad cascade filter.
-   */
-  typedef struct
-  {
-          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-          float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
-    const float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_casd_df1_inst_f32;
-
-  /**
-   * @brief Processing function for the Q15 Biquad cascade filter.
-   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q15 Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cascade_df1_init_q15(
-        arm_biquad_casd_df1_inst_q15 * S,
-        uint8_t numStages,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        int8_t postShift);
-
-  /**
-   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 Biquad cascade filter
-   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the Q31 Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the Q31 Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cascade_df1_init_q31(
-        arm_biquad_casd_df1_inst_q31 * S,
-        uint8_t numStages,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        int8_t postShift);
-
-  /**
-   * @brief Processing function for the floating-point Biquad cascade filter.
-   * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief  Initialization function for the floating-point Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the floating-point Biquad cascade structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df1_init_f32(
-        arm_biquad_casd_df1_inst_f32 * S,
-        uint8_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState);
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float32_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f32;
-
-
-  /**
-   * @brief Instance structure for the floating-point matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    float64_t *pData;     /**< points to the data of the matrix. */
-  } arm_matrix_instance_f64;
-
-  /**
-   * @brief Instance structure for the Q15 matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q15_t *pData;         /**< points to the data of the matrix. */
-  } arm_matrix_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 matrix structure.
-   */
-  typedef struct
-  {
-    uint16_t numRows;     /**< number of rows of the matrix.     */
-    uint16_t numCols;     /**< number of columns of the matrix.  */
-    q31_t *pData;         /**< points to the data of the matrix. */
-  } arm_matrix_instance_q31;
-
-  /**
-   * @brief Floating-point matrix addition.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix addition.
-   * @param[in]   pSrcA  points to the first input matrix structure
-   * @param[in]   pSrcB  points to the second input matrix structure
-   * @param[out]  pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix addition.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Floating-point, complex, matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15, complex,  matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_cmplx_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst,
-        q15_t * pScratch);
-
-  /**
-   * @brief Q31, complex, matrix multiplication.
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_cmplx_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Floating-point matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-        arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-        arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix transpose.
-   * @param[in]  pSrc  points to the input matrix
-   * @param[out] pDst  points to the output matrix
-   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
-   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-        arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Floating-point matrix multiplication
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix multiplication
-   * @param[in]  pSrcA   points to the first input matrix structure
-   * @param[in]  pSrcB   points to the second input matrix structure
-   * @param[out] pDst    points to output matrix structure
-   * @param[in]  pState  points to the array for storing intermediate results
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst,
-        q15_t * pState);
-
-  /**
-   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA   points to the first input matrix structure
-   * @param[in]  pSrcB   points to the second input matrix structure
-   * @param[out] pDst    points to output matrix structure
-   * @param[in]  pState  points to the array for storing intermediate results
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst,
-        q15_t * pState);
-
-  /**
-   * @brief Q31 matrix multiplication
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Floating-point matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix subtraction
-   * @param[in]  pSrcA  points to the first input matrix structure
-   * @param[in]  pSrcB  points to the second input matrix structure
-   * @param[out] pDst   points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief Floating-point matrix scaling.
-   * @param[in]  pSrc   points to the input matrix
-   * @param[in]  scale  scale factor
-   * @param[out] pDst   points to the output matrix
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-        float32_t scale,
-        arm_matrix_instance_f32 * pDst);
-
-  /**
-   * @brief Q15 matrix scaling.
-   * @param[in]  pSrc        points to input matrix
-   * @param[in]  scaleFract  fractional portion of the scale factor
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to output matrix
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-        q15_t scaleFract,
-        int32_t shift,
-        arm_matrix_instance_q15 * pDst);
-
-  /**
-   * @brief Q31 matrix scaling.
-   * @param[in]  pSrc        points to input matrix
-   * @param[in]  scaleFract  fractional portion of the scale factor
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to output matrix structure
-   * @return     The function returns either
-   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
-   */
-arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-        q31_t scaleFract,
-        int32_t shift,
-        arm_matrix_instance_q31 * pDst);
-
-  /**
-   * @brief  Q31 matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-void arm_mat_init_q31(
-        arm_matrix_instance_q31 * S,
-        uint16_t nRows,
-        uint16_t nColumns,
-        q31_t * pData);
-
-  /**
-   * @brief  Q15 matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-void arm_mat_init_q15(
-        arm_matrix_instance_q15 * S,
-        uint16_t nRows,
-        uint16_t nColumns,
-        q15_t * pData);
-
-  /**
-   * @brief  Floating-point matrix initialization.
-   * @param[in,out] S         points to an instance of the floating-point matrix structure.
-   * @param[in]     nRows     number of rows in the matrix.
-   * @param[in]     nColumns  number of columns in the matrix.
-   * @param[in]     pData     points to the matrix data array.
-   */
-void arm_mat_init_f32(
-        arm_matrix_instance_f32 * S,
-        uint16_t nRows,
-        uint16_t nColumns,
-        float32_t * pData);
-
-
-  /**
-   * @brief Instance structure for the Q15 PID Control.
-   */
-  typedef struct
-  {
-          q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */
-#if !defined (ARM_MATH_DSP)
-          q15_t A1;
-          q15_t A2;
-#else
-          q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
-#endif
-          q15_t state[3];     /**< The state array of length 3. */
-          q15_t Kp;           /**< The proportional gain. */
-          q15_t Ki;           /**< The integral gain. */
-          q15_t Kd;           /**< The derivative gain. */
-  } arm_pid_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 PID Control.
-   */
-  typedef struct
-  {
-          q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
-          q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
-          q31_t A2;            /**< The derived gain, A2 = Kd . */
-          q31_t state[3];      /**< The state array of length 3. */
-          q31_t Kp;            /**< The proportional gain. */
-          q31_t Ki;            /**< The integral gain. */
-          q31_t Kd;            /**< The derivative gain. */
-  } arm_pid_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point PID Control.
-   */
-  typedef struct
-  {
-          float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
-          float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
-          float32_t A2;          /**< The derived gain, A2 = Kd . */
-          float32_t state[3];    /**< The state array of length 3. */
-          float32_t Kp;          /**< The proportional gain. */
-          float32_t Ki;          /**< The integral gain. */
-          float32_t Kd;          /**< The derivative gain. */
-  } arm_pid_instance_f32;
-
-
-
-  /**
-   * @brief  Initialization function for the floating-point PID Control.
-   * @param[in,out] S               points to an instance of the PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_f32(
-        arm_pid_instance_f32 * S,
-        int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the floating-point PID Control.
-   * @param[in,out] S  is an instance of the floating-point PID Control structure
-   */
-  void arm_pid_reset_f32(
-        arm_pid_instance_f32 * S);
-
-
-  /**
-   * @brief  Initialization function for the Q31 PID Control.
-   * @param[in,out] S               points to an instance of the Q15 PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_q31(
-        arm_pid_instance_q31 * S,
-        int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the Q31 PID Control.
-   * @param[in,out] S   points to an instance of the Q31 PID Control structure
-   */
-
-  void arm_pid_reset_q31(
-        arm_pid_instance_q31 * S);
-
-
-  /**
-   * @brief  Initialization function for the Q15 PID Control.
-   * @param[in,out] S               points to an instance of the Q15 PID structure.
-   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
-   */
-  void arm_pid_init_q15(
-        arm_pid_instance_q15 * S,
-        int32_t resetStateFlag);
-
-
-  /**
-   * @brief  Reset function for the Q15 PID Control.
-   * @param[in,out] S  points to an instance of the q15 PID Control structure
-   */
-  void arm_pid_reset_q15(
-        arm_pid_instance_q15 * S);
-
-
-  /**
-   * @brief Instance structure for the floating-point Linear Interpolate function.
-   */
-  typedef struct
-  {
-          uint32_t nValues;           /**< nValues */
-          float32_t x1;               /**< x1 */
-          float32_t xSpacing;         /**< xSpacing */
-          float32_t *pYData;          /**< pointer to the table of Y values */
-  } arm_linear_interp_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point bilinear interpolation function.
-   */
-  typedef struct
-  {
-          uint16_t numRows;   /**< number of rows in the data table. */
-          uint16_t numCols;   /**< number of columns in the data table. */
-          float32_t *pData;   /**< points to the data table. */
-  } arm_bilinear_interp_instance_f32;
-
-   /**
-   * @brief Instance structure for the Q31 bilinear interpolation function.
-   */
-  typedef struct
-  {
-          uint16_t numRows;   /**< number of rows in the data table. */
-          uint16_t numCols;   /**< number of columns in the data table. */
-          q31_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q31;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-  typedef struct
-  {
-          uint16_t numRows;   /**< number of rows in the data table. */
-          uint16_t numCols;   /**< number of columns in the data table. */
-          q15_t *pData;       /**< points to the data table. */
-  } arm_bilinear_interp_instance_q15;
-
-   /**
-   * @brief Instance structure for the Q15 bilinear interpolation function.
-   */
-  typedef struct
-  {
-          uint16_t numRows;   /**< number of rows in the data table. */
-          uint16_t numCols;   /**< number of columns in the data table. */
-          q7_t *pData;        /**< points to the data table. */
-  } arm_bilinear_interp_instance_q7;
-
-
-  /**
-   * @brief Q7 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector multiplication.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_mult_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                 /**< length of the FFT. */
-          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    const q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */
-    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q15(
-        arm_cfft_radix2_instance_q15 * S,
-        uint16_t fftLen,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-        q15_t * pSrc);
-
-
-  /**
-   * @brief Instance structure for the Q15 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                 /**< length of the FFT. */
-          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    const q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q15;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q15(
-        arm_cfft_radix4_instance_q15 * S,
-        uint16_t fftLen,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-        q15_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                 /**< length of the FFT. */
-          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    const q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix2_instance_q31;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_q31(
-        arm_cfft_radix2_instance_q31 * S,
-        uint16_t fftLen,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-        q31_t * pSrc);
-
-  /**
-   * @brief Instance structure for the Q31 CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                 /**< length of the FFT. */
-          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    const q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
-          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-  } arm_cfft_radix4_instance_q31;
-
-/* Deprecated */
-  void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-        q31_t * pSrc);
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_q31(
-        arm_cfft_radix4_instance_q31 * S,
-        uint16_t fftLen,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                   /**< length of the FFT. */
-          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-          float32_t onebyfftLen;             /**< value of 1/fftLen. */
-  } arm_cfft_radix2_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix2_init_f32(
-        arm_cfft_radix2_instance_f32 * S,
-        uint16_t fftLen,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix2_f32(
-  const arm_cfft_radix2_instance_f32 * S,
-        float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                   /**< length of the FFT. */
-          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
-          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
-    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
-          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
-          float32_t onebyfftLen;             /**< value of 1/fftLen. */
-  } arm_cfft_radix4_instance_f32;
-
-/* Deprecated */
-  arm_status arm_cfft_radix4_init_f32(
-        arm_cfft_radix4_instance_f32 * S,
-        uint16_t fftLen,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag);
-
-/* Deprecated */
-  void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
-        float32_t * pSrc);
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                   /**< length of the FFT. */
-    const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-          uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q15;
-
-void arm_cfft_q15(
-    const arm_cfft_instance_q15 * S,
-          q15_t * p1,
-          uint8_t ifftFlag,
-          uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                   /**< length of the FFT. */
-    const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-          uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_q31;
-
-void arm_cfft_q31(
-    const arm_cfft_instance_q31 * S,
-          q31_t * p1,
-          uint8_t ifftFlag,
-          uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the floating-point CFFT/CIFFT function.
-   */
-  typedef struct
-  {
-          uint16_t fftLen;                   /**< length of the FFT. */
-    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
-    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
-          uint16_t bitRevLength;             /**< bit reversal table length. */
-  } arm_cfft_instance_f32;
-
-  void arm_cfft_f32(
-  const arm_cfft_instance_f32 * S,
-        float32_t * p1,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag);
-
-  /**
-   * @brief Instance structure for the Q15 RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-          uint32_t fftLenReal;                      /**< length of the real FFT. */
-          uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-          uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-          uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    const q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
-    const q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q15;
-
-  arm_status arm_rfft_init_q15(
-        arm_rfft_instance_q15 * S,
-        uint32_t fftLenReal,
-        uint32_t ifftFlagR,
-        uint32_t bitReverseFlag);
-
-  void arm_rfft_q15(
-  const arm_rfft_instance_q15 * S,
-        q15_t * pSrc,
-        q15_t * pDst);
-
-  /**
-   * @brief Instance structure for the Q31 RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-          uint32_t fftLenReal;                        /**< length of the real FFT. */
-          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-          uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    const q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
-    const q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
-    const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */
-  } arm_rfft_instance_q31;
-
-  arm_status arm_rfft_init_q31(
-        arm_rfft_instance_q31 * S,
-        uint32_t fftLenReal,
-        uint32_t ifftFlagR,
-        uint32_t bitReverseFlag);
-
-  void arm_rfft_q31(
-  const arm_rfft_instance_q31 * S,
-        q31_t * pSrc,
-        q31_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-  typedef struct
-  {
-          uint32_t fftLenReal;                        /**< length of the real FFT. */
-          uint16_t fftLenBy2;                         /**< length of the complex FFT. */
-          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
-          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
-          uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
-    const float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
-    const float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
-          arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
-  } arm_rfft_instance_f32;
-
-  arm_status arm_rfft_init_f32(
-        arm_rfft_instance_f32 * S,
-        arm_cfft_radix4_instance_f32 * S_CFFT,
-        uint32_t fftLenReal,
-        uint32_t ifftFlagR,
-        uint32_t bitReverseFlag);
-
-  void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-        float32_t * pSrc,
-        float32_t * pDst);
-
-  /**
-   * @brief Instance structure for the floating-point RFFT/RIFFT function.
-   */
-typedef struct
-  {
-          arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
-          uint16_t fftLenRFFT;             /**< length of the real sequence */
-    const float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
-  } arm_rfft_fast_instance_f32 ;
-
-arm_status arm_rfft_fast_init_f32 (
-         arm_rfft_fast_instance_f32 * S,
-         uint16_t fftLen);
-
-arm_status arm_rfft_32_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-arm_status arm_rfft_64_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-arm_status arm_rfft_128_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-arm_status arm_rfft_256_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-arm_status arm_rfft_512_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-arm_status arm_rfft_1024_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-arm_status arm_rfft_2048_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-arm_status arm_rfft_4096_fast_init_f32 ( arm_rfft_fast_instance_f32 * S );
-
-
-  void arm_rfft_fast_f32(
-        arm_rfft_fast_instance_f32 * S,
-        float32_t * p, float32_t * pOut,
-        uint8_t ifftFlag);
-
-  /**
-   * @brief Instance structure for the floating-point DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-          uint16_t N;                          /**< length of the DCT4. */
-          uint16_t Nby2;                       /**< half of the length of the DCT4. */
-          float32_t normalize;                 /**< normalizing factor. */
-    const float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
-    const float32_t *pCosFactor;               /**< points to the cosFactor table. */
-          arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
-          arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_f32;
-
-
-  /**
-   * @brief  Initialization function for the floating-point DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure.
-   * @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
-   */
-  arm_status arm_dct4_init_f32(
-        arm_dct4_instance_f32 * S,
-        arm_rfft_instance_f32 * S_RFFT,
-        arm_cfft_radix4_instance_f32 * S_CFFT,
-        uint16_t N,
-        uint16_t Nby2,
-        float32_t normalize);
-
-
-  /**
-   * @brief Processing function for the floating-point DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the floating-point DCT4/IDCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-        float32_t * pState,
-        float32_t * pInlineBuffer);
-
-
-  /**
-   * @brief Instance structure for the Q31 DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-          uint16_t N;                          /**< length of the DCT4. */
-          uint16_t Nby2;                       /**< half of the length of the DCT4. */
-          q31_t normalize;                     /**< normalizing factor. */
-    const q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    const q31_t *pCosFactor;                   /**< points to the cosFactor table. */
-          arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
-          arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q31;
-
-
-  /**
-   * @brief  Initialization function for the Q31 DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
-   * @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
-   */
-  arm_status arm_dct4_init_q31(
-        arm_dct4_instance_q31 * S,
-        arm_rfft_instance_q31 * S_RFFT,
-        arm_cfft_radix4_instance_q31 * S_CFFT,
-        uint16_t N,
-        uint16_t Nby2,
-        q31_t normalize);
-
-
-  /**
-   * @brief Processing function for the Q31 DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the Q31 DCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_q31(
-  const arm_dct4_instance_q31 * S,
-        q31_t * pState,
-        q31_t * pInlineBuffer);
-
-
-  /**
-   * @brief Instance structure for the Q15 DCT4/IDCT4 function.
-   */
-  typedef struct
-  {
-          uint16_t N;                          /**< length of the DCT4. */
-          uint16_t Nby2;                       /**< half of the length of the DCT4. */
-          q15_t normalize;                     /**< normalizing factor. */
-    const q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
-    const q15_t *pCosFactor;                   /**< points to the cosFactor table. */
-          arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
-          arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
-  } arm_dct4_instance_q15;
-
-
-  /**
-   * @brief  Initialization function for the Q15 DCT4/IDCT4.
-   * @param[in,out] S          points to an instance of Q15 DCT4/IDCT4 structure.
-   * @param[in]     S_RFFT     points to an instance of Q15 RFFT/RIFFT structure.
-   * @param[in]     S_CFFT     points to an instance of Q15 CFFT/CIFFT structure.
-   * @param[in]     N          length of the DCT4.
-   * @param[in]     Nby2       half of the length of the DCT4.
-   * @param[in]     normalize  normalizing factor.
-   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
-   */
-  arm_status arm_dct4_init_q15(
-        arm_dct4_instance_q15 * S,
-        arm_rfft_instance_q15 * S_RFFT,
-        arm_cfft_radix4_instance_q15 * S_CFFT,
-        uint16_t N,
-        uint16_t Nby2,
-        q15_t normalize);
-
-
-  /**
-   * @brief Processing function for the Q15 DCT4/IDCT4.
-   * @param[in]     S              points to an instance of the Q15 DCT4 structure.
-   * @param[in]     pState         points to state buffer.
-   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
-   */
-  void arm_dct4_q15(
-  const arm_dct4_instance_q15 * S,
-        q15_t * pState,
-        q15_t * pInlineBuffer);
-
-
-  /**
-   * @brief Floating-point vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector addition.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_add_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector subtraction.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_sub_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a floating-point vector by a scalar.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  scale      scale factor to be applied
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_scale_f32(
-  const float32_t * pSrc,
-        float32_t scale,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q7 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q7(
-  const q7_t * pSrc,
-        q7_t scaleFract,
-        int8_t shift,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q15 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q15(
-  const q15_t * pSrc,
-        q15_t scaleFract,
-        int8_t shift,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Multiplies a Q31 vector by a scalar.
-   * @param[in]  pSrc        points to the input vector
-   * @param[in]  scaleFract  fractional portion of the scale value
-   * @param[in]  shift       number of bits to shift the result by
-   * @param[out] pDst        points to the output vector
-   * @param[in]  blockSize   number of samples in the vector
-   */
-  void arm_scale_q31(
-  const q31_t * pSrc,
-        q31_t scaleFract,
-        int8_t shift,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q7 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q7(
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Floating-point vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q15 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Q31 vector absolute value.
-   * @param[in]  pSrc       points to the input buffer
-   * @param[out] pDst       points to the output buffer
-   * @param[in]  blockSize  number of samples in each vector
-   */
-  void arm_abs_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Dot product of floating-point vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        uint32_t blockSize,
-        float32_t * result);
-
-
-  /**
-   * @brief Dot product of Q7 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        uint32_t blockSize,
-        q31_t * result);
-
-
-  /**
-   * @brief Dot product of Q15 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        uint32_t blockSize,
-        q63_t * result);
-
-
-  /**
-   * @brief Dot product of Q31 vectors.
-   * @param[in]  pSrcA      points to the first input vector
-   * @param[in]  pSrcB      points to the second input vector
-   * @param[in]  blockSize  number of samples in each vector
-   * @param[out] result     output result returned here
-   */
-  void arm_dot_prod_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        uint32_t blockSize,
-        q63_t * result);
-
-
-  /**
-   * @brief  Shifts the elements of a Q7 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q7(
-  const q7_t * pSrc,
-        int8_t shiftBits,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Shifts the elements of a Q15 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q15(
-  const q15_t * pSrc,
-        int8_t shiftBits,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Shifts the elements of a Q31 vector a specified number of bits.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_shift_q31(
-  const q31_t * pSrc,
-        int8_t shiftBits,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a floating-point vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_f32(
-  const float32_t * pSrc,
-        float32_t offset,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q7 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q7(
-  const q7_t * pSrc,
-        q7_t offset,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q15 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q15(
-  const q15_t * pSrc,
-        q15_t offset,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Adds a constant offset to a Q31 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[in]  offset     is the offset to be added
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_offset_q31(
-  const q31_t * pSrc,
-        q31_t offset,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a floating-point vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q7 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q7(
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q15 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Negates the elements of a Q31 vector.
-   * @param[in]  pSrc       points to the input vector
-   * @param[out] pDst       points to the output vector
-   * @param[in]  blockSize  number of samples in the vector
-   */
-  void arm_negate_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a floating-point vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q7 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q7(
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q15 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Copies the elements of a Q31 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_copy_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a floating-point vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_f32(
-        float32_t value,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q7 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q7(
-        q7_t value,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q15 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q15(
-        q15_t value,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Fills a constant value into a Q31 vector.
-   * @param[in]  value      input value to be filled
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_fill_q31(
-        q31_t value,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-/**
- * @brief Convolution of floating-point sequences.
- * @param[in]  pSrcA    points to the first input sequence.
- * @param[in]  srcALen  length of the first input sequence.
- * @param[in]  pSrcB    points to the second input sequence.
- * @param[in]  srcBLen  length of the second input sequence.
- * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
- */
-  void arm_conv_f32(
-  const float32_t * pSrcA,
-        uint32_t srcALen,
-  const float32_t * pSrcB,
-        uint32_t srcBLen,
-        float32_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-   */
-  void arm_conv_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2);
-
-
-/**
- * @brief Convolution of Q15 sequences.
- * @param[in]  pSrcA    points to the first input sequence.
- * @param[in]  srcALen  length of the first input sequence.
- * @param[in]  pSrcB    points to the second input sequence.
- * @param[in]  srcBLen  length of the second input sequence.
- * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
- */
-  void arm_conv_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_fast_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-   */
-  void arm_conv_fast_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2);
-
-
-  /**
-   * @brief Convolution of Q31 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst);
-
-
-  /**
-   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_fast_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst);
-
-
-    /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
-   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   */
-  void arm_conv_opt_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2);
-
-
-  /**
-   * @brief Convolution of Q7 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
-   */
-  void arm_conv_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst);
-
-
-  /**
-   * @brief Partial convolution of floating-point sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_f32(
-  const float32_t * pSrcA,
-        uint32_t srcALen,
-  const float32_t * pSrcB,
-        uint32_t srcBLen,
-        float32_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints,
-        q15_t * pScratch1,
-        q15_t * pScratch2);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints,
-        q15_t * pScratch1,
-        q15_t * pScratch2);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_fast_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints);
-
-
-  /**
-   * @brief Partial convolution of Q7 sequences
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @param[in]  pScratch1   points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2   points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_opt_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints,
-        q15_t * pScratch1,
-        q15_t * pScratch2);
-
-
-/**
-   * @brief Partial convolution of Q7 sequences.
-   * @param[in]  pSrcA       points to the first input sequence.
-   * @param[in]  srcALen     length of the first input sequence.
-   * @param[in]  pSrcB       points to the second input sequence.
-   * @param[in]  srcBLen     length of the second input sequence.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  firstIndex  is the first output sample to start with.
-   * @param[in]  numPoints   is the number of output points to be computed.
-   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
-   */
-  arm_status arm_conv_partial_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR decimator.
-   */
-  typedef struct
-  {
-          uint8_t M;                  /**< decimation factor. */
-          uint16_t numTaps;           /**< number of coefficients in the filter. */
-    const q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-          q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR decimator.
-   */
-  typedef struct
-  {
-          uint8_t M;                  /**< decimation factor. */
-          uint16_t numTaps;           /**< number of coefficients in the filter. */
-    const q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
-          q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_q31;
-
-/**
-  @brief Instance structure for floating-point FIR decimator.
- */
-typedef struct
-  {
-          uint8_t M;                  /**< decimation factor. */
-          uint16_t numTaps;           /**< number of coefficients in the filter. */
-    const float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/
-          float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-  } arm_fir_decimate_instance_f32;
-
-
-/**
-  @brief         Processing function for floating-point FIR decimator.
-  @param[in]     S         points to an instance of the floating-point FIR decimator structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process
- */
-void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-/**
-  @brief         Initialization function for the floating-point FIR decimator.
-  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
-  @param[in]     numTaps    number of coefficients in the filter
-  @param[in]     M          decimation factor
-  @param[in]     pCoeffs    points to the filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     blockSize  number of input samples to process per call
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS      : Operation successful
-                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
- */
-arm_status arm_fir_decimate_init_f32(
-        arm_fir_decimate_instance_f32 * S,
-        uint16_t numTaps,
-        uint8_t M,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator.
-   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR decimator.
-   * @param[in,out] S          points to an instance of the Q15 FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * <code>blockSize</code> is not a multiple of <code>M</code>.
-   */
-  arm_status arm_fir_decimate_init_q15(
-        arm_fir_decimate_instance_q15 * S,
-        uint16_t numTaps,
-        uint8_t M,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator.
-   * @param[in]  S     points to an instance of the Q31 FIR decimator structure.
-   * @param[in]  pSrc  points to the block of input data.
-   * @param[out] pDst  points to the block of output data
-   * @param[in] blockSize number of input samples to process per call.
-   */
-  void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-  /**
-   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
-   * @param[in]  S          points to an instance of the Q31 FIR decimator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_decimate_fast_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR decimator.
-   * @param[in,out] S          points to an instance of the Q31 FIR decimator structure.
-   * @param[in]     numTaps    number of coefficients in the filter.
-   * @param[in]     M          decimation factor.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * <code>blockSize</code> is not a multiple of <code>M</code>.
-   */
-  arm_status arm_fir_decimate_init_q31(
-        arm_fir_decimate_instance_q31 * S,
-        uint16_t numTaps,
-        uint8_t M,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR interpolator.
-   */
-  typedef struct
-  {
-        uint8_t L;                      /**< upsample factor. */
-        uint16_t phaseLength;           /**< length of each polyphase filter component. */
-  const q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-        q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR interpolator.
-   */
-  typedef struct
-  {
-        uint8_t L;                      /**< upsample factor. */
-        uint16_t phaseLength;           /**< length of each polyphase filter component. */
-  const q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
-        q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
-  } arm_fir_interpolate_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR interpolator.
-   */
-  typedef struct
-  {
-        uint8_t L;                     /**< upsample factor. */
-        uint16_t phaseLength;          /**< length of each polyphase filter component. */
-  const float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */
-        float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
-  } arm_fir_interpolate_instance_f32;
-
-
-  /**
-   * @brief Processing function for the Q15 FIR interpolator.
-   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 FIR interpolator.
-   * @param[in,out] S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
-   */
-  arm_status arm_fir_interpolate_init_q15(
-        arm_fir_interpolate_instance_q15 * S,
-        uint8_t L,
-        uint16_t numTaps,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR interpolator.
-   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 FIR interpolator.
-   * @param[in,out] S          points to an instance of the Q31 FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
-   */
-  arm_status arm_fir_interpolate_init_q31(
-        arm_fir_interpolate_instance_q31 * S,
-        uint8_t L,
-        uint16_t numTaps,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR interpolator.
-   * @param[in]  S          points to an instance of the floating-point FIR interpolator structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of input samples to process per call.
-   */
-  void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point FIR interpolator.
-   * @param[in,out] S          points to an instance of the floating-point FIR interpolator structure.
-   * @param[in]     L          upsample factor.
-   * @param[in]     numTaps    number of filter coefficients in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficient buffer.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     blockSize  number of input samples to process per call.
-   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
-   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
-   */
-  arm_status arm_fir_interpolate_init_f32(
-        arm_fir_interpolate_instance_f32 * S,
-        uint8_t L,
-        uint16_t numTaps,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the high precision Q31 Biquad cascade filter.
-   */
-  typedef struct
-  {
-          uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-          q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    const q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
-          uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
-  } arm_biquad_cas_df1_32x64_ins_q31;
-
-
-  /**
-   * @param[in]  S          points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-        q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @param[in,out] S          points to an instance of the high precision Q31 Biquad cascade filter structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format
-   */
-  void arm_biquad_cas_df1_32x64_init_q31(
-        arm_biquad_cas_df1_32x64_ins_q31 * S,
-        uint8_t numStages,
-  const q31_t * pCoeffs,
-        q63_t * pState,
-        uint8_t postShift);
-
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
-    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_stereo_df2T_instance_f32;
-
-  /**
-   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
-   */
-  typedef struct
-  {
-          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
-          float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
-          float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
-  } arm_biquad_cascade_df2T_instance_f64;
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_stereo_df2T_f32(
-  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in]  S          points to an instance of the filter data structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_biquad_cascade_df2T_f64(
-  const arm_biquad_cascade_df2T_instance_f64 * S,
-        float64_t * pSrc,
-        float64_t * pDst,
-        uint32_t blockSize);
-
-
-#if defined(ARM_MATH_NEON) 
-void arm_biquad_cascade_df2T_compute_coefs_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs);
-#endif
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df2T_init_f32(
-        arm_biquad_cascade_df2T_instance_f32 * S,
-        uint8_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_stereo_df2T_init_f32(
-        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-        uint8_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState);
-
-
-  /**
-   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-   * @param[in,out] S          points to an instance of the filter data structure.
-   * @param[in]     numStages  number of 2nd order stages in the filter.
-   * @param[in]     pCoeffs    points to the filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   */
-  void arm_biquad_cascade_df2T_init_f64(
-        arm_biquad_cascade_df2T_instance_f64 * S,
-        uint8_t numStages,
-        float64_t * pCoeffs,
-        float64_t * pState);
-
-
-  /**
-   * @brief Instance structure for the Q15 FIR lattice filter.
-   */
-  typedef struct
-  {
-          uint16_t numStages;                  /**< number of filter stages. */
-          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    const q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 FIR lattice filter.
-   */
-  typedef struct
-  {
-          uint16_t numStages;                  /**< number of filter stages. */
-          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
-    const q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point FIR lattice filter.
-   */
-  typedef struct
-  {
-          uint16_t numStages;                  /**< number of filter stages. */
-          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
-    const float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
-  } arm_fir_lattice_instance_f32;
-
-
-  /**
-   * @brief Initialization function for the Q15 FIR lattice filter.
-   * @param[in] S          points to an instance of the Q15 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages.
-   */
-  void arm_fir_lattice_init_q15(
-        arm_fir_lattice_instance_q15 * S,
-        uint16_t numStages,
-  const q15_t * pCoeffs,
-        q15_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q15 FIR lattice filter.
-   * @param[in]  S          points to an instance of the Q15 FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the Q31 FIR lattice filter.
-   * @param[in] S          points to an instance of the Q31 FIR lattice structure.
-   * @param[in] numStages  number of filter stages.
-   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
-   * @param[in] pState     points to the state buffer.   The array is of length numStages.
-   */
-  void arm_fir_lattice_init_q31(
-        arm_fir_lattice_instance_q31 * S,
-        uint16_t numStages,
-  const q31_t * pCoeffs,
-        q31_t * pState);
-
-
-  /**
-   * @brief Processing function for the Q31 FIR lattice filter.
-   * @param[in]  S          points to an instance of the Q31 FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the floating-point FIR lattice filter.
- * @param[in] S          points to an instance of the floating-point FIR lattice structure.
- * @param[in] numStages  number of filter stages.
- * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
- * @param[in] pState     points to the state buffer.  The array is of length numStages.
- */
-  void arm_fir_lattice_init_f32(
-        arm_fir_lattice_instance_f32 * S,
-        uint16_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState);
-
-
-  /**
-   * @brief Processing function for the floating-point FIR lattice filter.
-   * @param[in]  S          points to an instance of the floating-point FIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 IIR lattice filter.
-   */
-  typedef struct
-  {
-          uint16_t numStages;                  /**< number of stages in the filter. */
-          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-          q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-          q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q31 IIR lattice filter.
-   */
-  typedef struct
-  {
-          uint16_t numStages;                  /**< number of stages in the filter. */
-          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
-          q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
-          q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_q31;
-
-  /**
-   * @brief Instance structure for the floating-point IIR lattice filter.
-   */
-  typedef struct
-  {
-          uint16_t numStages;                  /**< number of stages in the filter. */
-          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */
-          float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */
-          float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */
-  } arm_iir_lattice_instance_f32;
-
-
-  /**
-   * @brief Processing function for the floating-point IIR lattice filter.
-   * @param[in]  S          points to an instance of the floating-point IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the floating-point IIR lattice filter.
-   * @param[in] S          points to an instance of the floating-point IIR lattice structure.
-   * @param[in] numStages  number of stages in the filter.
-   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize-1.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_init_f32(
-        arm_iir_lattice_instance_f32 * S,
-        uint16_t numStages,
-        float32_t * pkCoeffs,
-        float32_t * pvCoeffs,
-        float32_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 IIR lattice filter.
-   * @param[in]  S          points to an instance of the Q31 IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for the Q31 IIR lattice filter.
-   * @param[in] S          points to an instance of the Q31 IIR lattice structure.
-   * @param[in] numStages  number of stages in the filter.
-   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
-   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
-   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_init_q31(
-        arm_iir_lattice_instance_q31 * S,
-        uint16_t numStages,
-        q31_t * pkCoeffs,
-        q31_t * pvCoeffs,
-        q31_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 IIR lattice filter.
-   * @param[in]  S          points to an instance of the Q15 IIR lattice structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[out] pDst       points to the block of output data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-/**
- * @brief Initialization function for the Q15 IIR lattice filter.
- * @param[in] S          points to an instance of the fixed-point Q15 IIR lattice structure.
- * @param[in] numStages  number of stages in the filter.
- * @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages.
- * @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1.
- * @param[in] pState     points to state buffer.  The array is of length numStages+blockSize.
- * @param[in] blockSize  number of samples to process per call.
- */
-  void arm_iir_lattice_init_q15(
-        arm_iir_lattice_instance_q15 * S,
-        uint16_t numStages,
-        q15_t * pkCoeffs,
-        q15_t * pvCoeffs,
-        q15_t * pState,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the floating-point LMS filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;    /**< number of coefficients in the filter. */
-          float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-          float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
-          float32_t mu;        /**< step size that controls filter coefficient updates. */
-  } arm_lms_instance_f32;
-
-
-  /**
-   * @brief Processing function for floating-point LMS filter.
-   * @param[in]  S          points to an instance of the floating-point LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pRef,
-        float32_t * pOut,
-        float32_t * pErr,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for floating-point LMS filter.
-   * @param[in] S          points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to the coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_lms_init_f32(
-        arm_lms_instance_f32 * S,
-        uint16_t numTaps,
-        float32_t * pCoeffs,
-        float32_t * pState,
-        float32_t mu,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q15 LMS filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;    /**< number of coefficients in the filter. */
-          q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-          q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-          q15_t mu;            /**< step size that controls filter coefficient updates. */
-          uint32_t postShift;  /**< bit shift applied to coefficients. */
-  } arm_lms_instance_q15;
-
-
-  /**
-   * @brief Initialization function for the Q15 LMS filter.
-   * @param[in] S          points to an instance of the Q15 LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to the coefficient buffer.
-   * @param[in] pState     points to the state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_init_q15(
-        arm_lms_instance_q15 * S,
-        uint16_t numTaps,
-        q15_t * pCoeffs,
-        q15_t * pState,
-        q15_t mu,
-        uint32_t blockSize,
-        uint32_t postShift);
-
-
-  /**
-   * @brief Processing function for Q15 LMS filter.
-   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pRef,
-        q15_t * pOut,
-        q15_t * pErr,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 LMS filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;    /**< number of coefficients in the filter. */
-          q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-          q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
-          q31_t mu;            /**< step size that controls filter coefficient updates. */
-          uint32_t postShift;  /**< bit shift applied to coefficients. */
-  } arm_lms_instance_q31;
-
-
-  /**
-   * @brief Processing function for Q31 LMS filter.
-   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pRef,
-        q31_t * pOut,
-        q31_t * pErr,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q31 LMS filter.
-   * @param[in] S          points to an instance of the Q31 LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_init_q31(
-        arm_lms_instance_q31 * S,
-        uint16_t numTaps,
-        q31_t * pCoeffs,
-        q31_t * pState,
-        q31_t mu,
-        uint32_t blockSize,
-        uint32_t postShift);
-
-
-  /**
-   * @brief Instance structure for the floating-point normalized LMS filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;     /**< number of coefficients in the filter. */
-          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-          float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
-          float32_t mu;         /**< step size that control filter coefficient updates. */
-          float32_t energy;     /**< saves previous frame energy. */
-          float32_t x0;         /**< saves previous input sample. */
-  } arm_lms_norm_instance_f32;
-
-
-  /**
-   * @brief Processing function for floating-point normalized LMS filter.
-   * @param[in]  S          points to an instance of the floating-point normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_f32(
-        arm_lms_norm_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pRef,
-        float32_t * pOut,
-        float32_t * pErr,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for floating-point normalized LMS filter.
-   * @param[in] S          points to an instance of the floating-point LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   */
-  void arm_lms_norm_init_f32(
-        arm_lms_norm_instance_f32 * S,
-        uint16_t numTaps,
-        float32_t * pCoeffs,
-        float32_t * pState,
-        float32_t mu,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Instance structure for the Q31 normalized LMS filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;     /**< number of coefficients in the filter. */
-          q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-          q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-          q31_t mu;             /**< step size that controls filter coefficient updates. */
-          uint8_t postShift;    /**< bit shift applied to coefficients. */
-    const q31_t *recipTable;    /**< points to the reciprocal initial value table. */
-          q31_t energy;         /**< saves previous frame energy. */
-          q31_t x0;             /**< saves previous input sample. */
-  } arm_lms_norm_instance_q31;
-
-
-  /**
-   * @brief Processing function for Q31 normalized LMS filter.
-   * @param[in]  S          points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_q31(
-        arm_lms_norm_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pRef,
-        q31_t * pOut,
-        q31_t * pErr,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q31 normalized LMS filter.
-   * @param[in] S          points to an instance of the Q31 normalized LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_norm_init_q31(
-        arm_lms_norm_instance_q31 * S,
-        uint16_t numTaps,
-        q31_t * pCoeffs,
-        q31_t * pState,
-        q31_t mu,
-        uint32_t blockSize,
-        uint8_t postShift);
-
-
-  /**
-   * @brief Instance structure for the Q15 normalized LMS filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;     /**< Number of coefficients in the filter. */
-          q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
-          q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
-          q15_t mu;             /**< step size that controls filter coefficient updates. */
-          uint8_t postShift;    /**< bit shift applied to coefficients. */
-    const q15_t *recipTable;    /**< Points to the reciprocal initial value table. */
-          q15_t energy;         /**< saves previous frame energy. */
-          q15_t x0;             /**< saves previous input sample. */
-  } arm_lms_norm_instance_q15;
-
-
-  /**
-   * @brief Processing function for Q15 normalized LMS filter.
-   * @param[in]  S          points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in]  pSrc       points to the block of input data.
-   * @param[in]  pRef       points to the block of reference data.
-   * @param[out] pOut       points to the block of output data.
-   * @param[out] pErr       points to the block of error data.
-   * @param[in]  blockSize  number of samples to process.
-   */
-  void arm_lms_norm_q15(
-        arm_lms_norm_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pRef,
-        q15_t * pOut,
-        q15_t * pErr,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Initialization function for Q15 normalized LMS filter.
-   * @param[in] S          points to an instance of the Q15 normalized LMS filter structure.
-   * @param[in] numTaps    number of filter coefficients.
-   * @param[in] pCoeffs    points to coefficient buffer.
-   * @param[in] pState     points to state buffer.
-   * @param[in] mu         step size that controls filter coefficient updates.
-   * @param[in] blockSize  number of samples to process.
-   * @param[in] postShift  bit shift applied to coefficients.
-   */
-  void arm_lms_norm_init_q15(
-        arm_lms_norm_instance_q15 * S,
-        uint16_t numTaps,
-        q15_t * pCoeffs,
-        q15_t * pState,
-        q15_t mu,
-        uint32_t blockSize,
-        uint8_t postShift);
-
-
-  /**
-   * @brief Correlation of floating-point sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_f32(
-  const float32_t * pSrcA,
-        uint32_t srcALen,
-  const float32_t * pSrcB,
-        uint32_t srcBLen,
-        float32_t * pDst);
-
-
-/**
- @brief Correlation of Q15 sequences
- @param[in]  pSrcA     points to the first input sequence
- @param[in]  srcALen   length of the first input sequence
- @param[in]  pSrcB     points to the second input sequence
- @param[in]  srcBLen   length of the second input sequence
- @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
- @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-*/
-void arm_correlate_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch);
-
-
-/**
-  @brief Correlation of Q15 sequences.
-  @param[in]  pSrcA    points to the first input sequence
-  @param[in]  srcALen  length of the first input sequence
-  @param[in]  pSrcB    points to the second input sequence
-  @param[in]  srcBLen  length of the second input sequence
-  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
- */
-  void arm_correlate_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst);
-
-
-/**
-  @brief         Correlation of Q15 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @return        none
- */
-void arm_correlate_fast_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst);
-
-
-/**
-  @brief Correlation of Q15 sequences (fast version).
-  @param[in]  pSrcA     points to the first input sequence.
-  @param[in]  srcALen   length of the first input sequence.
-  @param[in]  pSrcB     points to the second input sequence.
-  @param[in]  srcBLen   length of the second input sequence.
-  @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-  @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
- */
-void arm_correlate_fast_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch);
-
-
-  /**
-   * @brief Correlation of Q31 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst);
-
-
-/**
-  @brief Correlation of Q31 sequences (fast version).
-  @param[in]  pSrcA    points to the first input sequence
-  @param[in]  srcALen  length of the first input sequence
-  @param[in]  pSrcB    points to the second input sequence
-  @param[in]  srcBLen  length of the second input sequence
-  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
- */
-void arm_correlate_fast_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst);
-
-
- /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in]  pSrcA      points to the first input sequence.
-   * @param[in]  srcALen    length of the first input sequence.
-   * @param[in]  pSrcB      points to the second input sequence.
-   * @param[in]  srcBLen    length of the second input sequence.
-   * @param[out] pDst       points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-   */
-  void arm_correlate_opt_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2);
-
-
-  /**
-   * @brief Correlation of Q7 sequences.
-   * @param[in]  pSrcA    points to the first input sequence.
-   * @param[in]  srcALen  length of the first input sequence.
-   * @param[in]  pSrcB    points to the second input sequence.
-   * @param[in]  srcBLen  length of the second input sequence.
-   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
-   */
-  void arm_correlate_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst);
-
-
-  /**
-   * @brief Instance structure for the floating-point sparse FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;             /**< number of coefficients in the filter. */
-          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-          float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    const float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
-          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_f32;
-
-  /**
-   * @brief Instance structure for the Q31 sparse FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;             /**< number of coefficients in the filter. */
-          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-          q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    const q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q31;
-
-  /**
-   * @brief Instance structure for the Q15 sparse FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;             /**< number of coefficients in the filter. */
-          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-          q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    const q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
-          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q15;
-
-  /**
-   * @brief Instance structure for the Q7 sparse FIR filter.
-   */
-  typedef struct
-  {
-          uint16_t numTaps;             /**< number of coefficients in the filter. */
-          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
-          q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
-    const q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
-          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
-          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
-  } arm_fir_sparse_instance_q7;
-
-
-  /**
-   * @brief Processing function for the floating-point sparse FIR filter.
-   * @param[in]  S           points to an instance of the floating-point sparse FIR structure.
-   * @param[in]  pSrc        points to the block of input data.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   */
-  void arm_fir_sparse_f32(
-        arm_fir_sparse_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        float32_t * pScratchIn,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the floating-point sparse FIR filter.
-   * @param[in,out] S          points to an instance of the floating-point sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_f32(
-        arm_fir_sparse_instance_f32 * S,
-        uint16_t numTaps,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q31 sparse FIR filter.
-   * @param[in]  S           points to an instance of the Q31 sparse FIR structure.
-   * @param[in]  pSrc        points to the block of input data.
-   * @param[out] pDst        points to the block of output data
-   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize   number of input samples to process per call.
-   */
-  void arm_fir_sparse_q31(
-        arm_fir_sparse_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        q31_t * pScratchIn,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q31 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q31 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q31(
-        arm_fir_sparse_instance_q31 * S,
-        uint16_t numTaps,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q15 sparse FIR filter.
-   * @param[in]  S            points to an instance of the Q15 sparse FIR structure.
-   * @param[in]  pSrc         points to the block of input data.
-   * @param[out] pDst         points to the block of output data
-   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
-   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   */
-  void arm_fir_sparse_q15(
-        arm_fir_sparse_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        q15_t * pScratchIn,
-        q31_t * pScratchOut,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q15 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q15 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q15(
-        arm_fir_sparse_instance_q15 * S,
-        uint16_t numTaps,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Processing function for the Q7 sparse FIR filter.
-   * @param[in]  S            points to an instance of the Q7 sparse FIR structure.
-   * @param[in]  pSrc         points to the block of input data.
-   * @param[out] pDst         points to the block of output data
-   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
-   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
-   * @param[in]  blockSize    number of input samples to process per call.
-   */
-  void arm_fir_sparse_q7(
-        arm_fir_sparse_instance_q7 * S,
-  const q7_t * pSrc,
-        q7_t * pDst,
-        q7_t * pScratchIn,
-        q31_t * pScratchOut,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Initialization function for the Q7 sparse FIR filter.
-   * @param[in,out] S          points to an instance of the Q7 sparse FIR structure.
-   * @param[in]     numTaps    number of nonzero coefficients in the filter.
-   * @param[in]     pCoeffs    points to the array of filter coefficients.
-   * @param[in]     pState     points to the state buffer.
-   * @param[in]     pTapDelay  points to the array of offset times.
-   * @param[in]     maxDelay   maximum offset time supported.
-   * @param[in]     blockSize  number of samples that will be processed per block.
-   */
-  void arm_fir_sparse_init_q7(
-        arm_fir_sparse_instance_q7 * S,
-        uint16_t numTaps,
-  const q7_t * pCoeffs,
-        q7_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Floating-point sin_cos function.
-   * @param[in]  theta   input value in degrees
-   * @param[out] pSinVal  points to the processed sine output.
-   * @param[out] pCosVal  points to the processed cos output.
-   */
-  void arm_sin_cos_f32(
-        float32_t theta,
-        float32_t * pSinVal,
-        float32_t * pCosVal);
-
-
-  /**
-   * @brief  Q31 sin_cos function.
-   * @param[in]  theta    scaled input value in degrees
-   * @param[out] pSinVal  points to the processed sine output.
-   * @param[out] pCosVal  points to the processed cosine output.
-   */
-  void arm_sin_cos_q31(
-        q31_t theta,
-        q31_t * pSinVal,
-        q31_t * pCosVal);
-
-
-  /**
-   * @brief  Floating-point complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t numSamples);
-
-  /**
-   * @brief  Q31 complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex conjugate.
-   * @param[in]  pSrc        points to the input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_conj_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex magnitude squared
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_squared_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t numSamples);
-
-
- /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup PID PID Motor Control
-   *
-   * A Proportional Integral Derivative (PID) controller is a generic feedback control
-   * loop mechanism widely used in industrial control systems.
-   * A PID controller is the most commonly used type of feedback controller.
-   *
-   * This set of functions implements (PID) controllers
-   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
-   * of data and each call to the function returns a single processed value.
-   * <code>S</code> points to an instance of the PID control data structure.  <code>in</code>
-   * is the input sample value. The functions return the output value.
-   *
-   * \par Algorithm:
-   * <pre>
-   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
-   *    A0 = Kp + Ki + Kd
-   *    A1 = (-Kp ) - (2 * Kd )
-   *    A2 = Kd
-   * </pre>
-   *
-   * \par
-   * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
-   *
-   * \par
-   * \image html PID.gif "Proportional Integral Derivative Controller"
-   *
-   * \par
-   * The PID controller calculates an "error" value as the difference between
-   * the measured output and the reference input.
-   * The controller attempts to minimize the error by adjusting the process control inputs.
-   * The proportional value determines the reaction to the current error,
-   * the integral value determines the reaction based on the sum of recent errors,
-   * and the derivative value determines the reaction based on the rate at which the error has been changing.
-   *
-   * \par Instance Structure
-   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
-   * A separate instance structure must be defined for each PID Controller.
-   * There are separate instance structure declarations for each of the 3 supported data types.
-   *
-   * \par Reset Functions
-   * There is also an associated reset function for each data type which clears the state array.
-   *
-   * \par Initialization Functions
-   * There is also an associated initialization function for each data type.
-   * The initialization function performs the following operations:
-   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
-   * - Zeros out the values in the state buffer.
-   *
-   * \par
-   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
-   *
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the fixed-point versions of the PID Controller functions.
-   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup PID
-   * @{
-   */
-
-  /**
-   * @brief         Process function for the floating-point PID Control.
-   * @param[in,out] S   is an instance of the floating-point PID Control structure
-   * @param[in]     in  input sample to process
-   * @return        processed output sample.
-   */
-  __STATIC_FORCEINLINE float32_t arm_pid_f32(
-  arm_pid_instance_f32 * S,
-  float32_t in)
-  {
-    float32_t out;
-
-    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
-    out = (S->A0 * in) +
-      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-
-  }
-
-/**
-  @brief         Process function for the Q31 PID Control.
-  @param[in,out] S  points to an instance of the Q31 PID Control structure
-  @param[in]     in  input sample to process
-  @return        processed output sample.
-
-  \par Scaling and Overflow Behavior
-         The function is implemented using an internal 64-bit accumulator.
-         The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-         Thus, if the accumulator result overflows it wraps around rather than clip.
-         In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
-         After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
- */
-__STATIC_FORCEINLINE q31_t arm_pid_q31(
-  arm_pid_instance_q31 * S,
-  q31_t in)
-  {
-    q63_t acc;
-    q31_t out;
-
-    /* acc = A0 * x[n]  */
-    acc = (q63_t) S->A0 * in;
-
-    /* acc += A1 * x[n-1] */
-    acc += (q63_t) S->A1 * S->state[0];
-
-    /* acc += A2 * x[n-2]  */
-    acc += (q63_t) S->A2 * S->state[1];
-
-    /* convert output to 1.31 format to add y[n-1] */
-    out = (q31_t) (acc >> 31U);
-
-    /* out += y[n-1] */
-    out += S->state[2];
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-  }
-
-
-/**
-  @brief         Process function for the Q15 PID Control.
-  @param[in,out] S   points to an instance of the Q15 PID Control structure
-  @param[in]     in  input sample to process
-  @return        processed output sample.
-
-  \par Scaling and Overflow Behavior
-         The function is implemented using a 64-bit internal accumulator.
-         Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-         The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-         There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-         After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-         Lastly, the accumulator is saturated to yield a result in 1.15 format.
- */
-__STATIC_FORCEINLINE q15_t arm_pid_q15(
-  arm_pid_instance_q15 * S,
-  q15_t in)
-  {
-    q63_t acc;
-    q15_t out;
-
-#if defined (ARM_MATH_DSP)
-    /* Implementation of PID controller */
-
-    /* acc = A0 * x[n]  */
-    acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc);
-#else
-    /* acc = A0 * x[n]  */
-    acc = ((q31_t) S->A0) * in;
-
-    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
-    acc += (q31_t) S->A1 * S->state[0];
-    acc += (q31_t) S->A2 * S->state[1];
-#endif
-
-    /* acc += y[n-1] */
-    acc += (q31_t) S->state[2] << 15;
-
-    /* saturate the output */
-    out = (q15_t) (__SSAT((acc >> 15), 16));
-
-    /* Update state */
-    S->state[1] = S->state[0];
-    S->state[0] = in;
-    S->state[2] = out;
-
-    /* return to application */
-    return (out);
-  }
-
-  /**
-   * @} end of PID group
-   */
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  src   points to the instance of the input floating-point matrix structure.
-   * @param[out] dst   points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-  arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * src,
-  arm_matrix_instance_f32 * dst);
-
-
-  /**
-   * @brief Floating-point matrix inverse.
-   * @param[in]  src   points to the instance of the input floating-point matrix structure.
-   * @param[out] dst   points to the instance of the output floating-point matrix structure.
-   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
-   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
-   */
-  arm_status arm_mat_inverse_f64(
-  const arm_matrix_instance_f64 * src,
-  arm_matrix_instance_f64 * dst);
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup clarke Vector Clarke Transform
-   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
-   * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
-   * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
-   * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
-   * \image html clarke.gif Stator current space vector and its components in (a,b).
-   * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
-   * can be calculated using only <code>Ia</code> and <code>Ib</code>.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeFormula.gif
-   * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
-   * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup clarke
-   * @{
-   */
-
-  /**
-   *
-   * @brief  Floating-point Clarke transform
-   * @param[in]  Ia       input three-phase coordinate <code>a</code>
-   * @param[in]  Ib       input three-phase coordinate <code>b</code>
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   * @return        none
-   */
-  __STATIC_FORCEINLINE void arm_clarke_f32(
-  float32_t Ia,
-  float32_t Ib,
-  float32_t * pIalpha,
-  float32_t * pIbeta)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
-    *pIbeta = ((float32_t) 0.57735026919 * Ia + (float32_t) 1.15470053838 * Ib);
-  }
-
-
-/**
-  @brief  Clarke transform for Q31 version
-  @param[in]  Ia       input three-phase coordinate <code>a</code>
-  @param[in]  Ib       input three-phase coordinate <code>b</code>
-  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-  @return     none
-
-  \par Scaling and Overflow Behavior
-         The function is implemented using an internal 32-bit accumulator.
-         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-         There is saturation on the addition, hence there is no risk of overflow.
- */
-__STATIC_FORCEINLINE void arm_clarke_q31(
-  q31_t Ia,
-  q31_t Ib,
-  q31_t * pIalpha,
-  q31_t * pIbeta)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIalpha from Ia by equation pIalpha = Ia */
-    *pIalpha = Ia;
-
-    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
-
-    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
-    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
-
-    /* pIbeta is calculated by adding the intermediate products */
-    *pIbeta = __QADD(product1, product2);
-  }
-
-  /**
-   * @} end of clarke group
-   */
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_clarke Vector Inverse Clarke Transform
-   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html clarkeInvFormula.gif
-   * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
-   * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Clarke transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_clarke
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Clarke transform
-   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
-   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
-   * @param[out] pIa     points to output three-phase coordinate <code>a</code>
-   * @param[out] pIb     points to output three-phase coordinate <code>b</code>
-   * @return     none
-   */
-  __STATIC_FORCEINLINE void arm_inv_clarke_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pIa,
-  float32_t * pIb)
-  {
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
-    *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
-  }
-
-
-/**
-  @brief  Inverse Clarke transform for Q31 version
-  @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
-  @param[in]  Ibeta   input two-phase orthogonal vector axis beta
-  @param[out] pIa     points to output three-phase coordinate <code>a</code>
-  @param[out] pIb     points to output three-phase coordinate <code>b</code>
-  @return     none
-
-  \par Scaling and Overflow Behavior
-         The function is implemented using an internal 32-bit accumulator.
-         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-         There is saturation on the subtraction, hence there is no risk of overflow.
- */
-__STATIC_FORCEINLINE void arm_inv_clarke_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pIa,
-  q31_t * pIb)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-
-    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
-    *pIa = Ialpha;
-
-    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
-
-    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
-
-    /* pIb is calculated by subtracting the products */
-    *pIb = __QSUB(product2, product1);
-  }
-
-  /**
-   * @} end of inv_clarke group
-   */
-
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup park Vector Park Transform
-   *
-   * Forward Park transform converts the input two-coordinate vector to flux and torque components.
-   * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
-   * from the stationary to the moving reference frame and control the spatial relationship between
-   * the stator vector current and rotor flux vector.
-   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
-   * current vector and the relationship from the two reference frames:
-   * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkFormula.gif
-   * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
-   * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup park
-   * @{
-   */
-
-  /**
-   * @brief Floating-point Park transform
-   * @param[in]  Ialpha  input two-phase vector coordinate alpha
-   * @param[in]  Ibeta   input two-phase vector coordinate beta
-   * @param[out] pId     points to output   rotor reference frame d
-   * @param[out] pIq     points to output   rotor reference frame q
-   * @param[in]  sinVal  sine value of rotation angle theta
-   * @param[in]  cosVal  cosine value of rotation angle theta
-   * @return     none
-   *
-   * The function implements the forward Park transform.
-   *
-   */
-  __STATIC_FORCEINLINE void arm_park_f32(
-  float32_t Ialpha,
-  float32_t Ibeta,
-  float32_t * pId,
-  float32_t * pIq,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
-    *pId = Ialpha * cosVal + Ibeta * sinVal;
-
-    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
-    *pIq = -Ialpha * sinVal + Ibeta * cosVal;
-  }
-
-
-/**
-  @brief  Park transform for Q31 version
-  @param[in]  Ialpha  input two-phase vector coordinate alpha
-  @param[in]  Ibeta   input two-phase vector coordinate beta
-  @param[out] pId     points to output rotor reference frame d
-  @param[out] pIq     points to output rotor reference frame q
-  @param[in]  sinVal  sine value of rotation angle theta
-  @param[in]  cosVal  cosine value of rotation angle theta
-  @return     none
-
-  \par Scaling and Overflow Behavior
-         The function is implemented using an internal 32-bit accumulator.
-         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-         There is saturation on the addition and subtraction, hence there is no risk of overflow.
- */
-__STATIC_FORCEINLINE void arm_park_q31(
-  q31_t Ialpha,
-  q31_t Ibeta,
-  q31_t * pId,
-  q31_t * pIq,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Ialpha * cosVal) */
-    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * sinVal) */
-    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Ialpha * sinVal) */
-    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Ibeta * cosVal) */
-    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
-
-    /* Calculate pId by adding the two intermediate products 1 and 2 */
-    *pId = __QADD(product1, product2);
-
-    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
-    *pIq = __QSUB(product4, product3);
-  }
-
-  /**
-   * @} end of park group
-   */
-
-
-  /**
-   * @ingroup groupController
-   */
-
-  /**
-   * @defgroup inv_park Vector Inverse Park transform
-   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
-   *
-   * The function operates on a single sample of data and each call to the function returns the processed output.
-   * The library provides separate functions for Q31 and floating-point data types.
-   * \par Algorithm
-   * \image html parkInvFormula.gif
-   * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
-   * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
-   * cosine and sine values of theta (rotor flux position).
-   * \par Fixed-Point Behavior
-   * Care must be taken when using the Q31 version of the Park transform.
-   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
-   * Refer to the function specific documentation below for usage guidelines.
-   */
-
-  /**
-   * @addtogroup inv_park
-   * @{
-   */
-
-   /**
-   * @brief  Floating-point Inverse Park transform
-   * @param[in]  Id       input coordinate of rotor reference frame d
-   * @param[in]  Iq       input coordinate of rotor reference frame q
-   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-   * @param[in]  sinVal   sine value of rotation angle theta
-   * @param[in]  cosVal   cosine value of rotation angle theta
-   * @return     none
-   */
-  __STATIC_FORCEINLINE void arm_inv_park_f32(
-  float32_t Id,
-  float32_t Iq,
-  float32_t * pIalpha,
-  float32_t * pIbeta,
-  float32_t sinVal,
-  float32_t cosVal)
-  {
-    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
-    *pIalpha = Id * cosVal - Iq * sinVal;
-
-    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
-    *pIbeta = Id * sinVal + Iq * cosVal;
-  }
-
-
-/**
-  @brief  Inverse Park transform for   Q31 version
-  @param[in]  Id       input coordinate of rotor reference frame d
-  @param[in]  Iq       input coordinate of rotor reference frame q
-  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
-  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
-  @param[in]  sinVal   sine value of rotation angle theta
-  @param[in]  cosVal   cosine value of rotation angle theta
-  @return     none
-
-  @par Scaling and Overflow Behavior
-         The function is implemented using an internal 32-bit accumulator.
-         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
-         There is saturation on the addition, hence there is no risk of overflow.
- */
-__STATIC_FORCEINLINE void arm_inv_park_q31(
-  q31_t Id,
-  q31_t Iq,
-  q31_t * pIalpha,
-  q31_t * pIbeta,
-  q31_t sinVal,
-  q31_t cosVal)
-  {
-    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
-    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
-
-    /* Intermediate product is calculated by (Id * cosVal) */
-    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * sinVal) */
-    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
-
-
-    /* Intermediate product is calculated by (Id * sinVal) */
-    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
-
-    /* Intermediate product is calculated by (Iq * cosVal) */
-    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
-
-    /* Calculate pIalpha by using the two intermediate products 1 and 2 */
-    *pIalpha = __QSUB(product1, product2);
-
-    /* Calculate pIbeta by using the two intermediate products 3 and 4 */
-    *pIbeta = __QADD(product4, product3);
-  }
-
-  /**
-   * @} end of Inverse park group
-   */
-
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup LinearInterpolate Linear Interpolation
-   *
-   * Linear interpolation is a method of curve fitting using linear polynomials.
-   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
-   *
-   * \par
-   * \image html LinearInterp.gif "Linear interpolation"
-   *
-   * \par
-   * A  Linear Interpolate function calculates an output value(y), for the input(x)
-   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
-   *
-   * \par Algorithm:
-   * <pre>
-   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
-   *       where x0, x1 are nearest values of input x
-   *             y0, y1 are nearest values to output y
-   * </pre>
-   *
-   * \par
-   * This set of functions implements Linear interpolation process
-   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
-   * sample of data and each call to the function returns a single processed value.
-   * <code>S</code> points to an instance of the Linear Interpolate function data structure.
-   * <code>x</code> is the input sample value. The functions returns the output value.
-   *
-   * \par
-   * if x is outside of the table boundary, Linear interpolation returns first value of the table
-   * if x is below input range and returns last value of table if x is above range.
-   */
-
-  /**
-   * @addtogroup LinearInterpolate
-   * @{
-   */
-
-  /**
-   * @brief  Process function for the floating-point Linear Interpolation Function.
-   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
-   * @param[in]     x  input sample to process
-   * @return y processed output sample.
-   *
-   */
-  __STATIC_FORCEINLINE float32_t arm_linear_interp_f32(
-  arm_linear_interp_instance_f32 * S,
-  float32_t x)
-  {
-    float32_t y;
-    float32_t x0, x1;                            /* Nearest input values */
-    float32_t y0, y1;                            /* Nearest output values */
-    float32_t xSpacing = S->xSpacing;            /* spacing between input values */
-    int32_t i;                                   /* Index variable */
-    float32_t *pYData = S->pYData;               /* pointer to output table */
-
-    /* Calculation of index */
-    i = (int32_t) ((x - S->x1) / xSpacing);
-
-    if (i < 0)
-    {
-      /* Iniatilize output for below specified range as least output value of table */
-      y = pYData[0];
-    }
-    else if ((uint32_t)i >= S->nValues)
-    {
-      /* Iniatilize output for above specified range as last output value of table */
-      y = pYData[S->nValues - 1];
-    }
-    else
-    {
-      /* Calculation of nearest input values */
-      x0 = S->x1 +  i      * xSpacing;
-      x1 = S->x1 + (i + 1) * xSpacing;
-
-      /* Read of nearest output values */
-      y0 = pYData[i];
-      y1 = pYData[i + 1];
-
-      /* Calculation of output */
-      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
-
-    }
-
-    /* returns output value */
-    return (y);
-  }
-
-
-   /**
-   *
-   * @brief  Process function for the Q31 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q31 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-  __STATIC_FORCEINLINE q31_t arm_linear_interp_q31(
-  q31_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q31_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & (q31_t)0xFFF00000) >> 20);
-
-    if (index >= (int32_t)(nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else if (index < 0)
-    {
-      return (pYData[0]);
-    }
-    else
-    {
-      /* 20 bits for the fractional part */
-      /* shift left by 11 to keep fract in 1.31 format */
-      fract = (x & 0x000FFFFF) << 11;
-
-      /* Read two nearest output values from the index in 1.31(q31) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
-
-      /* Calculation of y0 * (1-fract) and y is in 2.30 format */
-      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
-
-      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
-      y += ((q31_t) (((q63_t) y1 * fract) >> 32));
-
-      /* Convert y to 1.31 format */
-      return (y << 1U);
-    }
-  }
-
-
-  /**
-   *
-   * @brief  Process function for the Q15 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q15 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   *
-   */
-  __STATIC_FORCEINLINE q15_t arm_linear_interp_q15(
-  q15_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q63_t y;                                     /* output */
-    q15_t y0, y1;                                /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    int32_t index;                               /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    index = ((x & (int32_t)0xFFF00000) >> 20);
-
-    if (index >= (int32_t)(nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else if (index < 0)
-    {
-      return (pYData[0]);
-    }
-    else
-    {
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
-
-      /* Read two nearest output values from the index */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
-
-      /* Calculation of y0 * (1-fract) and y is in 13.35 format */
-      y = ((q63_t) y0 * (0xFFFFF - fract));
-
-      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
-      y += ((q63_t) y1 * (fract));
-
-      /* convert y to 1.15 format */
-      return (q15_t) (y >> 20);
-    }
-  }
-
-
-  /**
-   *
-   * @brief  Process function for the Q7 Linear Interpolation Function.
-   * @param[in] pYData   pointer to Q7 Linear Interpolation table
-   * @param[in] x        input sample to process
-   * @param[in] nValues  number of table values
-   * @return y processed output sample.
-   *
-   * \par
-   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
-   * This function can support maximum of table size 2^12.
-   */
-  __STATIC_FORCEINLINE q7_t arm_linear_interp_q7(
-  q7_t * pYData,
-  q31_t x,
-  uint32_t nValues)
-  {
-    q31_t y;                                     /* output */
-    q7_t y0, y1;                                 /* Nearest output values */
-    q31_t fract;                                 /* fractional part */
-    uint32_t index;                              /* Index to read nearest output values */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    if (x < 0)
-    {
-      return (pYData[0]);
-    }
-    index = (x >> 20) & 0xfff;
-
-    if (index >= (nValues - 1))
-    {
-      return (pYData[nValues - 1]);
-    }
-    else
-    {
-      /* 20 bits for the fractional part */
-      /* fract is in 12.20 format */
-      fract = (x & 0x000FFFFF);
-
-      /* Read two nearest output values from the index and are in 1.7(q7) format */
-      y0 = pYData[index];
-      y1 = pYData[index + 1];
-
-      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
-      y = ((y0 * (0xFFFFF - fract)));
-
-      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
-      y += (y1 * fract);
-
-      /* convert y to 1.7(q7) format */
-      return (q7_t) (y >> 20);
-     }
-  }
-
-  /**
-   * @} end of LinearInterpolate group
-   */
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for floating-point data.
-   * @param[in] x  input value in radians.
-   * @return  sin(x).
-   */
-  float32_t arm_sin_f32(
-  float32_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q31 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  sin(x).
-   */
-  q31_t arm_sin_q31(
-  q31_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric sine function for Q15 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  sin(x).
-   */
-  q15_t arm_sin_q15(
-  q15_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
-   * @param[in] x  input value in radians.
-   * @return  cos(x).
-   */
-  float32_t arm_cos_f32(
-  float32_t x);
-
-
-  /**
-   * @brief Fast approximation to the trigonometric cosine function for Q31 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  cos(x).
-   */
-  q31_t arm_cos_q31(
-  q31_t x);
-
-
-  /**
-   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
-   * @param[in] x  Scaled input value in radians.
-   * @return  cos(x).
-   */
-  q15_t arm_cos_q15(
-  q15_t x);
-
-
-  /**
-   * @ingroup groupFastMath
-   */
-
-
-  /**
-   * @defgroup SQRT Square Root
-   *
-   * Computes the square root of a number.
-   * There are separate functions for Q15, Q31, and floating-point data types.
-   * The square root function is computed using the Newton-Raphson algorithm.
-   * This is an iterative algorithm of the form:
-   * <pre>
-   *      x1 = x0 - f(x0)/f'(x0)
-   * </pre>
-   * where <code>x1</code> is the current estimate,
-   * <code>x0</code> is the previous estimate, and
-   * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
-   * For the square root function, the algorithm reduces to:
-   * <pre>
-   *     x0 = in/2                         [initial guess]
-   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
-   * </pre>
-   */
-
-
-  /**
-   * @addtogroup SQRT
-   * @{
-   */
-
-/**
-  @brief         Floating-point square root function.
-  @param[in]     in    input value
-  @param[out]    pOut  square root of input value
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : input value is positive
-                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
- */
-__STATIC_FORCEINLINE arm_status arm_sqrt_f32(
-  float32_t in,
-  float32_t * pOut)
-  {
-    if (in >= 0.0f)
-    {
-#if defined ( __CC_ARM )
-  #if defined __TARGET_FPU_VFP
-      *pOut = __sqrtf(in);
-  #else
-      *pOut = sqrtf(in);
-  #endif
-
-#elif defined ( __ICCARM__ )
-  #if defined __ARMVFP__
-      __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
-  #else
-      *pOut = sqrtf(in);
-  #endif
-
-#else
-      *pOut = sqrtf(in);
-#endif
-
-      return (ARM_MATH_SUCCESS);
-    }
-    else
-    {
-      *pOut = 0.0f;
-      return (ARM_MATH_ARGUMENT_ERROR);
-    }
-  }
-
-
-/**
-  @brief         Q31 square root function.
-  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
-  @param[out]    pOut  points to square root of input value
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : input value is positive
-                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
- */
-arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut);
-
-
-/**
-  @brief         Q15 square root function.
-  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
-  @param[out]    pOut  points to square root of input value
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : input value is positive
-                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
- */
-arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut);
-
-  /**
-   * @brief  Vector Floating-point square root function.
-   * @param[in]  pIn   input vector.
-   * @param[out] pOut  vector of square roots of input elements.
-   * @param[in]  len   length of input vector.
-   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
-   * <code>in</code> is negative value and returns zero output for negative values.
-   */
-  void arm_vsqrt_f32(
-  float32_t * pIn,
-  float32_t * pOut,
-  uint16_t len);
-
-  void arm_vsqrt_q31(
-  q31_t * pIn,
-  q31_t * pOut,
-  uint16_t len);
-
-  void arm_vsqrt_q15(
-  q15_t * pIn,
-  q15_t * pOut,
-  uint16_t len);
-
-  /**
-   * @} end of SQRT group
-   */
-
-
-  /**
-   * @brief floating-point Circular write function.
-   */
-  __STATIC_FORCEINLINE void arm_circularWrite_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const int32_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if (wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-
-  /**
-   * @brief floating-point Circular Read function.
-   */
-  __STATIC_FORCEINLINE void arm_circularRead_f32(
-  int32_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  int32_t * dst,
-  int32_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t rOffset;
-    int32_t* dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-    dst_end = dst_base + dst_length;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if (dst == dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update rOffset.  Watch out for positive and negative value  */
-      rOffset += bufferInc;
-
-      if (rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief Q15 Circular write function.
-   */
-  __STATIC_FORCEINLINE void arm_circularWrite_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q15_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if (wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-  /**
-   * @brief Q15 Circular Read function.
-   */
-  __STATIC_FORCEINLINE void arm_circularRead_q15(
-  q15_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q15_t * dst,
-  q15_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset;
-    q15_t* dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-
-    dst_end = dst_base + dst_length;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if (dst == dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
-
-      if (rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief Q7 Circular write function.
-   */
-  __STATIC_FORCEINLINE void arm_circularWrite_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  uint16_t * writeOffset,
-  int32_t bufferInc,
-  const q7_t * src,
-  int32_t srcInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0U;
-    int32_t wOffset;
-
-    /* Copy the value of Index pointer that points
-     * to the current location where the input samples to be copied */
-    wOffset = *writeOffset;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
-    {
-      /* copy the input sample to the circular buffer */
-      circBuffer[wOffset] = *src;
-
-      /* Update the input pointer */
-      src += srcInc;
-
-      /* Circularly update wOffset.  Watch out for positive and negative value */
-      wOffset += bufferInc;
-      if (wOffset >= L)
-        wOffset -= L;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *writeOffset = (uint16_t)wOffset;
-  }
-
-
-  /**
-   * @brief Q7 Circular Read function.
-   */
-  __STATIC_FORCEINLINE void arm_circularRead_q7(
-  q7_t * circBuffer,
-  int32_t L,
-  int32_t * readOffset,
-  int32_t bufferInc,
-  q7_t * dst,
-  q7_t * dst_base,
-  int32_t dst_length,
-  int32_t dstInc,
-  uint32_t blockSize)
-  {
-    uint32_t i = 0;
-    int32_t rOffset;
-    q7_t* dst_end;
-
-    /* Copy the value of Index pointer that points
-     * to the current location from where the input samples to be read */
-    rOffset = *readOffset;
-
-    dst_end = dst_base + dst_length;
-
-    /* Loop over the blockSize */
-    i = blockSize;
-
-    while (i > 0U)
-    {
-      /* copy the sample from the circular buffer to the destination buffer */
-      *dst = circBuffer[rOffset];
-
-      /* Update the input pointer */
-      dst += dstInc;
-
-      if (dst == dst_end)
-      {
-        dst = dst_base;
-      }
-
-      /* Circularly update rOffset.  Watch out for positive and negative value */
-      rOffset += bufferInc;
-
-      if (rOffset >= L)
-      {
-        rOffset -= L;
-      }
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Update the index pointer */
-    *readOffset = rOffset;
-  }
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q63_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q63_t * pResult);
-
-
-  /**
-   * @brief  Sum of the squares of the elements of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_power_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q7_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult);
-
-
-  /**
-   * @brief  Mean value of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_mean_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult);
-
-
-  /**
-   * @brief  Variance of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_var_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult);
-
-
-  /**
-   * @brief  Root Mean Square of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_rms_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult);
-
-
-  /**
-   * @brief  Standard deviation of the elements of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output value.
-   */
-  void arm_std_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult);
-
-
-  /**
-   * @brief  Floating-point complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex magnitude
-   * @param[in]  pSrc        points to the complex input vector
-   * @param[out] pDst        points to the real output vector
-   * @param[in]  numSamples  number of complex samples in the input vector
-   */
-  void arm_cmplx_mag_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q15 complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        uint32_t numSamples,
-        q31_t * realResult,
-        q31_t * imagResult);
-
-
-  /**
-   * @brief  Q31 complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        uint32_t numSamples,
-        q63_t * realResult,
-        q63_t * imagResult);
-
-
-  /**
-   * @brief  Floating-point complex dot product
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   * @param[out] realResult  real part of the result returned here
-   * @param[out] imagResult  imaginary part of the result returned here
-   */
-  void arm_cmplx_dot_prod_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        uint32_t numSamples,
-        float32_t * realResult,
-        float32_t * imagResult);
-
-
-  /**
-   * @brief  Q15 complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_q15(
-  const q15_t * pSrcCmplx,
-  const q15_t * pSrcReal,
-        q15_t * pCmplxDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_q31(
-  const q31_t * pSrcCmplx,
-  const q31_t * pSrcReal,
-        q31_t * pCmplxDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex-by-real multiplication
-   * @param[in]  pSrcCmplx   points to the complex input vector
-   * @param[in]  pSrcReal    points to the real input vector
-   * @param[out] pCmplxDst   points to the complex output vector
-   * @param[in]  numSamples  number of samples in each vector
-   */
-  void arm_cmplx_mult_real_f32(
-  const float32_t * pSrcCmplx,
-  const float32_t * pSrcReal,
-        float32_t * pCmplxDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Minimum value of a Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] result     is output pointer
-   * @param[in]  index      is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q7_t * result,
-        uint32_t * index);
-
-
-  /**
-   * @brief  Minimum value of a Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult,
-        uint32_t * pIndex);
-
-
-  /**
-   * @brief  Minimum value of a Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult,
-        uint32_t * pIndex);
-
-
-  /**
-   * @brief  Minimum value of a floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[in]  blockSize  is the number of samples to process
-   * @param[out] pResult    is output pointer
-   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
-   */
-  void arm_min_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult,
-        uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q7 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q7_t * pResult,
-        uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q15 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult,
-        uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a Q31 vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult,
-        uint32_t * pIndex);
-
-
-/**
- * @brief Maximum value of a floating-point vector.
- * @param[in]  pSrc       points to the input buffer
- * @param[in]  blockSize  length of the input vector
- * @param[out] pResult    maximum value returned here
- * @param[out] pIndex     index of maximum value returned here
- */
-  void arm_max_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult,
-        uint32_t * pIndex);
-
-
-  /**
-   * @brief  Q15 complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Q31 complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief  Floating-point complex-by-complex multiplication
-   * @param[in]  pSrcA       points to the first input vector
-   * @param[in]  pSrcB       points to the second input vector
-   * @param[out] pDst        points to the output vector
-   * @param[in]  numSamples  number of complex samples in each vector
-   */
-  void arm_cmplx_mult_cmplx_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t numSamples);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q31 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q31 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q31(
-  const float32_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q15 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q15 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q15(
-  const float32_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief Converts the elements of the floating-point vector to Q7 vector.
-   * @param[in]  pSrc       points to the floating-point input vector
-   * @param[out] pDst       points to the Q7 output vector
-   * @param[in]  blockSize  length of the input vector
-   */
-  void arm_float_to_q7(
-  const float32_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_float(
-  const q31_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q15 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_q15(
-  const q31_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q31 vector to Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q31_to_q7(
-  const q31_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_float(
-  const q15_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q31 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_q31(
-  const q15_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q15 vector to Q7 vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q15_to_q7(
-  const q15_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to floating-point vector.
-   * @param[in]  pSrc       is input pointer
-   * @param[out] pDst       is output pointer
-   * @param[in]  blockSize  is the number of samples to process
-   */
-  void arm_q7_to_float(
-  const q7_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q31 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q31(
-  const q7_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @brief  Converts the elements of the Q7 vector to Q15 vector.
-   * @param[in]  pSrc       input pointer
-   * @param[out] pDst       output pointer
-   * @param[in]  blockSize  number of samples to process
-   */
-  void arm_q7_to_q15(
-  const q7_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize);
-
-
-  /**
-   * @ingroup groupInterpolation
-   */
-
-  /**
-   * @defgroup BilinearInterpolate Bilinear Interpolation
-   *
-   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
-   * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
-   * determines values between the grid points.
-   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
-   * Bilinear interpolation is often used in image processing to rescale images.
-   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
-   *
-   * <b>Algorithm</b>
-   * \par
-   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
-   * For floating-point, the instance structure is defined as:
-   * <pre>
-   *   typedef struct
-   *   {
-   *     uint16_t numRows;
-   *     uint16_t numCols;
-   *     float32_t *pData;
-   * } arm_bilinear_interp_instance_f32;
-   * </pre>
-   *
-   * \par
-   * where <code>numRows</code> specifies the number of rows in the table;
-   * <code>numCols</code> specifies the number of columns in the table;
-   * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
-   * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
-   * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
-   *
-   * \par
-   * Let <code>(x, y)</code> specify the desired interpolation point.  Then define:
-   * <pre>
-   *     XF = floor(x)
-   *     YF = floor(y)
-   * </pre>
-   * \par
-   * The interpolated output point is computed as:
-   * <pre>
-   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
-   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
-   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
-   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
-   * </pre>
-   * Note that the coordinates (x, y) contain integer and fractional components.
-   * The integer components specify which portion of the table to use while the
-   * fractional components control the interpolation processor.
-   *
-   * \par
-   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
-   */
-
-
-  /**
-   * @addtogroup BilinearInterpolate
-   * @{
-   */
-
-  /**
-  * @brief  Floating-point bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate.
-  * @param[in]     Y  interpolation coordinate.
-  * @return out interpolated value.
-  */
-  __STATIC_FORCEINLINE float32_t arm_bilinear_interp_f32(
-  const arm_bilinear_interp_instance_f32 * S,
-  float32_t X,
-  float32_t Y)
-  {
-    float32_t out;
-    float32_t f00, f01, f10, f11;
-    float32_t *pData = S->pData;
-    int32_t xIndex, yIndex, index;
-    float32_t xdiff, ydiff;
-    float32_t b1, b2, b3, b4;
-
-    xIndex = (int32_t) X;
-    yIndex = (int32_t) Y;
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (xIndex < 0 || xIndex > (S->numRows - 1) || yIndex < 0 || yIndex > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* Calculation of index for two nearest points in X-direction */
-    index = (xIndex - 1) + (yIndex - 1) * S->numCols;
-
-
-    /* Read two nearest points in X-direction */
-    f00 = pData[index];
-    f01 = pData[index + 1];
-
-    /* Calculation of index for two nearest points in Y-direction */
-    index = (xIndex - 1) + (yIndex) * S->numCols;
-
-
-    /* Read two nearest points in Y-direction */
-    f10 = pData[index];
-    f11 = pData[index + 1];
-
-    /* Calculation of intermediate values */
-    b1 = f00;
-    b2 = f01 - f00;
-    b3 = f10 - f00;
-    b4 = f00 - f01 - f10 + f11;
-
-    /* Calculation of fractional part in X */
-    xdiff = X - xIndex;
-
-    /* Calculation of fractional part in Y */
-    ydiff = Y - yIndex;
-
-    /* Calculation of bi-linear interpolated output */
-    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
-
-    /* return to application */
-    return (out);
-  }
-
-
-  /**
-  * @brief  Q31 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  __STATIC_FORCEINLINE q31_t arm_bilinear_interp_q31(
-  arm_bilinear_interp_instance_q31 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q31_t out;                                   /* Temporary output */
-    q31_t acc = 0;                               /* output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q31_t x1, x2, y1, y2;                        /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q31_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* shift left xfract by 11 to keep 1.31 format */
-    xfract = (X & 0x000FFFFF) << 11U;
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[(rI) + (int32_t)nCols * (cI)    ];
-    x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* shift left yfract by 11 to keep 1.31 format */
-    yfract = (Y & 0x000FFFFF) << 11U;
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[(rI) + (int32_t)nCols * (cI + 1)    ];
-    y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
-    out = ((q31_t) (((q63_t) x1  * (0x7FFFFFFF - xfract)) >> 32));
-    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
-
-    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
-
-    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
-    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
-    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
-
-    /* Convert acc to 1.31(q31) format */
-    return ((q31_t)(acc << 2));
-  }
-
-
-  /**
-  * @brief  Q15 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  __STATIC_FORCEINLINE q15_t arm_bilinear_interp_q15(
-  arm_bilinear_interp_instance_q15 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q15_t x1, x2, y1, y2;                        /* Nearest output values */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    int32_t rI, cI;                              /* Row and column indices */
-    q15_t *pYData = S->pData;                    /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
-    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & 0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
-    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
-
-    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
-    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
-    out = (q31_t) (((q63_t) x1 * (0xFFFFF - xfract)) >> 4U);
-    acc = ((q63_t) out * (0xFFFFF - yfract));
-
-    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) x2 * (0xFFFFF - yfract)) >> 4U);
-    acc += ((q63_t) out * (xfract));
-
-    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y1 * (0xFFFFF - xfract)) >> 4U);
-    acc += ((q63_t) out * (yfract));
-
-    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
-    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4U);
-    acc += ((q63_t) out * (yfract));
-
-    /* acc is in 13.51 format and down shift acc by 36 times */
-    /* Convert out to 1.15 format */
-    return ((q15_t)(acc >> 36));
-  }
-
-
-  /**
-  * @brief  Q7 bilinear interpolation.
-  * @param[in,out] S  points to an instance of the interpolation structure.
-  * @param[in]     X  interpolation coordinate in 12.20 format.
-  * @param[in]     Y  interpolation coordinate in 12.20 format.
-  * @return out interpolated value.
-  */
-  __STATIC_FORCEINLINE q7_t arm_bilinear_interp_q7(
-  arm_bilinear_interp_instance_q7 * S,
-  q31_t X,
-  q31_t Y)
-  {
-    q63_t acc = 0;                               /* output */
-    q31_t out;                                   /* Temporary output */
-    q31_t xfract, yfract;                        /* X, Y fractional parts */
-    q7_t x1, x2, y1, y2;                         /* Nearest output values */
-    int32_t rI, cI;                              /* Row and column indices */
-    q7_t *pYData = S->pData;                     /* pointer to output table values */
-    uint32_t nCols = S->numCols;                 /* num of rows */
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    rI = ((X & (q31_t)0xFFF00000) >> 20);
-
-    /* Input is in 12.20 format */
-    /* 12 bits for the table index */
-    /* Index value calculation */
-    cI = ((Y & (q31_t)0xFFF00000) >> 20);
-
-    /* Care taken for table outside boundary */
-    /* Returns zero output when values are outside table boundary */
-    if (rI < 0 || rI > (S->numRows - 1) || cI < 0 || cI > (S->numCols - 1))
-    {
-      return (0);
-    }
-
-    /* 20 bits for the fractional part */
-    /* xfract should be in 12.20 format */
-    xfract = (X & (q31_t)0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
-    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
-
-    /* 20 bits for the fractional part */
-    /* yfract should be in 12.20 format */
-    yfract = (Y & (q31_t)0x000FFFFF);
-
-    /* Read two nearest output values from the index */
-    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
-    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
-
-    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
-    out = ((x1 * (0xFFFFF - xfract)));
-    acc = (((q63_t) out * (0xFFFFF - yfract)));
-
-    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
-    out = ((x2 * (0xFFFFF - yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y1 * (0xFFFFF - xfract)));
-    acc += (((q63_t) out * (yfract)));
-
-    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
-    out = ((y2 * (yfract)));
-    acc += (((q63_t) out * (xfract)));
-
-    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
-    return ((q7_t)(acc >> 40));
-  }
-
-  /**
-   * @} end of BilinearInterpolate group
-   */
-
-
-/* SMMLAR */
-#define multAcc_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-/* SMMLSR */
-#define multSub_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
-
-/* SMMULR */
-#define mult_32x32_keep32_R(a, x, y) \
-    a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
-
-/* SMMLA */
-#define multAcc_32x32_keep32(a, x, y) \
-    a += (q31_t) (((q63_t) x * y) >> 32)
-
-/* SMMLS */
-#define multSub_32x32_keep32(a, x, y) \
-    a -= (q31_t) (((q63_t) x * y) >> 32)
-
-/* SMMUL */
-#define mult_32x32_keep32(a, x, y) \
-    a = (q31_t) (((q63_t) x * y ) >> 32)
-
-
-#if   defined ( __CC_ARM )
-  /* Enter low optimization region - place directly above function definition */
-  #if defined( __ARM_ARCH_7EM__ )
-    #define LOW_OPTIMIZATION_ENTER \
-       _Pragma ("push")         \
-       _Pragma ("O1")
-  #else
-    #define LOW_OPTIMIZATION_ENTER
-  #endif
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #if defined ( __ARM_ARCH_7EM__ )
-    #define LOW_OPTIMIZATION_EXIT \
-       _Pragma ("pop")
-  #else
-    #define LOW_OPTIMIZATION_EXIT
-  #endif
-
-  /* Enter low optimization region - place directly above function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined (__ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined ( __GNUC__ )
-  #define LOW_OPTIMIZATION_ENTER \
-       __attribute__(( optimize("-O1") ))
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined ( __ICCARM__ )
-  /* Enter low optimization region - place directly above function definition */
-  #if defined ( __ARM_ARCH_7EM__ )
-    #define LOW_OPTIMIZATION_ENTER \
-       _Pragma ("optimize=low")
-  #else
-    #define LOW_OPTIMIZATION_ENTER
-  #endif
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #define LOW_OPTIMIZATION_EXIT
-
-  /* Enter low optimization region - place directly above function definition */
-  #if defined ( __ARM_ARCH_7EM__ )
-    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
-       _Pragma ("optimize=low")
-  #else
-    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #endif
-
-  /* Exit low optimization region - place directly after end of function definition */
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined ( __TI_ARM__ )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined ( __CSMC__ )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#elif defined ( __TASKING__ )
-  #define LOW_OPTIMIZATION_ENTER
-  #define LOW_OPTIMIZATION_EXIT
-  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
-  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
-
-#endif
-
-
-#ifdef   __cplusplus
-}
-#endif
-
-/* Compiler specific diagnostic adjustment */
-#if   defined ( __CC_ARM )
-
-#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
-
-#elif defined ( __GNUC__ )
-#pragma GCC diagnostic pop
-
-#elif defined ( __ICCARM__ )
-
-#elif defined ( __TI_ARM__ )
-
-#elif defined ( __CSMC__ )
-
-#elif defined ( __TASKING__ )
-
-#elif defined ( _MSC_VER )
-
-#else
-  #error Unknown compiler
-#endif
-
-#endif /* _ARM_MATH_H */
-
-/**
- *
- * End of file.
- */
+/******************************************************************************
+ * @file     arm_math.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+   \mainpage CMSIS DSP Software Library
+   *
+   * \section intro Introduction
+   *
+   * This user manual describes the CMSIS DSP software library,
+   * a suite of common signal processing functions for use on Cortex-M and Cortex-A processor 
+   * based devices.
+   *
+   * The library is divided into a number of functions each covering a specific category:
+   * - Basic math functions
+   * - Fast math functions
+   * - Complex math functions
+   * - Filtering functions
+   * - Matrix functions
+   * - Transform functions
+   * - Motor control functions
+   * - Statistical functions
+   * - Support functions
+   * - Interpolation functions
+   * - Support Vector Machine functions (SVM)
+   * - Bayes classifier functions
+   * - Distance functions
+   * - Quaternion functions
+   *
+   * The library has generally separate functions for operating on 8-bit integers, 16-bit integers,
+   * 32-bit integer and 32-bit floating-point values.
+   *
+   * The library is providing vectorized versions of most algorthms for Helium
+   * and of most f32 algorithms for Neon.
+   *
+   * When using a vectorized version, provide a little bit of padding after the end of
+   * a buffer (3 words) because the vectorized code may read a little bit after the end
+   * of a buffer. You don't have to modify your buffers but just ensure that the
+   * end of buffer + padding is not outside of a memory region.
+   *
+   * \section using Using the Library
+   *
+   * The library is released in source form. It is strongly advised to compile the library using -Ofast to
+   * have the best performances.
+   *
+   * The library functions are declared in the public file <code>arm_math.h</code> which is placed in the <code>Include</code> folder.
+   * Simply include this file. If you don't want to include everything, you can also rely
+   * on headers in Include/dsp folder and use only what you need.
+   *
+   * \section example Examples
+   *
+   * The library ships with a number of examples which demonstrate how to use the library functions.
+   *
+   * \section toolchain Toolchain Support
+   *
+   * The library is now tested on Fast Models building with cmake.
+   * Core M0, M4, M7, M33, M55, A32 are tested.
+   *
+   *
+   * \section preprocessor Preprocessor Macros
+   *
+   * Each library project have different preprocessor macros.
+   *
+   * - ARM_MATH_BIG_ENDIAN:
+   *
+   * Define macro ARM_MATH_BIG_ENDIAN to build the library for big endian targets. By default library builds for little endian targets.
+   *
+   * - ARM_MATH_MATRIX_CHECK:
+   *
+   * Define macro ARM_MATH_MATRIX_CHECK for checking on the input and output sizes of matrices
+   *
+   * - ARM_MATH_ROUNDING:
+   *
+   * Define macro ARM_MATH_ROUNDING for rounding on support functions
+   *
+   * - ARM_MATH_LOOPUNROLL:
+   *
+   * Define macro ARM_MATH_LOOPUNROLL to enable manual loop unrolling in DSP functions
+   *
+   * - ARM_MATH_NEON:
+   *
+   * Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
+   * It is not enabled by default when Neon is available because performances are 
+   * dependent on the compiler and target architecture.
+   *
+   * - ARM_MATH_NEON_EXPERIMENTAL:
+   *
+   * Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of 
+   * of some DSP functions. Experimental Neon versions currently do not have better
+   * performances than the scalar versions.
+   *
+   * - ARM_MATH_HELIUM:
+   *
+   * It implies the flags ARM_MATH_MVEF and ARM_MATH_MVEI and ARM_MATH_MVE_FLOAT16.
+   *
+   * - ARM_MATH_HELIUM_EXPERIMENTAL:
+   *
+   * Only taken into account when ARM_MATH_MVEF, ARM_MATH_MVEI or ARM_MATH_MVE_FLOAT16 are defined.
+   * Enable some vector versions which may have worse performance than scalar
+   * depending on the core / compiler configuration.
+   *
+   * - ARM_MATH_MVEF:
+   *
+   * Select Helium versions of the f32 algorithms.
+   * It implies ARM_MATH_FLOAT16 and ARM_MATH_MVEI.
+   *
+   * - ARM_MATH_MVEI:
+   *
+   * Select Helium versions of the int and fixed point algorithms.
+   *
+   * - ARM_MATH_MVE_FLOAT16:
+   *
+   * MVE Float16 implementations of some algorithms (Requires MVE extension).
+   *
+   * - DISABLEFLOAT16:
+   *
+   * Disable float16 algorithms when __fp16 is not supported for a
+   * specific compiler / core configuration.
+   * This is only valid for scalar. When vector architecture is
+   * supporting f16 then it can't be disabled.
+   *
+   * - ARM_MATH_AUTOVECTORIZE:
+   *
+   * With Helium or Neon, disable the use of vectorized code with C intrinsics
+   * and use pure C instead. The vectorization is then done by the compiler.
+   *
+   * <hr>
+   * \section pack CMSIS-DSP in ARM::CMSIS Pack
+   *
+   * The following files relevant to CMSIS-DSP are present in the <b>ARM::CMSIS</b> Pack directories:
+   * |File/Folder                      |Content                                                                 |
+   * |---------------------------------|------------------------------------------------------------------------|
+   * |\b CMSIS\\Documentation\\DSP     | This documentation                                                     |
+   * |\b CMSIS\\DSP\\Examples          | Example projects demonstrating the usage of the library functions      |
+   * |\b CMSIS\\DSP\\Include           | DSP_Lib include files for using and building the lib
+   * |\b CMSIS\\DSP\\PrivateInclude    | DSP_Lib private include files for building the lib                                               |
+   * |\b CMSIS\\DSP\\Lib               | DSP_Lib binaries                                                       |
+   * |\b CMSIS\\DSP\\Source            | DSP_Lib source files                                                   |
+   *
+   * <hr>
+   * \section rev Revision History of CMSIS-DSP
+   * Please refer to \ref ChangeLog_pg.
+   */
+
+
+
+
+
+
+
+
+
+
+
+/**
+ * @defgroup groupExamples Examples
+ */
+
+
+
+
+
+#ifndef _ARM_MATH_H
+#define _ARM_MATH_H
+
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/basic_math_functions.h"  
+#include "dsp/interpolation_functions.h"
+#include "dsp/bayes_functions.h"
+#include "dsp/matrix_functions.h"
+#include "dsp/complex_math_functions.h"
+#include "dsp/statistics_functions.h"
+#include "dsp/controller_functions.h"
+#include "dsp/support_functions.h"
+#include "dsp/distance_functions.h"
+#include "dsp/svm_functions.h"
+#include "dsp/fast_math_functions.h"
+#include "dsp/transform_functions.h"
+#include "dsp/filtering_functions.h"
+#include "dsp/quaternion_math_functions.h"
+
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+
+
+//#define TABLE_SPACING_Q31     0x400000
+//#define TABLE_SPACING_Q15     0x80
+
+
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+
+#endif /* _ARM_MATH_H */
+
+/**
+ *
+ * End of file.
+ */
diff --git a/Libraries/CMSIS/DSP/Include/arm_math_f16.h b/Libraries/CMSIS/DSP/Include/arm_math_f16.h
new file mode 100755
index 00000000..daf0c53d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_math_f16.h
@@ -0,0 +1,59 @@
+/******************************************************************************
+ * @file     arm_math_f16.h
+ * @brief    Public header file for f16 function of the CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_MATH_F16_H
+#define _ARM_MATH_F16_H
+
+#include "arm_math.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#include "arm_math_types_f16.h"
+#include "dsp/none.h"
+#include "dsp/utils.h"
+#include "dsp/basic_math_functions_f16.h"
+#include "dsp/interpolation_functions_f16.h"
+#include "dsp/bayes_functions_f16.h"
+#include "dsp/matrix_functions_f16.h"
+#include "dsp/complex_math_functions_f16.h"
+#include "dsp/statistics_functions_f16.h"
+#include "dsp/controller_functions_f16.h"
+#include "dsp/support_functions_f16.h"
+#include "dsp/distance_functions_f16.h"
+#include "dsp/svm_functions_f16.h"
+#include "dsp/fast_math_functions_f16.h"
+#include "dsp/transform_functions_f16.h"
+#include "dsp/filtering_functions_f16.h"
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* _ARM_MATH_F16_H */
+
+
diff --git a/Libraries/CMSIS/DSP/Include/arm_math_memory.h b/Libraries/CMSIS/DSP/Include/arm_math_memory.h
new file mode 100755
index 00000000..6694a1d2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_math_memory.h
@@ -0,0 +1,241 @@
+/******************************************************************************
+ * @file     arm_math_memory.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_MATH_MEMORY_H_
+
+#define _ARM_MATH_MEMORY_H_
+
+#include "arm_math_types.h"
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/**
+  @brief definition to read/write two 16 bit values.
+  @deprecated
+ */
+#if   defined ( __CC_ARM )
+  #define __SIMD32_TYPE int32_t __packed
+#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __GNUC__ )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __ICCARM__ )
+  #define __SIMD32_TYPE int32_t __packed
+#elif defined ( __TI_ARM__ )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __CSMC__ )
+  #define __SIMD32_TYPE int32_t
+#elif defined ( __TASKING__ )
+  #define __SIMD32_TYPE __un(aligned) int32_t
+#elif defined(_MSC_VER )
+  #define __SIMD32_TYPE int32_t
+#else
+  #error Unknown compiler
+#endif
+
+#define __SIMD32(addr)        (*(__SIMD32_TYPE **) & (addr))
+#define __SIMD32_CONST(addr)  ( (__SIMD32_TYPE * )   (addr))
+#define _SIMD32_OFFSET(addr)  (*(__SIMD32_TYPE * )   (addr))
+#define __SIMD64(addr)        (*(      int64_t **) & (addr))
+
+
+/* SIMD replacement */
+
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2 (
+  q15_t * pQ15)
+{
+  q31_t val;
+
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (&val, pQ15, 4);
+#else
+  val = (pQ15[1] << 16) | (pQ15[0] & 0x0FFFF) ;
+#endif
+
+  return (val);
+}
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer and increment pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_ia (
+  q15_t ** pQ15)
+{
+  q31_t val;
+
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (&val, *pQ15, 4);
+#else
+  val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
+#endif
+
+ *pQ15 += 2;
+ return (val);
+}
+
+/**
+  @brief         Read 2 Q15 from Q15 pointer and decrement pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q15x2_da (
+  q15_t ** pQ15)
+{
+  q31_t val;
+
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (&val, *pQ15, 4);
+#else
+  val = ((*pQ15)[1] << 16) | ((*pQ15)[0] & 0x0FFFF);
+#endif
+
+  *pQ15 -= 2;
+  return (val);
+}
+
+/**
+  @brief         Write 2 Q15 to Q15 pointer and increment pointer afterwards.
+  @param[in]     pQ15      points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q15x2_ia (
+  q15_t ** pQ15,
+  q31_t    value)
+{
+  q31_t val = value;
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (*pQ15, &val, 4);
+#else
+  (*pQ15)[0] = (val & 0x0FFFF);
+  (*pQ15)[1] = (val >> 16) & 0x0FFFF;
+#endif
+
+ *pQ15 += 2;
+}
+
+/**
+  @brief         Write 2 Q15 to Q15 pointer.
+  @param[in]     pQ15      points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q15x2 (
+  q15_t * pQ15,
+  q31_t   value)
+{
+  q31_t val = value;
+
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (pQ15, &val, 4);
+#else
+  pQ15[0] = val & 0x0FFFF;
+  pQ15[1] = val >> 16;
+#endif
+}
+
+
+/**
+  @brief         Read 4 Q7 from Q7 pointer and increment pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_ia (
+  q7_t ** pQ7)
+{
+  q31_t val;
+
+
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (&val, *pQ7, 4);
+#else
+  val =(((*pQ7)[3] & 0x0FF) << 24)  | (((*pQ7)[2] & 0x0FF) << 16)  | (((*pQ7)[1] & 0x0FF) << 8)  | ((*pQ7)[0] & 0x0FF);
+#endif 
+
+  *pQ7 += 4;
+
+  return (val);
+}
+
+/**
+  @brief         Read 4 Q7 from Q7 pointer and decrement pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @return        Q31 value
+ */
+__STATIC_FORCEINLINE q31_t read_q7x4_da (
+  q7_t ** pQ7)
+{
+  q31_t val;
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (&val, *pQ7, 4);
+#else
+  val = ((((*pQ7)[3]) & 0x0FF) << 24) | ((((*pQ7)[2]) & 0x0FF) << 16)   | ((((*pQ7)[1]) & 0x0FF) << 8)  | ((*pQ7)[0] & 0x0FF);
+#endif 
+  *pQ7 -= 4;
+
+  return (val);
+}
+
+/**
+  @brief         Write 4 Q7 to Q7 pointer and increment pointer afterwards.
+  @param[in]     pQ7       points to input value
+  @param[in]     value     Q31 value
+  @return        none
+ */
+__STATIC_FORCEINLINE void write_q7x4_ia (
+  q7_t ** pQ7,
+  q31_t   value)
+{
+  q31_t val = value;
+#ifdef __ARM_FEATURE_UNALIGNED
+  memcpy (*pQ7, &val, 4);
+#else
+  (*pQ7)[0] = val & 0x0FF;
+  (*pQ7)[1] = (val >> 8) & 0x0FF;
+  (*pQ7)[2] = (val >> 16) & 0x0FF;
+  (*pQ7)[3] = (val >> 24) & 0x0FF;
+
+#endif
+  *pQ7 += 4;
+}
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /*ifndef _ARM_MATH_MEMORY_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/arm_math_types.h b/Libraries/CMSIS/DSP/Include/arm_math_types.h
new file mode 100755
index 00000000..775b33c4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_math_types.h
@@ -0,0 +1,612 @@
+/******************************************************************************
+ * @file     arm_math_types.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_MATH_TYPES_H_
+
+#define _ARM_MATH_TYPES_H_
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/* Compiler specific diagnostic adjustment */
+#if   defined ( __CC_ARM )
+
+#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+
+#elif defined ( __APPLE_CC__ )
+  #pragma GCC diagnostic ignored "-Wold-style-cast"
+
+#elif defined ( __GNUC__ )
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wsign-conversion"
+  #pragma GCC diagnostic ignored "-Wconversion"
+  #pragma GCC diagnostic ignored "-Wunused-parameter"
+
+#elif defined ( __ICCARM__ )
+
+#elif defined ( __TI_ARM__ )
+
+#elif defined ( __CSMC__ )
+
+#elif defined ( __TASKING__ )
+
+#elif defined ( _MSC_VER )
+
+#else
+  #error Unknown compiler
+#endif
+
+
+/* Included for instrinsics definitions */
+#if defined (_MSC_VER ) 
+#include <stdint.h>
+#define __STATIC_FORCEINLINE static __forceinline
+#define __STATIC_INLINE static __inline
+#define __ALIGNED(x) __declspec(align(x))
+#elif defined ( __APPLE_CC__ )
+#include <stdint.h>
+#define  __ALIGNED(x) __attribute__((aligned(x)))
+#define __STATIC_FORCEINLINE static inline __attribute__((always_inline)) 
+#define __STATIC_INLINE static inline
+#elif defined (__GNUC_PYTHON__)
+#include <stdint.h>
+#define  __ALIGNED(x) __attribute__((aligned(x)))
+#define __STATIC_FORCEINLINE static inline __attribute__((always_inline)) 
+#define __STATIC_INLINE static inline
+
+#else
+#include "cmsis_compiler.h"
+#endif
+
+
+
+#include <string.h>
+#include <math.h>
+#include <float.h>
+#include <limits.h>
+
+/* evaluate ARM DSP feature */
+#if (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1))
+  #define ARM_MATH_DSP                   1
+#endif
+
+#if defined(ARM_MATH_NEON)
+#include <arm_neon.h>
+#if defined(__ARM_FEATURE_FP16_VECTOR_ARITHMETIC) && __ARM_FEATURE_FP16_VECTOR_ARITHMETIC
+  #if !defined(ARM_MATH_NEON_FLOAT16)
+  #define ARM_MATH_NEON_FLOAT16
+  #endif
+#endif
+#endif
+
+#if !defined(ARM_MATH_AUTOVECTORIZE)
+
+
+#if defined(__ARM_FEATURE_MVE)
+#if __ARM_FEATURE_MVE
+  #if !defined(ARM_MATH_MVEI)
+    #define ARM_MATH_MVEI
+  #endif
+#endif
+
+#if (__ARM_FEATURE_MVE & 2)
+  #if !defined(ARM_MATH_MVEF)
+    #define ARM_MATH_MVEF
+  #endif
+  #if !defined(ARM_MATH_MVE_FLOAT16)
+       #define ARM_MATH_MVE_FLOAT16
+  #endif
+#endif
+
+#endif /*defined(__ARM_FEATURE_MVE)*/
+#endif /*!defined(ARM_MATH_AUTOVECTORIZE)*/
+
+
+#if defined (ARM_MATH_HELIUM)
+  #if !defined(ARM_MATH_MVEF)
+    #define ARM_MATH_MVEF
+  #endif
+
+  #if !defined(ARM_MATH_MVEI)
+    #define ARM_MATH_MVEI
+  #endif
+
+  #if !defined(ARM_MATH_MVE_FLOAT16)
+       #define ARM_MATH_MVE_FLOAT16
+  #endif
+#endif
+
+
+
+#if   defined ( __CC_ARM )
+  /* Enter low optimization region - place directly above function definition */
+  #if defined( __ARM_ARCH_7EM__ )
+    #define LOW_OPTIMIZATION_ENTER \
+       _Pragma ("push")         \
+       _Pragma ("O1")
+  #else
+    #define LOW_OPTIMIZATION_ENTER
+  #endif
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #if defined ( __ARM_ARCH_7EM__ )
+    #define LOW_OPTIMIZATION_EXIT \
+       _Pragma ("pop")
+  #else
+    #define LOW_OPTIMIZATION_EXIT
+  #endif
+
+  /* Enter low optimization region - place directly above function definition */
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined (__ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+  
+#elif defined ( __APPLE_CC__ )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __GNUC__ )
+  #define LOW_OPTIMIZATION_ENTER \
+       __attribute__(( optimize("-O1") ))
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __ICCARM__ )
+  /* Enter low optimization region - place directly above function definition */
+  #if defined ( __ARM_ARCH_7EM__ )
+    #define LOW_OPTIMIZATION_ENTER \
+       _Pragma ("optimize=low")
+  #else
+    #define LOW_OPTIMIZATION_ENTER
+  #endif
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #define LOW_OPTIMIZATION_EXIT
+
+  /* Enter low optimization region - place directly above function definition */
+  #if defined ( __ARM_ARCH_7EM__ )
+    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER \
+       _Pragma ("optimize=low")
+  #else
+    #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #endif
+
+  /* Exit low optimization region - place directly after end of function definition */
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __TI_ARM__ )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __CSMC__ )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+
+#elif defined ( __TASKING__ )
+  #define LOW_OPTIMIZATION_ENTER
+  #define LOW_OPTIMIZATION_EXIT
+  #define IAR_ONLY_LOW_OPTIMIZATION_ENTER
+  #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+       
+#elif defined ( _MSC_VER ) || defined(__GNUC_PYTHON__)
+      #define LOW_OPTIMIZATION_ENTER
+      #define LOW_OPTIMIZATION_EXIT
+      #define IAR_ONLY_LOW_OPTIMIZATION_ENTER 
+      #define IAR_ONLY_LOW_OPTIMIZATION_EXIT
+#endif
+
+
+
+/* Compiler specific diagnostic adjustment */
+#if   defined ( __CC_ARM )
+
+#elif defined ( __ARMCC_VERSION ) && ( __ARMCC_VERSION >= 6010050 )
+
+#elif defined ( __APPLE_CC__ )
+
+#elif defined ( __GNUC__ )
+#pragma GCC diagnostic pop
+
+#elif defined ( __ICCARM__ )
+
+#elif defined ( __TI_ARM__ )
+
+#elif defined ( __CSMC__ )
+
+#elif defined ( __TASKING__ )
+
+#elif defined ( _MSC_VER )
+
+#else
+  #error Unknown compiler
+#endif
+
+#ifdef   __cplusplus
+}
+#endif
+
+#if defined(__ARM_FEATURE_MVE) && __ARM_FEATURE_MVE
+#include <arm_mve.h>
+#endif
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+ /**
+   * @brief 8-bit fractional data type in 1.7 format.
+   */
+  typedef int8_t q7_t;
+
+  /**
+   * @brief 16-bit fractional data type in 1.15 format.
+   */
+  typedef int16_t q15_t;
+
+  /**
+   * @brief 32-bit fractional data type in 1.31 format.
+   */
+  typedef int32_t q31_t;
+
+  /**
+   * @brief 64-bit fractional data type in 1.63 format.
+   */
+  typedef int64_t q63_t;
+
+  /**
+   * @brief 32-bit floating-point type definition.
+   */
+#if !defined(__ICCARM__) || !(__ARM_FEATURE_MVE & 2)
+  typedef float float32_t;
+#endif
+
+  /**
+   * @brief 64-bit floating-point type definition.
+   */
+  typedef double float64_t;
+
+  /**
+   * @brief vector types
+   */
+#if defined(ARM_MATH_NEON) || (defined (ARM_MATH_MVEI)  && !defined(ARM_MATH_AUTOVECTORIZE))
+  /**
+   * @brief 64-bit fractional 128-bit vector data type in 1.63 format
+   */
+  typedef int64x2_t q63x2_t;
+
+  /**
+   * @brief 32-bit fractional 128-bit vector data type in 1.31 format.
+   */
+  typedef int32x4_t q31x4_t;
+
+  /**
+   * @brief 16-bit fractional 128-bit vector data type with 16-bit alignment in 1.15 format.
+   */
+  typedef __ALIGNED(2) int16x8_t q15x8_t;
+
+ /**
+   * @brief 8-bit fractional 128-bit vector data type with 8-bit alignment in 1.7 format.
+   */
+  typedef __ALIGNED(1) int8x16_t q7x16_t;
+
+    /**
+   * @brief 32-bit fractional 128-bit vector pair data type in 1.31 format.
+   */
+  typedef int32x4x2_t q31x4x2_t;
+
+  /**
+   * @brief 32-bit fractional 128-bit vector quadruplet data type in 1.31 format.
+   */
+  typedef int32x4x4_t q31x4x4_t;
+
+  /**
+   * @brief 16-bit fractional 128-bit vector pair data type in 1.15 format.
+   */
+  typedef int16x8x2_t q15x8x2_t;
+
+  /**
+   * @brief 16-bit fractional 128-bit vector quadruplet data type in 1.15 format.
+   */
+  typedef int16x8x4_t q15x8x4_t;
+
+  /**
+   * @brief 8-bit fractional 128-bit vector pair data type in 1.7 format.
+   */
+  typedef int8x16x2_t q7x16x2_t;
+
+  /**
+   * @brief 8-bit fractional 128-bit vector quadruplet data type in 1.7 format.
+   */
+   typedef int8x16x4_t q7x16x4_t;
+
+  /**
+   * @brief 32-bit fractional data type in 9.23 format.
+   */
+  typedef int32_t q23_t;
+
+  /**
+   * @brief 32-bit fractional 128-bit vector data type in 9.23 format.
+   */
+  typedef int32x4_t q23x4_t;
+
+  /**
+   * @brief 64-bit status 128-bit vector data type.
+   */
+  typedef int64x2_t status64x2_t;
+
+  /**
+   * @brief 32-bit status 128-bit vector data type.
+   */
+  typedef int32x4_t status32x4_t;
+
+  /**
+   * @brief 16-bit status 128-bit vector data type.
+   */
+  typedef int16x8_t status16x8_t;
+
+  /**
+   * @brief 8-bit status 128-bit vector data type.
+   */
+  typedef int8x16_t status8x16_t;
+
+
+#endif
+
+#if defined(ARM_MATH_NEON) || (defined(ARM_MATH_MVEF)  && !defined(ARM_MATH_AUTOVECTORIZE)) /* floating point vector*/
+  /**
+   * @brief 32-bit floating-point 128-bit vector type
+   */
+  typedef float32x4_t f32x4_t;
+
+  /**
+   * @brief 32-bit floating-point 128-bit vector pair data type
+   */
+  typedef float32x4x2_t f32x4x2_t;
+
+  /**
+   * @brief 32-bit floating-point 128-bit vector quadruplet data type
+   */
+  typedef float32x4x4_t f32x4x4_t;
+
+  /**
+   * @brief 32-bit ubiquitous 128-bit vector data type
+   */
+  typedef union _any32x4_t
+  {
+      float32x4_t     f;
+      int32x4_t       i;
+  } any32x4_t;
+
+#endif
+
+#if defined(ARM_MATH_NEON)
+  /**
+   * @brief 32-bit fractional 64-bit vector data type in 1.31 format.
+   */
+  typedef int32x2_t  q31x2_t;
+
+  /**
+   * @brief 16-bit fractional 64-bit vector data type in 1.15 format.
+   */
+  typedef  __ALIGNED(2) int16x4_t q15x4_t;
+
+  /**
+   * @brief 8-bit fractional 64-bit vector data type in 1.7 format.
+   */
+  typedef  __ALIGNED(1) int8x8_t q7x8_t;
+
+  /**
+   * @brief 32-bit float 64-bit vector data type.
+   */
+  typedef float32x2_t  f32x2_t;
+
+  /**
+   * @brief 32-bit floating-point 128-bit vector triplet data type
+   */
+  typedef float32x4x3_t f32x4x3_t;
+
+
+  /**
+   * @brief 32-bit fractional 128-bit vector triplet data type in 1.31 format
+   */
+  typedef int32x4x3_t q31x4x3_t;
+
+  /**
+   * @brief 16-bit fractional 128-bit vector triplet data type in 1.15 format
+   */
+  typedef int16x8x3_t q15x8x3_t;
+
+  /**
+   * @brief 8-bit fractional 128-bit vector triplet data type in 1.7 format
+   */
+  typedef int8x16x3_t q7x16x3_t;
+
+  /**
+   * @brief 32-bit floating-point 64-bit vector pair data type
+   */
+  typedef float32x2x2_t f32x2x2_t;
+
+  /**
+   * @brief 32-bit floating-point 64-bit vector triplet data type
+   */
+  typedef float32x2x3_t f32x2x3_t;
+
+  /**
+   * @brief 32-bit floating-point 64-bit vector quadruplet data type
+   */
+  typedef float32x2x4_t f32x2x4_t;
+
+
+  /**
+   * @brief 32-bit fractional 64-bit vector pair data type in 1.31 format
+   */
+  typedef int32x2x2_t q31x2x2_t;
+
+  /**
+   * @brief 32-bit fractional 64-bit vector triplet data type in 1.31 format
+   */
+  typedef int32x2x3_t q31x2x3_t;
+
+  /**
+   * @brief 32-bit fractional 64-bit vector quadruplet data type in 1.31 format
+   */
+  typedef int32x4x3_t q31x2x4_t;
+
+  /**
+   * @brief 16-bit fractional 64-bit vector pair data type in 1.15 format
+   */
+  typedef int16x4x2_t q15x4x2_t;
+
+  /**
+   * @brief 16-bit fractional 64-bit vector triplet data type in 1.15 format
+   */
+  typedef int16x4x2_t q15x4x3_t;
+
+  /**
+   * @brief 16-bit fractional 64-bit vector quadruplet data type in 1.15 format
+   */
+  typedef int16x4x3_t q15x4x4_t;
+
+  /**
+   * @brief 8-bit fractional 64-bit vector pair data type in 1.7 format
+   */
+  typedef int8x8x2_t q7x8x2_t;
+
+  /**
+   * @brief 8-bit fractional 64-bit vector triplet data type in 1.7 format
+   */
+  typedef int8x8x3_t q7x8x3_t;
+
+  /**
+   * @brief 8-bit fractional 64-bit vector quadruplet data type in 1.7 format
+   */
+  typedef int8x8x4_t q7x8x4_t;
+
+  /**
+   * @brief 32-bit ubiquitous 64-bit vector data type
+   */
+  typedef union _any32x2_t
+  {
+      float32x2_t     f;
+      int32x2_t       i;
+  } any32x2_t;
+
+
+  /**
+   * @brief 32-bit status 64-bit vector data type.
+   */
+  typedef int32x4_t status32x2_t;
+
+  /**
+   * @brief 16-bit status 64-bit vector data type.
+   */
+  typedef int16x8_t status16x4_t;
+
+  /**
+   * @brief 8-bit status 64-bit vector data type.
+   */
+  typedef int8x16_t status8x8_t;
+
+#endif
+
+
+
+
+
+#define F64_MAX   ((float64_t)DBL_MAX)
+#define F32_MAX   ((float32_t)FLT_MAX)
+
+
+
+#define F64_MIN   (-DBL_MAX)
+#define F32_MIN   (-FLT_MAX)
+
+
+
+#define F64_ABSMAX   ((float64_t)DBL_MAX)
+#define F32_ABSMAX   ((float32_t)FLT_MAX)
+
+
+
+#define F64_ABSMIN   ((float64_t)0.0)
+#define F32_ABSMIN   ((float32_t)0.0)
+
+
+#define Q31_MAX   ((q31_t)(0x7FFFFFFFL))
+#define Q15_MAX   ((q15_t)(0x7FFF))
+#define Q7_MAX    ((q7_t)(0x7F))
+#define Q31_MIN   ((q31_t)(0x80000000L))
+#define Q15_MIN   ((q15_t)(0x8000))
+#define Q7_MIN    ((q7_t)(0x80))
+
+#define Q31_ABSMAX   ((q31_t)(0x7FFFFFFFL))
+#define Q15_ABSMAX   ((q15_t)(0x7FFF))
+#define Q7_ABSMAX    ((q7_t)(0x7F))
+#define Q31_ABSMIN   ((q31_t)0)
+#define Q15_ABSMIN   ((q15_t)0)
+#define Q7_ABSMIN    ((q7_t)0)
+
+  /* Dimension C vector space */
+  #define CMPLX_DIM 2
+
+  /**
+   * @brief Error status returned by some functions in the library.
+   */
+
+  typedef enum
+  {
+    ARM_MATH_SUCCESS                 =  0,        /**< No error */
+    ARM_MATH_ARGUMENT_ERROR          = -1,        /**< One or more arguments are incorrect */
+    ARM_MATH_LENGTH_ERROR            = -2,        /**< Length of data buffer is incorrect */
+    ARM_MATH_SIZE_MISMATCH           = -3,        /**< Size of matrices is not compatible with the operation */
+    ARM_MATH_NANINF                  = -4,        /**< Not-a-number (NaN) or infinity is generated */
+    ARM_MATH_SINGULAR                = -5,        /**< Input matrix is singular and cannot be inverted */
+    ARM_MATH_TEST_FAILURE            = -6,        /**< Test Failed */
+    ARM_MATH_DECOMPOSITION_FAILURE   = -7         /**< Decomposition Failed */
+  } arm_status;
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /*ifndef _ARM_MATH_TYPES_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/arm_math_types_f16.h b/Libraries/CMSIS/DSP/Include/arm_math_types_f16.h
new file mode 100755
index 00000000..744dc38f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_math_types_f16.h
@@ -0,0 +1,163 @@
+/******************************************************************************
+ * @file     arm_math_types_f16.h
+ * @brief    Public header file for f16 function of the CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_MATH_TYPES_F16_H
+#define _ARM_MATH_TYPES_F16_H
+
+#include "arm_math_types.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if !defined( __CC_ARM )
+
+/**
+ * @brief 16-bit floating-point type definition.
+ * This is already defined in arm_mve.h
+ *
+ * This is not fully supported on ARM AC5.
+ */
+
+/*
+
+Check if the type __fp16 is available.
+If it is not available, f16 version of the kernels
+won't be built.
+
+*/
+#if !(__ARM_FEATURE_MVE & 2)
+  #if !defined(DISABLEFLOAT16)
+    #if defined(__ARM_FP16_FORMAT_IEEE) || defined(__ARM_FP16_FORMAT_ALTERNATIVE)
+      typedef __fp16 float16_t;
+      #define ARM_FLOAT16_SUPPORTED
+    #endif
+  #endif
+#else
+  /* When Vector float16, this flag is always defined and can't be disabled */
+  #define ARM_FLOAT16_SUPPORTED
+#endif
+
+#if defined(ARM_MATH_NEON) || (defined(ARM_MATH_MVEF)  && !defined(ARM_MATH_AUTOVECTORIZE)) /* floating point vector*/
+
+#if defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_NEON_FLOAT16)
+
+  /**
+   * @brief 16-bit floating-point 128-bit vector data type
+   */
+  typedef __ALIGNED(2) float16x8_t f16x8_t;
+
+  /**
+   * @brief 16-bit floating-point 128-bit vector pair data type
+   */
+  typedef float16x8x2_t f16x8x2_t;
+
+  /**
+   * @brief 16-bit floating-point 128-bit vector quadruplet data type
+   */
+  typedef float16x8x4_t f16x8x4_t;
+
+  /**
+   * @brief 16-bit ubiquitous 128-bit vector data type
+   */
+  typedef union _any16x8_t
+  {
+      float16x8_t     f;
+      int16x8_t       i;
+  } any16x8_t;
+#endif
+
+#endif
+
+#if defined(ARM_MATH_NEON)
+
+
+#if defined(ARM_MATH_NEON_FLOAT16)
+  /**
+   * @brief 16-bit float 64-bit vector data type.
+   */
+  typedef  __ALIGNED(2) float16x4_t f16x4_t;
+
+  /**
+   * @brief 16-bit floating-point 128-bit vector triplet data type
+   */
+  typedef float16x8x3_t f16x8x3_t;
+
+  /**
+   * @brief 16-bit floating-point 64-bit vector pair data type
+   */
+  typedef float16x4x2_t f16x4x2_t;
+
+  /**
+   * @brief 16-bit floating-point 64-bit vector triplet data type
+   */
+  typedef float16x4x3_t f16x4x3_t;
+
+  /**
+   * @brief 16-bit floating-point 64-bit vector quadruplet data type
+   */
+  typedef float16x4x4_t f16x4x4_t;
+
+  /**
+   * @brief 16-bit ubiquitous 64-bit vector data type
+   */
+  typedef union _any16x4_t
+  {
+      float16x4_t     f;
+      int16x4_t       i;
+  } any16x4_t;
+#endif
+
+#endif
+
+
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#if defined(__ICCARM__)
+
+#define F16INFINITY   ((float16_t) INFINITY)
+
+#else
+
+#define F16INFINITY ((float16_t)__builtin_inf())
+
+#endif
+
+#define F16_MAX   ((float16_t)__FLT16_MAX__)
+#define F16_MIN   (-(_Float16)__FLT16_MAX__)
+
+#define F16_ABSMAX   ((float16_t)__FLT16_MAX__)
+#define F16_ABSMIN   ((float16_t)0.0f16)
+
+#endif /* ARM_FLOAT16_SUPPORTED*/
+#endif /* !defined( __CC_ARM ) */
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* _ARM_MATH_F16_H */
diff --git a/Libraries/CMSIS/DSP/Include/arm_mve_tables.h b/Libraries/CMSIS/DSP/Include/arm_mve_tables.h
new file mode 100755
index 00000000..c4f8bf08
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_mve_tables.h
@@ -0,0 +1,231 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mve_tables.h
+ * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
+ *               used for MVE implementation only
+ *
+ * @version  V1.10.0
+ * @date     04 October 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ #ifndef _ARM_MVE_TABLES_H
+ #define _ARM_MVE_TABLES_H
+
+#include "arm_math_types.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+ 
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2];
+extern float32_t rearranged_twiddle_stride1_16_f32[8];
+extern float32_t rearranged_twiddle_stride2_16_f32[8];
+extern float32_t rearranged_twiddle_stride3_16_f32[8];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3];
+extern float32_t rearranged_twiddle_stride1_64_f32[40];
+extern float32_t rearranged_twiddle_stride2_64_f32[40];
+extern float32_t rearranged_twiddle_stride3_64_f32[40];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4];
+extern float32_t rearranged_twiddle_stride1_256_f32[168];
+extern float32_t rearranged_twiddle_stride2_256_f32[168];
+extern float32_t rearranged_twiddle_stride3_256_f32[168];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5];
+extern float32_t rearranged_twiddle_stride1_1024_f32[680];
+extern float32_t rearranged_twiddle_stride2_1024_f32[680];
+extern float32_t rearranged_twiddle_stride3_1024_f32[680];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6];
+extern float32_t rearranged_twiddle_stride1_4096_f32[2728];
+extern float32_t rearranged_twiddle_stride2_4096_f32[2728];
+extern float32_t rearranged_twiddle_stride3_4096_f32[2728];
+#endif
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+
+#if defined(ARM_MATH_MVEI)  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2];
+extern q31_t rearranged_twiddle_stride1_16_q31[8];
+extern q31_t rearranged_twiddle_stride2_16_q31[8];
+extern q31_t rearranged_twiddle_stride3_16_q31[8];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3];
+extern q31_t rearranged_twiddle_stride1_64_q31[40];
+extern q31_t rearranged_twiddle_stride2_64_q31[40];
+extern q31_t rearranged_twiddle_stride3_64_q31[40];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4];
+extern q31_t rearranged_twiddle_stride1_256_q31[168];
+extern q31_t rearranged_twiddle_stride2_256_q31[168];
+extern q31_t rearranged_twiddle_stride3_256_q31[168];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5];
+extern q31_t rearranged_twiddle_stride1_1024_q31[680];
+extern q31_t rearranged_twiddle_stride2_1024_q31[680];
+extern q31_t rearranged_twiddle_stride3_1024_q31[680];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6];
+extern q31_t rearranged_twiddle_stride1_4096_q31[2728];
+extern q31_t rearranged_twiddle_stride2_4096_q31[2728];
+extern q31_t rearranged_twiddle_stride3_4096_q31[2728];
+#endif
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+
+#endif /* defined(ARM_MATH_MVEI) */
+
+
+
+#if defined(ARM_MATH_MVEI)  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2];
+extern q15_t rearranged_twiddle_stride1_16_q15[8];
+extern q15_t rearranged_twiddle_stride2_16_q15[8];
+extern q15_t rearranged_twiddle_stride3_16_q15[8];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3];
+extern q15_t rearranged_twiddle_stride1_64_q15[40];
+extern q15_t rearranged_twiddle_stride2_64_q15[40];
+extern q15_t rearranged_twiddle_stride3_64_q15[40];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4];
+extern q15_t rearranged_twiddle_stride1_256_q15[168];
+extern q15_t rearranged_twiddle_stride2_256_q15[168];
+extern q15_t rearranged_twiddle_stride3_256_q15[168];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5];
+extern q15_t rearranged_twiddle_stride1_1024_q15[680];
+extern q15_t rearranged_twiddle_stride2_1024_q15[680];
+extern q15_t rearranged_twiddle_stride3_1024_q15[680];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6];
+extern q15_t rearranged_twiddle_stride1_4096_q15[2728];
+extern q15_t rearranged_twiddle_stride2_4096_q15[2728];
+extern q15_t rearranged_twiddle_stride3_4096_q15[2728];
+#endif
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+
+#endif /* defined(ARM_MATH_MVEI) */
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /*_ARM_MVE_TABLES_H*/
+
diff --git a/Libraries/CMSIS/DSP/Include/arm_mve_tables_f16.h b/Libraries/CMSIS/DSP/Include/arm_mve_tables_f16.h
new file mode 100755
index 00000000..dc952030
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_mve_tables_f16.h
@@ -0,0 +1,109 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mve_tables_f16.h
+ * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
+ *               used for MVE implementation only
+ *
+ * @version  V1.10.0
+ * @date     04 October 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ #ifndef _ARM_MVE_TABLES_F16_H
+ #define _ARM_MVE_TABLES_F16_H
+
+#include "arm_math_types_f16.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+ 
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16) || defined(ARM_TABLE_TWIDDLECOEF_F16_32)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_16_f16[2];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_16_f16[2];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_16_f16[2];
+extern float16_t rearranged_twiddle_stride1_16_f16[8];
+extern float16_t rearranged_twiddle_stride2_16_f16[8];
+extern float16_t rearranged_twiddle_stride3_16_f16[8];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64) || defined(ARM_TABLE_TWIDDLECOEF_F16_128)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_64_f16[3];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_64_f16[3];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_64_f16[3];
+extern float16_t rearranged_twiddle_stride1_64_f16[40];
+extern float16_t rearranged_twiddle_stride2_64_f16[40];
+extern float16_t rearranged_twiddle_stride3_64_f16[40];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256) || defined(ARM_TABLE_TWIDDLECOEF_F16_512)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_256_f16[4];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_256_f16[4];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_256_f16[4];
+extern float16_t rearranged_twiddle_stride1_256_f16[168];
+extern float16_t rearranged_twiddle_stride2_256_f16[168];
+extern float16_t rearranged_twiddle_stride3_256_f16[168];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_1024_f16[5];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_1024_f16[5];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_1024_f16[5];
+extern float16_t rearranged_twiddle_stride1_1024_f16[680];
+extern float16_t rearranged_twiddle_stride2_1024_f16[680];
+extern float16_t rearranged_twiddle_stride3_1024_f16[680];
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) || defined(ARM_TABLE_TWIDDLECOEF_F16_8192)
+
+extern uint32_t rearranged_twiddle_tab_stride1_arr_4096_f16[6];
+extern uint32_t rearranged_twiddle_tab_stride2_arr_4096_f16[6];
+extern uint32_t rearranged_twiddle_tab_stride3_arr_4096_f16[6];
+extern float16_t rearranged_twiddle_stride1_4096_f16[2728];
+extern float16_t rearranged_twiddle_stride2_4096_f16[2728];
+extern float16_t rearranged_twiddle_stride3_4096_f16[2728];
+#endif
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+
+#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /*_ARM_MVE_TABLES_F16_H*/
+
diff --git a/Libraries/CMSIS/DSP/Include/arm_vec_math.h b/Libraries/CMSIS/DSP/Include/arm_vec_math.h
new file mode 100755
index 00000000..d9134c54
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_vec_math.h
@@ -0,0 +1,373 @@
+/******************************************************************************
+ * @file     arm_vec_math.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_VEC_MATH_H
+#define _ARM_VEC_MATH_H
+
+#include "arm_math_types.h"
+#include "arm_common_tables.h"
+#include "arm_helium_utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define INV_NEWTON_INIT_F32         0x7EF127EA
+
+static const float32_t __logf_rng_f32=0.693147180f;
+
+
+/* fast inverse approximation (3x newton) */
+__STATIC_INLINE f32x4_t vrecip_medprec_f32(
+    f32x4_t x)
+{
+    q31x4_t         m;
+    f32x4_t         b;
+    any32x4_t       xinv;
+    f32x4_t         ax = vabsq(x);
+
+    xinv.f = ax;
+    m = 0x3F800000 - (xinv.i & 0x7F800000);
+    xinv.i = xinv.i + m;
+    xinv.f = 1.41176471f - 0.47058824f * xinv.f;
+    xinv.i = xinv.i + m;
+
+    b = 2.0f - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f));
+    /*
+     * restore sign
+     */
+    xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f));
+
+    return xinv.f;
+}
+
+/* fast inverse approximation (4x newton) */
+__STATIC_INLINE f32x4_t vrecip_hiprec_f32(
+    f32x4_t x)
+{
+    q31x4_t         m;
+    f32x4_t         b;
+    any32x4_t       xinv;
+    f32x4_t         ax = vabsq(x);
+
+    xinv.f = ax;
+
+    m = 0x3F800000 - (xinv.i & 0x7F800000);
+    xinv.i = xinv.i + m;
+    xinv.f = 1.41176471f - 0.47058824f * xinv.f;
+    xinv.i = xinv.i + m;
+
+    b = 2.0f - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    xinv.f = vdupq_m(xinv.f, INFINITY, vcmpeqq(x, 0.0f));
+    /*
+     * restore sign
+     */
+    xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq(x, 0.0f));
+
+    return xinv.f;
+}
+
+__STATIC_INLINE f32x4_t vdiv_f32(
+    f32x4_t num, f32x4_t den)
+{
+    return vmulq(num, vrecip_hiprec_f32(den));
+}
+
+/**
+  @brief         Single-precision taylor dev.
+  @param[in]     x              f32 quad vector input
+  @param[in]     coeffs         f32 quad vector coeffs
+  @return        destination    f32 quad vector
+ */
+
+__STATIC_INLINE f32x4_t vtaylor_polyq_f32(
+        f32x4_t           x,
+        const float32_t * coeffs)
+{
+    f32x4_t         A = vfmasq(vdupq_n_f32(coeffs[4]), x, coeffs[0]);
+    f32x4_t         B = vfmasq(vdupq_n_f32(coeffs[6]), x, coeffs[2]);
+    f32x4_t         C = vfmasq(vdupq_n_f32(coeffs[5]), x, coeffs[1]);
+    f32x4_t         D = vfmasq(vdupq_n_f32(coeffs[7]), x, coeffs[3]);
+    f32x4_t         x2 = vmulq(x, x);
+    f32x4_t         x4 = vmulq(x2, x2);
+    f32x4_t         res = vfmaq(vfmaq_f32(A, B, x2), vfmaq_f32(C, D, x2), x4);
+
+    return res;
+}
+
+__STATIC_INLINE f32x4_t vmant_exp_f32(
+    f32x4_t     x,
+    int32x4_t * e)
+{
+    any32x4_t       r;
+    int32x4_t       n;
+
+    r.f = x;
+    n = r.i >> 23;
+    n = n - 127;
+    r.i = r.i - (n << 23);
+
+    *e = n;
+    return r.f;
+}
+
+
+__STATIC_INLINE f32x4_t vlogq_f32(f32x4_t vecIn)
+{
+    q31x4_t         vecExpUnBiased;
+    f32x4_t         vecTmpFlt0, vecTmpFlt1;
+    f32x4_t         vecAcc0, vecAcc1, vecAcc2, vecAcc3;
+    f32x4_t         vecExpUnBiasedFlt;
+
+    /*
+     * extract exponent
+     */
+    vecTmpFlt1 = vmant_exp_f32(vecIn, &vecExpUnBiased);
+
+    vecTmpFlt0 = vecTmpFlt1 * vecTmpFlt1;
+    /*
+     * a = (__logf_lut_f32[4] * r.f) + (__logf_lut_f32[0]);
+     */
+    vecAcc0 = vdupq_n_f32(__logf_lut_f32[0]);
+    vecAcc0 = vfmaq(vecAcc0, vecTmpFlt1, __logf_lut_f32[4]);
+    /*
+     * b = (__logf_lut_f32[6] * r.f) + (__logf_lut_f32[2]);
+     */
+    vecAcc1 = vdupq_n_f32(__logf_lut_f32[2]);
+    vecAcc1 = vfmaq(vecAcc1, vecTmpFlt1, __logf_lut_f32[6]);
+    /*
+     * c = (__logf_lut_f32[5] * r.f) + (__logf_lut_f32[1]);
+     */
+    vecAcc2 = vdupq_n_f32(__logf_lut_f32[1]);
+    vecAcc2 = vfmaq(vecAcc2, vecTmpFlt1, __logf_lut_f32[5]);
+    /*
+     * d = (__logf_lut_f32[7] * r.f) + (__logf_lut_f32[3]);
+     */
+    vecAcc3 = vdupq_n_f32(__logf_lut_f32[3]);
+    vecAcc3 = vfmaq(vecAcc3, vecTmpFlt1, __logf_lut_f32[7]);
+    /*
+     * a = a + b * xx;
+     */
+    vecAcc0 = vfmaq(vecAcc0, vecAcc1, vecTmpFlt0);
+    /*
+     * c = c + d * xx;
+     */
+    vecAcc2 = vfmaq(vecAcc2, vecAcc3, vecTmpFlt0);
+    /*
+     * xx = xx * xx;
+     */
+    vecTmpFlt0 = vecTmpFlt0 * vecTmpFlt0;
+    vecExpUnBiasedFlt = vcvtq_f32_s32(vecExpUnBiased);
+    /*
+     * r.f = a + c * xx;
+     */
+    vecAcc0 = vfmaq(vecAcc0, vecAcc2, vecTmpFlt0);
+    /*
+     * add exponent
+     * r.f = r.f + ((float32_t) m) * __logf_rng_f32;
+     */
+    vecAcc0 = vfmaq(vecAcc0, vecExpUnBiasedFlt, __logf_rng_f32);
+    // set log0 down to -inf
+    vecAcc0 = vdupq_m(vecAcc0, -INFINITY, vcmpeqq(vecIn, 0.0f));
+    return vecAcc0;
+}
+
+__STATIC_INLINE f32x4_t vexpq_f32(
+    f32x4_t x)
+{
+    // Perform range reduction [-log(2),log(2)]
+    int32x4_t       m = vcvtq_s32_f32(vmulq_n_f32(x, 1.4426950408f));
+    f32x4_t         val = vfmsq_f32(x, vcvtq_f32_s32(m), vdupq_n_f32(0.6931471805f));
+
+    // Polynomial Approximation
+    f32x4_t         poly = vtaylor_polyq_f32(val, exp_tab);
+
+    // Reconstruct
+    poly = (f32x4_t) (vqaddq_s32((q31x4_t) (poly), vqshlq_n_s32(m, 23)));
+
+    poly = vdupq_m(poly, 0.0f, vcmpltq_n_s32(m, -126));
+    return poly;
+}
+
+__STATIC_INLINE f32x4_t arm_vec_exponent_f32(f32x4_t x, int32_t nb)
+{
+    f32x4_t         r = x;
+    nb--;
+    while (nb > 0) {
+        r = vmulq(r, x);
+        nb--;
+    }
+    return (r);
+}
+
+__STATIC_INLINE f32x4_t vrecip_f32(f32x4_t vecIn)
+{
+    f32x4_t     vecSx, vecW, vecTmp;
+    any32x4_t   v;
+
+    vecSx = vabsq(vecIn);
+
+    v.f = vecIn;
+    v.i = vsubq(vdupq_n_s32(INV_NEWTON_INIT_F32), v.i);
+
+    vecW = vmulq(vecSx, v.f);
+
+    // v.f = v.f * (8 + w * (-28 + w * (56 + w * (-70 + w *(56 + w * (-28 + w * (8 - w)))))));
+    vecTmp = vsubq(vdupq_n_f32(8.0f), vecW);
+    vecTmp = vfmasq(vecW, vecTmp, -28.0f);
+    vecTmp = vfmasq(vecW, vecTmp, 56.0f);
+    vecTmp = vfmasq(vecW, vecTmp, -70.0f);
+    vecTmp = vfmasq(vecW, vecTmp, 56.0f);
+    vecTmp = vfmasq(vecW, vecTmp, -28.0f);
+    vecTmp = vfmasq(vecW, vecTmp, 8.0f);
+    v.f = vmulq(v.f,  vecTmp);
+
+    v.f = vdupq_m(v.f, INFINITY, vcmpeqq(vecIn, 0.0f));
+    /*
+     * restore sign
+     */
+    v.f = vnegq_m(v.f, v.f, vcmpltq(vecIn, 0.0f));
+    return v.f;
+}
+
+__STATIC_INLINE f32x4_t vtanhq_f32(
+    f32x4_t val)
+{
+    f32x4_t         x =
+        vminnmq_f32(vmaxnmq_f32(val, vdupq_n_f32(-10.f)), vdupq_n_f32(10.0f));
+    f32x4_t         exp2x = vexpq_f32(vmulq_n_f32(x, 2.f));
+    f32x4_t         num = vsubq_n_f32(exp2x, 1.f);
+    f32x4_t         den = vaddq_n_f32(exp2x, 1.f);
+    f32x4_t         tanh = vmulq_f32(num, vrecip_f32(den));
+    return tanh;
+}
+
+__STATIC_INLINE f32x4_t vpowq_f32(
+    f32x4_t val,
+    f32x4_t n)
+{
+    return vexpq_f32(vmulq_f32(n, vlogq_f32(val)));
+}
+
+#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/
+
+#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "NEMath.h"
+/**
+ * @brief Vectorized integer exponentiation
+ * @param[in]    x           value
+ * @param[in]    nb          integer exponent >= 1
+ * @return x^nb
+ *
+ */
+__STATIC_INLINE  float32x4_t arm_vec_exponent_f32(float32x4_t x, int32_t nb)
+{
+    float32x4_t r = x;
+    nb --;
+    while(nb > 0)
+    {
+        r = vmulq_f32(r , x);
+        nb--;
+    }
+    return(r);
+}
+
+
+__STATIC_INLINE float32x4_t __arm_vec_sqrt_f32_neon(float32x4_t  x)
+{
+    float32x4_t x1 = vmaxq_f32(x, vdupq_n_f32(FLT_MIN));
+    float32x4_t e = vrsqrteq_f32(x1);
+    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
+    e = vmulq_f32(vrsqrtsq_f32(vmulq_f32(x1, e), e), e);
+    return vmulq_f32(x, e);
+}
+
+__STATIC_INLINE int16x8_t __arm_vec_sqrt_q15_neon(int16x8_t vec)
+{
+    float32x4_t tempF;
+    int32x4_t tempHI,tempLO;
+
+    tempLO = vmovl_s16(vget_low_s16(vec));
+    tempF = vcvtq_n_f32_s32(tempLO,15);
+    tempF = __arm_vec_sqrt_f32_neon(tempF);
+    tempLO = vcvtq_n_s32_f32(tempF,15);
+
+    tempHI = vmovl_s16(vget_high_s16(vec));
+    tempF = vcvtq_n_f32_s32(tempHI,15);
+    tempF = __arm_vec_sqrt_f32_neon(tempF);
+    tempHI = vcvtq_n_s32_f32(tempF,15);
+
+    return(vcombine_s16(vqmovn_s32(tempLO),vqmovn_s32(tempHI)));
+}
+
+__STATIC_INLINE int32x4_t __arm_vec_sqrt_q31_neon(int32x4_t vec)
+{
+  float32x4_t temp;
+
+  temp = vcvtq_n_f32_s32(vec,31);
+  temp = __arm_vec_sqrt_f32_neon(temp);
+  return(vcvtq_n_s32_f32(temp,31));
+}
+
+#endif /*  (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+#ifdef   __cplusplus
+}
+#endif
+
+
+#endif /* _ARM_VEC_MATH_H */
+
+/**
+ *
+ * End of file.
+ */
diff --git a/Libraries/CMSIS/DSP/Include/arm_vec_math_f16.h b/Libraries/CMSIS/DSP/Include/arm_vec_math_f16.h
new file mode 100755
index 00000000..91bd28aa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/arm_vec_math_f16.h
@@ -0,0 +1,312 @@
+/******************************************************************************
+ * @file     arm_vec_math_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_VEC_MATH_F16_H
+#define _ARM_VEC_MATH_F16_H
+
+#include "arm_math_types_f16.h"
+#include "arm_common_tables_f16.h"
+#include "arm_helium_utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+
+static const float16_t __logf_rng_f16=0.693147180f16;
+
+/* fast inverse approximation (3x newton) */
+__STATIC_INLINE f16x8_t vrecip_medprec_f16(
+    f16x8_t x)
+{
+    q15x8_t         m;
+    f16x8_t         b;
+    any16x8_t       xinv;
+    f16x8_t         ax = vabsq(x);
+
+    xinv.f = ax;
+
+    m = 0x03c00 - (xinv.i & 0x07c00);
+    xinv.i = xinv.i + m;
+    xinv.f = 1.41176471f16 - 0.47058824f16 * xinv.f;
+    xinv.i = xinv.i + m;
+
+    b = 2.0f16 - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f16 - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f16 - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    xinv.f = vdupq_m_n_f16(xinv.f, F16INFINITY, vcmpeqq_n_f16(x, 0.0f));
+    /*
+     * restore sign
+     */
+    xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq_n_f16(x, 0.0f));
+
+    return xinv.f;
+}
+
+/* fast inverse approximation (4x newton) */
+__STATIC_INLINE f16x8_t vrecip_hiprec_f16(
+    f16x8_t x)
+{
+    q15x8_t         m;
+    f16x8_t         b;
+    any16x8_t       xinv;
+    f16x8_t         ax = vabsq(x);
+
+    xinv.f = ax;
+
+    m = 0x03c00 - (xinv.i & 0x07c00);
+    xinv.i = xinv.i + m;
+    xinv.f = 1.41176471f16 - 0.47058824f16 * xinv.f;
+    xinv.i = xinv.i + m;
+
+    b = 2.0f16 - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f16 - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f16 - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    b = 2.0f16 - xinv.f * ax;
+    xinv.f = xinv.f * b;
+
+    xinv.f = vdupq_m_n_f16(xinv.f, F16INFINITY, vcmpeqq_n_f16(x, 0.0f));
+    /*
+     * restore sign
+     */
+    xinv.f = vnegq_m(xinv.f, xinv.f, vcmpltq_n_f16(x, 0.0f));
+
+    return xinv.f;
+}
+
+__STATIC_INLINE f16x8_t vdiv_f16(
+    f16x8_t num, f16x8_t den)
+{
+    return vmulq(num, vrecip_hiprec_f16(den));
+}
+
+
+/**
+  @brief         Single-precision taylor dev.
+  @param[in]     x              f16  vector input
+  @param[in]     coeffs         f16  vector coeffs
+  @return        destination    f16  vector
+ */
+
+__STATIC_INLINE float16x8_t vtaylor_polyq_f16(
+        float16x8_t           x,
+        const float16_t * coeffs)
+{
+    float16x8_t         A = vfmasq(vdupq_n_f16(coeffs[4]), x, coeffs[0]);
+    float16x8_t         B = vfmasq(vdupq_n_f16(coeffs[6]), x, coeffs[2]);
+    float16x8_t         C = vfmasq(vdupq_n_f16(coeffs[5]), x, coeffs[1]);
+    float16x8_t         D = vfmasq(vdupq_n_f16(coeffs[7]), x, coeffs[3]);
+    float16x8_t         x2 = vmulq(x, x);
+    float16x8_t         x4 = vmulq(x2, x2);
+    float16x8_t         res = vfmaq(vfmaq_f16(A, B, x2), vfmaq_f16(C, D, x2), x4);
+
+    return res;
+}
+
+#define VMANT_EXP_F16(x)  \
+    any16x8_t       r;    \
+    int16x8_t       n;    \
+                          \
+    r.f = x;              \
+    n = r.i >> 10;        \
+    n = n - 15;           \
+    r.i = r.i - (n << 10);\
+                          \
+    vecExpUnBiased = n;   \
+    vecTmpFlt1 = r.f;
+
+__STATIC_INLINE float16x8_t vlogq_f16(float16x8_t vecIn)
+{
+    q15x8_t             vecExpUnBiased;
+    float16x8_t         vecTmpFlt0, vecTmpFlt1;
+    float16x8_t         vecAcc0, vecAcc1, vecAcc2, vecAcc3;
+    float16x8_t         vecExpUnBiasedFlt;
+
+    /*
+     * extract exponent
+     */
+    VMANT_EXP_F16(vecIn);
+
+    vecTmpFlt0 = vecTmpFlt1 * vecTmpFlt1;
+    /*
+     * a = (__logf_lut_f16[4] * r.f) + (__logf_lut_f16[0]);
+     */
+    vecAcc0 = vdupq_n_f16(__logf_lut_f16[0]);
+    vecAcc0 = vfmaq(vecAcc0, vecTmpFlt1, __logf_lut_f16[4]);
+    /*
+     * b = (__logf_lut_f16[6] * r.f) + (__logf_lut_f16[2]);
+     */
+    vecAcc1 = vdupq_n_f16(__logf_lut_f16[2]);
+    vecAcc1 = vfmaq(vecAcc1, vecTmpFlt1, __logf_lut_f16[6]);
+    /*
+     * c = (__logf_lut_f16[5] * r.f) + (__logf_lut_f16[1]);
+     */
+    vecAcc2 = vdupq_n_f16(__logf_lut_f16[1]);
+    vecAcc2 = vfmaq(vecAcc2, vecTmpFlt1, __logf_lut_f16[5]);
+    /*
+     * d = (__logf_lut_f16[7] * r.f) + (__logf_lut_f16[3]);
+     */
+    vecAcc3 = vdupq_n_f16(__logf_lut_f16[3]);
+    vecAcc3 = vfmaq(vecAcc3, vecTmpFlt1, __logf_lut_f16[7]);
+    /*
+     * a = a + b * xx;
+     */
+    vecAcc0 = vfmaq(vecAcc0, vecAcc1, vecTmpFlt0);
+    /*
+     * c = c + d * xx;
+     */
+    vecAcc2 = vfmaq(vecAcc2, vecAcc3, vecTmpFlt0);
+    /*
+     * xx = xx * xx;
+     */
+    vecTmpFlt0 = vecTmpFlt0 * vecTmpFlt0;
+    vecExpUnBiasedFlt = vcvtq_f16_s16(vecExpUnBiased);
+    /*
+     * r.f = a + c * xx;
+     */
+    vecAcc0 = vfmaq(vecAcc0, vecAcc2, vecTmpFlt0);
+    /*
+     * add exponent
+     * r.f = r.f + ((float32_t) m) * __logf_rng_f16;
+     */
+    vecAcc0 = vfmaq(vecAcc0, vecExpUnBiasedFlt, __logf_rng_f16);
+    // set log0 down to -inf
+    vecAcc0 = vdupq_m_n_f16(vecAcc0, -(_Float16)F16INFINITY, vcmpeqq_n_f16(vecIn, 0.0f));
+    return vecAcc0;
+}
+
+__STATIC_INLINE float16x8_t vexpq_f16(
+    float16x8_t x)
+{
+    // Perform range reduction [-log(2),log(2)]
+    int16x8_t       m = vcvtq_s16_f16(vmulq_n_f16(x, 1.4426950408f16));
+    float16x8_t     val = vfmsq_f16(x, vcvtq_f16_s16(m), vdupq_n_f16(0.6931471805f16));
+
+    // Polynomial Approximation
+    float16x8_t         poly = vtaylor_polyq_f16(val, exp_tab_f16);
+
+    // Reconstruct
+    poly = (float16x8_t) (vqaddq_s16((int16x8_t) (poly), vqshlq_n_s16(m, 10)));
+
+    poly = vdupq_m_n_f16(poly, 0.0f16, vcmpltq_n_s16(m, -14));
+    return poly;
+}
+
+__STATIC_INLINE float16x8_t arm_vec_exponent_f16(float16x8_t x, int16_t nb)
+{
+    float16x8_t         r = x;
+    nb--;
+    while (nb > 0) {
+        r = vmulq(r, x);
+        nb--;
+    }
+    return (r);
+}
+
+__STATIC_INLINE f16x8_t vpowq_f16(
+    f16x8_t val,
+    f16x8_t n)
+{
+    return vexpq_f16(vmulq_f16(n, vlogq_f16(val)));
+}
+
+#define INV_NEWTON_INIT_F16  0x7773
+
+__STATIC_INLINE f16x8_t vrecip_f16(f16x8_t vecIn)
+{
+    f16x8_t     vecSx, vecW, vecTmp;
+    any16x8_t   v;
+
+    vecSx = vabsq(vecIn);
+
+    v.f = vecIn;
+    v.i = vsubq(vdupq_n_s16(INV_NEWTON_INIT_F16), v.i);
+
+    vecW = vmulq(vecSx, v.f);
+
+    // v.f = v.f * (8 + w * (-28 + w * (56 + w * (-70 + w *(56 + w * (-28 + w * (8 - w)))))));
+    vecTmp = vsubq(vdupq_n_f16(8.0f16), vecW);
+    vecTmp = vfmasq_n_f16(vecW, vecTmp, -28.0f16);
+    vecTmp = vfmasq_n_f16(vecW, vecTmp, 56.0f16);
+    vecTmp = vfmasq_n_f16(vecW, vecTmp, -70.0f16);
+    vecTmp = vfmasq_n_f16(vecW, vecTmp, 56.0f16);
+    vecTmp = vfmasq_n_f16(vecW, vecTmp, -28.0f16);
+    vecTmp = vfmasq_n_f16(vecW, vecTmp, 8.0f16);
+    v.f = vmulq(v.f,  vecTmp);
+
+    v.f = vdupq_m_n_f16(v.f, F16INFINITY, vcmpeqq_n_f16(vecIn, 0.0f));
+    /*
+     * restore sign
+     */
+    v.f = vnegq_m(v.f, v.f, vcmpltq_n_f16(vecIn, 0.0f));
+    return v.f;
+}
+
+__STATIC_INLINE f16x8_t vtanhq_f16(
+    f16x8_t val)
+{
+    f16x8_t         x =
+        vminnmq_f16(vmaxnmq_f16(val, vdupq_n_f16(-10.f16)), vdupq_n_f16(10.0f16));
+    f16x8_t         exp2x = vexpq_f16(vmulq_n_f16(x, 2.f16));
+    f16x8_t         num = vsubq_n_f16(exp2x, 1.f16);
+    f16x8_t         den = vaddq_n_f16(exp2x, 1.f16);
+    f16x8_t         tanh = vmulq_f16(num, vrecip_f16(den));
+    return tanh;
+}
+
+#endif /* defined(ARM_MATH_MVE_FLOAT16)  && !defined(ARM_MATH_AUTOVECTORIZE)*/
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ARM FLOAT16 SUPPORTED */
+
+#endif /* _ARM_VEC_MATH_F16_H */
+
+/**
+ *
+ * End of file.
+ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/basic_math_functions.h b/Libraries/CMSIS/DSP/Include/dsp/basic_math_functions.h
new file mode 100755
index 00000000..dcc1f2a5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/basic_math_functions.h
@@ -0,0 +1,880 @@
+/******************************************************************************
+ * @file     basic_math_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _BASIC_MATH_FUNCTIONS_H_
+#define _BASIC_MATH_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @defgroup groupMath Basic Math Functions
+ */
+
+ /**
+   * @brief Q7 vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q15 vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Floating-point vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+/**
+ * @brief Floating-point vector multiplication.
+ * @param[in]  pSrcA      points to the first input vector
+ * @param[in]  pSrcB      points to the second input vector
+ * @param[out] pDst       points to the output vector
+ * @param[in]  blockSize  number of samples in each vector
+ */
+void arm_mult_f64(
+const float64_t * pSrcA,
+const float64_t * pSrcB,
+	  float64_t * pDst,
+	  uint32_t blockSize);
+
+
+
+ /**
+   * @brief Floating-point vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+/**
+  * @brief Floating-point vector addition.
+  * @param[in]  pSrcA      points to the first input vector
+  * @param[in]  pSrcB      points to the second input vector
+  * @param[out] pDst       points to the output vector
+  * @param[in]  blockSize  number of samples in each vector
+  */
+ void arm_add_f64(
+ const float64_t * pSrcA,
+ const float64_t * pSrcB,
+	   float64_t * pDst,
+	   uint32_t blockSize);
+
+
+
+  /**
+   * @brief Q7 vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q15 vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Floating-point vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+  /**
+   * @brief Floating-point vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_f64(
+  const float64_t * pSrcA,
+  const float64_t * pSrcB,
+        float64_t * pDst,
+        uint32_t blockSize);
+
+
+
+  /**
+   * @brief Q7 vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q15 vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Multiplies a floating-point vector by a scalar.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  scale      scale factor to be applied
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_scale_f32(
+  const float32_t * pSrc,
+        float32_t scale,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+  /**
+   * @brief Multiplies a floating-point vector by a scalar.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  scale      scale factor to be applied
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_scale_f64(
+  const float64_t * pSrc,
+        float64_t scale,
+        float64_t * pDst,
+        uint32_t blockSize);
+
+
+
+  /**
+   * @brief Multiplies a Q7 vector by a scalar.
+   * @param[in]  pSrc        points to the input vector
+   * @param[in]  scaleFract  fractional portion of the scale value
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to the output vector
+   * @param[in]  blockSize   number of samples in the vector
+   */
+  void arm_scale_q7(
+  const q7_t * pSrc,
+        q7_t scaleFract,
+        int8_t shift,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Multiplies a Q15 vector by a scalar.
+   * @param[in]  pSrc        points to the input vector
+   * @param[in]  scaleFract  fractional portion of the scale value
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to the output vector
+   * @param[in]  blockSize   number of samples in the vector
+   */
+  void arm_scale_q15(
+  const q15_t * pSrc,
+        q15_t scaleFract,
+        int8_t shift,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Multiplies a Q31 vector by a scalar.
+   * @param[in]  pSrc        points to the input vector
+   * @param[in]  scaleFract  fractional portion of the scale value
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to the output vector
+   * @param[in]  blockSize   number of samples in the vector
+   */
+  void arm_scale_q31(
+  const q31_t * pSrc,
+        q31_t scaleFract,
+        int8_t shift,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q7 vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Floating-point vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+/**
+ * @brief Floating-point vector absolute value.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[out] pDst       points to the output buffer
+ * @param[in]  blockSize  number of samples in each vector
+ */
+void arm_abs_f64(
+const float64_t * pSrc,
+	  float64_t * pDst,
+	  uint32_t blockSize);
+
+
+
+  /**
+   * @brief Q15 vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Q31 vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Dot product of floating-point vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t blockSize,
+        float32_t * result);
+
+
+
+/**
+ * @brief Dot product of floating-point vectors.
+ * @param[in]  pSrcA      points to the first input vector
+ * @param[in]  pSrcB      points to the second input vector
+ * @param[in]  blockSize  number of samples in each vector
+ * @param[out] result     output result returned here
+ */
+void arm_dot_prod_f64(
+const float64_t * pSrcA,
+const float64_t * pSrcB,
+	  uint32_t blockSize,
+	  float64_t * result);
+
+
+
+  /**
+   * @brief Dot product of Q7 vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        uint32_t blockSize,
+        q31_t * result);
+
+
+  /**
+   * @brief Dot product of Q15 vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result);
+
+
+  /**
+   * @brief Dot product of Q31 vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result);
+
+
+  /**
+   * @brief  Shifts the elements of a Q7 vector a specified number of bits.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_shift_q7(
+  const q7_t * pSrc,
+        int8_t shiftBits,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Shifts the elements of a Q15 vector a specified number of bits.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_shift_q15(
+  const q15_t * pSrc,
+        int8_t shiftBits,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Shifts the elements of a Q31 vector a specified number of bits.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_shift_q31(
+  const q31_t * pSrc,
+        int8_t shiftBits,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+ * @brief  Adds a constant offset to a floating-point vector.
+ * @param[in]  pSrc       points to the input vector
+ * @param[in]  offset     is the offset to be added
+ * @param[out] pDst       points to the output vector
+ * @param[in]  blockSize  number of samples in the vector
+ */
+void arm_offset_f64(
+const float64_t * pSrc,
+	  float64_t offset,
+	  float64_t * pDst,
+	  uint32_t blockSize);
+
+
+
+  /**
+   * @brief  Adds a constant offset to a floating-point vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_f32(
+  const float32_t * pSrc,
+        float32_t offset,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+  /**
+   * @brief  Adds a constant offset to a Q7 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_q7(
+  const q7_t * pSrc,
+        q7_t offset,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Adds a constant offset to a Q15 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_q15(
+  const q15_t * pSrc,
+        q15_t offset,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Adds a constant offset to a Q31 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_q31(
+  const q31_t * pSrc,
+        q31_t offset,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Negates the elements of a floating-point vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+/**
+ * @brief  Negates the elements of a floating-point vector.
+ * @param[in]  pSrc       points to the input vector
+ * @param[out] pDst       points to the output vector
+ * @param[in]  blockSize  number of samples in the vector
+ */
+void arm_negate_f64(
+const float64_t * pSrc,
+	  float64_t * pDst,
+	  uint32_t blockSize);
+
+
+
+  /**
+   * @brief  Negates the elements of a Q7 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Negates the elements of a Q15 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Negates the elements of a Q31 vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+/**
+   * @brief         Compute the logical bitwise AND of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_and_u16(
+    const uint16_t * pSrcA,
+    const uint16_t * pSrcB,
+          uint16_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise AND of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_and_u32(
+    const uint32_t * pSrcA,
+    const uint32_t * pSrcB,
+          uint32_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise AND of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_and_u8(
+    const uint8_t * pSrcA,
+    const uint8_t * pSrcB,
+          uint8_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise OR of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_or_u16(
+    const uint16_t * pSrcA,
+    const uint16_t * pSrcB,
+          uint16_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise OR of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_or_u32(
+    const uint32_t * pSrcA,
+    const uint32_t * pSrcB,
+          uint32_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise OR of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_or_u8(
+    const uint8_t * pSrcA,
+    const uint8_t * pSrcB,
+          uint8_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise NOT of a fixed-point vector.
+   * @param[in]     pSrc       points to input vector 
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_not_u16(
+    const uint16_t * pSrc,
+          uint16_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise NOT of a fixed-point vector.
+   * @param[in]     pSrc       points to input vector 
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_not_u32(
+    const uint32_t * pSrc,
+          uint32_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise NOT of a fixed-point vector.
+   * @param[in]     pSrc       points to input vector 
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_not_u8(
+    const uint8_t * pSrc,
+          uint8_t * pDst,
+          uint32_t blockSize);
+
+/**
+   * @brief         Compute the logical bitwise XOR of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_xor_u16(
+    const uint16_t * pSrcA,
+    const uint16_t * pSrcB,
+          uint16_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise XOR of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_xor_u32(
+    const uint32_t * pSrcA,
+    const uint32_t * pSrcB,
+          uint32_t * pDst,
+          uint32_t blockSize);
+
+  /**
+   * @brief         Compute the logical bitwise XOR of two fixed-point vectors.
+   * @param[in]     pSrcA      points to input vector A
+   * @param[in]     pSrcB      points to input vector B
+   * @param[out]    pDst       points to output vector
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_xor_u8(
+    const uint8_t * pSrcA,
+    const uint8_t * pSrcB,
+          uint8_t * pDst,
+    uint32_t blockSize);
+
+  /**
+  @brief         Elementwise floating-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+
+void arm_clip_f32(const float32_t * pSrc, 
+  float32_t * pDst, 
+  float32_t low, 
+  float32_t high, 
+  uint32_t numSamples);
+
+  /**
+  @brief         Elementwise fixed-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+
+void arm_clip_q31(const q31_t * pSrc, 
+  q31_t * pDst, 
+  q31_t low, 
+  q31_t high, 
+  uint32_t numSamples);
+
+  /**
+  @brief         Elementwise fixed-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+
+void arm_clip_q15(const q15_t * pSrc, 
+  q15_t * pDst, 
+  q15_t low, 
+  q15_t high, 
+  uint32_t numSamples);
+
+  /**
+  @brief         Elementwise fixed-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+
+void arm_clip_q7(const q7_t * pSrc, 
+  q7_t * pDst, 
+  q7_t low, 
+  q7_t high, 
+  uint32_t numSamples);
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _BASIC_MATH_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/basic_math_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/basic_math_functions_f16.h
new file mode 100755
index 00000000..de9f58ba
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/basic_math_functions_f16.h
@@ -0,0 +1,168 @@
+/******************************************************************************
+ * @file     basic_math_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _BASIC_MATH_FUNCTIONS_F16_H_
+#define _BASIC_MATH_FUNCTIONS_F16_H_
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+  /**
+   * @brief Floating-point vector addition.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_add_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Floating-point vector subtraction.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_sub_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+    /**
+   * @brief Multiplies a floating-point vector by a scalar.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  scale      scale factor to be applied
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_scale_f16(
+  const float16_t * pSrc,
+        float16_t scale,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+    /**
+   * @brief Floating-point vector absolute value.
+   * @param[in]  pSrc       points to the input buffer
+   * @param[out] pDst       points to the output buffer
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_abs_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Adds a constant offset to a floating-point vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[in]  offset     is the offset to be added
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_offset_f16(
+  const float16_t * pSrc,
+        float16_t offset,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Dot product of floating-point vectors.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[in]  blockSize  number of samples in each vector
+   * @param[out] result     output result returned here
+   */
+  void arm_dot_prod_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        uint32_t blockSize,
+        float16_t * result);
+
+  /**
+   * @brief Floating-point vector multiplication.
+   * @param[in]  pSrcA      points to the first input vector
+   * @param[in]  pSrcB      points to the second input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in each vector
+   */
+  void arm_mult_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Negates the elements of a floating-point vector.
+   * @param[in]  pSrc       points to the input vector
+   * @param[out] pDst       points to the output vector
+   * @param[in]  blockSize  number of samples in the vector
+   */
+  void arm_negate_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+  /**
+  @brief         Elementwise floating-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+
+void arm_clip_f16(const float16_t * pSrc, 
+  float16_t * pDst, 
+  float16_t low, 
+  float16_t high, 
+  uint32_t numSamples);
+
+#endif /* defined(ARM_FLOAT16_SUPPORTED)*/
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _BASIC_MATH_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/bayes_functions.h b/Libraries/CMSIS/DSP/Include/dsp/bayes_functions.h
new file mode 100755
index 00000000..824c50e8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/bayes_functions.h
@@ -0,0 +1,89 @@
+/******************************************************************************
+ * @file     bayes_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _BAYES_FUNCTIONS_H_
+#define _BAYES_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/statistics_functions.h"
+
+/**
+ * @defgroup groupBayes Bayesian estimators
+ *
+ * Implement the naive gaussian Bayes estimator.
+ * The training must be done from scikit-learn.
+ *
+ * The parameters can be easily
+ * generated from the scikit-learn object. Some examples are given in
+ * DSP/Testing/PatternGeneration/Bayes.py
+ */
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @brief Instance structure for Naive Gaussian Bayesian estimator.
+ */
+typedef struct
+{
+  uint32_t vectorDimension;  /**< Dimension of vector space */
+  uint32_t numberOfClasses;  /**< Number of different classes  */
+  const float32_t *theta;          /**< Mean values for the Gaussians */
+  const float32_t *sigma;          /**< Variances for the Gaussians */
+  const float32_t *classPriors;    /**< Class prior probabilities */
+  float32_t epsilon;         /**< Additive value to variances */
+} arm_gaussian_naive_bayes_instance_f32;
+
+/**
+ * @brief Naive Gaussian Bayesian Estimator
+ *
+ * @param[in]  S                        points to a naive bayes instance structure
+ * @param[in]  in                       points to the elements of the input vector.
+ * @param[out] *pOutputProbabilities    points to a buffer of length numberOfClasses containing estimated probabilities
+ * @param[out] *pBufferB                points to a temporary buffer of length numberOfClasses
+ * @return The predicted class
+ *
+ */
+
+
+uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, 
+   const float32_t * in, 
+   float32_t *pOutputProbabilities,
+   float32_t *pBufferB);
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _BAYES_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/bayes_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/bayes_functions_f16.h
new file mode 100755
index 00000000..5c4ae42f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/bayes_functions_f16.h
@@ -0,0 +1,80 @@
+/******************************************************************************
+ * @file     bayes_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _BAYES_FUNCTIONS_F16_H_
+#define _BAYES_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/statistics_functions_f16.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+ * @brief Instance structure for Naive Gaussian Bayesian estimator.
+ */
+typedef struct
+{
+  uint32_t vectorDimension;  /**< Dimension of vector space */
+  uint32_t numberOfClasses;  /**< Number of different classes  */
+  const float16_t *theta;          /**< Mean values for the Gaussians */
+  const float16_t *sigma;          /**< Variances for the Gaussians */
+  const float16_t *classPriors;    /**< Class prior probabilities */
+  float16_t epsilon;         /**< Additive value to variances */
+} arm_gaussian_naive_bayes_instance_f16;
+
+/**
+ * @brief Naive Gaussian Bayesian Estimator
+ *
+ * @param[in]  S                        points to a naive bayes instance structure
+ * @param[in]  in                       points to the elements of the input vector.
+ * @param[out] *pOutputProbabilities    points to a buffer of length numberOfClasses containing estimated probabilities
+ * @param[out] *pBufferB                points to a temporary buffer of length numberOfClasses
+ * @return The predicted class
+ *
+ */
+
+
+uint32_t arm_gaussian_naive_bayes_predict_f16(const arm_gaussian_naive_bayes_instance_f16 *S, 
+   const float16_t * in, 
+   float16_t *pOutputProbabilities,
+   float16_t *pBufferB);
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _BAYES_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/complex_math_functions.h b/Libraries/CMSIS/DSP/Include/dsp/complex_math_functions.h
new file mode 100755
index 00000000..1339ebae
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/complex_math_functions.h
@@ -0,0 +1,345 @@
+/******************************************************************************
+ * @file     complex_math_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _COMPLEX_MATH_FUNCTIONS_H_
+#define _COMPLEX_MATH_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+#include "dsp/fast_math_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @defgroup groupCmplxMath Complex Math Functions
+ * This set of functions operates on complex data vectors.
+ * The data in the complex arrays is stored in an interleaved fashion
+ * (real, imag, real, imag, ...).
+ * In the API functions, the number of samples in a complex array refers
+ * to the number of complex values; the array contains twice this number of
+ * real values.
+ */
+
+ /**
+   * @brief  Floating-point complex conjugate.
+   * @param[in]  pSrc        points to the input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_conj_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+  /**
+   * @brief  Q31 complex conjugate.
+   * @param[in]  pSrc        points to the input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_conj_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex conjugate.
+   * @param[in]  pSrc        points to the input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_conj_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Floating-point complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Floating-point complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+/**
+   * @brief  Floating-point complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+
+/**
+   * @brief  Floating-point complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+  /**
+   * @brief  Q15 complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_fast_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q15 complex dot product
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   * @param[out] realResult  real part of the result returned here
+   * @param[out] imagResult  imaginary part of the result returned here
+   */
+  void arm_cmplx_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t numSamples,
+        q31_t * realResult,
+        q31_t * imagResult);
+
+
+  /**
+   * @brief  Q31 complex dot product
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   * @param[out] realResult  real part of the result returned here
+   * @param[out] imagResult  imaginary part of the result returned here
+   */
+  void arm_cmplx_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t numSamples,
+        q63_t * realResult,
+        q63_t * imagResult);
+
+
+  /**
+   * @brief  Floating-point complex dot product
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   * @param[out] realResult  real part of the result returned here
+   * @param[out] imagResult  imaginary part of the result returned here
+   */
+  void arm_cmplx_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t numSamples,
+        float32_t * realResult,
+        float32_t * imagResult);
+
+
+  /**
+   * @brief  Q15 complex-by-real multiplication
+   * @param[in]  pSrcCmplx   points to the complex input vector
+   * @param[in]  pSrcReal    points to the real input vector
+   * @param[out] pCmplxDst   points to the complex output vector
+   * @param[in]  numSamples  number of samples in each vector
+   */
+  void arm_cmplx_mult_real_q15(
+  const q15_t * pSrcCmplx,
+  const q15_t * pSrcReal,
+        q15_t * pCmplxDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex-by-real multiplication
+   * @param[in]  pSrcCmplx   points to the complex input vector
+   * @param[in]  pSrcReal    points to the real input vector
+   * @param[out] pCmplxDst   points to the complex output vector
+   * @param[in]  numSamples  number of samples in each vector
+   */
+  void arm_cmplx_mult_real_q31(
+  const q31_t * pSrcCmplx,
+  const q31_t * pSrcReal,
+        q31_t * pCmplxDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Floating-point complex-by-real multiplication
+   * @param[in]  pSrcCmplx   points to the complex input vector
+   * @param[in]  pSrcReal    points to the real input vector
+   * @param[out] pCmplxDst   points to the complex output vector
+   * @param[in]  numSamples  number of samples in each vector
+   */
+  void arm_cmplx_mult_real_f32(
+  const float32_t * pSrcCmplx,
+  const float32_t * pSrcReal,
+        float32_t * pCmplxDst,
+        uint32_t numSamples);
+
+  /**
+   * @brief  Q15 complex-by-complex multiplication
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_mult_cmplx_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Q31 complex-by-complex multiplication
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_mult_cmplx_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t numSamples);
+
+
+  /**
+   * @brief  Floating-point complex-by-complex multiplication
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_mult_cmplx_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t numSamples);
+
+
+
+/**
+ * @brief  Floating-point complex-by-complex multiplication
+ * @param[in]  pSrcA       points to the first input vector
+ * @param[in]  pSrcB       points to the second input vector
+ * @param[out] pDst        points to the output vector
+ * @param[in]  numSamples  number of complex samples in each vector
+ */
+void arm_cmplx_mult_cmplx_f64(
+const float64_t * pSrcA,
+const float64_t * pSrcB,
+	  float64_t * pDst,
+	  uint32_t numSamples);
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _COMPLEX_MATH_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h
new file mode 100755
index 00000000..b17f9314
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/complex_math_functions_f16.h
@@ -0,0 +1,123 @@
+/******************************************************************************
+ * @file     complex_math_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _COMPLEX_MATH_FUNCTIONS_F16_H_
+#define _COMPLEX_MATH_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+#include "dsp/fast_math_functions_f16.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+ /**
+   * @brief  Floating-point complex conjugate.
+   * @param[in]  pSrc        points to the input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_conj_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples);
+
+ /**
+   * @brief  Floating-point complex magnitude squared
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_squared_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples);
+
+  /**
+   * @brief  Floating-point complex magnitude
+   * @param[in]  pSrc        points to the complex input vector
+   * @param[out] pDst        points to the real output vector
+   * @param[in]  numSamples  number of complex samples in the input vector
+   */
+  void arm_cmplx_mag_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples);
+
+  /**
+   * @brief  Floating-point complex dot product
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   * @param[out] realResult  real part of the result returned here
+   * @param[out] imagResult  imaginary part of the result returned here
+   */
+  void arm_cmplx_dot_prod_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        uint32_t numSamples,
+        float16_t * realResult,
+        float16_t * imagResult);
+
+   /**
+   * @brief  Floating-point complex-by-real multiplication
+   * @param[in]  pSrcCmplx   points to the complex input vector
+   * @param[in]  pSrcReal    points to the real input vector
+   * @param[out] pCmplxDst   points to the complex output vector
+   * @param[in]  numSamples  number of samples in each vector
+   */
+  void arm_cmplx_mult_real_f16(
+  const float16_t * pSrcCmplx,
+  const float16_t * pSrcReal,
+        float16_t * pCmplxDst,
+        uint32_t numSamples);
+
+  /**
+   * @brief  Floating-point complex-by-complex multiplication
+   * @param[in]  pSrcA       points to the first input vector
+   * @param[in]  pSrcB       points to the second input vector
+   * @param[out] pDst        points to the output vector
+   * @param[in]  numSamples  number of complex samples in each vector
+   */
+  void arm_cmplx_mult_cmplx_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t numSamples);
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _COMPLEX_MATH_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/controller_functions.h b/Libraries/CMSIS/DSP/Include/dsp/controller_functions.h
new file mode 100755
index 00000000..7c08c243
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/controller_functions.h
@@ -0,0 +1,791 @@
+/******************************************************************************
+ * @file     controller_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _CONTROLLER_FUNCTIONS_H_
+#define _CONTROLLER_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+  /**
+   * @brief Macros required for SINE and COSINE Controller functions
+   */
+
+#define CONTROLLER_Q31_SHIFT  (32 - 9)
+  /* 1.31(q31) Fixed value of 2/360 */
+  /* -1 to +1 is divided into 360 values so total spacing is (2/360) */
+#define INPUT_SPACING         0xB60B61
+  
+/**
+ * @defgroup groupController Controller Functions
+ */
+
+
+ /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @addtogroup SinCos
+   * @{
+   */
+
+/**
+   * @brief  Floating-point sin_cos function.
+   * @param[in]  theta   input value in degrees
+   * @param[out] pSinVal  points to the processed sine output.
+   * @param[out] pCosVal  points to the processed cos output.
+   */
+  void arm_sin_cos_f32(
+        float32_t theta,
+        float32_t * pSinVal,
+        float32_t * pCosVal);
+
+
+  /**
+   * @brief  Q31 sin_cos function.
+   * @param[in]  theta    scaled input value in degrees
+   * @param[out] pSinVal  points to the processed sine output.
+   * @param[out] pCosVal  points to the processed cosine output.
+   */
+  void arm_sin_cos_q31(
+        q31_t theta,
+        q31_t * pSinVal,
+        q31_t * pCosVal);
+
+  /**
+   * @} end of SinCos group
+   */
+
+ /**
+   * @ingroup groupController
+   */
+
+/**
+   * @defgroup PID PID Motor Control
+   *
+   * A Proportional Integral Derivative (PID) controller is a generic feedback control
+   * loop mechanism widely used in industrial control systems.
+   * A PID controller is the most commonly used type of feedback controller.
+   *
+   * This set of functions implements (PID) controllers
+   * for Q15, Q31, and floating-point data types.  The functions operate on a single sample
+   * of data and each call to the function returns a single processed value.
+   * <code>S</code> points to an instance of the PID control data structure.  <code>in</code>
+   * is the input sample value. The functions return the output value.
+   *
+   * \par Algorithm:
+   * <pre>
+   *    y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]
+   *    A0 = Kp + Ki + Kd
+   *    A1 = (-Kp ) - (2 * Kd )
+   *    A2 = Kd
+   * </pre>
+   *
+   * \par
+   * where \c Kp is proportional constant, \c Ki is Integral constant and \c Kd is Derivative constant
+   *
+   * \par
+   * \image html PID.gif "Proportional Integral Derivative Controller"
+   *
+   * \par
+   * The PID controller calculates an "error" value as the difference between
+   * the measured output and the reference input.
+   * The controller attempts to minimize the error by adjusting the process control inputs.
+   * The proportional value determines the reaction to the current error,
+   * the integral value determines the reaction based on the sum of recent errors,
+   * and the derivative value determines the reaction based on the rate at which the error has been changing.
+   *
+   * \par Instance Structure
+   * The Gains A0, A1, A2 and state variables for a PID controller are stored together in an instance data structure.
+   * A separate instance structure must be defined for each PID Controller.
+   * There are separate instance structure declarations for each of the 3 supported data types.
+   *
+   * \par Reset Functions
+   * There is also an associated reset function for each data type which clears the state array.
+   *
+   * \par Initialization Functions
+   * There is also an associated initialization function for each data type.
+   * The initialization function performs the following operations:
+   * - Initializes the Gains A0, A1, A2 from Kp,Ki, Kd gains.
+   * - Zeros out the values in the state buffer.
+   *
+   * \par
+   * Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+   *
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the fixed-point versions of the PID Controller functions.
+   * In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+
+  /**
+   * @brief Instance structure for the Q15 PID Control.
+   */
+  typedef struct
+  {
+          q15_t A0;           /**< The derived gain, A0 = Kp + Ki + Kd . */
+#if !defined (ARM_MATH_DSP)
+          q15_t A1;           /**< The derived gain A1 = -Kp - 2Kd */
+          q15_t A2;           /**< The derived gain A1 = Kd. */
+#else
+          q31_t A1;           /**< The derived gain A1 = -Kp - 2Kd | Kd.*/
+#endif
+          q15_t state[3];     /**< The state array of length 3. */
+          q15_t Kp;           /**< The proportional gain. */
+          q15_t Ki;           /**< The integral gain. */
+          q15_t Kd;           /**< The derivative gain. */
+  } arm_pid_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 PID Control.
+   */
+  typedef struct
+  {
+          q31_t A0;            /**< The derived gain, A0 = Kp + Ki + Kd . */
+          q31_t A1;            /**< The derived gain, A1 = -Kp - 2Kd. */
+          q31_t A2;            /**< The derived gain, A2 = Kd . */
+          q31_t state[3];      /**< The state array of length 3. */
+          q31_t Kp;            /**< The proportional gain. */
+          q31_t Ki;            /**< The integral gain. */
+          q31_t Kd;            /**< The derivative gain. */
+  } arm_pid_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point PID Control.
+   */
+  typedef struct
+  {
+          float32_t A0;          /**< The derived gain, A0 = Kp + Ki + Kd . */
+          float32_t A1;          /**< The derived gain, A1 = -Kp - 2Kd. */
+          float32_t A2;          /**< The derived gain, A2 = Kd . */
+          float32_t state[3];    /**< The state array of length 3. */
+          float32_t Kp;          /**< The proportional gain. */
+          float32_t Ki;          /**< The integral gain. */
+          float32_t Kd;          /**< The derivative gain. */
+  } arm_pid_instance_f32;
+
+
+
+  /**
+   * @brief  Initialization function for the floating-point PID Control.
+   * @param[in,out] S               points to an instance of the PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   */
+  void arm_pid_init_f32(
+        arm_pid_instance_f32 * S,
+        int32_t resetStateFlag);
+
+
+  /**
+   * @brief  Reset function for the floating-point PID Control.
+   * @param[in,out] S  is an instance of the floating-point PID Control structure
+   */
+  void arm_pid_reset_f32(
+        arm_pid_instance_f32 * S);
+
+
+  /**
+   * @brief  Initialization function for the Q31 PID Control.
+   * @param[in,out] S               points to an instance of the Q15 PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   */
+  void arm_pid_init_q31(
+        arm_pid_instance_q31 * S,
+        int32_t resetStateFlag);
+
+
+  /**
+   * @brief  Reset function for the Q31 PID Control.
+   * @param[in,out] S   points to an instance of the Q31 PID Control structure
+   */
+
+  void arm_pid_reset_q31(
+        arm_pid_instance_q31 * S);
+
+
+  /**
+   * @brief  Initialization function for the Q15 PID Control.
+   * @param[in,out] S               points to an instance of the Q15 PID structure.
+   * @param[in]     resetStateFlag  flag to reset the state. 0 = no change in state 1 = reset the state.
+   */
+  void arm_pid_init_q15(
+        arm_pid_instance_q15 * S,
+        int32_t resetStateFlag);
+
+
+  /**
+   * @brief  Reset function for the Q15 PID Control.
+   * @param[in,out] S  points to an instance of the q15 PID Control structure
+   */
+  void arm_pid_reset_q15(
+        arm_pid_instance_q15 * S);
+
+
+
+  /**
+   * @addtogroup PID
+   * @{
+   */
+
+  /**
+   * @brief         Process function for the floating-point PID Control.
+   * @param[in,out] S   is an instance of the floating-point PID Control structure
+   * @param[in]     in  input sample to process
+   * @return        processed output sample.
+   */
+  __STATIC_FORCEINLINE float32_t arm_pid_f32(
+  arm_pid_instance_f32 * S,
+  float32_t in)
+  {
+    float32_t out;
+
+    /* y[n] = y[n-1] + A0 * x[n] + A1 * x[n-1] + A2 * x[n-2]  */
+    out = (S->A0 * in) +
+      (S->A1 * S->state[0]) + (S->A2 * S->state[1]) + (S->state[2]);
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+
+  }
+
+/**
+  @brief         Process function for the Q31 PID Control.
+  @param[in,out] S  points to an instance of the Q31 PID Control structure
+  @param[in]     in  input sample to process
+  @return        processed output sample.
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 64-bit accumulator.
+         The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+         Thus, if the accumulator result overflows it wraps around rather than clip.
+         In order to avoid overflows completely the input signal must be scaled down by 2 bits as there are four additions.
+         After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ */
+__STATIC_FORCEINLINE q31_t arm_pid_q31(
+  arm_pid_instance_q31 * S,
+  q31_t in)
+  {
+    q63_t acc;
+    q31_t out;
+
+    /* acc = A0 * x[n]  */
+    acc = (q63_t) S->A0 * in;
+
+    /* acc += A1 * x[n-1] */
+    acc += (q63_t) S->A1 * S->state[0];
+
+    /* acc += A2 * x[n-2]  */
+    acc += (q63_t) S->A2 * S->state[1];
+
+    /* convert output to 1.31 format to add y[n-1] */
+    out = (q31_t) (acc >> 31U);
+
+    /* out += y[n-1] */
+    out += S->state[2];
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+  }
+
+
+/**
+  @brief         Process function for the Q15 PID Control.
+  @param[in,out] S   points to an instance of the Q15 PID Control structure
+  @param[in]     in  input sample to process
+  @return        processed output sample.
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using a 64-bit internal accumulator.
+         Both Gains and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+         The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+         There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+         After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+         Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+__STATIC_FORCEINLINE q15_t arm_pid_q15(
+  arm_pid_instance_q15 * S,
+  q15_t in)
+  {
+    q63_t acc;
+    q15_t out;
+
+#if defined (ARM_MATH_DSP)
+    /* Implementation of PID controller */
+
+    /* acc = A0 * x[n]  */
+    acc = (q31_t) __SMUAD((uint32_t)S->A0, (uint32_t)in);
+
+    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+    acc = (q63_t)__SMLALD((uint32_t)S->A1, (uint32_t)read_q15x2 (S->state), (uint64_t)acc);
+#else
+    /* acc = A0 * x[n]  */
+    acc = ((q31_t) S->A0) * in;
+
+    /* acc += A1 * x[n-1] + A2 * x[n-2]  */
+    acc += (q31_t) S->A1 * S->state[0];
+    acc += (q31_t) S->A2 * S->state[1];
+#endif
+
+    /* acc += y[n-1] */
+    acc += (q31_t) S->state[2] << 15;
+
+    /* saturate the output */
+    out = (q15_t) (__SSAT((q31_t)(acc >> 15), 16));
+
+    /* Update state */
+    S->state[1] = S->state[0];
+    S->state[0] = in;
+    S->state[2] = out;
+
+    /* return to application */
+    return (out);
+  }
+
+  /**
+   * @} end of PID group
+   */
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup park Vector Park Transform
+   *
+   * Forward Park transform converts the input two-coordinate vector to flux and torque components.
+   * The Park transform can be used to realize the transformation of the <code>Ialpha</code> and the <code>Ibeta</code> currents
+   * from the stationary to the moving reference frame and control the spatial relationship between
+   * the stator vector current and rotor flux vector.
+   * If we consider the d axis aligned with the rotor flux, the diagram below shows the
+   * current vector and the relationship from the two reference frames:
+   * \image html park.gif "Stator current space vector and its component in (a,b) and in the d,q rotating reference frame"
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html parkFormula.gif
+   * where <code>Ialpha</code> and <code>Ibeta</code> are the stator vector components,
+   * <code>pId</code> and <code>pIq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
+   * cosine and sine values of theta (rotor flux position).
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Park transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup park
+   * @{
+   */
+
+  /**
+   * @brief Floating-point Park transform
+   * @param[in]  Ialpha  input two-phase vector coordinate alpha
+   * @param[in]  Ibeta   input two-phase vector coordinate beta
+   * @param[out] pId     points to output   rotor reference frame d
+   * @param[out] pIq     points to output   rotor reference frame q
+   * @param[in]  sinVal  sine value of rotation angle theta
+   * @param[in]  cosVal  cosine value of rotation angle theta
+   * @return     none
+   *
+   * The function implements the forward Park transform.
+   *
+   */
+  __STATIC_FORCEINLINE void arm_park_f32(
+  float32_t Ialpha,
+  float32_t Ibeta,
+  float32_t * pId,
+  float32_t * pIq,
+  float32_t sinVal,
+  float32_t cosVal)
+  {
+    /* Calculate pId using the equation, pId = Ialpha * cosVal + Ibeta * sinVal */
+    *pId = Ialpha * cosVal + Ibeta * sinVal;
+
+    /* Calculate pIq using the equation, pIq = - Ialpha * sinVal + Ibeta * cosVal */
+    *pIq = -Ialpha * sinVal + Ibeta * cosVal;
+  }
+
+
+/**
+  @brief  Park transform for Q31 version
+  @param[in]  Ialpha  input two-phase vector coordinate alpha
+  @param[in]  Ibeta   input two-phase vector coordinate beta
+  @param[out] pId     points to output rotor reference frame d
+  @param[out] pIq     points to output rotor reference frame q
+  @param[in]  sinVal  sine value of rotation angle theta
+  @param[in]  cosVal  cosine value of rotation angle theta
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition and subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_park_q31(
+  q31_t Ialpha,
+  q31_t Ibeta,
+  q31_t * pId,
+  q31_t * pIq,
+  q31_t sinVal,
+  q31_t cosVal)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
+
+    /* Intermediate product is calculated by (Ialpha * cosVal) */
+    product1 = (q31_t) (((q63_t) (Ialpha) * (cosVal)) >> 31);
+
+    /* Intermediate product is calculated by (Ibeta * sinVal) */
+    product2 = (q31_t) (((q63_t) (Ibeta) * (sinVal)) >> 31);
+
+
+    /* Intermediate product is calculated by (Ialpha * sinVal) */
+    product3 = (q31_t) (((q63_t) (Ialpha) * (sinVal)) >> 31);
+
+    /* Intermediate product is calculated by (Ibeta * cosVal) */
+    product4 = (q31_t) (((q63_t) (Ibeta) * (cosVal)) >> 31);
+
+    /* Calculate pId by adding the two intermediate products 1 and 2 */
+    *pId = __QADD(product1, product2);
+
+    /* Calculate pIq by subtracting the two intermediate products 3 from 4 */
+    *pIq = __QSUB(product4, product3);
+  }
+
+  /**
+   * @} end of park group
+   */
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup inv_park Vector Inverse Park transform
+   * Inverse Park transform converts the input flux and torque components to two-coordinate vector.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html parkInvFormula.gif
+   * where <code>pIalpha</code> and <code>pIbeta</code> are the stator vector components,
+   * <code>Id</code> and <code>Iq</code> are rotor vector components and <code>cosVal</code> and <code>sinVal</code> are the
+   * cosine and sine values of theta (rotor flux position).
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Park transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup inv_park
+   * @{
+   */
+
+   /**
+   * @brief  Floating-point Inverse Park transform
+   * @param[in]  Id       input coordinate of rotor reference frame d
+   * @param[in]  Iq       input coordinate of rotor reference frame q
+   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+   * @param[in]  sinVal   sine value of rotation angle theta
+   * @param[in]  cosVal   cosine value of rotation angle theta
+   * @return     none
+   */
+  __STATIC_FORCEINLINE void arm_inv_park_f32(
+  float32_t Id,
+  float32_t Iq,
+  float32_t * pIalpha,
+  float32_t * pIbeta,
+  float32_t sinVal,
+  float32_t cosVal)
+  {
+    /* Calculate pIalpha using the equation, pIalpha = Id * cosVal - Iq * sinVal */
+    *pIalpha = Id * cosVal - Iq * sinVal;
+
+    /* Calculate pIbeta using the equation, pIbeta = Id * sinVal + Iq * cosVal */
+    *pIbeta = Id * sinVal + Iq * cosVal;
+  }
+
+
+/**
+  @brief  Inverse Park transform for   Q31 version
+  @param[in]  Id       input coordinate of rotor reference frame d
+  @param[in]  Iq       input coordinate of rotor reference frame q
+  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+  @param[in]  sinVal   sine value of rotation angle theta
+  @param[in]  cosVal   cosine value of rotation angle theta
+  @return     none
+
+  @par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_park_q31(
+  q31_t Id,
+  q31_t Iq,
+  q31_t * pIalpha,
+  q31_t * pIbeta,
+  q31_t sinVal,
+  q31_t cosVal)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+    q31_t product3, product4;                    /* Temporary variables used to store intermediate results */
+
+    /* Intermediate product is calculated by (Id * cosVal) */
+    product1 = (q31_t) (((q63_t) (Id) * (cosVal)) >> 31);
+
+    /* Intermediate product is calculated by (Iq * sinVal) */
+    product2 = (q31_t) (((q63_t) (Iq) * (sinVal)) >> 31);
+
+
+    /* Intermediate product is calculated by (Id * sinVal) */
+    product3 = (q31_t) (((q63_t) (Id) * (sinVal)) >> 31);
+
+    /* Intermediate product is calculated by (Iq * cosVal) */
+    product4 = (q31_t) (((q63_t) (Iq) * (cosVal)) >> 31);
+
+    /* Calculate pIalpha by using the two intermediate products 1 and 2 */
+    *pIalpha = __QSUB(product1, product2);
+
+    /* Calculate pIbeta by using the two intermediate products 3 and 4 */
+    *pIbeta = __QADD(product4, product3);
+  }
+
+  /**
+   * @} end of Inverse park group
+   */
+
+/**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup clarke Vector Clarke Transform
+   * Forward Clarke transform converts the instantaneous stator phases into a two-coordinate time invariant vector.
+   * Generally the Clarke transform uses three-phase currents <code>Ia, Ib and Ic</code> to calculate currents
+   * in the two-phase orthogonal stator axis <code>Ialpha</code> and <code>Ibeta</code>.
+   * When <code>Ialpha</code> is superposed with <code>Ia</code> as shown in the figure below
+   * \image html clarke.gif Stator current space vector and its components in (a,b).
+   * and <code>Ia + Ib + Ic = 0</code>, in this condition <code>Ialpha</code> and <code>Ibeta</code>
+   * can be calculated using only <code>Ia</code> and <code>Ib</code>.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html clarkeFormula.gif
+   * where <code>Ia</code> and <code>Ib</code> are the instantaneous stator phases and
+   * <code>pIalpha</code> and <code>pIbeta</code> are the two coordinates of time invariant vector.
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Clarke transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup clarke
+   * @{
+   */
+
+  /**
+   *
+   * @brief  Floating-point Clarke transform
+   * @param[in]  Ia       input three-phase coordinate <code>a</code>
+   * @param[in]  Ib       input three-phase coordinate <code>b</code>
+   * @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+   * @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+   * @return        none
+   */
+  __STATIC_FORCEINLINE void arm_clarke_f32(
+  float32_t Ia,
+  float32_t Ib,
+  float32_t * pIalpha,
+  float32_t * pIbeta)
+  {
+    /* Calculate pIalpha using the equation, pIalpha = Ia */
+    *pIalpha = Ia;
+
+    /* Calculate pIbeta using the equation, pIbeta = (1/sqrt(3)) * Ia + (2/sqrt(3)) * Ib */
+    *pIbeta = (0.57735026919f * Ia + 1.15470053838f * Ib);
+  }
+
+
+/**
+  @brief  Clarke transform for Q31 version
+  @param[in]  Ia       input three-phase coordinate <code>a</code>
+  @param[in]  Ib       input three-phase coordinate <code>b</code>
+  @param[out] pIalpha  points to output two-phase orthogonal vector axis alpha
+  @param[out] pIbeta   points to output two-phase orthogonal vector axis beta
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the addition, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_clarke_q31(
+  q31_t Ia,
+  q31_t Ib,
+  q31_t * pIalpha,
+  q31_t * pIbeta)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+
+    /* Calculating pIalpha from Ia by equation pIalpha = Ia */
+    *pIalpha = Ia;
+
+    /* Intermediate product is calculated by (1/(sqrt(3)) * Ia) */
+    product1 = (q31_t) (((q63_t) Ia * 0x24F34E8B) >> 30);
+
+    /* Intermediate product is calculated by (2/sqrt(3) * Ib) */
+    product2 = (q31_t) (((q63_t) Ib * 0x49E69D16) >> 30);
+
+    /* pIbeta is calculated by adding the intermediate products */
+    *pIbeta = __QADD(product1, product2);
+  }
+
+  /**
+   * @} end of clarke group
+   */
+
+
+  /**
+   * @ingroup groupController
+   */
+
+  /**
+   * @defgroup inv_clarke Vector Inverse Clarke Transform
+   * Inverse Clarke transform converts the two-coordinate time invariant vector into instantaneous stator phases.
+   *
+   * The function operates on a single sample of data and each call to the function returns the processed output.
+   * The library provides separate functions for Q31 and floating-point data types.
+   * \par Algorithm
+   * \image html clarkeInvFormula.gif
+   * where <code>pIa</code> and <code>pIb</code> are the instantaneous stator phases and
+   * <code>Ialpha</code> and <code>Ibeta</code> are the two coordinates of time invariant vector.
+   * \par Fixed-Point Behavior
+   * Care must be taken when using the Q31 version of the Clarke transform.
+   * In particular, the overflow and saturation behavior of the accumulator used must be considered.
+   * Refer to the function specific documentation below for usage guidelines.
+   */
+
+  /**
+   * @addtogroup inv_clarke
+   * @{
+   */
+
+   /**
+   * @brief  Floating-point Inverse Clarke transform
+   * @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
+   * @param[in]  Ibeta   input two-phase orthogonal vector axis beta
+   * @param[out] pIa     points to output three-phase coordinate <code>a</code>
+   * @param[out] pIb     points to output three-phase coordinate <code>b</code>
+   * @return     none
+   */
+  __STATIC_FORCEINLINE void arm_inv_clarke_f32(
+  float32_t Ialpha,
+  float32_t Ibeta,
+  float32_t * pIa,
+  float32_t * pIb)
+  {
+    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+    *pIa = Ialpha;
+
+    /* Calculating pIb from Ialpha and Ibeta by equation pIb = -(1/2) * Ialpha + (sqrt(3)/2) * Ibeta */
+    *pIb = -0.5f * Ialpha + 0.8660254039f * Ibeta;
+  }
+
+
+/**
+  @brief  Inverse Clarke transform for Q31 version
+  @param[in]  Ialpha  input two-phase orthogonal vector axis alpha
+  @param[in]  Ibeta   input two-phase orthogonal vector axis beta
+  @param[out] pIa     points to output three-phase coordinate <code>a</code>
+  @param[out] pIb     points to output three-phase coordinate <code>b</code>
+  @return     none
+
+  \par Scaling and Overflow Behavior
+         The function is implemented using an internal 32-bit accumulator.
+         The accumulator maintains 1.31 format by truncating lower 31 bits of the intermediate multiplication in 2.62 format.
+         There is saturation on the subtraction, hence there is no risk of overflow.
+ */
+__STATIC_FORCEINLINE void arm_inv_clarke_q31(
+  q31_t Ialpha,
+  q31_t Ibeta,
+  q31_t * pIa,
+  q31_t * pIb)
+  {
+    q31_t product1, product2;                    /* Temporary variables used to store intermediate results */
+
+    /* Calculating pIa from Ialpha by equation pIa = Ialpha */
+    *pIa = Ialpha;
+
+    /* Intermediate product is calculated by (1/(2*sqrt(3)) * Ia) */
+    product1 = (q31_t) (((q63_t) (Ialpha) * (0x40000000)) >> 31);
+
+    /* Intermediate product is calculated by (1/sqrt(3) * pIb) */
+    product2 = (q31_t) (((q63_t) (Ibeta) * (0x6ED9EBA1)) >> 31);
+
+    /* pIb is calculated by subtracting the products */
+    *pIb = __QSUB(product2, product1);
+  }
+
+  /**
+   * @} end of inv_clarke group
+   */
+
+
+
+  
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _CONTROLLER_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/controller_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/controller_functions_f16.h
new file mode 100755
index 00000000..8fae483c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/controller_functions_f16.h
@@ -0,0 +1,41 @@
+/******************************************************************************
+ * @file     controller_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _CONTROLLER_FUNCTIONS_F16_H_
+#define _CONTROLLER_FUNCTIONS_F16_H_
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _CONTROLLER_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/distance_functions.h b/Libraries/CMSIS/DSP/Include/dsp/distance_functions.h
new file mode 100755
index 00000000..3123fc3a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/distance_functions.h
@@ -0,0 +1,341 @@
+/******************************************************************************
+ * @file     distance_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _DISTANCE_FUNCTIONS_H_
+#define _DISTANCE_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/statistics_functions.h"
+#include "dsp/basic_math_functions.h"
+#include "dsp/fast_math_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+/**
+ * @defgroup groupDistance Distance functions
+ *
+ * Distance functions for use with clustering algorithms.
+ * There are distance functions for float vectors and boolean vectors.
+ *
+ */
+
+/* 6.14 bug */
+#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001)
+ 
+__attribute__((weak)) float __powisf2(float a, int b);
+
+#endif 
+
+/**
+ * @brief        Euclidean distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Euclidean distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float64_t arm_euclidean_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Bray-Curtis distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Canberra distance between two vectors
+ *
+ * This function may divide by zero when samples pA[i] and pB[i] are both zero.
+ * The result of the computation will be correct. So the division per zero may be
+ * ignored.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
+
+
+/**
+ * @brief        Chebyshev distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
+
+
+/**
+ * @brief        Chebyshev distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float64_t arm_chebyshev_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
+
+
+/**
+ * @brief        Cityblock (Manhattan) distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Cityblock (Manhattan) distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float64_t arm_cityblock_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Correlation distance between two vectors
+ *
+ * The input vectors are modified in place !
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float32_t arm_correlation_distance_f32(float32_t *pA,float32_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Cosine distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float32_t arm_cosine_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Cosine distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float64_t arm_cosine_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Jensen-Shannon distance between two vectors
+ *
+ * This function is assuming that elements of second vector are > 0
+ * and 0 only when the corresponding element of first vector is 0.
+ * Otherwise the result of the computation does not make sense
+ * and for speed reasons, the cases returning NaN or Infinity are not
+ * managed.
+ *
+ * When the function is computing x log (x / y) with x 0 and y 0,
+ * it will compute the right value (0) but a division per zero will occur
+ * and shoudl be ignored in client code.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB,uint32_t blockSize);
+
+/**
+ * @brief        Minkowski distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    n          Norm order (>= 2)
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+
+
+float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize);
+
+/**
+ * @brief        Dice distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    order           Distance order
+ * @param[in]    blockSize       Number of samples
+ * @return distance
+ *
+ */
+
+
+float32_t arm_dice_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Hamming distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_hamming_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Jaccard distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_jaccard_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Kulsinski distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_kulsinski_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Roger Stanimoto distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_rogerstanimoto_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Russell-Rao distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_russellrao_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Sokal-Michener distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_sokalmichener_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Sokal-Sneath distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_sokalsneath_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+/**
+ * @brief        Yule distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools);
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _DISTANCE_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/distance_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/distance_functions_f16.h
new file mode 100755
index 00000000..a7ceb3c1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/distance_functions_f16.h
@@ -0,0 +1,180 @@
+/******************************************************************************
+ * @file     distance_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _DISTANCE_FUNCTIONS_F16_H_
+#define _DISTANCE_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+/* 6.14 bug */
+#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001)
+/* Defined in minkowski_f32 */
+__attribute__((weak)) float __powisf2(float a, int b);
+#endif 
+
+#include "dsp/statistics_functions_f16.h"
+#include "dsp/basic_math_functions_f16.h"
+
+#include "dsp/fast_math_functions_f16.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+ * @brief        Euclidean distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float16_t arm_euclidean_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Bray-Curtis distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float16_t arm_braycurtis_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Canberra distance between two vectors
+ *
+ * This function may divide by zero when samples pA[i] and pB[i] are both zero.
+ * The result of the computation will be correct. So the division per zero may be
+ * ignored.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float16_t arm_canberra_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
+
+
+/**
+ * @brief        Chebyshev distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float16_t arm_chebyshev_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
+
+
+/**
+ * @brief        Cityblock (Manhattan) distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float16_t arm_cityblock_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Correlation distance between two vectors
+ *
+ * The input vectors are modified in place !
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float16_t arm_correlation_distance_f16(float16_t *pA,float16_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Cosine distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float16_t arm_cosine_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize);
+
+/**
+ * @brief        Jensen-Shannon distance between two vectors
+ *
+ * This function is assuming that elements of second vector are > 0
+ * and 0 only when the corresponding element of first vector is 0.
+ * Otherwise the result of the computation does not make sense
+ * and for speed reasons, the cases returning NaN or Infinity are not
+ * managed.
+ *
+ * When the function is computing x log (x / y) with x 0 and y 0,
+ * it will compute the right value (0) but a division per zero will occur
+ * and shoudl be ignored in client code.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float16_t arm_jensenshannon_distance_f16(const float16_t *pA,const float16_t *pB,uint32_t blockSize);
+
+/**
+ * @brief        Minkowski distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    n          Norm order (>= 2)
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+
+
+float16_t arm_minkowski_distance_f16(const float16_t *pA,const float16_t *pB, int32_t order, uint32_t blockSize);
+
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _DISTANCE_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/fast_math_functions.h b/Libraries/CMSIS/DSP/Include/dsp/fast_math_functions.h
new file mode 100755
index 00000000..6bb4ba78
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/fast_math_functions.h
@@ -0,0 +1,369 @@
+/******************************************************************************
+ * @file     fast_math_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _FAST_MATH_FUNCTIONS_H_
+#define _FAST_MATH_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+  /**
+   * @brief Macros required for SINE and COSINE Fast math approximations
+   */
+
+#define FAST_MATH_TABLE_SIZE  512
+#define FAST_MATH_Q31_SHIFT   (32 - 10)
+#define FAST_MATH_Q15_SHIFT   (16 - 10)
+  
+#ifndef PI
+  #define PI               3.14159265358979f
+#endif
+
+
+/**
+ * @defgroup groupFastMath Fast Math Functions
+ * This set of functions provides a fast approximation to sine, cosine, and square root.
+ * As compared to most of the other functions in the CMSIS math library, the fast math functions
+ * operate on individual values and not arrays.
+ * There are separate functions for Q15, Q31, and floating-point data.
+ *
+ */
+
+  /**
+   * @ingroup groupFastMath
+   */
+
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+   * @brief  Fast approximation to the trigonometric sine function for floating-point data.
+   * @param[in] x  input value in radians.
+   * @return  sin(x).
+   */
+  float32_t arm_sin_f32(
+  float32_t x);
+
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for Q31 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  sin(x).
+   */
+  q31_t arm_sin_q31(
+  q31_t x);
+
+
+  /**
+   * @brief  Fast approximation to the trigonometric sine function for Q15 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  sin(x).
+   */
+  q15_t arm_sin_q15(
+  q15_t x);
+
+/**
+  @} end of sin group
+ */
+
+/**
+  @addtogroup cos
+  @{
+ */
+
+  /**
+   * @brief  Fast approximation to the trigonometric cosine function for floating-point data.
+   * @param[in] x  input value in radians.
+   * @return  cos(x).
+   */
+  float32_t arm_cos_f32(
+  float32_t x);
+
+
+  /**
+   * @brief Fast approximation to the trigonometric cosine function for Q31 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  cos(x).
+   */
+  q31_t arm_cos_q31(
+  q31_t x);
+
+
+  /**
+   * @brief  Fast approximation to the trigonometric cosine function for Q15 data.
+   * @param[in] x  Scaled input value in radians.
+   * @return  cos(x).
+   */
+  q15_t arm_cos_q15(
+  q15_t x);
+
+/**
+  @} end of cos group
+ */
+
+
+/**
+  @brief         Floating-point vector of log values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+  void arm_vlog_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+/**
+  @brief         Floating-point vector of log values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+  void arm_vlog_f64(
+  const float64_t * pSrc,
+		float64_t * pDst,
+		uint32_t blockSize);
+
+
+
+  /**
+   * @brief  q31 vector of log values.
+   * @param[in]     pSrc       points to the input vector in q31
+   * @param[out]    pDst       points to the output vector in q5.26
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_vlog_q31(const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  q15 vector of log values.
+   * @param[in]     pSrc       points to the input vector in q15
+   * @param[out]    pDst       points to the output vector in q4.11
+   * @param[in]     blockSize  number of samples in each vector
+   * @return        none
+   */
+  void arm_vlog_q15(const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+
+/**
+  @brief         Floating-point vector of exp values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+  void arm_vexp_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+
+/**
+  @brief         Floating-point vector of exp values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+  void arm_vexp_f64(
+  const float64_t * pSrc,
+		float64_t * pDst,
+		uint32_t blockSize);
+
+
+
+ /**
+   * @defgroup SQRT Square Root
+   *
+   * Computes the square root of a number.
+   * There are separate functions for Q15, Q31, and floating-point data types.
+   * The square root function is computed using the Newton-Raphson algorithm.
+   * This is an iterative algorithm of the form:
+   * <pre>
+   *      x1 = x0 - f(x0)/f'(x0)
+   * </pre>
+   * where <code>x1</code> is the current estimate,
+   * <code>x0</code> is the previous estimate, and
+   * <code>f'(x0)</code> is the derivative of <code>f()</code> evaluated at <code>x0</code>.
+   * For the square root function, the algorithm reduces to:
+   * <pre>
+   *     x0 = in/2                         [initial guess]
+   *     x1 = 1/2 * ( x0 + in / x0)        [each iteration]
+   * </pre>
+   */
+
+
+  /**
+   * @addtogroup SQRT
+   * @{
+   */
+
+/**
+  @brief         Floating-point square root function.
+  @param[in]     in    input value
+  @param[out]    pOut  square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+__STATIC_FORCEINLINE arm_status arm_sqrt_f32(
+  const float32_t in,
+  float32_t * pOut)
+  {
+    if (in >= 0.0f)
+    {
+#if defined ( __CC_ARM )
+  #if defined __TARGET_FPU_VFP
+      *pOut = __sqrtf(in);
+  #else
+      *pOut = sqrtf(in);
+  #endif
+
+#elif defined ( __ICCARM__ )
+  #if defined __ARMVFP__
+      __ASM("VSQRT.F32 %0,%1" : "=t"(*pOut) : "t"(in));
+  #else
+      *pOut = sqrtf(in);
+  #endif
+
+#else
+      *pOut = sqrtf(in);
+#endif
+
+      return (ARM_MATH_SUCCESS);
+    }
+    else
+    {
+      *pOut = 0.0f;
+      return (ARM_MATH_ARGUMENT_ERROR);
+    }
+  }
+
+
+/**
+  @brief         Q31 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q31(
+  q31_t in,
+  q31_t * pOut);
+
+
+/**
+  @brief         Q15 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+arm_status arm_sqrt_q15(
+  q15_t in,
+  q15_t * pOut);
+
+  /**
+   * @brief  Vector Floating-point square root function.
+   * @param[in]  pIn   input vector.
+   * @param[out] pOut  vector of square roots of input elements.
+   * @param[in]  len   length of input vector.
+   * @return The function returns ARM_MATH_SUCCESS if input value is positive value or ARM_MATH_ARGUMENT_ERROR if
+   * <code>in</code> is negative value and returns zero output for negative values.
+   */
+  void arm_vsqrt_f32(
+  float32_t * pIn,
+  float32_t * pOut,
+  uint16_t len);
+
+
+  /**
+   * @} end of SQRT group
+   */
+
+  /**
+  @brief         Fixed point division
+  @param[in]     numerator    Numerator
+  @param[in]     denominator  Denominator
+  @param[out]    quotient     Quotient value normalized between -1.0 and 1.0
+  @param[out]    shift        Shift left value to get the unnormalized quotient
+  @return        error status
+
+  When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced
+  to the saturated negative or positive value.
+ */
+
+arm_status arm_divide_q15(q15_t numerator,
+  q15_t denominator,
+  q15_t *quotient,
+  int16_t *shift);
+
+  /**
+  @brief         Fixed point division
+  @param[in]     numerator    Numerator
+  @param[in]     denominator  Denominator
+  @param[out]    quotient     Quotient value normalized between -1.0 and 1.0
+  @param[out]    shift        Shift left value to get the unnormalized quotient
+  @return        error status
+
+  When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced
+  to the saturated negative or positive value.
+ */
+
+arm_status arm_divide_q31(q31_t numerator,
+  q31_t denominator,
+  q31_t *quotient,
+  int16_t *shift);
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _FAST_MATH_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/fast_math_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/fast_math_functions_f16.h
new file mode 100755
index 00000000..9f0dec4e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/fast_math_functions_f16.h
@@ -0,0 +1,116 @@
+/******************************************************************************
+ * @file     fast_math_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _FAST_MATH_FUNCTIONS_F16_H_
+#define _FAST_MATH_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+/* For sqrt_f32 */
+#include "dsp/fast_math_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+ /**
+   * @addtogroup SQRT
+   * @{
+   */
+
+/**
+  @brief         Floating-point square root function.
+  @param[in]     in    input value
+  @param[out]    pOut  square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+__STATIC_FORCEINLINE arm_status arm_sqrt_f16(
+  float16_t in,
+  float16_t * pOut)
+  {
+    float32_t r;
+    arm_status status;
+    status=arm_sqrt_f32((float32_t)in,&r);
+    *pOut=(float16_t)r;
+    return(status);
+  }
+
+
+/**
+  @} end of SQRT group
+ */
+  
+/**
+  @brief         Floating-point vector of log values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+  void arm_vlog_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+/**
+  @brief         Floating-point vector of exp values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+  void arm_vexp_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+  /**
+  @brief         Floating-point vector of inverse values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+  void arm_vinverse_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _FAST_MATH_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/filtering_functions.h b/Libraries/CMSIS/DSP/Include/dsp/filtering_functions.h
new file mode 100755
index 00000000..28a95689
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/filtering_functions.h
@@ -0,0 +1,2529 @@
+/******************************************************************************
+ * @file     filtering_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _FILTERING_FUNCTIONS_H_
+#define _FILTERING_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/support_functions.h"
+#include "dsp/fast_math_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+
+#define DELTA_Q31          ((q31_t)(0x100))
+#define DELTA_Q15          ((q15_t)0x5)
+
+/**
+ * @defgroup groupFilters Filtering Functions
+ */
+    
+  /**
+   * @brief Instance structure for the Q7 FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;        /**< number of filter coefficients in the filter. */
+          q7_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q7_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+  } arm_fir_instance_q7;
+
+  /**
+   * @brief Instance structure for the Q15 FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+          q15_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q15_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+  } arm_fir_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;         /**< number of filter coefficients in the filter. */
+          q31_t *pState;            /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const q31_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of filter coefficients in the filter. */
+          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of filter coefficients in the filter. */
+          float64_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const float64_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_f64;
+
+  /**
+   * @brief Processing function for the Q7 FIR filter.
+   * @param[in]  S          points to an instance of the Q7 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_q7(
+  const arm_fir_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q7 FIR filter.
+   * @param[in,out] S          points to an instance of the Q7 FIR structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed.
+   *
+   * For the MVE version, the coefficient length must be a multiple of 16.
+   * You can pad with zeros if you have less coefficients.
+   */
+  void arm_fir_init_q7(
+        arm_fir_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q15 FIR filter.
+   * @param[in]  S          points to an instance of the Q15 FIR structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the fast Q15 FIR filter (fast version).
+   * @param[in]  S          points to an instance of the Q15 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_fast_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q15 FIR filter.
+   * @param[in,out] S          points to an instance of the Q15 FIR filter structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   * @return     The function returns either
+   * <code>ARM_MATH_SUCCESS</code> if initialization was successful or
+   * <code>ARM_MATH_ARGUMENT_ERROR</code> if <code>numTaps</code> is not a supported value.
+   *
+   * For the MVE version, the coefficient length must be a multiple of 8.
+   * You can pad with zeros if you have less coefficients.
+   *
+   */
+  arm_status arm_fir_init_q15(
+        arm_fir_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR filter.
+   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the fast Q31 FIR filter (fast version).
+   * @param[in]  S          points to an instance of the Q31 FIR filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_fast_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 FIR filter.
+   * @param[in,out] S          points to an instance of the Q31 FIR structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   *
+   * For the MVE version, the coefficient length must be a multiple of 4.
+   * You can pad with zeros if you have less coefficients.
+   */
+  void arm_fir_init_q31(
+        arm_fir_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the floating-point FIR filter.
+   * @param[in]  S          points to an instance of the floating-point FIR structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_f32(
+  const arm_fir_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the floating-point FIR filter.
+   * @param[in]  S          points to an instance of the floating-point FIR structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_f64(
+  const arm_fir_instance_f64 * S,
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point FIR filter.
+   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   */
+  void arm_fir_init_f32(
+        arm_fir_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point FIR filter.
+   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   */
+  void arm_fir_init_f64(
+        arm_fir_instance_f64 * S,
+        uint16_t numTaps,
+  const float64_t * pCoeffs,
+        float64_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Instance structure for the Q15 Biquad cascade filter.
+   */
+  typedef struct
+  {
+          int8_t numStages;        /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q15_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q15_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+          int8_t postShift;        /**< Additional shift, in bits, applied to each output sample. */
+  } arm_biquad_casd_df1_inst_q15;
+
+  /**
+   * @brief Instance structure for the Q31 Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q31_t *pState;           /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q31_t *pCoeffs;          /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t postShift;       /**< Additional shift, in bits, applied to each output sample. */
+  } arm_biquad_casd_df1_inst_q31;
+
+  /**
+   * @brief Instance structure for the floating-point Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float32_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_casd_df1_inst_f32;
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+  /**
+   * @brief Instance structure for the modified Biquad coefs required by vectorized code.
+   */
+  typedef struct
+  {
+      float32_t coeffs[8][4]; /**< Points to the array of modified coefficients.  The array is of length 32. There is one per stage */
+  } arm_biquad_mod_coef_f32;
+#endif 
+
+  /**
+   * @brief Processing function for the Q15 Biquad cascade filter.
+   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q15 Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
+   */
+  void arm_biquad_cascade_df1_init_q15(
+        arm_biquad_casd_df1_inst_q15 * S,
+        uint8_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int8_t postShift);
+
+  /**
+   * @brief Fast but less precise processing function for the Q15 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q15 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_fast_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 Biquad cascade filter
+   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Fast but less precise processing function for the Q31 Biquad cascade filter for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_fast_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the Q31 Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the Q31 Biquad cascade structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     postShift  Shift to be applied to the output. Varies according to the coefficients format
+   */
+  void arm_biquad_cascade_df1_init_q31(
+        arm_biquad_casd_df1_inst_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int8_t postShift);
+
+  /**
+   * @brief Processing function for the floating-point Biquad cascade filter.
+   * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the floating-point Biquad cascade structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pCoeffsMod points to the modified filter coefficients (only MVE version).
+   * @param[in]     pState     points to the state buffer.
+   */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+  void arm_biquad_cascade_df1_mve_init_f32(
+      arm_biquad_casd_df1_inst_f32 * S,
+      uint8_t numStages,
+      const float32_t * pCoeffs, 
+      arm_biquad_mod_coef_f32 * pCoeffsMod, 
+      float32_t * pState);
+#endif
+  
+  void arm_biquad_cascade_df1_init_f32(
+        arm_biquad_casd_df1_inst_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+
+/**
+ * @brief Convolution of floating-point sequences.
+ * @param[in]  pSrcA    points to the first input sequence.
+ * @param[in]  srcALen  length of the first input sequence.
+ * @param[in]  pSrcB    points to the second input sequence.
+ * @param[in]  srcBLen  length of the second input sequence.
+ * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ */
+  void arm_conv_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q15 sequences.
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+   */
+  void arm_conv_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+/**
+ * @brief Convolution of Q15 sequences.
+ * @param[in]  pSrcA    points to the first input sequence.
+ * @param[in]  srcALen  length of the first input sequence.
+ * @param[in]  pSrcB    points to the second input sequence.
+ * @param[in]  srcBLen  length of the second input sequence.
+ * @param[out] pDst     points to the location where the output result is written.  Length srcALen+srcBLen-1.
+ */
+  void arm_conv_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+   */
+  void arm_conv_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Convolution of Q31 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+  /**
+   * @brief Convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+    /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length srcALen+srcBLen-1.
+   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   */
+  void arm_conv_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Convolution of Q7 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length srcALen+srcBLen-1.
+   */
+  void arm_conv_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst);
+
+
+  /**
+   * @brief Partial convolution of floating-point sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q15 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @param[in]  pScratch1   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2   points to scratch buffer of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Partial convolution of Q31 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q31 sequences (fast version) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Partial convolution of Q7 sequences
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @param[in]  pScratch1   points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2   points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+/**
+   * @brief Partial convolution of Q7 sequences.
+   * @param[in]  pSrcA       points to the first input sequence.
+   * @param[in]  srcALen     length of the first input sequence.
+   * @param[in]  pSrcB       points to the second input sequence.
+   * @param[in]  srcBLen     length of the second input sequence.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  firstIndex  is the first output sample to start with.
+   * @param[in]  numPoints   is the number of output points to be computed.
+   * @return  Returns either ARM_MATH_SUCCESS if the function completed correctly or ARM_MATH_ARGUMENT_ERROR if the requested subset is not in the range [0 srcALen+srcBLen-2].
+   */
+  arm_status arm_conv_partial_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints);
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR decimator.
+   */
+  typedef struct
+  {
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const q15_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
+          q15_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+  } arm_fir_decimate_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR decimator.
+   */
+  typedef struct
+  {
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const q31_t *pCoeffs;             /**< points to the coefficient array. The array is of length numTaps.*/
+          q31_t *pState;              /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+  } arm_fir_decimate_instance_q31;
+
+/**
+  @brief Instance structure for floating-point FIR decimator.
+ */
+typedef struct
+  {
+          uint8_t M;                  /**< decimation factor. */
+          uint16_t numTaps;           /**< number of coefficients in the filter. */
+    const float32_t *pCoeffs;         /**< points to the coefficient array. The array is of length numTaps.*/
+          float32_t *pState;          /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+  } arm_fir_decimate_instance_f32;
+
+
+/**
+  @brief         Processing function for floating-point FIR decimator.
+  @param[in]     S         points to an instance of the floating-point FIR decimator structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+ */
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+  @brief         Initialization function for the floating-point FIR decimator.
+  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+ */
+arm_status arm_fir_decimate_init_f32(
+        arm_fir_decimate_instance_f32 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR decimator.
+   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q15 FIR decimator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_decimate_fast_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 FIR decimator.
+   * @param[in,out] S          points to an instance of the Q15 FIR decimator structure.
+   * @param[in]     numTaps    number of coefficients in the filter.
+   * @param[in]     M          decimation factor.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * <code>blockSize</code> is not a multiple of <code>M</code>.
+   */
+  arm_status arm_fir_decimate_init_q15(
+        arm_fir_decimate_instance_q15 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 FIR decimator.
+   * @param[in]  S     points to an instance of the Q31 FIR decimator structure.
+   * @param[in]  pSrc  points to the block of input data.
+   * @param[out] pDst  points to the block of output data
+   * @param[in] blockSize number of input samples to process per call.
+   */
+  void arm_fir_decimate_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the Q31 FIR decimator (fast variant) for Cortex-M3 and Cortex-M4.
+   * @param[in]  S          points to an instance of the Q31 FIR decimator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_decimate_fast_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q31 FIR decimator.
+   * @param[in,out] S          points to an instance of the Q31 FIR decimator structure.
+   * @param[in]     numTaps    number of coefficients in the filter.
+   * @param[in]     M          decimation factor.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return    The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * <code>blockSize</code> is not a multiple of <code>M</code>.
+   */
+  arm_status arm_fir_decimate_init_q31(
+        arm_fir_decimate_instance_q31 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR interpolator.
+   */
+  typedef struct
+  {
+        uint8_t L;                      /**< upsample factor. */
+        uint16_t phaseLength;           /**< length of each polyphase filter component. */
+  const q15_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q15_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+  } arm_fir_interpolate_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR interpolator.
+   */
+  typedef struct
+  {
+        uint8_t L;                      /**< upsample factor. */
+        uint16_t phaseLength;           /**< length of each polyphase filter component. */
+  const q31_t *pCoeffs;                 /**< points to the coefficient array. The array is of length L*phaseLength. */
+        q31_t *pState;                  /**< points to the state variable array. The array is of length blockSize+phaseLength-1. */
+  } arm_fir_interpolate_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR interpolator.
+   */
+  typedef struct
+  {
+        uint8_t L;                     /**< upsample factor. */
+        uint16_t phaseLength;          /**< length of each polyphase filter component. */
+  const float32_t *pCoeffs;            /**< points to the coefficient array. The array is of length L*phaseLength. */
+        float32_t *pState;             /**< points to the state variable array. The array is of length phaseLength+numTaps-1. */
+  } arm_fir_interpolate_instance_f32;
+
+
+  /**
+   * @brief Processing function for the Q15 FIR interpolator.
+   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 FIR interpolator.
+   * @param[in,out] S          points to an instance of the Q15 FIR interpolator structure.
+   * @param[in]     L          upsample factor.
+   * @param[in]     numTaps    number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficient buffer.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+   */
+  arm_status arm_fir_interpolate_init_q15(
+        arm_fir_interpolate_instance_q15 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 FIR interpolator.
+   * @param[in]  S          points to an instance of the Q15 FIR interpolator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_interpolate_q31(
+  const arm_fir_interpolate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q31 FIR interpolator.
+   * @param[in,out] S          points to an instance of the Q31 FIR interpolator structure.
+   * @param[in]     L          upsample factor.
+   * @param[in]     numTaps    number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficient buffer.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+   */
+  arm_status arm_fir_interpolate_init_q31(
+        arm_fir_interpolate_instance_q31 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the floating-point FIR interpolator.
+   * @param[in]  S          points to an instance of the floating-point FIR interpolator structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of input samples to process per call.
+   */
+  void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the floating-point FIR interpolator.
+   * @param[in,out] S          points to an instance of the floating-point FIR interpolator structure.
+   * @param[in]     L          upsample factor.
+   * @param[in]     numTaps    number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficient buffer.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of input samples to process per call.
+   * @return        The function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_LENGTH_ERROR if
+   * the filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>.
+   */
+  arm_status arm_fir_interpolate_init_f32(
+        arm_fir_interpolate_instance_f32 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the high precision Q31 Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;       /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          q63_t *pState;           /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    const q31_t *pCoeffs;          /**< points to the array of coefficients.  The array is of length 5*numStages. */
+          uint8_t postShift;       /**< additional shift, in bits, applied to each output sample. */
+  } arm_biquad_cas_df1_32x64_ins_q31;
+
+
+  /**
+   * @param[in]  S          points to an instance of the high precision Q31 Biquad cascade filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cas_df1_32x64_q31(
+  const arm_biquad_cas_df1_32x64_ins_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @param[in,out] S          points to an instance of the high precision Q31 Biquad cascade filter structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     postShift  shift to be applied to the output. Varies according to the coefficients format
+   */
+  void arm_biquad_cas_df1_32x64_init_q31(
+        arm_biquad_cas_df1_32x64_ins_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q63_t * pState,
+        uint8_t postShift);
+
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_df2T_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float32_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float32_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_stereo_df2T_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float64_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+    const float64_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_df2T_instance_f64;
+
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_stereo_df2T_f32(
+  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df2T_f64(
+  const arm_biquad_cascade_df2T_instance_f64 * S,
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize);
+
+
+#if defined(ARM_MATH_NEON) 
+/**
+  @brief         Compute new coefficient arrays for use in vectorized filter (Neon only).
+  @param[in]     numStages         number of 2nd order stages in the filter.
+  @param[in]     pCoeffs           points to the original filter coefficients.
+  @param[in]     pComputedCoeffs   points to the new computed coefficients for the vectorized version.
+  @return        none
+*/
+void arm_biquad_cascade_df2T_compute_coefs_f32(
+  uint8_t numStages,
+  const float32_t * pCoeffs,
+  float32_t * pComputedCoeffs);
+#endif
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_df2T_init_f32(
+        arm_biquad_cascade_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_stereo_df2T_init_f32(
+        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_df2T_init_f64(
+        arm_biquad_cascade_df2T_instance_f64 * S,
+        uint8_t numStages,
+        const float64_t * pCoeffs,
+        float64_t * pState);
+
+
+  /**
+   * @brief Instance structure for the Q15 FIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of filter stages. */
+          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
+    const q15_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 FIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of filter stages. */
+          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages. */
+    const q31_t *pCoeffs;                      /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point FIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of filter stages. */
+          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages. */
+    const float32_t *pCoeffs;                  /**< points to the coefficient array. The array is of length numStages. */
+  } arm_fir_lattice_instance_f32;
+
+
+  /**
+   * @brief Initialization function for the Q15 FIR lattice filter.
+   * @param[in] S          points to an instance of the Q15 FIR lattice structure.
+   * @param[in] numStages  number of filter stages.
+   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] pState     points to the state buffer.  The array is of length numStages.
+   */
+  void arm_fir_lattice_init_q15(
+        arm_fir_lattice_instance_q15 * S,
+        uint16_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState);
+
+
+  /**
+   * @brief Processing function for the Q15 FIR lattice filter.
+   * @param[in]  S          points to an instance of the Q15 FIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_lattice_q15(
+  const arm_fir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for the Q31 FIR lattice filter.
+   * @param[in] S          points to an instance of the Q31 FIR lattice structure.
+   * @param[in] numStages  number of filter stages.
+   * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+   * @param[in] pState     points to the state buffer.   The array is of length numStages.
+   */
+  void arm_fir_lattice_init_q31(
+        arm_fir_lattice_instance_q31 * S,
+        uint16_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState);
+
+
+  /**
+   * @brief Processing function for the Q31 FIR lattice filter.
+   * @param[in]  S          points to an instance of the Q31 FIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_lattice_q31(
+  const arm_fir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+ * @brief Initialization function for the floating-point FIR lattice filter.
+ * @param[in] S          points to an instance of the floating-point FIR lattice structure.
+ * @param[in] numStages  number of filter stages.
+ * @param[in] pCoeffs    points to the coefficient buffer.  The array is of length numStages.
+ * @param[in] pState     points to the state buffer.  The array is of length numStages.
+ */
+  void arm_fir_lattice_init_f32(
+        arm_fir_lattice_instance_f32 * S,
+        uint16_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState);
+
+
+  /**
+   * @brief Processing function for the floating-point FIR lattice filter.
+   * @param[in]  S          points to an instance of the floating-point FIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_lattice_f32(
+  const arm_fir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 IIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          q15_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
+          q15_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
+          q15_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 IIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          q31_t *pState;                       /**< points to the state variable array. The array is of length numStages+blockSize. */
+          q31_t *pkCoeffs;                     /**< points to the reflection coefficient array. The array is of length numStages. */
+          q31_t *pvCoeffs;                     /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_q31;
+
+  /**
+   * @brief Instance structure for the floating-point IIR lattice filter.
+   */
+  typedef struct
+  {
+          uint16_t numStages;                  /**< number of stages in the filter. */
+          float32_t *pState;                   /**< points to the state variable array. The array is of length numStages+blockSize. */
+          float32_t *pkCoeffs;                 /**< points to the reflection coefficient array. The array is of length numStages. */
+          float32_t *pvCoeffs;                 /**< points to the ladder coefficient array. The array is of length numStages+1. */
+  } arm_iir_lattice_instance_f32;
+
+
+  /**
+   * @brief Processing function for the floating-point IIR lattice filter.
+   * @param[in]  S          points to an instance of the floating-point IIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_f32(
+  const arm_iir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for the floating-point IIR lattice filter.
+   * @param[in] S          points to an instance of the floating-point IIR lattice structure.
+   * @param[in] numStages  number of stages in the filter.
+   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
+   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
+   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize-1.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_init_f32(
+        arm_iir_lattice_instance_f32 * S,
+        uint16_t numStages,
+        float32_t * pkCoeffs,
+        float32_t * pvCoeffs,
+        float32_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 IIR lattice filter.
+   * @param[in]  S          points to an instance of the Q31 IIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_q31(
+  const arm_iir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for the Q31 IIR lattice filter.
+   * @param[in] S          points to an instance of the Q31 IIR lattice structure.
+   * @param[in] numStages  number of stages in the filter.
+   * @param[in] pkCoeffs   points to the reflection coefficient buffer.  The array is of length numStages.
+   * @param[in] pvCoeffs   points to the ladder coefficient buffer.  The array is of length numStages+1.
+   * @param[in] pState     points to the state buffer.  The array is of length numStages+blockSize.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_init_q31(
+        arm_iir_lattice_instance_q31 * S,
+        uint16_t numStages,
+        q31_t * pkCoeffs,
+        q31_t * pvCoeffs,
+        q31_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 IIR lattice filter.
+   * @param[in]  S          points to an instance of the Q15 IIR lattice structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_iir_lattice_q15(
+  const arm_iir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+/**
+ * @brief Initialization function for the Q15 IIR lattice filter.
+ * @param[in] S          points to an instance of the fixed-point Q15 IIR lattice structure.
+ * @param[in] numStages  number of stages in the filter.
+ * @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages.
+ * @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1.
+ * @param[in] pState     points to state buffer.  The array is of length numStages+blockSize.
+ * @param[in] blockSize  number of samples to process per call.
+ */
+  void arm_iir_lattice_init_q15(
+        arm_iir_lattice_instance_q15 * S,
+        uint16_t numStages,
+        q15_t * pkCoeffs,
+        q15_t * pvCoeffs,
+        q15_t * pState,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the floating-point LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          float32_t *pState;   /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          float32_t *pCoeffs;  /**< points to the coefficient array. The array is of length numTaps. */
+          float32_t mu;        /**< step size that controls filter coefficient updates. */
+  } arm_lms_instance_f32;
+
+
+  /**
+   * @brief Processing function for floating-point LMS filter.
+   * @param[in]  S          points to an instance of the floating-point LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for floating-point LMS filter.
+   * @param[in] S          points to an instance of the floating-point LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to the coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_lms_init_f32(
+        arm_lms_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q15 LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          q15_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q15_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+          q15_t mu;            /**< step size that controls filter coefficient updates. */
+          uint32_t postShift;  /**< bit shift applied to coefficients. */
+  } arm_lms_instance_q15;
+
+
+  /**
+   * @brief Initialization function for the Q15 LMS filter.
+   * @param[in] S          points to an instance of the Q15 LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to the coefficient buffer.
+   * @param[in] pState     points to the state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_init_q15(
+        arm_lms_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint32_t postShift);
+
+
+  /**
+   * @brief Processing function for Q15 LMS filter.
+   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_q15(
+  const arm_lms_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q31 LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;    /**< number of coefficients in the filter. */
+          q31_t *pState;       /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q31_t *pCoeffs;      /**< points to the coefficient array. The array is of length numTaps. */
+          q31_t mu;            /**< step size that controls filter coefficient updates. */
+          uint32_t postShift;  /**< bit shift applied to coefficients. */
+  } arm_lms_instance_q31;
+
+
+  /**
+   * @brief Processing function for Q31 LMS filter.
+   * @param[in]  S          points to an instance of the Q15 LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_q31(
+  const arm_lms_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for Q31 LMS filter.
+   * @param[in] S          points to an instance of the Q31 LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_init_q31(
+        arm_lms_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint32_t postShift);
+
+
+  /**
+   * @brief Instance structure for the floating-point normalized LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of coefficients in the filter. */
+          float32_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          float32_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+          float32_t mu;         /**< step size that control filter coefficient updates. */
+          float32_t energy;     /**< saves previous frame energy. */
+          float32_t x0;         /**< saves previous input sample. */
+  } arm_lms_norm_instance_f32;
+
+
+  /**
+   * @brief Processing function for floating-point normalized LMS filter.
+   * @param[in]  S          points to an instance of the floating-point normalized LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_norm_f32(
+        arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for floating-point normalized LMS filter.
+   * @param[in] S          points to an instance of the floating-point LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   */
+  void arm_lms_norm_init_f32(
+        arm_lms_norm_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the Q31 normalized LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of coefficients in the filter. */
+          q31_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q31_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+          q31_t mu;             /**< step size that controls filter coefficient updates. */
+          uint8_t postShift;    /**< bit shift applied to coefficients. */
+    const q31_t *recipTable;    /**< points to the reciprocal initial value table. */
+          q31_t energy;         /**< saves previous frame energy. */
+          q31_t x0;             /**< saves previous input sample. */
+  } arm_lms_norm_instance_q31;
+
+
+  /**
+   * @brief Processing function for Q31 normalized LMS filter.
+   * @param[in]  S          points to an instance of the Q31 normalized LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_norm_q31(
+        arm_lms_norm_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for Q31 normalized LMS filter.
+   * @param[in] S          points to an instance of the Q31 normalized LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_norm_init_q31(
+        arm_lms_norm_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint8_t postShift);
+
+
+  /**
+   * @brief Instance structure for the Q15 normalized LMS filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< Number of coefficients in the filter. */
+          q15_t *pState;        /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+          q15_t *pCoeffs;       /**< points to the coefficient array. The array is of length numTaps. */
+          q15_t mu;             /**< step size that controls filter coefficient updates. */
+          uint8_t postShift;    /**< bit shift applied to coefficients. */
+    const q15_t *recipTable;    /**< Points to the reciprocal initial value table. */
+          q15_t energy;         /**< saves previous frame energy. */
+          q15_t x0;             /**< saves previous input sample. */
+  } arm_lms_norm_instance_q15;
+
+
+  /**
+   * @brief Processing function for Q15 normalized LMS filter.
+   * @param[in]  S          points to an instance of the Q15 normalized LMS filter structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[in]  pRef       points to the block of reference data.
+   * @param[out] pOut       points to the block of output data.
+   * @param[out] pErr       points to the block of error data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_lms_norm_q15(
+        arm_lms_norm_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Initialization function for Q15 normalized LMS filter.
+   * @param[in] S          points to an instance of the Q15 normalized LMS filter structure.
+   * @param[in] numTaps    number of filter coefficients.
+   * @param[in] pCoeffs    points to coefficient buffer.
+   * @param[in] pState     points to state buffer.
+   * @param[in] mu         step size that controls filter coefficient updates.
+   * @param[in] blockSize  number of samples to process.
+   * @param[in] postShift  bit shift applied to coefficients.
+   */
+  void arm_lms_norm_init_q15(
+        arm_lms_norm_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint8_t postShift);
+
+
+  /**
+   * @brief Correlation of floating-point sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst);
+
+
+  /**
+   * @brief Correlation of floating-point sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_f64(
+  const float64_t * pSrcA,
+        uint32_t srcALen,
+  const float64_t * pSrcB,
+        uint32_t srcBLen,
+        float64_t * pDst);
+
+
+/**
+ @brief Correlation of Q15 sequences
+ @param[in]  pSrcA     points to the first input sequence
+ @param[in]  srcALen   length of the first input sequence
+ @param[in]  pSrcB     points to the second input sequence
+ @param[in]  srcBLen   length of the second input sequence
+ @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+*/
+void arm_correlate_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch);
+
+
+/**
+  @brief Correlation of Q15 sequences.
+  @param[in]  pSrcA    points to the first input sequence
+  @param[in]  srcALen  length of the first input sequence
+  @param[in]  pSrcB    points to the second input sequence
+  @param[in]  srcBLen  length of the second input sequence
+  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ */
+  void arm_correlate_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+/**
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+void arm_correlate_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst);
+
+
+/**
+  @brief Correlation of Q15 sequences (fast version).
+  @param[in]  pSrcA     points to the first input sequence.
+  @param[in]  srcALen   length of the first input sequence.
+  @param[in]  pSrcB     points to the second input sequence.
+  @param[in]  srcBLen   length of the second input sequence.
+  @param[out] pDst      points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]  pScratch  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+ */
+void arm_correlate_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch);
+
+
+  /**
+   * @brief Correlation of Q31 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+/**
+  @brief Correlation of Q31 sequences (fast version).
+  @param[in]  pSrcA    points to the first input sequence
+  @param[in]  srcALen  length of the first input sequence
+  @param[in]  pSrcB    points to the second input sequence
+  @param[in]  srcBLen  length of the second input sequence
+  @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+ */
+void arm_correlate_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst);
+
+
+ /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in]  pSrcA      points to the first input sequence.
+   * @param[in]  srcALen    length of the first input sequence.
+   * @param[in]  pSrcB      points to the second input sequence.
+   * @param[in]  srcBLen    length of the second input sequence.
+   * @param[out] pDst       points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   * @param[in]  pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+   * @param[in]  pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+   */
+  void arm_correlate_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2);
+
+
+  /**
+   * @brief Correlation of Q7 sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst);
+
+
+  /**
+   * @brief Instance structure for the floating-point sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          float32_t *pState;            /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const float32_t *pCoeffs;           /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_f32;
+
+  /**
+   * @brief Instance structure for the Q31 sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q31_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q31_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q31;
+
+  /**
+   * @brief Instance structure for the Q15 sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q15_t *pState;                /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q15_t *pCoeffs;               /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q7 sparse FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;             /**< number of coefficients in the filter. */
+          uint16_t stateIndex;          /**< state buffer index.  Points to the oldest sample in the state buffer. */
+          q7_t *pState;                 /**< points to the state buffer array. The array is of length maxDelay+blockSize-1. */
+    const q7_t *pCoeffs;                /**< points to the coefficient array. The array is of length numTaps.*/
+          uint16_t maxDelay;            /**< maximum offset specified by the pTapDelay array. */
+          int32_t *pTapDelay;           /**< points to the array of delay values.  The array is of length numTaps. */
+  } arm_fir_sparse_instance_q7;
+
+
+  /**
+   * @brief Processing function for the floating-point sparse FIR filter.
+   * @param[in]  S           points to an instance of the floating-point sparse FIR structure.
+   * @param[in]  pSrc        points to the block of input data.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize   number of input samples to process per call.
+   */
+  void arm_fir_sparse_f32(
+        arm_fir_sparse_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        float32_t * pScratchIn,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the floating-point sparse FIR filter.
+   * @param[in,out] S          points to an instance of the floating-point sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_f32(
+        arm_fir_sparse_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q31 sparse FIR filter.
+   * @param[in]  S           points to an instance of the Q31 sparse FIR structure.
+   * @param[in]  pSrc        points to the block of input data.
+   * @param[out] pDst        points to the block of output data
+   * @param[in]  pScratchIn  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize   number of input samples to process per call.
+   */
+  void arm_fir_sparse_q31(
+        arm_fir_sparse_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        q31_t * pScratchIn,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q31 sparse FIR filter.
+   * @param[in,out] S          points to an instance of the Q31 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_q31(
+        arm_fir_sparse_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q15 sparse FIR filter.
+   * @param[in]  S            points to an instance of the Q15 sparse FIR structure.
+   * @param[in]  pSrc         points to the block of input data.
+   * @param[out] pDst         points to the block of output data
+   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
+   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize    number of input samples to process per call.
+   */
+  void arm_fir_sparse_q15(
+        arm_fir_sparse_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        q15_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q15 sparse FIR filter.
+   * @param[in,out] S          points to an instance of the Q15 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_q15(
+        arm_fir_sparse_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Processing function for the Q7 sparse FIR filter.
+   * @param[in]  S            points to an instance of the Q7 sparse FIR structure.
+   * @param[in]  pSrc         points to the block of input data.
+   * @param[out] pDst         points to the block of output data
+   * @param[in]  pScratchIn   points to a temporary buffer of size blockSize.
+   * @param[in]  pScratchOut  points to a temporary buffer of size blockSize.
+   * @param[in]  blockSize    number of input samples to process per call.
+   */
+  void arm_fir_sparse_q7(
+        arm_fir_sparse_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        q7_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Initialization function for the Q7 sparse FIR filter.
+   * @param[in,out] S          points to an instance of the Q7 sparse FIR structure.
+   * @param[in]     numTaps    number of nonzero coefficients in the filter.
+   * @param[in]     pCoeffs    points to the array of filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     pTapDelay  points to the array of offset times.
+   * @param[in]     maxDelay   maximum offset time supported.
+   * @param[in]     blockSize  number of samples that will be processed per block.
+   */
+  void arm_fir_sparse_init_q7(
+        arm_fir_sparse_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize);
+
+
+
+
+ 
+
+  /**
+   * @brief floating-point Circular write function.
+   */
+  __STATIC_FORCEINLINE void arm_circularWrite_f32(
+  int32_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const int32_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if (wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = (uint16_t)wOffset;
+  }
+
+
+
+  /**
+   * @brief floating-point Circular Read function.
+   */
+  __STATIC_FORCEINLINE void arm_circularRead_f32(
+  int32_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  int32_t * dst,
+  int32_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t rOffset;
+    int32_t* dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+    dst_end = dst_base + dst_length;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if (dst == dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update rOffset.  Watch out for positive and negative value  */
+      rOffset += bufferInc;
+
+      if (rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+  /**
+   * @brief Q15 Circular write function.
+   */
+  __STATIC_FORCEINLINE void arm_circularWrite_q15(
+  q15_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const q15_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if (wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = (uint16_t)wOffset;
+  }
+
+
+  /**
+   * @brief Q15 Circular Read function.
+   */
+  __STATIC_FORCEINLINE void arm_circularRead_q15(
+  q15_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  q15_t * dst,
+  q15_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0;
+    int32_t rOffset;
+    q15_t* dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+
+    dst_end = dst_base + dst_length;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if (dst == dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      rOffset += bufferInc;
+
+      if (rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+  /**
+   * @brief Q7 Circular write function.
+   */
+  __STATIC_FORCEINLINE void arm_circularWrite_q7(
+  q7_t * circBuffer,
+  int32_t L,
+  uint16_t * writeOffset,
+  int32_t bufferInc,
+  const q7_t * src,
+  int32_t srcInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0U;
+    int32_t wOffset;
+
+    /* Copy the value of Index pointer that points
+     * to the current location where the input samples to be copied */
+    wOffset = *writeOffset;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the input sample to the circular buffer */
+      circBuffer[wOffset] = *src;
+
+      /* Update the input pointer */
+      src += srcInc;
+
+      /* Circularly update wOffset.  Watch out for positive and negative value */
+      wOffset += bufferInc;
+      if (wOffset >= L)
+        wOffset -= L;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *writeOffset = (uint16_t)wOffset;
+  }
+
+
+  /**
+   * @brief Q7 Circular Read function.
+   */
+  __STATIC_FORCEINLINE void arm_circularRead_q7(
+  q7_t * circBuffer,
+  int32_t L,
+  int32_t * readOffset,
+  int32_t bufferInc,
+  q7_t * dst,
+  q7_t * dst_base,
+  int32_t dst_length,
+  int32_t dstInc,
+  uint32_t blockSize)
+  {
+    uint32_t i = 0;
+    int32_t rOffset;
+    q7_t* dst_end;
+
+    /* Copy the value of Index pointer that points
+     * to the current location from where the input samples to be read */
+    rOffset = *readOffset;
+
+    dst_end = dst_base + dst_length;
+
+    /* Loop over the blockSize */
+    i = blockSize;
+
+    while (i > 0U)
+    {
+      /* copy the sample from the circular buffer to the destination buffer */
+      *dst = circBuffer[rOffset];
+
+      /* Update the input pointer */
+      dst += dstInc;
+
+      if (dst == dst_end)
+      {
+        dst = dst_base;
+      }
+
+      /* Circularly update rOffset.  Watch out for positive and negative value */
+      rOffset += bufferInc;
+
+      if (rOffset >= L)
+      {
+        rOffset -= L;
+      }
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Update the index pointer */
+    *readOffset = rOffset;
+  }
+
+
+/**
+  @brief         Levinson Durbin
+  @param[in]     phi      autocovariance vector starting with lag 0 (length is nbCoefs + 1)
+  @param[out]    a        autoregressive coefficients
+  @param[out]    err      prediction error (variance)
+  @param[in]     nbCoefs  number of autoregressive coefficients
+  @return        none
+ */
+void arm_levinson_durbin_f32(const float32_t *phi,
+  float32_t *a, 
+  float32_t *err,
+  int nbCoefs);
+
+
+/**
+  @brief         Levinson Durbin
+  @param[in]     phi      autocovariance vector starting with lag 0 (length is nbCoefs + 1)
+  @param[out]    a        autoregressive coefficients
+  @param[out]    err      prediction error (variance)
+  @param[in]     nbCoefs  number of autoregressive coefficients
+  @return        none
+ */
+void arm_levinson_durbin_q31(const q31_t *phi,
+  q31_t *a, 
+  q31_t *err,
+  int nbCoefs);
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _FILTERING_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/filtering_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/filtering_functions_f16.h
new file mode 100755
index 00000000..fd8b0bba
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/filtering_functions_f16.h
@@ -0,0 +1,237 @@
+/******************************************************************************
+ * @file     filtering_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _FILTERING_FUNCTIONS_F16_H_
+#define _FILTERING_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+ /**
+   * @brief Instance structure for the floating-point FIR filter.
+   */
+  typedef struct
+  {
+          uint16_t numTaps;     /**< number of filter coefficients in the filter. */
+          float16_t *pState;    /**< points to the state variable array. The array is of length numTaps+blockSize-1. */
+    const float16_t *pCoeffs;   /**< points to the coefficient array. The array is of length numTaps. */
+  } arm_fir_instance_f16;
+
+  /**
+   * @brief  Initialization function for the floating-point FIR filter.
+   * @param[in,out] S          points to an instance of the floating-point FIR filter structure.
+   * @param[in]     numTaps    Number of filter coefficients in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   * @param[in]     blockSize  number of samples that are processed at a time.
+   */
+  void arm_fir_init_f16(
+        arm_fir_instance_f16 * S,
+        uint16_t numTaps,
+  const float16_t * pCoeffs,
+        float16_t * pState,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the floating-point FIR filter.
+   * @param[in]  S          points to an instance of the floating-point FIR structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_fir_f16(
+  const arm_fir_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Instance structure for the floating-point Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint32_t numStages;      /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float16_t *pState;       /**< Points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float16_t *pCoeffs;      /**< Points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_casd_df1_inst_f16;
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+  /**
+   * @brief Instance structure for the modified Biquad coefs required by vectorized code.
+   */
+  typedef struct
+  {
+      float16_t coeffs[12][8]; /**< Points to the array of modified coefficients.  The array is of length 32. There is one per stage */
+  } arm_biquad_mod_coef_f16;
+#endif 
+
+  /**
+   * @brief Processing function for the floating-point Biquad cascade filter.
+   * @param[in]  S          points to an instance of the floating-point Biquad cascade structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df1_f16(
+  const arm_biquad_casd_df1_inst_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+  void arm_biquad_cascade_df1_mve_init_f16(
+      arm_biquad_casd_df1_inst_f16 * S,
+      uint8_t numStages,
+      const float16_t * pCoeffs, 
+      arm_biquad_mod_coef_f16 * pCoeffsMod, 
+      float16_t * pState);
+#endif
+
+  void arm_biquad_cascade_df1_init_f16(
+        arm_biquad_casd_df1_inst_f16 * S,
+        uint8_t numStages,
+  const float16_t * pCoeffs,
+        float16_t * pState);
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float16_t *pState;         /**< points to the array of state coefficients.  The array is of length 2*numStages. */
+    const float16_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_df2T_instance_f16;
+
+  /**
+   * @brief Instance structure for the floating-point transposed direct form II Biquad cascade filter.
+   */
+  typedef struct
+  {
+          uint8_t numStages;         /**< number of 2nd order stages in the filter.  Overall order is 2*numStages. */
+          float16_t *pState;         /**< points to the array of state coefficients.  The array is of length 4*numStages. */
+    const float16_t *pCoeffs;        /**< points to the array of coefficients.  The array is of length 5*numStages. */
+  } arm_biquad_cascade_stereo_df2T_instance_f16;
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_df2T_f16(
+  const arm_biquad_cascade_df2T_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Processing function for the floating-point transposed direct form II Biquad cascade filter. 2 channels
+   * @param[in]  S          points to an instance of the filter data structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_biquad_cascade_stereo_df2T_f16(
+  const arm_biquad_cascade_stereo_df2T_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_df2T_init_f16(
+        arm_biquad_cascade_df2T_instance_f16 * S,
+        uint8_t numStages,
+  const float16_t * pCoeffs,
+        float16_t * pState);
+
+  /**
+   * @brief  Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+   * @param[in,out] S          points to an instance of the filter data structure.
+   * @param[in]     numStages  number of 2nd order stages in the filter.
+   * @param[in]     pCoeffs    points to the filter coefficients.
+   * @param[in]     pState     points to the state buffer.
+   */
+  void arm_biquad_cascade_stereo_df2T_init_f16(
+        arm_biquad_cascade_stereo_df2T_instance_f16 * S,
+        uint8_t numStages,
+  const float16_t * pCoeffs,
+        float16_t * pState);
+
+  /**
+   * @brief Correlation of floating-point sequences.
+   * @param[in]  pSrcA    points to the first input sequence.
+   * @param[in]  srcALen  length of the first input sequence.
+   * @param[in]  pSrcB    points to the second input sequence.
+   * @param[in]  srcBLen  length of the second input sequence.
+   * @param[out] pDst     points to the block of output data  Length 2 * max(srcALen, srcBLen) - 1.
+   */
+  void arm_correlate_f16(
+  const float16_t * pSrcA,
+        uint32_t srcALen,
+  const float16_t * pSrcB,
+        uint32_t srcBLen,
+        float16_t * pDst);
+
+
+/**
+  @brief         Levinson Durbin
+  @param[in]     phi      autocovariance vector starting with lag 0 (length is nbCoefs + 1)
+  @param[out]    a        autoregressive coefficients
+  @param[out]    err      prediction error (variance)
+  @param[in]     nbCoefs  number of autoregressive coefficients
+  @return        none
+ */
+void arm_levinson_durbin_f16(const float16_t *phi,
+  float16_t *a, 
+  float16_t *err,
+  int nbCoefs);
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _FILTERING_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/interpolation_functions.h b/Libraries/CMSIS/DSP/Include/dsp/interpolation_functions.h
new file mode 100755
index 00000000..6e51f7c8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/interpolation_functions.h
@@ -0,0 +1,319 @@
+/******************************************************************************
+ * @file     interpolation_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _INTERPOLATION_FUNCTIONS_H_
+#define _INTERPOLATION_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+/**
+ * @defgroup groupInterpolation Interpolation Functions
+ * These functions perform 1- and 2-dimensional interpolation of data.
+ * Linear interpolation is used for 1-dimensional data and
+ * bilinear interpolation is used for 2-dimensional data.
+ */
+
+
+  /**
+   * @brief Instance structure for the floating-point Linear Interpolate function.
+   */
+  typedef struct
+  {
+          uint32_t nValues;           /**< nValues */
+          float32_t x1;               /**< x1 */
+          float32_t xSpacing;         /**< xSpacing */
+          float32_t *pYData;          /**< pointer to the table of Y values */
+  } arm_linear_interp_instance_f32;
+
+  /**
+   * @brief Instance structure for the floating-point bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          float32_t *pData;   /**< points to the data table. */
+  } arm_bilinear_interp_instance_f32;
+
+   /**
+   * @brief Instance structure for the Q31 bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q31_t *pData;       /**< points to the data table. */
+  } arm_bilinear_interp_instance_q31;
+
+   /**
+   * @brief Instance structure for the Q15 bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q15_t *pData;       /**< points to the data table. */
+  } arm_bilinear_interp_instance_q15;
+
+   /**
+   * @brief Instance structure for the Q15 bilinear interpolation function.
+   */
+  typedef struct
+  {
+          uint16_t numRows;   /**< number of rows in the data table. */
+          uint16_t numCols;   /**< number of columns in the data table. */
+          q7_t *pData;        /**< points to the data table. */
+  } arm_bilinear_interp_instance_q7;
+
+
+  /**
+   * @brief Struct for specifying cubic spline type
+   */
+  typedef enum
+  {
+    ARM_SPLINE_NATURAL = 0,           /**< Natural spline */
+    ARM_SPLINE_PARABOLIC_RUNOUT = 1   /**< Parabolic runout spline */
+  } arm_spline_type;
+
+  /**
+   * @brief Instance structure for the floating-point cubic spline interpolation.
+   */
+  typedef struct
+  {
+    arm_spline_type type;      /**< Type (boundary conditions) */
+    const float32_t * x;       /**< x values */
+    const float32_t * y;       /**< y values */
+    uint32_t n_x;              /**< Number of known data points */
+    float32_t * coeffs;        /**< Coefficients buffer (b,c, and d) */
+  } arm_spline_instance_f32;
+
+
+
+
+  /**
+   * @ingroup groupInterpolation
+   */
+
+  /**
+   * @addtogroup SplineInterpolate
+   * @{
+   */
+
+  
+  /**
+   * @brief Processing function for the floating-point cubic spline interpolation.
+   * @param[in]  S          points to an instance of the floating-point spline structure.
+   * @param[in]  xq         points to the x values ot the interpolated data points.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples of output data.
+   */
+  void arm_spline_f32(
+        arm_spline_instance_f32 * S, 
+  const float32_t * xq,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+  /**
+   * @brief Initialization function for the floating-point cubic spline interpolation.
+   * @param[in,out] S        points to an instance of the floating-point spline structure.
+   * @param[in]     type     type of cubic spline interpolation (boundary conditions)
+   * @param[in]     x        points to the x values of the known data points.
+   * @param[in]     y        points to the y values of the known data points.
+   * @param[in]     n        number of known data points.
+   * @param[in]     coeffs   coefficients array for b, c, and d
+   * @param[in]     tempBuffer   buffer array for internal computations
+   */
+  void arm_spline_init_f32(
+          arm_spline_instance_f32 * S,
+          arm_spline_type type,
+    const float32_t * x,
+    const float32_t * y,
+          uint32_t n, 
+          float32_t * coeffs,
+          float32_t * tempBuffer);
+
+
+  /**
+   * @} end of SplineInterpolate group
+   */
+
+
+  
+  /**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+    /**
+   * @brief  Process function for the floating-point Linear Interpolation Function.
+   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
+   * @param[in]     x  input sample to process
+   * @return y processed output sample.
+   *
+   */
+  float32_t arm_linear_interp_f32(
+  arm_linear_interp_instance_f32 * S,
+  float32_t x);
+
+   /**
+   *
+   * @brief  Process function for the Q31 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q31 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+  q31_t arm_linear_interp_q31(
+  const q31_t * pYData,
+  q31_t x,
+  uint32_t nValues);
+
+  /**
+   *
+   * @brief  Process function for the Q15 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q15 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+  q15_t arm_linear_interp_q15(
+  const q15_t * pYData,
+  q31_t x,
+  uint32_t nValues);
+
+  /**
+   *
+   * @brief  Process function for the Q7 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q7 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   */
+q7_t arm_linear_interp_q7(
+  const q7_t * pYData,
+  q31_t x,
+  uint32_t nValues);
+
+  /**
+   * @} end of LinearInterpolate group
+   */
+
+  
+
+
+  /**
+   * @ingroup groupInterpolation
+   */
+
+
+  /**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+  /**
+  * @brief  Floating-point bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate.
+  * @param[in]     Y  interpolation coordinate.
+  * @return out interpolated value.
+  */
+  float32_t arm_bilinear_interp_f32(
+  const arm_bilinear_interp_instance_f32 * S,
+  float32_t X,
+  float32_t Y);
+
+  /**
+  * @brief  Q31 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  q31_t arm_bilinear_interp_q31(
+  arm_bilinear_interp_instance_q31 * S,
+  q31_t X,
+  q31_t Y);
+
+
+  /**
+  * @brief  Q15 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  q15_t arm_bilinear_interp_q15(
+  arm_bilinear_interp_instance_q15 * S,
+  q31_t X,
+  q31_t Y);
+
+  /**
+  * @brief  Q7 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  q7_t arm_bilinear_interp_q7(
+  arm_bilinear_interp_instance_q7 * S,
+  q31_t X,
+  q31_t Y);
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _INTERPOLATION_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/interpolation_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/interpolation_functions_f16.h
new file mode 100755
index 00000000..8b6e6a99
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/interpolation_functions_f16.h
@@ -0,0 +1,107 @@
+/******************************************************************************
+ * @file     interpolation_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _INTERPOLATION_FUNCTIONS_F16_H_
+#define _INTERPOLATION_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+typedef struct
+{
+    uint32_t  nValues;        /**< nValues */
+    float16_t x1;             /**< x1 */
+    float16_t xSpacing;       /**< xSpacing */
+    float16_t *pYData;        /**< pointer to the table of Y values */
+} arm_linear_interp_instance_f16;
+
+/**
+ * @brief Instance structure for the floating-point bilinear interpolation function.
+ */
+typedef struct
+{
+    uint16_t  numRows;/**< number of rows in the data table. */
+    uint16_t  numCols;/**< number of columns in the data table. */
+    float16_t *pData; /**< points to the data table. */
+} arm_bilinear_interp_instance_f16;
+
+  /**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+    /**
+   * @brief  Process function for the floating-point Linear Interpolation Function.
+   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
+   * @param[in]     x  input sample to process
+   * @return y processed output sample.
+   *
+   */
+  float16_t arm_linear_interp_f16(
+  arm_linear_interp_instance_f16 * S,
+  float16_t x);
+
+    /**
+   * @} end of LinearInterpolate group
+   */
+
+/**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+  /**
+  * @brief  Floating-point bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate.
+  * @param[in]     Y  interpolation coordinate.
+  * @return out interpolated value.
+  */
+  float16_t arm_bilinear_interp_f16(
+  const arm_bilinear_interp_instance_f16 * S,
+  float16_t X,
+  float16_t Y);
+
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _INTERPOLATION_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/matrix_functions.h b/Libraries/CMSIS/DSP/Include/dsp/matrix_functions.h
new file mode 100755
index 00000000..f3801a98
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/matrix_functions.h
@@ -0,0 +1,757 @@
+/******************************************************************************
+ * @file     matrix_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _MATRIX_FUNCTIONS_H_
+#define _MATRIX_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @defgroup groupMatrix Matrix Functions
+ *
+ * This set of functions provides basic matrix math operations.
+ * The functions operate on matrix data structures.  For example,
+ * the type
+ * definition for the floating-point matrix structure is shown
+ * below:
+ * <pre>
+ *     typedef struct
+ *     {
+ *       uint16_t numRows;     // number of rows of the matrix.
+ *       uint16_t numCols;     // number of columns of the matrix.
+ *       float32_t *pData;     // points to the data of the matrix.
+ *     } arm_matrix_instance_f32;
+ * </pre>
+ * There are similar definitions for Q15 and Q31 data types.
+ *
+ * The structure specifies the size of the matrix and then points to
+ * an array of data.  The array is of size <code>numRows X numCols</code>
+ * and the values are arranged in row order.  That is, the
+ * matrix element (i, j) is stored at:
+ * <pre>
+ *     pData[i*numCols + j]
+ * </pre>
+ *
+ * \par Init Functions
+ * There is an associated initialization function for each type of matrix
+ * data structure.
+ * The initialization function sets the values of the internal structure fields.
+ * Refer to \ref arm_mat_init_f32(), \ref arm_mat_init_q31() and \ref arm_mat_init_q15()
+ * for floating-point, Q31 and Q15 types,  respectively.
+ *
+ * \par
+ * Use of the initialization function is optional. However, if initialization function is used
+ * then the instance structure cannot be placed into a const data section.
+ * To place the instance structure in a const data
+ * section, manually initialize the data structure.  For example:
+ * <pre>
+ * <code>arm_matrix_instance_f32 S = {nRows, nColumns, pData};</code>
+ * <code>arm_matrix_instance_q31 S = {nRows, nColumns, pData};</code>
+ * <code>arm_matrix_instance_q15 S = {nRows, nColumns, pData};</code>
+ * </pre>
+ * where <code>nRows</code> specifies the number of rows, <code>nColumns</code>
+ * specifies the number of columns, and <code>pData</code> points to the
+ * data array.
+ *
+ * \par Size Checking
+ * By default all of the matrix functions perform size checking on the input and
+ * output matrices. For example, the matrix addition function verifies that the
+ * two input matrices and the output matrix all have the same number of rows and
+ * columns. If the size check fails the functions return:
+ * <pre>
+ *     ARM_MATH_SIZE_MISMATCH
+ * </pre>
+ * Otherwise the functions return
+ * <pre>
+ *     ARM_MATH_SUCCESS
+ * </pre>
+ * There is some overhead associated with this matrix size checking.
+ * The matrix size checking is enabled via the \#define
+ * <pre>
+ *     ARM_MATH_MATRIX_CHECK
+ * </pre>
+ * within the library project settings.  By default this macro is defined
+ * and size checking is enabled. By changing the project settings and
+ * undefining this macro size checking is eliminated and the functions
+ * run a bit faster. With size checking disabled the functions always
+ * return <code>ARM_MATH_SUCCESS</code>.
+ */
+
+  /**
+   * @brief Instance structure for the floating-point matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    float32_t *pData;     /**< points to the data of the matrix. */
+  } arm_matrix_instance_f32;
+ 
+ /**
+   * @brief Instance structure for the floating-point matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    float64_t *pData;     /**< points to the data of the matrix. */
+  } arm_matrix_instance_f64;
+
+ /**
+   * @brief Instance structure for the Q7 matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    q7_t *pData;         /**< points to the data of the matrix. */
+  } arm_matrix_instance_q7;
+
+  /**
+   * @brief Instance structure for the Q15 matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    q15_t *pData;         /**< points to the data of the matrix. */
+  } arm_matrix_instance_q15;
+
+  /**
+   * @brief Instance structure for the Q31 matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    q31_t *pData;         /**< points to the data of the matrix. */
+  } arm_matrix_instance_q31;
+
+  /**
+   * @brief Floating-point matrix addition.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix addition.
+   * @param[in]   pSrcA  points to the first input matrix structure
+   * @param[in]   pSrcB  points to the second input matrix structure
+   * @param[out]  pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_add_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix addition.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_add_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point, complex, matrix multiplication.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15, complex,  matrix multiplication.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pScratch);
+
+  /**
+   * @brief Q31, complex, matrix multiplication.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst);
+
+/**
+   * @brief Floating-point matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_f64(
+  const arm_matrix_instance_f64 * pSrc,
+        arm_matrix_instance_f64 * pDst);
+
+  /**
+   * @brief Floating-point complex matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst);
+
+
+  /**
+   * @brief Q15 matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q15 complex matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+  arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q7 matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_q7(
+  const arm_matrix_instance_q7 * pSrc,
+        arm_matrix_instance_q7 * pDst);
+
+  /**
+   * @brief Q31 matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Q31 complex matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+  arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix multiplication
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Floating-point matrix multiplication
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_f64(
+  const arm_matrix_instance_f64 * pSrcA,
+  const arm_matrix_instance_f64 * pSrcB,
+        arm_matrix_instance_f64 * pDst);
+
+  /**
+   * @brief Floating-point matrix and vector multiplication
+   * @param[in]  pSrcMat  points to the input matrix structure
+   * @param[in]  pVec     points to vector
+   * @param[out] pDst     points to output vector
+   */
+void arm_mat_vec_mult_f32(
+  const arm_matrix_instance_f32 *pSrcMat, 
+  const float32_t *pVec, 
+  float32_t *pDst);
+
+  /**
+   * @brief Q7 matrix multiplication
+   * @param[in]  pSrcA   points to the first input matrix structure
+   * @param[in]  pSrcB   points to the second input matrix structure
+   * @param[out] pDst    points to output matrix structure
+   * @param[in]  pState  points to the array for storing intermediate results
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_q7(
+  const arm_matrix_instance_q7 * pSrcA,
+  const arm_matrix_instance_q7 * pSrcB,
+        arm_matrix_instance_q7 * pDst,
+        q7_t * pState);
+
+  /**
+   * @brief Q7 matrix and vector multiplication
+   * @param[in]  pSrcMat  points to the input matrix structure
+   * @param[in]  pVec     points to vector
+   * @param[out] pDst     points to output vector
+   */
+void arm_mat_vec_mult_q7(
+  const arm_matrix_instance_q7 *pSrcMat, 
+  const q7_t *pVec, 
+  q7_t *pDst);
+
+  /**
+   * @brief Q15 matrix multiplication
+   * @param[in]  pSrcA   points to the first input matrix structure
+   * @param[in]  pSrcB   points to the second input matrix structure
+   * @param[out] pDst    points to output matrix structure
+   * @param[in]  pState  points to the array for storing intermediate results
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pState);
+
+  /**
+   * @brief Q15 matrix and vector multiplication
+   * @param[in]  pSrcMat  points to the input matrix structure
+   * @param[in]  pVec     points to vector
+   * @param[out] pDst     points to output vector
+   */
+void arm_mat_vec_mult_q15(
+  const arm_matrix_instance_q15 *pSrcMat, 
+  const q15_t *pVec, 
+  q15_t *pDst);
+
+  /**
+   * @brief Q15 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA   points to the first input matrix structure
+   * @param[in]  pSrcB   points to the second input matrix structure
+   * @param[out] pDst    points to output matrix structure
+   * @param[in]  pState  points to the array for storing intermediate results
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_fast_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t * pState);
+
+  /**
+   * @brief Q31 matrix multiplication
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Q31 matrix multiplication
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @param[in]  pState  points to the array for storing intermediate results
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_opt_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst,
+        q31_t *pState);
+
+  /**
+   * @brief Q31 matrix and vector multiplication
+   * @param[in]  pSrcMat  points to the input matrix structure
+   * @param[in]  pVec     points to vector
+   * @param[out] pDst     points to output vector
+   */
+void arm_mat_vec_mult_q31(
+  const arm_matrix_instance_q31 *pSrcMat, 
+  const q31_t *pVec, 
+  q31_t *pDst);
+
+  /**
+   * @brief Q31 matrix multiplication (fast variant) for Cortex-M3 and Cortex-M4
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_fast_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Floating-point matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_f64(
+  const arm_matrix_instance_f64 * pSrcA,
+  const arm_matrix_instance_f64 * pSrcB,
+        arm_matrix_instance_f64 * pDst);
+
+  /**
+   * @brief Q15 matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief Floating-point matrix scaling.
+   * @param[in]  pSrc   points to the input matrix
+   * @param[in]  scale  scale factor
+   * @param[out] pDst   points to the output matrix
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        float32_t scale,
+        arm_matrix_instance_f32 * pDst);
+
+  /**
+   * @brief Q15 matrix scaling.
+   * @param[in]  pSrc        points to input matrix
+   * @param[in]  scaleFract  fractional portion of the scale factor
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to output matrix
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_scale_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        q15_t scaleFract,
+        int32_t shift,
+        arm_matrix_instance_q15 * pDst);
+
+  /**
+   * @brief Q31 matrix scaling.
+   * @param[in]  pSrc        points to input matrix
+   * @param[in]  scaleFract  fractional portion of the scale factor
+   * @param[in]  shift       number of bits to shift the result by
+   * @param[out] pDst        points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_scale_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        q31_t scaleFract,
+        int32_t shift,
+        arm_matrix_instance_q31 * pDst);
+
+  /**
+   * @brief  Q31 matrix initialization.
+   * @param[in,out] S         points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows     number of rows in the matrix.
+   * @param[in]     nColumns  number of columns in the matrix.
+   * @param[in]     pData     points to the matrix data array.
+   */
+void arm_mat_init_q31(
+        arm_matrix_instance_q31 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        q31_t * pData);
+
+  /**
+   * @brief  Q15 matrix initialization.
+   * @param[in,out] S         points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows     number of rows in the matrix.
+   * @param[in]     nColumns  number of columns in the matrix.
+   * @param[in]     pData     points to the matrix data array.
+   */
+void arm_mat_init_q15(
+        arm_matrix_instance_q15 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        q15_t * pData);
+
+  /**
+   * @brief  Floating-point matrix initialization.
+   * @param[in,out] S         points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows     number of rows in the matrix.
+   * @param[in]     nColumns  number of columns in the matrix.
+   * @param[in]     pData     points to the matrix data array.
+   */
+void arm_mat_init_f32(
+        arm_matrix_instance_f32 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        float32_t * pData);
+
+
+
+  /**
+   * @brief Floating-point matrix inverse.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+   */
+  arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * src,
+  arm_matrix_instance_f32 * dst);
+
+
+  /**
+   * @brief Floating-point matrix inverse.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+   */
+  arm_status arm_mat_inverse_f64(
+  const arm_matrix_instance_f64 * src,
+  arm_matrix_instance_f64 * dst);
+
+ /**
+   * @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
+   * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
+   * The decomposition is returning a lower triangular matrix.
+   */
+  arm_status arm_mat_cholesky_f64(
+  const arm_matrix_instance_f64 * src,
+  arm_matrix_instance_f64 * dst);
+
+ /**
+   * @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
+   * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
+   * The decomposition is returning a lower triangular matrix.
+   */
+  arm_status arm_mat_cholesky_f32(
+  const arm_matrix_instance_f32 * src,
+  arm_matrix_instance_f32 * dst);
+
+  /**
+   * @brief Solve UT . X = A where UT is an upper triangular matrix
+   * @param[in]  ut  The upper triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of UT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+  */
+  arm_status arm_mat_solve_upper_triangular_f32(
+  const arm_matrix_instance_f32 * ut,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst);
+
+ /**
+   * @brief Solve LT . X = A where LT is a lower triangular matrix
+   * @param[in]  lt  The lower triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of LT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+   */
+  arm_status arm_mat_solve_lower_triangular_f32(
+  const arm_matrix_instance_f32 * lt,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst);
+
+
+  /**
+   * @brief Solve UT . X = A where UT is an upper triangular matrix
+   * @param[in]  ut  The upper triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of UT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+  */
+  arm_status arm_mat_solve_upper_triangular_f64(
+  const arm_matrix_instance_f64 * ut,
+  const arm_matrix_instance_f64 * a,
+  arm_matrix_instance_f64 * dst);
+
+ /**
+   * @brief Solve LT . X = A where LT is a lower triangular matrix
+   * @param[in]  lt  The lower triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of LT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+   */
+  arm_status arm_mat_solve_lower_triangular_f64(
+  const arm_matrix_instance_f64 * lt,
+  const arm_matrix_instance_f64 * a,
+  arm_matrix_instance_f64 * dst);
+
+
+  /**
+   * @brief Floating-point LDL decomposition of Symmetric Positive Semi-Definite Matrix.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] l   points to the instance of the output floating-point triangular matrix structure.
+   * @param[out] d   points to the instance of the output floating-point diagonal matrix structure.
+   * @param[out] p   points to the instance of the output floating-point permutation vector.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
+   * The decomposition is returning a lower triangular matrix.
+   */
+  arm_status arm_mat_ldlt_f32(
+  const arm_matrix_instance_f32 * src,
+  arm_matrix_instance_f32 * l,
+  arm_matrix_instance_f32 * d,
+  uint16_t * pp);
+
+ /**
+   * @brief Floating-point LDL decomposition of Symmetric Positive Semi-Definite Matrix.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] l   points to the instance of the output floating-point triangular matrix structure.
+   * @param[out] d   points to the instance of the output floating-point diagonal matrix structure.
+   * @param[out] p   points to the instance of the output floating-point permutation vector.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
+   * The decomposition is returning a lower triangular matrix.
+   */
+  arm_status arm_mat_ldlt_f64(
+  const arm_matrix_instance_f64 * src,
+  arm_matrix_instance_f64 * l,
+  arm_matrix_instance_f64 * d,
+  uint16_t * pp);
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _MATRIX_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/matrix_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/matrix_functions_f16.h
new file mode 100755
index 00000000..3693ec43
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/matrix_functions_f16.h
@@ -0,0 +1,221 @@
+/******************************************************************************
+ * @file     matrix_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _MATRIX_FUNCTIONS_F16_H_
+#define _MATRIX_FUNCTIONS_F16_H_
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+    
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+ /**
+   * @brief Instance structure for the floating-point matrix structure.
+   */
+  typedef struct
+  {
+    uint16_t numRows;     /**< number of rows of the matrix.     */
+    uint16_t numCols;     /**< number of columns of the matrix.  */
+    float16_t *pData;     /**< points to the data of the matrix. */
+  } arm_matrix_instance_f16;
+
+ /**
+   * @brief Floating-point matrix addition.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_add_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst);
+
+  /**
+   * @brief Floating-point, complex, matrix multiplication.
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_mult_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst);
+
+  /**
+   * @brief Floating-point matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_trans_f16(
+  const arm_matrix_instance_f16 * pSrc,
+        arm_matrix_instance_f16 * pDst);
+
+  /**
+   * @brief Floating-point complex matrix transpose.
+   * @param[in]  pSrc  points to the input matrix
+   * @param[out] pDst  points to the output matrix
+   * @return    The function returns either  <code>ARM_MATH_SIZE_MISMATCH</code>
+   * or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_cmplx_trans_f16(
+  const arm_matrix_instance_f16 * pSrc,
+  arm_matrix_instance_f16 * pDst);
+
+  /**
+   * @brief Floating-point matrix multiplication
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_mult_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst);
+  /**
+   * @brief Floating-point matrix and vector multiplication
+   * @param[in]  pSrcMat  points to the input matrix structure
+   * @param[in]  pVec     points to vector
+   * @param[out] pDst     points to output vector
+   */
+void arm_mat_vec_mult_f16(
+  const arm_matrix_instance_f16 *pSrcMat, 
+  const float16_t *pVec, 
+  float16_t *pDst);
+
+  /**
+   * @brief Floating-point matrix subtraction
+   * @param[in]  pSrcA  points to the first input matrix structure
+   * @param[in]  pSrcB  points to the second input matrix structure
+   * @param[out] pDst   points to output matrix structure
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_sub_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst);
+
+  /**
+   * @brief Floating-point matrix scaling.
+   * @param[in]  pSrc   points to the input matrix
+   * @param[in]  scale  scale factor
+   * @param[out] pDst   points to the output matrix
+   * @return     The function returns either
+   * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+   */
+arm_status arm_mat_scale_f16(
+  const arm_matrix_instance_f16 * pSrc,
+        float16_t scale,
+        arm_matrix_instance_f16 * pDst);
+
+  /**
+   * @brief  Floating-point matrix initialization.
+   * @param[in,out] S         points to an instance of the floating-point matrix structure.
+   * @param[in]     nRows     number of rows in the matrix.
+   * @param[in]     nColumns  number of columns in the matrix.
+   * @param[in]     pData     points to the matrix data array.
+   */
+void arm_mat_init_f16(
+        arm_matrix_instance_f16 * S,
+        uint16_t nRows,
+        uint16_t nColumns,
+        float16_t * pData);
+
+
+  /**
+   * @brief Floating-point matrix inverse.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix is singular (does not have an inverse), then the algorithm terminates and returns error status ARM_MATH_SINGULAR.
+   */
+  arm_status arm_mat_inverse_f16(
+  const arm_matrix_instance_f16 * src,
+  arm_matrix_instance_f16 * dst);
+
+
+ /**
+   * @brief Floating-point Cholesky decomposition of Symmetric Positive Definite Matrix.
+   * @param[in]  src   points to the instance of the input floating-point matrix structure.
+   * @param[out] dst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * If the input matrix does not have a decomposition, then the algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
+   * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
+   * The decomposition is returning a lower triangular matrix.
+   */
+  arm_status arm_mat_cholesky_f16(
+  const arm_matrix_instance_f16 * src,
+  arm_matrix_instance_f16 * dst);
+
+ /**
+   * @brief Solve UT . X = A where UT is an upper triangular matrix
+   * @param[in]  ut  The upper triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of UT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+  */
+  arm_status arm_mat_solve_upper_triangular_f16(
+  const arm_matrix_instance_f16 * ut,
+  const arm_matrix_instance_f16 * a,
+  arm_matrix_instance_f16 * dst);
+
+ /**
+   * @brief Solve LT . X = A where LT is a lower triangular matrix
+   * @param[in]  lt  The lower triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of LT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+   */
+  arm_status arm_mat_solve_lower_triangular_f16(
+  const arm_matrix_instance_f16 * lt,
+  const arm_matrix_instance_f16 * a,
+  arm_matrix_instance_f16 * dst);
+
+
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _MATRIX_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/none.h b/Libraries/CMSIS/DSP/Include/dsp/none.h
new file mode 100755
index 00000000..130386ee
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/none.h
@@ -0,0 +1,576 @@
+/******************************************************************************
+ * @file     none.h
+ * @brief    Intrinsincs when no DSP extension available
+ * @version  V1.9.0
+ * @date     20. July 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*
+
+Definitions in this file are allowing to reuse some versions of the
+CMSIS-DSP to build on a core (M0 for instance) or a host where
+DSP extension are not available.
+
+Ideally a pure C version should have been used instead.
+But those are not always available or use a restricted set
+of intrinsics.
+
+*/
+ 
+#ifndef _NONE_H_
+#define _NONE_H_
+
+#include "arm_math_types.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+ 
+
+/*
+
+Normally those kind of definitions are in a compiler file
+in Core or Core_A.
+
+But for MSVC compiler it is a bit special. The goal is very specific
+to CMSIS-DSP and only to allow the use of this library from other
+systems like Python or Matlab.
+
+MSVC is not going to be used to cross-compile to ARM. So, having a MSVC
+compiler file in Core or Core_A would not make sense.
+
+*/
+#if defined ( _MSC_VER ) || defined(__GNUC_PYTHON__) || defined(__APPLE_CC__)
+    __STATIC_FORCEINLINE uint8_t __CLZ(uint32_t data)
+    {
+      if (data == 0U) { return 32U; }
+
+      uint32_t count = 0U;
+      uint32_t mask = 0x80000000U;
+
+      while ((data & mask) == 0U)
+      {
+        count += 1U;
+        mask = mask >> 1U;
+      }
+      return count;
+    }
+
+  __STATIC_FORCEINLINE int32_t __SSAT(int32_t val, uint32_t sat)
+  {
+    if ((sat >= 1U) && (sat <= 32U))
+    {
+      const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
+      const int32_t min = -1 - max ;
+      if (val > max)
+      {
+        return max;
+      }
+      else if (val < min)
+      {
+        return min;
+      }
+    }
+    return val;
+  }
+
+  __STATIC_FORCEINLINE uint32_t __USAT(int32_t val, uint32_t sat)
+  {
+    if (sat <= 31U)
+    {
+      const uint32_t max = ((1U << sat) - 1U);
+      if (val > (int32_t)max)
+      {
+        return max;
+      }
+      else if (val < 0)
+      {
+        return 0U;
+      }
+    }
+    return (uint32_t)val;
+  }
+
+ /**
+  \brief   Rotate Right in unsigned value (32 bit)
+  \details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
+  \param [in]    op1  Value to rotate
+  \param [in]    op2  Number of Bits to rotate
+  \return               Rotated value
+ */
+__STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
+{
+  op2 %= 32U;
+  if (op2 == 0U)
+  {
+    return op1;
+  }
+  return (op1 >> op2) | (op1 << (32U - op2));
+}
+
+
+#endif
+
+/**
+   * @brief Clips Q63 to Q31 values.
+   */
+  __STATIC_FORCEINLINE q31_t clip_q63_to_q31(
+  q63_t x)
+  {
+    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+      ((0x7FFFFFFF ^ ((q31_t) (x >> 63)))) : (q31_t) x;
+  }
+
+  /**
+   * @brief Clips Q63 to Q15 values.
+   */
+  __STATIC_FORCEINLINE q15_t clip_q63_to_q15(
+  q63_t x)
+  {
+    return ((q31_t) (x >> 32) != ((q31_t) x >> 31)) ?
+      ((0x7FFF ^ ((q15_t) (x >> 63)))) : (q15_t) (x >> 15);
+  }
+
+  /**
+   * @brief Clips Q31 to Q7 values.
+   */
+  __STATIC_FORCEINLINE q7_t clip_q31_to_q7(
+  q31_t x)
+  {
+    return ((q31_t) (x >> 24) != ((q31_t) x >> 23)) ?
+      ((0x7F ^ ((q7_t) (x >> 31)))) : (q7_t) x;
+  }
+
+  /**
+   * @brief Clips Q31 to Q15 values.
+   */
+  __STATIC_FORCEINLINE q15_t clip_q31_to_q15(
+  q31_t x)
+  {
+    return ((q31_t) (x >> 16) != ((q31_t) x >> 15)) ?
+      ((0x7FFF ^ ((q15_t) (x >> 31)))) : (q15_t) x;
+  }
+
+  /**
+   * @brief Multiplies 32 X 64 and returns 32 bit result in 2.30 format.
+   */
+  __STATIC_FORCEINLINE q63_t mult32x64(
+  q63_t x,
+  q31_t y)
+  {
+    return ((((q63_t) (x & 0x00000000FFFFFFFF) * y) >> 32) +
+            (((q63_t) (x >> 32)                * y)      )  );
+  }
+
+/* SMMLAR */
+#define multAcc_32x32_keep32_R(a, x, y) \
+    a = (q31_t) (((((q63_t) a) << 32) + ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+/* SMMLSR */
+#define multSub_32x32_keep32_R(a, x, y) \
+    a = (q31_t) (((((q63_t) a) << 32) - ((q63_t) x * y) + 0x80000000LL ) >> 32)
+
+/* SMMULR */
+#define mult_32x32_keep32_R(a, x, y) \
+    a = (q31_t) (((q63_t) x * y + 0x80000000LL ) >> 32)
+
+/* SMMLA */
+#define multAcc_32x32_keep32(a, x, y) \
+    a += (q31_t) (((q63_t) x * y) >> 32)
+
+/* SMMLS */
+#define multSub_32x32_keep32(a, x, y) \
+    a -= (q31_t) (((q63_t) x * y) >> 32)
+
+/* SMMUL */
+#define mult_32x32_keep32(a, x, y) \
+    a = (q31_t) (((q63_t) x * y ) >> 32)
+
+#ifndef ARM_MATH_DSP
+  /**
+   * @brief definition to pack two 16 bit values.
+   */
+  #define __PKHBT(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0x0000FFFF) | \
+                                      (((int32_t)(ARG2) << ARG3) & (int32_t)0xFFFF0000)  )
+  #define __PKHTB(ARG1, ARG2, ARG3) ( (((int32_t)(ARG1) <<    0) & (int32_t)0xFFFF0000) | \
+                                      (((int32_t)(ARG2) >> ARG3) & (int32_t)0x0000FFFF)  )
+#endif
+
+   /**
+   * @brief definition to pack four 8 bit values.
+   */
+#ifndef ARM_MATH_BIG_ENDIAN
+  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v0) <<  0) & (int32_t)0x000000FF) | \
+                                  (((int32_t)(v1) <<  8) & (int32_t)0x0000FF00) | \
+                                  (((int32_t)(v2) << 16) & (int32_t)0x00FF0000) | \
+                                  (((int32_t)(v3) << 24) & (int32_t)0xFF000000)  )
+#else
+  #define __PACKq7(v0,v1,v2,v3) ( (((int32_t)(v3) <<  0) & (int32_t)0x000000FF) | \
+                                  (((int32_t)(v2) <<  8) & (int32_t)0x0000FF00) | \
+                                  (((int32_t)(v1) << 16) & (int32_t)0x00FF0000) | \
+                                  (((int32_t)(v0) << 24) & (int32_t)0xFF000000)  )
+#endif
+
+
+ 
+
+/*
+ * @brief C custom defined intrinsic functions
+ */
+#if !defined (ARM_MATH_DSP)
+
+
+  /*
+   * @brief C custom defined QADD8
+   */
+  __STATIC_FORCEINLINE uint32_t __QADD8(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s, t, u;
+
+    r = __SSAT(((((q31_t)x << 24) >> 24) + (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+    s = __SSAT(((((q31_t)x << 16) >> 24) + (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+    t = __SSAT(((((q31_t)x <<  8) >> 24) + (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
+    u = __SSAT(((((q31_t)x      ) >> 24) + (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
+
+    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QSUB8
+   */
+  __STATIC_FORCEINLINE uint32_t __QSUB8(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s, t, u;
+
+    r = __SSAT(((((q31_t)x << 24) >> 24) - (((q31_t)y << 24) >> 24)), 8) & (int32_t)0x000000FF;
+    s = __SSAT(((((q31_t)x << 16) >> 24) - (((q31_t)y << 16) >> 24)), 8) & (int32_t)0x000000FF;
+    t = __SSAT(((((q31_t)x <<  8) >> 24) - (((q31_t)y <<  8) >> 24)), 8) & (int32_t)0x000000FF;
+    u = __SSAT(((((q31_t)x      ) >> 24) - (((q31_t)y      ) >> 24)), 8) & (int32_t)0x000000FF;
+
+    return ((uint32_t)((u << 24) | (t << 16) | (s <<  8) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QADD16
+   */
+  __STATIC_FORCEINLINE uint32_t __QADD16(
+  uint32_t x,
+  uint32_t y)
+  {
+/*  q31_t r,     s;  without initialisation 'arm_offset_q15 test' fails  but 'intrinsic' tests pass! for armCC */
+    q31_t r = 0, s = 0;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHADD16
+   */
+  __STATIC_FORCEINLINE uint32_t __SHADD16(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QSUB16
+   */
+  __STATIC_FORCEINLINE uint32_t __QSUB16(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHSUB16
+   */
+  __STATIC_FORCEINLINE uint32_t __SHSUB16(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QASX
+   */
+  __STATIC_FORCEINLINE uint32_t __QASX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHASX
+   */
+  __STATIC_FORCEINLINE uint32_t __SHASX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) - (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) + (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined QSAX
+   */
+  __STATIC_FORCEINLINE uint32_t __QSAX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = __SSAT(((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)), 16) & (int32_t)0x0000FFFF;
+    s = __SSAT(((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)), 16) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SHSAX
+   */
+  __STATIC_FORCEINLINE uint32_t __SHSAX(
+  uint32_t x,
+  uint32_t y)
+  {
+    q31_t r, s;
+
+    r = (((((q31_t)x << 16) >> 16) + (((q31_t)y      ) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+    s = (((((q31_t)x      ) >> 16) - (((q31_t)y << 16) >> 16)) >> 1) & (int32_t)0x0000FFFF;
+
+    return ((uint32_t)((s << 16) | (r      )));
+  }
+
+
+  /*
+   * @brief C custom defined SMUSDX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUSDX(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
+  }
+
+  /*
+   * @brief C custom defined SMUADX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUADX(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16))   ));
+  }
+
+
+  /*
+   * @brief C custom defined QADD
+   */
+  __STATIC_FORCEINLINE int32_t __QADD(
+  int32_t x,
+  int32_t y)
+  {
+    return ((int32_t)(clip_q63_to_q31((q63_t)x + (q31_t)y)));
+  }
+
+
+  /*
+   * @brief C custom defined QSUB
+   */
+  __STATIC_FORCEINLINE int32_t __QSUB(
+  int32_t x,
+  int32_t y)
+  {
+    return ((int32_t)(clip_q63_to_q31((q63_t)x - (q31_t)y)));
+  }
+
+
+  /*
+   * @brief C custom defined SMLAD
+   */
+  __STATIC_FORCEINLINE uint32_t __SMLAD(
+  uint32_t x,
+  uint32_t y,
+  uint32_t sum)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ( ((q31_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLADX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMLADX(
+  uint32_t x,
+  uint32_t y,
+  uint32_t sum)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ( ((q31_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLSDX
+   */
+  __STATIC_FORCEINLINE uint32_t __SMLSDX(
+  uint32_t x,
+  uint32_t y,
+  uint32_t sum)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) -
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ( ((q31_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLALD
+   */
+  __STATIC_FORCEINLINE uint64_t __SMLALD(
+  uint32_t x,
+  uint32_t y,
+  uint64_t sum)
+  {
+/*  return (sum + ((q15_t) (x >> 16) * (q15_t) (y >> 16)) + ((q15_t) x * (q15_t) y)); */
+    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ( ((q63_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMLALDX
+   */
+  __STATIC_FORCEINLINE uint64_t __SMLALDX(
+  uint32_t x,
+  uint32_t y,
+  uint64_t sum)
+  {
+/*  return (sum + ((q15_t) (x >> 16) * (q15_t) y)) + ((q15_t) x * (q15_t) (y >> 16)); */
+    return ((uint64_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y      ) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ( ((q63_t)sum    )                                  )   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMUAD
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUAD(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) +
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
+  }
+
+
+  /*
+   * @brief C custom defined SMUSD
+   */
+  __STATIC_FORCEINLINE uint32_t __SMUSD(
+  uint32_t x,
+  uint32_t y)
+  {
+    return ((uint32_t)(((((q31_t)x << 16) >> 16) * (((q31_t)y << 16) >> 16)) -
+                       ((((q31_t)x      ) >> 16) * (((q31_t)y      ) >> 16))   ));
+  }
+
+
+  /*
+   * @brief C custom defined SXTB16
+   */
+  __STATIC_FORCEINLINE uint32_t __SXTB16(
+  uint32_t x)
+  {
+    return ((uint32_t)(((((q31_t)x << 24) >> 24) & (q31_t)0x0000FFFF) |
+                       ((((q31_t)x <<  8) >>  8) & (q31_t)0xFFFF0000)  ));
+  }
+
+  /*
+   * @brief C custom defined SMMLA
+   */
+  __STATIC_FORCEINLINE int32_t __SMMLA(
+  int32_t x,
+  int32_t y,
+  int32_t sum)
+  {
+    return (sum + (int32_t) (((int64_t) x * y) >> 32));
+  }
+
+#endif /* !defined (ARM_MATH_DSP) */
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _TRANSFORM_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/quaternion_math_functions.h b/Libraries/CMSIS/DSP/Include/dsp/quaternion_math_functions.h
new file mode 100755
index 00000000..0c5d0674
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/quaternion_math_functions.h
@@ -0,0 +1,159 @@
+/******************************************************************************
+ * @file     quaternion_math_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2021 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _QUATERNION_MATH_FUNCTIONS_H_
+#define _QUATERNION_MATH_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @defgroup groupQuaternionMath Quaternion Math Functions
+ * Functions to operates on quaternions and convert between a
+ * rotation and quaternion representation.
+ */
+
+
+/**
+  @brief         Floating-point quaternion Norm.
+  @param[in]     pInputQuaternions       points to the input vector of quaternions
+  @param[out]    pNorms                  points to the output vector of norms
+  @param[in]     nbQuaternions           number of quaternions in each vector
+  @return        none
+ */
+
+
+
+void arm_quaternion_norm_f32(const float32_t *pInputQuaternions, 
+    float32_t *pNorms,
+    uint32_t nbQuaternions);
+
+
+/**
+  @brief         Floating-point quaternion inverse.
+  @param[in]     pInputQuaternions            points to the input vector of quaternions
+  @param[out]    pInverseQuaternions          points to the output vector of inverse quaternions
+  @param[in]     nbQuaternions                number of quaternions in each vector
+  @return        none
+ */
+
+void arm_quaternion_inverse_f32(const float32_t *pInputQuaternions, 
+    float32_t *pInverseQuaternions, 
+    uint32_t nbQuaternions);
+
+/**
+  @brief         Floating-point quaternion conjugates.
+  @param[in]     pInputQuaternions            points to the input vector of quaternions
+  @param[out]    pConjugateQuaternions        points to the output vector of conjugate quaternions
+  @param[in]     nbQuaternions                number of quaternions in each vector
+  @return        none
+ */
+void arm_quaternion_conjugate_f32(const float32_t *inputQuaternions, 
+    float32_t *pConjugateQuaternions, 
+    uint32_t nbQuaternions);
+
+/**
+  @brief         Floating-point normalization of quaternions.
+  @param[in]     pInputQuaternions            points to the input vector of quaternions
+  @param[out]    pNormalizedQuaternions       points to the output vector of normalized quaternions
+  @param[in]     nbQuaternions                number of quaternions in each vector
+  @return        none
+ */
+void arm_quaternion_normalize_f32(const float32_t *inputQuaternions, 
+    float32_t *pNormalizedQuaternions, 
+    uint32_t nbQuaternions);
+
+
+/**
+  @brief         Floating-point product of two quaternions.
+  @param[in]     qa       First quaternion
+  @param[in]     qb       Second quaternion
+  @param[out]    r        Product of two quaternions
+  @return        none
+ */
+void arm_quaternion_product_single_f32(const float32_t *qa, 
+    const float32_t *qb, 
+    float32_t *r);
+
+/**
+  @brief         Floating-point elementwise product two quaternions.
+  @param[in]     qa                  First array of quaternions
+  @param[in]     qb                  Second array of quaternions
+  @param[out]    r                   Elementwise product of quaternions
+  @param[in]     nbQuaternions       Number of quaternions in the array
+  @return        none
+ */
+void arm_quaternion_product_f32(const float32_t *qa, 
+    const float32_t *qb, 
+    float32_t *r,
+    uint32_t nbQuaternions);
+
+/**
+ * @brief Conversion of quaternion to equivalent rotation matrix.
+ * @param[in]       pInputQuaternions points to an array of normalized quaternions
+ * @param[out]      pOutputRotations points to an array of 3x3 rotations (in row order)
+ * @param[in]       nbQuaternions in the array
+ * @return none.
+ *
+ * <b>Format of rotation matrix</b>
+ * \par
+ * The quaternion a + ib + jc + kd is converted into rotation matrix:
+ *   a^2 + b^2 - c^2 - d^2                 2bc - 2ad                 2bd + 2ac
+ *               2bc + 2ad     a^2 - b^2 + c^2 - d^2                 2cd - 2ab
+ *               2bd - 2ac                 2cd + 2ab     a^2 - b^2 - c^2 + d^2
+ *
+ * Rotation matrix is saved in row order : R00 R01 R02 R10 R11 R12 R20 R21 R22
+ */
+void arm_quaternion2rotation_f32(const float32_t *pInputQuaternions, 
+    float32_t *pOutputRotations, 
+    uint32_t nbQuaternions);
+
+/**
+ * @brief Conversion of a rotation matrix to equivalent quaternion.
+ * @param[in]       pInputRotations points to an array 3x3 rotation matrix (in row order)
+ * @param[out]      pOutputQuaternions points to an array of quaternions
+ * @param[in]       nbQuaternions in the array
+ * @return none.
+*/
+void arm_rotation2quaternion_f32(const float32_t *pInputRotations, 
+    float32_t *pOutputQuaternions,  
+    uint32_t nbQuaternions);
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _QUATERNION_MATH_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/statistics_functions.h b/Libraries/CMSIS/DSP/Include/dsp/statistics_functions.h
new file mode 100755
index 00000000..f82e1b21
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/statistics_functions.h
@@ -0,0 +1,904 @@
+/******************************************************************************
+ * @file     statistics_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _STATISTICS_FUNCTIONS_H_
+#define _STATISTICS_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/basic_math_functions.h"
+#include "dsp/fast_math_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+/**
+ * @defgroup groupStats Statistics Functions
+ */
+
+/**
+ * @brief Computation of the LogSumExp
+ *
+ * In probabilistic computations, the dynamic of the probability values can be very
+ * wide because they come from gaussian functions.
+ * To avoid underflow and overflow issues, the values are represented by their log.
+ * In this representation, multiplying the original exp values is easy : their logs are added.
+ * But adding the original exp values is requiring some special handling and it is the
+ * goal of the LogSumExp function.
+ *
+ * If the values are x1...xn, the function is computing:
+ *
+ * ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that
+ * rounding issues are minimised.
+ *
+ * The max xm of the values is extracted and the function is computing:
+ * xm + ln(exp(x1 - xm) + ... + exp(xn - xm))
+ *
+ * @param[in]  *in         Pointer to an array of input values.
+ * @param[in]  blockSize   Number of samples in the input array.
+ * @return LogSumExp
+ *
+ */
+
+
+float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize);
+
+/**
+ * @brief Dot product with log arithmetic
+ *
+ * Vectors are containing the log of the samples
+ *
+ * @param[in]       pSrcA points to the first input vector
+ * @param[in]       pSrcB points to the second input vector
+ * @param[in]       blockSize number of samples in each vector
+ * @param[in]       pTmpBuffer temporary buffer of length blockSize
+ * @return The log of the dot product .
+ *
+ */
+
+
+float32_t arm_logsumexp_dot_prod_f32(const float32_t * pSrcA,
+  const float32_t * pSrcB,
+  uint32_t blockSize,
+  float32_t *pTmpBuffer);
+
+/**
+ * @brief Entropy
+ *
+ * @param[in]  pSrcA        Array of input values.
+ * @param[in]  blockSize    Number of samples in the input array.
+ * @return     Entropy      -Sum(p ln p)
+ *
+ */
+
+
+float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize);
+
+
+/**
+ * @brief Entropy
+ *
+ * @param[in]  pSrcA        Array of input values.
+ * @param[in]  blockSize    Number of samples in the input array.
+ * @return     Entropy      -Sum(p ln p)
+ *
+ */
+
+
+float64_t arm_entropy_f64(const float64_t * pSrcA, uint32_t blockSize);
+
+
+/**
+ * @brief Kullback-Leibler
+ *
+ * @param[in]  pSrcA         Pointer to an array of input values for probability distribution A.
+ * @param[in]  pSrcB         Pointer to an array of input values for probability distribution B.
+ * @param[in]  blockSize     Number of samples in the input array.
+ * @return Kullback-Leibler  Divergence D(A || B)
+ *
+ */
+float32_t arm_kullback_leibler_f32(const float32_t * pSrcA
+  ,const float32_t * pSrcB
+  ,uint32_t blockSize);
+
+
+/**
+ * @brief Kullback-Leibler
+ *
+ * @param[in]  pSrcA         Pointer to an array of input values for probability distribution A.
+ * @param[in]  pSrcB         Pointer to an array of input values for probability distribution B.
+ * @param[in]  blockSize     Number of samples in the input array.
+ * @return Kullback-Leibler  Divergence D(A || B)
+ *
+ */
+float64_t arm_kullback_leibler_f64(const float64_t * pSrcA, 
+                const float64_t * pSrcB, 
+                uint32_t blockSize);
+
+
+ /**
+   * @brief  Sum of the squares of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult);
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult);
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult);
+
+
+  /**
+   * @brief  Sum of the squares of the elements of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Mean value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult);
+
+
+  /**
+   * @brief  Variance of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Variance of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult);
+
+
+  /**
+   * @brief  Variance of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Variance of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Root Mean Square of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_rms_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Root Mean Square of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_rms_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Root Mean Square of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_rms_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Standard deviation of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Standard deviation of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult);
+
+
+  /**
+   * @brief  Standard deviation of the elements of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Standard deviation of the elements of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  
+  /**
+   * @brief  Minimum value of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] result     is output pointer
+   * @param[in]  index      is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * result,
+        uint32_t * index);
+
+  /**
+   * @brief  Minimum value of absolute values of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] result     is output pointer
+   * @param[in]  index      is the array index of the minimum value in the input buffer.
+   */
+  void arm_absmin_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * result,
+        uint32_t * index);
+
+    /**
+   * @brief  Minimum value of absolute values of a Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] result     is output pointer
+   */
+  void arm_absmin_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * result);
+
+
+  /**
+   * @brief  Minimum value of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
+
+/**
+   * @brief  Minimum value of absolute values of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[in]  pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_absmin_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of absolute values of a Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   */
+  void arm_absmin_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+
+  /**
+   * @brief  Minimum value of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of absolute values of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_absmin_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
+
+ /**
+   * @brief  Minimum value of absolute values of a Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   */
+  void arm_absmin_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+
+  /**
+   * @brief  Minimum value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of absolute values of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_absmin_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of absolute values of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   */
+  void arm_absmin_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+
+  /**
+   * @brief  Minimum value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of absolute values of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_absmin_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex);
+
+  /**
+   * @brief  Minimum value of absolute values of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   */
+  void arm_absmin_no_idx_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult);
+
+
+/**
+ * @brief Maximum value of a Q7 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a Q7 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_absmax_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a Q7 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ */
+  void arm_absmax_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult);
+
+
+/**
+ * @brief Maximum value of a Q15 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a Q15 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_absmax_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex);
+
+  /**
+ * @brief Maximum value of absolute values of a Q15 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ */
+  void arm_absmax_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult);
+
+/**
+ * @brief Maximum value of a Q31 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a Q31 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_absmax_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex);
+
+ /**
+ * @brief Maximum value of absolute values of a Q31 vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ */
+  void arm_absmax_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult);
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_absmax_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex);
+
+ /**
+ * @brief Maximum value of absolute values of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ */
+  void arm_absmax_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult);
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_absmax_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ */
+  void arm_absmax_no_idx_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult);
+
+  /**
+    @brief         Maximum value of a floating-point vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    maximum value returned here
+    @return        none
+   */
+  void arm_max_no_idx_f32(
+      const float32_t *pSrc,
+      uint32_t   blockSize,
+      float32_t *pResult);
+
+  /**
+    @brief         Minimum value of a floating-point vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    minimum value returned here
+    @return        none
+   */
+  void arm_min_no_idx_f32(
+      const float32_t *pSrc,
+      uint32_t   blockSize,
+      float32_t *pResult);
+
+  /**
+    @brief         Maximum value of a floating-point vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    maximum value returned here
+    @return        none
+   */
+  void arm_max_no_idx_f64(
+      const float64_t *pSrc,
+      uint32_t   blockSize,
+      float64_t *pResult);
+
+  /**
+    @brief         Maximum value of a q31 vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    maximum value returned here
+    @return        none
+   */
+  void arm_max_no_idx_q31(
+      const q31_t *pSrc,
+      uint32_t   blockSize,
+      q31_t *pResult);
+
+  /**
+    @brief         Maximum value of a q15 vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    maximum value returned here
+    @return        none
+   */
+  void arm_max_no_idx_q15(
+      const q15_t *pSrc,
+      uint32_t   blockSize,
+      q15_t *pResult);
+
+  /**
+    @brief         Maximum value of a q7 vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    maximum value returned here
+    @return        none
+   */
+  void arm_max_no_idx_q7(
+      const q7_t *pSrc,
+      uint32_t   blockSize,
+      q7_t *pResult);
+
+  /**
+    @brief         Minimum value of a floating-point vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    minimum value returned here
+    @return        none
+   */
+  void arm_min_no_idx_f64(
+      const float64_t *pSrc,
+      uint32_t   blockSize,
+      float64_t *pResult);
+
+/**
+    @brief         Minimum value of a q31 vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    minimum value returned here
+    @return        none
+   */
+  void arm_min_no_idx_q31(
+      const q31_t *pSrc,
+      uint32_t   blockSize,
+      q31_t *pResult);
+
+  /**
+    @brief         Minimum value of a q15 vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    minimum value returned here
+    @return        none
+   */
+  void arm_min_no_idx_q15(
+      const q15_t *pSrc,
+      uint32_t   blockSize,
+      q15_t *pResult);
+
+  /**
+    @brief         Minimum value of a q7 vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    minimum value returned here
+    @return        none
+   */
+  void arm_min_no_idx_q7(
+      const q7_t *pSrc,
+      uint32_t   blockSize,
+      q7_t *pResult);
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _STATISTICS_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/statistics_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/statistics_functions_f16.h
new file mode 100755
index 00000000..60eaf76f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/statistics_functions_f16.h
@@ -0,0 +1,251 @@
+/******************************************************************************
+ * @file     statistics_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _STATISTICS_FUNCTIONS_F16_H_
+#define _STATISTICS_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/basic_math_functions_f16.h"
+#include "dsp/fast_math_functions_f16.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+ /**
+   * @brief  Sum of the squares of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_power_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+ /**
+   * @brief  Mean value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_mean_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+  /**
+   * @brief  Variance of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_var_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+ /**
+   * @brief  Root Mean Square of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_rms_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+ /**
+   * @brief  Standard deviation of the elements of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output value.
+   */
+  void arm_std_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+ /**
+   * @brief  Minimum value of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_min_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex);
+
+ /**
+   * @brief  Minimum value of absolute values of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   * @param[out] pIndex     is the array index of the minimum value in the input buffer.
+   */
+  void arm_absmin_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_max_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex);
+
+/**
+ * @brief Maximum value of absolute values of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ * @param[out] pIndex     index of maximum value returned here
+ */
+  void arm_absmax_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex);
+
+    /**
+   * @brief  Minimum value of absolute values of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   */
+  void arm_absmin_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ */
+  void arm_absmax_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+
+/**
+ * @brief Entropy
+ *
+ * @param[in]  pSrcA        Array of input values.
+ * @param[in]  blockSize    Number of samples in the input array.
+ * @return     Entropy      -Sum(p ln p)
+ *
+ */
+
+
+float16_t arm_entropy_f16(const float16_t * pSrcA,uint32_t blockSize);
+
+float16_t arm_logsumexp_f16(const float16_t *in, uint32_t blockSize);
+
+/**
+ * @brief Dot product with log arithmetic
+ *
+ * Vectors are containing the log of the samples
+ *
+ * @param[in]       pSrcA points to the first input vector
+ * @param[in]       pSrcB points to the second input vector
+ * @param[in]       blockSize number of samples in each vector
+ * @param[in]       pTmpBuffer temporary buffer of length blockSize
+ * @return The log of the dot product .
+ *
+ */
+
+
+float16_t arm_logsumexp_dot_prod_f16(const float16_t * pSrcA,
+  const float16_t * pSrcB,
+  uint32_t blockSize,
+  float16_t *pTmpBuffer);
+
+/**
+ * @brief Kullback-Leibler
+ *
+ * @param[in]  pSrcA         Pointer to an array of input values for probability distribution A.
+ * @param[in]  pSrcB         Pointer to an array of input values for probability distribution B.
+ * @param[in]  blockSize     Number of samples in the input array.
+ * @return Kullback-Leibler  Divergence D(A || B)
+ *
+ */
+float16_t arm_kullback_leibler_f16(const float16_t * pSrcA
+  ,const float16_t * pSrcB
+  ,uint32_t blockSize);
+
+/**
+    @brief         Maximum value of a floating-point vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    maximum value returned here
+    @return        none
+   */
+  void arm_max_no_idx_f16(
+      const float16_t *pSrc,
+      uint32_t   blockSize,
+      float16_t *pResult);
+
+/**
+    @brief         Minimum value of a floating-point vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    minimum value returned here
+    @return        none
+   */
+  void arm_min_no_idx_f16(
+      const float16_t *pSrc,
+      uint32_t   blockSize,
+      float16_t *pResult);
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _STATISTICS_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/support_functions.h b/Libraries/CMSIS/DSP/Include/dsp/support_functions.h
new file mode 100755
index 00000000..9c775932
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/support_functions.h
@@ -0,0 +1,453 @@
+/******************************************************************************
+ * @file     support_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _SUPPORT_FUNCTIONS_H_
+#define _SUPPORT_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @defgroup groupSupport Support Functions
+ */
+
+
+/**
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]  pSrc       points to the floating-point input vector
+   * @param[out] pDst       points to the Q31 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+  void arm_float_to_q31(
+  const float32_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q15 vector.
+   * @param[in]  pSrc       points to the floating-point input vector
+   * @param[out] pDst       points to the Q15 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+  void arm_float_to_q15(
+  const float32_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief Converts the elements of the floating-point vector to Q7 vector.
+   * @param[in]  pSrc       points to the floating-point input vector
+   * @param[out] pDst       points to the Q7 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+  void arm_float_to_q7(
+  const float32_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q31_to_float(
+  const q31_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to Q15 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q31_to_q15(
+  const q31_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q31 vector to Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q31_to_q7(
+  const q31_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q15_to_float(
+  const q15_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to Q31 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q15_to_q31(
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q15 vector to Q7 vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q15_to_q7(
+  const q15_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[out] pDst       is output pointer
+   * @param[in]  blockSize  is the number of samples to process
+   */
+  void arm_q7_to_float(
+  const q7_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q31 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_q7_to_q31(
+  const q7_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Converts the elements of the Q7 vector to Q15 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_q7_to_q15(
+  const q7_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+
+
+  
+  /**
+   * @brief Struct for specifying sorting algorithm
+   */
+  typedef enum
+  {
+    ARM_SORT_BITONIC   = 0,
+             /**< Bitonic sort   */
+    ARM_SORT_BUBBLE    = 1,
+             /**< Bubble sort    */
+    ARM_SORT_HEAP      = 2,
+             /**< Heap sort      */
+    ARM_SORT_INSERTION = 3,
+             /**< Insertion sort */
+    ARM_SORT_QUICK     = 4,
+             /**< Quick sort     */
+    ARM_SORT_SELECTION = 5
+             /**< Selection sort */
+  } arm_sort_alg;
+
+  /**
+   * @brief Struct for specifying sorting algorithm
+   */
+  typedef enum
+  {
+    ARM_SORT_DESCENDING = 0,
+             /**< Descending order (9 to 0) */
+    ARM_SORT_ASCENDING = 1
+             /**< Ascending order (0 to 9) */
+  } arm_sort_dir;
+
+  /**
+   * @brief Instance structure for the sorting algorithms.
+   */
+  typedef struct            
+  {
+    arm_sort_alg alg;        /**< Sorting algorithm selected */
+    arm_sort_dir dir;        /**< Sorting order (direction)  */
+  } arm_sort_instance_f32;  
+
+  /**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_sort_f32(
+    const arm_sort_instance_f32 * S, 
+          float32_t * pSrc, 
+          float32_t * pDst, 
+          uint32_t blockSize);
+
+  /**
+   * @param[in,out]  S            points to an instance of the sorting structure.
+   * @param[in]      alg          Selected algorithm.
+   * @param[in]      dir          Sorting order.
+   */
+  void arm_sort_init_f32(
+    arm_sort_instance_f32 * S, 
+    arm_sort_alg alg, 
+    arm_sort_dir dir); 
+
+  /**
+   * @brief Instance structure for the sorting algorithms.
+   */
+  typedef struct            
+  {
+    arm_sort_dir dir;        /**< Sorting order (direction)  */
+    float32_t * buffer;      /**< Working buffer */
+  } arm_merge_sort_instance_f32;  
+
+  /**
+   * @param[in]      S          points to an instance of the sorting structure.
+   * @param[in,out]  pSrc       points to the block of input data.
+   * @param[out]     pDst       points to the block of output data
+   * @param[in]      blockSize  number of samples to process.
+   */
+  void arm_merge_sort_f32(
+    const arm_merge_sort_instance_f32 * S,
+          float32_t *pSrc,
+          float32_t *pDst,
+          uint32_t blockSize);
+
+  /**
+   * @param[in,out]  S            points to an instance of the sorting structure.
+   * @param[in]      dir          Sorting order.
+   * @param[in]      buffer       Working buffer.
+   */
+  void arm_merge_sort_init_f32(
+    arm_merge_sort_instance_f32 * S,
+    arm_sort_dir dir,
+    float32_t * buffer);
+
+ 
+ 
+  /**
+   * @brief  Copies the elements of a floating-point vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+ 
+ 
+  /**
+   * @brief  Copies the elements of a floating-point vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize);
+
+
+
+  /**
+   * @brief  Copies the elements of a Q7 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Copies the elements of a Q15 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Copies the elements of a Q31 vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_copy_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a floating-point vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_f32(
+        float32_t value,
+        float32_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a floating-point vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_f64(
+        float64_t value,
+        float64_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a Q7 vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_q7(
+        q7_t value,
+        q7_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a Q15 vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_q15(
+        q15_t value,
+        q15_t * pDst,
+        uint32_t blockSize);
+
+
+  /**
+   * @brief  Fills a constant value into a Q31 vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+  void arm_fill_q31(
+        q31_t value,
+        q31_t * pDst,
+        uint32_t blockSize);
+
+
+
+
+
+
+
+/**
+ * @brief Weighted sum
+ *
+ *
+ * @param[in]    *in           Array of input values.
+ * @param[in]    *weigths      Weights
+ * @param[in]    blockSize     Number of samples in the input array.
+ * @return Weighted sum
+ *
+ */
+float32_t arm_weighted_sum_f32(const float32_t *in
+  , const float32_t *weigths
+  , uint32_t blockSize);
+
+
+/**
+ * @brief Barycenter
+ *
+ *
+ * @param[in]    in         List of vectors
+ * @param[in]    weights    Weights of the vectors
+ * @param[out]   out        Barycenter
+ * @param[in]    nbVectors  Number of vectors
+ * @param[in]    vecDim     Dimension of space (vector dimension)
+ * @return       None
+ *
+ */
+void arm_barycenter_f32(const float32_t *in
+  , const float32_t *weights
+  , float32_t *out
+  , uint32_t nbVectors
+  , uint32_t vecDim);
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _SUPPORT_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/support_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/support_functions_f16.h
new file mode 100755
index 00000000..bc3f2668
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/support_functions_f16.h
@@ -0,0 +1,187 @@
+/******************************************************************************
+ * @file     support_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _SUPPORT_FUNCTIONS_F16_H_
+#define _SUPPORT_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+  /**
+   * @brief  Copies the elements of a floating-point vector.
+   * @param[in]  pSrc       input pointer
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+void arm_copy_f16(const float16_t * pSrc, float16_t * pDst, uint32_t blockSize);
+
+  /**
+   * @brief  Fills a constant value into a floating-point vector.
+   * @param[in]  value      input value to be filled
+   * @param[out] pDst       output pointer
+   * @param[in]  blockSize  number of samples to process
+   */
+void arm_fill_f16(float16_t value, float16_t * pDst, uint32_t blockSize);
+
+/**
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]  pSrc       points to the f16 input vector
+   * @param[out] pDst       points to the q15 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+void arm_f16_to_q15(const float16_t * pSrc, q15_t * pDst, uint32_t blockSize);
+
+/**
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]  pSrc       points to the q15 input vector
+   * @param[out] pDst       points to the f16 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+void arm_q15_to_f16(const q15_t * pSrc, float16_t * pDst, uint32_t blockSize);
+
+
+/**
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]  pSrc       points to the f32 input vector
+   * @param[out] pDst       points to the f16 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+void arm_float_to_f16(const float32_t * pSrc, float16_t * pDst, uint32_t blockSize);
+
+/**
+   * @brief Converts the elements of the floating-point vector to Q31 vector.
+   * @param[in]  pSrc       points to the f16 input vector
+   * @param[out] pDst       points to the f32 output vector
+   * @param[in]  blockSize  length of the input vector
+   */
+void arm_f16_to_float(const float16_t * pSrc, float32_t * pDst, uint32_t blockSize);
+
+/**
+ * @brief Weighted sum
+ *
+ *
+ * @param[in]    *in           Array of input values.
+ * @param[in]    *weigths      Weights
+ * @param[in]    blockSize     Number of samples in the input array.
+ * @return Weighted sum
+ *
+ */
+float16_t arm_weighted_sum_f16(const float16_t *in
+  , const float16_t *weigths
+  , uint32_t blockSize);
+
+/**
+ * @brief Barycenter
+ *
+ *
+ * @param[in]    in         List of vectors
+ * @param[in]    weights    Weights of the vectors
+ * @param[out]   out        Barycenter
+ * @param[in]    nbVectors  Number of vectors
+ * @param[in]    vecDim     Dimension of space (vector dimension)
+ * @return       None
+ *
+ */
+void arm_barycenter_f16(const float16_t *in
+  , const float16_t *weights
+  , float16_t *out
+  , uint32_t nbVectors
+  , uint32_t vecDim);
+
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup typecast Typecasting
+ */
+
+/**
+  @addtogroup typecast
+  @{
+ */
+
+/**
+   * @brief  Interpret a f16 as an s16 value
+   * @param[in] x  input value.
+   * @return  return value.
+   * 
+   * @par    Description
+   *            It is a typecast. No conversion of the float to int is done.
+   *            The memcpy will be optimized out by the compiler.
+   *            memcpy is used to prevent type punning issues.
+   *            With gcc, -fno-builtins MUST not be used or the
+   *            memcpy will not be optimized out.
+   */
+__STATIC_INLINE int16_t arm_typecast_s16_f16(float16_t x)
+{
+   int16_t res;
+   res=*(int16_t*)memcpy((char*)&res,(char*)&x,sizeof(float16_t));
+   return(res);
+}
+
+/**
+   * @brief  Interpret an s16 as an f16 value
+   * @param[in] x  input value.
+   * @return  return value.
+   * 
+   * @par    Description
+   *            It is a typecast. No conversion of the int to float is done.
+   *            The memcpy will be optimized out by the compiler.
+   *            memcpy is used to prevent type punning issues.
+   *            With gcc, -fno-builtins MUST not be used or the
+   *            memcpy will not be optimized out.
+   */
+__STATIC_INLINE float16_t arm_typecast_f16_s16(int16_t x)
+{
+   float16_t res;
+   res=*(float16_t*)memcpy((char*)&res,(char*)&x,sizeof(int16_t));
+   return(res);
+}
+
+
+/**
+  @} end of typecast group
+ */
+
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _SUPPORT_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/svm_defines.h b/Libraries/CMSIS/DSP/Include/dsp/svm_defines.h
new file mode 100755
index 00000000..f93e9530
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/svm_defines.h
@@ -0,0 +1,46 @@
+/******************************************************************************
+ * @file     svm_defines.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _SVM_DEFINES_H_
+#define _SVM_DEFINES_H_
+
+/**
+ * @brief Struct for specifying SVM Kernel
+ */
+typedef enum
+{
+    ARM_ML_KERNEL_LINEAR = 0,
+             /**< Linear kernel */
+    ARM_ML_KERNEL_POLYNOMIAL = 1,
+             /**< Polynomial kernel */
+    ARM_ML_KERNEL_RBF = 2,
+             /**< Radial Basis Function kernel */
+    ARM_ML_KERNEL_SIGMOID = 3
+             /**< Sigmoid kernel */
+} arm_ml_kernel_type;
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Include/dsp/svm_functions.h b/Libraries/CMSIS/DSP/Include/dsp/svm_functions.h
new file mode 100755
index 00000000..3acc6211
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/svm_functions.h
@@ -0,0 +1,299 @@
+/******************************************************************************
+ * @file     svm_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _SVM_FUNCTIONS_H_
+#define _SVM_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+#include "dsp/svm_defines.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#define STEP(x) (x) <= 0 ? 0 : 1
+
+/**
+ * @defgroup groupSVM SVM Functions
+ * This set of functions is implementing SVM classification on 2 classes.
+ * The training must be done from scikit-learn. The parameters can be easily
+ * generated from the scikit-learn object. Some examples are given in
+ * DSP/Testing/PatternGeneration/SVM.py
+ *
+ * If more than 2 classes are needed, the functions in this folder 
+ * will have to be used, as building blocks, to do multi-class classification.
+ *
+ * No multi-class classification is provided in this SVM folder.
+ * 
+ */
+
+/**
+ * @brief Integer exponentiation
+ * @param[in]    x           value
+ * @param[in]    nb          integer exponent >= 1
+ * @return x^nb
+ *
+ */
+__STATIC_INLINE float32_t arm_exponent_f32(float32_t x, int32_t nb)
+{
+    float32_t r = x;
+    nb --;
+    while(nb > 0)
+    {
+        r = r * x;
+        nb--;
+    }
+    return(r);
+}
+
+  
+
+
+
+/**
+ * @brief Instance structure for linear SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float32_t       intercept;              /**< Intercept */
+  const float32_t *dualCoefficients;      /**< Dual coefficients */
+  const float32_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+} arm_svm_linear_instance_f32;
+
+
+/**
+ * @brief Instance structure for polynomial SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float32_t       intercept;              /**< Intercept */
+  const float32_t *dualCoefficients;      /**< Dual coefficients */
+  const float32_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+  int32_t         degree;                 /**< Polynomial degree */
+  float32_t       coef0;                  /**< Polynomial constant */
+  float32_t       gamma;                  /**< Gamma factor */
+} arm_svm_polynomial_instance_f32;
+
+/**
+ * @brief Instance structure for rbf SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float32_t       intercept;              /**< Intercept */
+  const float32_t *dualCoefficients;      /**< Dual coefficients */
+  const float32_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+  float32_t       gamma;                  /**< Gamma factor */
+} arm_svm_rbf_instance_f32;
+
+/**
+ * @brief Instance structure for sigmoid SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float32_t       intercept;              /**< Intercept */
+  const float32_t *dualCoefficients;      /**< Dual coefficients */
+  const float32_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+  float32_t       coef0;                  /**< Independent constant */
+  float32_t       gamma;                  /**< Gamma factor */
+} arm_svm_sigmoid_instance_f32;
+
+/**
+ * @brief        SVM linear instance init function
+ * @param[in]    S                      Parameters for SVM functions
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @return none.
+ *
+ */
+
+
+void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t  *classes);
+
+/**
+ * @brief SVM linear prediction
+ * @param[in]    S          Pointer to an instance of the linear SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+  
+void arm_svm_linear_predict_f32(const arm_svm_linear_instance_f32 *S, 
+   const float32_t * in, 
+   int32_t * pResult);
+
+
+/**
+ * @brief        SVM polynomial instance init function
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    degree                 Polynomial degree
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+
+void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t   *classes,
+  int32_t      degree,
+  float32_t coef0,
+  float32_t gamma
+  );
+
+/**
+ * @brief SVM polynomial prediction
+ * @param[in]    S          Pointer to an instance of the polynomial SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+void arm_svm_polynomial_predict_f32(const arm_svm_polynomial_instance_f32 *S, 
+   const float32_t * in, 
+   int32_t * pResult);
+
+
+/**
+ * @brief        SVM radial basis function instance init function
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t   *classes,
+  float32_t gamma
+  );
+
+/**
+ * @brief SVM rbf prediction
+ * @param[in]    S         Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in        Pointer to input vector
+ * @param[out]   pResult   decision value
+ * @return none.
+ *
+ */
+void arm_svm_rbf_predict_f32(const arm_svm_rbf_instance_f32 *S, 
+   const float32_t * in, 
+   int32_t * pResult);
+
+/**
+ * @brief        SVM sigmoid instance init function
+ * @param[in]    S                      points to an instance of the rbf SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t   *classes,
+  float32_t coef0,
+  float32_t gamma
+  );
+
+/**
+ * @brief SVM sigmoid prediction
+ * @param[in]    S        Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in       Pointer to input vector
+ * @param[out]   pResult  Decision value
+ * @return none.
+ *
+ */
+void arm_svm_sigmoid_predict_f32(const arm_svm_sigmoid_instance_f32 *S, 
+   const float32_t * in, 
+   int32_t * pResult);
+
+
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _SVM_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/svm_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/svm_functions_f16.h
new file mode 100755
index 00000000..7c9fbab9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/svm_functions_f16.h
@@ -0,0 +1,281 @@
+/******************************************************************************
+ * @file     svm_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _SVM_FUNCTIONS_F16_H_
+#define _SVM_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+#include "dsp/svm_defines.h"
+
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#define STEP(x) (x) <= 0 ? 0 : 1
+
+/**
+ * @defgroup groupSVM SVM Functions
+ * This set of functions is implementing SVM classification on 2 classes.
+ * The training must be done from scikit-learn. The parameters can be easily
+ * generated from the scikit-learn object. Some examples are given in
+ * DSP/Testing/PatternGeneration/SVM.py
+ *
+ * If more than 2 classes are needed, the functions in this folder 
+ * will have to be used, as building blocks, to do multi-class classification.
+ *
+ * No multi-class classification is provided in this SVM folder.
+ * 
+ */
+
+
+
+/**
+ * @brief Instance structure for linear SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float16_t       intercept;              /**< Intercept */
+  const float16_t *dualCoefficients;      /**< Dual coefficients */
+  const float16_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+} arm_svm_linear_instance_f16;
+
+
+/**
+ * @brief Instance structure for polynomial SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float16_t       intercept;              /**< Intercept */
+  const float16_t *dualCoefficients;      /**< Dual coefficients */
+  const float16_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+  int32_t         degree;                 /**< Polynomial degree */
+  float16_t       coef0;                  /**< Polynomial constant */
+  float16_t       gamma;                  /**< Gamma factor */
+} arm_svm_polynomial_instance_f16;
+
+/**
+ * @brief Instance structure for rbf SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float16_t       intercept;              /**< Intercept */
+  const float16_t *dualCoefficients;      /**< Dual coefficients */
+  const float16_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+  float16_t       gamma;                  /**< Gamma factor */
+} arm_svm_rbf_instance_f16;
+
+/**
+ * @brief Instance structure for sigmoid SVM prediction function.
+ */
+typedef struct
+{
+  uint32_t        nbOfSupportVectors;     /**< Number of support vectors */
+  uint32_t        vectorDimension;        /**< Dimension of vector space */
+  float16_t       intercept;              /**< Intercept */
+  const float16_t *dualCoefficients;      /**< Dual coefficients */
+  const float16_t *supportVectors;        /**< Support vectors */
+  const int32_t   *classes;               /**< The two SVM classes */
+  float16_t       coef0;                  /**< Independent constant */
+  float16_t       gamma;                  /**< Gamma factor */
+} arm_svm_sigmoid_instance_f16;
+
+/**
+ * @brief        SVM linear instance init function
+ * @param[in]    S                      Parameters for SVM functions
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @return none.
+ *
+ */
+
+
+void arm_svm_linear_init_f16(arm_svm_linear_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t  *classes);
+
+/**
+ * @brief SVM linear prediction
+ * @param[in]    S          Pointer to an instance of the linear SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+  
+void arm_svm_linear_predict_f16(const arm_svm_linear_instance_f16 *S, 
+   const float16_t * in, 
+   int32_t * pResult);
+
+
+/**
+ * @brief        SVM polynomial instance init function
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    degree                 Polynomial degree
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+
+void arm_svm_polynomial_init_f16(arm_svm_polynomial_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t   *classes,
+  int32_t      degree,
+  float16_t coef0,
+  float16_t gamma
+  );
+
+/**
+ * @brief SVM polynomial prediction
+ * @param[in]    S          Pointer to an instance of the polynomial SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+void arm_svm_polynomial_predict_f16(const arm_svm_polynomial_instance_f16 *S, 
+   const float16_t * in, 
+   int32_t * pResult);
+
+
+/**
+ * @brief        SVM radial basis function instance init function
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_rbf_init_f16(arm_svm_rbf_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t   *classes,
+  float16_t gamma
+  );
+
+/**
+ * @brief SVM rbf prediction
+ * @param[in]    S         Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in        Pointer to input vector
+ * @param[out]   pResult   decision value
+ * @return none.
+ *
+ */
+void arm_svm_rbf_predict_f16(const arm_svm_rbf_instance_f16 *S, 
+   const float16_t * in, 
+   int32_t * pResult);
+
+/**
+ * @brief        SVM sigmoid instance init function
+ * @param[in]    S                      points to an instance of the rbf SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_sigmoid_init_f16(arm_svm_sigmoid_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t   *classes,
+  float16_t coef0,
+  float16_t gamma
+  );
+
+/**
+ * @brief SVM sigmoid prediction
+ * @param[in]    S        Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in       Pointer to input vector
+ * @param[out]   pResult  Decision value
+ * @return none.
+ *
+ */
+void arm_svm_sigmoid_predict_f16(const arm_svm_sigmoid_instance_f16 *S, 
+   const float16_t * in, 
+   int32_t * pResult);
+
+
+
+#endif /*defined(ARM_FLOAT16_SUPPORTED)*/
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _SVM_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/transform_functions.h b/Libraries/CMSIS/DSP/Include/dsp/transform_functions.h
new file mode 100755
index 00000000..6270e10c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/transform_functions.h
@@ -0,0 +1,735 @@
+/******************************************************************************
+ * @file     transform_functions.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _TRANSFORM_FUNCTIONS_H_
+#define _TRANSFORM_FUNCTIONS_H_
+
+#include "arm_math_types.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#include "dsp/basic_math_functions.h"
+#include "dsp/complex_math_functions.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+/**
+ * @defgroup groupTransforms Transform Functions
+ */
+
+
+  /**
+   * @brief Instance structure for the Q15 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q15_t *pTwiddle;                 /**< points to the Sin twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix2_instance_q15;
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_q15(
+        arm_cfft_radix2_instance_q15 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_q15(
+  const arm_cfft_radix2_instance_q15 * S,
+        q15_t * pSrc);
+
+
+  /**
+   * @brief Instance structure for the Q15 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q15_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q15;
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_q15(
+        arm_cfft_radix4_instance_q15 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix4_q15(
+  const arm_cfft_radix4_instance_q15 * S,
+        q15_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q31_t *pTwiddle;                 /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix2_instance_q31;
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_q31(
+        arm_cfft_radix2_instance_q31 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_q31(
+  const arm_cfft_radix2_instance_q31 * S,
+        q31_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Q31 CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                 /**< length of the FFT. */
+          uint8_t ifftFlag;                /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;          /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const q31_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const uint16_t *pBitRevTable;          /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;       /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;           /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+  } arm_cfft_radix4_instance_q31;
+
+/* Deprecated */
+  void arm_cfft_radix4_q31(
+  const arm_cfft_radix4_instance_q31 * S,
+        q31_t * pSrc);
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_q31(
+        arm_cfft_radix4_instance_q31 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float32_t onebyfftLen;             /**< value of 1/fftLen. */
+  } arm_cfft_radix2_instance_f32;
+
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_f32(
+        arm_cfft_radix2_instance_f32 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_f32(
+  const arm_cfft_radix2_instance_f32 * S,
+        float32_t * pSrc);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float32_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float32_t onebyfftLen;             /**< value of 1/fftLen. */
+  } arm_cfft_radix4_instance_f32;
+
+
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_f32(
+        arm_cfft_radix4_instance_f32 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix4_f32(
+  const arm_cfft_radix4_instance_f32 * S,
+        float32_t * pSrc);
+
+  /**
+   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const q15_t *pTwiddle;             /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+   const uint32_t *rearranged_twiddle_tab_stride1_arr;        /**< Per stage reordered twiddle pointer (offset 1) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride2_arr;        /**< Per stage reordered twiddle pointer (offset 2) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride3_arr;        /**< Per stage reordered twiddle pointer (offset 3) */                                                       \
+   const q15_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */                                                                   \
+   const q15_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */                                                                   \
+   const q15_t *rearranged_twiddle_stride3;
+#endif
+  } arm_cfft_instance_q15;
+
+arm_status arm_cfft_init_q15(
+  arm_cfft_instance_q15 * S,
+  uint16_t fftLen);
+
+void arm_cfft_q15(
+    const arm_cfft_instance_q15 * S,
+          q15_t * p1,
+          uint8_t ifftFlag,
+          uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the fixed-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const q31_t *pTwiddle;             /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+   const uint32_t *rearranged_twiddle_tab_stride1_arr;        /**< Per stage reordered twiddle pointer (offset 1) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride2_arr;        /**< Per stage reordered twiddle pointer (offset 2) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride3_arr;        /**< Per stage reordered twiddle pointer (offset 3) */                                                       \
+   const q31_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */                                                                   \
+   const q31_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */                                                                   \
+   const q31_t *rearranged_twiddle_stride3;
+#endif
+  } arm_cfft_instance_q31;
+
+arm_status arm_cfft_init_q31(
+  arm_cfft_instance_q31 * S,
+  uint16_t fftLen);
+
+void arm_cfft_q31(
+    const arm_cfft_instance_q31 * S,
+          q31_t * p1,
+          uint8_t ifftFlag,
+          uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const float32_t *pTwiddle;         /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+   const uint32_t *rearranged_twiddle_tab_stride1_arr;        /**< Per stage reordered twiddle pointer (offset 1) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride2_arr;        /**< Per stage reordered twiddle pointer (offset 2) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride3_arr;        /**< Per stage reordered twiddle pointer (offset 3) */                                                       \
+   const float32_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */                                                                   \
+   const float32_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */                                                                   \
+   const float32_t *rearranged_twiddle_stride3;
+#endif
+  } arm_cfft_instance_f32;
+
+
+
+  arm_status arm_cfft_init_f32(
+  arm_cfft_instance_f32 * S,
+  uint16_t fftLen);
+
+  void arm_cfft_f32(
+  const arm_cfft_instance_f32 * S,
+        float32_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+
+  /**
+   * @brief Instance structure for the Double Precision Floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const float64_t *pTwiddle;         /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+  } arm_cfft_instance_f64;
+
+  arm_status arm_cfft_init_f64(
+  arm_cfft_instance_f64 * S,
+  uint16_t fftLen);
+  
+  void arm_cfft_f64(
+  const arm_cfft_instance_f64 * S,
+        float64_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the Q15 RFFT/RIFFT function.
+   */
+  typedef struct
+  {
+          uint32_t fftLenReal;                      /**< length of the real FFT. */
+          uint8_t ifftFlagR;                        /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                  /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;               /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const q15_t *pTwiddleAReal;                     /**< points to the real twiddle factor table. */
+    const q15_t *pTwiddleBReal;                     /**< points to the imag twiddle factor table. */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    arm_cfft_instance_q15 cfftInst;
+#else
+    const arm_cfft_instance_q15 *pCfft;       /**< points to the complex FFT instance. */
+#endif
+  } arm_rfft_instance_q15;
+
+  arm_status arm_rfft_init_q15(
+        arm_rfft_instance_q15 * S,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
+
+  void arm_rfft_q15(
+  const arm_rfft_instance_q15 * S,
+        q15_t * pSrc,
+        q15_t * pDst);
+
+  /**
+   * @brief Instance structure for the Q31 RFFT/RIFFT function.
+   */
+  typedef struct
+  {
+          uint32_t fftLenReal;                        /**< length of the real FFT. */
+          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;                 /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const q31_t *pTwiddleAReal;                       /**< points to the real twiddle factor table. */
+    const q31_t *pTwiddleBReal;                       /**< points to the imag twiddle factor table. */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    arm_cfft_instance_q31 cfftInst;
+#else
+    const arm_cfft_instance_q31 *pCfft;         /**< points to the complex FFT instance. */
+#endif
+  } arm_rfft_instance_q31;
+
+  arm_status arm_rfft_init_q31(
+        arm_rfft_instance_q31 * S,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
+
+  void arm_rfft_q31(
+  const arm_rfft_instance_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst);
+
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+  typedef struct
+  {
+          uint32_t fftLenReal;                        /**< length of the real FFT. */
+          uint16_t fftLenBy2;                         /**< length of the complex FFT. */
+          uint8_t ifftFlagR;                          /**< flag that selects forward (ifftFlagR=0) or inverse (ifftFlagR=1) transform. */
+          uint8_t bitReverseFlagR;                    /**< flag that enables (bitReverseFlagR=1) or disables (bitReverseFlagR=0) bit reversal of output. */
+          uint32_t twidCoefRModifier;                     /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+    const float32_t *pTwiddleAReal;                   /**< points to the real twiddle factor table. */
+    const float32_t *pTwiddleBReal;                   /**< points to the imag twiddle factor table. */
+          arm_cfft_radix4_instance_f32 *pCfft;        /**< points to the complex FFT instance. */
+  } arm_rfft_instance_f32;
+
+  arm_status arm_rfft_init_f32(
+        arm_rfft_instance_f32 * S,
+        arm_cfft_radix4_instance_f32 * S_CFFT,
+        uint32_t fftLenReal,
+        uint32_t ifftFlagR,
+        uint32_t bitReverseFlag);
+
+  void arm_rfft_f32(
+  const arm_rfft_instance_f32 * S,
+        float32_t * pSrc,
+        float32_t * pDst);
+
+  /**
+   * @brief Instance structure for the Double Precision Floating-point RFFT/RIFFT function.
+   */
+typedef struct
+  {
+          arm_cfft_instance_f64 Sint;      /**< Internal CFFT structure. */
+          uint16_t fftLenRFFT;             /**< length of the real sequence */
+    const float64_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
+  } arm_rfft_fast_instance_f64 ;
+
+arm_status arm_rfft_fast_init_f64 (
+         arm_rfft_fast_instance_f64 * S,
+         uint16_t fftLen);
+
+
+void arm_rfft_fast_f64(
+    arm_rfft_fast_instance_f64 * S,
+    float64_t * p, float64_t * pOut,
+    uint8_t ifftFlag);
+
+
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+typedef struct
+  {
+          arm_cfft_instance_f32 Sint;      /**< Internal CFFT structure. */
+          uint16_t fftLenRFFT;             /**< length of the real sequence */
+    const float32_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
+  } arm_rfft_fast_instance_f32 ;
+
+arm_status arm_rfft_fast_init_f32 (
+         arm_rfft_fast_instance_f32 * S,
+         uint16_t fftLen);
+
+
+  void arm_rfft_fast_f32(
+        const arm_rfft_fast_instance_f32 * S,
+        float32_t * p, float32_t * pOut,
+        uint8_t ifftFlag);
+
+  /**
+   * @brief Instance structure for the floating-point DCT4/IDCT4 function.
+   */
+  typedef struct
+  {
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          float32_t normalize;                 /**< normalizing factor. */
+    const float32_t *pTwiddle;                 /**< points to the twiddle factor table. */
+    const float32_t *pCosFactor;               /**< points to the cosFactor table. */
+          arm_rfft_instance_f32 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_f32 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_f32;
+
+
+  /**
+   * @brief  Initialization function for the floating-point DCT4/IDCT4.
+   * @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure.
+   * @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure.
+   * @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure.
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>fftLenReal</code> is not a supported transform length.
+   */
+  arm_status arm_dct4_init_f32(
+        arm_dct4_instance_f32 * S,
+        arm_rfft_instance_f32 * S_RFFT,
+        arm_cfft_radix4_instance_f32 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        float32_t normalize);
+
+
+  /**
+   * @brief Processing function for the floating-point DCT4/IDCT4.
+   * @param[in]     S              points to an instance of the floating-point DCT4/IDCT4 structure.
+   * @param[in]     pState         points to state buffer.
+   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+   */
+  void arm_dct4_f32(
+  const arm_dct4_instance_f32 * S,
+        float32_t * pState,
+        float32_t * pInlineBuffer);
+
+
+  /**
+   * @brief Instance structure for the Q31 DCT4/IDCT4 function.
+   */
+  typedef struct
+  {
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          q31_t normalize;                     /**< normalizing factor. */
+    const q31_t *pTwiddle;                     /**< points to the twiddle factor table. */
+    const q31_t *pCosFactor;                   /**< points to the cosFactor table. */
+          arm_rfft_instance_q31 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_q31 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_q31;
+
+
+  /**
+   * @brief  Initialization function for the Q31 DCT4/IDCT4.
+   * @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
+   * @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
+   * @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   */
+  arm_status arm_dct4_init_q31(
+        arm_dct4_instance_q31 * S,
+        arm_rfft_instance_q31 * S_RFFT,
+        arm_cfft_radix4_instance_q31 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        q31_t normalize);
+
+
+  /**
+   * @brief Processing function for the Q31 DCT4/IDCT4.
+   * @param[in]     S              points to an instance of the Q31 DCT4 structure.
+   * @param[in]     pState         points to state buffer.
+   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+   */
+  void arm_dct4_q31(
+  const arm_dct4_instance_q31 * S,
+        q31_t * pState,
+        q31_t * pInlineBuffer);
+
+
+  /**
+   * @brief Instance structure for the Q15 DCT4/IDCT4 function.
+   */
+  typedef struct
+  {
+          uint16_t N;                          /**< length of the DCT4. */
+          uint16_t Nby2;                       /**< half of the length of the DCT4. */
+          q15_t normalize;                     /**< normalizing factor. */
+    const q15_t *pTwiddle;                     /**< points to the twiddle factor table. */
+    const q15_t *pCosFactor;                   /**< points to the cosFactor table. */
+          arm_rfft_instance_q15 *pRfft;        /**< points to the real FFT instance. */
+          arm_cfft_radix4_instance_q15 *pCfft; /**< points to the complex FFT instance. */
+  } arm_dct4_instance_q15;
+
+
+  /**
+   * @brief  Initialization function for the Q15 DCT4/IDCT4.
+   * @param[in,out] S          points to an instance of Q15 DCT4/IDCT4 structure.
+   * @param[in]     S_RFFT     points to an instance of Q15 RFFT/RIFFT structure.
+   * @param[in]     S_CFFT     points to an instance of Q15 CFFT/CIFFT structure.
+   * @param[in]     N          length of the DCT4.
+   * @param[in]     Nby2       half of the length of the DCT4.
+   * @param[in]     normalize  normalizing factor.
+   * @return      arm_status function returns ARM_MATH_SUCCESS if initialization is successful or ARM_MATH_ARGUMENT_ERROR if <code>N</code> is not a supported transform length.
+   */
+  arm_status arm_dct4_init_q15(
+        arm_dct4_instance_q15 * S,
+        arm_rfft_instance_q15 * S_RFFT,
+        arm_cfft_radix4_instance_q15 * S_CFFT,
+        uint16_t N,
+        uint16_t Nby2,
+        q15_t normalize);
+
+
+  /**
+   * @brief Processing function for the Q15 DCT4/IDCT4.
+   * @param[in]     S              points to an instance of the Q15 DCT4 structure.
+   * @param[in]     pState         points to state buffer.
+   * @param[in,out] pInlineBuffer  points to the in-place input and output buffer.
+   */
+  void arm_dct4_q15(
+  const arm_dct4_instance_q15 * S,
+        q15_t * pState,
+        q15_t * pInlineBuffer);
+
+  /**
+   * @brief Instance structure for the Floating-point MFCC function.
+   */
+typedef struct
+  {
+     const float32_t *dctCoefs; /**< Internal DCT coefficients */
+     const float32_t *filterCoefs; /**< Internal Mel filter coefficients */ 
+     const float32_t *windowCoefs; /**< Windowing coefficients */ 
+     const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ 
+     const uint32_t *filterLengths; /**< Internal Mel filter  lengths */ 
+     uint32_t fftLen; /**< FFT length */
+     uint32_t nbMelFilters; /**< Number of Mel filters */
+     uint32_t nbDctOutputs; /**< Number of DCT outputs */
+#if defined(ARM_MFCC_CFFT_BASED)
+     /* Implementation of the MFCC is using a CFFT */
+     arm_cfft_instance_f32 cfft; /**< Internal CFFT instance */
+#else
+     /* Implementation of the MFCC is using a RFFT (default) */
+     arm_rfft_fast_instance_f32 rfft;
+#endif
+  } arm_mfcc_instance_f32 ;
+
+arm_status arm_mfcc_init_f32(
+  arm_mfcc_instance_f32 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const float32_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const float32_t *filterCoefs,
+  const float32_t *windowCoefs
+  );
+
+
+/**
+  @brief         MFCC F32
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples
+  @param[out]     pDst  points to the output MFCC values
+  @param[inout]     pTmp  points to a temporary buffer of complex
+  @return        none
+ */
+  void arm_mfcc_f32(
+  const arm_mfcc_instance_f32 * S,
+  float32_t *pSrc,
+  float32_t *pDst,
+  float32_t *pTmp
+  );
+
+typedef struct
+  {
+     const q31_t *dctCoefs; /**< Internal DCT coefficients */
+     const q31_t *filterCoefs; /**< Internal Mel filter coefficients */ 
+     const q31_t *windowCoefs; /**< Windowing coefficients */ 
+     const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ 
+     const uint32_t *filterLengths; /**< Internal Mel filter  lengths */ 
+     uint32_t fftLen; /**< FFT length */
+     uint32_t nbMelFilters; /**< Number of Mel filters */
+     uint32_t nbDctOutputs; /**< Number of DCT outputs */
+#if defined(ARM_MFCC_CFFT_BASED)
+     /* Implementation of the MFCC is using a CFFT */
+     arm_cfft_instance_q31 cfft; /**< Internal CFFT instance */
+#else
+     /* Implementation of the MFCC is using a RFFT (default) */
+     arm_rfft_instance_q31 rfft;
+#endif
+  } arm_mfcc_instance_q31 ;
+
+arm_status arm_mfcc_init_q31(
+  arm_mfcc_instance_q31 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const q31_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const q31_t *filterCoefs,
+  const q31_t *windowCoefs
+  );
+
+
+/**
+  @brief         MFCC Q31
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples
+  @param[out]     pDst  points to the output MFCC values
+  @param[inout]     pTmp  points to a temporary buffer of complex
+  @return        none
+ */
+  arm_status arm_mfcc_q31(
+  const arm_mfcc_instance_q31 * S,
+  q31_t *pSrc,
+  q31_t *pDst,
+  q31_t *pTmp
+  );
+
+typedef struct
+  {
+     const q15_t *dctCoefs; /**< Internal DCT coefficients */
+     const q15_t *filterCoefs; /**< Internal Mel filter coefficients */ 
+     const q15_t *windowCoefs; /**< Windowing coefficients */ 
+     const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ 
+     const uint32_t *filterLengths; /**< Internal Mel filter  lengths */ 
+     uint32_t fftLen; /**< FFT length */
+     uint32_t nbMelFilters; /**< Number of Mel filters */
+     uint32_t nbDctOutputs; /**< Number of DCT outputs */
+#if defined(ARM_MFCC_CFFT_BASED)
+     /* Implementation of the MFCC is using a CFFT */
+     arm_cfft_instance_q15 cfft; /**< Internal CFFT instance */
+#else
+     /* Implementation of the MFCC is using a RFFT (default) */
+     arm_rfft_instance_q15 rfft;
+#endif
+  } arm_mfcc_instance_q15 ;
+
+arm_status arm_mfcc_init_q15(
+  arm_mfcc_instance_q15 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const q15_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const q15_t *filterCoefs,
+  const q15_t *windowCoefs
+  );
+
+
+/**
+  @brief         MFCC Q15
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples
+  @param[out]     pDst  points to the output MFCC values in q8.7 format
+  @param[inout]     pTmp  points to a temporary buffer of complex
+  @return        error status
+ */
+  arm_status arm_mfcc_q15(
+  const arm_mfcc_instance_q15 * S,
+  q15_t *pSrc,
+  q15_t *pDst,
+  q31_t *pTmp
+  );
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _TRANSFORM_FUNCTIONS_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/transform_functions_f16.h b/Libraries/CMSIS/DSP/Include/dsp/transform_functions_f16.h
new file mode 100755
index 00000000..4d8cc229
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/transform_functions_f16.h
@@ -0,0 +1,208 @@
+/******************************************************************************
+ * @file     transform_functions_f16.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.10.0
+ * @date     08 July 2021
+ * Target Processor: Cortex-M and Cortex-A cores
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ 
+#ifndef _TRANSFORM_FUNCTIONS_F16_H_
+#define _TRANSFORM_FUNCTIONS_F16_H_
+
+#include "arm_math_types_f16.h"
+#include "arm_math_memory.h"
+
+#include "dsp/none.h"
+#include "dsp/utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float16_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float16_t onebyfftLen;             /**< value of 1/fftLen. */
+  } arm_cfft_radix2_instance_f16;
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+          uint8_t ifftFlag;                  /**< flag that selects forward (ifftFlag=0) or inverse (ifftFlag=1) transform. */
+          uint8_t bitReverseFlag;            /**< flag that enables (bitReverseFlag=1) or disables (bitReverseFlag=0) bit reversal of output. */
+    const float16_t *pTwiddle;               /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;            /**< points to the bit reversal table. */
+          uint16_t twidCoefModifier;         /**< twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table. */
+          uint16_t bitRevFactor;             /**< bit reversal modifier that supports different size FFTs with the same bit reversal table. */
+          float16_t onebyfftLen;             /**< value of 1/fftLen. */
+  } arm_cfft_radix4_instance_f16;
+
+  /**
+   * @brief Instance structure for the floating-point CFFT/CIFFT function.
+   */
+  typedef struct
+  {
+          uint16_t fftLen;                   /**< length of the FFT. */
+    const float16_t *pTwiddle;         /**< points to the Twiddle factor table. */
+    const uint16_t *pBitRevTable;      /**< points to the bit reversal table. */
+          uint16_t bitRevLength;             /**< bit reversal table length. */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+   const uint32_t *rearranged_twiddle_tab_stride1_arr;        /**< Per stage reordered twiddle pointer (offset 1) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride2_arr;        /**< Per stage reordered twiddle pointer (offset 2) */                                                       \
+   const uint32_t *rearranged_twiddle_tab_stride3_arr;        /**< Per stage reordered twiddle pointer (offset 3) */                                                       \
+   const float16_t *rearranged_twiddle_stride1; /**< reordered twiddle offset 1 storage */                                                                   \
+   const float16_t *rearranged_twiddle_stride2; /**< reordered twiddle offset 2 storage */                                                                   \
+   const float16_t *rearranged_twiddle_stride3;
+#endif
+  } arm_cfft_instance_f16;
+
+
+  arm_status arm_cfft_init_f16(
+  arm_cfft_instance_f16 * S,
+  uint16_t fftLen);
+
+  void arm_cfft_f16(
+  const arm_cfft_instance_f16 * S,
+        float16_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+  /**
+   * @brief Instance structure for the floating-point RFFT/RIFFT function.
+   */
+typedef struct
+  {
+          arm_cfft_instance_f16 Sint;      /**< Internal CFFT structure. */
+          uint16_t fftLenRFFT;             /**< length of the real sequence */
+    const float16_t * pTwiddleRFFT;        /**< Twiddle factors real stage  */
+  } arm_rfft_fast_instance_f16 ;
+
+arm_status arm_rfft_fast_init_f16 (
+         arm_rfft_fast_instance_f16 * S,
+         uint16_t fftLen);
+
+
+  void arm_rfft_fast_f16(
+        const arm_rfft_fast_instance_f16 * S,
+        float16_t * p, float16_t * pOut,
+        uint8_t ifftFlag);
+
+/* Deprecated */
+  arm_status arm_cfft_radix4_init_f16(
+        arm_cfft_radix4_instance_f16 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix4_f16(
+  const arm_cfft_radix4_instance_f16 * S,
+        float16_t * pSrc);
+
+
+/* Deprecated */
+  arm_status arm_cfft_radix2_init_f16(
+        arm_cfft_radix2_instance_f16 * S,
+        uint16_t fftLen,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag);
+
+/* Deprecated */
+  void arm_cfft_radix2_f16(
+  const arm_cfft_radix2_instance_f16 * S,
+        float16_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Floating-point MFCC function.
+   */
+typedef struct
+  {
+     const float16_t *dctCoefs; /**< Internal DCT coefficients */
+     const float16_t *filterCoefs; /**< Internal Mel filter coefficients */ 
+     const float16_t *windowCoefs; /**< Windowing coefficients */ 
+     const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ 
+     const uint32_t *filterLengths; /**< Internal Mel filter  lengths */ 
+     uint32_t fftLen; /**< FFT length */
+     uint32_t nbMelFilters; /**< Number of Mel filters */
+     uint32_t nbDctOutputs; /**< Number of DCT outputs */
+#if defined(ARM_MFCC_CFFT_BASED)
+     /* Implementation of the MFCC is using a CFFT */
+     arm_cfft_instance_f16 cfft; /**< Internal CFFT instance */
+#else
+     /* Implementation of the MFCC is using a RFFT (default) */
+     arm_rfft_fast_instance_f16 rfft;
+#endif
+  } arm_mfcc_instance_f16 ;
+
+arm_status arm_mfcc_init_f16(
+  arm_mfcc_instance_f16 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const float16_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const float16_t *filterCoefs,
+  const float16_t *windowCoefs
+  );
+
+
+/**
+  @brief         MFCC F16
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples
+  @param[out]     pDst  points to the output MFCC values
+  @param[inout]     pTmp  points to a temporary buffer of complex
+  @return        none
+ */
+  void arm_mfcc_f16(
+  const arm_mfcc_instance_f16 * S,
+  float16_t *pSrc,
+  float16_t *pDst,
+  float16_t *pTmp
+  );
+
+  
+#endif /* defined(ARM_FLOAT16_SUPPORTED)*/
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* ifndef _TRANSFORM_FUNCTIONS_F16_H_ */
diff --git a/Libraries/CMSIS/DSP/Include/dsp/utils.h b/Libraries/CMSIS/DSP/Include/dsp/utils.h
new file mode 100755
index 00000000..7f5acb37
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Include/dsp/utils.h
@@ -0,0 +1,240 @@
+/******************************************************************************
+ * @file     arm_math_utils.h
+ * @brief    Public header file for CMSIS DSP Library
+ * @version  V1.9.0
+ * @date     20. July 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_MATH_UTILS_H_
+
+#define _ARM_MATH_UTILS_H_
+
+#include "arm_math_types.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+  /**
+   * @brief Macros required for reciprocal calculation in Normalized LMS
+   */
+
+#define INDEX_MASK         0x0000003F
+
+
+#define SQ(x) ((x) * (x))
+
+#define ROUND_UP(N, S) ((((N) + (S) - 1) / (S)) * (S))
+
+
+  /**
+   * @brief Function to Calculates 1/in (reciprocal) value of Q31 Data type.
+   */
+  __STATIC_FORCEINLINE uint32_t arm_recip_q31(
+        q31_t in,
+        q31_t * dst,
+  const q31_t * pRecipTable)
+  {
+    q31_t out;
+    uint32_t tempVal;
+    uint32_t index, i;
+    uint32_t signBits;
+
+    if (in > 0)
+    {
+      signBits = ((uint32_t) (__CLZ( in) - 1));
+    }
+    else
+    {
+      signBits = ((uint32_t) (__CLZ(-in) - 1));
+    }
+
+    /* Convert input sample to 1.31 format */
+    in = (in << signBits);
+
+    /* calculation of index for initial approximated Val */
+    index = (uint32_t)(in >> 24);
+    index = (index & INDEX_MASK);
+
+    /* 1.31 with exp 1 */
+    out = pRecipTable[index];
+
+    /* calculation of reciprocal value */
+    /* running approximation for two iterations */
+    for (i = 0U; i < 2U; i++)
+    {
+      tempVal = (uint32_t) (((q63_t) in * out) >> 31);
+      tempVal = 0x7FFFFFFFu - tempVal;
+      /*      1.31 with exp 1 */
+      /* out = (q31_t) (((q63_t) out * tempVal) >> 30); */
+      out = clip_q63_to_q31(((q63_t) out * tempVal) >> 30);
+    }
+
+    /* write output */
+    *dst = out;
+
+    /* return num of signbits of out = 1/in value */
+    return (signBits + 1U);
+  }
+
+
+  /**
+   * @brief Function to Calculates 1/in (reciprocal) value of Q15 Data type.
+   */
+  __STATIC_FORCEINLINE uint32_t arm_recip_q15(
+        q15_t in,
+        q15_t * dst,
+  const q15_t * pRecipTable)
+  {
+    q15_t out = 0;
+    uint32_t tempVal = 0;
+    uint32_t index = 0, i = 0;
+    uint32_t signBits = 0;
+
+    if (in > 0)
+    {
+      signBits = ((uint32_t)(__CLZ( in) - 17));
+    }
+    else
+    {
+      signBits = ((uint32_t)(__CLZ(-in) - 17));
+    }
+
+    /* Convert input sample to 1.15 format */
+    in = (in << signBits);
+
+    /* calculation of index for initial approximated Val */
+    index = (uint32_t)(in >>  8);
+    index = (index & INDEX_MASK);
+
+    /*      1.15 with exp 1  */
+    out = pRecipTable[index];
+
+    /* calculation of reciprocal value */
+    /* running approximation for two iterations */
+    for (i = 0U; i < 2U; i++)
+    {
+      tempVal = (uint32_t) (((q31_t) in * out) >> 15);
+      tempVal = 0x7FFFu - tempVal;
+      /*      1.15 with exp 1 */
+      out = (q15_t) (((q31_t) out * tempVal) >> 14);
+      /* out = clip_q31_to_q15(((q31_t) out * tempVal) >> 14); */
+    }
+
+    /* write output */
+    *dst = out;
+
+    /* return num of signbits of out = 1/in value */
+    return (signBits + 1);
+  }
+
+
+/**
+ * @brief  64-bit to 32-bit unsigned normalization
+ * @param[in]  in           is input unsigned long long value
+ * @param[out] normalized   is the 32-bit normalized value
+ * @param[out] norm         is norm scale
+ */
+__STATIC_INLINE  void arm_norm_64_to_32u(uint64_t in, int32_t * normalized, int32_t *norm)
+{
+    int32_t     n1;
+    int32_t     hi = (int32_t) (in >> 32);
+    int32_t     lo = (int32_t) ((in << 32) >> 32);
+
+    n1 = __CLZ(hi) - 32;
+    if (!n1)
+    {
+        /*
+         * input fits in 32-bit
+         */
+        n1 = __CLZ(lo);
+        if (!n1)
+        {
+            /*
+             * MSB set, need to scale down by 1
+             */
+            *norm = -1;
+            *normalized = (((uint32_t) lo) >> 1);
+        } else
+        {
+            if (n1 == 32)
+            {
+                /*
+                 * input is zero
+                 */
+                *norm = 0;
+                *normalized = 0;
+            } else
+            {
+                /*
+                 * 32-bit normalization
+                 */
+                *norm = n1 - 1;
+                *normalized = lo << *norm;
+            }
+        }
+    } else
+    {
+        /*
+         * input fits in 64-bit
+         */
+        n1 = 1 - n1;
+        *norm = -n1;
+        /*
+         * 64 bit normalization
+         */
+        *normalized = (((uint32_t) lo) >> n1) | (hi << (32 - n1));
+    }
+}
+
+__STATIC_INLINE q31_t arm_div_q63_to_q31(q63_t num, q31_t den)
+{
+    q31_t   result;
+    uint64_t   absNum;
+    int32_t   normalized;
+    int32_t   norm;
+
+    /*
+     * if sum fits in 32bits
+     * avoid costly 64-bit division
+     */
+    absNum = num > 0 ? num : -num;
+    arm_norm_64_to_32u(absNum, &normalized, &norm);
+    if (norm > 0)
+        /*
+         * 32-bit division
+         */
+        result = (q31_t) num / den;
+    else
+        /*
+         * 64-bit division
+         */
+        result = (q31_t) (num / den);
+
+    return result;
+}
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /*ifndef _ARM_MATH_UTILS_H_ */
diff --git a/Libraries/CMSIS/DSP/PrivateInclude/arm_sorting.h b/Libraries/CMSIS/DSP/PrivateInclude/arm_sorting.h
new file mode 100644
index 00000000..ec002b2f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/PrivateInclude/arm_sorting.h
@@ -0,0 +1,200 @@
+/******************************************************************************
+ * @file     arm_sorting.h
+ * @brief    Private header file for CMSIS DSP Library
+ * @version  V1.7.0
+ * @date     2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_SORTING_H_
+#define _ARM_SORTING_H_
+
+#include "arm_math.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+  /**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_bubble_sort_f32(
+    const arm_sort_instance_f32 * S, 
+          float32_t * pSrc, 
+          float32_t * pDst, 
+    uint32_t blockSize);
+
+   /**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_heap_sort_f32(
+    const arm_sort_instance_f32 * S, 
+          float32_t * pSrc, 
+          float32_t * pDst, 
+    uint32_t blockSize);
+
+  /**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data.
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_insertion_sort_f32(
+    const arm_sort_instance_f32 * S, 
+          float32_t *pSrc, 
+          float32_t* pDst, 
+    uint32_t blockSize);
+
+  /**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_quick_sort_f32(
+    const arm_sort_instance_f32 * S, 
+          float32_t * pSrc, 
+          float32_t * pDst, 
+    uint32_t blockSize);
+
+  /**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_selection_sort_f32(
+    const arm_sort_instance_f32 * S, 
+          float32_t * pSrc, 
+          float32_t * pDst, 
+    uint32_t blockSize);
+ 
+  /**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+  void arm_bitonic_sort_f32(
+    const arm_sort_instance_f32 * S,
+          float32_t * pSrc,
+          float32_t * pDst,
+          uint32_t blockSize);
+
+#if defined(ARM_MATH_NEON)
+
+#define vtrn256_128q(a, b)                   \
+do {                                         \
+	float32x4_t vtrn128_temp = a.val[1]; \
+	a.val[1] = b.val[0];                 \
+	b.val[0] = vtrn128_temp ;            \
+} while (0)
+
+#define vtrn128_64q(a, b)           \
+do {                                \
+	float32x2_t ab, cd, ef, gh; \
+	ab = vget_low_f32(a);	    \
+	ef = vget_low_f32(b);	    \
+	cd = vget_high_f32(a);	    \
+	gh = vget_high_f32(b);      \
+	a = vcombine_f32(ab, ef);   \
+	b = vcombine_f32(cd, gh);   \
+} while (0)
+
+#define vtrn256_64q(a, b)                  \
+do {                                       \
+	float32x2_t a_0, a_1, a_2, a_3;    \
+	float32x2_t b_0, b_1, b_2, b_3;    \
+	a_0 = vget_low_f32(a.val[0]);      \
+	a_1 = vget_high_f32(a.val[0]);     \
+	a_2 = vget_low_f32(a.val[1]);      \
+	a_3 = vget_high_f32(a.val[1]);     \
+	b_0 = vget_low_f32(b.val[0]);      \
+	b_1 = vget_high_f32(b.val[0]);     \
+	b_2 = vget_low_f32(b.val[1]);      \
+	b_3 = vget_high_f32(b.val[1]);     \
+	a.val[0] = vcombine_f32(a_0, b_0); \
+	a.val[1] = vcombine_f32(a_2, b_2); \
+	b.val[0] = vcombine_f32(a_1, b_1); \
+	b.val[1] = vcombine_f32(a_3, b_3); \
+} while (0) 
+
+#define vtrn128_32q(a, b)                               \
+do {                                                    \
+	float32x4x2_t vtrn32_tmp = vtrnq_f32((a), (b)); \
+	(a) = vtrn32_tmp.val[0];                        \
+	(b) = vtrn32_tmp.val[1];                        \
+} while (0)
+
+#define vtrn256_32q(a, b)               \
+do {                                    \
+	float32x4x2_t vtrn32_tmp_1 = vtrnq_f32((a.val[0]), (b.val[0])); \
+	float32x4x2_t vtrn32_tmp_2 = vtrnq_f32((a.val[1]), (b.val[1])); \
+	a.val[0] = vtrn32_tmp_1.val[0]; \
+	a.val[1] = vtrn32_tmp_2.val[0]; \
+	b.val[0] = vtrn32_tmp_1.val[1]; \
+	b.val[1] = vtrn32_tmp_2.val[1]; \
+} while (0) 
+
+#define vminmaxq(a, b)                    \
+	do {                              \
+	float32x4_t minmax_tmp = (a);     \
+	(a) = vminq_f32((a), (b));        \
+	(b) = vmaxq_f32(minmax_tmp, (b)); \
+} while (0)
+
+#define vminmax256q(a, b)                         \
+	do {                                      \
+	float32x4x2_t minmax256_tmp = (a);        \
+	a.val[0] = vminq_f32(a.val[0], b.val[0]); \
+	a.val[1] = vminq_f32(a.val[1], b.val[1]); \
+	b.val[0] = vmaxq_f32(minmax256_tmp.val[0], b.val[0]); \
+	b.val[1] = vmaxq_f32(minmax256_tmp.val[1], b.val[1]); \
+} while (0)
+
+#define vrev128q_f32(a) \
+        vcombine_f32(vrev64_f32(vget_high_f32(a)), vrev64_f32(vget_low_f32(a)))
+
+#define vrev256q_f32(a)     \
+	do {                \
+        float32x4_t rev_tmp = vcombine_f32(vrev64_f32(vget_high_f32(a.val[0])), vrev64_f32(vget_low_f32(a.val[0]))); \
+	a.val[0] = vcombine_f32(vrev64_f32(vget_high_f32(a.val[1])), vrev64_f32(vget_low_f32(a.val[1])));  \
+	a.val[1] = rev_tmp; \
+} while (0)
+
+#define vldrev128q_f32(a, p) \
+	do {                 \
+	a = vld1q_f32(p);    \
+	a = vrev128q_f32(a); \
+} while (0) 
+
+#endif /* ARM_MATH_NEON */
+
+#ifdef   __cplusplus
+}
+#endif
+
+#endif /* _ARM_SORTING_H */
diff --git a/Libraries/CMSIS/DSP/PrivateInclude/arm_vec_fft.h b/Libraries/CMSIS/DSP/PrivateInclude/arm_vec_fft.h
new file mode 100755
index 00000000..fdf6498c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/PrivateInclude/arm_vec_fft.h
@@ -0,0 +1,325 @@
+/******************************************************************************
+ * @file     arm_vec_fft.h
+ * @brief    Private header file for CMSIS DSP Library
+ * @version  V1.7.0
+ * @date     07. January 2020
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_VEC_FFT_H_
+#define _ARM_VEC_FFT_H_
+
+#include "arm_math.h"
+#include "arm_helium_utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MVE_CMPLX_ADD_A_ixB(A, B)           vcaddq_rot90(A,B)
+#define MVE_CMPLX_SUB_A_ixB(A,B)            vcaddq_rot270(A,B)
+#define MVE_CMPLX_MULT_FLT_AxB(A,B)         vcmlaq_rot90(vcmulq(A, B), A, B)
+#define MVE_CMPLX_MULT_FLT_Conj_AxB(A,B)    vcmlaq_rot270(vcmulq(A, B), A, B)
+
+#define MVE_CMPLX_MULT_FX_AxB(A,B,TyA)      vqdmladhxq(vqdmlsdhq((TyA)vuninitializedq_s32(), A, B), A, B)
+#define MVE_CMPLX_MULT_FX_AxConjB(A,B,TyA)  vqdmladhq(vqdmlsdhxq((TyA)vuninitializedq_s32(), A, B), A, B)
+
+#define MVE_CMPLX_ADD_FX_A_ixB(A, B)        vhcaddq_rot90(A,B)
+#define MVE_CMPLX_SUB_FX_A_ixB(A,B)         vhcaddq_rot270(A,B)
+
+
+/**
+  @brief         In-place 32 bit reversal function for helium
+  @param[in,out] pSrc        points to in-place buffer of unknown 32-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+__STATIC_INLINE void arm_bitreversal_32_inpl_mve(
+        uint32_t *pSrc,
+  const uint16_t  bitRevLen,
+  const uint16_t *pBitRevTab)
+
+{
+    uint64_t       *src = (uint64_t *) pSrc;
+    int32_t         blkCnt;     /* loop counters */
+    uint32x4_t      bitRevTabOff;
+    uint32x4_t      one = vdupq_n_u32(1);
+    uint64x2_t      inLow, inHigh;
+    uint64x2_t      bitRevOff1Low, bitRevOff0Low;
+    uint64x2_t      bitRevOff1High, bitRevOff0High;
+
+    /* load scheduling to increase gather load idx update / gather load distance */
+    bitRevTabOff = vldrhq_u32(pBitRevTab);
+    pBitRevTab += 4;
+
+    bitRevOff0Low = vmullbq_int_u32(bitRevTabOff, one);
+    bitRevOff0High = vmulltq_int_u32(bitRevTabOff, one);
+
+
+    blkCnt = bitRevLen / 8;
+    while (blkCnt > 0) {
+        bitRevTabOff = vldrhq_u32(pBitRevTab);
+        pBitRevTab += 4;
+
+        /* 64-bit index expansion */
+        bitRevOff1Low = vmullbq_int_u32(bitRevTabOff, one);
+        bitRevOff1High = vmulltq_int_u32(bitRevTabOff, one);
+
+        inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low);
+        inHigh = vldrdq_gather_offset_u64(src, bitRevOff0High);
+
+        vstrdq_scatter_offset_u64(src, bitRevOff0Low, inHigh);
+        vstrdq_scatter_offset_u64(src, bitRevOff0High, inLow);
+
+
+        /* unrolled */
+        bitRevTabOff = vldrhq_u32(pBitRevTab);
+        pBitRevTab += 4;
+
+        bitRevOff0Low = vmullbq_int_u32(bitRevTabOff, one);
+        bitRevOff0High = vmulltq_int_u32(bitRevTabOff, one);
+
+        inLow = vldrdq_gather_offset_u64(src, bitRevOff1Low);
+        inHigh = vldrdq_gather_offset_u64(src, bitRevOff1High);
+
+        vstrdq_scatter_offset_u64(src, bitRevOff1Low, inHigh);
+        vstrdq_scatter_offset_u64(src, bitRevOff1High, inLow);
+
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+    if (bitRevLen & 7) {
+        /* FFT size = 16 */
+        inLow = vldrdq_gather_offset_u64(src, bitRevOff0Low);
+        inHigh = vldrdq_gather_offset_u64(src, bitRevOff0High);
+
+        vstrdq_scatter_offset_u64(src, bitRevOff0Low, inHigh);
+        vstrdq_scatter_offset_u64(src, bitRevOff0High, inLow);
+    }
+}
+
+
+
+/**
+  @brief         In-place 16 bit reversal function for helium
+  @param[in,out] pSrc        points to in-place buffer of unknown 16-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+__STATIC_INLINE void arm_bitreversal_16_inpl_mve(
+        uint16_t *pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t *pBitRevTab)
+
+{
+    uint32_t       *src = (uint32_t *) pSrc;
+    int32_t         blkCnt;     /* loop counters */
+    uint32x4_t      bitRevTabOff;
+    uint16x8_t      one = vdupq_n_u16(1);
+    uint32x4_t      bitRevOff1Low, bitRevOff0Low;
+    uint32x4_t      bitRevOff1High, bitRevOff0High;
+    uint32x4_t      inLow, inHigh;
+
+    /* load scheduling to increase gather load idx update / gather load distance */
+    bitRevTabOff = vldrhq_u16(pBitRevTab);
+    pBitRevTab += 8;
+
+    bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
+    bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
+    bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
+    bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
+
+    blkCnt = (bitRevLen / 16);
+    while (blkCnt > 0) {
+        bitRevTabOff = vldrhq_u16(pBitRevTab);
+        pBitRevTab += 8;
+
+        bitRevOff1Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
+        bitRevOff1High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
+        bitRevOff1Low = vshrq_n_u16((uint16x8_t)bitRevOff1Low, 3);
+        bitRevOff1High = vshrq_n_u16((uint16x8_t)bitRevOff1High, 3);
+
+        inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low);
+        inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High);
+
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh);
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow);
+
+        /* loop unrolling */
+        bitRevTabOff = vldrhq_u16(pBitRevTab);
+        pBitRevTab += 8;
+
+        bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
+        bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
+        bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
+        bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
+
+        inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff1Low);
+        inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff1High);
+
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff1Low, inHigh);
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff1High, inLow);
+
+        blkCnt--;
+    }
+
+    /* tail handling */
+    blkCnt = bitRevLen & 0xf;
+    if (blkCnt == 8) {
+        inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low);
+        inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High);
+
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh);
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow);
+    } else if (blkCnt == 12) {
+        /* FFT 16 special case */
+        mve_pred16_t    p = vctp16q(4);
+
+        bitRevTabOff = vldrhq_z_u16(pBitRevTab, p);
+
+        inLow = vldrwq_gather_shifted_offset_u32(src, bitRevOff0Low);
+        inHigh = vldrwq_gather_shifted_offset_u32(src, bitRevOff0High);
+
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff0Low, inHigh);
+        vstrwq_scatter_shifted_offset_u32(src, bitRevOff0High, inLow);
+
+        bitRevOff0Low = vmullbq_int_u16((uint16x8_t)bitRevTabOff, one);
+        bitRevOff0High = vmulltq_int_u16((uint16x8_t)bitRevTabOff, one);
+        bitRevOff0Low = vshrq_n_u16((uint16x8_t)bitRevOff0Low, 3);
+        bitRevOff0High = vshrq_n_u16((uint16x8_t)bitRevOff0High, 3);
+
+        inLow = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0Low, p);
+        inHigh = vldrwq_gather_shifted_offset_z_u32(src, bitRevOff0High, p);
+
+        vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff0Low, inHigh, p);
+        vstrwq_scatter_shifted_offset_p_u32(src, bitRevOff0High, inLow, p);
+    }
+}
+
+/**
+  @brief         Out-of-place 32 bit reversal function for helium
+  @param[out]   pDst        points to destination buffer of unknown 32-bit data type
+  @param[in]    pSrc        points to input buffer of unknown 32-bit data type
+  @param[in]    fftLen      FFT length
+  @return       none
+*/
+__STATIC_INLINE void arm_bitreversal_32_outpl_mve(void *pDst, void *pSrc, uint32_t fftLen)
+{
+    uint32x4_t      idxOffs0, idxOffs1, bitRevOffs0, bitRevOffs1;
+    uint32_t        bitRevPos, blkCnt;
+    uint32_t       *pDst32 = (uint32_t *) pDst;
+
+    /* fwd indexes */
+    idxOffs0 = vdupq_n_u32(0);
+    idxOffs1 = vdupq_n_u32(0);
+    idxOffs0[0] = 0;    idxOffs0[2] = 4;
+    idxOffs1[0] = 8;    idxOffs1[2] = 12;
+
+    bitRevPos = (31 - __CLZ(fftLen)) + 5;
+    blkCnt = fftLen >> 2;
+
+    /* issued earlier to increase gather load idx update / gather load distance */
+    /* bit-reverse fwd indexes */
+    bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
+    bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
+    while (blkCnt > 0) {
+        uint64x2_t      vecIn;
+
+        vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs0);
+        idxOffs0 = idxOffs0 + 16;
+        vst1q(pDst32, (uint32x4_t) vecIn);
+        pDst32 += 4;
+        bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
+
+        vecIn = vldrdq_gather_offset_u64(pSrc, (uint64x2_t) bitRevOffs1);
+        idxOffs1 = idxOffs1 + 16;
+        vst1q(pDst32, (uint32x4_t) vecIn);
+        pDst32 += 4;
+        bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
+
+        blkCnt--;
+    }
+}
+
+
+/**
+  @brief         Out-of-place 16 bit reversal function for helium
+  @param[out]   pDst        points to destination buffer of unknown 16-bit data type
+  @param[in]    pSrc        points to input buffer of unknown 16-bit data type
+  @param[in]    fftLen      FFT length
+  @return       none
+*/
+
+__STATIC_INLINE void arm_bitreversal_16_outpl_mve(void *pDst, void *pSrc, uint32_t fftLen)
+{
+    uint32x4_t      idxOffs0, idxOffs1, bitRevOffs0, bitRevOffs1;
+    uint32_t        bitRevPos, blkCnt;
+    uint16_t       *pDst16 = (uint16_t *) pDst;
+    uint32_t        incrIdx = 0;
+
+    /* fwd indexes */
+    idxOffs0 = vidupq_wb_u32(&incrIdx, 4);    // {0, 4, 8, 12}
+    idxOffs1 = vidupq_wb_u32(&incrIdx, 4);    // {16, 20, 24, 28}
+
+    bitRevPos = (31 - __CLZ(fftLen)) + 4;
+    blkCnt = fftLen >> 3;
+
+    /* issued earlier to increase gather load idx update / gather load distance */
+    /* bit-reverse fwd indexes */
+    bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
+    bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
+    while (blkCnt > 0) {
+        uint32x4_t      vecIn;
+
+        vecIn = vldrwq_gather_offset_s32(pSrc, bitRevOffs0);
+        idxOffs0 = idxOffs0 + 32;
+        vst1q(pDst16, (uint16x8_t) vecIn);
+        pDst16 += 8;
+        bitRevOffs0 = vbrsrq(idxOffs0, bitRevPos);
+
+        vecIn = vldrwq_gather_offset_s32(pSrc, bitRevOffs1);
+        idxOffs1 = idxOffs1 + 32;
+        vst1q(pDst16, (uint16x8_t) vecIn);
+        pDst16 += 8;
+        bitRevOffs1 = vbrsrq(idxOffs1, bitRevPos);
+
+        blkCnt--;
+    }
+}
+
+
+#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/
+
+
+#ifdef   __cplusplus
+}
+#endif
+
+
+#endif /* _ARM_VEC_FFT_H_ */
diff --git a/Libraries/CMSIS/DSP/PrivateInclude/arm_vec_filtering.h b/Libraries/CMSIS/DSP/PrivateInclude/arm_vec_filtering.h
new file mode 100755
index 00000000..b2a06903
--- /dev/null
+++ b/Libraries/CMSIS/DSP/PrivateInclude/arm_vec_filtering.h
@@ -0,0 +1,1586 @@
+/******************************************************************************
+ * @file     arm_vec_filtering.h
+ * @brief    Private header file for CMSIS DSP Library
+ * @version  V1.7.0
+ * @date     30. October 2019
+ ******************************************************************************/
+/*
+ * Copyright (c) 2010-2019 Arm Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _ARM_VEC_FILTERING_H_
+#define _ARM_VEC_FILTERING_H_
+
+#include "arm_math.h"
+#include "arm_helium_utils.h"
+
+#ifdef   __cplusplus
+extern "C"
+{
+#endif
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F32(acc0, acc1, acc2, acc3, pX, pY, count)\
+{                                                                                     \
+    float32_t const *pSrcX, *pSrcY;                                                   \
+    f32x4_t   acc0Vec, acc1Vec, acc2Vec, acc3Vec, xVec, yVec;                         \
+    uint32_t    k;                                                                    \
+                                                                                      \
+    acc0Vec = vdupq_n_f32(0.0f);                                                      \
+    acc1Vec = vdupq_n_f32(0.0f);                                                      \
+    acc2Vec = vdupq_n_f32(0.0f);                                                      \
+    acc3Vec = vdupq_n_f32(0.0f);                                                      \
+    pSrcX = (float32_t const *) pX;                                                   \
+    pSrcY = (float32_t const *) pY;                                                   \
+    k = count >> 2;                                                                   \
+                                                                                      \
+    while (k > 0U)                                                                    \
+    {                                                                                 \
+        yVec = vld1q(pSrcY);                                                          \
+        pSrcY += 4;                                                                   \
+        xVec = vldrwq_f32(&pSrcX[1]);                                                 \
+        acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec);                                     \
+        xVec = vldrwq_f32(&pSrcX[2]);                                                 \
+        acc2Vec = vfmaq_f32(acc2Vec, xVec, yVec);                                     \
+        xVec = vldrwq_f32(&pSrcX[3]);                                                 \
+        acc3Vec = vfmaq_f32(acc3Vec, xVec, yVec);                                     \
+        xVec = vld1q(pSrcX);                                                          \
+        pSrcX += 4;                                                                   \
+        acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec);                                     \
+        /*  Decrement the loop counter   */                                           \
+        k--;                                                                          \
+    }                                                                                 \
+    /* loop + tail predication expected here  */                                      \
+    k = count % 0x4U;                                                                 \
+    if (k > 0U)                                                                       \
+    {                                                                                 \
+        mve_pred16_t p0 = vctp32q(k);                                                 \
+        yVec = vld1q(pSrcY);                                                          \
+        pSrcY += 4;                                                                   \
+        xVec = vldrwq_f32(&pSrcX[1]);                                                 \
+        acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0);                               \
+        xVec = vldrwq_f32(&pSrcX[2]);                                                 \
+        acc2Vec = vfmaq_m_f32(acc2Vec, xVec, yVec, p0);                               \
+        xVec = vldrwq_f32(&pSrcX[3]);                                                 \
+        acc3Vec = vfmaq_m_f32(acc3Vec, xVec, yVec, p0);                               \
+        xVec = vld1q(pSrcX);                                                          \
+        pSrcX += 4;                                                                   \
+        acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0);                               \
+    }                                                                                 \
+                                                                                      \
+    acc0 = vecAddAcrossF32Mve(acc0Vec);                                               \
+    acc1 = vecAddAcrossF32Mve(acc1Vec);                                               \
+    acc2 = vecAddAcrossF32Mve(acc2Vec);                                               \
+    acc3 = vecAddAcrossF32Mve(acc3Vec);                                               \
+}
+
+#define MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count) \
+{                                                    \
+    float32_t const *pSrcX, *pSrcY;                  \
+    f32x4_t   accVec, xVec, yVec;                    \
+    uint32_t    k;                                   \
+                                                     \
+    accVec = vdupq_n_f32(0.0f);                      \
+    pSrcX = (float32_t const *) pX;                  \
+    pSrcY = (float32_t const *) pY;                  \
+    k = count >> 2;                                  \
+                                                     \
+    while (k > 0U)                                   \
+    {                                                \
+        yVec = vld1q(pSrcY);                         \
+        pSrcY += 4;                                  \
+        xVec = vld1q(pSrcX);                         \
+        pSrcX += 4;                                  \
+        accVec = vfmaq_f32(accVec, xVec, yVec);      \
+        /*  Decrement the loop counter   */          \
+        k--;                                         \
+    }                                                \
+    /* Loop with tail predication expected here  */  \
+    k = count % 0x4U;                                \
+    if (k > 0U)                                      \
+    {                                                \
+        mve_pred16_t p0 = vctp32q(k);                \
+        yVec = vld1q(pSrcY);                         \
+        pSrcY += 4;                                  \
+        xVec = vld1q(pSrcX);                         \
+        pSrcX += 4;                                  \
+        accVec = vfmaq_m_f32(accVec, xVec, yVec, p0);\
+    }                                                \
+    acc = vecAddAcrossF32Mve(accVec);                \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    float32_t const *pSrcX, *pSrcY;                                     \
+    f32x4_t   acc0Vec, acc1Vec, xVec, yVec;                             \
+    uint32_t    k;                                                      \
+                                                                        \
+    acc0Vec = vdupq_n_f32(0.0f);                                        \
+    acc1Vec = vdupq_n_f32(0.0f);                                        \
+    pSrcX = (float32_t const *) pX;                                     \
+    pSrcY = (float32_t const *) pY;                                     \
+    k = (count-1) >> 2;                                                 \
+                                                                        \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        yVec = vld1q(pSrcY);                                            \
+        pSrcY += 4;                                                     \
+        xVec = vldrwq_f32(&pSrcX[1]);                                   \
+        acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec);                       \
+        xVec = vld1q(pSrcX);                                            \
+        pSrcX += 4;                                                     \
+        acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec);                       \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc1 requires exact number of sample (count-1)  */               \
+    /* disable extra lanes in final MAC computation  */                 \
+    k = (count-1) % 0x4U;                                               \
+    mve_pred16_t p0 = vctp32q(k);                                       \
+    yVec = vld1q(pSrcY);                                                \
+    pSrcY += 4;                                                         \
+    xVec = vldrwq_f32(&pSrcX[1]);                                       \
+    acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0);                     \
+    /* acc0 requires 1 additional sample  (count) */                    \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    p0 = vctp32q(k+1);                                                  \
+    xVec = vld1q(pSrcX);                                                \
+    pSrcX += 4;                                                         \
+    acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0);                     \
+                                                                        \
+    acc0 = vecAddAcrossF32Mve(acc0Vec);                                 \
+    acc1 = vecAddAcrossF32Mve(acc1Vec);                                 \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, count)\
+{                                                                         \
+    float32_t const *pSrcX, *pSrcY;                                       \
+    f32x4_t   acc0Vec, acc1Vec, xVec, yVec;                               \
+    uint32_t    k;                                                        \
+                                                                          \
+    acc0Vec = vdupq_n_f32(0.0f);                                          \
+    acc1Vec = vdupq_n_f32(0.0f);                                          \
+    pSrcX = (float32_t const *) pX;                                       \
+    pSrcY = (float32_t const *) pY;                                       \
+    k = count >> 2;                                                       \
+                                                                          \
+    while (k > 0U)                                                        \
+    {                                                                     \
+        yVec = vld1q(pSrcY);                                              \
+        pSrcY += 4;                                                       \
+        xVec = vldrwq_f32(&pSrcX[1]);                                     \
+        acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec);                         \
+        xVec = vld1q(pSrcX);                                              \
+        pSrcX += 4;                                                       \
+        acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec);                         \
+        /*  Decrement the loop counter   */                               \
+        k--;                                                              \
+    }                                                                     \
+    /* loop + tail predication expected here  */                          \
+    k = count % 0x4U;                                                     \
+    if (k > 0U)                                                           \
+    {                                                                     \
+        mve_pred16_t p0 = vctp32q(k);                                     \
+        yVec = vld1q(pSrcY);                                              \
+        pSrcY += 4;                                                       \
+        xVec = vldrwq_f32(&pSrcX[1]);                                     \
+        acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0);                   \
+        xVec = vld1q(pSrcX);                                              \
+        pSrcX += 4;                                                       \
+        acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0);                   \
+    }                                                                     \
+                                                                          \
+    acc0 = vecAddAcrossF32Mve(acc0Vec);                                   \
+    acc1 = vecAddAcrossF32Mve(acc1Vec);                                   \
+}
+
+#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    float32_t const *pSrcX, *pSrcY;                                     \
+    f32x4_t   acc0Vec, acc1Vec, xVec, yVec;                             \
+    uint32_t    k;                                                      \
+                                                                        \
+    acc0Vec = vdupq_n_f32(0.0f);                                        \
+    acc1Vec = vdupq_n_f32(0.0f);                                        \
+    pSrcX = (float32_t const *) pX;                                     \
+    pSrcY = (float32_t const *) pY;                                     \
+    k = count >> 2;                                                     \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        xVec = vld1q(pSrcX);                                            \
+        pSrcX += 4;                                                     \
+        yVec = vldrwq_f32(&pSrcY[-1]);                                  \
+        acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec);                       \
+        yVec = vld1q(pSrcY);                                            \
+        pSrcY += 4;                                                     \
+        acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec);                       \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    k = count % 0x4U;                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc1 requires 1 additional sample  */                            \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    mve_pred16_t p0 = vctp32q(k+1);                                     \
+    xVec = vld1q(pSrcX);                                                \
+    pSrcX += 4;                                                         \
+    yVec = vldrwq_f32(&pSrcY[-1]);                                      \
+    acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec,p0);                      \
+    /* acc0 requires exact number of sample  */                         \
+    /* disable extra lanes in final MAC computation  */                 \
+    p0 = vctp32q(k);                                                    \
+    yVec = vld1q(pSrcY);                                                \
+    pSrcY += 4;                                                         \
+    acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec,p0);                      \
+                                                                        \
+    acc0 = vecAddAcrossF32Mve(acc0Vec);                                 \
+    acc1 = vecAddAcrossF32Mve(acc1Vec);                                 \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count)                             \
+{                                                                                                    \
+    float32_t const *pSrcX;                                                                          \
+    f32x4_t   acc0Vec, acc1Vec, xVec, yVec;                                                          \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    acc0Vec = vdupq_n_f32(0.0f);                                                                     \
+    acc1Vec = vdupq_n_f32(0.0f);                                                                     \
+    pSrcX = (float32_t const *) pX;                                                                  \
+    k = (count - 1) >> 2;                                                                            \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);                                     \
+        pY-=4;                                                                                       \
+        xVec = vldrwq_f32(&pSrcX[1]);                                                                \
+        acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec);                                                    \
+        xVec = vld1q(pSrcX);  pSrcX += 4;                                                            \
+        acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec);                                                    \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = (count - 1) % 0x4U;                                                                          \
+    mve_pred16_t p0 = vctp32q(k);                                                                    \
+    yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);                                         \
+    xVec = vldrwq_f32(&pSrcX[1]);                                                                    \
+    acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0);                                                  \
+    xVec = vld1q(pSrcX);  pSrcX += 4;                                                                \
+    p0 = vctp32q(k+1);                                                                               \
+    acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0);                                                  \
+                                                                                                     \
+    acc0 = vecAddAcrossF32Mve(acc0Vec);                                                              \
+    acc1 = vecAddAcrossF32Mve(acc1Vec);                                                              \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, count)                           \
+{                                                                                                    \
+    float32_t const *pSrcX;                                                                          \
+    f32x4_t   acc0Vec, acc1Vec, xVec, yVec;                                                          \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    acc0Vec = vdupq_n_f32(0.0f);                                                                     \
+    acc1Vec = vdupq_n_f32(0.0f);                                                                     \
+    pSrcX = (float32_t const *) pX;                                                                  \
+    k = count >> 2;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);                                     \
+        pY-=4;                                                                                       \
+        xVec = vldrwq_f32(&pSrcX[1]);                                                                \
+        acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec);                                                    \
+        xVec = vld1q(pSrcX);  pSrcX += 4;                                                            \
+        acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec);                                                    \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x4U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp32q(k);                                                                \
+        yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);                                     \
+        xVec = vldrwq_f32(&pSrcX[1]);                                                                \
+        acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0);                                              \
+        xVec = vld1q(pSrcX);  pSrcX += 4;                                                            \
+        acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0);                                              \
+    }                                                                                                \
+    acc0 = vecAddAcrossF32Mve(acc0Vec);                                                              \
+    acc1 = vecAddAcrossF32Mve(acc1Vec);                                                              \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    float32_t   const *pSrcX;                                           \
+    const float32_t  *pY1 = pY + 1;                                     \
+    f32x4_t   acc0Vec, acc1Vec, xVec, yVec;                             \
+    uint32_t    k;                                                      \
+                                                                        \
+    acc0Vec = vdupq_n_f32(0.0f);                                        \
+    acc1Vec = vdupq_n_f32(0.0f);                                        \
+    pSrcX = (float32_t const *) pX;                                     \
+    k = count >> 2;                                                     \
+                                                                        \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        xVec = vld1q(pSrcX);  pSrcX += 4;                               \
+        yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);        \
+        pY-=4;                                                          \
+        acc0Vec = vfmaq_f32(acc0Vec, xVec, yVec);                       \
+        yVec = vldrwq_gather_shifted_offset_f32(pY1, decrIdxVec);       \
+        pY1-=4;                                                         \
+        acc1Vec = vfmaq_f32(acc1Vec, xVec, yVec);                       \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    k = count % 0x4U;                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc0 requires exact number of sample  */                         \
+    /* disable extra lanes in final MAC computation  */                 \
+    mve_pred16_t p0 = vctp32q(k);                                       \
+    xVec = vld1q(pSrcX);  pSrcX += 4;                                   \
+    yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);            \
+    acc0Vec = vfmaq_m_f32(acc0Vec, xVec, yVec, p0);                     \
+    yVec = vldrwq_gather_shifted_offset_f32(pY1, decrIdxVec);           \
+    /* acc1 requires 1 additional sample  */                            \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    p0 = vctp32q(k+1);                                                  \
+    acc1Vec = vfmaq_m_f32(acc1Vec, xVec, yVec, p0);                     \
+                                                                        \
+    acc0 = vecAddAcrossF32Mve(acc0Vec);                                 \
+    acc1 = vecAddAcrossF32Mve(acc1Vec);                                 \
+}
+
+#define MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count)                                                 \
+{                                                                                                    \
+    float32_t const *pSrcX;                                                                          \
+    f32x4_t   accVec, xVec, yVec;                                                                    \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    accVec = vdupq_n_f32(0.0f);                                                                      \
+    pSrcX = (float32_t const *) pX;                                                                  \
+    k = count >> 2;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);                                     \
+        pY-=4;                                                                                       \
+        xVec = vld1q(pSrcX);  pSrcX += 4;                                                            \
+        accVec = vfmaq_f32(accVec, xVec, yVec);                                                      \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x4U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp32q(k);                                                                \
+        xVec = vld1q(pSrcX);  pSrcX += 4;                                                            \
+        yVec = vldrwq_gather_shifted_offset_f32(pY, decrIdxVec);                                     \
+        accVec = vfmaq_m_f32(accVec, xVec, yVec, p0);                                                \
+    }                                                                                                \
+    acc = vecAddAcrossF32Mve(accVec);                                                                \
+}
+
+#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)*/
+
+#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM))
+
+#define MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count)                                                 \
+{                                                                                                    \
+    q31_t const *pSrcX;                                                                              \
+    q31x4_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q31_t const *) pX;                                                                      \
+    k = count >> 2;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);                                     \
+        pY-=4;                                                                                       \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                                             \
+        acc = vmlaldavaq(acc, xVec, yVec);                                                           \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x4U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp32q(k);                                                                \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                                             \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);                                     \
+        acc = vmlaldavaq_p(acc, xVec, yVec, p0);                                                     \
+    }                                                                                                \
+    acc = asrl(acc, 31);                                                                             \
+}
+
+
+
+#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    q31_t const *pSrcX;                                                 \
+    const q31_t       *pY1 = pY + 1;                                    \
+    q31x4_t   xVec, yVec;                                               \
+    uint32_t    k;                                                      \
+                                                                        \
+    pSrcX = (q31_t const *) pX;                                         \
+    k = count >> 2;                                                     \
+                                                                        \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);        \
+        pY-=4;                                                          \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                            \
+        yVec = vldrwq_gather_shifted_offset_s32(pY1, decrIdxVec);       \
+        pY1-=4;                                                         \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    k = count % 0x4U;                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc0 requires exact number of sample  */                         \
+    /* disable extra lanes in final MAC computation  */                 \
+    mve_pred16_t p0 = vctp32q(k);                                       \
+    xVec = vld1q(pSrcX); pSrcX += 4;                                    \
+    yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);            \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                          \
+    yVec = vldrwq_gather_shifted_offset_s32(pY1, decrIdxVec);           \
+    /* acc1 requires 1 additional sample  */                            \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    p0 = vctp32q(k+1);                                                  \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                          \
+                                                                        \
+    acc0 = asrl(acc0, 31);                                              \
+    acc1 = asrl(acc1, 31);                                              \
+}
+
+
+
+
+#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count) \
+{                                                                        \
+    q31_t const *pSrcX;                                                  \
+    q31x4_t   xVec, yVec;                                                \
+    uint32_t    k;                                                       \
+                                                                         \
+    pSrcX = (q31_t const *) pX;                                          \
+    k = (count-1) >> 2;                                                  \
+                                                                         \
+    while (k > 0U)                                                       \
+    {                                                                    \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);         \
+        pY-=4;                                                           \
+        xVec = vldrwq_s32(&pSrcX[1]);                                    \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                             \
+        xVec = vld1q(pSrcX);                                             \
+        pSrcX += 4;                                                      \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                             \
+        /*  Decrement the loop counter   */                              \
+        k--;                                                             \
+    }                                                                    \
+    k = (count - 1) % 0x4U;                                              \
+    /* use predication to finalize MAC sum */                            \
+    /* acc1 requires exact number of sample (count-1)  */                \
+    /* disable extra lanes in final MAC computation  */                  \
+    mve_pred16_t p0 = vctp32q(k);                                        \
+    yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);             \
+    xVec = vldrwq_s32(&pSrcX[1]);                                        \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                           \
+    /* acc0 requires 1 additional sample  (count) */                     \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */    \
+    p0 = vctp32q(k+1);                                                   \
+    xVec = vld1q(pSrcX);                                                 \
+    pSrcX += 4;                                                          \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                           \
+                                                                         \
+    acc0 = asrl(acc0, 31);                                               \
+    acc1 = asrl(acc1, 31);                                               \
+}
+
+
+
+#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, count)                           \
+{                                                                                                    \
+    q31_t const *pSrcX;                                                                              \
+    q31x4_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q31_t const *) pX;                                                                      \
+    k = count >> 2;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);                                     \
+        pY-=4;                                                                                       \
+        xVec = vldrwq_s32(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                                                         \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                                             \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                                                         \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x4U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp32q(k);                                                                \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);                                     \
+        xVec = vldrwq_s32(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                                             \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                                                   \
+    }                                                                                                \
+    acc0 = asrl(acc0, 31);                                                                           \
+    acc1 = asrl(acc1, 31);                                                                           \
+}
+
+
+
+#define MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, count)               \
+{                                                                                                    \
+    q31_t const *pSrcX;                                                                              \
+    q31x4_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q31_t const *) pX;                                                                      \
+    k = count >> 2;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);                                     \
+        pY-=4;                                                                                       \
+        xVec = vldrwq_s32(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                                                         \
+        xVec = vldrwq_s32(&pSrcX[2]);                                                                \
+        acc2 = vmlaldavaq(acc2, xVec, yVec);                                                         \
+        xVec = vldrwq_s32(&pSrcX[3]);                                                                \
+        acc3 = vmlaldavaq(acc3, xVec, yVec);                                                         \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                                             \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                                                         \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x4U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp32q(k);                                                                \
+        yVec = vldrwq_gather_shifted_offset_s32(pY, decrIdxVec);                                     \
+        xVec = vldrwq_s32(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                                                   \
+        xVec = vldrwq_s32(&pSrcX[2]);                                                                \
+        acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0);                                                   \
+        xVec = vldrwq_s32(&pSrcX[3]);                                                                \
+        acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                                             \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                                                   \
+    }                                                                                                \
+    acc0 = asrl(acc0, 31);                                                                           \
+    acc1 = asrl(acc1, 31);                                                                           \
+    acc2 = asrl(acc2, 31);                                                                           \
+    acc3 = asrl(acc3, 31);                                                                           \
+}
+
+#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    q31_t const *pSrcX, *pSrcY;                                         \
+    q31x4_t   xVec, yVec;                                               \
+    uint32_t    k;                                                      \
+                                                                        \
+    pSrcX = (q31_t const *) pX;                                         \
+    pSrcY  = (q31_t const *) pY;                                        \
+    k = count >> 2;                                                     \
+                                                                        \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                \
+        yVec = vldrwq_s32(&pSrcY[-1]);                                  \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                            \
+        yVec = vld1q(pSrcY); pSrcY += 4;                                \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    k = count % 0x4U;                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc1 requires 1 additional sample  */                            \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    mve_pred16_t p0 = vctp32q(k+1);                                     \
+    xVec = vld1q(pSrcX); pSrcX += 4;                                    \
+    yVec = vldrwq_s32(&pSrcY[-1]);                                      \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec,p0);                           \
+    /* acc0 requires exact number of sample  */                         \
+    /* disable extra lanes in final MAC computation  */                 \
+    p0 = vctp32q(k);                                                    \
+    yVec = vld1q(pSrcY);  pSrcY += 4;                                   \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec,p0);                           \
+                                                                        \
+    acc0 = asrl(acc0, 31);                                              \
+    acc1 = asrl(acc1, 31);                                              \
+}
+
+#define MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count)\
+{                                                   \
+    q31_t const *pSrcX, *pSrcY;                     \
+    q31x4_t   xVec, yVec;                           \
+    uint32_t    k;                                  \
+                                                    \
+    pSrcX = (q31_t const *) pX;                     \
+    pSrcY = (q31_t const *) pY;                     \
+    k = count >> 2;                                 \
+                                                    \
+    while (k > 0U)                                  \
+    {                                               \
+        xVec = vld1q(pSrcX); pSrcX += 4;            \
+        yVec = vld1q(pSrcY); pSrcY += 4;            \
+        acc = vmlaldavaq(acc, xVec, yVec);          \
+        /*  Decrement the loop counter   */         \
+        k--;                                        \
+    }                                               \
+    /*  tail predication expected here  */          \
+    k = count % 0x4U;                               \
+    if (k > 0U)                                     \
+    {                                               \
+        mve_pred16_t p0 = vctp32q(k);               \
+        xVec = vld1q(pSrcX); pSrcX += 4;            \
+        yVec = vld1q(pSrcY); pSrcY += 4;            \
+        acc = vmlaldavaq_p(acc, xVec, yVec, p0);    \
+    }                                               \
+    acc = asrl(acc, 31);                            \
+}
+
+#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, count)\
+{                                                                                     \
+    q31_t const *pSrcX, *pSrcY;                                                       \
+    q31x4_t   xVec, yVec;                                                             \
+    uint32_t    k;                                                                    \
+                                                                                      \
+    pSrcX = (q31_t const *) pX;                                                       \
+    pSrcY  = (q31_t const *) pY;                                                      \
+    k = count >> 2;                                                                   \
+                                                                                      \
+    while (k > 0U)                                                                    \
+    {                                                                                 \
+        yVec = vld1q(pSrcY); pSrcY += 4;                                              \
+        xVec = vldrwq_s32(&pSrcX[1]);                                                 \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                                          \
+        xVec = vldrwq_s32(&pSrcX[2]);                                                 \
+        acc2 = vmlaldavaq(acc2, xVec, yVec);                                          \
+        xVec = vldrwq_s32(&pSrcX[3]);                                                 \
+        acc3 = vmlaldavaq(acc3, xVec, yVec);                                          \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                              \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                                          \
+        /*  Decrement the loop counter   */                                           \
+        k--;                                                                          \
+    }                                                                                 \
+    /* loop + tail predication expected here  */                                      \
+    k = count % 0x4U;                                                                 \
+    if (k > 0U)                                                                       \
+    {                                                                                 \
+        mve_pred16_t p0 = vctp32q(k);                                                 \
+        yVec = vld1q(pSrcY); pSrcY += 4;                                              \
+        xVec = vldrwq_s32(&pSrcX[1]);                                                 \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                                    \
+        xVec = vldrwq_s32(&pSrcX[2]);                                                 \
+        acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0);                                    \
+        xVec = vldrwq_s32(&pSrcX[3]);                                                 \
+        acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0);                                    \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                              \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                                    \
+    }                                                                                 \
+                                                                                      \
+    acc0 = asrl(acc0, 31);                                                            \
+    acc1 = asrl(acc1, 31);                                                            \
+    acc2 = asrl(acc2, 31);                                                            \
+    acc3 = asrl(acc3, 31);                                                            \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, count)\
+{                                                                         \
+    q31_t const *pSrcX, *pSrcY;                                           \
+    q31x4_t   xVec, yVec;                                                 \
+    uint32_t    k;                                                        \
+                                                                          \
+    pSrcX = (q31_t const *) pX;                                           \
+    pSrcY  = (q31_t const *) pY;                                          \
+    k = count >> 2;                                                       \
+                                                                          \
+    while (k > 0U)                                                        \
+    {                                                                     \
+        yVec = vld1q(pSrcY); pSrcY += 4;                                  \
+        xVec = vldrwq_s32(&pSrcX[1]);                                     \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                              \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                  \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                              \
+        /*  Decrement the loop counter   */                               \
+        k--;                                                              \
+    }                                                                     \
+    /* loop + tail predication expected here  */                          \
+    k = count % 0x4U;                                                     \
+    if (k > 0U)                                                           \
+    {                                                                     \
+        mve_pred16_t p0 = vctp32q(k);                                     \
+        yVec = vld1q(pSrcY); pSrcY += 4;                                  \
+        xVec = vldrwq_s32(&pSrcX[1]);                                     \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                        \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                  \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                        \
+    }                                                                     \
+                                                                          \
+    acc0 = asrl(acc0, 31);                                                \
+    acc1 = asrl(acc1, 31);                                                \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    q31_t const *pSrcX, *pSrcY;                                         \
+    q31x4_t   xVec, yVec;                                               \
+    uint32_t    k;                                                      \
+                                                                        \
+    pSrcX = (q31_t const *) pX;                                         \
+    pSrcY  = (q31_t const *) pY;                                        \
+    k = (count-1) >> 2;                                                 \
+                                                                        \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        yVec = vld1q(pSrcY); pSrcY += 4;                                \
+        xVec = vldrwq_s32(&pSrcX[1]);                                   \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                            \
+        xVec = vld1q(pSrcX); pSrcX += 4;                                \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc1 requires exact number of sample (count-1)  */               \
+    /* disable extra lanes in final MAC computation  */                 \
+    k = (count-1) % 0x4U;                                               \
+    mve_pred16_t p0 = vctp32q(k);                                       \
+    yVec = vld1q(pSrcY);  pSrcY += 4;                                   \
+    xVec = vldrwq_s32(&pSrcX[1]);                                       \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                          \
+    /* acc0 requires 1 additional sample  (count) */                    \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    p0 = vctp32q(k+1);                                                  \
+    xVec = vld1q(pSrcX); pSrcX += 4;                                    \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                          \
+                                                                        \
+    acc0 = asrl(acc0, 31);                                              \
+    acc1 = asrl(acc1, 31);                                              \
+}
+
+#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    q15_t const *pSrcX, *pSrcY;                                         \
+    q15x8_t   xVec, yVec;                                               \
+    uint32_t    k;                                                      \
+                                                                        \
+    pSrcX = (q15_t const *) pX;                                         \
+    pSrcY  = (q15_t const *) pY;                                        \
+    k = count >> 3;                                                     \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                               \
+        yVec = vldrhq_s16(&pSrcY[-1]);                                  \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                            \
+        yVec = vld1q(pSrcY);  pSrcY += 8;                               \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    k = count % 0x8U;                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc1 requires 1 additional sample  */                            \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    mve_pred16_t p0 = vctp16q(k+1);                                     \
+    xVec = vld1q(pSrcX);  pSrcX += 8;                                   \
+    yVec = vldrhq_s16(&pSrcY[-1]);                                      \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec,p0);                           \
+    /* acc0 requires exact number of sample  */                         \
+    /* disable extra lanes in final MAC computation  */                 \
+    p0 = vctp16q(k);                                                    \
+    yVec = vld1q(pSrcY);  pSrcY += 8;                                   \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec,p0);                           \
+                                                                        \
+    acc0 = asrl(acc0, 15);                                              \
+    acc1 = asrl(acc1, 15);                                              \
+    acc0 = __SSAT(acc0, 16);                                            \
+    acc1 = __SSAT(acc1, 16);                                            \
+}
+
+#define MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count)\
+{                                                   \
+    q15_t const *pSrcX, *pSrcY;                     \
+    q15x8_t   xVec, yVec;                           \
+    uint32_t    k;                                  \
+                                                    \
+    pSrcX = (q15_t const *) pX;                     \
+    pSrcY = (q15_t const *) pY;                     \
+    k = count >> 3;                                 \
+    while (k > 0U)                                  \
+    {                                               \
+        xVec = vld1q(pSrcX);  pSrcX += 8;           \
+        yVec = vld1q(pSrcY);  pSrcY += 8;           \
+        acc = vmlaldavaq(acc, xVec, yVec);          \
+        /*  Decrement the loop counter   */         \
+        k--;                                        \
+    }                                               \
+    /*  tail predication expected here  */          \
+    k = count % 0x8U;                               \
+    if (k > 0U)                                     \
+    {                                               \
+        mve_pred16_t p0 = vctp16q(k);               \
+        xVec = vld1q(pSrcX);  pSrcX += 8;           \
+        yVec = vld1q(pSrcY);  pSrcY += 8;           \
+        acc = vmlaldavaq_p(acc, xVec, yVec, p0);    \
+    }                                               \
+    acc = asrl(acc, 15);                            \
+    acc = __SSAT(acc, 16);                          \
+}
+
+#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, count)\
+{                                                                                     \
+    q15_t const *pSrcX, *pSrcY;                                                       \
+    q15x8_t   xVec, yVec;                                                             \
+    uint32_t    k;                                                                    \
+                                                                                      \
+    pSrcX = (q15_t const *) pX;                                                       \
+    pSrcY  = (q15_t const *) pY;                                                      \
+    k = count >> 3;                                                                   \
+                                                                                      \
+    while (k > 0U)                                                                    \
+    {                                                                                 \
+        yVec = vld1q(pSrcY);  pSrcY += 8;                                             \
+        xVec = vldrhq_s16(&pSrcX[1]);                                                 \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                                          \
+        xVec = vldrhq_s16(&pSrcX[2]);                                                 \
+        acc2 = vmlaldavaq(acc2, xVec, yVec);                                          \
+        xVec = vldrhq_s16(&pSrcX[3]);                                                 \
+        acc3 = vmlaldavaq(acc3, xVec, yVec);                                          \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                             \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                                          \
+        /*  Decrement the loop counter   */                                           \
+        k--;                                                                          \
+    }                                                                                 \
+    /* loop + tail predication expected here  */                                      \
+    k = count % 0x8U;                                                                 \
+    if (k > 0U)                                                                       \
+    {                                                                                 \
+        mve_pred16_t p0 = vctp16q(k);                                                 \
+        yVec = vld1q(pSrcY);  pSrcY += 8;                                             \
+        xVec = vldrhq_s16(&pSrcX[1]);                                                 \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                                    \
+        xVec = vldrhq_s16(&pSrcX[2]);                                                 \
+        acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0);                                    \
+        xVec = vldrhq_s16(&pSrcX[3]);                                                 \
+        acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0);                                    \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                             \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                                    \
+    }                                                                                 \
+                                                                                      \
+    acc0 = asrl(acc0, 15);                                                            \
+    acc1 = asrl(acc1, 15);                                                            \
+    acc2 = asrl(acc2, 15);                                                            \
+    acc3 = asrl(acc3, 15);                                                            \
+    acc0 = __SSAT(acc0, 16);                                                          \
+    acc1 = __SSAT(acc1, 16);                                                          \
+    acc2 = __SSAT(acc2, 16);                                                          \
+    acc3 = __SSAT(acc3, 16);                                                          \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, count)\
+{                                                                         \
+    q15_t const *pSrcX, *pSrcY;                                           \
+    q15x8_t   xVec, yVec;                                                 \
+    uint32_t    k;                                                        \
+                                                                          \
+    pSrcX = (q15_t const *) pX;                                           \
+    pSrcY  = (q15_t const *) pY;                                          \
+    k = count >> 3;                                                       \
+                                                                          \
+    while (k > 0U)                                                        \
+    {                                                                     \
+        yVec = vld1q(pSrcY);  pSrcY += 8;                                 \
+        xVec = vldrhq_s16(&pSrcX[1]);                                     \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                              \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                 \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                              \
+        /*  Decrement the loop counter   */                               \
+        k--;                                                              \
+    }                                                                     \
+    /* loop + tail predication expected here  */                          \
+    k = count % 0x8U;                                                     \
+    if (k > 0U)                                                           \
+    {                                                                     \
+        mve_pred16_t p0 = vctp16q(k);                                     \
+        yVec = vld1q(pSrcY);  pSrcY += 8;                                 \
+        xVec = vldrhq_s16(&pSrcX[1]);                                     \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                        \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                 \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                        \
+    }                                                                     \
+                                                                          \
+    acc0 = asrl(acc0, 15);                                                \
+    acc1 = asrl(acc1, 15);                                                \
+    acc0 = __SSAT(acc0, 16);                                              \
+    acc1 = __SSAT(acc1, 16);                                              \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    q15_t const *pSrcX, *pSrcY;                                         \
+    q15x8_t   xVec, yVec;                                               \
+    uint32_t    k;                                                      \
+                                                                        \
+    pSrcX = (q15_t const *) pX;                                         \
+    pSrcY  = (q15_t const *) pY;                                        \
+    k = (count-1) >> 3;                                                 \
+                                                                        \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        yVec = vld1q(pSrcY);  pSrcY += 8;                               \
+        xVec = vldrhq_s16(&pSrcX[1]);                                   \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                            \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                               \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc1 requires exact number of sample (count-1)  */               \
+    /* disable extra lanes in final MAC computation  */                 \
+    k = (count-1) % 0x8U;                                               \
+    mve_pred16_t p0 = vctp16q(k);                                       \
+    yVec = vld1q(pSrcY);  pSrcY += 8;                                   \
+    xVec = vldrhq_s16(&pSrcX[1]);                                       \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                          \
+    /* acc0 requires 1 additional sample  (count) */                    \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    p0 = vctp16q(k+1);                                                  \
+    xVec = vld1q(pSrcX);  pSrcX += 8;                                   \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                          \
+                                                                        \
+    acc0 = asrl(acc0, 15);                                              \
+    acc1 = asrl(acc1, 15);                                              \
+    acc0 = __SSAT(acc0, 16);                                            \
+    acc1 = __SSAT(acc1, 16);                                            \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count)\
+{                                                                       \
+    q15_t const *pSrcX;                                                 \
+    const q15_t       *pY1 = pY + 1;                                    \
+    q15x8_t   xVec, yVec;                                               \
+    uint32_t    k;                                                      \
+                                                                        \
+    pSrcX = (q15_t const *) pX;                                         \
+    k = count >> 3;                                                     \
+                                                                        \
+    while (k > 0U)                                                      \
+    {                                                                   \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                               \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);        \
+        pY-=8;                                                          \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                            \
+        yVec = vldrhq_gather_shifted_offset_s16(pY1, decrIdxVec);       \
+        pY1-=8;                                                         \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                             \
+        k--;                                                            \
+    }                                                                   \
+    k = count % 0x8U;                                                   \
+    /* use predication to finalize MAC sum */                           \
+    /* acc0 requires exact number of sample  */                         \
+    /* disable extra lanes in final MAC computation  */                 \
+    mve_pred16_t p0 = vctp16q(k);                                       \
+    xVec = vld1q(pSrcX);  pSrcX += 8;                                   \
+    yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);            \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                          \
+    yVec = vldrhq_gather_shifted_offset_s16(pY1, decrIdxVec);           \
+    /* acc1 requires 1 additional sample  */                            \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */   \
+    p0 = vctp16q(k+1);                                                  \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                          \
+                                                                        \
+    acc0 = asrl(acc0, 15);                                              \
+    acc1 = asrl(acc1, 15);                                              \
+    acc0 = __SSAT(acc0, 16);                                            \
+    acc1 = __SSAT(acc1, 16);                                            \
+}
+
+#define MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count)                                                 \
+{                                                                                                    \
+    q15_t const *pSrcX;                                                                              \
+    q15x8_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q15_t const *) pX;                                                                      \
+    k = count >> 3;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                     \
+        pY-=8;                                                                                       \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                                            \
+        acc = vmlaldavaq(acc, xVec, yVec);                                                           \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x8U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp16q(k);                                                                \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                                            \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                     \
+        acc = vmlaldavaq_p(acc, xVec, yVec, p0);                                                     \
+    }                                                                                                \
+    acc = asrl(acc, 15);                                                                             \
+    acc = __SSAT(acc, 16);                                                                           \
+}
+
+#define MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, count)               \
+{                                                                                                    \
+    q15_t const *pSrcX;                                                                              \
+    q15x8_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q15_t const *) pX;                                                                      \
+    k = count >> 3;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                     \
+        pY-=8;                                                                                       \
+        xVec = vldrhq_s16(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                                                         \
+        xVec = vldrhq_s16(&pSrcX[2]);                                                                \
+        acc2 = vmlaldavaq(acc2, xVec, yVec);                                                         \
+        xVec = vldrhq_s16(&pSrcX[3]);                                                                \
+        acc3 = vmlaldavaq(acc3, xVec, yVec);                                                         \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                                            \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                                                         \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x8U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp16q(k);                                                                \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                     \
+        xVec = vldrhq_s16(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                                                   \
+        xVec = vldrhq_s16(&pSrcX[2]);                                                                \
+        acc2 = vmlaldavaq_p(acc2, xVec, yVec, p0);                                                   \
+        xVec = vldrhq_s16(&pSrcX[3]);                                                                \
+        acc3 = vmlaldavaq_p(acc3, xVec, yVec, p0);                                                   \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                                            \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                                                   \
+    }                                                                                                \
+    acc0 = asrl(acc0, 15);                                                                           \
+    acc1 = asrl(acc1, 15);                                                                           \
+    acc2 = asrl(acc2, 15);                                                                           \
+    acc3 = asrl(acc3, 15);                                                                           \
+    acc0 = __SSAT(acc0, 16);                                                                         \
+    acc1 = __SSAT(acc1, 16);                                                                         \
+    acc2 = __SSAT(acc2, 16);                                                                         \
+    acc3 = __SSAT(acc3, 16);                                                                         \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, count)                           \
+{                                                                                                    \
+    q15_t const *pSrcX;                                                                              \
+    q15x8_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q15_t const *) pX;                                                                      \
+    k = count >> 3;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                     \
+        pY-=8;                                                                                       \
+        xVec = vldrhq_s16(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                                                         \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                                            \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                                                         \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x8U;                                                                                \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp16q(k);                                                                \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                     \
+        xVec = vldrhq_s16(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                                                   \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                                            \
+        acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                                                   \
+    }                                                                                                \
+    acc0 = asrl(acc0, 15);                                                                           \
+    acc1 = asrl(acc1, 15);                                                                           \
+    acc0 = __SSAT(acc0, 16);                                                                         \
+    acc1 = __SSAT(acc1, 16);                                                                         \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count)                             \
+{                                                                                                    \
+    q15_t const *pSrcX;                                                                              \
+    q15x8_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q15_t const *) pX;                                                                      \
+    k = (count-1) >> 3;                                                                              \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                     \
+        pY-=8;                                                                                       \
+        xVec = vldrhq_s16(&pSrcX[1]);                                                                \
+        acc1 = vmlaldavaq(acc1, xVec, yVec);                                                         \
+        xVec = vld1q(pSrcX);  pSrcX += 8;                                                            \
+        acc0 = vmlaldavaq(acc0, xVec, yVec);                                                         \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    k = (count - 1) % 0x8U;                                                                          \
+    /* use predication to finalize MAC sum */                                                        \
+    /* acc1 requires exact number of sample (count-1)  */                                            \
+    /* disable extra lanes in final MAC computation  */                                              \
+    mve_pred16_t p0 = vctp16q(k);                                                                    \
+    yVec = vldrhq_gather_shifted_offset_s16(pY, decrIdxVec);                                         \
+    xVec = vldrhq_s16(&pSrcX[1]);                                                                    \
+    acc1 = vmlaldavaq_p(acc1, xVec, yVec, p0);                                                       \
+    /* acc0 requires 1 additional sample  (count) */                                                 \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */                                \
+    p0 = vctp16q(k+1);                                                                               \
+    xVec = vld1q(pSrcX);  pSrcX += 8;                                                                \
+    acc0 = vmlaldavaq_p(acc0, xVec, yVec, p0);                                                       \
+                                                                                                     \
+    acc0 = asrl(acc0, 15);                                                                           \
+    acc1 = asrl(acc1, 15);                                                                           \
+    acc0 = __SSAT(acc0, 16);                                                                         \
+    acc1 = __SSAT(acc1, 16);                                                                         \
+}
+
+#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count)\
+{                                                                      \
+    q7_t const *pSrcX, *pSrcY;                                         \
+    q7x16_t   xVec, yVec;                                              \
+    uint32_t    k;                                                     \
+                                                                       \
+    pSrcX = (q7_t const *) pX;                                         \
+    pSrcY = (q7_t const *) pY;                                         \
+    k = count >> 4;                                                    \
+    while (k > 0U)                                                     \
+    {                                                                  \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                             \
+        yVec = vldrbq_s8(&pSrcY[-1]);                                  \
+        acc1 = vmladavaq(acc1, xVec, yVec);                            \
+        yVec = vld1q(pSrcY);  pSrcY += 16;                             \
+        acc0 = vmladavaq(acc0, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                            \
+        k--;                                                           \
+    }                                                                  \
+    k = count % 0x10U;                                                 \
+    /* use predication to finalize MAC sum */                          \
+    /* acc1 requires 1 additional sample  */                           \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */  \
+    mve_pred16_t p0 = vctp8q(k+1);                                     \
+    xVec = vld1q(pSrcX);  pSrcX += 16;                                 \
+    yVec = vldrbq_s8(&pSrcY[-1]);                                      \
+    acc1 = vmladavaq_p(acc1, xVec, yVec,p0);                           \
+    /* acc0 requires exact number of sample  */                        \
+    /* disable extra lanes in final MAC computation  */                \
+    p0 = vctp8q(k);                                                    \
+    yVec = vld1q(pSrcY);  pSrcY += 16;                                 \
+    acc0 = vmladavaq_p(acc0, xVec, yVec,p0);                           \
+                                                                       \
+    acc0 = (acc0 >> 7);                                                \
+    acc1 = (acc1 >> 7);                                                \
+    acc0 = __SSAT(acc0, 8);                                            \
+    acc1 = __SSAT(acc1, 8);                                            \
+}
+
+#define MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count)\
+{                                                  \
+    q7_t const *pSrcX, *pSrcY;                     \
+    q7x16_t   xVec, yVec;                          \
+    uint32_t    k;                                 \
+                                                   \
+    pSrcX = (q7_t const *) pX;                     \
+    pSrcY = (q7_t const *) pY;                     \
+    k = count >> 4;                                \
+    while (k > 0U)                                 \
+    {                                              \
+        xVec = vld1q(pSrcX);  pSrcX += 16;         \
+        yVec = vld1q(pSrcY);  pSrcY += 16;         \
+        acc = vmladavaq(acc, xVec, yVec);          \
+        /*  Decrement the loop counter   */        \
+        k--;                                       \
+    }                                              \
+    /*  tail predication expected here  */         \
+    k = count % 0x10U;                             \
+    if (k > 0U)                                    \
+    {                                              \
+        mve_pred16_t p0 = vctp8q(k);               \
+        xVec = vld1q(pSrcX);  pSrcX += 16;         \
+        yVec = vld1q(pSrcY);  pSrcY += 16;         \
+        acc = vmladavaq_p(acc, xVec, yVec, p0);    \
+    }                                              \
+    acc =(acc >> 7);                               \
+    acc = __SSAT(acc, 8);                          \
+}
+
+#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, count)\
+{                                                                                    \
+    q7_t const *pSrcX, *pSrcY;                                                       \
+    q7x16_t   xVec, yVec;                                                            \
+    uint32_t    k;                                                                   \
+                                                                                     \
+    pSrcX = (q7_t const *) pX;                                                       \
+    pSrcY = (q7_t const *) pY;                                                       \
+    k = count >> 4;                                                                  \
+                                                                                     \
+    while (k > 0U)                                                                   \
+    {                                                                                \
+        yVec = vld1q(pSrcY);  pSrcY += 16;                                           \
+        xVec = vldrbq_s8(&pSrcX[1]);                                                 \
+        acc1 = vmladavaq(acc1, xVec, yVec);                                          \
+        xVec = vldrbq_s8(&pSrcX[2]);                                                 \
+        acc2 = vmladavaq(acc2, xVec, yVec);                                          \
+        xVec = vldrbq_s8(&pSrcX[3]);                                                 \
+        acc3 = vmladavaq(acc3, xVec, yVec);                                          \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                           \
+        acc0 = vmladavaq(acc0, xVec, yVec);                                          \
+        /*  Decrement the loop counter   */                                          \
+        k--;                                                                         \
+    }                                                                                \
+    /* loop + tail predication expected here  */                                     \
+    k = count % 0x10U;                                                               \
+    if (k > 0U)                                                                      \
+    {                                                                                \
+        mve_pred16_t p0 = vctp8q(k);                                                 \
+        yVec = vld1q(pSrcY);  pSrcY += 16;                                           \
+        xVec = vldrbq_s8(&pSrcX[1]);                                                 \
+        acc1 = vmladavaq_p(acc1, xVec, yVec, p0);                                    \
+        xVec = vldrbq_s8(&pSrcX[2]);                                                 \
+        acc2 = vmladavaq_p(acc2, xVec, yVec, p0);                                    \
+        xVec = vldrbq_s8(&pSrcX[3]);                                                 \
+        acc3 = vmladavaq_p(acc3, xVec, yVec, p0);                                    \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                           \
+        acc0 = vmladavaq_p(acc0, xVec, yVec, p0);                                    \
+    }                                                                                \
+                                                                                     \
+    acc0 = (acc0 >> 7);                                                              \
+    acc1 = (acc1 >> 7);                                                              \
+    acc2 = (acc2 >> 7);                                                              \
+    acc3 = (acc3 >> 7);                                                              \
+    acc0 = __SSAT(acc0, 8);                                                          \
+    acc1 = __SSAT(acc1, 8);                                                          \
+    acc2 = __SSAT(acc2, 8);                                                          \
+    acc3 = __SSAT(acc3, 8);                                                          \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, count)\
+{                                                                        \
+    q7_t const *pSrcX, *pSrcY;                                           \
+    q7x16_t   xVec, yVec;                                                \
+    uint32_t    k;                                                       \
+                                                                         \
+    pSrcX = (q7_t const *) pX;                                           \
+    pSrcY = (q7_t const *) pY;                                           \
+    k = count >> 4;                                                      \
+                                                                         \
+    while (k > 0U)                                                       \
+    {                                                                    \
+        yVec = vld1q(pSrcY);  pSrcY += 16;                               \
+        xVec = vldrbq_s8(&pSrcX[1]);                                     \
+        acc1 = vmladavaq(acc1, xVec, yVec);                              \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                               \
+        acc0 = vmladavaq(acc0, xVec, yVec);                              \
+        /*  Decrement the loop counter   */                              \
+        k--;                                                             \
+    }                                                                    \
+    /* loop + tail predication expected here  */                         \
+    k = count % 0x10U;                                                   \
+    if (k > 0U)                                                          \
+    {                                                                    \
+        mve_pred16_t p0 = vctp8q(k);                                     \
+        yVec = vld1q(pSrcY);  pSrcY += 16;                               \
+        xVec = vldrbq_s8(&pSrcX[1]);                                     \
+        acc1 = vmladavaq_p(acc1, xVec, yVec, p0);                        \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                               \
+        acc0 = vmladavaq_p(acc0, xVec, yVec, p0);                        \
+    }                                                                    \
+                                                                         \
+    acc0 = (acc0 >> 7);                                                  \
+    acc1 = (acc1 >> 7);                                                  \
+    acc0 = __SSAT(acc0, 8);                                              \
+    acc1 = __SSAT(acc1, 8);                                              \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count)\
+{                                                                      \
+    q7_t const *pSrcX, *pSrcY;                                         \
+    q7x16_t   xVec, yVec;                                              \
+    uint32_t    k;                                                     \
+                                                                       \
+    pSrcX = (q7_t const *) pX;                                         \
+    pSrcY = (q7_t const *) pY;                                         \
+    k = (count-1) >> 4;                                                \
+                                                                       \
+    while (k > 0U)                                                     \
+    {                                                                  \
+        yVec = vld1q(pSrcY);  pSrcY += 16;                             \
+        xVec = vldrbq_s8(&pSrcX[1]);                                   \
+        acc1 = vmladavaq(acc1, xVec, yVec);                            \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                             \
+        acc0 = vmladavaq(acc0, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                            \
+        k--;                                                           \
+    }                                                                  \
+    /* use predication to finalize MAC sum */                          \
+    /* acc1 requires exact number of sample (count-1)  */              \
+    /* disable extra lanes in final MAC computation  */                \
+    k = (count-1) % 0x10U;                                             \
+    mve_pred16_t p0 = vctp8q(k);                                       \
+    yVec = vld1q(pSrcY);  pSrcY += 16;                                 \
+    xVec = vldrbq_s8(&pSrcX[1]);                                       \
+    acc1 = vmladavaq_p(acc1, xVec, yVec, p0);                          \
+    /* acc0 requires 1 additional sample  (count) */                   \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */  \
+    p0 = vctp8q(k+1);                                                  \
+    xVec = vld1q(pSrcX);  pSrcX += 16;                                 \
+    acc0 = vmladavaq_p(acc0, xVec, yVec, p0);                          \
+                                                                       \
+    acc0 = (acc0 >> 7);                                                \
+    acc1 = (acc1 >> 7);                                                \
+    acc0 = __SSAT(acc0, 8);                                            \
+    acc1 = __SSAT(acc1, 8);                                            \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count)\
+{                                                                      \
+    q7_t const *pSrcX;                                                 \
+    const q7_t       *pY1 = pY + 1;                                    \
+    q7x16_t   xVec, yVec;                                              \
+    uint32_t    k;                                                     \
+                                                                       \
+    pSrcX = (q7_t const *) pX;                                         \
+    k = count >> 4;                                                    \
+                                                                       \
+    while (k > 0U)                                                     \
+    {                                                                  \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                             \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                \
+        pY-=16;                                                        \
+        acc0 = vmladavaq(acc0, xVec, yVec);                            \
+        yVec = vldrbq_gather_offset_s8(pY1, decrIdxVec);               \
+        pY1-=16;                                                       \
+        acc1 = vmladavaq(acc1, xVec, yVec);                            \
+        /*  Decrement the loop counter   */                            \
+        k--;                                                           \
+    }                                                                  \
+    k = count % 0x10U;                                                 \
+    /* use predication to finalize MAC sum */                          \
+    /* acc0 requires exact number of sample  */                        \
+    /* disable extra lanes in final MAC computation  */                \
+    mve_pred16_t p0 = vctp8q(k);                                       \
+    xVec = vld1q(pSrcX);  pSrcX += 16;                                 \
+    yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                    \
+    acc0 = vmladavaq_p(acc0, xVec, yVec, p0);                          \
+    yVec = vldrbq_gather_offset_s8(pY1, decrIdxVec);                   \
+    /* acc1 requires 1 additional sample  */                           \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */  \
+    p0 = vctp8q(k+1);                                                  \
+    acc1 = vmladavaq_p(acc1, xVec, yVec, p0);                          \
+                                                                       \
+    acc0 = (acc0 >> 7);                                                \
+    acc1 = (acc1 >> 7);                                                \
+    acc0 = __SSAT(acc0, 8);                                            \
+    acc1 = __SSAT(acc1, 8);                                            \
+}
+
+#define MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count)                                                  \
+{                                                                                                    \
+    q7_t const *pSrcX;                                                                               \
+    q7x16_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q7_t const *) pX;                                                                       \
+    k = count >> 4;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                              \
+        pY-=16;                                                                                      \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                                           \
+        acc = vmladavaq(acc, xVec, yVec);                                                            \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x10U;                                                                               \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp8q(k);                                                                 \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                                           \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                              \
+        acc = vmladavaq_p(acc, xVec, yVec, p0);                                                      \
+    }                                                                                                \
+    acc = __SSAT(acc >> 7, 8);                                                                       \
+}
+
+#define MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, count)                \
+{                                                                                                    \
+    q7_t const *pSrcX;                                                                               \
+    q7x16_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q7_t const *) pX;                                                                       \
+    k = count >> 4;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                              \
+        pY-=16;                                                                                      \
+        xVec = vldrbq_s8(&pSrcX[1]);                                                                 \
+        acc1 = vmladavaq(acc1, xVec, yVec);                                                          \
+        xVec = vldrbq_s8(&pSrcX[2]);                                                                 \
+        acc2 = vmladavaq(acc2, xVec, yVec);                                                          \
+        xVec = vldrbq_s8(&pSrcX[3]);                                                                 \
+        acc3 = vmladavaq(acc3, xVec, yVec);                                                          \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                                           \
+        acc0 = vmladavaq(acc0, xVec, yVec);                                                          \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x10U;                                                                               \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp8q(k);                                                                 \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                              \
+        xVec = vldrbq_s8(&pSrcX[1]);                                                                 \
+        acc1 = vmladavaq_p(acc1, xVec, yVec, p0);                                                    \
+        xVec = vldrbq_s8(&pSrcX[2]);                                                                 \
+        acc2 = vmladavaq_p(acc2, xVec, yVec, p0);                                                    \
+        xVec = vldrbq_s8(&pSrcX[3]);                                                                 \
+        acc3 = vmladavaq_p(acc3, xVec, yVec, p0);                                                    \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                                           \
+        acc0 = vmladavaq_p(acc0, xVec, yVec, p0);                                                    \
+    }                                                                                                \
+    acc0 = __SSAT(acc0 >> 7, 8);                                                                     \
+    acc1 = __SSAT(acc1 >> 7, 8);                                                                     \
+    acc2 = __SSAT(acc2 >> 7, 8);                                                                     \
+    acc3 = __SSAT(acc3 >> 7, 8);                                                                     \
+}
+
+#define MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, count)                            \
+{                                                                                                    \
+    q7_t const *pSrcX;                                                                               \
+    q7x16_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q7_t const *) pX;                                                                       \
+    k = count >> 4;                                                                                  \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                              \
+        pY-=16;                                                                                      \
+        xVec = vldrbq_s8(&pSrcX[1]);                                                                 \
+        acc1 = vmladavaq(acc1, xVec, yVec);                                                          \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                                           \
+        acc0 = vmladavaq(acc0, xVec, yVec);                                                          \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    /* Loop with tail predication expected here  */                                                  \
+    k = count % 0x10U;                                                                               \
+    if (k > 0U)                                                                                      \
+    {                                                                                                \
+        mve_pred16_t p0 = vctp8q(k);                                                                 \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                              \
+        xVec = vldrbq_s8(&pSrcX[1]);                                                                 \
+        acc1 = vmladavaq_p(acc1, xVec, yVec, p0);                                                    \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                                           \
+        acc0 = vmladavaq_p(acc0, xVec, yVec, p0);                                                    \
+    }                                                                                                \
+    acc0 = __SSAT(acc0 >> 7, 8);                                                                     \
+    acc1 = __SSAT(acc1 >> 7, 8);                                                                     \
+}
+
+
+#define MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count)                              \
+{                                                                                                    \
+    q7_t const *pSrcX;                                                                               \
+    q7x16_t   xVec, yVec;                                                                            \
+    uint32_t    k;                                                                                   \
+                                                                                                     \
+    pSrcX = (q7_t const *) pX;                                                                       \
+    k = (count-1) >> 4;                                                                              \
+                                                                                                     \
+    while (k > 0U)                                                                                   \
+    {                                                                                                \
+        yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                              \
+        pY-=16;                                                                                      \
+        xVec = vldrbq_s8(&pSrcX[1]);                                                                 \
+        acc1 = vmladavaq(acc1, xVec, yVec);                                                          \
+        xVec = vld1q(pSrcX);  pSrcX += 16;                                                           \
+        acc0 = vmladavaq(acc0, xVec, yVec);                                                          \
+        /*  Decrement the loop counter   */                                                          \
+        k--;                                                                                         \
+    }                                                                                                \
+    k = (count - 1) % 0x10U;                                                                         \
+    /* use predication to finalize MAC sum */                                                        \
+    /* acc1 requires exact number of sample (count-1)  */                                            \
+    /* disable extra lanes in final MAC computation  */                                              \
+    mve_pred16_t p0 = vctp8q(k);                                                                     \
+    yVec = vldrbq_gather_offset_s8(pY, decrIdxVec);                                                  \
+    xVec = vldrbq_s8(&pSrcX[1]);                                                                     \
+    acc1 = vmladavaq_p(acc1, xVec, yVec, p0);                                                        \
+    /* acc0 requires 1 additional sample  (count) */                                                 \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */                                \
+    p0 = vctp8q(k+1);                                                                                \
+    xVec = vld1q(pSrcX);  pSrcX += 16;                                                               \
+    acc0 = vmladavaq_p(acc0, xVec, yVec, p0);                                                        \
+                                                                                                     \
+    acc0 = (acc0 >> 7);                                                                              \
+    acc1 = (acc1 >> 7);                                                                              \
+    acc0 = __SSAT(acc0, 8);                                                                          \
+    acc1 = __SSAT(acc1, 8);                                                                          \
+}
+
+#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */
+
+#ifdef   __cplusplus
+}
+#endif
+
+
+#endif /* _ARM_VEC_FILTERING_H_ */
diff --git a/Libraries/CMSIS/DSP/README.md b/Libraries/CMSIS/DSP/README.md
new file mode 100755
index 00000000..bca66280
--- /dev/null
+++ b/Libraries/CMSIS/DSP/README.md
@@ -0,0 +1,151 @@
+# README
+
+## How to use
+
+This document is explaining how to use cmake with CMSIS-DSP.
+(It is not official so not supported. The official way to build is to use the CMSIS-Pack).
+
+The example arm_variance_f32 in folder Examples/ARM/arm_variance_f32 has been modified to also
+support cmake and is used as an example in this document.
+
+### Generating the Makefiles
+
+To build example arm_variance_f32 with cmake, you need to create a build folder where the build will take place. Don't build in your source directory.
+
+You can create a build folder in Examples/ARM/arm_variance_f32
+
+Once you are in the build folder, you can use cmake to generate the Makefiles.
+
+The cmake command is requiring several arguments. For instance, to build for m7 with AC6 compiler:
+
+    cmake -DCMAKE_PREFIX_PATH="path to compiler (folder containing the bin folder)" \
+    -DCMAKE_TOOLCHAIN_FILE="../../../../armac6.cmake" \
+    -DARM_CPU="cortex-m7" \
+    -DROOT="../../../../../.." \
+    -DPLATFORM="FVP" \
+    -G "Unix Makefiles" ..
+  
+DCMAKE_PREFIX_PATH is the path to the compiler toolchain. This folder should contain the bin folder where are the compiler executables.
+
+ROOT is pointing to the root CMSIS folder (the one containing CMSIS and Device).
+
+PLATFORM is used to select the boot code for the example. In example below, Fast Model (FVP) is selected and the boot code for fast model will be used.
+
+CMAKE_TOOLCHAIN_FILE is selecting the toolchain (ac6, ac5 or gcc). The files are in CMSIS/DSP.
+
+ARM_CPU is selecting the core. The syntax must be the one recognized by the compiler.
+(So for instance different between AC5 and AC6).
+
+The final .. is the path to the directory containing the CMakeLists.txt of the variance example.
+Since the build folder is assumed to be created in arm_variance_examples then the path to CMakeLists.txt from the build folder is ..
+
+To build for A5, you need to change DCMAKE_TOOLCHAIN_FILE and ARM_CPU:
+
+    -DCMAKE_TOOLCHAIN_FILE=../../../../armac5.cmake 
+    -DARM_CPU="cortex-a5"
+
+To build for A5 with Neon acceleration, you need to add:
+  
+    -DNEON=ON
+
+### Building 
+
+Once cmake has generated the makefiles, you can use a GNU Make to build.
+
+    make VERBOSE=1
+
+### Running
+
+The generated executable can be run on a fast model. 
+For instance, if you built for m7, you could just do:
+
+    FVP_MPS2_Cortex-M7.exe -a arm_variance_example
+
+The final executable has no extension in the filename. 
+
+## Building only the CMSIS-DSP library
+
+If you want to build only the CMSIS-DSP library and don't link with any boot code then you'll need to write a specific cmake.
+
+Create a folder BuildCMSISOnly.
+
+Inside the folder, create a CMakeLists.txt with the following content:
+
+```cmake
+cmake_minimum_required (VERSION 3.14)
+
+# Define the project
+project (testcmsisdsp VERSION 0.1)
+
+# Define the path to CMSIS-DSP (ROOT is defined on command line when using cmake)
+set(DSP ${ROOT}/CMSIS/DSP)
+
+# Add DSP folder to module path
+list(APPEND CMAKE_MODULE_PATH ${DSP})
+
+########### 
+#
+# CMSIS DSP
+#
+
+# Load CMSIS-DSP definitions. Libraries will be built in bin_dsp
+add_subdirectory(${DSP}/Source bin_dsp)
+```
+
+Create a build folder inside the BuildCMSISOnly folder.
+
+Inside the build folder, type following cmake command
+
+    cmake -DROOT="path to CMSIS Root" \
+      -DCMAKE_PREFIX_PATH="path to compiler (folder containing the bin folder)" \
+      -DCMAKE_TOOLCHAIN_FILE="../../CMSIS_ROOT/CMSIS/DSP/armac6.cmake" \
+      -DARM_CPU="cortex-m7" \
+      -G "Unix Makefiles" ..
+
+Now you can make:
+
+    make VERBOSE=1
+
+When the build has finished, you'll have a bin_dsp folder inside your build folder.
+Inside bin_dsp, you'll have a folder per CMSIS-DSP Folder : BasicMathFunctions ...
+
+Inside each of those folders, you'll  have a library : libCMSISDSPBasicMath.a ...
+
+
+
+## Compilation symbols for tables
+
+Some new compilations symbols have been introduced to avoid including all the tables if they are not needed.
+
+If no new symbol is defined, everything will behave as usual. If ARM_DSP_CONFIG_TABLES is defined then the new symbols will be taken into account.
+
+It is strongly suggested to use the new Python script cmsisdspconfig.py to generate the -D options to use on the compiler command line.
+
+    pip install streamlit
+    streamlit run cmsisdspconfig.py
+
+If you use cmake, it is also easy since high level options are defined and they will select the right compilation symbols. 
+
+For instance, if you want to use the arm_rfft_fast_f32, in fft.cmake you'll see an option RFFT_FAST_F32_32.
+
+If you don't use cmake nor the Python script, you can just look at fft.cmake or interpol.cmake in Source to see which compilation symbols are needed.
+
+We see, for arm_rfft_fast_f32, that the following symbols need to be enabled :
+
+* ARM_TABLE_TWIDDLECOEF_F32_16 
+* ARM_TABLE_BITREVIDX_FLT_16
+* ARM_TABLE_TWIDDLECOEF_RFFT_F32_32
+* ARM_TABLE_TWIDDLECOEF_F32_16
+
+In addition to that, ARM_DSP_CONFIG_TABLES must be enabled and finally ARM_FFT_ALLOW_TABLES must also be defined.
+
+This last symbol is required because if no transform functions are included in the build, then by default all flags related to FFT tables are ignored.
+
+
+## Bit Reverse Tables CMSIS DSP
+
+It is a question coming often.
+
+It is now detailed [in this github issue](https://github.com/ARM-software/CMSIS_5/issues/858)
+
+Someone from the community has written a [Python script to help](https://gist.github.com/rosek86/d0d709852fddf36193071d7f61987bae)
\ No newline at end of file
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
index 4d9f60a0..7ade7478 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctions.c
@@ -1,63 +1,87 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        BasicMathFunctions.c
- * Description:  Combination of all basic math function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_abs_f32.c"
-#include "arm_abs_q15.c"
-#include "arm_abs_q31.c"
-#include "arm_abs_q7.c"
-#include "arm_add_f32.c"
-#include "arm_add_q15.c"
-#include "arm_add_q31.c"
-#include "arm_add_q7.c"
-#include "arm_dot_prod_f32.c"
-#include "arm_dot_prod_q15.c"
-#include "arm_dot_prod_q31.c"
-#include "arm_dot_prod_q7.c"
-#include "arm_mult_f32.c"
-#include "arm_mult_q15.c"
-#include "arm_mult_q31.c"
-#include "arm_mult_q7.c"
-#include "arm_negate_f32.c"
-#include "arm_negate_q15.c"
-#include "arm_negate_q31.c"
-#include "arm_negate_q7.c"
-#include "arm_offset_f32.c"
-#include "arm_offset_q15.c"
-#include "arm_offset_q31.c"
-#include "arm_offset_q7.c"
-#include "arm_scale_f32.c"
-#include "arm_scale_q15.c"
-#include "arm_scale_q31.c"
-#include "arm_scale_q7.c"
-#include "arm_shift_q15.c"
-#include "arm_shift_q31.c"
-#include "arm_shift_q7.c"
-#include "arm_sub_f32.c"
-#include "arm_sub_q15.c"
-#include "arm_sub_q31.c"
-#include "arm_sub_q7.c"
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BasicMathFunctions.c
+ * Description:  Combination of all basic math function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_abs_f32.c"
+#include "arm_abs_f64.c"
+#include "arm_abs_q15.c"
+#include "arm_abs_q31.c"
+#include "arm_abs_q7.c"
+#include "arm_add_f32.c"
+#include "arm_add_f64.c"
+#include "arm_add_q15.c"
+#include "arm_add_q31.c"
+#include "arm_add_q7.c"
+#include "arm_and_u16.c"
+#include "arm_and_u32.c"
+#include "arm_and_u8.c"
+#include "arm_dot_prod_f32.c"
+#include "arm_dot_prod_f64.c"
+#include "arm_dot_prod_q15.c"
+#include "arm_dot_prod_q31.c"
+#include "arm_dot_prod_q7.c"
+#include "arm_mult_f32.c"
+#include "arm_mult_f64.c"
+#include "arm_mult_q15.c"
+#include "arm_mult_q31.c"
+#include "arm_mult_q7.c"
+#include "arm_negate_f32.c"
+#include "arm_negate_f64.c"
+#include "arm_negate_q15.c"
+#include "arm_negate_q31.c"
+#include "arm_negate_q7.c"
+#include "arm_not_u16.c"
+#include "arm_not_u32.c"
+#include "arm_not_u8.c"
+#include "arm_offset_f32.c"
+#include "arm_offset_f64.c"
+#include "arm_offset_q15.c"
+#include "arm_offset_q31.c"
+#include "arm_offset_q7.c"
+#include "arm_or_u16.c"
+#include "arm_or_u32.c"
+#include "arm_or_u8.c"
+#include "arm_scale_f32.c"
+#include "arm_scale_f64.c"
+#include "arm_scale_q15.c"
+#include "arm_scale_q31.c"
+#include "arm_scale_q7.c"
+#include "arm_shift_q15.c"
+#include "arm_shift_q31.c"
+#include "arm_shift_q7.c"
+#include "arm_sub_f32.c"
+#include "arm_sub_f64.c"
+#include "arm_sub_q15.c"
+#include "arm_sub_q31.c"
+#include "arm_sub_q7.c"
+#include "arm_xor_u16.c"
+#include "arm_xor_u32.c"
+#include "arm_xor_u8.c"
+#include "arm_clip_f32.c"
+#include "arm_clip_q31.c"
+#include "arm_clip_q15.c"
+#include "arm_clip_q7.c"
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c
new file mode 100755
index 00000000..f185db48
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/BasicMathFunctionsF16.c
@@ -0,0 +1,37 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BasicMathFunctionsF16.c
+ * Description:  Combination of all basic math function f16 source files.
+ *
+ * $Date:        20. April 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_abs_f16.c"
+#include "arm_add_f16.c"
+#include "arm_dot_prod_f16.c"
+#include "arm_mult_f16.c"
+#include "arm_negate_f16.c"
+#include "arm_offset_f16.c"
+#include "arm_scale_f16.c"
+#include "arm_sub_f16.c"
+#include "arm_clip_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f16.c
new file mode 100755
index 00000000..0d6568b8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f16.c
@@ -0,0 +1,198 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_f16.c
+ * Description:  Floating-point vector absolute value
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+#include <math.h>
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicAbs Vector Absolute Value
+
+  Computes the absolute value of a vector on an element-by-element basis.
+
+  <pre>
+      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Floating-point vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_abs_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+    f16x8_t vec1;
+    f16x8_t res;
+
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+        /* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vabsq(vec1);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 8;
+        pDst += 8;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+
+
+    if (blkCnt > 0U)
+    {
+      /* C = |A| */
+      mve_pred16_t p0 = vctp16q(blkCnt);
+      vec1 = vld1q(pSrc);
+      vstrhq_p(pDst, vabsq(vec1), p0);
+    }
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_abs_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f16x8_t vec1;
+    f16x8_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+    	/* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q_f16(pSrc);
+        res = vabsq_f16(vec1);
+        vst1q_f16(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
+
+    *pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
+
+    *pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
+
+    *pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = (_Float16)fabsf((float32_t)*pSrc++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_FLOAT16_SUPPORTED */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
index 60db1414..1e67f4e3 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f32.c
@@ -1,146 +1,196 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_abs_f32.c
- * Description:  Floating-point vector absolute value
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include <math.h>
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicAbs Vector Absolute Value
-
-  Computes the absolute value of a vector on an element-by-element basis.
-
-  <pre>
-      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
-  </pre>
-
-  The functions support in-place computation allowing the source and
-  destination pointers to reference the same memory buffer.
-  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup BasicAbs
-  @{
- */
-
-/**
-  @brief         Floating-point vector absolute value.
-  @param[in]     pSrc       points to the input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_abs_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t vec1;
-    float32x4_t res;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        /* C = |A| */
-
-    	/* Calculate absolute values and then store the results in the destination buffer. */
-        vec1 = vld1q_f32(pSrc);
-        res = vabsq_f32(vec1);
-        vst1q_f32(pDst, res);
-
-        /* Increment pointers */
-        pSrc += 4;
-        pDst += 4;
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute and store result in destination buffer. */
-    *pDst++ = fabsf(*pSrc++);
-
-    *pDst++ = fabsf(*pSrc++);
-
-    *pDst++ = fabsf(*pSrc++);
-
-    *pDst++ = fabsf(*pSrc++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute and store result in destination buffer. */
-    *pDst++ = fabsf(*pSrc++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_f32.c
+ * Description:  Floating-point vector absolute value
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicAbs Vector Absolute Value
+
+  Computes the absolute value of a vector on an element-by-element basis.
+
+  <pre>
+      pDst[n] = abs(pSrc[n]),   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Floating-point vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_abs_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+    f32x4_t vec1;
+    f32x4_t res;
+
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+        /* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vabsq(vec1);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+
+    if (blkCnt > 0U)
+    {
+      /* C = |A| */
+      mve_pred16_t p0 = vctp32q(blkCnt);
+      vec1 = vld1q(pSrc);
+      vstrwq_p(pDst, vabsq(vec1), p0);
+    }
+
+}
+
+#else
+void arm_abs_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f32x4_t vec1;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+    	/* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vabsq_f32(vec1);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = fabsf(*pSrc++);
+
+    *pDst++ = fabsf(*pSrc++);
+
+    *pDst++ = fabsf(*pSrc++);
+
+    *pDst++ = fabsf(*pSrc++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = fabsf(*pSrc++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f64.c
new file mode 100644
index 00000000..04a79f7a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_f64.c
@@ -0,0 +1,74 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_f64.c
+ * Description:  Floating-point vector absolute value
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Floating-point vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_abs_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute and store result in destination buffer. */
+    *pDst++ = fabs(*pSrc++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
index 9aff1802..7c38ef51 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q15.c
@@ -1,132 +1,178 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_abs_q15.c
- * Description:  Q15 vector absolute value
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicAbs
-  @{
- */
-
-/**
-  @brief         Q15 vector absolute value.
-  @param[in]     pSrc       points to the input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
- */
-
-void arm_abs_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q15_t in;                                      /* Temporary input variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_q15.c
+ * Description:  Q15 vector absolute value
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Q15 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) will be saturated to the maximum allowable positive value 0x7FFF.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_abs_q15(
+    const q15_t * pSrc,
+    q15_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecSrc;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = |A|
+         * Calculate absolute and then store the results in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqabsq(vecSrc));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrhq_p(pDst, vqabsq(vecSrc), p0);
+    }
+}
+
+#else
+void arm_abs_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q15_t)__QSUB16(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q15_t) 0x8000) ? 0x7fff : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
index e9d027a9..7043aa0c 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q31.c
@@ -1,132 +1,208 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_abs_q31.c
- * Description:  Q31 vector absolute value
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicAbs
-  @{
- */
-
-/**
-  @brief         Q31 vector absolute value.
-  @param[in]     pSrc       points to the input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
- */
-
-void arm_abs_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t in;                                      /* Temporary variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_q31.c
+ * Description:  Q31 vector absolute value
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Q31 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) will be saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_abs_q31(
+    const q31_t * pSrc,
+    q31_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* Loop counters */
+    q31x4_t vecSrc;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = |A|
+         * Calculate absolute and then store the results in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqabsq(vecSrc));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * Advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+    }
+    /*
+     * Tail
+     */
+    blkCnt = blockSize & 3;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrwq_p(pDst, vqabsq(vecSrc), p0);
+    }
+}
+
+#else
+void arm_abs_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary variable */
+
+#if defined(ARM_MATH_NEON)
+    int32x4_t vec1;
+    int32x4_t res;
+
+    /* Compute 4 outputs at a time */  
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+        /* Calculate absolute and then store the results in the destination buffer. */
+
+        vec1 = vld1q_s32(pSrc);
+        res = vqabsq_s32(vec1);
+        vst1q_s32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the blockSize loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined (ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7fffffff) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q31_t)__QSUB(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == INT32_MIN) ? INT32_MAX : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined (ARM_MATH_MVEI) */
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
index 060b967a..bd79582e 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_abs_q7.c
@@ -1,134 +1,180 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_abs_q7.c
- * Description:  Q7 vector absolute value
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicAbs
-  @{
- */
-
-/**
-  @brief         Q7 vector absolute value.
-  @param[in]     pSrc       points to the input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Conditions for optimum performance
-                   Input and output buffers should be aligned by 32-bit
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
- */
-
-void arm_abs_q7(
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q7_t in;                                       /* Temporary input variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q7_t)__QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = |A| */
-
-    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (in > 0) ? in : (q7_t) __QSUB(0, in);
-#else
-    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAbs group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_abs_q7.c
+ * Description:  Q7 vector absolute value
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAbs
+  @{
+ */
+
+/**
+  @brief         Q7 vector absolute value.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Conditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q7 value -1 (0x80) will be saturated to the maximum allowable positive value 0x7F.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_abs_q7(
+    const q7_t * pSrc,
+    q7_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = |A|
+         * Calculate absolute and then store the results in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqabsq(vecSrc));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 16;
+        pDst += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrbq_p(pDst, vqabsq(vecSrc), p0);
+    }
+}
+
+#else
+void arm_abs_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q7_t in;                                       /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t)__QSUB8(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = |A| */
+
+    /* Calculate absolute of input (if -1 then saturated to 0x7f) and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (in > 0) ? in : (q7_t) __QSUB8(0, in);
+#else
+    *pDst++ = (in > 0) ? in : ((in == (q7_t) 0x80) ? (q7_t) 0x7f : -in);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicAbs group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f16.c
new file mode 100755
index 00000000..2b2ae8f1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f16.c
@@ -0,0 +1,169 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_f16.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicAdd Vector Addition
+
+  Element-by-element addition of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Floating-point vector addition.
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_add_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+    f16x8_t vec1;
+    f16x8_t vec2;
+    f16x8_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+        /* Add and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrcA);
+        vec2 = vld1q(pSrcB);
+        res = vaddq(vec1, vec2);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8; 
+        pDst += 8;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+
+    if (blkCnt > 0U)
+    {
+      /* C = A + B */
+      mve_pred16_t p0 = vctp16q(blkCnt);
+      vec1 = vld1q(pSrcA);
+      vec2 = vld1q(pSrcB);
+      vstrhq_p(pDst, vaddq(vec1,vec2), p0);
+    }
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_add_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
+    *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
+    *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
+    *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrcA++) + (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_FLOAT16_SUPPORTED) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
index 8a485fa0..9741e4a6 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f32.c
@@ -1,145 +1,199 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_add_f32.c
- * Description:  Floating-point vector addition
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicAdd Vector Addition
-
-  Element-by-element addition of two vectors.
-
-  <pre>
-      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
-  </pre>
-
-  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup BasicAdd
-  @{
- */
-
-/**
-  @brief         Floating-point vector addition.
-  @param[in]     pSrcA      points to first input vector
-  @param[in]     pSrcB      points to second input vector
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_add_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t vec1;
-    float32x4_t vec2;
-    float32x4_t res;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        /* C = A + B */
-
-    	/* Add and then store the results in the destination buffer. */
-        vec1 = vld1q_f32(pSrcA);
-        vec2 = vld1q_f32(pSrcB);
-        res = vaddq_f32(vec1, vec2);
-        vst1q_f32(pDst, res);
-
-        /* Increment pointers */
-        pSrcA += 4;
-        pSrcB += 4; 
-        pDst += 4;
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-    /* Add and store result in destination buffer. */
-    *pDst++ = (*pSrcA++) + (*pSrcB++);
-    *pDst++ = (*pSrcA++) + (*pSrcB++);
-    *pDst++ = (*pSrcA++) + (*pSrcB++);
-    *pDst++ = (*pSrcA++) + (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-    /* Add and store result in destination buffer. */
-    *pDst++ = (*pSrcA++) + (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_f32.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicAdd Vector Addition
+
+  Element-by-element addition of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Floating-point vector addition.
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_add_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+    f32x4_t vec1;
+    f32x4_t vec2;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+        /* Add and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrcA);
+        vec2 = vld1q(pSrcB);
+        res = vaddq(vec1, vec2);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+    if (blkCnt > 0U)
+    {
+      /* C = A + B */
+      mve_pred16_t p0 = vctp32q(blkCnt);
+      vec1 = vld1q(pSrcA);
+      vec2 = vld1q(pSrcB);
+      vstrwq_p(pDst, vaddq(vec1,vec2), p0);
+    }
+
+}
+
+#else
+void arm_add_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f32x4_t vec1;
+    f32x4_t vec2;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+    	/* Add and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vaddq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f64.c
new file mode 100644
index 00000000..2d772339
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_f64.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Floating-point vector addition.
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_add_f64(
+  const float64_t * pSrcA,
+  const float64_t * pSrcB,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) + (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
index 1363b760..f7725ef5 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q15.c
@@ -1,126 +1,176 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_add_q15.c
- * Description:  Q15 vector addition
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicAdd
-  @{
- */
-
-/**
-  @brief         Q15 vector addition.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-void arm_add_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t inA1, inA2;
-  q31_t inB1, inB2;
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-#if defined (ARM_MATH_DSP)
-    /* read 2 times 2 samples at a time from sourceA */
-    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
-    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
-    /* read 2 times 2 samples at a time from sourceB */
-    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
-    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
-
-    /* Add and store 2 times 2 samples at a time */
-    write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
-    write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
-#else
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-    /* Add and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
-#else
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_q15.c
+ * Description:  Q15 vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Q15 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_add_q15(
+    const q15_t * pSrcA,
+    const q15_t * pSrcB,
+    q15_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecA;
+    q15x8_t vecB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A + B
+         * Add and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqaddq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 8;
+        pSrcB  += 8;
+        pDst   += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrhq_p(pDst, vqaddq(vecA, vecB), p0);
+    }
+}
+
+#else
+void arm_add_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t inB1, inB2;
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 times 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
+
+    /* Add and store 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, __QADD16(inA1, inB1));
+    write_q15x2_ia (&pDst, __QADD16(inA2, inB2));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QADD16(*pSrcA++, *pSrcB++);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ + *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
index 2f8226d6..a6783e7f 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q31.c
@@ -1,108 +1,159 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_add_q31.c
- * Description:  Q31 vector addition
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicAdd
-  @{
- */
-
-/**
-  @brief         Q31 vector addition.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
- */
-
-void arm_add_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-    /* Add and store result in destination buffer. */
-    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
-    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
-    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
-    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-    /* Add and store result in destination buffer. */
-    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_q31.c
+ * Description:  Q31 vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Q31 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_add_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;   
+    q31x4_t vecA;
+    q31x4_t vecB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A + B
+         * Add and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqaddq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 4;
+        pSrcB  += 4;
+        pDst   += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrwq_p(pDst, vqaddq(vecA, vecB), p0);
+    }
+}
+
+#else
+void arm_add_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = __QADD(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+#endif /* defined(ARM_MATH_MVEI) */
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
index ac57c35b..07dfbd5c 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_add_q7.c
@@ -1,109 +1,159 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_add_q7.c
- * Description:  Q7 vector addition
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicAdd
-  @{
- */
-
-/**
-  @brief         Q7 vector addition.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
- */
-
-void arm_add_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-#if defined (ARM_MATH_DSP)
-    /* Add and store result in destination buffer (4 samples at a time). */
-    write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
-#else
-    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
-    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
-    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
-    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + B */
-
-    /* Add and store result in destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicAdd group
- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_add_q7.c
+ * Description:  Q7 vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicAdd
+  @{
+ */
+
+/**
+  @brief         Q7 vector addition.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_add_q7(
+    const q7_t * pSrcA,
+    const q7_t * pSrcB,
+    q7_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecA;
+    q7x16_t vecB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A + B
+         * Add and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqaddq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 16;
+        pSrcB  += 16;
+        pDst   += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrbq_p(pDst, vqaddq(vecA, vecB), p0);
+    }
+}
+#else
+void arm_add_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+#if defined (ARM_MATH_DSP)
+    /* Add and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QADD8 (read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT ((q15_t) *pSrcA++ + *pSrcB++, 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + B */
+
+    /* Add and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ + *pSrcB++, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+/**
+  @} end of BasicAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c
new file mode 100644
index 00000000..7a7427dc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u16.c
@@ -0,0 +1,137 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_and_u16.c
+ * Description:  uint16_t bitwise AND
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup And Vector bitwise AND
+
+  Compute the logical bitwise AND.
+
+  There are separate functions for uint32_t, uint16_t, and uint7_t data types.
+ */
+
+/**
+  @addtogroup And
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise AND of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_and_u16(
+    const uint16_t * pSrcA,
+    const uint16_t * pSrcB,
+          uint16_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t vecSrcA, vecSrcB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, vandq_u16(vecSrcA, vecSrcB) );
+
+        pSrcA += 8;
+        pSrcB += 8;
+        pDst  += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrhq_p(pDst, vandq_u16(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t vecA, vecB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u16(pSrcA);
+        vecB = vld1q_u16(pSrcB);
+
+        vst1q_u16(pDst, vandq_u16(vecA, vecB) );
+
+        pSrcA += 8;
+        pSrcB += 8;
+        pDst  += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)&(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of And group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c
new file mode 100644
index 00000000..ddf838c2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u32.c
@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_and_u32.c
+ * Description:  uint32_t bitwise AND
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup And
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise AND of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_and_u32(
+    const uint32_t * pSrcA,
+    const uint32_t * pSrcB,
+          uint32_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t vecSrcA, vecSrcB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, vandq_u32(vecSrcA, vecSrcB) );
+
+        pSrcA += 4;
+        pSrcB += 4;
+        pDst  += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrwq_p(pDst, vandq_u32(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t vecA, vecB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u32(pSrcA);
+        vecB = vld1q_u32(pSrcB);
+
+        vst1q_u32(pDst, vandq_u32(vecA, vecB) );
+
+        pSrcA += 4;
+        pSrcB += 4;
+        pDst  += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)&(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of And group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c
new file mode 100644
index 00000000..bd1a1abe
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_and_u8.c
@@ -0,0 +1,130 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_and_u8.c
+ * Description:  uint8_t bitwise AND
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+
+/**
+  @addtogroup And
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise AND of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_and_u8(
+    const uint8_t * pSrcA,
+    const uint8_t * pSrcB,
+          uint8_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t vecSrcA, vecSrcB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, vandq_u8(vecSrcA, vecSrcB) );
+
+        pSrcA += 16;
+        pSrcB += 16;
+        pDst  += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrbq_p(pDst, vandq_u8(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t vecA, vecB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u8(pSrcA);
+        vecB = vld1q_u8(pSrcB);
+
+        vst1q_u8(pDst, vandq_u8(vecA, vecB) );
+
+        pSrcA += 16;
+        pSrcB += 16;
+        pDst  += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)&(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of And group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f16.c
new file mode 100755
index 00000000..f784a238
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f16.c
@@ -0,0 +1,141 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_clip_f16.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+
+/**
+  @addtogroup BasicClip
+  @{
+ */
+
+/**
+  @brief         Elementwise floating-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_clip_f16(const float16_t * pSrc, 
+  float16_t * pDst, 
+  float16_t low, 
+  float16_t high, 
+  uint32_t numSamples)
+{
+    uint32_t  blkCnt;
+    f16x8_t curVec0, curVec1;
+    f16x8_t vecLow, vecHigh;
+
+    vecLow = vdupq_n_f16(low);
+    vecHigh = vdupq_n_f16(high);
+
+    curVec0 = vld1q(pSrc);
+    pSrc += 8;
+    /*
+     * unrolled x 2 to allow
+     * vldr/vstr/vmin/vmax
+     * stall free interleaving
+     */
+    blkCnt = numSamples >> 4;
+    while (blkCnt--)
+    {
+        curVec0 = vmaxnmq(curVec0, vecLow);
+        curVec1 = vld1q(pSrc);
+        pSrc += 8;
+        curVec0 = vminnmq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 8;
+        curVec1 = vmaxnmq(curVec1, vecLow);
+        curVec0 = vld1q(pSrc);
+        pSrc += 8;
+        curVec1 = vminnmq(curVec1, vecHigh);
+        vst1q(pDst, curVec1);
+        pDst += 8;
+    }
+    /*
+     * Tail handling
+     */
+    blkCnt = numSamples - ((numSamples >> 4) << 4);
+    if (blkCnt >= 8)
+    {
+        curVec0 = vmaxnmq(curVec0, vecLow);
+        curVec0 = vminnmq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 8;
+        curVec0 = vld1q(pSrc);
+        pSrc += 8;
+    }
+
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt & 7);
+        curVec0 = vmaxnmq(curVec0, vecLow);
+        curVec0 = vminnmq(curVec0, vecHigh);
+        vstrhq_p(pDst, curVec0, p0);
+    }
+}
+
+#else
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+void arm_clip_f16(const float16_t * pSrc, 
+  float16_t * pDst, 
+  float16_t low, 
+  float16_t high, 
+  uint32_t numSamples)
+{
+    for (uint32_t i = 0; i < numSamples; i++)
+    {                                        
+        if ((_Float16)pSrc[i] > (_Float16)high)                  
+            pDst[i] = high;                  
+        else if ((_Float16)pSrc[i] < (_Float16)low)              
+            pDst[i] = low;                   
+        else                                 
+            pDst[i] = pSrc[i];               
+    }
+}
+#endif /* defined(ARM_FLOAT16_SUPPORTED */
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+  @} end of BasicClip group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f32.c
new file mode 100755
index 00000000..4cc27994
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_f32.c
@@ -0,0 +1,144 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_clip_f32.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicClip Elementwise clipping
+
+  Element-by-element clipping of a value.
+
+  The value is constrained between 2 bounds.
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicClip
+  @{
+ */
+
+/**
+  @brief         Elementwise floating-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_clip_f32(const float32_t * pSrc, 
+  float32_t * pDst, 
+  float32_t low, 
+  float32_t high, 
+  uint32_t numSamples)
+{
+    uint32_t  blkCnt;
+    f32x4_t curVec0, curVec1;
+    f32x4_t vecLow, vecHigh;
+
+    vecLow = vdupq_n_f32(low);
+    vecHigh = vdupq_n_f32(high);
+
+    curVec0 = vld1q(pSrc);
+    pSrc += 4;
+    /*
+     * unrolled x 2 to allow
+     * vldr/vstr/vmin/vmax
+     * stall free interleaving
+     */
+    blkCnt = numSamples >> 3;
+    while (blkCnt--)
+    {
+        curVec0 = vmaxnmq(curVec0, vecLow);
+        curVec1 = vld1q(pSrc);
+        pSrc += 4;
+        curVec0 = vminnmq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 4;
+        curVec1 = vmaxnmq(curVec1, vecLow);
+        curVec0 = vld1q(pSrc);
+        pSrc += 4;
+        curVec1 = vminnmq(curVec1, vecHigh);
+        vst1q(pDst, curVec1);
+        pDst += 4;
+    }
+    /*
+     * Tail handling
+     */
+    blkCnt = numSamples - ((numSamples >> 3) << 3);
+    if (blkCnt >= 4)
+    {
+        curVec0 = vmaxnmq(curVec0, vecLow);
+        curVec0 = vminnmq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 4;
+        curVec0 = vld1q(pSrc);
+        pSrc += 4;
+    }
+
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt & 3);
+        curVec0 = vmaxnmq(curVec0, vecLow);
+        curVec0 = vminnmq(curVec0, vecHigh);
+        vstrwq_p(pDst, curVec0, p0);
+    }
+}
+
+#else
+void arm_clip_f32(const float32_t * pSrc, 
+  float32_t * pDst, 
+  float32_t low, 
+  float32_t high, 
+  uint32_t numSamples)
+{
+    uint32_t i;
+    for (i = 0; i < numSamples; i++)
+    {                                        
+        if (pSrc[i] > high)                  
+            pDst[i] = high;                  
+        else if (pSrc[i] < low)              
+            pDst[i] = low;                   
+        else                                 
+            pDst[i] = pSrc[i];               
+    }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicClip group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q15.c
new file mode 100755
index 00000000..0d67c376
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q15.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_clip_q15.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+
+/**
+  @addtogroup BasicClip
+  @{
+ */
+
+/**
+  @brief         Elementwise fixed-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_clip_q15(const q15_t * pSrc, 
+  q15_t * pDst, 
+  q15_t low, 
+  q15_t high, 
+  uint32_t numSamples)
+{
+    uint32_t  blkCnt;
+    q15x8_t curVec0, curVec1;
+    q15x8_t vecLow, vecHigh;
+
+    vecLow = vdupq_n_s16(low);
+    vecHigh = vdupq_n_s16(high);
+
+    curVec0 = vld1q(pSrc);
+    pSrc += 8;
+    /*
+     * unrolled x 2 to allow
+     * vldr/vstr/vmin/vmax
+     * stall free interleaving
+     */
+    blkCnt = numSamples >> 4;
+    while (blkCnt--)
+    {
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec1 = vld1q(pSrc);
+        pSrc += 8;
+        curVec0 = vminq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 8;
+        curVec1 = vmaxq(curVec1, vecLow);
+        curVec0 = vld1q(pSrc);
+        pSrc += 8;
+        curVec1 = vminq(curVec1, vecHigh);
+        vst1q(pDst, curVec1);
+        pDst += 8;
+    }
+    /*
+     * Tail handling
+     */
+    blkCnt = numSamples - ((numSamples >> 4) << 4);
+    if (blkCnt >= 8)
+    {
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec0 = vminq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 8;
+        curVec0 = vld1q(pSrc);
+        pSrc += 8;
+    }
+
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt & 7);
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec0 = vminq(curVec0, vecHigh);
+        vstrhq_p(pDst, curVec0, p0);
+    }
+}
+
+#else
+void arm_clip_q15(const q15_t * pSrc, 
+  q15_t * pDst, 
+  q15_t low, 
+  q15_t high, 
+  uint32_t numSamples)
+{
+    uint32_t i;
+    for (i = 0; i < numSamples; i++)
+    {                                        
+        if (pSrc[i] > high)                  
+            pDst[i] = high;                  
+        else if (pSrc[i] < low)              
+            pDst[i] = low;                   
+        else                                 
+            pDst[i] = pSrc[i];               
+    }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicClip group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q31.c
new file mode 100755
index 00000000..72b80d38
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q31.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_clip_q31.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+
+/**
+  @addtogroup BasicClip
+  @{
+ */
+
+/**
+  @brief         Elementwise fixed-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_clip_q31(const q31_t * pSrc, 
+  q31_t * pDst, 
+  q31_t low, 
+  q31_t high, 
+  uint32_t numSamples)
+{
+    uint32_t  blkCnt;
+    q31x4_t curVec0, curVec1;
+    q31x4_t vecLow, vecHigh;
+
+    vecLow = vdupq_n_s32(low);
+    vecHigh = vdupq_n_s32(high);
+
+    curVec0 = vld1q(pSrc);
+    pSrc += 4;
+    /*
+     * unrolled x 2 to allow
+     * vldr/vstr/vmin/vmax
+     * stall free interleaving
+     */
+    blkCnt = numSamples >> 3;
+    while (blkCnt--)
+    {
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec1 = vld1q(pSrc);
+        pSrc += 4;
+        curVec0 = vminq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 4;
+        curVec1 = vmaxq(curVec1, vecLow);
+        curVec0 = vld1q(pSrc);
+        pSrc += 4;
+        curVec1 = vminq(curVec1, vecHigh);
+        vst1q(pDst, curVec1);
+        pDst += 4;
+    }
+    /*
+     * Tail handling
+     */
+    blkCnt = numSamples - ((numSamples >> 3) << 3);
+    if (blkCnt >= 4)
+    {
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec0 = vminq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 4;
+        curVec0 = vld1q(pSrc);
+        pSrc += 4;
+    }
+
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt & 3);
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec0 = vminq(curVec0, vecHigh);
+        vstrwq_p(pDst, curVec0, p0);
+    }
+}
+
+#else
+void arm_clip_q31(const q31_t * pSrc, 
+  q31_t * pDst, 
+  q31_t low, 
+  q31_t high, 
+  uint32_t numSamples)
+{
+    uint32_t i;
+    for (i = 0; i < numSamples; i++)
+    {                                        
+        if (pSrc[i] > high)                  
+            pDst[i] = high;                  
+        else if (pSrc[i] < low)              
+            pDst[i] = low;                   
+        else                                 
+            pDst[i] = pSrc[i];               
+    }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicClip group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q7.c
new file mode 100755
index 00000000..a41e0c91
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_clip_q7.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_clip_q7.c
+ * Description:  Floating-point vector addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+
+/**
+  @addtogroup BasicClip
+  @{
+ */
+
+/**
+  @brief         Elementwise fixed-point clipping
+  @param[in]     pSrc          points to input values
+  @param[out]    pDst          points to output clipped values
+  @param[in]     low           lower bound
+  @param[in]     high          higher bound
+  @param[in]     numSamples    number of samples to clip
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_clip_q7(const q7_t * pSrc, 
+  q7_t * pDst, 
+  q7_t low, 
+  q7_t high, 
+  uint32_t numSamples)
+{
+    uint32_t  blkCnt;
+    q7x16_t curVec0, curVec1;
+    q7x16_t vecLow, vecHigh;
+
+    vecLow = vdupq_n_s8(low);
+    vecHigh = vdupq_n_s8(high);
+
+    curVec0 = vld1q(pSrc);
+    pSrc += 16;
+    /*
+     * unrolled x 2 to allow
+     * vldr/vstr/vmin/vmax
+     * stall free interleaving
+     */
+    blkCnt = numSamples >> 5;
+    while (blkCnt--)
+    {
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec1 = vld1q(pSrc);
+        pSrc += 16;
+        curVec0 = vminq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 16;
+        curVec1 = vmaxq(curVec1, vecLow);
+        curVec0 = vld1q(pSrc);
+        pSrc += 16;
+        curVec1 = vminq(curVec1, vecHigh);
+        vst1q(pDst, curVec1);
+        pDst += 16;
+    }
+    /*
+     * Tail handling
+     */
+    blkCnt = numSamples - ((numSamples >> 5) << 5);
+    if (blkCnt >= 16)
+    {
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec0 = vminq(curVec0, vecHigh);
+        vst1q(pDst, curVec0);
+        pDst += 16;
+        curVec0 = vld1q(pSrc);
+        pSrc += 16;
+    }
+
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt & 0xf);
+        curVec0 = vmaxq(curVec0, vecLow);
+        curVec0 = vminq(curVec0, vecHigh);
+        vstrbq_p(pDst, curVec0, p0);
+    }
+}
+
+#else
+void arm_clip_q7(const q7_t * pSrc, 
+  q7_t * pDst, 
+  q7_t low, 
+  q7_t high, 
+  uint32_t numSamples)
+{
+    uint32_t i;
+    for (i = 0; i < numSamples; i++)
+    {                                        
+        if (pSrc[i] > high)                  
+            pDst[i] = high;                  
+        else if (pSrc[i] < low)              
+            pDst[i] = low;                   
+        else                                 
+            pDst[i] = pSrc[i];               
+    }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicClip group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f16.c
new file mode 100755
index 00000000..55c88dfc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f16.c
@@ -0,0 +1,184 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_f16.c
+ * Description:  Floating-point dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicDotProd Vector Dot Product
+
+  Computes the dot product of two vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  <pre>
+      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of floating-point vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+void arm_dot_prod_f16(
+    const float16_t * pSrcA,
+    const float16_t * pSrcB,
+    uint32_t    blockSize,
+    float16_t * result)
+{
+    f16x8_t vecA, vecB;
+    f16x8_t vecSum;
+    uint32_t blkCnt; 
+    float16_t sum = 0.0f;  
+    vecSum = vdupq_n_f16(0.0f);
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
+         * Calculate dot product and then store the result in a temporary buffer.
+         * and advance vector source and destination pointers
+         */
+        vecA = vld1q(pSrcA);
+        pSrcA += 8;
+        
+        vecB = vld1q(pSrcB);
+        pSrcB += 8;
+
+        vecSum = vfmaq(vecSum, vecA, vecB);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt --;
+    }
+
+
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vecSum = vfmaq_m(vecSum, vecA, vecB, p0);
+    }
+
+    sum = vecAddAcrossF16Mve(vecSum);
+
+    /* Store result in destination buffer */
+    *result = sum;
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_dot_prod_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        uint32_t blockSize,
+        float16_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        _Float16 sum = 0.0f;                          /* Temporary return variable */
+
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer */
+  *result = sum;
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
index 41ec12e2..62b86578 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f32.c
@@ -1,163 +1,228 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dot_prod_f32.c
- * Description:  Floating-point dot product
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicDotProd Vector Dot Product
-
-  Computes the dot product of two vectors.
-  The vectors are multiplied element-by-element and then summed.
-
-  <pre>
-      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
-  </pre>
-
-  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup BasicDotProd
-  @{
- */
-
-/**
-  @brief         Dot product of floating-point vectors.
-  @param[in]     pSrcA      points to the first input vector.
-  @param[in]     pSrcB      points to the second input vector.
-  @param[in]     blockSize  number of samples in each vector.
-  @param[out]    result     output result returned here.
-  @return        none
- */
-
-void arm_dot_prod_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        uint32_t blockSize,
-        float32_t * result)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t sum = 0.0f;                          /* Temporary return variable */
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t vec1;
-    float32x4_t vec2;
-    float32x4_t res;
-    float32x4_t accum = vdupq_n_f32(0);    
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    vec1 = vld1q_f32(pSrcA);
-    vec2 = vld1q_f32(pSrcB);
-
-    while (blkCnt > 0U)
-    {
-        /* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */
-        /* Calculate dot product and then store the result in a temporary buffer. */
-        
-	accum = vmlaq_f32(accum, vec1, vec2);
-	
-        /* Increment pointers */
-        pSrcA += 4;
-        pSrcB += 4; 
-
-        vec1 = vld1q_f32(pSrcA);
-        vec2 = vld1q_f32(pSrcB);
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-    
-#if __aarch64__
-    sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)));
-#else
-    sum = (vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)))[0] + (vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)))[1];
-#endif    
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-    /* Calculate dot product and store result in a temporary buffer. */
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-    /* Calculate dot product and store result in a temporary buffer. */
-    sum += (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store result in destination buffer */
-  *result = sum;
-}
-
-/**
-  @} end of BasicDotProd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_f32.c
+ * Description:  Floating-point dot product
+ *
+ * $Date:        05 October 2021
+ * $Revision:    V1.9.1
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicDotProd Vector Dot Product
+
+  Computes the dot product of two vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  <pre>
+      sum = pSrcA[0]*pSrcB[0] + pSrcA[1]*pSrcB[1] + ... + pSrcA[blockSize-1]*pSrcB[blockSize-1]
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of floating-point vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+void arm_dot_prod_f32(
+    const float32_t * pSrcA,
+    const float32_t * pSrcB,
+    uint32_t    blockSize,
+    float32_t * result)
+{
+    f32x4_t vecA, vecB;
+    f32x4_t vecSum;
+    uint32_t blkCnt; 
+    float32_t sum = 0.0f;  
+    vecSum = vdupq_n_f32(0.0f);
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
+         * Calculate dot product and then store the result in a temporary buffer.
+         * and advance vector source and destination pointers
+         */
+        vecA = vld1q(pSrcA);
+        pSrcA += 4;
+        
+        vecB = vld1q(pSrcB);
+        pSrcB += 4;
+
+        vecSum = vfmaq(vecSum, vecA, vecB);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt --;
+    }
+
+
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vecSum = vfmaq_m(vecSum, vecA, vecB, p0);
+    }
+
+    sum = vecAddAcrossF32Mve(vecSum);
+
+    /* Store result in destination buffer */
+    *result = sum;
+
+}
+
+#else
+
+void arm_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t blockSize,
+        float32_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary return variable */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f32x4_t vec1;
+    f32x4_t vec2;
+    f32x4_t accum = vdupq_n_f32(0);   
+#if !defined(__aarch64__)
+    f32x2_t tmp = vdup_n_f32(0); 
+#endif   
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    vec1 = vld1q_f32(pSrcA);
+    vec2 = vld1q_f32(pSrcB);
+
+    while (blkCnt > 0U)
+    {
+        /* C = A[0]*B[0] + A[1]*B[1] + A[2]*B[2] + ... + A[blockSize-1]*B[blockSize-1] */
+        /* Calculate dot product and then store the result in a temporary buffer. */
+        
+	      accum = vmlaq_f32(accum, vec1, vec2);
+	
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+    
+#if defined(__aarch64__)
+    sum = vpadds_f32(vpadd_f32(vget_low_f32(accum), vget_high_f32(accum)));
+#else
+    tmp = vpadd_f32(vget_low_f32(accum), vget_high_f32(accum));
+    sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
+
+#endif    
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer */
+  *result = sum;
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f64.c
new file mode 100644
index 00000000..a4cd07cc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_f64.c
@@ -0,0 +1,78 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_f64.c
+ * Description:  Floating-point dot product
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of floating-point vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
+ */
+
+void arm_dot_prod_f64(
+  const float64_t * pSrcA,
+  const float64_t * pSrcB,
+        uint32_t blockSize,
+        float64_t * result)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+  float64_t sum = 0.;                            /* Temporary return variable */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer */
+  *result = sum;
+}
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
index 2fa30fca..3aa1cb3c 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q15.c
@@ -1,120 +1,172 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dot_prod_q15.c
- * Description:  Q15 dot product
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicDotProd
-  @{
- */
-
-/**
-  @brief         Dot product of Q15 vectors.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[in]     blockSize  number of samples in each vector
-  @param[out]    result     output result returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
-                   results are added to a 64-bit accumulator in 34.30 format.
-                   Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
-                   there is no risk of overflow.
-                   The return result is in 34.30 format.
- */
-
-void arm_dot_prod_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        uint32_t blockSize,
-        q63_t * result)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Temporary return variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-#if defined (ARM_MATH_DSP)
-    /* Calculate dot product and store result in a temporary buffer. */
-    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
-    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
-#else
-    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
-    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
-    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
-    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-    /* Calculate dot product and store result in a temporary buffer. */
-//#if defined (ARM_MATH_DSP)
-//    sum  = __SMLALD(*pSrcA++, *pSrcB++, sum);
-//#else
-    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
-//#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store result in destination buffer in 34.30 format */
-  *result = sum;
-}
-
-/**
-  @} end of BasicDotProd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_q15.c
+ * Description:  Q15 dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of Q15 vectors.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[in]     blockSize  number of samples in each vector
+  @param[out]    result     output result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.15 x 1.15 = 2.30 format and these
+                   results are added to a 64-bit accumulator in 34.30 format.
+                   Nonsaturating additions are used and given that there are 33 guard bits in the accumulator
+                   there is no risk of overflow.
+                   The return result is in 34.30 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_dot_prod_q15(
+    const q15_t * pSrcA,
+    const q15_t * pSrcB,
+    uint32_t blockSize,
+    q63_t * result)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecA;
+    q15x8_t vecB;
+    q63_t     sum = 0LL;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
+         * Calculate dot product and then store the result in a temporary buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        sum = vmlaldavaq(sum, vecA, vecB);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA += 8;
+        pSrcB += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        sum = vmlaldavaq_p(sum, vecA, vecB, p0);
+    }
+
+    *result = sum;
+}
+
+#else
+void arm_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary return variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+#if defined (ARM_MATH_DSP)
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+    sum = __SMLALD(read_q15x2_ia ((q15_t **) &pSrcA), read_q15x2_ia ((q15_t **) &pSrcB), sum);
+#else
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+//    sum  = __SMLALD(*pSrcA++, *pSrcB++, sum);
+//#else
+    sum += (q63_t)((q31_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer in 34.30 format */
+  *result = sum;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
index 954e0bd7..b85da379 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q31.c
@@ -1,115 +1,174 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dot_prod_q31.c
- * Description:  Q31 dot product
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicDotProd
-  @{
- */
-
-/**
-  @brief         Dot product of Q31 vectors.
-  @param[in]     pSrcA      points to the first input vector.
-  @param[in]     pSrcB      points to the second input vector.
-  @param[in]     blockSize  number of samples in each vector.
-  @param[out]    result     output result returned here.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
-                   are truncated to 2.48 format by discarding the lower 14 bits.
-                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
-                   There are 15 guard bits in the accumulator and there is no risk of overflow as long as
-                   the length of the vectors is less than 2^16 elements.
-                   The return result is in 16.48 format.
- */
-
-void arm_dot_prod_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        uint32_t blockSize,
-        q63_t * result)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Temporary return variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-    /* Calculate dot product and store result in a temporary buffer. */
-    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
-
-    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
-
-    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
-
-    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-    /* Calculate dot product and store result in a temporary buffer. */
-    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store result in destination buffer in 16.48 format */
-  *result = sum;
-}
-
-/**
-  @} end of BasicDotProd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_q31.c
+ * Description:  Q31 dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of Q31 vectors.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @param[out]    result     output result returned here.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.31 x 1.31 = 2.62 format and these
+                   are truncated to 2.48 format by discarding the lower 14 bits.
+                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+                   There are 15 guard bits in the accumulator and there is no risk of overflow as long as
+                   the length of the vectors is less than 2^16 elements.
+                   The return result is in 16.48 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_dot_prod_q31(
+    const q31_t * pSrcA,
+    const q31_t * pSrcB,
+    uint32_t blockSize,
+    q63_t * result)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecA;
+    q31x4_t vecB;
+    q63_t     sum = 0LL;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
+         * Calculate dot product and then store the result in a temporary buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        sum = vrmlaldavhaq(sum, vecA, vecB);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA += 4;
+        pSrcB += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        sum = vrmlaldavhaq_p(sum, vecA, vecB, p0);
+    }
+
+    /*
+     * vrmlaldavhaq provides extra intermediate accumulator headroom.
+     * limiting the need of intermediate scaling
+     * Scalar variant uses 2.48 accu format by right shifting accumulators by 14.
+     * 16.48 output conversion is performed outside the loop by scaling accu. by 6
+     */
+    *result = asrl(sum, (14 - 8));
+}
+
+#else
+void arm_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t blockSize,
+        q63_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary return variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+    sum += ((q63_t) *pSrcA++ * *pSrcB++) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer in 16.48 format */
+  *result = sum;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
index e8ba22be..268be604 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_dot_prod_q7.c
@@ -1,139 +1,191 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dot_prod_q7.c
- * Description:  Q7 dot product
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicDotProd
-  @{
- */
-
-/**
-  @brief         Dot product of Q7 vectors.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[in]     blockSize  number of samples in each vector
-  @param[out]    result     output result returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
-                   results are added to an accumulator in 18.14 format.
-                   Nonsaturating additions are used and there is no danger of wrap around as long as
-                   the vectors are less than 2^18 elements long.
-                   The return result is in 18.14 format.
- */
-
-void arm_dot_prod_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        uint32_t blockSize,
-        q31_t * result)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t sum = 0;                                 /* Temporary return variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t input1, input2;                          /* Temporary variables */
-  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-#if defined (ARM_MATH_DSP)
-    /* read 4 samples at a time from sourceA */
-    input1 = read_q7x4_ia ((q7_t **) &pSrcA);
-    /* read 4 samples at a time from sourceB */
-    input2 = read_q7x4_ia ((q7_t **) &pSrcB);
-
-    /* extract two q7_t samples to q15_t samples */
-    inA1 = __SXTB16(__ROR(input1, 8));
-    /* extract reminaing two samples */
-    inA2 = __SXTB16(input1);
-    /* extract two q7_t samples to q15_t samples */
-    inB1 = __SXTB16(__ROR(input2, 8));
-    /* extract reminaing two samples */
-    inB2 = __SXTB16(input2);
-
-    /* multiply and accumulate two samples at a time */
-    sum = __SMLAD(inA1, inB1, sum);
-    sum = __SMLAD(inA2, inB2, sum);
-#else
-    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
-    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
-    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
-    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
-
-    /* Calculate dot product and store result in a temporary buffer. */
-//#if defined (ARM_MATH_DSP)
-//    sum  = __SMLAD(*pSrcA++, *pSrcB++, sum);
-//#else
-    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
-//#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store result in destination buffer in 18.14 format */
-  *result = sum;
-}
-
-/**
-  @} end of BasicDotProd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dot_prod_q7.c
+ * Description:  Q7 dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicDotProd
+  @{
+ */
+
+/**
+  @brief         Dot product of Q7 vectors.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[in]     blockSize  number of samples in each vector
+  @param[out]    result     output result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The intermediate multiplications are in 1.7 x 1.7 = 2.14 format and these
+                   results are added to an accumulator in 18.14 format.
+                   Nonsaturating additions are used and there is no danger of wrap around as long as
+                   the vectors are less than 2^18 elements long.
+                   The return result is in 18.14 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_dot_prod_q7(
+    const q7_t * pSrcA,
+    const q7_t * pSrcB,
+    uint32_t blockSize,
+    q31_t * result)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecA;
+    q7x16_t vecB;
+    q31_t     sum = 0;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1]
+         * Calculate dot product and then store the result in a temporary buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        sum = vmladavaq(sum, vecA, vecB);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA += 16;
+        pSrcB += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        sum = vmladavaq_p(sum, vecA, vecB, p0);
+    }
+
+    *result = sum;
+}
+#else
+void arm_dot_prod_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        uint32_t blockSize,
+        q31_t * result)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary return variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t input1, input2;                          /* Temporary variables */
+  q31_t inA1, inA2, inB1, inB2;                  /* Temporary variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+#if defined (ARM_MATH_DSP)
+    /* read 4 samples at a time from sourceA */
+    input1 = read_q7x4_ia ((q7_t **) &pSrcA);
+    /* read 4 samples at a time from sourceB */
+    input2 = read_q7x4_ia ((q7_t **) &pSrcB);
+
+    /* extract two q7_t samples to q15_t samples */
+    inA1 = __SXTB16(__ROR(input1, 8));
+    /* extract reminaing two samples */
+    inA2 = __SXTB16(input1);
+    /* extract two q7_t samples to q15_t samples */
+    inB1 = __SXTB16(__ROR(input2, 8));
+    /* extract reminaing two samples */
+    inB2 = __SXTB16(input2);
+
+    /* multiply and accumulate two samples at a time */
+    sum = __SMLAD(inA1, inB1, sum);
+    sum = __SMLAD(inA2, inB2, sum);
+#else
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0]* B[0] + A[1]* B[1] + A[2]* B[2] + .....+ A[blockSize-1]* B[blockSize-1] */
+
+    /* Calculate dot product and store result in a temporary buffer. */
+//#if defined (ARM_MATH_DSP)
+//    sum  = __SMLAD(*pSrcA++, *pSrcB++, sum);
+//#else
+    sum += (q31_t) ((q15_t) *pSrcA++ * *pSrcB++);
+//#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in destination buffer in 18.14 format */
+  *result = sum;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicDotProd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f16.c
new file mode 100755
index 00000000..c1115ac7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f16.c
@@ -0,0 +1,171 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_f16.c
+ * Description:  Floating-point vector multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicMult Vector Multiplication
+
+  Element-by-element multiplication of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Floating-point vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) 
+
+#include "arm_helium_utils.h"
+
+void arm_mult_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+    f16x8_t vec1;
+    f16x8_t vec2;
+    f16x8_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+      /* Add and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrcA);
+        vec2 = vld1q(pSrcB);
+        res = vmulq(vec1, vec2);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8; 
+        pDst += 8;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+    if (blkCnt > 0U)
+    {
+      /* C = A + B */
+      mve_pred16_t p0 = vctp16q(blkCnt);
+      vec1 = vld1q(pSrcA);
+      vec2 = vld1q(pSrcB);
+      vstrhq_p(pDst, vmulq(vec1,vec2), p0);
+    }
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_mult_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply input and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrcA++) * (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
index 5a35b00f..4df04e96 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f32.c
@@ -1,148 +1,200 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mult_f32.c
- * Description:  Floating-point vector multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicMult Vector Multiplication
-
-  Element-by-element multiplication of two vectors.
-
-  <pre>
-      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
-  </pre>
-
-  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup BasicMult
-  @{
- */
-
-/**
-  @brief         Floating-point vector multiplication.
-  @param[in]     pSrcA      points to the first input vector.
-  @param[in]     pSrcB      points to the second input vector.
-  @param[out]    pDst       points to the output vector.
-  @param[in]     blockSize  number of samples in each vector.
-  @return        none
- */
-
-void arm_mult_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-    uint32_t blkCnt;                               /* Loop counter */
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t vec1;
-    float32x4_t vec2;
-    float32x4_t res;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        /* C = A * B */
-
-    	/* Multiply the inputs and then store the results in the destination buffer. */
-        vec1 = vld1q_f32(pSrcA);
-        vec2 = vld1q_f32(pSrcB);
-        res = vmulq_f32(vec1, vec2);
-        vst1q_f32(pDst, res);
-
-        /* Increment pointers */
-        pSrcA += 4;
-        pSrcB += 4; 
-        pDst += 4;
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-    /* Multiply inputs and store result in destination buffer. */
-    *pDst++ = (*pSrcA++) * (*pSrcB++);
-
-    *pDst++ = (*pSrcA++) * (*pSrcB++);
-
-    *pDst++ = (*pSrcA++) * (*pSrcB++);
-
-    *pDst++ = (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-    /* Multiply input and store result in destination buffer. */
-    *pDst++ = (*pSrcA++) * (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_f32.c
+ * Description:  Floating-point vector multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicMult Vector Multiplication
+
+  Element-by-element multiplication of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] * pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Floating-point vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mult_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+    f32x4_t vec1;
+    f32x4_t vec2;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+      /* Add and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrcA);
+        vec2 = vld1q(pSrcB);
+        res = vmulq(vec1, vec2);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+    if (blkCnt > 0U)
+    {
+      /* C = A + B */
+      mve_pred16_t p0 = vctp32q(blkCnt);
+      vec1 = vld1q(pSrcA);
+      vec2 = vld1q(pSrcB);
+      vstrwq_p(pDst, vmulq(vec1,vec2), p0);
+    }
+
+}
+
+#else
+void arm_mult_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f32x4_t vec1;
+    f32x4_t vec2;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A * B */
+
+    	/* Multiply the inputs and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vmulq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply input and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f64.c
new file mode 100644
index 00000000..1a5afd9a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_f64.c
+ * Description:  Floating-point vector multiplication
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Floating-point vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+void arm_mult_f64(
+  const float64_t * pSrcA,
+  const float64_t * pSrcB,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply input and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) * (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
index 270dc730..167220a4 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q15.c
@@ -1,143 +1,192 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mult_q15.c
- * Description:  Q15 vector multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicMult
-  @{
- */
-
-/**
-  @brief         Q15 vector multiplication
-  @param[in]     pSrcA      points to first input vector
-  @param[in]     pSrcB      points to second input vector
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-void arm_mult_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t inA1, inA2, inB1, inB2;                  /* Temporary input variables */
-  q15_t out1, out2, out3, out4;                  /* Temporary output variables */
-  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-#if defined (ARM_MATH_DSP)
-    /* read 2 samples at a time from sourceA */
-    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
-    /* read 2 samples at a time from sourceB */
-    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
-    /* read 2 samples at a time from sourceA */
-    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
-    /* read 2 samples at a time from sourceB */
-    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
-
-    /* multiply mul = sourceA * sourceB */
-    mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul2 = (q31_t) ((q15_t) (inA1      ) * (q15_t) (inB1      ));
-    mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2      ) * (q15_t) (inB2      ));
-
-    /* saturate result to 16 bit */
-    out1 = (q15_t) __SSAT(mul1 >> 15, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15, 16);
-
-    /* store result to destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pDst, __PKHBT(out2, out1, 16));
-    write_q15x2_ia (&pDst, __PKHBT(out4, out3, 16));
-#else
-    write_q15x2_ia (&pDst, __PKHBT(out1, out2, 16));
-    write_q15x2_ia (&pDst, __PKHBT(out3, out4, 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-#else
-    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-    /* Multiply inputs and store result in destination buffer. */
-    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_q15.c
+ * Description:  Q15 vector multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Q15 vector multiplication
+  @param[in]     pSrcA      points to first input vector
+  @param[in]     pSrcB      points to second input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mult_q15(
+    const q15_t * pSrcA,
+    const q15_t * pSrcB,
+    q15_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecA, vecB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A * B
+         * Multiply the inputs and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqdmulhq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 8;
+        pSrcB  += 8;
+        pDst   += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrhq_p(pDst, vqdmulhq(vecA, vecB), p0);
+    }
+}
+
+#else
+void arm_mult_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2, inB1, inB2;                  /* Temporary input variables */
+  q15_t out1, out2, out3, out4;                  /* Temporary output variables */
+  q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    /* read 2 samples at a time from sourceA */
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 samples at a time from sourceB */
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
+
+    /* multiply mul = sourceA * sourceB */
+    mul1 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+    mul2 = (q31_t) ((q15_t) (inA1      ) * (q15_t) (inB1      ));
+    mul3 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB2 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2      ) * (q15_t) (inB2      ));
+
+    /* saturate result to 16 bit */
+    out1 = (q15_t) __SSAT(mul1 >> 15, 16);
+    out2 = (q15_t) __SSAT(mul2 >> 15, 16);
+    out3 = (q15_t) __SSAT(mul3 >> 15, 16);
+    out4 = (q15_t) __SSAT(mul4 >> 15, 16);
+
+    /* store result to destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(out2, out1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(out4, out3, 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pDst, __PKHBT(out3, out4, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    *pDst++ = (q15_t) __SSAT((((q31_t) (*pSrcA++) * (*pSrcB++)) >> 15), 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
index b6660de0..63ad73c4 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q31.c
@@ -1,119 +1,168 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mult_q31.c
- * Description:  Q31 vector multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicMult
-  @{
- */
-
-/**
-  @brief         Q31 vector multiplication.
-  @param[in]     pSrcA      points to the first input vector.
-  @param[in]     pSrcB      points to the second input vector.
-  @param[out]    pDst       points to the output vector.
-  @param[in]     blockSize  number of samples in each vector.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
- */
-
-void arm_mult_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t out;                                     /* Temporary output variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-    /* Multiply inputs and store result in destination buffer. */
-    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
-    out = __SSAT(out, 31);
-    *pDst++ = out << 1U;
-
-    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
-    out = __SSAT(out, 31);
-    *pDst++ = out << 1U;
-
-    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
-    out = __SSAT(out, 31);
-    *pDst++ = out << 1U;
-
-    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
-    out = __SSAT(out, 31);
-    *pDst++ = out << 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-    /* Multiply inputs and store result in destination buffer. */
-    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
-    out = __SSAT(out, 31);
-    *pDst++ = out << 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_q31.c
+ * Description:  Q31 vector multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Q31 vector multiplication.
+  @param[in]     pSrcA      points to the first input vector.
+  @param[in]     pSrcB      points to the second input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mult_q31(
+    const q31_t * pSrcA,
+    const q31_t * pSrcB,
+    q31_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecA, vecB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A * B
+         * Multiply the inputs and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqdmulhq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 4;
+        pSrcB  += 4;
+        pDst   += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrwq_p(pDst, vqdmulhq(vecA, vecB), p0);
+    }
+}
+
+#else
+void arm_mult_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t out;                                     /* Temporary output variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply inputs and store result in destination buffer. */
+    out = ((q63_t) *pSrcA++ * *pSrcB++) >> 32;
+    out = __SSAT(out, 31);
+    *pDst++ = out << 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
index b50c109d..7be80db5 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_mult_q7.c
@@ -1,119 +1,168 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mult_q7.c
- * Description:  Q7 vector multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicMult
-  @{
- */
-
-/**
-  @brief         Q7 vector multiplication
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
- */
-
-void arm_mult_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-#if defined (ARM_MATH_DSP)
-    /* Multiply inputs and store results in temporary variables */
-    out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
-    /* Pack and store result in destination buffer (in single write) */
-    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
-#else
-    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * B */
-
-    /* Multiply input and store result in destination buffer. */
-    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mult_q7.c
+ * Description:  Q7 vector multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicMult
+  @{
+ */
+
+/**
+  @brief         Q7 vector multiplication
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mult_q7(
+    const q7_t * pSrcA,
+    const q7_t * pSrcB,
+    q7_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecA, vecB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A * B
+         * Multiply the inputs and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqdmulhq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 16;
+        pSrcB  += 16;
+        pDst   += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrbq_p(pDst, vqdmulhq(vecA, vecB), p0);
+    }
+}
+
+#else
+void arm_mult_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+#if defined (ARM_MATH_DSP)
+    /* Multiply inputs and store results in temporary variables */
+    out1 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out2 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out3 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    out4 = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+    /* Pack and store result in destination buffer (in single write) */
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * B */
+
+    /* Multiply input and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((((q15_t) (*pSrcA++) * (*pSrcB++)) >> 7), 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f16.c
new file mode 100755
index 00000000..187e511b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f16.c
@@ -0,0 +1,166 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_f16.c
+ * Description:  Negates floating-point vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicNegate Vector Negate
+
+  Negates the elements of a vector.
+
+  <pre>
+      pDst[n] = -pSrc[n],   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector.
+  @param[out]    pDst       points to output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_negate_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+    f16x8_t vec1;
+    f16x8_t res;
+
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+        /* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vnegq(vec1);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 8;
+        pDst += 8;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+    if (blkCnt > 0U)
+    {
+      /* C = |A| */
+      mve_pred16_t p0 = vctp16q(blkCnt);
+      vec1 = vld1q((float16_t const *) pSrc);
+      vstrhq_p(pDst, vnegq(vec1), p0);
+    }
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_negate_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -(_Float16)*pSrc++;
+
+    *pDst++ = -(_Float16)*pSrc++;
+
+    *pDst++ = -(_Float16)*pSrc++;
+
+    *pDst++ = -(_Float16)*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -(_Float16)*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
index 5b2268cd..4f243cda 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f32.c
@@ -1,145 +1,192 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_negate_f32.c
- * Description:  Negates floating-point vectors
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicNegate Vector Negate
-
-  Negates the elements of a vector.
-
-  <pre>
-      pDst[n] = -pSrc[n],   0 <= n < blockSize.
-  </pre>
-
-  The functions support in-place computation allowing the source and
-  destination pointers to reference the same memory buffer.
-  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup BasicNegate
-  @{
- */
-
-/**
-  @brief         Negates the elements of a floating-point vector.
-  @param[in]     pSrc       points to input vector.
-  @param[out]    pDst       points to output vector.
-  @param[in]     blockSize  number of samples in each vector.
-  @return        none
- */
-
-void arm_negate_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-    float32x4_t vec1;
-    float32x4_t res;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        /* C = -A */
-
-    	/* Negate and then store the results in the destination buffer. */
-        vec1 = vld1q_f32(pSrc);
-        res = vnegq_f32(vec1);
-        vst1q_f32(pDst, res);
-
-        /* Increment pointers */
-        pSrc += 4;
-        pDst += 4;
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-    /* Negate and store result in destination buffer. */
-    *pDst++ = -*pSrc++;
-
-    *pDst++ = -*pSrc++;
-
-    *pDst++ = -*pSrc++;
-
-    *pDst++ = -*pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-    /* Negate and store result in destination buffer. */
-    *pDst++ = -*pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicNegate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_f32.c
+ * Description:  Negates floating-point vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicNegate Vector Negate
+
+  Negates the elements of a vector.
+
+  <pre>
+      pDst[n] = -pSrc[n],   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector.
+  @param[out]    pDst       points to output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_negate_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+    f32x4_t vec1;
+    f32x4_t res;
+
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        /* C = |A| */
+
+        /* Calculate absolute values and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vnegq(vec1);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+    if (blkCnt > 0U)
+    {
+      /* C = |A| */
+      mve_pred16_t p0 = vctp32q(blkCnt);
+      vec1 = vld1q((float32_t const *) pSrc);
+      vstrwq_p(pDst, vnegq(vec1), p0);
+    }
+
+}
+
+#else
+void arm_negate_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f32x4_t vec1;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = -A */
+
+    	/* Negate and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vnegq_f32(vec1);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f64.c
new file mode 100644
index 00000000..c8a73417
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_f64.c
@@ -0,0 +1,73 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_f64.c
+ * Description:  Negates floating-point vectors
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector.
+  @param[out]    pDst       points to output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+ */
+
+void arm_negate_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
index 9c8ea7bb..a1a7e8c4 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q15.c
@@ -1,126 +1,171 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_negate_q15.c
- * Description:  Negates Q15 vectors
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicNegate
-  @{
- */
-
-/**
-  @brief         Negates the elements of a Q15 vector.
-  @param[in]     pSrc       points to the input vector.
-  @param[out]    pDst       points to the output vector.
-  @param[in]     blockSize  number of samples in each vector.
-  @return        none
-
-  @par           Conditions for optimum performance
-                   Input and output buffers should be aligned by 32-bit
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
- */
-
-void arm_negate_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q15_t in;                                      /* Temporary input variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t in1;                                    /* Temporary input variables */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-#if defined (ARM_MATH_DSP)
-    /* Negate and store result in destination buffer (2 samples at a time). */
-    in1 = read_q15x2_ia ((q15_t **) &pSrc);
-    write_q15x2_ia (&pDst, __QSUB16(0, in1));
-
-    in1 = read_q15x2_ia ((q15_t **) &pSrc);
-    write_q15x2_ia (&pDst, __QSUB16(0, in1));
-#else
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
-
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
-
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
-
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-    /* Negate and store result in destination buffer. */
-    in = *pSrc++;
-    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicNegate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_q15.c
+ * Description:  Negates Q15 vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize  number of samples in each vector.
+  @return        none
+
+  @par           Conditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_negate_q15(
+    const q15_t  * pSrc,
+    q15_t  * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecSrc;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = -A
+         * Negate and then store the results in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqnegq(vecSrc));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrhq_p(pDst, vqnegq(vecSrc), p0);
+    }
+}
+
+#else
+void arm_negate_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t in1;                                    /* Temporary input variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+#if defined (ARM_MATH_DSP)
+    /* Negate and store result in destination buffer (2 samples at a time). */
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    write_q15x2_ia (&pDst, __QSUB16(0, in1));
+
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    write_q15x2_ia (&pDst, __QSUB16(0, in1));
+#else
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+    *pDst++ = (in == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
index f01b1d9f..3ee77ed7 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q31.c
@@ -1,132 +1,178 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_negate_q31.c
- * Description:  Negates Q31 vectors
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicNegate
-  @{
- */
-
-/**
-  @brief         Negates the elements of a Q31 vector.
-  @param[in]     pSrc       points to the input vector.
-  @param[out]    pDst       points to the output vector.
-  @param[in]     blockSize   number of samples in each vector.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
- */
-
-void arm_negate_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t in;                                      /* Temporary input variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-    /* Negate and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-    /* Negate and store result in destination buffer. */
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicNegate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_q31.c
+ * Description:  Negates Q31 vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize   number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_negate_q31(
+    const q31_t * pSrc,
+    q31_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecSrc;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = -A
+         * Negate and then store the results in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqnegq(vecSrc));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrwq_p(pDst, vqnegq(vecSrc), p0);
+    }
+}
+
+#else
+void arm_negate_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
index a27223f3..2e76567f 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_negate_q7.c
@@ -1,126 +1,171 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_negate_q7.c
- * Description:  Negates Q7 vectors
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicNegate
-  @{
- */
-
-/**
-  @brief         Negates the elements of a Q7 vector.
-  @param[in]     pSrc       points to the input vector.
-  @param[out]    pDst       points to the output vector.
-  @param[in]     blockSize   number of samples in each vector.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F.
- */
-
-void arm_negate_q7(
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q7_t in;                                       /* Temporary input variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t in1;                                    /* Temporary input variable */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-#if defined (ARM_MATH_DSP)
-    /* Negate and store result in destination buffer (4 samples at a time). */
-    in1 = read_q7x4_ia ((q7_t **) &pSrc);
-    write_q7x4_ia (&pDst, __QSUB8(0, in1));
-#else
-    in = *pSrc++;
-    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
-
-    in = *pSrc++;
-    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
-
-    in = *pSrc++;
-    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
-
-    in = *pSrc++;
-    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = -A */
-
-    /* Negate and store result in destination buffer. */
-    in = *pSrc++;
-
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (q7_t) __QSUB(0, in);
-#else
-    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicNegate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_negate_q7.c
+ * Description:  Negates Q7 vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicNegate
+  @{
+ */
+
+/**
+  @brief         Negates the elements of a Q7 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[out]    pDst       points to the output vector.
+  @param[in]     blockSize   number of samples in each vector.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q7 value -1 (0x80) is saturated to the maximum allowable positive value 0x7F.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_negate_q7(
+    const q7_t   * pSrc,
+    q7_t   * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = -A
+         * Negate and then store the results in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqnegq(vecSrc));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 16;
+        pDst += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrbq_p(pDst, vqnegq(vecSrc), p0);
+    }
+}
+
+#else
+void arm_negate_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q7_t in;                                       /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t in1;                                    /* Temporary input variable */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+#if defined (ARM_MATH_DSP)
+    /* Negate and store result in destination buffer (4 samples at a time). */
+    in1 = read_q7x4_ia ((q7_t **) &pSrc);
+    write_q7x4_ia (&pDst, __QSUB8(0, in1));
+#else
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+
+    in = *pSrc++;
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = -A */
+
+    /* Negate and store result in destination buffer. */
+    in = *pSrc++;
+
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q7_t) __QSUB8(0, in);
+#else
+    *pDst++ = (in == (q7_t) 0x80) ? (q7_t) 0x7f : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicNegate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c
new file mode 100644
index 00000000..e553d287
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u16.c
@@ -0,0 +1,130 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_not_u16.c
+ * Description:  uint16_t bitwise NOT
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup Not Vector bitwise NOT
+
+  Compute the logical bitwise NOT.
+
+  There are separate functions for uint32_t, uint16_t, and uint8_t data types.
+ */
+
+/**
+  @addtogroup Not
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise NOT of a fixed-point vector.
+  @param[in]     pSrc       points to input vector 
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_not_u16(
+    const uint16_t * pSrc,
+          uint16_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t vecSrc;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrc);
+
+        vst1q(pDst, vmvnq_u16(vecSrc) );
+
+        pSrc += 8;
+        pDst += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrhq_p(pDst, vmvnq_u16(vecSrc), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t inV;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        inV = vld1q_u16(pSrc);
+
+        vst1q_u16(pDst, vmvnq_u16(inV) );
+
+        pSrc += 8;
+        pDst += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = ~(*pSrc++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of Not group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c
new file mode 100644
index 00000000..f46284c8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u32.c
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_not_u32.c
+ * Description:  uint32_t bitwise NOT
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup Not
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise NOT of a fixed-point vector.
+  @param[in]     pSrc       points to input vector 
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_not_u32(
+    const uint32_t * pSrc,
+          uint32_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t vecSrc;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 2;
+
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrc);
+
+        vst1q(pDst, vmvnq_u32(vecSrc) );
+
+        pSrc += 4;
+        pDst += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrwq_p(pDst, vmvnq_u32(vecSrc), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t inV;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        inV = vld1q_u32(pSrc);
+
+        vst1q_u32(pDst, vmvnq_u32(inV) );
+
+        pSrc += 4;
+        pDst += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = ~(*pSrc++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of Not group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c
new file mode 100644
index 00000000..e0682838
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_not_u8.c
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_not_u8.c
+ * Description:  uint8_t bitwise NOT
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup Not
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise NOT of a fixed-point vector.
+  @param[in]     pSrc       points to input vector 
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_not_u8(
+    const uint8_t * pSrc,
+          uint8_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t vecSrc;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrc);
+
+        vst1q(pDst, vmvnq_u8(vecSrc) );
+
+        pSrc += 16;
+        pDst += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrbq_p(pDst, vmvnq_u8(vecSrc), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t inV;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4U;
+
+    while (blkCnt > 0U)
+    {
+        inV = vld1q_u8(pSrc);
+
+        vst1q_u8(pDst, vmvnq_u8(inV) );
+
+        pSrc += 16;
+        pDst += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = ~(*pSrc++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of Not group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f16.c
new file mode 100755
index 00000000..9aeb1e75
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f16.c
@@ -0,0 +1,170 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_f16.c
+ * Description:  Floating-point vector offset
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicOffset Vector Offset
+
+  Adds a constant offset to each element of a vector.
+
+  <pre>
+      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_offset_f16(
+  const float16_t * pSrc,
+        float16_t offset,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+    f16x8_t vec1;
+    f16x8_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+    while (blkCnt > 0U)
+    {
+        /* C = A + offset */
+ 
+        /* Add offset and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vaddq(vec1,offset);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 8;
+        pDst += 8;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vec1 = vld1q((float16_t const *) pSrc);
+        vstrhq_p(pDst, vaddq(vec1, offset), p0);
+    }
+
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_offset_f16(
+  const float16_t * pSrc,
+        float16_t offset,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset;
+
+    *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset;
+
+    *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset;
+
+    *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrc++) + (_Float16)offset;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
index aef5d414..a68df050 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f32.c
@@ -1,147 +1,196 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_offset_f32.c
- * Description:  Floating-point vector offset
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicOffset Vector Offset
-
-  Adds a constant offset to each element of a vector.
-
-  <pre>
-      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
-  </pre>
-
-  The functions support in-place computation allowing the source and
-  destination pointers to reference the same memory buffer.
-  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup BasicOffset
-  @{
- */
-
-/**
-  @brief         Adds a constant offset to a floating-point vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     offset     is the offset to be added
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_offset_f32(
-  const float32_t * pSrc,
-        float32_t offset,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-    float32x4_t vec1;
-    float32x4_t res;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        /* C = A + offset */
- 
-        /* Add offset and then store the results in the destination buffer. */
-        vec1 = vld1q_f32(pSrc);
-        res = vaddq_f32(vec1,vdupq_n_f32(offset));
-        vst1q_f32(pDst, res);
-
-        /* Increment pointers */
-        pSrc += 4;
-        pDst += 4;
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-    /* Add offset and store result in destination buffer. */
-    *pDst++ = (*pSrc++) + offset;
-
-    *pDst++ = (*pSrc++) + offset;
-
-    *pDst++ = (*pSrc++) + offset;
-
-    *pDst++ = (*pSrc++) + offset;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-    /* Add offset and store result in destination buffer. */
-    *pDst++ = (*pSrc++) + offset;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicOffset group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_f32.c
+ * Description:  Floating-point vector offset
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicOffset Vector Offset
+
+  Adds a constant offset to each element of a vector.
+
+  <pre>
+      pDst[n] = pSrc[n] + offset,   0 <= n < blockSize.
+  </pre>
+
+  The functions support in-place computation allowing the source and
+  destination pointers to reference the same memory buffer.
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_offset_f32(
+  const float32_t * pSrc,
+        float32_t offset,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+    f32x4_t vec1;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        /* C = A + offset */
+ 
+        /* Add offset and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vaddq(vec1,offset);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vec1 = vld1q((float32_t const *) pSrc);
+        vstrwq_p(pDst, vaddq(vec1, offset), p0);
+    }
+
+
+}
+
+#else
+void arm_offset_f32(
+  const float32_t * pSrc,
+        float32_t offset,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f32x4_t vec1;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + offset */
+ 
+        /* Add offset and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vaddq_f32(vec1,vdupq_n_f32(offset));
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (*pSrc++) + offset;
+
+    *pDst++ = (*pSrc++) + offset;
+
+    *pDst++ = (*pSrc++) + offset;
+
+    *pDst++ = (*pSrc++) + offset;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (*pSrc++) + offset;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f64.c
new file mode 100644
index 00000000..0b39da43
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_f64.c
+ * Description:  Floating-point vector offset
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_offset_f64(
+  const float64_t * pSrc,
+        float64_t offset,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (*pSrc++) + offset;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
index 196efb6f..ff5515c7 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q15.c
@@ -1,121 +1,168 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_offset_q15.c
- * Description:  Q15 vector offset
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicOffset
-  @{
- */
-
-/**
-  @brief         Adds a constant offset to a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     offset     is the offset to be added
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-void arm_offset_q15(
-  const q15_t * pSrc,
-        q15_t offset,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t offset_packed;                           /* Offset packed to 32 bit */
-
-  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
-  offset_packed = __PKHBT(offset, offset, 16);
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-#if defined (ARM_MATH_DSP)
-    /* Add offset and store result in destination buffer (2 samples at a time). */
-    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
-    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
-#else
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-    /* Add offset and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
-#else
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicOffset group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_q15.c
+ * Description:  Q15 vector offset
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_offset_q15(
+    const q15_t * pSrc,
+    q15_t   offset,
+    q15_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecSrc;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A + offset
+         * Add offset and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqaddq(vecSrc, offset));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrhq_p(pDst, vqaddq(vecSrc, offset), p0);
+    }
+}
+
+
+#else
+void arm_offset_q15(
+  const q15_t * pSrc,
+        q15_t offset,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t offset_packed;                           /* Offset packed to 32 bit */
+
+  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+  offset_packed = __PKHBT(offset, offset, 16);
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+#if defined (ARM_MATH_DSP)
+    /* Add offset and store result in destination buffer (2 samples at a time). */
+    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+    write_q15x2_ia (&pDst, __QADD16(read_q15x2_ia ((q15_t **) &pSrc), offset_packed));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QADD16(*pSrc++, offset);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrc++ + offset), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
index b043c858..2f702b0f 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q31.c
@@ -1,128 +1,159 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_offset_q31.c
- * Description:  Q31 vector offset
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicOffset
-  @{
- */
-
-/**
-  @brief         Adds a constant offset to a Q31 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     offset     is the offset to be added
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
- */
-
-void arm_offset_q31(
-  const q31_t * pSrc,
-        q31_t offset,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-    /* Add offset and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QADD(*pSrc++, offset);
-#else
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-#endif
-
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QADD(*pSrc++, offset);
-#else
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-#endif
-
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QADD(*pSrc++, offset);
-#else
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-#endif
-
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QADD(*pSrc++, offset);
-#else
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-    /* Add offset and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QADD(*pSrc++, offset);
-#else
-    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicOffset group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_q31.c
+ * Description:  Q31 vector offset
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_offset_q31(
+    const q31_t * pSrc,
+    q31_t   offset,
+    q31_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecSrc;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A + offset
+         * Add offset and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqaddq(vecSrc, offset));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrwq_p(pDst, vqaddq(vecSrc, offset), p0);
+    }
+}
+
+#else
+void arm_offset_q31(
+  const q31_t * pSrc,
+        q31_t offset,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = __QADD(*pSrc++, offset);
+    
+    *pDst++ = __QADD(*pSrc++, offset);
+    
+    *pDst++ = __QADD(*pSrc++, offset);
+    
+    *pDst++ = __QADD(*pSrc++, offset);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QADD(*pSrc++, offset);
+#else
+    *pDst++ = (q31_t) clip_q63_to_q31((q63_t) * pSrc++ + offset);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
index 95ccfda4..9199a9a4 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_offset_q7.c
@@ -1,116 +1,162 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_offset_q7.c
- * Description:  Q7 vector offset
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicOffset
-  @{
- */
-
-/**
-  @brief         Adds a constant offset to a Q7 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     offset     is the offset to be added
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
- */
-
-void arm_offset_q7(
-  const q7_t * pSrc,
-        q7_t offset,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t offset_packed;                           /* Offset packed to 32 bit */
-
-  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
-  offset_packed = __PACKq7(offset, offset, offset, offset);
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-#if defined (ARM_MATH_DSP)
-    /* Add offset and store result in destination buffer (4 samples at a time). */
-    write_q7x4_ia (&pDst, __QADD8(read_q7x4_ia ((q7_t **) &pSrc), offset_packed));
-#else
-    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-    *pDst++ = (q7_t) __SSAT(*pSrc++ + offset, 8);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A + offset */
-
-    /* Add offset and store result in destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicOffset group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_offset_q7.c
+ * Description:  Q7 vector offset
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicOffset
+  @{
+ */
+
+/**
+  @brief         Adds a constant offset to a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     offset     is the offset to be added
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_offset_q7(
+    const q7_t * pSrc,
+    q7_t   offset,
+    q7_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A + offset
+         * Add offset and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst, vqaddq(vecSrc, offset));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 16;
+        pDst += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vstrbq_p(pDst, vqaddq(vecSrc, offset), p0);
+    }
+}
+
+#else
+void arm_offset_q7(
+  const q7_t * pSrc,
+        q7_t offset,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t offset_packed;                           /* Offset packed to 32 bit */
+
+  /* Offset is packed to 32 bit in order to use SIMD32 for addition */
+  offset_packed = __PACKq7(offset, offset, offset, offset);
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+#if defined (ARM_MATH_DSP)
+    /* Add offset and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QADD8(read_q7x4_ia ((q7_t **) &pSrc), offset_packed));
+#else
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A + offset */
+
+    /* Add offset and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrc++ + offset, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicOffset group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c
new file mode 100644
index 00000000..92d28036
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u16.c
@@ -0,0 +1,137 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_or_u16.c
+ * Description:  uint16_t bitwise inclusive OR
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup Or Vector bitwise inclusive OR
+
+  Compute the logical bitwise OR.
+
+  There are separate functions for uint32_t, uint16_t, and uint8_t data types.
+ */
+
+/**
+  @addtogroup Or
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise OR of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_or_u16(
+    const uint16_t * pSrcA,
+    const uint16_t * pSrcB,
+          uint16_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t vecSrcA, vecSrcB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, vorrq_u16(vecSrcA, vecSrcB) );
+
+        pSrcA += 8;
+        pSrcB += 8;
+        pDst  += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrhq_p(pDst, vorrq_u16(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t vecA, vecB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u16(pSrcA);
+        vecB = vld1q_u16(pSrcB);
+
+        vst1q_u16(pDst, vorrq_u16(vecA, vecB) );
+
+        pSrcA += 8;
+        pSrcB += 8;
+        pDst  += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)|(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of Or group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c
new file mode 100644
index 00000000..14cc83bb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u32.c
@@ -0,0 +1,128 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_or_u32.c
+ * Description:  uint32_t bitwise inclusive OR
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup Or
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise OR of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_or_u32(
+    const uint32_t * pSrcA,
+    const uint32_t * pSrcB,
+          uint32_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t vecSrcA, vecSrcB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, vorrq_u32(vecSrcA, vecSrcB) );
+
+        pSrcA += 4;
+        pSrcB += 4;
+        pDst  += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrwq_p(pDst, vorrq_u32(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t vecA, vecB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u32(pSrcA);
+        vecB = vld1q_u32(pSrcB);
+
+        vst1q_u32(pDst, vorrq_u32(vecA, vecB) );
+
+        pSrcA += 4;
+        pSrcB += 4;
+        pDst  += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)|(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+/**
+  @} end of Or group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c
new file mode 100644
index 00000000..beee07b6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_or_u8.c
@@ -0,0 +1,128 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_or_u8.c
+ * Description:  uint8_t bitwise inclusive OR
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup Or
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise OR of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_or_u8(
+    const uint8_t * pSrcA,
+    const uint8_t * pSrcB,
+          uint8_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t vecSrcA, vecSrcB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, vorrq_u8(vecSrcA, vecSrcB) );
+
+        pSrcA += 16;
+        pSrcB += 16;
+        pDst  += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrbq_p(pDst, vorrq_u8(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t vecA, vecB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u8(pSrcA);
+        vecB = vld1q_u8(pSrcB);
+
+        vst1q_u8(pDst, vorrq_u8(vecA, vecB) );
+
+        pSrcA += 16;
+        pSrcB += 16;
+        pDst  += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)|(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+/**
+  @} end of Or group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f16.c
new file mode 100755
index 00000000..b4b1c334
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f16.c
@@ -0,0 +1,183 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_f16.c
+ * Description:  Multiplies a floating-point vector by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicScale Vector Scale
+
+  Multiply a vector by a scalar value.  For floating-point data, the algorithm used is:
+
+  <pre>
+      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
+  </pre>
+
+  In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
+  a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+  The shift allows the gain of the scaling operation to exceed 1.0.
+  The algorithm used with fixed-point data is:
+
+  <pre>
+      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
+  </pre>
+
+  The overall scale factor applied to the fixed-point data is
+  <pre>
+      scale = scaleFract * 2^shift.
+  </pre>
+
+  The functions support in-place computation allowing the source and destination
+  pointers to reference the same memory buffer.
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a floating-point vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_scale_f16(
+  const float16_t * pSrc,
+        float16_t scale,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+    f16x8_t vec1;
+    f16x8_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + offset */
+ 
+        /* Add offset and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vmulq(vec1,scale);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 8;
+        pDst += 8;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vec1 = vld1q((float16_t const *) pSrc);
+        vstrhq_p(pDst, vmulq(vec1, scale), p0);
+    }
+
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_scale_f16(
+  const float16_t *pSrc,
+        float16_t scale,
+        float16_t *pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale;
+
+    *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale;
+
+    *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale;
+
+    *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrc++) * (_Float16)scale;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
index 38327ccc..59bc813f 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f32.c
@@ -1,159 +1,216 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_scale_f32.c
- * Description:  Multiplies a floating-point vector by a scalar
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicScale Vector Scale
-
-  Multiply a vector by a scalar value.  For floating-point data, the algorithm used is:
-
-  <pre>
-      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
-  </pre>
-
-  In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
-  a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
-  The shift allows the gain of the scaling operation to exceed 1.0.
-  The algorithm used with fixed-point data is:
-
-  <pre>
-      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
-  </pre>
-
-  The overall scale factor applied to the fixed-point data is
-  <pre>
-      scale = scaleFract * 2^shift.
-  </pre>
-
-  The functions support in-place computation allowing the source and destination
-  pointers to reference the same memory buffer.
- */
-
-/**
-  @addtogroup BasicScale
-  @{
- */
-
-/**
-  @brief         Multiplies a floating-point vector by a scalar.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     scale      scale factor to be applied
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_scale_f32(
-  const float32_t *pSrc,
-        float32_t scale,
-        float32_t *pDst,
-        uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-    float32x4_t vec1;
-    float32x4_t res;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        /* C = A * scale */
-
-    	/* Scale the input and then store the results in the destination buffer. */
-        vec1 = vld1q_f32(pSrc);
-        res = vmulq_f32(vec1, vdupq_n_f32(scale));
-        vst1q_f32(pDst, res);
-
-        /* Increment pointers */
-        pSrc += 4; 
-        pDst += 4;
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-
-    /* Scale input and store result in destination buffer. */
-    *pDst++ = (*pSrc++) * scale;
-
-    *pDst++ = (*pSrc++) * scale;
-
-    *pDst++ = (*pSrc++) * scale;
-
-    *pDst++ = (*pSrc++) * scale;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-
-    /* Scale input and store result in destination buffer. */
-    *pDst++ = (*pSrc++) * scale;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicScale group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_f32.c
+ * Description:  Multiplies a floating-point vector by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicScale Vector Scale
+
+  Multiply a vector by a scalar value.  For floating-point data, the algorithm used is:
+
+  <pre>
+      pDst[n] = pSrc[n] * scale,   0 <= n < blockSize.
+  </pre>
+
+  In the fixed-point Q7, Q15, and Q31 functions, <code>scale</code> is represented by
+  a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+  The shift allows the gain of the scaling operation to exceed 1.0.
+  The algorithm used with fixed-point data is:
+
+  <pre>
+      pDst[n] = (pSrc[n] * scaleFract) << shift,   0 <= n < blockSize.
+  </pre>
+
+  The overall scale factor applied to the fixed-point data is
+  <pre>
+      scale = scaleFract * 2^shift.
+  </pre>
+
+  The functions support in-place computation allowing the source and destination
+  pointers to reference the same memory buffer.
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a floating-point vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_scale_f32(
+  const float32_t * pSrc,
+        float32_t scale,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+    f32x4_t vec1;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + offset */
+ 
+        /* Add offset and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrc);
+        res = vmulq(vec1,scale);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4;
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vec1 = vld1q((float32_t const *) pSrc);
+        vstrwq_p(pDst, vmulq(vec1, scale), p0);
+    }
+
+
+}
+
+#else
+void arm_scale_f32(
+  const float32_t *pSrc,
+        float32_t scale,
+        float32_t *pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+    f32x4_t vec1;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A * scale */
+
+    	/* Scale the input and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrc);
+        res = vmulq_f32(vec1, vdupq_n_f32(scale));
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrc += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    float32_t in1, in2, in3, in4;
+
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    in1 = (*pSrc++) * scale;
+
+    in2 = (*pSrc++) * scale;
+
+    in3 = (*pSrc++) * scale;
+
+    in4 = (*pSrc++) * scale;
+
+    *pDst++ = in1;
+    *pDst++ = in2;
+    *pDst++ = in3;
+    *pDst++ = in4;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON_EXPERIMENTAL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (*pSrc++) * scale;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f64.c
new file mode 100644
index 00000000..cb2452b8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_f64.c
+ * Description:  Multiplies a floating-point vector by a scalar
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a floating-point vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_scale_f64(
+  const float64_t *pSrc,
+        float64_t scale,
+        float64_t *pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (*pSrc++) * scale;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
index fc3f2ee1..f7062022 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q15.c
@@ -1,144 +1,201 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_scale_q15.c
- * Description:  Multiplies a Q15 vector by a scalar
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicScale
-  @{
- */
-
-/**
-  @brief         Multiplies a Q15 vector by a scalar.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     scaleFract fractional portion of the scale value
-  @param[in]     shift      number of bits to shift the result by
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
-                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
- */
-
-void arm_scale_q15(
-  const q15_t *pSrc,
-        q15_t scaleFract,
-        int8_t shift,
-        q15_t *pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        int8_t kShift = 15 - shift;                    /* Shift to apply after scaling */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-#if defined (ARM_MATH_DSP)
-  q31_t inA1, inA2;
-  q31_t out1, out2, out3, out4;                  /* Temporary output variables */
-  q15_t in1, in2, in3, in4;                      /* Temporary input variables */
-#endif
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-
-#if defined (ARM_MATH_DSP)
-    /* read 2 times 2 samples at a time from source */
-    inA1 = read_q15x2_ia ((q15_t **) &pSrc);
-    inA2 = read_q15x2_ia ((q15_t **) &pSrc);
-
-    /* Scale inputs and store result in temporary variables
-     * in single cycle by packing the outputs */
-    out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-    out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
-    out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-    out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
-
-    /* apply shifting */
-    out1 = out1 >> kShift;
-    out2 = out2 >> kShift;
-    out3 = out3 >> kShift;
-    out4 = out4 >> kShift;
-
-    /* saturate the output */
-    in1 = (q15_t) (__SSAT(out1, 16));
-    in2 = (q15_t) (__SSAT(out2, 16));
-    in3 = (q15_t) (__SSAT(out3, 16));
-    in4 = (q15_t) (__SSAT(out4, 16));
-
-    /* store result to destination */
-    write_q15x2_ia (&pDst, __PKHBT(in2, in1, 16));
-    write_q15x2_ia (&pDst, __PKHBT(in4, in3, 16));
-#else
-    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
-    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
-    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
-    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-
-    /* Scale input and store result in destination buffer. */
-    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicScale group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_q15.c
+ * Description:  Multiplies a Q15 vector by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a Q15 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
+                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_scale_q15(
+    const q15_t * pSrc,
+    q15_t   scaleFract,
+    int8_t  shift,
+    q15_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecSrc;
+    q15x8_t vecDst;
+
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A * scale
+         * Scale the input and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vecDst = vmulhq(vecSrc, vdupq_n_s16(scaleFract));
+        vecDst = vqshlq_r(vecDst, shift + 1);
+        vst1q(pDst, vecDst);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);;
+        vecSrc = vld1q(pSrc);
+        vecDst = vmulhq(vecSrc, vdupq_n_s16(scaleFract));
+        vecDst = vqshlq_r(vecDst, shift + 1);
+        vstrhq_p(pDst, vecDst, p0);
+    }
+
+}
+
+
+#else
+void arm_scale_q15(
+  const q15_t *pSrc,
+        q15_t scaleFract,
+        int8_t shift,
+        q15_t *pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        int8_t kShift = 15 - shift;                    /* Shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t out1, out2, out3, out4;                  /* Temporary output variables */
+  q15_t in1, in2, in3, in4;                      /* Temporary input variables */
+#endif
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from source */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrc);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrc);
+
+    /* Scale inputs and store result in temporary variables
+     * in single cycle by packing the outputs */
+    out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
+    out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
+    out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
+    out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
+
+    /* apply shifting */
+    out1 = out1 >> kShift;
+    out2 = out2 >> kShift;
+    out3 = out3 >> kShift;
+    out4 = out4 >> kShift;
+
+    /* saturate the output */
+    in1 = (q15_t) (__SSAT(out1, 16));
+    in2 = (q15_t) (__SSAT(out2, 16));
+    in3 = (q15_t) (__SSAT(out3, 16));
+    in4 = (q15_t) (__SSAT(out4, 16));
+
+    /* store result to destination */
+    write_q15x2_ia (&pDst, __PKHBT(in2, in1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(in4, in3, 16));
+#else
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (q15_t) (__SSAT(((q31_t) *pSrc++ * scaleFract) >> kShift, 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
index 52821ed9..4e28441b 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q31.c
@@ -1,191 +1,244 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_scale_q31.c
- * Description:  Multiplies a Q31 vector by a scalar
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicScale
-  @{
- */
-
-/**
-  @brief         Multiplies a Q31 vector by a scalar.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     scaleFract fractional portion of the scale value
-  @param[in]     shift      number of bits to shift the result by
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
-                   These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
- */
-
-void arm_scale_q31(
-  const q31_t *pSrc,
-        q31_t scaleFract,
-        int8_t shift,
-        q31_t *pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t in, out;                                 /* Temporary variables */
-        int8_t kShift = shift + 1;                     /* Shift to apply after scaling */
-        int8_t sign = (kShift & 0x80);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A * scale */
-
-      /* Scale input and store result in destination buffer. */
-      in = *pSrc++;                                /* read input from source */
-      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
-      out = in << kShift;                          /* apply shifting */
-      if (in != (out >> kShift))                   /* saturate the result */
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;                               /* Store result destination */
-
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A * scale */
-
-      /* Scale input and store result in destination buffer. */
-      in = *pSrc++;                                /* read four inputs from source */
-      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
-      out = in >> -kShift;                         /* apply shifting */
-      *pDst++ = out;                               /* Store result destination */
-
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in >> -kShift;
-      *pDst++ = out;
-
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in >> -kShift;
-      *pDst++ = out;
-
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in >> -kShift;
-      *pDst++ = out;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A * scale */
-
-      /* Scale input and store result in destination buffer. */
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-          out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A * scale */
-
-      /* Scale input and store result in destination buffer. */
-      in = *pSrc++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in >> -kShift;
-      *pDst++ = out;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-}
-
-/**
-  @} end of BasicScale group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_q31.c
+ * Description:  Multiplies a Q31 vector by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a Q31 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
+                   These are multiplied to yield a 2.62 intermediate result and this is shifted with saturation to 1.31 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_scale_q31(
+    const q31_t * pSrc,
+    q31_t   scaleFract,
+    int8_t  shift,
+    q31_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecSrc;
+    q31x4_t vecDst;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A * scale
+         * Scale the input and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vecDst = vmulhq(vecSrc, vdupq_n_s32(scaleFract));
+        vecDst = vqshlq_r(vecDst, shift + 1);
+        vst1q(pDst, vecDst);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vecDst = vmulhq(vecSrc, vdupq_n_s32(scaleFract));
+        vecDst = vqshlq_r(vecDst, shift + 1);
+        vstrwq_p(pDst, vecDst, p0);
+    }
+}
+
+#else
+void arm_scale_q31(
+  const q31_t *pSrc,
+        q31_t scaleFract,
+        int8_t shift,
+        q31_t *pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in, out;                                 /* Temporary variables */
+        int8_t kShift = shift + 1;                     /* Shift to apply after scaling */
+        int8_t sign = (kShift & 0x80);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;                                /* read input from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in << kShift;                          /* apply shifting */
+      if (in != (out >> kShift))                   /* saturate the result */
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;                               /* Store result destination */
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;                                /* read four inputs from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in >> -kShift;                         /* apply shifting */
+      *pDst++ = out;                               /* Store result destination */
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+          out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A * scale */
+
+      /* Scale input and store result in destination buffer. */
+      in = *pSrc++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in >> -kShift;
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
index 9da6af3a..5bb4580f 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_scale_q7.c
@@ -1,129 +1,186 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_scale_q7.c
- * Description:  Multiplies a Q7 vector by a scalar
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicScale
-  @{
- */
-
-/**
-  @brief         Multiplies a Q7 vector by a scalar.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     scaleFract fractional portion of the scale value
-  @param[in]     shift      number of bits to shift the result by
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
-                   These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
- */
-
-void arm_scale_q7(
-  const q7_t * pSrc,
-        q7_t scaleFract,
-        int8_t shift,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        int8_t kShift = 7 - shift;                     /* Shift to apply after scaling */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
-  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-
-#if defined (ARM_MATH_DSP)
-    /* Reading 4 inputs from memory */
-    in1 = *pSrc++;
-    in2 = *pSrc++;
-    in3 = *pSrc++;
-    in4 = *pSrc++;
-
-    /* Scale inputs and store result in the temporary variable. */
-    out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
-    out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
-    out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
-    out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
-
-    /* Pack and store result in destination buffer (in single write) */
-    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
-#else
-    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
-    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
-    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
-    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * scale */
-
-    /* Scale input and store result in destination buffer. */
-    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicScale group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_scale_q7.c
+ * Description:  Multiplies a Q7 vector by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicScale
+  @{
+ */
+
+/**
+  @brief         Multiplies a Q7 vector by a scalar.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     scaleFract fractional portion of the scale value
+  @param[in]     shift      number of bits to shift the result by
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.7 format.
+                   These are multiplied to yield a 2.14 intermediate result and this is shifted with saturation to 1.7 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+void arm_scale_q7(
+    const q7_t * pSrc,
+    q7_t   scaleFract,
+    int8_t  shift,
+    q7_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+    q7x16_t vecDst;
+
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A * scale
+         * Scale the input and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vecDst = vmulhq(vecSrc, vdupq_n_s8(scaleFract));
+        vecDst = vqshlq_r(vecDst, shift + 1);
+        vst1q(pDst, vecDst);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 16;
+        pDst += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vecDst = vmulhq(vecSrc, vdupq_n_s8(scaleFract));
+        vecDst = vqshlq_r(vecDst, shift + 1);
+        vstrbq_p(pDst, vecDst, p0);
+    }
+
+}
+
+#else
+void arm_scale_q7(
+  const q7_t * pSrc,
+        q7_t scaleFract,
+        int8_t shift,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        int8_t kShift = 7 - shift;                     /* Shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
+  q7_t out1, out2, out3, out4;                   /* Temporary output variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+#if defined (ARM_MATH_DSP)
+    /* Reading 4 inputs from memory */
+    in1 = *pSrc++;
+    in2 = *pSrc++;
+    in3 = *pSrc++;
+    in4 = *pSrc++;
+
+    /* Scale inputs and store result in the temporary variable. */
+    out1 = (q7_t) (__SSAT(((in1) * scaleFract) >> kShift, 8));
+    out2 = (q7_t) (__SSAT(((in2) * scaleFract) >> kShift, 8));
+    out3 = (q7_t) (__SSAT(((in3) * scaleFract) >> kShift, 8));
+    out4 = (q7_t) (__SSAT(((in4) * scaleFract) >> kShift, 8));
+
+    /* Pack and store result in destination buffer (in single write) */
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+#else
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * scale */
+
+    /* Scale input and store result in destination buffer. */
+    *pDst++ = (q7_t) (__SSAT((((q15_t) *pSrc++ * scaleFract) >> kShift), 8));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
index 360be976..2de3b2b0 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q15.c
@@ -1,201 +1,251 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_shift_q15.c
- * Description:  Shifts the elements of a Q15 vector by a specified number of bits
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicShift
-  @{
- */
-
-/**
-  @brief         Shifts the elements of a Q15 vector a specified number of bits
-  @param[in]     pSrc       points to the input vector
-  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-void arm_shift_q15(
-  const q15_t * pSrc,
-        int8_t shiftBits,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q15_t in1, in2;                                /* Temporary input variables */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  /* If the shift value is positive then do right shift else left shift */
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-
-#if defined (ARM_MATH_DSP)
-      /* read 2 samples from source */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-      /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
-                                     __SSAT((in2 << shiftBits), 16), 16));
-#else
-      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
-                                      __SSAT((in1 << shiftBits), 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-      /* read 2 samples from source */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in1 << shiftBits), 16),
-                                     __SSAT((in2 << shiftBits), 16), 16));
-#else
-      write_q15x2_ia (&pDst, __PKHBT(__SSAT((in2 << shiftBits), 16),
-                                     __SSAT((in1 << shiftBits), 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-#else
-      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
-      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
-      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
-      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A >> shiftBits */
-
-#if defined (ARM_MATH_DSP)
-      /* read 2 samples from source */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-      /* Shift the inputs and then store the results in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
-                                     (in2 >> -shiftBits), 16));
-#else
-      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
-                                     (in1 >> -shiftBits), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-      /* read 2 samples from source */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
-                                     (in2 >> -shiftBits), 16));
-#else
-      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
-                                     (in1 >> -shiftBits), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-#else
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* If the shift value is positive then do right shift else left shift */
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-
-      /* Shift input and store result in destination buffer. */
-      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A >> shiftBits */
-
-      /* Shift input and store result in destination buffer. */
-      *pDst++ = (*pSrc++ >> -shiftBits);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-}
-
-/**
-  @} end of BasicShift group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_shift_q15.c
+ * Description:  Shifts the elements of a Q15 vector by a specified number of bits
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicShift
+  @{
+ */
+
+/**
+  @brief         Shifts the elements of a Q15 vector a specified number of bits
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_shift_q15(
+    const q15_t * pSrc,
+    int8_t shiftBits,
+    q15_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecSrc;
+    q15x8_t vecDst;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A (>> or <<) shiftBits
+         * Shift the input and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vecDst = vqshlq_r(vecSrc, shiftBits);
+        vst1q(pDst, vecDst);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vecDst = vqshlq_r(vecSrc, shiftBits);
+        vstrhq_p(pDst, vecDst, p0);
+    }
+}
+
+#else
+void arm_shift_q15(
+  const q15_t * pSrc,
+        int8_t shiftBits,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q15_t in1, in2;                                /* Temporary input variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+      /* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in1 << shiftBits), 16),
+                                     __SSAT(((q31_t) in2 << shiftBits), 16), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in2 << shiftBits), 16),
+                                      __SSAT(((q31_t) in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in1 << shiftBits), 16),
+                                     __SSAT(((q31_t) in2 << shiftBits), 16), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT(__SSAT(((q31_t) in2 << shiftBits), 16),
+                                     __SSAT(((q31_t) in1 << shiftBits), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+      /* Shift the inputs and then store the results in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+                                     (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* read 2 samples from source */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst, __PKHBT((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits), 16));
+#else
+      write_q15x2_ia (&pDst, __PKHBT((in2 >> -shiftBits),
+                                     (in1 >> -shiftBits), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+#else
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = __SSAT(((q31_t) *pSrc++ << shiftBits), 16);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicShift group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
index 5550426d..5405c241 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q31.c
@@ -1,181 +1,232 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_shift_q31.c
- * Description:  Shifts the elements of a Q31 vector by a specified number of bits
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-/**
-  @defgroup BasicShift Vector Shift
-
-  Shifts the elements of a fixed-point vector by a specified number of bits.
-  There are separate functions for Q7, Q15, and Q31 data types.
-  The underlying algorithm used is:
-
-  <pre>
-      pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.
-  </pre>
-
-  If <code>shift</code> is positive then the elements of the vector are shifted to the left.
-  If <code>shift</code> is negative then the elements of the vector are shifted to the right.
-
-  The functions support in-place computation allowing the source and destination
-  pointers to reference the same memory buffer.
- */
-
-/**
-  @addtogroup BasicShift
-  @{
- */
-
-/**
-  @brief         Shifts the elements of a Q31 vector a specified number of bits.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in the vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
- */
-
-void arm_shift_q31(
-  const q31_t * pSrc,
-        int8_t shiftBits,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  q31_t in, out;                                 /* Temporary variables */
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  /* If the shift value is positive then do right shift else left shift */
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-
-      /* Shift input and store result in destination buffer. */
-      in = *pSrc++;
-      out = in << shiftBits;
-      if (in != (out >> shiftBits))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      in = *pSrc++;
-      out = in << shiftBits;
-      if (in != (out >> shiftBits))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      in = *pSrc++;
-      out = in << shiftBits;
-      if (in != (out >> shiftBits))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      in = *pSrc++;
-      out = in << shiftBits;
-      if (in != (out >> shiftBits))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pDst++ = out;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A >> shiftBits */
-
-      /* Shift input and store results in destination buffer. */
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* If the shift value is positive then do right shift else left shift */
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-
-      /* Shift input and store result in destination buffer. */
-      *pDst++ = clip_q63_to_q31((q63_t) *pSrc++ << shiftBits);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A >> shiftBits */
-
-      /* Shift input and store result in destination buffer. */
-      *pDst++ = (*pSrc++ >> -shiftBits);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-}
-
-/**
-  @} end of BasicShift group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_shift_q31.c
+ * Description:  Shifts the elements of a Q31 vector by a specified number of bits
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+/**
+  @defgroup BasicShift Vector Shift
+
+  Shifts the elements of a fixed-point vector by a specified number of bits.
+  There are separate functions for Q7, Q15, and Q31 data types.
+  The underlying algorithm used is:
+
+  <pre>
+      pDst[n] = pSrc[n] << shift,   0 <= n < blockSize.
+  </pre>
+
+  If <code>shift</code> is positive then the elements of the vector are shifted to the left.
+  If <code>shift</code> is negative then the elements of the vector are shifted to the right.
+
+  The functions support in-place computation allowing the source and destination
+  pointers to reference the same memory buffer.
+ */
+
+/**
+  @addtogroup BasicShift
+  @{
+ */
+
+/**
+  @brief         Shifts the elements of a Q31 vector a specified number of bits.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in the vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_shift_q31(
+    const q31_t * pSrc,
+    int8_t shiftBits,
+    q31_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecSrc;
+    q31x4_t vecDst;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A (>> or <<) shiftBits
+         * Shift the input and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q((q31_t const *) pSrc);
+        vecDst = vqshlq_r(vecSrc, shiftBits);
+        vst1q(pDst, vecDst);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrc = vld1q((q31_t const *) pSrc);
+        vecDst = vqshlq_r(vecSrc, shiftBits);
+        vstrwq_p(pDst, vecDst, p0);
+    }
+}
+
+
+#else
+void arm_shift_q31(
+  const q31_t * pSrc,
+        int8_t shiftBits,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  q31_t in, out;                                 /* Temporary variables */
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      in = *pSrc++;
+      out = in << shiftBits;
+      if (in != (out >> shiftBits))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pDst++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store results in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = clip_q63_to_q31((q63_t) *pSrc++ << shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicShift group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
index 832e40a6..4f83edcc 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_shift_q7.c
@@ -1,175 +1,225 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_shift_q7.c
- * Description:  Processing function for the Q7 Shifting
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicShift
-  @{
- */
-
-/**
-  @brief         Shifts the elements of a Q7 vector a specified number of bits
-  @param[in]     pSrc       points to the input vector
-  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           onditions for optimum performance
-                   Input and output buffers should be aligned by 32-bit
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
- */
-
-void arm_shift_q7(
-  const q7_t * pSrc,
-        int8_t shiftBits,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  /* If the shift value is positive then do right shift else left shift */
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-
-#if defined (ARM_MATH_DSP)
-      /* Read 4 inputs */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-      in3 = *pSrc++;
-      in4 = *pSrc++;
-
-    /* Pack and store result in destination buffer (in single write) */
-      write_q7x4_ia (&pDst, __PACKq7(__SSAT((in1 << shiftBits), 8),
-                                     __SSAT((in2 << shiftBits), 8),
-                                     __SSAT((in3 << shiftBits), 8),
-                                     __SSAT((in4 << shiftBits), 8) ));
-#else
-      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
-      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
-      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
-      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A >> shiftBits */
-
-#if defined (ARM_MATH_DSP)
-      /* Read 4 inputs */
-      in1 = *pSrc++;
-      in2 = *pSrc++;
-      in3 = *pSrc++;
-      in4 = *pSrc++;
-
-    /* Pack and store result in destination buffer (in single write) */
-      write_q7x4_ia (&pDst, __PACKq7((in1 >> -shiftBits),
-                                     (in2 >> -shiftBits),
-                                     (in3 >> -shiftBits),
-                                     (in4 >> -shiftBits) ));
-#else
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-      *pDst++ = (*pSrc++ >> -shiftBits);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* If the shift value is positive then do right shift else left shift */
-  if (sign == 0U)
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A << shiftBits */
-
-      /* Shift input and store result in destination buffer. */
-      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    while (blkCnt > 0U)
-    {
-      /* C = A >> shiftBits */
-
-      /* Shift input and store result in destination buffer. */
-      *pDst++ = (*pSrc++ >> -shiftBits);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-}
-
-/**
-  @} end of BasicShift group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_shift_q7.c
+ * Description:  Processing function for the Q7 Shifting
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicShift
+  @{
+ */
+
+/**
+  @brief         Shifts the elements of a Q7 vector a specified number of bits
+  @param[in]     pSrc       points to the input vector
+  @param[in]     shiftBits  number of bits to shift.  A positive value shifts left; a negative value shifts right.
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           onditions for optimum performance
+                   Input and output buffers should be aligned by 32-bit
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_shift_q7(
+    const q7_t * pSrc,
+    int8_t shiftBits,
+    q7_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+    q7x16_t vecDst;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A (>> or <<) shiftBits
+         * Shift the input and then store the result in the destination buffer.
+         */
+        vecSrc = vld1q(pSrc);
+        vecDst = vqshlq_r(vecSrc, shiftBits);
+        vst1q(pDst, vecDst);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrc += 16;
+        pDst += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrc = vld1q(pSrc);
+        vecDst = vqshlq_r(vecSrc, shiftBits);
+        vstrbq_p(pDst, vecDst, p0);
+    }
+}
+
+#else
+void arm_shift_q7(
+  const q7_t * pSrc,
+        int8_t shiftBits,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint8_t sign = (shiftBits & 0x80);             /* Sign of shiftBits */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q7_t in1,  in2,  in3,  in4;                    /* Temporary input variables */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* Read 4 inputs */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+      in3 = *pSrc++;
+      in4 = *pSrc++;
+
+    /* Pack and store result in destination buffer (in single write) */
+      write_q7x4_ia (&pDst, __PACKq7(__SSAT(((q15_t) in1 << shiftBits), 8),
+                                     __SSAT(((q15_t) in2 << shiftBits), 8),
+                                     __SSAT(((q15_t) in3 << shiftBits), 8),
+                                     __SSAT(((q15_t) in4 << shiftBits), 8) ));
+#else
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+#if defined (ARM_MATH_DSP)
+      /* Read 4 inputs */
+      in1 = *pSrc++;
+      in2 = *pSrc++;
+      in3 = *pSrc++;
+      in4 = *pSrc++;
+
+    /* Pack and store result in destination buffer (in single write) */
+      write_q7x4_ia (&pDst, __PACKq7((in1 >> -shiftBits),
+                                     (in2 >> -shiftBits),
+                                     (in3 >> -shiftBits),
+                                     (in4 >> -shiftBits) ));
+#else
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+      *pDst++ = (*pSrc++ >> -shiftBits);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* If the shift value is positive then do right shift else left shift */
+  if (sign == 0U)
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A << shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (q7_t) __SSAT(((q15_t) *pSrc++ << shiftBits), 8);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    while (blkCnt > 0U)
+    {
+      /* C = A >> shiftBits */
+
+      /* Shift input and store result in destination buffer. */
+      *pDst++ = (*pSrc++ >> -shiftBits);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicShift group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f16.c
new file mode 100755
index 00000000..836ad43b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f16.c
@@ -0,0 +1,171 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_f16.c
+ * Description:  Floating-point vector subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions_f16.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicSub Vector Subtraction
+
+  Element-by-element subtraction of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Floating-point vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+
+void arm_sub_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+    f16x8_t vec1;
+    f16x8_t vec2;
+    f16x8_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+      /* Add and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrcA);
+        vec2 = vld1q(pSrcB);
+        res = vsubq(vec1, vec2);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8; 
+        pDst += 8;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+
+    if (blkCnt > 0U)
+    {
+      /* C = A + B */
+      mve_pred16_t p0 = vctp16q(blkCnt);
+      vec1 = vld1q(pSrcA);
+      vec2 = vld1q(pSrcB);
+      vstrhq_p(pDst, vsubq(vec1,vec2), p0);
+    }
+
+}
+
+#else
+#if defined(ARM_FLOAT16_SUPPORTED)
+void arm_sub_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++);
+
+    *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++);
+
+    *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++);
+
+    *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (_Float16)(*pSrcA++) - (_Float16)(*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
index 67556e49..2a07c0c6 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f32.c
@@ -1,148 +1,202 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sub_f32.c
- * Description:  Floating-point vector subtraction
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @defgroup BasicSub Vector Subtraction
-
-  Element-by-element subtraction of two vectors.
-
-  <pre>
-      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
-  </pre>
-
-  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup BasicSub
-  @{
- */
-
-/**
-  @brief         Floating-point vector subtraction.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_sub_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t vec1;
-    float32x4_t vec2;
-    float32x4_t res;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        /* C = A - B */
-
-        /* Subtract and then store the results in the destination buffer. */
-        vec1 = vld1q_f32(pSrcA);
-        vec2 = vld1q_f32(pSrcB);
-        res = vsubq_f32(vec1, vec2);
-        vst1q_f32(pDst, res);
-
-        /* Increment pointers */
-        pSrcA += 4;
-        pSrcB += 4; 
-        pDst += 4;
-        
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = blockSize & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-    /* Subtract and store result in destination buffer. */
-    *pDst++ = (*pSrcA++) - (*pSrcB++);
-
-    *pDst++ = (*pSrcA++) - (*pSrcB++);
-
-    *pDst++ = (*pSrcA++) - (*pSrcB++);
-
-    *pDst++ = (*pSrcA++) - (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-    /* Subtract and store result in destination buffer. */
-    *pDst++ = (*pSrcA++) - (*pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_f32.c
+ * Description:  Floating-point vector subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup BasicSub Vector Subtraction
+
+  Element-by-element subtraction of two vectors.
+
+  <pre>
+      pDst[n] = pSrcA[n] - pSrcB[n],   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating-point, Q7, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Floating-point vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_sub_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+
+    f32x4_t vec1;
+    f32x4_t vec2;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A + B */
+
+      /* Add and then store the results in the destination buffer. */
+        vec1 = vld1q(pSrcA);
+        vec2 = vld1q(pSrcB);
+        res = vsubq(vec1, vec2);
+        vst1q(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+    if (blkCnt > 0U)
+    {
+      /* C = A + B */
+      mve_pred16_t p0 = vctp32q(blkCnt);
+      vec1 = vld1q(pSrcA);
+      vec2 = vld1q(pSrcB);
+      vstrwq_p(pDst, vsubq(vec1,vec2), p0);
+    }
+
+}
+
+#else
+void arm_sub_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    f32x4_t vec1;
+    f32x4_t vec2;
+    f32x4_t res;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        /* C = A - B */
+
+        /* Subtract and then store the results in the destination buffer. */
+        vec1 = vld1q_f32(pSrcA);
+        vec2 = vld1q_f32(pSrcB);
+        res = vsubq_f32(vec1, vec2);
+        vst1q_f32(pDst, res);
+
+        /* Increment pointers */
+        pSrcA += 4;
+        pSrcB += 4; 
+        pDst += 4;
+        
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f64.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f64.c
new file mode 100644
index 00000000..e409e2ae
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_f64.c
+ * Description:  Floating-point vector subtraction
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Floating-point vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_sub_f64(
+  const float64_t * pSrcA,
+  const float64_t * pSrcB,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (*pSrcA++) - (*pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
index 07420c28..5f05d4f2 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q15.c
@@ -1,126 +1,178 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sub_q15.c
- * Description:  Q15 vector subtraction
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicSub
-  @{
- */
-
-/**
-  @brief         Q15 vector subtraction.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-void arm_sub_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-  q31_t inA1, inA2;
-  q31_t inB1, inB2;
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-#if defined (ARM_MATH_DSP)
-    /* read 2 times 2 samples at a time from sourceA */
-    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
-    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
-    /* read 2 times 2 samples at a time from sourceB */
-    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
-    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
-
-    /* Subtract and store 2 times 2 samples at a time */
-    write_q15x2_ia (&pDst, __QSUB16(inA1, inB1));
-    write_q15x2_ia (&pDst, __QSUB16(inA2, inB2));
-#else
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-    /* Subtract and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-    *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
-#else
-    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_q15.c
+ * Description:  Q15 vector subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Q15 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_sub_q15(
+    const q15_t * pSrcA,
+    const q15_t * pSrcB,
+    q15_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecA;
+    q15x8_t vecB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A - B
+         * Subtract and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqsubq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 8;
+        pSrcB  += 8;
+        pDst   += 8;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrhq_p(pDst, vqsubq(vecA, vecB), p0);
+    }
+}
+
+
+#else
+void arm_sub_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+  q31_t inA1, inA2;
+  q31_t inB1, inB2;
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 times 2 samples at a time from sourceA */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcA);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcA);
+    /* read 2 times 2 samples at a time from sourceB */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcB);
+    inB2 = read_q15x2_ia ((q15_t **) &pSrcB);
+
+    /* Subtract and store 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, __QSUB16(inA1, inB1));
+    write_q15x2_ia (&pDst, __QSUB16(inA2, inB2));
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+    *pDst++ = (q15_t) __QSUB16(*pSrcA++, *pSrcB++);
+#else
+    *pDst++ = (q15_t) __SSAT(((q31_t) *pSrcA++ - *pSrcB++), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
index bd94ba5f..ed879a1e 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q31.c
@@ -1,108 +1,159 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sub_q31.c
- * Description:  Q31 vector subtraction
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicSub
-  @{
- */
-
-/**
-  @brief         Q31 vector subtraction.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
- */
-
-void arm_sub_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-    /* Subtract and store result in destination buffer. */
-    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
-
-    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
-
-    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
-
-    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-    /* Subtract and store result in destination buffer. */
-    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_q31.c
+ * Description:  Q31 vector subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Q31 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_sub_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;   
+    q31x4_t vecA;
+    q31x4_t vecB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A + B
+         * Add and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqsubq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 4;
+        pSrcB  += 4;
+        pDst   += 4;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrwq_p(pDst, vqsubq(vecA, vecB), p0);
+    }
+}
+
+#else
+void arm_sub_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = __QSUB(*pSrcA++, *pSrcB++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
index ce65350e..3fb9d94e 100644
--- a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_sub_q7.c
@@ -1,109 +1,158 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sub_q7.c
- * Description:  Q7 vector subtraction
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMath
- */
-
-/**
-  @addtogroup BasicSub
-  @{
- */
-
-/**
-  @brief         Q7 vector subtraction.
-  @param[in]     pSrcA      points to the first input vector
-  @param[in]     pSrcB      points to the second input vector
-  @param[out]    pDst       points to the output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- */
-
-void arm_sub_q7(
-  const q7_t * pSrcA,
-  const q7_t * pSrcB,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-#if defined (ARM_MATH_DSP)
-    /* Subtract and store result in destination buffer (4 samples at a time). */
-    write_q7x4_ia (&pDst, __QSUB8(read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
-#else
-    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
-    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
-    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
-    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A - B */
-
-    /* Subtract and store result in destination buffer. */
-    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of BasicSub group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sub_q7.c
+ * Description:  Q7 vector subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup BasicSub
+  @{
+ */
+
+/**
+  @brief         Q7 vector subtraction.
+  @param[in]     pSrcA      points to the first input vector
+  @param[in]     pSrcB      points to the second input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_sub_q7(
+    const q7_t * pSrcA,
+    const q7_t * pSrcB,
+    q7_t * pDst,
+    uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecA;
+    q7x16_t vecB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C = A - B
+         * Subtract and then store the results in the destination buffer.
+         */
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vst1q(pDst, vqsubq(vecA, vecB));
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        /*
+         * advance vector source and destination pointers
+         */
+        pSrcA  += 16;
+        pSrcB  += 16;
+        pDst   += 16;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecA = vld1q(pSrcA);
+        vecB = vld1q(pSrcB);
+        vstrbq_p(pDst, vqsubq(vecA, vecB), p0);
+    }
+}
+#else
+void arm_sub_q7(
+  const q7_t * pSrcA,
+  const q7_t * pSrcB,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+#if defined (ARM_MATH_DSP)
+    /* Subtract and store result in destination buffer (4 samples at a time). */
+    write_q7x4_ia (&pDst, __QSUB8(read_q7x4_ia ((q7_t **) &pSrcA), read_q7x4_ia ((q7_t **) &pSrcB)));
+#else
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A - B */
+
+    /* Subtract and store result in destination buffer. */
+    *pDst++ = (q7_t) __SSAT((q15_t) *pSrcA++ - *pSrcB++, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c
new file mode 100644
index 00000000..54042ea7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u16.c
@@ -0,0 +1,137 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_xor_u16.c
+ * Description:  uint16_t bitwise exclusive OR
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @defgroup Xor Vector bitwise exclusive OR
+
+  Compute the logical bitwise XOR.
+
+  There are separate functions for uint32_t, uint16_t, and uint8_t data types.
+ */
+
+/**
+  @addtogroup Xor
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise XOR of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_xor_u16(
+    const uint16_t * pSrcA,
+    const uint16_t * pSrcB,
+          uint16_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t vecSrcA, vecSrcB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, veorq_u16(vecSrcA, vecSrcB) );
+
+        pSrcA += 8;
+        pSrcB += 8;
+        pDst  += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrhq_p(pDst, veorq_u16(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint16x8_t vecA, vecB;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u16(pSrcA);
+        vecB = vld1q_u16(pSrcB);
+
+        vst1q_u16(pDst, veorq_u16(vecA, vecB) );
+
+        pSrcA += 8;
+        pSrcB += 8;
+        pDst  += 8;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)^(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of Xor group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c
new file mode 100644
index 00000000..9d149084
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u32.c
@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_xor_u32.c
+ * Description:  uint32_t bitwise exclusive OR
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup Xor
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise XOR of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_xor_u32(
+    const uint32_t * pSrcA,
+    const uint32_t * pSrcB,
+          uint32_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t vecSrcA, vecSrcB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, veorq_u32(vecSrcA, vecSrcB) );
+
+        pSrcA += 4;
+        pSrcB += 4;
+        pDst  += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrwq_p(pDst, veorq_u32(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint32x4_t vecA, vecB;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u32(pSrcA);
+        vecB = vld1q_u32(pSrcB);
+
+        vst1q_u32(pDst, veorq_u32(vecA, vecB) );
+
+        pSrcA += 4;
+        pSrcB += 4;
+        pDst  += 4;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)^(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of Xor group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c
new file mode 100644
index 00000000..d708cd4e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BasicMathFunctions/arm_xor_u8.c
@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_xor_u8.c
+ * Description:  uint8_t bitwise exclusive OR
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/basic_math_functions.h"
+
+/**
+  @ingroup groupMath
+ */
+
+/**
+  @addtogroup Xor
+  @{
+ */
+
+/**
+  @brief         Compute the logical bitwise XOR of two fixed-point vectors.
+  @param[in]     pSrcA      points to input vector A
+  @param[in]     pSrcB      points to input vector B
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+void arm_xor_u8(
+    const uint8_t * pSrcA,
+    const uint8_t * pSrcB,
+          uint8_t * pDst,
+          uint32_t blockSize)
+{
+    uint32_t blkCnt;      /* Loop counter */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t vecSrcA, vecSrcB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4;
+
+    while (blkCnt > 0U)
+    {
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+
+        vst1q(pDst, veorq_u8(vecSrcA, vecSrcB) );
+
+        pSrcA += 16;
+        pSrcB += 16;
+        pDst  += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        vstrbq_p(pDst, veorq_u8(vecSrcA, vecSrcB), p0);
+    }
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    uint8x16_t vecA, vecB;
+
+    /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4U;
+
+    while (blkCnt > 0U)
+    {
+        vecA = vld1q_u8(pSrcA);
+        vecB = vld1q_u8(pSrcB);
+
+        vst1q_u8(pDst, veorq_u8(vecA, vecB) );
+
+        pSrcA += 16;
+        pSrcB += 16;
+        pDst  += 16;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0xF;
+#else
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+#endif
+
+    while (blkCnt > 0U)
+    {
+        *pDst++ = (*pSrcA++)^(*pSrcB++);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+#endif /* if defined(ARM_MATH_MVEI) */
+}
+
+/**
+  @} end of Xor group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c b/Libraries/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c
new file mode 100644
index 00000000..4a553dc1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BayesFunctions/BayesFunctions.c
@@ -0,0 +1,29 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BayesFunctions.c
+ * Description:  Combination of all bayes function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_gaussian_naive_bayes_predict_f32.c"
diff --git a/Libraries/CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c b/Libraries/CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c
new file mode 100755
index 00000000..57ced8ca
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BayesFunctions/BayesFunctionsF16.c
@@ -0,0 +1,27 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BayesFunctions.c
+ * Description:  Combination of all bayes function f16 source files.
+ *
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_gaussian_naive_bayes_predict_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c b/Libraries/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c
new file mode 100755
index 00000000..e3b2ef66
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c
@@ -0,0 +1,207 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_naive_gaussian_bayes_predict_f16
+ * Description:  Naive Gaussian Bayesian Estimator
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/bayes_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup groupBayes
+ * @{
+ */
+
+/**
+ * @brief Naive Gaussian Bayesian Estimator
+ *
+ * @param[in]  *S                       points to a naive bayes instance structure
+ * @param[in]  *in                      points to the elements of the input vector.
+ * @param[out] *pOutputProbabilities    points to a buffer of length numberOfClasses containing estimated probabilities
+ * @param[out] *pBufferB                points to a temporary buffer of length numberOfClasses
+ * @return The predicted class
+ *
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+uint32_t arm_gaussian_naive_bayes_predict_f16(const arm_gaussian_naive_bayes_instance_f16 *S, 
+   const float16_t * in, 
+   float16_t *pOutputProbabilities,
+   float16_t *pBufferB
+   )
+{
+    uint32_t         nbClass;
+    const float16_t *pTheta = S->theta;
+    const float16_t *pSigma = S->sigma;
+    float16_t      *buffer = pOutputProbabilities;
+    const float16_t *pIn = in;
+    float16_t       result;
+    f16x8_t         vsigma;
+    _Float16       tmp;
+    f16x8_t         vacc1, vacc2;
+    uint32_t        index;
+    float16_t       *logclassPriors=pBufferB;
+    float16_t      *pLogPrior = logclassPriors;
+
+    arm_vlog_f16((float16_t *) S->classPriors, logclassPriors, S->numberOfClasses);
+
+    pTheta = S->theta;
+    pSigma = S->sigma;
+
+    for (nbClass = 0; nbClass < S->numberOfClasses; nbClass++) {
+        pIn = in;
+
+        vacc1 = vdupq_n_f16(0.0f16);
+        vacc2 = vdupq_n_f16(0.0f16);
+
+        uint32_t         blkCnt =S->vectorDimension >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vinvSigma, vtmp;
+
+            vsigma = vaddq_n_f16(vld1q(pSigma), S->epsilon);
+            vacc1 = vaddq(vacc1, vlogq_f16(vmulq_n_f16(vsigma, 2.0f16 * (_Float16)PI)));
+
+            vinvSigma = vrecip_medprec_f16(vsigma);
+
+            vtmp = vsubq(vld1q(pIn), vld1q(pTheta));
+            /* squaring */
+            vtmp = vmulq(vtmp, vtmp);
+
+            vacc2 = vfmaq(vacc2, vtmp, vinvSigma);
+
+            pIn += 8;
+            pTheta += 8;
+            pSigma += 8;
+            blkCnt--;
+        }
+
+        blkCnt = S->vectorDimension & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vinvSigma, vtmp;
+
+            vsigma = vaddq_n_f16(vld1q(pSigma), S->epsilon);
+            vacc1 =
+                vaddq_m_f16(vacc1, vacc1, vlogq_f16(vmulq_n_f16(vsigma, 2.0f16 * (_Float16)PI)), p0);
+
+            vinvSigma = vrecip_medprec_f16(vsigma);
+
+            vtmp = vsubq(vld1q(pIn), vld1q(pTheta));
+            /* squaring */
+            vtmp = vmulq(vtmp, vtmp);
+
+            vacc2 = vfmaq_m_f16(vacc2, vtmp, vinvSigma, p0);
+
+            pTheta += blkCnt;
+            pSigma += blkCnt;
+        }
+
+        tmp = -0.5f16 * (_Float16)vecAddAcrossF16Mve(vacc1);
+        tmp -= 0.5f16 * (_Float16)vecAddAcrossF16Mve(vacc2);
+
+        *buffer = (_Float16)tmp + (_Float16)*pLogPrior++;
+        buffer++;
+    }
+
+    arm_max_f16(pOutputProbabilities, S->numberOfClasses, &result, &index);
+
+    return (index);
+}
+
+#else
+
+uint32_t arm_gaussian_naive_bayes_predict_f16(const arm_gaussian_naive_bayes_instance_f16 *S, 
+   const float16_t * in, 
+   float16_t *pOutputProbabilities,
+   float16_t *pBufferB)
+{
+    uint32_t nbClass;
+    uint32_t nbDim;
+    const float16_t *pPrior = S->classPriors;
+    const float16_t *pTheta = S->theta;
+    const float16_t *pSigma = S->sigma;
+    float16_t *buffer = pOutputProbabilities;
+    const float16_t *pIn=in;
+    float16_t result;
+    _Float16 sigma;
+    _Float16 tmp;
+    _Float16 acc1,acc2;
+    uint32_t index;
+    (void)pBufferB;
+
+    pTheta=S->theta;
+    pSigma=S->sigma;
+
+    for(nbClass = 0; nbClass < S->numberOfClasses; nbClass++)
+    {
+
+        
+        pIn = in;
+
+        tmp = 0.0f16;
+        acc1 = 0.0f16;
+        acc2 = 0.0f16;
+        for(nbDim = 0; nbDim < S->vectorDimension; nbDim++)
+        {
+           sigma = (_Float16)*pSigma + (_Float16)S->epsilon;
+           acc1 += (_Float16)logf(2.0f * PI * (float32_t)sigma);
+           acc2 += ((_Float16)*pIn - (_Float16)*pTheta) * ((_Float16)*pIn - (_Float16)*pTheta) / (_Float16)sigma;
+
+           pIn++;
+           pTheta++;
+           pSigma++;
+        }
+
+        tmp = -0.5f16 * (_Float16)acc1;
+        tmp -= 0.5f16 * (_Float16)acc2;
+
+
+        *buffer = (_Float16)tmp + (_Float16)logf((float32_t)*pPrior++);
+        buffer++;
+    }
+
+    arm_max_f16(pOutputProbabilities,S->numberOfClasses,&result,&index);
+
+    return(index);
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of groupBayes group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c b/Libraries/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c
new file mode 100755
index 00000000..56331ff5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f32.c
@@ -0,0 +1,396 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_naive_gaussian_bayes_predict_f32
+ * Description:  Naive Gaussian Bayesian Estimator
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/bayes_functions.h"
+#include <limits.h>
+#include <math.h>
+
+#define PI_F 3.1415926535897932384626433832795f
+#define DPI_F (2.0f*3.1415926535897932384626433832795f)
+
+/**
+ * @addtogroup groupBayes
+ * @{
+ */
+
+/**
+ * @brief Naive Gaussian Bayesian Estimator
+ *
+ * @param[in]   *S                      points to a naive bayes instance structure
+ * @param[in]   *in                     points to the elements of the input vector.
+ * @param[out]  *pOutputProbabilities   points to a buffer of length numberOfClasses containing estimated probabilities
+ * @param[out]  *pBufferB               points to a temporary buffer of length numberOfClasses
+ * @return The predicted class
+ *
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, 
+   const float32_t * in, 
+   float32_t *pOutputProbabilities,
+   float32_t *pBufferB
+   )
+{
+    uint32_t         nbClass;
+    const float32_t *pTheta = S->theta;
+    const float32_t *pSigma = S->sigma;
+    float32_t      *buffer = pOutputProbabilities;
+    const float32_t *pIn = in;
+    float32_t       result;
+    f32x4_t         vsigma;
+    float32_t       tmp;
+    f32x4_t         vacc1, vacc2;
+    uint32_t        index;
+    float32_t       *logclassPriors=pBufferB;
+    float32_t      *pLogPrior = logclassPriors;
+
+    arm_vlog_f32((float32_t *) S->classPriors, logclassPriors, S->numberOfClasses);
+
+    pTheta = S->theta;
+    pSigma = S->sigma;
+
+    for (nbClass = 0; nbClass < S->numberOfClasses; nbClass++) {
+        pIn = in;
+
+        vacc1 = vdupq_n_f32(0);
+        vacc2 = vdupq_n_f32(0);
+
+        uint32_t         blkCnt =S->vectorDimension >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vinvSigma, vtmp;
+
+            vsigma = vaddq_n_f32(vld1q(pSigma), S->epsilon);
+            vacc1 = vaddq(vacc1, vlogq_f32(vmulq_n_f32(vsigma, 2.0f * PI)));
+
+            vinvSigma = vrecip_medprec_f32(vsigma);
+
+            vtmp = vsubq(vld1q(pIn), vld1q(pTheta));
+            /* squaring */
+            vtmp = vmulq(vtmp, vtmp);
+
+            vacc2 = vfmaq(vacc2, vtmp, vinvSigma);
+
+            pIn += 4;
+            pTheta += 4;
+            pSigma += 4;
+            blkCnt--;
+        }
+
+        blkCnt = S->vectorDimension & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vinvSigma, vtmp;
+
+            vsigma = vaddq_n_f32(vld1q(pSigma), S->epsilon);
+            vacc1 =
+                vaddq_m_f32(vacc1, vacc1, vlogq_f32(vmulq_n_f32(vsigma, 2.0f * PI)), p0);
+
+            vinvSigma = vrecip_medprec_f32(vsigma);
+
+            vtmp = vsubq(vld1q(pIn), vld1q(pTheta));
+            /* squaring */
+            vtmp = vmulq(vtmp, vtmp);
+
+            vacc2 = vfmaq_m_f32(vacc2, vtmp, vinvSigma, p0);
+
+            pTheta += blkCnt;
+            pSigma += blkCnt;
+        }
+
+        tmp = -0.5f * vecAddAcrossF32Mve(vacc1);
+        tmp -= 0.5f * vecAddAcrossF32Mve(vacc2);
+
+        *buffer = tmp + *pLogPrior++;
+        buffer++;
+    }
+
+    arm_max_f32(pOutputProbabilities, S->numberOfClasses, &result, &index);
+
+    return (index);
+}
+
+#else
+
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+
+
+uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, 
+   const float32_t * in, 
+   float32_t *pOutputProbabilities,
+   float32_t *pBufferB)
+{
+    
+    const float32_t *pPrior = S->classPriors;
+
+    const float32_t *pTheta = S->theta;
+    const float32_t *pSigma = S->sigma;
+
+    const float32_t *pTheta1 = S->theta + S->vectorDimension;
+    const float32_t *pSigma1 = S->sigma + S->vectorDimension;
+
+    float32_t *buffer = pOutputProbabilities;
+    const float32_t *pIn=in;
+
+    float32_t result;
+    float32_t sigma,sigma1;
+    float32_t tmp,tmp1;
+    uint32_t index;
+    uint32_t vecBlkCnt;
+    uint32_t classBlkCnt;
+    float32x4_t epsilonV;
+    float32x4_t sigmaV,sigmaV1;
+    float32x4_t tmpV,tmpVb,tmpV1;
+    float32x2_t tmpV2;
+    float32x4_t thetaV,thetaV1;
+    float32x4_t inV;
+    (void)pBufferB;
+
+    epsilonV = vdupq_n_f32(S->epsilon);
+
+    classBlkCnt = S->numberOfClasses >> 1;
+    while(classBlkCnt > 0)
+    {
+
+        
+        pIn = in;
+
+        tmp = logf(*pPrior++);
+        tmp1 = logf(*pPrior++);
+        tmpV = vdupq_n_f32(0.0f);
+        tmpV1 = vdupq_n_f32(0.0f);
+
+        vecBlkCnt = S->vectorDimension >> 2;
+        while(vecBlkCnt > 0)
+        {
+           sigmaV = vld1q_f32(pSigma);
+           thetaV = vld1q_f32(pTheta);
+
+           sigmaV1 = vld1q_f32(pSigma1);
+           thetaV1 = vld1q_f32(pTheta1);
+
+           inV = vld1q_f32(pIn);
+
+           sigmaV = vaddq_f32(sigmaV, epsilonV);
+           sigmaV1 = vaddq_f32(sigmaV1, epsilonV);
+
+           tmpVb = vmulq_n_f32(sigmaV,DPI_F);
+           tmpVb = vlogq_f32(tmpVb);
+           tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f);
+
+           tmpVb = vmulq_n_f32(sigmaV1,DPI_F);
+           tmpVb = vlogq_f32(tmpVb);
+           tmpV1 = vmlsq_n_f32(tmpV1,tmpVb,0.5f);
+           
+           tmpVb = vsubq_f32(inV,thetaV);
+           tmpVb = vmulq_f32(tmpVb,tmpVb);
+           tmpVb = vmulq_f32(tmpVb, vinvq_f32(sigmaV));
+           tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f);
+
+           tmpVb = vsubq_f32(inV,thetaV1);
+           tmpVb = vmulq_f32(tmpVb,tmpVb);
+           tmpVb = vmulq_f32(tmpVb, vinvq_f32(sigmaV1));
+           tmpV1 = vmlsq_n_f32(tmpV1,tmpVb,0.5f);
+
+           pIn += 4;
+           pTheta += 4;
+           pSigma += 4;
+           pTheta1 += 4;
+           pSigma1 += 4;
+
+           vecBlkCnt--;
+        }
+        tmpV2 = vpadd_f32(vget_low_f32(tmpV),vget_high_f32(tmpV));
+        tmp += vget_lane_f32(tmpV2, 0) + vget_lane_f32(tmpV2, 1);
+         
+        tmpV2 = vpadd_f32(vget_low_f32(tmpV1),vget_high_f32(tmpV1));
+        tmp1 += vget_lane_f32(tmpV2, 0) + vget_lane_f32(tmpV2, 1);
+
+        vecBlkCnt = S->vectorDimension & 3;
+        while(vecBlkCnt > 0)
+        {
+           sigma = *pSigma + S->epsilon;
+           sigma1 = *pSigma1 + S->epsilon;
+
+           tmp -= 0.5f*logf(2.0f * PI_F * sigma);
+           tmp -= 0.5f*(*pIn - *pTheta) * (*pIn - *pTheta) / sigma;
+
+           tmp1 -= 0.5f*logf(2.0f * PI_F * sigma1);
+           tmp1 -= 0.5f*(*pIn - *pTheta1) * (*pIn - *pTheta1) / sigma1;
+
+           pIn++;
+           pTheta++;
+           pSigma++;
+           pTheta1++;
+           pSigma1++;
+           vecBlkCnt--;
+        }
+
+        *buffer++ = tmp;
+        *buffer++ = tmp1;
+
+        pSigma += S->vectorDimension;
+        pTheta += S->vectorDimension;
+        pSigma1 += S->vectorDimension;
+        pTheta1 += S->vectorDimension;
+        
+        classBlkCnt--;
+    }
+
+    classBlkCnt = S->numberOfClasses & 1;
+
+    while(classBlkCnt > 0)
+    {
+
+        
+        pIn = in;
+
+        tmp = logf(*pPrior++);
+        tmpV = vdupq_n_f32(0.0f);
+
+        vecBlkCnt = S->vectorDimension >> 2;
+        while(vecBlkCnt > 0)
+        {
+           sigmaV = vld1q_f32(pSigma);
+           thetaV = vld1q_f32(pTheta);
+           inV = vld1q_f32(pIn);
+
+           sigmaV = vaddq_f32(sigmaV, epsilonV);
+
+           tmpVb = vmulq_n_f32(sigmaV,DPI_F);
+           tmpVb = vlogq_f32(tmpVb);
+           tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f);
+           
+           tmpVb = vsubq_f32(inV,thetaV);
+           tmpVb = vmulq_f32(tmpVb,tmpVb);
+           tmpVb = vmulq_f32(tmpVb, vinvq_f32(sigmaV));
+           tmpV = vmlsq_n_f32(tmpV,tmpVb,0.5f);
+
+           pIn += 4;
+           pTheta += 4;
+           pSigma += 4;
+
+           vecBlkCnt--;
+        }
+        tmpV2 = vpadd_f32(vget_low_f32(tmpV),vget_high_f32(tmpV));
+        tmp += vget_lane_f32(tmpV2, 0) + vget_lane_f32(tmpV2, 1);
+
+        vecBlkCnt = S->vectorDimension & 3;
+        while(vecBlkCnt > 0)
+        {
+           sigma = *pSigma + S->epsilon;
+           tmp -= 0.5f*logf(2.0f * PI_F * sigma);
+           tmp -= 0.5f*(*pIn - *pTheta) * (*pIn - *pTheta) / sigma;
+
+           pIn++;
+           pTheta++;
+           pSigma++;
+           vecBlkCnt--;
+        }
+
+        *buffer++ = tmp;
+        
+        classBlkCnt--;
+    }
+
+    arm_max_f32(pOutputProbabilities,S->numberOfClasses,&result,&index);
+
+    return(index);
+}
+
+#else
+
+uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, 
+   const float32_t * in, 
+   float32_t *pOutputProbabilities,
+   float32_t *pBufferB)
+{
+    uint32_t nbClass;
+    uint32_t nbDim;
+    const float32_t *pPrior = S->classPriors;
+    const float32_t *pTheta = S->theta;
+    const float32_t *pSigma = S->sigma;
+    float32_t *buffer = pOutputProbabilities;
+    const float32_t *pIn=in;
+    float32_t result;
+    float32_t sigma;
+    float32_t tmp;
+    float32_t acc1,acc2;
+    uint32_t index;
+
+    (void)pBufferB;
+
+    pTheta=S->theta;
+    pSigma=S->sigma;
+
+    for(nbClass = 0; nbClass < S->numberOfClasses; nbClass++)
+    {
+
+        
+        pIn = in;
+
+        tmp = 0.0;
+        acc1 = 0.0f;
+        acc2 = 0.0f;
+        for(nbDim = 0; nbDim < S->vectorDimension; nbDim++)
+        {
+           sigma = *pSigma + S->epsilon;
+           acc1 += logf(2.0f * PI_F * sigma);
+           acc2 += (*pIn - *pTheta) * (*pIn - *pTheta) / sigma;
+
+           pIn++;
+           pTheta++;
+           pSigma++;
+        }
+
+        tmp = -0.5f * acc1;
+        tmp -= 0.5f * acc2;
+
+
+        *buffer = tmp + logf(*pPrior++);
+        buffer++;
+    }
+
+    arm_max_f32(pOutputProbabilities,S->numberOfClasses,&result,&index);
+
+    return(index);
+}
+
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of groupBayes group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c b/Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c
index 02ea6b0a..1a387c35 100644
--- a/Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/CommonTables.c
@@ -1,31 +1,31 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        CommonTables.c
- * Description:  Combination of all common table source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_common_tables.c"
-#include "arm_const_structs.c"
-
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CommonTables.c
+ * Description:  Combination of all common table source files.
+ *
+ * $Date:        08. January 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_common_tables.c"
+#include "arm_const_structs.c"
+#include "arm_mve_tables.c"
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/CommonTablesF16.c b/Libraries/CMSIS/DSP/Source/CommonTables/CommonTablesF16.c
new file mode 100755
index 00000000..c3e79d74
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/CommonTablesF16.c
@@ -0,0 +1,31 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CommonTables.c
+ * Description:  Combination of all common table source files.
+ *
+ * $Date:        08. January 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_common_tables_f16.c"
+#include "arm_const_structs_f16.c"
+#include "arm_mve_tables_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
index 1b80c191..b3cb89cd 100644
--- a/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables.c
@@ -1,57215 +1,70576 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_common_tables.c
- * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup ComplexFFT
- */
-
-/**
-  @addtogroup CFFT_CIFFT Complex FFT Tables
-  @{
- */
-
-/**
-  @par
-  Pseudo code for Generation of Bit reversal Table is
-  @par
-  <pre>for (l = 1; l <= N/4; l++)
-  {
-    for (i = 0; i< logN2; i++)
-    {
-      a[i] = l & (1 << i);
-    }
-    for (j = 0; j < logN2; j++)
-    {
-      if (a[j] != 0)
-      y[l] += (1 << ((logN2 - 1) - j));
-    }
-    y[l] = y[l] >> 1;
-   } </pre>
-  @par
-  where N = 4096, logN2 = 12
-  @par
-  N is the maximum FFT Size supported
-*/
-
-/**
-  @brief  Table for bit reversal process
-*/
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
-const uint16_t armBitRevTable[1024] = {
-   0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x080, 0x480, 0x280,
-   0x680, 0x180, 0x580, 0x380, 0x780, 0x040, 0x440, 0x240, 0x640, 0x140,
-   0x540, 0x340, 0x740, 0x0c0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
-   0x7c0, 0x020, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0x0a0,
-   0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x060, 0x460, 0x260,
-   0x660, 0x160, 0x560, 0x360, 0x760, 0x0e0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
-   0x5e0, 0x3e0, 0x7e0, 0x010, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
-   0x710, 0x090, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x050,
-   0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0x0d0, 0x4d0, 0x2d0,
-   0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x030, 0x430, 0x230, 0x630, 0x130,
-   0x530, 0x330, 0x730, 0x0b0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
-   0x7b0, 0x070, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0x0f0,
-   0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x008, 0x408, 0x208,
-   0x608, 0x108, 0x508, 0x308, 0x708, 0x088, 0x488, 0x288, 0x688, 0x188,
-   0x588, 0x388, 0x788, 0x048, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
-   0x748, 0x0c8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x028,
-   0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0x0a8, 0x4a8, 0x2a8,
-   0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x068, 0x468, 0x268, 0x668, 0x168,
-   0x568, 0x368, 0x768, 0x0e8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
-   0x7e8, 0x018, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x098,
-   0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x058, 0x458, 0x258,
-   0x658, 0x158, 0x558, 0x358, 0x758, 0x0d8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
-   0x5d8, 0x3d8, 0x7d8, 0x038, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
-   0x738, 0x0b8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x078,
-   0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0x0f8, 0x4f8, 0x2f8,
-   0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x004, 0x404, 0x204, 0x604, 0x104,
-   0x504, 0x304, 0x704, 0x084, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
-   0x784, 0x044, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0x0c4,
-   0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x024, 0x424, 0x224,
-   0x624, 0x124, 0x524, 0x324, 0x724, 0x0a4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
-   0x5a4, 0x3a4, 0x7a4, 0x064, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
-   0x764, 0x0e4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x014,
-   0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x094, 0x494, 0x294,
-   0x694, 0x194, 0x594, 0x394, 0x794, 0x054, 0x454, 0x254, 0x654, 0x154,
-   0x554, 0x354, 0x754, 0x0d4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
-   0x7d4, 0x034, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0x0b4,
-   0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x074, 0x474, 0x274,
-   0x674, 0x174, 0x574, 0x374, 0x774, 0x0f4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
-   0x5f4, 0x3f4, 0x7f4, 0x00c, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
-   0x70c, 0x08c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x04c,
-   0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0x0cc, 0x4cc, 0x2cc,
-   0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x02c, 0x42c, 0x22c, 0x62c, 0x12c,
-   0x52c, 0x32c, 0x72c, 0x0ac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
-   0x7ac, 0x06c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0x0ec,
-   0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x01c, 0x41c, 0x21c,
-   0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x09c, 0x49c, 0x29c, 0x69c, 0x19c,
-   0x59c, 0x39c, 0x79c, 0x05c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
-   0x75c, 0x0dc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x03c,
-   0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0x0bc, 0x4bc, 0x2bc,
-   0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x07c, 0x47c, 0x27c, 0x67c, 0x17c,
-   0x57c, 0x37c, 0x77c, 0x0fc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
-   0x7fc, 0x002, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x082,
-   0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x042, 0x442, 0x242,
-   0x642, 0x142, 0x542, 0x342, 0x742, 0x0c2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
-   0x5c2, 0x3c2, 0x7c2, 0x022, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
-   0x722, 0x0a2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x062,
-   0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0x0e2, 0x4e2, 0x2e2,
-   0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x012, 0x412, 0x212, 0x612, 0x112,
-   0x512, 0x312, 0x712, 0x092, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
-   0x792, 0x052, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0x0d2,
-   0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x032, 0x432, 0x232,
-   0x632, 0x132, 0x532, 0x332, 0x732, 0x0b2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
-   0x5b2, 0x3b2, 0x7b2, 0x072, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
-   0x772, 0x0f2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0x00a,
-   0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x08a, 0x48a, 0x28a,
-   0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x04a, 0x44a, 0x24a, 0x64a, 0x14a,
-   0x54a, 0x34a, 0x74a, 0x0ca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
-   0x7ca, 0x02a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0x0aa,
-   0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x06a, 0x46a, 0x26a,
-   0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0x0ea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
-   0x5ea, 0x3ea, 0x7ea, 0x01a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
-   0x71a, 0x09a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
-   0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0x0da, 0x4da, 0x2da,
-   0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x03a, 0x43a, 0x23a, 0x63a, 0x13a,
-   0x53a, 0x33a, 0x73a, 0x0ba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
-   0x7ba, 0x07a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0x0fa,
-   0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x006, 0x406, 0x206,
-   0x606, 0x106, 0x506, 0x306, 0x706, 0x086, 0x486, 0x286, 0x686, 0x186,
-   0x586, 0x386, 0x786, 0x046, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
-   0x746, 0x0c6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x026,
-   0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0x0a6, 0x4a6, 0x2a6,
-   0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x066, 0x466, 0x266, 0x666, 0x166,
-   0x566, 0x366, 0x766, 0x0e6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
-   0x7e6, 0x016, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x096,
-   0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x056, 0x456, 0x256,
-   0x656, 0x156, 0x556, 0x356, 0x756, 0x0d6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
-   0x5d6, 0x3d6, 0x7d6, 0x036, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
-   0x736, 0x0b6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x076,
-   0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0x0f6, 0x4f6, 0x2f6,
-   0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0x00e, 0x40e, 0x20e, 0x60e, 0x10e,
-   0x50e, 0x30e, 0x70e, 0x08e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
-   0x78e, 0x04e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0x0ce,
-   0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x02e, 0x42e, 0x22e,
-   0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0x0ae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
-   0x5ae, 0x3ae, 0x7ae, 0x06e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
-   0x76e, 0x0ee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x01e,
-   0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x09e, 0x49e, 0x29e,
-   0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x05e, 0x45e, 0x25e, 0x65e, 0x15e,
-   0x55e, 0x35e, 0x75e, 0x0de, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
-   0x7de, 0x03e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0x0be,
-   0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x07e, 0x47e, 0x27e,
-   0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0x0fe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
-   0x5fe, 0x3fe, 0x7fe, 0x001
-};
-#endif
-/**
-  @brief  Floating-point Twiddle factors Table Generation
-*/
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for (i = 0; i < N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 16, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_16[32] = {
-    1.000000000f,  0.000000000f,
-    0.923879533f,  0.382683432f,
-    0.707106781f,  0.707106781f,
-    0.382683432f,  0.923879533f,
-    0.000000000f,  1.000000000f,
-   -0.382683432f,  0.923879533f,
-   -0.707106781f,  0.707106781f,
-   -0.923879533f,  0.382683432f,
-   -1.000000000f,  0.000000000f,
-   -0.923879533f, -0.382683432f,
-   -0.707106781f, -0.707106781f,
-   -0.382683432f, -0.923879533f,
-   -0.000000000f, -1.000000000f,
-    0.382683432f, -0.923879533f,
-    0.707106781f, -0.707106781f,
-    0.923879533f, -0.382683432f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
-
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 32, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_32[64] = {
-    1.000000000f,  0.000000000f,
-    0.980785280f,  0.195090322f,
-    0.923879533f,  0.382683432f,
-    0.831469612f,  0.555570233f,
-    0.707106781f,  0.707106781f,
-    0.555570233f,  0.831469612f,
-    0.382683432f,  0.923879533f,
-    0.195090322f,  0.980785280f,
-    0.000000000f,  1.000000000f,
-   -0.195090322f,  0.980785280f,
-   -0.382683432f,  0.923879533f,
-   -0.555570233f,  0.831469612f,
-   -0.707106781f,  0.707106781f,
-   -0.831469612f,  0.555570233f,
-   -0.923879533f,  0.382683432f,
-   -0.980785280f,  0.195090322f,
-   -1.000000000f,  0.000000000f,
-   -0.980785280f, -0.195090322f,
-   -0.923879533f, -0.382683432f,
-   -0.831469612f, -0.555570233f,
-   -0.707106781f, -0.707106781f,
-   -0.555570233f, -0.831469612f,
-   -0.382683432f, -0.923879533f,
-   -0.195090322f, -0.980785280f,
-   -0.000000000f, -1.000000000f,
-    0.195090322f, -0.980785280f,
-    0.382683432f, -0.923879533f,
-    0.555570233f, -0.831469612f,
-    0.707106781f, -0.707106781f,
-    0.831469612f, -0.555570233f,
-    0.923879533f, -0.382683432f,
-    0.980785280f, -0.195090322f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for(i = 0; i < N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 64, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_64[128] = {
-    1.000000000f,  0.000000000f,
-    0.995184727f,  0.098017140f,
-    0.980785280f,  0.195090322f,
-    0.956940336f,  0.290284677f,
-    0.923879533f,  0.382683432f,
-    0.881921264f,  0.471396737f,
-    0.831469612f,  0.555570233f,
-    0.773010453f,  0.634393284f,
-    0.707106781f,  0.707106781f,
-    0.634393284f,  0.773010453f,
-    0.555570233f,  0.831469612f,
-    0.471396737f,  0.881921264f,
-    0.382683432f,  0.923879533f,
-    0.290284677f,  0.956940336f,
-    0.195090322f,  0.980785280f,
-    0.098017140f,  0.995184727f,
-    0.000000000f,  1.000000000f,
-   -0.098017140f,  0.995184727f,
-   -0.195090322f,  0.980785280f,
-   -0.290284677f,  0.956940336f,
-   -0.382683432f,  0.923879533f,
-   -0.471396737f,  0.881921264f,
-   -0.555570233f,  0.831469612f,
-   -0.634393284f,  0.773010453f,
-   -0.707106781f,  0.707106781f,
-   -0.773010453f,  0.634393284f,
-   -0.831469612f,  0.555570233f,
-   -0.881921264f,  0.471396737f,
-   -0.923879533f,  0.382683432f,
-   -0.956940336f,  0.290284677f,
-   -0.980785280f,  0.195090322f,
-   -0.995184727f,  0.098017140f,
-   -1.000000000f,  0.000000000f,
-   -0.995184727f, -0.098017140f,
-   -0.980785280f, -0.195090322f,
-   -0.956940336f, -0.290284677f,
-   -0.923879533f, -0.382683432f,
-   -0.881921264f, -0.471396737f,
-   -0.831469612f, -0.555570233f,
-   -0.773010453f, -0.634393284f,
-   -0.707106781f, -0.707106781f,
-   -0.634393284f, -0.773010453f,
-   -0.555570233f, -0.831469612f,
-   -0.471396737f, -0.881921264f,
-   -0.382683432f, -0.923879533f,
-   -0.290284677f, -0.956940336f,
-   -0.195090322f, -0.980785280f,
-   -0.098017140f, -0.995184727f,
-   -0.000000000f, -1.000000000f,
-    0.098017140f, -0.995184727f,
-    0.195090322f, -0.980785280f,
-    0.290284677f, -0.956940336f,
-    0.382683432f, -0.923879533f,
-    0.471396737f, -0.881921264f,
-    0.555570233f, -0.831469612f,
-    0.634393284f, -0.773010453f,
-    0.707106781f, -0.707106781f,
-    0.773010453f, -0.634393284f,
-    0.831469612f, -0.555570233f,
-    0.881921264f, -0.471396737f,
-    0.923879533f, -0.382683432f,
-    0.956940336f, -0.290284677f,
-    0.980785280f, -0.195090322f,
-    0.995184727f, -0.098017140f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 128, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_128[256] = {
-    1.000000000f,  0.000000000f,
-    0.998795456f,  0.049067674f,
-    0.995184727f,  0.098017140f,
-    0.989176510f,  0.146730474f,
-    0.980785280f,  0.195090322f,
-    0.970031253f,  0.242980180f,
-    0.956940336f,  0.290284677f,
-    0.941544065f,  0.336889853f,
-    0.923879533f,  0.382683432f,
-    0.903989293f,  0.427555093f,
-    0.881921264f,  0.471396737f,
-    0.857728610f,  0.514102744f,
-    0.831469612f,  0.555570233f,
-    0.803207531f,  0.595699304f,
-    0.773010453f,  0.634393284f,
-    0.740951125f,  0.671558955f,
-    0.707106781f,  0.707106781f,
-    0.671558955f,  0.740951125f,
-    0.634393284f,  0.773010453f,
-    0.595699304f,  0.803207531f,
-    0.555570233f,  0.831469612f,
-    0.514102744f,  0.857728610f,
-    0.471396737f,  0.881921264f,
-    0.427555093f,  0.903989293f,
-    0.382683432f,  0.923879533f,
-    0.336889853f,  0.941544065f,
-    0.290284677f,  0.956940336f,
-    0.242980180f,  0.970031253f,
-    0.195090322f,  0.980785280f,
-    0.146730474f,  0.989176510f,
-    0.098017140f,  0.995184727f,
-    0.049067674f,  0.998795456f,
-    0.000000000f,  1.000000000f,
-   -0.049067674f,  0.998795456f,
-   -0.098017140f,  0.995184727f,
-   -0.146730474f,  0.989176510f,
-   -0.195090322f,  0.980785280f,
-   -0.242980180f,  0.970031253f,
-   -0.290284677f,  0.956940336f,
-   -0.336889853f,  0.941544065f,
-   -0.382683432f,  0.923879533f,
-   -0.427555093f,  0.903989293f,
-   -0.471396737f,  0.881921264f,
-   -0.514102744f,  0.857728610f,
-   -0.555570233f,  0.831469612f,
-   -0.595699304f,  0.803207531f,
-   -0.634393284f,  0.773010453f,
-   -0.671558955f,  0.740951125f,
-   -0.707106781f,  0.707106781f,
-   -0.740951125f,  0.671558955f,
-   -0.773010453f,  0.634393284f,
-   -0.803207531f,  0.595699304f,
-   -0.831469612f,  0.555570233f,
-   -0.857728610f,  0.514102744f,
-   -0.881921264f,  0.471396737f,
-   -0.903989293f,  0.427555093f,
-   -0.923879533f,  0.382683432f,
-   -0.941544065f,  0.336889853f,
-   -0.956940336f,  0.290284677f,
-   -0.970031253f,  0.242980180f,
-   -0.980785280f,  0.195090322f,
-   -0.989176510f,  0.146730474f,
-   -0.995184727f,  0.098017140f,
-   -0.998795456f,  0.049067674f,
-   -1.000000000f,  0.000000000f,
-   -0.998795456f, -0.049067674f,
-   -0.995184727f, -0.098017140f,
-   -0.989176510f, -0.146730474f,
-   -0.980785280f, -0.195090322f,
-   -0.970031253f, -0.242980180f,
-   -0.956940336f, -0.290284677f,
-   -0.941544065f, -0.336889853f,
-   -0.923879533f, -0.382683432f,
-   -0.903989293f, -0.427555093f,
-   -0.881921264f, -0.471396737f,
-   -0.857728610f, -0.514102744f,
-   -0.831469612f, -0.555570233f,
-   -0.803207531f, -0.595699304f,
-   -0.773010453f, -0.634393284f,
-   -0.740951125f, -0.671558955f,
-   -0.707106781f, -0.707106781f,
-   -0.671558955f, -0.740951125f,
-   -0.634393284f, -0.773010453f,
-   -0.595699304f, -0.803207531f,
-   -0.555570233f, -0.831469612f,
-   -0.514102744f, -0.857728610f,
-   -0.471396737f, -0.881921264f,
-   -0.427555093f, -0.903989293f,
-   -0.382683432f, -0.923879533f,
-   -0.336889853f, -0.941544065f,
-   -0.290284677f, -0.956940336f,
-   -0.242980180f, -0.970031253f,
-   -0.195090322f, -0.980785280f,
-   -0.146730474f, -0.989176510f,
-   -0.098017140f, -0.995184727f,
-   -0.049067674f, -0.998795456f,
-   -0.000000000f, -1.000000000f,
-    0.049067674f, -0.998795456f,
-    0.098017140f, -0.995184727f,
-    0.146730474f, -0.989176510f,
-    0.195090322f, -0.980785280f,
-    0.242980180f, -0.970031253f,
-    0.290284677f, -0.956940336f,
-    0.336889853f, -0.941544065f,
-    0.382683432f, -0.923879533f,
-    0.427555093f, -0.903989293f,
-    0.471396737f, -0.881921264f,
-    0.514102744f, -0.857728610f,
-    0.555570233f, -0.831469612f,
-    0.595699304f, -0.803207531f,
-    0.634393284f, -0.773010453f,
-    0.671558955f, -0.740951125f,
-    0.707106781f, -0.707106781f,
-    0.740951125f, -0.671558955f,
-    0.773010453f, -0.634393284f,
-    0.803207531f, -0.595699304f,
-    0.831469612f, -0.555570233f,
-    0.857728610f, -0.514102744f,
-    0.881921264f, -0.471396737f,
-    0.903989293f, -0.427555093f,
-    0.923879533f, -0.382683432f,
-    0.941544065f, -0.336889853f,
-    0.956940336f, -0.290284677f,
-    0.970031253f, -0.242980180f,
-    0.980785280f, -0.195090322f,
-    0.989176510f, -0.146730474f,
-    0.995184727f, -0.098017140f,
-    0.998795456f, -0.049067674f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for(i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 256, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_256[512] = {
-    1.000000000f,  0.000000000f,
-    0.999698819f,  0.024541229f,
-    0.998795456f,  0.049067674f,
-    0.997290457f,  0.073564564f,
-    0.995184727f,  0.098017140f,
-    0.992479535f,  0.122410675f,
-    0.989176510f,  0.146730474f,
-    0.985277642f,  0.170961889f,
-    0.980785280f,  0.195090322f,
-    0.975702130f,  0.219101240f,
-    0.970031253f,  0.242980180f,
-    0.963776066f,  0.266712757f,
-    0.956940336f,  0.290284677f,
-    0.949528181f,  0.313681740f,
-    0.941544065f,  0.336889853f,
-    0.932992799f,  0.359895037f,
-    0.923879533f,  0.382683432f,
-    0.914209756f,  0.405241314f,
-    0.903989293f,  0.427555093f,
-    0.893224301f,  0.449611330f,
-    0.881921264f,  0.471396737f,
-    0.870086991f,  0.492898192f,
-    0.857728610f,  0.514102744f,
-    0.844853565f,  0.534997620f,
-    0.831469612f,  0.555570233f,
-    0.817584813f,  0.575808191f,
-    0.803207531f,  0.595699304f,
-    0.788346428f,  0.615231591f,
-    0.773010453f,  0.634393284f,
-    0.757208847f,  0.653172843f,
-    0.740951125f,  0.671558955f,
-    0.724247083f,  0.689540545f,
-    0.707106781f,  0.707106781f,
-    0.689540545f,  0.724247083f,
-    0.671558955f,  0.740951125f,
-    0.653172843f,  0.757208847f,
-    0.634393284f,  0.773010453f,
-    0.615231591f,  0.788346428f,
-    0.595699304f,  0.803207531f,
-    0.575808191f,  0.817584813f,
-    0.555570233f,  0.831469612f,
-    0.534997620f,  0.844853565f,
-    0.514102744f,  0.857728610f,
-    0.492898192f,  0.870086991f,
-    0.471396737f,  0.881921264f,
-    0.449611330f,  0.893224301f,
-    0.427555093f,  0.903989293f,
-    0.405241314f,  0.914209756f,
-    0.382683432f,  0.923879533f,
-    0.359895037f,  0.932992799f,
-    0.336889853f,  0.941544065f,
-    0.313681740f,  0.949528181f,
-    0.290284677f,  0.956940336f,
-    0.266712757f,  0.963776066f,
-    0.242980180f,  0.970031253f,
-    0.219101240f,  0.975702130f,
-    0.195090322f,  0.980785280f,
-    0.170961889f,  0.985277642f,
-    0.146730474f,  0.989176510f,
-    0.122410675f,  0.992479535f,
-    0.098017140f,  0.995184727f,
-    0.073564564f,  0.997290457f,
-    0.049067674f,  0.998795456f,
-    0.024541229f,  0.999698819f,
-    0.000000000f,  1.000000000f,
-   -0.024541229f,  0.999698819f,
-   -0.049067674f,  0.998795456f,
-   -0.073564564f,  0.997290457f,
-   -0.098017140f,  0.995184727f,
-   -0.122410675f,  0.992479535f,
-   -0.146730474f,  0.989176510f,
-   -0.170961889f,  0.985277642f,
-   -0.195090322f,  0.980785280f,
-   -0.219101240f,  0.975702130f,
-   -0.242980180f,  0.970031253f,
-   -0.266712757f,  0.963776066f,
-   -0.290284677f,  0.956940336f,
-   -0.313681740f,  0.949528181f,
-   -0.336889853f,  0.941544065f,
-   -0.359895037f,  0.932992799f,
-   -0.382683432f,  0.923879533f,
-   -0.405241314f,  0.914209756f,
-   -0.427555093f,  0.903989293f,
-   -0.449611330f,  0.893224301f,
-   -0.471396737f,  0.881921264f,
-   -0.492898192f,  0.870086991f,
-   -0.514102744f,  0.857728610f,
-   -0.534997620f,  0.844853565f,
-   -0.555570233f,  0.831469612f,
-   -0.575808191f,  0.817584813f,
-   -0.595699304f,  0.803207531f,
-   -0.615231591f,  0.788346428f,
-   -0.634393284f,  0.773010453f,
-   -0.653172843f,  0.757208847f,
-   -0.671558955f,  0.740951125f,
-   -0.689540545f,  0.724247083f,
-   -0.707106781f,  0.707106781f,
-   -0.724247083f,  0.689540545f,
-   -0.740951125f,  0.671558955f,
-   -0.757208847f,  0.653172843f,
-   -0.773010453f,  0.634393284f,
-   -0.788346428f,  0.615231591f,
-   -0.803207531f,  0.595699304f,
-   -0.817584813f,  0.575808191f,
-   -0.831469612f,  0.555570233f,
-   -0.844853565f,  0.534997620f,
-   -0.857728610f,  0.514102744f,
-   -0.870086991f,  0.492898192f,
-   -0.881921264f,  0.471396737f,
-   -0.893224301f,  0.449611330f,
-   -0.903989293f,  0.427555093f,
-   -0.914209756f,  0.405241314f,
-   -0.923879533f,  0.382683432f,
-   -0.932992799f,  0.359895037f,
-   -0.941544065f,  0.336889853f,
-   -0.949528181f,  0.313681740f,
-   -0.956940336f,  0.290284677f,
-   -0.963776066f,  0.266712757f,
-   -0.970031253f,  0.242980180f,
-   -0.975702130f,  0.219101240f,
-   -0.980785280f,  0.195090322f,
-   -0.985277642f,  0.170961889f,
-   -0.989176510f,  0.146730474f,
-   -0.992479535f,  0.122410675f,
-   -0.995184727f,  0.098017140f,
-   -0.997290457f,  0.073564564f,
-   -0.998795456f,  0.049067674f,
-   -0.999698819f,  0.024541229f,
-   -1.000000000f,  0.000000000f,
-   -0.999698819f, -0.024541229f,
-   -0.998795456f, -0.049067674f,
-   -0.997290457f, -0.073564564f,
-   -0.995184727f, -0.098017140f,
-   -0.992479535f, -0.122410675f,
-   -0.989176510f, -0.146730474f,
-   -0.985277642f, -0.170961889f,
-   -0.980785280f, -0.195090322f,
-   -0.975702130f, -0.219101240f,
-   -0.970031253f, -0.242980180f,
-   -0.963776066f, -0.266712757f,
-   -0.956940336f, -0.290284677f,
-   -0.949528181f, -0.313681740f,
-   -0.941544065f, -0.336889853f,
-   -0.932992799f, -0.359895037f,
-   -0.923879533f, -0.382683432f,
-   -0.914209756f, -0.405241314f,
-   -0.903989293f, -0.427555093f,
-   -0.893224301f, -0.449611330f,
-   -0.881921264f, -0.471396737f,
-   -0.870086991f, -0.492898192f,
-   -0.857728610f, -0.514102744f,
-   -0.844853565f, -0.534997620f,
-   -0.831469612f, -0.555570233f,
-   -0.817584813f, -0.575808191f,
-   -0.803207531f, -0.595699304f,
-   -0.788346428f, -0.615231591f,
-   -0.773010453f, -0.634393284f,
-   -0.757208847f, -0.653172843f,
-   -0.740951125f, -0.671558955f,
-   -0.724247083f, -0.689540545f,
-   -0.707106781f, -0.707106781f,
-   -0.689540545f, -0.724247083f,
-   -0.671558955f, -0.740951125f,
-   -0.653172843f, -0.757208847f,
-   -0.634393284f, -0.773010453f,
-   -0.615231591f, -0.788346428f,
-   -0.595699304f, -0.803207531f,
-   -0.575808191f, -0.817584813f,
-   -0.555570233f, -0.831469612f,
-   -0.534997620f, -0.844853565f,
-   -0.514102744f, -0.857728610f,
-   -0.492898192f, -0.870086991f,
-   -0.471396737f, -0.881921264f,
-   -0.449611330f, -0.893224301f,
-   -0.427555093f, -0.903989293f,
-   -0.405241314f, -0.914209756f,
-   -0.382683432f, -0.923879533f,
-   -0.359895037f, -0.932992799f,
-   -0.336889853f, -0.941544065f,
-   -0.313681740f, -0.949528181f,
-   -0.290284677f, -0.956940336f,
-   -0.266712757f, -0.963776066f,
-   -0.242980180f, -0.970031253f,
-   -0.219101240f, -0.975702130f,
-   -0.195090322f, -0.980785280f,
-   -0.170961889f, -0.985277642f,
-   -0.146730474f, -0.989176510f,
-   -0.122410675f, -0.992479535f,
-   -0.098017140f, -0.995184727f,
-   -0.073564564f, -0.997290457f,
-   -0.049067674f, -0.998795456f,
-   -0.024541229f, -0.999698819f,
-   -0.000000000f, -1.000000000f,
-    0.024541229f, -0.999698819f,
-    0.049067674f, -0.998795456f,
-    0.073564564f, -0.997290457f,
-    0.098017140f, -0.995184727f,
-    0.122410675f, -0.992479535f,
-    0.146730474f, -0.989176510f,
-    0.170961889f, -0.985277642f,
-    0.195090322f, -0.980785280f,
-    0.219101240f, -0.975702130f,
-    0.242980180f, -0.970031253f,
-    0.266712757f, -0.963776066f,
-    0.290284677f, -0.956940336f,
-    0.313681740f, -0.949528181f,
-    0.336889853f, -0.941544065f,
-    0.359895037f, -0.932992799f,
-    0.382683432f, -0.923879533f,
-    0.405241314f, -0.914209756f,
-    0.427555093f, -0.903989293f,
-    0.449611330f, -0.893224301f,
-    0.471396737f, -0.881921264f,
-    0.492898192f, -0.870086991f,
-    0.514102744f, -0.857728610f,
-    0.534997620f, -0.844853565f,
-    0.555570233f, -0.831469612f,
-    0.575808191f, -0.817584813f,
-    0.595699304f, -0.803207531f,
-    0.615231591f, -0.788346428f,
-    0.634393284f, -0.773010453f,
-    0.653172843f, -0.757208847f,
-    0.671558955f, -0.740951125f,
-    0.689540545f, -0.724247083f,
-    0.707106781f, -0.707106781f,
-    0.724247083f, -0.689540545f,
-    0.740951125f, -0.671558955f,
-    0.757208847f, -0.653172843f,
-    0.773010453f, -0.634393284f,
-    0.788346428f, -0.615231591f,
-    0.803207531f, -0.595699304f,
-    0.817584813f, -0.575808191f,
-    0.831469612f, -0.555570233f,
-    0.844853565f, -0.534997620f,
-    0.857728610f, -0.514102744f,
-    0.870086991f, -0.492898192f,
-    0.881921264f, -0.471396737f,
-    0.893224301f, -0.449611330f,
-    0.903989293f, -0.427555093f,
-    0.914209756f, -0.405241314f,
-    0.923879533f, -0.382683432f,
-    0.932992799f, -0.359895037f,
-    0.941544065f, -0.336889853f,
-    0.949528181f, -0.313681740f,
-    0.956940336f, -0.290284677f,
-    0.963776066f, -0.266712757f,
-    0.970031253f, -0.242980180f,
-    0.975702130f, -0.219101240f,
-    0.980785280f, -0.195090322f,
-    0.985277642f, -0.170961889f,
-    0.989176510f, -0.146730474f,
-    0.992479535f, -0.122410675f,
-    0.995184727f, -0.098017140f,
-    0.997290457f, -0.073564564f,
-    0.998795456f, -0.049067674f,
-    0.999698819f, -0.024541229f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 512, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_512[1024] = {
-    1.000000000f,  0.000000000f,
-    0.999924702f,  0.012271538f,
-    0.999698819f,  0.024541229f,
-    0.999322385f,  0.036807223f,
-    0.998795456f,  0.049067674f,
-    0.998118113f,  0.061320736f,
-    0.997290457f,  0.073564564f,
-    0.996312612f,  0.085797312f,
-    0.995184727f,  0.098017140f,
-    0.993906970f,  0.110222207f,
-    0.992479535f,  0.122410675f,
-    0.990902635f,  0.134580709f,
-    0.989176510f,  0.146730474f,
-    0.987301418f,  0.158858143f,
-    0.985277642f,  0.170961889f,
-    0.983105487f,  0.183039888f,
-    0.980785280f,  0.195090322f,
-    0.978317371f,  0.207111376f,
-    0.975702130f,  0.219101240f,
-    0.972939952f,  0.231058108f,
-    0.970031253f,  0.242980180f,
-    0.966976471f,  0.254865660f,
-    0.963776066f,  0.266712757f,
-    0.960430519f,  0.278519689f,
-    0.956940336f,  0.290284677f,
-    0.953306040f,  0.302005949f,
-    0.949528181f,  0.313681740f,
-    0.945607325f,  0.325310292f,
-    0.941544065f,  0.336889853f,
-    0.937339012f,  0.348418680f,
-    0.932992799f,  0.359895037f,
-    0.928506080f,  0.371317194f,
-    0.923879533f,  0.382683432f,
-    0.919113852f,  0.393992040f,
-    0.914209756f,  0.405241314f,
-    0.909167983f,  0.416429560f,
-    0.903989293f,  0.427555093f,
-    0.898674466f,  0.438616239f,
-    0.893224301f,  0.449611330f,
-    0.887639620f,  0.460538711f,
-    0.881921264f,  0.471396737f,
-    0.876070094f,  0.482183772f,
-    0.870086991f,  0.492898192f,
-    0.863972856f,  0.503538384f,
-    0.857728610f,  0.514102744f,
-    0.851355193f,  0.524589683f,
-    0.844853565f,  0.534997620f,
-    0.838224706f,  0.545324988f,
-    0.831469612f,  0.555570233f,
-    0.824589303f,  0.565731811f,
-    0.817584813f,  0.575808191f,
-    0.810457198f,  0.585797857f,
-    0.803207531f,  0.595699304f,
-    0.795836905f,  0.605511041f,
-    0.788346428f,  0.615231591f,
-    0.780737229f,  0.624859488f,
-    0.773010453f,  0.634393284f,
-    0.765167266f,  0.643831543f,
-    0.757208847f,  0.653172843f,
-    0.749136395f,  0.662415778f,
-    0.740951125f,  0.671558955f,
-    0.732654272f,  0.680600998f,
-    0.724247083f,  0.689540545f,
-    0.715730825f,  0.698376249f,
-    0.707106781f,  0.707106781f,
-    0.698376249f,  0.715730825f,
-    0.689540545f,  0.724247083f,
-    0.680600998f,  0.732654272f,
-    0.671558955f,  0.740951125f,
-    0.662415778f,  0.749136395f,
-    0.653172843f,  0.757208847f,
-    0.643831543f,  0.765167266f,
-    0.634393284f,  0.773010453f,
-    0.624859488f,  0.780737229f,
-    0.615231591f,  0.788346428f,
-    0.605511041f,  0.795836905f,
-    0.595699304f,  0.803207531f,
-    0.585797857f,  0.810457198f,
-    0.575808191f,  0.817584813f,
-    0.565731811f,  0.824589303f,
-    0.555570233f,  0.831469612f,
-    0.545324988f,  0.838224706f,
-    0.534997620f,  0.844853565f,
-    0.524589683f,  0.851355193f,
-    0.514102744f,  0.857728610f,
-    0.503538384f,  0.863972856f,
-    0.492898192f,  0.870086991f,
-    0.482183772f,  0.876070094f,
-    0.471396737f,  0.881921264f,
-    0.460538711f,  0.887639620f,
-    0.449611330f,  0.893224301f,
-    0.438616239f,  0.898674466f,
-    0.427555093f,  0.903989293f,
-    0.416429560f,  0.909167983f,
-    0.405241314f,  0.914209756f,
-    0.393992040f,  0.919113852f,
-    0.382683432f,  0.923879533f,
-    0.371317194f,  0.928506080f,
-    0.359895037f,  0.932992799f,
-    0.348418680f,  0.937339012f,
-    0.336889853f,  0.941544065f,
-    0.325310292f,  0.945607325f,
-    0.313681740f,  0.949528181f,
-    0.302005949f,  0.953306040f,
-    0.290284677f,  0.956940336f,
-    0.278519689f,  0.960430519f,
-    0.266712757f,  0.963776066f,
-    0.254865660f,  0.966976471f,
-    0.242980180f,  0.970031253f,
-    0.231058108f,  0.972939952f,
-    0.219101240f,  0.975702130f,
-    0.207111376f,  0.978317371f,
-    0.195090322f,  0.980785280f,
-    0.183039888f,  0.983105487f,
-    0.170961889f,  0.985277642f,
-    0.158858143f,  0.987301418f,
-    0.146730474f,  0.989176510f,
-    0.134580709f,  0.990902635f,
-    0.122410675f,  0.992479535f,
-    0.110222207f,  0.993906970f,
-    0.098017140f,  0.995184727f,
-    0.085797312f,  0.996312612f,
-    0.073564564f,  0.997290457f,
-    0.061320736f,  0.998118113f,
-    0.049067674f,  0.998795456f,
-    0.036807223f,  0.999322385f,
-    0.024541229f,  0.999698819f,
-    0.012271538f,  0.999924702f,
-    0.000000000f,  1.000000000f,
-   -0.012271538f,  0.999924702f,
-   -0.024541229f,  0.999698819f,
-   -0.036807223f,  0.999322385f,
-   -0.049067674f,  0.998795456f,
-   -0.061320736f,  0.998118113f,
-   -0.073564564f,  0.997290457f,
-   -0.085797312f,  0.996312612f,
-   -0.098017140f,  0.995184727f,
-   -0.110222207f,  0.993906970f,
-   -0.122410675f,  0.992479535f,
-   -0.134580709f,  0.990902635f,
-   -0.146730474f,  0.989176510f,
-   -0.158858143f,  0.987301418f,
-   -0.170961889f,  0.985277642f,
-   -0.183039888f,  0.983105487f,
-   -0.195090322f,  0.980785280f,
-   -0.207111376f,  0.978317371f,
-   -0.219101240f,  0.975702130f,
-   -0.231058108f,  0.972939952f,
-   -0.242980180f,  0.970031253f,
-   -0.254865660f,  0.966976471f,
-   -0.266712757f,  0.963776066f,
-   -0.278519689f,  0.960430519f,
-   -0.290284677f,  0.956940336f,
-   -0.302005949f,  0.953306040f,
-   -0.313681740f,  0.949528181f,
-   -0.325310292f,  0.945607325f,
-   -0.336889853f,  0.941544065f,
-   -0.348418680f,  0.937339012f,
-   -0.359895037f,  0.932992799f,
-   -0.371317194f,  0.928506080f,
-   -0.382683432f,  0.923879533f,
-   -0.393992040f,  0.919113852f,
-   -0.405241314f,  0.914209756f,
-   -0.416429560f,  0.909167983f,
-   -0.427555093f,  0.903989293f,
-   -0.438616239f,  0.898674466f,
-   -0.449611330f,  0.893224301f,
-   -0.460538711f,  0.887639620f,
-   -0.471396737f,  0.881921264f,
-   -0.482183772f,  0.876070094f,
-   -0.492898192f,  0.870086991f,
-   -0.503538384f,  0.863972856f,
-   -0.514102744f,  0.857728610f,
-   -0.524589683f,  0.851355193f,
-   -0.534997620f,  0.844853565f,
-   -0.545324988f,  0.838224706f,
-   -0.555570233f,  0.831469612f,
-   -0.565731811f,  0.824589303f,
-   -0.575808191f,  0.817584813f,
-   -0.585797857f,  0.810457198f,
-   -0.595699304f,  0.803207531f,
-   -0.605511041f,  0.795836905f,
-   -0.615231591f,  0.788346428f,
-   -0.624859488f,  0.780737229f,
-   -0.634393284f,  0.773010453f,
-   -0.643831543f,  0.765167266f,
-   -0.653172843f,  0.757208847f,
-   -0.662415778f,  0.749136395f,
-   -0.671558955f,  0.740951125f,
-   -0.680600998f,  0.732654272f,
-   -0.689540545f,  0.724247083f,
-   -0.698376249f,  0.715730825f,
-   -0.707106781f,  0.707106781f,
-   -0.715730825f,  0.698376249f,
-   -0.724247083f,  0.689540545f,
-   -0.732654272f,  0.680600998f,
-   -0.740951125f,  0.671558955f,
-   -0.749136395f,  0.662415778f,
-   -0.757208847f,  0.653172843f,
-   -0.765167266f,  0.643831543f,
-   -0.773010453f,  0.634393284f,
-   -0.780737229f,  0.624859488f,
-   -0.788346428f,  0.615231591f,
-   -0.795836905f,  0.605511041f,
-   -0.803207531f,  0.595699304f,
-   -0.810457198f,  0.585797857f,
-   -0.817584813f,  0.575808191f,
-   -0.824589303f,  0.565731811f,
-   -0.831469612f,  0.555570233f,
-   -0.838224706f,  0.545324988f,
-   -0.844853565f,  0.534997620f,
-   -0.851355193f,  0.524589683f,
-   -0.857728610f,  0.514102744f,
-   -0.863972856f,  0.503538384f,
-   -0.870086991f,  0.492898192f,
-   -0.876070094f,  0.482183772f,
-   -0.881921264f,  0.471396737f,
-   -0.887639620f,  0.460538711f,
-   -0.893224301f,  0.449611330f,
-   -0.898674466f,  0.438616239f,
-   -0.903989293f,  0.427555093f,
-   -0.909167983f,  0.416429560f,
-   -0.914209756f,  0.405241314f,
-   -0.919113852f,  0.393992040f,
-   -0.923879533f,  0.382683432f,
-   -0.928506080f,  0.371317194f,
-   -0.932992799f,  0.359895037f,
-   -0.937339012f,  0.348418680f,
-   -0.941544065f,  0.336889853f,
-   -0.945607325f,  0.325310292f,
-   -0.949528181f,  0.313681740f,
-   -0.953306040f,  0.302005949f,
-   -0.956940336f,  0.290284677f,
-   -0.960430519f,  0.278519689f,
-   -0.963776066f,  0.266712757f,
-   -0.966976471f,  0.254865660f,
-   -0.970031253f,  0.242980180f,
-   -0.972939952f,  0.231058108f,
-   -0.975702130f,  0.219101240f,
-   -0.978317371f,  0.207111376f,
-   -0.980785280f,  0.195090322f,
-   -0.983105487f,  0.183039888f,
-   -0.985277642f,  0.170961889f,
-   -0.987301418f,  0.158858143f,
-   -0.989176510f,  0.146730474f,
-   -0.990902635f,  0.134580709f,
-   -0.992479535f,  0.122410675f,
-   -0.993906970f,  0.110222207f,
-   -0.995184727f,  0.098017140f,
-   -0.996312612f,  0.085797312f,
-   -0.997290457f,  0.073564564f,
-   -0.998118113f,  0.061320736f,
-   -0.998795456f,  0.049067674f,
-   -0.999322385f,  0.036807223f,
-   -0.999698819f,  0.024541229f,
-   -0.999924702f,  0.012271538f,
-   -1.000000000f,  0.000000000f,
-   -0.999924702f, -0.012271538f,
-   -0.999698819f, -0.024541229f,
-   -0.999322385f, -0.036807223f,
-   -0.998795456f, -0.049067674f,
-   -0.998118113f, -0.061320736f,
-   -0.997290457f, -0.073564564f,
-   -0.996312612f, -0.085797312f,
-   -0.995184727f, -0.098017140f,
-   -0.993906970f, -0.110222207f,
-   -0.992479535f, -0.122410675f,
-   -0.990902635f, -0.134580709f,
-   -0.989176510f, -0.146730474f,
-   -0.987301418f, -0.158858143f,
-   -0.985277642f, -0.170961889f,
-   -0.983105487f, -0.183039888f,
-   -0.980785280f, -0.195090322f,
-   -0.978317371f, -0.207111376f,
-   -0.975702130f, -0.219101240f,
-   -0.972939952f, -0.231058108f,
-   -0.970031253f, -0.242980180f,
-   -0.966976471f, -0.254865660f,
-   -0.963776066f, -0.266712757f,
-   -0.960430519f, -0.278519689f,
-   -0.956940336f, -0.290284677f,
-   -0.953306040f, -0.302005949f,
-   -0.949528181f, -0.313681740f,
-   -0.945607325f, -0.325310292f,
-   -0.941544065f, -0.336889853f,
-   -0.937339012f, -0.348418680f,
-   -0.932992799f, -0.359895037f,
-   -0.928506080f, -0.371317194f,
-   -0.923879533f, -0.382683432f,
-   -0.919113852f, -0.393992040f,
-   -0.914209756f, -0.405241314f,
-   -0.909167983f, -0.416429560f,
-   -0.903989293f, -0.427555093f,
-   -0.898674466f, -0.438616239f,
-   -0.893224301f, -0.449611330f,
-   -0.887639620f, -0.460538711f,
-   -0.881921264f, -0.471396737f,
-   -0.876070094f, -0.482183772f,
-   -0.870086991f, -0.492898192f,
-   -0.863972856f, -0.503538384f,
-   -0.857728610f, -0.514102744f,
-   -0.851355193f, -0.524589683f,
-   -0.844853565f, -0.534997620f,
-   -0.838224706f, -0.545324988f,
-   -0.831469612f, -0.555570233f,
-   -0.824589303f, -0.565731811f,
-   -0.817584813f, -0.575808191f,
-   -0.810457198f, -0.585797857f,
-   -0.803207531f, -0.595699304f,
-   -0.795836905f, -0.605511041f,
-   -0.788346428f, -0.615231591f,
-   -0.780737229f, -0.624859488f,
-   -0.773010453f, -0.634393284f,
-   -0.765167266f, -0.643831543f,
-   -0.757208847f, -0.653172843f,
-   -0.749136395f, -0.662415778f,
-   -0.740951125f, -0.671558955f,
-   -0.732654272f, -0.680600998f,
-   -0.724247083f, -0.689540545f,
-   -0.715730825f, -0.698376249f,
-   -0.707106781f, -0.707106781f,
-   -0.698376249f, -0.715730825f,
-   -0.689540545f, -0.724247083f,
-   -0.680600998f, -0.732654272f,
-   -0.671558955f, -0.740951125f,
-   -0.662415778f, -0.749136395f,
-   -0.653172843f, -0.757208847f,
-   -0.643831543f, -0.765167266f,
-   -0.634393284f, -0.773010453f,
-   -0.624859488f, -0.780737229f,
-   -0.615231591f, -0.788346428f,
-   -0.605511041f, -0.795836905f,
-   -0.595699304f, -0.803207531f,
-   -0.585797857f, -0.810457198f,
-   -0.575808191f, -0.817584813f,
-   -0.565731811f, -0.824589303f,
-   -0.555570233f, -0.831469612f,
-   -0.545324988f, -0.838224706f,
-   -0.534997620f, -0.844853565f,
-   -0.524589683f, -0.851355193f,
-   -0.514102744f, -0.857728610f,
-   -0.503538384f, -0.863972856f,
-   -0.492898192f, -0.870086991f,
-   -0.482183772f, -0.876070094f,
-   -0.471396737f, -0.881921264f,
-   -0.460538711f, -0.887639620f,
-   -0.449611330f, -0.893224301f,
-   -0.438616239f, -0.898674466f,
-   -0.427555093f, -0.903989293f,
-   -0.416429560f, -0.909167983f,
-   -0.405241314f, -0.914209756f,
-   -0.393992040f, -0.919113852f,
-   -0.382683432f, -0.923879533f,
-   -0.371317194f, -0.928506080f,
-   -0.359895037f, -0.932992799f,
-   -0.348418680f, -0.937339012f,
-   -0.336889853f, -0.941544065f,
-   -0.325310292f, -0.945607325f,
-   -0.313681740f, -0.949528181f,
-   -0.302005949f, -0.953306040f,
-   -0.290284677f, -0.956940336f,
-   -0.278519689f, -0.960430519f,
-   -0.266712757f, -0.963776066f,
-   -0.254865660f, -0.966976471f,
-   -0.242980180f, -0.970031253f,
-   -0.231058108f, -0.972939952f,
-   -0.219101240f, -0.975702130f,
-   -0.207111376f, -0.978317371f,
-   -0.195090322f, -0.980785280f,
-   -0.183039888f, -0.983105487f,
-   -0.170961889f, -0.985277642f,
-   -0.158858143f, -0.987301418f,
-   -0.146730474f, -0.989176510f,
-   -0.134580709f, -0.990902635f,
-   -0.122410675f, -0.992479535f,
-   -0.110222207f, -0.993906970f,
-   -0.098017140f, -0.995184727f,
-   -0.085797312f, -0.996312612f,
-   -0.073564564f, -0.997290457f,
-   -0.061320736f, -0.998118113f,
-   -0.049067674f, -0.998795456f,
-   -0.036807223f, -0.999322385f,
-   -0.024541229f, -0.999698819f,
-   -0.012271538f, -0.999924702f,
-   -0.000000000f, -1.000000000f,
-    0.012271538f, -0.999924702f,
-    0.024541229f, -0.999698819f,
-    0.036807223f, -0.999322385f,
-    0.049067674f, -0.998795456f,
-    0.061320736f, -0.998118113f,
-    0.073564564f, -0.997290457f,
-    0.085797312f, -0.996312612f,
-    0.098017140f, -0.995184727f,
-    0.110222207f, -0.993906970f,
-    0.122410675f, -0.992479535f,
-    0.134580709f, -0.990902635f,
-    0.146730474f, -0.989176510f,
-    0.158858143f, -0.987301418f,
-    0.170961889f, -0.985277642f,
-    0.183039888f, -0.983105487f,
-    0.195090322f, -0.980785280f,
-    0.207111376f, -0.978317371f,
-    0.219101240f, -0.975702130f,
-    0.231058108f, -0.972939952f,
-    0.242980180f, -0.970031253f,
-    0.254865660f, -0.966976471f,
-    0.266712757f, -0.963776066f,
-    0.278519689f, -0.960430519f,
-    0.290284677f, -0.956940336f,
-    0.302005949f, -0.953306040f,
-    0.313681740f, -0.949528181f,
-    0.325310292f, -0.945607325f,
-    0.336889853f, -0.941544065f,
-    0.348418680f, -0.937339012f,
-    0.359895037f, -0.932992799f,
-    0.371317194f, -0.928506080f,
-    0.382683432f, -0.923879533f,
-    0.393992040f, -0.919113852f,
-    0.405241314f, -0.914209756f,
-    0.416429560f, -0.909167983f,
-    0.427555093f, -0.903989293f,
-    0.438616239f, -0.898674466f,
-    0.449611330f, -0.893224301f,
-    0.460538711f, -0.887639620f,
-    0.471396737f, -0.881921264f,
-    0.482183772f, -0.876070094f,
-    0.492898192f, -0.870086991f,
-    0.503538384f, -0.863972856f,
-    0.514102744f, -0.857728610f,
-    0.524589683f, -0.851355193f,
-    0.534997620f, -0.844853565f,
-    0.545324988f, -0.838224706f,
-    0.555570233f, -0.831469612f,
-    0.565731811f, -0.824589303f,
-    0.575808191f, -0.817584813f,
-    0.585797857f, -0.810457198f,
-    0.595699304f, -0.803207531f,
-    0.605511041f, -0.795836905f,
-    0.615231591f, -0.788346428f,
-    0.624859488f, -0.780737229f,
-    0.634393284f, -0.773010453f,
-    0.643831543f, -0.765167266f,
-    0.653172843f, -0.757208847f,
-    0.662415778f, -0.749136395f,
-    0.671558955f, -0.740951125f,
-    0.680600998f, -0.732654272f,
-    0.689540545f, -0.724247083f,
-    0.698376249f, -0.715730825f,
-    0.707106781f, -0.707106781f,
-    0.715730825f, -0.698376249f,
-    0.724247083f, -0.689540545f,
-    0.732654272f, -0.680600998f,
-    0.740951125f, -0.671558955f,
-    0.749136395f, -0.662415778f,
-    0.757208847f, -0.653172843f,
-    0.765167266f, -0.643831543f,
-    0.773010453f, -0.634393284f,
-    0.780737229f, -0.624859488f,
-    0.788346428f, -0.615231591f,
-    0.795836905f, -0.605511041f,
-    0.803207531f, -0.595699304f,
-    0.810457198f, -0.585797857f,
-    0.817584813f, -0.575808191f,
-    0.824589303f, -0.565731811f,
-    0.831469612f, -0.555570233f,
-    0.838224706f, -0.545324988f,
-    0.844853565f, -0.534997620f,
-    0.851355193f, -0.524589683f,
-    0.857728610f, -0.514102744f,
-    0.863972856f, -0.503538384f,
-    0.870086991f, -0.492898192f,
-    0.876070094f, -0.482183772f,
-    0.881921264f, -0.471396737f,
-    0.887639620f, -0.460538711f,
-    0.893224301f, -0.449611330f,
-    0.898674466f, -0.438616239f,
-    0.903989293f, -0.427555093f,
-    0.909167983f, -0.416429560f,
-    0.914209756f, -0.405241314f,
-    0.919113852f, -0.393992040f,
-    0.923879533f, -0.382683432f,
-    0.928506080f, -0.371317194f,
-    0.932992799f, -0.359895037f,
-    0.937339012f, -0.348418680f,
-    0.941544065f, -0.336889853f,
-    0.945607325f, -0.325310292f,
-    0.949528181f, -0.313681740f,
-    0.953306040f, -0.302005949f,
-    0.956940336f, -0.290284677f,
-    0.960430519f, -0.278519689f,
-    0.963776066f, -0.266712757f,
-    0.966976471f, -0.254865660f,
-    0.970031253f, -0.242980180f,
-    0.972939952f, -0.231058108f,
-    0.975702130f, -0.219101240f,
-    0.978317371f, -0.207111376f,
-    0.980785280f, -0.195090322f,
-    0.983105487f, -0.183039888f,
-    0.985277642f, -0.170961889f,
-    0.987301418f, -0.158858143f,
-    0.989176510f, -0.146730474f,
-    0.990902635f, -0.134580709f,
-    0.992479535f, -0.122410675f,
-    0.993906970f, -0.110222207f,
-    0.995184727f, -0.098017140f,
-    0.996312612f, -0.085797312f,
-    0.997290457f, -0.073564564f,
-    0.998118113f, -0.061320736f,
-    0.998795456f, -0.049067674f,
-    0.999322385f, -0.036807223f,
-    0.999698819f, -0.024541229f,
-    0.999924702f, -0.012271538f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 1024, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_1024[2048] = {
-    1.000000000f,  0.000000000f,
-    0.999981175f,  0.006135885f,
-    0.999924702f,  0.012271538f,
-    0.999830582f,  0.018406730f,
-    0.999698819f,  0.024541229f,
-    0.999529418f,  0.030674803f,
-    0.999322385f,  0.036807223f,
-    0.999077728f,  0.042938257f,
-    0.998795456f,  0.049067674f,
-    0.998475581f,  0.055195244f,
-    0.998118113f,  0.061320736f,
-    0.997723067f,  0.067443920f,
-    0.997290457f,  0.073564564f,
-    0.996820299f,  0.079682438f,
-    0.996312612f,  0.085797312f,
-    0.995767414f,  0.091908956f,
-    0.995184727f,  0.098017140f,
-    0.994564571f,  0.104121634f,
-    0.993906970f,  0.110222207f,
-    0.993211949f,  0.116318631f,
-    0.992479535f,  0.122410675f,
-    0.991709754f,  0.128498111f,
-    0.990902635f,  0.134580709f,
-    0.990058210f,  0.140658239f,
-    0.989176510f,  0.146730474f,
-    0.988257568f,  0.152797185f,
-    0.987301418f,  0.158858143f,
-    0.986308097f,  0.164913120f,
-    0.985277642f,  0.170961889f,
-    0.984210092f,  0.177004220f,
-    0.983105487f,  0.183039888f,
-    0.981963869f,  0.189068664f,
-    0.980785280f,  0.195090322f,
-    0.979569766f,  0.201104635f,
-    0.978317371f,  0.207111376f,
-    0.977028143f,  0.213110320f,
-    0.975702130f,  0.219101240f,
-    0.974339383f,  0.225083911f,
-    0.972939952f,  0.231058108f,
-    0.971503891f,  0.237023606f,
-    0.970031253f,  0.242980180f,
-    0.968522094f,  0.248927606f,
-    0.966976471f,  0.254865660f,
-    0.965394442f,  0.260794118f,
-    0.963776066f,  0.266712757f,
-    0.962121404f,  0.272621355f,
-    0.960430519f,  0.278519689f,
-    0.958703475f,  0.284407537f,
-    0.956940336f,  0.290284677f,
-    0.955141168f,  0.296150888f,
-    0.953306040f,  0.302005949f,
-    0.951435021f,  0.307849640f,
-    0.949528181f,  0.313681740f,
-    0.947585591f,  0.319502031f,
-    0.945607325f,  0.325310292f,
-    0.943593458f,  0.331106306f,
-    0.941544065f,  0.336889853f,
-    0.939459224f,  0.342660717f,
-    0.937339012f,  0.348418680f,
-    0.935183510f,  0.354163525f,
-    0.932992799f,  0.359895037f,
-    0.930766961f,  0.365612998f,
-    0.928506080f,  0.371317194f,
-    0.926210242f,  0.377007410f,
-    0.923879533f,  0.382683432f,
-    0.921514039f,  0.388345047f,
-    0.919113852f,  0.393992040f,
-    0.916679060f,  0.399624200f,
-    0.914209756f,  0.405241314f,
-    0.911706032f,  0.410843171f,
-    0.909167983f,  0.416429560f,
-    0.906595705f,  0.422000271f,
-    0.903989293f,  0.427555093f,
-    0.901348847f,  0.433093819f,
-    0.898674466f,  0.438616239f,
-    0.895966250f,  0.444122145f,
-    0.893224301f,  0.449611330f,
-    0.890448723f,  0.455083587f,
-    0.887639620f,  0.460538711f,
-    0.884797098f,  0.465976496f,
-    0.881921264f,  0.471396737f,
-    0.879012226f,  0.476799230f,
-    0.876070094f,  0.482183772f,
-    0.873094978f,  0.487550160f,
-    0.870086991f,  0.492898192f,
-    0.867046246f,  0.498227667f,
-    0.863972856f,  0.503538384f,
-    0.860866939f,  0.508830143f,
-    0.857728610f,  0.514102744f,
-    0.854557988f,  0.519355990f,
-    0.851355193f,  0.524589683f,
-    0.848120345f,  0.529803625f,
-    0.844853565f,  0.534997620f,
-    0.841554977f,  0.540171473f,
-    0.838224706f,  0.545324988f,
-    0.834862875f,  0.550457973f,
-    0.831469612f,  0.555570233f,
-    0.828045045f,  0.560661576f,
-    0.824589303f,  0.565731811f,
-    0.821102515f,  0.570780746f,
-    0.817584813f,  0.575808191f,
-    0.814036330f,  0.580813958f,
-    0.810457198f,  0.585797857f,
-    0.806847554f,  0.590759702f,
-    0.803207531f,  0.595699304f,
-    0.799537269f,  0.600616479f,
-    0.795836905f,  0.605511041f,
-    0.792106577f,  0.610382806f,
-    0.788346428f,  0.615231591f,
-    0.784556597f,  0.620057212f,
-    0.780737229f,  0.624859488f,
-    0.776888466f,  0.629638239f,
-    0.773010453f,  0.634393284f,
-    0.769103338f,  0.639124445f,
-    0.765167266f,  0.643831543f,
-    0.761202385f,  0.648514401f,
-    0.757208847f,  0.653172843f,
-    0.753186799f,  0.657806693f,
-    0.749136395f,  0.662415778f,
-    0.745057785f,  0.666999922f,
-    0.740951125f,  0.671558955f,
-    0.736816569f,  0.676092704f,
-    0.732654272f,  0.680600998f,
-    0.728464390f,  0.685083668f,
-    0.724247083f,  0.689540545f,
-    0.720002508f,  0.693971461f,
-    0.715730825f,  0.698376249f,
-    0.711432196f,  0.702754744f,
-    0.707106781f,  0.707106781f,
-    0.702754744f,  0.711432196f,
-    0.698376249f,  0.715730825f,
-    0.693971461f,  0.720002508f,
-    0.689540545f,  0.724247083f,
-    0.685083668f,  0.728464390f,
-    0.680600998f,  0.732654272f,
-    0.676092704f,  0.736816569f,
-    0.671558955f,  0.740951125f,
-    0.666999922f,  0.745057785f,
-    0.662415778f,  0.749136395f,
-    0.657806693f,  0.753186799f,
-    0.653172843f,  0.757208847f,
-    0.648514401f,  0.761202385f,
-    0.643831543f,  0.765167266f,
-    0.639124445f,  0.769103338f,
-    0.634393284f,  0.773010453f,
-    0.629638239f,  0.776888466f,
-    0.624859488f,  0.780737229f,
-    0.620057212f,  0.784556597f,
-    0.615231591f,  0.788346428f,
-    0.610382806f,  0.792106577f,
-    0.605511041f,  0.795836905f,
-    0.600616479f,  0.799537269f,
-    0.595699304f,  0.803207531f,
-    0.590759702f,  0.806847554f,
-    0.585797857f,  0.810457198f,
-    0.580813958f,  0.814036330f,
-    0.575808191f,  0.817584813f,
-    0.570780746f,  0.821102515f,
-    0.565731811f,  0.824589303f,
-    0.560661576f,  0.828045045f,
-    0.555570233f,  0.831469612f,
-    0.550457973f,  0.834862875f,
-    0.545324988f,  0.838224706f,
-    0.540171473f,  0.841554977f,
-    0.534997620f,  0.844853565f,
-    0.529803625f,  0.848120345f,
-    0.524589683f,  0.851355193f,
-    0.519355990f,  0.854557988f,
-    0.514102744f,  0.857728610f,
-    0.508830143f,  0.860866939f,
-    0.503538384f,  0.863972856f,
-    0.498227667f,  0.867046246f,
-    0.492898192f,  0.870086991f,
-    0.487550160f,  0.873094978f,
-    0.482183772f,  0.876070094f,
-    0.476799230f,  0.879012226f,
-    0.471396737f,  0.881921264f,
-    0.465976496f,  0.884797098f,
-    0.460538711f,  0.887639620f,
-    0.455083587f,  0.890448723f,
-    0.449611330f,  0.893224301f,
-    0.444122145f,  0.895966250f,
-    0.438616239f,  0.898674466f,
-    0.433093819f,  0.901348847f,
-    0.427555093f,  0.903989293f,
-    0.422000271f,  0.906595705f,
-    0.416429560f,  0.909167983f,
-    0.410843171f,  0.911706032f,
-    0.405241314f,  0.914209756f,
-    0.399624200f,  0.916679060f,
-    0.393992040f,  0.919113852f,
-    0.388345047f,  0.921514039f,
-    0.382683432f,  0.923879533f,
-    0.377007410f,  0.926210242f,
-    0.371317194f,  0.928506080f,
-    0.365612998f,  0.930766961f,
-    0.359895037f,  0.932992799f,
-    0.354163525f,  0.935183510f,
-    0.348418680f,  0.937339012f,
-    0.342660717f,  0.939459224f,
-    0.336889853f,  0.941544065f,
-    0.331106306f,  0.943593458f,
-    0.325310292f,  0.945607325f,
-    0.319502031f,  0.947585591f,
-    0.313681740f,  0.949528181f,
-    0.307849640f,  0.951435021f,
-    0.302005949f,  0.953306040f,
-    0.296150888f,  0.955141168f,
-    0.290284677f,  0.956940336f,
-    0.284407537f,  0.958703475f,
-    0.278519689f,  0.960430519f,
-    0.272621355f,  0.962121404f,
-    0.266712757f,  0.963776066f,
-    0.260794118f,  0.965394442f,
-    0.254865660f,  0.966976471f,
-    0.248927606f,  0.968522094f,
-    0.242980180f,  0.970031253f,
-    0.237023606f,  0.971503891f,
-    0.231058108f,  0.972939952f,
-    0.225083911f,  0.974339383f,
-    0.219101240f,  0.975702130f,
-    0.213110320f,  0.977028143f,
-    0.207111376f,  0.978317371f,
-    0.201104635f,  0.979569766f,
-    0.195090322f,  0.980785280f,
-    0.189068664f,  0.981963869f,
-    0.183039888f,  0.983105487f,
-    0.177004220f,  0.984210092f,
-    0.170961889f,  0.985277642f,
-    0.164913120f,  0.986308097f,
-    0.158858143f,  0.987301418f,
-    0.152797185f,  0.988257568f,
-    0.146730474f,  0.989176510f,
-    0.140658239f,  0.990058210f,
-    0.134580709f,  0.990902635f,
-    0.128498111f,  0.991709754f,
-    0.122410675f,  0.992479535f,
-    0.116318631f,  0.993211949f,
-    0.110222207f,  0.993906970f,
-    0.104121634f,  0.994564571f,
-    0.098017140f,  0.995184727f,
-    0.091908956f,  0.995767414f,
-    0.085797312f,  0.996312612f,
-    0.079682438f,  0.996820299f,
-    0.073564564f,  0.997290457f,
-    0.067443920f,  0.997723067f,
-    0.061320736f,  0.998118113f,
-    0.055195244f,  0.998475581f,
-    0.049067674f,  0.998795456f,
-    0.042938257f,  0.999077728f,
-    0.036807223f,  0.999322385f,
-    0.030674803f,  0.999529418f,
-    0.024541229f,  0.999698819f,
-    0.018406730f,  0.999830582f,
-    0.012271538f,  0.999924702f,
-    0.006135885f,  0.999981175f,
-    0.000000000f,  1.000000000f,
-   -0.006135885f,  0.999981175f,
-   -0.012271538f,  0.999924702f,
-   -0.018406730f,  0.999830582f,
-   -0.024541229f,  0.999698819f,
-   -0.030674803f,  0.999529418f,
-   -0.036807223f,  0.999322385f,
-   -0.042938257f,  0.999077728f,
-   -0.049067674f,  0.998795456f,
-   -0.055195244f,  0.998475581f,
-   -0.061320736f,  0.998118113f,
-   -0.067443920f,  0.997723067f,
-   -0.073564564f,  0.997290457f,
-   -0.079682438f,  0.996820299f,
-   -0.085797312f,  0.996312612f,
-   -0.091908956f,  0.995767414f,
-   -0.098017140f,  0.995184727f,
-   -0.104121634f,  0.994564571f,
-   -0.110222207f,  0.993906970f,
-   -0.116318631f,  0.993211949f,
-   -0.122410675f,  0.992479535f,
-   -0.128498111f,  0.991709754f,
-   -0.134580709f,  0.990902635f,
-   -0.140658239f,  0.990058210f,
-   -0.146730474f,  0.989176510f,
-   -0.152797185f,  0.988257568f,
-   -0.158858143f,  0.987301418f,
-   -0.164913120f,  0.986308097f,
-   -0.170961889f,  0.985277642f,
-   -0.177004220f,  0.984210092f,
-   -0.183039888f,  0.983105487f,
-   -0.189068664f,  0.981963869f,
-   -0.195090322f,  0.980785280f,
-   -0.201104635f,  0.979569766f,
-   -0.207111376f,  0.978317371f,
-   -0.213110320f,  0.977028143f,
-   -0.219101240f,  0.975702130f,
-   -0.225083911f,  0.974339383f,
-   -0.231058108f,  0.972939952f,
-   -0.237023606f,  0.971503891f,
-   -0.242980180f,  0.970031253f,
-   -0.248927606f,  0.968522094f,
-   -0.254865660f,  0.966976471f,
-   -0.260794118f,  0.965394442f,
-   -0.266712757f,  0.963776066f,
-   -0.272621355f,  0.962121404f,
-   -0.278519689f,  0.960430519f,
-   -0.284407537f,  0.958703475f,
-   -0.290284677f,  0.956940336f,
-   -0.296150888f,  0.955141168f,
-   -0.302005949f,  0.953306040f,
-   -0.307849640f,  0.951435021f,
-   -0.313681740f,  0.949528181f,
-   -0.319502031f,  0.947585591f,
-   -0.325310292f,  0.945607325f,
-   -0.331106306f,  0.943593458f,
-   -0.336889853f,  0.941544065f,
-   -0.342660717f,  0.939459224f,
-   -0.348418680f,  0.937339012f,
-   -0.354163525f,  0.935183510f,
-   -0.359895037f,  0.932992799f,
-   -0.365612998f,  0.930766961f,
-   -0.371317194f,  0.928506080f,
-   -0.377007410f,  0.926210242f,
-   -0.382683432f,  0.923879533f,
-   -0.388345047f,  0.921514039f,
-   -0.393992040f,  0.919113852f,
-   -0.399624200f,  0.916679060f,
-   -0.405241314f,  0.914209756f,
-   -0.410843171f,  0.911706032f,
-   -0.416429560f,  0.909167983f,
-   -0.422000271f,  0.906595705f,
-   -0.427555093f,  0.903989293f,
-   -0.433093819f,  0.901348847f,
-   -0.438616239f,  0.898674466f,
-   -0.444122145f,  0.895966250f,
-   -0.449611330f,  0.893224301f,
-   -0.455083587f,  0.890448723f,
-   -0.460538711f,  0.887639620f,
-   -0.465976496f,  0.884797098f,
-   -0.471396737f,  0.881921264f,
-   -0.476799230f,  0.879012226f,
-   -0.482183772f,  0.876070094f,
-   -0.487550160f,  0.873094978f,
-   -0.492898192f,  0.870086991f,
-   -0.498227667f,  0.867046246f,
-   -0.503538384f,  0.863972856f,
-   -0.508830143f,  0.860866939f,
-   -0.514102744f,  0.857728610f,
-   -0.519355990f,  0.854557988f,
-   -0.524589683f,  0.851355193f,
-   -0.529803625f,  0.848120345f,
-   -0.534997620f,  0.844853565f,
-   -0.540171473f,  0.841554977f,
-   -0.545324988f,  0.838224706f,
-   -0.550457973f,  0.834862875f,
-   -0.555570233f,  0.831469612f,
-   -0.560661576f,  0.828045045f,
-   -0.565731811f,  0.824589303f,
-   -0.570780746f,  0.821102515f,
-   -0.575808191f,  0.817584813f,
-   -0.580813958f,  0.814036330f,
-   -0.585797857f,  0.810457198f,
-   -0.590759702f,  0.806847554f,
-   -0.595699304f,  0.803207531f,
-   -0.600616479f,  0.799537269f,
-   -0.605511041f,  0.795836905f,
-   -0.610382806f,  0.792106577f,
-   -0.615231591f,  0.788346428f,
-   -0.620057212f,  0.784556597f,
-   -0.624859488f,  0.780737229f,
-   -0.629638239f,  0.776888466f,
-   -0.634393284f,  0.773010453f,
-   -0.639124445f,  0.769103338f,
-   -0.643831543f,  0.765167266f,
-   -0.648514401f,  0.761202385f,
-   -0.653172843f,  0.757208847f,
-   -0.657806693f,  0.753186799f,
-   -0.662415778f,  0.749136395f,
-   -0.666999922f,  0.745057785f,
-   -0.671558955f,  0.740951125f,
-   -0.676092704f,  0.736816569f,
-   -0.680600998f,  0.732654272f,
-   -0.685083668f,  0.728464390f,
-   -0.689540545f,  0.724247083f,
-   -0.693971461f,  0.720002508f,
-   -0.698376249f,  0.715730825f,
-   -0.702754744f,  0.711432196f,
-   -0.707106781f,  0.707106781f,
-   -0.711432196f,  0.702754744f,
-   -0.715730825f,  0.698376249f,
-   -0.720002508f,  0.693971461f,
-   -0.724247083f,  0.689540545f,
-   -0.728464390f,  0.685083668f,
-   -0.732654272f,  0.680600998f,
-   -0.736816569f,  0.676092704f,
-   -0.740951125f,  0.671558955f,
-   -0.745057785f,  0.666999922f,
-   -0.749136395f,  0.662415778f,
-   -0.753186799f,  0.657806693f,
-   -0.757208847f,  0.653172843f,
-   -0.761202385f,  0.648514401f,
-   -0.765167266f,  0.643831543f,
-   -0.769103338f,  0.639124445f,
-   -0.773010453f,  0.634393284f,
-   -0.776888466f,  0.629638239f,
-   -0.780737229f,  0.624859488f,
-   -0.784556597f,  0.620057212f,
-   -0.788346428f,  0.615231591f,
-   -0.792106577f,  0.610382806f,
-   -0.795836905f,  0.605511041f,
-   -0.799537269f,  0.600616479f,
-   -0.803207531f,  0.595699304f,
-   -0.806847554f,  0.590759702f,
-   -0.810457198f,  0.585797857f,
-   -0.814036330f,  0.580813958f,
-   -0.817584813f,  0.575808191f,
-   -0.821102515f,  0.570780746f,
-   -0.824589303f,  0.565731811f,
-   -0.828045045f,  0.560661576f,
-   -0.831469612f,  0.555570233f,
-   -0.834862875f,  0.550457973f,
-   -0.838224706f,  0.545324988f,
-   -0.841554977f,  0.540171473f,
-   -0.844853565f,  0.534997620f,
-   -0.848120345f,  0.529803625f,
-   -0.851355193f,  0.524589683f,
-   -0.854557988f,  0.519355990f,
-   -0.857728610f,  0.514102744f,
-   -0.860866939f,  0.508830143f,
-   -0.863972856f,  0.503538384f,
-   -0.867046246f,  0.498227667f,
-   -0.870086991f,  0.492898192f,
-   -0.873094978f,  0.487550160f,
-   -0.876070094f,  0.482183772f,
-   -0.879012226f,  0.476799230f,
-   -0.881921264f,  0.471396737f,
-   -0.884797098f,  0.465976496f,
-   -0.887639620f,  0.460538711f,
-   -0.890448723f,  0.455083587f,
-   -0.893224301f,  0.449611330f,
-   -0.895966250f,  0.444122145f,
-   -0.898674466f,  0.438616239f,
-   -0.901348847f,  0.433093819f,
-   -0.903989293f,  0.427555093f,
-   -0.906595705f,  0.422000271f,
-   -0.909167983f,  0.416429560f,
-   -0.911706032f,  0.410843171f,
-   -0.914209756f,  0.405241314f,
-   -0.916679060f,  0.399624200f,
-   -0.919113852f,  0.393992040f,
-   -0.921514039f,  0.388345047f,
-   -0.923879533f,  0.382683432f,
-   -0.926210242f,  0.377007410f,
-   -0.928506080f,  0.371317194f,
-   -0.930766961f,  0.365612998f,
-   -0.932992799f,  0.359895037f,
-   -0.935183510f,  0.354163525f,
-   -0.937339012f,  0.348418680f,
-   -0.939459224f,  0.342660717f,
-   -0.941544065f,  0.336889853f,
-   -0.943593458f,  0.331106306f,
-   -0.945607325f,  0.325310292f,
-   -0.947585591f,  0.319502031f,
-   -0.949528181f,  0.313681740f,
-   -0.951435021f,  0.307849640f,
-   -0.953306040f,  0.302005949f,
-   -0.955141168f,  0.296150888f,
-   -0.956940336f,  0.290284677f,
-   -0.958703475f,  0.284407537f,
-   -0.960430519f,  0.278519689f,
-   -0.962121404f,  0.272621355f,
-   -0.963776066f,  0.266712757f,
-   -0.965394442f,  0.260794118f,
-   -0.966976471f,  0.254865660f,
-   -0.968522094f,  0.248927606f,
-   -0.970031253f,  0.242980180f,
-   -0.971503891f,  0.237023606f,
-   -0.972939952f,  0.231058108f,
-   -0.974339383f,  0.225083911f,
-   -0.975702130f,  0.219101240f,
-   -0.977028143f,  0.213110320f,
-   -0.978317371f,  0.207111376f,
-   -0.979569766f,  0.201104635f,
-   -0.980785280f,  0.195090322f,
-   -0.981963869f,  0.189068664f,
-   -0.983105487f,  0.183039888f,
-   -0.984210092f,  0.177004220f,
-   -0.985277642f,  0.170961889f,
-   -0.986308097f,  0.164913120f,
-   -0.987301418f,  0.158858143f,
-   -0.988257568f,  0.152797185f,
-   -0.989176510f,  0.146730474f,
-   -0.990058210f,  0.140658239f,
-   -0.990902635f,  0.134580709f,
-   -0.991709754f,  0.128498111f,
-   -0.992479535f,  0.122410675f,
-   -0.993211949f,  0.116318631f,
-   -0.993906970f,  0.110222207f,
-   -0.994564571f,  0.104121634f,
-   -0.995184727f,  0.098017140f,
-   -0.995767414f,  0.091908956f,
-   -0.996312612f,  0.085797312f,
-   -0.996820299f,  0.079682438f,
-   -0.997290457f,  0.073564564f,
-   -0.997723067f,  0.067443920f,
-   -0.998118113f,  0.061320736f,
-   -0.998475581f,  0.055195244f,
-   -0.998795456f,  0.049067674f,
-   -0.999077728f,  0.042938257f,
-   -0.999322385f,  0.036807223f,
-   -0.999529418f,  0.030674803f,
-   -0.999698819f,  0.024541229f,
-   -0.999830582f,  0.018406730f,
-   -0.999924702f,  0.012271538f,
-   -0.999981175f,  0.006135885f,
-   -1.000000000f,  0.000000000f,
-   -0.999981175f, -0.006135885f,
-   -0.999924702f, -0.012271538f,
-   -0.999830582f, -0.018406730f,
-   -0.999698819f, -0.024541229f,
-   -0.999529418f, -0.030674803f,
-   -0.999322385f, -0.036807223f,
-   -0.999077728f, -0.042938257f,
-   -0.998795456f, -0.049067674f,
-   -0.998475581f, -0.055195244f,
-   -0.998118113f, -0.061320736f,
-   -0.997723067f, -0.067443920f,
-   -0.997290457f, -0.073564564f,
-   -0.996820299f, -0.079682438f,
-   -0.996312612f, -0.085797312f,
-   -0.995767414f, -0.091908956f,
-   -0.995184727f, -0.098017140f,
-   -0.994564571f, -0.104121634f,
-   -0.993906970f, -0.110222207f,
-   -0.993211949f, -0.116318631f,
-   -0.992479535f, -0.122410675f,
-   -0.991709754f, -0.128498111f,
-   -0.990902635f, -0.134580709f,
-   -0.990058210f, -0.140658239f,
-   -0.989176510f, -0.146730474f,
-   -0.988257568f, -0.152797185f,
-   -0.987301418f, -0.158858143f,
-   -0.986308097f, -0.164913120f,
-   -0.985277642f, -0.170961889f,
-   -0.984210092f, -0.177004220f,
-   -0.983105487f, -0.183039888f,
-   -0.981963869f, -0.189068664f,
-   -0.980785280f, -0.195090322f,
-   -0.979569766f, -0.201104635f,
-   -0.978317371f, -0.207111376f,
-   -0.977028143f, -0.213110320f,
-   -0.975702130f, -0.219101240f,
-   -0.974339383f, -0.225083911f,
-   -0.972939952f, -0.231058108f,
-   -0.971503891f, -0.237023606f,
-   -0.970031253f, -0.242980180f,
-   -0.968522094f, -0.248927606f,
-   -0.966976471f, -0.254865660f,
-   -0.965394442f, -0.260794118f,
-   -0.963776066f, -0.266712757f,
-   -0.962121404f, -0.272621355f,
-   -0.960430519f, -0.278519689f,
-   -0.958703475f, -0.284407537f,
-   -0.956940336f, -0.290284677f,
-   -0.955141168f, -0.296150888f,
-   -0.953306040f, -0.302005949f,
-   -0.951435021f, -0.307849640f,
-   -0.949528181f, -0.313681740f,
-   -0.947585591f, -0.319502031f,
-   -0.945607325f, -0.325310292f,
-   -0.943593458f, -0.331106306f,
-   -0.941544065f, -0.336889853f,
-   -0.939459224f, -0.342660717f,
-   -0.937339012f, -0.348418680f,
-   -0.935183510f, -0.354163525f,
-   -0.932992799f, -0.359895037f,
-   -0.930766961f, -0.365612998f,
-   -0.928506080f, -0.371317194f,
-   -0.926210242f, -0.377007410f,
-   -0.923879533f, -0.382683432f,
-   -0.921514039f, -0.388345047f,
-   -0.919113852f, -0.393992040f,
-   -0.916679060f, -0.399624200f,
-   -0.914209756f, -0.405241314f,
-   -0.911706032f, -0.410843171f,
-   -0.909167983f, -0.416429560f,
-   -0.906595705f, -0.422000271f,
-   -0.903989293f, -0.427555093f,
-   -0.901348847f, -0.433093819f,
-   -0.898674466f, -0.438616239f,
-   -0.895966250f, -0.444122145f,
-   -0.893224301f, -0.449611330f,
-   -0.890448723f, -0.455083587f,
-   -0.887639620f, -0.460538711f,
-   -0.884797098f, -0.465976496f,
-   -0.881921264f, -0.471396737f,
-   -0.879012226f, -0.476799230f,
-   -0.876070094f, -0.482183772f,
-   -0.873094978f, -0.487550160f,
-   -0.870086991f, -0.492898192f,
-   -0.867046246f, -0.498227667f,
-   -0.863972856f, -0.503538384f,
-   -0.860866939f, -0.508830143f,
-   -0.857728610f, -0.514102744f,
-   -0.854557988f, -0.519355990f,
-   -0.851355193f, -0.524589683f,
-   -0.848120345f, -0.529803625f,
-   -0.844853565f, -0.534997620f,
-   -0.841554977f, -0.540171473f,
-   -0.838224706f, -0.545324988f,
-   -0.834862875f, -0.550457973f,
-   -0.831469612f, -0.555570233f,
-   -0.828045045f, -0.560661576f,
-   -0.824589303f, -0.565731811f,
-   -0.821102515f, -0.570780746f,
-   -0.817584813f, -0.575808191f,
-   -0.814036330f, -0.580813958f,
-   -0.810457198f, -0.585797857f,
-   -0.806847554f, -0.590759702f,
-   -0.803207531f, -0.595699304f,
-   -0.799537269f, -0.600616479f,
-   -0.795836905f, -0.605511041f,
-   -0.792106577f, -0.610382806f,
-   -0.788346428f, -0.615231591f,
-   -0.784556597f, -0.620057212f,
-   -0.780737229f, -0.624859488f,
-   -0.776888466f, -0.629638239f,
-   -0.773010453f, -0.634393284f,
-   -0.769103338f, -0.639124445f,
-   -0.765167266f, -0.643831543f,
-   -0.761202385f, -0.648514401f,
-   -0.757208847f, -0.653172843f,
-   -0.753186799f, -0.657806693f,
-   -0.749136395f, -0.662415778f,
-   -0.745057785f, -0.666999922f,
-   -0.740951125f, -0.671558955f,
-   -0.736816569f, -0.676092704f,
-   -0.732654272f, -0.680600998f,
-   -0.728464390f, -0.685083668f,
-   -0.724247083f, -0.689540545f,
-   -0.720002508f, -0.693971461f,
-   -0.715730825f, -0.698376249f,
-   -0.711432196f, -0.702754744f,
-   -0.707106781f, -0.707106781f,
-   -0.702754744f, -0.711432196f,
-   -0.698376249f, -0.715730825f,
-   -0.693971461f, -0.720002508f,
-   -0.689540545f, -0.724247083f,
-   -0.685083668f, -0.728464390f,
-   -0.680600998f, -0.732654272f,
-   -0.676092704f, -0.736816569f,
-   -0.671558955f, -0.740951125f,
-   -0.666999922f, -0.745057785f,
-   -0.662415778f, -0.749136395f,
-   -0.657806693f, -0.753186799f,
-   -0.653172843f, -0.757208847f,
-   -0.648514401f, -0.761202385f,
-   -0.643831543f, -0.765167266f,
-   -0.639124445f, -0.769103338f,
-   -0.634393284f, -0.773010453f,
-   -0.629638239f, -0.776888466f,
-   -0.624859488f, -0.780737229f,
-   -0.620057212f, -0.784556597f,
-   -0.615231591f, -0.788346428f,
-   -0.610382806f, -0.792106577f,
-   -0.605511041f, -0.795836905f,
-   -0.600616479f, -0.799537269f,
-   -0.595699304f, -0.803207531f,
-   -0.590759702f, -0.806847554f,
-   -0.585797857f, -0.810457198f,
-   -0.580813958f, -0.814036330f,
-   -0.575808191f, -0.817584813f,
-   -0.570780746f, -0.821102515f,
-   -0.565731811f, -0.824589303f,
-   -0.560661576f, -0.828045045f,
-   -0.555570233f, -0.831469612f,
-   -0.550457973f, -0.834862875f,
-   -0.545324988f, -0.838224706f,
-   -0.540171473f, -0.841554977f,
-   -0.534997620f, -0.844853565f,
-   -0.529803625f, -0.848120345f,
-   -0.524589683f, -0.851355193f,
-   -0.519355990f, -0.854557988f,
-   -0.514102744f, -0.857728610f,
-   -0.508830143f, -0.860866939f,
-   -0.503538384f, -0.863972856f,
-   -0.498227667f, -0.867046246f,
-   -0.492898192f, -0.870086991f,
-   -0.487550160f, -0.873094978f,
-   -0.482183772f, -0.876070094f,
-   -0.476799230f, -0.879012226f,
-   -0.471396737f, -0.881921264f,
-   -0.465976496f, -0.884797098f,
-   -0.460538711f, -0.887639620f,
-   -0.455083587f, -0.890448723f,
-   -0.449611330f, -0.893224301f,
-   -0.444122145f, -0.895966250f,
-   -0.438616239f, -0.898674466f,
-   -0.433093819f, -0.901348847f,
-   -0.427555093f, -0.903989293f,
-   -0.422000271f, -0.906595705f,
-   -0.416429560f, -0.909167983f,
-   -0.410843171f, -0.911706032f,
-   -0.405241314f, -0.914209756f,
-   -0.399624200f, -0.916679060f,
-   -0.393992040f, -0.919113852f,
-   -0.388345047f, -0.921514039f,
-   -0.382683432f, -0.923879533f,
-   -0.377007410f, -0.926210242f,
-   -0.371317194f, -0.928506080f,
-   -0.365612998f, -0.930766961f,
-   -0.359895037f, -0.932992799f,
-   -0.354163525f, -0.935183510f,
-   -0.348418680f, -0.937339012f,
-   -0.342660717f, -0.939459224f,
-   -0.336889853f, -0.941544065f,
-   -0.331106306f, -0.943593458f,
-   -0.325310292f, -0.945607325f,
-   -0.319502031f, -0.947585591f,
-   -0.313681740f, -0.949528181f,
-   -0.307849640f, -0.951435021f,
-   -0.302005949f, -0.953306040f,
-   -0.296150888f, -0.955141168f,
-   -0.290284677f, -0.956940336f,
-   -0.284407537f, -0.958703475f,
-   -0.278519689f, -0.960430519f,
-   -0.272621355f, -0.962121404f,
-   -0.266712757f, -0.963776066f,
-   -0.260794118f, -0.965394442f,
-   -0.254865660f, -0.966976471f,
-   -0.248927606f, -0.968522094f,
-   -0.242980180f, -0.970031253f,
-   -0.237023606f, -0.971503891f,
-   -0.231058108f, -0.972939952f,
-   -0.225083911f, -0.974339383f,
-   -0.219101240f, -0.975702130f,
-   -0.213110320f, -0.977028143f,
-   -0.207111376f, -0.978317371f,
-   -0.201104635f, -0.979569766f,
-   -0.195090322f, -0.980785280f,
-   -0.189068664f, -0.981963869f,
-   -0.183039888f, -0.983105487f,
-   -0.177004220f, -0.984210092f,
-   -0.170961889f, -0.985277642f,
-   -0.164913120f, -0.986308097f,
-   -0.158858143f, -0.987301418f,
-   -0.152797185f, -0.988257568f,
-   -0.146730474f, -0.989176510f,
-   -0.140658239f, -0.990058210f,
-   -0.134580709f, -0.990902635f,
-   -0.128498111f, -0.991709754f,
-   -0.122410675f, -0.992479535f,
-   -0.116318631f, -0.993211949f,
-   -0.110222207f, -0.993906970f,
-   -0.104121634f, -0.994564571f,
-   -0.098017140f, -0.995184727f,
-   -0.091908956f, -0.995767414f,
-   -0.085797312f, -0.996312612f,
-   -0.079682438f, -0.996820299f,
-   -0.073564564f, -0.997290457f,
-   -0.067443920f, -0.997723067f,
-   -0.061320736f, -0.998118113f,
-   -0.055195244f, -0.998475581f,
-   -0.049067674f, -0.998795456f,
-   -0.042938257f, -0.999077728f,
-   -0.036807223f, -0.999322385f,
-   -0.030674803f, -0.999529418f,
-   -0.024541229f, -0.999698819f,
-   -0.018406730f, -0.999830582f,
-   -0.012271538f, -0.999924702f,
-   -0.006135885f, -0.999981175f,
-   -0.000000000f, -1.000000000f,
-    0.006135885f, -0.999981175f,
-    0.012271538f, -0.999924702f,
-    0.018406730f, -0.999830582f,
-    0.024541229f, -0.999698819f,
-    0.030674803f, -0.999529418f,
-    0.036807223f, -0.999322385f,
-    0.042938257f, -0.999077728f,
-    0.049067674f, -0.998795456f,
-    0.055195244f, -0.998475581f,
-    0.061320736f, -0.998118113f,
-    0.067443920f, -0.997723067f,
-    0.073564564f, -0.997290457f,
-    0.079682438f, -0.996820299f,
-    0.085797312f, -0.996312612f,
-    0.091908956f, -0.995767414f,
-    0.098017140f, -0.995184727f,
-    0.104121634f, -0.994564571f,
-    0.110222207f, -0.993906970f,
-    0.116318631f, -0.993211949f,
-    0.122410675f, -0.992479535f,
-    0.128498111f, -0.991709754f,
-    0.134580709f, -0.990902635f,
-    0.140658239f, -0.990058210f,
-    0.146730474f, -0.989176510f,
-    0.152797185f, -0.988257568f,
-    0.158858143f, -0.987301418f,
-    0.164913120f, -0.986308097f,
-    0.170961889f, -0.985277642f,
-    0.177004220f, -0.984210092f,
-    0.183039888f, -0.983105487f,
-    0.189068664f, -0.981963869f,
-    0.195090322f, -0.980785280f,
-    0.201104635f, -0.979569766f,
-    0.207111376f, -0.978317371f,
-    0.213110320f, -0.977028143f,
-    0.219101240f, -0.975702130f,
-    0.225083911f, -0.974339383f,
-    0.231058108f, -0.972939952f,
-    0.237023606f, -0.971503891f,
-    0.242980180f, -0.970031253f,
-    0.248927606f, -0.968522094f,
-    0.254865660f, -0.966976471f,
-    0.260794118f, -0.965394442f,
-    0.266712757f, -0.963776066f,
-    0.272621355f, -0.962121404f,
-    0.278519689f, -0.960430519f,
-    0.284407537f, -0.958703475f,
-    0.290284677f, -0.956940336f,
-    0.296150888f, -0.955141168f,
-    0.302005949f, -0.953306040f,
-    0.307849640f, -0.951435021f,
-    0.313681740f, -0.949528181f,
-    0.319502031f, -0.947585591f,
-    0.325310292f, -0.945607325f,
-    0.331106306f, -0.943593458f,
-    0.336889853f, -0.941544065f,
-    0.342660717f, -0.939459224f,
-    0.348418680f, -0.937339012f,
-    0.354163525f, -0.935183510f,
-    0.359895037f, -0.932992799f,
-    0.365612998f, -0.930766961f,
-    0.371317194f, -0.928506080f,
-    0.377007410f, -0.926210242f,
-    0.382683432f, -0.923879533f,
-    0.388345047f, -0.921514039f,
-    0.393992040f, -0.919113852f,
-    0.399624200f, -0.916679060f,
-    0.405241314f, -0.914209756f,
-    0.410843171f, -0.911706032f,
-    0.416429560f, -0.909167983f,
-    0.422000271f, -0.906595705f,
-    0.427555093f, -0.903989293f,
-    0.433093819f, -0.901348847f,
-    0.438616239f, -0.898674466f,
-    0.444122145f, -0.895966250f,
-    0.449611330f, -0.893224301f,
-    0.455083587f, -0.890448723f,
-    0.460538711f, -0.887639620f,
-    0.465976496f, -0.884797098f,
-    0.471396737f, -0.881921264f,
-    0.476799230f, -0.879012226f,
-    0.482183772f, -0.876070094f,
-    0.487550160f, -0.873094978f,
-    0.492898192f, -0.870086991f,
-    0.498227667f, -0.867046246f,
-    0.503538384f, -0.863972856f,
-    0.508830143f, -0.860866939f,
-    0.514102744f, -0.857728610f,
-    0.519355990f, -0.854557988f,
-    0.524589683f, -0.851355193f,
-    0.529803625f, -0.848120345f,
-    0.534997620f, -0.844853565f,
-    0.540171473f, -0.841554977f,
-    0.545324988f, -0.838224706f,
-    0.550457973f, -0.834862875f,
-    0.555570233f, -0.831469612f,
-    0.560661576f, -0.828045045f,
-    0.565731811f, -0.824589303f,
-    0.570780746f, -0.821102515f,
-    0.575808191f, -0.817584813f,
-    0.580813958f, -0.814036330f,
-    0.585797857f, -0.810457198f,
-    0.590759702f, -0.806847554f,
-    0.595699304f, -0.803207531f,
-    0.600616479f, -0.799537269f,
-    0.605511041f, -0.795836905f,
-    0.610382806f, -0.792106577f,
-    0.615231591f, -0.788346428f,
-    0.620057212f, -0.784556597f,
-    0.624859488f, -0.780737229f,
-    0.629638239f, -0.776888466f,
-    0.634393284f, -0.773010453f,
-    0.639124445f, -0.769103338f,
-    0.643831543f, -0.765167266f,
-    0.648514401f, -0.761202385f,
-    0.653172843f, -0.757208847f,
-    0.657806693f, -0.753186799f,
-    0.662415778f, -0.749136395f,
-    0.666999922f, -0.745057785f,
-    0.671558955f, -0.740951125f,
-    0.676092704f, -0.736816569f,
-    0.680600998f, -0.732654272f,
-    0.685083668f, -0.728464390f,
-    0.689540545f, -0.724247083f,
-    0.693971461f, -0.720002508f,
-    0.698376249f, -0.715730825f,
-    0.702754744f, -0.711432196f,
-    0.707106781f, -0.707106781f,
-    0.711432196f, -0.702754744f,
-    0.715730825f, -0.698376249f,
-    0.720002508f, -0.693971461f,
-    0.724247083f, -0.689540545f,
-    0.728464390f, -0.685083668f,
-    0.732654272f, -0.680600998f,
-    0.736816569f, -0.676092704f,
-    0.740951125f, -0.671558955f,
-    0.745057785f, -0.666999922f,
-    0.749136395f, -0.662415778f,
-    0.753186799f, -0.657806693f,
-    0.757208847f, -0.653172843f,
-    0.761202385f, -0.648514401f,
-    0.765167266f, -0.643831543f,
-    0.769103338f, -0.639124445f,
-    0.773010453f, -0.634393284f,
-    0.776888466f, -0.629638239f,
-    0.780737229f, -0.624859488f,
-    0.784556597f, -0.620057212f,
-    0.788346428f, -0.615231591f,
-    0.792106577f, -0.610382806f,
-    0.795836905f, -0.605511041f,
-    0.799537269f, -0.600616479f,
-    0.803207531f, -0.595699304f,
-    0.806847554f, -0.590759702f,
-    0.810457198f, -0.585797857f,
-    0.814036330f, -0.580813958f,
-    0.817584813f, -0.575808191f,
-    0.821102515f, -0.570780746f,
-    0.824589303f, -0.565731811f,
-    0.828045045f, -0.560661576f,
-    0.831469612f, -0.555570233f,
-    0.834862875f, -0.550457973f,
-    0.838224706f, -0.545324988f,
-    0.841554977f, -0.540171473f,
-    0.844853565f, -0.534997620f,
-    0.848120345f, -0.529803625f,
-    0.851355193f, -0.524589683f,
-    0.854557988f, -0.519355990f,
-    0.857728610f, -0.514102744f,
-    0.860866939f, -0.508830143f,
-    0.863972856f, -0.503538384f,
-    0.867046246f, -0.498227667f,
-    0.870086991f, -0.492898192f,
-    0.873094978f, -0.487550160f,
-    0.876070094f, -0.482183772f,
-    0.879012226f, -0.476799230f,
-    0.881921264f, -0.471396737f,
-    0.884797098f, -0.465976496f,
-    0.887639620f, -0.460538711f,
-    0.890448723f, -0.455083587f,
-    0.893224301f, -0.449611330f,
-    0.895966250f, -0.444122145f,
-    0.898674466f, -0.438616239f,
-    0.901348847f, -0.433093819f,
-    0.903989293f, -0.427555093f,
-    0.906595705f, -0.422000271f,
-    0.909167983f, -0.416429560f,
-    0.911706032f, -0.410843171f,
-    0.914209756f, -0.405241314f,
-    0.916679060f, -0.399624200f,
-    0.919113852f, -0.393992040f,
-    0.921514039f, -0.388345047f,
-    0.923879533f, -0.382683432f,
-    0.926210242f, -0.377007410f,
-    0.928506080f, -0.371317194f,
-    0.930766961f, -0.365612998f,
-    0.932992799f, -0.359895037f,
-    0.935183510f, -0.354163525f,
-    0.937339012f, -0.348418680f,
-    0.939459224f, -0.342660717f,
-    0.941544065f, -0.336889853f,
-    0.943593458f, -0.331106306f,
-    0.945607325f, -0.325310292f,
-    0.947585591f, -0.319502031f,
-    0.949528181f, -0.313681740f,
-    0.951435021f, -0.307849640f,
-    0.953306040f, -0.302005949f,
-    0.955141168f, -0.296150888f,
-    0.956940336f, -0.290284677f,
-    0.958703475f, -0.284407537f,
-    0.960430519f, -0.278519689f,
-    0.962121404f, -0.272621355f,
-    0.963776066f, -0.266712757f,
-    0.965394442f, -0.260794118f,
-    0.966976471f, -0.254865660f,
-    0.968522094f, -0.248927606f,
-    0.970031253f, -0.242980180f,
-    0.971503891f, -0.237023606f,
-    0.972939952f, -0.231058108f,
-    0.974339383f, -0.225083911f,
-    0.975702130f, -0.219101240f,
-    0.977028143f, -0.213110320f,
-    0.978317371f, -0.207111376f,
-    0.979569766f, -0.201104635f,
-    0.980785280f, -0.195090322f,
-    0.981963869f, -0.189068664f,
-    0.983105487f, -0.183039888f,
-    0.984210092f, -0.177004220f,
-    0.985277642f, -0.170961889f,
-    0.986308097f, -0.164913120f,
-    0.987301418f, -0.158858143f,
-    0.988257568f, -0.152797185f,
-    0.989176510f, -0.146730474f,
-    0.990058210f, -0.140658239f,
-    0.990902635f, -0.134580709f,
-    0.991709754f, -0.128498111f,
-    0.992479535f, -0.122410675f,
-    0.993211949f, -0.116318631f,
-    0.993906970f, -0.110222207f,
-    0.994564571f, -0.104121634f,
-    0.995184727f, -0.098017140f,
-    0.995767414f, -0.091908956f,
-    0.996312612f, -0.085797312f,
-    0.996820299f, -0.079682438f,
-    0.997290457f, -0.073564564f,
-    0.997723067f, -0.067443920f,
-    0.998118113f, -0.061320736f,
-    0.998475581f, -0.055195244f,
-    0.998795456f, -0.049067674f,
-    0.999077728f, -0.042938257f,
-    0.999322385f, -0.036807223f,
-    0.999529418f, -0.030674803f,
-    0.999698819f, -0.024541229f,
-    0.999830582f, -0.018406730f,
-    0.999924702f, -0.012271538f,
-    0.999981175f, -0.006135885f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 2048, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_2048[4096] = {
-    1.000000000f,  0.000000000f,
-    0.999995294f,  0.003067957f,
-    0.999981175f,  0.006135885f,
-    0.999957645f,  0.009203755f,
-    0.999924702f,  0.012271538f,
-    0.999882347f,  0.015339206f,
-    0.999830582f,  0.018406730f,
-    0.999769405f,  0.021474080f,
-    0.999698819f,  0.024541229f,
-    0.999618822f,  0.027608146f,
-    0.999529418f,  0.030674803f,
-    0.999430605f,  0.033741172f,
-    0.999322385f,  0.036807223f,
-    0.999204759f,  0.039872928f,
-    0.999077728f,  0.042938257f,
-    0.998941293f,  0.046003182f,
-    0.998795456f,  0.049067674f,
-    0.998640218f,  0.052131705f,
-    0.998475581f,  0.055195244f,
-    0.998301545f,  0.058258265f,
-    0.998118113f,  0.061320736f,
-    0.997925286f,  0.064382631f,
-    0.997723067f,  0.067443920f,
-    0.997511456f,  0.070504573f,
-    0.997290457f,  0.073564564f,
-    0.997060070f,  0.076623861f,
-    0.996820299f,  0.079682438f,
-    0.996571146f,  0.082740265f,
-    0.996312612f,  0.085797312f,
-    0.996044701f,  0.088853553f,
-    0.995767414f,  0.091908956f,
-    0.995480755f,  0.094963495f,
-    0.995184727f,  0.098017140f,
-    0.994879331f,  0.101069863f,
-    0.994564571f,  0.104121634f,
-    0.994240449f,  0.107172425f,
-    0.993906970f,  0.110222207f,
-    0.993564136f,  0.113270952f,
-    0.993211949f,  0.116318631f,
-    0.992850414f,  0.119365215f,
-    0.992479535f,  0.122410675f,
-    0.992099313f,  0.125454983f,
-    0.991709754f,  0.128498111f,
-    0.991310860f,  0.131540029f,
-    0.990902635f,  0.134580709f,
-    0.990485084f,  0.137620122f,
-    0.990058210f,  0.140658239f,
-    0.989622017f,  0.143695033f,
-    0.989176510f,  0.146730474f,
-    0.988721692f,  0.149764535f,
-    0.988257568f,  0.152797185f,
-    0.987784142f,  0.155828398f,
-    0.987301418f,  0.158858143f,
-    0.986809402f,  0.161886394f,
-    0.986308097f,  0.164913120f,
-    0.985797509f,  0.167938295f,
-    0.985277642f,  0.170961889f,
-    0.984748502f,  0.173983873f,
-    0.984210092f,  0.177004220f,
-    0.983662419f,  0.180022901f,
-    0.983105487f,  0.183039888f,
-    0.982539302f,  0.186055152f,
-    0.981963869f,  0.189068664f,
-    0.981379193f,  0.192080397f,
-    0.980785280f,  0.195090322f,
-    0.980182136f,  0.198098411f,
-    0.979569766f,  0.201104635f,
-    0.978948175f,  0.204108966f,
-    0.978317371f,  0.207111376f,
-    0.977677358f,  0.210111837f,
-    0.977028143f,  0.213110320f,
-    0.976369731f,  0.216106797f,
-    0.975702130f,  0.219101240f,
-    0.975025345f,  0.222093621f,
-    0.974339383f,  0.225083911f,
-    0.973644250f,  0.228072083f,
-    0.972939952f,  0.231058108f,
-    0.972226497f,  0.234041959f,
-    0.971503891f,  0.237023606f,
-    0.970772141f,  0.240003022f,
-    0.970031253f,  0.242980180f,
-    0.969281235f,  0.245955050f,
-    0.968522094f,  0.248927606f,
-    0.967753837f,  0.251897818f,
-    0.966976471f,  0.254865660f,
-    0.966190003f,  0.257831102f,
-    0.965394442f,  0.260794118f,
-    0.964589793f,  0.263754679f,
-    0.963776066f,  0.266712757f,
-    0.962953267f,  0.269668326f,
-    0.962121404f,  0.272621355f,
-    0.961280486f,  0.275571819f,
-    0.960430519f,  0.278519689f,
-    0.959571513f,  0.281464938f,
-    0.958703475f,  0.284407537f,
-    0.957826413f,  0.287347460f,
-    0.956940336f,  0.290284677f,
-    0.956045251f,  0.293219163f,
-    0.955141168f,  0.296150888f,
-    0.954228095f,  0.299079826f,
-    0.953306040f,  0.302005949f,
-    0.952375013f,  0.304929230f,
-    0.951435021f,  0.307849640f,
-    0.950486074f,  0.310767153f,
-    0.949528181f,  0.313681740f,
-    0.948561350f,  0.316593376f,
-    0.947585591f,  0.319502031f,
-    0.946600913f,  0.322407679f,
-    0.945607325f,  0.325310292f,
-    0.944604837f,  0.328209844f,
-    0.943593458f,  0.331106306f,
-    0.942573198f,  0.333999651f,
-    0.941544065f,  0.336889853f,
-    0.940506071f,  0.339776884f,
-    0.939459224f,  0.342660717f,
-    0.938403534f,  0.345541325f,
-    0.937339012f,  0.348418680f,
-    0.936265667f,  0.351292756f,
-    0.935183510f,  0.354163525f,
-    0.934092550f,  0.357030961f,
-    0.932992799f,  0.359895037f,
-    0.931884266f,  0.362755724f,
-    0.930766961f,  0.365612998f,
-    0.929640896f,  0.368466830f,
-    0.928506080f,  0.371317194f,
-    0.927362526f,  0.374164063f,
-    0.926210242f,  0.377007410f,
-    0.925049241f,  0.379847209f,
-    0.923879533f,  0.382683432f,
-    0.922701128f,  0.385516054f,
-    0.921514039f,  0.388345047f,
-    0.920318277f,  0.391170384f,
-    0.919113852f,  0.393992040f,
-    0.917900776f,  0.396809987f,
-    0.916679060f,  0.399624200f,
-    0.915448716f,  0.402434651f,
-    0.914209756f,  0.405241314f,
-    0.912962190f,  0.408044163f,
-    0.911706032f,  0.410843171f,
-    0.910441292f,  0.413638312f,
-    0.909167983f,  0.416429560f,
-    0.907886116f,  0.419216888f,
-    0.906595705f,  0.422000271f,
-    0.905296759f,  0.424779681f,
-    0.903989293f,  0.427555093f,
-    0.902673318f,  0.430326481f,
-    0.901348847f,  0.433093819f,
-    0.900015892f,  0.435857080f,
-    0.898674466f,  0.438616239f,
-    0.897324581f,  0.441371269f,
-    0.895966250f,  0.444122145f,
-    0.894599486f,  0.446868840f,
-    0.893224301f,  0.449611330f,
-    0.891840709f,  0.452349587f,
-    0.890448723f,  0.455083587f,
-    0.889048356f,  0.457813304f,
-    0.887639620f,  0.460538711f,
-    0.886222530f,  0.463259784f,
-    0.884797098f,  0.465976496f,
-    0.883363339f,  0.468688822f,
-    0.881921264f,  0.471396737f,
-    0.880470889f,  0.474100215f,
-    0.879012226f,  0.476799230f,
-    0.877545290f,  0.479493758f,
-    0.876070094f,  0.482183772f,
-    0.874586652f,  0.484869248f,
-    0.873094978f,  0.487550160f,
-    0.871595087f,  0.490226483f,
-    0.870086991f,  0.492898192f,
-    0.868570706f,  0.495565262f,
-    0.867046246f,  0.498227667f,
-    0.865513624f,  0.500885383f,
-    0.863972856f,  0.503538384f,
-    0.862423956f,  0.506186645f,
-    0.860866939f,  0.508830143f,
-    0.859301818f,  0.511468850f,
-    0.857728610f,  0.514102744f,
-    0.856147328f,  0.516731799f,
-    0.854557988f,  0.519355990f,
-    0.852960605f,  0.521975293f,
-    0.851355193f,  0.524589683f,
-    0.849741768f,  0.527199135f,
-    0.848120345f,  0.529803625f,
-    0.846490939f,  0.532403128f,
-    0.844853565f,  0.534997620f,
-    0.843208240f,  0.537587076f,
-    0.841554977f,  0.540171473f,
-    0.839893794f,  0.542750785f,
-    0.838224706f,  0.545324988f,
-    0.836547727f,  0.547894059f,
-    0.834862875f,  0.550457973f,
-    0.833170165f,  0.553016706f,
-    0.831469612f,  0.555570233f,
-    0.829761234f,  0.558118531f,
-    0.828045045f,  0.560661576f,
-    0.826321063f,  0.563199344f,
-    0.824589303f,  0.565731811f,
-    0.822849781f,  0.568258953f,
-    0.821102515f,  0.570780746f,
-    0.819347520f,  0.573297167f,
-    0.817584813f,  0.575808191f,
-    0.815814411f,  0.578313796f,
-    0.814036330f,  0.580813958f,
-    0.812250587f,  0.583308653f,
-    0.810457198f,  0.585797857f,
-    0.808656182f,  0.588281548f,
-    0.806847554f,  0.590759702f,
-    0.805031331f,  0.593232295f,
-    0.803207531f,  0.595699304f,
-    0.801376172f,  0.598160707f,
-    0.799537269f,  0.600616479f,
-    0.797690841f,  0.603066599f,
-    0.795836905f,  0.605511041f,
-    0.793975478f,  0.607949785f,
-    0.792106577f,  0.610382806f,
-    0.790230221f,  0.612810082f,
-    0.788346428f,  0.615231591f,
-    0.786455214f,  0.617647308f,
-    0.784556597f,  0.620057212f,
-    0.782650596f,  0.622461279f,
-    0.780737229f,  0.624859488f,
-    0.778816512f,  0.627251815f,
-    0.776888466f,  0.629638239f,
-    0.774953107f,  0.632018736f,
-    0.773010453f,  0.634393284f,
-    0.771060524f,  0.636761861f,
-    0.769103338f,  0.639124445f,
-    0.767138912f,  0.641481013f,
-    0.765167266f,  0.643831543f,
-    0.763188417f,  0.646176013f,
-    0.761202385f,  0.648514401f,
-    0.759209189f,  0.650846685f,
-    0.757208847f,  0.653172843f,
-    0.755201377f,  0.655492853f,
-    0.753186799f,  0.657806693f,
-    0.751165132f,  0.660114342f,
-    0.749136395f,  0.662415778f,
-    0.747100606f,  0.664710978f,
-    0.745057785f,  0.666999922f,
-    0.743007952f,  0.669282588f,
-    0.740951125f,  0.671558955f,
-    0.738887324f,  0.673829000f,
-    0.736816569f,  0.676092704f,
-    0.734738878f,  0.678350043f,
-    0.732654272f,  0.680600998f,
-    0.730562769f,  0.682845546f,
-    0.728464390f,  0.685083668f,
-    0.726359155f,  0.687315341f,
-    0.724247083f,  0.689540545f,
-    0.722128194f,  0.691759258f,
-    0.720002508f,  0.693971461f,
-    0.717870045f,  0.696177131f,
-    0.715730825f,  0.698376249f,
-    0.713584869f,  0.700568794f,
-    0.711432196f,  0.702754744f,
-    0.709272826f,  0.704934080f,
-    0.707106781f,  0.707106781f,
-    0.704934080f,  0.709272826f,
-    0.702754744f,  0.711432196f,
-    0.700568794f,  0.713584869f,
-    0.698376249f,  0.715730825f,
-    0.696177131f,  0.717870045f,
-    0.693971461f,  0.720002508f,
-    0.691759258f,  0.722128194f,
-    0.689540545f,  0.724247083f,
-    0.687315341f,  0.726359155f,
-    0.685083668f,  0.728464390f,
-    0.682845546f,  0.730562769f,
-    0.680600998f,  0.732654272f,
-    0.678350043f,  0.734738878f,
-    0.676092704f,  0.736816569f,
-    0.673829000f,  0.738887324f,
-    0.671558955f,  0.740951125f,
-    0.669282588f,  0.743007952f,
-    0.666999922f,  0.745057785f,
-    0.664710978f,  0.747100606f,
-    0.662415778f,  0.749136395f,
-    0.660114342f,  0.751165132f,
-    0.657806693f,  0.753186799f,
-    0.655492853f,  0.755201377f,
-    0.653172843f,  0.757208847f,
-    0.650846685f,  0.759209189f,
-    0.648514401f,  0.761202385f,
-    0.646176013f,  0.763188417f,
-    0.643831543f,  0.765167266f,
-    0.641481013f,  0.767138912f,
-    0.639124445f,  0.769103338f,
-    0.636761861f,  0.771060524f,
-    0.634393284f,  0.773010453f,
-    0.632018736f,  0.774953107f,
-    0.629638239f,  0.776888466f,
-    0.627251815f,  0.778816512f,
-    0.624859488f,  0.780737229f,
-    0.622461279f,  0.782650596f,
-    0.620057212f,  0.784556597f,
-    0.617647308f,  0.786455214f,
-    0.615231591f,  0.788346428f,
-    0.612810082f,  0.790230221f,
-    0.610382806f,  0.792106577f,
-    0.607949785f,  0.793975478f,
-    0.605511041f,  0.795836905f,
-    0.603066599f,  0.797690841f,
-    0.600616479f,  0.799537269f,
-    0.598160707f,  0.801376172f,
-    0.595699304f,  0.803207531f,
-    0.593232295f,  0.805031331f,
-    0.590759702f,  0.806847554f,
-    0.588281548f,  0.808656182f,
-    0.585797857f,  0.810457198f,
-    0.583308653f,  0.812250587f,
-    0.580813958f,  0.814036330f,
-    0.578313796f,  0.815814411f,
-    0.575808191f,  0.817584813f,
-    0.573297167f,  0.819347520f,
-    0.570780746f,  0.821102515f,
-    0.568258953f,  0.822849781f,
-    0.565731811f,  0.824589303f,
-    0.563199344f,  0.826321063f,
-    0.560661576f,  0.828045045f,
-    0.558118531f,  0.829761234f,
-    0.555570233f,  0.831469612f,
-    0.553016706f,  0.833170165f,
-    0.550457973f,  0.834862875f,
-    0.547894059f,  0.836547727f,
-    0.545324988f,  0.838224706f,
-    0.542750785f,  0.839893794f,
-    0.540171473f,  0.841554977f,
-    0.537587076f,  0.843208240f,
-    0.534997620f,  0.844853565f,
-    0.532403128f,  0.846490939f,
-    0.529803625f,  0.848120345f,
-    0.527199135f,  0.849741768f,
-    0.524589683f,  0.851355193f,
-    0.521975293f,  0.852960605f,
-    0.519355990f,  0.854557988f,
-    0.516731799f,  0.856147328f,
-    0.514102744f,  0.857728610f,
-    0.511468850f,  0.859301818f,
-    0.508830143f,  0.860866939f,
-    0.506186645f,  0.862423956f,
-    0.503538384f,  0.863972856f,
-    0.500885383f,  0.865513624f,
-    0.498227667f,  0.867046246f,
-    0.495565262f,  0.868570706f,
-    0.492898192f,  0.870086991f,
-    0.490226483f,  0.871595087f,
-    0.487550160f,  0.873094978f,
-    0.484869248f,  0.874586652f,
-    0.482183772f,  0.876070094f,
-    0.479493758f,  0.877545290f,
-    0.476799230f,  0.879012226f,
-    0.474100215f,  0.880470889f,
-    0.471396737f,  0.881921264f,
-    0.468688822f,  0.883363339f,
-    0.465976496f,  0.884797098f,
-    0.463259784f,  0.886222530f,
-    0.460538711f,  0.887639620f,
-    0.457813304f,  0.889048356f,
-    0.455083587f,  0.890448723f,
-    0.452349587f,  0.891840709f,
-    0.449611330f,  0.893224301f,
-    0.446868840f,  0.894599486f,
-    0.444122145f,  0.895966250f,
-    0.441371269f,  0.897324581f,
-    0.438616239f,  0.898674466f,
-    0.435857080f,  0.900015892f,
-    0.433093819f,  0.901348847f,
-    0.430326481f,  0.902673318f,
-    0.427555093f,  0.903989293f,
-    0.424779681f,  0.905296759f,
-    0.422000271f,  0.906595705f,
-    0.419216888f,  0.907886116f,
-    0.416429560f,  0.909167983f,
-    0.413638312f,  0.910441292f,
-    0.410843171f,  0.911706032f,
-    0.408044163f,  0.912962190f,
-    0.405241314f,  0.914209756f,
-    0.402434651f,  0.915448716f,
-    0.399624200f,  0.916679060f,
-    0.396809987f,  0.917900776f,
-    0.393992040f,  0.919113852f,
-    0.391170384f,  0.920318277f,
-    0.388345047f,  0.921514039f,
-    0.385516054f,  0.922701128f,
-    0.382683432f,  0.923879533f,
-    0.379847209f,  0.925049241f,
-    0.377007410f,  0.926210242f,
-    0.374164063f,  0.927362526f,
-    0.371317194f,  0.928506080f,
-    0.368466830f,  0.929640896f,
-    0.365612998f,  0.930766961f,
-    0.362755724f,  0.931884266f,
-    0.359895037f,  0.932992799f,
-    0.357030961f,  0.934092550f,
-    0.354163525f,  0.935183510f,
-    0.351292756f,  0.936265667f,
-    0.348418680f,  0.937339012f,
-    0.345541325f,  0.938403534f,
-    0.342660717f,  0.939459224f,
-    0.339776884f,  0.940506071f,
-    0.336889853f,  0.941544065f,
-    0.333999651f,  0.942573198f,
-    0.331106306f,  0.943593458f,
-    0.328209844f,  0.944604837f,
-    0.325310292f,  0.945607325f,
-    0.322407679f,  0.946600913f,
-    0.319502031f,  0.947585591f,
-    0.316593376f,  0.948561350f,
-    0.313681740f,  0.949528181f,
-    0.310767153f,  0.950486074f,
-    0.307849640f,  0.951435021f,
-    0.304929230f,  0.952375013f,
-    0.302005949f,  0.953306040f,
-    0.299079826f,  0.954228095f,
-    0.296150888f,  0.955141168f,
-    0.293219163f,  0.956045251f,
-    0.290284677f,  0.956940336f,
-    0.287347460f,  0.957826413f,
-    0.284407537f,  0.958703475f,
-    0.281464938f,  0.959571513f,
-    0.278519689f,  0.960430519f,
-    0.275571819f,  0.961280486f,
-    0.272621355f,  0.962121404f,
-    0.269668326f,  0.962953267f,
-    0.266712757f,  0.963776066f,
-    0.263754679f,  0.964589793f,
-    0.260794118f,  0.965394442f,
-    0.257831102f,  0.966190003f,
-    0.254865660f,  0.966976471f,
-    0.251897818f,  0.967753837f,
-    0.248927606f,  0.968522094f,
-    0.245955050f,  0.969281235f,
-    0.242980180f,  0.970031253f,
-    0.240003022f,  0.970772141f,
-    0.237023606f,  0.971503891f,
-    0.234041959f,  0.972226497f,
-    0.231058108f,  0.972939952f,
-    0.228072083f,  0.973644250f,
-    0.225083911f,  0.974339383f,
-    0.222093621f,  0.975025345f,
-    0.219101240f,  0.975702130f,
-    0.216106797f,  0.976369731f,
-    0.213110320f,  0.977028143f,
-    0.210111837f,  0.977677358f,
-    0.207111376f,  0.978317371f,
-    0.204108966f,  0.978948175f,
-    0.201104635f,  0.979569766f,
-    0.198098411f,  0.980182136f,
-    0.195090322f,  0.980785280f,
-    0.192080397f,  0.981379193f,
-    0.189068664f,  0.981963869f,
-    0.186055152f,  0.982539302f,
-    0.183039888f,  0.983105487f,
-    0.180022901f,  0.983662419f,
-    0.177004220f,  0.984210092f,
-    0.173983873f,  0.984748502f,
-    0.170961889f,  0.985277642f,
-    0.167938295f,  0.985797509f,
-    0.164913120f,  0.986308097f,
-    0.161886394f,  0.986809402f,
-    0.158858143f,  0.987301418f,
-    0.155828398f,  0.987784142f,
-    0.152797185f,  0.988257568f,
-    0.149764535f,  0.988721692f,
-    0.146730474f,  0.989176510f,
-    0.143695033f,  0.989622017f,
-    0.140658239f,  0.990058210f,
-    0.137620122f,  0.990485084f,
-    0.134580709f,  0.990902635f,
-    0.131540029f,  0.991310860f,
-    0.128498111f,  0.991709754f,
-    0.125454983f,  0.992099313f,
-    0.122410675f,  0.992479535f,
-    0.119365215f,  0.992850414f,
-    0.116318631f,  0.993211949f,
-    0.113270952f,  0.993564136f,
-    0.110222207f,  0.993906970f,
-    0.107172425f,  0.994240449f,
-    0.104121634f,  0.994564571f,
-    0.101069863f,  0.994879331f,
-    0.098017140f,  0.995184727f,
-    0.094963495f,  0.995480755f,
-    0.091908956f,  0.995767414f,
-    0.088853553f,  0.996044701f,
-    0.085797312f,  0.996312612f,
-    0.082740265f,  0.996571146f,
-    0.079682438f,  0.996820299f,
-    0.076623861f,  0.997060070f,
-    0.073564564f,  0.997290457f,
-    0.070504573f,  0.997511456f,
-    0.067443920f,  0.997723067f,
-    0.064382631f,  0.997925286f,
-    0.061320736f,  0.998118113f,
-    0.058258265f,  0.998301545f,
-    0.055195244f,  0.998475581f,
-    0.052131705f,  0.998640218f,
-    0.049067674f,  0.998795456f,
-    0.046003182f,  0.998941293f,
-    0.042938257f,  0.999077728f,
-    0.039872928f,  0.999204759f,
-    0.036807223f,  0.999322385f,
-    0.033741172f,  0.999430605f,
-    0.030674803f,  0.999529418f,
-    0.027608146f,  0.999618822f,
-    0.024541229f,  0.999698819f,
-    0.021474080f,  0.999769405f,
-    0.018406730f,  0.999830582f,
-    0.015339206f,  0.999882347f,
-    0.012271538f,  0.999924702f,
-    0.009203755f,  0.999957645f,
-    0.006135885f,  0.999981175f,
-    0.003067957f,  0.999995294f,
-    0.000000000f,  1.000000000f,
-   -0.003067957f,  0.999995294f,
-   -0.006135885f,  0.999981175f,
-   -0.009203755f,  0.999957645f,
-   -0.012271538f,  0.999924702f,
-   -0.015339206f,  0.999882347f,
-   -0.018406730f,  0.999830582f,
-   -0.021474080f,  0.999769405f,
-   -0.024541229f,  0.999698819f,
-   -0.027608146f,  0.999618822f,
-   -0.030674803f,  0.999529418f,
-   -0.033741172f,  0.999430605f,
-   -0.036807223f,  0.999322385f,
-   -0.039872928f,  0.999204759f,
-   -0.042938257f,  0.999077728f,
-   -0.046003182f,  0.998941293f,
-   -0.049067674f,  0.998795456f,
-   -0.052131705f,  0.998640218f,
-   -0.055195244f,  0.998475581f,
-   -0.058258265f,  0.998301545f,
-   -0.061320736f,  0.998118113f,
-   -0.064382631f,  0.997925286f,
-   -0.067443920f,  0.997723067f,
-   -0.070504573f,  0.997511456f,
-   -0.073564564f,  0.997290457f,
-   -0.076623861f,  0.997060070f,
-   -0.079682438f,  0.996820299f,
-   -0.082740265f,  0.996571146f,
-   -0.085797312f,  0.996312612f,
-   -0.088853553f,  0.996044701f,
-   -0.091908956f,  0.995767414f,
-   -0.094963495f,  0.995480755f,
-   -0.098017140f,  0.995184727f,
-   -0.101069863f,  0.994879331f,
-   -0.104121634f,  0.994564571f,
-   -0.107172425f,  0.994240449f,
-   -0.110222207f,  0.993906970f,
-   -0.113270952f,  0.993564136f,
-   -0.116318631f,  0.993211949f,
-   -0.119365215f,  0.992850414f,
-   -0.122410675f,  0.992479535f,
-   -0.125454983f,  0.992099313f,
-   -0.128498111f,  0.991709754f,
-   -0.131540029f,  0.991310860f,
-   -0.134580709f,  0.990902635f,
-   -0.137620122f,  0.990485084f,
-   -0.140658239f,  0.990058210f,
-   -0.143695033f,  0.989622017f,
-   -0.146730474f,  0.989176510f,
-   -0.149764535f,  0.988721692f,
-   -0.152797185f,  0.988257568f,
-   -0.155828398f,  0.987784142f,
-   -0.158858143f,  0.987301418f,
-   -0.161886394f,  0.986809402f,
-   -0.164913120f,  0.986308097f,
-   -0.167938295f,  0.985797509f,
-   -0.170961889f,  0.985277642f,
-   -0.173983873f,  0.984748502f,
-   -0.177004220f,  0.984210092f,
-   -0.180022901f,  0.983662419f,
-   -0.183039888f,  0.983105487f,
-   -0.186055152f,  0.982539302f,
-   -0.189068664f,  0.981963869f,
-   -0.192080397f,  0.981379193f,
-   -0.195090322f,  0.980785280f,
-   -0.198098411f,  0.980182136f,
-   -0.201104635f,  0.979569766f,
-   -0.204108966f,  0.978948175f,
-   -0.207111376f,  0.978317371f,
-   -0.210111837f,  0.977677358f,
-   -0.213110320f,  0.977028143f,
-   -0.216106797f,  0.976369731f,
-   -0.219101240f,  0.975702130f,
-   -0.222093621f,  0.975025345f,
-   -0.225083911f,  0.974339383f,
-   -0.228072083f,  0.973644250f,
-   -0.231058108f,  0.972939952f,
-   -0.234041959f,  0.972226497f,
-   -0.237023606f,  0.971503891f,
-   -0.240003022f,  0.970772141f,
-   -0.242980180f,  0.970031253f,
-   -0.245955050f,  0.969281235f,
-   -0.248927606f,  0.968522094f,
-   -0.251897818f,  0.967753837f,
-   -0.254865660f,  0.966976471f,
-   -0.257831102f,  0.966190003f,
-   -0.260794118f,  0.965394442f,
-   -0.263754679f,  0.964589793f,
-   -0.266712757f,  0.963776066f,
-   -0.269668326f,  0.962953267f,
-   -0.272621355f,  0.962121404f,
-   -0.275571819f,  0.961280486f,
-   -0.278519689f,  0.960430519f,
-   -0.281464938f,  0.959571513f,
-   -0.284407537f,  0.958703475f,
-   -0.287347460f,  0.957826413f,
-   -0.290284677f,  0.956940336f,
-   -0.293219163f,  0.956045251f,
-   -0.296150888f,  0.955141168f,
-   -0.299079826f,  0.954228095f,
-   -0.302005949f,  0.953306040f,
-   -0.304929230f,  0.952375013f,
-   -0.307849640f,  0.951435021f,
-   -0.310767153f,  0.950486074f,
-   -0.313681740f,  0.949528181f,
-   -0.316593376f,  0.948561350f,
-   -0.319502031f,  0.947585591f,
-   -0.322407679f,  0.946600913f,
-   -0.325310292f,  0.945607325f,
-   -0.328209844f,  0.944604837f,
-   -0.331106306f,  0.943593458f,
-   -0.333999651f,  0.942573198f,
-   -0.336889853f,  0.941544065f,
-   -0.339776884f,  0.940506071f,
-   -0.342660717f,  0.939459224f,
-   -0.345541325f,  0.938403534f,
-   -0.348418680f,  0.937339012f,
-   -0.351292756f,  0.936265667f,
-   -0.354163525f,  0.935183510f,
-   -0.357030961f,  0.934092550f,
-   -0.359895037f,  0.932992799f,
-   -0.362755724f,  0.931884266f,
-   -0.365612998f,  0.930766961f,
-   -0.368466830f,  0.929640896f,
-   -0.371317194f,  0.928506080f,
-   -0.374164063f,  0.927362526f,
-   -0.377007410f,  0.926210242f,
-   -0.379847209f,  0.925049241f,
-   -0.382683432f,  0.923879533f,
-   -0.385516054f,  0.922701128f,
-   -0.388345047f,  0.921514039f,
-   -0.391170384f,  0.920318277f,
-   -0.393992040f,  0.919113852f,
-   -0.396809987f,  0.917900776f,
-   -0.399624200f,  0.916679060f,
-   -0.402434651f,  0.915448716f,
-   -0.405241314f,  0.914209756f,
-   -0.408044163f,  0.912962190f,
-   -0.410843171f,  0.911706032f,
-   -0.413638312f,  0.910441292f,
-   -0.416429560f,  0.909167983f,
-   -0.419216888f,  0.907886116f,
-   -0.422000271f,  0.906595705f,
-   -0.424779681f,  0.905296759f,
-   -0.427555093f,  0.903989293f,
-   -0.430326481f,  0.902673318f,
-   -0.433093819f,  0.901348847f,
-   -0.435857080f,  0.900015892f,
-   -0.438616239f,  0.898674466f,
-   -0.441371269f,  0.897324581f,
-   -0.444122145f,  0.895966250f,
-   -0.446868840f,  0.894599486f,
-   -0.449611330f,  0.893224301f,
-   -0.452349587f,  0.891840709f,
-   -0.455083587f,  0.890448723f,
-   -0.457813304f,  0.889048356f,
-   -0.460538711f,  0.887639620f,
-   -0.463259784f,  0.886222530f,
-   -0.465976496f,  0.884797098f,
-   -0.468688822f,  0.883363339f,
-   -0.471396737f,  0.881921264f,
-   -0.474100215f,  0.880470889f,
-   -0.476799230f,  0.879012226f,
-   -0.479493758f,  0.877545290f,
-   -0.482183772f,  0.876070094f,
-   -0.484869248f,  0.874586652f,
-   -0.487550160f,  0.873094978f,
-   -0.490226483f,  0.871595087f,
-   -0.492898192f,  0.870086991f,
-   -0.495565262f,  0.868570706f,
-   -0.498227667f,  0.867046246f,
-   -0.500885383f,  0.865513624f,
-   -0.503538384f,  0.863972856f,
-   -0.506186645f,  0.862423956f,
-   -0.508830143f,  0.860866939f,
-   -0.511468850f,  0.859301818f,
-   -0.514102744f,  0.857728610f,
-   -0.516731799f,  0.856147328f,
-   -0.519355990f,  0.854557988f,
-   -0.521975293f,  0.852960605f,
-   -0.524589683f,  0.851355193f,
-   -0.527199135f,  0.849741768f,
-   -0.529803625f,  0.848120345f,
-   -0.532403128f,  0.846490939f,
-   -0.534997620f,  0.844853565f,
-   -0.537587076f,  0.843208240f,
-   -0.540171473f,  0.841554977f,
-   -0.542750785f,  0.839893794f,
-   -0.545324988f,  0.838224706f,
-   -0.547894059f,  0.836547727f,
-   -0.550457973f,  0.834862875f,
-   -0.553016706f,  0.833170165f,
-   -0.555570233f,  0.831469612f,
-   -0.558118531f,  0.829761234f,
-   -0.560661576f,  0.828045045f,
-   -0.563199344f,  0.826321063f,
-   -0.565731811f,  0.824589303f,
-   -0.568258953f,  0.822849781f,
-   -0.570780746f,  0.821102515f,
-   -0.573297167f,  0.819347520f,
-   -0.575808191f,  0.817584813f,
-   -0.578313796f,  0.815814411f,
-   -0.580813958f,  0.814036330f,
-   -0.583308653f,  0.812250587f,
-   -0.585797857f,  0.810457198f,
-   -0.588281548f,  0.808656182f,
-   -0.590759702f,  0.806847554f,
-   -0.593232295f,  0.805031331f,
-   -0.595699304f,  0.803207531f,
-   -0.598160707f,  0.801376172f,
-   -0.600616479f,  0.799537269f,
-   -0.603066599f,  0.797690841f,
-   -0.605511041f,  0.795836905f,
-   -0.607949785f,  0.793975478f,
-   -0.610382806f,  0.792106577f,
-   -0.612810082f,  0.790230221f,
-   -0.615231591f,  0.788346428f,
-   -0.617647308f,  0.786455214f,
-   -0.620057212f,  0.784556597f,
-   -0.622461279f,  0.782650596f,
-   -0.624859488f,  0.780737229f,
-   -0.627251815f,  0.778816512f,
-   -0.629638239f,  0.776888466f,
-   -0.632018736f,  0.774953107f,
-   -0.634393284f,  0.773010453f,
-   -0.636761861f,  0.771060524f,
-   -0.639124445f,  0.769103338f,
-   -0.641481013f,  0.767138912f,
-   -0.643831543f,  0.765167266f,
-   -0.646176013f,  0.763188417f,
-   -0.648514401f,  0.761202385f,
-   -0.650846685f,  0.759209189f,
-   -0.653172843f,  0.757208847f,
-   -0.655492853f,  0.755201377f,
-   -0.657806693f,  0.753186799f,
-   -0.660114342f,  0.751165132f,
-   -0.662415778f,  0.749136395f,
-   -0.664710978f,  0.747100606f,
-   -0.666999922f,  0.745057785f,
-   -0.669282588f,  0.743007952f,
-   -0.671558955f,  0.740951125f,
-   -0.673829000f,  0.738887324f,
-   -0.676092704f,  0.736816569f,
-   -0.678350043f,  0.734738878f,
-   -0.680600998f,  0.732654272f,
-   -0.682845546f,  0.730562769f,
-   -0.685083668f,  0.728464390f,
-   -0.687315341f,  0.726359155f,
-   -0.689540545f,  0.724247083f,
-   -0.691759258f,  0.722128194f,
-   -0.693971461f,  0.720002508f,
-   -0.696177131f,  0.717870045f,
-   -0.698376249f,  0.715730825f,
-   -0.700568794f,  0.713584869f,
-   -0.702754744f,  0.711432196f,
-   -0.704934080f,  0.709272826f,
-   -0.707106781f,  0.707106781f,
-   -0.709272826f,  0.704934080f,
-   -0.711432196f,  0.702754744f,
-   -0.713584869f,  0.700568794f,
-   -0.715730825f,  0.698376249f,
-   -0.717870045f,  0.696177131f,
-   -0.720002508f,  0.693971461f,
-   -0.722128194f,  0.691759258f,
-   -0.724247083f,  0.689540545f,
-   -0.726359155f,  0.687315341f,
-   -0.728464390f,  0.685083668f,
-   -0.730562769f,  0.682845546f,
-   -0.732654272f,  0.680600998f,
-   -0.734738878f,  0.678350043f,
-   -0.736816569f,  0.676092704f,
-   -0.738887324f,  0.673829000f,
-   -0.740951125f,  0.671558955f,
-   -0.743007952f,  0.669282588f,
-   -0.745057785f,  0.666999922f,
-   -0.747100606f,  0.664710978f,
-   -0.749136395f,  0.662415778f,
-   -0.751165132f,  0.660114342f,
-   -0.753186799f,  0.657806693f,
-   -0.755201377f,  0.655492853f,
-   -0.757208847f,  0.653172843f,
-   -0.759209189f,  0.650846685f,
-   -0.761202385f,  0.648514401f,
-   -0.763188417f,  0.646176013f,
-   -0.765167266f,  0.643831543f,
-   -0.767138912f,  0.641481013f,
-   -0.769103338f,  0.639124445f,
-   -0.771060524f,  0.636761861f,
-   -0.773010453f,  0.634393284f,
-   -0.774953107f,  0.632018736f,
-   -0.776888466f,  0.629638239f,
-   -0.778816512f,  0.627251815f,
-   -0.780737229f,  0.624859488f,
-   -0.782650596f,  0.622461279f,
-   -0.784556597f,  0.620057212f,
-   -0.786455214f,  0.617647308f,
-   -0.788346428f,  0.615231591f,
-   -0.790230221f,  0.612810082f,
-   -0.792106577f,  0.610382806f,
-   -0.793975478f,  0.607949785f,
-   -0.795836905f,  0.605511041f,
-   -0.797690841f,  0.603066599f,
-   -0.799537269f,  0.600616479f,
-   -0.801376172f,  0.598160707f,
-   -0.803207531f,  0.595699304f,
-   -0.805031331f,  0.593232295f,
-   -0.806847554f,  0.590759702f,
-   -0.808656182f,  0.588281548f,
-   -0.810457198f,  0.585797857f,
-   -0.812250587f,  0.583308653f,
-   -0.814036330f,  0.580813958f,
-   -0.815814411f,  0.578313796f,
-   -0.817584813f,  0.575808191f,
-   -0.819347520f,  0.573297167f,
-   -0.821102515f,  0.570780746f,
-   -0.822849781f,  0.568258953f,
-   -0.824589303f,  0.565731811f,
-   -0.826321063f,  0.563199344f,
-   -0.828045045f,  0.560661576f,
-   -0.829761234f,  0.558118531f,
-   -0.831469612f,  0.555570233f,
-   -0.833170165f,  0.553016706f,
-   -0.834862875f,  0.550457973f,
-   -0.836547727f,  0.547894059f,
-   -0.838224706f,  0.545324988f,
-   -0.839893794f,  0.542750785f,
-   -0.841554977f,  0.540171473f,
-   -0.843208240f,  0.537587076f,
-   -0.844853565f,  0.534997620f,
-   -0.846490939f,  0.532403128f,
-   -0.848120345f,  0.529803625f,
-   -0.849741768f,  0.527199135f,
-   -0.851355193f,  0.524589683f,
-   -0.852960605f,  0.521975293f,
-   -0.854557988f,  0.519355990f,
-   -0.856147328f,  0.516731799f,
-   -0.857728610f,  0.514102744f,
-   -0.859301818f,  0.511468850f,
-   -0.860866939f,  0.508830143f,
-   -0.862423956f,  0.506186645f,
-   -0.863972856f,  0.503538384f,
-   -0.865513624f,  0.500885383f,
-   -0.867046246f,  0.498227667f,
-   -0.868570706f,  0.495565262f,
-   -0.870086991f,  0.492898192f,
-   -0.871595087f,  0.490226483f,
-   -0.873094978f,  0.487550160f,
-   -0.874586652f,  0.484869248f,
-   -0.876070094f,  0.482183772f,
-   -0.877545290f,  0.479493758f,
-   -0.879012226f,  0.476799230f,
-   -0.880470889f,  0.474100215f,
-   -0.881921264f,  0.471396737f,
-   -0.883363339f,  0.468688822f,
-   -0.884797098f,  0.465976496f,
-   -0.886222530f,  0.463259784f,
-   -0.887639620f,  0.460538711f,
-   -0.889048356f,  0.457813304f,
-   -0.890448723f,  0.455083587f,
-   -0.891840709f,  0.452349587f,
-   -0.893224301f,  0.449611330f,
-   -0.894599486f,  0.446868840f,
-   -0.895966250f,  0.444122145f,
-   -0.897324581f,  0.441371269f,
-   -0.898674466f,  0.438616239f,
-   -0.900015892f,  0.435857080f,
-   -0.901348847f,  0.433093819f,
-   -0.902673318f,  0.430326481f,
-   -0.903989293f,  0.427555093f,
-   -0.905296759f,  0.424779681f,
-   -0.906595705f,  0.422000271f,
-   -0.907886116f,  0.419216888f,
-   -0.909167983f,  0.416429560f,
-   -0.910441292f,  0.413638312f,
-   -0.911706032f,  0.410843171f,
-   -0.912962190f,  0.408044163f,
-   -0.914209756f,  0.405241314f,
-   -0.915448716f,  0.402434651f,
-   -0.916679060f,  0.399624200f,
-   -0.917900776f,  0.396809987f,
-   -0.919113852f,  0.393992040f,
-   -0.920318277f,  0.391170384f,
-   -0.921514039f,  0.388345047f,
-   -0.922701128f,  0.385516054f,
-   -0.923879533f,  0.382683432f,
-   -0.925049241f,  0.379847209f,
-   -0.926210242f,  0.377007410f,
-   -0.927362526f,  0.374164063f,
-   -0.928506080f,  0.371317194f,
-   -0.929640896f,  0.368466830f,
-   -0.930766961f,  0.365612998f,
-   -0.931884266f,  0.362755724f,
-   -0.932992799f,  0.359895037f,
-   -0.934092550f,  0.357030961f,
-   -0.935183510f,  0.354163525f,
-   -0.936265667f,  0.351292756f,
-   -0.937339012f,  0.348418680f,
-   -0.938403534f,  0.345541325f,
-   -0.939459224f,  0.342660717f,
-   -0.940506071f,  0.339776884f,
-   -0.941544065f,  0.336889853f,
-   -0.942573198f,  0.333999651f,
-   -0.943593458f,  0.331106306f,
-   -0.944604837f,  0.328209844f,
-   -0.945607325f,  0.325310292f,
-   -0.946600913f,  0.322407679f,
-   -0.947585591f,  0.319502031f,
-   -0.948561350f,  0.316593376f,
-   -0.949528181f,  0.313681740f,
-   -0.950486074f,  0.310767153f,
-   -0.951435021f,  0.307849640f,
-   -0.952375013f,  0.304929230f,
-   -0.953306040f,  0.302005949f,
-   -0.954228095f,  0.299079826f,
-   -0.955141168f,  0.296150888f,
-   -0.956045251f,  0.293219163f,
-   -0.956940336f,  0.290284677f,
-   -0.957826413f,  0.287347460f,
-   -0.958703475f,  0.284407537f,
-   -0.959571513f,  0.281464938f,
-   -0.960430519f,  0.278519689f,
-   -0.961280486f,  0.275571819f,
-   -0.962121404f,  0.272621355f,
-   -0.962953267f,  0.269668326f,
-   -0.963776066f,  0.266712757f,
-   -0.964589793f,  0.263754679f,
-   -0.965394442f,  0.260794118f,
-   -0.966190003f,  0.257831102f,
-   -0.966976471f,  0.254865660f,
-   -0.967753837f,  0.251897818f,
-   -0.968522094f,  0.248927606f,
-   -0.969281235f,  0.245955050f,
-   -0.970031253f,  0.242980180f,
-   -0.970772141f,  0.240003022f,
-   -0.971503891f,  0.237023606f,
-   -0.972226497f,  0.234041959f,
-   -0.972939952f,  0.231058108f,
-   -0.973644250f,  0.228072083f,
-   -0.974339383f,  0.225083911f,
-   -0.975025345f,  0.222093621f,
-   -0.975702130f,  0.219101240f,
-   -0.976369731f,  0.216106797f,
-   -0.977028143f,  0.213110320f,
-   -0.977677358f,  0.210111837f,
-   -0.978317371f,  0.207111376f,
-   -0.978948175f,  0.204108966f,
-   -0.979569766f,  0.201104635f,
-   -0.980182136f,  0.198098411f,
-   -0.980785280f,  0.195090322f,
-   -0.981379193f,  0.192080397f,
-   -0.981963869f,  0.189068664f,
-   -0.982539302f,  0.186055152f,
-   -0.983105487f,  0.183039888f,
-   -0.983662419f,  0.180022901f,
-   -0.984210092f,  0.177004220f,
-   -0.984748502f,  0.173983873f,
-   -0.985277642f,  0.170961889f,
-   -0.985797509f,  0.167938295f,
-   -0.986308097f,  0.164913120f,
-   -0.986809402f,  0.161886394f,
-   -0.987301418f,  0.158858143f,
-   -0.987784142f,  0.155828398f,
-   -0.988257568f,  0.152797185f,
-   -0.988721692f,  0.149764535f,
-   -0.989176510f,  0.146730474f,
-   -0.989622017f,  0.143695033f,
-   -0.990058210f,  0.140658239f,
-   -0.990485084f,  0.137620122f,
-   -0.990902635f,  0.134580709f,
-   -0.991310860f,  0.131540029f,
-   -0.991709754f,  0.128498111f,
-   -0.992099313f,  0.125454983f,
-   -0.992479535f,  0.122410675f,
-   -0.992850414f,  0.119365215f,
-   -0.993211949f,  0.116318631f,
-   -0.993564136f,  0.113270952f,
-   -0.993906970f,  0.110222207f,
-   -0.994240449f,  0.107172425f,
-   -0.994564571f,  0.104121634f,
-   -0.994879331f,  0.101069863f,
-   -0.995184727f,  0.098017140f,
-   -0.995480755f,  0.094963495f,
-   -0.995767414f,  0.091908956f,
-   -0.996044701f,  0.088853553f,
-   -0.996312612f,  0.085797312f,
-   -0.996571146f,  0.082740265f,
-   -0.996820299f,  0.079682438f,
-   -0.997060070f,  0.076623861f,
-   -0.997290457f,  0.073564564f,
-   -0.997511456f,  0.070504573f,
-   -0.997723067f,  0.067443920f,
-   -0.997925286f,  0.064382631f,
-   -0.998118113f,  0.061320736f,
-   -0.998301545f,  0.058258265f,
-   -0.998475581f,  0.055195244f,
-   -0.998640218f,  0.052131705f,
-   -0.998795456f,  0.049067674f,
-   -0.998941293f,  0.046003182f,
-   -0.999077728f,  0.042938257f,
-   -0.999204759f,  0.039872928f,
-   -0.999322385f,  0.036807223f,
-   -0.999430605f,  0.033741172f,
-   -0.999529418f,  0.030674803f,
-   -0.999618822f,  0.027608146f,
-   -0.999698819f,  0.024541229f,
-   -0.999769405f,  0.021474080f,
-   -0.999830582f,  0.018406730f,
-   -0.999882347f,  0.015339206f,
-   -0.999924702f,  0.012271538f,
-   -0.999957645f,  0.009203755f,
-   -0.999981175f,  0.006135885f,
-   -0.999995294f,  0.003067957f,
-   -1.000000000f,  0.000000000f,
-   -0.999995294f, -0.003067957f,
-   -0.999981175f, -0.006135885f,
-   -0.999957645f, -0.009203755f,
-   -0.999924702f, -0.012271538f,
-   -0.999882347f, -0.015339206f,
-   -0.999830582f, -0.018406730f,
-   -0.999769405f, -0.021474080f,
-   -0.999698819f, -0.024541229f,
-   -0.999618822f, -0.027608146f,
-   -0.999529418f, -0.030674803f,
-   -0.999430605f, -0.033741172f,
-   -0.999322385f, -0.036807223f,
-   -0.999204759f, -0.039872928f,
-   -0.999077728f, -0.042938257f,
-   -0.998941293f, -0.046003182f,
-   -0.998795456f, -0.049067674f,
-   -0.998640218f, -0.052131705f,
-   -0.998475581f, -0.055195244f,
-   -0.998301545f, -0.058258265f,
-   -0.998118113f, -0.061320736f,
-   -0.997925286f, -0.064382631f,
-   -0.997723067f, -0.067443920f,
-   -0.997511456f, -0.070504573f,
-   -0.997290457f, -0.073564564f,
-   -0.997060070f, -0.076623861f,
-   -0.996820299f, -0.079682438f,
-   -0.996571146f, -0.082740265f,
-   -0.996312612f, -0.085797312f,
-   -0.996044701f, -0.088853553f,
-   -0.995767414f, -0.091908956f,
-   -0.995480755f, -0.094963495f,
-   -0.995184727f, -0.098017140f,
-   -0.994879331f, -0.101069863f,
-   -0.994564571f, -0.104121634f,
-   -0.994240449f, -0.107172425f,
-   -0.993906970f, -0.110222207f,
-   -0.993564136f, -0.113270952f,
-   -0.993211949f, -0.116318631f,
-   -0.992850414f, -0.119365215f,
-   -0.992479535f, -0.122410675f,
-   -0.992099313f, -0.125454983f,
-   -0.991709754f, -0.128498111f,
-   -0.991310860f, -0.131540029f,
-   -0.990902635f, -0.134580709f,
-   -0.990485084f, -0.137620122f,
-   -0.990058210f, -0.140658239f,
-   -0.989622017f, -0.143695033f,
-   -0.989176510f, -0.146730474f,
-   -0.988721692f, -0.149764535f,
-   -0.988257568f, -0.152797185f,
-   -0.987784142f, -0.155828398f,
-   -0.987301418f, -0.158858143f,
-   -0.986809402f, -0.161886394f,
-   -0.986308097f, -0.164913120f,
-   -0.985797509f, -0.167938295f,
-   -0.985277642f, -0.170961889f,
-   -0.984748502f, -0.173983873f,
-   -0.984210092f, -0.177004220f,
-   -0.983662419f, -0.180022901f,
-   -0.983105487f, -0.183039888f,
-   -0.982539302f, -0.186055152f,
-   -0.981963869f, -0.189068664f,
-   -0.981379193f, -0.192080397f,
-   -0.980785280f, -0.195090322f,
-   -0.980182136f, -0.198098411f,
-   -0.979569766f, -0.201104635f,
-   -0.978948175f, -0.204108966f,
-   -0.978317371f, -0.207111376f,
-   -0.977677358f, -0.210111837f,
-   -0.977028143f, -0.213110320f,
-   -0.976369731f, -0.216106797f,
-   -0.975702130f, -0.219101240f,
-   -0.975025345f, -0.222093621f,
-   -0.974339383f, -0.225083911f,
-   -0.973644250f, -0.228072083f,
-   -0.972939952f, -0.231058108f,
-   -0.972226497f, -0.234041959f,
-   -0.971503891f, -0.237023606f,
-   -0.970772141f, -0.240003022f,
-   -0.970031253f, -0.242980180f,
-   -0.969281235f, -0.245955050f,
-   -0.968522094f, -0.248927606f,
-   -0.967753837f, -0.251897818f,
-   -0.966976471f, -0.254865660f,
-   -0.966190003f, -0.257831102f,
-   -0.965394442f, -0.260794118f,
-   -0.964589793f, -0.263754679f,
-   -0.963776066f, -0.266712757f,
-   -0.962953267f, -0.269668326f,
-   -0.962121404f, -0.272621355f,
-   -0.961280486f, -0.275571819f,
-   -0.960430519f, -0.278519689f,
-   -0.959571513f, -0.281464938f,
-   -0.958703475f, -0.284407537f,
-   -0.957826413f, -0.287347460f,
-   -0.956940336f, -0.290284677f,
-   -0.956045251f, -0.293219163f,
-   -0.955141168f, -0.296150888f,
-   -0.954228095f, -0.299079826f,
-   -0.953306040f, -0.302005949f,
-   -0.952375013f, -0.304929230f,
-   -0.951435021f, -0.307849640f,
-   -0.950486074f, -0.310767153f,
-   -0.949528181f, -0.313681740f,
-   -0.948561350f, -0.316593376f,
-   -0.947585591f, -0.319502031f,
-   -0.946600913f, -0.322407679f,
-   -0.945607325f, -0.325310292f,
-   -0.944604837f, -0.328209844f,
-   -0.943593458f, -0.331106306f,
-   -0.942573198f, -0.333999651f,
-   -0.941544065f, -0.336889853f,
-   -0.940506071f, -0.339776884f,
-   -0.939459224f, -0.342660717f,
-   -0.938403534f, -0.345541325f,
-   -0.937339012f, -0.348418680f,
-   -0.936265667f, -0.351292756f,
-   -0.935183510f, -0.354163525f,
-   -0.934092550f, -0.357030961f,
-   -0.932992799f, -0.359895037f,
-   -0.931884266f, -0.362755724f,
-   -0.930766961f, -0.365612998f,
-   -0.929640896f, -0.368466830f,
-   -0.928506080f, -0.371317194f,
-   -0.927362526f, -0.374164063f,
-   -0.926210242f, -0.377007410f,
-   -0.925049241f, -0.379847209f,
-   -0.923879533f, -0.382683432f,
-   -0.922701128f, -0.385516054f,
-   -0.921514039f, -0.388345047f,
-   -0.920318277f, -0.391170384f,
-   -0.919113852f, -0.393992040f,
-   -0.917900776f, -0.396809987f,
-   -0.916679060f, -0.399624200f,
-   -0.915448716f, -0.402434651f,
-   -0.914209756f, -0.405241314f,
-   -0.912962190f, -0.408044163f,
-   -0.911706032f, -0.410843171f,
-   -0.910441292f, -0.413638312f,
-   -0.909167983f, -0.416429560f,
-   -0.907886116f, -0.419216888f,
-   -0.906595705f, -0.422000271f,
-   -0.905296759f, -0.424779681f,
-   -0.903989293f, -0.427555093f,
-   -0.902673318f, -0.430326481f,
-   -0.901348847f, -0.433093819f,
-   -0.900015892f, -0.435857080f,
-   -0.898674466f, -0.438616239f,
-   -0.897324581f, -0.441371269f,
-   -0.895966250f, -0.444122145f,
-   -0.894599486f, -0.446868840f,
-   -0.893224301f, -0.449611330f,
-   -0.891840709f, -0.452349587f,
-   -0.890448723f, -0.455083587f,
-   -0.889048356f, -0.457813304f,
-   -0.887639620f, -0.460538711f,
-   -0.886222530f, -0.463259784f,
-   -0.884797098f, -0.465976496f,
-   -0.883363339f, -0.468688822f,
-   -0.881921264f, -0.471396737f,
-   -0.880470889f, -0.474100215f,
-   -0.879012226f, -0.476799230f,
-   -0.877545290f, -0.479493758f,
-   -0.876070094f, -0.482183772f,
-   -0.874586652f, -0.484869248f,
-   -0.873094978f, -0.487550160f,
-   -0.871595087f, -0.490226483f,
-   -0.870086991f, -0.492898192f,
-   -0.868570706f, -0.495565262f,
-   -0.867046246f, -0.498227667f,
-   -0.865513624f, -0.500885383f,
-   -0.863972856f, -0.503538384f,
-   -0.862423956f, -0.506186645f,
-   -0.860866939f, -0.508830143f,
-   -0.859301818f, -0.511468850f,
-   -0.857728610f, -0.514102744f,
-   -0.856147328f, -0.516731799f,
-   -0.854557988f, -0.519355990f,
-   -0.852960605f, -0.521975293f,
-   -0.851355193f, -0.524589683f,
-   -0.849741768f, -0.527199135f,
-   -0.848120345f, -0.529803625f,
-   -0.846490939f, -0.532403128f,
-   -0.844853565f, -0.534997620f,
-   -0.843208240f, -0.537587076f,
-   -0.841554977f, -0.540171473f,
-   -0.839893794f, -0.542750785f,
-   -0.838224706f, -0.545324988f,
-   -0.836547727f, -0.547894059f,
-   -0.834862875f, -0.550457973f,
-   -0.833170165f, -0.553016706f,
-   -0.831469612f, -0.555570233f,
-   -0.829761234f, -0.558118531f,
-   -0.828045045f, -0.560661576f,
-   -0.826321063f, -0.563199344f,
-   -0.824589303f, -0.565731811f,
-   -0.822849781f, -0.568258953f,
-   -0.821102515f, -0.570780746f,
-   -0.819347520f, -0.573297167f,
-   -0.817584813f, -0.575808191f,
-   -0.815814411f, -0.578313796f,
-   -0.814036330f, -0.580813958f,
-   -0.812250587f, -0.583308653f,
-   -0.810457198f, -0.585797857f,
-   -0.808656182f, -0.588281548f,
-   -0.806847554f, -0.590759702f,
-   -0.805031331f, -0.593232295f,
-   -0.803207531f, -0.595699304f,
-   -0.801376172f, -0.598160707f,
-   -0.799537269f, -0.600616479f,
-   -0.797690841f, -0.603066599f,
-   -0.795836905f, -0.605511041f,
-   -0.793975478f, -0.607949785f,
-   -0.792106577f, -0.610382806f,
-   -0.790230221f, -0.612810082f,
-   -0.788346428f, -0.615231591f,
-   -0.786455214f, -0.617647308f,
-   -0.784556597f, -0.620057212f,
-   -0.782650596f, -0.622461279f,
-   -0.780737229f, -0.624859488f,
-   -0.778816512f, -0.627251815f,
-   -0.776888466f, -0.629638239f,
-   -0.774953107f, -0.632018736f,
-   -0.773010453f, -0.634393284f,
-   -0.771060524f, -0.636761861f,
-   -0.769103338f, -0.639124445f,
-   -0.767138912f, -0.641481013f,
-   -0.765167266f, -0.643831543f,
-   -0.763188417f, -0.646176013f,
-   -0.761202385f, -0.648514401f,
-   -0.759209189f, -0.650846685f,
-   -0.757208847f, -0.653172843f,
-   -0.755201377f, -0.655492853f,
-   -0.753186799f, -0.657806693f,
-   -0.751165132f, -0.660114342f,
-   -0.749136395f, -0.662415778f,
-   -0.747100606f, -0.664710978f,
-   -0.745057785f, -0.666999922f,
-   -0.743007952f, -0.669282588f,
-   -0.740951125f, -0.671558955f,
-   -0.738887324f, -0.673829000f,
-   -0.736816569f, -0.676092704f,
-   -0.734738878f, -0.678350043f,
-   -0.732654272f, -0.680600998f,
-   -0.730562769f, -0.682845546f,
-   -0.728464390f, -0.685083668f,
-   -0.726359155f, -0.687315341f,
-   -0.724247083f, -0.689540545f,
-   -0.722128194f, -0.691759258f,
-   -0.720002508f, -0.693971461f,
-   -0.717870045f, -0.696177131f,
-   -0.715730825f, -0.698376249f,
-   -0.713584869f, -0.700568794f,
-   -0.711432196f, -0.702754744f,
-   -0.709272826f, -0.704934080f,
-   -0.707106781f, -0.707106781f,
-   -0.704934080f, -0.709272826f,
-   -0.702754744f, -0.711432196f,
-   -0.700568794f, -0.713584869f,
-   -0.698376249f, -0.715730825f,
-   -0.696177131f, -0.717870045f,
-   -0.693971461f, -0.720002508f,
-   -0.691759258f, -0.722128194f,
-   -0.689540545f, -0.724247083f,
-   -0.687315341f, -0.726359155f,
-   -0.685083668f, -0.728464390f,
-   -0.682845546f, -0.730562769f,
-   -0.680600998f, -0.732654272f,
-   -0.678350043f, -0.734738878f,
-   -0.676092704f, -0.736816569f,
-   -0.673829000f, -0.738887324f,
-   -0.671558955f, -0.740951125f,
-   -0.669282588f, -0.743007952f,
-   -0.666999922f, -0.745057785f,
-   -0.664710978f, -0.747100606f,
-   -0.662415778f, -0.749136395f,
-   -0.660114342f, -0.751165132f,
-   -0.657806693f, -0.753186799f,
-   -0.655492853f, -0.755201377f,
-   -0.653172843f, -0.757208847f,
-   -0.650846685f, -0.759209189f,
-   -0.648514401f, -0.761202385f,
-   -0.646176013f, -0.763188417f,
-   -0.643831543f, -0.765167266f,
-   -0.641481013f, -0.767138912f,
-   -0.639124445f, -0.769103338f,
-   -0.636761861f, -0.771060524f,
-   -0.634393284f, -0.773010453f,
-   -0.632018736f, -0.774953107f,
-   -0.629638239f, -0.776888466f,
-   -0.627251815f, -0.778816512f,
-   -0.624859488f, -0.780737229f,
-   -0.622461279f, -0.782650596f,
-   -0.620057212f, -0.784556597f,
-   -0.617647308f, -0.786455214f,
-   -0.615231591f, -0.788346428f,
-   -0.612810082f, -0.790230221f,
-   -0.610382806f, -0.792106577f,
-   -0.607949785f, -0.793975478f,
-   -0.605511041f, -0.795836905f,
-   -0.603066599f, -0.797690841f,
-   -0.600616479f, -0.799537269f,
-   -0.598160707f, -0.801376172f,
-   -0.595699304f, -0.803207531f,
-   -0.593232295f, -0.805031331f,
-   -0.590759702f, -0.806847554f,
-   -0.588281548f, -0.808656182f,
-   -0.585797857f, -0.810457198f,
-   -0.583308653f, -0.812250587f,
-   -0.580813958f, -0.814036330f,
-   -0.578313796f, -0.815814411f,
-   -0.575808191f, -0.817584813f,
-   -0.573297167f, -0.819347520f,
-   -0.570780746f, -0.821102515f,
-   -0.568258953f, -0.822849781f,
-   -0.565731811f, -0.824589303f,
-   -0.563199344f, -0.826321063f,
-   -0.560661576f, -0.828045045f,
-   -0.558118531f, -0.829761234f,
-   -0.555570233f, -0.831469612f,
-   -0.553016706f, -0.833170165f,
-   -0.550457973f, -0.834862875f,
-   -0.547894059f, -0.836547727f,
-   -0.545324988f, -0.838224706f,
-   -0.542750785f, -0.839893794f,
-   -0.540171473f, -0.841554977f,
-   -0.537587076f, -0.843208240f,
-   -0.534997620f, -0.844853565f,
-   -0.532403128f, -0.846490939f,
-   -0.529803625f, -0.848120345f,
-   -0.527199135f, -0.849741768f,
-   -0.524589683f, -0.851355193f,
-   -0.521975293f, -0.852960605f,
-   -0.519355990f, -0.854557988f,
-   -0.516731799f, -0.856147328f,
-   -0.514102744f, -0.857728610f,
-   -0.511468850f, -0.859301818f,
-   -0.508830143f, -0.860866939f,
-   -0.506186645f, -0.862423956f,
-   -0.503538384f, -0.863972856f,
-   -0.500885383f, -0.865513624f,
-   -0.498227667f, -0.867046246f,
-   -0.495565262f, -0.868570706f,
-   -0.492898192f, -0.870086991f,
-   -0.490226483f, -0.871595087f,
-   -0.487550160f, -0.873094978f,
-   -0.484869248f, -0.874586652f,
-   -0.482183772f, -0.876070094f,
-   -0.479493758f, -0.877545290f,
-   -0.476799230f, -0.879012226f,
-   -0.474100215f, -0.880470889f,
-   -0.471396737f, -0.881921264f,
-   -0.468688822f, -0.883363339f,
-   -0.465976496f, -0.884797098f,
-   -0.463259784f, -0.886222530f,
-   -0.460538711f, -0.887639620f,
-   -0.457813304f, -0.889048356f,
-   -0.455083587f, -0.890448723f,
-   -0.452349587f, -0.891840709f,
-   -0.449611330f, -0.893224301f,
-   -0.446868840f, -0.894599486f,
-   -0.444122145f, -0.895966250f,
-   -0.441371269f, -0.897324581f,
-   -0.438616239f, -0.898674466f,
-   -0.435857080f, -0.900015892f,
-   -0.433093819f, -0.901348847f,
-   -0.430326481f, -0.902673318f,
-   -0.427555093f, -0.903989293f,
-   -0.424779681f, -0.905296759f,
-   -0.422000271f, -0.906595705f,
-   -0.419216888f, -0.907886116f,
-   -0.416429560f, -0.909167983f,
-   -0.413638312f, -0.910441292f,
-   -0.410843171f, -0.911706032f,
-   -0.408044163f, -0.912962190f,
-   -0.405241314f, -0.914209756f,
-   -0.402434651f, -0.915448716f,
-   -0.399624200f, -0.916679060f,
-   -0.396809987f, -0.917900776f,
-   -0.393992040f, -0.919113852f,
-   -0.391170384f, -0.920318277f,
-   -0.388345047f, -0.921514039f,
-   -0.385516054f, -0.922701128f,
-   -0.382683432f, -0.923879533f,
-   -0.379847209f, -0.925049241f,
-   -0.377007410f, -0.926210242f,
-   -0.374164063f, -0.927362526f,
-   -0.371317194f, -0.928506080f,
-   -0.368466830f, -0.929640896f,
-   -0.365612998f, -0.930766961f,
-   -0.362755724f, -0.931884266f,
-   -0.359895037f, -0.932992799f,
-   -0.357030961f, -0.934092550f,
-   -0.354163525f, -0.935183510f,
-   -0.351292756f, -0.936265667f,
-   -0.348418680f, -0.937339012f,
-   -0.345541325f, -0.938403534f,
-   -0.342660717f, -0.939459224f,
-   -0.339776884f, -0.940506071f,
-   -0.336889853f, -0.941544065f,
-   -0.333999651f, -0.942573198f,
-   -0.331106306f, -0.943593458f,
-   -0.328209844f, -0.944604837f,
-   -0.325310292f, -0.945607325f,
-   -0.322407679f, -0.946600913f,
-   -0.319502031f, -0.947585591f,
-   -0.316593376f, -0.948561350f,
-   -0.313681740f, -0.949528181f,
-   -0.310767153f, -0.950486074f,
-   -0.307849640f, -0.951435021f,
-   -0.304929230f, -0.952375013f,
-   -0.302005949f, -0.953306040f,
-   -0.299079826f, -0.954228095f,
-   -0.296150888f, -0.955141168f,
-   -0.293219163f, -0.956045251f,
-   -0.290284677f, -0.956940336f,
-   -0.287347460f, -0.957826413f,
-   -0.284407537f, -0.958703475f,
-   -0.281464938f, -0.959571513f,
-   -0.278519689f, -0.960430519f,
-   -0.275571819f, -0.961280486f,
-   -0.272621355f, -0.962121404f,
-   -0.269668326f, -0.962953267f,
-   -0.266712757f, -0.963776066f,
-   -0.263754679f, -0.964589793f,
-   -0.260794118f, -0.965394442f,
-   -0.257831102f, -0.966190003f,
-   -0.254865660f, -0.966976471f,
-   -0.251897818f, -0.967753837f,
-   -0.248927606f, -0.968522094f,
-   -0.245955050f, -0.969281235f,
-   -0.242980180f, -0.970031253f,
-   -0.240003022f, -0.970772141f,
-   -0.237023606f, -0.971503891f,
-   -0.234041959f, -0.972226497f,
-   -0.231058108f, -0.972939952f,
-   -0.228072083f, -0.973644250f,
-   -0.225083911f, -0.974339383f,
-   -0.222093621f, -0.975025345f,
-   -0.219101240f, -0.975702130f,
-   -0.216106797f, -0.976369731f,
-   -0.213110320f, -0.977028143f,
-   -0.210111837f, -0.977677358f,
-   -0.207111376f, -0.978317371f,
-   -0.204108966f, -0.978948175f,
-   -0.201104635f, -0.979569766f,
-   -0.198098411f, -0.980182136f,
-   -0.195090322f, -0.980785280f,
-   -0.192080397f, -0.981379193f,
-   -0.189068664f, -0.981963869f,
-   -0.186055152f, -0.982539302f,
-   -0.183039888f, -0.983105487f,
-   -0.180022901f, -0.983662419f,
-   -0.177004220f, -0.984210092f,
-   -0.173983873f, -0.984748502f,
-   -0.170961889f, -0.985277642f,
-   -0.167938295f, -0.985797509f,
-   -0.164913120f, -0.986308097f,
-   -0.161886394f, -0.986809402f,
-   -0.158858143f, -0.987301418f,
-   -0.155828398f, -0.987784142f,
-   -0.152797185f, -0.988257568f,
-   -0.149764535f, -0.988721692f,
-   -0.146730474f, -0.989176510f,
-   -0.143695033f, -0.989622017f,
-   -0.140658239f, -0.990058210f,
-   -0.137620122f, -0.990485084f,
-   -0.134580709f, -0.990902635f,
-   -0.131540029f, -0.991310860f,
-   -0.128498111f, -0.991709754f,
-   -0.125454983f, -0.992099313f,
-   -0.122410675f, -0.992479535f,
-   -0.119365215f, -0.992850414f,
-   -0.116318631f, -0.993211949f,
-   -0.113270952f, -0.993564136f,
-   -0.110222207f, -0.993906970f,
-   -0.107172425f, -0.994240449f,
-   -0.104121634f, -0.994564571f,
-   -0.101069863f, -0.994879331f,
-   -0.098017140f, -0.995184727f,
-   -0.094963495f, -0.995480755f,
-   -0.091908956f, -0.995767414f,
-   -0.088853553f, -0.996044701f,
-   -0.085797312f, -0.996312612f,
-   -0.082740265f, -0.996571146f,
-   -0.079682438f, -0.996820299f,
-   -0.076623861f, -0.997060070f,
-   -0.073564564f, -0.997290457f,
-   -0.070504573f, -0.997511456f,
-   -0.067443920f, -0.997723067f,
-   -0.064382631f, -0.997925286f,
-   -0.061320736f, -0.998118113f,
-   -0.058258265f, -0.998301545f,
-   -0.055195244f, -0.998475581f,
-   -0.052131705f, -0.998640218f,
-   -0.049067674f, -0.998795456f,
-   -0.046003182f, -0.998941293f,
-   -0.042938257f, -0.999077728f,
-   -0.039872928f, -0.999204759f,
-   -0.036807223f, -0.999322385f,
-   -0.033741172f, -0.999430605f,
-   -0.030674803f, -0.999529418f,
-   -0.027608146f, -0.999618822f,
-   -0.024541229f, -0.999698819f,
-   -0.021474080f, -0.999769405f,
-   -0.018406730f, -0.999830582f,
-   -0.015339206f, -0.999882347f,
-   -0.012271538f, -0.999924702f,
-   -0.009203755f, -0.999957645f,
-   -0.006135885f, -0.999981175f,
-   -0.003067957f, -0.999995294f,
-   -0.000000000f, -1.000000000f,
-    0.003067957f, -0.999995294f,
-    0.006135885f, -0.999981175f,
-    0.009203755f, -0.999957645f,
-    0.012271538f, -0.999924702f,
-    0.015339206f, -0.999882347f,
-    0.018406730f, -0.999830582f,
-    0.021474080f, -0.999769405f,
-    0.024541229f, -0.999698819f,
-    0.027608146f, -0.999618822f,
-    0.030674803f, -0.999529418f,
-    0.033741172f, -0.999430605f,
-    0.036807223f, -0.999322385f,
-    0.039872928f, -0.999204759f,
-    0.042938257f, -0.999077728f,
-    0.046003182f, -0.998941293f,
-    0.049067674f, -0.998795456f,
-    0.052131705f, -0.998640218f,
-    0.055195244f, -0.998475581f,
-    0.058258265f, -0.998301545f,
-    0.061320736f, -0.998118113f,
-    0.064382631f, -0.997925286f,
-    0.067443920f, -0.997723067f,
-    0.070504573f, -0.997511456f,
-    0.073564564f, -0.997290457f,
-    0.076623861f, -0.997060070f,
-    0.079682438f, -0.996820299f,
-    0.082740265f, -0.996571146f,
-    0.085797312f, -0.996312612f,
-    0.088853553f, -0.996044701f,
-    0.091908956f, -0.995767414f,
-    0.094963495f, -0.995480755f,
-    0.098017140f, -0.995184727f,
-    0.101069863f, -0.994879331f,
-    0.104121634f, -0.994564571f,
-    0.107172425f, -0.994240449f,
-    0.110222207f, -0.993906970f,
-    0.113270952f, -0.993564136f,
-    0.116318631f, -0.993211949f,
-    0.119365215f, -0.992850414f,
-    0.122410675f, -0.992479535f,
-    0.125454983f, -0.992099313f,
-    0.128498111f, -0.991709754f,
-    0.131540029f, -0.991310860f,
-    0.134580709f, -0.990902635f,
-    0.137620122f, -0.990485084f,
-    0.140658239f, -0.990058210f,
-    0.143695033f, -0.989622017f,
-    0.146730474f, -0.989176510f,
-    0.149764535f, -0.988721692f,
-    0.152797185f, -0.988257568f,
-    0.155828398f, -0.987784142f,
-    0.158858143f, -0.987301418f,
-    0.161886394f, -0.986809402f,
-    0.164913120f, -0.986308097f,
-    0.167938295f, -0.985797509f,
-    0.170961889f, -0.985277642f,
-    0.173983873f, -0.984748502f,
-    0.177004220f, -0.984210092f,
-    0.180022901f, -0.983662419f,
-    0.183039888f, -0.983105487f,
-    0.186055152f, -0.982539302f,
-    0.189068664f, -0.981963869f,
-    0.192080397f, -0.981379193f,
-    0.195090322f, -0.980785280f,
-    0.198098411f, -0.980182136f,
-    0.201104635f, -0.979569766f,
-    0.204108966f, -0.978948175f,
-    0.207111376f, -0.978317371f,
-    0.210111837f, -0.977677358f,
-    0.213110320f, -0.977028143f,
-    0.216106797f, -0.976369731f,
-    0.219101240f, -0.975702130f,
-    0.222093621f, -0.975025345f,
-    0.225083911f, -0.974339383f,
-    0.228072083f, -0.973644250f,
-    0.231058108f, -0.972939952f,
-    0.234041959f, -0.972226497f,
-    0.237023606f, -0.971503891f,
-    0.240003022f, -0.970772141f,
-    0.242980180f, -0.970031253f,
-    0.245955050f, -0.969281235f,
-    0.248927606f, -0.968522094f,
-    0.251897818f, -0.967753837f,
-    0.254865660f, -0.966976471f,
-    0.257831102f, -0.966190003f,
-    0.260794118f, -0.965394442f,
-    0.263754679f, -0.964589793f,
-    0.266712757f, -0.963776066f,
-    0.269668326f, -0.962953267f,
-    0.272621355f, -0.962121404f,
-    0.275571819f, -0.961280486f,
-    0.278519689f, -0.960430519f,
-    0.281464938f, -0.959571513f,
-    0.284407537f, -0.958703475f,
-    0.287347460f, -0.957826413f,
-    0.290284677f, -0.956940336f,
-    0.293219163f, -0.956045251f,
-    0.296150888f, -0.955141168f,
-    0.299079826f, -0.954228095f,
-    0.302005949f, -0.953306040f,
-    0.304929230f, -0.952375013f,
-    0.307849640f, -0.951435021f,
-    0.310767153f, -0.950486074f,
-    0.313681740f, -0.949528181f,
-    0.316593376f, -0.948561350f,
-    0.319502031f, -0.947585591f,
-    0.322407679f, -0.946600913f,
-    0.325310292f, -0.945607325f,
-    0.328209844f, -0.944604837f,
-    0.331106306f, -0.943593458f,
-    0.333999651f, -0.942573198f,
-    0.336889853f, -0.941544065f,
-    0.339776884f, -0.940506071f,
-    0.342660717f, -0.939459224f,
-    0.345541325f, -0.938403534f,
-    0.348418680f, -0.937339012f,
-    0.351292756f, -0.936265667f,
-    0.354163525f, -0.935183510f,
-    0.357030961f, -0.934092550f,
-    0.359895037f, -0.932992799f,
-    0.362755724f, -0.931884266f,
-    0.365612998f, -0.930766961f,
-    0.368466830f, -0.929640896f,
-    0.371317194f, -0.928506080f,
-    0.374164063f, -0.927362526f,
-    0.377007410f, -0.926210242f,
-    0.379847209f, -0.925049241f,
-    0.382683432f, -0.923879533f,
-    0.385516054f, -0.922701128f,
-    0.388345047f, -0.921514039f,
-    0.391170384f, -0.920318277f,
-    0.393992040f, -0.919113852f,
-    0.396809987f, -0.917900776f,
-    0.399624200f, -0.916679060f,
-    0.402434651f, -0.915448716f,
-    0.405241314f, -0.914209756f,
-    0.408044163f, -0.912962190f,
-    0.410843171f, -0.911706032f,
-    0.413638312f, -0.910441292f,
-    0.416429560f, -0.909167983f,
-    0.419216888f, -0.907886116f,
-    0.422000271f, -0.906595705f,
-    0.424779681f, -0.905296759f,
-    0.427555093f, -0.903989293f,
-    0.430326481f, -0.902673318f,
-    0.433093819f, -0.901348847f,
-    0.435857080f, -0.900015892f,
-    0.438616239f, -0.898674466f,
-    0.441371269f, -0.897324581f,
-    0.444122145f, -0.895966250f,
-    0.446868840f, -0.894599486f,
-    0.449611330f, -0.893224301f,
-    0.452349587f, -0.891840709f,
-    0.455083587f, -0.890448723f,
-    0.457813304f, -0.889048356f,
-    0.460538711f, -0.887639620f,
-    0.463259784f, -0.886222530f,
-    0.465976496f, -0.884797098f,
-    0.468688822f, -0.883363339f,
-    0.471396737f, -0.881921264f,
-    0.474100215f, -0.880470889f,
-    0.476799230f, -0.879012226f,
-    0.479493758f, -0.877545290f,
-    0.482183772f, -0.876070094f,
-    0.484869248f, -0.874586652f,
-    0.487550160f, -0.873094978f,
-    0.490226483f, -0.871595087f,
-    0.492898192f, -0.870086991f,
-    0.495565262f, -0.868570706f,
-    0.498227667f, -0.867046246f,
-    0.500885383f, -0.865513624f,
-    0.503538384f, -0.863972856f,
-    0.506186645f, -0.862423956f,
-    0.508830143f, -0.860866939f,
-    0.511468850f, -0.859301818f,
-    0.514102744f, -0.857728610f,
-    0.516731799f, -0.856147328f,
-    0.519355990f, -0.854557988f,
-    0.521975293f, -0.852960605f,
-    0.524589683f, -0.851355193f,
-    0.527199135f, -0.849741768f,
-    0.529803625f, -0.848120345f,
-    0.532403128f, -0.846490939f,
-    0.534997620f, -0.844853565f,
-    0.537587076f, -0.843208240f,
-    0.540171473f, -0.841554977f,
-    0.542750785f, -0.839893794f,
-    0.545324988f, -0.838224706f,
-    0.547894059f, -0.836547727f,
-    0.550457973f, -0.834862875f,
-    0.553016706f, -0.833170165f,
-    0.555570233f, -0.831469612f,
-    0.558118531f, -0.829761234f,
-    0.560661576f, -0.828045045f,
-    0.563199344f, -0.826321063f,
-    0.565731811f, -0.824589303f,
-    0.568258953f, -0.822849781f,
-    0.570780746f, -0.821102515f,
-    0.573297167f, -0.819347520f,
-    0.575808191f, -0.817584813f,
-    0.578313796f, -0.815814411f,
-    0.580813958f, -0.814036330f,
-    0.583308653f, -0.812250587f,
-    0.585797857f, -0.810457198f,
-    0.588281548f, -0.808656182f,
-    0.590759702f, -0.806847554f,
-    0.593232295f, -0.805031331f,
-    0.595699304f, -0.803207531f,
-    0.598160707f, -0.801376172f,
-    0.600616479f, -0.799537269f,
-    0.603066599f, -0.797690841f,
-    0.605511041f, -0.795836905f,
-    0.607949785f, -0.793975478f,
-    0.610382806f, -0.792106577f,
-    0.612810082f, -0.790230221f,
-    0.615231591f, -0.788346428f,
-    0.617647308f, -0.786455214f,
-    0.620057212f, -0.784556597f,
-    0.622461279f, -0.782650596f,
-    0.624859488f, -0.780737229f,
-    0.627251815f, -0.778816512f,
-    0.629638239f, -0.776888466f,
-    0.632018736f, -0.774953107f,
-    0.634393284f, -0.773010453f,
-    0.636761861f, -0.771060524f,
-    0.639124445f, -0.769103338f,
-    0.641481013f, -0.767138912f,
-    0.643831543f, -0.765167266f,
-    0.646176013f, -0.763188417f,
-    0.648514401f, -0.761202385f,
-    0.650846685f, -0.759209189f,
-    0.653172843f, -0.757208847f,
-    0.655492853f, -0.755201377f,
-    0.657806693f, -0.753186799f,
-    0.660114342f, -0.751165132f,
-    0.662415778f, -0.749136395f,
-    0.664710978f, -0.747100606f,
-    0.666999922f, -0.745057785f,
-    0.669282588f, -0.743007952f,
-    0.671558955f, -0.740951125f,
-    0.673829000f, -0.738887324f,
-    0.676092704f, -0.736816569f,
-    0.678350043f, -0.734738878f,
-    0.680600998f, -0.732654272f,
-    0.682845546f, -0.730562769f,
-    0.685083668f, -0.728464390f,
-    0.687315341f, -0.726359155f,
-    0.689540545f, -0.724247083f,
-    0.691759258f, -0.722128194f,
-    0.693971461f, -0.720002508f,
-    0.696177131f, -0.717870045f,
-    0.698376249f, -0.715730825f,
-    0.700568794f, -0.713584869f,
-    0.702754744f, -0.711432196f,
-    0.704934080f, -0.709272826f,
-    0.707106781f, -0.707106781f,
-    0.709272826f, -0.704934080f,
-    0.711432196f, -0.702754744f,
-    0.713584869f, -0.700568794f,
-    0.715730825f, -0.698376249f,
-    0.717870045f, -0.696177131f,
-    0.720002508f, -0.693971461f,
-    0.722128194f, -0.691759258f,
-    0.724247083f, -0.689540545f,
-    0.726359155f, -0.687315341f,
-    0.728464390f, -0.685083668f,
-    0.730562769f, -0.682845546f,
-    0.732654272f, -0.680600998f,
-    0.734738878f, -0.678350043f,
-    0.736816569f, -0.676092704f,
-    0.738887324f, -0.673829000f,
-    0.740951125f, -0.671558955f,
-    0.743007952f, -0.669282588f,
-    0.745057785f, -0.666999922f,
-    0.747100606f, -0.664710978f,
-    0.749136395f, -0.662415778f,
-    0.751165132f, -0.660114342f,
-    0.753186799f, -0.657806693f,
-    0.755201377f, -0.655492853f,
-    0.757208847f, -0.653172843f,
-    0.759209189f, -0.650846685f,
-    0.761202385f, -0.648514401f,
-    0.763188417f, -0.646176013f,
-    0.765167266f, -0.643831543f,
-    0.767138912f, -0.641481013f,
-    0.769103338f, -0.639124445f,
-    0.771060524f, -0.636761861f,
-    0.773010453f, -0.634393284f,
-    0.774953107f, -0.632018736f,
-    0.776888466f, -0.629638239f,
-    0.778816512f, -0.627251815f,
-    0.780737229f, -0.624859488f,
-    0.782650596f, -0.622461279f,
-    0.784556597f, -0.620057212f,
-    0.786455214f, -0.617647308f,
-    0.788346428f, -0.615231591f,
-    0.790230221f, -0.612810082f,
-    0.792106577f, -0.610382806f,
-    0.793975478f, -0.607949785f,
-    0.795836905f, -0.605511041f,
-    0.797690841f, -0.603066599f,
-    0.799537269f, -0.600616479f,
-    0.801376172f, -0.598160707f,
-    0.803207531f, -0.595699304f,
-    0.805031331f, -0.593232295f,
-    0.806847554f, -0.590759702f,
-    0.808656182f, -0.588281548f,
-    0.810457198f, -0.585797857f,
-    0.812250587f, -0.583308653f,
-    0.814036330f, -0.580813958f,
-    0.815814411f, -0.578313796f,
-    0.817584813f, -0.575808191f,
-    0.819347520f, -0.573297167f,
-    0.821102515f, -0.570780746f,
-    0.822849781f, -0.568258953f,
-    0.824589303f, -0.565731811f,
-    0.826321063f, -0.563199344f,
-    0.828045045f, -0.560661576f,
-    0.829761234f, -0.558118531f,
-    0.831469612f, -0.555570233f,
-    0.833170165f, -0.553016706f,
-    0.834862875f, -0.550457973f,
-    0.836547727f, -0.547894059f,
-    0.838224706f, -0.545324988f,
-    0.839893794f, -0.542750785f,
-    0.841554977f, -0.540171473f,
-    0.843208240f, -0.537587076f,
-    0.844853565f, -0.534997620f,
-    0.846490939f, -0.532403128f,
-    0.848120345f, -0.529803625f,
-    0.849741768f, -0.527199135f,
-    0.851355193f, -0.524589683f,
-    0.852960605f, -0.521975293f,
-    0.854557988f, -0.519355990f,
-    0.856147328f, -0.516731799f,
-    0.857728610f, -0.514102744f,
-    0.859301818f, -0.511468850f,
-    0.860866939f, -0.508830143f,
-    0.862423956f, -0.506186645f,
-    0.863972856f, -0.503538384f,
-    0.865513624f, -0.500885383f,
-    0.867046246f, -0.498227667f,
-    0.868570706f, -0.495565262f,
-    0.870086991f, -0.492898192f,
-    0.871595087f, -0.490226483f,
-    0.873094978f, -0.487550160f,
-    0.874586652f, -0.484869248f,
-    0.876070094f, -0.482183772f,
-    0.877545290f, -0.479493758f,
-    0.879012226f, -0.476799230f,
-    0.880470889f, -0.474100215f,
-    0.881921264f, -0.471396737f,
-    0.883363339f, -0.468688822f,
-    0.884797098f, -0.465976496f,
-    0.886222530f, -0.463259784f,
-    0.887639620f, -0.460538711f,
-    0.889048356f, -0.457813304f,
-    0.890448723f, -0.455083587f,
-    0.891840709f, -0.452349587f,
-    0.893224301f, -0.449611330f,
-    0.894599486f, -0.446868840f,
-    0.895966250f, -0.444122145f,
-    0.897324581f, -0.441371269f,
-    0.898674466f, -0.438616239f,
-    0.900015892f, -0.435857080f,
-    0.901348847f, -0.433093819f,
-    0.902673318f, -0.430326481f,
-    0.903989293f, -0.427555093f,
-    0.905296759f, -0.424779681f,
-    0.906595705f, -0.422000271f,
-    0.907886116f, -0.419216888f,
-    0.909167983f, -0.416429560f,
-    0.910441292f, -0.413638312f,
-    0.911706032f, -0.410843171f,
-    0.912962190f, -0.408044163f,
-    0.914209756f, -0.405241314f,
-    0.915448716f, -0.402434651f,
-    0.916679060f, -0.399624200f,
-    0.917900776f, -0.396809987f,
-    0.919113852f, -0.393992040f,
-    0.920318277f, -0.391170384f,
-    0.921514039f, -0.388345047f,
-    0.922701128f, -0.385516054f,
-    0.923879533f, -0.382683432f,
-    0.925049241f, -0.379847209f,
-    0.926210242f, -0.377007410f,
-    0.927362526f, -0.374164063f,
-    0.928506080f, -0.371317194f,
-    0.929640896f, -0.368466830f,
-    0.930766961f, -0.365612998f,
-    0.931884266f, -0.362755724f,
-    0.932992799f, -0.359895037f,
-    0.934092550f, -0.357030961f,
-    0.935183510f, -0.354163525f,
-    0.936265667f, -0.351292756f,
-    0.937339012f, -0.348418680f,
-    0.938403534f, -0.345541325f,
-    0.939459224f, -0.342660717f,
-    0.940506071f, -0.339776884f,
-    0.941544065f, -0.336889853f,
-    0.942573198f, -0.333999651f,
-    0.943593458f, -0.331106306f,
-    0.944604837f, -0.328209844f,
-    0.945607325f, -0.325310292f,
-    0.946600913f, -0.322407679f,
-    0.947585591f, -0.319502031f,
-    0.948561350f, -0.316593376f,
-    0.949528181f, -0.313681740f,
-    0.950486074f, -0.310767153f,
-    0.951435021f, -0.307849640f,
-    0.952375013f, -0.304929230f,
-    0.953306040f, -0.302005949f,
-    0.954228095f, -0.299079826f,
-    0.955141168f, -0.296150888f,
-    0.956045251f, -0.293219163f,
-    0.956940336f, -0.290284677f,
-    0.957826413f, -0.287347460f,
-    0.958703475f, -0.284407537f,
-    0.959571513f, -0.281464938f,
-    0.960430519f, -0.278519689f,
-    0.961280486f, -0.275571819f,
-    0.962121404f, -0.272621355f,
-    0.962953267f, -0.269668326f,
-    0.963776066f, -0.266712757f,
-    0.964589793f, -0.263754679f,
-    0.965394442f, -0.260794118f,
-    0.966190003f, -0.257831102f,
-    0.966976471f, -0.254865660f,
-    0.967753837f, -0.251897818f,
-    0.968522094f, -0.248927606f,
-    0.969281235f, -0.245955050f,
-    0.970031253f, -0.242980180f,
-    0.970772141f, -0.240003022f,
-    0.971503891f, -0.237023606f,
-    0.972226497f, -0.234041959f,
-    0.972939952f, -0.231058108f,
-    0.973644250f, -0.228072083f,
-    0.974339383f, -0.225083911f,
-    0.975025345f, -0.222093621f,
-    0.975702130f, -0.219101240f,
-    0.976369731f, -0.216106797f,
-    0.977028143f, -0.213110320f,
-    0.977677358f, -0.210111837f,
-    0.978317371f, -0.207111376f,
-    0.978948175f, -0.204108966f,
-    0.979569766f, -0.201104635f,
-    0.980182136f, -0.198098411f,
-    0.980785280f, -0.195090322f,
-    0.981379193f, -0.192080397f,
-    0.981963869f, -0.189068664f,
-    0.982539302f, -0.186055152f,
-    0.983105487f, -0.183039888f,
-    0.983662419f, -0.180022901f,
-    0.984210092f, -0.177004220f,
-    0.984748502f, -0.173983873f,
-    0.985277642f, -0.170961889f,
-    0.985797509f, -0.167938295f,
-    0.986308097f, -0.164913120f,
-    0.986809402f, -0.161886394f,
-    0.987301418f, -0.158858143f,
-    0.987784142f, -0.155828398f,
-    0.988257568f, -0.152797185f,
-    0.988721692f, -0.149764535f,
-    0.989176510f, -0.146730474f,
-    0.989622017f, -0.143695033f,
-    0.990058210f, -0.140658239f,
-    0.990485084f, -0.137620122f,
-    0.990902635f, -0.134580709f,
-    0.991310860f, -0.131540029f,
-    0.991709754f, -0.128498111f,
-    0.992099313f, -0.125454983f,
-    0.992479535f, -0.122410675f,
-    0.992850414f, -0.119365215f,
-    0.993211949f, -0.116318631f,
-    0.993564136f, -0.113270952f,
-    0.993906970f, -0.110222207f,
-    0.994240449f, -0.107172425f,
-    0.994564571f, -0.104121634f,
-    0.994879331f, -0.101069863f,
-    0.995184727f, -0.098017140f,
-    0.995480755f, -0.094963495f,
-    0.995767414f, -0.091908956f,
-    0.996044701f, -0.088853553f,
-    0.996312612f, -0.085797312f,
-    0.996571146f, -0.082740265f,
-    0.996820299f, -0.079682438f,
-    0.997060070f, -0.076623861f,
-    0.997290457f, -0.073564564f,
-    0.997511456f, -0.070504573f,
-    0.997723067f, -0.067443920f,
-    0.997925286f, -0.064382631f,
-    0.998118113f, -0.061320736f,
-    0.998301545f, -0.058258265f,
-    0.998475581f, -0.055195244f,
-    0.998640218f, -0.052131705f,
-    0.998795456f, -0.049067674f,
-    0.998941293f, -0.046003182f,
-    0.999077728f, -0.042938257f,
-    0.999204759f, -0.039872928f,
-    0.999322385f, -0.036807223f,
-    0.999430605f, -0.033741172f,
-    0.999529418f, -0.030674803f,
-    0.999618822f, -0.027608146f,
-    0.999698819f, -0.024541229f,
-    0.999769405f, -0.021474080f,
-    0.999830582f, -0.018406730f,
-    0.999882347f, -0.015339206f,
-    0.999924702f, -0.012271538f,
-    0.999957645f, -0.009203755f,
-    0.999981175f, -0.006135885f,
-    0.999995294f, -0.003067957f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
-/**
-  @par
-  Example code for Floating-point Twiddle factors Generation:
-  @par
-  <pre>for (i = 0; i< N/; i++)
-  {
- 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
- 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 4096, PI = 3.14159265358979
-  @par
-  Cos and Sin values are in interleaved fashion
-*/
-const float32_t twiddleCoef_4096[8192] = {
-    1.000000000f,  0.000000000f,
-    0.999998823f,  0.001533980f,
-    0.999995294f,  0.003067957f,
-    0.999989411f,  0.004601926f,
-    0.999981175f,  0.006135885f,
-    0.999970586f,  0.007669829f,
-    0.999957645f,  0.009203755f,
-    0.999942350f,  0.010737659f,
-    0.999924702f,  0.012271538f,
-    0.999904701f,  0.013805389f,
-    0.999882347f,  0.015339206f,
-    0.999857641f,  0.016872988f,
-    0.999830582f,  0.018406730f,
-    0.999801170f,  0.019940429f,
-    0.999769405f,  0.021474080f,
-    0.999735288f,  0.023007681f,
-    0.999698819f,  0.024541229f,
-    0.999659997f,  0.026074718f,
-    0.999618822f,  0.027608146f,
-    0.999575296f,  0.029141509f,
-    0.999529418f,  0.030674803f,
-    0.999481187f,  0.032208025f,
-    0.999430605f,  0.033741172f,
-    0.999377670f,  0.035274239f,
-    0.999322385f,  0.036807223f,
-    0.999264747f,  0.038340120f,
-    0.999204759f,  0.039872928f,
-    0.999142419f,  0.041405641f,
-    0.999077728f,  0.042938257f,
-    0.999010686f,  0.044470772f,
-    0.998941293f,  0.046003182f,
-    0.998869550f,  0.047535484f,
-    0.998795456f,  0.049067674f,
-    0.998719012f,  0.050599749f,
-    0.998640218f,  0.052131705f,
-    0.998559074f,  0.053663538f,
-    0.998475581f,  0.055195244f,
-    0.998389737f,  0.056726821f,
-    0.998301545f,  0.058258265f,
-    0.998211003f,  0.059789571f,
-    0.998118113f,  0.061320736f,
-    0.998022874f,  0.062851758f,
-    0.997925286f,  0.064382631f,
-    0.997825350f,  0.065913353f,
-    0.997723067f,  0.067443920f,
-    0.997618435f,  0.068974328f,
-    0.997511456f,  0.070504573f,
-    0.997402130f,  0.072034653f,
-    0.997290457f,  0.073564564f,
-    0.997176437f,  0.075094301f,
-    0.997060070f,  0.076623861f,
-    0.996941358f,  0.078153242f,
-    0.996820299f,  0.079682438f,
-    0.996696895f,  0.081211447f,
-    0.996571146f,  0.082740265f,
-    0.996443051f,  0.084268888f,
-    0.996312612f,  0.085797312f,
-    0.996179829f,  0.087325535f,
-    0.996044701f,  0.088853553f,
-    0.995907229f,  0.090381361f,
-    0.995767414f,  0.091908956f,
-    0.995625256f,  0.093436336f,
-    0.995480755f,  0.094963495f,
-    0.995333912f,  0.096490431f,
-    0.995184727f,  0.098017140f,
-    0.995033199f,  0.099543619f,
-    0.994879331f,  0.101069863f,
-    0.994723121f,  0.102595869f,
-    0.994564571f,  0.104121634f,
-    0.994403680f,  0.105647154f,
-    0.994240449f,  0.107172425f,
-    0.994074879f,  0.108697444f,
-    0.993906970f,  0.110222207f,
-    0.993736722f,  0.111746711f,
-    0.993564136f,  0.113270952f,
-    0.993389211f,  0.114794927f,
-    0.993211949f,  0.116318631f,
-    0.993032350f,  0.117842062f,
-    0.992850414f,  0.119365215f,
-    0.992666142f,  0.120888087f,
-    0.992479535f,  0.122410675f,
-    0.992290591f,  0.123932975f,
-    0.992099313f,  0.125454983f,
-    0.991905700f,  0.126976696f,
-    0.991709754f,  0.128498111f,
-    0.991511473f,  0.130019223f,
-    0.991310860f,  0.131540029f,
-    0.991107914f,  0.133060525f,
-    0.990902635f,  0.134580709f,
-    0.990695025f,  0.136100575f,
-    0.990485084f,  0.137620122f,
-    0.990272812f,  0.139139344f,
-    0.990058210f,  0.140658239f,
-    0.989841278f,  0.142176804f,
-    0.989622017f,  0.143695033f,
-    0.989400428f,  0.145212925f,
-    0.989176510f,  0.146730474f,
-    0.988950265f,  0.148247679f,
-    0.988721692f,  0.149764535f,
-    0.988490793f,  0.151281038f,
-    0.988257568f,  0.152797185f,
-    0.988022017f,  0.154312973f,
-    0.987784142f,  0.155828398f,
-    0.987543942f,  0.157343456f,
-    0.987301418f,  0.158858143f,
-    0.987056571f,  0.160372457f,
-    0.986809402f,  0.161886394f,
-    0.986559910f,  0.163399949f,
-    0.986308097f,  0.164913120f,
-    0.986053963f,  0.166425904f,
-    0.985797509f,  0.167938295f,
-    0.985538735f,  0.169450291f,
-    0.985277642f,  0.170961889f,
-    0.985014231f,  0.172473084f,
-    0.984748502f,  0.173983873f,
-    0.984480455f,  0.175494253f,
-    0.984210092f,  0.177004220f,
-    0.983937413f,  0.178513771f,
-    0.983662419f,  0.180022901f,
-    0.983385110f,  0.181531608f,
-    0.983105487f,  0.183039888f,
-    0.982823551f,  0.184547737f,
-    0.982539302f,  0.186055152f,
-    0.982252741f,  0.187562129f,
-    0.981963869f,  0.189068664f,
-    0.981672686f,  0.190574755f,
-    0.981379193f,  0.192080397f,
-    0.981083391f,  0.193585587f,
-    0.980785280f,  0.195090322f,
-    0.980484862f,  0.196594598f,
-    0.980182136f,  0.198098411f,
-    0.979877104f,  0.199601758f,
-    0.979569766f,  0.201104635f,
-    0.979260123f,  0.202607039f,
-    0.978948175f,  0.204108966f,
-    0.978633924f,  0.205610413f,
-    0.978317371f,  0.207111376f,
-    0.977998515f,  0.208611852f,
-    0.977677358f,  0.210111837f,
-    0.977353900f,  0.211611327f,
-    0.977028143f,  0.213110320f,
-    0.976700086f,  0.214608811f,
-    0.976369731f,  0.216106797f,
-    0.976037079f,  0.217604275f,
-    0.975702130f,  0.219101240f,
-    0.975364885f,  0.220597690f,
-    0.975025345f,  0.222093621f,
-    0.974683511f,  0.223589029f,
-    0.974339383f,  0.225083911f,
-    0.973992962f,  0.226578264f,
-    0.973644250f,  0.228072083f,
-    0.973293246f,  0.229565366f,
-    0.972939952f,  0.231058108f,
-    0.972584369f,  0.232550307f,
-    0.972226497f,  0.234041959f,
-    0.971866337f,  0.235533059f,
-    0.971503891f,  0.237023606f,
-    0.971139158f,  0.238513595f,
-    0.970772141f,  0.240003022f,
-    0.970402839f,  0.241491885f,
-    0.970031253f,  0.242980180f,
-    0.969657385f,  0.244467903f,
-    0.969281235f,  0.245955050f,
-    0.968902805f,  0.247441619f,
-    0.968522094f,  0.248927606f,
-    0.968139105f,  0.250413007f,
-    0.967753837f,  0.251897818f,
-    0.967366292f,  0.253382037f,
-    0.966976471f,  0.254865660f,
-    0.966584374f,  0.256348682f,
-    0.966190003f,  0.257831102f,
-    0.965793359f,  0.259312915f,
-    0.965394442f,  0.260794118f,
-    0.964993253f,  0.262274707f,
-    0.964589793f,  0.263754679f,
-    0.964184064f,  0.265234030f,
-    0.963776066f,  0.266712757f,
-    0.963365800f,  0.268190857f,
-    0.962953267f,  0.269668326f,
-    0.962538468f,  0.271145160f,
-    0.962121404f,  0.272621355f,
-    0.961702077f,  0.274096910f,
-    0.961280486f,  0.275571819f,
-    0.960856633f,  0.277046080f,
-    0.960430519f,  0.278519689f,
-    0.960002146f,  0.279992643f,
-    0.959571513f,  0.281464938f,
-    0.959138622f,  0.282936570f,
-    0.958703475f,  0.284407537f,
-    0.958266071f,  0.285877835f,
-    0.957826413f,  0.287347460f,
-    0.957384501f,  0.288816408f,
-    0.956940336f,  0.290284677f,
-    0.956493919f,  0.291752263f,
-    0.956045251f,  0.293219163f,
-    0.955594334f,  0.294685372f,
-    0.955141168f,  0.296150888f,
-    0.954685755f,  0.297615707f,
-    0.954228095f,  0.299079826f,
-    0.953768190f,  0.300543241f,
-    0.953306040f,  0.302005949f,
-    0.952841648f,  0.303467947f,
-    0.952375013f,  0.304929230f,
-    0.951906137f,  0.306389795f,
-    0.951435021f,  0.307849640f,
-    0.950961666f,  0.309308760f,
-    0.950486074f,  0.310767153f,
-    0.950008245f,  0.312224814f,
-    0.949528181f,  0.313681740f,
-    0.949045882f,  0.315137929f,
-    0.948561350f,  0.316593376f,
-    0.948074586f,  0.318048077f,
-    0.947585591f,  0.319502031f,
-    0.947094366f,  0.320955232f,
-    0.946600913f,  0.322407679f,
-    0.946105232f,  0.323859367f,
-    0.945607325f,  0.325310292f,
-    0.945107193f,  0.326760452f,
-    0.944604837f,  0.328209844f,
-    0.944100258f,  0.329658463f,
-    0.943593458f,  0.331106306f,
-    0.943084437f,  0.332553370f,
-    0.942573198f,  0.333999651f,
-    0.942059740f,  0.335445147f,
-    0.941544065f,  0.336889853f,
-    0.941026175f,  0.338333767f,
-    0.940506071f,  0.339776884f,
-    0.939983753f,  0.341219202f,
-    0.939459224f,  0.342660717f,
-    0.938932484f,  0.344101426f,
-    0.938403534f,  0.345541325f,
-    0.937872376f,  0.346980411f,
-    0.937339012f,  0.348418680f,
-    0.936803442f,  0.349856130f,
-    0.936265667f,  0.351292756f,
-    0.935725689f,  0.352728556f,
-    0.935183510f,  0.354163525f,
-    0.934639130f,  0.355597662f,
-    0.934092550f,  0.357030961f,
-    0.933543773f,  0.358463421f,
-    0.932992799f,  0.359895037f,
-    0.932439629f,  0.361325806f,
-    0.931884266f,  0.362755724f,
-    0.931326709f,  0.364184790f,
-    0.930766961f,  0.365612998f,
-    0.930205023f,  0.367040346f,
-    0.929640896f,  0.368466830f,
-    0.929074581f,  0.369892447f,
-    0.928506080f,  0.371317194f,
-    0.927935395f,  0.372741067f,
-    0.927362526f,  0.374164063f,
-    0.926787474f,  0.375586178f,
-    0.926210242f,  0.377007410f,
-    0.925630831f,  0.378427755f,
-    0.925049241f,  0.379847209f,
-    0.924465474f,  0.381265769f,
-    0.923879533f,  0.382683432f,
-    0.923291417f,  0.384100195f,
-    0.922701128f,  0.385516054f,
-    0.922108669f,  0.386931006f,
-    0.921514039f,  0.388345047f,
-    0.920917242f,  0.389758174f,
-    0.920318277f,  0.391170384f,
-    0.919717146f,  0.392581674f,
-    0.919113852f,  0.393992040f,
-    0.918508394f,  0.395401479f,
-    0.917900776f,  0.396809987f,
-    0.917290997f,  0.398217562f,
-    0.916679060f,  0.399624200f,
-    0.916064966f,  0.401029897f,
-    0.915448716f,  0.402434651f,
-    0.914830312f,  0.403838458f,
-    0.914209756f,  0.405241314f,
-    0.913587048f,  0.406643217f,
-    0.912962190f,  0.408044163f,
-    0.912335185f,  0.409444149f,
-    0.911706032f,  0.410843171f,
-    0.911074734f,  0.412241227f,
-    0.910441292f,  0.413638312f,
-    0.909805708f,  0.415034424f,
-    0.909167983f,  0.416429560f,
-    0.908528119f,  0.417823716f,
-    0.907886116f,  0.419216888f,
-    0.907241978f,  0.420609074f,
-    0.906595705f,  0.422000271f,
-    0.905947298f,  0.423390474f,
-    0.905296759f,  0.424779681f,
-    0.904644091f,  0.426167889f,
-    0.903989293f,  0.427555093f,
-    0.903332368f,  0.428941292f,
-    0.902673318f,  0.430326481f,
-    0.902012144f,  0.431710658f,
-    0.901348847f,  0.433093819f,
-    0.900683429f,  0.434475961f,
-    0.900015892f,  0.435857080f,
-    0.899346237f,  0.437237174f,
-    0.898674466f,  0.438616239f,
-    0.898000580f,  0.439994271f,
-    0.897324581f,  0.441371269f,
-    0.896646470f,  0.442747228f,
-    0.895966250f,  0.444122145f,
-    0.895283921f,  0.445496017f,
-    0.894599486f,  0.446868840f,
-    0.893912945f,  0.448240612f,
-    0.893224301f,  0.449611330f,
-    0.892533555f,  0.450980989f,
-    0.891840709f,  0.452349587f,
-    0.891145765f,  0.453717121f,
-    0.890448723f,  0.455083587f,
-    0.889749586f,  0.456448982f,
-    0.889048356f,  0.457813304f,
-    0.888345033f,  0.459176548f,
-    0.887639620f,  0.460538711f,
-    0.886932119f,  0.461899791f,
-    0.886222530f,  0.463259784f,
-    0.885510856f,  0.464618686f,
-    0.884797098f,  0.465976496f,
-    0.884081259f,  0.467333209f,
-    0.883363339f,  0.468688822f,
-    0.882643340f,  0.470043332f,
-    0.881921264f,  0.471396737f,
-    0.881197113f,  0.472749032f,
-    0.880470889f,  0.474100215f,
-    0.879742593f,  0.475450282f,
-    0.879012226f,  0.476799230f,
-    0.878279792f,  0.478147056f,
-    0.877545290f,  0.479493758f,
-    0.876808724f,  0.480839331f,
-    0.876070094f,  0.482183772f,
-    0.875329403f,  0.483527079f,
-    0.874586652f,  0.484869248f,
-    0.873841843f,  0.486210276f,
-    0.873094978f,  0.487550160f,
-    0.872346059f,  0.488888897f,
-    0.871595087f,  0.490226483f,
-    0.870842063f,  0.491562916f,
-    0.870086991f,  0.492898192f,
-    0.869329871f,  0.494232309f,
-    0.868570706f,  0.495565262f,
-    0.867809497f,  0.496897049f,
-    0.867046246f,  0.498227667f,
-    0.866280954f,  0.499557113f,
-    0.865513624f,  0.500885383f,
-    0.864744258f,  0.502212474f,
-    0.863972856f,  0.503538384f,
-    0.863199422f,  0.504863109f,
-    0.862423956f,  0.506186645f,
-    0.861646461f,  0.507508991f,
-    0.860866939f,  0.508830143f,
-    0.860085390f,  0.510150097f,
-    0.859301818f,  0.511468850f,
-    0.858516224f,  0.512786401f,
-    0.857728610f,  0.514102744f,
-    0.856938977f,  0.515417878f,
-    0.856147328f,  0.516731799f,
-    0.855353665f,  0.518044504f,
-    0.854557988f,  0.519355990f,
-    0.853760301f,  0.520666254f,
-    0.852960605f,  0.521975293f,
-    0.852158902f,  0.523283103f,
-    0.851355193f,  0.524589683f,
-    0.850549481f,  0.525895027f,
-    0.849741768f,  0.527199135f,
-    0.848932055f,  0.528502002f,
-    0.848120345f,  0.529803625f,
-    0.847306639f,  0.531104001f,
-    0.846490939f,  0.532403128f,
-    0.845673247f,  0.533701002f,
-    0.844853565f,  0.534997620f,
-    0.844031895f,  0.536292979f,
-    0.843208240f,  0.537587076f,
-    0.842382600f,  0.538879909f,
-    0.841554977f,  0.540171473f,
-    0.840725375f,  0.541461766f,
-    0.839893794f,  0.542750785f,
-    0.839060237f,  0.544038527f,
-    0.838224706f,  0.545324988f,
-    0.837387202f,  0.546610167f,
-    0.836547727f,  0.547894059f,
-    0.835706284f,  0.549176662f,
-    0.834862875f,  0.550457973f,
-    0.834017501f,  0.551737988f,
-    0.833170165f,  0.553016706f,
-    0.832320868f,  0.554294121f,
-    0.831469612f,  0.555570233f,
-    0.830616400f,  0.556845037f,
-    0.829761234f,  0.558118531f,
-    0.828904115f,  0.559390712f,
-    0.828045045f,  0.560661576f,
-    0.827184027f,  0.561931121f,
-    0.826321063f,  0.563199344f,
-    0.825456154f,  0.564466242f,
-    0.824589303f,  0.565731811f,
-    0.823720511f,  0.566996049f,
-    0.822849781f,  0.568258953f,
-    0.821977115f,  0.569520519f,
-    0.821102515f,  0.570780746f,
-    0.820225983f,  0.572039629f,
-    0.819347520f,  0.573297167f,
-    0.818467130f,  0.574553355f,
-    0.817584813f,  0.575808191f,
-    0.816700573f,  0.577061673f,
-    0.815814411f,  0.578313796f,
-    0.814926329f,  0.579564559f,
-    0.814036330f,  0.580813958f,
-    0.813144415f,  0.582061990f,
-    0.812250587f,  0.583308653f,
-    0.811354847f,  0.584553943f,
-    0.810457198f,  0.585797857f,
-    0.809557642f,  0.587040394f,
-    0.808656182f,  0.588281548f,
-    0.807752818f,  0.589521319f,
-    0.806847554f,  0.590759702f,
-    0.805940391f,  0.591996695f,
-    0.805031331f,  0.593232295f,
-    0.804120377f,  0.594466499f,
-    0.803207531f,  0.595699304f,
-    0.802292796f,  0.596930708f,
-    0.801376172f,  0.598160707f,
-    0.800457662f,  0.599389298f,
-    0.799537269f,  0.600616479f,
-    0.798614995f,  0.601842247f,
-    0.797690841f,  0.603066599f,
-    0.796764810f,  0.604289531f,
-    0.795836905f,  0.605511041f,
-    0.794907126f,  0.606731127f,
-    0.793975478f,  0.607949785f,
-    0.793041960f,  0.609167012f,
-    0.792106577f,  0.610382806f,
-    0.791169330f,  0.611597164f,
-    0.790230221f,  0.612810082f,
-    0.789289253f,  0.614021559f,
-    0.788346428f,  0.615231591f,
-    0.787401747f,  0.616440175f,
-    0.786455214f,  0.617647308f,
-    0.785506830f,  0.618852988f,
-    0.784556597f,  0.620057212f,
-    0.783604519f,  0.621259977f,
-    0.782650596f,  0.622461279f,
-    0.781694832f,  0.623661118f,
-    0.780737229f,  0.624859488f,
-    0.779777788f,  0.626056388f,
-    0.778816512f,  0.627251815f,
-    0.777853404f,  0.628445767f,
-    0.776888466f,  0.629638239f,
-    0.775921699f,  0.630829230f,
-    0.774953107f,  0.632018736f,
-    0.773982691f,  0.633206755f,
-    0.773010453f,  0.634393284f,
-    0.772036397f,  0.635578320f,
-    0.771060524f,  0.636761861f,
-    0.770082837f,  0.637943904f,
-    0.769103338f,  0.639124445f,
-    0.768122029f,  0.640303482f,
-    0.767138912f,  0.641481013f,
-    0.766153990f,  0.642657034f,
-    0.765167266f,  0.643831543f,
-    0.764178741f,  0.645004537f,
-    0.763188417f,  0.646176013f,
-    0.762196298f,  0.647345969f,
-    0.761202385f,  0.648514401f,
-    0.760206682f,  0.649681307f,
-    0.759209189f,  0.650846685f,
-    0.758209910f,  0.652010531f,
-    0.757208847f,  0.653172843f,
-    0.756206001f,  0.654333618f,
-    0.755201377f,  0.655492853f,
-    0.754194975f,  0.656650546f,
-    0.753186799f,  0.657806693f,
-    0.752176850f,  0.658961293f,
-    0.751165132f,  0.660114342f,
-    0.750151646f,  0.661265838f,
-    0.749136395f,  0.662415778f,
-    0.748119380f,  0.663564159f,
-    0.747100606f,  0.664710978f,
-    0.746080074f,  0.665856234f,
-    0.745057785f,  0.666999922f,
-    0.744033744f,  0.668142041f,
-    0.743007952f,  0.669282588f,
-    0.741980412f,  0.670421560f,
-    0.740951125f,  0.671558955f,
-    0.739920095f,  0.672694769f,
-    0.738887324f,  0.673829000f,
-    0.737852815f,  0.674961646f,
-    0.736816569f,  0.676092704f,
-    0.735778589f,  0.677222170f,
-    0.734738878f,  0.678350043f,
-    0.733697438f,  0.679476320f,
-    0.732654272f,  0.680600998f,
-    0.731609381f,  0.681724074f,
-    0.730562769f,  0.682845546f,
-    0.729514438f,  0.683965412f,
-    0.728464390f,  0.685083668f,
-    0.727412629f,  0.686200312f,
-    0.726359155f,  0.687315341f,
-    0.725303972f,  0.688428753f,
-    0.724247083f,  0.689540545f,
-    0.723188489f,  0.690650714f,
-    0.722128194f,  0.691759258f,
-    0.721066199f,  0.692866175f,
-    0.720002508f,  0.693971461f,
-    0.718937122f,  0.695075114f,
-    0.717870045f,  0.696177131f,
-    0.716801279f,  0.697277511f,
-    0.715730825f,  0.698376249f,
-    0.714658688f,  0.699473345f,
-    0.713584869f,  0.700568794f,
-    0.712509371f,  0.701662595f,
-    0.711432196f,  0.702754744f,
-    0.710353347f,  0.703845241f,
-    0.709272826f,  0.704934080f,
-    0.708190637f,  0.706021261f,
-    0.707106781f,  0.707106781f,
-    0.706021261f,  0.708190637f,
-    0.704934080f,  0.709272826f,
-    0.703845241f,  0.710353347f,
-    0.702754744f,  0.711432196f,
-    0.701662595f,  0.712509371f,
-    0.700568794f,  0.713584869f,
-    0.699473345f,  0.714658688f,
-    0.698376249f,  0.715730825f,
-    0.697277511f,  0.716801279f,
-    0.696177131f,  0.717870045f,
-    0.695075114f,  0.718937122f,
-    0.693971461f,  0.720002508f,
-    0.692866175f,  0.721066199f,
-    0.691759258f,  0.722128194f,
-    0.690650714f,  0.723188489f,
-    0.689540545f,  0.724247083f,
-    0.688428753f,  0.725303972f,
-    0.687315341f,  0.726359155f,
-    0.686200312f,  0.727412629f,
-    0.685083668f,  0.728464390f,
-    0.683965412f,  0.729514438f,
-    0.682845546f,  0.730562769f,
-    0.681724074f,  0.731609381f,
-    0.680600998f,  0.732654272f,
-    0.679476320f,  0.733697438f,
-    0.678350043f,  0.734738878f,
-    0.677222170f,  0.735778589f,
-    0.676092704f,  0.736816569f,
-    0.674961646f,  0.737852815f,
-    0.673829000f,  0.738887324f,
-    0.672694769f,  0.739920095f,
-    0.671558955f,  0.740951125f,
-    0.670421560f,  0.741980412f,
-    0.669282588f,  0.743007952f,
-    0.668142041f,  0.744033744f,
-    0.666999922f,  0.745057785f,
-    0.665856234f,  0.746080074f,
-    0.664710978f,  0.747100606f,
-    0.663564159f,  0.748119380f,
-    0.662415778f,  0.749136395f,
-    0.661265838f,  0.750151646f,
-    0.660114342f,  0.751165132f,
-    0.658961293f,  0.752176850f,
-    0.657806693f,  0.753186799f,
-    0.656650546f,  0.754194975f,
-    0.655492853f,  0.755201377f,
-    0.654333618f,  0.756206001f,
-    0.653172843f,  0.757208847f,
-    0.652010531f,  0.758209910f,
-    0.650846685f,  0.759209189f,
-    0.649681307f,  0.760206682f,
-    0.648514401f,  0.761202385f,
-    0.647345969f,  0.762196298f,
-    0.646176013f,  0.763188417f,
-    0.645004537f,  0.764178741f,
-    0.643831543f,  0.765167266f,
-    0.642657034f,  0.766153990f,
-    0.641481013f,  0.767138912f,
-    0.640303482f,  0.768122029f,
-    0.639124445f,  0.769103338f,
-    0.637943904f,  0.770082837f,
-    0.636761861f,  0.771060524f,
-    0.635578320f,  0.772036397f,
-    0.634393284f,  0.773010453f,
-    0.633206755f,  0.773982691f,
-    0.632018736f,  0.774953107f,
-    0.630829230f,  0.775921699f,
-    0.629638239f,  0.776888466f,
-    0.628445767f,  0.777853404f,
-    0.627251815f,  0.778816512f,
-    0.626056388f,  0.779777788f,
-    0.624859488f,  0.780737229f,
-    0.623661118f,  0.781694832f,
-    0.622461279f,  0.782650596f,
-    0.621259977f,  0.783604519f,
-    0.620057212f,  0.784556597f,
-    0.618852988f,  0.785506830f,
-    0.617647308f,  0.786455214f,
-    0.616440175f,  0.787401747f,
-    0.615231591f,  0.788346428f,
-    0.614021559f,  0.789289253f,
-    0.612810082f,  0.790230221f,
-    0.611597164f,  0.791169330f,
-    0.610382806f,  0.792106577f,
-    0.609167012f,  0.793041960f,
-    0.607949785f,  0.793975478f,
-    0.606731127f,  0.794907126f,
-    0.605511041f,  0.795836905f,
-    0.604289531f,  0.796764810f,
-    0.603066599f,  0.797690841f,
-    0.601842247f,  0.798614995f,
-    0.600616479f,  0.799537269f,
-    0.599389298f,  0.800457662f,
-    0.598160707f,  0.801376172f,
-    0.596930708f,  0.802292796f,
-    0.595699304f,  0.803207531f,
-    0.594466499f,  0.804120377f,
-    0.593232295f,  0.805031331f,
-    0.591996695f,  0.805940391f,
-    0.590759702f,  0.806847554f,
-    0.589521319f,  0.807752818f,
-    0.588281548f,  0.808656182f,
-    0.587040394f,  0.809557642f,
-    0.585797857f,  0.810457198f,
-    0.584553943f,  0.811354847f,
-    0.583308653f,  0.812250587f,
-    0.582061990f,  0.813144415f,
-    0.580813958f,  0.814036330f,
-    0.579564559f,  0.814926329f,
-    0.578313796f,  0.815814411f,
-    0.577061673f,  0.816700573f,
-    0.575808191f,  0.817584813f,
-    0.574553355f,  0.818467130f,
-    0.573297167f,  0.819347520f,
-    0.572039629f,  0.820225983f,
-    0.570780746f,  0.821102515f,
-    0.569520519f,  0.821977115f,
-    0.568258953f,  0.822849781f,
-    0.566996049f,  0.823720511f,
-    0.565731811f,  0.824589303f,
-    0.564466242f,  0.825456154f,
-    0.563199344f,  0.826321063f,
-    0.561931121f,  0.827184027f,
-    0.560661576f,  0.828045045f,
-    0.559390712f,  0.828904115f,
-    0.558118531f,  0.829761234f,
-    0.556845037f,  0.830616400f,
-    0.555570233f,  0.831469612f,
-    0.554294121f,  0.832320868f,
-    0.553016706f,  0.833170165f,
-    0.551737988f,  0.834017501f,
-    0.550457973f,  0.834862875f,
-    0.549176662f,  0.835706284f,
-    0.547894059f,  0.836547727f,
-    0.546610167f,  0.837387202f,
-    0.545324988f,  0.838224706f,
-    0.544038527f,  0.839060237f,
-    0.542750785f,  0.839893794f,
-    0.541461766f,  0.840725375f,
-    0.540171473f,  0.841554977f,
-    0.538879909f,  0.842382600f,
-    0.537587076f,  0.843208240f,
-    0.536292979f,  0.844031895f,
-    0.534997620f,  0.844853565f,
-    0.533701002f,  0.845673247f,
-    0.532403128f,  0.846490939f,
-    0.531104001f,  0.847306639f,
-    0.529803625f,  0.848120345f,
-    0.528502002f,  0.848932055f,
-    0.527199135f,  0.849741768f,
-    0.525895027f,  0.850549481f,
-    0.524589683f,  0.851355193f,
-    0.523283103f,  0.852158902f,
-    0.521975293f,  0.852960605f,
-    0.520666254f,  0.853760301f,
-    0.519355990f,  0.854557988f,
-    0.518044504f,  0.855353665f,
-    0.516731799f,  0.856147328f,
-    0.515417878f,  0.856938977f,
-    0.514102744f,  0.857728610f,
-    0.512786401f,  0.858516224f,
-    0.511468850f,  0.859301818f,
-    0.510150097f,  0.860085390f,
-    0.508830143f,  0.860866939f,
-    0.507508991f,  0.861646461f,
-    0.506186645f,  0.862423956f,
-    0.504863109f,  0.863199422f,
-    0.503538384f,  0.863972856f,
-    0.502212474f,  0.864744258f,
-    0.500885383f,  0.865513624f,
-    0.499557113f,  0.866280954f,
-    0.498227667f,  0.867046246f,
-    0.496897049f,  0.867809497f,
-    0.495565262f,  0.868570706f,
-    0.494232309f,  0.869329871f,
-    0.492898192f,  0.870086991f,
-    0.491562916f,  0.870842063f,
-    0.490226483f,  0.871595087f,
-    0.488888897f,  0.872346059f,
-    0.487550160f,  0.873094978f,
-    0.486210276f,  0.873841843f,
-    0.484869248f,  0.874586652f,
-    0.483527079f,  0.875329403f,
-    0.482183772f,  0.876070094f,
-    0.480839331f,  0.876808724f,
-    0.479493758f,  0.877545290f,
-    0.478147056f,  0.878279792f,
-    0.476799230f,  0.879012226f,
-    0.475450282f,  0.879742593f,
-    0.474100215f,  0.880470889f,
-    0.472749032f,  0.881197113f,
-    0.471396737f,  0.881921264f,
-    0.470043332f,  0.882643340f,
-    0.468688822f,  0.883363339f,
-    0.467333209f,  0.884081259f,
-    0.465976496f,  0.884797098f,
-    0.464618686f,  0.885510856f,
-    0.463259784f,  0.886222530f,
-    0.461899791f,  0.886932119f,
-    0.460538711f,  0.887639620f,
-    0.459176548f,  0.888345033f,
-    0.457813304f,  0.889048356f,
-    0.456448982f,  0.889749586f,
-    0.455083587f,  0.890448723f,
-    0.453717121f,  0.891145765f,
-    0.452349587f,  0.891840709f,
-    0.450980989f,  0.892533555f,
-    0.449611330f,  0.893224301f,
-    0.448240612f,  0.893912945f,
-    0.446868840f,  0.894599486f,
-    0.445496017f,  0.895283921f,
-    0.444122145f,  0.895966250f,
-    0.442747228f,  0.896646470f,
-    0.441371269f,  0.897324581f,
-    0.439994271f,  0.898000580f,
-    0.438616239f,  0.898674466f,
-    0.437237174f,  0.899346237f,
-    0.435857080f,  0.900015892f,
-    0.434475961f,  0.900683429f,
-    0.433093819f,  0.901348847f,
-    0.431710658f,  0.902012144f,
-    0.430326481f,  0.902673318f,
-    0.428941292f,  0.903332368f,
-    0.427555093f,  0.903989293f,
-    0.426167889f,  0.904644091f,
-    0.424779681f,  0.905296759f,
-    0.423390474f,  0.905947298f,
-    0.422000271f,  0.906595705f,
-    0.420609074f,  0.907241978f,
-    0.419216888f,  0.907886116f,
-    0.417823716f,  0.908528119f,
-    0.416429560f,  0.909167983f,
-    0.415034424f,  0.909805708f,
-    0.413638312f,  0.910441292f,
-    0.412241227f,  0.911074734f,
-    0.410843171f,  0.911706032f,
-    0.409444149f,  0.912335185f,
-    0.408044163f,  0.912962190f,
-    0.406643217f,  0.913587048f,
-    0.405241314f,  0.914209756f,
-    0.403838458f,  0.914830312f,
-    0.402434651f,  0.915448716f,
-    0.401029897f,  0.916064966f,
-    0.399624200f,  0.916679060f,
-    0.398217562f,  0.917290997f,
-    0.396809987f,  0.917900776f,
-    0.395401479f,  0.918508394f,
-    0.393992040f,  0.919113852f,
-    0.392581674f,  0.919717146f,
-    0.391170384f,  0.920318277f,
-    0.389758174f,  0.920917242f,
-    0.388345047f,  0.921514039f,
-    0.386931006f,  0.922108669f,
-    0.385516054f,  0.922701128f,
-    0.384100195f,  0.923291417f,
-    0.382683432f,  0.923879533f,
-    0.381265769f,  0.924465474f,
-    0.379847209f,  0.925049241f,
-    0.378427755f,  0.925630831f,
-    0.377007410f,  0.926210242f,
-    0.375586178f,  0.926787474f,
-    0.374164063f,  0.927362526f,
-    0.372741067f,  0.927935395f,
-    0.371317194f,  0.928506080f,
-    0.369892447f,  0.929074581f,
-    0.368466830f,  0.929640896f,
-    0.367040346f,  0.930205023f,
-    0.365612998f,  0.930766961f,
-    0.364184790f,  0.931326709f,
-    0.362755724f,  0.931884266f,
-    0.361325806f,  0.932439629f,
-    0.359895037f,  0.932992799f,
-    0.358463421f,  0.933543773f,
-    0.357030961f,  0.934092550f,
-    0.355597662f,  0.934639130f,
-    0.354163525f,  0.935183510f,
-    0.352728556f,  0.935725689f,
-    0.351292756f,  0.936265667f,
-    0.349856130f,  0.936803442f,
-    0.348418680f,  0.937339012f,
-    0.346980411f,  0.937872376f,
-    0.345541325f,  0.938403534f,
-    0.344101426f,  0.938932484f,
-    0.342660717f,  0.939459224f,
-    0.341219202f,  0.939983753f,
-    0.339776884f,  0.940506071f,
-    0.338333767f,  0.941026175f,
-    0.336889853f,  0.941544065f,
-    0.335445147f,  0.942059740f,
-    0.333999651f,  0.942573198f,
-    0.332553370f,  0.943084437f,
-    0.331106306f,  0.943593458f,
-    0.329658463f,  0.944100258f,
-    0.328209844f,  0.944604837f,
-    0.326760452f,  0.945107193f,
-    0.325310292f,  0.945607325f,
-    0.323859367f,  0.946105232f,
-    0.322407679f,  0.946600913f,
-    0.320955232f,  0.947094366f,
-    0.319502031f,  0.947585591f,
-    0.318048077f,  0.948074586f,
-    0.316593376f,  0.948561350f,
-    0.315137929f,  0.949045882f,
-    0.313681740f,  0.949528181f,
-    0.312224814f,  0.950008245f,
-    0.310767153f,  0.950486074f,
-    0.309308760f,  0.950961666f,
-    0.307849640f,  0.951435021f,
-    0.306389795f,  0.951906137f,
-    0.304929230f,  0.952375013f,
-    0.303467947f,  0.952841648f,
-    0.302005949f,  0.953306040f,
-    0.300543241f,  0.953768190f,
-    0.299079826f,  0.954228095f,
-    0.297615707f,  0.954685755f,
-    0.296150888f,  0.955141168f,
-    0.294685372f,  0.955594334f,
-    0.293219163f,  0.956045251f,
-    0.291752263f,  0.956493919f,
-    0.290284677f,  0.956940336f,
-    0.288816408f,  0.957384501f,
-    0.287347460f,  0.957826413f,
-    0.285877835f,  0.958266071f,
-    0.284407537f,  0.958703475f,
-    0.282936570f,  0.959138622f,
-    0.281464938f,  0.959571513f,
-    0.279992643f,  0.960002146f,
-    0.278519689f,  0.960430519f,
-    0.277046080f,  0.960856633f,
-    0.275571819f,  0.961280486f,
-    0.274096910f,  0.961702077f,
-    0.272621355f,  0.962121404f,
-    0.271145160f,  0.962538468f,
-    0.269668326f,  0.962953267f,
-    0.268190857f,  0.963365800f,
-    0.266712757f,  0.963776066f,
-    0.265234030f,  0.964184064f,
-    0.263754679f,  0.964589793f,
-    0.262274707f,  0.964993253f,
-    0.260794118f,  0.965394442f,
-    0.259312915f,  0.965793359f,
-    0.257831102f,  0.966190003f,
-    0.256348682f,  0.966584374f,
-    0.254865660f,  0.966976471f,
-    0.253382037f,  0.967366292f,
-    0.251897818f,  0.967753837f,
-    0.250413007f,  0.968139105f,
-    0.248927606f,  0.968522094f,
-    0.247441619f,  0.968902805f,
-    0.245955050f,  0.969281235f,
-    0.244467903f,  0.969657385f,
-    0.242980180f,  0.970031253f,
-    0.241491885f,  0.970402839f,
-    0.240003022f,  0.970772141f,
-    0.238513595f,  0.971139158f,
-    0.237023606f,  0.971503891f,
-    0.235533059f,  0.971866337f,
-    0.234041959f,  0.972226497f,
-    0.232550307f,  0.972584369f,
-    0.231058108f,  0.972939952f,
-    0.229565366f,  0.973293246f,
-    0.228072083f,  0.973644250f,
-    0.226578264f,  0.973992962f,
-    0.225083911f,  0.974339383f,
-    0.223589029f,  0.974683511f,
-    0.222093621f,  0.975025345f,
-    0.220597690f,  0.975364885f,
-    0.219101240f,  0.975702130f,
-    0.217604275f,  0.976037079f,
-    0.216106797f,  0.976369731f,
-    0.214608811f,  0.976700086f,
-    0.213110320f,  0.977028143f,
-    0.211611327f,  0.977353900f,
-    0.210111837f,  0.977677358f,
-    0.208611852f,  0.977998515f,
-    0.207111376f,  0.978317371f,
-    0.205610413f,  0.978633924f,
-    0.204108966f,  0.978948175f,
-    0.202607039f,  0.979260123f,
-    0.201104635f,  0.979569766f,
-    0.199601758f,  0.979877104f,
-    0.198098411f,  0.980182136f,
-    0.196594598f,  0.980484862f,
-    0.195090322f,  0.980785280f,
-    0.193585587f,  0.981083391f,
-    0.192080397f,  0.981379193f,
-    0.190574755f,  0.981672686f,
-    0.189068664f,  0.981963869f,
-    0.187562129f,  0.982252741f,
-    0.186055152f,  0.982539302f,
-    0.184547737f,  0.982823551f,
-    0.183039888f,  0.983105487f,
-    0.181531608f,  0.983385110f,
-    0.180022901f,  0.983662419f,
-    0.178513771f,  0.983937413f,
-    0.177004220f,  0.984210092f,
-    0.175494253f,  0.984480455f,
-    0.173983873f,  0.984748502f,
-    0.172473084f,  0.985014231f,
-    0.170961889f,  0.985277642f,
-    0.169450291f,  0.985538735f,
-    0.167938295f,  0.985797509f,
-    0.166425904f,  0.986053963f,
-    0.164913120f,  0.986308097f,
-    0.163399949f,  0.986559910f,
-    0.161886394f,  0.986809402f,
-    0.160372457f,  0.987056571f,
-    0.158858143f,  0.987301418f,
-    0.157343456f,  0.987543942f,
-    0.155828398f,  0.987784142f,
-    0.154312973f,  0.988022017f,
-    0.152797185f,  0.988257568f,
-    0.151281038f,  0.988490793f,
-    0.149764535f,  0.988721692f,
-    0.148247679f,  0.988950265f,
-    0.146730474f,  0.989176510f,
-    0.145212925f,  0.989400428f,
-    0.143695033f,  0.989622017f,
-    0.142176804f,  0.989841278f,
-    0.140658239f,  0.990058210f,
-    0.139139344f,  0.990272812f,
-    0.137620122f,  0.990485084f,
-    0.136100575f,  0.990695025f,
-    0.134580709f,  0.990902635f,
-    0.133060525f,  0.991107914f,
-    0.131540029f,  0.991310860f,
-    0.130019223f,  0.991511473f,
-    0.128498111f,  0.991709754f,
-    0.126976696f,  0.991905700f,
-    0.125454983f,  0.992099313f,
-    0.123932975f,  0.992290591f,
-    0.122410675f,  0.992479535f,
-    0.120888087f,  0.992666142f,
-    0.119365215f,  0.992850414f,
-    0.117842062f,  0.993032350f,
-    0.116318631f,  0.993211949f,
-    0.114794927f,  0.993389211f,
-    0.113270952f,  0.993564136f,
-    0.111746711f,  0.993736722f,
-    0.110222207f,  0.993906970f,
-    0.108697444f,  0.994074879f,
-    0.107172425f,  0.994240449f,
-    0.105647154f,  0.994403680f,
-    0.104121634f,  0.994564571f,
-    0.102595869f,  0.994723121f,
-    0.101069863f,  0.994879331f,
-    0.099543619f,  0.995033199f,
-    0.098017140f,  0.995184727f,
-    0.096490431f,  0.995333912f,
-    0.094963495f,  0.995480755f,
-    0.093436336f,  0.995625256f,
-    0.091908956f,  0.995767414f,
-    0.090381361f,  0.995907229f,
-    0.088853553f,  0.996044701f,
-    0.087325535f,  0.996179829f,
-    0.085797312f,  0.996312612f,
-    0.084268888f,  0.996443051f,
-    0.082740265f,  0.996571146f,
-    0.081211447f,  0.996696895f,
-    0.079682438f,  0.996820299f,
-    0.078153242f,  0.996941358f,
-    0.076623861f,  0.997060070f,
-    0.075094301f,  0.997176437f,
-    0.073564564f,  0.997290457f,
-    0.072034653f,  0.997402130f,
-    0.070504573f,  0.997511456f,
-    0.068974328f,  0.997618435f,
-    0.067443920f,  0.997723067f,
-    0.065913353f,  0.997825350f,
-    0.064382631f,  0.997925286f,
-    0.062851758f,  0.998022874f,
-    0.061320736f,  0.998118113f,
-    0.059789571f,  0.998211003f,
-    0.058258265f,  0.998301545f,
-    0.056726821f,  0.998389737f,
-    0.055195244f,  0.998475581f,
-    0.053663538f,  0.998559074f,
-    0.052131705f,  0.998640218f,
-    0.050599749f,  0.998719012f,
-    0.049067674f,  0.998795456f,
-    0.047535484f,  0.998869550f,
-    0.046003182f,  0.998941293f,
-    0.044470772f,  0.999010686f,
-    0.042938257f,  0.999077728f,
-    0.041405641f,  0.999142419f,
-    0.039872928f,  0.999204759f,
-    0.038340120f,  0.999264747f,
-    0.036807223f,  0.999322385f,
-    0.035274239f,  0.999377670f,
-    0.033741172f,  0.999430605f,
-    0.032208025f,  0.999481187f,
-    0.030674803f,  0.999529418f,
-    0.029141509f,  0.999575296f,
-    0.027608146f,  0.999618822f,
-    0.026074718f,  0.999659997f,
-    0.024541229f,  0.999698819f,
-    0.023007681f,  0.999735288f,
-    0.021474080f,  0.999769405f,
-    0.019940429f,  0.999801170f,
-    0.018406730f,  0.999830582f,
-    0.016872988f,  0.999857641f,
-    0.015339206f,  0.999882347f,
-    0.013805389f,  0.999904701f,
-    0.012271538f,  0.999924702f,
-    0.010737659f,  0.999942350f,
-    0.009203755f,  0.999957645f,
-    0.007669829f,  0.999970586f,
-    0.006135885f,  0.999981175f,
-    0.004601926f,  0.999989411f,
-    0.003067957f,  0.999995294f,
-    0.001533980f,  0.999998823f,
-    0.000000000f,  1.000000000f,
-   -0.001533980f,  0.999998823f,
-   -0.003067957f,  0.999995294f,
-   -0.004601926f,  0.999989411f,
-   -0.006135885f,  0.999981175f,
-   -0.007669829f,  0.999970586f,
-   -0.009203755f,  0.999957645f,
-   -0.010737659f,  0.999942350f,
-   -0.012271538f,  0.999924702f,
-   -0.013805389f,  0.999904701f,
-   -0.015339206f,  0.999882347f,
-   -0.016872988f,  0.999857641f,
-   -0.018406730f,  0.999830582f,
-   -0.019940429f,  0.999801170f,
-   -0.021474080f,  0.999769405f,
-   -0.023007681f,  0.999735288f,
-   -0.024541229f,  0.999698819f,
-   -0.026074718f,  0.999659997f,
-   -0.027608146f,  0.999618822f,
-   -0.029141509f,  0.999575296f,
-   -0.030674803f,  0.999529418f,
-   -0.032208025f,  0.999481187f,
-   -0.033741172f,  0.999430605f,
-   -0.035274239f,  0.999377670f,
-   -0.036807223f,  0.999322385f,
-   -0.038340120f,  0.999264747f,
-   -0.039872928f,  0.999204759f,
-   -0.041405641f,  0.999142419f,
-   -0.042938257f,  0.999077728f,
-   -0.044470772f,  0.999010686f,
-   -0.046003182f,  0.998941293f,
-   -0.047535484f,  0.998869550f,
-   -0.049067674f,  0.998795456f,
-   -0.050599749f,  0.998719012f,
-   -0.052131705f,  0.998640218f,
-   -0.053663538f,  0.998559074f,
-   -0.055195244f,  0.998475581f,
-   -0.056726821f,  0.998389737f,
-   -0.058258265f,  0.998301545f,
-   -0.059789571f,  0.998211003f,
-   -0.061320736f,  0.998118113f,
-   -0.062851758f,  0.998022874f,
-   -0.064382631f,  0.997925286f,
-   -0.065913353f,  0.997825350f,
-   -0.067443920f,  0.997723067f,
-   -0.068974328f,  0.997618435f,
-   -0.070504573f,  0.997511456f,
-   -0.072034653f,  0.997402130f,
-   -0.073564564f,  0.997290457f,
-   -0.075094301f,  0.997176437f,
-   -0.076623861f,  0.997060070f,
-   -0.078153242f,  0.996941358f,
-   -0.079682438f,  0.996820299f,
-   -0.081211447f,  0.996696895f,
-   -0.082740265f,  0.996571146f,
-   -0.084268888f,  0.996443051f,
-   -0.085797312f,  0.996312612f,
-   -0.087325535f,  0.996179829f,
-   -0.088853553f,  0.996044701f,
-   -0.090381361f,  0.995907229f,
-   -0.091908956f,  0.995767414f,
-   -0.093436336f,  0.995625256f,
-   -0.094963495f,  0.995480755f,
-   -0.096490431f,  0.995333912f,
-   -0.098017140f,  0.995184727f,
-   -0.099543619f,  0.995033199f,
-   -0.101069863f,  0.994879331f,
-   -0.102595869f,  0.994723121f,
-   -0.104121634f,  0.994564571f,
-   -0.105647154f,  0.994403680f,
-   -0.107172425f,  0.994240449f,
-   -0.108697444f,  0.994074879f,
-   -0.110222207f,  0.993906970f,
-   -0.111746711f,  0.993736722f,
-   -0.113270952f,  0.993564136f,
-   -0.114794927f,  0.993389211f,
-   -0.116318631f,  0.993211949f,
-   -0.117842062f,  0.993032350f,
-   -0.119365215f,  0.992850414f,
-   -0.120888087f,  0.992666142f,
-   -0.122410675f,  0.992479535f,
-   -0.123932975f,  0.992290591f,
-   -0.125454983f,  0.992099313f,
-   -0.126976696f,  0.991905700f,
-   -0.128498111f,  0.991709754f,
-   -0.130019223f,  0.991511473f,
-   -0.131540029f,  0.991310860f,
-   -0.133060525f,  0.991107914f,
-   -0.134580709f,  0.990902635f,
-   -0.136100575f,  0.990695025f,
-   -0.137620122f,  0.990485084f,
-   -0.139139344f,  0.990272812f,
-   -0.140658239f,  0.990058210f,
-   -0.142176804f,  0.989841278f,
-   -0.143695033f,  0.989622017f,
-   -0.145212925f,  0.989400428f,
-   -0.146730474f,  0.989176510f,
-   -0.148247679f,  0.988950265f,
-   -0.149764535f,  0.988721692f,
-   -0.151281038f,  0.988490793f,
-   -0.152797185f,  0.988257568f,
-   -0.154312973f,  0.988022017f,
-   -0.155828398f,  0.987784142f,
-   -0.157343456f,  0.987543942f,
-   -0.158858143f,  0.987301418f,
-   -0.160372457f,  0.987056571f,
-   -0.161886394f,  0.986809402f,
-   -0.163399949f,  0.986559910f,
-   -0.164913120f,  0.986308097f,
-   -0.166425904f,  0.986053963f,
-   -0.167938295f,  0.985797509f,
-   -0.169450291f,  0.985538735f,
-   -0.170961889f,  0.985277642f,
-   -0.172473084f,  0.985014231f,
-   -0.173983873f,  0.984748502f,
-   -0.175494253f,  0.984480455f,
-   -0.177004220f,  0.984210092f,
-   -0.178513771f,  0.983937413f,
-   -0.180022901f,  0.983662419f,
-   -0.181531608f,  0.983385110f,
-   -0.183039888f,  0.983105487f,
-   -0.184547737f,  0.982823551f,
-   -0.186055152f,  0.982539302f,
-   -0.187562129f,  0.982252741f,
-   -0.189068664f,  0.981963869f,
-   -0.190574755f,  0.981672686f,
-   -0.192080397f,  0.981379193f,
-   -0.193585587f,  0.981083391f,
-   -0.195090322f,  0.980785280f,
-   -0.196594598f,  0.980484862f,
-   -0.198098411f,  0.980182136f,
-   -0.199601758f,  0.979877104f,
-   -0.201104635f,  0.979569766f,
-   -0.202607039f,  0.979260123f,
-   -0.204108966f,  0.978948175f,
-   -0.205610413f,  0.978633924f,
-   -0.207111376f,  0.978317371f,
-   -0.208611852f,  0.977998515f,
-   -0.210111837f,  0.977677358f,
-   -0.211611327f,  0.977353900f,
-   -0.213110320f,  0.977028143f,
-   -0.214608811f,  0.976700086f,
-   -0.216106797f,  0.976369731f,
-   -0.217604275f,  0.976037079f,
-   -0.219101240f,  0.975702130f,
-   -0.220597690f,  0.975364885f,
-   -0.222093621f,  0.975025345f,
-   -0.223589029f,  0.974683511f,
-   -0.225083911f,  0.974339383f,
-   -0.226578264f,  0.973992962f,
-   -0.228072083f,  0.973644250f,
-   -0.229565366f,  0.973293246f,
-   -0.231058108f,  0.972939952f,
-   -0.232550307f,  0.972584369f,
-   -0.234041959f,  0.972226497f,
-   -0.235533059f,  0.971866337f,
-   -0.237023606f,  0.971503891f,
-   -0.238513595f,  0.971139158f,
-   -0.240003022f,  0.970772141f,
-   -0.241491885f,  0.970402839f,
-   -0.242980180f,  0.970031253f,
-   -0.244467903f,  0.969657385f,
-   -0.245955050f,  0.969281235f,
-   -0.247441619f,  0.968902805f,
-   -0.248927606f,  0.968522094f,
-   -0.250413007f,  0.968139105f,
-   -0.251897818f,  0.967753837f,
-   -0.253382037f,  0.967366292f,
-   -0.254865660f,  0.966976471f,
-   -0.256348682f,  0.966584374f,
-   -0.257831102f,  0.966190003f,
-   -0.259312915f,  0.965793359f,
-   -0.260794118f,  0.965394442f,
-   -0.262274707f,  0.964993253f,
-   -0.263754679f,  0.964589793f,
-   -0.265234030f,  0.964184064f,
-   -0.266712757f,  0.963776066f,
-   -0.268190857f,  0.963365800f,
-   -0.269668326f,  0.962953267f,
-   -0.271145160f,  0.962538468f,
-   -0.272621355f,  0.962121404f,
-   -0.274096910f,  0.961702077f,
-   -0.275571819f,  0.961280486f,
-   -0.277046080f,  0.960856633f,
-   -0.278519689f,  0.960430519f,
-   -0.279992643f,  0.960002146f,
-   -0.281464938f,  0.959571513f,
-   -0.282936570f,  0.959138622f,
-   -0.284407537f,  0.958703475f,
-   -0.285877835f,  0.958266071f,
-   -0.287347460f,  0.957826413f,
-   -0.288816408f,  0.957384501f,
-   -0.290284677f,  0.956940336f,
-   -0.291752263f,  0.956493919f,
-   -0.293219163f,  0.956045251f,
-   -0.294685372f,  0.955594334f,
-   -0.296150888f,  0.955141168f,
-   -0.297615707f,  0.954685755f,
-   -0.299079826f,  0.954228095f,
-   -0.300543241f,  0.953768190f,
-   -0.302005949f,  0.953306040f,
-   -0.303467947f,  0.952841648f,
-   -0.304929230f,  0.952375013f,
-   -0.306389795f,  0.951906137f,
-   -0.307849640f,  0.951435021f,
-   -0.309308760f,  0.950961666f,
-   -0.310767153f,  0.950486074f,
-   -0.312224814f,  0.950008245f,
-   -0.313681740f,  0.949528181f,
-   -0.315137929f,  0.949045882f,
-   -0.316593376f,  0.948561350f,
-   -0.318048077f,  0.948074586f,
-   -0.319502031f,  0.947585591f,
-   -0.320955232f,  0.947094366f,
-   -0.322407679f,  0.946600913f,
-   -0.323859367f,  0.946105232f,
-   -0.325310292f,  0.945607325f,
-   -0.326760452f,  0.945107193f,
-   -0.328209844f,  0.944604837f,
-   -0.329658463f,  0.944100258f,
-   -0.331106306f,  0.943593458f,
-   -0.332553370f,  0.943084437f,
-   -0.333999651f,  0.942573198f,
-   -0.335445147f,  0.942059740f,
-   -0.336889853f,  0.941544065f,
-   -0.338333767f,  0.941026175f,
-   -0.339776884f,  0.940506071f,
-   -0.341219202f,  0.939983753f,
-   -0.342660717f,  0.939459224f,
-   -0.344101426f,  0.938932484f,
-   -0.345541325f,  0.938403534f,
-   -0.346980411f,  0.937872376f,
-   -0.348418680f,  0.937339012f,
-   -0.349856130f,  0.936803442f,
-   -0.351292756f,  0.936265667f,
-   -0.352728556f,  0.935725689f,
-   -0.354163525f,  0.935183510f,
-   -0.355597662f,  0.934639130f,
-   -0.357030961f,  0.934092550f,
-   -0.358463421f,  0.933543773f,
-   -0.359895037f,  0.932992799f,
-   -0.361325806f,  0.932439629f,
-   -0.362755724f,  0.931884266f,
-   -0.364184790f,  0.931326709f,
-   -0.365612998f,  0.930766961f,
-   -0.367040346f,  0.930205023f,
-   -0.368466830f,  0.929640896f,
-   -0.369892447f,  0.929074581f,
-   -0.371317194f,  0.928506080f,
-   -0.372741067f,  0.927935395f,
-   -0.374164063f,  0.927362526f,
-   -0.375586178f,  0.926787474f,
-   -0.377007410f,  0.926210242f,
-   -0.378427755f,  0.925630831f,
-   -0.379847209f,  0.925049241f,
-   -0.381265769f,  0.924465474f,
-   -0.382683432f,  0.923879533f,
-   -0.384100195f,  0.923291417f,
-   -0.385516054f,  0.922701128f,
-   -0.386931006f,  0.922108669f,
-   -0.388345047f,  0.921514039f,
-   -0.389758174f,  0.920917242f,
-   -0.391170384f,  0.920318277f,
-   -0.392581674f,  0.919717146f,
-   -0.393992040f,  0.919113852f,
-   -0.395401479f,  0.918508394f,
-   -0.396809987f,  0.917900776f,
-   -0.398217562f,  0.917290997f,
-   -0.399624200f,  0.916679060f,
-   -0.401029897f,  0.916064966f,
-   -0.402434651f,  0.915448716f,
-   -0.403838458f,  0.914830312f,
-   -0.405241314f,  0.914209756f,
-   -0.406643217f,  0.913587048f,
-   -0.408044163f,  0.912962190f,
-   -0.409444149f,  0.912335185f,
-   -0.410843171f,  0.911706032f,
-   -0.412241227f,  0.911074734f,
-   -0.413638312f,  0.910441292f,
-   -0.415034424f,  0.909805708f,
-   -0.416429560f,  0.909167983f,
-   -0.417823716f,  0.908528119f,
-   -0.419216888f,  0.907886116f,
-   -0.420609074f,  0.907241978f,
-   -0.422000271f,  0.906595705f,
-   -0.423390474f,  0.905947298f,
-   -0.424779681f,  0.905296759f,
-   -0.426167889f,  0.904644091f,
-   -0.427555093f,  0.903989293f,
-   -0.428941292f,  0.903332368f,
-   -0.430326481f,  0.902673318f,
-   -0.431710658f,  0.902012144f,
-   -0.433093819f,  0.901348847f,
-   -0.434475961f,  0.900683429f,
-   -0.435857080f,  0.900015892f,
-   -0.437237174f,  0.899346237f,
-   -0.438616239f,  0.898674466f,
-   -0.439994271f,  0.898000580f,
-   -0.441371269f,  0.897324581f,
-   -0.442747228f,  0.896646470f,
-   -0.444122145f,  0.895966250f,
-   -0.445496017f,  0.895283921f,
-   -0.446868840f,  0.894599486f,
-   -0.448240612f,  0.893912945f,
-   -0.449611330f,  0.893224301f,
-   -0.450980989f,  0.892533555f,
-   -0.452349587f,  0.891840709f,
-   -0.453717121f,  0.891145765f,
-   -0.455083587f,  0.890448723f,
-   -0.456448982f,  0.889749586f,
-   -0.457813304f,  0.889048356f,
-   -0.459176548f,  0.888345033f,
-   -0.460538711f,  0.887639620f,
-   -0.461899791f,  0.886932119f,
-   -0.463259784f,  0.886222530f,
-   -0.464618686f,  0.885510856f,
-   -0.465976496f,  0.884797098f,
-   -0.467333209f,  0.884081259f,
-   -0.468688822f,  0.883363339f,
-   -0.470043332f,  0.882643340f,
-   -0.471396737f,  0.881921264f,
-   -0.472749032f,  0.881197113f,
-   -0.474100215f,  0.880470889f,
-   -0.475450282f,  0.879742593f,
-   -0.476799230f,  0.879012226f,
-   -0.478147056f,  0.878279792f,
-   -0.479493758f,  0.877545290f,
-   -0.480839331f,  0.876808724f,
-   -0.482183772f,  0.876070094f,
-   -0.483527079f,  0.875329403f,
-   -0.484869248f,  0.874586652f,
-   -0.486210276f,  0.873841843f,
-   -0.487550160f,  0.873094978f,
-   -0.488888897f,  0.872346059f,
-   -0.490226483f,  0.871595087f,
-   -0.491562916f,  0.870842063f,
-   -0.492898192f,  0.870086991f,
-   -0.494232309f,  0.869329871f,
-   -0.495565262f,  0.868570706f,
-   -0.496897049f,  0.867809497f,
-   -0.498227667f,  0.867046246f,
-   -0.499557113f,  0.866280954f,
-   -0.500885383f,  0.865513624f,
-   -0.502212474f,  0.864744258f,
-   -0.503538384f,  0.863972856f,
-   -0.504863109f,  0.863199422f,
-   -0.506186645f,  0.862423956f,
-   -0.507508991f,  0.861646461f,
-   -0.508830143f,  0.860866939f,
-   -0.510150097f,  0.860085390f,
-   -0.511468850f,  0.859301818f,
-   -0.512786401f,  0.858516224f,
-   -0.514102744f,  0.857728610f,
-   -0.515417878f,  0.856938977f,
-   -0.516731799f,  0.856147328f,
-   -0.518044504f,  0.855353665f,
-   -0.519355990f,  0.854557988f,
-   -0.520666254f,  0.853760301f,
-   -0.521975293f,  0.852960605f,
-   -0.523283103f,  0.852158902f,
-   -0.524589683f,  0.851355193f,
-   -0.525895027f,  0.850549481f,
-   -0.527199135f,  0.849741768f,
-   -0.528502002f,  0.848932055f,
-   -0.529803625f,  0.848120345f,
-   -0.531104001f,  0.847306639f,
-   -0.532403128f,  0.846490939f,
-   -0.533701002f,  0.845673247f,
-   -0.534997620f,  0.844853565f,
-   -0.536292979f,  0.844031895f,
-   -0.537587076f,  0.843208240f,
-   -0.538879909f,  0.842382600f,
-   -0.540171473f,  0.841554977f,
-   -0.541461766f,  0.840725375f,
-   -0.542750785f,  0.839893794f,
-   -0.544038527f,  0.839060237f,
-   -0.545324988f,  0.838224706f,
-   -0.546610167f,  0.837387202f,
-   -0.547894059f,  0.836547727f,
-   -0.549176662f,  0.835706284f,
-   -0.550457973f,  0.834862875f,
-   -0.551737988f,  0.834017501f,
-   -0.553016706f,  0.833170165f,
-   -0.554294121f,  0.832320868f,
-   -0.555570233f,  0.831469612f,
-   -0.556845037f,  0.830616400f,
-   -0.558118531f,  0.829761234f,
-   -0.559390712f,  0.828904115f,
-   -0.560661576f,  0.828045045f,
-   -0.561931121f,  0.827184027f,
-   -0.563199344f,  0.826321063f,
-   -0.564466242f,  0.825456154f,
-   -0.565731811f,  0.824589303f,
-   -0.566996049f,  0.823720511f,
-   -0.568258953f,  0.822849781f,
-   -0.569520519f,  0.821977115f,
-   -0.570780746f,  0.821102515f,
-   -0.572039629f,  0.820225983f,
-   -0.573297167f,  0.819347520f,
-   -0.574553355f,  0.818467130f,
-   -0.575808191f,  0.817584813f,
-   -0.577061673f,  0.816700573f,
-   -0.578313796f,  0.815814411f,
-   -0.579564559f,  0.814926329f,
-   -0.580813958f,  0.814036330f,
-   -0.582061990f,  0.813144415f,
-   -0.583308653f,  0.812250587f,
-   -0.584553943f,  0.811354847f,
-   -0.585797857f,  0.810457198f,
-   -0.587040394f,  0.809557642f,
-   -0.588281548f,  0.808656182f,
-   -0.589521319f,  0.807752818f,
-   -0.590759702f,  0.806847554f,
-   -0.591996695f,  0.805940391f,
-   -0.593232295f,  0.805031331f,
-   -0.594466499f,  0.804120377f,
-   -0.595699304f,  0.803207531f,
-   -0.596930708f,  0.802292796f,
-   -0.598160707f,  0.801376172f,
-   -0.599389298f,  0.800457662f,
-   -0.600616479f,  0.799537269f,
-   -0.601842247f,  0.798614995f,
-   -0.603066599f,  0.797690841f,
-   -0.604289531f,  0.796764810f,
-   -0.605511041f,  0.795836905f,
-   -0.606731127f,  0.794907126f,
-   -0.607949785f,  0.793975478f,
-   -0.609167012f,  0.793041960f,
-   -0.610382806f,  0.792106577f,
-   -0.611597164f,  0.791169330f,
-   -0.612810082f,  0.790230221f,
-   -0.614021559f,  0.789289253f,
-   -0.615231591f,  0.788346428f,
-   -0.616440175f,  0.787401747f,
-   -0.617647308f,  0.786455214f,
-   -0.618852988f,  0.785506830f,
-   -0.620057212f,  0.784556597f,
-   -0.621259977f,  0.783604519f,
-   -0.622461279f,  0.782650596f,
-   -0.623661118f,  0.781694832f,
-   -0.624859488f,  0.780737229f,
-   -0.626056388f,  0.779777788f,
-   -0.627251815f,  0.778816512f,
-   -0.628445767f,  0.777853404f,
-   -0.629638239f,  0.776888466f,
-   -0.630829230f,  0.775921699f,
-   -0.632018736f,  0.774953107f,
-   -0.633206755f,  0.773982691f,
-   -0.634393284f,  0.773010453f,
-   -0.635578320f,  0.772036397f,
-   -0.636761861f,  0.771060524f,
-   -0.637943904f,  0.770082837f,
-   -0.639124445f,  0.769103338f,
-   -0.640303482f,  0.768122029f,
-   -0.641481013f,  0.767138912f,
-   -0.642657034f,  0.766153990f,
-   -0.643831543f,  0.765167266f,
-   -0.645004537f,  0.764178741f,
-   -0.646176013f,  0.763188417f,
-   -0.647345969f,  0.762196298f,
-   -0.648514401f,  0.761202385f,
-   -0.649681307f,  0.760206682f,
-   -0.650846685f,  0.759209189f,
-   -0.652010531f,  0.758209910f,
-   -0.653172843f,  0.757208847f,
-   -0.654333618f,  0.756206001f,
-   -0.655492853f,  0.755201377f,
-   -0.656650546f,  0.754194975f,
-   -0.657806693f,  0.753186799f,
-   -0.658961293f,  0.752176850f,
-   -0.660114342f,  0.751165132f,
-   -0.661265838f,  0.750151646f,
-   -0.662415778f,  0.749136395f,
-   -0.663564159f,  0.748119380f,
-   -0.664710978f,  0.747100606f,
-   -0.665856234f,  0.746080074f,
-   -0.666999922f,  0.745057785f,
-   -0.668142041f,  0.744033744f,
-   -0.669282588f,  0.743007952f,
-   -0.670421560f,  0.741980412f,
-   -0.671558955f,  0.740951125f,
-   -0.672694769f,  0.739920095f,
-   -0.673829000f,  0.738887324f,
-   -0.674961646f,  0.737852815f,
-   -0.676092704f,  0.736816569f,
-   -0.677222170f,  0.735778589f,
-   -0.678350043f,  0.734738878f,
-   -0.679476320f,  0.733697438f,
-   -0.680600998f,  0.732654272f,
-   -0.681724074f,  0.731609381f,
-   -0.682845546f,  0.730562769f,
-   -0.683965412f,  0.729514438f,
-   -0.685083668f,  0.728464390f,
-   -0.686200312f,  0.727412629f,
-   -0.687315341f,  0.726359155f,
-   -0.688428753f,  0.725303972f,
-   -0.689540545f,  0.724247083f,
-   -0.690650714f,  0.723188489f,
-   -0.691759258f,  0.722128194f,
-   -0.692866175f,  0.721066199f,
-   -0.693971461f,  0.720002508f,
-   -0.695075114f,  0.718937122f,
-   -0.696177131f,  0.717870045f,
-   -0.697277511f,  0.716801279f,
-   -0.698376249f,  0.715730825f,
-   -0.699473345f,  0.714658688f,
-   -0.700568794f,  0.713584869f,
-   -0.701662595f,  0.712509371f,
-   -0.702754744f,  0.711432196f,
-   -0.703845241f,  0.710353347f,
-   -0.704934080f,  0.709272826f,
-   -0.706021261f,  0.708190637f,
-   -0.707106781f,  0.707106781f,
-   -0.708190637f,  0.706021261f,
-   -0.709272826f,  0.704934080f,
-   -0.710353347f,  0.703845241f,
-   -0.711432196f,  0.702754744f,
-   -0.712509371f,  0.701662595f,
-   -0.713584869f,  0.700568794f,
-   -0.714658688f,  0.699473345f,
-   -0.715730825f,  0.698376249f,
-   -0.716801279f,  0.697277511f,
-   -0.717870045f,  0.696177131f,
-   -0.718937122f,  0.695075114f,
-   -0.720002508f,  0.693971461f,
-   -0.721066199f,  0.692866175f,
-   -0.722128194f,  0.691759258f,
-   -0.723188489f,  0.690650714f,
-   -0.724247083f,  0.689540545f,
-   -0.725303972f,  0.688428753f,
-   -0.726359155f,  0.687315341f,
-   -0.727412629f,  0.686200312f,
-   -0.728464390f,  0.685083668f,
-   -0.729514438f,  0.683965412f,
-   -0.730562769f,  0.682845546f,
-   -0.731609381f,  0.681724074f,
-   -0.732654272f,  0.680600998f,
-   -0.733697438f,  0.679476320f,
-   -0.734738878f,  0.678350043f,
-   -0.735778589f,  0.677222170f,
-   -0.736816569f,  0.676092704f,
-   -0.737852815f,  0.674961646f,
-   -0.738887324f,  0.673829000f,
-   -0.739920095f,  0.672694769f,
-   -0.740951125f,  0.671558955f,
-   -0.741980412f,  0.670421560f,
-   -0.743007952f,  0.669282588f,
-   -0.744033744f,  0.668142041f,
-   -0.745057785f,  0.666999922f,
-   -0.746080074f,  0.665856234f,
-   -0.747100606f,  0.664710978f,
-   -0.748119380f,  0.663564159f,
-   -0.749136395f,  0.662415778f,
-   -0.750151646f,  0.661265838f,
-   -0.751165132f,  0.660114342f,
-   -0.752176850f,  0.658961293f,
-   -0.753186799f,  0.657806693f,
-   -0.754194975f,  0.656650546f,
-   -0.755201377f,  0.655492853f,
-   -0.756206001f,  0.654333618f,
-   -0.757208847f,  0.653172843f,
-   -0.758209910f,  0.652010531f,
-   -0.759209189f,  0.650846685f,
-   -0.760206682f,  0.649681307f,
-   -0.761202385f,  0.648514401f,
-   -0.762196298f,  0.647345969f,
-   -0.763188417f,  0.646176013f,
-   -0.764178741f,  0.645004537f,
-   -0.765167266f,  0.643831543f,
-   -0.766153990f,  0.642657034f,
-   -0.767138912f,  0.641481013f,
-   -0.768122029f,  0.640303482f,
-   -0.769103338f,  0.639124445f,
-   -0.770082837f,  0.637943904f,
-   -0.771060524f,  0.636761861f,
-   -0.772036397f,  0.635578320f,
-   -0.773010453f,  0.634393284f,
-   -0.773982691f,  0.633206755f,
-   -0.774953107f,  0.632018736f,
-   -0.775921699f,  0.630829230f,
-   -0.776888466f,  0.629638239f,
-   -0.777853404f,  0.628445767f,
-   -0.778816512f,  0.627251815f,
-   -0.779777788f,  0.626056388f,
-   -0.780737229f,  0.624859488f,
-   -0.781694832f,  0.623661118f,
-   -0.782650596f,  0.622461279f,
-   -0.783604519f,  0.621259977f,
-   -0.784556597f,  0.620057212f,
-   -0.785506830f,  0.618852988f,
-   -0.786455214f,  0.617647308f,
-   -0.787401747f,  0.616440175f,
-   -0.788346428f,  0.615231591f,
-   -0.789289253f,  0.614021559f,
-   -0.790230221f,  0.612810082f,
-   -0.791169330f,  0.611597164f,
-   -0.792106577f,  0.610382806f,
-   -0.793041960f,  0.609167012f,
-   -0.793975478f,  0.607949785f,
-   -0.794907126f,  0.606731127f,
-   -0.795836905f,  0.605511041f,
-   -0.796764810f,  0.604289531f,
-   -0.797690841f,  0.603066599f,
-   -0.798614995f,  0.601842247f,
-   -0.799537269f,  0.600616479f,
-   -0.800457662f,  0.599389298f,
-   -0.801376172f,  0.598160707f,
-   -0.802292796f,  0.596930708f,
-   -0.803207531f,  0.595699304f,
-   -0.804120377f,  0.594466499f,
-   -0.805031331f,  0.593232295f,
-   -0.805940391f,  0.591996695f,
-   -0.806847554f,  0.590759702f,
-   -0.807752818f,  0.589521319f,
-   -0.808656182f,  0.588281548f,
-   -0.809557642f,  0.587040394f,
-   -0.810457198f,  0.585797857f,
-   -0.811354847f,  0.584553943f,
-   -0.812250587f,  0.583308653f,
-   -0.813144415f,  0.582061990f,
-   -0.814036330f,  0.580813958f,
-   -0.814926329f,  0.579564559f,
-   -0.815814411f,  0.578313796f,
-   -0.816700573f,  0.577061673f,
-   -0.817584813f,  0.575808191f,
-   -0.818467130f,  0.574553355f,
-   -0.819347520f,  0.573297167f,
-   -0.820225983f,  0.572039629f,
-   -0.821102515f,  0.570780746f,
-   -0.821977115f,  0.569520519f,
-   -0.822849781f,  0.568258953f,
-   -0.823720511f,  0.566996049f,
-   -0.824589303f,  0.565731811f,
-   -0.825456154f,  0.564466242f,
-   -0.826321063f,  0.563199344f,
-   -0.827184027f,  0.561931121f,
-   -0.828045045f,  0.560661576f,
-   -0.828904115f,  0.559390712f,
-   -0.829761234f,  0.558118531f,
-   -0.830616400f,  0.556845037f,
-   -0.831469612f,  0.555570233f,
-   -0.832320868f,  0.554294121f,
-   -0.833170165f,  0.553016706f,
-   -0.834017501f,  0.551737988f,
-   -0.834862875f,  0.550457973f,
-   -0.835706284f,  0.549176662f,
-   -0.836547727f,  0.547894059f,
-   -0.837387202f,  0.546610167f,
-   -0.838224706f,  0.545324988f,
-   -0.839060237f,  0.544038527f,
-   -0.839893794f,  0.542750785f,
-   -0.840725375f,  0.541461766f,
-   -0.841554977f,  0.540171473f,
-   -0.842382600f,  0.538879909f,
-   -0.843208240f,  0.537587076f,
-   -0.844031895f,  0.536292979f,
-   -0.844853565f,  0.534997620f,
-   -0.845673247f,  0.533701002f,
-   -0.846490939f,  0.532403128f,
-   -0.847306639f,  0.531104001f,
-   -0.848120345f,  0.529803625f,
-   -0.848932055f,  0.528502002f,
-   -0.849741768f,  0.527199135f,
-   -0.850549481f,  0.525895027f,
-   -0.851355193f,  0.524589683f,
-   -0.852158902f,  0.523283103f,
-   -0.852960605f,  0.521975293f,
-   -0.853760301f,  0.520666254f,
-   -0.854557988f,  0.519355990f,
-   -0.855353665f,  0.518044504f,
-   -0.856147328f,  0.516731799f,
-   -0.856938977f,  0.515417878f,
-   -0.857728610f,  0.514102744f,
-   -0.858516224f,  0.512786401f,
-   -0.859301818f,  0.511468850f,
-   -0.860085390f,  0.510150097f,
-   -0.860866939f,  0.508830143f,
-   -0.861646461f,  0.507508991f,
-   -0.862423956f,  0.506186645f,
-   -0.863199422f,  0.504863109f,
-   -0.863972856f,  0.503538384f,
-   -0.864744258f,  0.502212474f,
-   -0.865513624f,  0.500885383f,
-   -0.866280954f,  0.499557113f,
-   -0.867046246f,  0.498227667f,
-   -0.867809497f,  0.496897049f,
-   -0.868570706f,  0.495565262f,
-   -0.869329871f,  0.494232309f,
-   -0.870086991f,  0.492898192f,
-   -0.870842063f,  0.491562916f,
-   -0.871595087f,  0.490226483f,
-   -0.872346059f,  0.488888897f,
-   -0.873094978f,  0.487550160f,
-   -0.873841843f,  0.486210276f,
-   -0.874586652f,  0.484869248f,
-   -0.875329403f,  0.483527079f,
-   -0.876070094f,  0.482183772f,
-   -0.876808724f,  0.480839331f,
-   -0.877545290f,  0.479493758f,
-   -0.878279792f,  0.478147056f,
-   -0.879012226f,  0.476799230f,
-   -0.879742593f,  0.475450282f,
-   -0.880470889f,  0.474100215f,
-   -0.881197113f,  0.472749032f,
-   -0.881921264f,  0.471396737f,
-   -0.882643340f,  0.470043332f,
-   -0.883363339f,  0.468688822f,
-   -0.884081259f,  0.467333209f,
-   -0.884797098f,  0.465976496f,
-   -0.885510856f,  0.464618686f,
-   -0.886222530f,  0.463259784f,
-   -0.886932119f,  0.461899791f,
-   -0.887639620f,  0.460538711f,
-   -0.888345033f,  0.459176548f,
-   -0.889048356f,  0.457813304f,
-   -0.889749586f,  0.456448982f,
-   -0.890448723f,  0.455083587f,
-   -0.891145765f,  0.453717121f,
-   -0.891840709f,  0.452349587f,
-   -0.892533555f,  0.450980989f,
-   -0.893224301f,  0.449611330f,
-   -0.893912945f,  0.448240612f,
-   -0.894599486f,  0.446868840f,
-   -0.895283921f,  0.445496017f,
-   -0.895966250f,  0.444122145f,
-   -0.896646470f,  0.442747228f,
-   -0.897324581f,  0.441371269f,
-   -0.898000580f,  0.439994271f,
-   -0.898674466f,  0.438616239f,
-   -0.899346237f,  0.437237174f,
-   -0.900015892f,  0.435857080f,
-   -0.900683429f,  0.434475961f,
-   -0.901348847f,  0.433093819f,
-   -0.902012144f,  0.431710658f,
-   -0.902673318f,  0.430326481f,
-   -0.903332368f,  0.428941292f,
-   -0.903989293f,  0.427555093f,
-   -0.904644091f,  0.426167889f,
-   -0.905296759f,  0.424779681f,
-   -0.905947298f,  0.423390474f,
-   -0.906595705f,  0.422000271f,
-   -0.907241978f,  0.420609074f,
-   -0.907886116f,  0.419216888f,
-   -0.908528119f,  0.417823716f,
-   -0.909167983f,  0.416429560f,
-   -0.909805708f,  0.415034424f,
-   -0.910441292f,  0.413638312f,
-   -0.911074734f,  0.412241227f,
-   -0.911706032f,  0.410843171f,
-   -0.912335185f,  0.409444149f,
-   -0.912962190f,  0.408044163f,
-   -0.913587048f,  0.406643217f,
-   -0.914209756f,  0.405241314f,
-   -0.914830312f,  0.403838458f,
-   -0.915448716f,  0.402434651f,
-   -0.916064966f,  0.401029897f,
-   -0.916679060f,  0.399624200f,
-   -0.917290997f,  0.398217562f,
-   -0.917900776f,  0.396809987f,
-   -0.918508394f,  0.395401479f,
-   -0.919113852f,  0.393992040f,
-   -0.919717146f,  0.392581674f,
-   -0.920318277f,  0.391170384f,
-   -0.920917242f,  0.389758174f,
-   -0.921514039f,  0.388345047f,
-   -0.922108669f,  0.386931006f,
-   -0.922701128f,  0.385516054f,
-   -0.923291417f,  0.384100195f,
-   -0.923879533f,  0.382683432f,
-   -0.924465474f,  0.381265769f,
-   -0.925049241f,  0.379847209f,
-   -0.925630831f,  0.378427755f,
-   -0.926210242f,  0.377007410f,
-   -0.926787474f,  0.375586178f,
-   -0.927362526f,  0.374164063f,
-   -0.927935395f,  0.372741067f,
-   -0.928506080f,  0.371317194f,
-   -0.929074581f,  0.369892447f,
-   -0.929640896f,  0.368466830f,
-   -0.930205023f,  0.367040346f,
-   -0.930766961f,  0.365612998f,
-   -0.931326709f,  0.364184790f,
-   -0.931884266f,  0.362755724f,
-   -0.932439629f,  0.361325806f,
-   -0.932992799f,  0.359895037f,
-   -0.933543773f,  0.358463421f,
-   -0.934092550f,  0.357030961f,
-   -0.934639130f,  0.355597662f,
-   -0.935183510f,  0.354163525f,
-   -0.935725689f,  0.352728556f,
-   -0.936265667f,  0.351292756f,
-   -0.936803442f,  0.349856130f,
-   -0.937339012f,  0.348418680f,
-   -0.937872376f,  0.346980411f,
-   -0.938403534f,  0.345541325f,
-   -0.938932484f,  0.344101426f,
-   -0.939459224f,  0.342660717f,
-   -0.939983753f,  0.341219202f,
-   -0.940506071f,  0.339776884f,
-   -0.941026175f,  0.338333767f,
-   -0.941544065f,  0.336889853f,
-   -0.942059740f,  0.335445147f,
-   -0.942573198f,  0.333999651f,
-   -0.943084437f,  0.332553370f,
-   -0.943593458f,  0.331106306f,
-   -0.944100258f,  0.329658463f,
-   -0.944604837f,  0.328209844f,
-   -0.945107193f,  0.326760452f,
-   -0.945607325f,  0.325310292f,
-   -0.946105232f,  0.323859367f,
-   -0.946600913f,  0.322407679f,
-   -0.947094366f,  0.320955232f,
-   -0.947585591f,  0.319502031f,
-   -0.948074586f,  0.318048077f,
-   -0.948561350f,  0.316593376f,
-   -0.949045882f,  0.315137929f,
-   -0.949528181f,  0.313681740f,
-   -0.950008245f,  0.312224814f,
-   -0.950486074f,  0.310767153f,
-   -0.950961666f,  0.309308760f,
-   -0.951435021f,  0.307849640f,
-   -0.951906137f,  0.306389795f,
-   -0.952375013f,  0.304929230f,
-   -0.952841648f,  0.303467947f,
-   -0.953306040f,  0.302005949f,
-   -0.953768190f,  0.300543241f,
-   -0.954228095f,  0.299079826f,
-   -0.954685755f,  0.297615707f,
-   -0.955141168f,  0.296150888f,
-   -0.955594334f,  0.294685372f,
-   -0.956045251f,  0.293219163f,
-   -0.956493919f,  0.291752263f,
-   -0.956940336f,  0.290284677f,
-   -0.957384501f,  0.288816408f,
-   -0.957826413f,  0.287347460f,
-   -0.958266071f,  0.285877835f,
-   -0.958703475f,  0.284407537f,
-   -0.959138622f,  0.282936570f,
-   -0.959571513f,  0.281464938f,
-   -0.960002146f,  0.279992643f,
-   -0.960430519f,  0.278519689f,
-   -0.960856633f,  0.277046080f,
-   -0.961280486f,  0.275571819f,
-   -0.961702077f,  0.274096910f,
-   -0.962121404f,  0.272621355f,
-   -0.962538468f,  0.271145160f,
-   -0.962953267f,  0.269668326f,
-   -0.963365800f,  0.268190857f,
-   -0.963776066f,  0.266712757f,
-   -0.964184064f,  0.265234030f,
-   -0.964589793f,  0.263754679f,
-   -0.964993253f,  0.262274707f,
-   -0.965394442f,  0.260794118f,
-   -0.965793359f,  0.259312915f,
-   -0.966190003f,  0.257831102f,
-   -0.966584374f,  0.256348682f,
-   -0.966976471f,  0.254865660f,
-   -0.967366292f,  0.253382037f,
-   -0.967753837f,  0.251897818f,
-   -0.968139105f,  0.250413007f,
-   -0.968522094f,  0.248927606f,
-   -0.968902805f,  0.247441619f,
-   -0.969281235f,  0.245955050f,
-   -0.969657385f,  0.244467903f,
-   -0.970031253f,  0.242980180f,
-   -0.970402839f,  0.241491885f,
-   -0.970772141f,  0.240003022f,
-   -0.971139158f,  0.238513595f,
-   -0.971503891f,  0.237023606f,
-   -0.971866337f,  0.235533059f,
-   -0.972226497f,  0.234041959f,
-   -0.972584369f,  0.232550307f,
-   -0.972939952f,  0.231058108f,
-   -0.973293246f,  0.229565366f,
-   -0.973644250f,  0.228072083f,
-   -0.973992962f,  0.226578264f,
-   -0.974339383f,  0.225083911f,
-   -0.974683511f,  0.223589029f,
-   -0.975025345f,  0.222093621f,
-   -0.975364885f,  0.220597690f,
-   -0.975702130f,  0.219101240f,
-   -0.976037079f,  0.217604275f,
-   -0.976369731f,  0.216106797f,
-   -0.976700086f,  0.214608811f,
-   -0.977028143f,  0.213110320f,
-   -0.977353900f,  0.211611327f,
-   -0.977677358f,  0.210111837f,
-   -0.977998515f,  0.208611852f,
-   -0.978317371f,  0.207111376f,
-   -0.978633924f,  0.205610413f,
-   -0.978948175f,  0.204108966f,
-   -0.979260123f,  0.202607039f,
-   -0.979569766f,  0.201104635f,
-   -0.979877104f,  0.199601758f,
-   -0.980182136f,  0.198098411f,
-   -0.980484862f,  0.196594598f,
-   -0.980785280f,  0.195090322f,
-   -0.981083391f,  0.193585587f,
-   -0.981379193f,  0.192080397f,
-   -0.981672686f,  0.190574755f,
-   -0.981963869f,  0.189068664f,
-   -0.982252741f,  0.187562129f,
-   -0.982539302f,  0.186055152f,
-   -0.982823551f,  0.184547737f,
-   -0.983105487f,  0.183039888f,
-   -0.983385110f,  0.181531608f,
-   -0.983662419f,  0.180022901f,
-   -0.983937413f,  0.178513771f,
-   -0.984210092f,  0.177004220f,
-   -0.984480455f,  0.175494253f,
-   -0.984748502f,  0.173983873f,
-   -0.985014231f,  0.172473084f,
-   -0.985277642f,  0.170961889f,
-   -0.985538735f,  0.169450291f,
-   -0.985797509f,  0.167938295f,
-   -0.986053963f,  0.166425904f,
-   -0.986308097f,  0.164913120f,
-   -0.986559910f,  0.163399949f,
-   -0.986809402f,  0.161886394f,
-   -0.987056571f,  0.160372457f,
-   -0.987301418f,  0.158858143f,
-   -0.987543942f,  0.157343456f,
-   -0.987784142f,  0.155828398f,
-   -0.988022017f,  0.154312973f,
-   -0.988257568f,  0.152797185f,
-   -0.988490793f,  0.151281038f,
-   -0.988721692f,  0.149764535f,
-   -0.988950265f,  0.148247679f,
-   -0.989176510f,  0.146730474f,
-   -0.989400428f,  0.145212925f,
-   -0.989622017f,  0.143695033f,
-   -0.989841278f,  0.142176804f,
-   -0.990058210f,  0.140658239f,
-   -0.990272812f,  0.139139344f,
-   -0.990485084f,  0.137620122f,
-   -0.990695025f,  0.136100575f,
-   -0.990902635f,  0.134580709f,
-   -0.991107914f,  0.133060525f,
-   -0.991310860f,  0.131540029f,
-   -0.991511473f,  0.130019223f,
-   -0.991709754f,  0.128498111f,
-   -0.991905700f,  0.126976696f,
-   -0.992099313f,  0.125454983f,
-   -0.992290591f,  0.123932975f,
-   -0.992479535f,  0.122410675f,
-   -0.992666142f,  0.120888087f,
-   -0.992850414f,  0.119365215f,
-   -0.993032350f,  0.117842062f,
-   -0.993211949f,  0.116318631f,
-   -0.993389211f,  0.114794927f,
-   -0.993564136f,  0.113270952f,
-   -0.993736722f,  0.111746711f,
-   -0.993906970f,  0.110222207f,
-   -0.994074879f,  0.108697444f,
-   -0.994240449f,  0.107172425f,
-   -0.994403680f,  0.105647154f,
-   -0.994564571f,  0.104121634f,
-   -0.994723121f,  0.102595869f,
-   -0.994879331f,  0.101069863f,
-   -0.995033199f,  0.099543619f,
-   -0.995184727f,  0.098017140f,
-   -0.995333912f,  0.096490431f,
-   -0.995480755f,  0.094963495f,
-   -0.995625256f,  0.093436336f,
-   -0.995767414f,  0.091908956f,
-   -0.995907229f,  0.090381361f,
-   -0.996044701f,  0.088853553f,
-   -0.996179829f,  0.087325535f,
-   -0.996312612f,  0.085797312f,
-   -0.996443051f,  0.084268888f,
-   -0.996571146f,  0.082740265f,
-   -0.996696895f,  0.081211447f,
-   -0.996820299f,  0.079682438f,
-   -0.996941358f,  0.078153242f,
-   -0.997060070f,  0.076623861f,
-   -0.997176437f,  0.075094301f,
-   -0.997290457f,  0.073564564f,
-   -0.997402130f,  0.072034653f,
-   -0.997511456f,  0.070504573f,
-   -0.997618435f,  0.068974328f,
-   -0.997723067f,  0.067443920f,
-   -0.997825350f,  0.065913353f,
-   -0.997925286f,  0.064382631f,
-   -0.998022874f,  0.062851758f,
-   -0.998118113f,  0.061320736f,
-   -0.998211003f,  0.059789571f,
-   -0.998301545f,  0.058258265f,
-   -0.998389737f,  0.056726821f,
-   -0.998475581f,  0.055195244f,
-   -0.998559074f,  0.053663538f,
-   -0.998640218f,  0.052131705f,
-   -0.998719012f,  0.050599749f,
-   -0.998795456f,  0.049067674f,
-   -0.998869550f,  0.047535484f,
-   -0.998941293f,  0.046003182f,
-   -0.999010686f,  0.044470772f,
-   -0.999077728f,  0.042938257f,
-   -0.999142419f,  0.041405641f,
-   -0.999204759f,  0.039872928f,
-   -0.999264747f,  0.038340120f,
-   -0.999322385f,  0.036807223f,
-   -0.999377670f,  0.035274239f,
-   -0.999430605f,  0.033741172f,
-   -0.999481187f,  0.032208025f,
-   -0.999529418f,  0.030674803f,
-   -0.999575296f,  0.029141509f,
-   -0.999618822f,  0.027608146f,
-   -0.999659997f,  0.026074718f,
-   -0.999698819f,  0.024541229f,
-   -0.999735288f,  0.023007681f,
-   -0.999769405f,  0.021474080f,
-   -0.999801170f,  0.019940429f,
-   -0.999830582f,  0.018406730f,
-   -0.999857641f,  0.016872988f,
-   -0.999882347f,  0.015339206f,
-   -0.999904701f,  0.013805389f,
-   -0.999924702f,  0.012271538f,
-   -0.999942350f,  0.010737659f,
-   -0.999957645f,  0.009203755f,
-   -0.999970586f,  0.007669829f,
-   -0.999981175f,  0.006135885f,
-   -0.999989411f,  0.004601926f,
-   -0.999995294f,  0.003067957f,
-   -0.999998823f,  0.001533980f,
-   -1.000000000f,  0.000000000f,
-   -0.999998823f, -0.001533980f,
-   -0.999995294f, -0.003067957f,
-   -0.999989411f, -0.004601926f,
-   -0.999981175f, -0.006135885f,
-   -0.999970586f, -0.007669829f,
-   -0.999957645f, -0.009203755f,
-   -0.999942350f, -0.010737659f,
-   -0.999924702f, -0.012271538f,
-   -0.999904701f, -0.013805389f,
-   -0.999882347f, -0.015339206f,
-   -0.999857641f, -0.016872988f,
-   -0.999830582f, -0.018406730f,
-   -0.999801170f, -0.019940429f,
-   -0.999769405f, -0.021474080f,
-   -0.999735288f, -0.023007681f,
-   -0.999698819f, -0.024541229f,
-   -0.999659997f, -0.026074718f,
-   -0.999618822f, -0.027608146f,
-   -0.999575296f, -0.029141509f,
-   -0.999529418f, -0.030674803f,
-   -0.999481187f, -0.032208025f,
-   -0.999430605f, -0.033741172f,
-   -0.999377670f, -0.035274239f,
-   -0.999322385f, -0.036807223f,
-   -0.999264747f, -0.038340120f,
-   -0.999204759f, -0.039872928f,
-   -0.999142419f, -0.041405641f,
-   -0.999077728f, -0.042938257f,
-   -0.999010686f, -0.044470772f,
-   -0.998941293f, -0.046003182f,
-   -0.998869550f, -0.047535484f,
-   -0.998795456f, -0.049067674f,
-   -0.998719012f, -0.050599749f,
-   -0.998640218f, -0.052131705f,
-   -0.998559074f, -0.053663538f,
-   -0.998475581f, -0.055195244f,
-   -0.998389737f, -0.056726821f,
-   -0.998301545f, -0.058258265f,
-   -0.998211003f, -0.059789571f,
-   -0.998118113f, -0.061320736f,
-   -0.998022874f, -0.062851758f,
-   -0.997925286f, -0.064382631f,
-   -0.997825350f, -0.065913353f,
-   -0.997723067f, -0.067443920f,
-   -0.997618435f, -0.068974328f,
-   -0.997511456f, -0.070504573f,
-   -0.997402130f, -0.072034653f,
-   -0.997290457f, -0.073564564f,
-   -0.997176437f, -0.075094301f,
-   -0.997060070f, -0.076623861f,
-   -0.996941358f, -0.078153242f,
-   -0.996820299f, -0.079682438f,
-   -0.996696895f, -0.081211447f,
-   -0.996571146f, -0.082740265f,
-   -0.996443051f, -0.084268888f,
-   -0.996312612f, -0.085797312f,
-   -0.996179829f, -0.087325535f,
-   -0.996044701f, -0.088853553f,
-   -0.995907229f, -0.090381361f,
-   -0.995767414f, -0.091908956f,
-   -0.995625256f, -0.093436336f,
-   -0.995480755f, -0.094963495f,
-   -0.995333912f, -0.096490431f,
-   -0.995184727f, -0.098017140f,
-   -0.995033199f, -0.099543619f,
-   -0.994879331f, -0.101069863f,
-   -0.994723121f, -0.102595869f,
-   -0.994564571f, -0.104121634f,
-   -0.994403680f, -0.105647154f,
-   -0.994240449f, -0.107172425f,
-   -0.994074879f, -0.108697444f,
-   -0.993906970f, -0.110222207f,
-   -0.993736722f, -0.111746711f,
-   -0.993564136f, -0.113270952f,
-   -0.993389211f, -0.114794927f,
-   -0.993211949f, -0.116318631f,
-   -0.993032350f, -0.117842062f,
-   -0.992850414f, -0.119365215f,
-   -0.992666142f, -0.120888087f,
-   -0.992479535f, -0.122410675f,
-   -0.992290591f, -0.123932975f,
-   -0.992099313f, -0.125454983f,
-   -0.991905700f, -0.126976696f,
-   -0.991709754f, -0.128498111f,
-   -0.991511473f, -0.130019223f,
-   -0.991310860f, -0.131540029f,
-   -0.991107914f, -0.133060525f,
-   -0.990902635f, -0.134580709f,
-   -0.990695025f, -0.136100575f,
-   -0.990485084f, -0.137620122f,
-   -0.990272812f, -0.139139344f,
-   -0.990058210f, -0.140658239f,
-   -0.989841278f, -0.142176804f,
-   -0.989622017f, -0.143695033f,
-   -0.989400428f, -0.145212925f,
-   -0.989176510f, -0.146730474f,
-   -0.988950265f, -0.148247679f,
-   -0.988721692f, -0.149764535f,
-   -0.988490793f, -0.151281038f,
-   -0.988257568f, -0.152797185f,
-   -0.988022017f, -0.154312973f,
-   -0.987784142f, -0.155828398f,
-   -0.987543942f, -0.157343456f,
-   -0.987301418f, -0.158858143f,
-   -0.987056571f, -0.160372457f,
-   -0.986809402f, -0.161886394f,
-   -0.986559910f, -0.163399949f,
-   -0.986308097f, -0.164913120f,
-   -0.986053963f, -0.166425904f,
-   -0.985797509f, -0.167938295f,
-   -0.985538735f, -0.169450291f,
-   -0.985277642f, -0.170961889f,
-   -0.985014231f, -0.172473084f,
-   -0.984748502f, -0.173983873f,
-   -0.984480455f, -0.175494253f,
-   -0.984210092f, -0.177004220f,
-   -0.983937413f, -0.178513771f,
-   -0.983662419f, -0.180022901f,
-   -0.983385110f, -0.181531608f,
-   -0.983105487f, -0.183039888f,
-   -0.982823551f, -0.184547737f,
-   -0.982539302f, -0.186055152f,
-   -0.982252741f, -0.187562129f,
-   -0.981963869f, -0.189068664f,
-   -0.981672686f, -0.190574755f,
-   -0.981379193f, -0.192080397f,
-   -0.981083391f, -0.193585587f,
-   -0.980785280f, -0.195090322f,
-   -0.980484862f, -0.196594598f,
-   -0.980182136f, -0.198098411f,
-   -0.979877104f, -0.199601758f,
-   -0.979569766f, -0.201104635f,
-   -0.979260123f, -0.202607039f,
-   -0.978948175f, -0.204108966f,
-   -0.978633924f, -0.205610413f,
-   -0.978317371f, -0.207111376f,
-   -0.977998515f, -0.208611852f,
-   -0.977677358f, -0.210111837f,
-   -0.977353900f, -0.211611327f,
-   -0.977028143f, -0.213110320f,
-   -0.976700086f, -0.214608811f,
-   -0.976369731f, -0.216106797f,
-   -0.976037079f, -0.217604275f,
-   -0.975702130f, -0.219101240f,
-   -0.975364885f, -0.220597690f,
-   -0.975025345f, -0.222093621f,
-   -0.974683511f, -0.223589029f,
-   -0.974339383f, -0.225083911f,
-   -0.973992962f, -0.226578264f,
-   -0.973644250f, -0.228072083f,
-   -0.973293246f, -0.229565366f,
-   -0.972939952f, -0.231058108f,
-   -0.972584369f, -0.232550307f,
-   -0.972226497f, -0.234041959f,
-   -0.971866337f, -0.235533059f,
-   -0.971503891f, -0.237023606f,
-   -0.971139158f, -0.238513595f,
-   -0.970772141f, -0.240003022f,
-   -0.970402839f, -0.241491885f,
-   -0.970031253f, -0.242980180f,
-   -0.969657385f, -0.244467903f,
-   -0.969281235f, -0.245955050f,
-   -0.968902805f, -0.247441619f,
-   -0.968522094f, -0.248927606f,
-   -0.968139105f, -0.250413007f,
-   -0.967753837f, -0.251897818f,
-   -0.967366292f, -0.253382037f,
-   -0.966976471f, -0.254865660f,
-   -0.966584374f, -0.256348682f,
-   -0.966190003f, -0.257831102f,
-   -0.965793359f, -0.259312915f,
-   -0.965394442f, -0.260794118f,
-   -0.964993253f, -0.262274707f,
-   -0.964589793f, -0.263754679f,
-   -0.964184064f, -0.265234030f,
-   -0.963776066f, -0.266712757f,
-   -0.963365800f, -0.268190857f,
-   -0.962953267f, -0.269668326f,
-   -0.962538468f, -0.271145160f,
-   -0.962121404f, -0.272621355f,
-   -0.961702077f, -0.274096910f,
-   -0.961280486f, -0.275571819f,
-   -0.960856633f, -0.277046080f,
-   -0.960430519f, -0.278519689f,
-   -0.960002146f, -0.279992643f,
-   -0.959571513f, -0.281464938f,
-   -0.959138622f, -0.282936570f,
-   -0.958703475f, -0.284407537f,
-   -0.958266071f, -0.285877835f,
-   -0.957826413f, -0.287347460f,
-   -0.957384501f, -0.288816408f,
-   -0.956940336f, -0.290284677f,
-   -0.956493919f, -0.291752263f,
-   -0.956045251f, -0.293219163f,
-   -0.955594334f, -0.294685372f,
-   -0.955141168f, -0.296150888f,
-   -0.954685755f, -0.297615707f,
-   -0.954228095f, -0.299079826f,
-   -0.953768190f, -0.300543241f,
-   -0.953306040f, -0.302005949f,
-   -0.952841648f, -0.303467947f,
-   -0.952375013f, -0.304929230f,
-   -0.951906137f, -0.306389795f,
-   -0.951435021f, -0.307849640f,
-   -0.950961666f, -0.309308760f,
-   -0.950486074f, -0.310767153f,
-   -0.950008245f, -0.312224814f,
-   -0.949528181f, -0.313681740f,
-   -0.949045882f, -0.315137929f,
-   -0.948561350f, -0.316593376f,
-   -0.948074586f, -0.318048077f,
-   -0.947585591f, -0.319502031f,
-   -0.947094366f, -0.320955232f,
-   -0.946600913f, -0.322407679f,
-   -0.946105232f, -0.323859367f,
-   -0.945607325f, -0.325310292f,
-   -0.945107193f, -0.326760452f,
-   -0.944604837f, -0.328209844f,
-   -0.944100258f, -0.329658463f,
-   -0.943593458f, -0.331106306f,
-   -0.943084437f, -0.332553370f,
-   -0.942573198f, -0.333999651f,
-   -0.942059740f, -0.335445147f,
-   -0.941544065f, -0.336889853f,
-   -0.941026175f, -0.338333767f,
-   -0.940506071f, -0.339776884f,
-   -0.939983753f, -0.341219202f,
-   -0.939459224f, -0.342660717f,
-   -0.938932484f, -0.344101426f,
-   -0.938403534f, -0.345541325f,
-   -0.937872376f, -0.346980411f,
-   -0.937339012f, -0.348418680f,
-   -0.936803442f, -0.349856130f,
-   -0.936265667f, -0.351292756f,
-   -0.935725689f, -0.352728556f,
-   -0.935183510f, -0.354163525f,
-   -0.934639130f, -0.355597662f,
-   -0.934092550f, -0.357030961f,
-   -0.933543773f, -0.358463421f,
-   -0.932992799f, -0.359895037f,
-   -0.932439629f, -0.361325806f,
-   -0.931884266f, -0.362755724f,
-   -0.931326709f, -0.364184790f,
-   -0.930766961f, -0.365612998f,
-   -0.930205023f, -0.367040346f,
-   -0.929640896f, -0.368466830f,
-   -0.929074581f, -0.369892447f,
-   -0.928506080f, -0.371317194f,
-   -0.927935395f, -0.372741067f,
-   -0.927362526f, -0.374164063f,
-   -0.926787474f, -0.375586178f,
-   -0.926210242f, -0.377007410f,
-   -0.925630831f, -0.378427755f,
-   -0.925049241f, -0.379847209f,
-   -0.924465474f, -0.381265769f,
-   -0.923879533f, -0.382683432f,
-   -0.923291417f, -0.384100195f,
-   -0.922701128f, -0.385516054f,
-   -0.922108669f, -0.386931006f,
-   -0.921514039f, -0.388345047f,
-   -0.920917242f, -0.389758174f,
-   -0.920318277f, -0.391170384f,
-   -0.919717146f, -0.392581674f,
-   -0.919113852f, -0.393992040f,
-   -0.918508394f, -0.395401479f,
-   -0.917900776f, -0.396809987f,
-   -0.917290997f, -0.398217562f,
-   -0.916679060f, -0.399624200f,
-   -0.916064966f, -0.401029897f,
-   -0.915448716f, -0.402434651f,
-   -0.914830312f, -0.403838458f,
-   -0.914209756f, -0.405241314f,
-   -0.913587048f, -0.406643217f,
-   -0.912962190f, -0.408044163f,
-   -0.912335185f, -0.409444149f,
-   -0.911706032f, -0.410843171f,
-   -0.911074734f, -0.412241227f,
-   -0.910441292f, -0.413638312f,
-   -0.909805708f, -0.415034424f,
-   -0.909167983f, -0.416429560f,
-   -0.908528119f, -0.417823716f,
-   -0.907886116f, -0.419216888f,
-   -0.907241978f, -0.420609074f,
-   -0.906595705f, -0.422000271f,
-   -0.905947298f, -0.423390474f,
-   -0.905296759f, -0.424779681f,
-   -0.904644091f, -0.426167889f,
-   -0.903989293f, -0.427555093f,
-   -0.903332368f, -0.428941292f,
-   -0.902673318f, -0.430326481f,
-   -0.902012144f, -0.431710658f,
-   -0.901348847f, -0.433093819f,
-   -0.900683429f, -0.434475961f,
-   -0.900015892f, -0.435857080f,
-   -0.899346237f, -0.437237174f,
-   -0.898674466f, -0.438616239f,
-   -0.898000580f, -0.439994271f,
-   -0.897324581f, -0.441371269f,
-   -0.896646470f, -0.442747228f,
-   -0.895966250f, -0.444122145f,
-   -0.895283921f, -0.445496017f,
-   -0.894599486f, -0.446868840f,
-   -0.893912945f, -0.448240612f,
-   -0.893224301f, -0.449611330f,
-   -0.892533555f, -0.450980989f,
-   -0.891840709f, -0.452349587f,
-   -0.891145765f, -0.453717121f,
-   -0.890448723f, -0.455083587f,
-   -0.889749586f, -0.456448982f,
-   -0.889048356f, -0.457813304f,
-   -0.888345033f, -0.459176548f,
-   -0.887639620f, -0.460538711f,
-   -0.886932119f, -0.461899791f,
-   -0.886222530f, -0.463259784f,
-   -0.885510856f, -0.464618686f,
-   -0.884797098f, -0.465976496f,
-   -0.884081259f, -0.467333209f,
-   -0.883363339f, -0.468688822f,
-   -0.882643340f, -0.470043332f,
-   -0.881921264f, -0.471396737f,
-   -0.881197113f, -0.472749032f,
-   -0.880470889f, -0.474100215f,
-   -0.879742593f, -0.475450282f,
-   -0.879012226f, -0.476799230f,
-   -0.878279792f, -0.478147056f,
-   -0.877545290f, -0.479493758f,
-   -0.876808724f, -0.480839331f,
-   -0.876070094f, -0.482183772f,
-   -0.875329403f, -0.483527079f,
-   -0.874586652f, -0.484869248f,
-   -0.873841843f, -0.486210276f,
-   -0.873094978f, -0.487550160f,
-   -0.872346059f, -0.488888897f,
-   -0.871595087f, -0.490226483f,
-   -0.870842063f, -0.491562916f,
-   -0.870086991f, -0.492898192f,
-   -0.869329871f, -0.494232309f,
-   -0.868570706f, -0.495565262f,
-   -0.867809497f, -0.496897049f,
-   -0.867046246f, -0.498227667f,
-   -0.866280954f, -0.499557113f,
-   -0.865513624f, -0.500885383f,
-   -0.864744258f, -0.502212474f,
-   -0.863972856f, -0.503538384f,
-   -0.863199422f, -0.504863109f,
-   -0.862423956f, -0.506186645f,
-   -0.861646461f, -0.507508991f,
-   -0.860866939f, -0.508830143f,
-   -0.860085390f, -0.510150097f,
-   -0.859301818f, -0.511468850f,
-   -0.858516224f, -0.512786401f,
-   -0.857728610f, -0.514102744f,
-   -0.856938977f, -0.515417878f,
-   -0.856147328f, -0.516731799f,
-   -0.855353665f, -0.518044504f,
-   -0.854557988f, -0.519355990f,
-   -0.853760301f, -0.520666254f,
-   -0.852960605f, -0.521975293f,
-   -0.852158902f, -0.523283103f,
-   -0.851355193f, -0.524589683f,
-   -0.850549481f, -0.525895027f,
-   -0.849741768f, -0.527199135f,
-   -0.848932055f, -0.528502002f,
-   -0.848120345f, -0.529803625f,
-   -0.847306639f, -0.531104001f,
-   -0.846490939f, -0.532403128f,
-   -0.845673247f, -0.533701002f,
-   -0.844853565f, -0.534997620f,
-   -0.844031895f, -0.536292979f,
-   -0.843208240f, -0.537587076f,
-   -0.842382600f, -0.538879909f,
-   -0.841554977f, -0.540171473f,
-   -0.840725375f, -0.541461766f,
-   -0.839893794f, -0.542750785f,
-   -0.839060237f, -0.544038527f,
-   -0.838224706f, -0.545324988f,
-   -0.837387202f, -0.546610167f,
-   -0.836547727f, -0.547894059f,
-   -0.835706284f, -0.549176662f,
-   -0.834862875f, -0.550457973f,
-   -0.834017501f, -0.551737988f,
-   -0.833170165f, -0.553016706f,
-   -0.832320868f, -0.554294121f,
-   -0.831469612f, -0.555570233f,
-   -0.830616400f, -0.556845037f,
-   -0.829761234f, -0.558118531f,
-   -0.828904115f, -0.559390712f,
-   -0.828045045f, -0.560661576f,
-   -0.827184027f, -0.561931121f,
-   -0.826321063f, -0.563199344f,
-   -0.825456154f, -0.564466242f,
-   -0.824589303f, -0.565731811f,
-   -0.823720511f, -0.566996049f,
-   -0.822849781f, -0.568258953f,
-   -0.821977115f, -0.569520519f,
-   -0.821102515f, -0.570780746f,
-   -0.820225983f, -0.572039629f,
-   -0.819347520f, -0.573297167f,
-   -0.818467130f, -0.574553355f,
-   -0.817584813f, -0.575808191f,
-   -0.816700573f, -0.577061673f,
-   -0.815814411f, -0.578313796f,
-   -0.814926329f, -0.579564559f,
-   -0.814036330f, -0.580813958f,
-   -0.813144415f, -0.582061990f,
-   -0.812250587f, -0.583308653f,
-   -0.811354847f, -0.584553943f,
-   -0.810457198f, -0.585797857f,
-   -0.809557642f, -0.587040394f,
-   -0.808656182f, -0.588281548f,
-   -0.807752818f, -0.589521319f,
-   -0.806847554f, -0.590759702f,
-   -0.805940391f, -0.591996695f,
-   -0.805031331f, -0.593232295f,
-   -0.804120377f, -0.594466499f,
-   -0.803207531f, -0.595699304f,
-   -0.802292796f, -0.596930708f,
-   -0.801376172f, -0.598160707f,
-   -0.800457662f, -0.599389298f,
-   -0.799537269f, -0.600616479f,
-   -0.798614995f, -0.601842247f,
-   -0.797690841f, -0.603066599f,
-   -0.796764810f, -0.604289531f,
-   -0.795836905f, -0.605511041f,
-   -0.794907126f, -0.606731127f,
-   -0.793975478f, -0.607949785f,
-   -0.793041960f, -0.609167012f,
-   -0.792106577f, -0.610382806f,
-   -0.791169330f, -0.611597164f,
-   -0.790230221f, -0.612810082f,
-   -0.789289253f, -0.614021559f,
-   -0.788346428f, -0.615231591f,
-   -0.787401747f, -0.616440175f,
-   -0.786455214f, -0.617647308f,
-   -0.785506830f, -0.618852988f,
-   -0.784556597f, -0.620057212f,
-   -0.783604519f, -0.621259977f,
-   -0.782650596f, -0.622461279f,
-   -0.781694832f, -0.623661118f,
-   -0.780737229f, -0.624859488f,
-   -0.779777788f, -0.626056388f,
-   -0.778816512f, -0.627251815f,
-   -0.777853404f, -0.628445767f,
-   -0.776888466f, -0.629638239f,
-   -0.775921699f, -0.630829230f,
-   -0.774953107f, -0.632018736f,
-   -0.773982691f, -0.633206755f,
-   -0.773010453f, -0.634393284f,
-   -0.772036397f, -0.635578320f,
-   -0.771060524f, -0.636761861f,
-   -0.770082837f, -0.637943904f,
-   -0.769103338f, -0.639124445f,
-   -0.768122029f, -0.640303482f,
-   -0.767138912f, -0.641481013f,
-   -0.766153990f, -0.642657034f,
-   -0.765167266f, -0.643831543f,
-   -0.764178741f, -0.645004537f,
-   -0.763188417f, -0.646176013f,
-   -0.762196298f, -0.647345969f,
-   -0.761202385f, -0.648514401f,
-   -0.760206682f, -0.649681307f,
-   -0.759209189f, -0.650846685f,
-   -0.758209910f, -0.652010531f,
-   -0.757208847f, -0.653172843f,
-   -0.756206001f, -0.654333618f,
-   -0.755201377f, -0.655492853f,
-   -0.754194975f, -0.656650546f,
-   -0.753186799f, -0.657806693f,
-   -0.752176850f, -0.658961293f,
-   -0.751165132f, -0.660114342f,
-   -0.750151646f, -0.661265838f,
-   -0.749136395f, -0.662415778f,
-   -0.748119380f, -0.663564159f,
-   -0.747100606f, -0.664710978f,
-   -0.746080074f, -0.665856234f,
-   -0.745057785f, -0.666999922f,
-   -0.744033744f, -0.668142041f,
-   -0.743007952f, -0.669282588f,
-   -0.741980412f, -0.670421560f,
-   -0.740951125f, -0.671558955f,
-   -0.739920095f, -0.672694769f,
-   -0.738887324f, -0.673829000f,
-   -0.737852815f, -0.674961646f,
-   -0.736816569f, -0.676092704f,
-   -0.735778589f, -0.677222170f,
-   -0.734738878f, -0.678350043f,
-   -0.733697438f, -0.679476320f,
-   -0.732654272f, -0.680600998f,
-   -0.731609381f, -0.681724074f,
-   -0.730562769f, -0.682845546f,
-   -0.729514438f, -0.683965412f,
-   -0.728464390f, -0.685083668f,
-   -0.727412629f, -0.686200312f,
-   -0.726359155f, -0.687315341f,
-   -0.725303972f, -0.688428753f,
-   -0.724247083f, -0.689540545f,
-   -0.723188489f, -0.690650714f,
-   -0.722128194f, -0.691759258f,
-   -0.721066199f, -0.692866175f,
-   -0.720002508f, -0.693971461f,
-   -0.718937122f, -0.695075114f,
-   -0.717870045f, -0.696177131f,
-   -0.716801279f, -0.697277511f,
-   -0.715730825f, -0.698376249f,
-   -0.714658688f, -0.699473345f,
-   -0.713584869f, -0.700568794f,
-   -0.712509371f, -0.701662595f,
-   -0.711432196f, -0.702754744f,
-   -0.710353347f, -0.703845241f,
-   -0.709272826f, -0.704934080f,
-   -0.708190637f, -0.706021261f,
-   -0.707106781f, -0.707106781f,
-   -0.706021261f, -0.708190637f,
-   -0.704934080f, -0.709272826f,
-   -0.703845241f, -0.710353347f,
-   -0.702754744f, -0.711432196f,
-   -0.701662595f, -0.712509371f,
-   -0.700568794f, -0.713584869f,
-   -0.699473345f, -0.714658688f,
-   -0.698376249f, -0.715730825f,
-   -0.697277511f, -0.716801279f,
-   -0.696177131f, -0.717870045f,
-   -0.695075114f, -0.718937122f,
-   -0.693971461f, -0.720002508f,
-   -0.692866175f, -0.721066199f,
-   -0.691759258f, -0.722128194f,
-   -0.690650714f, -0.723188489f,
-   -0.689540545f, -0.724247083f,
-   -0.688428753f, -0.725303972f,
-   -0.687315341f, -0.726359155f,
-   -0.686200312f, -0.727412629f,
-   -0.685083668f, -0.728464390f,
-   -0.683965412f, -0.729514438f,
-   -0.682845546f, -0.730562769f,
-   -0.681724074f, -0.731609381f,
-   -0.680600998f, -0.732654272f,
-   -0.679476320f, -0.733697438f,
-   -0.678350043f, -0.734738878f,
-   -0.677222170f, -0.735778589f,
-   -0.676092704f, -0.736816569f,
-   -0.674961646f, -0.737852815f,
-   -0.673829000f, -0.738887324f,
-   -0.672694769f, -0.739920095f,
-   -0.671558955f, -0.740951125f,
-   -0.670421560f, -0.741980412f,
-   -0.669282588f, -0.743007952f,
-   -0.668142041f, -0.744033744f,
-   -0.666999922f, -0.745057785f,
-   -0.665856234f, -0.746080074f,
-   -0.664710978f, -0.747100606f,
-   -0.663564159f, -0.748119380f,
-   -0.662415778f, -0.749136395f,
-   -0.661265838f, -0.750151646f,
-   -0.660114342f, -0.751165132f,
-   -0.658961293f, -0.752176850f,
-   -0.657806693f, -0.753186799f,
-   -0.656650546f, -0.754194975f,
-   -0.655492853f, -0.755201377f,
-   -0.654333618f, -0.756206001f,
-   -0.653172843f, -0.757208847f,
-   -0.652010531f, -0.758209910f,
-   -0.650846685f, -0.759209189f,
-   -0.649681307f, -0.760206682f,
-   -0.648514401f, -0.761202385f,
-   -0.647345969f, -0.762196298f,
-   -0.646176013f, -0.763188417f,
-   -0.645004537f, -0.764178741f,
-   -0.643831543f, -0.765167266f,
-   -0.642657034f, -0.766153990f,
-   -0.641481013f, -0.767138912f,
-   -0.640303482f, -0.768122029f,
-   -0.639124445f, -0.769103338f,
-   -0.637943904f, -0.770082837f,
-   -0.636761861f, -0.771060524f,
-   -0.635578320f, -0.772036397f,
-   -0.634393284f, -0.773010453f,
-   -0.633206755f, -0.773982691f,
-   -0.632018736f, -0.774953107f,
-   -0.630829230f, -0.775921699f,
-   -0.629638239f, -0.776888466f,
-   -0.628445767f, -0.777853404f,
-   -0.627251815f, -0.778816512f,
-   -0.626056388f, -0.779777788f,
-   -0.624859488f, -0.780737229f,
-   -0.623661118f, -0.781694832f,
-   -0.622461279f, -0.782650596f,
-   -0.621259977f, -0.783604519f,
-   -0.620057212f, -0.784556597f,
-   -0.618852988f, -0.785506830f,
-   -0.617647308f, -0.786455214f,
-   -0.616440175f, -0.787401747f,
-   -0.615231591f, -0.788346428f,
-   -0.614021559f, -0.789289253f,
-   -0.612810082f, -0.790230221f,
-   -0.611597164f, -0.791169330f,
-   -0.610382806f, -0.792106577f,
-   -0.609167012f, -0.793041960f,
-   -0.607949785f, -0.793975478f,
-   -0.606731127f, -0.794907126f,
-   -0.605511041f, -0.795836905f,
-   -0.604289531f, -0.796764810f,
-   -0.603066599f, -0.797690841f,
-   -0.601842247f, -0.798614995f,
-   -0.600616479f, -0.799537269f,
-   -0.599389298f, -0.800457662f,
-   -0.598160707f, -0.801376172f,
-   -0.596930708f, -0.802292796f,
-   -0.595699304f, -0.803207531f,
-   -0.594466499f, -0.804120377f,
-   -0.593232295f, -0.805031331f,
-   -0.591996695f, -0.805940391f,
-   -0.590759702f, -0.806847554f,
-   -0.589521319f, -0.807752818f,
-   -0.588281548f, -0.808656182f,
-   -0.587040394f, -0.809557642f,
-   -0.585797857f, -0.810457198f,
-   -0.584553943f, -0.811354847f,
-   -0.583308653f, -0.812250587f,
-   -0.582061990f, -0.813144415f,
-   -0.580813958f, -0.814036330f,
-   -0.579564559f, -0.814926329f,
-   -0.578313796f, -0.815814411f,
-   -0.577061673f, -0.816700573f,
-   -0.575808191f, -0.817584813f,
-   -0.574553355f, -0.818467130f,
-   -0.573297167f, -0.819347520f,
-   -0.572039629f, -0.820225983f,
-   -0.570780746f, -0.821102515f,
-   -0.569520519f, -0.821977115f,
-   -0.568258953f, -0.822849781f,
-   -0.566996049f, -0.823720511f,
-   -0.565731811f, -0.824589303f,
-   -0.564466242f, -0.825456154f,
-   -0.563199344f, -0.826321063f,
-   -0.561931121f, -0.827184027f,
-   -0.560661576f, -0.828045045f,
-   -0.559390712f, -0.828904115f,
-   -0.558118531f, -0.829761234f,
-   -0.556845037f, -0.830616400f,
-   -0.555570233f, -0.831469612f,
-   -0.554294121f, -0.832320868f,
-   -0.553016706f, -0.833170165f,
-   -0.551737988f, -0.834017501f,
-   -0.550457973f, -0.834862875f,
-   -0.549176662f, -0.835706284f,
-   -0.547894059f, -0.836547727f,
-   -0.546610167f, -0.837387202f,
-   -0.545324988f, -0.838224706f,
-   -0.544038527f, -0.839060237f,
-   -0.542750785f, -0.839893794f,
-   -0.541461766f, -0.840725375f,
-   -0.540171473f, -0.841554977f,
-   -0.538879909f, -0.842382600f,
-   -0.537587076f, -0.843208240f,
-   -0.536292979f, -0.844031895f,
-   -0.534997620f, -0.844853565f,
-   -0.533701002f, -0.845673247f,
-   -0.532403128f, -0.846490939f,
-   -0.531104001f, -0.847306639f,
-   -0.529803625f, -0.848120345f,
-   -0.528502002f, -0.848932055f,
-   -0.527199135f, -0.849741768f,
-   -0.525895027f, -0.850549481f,
-   -0.524589683f, -0.851355193f,
-   -0.523283103f, -0.852158902f,
-   -0.521975293f, -0.852960605f,
-   -0.520666254f, -0.853760301f,
-   -0.519355990f, -0.854557988f,
-   -0.518044504f, -0.855353665f,
-   -0.516731799f, -0.856147328f,
-   -0.515417878f, -0.856938977f,
-   -0.514102744f, -0.857728610f,
-   -0.512786401f, -0.858516224f,
-   -0.511468850f, -0.859301818f,
-   -0.510150097f, -0.860085390f,
-   -0.508830143f, -0.860866939f,
-   -0.507508991f, -0.861646461f,
-   -0.506186645f, -0.862423956f,
-   -0.504863109f, -0.863199422f,
-   -0.503538384f, -0.863972856f,
-   -0.502212474f, -0.864744258f,
-   -0.500885383f, -0.865513624f,
-   -0.499557113f, -0.866280954f,
-   -0.498227667f, -0.867046246f,
-   -0.496897049f, -0.867809497f,
-   -0.495565262f, -0.868570706f,
-   -0.494232309f, -0.869329871f,
-   -0.492898192f, -0.870086991f,
-   -0.491562916f, -0.870842063f,
-   -0.490226483f, -0.871595087f,
-   -0.488888897f, -0.872346059f,
-   -0.487550160f, -0.873094978f,
-   -0.486210276f, -0.873841843f,
-   -0.484869248f, -0.874586652f,
-   -0.483527079f, -0.875329403f,
-   -0.482183772f, -0.876070094f,
-   -0.480839331f, -0.876808724f,
-   -0.479493758f, -0.877545290f,
-   -0.478147056f, -0.878279792f,
-   -0.476799230f, -0.879012226f,
-   -0.475450282f, -0.879742593f,
-   -0.474100215f, -0.880470889f,
-   -0.472749032f, -0.881197113f,
-   -0.471396737f, -0.881921264f,
-   -0.470043332f, -0.882643340f,
-   -0.468688822f, -0.883363339f,
-   -0.467333209f, -0.884081259f,
-   -0.465976496f, -0.884797098f,
-   -0.464618686f, -0.885510856f,
-   -0.463259784f, -0.886222530f,
-   -0.461899791f, -0.886932119f,
-   -0.460538711f, -0.887639620f,
-   -0.459176548f, -0.888345033f,
-   -0.457813304f, -0.889048356f,
-   -0.456448982f, -0.889749586f,
-   -0.455083587f, -0.890448723f,
-   -0.453717121f, -0.891145765f,
-   -0.452349587f, -0.891840709f,
-   -0.450980989f, -0.892533555f,
-   -0.449611330f, -0.893224301f,
-   -0.448240612f, -0.893912945f,
-   -0.446868840f, -0.894599486f,
-   -0.445496017f, -0.895283921f,
-   -0.444122145f, -0.895966250f,
-   -0.442747228f, -0.896646470f,
-   -0.441371269f, -0.897324581f,
-   -0.439994271f, -0.898000580f,
-   -0.438616239f, -0.898674466f,
-   -0.437237174f, -0.899346237f,
-   -0.435857080f, -0.900015892f,
-   -0.434475961f, -0.900683429f,
-   -0.433093819f, -0.901348847f,
-   -0.431710658f, -0.902012144f,
-   -0.430326481f, -0.902673318f,
-   -0.428941292f, -0.903332368f,
-   -0.427555093f, -0.903989293f,
-   -0.426167889f, -0.904644091f,
-   -0.424779681f, -0.905296759f,
-   -0.423390474f, -0.905947298f,
-   -0.422000271f, -0.906595705f,
-   -0.420609074f, -0.907241978f,
-   -0.419216888f, -0.907886116f,
-   -0.417823716f, -0.908528119f,
-   -0.416429560f, -0.909167983f,
-   -0.415034424f, -0.909805708f,
-   -0.413638312f, -0.910441292f,
-   -0.412241227f, -0.911074734f,
-   -0.410843171f, -0.911706032f,
-   -0.409444149f, -0.912335185f,
-   -0.408044163f, -0.912962190f,
-   -0.406643217f, -0.913587048f,
-   -0.405241314f, -0.914209756f,
-   -0.403838458f, -0.914830312f,
-   -0.402434651f, -0.915448716f,
-   -0.401029897f, -0.916064966f,
-   -0.399624200f, -0.916679060f,
-   -0.398217562f, -0.917290997f,
-   -0.396809987f, -0.917900776f,
-   -0.395401479f, -0.918508394f,
-   -0.393992040f, -0.919113852f,
-   -0.392581674f, -0.919717146f,
-   -0.391170384f, -0.920318277f,
-   -0.389758174f, -0.920917242f,
-   -0.388345047f, -0.921514039f,
-   -0.386931006f, -0.922108669f,
-   -0.385516054f, -0.922701128f,
-   -0.384100195f, -0.923291417f,
-   -0.382683432f, -0.923879533f,
-   -0.381265769f, -0.924465474f,
-   -0.379847209f, -0.925049241f,
-   -0.378427755f, -0.925630831f,
-   -0.377007410f, -0.926210242f,
-   -0.375586178f, -0.926787474f,
-   -0.374164063f, -0.927362526f,
-   -0.372741067f, -0.927935395f,
-   -0.371317194f, -0.928506080f,
-   -0.369892447f, -0.929074581f,
-   -0.368466830f, -0.929640896f,
-   -0.367040346f, -0.930205023f,
-   -0.365612998f, -0.930766961f,
-   -0.364184790f, -0.931326709f,
-   -0.362755724f, -0.931884266f,
-   -0.361325806f, -0.932439629f,
-   -0.359895037f, -0.932992799f,
-   -0.358463421f, -0.933543773f,
-   -0.357030961f, -0.934092550f,
-   -0.355597662f, -0.934639130f,
-   -0.354163525f, -0.935183510f,
-   -0.352728556f, -0.935725689f,
-   -0.351292756f, -0.936265667f,
-   -0.349856130f, -0.936803442f,
-   -0.348418680f, -0.937339012f,
-   -0.346980411f, -0.937872376f,
-   -0.345541325f, -0.938403534f,
-   -0.344101426f, -0.938932484f,
-   -0.342660717f, -0.939459224f,
-   -0.341219202f, -0.939983753f,
-   -0.339776884f, -0.940506071f,
-   -0.338333767f, -0.941026175f,
-   -0.336889853f, -0.941544065f,
-   -0.335445147f, -0.942059740f,
-   -0.333999651f, -0.942573198f,
-   -0.332553370f, -0.943084437f,
-   -0.331106306f, -0.943593458f,
-   -0.329658463f, -0.944100258f,
-   -0.328209844f, -0.944604837f,
-   -0.326760452f, -0.945107193f,
-   -0.325310292f, -0.945607325f,
-   -0.323859367f, -0.946105232f,
-   -0.322407679f, -0.946600913f,
-   -0.320955232f, -0.947094366f,
-   -0.319502031f, -0.947585591f,
-   -0.318048077f, -0.948074586f,
-   -0.316593376f, -0.948561350f,
-   -0.315137929f, -0.949045882f,
-   -0.313681740f, -0.949528181f,
-   -0.312224814f, -0.950008245f,
-   -0.310767153f, -0.950486074f,
-   -0.309308760f, -0.950961666f,
-   -0.307849640f, -0.951435021f,
-   -0.306389795f, -0.951906137f,
-   -0.304929230f, -0.952375013f,
-   -0.303467947f, -0.952841648f,
-   -0.302005949f, -0.953306040f,
-   -0.300543241f, -0.953768190f,
-   -0.299079826f, -0.954228095f,
-   -0.297615707f, -0.954685755f,
-   -0.296150888f, -0.955141168f,
-   -0.294685372f, -0.955594334f,
-   -0.293219163f, -0.956045251f,
-   -0.291752263f, -0.956493919f,
-   -0.290284677f, -0.956940336f,
-   -0.288816408f, -0.957384501f,
-   -0.287347460f, -0.957826413f,
-   -0.285877835f, -0.958266071f,
-   -0.284407537f, -0.958703475f,
-   -0.282936570f, -0.959138622f,
-   -0.281464938f, -0.959571513f,
-   -0.279992643f, -0.960002146f,
-   -0.278519689f, -0.960430519f,
-   -0.277046080f, -0.960856633f,
-   -0.275571819f, -0.961280486f,
-   -0.274096910f, -0.961702077f,
-   -0.272621355f, -0.962121404f,
-   -0.271145160f, -0.962538468f,
-   -0.269668326f, -0.962953267f,
-   -0.268190857f, -0.963365800f,
-   -0.266712757f, -0.963776066f,
-   -0.265234030f, -0.964184064f,
-   -0.263754679f, -0.964589793f,
-   -0.262274707f, -0.964993253f,
-   -0.260794118f, -0.965394442f,
-   -0.259312915f, -0.965793359f,
-   -0.257831102f, -0.966190003f,
-   -0.256348682f, -0.966584374f,
-   -0.254865660f, -0.966976471f,
-   -0.253382037f, -0.967366292f,
-   -0.251897818f, -0.967753837f,
-   -0.250413007f, -0.968139105f,
-   -0.248927606f, -0.968522094f,
-   -0.247441619f, -0.968902805f,
-   -0.245955050f, -0.969281235f,
-   -0.244467903f, -0.969657385f,
-   -0.242980180f, -0.970031253f,
-   -0.241491885f, -0.970402839f,
-   -0.240003022f, -0.970772141f,
-   -0.238513595f, -0.971139158f,
-   -0.237023606f, -0.971503891f,
-   -0.235533059f, -0.971866337f,
-   -0.234041959f, -0.972226497f,
-   -0.232550307f, -0.972584369f,
-   -0.231058108f, -0.972939952f,
-   -0.229565366f, -0.973293246f,
-   -0.228072083f, -0.973644250f,
-   -0.226578264f, -0.973992962f,
-   -0.225083911f, -0.974339383f,
-   -0.223589029f, -0.974683511f,
-   -0.222093621f, -0.975025345f,
-   -0.220597690f, -0.975364885f,
-   -0.219101240f, -0.975702130f,
-   -0.217604275f, -0.976037079f,
-   -0.216106797f, -0.976369731f,
-   -0.214608811f, -0.976700086f,
-   -0.213110320f, -0.977028143f,
-   -0.211611327f, -0.977353900f,
-   -0.210111837f, -0.977677358f,
-   -0.208611852f, -0.977998515f,
-   -0.207111376f, -0.978317371f,
-   -0.205610413f, -0.978633924f,
-   -0.204108966f, -0.978948175f,
-   -0.202607039f, -0.979260123f,
-   -0.201104635f, -0.979569766f,
-   -0.199601758f, -0.979877104f,
-   -0.198098411f, -0.980182136f,
-   -0.196594598f, -0.980484862f,
-   -0.195090322f, -0.980785280f,
-   -0.193585587f, -0.981083391f,
-   -0.192080397f, -0.981379193f,
-   -0.190574755f, -0.981672686f,
-   -0.189068664f, -0.981963869f,
-   -0.187562129f, -0.982252741f,
-   -0.186055152f, -0.982539302f,
-   -0.184547737f, -0.982823551f,
-   -0.183039888f, -0.983105487f,
-   -0.181531608f, -0.983385110f,
-   -0.180022901f, -0.983662419f,
-   -0.178513771f, -0.983937413f,
-   -0.177004220f, -0.984210092f,
-   -0.175494253f, -0.984480455f,
-   -0.173983873f, -0.984748502f,
-   -0.172473084f, -0.985014231f,
-   -0.170961889f, -0.985277642f,
-   -0.169450291f, -0.985538735f,
-   -0.167938295f, -0.985797509f,
-   -0.166425904f, -0.986053963f,
-   -0.164913120f, -0.986308097f,
-   -0.163399949f, -0.986559910f,
-   -0.161886394f, -0.986809402f,
-   -0.160372457f, -0.987056571f,
-   -0.158858143f, -0.987301418f,
-   -0.157343456f, -0.987543942f,
-   -0.155828398f, -0.987784142f,
-   -0.154312973f, -0.988022017f,
-   -0.152797185f, -0.988257568f,
-   -0.151281038f, -0.988490793f,
-   -0.149764535f, -0.988721692f,
-   -0.148247679f, -0.988950265f,
-   -0.146730474f, -0.989176510f,
-   -0.145212925f, -0.989400428f,
-   -0.143695033f, -0.989622017f,
-   -0.142176804f, -0.989841278f,
-   -0.140658239f, -0.990058210f,
-   -0.139139344f, -0.990272812f,
-   -0.137620122f, -0.990485084f,
-   -0.136100575f, -0.990695025f,
-   -0.134580709f, -0.990902635f,
-   -0.133060525f, -0.991107914f,
-   -0.131540029f, -0.991310860f,
-   -0.130019223f, -0.991511473f,
-   -0.128498111f, -0.991709754f,
-   -0.126976696f, -0.991905700f,
-   -0.125454983f, -0.992099313f,
-   -0.123932975f, -0.992290591f,
-   -0.122410675f, -0.992479535f,
-   -0.120888087f, -0.992666142f,
-   -0.119365215f, -0.992850414f,
-   -0.117842062f, -0.993032350f,
-   -0.116318631f, -0.993211949f,
-   -0.114794927f, -0.993389211f,
-   -0.113270952f, -0.993564136f,
-   -0.111746711f, -0.993736722f,
-   -0.110222207f, -0.993906970f,
-   -0.108697444f, -0.994074879f,
-   -0.107172425f, -0.994240449f,
-   -0.105647154f, -0.994403680f,
-   -0.104121634f, -0.994564571f,
-   -0.102595869f, -0.994723121f,
-   -0.101069863f, -0.994879331f,
-   -0.099543619f, -0.995033199f,
-   -0.098017140f, -0.995184727f,
-   -0.096490431f, -0.995333912f,
-   -0.094963495f, -0.995480755f,
-   -0.093436336f, -0.995625256f,
-   -0.091908956f, -0.995767414f,
-   -0.090381361f, -0.995907229f,
-   -0.088853553f, -0.996044701f,
-   -0.087325535f, -0.996179829f,
-   -0.085797312f, -0.996312612f,
-   -0.084268888f, -0.996443051f,
-   -0.082740265f, -0.996571146f,
-   -0.081211447f, -0.996696895f,
-   -0.079682438f, -0.996820299f,
-   -0.078153242f, -0.996941358f,
-   -0.076623861f, -0.997060070f,
-   -0.075094301f, -0.997176437f,
-   -0.073564564f, -0.997290457f,
-   -0.072034653f, -0.997402130f,
-   -0.070504573f, -0.997511456f,
-   -0.068974328f, -0.997618435f,
-   -0.067443920f, -0.997723067f,
-   -0.065913353f, -0.997825350f,
-   -0.064382631f, -0.997925286f,
-   -0.062851758f, -0.998022874f,
-   -0.061320736f, -0.998118113f,
-   -0.059789571f, -0.998211003f,
-   -0.058258265f, -0.998301545f,
-   -0.056726821f, -0.998389737f,
-   -0.055195244f, -0.998475581f,
-   -0.053663538f, -0.998559074f,
-   -0.052131705f, -0.998640218f,
-   -0.050599749f, -0.998719012f,
-   -0.049067674f, -0.998795456f,
-   -0.047535484f, -0.998869550f,
-   -0.046003182f, -0.998941293f,
-   -0.044470772f, -0.999010686f,
-   -0.042938257f, -0.999077728f,
-   -0.041405641f, -0.999142419f,
-   -0.039872928f, -0.999204759f,
-   -0.038340120f, -0.999264747f,
-   -0.036807223f, -0.999322385f,
-   -0.035274239f, -0.999377670f,
-   -0.033741172f, -0.999430605f,
-   -0.032208025f, -0.999481187f,
-   -0.030674803f, -0.999529418f,
-   -0.029141509f, -0.999575296f,
-   -0.027608146f, -0.999618822f,
-   -0.026074718f, -0.999659997f,
-   -0.024541229f, -0.999698819f,
-   -0.023007681f, -0.999735288f,
-   -0.021474080f, -0.999769405f,
-   -0.019940429f, -0.999801170f,
-   -0.018406730f, -0.999830582f,
-   -0.016872988f, -0.999857641f,
-   -0.015339206f, -0.999882347f,
-   -0.013805389f, -0.999904701f,
-   -0.012271538f, -0.999924702f,
-   -0.010737659f, -0.999942350f,
-   -0.009203755f, -0.999957645f,
-   -0.007669829f, -0.999970586f,
-   -0.006135885f, -0.999981175f,
-   -0.004601926f, -0.999989411f,
-   -0.003067957f, -0.999995294f,
-   -0.001533980f, -0.999998823f,
-   -0.000000000f, -1.000000000f,
-    0.001533980f, -0.999998823f,
-    0.003067957f, -0.999995294f,
-    0.004601926f, -0.999989411f,
-    0.006135885f, -0.999981175f,
-    0.007669829f, -0.999970586f,
-    0.009203755f, -0.999957645f,
-    0.010737659f, -0.999942350f,
-    0.012271538f, -0.999924702f,
-    0.013805389f, -0.999904701f,
-    0.015339206f, -0.999882347f,
-    0.016872988f, -0.999857641f,
-    0.018406730f, -0.999830582f,
-    0.019940429f, -0.999801170f,
-    0.021474080f, -0.999769405f,
-    0.023007681f, -0.999735288f,
-    0.024541229f, -0.999698819f,
-    0.026074718f, -0.999659997f,
-    0.027608146f, -0.999618822f,
-    0.029141509f, -0.999575296f,
-    0.030674803f, -0.999529418f,
-    0.032208025f, -0.999481187f,
-    0.033741172f, -0.999430605f,
-    0.035274239f, -0.999377670f,
-    0.036807223f, -0.999322385f,
-    0.038340120f, -0.999264747f,
-    0.039872928f, -0.999204759f,
-    0.041405641f, -0.999142419f,
-    0.042938257f, -0.999077728f,
-    0.044470772f, -0.999010686f,
-    0.046003182f, -0.998941293f,
-    0.047535484f, -0.998869550f,
-    0.049067674f, -0.998795456f,
-    0.050599749f, -0.998719012f,
-    0.052131705f, -0.998640218f,
-    0.053663538f, -0.998559074f,
-    0.055195244f, -0.998475581f,
-    0.056726821f, -0.998389737f,
-    0.058258265f, -0.998301545f,
-    0.059789571f, -0.998211003f,
-    0.061320736f, -0.998118113f,
-    0.062851758f, -0.998022874f,
-    0.064382631f, -0.997925286f,
-    0.065913353f, -0.997825350f,
-    0.067443920f, -0.997723067f,
-    0.068974328f, -0.997618435f,
-    0.070504573f, -0.997511456f,
-    0.072034653f, -0.997402130f,
-    0.073564564f, -0.997290457f,
-    0.075094301f, -0.997176437f,
-    0.076623861f, -0.997060070f,
-    0.078153242f, -0.996941358f,
-    0.079682438f, -0.996820299f,
-    0.081211447f, -0.996696895f,
-    0.082740265f, -0.996571146f,
-    0.084268888f, -0.996443051f,
-    0.085797312f, -0.996312612f,
-    0.087325535f, -0.996179829f,
-    0.088853553f, -0.996044701f,
-    0.090381361f, -0.995907229f,
-    0.091908956f, -0.995767414f,
-    0.093436336f, -0.995625256f,
-    0.094963495f, -0.995480755f,
-    0.096490431f, -0.995333912f,
-    0.098017140f, -0.995184727f,
-    0.099543619f, -0.995033199f,
-    0.101069863f, -0.994879331f,
-    0.102595869f, -0.994723121f,
-    0.104121634f, -0.994564571f,
-    0.105647154f, -0.994403680f,
-    0.107172425f, -0.994240449f,
-    0.108697444f, -0.994074879f,
-    0.110222207f, -0.993906970f,
-    0.111746711f, -0.993736722f,
-    0.113270952f, -0.993564136f,
-    0.114794927f, -0.993389211f,
-    0.116318631f, -0.993211949f,
-    0.117842062f, -0.993032350f,
-    0.119365215f, -0.992850414f,
-    0.120888087f, -0.992666142f,
-    0.122410675f, -0.992479535f,
-    0.123932975f, -0.992290591f,
-    0.125454983f, -0.992099313f,
-    0.126976696f, -0.991905700f,
-    0.128498111f, -0.991709754f,
-    0.130019223f, -0.991511473f,
-    0.131540029f, -0.991310860f,
-    0.133060525f, -0.991107914f,
-    0.134580709f, -0.990902635f,
-    0.136100575f, -0.990695025f,
-    0.137620122f, -0.990485084f,
-    0.139139344f, -0.990272812f,
-    0.140658239f, -0.990058210f,
-    0.142176804f, -0.989841278f,
-    0.143695033f, -0.989622017f,
-    0.145212925f, -0.989400428f,
-    0.146730474f, -0.989176510f,
-    0.148247679f, -0.988950265f,
-    0.149764535f, -0.988721692f,
-    0.151281038f, -0.988490793f,
-    0.152797185f, -0.988257568f,
-    0.154312973f, -0.988022017f,
-    0.155828398f, -0.987784142f,
-    0.157343456f, -0.987543942f,
-    0.158858143f, -0.987301418f,
-    0.160372457f, -0.987056571f,
-    0.161886394f, -0.986809402f,
-    0.163399949f, -0.986559910f,
-    0.164913120f, -0.986308097f,
-    0.166425904f, -0.986053963f,
-    0.167938295f, -0.985797509f,
-    0.169450291f, -0.985538735f,
-    0.170961889f, -0.985277642f,
-    0.172473084f, -0.985014231f,
-    0.173983873f, -0.984748502f,
-    0.175494253f, -0.984480455f,
-    0.177004220f, -0.984210092f,
-    0.178513771f, -0.983937413f,
-    0.180022901f, -0.983662419f,
-    0.181531608f, -0.983385110f,
-    0.183039888f, -0.983105487f,
-    0.184547737f, -0.982823551f,
-    0.186055152f, -0.982539302f,
-    0.187562129f, -0.982252741f,
-    0.189068664f, -0.981963869f,
-    0.190574755f, -0.981672686f,
-    0.192080397f, -0.981379193f,
-    0.193585587f, -0.981083391f,
-    0.195090322f, -0.980785280f,
-    0.196594598f, -0.980484862f,
-    0.198098411f, -0.980182136f,
-    0.199601758f, -0.979877104f,
-    0.201104635f, -0.979569766f,
-    0.202607039f, -0.979260123f,
-    0.204108966f, -0.978948175f,
-    0.205610413f, -0.978633924f,
-    0.207111376f, -0.978317371f,
-    0.208611852f, -0.977998515f,
-    0.210111837f, -0.977677358f,
-    0.211611327f, -0.977353900f,
-    0.213110320f, -0.977028143f,
-    0.214608811f, -0.976700086f,
-    0.216106797f, -0.976369731f,
-    0.217604275f, -0.976037079f,
-    0.219101240f, -0.975702130f,
-    0.220597690f, -0.975364885f,
-    0.222093621f, -0.975025345f,
-    0.223589029f, -0.974683511f,
-    0.225083911f, -0.974339383f,
-    0.226578264f, -0.973992962f,
-    0.228072083f, -0.973644250f,
-    0.229565366f, -0.973293246f,
-    0.231058108f, -0.972939952f,
-    0.232550307f, -0.972584369f,
-    0.234041959f, -0.972226497f,
-    0.235533059f, -0.971866337f,
-    0.237023606f, -0.971503891f,
-    0.238513595f, -0.971139158f,
-    0.240003022f, -0.970772141f,
-    0.241491885f, -0.970402839f,
-    0.242980180f, -0.970031253f,
-    0.244467903f, -0.969657385f,
-    0.245955050f, -0.969281235f,
-    0.247441619f, -0.968902805f,
-    0.248927606f, -0.968522094f,
-    0.250413007f, -0.968139105f,
-    0.251897818f, -0.967753837f,
-    0.253382037f, -0.967366292f,
-    0.254865660f, -0.966976471f,
-    0.256348682f, -0.966584374f,
-    0.257831102f, -0.966190003f,
-    0.259312915f, -0.965793359f,
-    0.260794118f, -0.965394442f,
-    0.262274707f, -0.964993253f,
-    0.263754679f, -0.964589793f,
-    0.265234030f, -0.964184064f,
-    0.266712757f, -0.963776066f,
-    0.268190857f, -0.963365800f,
-    0.269668326f, -0.962953267f,
-    0.271145160f, -0.962538468f,
-    0.272621355f, -0.962121404f,
-    0.274096910f, -0.961702077f,
-    0.275571819f, -0.961280486f,
-    0.277046080f, -0.960856633f,
-    0.278519689f, -0.960430519f,
-    0.279992643f, -0.960002146f,
-    0.281464938f, -0.959571513f,
-    0.282936570f, -0.959138622f,
-    0.284407537f, -0.958703475f,
-    0.285877835f, -0.958266071f,
-    0.287347460f, -0.957826413f,
-    0.288816408f, -0.957384501f,
-    0.290284677f, -0.956940336f,
-    0.291752263f, -0.956493919f,
-    0.293219163f, -0.956045251f,
-    0.294685372f, -0.955594334f,
-    0.296150888f, -0.955141168f,
-    0.297615707f, -0.954685755f,
-    0.299079826f, -0.954228095f,
-    0.300543241f, -0.953768190f,
-    0.302005949f, -0.953306040f,
-    0.303467947f, -0.952841648f,
-    0.304929230f, -0.952375013f,
-    0.306389795f, -0.951906137f,
-    0.307849640f, -0.951435021f,
-    0.309308760f, -0.950961666f,
-    0.310767153f, -0.950486074f,
-    0.312224814f, -0.950008245f,
-    0.313681740f, -0.949528181f,
-    0.315137929f, -0.949045882f,
-    0.316593376f, -0.948561350f,
-    0.318048077f, -0.948074586f,
-    0.319502031f, -0.947585591f,
-    0.320955232f, -0.947094366f,
-    0.322407679f, -0.946600913f,
-    0.323859367f, -0.946105232f,
-    0.325310292f, -0.945607325f,
-    0.326760452f, -0.945107193f,
-    0.328209844f, -0.944604837f,
-    0.329658463f, -0.944100258f,
-    0.331106306f, -0.943593458f,
-    0.332553370f, -0.943084437f,
-    0.333999651f, -0.942573198f,
-    0.335445147f, -0.942059740f,
-    0.336889853f, -0.941544065f,
-    0.338333767f, -0.941026175f,
-    0.339776884f, -0.940506071f,
-    0.341219202f, -0.939983753f,
-    0.342660717f, -0.939459224f,
-    0.344101426f, -0.938932484f,
-    0.345541325f, -0.938403534f,
-    0.346980411f, -0.937872376f,
-    0.348418680f, -0.937339012f,
-    0.349856130f, -0.936803442f,
-    0.351292756f, -0.936265667f,
-    0.352728556f, -0.935725689f,
-    0.354163525f, -0.935183510f,
-    0.355597662f, -0.934639130f,
-    0.357030961f, -0.934092550f,
-    0.358463421f, -0.933543773f,
-    0.359895037f, -0.932992799f,
-    0.361325806f, -0.932439629f,
-    0.362755724f, -0.931884266f,
-    0.364184790f, -0.931326709f,
-    0.365612998f, -0.930766961f,
-    0.367040346f, -0.930205023f,
-    0.368466830f, -0.929640896f,
-    0.369892447f, -0.929074581f,
-    0.371317194f, -0.928506080f,
-    0.372741067f, -0.927935395f,
-    0.374164063f, -0.927362526f,
-    0.375586178f, -0.926787474f,
-    0.377007410f, -0.926210242f,
-    0.378427755f, -0.925630831f,
-    0.379847209f, -0.925049241f,
-    0.381265769f, -0.924465474f,
-    0.382683432f, -0.923879533f,
-    0.384100195f, -0.923291417f,
-    0.385516054f, -0.922701128f,
-    0.386931006f, -0.922108669f,
-    0.388345047f, -0.921514039f,
-    0.389758174f, -0.920917242f,
-    0.391170384f, -0.920318277f,
-    0.392581674f, -0.919717146f,
-    0.393992040f, -0.919113852f,
-    0.395401479f, -0.918508394f,
-    0.396809987f, -0.917900776f,
-    0.398217562f, -0.917290997f,
-    0.399624200f, -0.916679060f,
-    0.401029897f, -0.916064966f,
-    0.402434651f, -0.915448716f,
-    0.403838458f, -0.914830312f,
-    0.405241314f, -0.914209756f,
-    0.406643217f, -0.913587048f,
-    0.408044163f, -0.912962190f,
-    0.409444149f, -0.912335185f,
-    0.410843171f, -0.911706032f,
-    0.412241227f, -0.911074734f,
-    0.413638312f, -0.910441292f,
-    0.415034424f, -0.909805708f,
-    0.416429560f, -0.909167983f,
-    0.417823716f, -0.908528119f,
-    0.419216888f, -0.907886116f,
-    0.420609074f, -0.907241978f,
-    0.422000271f, -0.906595705f,
-    0.423390474f, -0.905947298f,
-    0.424779681f, -0.905296759f,
-    0.426167889f, -0.904644091f,
-    0.427555093f, -0.903989293f,
-    0.428941292f, -0.903332368f,
-    0.430326481f, -0.902673318f,
-    0.431710658f, -0.902012144f,
-    0.433093819f, -0.901348847f,
-    0.434475961f, -0.900683429f,
-    0.435857080f, -0.900015892f,
-    0.437237174f, -0.899346237f,
-    0.438616239f, -0.898674466f,
-    0.439994271f, -0.898000580f,
-    0.441371269f, -0.897324581f,
-    0.442747228f, -0.896646470f,
-    0.444122145f, -0.895966250f,
-    0.445496017f, -0.895283921f,
-    0.446868840f, -0.894599486f,
-    0.448240612f, -0.893912945f,
-    0.449611330f, -0.893224301f,
-    0.450980989f, -0.892533555f,
-    0.452349587f, -0.891840709f,
-    0.453717121f, -0.891145765f,
-    0.455083587f, -0.890448723f,
-    0.456448982f, -0.889749586f,
-    0.457813304f, -0.889048356f,
-    0.459176548f, -0.888345033f,
-    0.460538711f, -0.887639620f,
-    0.461899791f, -0.886932119f,
-    0.463259784f, -0.886222530f,
-    0.464618686f, -0.885510856f,
-    0.465976496f, -0.884797098f,
-    0.467333209f, -0.884081259f,
-    0.468688822f, -0.883363339f,
-    0.470043332f, -0.882643340f,
-    0.471396737f, -0.881921264f,
-    0.472749032f, -0.881197113f,
-    0.474100215f, -0.880470889f,
-    0.475450282f, -0.879742593f,
-    0.476799230f, -0.879012226f,
-    0.478147056f, -0.878279792f,
-    0.479493758f, -0.877545290f,
-    0.480839331f, -0.876808724f,
-    0.482183772f, -0.876070094f,
-    0.483527079f, -0.875329403f,
-    0.484869248f, -0.874586652f,
-    0.486210276f, -0.873841843f,
-    0.487550160f, -0.873094978f,
-    0.488888897f, -0.872346059f,
-    0.490226483f, -0.871595087f,
-    0.491562916f, -0.870842063f,
-    0.492898192f, -0.870086991f,
-    0.494232309f, -0.869329871f,
-    0.495565262f, -0.868570706f,
-    0.496897049f, -0.867809497f,
-    0.498227667f, -0.867046246f,
-    0.499557113f, -0.866280954f,
-    0.500885383f, -0.865513624f,
-    0.502212474f, -0.864744258f,
-    0.503538384f, -0.863972856f,
-    0.504863109f, -0.863199422f,
-    0.506186645f, -0.862423956f,
-    0.507508991f, -0.861646461f,
-    0.508830143f, -0.860866939f,
-    0.510150097f, -0.860085390f,
-    0.511468850f, -0.859301818f,
-    0.512786401f, -0.858516224f,
-    0.514102744f, -0.857728610f,
-    0.515417878f, -0.856938977f,
-    0.516731799f, -0.856147328f,
-    0.518044504f, -0.855353665f,
-    0.519355990f, -0.854557988f,
-    0.520666254f, -0.853760301f,
-    0.521975293f, -0.852960605f,
-    0.523283103f, -0.852158902f,
-    0.524589683f, -0.851355193f,
-    0.525895027f, -0.850549481f,
-    0.527199135f, -0.849741768f,
-    0.528502002f, -0.848932055f,
-    0.529803625f, -0.848120345f,
-    0.531104001f, -0.847306639f,
-    0.532403128f, -0.846490939f,
-    0.533701002f, -0.845673247f,
-    0.534997620f, -0.844853565f,
-    0.536292979f, -0.844031895f,
-    0.537587076f, -0.843208240f,
-    0.538879909f, -0.842382600f,
-    0.540171473f, -0.841554977f,
-    0.541461766f, -0.840725375f,
-    0.542750785f, -0.839893794f,
-    0.544038527f, -0.839060237f,
-    0.545324988f, -0.838224706f,
-    0.546610167f, -0.837387202f,
-    0.547894059f, -0.836547727f,
-    0.549176662f, -0.835706284f,
-    0.550457973f, -0.834862875f,
-    0.551737988f, -0.834017501f,
-    0.553016706f, -0.833170165f,
-    0.554294121f, -0.832320868f,
-    0.555570233f, -0.831469612f,
-    0.556845037f, -0.830616400f,
-    0.558118531f, -0.829761234f,
-    0.559390712f, -0.828904115f,
-    0.560661576f, -0.828045045f,
-    0.561931121f, -0.827184027f,
-    0.563199344f, -0.826321063f,
-    0.564466242f, -0.825456154f,
-    0.565731811f, -0.824589303f,
-    0.566996049f, -0.823720511f,
-    0.568258953f, -0.822849781f,
-    0.569520519f, -0.821977115f,
-    0.570780746f, -0.821102515f,
-    0.572039629f, -0.820225983f,
-    0.573297167f, -0.819347520f,
-    0.574553355f, -0.818467130f,
-    0.575808191f, -0.817584813f,
-    0.577061673f, -0.816700573f,
-    0.578313796f, -0.815814411f,
-    0.579564559f, -0.814926329f,
-    0.580813958f, -0.814036330f,
-    0.582061990f, -0.813144415f,
-    0.583308653f, -0.812250587f,
-    0.584553943f, -0.811354847f,
-    0.585797857f, -0.810457198f,
-    0.587040394f, -0.809557642f,
-    0.588281548f, -0.808656182f,
-    0.589521319f, -0.807752818f,
-    0.590759702f, -0.806847554f,
-    0.591996695f, -0.805940391f,
-    0.593232295f, -0.805031331f,
-    0.594466499f, -0.804120377f,
-    0.595699304f, -0.803207531f,
-    0.596930708f, -0.802292796f,
-    0.598160707f, -0.801376172f,
-    0.599389298f, -0.800457662f,
-    0.600616479f, -0.799537269f,
-    0.601842247f, -0.798614995f,
-    0.603066599f, -0.797690841f,
-    0.604289531f, -0.796764810f,
-    0.605511041f, -0.795836905f,
-    0.606731127f, -0.794907126f,
-    0.607949785f, -0.793975478f,
-    0.609167012f, -0.793041960f,
-    0.610382806f, -0.792106577f,
-    0.611597164f, -0.791169330f,
-    0.612810082f, -0.790230221f,
-    0.614021559f, -0.789289253f,
-    0.615231591f, -0.788346428f,
-    0.616440175f, -0.787401747f,
-    0.617647308f, -0.786455214f,
-    0.618852988f, -0.785506830f,
-    0.620057212f, -0.784556597f,
-    0.621259977f, -0.783604519f,
-    0.622461279f, -0.782650596f,
-    0.623661118f, -0.781694832f,
-    0.624859488f, -0.780737229f,
-    0.626056388f, -0.779777788f,
-    0.627251815f, -0.778816512f,
-    0.628445767f, -0.777853404f,
-    0.629638239f, -0.776888466f,
-    0.630829230f, -0.775921699f,
-    0.632018736f, -0.774953107f,
-    0.633206755f, -0.773982691f,
-    0.634393284f, -0.773010453f,
-    0.635578320f, -0.772036397f,
-    0.636761861f, -0.771060524f,
-    0.637943904f, -0.770082837f,
-    0.639124445f, -0.769103338f,
-    0.640303482f, -0.768122029f,
-    0.641481013f, -0.767138912f,
-    0.642657034f, -0.766153990f,
-    0.643831543f, -0.765167266f,
-    0.645004537f, -0.764178741f,
-    0.646176013f, -0.763188417f,
-    0.647345969f, -0.762196298f,
-    0.648514401f, -0.761202385f,
-    0.649681307f, -0.760206682f,
-    0.650846685f, -0.759209189f,
-    0.652010531f, -0.758209910f,
-    0.653172843f, -0.757208847f,
-    0.654333618f, -0.756206001f,
-    0.655492853f, -0.755201377f,
-    0.656650546f, -0.754194975f,
-    0.657806693f, -0.753186799f,
-    0.658961293f, -0.752176850f,
-    0.660114342f, -0.751165132f,
-    0.661265838f, -0.750151646f,
-    0.662415778f, -0.749136395f,
-    0.663564159f, -0.748119380f,
-    0.664710978f, -0.747100606f,
-    0.665856234f, -0.746080074f,
-    0.666999922f, -0.745057785f,
-    0.668142041f, -0.744033744f,
-    0.669282588f, -0.743007952f,
-    0.670421560f, -0.741980412f,
-    0.671558955f, -0.740951125f,
-    0.672694769f, -0.739920095f,
-    0.673829000f, -0.738887324f,
-    0.674961646f, -0.737852815f,
-    0.676092704f, -0.736816569f,
-    0.677222170f, -0.735778589f,
-    0.678350043f, -0.734738878f,
-    0.679476320f, -0.733697438f,
-    0.680600998f, -0.732654272f,
-    0.681724074f, -0.731609381f,
-    0.682845546f, -0.730562769f,
-    0.683965412f, -0.729514438f,
-    0.685083668f, -0.728464390f,
-    0.686200312f, -0.727412629f,
-    0.687315341f, -0.726359155f,
-    0.688428753f, -0.725303972f,
-    0.689540545f, -0.724247083f,
-    0.690650714f, -0.723188489f,
-    0.691759258f, -0.722128194f,
-    0.692866175f, -0.721066199f,
-    0.693971461f, -0.720002508f,
-    0.695075114f, -0.718937122f,
-    0.696177131f, -0.717870045f,
-    0.697277511f, -0.716801279f,
-    0.698376249f, -0.715730825f,
-    0.699473345f, -0.714658688f,
-    0.700568794f, -0.713584869f,
-    0.701662595f, -0.712509371f,
-    0.702754744f, -0.711432196f,
-    0.703845241f, -0.710353347f,
-    0.704934080f, -0.709272826f,
-    0.706021261f, -0.708190637f,
-    0.707106781f, -0.707106781f,
-    0.708190637f, -0.706021261f,
-    0.709272826f, -0.704934080f,
-    0.710353347f, -0.703845241f,
-    0.711432196f, -0.702754744f,
-    0.712509371f, -0.701662595f,
-    0.713584869f, -0.700568794f,
-    0.714658688f, -0.699473345f,
-    0.715730825f, -0.698376249f,
-    0.716801279f, -0.697277511f,
-    0.717870045f, -0.696177131f,
-    0.718937122f, -0.695075114f,
-    0.720002508f, -0.693971461f,
-    0.721066199f, -0.692866175f,
-    0.722128194f, -0.691759258f,
-    0.723188489f, -0.690650714f,
-    0.724247083f, -0.689540545f,
-    0.725303972f, -0.688428753f,
-    0.726359155f, -0.687315341f,
-    0.727412629f, -0.686200312f,
-    0.728464390f, -0.685083668f,
-    0.729514438f, -0.683965412f,
-    0.730562769f, -0.682845546f,
-    0.731609381f, -0.681724074f,
-    0.732654272f, -0.680600998f,
-    0.733697438f, -0.679476320f,
-    0.734738878f, -0.678350043f,
-    0.735778589f, -0.677222170f,
-    0.736816569f, -0.676092704f,
-    0.737852815f, -0.674961646f,
-    0.738887324f, -0.673829000f,
-    0.739920095f, -0.672694769f,
-    0.740951125f, -0.671558955f,
-    0.741980412f, -0.670421560f,
-    0.743007952f, -0.669282588f,
-    0.744033744f, -0.668142041f,
-    0.745057785f, -0.666999922f,
-    0.746080074f, -0.665856234f,
-    0.747100606f, -0.664710978f,
-    0.748119380f, -0.663564159f,
-    0.749136395f, -0.662415778f,
-    0.750151646f, -0.661265838f,
-    0.751165132f, -0.660114342f,
-    0.752176850f, -0.658961293f,
-    0.753186799f, -0.657806693f,
-    0.754194975f, -0.656650546f,
-    0.755201377f, -0.655492853f,
-    0.756206001f, -0.654333618f,
-    0.757208847f, -0.653172843f,
-    0.758209910f, -0.652010531f,
-    0.759209189f, -0.650846685f,
-    0.760206682f, -0.649681307f,
-    0.761202385f, -0.648514401f,
-    0.762196298f, -0.647345969f,
-    0.763188417f, -0.646176013f,
-    0.764178741f, -0.645004537f,
-    0.765167266f, -0.643831543f,
-    0.766153990f, -0.642657034f,
-    0.767138912f, -0.641481013f,
-    0.768122029f, -0.640303482f,
-    0.769103338f, -0.639124445f,
-    0.770082837f, -0.637943904f,
-    0.771060524f, -0.636761861f,
-    0.772036397f, -0.635578320f,
-    0.773010453f, -0.634393284f,
-    0.773982691f, -0.633206755f,
-    0.774953107f, -0.632018736f,
-    0.775921699f, -0.630829230f,
-    0.776888466f, -0.629638239f,
-    0.777853404f, -0.628445767f,
-    0.778816512f, -0.627251815f,
-    0.779777788f, -0.626056388f,
-    0.780737229f, -0.624859488f,
-    0.781694832f, -0.623661118f,
-    0.782650596f, -0.622461279f,
-    0.783604519f, -0.621259977f,
-    0.784556597f, -0.620057212f,
-    0.785506830f, -0.618852988f,
-    0.786455214f, -0.617647308f,
-    0.787401747f, -0.616440175f,
-    0.788346428f, -0.615231591f,
-    0.789289253f, -0.614021559f,
-    0.790230221f, -0.612810082f,
-    0.791169330f, -0.611597164f,
-    0.792106577f, -0.610382806f,
-    0.793041960f, -0.609167012f,
-    0.793975478f, -0.607949785f,
-    0.794907126f, -0.606731127f,
-    0.795836905f, -0.605511041f,
-    0.796764810f, -0.604289531f,
-    0.797690841f, -0.603066599f,
-    0.798614995f, -0.601842247f,
-    0.799537269f, -0.600616479f,
-    0.800457662f, -0.599389298f,
-    0.801376172f, -0.598160707f,
-    0.802292796f, -0.596930708f,
-    0.803207531f, -0.595699304f,
-    0.804120377f, -0.594466499f,
-    0.805031331f, -0.593232295f,
-    0.805940391f, -0.591996695f,
-    0.806847554f, -0.590759702f,
-    0.807752818f, -0.589521319f,
-    0.808656182f, -0.588281548f,
-    0.809557642f, -0.587040394f,
-    0.810457198f, -0.585797857f,
-    0.811354847f, -0.584553943f,
-    0.812250587f, -0.583308653f,
-    0.813144415f, -0.582061990f,
-    0.814036330f, -0.580813958f,
-    0.814926329f, -0.579564559f,
-    0.815814411f, -0.578313796f,
-    0.816700573f, -0.577061673f,
-    0.817584813f, -0.575808191f,
-    0.818467130f, -0.574553355f,
-    0.819347520f, -0.573297167f,
-    0.820225983f, -0.572039629f,
-    0.821102515f, -0.570780746f,
-    0.821977115f, -0.569520519f,
-    0.822849781f, -0.568258953f,
-    0.823720511f, -0.566996049f,
-    0.824589303f, -0.565731811f,
-    0.825456154f, -0.564466242f,
-    0.826321063f, -0.563199344f,
-    0.827184027f, -0.561931121f,
-    0.828045045f, -0.560661576f,
-    0.828904115f, -0.559390712f,
-    0.829761234f, -0.558118531f,
-    0.830616400f, -0.556845037f,
-    0.831469612f, -0.555570233f,
-    0.832320868f, -0.554294121f,
-    0.833170165f, -0.553016706f,
-    0.834017501f, -0.551737988f,
-    0.834862875f, -0.550457973f,
-    0.835706284f, -0.549176662f,
-    0.836547727f, -0.547894059f,
-    0.837387202f, -0.546610167f,
-    0.838224706f, -0.545324988f,
-    0.839060237f, -0.544038527f,
-    0.839893794f, -0.542750785f,
-    0.840725375f, -0.541461766f,
-    0.841554977f, -0.540171473f,
-    0.842382600f, -0.538879909f,
-    0.843208240f, -0.537587076f,
-    0.844031895f, -0.536292979f,
-    0.844853565f, -0.534997620f,
-    0.845673247f, -0.533701002f,
-    0.846490939f, -0.532403128f,
-    0.847306639f, -0.531104001f,
-    0.848120345f, -0.529803625f,
-    0.848932055f, -0.528502002f,
-    0.849741768f, -0.527199135f,
-    0.850549481f, -0.525895027f,
-    0.851355193f, -0.524589683f,
-    0.852158902f, -0.523283103f,
-    0.852960605f, -0.521975293f,
-    0.853760301f, -0.520666254f,
-    0.854557988f, -0.519355990f,
-    0.855353665f, -0.518044504f,
-    0.856147328f, -0.516731799f,
-    0.856938977f, -0.515417878f,
-    0.857728610f, -0.514102744f,
-    0.858516224f, -0.512786401f,
-    0.859301818f, -0.511468850f,
-    0.860085390f, -0.510150097f,
-    0.860866939f, -0.508830143f,
-    0.861646461f, -0.507508991f,
-    0.862423956f, -0.506186645f,
-    0.863199422f, -0.504863109f,
-    0.863972856f, -0.503538384f,
-    0.864744258f, -0.502212474f,
-    0.865513624f, -0.500885383f,
-    0.866280954f, -0.499557113f,
-    0.867046246f, -0.498227667f,
-    0.867809497f, -0.496897049f,
-    0.868570706f, -0.495565262f,
-    0.869329871f, -0.494232309f,
-    0.870086991f, -0.492898192f,
-    0.870842063f, -0.491562916f,
-    0.871595087f, -0.490226483f,
-    0.872346059f, -0.488888897f,
-    0.873094978f, -0.487550160f,
-    0.873841843f, -0.486210276f,
-    0.874586652f, -0.484869248f,
-    0.875329403f, -0.483527079f,
-    0.876070094f, -0.482183772f,
-    0.876808724f, -0.480839331f,
-    0.877545290f, -0.479493758f,
-    0.878279792f, -0.478147056f,
-    0.879012226f, -0.476799230f,
-    0.879742593f, -0.475450282f,
-    0.880470889f, -0.474100215f,
-    0.881197113f, -0.472749032f,
-    0.881921264f, -0.471396737f,
-    0.882643340f, -0.470043332f,
-    0.883363339f, -0.468688822f,
-    0.884081259f, -0.467333209f,
-    0.884797098f, -0.465976496f,
-    0.885510856f, -0.464618686f,
-    0.886222530f, -0.463259784f,
-    0.886932119f, -0.461899791f,
-    0.887639620f, -0.460538711f,
-    0.888345033f, -0.459176548f,
-    0.889048356f, -0.457813304f,
-    0.889749586f, -0.456448982f,
-    0.890448723f, -0.455083587f,
-    0.891145765f, -0.453717121f,
-    0.891840709f, -0.452349587f,
-    0.892533555f, -0.450980989f,
-    0.893224301f, -0.449611330f,
-    0.893912945f, -0.448240612f,
-    0.894599486f, -0.446868840f,
-    0.895283921f, -0.445496017f,
-    0.895966250f, -0.444122145f,
-    0.896646470f, -0.442747228f,
-    0.897324581f, -0.441371269f,
-    0.898000580f, -0.439994271f,
-    0.898674466f, -0.438616239f,
-    0.899346237f, -0.437237174f,
-    0.900015892f, -0.435857080f,
-    0.900683429f, -0.434475961f,
-    0.901348847f, -0.433093819f,
-    0.902012144f, -0.431710658f,
-    0.902673318f, -0.430326481f,
-    0.903332368f, -0.428941292f,
-    0.903989293f, -0.427555093f,
-    0.904644091f, -0.426167889f,
-    0.905296759f, -0.424779681f,
-    0.905947298f, -0.423390474f,
-    0.906595705f, -0.422000271f,
-    0.907241978f, -0.420609074f,
-    0.907886116f, -0.419216888f,
-    0.908528119f, -0.417823716f,
-    0.909167983f, -0.416429560f,
-    0.909805708f, -0.415034424f,
-    0.910441292f, -0.413638312f,
-    0.911074734f, -0.412241227f,
-    0.911706032f, -0.410843171f,
-    0.912335185f, -0.409444149f,
-    0.912962190f, -0.408044163f,
-    0.913587048f, -0.406643217f,
-    0.914209756f, -0.405241314f,
-    0.914830312f, -0.403838458f,
-    0.915448716f, -0.402434651f,
-    0.916064966f, -0.401029897f,
-    0.916679060f, -0.399624200f,
-    0.917290997f, -0.398217562f,
-    0.917900776f, -0.396809987f,
-    0.918508394f, -0.395401479f,
-    0.919113852f, -0.393992040f,
-    0.919717146f, -0.392581674f,
-    0.920318277f, -0.391170384f,
-    0.920917242f, -0.389758174f,
-    0.921514039f, -0.388345047f,
-    0.922108669f, -0.386931006f,
-    0.922701128f, -0.385516054f,
-    0.923291417f, -0.384100195f,
-    0.923879533f, -0.382683432f,
-    0.924465474f, -0.381265769f,
-    0.925049241f, -0.379847209f,
-    0.925630831f, -0.378427755f,
-    0.926210242f, -0.377007410f,
-    0.926787474f, -0.375586178f,
-    0.927362526f, -0.374164063f,
-    0.927935395f, -0.372741067f,
-    0.928506080f, -0.371317194f,
-    0.929074581f, -0.369892447f,
-    0.929640896f, -0.368466830f,
-    0.930205023f, -0.367040346f,
-    0.930766961f, -0.365612998f,
-    0.931326709f, -0.364184790f,
-    0.931884266f, -0.362755724f,
-    0.932439629f, -0.361325806f,
-    0.932992799f, -0.359895037f,
-    0.933543773f, -0.358463421f,
-    0.934092550f, -0.357030961f,
-    0.934639130f, -0.355597662f,
-    0.935183510f, -0.354163525f,
-    0.935725689f, -0.352728556f,
-    0.936265667f, -0.351292756f,
-    0.936803442f, -0.349856130f,
-    0.937339012f, -0.348418680f,
-    0.937872376f, -0.346980411f,
-    0.938403534f, -0.345541325f,
-    0.938932484f, -0.344101426f,
-    0.939459224f, -0.342660717f,
-    0.939983753f, -0.341219202f,
-    0.940506071f, -0.339776884f,
-    0.941026175f, -0.338333767f,
-    0.941544065f, -0.336889853f,
-    0.942059740f, -0.335445147f,
-    0.942573198f, -0.333999651f,
-    0.943084437f, -0.332553370f,
-    0.943593458f, -0.331106306f,
-    0.944100258f, -0.329658463f,
-    0.944604837f, -0.328209844f,
-    0.945107193f, -0.326760452f,
-    0.945607325f, -0.325310292f,
-    0.946105232f, -0.323859367f,
-    0.946600913f, -0.322407679f,
-    0.947094366f, -0.320955232f,
-    0.947585591f, -0.319502031f,
-    0.948074586f, -0.318048077f,
-    0.948561350f, -0.316593376f,
-    0.949045882f, -0.315137929f,
-    0.949528181f, -0.313681740f,
-    0.950008245f, -0.312224814f,
-    0.950486074f, -0.310767153f,
-    0.950961666f, -0.309308760f,
-    0.951435021f, -0.307849640f,
-    0.951906137f, -0.306389795f,
-    0.952375013f, -0.304929230f,
-    0.952841648f, -0.303467947f,
-    0.953306040f, -0.302005949f,
-    0.953768190f, -0.300543241f,
-    0.954228095f, -0.299079826f,
-    0.954685755f, -0.297615707f,
-    0.955141168f, -0.296150888f,
-    0.955594334f, -0.294685372f,
-    0.956045251f, -0.293219163f,
-    0.956493919f, -0.291752263f,
-    0.956940336f, -0.290284677f,
-    0.957384501f, -0.288816408f,
-    0.957826413f, -0.287347460f,
-    0.958266071f, -0.285877835f,
-    0.958703475f, -0.284407537f,
-    0.959138622f, -0.282936570f,
-    0.959571513f, -0.281464938f,
-    0.960002146f, -0.279992643f,
-    0.960430519f, -0.278519689f,
-    0.960856633f, -0.277046080f,
-    0.961280486f, -0.275571819f,
-    0.961702077f, -0.274096910f,
-    0.962121404f, -0.272621355f,
-    0.962538468f, -0.271145160f,
-    0.962953267f, -0.269668326f,
-    0.963365800f, -0.268190857f,
-    0.963776066f, -0.266712757f,
-    0.964184064f, -0.265234030f,
-    0.964589793f, -0.263754679f,
-    0.964993253f, -0.262274707f,
-    0.965394442f, -0.260794118f,
-    0.965793359f, -0.259312915f,
-    0.966190003f, -0.257831102f,
-    0.966584374f, -0.256348682f,
-    0.966976471f, -0.254865660f,
-    0.967366292f, -0.253382037f,
-    0.967753837f, -0.251897818f,
-    0.968139105f, -0.250413007f,
-    0.968522094f, -0.248927606f,
-    0.968902805f, -0.247441619f,
-    0.969281235f, -0.245955050f,
-    0.969657385f, -0.244467903f,
-    0.970031253f, -0.242980180f,
-    0.970402839f, -0.241491885f,
-    0.970772141f, -0.240003022f,
-    0.971139158f, -0.238513595f,
-    0.971503891f, -0.237023606f,
-    0.971866337f, -0.235533059f,
-    0.972226497f, -0.234041959f,
-    0.972584369f, -0.232550307f,
-    0.972939952f, -0.231058108f,
-    0.973293246f, -0.229565366f,
-    0.973644250f, -0.228072083f,
-    0.973992962f, -0.226578264f,
-    0.974339383f, -0.225083911f,
-    0.974683511f, -0.223589029f,
-    0.975025345f, -0.222093621f,
-    0.975364885f, -0.220597690f,
-    0.975702130f, -0.219101240f,
-    0.976037079f, -0.217604275f,
-    0.976369731f, -0.216106797f,
-    0.976700086f, -0.214608811f,
-    0.977028143f, -0.213110320f,
-    0.977353900f, -0.211611327f,
-    0.977677358f, -0.210111837f,
-    0.977998515f, -0.208611852f,
-    0.978317371f, -0.207111376f,
-    0.978633924f, -0.205610413f,
-    0.978948175f, -0.204108966f,
-    0.979260123f, -0.202607039f,
-    0.979569766f, -0.201104635f,
-    0.979877104f, -0.199601758f,
-    0.980182136f, -0.198098411f,
-    0.980484862f, -0.196594598f,
-    0.980785280f, -0.195090322f,
-    0.981083391f, -0.193585587f,
-    0.981379193f, -0.192080397f,
-    0.981672686f, -0.190574755f,
-    0.981963869f, -0.189068664f,
-    0.982252741f, -0.187562129f,
-    0.982539302f, -0.186055152f,
-    0.982823551f, -0.184547737f,
-    0.983105487f, -0.183039888f,
-    0.983385110f, -0.181531608f,
-    0.983662419f, -0.180022901f,
-    0.983937413f, -0.178513771f,
-    0.984210092f, -0.177004220f,
-    0.984480455f, -0.175494253f,
-    0.984748502f, -0.173983873f,
-    0.985014231f, -0.172473084f,
-    0.985277642f, -0.170961889f,
-    0.985538735f, -0.169450291f,
-    0.985797509f, -0.167938295f,
-    0.986053963f, -0.166425904f,
-    0.986308097f, -0.164913120f,
-    0.986559910f, -0.163399949f,
-    0.986809402f, -0.161886394f,
-    0.987056571f, -0.160372457f,
-    0.987301418f, -0.158858143f,
-    0.987543942f, -0.157343456f,
-    0.987784142f, -0.155828398f,
-    0.988022017f, -0.154312973f,
-    0.988257568f, -0.152797185f,
-    0.988490793f, -0.151281038f,
-    0.988721692f, -0.149764535f,
-    0.988950265f, -0.148247679f,
-    0.989176510f, -0.146730474f,
-    0.989400428f, -0.145212925f,
-    0.989622017f, -0.143695033f,
-    0.989841278f, -0.142176804f,
-    0.990058210f, -0.140658239f,
-    0.990272812f, -0.139139344f,
-    0.990485084f, -0.137620122f,
-    0.990695025f, -0.136100575f,
-    0.990902635f, -0.134580709f,
-    0.991107914f, -0.133060525f,
-    0.991310860f, -0.131540029f,
-    0.991511473f, -0.130019223f,
-    0.991709754f, -0.128498111f,
-    0.991905700f, -0.126976696f,
-    0.992099313f, -0.125454983f,
-    0.992290591f, -0.123932975f,
-    0.992479535f, -0.122410675f,
-    0.992666142f, -0.120888087f,
-    0.992850414f, -0.119365215f,
-    0.993032350f, -0.117842062f,
-    0.993211949f, -0.116318631f,
-    0.993389211f, -0.114794927f,
-    0.993564136f, -0.113270952f,
-    0.993736722f, -0.111746711f,
-    0.993906970f, -0.110222207f,
-    0.994074879f, -0.108697444f,
-    0.994240449f, -0.107172425f,
-    0.994403680f, -0.105647154f,
-    0.994564571f, -0.104121634f,
-    0.994723121f, -0.102595869f,
-    0.994879331f, -0.101069863f,
-    0.995033199f, -0.099543619f,
-    0.995184727f, -0.098017140f,
-    0.995333912f, -0.096490431f,
-    0.995480755f, -0.094963495f,
-    0.995625256f, -0.093436336f,
-    0.995767414f, -0.091908956f,
-    0.995907229f, -0.090381361f,
-    0.996044701f, -0.088853553f,
-    0.996179829f, -0.087325535f,
-    0.996312612f, -0.085797312f,
-    0.996443051f, -0.084268888f,
-    0.996571146f, -0.082740265f,
-    0.996696895f, -0.081211447f,
-    0.996820299f, -0.079682438f,
-    0.996941358f, -0.078153242f,
-    0.997060070f, -0.076623861f,
-    0.997176437f, -0.075094301f,
-    0.997290457f, -0.073564564f,
-    0.997402130f, -0.072034653f,
-    0.997511456f, -0.070504573f,
-    0.997618435f, -0.068974328f,
-    0.997723067f, -0.067443920f,
-    0.997825350f, -0.065913353f,
-    0.997925286f, -0.064382631f,
-    0.998022874f, -0.062851758f,
-    0.998118113f, -0.061320736f,
-    0.998211003f, -0.059789571f,
-    0.998301545f, -0.058258265f,
-    0.998389737f, -0.056726821f,
-    0.998475581f, -0.055195244f,
-    0.998559074f, -0.053663538f,
-    0.998640218f, -0.052131705f,
-    0.998719012f, -0.050599749f,
-    0.998795456f, -0.049067674f,
-    0.998869550f, -0.047535484f,
-    0.998941293f, -0.046003182f,
-    0.999010686f, -0.044470772f,
-    0.999077728f, -0.042938257f,
-    0.999142419f, -0.041405641f,
-    0.999204759f, -0.039872928f,
-    0.999264747f, -0.038340120f,
-    0.999322385f, -0.036807223f,
-    0.999377670f, -0.035274239f,
-    0.999430605f, -0.033741172f,
-    0.999481187f, -0.032208025f,
-    0.999529418f, -0.030674803f,
-    0.999575296f, -0.029141509f,
-    0.999618822f, -0.027608146f,
-    0.999659997f, -0.026074718f,
-    0.999698819f, -0.024541229f,
-    0.999735288f, -0.023007681f,
-    0.999769405f, -0.021474080f,
-    0.999801170f, -0.019940429f,
-    0.999830582f, -0.018406730f,
-    0.999857641f, -0.016872988f,
-    0.999882347f, -0.015339206f,
-    0.999904701f, -0.013805389f,
-    0.999924702f, -0.012271538f,
-    0.999942350f, -0.010737659f,
-    0.999957645f, -0.009203755f,
-    0.999970586f, -0.007669829f,
-    0.999981175f, -0.006135885f,
-    0.999989411f, -0.004601926f,
-    0.999995294f, -0.003067957f,
-    0.999998823f, -0.001533980f
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-/**
-  @brief  Q31 Twiddle factors Table
-*/
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre> for(i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 16, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- */
-const q31_t twiddleCoef_16_q31[24] = {
-    (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
-    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
-    (q31_t)0x5A82799A, (q31_t)0x5A82799A,
-    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C,
-    (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
-    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
-    (q31_t)0xA57D8666, (q31_t)0x5A82799A,
-    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
-    (q31_t)0x80000000, (q31_t)0x00000000,
-    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2,
-    (q31_t)0xA57D8666, (q31_t)0xA57D8666,
-    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 32, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- */
-const q31_t twiddleCoef_32_q31[48] = {
-    (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
-    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
-    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
-    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6,
-    (q31_t)0x5A82799A, (q31_t)0x5A82799A,
-    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
-    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C,
-    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
-    (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
-    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F,
-    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
-    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
-    (q31_t)0xA57D8666, (q31_t)0x5A82799A,
-    (q31_t)0x9592675B, (q31_t)0x471CECE6,
-    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
-    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C,
-    (q31_t)0x80000000, (q31_t)0x00000000,
-    (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
-    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2,
-    (q31_t)0x9592675B, (q31_t)0xB8E31319,
-    (q31_t)0xA57D8666, (q31_t)0xA57D8666,
-    (q31_t)0xB8E31319, (q31_t)0x9592675B,
-    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
-    (q31_t)0xE70747C3, (q31_t)0x8275A0C0
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 64, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- */
-const q31_t twiddleCoef_64_q31[96] = {
-	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7F62368F,
-	(q31_t)0x0C8BD35E, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
-	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7641AF3C,
-	(q31_t)0x30FBC54D, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
-	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x62F201AC,
-	(q31_t)0x5133CC94, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
-	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x471CECE6,
-	(q31_t)0x6A6D98A4, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
-	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x25280C5D,
-	(q31_t)0x7A7D055B, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x00000000,
-	(q31_t)0x7FFFFFFF, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
-	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xDAD7F3A2,
-	(q31_t)0x7A7D055B, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
-	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xB8E31319,
-	(q31_t)0x6A6D98A4, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
-	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0x9D0DFE53,
-	(q31_t)0x5133CC94, (q31_t)0x9592675B, (q31_t)0x471CECE6,
-	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x89BE50C3,
-	(q31_t)0x30FBC54D, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
-	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x809DC970,
-	(q31_t)0x0C8BD35E, (q31_t)0x80000000, (q31_t)0x00000000,
-	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8275A0C0,
-	(q31_t)0xE70747C3, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
-	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8F1D343A,
-	(q31_t)0xC3A9458F, (q31_t)0x9592675B, (q31_t)0xB8E31319,
-	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA57D8666,
-	(q31_t)0xA57D8666, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
-	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xC3A9458F,
-	(q31_t)0x8F1D343A, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
-	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE70747C3,
-	(q31_t)0x8275A0C0, (q31_t)0xF3742CA1, (q31_t)0x809DC970
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i < 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 128, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- */
-const q31_t twiddleCoef_128_q31[192] = {
-	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FD8878D,
-	(q31_t)0x0647D97C, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
-	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7D8A5F3F,
-	(q31_t)0x18F8B83C, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
-	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x78848413,
-	(q31_t)0x2B1F34EB, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
-	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x70E2CBC6,
-	(q31_t)0x3C56BA70, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
-	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x66CF811F,
-	(q31_t)0x4C3FDFF3, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
-	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5A82799A,
-	(q31_t)0x5A82799A, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
-	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4C3FDFF3,
-	(q31_t)0x66CF811F, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
-	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3C56BA70,
-	(q31_t)0x70E2CBC6, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
-	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2B1F34EB,
-	(q31_t)0x78848413, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
-	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x18F8B83C,
-	(q31_t)0x7D8A5F3F, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0647D97C,
-	(q31_t)0x7FD8878D, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
-	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF3742CA1,
-	(q31_t)0x7F62368F, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
-	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE0E60684,
-	(q31_t)0x7C29FBEE, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
-	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xCF043AB2,
-	(q31_t)0x7641AF3C, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
-	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xBE31E19B,
-	(q31_t)0x6DCA0D14, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
-	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xAECC336B,
-	(q31_t)0x62F201AC, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
-	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA1288376,
-	(q31_t)0x55F5A4D2, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
-	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9592675B,
-	(q31_t)0x471CECE6, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
-	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8C4A142F,
-	(q31_t)0x36BA2013, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
-	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8582FAA4,
-	(q31_t)0x25280C5D, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
-	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x8162AA03,
-	(q31_t)0x12C8106E, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
-	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80000000,
-	(q31_t)0x00000000, (q31_t)0x80277872, (q31_t)0xF9B82683,
-	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8162AA03,
-	(q31_t)0xED37EF91, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
-	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x8582FAA4,
-	(q31_t)0xDAD7F3A2, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
-	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8C4A142F,
-	(q31_t)0xC945DFEC, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
-	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9592675B,
-	(q31_t)0xB8E31319, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
-	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA1288376,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAECC336B,
-	(q31_t)0x9D0DFE53, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
-	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBE31E19B,
-	(q31_t)0x9235F2EB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
-	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCF043AB2,
-	(q31_t)0x89BE50C3, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
-	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE0E60684,
-	(q31_t)0x83D60411, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
-	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF3742CA1,
-	(q31_t)0x809DC970, (q31_t)0xF9B82683, (q31_t)0x80277872
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 256, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- 
- */
-const q31_t twiddleCoef_256_q31[384] = {
-	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FF62182,
-	(q31_t)0x03242ABF, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
-	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F62368F,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
-	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E1D93E9,
-	(q31_t)0x15E21444, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
-	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C29FBEE,
-	(q31_t)0x1F19F97B, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
-	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x798A23B1,
-	(q31_t)0x2826B928, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
-	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7641AF3C,
-	(q31_t)0x30FBC54D, (q31_t)0x7504D345, (q31_t)0x33DEF287,
-	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x72552C84,
-	(q31_t)0x398CDD32, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
-	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6DCA0D14,
-	(q31_t)0x41CE1E64, (q31_t)0x6C242960, (q31_t)0x447ACD50,
-	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x68A69E81,
-	(q31_t)0x49B41533, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
-	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x62F201AC,
-	(q31_t)0x5133CC94, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
-	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5CB420DF,
-	(q31_t)0x5842DD54, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
-	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x55F5A4D2,
-	(q31_t)0x5ED77C89, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
-	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4EBFE8A4,
-	(q31_t)0x64E88926, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
-	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x471CECE6,
-	(q31_t)0x6A6D98A4, (q31_t)0x447ACD50, (q31_t)0x6C242960,
-	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3F1749B7,
-	(q31_t)0x6F5F02B1, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
-	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x36BA2013,
-	(q31_t)0x73B5EBD0, (q31_t)0x33DEF287, (q31_t)0x7504D345,
-	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2E110A62,
-	(q31_t)0x776C4EDB, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
-	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x25280C5D,
-	(q31_t)0x7A7D055B, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
-	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1C0B826A,
-	(q31_t)0x7CE3CEB1, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
-	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x12C8106E,
-	(q31_t)0x7E9D55FC, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x096A9049,
-	(q31_t)0x7FA736B4, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
-	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x00000000,
-	(q31_t)0x7FFFFFFF, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
-	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF6956FB6,
-	(q31_t)0x7FA736B4, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
-	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xED37EF91,
-	(q31_t)0x7E9D55FC, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
-	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE3F47D95,
-	(q31_t)0x7CE3CEB1, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
-	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDAD7F3A2,
-	(q31_t)0x7A7D055B, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
-	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD1EEF59E,
-	(q31_t)0x776C4EDB, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
-	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xC945DFEC,
-	(q31_t)0x73B5EBD0, (q31_t)0xC67322CD, (q31_t)0x72552C84,
-	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC0E8B648,
-	(q31_t)0x6F5F02B1, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
-	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xB8E31319,
-	(q31_t)0x6A6D98A4, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
-	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB140175B,
-	(q31_t)0x64E88926, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
-	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAA0A5B2D,
-	(q31_t)0x5ED77C89, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
-	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA34BDF20,
-	(q31_t)0x5842DD54, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
-	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9D0DFE53,
-	(q31_t)0x5133CC94, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
-	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9759617E,
-	(q31_t)0x49B41533, (q31_t)0x9592675B, (q31_t)0x471CECE6,
-	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9235F2EB,
-	(q31_t)0x41CE1E64, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
-	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8DAAD37B,
-	(q31_t)0x398CDD32, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
-	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x89BE50C3,
-	(q31_t)0x30FBC54D, (q31_t)0x8893B124, (q31_t)0x2E110A62,
-	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8675DC4E,
-	(q31_t)0x2826B928, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
-	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x83D60411,
-	(q31_t)0x1F19F97B, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
-	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x81E26C16,
-	(q31_t)0x15E21444, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
-	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x809DC970,
-	(q31_t)0x0C8BD35E, (q31_t)0x8058C94C, (q31_t)0x096A9049,
-	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8009DE7D,
-	(q31_t)0x03242ABF, (q31_t)0x80000000, (q31_t)0x00000000,
-	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80277872,
-	(q31_t)0xF9B82683, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
-	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80F66E3C,
-	(q31_t)0xF054D8D4, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
-	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x8275A0C0,
-	(q31_t)0xE70747C3, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
-	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x84A2FC62,
-	(q31_t)0xDDDC5B3A, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
-	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x877B7BEC,
-	(q31_t)0xD4E0CB14, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
-	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8AFB2CBA,
-	(q31_t)0xCC210D78, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
-	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8F1D343A,
-	(q31_t)0xC3A9458F, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
-	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x93DBD69F,
-	(q31_t)0xBB8532AF, (q31_t)0x9592675B, (q31_t)0xB8E31319,
-	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x99307EE0,
-	(q31_t)0xB3C0200C, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
-	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9F13C7D0,
-	(q31_t)0xAC64D510, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
-	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA57D8666,
-	(q31_t)0xA57D8666, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAC64D510,
-	(q31_t)0x9F13C7D0, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
-	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB3C0200C,
-	(q31_t)0x99307EE0, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
-	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBB8532AF,
-	(q31_t)0x93DBD69F, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
-	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC3A9458F,
-	(q31_t)0x8F1D343A, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
-	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCC210D78,
-	(q31_t)0x8AFB2CBA, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
-	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD4E0CB14,
-	(q31_t)0x877B7BEC, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
-	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDDDC5B3A,
-	(q31_t)0x84A2FC62, (q31_t)0xE0E60684, (q31_t)0x83D60411,
-	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE70747C3,
-	(q31_t)0x8275A0C0, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
-	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF054D8D4,
-	(q31_t)0x80F66E3C, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
-	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF9B82683,
-	(q31_t)0x80277872, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 512, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- 
- */
-const q31_t twiddleCoef_512_q31[768] = {
-    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFD885A,
-	(q31_t)0x01921D1F, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
-	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FD8878D,
-	(q31_t)0x0647D97C, (q31_t)0x7FC25596, (q31_t)0x07D95B9E,
-	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F872BF3,
-	(q31_t)0x0AFB6805, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
-	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F0991C3,
-	(q31_t)0x0FAB272B, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE,
-	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E5FE493,
-	(q31_t)0x145576B1, (q31_t)0x7E1D93E9, (q31_t)0x15E21444,
-	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7D8A5F3F,
-	(q31_t)0x18F8B83C, (q31_t)0x7D3980EC, (q31_t)0x1A82A025,
-	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C894BDD,
-	(q31_t)0x1D934FE5, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
-	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B5D039D,
-	(q31_t)0x2223A4C5, (q31_t)0x7AEF6323, (q31_t)0x23A6887E,
-	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A05EEAD,
-	(q31_t)0x26A82185, (q31_t)0x798A23B1, (q31_t)0x2826B928,
-	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78848413,
-	(q31_t)0x2B1F34EB, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA,
-	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x76D94988,
-	(q31_t)0x2F875262, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
-	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7504D345,
-	(q31_t)0x33DEF287, (q31_t)0x745F9DD1, (q31_t)0x354D9056,
-	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x7307C3D0,
-	(q31_t)0x382493B0, (q31_t)0x72552C84, (q31_t)0x398CDD32,
-	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x70E2CBC6,
-	(q31_t)0x3C56BA70, (q31_t)0x70231099, (q31_t)0x3DB832A5,
-	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6E96A99C,
-	(q31_t)0x4073F21D, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
-	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C242960,
-	(q31_t)0x447ACD50, (q31_t)0x6B4AF278, (q31_t)0x45CD358F,
-	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x698C246C,
-	(q31_t)0x4869E664, (q31_t)0x68A69E81, (q31_t)0x49B41533,
-	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x66CF811F,
-	(q31_t)0x4C3FDFF3, (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4,
-	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x63EF328F,
-	(q31_t)0x4FFB654D, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
-	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x60EC3830,
-	(q31_t)0x539B2AEF, (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A,
-	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5DC79D7C,
-	(q31_t)0x571DEEF9, (q31_t)0x5CB420DF, (q31_t)0x5842DD54,
-	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5A82799A,
-	(q31_t)0x5A82799A, (q31_t)0x59646497, (q31_t)0x5B9D1153,
-	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x571DEEF9,
-	(q31_t)0x5DC79D7C, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
-	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x539B2AEF,
-	(q31_t)0x60EC3830, (q31_t)0x5269126E, (q31_t)0x61F1003E,
-	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4FFB654D,
-	(q31_t)0x63EF328F, (q31_t)0x4EBFE8A4, (q31_t)0x64E88926,
-	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4C3FDFF3,
-	(q31_t)0x66CF811F, (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC,
-	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4869E664,
-	(q31_t)0x698C246C, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
-	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x447ACD50,
-	(q31_t)0x6C242960, (q31_t)0x4325C135, (q31_t)0x6CF934FB,
-	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4073F21D,
-	(q31_t)0x6E96A99C, (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1,
-	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3C56BA70,
-	(q31_t)0x70E2CBC6, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2,
-	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x382493B0,
-	(q31_t)0x7307C3D0, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
-	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x33DEF287,
-	(q31_t)0x7504D345, (q31_t)0x326E54C7, (q31_t)0x75A585CF,
-	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2F875262,
-	(q31_t)0x76D94988, (q31_t)0x2E110A62, (q31_t)0x776C4EDB,
-	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2B1F34EB,
-	(q31_t)0x78848413, (q31_t)0x29A3C484, (q31_t)0x7909A92C,
-	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x26A82185,
-	(q31_t)0x7A05EEAD, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
-	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2223A4C5,
-	(q31_t)0x7B5D039D, (q31_t)0x209F701C, (q31_t)0x7BC5E28F,
-	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1D934FE5,
-	(q31_t)0x7C894BDD, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1,
-	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x18F8B83C,
-	(q31_t)0x7D8A5F3F, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E,
-	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x145576B1,
-	(q31_t)0x7E5FE493, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
-	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x0FAB272B,
-	(q31_t)0x7F0991C3, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0AFB6805,
-	(q31_t)0x7F872BF3, (q31_t)0x096A9049, (q31_t)0x7FA736B4,
-	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0647D97C,
-	(q31_t)0x7FD8878D, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0,
-	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x01921D1F,
-	(q31_t)0x7FFD885A, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
-	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFCDBD541,
-	(q31_t)0x7FF62182, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0,
-	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF826A461,
-	(q31_t)0x7FC25596, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4,
-	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF3742CA1,
-	(q31_t)0x7F62368F, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5,
-	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEEC60F31,
-	(q31_t)0x7ED5E5C6, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
-	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEA1DEBBB,
-	(q31_t)0x7E1D93E9, (q31_t)0xE8922621, (q31_t)0x7DD6668E,
-	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE57D5FDA,
-	(q31_t)0x7D3980EC, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1,
-	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE0E60684,
-	(q31_t)0x7C29FBEE, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F,
-	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDC597781,
-	(q31_t)0x7AEF6323, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
-	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD7D946D7,
-	(q31_t)0x798A23B1, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C,
-	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD3670445,
-	(q31_t)0x77FAB988, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB,
-	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCF043AB2,
-	(q31_t)0x7641AF3C, (q31_t)0xCD91AB38, (q31_t)0x75A585CF,
-	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCAB26FA9,
-	(q31_t)0x745F9DD1, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
-	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC67322CD,
-	(q31_t)0x72552C84, (q31_t)0xC50D1148, (q31_t)0x719E2CD2,
-	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC247CD5A,
-	(q31_t)0x70231099, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1,
-	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBE31E19B,
-	(q31_t)0x6DCA0D14, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB,
-	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBA32CA70,
-	(q31_t)0x6B4AF278, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
-	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB64BEACC,
-	(q31_t)0x68A69E81, (q31_t)0xB5049368, (q31_t)0x67BD0FBC,
-	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB27E9D3B,
-	(q31_t)0x65DDFBD3, (q31_t)0xB140175B, (q31_t)0x64E88926,
-	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAECC336B,
-	(q31_t)0x62F201AC, (q31_t)0xAD96ED91, (q31_t)0x61F1003E,
-	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAB35F5B5,
-	(q31_t)0x5FE3B38D, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
-	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA7BD22AB,
-	(q31_t)0x5CB420DF, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153,
-	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA462EEAC,
-	(q31_t)0x59646497, (q31_t)0xA34BDF20, (q31_t)0x5842DD54,
-	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1288376,
-	(q31_t)0x55F5A4D2, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A,
-	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E0EFFC1,
-	(q31_t)0x5269126E, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
-	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B1776D9,
-	(q31_t)0x4EBFE8A4, (q31_t)0x9A22042C, (q31_t)0x4D8162C4,
-	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9842F043,
-	(q31_t)0x4AFB6C97, (q31_t)0x9759617E, (q31_t)0x49B41533,
-	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x9592675B,
-	(q31_t)0x471CECE6, (q31_t)0x94B50D87, (q31_t)0x45CD358F,
-	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9306CB04,
-	(q31_t)0x4325C135, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
-	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x90A0FD4E,
-	(q31_t)0x3F1749B7, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5,
-	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8E61D32D,
-	(q31_t)0x3AF2EEB7, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32,
-	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8C4A142F,
-	(q31_t)0x36BA2013, (q31_t)0x8BA0622F, (q31_t)0x354D9056,
-	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8A5A7A30,
-	(q31_t)0x326E54C7, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
-	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x8893B124,
-	(q31_t)0x2E110A62, (q31_t)0x88054677, (q31_t)0x2C98FBBA,
-	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x86F656D3,
-	(q31_t)0x29A3C484, (q31_t)0x8675DC4E, (q31_t)0x2826B928,
-	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x8582FAA4,
-	(q31_t)0x25280C5D, (q31_t)0x85109CDC, (q31_t)0x23A6887E,
-	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x843A1D70,
-	(q31_t)0x209F701C, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
-	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x831C314E,
-	(q31_t)0x1C0B826A, (q31_t)0x82C67F13, (q31_t)0x1A82A025,
-	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82299971,
-	(q31_t)0x176DD9DE, (q31_t)0x81E26C16, (q31_t)0x15E21444,
-	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8162AA03,
-	(q31_t)0x12C8106E, (q31_t)0x812A1A39, (q31_t)0x1139F0CE,
-	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80C7A80A,
-	(q31_t)0x0E1BC2E3, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
-	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x8058C94C,
-	(q31_t)0x096A9049, (q31_t)0x803DAA69, (q31_t)0x07D95B9E,
-	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80163440,
-	(q31_t)0x04B6195D, (q31_t)0x8009DE7D, (q31_t)0x03242ABF,
-	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80000000,
-	(q31_t)0x00000000, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0,
-	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80163440,
-	(q31_t)0xFB49E6A2, (q31_t)0x80277872, (q31_t)0xF9B82683,
-	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8058C94C,
-	(q31_t)0xF6956FB6, (q31_t)0x8078D40D, (q31_t)0xF50497FA,
-	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80C7A80A,
-	(q31_t)0xF1E43D1C, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4,
-	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8162AA03,
-	(q31_t)0xED37EF91, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E,
-	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82299971,
-	(q31_t)0xE8922621, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
-	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x831C314E,
-	(q31_t)0xE3F47D95, (q31_t)0x8376B422, (q31_t)0xE26CB01A,
-	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x843A1D70,
-	(q31_t)0xDF608FE3, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A,
-	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8582FAA4,
-	(q31_t)0xDAD7F3A2, (q31_t)0x85FA1152, (q31_t)0xD957DE7A,
-	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86F656D3,
-	(q31_t)0xD65C3B7B, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
-	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8893B124,
-	(q31_t)0xD1EEF59E, (q31_t)0x8926B677, (q31_t)0xD078AD9D,
-	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A5A7A30,
-	(q31_t)0xCD91AB38, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78,
-	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8C4A142F,
-	(q31_t)0xC945DFEC, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50,
-	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E61D32D,
-	(q31_t)0xC50D1148, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
-	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x90A0FD4E,
-	(q31_t)0xC0E8B648, (q31_t)0x91695663, (q31_t)0xBF8C0DE2,
-	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9306CB04,
-	(q31_t)0xBCDA3ECA, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF,
-	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9592675B,
-	(q31_t)0xB8E31319, (q31_t)0x9673DB94, (q31_t)0xB796199B,
-	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x9842F043,
-	(q31_t)0xB5049368, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
-	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9B1776D9,
-	(q31_t)0xB140175B, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2,
-	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9E0EFFC1,
-	(q31_t)0xAD96ED91, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510,
-	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA1288376,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA2386283, (q31_t)0xA8E21106,
-	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA462EEAC,
-	(q31_t)0xA69B9B68, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
-	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA7BD22AB,
-	(q31_t)0xA34BDF20, (q31_t)0xA8E21106, (q31_t)0xA2386283,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAB35F5B5,
-	(q31_t)0xA01C4C72, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0,
-	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAECC336B,
-	(q31_t)0x9D0DFE53, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70,
-	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB27E9D3B,
-	(q31_t)0x9A22042C, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
-	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB64BEACC,
-	(q31_t)0x9759617E, (q31_t)0xB796199B, (q31_t)0x9673DB94,
-	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBA32CA70,
-	(q31_t)0x94B50D87, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F,
-	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBE31E19B,
-	(q31_t)0x9235F2EB, (q31_t)0xBF8C0DE2, (q31_t)0x91695663,
-	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC247CD5A,
-	(q31_t)0x8FDCEF66, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
-	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC67322CD,
-	(q31_t)0x8DAAD37B, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30,
-	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCAB26FA9,
-	(q31_t)0x8BA0622F, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA,
-	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCF043AB2,
-	(q31_t)0x89BE50C3, (q31_t)0xD078AD9D, (q31_t)0x8926B677,
-	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD3670445,
-	(q31_t)0x88054677, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
-	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD7D946D7,
-	(q31_t)0x8675DC4E, (q31_t)0xD957DE7A, (q31_t)0x85FA1152,
-	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDC597781,
-	(q31_t)0x85109CDC, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62,
-	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE0E60684,
-	(q31_t)0x83D60411, (q31_t)0xE26CB01A, (q31_t)0x8376B422,
-	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE57D5FDA,
-	(q31_t)0x82C67F13, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
-	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xEA1DEBBB,
-	(q31_t)0x81E26C16, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C,
-	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEEC60F31,
-	(q31_t)0x812A1A39, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C,
-	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF3742CA1,
-	(q31_t)0x809DC970, (q31_t)0xF50497FA, (q31_t)0x8078D40D,
-	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF826A461,
-	(q31_t)0x803DAA69, (q31_t)0xF9B82683, (q31_t)0x80277872,
-	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFCDBD541,
-	(q31_t)0x8009DE7D, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 1024, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- 
- */
-const q31_t twiddleCoef_1024_q31[1536] = {
-	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFF6216,
-	(q31_t)0x00C90F88, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
-	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF62182,
-	(q31_t)0x03242ABF, (q31_t)0x7FF09477, (q31_t)0x03ED26E6,
-	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE1C76B,
-	(q31_t)0x057F0034, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
-	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC25596,
-	(q31_t)0x07D95B9E, (q31_t)0x7FB563B2, (q31_t)0x08A2009A,
-	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F97CEBC,
-	(q31_t)0x0A3308BC, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805,
-	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F62368F,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92,
-	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2191B4,
-	(q31_t)0x0EE38765, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
-	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7ED5E5C6,
-	(q31_t)0x1139F0CE, (q31_t)0x7EBA3A39, (q31_t)0x120116D4,
-	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E7F3956,
-	(q31_t)0x138EDBB0, (q31_t)0x7E5FE493, (q31_t)0x145576B1,
-	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E1D93E9,
-	(q31_t)0x15E21444, (q31_t)0x7DFA98A7, (q31_t)0x16A81305,
-	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DB0FDF7,
-	(q31_t)0x183366E8, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
-	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D3980EC,
-	(q31_t)0x1A82A025, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF,
-	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CB72724,
-	(q31_t)0x1CCF8CB3, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5,
-	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C29FBEE,
-	(q31_t)0x1F19F97B, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A,
-	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B920B89,
-	(q31_t)0x2161B39F, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
-	(q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7AEF6323,
-	(q31_t)0x23A6887E, (q31_t)0x7AB6CBA3, (q31_t)0x24677757,
-	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A4210D8,
-	(q31_t)0x25E845B5, (q31_t)0x7A05EEAD, (q31_t)0x26A82185,
-	(q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x798A23B1,
-	(q31_t)0x2826B928, (q31_t)0x794A7C11, (q31_t)0x28E5714A,
-	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78C7ABA1,
-	(q31_t)0x2A61B101, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
-	(q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x77FAB988,
-	(q31_t)0x2C98FBBA, (q31_t)0x77B417DF, (q31_t)0x2D553AFB,
-	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x77235F2D,
-	(q31_t)0x2ECC681E, (q31_t)0x76D94988, (q31_t)0x2F875262,
-	(q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x7641AF3C,
-	(q31_t)0x30FBC54D, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D,
-	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7555BD4B,
-	(q31_t)0x3326E2C2, (q31_t)0x7504D345, (q31_t)0x33DEF287,
-	(q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x745F9DD1,
-	(q31_t)0x354D9056, (q31_t)0x740B53FA, (q31_t)0x36041AD9,
-	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x735F6626,
-	(q31_t)0x376F9E46, (q31_t)0x7307C3D0, (q31_t)0x382493B0,
-	(q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72552C84,
-	(q31_t)0x398CDD32, (q31_t)0x71FA3948, (q31_t)0x3A402DD1,
-	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x71410804,
-	(q31_t)0x3BA51E29, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
-	(q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70231099,
-	(q31_t)0x3DB832A5, (q31_t)0x6FC19385, (q31_t)0x3E680B2C,
-	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6EFB5F12,
-	(q31_t)0x3FC5EC97, (q31_t)0x6E96A99C, (q31_t)0x4073F21D,
-	(q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6DCA0D14,
-	(q31_t)0x41CE1E64, (q31_t)0x6D6227FA, (q31_t)0x427A41D0,
-	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C8F351C,
-	(q31_t)0x43D09AEC, (q31_t)0x6C242960, (q31_t)0x447ACD50,
-	(q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B4AF278,
-	(q31_t)0x45CD358F, (q31_t)0x6ADCC964, (q31_t)0x46756827,
-	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x69FD614A,
-	(q31_t)0x47C3C22E, (q31_t)0x698C246C, (q31_t)0x4869E664,
-	(q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68A69E81,
-	(q31_t)0x49B41533, (q31_t)0x683257AA, (q31_t)0x4A581C9D,
-	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x6746C7D7,
-	(q31_t)0x4B9E038F, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
-	(q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x65DDFBD3,
-	(q31_t)0x4D8162C4, (q31_t)0x6563BF92, (q31_t)0x4E210617,
-	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x646C59BF,
-	(q31_t)0x4F5E08E3, (q31_t)0x63EF328F, (q31_t)0x4FFB654D,
-	(q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x62F201AC,
-	(q31_t)0x5133CC94, (q31_t)0x6271FA69, (q31_t)0x51CED46E,
-	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x616F146B,
-	(q31_t)0x53028517, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
-	(q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x5FE3B38D,
-	(q31_t)0x54CA0A4A, (q31_t)0x5F5E0DB3, (q31_t)0x556040E2,
-	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E50015D,
-	(q31_t)0x568A34A9, (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9,
-	(q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5CB420DF,
-	(q31_t)0x5842DD54, (q31_t)0x5C290ACC, (q31_t)0x58D40E8C,
-	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B1035CF,
-	(q31_t)0x59F3DE12, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
-	(q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59646497,
-	(q31_t)0x5B9D1153, (q31_t)0x58D40E8C, (q31_t)0x5C290ACC,
-	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57B0D256,
-	(q31_t)0x5D3E5236, (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C,
-	(q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x55F5A4D2,
-	(q31_t)0x5ED77C89, (q31_t)0x556040E2, (q31_t)0x5F5E0DB3,
-	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x5433027D,
-	(q31_t)0x60686CCE, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
-	(q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x5269126E,
-	(q31_t)0x61F1003E, (q31_t)0x51CED46E, (q31_t)0x6271FA69,
-	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x5097FC5E,
-	(q31_t)0x637114CC, (q31_t)0x4FFB654D, (q31_t)0x63EF328F,
-	(q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4EBFE8A4,
-	(q31_t)0x64E88926, (q31_t)0x4E210617, (q31_t)0x6563BF92,
-	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4CE10034,
-	(q31_t)0x66573CBB, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
-	(q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4AFB6C97,
-	(q31_t)0x67BD0FBC, (q31_t)0x4A581C9D, (q31_t)0x683257AA,
-	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x490F57EE,
-	(q31_t)0x6919E320, (q31_t)0x4869E664, (q31_t)0x698C246C,
-	(q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x471CECE6,
-	(q31_t)0x6A6D98A4, (q31_t)0x46756827, (q31_t)0x6ADCC964,
-	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x452456BC,
-	(q31_t)0x6BB812D0, (q31_t)0x447ACD50, (q31_t)0x6C242960,
-	(q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x4325C135,
-	(q31_t)0x6CF934FB, (q31_t)0x427A41D0, (q31_t)0x6D6227FA,
-	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4121589A,
-	(q31_t)0x6E30E349, (q31_t)0x4073F21D, (q31_t)0x6E96A99C,
-	(q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F1749B7,
-	(q31_t)0x6F5F02B1, (q31_t)0x3E680B2C, (q31_t)0x6FC19385,
-	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D07C1D5,
-	(q31_t)0x708378FE, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
-	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3AF2EEB7,
-	(q31_t)0x719E2CD2, (q31_t)0x3A402DD1, (q31_t)0x71FA3948,
-	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x38D8FE93,
-	(q31_t)0x72AF05A6, (q31_t)0x382493B0, (q31_t)0x7307C3D0,
-	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x36BA2013,
-	(q31_t)0x73B5EBD0, (q31_t)0x36041AD9, (q31_t)0x740B53FA,
-	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x3496824F,
-	(q31_t)0x74B2C883, (q31_t)0x33DEF287, (q31_t)0x7504D345,
-	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x326E54C7,
-	(q31_t)0x75A585CF, (q31_t)0x31B54A5D, (q31_t)0x75F42C0A,
-	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x3041C760,
-	(q31_t)0x768E0EA5, (q31_t)0x2F875262, (q31_t)0x76D94988,
-	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E110A62,
-	(q31_t)0x776C4EDB, (q31_t)0x2D553AFB, (q31_t)0x77B417DF,
-	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2BDC4E6F,
-	(q31_t)0x78403328, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
-	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x29A3C484,
-	(q31_t)0x7909A92C, (q31_t)0x28E5714A, (q31_t)0x794A7C11,
-	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27679DF4,
-	(q31_t)0x79C89F6D, (q31_t)0x26A82185, (q31_t)0x7A05EEAD,
-	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x25280C5D,
-	(q31_t)0x7A7D055B, (q31_t)0x24677757, (q31_t)0x7AB6CBA3,
-	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x22E541AE,
-	(q31_t)0x7B26CB4F, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
-	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x209F701C,
-	(q31_t)0x7BC5E28F, (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830,
-	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1E56CA1E,
-	(q31_t)0x7C5A3D4F, (q31_t)0x1D934FE5, (q31_t)0x7C894BDD,
-	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C0B826A,
-	(q31_t)0x7CE3CEB1, (q31_t)0x1B4732EF, (q31_t)0x7D0F4218,
-	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x19BDCBF2,
-	(q31_t)0x7D628AC5, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
-	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x176DD9DE,
-	(q31_t)0x7DD6668E, (q31_t)0x16A81305, (q31_t)0x7DFA98A7,
-	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x151BDF85,
-	(q31_t)0x7E3F57FE, (q31_t)0x145576B1, (q31_t)0x7E5FE493,
-	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x12C8106E,
-	(q31_t)0x7E9D55FC, (q31_t)0x120116D4, (q31_t)0x7EBA3A39,
-	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x1072A047,
-	(q31_t)0x7EF0585F, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
-	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E1BC2E3,
-	(q31_t)0x7F3857F5, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0BC3AC35,
-	(q31_t)0x7F754E7F, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3,
-	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x096A9049,
-	(q31_t)0x7FA736B4, (q31_t)0x08A2009A, (q31_t)0x7FB563B2,
-	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0710A344,
-	(q31_t)0x7FCE0C3E, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
-	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x04B6195D,
-	(q31_t)0x7FE9CBC0, (q31_t)0x03ED26E6, (q31_t)0x7FF09477,
-	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x025B26D7,
-	(q31_t)0x7FFA72D1, (q31_t)0x01921D1F, (q31_t)0x7FFD885A,
-	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x00000000,
-	(q31_t)0x7FFFFFFF, (q31_t)0xFF36F078, (q31_t)0x7FFF6216,
-	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFDA4D928,
-	(q31_t)0x7FFA72D1, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
-	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFB49E6A2,
-	(q31_t)0x7FE9CBC0, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B,
-	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF8EF5CBB,
-	(q31_t)0x7FCE0C3E, (q31_t)0xF826A461, (q31_t)0x7FC25596,
-	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6956FB6,
-	(q31_t)0x7FA736B4, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC,
-	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF43C53CA,
-	(q31_t)0x7F754E7F, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
-	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF1E43D1C,
-	(q31_t)0x7F3857F5, (q31_t)0xF11C789A, (q31_t)0x7F2191B4,
-	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEF8D5FB8,
-	(q31_t)0x7EF0585F, (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6,
-	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xED37EF91,
-	(q31_t)0x7E9D55FC, (q31_t)0xEC71244F, (q31_t)0x7E7F3956,
-	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEAE4207A,
-	(q31_t)0x7E3F57FE, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
-	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE8922621,
-	(q31_t)0x7DD6668E, (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7,
-	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE642340D,
-	(q31_t)0x7D628AC5, (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC,
-	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE3F47D95,
-	(q31_t)0x7CE3CEB1, (q31_t)0xE330734C, (q31_t)0x7CB72724,
-	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE1A935E1,
-	(q31_t)0x7C5A3D4F, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
-	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDF608FE3,
-	(q31_t)0x7BC5E28F, (q31_t)0xDE9E4C60, (q31_t)0x7B920B89,
-	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD1ABE51,
-	(q31_t)0x7B26CB4F, (q31_t)0xDC597781, (q31_t)0x7AEF6323,
-	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDAD7F3A2,
-	(q31_t)0x7A7D055B, (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8,
-	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD898620C,
-	(q31_t)0x79C89F6D, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
-	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD65C3B7B,
-	(q31_t)0x7909A92C, (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1,
-	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD423B190,
-	(q31_t)0x78403328, (q31_t)0xD3670445, (q31_t)0x77FAB988,
-	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD1EEF59E,
-	(q31_t)0x776C4EDB, (q31_t)0xD13397E1, (q31_t)0x77235F2D,
-	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCFBE389F,
-	(q31_t)0x768E0EA5, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
-	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCD91AB38,
-	(q31_t)0x75A585CF, (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B,
-	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCB697DB0,
-	(q31_t)0x74B2C883, (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1,
-	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC945DFEC,
-	(q31_t)0x73B5EBD0, (q31_t)0xC89061BA, (q31_t)0x735F6626,
-	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC727016C,
-	(q31_t)0x72AF05A6, (q31_t)0xC67322CD, (q31_t)0x72552C84,
-	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC50D1148,
-	(q31_t)0x719E2CD2, (q31_t)0xC45AE1D7, (q31_t)0x71410804,
-	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC2F83E2A,
-	(q31_t)0x708378FE, (q31_t)0xC247CD5A, (q31_t)0x70231099,
-	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC0E8B648,
-	(q31_t)0x6F5F02B1, (q31_t)0xC03A1368, (q31_t)0x6EFB5F12,
-	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBEDEA765,
-	(q31_t)0x6E30E349, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
-	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBCDA3ECA,
-	(q31_t)0x6CF934FB, (q31_t)0xBC2F6513, (q31_t)0x6C8F351C,
-	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBADBA943,
-	(q31_t)0x6BB812D0, (q31_t)0xBA32CA70, (q31_t)0x6B4AF278,
-	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB8E31319,
-	(q31_t)0x6A6D98A4, (q31_t)0xB83C3DD1, (q31_t)0x69FD614A,
-	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB6F0A811,
-	(q31_t)0x6919E320, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
-	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB5049368,
-	(q31_t)0x67BD0FBC, (q31_t)0xB461FC70, (q31_t)0x6746C7D7,
-	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB31EFFCB,
-	(q31_t)0x66573CBB, (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3,
-	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB140175B,
-	(q31_t)0x64E88926, (q31_t)0xB0A1F71C, (q31_t)0x646C59BF,
-	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAF6803A1,
-	(q31_t)0x637114CC, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
-	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xAD96ED91,
-	(q31_t)0x61F1003E, (q31_t)0xACFD7AE8, (q31_t)0x616F146B,
-	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xABCCFD82,
-	(q31_t)0x60686CCE, (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D,
-	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA0A5B2D,
-	(q31_t)0x5ED77C89, (q31_t)0xA975CB56, (q31_t)0x5E50015D,
-	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA84F2DA9,
-	(q31_t)0x5D3E5236, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
-	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA69B9B68,
-	(q31_t)0x5B9D1153, (q31_t)0xA60C21ED, (q31_t)0x5B1035CF,
-	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA4EFCA31,
-	(q31_t)0x59F3DE12, (q31_t)0xA462EEAC, (q31_t)0x59646497,
-	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA34BDF20,
-	(q31_t)0x5842DD54, (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256,
-	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1AFFEA2,
-	(q31_t)0x568A34A9, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
-	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA01C4C72,
-	(q31_t)0x54CA0A4A, (q31_t)0x9F979331, (q31_t)0x5433027D,
-	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E90EB94,
-	(q31_t)0x53028517, (q31_t)0x9E0EFFC1, (q31_t)0x5269126E,
-	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D0DFE53,
-	(q31_t)0x5133CC94, (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E,
-	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B93A640,
-	(q31_t)0x4F5E08E3, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
-	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A22042C,
-	(q31_t)0x4D8162C4, (q31_t)0x99A8C344, (q31_t)0x4CE10034,
-	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98B93828,
-	(q31_t)0x4B9E038F, (q31_t)0x9842F043, (q31_t)0x4AFB6C97,
-	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x9759617E,
-	(q31_t)0x49B41533, (q31_t)0x96E61CDF, (q31_t)0x490F57EE,
-	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x96029EB5,
-	(q31_t)0x47C3C22E, (q31_t)0x9592675B, (q31_t)0x471CECE6,
-	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x94B50D87,
-	(q31_t)0x45CD358F, (q31_t)0x9447ED2F, (q31_t)0x452456BC,
-	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9370CAE4,
-	(q31_t)0x43D09AEC, (q31_t)0x9306CB04, (q31_t)0x4325C135,
-	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9235F2EB,
-	(q31_t)0x41CE1E64, (q31_t)0x91CF1CB6, (q31_t)0x4121589A,
-	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9104A0ED,
-	(q31_t)0x3FC5EC97, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
-	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x8FDCEF66,
-	(q31_t)0x3DB832A5, (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5,
-	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EBEF7FB,
-	(q31_t)0x3BA51E29, (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7,
-	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DAAD37B,
-	(q31_t)0x398CDD32, (q31_t)0x8D50FA59, (q31_t)0x38D8FE93,
-	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CA099D9,
-	(q31_t)0x376F9E46, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
-	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BA0622F,
-	(q31_t)0x354D9056, (q31_t)0x8B4D377C, (q31_t)0x3496824F,
-	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AAA42B4,
-	(q31_t)0x3326E2C2, (q31_t)0x8A5A7A30, (q31_t)0x326E54C7,
-	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89BE50C3,
-	(q31_t)0x30FBC54D, (q31_t)0x8971F15A, (q31_t)0x3041C760,
-	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x88DCA0D3,
-	(q31_t)0x2ECC681E, (q31_t)0x8893B124, (q31_t)0x2E110A62,
-	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x88054677,
-	(q31_t)0x2C98FBBA, (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F,
-	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8738545E,
-	(q31_t)0x2A61B101, (q31_t)0x86F656D3, (q31_t)0x29A3C484,
-	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x8675DC4E,
-	(q31_t)0x2826B928, (q31_t)0x86376092, (q31_t)0x27679DF4,
-	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85BDEF27,
-	(q31_t)0x25E845B5, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
-	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x85109CDC,
-	(q31_t)0x23A6887E, (q31_t)0x84D934B0, (q31_t)0x22E541AE,
-	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x846DF476,
-	(q31_t)0x2161B39F, (q31_t)0x843A1D70, (q31_t)0x209F701C,
-	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83D60411,
-	(q31_t)0x1F19F97B, (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E,
-	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x8348D8DB,
-	(q31_t)0x1CCF8CB3, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
-	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82C67F13,
-	(q31_t)0x1A82A025, (q31_t)0x829D753A, (q31_t)0x19BDCBF2,
-	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x824F0208,
-	(q31_t)0x183366E8, (q31_t)0x82299971, (q31_t)0x176DD9DE,
-	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81E26C16,
-	(q31_t)0x15E21444, (q31_t)0x81C0A801, (q31_t)0x151BDF85,
-	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8180C6A9,
-	(q31_t)0x138EDBB0, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
-	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x812A1A39,
-	(q31_t)0x1139F0CE, (q31_t)0x810FA7A0, (q31_t)0x1072A047,
-	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80DE6E4C,
-	(q31_t)0x0EE38765, (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3,
-	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x809DC970,
-	(q31_t)0x0C8BD35E, (q31_t)0x808AB180, (q31_t)0x0BC3AC35,
-	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80683143,
-	(q31_t)0x0A3308BC, (q31_t)0x8058C94C, (q31_t)0x096A9049,
-	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x803DAA69,
-	(q31_t)0x07D95B9E, (q31_t)0x8031F3C1, (q31_t)0x0710A344,
-	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x801E3894,
-	(q31_t)0x057F0034, (q31_t)0x80163440, (q31_t)0x04B6195D,
-	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x8009DE7D,
-	(q31_t)0x03242ABF, (q31_t)0x80058D2E, (q31_t)0x025B26D7,
-	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80009DE9,
-	(q31_t)0x00C90F88, (q31_t)0x80000000, (q31_t)0x00000000,
-	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x800277A5,
-	(q31_t)0xFE6DE2E0, (q31_t)0x80058D2E, (q31_t)0xFDA4D928,
-	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800F6B88,
-	(q31_t)0xFC12D919, (q31_t)0x80163440, (q31_t)0xFB49E6A2,
-	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x80277872,
-	(q31_t)0xF9B82683, (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB,
-	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x804A9C4D,
-	(q31_t)0xF75DFF65, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
-	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x8078D40D,
-	(q31_t)0xF50497FA, (q31_t)0x808AB180, (q31_t)0xF43C53CA,
-	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80B21BAF,
-	(q31_t)0xF2AC246D, (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C,
-	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80F66E3C,
-	(q31_t)0xF054D8D4, (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8,
-	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8145C5C6,
-	(q31_t)0xEDFEE92B, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
-	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81A01B6C,
-	(q31_t)0xEBAA894E, (q31_t)0x81C0A801, (q31_t)0xEAE4207A,
-	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82056758,
-	(q31_t)0xE957ECFB, (q31_t)0x82299971, (q31_t)0xE8922621,
-	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x8275A0C0,
-	(q31_t)0xE70747C3, (q31_t)0x829D753A, (q31_t)0xE642340D,
-	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82F0BDE8,
-	(q31_t)0xE4B8CD10, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
-	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x8376B422,
-	(q31_t)0xE26CB01A, (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1,
-	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x840777CF,
-	(q31_t)0xE02323E5, (q31_t)0x843A1D70, (q31_t)0xDF608FE3,
-	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x84A2FC62,
-	(q31_t)0xDDDC5B3A, (q31_t)0x84D934B0, (q31_t)0xDD1ABE51,
-	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8549345C,
-	(q31_t)0xDB9888A8, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
-	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85FA1152,
-	(q31_t)0xD957DE7A, (q31_t)0x86376092, (q31_t)0xD898620C,
-	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86B583EE,
-	(q31_t)0xD71A8EB5, (q31_t)0x86F656D3, (q31_t)0xD65C3B7B,
-	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x877B7BEC,
-	(q31_t)0xD4E0CB14, (q31_t)0x87BFCCD7, (q31_t)0xD423B190,
-	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x884BE820,
-	(q31_t)0xD2AAC504, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
-	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x8926B677,
-	(q31_t)0xD078AD9D, (q31_t)0x8971F15A, (q31_t)0xCFBE389F,
-	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A0BD3F5,
-	(q31_t)0xCE4AB5A2, (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38,
-	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8AFB2CBA,
-	(q31_t)0xCC210D78, (q31_t)0x8B4D377C, (q31_t)0xCB697DB0,
-	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BF4AC05,
-	(q31_t)0xC9FBE527, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
-	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CF83C30,
-	(q31_t)0xC7DB6C50, (q31_t)0x8D50FA59, (q31_t)0xC727016C,
-	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E05C6B7,
-	(q31_t)0xC5BFD22E, (q31_t)0x8E61D32D, (q31_t)0xC50D1148,
-	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8F1D343A,
-	(q31_t)0xC3A9458F, (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A,
-	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x903E6C7A,
-	(q31_t)0xC197F4D3, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
-	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x91695663,
-	(q31_t)0xBF8C0DE2, (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765,
-	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x929DD805,
-	(q31_t)0xBD85BE2F, (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA,
-	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x93DBD69F,
-	(q31_t)0xBB8532AF, (q31_t)0x9447ED2F, (q31_t)0xBADBA943,
-	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9523369B,
-	(q31_t)0xB98A97D8, (q31_t)0x9592675B, (q31_t)0xB8E31319,
-	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x9673DB94,
-	(q31_t)0xB796199B, (q31_t)0x96E61CDF, (q31_t)0xB6F0A811,
-	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97CDA855,
-	(q31_t)0xB5A7E362, (q31_t)0x9842F043, (q31_t)0xB5049368,
-	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x99307EE0,
-	(q31_t)0xB3C0200C, (q31_t)0x99A8C344, (q31_t)0xB31EFFCB,
-	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A9C406D,
-	(q31_t)0xB1DEF9E8, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
-	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9C10CD70,
-	(q31_t)0xB0049AB2, (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1,
-	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D8E0596,
-	(q31_t)0xAE312B91, (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91,
-	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9F13C7D0,
-	(q31_t)0xAC64D510, (q31_t)0x9F979331, (q31_t)0xABCCFD82,
-	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA0A1F24C,
-	(q31_t)0xAA9FBF1D, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
-	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA2386283,
-	(q31_t)0xA8E21106, (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9,
-	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3D6F533,
-	(q31_t)0xA72BF173, (q31_t)0xA462EEAC, (q31_t)0xA69B9B68,
-	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA57D8666,
-	(q31_t)0xA57D8666, (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31,
-	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA72BF173,
-	(q31_t)0xA3D6F533, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
-	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8E21106,
-	(q31_t)0xA2386283, (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA9FBF1D,
-	(q31_t)0xA0A1F24C, (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72,
-	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC64D510,
-	(q31_t)0x9F13C7D0, (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94,
-	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAE312B91,
-	(q31_t)0x9D8E0596, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
-	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xB0049AB2,
-	(q31_t)0x9C10CD70, (q31_t)0xB0A1F71C, (q31_t)0x9B93A640,
-	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB1DEF9E8,
-	(q31_t)0x9A9C406D, (q31_t)0xB27E9D3B, (q31_t)0x9A22042C,
-	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB3C0200C,
-	(q31_t)0x99307EE0, (q31_t)0xB461FC70, (q31_t)0x98B93828,
-	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB5A7E362,
-	(q31_t)0x97CDA855, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
-	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB796199B,
-	(q31_t)0x9673DB94, (q31_t)0xB83C3DD1, (q31_t)0x96029EB5,
-	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB98A97D8,
-	(q31_t)0x9523369B, (q31_t)0xBA32CA70, (q31_t)0x94B50D87,
-	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB8532AF,
-	(q31_t)0x93DBD69F, (q31_t)0xBC2F6513, (q31_t)0x9370CAE4,
-	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD85BE2F,
-	(q31_t)0x929DD805, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
-	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF8C0DE2,
-	(q31_t)0x91695663, (q31_t)0xC03A1368, (q31_t)0x9104A0ED,
-	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC197F4D3,
-	(q31_t)0x903E6C7A, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66,
-	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC3A9458F,
-	(q31_t)0x8F1D343A, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB,
-	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5BFD22E,
-	(q31_t)0x8E05C6B7, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
-	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7DB6C50,
-	(q31_t)0x8CF83C30, (q31_t)0xC89061BA, (q31_t)0x8CA099D9,
-	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9FBE527,
-	(q31_t)0x8BF4AC05, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F,
-	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCC210D78,
-	(q31_t)0x8AFB2CBA, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4,
-	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCE4AB5A2,
-	(q31_t)0x8A0BD3F5, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
-	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD078AD9D,
-	(q31_t)0x8926B677, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3,
-	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD2AAC504,
-	(q31_t)0x884BE820, (q31_t)0xD3670445, (q31_t)0x88054677,
-	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD4E0CB14,
-	(q31_t)0x877B7BEC, (q31_t)0xD59E4EFE, (q31_t)0x8738545E,
-	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD71A8EB5,
-	(q31_t)0x86B583EE, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
-	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD957DE7A,
-	(q31_t)0x85FA1152, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27,
-	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB9888A8,
-	(q31_t)0x8549345C, (q31_t)0xDC597781, (q31_t)0x85109CDC,
-	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDDDC5B3A,
-	(q31_t)0x84A2FC62, (q31_t)0xDE9E4C60, (q31_t)0x846DF476,
-	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE02323E5,
-	(q31_t)0x840777CF, (q31_t)0xE0E60684, (q31_t)0x83D60411,
-	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE26CB01A,
-	(q31_t)0x8376B422, (q31_t)0xE330734C, (q31_t)0x8348D8DB,
-	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4B8CD10,
-	(q31_t)0x82F0BDE8, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13,
-	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE70747C3,
-	(q31_t)0x8275A0C0, (q31_t)0xE7CC9917, (q31_t)0x824F0208,
-	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE957ECFB,
-	(q31_t)0x82056758, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
-	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEBAA894E,
-	(q31_t)0x81A01B6C, (q31_t)0xEC71244F, (q31_t)0x8180C6A9,
-	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEDFEE92B,
-	(q31_t)0x8145C5C6, (q31_t)0xEEC60F31, (q31_t)0x812A1A39,
-	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xF054D8D4,
-	(q31_t)0x80F66E3C, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C,
-	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2AC246D,
-	(q31_t)0x80B21BAF, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
-	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF50497FA,
-	(q31_t)0x8078D40D, (q31_t)0xF5CCF743, (q31_t)0x80683143,
-	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF75DFF65,
-	(q31_t)0x804A9C4D, (q31_t)0xF826A461, (q31_t)0x803DAA69,
-	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9B82683,
-	(q31_t)0x80277872, (q31_t)0xFA80FFCB, (q31_t)0x801E3894,
-	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFC12D919,
-	(q31_t)0x800F6B88, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D,
-	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE6DE2E0,
-	(q31_t)0x800277A5, (q31_t)0xFF36F078, (q31_t)0x80009DE9
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 2048, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- */
-const q31_t twiddleCoef_2048_q31[3072] = {
-	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFD885,
-	(q31_t)0x006487E3, (q31_t)0x7FFF6216, (q31_t)0x00C90F88,
-	(q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFD885A,
-	(q31_t)0x01921D1F, (q31_t)0x7FFC250F, (q31_t)0x01F6A296,
-	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF871A1,
-	(q31_t)0x02BFA9A4, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
-	(q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF09477,
-	(q31_t)0x03ED26E6, (q31_t)0x7FED5790, (q31_t)0x0451A176,
-	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE5F108,
-	(q31_t)0x051A8E5C, (q31_t)0x7FE1C76B, (q31_t)0x057F0034,
-	(q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FD8878D,
-	(q31_t)0x0647D97C, (q31_t)0x7FD37152, (q31_t)0x06AC406F,
-	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC85853,
-	(q31_t)0x077501BE, (q31_t)0x7FC25596, (q31_t)0x07D95B9E,
-	(q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB563B2,
-	(q31_t)0x08A2009A, (q31_t)0x7FAE7494, (q31_t)0x09064B3A,
-	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F9FAA15,
-	(q31_t)0x09CECF89, (q31_t)0x7F97CEBC, (q31_t)0x0A3308BC,
-	(q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F872BF3,
-	(q31_t)0x0AFB6805, (q31_t)0x7F7E648B, (q31_t)0x0B5F8D9F,
-	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F6BE9D4,
-	(q31_t)0x0C27C389, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
-	(q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F4DE450,
-	(q31_t)0x0D53DB92, (q31_t)0x7F434563, (q31_t)0x0DB7D376,
-	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2D1C0E,
-	(q31_t)0x0E7FA99D, (q31_t)0x7F2191B4, (q31_t)0x0EE38765,
-	(q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0991C3,
-	(q31_t)0x0FAB272B, (q31_t)0x7EFD1C3C, (q31_t)0x100EE8AD,
-	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE34635,
-	(q31_t)0x10D64DBC, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE,
-	(q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EBA3A39,
-	(q31_t)0x120116D4, (q31_t)0x7EABEF2C, (q31_t)0x1264994E,
-	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E8E6EB1,
-	(q31_t)0x132B7BF9, (q31_t)0x7E7F3956, (q31_t)0x138EDBB0,
-	(q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E5FE493,
-	(q31_t)0x145576B1, (q31_t)0x7E4FC53E, (q31_t)0x14B8B17F,
-	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E2E9CDF,
-	(q31_t)0x157F0086, (q31_t)0x7E1D93E9, (q31_t)0x15E21444,
-	(q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7DFA98A7,
-	(q31_t)0x16A81305, (q31_t)0x7DE8A670, (q31_t)0x170AFD8D,
-	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DC3D90D,
-	(q31_t)0x17D0A7BB, (q31_t)0x7DB0FDF7, (q31_t)0x183366E8,
-	(q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D8A5F3F,
-	(q31_t)0x18F8B83C, (q31_t)0x7D769BB5, (q31_t)0x195B49E9,
-	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D4E2C7E,
-	(q31_t)0x1A203E1B, (q31_t)0x7D3980EC, (q31_t)0x1A82A025,
-	(q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D0F4218,
-	(q31_t)0x1B4732EF, (q31_t)0x7CF9AEF0, (q31_t)0x1BA96334,
-	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CCDA168,
-	(q31_t)0x1C6D9053, (q31_t)0x7CB72724, (q31_t)0x1CCF8CB3,
-	(q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C894BDD,
-	(q31_t)0x1D934FE5, (q31_t)0x7C71EAF8, (q31_t)0x1DF5163F,
-	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4242F2,
-	(q31_t)0x1EB86B46, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
-	(q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7BF88830,
-	(q31_t)0x1FDCDC1A, (q31_t)0x7BDF5B94, (q31_t)0x203E300D,
-	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BAC1D31,
-	(q31_t)0x21009C0B, (q31_t)0x7B920B89, (q31_t)0x2161B39F,
-	(q31_t)0x7B77ADA8, (q31_t)0x21C2B69C, (q31_t)0x7B5D039D,
-	(q31_t)0x2223A4C5, (q31_t)0x7B420D7A, (q31_t)0x22847DDF,
-	(q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B0B3D2C,
-	(q31_t)0x2345EFF7, (q31_t)0x7AEF6323, (q31_t)0x23A6887E,
-	(q31_t)0x7AD33D45, (q31_t)0x24070B07, (q31_t)0x7AB6CBA3,
-	(q31_t)0x24677757, (q31_t)0x7A9A0E4F, (q31_t)0x24C7CD32,
-	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A5FB0D8,
-	(q31_t)0x2588349D, (q31_t)0x7A4210D8, (q31_t)0x25E845B5,
-	(q31_t)0x7A24256E, (q31_t)0x26483F6C, (q31_t)0x7A05EEAD,
-	(q31_t)0x26A82185, (q31_t)0x79E76CA6, (q31_t)0x2707EBC6,
-	(q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79A98715,
-	(q31_t)0x27C737D2, (q31_t)0x798A23B1, (q31_t)0x2826B928,
-	(q31_t)0x796A7554, (q31_t)0x288621B9, (q31_t)0x794A7C11,
-	(q31_t)0x28E5714A, (q31_t)0x792A37FE, (q31_t)0x2944A7A2,
-	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78E8CFB1,
-	(q31_t)0x2A02C7B8, (q31_t)0x78C7ABA1, (q31_t)0x2A61B101,
-	(q31_t)0x78A63D10, (q31_t)0x2AC08025, (q31_t)0x78848413,
-	(q31_t)0x2B1F34EB, (q31_t)0x786280BF, (q31_t)0x2B7DCF17,
-	(q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x781D9B64,
-	(q31_t)0x2C3AB2B9, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA,
-	(q31_t)0x77D78DAA, (q31_t)0x2CF72939, (q31_t)0x77B417DF,
-	(q31_t)0x2D553AFB, (q31_t)0x7790583D, (q31_t)0x2DB330C7,
-	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7747FBCE,
-	(q31_t)0x2E6EC792, (q31_t)0x77235F2D, (q31_t)0x2ECC681E,
-	(q31_t)0x76FE790E, (q31_t)0x2F29EBCC, (q31_t)0x76D94988,
-	(q31_t)0x2F875262, (q31_t)0x76B3D0B3, (q31_t)0x2FE49BA6,
-	(q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x76680376,
-	(q31_t)0x309ED555, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
-	(q31_t)0x761B1211, (q31_t)0x3158970D, (q31_t)0x75F42C0A,
-	(q31_t)0x31B54A5D, (q31_t)0x75CCFD42, (q31_t)0x3211DF03,
-	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x757DC5CA,
-	(q31_t)0x32CAAB6F, (q31_t)0x7555BD4B, (q31_t)0x3326E2C2,
-	(q31_t)0x752D6C6C, (q31_t)0x3382FA88, (q31_t)0x7504D345,
-	(q31_t)0x33DEF287, (q31_t)0x74DBF1EF, (q31_t)0x343ACA87,
-	(q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x7489571B,
-	(q31_t)0x34F219A7, (q31_t)0x745F9DD1, (q31_t)0x354D9056,
-	(q31_t)0x74359CBD, (q31_t)0x35A8E624, (q31_t)0x740B53FA,
-	(q31_t)0x36041AD9, (q31_t)0x73E0C3A3, (q31_t)0x365F2E3B,
-	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x738ACC9E,
-	(q31_t)0x3714F02A, (q31_t)0x735F6626, (q31_t)0x376F9E46,
-	(q31_t)0x7333B883, (q31_t)0x37CA2A30, (q31_t)0x7307C3D0,
-	(q31_t)0x382493B0, (q31_t)0x72DB8828, (q31_t)0x387EDA8E,
-	(q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72823C66,
-	(q31_t)0x3932FF87, (q31_t)0x72552C84, (q31_t)0x398CDD32,
-	(q31_t)0x7227D61C, (q31_t)0x39E6975D, (q31_t)0x71FA3948,
-	(q31_t)0x3A402DD1, (q31_t)0x71CC5626, (q31_t)0x3A99A057,
-	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x716FBD68,
-	(q31_t)0x3B4C18BA, (q31_t)0x71410804, (q31_t)0x3BA51E29,
-	(q31_t)0x71120CC5, (q31_t)0x3BFDFECD, (q31_t)0x70E2CBC6,
-	(q31_t)0x3C56BA70, (q31_t)0x70B34524, (q31_t)0x3CAF50DA,
-	(q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70536771,
-	(q31_t)0x3D600D2B, (q31_t)0x70231099, (q31_t)0x3DB832A5,
-	(q31_t)0x6FF27496, (q31_t)0x3E10320D, (q31_t)0x6FC19385,
-	(q31_t)0x3E680B2C, (q31_t)0x6F906D84, (q31_t)0x3EBFBDCC,
-	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6F2D532C,
-	(q31_t)0x3F6EAEB8, (q31_t)0x6EFB5F12, (q31_t)0x3FC5EC97,
-	(q31_t)0x6EC92682, (q31_t)0x401D0320, (q31_t)0x6E96A99C,
-	(q31_t)0x4073F21D, (q31_t)0x6E63E87F, (q31_t)0x40CAB957,
-	(q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6DFD9A1B,
-	(q31_t)0x4177CFB0, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
-	(q31_t)0x6D963C54, (q31_t)0x42244480, (q31_t)0x6D6227FA,
-	(q31_t)0x427A41D0, (q31_t)0x6D2DD027, (q31_t)0x42D0161E,
-	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6CC45697,
-	(q31_t)0x437B42E1, (q31_t)0x6C8F351C, (q31_t)0x43D09AEC,
-	(q31_t)0x6C59D0A9, (q31_t)0x4425C923, (q31_t)0x6C242960,
-	(q31_t)0x447ACD50, (q31_t)0x6BEE3F62, (q31_t)0x44CFA73F,
-	(q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B81A3CD,
-	(q31_t)0x4578DB93, (q31_t)0x6B4AF278, (q31_t)0x45CD358F,
-	(q31_t)0x6B13FEF5, (q31_t)0x4621647C, (q31_t)0x6ADCC964,
-	(q31_t)0x46756827, (q31_t)0x6AA551E8, (q31_t)0x46C9405C,
-	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x6A359DB9,
-	(q31_t)0x47706D93, (q31_t)0x69FD614A, (q31_t)0x47C3C22E,
-	(q31_t)0x69C4E37A, (q31_t)0x4816EA85, (q31_t)0x698C246C,
-	(q31_t)0x4869E664, (q31_t)0x69532442, (q31_t)0x48BCB598,
-	(q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68E06129,
-	(q31_t)0x4961CD32, (q31_t)0x68A69E81, (q31_t)0x49B41533,
-	(q31_t)0x686C9B4B, (q31_t)0x4A062FBD, (q31_t)0x683257AA,
-	(q31_t)0x4A581C9D, (q31_t)0x67F7D3C4, (q31_t)0x4AA9DBA1,
-	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x67820BB6,
-	(q31_t)0x4B4CCF4D, (q31_t)0x6746C7D7, (q31_t)0x4B9E038F,
-	(q31_t)0x670B4443, (q31_t)0x4BEF092D, (q31_t)0x66CF811F,
-	(q31_t)0x4C3FDFF3, (q31_t)0x66937E90, (q31_t)0x4C9087B1,
-	(q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x661ABBC5,
-	(q31_t)0x4D31494B, (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4,
-	(q31_t)0x65A0FD0B, (q31_t)0x4DD14C6E, (q31_t)0x6563BF92,
-	(q31_t)0x4E210617, (q31_t)0x6526438E, (q31_t)0x4E708F8F,
-	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x64AA907F,
-	(q31_t)0x4F0F1126, (q31_t)0x646C59BF, (q31_t)0x4F5E08E3,
-	(q31_t)0x642DE50D, (q31_t)0x4FACCFAB, (q31_t)0x63EF328F,
-	(q31_t)0x4FFB654D, (q31_t)0x63B0426D, (q31_t)0x5049C999,
-	(q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x6331A9D4,
-	(q31_t)0x50E5FD6C, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
-	(q31_t)0x62B21C7B, (q31_t)0x518169A4, (q31_t)0x6271FA69,
-	(q31_t)0x51CED46E, (q31_t)0x62319B9D, (q31_t)0x521C0CC1,
-	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x61B02876,
-	(q31_t)0x52B5E545, (q31_t)0x616F146B, (q31_t)0x53028517,
-	(q31_t)0x612DC446, (q31_t)0x534EF1B5, (q31_t)0x60EC3830,
-	(q31_t)0x539B2AEF, (q31_t)0x60AA704F, (q31_t)0x53E73097,
-	(q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x60262DD5,
-	(q31_t)0x547EA073, (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A,
-	(q31_t)0x5FA0FE1E, (q31_t)0x55153FD4, (q31_t)0x5F5E0DB3,
-	(q31_t)0x556040E2, (q31_t)0x5F1AE273, (q31_t)0x55AB0D46,
-	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E93DC1F,
-	(q31_t)0x56400757, (q31_t)0x5E50015D, (q31_t)0x568A34A9,
-	(q31_t)0x5E0BEC6E, (q31_t)0x56D42C99, (q31_t)0x5DC79D7C,
-	(q31_t)0x571DEEF9, (q31_t)0x5D8314B0, (q31_t)0x57677B9D,
-	(q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5CF95638,
-	(q31_t)0x57F9F2F7, (q31_t)0x5CB420DF, (q31_t)0x5842DD54,
-	(q31_t)0x5C6EB258, (q31_t)0x588B913F, (q31_t)0x5C290ACC,
-	(q31_t)0x58D40E8C, (q31_t)0x5BE32A67, (q31_t)0x591C550E,
-	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B56BFBD,
-	(q31_t)0x59AC3CFD, (q31_t)0x5B1035CF, (q31_t)0x59F3DE12,
-	(q31_t)0x5AC973B4, (q31_t)0x5A3B47AA, (q31_t)0x5A82799A,
-	(q31_t)0x5A82799A, (q31_t)0x5A3B47AA, (q31_t)0x5AC973B4,
-	(q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59AC3CFD,
-	(q31_t)0x5B56BFBD, (q31_t)0x59646497, (q31_t)0x5B9D1153,
-	(q31_t)0x591C550E, (q31_t)0x5BE32A67, (q31_t)0x58D40E8C,
-	(q31_t)0x5C290ACC, (q31_t)0x588B913F, (q31_t)0x5C6EB258,
-	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57F9F2F7,
-	(q31_t)0x5CF95638, (q31_t)0x57B0D256, (q31_t)0x5D3E5236,
-	(q31_t)0x57677B9D, (q31_t)0x5D8314B0, (q31_t)0x571DEEF9,
-	(q31_t)0x5DC79D7C, (q31_t)0x56D42C99, (q31_t)0x5E0BEC6E,
-	(q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x56400757,
-	(q31_t)0x5E93DC1F, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
-	(q31_t)0x55AB0D46, (q31_t)0x5F1AE273, (q31_t)0x556040E2,
-	(q31_t)0x5F5E0DB3, (q31_t)0x55153FD4, (q31_t)0x5FA0FE1E,
-	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x547EA073,
-	(q31_t)0x60262DD5, (q31_t)0x5433027D, (q31_t)0x60686CCE,
-	(q31_t)0x53E73097, (q31_t)0x60AA704F, (q31_t)0x539B2AEF,
-	(q31_t)0x60EC3830, (q31_t)0x534EF1B5, (q31_t)0x612DC446,
-	(q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x52B5E545,
-	(q31_t)0x61B02876, (q31_t)0x5269126E, (q31_t)0x61F1003E,
-	(q31_t)0x521C0CC1, (q31_t)0x62319B9D, (q31_t)0x51CED46E,
-	(q31_t)0x6271FA69, (q31_t)0x518169A4, (q31_t)0x62B21C7B,
-	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x50E5FD6C,
-	(q31_t)0x6331A9D4, (q31_t)0x5097FC5E, (q31_t)0x637114CC,
-	(q31_t)0x5049C999, (q31_t)0x63B0426D, (q31_t)0x4FFB654D,
-	(q31_t)0x63EF328F, (q31_t)0x4FACCFAB, (q31_t)0x642DE50D,
-	(q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4F0F1126,
-	(q31_t)0x64AA907F, (q31_t)0x4EBFE8A4, (q31_t)0x64E88926,
-	(q31_t)0x4E708F8F, (q31_t)0x6526438E, (q31_t)0x4E210617,
-	(q31_t)0x6563BF92, (q31_t)0x4DD14C6E, (q31_t)0x65A0FD0B,
-	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4D31494B,
-	(q31_t)0x661ABBC5, (q31_t)0x4CE10034, (q31_t)0x66573CBB,
-	(q31_t)0x4C9087B1, (q31_t)0x66937E90, (q31_t)0x4C3FDFF3,
-	(q31_t)0x66CF811F, (q31_t)0x4BEF092D, (q31_t)0x670B4443,
-	(q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4B4CCF4D,
-	(q31_t)0x67820BB6, (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC,
-	(q31_t)0x4AA9DBA1, (q31_t)0x67F7D3C4, (q31_t)0x4A581C9D,
-	(q31_t)0x683257AA, (q31_t)0x4A062FBD, (q31_t)0x686C9B4B,
-	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4961CD32,
-	(q31_t)0x68E06129, (q31_t)0x490F57EE, (q31_t)0x6919E320,
-	(q31_t)0x48BCB598, (q31_t)0x69532442, (q31_t)0x4869E664,
-	(q31_t)0x698C246C, (q31_t)0x4816EA85, (q31_t)0x69C4E37A,
-	(q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x47706D93,
-	(q31_t)0x6A359DB9, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
-	(q31_t)0x46C9405C, (q31_t)0x6AA551E8, (q31_t)0x46756827,
-	(q31_t)0x6ADCC964, (q31_t)0x4621647C, (q31_t)0x6B13FEF5,
-	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x4578DB93,
-	(q31_t)0x6B81A3CD, (q31_t)0x452456BC, (q31_t)0x6BB812D0,
-	(q31_t)0x44CFA73F, (q31_t)0x6BEE3F62, (q31_t)0x447ACD50,
-	(q31_t)0x6C242960, (q31_t)0x4425C923, (q31_t)0x6C59D0A9,
-	(q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x437B42E1,
-	(q31_t)0x6CC45697, (q31_t)0x4325C135, (q31_t)0x6CF934FB,
-	(q31_t)0x42D0161E, (q31_t)0x6D2DD027, (q31_t)0x427A41D0,
-	(q31_t)0x6D6227FA, (q31_t)0x42244480, (q31_t)0x6D963C54,
-	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4177CFB0,
-	(q31_t)0x6DFD9A1B, (q31_t)0x4121589A, (q31_t)0x6E30E349,
-	(q31_t)0x40CAB957, (q31_t)0x6E63E87F, (q31_t)0x4073F21D,
-	(q31_t)0x6E96A99C, (q31_t)0x401D0320, (q31_t)0x6EC92682,
-	(q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F6EAEB8,
-	(q31_t)0x6F2D532C, (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1,
-	(q31_t)0x3EBFBDCC, (q31_t)0x6F906D84, (q31_t)0x3E680B2C,
-	(q31_t)0x6FC19385, (q31_t)0x3E10320D, (q31_t)0x6FF27496,
-	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D600D2B,
-	(q31_t)0x70536771, (q31_t)0x3D07C1D5, (q31_t)0x708378FE,
-	(q31_t)0x3CAF50DA, (q31_t)0x70B34524, (q31_t)0x3C56BA70,
-	(q31_t)0x70E2CBC6, (q31_t)0x3BFDFECD, (q31_t)0x71120CC5,
-	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3B4C18BA,
-	(q31_t)0x716FBD68, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2,
-	(q31_t)0x3A99A057, (q31_t)0x71CC5626, (q31_t)0x3A402DD1,
-	(q31_t)0x71FA3948, (q31_t)0x39E6975D, (q31_t)0x7227D61C,
-	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x3932FF87,
-	(q31_t)0x72823C66, (q31_t)0x38D8FE93, (q31_t)0x72AF05A6,
-	(q31_t)0x387EDA8E, (q31_t)0x72DB8828, (q31_t)0x382493B0,
-	(q31_t)0x7307C3D0, (q31_t)0x37CA2A30, (q31_t)0x7333B883,
-	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x3714F02A,
-	(q31_t)0x738ACC9E, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
-	(q31_t)0x365F2E3B, (q31_t)0x73E0C3A3, (q31_t)0x36041AD9,
-	(q31_t)0x740B53FA, (q31_t)0x35A8E624, (q31_t)0x74359CBD,
-	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x34F219A7,
-	(q31_t)0x7489571B, (q31_t)0x3496824F, (q31_t)0x74B2C883,
-	(q31_t)0x343ACA87, (q31_t)0x74DBF1EF, (q31_t)0x33DEF287,
-	(q31_t)0x7504D345, (q31_t)0x3382FA88, (q31_t)0x752D6C6C,
-	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x32CAAB6F,
-	(q31_t)0x757DC5CA, (q31_t)0x326E54C7, (q31_t)0x75A585CF,
-	(q31_t)0x3211DF03, (q31_t)0x75CCFD42, (q31_t)0x31B54A5D,
-	(q31_t)0x75F42C0A, (q31_t)0x3158970D, (q31_t)0x761B1211,
-	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x309ED555,
-	(q31_t)0x76680376, (q31_t)0x3041C760, (q31_t)0x768E0EA5,
-	(q31_t)0x2FE49BA6, (q31_t)0x76B3D0B3, (q31_t)0x2F875262,
-	(q31_t)0x76D94988, (q31_t)0x2F29EBCC, (q31_t)0x76FE790E,
-	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E6EC792,
-	(q31_t)0x7747FBCE, (q31_t)0x2E110A62, (q31_t)0x776C4EDB,
-	(q31_t)0x2DB330C7, (q31_t)0x7790583D, (q31_t)0x2D553AFB,
-	(q31_t)0x77B417DF, (q31_t)0x2CF72939, (q31_t)0x77D78DAA,
-	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2C3AB2B9,
-	(q31_t)0x781D9B64, (q31_t)0x2BDC4E6F, (q31_t)0x78403328,
-	(q31_t)0x2B7DCF17, (q31_t)0x786280BF, (q31_t)0x2B1F34EB,
-	(q31_t)0x78848413, (q31_t)0x2AC08025, (q31_t)0x78A63D10,
-	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x2A02C7B8,
-	(q31_t)0x78E8CFB1, (q31_t)0x29A3C484, (q31_t)0x7909A92C,
-	(q31_t)0x2944A7A2, (q31_t)0x792A37FE, (q31_t)0x28E5714A,
-	(q31_t)0x794A7C11, (q31_t)0x288621B9, (q31_t)0x796A7554,
-	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27C737D2,
-	(q31_t)0x79A98715, (q31_t)0x27679DF4, (q31_t)0x79C89F6D,
-	(q31_t)0x2707EBC6, (q31_t)0x79E76CA6, (q31_t)0x26A82185,
-	(q31_t)0x7A05EEAD, (q31_t)0x26483F6C, (q31_t)0x7A24256E,
-	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x2588349D,
-	(q31_t)0x7A5FB0D8, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
-	(q31_t)0x24C7CD32, (q31_t)0x7A9A0E4F, (q31_t)0x24677757,
-	(q31_t)0x7AB6CBA3, (q31_t)0x24070B07, (q31_t)0x7AD33D45,
-	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2345EFF7,
-	(q31_t)0x7B0B3D2C, (q31_t)0x22E541AE, (q31_t)0x7B26CB4F,
-	(q31_t)0x22847DDF, (q31_t)0x7B420D7A, (q31_t)0x2223A4C5,
-	(q31_t)0x7B5D039D, (q31_t)0x21C2B69C, (q31_t)0x7B77ADA8,
-	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x21009C0B,
-	(q31_t)0x7BAC1D31, (q31_t)0x209F701C, (q31_t)0x7BC5E28F,
-	(q31_t)0x203E300D, (q31_t)0x7BDF5B94, (q31_t)0x1FDCDC1A,
-	(q31_t)0x7BF88830, (q31_t)0x1F7B7480, (q31_t)0x7C116853,
-	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1EB86B46,
-	(q31_t)0x7C4242F2, (q31_t)0x1E56CA1E, (q31_t)0x7C5A3D4F,
-	(q31_t)0x1DF5163F, (q31_t)0x7C71EAF8, (q31_t)0x1D934FE5,
-	(q31_t)0x7C894BDD, (q31_t)0x1D31774D, (q31_t)0x7CA05FF1,
-	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C6D9053,
-	(q31_t)0x7CCDA168, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1,
-	(q31_t)0x1BA96334, (q31_t)0x7CF9AEF0, (q31_t)0x1B4732EF,
-	(q31_t)0x7D0F4218, (q31_t)0x1AE4F1D6, (q31_t)0x7D24881A,
-	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x1A203E1B,
-	(q31_t)0x7D4E2C7E, (q31_t)0x19BDCBF2, (q31_t)0x7D628AC5,
-	(q31_t)0x195B49E9, (q31_t)0x7D769BB5, (q31_t)0x18F8B83C,
-	(q31_t)0x7D8A5F3F, (q31_t)0x18961727, (q31_t)0x7D9DD55A,
-	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x17D0A7BB,
-	(q31_t)0x7DC3D90D, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E,
-	(q31_t)0x170AFD8D, (q31_t)0x7DE8A670, (q31_t)0x16A81305,
-	(q31_t)0x7DFA98A7, (q31_t)0x16451A83, (q31_t)0x7E0C3D29,
-	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x157F0086,
-	(q31_t)0x7E2E9CDF, (q31_t)0x151BDF85, (q31_t)0x7E3F57FE,
-	(q31_t)0x14B8B17F, (q31_t)0x7E4FC53E, (q31_t)0x145576B1,
-	(q31_t)0x7E5FE493, (q31_t)0x13F22F57, (q31_t)0x7E6FB5F3,
-	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x132B7BF9,
-	(q31_t)0x7E8E6EB1, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
-	(q31_t)0x1264994E, (q31_t)0x7EABEF2C, (q31_t)0x120116D4,
-	(q31_t)0x7EBA3A39, (q31_t)0x119D8940, (q31_t)0x7EC8371A,
-	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x10D64DBC,
-	(q31_t)0x7EE34635, (q31_t)0x1072A047, (q31_t)0x7EF0585F,
-	(q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C, (q31_t)0x0FAB272B,
-	(q31_t)0x7F0991C3, (q31_t)0x0F475BFE, (q31_t)0x7F15B8EE,
-	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E7FA99D,
-	(q31_t)0x7F2D1C0E, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5,
-	(q31_t)0x0DB7D376, (q31_t)0x7F434563, (q31_t)0x0D53DB92,
-	(q31_t)0x7F4DE450, (q31_t)0x0CEFDB75, (q31_t)0x7F5834B6,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C27C389,
-	(q31_t)0x7F6BE9D4, (q31_t)0x0BC3AC35, (q31_t)0x7F754E7F,
-	(q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B, (q31_t)0x0AFB6805,
-	(q31_t)0x7F872BF3, (q31_t)0x0A973BA5, (q31_t)0x7F8FA4AF,
-	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x09CECF89,
-	(q31_t)0x7F9FAA15, (q31_t)0x096A9049, (q31_t)0x7FA736B4,
-	(q31_t)0x09064B3A, (q31_t)0x7FAE7494, (q31_t)0x08A2009A,
-	(q31_t)0x7FB563B2, (q31_t)0x083DB0A7, (q31_t)0x7FBC040A,
-	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x077501BE,
-	(q31_t)0x7FC85853, (q31_t)0x0710A344, (q31_t)0x7FCE0C3E,
-	(q31_t)0x06AC406F, (q31_t)0x7FD37152, (q31_t)0x0647D97C,
-	(q31_t)0x7FD8878D, (q31_t)0x05E36EA9, (q31_t)0x7FDD4EEC,
-	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x051A8E5C,
-	(q31_t)0x7FE5F108, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0,
-	(q31_t)0x0451A176, (q31_t)0x7FED5790, (q31_t)0x03ED26E6,
-	(q31_t)0x7FF09477, (q31_t)0x0388A9E9, (q31_t)0x7FF38273,
-	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02BFA9A4,
-	(q31_t)0x7FF871A1, (q31_t)0x025B26D7, (q31_t)0x7FFA72D1,
-	(q31_t)0x01F6A296, (q31_t)0x7FFC250F, (q31_t)0x01921D1F,
-	(q31_t)0x7FFD885A, (q31_t)0x012D96B0, (q31_t)0x7FFE9CB2,
-	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x006487E3,
-	(q31_t)0x7FFFD885, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
-	(q31_t)0xFF9B781D, (q31_t)0x7FFFD885, (q31_t)0xFF36F078,
-	(q31_t)0x7FFF6216, (q31_t)0xFED2694F, (q31_t)0x7FFE9CB2,
-	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE095D69,
-	(q31_t)0x7FFC250F, (q31_t)0xFDA4D928, (q31_t)0x7FFA72D1,
-	(q31_t)0xFD40565B, (q31_t)0x7FF871A1, (q31_t)0xFCDBD541,
-	(q31_t)0x7FF62182, (q31_t)0xFC775616, (q31_t)0x7FF38273,
-	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBAE5E89,
-	(q31_t)0x7FED5790, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0,
-	(q31_t)0xFAE571A4, (q31_t)0x7FE5F108, (q31_t)0xFA80FFCB,
-	(q31_t)0x7FE1C76B, (q31_t)0xFA1C9156, (q31_t)0x7FDD4EEC,
-	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF953BF90,
-	(q31_t)0x7FD37152, (q31_t)0xF8EF5CBB, (q31_t)0x7FCE0C3E,
-	(q31_t)0xF88AFE41, (q31_t)0x7FC85853, (q31_t)0xF826A461,
-	(q31_t)0x7FC25596, (q31_t)0xF7C24F58, (q31_t)0x7FBC040A,
-	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6F9B4C5,
-	(q31_t)0x7FAE7494, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4,
-	(q31_t)0xF6313076, (q31_t)0x7F9FAA15, (q31_t)0xF5CCF743,
-	(q31_t)0x7F97CEBC, (q31_t)0xF568C45A, (q31_t)0x7F8FA4AF,
-	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4A07260,
-	(q31_t)0x7F7E648B, (q31_t)0xF43C53CA, (q31_t)0x7F754E7F,
-	(q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4, (q31_t)0xF3742CA1,
-	(q31_t)0x7F62368F, (q31_t)0xF310248A, (q31_t)0x7F5834B6,
-	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF2482C89,
-	(q31_t)0x7F434563, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5,
-	(q31_t)0xF1805662, (q31_t)0x7F2D1C0E, (q31_t)0xF11C789A,
-	(q31_t)0x7F2191B4, (q31_t)0xF0B8A401, (q31_t)0x7F15B8EE,
-	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEFF11752,
-	(q31_t)0x7EFD1C3C, (q31_t)0xEF8D5FB8, (q31_t)0x7EF0585F,
-	(q31_t)0xEF29B243, (q31_t)0x7EE34635, (q31_t)0xEEC60F31,
-	(q31_t)0x7ED5E5C6, (q31_t)0xEE6276BF, (q31_t)0x7EC8371A,
-	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xED9B66B2,
-	(q31_t)0x7EABEF2C, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
-	(q31_t)0xECD48406, (q31_t)0x7E8E6EB1, (q31_t)0xEC71244F,
-	(q31_t)0x7E7F3956, (q31_t)0xEC0DD0A8, (q31_t)0x7E6FB5F3,
-	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB474E80,
-	(q31_t)0x7E4FC53E, (q31_t)0xEAE4207A, (q31_t)0x7E3F57FE,
-	(q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF, (q31_t)0xEA1DEBBB,
-	(q31_t)0x7E1D93E9, (q31_t)0xE9BAE57C, (q31_t)0x7E0C3D29,
-	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE8F50273,
-	(q31_t)0x7DE8A670, (q31_t)0xE8922621, (q31_t)0x7DD6668E,
-	(q31_t)0xE82F5844, (q31_t)0x7DC3D90D, (q31_t)0xE7CC9917,
-	(q31_t)0x7DB0FDF7, (q31_t)0xE769E8D8, (q31_t)0x7D9DD55A,
-	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6A4B616,
-	(q31_t)0x7D769BB5, (q31_t)0xE642340D, (q31_t)0x7D628AC5,
-	(q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E, (q31_t)0xE57D5FDA,
-	(q31_t)0x7D3980EC, (q31_t)0xE51B0E2A, (q31_t)0x7D24881A,
-	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE4569CCB,
-	(q31_t)0x7CF9AEF0, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1,
-	(q31_t)0xE3926FAC, (q31_t)0x7CCDA168, (q31_t)0xE330734C,
-	(q31_t)0x7CB72724, (q31_t)0xE2CE88B2, (q31_t)0x7CA05FF1,
-	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE20AE9C1,
-	(q31_t)0x7C71EAF8, (q31_t)0xE1A935E1, (q31_t)0x7C5A3D4F,
-	(q31_t)0xE14794B9, (q31_t)0x7C4242F2, (q31_t)0xE0E60684,
-	(q31_t)0x7C29FBEE, (q31_t)0xE0848B7F, (q31_t)0x7C116853,
-	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFC1CFF2,
-	(q31_t)0x7BDF5B94, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F,
-	(q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31, (q31_t)0xDE9E4C60,
-	(q31_t)0x7B920B89, (q31_t)0xDE3D4963, (q31_t)0x7B77ADA8,
-	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD7B8220,
-	(q31_t)0x7B420D7A, (q31_t)0xDD1ABE51, (q31_t)0x7B26CB4F,
-	(q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C, (q31_t)0xDC597781,
-	(q31_t)0x7AEF6323, (q31_t)0xDBF8F4F8, (q31_t)0x7AD33D45,
-	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB3832CD,
-	(q31_t)0x7A9A0E4F, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
-	(q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8, (q31_t)0xDA17BA4A,
-	(q31_t)0x7A4210D8, (q31_t)0xD9B7C093, (q31_t)0x7A24256E,
-	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD8F81439,
-	(q31_t)0x79E76CA6, (q31_t)0xD898620C, (q31_t)0x79C89F6D,
-	(q31_t)0xD838C82D, (q31_t)0x79A98715, (q31_t)0xD7D946D7,
-	(q31_t)0x798A23B1, (q31_t)0xD779DE46, (q31_t)0x796A7554,
-	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6BB585D,
-	(q31_t)0x792A37FE, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C,
-	(q31_t)0xD5FD3847, (q31_t)0x78E8CFB1, (q31_t)0xD59E4EFE,
-	(q31_t)0x78C7ABA1, (q31_t)0xD53F7FDA, (q31_t)0x78A63D10,
-	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD48230E8,
-	(q31_t)0x786280BF, (q31_t)0xD423B190, (q31_t)0x78403328,
-	(q31_t)0xD3C54D46, (q31_t)0x781D9B64, (q31_t)0xD3670445,
-	(q31_t)0x77FAB988, (q31_t)0xD308D6C6, (q31_t)0x77D78DAA,
-	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD24CCF38,
-	(q31_t)0x7790583D, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB,
-	(q31_t)0xD191386D, (q31_t)0x7747FBCE, (q31_t)0xD13397E1,
-	(q31_t)0x77235F2D, (q31_t)0xD0D61433, (q31_t)0x76FE790E,
-	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD01B6459,
-	(q31_t)0x76B3D0B3, (q31_t)0xCFBE389F, (q31_t)0x768E0EA5,
-	(q31_t)0xCF612AAA, (q31_t)0x76680376, (q31_t)0xCF043AB2,
-	(q31_t)0x7641AF3C, (q31_t)0xCEA768F2, (q31_t)0x761B1211,
-	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCDEE20FC,
-	(q31_t)0x75CCFD42, (q31_t)0xCD91AB38, (q31_t)0x75A585CF,
-	(q31_t)0xCD355490, (q31_t)0x757DC5CA, (q31_t)0xCCD91D3D,
-	(q31_t)0x7555BD4B, (q31_t)0xCC7D0577, (q31_t)0x752D6C6C,
-	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBC53578,
-	(q31_t)0x74DBF1EF, (q31_t)0xCB697DB0, (q31_t)0x74B2C883,
-	(q31_t)0xCB0DE658, (q31_t)0x7489571B, (q31_t)0xCAB26FA9,
-	(q31_t)0x745F9DD1, (q31_t)0xCA5719DB, (q31_t)0x74359CBD,
-	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9A0D1C4,
-	(q31_t)0x73E0C3A3, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
-	(q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E, (q31_t)0xC89061BA,
-	(q31_t)0x735F6626, (q31_t)0xC835D5D0, (q31_t)0x7333B883,
-	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7812571,
-	(q31_t)0x72DB8828, (q31_t)0xC727016C, (q31_t)0x72AF05A6,
-	(q31_t)0xC6CD0079, (q31_t)0x72823C66, (q31_t)0xC67322CD,
-	(q31_t)0x72552C84, (q31_t)0xC61968A2, (q31_t)0x7227D61C,
-	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC5665FA8,
-	(q31_t)0x71CC5626, (q31_t)0xC50D1148, (q31_t)0x719E2CD2,
-	(q31_t)0xC4B3E746, (q31_t)0x716FBD68, (q31_t)0xC45AE1D7,
-	(q31_t)0x71410804, (q31_t)0xC4020132, (q31_t)0x71120CC5,
-	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC350AF25,
-	(q31_t)0x70B34524, (q31_t)0xC2F83E2A, (q31_t)0x708378FE,
-	(q31_t)0xC29FF2D4, (q31_t)0x70536771, (q31_t)0xC247CD5A,
-	(q31_t)0x70231099, (q31_t)0xC1EFCDF2, (q31_t)0x6FF27496,
-	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC1404233,
-	(q31_t)0x6F906D84, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1,
-	(q31_t)0xC0915147, (q31_t)0x6F2D532C, (q31_t)0xC03A1368,
-	(q31_t)0x6EFB5F12, (q31_t)0xBFE2FCDF, (q31_t)0x6EC92682,
-	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF3546A8,
-	(q31_t)0x6E63E87F, (q31_t)0xBEDEA765, (q31_t)0x6E30E349,
-	(q31_t)0xBE88304F, (q31_t)0x6DFD9A1B, (q31_t)0xBE31E19B,
-	(q31_t)0x6DCA0D14, (q31_t)0xBDDBBB7F, (q31_t)0x6D963C54,
-	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD2FE9E1,
-	(q31_t)0x6D2DD027, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB,
-	(q31_t)0xBC84BD1E, (q31_t)0x6CC45697, (q31_t)0xBC2F6513,
-	(q31_t)0x6C8F351C, (q31_t)0xBBDA36DC, (q31_t)0x6C59D0A9,
-	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB3058C0,
-	(q31_t)0x6BEE3F62, (q31_t)0xBADBA943, (q31_t)0x6BB812D0,
-	(q31_t)0xBA87246C, (q31_t)0x6B81A3CD, (q31_t)0xBA32CA70,
-	(q31_t)0x6B4AF278, (q31_t)0xB9DE9B83, (q31_t)0x6B13FEF5,
-	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB936BFA3,
-	(q31_t)0x6AA551E8, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
-	(q31_t)0xB88F926C, (q31_t)0x6A359DB9, (q31_t)0xB83C3DD1,
-	(q31_t)0x69FD614A, (q31_t)0xB7E9157A, (q31_t)0x69C4E37A,
-	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB7434A67,
-	(q31_t)0x69532442, (q31_t)0xB6F0A811, (q31_t)0x6919E320,
-	(q31_t)0xB69E32CD, (q31_t)0x68E06129, (q31_t)0xB64BEACC,
-	(q31_t)0x68A69E81, (q31_t)0xB5F9D042, (q31_t)0x686C9B4B,
-	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB556245E,
-	(q31_t)0x67F7D3C4, (q31_t)0xB5049368, (q31_t)0x67BD0FBC,
-	(q31_t)0xB4B330B2, (q31_t)0x67820BB6, (q31_t)0xB461FC70,
-	(q31_t)0x6746C7D7, (q31_t)0xB410F6D2, (q31_t)0x670B4443,
-	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB36F784E,
-	(q31_t)0x66937E90, (q31_t)0xB31EFFCB, (q31_t)0x66573CBB,
-	(q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5, (q31_t)0xB27E9D3B,
-	(q31_t)0x65DDFBD3, (q31_t)0xB22EB392, (q31_t)0x65A0FD0B,
-	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB18F7070,
-	(q31_t)0x6526438E, (q31_t)0xB140175B, (q31_t)0x64E88926,
-	(q31_t)0xB0F0EEDA, (q31_t)0x64AA907F, (q31_t)0xB0A1F71C,
-	(q31_t)0x646C59BF, (q31_t)0xB0533055, (q31_t)0x642DE50D,
-	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFB63667,
-	(q31_t)0x63B0426D, (q31_t)0xAF6803A1, (q31_t)0x637114CC,
-	(q31_t)0xAF1A0293, (q31_t)0x6331A9D4, (q31_t)0xAECC336B,
-	(q31_t)0x62F201AC, (q31_t)0xAE7E965B, (q31_t)0x62B21C7B,
-	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xADE3F33E,
-	(q31_t)0x62319B9D, (q31_t)0xAD96ED91, (q31_t)0x61F1003E,
-	(q31_t)0xAD4A1ABA, (q31_t)0x61B02876, (q31_t)0xACFD7AE8,
-	(q31_t)0x616F146B, (q31_t)0xACB10E4A, (q31_t)0x612DC446,
-	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC18CF68,
-	(q31_t)0x60AA704F, (q31_t)0xABCCFD82, (q31_t)0x60686CCE,
-	(q31_t)0xAB815F8C, (q31_t)0x60262DD5, (q31_t)0xAB35F5B5,
-	(q31_t)0x5FE3B38D, (q31_t)0xAAEAC02B, (q31_t)0x5FA0FE1E,
-	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA54F2B9,
-	(q31_t)0x5F1AE273, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
-	(q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F, (q31_t)0xA975CB56,
-	(q31_t)0x5E50015D, (q31_t)0xA92BD366, (q31_t)0x5E0BEC6E,
-	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8988463,
-	(q31_t)0x5D8314B0, (q31_t)0xA84F2DA9, (q31_t)0x5D3E5236,
-	(q31_t)0xA8060D08, (q31_t)0x5CF95638, (q31_t)0xA7BD22AB,
-	(q31_t)0x5CB420DF, (q31_t)0xA7746EC0, (q31_t)0x5C6EB258,
-	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA6E3AAF2,
-	(q31_t)0x5BE32A67, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153,
-	(q31_t)0xA653C302, (q31_t)0x5B56BFBD, (q31_t)0xA60C21ED,
-	(q31_t)0x5B1035CF, (q31_t)0xA5C4B855, (q31_t)0x5AC973B4,
-	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA5368C4B,
-	(q31_t)0x5A3B47AA, (q31_t)0xA4EFCA31, (q31_t)0x59F3DE12,
-	(q31_t)0xA4A94042, (q31_t)0x59AC3CFD, (q31_t)0xA462EEAC,
-	(q31_t)0x59646497, (q31_t)0xA41CD598, (q31_t)0x591C550E,
-	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3914DA7,
-	(q31_t)0x588B913F, (q31_t)0xA34BDF20, (q31_t)0x5842DD54,
-	(q31_t)0xA306A9C7, (q31_t)0x57F9F2F7, (q31_t)0xA2C1ADC9,
-	(q31_t)0x57B0D256, (q31_t)0xA27CEB4F, (q31_t)0x57677B9D,
-	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1F41391,
-	(q31_t)0x56D42C99, (q31_t)0xA1AFFEA2, (q31_t)0x568A34A9,
-	(q31_t)0xA16C23E1, (q31_t)0x56400757, (q31_t)0xA1288376,
-	(q31_t)0x55F5A4D2, (q31_t)0xA0E51D8C, (q31_t)0x55AB0D46,
-	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA05F01E1,
-	(q31_t)0x55153FD4, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A,
-	(q31_t)0x9FD9D22A, (q31_t)0x547EA073, (q31_t)0x9F979331,
-	(q31_t)0x5433027D, (q31_t)0x9F558FB0, (q31_t)0x53E73097,
-	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9ED23BB9,
-	(q31_t)0x534EF1B5, (q31_t)0x9E90EB94, (q31_t)0x53028517,
-	(q31_t)0x9E4FD789, (q31_t)0x52B5E545, (q31_t)0x9E0EFFC1,
-	(q31_t)0x5269126E, (q31_t)0x9DCE6462, (q31_t)0x521C0CC1,
-	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D4DE384,
-	(q31_t)0x518169A4, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
-	(q31_t)0x9CCE562B, (q31_t)0x50E5FD6C, (q31_t)0x9C8EEB33,
-	(q31_t)0x5097FC5E, (q31_t)0x9C4FBD92, (q31_t)0x5049C999,
-	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BD21AF2,
-	(q31_t)0x4FACCFAB, (q31_t)0x9B93A640, (q31_t)0x4F5E08E3,
-	(q31_t)0x9B556F80, (q31_t)0x4F0F1126, (q31_t)0x9B1776D9,
-	(q31_t)0x4EBFE8A4, (q31_t)0x9AD9BC71, (q31_t)0x4E708F8F,
-	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A5F02F5,
-	(q31_t)0x4DD14C6E, (q31_t)0x9A22042C, (q31_t)0x4D8162C4,
-	(q31_t)0x99E5443A, (q31_t)0x4D31494B, (q31_t)0x99A8C344,
-	(q31_t)0x4CE10034, (q31_t)0x996C816F, (q31_t)0x4C9087B1,
-	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98F4BBBC,
-	(q31_t)0x4BEF092D, (q31_t)0x98B93828, (q31_t)0x4B9E038F,
-	(q31_t)0x987DF449, (q31_t)0x4B4CCF4D, (q31_t)0x9842F043,
-	(q31_t)0x4AFB6C97, (q31_t)0x98082C3B, (q31_t)0x4AA9DBA1,
-	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x979364B5,
-	(q31_t)0x4A062FBD, (q31_t)0x9759617E, (q31_t)0x49B41533,
-	(q31_t)0x971F9ED6, (q31_t)0x4961CD32, (q31_t)0x96E61CDF,
-	(q31_t)0x490F57EE, (q31_t)0x96ACDBBD, (q31_t)0x48BCB598,
-	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x963B1C85,
-	(q31_t)0x4816EA85, (q31_t)0x96029EB5, (q31_t)0x47C3C22E,
-	(q31_t)0x95CA6246, (q31_t)0x47706D93, (q31_t)0x9592675B,
-	(q31_t)0x471CECE6, (q31_t)0x955AAE17, (q31_t)0x46C9405C,
-	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x94EC010B,
-	(q31_t)0x4621647C, (q31_t)0x94B50D87, (q31_t)0x45CD358F,
-	(q31_t)0x947E5C32, (q31_t)0x4578DB93, (q31_t)0x9447ED2F,
-	(q31_t)0x452456BC, (q31_t)0x9411C09D, (q31_t)0x44CFA73F,
-	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93A62F56,
-	(q31_t)0x4425C923, (q31_t)0x9370CAE4, (q31_t)0x43D09AEC,
-	(q31_t)0x933BA968, (q31_t)0x437B42E1, (q31_t)0x9306CB04,
-	(q31_t)0x4325C135, (q31_t)0x92D22FD8, (q31_t)0x42D0161E,
-	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9269C3AC,
-	(q31_t)0x42244480, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
-	(q31_t)0x920265E4, (q31_t)0x4177CFB0, (q31_t)0x91CF1CB6,
-	(q31_t)0x4121589A, (q31_t)0x919C1780, (q31_t)0x40CAB957,
-	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9136D97D,
-	(q31_t)0x401D0320, (q31_t)0x9104A0ED, (q31_t)0x3FC5EC97,
-	(q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8, (q31_t)0x90A0FD4E,
-	(q31_t)0x3F1749B7, (q31_t)0x906F927B, (q31_t)0x3EBFBDCC,
-	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x900D8B69,
-	(q31_t)0x3E10320D, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5,
-	(q31_t)0x8FAC988E, (q31_t)0x3D600D2B, (q31_t)0x8F7C8701,
-	(q31_t)0x3D07C1D5, (q31_t)0x8F4CBADB, (q31_t)0x3CAF50DA,
-	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EEDF33B,
-	(q31_t)0x3BFDFECD, (q31_t)0x8EBEF7FB, (q31_t)0x3BA51E29,
-	(q31_t)0x8E904298, (q31_t)0x3B4C18BA, (q31_t)0x8E61D32D,
-	(q31_t)0x3AF2EEB7, (q31_t)0x8E33A9D9, (q31_t)0x3A99A057,
-	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DD829E4,
-	(q31_t)0x39E6975D, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32,
-	(q31_t)0x8D7DC399, (q31_t)0x3932FF87, (q31_t)0x8D50FA59,
-	(q31_t)0x38D8FE93, (q31_t)0x8D2477D8, (q31_t)0x387EDA8E,
-	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CCC477D,
-	(q31_t)0x37CA2A30, (q31_t)0x8CA099D9, (q31_t)0x376F9E46,
-	(q31_t)0x8C753361, (q31_t)0x3714F02A, (q31_t)0x8C4A142F,
-	(q31_t)0x36BA2013, (q31_t)0x8C1F3C5C, (q31_t)0x365F2E3B,
-	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BCA6342,
-	(q31_t)0x35A8E624, (q31_t)0x8BA0622F, (q31_t)0x354D9056,
-	(q31_t)0x8B76A8E4, (q31_t)0x34F219A7, (q31_t)0x8B4D377C,
-	(q31_t)0x3496824F, (q31_t)0x8B240E10, (q31_t)0x343ACA87,
-	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AD29393,
-	(q31_t)0x3382FA88, (q31_t)0x8AAA42B4, (q31_t)0x3326E2C2,
-	(q31_t)0x8A823A35, (q31_t)0x32CAAB6F, (q31_t)0x8A5A7A30,
-	(q31_t)0x326E54C7, (q31_t)0x8A3302BD, (q31_t)0x3211DF03,
-	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89E4EDEE,
-	(q31_t)0x3158970D, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
-	(q31_t)0x8997FC89, (q31_t)0x309ED555, (q31_t)0x8971F15A,
-	(q31_t)0x3041C760, (q31_t)0x894C2F4C, (q31_t)0x2FE49BA6,
-	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x890186F1,
-	(q31_t)0x2F29EBCC, (q31_t)0x88DCA0D3, (q31_t)0x2ECC681E,
-	(q31_t)0x88B80431, (q31_t)0x2E6EC792, (q31_t)0x8893B124,
-	(q31_t)0x2E110A62, (q31_t)0x886FA7C2, (q31_t)0x2DB330C7,
-	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x88287255,
-	(q31_t)0x2CF72939, (q31_t)0x88054677, (q31_t)0x2C98FBBA,
-	(q31_t)0x87E2649B, (q31_t)0x2C3AB2B9, (q31_t)0x87BFCCD7,
-	(q31_t)0x2BDC4E6F, (q31_t)0x879D7F40, (q31_t)0x2B7DCF17,
-	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8759C2EF,
-	(q31_t)0x2AC08025, (q31_t)0x8738545E, (q31_t)0x2A61B101,
-	(q31_t)0x8717304E, (q31_t)0x2A02C7B8, (q31_t)0x86F656D3,
-	(q31_t)0x29A3C484, (q31_t)0x86D5C802, (q31_t)0x2944A7A2,
-	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x86958AAB,
-	(q31_t)0x288621B9, (q31_t)0x8675DC4E, (q31_t)0x2826B928,
-	(q31_t)0x865678EA, (q31_t)0x27C737D2, (q31_t)0x86376092,
-	(q31_t)0x27679DF4, (q31_t)0x86189359, (q31_t)0x2707EBC6,
-	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85DBDA91,
-	(q31_t)0x26483F6C, (q31_t)0x85BDEF27, (q31_t)0x25E845B5,
-	(q31_t)0x85A04F28, (q31_t)0x2588349D, (q31_t)0x8582FAA4,
-	(q31_t)0x25280C5D, (q31_t)0x8565F1B0, (q31_t)0x24C7CD32,
-	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x852CC2BA,
-	(q31_t)0x24070B07, (q31_t)0x85109CDC, (q31_t)0x23A6887E,
-	(q31_t)0x84F4C2D3, (q31_t)0x2345EFF7, (q31_t)0x84D934B0,
-	(q31_t)0x22E541AE, (q31_t)0x84BDF285, (q31_t)0x22847DDF,
-	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x84885257,
-	(q31_t)0x21C2B69C, (q31_t)0x846DF476, (q31_t)0x2161B39F,
-	(q31_t)0x8453E2CE, (q31_t)0x21009C0B, (q31_t)0x843A1D70,
-	(q31_t)0x209F701C, (q31_t)0x8420A46B, (q31_t)0x203E300D,
-	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83EE97AC,
-	(q31_t)0x1F7B7480, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
-	(q31_t)0x83BDBD0D, (q31_t)0x1EB86B46, (q31_t)0x83A5C2B0,
-	(q31_t)0x1E56CA1E, (q31_t)0x838E1507, (q31_t)0x1DF5163F,
-	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x835FA00E,
-	(q31_t)0x1D31774D, (q31_t)0x8348D8DB, (q31_t)0x1CCF8CB3,
-	(q31_t)0x83325E97, (q31_t)0x1C6D9053, (q31_t)0x831C314E,
-	(q31_t)0x1C0B826A, (q31_t)0x8306510F, (q31_t)0x1BA96334,
-	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82DB77E5,
-	(q31_t)0x1AE4F1D6, (q31_t)0x82C67F13, (q31_t)0x1A82A025,
-	(q31_t)0x82B1D381, (q31_t)0x1A203E1B, (q31_t)0x829D753A,
-	(q31_t)0x19BDCBF2, (q31_t)0x8289644A, (q31_t)0x195B49E9,
-	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82622AA5,
-	(q31_t)0x18961727, (q31_t)0x824F0208, (q31_t)0x183366E8,
-	(q31_t)0x823C26F2, (q31_t)0x17D0A7BB, (q31_t)0x82299971,
-	(q31_t)0x176DD9DE, (q31_t)0x8217598F, (q31_t)0x170AFD8D,
-	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81F3C2D7,
-	(q31_t)0x16451A83, (q31_t)0x81E26C16, (q31_t)0x15E21444,
-	(q31_t)0x81D16320, (q31_t)0x157F0086, (q31_t)0x81C0A801,
-	(q31_t)0x151BDF85, (q31_t)0x81B03AC1, (q31_t)0x14B8B17F,
-	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x81904A0C,
-	(q31_t)0x13F22F57, (q31_t)0x8180C6A9, (q31_t)0x138EDBB0,
-	(q31_t)0x8171914E, (q31_t)0x132B7BF9, (q31_t)0x8162AA03,
-	(q31_t)0x12C8106E, (q31_t)0x815410D3, (q31_t)0x1264994E,
-	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x8137C8E6,
-	(q31_t)0x119D8940, (q31_t)0x812A1A39, (q31_t)0x1139F0CE,
-	(q31_t)0x811CB9CA, (q31_t)0x10D64DBC, (q31_t)0x810FA7A0,
-	(q31_t)0x1072A047, (q31_t)0x8102E3C3, (q31_t)0x100EE8AD,
-	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80EA4712,
-	(q31_t)0x0F475BFE, (q31_t)0x80DE6E4C, (q31_t)0x0EE38765,
-	(q31_t)0x80D2E3F1, (q31_t)0x0E7FA99D, (q31_t)0x80C7A80A,
-	(q31_t)0x0E1BC2E3, (q31_t)0x80BCBA9C, (q31_t)0x0DB7D376,
-	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80A7CB49,
-	(q31_t)0x0CEFDB75, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
-	(q31_t)0x8094162B, (q31_t)0x0C27C389, (q31_t)0x808AB180,
-	(q31_t)0x0BC3AC35, (q31_t)0x80819B74, (q31_t)0x0B5F8D9F,
-	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80705B50,
-	(q31_t)0x0A973BA5, (q31_t)0x80683143, (q31_t)0x0A3308BC,
-	(q31_t)0x806055EA, (q31_t)0x09CECF89, (q31_t)0x8058C94C,
-	(q31_t)0x096A9049, (q31_t)0x80518B6B, (q31_t)0x09064B3A,
-	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x8043FBF6,
-	(q31_t)0x083DB0A7, (q31_t)0x803DAA69, (q31_t)0x07D95B9E,
-	(q31_t)0x8037A7AC, (q31_t)0x077501BE, (q31_t)0x8031F3C1,
-	(q31_t)0x0710A344, (q31_t)0x802C8EAD, (q31_t)0x06AC406F,
-	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8022B113,
-	(q31_t)0x05E36EA9, (q31_t)0x801E3894, (q31_t)0x057F0034,
-	(q31_t)0x801A0EF7, (q31_t)0x051A8E5C, (q31_t)0x80163440,
-	(q31_t)0x04B6195D, (q31_t)0x8012A86F, (q31_t)0x0451A176,
-	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800C7D8C,
-	(q31_t)0x0388A9E9, (q31_t)0x8009DE7D, (q31_t)0x03242ABF,
-	(q31_t)0x80078E5E, (q31_t)0x02BFA9A4, (q31_t)0x80058D2E,
-	(q31_t)0x025B26D7, (q31_t)0x8003DAF0, (q31_t)0x01F6A296,
-	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001634D,
-	(q31_t)0x012D96B0, (q31_t)0x80009DE9, (q31_t)0x00C90F88,
-	(q31_t)0x8000277A, (q31_t)0x006487E3, (q31_t)0x80000000,
-	(q31_t)0x00000000, (q31_t)0x8000277A, (q31_t)0xFF9B781D,
-	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8001634D,
-	(q31_t)0xFED2694F, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0,
-	(q31_t)0x8003DAF0, (q31_t)0xFE095D69, (q31_t)0x80058D2E,
-	(q31_t)0xFDA4D928, (q31_t)0x80078E5E, (q31_t)0xFD40565B,
-	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800C7D8C,
-	(q31_t)0xFC775616, (q31_t)0x800F6B88, (q31_t)0xFC12D919,
-	(q31_t)0x8012A86F, (q31_t)0xFBAE5E89, (q31_t)0x80163440,
-	(q31_t)0xFB49E6A2, (q31_t)0x801A0EF7, (q31_t)0xFAE571A4,
-	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x8022B113,
-	(q31_t)0xFA1C9156, (q31_t)0x80277872, (q31_t)0xF9B82683,
-	(q31_t)0x802C8EAD, (q31_t)0xF953BF90, (q31_t)0x8031F3C1,
-	(q31_t)0xF8EF5CBB, (q31_t)0x8037A7AC, (q31_t)0xF88AFE41,
-	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8043FBF6,
-	(q31_t)0xF7C24F58, (q31_t)0x804A9C4D, (q31_t)0xF75DFF65,
-	(q31_t)0x80518B6B, (q31_t)0xF6F9B4C5, (q31_t)0x8058C94C,
-	(q31_t)0xF6956FB6, (q31_t)0x806055EA, (q31_t)0xF6313076,
-	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x80705B50,
-	(q31_t)0xF568C45A, (q31_t)0x8078D40D, (q31_t)0xF50497FA,
-	(q31_t)0x80819B74, (q31_t)0xF4A07260, (q31_t)0x808AB180,
-	(q31_t)0xF43C53CA, (q31_t)0x8094162B, (q31_t)0xF3D83C76,
-	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A7CB49,
-	(q31_t)0xF310248A, (q31_t)0x80B21BAF, (q31_t)0xF2AC246D,
-	(q31_t)0x80BCBA9C, (q31_t)0xF2482C89, (q31_t)0x80C7A80A,
-	(q31_t)0xF1E43D1C, (q31_t)0x80D2E3F1, (q31_t)0xF1805662,
-	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80EA4712,
-	(q31_t)0xF0B8A401, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4,
-	(q31_t)0x8102E3C3, (q31_t)0xEFF11752, (q31_t)0x810FA7A0,
-	(q31_t)0xEF8D5FB8, (q31_t)0x811CB9CA, (q31_t)0xEF29B243,
-	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8137C8E6,
-	(q31_t)0xEE6276BF, (q31_t)0x8145C5C6, (q31_t)0xEDFEE92B,
-	(q31_t)0x815410D3, (q31_t)0xED9B66B2, (q31_t)0x8162AA03,
-	(q31_t)0xED37EF91, (q31_t)0x8171914E, (q31_t)0xECD48406,
-	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81904A0C,
-	(q31_t)0xEC0DD0A8, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E,
-	(q31_t)0x81B03AC1, (q31_t)0xEB474E80, (q31_t)0x81C0A801,
-	(q31_t)0xEAE4207A, (q31_t)0x81D16320, (q31_t)0xEA80FF79,
-	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81F3C2D7,
-	(q31_t)0xE9BAE57C, (q31_t)0x82056758, (q31_t)0xE957ECFB,
-	(q31_t)0x8217598F, (q31_t)0xE8F50273, (q31_t)0x82299971,
-	(q31_t)0xE8922621, (q31_t)0x823C26F2, (q31_t)0xE82F5844,
-	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82622AA5,
-	(q31_t)0xE769E8D8, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
-	(q31_t)0x8289644A, (q31_t)0xE6A4B616, (q31_t)0x829D753A,
-	(q31_t)0xE642340D, (q31_t)0x82B1D381, (q31_t)0xE5DFC1E4,
-	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82DB77E5,
-	(q31_t)0xE51B0E2A, (q31_t)0x82F0BDE8, (q31_t)0xE4B8CD10,
-	(q31_t)0x8306510F, (q31_t)0xE4569CCB, (q31_t)0x831C314E,
-	(q31_t)0xE3F47D95, (q31_t)0x83325E97, (q31_t)0xE3926FAC,
-	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835FA00E,
-	(q31_t)0xE2CE88B2, (q31_t)0x8376B422, (q31_t)0xE26CB01A,
-	(q31_t)0x838E1507, (q31_t)0xE20AE9C1, (q31_t)0x83A5C2B0,
-	(q31_t)0xE1A935E1, (q31_t)0x83BDBD0D, (q31_t)0xE14794B9,
-	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83EE97AC,
-	(q31_t)0xE0848B7F, (q31_t)0x840777CF, (q31_t)0xE02323E5,
-	(q31_t)0x8420A46B, (q31_t)0xDFC1CFF2, (q31_t)0x843A1D70,
-	(q31_t)0xDF608FE3, (q31_t)0x8453E2CE, (q31_t)0xDEFF63F4,
-	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x84885257,
-	(q31_t)0xDE3D4963, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A,
-	(q31_t)0x84BDF285, (q31_t)0xDD7B8220, (q31_t)0x84D934B0,
-	(q31_t)0xDD1ABE51, (q31_t)0x84F4C2D3, (q31_t)0xDCBA1008,
-	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x852CC2BA,
-	(q31_t)0xDBF8F4F8, (q31_t)0x8549345C, (q31_t)0xDB9888A8,
-	(q31_t)0x8565F1B0, (q31_t)0xDB3832CD, (q31_t)0x8582FAA4,
-	(q31_t)0xDAD7F3A2, (q31_t)0x85A04F28, (q31_t)0xDA77CB62,
-	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85DBDA91,
-	(q31_t)0xD9B7C093, (q31_t)0x85FA1152, (q31_t)0xD957DE7A,
-	(q31_t)0x86189359, (q31_t)0xD8F81439, (q31_t)0x86376092,
-	(q31_t)0xD898620C, (q31_t)0x865678EA, (q31_t)0xD838C82D,
-	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86958AAB,
-	(q31_t)0xD779DE46, (q31_t)0x86B583EE, (q31_t)0xD71A8EB5,
-	(q31_t)0x86D5C802, (q31_t)0xD6BB585D, (q31_t)0x86F656D3,
-	(q31_t)0xD65C3B7B, (q31_t)0x8717304E, (q31_t)0xD5FD3847,
-	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x8759C2EF,
-	(q31_t)0xD53F7FDA, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
-	(q31_t)0x879D7F40, (q31_t)0xD48230E8, (q31_t)0x87BFCCD7,
-	(q31_t)0xD423B190, (q31_t)0x87E2649B, (q31_t)0xD3C54D46,
-	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x88287255,
-	(q31_t)0xD308D6C6, (q31_t)0x884BE820, (q31_t)0xD2AAC504,
-	(q31_t)0x886FA7C2, (q31_t)0xD24CCF38, (q31_t)0x8893B124,
-	(q31_t)0xD1EEF59E, (q31_t)0x88B80431, (q31_t)0xD191386D,
-	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x890186F1,
-	(q31_t)0xD0D61433, (q31_t)0x8926B677, (q31_t)0xD078AD9D,
-	(q31_t)0x894C2F4C, (q31_t)0xD01B6459, (q31_t)0x8971F15A,
-	(q31_t)0xCFBE389F, (q31_t)0x8997FC89, (q31_t)0xCF612AAA,
-	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89E4EDEE,
-	(q31_t)0xCEA768F2, (q31_t)0x8A0BD3F5, (q31_t)0xCE4AB5A2,
-	(q31_t)0x8A3302BD, (q31_t)0xCDEE20FC, (q31_t)0x8A5A7A30,
-	(q31_t)0xCD91AB38, (q31_t)0x8A823A35, (q31_t)0xCD355490,
-	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8AD29393,
-	(q31_t)0xCC7D0577, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78,
-	(q31_t)0x8B240E10, (q31_t)0xCBC53578, (q31_t)0x8B4D377C,
-	(q31_t)0xCB697DB0, (q31_t)0x8B76A8E4, (q31_t)0xCB0DE658,
-	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BCA6342,
-	(q31_t)0xCA5719DB, (q31_t)0x8BF4AC05, (q31_t)0xC9FBE527,
-	(q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4, (q31_t)0x8C4A142F,
-	(q31_t)0xC945DFEC, (q31_t)0x8C753361, (q31_t)0xC8EB0FD6,
-	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CCC477D,
-	(q31_t)0xC835D5D0, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50,
-	(q31_t)0x8D2477D8, (q31_t)0xC7812571, (q31_t)0x8D50FA59,
-	(q31_t)0xC727016C, (q31_t)0x8D7DC399, (q31_t)0xC6CD0079,
-	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DD829E4,
-	(q31_t)0xC61968A2, (q31_t)0x8E05C6B7, (q31_t)0xC5BFD22E,
-	(q31_t)0x8E33A9D9, (q31_t)0xC5665FA8, (q31_t)0x8E61D32D,
-	(q31_t)0xC50D1148, (q31_t)0x8E904298, (q31_t)0xC4B3E746,
-	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8EEDF33B,
-	(q31_t)0xC4020132, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
-	(q31_t)0x8F4CBADB, (q31_t)0xC350AF25, (q31_t)0x8F7C8701,
-	(q31_t)0xC2F83E2A, (q31_t)0x8FAC988E, (q31_t)0xC29FF2D4,
-	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x900D8B69,
-	(q31_t)0xC1EFCDF2, (q31_t)0x903E6C7A, (q31_t)0xC197F4D3,
-	(q31_t)0x906F927B, (q31_t)0xC1404233, (q31_t)0x90A0FD4E,
-	(q31_t)0xC0E8B648, (q31_t)0x90D2ACD3, (q31_t)0xC0915147,
-	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x9136D97D,
-	(q31_t)0xBFE2FCDF, (q31_t)0x91695663, (q31_t)0xBF8C0DE2,
-	(q31_t)0x919C1780, (q31_t)0xBF3546A8, (q31_t)0x91CF1CB6,
-	(q31_t)0xBEDEA765, (q31_t)0x920265E4, (q31_t)0xBE88304F,
-	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9269C3AC,
-	(q31_t)0xBDDBBB7F, (q31_t)0x929DD805, (q31_t)0xBD85BE2F,
-	(q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1, (q31_t)0x9306CB04,
-	(q31_t)0xBCDA3ECA, (q31_t)0x933BA968, (q31_t)0xBC84BD1E,
-	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x93A62F56,
-	(q31_t)0xBBDA36DC, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF,
-	(q31_t)0x9411C09D, (q31_t)0xBB3058C0, (q31_t)0x9447ED2F,
-	(q31_t)0xBADBA943, (q31_t)0x947E5C32, (q31_t)0xBA87246C,
-	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94EC010B,
-	(q31_t)0xB9DE9B83, (q31_t)0x9523369B, (q31_t)0xB98A97D8,
-	(q31_t)0x955AAE17, (q31_t)0xB936BFA3, (q31_t)0x9592675B,
-	(q31_t)0xB8E31319, (q31_t)0x95CA6246, (q31_t)0xB88F926C,
-	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x963B1C85,
-	(q31_t)0xB7E9157A, (q31_t)0x9673DB94, (q31_t)0xB796199B,
-	(q31_t)0x96ACDBBD, (q31_t)0xB7434A67, (q31_t)0x96E61CDF,
-	(q31_t)0xB6F0A811, (q31_t)0x971F9ED6, (q31_t)0xB69E32CD,
-	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x979364B5,
-	(q31_t)0xB5F9D042, (q31_t)0x97CDA855, (q31_t)0xB5A7E362,
-	(q31_t)0x98082C3B, (q31_t)0xB556245E, (q31_t)0x9842F043,
-	(q31_t)0xB5049368, (q31_t)0x987DF449, (q31_t)0xB4B330B2,
-	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98F4BBBC,
-	(q31_t)0xB410F6D2, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
-	(q31_t)0x996C816F, (q31_t)0xB36F784E, (q31_t)0x99A8C344,
-	(q31_t)0xB31EFFCB, (q31_t)0x99E5443A, (q31_t)0xB2CEB6B5,
-	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A5F02F5,
-	(q31_t)0xB22EB392, (q31_t)0x9A9C406D, (q31_t)0xB1DEF9E8,
-	(q31_t)0x9AD9BC71, (q31_t)0xB18F7070, (q31_t)0x9B1776D9,
-	(q31_t)0xB140175B, (q31_t)0x9B556F80, (q31_t)0xB0F0EEDA,
-	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BD21AF2,
-	(q31_t)0xB0533055, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2,
-	(q31_t)0x9C4FBD92, (q31_t)0xAFB63667, (q31_t)0x9C8EEB33,
-	(q31_t)0xAF6803A1, (q31_t)0x9CCE562B, (q31_t)0xAF1A0293,
-	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D4DE384,
-	(q31_t)0xAE7E965B, (q31_t)0x9D8E0596, (q31_t)0xAE312B91,
-	(q31_t)0x9DCE6462, (q31_t)0xADE3F33E, (q31_t)0x9E0EFFC1,
-	(q31_t)0xAD96ED91, (q31_t)0x9E4FD789, (q31_t)0xAD4A1ABA,
-	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9ED23BB9,
-	(q31_t)0xACB10E4A, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510,
-	(q31_t)0x9F558FB0, (q31_t)0xAC18CF68, (q31_t)0x9F979331,
-	(q31_t)0xABCCFD82, (q31_t)0x9FD9D22A, (q31_t)0xAB815F8C,
-	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA05F01E1,
-	(q31_t)0xAAEAC02B, (q31_t)0xA0A1F24C, (q31_t)0xAA9FBF1D,
-	(q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9, (q31_t)0xA1288376,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA16C23E1, (q31_t)0xA9BFF8A8,
-	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1F41391,
-	(q31_t)0xA92BD366, (q31_t)0xA2386283, (q31_t)0xA8E21106,
-	(q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA2C1ADC9,
-	(q31_t)0xA84F2DA9, (q31_t)0xA306A9C7, (q31_t)0xA8060D08,
-	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3914DA7,
-	(q31_t)0xA7746EC0, (q31_t)0xA3D6F533, (q31_t)0xA72BF173,
-	(q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA462EEAC,
-	(q31_t)0xA69B9B68, (q31_t)0xA4A94042, (q31_t)0xA653C302,
-	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA5368C4B,
-	(q31_t)0xA5C4B855, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
-	(q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA60C21ED,
-	(q31_t)0xA4EFCA31, (q31_t)0xA653C302, (q31_t)0xA4A94042,
-	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6E3AAF2,
-	(q31_t)0xA41CD598, (q31_t)0xA72BF173, (q31_t)0xA3D6F533,
-	(q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA7BD22AB,
-	(q31_t)0xA34BDF20, (q31_t)0xA8060D08, (q31_t)0xA306A9C7,
-	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8988463,
-	(q31_t)0xA27CEB4F, (q31_t)0xA8E21106, (q31_t)0xA2386283,
-	(q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA975CB56,
-	(q31_t)0xA1AFFEA2, (q31_t)0xA9BFF8A8, (q31_t)0xA16C23E1,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA54F2B9,
-	(q31_t)0xA0E51D8C, (q31_t)0xAA9FBF1D, (q31_t)0xA0A1F24C,
-	(q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB35F5B5,
-	(q31_t)0xA01C4C72, (q31_t)0xAB815F8C, (q31_t)0x9FD9D22A,
-	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC18CF68,
-	(q31_t)0x9F558FB0, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0,
-	(q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACFD7AE8,
-	(q31_t)0x9E90EB94, (q31_t)0xAD4A1ABA, (q31_t)0x9E4FD789,
-	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADE3F33E,
-	(q31_t)0x9DCE6462, (q31_t)0xAE312B91, (q31_t)0x9D8E0596,
-	(q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAECC336B,
-	(q31_t)0x9D0DFE53, (q31_t)0xAF1A0293, (q31_t)0x9CCE562B,
-	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAFB63667,
-	(q31_t)0x9C4FBD92, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70,
-	(q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB0A1F71C,
-	(q31_t)0x9B93A640, (q31_t)0xB0F0EEDA, (q31_t)0x9B556F80,
-	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB18F7070,
-	(q31_t)0x9AD9BC71, (q31_t)0xB1DEF9E8, (q31_t)0x9A9C406D,
-	(q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB27E9D3B,
-	(q31_t)0x9A22042C, (q31_t)0xB2CEB6B5, (q31_t)0x99E5443A,
-	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB36F784E,
-	(q31_t)0x996C816F, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
-	(q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB461FC70,
-	(q31_t)0x98B93828, (q31_t)0xB4B330B2, (q31_t)0x987DF449,
-	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB556245E,
-	(q31_t)0x98082C3B, (q31_t)0xB5A7E362, (q31_t)0x97CDA855,
-	(q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB64BEACC,
-	(q31_t)0x9759617E, (q31_t)0xB69E32CD, (q31_t)0x971F9ED6,
-	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB7434A67,
-	(q31_t)0x96ACDBBD, (q31_t)0xB796199B, (q31_t)0x9673DB94,
-	(q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB83C3DD1,
-	(q31_t)0x96029EB5, (q31_t)0xB88F926C, (q31_t)0x95CA6246,
-	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB936BFA3,
-	(q31_t)0x955AAE17, (q31_t)0xB98A97D8, (q31_t)0x9523369B,
-	(q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA32CA70,
-	(q31_t)0x94B50D87, (q31_t)0xBA87246C, (q31_t)0x947E5C32,
-	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB3058C0,
-	(q31_t)0x9411C09D, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F,
-	(q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC2F6513,
-	(q31_t)0x9370CAE4, (q31_t)0xBC84BD1E, (q31_t)0x933BA968,
-	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD2FE9E1,
-	(q31_t)0x92D22FD8, (q31_t)0xBD85BE2F, (q31_t)0x929DD805,
-	(q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE31E19B,
-	(q31_t)0x9235F2EB, (q31_t)0xBE88304F, (q31_t)0x920265E4,
-	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF3546A8,
-	(q31_t)0x919C1780, (q31_t)0xBF8C0DE2, (q31_t)0x91695663,
-	(q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC03A1368,
-	(q31_t)0x9104A0ED, (q31_t)0xC0915147, (q31_t)0x90D2ACD3,
-	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1404233,
-	(q31_t)0x906F927B, (q31_t)0xC197F4D3, (q31_t)0x903E6C7A,
-	(q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC247CD5A,
-	(q31_t)0x8FDCEF66, (q31_t)0xC29FF2D4, (q31_t)0x8FAC988E,
-	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC350AF25,
-	(q31_t)0x8F4CBADB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
-	(q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC45AE1D7,
-	(q31_t)0x8EBEF7FB, (q31_t)0xC4B3E746, (q31_t)0x8E904298,
-	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5665FA8,
-	(q31_t)0x8E33A9D9, (q31_t)0xC5BFD22E, (q31_t)0x8E05C6B7,
-	(q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC67322CD,
-	(q31_t)0x8DAAD37B, (q31_t)0xC6CD0079, (q31_t)0x8D7DC399,
-	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7812571,
-	(q31_t)0x8D2477D8, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30,
-	(q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC89061BA,
-	(q31_t)0x8CA099D9, (q31_t)0xC8EB0FD6, (q31_t)0x8C753361,
-	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9A0D1C4,
-	(q31_t)0x8C1F3C5C, (q31_t)0xC9FBE527, (q31_t)0x8BF4AC05,
-	(q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCAB26FA9,
-	(q31_t)0x8BA0622F, (q31_t)0xCB0DE658, (q31_t)0x8B76A8E4,
-	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCBC53578,
-	(q31_t)0x8B240E10, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA,
-	(q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCD91D3D,
-	(q31_t)0x8AAA42B4, (q31_t)0xCD355490, (q31_t)0x8A823A35,
-	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDEE20FC,
-	(q31_t)0x8A3302BD, (q31_t)0xCE4AB5A2, (q31_t)0x8A0BD3F5,
-	(q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCF043AB2,
-	(q31_t)0x89BE50C3, (q31_t)0xCF612AAA, (q31_t)0x8997FC89,
-	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD01B6459,
-	(q31_t)0x894C2F4C, (q31_t)0xD078AD9D, (q31_t)0x8926B677,
-	(q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD13397E1,
-	(q31_t)0x88DCA0D3, (q31_t)0xD191386D, (q31_t)0x88B80431,
-	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD24CCF38,
-	(q31_t)0x886FA7C2, (q31_t)0xD2AAC504, (q31_t)0x884BE820,
-	(q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD3670445,
-	(q31_t)0x88054677, (q31_t)0xD3C54D46, (q31_t)0x87E2649B,
-	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD48230E8,
-	(q31_t)0x879D7F40, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
-	(q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD59E4EFE,
-	(q31_t)0x8738545E, (q31_t)0xD5FD3847, (q31_t)0x8717304E,
-	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD6BB585D,
-	(q31_t)0x86D5C802, (q31_t)0xD71A8EB5, (q31_t)0x86B583EE,
-	(q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7D946D7,
-	(q31_t)0x8675DC4E, (q31_t)0xD838C82D, (q31_t)0x865678EA,
-	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8F81439,
-	(q31_t)0x86189359, (q31_t)0xD957DE7A, (q31_t)0x85FA1152,
-	(q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xDA17BA4A,
-	(q31_t)0x85BDEF27, (q31_t)0xDA77CB62, (q31_t)0x85A04F28,
-	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB3832CD,
-	(q31_t)0x8565F1B0, (q31_t)0xDB9888A8, (q31_t)0x8549345C,
-	(q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC597781,
-	(q31_t)0x85109CDC, (q31_t)0xDCBA1008, (q31_t)0x84F4C2D3,
-	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD7B8220,
-	(q31_t)0x84BDF285, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62,
-	(q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE9E4C60,
-	(q31_t)0x846DF476, (q31_t)0xDEFF63F4, (q31_t)0x8453E2CE,
-	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDFC1CFF2,
-	(q31_t)0x8420A46B, (q31_t)0xE02323E5, (q31_t)0x840777CF,
-	(q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0E60684,
-	(q31_t)0x83D60411, (q31_t)0xE14794B9, (q31_t)0x83BDBD0D,
-	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE20AE9C1,
-	(q31_t)0x838E1507, (q31_t)0xE26CB01A, (q31_t)0x8376B422,
-	(q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE330734C,
-	(q31_t)0x8348D8DB, (q31_t)0xE3926FAC, (q31_t)0x83325E97,
-	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4569CCB,
-	(q31_t)0x8306510F, (q31_t)0xE4B8CD10, (q31_t)0x82F0BDE8,
-	(q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE57D5FDA,
-	(q31_t)0x82C67F13, (q31_t)0xE5DFC1E4, (q31_t)0x82B1D381,
-	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6A4B616,
-	(q31_t)0x8289644A, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
-	(q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE7CC9917,
-	(q31_t)0x824F0208, (q31_t)0xE82F5844, (q31_t)0x823C26F2,
-	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8F50273,
-	(q31_t)0x8217598F, (q31_t)0xE957ECFB, (q31_t)0x82056758,
-	(q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xEA1DEBBB,
-	(q31_t)0x81E26C16, (q31_t)0xEA80FF79, (q31_t)0x81D16320,
-	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB474E80,
-	(q31_t)0x81B03AC1, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C,
-	(q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC71244F,
-	(q31_t)0x8180C6A9, (q31_t)0xECD48406, (q31_t)0x8171914E,
-	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED9B66B2,
-	(q31_t)0x815410D3, (q31_t)0xEDFEE92B, (q31_t)0x8145C5C6,
-	(q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEEC60F31,
-	(q31_t)0x812A1A39, (q31_t)0xEF29B243, (q31_t)0x811CB9CA,
-	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFF11752,
-	(q31_t)0x8102E3C3, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C,
-	(q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF11C789A,
-	(q31_t)0x80DE6E4C, (q31_t)0xF1805662, (q31_t)0x80D2E3F1,
-	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2482C89,
-	(q31_t)0x80BCBA9C, (q31_t)0xF2AC246D, (q31_t)0x80B21BAF,
-	(q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF3742CA1,
-	(q31_t)0x809DC970, (q31_t)0xF3D83C76, (q31_t)0x8094162B,
-	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF4A07260,
-	(q31_t)0x80819B74, (q31_t)0xF50497FA, (q31_t)0x8078D40D,
-	(q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF5CCF743,
-	(q31_t)0x80683143, (q31_t)0xF6313076, (q31_t)0x806055EA,
-	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6F9B4C5,
-	(q31_t)0x80518B6B, (q31_t)0xF75DFF65, (q31_t)0x804A9C4D,
-	(q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF826A461,
-	(q31_t)0x803DAA69, (q31_t)0xF88AFE41, (q31_t)0x8037A7AC,
-	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF953BF90,
-	(q31_t)0x802C8EAD, (q31_t)0xF9B82683, (q31_t)0x80277872,
-	(q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA80FFCB,
-	(q31_t)0x801E3894, (q31_t)0xFAE571A4, (q31_t)0x801A0EF7,
-	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFBAE5E89,
-	(q31_t)0x8012A86F, (q31_t)0xFC12D919, (q31_t)0x800F6B88,
-	(q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCDBD541,
-	(q31_t)0x8009DE7D, (q31_t)0xFD40565B, (q31_t)0x80078E5E,
-	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE095D69,
-	(q31_t)0x8003DAF0, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5,
-	(q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF36F078,
-	(q31_t)0x80009DE9, (q31_t)0xFF9B781D, (q31_t)0x8000277A
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
-/**
-  @par
-  Example code for Q31 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 4096, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to Q31(Fixed point 1.31):
- 	round(twiddleCoefQ31(i) * pow(2, 31))
- */
-const q31_t twiddleCoef_4096_q31[6144] =
-{
-	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFF621,
-	(q31_t)0x003243F5, (q31_t)0x7FFFD885, (q31_t)0x006487E3,
-	(q31_t)0x7FFFA72C, (q31_t)0x0096CBC1, (q31_t)0x7FFF6216,
-	(q31_t)0x00C90F88, (q31_t)0x7FFF0942, (q31_t)0x00FB532F,
-	(q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFE1C64,
-	(q31_t)0x015FDA03, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
-	(q31_t)0x7FFCE093, (q31_t)0x01C45FFE, (q31_t)0x7FFC250F,
-	(q31_t)0x01F6A296, (q31_t)0x7FFB55CE, (q31_t)0x0228E4E1,
-	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF97C17,
-	(q31_t)0x028D6870, (q31_t)0x7FF871A1, (q31_t)0x02BFA9A4,
-	(q31_t)0x7FF7536F, (q31_t)0x02F1EA6B, (q31_t)0x7FF62182,
-	(q31_t)0x03242ABF, (q31_t)0x7FF4DBD8, (q31_t)0x03566A96,
-	(q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF21553,
-	(q31_t)0x03BAE8B1, (q31_t)0x7FF09477, (q31_t)0x03ED26E6,
-	(q31_t)0x7FEEFFE1, (q31_t)0x041F647F, (q31_t)0x7FED5790,
-	(q31_t)0x0451A176, (q31_t)0x7FEB9B85, (q31_t)0x0483DDC3,
-	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE7E840,
-	(q31_t)0x04E8543D, (q31_t)0x7FE5F108, (q31_t)0x051A8E5C,
-	(q31_t)0x7FE3E616, (q31_t)0x054CC7B0, (q31_t)0x7FE1C76B,
-	(q31_t)0x057F0034, (q31_t)0x7FDF9508, (q31_t)0x05B137DF,
-	(q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FDAF518,
-	(q31_t)0x0615A48A, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
-	(q31_t)0x7FD6064B, (q31_t)0x067A0D75, (q31_t)0x7FD37152,
-	(q31_t)0x06AC406F, (q31_t)0x7FD0C8A3, (q31_t)0x06DE7261,
-	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FCB3C23,
-	(q31_t)0x0742D310, (q31_t)0x7FC85853, (q31_t)0x077501BE,
-	(q31_t)0x7FC560CF, (q31_t)0x07A72F45, (q31_t)0x7FC25596,
-	(q31_t)0x07D95B9E, (q31_t)0x7FBF36A9, (q31_t)0x080B86C1,
-	(q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB8BDB7,
-	(q31_t)0x086FD947, (q31_t)0x7FB563B2, (q31_t)0x08A2009A,
-	(q31_t)0x7FB1F5FC, (q31_t)0x08D42698, (q31_t)0x7FAE7494,
-	(q31_t)0x09064B3A, (q31_t)0x7FAADF7C, (q31_t)0x09386E77,
-	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7FA37A3C,
-	(q31_t)0x099CB0A7, (q31_t)0x7F9FAA15, (q31_t)0x09CECF89,
-	(q31_t)0x7F9BC63F, (q31_t)0x0A00ECE8, (q31_t)0x7F97CEBC,
-	(q31_t)0x0A3308BC, (q31_t)0x7F93C38C, (q31_t)0x0A6522FE,
-	(q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F8B7226,
-	(q31_t)0x0AC952AA, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805,
-	(q31_t)0x7F82D214, (q31_t)0x0B2D7BAE, (q31_t)0x7F7E648B,
-	(q31_t)0x0B5F8D9F, (q31_t)0x7F79E35A, (q31_t)0x0B919DCE,
-	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F70A5FD,
-	(q31_t)0x0BF5B8CB, (q31_t)0x7F6BE9D4, (q31_t)0x0C27C389,
-	(q31_t)0x7F671A04, (q31_t)0x0C59CC67, (q31_t)0x7F62368F,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F5D3F75, (q31_t)0x0CBDD865,
-	(q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F531654,
-	(q31_t)0x0D21DC87, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92,
-	(q31_t)0x7F489EAA, (q31_t)0x0D85D88F, (q31_t)0x7F434563,
-	(q31_t)0x0DB7D376, (q31_t)0x7F3DD87C, (q31_t)0x0DE9CC3F,
-	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F32C3D0,
-	(q31_t)0x0E4DB75B, (q31_t)0x7F2D1C0E, (q31_t)0x0E7FA99D,
-	(q31_t)0x7F2760AF, (q31_t)0x0EB199A3, (q31_t)0x7F2191B4,
-	(q31_t)0x0EE38765, (q31_t)0x7F1BAF1E, (q31_t)0x0F1572DC,
-	(q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0FAF24,
-	(q31_t)0x0F7942C6, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
-	(q31_t)0x7F0360CB, (q31_t)0x0FDD0925, (q31_t)0x7EFD1C3C,
-	(q31_t)0x100EE8AD, (q31_t)0x7EF6C418, (q31_t)0x1040C5BB,
-	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE9D913,
-	(q31_t)0x10A4784A, (q31_t)0x7EE34635, (q31_t)0x10D64DBC,
-	(q31_t)0x7EDC9FC6, (q31_t)0x11082096, (q31_t)0x7ED5E5C6,
-	(q31_t)0x1139F0CE, (q31_t)0x7ECF1837, (q31_t)0x116BBE5F,
-	(q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EC1426F,
-	(q31_t)0x11CF516A, (q31_t)0x7EBA3A39, (q31_t)0x120116D4,
-	(q31_t)0x7EB31E77, (q31_t)0x1232D978, (q31_t)0x7EABEF2C,
-	(q31_t)0x1264994E, (q31_t)0x7EA4AC58, (q31_t)0x1296564D,
-	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E95EC19,
-	(q31_t)0x12F9C7AA, (q31_t)0x7E8E6EB1, (q31_t)0x132B7BF9,
-	(q31_t)0x7E86DDC5, (q31_t)0x135D2D53, (q31_t)0x7E7F3956,
-	(q31_t)0x138EDBB0, (q31_t)0x7E778165, (q31_t)0x13C0870A,
-	(q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E67D702,
-	(q31_t)0x1423D492, (q31_t)0x7E5FE493, (q31_t)0x145576B1,
-	(q31_t)0x7E57DEA6, (q31_t)0x148715AD, (q31_t)0x7E4FC53E,
-	(q31_t)0x14B8B17F, (q31_t)0x7E47985B, (q31_t)0x14EA4A1F,
-	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E37042A,
-	(q31_t)0x154D71AA, (q31_t)0x7E2E9CDF, (q31_t)0x157F0086,
-	(q31_t)0x7E26221E, (q31_t)0x15B08C11, (q31_t)0x7E1D93E9,
-	(q31_t)0x15E21444, (q31_t)0x7E14F242, (q31_t)0x16139917,
-	(q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7E03749F,
-	(q31_t)0x1676987F, (q31_t)0x7DFA98A7, (q31_t)0x16A81305,
-	(q31_t)0x7DF1A942, (q31_t)0x16D98A0C, (q31_t)0x7DE8A670,
-	(q31_t)0x170AFD8D, (q31_t)0x7DDF9034, (q31_t)0x173C6D80,
-	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DCD2981,
-	(q31_t)0x179F429F, (q31_t)0x7DC3D90D, (q31_t)0x17D0A7BB,
-	(q31_t)0x7DBA7534, (q31_t)0x1802092C, (q31_t)0x7DB0FDF7,
-	(q31_t)0x183366E8, (q31_t)0x7DA77359, (q31_t)0x1864C0E9,
-	(q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D9423FB,
-	(q31_t)0x18C7699B, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
-	(q31_t)0x7D808727, (q31_t)0x192A0303, (q31_t)0x7D769BB5,
-	(q31_t)0x195B49E9, (q31_t)0x7D6C9CE9, (q31_t)0x198C8CE6,
-	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D58654C,
-	(q31_t)0x19EF0706, (q31_t)0x7D4E2C7E, (q31_t)0x1A203E1B,
-	(q31_t)0x7D43E05E, (q31_t)0x1A517127, (q31_t)0x7D3980EC,
-	(q31_t)0x1A82A025, (q31_t)0x7D2F0E2A, (q31_t)0x1AB3CB0C,
-	(q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D19EEBE,
-	(q31_t)0x1B161479, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF,
-	(q31_t)0x7D048228, (q31_t)0x1B784D30, (q31_t)0x7CF9AEF0,
-	(q31_t)0x1BA96334, (q31_t)0x7CEEC873, (q31_t)0x1BDA74F5,
-	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CD8C1AD,
-	(q31_t)0x1C3C8B8C, (q31_t)0x7CCDA168, (q31_t)0x1C6D9053,
-	(q31_t)0x7CC26DE5, (q31_t)0x1C9E90B8, (q31_t)0x7CB72724,
-	(q31_t)0x1CCF8CB3, (q31_t)0x7CABCD27, (q31_t)0x1D00843C,
-	(q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C94DF82,
-	(q31_t)0x1D6265DD, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5,
-	(q31_t)0x7C7DA504, (q31_t)0x1DC4355D, (q31_t)0x7C71EAF8,
-	(q31_t)0x1DF5163F, (q31_t)0x7C661DBB, (q31_t)0x1E25F281,
-	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4E49B6,
-	(q31_t)0x1E879D0C, (q31_t)0x7C4242F2, (q31_t)0x1EB86B46,
-	(q31_t)0x7C362904, (q31_t)0x1EE934C2, (q31_t)0x7C29FBEE,
-	(q31_t)0x1F19F97B, (q31_t)0x7C1DBBB2, (q31_t)0x1F4AB967,
-	(q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7C0501D1,
-	(q31_t)0x1FAC2ABF, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A,
-	(q31_t)0x7BEBFB70, (q31_t)0x200D888C, (q31_t)0x7BDF5B94,
-	(q31_t)0x203E300D, (q31_t)0x7BD2A89E, (q31_t)0x206ED295,
-	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BB9096A,
-	(q31_t)0x20D0089B, (q31_t)0x7BAC1D31, (q31_t)0x21009C0B,
-	(q31_t)0x7B9F1DE5, (q31_t)0x21312A65, (q31_t)0x7B920B89,
-	(q31_t)0x2161B39F, (q31_t)0x7B84E61E, (q31_t)0x219237B4,
-	(q31_t)0x7B77ADA8, (q31_t)0x21C2B69C, (q31_t)0x7B6A6227,
-	(q31_t)0x21F3304E, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
-	(q31_t)0x7B4F920E, (q31_t)0x225413F8, (q31_t)0x7B420D7A,
-	(q31_t)0x22847DDF, (q31_t)0x7B3475E4, (q31_t)0x22B4E274,
-	(q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B190DBB,
-	(q31_t)0x23159B87, (q31_t)0x7B0B3D2C, (q31_t)0x2345EFF7,
-	(q31_t)0x7AFD59A3, (q31_t)0x23763EF7, (q31_t)0x7AEF6323,
-	(q31_t)0x23A6887E, (q31_t)0x7AE159AE, (q31_t)0x23D6CC86,
-	(q31_t)0x7AD33D45, (q31_t)0x24070B07, (q31_t)0x7AC50DEB,
-	(q31_t)0x243743FA, (q31_t)0x7AB6CBA3, (q31_t)0x24677757,
-	(q31_t)0x7AA8766E, (q31_t)0x2497A517, (q31_t)0x7A9A0E4F,
-	(q31_t)0x24C7CD32, (q31_t)0x7A8B9348, (q31_t)0x24F7EFA1,
-	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A6E648A,
-	(q31_t)0x2558235E, (q31_t)0x7A5FB0D8, (q31_t)0x2588349D,
-	(q31_t)0x7A50EA46, (q31_t)0x25B84012, (q31_t)0x7A4210D8,
-	(q31_t)0x25E845B5, (q31_t)0x7A33248F, (q31_t)0x26184581,
-	(q31_t)0x7A24256E, (q31_t)0x26483F6C, (q31_t)0x7A151377,
-	(q31_t)0x26783370, (q31_t)0x7A05EEAD, (q31_t)0x26A82185,
-	(q31_t)0x79F6B711, (q31_t)0x26D809A5, (q31_t)0x79E76CA6,
-	(q31_t)0x2707EBC6, (q31_t)0x79D80F6F, (q31_t)0x2737C7E3,
-	(q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79B91CA4,
-	(q31_t)0x27976DF1, (q31_t)0x79A98715, (q31_t)0x27C737D2,
-	(q31_t)0x7999DEC3, (q31_t)0x27F6FB92, (q31_t)0x798A23B1,
-	(q31_t)0x2826B928, (q31_t)0x797A55E0, (q31_t)0x2856708C,
-	(q31_t)0x796A7554, (q31_t)0x288621B9, (q31_t)0x795A820E,
-	(q31_t)0x28B5CCA5, (q31_t)0x794A7C11, (q31_t)0x28E5714A,
-	(q31_t)0x793A6360, (q31_t)0x29150FA1, (q31_t)0x792A37FE,
-	(q31_t)0x2944A7A2, (q31_t)0x7919F9EB, (q31_t)0x29743945,
-	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78F945C3,
-	(q31_t)0x29D34958, (q31_t)0x78E8CFB1, (q31_t)0x2A02C7B8,
-	(q31_t)0x78D846FB, (q31_t)0x2A323F9D, (q31_t)0x78C7ABA1,
-	(q31_t)0x2A61B101, (q31_t)0x78B6FDA8, (q31_t)0x2A911BDB,
-	(q31_t)0x78A63D10, (q31_t)0x2AC08025, (q31_t)0x789569DE,
-	(q31_t)0x2AEFDDD8, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
-	(q31_t)0x78738BB3, (q31_t)0x2B4E8558, (q31_t)0x786280BF,
-	(q31_t)0x2B7DCF17, (q31_t)0x7851633B, (q31_t)0x2BAD1221,
-	(q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x782EF08B,
-	(q31_t)0x2C0B83F9, (q31_t)0x781D9B64, (q31_t)0x2C3AB2B9,
-	(q31_t)0x780C33B8, (q31_t)0x2C69DAA6, (q31_t)0x77FAB988,
-	(q31_t)0x2C98FBBA, (q31_t)0x77E92CD8, (q31_t)0x2CC815ED,
-	(q31_t)0x77D78DAA, (q31_t)0x2CF72939, (q31_t)0x77C5DC01,
-	(q31_t)0x2D263595, (q31_t)0x77B417DF, (q31_t)0x2D553AFB,
-	(q31_t)0x77A24148, (q31_t)0x2D843963, (q31_t)0x7790583D,
-	(q31_t)0x2DB330C7, (q31_t)0x777E5CC3, (q31_t)0x2DE2211E,
-	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x775A2E88,
-	(q31_t)0x2E3FEC8B, (q31_t)0x7747FBCE, (q31_t)0x2E6EC792,
-	(q31_t)0x7735B6AE, (q31_t)0x2E9D9B70, (q31_t)0x77235F2D,
-	(q31_t)0x2ECC681E, (q31_t)0x7710F54B, (q31_t)0x2EFB2D94,
-	(q31_t)0x76FE790E, (q31_t)0x2F29EBCC, (q31_t)0x76EBEA77,
-	(q31_t)0x2F58A2BD, (q31_t)0x76D94988, (q31_t)0x2F875262,
-	(q31_t)0x76C69646, (q31_t)0x2FB5FAB2, (q31_t)0x76B3D0B3,
-	(q31_t)0x2FE49BA6, (q31_t)0x76A0F8D2, (q31_t)0x30133538,
-	(q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x767B1230,
-	(q31_t)0x30705217, (q31_t)0x76680376, (q31_t)0x309ED555,
-	(q31_t)0x7654E279, (q31_t)0x30CD5114, (q31_t)0x7641AF3C,
-	(q31_t)0x30FBC54D, (q31_t)0x762E69C3, (q31_t)0x312A31F8,
-	(q31_t)0x761B1211, (q31_t)0x3158970D, (q31_t)0x7607A827,
-	(q31_t)0x3186F487, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D,
-	(q31_t)0x75E09DBD, (q31_t)0x31E39889, (q31_t)0x75CCFD42,
-	(q31_t)0x3211DF03, (q31_t)0x75B94A9C, (q31_t)0x32401DC5,
-	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7591AEDD,
-	(q31_t)0x329C8402, (q31_t)0x757DC5CA, (q31_t)0x32CAAB6F,
-	(q31_t)0x7569CA98, (q31_t)0x32F8CB07, (q31_t)0x7555BD4B,
-	(q31_t)0x3326E2C2, (q31_t)0x75419DE6, (q31_t)0x3354F29A,
-	(q31_t)0x752D6C6C, (q31_t)0x3382FA88, (q31_t)0x751928E0,
-	(q31_t)0x33B0FA84, (q31_t)0x7504D345, (q31_t)0x33DEF287,
-	(q31_t)0x74F06B9E, (q31_t)0x340CE28A, (q31_t)0x74DBF1EF,
-	(q31_t)0x343ACA87, (q31_t)0x74C7663A, (q31_t)0x3468AA76,
-	(q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x749E18CD,
-	(q31_t)0x34C4520D, (q31_t)0x7489571B, (q31_t)0x34F219A7,
-	(q31_t)0x74748371, (q31_t)0x351FD917, (q31_t)0x745F9DD1,
-	(q31_t)0x354D9056, (q31_t)0x744AA63E, (q31_t)0x357B3F5D,
-	(q31_t)0x74359CBD, (q31_t)0x35A8E624, (q31_t)0x74208150,
-	(q31_t)0x35D684A5, (q31_t)0x740B53FA, (q31_t)0x36041AD9,
-	(q31_t)0x73F614C0, (q31_t)0x3631A8B7, (q31_t)0x73E0C3A3,
-	(q31_t)0x365F2E3B, (q31_t)0x73CB60A7, (q31_t)0x368CAB5C,
-	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x73A06522,
-	(q31_t)0x36E78C5A, (q31_t)0x738ACC9E, (q31_t)0x3714F02A,
-	(q31_t)0x73752249, (q31_t)0x37424B7A, (q31_t)0x735F6626,
-	(q31_t)0x376F9E46, (q31_t)0x73499838, (q31_t)0x379CE884,
-	(q31_t)0x7333B883, (q31_t)0x37CA2A30, (q31_t)0x731DC709,
-	(q31_t)0x37F76340, (q31_t)0x7307C3D0, (q31_t)0x382493B0,
-	(q31_t)0x72F1AED8, (q31_t)0x3851BB76, (q31_t)0x72DB8828,
-	(q31_t)0x387EDA8E, (q31_t)0x72C54FC0, (q31_t)0x38ABF0EF,
-	(q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x7298A9DC,
-	(q31_t)0x39060372, (q31_t)0x72823C66, (q31_t)0x3932FF87,
-	(q31_t)0x726BBD48, (q31_t)0x395FF2C9, (q31_t)0x72552C84,
-	(q31_t)0x398CDD32, (q31_t)0x723E8A1F, (q31_t)0x39B9BEBB,
-	(q31_t)0x7227D61C, (q31_t)0x39E6975D, (q31_t)0x7211107D,
-	(q31_t)0x3A136712, (q31_t)0x71FA3948, (q31_t)0x3A402DD1,
-	(q31_t)0x71E3507F, (q31_t)0x3A6CEB95, (q31_t)0x71CC5626,
-	(q31_t)0x3A99A057, (q31_t)0x71B54A40, (q31_t)0x3AC64C0F,
-	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x7186FDDE,
-	(q31_t)0x3B1F8847, (q31_t)0x716FBD68, (q31_t)0x3B4C18BA,
-	(q31_t)0x71586B73, (q31_t)0x3B78A007, (q31_t)0x71410804,
-	(q31_t)0x3BA51E29, (q31_t)0x7129931E, (q31_t)0x3BD19317,
-	(q31_t)0x71120CC5, (q31_t)0x3BFDFECD, (q31_t)0x70FA74FB,
-	(q31_t)0x3C2A6142, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
-	(q31_t)0x70CB1127, (q31_t)0x3C830A4F, (q31_t)0x70B34524,
-	(q31_t)0x3CAF50DA, (q31_t)0x709B67C0, (q31_t)0x3CDB8E09,
-	(q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x706B78E3,
-	(q31_t)0x3D33EC39, (q31_t)0x70536771, (q31_t)0x3D600D2B,
-	(q31_t)0x703B44AC, (q31_t)0x3D8C24A7, (q31_t)0x70231099,
-	(q31_t)0x3DB832A5, (q31_t)0x700ACB3B, (q31_t)0x3DE4371F,
-	(q31_t)0x6FF27496, (q31_t)0x3E10320D, (q31_t)0x6FDA0CAD,
-	(q31_t)0x3E3C2369, (q31_t)0x6FC19385, (q31_t)0x3E680B2C,
-	(q31_t)0x6FA90920, (q31_t)0x3E93E94F, (q31_t)0x6F906D84,
-	(q31_t)0x3EBFBDCC, (q31_t)0x6F77C0B3, (q31_t)0x3EEB889C,
-	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6F463383,
-	(q31_t)0x3F430118, (q31_t)0x6F2D532C, (q31_t)0x3F6EAEB8,
-	(q31_t)0x6F1461AF, (q31_t)0x3F9A528F, (q31_t)0x6EFB5F12,
-	(q31_t)0x3FC5EC97, (q31_t)0x6EE24B57, (q31_t)0x3FF17CCA,
-	(q31_t)0x6EC92682, (q31_t)0x401D0320, (q31_t)0x6EAFF098,
-	(q31_t)0x40487F93, (q31_t)0x6E96A99C, (q31_t)0x4073F21D,
-	(q31_t)0x6E7D5193, (q31_t)0x409F5AB6, (q31_t)0x6E63E87F,
-	(q31_t)0x40CAB957, (q31_t)0x6E4A6E65, (q31_t)0x40F60DFB,
-	(q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6E17472F,
-	(q31_t)0x414C992E, (q31_t)0x6DFD9A1B, (q31_t)0x4177CFB0,
-	(q31_t)0x6DE3DC11, (q31_t)0x41A2FC1A, (q31_t)0x6DCA0D14,
-	(q31_t)0x41CE1E64, (q31_t)0x6DB02D29, (q31_t)0x41F93688,
-	(q31_t)0x6D963C54, (q31_t)0x42244480, (q31_t)0x6D7C3A98,
-	(q31_t)0x424F4845, (q31_t)0x6D6227FA, (q31_t)0x427A41D0,
-	(q31_t)0x6D48047E, (q31_t)0x42A5311A, (q31_t)0x6D2DD027,
-	(q31_t)0x42D0161E, (q31_t)0x6D138AFA, (q31_t)0x42FAF0D4,
-	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6CDECE2E,
-	(q31_t)0x4350873C, (q31_t)0x6CC45697, (q31_t)0x437B42E1,
-	(q31_t)0x6CA9CE3A, (q31_t)0x43A5F41E, (q31_t)0x6C8F351C,
-	(q31_t)0x43D09AEC, (q31_t)0x6C748B3F, (q31_t)0x43FB3745,
-	(q31_t)0x6C59D0A9, (q31_t)0x4425C923, (q31_t)0x6C3F055D,
-	(q31_t)0x4450507E, (q31_t)0x6C242960, (q31_t)0x447ACD50,
-	(q31_t)0x6C093CB6, (q31_t)0x44A53F93, (q31_t)0x6BEE3F62,
-	(q31_t)0x44CFA73F, (q31_t)0x6BD3316A, (q31_t)0x44FA044F,
-	(q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B9CE39B,
-	(q31_t)0x454E9E80, (q31_t)0x6B81A3CD, (q31_t)0x4578DB93,
-	(q31_t)0x6B66536A, (q31_t)0x45A30DF0, (q31_t)0x6B4AF278,
-	(q31_t)0x45CD358F, (q31_t)0x6B2F80FA, (q31_t)0x45F7526B,
-	(q31_t)0x6B13FEF5, (q31_t)0x4621647C, (q31_t)0x6AF86C6C,
-	(q31_t)0x464B6BBD, (q31_t)0x6ADCC964, (q31_t)0x46756827,
-	(q31_t)0x6AC115E1, (q31_t)0x469F59B4, (q31_t)0x6AA551E8,
-	(q31_t)0x46C9405C, (q31_t)0x6A897D7D, (q31_t)0x46F31C1A,
-	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x6A51A361,
-	(q31_t)0x4746B2BC, (q31_t)0x6A359DB9, (q31_t)0x47706D93,
-	(q31_t)0x6A1987B0, (q31_t)0x479A1D66, (q31_t)0x69FD614A,
-	(q31_t)0x47C3C22E, (q31_t)0x69E12A8C, (q31_t)0x47ED5BE6,
-	(q31_t)0x69C4E37A, (q31_t)0x4816EA85, (q31_t)0x69A88C18,
-	(q31_t)0x48406E07, (q31_t)0x698C246C, (q31_t)0x4869E664,
-	(q31_t)0x696FAC78, (q31_t)0x48935397, (q31_t)0x69532442,
-	(q31_t)0x48BCB598, (q31_t)0x69368BCE, (q31_t)0x48E60C62,
-	(q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68FD2A3D,
-	(q31_t)0x49389836, (q31_t)0x68E06129, (q31_t)0x4961CD32,
-	(q31_t)0x68C387E9, (q31_t)0x498AF6DE, (q31_t)0x68A69E81,
-	(q31_t)0x49B41533, (q31_t)0x6889A4F5, (q31_t)0x49DD282A,
-	(q31_t)0x686C9B4B, (q31_t)0x4A062FBD, (q31_t)0x684F8186,
-	(q31_t)0x4A2F2BE5, (q31_t)0x683257AA, (q31_t)0x4A581C9D,
-	(q31_t)0x68151DBE, (q31_t)0x4A8101DE, (q31_t)0x67F7D3C4,
-	(q31_t)0x4AA9DBA1, (q31_t)0x67DA79C2, (q31_t)0x4AD2A9E1,
-	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x679F95B7,
-	(q31_t)0x4B2423BD, (q31_t)0x67820BB6, (q31_t)0x4B4CCF4D,
-	(q31_t)0x676471C0, (q31_t)0x4B756F3F, (q31_t)0x6746C7D7,
-	(q31_t)0x4B9E038F, (q31_t)0x67290E02, (q31_t)0x4BC68C36,
-	(q31_t)0x670B4443, (q31_t)0x4BEF092D, (q31_t)0x66ED6AA1,
-	(q31_t)0x4C177A6E, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
-	(q31_t)0x66B187C3, (q31_t)0x4C6839B6, (q31_t)0x66937E90,
-	(q31_t)0x4C9087B1, (q31_t)0x6675658C, (q31_t)0x4CB8C9DD,
-	(q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x66390422,
-	(q31_t)0x4D092AB0, (q31_t)0x661ABBC5, (q31_t)0x4D31494B,
-	(q31_t)0x65FC63A9, (q31_t)0x4D595BFE, (q31_t)0x65DDFBD3,
-	(q31_t)0x4D8162C4, (q31_t)0x65BF8447, (q31_t)0x4DA95D96,
-	(q31_t)0x65A0FD0B, (q31_t)0x4DD14C6E, (q31_t)0x65826622,
-	(q31_t)0x4DF92F45, (q31_t)0x6563BF92, (q31_t)0x4E210617,
-	(q31_t)0x6545095F, (q31_t)0x4E48D0DC, (q31_t)0x6526438E,
-	(q31_t)0x4E708F8F, (q31_t)0x65076E24, (q31_t)0x4E984229,
-	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x64C99498,
-	(q31_t)0x4EE782FA, (q31_t)0x64AA907F, (q31_t)0x4F0F1126,
-	(q31_t)0x648B7CDF, (q31_t)0x4F369320, (q31_t)0x646C59BF,
-	(q31_t)0x4F5E08E3, (q31_t)0x644D2722, (q31_t)0x4F857268,
-	(q31_t)0x642DE50D, (q31_t)0x4FACCFAB, (q31_t)0x640E9385,
-	(q31_t)0x4FD420A3, (q31_t)0x63EF328F, (q31_t)0x4FFB654D,
-	(q31_t)0x63CFC230, (q31_t)0x50229DA0, (q31_t)0x63B0426D,
-	(q31_t)0x5049C999, (q31_t)0x6390B34A, (q31_t)0x5070E92F,
-	(q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x635166F8,
-	(q31_t)0x50BF031F, (q31_t)0x6331A9D4, (q31_t)0x50E5FD6C,
-	(q31_t)0x6311DD63, (q31_t)0x510CEB40, (q31_t)0x62F201AC,
-	(q31_t)0x5133CC94, (q31_t)0x62D216B2, (q31_t)0x515AA162,
-	(q31_t)0x62B21C7B, (q31_t)0x518169A4, (q31_t)0x6292130C,
-	(q31_t)0x51A82555, (q31_t)0x6271FA69, (q31_t)0x51CED46E,
-	(q31_t)0x6251D297, (q31_t)0x51F576E9, (q31_t)0x62319B9D,
-	(q31_t)0x521C0CC1, (q31_t)0x6211557D, (q31_t)0x524295EF,
-	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x61D09BE5,
-	(q31_t)0x528F8237, (q31_t)0x61B02876, (q31_t)0x52B5E545,
-	(q31_t)0x618FA5F6, (q31_t)0x52DC3B92, (q31_t)0x616F146B,
-	(q31_t)0x53028517, (q31_t)0x614E73D9, (q31_t)0x5328C1D0,
-	(q31_t)0x612DC446, (q31_t)0x534EF1B5, (q31_t)0x610D05B7,
-	(q31_t)0x537514C1, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
-	(q31_t)0x60CB5BB6, (q31_t)0x53C13438, (q31_t)0x60AA704F,
-	(q31_t)0x53E73097, (q31_t)0x60897600, (q31_t)0x540D2005,
-	(q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x604754BE,
-	(q31_t)0x5458D7F9, (q31_t)0x60262DD5, (q31_t)0x547EA073,
-	(q31_t)0x6004F818, (q31_t)0x54A45BE5, (q31_t)0x5FE3B38D,
-	(q31_t)0x54CA0A4A, (q31_t)0x5FC26038, (q31_t)0x54EFAB9C,
-	(q31_t)0x5FA0FE1E, (q31_t)0x55153FD4, (q31_t)0x5F7F8D46,
-	(q31_t)0x553AC6ED, (q31_t)0x5F5E0DB3, (q31_t)0x556040E2,
-	(q31_t)0x5F3C7F6B, (q31_t)0x5585ADAC, (q31_t)0x5F1AE273,
-	(q31_t)0x55AB0D46, (q31_t)0x5EF936D1, (q31_t)0x55D05FAA,
-	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5EB5B3A1,
-	(q31_t)0x561ADCB8, (q31_t)0x5E93DC1F, (q31_t)0x56400757,
-	(q31_t)0x5E71F606, (q31_t)0x566524AA, (q31_t)0x5E50015D,
-	(q31_t)0x568A34A9, (q31_t)0x5E2DFE28, (q31_t)0x56AF3750,
-	(q31_t)0x5E0BEC6E, (q31_t)0x56D42C99, (q31_t)0x5DE9CC32,
-	(q31_t)0x56F9147E, (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9,
-	(q31_t)0x5DA5604E, (q31_t)0x5742BC05, (q31_t)0x5D8314B0,
-	(q31_t)0x57677B9D, (q31_t)0x5D60BAA6, (q31_t)0x578C2DB9,
-	(q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5D1BDB65,
-	(q31_t)0x57D5696C, (q31_t)0x5CF95638, (q31_t)0x57F9F2F7,
-	(q31_t)0x5CD6C2B4, (q31_t)0x581E6EF1, (q31_t)0x5CB420DF,
-	(q31_t)0x5842DD54, (q31_t)0x5C9170BF, (q31_t)0x58673E1B,
-	(q31_t)0x5C6EB258, (q31_t)0x588B913F, (q31_t)0x5C4BE5B0,
-	(q31_t)0x58AFD6BC, (q31_t)0x5C290ACC, (q31_t)0x58D40E8C,
-	(q31_t)0x5C0621B2, (q31_t)0x58F838A9, (q31_t)0x5BE32A67,
-	(q31_t)0x591C550E, (q31_t)0x5BC024F0, (q31_t)0x594063B4,
-	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B79EF96,
-	(q31_t)0x598857B1, (q31_t)0x5B56BFBD, (q31_t)0x59AC3CFD,
-	(q31_t)0x5B3381CE, (q31_t)0x59D01474, (q31_t)0x5B1035CF,
-	(q31_t)0x59F3DE12, (q31_t)0x5AECDBC4, (q31_t)0x5A1799D0,
-	(q31_t)0x5AC973B4, (q31_t)0x5A3B47AA, (q31_t)0x5AA5FDA4,
-	(q31_t)0x5A5EE79A, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
-	(q31_t)0x5A5EE79A, (q31_t)0x5AA5FDA4, (q31_t)0x5A3B47AA,
-	(q31_t)0x5AC973B4, (q31_t)0x5A1799D0, (q31_t)0x5AECDBC4,
-	(q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59D01474,
-	(q31_t)0x5B3381CE, (q31_t)0x59AC3CFD, (q31_t)0x5B56BFBD,
-	(q31_t)0x598857B1, (q31_t)0x5B79EF96, (q31_t)0x59646497,
-	(q31_t)0x5B9D1153, (q31_t)0x594063B4, (q31_t)0x5BC024F0,
-	(q31_t)0x591C550E, (q31_t)0x5BE32A67, (q31_t)0x58F838A9,
-	(q31_t)0x5C0621B2, (q31_t)0x58D40E8C, (q31_t)0x5C290ACC,
-	(q31_t)0x58AFD6BC, (q31_t)0x5C4BE5B0, (q31_t)0x588B913F,
-	(q31_t)0x5C6EB258, (q31_t)0x58673E1B, (q31_t)0x5C9170BF,
-	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x581E6EF1,
-	(q31_t)0x5CD6C2B4, (q31_t)0x57F9F2F7, (q31_t)0x5CF95638,
-	(q31_t)0x57D5696C, (q31_t)0x5D1BDB65, (q31_t)0x57B0D256,
-	(q31_t)0x5D3E5236, (q31_t)0x578C2DB9, (q31_t)0x5D60BAA6,
-	(q31_t)0x57677B9D, (q31_t)0x5D8314B0, (q31_t)0x5742BC05,
-	(q31_t)0x5DA5604E, (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C,
-	(q31_t)0x56F9147E, (q31_t)0x5DE9CC32, (q31_t)0x56D42C99,
-	(q31_t)0x5E0BEC6E, (q31_t)0x56AF3750, (q31_t)0x5E2DFE28,
-	(q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x566524AA,
-	(q31_t)0x5E71F606, (q31_t)0x56400757, (q31_t)0x5E93DC1F,
-	(q31_t)0x561ADCB8, (q31_t)0x5EB5B3A1, (q31_t)0x55F5A4D2,
-	(q31_t)0x5ED77C89, (q31_t)0x55D05FAA, (q31_t)0x5EF936D1,
-	(q31_t)0x55AB0D46, (q31_t)0x5F1AE273, (q31_t)0x5585ADAC,
-	(q31_t)0x5F3C7F6B, (q31_t)0x556040E2, (q31_t)0x5F5E0DB3,
-	(q31_t)0x553AC6ED, (q31_t)0x5F7F8D46, (q31_t)0x55153FD4,
-	(q31_t)0x5FA0FE1E, (q31_t)0x54EFAB9C, (q31_t)0x5FC26038,
-	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x54A45BE5,
-	(q31_t)0x6004F818, (q31_t)0x547EA073, (q31_t)0x60262DD5,
-	(q31_t)0x5458D7F9, (q31_t)0x604754BE, (q31_t)0x5433027D,
-	(q31_t)0x60686CCE, (q31_t)0x540D2005, (q31_t)0x60897600,
-	(q31_t)0x53E73097, (q31_t)0x60AA704F, (q31_t)0x53C13438,
-	(q31_t)0x60CB5BB6, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
-	(q31_t)0x537514C1, (q31_t)0x610D05B7, (q31_t)0x534EF1B5,
-	(q31_t)0x612DC446, (q31_t)0x5328C1D0, (q31_t)0x614E73D9,
-	(q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x52DC3B92,
-	(q31_t)0x618FA5F6, (q31_t)0x52B5E545, (q31_t)0x61B02876,
-	(q31_t)0x528F8237, (q31_t)0x61D09BE5, (q31_t)0x5269126E,
-	(q31_t)0x61F1003E, (q31_t)0x524295EF, (q31_t)0x6211557D,
-	(q31_t)0x521C0CC1, (q31_t)0x62319B9D, (q31_t)0x51F576E9,
-	(q31_t)0x6251D297, (q31_t)0x51CED46E, (q31_t)0x6271FA69,
-	(q31_t)0x51A82555, (q31_t)0x6292130C, (q31_t)0x518169A4,
-	(q31_t)0x62B21C7B, (q31_t)0x515AA162, (q31_t)0x62D216B2,
-	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x510CEB40,
-	(q31_t)0x6311DD63, (q31_t)0x50E5FD6C, (q31_t)0x6331A9D4,
-	(q31_t)0x50BF031F, (q31_t)0x635166F8, (q31_t)0x5097FC5E,
-	(q31_t)0x637114CC, (q31_t)0x5070E92F, (q31_t)0x6390B34A,
-	(q31_t)0x5049C999, (q31_t)0x63B0426D, (q31_t)0x50229DA0,
-	(q31_t)0x63CFC230, (q31_t)0x4FFB654D, (q31_t)0x63EF328F,
-	(q31_t)0x4FD420A3, (q31_t)0x640E9385, (q31_t)0x4FACCFAB,
-	(q31_t)0x642DE50D, (q31_t)0x4F857268, (q31_t)0x644D2722,
-	(q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4F369320,
-	(q31_t)0x648B7CDF, (q31_t)0x4F0F1126, (q31_t)0x64AA907F,
-	(q31_t)0x4EE782FA, (q31_t)0x64C99498, (q31_t)0x4EBFE8A4,
-	(q31_t)0x64E88926, (q31_t)0x4E984229, (q31_t)0x65076E24,
-	(q31_t)0x4E708F8F, (q31_t)0x6526438E, (q31_t)0x4E48D0DC,
-	(q31_t)0x6545095F, (q31_t)0x4E210617, (q31_t)0x6563BF92,
-	(q31_t)0x4DF92F45, (q31_t)0x65826622, (q31_t)0x4DD14C6E,
-	(q31_t)0x65A0FD0B, (q31_t)0x4DA95D96, (q31_t)0x65BF8447,
-	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4D595BFE,
-	(q31_t)0x65FC63A9, (q31_t)0x4D31494B, (q31_t)0x661ABBC5,
-	(q31_t)0x4D092AB0, (q31_t)0x66390422, (q31_t)0x4CE10034,
-	(q31_t)0x66573CBB, (q31_t)0x4CB8C9DD, (q31_t)0x6675658C,
-	(q31_t)0x4C9087B1, (q31_t)0x66937E90, (q31_t)0x4C6839B6,
-	(q31_t)0x66B187C3, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
-	(q31_t)0x4C177A6E, (q31_t)0x66ED6AA1, (q31_t)0x4BEF092D,
-	(q31_t)0x670B4443, (q31_t)0x4BC68C36, (q31_t)0x67290E02,
-	(q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4B756F3F,
-	(q31_t)0x676471C0, (q31_t)0x4B4CCF4D, (q31_t)0x67820BB6,
-	(q31_t)0x4B2423BD, (q31_t)0x679F95B7, (q31_t)0x4AFB6C97,
-	(q31_t)0x67BD0FBC, (q31_t)0x4AD2A9E1, (q31_t)0x67DA79C2,
-	(q31_t)0x4AA9DBA1, (q31_t)0x67F7D3C4, (q31_t)0x4A8101DE,
-	(q31_t)0x68151DBE, (q31_t)0x4A581C9D, (q31_t)0x683257AA,
-	(q31_t)0x4A2F2BE5, (q31_t)0x684F8186, (q31_t)0x4A062FBD,
-	(q31_t)0x686C9B4B, (q31_t)0x49DD282A, (q31_t)0x6889A4F5,
-	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x498AF6DE,
-	(q31_t)0x68C387E9, (q31_t)0x4961CD32, (q31_t)0x68E06129,
-	(q31_t)0x49389836, (q31_t)0x68FD2A3D, (q31_t)0x490F57EE,
-	(q31_t)0x6919E320, (q31_t)0x48E60C62, (q31_t)0x69368BCE,
-	(q31_t)0x48BCB598, (q31_t)0x69532442, (q31_t)0x48935397,
-	(q31_t)0x696FAC78, (q31_t)0x4869E664, (q31_t)0x698C246C,
-	(q31_t)0x48406E07, (q31_t)0x69A88C18, (q31_t)0x4816EA85,
-	(q31_t)0x69C4E37A, (q31_t)0x47ED5BE6, (q31_t)0x69E12A8C,
-	(q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x479A1D66,
-	(q31_t)0x6A1987B0, (q31_t)0x47706D93, (q31_t)0x6A359DB9,
-	(q31_t)0x4746B2BC, (q31_t)0x6A51A361, (q31_t)0x471CECE6,
-	(q31_t)0x6A6D98A4, (q31_t)0x46F31C1A, (q31_t)0x6A897D7D,
-	(q31_t)0x46C9405C, (q31_t)0x6AA551E8, (q31_t)0x469F59B4,
-	(q31_t)0x6AC115E1, (q31_t)0x46756827, (q31_t)0x6ADCC964,
-	(q31_t)0x464B6BBD, (q31_t)0x6AF86C6C, (q31_t)0x4621647C,
-	(q31_t)0x6B13FEF5, (q31_t)0x45F7526B, (q31_t)0x6B2F80FA,
-	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x45A30DF0,
-	(q31_t)0x6B66536A, (q31_t)0x4578DB93, (q31_t)0x6B81A3CD,
-	(q31_t)0x454E9E80, (q31_t)0x6B9CE39B, (q31_t)0x452456BC,
-	(q31_t)0x6BB812D0, (q31_t)0x44FA044F, (q31_t)0x6BD3316A,
-	(q31_t)0x44CFA73F, (q31_t)0x6BEE3F62, (q31_t)0x44A53F93,
-	(q31_t)0x6C093CB6, (q31_t)0x447ACD50, (q31_t)0x6C242960,
-	(q31_t)0x4450507E, (q31_t)0x6C3F055D, (q31_t)0x4425C923,
-	(q31_t)0x6C59D0A9, (q31_t)0x43FB3745, (q31_t)0x6C748B3F,
-	(q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x43A5F41E,
-	(q31_t)0x6CA9CE3A, (q31_t)0x437B42E1, (q31_t)0x6CC45697,
-	(q31_t)0x4350873C, (q31_t)0x6CDECE2E, (q31_t)0x4325C135,
-	(q31_t)0x6CF934FB, (q31_t)0x42FAF0D4, (q31_t)0x6D138AFA,
-	(q31_t)0x42D0161E, (q31_t)0x6D2DD027, (q31_t)0x42A5311A,
-	(q31_t)0x6D48047E, (q31_t)0x427A41D0, (q31_t)0x6D6227FA,
-	(q31_t)0x424F4845, (q31_t)0x6D7C3A98, (q31_t)0x42244480,
-	(q31_t)0x6D963C54, (q31_t)0x41F93688, (q31_t)0x6DB02D29,
-	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x41A2FC1A,
-	(q31_t)0x6DE3DC11, (q31_t)0x4177CFB0, (q31_t)0x6DFD9A1B,
-	(q31_t)0x414C992E, (q31_t)0x6E17472F, (q31_t)0x4121589A,
-	(q31_t)0x6E30E349, (q31_t)0x40F60DFB, (q31_t)0x6E4A6E65,
-	(q31_t)0x40CAB957, (q31_t)0x6E63E87F, (q31_t)0x409F5AB6,
-	(q31_t)0x6E7D5193, (q31_t)0x4073F21D, (q31_t)0x6E96A99C,
-	(q31_t)0x40487F93, (q31_t)0x6EAFF098, (q31_t)0x401D0320,
-	(q31_t)0x6EC92682, (q31_t)0x3FF17CCA, (q31_t)0x6EE24B57,
-	(q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F9A528F,
-	(q31_t)0x6F1461AF, (q31_t)0x3F6EAEB8, (q31_t)0x6F2D532C,
-	(q31_t)0x3F430118, (q31_t)0x6F463383, (q31_t)0x3F1749B7,
-	(q31_t)0x6F5F02B1, (q31_t)0x3EEB889C, (q31_t)0x6F77C0B3,
-	(q31_t)0x3EBFBDCC, (q31_t)0x6F906D84, (q31_t)0x3E93E94F,
-	(q31_t)0x6FA90920, (q31_t)0x3E680B2C, (q31_t)0x6FC19385,
-	(q31_t)0x3E3C2369, (q31_t)0x6FDA0CAD, (q31_t)0x3E10320D,
-	(q31_t)0x6FF27496, (q31_t)0x3DE4371F, (q31_t)0x700ACB3B,
-	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D8C24A7,
-	(q31_t)0x703B44AC, (q31_t)0x3D600D2B, (q31_t)0x70536771,
-	(q31_t)0x3D33EC39, (q31_t)0x706B78E3, (q31_t)0x3D07C1D5,
-	(q31_t)0x708378FE, (q31_t)0x3CDB8E09, (q31_t)0x709B67C0,
-	(q31_t)0x3CAF50DA, (q31_t)0x70B34524, (q31_t)0x3C830A4F,
-	(q31_t)0x70CB1127, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
-	(q31_t)0x3C2A6142, (q31_t)0x70FA74FB, (q31_t)0x3BFDFECD,
-	(q31_t)0x71120CC5, (q31_t)0x3BD19317, (q31_t)0x7129931E,
-	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3B78A007,
-	(q31_t)0x71586B73, (q31_t)0x3B4C18BA, (q31_t)0x716FBD68,
-	(q31_t)0x3B1F8847, (q31_t)0x7186FDDE, (q31_t)0x3AF2EEB7,
-	(q31_t)0x719E2CD2, (q31_t)0x3AC64C0F, (q31_t)0x71B54A40,
-	(q31_t)0x3A99A057, (q31_t)0x71CC5626, (q31_t)0x3A6CEB95,
-	(q31_t)0x71E3507F, (q31_t)0x3A402DD1, (q31_t)0x71FA3948,
-	(q31_t)0x3A136712, (q31_t)0x7211107D, (q31_t)0x39E6975D,
-	(q31_t)0x7227D61C, (q31_t)0x39B9BEBB, (q31_t)0x723E8A1F,
-	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x395FF2C9,
-	(q31_t)0x726BBD48, (q31_t)0x3932FF87, (q31_t)0x72823C66,
-	(q31_t)0x39060372, (q31_t)0x7298A9DC, (q31_t)0x38D8FE93,
-	(q31_t)0x72AF05A6, (q31_t)0x38ABF0EF, (q31_t)0x72C54FC0,
-	(q31_t)0x387EDA8E, (q31_t)0x72DB8828, (q31_t)0x3851BB76,
-	(q31_t)0x72F1AED8, (q31_t)0x382493B0, (q31_t)0x7307C3D0,
-	(q31_t)0x37F76340, (q31_t)0x731DC709, (q31_t)0x37CA2A30,
-	(q31_t)0x7333B883, (q31_t)0x379CE884, (q31_t)0x73499838,
-	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x37424B7A,
-	(q31_t)0x73752249, (q31_t)0x3714F02A, (q31_t)0x738ACC9E,
-	(q31_t)0x36E78C5A, (q31_t)0x73A06522, (q31_t)0x36BA2013,
-	(q31_t)0x73B5EBD0, (q31_t)0x368CAB5C, (q31_t)0x73CB60A7,
-	(q31_t)0x365F2E3B, (q31_t)0x73E0C3A3, (q31_t)0x3631A8B7,
-	(q31_t)0x73F614C0, (q31_t)0x36041AD9, (q31_t)0x740B53FA,
-	(q31_t)0x35D684A5, (q31_t)0x74208150, (q31_t)0x35A8E624,
-	(q31_t)0x74359CBD, (q31_t)0x357B3F5D, (q31_t)0x744AA63E,
-	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x351FD917,
-	(q31_t)0x74748371, (q31_t)0x34F219A7, (q31_t)0x7489571B,
-	(q31_t)0x34C4520D, (q31_t)0x749E18CD, (q31_t)0x3496824F,
-	(q31_t)0x74B2C883, (q31_t)0x3468AA76, (q31_t)0x74C7663A,
-	(q31_t)0x343ACA87, (q31_t)0x74DBF1EF, (q31_t)0x340CE28A,
-	(q31_t)0x74F06B9E, (q31_t)0x33DEF287, (q31_t)0x7504D345,
-	(q31_t)0x33B0FA84, (q31_t)0x751928E0, (q31_t)0x3382FA88,
-	(q31_t)0x752D6C6C, (q31_t)0x3354F29A, (q31_t)0x75419DE6,
-	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x32F8CB07,
-	(q31_t)0x7569CA98, (q31_t)0x32CAAB6F, (q31_t)0x757DC5CA,
-	(q31_t)0x329C8402, (q31_t)0x7591AEDD, (q31_t)0x326E54C7,
-	(q31_t)0x75A585CF, (q31_t)0x32401DC5, (q31_t)0x75B94A9C,
-	(q31_t)0x3211DF03, (q31_t)0x75CCFD42, (q31_t)0x31E39889,
-	(q31_t)0x75E09DBD, (q31_t)0x31B54A5D, (q31_t)0x75F42C0A,
-	(q31_t)0x3186F487, (q31_t)0x7607A827, (q31_t)0x3158970D,
-	(q31_t)0x761B1211, (q31_t)0x312A31F8, (q31_t)0x762E69C3,
-	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x30CD5114,
-	(q31_t)0x7654E279, (q31_t)0x309ED555, (q31_t)0x76680376,
-	(q31_t)0x30705217, (q31_t)0x767B1230, (q31_t)0x3041C760,
-	(q31_t)0x768E0EA5, (q31_t)0x30133538, (q31_t)0x76A0F8D2,
-	(q31_t)0x2FE49BA6, (q31_t)0x76B3D0B3, (q31_t)0x2FB5FAB2,
-	(q31_t)0x76C69646, (q31_t)0x2F875262, (q31_t)0x76D94988,
-	(q31_t)0x2F58A2BD, (q31_t)0x76EBEA77, (q31_t)0x2F29EBCC,
-	(q31_t)0x76FE790E, (q31_t)0x2EFB2D94, (q31_t)0x7710F54B,
-	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E9D9B70,
-	(q31_t)0x7735B6AE, (q31_t)0x2E6EC792, (q31_t)0x7747FBCE,
-	(q31_t)0x2E3FEC8B, (q31_t)0x775A2E88, (q31_t)0x2E110A62,
-	(q31_t)0x776C4EDB, (q31_t)0x2DE2211E, (q31_t)0x777E5CC3,
-	(q31_t)0x2DB330C7, (q31_t)0x7790583D, (q31_t)0x2D843963,
-	(q31_t)0x77A24148, (q31_t)0x2D553AFB, (q31_t)0x77B417DF,
-	(q31_t)0x2D263595, (q31_t)0x77C5DC01, (q31_t)0x2CF72939,
-	(q31_t)0x77D78DAA, (q31_t)0x2CC815ED, (q31_t)0x77E92CD8,
-	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2C69DAA6,
-	(q31_t)0x780C33B8, (q31_t)0x2C3AB2B9, (q31_t)0x781D9B64,
-	(q31_t)0x2C0B83F9, (q31_t)0x782EF08B, (q31_t)0x2BDC4E6F,
-	(q31_t)0x78403328, (q31_t)0x2BAD1221, (q31_t)0x7851633B,
-	(q31_t)0x2B7DCF17, (q31_t)0x786280BF, (q31_t)0x2B4E8558,
-	(q31_t)0x78738BB3, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
-	(q31_t)0x2AEFDDD8, (q31_t)0x789569DE, (q31_t)0x2AC08025,
-	(q31_t)0x78A63D10, (q31_t)0x2A911BDB, (q31_t)0x78B6FDA8,
-	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x2A323F9D,
-	(q31_t)0x78D846FB, (q31_t)0x2A02C7B8, (q31_t)0x78E8CFB1,
-	(q31_t)0x29D34958, (q31_t)0x78F945C3, (q31_t)0x29A3C484,
-	(q31_t)0x7909A92C, (q31_t)0x29743945, (q31_t)0x7919F9EB,
-	(q31_t)0x2944A7A2, (q31_t)0x792A37FE, (q31_t)0x29150FA1,
-	(q31_t)0x793A6360, (q31_t)0x28E5714A, (q31_t)0x794A7C11,
-	(q31_t)0x28B5CCA5, (q31_t)0x795A820E, (q31_t)0x288621B9,
-	(q31_t)0x796A7554, (q31_t)0x2856708C, (q31_t)0x797A55E0,
-	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27F6FB92,
-	(q31_t)0x7999DEC3, (q31_t)0x27C737D2, (q31_t)0x79A98715,
-	(q31_t)0x27976DF1, (q31_t)0x79B91CA4, (q31_t)0x27679DF4,
-	(q31_t)0x79C89F6D, (q31_t)0x2737C7E3, (q31_t)0x79D80F6F,
-	(q31_t)0x2707EBC6, (q31_t)0x79E76CA6, (q31_t)0x26D809A5,
-	(q31_t)0x79F6B711, (q31_t)0x26A82185, (q31_t)0x7A05EEAD,
-	(q31_t)0x26783370, (q31_t)0x7A151377, (q31_t)0x26483F6C,
-	(q31_t)0x7A24256E, (q31_t)0x26184581, (q31_t)0x7A33248F,
-	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x25B84012,
-	(q31_t)0x7A50EA46, (q31_t)0x2588349D, (q31_t)0x7A5FB0D8,
-	(q31_t)0x2558235E, (q31_t)0x7A6E648A, (q31_t)0x25280C5D,
-	(q31_t)0x7A7D055B, (q31_t)0x24F7EFA1, (q31_t)0x7A8B9348,
-	(q31_t)0x24C7CD32, (q31_t)0x7A9A0E4F, (q31_t)0x2497A517,
-	(q31_t)0x7AA8766E, (q31_t)0x24677757, (q31_t)0x7AB6CBA3,
-	(q31_t)0x243743FA, (q31_t)0x7AC50DEB, (q31_t)0x24070B07,
-	(q31_t)0x7AD33D45, (q31_t)0x23D6CC86, (q31_t)0x7AE159AE,
-	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x23763EF7,
-	(q31_t)0x7AFD59A3, (q31_t)0x2345EFF7, (q31_t)0x7B0B3D2C,
-	(q31_t)0x23159B87, (q31_t)0x7B190DBB, (q31_t)0x22E541AE,
-	(q31_t)0x7B26CB4F, (q31_t)0x22B4E274, (q31_t)0x7B3475E4,
-	(q31_t)0x22847DDF, (q31_t)0x7B420D7A, (q31_t)0x225413F8,
-	(q31_t)0x7B4F920E, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
-	(q31_t)0x21F3304E, (q31_t)0x7B6A6227, (q31_t)0x21C2B69C,
-	(q31_t)0x7B77ADA8, (q31_t)0x219237B4, (q31_t)0x7B84E61E,
-	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x21312A65,
-	(q31_t)0x7B9F1DE5, (q31_t)0x21009C0B, (q31_t)0x7BAC1D31,
-	(q31_t)0x20D0089B, (q31_t)0x7BB9096A, (q31_t)0x209F701C,
-	(q31_t)0x7BC5E28F, (q31_t)0x206ED295, (q31_t)0x7BD2A89E,
-	(q31_t)0x203E300D, (q31_t)0x7BDF5B94, (q31_t)0x200D888C,
-	(q31_t)0x7BEBFB70, (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830,
-	(q31_t)0x1FAC2ABF, (q31_t)0x7C0501D1, (q31_t)0x1F7B7480,
-	(q31_t)0x7C116853, (q31_t)0x1F4AB967, (q31_t)0x7C1DBBB2,
-	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1EE934C2,
-	(q31_t)0x7C362904, (q31_t)0x1EB86B46, (q31_t)0x7C4242F2,
-	(q31_t)0x1E879D0C, (q31_t)0x7C4E49B6, (q31_t)0x1E56CA1E,
-	(q31_t)0x7C5A3D4F, (q31_t)0x1E25F281, (q31_t)0x7C661DBB,
-	(q31_t)0x1DF5163F, (q31_t)0x7C71EAF8, (q31_t)0x1DC4355D,
-	(q31_t)0x7C7DA504, (q31_t)0x1D934FE5, (q31_t)0x7C894BDD,
-	(q31_t)0x1D6265DD, (q31_t)0x7C94DF82, (q31_t)0x1D31774D,
-	(q31_t)0x7CA05FF1, (q31_t)0x1D00843C, (q31_t)0x7CABCD27,
-	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C9E90B8,
-	(q31_t)0x7CC26DE5, (q31_t)0x1C6D9053, (q31_t)0x7CCDA168,
-	(q31_t)0x1C3C8B8C, (q31_t)0x7CD8C1AD, (q31_t)0x1C0B826A,
-	(q31_t)0x7CE3CEB1, (q31_t)0x1BDA74F5, (q31_t)0x7CEEC873,
-	(q31_t)0x1BA96334, (q31_t)0x7CF9AEF0, (q31_t)0x1B784D30,
-	(q31_t)0x7D048228, (q31_t)0x1B4732EF, (q31_t)0x7D0F4218,
-	(q31_t)0x1B161479, (q31_t)0x7D19EEBE, (q31_t)0x1AE4F1D6,
-	(q31_t)0x7D24881A, (q31_t)0x1AB3CB0C, (q31_t)0x7D2F0E2A,
-	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x1A517127,
-	(q31_t)0x7D43E05E, (q31_t)0x1A203E1B, (q31_t)0x7D4E2C7E,
-	(q31_t)0x19EF0706, (q31_t)0x7D58654C, (q31_t)0x19BDCBF2,
-	(q31_t)0x7D628AC5, (q31_t)0x198C8CE6, (q31_t)0x7D6C9CE9,
-	(q31_t)0x195B49E9, (q31_t)0x7D769BB5, (q31_t)0x192A0303,
-	(q31_t)0x7D808727, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
-	(q31_t)0x18C7699B, (q31_t)0x7D9423FB, (q31_t)0x18961727,
-	(q31_t)0x7D9DD55A, (q31_t)0x1864C0E9, (q31_t)0x7DA77359,
-	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x1802092C,
-	(q31_t)0x7DBA7534, (q31_t)0x17D0A7BB, (q31_t)0x7DC3D90D,
-	(q31_t)0x179F429F, (q31_t)0x7DCD2981, (q31_t)0x176DD9DE,
-	(q31_t)0x7DD6668E, (q31_t)0x173C6D80, (q31_t)0x7DDF9034,
-	(q31_t)0x170AFD8D, (q31_t)0x7DE8A670, (q31_t)0x16D98A0C,
-	(q31_t)0x7DF1A942, (q31_t)0x16A81305, (q31_t)0x7DFA98A7,
-	(q31_t)0x1676987F, (q31_t)0x7E03749F, (q31_t)0x16451A83,
-	(q31_t)0x7E0C3D29, (q31_t)0x16139917, (q31_t)0x7E14F242,
-	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x15B08C11,
-	(q31_t)0x7E26221E, (q31_t)0x157F0086, (q31_t)0x7E2E9CDF,
-	(q31_t)0x154D71AA, (q31_t)0x7E37042A, (q31_t)0x151BDF85,
-	(q31_t)0x7E3F57FE, (q31_t)0x14EA4A1F, (q31_t)0x7E47985B,
-	(q31_t)0x14B8B17F, (q31_t)0x7E4FC53E, (q31_t)0x148715AD,
-	(q31_t)0x7E57DEA6, (q31_t)0x145576B1, (q31_t)0x7E5FE493,
-	(q31_t)0x1423D492, (q31_t)0x7E67D702, (q31_t)0x13F22F57,
-	(q31_t)0x7E6FB5F3, (q31_t)0x13C0870A, (q31_t)0x7E778165,
-	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x135D2D53,
-	(q31_t)0x7E86DDC5, (q31_t)0x132B7BF9, (q31_t)0x7E8E6EB1,
-	(q31_t)0x12F9C7AA, (q31_t)0x7E95EC19, (q31_t)0x12C8106E,
-	(q31_t)0x7E9D55FC, (q31_t)0x1296564D, (q31_t)0x7EA4AC58,
-	(q31_t)0x1264994E, (q31_t)0x7EABEF2C, (q31_t)0x1232D978,
-	(q31_t)0x7EB31E77, (q31_t)0x120116D4, (q31_t)0x7EBA3A39,
-	(q31_t)0x11CF516A, (q31_t)0x7EC1426F, (q31_t)0x119D8940,
-	(q31_t)0x7EC8371A, (q31_t)0x116BBE5F, (q31_t)0x7ECF1837,
-	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x11082096,
-	(q31_t)0x7EDC9FC6, (q31_t)0x10D64DBC, (q31_t)0x7EE34635,
-	(q31_t)0x10A4784A, (q31_t)0x7EE9D913, (q31_t)0x1072A047,
-	(q31_t)0x7EF0585F, (q31_t)0x1040C5BB, (q31_t)0x7EF6C418,
-	(q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C, (q31_t)0x0FDD0925,
-	(q31_t)0x7F0360CB, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
-	(q31_t)0x0F7942C6, (q31_t)0x7F0FAF24, (q31_t)0x0F475BFE,
-	(q31_t)0x7F15B8EE, (q31_t)0x0F1572DC, (q31_t)0x7F1BAF1E,
-	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0EB199A3,
-	(q31_t)0x7F2760AF, (q31_t)0x0E7FA99D, (q31_t)0x7F2D1C0E,
-	(q31_t)0x0E4DB75B, (q31_t)0x7F32C3D0, (q31_t)0x0E1BC2E3,
-	(q31_t)0x7F3857F5, (q31_t)0x0DE9CC3F, (q31_t)0x7F3DD87C,
-	(q31_t)0x0DB7D376, (q31_t)0x7F434563, (q31_t)0x0D85D88F,
-	(q31_t)0x7F489EAA, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450,
-	(q31_t)0x0D21DC87, (q31_t)0x7F531654, (q31_t)0x0CEFDB75,
-	(q31_t)0x7F5834B6, (q31_t)0x0CBDD865, (q31_t)0x7F5D3F75,
-	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C59CC67,
-	(q31_t)0x7F671A04, (q31_t)0x0C27C389, (q31_t)0x7F6BE9D4,
-	(q31_t)0x0BF5B8CB, (q31_t)0x7F70A5FD, (q31_t)0x0BC3AC35,
-	(q31_t)0x7F754E7F, (q31_t)0x0B919DCE, (q31_t)0x7F79E35A,
-	(q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B, (q31_t)0x0B2D7BAE,
-	(q31_t)0x7F82D214, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3,
-	(q31_t)0x0AC952AA, (q31_t)0x7F8B7226, (q31_t)0x0A973BA5,
-	(q31_t)0x7F8FA4AF, (q31_t)0x0A6522FE, (q31_t)0x7F93C38C,
-	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x0A00ECE8,
-	(q31_t)0x7F9BC63F, (q31_t)0x09CECF89, (q31_t)0x7F9FAA15,
-	(q31_t)0x099CB0A7, (q31_t)0x7FA37A3C, (q31_t)0x096A9049,
-	(q31_t)0x7FA736B4, (q31_t)0x09386E77, (q31_t)0x7FAADF7C,
-	(q31_t)0x09064B3A, (q31_t)0x7FAE7494, (q31_t)0x08D42698,
-	(q31_t)0x7FB1F5FC, (q31_t)0x08A2009A, (q31_t)0x7FB563B2,
-	(q31_t)0x086FD947, (q31_t)0x7FB8BDB7, (q31_t)0x083DB0A7,
-	(q31_t)0x7FBC040A, (q31_t)0x080B86C1, (q31_t)0x7FBF36A9,
-	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x07A72F45,
-	(q31_t)0x7FC560CF, (q31_t)0x077501BE, (q31_t)0x7FC85853,
-	(q31_t)0x0742D310, (q31_t)0x7FCB3C23, (q31_t)0x0710A344,
-	(q31_t)0x7FCE0C3E, (q31_t)0x06DE7261, (q31_t)0x7FD0C8A3,
-	(q31_t)0x06AC406F, (q31_t)0x7FD37152, (q31_t)0x067A0D75,
-	(q31_t)0x7FD6064B, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
-	(q31_t)0x0615A48A, (q31_t)0x7FDAF518, (q31_t)0x05E36EA9,
-	(q31_t)0x7FDD4EEC, (q31_t)0x05B137DF, (q31_t)0x7FDF9508,
-	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x054CC7B0,
-	(q31_t)0x7FE3E616, (q31_t)0x051A8E5C, (q31_t)0x7FE5F108,
-	(q31_t)0x04E8543D, (q31_t)0x7FE7E840, (q31_t)0x04B6195D,
-	(q31_t)0x7FE9CBC0, (q31_t)0x0483DDC3, (q31_t)0x7FEB9B85,
-	(q31_t)0x0451A176, (q31_t)0x7FED5790, (q31_t)0x041F647F,
-	(q31_t)0x7FEEFFE1, (q31_t)0x03ED26E6, (q31_t)0x7FF09477,
-	(q31_t)0x03BAE8B1, (q31_t)0x7FF21553, (q31_t)0x0388A9E9,
-	(q31_t)0x7FF38273, (q31_t)0x03566A96, (q31_t)0x7FF4DBD8,
-	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02F1EA6B,
-	(q31_t)0x7FF7536F, (q31_t)0x02BFA9A4, (q31_t)0x7FF871A1,
-	(q31_t)0x028D6870, (q31_t)0x7FF97C17, (q31_t)0x025B26D7,
-	(q31_t)0x7FFA72D1, (q31_t)0x0228E4E1, (q31_t)0x7FFB55CE,
-	(q31_t)0x01F6A296, (q31_t)0x7FFC250F, (q31_t)0x01C45FFE,
-	(q31_t)0x7FFCE093, (q31_t)0x01921D1F, (q31_t)0x7FFD885A,
-	(q31_t)0x015FDA03, (q31_t)0x7FFE1C64, (q31_t)0x012D96B0,
-	(q31_t)0x7FFE9CB2, (q31_t)0x00FB532F, (q31_t)0x7FFF0942,
-	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x0096CBC1,
-	(q31_t)0x7FFFA72C, (q31_t)0x006487E3, (q31_t)0x7FFFD885,
-	(q31_t)0x003243F5, (q31_t)0x7FFFF621, (q31_t)0x00000000,
-	(q31_t)0x7FFFFFFF, (q31_t)0xFFCDBC0A, (q31_t)0x7FFFF621,
-	(q31_t)0xFF9B781D, (q31_t)0x7FFFD885, (q31_t)0xFF69343E,
-	(q31_t)0x7FFFA72C, (q31_t)0xFF36F078, (q31_t)0x7FFF6216,
-	(q31_t)0xFF04ACD0, (q31_t)0x7FFF0942, (q31_t)0xFED2694F,
-	(q31_t)0x7FFE9CB2, (q31_t)0xFEA025FC, (q31_t)0x7FFE1C64,
-	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE3BA001,
-	(q31_t)0x7FFCE093, (q31_t)0xFE095D69, (q31_t)0x7FFC250F,
-	(q31_t)0xFDD71B1E, (q31_t)0x7FFB55CE, (q31_t)0xFDA4D928,
-	(q31_t)0x7FFA72D1, (q31_t)0xFD72978F, (q31_t)0x7FF97C17,
-	(q31_t)0xFD40565B, (q31_t)0x7FF871A1, (q31_t)0xFD0E1594,
-	(q31_t)0x7FF7536F, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
-	(q31_t)0xFCA99569, (q31_t)0x7FF4DBD8, (q31_t)0xFC775616,
-	(q31_t)0x7FF38273, (q31_t)0xFC45174E, (q31_t)0x7FF21553,
-	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBE09B80,
-	(q31_t)0x7FEEFFE1, (q31_t)0xFBAE5E89, (q31_t)0x7FED5790,
-	(q31_t)0xFB7C223C, (q31_t)0x7FEB9B85, (q31_t)0xFB49E6A2,
-	(q31_t)0x7FE9CBC0, (q31_t)0xFB17ABC2, (q31_t)0x7FE7E840,
-	(q31_t)0xFAE571A4, (q31_t)0x7FE5F108, (q31_t)0xFAB3384F,
-	(q31_t)0x7FE3E616, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B,
-	(q31_t)0xFA4EC820, (q31_t)0x7FDF9508, (q31_t)0xFA1C9156,
-	(q31_t)0x7FDD4EEC, (q31_t)0xF9EA5B75, (q31_t)0x7FDAF518,
-	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF985F28A,
-	(q31_t)0x7FD6064B, (q31_t)0xF953BF90, (q31_t)0x7FD37152,
-	(q31_t)0xF9218D9E, (q31_t)0x7FD0C8A3, (q31_t)0xF8EF5CBB,
-	(q31_t)0x7FCE0C3E, (q31_t)0xF8BD2CEF, (q31_t)0x7FCB3C23,
-	(q31_t)0xF88AFE41, (q31_t)0x7FC85853, (q31_t)0xF858D0BA,
-	(q31_t)0x7FC560CF, (q31_t)0xF826A461, (q31_t)0x7FC25596,
-	(q31_t)0xF7F4793E, (q31_t)0x7FBF36A9, (q31_t)0xF7C24F58,
-	(q31_t)0x7FBC040A, (q31_t)0xF79026B8, (q31_t)0x7FB8BDB7,
-	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF72BD967,
-	(q31_t)0x7FB1F5FC, (q31_t)0xF6F9B4C5, (q31_t)0x7FAE7494,
-	(q31_t)0xF6C79188, (q31_t)0x7FAADF7C, (q31_t)0xF6956FB6,
-	(q31_t)0x7FA736B4, (q31_t)0xF6634F58, (q31_t)0x7FA37A3C,
-	(q31_t)0xF6313076, (q31_t)0x7F9FAA15, (q31_t)0xF5FF1317,
-	(q31_t)0x7F9BC63F, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC,
-	(q31_t)0xF59ADD01, (q31_t)0x7F93C38C, (q31_t)0xF568C45A,
-	(q31_t)0x7F8FA4AF, (q31_t)0xF536AD55, (q31_t)0x7F8B7226,
-	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4D28451,
-	(q31_t)0x7F82D214, (q31_t)0xF4A07260, (q31_t)0x7F7E648B,
-	(q31_t)0xF46E6231, (q31_t)0x7F79E35A, (q31_t)0xF43C53CA,
-	(q31_t)0x7F754E7F, (q31_t)0xF40A4734, (q31_t)0x7F70A5FD,
-	(q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4, (q31_t)0xF3A63398,
-	(q31_t)0x7F671A04, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
-	(q31_t)0xF342279A, (q31_t)0x7F5D3F75, (q31_t)0xF310248A,
-	(q31_t)0x7F5834B6, (q31_t)0xF2DE2378, (q31_t)0x7F531654,
-	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF27A2770,
-	(q31_t)0x7F489EAA, (q31_t)0xF2482C89, (q31_t)0x7F434563,
-	(q31_t)0xF21633C0, (q31_t)0x7F3DD87C, (q31_t)0xF1E43D1C,
-	(q31_t)0x7F3857F5, (q31_t)0xF1B248A5, (q31_t)0x7F32C3D0,
-	(q31_t)0xF1805662, (q31_t)0x7F2D1C0E, (q31_t)0xF14E665C,
-	(q31_t)0x7F2760AF, (q31_t)0xF11C789A, (q31_t)0x7F2191B4,
-	(q31_t)0xF0EA8D23, (q31_t)0x7F1BAF1E, (q31_t)0xF0B8A401,
-	(q31_t)0x7F15B8EE, (q31_t)0xF086BD39, (q31_t)0x7F0FAF24,
-	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xF022F6DA,
-	(q31_t)0x7F0360CB, (q31_t)0xEFF11752, (q31_t)0x7EFD1C3C,
-	(q31_t)0xEFBF3A44, (q31_t)0x7EF6C418, (q31_t)0xEF8D5FB8,
-	(q31_t)0x7EF0585F, (q31_t)0xEF5B87B5, (q31_t)0x7EE9D913,
-	(q31_t)0xEF29B243, (q31_t)0x7EE34635, (q31_t)0xEEF7DF6A,
-	(q31_t)0x7EDC9FC6, (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6,
-	(q31_t)0xEE9441A0, (q31_t)0x7ECF1837, (q31_t)0xEE6276BF,
-	(q31_t)0x7EC8371A, (q31_t)0xEE30AE95, (q31_t)0x7EC1426F,
-	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xEDCD2687,
-	(q31_t)0x7EB31E77, (q31_t)0xED9B66B2, (q31_t)0x7EABEF2C,
-	(q31_t)0xED69A9B2, (q31_t)0x7EA4AC58, (q31_t)0xED37EF91,
-	(q31_t)0x7E9D55FC, (q31_t)0xED063855, (q31_t)0x7E95EC19,
-	(q31_t)0xECD48406, (q31_t)0x7E8E6EB1, (q31_t)0xECA2D2AC,
-	(q31_t)0x7E86DDC5, (q31_t)0xEC71244F, (q31_t)0x7E7F3956,
-	(q31_t)0xEC3F78F5, (q31_t)0x7E778165, (q31_t)0xEC0DD0A8,
-	(q31_t)0x7E6FB5F3, (q31_t)0xEBDC2B6D, (q31_t)0x7E67D702,
-	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB78EA52,
-	(q31_t)0x7E57DEA6, (q31_t)0xEB474E80, (q31_t)0x7E4FC53E,
-	(q31_t)0xEB15B5E0, (q31_t)0x7E47985B, (q31_t)0xEAE4207A,
-	(q31_t)0x7E3F57FE, (q31_t)0xEAB28E55, (q31_t)0x7E37042A,
-	(q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF, (q31_t)0xEA4F73EE,
-	(q31_t)0x7E26221E, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
-	(q31_t)0xE9EC66E8, (q31_t)0x7E14F242, (q31_t)0xE9BAE57C,
-	(q31_t)0x7E0C3D29, (q31_t)0xE9896780, (q31_t)0x7E03749F,
-	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE92675F4,
-	(q31_t)0x7DF1A942, (q31_t)0xE8F50273, (q31_t)0x7DE8A670,
-	(q31_t)0xE8C3927F, (q31_t)0x7DDF9034, (q31_t)0xE8922621,
-	(q31_t)0x7DD6668E, (q31_t)0xE860BD60, (q31_t)0x7DCD2981,
-	(q31_t)0xE82F5844, (q31_t)0x7DC3D90D, (q31_t)0xE7FDF6D3,
-	(q31_t)0x7DBA7534, (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7,
-	(q31_t)0xE79B3F16, (q31_t)0x7DA77359, (q31_t)0xE769E8D8,
-	(q31_t)0x7D9DD55A, (q31_t)0xE7389664, (q31_t)0x7D9423FB,
-	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6D5FCFC,
-	(q31_t)0x7D808727, (q31_t)0xE6A4B616, (q31_t)0x7D769BB5,
-	(q31_t)0xE6737319, (q31_t)0x7D6C9CE9, (q31_t)0xE642340D,
-	(q31_t)0x7D628AC5, (q31_t)0xE610F8F9, (q31_t)0x7D58654C,
-	(q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E, (q31_t)0xE5AE8ED8,
-	(q31_t)0x7D43E05E, (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC,
-	(q31_t)0xE54C34F3, (q31_t)0x7D2F0E2A, (q31_t)0xE51B0E2A,
-	(q31_t)0x7D24881A, (q31_t)0xE4E9EB86, (q31_t)0x7D19EEBE,
-	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE487B2CF,
-	(q31_t)0x7D048228, (q31_t)0xE4569CCB, (q31_t)0x7CF9AEF0,
-	(q31_t)0xE4258B0A, (q31_t)0x7CEEC873, (q31_t)0xE3F47D95,
-	(q31_t)0x7CE3CEB1, (q31_t)0xE3C37473, (q31_t)0x7CD8C1AD,
-	(q31_t)0xE3926FAC, (q31_t)0x7CCDA168, (q31_t)0xE3616F47,
-	(q31_t)0x7CC26DE5, (q31_t)0xE330734C, (q31_t)0x7CB72724,
-	(q31_t)0xE2FF7BC3, (q31_t)0x7CABCD27, (q31_t)0xE2CE88B2,
-	(q31_t)0x7CA05FF1, (q31_t)0xE29D9A22, (q31_t)0x7C94DF82,
-	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE23BCAA2,
-	(q31_t)0x7C7DA504, (q31_t)0xE20AE9C1, (q31_t)0x7C71EAF8,
-	(q31_t)0xE1DA0D7E, (q31_t)0x7C661DBB, (q31_t)0xE1A935E1,
-	(q31_t)0x7C5A3D4F, (q31_t)0xE17862F3, (q31_t)0x7C4E49B6,
-	(q31_t)0xE14794B9, (q31_t)0x7C4242F2, (q31_t)0xE116CB3D,
-	(q31_t)0x7C362904, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
-	(q31_t)0xE0B54698, (q31_t)0x7C1DBBB2, (q31_t)0xE0848B7F,
-	(q31_t)0x7C116853, (q31_t)0xE053D541, (q31_t)0x7C0501D1,
-	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFF27773,
-	(q31_t)0x7BEBFB70, (q31_t)0xDFC1CFF2, (q31_t)0x7BDF5B94,
-	(q31_t)0xDF912D6A, (q31_t)0x7BD2A89E, (q31_t)0xDF608FE3,
-	(q31_t)0x7BC5E28F, (q31_t)0xDF2FF764, (q31_t)0x7BB9096A,
-	(q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31, (q31_t)0xDECED59B,
-	(q31_t)0x7B9F1DE5, (q31_t)0xDE9E4C60, (q31_t)0x7B920B89,
-	(q31_t)0xDE6DC84B, (q31_t)0x7B84E61E, (q31_t)0xDE3D4963,
-	(q31_t)0x7B77ADA8, (q31_t)0xDE0CCFB1, (q31_t)0x7B6A6227,
-	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDDABEC07,
-	(q31_t)0x7B4F920E, (q31_t)0xDD7B8220, (q31_t)0x7B420D7A,
-	(q31_t)0xDD4B1D8B, (q31_t)0x7B3475E4, (q31_t)0xDD1ABE51,
-	(q31_t)0x7B26CB4F, (q31_t)0xDCEA6478, (q31_t)0x7B190DBB,
-	(q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C, (q31_t)0xDC89C108,
-	(q31_t)0x7AFD59A3, (q31_t)0xDC597781, (q31_t)0x7AEF6323,
-	(q31_t)0xDC293379, (q31_t)0x7AE159AE, (q31_t)0xDBF8F4F8,
-	(q31_t)0x7AD33D45, (q31_t)0xDBC8BC05, (q31_t)0x7AC50DEB,
-	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB685AE8,
-	(q31_t)0x7AA8766E, (q31_t)0xDB3832CD, (q31_t)0x7A9A0E4F,
-	(q31_t)0xDB08105E, (q31_t)0x7A8B9348, (q31_t)0xDAD7F3A2,
-	(q31_t)0x7A7D055B, (q31_t)0xDAA7DCA1, (q31_t)0x7A6E648A,
-	(q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8, (q31_t)0xDA47BFED,
-	(q31_t)0x7A50EA46, (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8,
-	(q31_t)0xD9E7BA7E, (q31_t)0x7A33248F, (q31_t)0xD9B7C093,
-	(q31_t)0x7A24256E, (q31_t)0xD987CC8F, (q31_t)0x7A151377,
-	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD927F65B,
-	(q31_t)0x79F6B711, (q31_t)0xD8F81439, (q31_t)0x79E76CA6,
-	(q31_t)0xD8C8381C, (q31_t)0x79D80F6F, (q31_t)0xD898620C,
-	(q31_t)0x79C89F6D, (q31_t)0xD868920F, (q31_t)0x79B91CA4,
-	(q31_t)0xD838C82D, (q31_t)0x79A98715, (q31_t)0xD809046D,
-	(q31_t)0x7999DEC3, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
-	(q31_t)0xD7A98F73, (q31_t)0x797A55E0, (q31_t)0xD779DE46,
-	(q31_t)0x796A7554, (q31_t)0xD74A335A, (q31_t)0x795A820E,
-	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6EAF05E,
-	(q31_t)0x793A6360, (q31_t)0xD6BB585D, (q31_t)0x792A37FE,
-	(q31_t)0xD68BC6BA, (q31_t)0x7919F9EB, (q31_t)0xD65C3B7B,
-	(q31_t)0x7909A92C, (q31_t)0xD62CB6A7, (q31_t)0x78F945C3,
-	(q31_t)0xD5FD3847, (q31_t)0x78E8CFB1, (q31_t)0xD5CDC062,
-	(q31_t)0x78D846FB, (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1,
-	(q31_t)0xD56EE424, (q31_t)0x78B6FDA8, (q31_t)0xD53F7FDA,
-	(q31_t)0x78A63D10, (q31_t)0xD5102227, (q31_t)0x789569DE,
-	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD4B17AA7,
-	(q31_t)0x78738BB3, (q31_t)0xD48230E8, (q31_t)0x786280BF,
-	(q31_t)0xD452EDDE, (q31_t)0x7851633B, (q31_t)0xD423B190,
-	(q31_t)0x78403328, (q31_t)0xD3F47C06, (q31_t)0x782EF08B,
-	(q31_t)0xD3C54D46, (q31_t)0x781D9B64, (q31_t)0xD3962559,
-	(q31_t)0x780C33B8, (q31_t)0xD3670445, (q31_t)0x77FAB988,
-	(q31_t)0xD337EA12, (q31_t)0x77E92CD8, (q31_t)0xD308D6C6,
-	(q31_t)0x77D78DAA, (q31_t)0xD2D9CA6A, (q31_t)0x77C5DC01,
-	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD27BC69C,
-	(q31_t)0x77A24148, (q31_t)0xD24CCF38, (q31_t)0x7790583D,
-	(q31_t)0xD21DDEE1, (q31_t)0x777E5CC3, (q31_t)0xD1EEF59E,
-	(q31_t)0x776C4EDB, (q31_t)0xD1C01374, (q31_t)0x775A2E88,
-	(q31_t)0xD191386D, (q31_t)0x7747FBCE, (q31_t)0xD162648F,
-	(q31_t)0x7735B6AE, (q31_t)0xD13397E1, (q31_t)0x77235F2D,
-	(q31_t)0xD104D26B, (q31_t)0x7710F54B, (q31_t)0xD0D61433,
-	(q31_t)0x76FE790E, (q31_t)0xD0A75D42, (q31_t)0x76EBEA77,
-	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD04A054D,
-	(q31_t)0x76C69646, (q31_t)0xD01B6459, (q31_t)0x76B3D0B3,
-	(q31_t)0xCFECCAC7, (q31_t)0x76A0F8D2, (q31_t)0xCFBE389F,
-	(q31_t)0x768E0EA5, (q31_t)0xCF8FADE8, (q31_t)0x767B1230,
-	(q31_t)0xCF612AAA, (q31_t)0x76680376, (q31_t)0xCF32AEEB,
-	(q31_t)0x7654E279, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
-	(q31_t)0xCED5CE08, (q31_t)0x762E69C3, (q31_t)0xCEA768F2,
-	(q31_t)0x761B1211, (q31_t)0xCE790B78, (q31_t)0x7607A827,
-	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCE1C6776,
-	(q31_t)0x75E09DBD, (q31_t)0xCDEE20FC, (q31_t)0x75CCFD42,
-	(q31_t)0xCDBFE23A, (q31_t)0x75B94A9C, (q31_t)0xCD91AB38,
-	(q31_t)0x75A585CF, (q31_t)0xCD637BFD, (q31_t)0x7591AEDD,
-	(q31_t)0xCD355490, (q31_t)0x757DC5CA, (q31_t)0xCD0734F8,
-	(q31_t)0x7569CA98, (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B,
-	(q31_t)0xCCAB0D65, (q31_t)0x75419DE6, (q31_t)0xCC7D0577,
-	(q31_t)0x752D6C6C, (q31_t)0xCC4F057B, (q31_t)0x751928E0,
-	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBF31D75,
-	(q31_t)0x74F06B9E, (q31_t)0xCBC53578, (q31_t)0x74DBF1EF,
-	(q31_t)0xCB975589, (q31_t)0x74C7663A, (q31_t)0xCB697DB0,
-	(q31_t)0x74B2C883, (q31_t)0xCB3BADF2, (q31_t)0x749E18CD,
-	(q31_t)0xCB0DE658, (q31_t)0x7489571B, (q31_t)0xCAE026E8,
-	(q31_t)0x74748371, (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1,
-	(q31_t)0xCA84C0A2, (q31_t)0x744AA63E, (q31_t)0xCA5719DB,
-	(q31_t)0x74359CBD, (q31_t)0xCA297B5A, (q31_t)0x74208150,
-	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9CE5748,
-	(q31_t)0x73F614C0, (q31_t)0xC9A0D1C4, (q31_t)0x73E0C3A3,
-	(q31_t)0xC97354A3, (q31_t)0x73CB60A7, (q31_t)0xC945DFEC,
-	(q31_t)0x73B5EBD0, (q31_t)0xC91873A5, (q31_t)0x73A06522,
-	(q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E, (q31_t)0xC8BDB485,
-	(q31_t)0x73752249, (q31_t)0xC89061BA, (q31_t)0x735F6626,
-	(q31_t)0xC863177B, (q31_t)0x73499838, (q31_t)0xC835D5D0,
-	(q31_t)0x7333B883, (q31_t)0xC8089CBF, (q31_t)0x731DC709,
-	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7AE4489,
-	(q31_t)0x72F1AED8, (q31_t)0xC7812571, (q31_t)0x72DB8828,
-	(q31_t)0xC7540F10, (q31_t)0x72C54FC0, (q31_t)0xC727016C,
-	(q31_t)0x72AF05A6, (q31_t)0xC6F9FC8D, (q31_t)0x7298A9DC,
-	(q31_t)0xC6CD0079, (q31_t)0x72823C66, (q31_t)0xC6A00D36,
-	(q31_t)0x726BBD48, (q31_t)0xC67322CD, (q31_t)0x72552C84,
-	(q31_t)0xC6464144, (q31_t)0x723E8A1F, (q31_t)0xC61968A2,
-	(q31_t)0x7227D61C, (q31_t)0xC5EC98ED, (q31_t)0x7211107D,
-	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC593146A,
-	(q31_t)0x71E3507F, (q31_t)0xC5665FA8, (q31_t)0x71CC5626,
-	(q31_t)0xC539B3F0, (q31_t)0x71B54A40, (q31_t)0xC50D1148,
-	(q31_t)0x719E2CD2, (q31_t)0xC4E077B8, (q31_t)0x7186FDDE,
-	(q31_t)0xC4B3E746, (q31_t)0x716FBD68, (q31_t)0xC4875FF8,
-	(q31_t)0x71586B73, (q31_t)0xC45AE1D7, (q31_t)0x71410804,
-	(q31_t)0xC42E6CE8, (q31_t)0x7129931E, (q31_t)0xC4020132,
-	(q31_t)0x71120CC5, (q31_t)0xC3D59EBD, (q31_t)0x70FA74FB,
-	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC37CF5B0,
-	(q31_t)0x70CB1127, (q31_t)0xC350AF25, (q31_t)0x70B34524,
-	(q31_t)0xC32471F6, (q31_t)0x709B67C0, (q31_t)0xC2F83E2A,
-	(q31_t)0x708378FE, (q31_t)0xC2CC13C7, (q31_t)0x706B78E3,
-	(q31_t)0xC29FF2D4, (q31_t)0x70536771, (q31_t)0xC273DB58,
-	(q31_t)0x703B44AC, (q31_t)0xC247CD5A, (q31_t)0x70231099,
-	(q31_t)0xC21BC8E0, (q31_t)0x700ACB3B, (q31_t)0xC1EFCDF2,
-	(q31_t)0x6FF27496, (q31_t)0xC1C3DC96, (q31_t)0x6FDA0CAD,
-	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC16C16B0,
-	(q31_t)0x6FA90920, (q31_t)0xC1404233, (q31_t)0x6F906D84,
-	(q31_t)0xC1147763, (q31_t)0x6F77C0B3, (q31_t)0xC0E8B648,
-	(q31_t)0x6F5F02B1, (q31_t)0xC0BCFEE7, (q31_t)0x6F463383,
-	(q31_t)0xC0915147, (q31_t)0x6F2D532C, (q31_t)0xC065AD70,
-	(q31_t)0x6F1461AF, (q31_t)0xC03A1368, (q31_t)0x6EFB5F12,
-	(q31_t)0xC00E8335, (q31_t)0x6EE24B57, (q31_t)0xBFE2FCDF,
-	(q31_t)0x6EC92682, (q31_t)0xBFB7806C, (q31_t)0x6EAFF098,
-	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF60A54A,
-	(q31_t)0x6E7D5193, (q31_t)0xBF3546A8, (q31_t)0x6E63E87F,
-	(q31_t)0xBF09F204, (q31_t)0x6E4A6E65, (q31_t)0xBEDEA765,
-	(q31_t)0x6E30E349, (q31_t)0xBEB366D1, (q31_t)0x6E17472F,
-	(q31_t)0xBE88304F, (q31_t)0x6DFD9A1B, (q31_t)0xBE5D03E5,
-	(q31_t)0x6DE3DC11, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
-	(q31_t)0xBE06C977, (q31_t)0x6DB02D29, (q31_t)0xBDDBBB7F,
-	(q31_t)0x6D963C54, (q31_t)0xBDB0B7BA, (q31_t)0x6D7C3A98,
-	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD5ACEE5,
-	(q31_t)0x6D48047E, (q31_t)0xBD2FE9E1, (q31_t)0x6D2DD027,
-	(q31_t)0xBD050F2C, (q31_t)0x6D138AFA, (q31_t)0xBCDA3ECA,
-	(q31_t)0x6CF934FB, (q31_t)0xBCAF78C3, (q31_t)0x6CDECE2E,
-	(q31_t)0xBC84BD1E, (q31_t)0x6CC45697, (q31_t)0xBC5A0BE1,
-	(q31_t)0x6CA9CE3A, (q31_t)0xBC2F6513, (q31_t)0x6C8F351C,
-	(q31_t)0xBC04C8BA, (q31_t)0x6C748B3F, (q31_t)0xBBDA36DC,
-	(q31_t)0x6C59D0A9, (q31_t)0xBBAFAF81, (q31_t)0x6C3F055D,
-	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB5AC06C,
-	(q31_t)0x6C093CB6, (q31_t)0xBB3058C0, (q31_t)0x6BEE3F62,
-	(q31_t)0xBB05FBB0, (q31_t)0x6BD3316A, (q31_t)0xBADBA943,
-	(q31_t)0x6BB812D0, (q31_t)0xBAB1617F, (q31_t)0x6B9CE39B,
-	(q31_t)0xBA87246C, (q31_t)0x6B81A3CD, (q31_t)0xBA5CF210,
-	(q31_t)0x6B66536A, (q31_t)0xBA32CA70, (q31_t)0x6B4AF278,
-	(q31_t)0xBA08AD94, (q31_t)0x6B2F80FA, (q31_t)0xB9DE9B83,
-	(q31_t)0x6B13FEF5, (q31_t)0xB9B49442, (q31_t)0x6AF86C6C,
-	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB960A64B,
-	(q31_t)0x6AC115E1, (q31_t)0xB936BFA3, (q31_t)0x6AA551E8,
-	(q31_t)0xB90CE3E6, (q31_t)0x6A897D7D, (q31_t)0xB8E31319,
-	(q31_t)0x6A6D98A4, (q31_t)0xB8B94D44, (q31_t)0x6A51A361,
-	(q31_t)0xB88F926C, (q31_t)0x6A359DB9, (q31_t)0xB865E299,
-	(q31_t)0x6A1987B0, (q31_t)0xB83C3DD1, (q31_t)0x69FD614A,
-	(q31_t)0xB812A419, (q31_t)0x69E12A8C, (q31_t)0xB7E9157A,
-	(q31_t)0x69C4E37A, (q31_t)0xB7BF91F8, (q31_t)0x69A88C18,
-	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB76CAC68,
-	(q31_t)0x696FAC78, (q31_t)0xB7434A67, (q31_t)0x69532442,
-	(q31_t)0xB719F39D, (q31_t)0x69368BCE, (q31_t)0xB6F0A811,
-	(q31_t)0x6919E320, (q31_t)0xB6C767CA, (q31_t)0x68FD2A3D,
-	(q31_t)0xB69E32CD, (q31_t)0x68E06129, (q31_t)0xB6750921,
-	(q31_t)0x68C387E9, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
-	(q31_t)0xB622D7D5, (q31_t)0x6889A4F5, (q31_t)0xB5F9D042,
-	(q31_t)0x686C9B4B, (q31_t)0xB5D0D41A, (q31_t)0x684F8186,
-	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB57EFE21,
-	(q31_t)0x68151DBE, (q31_t)0xB556245E, (q31_t)0x67F7D3C4,
-	(q31_t)0xB52D561E, (q31_t)0x67DA79C2, (q31_t)0xB5049368,
-	(q31_t)0x67BD0FBC, (q31_t)0xB4DBDC42, (q31_t)0x679F95B7,
-	(q31_t)0xB4B330B2, (q31_t)0x67820BB6, (q31_t)0xB48A90C0,
-	(q31_t)0x676471C0, (q31_t)0xB461FC70, (q31_t)0x6746C7D7,
-	(q31_t)0xB43973C9, (q31_t)0x67290E02, (q31_t)0xB410F6D2,
-	(q31_t)0x670B4443, (q31_t)0xB3E88591, (q31_t)0x66ED6AA1,
-	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB397C649,
-	(q31_t)0x66B187C3, (q31_t)0xB36F784E, (q31_t)0x66937E90,
-	(q31_t)0xB3473622, (q31_t)0x6675658C, (q31_t)0xB31EFFCB,
-	(q31_t)0x66573CBB, (q31_t)0xB2F6D54F, (q31_t)0x66390422,
-	(q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5, (q31_t)0xB2A6A401,
-	(q31_t)0x65FC63A9, (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3,
-	(q31_t)0xB256A26A, (q31_t)0x65BF8447, (q31_t)0xB22EB392,
-	(q31_t)0x65A0FD0B, (q31_t)0xB206D0BA, (q31_t)0x65826622,
-	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB1B72F23,
-	(q31_t)0x6545095F, (q31_t)0xB18F7070, (q31_t)0x6526438E,
-	(q31_t)0xB167BDD6, (q31_t)0x65076E24, (q31_t)0xB140175B,
-	(q31_t)0x64E88926, (q31_t)0xB1187D05, (q31_t)0x64C99498,
-	(q31_t)0xB0F0EEDA, (q31_t)0x64AA907F, (q31_t)0xB0C96CDF,
-	(q31_t)0x648B7CDF, (q31_t)0xB0A1F71C, (q31_t)0x646C59BF,
-	(q31_t)0xB07A8D97, (q31_t)0x644D2722, (q31_t)0xB0533055,
-	(q31_t)0x642DE50D, (q31_t)0xB02BDF5C, (q31_t)0x640E9385,
-	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFDD625F,
-	(q31_t)0x63CFC230, (q31_t)0xAFB63667, (q31_t)0x63B0426D,
-	(q31_t)0xAF8F16D0, (q31_t)0x6390B34A, (q31_t)0xAF6803A1,
-	(q31_t)0x637114CC, (q31_t)0xAF40FCE0, (q31_t)0x635166F8,
-	(q31_t)0xAF1A0293, (q31_t)0x6331A9D4, (q31_t)0xAEF314BF,
-	(q31_t)0x6311DD63, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
-	(q31_t)0xAEA55E9D, (q31_t)0x62D216B2, (q31_t)0xAE7E965B,
-	(q31_t)0x62B21C7B, (q31_t)0xAE57DAAA, (q31_t)0x6292130C,
-	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xAE0A8916,
-	(q31_t)0x6251D297, (q31_t)0xADE3F33E, (q31_t)0x62319B9D,
-	(q31_t)0xADBD6A10, (q31_t)0x6211557D, (q31_t)0xAD96ED91,
-	(q31_t)0x61F1003E, (q31_t)0xAD707DC8, (q31_t)0x61D09BE5,
-	(q31_t)0xAD4A1ABA, (q31_t)0x61B02876, (q31_t)0xAD23C46D,
-	(q31_t)0x618FA5F6, (q31_t)0xACFD7AE8, (q31_t)0x616F146B,
-	(q31_t)0xACD73E30, (q31_t)0x614E73D9, (q31_t)0xACB10E4A,
-	(q31_t)0x612DC446, (q31_t)0xAC8AEB3E, (q31_t)0x610D05B7,
-	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC3ECBC7,
-	(q31_t)0x60CB5BB6, (q31_t)0xAC18CF68, (q31_t)0x60AA704F,
-	(q31_t)0xABF2DFFA, (q31_t)0x60897600, (q31_t)0xABCCFD82,
-	(q31_t)0x60686CCE, (q31_t)0xABA72806, (q31_t)0x604754BE,
-	(q31_t)0xAB815F8C, (q31_t)0x60262DD5, (q31_t)0xAB5BA41A,
-	(q31_t)0x6004F818, (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D,
-	(q31_t)0xAB105464, (q31_t)0x5FC26038, (q31_t)0xAAEAC02B,
-	(q31_t)0x5FA0FE1E, (q31_t)0xAAC53912, (q31_t)0x5F7F8D46,
-	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA7A5253,
-	(q31_t)0x5F3C7F6B, (q31_t)0xAA54F2B9, (q31_t)0x5F1AE273,
-	(q31_t)0xAA2FA055, (q31_t)0x5EF936D1, (q31_t)0xAA0A5B2D,
-	(q31_t)0x5ED77C89, (q31_t)0xA9E52347, (q31_t)0x5EB5B3A1,
-	(q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F, (q31_t)0xA99ADB56,
-	(q31_t)0x5E71F606, (q31_t)0xA975CB56, (q31_t)0x5E50015D,
-	(q31_t)0xA950C8AF, (q31_t)0x5E2DFE28, (q31_t)0xA92BD366,
-	(q31_t)0x5E0BEC6E, (q31_t)0xA906EB81, (q31_t)0x5DE9CC32,
-	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8BD43FA,
-	(q31_t)0x5DA5604E, (q31_t)0xA8988463, (q31_t)0x5D8314B0,
-	(q31_t)0xA873D246, (q31_t)0x5D60BAA6, (q31_t)0xA84F2DA9,
-	(q31_t)0x5D3E5236, (q31_t)0xA82A9693, (q31_t)0x5D1BDB65,
-	(q31_t)0xA8060D08, (q31_t)0x5CF95638, (q31_t)0xA7E1910E,
-	(q31_t)0x5CD6C2B4, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
-	(q31_t)0xA798C1E4, (q31_t)0x5C9170BF, (q31_t)0xA7746EC0,
-	(q31_t)0x5C6EB258, (q31_t)0xA7502943, (q31_t)0x5C4BE5B0,
-	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA707C756,
-	(q31_t)0x5C0621B2, (q31_t)0xA6E3AAF2, (q31_t)0x5BE32A67,
-	(q31_t)0xA6BF9C4B, (q31_t)0x5BC024F0, (q31_t)0xA69B9B68,
-	(q31_t)0x5B9D1153, (q31_t)0xA677A84E, (q31_t)0x5B79EF96,
-	(q31_t)0xA653C302, (q31_t)0x5B56BFBD, (q31_t)0xA62FEB8B,
-	(q31_t)0x5B3381CE, (q31_t)0xA60C21ED, (q31_t)0x5B1035CF,
-	(q31_t)0xA5E8662F, (q31_t)0x5AECDBC4, (q31_t)0xA5C4B855,
-	(q31_t)0x5AC973B4, (q31_t)0xA5A11865, (q31_t)0x5AA5FDA4,
-	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA55A025B,
-	(q31_t)0x5A5EE79A, (q31_t)0xA5368C4B, (q31_t)0x5A3B47AA,
-	(q31_t)0xA513243B, (q31_t)0x5A1799D0, (q31_t)0xA4EFCA31,
-	(q31_t)0x59F3DE12, (q31_t)0xA4CC7E31, (q31_t)0x59D01474,
-	(q31_t)0xA4A94042, (q31_t)0x59AC3CFD, (q31_t)0xA4861069,
-	(q31_t)0x598857B1, (q31_t)0xA462EEAC, (q31_t)0x59646497,
-	(q31_t)0xA43FDB0F, (q31_t)0x594063B4, (q31_t)0xA41CD598,
-	(q31_t)0x591C550E, (q31_t)0xA3F9DE4D, (q31_t)0x58F838A9,
-	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3B41A4F,
-	(q31_t)0x58AFD6BC, (q31_t)0xA3914DA7, (q31_t)0x588B913F,
-	(q31_t)0xA36E8F40, (q31_t)0x58673E1B, (q31_t)0xA34BDF20,
-	(q31_t)0x5842DD54, (q31_t)0xA3293D4B, (q31_t)0x581E6EF1,
-	(q31_t)0xA306A9C7, (q31_t)0x57F9F2F7, (q31_t)0xA2E4249A,
-	(q31_t)0x57D5696C, (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256,
-	(q31_t)0xA29F4559, (q31_t)0x578C2DB9, (q31_t)0xA27CEB4F,
-	(q31_t)0x57677B9D, (q31_t)0xA25A9FB1, (q31_t)0x5742BC05,
-	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA21633CD,
-	(q31_t)0x56F9147E, (q31_t)0xA1F41391, (q31_t)0x56D42C99,
-	(q31_t)0xA1D201D7, (q31_t)0x56AF3750, (q31_t)0xA1AFFEA2,
-	(q31_t)0x568A34A9, (q31_t)0xA18E09F9, (q31_t)0x566524AA,
-	(q31_t)0xA16C23E1, (q31_t)0x56400757, (q31_t)0xA14A4C5E,
-	(q31_t)0x561ADCB8, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
-	(q31_t)0xA106C92E, (q31_t)0x55D05FAA, (q31_t)0xA0E51D8C,
-	(q31_t)0x55AB0D46, (q31_t)0xA0C38094, (q31_t)0x5585ADAC,
-	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA08072BA,
-	(q31_t)0x553AC6ED, (q31_t)0xA05F01E1, (q31_t)0x55153FD4,
-	(q31_t)0xA03D9FC7, (q31_t)0x54EFAB9C, (q31_t)0xA01C4C72,
-	(q31_t)0x54CA0A4A, (q31_t)0x9FFB07E7, (q31_t)0x54A45BE5,
-	(q31_t)0x9FD9D22A, (q31_t)0x547EA073, (q31_t)0x9FB8AB41,
-	(q31_t)0x5458D7F9, (q31_t)0x9F979331, (q31_t)0x5433027D,
-	(q31_t)0x9F7689FF, (q31_t)0x540D2005, (q31_t)0x9F558FB0,
-	(q31_t)0x53E73097, (q31_t)0x9F34A449, (q31_t)0x53C13438,
-	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9EF2FA48,
-	(q31_t)0x537514C1, (q31_t)0x9ED23BB9, (q31_t)0x534EF1B5,
-	(q31_t)0x9EB18C26, (q31_t)0x5328C1D0, (q31_t)0x9E90EB94,
-	(q31_t)0x53028517, (q31_t)0x9E705A09, (q31_t)0x52DC3B92,
-	(q31_t)0x9E4FD789, (q31_t)0x52B5E545, (q31_t)0x9E2F641A,
-	(q31_t)0x528F8237, (q31_t)0x9E0EFFC1, (q31_t)0x5269126E,
-	(q31_t)0x9DEEAA82, (q31_t)0x524295EF, (q31_t)0x9DCE6462,
-	(q31_t)0x521C0CC1, (q31_t)0x9DAE2D68, (q31_t)0x51F576E9,
-	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D6DECF4,
-	(q31_t)0x51A82555, (q31_t)0x9D4DE384, (q31_t)0x518169A4,
-	(q31_t)0x9D2DE94D, (q31_t)0x515AA162, (q31_t)0x9D0DFE53,
-	(q31_t)0x5133CC94, (q31_t)0x9CEE229C, (q31_t)0x510CEB40,
-	(q31_t)0x9CCE562B, (q31_t)0x50E5FD6C, (q31_t)0x9CAE9907,
-	(q31_t)0x50BF031F, (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E,
-	(q31_t)0x9C6F4CB5, (q31_t)0x5070E92F, (q31_t)0x9C4FBD92,
-	(q31_t)0x5049C999, (q31_t)0x9C303DCF, (q31_t)0x50229DA0,
-	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BF16C7A,
-	(q31_t)0x4FD420A3, (q31_t)0x9BD21AF2, (q31_t)0x4FACCFAB,
-	(q31_t)0x9BB2D8DD, (q31_t)0x4F857268, (q31_t)0x9B93A640,
-	(q31_t)0x4F5E08E3, (q31_t)0x9B748320, (q31_t)0x4F369320,
-	(q31_t)0x9B556F80, (q31_t)0x4F0F1126, (q31_t)0x9B366B67,
-	(q31_t)0x4EE782FA, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
-	(q31_t)0x9AF891DB, (q31_t)0x4E984229, (q31_t)0x9AD9BC71,
-	(q31_t)0x4E708F8F, (q31_t)0x9ABAF6A0, (q31_t)0x4E48D0DC,
-	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A7D99DD,
-	(q31_t)0x4DF92F45, (q31_t)0x9A5F02F5, (q31_t)0x4DD14C6E,
-	(q31_t)0x9A407BB8, (q31_t)0x4DA95D96, (q31_t)0x9A22042C,
-	(q31_t)0x4D8162C4, (q31_t)0x9A039C56, (q31_t)0x4D595BFE,
-	(q31_t)0x99E5443A, (q31_t)0x4D31494B, (q31_t)0x99C6FBDE,
-	(q31_t)0x4D092AB0, (q31_t)0x99A8C344, (q31_t)0x4CE10034,
-	(q31_t)0x998A9A73, (q31_t)0x4CB8C9DD, (q31_t)0x996C816F,
-	(q31_t)0x4C9087B1, (q31_t)0x994E783C, (q31_t)0x4C6839B6,
-	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9912955E,
-	(q31_t)0x4C177A6E, (q31_t)0x98F4BBBC, (q31_t)0x4BEF092D,
-	(q31_t)0x98D6F1FE, (q31_t)0x4BC68C36, (q31_t)0x98B93828,
-	(q31_t)0x4B9E038F, (q31_t)0x989B8E3F, (q31_t)0x4B756F3F,
-	(q31_t)0x987DF449, (q31_t)0x4B4CCF4D, (q31_t)0x98606A48,
-	(q31_t)0x4B2423BD, (q31_t)0x9842F043, (q31_t)0x4AFB6C97,
-	(q31_t)0x9825863D, (q31_t)0x4AD2A9E1, (q31_t)0x98082C3B,
-	(q31_t)0x4AA9DBA1, (q31_t)0x97EAE241, (q31_t)0x4A8101DE,
-	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x97B07E7A,
-	(q31_t)0x4A2F2BE5, (q31_t)0x979364B5, (q31_t)0x4A062FBD,
-	(q31_t)0x97765B0A, (q31_t)0x49DD282A, (q31_t)0x9759617E,
-	(q31_t)0x49B41533, (q31_t)0x973C7816, (q31_t)0x498AF6DE,
-	(q31_t)0x971F9ED6, (q31_t)0x4961CD32, (q31_t)0x9702D5C2,
-	(q31_t)0x49389836, (q31_t)0x96E61CDF, (q31_t)0x490F57EE,
-	(q31_t)0x96C97431, (q31_t)0x48E60C62, (q31_t)0x96ACDBBD,
-	(q31_t)0x48BCB598, (q31_t)0x96905387, (q31_t)0x48935397,
-	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x965773E7,
-	(q31_t)0x48406E07, (q31_t)0x963B1C85, (q31_t)0x4816EA85,
-	(q31_t)0x961ED573, (q31_t)0x47ED5BE6, (q31_t)0x96029EB5,
-	(q31_t)0x47C3C22E, (q31_t)0x95E6784F, (q31_t)0x479A1D66,
-	(q31_t)0x95CA6246, (q31_t)0x47706D93, (q31_t)0x95AE5C9E,
-	(q31_t)0x4746B2BC, (q31_t)0x9592675B, (q31_t)0x471CECE6,
-	(q31_t)0x95768282, (q31_t)0x46F31C1A, (q31_t)0x955AAE17,
-	(q31_t)0x46C9405C, (q31_t)0x953EEA1E, (q31_t)0x469F59B4,
-	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x95079393,
-	(q31_t)0x464B6BBD, (q31_t)0x94EC010B, (q31_t)0x4621647C,
-	(q31_t)0x94D07F05, (q31_t)0x45F7526B, (q31_t)0x94B50D87,
-	(q31_t)0x45CD358F, (q31_t)0x9499AC95, (q31_t)0x45A30DF0,
-	(q31_t)0x947E5C32, (q31_t)0x4578DB93, (q31_t)0x94631C64,
-	(q31_t)0x454E9E80, (q31_t)0x9447ED2F, (q31_t)0x452456BC,
-	(q31_t)0x942CCE95, (q31_t)0x44FA044F, (q31_t)0x9411C09D,
-	(q31_t)0x44CFA73F, (q31_t)0x93F6C34A, (q31_t)0x44A53F93,
-	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93C0FAA2,
-	(q31_t)0x4450507E, (q31_t)0x93A62F56, (q31_t)0x4425C923,
-	(q31_t)0x938B74C0, (q31_t)0x43FB3745, (q31_t)0x9370CAE4,
-	(q31_t)0x43D09AEC, (q31_t)0x935631C5, (q31_t)0x43A5F41E,
-	(q31_t)0x933BA968, (q31_t)0x437B42E1, (q31_t)0x932131D1,
-	(q31_t)0x4350873C, (q31_t)0x9306CB04, (q31_t)0x4325C135,
-	(q31_t)0x92EC7505, (q31_t)0x42FAF0D4, (q31_t)0x92D22FD8,
-	(q31_t)0x42D0161E, (q31_t)0x92B7FB82, (q31_t)0x42A5311A,
-	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9283C567,
-	(q31_t)0x424F4845, (q31_t)0x9269C3AC, (q31_t)0x42244480,
-	(q31_t)0x924FD2D6, (q31_t)0x41F93688, (q31_t)0x9235F2EB,
-	(q31_t)0x41CE1E64, (q31_t)0x921C23EE, (q31_t)0x41A2FC1A,
-	(q31_t)0x920265E4, (q31_t)0x4177CFB0, (q31_t)0x91E8B8D0,
-	(q31_t)0x414C992E, (q31_t)0x91CF1CB6, (q31_t)0x4121589A,
-	(q31_t)0x91B5919A, (q31_t)0x40F60DFB, (q31_t)0x919C1780,
-	(q31_t)0x40CAB957, (q31_t)0x9182AE6C, (q31_t)0x409F5AB6,
-	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x91500F67,
-	(q31_t)0x40487F93, (q31_t)0x9136D97D, (q31_t)0x401D0320,
-	(q31_t)0x911DB4A8, (q31_t)0x3FF17CCA, (q31_t)0x9104A0ED,
-	(q31_t)0x3FC5EC97, (q31_t)0x90EB9E50, (q31_t)0x3F9A528F,
-	(q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8, (q31_t)0x90B9CC7C,
-	(q31_t)0x3F430118, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
-	(q31_t)0x90883F4C, (q31_t)0x3EEB889C, (q31_t)0x906F927B,
-	(q31_t)0x3EBFBDCC, (q31_t)0x9056F6DF, (q31_t)0x3E93E94F,
-	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x9025F352,
-	(q31_t)0x3E3C2369, (q31_t)0x900D8B69, (q31_t)0x3E10320D,
-	(q31_t)0x8FF534C4, (q31_t)0x3DE4371F, (q31_t)0x8FDCEF66,
-	(q31_t)0x3DB832A5, (q31_t)0x8FC4BB53, (q31_t)0x3D8C24A7,
-	(q31_t)0x8FAC988E, (q31_t)0x3D600D2B, (q31_t)0x8F94871D,
-	(q31_t)0x3D33EC39, (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5,
-	(q31_t)0x8F64983F, (q31_t)0x3CDB8E09, (q31_t)0x8F4CBADB,
-	(q31_t)0x3CAF50DA, (q31_t)0x8F34EED8, (q31_t)0x3C830A4F,
-	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8F058B04,
-	(q31_t)0x3C2A6142, (q31_t)0x8EEDF33B, (q31_t)0x3BFDFECD,
-	(q31_t)0x8ED66CE1, (q31_t)0x3BD19317, (q31_t)0x8EBEF7FB,
-	(q31_t)0x3BA51E29, (q31_t)0x8EA7948C, (q31_t)0x3B78A007,
-	(q31_t)0x8E904298, (q31_t)0x3B4C18BA, (q31_t)0x8E790222,
-	(q31_t)0x3B1F8847, (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7,
-	(q31_t)0x8E4AB5BF, (q31_t)0x3AC64C0F, (q31_t)0x8E33A9D9,
-	(q31_t)0x3A99A057, (q31_t)0x8E1CAF80, (q31_t)0x3A6CEB95,
-	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DEEEF82,
-	(q31_t)0x3A136712, (q31_t)0x8DD829E4, (q31_t)0x39E6975D,
-	(q31_t)0x8DC175E0, (q31_t)0x39B9BEBB, (q31_t)0x8DAAD37B,
-	(q31_t)0x398CDD32, (q31_t)0x8D9442B7, (q31_t)0x395FF2C9,
-	(q31_t)0x8D7DC399, (q31_t)0x3932FF87, (q31_t)0x8D675623,
-	(q31_t)0x39060372, (q31_t)0x8D50FA59, (q31_t)0x38D8FE93,
-	(q31_t)0x8D3AB03F, (q31_t)0x38ABF0EF, (q31_t)0x8D2477D8,
-	(q31_t)0x387EDA8E, (q31_t)0x8D0E5127, (q31_t)0x3851BB76,
-	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CE238F6,
-	(q31_t)0x37F76340, (q31_t)0x8CCC477D, (q31_t)0x37CA2A30,
-	(q31_t)0x8CB667C7, (q31_t)0x379CE884, (q31_t)0x8CA099D9,
-	(q31_t)0x376F9E46, (q31_t)0x8C8ADDB6, (q31_t)0x37424B7A,
-	(q31_t)0x8C753361, (q31_t)0x3714F02A, (q31_t)0x8C5F9ADD,
-	(q31_t)0x36E78C5A, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
-	(q31_t)0x8C349F58, (q31_t)0x368CAB5C, (q31_t)0x8C1F3C5C,
-	(q31_t)0x365F2E3B, (q31_t)0x8C09EB40, (q31_t)0x3631A8B7,
-	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BDF7EAF,
-	(q31_t)0x35D684A5, (q31_t)0x8BCA6342, (q31_t)0x35A8E624,
-	(q31_t)0x8BB559C1, (q31_t)0x357B3F5D, (q31_t)0x8BA0622F,
-	(q31_t)0x354D9056, (q31_t)0x8B8B7C8F, (q31_t)0x351FD917,
-	(q31_t)0x8B76A8E4, (q31_t)0x34F219A7, (q31_t)0x8B61E732,
-	(q31_t)0x34C4520D, (q31_t)0x8B4D377C, (q31_t)0x3496824F,
-	(q31_t)0x8B3899C5, (q31_t)0x3468AA76, (q31_t)0x8B240E10,
-	(q31_t)0x343ACA87, (q31_t)0x8B0F9461, (q31_t)0x340CE28A,
-	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AE6D71F,
-	(q31_t)0x33B0FA84, (q31_t)0x8AD29393, (q31_t)0x3382FA88,
-	(q31_t)0x8ABE6219, (q31_t)0x3354F29A, (q31_t)0x8AAA42B4,
-	(q31_t)0x3326E2C2, (q31_t)0x8A963567, (q31_t)0x32F8CB07,
-	(q31_t)0x8A823A35, (q31_t)0x32CAAB6F, (q31_t)0x8A6E5122,
-	(q31_t)0x329C8402, (q31_t)0x8A5A7A30, (q31_t)0x326E54C7,
-	(q31_t)0x8A46B563, (q31_t)0x32401DC5, (q31_t)0x8A3302BD,
-	(q31_t)0x3211DF03, (q31_t)0x8A1F6242, (q31_t)0x31E39889,
-	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89F857D8,
-	(q31_t)0x3186F487, (q31_t)0x89E4EDEE, (q31_t)0x3158970D,
-	(q31_t)0x89D1963C, (q31_t)0x312A31F8, (q31_t)0x89BE50C3,
-	(q31_t)0x30FBC54D, (q31_t)0x89AB1D86, (q31_t)0x30CD5114,
-	(q31_t)0x8997FC89, (q31_t)0x309ED555, (q31_t)0x8984EDCF,
-	(q31_t)0x30705217, (q31_t)0x8971F15A, (q31_t)0x3041C760,
-	(q31_t)0x895F072D, (q31_t)0x30133538, (q31_t)0x894C2F4C,
-	(q31_t)0x2FE49BA6, (q31_t)0x893969B9, (q31_t)0x2FB5FAB2,
-	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x89141589,
-	(q31_t)0x2F58A2BD, (q31_t)0x890186F1, (q31_t)0x2F29EBCC,
-	(q31_t)0x88EF0AB4, (q31_t)0x2EFB2D94, (q31_t)0x88DCA0D3,
-	(q31_t)0x2ECC681E, (q31_t)0x88CA4951, (q31_t)0x2E9D9B70,
-	(q31_t)0x88B80431, (q31_t)0x2E6EC792, (q31_t)0x88A5D177,
-	(q31_t)0x2E3FEC8B, (q31_t)0x8893B124, (q31_t)0x2E110A62,
-	(q31_t)0x8881A33C, (q31_t)0x2DE2211E, (q31_t)0x886FA7C2,
-	(q31_t)0x2DB330C7, (q31_t)0x885DBEB7, (q31_t)0x2D843963,
-	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x883A23FE,
-	(q31_t)0x2D263595, (q31_t)0x88287255, (q31_t)0x2CF72939,
-	(q31_t)0x8816D327, (q31_t)0x2CC815ED, (q31_t)0x88054677,
-	(q31_t)0x2C98FBBA, (q31_t)0x87F3CC47, (q31_t)0x2C69DAA6,
-	(q31_t)0x87E2649B, (q31_t)0x2C3AB2B9, (q31_t)0x87D10F75,
-	(q31_t)0x2C0B83F9, (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F,
-	(q31_t)0x87AE9CC5, (q31_t)0x2BAD1221, (q31_t)0x879D7F40,
-	(q31_t)0x2B7DCF17, (q31_t)0x878C744C, (q31_t)0x2B4E8558,
-	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x876A9621,
-	(q31_t)0x2AEFDDD8, (q31_t)0x8759C2EF, (q31_t)0x2AC08025,
-	(q31_t)0x87490257, (q31_t)0x2A911BDB, (q31_t)0x8738545E,
-	(q31_t)0x2A61B101, (q31_t)0x8727B904, (q31_t)0x2A323F9D,
-	(q31_t)0x8717304E, (q31_t)0x2A02C7B8, (q31_t)0x8706BA3C,
-	(q31_t)0x29D34958, (q31_t)0x86F656D3, (q31_t)0x29A3C484,
-	(q31_t)0x86E60614, (q31_t)0x29743945, (q31_t)0x86D5C802,
-	(q31_t)0x2944A7A2, (q31_t)0x86C59C9F, (q31_t)0x29150FA1,
-	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x86A57DF1,
-	(q31_t)0x28B5CCA5, (q31_t)0x86958AAB, (q31_t)0x288621B9,
-	(q31_t)0x8685AA1F, (q31_t)0x2856708C, (q31_t)0x8675DC4E,
-	(q31_t)0x2826B928, (q31_t)0x8666213C, (q31_t)0x27F6FB92,
-	(q31_t)0x865678EA, (q31_t)0x27C737D2, (q31_t)0x8646E35B,
-	(q31_t)0x27976DF1, (q31_t)0x86376092, (q31_t)0x27679DF4,
-	(q31_t)0x8627F090, (q31_t)0x2737C7E3, (q31_t)0x86189359,
-	(q31_t)0x2707EBC6, (q31_t)0x860948EE, (q31_t)0x26D809A5,
-	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85EAEC88,
-	(q31_t)0x26783370, (q31_t)0x85DBDA91, (q31_t)0x26483F6C,
-	(q31_t)0x85CCDB70, (q31_t)0x26184581, (q31_t)0x85BDEF27,
-	(q31_t)0x25E845B5, (q31_t)0x85AF15B9, (q31_t)0x25B84012,
-	(q31_t)0x85A04F28, (q31_t)0x2588349D, (q31_t)0x85919B75,
-	(q31_t)0x2558235E, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
-	(q31_t)0x85746CB7, (q31_t)0x24F7EFA1, (q31_t)0x8565F1B0,
-	(q31_t)0x24C7CD32, (q31_t)0x85578991, (q31_t)0x2497A517,
-	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x853AF214,
-	(q31_t)0x243743FA, (q31_t)0x852CC2BA, (q31_t)0x24070B07,
-	(q31_t)0x851EA652, (q31_t)0x23D6CC86, (q31_t)0x85109CDC,
-	(q31_t)0x23A6887E, (q31_t)0x8502A65C, (q31_t)0x23763EF7,
-	(q31_t)0x84F4C2D3, (q31_t)0x2345EFF7, (q31_t)0x84E6F244,
-	(q31_t)0x23159B87, (q31_t)0x84D934B0, (q31_t)0x22E541AE,
-	(q31_t)0x84CB8A1B, (q31_t)0x22B4E274, (q31_t)0x84BDF285,
-	(q31_t)0x22847DDF, (q31_t)0x84B06DF1, (q31_t)0x225413F8,
-	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x84959DD9,
-	(q31_t)0x21F3304E, (q31_t)0x84885257, (q31_t)0x21C2B69C,
-	(q31_t)0x847B19E1, (q31_t)0x219237B4, (q31_t)0x846DF476,
-	(q31_t)0x2161B39F, (q31_t)0x8460E21A, (q31_t)0x21312A65,
-	(q31_t)0x8453E2CE, (q31_t)0x21009C0B, (q31_t)0x8446F695,
-	(q31_t)0x20D0089B, (q31_t)0x843A1D70, (q31_t)0x209F701C,
-	(q31_t)0x842D5761, (q31_t)0x206ED295, (q31_t)0x8420A46B,
-	(q31_t)0x203E300D, (q31_t)0x8414048F, (q31_t)0x200D888C,
-	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83FAFE2E,
-	(q31_t)0x1FAC2ABF, (q31_t)0x83EE97AC, (q31_t)0x1F7B7480,
-	(q31_t)0x83E2444D, (q31_t)0x1F4AB967, (q31_t)0x83D60411,
-	(q31_t)0x1F19F97B, (q31_t)0x83C9D6FB, (q31_t)0x1EE934C2,
-	(q31_t)0x83BDBD0D, (q31_t)0x1EB86B46, (q31_t)0x83B1B649,
-	(q31_t)0x1E879D0C, (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E,
-	(q31_t)0x8399E244, (q31_t)0x1E25F281, (q31_t)0x838E1507,
-	(q31_t)0x1DF5163F, (q31_t)0x83825AFB, (q31_t)0x1DC4355D,
-	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x836B207D,
-	(q31_t)0x1D6265DD, (q31_t)0x835FA00E, (q31_t)0x1D31774D,
-	(q31_t)0x835432D8, (q31_t)0x1D00843C, (q31_t)0x8348D8DB,
-	(q31_t)0x1CCF8CB3, (q31_t)0x833D921A, (q31_t)0x1C9E90B8,
-	(q31_t)0x83325E97, (q31_t)0x1C6D9053, (q31_t)0x83273E52,
-	(q31_t)0x1C3C8B8C, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
-	(q31_t)0x8311378C, (q31_t)0x1BDA74F5, (q31_t)0x8306510F,
-	(q31_t)0x1BA96334, (q31_t)0x82FB7DD8, (q31_t)0x1B784D30,
-	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82E61141,
-	(q31_t)0x1B161479, (q31_t)0x82DB77E5, (q31_t)0x1AE4F1D6,
-	(q31_t)0x82D0F1D5, (q31_t)0x1AB3CB0C, (q31_t)0x82C67F13,
-	(q31_t)0x1A82A025, (q31_t)0x82BC1FA1, (q31_t)0x1A517127,
-	(q31_t)0x82B1D381, (q31_t)0x1A203E1B, (q31_t)0x82A79AB3,
-	(q31_t)0x19EF0706, (q31_t)0x829D753A, (q31_t)0x19BDCBF2,
-	(q31_t)0x82936316, (q31_t)0x198C8CE6, (q31_t)0x8289644A,
-	(q31_t)0x195B49E9, (q31_t)0x827F78D8, (q31_t)0x192A0303,
-	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x826BDC04,
-	(q31_t)0x18C7699B, (q31_t)0x82622AA5, (q31_t)0x18961727,
-	(q31_t)0x82588CA6, (q31_t)0x1864C0E9, (q31_t)0x824F0208,
-	(q31_t)0x183366E8, (q31_t)0x82458ACB, (q31_t)0x1802092C,
-	(q31_t)0x823C26F2, (q31_t)0x17D0A7BB, (q31_t)0x8232D67E,
-	(q31_t)0x179F429F, (q31_t)0x82299971, (q31_t)0x176DD9DE,
-	(q31_t)0x82206FCB, (q31_t)0x173C6D80, (q31_t)0x8217598F,
-	(q31_t)0x170AFD8D, (q31_t)0x820E56BE, (q31_t)0x16D98A0C,
-	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81FC8B60,
-	(q31_t)0x1676987F, (q31_t)0x81F3C2D7, (q31_t)0x16451A83,
-	(q31_t)0x81EB0DBD, (q31_t)0x16139917, (q31_t)0x81E26C16,
-	(q31_t)0x15E21444, (q31_t)0x81D9DDE1, (q31_t)0x15B08C11,
-	(q31_t)0x81D16320, (q31_t)0x157F0086, (q31_t)0x81C8FBD5,
-	(q31_t)0x154D71AA, (q31_t)0x81C0A801, (q31_t)0x151BDF85,
-	(q31_t)0x81B867A4, (q31_t)0x14EA4A1F, (q31_t)0x81B03AC1,
-	(q31_t)0x14B8B17F, (q31_t)0x81A82159, (q31_t)0x148715AD,
-	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x819828FD,
-	(q31_t)0x1423D492, (q31_t)0x81904A0C, (q31_t)0x13F22F57,
-	(q31_t)0x81887E9A, (q31_t)0x13C0870A, (q31_t)0x8180C6A9,
-	(q31_t)0x138EDBB0, (q31_t)0x8179223A, (q31_t)0x135D2D53,
-	(q31_t)0x8171914E, (q31_t)0x132B7BF9, (q31_t)0x816A13E6,
-	(q31_t)0x12F9C7AA, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
-	(q31_t)0x815B53A8, (q31_t)0x1296564D, (q31_t)0x815410D3,
-	(q31_t)0x1264994E, (q31_t)0x814CE188, (q31_t)0x1232D978,
-	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x813EBD90,
-	(q31_t)0x11CF516A, (q31_t)0x8137C8E6, (q31_t)0x119D8940,
-	(q31_t)0x8130E7C8, (q31_t)0x116BBE5F, (q31_t)0x812A1A39,
-	(q31_t)0x1139F0CE, (q31_t)0x81236039, (q31_t)0x11082096,
-	(q31_t)0x811CB9CA, (q31_t)0x10D64DBC, (q31_t)0x811626EC,
-	(q31_t)0x10A4784A, (q31_t)0x810FA7A0, (q31_t)0x1072A047,
-	(q31_t)0x81093BE8, (q31_t)0x1040C5BB, (q31_t)0x8102E3C3,
-	(q31_t)0x100EE8AD, (q31_t)0x80FC9F35, (q31_t)0x0FDD0925,
-	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80F050DB,
-	(q31_t)0x0F7942C6, (q31_t)0x80EA4712, (q31_t)0x0F475BFE,
-	(q31_t)0x80E450E2, (q31_t)0x0F1572DC, (q31_t)0x80DE6E4C,
-	(q31_t)0x0EE38765, (q31_t)0x80D89F51, (q31_t)0x0EB199A3,
-	(q31_t)0x80D2E3F1, (q31_t)0x0E7FA99D, (q31_t)0x80CD3C2F,
-	(q31_t)0x0E4DB75B, (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3,
-	(q31_t)0x80C22783, (q31_t)0x0DE9CC3F, (q31_t)0x80BCBA9C,
-	(q31_t)0x0DB7D376, (q31_t)0x80B76155, (q31_t)0x0D85D88F,
-	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80ACE9AB,
-	(q31_t)0x0D21DC87, (q31_t)0x80A7CB49, (q31_t)0x0CEFDB75,
-	(q31_t)0x80A2C08B, (q31_t)0x0CBDD865, (q31_t)0x809DC970,
-	(q31_t)0x0C8BD35E, (q31_t)0x8098E5FB, (q31_t)0x0C59CC67,
-	(q31_t)0x8094162B, (q31_t)0x0C27C389, (q31_t)0x808F5A02,
-	(q31_t)0x0BF5B8CB, (q31_t)0x808AB180, (q31_t)0x0BC3AC35,
-	(q31_t)0x80861CA5, (q31_t)0x0B919DCE, (q31_t)0x80819B74,
-	(q31_t)0x0B5F8D9F, (q31_t)0x807D2DEB, (q31_t)0x0B2D7BAE,
-	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80748DD9,
-	(q31_t)0x0AC952AA, (q31_t)0x80705B50, (q31_t)0x0A973BA5,
-	(q31_t)0x806C3C73, (q31_t)0x0A6522FE, (q31_t)0x80683143,
-	(q31_t)0x0A3308BC, (q31_t)0x806439C0, (q31_t)0x0A00ECE8,
-	(q31_t)0x806055EA, (q31_t)0x09CECF89, (q31_t)0x805C85C3,
-	(q31_t)0x099CB0A7, (q31_t)0x8058C94C, (q31_t)0x096A9049,
-	(q31_t)0x80552083, (q31_t)0x09386E77, (q31_t)0x80518B6B,
-	(q31_t)0x09064B3A, (q31_t)0x804E0A03, (q31_t)0x08D42698,
-	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x80474248,
-	(q31_t)0x086FD947, (q31_t)0x8043FBF6, (q31_t)0x083DB0A7,
-	(q31_t)0x8040C956, (q31_t)0x080B86C1, (q31_t)0x803DAA69,
-	(q31_t)0x07D95B9E, (q31_t)0x803A9F31, (q31_t)0x07A72F45,
-	(q31_t)0x8037A7AC, (q31_t)0x077501BE, (q31_t)0x8034C3DC,
-	(q31_t)0x0742D310, (q31_t)0x8031F3C1, (q31_t)0x0710A344,
-	(q31_t)0x802F375C, (q31_t)0x06DE7261, (q31_t)0x802C8EAD,
-	(q31_t)0x06AC406F, (q31_t)0x8029F9B4, (q31_t)0x067A0D75,
-	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80250AE7,
-	(q31_t)0x0615A48A, (q31_t)0x8022B113, (q31_t)0x05E36EA9,
-	(q31_t)0x80206AF8, (q31_t)0x05B137DF, (q31_t)0x801E3894,
-	(q31_t)0x057F0034, (q31_t)0x801C19E9, (q31_t)0x054CC7B0,
-	(q31_t)0x801A0EF7, (q31_t)0x051A8E5C, (q31_t)0x801817BF,
-	(q31_t)0x04E8543D, (q31_t)0x80163440, (q31_t)0x04B6195D,
-	(q31_t)0x8014647A, (q31_t)0x0483DDC3, (q31_t)0x8012A86F,
-	(q31_t)0x0451A176, (q31_t)0x8011001E, (q31_t)0x041F647F,
-	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800DEAAC,
-	(q31_t)0x03BAE8B1, (q31_t)0x800C7D8C, (q31_t)0x0388A9E9,
-	(q31_t)0x800B2427, (q31_t)0x03566A96, (q31_t)0x8009DE7D,
-	(q31_t)0x03242ABF, (q31_t)0x8008AC90, (q31_t)0x02F1EA6B,
-	(q31_t)0x80078E5E, (q31_t)0x02BFA9A4, (q31_t)0x800683E8,
-	(q31_t)0x028D6870, (q31_t)0x80058D2E, (q31_t)0x025B26D7,
-	(q31_t)0x8004AA31, (q31_t)0x0228E4E1, (q31_t)0x8003DAF0,
-	(q31_t)0x01F6A296, (q31_t)0x80031F6C, (q31_t)0x01C45FFE,
-	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001E39B,
-	(q31_t)0x015FDA03, (q31_t)0x8001634D, (q31_t)0x012D96B0,
-	(q31_t)0x8000F6BD, (q31_t)0x00FB532F, (q31_t)0x80009DE9,
-	(q31_t)0x00C90F88, (q31_t)0x800058D3, (q31_t)0x0096CBC1,
-	(q31_t)0x8000277A, (q31_t)0x006487E3, (q31_t)0x800009DE,
-	(q31_t)0x003243F5, (q31_t)0x80000000, (q31_t)0x00000000,
-	(q31_t)0x800009DE, (q31_t)0xFFCDBC0A, (q31_t)0x8000277A,
-	(q31_t)0xFF9B781D, (q31_t)0x800058D3, (q31_t)0xFF69343E,
-	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8000F6BD,
-	(q31_t)0xFF04ACD0, (q31_t)0x8001634D, (q31_t)0xFED2694F,
-	(q31_t)0x8001E39B, (q31_t)0xFEA025FC, (q31_t)0x800277A5,
-	(q31_t)0xFE6DE2E0, (q31_t)0x80031F6C, (q31_t)0xFE3BA001,
-	(q31_t)0x8003DAF0, (q31_t)0xFE095D69, (q31_t)0x8004AA31,
-	(q31_t)0xFDD71B1E, (q31_t)0x80058D2E, (q31_t)0xFDA4D928,
-	(q31_t)0x800683E8, (q31_t)0xFD72978F, (q31_t)0x80078E5E,
-	(q31_t)0xFD40565B, (q31_t)0x8008AC90, (q31_t)0xFD0E1594,
-	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800B2427,
-	(q31_t)0xFCA99569, (q31_t)0x800C7D8C, (q31_t)0xFC775616,
-	(q31_t)0x800DEAAC, (q31_t)0xFC45174E, (q31_t)0x800F6B88,
-	(q31_t)0xFC12D919, (q31_t)0x8011001E, (q31_t)0xFBE09B80,
-	(q31_t)0x8012A86F, (q31_t)0xFBAE5E89, (q31_t)0x8014647A,
-	(q31_t)0xFB7C223C, (q31_t)0x80163440, (q31_t)0xFB49E6A2,
-	(q31_t)0x801817BF, (q31_t)0xFB17ABC2, (q31_t)0x801A0EF7,
-	(q31_t)0xFAE571A4, (q31_t)0x801C19E9, (q31_t)0xFAB3384F,
-	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x80206AF8,
-	(q31_t)0xFA4EC820, (q31_t)0x8022B113, (q31_t)0xFA1C9156,
-	(q31_t)0x80250AE7, (q31_t)0xF9EA5B75, (q31_t)0x80277872,
-	(q31_t)0xF9B82683, (q31_t)0x8029F9B4, (q31_t)0xF985F28A,
-	(q31_t)0x802C8EAD, (q31_t)0xF953BF90, (q31_t)0x802F375C,
-	(q31_t)0xF9218D9E, (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB,
-	(q31_t)0x8034C3DC, (q31_t)0xF8BD2CEF, (q31_t)0x8037A7AC,
-	(q31_t)0xF88AFE41, (q31_t)0x803A9F31, (q31_t)0xF858D0BA,
-	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8040C956,
-	(q31_t)0xF7F4793E, (q31_t)0x8043FBF6, (q31_t)0xF7C24F58,
-	(q31_t)0x80474248, (q31_t)0xF79026B8, (q31_t)0x804A9C4D,
-	(q31_t)0xF75DFF65, (q31_t)0x804E0A03, (q31_t)0xF72BD967,
-	(q31_t)0x80518B6B, (q31_t)0xF6F9B4C5, (q31_t)0x80552083,
-	(q31_t)0xF6C79188, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
-	(q31_t)0x805C85C3, (q31_t)0xF6634F58, (q31_t)0x806055EA,
-	(q31_t)0xF6313076, (q31_t)0x806439C0, (q31_t)0xF5FF1317,
-	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x806C3C73,
-	(q31_t)0xF59ADD01, (q31_t)0x80705B50, (q31_t)0xF568C45A,
-	(q31_t)0x80748DD9, (q31_t)0xF536AD55, (q31_t)0x8078D40D,
-	(q31_t)0xF50497FA, (q31_t)0x807D2DEB, (q31_t)0xF4D28451,
-	(q31_t)0x80819B74, (q31_t)0xF4A07260, (q31_t)0x80861CA5,
-	(q31_t)0xF46E6231, (q31_t)0x808AB180, (q31_t)0xF43C53CA,
-	(q31_t)0x808F5A02, (q31_t)0xF40A4734, (q31_t)0x8094162B,
-	(q31_t)0xF3D83C76, (q31_t)0x8098E5FB, (q31_t)0xF3A63398,
-	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A2C08B,
-	(q31_t)0xF342279A, (q31_t)0x80A7CB49, (q31_t)0xF310248A,
-	(q31_t)0x80ACE9AB, (q31_t)0xF2DE2378, (q31_t)0x80B21BAF,
-	(q31_t)0xF2AC246D, (q31_t)0x80B76155, (q31_t)0xF27A2770,
-	(q31_t)0x80BCBA9C, (q31_t)0xF2482C89, (q31_t)0x80C22783,
-	(q31_t)0xF21633C0, (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C,
-	(q31_t)0x80CD3C2F, (q31_t)0xF1B248A5, (q31_t)0x80D2E3F1,
-	(q31_t)0xF1805662, (q31_t)0x80D89F51, (q31_t)0xF14E665C,
-	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80E450E2,
-	(q31_t)0xF0EA8D23, (q31_t)0x80EA4712, (q31_t)0xF0B8A401,
-	(q31_t)0x80F050DB, (q31_t)0xF086BD39, (q31_t)0x80F66E3C,
-	(q31_t)0xF054D8D4, (q31_t)0x80FC9F35, (q31_t)0xF022F6DA,
-	(q31_t)0x8102E3C3, (q31_t)0xEFF11752, (q31_t)0x81093BE8,
-	(q31_t)0xEFBF3A44, (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8,
-	(q31_t)0x811626EC, (q31_t)0xEF5B87B5, (q31_t)0x811CB9CA,
-	(q31_t)0xEF29B243, (q31_t)0x81236039, (q31_t)0xEEF7DF6A,
-	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8130E7C8,
-	(q31_t)0xEE9441A0, (q31_t)0x8137C8E6, (q31_t)0xEE6276BF,
-	(q31_t)0x813EBD90, (q31_t)0xEE30AE95, (q31_t)0x8145C5C6,
-	(q31_t)0xEDFEE92B, (q31_t)0x814CE188, (q31_t)0xEDCD2687,
-	(q31_t)0x815410D3, (q31_t)0xED9B66B2, (q31_t)0x815B53A8,
-	(q31_t)0xED69A9B2, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
-	(q31_t)0x816A13E6, (q31_t)0xED063855, (q31_t)0x8171914E,
-	(q31_t)0xECD48406, (q31_t)0x8179223A, (q31_t)0xECA2D2AC,
-	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81887E9A,
-	(q31_t)0xEC3F78F5, (q31_t)0x81904A0C, (q31_t)0xEC0DD0A8,
-	(q31_t)0x819828FD, (q31_t)0xEBDC2B6D, (q31_t)0x81A01B6C,
-	(q31_t)0xEBAA894E, (q31_t)0x81A82159, (q31_t)0xEB78EA52,
-	(q31_t)0x81B03AC1, (q31_t)0xEB474E80, (q31_t)0x81B867A4,
-	(q31_t)0xEB15B5E0, (q31_t)0x81C0A801, (q31_t)0xEAE4207A,
-	(q31_t)0x81C8FBD5, (q31_t)0xEAB28E55, (q31_t)0x81D16320,
-	(q31_t)0xEA80FF79, (q31_t)0x81D9DDE1, (q31_t)0xEA4F73EE,
-	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81EB0DBD,
-	(q31_t)0xE9EC66E8, (q31_t)0x81F3C2D7, (q31_t)0xE9BAE57C,
-	(q31_t)0x81FC8B60, (q31_t)0xE9896780, (q31_t)0x82056758,
-	(q31_t)0xE957ECFB, (q31_t)0x820E56BE, (q31_t)0xE92675F4,
-	(q31_t)0x8217598F, (q31_t)0xE8F50273, (q31_t)0x82206FCB,
-	(q31_t)0xE8C3927F, (q31_t)0x82299971, (q31_t)0xE8922621,
-	(q31_t)0x8232D67E, (q31_t)0xE860BD60, (q31_t)0x823C26F2,
-	(q31_t)0xE82F5844, (q31_t)0x82458ACB, (q31_t)0xE7FDF6D3,
-	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82588CA6,
-	(q31_t)0xE79B3F16, (q31_t)0x82622AA5, (q31_t)0xE769E8D8,
-	(q31_t)0x826BDC04, (q31_t)0xE7389664, (q31_t)0x8275A0C0,
-	(q31_t)0xE70747C3, (q31_t)0x827F78D8, (q31_t)0xE6D5FCFC,
-	(q31_t)0x8289644A, (q31_t)0xE6A4B616, (q31_t)0x82936316,
-	(q31_t)0xE6737319, (q31_t)0x829D753A, (q31_t)0xE642340D,
-	(q31_t)0x82A79AB3, (q31_t)0xE610F8F9, (q31_t)0x82B1D381,
-	(q31_t)0xE5DFC1E4, (q31_t)0x82BC1FA1, (q31_t)0xE5AE8ED8,
-	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82D0F1D5,
-	(q31_t)0xE54C34F3, (q31_t)0x82DB77E5, (q31_t)0xE51B0E2A,
-	(q31_t)0x82E61141, (q31_t)0xE4E9EB86, (q31_t)0x82F0BDE8,
-	(q31_t)0xE4B8CD10, (q31_t)0x82FB7DD8, (q31_t)0xE487B2CF,
-	(q31_t)0x8306510F, (q31_t)0xE4569CCB, (q31_t)0x8311378C,
-	(q31_t)0xE4258B0A, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
-	(q31_t)0x83273E52, (q31_t)0xE3C37473, (q31_t)0x83325E97,
-	(q31_t)0xE3926FAC, (q31_t)0x833D921A, (q31_t)0xE3616F47,
-	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835432D8,
-	(q31_t)0xE2FF7BC3, (q31_t)0x835FA00E, (q31_t)0xE2CE88B2,
-	(q31_t)0x836B207D, (q31_t)0xE29D9A22, (q31_t)0x8376B422,
-	(q31_t)0xE26CB01A, (q31_t)0x83825AFB, (q31_t)0xE23BCAA2,
-	(q31_t)0x838E1507, (q31_t)0xE20AE9C1, (q31_t)0x8399E244,
-	(q31_t)0xE1DA0D7E, (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1,
-	(q31_t)0x83B1B649, (q31_t)0xE17862F3, (q31_t)0x83BDBD0D,
-	(q31_t)0xE14794B9, (q31_t)0x83C9D6FB, (q31_t)0xE116CB3D,
-	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83E2444D,
-	(q31_t)0xE0B54698, (q31_t)0x83EE97AC, (q31_t)0xE0848B7F,
-	(q31_t)0x83FAFE2E, (q31_t)0xE053D541, (q31_t)0x840777CF,
-	(q31_t)0xE02323E5, (q31_t)0x8414048F, (q31_t)0xDFF27773,
-	(q31_t)0x8420A46B, (q31_t)0xDFC1CFF2, (q31_t)0x842D5761,
-	(q31_t)0xDF912D6A, (q31_t)0x843A1D70, (q31_t)0xDF608FE3,
-	(q31_t)0x8446F695, (q31_t)0xDF2FF764, (q31_t)0x8453E2CE,
-	(q31_t)0xDEFF63F4, (q31_t)0x8460E21A, (q31_t)0xDECED59B,
-	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x847B19E1,
-	(q31_t)0xDE6DC84B, (q31_t)0x84885257, (q31_t)0xDE3D4963,
-	(q31_t)0x84959DD9, (q31_t)0xDE0CCFB1, (q31_t)0x84A2FC62,
-	(q31_t)0xDDDC5B3A, (q31_t)0x84B06DF1, (q31_t)0xDDABEC07,
-	(q31_t)0x84BDF285, (q31_t)0xDD7B8220, (q31_t)0x84CB8A1B,
-	(q31_t)0xDD4B1D8B, (q31_t)0x84D934B0, (q31_t)0xDD1ABE51,
-	(q31_t)0x84E6F244, (q31_t)0xDCEA6478, (q31_t)0x84F4C2D3,
-	(q31_t)0xDCBA1008, (q31_t)0x8502A65C, (q31_t)0xDC89C108,
-	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x851EA652,
-	(q31_t)0xDC293379, (q31_t)0x852CC2BA, (q31_t)0xDBF8F4F8,
-	(q31_t)0x853AF214, (q31_t)0xDBC8BC05, (q31_t)0x8549345C,
-	(q31_t)0xDB9888A8, (q31_t)0x85578991, (q31_t)0xDB685AE8,
-	(q31_t)0x8565F1B0, (q31_t)0xDB3832CD, (q31_t)0x85746CB7,
-	(q31_t)0xDB08105E, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
-	(q31_t)0x85919B75, (q31_t)0xDAA7DCA1, (q31_t)0x85A04F28,
-	(q31_t)0xDA77CB62, (q31_t)0x85AF15B9, (q31_t)0xDA47BFED,
-	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85CCDB70,
-	(q31_t)0xD9E7BA7E, (q31_t)0x85DBDA91, (q31_t)0xD9B7C093,
-	(q31_t)0x85EAEC88, (q31_t)0xD987CC8F, (q31_t)0x85FA1152,
-	(q31_t)0xD957DE7A, (q31_t)0x860948EE, (q31_t)0xD927F65B,
-	(q31_t)0x86189359, (q31_t)0xD8F81439, (q31_t)0x8627F090,
-	(q31_t)0xD8C8381C, (q31_t)0x86376092, (q31_t)0xD898620C,
-	(q31_t)0x8646E35B, (q31_t)0xD868920F, (q31_t)0x865678EA,
-	(q31_t)0xD838C82D, (q31_t)0x8666213C, (q31_t)0xD809046D,
-	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x8685AA1F,
-	(q31_t)0xD7A98F73, (q31_t)0x86958AAB, (q31_t)0xD779DE46,
-	(q31_t)0x86A57DF1, (q31_t)0xD74A335A, (q31_t)0x86B583EE,
-	(q31_t)0xD71A8EB5, (q31_t)0x86C59C9F, (q31_t)0xD6EAF05E,
-	(q31_t)0x86D5C802, (q31_t)0xD6BB585D, (q31_t)0x86E60614,
-	(q31_t)0xD68BC6BA, (q31_t)0x86F656D3, (q31_t)0xD65C3B7B,
-	(q31_t)0x8706BA3C, (q31_t)0xD62CB6A7, (q31_t)0x8717304E,
-	(q31_t)0xD5FD3847, (q31_t)0x8727B904, (q31_t)0xD5CDC062,
-	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x87490257,
-	(q31_t)0xD56EE424, (q31_t)0x8759C2EF, (q31_t)0xD53F7FDA,
-	(q31_t)0x876A9621, (q31_t)0xD5102227, (q31_t)0x877B7BEC,
-	(q31_t)0xD4E0CB14, (q31_t)0x878C744C, (q31_t)0xD4B17AA7,
-	(q31_t)0x879D7F40, (q31_t)0xD48230E8, (q31_t)0x87AE9CC5,
-	(q31_t)0xD452EDDE, (q31_t)0x87BFCCD7, (q31_t)0xD423B190,
-	(q31_t)0x87D10F75, (q31_t)0xD3F47C06, (q31_t)0x87E2649B,
-	(q31_t)0xD3C54D46, (q31_t)0x87F3CC47, (q31_t)0xD3962559,
-	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8816D327,
-	(q31_t)0xD337EA12, (q31_t)0x88287255, (q31_t)0xD308D6C6,
-	(q31_t)0x883A23FE, (q31_t)0xD2D9CA6A, (q31_t)0x884BE820,
-	(q31_t)0xD2AAC504, (q31_t)0x885DBEB7, (q31_t)0xD27BC69C,
-	(q31_t)0x886FA7C2, (q31_t)0xD24CCF38, (q31_t)0x8881A33C,
-	(q31_t)0xD21DDEE1, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
-	(q31_t)0x88A5D177, (q31_t)0xD1C01374, (q31_t)0x88B80431,
-	(q31_t)0xD191386D, (q31_t)0x88CA4951, (q31_t)0xD162648F,
-	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x88EF0AB4,
-	(q31_t)0xD104D26B, (q31_t)0x890186F1, (q31_t)0xD0D61433,
-	(q31_t)0x89141589, (q31_t)0xD0A75D42, (q31_t)0x8926B677,
-	(q31_t)0xD078AD9D, (q31_t)0x893969B9, (q31_t)0xD04A054D,
-	(q31_t)0x894C2F4C, (q31_t)0xD01B6459, (q31_t)0x895F072D,
-	(q31_t)0xCFECCAC7, (q31_t)0x8971F15A, (q31_t)0xCFBE389F,
-	(q31_t)0x8984EDCF, (q31_t)0xCF8FADE8, (q31_t)0x8997FC89,
-	(q31_t)0xCF612AAA, (q31_t)0x89AB1D86, (q31_t)0xCF32AEEB,
-	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89D1963C,
-	(q31_t)0xCED5CE08, (q31_t)0x89E4EDEE, (q31_t)0xCEA768F2,
-	(q31_t)0x89F857D8, (q31_t)0xCE790B78, (q31_t)0x8A0BD3F5,
-	(q31_t)0xCE4AB5A2, (q31_t)0x8A1F6242, (q31_t)0xCE1C6776,
-	(q31_t)0x8A3302BD, (q31_t)0xCDEE20FC, (q31_t)0x8A46B563,
-	(q31_t)0xCDBFE23A, (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38,
-	(q31_t)0x8A6E5122, (q31_t)0xCD637BFD, (q31_t)0x8A823A35,
-	(q31_t)0xCD355490, (q31_t)0x8A963567, (q31_t)0xCD0734F8,
-	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8ABE6219,
-	(q31_t)0xCCAB0D65, (q31_t)0x8AD29393, (q31_t)0xCC7D0577,
-	(q31_t)0x8AE6D71F, (q31_t)0xCC4F057B, (q31_t)0x8AFB2CBA,
-	(q31_t)0xCC210D78, (q31_t)0x8B0F9461, (q31_t)0xCBF31D75,
-	(q31_t)0x8B240E10, (q31_t)0xCBC53578, (q31_t)0x8B3899C5,
-	(q31_t)0xCB975589, (q31_t)0x8B4D377C, (q31_t)0xCB697DB0,
-	(q31_t)0x8B61E732, (q31_t)0xCB3BADF2, (q31_t)0x8B76A8E4,
-	(q31_t)0xCB0DE658, (q31_t)0x8B8B7C8F, (q31_t)0xCAE026E8,
-	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BB559C1,
-	(q31_t)0xCA84C0A2, (q31_t)0x8BCA6342, (q31_t)0xCA5719DB,
-	(q31_t)0x8BDF7EAF, (q31_t)0xCA297B5A, (q31_t)0x8BF4AC05,
-	(q31_t)0xC9FBE527, (q31_t)0x8C09EB40, (q31_t)0xC9CE5748,
-	(q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4, (q31_t)0x8C349F58,
-	(q31_t)0xC97354A3, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
-	(q31_t)0x8C5F9ADD, (q31_t)0xC91873A5, (q31_t)0x8C753361,
-	(q31_t)0xC8EB0FD6, (q31_t)0x8C8ADDB6, (q31_t)0xC8BDB485,
-	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CB667C7,
-	(q31_t)0xC863177B, (q31_t)0x8CCC477D, (q31_t)0xC835D5D0,
-	(q31_t)0x8CE238F6, (q31_t)0xC8089CBF, (q31_t)0x8CF83C30,
-	(q31_t)0xC7DB6C50, (q31_t)0x8D0E5127, (q31_t)0xC7AE4489,
-	(q31_t)0x8D2477D8, (q31_t)0xC7812571, (q31_t)0x8D3AB03F,
-	(q31_t)0xC7540F10, (q31_t)0x8D50FA59, (q31_t)0xC727016C,
-	(q31_t)0x8D675623, (q31_t)0xC6F9FC8D, (q31_t)0x8D7DC399,
-	(q31_t)0xC6CD0079, (q31_t)0x8D9442B7, (q31_t)0xC6A00D36,
-	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DC175E0,
-	(q31_t)0xC6464144, (q31_t)0x8DD829E4, (q31_t)0xC61968A2,
-	(q31_t)0x8DEEEF82, (q31_t)0xC5EC98ED, (q31_t)0x8E05C6B7,
-	(q31_t)0xC5BFD22E, (q31_t)0x8E1CAF80, (q31_t)0xC593146A,
-	(q31_t)0x8E33A9D9, (q31_t)0xC5665FA8, (q31_t)0x8E4AB5BF,
-	(q31_t)0xC539B3F0, (q31_t)0x8E61D32D, (q31_t)0xC50D1148,
-	(q31_t)0x8E790222, (q31_t)0xC4E077B8, (q31_t)0x8E904298,
-	(q31_t)0xC4B3E746, (q31_t)0x8EA7948C, (q31_t)0xC4875FF8,
-	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8ED66CE1,
-	(q31_t)0xC42E6CE8, (q31_t)0x8EEDF33B, (q31_t)0xC4020132,
-	(q31_t)0x8F058B04, (q31_t)0xC3D59EBD, (q31_t)0x8F1D343A,
-	(q31_t)0xC3A9458F, (q31_t)0x8F34EED8, (q31_t)0xC37CF5B0,
-	(q31_t)0x8F4CBADB, (q31_t)0xC350AF25, (q31_t)0x8F64983F,
-	(q31_t)0xC32471F6, (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A,
-	(q31_t)0x8F94871D, (q31_t)0xC2CC13C7, (q31_t)0x8FAC988E,
-	(q31_t)0xC29FF2D4, (q31_t)0x8FC4BB53, (q31_t)0xC273DB58,
-	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x8FF534C4,
-	(q31_t)0xC21BC8E0, (q31_t)0x900D8B69, (q31_t)0xC1EFCDF2,
-	(q31_t)0x9025F352, (q31_t)0xC1C3DC96, (q31_t)0x903E6C7A,
-	(q31_t)0xC197F4D3, (q31_t)0x9056F6DF, (q31_t)0xC16C16B0,
-	(q31_t)0x906F927B, (q31_t)0xC1404233, (q31_t)0x90883F4C,
-	(q31_t)0xC1147763, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
-	(q31_t)0x90B9CC7C, (q31_t)0xC0BCFEE7, (q31_t)0x90D2ACD3,
-	(q31_t)0xC0915147, (q31_t)0x90EB9E50, (q31_t)0xC065AD70,
-	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x911DB4A8,
-	(q31_t)0xC00E8335, (q31_t)0x9136D97D, (q31_t)0xBFE2FCDF,
-	(q31_t)0x91500F67, (q31_t)0xBFB7806C, (q31_t)0x91695663,
-	(q31_t)0xBF8C0DE2, (q31_t)0x9182AE6C, (q31_t)0xBF60A54A,
-	(q31_t)0x919C1780, (q31_t)0xBF3546A8, (q31_t)0x91B5919A,
-	(q31_t)0xBF09F204, (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765,
-	(q31_t)0x91E8B8D0, (q31_t)0xBEB366D1, (q31_t)0x920265E4,
-	(q31_t)0xBE88304F, (q31_t)0x921C23EE, (q31_t)0xBE5D03E5,
-	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x924FD2D6,
-	(q31_t)0xBE06C977, (q31_t)0x9269C3AC, (q31_t)0xBDDBBB7F,
-	(q31_t)0x9283C567, (q31_t)0xBDB0B7BA, (q31_t)0x929DD805,
-	(q31_t)0xBD85BE2F, (q31_t)0x92B7FB82, (q31_t)0xBD5ACEE5,
-	(q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1, (q31_t)0x92EC7505,
-	(q31_t)0xBD050F2C, (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA,
-	(q31_t)0x932131D1, (q31_t)0xBCAF78C3, (q31_t)0x933BA968,
-	(q31_t)0xBC84BD1E, (q31_t)0x935631C5, (q31_t)0xBC5A0BE1,
-	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x938B74C0,
-	(q31_t)0xBC04C8BA, (q31_t)0x93A62F56, (q31_t)0xBBDA36DC,
-	(q31_t)0x93C0FAA2, (q31_t)0xBBAFAF81, (q31_t)0x93DBD69F,
-	(q31_t)0xBB8532AF, (q31_t)0x93F6C34A, (q31_t)0xBB5AC06C,
-	(q31_t)0x9411C09D, (q31_t)0xBB3058C0, (q31_t)0x942CCE95,
-	(q31_t)0xBB05FBB0, (q31_t)0x9447ED2F, (q31_t)0xBADBA943,
-	(q31_t)0x94631C64, (q31_t)0xBAB1617F, (q31_t)0x947E5C32,
-	(q31_t)0xBA87246C, (q31_t)0x9499AC95, (q31_t)0xBA5CF210,
-	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94D07F05,
-	(q31_t)0xBA08AD94, (q31_t)0x94EC010B, (q31_t)0xB9DE9B83,
-	(q31_t)0x95079393, (q31_t)0xB9B49442, (q31_t)0x9523369B,
-	(q31_t)0xB98A97D8, (q31_t)0x953EEA1E, (q31_t)0xB960A64B,
-	(q31_t)0x955AAE17, (q31_t)0xB936BFA3, (q31_t)0x95768282,
-	(q31_t)0xB90CE3E6, (q31_t)0x9592675B, (q31_t)0xB8E31319,
-	(q31_t)0x95AE5C9E, (q31_t)0xB8B94D44, (q31_t)0x95CA6246,
-	(q31_t)0xB88F926C, (q31_t)0x95E6784F, (q31_t)0xB865E299,
-	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x961ED573,
-	(q31_t)0xB812A419, (q31_t)0x963B1C85, (q31_t)0xB7E9157A,
-	(q31_t)0x965773E7, (q31_t)0xB7BF91F8, (q31_t)0x9673DB94,
-	(q31_t)0xB796199B, (q31_t)0x96905387, (q31_t)0xB76CAC68,
-	(q31_t)0x96ACDBBD, (q31_t)0xB7434A67, (q31_t)0x96C97431,
-	(q31_t)0xB719F39D, (q31_t)0x96E61CDF, (q31_t)0xB6F0A811,
-	(q31_t)0x9702D5C2, (q31_t)0xB6C767CA, (q31_t)0x971F9ED6,
-	(q31_t)0xB69E32CD, (q31_t)0x973C7816, (q31_t)0xB6750921,
-	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97765B0A,
-	(q31_t)0xB622D7D5, (q31_t)0x979364B5, (q31_t)0xB5F9D042,
-	(q31_t)0x97B07E7A, (q31_t)0xB5D0D41A, (q31_t)0x97CDA855,
-	(q31_t)0xB5A7E362, (q31_t)0x97EAE241, (q31_t)0xB57EFE21,
-	(q31_t)0x98082C3B, (q31_t)0xB556245E, (q31_t)0x9825863D,
-	(q31_t)0xB52D561E, (q31_t)0x9842F043, (q31_t)0xB5049368,
-	(q31_t)0x98606A48, (q31_t)0xB4DBDC42, (q31_t)0x987DF449,
-	(q31_t)0xB4B330B2, (q31_t)0x989B8E3F, (q31_t)0xB48A90C0,
-	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98D6F1FE,
-	(q31_t)0xB43973C9, (q31_t)0x98F4BBBC, (q31_t)0xB410F6D2,
-	(q31_t)0x9912955E, (q31_t)0xB3E88591, (q31_t)0x99307EE0,
-	(q31_t)0xB3C0200C, (q31_t)0x994E783C, (q31_t)0xB397C649,
-	(q31_t)0x996C816F, (q31_t)0xB36F784E, (q31_t)0x998A9A73,
-	(q31_t)0xB3473622, (q31_t)0x99A8C344, (q31_t)0xB31EFFCB,
-	(q31_t)0x99C6FBDE, (q31_t)0xB2F6D54F, (q31_t)0x99E5443A,
-	(q31_t)0xB2CEB6B5, (q31_t)0x9A039C56, (q31_t)0xB2A6A401,
-	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A407BB8,
-	(q31_t)0xB256A26A, (q31_t)0x9A5F02F5, (q31_t)0xB22EB392,
-	(q31_t)0x9A7D99DD, (q31_t)0xB206D0BA, (q31_t)0x9A9C406D,
-	(q31_t)0xB1DEF9E8, (q31_t)0x9ABAF6A0, (q31_t)0xB1B72F23,
-	(q31_t)0x9AD9BC71, (q31_t)0xB18F7070, (q31_t)0x9AF891DB,
-	(q31_t)0xB167BDD6, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
-	(q31_t)0x9B366B67, (q31_t)0xB1187D05, (q31_t)0x9B556F80,
-	(q31_t)0xB0F0EEDA, (q31_t)0x9B748320, (q31_t)0xB0C96CDF,
-	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BB2D8DD,
-	(q31_t)0xB07A8D97, (q31_t)0x9BD21AF2, (q31_t)0xB0533055,
-	(q31_t)0x9BF16C7A, (q31_t)0xB02BDF5C, (q31_t)0x9C10CD70,
-	(q31_t)0xB0049AB2, (q31_t)0x9C303DCF, (q31_t)0xAFDD625F,
-	(q31_t)0x9C4FBD92, (q31_t)0xAFB63667, (q31_t)0x9C6F4CB5,
-	(q31_t)0xAF8F16D0, (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1,
-	(q31_t)0x9CAE9907, (q31_t)0xAF40FCE0, (q31_t)0x9CCE562B,
-	(q31_t)0xAF1A0293, (q31_t)0x9CEE229C, (q31_t)0xAEF314BF,
-	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D2DE94D,
-	(q31_t)0xAEA55E9D, (q31_t)0x9D4DE384, (q31_t)0xAE7E965B,
-	(q31_t)0x9D6DECF4, (q31_t)0xAE57DAAA, (q31_t)0x9D8E0596,
-	(q31_t)0xAE312B91, (q31_t)0x9DAE2D68, (q31_t)0xAE0A8916,
-	(q31_t)0x9DCE6462, (q31_t)0xADE3F33E, (q31_t)0x9DEEAA82,
-	(q31_t)0xADBD6A10, (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91,
-	(q31_t)0x9E2F641A, (q31_t)0xAD707DC8, (q31_t)0x9E4FD789,
-	(q31_t)0xAD4A1ABA, (q31_t)0x9E705A09, (q31_t)0xAD23C46D,
-	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9EB18C26,
-	(q31_t)0xACD73E30, (q31_t)0x9ED23BB9, (q31_t)0xACB10E4A,
-	(q31_t)0x9EF2FA48, (q31_t)0xAC8AEB3E, (q31_t)0x9F13C7D0,
-	(q31_t)0xAC64D510, (q31_t)0x9F34A449, (q31_t)0xAC3ECBC7,
-	(q31_t)0x9F558FB0, (q31_t)0xAC18CF68, (q31_t)0x9F7689FF,
-	(q31_t)0xABF2DFFA, (q31_t)0x9F979331, (q31_t)0xABCCFD82,
-	(q31_t)0x9FB8AB41, (q31_t)0xABA72806, (q31_t)0x9FD9D22A,
-	(q31_t)0xAB815F8C, (q31_t)0x9FFB07E7, (q31_t)0xAB5BA41A,
-	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA03D9FC7,
-	(q31_t)0xAB105464, (q31_t)0xA05F01E1, (q31_t)0xAAEAC02B,
-	(q31_t)0xA08072BA, (q31_t)0xAAC53912, (q31_t)0xA0A1F24C,
-	(q31_t)0xAA9FBF1D, (q31_t)0xA0C38094, (q31_t)0xAA7A5253,
-	(q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9, (q31_t)0xA106C92E,
-	(q31_t)0xAA2FA055, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
-	(q31_t)0xA14A4C5E, (q31_t)0xA9E52347, (q31_t)0xA16C23E1,
-	(q31_t)0xA9BFF8A8, (q31_t)0xA18E09F9, (q31_t)0xA99ADB56,
-	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1D201D7,
-	(q31_t)0xA950C8AF, (q31_t)0xA1F41391, (q31_t)0xA92BD366,
-	(q31_t)0xA21633CD, (q31_t)0xA906EB81, (q31_t)0xA2386283,
-	(q31_t)0xA8E21106, (q31_t)0xA25A9FB1, (q31_t)0xA8BD43FA,
-	(q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA29F4559,
-	(q31_t)0xA873D246, (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9,
-	(q31_t)0xA2E4249A, (q31_t)0xA82A9693, (q31_t)0xA306A9C7,
-	(q31_t)0xA8060D08, (q31_t)0xA3293D4B, (q31_t)0xA7E1910E,
-	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA36E8F40,
-	(q31_t)0xA798C1E4, (q31_t)0xA3914DA7, (q31_t)0xA7746EC0,
-	(q31_t)0xA3B41A4F, (q31_t)0xA7502943, (q31_t)0xA3D6F533,
-	(q31_t)0xA72BF173, (q31_t)0xA3F9DE4D, (q31_t)0xA707C756,
-	(q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA43FDB0F,
-	(q31_t)0xA6BF9C4B, (q31_t)0xA462EEAC, (q31_t)0xA69B9B68,
-	(q31_t)0xA4861069, (q31_t)0xA677A84E, (q31_t)0xA4A94042,
-	(q31_t)0xA653C302, (q31_t)0xA4CC7E31, (q31_t)0xA62FEB8B,
-	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA513243B,
-	(q31_t)0xA5E8662F, (q31_t)0xA5368C4B, (q31_t)0xA5C4B855,
-	(q31_t)0xA55A025B, (q31_t)0xA5A11865, (q31_t)0xA57D8666,
-	(q31_t)0xA57D8666, (q31_t)0xA5A11865, (q31_t)0xA55A025B,
-	(q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA5E8662F,
-	(q31_t)0xA513243B, (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31,
-	(q31_t)0xA62FEB8B, (q31_t)0xA4CC7E31, (q31_t)0xA653C302,
-	(q31_t)0xA4A94042, (q31_t)0xA677A84E, (q31_t)0xA4861069,
-	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6BF9C4B,
-	(q31_t)0xA43FDB0F, (q31_t)0xA6E3AAF2, (q31_t)0xA41CD598,
-	(q31_t)0xA707C756, (q31_t)0xA3F9DE4D, (q31_t)0xA72BF173,
-	(q31_t)0xA3D6F533, (q31_t)0xA7502943, (q31_t)0xA3B41A4F,
-	(q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA798C1E4,
-	(q31_t)0xA36E8F40, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
-	(q31_t)0xA7E1910E, (q31_t)0xA3293D4B, (q31_t)0xA8060D08,
-	(q31_t)0xA306A9C7, (q31_t)0xA82A9693, (q31_t)0xA2E4249A,
-	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA873D246,
-	(q31_t)0xA29F4559, (q31_t)0xA8988463, (q31_t)0xA27CEB4F,
-	(q31_t)0xA8BD43FA, (q31_t)0xA25A9FB1, (q31_t)0xA8E21106,
-	(q31_t)0xA2386283, (q31_t)0xA906EB81, (q31_t)0xA21633CD,
-	(q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA950C8AF,
-	(q31_t)0xA1D201D7, (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2,
-	(q31_t)0xA99ADB56, (q31_t)0xA18E09F9, (q31_t)0xA9BFF8A8,
-	(q31_t)0xA16C23E1, (q31_t)0xA9E52347, (q31_t)0xA14A4C5E,
-	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA2FA055,
-	(q31_t)0xA106C92E, (q31_t)0xAA54F2B9, (q31_t)0xA0E51D8C,
-	(q31_t)0xAA7A5253, (q31_t)0xA0C38094, (q31_t)0xAA9FBF1D,
-	(q31_t)0xA0A1F24C, (q31_t)0xAAC53912, (q31_t)0xA08072BA,
-	(q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB105464,
-	(q31_t)0xA03D9FC7, (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72,
-	(q31_t)0xAB5BA41A, (q31_t)0x9FFB07E7, (q31_t)0xAB815F8C,
-	(q31_t)0x9FD9D22A, (q31_t)0xABA72806, (q31_t)0x9FB8AB41,
-	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xABF2DFFA,
-	(q31_t)0x9F7689FF, (q31_t)0xAC18CF68, (q31_t)0x9F558FB0,
-	(q31_t)0xAC3ECBC7, (q31_t)0x9F34A449, (q31_t)0xAC64D510,
-	(q31_t)0x9F13C7D0, (q31_t)0xAC8AEB3E, (q31_t)0x9EF2FA48,
-	(q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACD73E30,
-	(q31_t)0x9EB18C26, (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94,
-	(q31_t)0xAD23C46D, (q31_t)0x9E705A09, (q31_t)0xAD4A1ABA,
-	(q31_t)0x9E4FD789, (q31_t)0xAD707DC8, (q31_t)0x9E2F641A,
-	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADBD6A10,
-	(q31_t)0x9DEEAA82, (q31_t)0xADE3F33E, (q31_t)0x9DCE6462,
-	(q31_t)0xAE0A8916, (q31_t)0x9DAE2D68, (q31_t)0xAE312B91,
-	(q31_t)0x9D8E0596, (q31_t)0xAE57DAAA, (q31_t)0x9D6DECF4,
-	(q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAEA55E9D,
-	(q31_t)0x9D2DE94D, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
-	(q31_t)0xAEF314BF, (q31_t)0x9CEE229C, (q31_t)0xAF1A0293,
-	(q31_t)0x9CCE562B, (q31_t)0xAF40FCE0, (q31_t)0x9CAE9907,
-	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAF8F16D0,
-	(q31_t)0x9C6F4CB5, (q31_t)0xAFB63667, (q31_t)0x9C4FBD92,
-	(q31_t)0xAFDD625F, (q31_t)0x9C303DCF, (q31_t)0xB0049AB2,
-	(q31_t)0x9C10CD70, (q31_t)0xB02BDF5C, (q31_t)0x9BF16C7A,
-	(q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB07A8D97,
-	(q31_t)0x9BB2D8DD, (q31_t)0xB0A1F71C, (q31_t)0x9B93A640,
-	(q31_t)0xB0C96CDF, (q31_t)0x9B748320, (q31_t)0xB0F0EEDA,
-	(q31_t)0x9B556F80, (q31_t)0xB1187D05, (q31_t)0x9B366B67,
-	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB167BDD6,
-	(q31_t)0x9AF891DB, (q31_t)0xB18F7070, (q31_t)0x9AD9BC71,
-	(q31_t)0xB1B72F23, (q31_t)0x9ABAF6A0, (q31_t)0xB1DEF9E8,
-	(q31_t)0x9A9C406D, (q31_t)0xB206D0BA, (q31_t)0x9A7D99DD,
-	(q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB256A26A,
-	(q31_t)0x9A407BB8, (q31_t)0xB27E9D3B, (q31_t)0x9A22042C,
-	(q31_t)0xB2A6A401, (q31_t)0x9A039C56, (q31_t)0xB2CEB6B5,
-	(q31_t)0x99E5443A, (q31_t)0xB2F6D54F, (q31_t)0x99C6FBDE,
-	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB3473622,
-	(q31_t)0x998A9A73, (q31_t)0xB36F784E, (q31_t)0x996C816F,
-	(q31_t)0xB397C649, (q31_t)0x994E783C, (q31_t)0xB3C0200C,
-	(q31_t)0x99307EE0, (q31_t)0xB3E88591, (q31_t)0x9912955E,
-	(q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB43973C9,
-	(q31_t)0x98D6F1FE, (q31_t)0xB461FC70, (q31_t)0x98B93828,
-	(q31_t)0xB48A90C0, (q31_t)0x989B8E3F, (q31_t)0xB4B330B2,
-	(q31_t)0x987DF449, (q31_t)0xB4DBDC42, (q31_t)0x98606A48,
-	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB52D561E,
-	(q31_t)0x9825863D, (q31_t)0xB556245E, (q31_t)0x98082C3B,
-	(q31_t)0xB57EFE21, (q31_t)0x97EAE241, (q31_t)0xB5A7E362,
-	(q31_t)0x97CDA855, (q31_t)0xB5D0D41A, (q31_t)0x97B07E7A,
-	(q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB622D7D5,
-	(q31_t)0x97765B0A, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
-	(q31_t)0xB6750921, (q31_t)0x973C7816, (q31_t)0xB69E32CD,
-	(q31_t)0x971F9ED6, (q31_t)0xB6C767CA, (q31_t)0x9702D5C2,
-	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB719F39D,
-	(q31_t)0x96C97431, (q31_t)0xB7434A67, (q31_t)0x96ACDBBD,
-	(q31_t)0xB76CAC68, (q31_t)0x96905387, (q31_t)0xB796199B,
-	(q31_t)0x9673DB94, (q31_t)0xB7BF91F8, (q31_t)0x965773E7,
-	(q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB812A419,
-	(q31_t)0x961ED573, (q31_t)0xB83C3DD1, (q31_t)0x96029EB5,
-	(q31_t)0xB865E299, (q31_t)0x95E6784F, (q31_t)0xB88F926C,
-	(q31_t)0x95CA6246, (q31_t)0xB8B94D44, (q31_t)0x95AE5C9E,
-	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB90CE3E6,
-	(q31_t)0x95768282, (q31_t)0xB936BFA3, (q31_t)0x955AAE17,
-	(q31_t)0xB960A64B, (q31_t)0x953EEA1E, (q31_t)0xB98A97D8,
-	(q31_t)0x9523369B, (q31_t)0xB9B49442, (q31_t)0x95079393,
-	(q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA08AD94,
-	(q31_t)0x94D07F05, (q31_t)0xBA32CA70, (q31_t)0x94B50D87,
-	(q31_t)0xBA5CF210, (q31_t)0x9499AC95, (q31_t)0xBA87246C,
-	(q31_t)0x947E5C32, (q31_t)0xBAB1617F, (q31_t)0x94631C64,
-	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB05FBB0,
-	(q31_t)0x942CCE95, (q31_t)0xBB3058C0, (q31_t)0x9411C09D,
-	(q31_t)0xBB5AC06C, (q31_t)0x93F6C34A, (q31_t)0xBB8532AF,
-	(q31_t)0x93DBD69F, (q31_t)0xBBAFAF81, (q31_t)0x93C0FAA2,
-	(q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC04C8BA,
-	(q31_t)0x938B74C0, (q31_t)0xBC2F6513, (q31_t)0x9370CAE4,
-	(q31_t)0xBC5A0BE1, (q31_t)0x935631C5, (q31_t)0xBC84BD1E,
-	(q31_t)0x933BA968, (q31_t)0xBCAF78C3, (q31_t)0x932131D1,
-	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD050F2C,
-	(q31_t)0x92EC7505, (q31_t)0xBD2FE9E1, (q31_t)0x92D22FD8,
-	(q31_t)0xBD5ACEE5, (q31_t)0x92B7FB82, (q31_t)0xBD85BE2F,
-	(q31_t)0x929DD805, (q31_t)0xBDB0B7BA, (q31_t)0x9283C567,
-	(q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE06C977,
-	(q31_t)0x924FD2D6, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
-	(q31_t)0xBE5D03E5, (q31_t)0x921C23EE, (q31_t)0xBE88304F,
-	(q31_t)0x920265E4, (q31_t)0xBEB366D1, (q31_t)0x91E8B8D0,
-	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF09F204,
-	(q31_t)0x91B5919A, (q31_t)0xBF3546A8, (q31_t)0x919C1780,
-	(q31_t)0xBF60A54A, (q31_t)0x9182AE6C, (q31_t)0xBF8C0DE2,
-	(q31_t)0x91695663, (q31_t)0xBFB7806C, (q31_t)0x91500F67,
-	(q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC00E8335,
-	(q31_t)0x911DB4A8, (q31_t)0xC03A1368, (q31_t)0x9104A0ED,
-	(q31_t)0xC065AD70, (q31_t)0x90EB9E50, (q31_t)0xC0915147,
-	(q31_t)0x90D2ACD3, (q31_t)0xC0BCFEE7, (q31_t)0x90B9CC7C,
-	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1147763,
-	(q31_t)0x90883F4C, (q31_t)0xC1404233, (q31_t)0x906F927B,
-	(q31_t)0xC16C16B0, (q31_t)0x9056F6DF, (q31_t)0xC197F4D3,
-	(q31_t)0x903E6C7A, (q31_t)0xC1C3DC96, (q31_t)0x9025F352,
-	(q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC21BC8E0,
-	(q31_t)0x8FF534C4, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66,
-	(q31_t)0xC273DB58, (q31_t)0x8FC4BB53, (q31_t)0xC29FF2D4,
-	(q31_t)0x8FAC988E, (q31_t)0xC2CC13C7, (q31_t)0x8F94871D,
-	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC32471F6,
-	(q31_t)0x8F64983F, (q31_t)0xC350AF25, (q31_t)0x8F4CBADB,
-	(q31_t)0xC37CF5B0, (q31_t)0x8F34EED8, (q31_t)0xC3A9458F,
-	(q31_t)0x8F1D343A, (q31_t)0xC3D59EBD, (q31_t)0x8F058B04,
-	(q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC42E6CE8,
-	(q31_t)0x8ED66CE1, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB,
-	(q31_t)0xC4875FF8, (q31_t)0x8EA7948C, (q31_t)0xC4B3E746,
-	(q31_t)0x8E904298, (q31_t)0xC4E077B8, (q31_t)0x8E790222,
-	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC539B3F0,
-	(q31_t)0x8E4AB5BF, (q31_t)0xC5665FA8, (q31_t)0x8E33A9D9,
-	(q31_t)0xC593146A, (q31_t)0x8E1CAF80, (q31_t)0xC5BFD22E,
-	(q31_t)0x8E05C6B7, (q31_t)0xC5EC98ED, (q31_t)0x8DEEEF82,
-	(q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC6464144,
-	(q31_t)0x8DC175E0, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
-	(q31_t)0xC6A00D36, (q31_t)0x8D9442B7, (q31_t)0xC6CD0079,
-	(q31_t)0x8D7DC399, (q31_t)0xC6F9FC8D, (q31_t)0x8D675623,
-	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7540F10,
-	(q31_t)0x8D3AB03F, (q31_t)0xC7812571, (q31_t)0x8D2477D8,
-	(q31_t)0xC7AE4489, (q31_t)0x8D0E5127, (q31_t)0xC7DB6C50,
-	(q31_t)0x8CF83C30, (q31_t)0xC8089CBF, (q31_t)0x8CE238F6,
-	(q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC863177B,
-	(q31_t)0x8CB667C7, (q31_t)0xC89061BA, (q31_t)0x8CA099D9,
-	(q31_t)0xC8BDB485, (q31_t)0x8C8ADDB6, (q31_t)0xC8EB0FD6,
-	(q31_t)0x8C753361, (q31_t)0xC91873A5, (q31_t)0x8C5F9ADD,
-	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC97354A3,
-	(q31_t)0x8C349F58, (q31_t)0xC9A0D1C4, (q31_t)0x8C1F3C5C,
-	(q31_t)0xC9CE5748, (q31_t)0x8C09EB40, (q31_t)0xC9FBE527,
-	(q31_t)0x8BF4AC05, (q31_t)0xCA297B5A, (q31_t)0x8BDF7EAF,
-	(q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCA84C0A2,
-	(q31_t)0x8BB559C1, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F,
-	(q31_t)0xCAE026E8, (q31_t)0x8B8B7C8F, (q31_t)0xCB0DE658,
-	(q31_t)0x8B76A8E4, (q31_t)0xCB3BADF2, (q31_t)0x8B61E732,
-	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCB975589,
-	(q31_t)0x8B3899C5, (q31_t)0xCBC53578, (q31_t)0x8B240E10,
-	(q31_t)0xCBF31D75, (q31_t)0x8B0F9461, (q31_t)0xCC210D78,
-	(q31_t)0x8AFB2CBA, (q31_t)0xCC4F057B, (q31_t)0x8AE6D71F,
-	(q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCAB0D65,
-	(q31_t)0x8ABE6219, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4,
-	(q31_t)0xCD0734F8, (q31_t)0x8A963567, (q31_t)0xCD355490,
-	(q31_t)0x8A823A35, (q31_t)0xCD637BFD, (q31_t)0x8A6E5122,
-	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDBFE23A,
-	(q31_t)0x8A46B563, (q31_t)0xCDEE20FC, (q31_t)0x8A3302BD,
-	(q31_t)0xCE1C6776, (q31_t)0x8A1F6242, (q31_t)0xCE4AB5A2,
-	(q31_t)0x8A0BD3F5, (q31_t)0xCE790B78, (q31_t)0x89F857D8,
-	(q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCED5CE08,
-	(q31_t)0x89D1963C, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
-	(q31_t)0xCF32AEEB, (q31_t)0x89AB1D86, (q31_t)0xCF612AAA,
-	(q31_t)0x8997FC89, (q31_t)0xCF8FADE8, (q31_t)0x8984EDCF,
-	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xCFECCAC7,
-	(q31_t)0x895F072D, (q31_t)0xD01B6459, (q31_t)0x894C2F4C,
-	(q31_t)0xD04A054D, (q31_t)0x893969B9, (q31_t)0xD078AD9D,
-	(q31_t)0x8926B677, (q31_t)0xD0A75D42, (q31_t)0x89141589,
-	(q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD104D26B,
-	(q31_t)0x88EF0AB4, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3,
-	(q31_t)0xD162648F, (q31_t)0x88CA4951, (q31_t)0xD191386D,
-	(q31_t)0x88B80431, (q31_t)0xD1C01374, (q31_t)0x88A5D177,
-	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD21DDEE1,
-	(q31_t)0x8881A33C, (q31_t)0xD24CCF38, (q31_t)0x886FA7C2,
-	(q31_t)0xD27BC69C, (q31_t)0x885DBEB7, (q31_t)0xD2AAC504,
-	(q31_t)0x884BE820, (q31_t)0xD2D9CA6A, (q31_t)0x883A23FE,
-	(q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD337EA12,
-	(q31_t)0x8816D327, (q31_t)0xD3670445, (q31_t)0x88054677,
-	(q31_t)0xD3962559, (q31_t)0x87F3CC47, (q31_t)0xD3C54D46,
-	(q31_t)0x87E2649B, (q31_t)0xD3F47C06, (q31_t)0x87D10F75,
-	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD452EDDE,
-	(q31_t)0x87AE9CC5, (q31_t)0xD48230E8, (q31_t)0x879D7F40,
-	(q31_t)0xD4B17AA7, (q31_t)0x878C744C, (q31_t)0xD4E0CB14,
-	(q31_t)0x877B7BEC, (q31_t)0xD5102227, (q31_t)0x876A9621,
-	(q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD56EE424,
-	(q31_t)0x87490257, (q31_t)0xD59E4EFE, (q31_t)0x8738545E,
-	(q31_t)0xD5CDC062, (q31_t)0x8727B904, (q31_t)0xD5FD3847,
-	(q31_t)0x8717304E, (q31_t)0xD62CB6A7, (q31_t)0x8706BA3C,
-	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD68BC6BA,
-	(q31_t)0x86E60614, (q31_t)0xD6BB585D, (q31_t)0x86D5C802,
-	(q31_t)0xD6EAF05E, (q31_t)0x86C59C9F, (q31_t)0xD71A8EB5,
-	(q31_t)0x86B583EE, (q31_t)0xD74A335A, (q31_t)0x86A57DF1,
-	(q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7A98F73,
-	(q31_t)0x8685AA1F, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
-	(q31_t)0xD809046D, (q31_t)0x8666213C, (q31_t)0xD838C82D,
-	(q31_t)0x865678EA, (q31_t)0xD868920F, (q31_t)0x8646E35B,
-	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8C8381C,
-	(q31_t)0x8627F090, (q31_t)0xD8F81439, (q31_t)0x86189359,
-	(q31_t)0xD927F65B, (q31_t)0x860948EE, (q31_t)0xD957DE7A,
-	(q31_t)0x85FA1152, (q31_t)0xD987CC8F, (q31_t)0x85EAEC88,
-	(q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xD9E7BA7E,
-	(q31_t)0x85CCDB70, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27,
-	(q31_t)0xDA47BFED, (q31_t)0x85AF15B9, (q31_t)0xDA77CB62,
-	(q31_t)0x85A04F28, (q31_t)0xDAA7DCA1, (q31_t)0x85919B75,
-	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB08105E,
-	(q31_t)0x85746CB7, (q31_t)0xDB3832CD, (q31_t)0x8565F1B0,
-	(q31_t)0xDB685AE8, (q31_t)0x85578991, (q31_t)0xDB9888A8,
-	(q31_t)0x8549345C, (q31_t)0xDBC8BC05, (q31_t)0x853AF214,
-	(q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC293379,
-	(q31_t)0x851EA652, (q31_t)0xDC597781, (q31_t)0x85109CDC,
-	(q31_t)0xDC89C108, (q31_t)0x8502A65C, (q31_t)0xDCBA1008,
-	(q31_t)0x84F4C2D3, (q31_t)0xDCEA6478, (q31_t)0x84E6F244,
-	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD4B1D8B,
-	(q31_t)0x84CB8A1B, (q31_t)0xDD7B8220, (q31_t)0x84BDF285,
-	(q31_t)0xDDABEC07, (q31_t)0x84B06DF1, (q31_t)0xDDDC5B3A,
-	(q31_t)0x84A2FC62, (q31_t)0xDE0CCFB1, (q31_t)0x84959DD9,
-	(q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE6DC84B,
-	(q31_t)0x847B19E1, (q31_t)0xDE9E4C60, (q31_t)0x846DF476,
-	(q31_t)0xDECED59B, (q31_t)0x8460E21A, (q31_t)0xDEFF63F4,
-	(q31_t)0x8453E2CE, (q31_t)0xDF2FF764, (q31_t)0x8446F695,
-	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDF912D6A,
-	(q31_t)0x842D5761, (q31_t)0xDFC1CFF2, (q31_t)0x8420A46B,
-	(q31_t)0xDFF27773, (q31_t)0x8414048F, (q31_t)0xE02323E5,
-	(q31_t)0x840777CF, (q31_t)0xE053D541, (q31_t)0x83FAFE2E,
-	(q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0B54698,
-	(q31_t)0x83E2444D, (q31_t)0xE0E60684, (q31_t)0x83D60411,
-	(q31_t)0xE116CB3D, (q31_t)0x83C9D6FB, (q31_t)0xE14794B9,
-	(q31_t)0x83BDBD0D, (q31_t)0xE17862F3, (q31_t)0x83B1B649,
-	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE1DA0D7E,
-	(q31_t)0x8399E244, (q31_t)0xE20AE9C1, (q31_t)0x838E1507,
-	(q31_t)0xE23BCAA2, (q31_t)0x83825AFB, (q31_t)0xE26CB01A,
-	(q31_t)0x8376B422, (q31_t)0xE29D9A22, (q31_t)0x836B207D,
-	(q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE2FF7BC3,
-	(q31_t)0x835432D8, (q31_t)0xE330734C, (q31_t)0x8348D8DB,
-	(q31_t)0xE3616F47, (q31_t)0x833D921A, (q31_t)0xE3926FAC,
-	(q31_t)0x83325E97, (q31_t)0xE3C37473, (q31_t)0x83273E52,
-	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4258B0A,
-	(q31_t)0x8311378C, (q31_t)0xE4569CCB, (q31_t)0x8306510F,
-	(q31_t)0xE487B2CF, (q31_t)0x82FB7DD8, (q31_t)0xE4B8CD10,
-	(q31_t)0x82F0BDE8, (q31_t)0xE4E9EB86, (q31_t)0x82E61141,
-	(q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE54C34F3,
-	(q31_t)0x82D0F1D5, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13,
-	(q31_t)0xE5AE8ED8, (q31_t)0x82BC1FA1, (q31_t)0xE5DFC1E4,
-	(q31_t)0x82B1D381, (q31_t)0xE610F8F9, (q31_t)0x82A79AB3,
-	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6737319,
-	(q31_t)0x82936316, (q31_t)0xE6A4B616, (q31_t)0x8289644A,
-	(q31_t)0xE6D5FCFC, (q31_t)0x827F78D8, (q31_t)0xE70747C3,
-	(q31_t)0x8275A0C0, (q31_t)0xE7389664, (q31_t)0x826BDC04,
-	(q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE79B3F16,
-	(q31_t)0x82588CA6, (q31_t)0xE7CC9917, (q31_t)0x824F0208,
-	(q31_t)0xE7FDF6D3, (q31_t)0x82458ACB, (q31_t)0xE82F5844,
-	(q31_t)0x823C26F2, (q31_t)0xE860BD60, (q31_t)0x8232D67E,
-	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8C3927F,
-	(q31_t)0x82206FCB, (q31_t)0xE8F50273, (q31_t)0x8217598F,
-	(q31_t)0xE92675F4, (q31_t)0x820E56BE, (q31_t)0xE957ECFB,
-	(q31_t)0x82056758, (q31_t)0xE9896780, (q31_t)0x81FC8B60,
-	(q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xE9EC66E8,
-	(q31_t)0x81EB0DBD, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
-	(q31_t)0xEA4F73EE, (q31_t)0x81D9DDE1, (q31_t)0xEA80FF79,
-	(q31_t)0x81D16320, (q31_t)0xEAB28E55, (q31_t)0x81C8FBD5,
-	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB15B5E0,
-	(q31_t)0x81B867A4, (q31_t)0xEB474E80, (q31_t)0x81B03AC1,
-	(q31_t)0xEB78EA52, (q31_t)0x81A82159, (q31_t)0xEBAA894E,
-	(q31_t)0x81A01B6C, (q31_t)0xEBDC2B6D, (q31_t)0x819828FD,
-	(q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC3F78F5,
-	(q31_t)0x81887E9A, (q31_t)0xEC71244F, (q31_t)0x8180C6A9,
-	(q31_t)0xECA2D2AC, (q31_t)0x8179223A, (q31_t)0xECD48406,
-	(q31_t)0x8171914E, (q31_t)0xED063855, (q31_t)0x816A13E6,
-	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED69A9B2,
-	(q31_t)0x815B53A8, (q31_t)0xED9B66B2, (q31_t)0x815410D3,
-	(q31_t)0xEDCD2687, (q31_t)0x814CE188, (q31_t)0xEDFEE92B,
-	(q31_t)0x8145C5C6, (q31_t)0xEE30AE95, (q31_t)0x813EBD90,
-	(q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEE9441A0,
-	(q31_t)0x8130E7C8, (q31_t)0xEEC60F31, (q31_t)0x812A1A39,
-	(q31_t)0xEEF7DF6A, (q31_t)0x81236039, (q31_t)0xEF29B243,
-	(q31_t)0x811CB9CA, (q31_t)0xEF5B87B5, (q31_t)0x811626EC,
-	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFBF3A44,
-	(q31_t)0x81093BE8, (q31_t)0xEFF11752, (q31_t)0x8102E3C3,
-	(q31_t)0xF022F6DA, (q31_t)0x80FC9F35, (q31_t)0xF054D8D4,
-	(q31_t)0x80F66E3C, (q31_t)0xF086BD39, (q31_t)0x80F050DB,
-	(q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF0EA8D23,
-	(q31_t)0x80E450E2, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C,
-	(q31_t)0xF14E665C, (q31_t)0x80D89F51, (q31_t)0xF1805662,
-	(q31_t)0x80D2E3F1, (q31_t)0xF1B248A5, (q31_t)0x80CD3C2F,
-	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF21633C0,
-	(q31_t)0x80C22783, (q31_t)0xF2482C89, (q31_t)0x80BCBA9C,
-	(q31_t)0xF27A2770, (q31_t)0x80B76155, (q31_t)0xF2AC246D,
-	(q31_t)0x80B21BAF, (q31_t)0xF2DE2378, (q31_t)0x80ACE9AB,
-	(q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF342279A,
-	(q31_t)0x80A2C08B, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
-	(q31_t)0xF3A63398, (q31_t)0x8098E5FB, (q31_t)0xF3D83C76,
-	(q31_t)0x8094162B, (q31_t)0xF40A4734, (q31_t)0x808F5A02,
-	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF46E6231,
-	(q31_t)0x80861CA5, (q31_t)0xF4A07260, (q31_t)0x80819B74,
-	(q31_t)0xF4D28451, (q31_t)0x807D2DEB, (q31_t)0xF50497FA,
-	(q31_t)0x8078D40D, (q31_t)0xF536AD55, (q31_t)0x80748DD9,
-	(q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF59ADD01,
-	(q31_t)0x806C3C73, (q31_t)0xF5CCF743, (q31_t)0x80683143,
-	(q31_t)0xF5FF1317, (q31_t)0x806439C0, (q31_t)0xF6313076,
-	(q31_t)0x806055EA, (q31_t)0xF6634F58, (q31_t)0x805C85C3,
-	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6C79188,
-	(q31_t)0x80552083, (q31_t)0xF6F9B4C5, (q31_t)0x80518B6B,
-	(q31_t)0xF72BD967, (q31_t)0x804E0A03, (q31_t)0xF75DFF65,
-	(q31_t)0x804A9C4D, (q31_t)0xF79026B8, (q31_t)0x80474248,
-	(q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF7F4793E,
-	(q31_t)0x8040C956, (q31_t)0xF826A461, (q31_t)0x803DAA69,
-	(q31_t)0xF858D0BA, (q31_t)0x803A9F31, (q31_t)0xF88AFE41,
-	(q31_t)0x8037A7AC, (q31_t)0xF8BD2CEF, (q31_t)0x8034C3DC,
-	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9218D9E,
-	(q31_t)0x802F375C, (q31_t)0xF953BF90, (q31_t)0x802C8EAD,
-	(q31_t)0xF985F28A, (q31_t)0x8029F9B4, (q31_t)0xF9B82683,
-	(q31_t)0x80277872, (q31_t)0xF9EA5B75, (q31_t)0x80250AE7,
-	(q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA4EC820,
-	(q31_t)0x80206AF8, (q31_t)0xFA80FFCB, (q31_t)0x801E3894,
-	(q31_t)0xFAB3384F, (q31_t)0x801C19E9, (q31_t)0xFAE571A4,
-	(q31_t)0x801A0EF7, (q31_t)0xFB17ABC2, (q31_t)0x801817BF,
-	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFB7C223C,
-	(q31_t)0x8014647A, (q31_t)0xFBAE5E89, (q31_t)0x8012A86F,
-	(q31_t)0xFBE09B80, (q31_t)0x8011001E, (q31_t)0xFC12D919,
-	(q31_t)0x800F6B88, (q31_t)0xFC45174E, (q31_t)0x800DEAAC,
-	(q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCA99569,
-	(q31_t)0x800B2427, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D,
-	(q31_t)0xFD0E1594, (q31_t)0x8008AC90, (q31_t)0xFD40565B,
-	(q31_t)0x80078E5E, (q31_t)0xFD72978F, (q31_t)0x800683E8,
-	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFDD71B1E,
-	(q31_t)0x8004AA31, (q31_t)0xFE095D69, (q31_t)0x8003DAF0,
-	(q31_t)0xFE3BA001, (q31_t)0x80031F6C, (q31_t)0xFE6DE2E0,
-	(q31_t)0x800277A5, (q31_t)0xFEA025FC, (q31_t)0x8001E39B,
-	(q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF04ACD0,
-	(q31_t)0x8000F6BD, (q31_t)0xFF36F078, (q31_t)0x80009DE9,
-	(q31_t)0xFF69343E, (q31_t)0x800058D3, (q31_t)0xFF9B781D,
-	(q31_t)0x8000277A, (q31_t)0xFFCDBC0A, (q31_t)0x800009DE
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-/**
-  @brief  q15 Twiddle factors Table
-*/
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
-
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>fori = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 16, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_16_q15[24] = {
-    (q15_t)0x7FFF, (q15_t)0x0000,
-    (q15_t)0x7641, (q15_t)0x30FB,
-    (q15_t)0x5A82, (q15_t)0x5A82,
-    (q15_t)0x30FB, (q15_t)0x7641,
-    (q15_t)0x0000, (q15_t)0x7FFF,
-    (q15_t)0xCF04, (q15_t)0x7641,
-    (q15_t)0xA57D, (q15_t)0x5A82,
-    (q15_t)0x89BE, (q15_t)0x30FB,
-    (q15_t)0x8000, (q15_t)0x0000,
-    (q15_t)0x89BE, (q15_t)0xCF04,
-    (q15_t)0xA57D, (q15_t)0xA57D,
-    (q15_t)0xCF04, (q15_t)0x89BE
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 32, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_32_q15[48] = {
-    (q15_t)0x7FFF, (q15_t)0x0000,
-    (q15_t)0x7D8A, (q15_t)0x18F8,
-    (q15_t)0x7641, (q15_t)0x30FB,
-    (q15_t)0x6A6D, (q15_t)0x471C,
-    (q15_t)0x5A82, (q15_t)0x5A82,
-    (q15_t)0x471C, (q15_t)0x6A6D,
-    (q15_t)0x30FB, (q15_t)0x7641,
-    (q15_t)0x18F8, (q15_t)0x7D8A,
-    (q15_t)0x0000, (q15_t)0x7FFF,
-    (q15_t)0xE707, (q15_t)0x7D8A,
-    (q15_t)0xCF04, (q15_t)0x7641,
-    (q15_t)0xB8E3, (q15_t)0x6A6D,
-    (q15_t)0xA57D, (q15_t)0x5A82,
-    (q15_t)0x9592, (q15_t)0x471C,
-    (q15_t)0x89BE, (q15_t)0x30FB,
-    (q15_t)0x8275, (q15_t)0x18F8,
-    (q15_t)0x8000, (q15_t)0x0000,
-    (q15_t)0x8275, (q15_t)0xE707,
-    (q15_t)0x89BE, (q15_t)0xCF04,
-    (q15_t)0x9592, (q15_t)0xB8E3,
-    (q15_t)0xA57D, (q15_t)0xA57D,
-    (q15_t)0xB8E3, (q15_t)0x9592,
-    (q15_t)0xCF04, (q15_t)0x89BE,
-    (q15_t)0xE707, (q15_t)0x8275
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 64, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_64_q15[96] = {
-	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7F62, (q15_t)0x0C8B,
-	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7A7D, (q15_t)0x2528,
-	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x70E2, (q15_t)0x3C56,
-	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x62F2, (q15_t)0x5133,
-	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5133, (q15_t)0x62F2,
-	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x3C56, (q15_t)0x70E2,
-	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2528, (q15_t)0x7A7D,
-	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x0C8B, (q15_t)0x7F62,
-	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF374, (q15_t)0x7F62,
-	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xDAD7, (q15_t)0x7A7D,
-	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC3A9, (q15_t)0x70E2,
-	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xAECC, (q15_t)0x62F2,
-	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0x9D0D, (q15_t)0x5133,
-	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x8F1D, (q15_t)0x3C56,
-	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8582, (q15_t)0x2528,
-	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x809D, (q15_t)0x0C8B,
-	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x809D, (q15_t)0xF374,
-	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8582, (q15_t)0xDAD7,
-	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8F1D, (q15_t)0xC3A9,
-	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9D0D, (q15_t)0xAECC,
-	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAECC, (q15_t)0x9D0D,
-	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xC3A9, (q15_t)0x8F1D,
-	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xDAD7, (q15_t)0x8582,
-	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xF374, (q15_t)0x809D
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 128, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_128_q15[192] = {
-	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FD8, (q15_t)0x0647,
-	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7E9D, (q15_t)0x12C8,
-	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7C29, (q15_t)0x1F19,
-	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7884, (q15_t)0x2B1F,
-	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x73B5, (q15_t)0x36BA,
-	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6DCA, (q15_t)0x41CE,
-	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x66CF, (q15_t)0x4C3F,
-	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x5ED7, (q15_t)0x55F5,
-	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x55F5, (q15_t)0x5ED7,
-	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4C3F, (q15_t)0x66CF,
-	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x41CE, (q15_t)0x6DCA,
-	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x36BA, (q15_t)0x73B5,
-	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2B1F, (q15_t)0x7884,
-	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x1F19, (q15_t)0x7C29,
-	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x12C8, (q15_t)0x7E9D,
-	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0647, (q15_t)0x7FD8,
-	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF9B8, (q15_t)0x7FD8,
-	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xED37, (q15_t)0x7E9D,
-	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE0E6, (q15_t)0x7C29,
-	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD4E0, (q15_t)0x7884,
-	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC945, (q15_t)0x73B5,
-	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xBE31, (q15_t)0x6DCA,
-	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB3C0, (q15_t)0x66CF,
-	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAA0A, (q15_t)0x5ED7,
-	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA128, (q15_t)0x55F5,
-	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9930, (q15_t)0x4C3F,
-	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9235, (q15_t)0x41CE,
-	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8C4A, (q15_t)0x36BA,
-	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x877B, (q15_t)0x2B1F,
-	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x83D6, (q15_t)0x1F19,
-	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8162, (q15_t)0x12C8,
-	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8027, (q15_t)0x0647,
-	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8027, (q15_t)0xF9B8,
-	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x8162, (q15_t)0xED37,
-	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x83D6, (q15_t)0xE0E6,
-	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x877B, (q15_t)0xD4E0,
-	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8C4A, (q15_t)0xC945,
-	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x9235, (q15_t)0xBE31,
-	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9930, (q15_t)0xB3C0,
-	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0xA128, (q15_t)0xAA0A,
-	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAA0A, (q15_t)0xA128,
-	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB3C0, (q15_t)0x9930,
-	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBE31, (q15_t)0x9235,
-	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC945, (q15_t)0x8C4A,
-	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD4E0, (q15_t)0x877B,
-	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xE0E6, (q15_t)0x83D6,
-	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xED37, (q15_t)0x8162,
-	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF9B8, (q15_t)0x8027
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 256, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_256_q15[384] = {
-	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FF6, (q15_t)0x0324,
-	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FA7, (q15_t)0x096A,
-	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F09, (q15_t)0x0FAB,
-	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E1D, (q15_t)0x15E2,
-	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7CE3, (q15_t)0x1C0B,
-	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7B5D, (q15_t)0x2223,
-	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x798A, (q15_t)0x2826,
-	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x776C, (q15_t)0x2E11,
-	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x7504, (q15_t)0x33DE,
-	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7255, (q15_t)0x398C,
-	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6F5F, (q15_t)0x3F17,
-	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6C24, (q15_t)0x447A,
-	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x68A6, (q15_t)0x49B4,
-	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x64E8, (q15_t)0x4EBF,
-	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x60EC, (q15_t)0x539B,
-	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5CB4, (q15_t)0x5842,
-	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5842, (q15_t)0x5CB4,
-	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x539B, (q15_t)0x60EC,
-	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4EBF, (q15_t)0x64E8,
-	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x49B4, (q15_t)0x68A6,
-	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x447A, (q15_t)0x6C24,
-	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x3F17, (q15_t)0x6F5F,
-	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x398C, (q15_t)0x7255,
-	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x33DE, (q15_t)0x7504,
-	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2E11, (q15_t)0x776C,
-	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2826, (q15_t)0x798A,
-	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2223, (q15_t)0x7B5D,
-	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1C0B, (q15_t)0x7CE3,
-	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x15E2, (q15_t)0x7E1D,
-	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x0FAB, (q15_t)0x7F09,
-	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x096A, (q15_t)0x7FA7,
-	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0324, (q15_t)0x7FF6,
-	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFCDB, (q15_t)0x7FF6,
-	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF695, (q15_t)0x7FA7,
-	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF054, (q15_t)0x7F09,
-	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEA1D, (q15_t)0x7E1D,
-	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE3F4, (q15_t)0x7CE3,
-	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDDDC, (q15_t)0x7B5D,
-	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD7D9, (q15_t)0x798A,
-	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD1EE, (q15_t)0x776C,
-	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCC21, (q15_t)0x7504,
-	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC673, (q15_t)0x7255,
-	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC0E8, (q15_t)0x6F5F,
-	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBB85, (q15_t)0x6C24,
-	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB64B, (q15_t)0x68A6,
-	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB140, (q15_t)0x64E8,
-	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAC64, (q15_t)0x60EC,
-	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA7BD, (q15_t)0x5CB4,
-	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA34B, (q15_t)0x5842,
-	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0x9F13, (q15_t)0x539B,
-	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9B17, (q15_t)0x4EBF,
-	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9759, (q15_t)0x49B4,
-	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x93DB, (q15_t)0x447A,
-	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x90A0, (q15_t)0x3F17,
-	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8DAA, (q15_t)0x398C,
-	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8AFB, (q15_t)0x33DE,
-	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8893, (q15_t)0x2E11,
-	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8675, (q15_t)0x2826,
-	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x84A2, (q15_t)0x2223,
-	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x831C, (q15_t)0x1C0B,
-	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x81E2, (q15_t)0x15E2,
-	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x80F6, (q15_t)0x0FAB,
-	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8058, (q15_t)0x096A,
-	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8009, (q15_t)0x0324,
-	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8009, (q15_t)0xFCDB,
-	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8058, (q15_t)0xF695,
-	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80F6, (q15_t)0xF054,
-	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81E2, (q15_t)0xEA1D,
-	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x831C, (q15_t)0xE3F4,
-	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x84A2, (q15_t)0xDDDC,
-	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8675, (q15_t)0xD7D9,
-	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8893, (q15_t)0xD1EE,
-	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8AFB, (q15_t)0xCC21,
-	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8DAA, (q15_t)0xC673,
-	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x90A0, (q15_t)0xC0E8,
-	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x93DB, (q15_t)0xBB85,
-	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9759, (q15_t)0xB64B,
-	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9B17, (q15_t)0xB140,
-	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9F13, (q15_t)0xAC64,
-	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA34B, (q15_t)0xA7BD,
-	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA7BD, (q15_t)0xA34B,
-	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAC64, (q15_t)0x9F13,
-	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB140, (q15_t)0x9B17,
-	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB64B, (q15_t)0x9759,
-	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBB85, (q15_t)0x93DB,
-	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xC0E8, (q15_t)0x90A0,
-	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC673, (q15_t)0x8DAA,
-	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCC21, (q15_t)0x8AFB,
-	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD1EE, (q15_t)0x8893,
-	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD7D9, (q15_t)0x8675,
-	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDDDC, (q15_t)0x84A2,
-	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE3F4, (q15_t)0x831C,
-	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xEA1D, (q15_t)0x81E2,
-	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xF054, (q15_t)0x80F6,
-	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF695, (q15_t)0x8058,
-	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFCDB, (q15_t)0x8009
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 512, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_512_q15[768] = {
-	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFD, (q15_t)0x0192,
-	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FE9, (q15_t)0x04B6,
-	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FC2, (q15_t)0x07D9,
-	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F87, (q15_t)0x0AFB,
-	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F38, (q15_t)0x0E1B,
-	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7ED5, (q15_t)0x1139,
-	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E5F, (q15_t)0x1455,
-	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DD6, (q15_t)0x176D,
-	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D39, (q15_t)0x1A82,
-	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7C89, (q15_t)0x1D93,
-	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BC5, (q15_t)0x209F,
-	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7AEF, (q15_t)0x23A6,
-	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A05, (q15_t)0x26A8,
-	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x7909, (q15_t)0x29A3,
-	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x77FA, (q15_t)0x2C98,
-	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x76D9, (q15_t)0x2F87,
-	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75A5, (q15_t)0x326E,
-	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x745F, (q15_t)0x354D,
-	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7307, (q15_t)0x3824,
-	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x719E, (q15_t)0x3AF2,
-	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7023, (q15_t)0x3DB8,
-	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6E96, (q15_t)0x4073,
-	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6CF9, (q15_t)0x4325,
-	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6B4A, (q15_t)0x45CD,
-	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x698C, (q15_t)0x4869,
-	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x67BD, (q15_t)0x4AFB,
-	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x65DD, (q15_t)0x4D81,
-	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x63EF, (q15_t)0x4FFB,
-	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x61F1, (q15_t)0x5269,
-	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x5FE3, (q15_t)0x54CA,
-	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5DC7, (q15_t)0x571D,
-	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5B9D, (q15_t)0x5964,
-	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5964, (q15_t)0x5B9D,
-	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x571D, (q15_t)0x5DC7,
-	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x54CA, (q15_t)0x5FE3,
-	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5269, (q15_t)0x61F1,
-	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4FFB, (q15_t)0x63EF,
-	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4D81, (q15_t)0x65DD,
-	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4AFB, (q15_t)0x67BD,
-	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4869, (q15_t)0x698C,
-	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x45CD, (q15_t)0x6B4A,
-	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4325, (q15_t)0x6CF9,
-	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4073, (q15_t)0x6E96,
-	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3DB8, (q15_t)0x7023,
-	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3AF2, (q15_t)0x719E,
-	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3824, (q15_t)0x7307,
-	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x354D, (q15_t)0x745F,
-	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x326E, (q15_t)0x75A5,
-	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2F87, (q15_t)0x76D9,
-	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2C98, (q15_t)0x77FA,
-	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x29A3, (q15_t)0x7909,
-	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x26A8, (q15_t)0x7A05,
-	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x23A6, (q15_t)0x7AEF,
-	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x209F, (q15_t)0x7BC5,
-	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1D93, (q15_t)0x7C89,
-	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1A82, (q15_t)0x7D39,
-	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x176D, (q15_t)0x7DD6,
-	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x1455, (q15_t)0x7E5F,
-	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1139, (q15_t)0x7ED5,
-	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0E1B, (q15_t)0x7F38,
-	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0AFB, (q15_t)0x7F87,
-	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x07D9, (q15_t)0x7FC2,
-	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x04B6, (q15_t)0x7FE9,
-	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x0192, (q15_t)0x7FFD,
-	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFE6D, (q15_t)0x7FFD,
-	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFB49, (q15_t)0x7FE9,
-	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF826, (q15_t)0x7FC2,
-	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF504, (q15_t)0x7F87,
-	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF1E4, (q15_t)0x7F38,
-	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEEC6, (q15_t)0x7ED5,
-	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEBAA, (q15_t)0x7E5F,
-	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE892, (q15_t)0x7DD6,
-	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE57D, (q15_t)0x7D39,
-	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE26C, (q15_t)0x7C89,
-	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDF60, (q15_t)0x7BC5,
-	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDC59, (q15_t)0x7AEF,
-	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD957, (q15_t)0x7A05,
-	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD65C, (q15_t)0x7909,
-	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD367, (q15_t)0x77FA,
-	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD078, (q15_t)0x76D9,
-	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCD91, (q15_t)0x75A5,
-	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCAB2, (q15_t)0x745F,
-	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC7DB, (q15_t)0x7307,
-	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC50D, (q15_t)0x719E,
-	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC247, (q15_t)0x7023,
-	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xBF8C, (q15_t)0x6E96,
-	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBCDA, (q15_t)0x6CF9,
-	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBA32, (q15_t)0x6B4A,
-	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB796, (q15_t)0x698C,
-	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB504, (q15_t)0x67BD,
-	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB27E, (q15_t)0x65DD,
-	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB004, (q15_t)0x63EF,
-	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAD96, (q15_t)0x61F1,
-	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAB35, (q15_t)0x5FE3,
-	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA8E2, (q15_t)0x5DC7,
-	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA69B, (q15_t)0x5B9D,
-	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA462, (q15_t)0x5964,
-	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA238, (q15_t)0x571D,
-	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA01C, (q15_t)0x54CA,
-	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E0E, (q15_t)0x5269,
-	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C10, (q15_t)0x4FFB,
-	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9A22, (q15_t)0x4D81,
-	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9842, (q15_t)0x4AFB,
-	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x9673, (q15_t)0x4869,
-	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x94B5, (q15_t)0x45CD,
-	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9306, (q15_t)0x4325,
-	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9169, (q15_t)0x4073,
-	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x8FDC, (q15_t)0x3DB8,
-	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8E61, (q15_t)0x3AF2,
-	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8CF8, (q15_t)0x3824,
-	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BA0, (q15_t)0x354D,
-	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8A5A, (q15_t)0x326E,
-	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8926, (q15_t)0x2F87,
-	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8805, (q15_t)0x2C98,
-	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x86F6, (q15_t)0x29A3,
-	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x85FA, (q15_t)0x26A8,
-	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8510, (q15_t)0x23A6,
-	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x843A, (q15_t)0x209F,
-	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x8376, (q15_t)0x1D93,
-	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82C6, (q15_t)0x1A82,
-	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8229, (q15_t)0x176D,
-	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81A0, (q15_t)0x1455,
-	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x812A, (q15_t)0x1139,
-	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80C7, (q15_t)0x0E1B,
-	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8078, (q15_t)0x0AFB,
-	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x803D, (q15_t)0x07D9,
-	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8016, (q15_t)0x04B6,
-	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8002, (q15_t)0x0192,
-	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8002, (q15_t)0xFE6D,
-	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x8016, (q15_t)0xFB49,
-	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x803D, (q15_t)0xF826,
-	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8078, (q15_t)0xF504,
-	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80C7, (q15_t)0xF1E4,
-	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x812A, (q15_t)0xEEC6,
-	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81A0, (q15_t)0xEBAA,
-	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8229, (q15_t)0xE892,
-	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x82C6, (q15_t)0xE57D,
-	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8376, (q15_t)0xE26C,
-	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x843A, (q15_t)0xDF60,
-	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x8510, (q15_t)0xDC59,
-	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85FA, (q15_t)0xD957,
-	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86F6, (q15_t)0xD65C,
-	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8805, (q15_t)0xD367,
-	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x8926, (q15_t)0xD078,
-	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A5A, (q15_t)0xCD91,
-	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8BA0, (q15_t)0xCAB2,
-	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CF8, (q15_t)0xC7DB,
-	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E61, (q15_t)0xC50D,
-	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8FDC, (q15_t)0xC247,
-	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9169, (q15_t)0xBF8C,
-	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9306, (q15_t)0xBCDA,
-	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x94B5, (q15_t)0xBA32,
-	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9673, (q15_t)0xB796,
-	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9842, (q15_t)0xB504,
-	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9A22, (q15_t)0xB27E,
-	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9C10, (q15_t)0xB004,
-	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9E0E, (q15_t)0xAD96,
-	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0xA01C, (q15_t)0xAB35,
-	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA238, (q15_t)0xA8E2,
-	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA462, (q15_t)0xA69B,
-	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA69B, (q15_t)0xA462,
-	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA8E2, (q15_t)0xA238,
-	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAB35, (q15_t)0xA01C,
-	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAD96, (q15_t)0x9E0E,
-	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB004, (q15_t)0x9C10,
-	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB27E, (q15_t)0x9A22,
-	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB504, (q15_t)0x9842,
-	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB796, (q15_t)0x9673,
-	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBA32, (q15_t)0x94B5,
-	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBCDA, (q15_t)0x9306,
-	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBF8C, (q15_t)0x9169,
-	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC247, (q15_t)0x8FDC,
-	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC50D, (q15_t)0x8E61,
-	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC7DB, (q15_t)0x8CF8,
-	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCAB2, (q15_t)0x8BA0,
-	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCD91, (q15_t)0x8A5A,
-	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD078, (q15_t)0x8926,
-	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD367, (q15_t)0x8805,
-	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD65C, (q15_t)0x86F6,
-	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD957, (q15_t)0x85FA,
-	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDC59, (q15_t)0x8510,
-	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDF60, (q15_t)0x843A,
-	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE26C, (q15_t)0x8376,
-	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE57D, (q15_t)0x82C6,
-	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE892, (q15_t)0x8229,
-	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEBAA, (q15_t)0x81A0,
-	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEEC6, (q15_t)0x812A,
-	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF1E4, (q15_t)0x80C7,
-	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF504, (q15_t)0x8078,
-	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF826, (q15_t)0x803D,
-	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFB49, (q15_t)0x8016,
-	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFE6D, (q15_t)0x8002
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 1024, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- 
- */
-const q15_t twiddleCoef_1024_q15[1536] = {
-	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x00C9,
-	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFA, (q15_t)0x025B,
-	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF0, (q15_t)0x03ED,
-	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE1, (q15_t)0x057F,
-	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FCE, (q15_t)0x0710,
-	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FB5, (q15_t)0x08A2,
-	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F97, (q15_t)0x0A33,
-	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F75, (q15_t)0x0BC3,
-	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F4D, (q15_t)0x0D53,
-	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F21, (q15_t)0x0EE3,
-	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EF0, (q15_t)0x1072,
-	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7EBA, (q15_t)0x1201,
-	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E7F, (q15_t)0x138E,
-	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E3F, (q15_t)0x151B,
-	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DFA, (q15_t)0x16A8,
-	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DB0, (q15_t)0x1833,
-	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D62, (q15_t)0x19BD,
-	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D0F, (q15_t)0x1B47,
-	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CB7, (q15_t)0x1CCF,
-	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C5A, (q15_t)0x1E56,
-	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BF8, (q15_t)0x1FDC,
-	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7B92, (q15_t)0x2161,
-	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B26, (q15_t)0x22E5,
-	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AB6, (q15_t)0x2467,
-	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A42, (q15_t)0x25E8,
-	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79C8, (q15_t)0x2767,
-	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x794A, (q15_t)0x28E5,
-	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78C7, (q15_t)0x2A61,
-	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7840, (q15_t)0x2BDC,
-	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77B4, (q15_t)0x2D55,
-	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7723, (q15_t)0x2ECC,
-	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x768E, (q15_t)0x3041,
-	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75F4, (q15_t)0x31B5,
-	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7555, (q15_t)0x3326,
-	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74B2, (q15_t)0x3496,
-	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x740B, (q15_t)0x3604,
-	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x735F, (q15_t)0x376F,
-	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72AF, (q15_t)0x38D8,
-	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x71FA, (q15_t)0x3A40,
-	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7141, (q15_t)0x3BA5,
-	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7083, (q15_t)0x3D07,
-	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6FC1, (q15_t)0x3E68,
-	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6EFB, (q15_t)0x3FC5,
-	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E30, (q15_t)0x4121,
-	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D62, (q15_t)0x427A,
-	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6C8F, (q15_t)0x43D0,
-	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6BB8, (q15_t)0x4524,
-	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6ADC, (q15_t)0x4675,
-	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x69FD, (q15_t)0x47C3,
-	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6919, (q15_t)0x490F,
-	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6832, (q15_t)0x4A58,
-	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x6746, (q15_t)0x4B9E,
-	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6657, (q15_t)0x4CE1,
-	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x6563, (q15_t)0x4E21,
-	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x646C, (q15_t)0x4F5E,
-	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x6371, (q15_t)0x5097,
-	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x6271, (q15_t)0x51CE,
-	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x616F, (q15_t)0x5302,
-	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x6068, (q15_t)0x5433,
-	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5F5E, (q15_t)0x5560,
-	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E50, (q15_t)0x568A,
-	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5D3E, (q15_t)0x57B0,
-	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C29, (q15_t)0x58D4,
-	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B10, (q15_t)0x59F3,
-	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x59F3, (q15_t)0x5B10,
-	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x58D4, (q15_t)0x5C29,
-	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x57B0, (q15_t)0x5D3E,
-	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x568A, (q15_t)0x5E50,
-	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x5560, (q15_t)0x5F5E,
-	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x5433, (q15_t)0x6068,
-	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5302, (q15_t)0x616F,
-	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x51CE, (q15_t)0x6271,
-	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x5097, (q15_t)0x6371,
-	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4F5E, (q15_t)0x646C,
-	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E21, (q15_t)0x6563,
-	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4CE1, (q15_t)0x6657,
-	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4B9E, (q15_t)0x6746,
-	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4A58, (q15_t)0x6832,
-	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x490F, (q15_t)0x6919,
-	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x47C3, (q15_t)0x69FD,
-	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x4675, (q15_t)0x6ADC,
-	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x4524, (q15_t)0x6BB8,
-	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x43D0, (q15_t)0x6C8F,
-	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x427A, (q15_t)0x6D62,
-	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4121, (q15_t)0x6E30,
-	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x3FC5, (q15_t)0x6EFB,
-	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3E68, (q15_t)0x6FC1,
-	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D07, (q15_t)0x7083,
-	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BA5, (q15_t)0x7141,
-	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A40, (q15_t)0x71FA,
-	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x38D8, (q15_t)0x72AF,
-	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x376F, (q15_t)0x735F,
-	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x3604, (q15_t)0x740B,
-	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x3496, (q15_t)0x74B2,
-	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3326, (q15_t)0x7555,
-	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x31B5, (q15_t)0x75F4,
-	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x3041, (q15_t)0x768E,
-	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2ECC, (q15_t)0x7723,
-	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2D55, (q15_t)0x77B4,
-	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2BDC, (q15_t)0x7840,
-	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2A61, (q15_t)0x78C7,
-	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x28E5, (q15_t)0x794A,
-	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x2767, (q15_t)0x79C8,
-	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x25E8, (q15_t)0x7A42,
-	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2467, (q15_t)0x7AB6,
-	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x22E5, (q15_t)0x7B26,
-	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x2161, (q15_t)0x7B92,
-	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x1FDC, (q15_t)0x7BF8,
-	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1E56, (q15_t)0x7C5A,
-	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1CCF, (q15_t)0x7CB7,
-	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1B47, (q15_t)0x7D0F,
-	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x19BD, (q15_t)0x7D62,
-	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1833, (q15_t)0x7DB0,
-	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x16A8, (q15_t)0x7DFA,
-	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x151B, (q15_t)0x7E3F,
-	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x138E, (q15_t)0x7E7F,
-	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1201, (q15_t)0x7EBA,
-	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1072, (q15_t)0x7EF0,
-	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0EE3, (q15_t)0x7F21,
-	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0D53, (q15_t)0x7F4D,
-	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0BC3, (q15_t)0x7F75,
-	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0A33, (q15_t)0x7F97,
-	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x08A2, (q15_t)0x7FB5,
-	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0710, (q15_t)0x7FCE,
-	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x057F, (q15_t)0x7FE1,
-	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x03ED, (q15_t)0x7FF0,
-	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x025B, (q15_t)0x7FFA,
-	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x00C9, (q15_t)0x7FFF,
-	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF36, (q15_t)0x7FFF,
-	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFDA4, (q15_t)0x7FFA,
-	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC12, (q15_t)0x7FF0,
-	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFA80, (q15_t)0x7FE1,
-	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF8EF, (q15_t)0x7FCE,
-	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF75D, (q15_t)0x7FB5,
-	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF5CC, (q15_t)0x7F97,
-	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF43C, (q15_t)0x7F75,
-	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF2AC, (q15_t)0x7F4D,
-	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF11C, (q15_t)0x7F21,
-	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEF8D, (q15_t)0x7EF0,
-	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEDFE, (q15_t)0x7EBA,
-	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEC71, (q15_t)0x7E7F,
-	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEAE4, (q15_t)0x7E3F,
-	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE957, (q15_t)0x7DFA,
-	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE7CC, (q15_t)0x7DB0,
-	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE642, (q15_t)0x7D62,
-	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE4B8, (q15_t)0x7D0F,
-	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE330, (q15_t)0x7CB7,
-	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE1A9, (q15_t)0x7C5A,
-	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE023, (q15_t)0x7BF8,
-	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDE9E, (q15_t)0x7B92,
-	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD1A, (q15_t)0x7B26,
-	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDB98, (q15_t)0x7AB6,
-	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA17, (q15_t)0x7A42,
-	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD898, (q15_t)0x79C8,
-	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD71A, (q15_t)0x794A,
-	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD59E, (q15_t)0x78C7,
-	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD423, (q15_t)0x7840,
-	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD2AA, (q15_t)0x77B4,
-	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD133, (q15_t)0x7723,
-	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xCFBE, (q15_t)0x768E,
-	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCE4A, (q15_t)0x75F4,
-	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCCD9, (q15_t)0x7555,
-	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCB69, (q15_t)0x74B2,
-	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xC9FB, (q15_t)0x740B,
-	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC890, (q15_t)0x735F,
-	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC727, (q15_t)0x72AF,
-	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC5BF, (q15_t)0x71FA,
-	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC45A, (q15_t)0x7141,
-	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC2F8, (q15_t)0x7083,
-	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC197, (q15_t)0x6FC1,
-	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC03A, (q15_t)0x6EFB,
-	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBEDE, (q15_t)0x6E30,
-	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBD85, (q15_t)0x6D62,
-	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBC2F, (q15_t)0x6C8F,
-	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBADB, (q15_t)0x6BB8,
-	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB98A, (q15_t)0x6ADC,
-	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB83C, (q15_t)0x69FD,
-	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB6F0, (q15_t)0x6919,
-	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB5A7, (q15_t)0x6832,
-	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB461, (q15_t)0x6746,
-	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB31E, (q15_t)0x6657,
-	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB1DE, (q15_t)0x6563,
-	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB0A1, (q15_t)0x646C,
-	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAF68, (q15_t)0x6371,
-	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE31, (q15_t)0x6271,
-	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xACFD, (q15_t)0x616F,
-	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xABCC, (q15_t)0x6068,
-	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAA9F, (q15_t)0x5F5E,
-	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA975, (q15_t)0x5E50,
-	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA84F, (q15_t)0x5D3E,
-	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA72B, (q15_t)0x5C29,
-	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA60C, (q15_t)0x5B10,
-	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA4EF, (q15_t)0x59F3,
-	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA3D6, (q15_t)0x58D4,
-	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA2C1, (q15_t)0x57B0,
-	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1AF, (q15_t)0x568A,
-	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA0A1, (q15_t)0x5560,
-	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9F97, (q15_t)0x5433,
-	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E90, (q15_t)0x5302,
-	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9D8E, (q15_t)0x51CE,
-	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C8E, (q15_t)0x5097,
-	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9B93, (q15_t)0x4F5E,
-	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9A9C, (q15_t)0x4E21,
-	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x99A8, (q15_t)0x4CE1,
-	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98B9, (q15_t)0x4B9E,
-	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x97CD, (q15_t)0x4A58,
-	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x96E6, (q15_t)0x490F,
-	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x9602, (q15_t)0x47C3,
-	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9523, (q15_t)0x4675,
-	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x9447, (q15_t)0x4524,
-	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9370, (q15_t)0x43D0,
-	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x929D, (q15_t)0x427A,
-	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x91CF, (q15_t)0x4121,
-	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9104, (q15_t)0x3FC5,
-	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x903E, (q15_t)0x3E68,
-	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8F7C, (q15_t)0x3D07,
-	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8EBE, (q15_t)0x3BA5,
-	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E05, (q15_t)0x3A40,
-	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D50, (q15_t)0x38D8,
-	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CA0, (q15_t)0x376F,
-	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BF4, (q15_t)0x3604,
-	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B4D, (q15_t)0x3496,
-	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AAA, (q15_t)0x3326,
-	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A0B, (q15_t)0x31B5,
-	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8971, (q15_t)0x3041,
-	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x88DC, (q15_t)0x2ECC,
-	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x884B, (q15_t)0x2D55,
-	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87BF, (q15_t)0x2BDC,
-	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8738, (q15_t)0x2A61,
-	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86B5, (q15_t)0x28E5,
-	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8637, (q15_t)0x2767,
-	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85BD, (q15_t)0x25E8,
-	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8549, (q15_t)0x2467,
-	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84D9, (q15_t)0x22E5,
-	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x846D, (q15_t)0x2161,
-	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8407, (q15_t)0x1FDC,
-	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83A5, (q15_t)0x1E56,
-	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x8348, (q15_t)0x1CCF,
-	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82F0, (q15_t)0x1B47,
-	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x829D, (q15_t)0x19BD,
-	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x824F, (q15_t)0x1833,
-	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8205, (q15_t)0x16A8,
-	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81C0, (q15_t)0x151B,
-	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8180, (q15_t)0x138E,
-	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8145, (q15_t)0x1201,
-	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x810F, (q15_t)0x1072,
-	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80DE, (q15_t)0x0EE3,
-	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80B2, (q15_t)0x0D53,
-	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x808A, (q15_t)0x0BC3,
-	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8068, (q15_t)0x0A33,
-	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x804A, (q15_t)0x08A2,
-	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x8031, (q15_t)0x0710,
-	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x801E, (q15_t)0x057F,
-	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x800F, (q15_t)0x03ED,
-	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8005, (q15_t)0x025B,
-	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8000, (q15_t)0x00C9,
-	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFF36,
-	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8005, (q15_t)0xFDA4,
-	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800F, (q15_t)0xFC12,
-	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801E, (q15_t)0xFA80,
-	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8031, (q15_t)0xF8EF,
-	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x804A, (q15_t)0xF75D,
-	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8068, (q15_t)0xF5CC,
-	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x808A, (q15_t)0xF43C,
-	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80B2, (q15_t)0xF2AC,
-	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80DE, (q15_t)0xF11C,
-	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x810F, (q15_t)0xEF8D,
-	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8145, (q15_t)0xEDFE,
-	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8180, (q15_t)0xEC71,
-	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81C0, (q15_t)0xEAE4,
-	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8205, (q15_t)0xE957,
-	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x824F, (q15_t)0xE7CC,
-	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x829D, (q15_t)0xE642,
-	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82F0, (q15_t)0xE4B8,
-	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8348, (q15_t)0xE330,
-	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x83A5, (q15_t)0xE1A9,
-	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x8407, (q15_t)0xE023,
-	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x846D, (q15_t)0xDE9E,
-	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84D9, (q15_t)0xDD1A,
-	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x8549, (q15_t)0xDB98,
-	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85BD, (q15_t)0xDA17,
-	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8637, (q15_t)0xD898,
-	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86B5, (q15_t)0xD71A,
-	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8738, (q15_t)0xD59E,
-	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x87BF, (q15_t)0xD423,
-	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x884B, (q15_t)0xD2AA,
-	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88DC, (q15_t)0xD133,
-	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8971, (q15_t)0xCFBE,
-	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A0B, (q15_t)0xCE4A,
-	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8AAA, (q15_t)0xCCD9,
-	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B4D, (q15_t)0xCB69,
-	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BF4, (q15_t)0xC9FB,
-	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CA0, (q15_t)0xC890,
-	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D50, (q15_t)0xC727,
-	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E05, (q15_t)0xC5BF,
-	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8EBE, (q15_t)0xC45A,
-	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F7C, (q15_t)0xC2F8,
-	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x903E, (q15_t)0xC197,
-	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9104, (q15_t)0xC03A,
-	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x91CF, (q15_t)0xBEDE,
-	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x929D, (q15_t)0xBD85,
-	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9370, (q15_t)0xBC2F,
-	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9447, (q15_t)0xBADB,
-	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x9523, (q15_t)0xB98A,
-	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9602, (q15_t)0xB83C,
-	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96E6, (q15_t)0xB6F0,
-	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x97CD, (q15_t)0xB5A7,
-	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x98B9, (q15_t)0xB461,
-	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x99A8, (q15_t)0xB31E,
-	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A9C, (q15_t)0xB1DE,
-	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B93, (q15_t)0xB0A1,
-	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C8E, (q15_t)0xAF68,
-	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D8E, (q15_t)0xAE31,
-	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E90, (q15_t)0xACFD,
-	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F97, (q15_t)0xABCC,
-	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA0A1, (q15_t)0xAA9F,
-	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA1AF, (q15_t)0xA975,
-	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA2C1, (q15_t)0xA84F,
-	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA3D6, (q15_t)0xA72B,
-	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4EF, (q15_t)0xA60C,
-	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA60C, (q15_t)0xA4EF,
-	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA72B, (q15_t)0xA3D6,
-	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA84F, (q15_t)0xA2C1,
-	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA975, (q15_t)0xA1AF,
-	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA9F, (q15_t)0xA0A1,
-	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xABCC, (q15_t)0x9F97,
-	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACFD, (q15_t)0x9E90,
-	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xAE31, (q15_t)0x9D8E,
-	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF68, (q15_t)0x9C8E,
-	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB0A1, (q15_t)0x9B93,
-	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB1DE, (q15_t)0x9A9C,
-	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB31E, (q15_t)0x99A8,
-	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB461, (q15_t)0x98B9,
-	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB5A7, (q15_t)0x97CD,
-	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB6F0, (q15_t)0x96E6,
-	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB83C, (q15_t)0x9602,
-	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB98A, (q15_t)0x9523,
-	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBADB, (q15_t)0x9447,
-	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBC2F, (q15_t)0x9370,
-	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD85, (q15_t)0x929D,
-	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBEDE, (q15_t)0x91CF,
-	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xC03A, (q15_t)0x9104,
-	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC197, (q15_t)0x903E,
-	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC2F8, (q15_t)0x8F7C,
-	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC45A, (q15_t)0x8EBE,
-	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC5BF, (q15_t)0x8E05,
-	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC727, (q15_t)0x8D50,
-	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC890, (q15_t)0x8CA0,
-	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9FB, (q15_t)0x8BF4,
-	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB69, (q15_t)0x8B4D,
-	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCCD9, (q15_t)0x8AAA,
-	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCE4A, (q15_t)0x8A0B,
-	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCFBE, (q15_t)0x8971,
-	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD133, (q15_t)0x88DC,
-	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD2AA, (q15_t)0x884B,
-	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD423, (q15_t)0x87BF,
-	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD59E, (q15_t)0x8738,
-	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD71A, (q15_t)0x86B5,
-	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD898, (q15_t)0x8637,
-	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xDA17, (q15_t)0x85BD,
-	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB98, (q15_t)0x8549,
-	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDD1A, (q15_t)0x84D9,
-	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE9E, (q15_t)0x846D,
-	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xE023, (q15_t)0x8407,
-	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE1A9, (q15_t)0x83A5,
-	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE330, (q15_t)0x8348,
-	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE4B8, (q15_t)0x82F0,
-	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE642, (q15_t)0x829D,
-	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE7CC, (q15_t)0x824F,
-	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE957, (q15_t)0x8205,
-	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEAE4, (q15_t)0x81C0,
-	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC71, (q15_t)0x8180,
-	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEDFE, (q15_t)0x8145,
-	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF8D, (q15_t)0x810F,
-	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF11C, (q15_t)0x80DE,
-	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF2AC, (q15_t)0x80B2,
-	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF43C, (q15_t)0x808A,
-	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF5CC, (q15_t)0x8068,
-	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF75D, (q15_t)0x804A,
-	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF8EF, (q15_t)0x8031,
-	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA80, (q15_t)0x801E,
-	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFC12, (q15_t)0x800F,
-	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFDA4, (q15_t)0x8005,
-	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFF36, (q15_t)0x8000
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 2048, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_2048_q15[3072] = {
-	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0064,
-	(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFE, (q15_t)0x012D,
-	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01F6,
-	(q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF8, (q15_t)0x02BF,
-	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF3, (q15_t)0x0388,
-	(q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FED, (q15_t)0x0451,
-	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE5, (q15_t)0x051A,
-	(q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDD, (q15_t)0x05E3,
-	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD3, (q15_t)0x06AC,
-	(q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FC8, (q15_t)0x0775,
-	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBC, (q15_t)0x083D,
-	(q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FAE, (q15_t)0x0906,
-	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F9F, (q15_t)0x09CE,
-	(q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F8F, (q15_t)0x0A97,
-	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F7E, (q15_t)0x0B5F,
-	(q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F6B, (q15_t)0x0C27,
-	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F58, (q15_t)0x0CEF,
-	(q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F43, (q15_t)0x0DB7,
-	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F2D, (q15_t)0x0E7F,
-	(q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F15, (q15_t)0x0F47,
-	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EFD, (q15_t)0x100E,
-	(q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7EE3, (q15_t)0x10D6,
-	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7EC8, (q15_t)0x119D,
-	(q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EAB, (q15_t)0x1264,
-	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E8E, (q15_t)0x132B,
-	(q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E6F, (q15_t)0x13F2,
-	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E4F, (q15_t)0x14B8,
-	(q15_t)0x7E3F, (q15_t)0x151B, (q15_t)0x7E2E, (q15_t)0x157F,
-	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7E0C, (q15_t)0x1645,
-	(q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DE8, (q15_t)0x170A,
-	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DC3, (q15_t)0x17D0,
-	(q15_t)0x7DB0, (q15_t)0x1833, (q15_t)0x7D9D, (q15_t)0x1896,
-	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D76, (q15_t)0x195B,
-	(q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D4E, (q15_t)0x1A20,
-	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D24, (q15_t)0x1AE4,
-	(q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7CF9, (q15_t)0x1BA9,
-	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CCD, (q15_t)0x1C6D,
-	(q15_t)0x7CB7, (q15_t)0x1CCF, (q15_t)0x7CA0, (q15_t)0x1D31,
-	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C71, (q15_t)0x1DF5,
-	(q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C42, (q15_t)0x1EB8,
-	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C11, (q15_t)0x1F7B,
-	(q15_t)0x7BF8, (q15_t)0x1FDC, (q15_t)0x7BDF, (q15_t)0x203E,
-	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7BAC, (q15_t)0x2100,
-	(q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B77, (q15_t)0x21C2,
-	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B42, (q15_t)0x2284,
-	(q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B0B, (q15_t)0x2345,
-	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AD3, (q15_t)0x2407,
-	(q15_t)0x7AB6, (q15_t)0x2467, (q15_t)0x7A9A, (q15_t)0x24C7,
-	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A5F, (q15_t)0x2588,
-	(q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A24, (q15_t)0x2648,
-	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79E7, (q15_t)0x2707,
-	(q15_t)0x79C8, (q15_t)0x2767, (q15_t)0x79A9, (q15_t)0x27C7,
-	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x796A, (q15_t)0x2886,
-	(q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x792A, (q15_t)0x2944,
-	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78E8, (q15_t)0x2A02,
-	(q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78A6, (q15_t)0x2AC0,
-	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7862, (q15_t)0x2B7D,
-	(q15_t)0x7840, (q15_t)0x2BDC, (q15_t)0x781D, (q15_t)0x2C3A,
-	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77D7, (q15_t)0x2CF7,
-	(q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x7790, (q15_t)0x2DB3,
-	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7747, (q15_t)0x2E6E,
-	(q15_t)0x7723, (q15_t)0x2ECC, (q15_t)0x76FE, (q15_t)0x2F29,
-	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x76B3, (q15_t)0x2FE4,
-	(q15_t)0x768E, (q15_t)0x3041, (q15_t)0x7668, (q15_t)0x309E,
-	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x761B, (q15_t)0x3158,
-	(q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75CC, (q15_t)0x3211,
-	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x757D, (q15_t)0x32CA,
-	(q15_t)0x7555, (q15_t)0x3326, (q15_t)0x752D, (q15_t)0x3382,
-	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74DB, (q15_t)0x343A,
-	(q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x7489, (q15_t)0x34F2,
-	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x7435, (q15_t)0x35A8,
-	(q15_t)0x740B, (q15_t)0x3604, (q15_t)0x73E0, (q15_t)0x365F,
-	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x738A, (q15_t)0x3714,
-	(q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7333, (q15_t)0x37CA,
-	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72DB, (q15_t)0x387E,
-	(q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7282, (q15_t)0x3932,
-	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x7227, (q15_t)0x39E6,
-	(q15_t)0x71FA, (q15_t)0x3A40, (q15_t)0x71CC, (q15_t)0x3A99,
-	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x716F, (q15_t)0x3B4C,
-	(q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7112, (q15_t)0x3BFD,
-	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70B3, (q15_t)0x3CAF,
-	(q15_t)0x7083, (q15_t)0x3D07, (q15_t)0x7053, (q15_t)0x3D60,
-	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6FF2, (q15_t)0x3E10,
-	(q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6F90, (q15_t)0x3EBF,
-	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F2D, (q15_t)0x3F6E,
-	(q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EC9, (q15_t)0x401D,
-	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E63, (q15_t)0x40CA,
-	(q15_t)0x6E30, (q15_t)0x4121, (q15_t)0x6DFD, (q15_t)0x4177,
-	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D96, (q15_t)0x4224,
-	(q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D2D, (q15_t)0x42D0,
-	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CC4, (q15_t)0x437B,
-	(q15_t)0x6C8F, (q15_t)0x43D0, (q15_t)0x6C59, (q15_t)0x4425,
-	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6BEE, (q15_t)0x44CF,
-	(q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B81, (q15_t)0x4578,
-	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B13, (q15_t)0x4621,
-	(q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AA5, (q15_t)0x46C9,
-	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x6A35, (q15_t)0x4770,
-	(q15_t)0x69FD, (q15_t)0x47C3, (q15_t)0x69C4, (q15_t)0x4816,
-	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6953, (q15_t)0x48BC,
-	(q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68E0, (q15_t)0x4961,
-	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x686C, (q15_t)0x4A06,
-	(q15_t)0x6832, (q15_t)0x4A58, (q15_t)0x67F7, (q15_t)0x4AA9,
-	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x6782, (q15_t)0x4B4C,
-	(q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x670B, (q15_t)0x4BEF,
-	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6693, (q15_t)0x4C90,
-	(q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x661A, (q15_t)0x4D31,
-	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x65A0, (q15_t)0x4DD1,
-	(q15_t)0x6563, (q15_t)0x4E21, (q15_t)0x6526, (q15_t)0x4E70,
-	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x64AA, (q15_t)0x4F0F,
-	(q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x642D, (q15_t)0x4FAC,
-	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63B0, (q15_t)0x5049,
-	(q15_t)0x6371, (q15_t)0x5097, (q15_t)0x6331, (q15_t)0x50E5,
-	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x62B2, (q15_t)0x5181,
-	(q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x6231, (q15_t)0x521C,
-	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61B0, (q15_t)0x52B5,
-	(q15_t)0x616F, (q15_t)0x5302, (q15_t)0x612D, (q15_t)0x534E,
-	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x60AA, (q15_t)0x53E7,
-	(q15_t)0x6068, (q15_t)0x5433, (q15_t)0x6026, (q15_t)0x547E,
-	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5FA0, (q15_t)0x5515,
-	(q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F1A, (q15_t)0x55AB,
-	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E93, (q15_t)0x5640,
-	(q15_t)0x5E50, (q15_t)0x568A, (q15_t)0x5E0B, (q15_t)0x56D4,
-	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5D83, (q15_t)0x5767,
-	(q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5CF9, (q15_t)0x57F9,
-	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C6E, (q15_t)0x588B,
-	(q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5BE3, (q15_t)0x591C,
-	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B56, (q15_t)0x59AC,
-	(q15_t)0x5B10, (q15_t)0x59F3, (q15_t)0x5AC9, (q15_t)0x5A3B,
-	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5A3B, (q15_t)0x5AC9,
-	(q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59AC, (q15_t)0x5B56,
-	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x591C, (q15_t)0x5BE3,
-	(q15_t)0x58D4, (q15_t)0x5C29, (q15_t)0x588B, (q15_t)0x5C6E,
-	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x57F9, (q15_t)0x5CF9,
-	(q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x5767, (q15_t)0x5D83,
-	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56D4, (q15_t)0x5E0B,
-	(q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5640, (q15_t)0x5E93,
-	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x55AB, (q15_t)0x5F1A,
-	(q15_t)0x5560, (q15_t)0x5F5E, (q15_t)0x5515, (q15_t)0x5FA0,
-	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x547E, (q15_t)0x6026,
-	(q15_t)0x5433, (q15_t)0x6068, (q15_t)0x53E7, (q15_t)0x60AA,
-	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x534E, (q15_t)0x612D,
-	(q15_t)0x5302, (q15_t)0x616F, (q15_t)0x52B5, (q15_t)0x61B0,
-	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x521C, (q15_t)0x6231,
-	(q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x5181, (q15_t)0x62B2,
-	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x50E5, (q15_t)0x6331,
-	(q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5049, (q15_t)0x63B0,
-	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4FAC, (q15_t)0x642D,
-	(q15_t)0x4F5E, (q15_t)0x646C, (q15_t)0x4F0F, (q15_t)0x64AA,
-	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E70, (q15_t)0x6526,
-	(q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DD1, (q15_t)0x65A0,
-	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D31, (q15_t)0x661A,
-	(q15_t)0x4CE1, (q15_t)0x6657, (q15_t)0x4C90, (q15_t)0x6693,
-	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4BEF, (q15_t)0x670B,
-	(q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4B4C, (q15_t)0x6782,
-	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AA9, (q15_t)0x67F7,
-	(q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A06, (q15_t)0x686C,
-	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4961, (q15_t)0x68E0,
-	(q15_t)0x490F, (q15_t)0x6919, (q15_t)0x48BC, (q15_t)0x6953,
-	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x4816, (q15_t)0x69C4,
-	(q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x4770, (q15_t)0x6A35,
-	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46C9, (q15_t)0x6AA5,
-	(q15_t)0x4675, (q15_t)0x6ADC, (q15_t)0x4621, (q15_t)0x6B13,
-	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x4578, (q15_t)0x6B81,
-	(q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x44CF, (q15_t)0x6BEE,
-	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4425, (q15_t)0x6C59,
-	(q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x437B, (q15_t)0x6CC4,
-	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x42D0, (q15_t)0x6D2D,
-	(q15_t)0x427A, (q15_t)0x6D62, (q15_t)0x4224, (q15_t)0x6D96,
-	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4177, (q15_t)0x6DFD,
-	(q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40CA, (q15_t)0x6E63,
-	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x401D, (q15_t)0x6EC9,
-	(q15_t)0x3FC5, (q15_t)0x6EFB, (q15_t)0x3F6E, (q15_t)0x6F2D,
-	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3EBF, (q15_t)0x6F90,
-	(q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3E10, (q15_t)0x6FF2,
-	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D60, (q15_t)0x7053,
-	(q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CAF, (q15_t)0x70B3,
-	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BFD, (q15_t)0x7112,
-	(q15_t)0x3BA5, (q15_t)0x7141, (q15_t)0x3B4C, (q15_t)0x716F,
-	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A99, (q15_t)0x71CC,
-	(q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x39E6, (q15_t)0x7227,
-	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3932, (q15_t)0x7282,
-	(q15_t)0x38D8, (q15_t)0x72AF, (q15_t)0x387E, (q15_t)0x72DB,
-	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x37CA, (q15_t)0x7333,
-	(q15_t)0x376F, (q15_t)0x735F, (q15_t)0x3714, (q15_t)0x738A,
-	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x365F, (q15_t)0x73E0,
-	(q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35A8, (q15_t)0x7435,
-	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x34F2, (q15_t)0x7489,
-	(q15_t)0x3496, (q15_t)0x74B2, (q15_t)0x343A, (q15_t)0x74DB,
-	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3382, (q15_t)0x752D,
-	(q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32CA, (q15_t)0x757D,
-	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3211, (q15_t)0x75CC,
-	(q15_t)0x31B5, (q15_t)0x75F4, (q15_t)0x3158, (q15_t)0x761B,
-	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x309E, (q15_t)0x7668,
-	(q15_t)0x3041, (q15_t)0x768E, (q15_t)0x2FE4, (q15_t)0x76B3,
-	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F29, (q15_t)0x76FE,
-	(q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E6E, (q15_t)0x7747,
-	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2DB3, (q15_t)0x7790,
-	(q15_t)0x2D55, (q15_t)0x77B4, (q15_t)0x2CF7, (q15_t)0x77D7,
-	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2C3A, (q15_t)0x781D,
-	(q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2B7D, (q15_t)0x7862,
-	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AC0, (q15_t)0x78A6,
-	(q15_t)0x2A61, (q15_t)0x78C7, (q15_t)0x2A02, (q15_t)0x78E8,
-	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2944, (q15_t)0x792A,
-	(q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x2886, (q15_t)0x796A,
-	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27C7, (q15_t)0x79A9,
-	(q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2707, (q15_t)0x79E7,
-	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x2648, (q15_t)0x7A24,
-	(q15_t)0x25E8, (q15_t)0x7A42, (q15_t)0x2588, (q15_t)0x7A5F,
-	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x24C7, (q15_t)0x7A9A,
-	(q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2407, (q15_t)0x7AD3,
-	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2345, (q15_t)0x7B0B,
-	(q15_t)0x22E5, (q15_t)0x7B26, (q15_t)0x2284, (q15_t)0x7B42,
-	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x21C2, (q15_t)0x7B77,
-	(q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x2100, (q15_t)0x7BAC,
-	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x203E, (q15_t)0x7BDF,
-	(q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1F7B, (q15_t)0x7C11,
-	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1EB8, (q15_t)0x7C42,
-	(q15_t)0x1E56, (q15_t)0x7C5A, (q15_t)0x1DF5, (q15_t)0x7C71,
-	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1D31, (q15_t)0x7CA0,
-	(q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C6D, (q15_t)0x7CCD,
-	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BA9, (q15_t)0x7CF9,
-	(q15_t)0x1B47, (q15_t)0x7D0F, (q15_t)0x1AE4, (q15_t)0x7D24,
-	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x1A20, (q15_t)0x7D4E,
-	(q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x195B, (q15_t)0x7D76,
-	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1896, (q15_t)0x7D9D,
-	(q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x17D0, (q15_t)0x7DC3,
-	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x170A, (q15_t)0x7DE8,
-	(q15_t)0x16A8, (q15_t)0x7DFA, (q15_t)0x1645, (q15_t)0x7E0C,
-	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x157F, (q15_t)0x7E2E,
-	(q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14B8, (q15_t)0x7E4F,
-	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x13F2, (q15_t)0x7E6F,
-	(q15_t)0x138E, (q15_t)0x7E7F, (q15_t)0x132B, (q15_t)0x7E8E,
-	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1264, (q15_t)0x7EAB,
-	(q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x119D, (q15_t)0x7EC8,
-	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x10D6, (q15_t)0x7EE3,
-	(q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x100E, (q15_t)0x7EFD,
-	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0F47, (q15_t)0x7F15,
-	(q15_t)0x0EE3, (q15_t)0x7F21, (q15_t)0x0E7F, (q15_t)0x7F2D,
-	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0DB7, (q15_t)0x7F43,
-	(q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0CEF, (q15_t)0x7F58,
-	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C27, (q15_t)0x7F6B,
-	(q15_t)0x0BC3, (q15_t)0x7F75, (q15_t)0x0B5F, (q15_t)0x7F7E,
-	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0A97, (q15_t)0x7F8F,
-	(q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x09CE, (q15_t)0x7F9F,
-	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0906, (q15_t)0x7FAE,
-	(q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x083D, (q15_t)0x7FBC,
-	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0775, (q15_t)0x7FC8,
-	(q15_t)0x0710, (q15_t)0x7FCE, (q15_t)0x06AC, (q15_t)0x7FD3,
-	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x05E3, (q15_t)0x7FDD,
-	(q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x051A, (q15_t)0x7FE5,
-	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0451, (q15_t)0x7FED,
-	(q15_t)0x03ED, (q15_t)0x7FF0, (q15_t)0x0388, (q15_t)0x7FF3,
-	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x02BF, (q15_t)0x7FF8,
-	(q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x01F6, (q15_t)0x7FFC,
-	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x012D, (q15_t)0x7FFE,
-	(q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF,
-	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF9B, (q15_t)0x7FFF,
-	(q15_t)0xFF36, (q15_t)0x7FFF, (q15_t)0xFED2, (q15_t)0x7FFE,
-	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFE09, (q15_t)0x7FFC,
-	(q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD40, (q15_t)0x7FF8,
-	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC77, (q15_t)0x7FF3,
-	(q15_t)0xFC12, (q15_t)0x7FF0, (q15_t)0xFBAE, (q15_t)0x7FED,
-	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFAE5, (q15_t)0x7FE5,
-	(q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xFA1C, (q15_t)0x7FDD,
-	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF953, (q15_t)0x7FD3,
-	(q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF88A, (q15_t)0x7FC8,
-	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF7C2, (q15_t)0x7FBC,
-	(q15_t)0xF75D, (q15_t)0x7FB5, (q15_t)0xF6F9, (q15_t)0x7FAE,
-	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF631, (q15_t)0x7F9F,
-	(q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF568, (q15_t)0x7F8F,
-	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4A0, (q15_t)0x7F7E,
-	(q15_t)0xF43C, (q15_t)0x7F75, (q15_t)0xF3D8, (q15_t)0x7F6B,
-	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF310, (q15_t)0x7F58,
-	(q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF248, (q15_t)0x7F43,
-	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF180, (q15_t)0x7F2D,
-	(q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0B8, (q15_t)0x7F15,
-	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEFF1, (q15_t)0x7EFD,
-	(q15_t)0xEF8D, (q15_t)0x7EF0, (q15_t)0xEF29, (q15_t)0x7EE3,
-	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEE62, (q15_t)0x7EC8,
-	(q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xED9B, (q15_t)0x7EAB,
-	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xECD4, (q15_t)0x7E8E,
-	(q15_t)0xEC71, (q15_t)0x7E7F, (q15_t)0xEC0D, (q15_t)0x7E6F,
-	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEB47, (q15_t)0x7E4F,
-	(q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEA80, (q15_t)0x7E2E,
-	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9BA, (q15_t)0x7E0C,
-	(q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE8F5, (q15_t)0x7DE8,
-	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE82F, (q15_t)0x7DC3,
-	(q15_t)0xE7CC, (q15_t)0x7DB0, (q15_t)0xE769, (q15_t)0x7D9D,
-	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE6A4, (q15_t)0x7D76,
-	(q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE5DF, (q15_t)0x7D4E,
-	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE51B, (q15_t)0x7D24,
-	(q15_t)0xE4B8, (q15_t)0x7D0F, (q15_t)0xE456, (q15_t)0x7CF9,
-	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE392, (q15_t)0x7CCD,
-	(q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE2CE, (q15_t)0x7CA0,
-	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE20A, (q15_t)0x7C71,
-	(q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE147, (q15_t)0x7C42,
-	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE084, (q15_t)0x7C11,
-	(q15_t)0xE023, (q15_t)0x7BF8, (q15_t)0xDFC1, (q15_t)0x7BDF,
-	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDEFF, (q15_t)0x7BAC,
-	(q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE3D, (q15_t)0x7B77,
-	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD7B, (q15_t)0x7B42,
-	(q15_t)0xDD1A, (q15_t)0x7B26, (q15_t)0xDCBA, (q15_t)0x7B0B,
-	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDBF8, (q15_t)0x7AD3,
-	(q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDB38, (q15_t)0x7A9A,
-	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA77, (q15_t)0x7A5F,
-	(q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9B7, (q15_t)0x7A24,
-	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD8F8, (q15_t)0x79E7,
-	(q15_t)0xD898, (q15_t)0x79C8, (q15_t)0xD838, (q15_t)0x79A9,
-	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD779, (q15_t)0x796A,
-	(q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6BB, (q15_t)0x792A,
-	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD5FD, (q15_t)0x78E8,
-	(q15_t)0xD59E, (q15_t)0x78C7, (q15_t)0xD53F, (q15_t)0x78A6,
-	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD482, (q15_t)0x7862,
-	(q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD3C5, (q15_t)0x781D,
-	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD308, (q15_t)0x77D7,
-	(q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD24C, (q15_t)0x7790,
-	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD191, (q15_t)0x7747,
-	(q15_t)0xD133, (q15_t)0x7723, (q15_t)0xD0D6, (q15_t)0x76FE,
-	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xD01B, (q15_t)0x76B3,
-	(q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF61, (q15_t)0x7668,
-	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCEA7, (q15_t)0x761B,
-	(q15_t)0xCE4A, (q15_t)0x75F4, (q15_t)0xCDEE, (q15_t)0x75CC,
-	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCD35, (q15_t)0x757D,
-	(q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCC7D, (q15_t)0x752D,
-	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBC5, (q15_t)0x74DB,
-	(q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB0D, (q15_t)0x7489,
-	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xCA57, (q15_t)0x7435,
-	(q15_t)0xC9FB, (q15_t)0x740B, (q15_t)0xC9A0, (q15_t)0x73E0,
-	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC8EB, (q15_t)0x738A,
-	(q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC835, (q15_t)0x7333,
-	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC781, (q15_t)0x72DB,
-	(q15_t)0xC727, (q15_t)0x72AF, (q15_t)0xC6CD, (q15_t)0x7282,
-	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC619, (q15_t)0x7227,
-	(q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC566, (q15_t)0x71CC,
-	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4B3, (q15_t)0x716F,
-	(q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC402, (q15_t)0x7112,
-	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC350, (q15_t)0x70B3,
-	(q15_t)0xC2F8, (q15_t)0x7083, (q15_t)0xC29F, (q15_t)0x7053,
-	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC1EF, (q15_t)0x6FF2,
-	(q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC140, (q15_t)0x6F90,
-	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC091, (q15_t)0x6F2D,
-	(q15_t)0xC03A, (q15_t)0x6EFB, (q15_t)0xBFE2, (q15_t)0x6EC9,
-	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBF35, (q15_t)0x6E63,
-	(q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBE88, (q15_t)0x6DFD,
-	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBDDB, (q15_t)0x6D96,
-	(q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD2F, (q15_t)0x6D2D,
-	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBC84, (q15_t)0x6CC4,
-	(q15_t)0xBC2F, (q15_t)0x6C8F, (q15_t)0xBBDA, (q15_t)0x6C59,
-	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBB30, (q15_t)0x6BEE,
-	(q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBA87, (q15_t)0x6B81,
-	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB9DE, (q15_t)0x6B13,
-	(q15_t)0xB98A, (q15_t)0x6ADC, (q15_t)0xB936, (q15_t)0x6AA5,
-	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB88F, (q15_t)0x6A35,
-	(q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB7E9, (q15_t)0x69C4,
-	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB743, (q15_t)0x6953,
-	(q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB69E, (q15_t)0x68E0,
-	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB5F9, (q15_t)0x686C,
-	(q15_t)0xB5A7, (q15_t)0x6832, (q15_t)0xB556, (q15_t)0x67F7,
-	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB4B3, (q15_t)0x6782,
-	(q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB410, (q15_t)0x670B,
-	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB36F, (q15_t)0x6693,
-	(q15_t)0xB31E, (q15_t)0x6657, (q15_t)0xB2CE, (q15_t)0x661A,
-	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB22E, (q15_t)0x65A0,
-	(q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB18F, (q15_t)0x6526,
-	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB0F0, (q15_t)0x64AA,
-	(q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB053, (q15_t)0x642D,
-	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAFB6, (q15_t)0x63B0,
-	(q15_t)0xAF68, (q15_t)0x6371, (q15_t)0xAF1A, (q15_t)0x6331,
-	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE7E, (q15_t)0x62B2,
-	(q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xADE3, (q15_t)0x6231,
-	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD4A, (q15_t)0x61B0,
-	(q15_t)0xACFD, (q15_t)0x616F, (q15_t)0xACB1, (q15_t)0x612D,
-	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAC18, (q15_t)0x60AA,
-	(q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xAB81, (q15_t)0x6026,
-	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAAEA, (q15_t)0x5FA0,
-	(q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA54, (q15_t)0x5F1A,
-	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA9BF, (q15_t)0x5E93,
-	(q15_t)0xA975, (q15_t)0x5E50, (q15_t)0xA92B, (q15_t)0x5E0B,
-	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA898, (q15_t)0x5D83,
-	(q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA806, (q15_t)0x5CF9,
-	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA774, (q15_t)0x5C6E,
-	(q15_t)0xA72B, (q15_t)0x5C29, (q15_t)0xA6E3, (q15_t)0x5BE3,
-	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA653, (q15_t)0x5B56,
-	(q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA5C4, (q15_t)0x5AC9,
-	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA536, (q15_t)0x5A3B,
-	(q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4A9, (q15_t)0x59AC,
-	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA41C, (q15_t)0x591C,
-	(q15_t)0xA3D6, (q15_t)0x58D4, (q15_t)0xA391, (q15_t)0x588B,
-	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA306, (q15_t)0x57F9,
-	(q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA27C, (q15_t)0x5767,
-	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1F4, (q15_t)0x56D4,
-	(q15_t)0xA1AF, (q15_t)0x568A, (q15_t)0xA16C, (q15_t)0x5640,
-	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA0E5, (q15_t)0x55AB,
-	(q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA05F, (q15_t)0x5515,
-	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FD9, (q15_t)0x547E,
-	(q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F55, (q15_t)0x53E7,
-	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9ED2, (q15_t)0x534E,
-	(q15_t)0x9E90, (q15_t)0x5302, (q15_t)0x9E4F, (q15_t)0x52B5,
-	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9DCE, (q15_t)0x521C,
-	(q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D4D, (q15_t)0x5181,
-	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CCE, (q15_t)0x50E5,
-	(q15_t)0x9C8E, (q15_t)0x5097, (q15_t)0x9C4F, (q15_t)0x5049,
-	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9BD2, (q15_t)0x4FAC,
-	(q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B55, (q15_t)0x4F0F,
-	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AD9, (q15_t)0x4E70,
-	(q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A5F, (q15_t)0x4DD1,
-	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x99E5, (q15_t)0x4D31,
-	(q15_t)0x99A8, (q15_t)0x4CE1, (q15_t)0x996C, (q15_t)0x4C90,
-	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98F4, (q15_t)0x4BEF,
-	(q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x987D, (q15_t)0x4B4C,
-	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9808, (q15_t)0x4AA9,
-	(q15_t)0x97CD, (q15_t)0x4A58, (q15_t)0x9793, (q15_t)0x4A06,
-	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x971F, (q15_t)0x4961,
-	(q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x96AC, (q15_t)0x48BC,
-	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x963B, (q15_t)0x4816,
-	(q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95CA, (q15_t)0x4770,
-	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x955A, (q15_t)0x46C9,
-	(q15_t)0x9523, (q15_t)0x4675, (q15_t)0x94EC, (q15_t)0x4621,
-	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x947E, (q15_t)0x4578,
-	(q15_t)0x9447, (q15_t)0x4524, (q15_t)0x9411, (q15_t)0x44CF,
-	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93A6, (q15_t)0x4425,
-	(q15_t)0x9370, (q15_t)0x43D0, (q15_t)0x933B, (q15_t)0x437B,
-	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x92D2, (q15_t)0x42D0,
-	(q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9269, (q15_t)0x4224,
-	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9202, (q15_t)0x4177,
-	(q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x919C, (q15_t)0x40CA,
-	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9136, (q15_t)0x401D,
-	(q15_t)0x9104, (q15_t)0x3FC5, (q15_t)0x90D2, (q15_t)0x3F6E,
-	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x906F, (q15_t)0x3EBF,
-	(q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x900D, (q15_t)0x3E10,
-	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FAC, (q15_t)0x3D60,
-	(q15_t)0x8F7C, (q15_t)0x3D07, (q15_t)0x8F4C, (q15_t)0x3CAF,
-	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8EED, (q15_t)0x3BFD,
-	(q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8E90, (q15_t)0x3B4C,
-	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E33, (q15_t)0x3A99,
-	(q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DD8, (q15_t)0x39E6,
-	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D7D, (q15_t)0x3932,
-	(q15_t)0x8D50, (q15_t)0x38D8, (q15_t)0x8D24, (q15_t)0x387E,
-	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CCC, (q15_t)0x37CA,
-	(q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C75, (q15_t)0x3714,
-	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C1F, (q15_t)0x365F,
-	(q15_t)0x8BF4, (q15_t)0x3604, (q15_t)0x8BCA, (q15_t)0x35A8,
-	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B76, (q15_t)0x34F2,
-	(q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8B24, (q15_t)0x343A,
-	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AD2, (q15_t)0x3382,
-	(q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A82, (q15_t)0x32CA,
-	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A33, (q15_t)0x3211,
-	(q15_t)0x8A0B, (q15_t)0x31B5, (q15_t)0x89E4, (q15_t)0x3158,
-	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8997, (q15_t)0x309E,
-	(q15_t)0x8971, (q15_t)0x3041, (q15_t)0x894C, (q15_t)0x2FE4,
-	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8901, (q15_t)0x2F29,
-	(q15_t)0x88DC, (q15_t)0x2ECC, (q15_t)0x88B8, (q15_t)0x2E6E,
-	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x886F, (q15_t)0x2DB3,
-	(q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x8828, (q15_t)0x2CF7,
-	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87E2, (q15_t)0x2C3A,
-	(q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x879D, (q15_t)0x2B7D,
-	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8759, (q15_t)0x2AC0,
-	(q15_t)0x8738, (q15_t)0x2A61, (q15_t)0x8717, (q15_t)0x2A02,
-	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86D5, (q15_t)0x2944,
-	(q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x8695, (q15_t)0x2886,
-	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8656, (q15_t)0x27C7,
-	(q15_t)0x8637, (q15_t)0x2767, (q15_t)0x8618, (q15_t)0x2707,
-	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85DB, (q15_t)0x2648,
-	(q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x85A0, (q15_t)0x2588,
-	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8565, (q15_t)0x24C7,
-	(q15_t)0x8549, (q15_t)0x2467, (q15_t)0x852C, (q15_t)0x2407,
-	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84F4, (q15_t)0x2345,
-	(q15_t)0x84D9, (q15_t)0x22E5, (q15_t)0x84BD, (q15_t)0x2284,
-	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x8488, (q15_t)0x21C2,
-	(q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8453, (q15_t)0x2100,
-	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8420, (q15_t)0x203E,
-	(q15_t)0x8407, (q15_t)0x1FDC, (q15_t)0x83EE, (q15_t)0x1F7B,
-	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83BD, (q15_t)0x1EB8,
-	(q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x838E, (q15_t)0x1DF5,
-	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x835F, (q15_t)0x1D31,
-	(q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x8332, (q15_t)0x1C6D,
-	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x8306, (q15_t)0x1BA9,
-	(q15_t)0x82F0, (q15_t)0x1B47, (q15_t)0x82DB, (q15_t)0x1AE4,
-	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x82B1, (q15_t)0x1A20,
-	(q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8289, (q15_t)0x195B,
-	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8262, (q15_t)0x1896,
-	(q15_t)0x824F, (q15_t)0x1833, (q15_t)0x823C, (q15_t)0x17D0,
-	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8217, (q15_t)0x170A,
-	(q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81F3, (q15_t)0x1645,
-	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D1, (q15_t)0x157F,
-	(q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B0, (q15_t)0x14B8,
-	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8190, (q15_t)0x13F2,
-	(q15_t)0x8180, (q15_t)0x138E, (q15_t)0x8171, (q15_t)0x132B,
-	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8154, (q15_t)0x1264,
-	(q15_t)0x8145, (q15_t)0x1201, (q15_t)0x8137, (q15_t)0x119D,
-	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x811C, (q15_t)0x10D6,
-	(q15_t)0x810F, (q15_t)0x1072, (q15_t)0x8102, (q15_t)0x100E,
-	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80EA, (q15_t)0x0F47,
-	(q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80D2, (q15_t)0x0E7F,
-	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80BC, (q15_t)0x0DB7,
-	(q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80A7, (q15_t)0x0CEF,
-	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8094, (q15_t)0x0C27,
-	(q15_t)0x808A, (q15_t)0x0BC3, (q15_t)0x8081, (q15_t)0x0B5F,
-	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8070, (q15_t)0x0A97,
-	(q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8060, (q15_t)0x09CE,
-	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8051, (q15_t)0x0906,
-	(q15_t)0x804A, (q15_t)0x08A2, (q15_t)0x8043, (q15_t)0x083D,
-	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x8037, (q15_t)0x0775,
-	(q15_t)0x8031, (q15_t)0x0710, (q15_t)0x802C, (q15_t)0x06AC,
-	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8022, (q15_t)0x05E3,
-	(q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801A, (q15_t)0x051A,
-	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x8012, (q15_t)0x0451,
-	(q15_t)0x800F, (q15_t)0x03ED, (q15_t)0x800C, (q15_t)0x0388,
-	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8007, (q15_t)0x02BF,
-	(q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8003, (q15_t)0x01F6,
-	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x012D,
-	(q15_t)0x8000, (q15_t)0x00C9, (q15_t)0x8000, (q15_t)0x0064,
-	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFF9B,
-	(q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8001, (q15_t)0xFED2,
-	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003, (q15_t)0xFE09,
-	(q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8007, (q15_t)0xFD40,
-	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800C, (q15_t)0xFC77,
-	(q15_t)0x800F, (q15_t)0xFC12, (q15_t)0x8012, (q15_t)0xFBAE,
-	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801A, (q15_t)0xFAE5,
-	(q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8022, (q15_t)0xFA1C,
-	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x802C, (q15_t)0xF953,
-	(q15_t)0x8031, (q15_t)0xF8EF, (q15_t)0x8037, (q15_t)0xF88A,
-	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8043, (q15_t)0xF7C2,
-	(q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x8051, (q15_t)0xF6F9,
-	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8060, (q15_t)0xF631,
-	(q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x8070, (q15_t)0xF568,
-	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x8081, (q15_t)0xF4A0,
-	(q15_t)0x808A, (q15_t)0xF43C, (q15_t)0x8094, (q15_t)0xF3D8,
-	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80A7, (q15_t)0xF310,
-	(q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80BC, (q15_t)0xF248,
-	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80D2, (q15_t)0xF180,
-	(q15_t)0x80DE, (q15_t)0xF11C, (q15_t)0x80EA, (q15_t)0xF0B8,
-	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x8102, (q15_t)0xEFF1,
-	(q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x811C, (q15_t)0xEF29,
-	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8137, (q15_t)0xEE62,
-	(q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x8154, (q15_t)0xED9B,
-	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8171, (q15_t)0xECD4,
-	(q15_t)0x8180, (q15_t)0xEC71, (q15_t)0x8190, (q15_t)0xEC0D,
-	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81B0, (q15_t)0xEB47,
-	(q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81D1, (q15_t)0xEA80,
-	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81F3, (q15_t)0xE9BA,
-	(q15_t)0x8205, (q15_t)0xE957, (q15_t)0x8217, (q15_t)0xE8F5,
-	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x823C, (q15_t)0xE82F,
-	(q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8262, (q15_t)0xE769,
-	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8289, (q15_t)0xE6A4,
-	(q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82B1, (q15_t)0xE5DF,
-	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82DB, (q15_t)0xE51B,
-	(q15_t)0x82F0, (q15_t)0xE4B8, (q15_t)0x8306, (q15_t)0xE456,
-	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8332, (q15_t)0xE392,
-	(q15_t)0x8348, (q15_t)0xE330, (q15_t)0x835F, (q15_t)0xE2CE,
-	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x838E, (q15_t)0xE20A,
-	(q15_t)0x83A5, (q15_t)0xE1A9, (q15_t)0x83BD, (q15_t)0xE147,
-	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x83EE, (q15_t)0xE084,
-	(q15_t)0x8407, (q15_t)0xE023, (q15_t)0x8420, (q15_t)0xDFC1,
-	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8453, (q15_t)0xDEFF,
-	(q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x8488, (q15_t)0xDE3D,
-	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84BD, (q15_t)0xDD7B,
-	(q15_t)0x84D9, (q15_t)0xDD1A, (q15_t)0x84F4, (q15_t)0xDCBA,
-	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x852C, (q15_t)0xDBF8,
-	(q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8565, (q15_t)0xDB38,
-	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85A0, (q15_t)0xDA77,
-	(q15_t)0x85BD, (q15_t)0xDA17, (q15_t)0x85DB, (q15_t)0xD9B7,
-	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8618, (q15_t)0xD8F8,
-	(q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8656, (q15_t)0xD838,
-	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8695, (q15_t)0xD779,
-	(q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86D5, (q15_t)0xD6BB,
-	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8717, (q15_t)0xD5FD,
-	(q15_t)0x8738, (q15_t)0xD59E, (q15_t)0x8759, (q15_t)0xD53F,
-	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x879D, (q15_t)0xD482,
-	(q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87E2, (q15_t)0xD3C5,
-	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8828, (q15_t)0xD308,
-	(q15_t)0x884B, (q15_t)0xD2AA, (q15_t)0x886F, (q15_t)0xD24C,
-	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88B8, (q15_t)0xD191,
-	(q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x8901, (q15_t)0xD0D6,
-	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x894C, (q15_t)0xD01B,
-	(q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8997, (q15_t)0xCF61,
-	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x89E4, (q15_t)0xCEA7,
-	(q15_t)0x8A0B, (q15_t)0xCE4A, (q15_t)0x8A33, (q15_t)0xCDEE,
-	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8A82, (q15_t)0xCD35,
-	(q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8AD2, (q15_t)0xCC7D,
-	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B24, (q15_t)0xCBC5,
-	(q15_t)0x8B4D, (q15_t)0xCB69, (q15_t)0x8B76, (q15_t)0xCB0D,
-	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BCA, (q15_t)0xCA57,
-	(q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C1F, (q15_t)0xC9A0,
-	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C75, (q15_t)0xC8EB,
-	(q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CCC, (q15_t)0xC835,
-	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D24, (q15_t)0xC781,
-	(q15_t)0x8D50, (q15_t)0xC727, (q15_t)0x8D7D, (q15_t)0xC6CD,
-	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8DD8, (q15_t)0xC619,
-	(q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E33, (q15_t)0xC566,
-	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E90, (q15_t)0xC4B3,
-	(q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8EED, (q15_t)0xC402,
-	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F4C, (q15_t)0xC350,
-	(q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8FAC, (q15_t)0xC29F,
-	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x900D, (q15_t)0xC1EF,
-	(q15_t)0x903E, (q15_t)0xC197, (q15_t)0x906F, (q15_t)0xC140,
-	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x90D2, (q15_t)0xC091,
-	(q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x9136, (q15_t)0xBFE2,
-	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x919C, (q15_t)0xBF35,
-	(q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x9202, (q15_t)0xBE88,
-	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9269, (q15_t)0xBDDB,
-	(q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x92D2, (q15_t)0xBD2F,
-	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x933B, (q15_t)0xBC84,
-	(q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x93A6, (q15_t)0xBBDA,
-	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9411, (q15_t)0xBB30,
-	(q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x947E, (q15_t)0xBA87,
-	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x94EC, (q15_t)0xB9DE,
-	(q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x955A, (q15_t)0xB936,
-	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95CA, (q15_t)0xB88F,
-	(q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x963B, (q15_t)0xB7E9,
-	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96AC, (q15_t)0xB743,
-	(q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x971F, (q15_t)0xB69E,
-	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9793, (q15_t)0xB5F9,
-	(q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x9808, (q15_t)0xB556,
-	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x987D, (q15_t)0xB4B3,
-	(q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98F4, (q15_t)0xB410,
-	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x996C, (q15_t)0xB36F,
-	(q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99E5, (q15_t)0xB2CE,
-	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A5F, (q15_t)0xB22E,
-	(q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9AD9, (q15_t)0xB18F,
-	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B55, (q15_t)0xB0F0,
-	(q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9BD2, (q15_t)0xB053,
-	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C4F, (q15_t)0xAFB6,
-	(q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CCE, (q15_t)0xAF1A,
-	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D4D, (q15_t)0xAE7E,
-	(q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DCE, (q15_t)0xADE3,
-	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E4F, (q15_t)0xAD4A,
-	(q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9ED2, (q15_t)0xACB1,
-	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F55, (q15_t)0xAC18,
-	(q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FD9, (q15_t)0xAB81,
-	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA05F, (q15_t)0xAAEA,
-	(q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA0E5, (q15_t)0xAA54,
-	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA16C, (q15_t)0xA9BF,
-	(q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1F4, (q15_t)0xA92B,
-	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA27C, (q15_t)0xA898,
-	(q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA306, (q15_t)0xA806,
-	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA391, (q15_t)0xA774,
-	(q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA41C, (q15_t)0xA6E3,
-	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4A9, (q15_t)0xA653,
-	(q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA536, (q15_t)0xA5C4,
-	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5C4, (q15_t)0xA536,
-	(q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA653, (q15_t)0xA4A9,
-	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6E3, (q15_t)0xA41C,
-	(q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA774, (q15_t)0xA391,
-	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA806, (q15_t)0xA306,
-	(q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA898, (q15_t)0xA27C,
-	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA92B, (q15_t)0xA1F4,
-	(q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA9BF, (q15_t)0xA16C,
-	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA54, (q15_t)0xA0E5,
-	(q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAEA, (q15_t)0xA05F,
-	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB81, (q15_t)0x9FD9,
-	(q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xAC18, (q15_t)0x9F55,
-	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACB1, (q15_t)0x9ED2,
-	(q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD4A, (q15_t)0x9E4F,
-	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADE3, (q15_t)0x9DCE,
-	(q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE7E, (q15_t)0x9D4D,
-	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF1A, (q15_t)0x9CCE,
-	(q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAFB6, (q15_t)0x9C4F,
-	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB053, (q15_t)0x9BD2,
-	(q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0F0, (q15_t)0x9B55,
-	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB18F, (q15_t)0x9AD9,
-	(q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB22E, (q15_t)0x9A5F,
-	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2CE, (q15_t)0x99E5,
-	(q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB36F, (q15_t)0x996C,
-	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB410, (q15_t)0x98F4,
-	(q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB4B3, (q15_t)0x987D,
-	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB556, (q15_t)0x9808,
-	(q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5F9, (q15_t)0x9793,
-	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB69E, (q15_t)0x971F,
-	(q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB743, (q15_t)0x96AC,
-	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7E9, (q15_t)0x963B,
-	(q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB88F, (q15_t)0x95CA,
-	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB936, (q15_t)0x955A,
-	(q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9DE, (q15_t)0x94EC,
-	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA87, (q15_t)0x947E,
-	(q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB30, (q15_t)0x9411,
-	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBBDA, (q15_t)0x93A6,
-	(q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC84, (q15_t)0x933B,
-	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD2F, (q15_t)0x92D2,
-	(q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDDB, (q15_t)0x9269,
-	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE88, (q15_t)0x9202,
-	(q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF35, (q15_t)0x919C,
-	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFE2, (q15_t)0x9136,
-	(q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC091, (q15_t)0x90D2,
-	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC140, (q15_t)0x906F,
-	(q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1EF, (q15_t)0x900D,
-	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC29F, (q15_t)0x8FAC,
-	(q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC350, (q15_t)0x8F4C,
-	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC402, (q15_t)0x8EED,
-	(q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC4B3, (q15_t)0x8E90,
-	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC566, (q15_t)0x8E33,
-	(q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC619, (q15_t)0x8DD8,
-	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6CD, (q15_t)0x8D7D,
-	(q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC781, (q15_t)0x8D24,
-	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC835, (q15_t)0x8CCC,
-	(q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8EB, (q15_t)0x8C75,
-	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9A0, (q15_t)0x8C1F,
-	(q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA57, (q15_t)0x8BCA,
-	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB0D, (q15_t)0x8B76,
-	(q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCBC5, (q15_t)0x8B24,
-	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC7D, (q15_t)0x8AD2,
-	(q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD35, (q15_t)0x8A82,
-	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDEE, (q15_t)0x8A33,
-	(q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCEA7, (q15_t)0x89E4,
-	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF61, (q15_t)0x8997,
-	(q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xD01B, (q15_t)0x894C,
-	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0D6, (q15_t)0x8901,
-	(q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD191, (q15_t)0x88B8,
-	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD24C, (q15_t)0x886F,
-	(q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD308, (q15_t)0x8828,
-	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD3C5, (q15_t)0x87E2,
-	(q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD482, (q15_t)0x879D,
-	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD53F, (q15_t)0x8759,
-	(q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5FD, (q15_t)0x8717,
-	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD6BB, (q15_t)0x86D5,
-	(q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD779, (q15_t)0x8695,
-	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD838, (q15_t)0x8656,
-	(q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8F8, (q15_t)0x8618,
-	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD9B7, (q15_t)0x85DB,
-	(q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA77, (q15_t)0x85A0,
-	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB38, (q15_t)0x8565,
-	(q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBF8, (q15_t)0x852C,
-	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDCBA, (q15_t)0x84F4,
-	(q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD7B, (q15_t)0x84BD,
-	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE3D, (q15_t)0x8488,
-	(q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDEFF, (q15_t)0x8453,
-	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDFC1, (q15_t)0x8420,
-	(q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE084, (q15_t)0x83EE,
-	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE147, (q15_t)0x83BD,
-	(q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE20A, (q15_t)0x838E,
-	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE2CE, (q15_t)0x835F,
-	(q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE392, (q15_t)0x8332,
-	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE456, (q15_t)0x8306,
-	(q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE51B, (q15_t)0x82DB,
-	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5DF, (q15_t)0x82B1,
-	(q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE6A4, (q15_t)0x8289,
-	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE769, (q15_t)0x8262,
-	(q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE82F, (q15_t)0x823C,
-	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8F5, (q15_t)0x8217,
-	(q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE9BA, (q15_t)0x81F3,
-	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA80, (q15_t)0x81D1,
-	(q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB47, (q15_t)0x81B0,
-	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC0D, (q15_t)0x8190,
-	(q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECD4, (q15_t)0x8171,
-	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED9B, (q15_t)0x8154,
-	(q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE62, (q15_t)0x8137,
-	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF29, (q15_t)0x811C,
-	(q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFF1, (q15_t)0x8102,
-	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF0B8, (q15_t)0x80EA,
-	(q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF180, (q15_t)0x80D2,
-	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF248, (q15_t)0x80BC,
-	(q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF310, (q15_t)0x80A7,
-	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3D8, (q15_t)0x8094,
-	(q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF4A0, (q15_t)0x8081,
-	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF568, (q15_t)0x8070,
-	(q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF631, (q15_t)0x8060,
-	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6F9, (q15_t)0x8051,
-	(q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF7C2, (q15_t)0x8043,
-	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF88A, (q15_t)0x8037,
-	(q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF953, (q15_t)0x802C,
-	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA1C, (q15_t)0x8022,
-	(q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAE5, (q15_t)0x801A,
-	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFBAE, (q15_t)0x8012,
-	(q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC77, (q15_t)0x800C,
-	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD40, (q15_t)0x8007,
-	(q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFE09, (q15_t)0x8003,
-	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFED2, (q15_t)0x8001,
-	(q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
-/**
-  @par
-  Example code for q15 Twiddle factors Generation::
-  @par
-  <pre>for (i = 0; i< 3N/4; i++)
-  {
-     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
-     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
-  } </pre>
-  @par
-  where N = 4096, PI = 3.14159265358979
-  @par
-  Cos and Sin values are interleaved fashion
-  @par
-  Convert Floating point to q15(Fixed point 1.15):
- 	round(twiddleCoefq15(i) * pow(2, 15))
- */
-const q15_t twiddleCoef_4096_q15[6144] =
-{
-	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0032,
-	(q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0096,
-	(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x00FB,
-	(q15_t)0x7FFE, (q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x015F,
-	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01C4,
-	(q15_t)0x7FFC, (q15_t)0x01F6, (q15_t)0x7FFB, (q15_t)0x0228,
-	(q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF9, (q15_t)0x028D,
-	(q15_t)0x7FF8, (q15_t)0x02BF, (q15_t)0x7FF7, (q15_t)0x02F1,
-	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF4, (q15_t)0x0356,
-	(q15_t)0x7FF3, (q15_t)0x0388, (q15_t)0x7FF2, (q15_t)0x03BA,
-	(q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FEE, (q15_t)0x041F,
-	(q15_t)0x7FED, (q15_t)0x0451, (q15_t)0x7FEB, (q15_t)0x0483,
-	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE7, (q15_t)0x04E8,
-	(q15_t)0x7FE5, (q15_t)0x051A, (q15_t)0x7FE3, (q15_t)0x054C,
-	(q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDF, (q15_t)0x05B1,
-	(q15_t)0x7FDD, (q15_t)0x05E3, (q15_t)0x7FDA, (q15_t)0x0615,
-	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD6, (q15_t)0x067A,
-	(q15_t)0x7FD3, (q15_t)0x06AC, (q15_t)0x7FD0, (q15_t)0x06DE,
-	(q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FCB, (q15_t)0x0742,
-	(q15_t)0x7FC8, (q15_t)0x0775, (q15_t)0x7FC5, (q15_t)0x07A7,
-	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBF, (q15_t)0x080B,
-	(q15_t)0x7FBC, (q15_t)0x083D, (q15_t)0x7FB8, (q15_t)0x086F,
-	(q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FB1, (q15_t)0x08D4,
-	(q15_t)0x7FAE, (q15_t)0x0906, (q15_t)0x7FAA, (q15_t)0x0938,
-	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7FA3, (q15_t)0x099C,
-	(q15_t)0x7F9F, (q15_t)0x09CE, (q15_t)0x7F9B, (q15_t)0x0A00,
-	(q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F93, (q15_t)0x0A65,
-	(q15_t)0x7F8F, (q15_t)0x0A97, (q15_t)0x7F8B, (q15_t)0x0AC9,
-	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F82, (q15_t)0x0B2D,
-	(q15_t)0x7F7E, (q15_t)0x0B5F, (q15_t)0x7F79, (q15_t)0x0B91,
-	(q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F70, (q15_t)0x0BF5,
-	(q15_t)0x7F6B, (q15_t)0x0C27, (q15_t)0x7F67, (q15_t)0x0C59,
-	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F5D, (q15_t)0x0CBD,
-	(q15_t)0x7F58, (q15_t)0x0CEF, (q15_t)0x7F53, (q15_t)0x0D21,
-	(q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F48, (q15_t)0x0D85,
-	(q15_t)0x7F43, (q15_t)0x0DB7, (q15_t)0x7F3D, (q15_t)0x0DE9,
-	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F32, (q15_t)0x0E4D,
-	(q15_t)0x7F2D, (q15_t)0x0E7F, (q15_t)0x7F27, (q15_t)0x0EB1,
-	(q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F1B, (q15_t)0x0F15,
-	(q15_t)0x7F15, (q15_t)0x0F47, (q15_t)0x7F0F, (q15_t)0x0F79,
-	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7F03, (q15_t)0x0FDD,
-	(q15_t)0x7EFD, (q15_t)0x100E, (q15_t)0x7EF6, (q15_t)0x1040,
-	(q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7EE9, (q15_t)0x10A4,
-	(q15_t)0x7EE3, (q15_t)0x10D6, (q15_t)0x7EDC, (q15_t)0x1108,
-	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7ECF, (q15_t)0x116B,
-	(q15_t)0x7EC8, (q15_t)0x119D, (q15_t)0x7EC1, (q15_t)0x11CF,
-	(q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EB3, (q15_t)0x1232,
-	(q15_t)0x7EAB, (q15_t)0x1264, (q15_t)0x7EA4, (q15_t)0x1296,
-	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E95, (q15_t)0x12F9,
-	(q15_t)0x7E8E, (q15_t)0x132B, (q15_t)0x7E86, (q15_t)0x135D,
-	(q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E77, (q15_t)0x13C0,
-	(q15_t)0x7E6F, (q15_t)0x13F2, (q15_t)0x7E67, (q15_t)0x1423,
-	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E57, (q15_t)0x1487,
-	(q15_t)0x7E4F, (q15_t)0x14B8, (q15_t)0x7E47, (q15_t)0x14EA,
-	(q15_t)0x7E3F, (q15_t)0x151B, (q15_t)0x7E37, (q15_t)0x154D,
-	(q15_t)0x7E2E, (q15_t)0x157F, (q15_t)0x7E26, (q15_t)0x15B0,
-	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7E14, (q15_t)0x1613,
-	(q15_t)0x7E0C, (q15_t)0x1645, (q15_t)0x7E03, (q15_t)0x1676,
-	(q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DF1, (q15_t)0x16D9,
-	(q15_t)0x7DE8, (q15_t)0x170A, (q15_t)0x7DDF, (q15_t)0x173C,
-	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DCD, (q15_t)0x179F,
-	(q15_t)0x7DC3, (q15_t)0x17D0, (q15_t)0x7DBA, (q15_t)0x1802,
-	(q15_t)0x7DB0, (q15_t)0x1833, (q15_t)0x7DA7, (q15_t)0x1864,
-	(q15_t)0x7D9D, (q15_t)0x1896, (q15_t)0x7D94, (q15_t)0x18C7,
-	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D80, (q15_t)0x192A,
-	(q15_t)0x7D76, (q15_t)0x195B, (q15_t)0x7D6C, (q15_t)0x198C,
-	(q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D58, (q15_t)0x19EF,
-	(q15_t)0x7D4E, (q15_t)0x1A20, (q15_t)0x7D43, (q15_t)0x1A51,
-	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D2F, (q15_t)0x1AB3,
-	(q15_t)0x7D24, (q15_t)0x1AE4, (q15_t)0x7D19, (q15_t)0x1B16,
-	(q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7D04, (q15_t)0x1B78,
-	(q15_t)0x7CF9, (q15_t)0x1BA9, (q15_t)0x7CEE, (q15_t)0x1BDA,
-	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CD8, (q15_t)0x1C3C,
-	(q15_t)0x7CCD, (q15_t)0x1C6D, (q15_t)0x7CC2, (q15_t)0x1C9E,
-	(q15_t)0x7CB7, (q15_t)0x1CCF, (q15_t)0x7CAB, (q15_t)0x1D00,
-	(q15_t)0x7CA0, (q15_t)0x1D31, (q15_t)0x7C94, (q15_t)0x1D62,
-	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C7D, (q15_t)0x1DC4,
-	(q15_t)0x7C71, (q15_t)0x1DF5, (q15_t)0x7C66, (q15_t)0x1E25,
-	(q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C4E, (q15_t)0x1E87,
-	(q15_t)0x7C42, (q15_t)0x1EB8, (q15_t)0x7C36, (q15_t)0x1EE9,
-	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C1D, (q15_t)0x1F4A,
-	(q15_t)0x7C11, (q15_t)0x1F7B, (q15_t)0x7C05, (q15_t)0x1FAC,
-	(q15_t)0x7BF8, (q15_t)0x1FDC, (q15_t)0x7BEB, (q15_t)0x200D,
-	(q15_t)0x7BDF, (q15_t)0x203E, (q15_t)0x7BD2, (q15_t)0x206E,
-	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7BB9, (q15_t)0x20D0,
-	(q15_t)0x7BAC, (q15_t)0x2100, (q15_t)0x7B9F, (q15_t)0x2131,
-	(q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B84, (q15_t)0x2192,
-	(q15_t)0x7B77, (q15_t)0x21C2, (q15_t)0x7B6A, (q15_t)0x21F3,
-	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B4F, (q15_t)0x2254,
-	(q15_t)0x7B42, (q15_t)0x2284, (q15_t)0x7B34, (q15_t)0x22B4,
-	(q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B19, (q15_t)0x2315,
-	(q15_t)0x7B0B, (q15_t)0x2345, (q15_t)0x7AFD, (q15_t)0x2376,
-	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AE1, (q15_t)0x23D6,
-	(q15_t)0x7AD3, (q15_t)0x2407, (q15_t)0x7AC5, (q15_t)0x2437,
-	(q15_t)0x7AB6, (q15_t)0x2467, (q15_t)0x7AA8, (q15_t)0x2497,
-	(q15_t)0x7A9A, (q15_t)0x24C7, (q15_t)0x7A8B, (q15_t)0x24F7,
-	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A6E, (q15_t)0x2558,
-	(q15_t)0x7A5F, (q15_t)0x2588, (q15_t)0x7A50, (q15_t)0x25B8,
-	(q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A33, (q15_t)0x2618,
-	(q15_t)0x7A24, (q15_t)0x2648, (q15_t)0x7A15, (q15_t)0x2678,
-	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79F6, (q15_t)0x26D8,
-	(q15_t)0x79E7, (q15_t)0x2707, (q15_t)0x79D8, (q15_t)0x2737,
-	(q15_t)0x79C8, (q15_t)0x2767, (q15_t)0x79B9, (q15_t)0x2797,
-	(q15_t)0x79A9, (q15_t)0x27C7, (q15_t)0x7999, (q15_t)0x27F6,
-	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x797A, (q15_t)0x2856,
-	(q15_t)0x796A, (q15_t)0x2886, (q15_t)0x795A, (q15_t)0x28B5,
-	(q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x793A, (q15_t)0x2915,
-	(q15_t)0x792A, (q15_t)0x2944, (q15_t)0x7919, (q15_t)0x2974,
-	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78F9, (q15_t)0x29D3,
-	(q15_t)0x78E8, (q15_t)0x2A02, (q15_t)0x78D8, (q15_t)0x2A32,
-	(q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78B6, (q15_t)0x2A91,
-	(q15_t)0x78A6, (q15_t)0x2AC0, (q15_t)0x7895, (q15_t)0x2AEF,
-	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7873, (q15_t)0x2B4E,
-	(q15_t)0x7862, (q15_t)0x2B7D, (q15_t)0x7851, (q15_t)0x2BAD,
-	(q15_t)0x7840, (q15_t)0x2BDC, (q15_t)0x782E, (q15_t)0x2C0B,
-	(q15_t)0x781D, (q15_t)0x2C3A, (q15_t)0x780C, (q15_t)0x2C69,
-	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77E9, (q15_t)0x2CC8,
-	(q15_t)0x77D7, (q15_t)0x2CF7, (q15_t)0x77C5, (q15_t)0x2D26,
-	(q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x77A2, (q15_t)0x2D84,
-	(q15_t)0x7790, (q15_t)0x2DB3, (q15_t)0x777E, (q15_t)0x2DE2,
-	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x775A, (q15_t)0x2E3F,
-	(q15_t)0x7747, (q15_t)0x2E6E, (q15_t)0x7735, (q15_t)0x2E9D,
-	(q15_t)0x7723, (q15_t)0x2ECC, (q15_t)0x7710, (q15_t)0x2EFB,
-	(q15_t)0x76FE, (q15_t)0x2F29, (q15_t)0x76EB, (q15_t)0x2F58,
-	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x76C6, (q15_t)0x2FB5,
-	(q15_t)0x76B3, (q15_t)0x2FE4, (q15_t)0x76A0, (q15_t)0x3013,
-	(q15_t)0x768E, (q15_t)0x3041, (q15_t)0x767B, (q15_t)0x3070,
-	(q15_t)0x7668, (q15_t)0x309E, (q15_t)0x7654, (q15_t)0x30CD,
-	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x762E, (q15_t)0x312A,
-	(q15_t)0x761B, (q15_t)0x3158, (q15_t)0x7607, (q15_t)0x3186,
-	(q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75E0, (q15_t)0x31E3,
-	(q15_t)0x75CC, (q15_t)0x3211, (q15_t)0x75B9, (q15_t)0x3240,
-	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7591, (q15_t)0x329C,
-	(q15_t)0x757D, (q15_t)0x32CA, (q15_t)0x7569, (q15_t)0x32F8,
-	(q15_t)0x7555, (q15_t)0x3326, (q15_t)0x7541, (q15_t)0x3354,
-	(q15_t)0x752D, (q15_t)0x3382, (q15_t)0x7519, (q15_t)0x33B0,
-	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74F0, (q15_t)0x340C,
-	(q15_t)0x74DB, (q15_t)0x343A, (q15_t)0x74C7, (q15_t)0x3468,
-	(q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x749E, (q15_t)0x34C4,
-	(q15_t)0x7489, (q15_t)0x34F2, (q15_t)0x7474, (q15_t)0x351F,
-	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x744A, (q15_t)0x357B,
-	(q15_t)0x7435, (q15_t)0x35A8, (q15_t)0x7420, (q15_t)0x35D6,
-	(q15_t)0x740B, (q15_t)0x3604, (q15_t)0x73F6, (q15_t)0x3631,
-	(q15_t)0x73E0, (q15_t)0x365F, (q15_t)0x73CB, (q15_t)0x368C,
-	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x73A0, (q15_t)0x36E7,
-	(q15_t)0x738A, (q15_t)0x3714, (q15_t)0x7375, (q15_t)0x3742,
-	(q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7349, (q15_t)0x379C,
-	(q15_t)0x7333, (q15_t)0x37CA, (q15_t)0x731D, (q15_t)0x37F7,
-	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72F1, (q15_t)0x3851,
-	(q15_t)0x72DB, (q15_t)0x387E, (q15_t)0x72C5, (q15_t)0x38AB,
-	(q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7298, (q15_t)0x3906,
-	(q15_t)0x7282, (q15_t)0x3932, (q15_t)0x726B, (q15_t)0x395F,
-	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x723E, (q15_t)0x39B9,
-	(q15_t)0x7227, (q15_t)0x39E6, (q15_t)0x7211, (q15_t)0x3A13,
-	(q15_t)0x71FA, (q15_t)0x3A40, (q15_t)0x71E3, (q15_t)0x3A6C,
-	(q15_t)0x71CC, (q15_t)0x3A99, (q15_t)0x71B5, (q15_t)0x3AC6,
-	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7186, (q15_t)0x3B1F,
-	(q15_t)0x716F, (q15_t)0x3B4C, (q15_t)0x7158, (q15_t)0x3B78,
-	(q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7129, (q15_t)0x3BD1,
-	(q15_t)0x7112, (q15_t)0x3BFD, (q15_t)0x70FA, (q15_t)0x3C2A,
-	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70CB, (q15_t)0x3C83,
-	(q15_t)0x70B3, (q15_t)0x3CAF, (q15_t)0x709B, (q15_t)0x3CDB,
-	(q15_t)0x7083, (q15_t)0x3D07, (q15_t)0x706B, (q15_t)0x3D33,
-	(q15_t)0x7053, (q15_t)0x3D60, (q15_t)0x703B, (q15_t)0x3D8C,
-	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x700A, (q15_t)0x3DE4,
-	(q15_t)0x6FF2, (q15_t)0x3E10, (q15_t)0x6FDA, (q15_t)0x3E3C,
-	(q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6FA9, (q15_t)0x3E93,
-	(q15_t)0x6F90, (q15_t)0x3EBF, (q15_t)0x6F77, (q15_t)0x3EEB,
-	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F46, (q15_t)0x3F43,
-	(q15_t)0x6F2D, (q15_t)0x3F6E, (q15_t)0x6F14, (q15_t)0x3F9A,
-	(q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EE2, (q15_t)0x3FF1,
-	(q15_t)0x6EC9, (q15_t)0x401D, (q15_t)0x6EAF, (q15_t)0x4048,
-	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E7D, (q15_t)0x409F,
-	(q15_t)0x6E63, (q15_t)0x40CA, (q15_t)0x6E4A, (q15_t)0x40F6,
-	(q15_t)0x6E30, (q15_t)0x4121, (q15_t)0x6E17, (q15_t)0x414C,
-	(q15_t)0x6DFD, (q15_t)0x4177, (q15_t)0x6DE3, (q15_t)0x41A2,
-	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6DB0, (q15_t)0x41F9,
-	(q15_t)0x6D96, (q15_t)0x4224, (q15_t)0x6D7C, (q15_t)0x424F,
-	(q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D48, (q15_t)0x42A5,
-	(q15_t)0x6D2D, (q15_t)0x42D0, (q15_t)0x6D13, (q15_t)0x42FA,
-	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CDE, (q15_t)0x4350,
-	(q15_t)0x6CC4, (q15_t)0x437B, (q15_t)0x6CA9, (q15_t)0x43A5,
-	(q15_t)0x6C8F, (q15_t)0x43D0, (q15_t)0x6C74, (q15_t)0x43FB,
-	(q15_t)0x6C59, (q15_t)0x4425, (q15_t)0x6C3F, (q15_t)0x4450,
-	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6C09, (q15_t)0x44A5,
-	(q15_t)0x6BEE, (q15_t)0x44CF, (q15_t)0x6BD3, (q15_t)0x44FA,
-	(q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B9C, (q15_t)0x454E,
-	(q15_t)0x6B81, (q15_t)0x4578, (q15_t)0x6B66, (q15_t)0x45A3,
-	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B2F, (q15_t)0x45F7,
-	(q15_t)0x6B13, (q15_t)0x4621, (q15_t)0x6AF8, (q15_t)0x464B,
-	(q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AC1, (q15_t)0x469F,
-	(q15_t)0x6AA5, (q15_t)0x46C9, (q15_t)0x6A89, (q15_t)0x46F3,
-	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x6A51, (q15_t)0x4746,
-	(q15_t)0x6A35, (q15_t)0x4770, (q15_t)0x6A19, (q15_t)0x479A,
-	(q15_t)0x69FD, (q15_t)0x47C3, (q15_t)0x69E1, (q15_t)0x47ED,
-	(q15_t)0x69C4, (q15_t)0x4816, (q15_t)0x69A8, (q15_t)0x4840,
-	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x696F, (q15_t)0x4893,
-	(q15_t)0x6953, (q15_t)0x48BC, (q15_t)0x6936, (q15_t)0x48E6,
-	(q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68FD, (q15_t)0x4938,
-	(q15_t)0x68E0, (q15_t)0x4961, (q15_t)0x68C3, (q15_t)0x498A,
-	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6889, (q15_t)0x49DD,
-	(q15_t)0x686C, (q15_t)0x4A06, (q15_t)0x684F, (q15_t)0x4A2F,
-	(q15_t)0x6832, (q15_t)0x4A58, (q15_t)0x6815, (q15_t)0x4A81,
-	(q15_t)0x67F7, (q15_t)0x4AA9, (q15_t)0x67DA, (q15_t)0x4AD2,
-	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x679F, (q15_t)0x4B24,
-	(q15_t)0x6782, (q15_t)0x4B4C, (q15_t)0x6764, (q15_t)0x4B75,
-	(q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x6729, (q15_t)0x4BC6,
-	(q15_t)0x670B, (q15_t)0x4BEF, (q15_t)0x66ED, (q15_t)0x4C17,
-	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x66B1, (q15_t)0x4C68,
-	(q15_t)0x6693, (q15_t)0x4C90, (q15_t)0x6675, (q15_t)0x4CB8,
-	(q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x6639, (q15_t)0x4D09,
-	(q15_t)0x661A, (q15_t)0x4D31, (q15_t)0x65FC, (q15_t)0x4D59,
-	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x65BF, (q15_t)0x4DA9,
-	(q15_t)0x65A0, (q15_t)0x4DD1, (q15_t)0x6582, (q15_t)0x4DF9,
-	(q15_t)0x6563, (q15_t)0x4E21, (q15_t)0x6545, (q15_t)0x4E48,
-	(q15_t)0x6526, (q15_t)0x4E70, (q15_t)0x6507, (q15_t)0x4E98,
-	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x64C9, (q15_t)0x4EE7,
-	(q15_t)0x64AA, (q15_t)0x4F0F, (q15_t)0x648B, (q15_t)0x4F36,
-	(q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x644D, (q15_t)0x4F85,
-	(q15_t)0x642D, (q15_t)0x4FAC, (q15_t)0x640E, (q15_t)0x4FD4,
-	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63CF, (q15_t)0x5022,
-	(q15_t)0x63B0, (q15_t)0x5049, (q15_t)0x6390, (q15_t)0x5070,
-	(q15_t)0x6371, (q15_t)0x5097, (q15_t)0x6351, (q15_t)0x50BF,
-	(q15_t)0x6331, (q15_t)0x50E5, (q15_t)0x6311, (q15_t)0x510C,
-	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x62D2, (q15_t)0x515A,
-	(q15_t)0x62B2, (q15_t)0x5181, (q15_t)0x6292, (q15_t)0x51A8,
-	(q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x6251, (q15_t)0x51F5,
-	(q15_t)0x6231, (q15_t)0x521C, (q15_t)0x6211, (q15_t)0x5242,
-	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61D0, (q15_t)0x528F,
-	(q15_t)0x61B0, (q15_t)0x52B5, (q15_t)0x618F, (q15_t)0x52DC,
-	(q15_t)0x616F, (q15_t)0x5302, (q15_t)0x614E, (q15_t)0x5328,
-	(q15_t)0x612D, (q15_t)0x534E, (q15_t)0x610D, (q15_t)0x5375,
-	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x60CB, (q15_t)0x53C1,
-	(q15_t)0x60AA, (q15_t)0x53E7, (q15_t)0x6089, (q15_t)0x540D,
-	(q15_t)0x6068, (q15_t)0x5433, (q15_t)0x6047, (q15_t)0x5458,
-	(q15_t)0x6026, (q15_t)0x547E, (q15_t)0x6004, (q15_t)0x54A4,
-	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5FC2, (q15_t)0x54EF,
-	(q15_t)0x5FA0, (q15_t)0x5515, (q15_t)0x5F7F, (q15_t)0x553A,
-	(q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F3C, (q15_t)0x5585,
-	(q15_t)0x5F1A, (q15_t)0x55AB, (q15_t)0x5EF9, (q15_t)0x55D0,
-	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5EB5, (q15_t)0x561A,
-	(q15_t)0x5E93, (q15_t)0x5640, (q15_t)0x5E71, (q15_t)0x5665,
-	(q15_t)0x5E50, (q15_t)0x568A, (q15_t)0x5E2D, (q15_t)0x56AF,
-	(q15_t)0x5E0B, (q15_t)0x56D4, (q15_t)0x5DE9, (q15_t)0x56F9,
-	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5DA5, (q15_t)0x5742,
-	(q15_t)0x5D83, (q15_t)0x5767, (q15_t)0x5D60, (q15_t)0x578C,
-	(q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5D1B, (q15_t)0x57D5,
-	(q15_t)0x5CF9, (q15_t)0x57F9, (q15_t)0x5CD6, (q15_t)0x581E,
-	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C91, (q15_t)0x5867,
-	(q15_t)0x5C6E, (q15_t)0x588B, (q15_t)0x5C4B, (q15_t)0x58AF,
-	(q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5C06, (q15_t)0x58F8,
-	(q15_t)0x5BE3, (q15_t)0x591C, (q15_t)0x5BC0, (q15_t)0x5940,
-	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B79, (q15_t)0x5988,
-	(q15_t)0x5B56, (q15_t)0x59AC, (q15_t)0x5B33, (q15_t)0x59D0,
-	(q15_t)0x5B10, (q15_t)0x59F3, (q15_t)0x5AEC, (q15_t)0x5A17,
-	(q15_t)0x5AC9, (q15_t)0x5A3B, (q15_t)0x5AA5, (q15_t)0x5A5E,
-	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5A5E, (q15_t)0x5AA5,
-	(q15_t)0x5A3B, (q15_t)0x5AC9, (q15_t)0x5A17, (q15_t)0x5AEC,
-	(q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59D0, (q15_t)0x5B33,
-	(q15_t)0x59AC, (q15_t)0x5B56, (q15_t)0x5988, (q15_t)0x5B79,
-	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x5940, (q15_t)0x5BC0,
-	(q15_t)0x591C, (q15_t)0x5BE3, (q15_t)0x58F8, (q15_t)0x5C06,
-	(q15_t)0x58D4, (q15_t)0x5C29, (q15_t)0x58AF, (q15_t)0x5C4B,
-	(q15_t)0x588B, (q15_t)0x5C6E, (q15_t)0x5867, (q15_t)0x5C91,
-	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x581E, (q15_t)0x5CD6,
-	(q15_t)0x57F9, (q15_t)0x5CF9, (q15_t)0x57D5, (q15_t)0x5D1B,
-	(q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x578C, (q15_t)0x5D60,
-	(q15_t)0x5767, (q15_t)0x5D83, (q15_t)0x5742, (q15_t)0x5DA5,
-	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56F9, (q15_t)0x5DE9,
-	(q15_t)0x56D4, (q15_t)0x5E0B, (q15_t)0x56AF, (q15_t)0x5E2D,
-	(q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5665, (q15_t)0x5E71,
-	(q15_t)0x5640, (q15_t)0x5E93, (q15_t)0x561A, (q15_t)0x5EB5,
-	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x55D0, (q15_t)0x5EF9,
-	(q15_t)0x55AB, (q15_t)0x5F1A, (q15_t)0x5585, (q15_t)0x5F3C,
-	(q15_t)0x5560, (q15_t)0x5F5E, (q15_t)0x553A, (q15_t)0x5F7F,
-	(q15_t)0x5515, (q15_t)0x5FA0, (q15_t)0x54EF, (q15_t)0x5FC2,
-	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x54A4, (q15_t)0x6004,
-	(q15_t)0x547E, (q15_t)0x6026, (q15_t)0x5458, (q15_t)0x6047,
-	(q15_t)0x5433, (q15_t)0x6068, (q15_t)0x540D, (q15_t)0x6089,
-	(q15_t)0x53E7, (q15_t)0x60AA, (q15_t)0x53C1, (q15_t)0x60CB,
-	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5375, (q15_t)0x610D,
-	(q15_t)0x534E, (q15_t)0x612D, (q15_t)0x5328, (q15_t)0x614E,
-	(q15_t)0x5302, (q15_t)0x616F, (q15_t)0x52DC, (q15_t)0x618F,
-	(q15_t)0x52B5, (q15_t)0x61B0, (q15_t)0x528F, (q15_t)0x61D0,
-	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x5242, (q15_t)0x6211,
-	(q15_t)0x521C, (q15_t)0x6231, (q15_t)0x51F5, (q15_t)0x6251,
-	(q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x51A8, (q15_t)0x6292,
-	(q15_t)0x5181, (q15_t)0x62B2, (q15_t)0x515A, (q15_t)0x62D2,
-	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x510C, (q15_t)0x6311,
-	(q15_t)0x50E5, (q15_t)0x6331, (q15_t)0x50BF, (q15_t)0x6351,
-	(q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5070, (q15_t)0x6390,
-	(q15_t)0x5049, (q15_t)0x63B0, (q15_t)0x5022, (q15_t)0x63CF,
-	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4FD4, (q15_t)0x640E,
-	(q15_t)0x4FAC, (q15_t)0x642D, (q15_t)0x4F85, (q15_t)0x644D,
-	(q15_t)0x4F5E, (q15_t)0x646C, (q15_t)0x4F36, (q15_t)0x648B,
-	(q15_t)0x4F0F, (q15_t)0x64AA, (q15_t)0x4EE7, (q15_t)0x64C9,
-	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E98, (q15_t)0x6507,
-	(q15_t)0x4E70, (q15_t)0x6526, (q15_t)0x4E48, (q15_t)0x6545,
-	(q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DF9, (q15_t)0x6582,
-	(q15_t)0x4DD1, (q15_t)0x65A0, (q15_t)0x4DA9, (q15_t)0x65BF,
-	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D59, (q15_t)0x65FC,
-	(q15_t)0x4D31, (q15_t)0x661A, (q15_t)0x4D09, (q15_t)0x6639,
-	(q15_t)0x4CE1, (q15_t)0x6657, (q15_t)0x4CB8, (q15_t)0x6675,
-	(q15_t)0x4C90, (q15_t)0x6693, (q15_t)0x4C68, (q15_t)0x66B1,
-	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4C17, (q15_t)0x66ED,
-	(q15_t)0x4BEF, (q15_t)0x670B, (q15_t)0x4BC6, (q15_t)0x6729,
-	(q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4B75, (q15_t)0x6764,
-	(q15_t)0x4B4C, (q15_t)0x6782, (q15_t)0x4B24, (q15_t)0x679F,
-	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AD2, (q15_t)0x67DA,
-	(q15_t)0x4AA9, (q15_t)0x67F7, (q15_t)0x4A81, (q15_t)0x6815,
-	(q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A2F, (q15_t)0x684F,
-	(q15_t)0x4A06, (q15_t)0x686C, (q15_t)0x49DD, (q15_t)0x6889,
-	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x498A, (q15_t)0x68C3,
-	(q15_t)0x4961, (q15_t)0x68E0, (q15_t)0x4938, (q15_t)0x68FD,
-	(q15_t)0x490F, (q15_t)0x6919, (q15_t)0x48E6, (q15_t)0x6936,
-	(q15_t)0x48BC, (q15_t)0x6953, (q15_t)0x4893, (q15_t)0x696F,
-	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x4840, (q15_t)0x69A8,
-	(q15_t)0x4816, (q15_t)0x69C4, (q15_t)0x47ED, (q15_t)0x69E1,
-	(q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x479A, (q15_t)0x6A19,
-	(q15_t)0x4770, (q15_t)0x6A35, (q15_t)0x4746, (q15_t)0x6A51,
-	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46F3, (q15_t)0x6A89,
-	(q15_t)0x46C9, (q15_t)0x6AA5, (q15_t)0x469F, (q15_t)0x6AC1,
-	(q15_t)0x4675, (q15_t)0x6ADC, (q15_t)0x464B, (q15_t)0x6AF8,
-	(q15_t)0x4621, (q15_t)0x6B13, (q15_t)0x45F7, (q15_t)0x6B2F,
-	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x45A3, (q15_t)0x6B66,
-	(q15_t)0x4578, (q15_t)0x6B81, (q15_t)0x454E, (q15_t)0x6B9C,
-	(q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x44FA, (q15_t)0x6BD3,
-	(q15_t)0x44CF, (q15_t)0x6BEE, (q15_t)0x44A5, (q15_t)0x6C09,
-	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4450, (q15_t)0x6C3F,
-	(q15_t)0x4425, (q15_t)0x6C59, (q15_t)0x43FB, (q15_t)0x6C74,
-	(q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x43A5, (q15_t)0x6CA9,
-	(q15_t)0x437B, (q15_t)0x6CC4, (q15_t)0x4350, (q15_t)0x6CDE,
-	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x42FA, (q15_t)0x6D13,
-	(q15_t)0x42D0, (q15_t)0x6D2D, (q15_t)0x42A5, (q15_t)0x6D48,
-	(q15_t)0x427A, (q15_t)0x6D62, (q15_t)0x424F, (q15_t)0x6D7C,
-	(q15_t)0x4224, (q15_t)0x6D96, (q15_t)0x41F9, (q15_t)0x6DB0,
-	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x41A2, (q15_t)0x6DE3,
-	(q15_t)0x4177, (q15_t)0x6DFD, (q15_t)0x414C, (q15_t)0x6E17,
-	(q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40F6, (q15_t)0x6E4A,
-	(q15_t)0x40CA, (q15_t)0x6E63, (q15_t)0x409F, (q15_t)0x6E7D,
-	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x4048, (q15_t)0x6EAF,
-	(q15_t)0x401D, (q15_t)0x6EC9, (q15_t)0x3FF1, (q15_t)0x6EE2,
-	(q15_t)0x3FC5, (q15_t)0x6EFB, (q15_t)0x3F9A, (q15_t)0x6F14,
-	(q15_t)0x3F6E, (q15_t)0x6F2D, (q15_t)0x3F43, (q15_t)0x6F46,
-	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3EEB, (q15_t)0x6F77,
-	(q15_t)0x3EBF, (q15_t)0x6F90, (q15_t)0x3E93, (q15_t)0x6FA9,
-	(q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3E3C, (q15_t)0x6FDA,
-	(q15_t)0x3E10, (q15_t)0x6FF2, (q15_t)0x3DE4, (q15_t)0x700A,
-	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D8C, (q15_t)0x703B,
-	(q15_t)0x3D60, (q15_t)0x7053, (q15_t)0x3D33, (q15_t)0x706B,
-	(q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CDB, (q15_t)0x709B,
-	(q15_t)0x3CAF, (q15_t)0x70B3, (q15_t)0x3C83, (q15_t)0x70CB,
-	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3C2A, (q15_t)0x70FA,
-	(q15_t)0x3BFD, (q15_t)0x7112, (q15_t)0x3BD1, (q15_t)0x7129,
-	(q15_t)0x3BA5, (q15_t)0x7141, (q15_t)0x3B78, (q15_t)0x7158,
-	(q15_t)0x3B4C, (q15_t)0x716F, (q15_t)0x3B1F, (q15_t)0x7186,
-	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3AC6, (q15_t)0x71B5,
-	(q15_t)0x3A99, (q15_t)0x71CC, (q15_t)0x3A6C, (q15_t)0x71E3,
-	(q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x3A13, (q15_t)0x7211,
-	(q15_t)0x39E6, (q15_t)0x7227, (q15_t)0x39B9, (q15_t)0x723E,
-	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x395F, (q15_t)0x726B,
-	(q15_t)0x3932, (q15_t)0x7282, (q15_t)0x3906, (q15_t)0x7298,
-	(q15_t)0x38D8, (q15_t)0x72AF, (q15_t)0x38AB, (q15_t)0x72C5,
-	(q15_t)0x387E, (q15_t)0x72DB, (q15_t)0x3851, (q15_t)0x72F1,
-	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x37F7, (q15_t)0x731D,
-	(q15_t)0x37CA, (q15_t)0x7333, (q15_t)0x379C, (q15_t)0x7349,
-	(q15_t)0x376F, (q15_t)0x735F, (q15_t)0x3742, (q15_t)0x7375,
-	(q15_t)0x3714, (q15_t)0x738A, (q15_t)0x36E7, (q15_t)0x73A0,
-	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x368C, (q15_t)0x73CB,
-	(q15_t)0x365F, (q15_t)0x73E0, (q15_t)0x3631, (q15_t)0x73F6,
-	(q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35D6, (q15_t)0x7420,
-	(q15_t)0x35A8, (q15_t)0x7435, (q15_t)0x357B, (q15_t)0x744A,
-	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x351F, (q15_t)0x7474,
-	(q15_t)0x34F2, (q15_t)0x7489, (q15_t)0x34C4, (q15_t)0x749E,
-	(q15_t)0x3496, (q15_t)0x74B2, (q15_t)0x3468, (q15_t)0x74C7,
-	(q15_t)0x343A, (q15_t)0x74DB, (q15_t)0x340C, (q15_t)0x74F0,
-	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x33B0, (q15_t)0x7519,
-	(q15_t)0x3382, (q15_t)0x752D, (q15_t)0x3354, (q15_t)0x7541,
-	(q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32F8, (q15_t)0x7569,
-	(q15_t)0x32CA, (q15_t)0x757D, (q15_t)0x329C, (q15_t)0x7591,
-	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3240, (q15_t)0x75B9,
-	(q15_t)0x3211, (q15_t)0x75CC, (q15_t)0x31E3, (q15_t)0x75E0,
-	(q15_t)0x31B5, (q15_t)0x75F4, (q15_t)0x3186, (q15_t)0x7607,
-	(q15_t)0x3158, (q15_t)0x761B, (q15_t)0x312A, (q15_t)0x762E,
-	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x30CD, (q15_t)0x7654,
-	(q15_t)0x309E, (q15_t)0x7668, (q15_t)0x3070, (q15_t)0x767B,
-	(q15_t)0x3041, (q15_t)0x768E, (q15_t)0x3013, (q15_t)0x76A0,
-	(q15_t)0x2FE4, (q15_t)0x76B3, (q15_t)0x2FB5, (q15_t)0x76C6,
-	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F58, (q15_t)0x76EB,
-	(q15_t)0x2F29, (q15_t)0x76FE, (q15_t)0x2EFB, (q15_t)0x7710,
-	(q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E9D, (q15_t)0x7735,
-	(q15_t)0x2E6E, (q15_t)0x7747, (q15_t)0x2E3F, (q15_t)0x775A,
-	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2DE2, (q15_t)0x777E,
-	(q15_t)0x2DB3, (q15_t)0x7790, (q15_t)0x2D84, (q15_t)0x77A2,
-	(q15_t)0x2D55, (q15_t)0x77B4, (q15_t)0x2D26, (q15_t)0x77C5,
-	(q15_t)0x2CF7, (q15_t)0x77D7, (q15_t)0x2CC8, (q15_t)0x77E9,
-	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2C69, (q15_t)0x780C,
-	(q15_t)0x2C3A, (q15_t)0x781D, (q15_t)0x2C0B, (q15_t)0x782E,
-	(q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2BAD, (q15_t)0x7851,
-	(q15_t)0x2B7D, (q15_t)0x7862, (q15_t)0x2B4E, (q15_t)0x7873,
-	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AEF, (q15_t)0x7895,
-	(q15_t)0x2AC0, (q15_t)0x78A6, (q15_t)0x2A91, (q15_t)0x78B6,
-	(q15_t)0x2A61, (q15_t)0x78C7, (q15_t)0x2A32, (q15_t)0x78D8,
-	(q15_t)0x2A02, (q15_t)0x78E8, (q15_t)0x29D3, (q15_t)0x78F9,
-	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2974, (q15_t)0x7919,
-	(q15_t)0x2944, (q15_t)0x792A, (q15_t)0x2915, (q15_t)0x793A,
-	(q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x28B5, (q15_t)0x795A,
-	(q15_t)0x2886, (q15_t)0x796A, (q15_t)0x2856, (q15_t)0x797A,
-	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27F6, (q15_t)0x7999,
-	(q15_t)0x27C7, (q15_t)0x79A9, (q15_t)0x2797, (q15_t)0x79B9,
-	(q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2737, (q15_t)0x79D8,
-	(q15_t)0x2707, (q15_t)0x79E7, (q15_t)0x26D8, (q15_t)0x79F6,
-	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x2678, (q15_t)0x7A15,
-	(q15_t)0x2648, (q15_t)0x7A24, (q15_t)0x2618, (q15_t)0x7A33,
-	(q15_t)0x25E8, (q15_t)0x7A42, (q15_t)0x25B8, (q15_t)0x7A50,
-	(q15_t)0x2588, (q15_t)0x7A5F, (q15_t)0x2558, (q15_t)0x7A6E,
-	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x24F7, (q15_t)0x7A8B,
-	(q15_t)0x24C7, (q15_t)0x7A9A, (q15_t)0x2497, (q15_t)0x7AA8,
-	(q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2437, (q15_t)0x7AC5,
-	(q15_t)0x2407, (q15_t)0x7AD3, (q15_t)0x23D6, (q15_t)0x7AE1,
-	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2376, (q15_t)0x7AFD,
-	(q15_t)0x2345, (q15_t)0x7B0B, (q15_t)0x2315, (q15_t)0x7B19,
-	(q15_t)0x22E5, (q15_t)0x7B26, (q15_t)0x22B4, (q15_t)0x7B34,
-	(q15_t)0x2284, (q15_t)0x7B42, (q15_t)0x2254, (q15_t)0x7B4F,
-	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x21F3, (q15_t)0x7B6A,
-	(q15_t)0x21C2, (q15_t)0x7B77, (q15_t)0x2192, (q15_t)0x7B84,
-	(q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x2131, (q15_t)0x7B9F,
-	(q15_t)0x2100, (q15_t)0x7BAC, (q15_t)0x20D0, (q15_t)0x7BB9,
-	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x206E, (q15_t)0x7BD2,
-	(q15_t)0x203E, (q15_t)0x7BDF, (q15_t)0x200D, (q15_t)0x7BEB,
-	(q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1FAC, (q15_t)0x7C05,
-	(q15_t)0x1F7B, (q15_t)0x7C11, (q15_t)0x1F4A, (q15_t)0x7C1D,
-	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1EE9, (q15_t)0x7C36,
-	(q15_t)0x1EB8, (q15_t)0x7C42, (q15_t)0x1E87, (q15_t)0x7C4E,
-	(q15_t)0x1E56, (q15_t)0x7C5A, (q15_t)0x1E25, (q15_t)0x7C66,
-	(q15_t)0x1DF5, (q15_t)0x7C71, (q15_t)0x1DC4, (q15_t)0x7C7D,
-	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1D62, (q15_t)0x7C94,
-	(q15_t)0x1D31, (q15_t)0x7CA0, (q15_t)0x1D00, (q15_t)0x7CAB,
-	(q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C9E, (q15_t)0x7CC2,
-	(q15_t)0x1C6D, (q15_t)0x7CCD, (q15_t)0x1C3C, (q15_t)0x7CD8,
-	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BDA, (q15_t)0x7CEE,
-	(q15_t)0x1BA9, (q15_t)0x7CF9, (q15_t)0x1B78, (q15_t)0x7D04,
-	(q15_t)0x1B47, (q15_t)0x7D0F, (q15_t)0x1B16, (q15_t)0x7D19,
-	(q15_t)0x1AE4, (q15_t)0x7D24, (q15_t)0x1AB3, (q15_t)0x7D2F,
-	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x1A51, (q15_t)0x7D43,
-	(q15_t)0x1A20, (q15_t)0x7D4E, (q15_t)0x19EF, (q15_t)0x7D58,
-	(q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x198C, (q15_t)0x7D6C,
-	(q15_t)0x195B, (q15_t)0x7D76, (q15_t)0x192A, (q15_t)0x7D80,
-	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x18C7, (q15_t)0x7D94,
-	(q15_t)0x1896, (q15_t)0x7D9D, (q15_t)0x1864, (q15_t)0x7DA7,
-	(q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x1802, (q15_t)0x7DBA,
-	(q15_t)0x17D0, (q15_t)0x7DC3, (q15_t)0x179F, (q15_t)0x7DCD,
-	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x173C, (q15_t)0x7DDF,
-	(q15_t)0x170A, (q15_t)0x7DE8, (q15_t)0x16D9, (q15_t)0x7DF1,
-	(q15_t)0x16A8, (q15_t)0x7DFA, (q15_t)0x1676, (q15_t)0x7E03,
-	(q15_t)0x1645, (q15_t)0x7E0C, (q15_t)0x1613, (q15_t)0x7E14,
-	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x15B0, (q15_t)0x7E26,
-	(q15_t)0x157F, (q15_t)0x7E2E, (q15_t)0x154D, (q15_t)0x7E37,
-	(q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14EA, (q15_t)0x7E47,
-	(q15_t)0x14B8, (q15_t)0x7E4F, (q15_t)0x1487, (q15_t)0x7E57,
-	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x1423, (q15_t)0x7E67,
-	(q15_t)0x13F2, (q15_t)0x7E6F, (q15_t)0x13C0, (q15_t)0x7E77,
-	(q15_t)0x138E, (q15_t)0x7E7F, (q15_t)0x135D, (q15_t)0x7E86,
-	(q15_t)0x132B, (q15_t)0x7E8E, (q15_t)0x12F9, (q15_t)0x7E95,
-	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1296, (q15_t)0x7EA4,
-	(q15_t)0x1264, (q15_t)0x7EAB, (q15_t)0x1232, (q15_t)0x7EB3,
-	(q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x11CF, (q15_t)0x7EC1,
-	(q15_t)0x119D, (q15_t)0x7EC8, (q15_t)0x116B, (q15_t)0x7ECF,
-	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1108, (q15_t)0x7EDC,
-	(q15_t)0x10D6, (q15_t)0x7EE3, (q15_t)0x10A4, (q15_t)0x7EE9,
-	(q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x1040, (q15_t)0x7EF6,
-	(q15_t)0x100E, (q15_t)0x7EFD, (q15_t)0x0FDD, (q15_t)0x7F03,
-	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0F79, (q15_t)0x7F0F,
-	(q15_t)0x0F47, (q15_t)0x7F15, (q15_t)0x0F15, (q15_t)0x7F1B,
-	(q15_t)0x0EE3, (q15_t)0x7F21, (q15_t)0x0EB1, (q15_t)0x7F27,
-	(q15_t)0x0E7F, (q15_t)0x7F2D, (q15_t)0x0E4D, (q15_t)0x7F32,
-	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0DE9, (q15_t)0x7F3D,
-	(q15_t)0x0DB7, (q15_t)0x7F43, (q15_t)0x0D85, (q15_t)0x7F48,
-	(q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0D21, (q15_t)0x7F53,
-	(q15_t)0x0CEF, (q15_t)0x7F58, (q15_t)0x0CBD, (q15_t)0x7F5D,
-	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C59, (q15_t)0x7F67,
-	(q15_t)0x0C27, (q15_t)0x7F6B, (q15_t)0x0BF5, (q15_t)0x7F70,
-	(q15_t)0x0BC3, (q15_t)0x7F75, (q15_t)0x0B91, (q15_t)0x7F79,
-	(q15_t)0x0B5F, (q15_t)0x7F7E, (q15_t)0x0B2D, (q15_t)0x7F82,
-	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0AC9, (q15_t)0x7F8B,
-	(q15_t)0x0A97, (q15_t)0x7F8F, (q15_t)0x0A65, (q15_t)0x7F93,
-	(q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x0A00, (q15_t)0x7F9B,
-	(q15_t)0x09CE, (q15_t)0x7F9F, (q15_t)0x099C, (q15_t)0x7FA3,
-	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0938, (q15_t)0x7FAA,
-	(q15_t)0x0906, (q15_t)0x7FAE, (q15_t)0x08D4, (q15_t)0x7FB1,
-	(q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x086F, (q15_t)0x7FB8,
-	(q15_t)0x083D, (q15_t)0x7FBC, (q15_t)0x080B, (q15_t)0x7FBF,
-	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x07A7, (q15_t)0x7FC5,
-	(q15_t)0x0775, (q15_t)0x7FC8, (q15_t)0x0742, (q15_t)0x7FCB,
-	(q15_t)0x0710, (q15_t)0x7FCE, (q15_t)0x06DE, (q15_t)0x7FD0,
-	(q15_t)0x06AC, (q15_t)0x7FD3, (q15_t)0x067A, (q15_t)0x7FD6,
-	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0615, (q15_t)0x7FDA,
-	(q15_t)0x05E3, (q15_t)0x7FDD, (q15_t)0x05B1, (q15_t)0x7FDF,
-	(q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x054C, (q15_t)0x7FE3,
-	(q15_t)0x051A, (q15_t)0x7FE5, (q15_t)0x04E8, (q15_t)0x7FE7,
-	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0483, (q15_t)0x7FEB,
-	(q15_t)0x0451, (q15_t)0x7FED, (q15_t)0x041F, (q15_t)0x7FEE,
-	(q15_t)0x03ED, (q15_t)0x7FF0, (q15_t)0x03BA, (q15_t)0x7FF2,
-	(q15_t)0x0388, (q15_t)0x7FF3, (q15_t)0x0356, (q15_t)0x7FF4,
-	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x02F1, (q15_t)0x7FF7,
-	(q15_t)0x02BF, (q15_t)0x7FF8, (q15_t)0x028D, (q15_t)0x7FF9,
-	(q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x0228, (q15_t)0x7FFB,
-	(q15_t)0x01F6, (q15_t)0x7FFC, (q15_t)0x01C4, (q15_t)0x7FFC,
-	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x015F, (q15_t)0x7FFE,
-	(q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x00FB, (q15_t)0x7FFF,
-	(q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0096, (q15_t)0x7FFF,
-	(q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0032, (q15_t)0x7FFF,
-	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFFCD, (q15_t)0x7FFF,
-	(q15_t)0xFF9B, (q15_t)0x7FFF, (q15_t)0xFF69, (q15_t)0x7FFF,
-	(q15_t)0xFF36, (q15_t)0x7FFF, (q15_t)0xFF04, (q15_t)0x7FFF,
-	(q15_t)0xFED2, (q15_t)0x7FFE, (q15_t)0xFEA0, (q15_t)0x7FFE,
-	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFE3B, (q15_t)0x7FFC,
-	(q15_t)0xFE09, (q15_t)0x7FFC, (q15_t)0xFDD7, (q15_t)0x7FFB,
-	(q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD72, (q15_t)0x7FF9,
-	(q15_t)0xFD40, (q15_t)0x7FF8, (q15_t)0xFD0E, (q15_t)0x7FF7,
-	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFCA9, (q15_t)0x7FF4,
-	(q15_t)0xFC77, (q15_t)0x7FF3, (q15_t)0xFC45, (q15_t)0x7FF2,
-	(q15_t)0xFC12, (q15_t)0x7FF0, (q15_t)0xFBE0, (q15_t)0x7FEE,
-	(q15_t)0xFBAE, (q15_t)0x7FED, (q15_t)0xFB7C, (q15_t)0x7FEB,
-	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFB17, (q15_t)0x7FE7,
-	(q15_t)0xFAE5, (q15_t)0x7FE5, (q15_t)0xFAB3, (q15_t)0x7FE3,
-	(q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xFA4E, (q15_t)0x7FDF,
-	(q15_t)0xFA1C, (q15_t)0x7FDD, (q15_t)0xF9EA, (q15_t)0x7FDA,
-	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF985, (q15_t)0x7FD6,
-	(q15_t)0xF953, (q15_t)0x7FD3, (q15_t)0xF921, (q15_t)0x7FD0,
-	(q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF8BD, (q15_t)0x7FCB,
-	(q15_t)0xF88A, (q15_t)0x7FC8, (q15_t)0xF858, (q15_t)0x7FC5,
-	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF7F4, (q15_t)0x7FBF,
-	(q15_t)0xF7C2, (q15_t)0x7FBC, (q15_t)0xF790, (q15_t)0x7FB8,
-	(q15_t)0xF75D, (q15_t)0x7FB5, (q15_t)0xF72B, (q15_t)0x7FB1,
-	(q15_t)0xF6F9, (q15_t)0x7FAE, (q15_t)0xF6C7, (q15_t)0x7FAA,
-	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF663, (q15_t)0x7FA3,
-	(q15_t)0xF631, (q15_t)0x7F9F, (q15_t)0xF5FF, (q15_t)0x7F9B,
-	(q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF59A, (q15_t)0x7F93,
-	(q15_t)0xF568, (q15_t)0x7F8F, (q15_t)0xF536, (q15_t)0x7F8B,
-	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4D2, (q15_t)0x7F82,
-	(q15_t)0xF4A0, (q15_t)0x7F7E, (q15_t)0xF46E, (q15_t)0x7F79,
-	(q15_t)0xF43C, (q15_t)0x7F75, (q15_t)0xF40A, (q15_t)0x7F70,
-	(q15_t)0xF3D8, (q15_t)0x7F6B, (q15_t)0xF3A6, (q15_t)0x7F67,
-	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF342, (q15_t)0x7F5D,
-	(q15_t)0xF310, (q15_t)0x7F58, (q15_t)0xF2DE, (q15_t)0x7F53,
-	(q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF27A, (q15_t)0x7F48,
-	(q15_t)0xF248, (q15_t)0x7F43, (q15_t)0xF216, (q15_t)0x7F3D,
-	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF1B2, (q15_t)0x7F32,
-	(q15_t)0xF180, (q15_t)0x7F2D, (q15_t)0xF14E, (q15_t)0x7F27,
-	(q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0EA, (q15_t)0x7F1B,
-	(q15_t)0xF0B8, (q15_t)0x7F15, (q15_t)0xF086, (q15_t)0x7F0F,
-	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xF022, (q15_t)0x7F03,
-	(q15_t)0xEFF1, (q15_t)0x7EFD, (q15_t)0xEFBF, (q15_t)0x7EF6,
-	(q15_t)0xEF8D, (q15_t)0x7EF0, (q15_t)0xEF5B, (q15_t)0x7EE9,
-	(q15_t)0xEF29, (q15_t)0x7EE3, (q15_t)0xEEF7, (q15_t)0x7EDC,
-	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEE94, (q15_t)0x7ECF,
-	(q15_t)0xEE62, (q15_t)0x7EC8, (q15_t)0xEE30, (q15_t)0x7EC1,
-	(q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xEDCD, (q15_t)0x7EB3,
-	(q15_t)0xED9B, (q15_t)0x7EAB, (q15_t)0xED69, (q15_t)0x7EA4,
-	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xED06, (q15_t)0x7E95,
-	(q15_t)0xECD4, (q15_t)0x7E8E, (q15_t)0xECA2, (q15_t)0x7E86,
-	(q15_t)0xEC71, (q15_t)0x7E7F, (q15_t)0xEC3F, (q15_t)0x7E77,
-	(q15_t)0xEC0D, (q15_t)0x7E6F, (q15_t)0xEBDC, (q15_t)0x7E67,
-	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEB78, (q15_t)0x7E57,
-	(q15_t)0xEB47, (q15_t)0x7E4F, (q15_t)0xEB15, (q15_t)0x7E47,
-	(q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEAB2, (q15_t)0x7E37,
-	(q15_t)0xEA80, (q15_t)0x7E2E, (q15_t)0xEA4F, (q15_t)0x7E26,
-	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9EC, (q15_t)0x7E14,
-	(q15_t)0xE9BA, (q15_t)0x7E0C, (q15_t)0xE989, (q15_t)0x7E03,
-	(q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE926, (q15_t)0x7DF1,
-	(q15_t)0xE8F5, (q15_t)0x7DE8, (q15_t)0xE8C3, (q15_t)0x7DDF,
-	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE860, (q15_t)0x7DCD,
-	(q15_t)0xE82F, (q15_t)0x7DC3, (q15_t)0xE7FD, (q15_t)0x7DBA,
-	(q15_t)0xE7CC, (q15_t)0x7DB0, (q15_t)0xE79B, (q15_t)0x7DA7,
-	(q15_t)0xE769, (q15_t)0x7D9D, (q15_t)0xE738, (q15_t)0x7D94,
-	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE6D5, (q15_t)0x7D80,
-	(q15_t)0xE6A4, (q15_t)0x7D76, (q15_t)0xE673, (q15_t)0x7D6C,
-	(q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE610, (q15_t)0x7D58,
-	(q15_t)0xE5DF, (q15_t)0x7D4E, (q15_t)0xE5AE, (q15_t)0x7D43,
-	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE54C, (q15_t)0x7D2F,
-	(q15_t)0xE51B, (q15_t)0x7D24, (q15_t)0xE4E9, (q15_t)0x7D19,
-	(q15_t)0xE4B8, (q15_t)0x7D0F, (q15_t)0xE487, (q15_t)0x7D04,
-	(q15_t)0xE456, (q15_t)0x7CF9, (q15_t)0xE425, (q15_t)0x7CEE,
-	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE3C3, (q15_t)0x7CD8,
-	(q15_t)0xE392, (q15_t)0x7CCD, (q15_t)0xE361, (q15_t)0x7CC2,
-	(q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE2FF, (q15_t)0x7CAB,
-	(q15_t)0xE2CE, (q15_t)0x7CA0, (q15_t)0xE29D, (q15_t)0x7C94,
-	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE23B, (q15_t)0x7C7D,
-	(q15_t)0xE20A, (q15_t)0x7C71, (q15_t)0xE1DA, (q15_t)0x7C66,
-	(q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE178, (q15_t)0x7C4E,
-	(q15_t)0xE147, (q15_t)0x7C42, (q15_t)0xE116, (q15_t)0x7C36,
-	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE0B5, (q15_t)0x7C1D,
-	(q15_t)0xE084, (q15_t)0x7C11, (q15_t)0xE053, (q15_t)0x7C05,
-	(q15_t)0xE023, (q15_t)0x7BF8, (q15_t)0xDFF2, (q15_t)0x7BEB,
-	(q15_t)0xDFC1, (q15_t)0x7BDF, (q15_t)0xDF91, (q15_t)0x7BD2,
-	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDF2F, (q15_t)0x7BB9,
-	(q15_t)0xDEFF, (q15_t)0x7BAC, (q15_t)0xDECE, (q15_t)0x7B9F,
-	(q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE6D, (q15_t)0x7B84,
-	(q15_t)0xDE3D, (q15_t)0x7B77, (q15_t)0xDE0C, (q15_t)0x7B6A,
-	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDDAB, (q15_t)0x7B4F,
-	(q15_t)0xDD7B, (q15_t)0x7B42, (q15_t)0xDD4B, (q15_t)0x7B34,
-	(q15_t)0xDD1A, (q15_t)0x7B26, (q15_t)0xDCEA, (q15_t)0x7B19,
-	(q15_t)0xDCBA, (q15_t)0x7B0B, (q15_t)0xDC89, (q15_t)0x7AFD,
-	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDC29, (q15_t)0x7AE1,
-	(q15_t)0xDBF8, (q15_t)0x7AD3, (q15_t)0xDBC8, (q15_t)0x7AC5,
-	(q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDB68, (q15_t)0x7AA8,
-	(q15_t)0xDB38, (q15_t)0x7A9A, (q15_t)0xDB08, (q15_t)0x7A8B,
-	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDAA7, (q15_t)0x7A6E,
-	(q15_t)0xDA77, (q15_t)0x7A5F, (q15_t)0xDA47, (q15_t)0x7A50,
-	(q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9E7, (q15_t)0x7A33,
-	(q15_t)0xD9B7, (q15_t)0x7A24, (q15_t)0xD987, (q15_t)0x7A15,
-	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD927, (q15_t)0x79F6,
-	(q15_t)0xD8F8, (q15_t)0x79E7, (q15_t)0xD8C8, (q15_t)0x79D8,
-	(q15_t)0xD898, (q15_t)0x79C8, (q15_t)0xD868, (q15_t)0x79B9,
-	(q15_t)0xD838, (q15_t)0x79A9, (q15_t)0xD809, (q15_t)0x7999,
-	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD7A9, (q15_t)0x797A,
-	(q15_t)0xD779, (q15_t)0x796A, (q15_t)0xD74A, (q15_t)0x795A,
-	(q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6EA, (q15_t)0x793A,
-	(q15_t)0xD6BB, (q15_t)0x792A, (q15_t)0xD68B, (q15_t)0x7919,
-	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD62C, (q15_t)0x78F9,
-	(q15_t)0xD5FD, (q15_t)0x78E8, (q15_t)0xD5CD, (q15_t)0x78D8,
-	(q15_t)0xD59E, (q15_t)0x78C7, (q15_t)0xD56E, (q15_t)0x78B6,
-	(q15_t)0xD53F, (q15_t)0x78A6, (q15_t)0xD510, (q15_t)0x7895,
-	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD4B1, (q15_t)0x7873,
-	(q15_t)0xD482, (q15_t)0x7862, (q15_t)0xD452, (q15_t)0x7851,
-	(q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD3F4, (q15_t)0x782E,
-	(q15_t)0xD3C5, (q15_t)0x781D, (q15_t)0xD396, (q15_t)0x780C,
-	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD337, (q15_t)0x77E9,
-	(q15_t)0xD308, (q15_t)0x77D7, (q15_t)0xD2D9, (q15_t)0x77C5,
-	(q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD27B, (q15_t)0x77A2,
-	(q15_t)0xD24C, (q15_t)0x7790, (q15_t)0xD21D, (q15_t)0x777E,
-	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD1C0, (q15_t)0x775A,
-	(q15_t)0xD191, (q15_t)0x7747, (q15_t)0xD162, (q15_t)0x7735,
-	(q15_t)0xD133, (q15_t)0x7723, (q15_t)0xD104, (q15_t)0x7710,
-	(q15_t)0xD0D6, (q15_t)0x76FE, (q15_t)0xD0A7, (q15_t)0x76EB,
-	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xD04A, (q15_t)0x76C6,
-	(q15_t)0xD01B, (q15_t)0x76B3, (q15_t)0xCFEC, (q15_t)0x76A0,
-	(q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF8F, (q15_t)0x767B,
-	(q15_t)0xCF61, (q15_t)0x7668, (q15_t)0xCF32, (q15_t)0x7654,
-	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCED5, (q15_t)0x762E,
-	(q15_t)0xCEA7, (q15_t)0x761B, (q15_t)0xCE79, (q15_t)0x7607,
-	(q15_t)0xCE4A, (q15_t)0x75F4, (q15_t)0xCE1C, (q15_t)0x75E0,
-	(q15_t)0xCDEE, (q15_t)0x75CC, (q15_t)0xCDBF, (q15_t)0x75B9,
-	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCD63, (q15_t)0x7591,
-	(q15_t)0xCD35, (q15_t)0x757D, (q15_t)0xCD07, (q15_t)0x7569,
-	(q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCCAB, (q15_t)0x7541,
-	(q15_t)0xCC7D, (q15_t)0x752D, (q15_t)0xCC4F, (q15_t)0x7519,
-	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBF3, (q15_t)0x74F0,
-	(q15_t)0xCBC5, (q15_t)0x74DB, (q15_t)0xCB97, (q15_t)0x74C7,
-	(q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB3B, (q15_t)0x749E,
-	(q15_t)0xCB0D, (q15_t)0x7489, (q15_t)0xCAE0, (q15_t)0x7474,
-	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xCA84, (q15_t)0x744A,
-	(q15_t)0xCA57, (q15_t)0x7435, (q15_t)0xCA29, (q15_t)0x7420,
-	(q15_t)0xC9FB, (q15_t)0x740B, (q15_t)0xC9CE, (q15_t)0x73F6,
-	(q15_t)0xC9A0, (q15_t)0x73E0, (q15_t)0xC973, (q15_t)0x73CB,
-	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC918, (q15_t)0x73A0,
-	(q15_t)0xC8EB, (q15_t)0x738A, (q15_t)0xC8BD, (q15_t)0x7375,
-	(q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC863, (q15_t)0x7349,
-	(q15_t)0xC835, (q15_t)0x7333, (q15_t)0xC808, (q15_t)0x731D,
-	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC7AE, (q15_t)0x72F1,
-	(q15_t)0xC781, (q15_t)0x72DB, (q15_t)0xC754, (q15_t)0x72C5,
-	(q15_t)0xC727, (q15_t)0x72AF, (q15_t)0xC6F9, (q15_t)0x7298,
-	(q15_t)0xC6CD, (q15_t)0x7282, (q15_t)0xC6A0, (q15_t)0x726B,
-	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC646, (q15_t)0x723E,
-	(q15_t)0xC619, (q15_t)0x7227, (q15_t)0xC5EC, (q15_t)0x7211,
-	(q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC593, (q15_t)0x71E3,
-	(q15_t)0xC566, (q15_t)0x71CC, (q15_t)0xC539, (q15_t)0x71B5,
-	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4E0, (q15_t)0x7186,
-	(q15_t)0xC4B3, (q15_t)0x716F, (q15_t)0xC487, (q15_t)0x7158,
-	(q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC42E, (q15_t)0x7129,
-	(q15_t)0xC402, (q15_t)0x7112, (q15_t)0xC3D5, (q15_t)0x70FA,
-	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC37C, (q15_t)0x70CB,
-	(q15_t)0xC350, (q15_t)0x70B3, (q15_t)0xC324, (q15_t)0x709B,
-	(q15_t)0xC2F8, (q15_t)0x7083, (q15_t)0xC2CC, (q15_t)0x706B,
-	(q15_t)0xC29F, (q15_t)0x7053, (q15_t)0xC273, (q15_t)0x703B,
-	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC21B, (q15_t)0x700A,
-	(q15_t)0xC1EF, (q15_t)0x6FF2, (q15_t)0xC1C3, (q15_t)0x6FDA,
-	(q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC16C, (q15_t)0x6FA9,
-	(q15_t)0xC140, (q15_t)0x6F90, (q15_t)0xC114, (q15_t)0x6F77,
-	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC0BC, (q15_t)0x6F46,
-	(q15_t)0xC091, (q15_t)0x6F2D, (q15_t)0xC065, (q15_t)0x6F14,
-	(q15_t)0xC03A, (q15_t)0x6EFB, (q15_t)0xC00E, (q15_t)0x6EE2,
-	(q15_t)0xBFE2, (q15_t)0x6EC9, (q15_t)0xBFB7, (q15_t)0x6EAF,
-	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBF60, (q15_t)0x6E7D,
-	(q15_t)0xBF35, (q15_t)0x6E63, (q15_t)0xBF09, (q15_t)0x6E4A,
-	(q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBEB3, (q15_t)0x6E17,
-	(q15_t)0xBE88, (q15_t)0x6DFD, (q15_t)0xBE5D, (q15_t)0x6DE3,
-	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBE06, (q15_t)0x6DB0,
-	(q15_t)0xBDDB, (q15_t)0x6D96, (q15_t)0xBDB0, (q15_t)0x6D7C,
-	(q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD5A, (q15_t)0x6D48,
-	(q15_t)0xBD2F, (q15_t)0x6D2D, (q15_t)0xBD05, (q15_t)0x6D13,
-	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBCAF, (q15_t)0x6CDE,
-	(q15_t)0xBC84, (q15_t)0x6CC4, (q15_t)0xBC5A, (q15_t)0x6CA9,
-	(q15_t)0xBC2F, (q15_t)0x6C8F, (q15_t)0xBC04, (q15_t)0x6C74,
-	(q15_t)0xBBDA, (q15_t)0x6C59, (q15_t)0xBBAF, (q15_t)0x6C3F,
-	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBB5A, (q15_t)0x6C09,
-	(q15_t)0xBB30, (q15_t)0x6BEE, (q15_t)0xBB05, (q15_t)0x6BD3,
-	(q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBAB1, (q15_t)0x6B9C,
-	(q15_t)0xBA87, (q15_t)0x6B81, (q15_t)0xBA5C, (q15_t)0x6B66,
-	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xBA08, (q15_t)0x6B2F,
-	(q15_t)0xB9DE, (q15_t)0x6B13, (q15_t)0xB9B4, (q15_t)0x6AF8,
-	(q15_t)0xB98A, (q15_t)0x6ADC, (q15_t)0xB960, (q15_t)0x6AC1,
-	(q15_t)0xB936, (q15_t)0x6AA5, (q15_t)0xB90C, (q15_t)0x6A89,
-	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB8B9, (q15_t)0x6A51,
-	(q15_t)0xB88F, (q15_t)0x6A35, (q15_t)0xB865, (q15_t)0x6A19,
-	(q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB812, (q15_t)0x69E1,
-	(q15_t)0xB7E9, (q15_t)0x69C4, (q15_t)0xB7BF, (q15_t)0x69A8,
-	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB76C, (q15_t)0x696F,
-	(q15_t)0xB743, (q15_t)0x6953, (q15_t)0xB719, (q15_t)0x6936,
-	(q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB6C7, (q15_t)0x68FD,
-	(q15_t)0xB69E, (q15_t)0x68E0, (q15_t)0xB675, (q15_t)0x68C3,
-	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB622, (q15_t)0x6889,
-	(q15_t)0xB5F9, (q15_t)0x686C, (q15_t)0xB5D0, (q15_t)0x684F,
-	(q15_t)0xB5A7, (q15_t)0x6832, (q15_t)0xB57E, (q15_t)0x6815,
-	(q15_t)0xB556, (q15_t)0x67F7, (q15_t)0xB52D, (q15_t)0x67DA,
-	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB4DB, (q15_t)0x679F,
-	(q15_t)0xB4B3, (q15_t)0x6782, (q15_t)0xB48A, (q15_t)0x6764,
-	(q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB439, (q15_t)0x6729,
-	(q15_t)0xB410, (q15_t)0x670B, (q15_t)0xB3E8, (q15_t)0x66ED,
-	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB397, (q15_t)0x66B1,
-	(q15_t)0xB36F, (q15_t)0x6693, (q15_t)0xB347, (q15_t)0x6675,
-	(q15_t)0xB31E, (q15_t)0x6657, (q15_t)0xB2F6, (q15_t)0x6639,
-	(q15_t)0xB2CE, (q15_t)0x661A, (q15_t)0xB2A6, (q15_t)0x65FC,
-	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB256, (q15_t)0x65BF,
-	(q15_t)0xB22E, (q15_t)0x65A0, (q15_t)0xB206, (q15_t)0x6582,
-	(q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB1B7, (q15_t)0x6545,
-	(q15_t)0xB18F, (q15_t)0x6526, (q15_t)0xB167, (q15_t)0x6507,
-	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB118, (q15_t)0x64C9,
-	(q15_t)0xB0F0, (q15_t)0x64AA, (q15_t)0xB0C9, (q15_t)0x648B,
-	(q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB07A, (q15_t)0x644D,
-	(q15_t)0xB053, (q15_t)0x642D, (q15_t)0xB02B, (q15_t)0x640E,
-	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAFDD, (q15_t)0x63CF,
-	(q15_t)0xAFB6, (q15_t)0x63B0, (q15_t)0xAF8F, (q15_t)0x6390,
-	(q15_t)0xAF68, (q15_t)0x6371, (q15_t)0xAF40, (q15_t)0x6351,
-	(q15_t)0xAF1A, (q15_t)0x6331, (q15_t)0xAEF3, (q15_t)0x6311,
-	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAEA5, (q15_t)0x62D2,
-	(q15_t)0xAE7E, (q15_t)0x62B2, (q15_t)0xAE57, (q15_t)0x6292,
-	(q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xAE0A, (q15_t)0x6251,
-	(q15_t)0xADE3, (q15_t)0x6231, (q15_t)0xADBD, (q15_t)0x6211,
-	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD70, (q15_t)0x61D0,
-	(q15_t)0xAD4A, (q15_t)0x61B0, (q15_t)0xAD23, (q15_t)0x618F,
-	(q15_t)0xACFD, (q15_t)0x616F, (q15_t)0xACD7, (q15_t)0x614E,
-	(q15_t)0xACB1, (q15_t)0x612D, (q15_t)0xAC8A, (q15_t)0x610D,
-	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAC3E, (q15_t)0x60CB,
-	(q15_t)0xAC18, (q15_t)0x60AA, (q15_t)0xABF2, (q15_t)0x6089,
-	(q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xABA7, (q15_t)0x6047,
-	(q15_t)0xAB81, (q15_t)0x6026, (q15_t)0xAB5B, (q15_t)0x6004,
-	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAB10, (q15_t)0x5FC2,
-	(q15_t)0xAAEA, (q15_t)0x5FA0, (q15_t)0xAAC5, (q15_t)0x5F7F,
-	(q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA7A, (q15_t)0x5F3C,
-	(q15_t)0xAA54, (q15_t)0x5F1A, (q15_t)0xAA2F, (q15_t)0x5EF9,
-	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA9E5, (q15_t)0x5EB5,
-	(q15_t)0xA9BF, (q15_t)0x5E93, (q15_t)0xA99A, (q15_t)0x5E71,
-	(q15_t)0xA975, (q15_t)0x5E50, (q15_t)0xA950, (q15_t)0x5E2D,
-	(q15_t)0xA92B, (q15_t)0x5E0B, (q15_t)0xA906, (q15_t)0x5DE9,
-	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA8BD, (q15_t)0x5DA5,
-	(q15_t)0xA898, (q15_t)0x5D83, (q15_t)0xA873, (q15_t)0x5D60,
-	(q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA82A, (q15_t)0x5D1B,
-	(q15_t)0xA806, (q15_t)0x5CF9, (q15_t)0xA7E1, (q15_t)0x5CD6,
-	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA798, (q15_t)0x5C91,
-	(q15_t)0xA774, (q15_t)0x5C6E, (q15_t)0xA750, (q15_t)0x5C4B,
-	(q15_t)0xA72B, (q15_t)0x5C29, (q15_t)0xA707, (q15_t)0x5C06,
-	(q15_t)0xA6E3, (q15_t)0x5BE3, (q15_t)0xA6BF, (q15_t)0x5BC0,
-	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA677, (q15_t)0x5B79,
-	(q15_t)0xA653, (q15_t)0x5B56, (q15_t)0xA62F, (q15_t)0x5B33,
-	(q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA5E8, (q15_t)0x5AEC,
-	(q15_t)0xA5C4, (q15_t)0x5AC9, (q15_t)0xA5A1, (q15_t)0x5AA5,
-	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA55A, (q15_t)0x5A5E,
-	(q15_t)0xA536, (q15_t)0x5A3B, (q15_t)0xA513, (q15_t)0x5A17,
-	(q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4CC, (q15_t)0x59D0,
-	(q15_t)0xA4A9, (q15_t)0x59AC, (q15_t)0xA486, (q15_t)0x5988,
-	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA43F, (q15_t)0x5940,
-	(q15_t)0xA41C, (q15_t)0x591C, (q15_t)0xA3F9, (q15_t)0x58F8,
-	(q15_t)0xA3D6, (q15_t)0x58D4, (q15_t)0xA3B4, (q15_t)0x58AF,
-	(q15_t)0xA391, (q15_t)0x588B, (q15_t)0xA36E, (q15_t)0x5867,
-	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA329, (q15_t)0x581E,
-	(q15_t)0xA306, (q15_t)0x57F9, (q15_t)0xA2E4, (q15_t)0x57D5,
-	(q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA29F, (q15_t)0x578C,
-	(q15_t)0xA27C, (q15_t)0x5767, (q15_t)0xA25A, (q15_t)0x5742,
-	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA216, (q15_t)0x56F9,
-	(q15_t)0xA1F4, (q15_t)0x56D4, (q15_t)0xA1D2, (q15_t)0x56AF,
-	(q15_t)0xA1AF, (q15_t)0x568A, (q15_t)0xA18E, (q15_t)0x5665,
-	(q15_t)0xA16C, (q15_t)0x5640, (q15_t)0xA14A, (q15_t)0x561A,
-	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA106, (q15_t)0x55D0,
-	(q15_t)0xA0E5, (q15_t)0x55AB, (q15_t)0xA0C3, (q15_t)0x5585,
-	(q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA080, (q15_t)0x553A,
-	(q15_t)0xA05F, (q15_t)0x5515, (q15_t)0xA03D, (q15_t)0x54EF,
-	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FFB, (q15_t)0x54A4,
-	(q15_t)0x9FD9, (q15_t)0x547E, (q15_t)0x9FB8, (q15_t)0x5458,
-	(q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F76, (q15_t)0x540D,
-	(q15_t)0x9F55, (q15_t)0x53E7, (q15_t)0x9F34, (q15_t)0x53C1,
-	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9EF2, (q15_t)0x5375,
-	(q15_t)0x9ED2, (q15_t)0x534E, (q15_t)0x9EB1, (q15_t)0x5328,
-	(q15_t)0x9E90, (q15_t)0x5302, (q15_t)0x9E70, (q15_t)0x52DC,
-	(q15_t)0x9E4F, (q15_t)0x52B5, (q15_t)0x9E2F, (q15_t)0x528F,
-	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9DEE, (q15_t)0x5242,
-	(q15_t)0x9DCE, (q15_t)0x521C, (q15_t)0x9DAE, (q15_t)0x51F5,
-	(q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D6D, (q15_t)0x51A8,
-	(q15_t)0x9D4D, (q15_t)0x5181, (q15_t)0x9D2D, (q15_t)0x515A,
-	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CEE, (q15_t)0x510C,
-	(q15_t)0x9CCE, (q15_t)0x50E5, (q15_t)0x9CAE, (q15_t)0x50BF,
-	(q15_t)0x9C8E, (q15_t)0x5097, (q15_t)0x9C6F, (q15_t)0x5070,
-	(q15_t)0x9C4F, (q15_t)0x5049, (q15_t)0x9C30, (q15_t)0x5022,
-	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9BF1, (q15_t)0x4FD4,
-	(q15_t)0x9BD2, (q15_t)0x4FAC, (q15_t)0x9BB2, (q15_t)0x4F85,
-	(q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B74, (q15_t)0x4F36,
-	(q15_t)0x9B55, (q15_t)0x4F0F, (q15_t)0x9B36, (q15_t)0x4EE7,
-	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AF8, (q15_t)0x4E98,
-	(q15_t)0x9AD9, (q15_t)0x4E70, (q15_t)0x9ABA, (q15_t)0x4E48,
-	(q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A7D, (q15_t)0x4DF9,
-	(q15_t)0x9A5F, (q15_t)0x4DD1, (q15_t)0x9A40, (q15_t)0x4DA9,
-	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x9A03, (q15_t)0x4D59,
-	(q15_t)0x99E5, (q15_t)0x4D31, (q15_t)0x99C6, (q15_t)0x4D09,
-	(q15_t)0x99A8, (q15_t)0x4CE1, (q15_t)0x998A, (q15_t)0x4CB8,
-	(q15_t)0x996C, (q15_t)0x4C90, (q15_t)0x994E, (q15_t)0x4C68,
-	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9912, (q15_t)0x4C17,
-	(q15_t)0x98F4, (q15_t)0x4BEF, (q15_t)0x98D6, (q15_t)0x4BC6,
-	(q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x989B, (q15_t)0x4B75,
-	(q15_t)0x987D, (q15_t)0x4B4C, (q15_t)0x9860, (q15_t)0x4B24,
-	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9825, (q15_t)0x4AD2,
-	(q15_t)0x9808, (q15_t)0x4AA9, (q15_t)0x97EA, (q15_t)0x4A81,
-	(q15_t)0x97CD, (q15_t)0x4A58, (q15_t)0x97B0, (q15_t)0x4A2F,
-	(q15_t)0x9793, (q15_t)0x4A06, (q15_t)0x9776, (q15_t)0x49DD,
-	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x973C, (q15_t)0x498A,
-	(q15_t)0x971F, (q15_t)0x4961, (q15_t)0x9702, (q15_t)0x4938,
-	(q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x96C9, (q15_t)0x48E6,
-	(q15_t)0x96AC, (q15_t)0x48BC, (q15_t)0x9690, (q15_t)0x4893,
-	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x9657, (q15_t)0x4840,
-	(q15_t)0x963B, (q15_t)0x4816, (q15_t)0x961E, (q15_t)0x47ED,
-	(q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95E6, (q15_t)0x479A,
-	(q15_t)0x95CA, (q15_t)0x4770, (q15_t)0x95AE, (q15_t)0x4746,
-	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9576, (q15_t)0x46F3,
-	(q15_t)0x955A, (q15_t)0x46C9, (q15_t)0x953E, (q15_t)0x469F,
-	(q15_t)0x9523, (q15_t)0x4675, (q15_t)0x9507, (q15_t)0x464B,
-	(q15_t)0x94EC, (q15_t)0x4621, (q15_t)0x94D0, (q15_t)0x45F7,
-	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x9499, (q15_t)0x45A3,
-	(q15_t)0x947E, (q15_t)0x4578, (q15_t)0x9463, (q15_t)0x454E,
-	(q15_t)0x9447, (q15_t)0x4524, (q15_t)0x942C, (q15_t)0x44FA,
-	(q15_t)0x9411, (q15_t)0x44CF, (q15_t)0x93F6, (q15_t)0x44A5,
-	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93C0, (q15_t)0x4450,
-	(q15_t)0x93A6, (q15_t)0x4425, (q15_t)0x938B, (q15_t)0x43FB,
-	(q15_t)0x9370, (q15_t)0x43D0, (q15_t)0x9356, (q15_t)0x43A5,
-	(q15_t)0x933B, (q15_t)0x437B, (q15_t)0x9321, (q15_t)0x4350,
-	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x92EC, (q15_t)0x42FA,
-	(q15_t)0x92D2, (q15_t)0x42D0, (q15_t)0x92B7, (q15_t)0x42A5,
-	(q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9283, (q15_t)0x424F,
-	(q15_t)0x9269, (q15_t)0x4224, (q15_t)0x924F, (q15_t)0x41F9,
-	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x921C, (q15_t)0x41A2,
-	(q15_t)0x9202, (q15_t)0x4177, (q15_t)0x91E8, (q15_t)0x414C,
-	(q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x91B5, (q15_t)0x40F6,
-	(q15_t)0x919C, (q15_t)0x40CA, (q15_t)0x9182, (q15_t)0x409F,
-	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9150, (q15_t)0x4048,
-	(q15_t)0x9136, (q15_t)0x401D, (q15_t)0x911D, (q15_t)0x3FF1,
-	(q15_t)0x9104, (q15_t)0x3FC5, (q15_t)0x90EB, (q15_t)0x3F9A,
-	(q15_t)0x90D2, (q15_t)0x3F6E, (q15_t)0x90B9, (q15_t)0x3F43,
-	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x9088, (q15_t)0x3EEB,
-	(q15_t)0x906F, (q15_t)0x3EBF, (q15_t)0x9056, (q15_t)0x3E93,
-	(q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x9025, (q15_t)0x3E3C,
-	(q15_t)0x900D, (q15_t)0x3E10, (q15_t)0x8FF5, (q15_t)0x3DE4,
-	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FC4, (q15_t)0x3D8C,
-	(q15_t)0x8FAC, (q15_t)0x3D60, (q15_t)0x8F94, (q15_t)0x3D33,
-	(q15_t)0x8F7C, (q15_t)0x3D07, (q15_t)0x8F64, (q15_t)0x3CDB,
-	(q15_t)0x8F4C, (q15_t)0x3CAF, (q15_t)0x8F34, (q15_t)0x3C83,
-	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8F05, (q15_t)0x3C2A,
-	(q15_t)0x8EED, (q15_t)0x3BFD, (q15_t)0x8ED6, (q15_t)0x3BD1,
-	(q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8EA7, (q15_t)0x3B78,
-	(q15_t)0x8E90, (q15_t)0x3B4C, (q15_t)0x8E79, (q15_t)0x3B1F,
-	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E4A, (q15_t)0x3AC6,
-	(q15_t)0x8E33, (q15_t)0x3A99, (q15_t)0x8E1C, (q15_t)0x3A6C,
-	(q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DEE, (q15_t)0x3A13,
-	(q15_t)0x8DD8, (q15_t)0x39E6, (q15_t)0x8DC1, (q15_t)0x39B9,
-	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D94, (q15_t)0x395F,
-	(q15_t)0x8D7D, (q15_t)0x3932, (q15_t)0x8D67, (q15_t)0x3906,
-	(q15_t)0x8D50, (q15_t)0x38D8, (q15_t)0x8D3A, (q15_t)0x38AB,
-	(q15_t)0x8D24, (q15_t)0x387E, (q15_t)0x8D0E, (q15_t)0x3851,
-	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CE2, (q15_t)0x37F7,
-	(q15_t)0x8CCC, (q15_t)0x37CA, (q15_t)0x8CB6, (q15_t)0x379C,
-	(q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C8A, (q15_t)0x3742,
-	(q15_t)0x8C75, (q15_t)0x3714, (q15_t)0x8C5F, (q15_t)0x36E7,
-	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C34, (q15_t)0x368C,
-	(q15_t)0x8C1F, (q15_t)0x365F, (q15_t)0x8C09, (q15_t)0x3631,
-	(q15_t)0x8BF4, (q15_t)0x3604, (q15_t)0x8BDF, (q15_t)0x35D6,
-	(q15_t)0x8BCA, (q15_t)0x35A8, (q15_t)0x8BB5, (q15_t)0x357B,
-	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B8B, (q15_t)0x351F,
-	(q15_t)0x8B76, (q15_t)0x34F2, (q15_t)0x8B61, (q15_t)0x34C4,
-	(q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8B38, (q15_t)0x3468,
-	(q15_t)0x8B24, (q15_t)0x343A, (q15_t)0x8B0F, (q15_t)0x340C,
-	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AE6, (q15_t)0x33B0,
-	(q15_t)0x8AD2, (q15_t)0x3382, (q15_t)0x8ABE, (q15_t)0x3354,
-	(q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A96, (q15_t)0x32F8,
-	(q15_t)0x8A82, (q15_t)0x32CA, (q15_t)0x8A6E, (q15_t)0x329C,
-	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A46, (q15_t)0x3240,
-	(q15_t)0x8A33, (q15_t)0x3211, (q15_t)0x8A1F, (q15_t)0x31E3,
-	(q15_t)0x8A0B, (q15_t)0x31B5, (q15_t)0x89F8, (q15_t)0x3186,
-	(q15_t)0x89E4, (q15_t)0x3158, (q15_t)0x89D1, (q15_t)0x312A,
-	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x89AB, (q15_t)0x30CD,
-	(q15_t)0x8997, (q15_t)0x309E, (q15_t)0x8984, (q15_t)0x3070,
-	(q15_t)0x8971, (q15_t)0x3041, (q15_t)0x895F, (q15_t)0x3013,
-	(q15_t)0x894C, (q15_t)0x2FE4, (q15_t)0x8939, (q15_t)0x2FB5,
-	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8914, (q15_t)0x2F58,
-	(q15_t)0x8901, (q15_t)0x2F29, (q15_t)0x88EF, (q15_t)0x2EFB,
-	(q15_t)0x88DC, (q15_t)0x2ECC, (q15_t)0x88CA, (q15_t)0x2E9D,
-	(q15_t)0x88B8, (q15_t)0x2E6E, (q15_t)0x88A5, (q15_t)0x2E3F,
-	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8881, (q15_t)0x2DE2,
-	(q15_t)0x886F, (q15_t)0x2DB3, (q15_t)0x885D, (q15_t)0x2D84,
-	(q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x883A, (q15_t)0x2D26,
-	(q15_t)0x8828, (q15_t)0x2CF7, (q15_t)0x8816, (q15_t)0x2CC8,
-	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87F3, (q15_t)0x2C69,
-	(q15_t)0x87E2, (q15_t)0x2C3A, (q15_t)0x87D1, (q15_t)0x2C0B,
-	(q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x87AE, (q15_t)0x2BAD,
-	(q15_t)0x879D, (q15_t)0x2B7D, (q15_t)0x878C, (q15_t)0x2B4E,
-	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x876A, (q15_t)0x2AEF,
-	(q15_t)0x8759, (q15_t)0x2AC0, (q15_t)0x8749, (q15_t)0x2A91,
-	(q15_t)0x8738, (q15_t)0x2A61, (q15_t)0x8727, (q15_t)0x2A32,
-	(q15_t)0x8717, (q15_t)0x2A02, (q15_t)0x8706, (q15_t)0x29D3,
-	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86E6, (q15_t)0x2974,
-	(q15_t)0x86D5, (q15_t)0x2944, (q15_t)0x86C5, (q15_t)0x2915,
-	(q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x86A5, (q15_t)0x28B5,
-	(q15_t)0x8695, (q15_t)0x2886, (q15_t)0x8685, (q15_t)0x2856,
-	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8666, (q15_t)0x27F6,
-	(q15_t)0x8656, (q15_t)0x27C7, (q15_t)0x8646, (q15_t)0x2797,
-	(q15_t)0x8637, (q15_t)0x2767, (q15_t)0x8627, (q15_t)0x2737,
-	(q15_t)0x8618, (q15_t)0x2707, (q15_t)0x8609, (q15_t)0x26D8,
-	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85EA, (q15_t)0x2678,
-	(q15_t)0x85DB, (q15_t)0x2648, (q15_t)0x85CC, (q15_t)0x2618,
-	(q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x85AF, (q15_t)0x25B8,
-	(q15_t)0x85A0, (q15_t)0x2588, (q15_t)0x8591, (q15_t)0x2558,
-	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8574, (q15_t)0x24F7,
-	(q15_t)0x8565, (q15_t)0x24C7, (q15_t)0x8557, (q15_t)0x2497,
-	(q15_t)0x8549, (q15_t)0x2467, (q15_t)0x853A, (q15_t)0x2437,
-	(q15_t)0x852C, (q15_t)0x2407, (q15_t)0x851E, (q15_t)0x23D6,
-	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x8502, (q15_t)0x2376,
-	(q15_t)0x84F4, (q15_t)0x2345, (q15_t)0x84E6, (q15_t)0x2315,
-	(q15_t)0x84D9, (q15_t)0x22E5, (q15_t)0x84CB, (q15_t)0x22B4,
-	(q15_t)0x84BD, (q15_t)0x2284, (q15_t)0x84B0, (q15_t)0x2254,
-	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x8495, (q15_t)0x21F3,
-	(q15_t)0x8488, (q15_t)0x21C2, (q15_t)0x847B, (q15_t)0x2192,
-	(q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8460, (q15_t)0x2131,
-	(q15_t)0x8453, (q15_t)0x2100, (q15_t)0x8446, (q15_t)0x20D0,
-	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x842D, (q15_t)0x206E,
-	(q15_t)0x8420, (q15_t)0x203E, (q15_t)0x8414, (q15_t)0x200D,
-	(q15_t)0x8407, (q15_t)0x1FDC, (q15_t)0x83FA, (q15_t)0x1FAC,
-	(q15_t)0x83EE, (q15_t)0x1F7B, (q15_t)0x83E2, (q15_t)0x1F4A,
-	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83C9, (q15_t)0x1EE9,
-	(q15_t)0x83BD, (q15_t)0x1EB8, (q15_t)0x83B1, (q15_t)0x1E87,
-	(q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x8399, (q15_t)0x1E25,
-	(q15_t)0x838E, (q15_t)0x1DF5, (q15_t)0x8382, (q15_t)0x1DC4,
-	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x836B, (q15_t)0x1D62,
-	(q15_t)0x835F, (q15_t)0x1D31, (q15_t)0x8354, (q15_t)0x1D00,
-	(q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x833D, (q15_t)0x1C9E,
-	(q15_t)0x8332, (q15_t)0x1C6D, (q15_t)0x8327, (q15_t)0x1C3C,
-	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x8311, (q15_t)0x1BDA,
-	(q15_t)0x8306, (q15_t)0x1BA9, (q15_t)0x82FB, (q15_t)0x1B78,
-	(q15_t)0x82F0, (q15_t)0x1B47, (q15_t)0x82E6, (q15_t)0x1B16,
-	(q15_t)0x82DB, (q15_t)0x1AE4, (q15_t)0x82D0, (q15_t)0x1AB3,
-	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x82BC, (q15_t)0x1A51,
-	(q15_t)0x82B1, (q15_t)0x1A20, (q15_t)0x82A7, (q15_t)0x19EF,
-	(q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8293, (q15_t)0x198C,
-	(q15_t)0x8289, (q15_t)0x195B, (q15_t)0x827F, (q15_t)0x192A,
-	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x826B, (q15_t)0x18C7,
-	(q15_t)0x8262, (q15_t)0x1896, (q15_t)0x8258, (q15_t)0x1864,
-	(q15_t)0x824F, (q15_t)0x1833, (q15_t)0x8245, (q15_t)0x1802,
-	(q15_t)0x823C, (q15_t)0x17D0, (q15_t)0x8232, (q15_t)0x179F,
-	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8220, (q15_t)0x173C,
-	(q15_t)0x8217, (q15_t)0x170A, (q15_t)0x820E, (q15_t)0x16D9,
-	(q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81FC, (q15_t)0x1676,
-	(q15_t)0x81F3, (q15_t)0x1645, (q15_t)0x81EB, (q15_t)0x1613,
-	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D9, (q15_t)0x15B0,
-	(q15_t)0x81D1, (q15_t)0x157F, (q15_t)0x81C8, (q15_t)0x154D,
-	(q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B8, (q15_t)0x14EA,
-	(q15_t)0x81B0, (q15_t)0x14B8, (q15_t)0x81A8, (q15_t)0x1487,
-	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8198, (q15_t)0x1423,
-	(q15_t)0x8190, (q15_t)0x13F2, (q15_t)0x8188, (q15_t)0x13C0,
-	(q15_t)0x8180, (q15_t)0x138E, (q15_t)0x8179, (q15_t)0x135D,
-	(q15_t)0x8171, (q15_t)0x132B, (q15_t)0x816A, (q15_t)0x12F9,
-	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x815B, (q15_t)0x1296,
-	(q15_t)0x8154, (q15_t)0x1264, (q15_t)0x814C, (q15_t)0x1232,
-	(q15_t)0x8145, (q15_t)0x1201, (q15_t)0x813E, (q15_t)0x11CF,
-	(q15_t)0x8137, (q15_t)0x119D, (q15_t)0x8130, (q15_t)0x116B,
-	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x8123, (q15_t)0x1108,
-	(q15_t)0x811C, (q15_t)0x10D6, (q15_t)0x8116, (q15_t)0x10A4,
-	(q15_t)0x810F, (q15_t)0x1072, (q15_t)0x8109, (q15_t)0x1040,
-	(q15_t)0x8102, (q15_t)0x100E, (q15_t)0x80FC, (q15_t)0x0FDD,
-	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80F0, (q15_t)0x0F79,
-	(q15_t)0x80EA, (q15_t)0x0F47, (q15_t)0x80E4, (q15_t)0x0F15,
-	(q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80D8, (q15_t)0x0EB1,
-	(q15_t)0x80D2, (q15_t)0x0E7F, (q15_t)0x80CD, (q15_t)0x0E4D,
-	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80C2, (q15_t)0x0DE9,
-	(q15_t)0x80BC, (q15_t)0x0DB7, (q15_t)0x80B7, (q15_t)0x0D85,
-	(q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80AC, (q15_t)0x0D21,
-	(q15_t)0x80A7, (q15_t)0x0CEF, (q15_t)0x80A2, (q15_t)0x0CBD,
-	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8098, (q15_t)0x0C59,
-	(q15_t)0x8094, (q15_t)0x0C27, (q15_t)0x808F, (q15_t)0x0BF5,
-	(q15_t)0x808A, (q15_t)0x0BC3, (q15_t)0x8086, (q15_t)0x0B91,
-	(q15_t)0x8081, (q15_t)0x0B5F, (q15_t)0x807D, (q15_t)0x0B2D,
-	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8074, (q15_t)0x0AC9,
-	(q15_t)0x8070, (q15_t)0x0A97, (q15_t)0x806C, (q15_t)0x0A65,
-	(q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8064, (q15_t)0x0A00,
-	(q15_t)0x8060, (q15_t)0x09CE, (q15_t)0x805C, (q15_t)0x099C,
-	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8055, (q15_t)0x0938,
-	(q15_t)0x8051, (q15_t)0x0906, (q15_t)0x804E, (q15_t)0x08D4,
-	(q15_t)0x804A, (q15_t)0x08A2, (q15_t)0x8047, (q15_t)0x086F,
-	(q15_t)0x8043, (q15_t)0x083D, (q15_t)0x8040, (q15_t)0x080B,
-	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x803A, (q15_t)0x07A7,
-	(q15_t)0x8037, (q15_t)0x0775, (q15_t)0x8034, (q15_t)0x0742,
-	(q15_t)0x8031, (q15_t)0x0710, (q15_t)0x802F, (q15_t)0x06DE,
-	(q15_t)0x802C, (q15_t)0x06AC, (q15_t)0x8029, (q15_t)0x067A,
-	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8025, (q15_t)0x0615,
-	(q15_t)0x8022, (q15_t)0x05E3, (q15_t)0x8020, (q15_t)0x05B1,
-	(q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801C, (q15_t)0x054C,
-	(q15_t)0x801A, (q15_t)0x051A, (q15_t)0x8018, (q15_t)0x04E8,
-	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x8014, (q15_t)0x0483,
-	(q15_t)0x8012, (q15_t)0x0451, (q15_t)0x8011, (q15_t)0x041F,
-	(q15_t)0x800F, (q15_t)0x03ED, (q15_t)0x800D, (q15_t)0x03BA,
-	(q15_t)0x800C, (q15_t)0x0388, (q15_t)0x800B, (q15_t)0x0356,
-	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8008, (q15_t)0x02F1,
-	(q15_t)0x8007, (q15_t)0x02BF, (q15_t)0x8006, (q15_t)0x028D,
-	(q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8004, (q15_t)0x0228,
-	(q15_t)0x8003, (q15_t)0x01F6, (q15_t)0x8003, (q15_t)0x01C4,
-	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x015F,
-	(q15_t)0x8001, (q15_t)0x012D, (q15_t)0x8000, (q15_t)0x00FB,
-	(q15_t)0x8000, (q15_t)0x00C9, (q15_t)0x8000, (q15_t)0x0096,
-	(q15_t)0x8000, (q15_t)0x0064, (q15_t)0x8000, (q15_t)0x0032,
-	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFFCD,
-	(q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFF69,
-	(q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF04,
-	(q15_t)0x8001, (q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFEA0,
-	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003, (q15_t)0xFE3B,
-	(q15_t)0x8003, (q15_t)0xFE09, (q15_t)0x8004, (q15_t)0xFDD7,
-	(q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8006, (q15_t)0xFD72,
-	(q15_t)0x8007, (q15_t)0xFD40, (q15_t)0x8008, (q15_t)0xFD0E,
-	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800B, (q15_t)0xFCA9,
-	(q15_t)0x800C, (q15_t)0xFC77, (q15_t)0x800D, (q15_t)0xFC45,
-	(q15_t)0x800F, (q15_t)0xFC12, (q15_t)0x8011, (q15_t)0xFBE0,
-	(q15_t)0x8012, (q15_t)0xFBAE, (q15_t)0x8014, (q15_t)0xFB7C,
-	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x8018, (q15_t)0xFB17,
-	(q15_t)0x801A, (q15_t)0xFAE5, (q15_t)0x801C, (q15_t)0xFAB3,
-	(q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8020, (q15_t)0xFA4E,
-	(q15_t)0x8022, (q15_t)0xFA1C, (q15_t)0x8025, (q15_t)0xF9EA,
-	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8029, (q15_t)0xF985,
-	(q15_t)0x802C, (q15_t)0xF953, (q15_t)0x802F, (q15_t)0xF921,
-	(q15_t)0x8031, (q15_t)0xF8EF, (q15_t)0x8034, (q15_t)0xF8BD,
-	(q15_t)0x8037, (q15_t)0xF88A, (q15_t)0x803A, (q15_t)0xF858,
-	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8040, (q15_t)0xF7F4,
-	(q15_t)0x8043, (q15_t)0xF7C2, (q15_t)0x8047, (q15_t)0xF790,
-	(q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x804E, (q15_t)0xF72B,
-	(q15_t)0x8051, (q15_t)0xF6F9, (q15_t)0x8055, (q15_t)0xF6C7,
-	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x805C, (q15_t)0xF663,
-	(q15_t)0x8060, (q15_t)0xF631, (q15_t)0x8064, (q15_t)0xF5FF,
-	(q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x806C, (q15_t)0xF59A,
-	(q15_t)0x8070, (q15_t)0xF568, (q15_t)0x8074, (q15_t)0xF536,
-	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x807D, (q15_t)0xF4D2,
-	(q15_t)0x8081, (q15_t)0xF4A0, (q15_t)0x8086, (q15_t)0xF46E,
-	(q15_t)0x808A, (q15_t)0xF43C, (q15_t)0x808F, (q15_t)0xF40A,
-	(q15_t)0x8094, (q15_t)0xF3D8, (q15_t)0x8098, (q15_t)0xF3A6,
-	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80A2, (q15_t)0xF342,
-	(q15_t)0x80A7, (q15_t)0xF310, (q15_t)0x80AC, (q15_t)0xF2DE,
-	(q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80B7, (q15_t)0xF27A,
-	(q15_t)0x80BC, (q15_t)0xF248, (q15_t)0x80C2, (q15_t)0xF216,
-	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80CD, (q15_t)0xF1B2,
-	(q15_t)0x80D2, (q15_t)0xF180, (q15_t)0x80D8, (q15_t)0xF14E,
-	(q15_t)0x80DE, (q15_t)0xF11C, (q15_t)0x80E4, (q15_t)0xF0EA,
-	(q15_t)0x80EA, (q15_t)0xF0B8, (q15_t)0x80F0, (q15_t)0xF086,
-	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x80FC, (q15_t)0xF022,
-	(q15_t)0x8102, (q15_t)0xEFF1, (q15_t)0x8109, (q15_t)0xEFBF,
-	(q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x8116, (q15_t)0xEF5B,
-	(q15_t)0x811C, (q15_t)0xEF29, (q15_t)0x8123, (q15_t)0xEEF7,
-	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8130, (q15_t)0xEE94,
-	(q15_t)0x8137, (q15_t)0xEE62, (q15_t)0x813E, (q15_t)0xEE30,
-	(q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x814C, (q15_t)0xEDCD,
-	(q15_t)0x8154, (q15_t)0xED9B, (q15_t)0x815B, (q15_t)0xED69,
-	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x816A, (q15_t)0xED06,
-	(q15_t)0x8171, (q15_t)0xECD4, (q15_t)0x8179, (q15_t)0xECA2,
-	(q15_t)0x8180, (q15_t)0xEC71, (q15_t)0x8188, (q15_t)0xEC3F,
-	(q15_t)0x8190, (q15_t)0xEC0D, (q15_t)0x8198, (q15_t)0xEBDC,
-	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81A8, (q15_t)0xEB78,
-	(q15_t)0x81B0, (q15_t)0xEB47, (q15_t)0x81B8, (q15_t)0xEB15,
-	(q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81C8, (q15_t)0xEAB2,
-	(q15_t)0x81D1, (q15_t)0xEA80, (q15_t)0x81D9, (q15_t)0xEA4F,
-	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81EB, (q15_t)0xE9EC,
-	(q15_t)0x81F3, (q15_t)0xE9BA, (q15_t)0x81FC, (q15_t)0xE989,
-	(q15_t)0x8205, (q15_t)0xE957, (q15_t)0x820E, (q15_t)0xE926,
-	(q15_t)0x8217, (q15_t)0xE8F5, (q15_t)0x8220, (q15_t)0xE8C3,
-	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x8232, (q15_t)0xE860,
-	(q15_t)0x823C, (q15_t)0xE82F, (q15_t)0x8245, (q15_t)0xE7FD,
-	(q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8258, (q15_t)0xE79B,
-	(q15_t)0x8262, (q15_t)0xE769, (q15_t)0x826B, (q15_t)0xE738,
-	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x827F, (q15_t)0xE6D5,
-	(q15_t)0x8289, (q15_t)0xE6A4, (q15_t)0x8293, (q15_t)0xE673,
-	(q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82A7, (q15_t)0xE610,
-	(q15_t)0x82B1, (q15_t)0xE5DF, (q15_t)0x82BC, (q15_t)0xE5AE,
-	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82D0, (q15_t)0xE54C,
-	(q15_t)0x82DB, (q15_t)0xE51B, (q15_t)0x82E6, (q15_t)0xE4E9,
-	(q15_t)0x82F0, (q15_t)0xE4B8, (q15_t)0x82FB, (q15_t)0xE487,
-	(q15_t)0x8306, (q15_t)0xE456, (q15_t)0x8311, (q15_t)0xE425,
-	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8327, (q15_t)0xE3C3,
-	(q15_t)0x8332, (q15_t)0xE392, (q15_t)0x833D, (q15_t)0xE361,
-	(q15_t)0x8348, (q15_t)0xE330, (q15_t)0x8354, (q15_t)0xE2FF,
-	(q15_t)0x835F, (q15_t)0xE2CE, (q15_t)0x836B, (q15_t)0xE29D,
-	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x8382, (q15_t)0xE23B,
-	(q15_t)0x838E, (q15_t)0xE20A, (q15_t)0x8399, (q15_t)0xE1DA,
-	(q15_t)0x83A5, (q15_t)0xE1A9, (q15_t)0x83B1, (q15_t)0xE178,
-	(q15_t)0x83BD, (q15_t)0xE147, (q15_t)0x83C9, (q15_t)0xE116,
-	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x83E2, (q15_t)0xE0B5,
-	(q15_t)0x83EE, (q15_t)0xE084, (q15_t)0x83FA, (q15_t)0xE053,
-	(q15_t)0x8407, (q15_t)0xE023, (q15_t)0x8414, (q15_t)0xDFF2,
-	(q15_t)0x8420, (q15_t)0xDFC1, (q15_t)0x842D, (q15_t)0xDF91,
-	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8446, (q15_t)0xDF2F,
-	(q15_t)0x8453, (q15_t)0xDEFF, (q15_t)0x8460, (q15_t)0xDECE,
-	(q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x847B, (q15_t)0xDE6D,
-	(q15_t)0x8488, (q15_t)0xDE3D, (q15_t)0x8495, (q15_t)0xDE0C,
-	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84B0, (q15_t)0xDDAB,
-	(q15_t)0x84BD, (q15_t)0xDD7B, (q15_t)0x84CB, (q15_t)0xDD4B,
-	(q15_t)0x84D9, (q15_t)0xDD1A, (q15_t)0x84E6, (q15_t)0xDCEA,
-	(q15_t)0x84F4, (q15_t)0xDCBA, (q15_t)0x8502, (q15_t)0xDC89,
-	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x851E, (q15_t)0xDC29,
-	(q15_t)0x852C, (q15_t)0xDBF8, (q15_t)0x853A, (q15_t)0xDBC8,
-	(q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8557, (q15_t)0xDB68,
-	(q15_t)0x8565, (q15_t)0xDB38, (q15_t)0x8574, (q15_t)0xDB08,
-	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8591, (q15_t)0xDAA7,
-	(q15_t)0x85A0, (q15_t)0xDA77, (q15_t)0x85AF, (q15_t)0xDA47,
-	(q15_t)0x85BD, (q15_t)0xDA17, (q15_t)0x85CC, (q15_t)0xD9E7,
-	(q15_t)0x85DB, (q15_t)0xD9B7, (q15_t)0x85EA, (q15_t)0xD987,
-	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8609, (q15_t)0xD927,
-	(q15_t)0x8618, (q15_t)0xD8F8, (q15_t)0x8627, (q15_t)0xD8C8,
-	(q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8646, (q15_t)0xD868,
-	(q15_t)0x8656, (q15_t)0xD838, (q15_t)0x8666, (q15_t)0xD809,
-	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8685, (q15_t)0xD7A9,
-	(q15_t)0x8695, (q15_t)0xD779, (q15_t)0x86A5, (q15_t)0xD74A,
-	(q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86C5, (q15_t)0xD6EA,
-	(q15_t)0x86D5, (q15_t)0xD6BB, (q15_t)0x86E6, (q15_t)0xD68B,
-	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8706, (q15_t)0xD62C,
-	(q15_t)0x8717, (q15_t)0xD5FD, (q15_t)0x8727, (q15_t)0xD5CD,
-	(q15_t)0x8738, (q15_t)0xD59E, (q15_t)0x8749, (q15_t)0xD56E,
-	(q15_t)0x8759, (q15_t)0xD53F, (q15_t)0x876A, (q15_t)0xD510,
-	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x878C, (q15_t)0xD4B1,
-	(q15_t)0x879D, (q15_t)0xD482, (q15_t)0x87AE, (q15_t)0xD452,
-	(q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87D1, (q15_t)0xD3F4,
-	(q15_t)0x87E2, (q15_t)0xD3C5, (q15_t)0x87F3, (q15_t)0xD396,
-	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8816, (q15_t)0xD337,
-	(q15_t)0x8828, (q15_t)0xD308, (q15_t)0x883A, (q15_t)0xD2D9,
-	(q15_t)0x884B, (q15_t)0xD2AA, (q15_t)0x885D, (q15_t)0xD27B,
-	(q15_t)0x886F, (q15_t)0xD24C, (q15_t)0x8881, (q15_t)0xD21D,
-	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88A5, (q15_t)0xD1C0,
-	(q15_t)0x88B8, (q15_t)0xD191, (q15_t)0x88CA, (q15_t)0xD162,
-	(q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x88EF, (q15_t)0xD104,
-	(q15_t)0x8901, (q15_t)0xD0D6, (q15_t)0x8914, (q15_t)0xD0A7,
-	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8939, (q15_t)0xD04A,
-	(q15_t)0x894C, (q15_t)0xD01B, (q15_t)0x895F, (q15_t)0xCFEC,
-	(q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8984, (q15_t)0xCF8F,
-	(q15_t)0x8997, (q15_t)0xCF61, (q15_t)0x89AB, (q15_t)0xCF32,
-	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x89D1, (q15_t)0xCED5,
-	(q15_t)0x89E4, (q15_t)0xCEA7, (q15_t)0x89F8, (q15_t)0xCE79,
-	(q15_t)0x8A0B, (q15_t)0xCE4A, (q15_t)0x8A1F, (q15_t)0xCE1C,
-	(q15_t)0x8A33, (q15_t)0xCDEE, (q15_t)0x8A46, (q15_t)0xCDBF,
-	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8A6E, (q15_t)0xCD63,
-	(q15_t)0x8A82, (q15_t)0xCD35, (q15_t)0x8A96, (q15_t)0xCD07,
-	(q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8ABE, (q15_t)0xCCAB,
-	(q15_t)0x8AD2, (q15_t)0xCC7D, (q15_t)0x8AE6, (q15_t)0xCC4F,
-	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B0F, (q15_t)0xCBF3,
-	(q15_t)0x8B24, (q15_t)0xCBC5, (q15_t)0x8B38, (q15_t)0xCB97,
-	(q15_t)0x8B4D, (q15_t)0xCB69, (q15_t)0x8B61, (q15_t)0xCB3B,
-	(q15_t)0x8B76, (q15_t)0xCB0D, (q15_t)0x8B8B, (q15_t)0xCAE0,
-	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BB5, (q15_t)0xCA84,
-	(q15_t)0x8BCA, (q15_t)0xCA57, (q15_t)0x8BDF, (q15_t)0xCA29,
-	(q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C09, (q15_t)0xC9CE,
-	(q15_t)0x8C1F, (q15_t)0xC9A0, (q15_t)0x8C34, (q15_t)0xC973,
-	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C5F, (q15_t)0xC918,
-	(q15_t)0x8C75, (q15_t)0xC8EB, (q15_t)0x8C8A, (q15_t)0xC8BD,
-	(q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CB6, (q15_t)0xC863,
-	(q15_t)0x8CCC, (q15_t)0xC835, (q15_t)0x8CE2, (q15_t)0xC808,
-	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D0E, (q15_t)0xC7AE,
-	(q15_t)0x8D24, (q15_t)0xC781, (q15_t)0x8D3A, (q15_t)0xC754,
-	(q15_t)0x8D50, (q15_t)0xC727, (q15_t)0x8D67, (q15_t)0xC6F9,
-	(q15_t)0x8D7D, (q15_t)0xC6CD, (q15_t)0x8D94, (q15_t)0xC6A0,
-	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8DC1, (q15_t)0xC646,
-	(q15_t)0x8DD8, (q15_t)0xC619, (q15_t)0x8DEE, (q15_t)0xC5EC,
-	(q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E1C, (q15_t)0xC593,
-	(q15_t)0x8E33, (q15_t)0xC566, (q15_t)0x8E4A, (q15_t)0xC539,
-	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E79, (q15_t)0xC4E0,
-	(q15_t)0x8E90, (q15_t)0xC4B3, (q15_t)0x8EA7, (q15_t)0xC487,
-	(q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8ED6, (q15_t)0xC42E,
-	(q15_t)0x8EED, (q15_t)0xC402, (q15_t)0x8F05, (q15_t)0xC3D5,
-	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F34, (q15_t)0xC37C,
-	(q15_t)0x8F4C, (q15_t)0xC350, (q15_t)0x8F64, (q15_t)0xC324,
-	(q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8F94, (q15_t)0xC2CC,
-	(q15_t)0x8FAC, (q15_t)0xC29F, (q15_t)0x8FC4, (q15_t)0xC273,
-	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x8FF5, (q15_t)0xC21B,
-	(q15_t)0x900D, (q15_t)0xC1EF, (q15_t)0x9025, (q15_t)0xC1C3,
-	(q15_t)0x903E, (q15_t)0xC197, (q15_t)0x9056, (q15_t)0xC16C,
-	(q15_t)0x906F, (q15_t)0xC140, (q15_t)0x9088, (q15_t)0xC114,
-	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x90B9, (q15_t)0xC0BC,
-	(q15_t)0x90D2, (q15_t)0xC091, (q15_t)0x90EB, (q15_t)0xC065,
-	(q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x911D, (q15_t)0xC00E,
-	(q15_t)0x9136, (q15_t)0xBFE2, (q15_t)0x9150, (q15_t)0xBFB7,
-	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x9182, (q15_t)0xBF60,
-	(q15_t)0x919C, (q15_t)0xBF35, (q15_t)0x91B5, (q15_t)0xBF09,
-	(q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x91E8, (q15_t)0xBEB3,
-	(q15_t)0x9202, (q15_t)0xBE88, (q15_t)0x921C, (q15_t)0xBE5D,
-	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x924F, (q15_t)0xBE06,
-	(q15_t)0x9269, (q15_t)0xBDDB, (q15_t)0x9283, (q15_t)0xBDB0,
-	(q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x92B7, (q15_t)0xBD5A,
-	(q15_t)0x92D2, (q15_t)0xBD2F, (q15_t)0x92EC, (q15_t)0xBD05,
-	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9321, (q15_t)0xBCAF,
-	(q15_t)0x933B, (q15_t)0xBC84, (q15_t)0x9356, (q15_t)0xBC5A,
-	(q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x938B, (q15_t)0xBC04,
-	(q15_t)0x93A6, (q15_t)0xBBDA, (q15_t)0x93C0, (q15_t)0xBBAF,
-	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x93F6, (q15_t)0xBB5A,
-	(q15_t)0x9411, (q15_t)0xBB30, (q15_t)0x942C, (q15_t)0xBB05,
-	(q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x9463, (q15_t)0xBAB1,
-	(q15_t)0x947E, (q15_t)0xBA87, (q15_t)0x9499, (q15_t)0xBA5C,
-	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x94D0, (q15_t)0xBA08,
-	(q15_t)0x94EC, (q15_t)0xB9DE, (q15_t)0x9507, (q15_t)0xB9B4,
-	(q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x953E, (q15_t)0xB960,
-	(q15_t)0x955A, (q15_t)0xB936, (q15_t)0x9576, (q15_t)0xB90C,
-	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95AE, (q15_t)0xB8B9,
-	(q15_t)0x95CA, (q15_t)0xB88F, (q15_t)0x95E6, (q15_t)0xB865,
-	(q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x961E, (q15_t)0xB812,
-	(q15_t)0x963B, (q15_t)0xB7E9, (q15_t)0x9657, (q15_t)0xB7BF,
-	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x9690, (q15_t)0xB76C,
-	(q15_t)0x96AC, (q15_t)0xB743, (q15_t)0x96C9, (q15_t)0xB719,
-	(q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x9702, (q15_t)0xB6C7,
-	(q15_t)0x971F, (q15_t)0xB69E, (q15_t)0x973C, (q15_t)0xB675,
-	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9776, (q15_t)0xB622,
-	(q15_t)0x9793, (q15_t)0xB5F9, (q15_t)0x97B0, (q15_t)0xB5D0,
-	(q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x97EA, (q15_t)0xB57E,
-	(q15_t)0x9808, (q15_t)0xB556, (q15_t)0x9825, (q15_t)0xB52D,
-	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x9860, (q15_t)0xB4DB,
-	(q15_t)0x987D, (q15_t)0xB4B3, (q15_t)0x989B, (q15_t)0xB48A,
-	(q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98D6, (q15_t)0xB439,
-	(q15_t)0x98F4, (q15_t)0xB410, (q15_t)0x9912, (q15_t)0xB3E8,
-	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x994E, (q15_t)0xB397,
-	(q15_t)0x996C, (q15_t)0xB36F, (q15_t)0x998A, (q15_t)0xB347,
-	(q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99C6, (q15_t)0xB2F6,
-	(q15_t)0x99E5, (q15_t)0xB2CE, (q15_t)0x9A03, (q15_t)0xB2A6,
-	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A40, (q15_t)0xB256,
-	(q15_t)0x9A5F, (q15_t)0xB22E, (q15_t)0x9A7D, (q15_t)0xB206,
-	(q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9ABA, (q15_t)0xB1B7,
-	(q15_t)0x9AD9, (q15_t)0xB18F, (q15_t)0x9AF8, (q15_t)0xB167,
-	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B36, (q15_t)0xB118,
-	(q15_t)0x9B55, (q15_t)0xB0F0, (q15_t)0x9B74, (q15_t)0xB0C9,
-	(q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9BB2, (q15_t)0xB07A,
-	(q15_t)0x9BD2, (q15_t)0xB053, (q15_t)0x9BF1, (q15_t)0xB02B,
-	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C30, (q15_t)0xAFDD,
-	(q15_t)0x9C4F, (q15_t)0xAFB6, (q15_t)0x9C6F, (q15_t)0xAF8F,
-	(q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CAE, (q15_t)0xAF40,
-	(q15_t)0x9CCE, (q15_t)0xAF1A, (q15_t)0x9CEE, (q15_t)0xAEF3,
-	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D2D, (q15_t)0xAEA5,
-	(q15_t)0x9D4D, (q15_t)0xAE7E, (q15_t)0x9D6D, (q15_t)0xAE57,
-	(q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DAE, (q15_t)0xAE0A,
-	(q15_t)0x9DCE, (q15_t)0xADE3, (q15_t)0x9DEE, (q15_t)0xADBD,
-	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E2F, (q15_t)0xAD70,
-	(q15_t)0x9E4F, (q15_t)0xAD4A, (q15_t)0x9E70, (q15_t)0xAD23,
-	(q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9EB1, (q15_t)0xACD7,
-	(q15_t)0x9ED2, (q15_t)0xACB1, (q15_t)0x9EF2, (q15_t)0xAC8A,
-	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F34, (q15_t)0xAC3E,
-	(q15_t)0x9F55, (q15_t)0xAC18, (q15_t)0x9F76, (q15_t)0xABF2,
-	(q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FB8, (q15_t)0xABA7,
-	(q15_t)0x9FD9, (q15_t)0xAB81, (q15_t)0x9FFB, (q15_t)0xAB5B,
-	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA03D, (q15_t)0xAB10,
-	(q15_t)0xA05F, (q15_t)0xAAEA, (q15_t)0xA080, (q15_t)0xAAC5,
-	(q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA0C3, (q15_t)0xAA7A,
-	(q15_t)0xA0E5, (q15_t)0xAA54, (q15_t)0xA106, (q15_t)0xAA2F,
-	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA14A, (q15_t)0xA9E5,
-	(q15_t)0xA16C, (q15_t)0xA9BF, (q15_t)0xA18E, (q15_t)0xA99A,
-	(q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1D2, (q15_t)0xA950,
-	(q15_t)0xA1F4, (q15_t)0xA92B, (q15_t)0xA216, (q15_t)0xA906,
-	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA25A, (q15_t)0xA8BD,
-	(q15_t)0xA27C, (q15_t)0xA898, (q15_t)0xA29F, (q15_t)0xA873,
-	(q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA2E4, (q15_t)0xA82A,
-	(q15_t)0xA306, (q15_t)0xA806, (q15_t)0xA329, (q15_t)0xA7E1,
-	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA36E, (q15_t)0xA798,
-	(q15_t)0xA391, (q15_t)0xA774, (q15_t)0xA3B4, (q15_t)0xA750,
-	(q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA3F9, (q15_t)0xA707,
-	(q15_t)0xA41C, (q15_t)0xA6E3, (q15_t)0xA43F, (q15_t)0xA6BF,
-	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA486, (q15_t)0xA677,
-	(q15_t)0xA4A9, (q15_t)0xA653, (q15_t)0xA4CC, (q15_t)0xA62F,
-	(q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA513, (q15_t)0xA5E8,
-	(q15_t)0xA536, (q15_t)0xA5C4, (q15_t)0xA55A, (q15_t)0xA5A1,
-	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5A1, (q15_t)0xA55A,
-	(q15_t)0xA5C4, (q15_t)0xA536, (q15_t)0xA5E8, (q15_t)0xA513,
-	(q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA62F, (q15_t)0xA4CC,
-	(q15_t)0xA653, (q15_t)0xA4A9, (q15_t)0xA677, (q15_t)0xA486,
-	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6BF, (q15_t)0xA43F,
-	(q15_t)0xA6E3, (q15_t)0xA41C, (q15_t)0xA707, (q15_t)0xA3F9,
-	(q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA750, (q15_t)0xA3B4,
-	(q15_t)0xA774, (q15_t)0xA391, (q15_t)0xA798, (q15_t)0xA36E,
-	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA7E1, (q15_t)0xA329,
-	(q15_t)0xA806, (q15_t)0xA306, (q15_t)0xA82A, (q15_t)0xA2E4,
-	(q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA873, (q15_t)0xA29F,
-	(q15_t)0xA898, (q15_t)0xA27C, (q15_t)0xA8BD, (q15_t)0xA25A,
-	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA906, (q15_t)0xA216,
-	(q15_t)0xA92B, (q15_t)0xA1F4, (q15_t)0xA950, (q15_t)0xA1D2,
-	(q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA99A, (q15_t)0xA18E,
-	(q15_t)0xA9BF, (q15_t)0xA16C, (q15_t)0xA9E5, (q15_t)0xA14A,
-	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA2F, (q15_t)0xA106,
-	(q15_t)0xAA54, (q15_t)0xA0E5, (q15_t)0xAA7A, (q15_t)0xA0C3,
-	(q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAC5, (q15_t)0xA080,
-	(q15_t)0xAAEA, (q15_t)0xA05F, (q15_t)0xAB10, (q15_t)0xA03D,
-	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB5B, (q15_t)0x9FFB,
-	(q15_t)0xAB81, (q15_t)0x9FD9, (q15_t)0xABA7, (q15_t)0x9FB8,
-	(q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xABF2, (q15_t)0x9F76,
-	(q15_t)0xAC18, (q15_t)0x9F55, (q15_t)0xAC3E, (q15_t)0x9F34,
-	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAC8A, (q15_t)0x9EF2,
-	(q15_t)0xACB1, (q15_t)0x9ED2, (q15_t)0xACD7, (q15_t)0x9EB1,
-	(q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD23, (q15_t)0x9E70,
-	(q15_t)0xAD4A, (q15_t)0x9E4F, (q15_t)0xAD70, (q15_t)0x9E2F,
-	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADBD, (q15_t)0x9DEE,
-	(q15_t)0xADE3, (q15_t)0x9DCE, (q15_t)0xAE0A, (q15_t)0x9DAE,
-	(q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE57, (q15_t)0x9D6D,
-	(q15_t)0xAE7E, (q15_t)0x9D4D, (q15_t)0xAEA5, (q15_t)0x9D2D,
-	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAEF3, (q15_t)0x9CEE,
-	(q15_t)0xAF1A, (q15_t)0x9CCE, (q15_t)0xAF40, (q15_t)0x9CAE,
-	(q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAF8F, (q15_t)0x9C6F,
-	(q15_t)0xAFB6, (q15_t)0x9C4F, (q15_t)0xAFDD, (q15_t)0x9C30,
-	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB02B, (q15_t)0x9BF1,
-	(q15_t)0xB053, (q15_t)0x9BD2, (q15_t)0xB07A, (q15_t)0x9BB2,
-	(q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0C9, (q15_t)0x9B74,
-	(q15_t)0xB0F0, (q15_t)0x9B55, (q15_t)0xB118, (q15_t)0x9B36,
-	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB167, (q15_t)0x9AF8,
-	(q15_t)0xB18F, (q15_t)0x9AD9, (q15_t)0xB1B7, (q15_t)0x9ABA,
-	(q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB206, (q15_t)0x9A7D,
-	(q15_t)0xB22E, (q15_t)0x9A5F, (q15_t)0xB256, (q15_t)0x9A40,
-	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2A6, (q15_t)0x9A03,
-	(q15_t)0xB2CE, (q15_t)0x99E5, (q15_t)0xB2F6, (q15_t)0x99C6,
-	(q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB347, (q15_t)0x998A,
-	(q15_t)0xB36F, (q15_t)0x996C, (q15_t)0xB397, (q15_t)0x994E,
-	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB3E8, (q15_t)0x9912,
-	(q15_t)0xB410, (q15_t)0x98F4, (q15_t)0xB439, (q15_t)0x98D6,
-	(q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB48A, (q15_t)0x989B,
-	(q15_t)0xB4B3, (q15_t)0x987D, (q15_t)0xB4DB, (q15_t)0x9860,
-	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB52D, (q15_t)0x9825,
-	(q15_t)0xB556, (q15_t)0x9808, (q15_t)0xB57E, (q15_t)0x97EA,
-	(q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5D0, (q15_t)0x97B0,
-	(q15_t)0xB5F9, (q15_t)0x9793, (q15_t)0xB622, (q15_t)0x9776,
-	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB675, (q15_t)0x973C,
-	(q15_t)0xB69E, (q15_t)0x971F, (q15_t)0xB6C7, (q15_t)0x9702,
-	(q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB719, (q15_t)0x96C9,
-	(q15_t)0xB743, (q15_t)0x96AC, (q15_t)0xB76C, (q15_t)0x9690,
-	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7BF, (q15_t)0x9657,
-	(q15_t)0xB7E9, (q15_t)0x963B, (q15_t)0xB812, (q15_t)0x961E,
-	(q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB865, (q15_t)0x95E6,
-	(q15_t)0xB88F, (q15_t)0x95CA, (q15_t)0xB8B9, (q15_t)0x95AE,
-	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB90C, (q15_t)0x9576,
-	(q15_t)0xB936, (q15_t)0x955A, (q15_t)0xB960, (q15_t)0x953E,
-	(q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9B4, (q15_t)0x9507,
-	(q15_t)0xB9DE, (q15_t)0x94EC, (q15_t)0xBA08, (q15_t)0x94D0,
-	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA5C, (q15_t)0x9499,
-	(q15_t)0xBA87, (q15_t)0x947E, (q15_t)0xBAB1, (q15_t)0x9463,
-	(q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB05, (q15_t)0x942C,
-	(q15_t)0xBB30, (q15_t)0x9411, (q15_t)0xBB5A, (q15_t)0x93F6,
-	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBBAF, (q15_t)0x93C0,
-	(q15_t)0xBBDA, (q15_t)0x93A6, (q15_t)0xBC04, (q15_t)0x938B,
-	(q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC5A, (q15_t)0x9356,
-	(q15_t)0xBC84, (q15_t)0x933B, (q15_t)0xBCAF, (q15_t)0x9321,
-	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD05, (q15_t)0x92EC,
-	(q15_t)0xBD2F, (q15_t)0x92D2, (q15_t)0xBD5A, (q15_t)0x92B7,
-	(q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDB0, (q15_t)0x9283,
-	(q15_t)0xBDDB, (q15_t)0x9269, (q15_t)0xBE06, (q15_t)0x924F,
-	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE5D, (q15_t)0x921C,
-	(q15_t)0xBE88, (q15_t)0x9202, (q15_t)0xBEB3, (q15_t)0x91E8,
-	(q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF09, (q15_t)0x91B5,
-	(q15_t)0xBF35, (q15_t)0x919C, (q15_t)0xBF60, (q15_t)0x9182,
-	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFB7, (q15_t)0x9150,
-	(q15_t)0xBFE2, (q15_t)0x9136, (q15_t)0xC00E, (q15_t)0x911D,
-	(q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC065, (q15_t)0x90EB,
-	(q15_t)0xC091, (q15_t)0x90D2, (q15_t)0xC0BC, (q15_t)0x90B9,
-	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC114, (q15_t)0x9088,
-	(q15_t)0xC140, (q15_t)0x906F, (q15_t)0xC16C, (q15_t)0x9056,
-	(q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1C3, (q15_t)0x9025,
-	(q15_t)0xC1EF, (q15_t)0x900D, (q15_t)0xC21B, (q15_t)0x8FF5,
-	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC273, (q15_t)0x8FC4,
-	(q15_t)0xC29F, (q15_t)0x8FAC, (q15_t)0xC2CC, (q15_t)0x8F94,
-	(q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC324, (q15_t)0x8F64,
-	(q15_t)0xC350, (q15_t)0x8F4C, (q15_t)0xC37C, (q15_t)0x8F34,
-	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC3D5, (q15_t)0x8F05,
-	(q15_t)0xC402, (q15_t)0x8EED, (q15_t)0xC42E, (q15_t)0x8ED6,
-	(q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC487, (q15_t)0x8EA7,
-	(q15_t)0xC4B3, (q15_t)0x8E90, (q15_t)0xC4E0, (q15_t)0x8E79,
-	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC539, (q15_t)0x8E4A,
-	(q15_t)0xC566, (q15_t)0x8E33, (q15_t)0xC593, (q15_t)0x8E1C,
-	(q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC5EC, (q15_t)0x8DEE,
-	(q15_t)0xC619, (q15_t)0x8DD8, (q15_t)0xC646, (q15_t)0x8DC1,
-	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6A0, (q15_t)0x8D94,
-	(q15_t)0xC6CD, (q15_t)0x8D7D, (q15_t)0xC6F9, (q15_t)0x8D67,
-	(q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC754, (q15_t)0x8D3A,
-	(q15_t)0xC781, (q15_t)0x8D24, (q15_t)0xC7AE, (q15_t)0x8D0E,
-	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC808, (q15_t)0x8CE2,
-	(q15_t)0xC835, (q15_t)0x8CCC, (q15_t)0xC863, (q15_t)0x8CB6,
-	(q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8BD, (q15_t)0x8C8A,
-	(q15_t)0xC8EB, (q15_t)0x8C75, (q15_t)0xC918, (q15_t)0x8C5F,
-	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC973, (q15_t)0x8C34,
-	(q15_t)0xC9A0, (q15_t)0x8C1F, (q15_t)0xC9CE, (q15_t)0x8C09,
-	(q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA29, (q15_t)0x8BDF,
-	(q15_t)0xCA57, (q15_t)0x8BCA, (q15_t)0xCA84, (q15_t)0x8BB5,
-	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCAE0, (q15_t)0x8B8B,
-	(q15_t)0xCB0D, (q15_t)0x8B76, (q15_t)0xCB3B, (q15_t)0x8B61,
-	(q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCB97, (q15_t)0x8B38,
-	(q15_t)0xCBC5, (q15_t)0x8B24, (q15_t)0xCBF3, (q15_t)0x8B0F,
-	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC4F, (q15_t)0x8AE6,
-	(q15_t)0xCC7D, (q15_t)0x8AD2, (q15_t)0xCCAB, (q15_t)0x8ABE,
-	(q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD07, (q15_t)0x8A96,
-	(q15_t)0xCD35, (q15_t)0x8A82, (q15_t)0xCD63, (q15_t)0x8A6E,
-	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDBF, (q15_t)0x8A46,
-	(q15_t)0xCDEE, (q15_t)0x8A33, (q15_t)0xCE1C, (q15_t)0x8A1F,
-	(q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCE79, (q15_t)0x89F8,
-	(q15_t)0xCEA7, (q15_t)0x89E4, (q15_t)0xCED5, (q15_t)0x89D1,
-	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF32, (q15_t)0x89AB,
-	(q15_t)0xCF61, (q15_t)0x8997, (q15_t)0xCF8F, (q15_t)0x8984,
-	(q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xCFEC, (q15_t)0x895F,
-	(q15_t)0xD01B, (q15_t)0x894C, (q15_t)0xD04A, (q15_t)0x8939,
-	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0A7, (q15_t)0x8914,
-	(q15_t)0xD0D6, (q15_t)0x8901, (q15_t)0xD104, (q15_t)0x88EF,
-	(q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD162, (q15_t)0x88CA,
-	(q15_t)0xD191, (q15_t)0x88B8, (q15_t)0xD1C0, (q15_t)0x88A5,
-	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD21D, (q15_t)0x8881,
-	(q15_t)0xD24C, (q15_t)0x886F, (q15_t)0xD27B, (q15_t)0x885D,
-	(q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD2D9, (q15_t)0x883A,
-	(q15_t)0xD308, (q15_t)0x8828, (q15_t)0xD337, (q15_t)0x8816,
-	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD396, (q15_t)0x87F3,
-	(q15_t)0xD3C5, (q15_t)0x87E2, (q15_t)0xD3F4, (q15_t)0x87D1,
-	(q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD452, (q15_t)0x87AE,
-	(q15_t)0xD482, (q15_t)0x879D, (q15_t)0xD4B1, (q15_t)0x878C,
-	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD510, (q15_t)0x876A,
-	(q15_t)0xD53F, (q15_t)0x8759, (q15_t)0xD56E, (q15_t)0x8749,
-	(q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5CD, (q15_t)0x8727,
-	(q15_t)0xD5FD, (q15_t)0x8717, (q15_t)0xD62C, (q15_t)0x8706,
-	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD68B, (q15_t)0x86E6,
-	(q15_t)0xD6BB, (q15_t)0x86D5, (q15_t)0xD6EA, (q15_t)0x86C5,
-	(q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD74A, (q15_t)0x86A5,
-	(q15_t)0xD779, (q15_t)0x8695, (q15_t)0xD7A9, (q15_t)0x8685,
-	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD809, (q15_t)0x8666,
-	(q15_t)0xD838, (q15_t)0x8656, (q15_t)0xD868, (q15_t)0x8646,
-	(q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8C8, (q15_t)0x8627,
-	(q15_t)0xD8F8, (q15_t)0x8618, (q15_t)0xD927, (q15_t)0x8609,
-	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD987, (q15_t)0x85EA,
-	(q15_t)0xD9B7, (q15_t)0x85DB, (q15_t)0xD9E7, (q15_t)0x85CC,
-	(q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA47, (q15_t)0x85AF,
-	(q15_t)0xDA77, (q15_t)0x85A0, (q15_t)0xDAA7, (q15_t)0x8591,
-	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB08, (q15_t)0x8574,
-	(q15_t)0xDB38, (q15_t)0x8565, (q15_t)0xDB68, (q15_t)0x8557,
-	(q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBC8, (q15_t)0x853A,
-	(q15_t)0xDBF8, (q15_t)0x852C, (q15_t)0xDC29, (q15_t)0x851E,
-	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDC89, (q15_t)0x8502,
-	(q15_t)0xDCBA, (q15_t)0x84F4, (q15_t)0xDCEA, (q15_t)0x84E6,
-	(q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD4B, (q15_t)0x84CB,
-	(q15_t)0xDD7B, (q15_t)0x84BD, (q15_t)0xDDAB, (q15_t)0x84B0,
-	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE0C, (q15_t)0x8495,
-	(q15_t)0xDE3D, (q15_t)0x8488, (q15_t)0xDE6D, (q15_t)0x847B,
-	(q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDECE, (q15_t)0x8460,
-	(q15_t)0xDEFF, (q15_t)0x8453, (q15_t)0xDF2F, (q15_t)0x8446,
-	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDF91, (q15_t)0x842D,
-	(q15_t)0xDFC1, (q15_t)0x8420, (q15_t)0xDFF2, (q15_t)0x8414,
-	(q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE053, (q15_t)0x83FA,
-	(q15_t)0xE084, (q15_t)0x83EE, (q15_t)0xE0B5, (q15_t)0x83E2,
-	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE116, (q15_t)0x83C9,
-	(q15_t)0xE147, (q15_t)0x83BD, (q15_t)0xE178, (q15_t)0x83B1,
-	(q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE1DA, (q15_t)0x8399,
-	(q15_t)0xE20A, (q15_t)0x838E, (q15_t)0xE23B, (q15_t)0x8382,
-	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE29D, (q15_t)0x836B,
-	(q15_t)0xE2CE, (q15_t)0x835F, (q15_t)0xE2FF, (q15_t)0x8354,
-	(q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE361, (q15_t)0x833D,
-	(q15_t)0xE392, (q15_t)0x8332, (q15_t)0xE3C3, (q15_t)0x8327,
-	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE425, (q15_t)0x8311,
-	(q15_t)0xE456, (q15_t)0x8306, (q15_t)0xE487, (q15_t)0x82FB,
-	(q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE4E9, (q15_t)0x82E6,
-	(q15_t)0xE51B, (q15_t)0x82DB, (q15_t)0xE54C, (q15_t)0x82D0,
-	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5AE, (q15_t)0x82BC,
-	(q15_t)0xE5DF, (q15_t)0x82B1, (q15_t)0xE610, (q15_t)0x82A7,
-	(q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE673, (q15_t)0x8293,
-	(q15_t)0xE6A4, (q15_t)0x8289, (q15_t)0xE6D5, (q15_t)0x827F,
-	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE738, (q15_t)0x826B,
-	(q15_t)0xE769, (q15_t)0x8262, (q15_t)0xE79B, (q15_t)0x8258,
-	(q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE7FD, (q15_t)0x8245,
-	(q15_t)0xE82F, (q15_t)0x823C, (q15_t)0xE860, (q15_t)0x8232,
-	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8C3, (q15_t)0x8220,
-	(q15_t)0xE8F5, (q15_t)0x8217, (q15_t)0xE926, (q15_t)0x820E,
-	(q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE989, (q15_t)0x81FC,
-	(q15_t)0xE9BA, (q15_t)0x81F3, (q15_t)0xE9EC, (q15_t)0x81EB,
-	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA4F, (q15_t)0x81D9,
-	(q15_t)0xEA80, (q15_t)0x81D1, (q15_t)0xEAB2, (q15_t)0x81C8,
-	(q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB15, (q15_t)0x81B8,
-	(q15_t)0xEB47, (q15_t)0x81B0, (q15_t)0xEB78, (q15_t)0x81A8,
-	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEBDC, (q15_t)0x8198,
-	(q15_t)0xEC0D, (q15_t)0x8190, (q15_t)0xEC3F, (q15_t)0x8188,
-	(q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECA2, (q15_t)0x8179,
-	(q15_t)0xECD4, (q15_t)0x8171, (q15_t)0xED06, (q15_t)0x816A,
-	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED69, (q15_t)0x815B,
-	(q15_t)0xED9B, (q15_t)0x8154, (q15_t)0xEDCD, (q15_t)0x814C,
-	(q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE30, (q15_t)0x813E,
-	(q15_t)0xEE62, (q15_t)0x8137, (q15_t)0xEE94, (q15_t)0x8130,
-	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEEF7, (q15_t)0x8123,
-	(q15_t)0xEF29, (q15_t)0x811C, (q15_t)0xEF5B, (q15_t)0x8116,
-	(q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFBF, (q15_t)0x8109,
-	(q15_t)0xEFF1, (q15_t)0x8102, (q15_t)0xF022, (q15_t)0x80FC,
-	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF086, (q15_t)0x80F0,
-	(q15_t)0xF0B8, (q15_t)0x80EA, (q15_t)0xF0EA, (q15_t)0x80E4,
-	(q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF14E, (q15_t)0x80D8,
-	(q15_t)0xF180, (q15_t)0x80D2, (q15_t)0xF1B2, (q15_t)0x80CD,
-	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF216, (q15_t)0x80C2,
-	(q15_t)0xF248, (q15_t)0x80BC, (q15_t)0xF27A, (q15_t)0x80B7,
-	(q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF2DE, (q15_t)0x80AC,
-	(q15_t)0xF310, (q15_t)0x80A7, (q15_t)0xF342, (q15_t)0x80A2,
-	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3A6, (q15_t)0x8098,
-	(q15_t)0xF3D8, (q15_t)0x8094, (q15_t)0xF40A, (q15_t)0x808F,
-	(q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF46E, (q15_t)0x8086,
-	(q15_t)0xF4A0, (q15_t)0x8081, (q15_t)0xF4D2, (q15_t)0x807D,
-	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF536, (q15_t)0x8074,
-	(q15_t)0xF568, (q15_t)0x8070, (q15_t)0xF59A, (q15_t)0x806C,
-	(q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF5FF, (q15_t)0x8064,
-	(q15_t)0xF631, (q15_t)0x8060, (q15_t)0xF663, (q15_t)0x805C,
-	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6C7, (q15_t)0x8055,
-	(q15_t)0xF6F9, (q15_t)0x8051, (q15_t)0xF72B, (q15_t)0x804E,
-	(q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF790, (q15_t)0x8047,
-	(q15_t)0xF7C2, (q15_t)0x8043, (q15_t)0xF7F4, (q15_t)0x8040,
-	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF858, (q15_t)0x803A,
-	(q15_t)0xF88A, (q15_t)0x8037, (q15_t)0xF8BD, (q15_t)0x8034,
-	(q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF921, (q15_t)0x802F,
-	(q15_t)0xF953, (q15_t)0x802C, (q15_t)0xF985, (q15_t)0x8029,
-	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xF9EA, (q15_t)0x8025,
-	(q15_t)0xFA1C, (q15_t)0x8022, (q15_t)0xFA4E, (q15_t)0x8020,
-	(q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAB3, (q15_t)0x801C,
-	(q15_t)0xFAE5, (q15_t)0x801A, (q15_t)0xFB17, (q15_t)0x8018,
-	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFB7C, (q15_t)0x8014,
-	(q15_t)0xFBAE, (q15_t)0x8012, (q15_t)0xFBE0, (q15_t)0x8011,
-	(q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC45, (q15_t)0x800D,
-	(q15_t)0xFC77, (q15_t)0x800C, (q15_t)0xFCA9, (q15_t)0x800B,
-	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD0E, (q15_t)0x8008,
-	(q15_t)0xFD40, (q15_t)0x8007, (q15_t)0xFD72, (q15_t)0x8006,
-	(q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFDD7, (q15_t)0x8004,
-	(q15_t)0xFE09, (q15_t)0x8003, (q15_t)0xFE3B, (q15_t)0x8003,
-	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFEA0, (q15_t)0x8001,
-	(q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFF04, (q15_t)0x8000,
-	(q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF69, (q15_t)0x8000,
-	(q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFFCD, (q15_t)0x8000
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-/**
-  @} end of CFFT_CIFFT group
-*/
-
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
-
-const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH] =
-{
-   /* 8x2, size 20 */
-   8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
-
-const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH] =
-{
-   /* 8x4, size 48 */
-   8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208,
-   80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208,
-   152,224, 176,208, 184,232, 216,240, 200,224, 232,240
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
-
-const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH] =
-{
-   /* radix 8, size 56 */
-   8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200,
-   96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400,
-   184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480,
-   368,424, 376,488, 440,496
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
-
-const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] =
-{
-   /* 8x2, size 208 */
-   8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768,
-   80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520,
-   144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776,
-   208,328, 216,840, 224,392, 232,904, 240,456, 248,968, 264,528, 272,320,
-   280,592, 288,768, 296,656, 304,328, 312,720, 328,784, 344,848, 352,400,
-   360,912, 368,464, 376,976, 384,576, 392,536, 400,832, 408,600, 416,584,
-   424,664, 432,840, 440,728, 448,592, 456,792, 464,848, 472,856, 480,600,
-   488,920, 496,856, 504,984, 520,544, 528,576, 536,608, 552,672, 560,608,
-   568,736, 576,768, 584,800, 592,832, 600,864, 608,800, 616,928, 624,864,
-   632,992, 648,672, 656,896, 664,928, 688,904, 696,744, 704,896, 712,808,
-   720,912, 728,872, 736,928, 744,936, 752,920, 760,1000, 776,800, 784,832,
-   792,864, 808,904, 816,864, 824,920, 840,864, 856,880, 872,944, 888,1008,
-   904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
-
-const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] =
-{
-   /* 8x4, size 440 */
-   8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640,
-   80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768,
-   144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384,
-   200,896, 208,1408, 216,1920, 224,448, 232,960, 240,1472, 248,1984,
-   256,512, 264,520, 272,1032, 280,1544, 288,640, 296,584, 304,1096, 312,1608,
-   320,768, 328,648, 336,1160, 344,1672, 352,896, 360,712, 368,1224, 376,1736,
-   384,520, 392,776, 400,1288, 408,1800, 416,648, 424,840, 432,1352, 440,1864,
-   448,776, 456,904, 464,1416, 472,1928, 480,904, 488,968, 496,1480, 504,1992,
-   520,528, 512,1024, 528,1040, 536,1552, 544,1152, 552,592, 560,1104,
-   568,1616, 576,1280, 584,656, 592,1168, 600,1680, 608,1408, 616,720,
-   624,1232, 632,1744, 640,1032, 648,784, 656,1296, 664,1808, 672,1160,
-   680,848, 688,1360, 696,1872, 704,1288, 712,912, 720,1424, 728,1936,
-   736,1416, 744,976, 752,1488, 760,2000, 768,1536, 776,1552, 784,1048,
-   792,1560, 800,1664, 808,1680, 816,1112, 824,1624, 832,1792, 840,1808,
-   848,1176, 856,1688, 864,1920, 872,1936, 880,1240, 888,1752, 896,1544,
-   904,1560, 912,1304, 920,1816, 928,1672, 936,1688, 944,1368, 952,1880,
-   960,1800, 968,1816, 976,1432, 984,1944, 992,1928, 1000,1944, 1008,1496,
-   1016,2008, 1032,1152, 1040,1056, 1048,1568, 1064,1408, 1072,1120,
-   1080,1632, 1088,1536, 1096,1160, 1104,1184, 1112,1696, 1120,1552,
-   1128,1416, 1136,1248, 1144,1760, 1160,1664, 1168,1312, 1176,1824,
-   1184,1544, 1192,1920, 1200,1376, 1208,1888, 1216,1568, 1224,1672,
-   1232,1440, 1240,1952, 1248,1560, 1256,1928, 1264,1504, 1272,2016,
-   1288,1312, 1296,1408, 1304,1576, 1320,1424, 1328,1416, 1336,1640,
-   1344,1792, 1352,1824, 1360,1920, 1368,1704, 1376,1800, 1384,1432,
-   1392,1928, 1400,1768, 1416,1680, 1432,1832, 1440,1576, 1448,1936,
-   1456,1832, 1464,1896, 1472,1808, 1480,1688, 1488,1936, 1496,1960,
-   1504,1816, 1512,1944, 1520,1944, 1528,2024, 1560,1584, 1592,1648,
-   1600,1792, 1608,1920, 1616,1800, 1624,1712, 1632,1808, 1640,1936,
-   1648,1816, 1656,1776, 1672,1696, 1688,1840, 1704,1952, 1712,1928,
-   1720,1904, 1728,1824, 1736,1952, 1744,1832, 1752,1968, 1760,1840,
-   1768,1960, 1776,1944, 1784,2032, 1864,1872, 1848,1944, 1872,1888,
-   1880,1904, 1888,1984, 1896,2000, 1912,2032, 1904,2016, 1976,2032,
-   1960,1968, 2008,2032, 1992,2016, 2024,2032
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
-
-const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] =
-{
-   /* radix 8, size 448 */
-   8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576,
-   80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152,
-   152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216,
-   216,1728, 224,2240, 232,2752, 240,3264, 248,3776, 264,768, 272,1280,
-   280,1792, 288,2304, 296,2816, 304,3328, 312,3840, 328,832, 336,1344,
-   344,1856, 352,2368, 360,2880, 368,3392, 376,3904, 392,896, 400,1408,
-   408,1920, 416,2432, 424,2944, 432,3456, 440,3968, 456,960, 464,1472,
-   472,1984, 480,2496, 488,3008, 496,3520, 504,4032, 528,1032, 536,1544,
-   544,2056, 552,2568, 560,3080, 568,3592, 592,1096, 600,1608, 608,2120,
-   616,2632, 624,3144, 632,3656, 656,1160, 664,1672, 672,2184, 680,2696,
-   688,3208, 696,3720, 720,1224, 728,1736, 736,2248, 744,2760, 752,3272,
-   760,3784, 784,1288, 792,1800, 800,2312, 808,2824, 816,3336, 824,3848,
-   848,1352, 856,1864, 864,2376, 872,2888, 880,3400, 888,3912, 912,1416,
-   920,1928, 928,2440, 936,2952, 944,3464, 952,3976, 976,1480, 984,1992,
-   992,2504, 1000,3016, 1008,3528, 1016,4040, 1048,1552, 1056,2064, 1064,2576,
-   1072,3088, 1080,3600, 1112,1616, 1120,2128, 1128,2640, 1136,3152,
-   1144,3664, 1176,1680, 1184,2192, 1192,2704, 1200,3216, 1208,3728,
-   1240,1744, 1248,2256, 1256,2768, 1264,3280, 1272,3792, 1304,1808,
-   1312,2320, 1320,2832, 1328,3344, 1336,3856, 1368,1872, 1376,2384,
-   1384,2896, 1392,3408, 1400,3920, 1432,1936, 1440,2448, 1448,2960,
-   1456,3472, 1464,3984, 1496,2000, 1504,2512, 1512,3024, 1520,3536,
-   1528,4048, 1568,2072, 1576,2584, 1584,3096, 1592,3608, 1632,2136,
-   1640,2648, 1648,3160, 1656,3672, 1696,2200, 1704,2712, 1712,3224,
-   1720,3736, 1760,2264, 1768,2776, 1776,3288, 1784,3800, 1824,2328,
-   1832,2840, 1840,3352, 1848,3864, 1888,2392, 1896,2904, 1904,3416,
-   1912,3928, 1952,2456, 1960,2968, 1968,3480, 1976,3992, 2016,2520,
-   2024,3032, 2032,3544, 2040,4056, 2088,2592, 2096,3104, 2104,3616,
-   2152,2656, 2160,3168, 2168,3680, 2216,2720, 2224,3232, 2232,3744,
-   2280,2784, 2288,3296, 2296,3808, 2344,2848, 2352,3360, 2360,3872,
-   2408,2912, 2416,3424, 2424,3936, 2472,2976, 2480,3488, 2488,4000,
-   2536,3040, 2544,3552, 2552,4064, 2608,3112, 2616,3624, 2672,3176,
-   2680,3688, 2736,3240, 2744,3752, 2800,3304, 2808,3816, 2864,3368,
-   2872,3880, 2928,3432, 2936,3944, 2992,3496, 3000,4008, 3056,3560,
-   3064,4072, 3128,3632, 3192,3696, 3256,3760, 3320,3824, 3384,3888,
-   3448,3952, 3512,4016, 3576,4080
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
-
-const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH] =
-{
-   /* 8x2, size 1800 */
-   8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048,
-   72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048,
-   136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696,
-   192,2112, 200,6208, 208,2624, 216,6720, 224,3136, 232,7232, 240,3648,
-   248,7744, 256,2048, 264,4224, 272,640, 280,4736, 288,1152, 296,5248,
-   304,1664, 312,5760, 320,2176, 328,6272, 336,2688, 344,6784, 352,3200,
-   360,7296, 368,3712, 376,7808, 384,2112, 392,4288, 400,704, 408,4800,
-   416,1216, 424,5312, 432,1728, 440,5824, 448,2240, 456,6336, 464,2752,
-   472,6848, 480,3264, 488,7360, 496,3776, 504,7872, 512,2048, 520,4352,
-   528,768, 536,4864, 544,1280, 552,5376, 560,1792, 568,5888, 576,2304,
-   584,6400, 592,2816, 600,6912, 608,3328, 616,7424, 624,3840, 632,7936,
-   640,2176, 648,4416, 656,832, 664,4928, 672,1344, 680,5440, 688,1856,
-   696,5952, 704,2368, 712,6464, 720,2880, 728,6976, 736,3392, 744,7488,
-   752,3904, 760,8000, 768,2112, 776,4480, 784,896, 792,4992, 800,1408,
-   808,5504, 816,1920, 824,6016, 832,2432, 840,6528, 848,2944, 856,7040,
-   864,3456, 872,7552, 880,3968, 888,8064, 896,2240, 904,4544, 912,960,
-   920,5056, 928,1472, 936,5568, 944,1984, 952,6080, 960,2496, 968,6592,
-   976,3008, 984,7104, 992,3520, 1000,7616, 1008,4032, 1016,8128, 1024,4096,
-   1032,4104, 1040,4352, 1048,4616, 1056,4104, 1064,5128, 1072,1544,
-   1080,5640, 1088,2056, 1096,6152, 1104,2568, 1112,6664, 1120,3080,
-   1128,7176, 1136,3592, 1144,7688, 1152,6144, 1160,4168, 1168,6400,
-   1176,4680, 1184,6152, 1192,5192, 1200,1608, 1208,5704, 1216,2120,
-   1224,6216, 1232,2632, 1240,6728, 1248,3144, 1256,7240, 1264,3656,
-   1272,7752, 1280,4160, 1288,4232, 1296,4416, 1304,4744, 1312,4168,
-   1320,5256, 1328,1672, 1336,5768, 1344,2184, 1352,6280, 1360,2696,
-   1368,6792, 1376,3208, 1384,7304, 1392,3720, 1400,7816, 1408,6208,
-   1416,4296, 1424,6464, 1432,4808, 1440,6216, 1448,5320, 1456,1736,
-   1464,5832, 1472,2248, 1480,6344, 1488,2760, 1496,6856, 1504,3272,
-   1512,7368, 1520,3784, 1528,7880, 1536,4224, 1544,4360, 1552,4480,
-   1560,4872, 1568,4232, 1576,5384, 1584,1800, 1592,5896, 1600,2312,
-   1608,6408, 1616,2824, 1624,6920, 1632,3336, 1640,7432, 1648,3848,
-   1656,7944, 1664,6272, 1672,4424, 1680,6528, 1688,4936, 1696,6280,
-   1704,5448, 1712,1864, 1720,5960, 1728,2376, 1736,6472, 1744,2888,
-   1752,6984, 1760,3400, 1768,7496, 1776,3912, 1784,8008, 1792,4288,
-   1800,4488, 1808,4544, 1816,5000, 1824,4296, 1832,5512, 1840,1928,
-   1848,6024, 1856,2440, 1864,6536, 1872,2952, 1880,7048, 1888,3464,
-   1896,7560, 1904,3976, 1912,8072, 1920,6336, 1928,4552, 1936,6592,
-   1944,5064, 1952,6344, 1960,5576, 1968,1992, 1976,6088, 1984,2504,
-   1992,6600, 2000,3016, 2008,7112, 2016,3528, 2024,7624, 2032,4040,
-   2040,8136, 2056,4112, 2064,2112, 2072,4624, 2080,4352, 2088,5136,
-   2096,4480, 2104,5648, 2120,6160, 2128,2576, 2136,6672, 2144,3088,
-   2152,7184, 2160,3600, 2168,7696, 2176,2560, 2184,4176, 2192,2816,
-   2200,4688, 2208,2568, 2216,5200, 2224,2824, 2232,5712, 2240,2576,
-   2248,6224, 2256,2640, 2264,6736, 2272,3152, 2280,7248, 2288,3664,
-   2296,7760, 2312,4240, 2320,2432, 2328,4752, 2336,6400, 2344,5264,
-   2352,6528, 2360,5776, 2368,2816, 2376,6288, 2384,2704, 2392,6800,
-   2400,3216, 2408,7312, 2416,3728, 2424,7824, 2432,2624, 2440,4304,
-   2448,2880, 2456,4816, 2464,2632, 2472,5328, 2480,2888, 2488,5840,
-   2496,2640, 2504,6352, 2512,2768, 2520,6864, 2528,3280, 2536,7376,
-   2544,3792, 2552,7888, 2568,4368, 2584,4880, 2592,4416, 2600,5392,
-   2608,4544, 2616,5904, 2632,6416, 2640,2832, 2648,6928, 2656,3344,
-   2664,7440, 2672,3856, 2680,7952, 2696,4432, 2704,2944, 2712,4944,
-   2720,4432, 2728,5456, 2736,2952, 2744,5968, 2752,2944, 2760,6480,
-   2768,2896, 2776,6992, 2784,3408, 2792,7504, 2800,3920, 2808,8016,
-   2824,4496, 2840,5008, 2848,6464, 2856,5520, 2864,6592, 2872,6032,
-   2888,6544, 2896,2960, 2904,7056, 2912,3472, 2920,7568, 2928,3984,
-   2936,8080, 2952,4560, 2960,3008, 2968,5072, 2976,6480, 2984,5584,
-   2992,3016, 3000,6096, 3016,6608, 3032,7120, 3040,3536, 3048,7632,
-   3056,4048, 3064,8144, 3072,4608, 3080,4120, 3088,4864, 3096,4632,
-   3104,4616, 3112,5144, 3120,4872, 3128,5656, 3136,4624, 3144,6168,
-   3152,4880, 3160,6680, 3168,4632, 3176,7192, 3184,3608, 3192,7704,
-   3200,6656, 3208,4184, 3216,6912, 3224,4696, 3232,6664, 3240,5208,
-   3248,6920, 3256,5720, 3264,6672, 3272,6232, 3280,6928, 3288,6744,
-   3296,6680, 3304,7256, 3312,3672, 3320,7768, 3328,4672, 3336,4248,
-   3344,4928, 3352,4760, 3360,4680, 3368,5272, 3376,4936, 3384,5784,
-   3392,4688, 3400,6296, 3408,4944, 3416,6808, 3424,4696, 3432,7320,
-   3440,3736, 3448,7832, 3456,6720, 3464,4312, 3472,6976, 3480,4824,
-   3488,6728, 3496,5336, 3504,6984, 3512,5848, 3520,6736, 3528,6360,
-   3536,6992, 3544,6872, 3552,6744, 3560,7384, 3568,3800, 3576,7896,
-   3584,4736, 3592,4376, 3600,4992, 3608,4888, 3616,4744, 3624,5400,
-   3632,5000, 3640,5912, 3648,4752, 3656,6424, 3664,5008, 3672,6936,
-   3680,4760, 3688,7448, 3696,3864, 3704,7960, 3712,6784, 3720,4440,
-   3728,7040, 3736,4952, 3744,6792, 3752,5464, 3760,7048, 3768,5976,
-   3776,6800, 3784,6488, 3792,7056, 3800,7000, 3808,6808, 3816,7512,
-   3824,3928, 3832,8024, 3840,4800, 3848,4504, 3856,5056, 3864,5016,
-   3872,4808, 3880,5528, 3888,5064, 3896,6040, 3904,4816, 3912,6552,
-   3920,5072, 3928,7064, 3936,4824, 3944,7576, 3952,3992, 3960,8088,
-   3968,6848, 3976,4568, 3984,7104, 3992,5080, 4000,6856, 4008,5592,
-   4016,7112, 4024,6104, 4032,6864, 4040,6616, 4048,7120, 4056,7128,
-   4064,6872, 4072,7640, 4080,7128, 4088,8152, 4104,4128, 4112,4160,
-   4120,4640, 4136,5152, 4144,4232, 4152,5664, 4160,4352, 4168,6176,
-   4176,4416, 4184,6688, 4192,4616, 4200,7200, 4208,4744, 4216,7712,
-   4224,4608, 4232,4616, 4240,4672, 4248,4704, 4256,4640, 4264,5216,
-   4272,4704, 4280,5728, 4288,4864, 4296,6240, 4304,4928, 4312,6752,
-   4320,4632, 4328,7264, 4336,4760, 4344,7776, 4360,4640, 4368,4416,
-   4376,4768, 4384,6152, 4392,5280, 4400,6280, 4408,5792, 4424,6304,
-   4440,6816, 4448,6664, 4456,7328, 4464,6792, 4472,7840, 4480,4624,
-   4488,4632, 4496,4688, 4504,4832, 4512,6168, 4520,5344, 4528,6296,
-   4536,5856, 4544,4880, 4552,6368, 4560,4944, 4568,6880, 4576,6680,
-   4584,7392, 4592,6808, 4600,7904, 4608,6144, 4616,6152, 4624,6208,
-   4632,4896, 4640,6176, 4648,5408, 4656,6240, 4664,5920, 4672,6400,
-   4680,6432, 4688,6464, 4696,6944, 4704,6432, 4712,7456, 4720,4808,
-   4728,7968, 4736,6656, 4744,6664, 4752,6720, 4760,4960, 4768,6688,
-   4776,5472, 4784,6752, 4792,5984, 4800,6912, 4808,6496, 4816,6976,
-   4824,7008, 4832,6944, 4840,7520, 4848,7008, 4856,8032, 4864,6160,
-   4872,6168, 4880,6224, 4888,5024, 4896,6216, 4904,5536, 4912,6344,
-   4920,6048, 4928,6416, 4936,6560, 4944,6480, 4952,7072, 4960,6728,
-   4968,7584, 4976,6856, 4984,8096, 4992,6672, 5000,6680, 5008,6736,
-   5016,5088, 5024,6232, 5032,5600, 5040,6360, 5048,6112, 5056,6928,
-   5064,6624, 5072,6992, 5080,7136, 5088,6744, 5096,7648, 5104,6872,
-   5112,8160, 5128,5152, 5136,5376, 5144,5408, 5168,5384, 5176,5672,
-   5184,5376, 5192,6184, 5200,5392, 5208,6696, 5216,5408, 5224,7208,
-   5232,5400, 5240,7720, 5248,7168, 5256,7200, 5264,7424, 5272,7456,
-   5280,7176, 5288,7208, 5296,7432, 5304,5736, 5312,7184, 5320,6248,
-   5328,7440, 5336,6760, 5344,7192, 5352,7272, 5360,7448, 5368,7784,
-   5384,5408, 5392,5440, 5400,5472, 5408,6184, 5416,7208, 5424,5448,
-   5432,5800, 5448,6312, 5464,6824, 5472,6696, 5480,7336, 5488,6824,
-   5496,7848, 5504,7232, 5512,7264, 5520,7488, 5528,7520, 5536,7240,
-   5544,7272, 5552,7496, 5560,5864, 5568,7248, 5576,6376, 5584,7504,
-   5592,6888, 5600,7256, 5608,7400, 5616,7512, 5624,7912, 5632,7168,
-   5640,7176, 5648,7232, 5656,7240, 5664,7200, 5672,7208, 5680,7264,
-   5688,5928, 5696,7424, 5704,6440, 5712,7488, 5720,6952, 5728,7456,
-   5736,7464, 5744,7520, 5752,7976, 5760,7296, 5768,7328, 5776,7552,
-   5784,7584, 5792,7304, 5800,7336, 5808,7560, 5816,5992, 5824,7312,
-   5832,6504, 5840,7568, 5848,7016, 5856,7320, 5864,7528, 5872,7576,
-   5880,8040, 5888,7184, 5896,7192, 5904,7248, 5912,7256, 5920,6248,
-   5928,7272, 5936,6376, 5944,6056, 5952,7440, 5960,6568, 5968,7504,
-   5976,7080, 5984,6760, 5992,7592, 6000,6888, 6008,8104, 6016,7360,
-   6024,7392, 6032,7616, 6040,7648, 6048,7368, 6056,7400, 6064,7624,
-   6072,6120, 6080,7376, 6088,6632, 6096,7632, 6104,7144, 6112,7384,
-   6120,7656, 6128,7640, 6136,8168, 6168,6240, 6192,6216, 6200,7264,
-   6232,6704, 6248,7216, 6256,6680, 6264,7728, 6272,6656, 6280,6664,
-   6288,6912, 6296,6496, 6304,6688, 6312,6696, 6320,6944, 6328,7520,
-   6336,6672, 6344,6680, 6352,6928, 6360,6768, 6368,6704, 6376,7280,
-   6384,6744, 6392,7792, 6408,6432, 6424,6752, 6440,7432, 6448,6536,
-   6456,7560, 6472,6944, 6488,6832, 6496,6920, 6504,7344, 6512,7048,
-   6520,7856, 6528,6720, 6536,6728, 6544,6976, 6552,7008, 6560,6752,
-   6568,7448, 6576,7008, 6584,7576, 6592,6736, 6600,6744, 6608,6992,
-   6616,6896, 6624,6936, 6632,7408, 6640,7064, 6648,7920, 6712,7280,
-   6744,6960, 6760,7472, 6768,6936, 6776,7984, 6800,6848, 6808,6856,
-   6832,6880, 6840,6888, 6848,7040, 6856,7048, 6864,7104, 6872,7024,
-   6880,7072, 6888,7536, 6896,7136, 6904,8048, 6952,7496, 6968,7624,
-   6984,7008, 7000,7088, 7016,7600, 7024,7112, 7032,8112, 7056,7104,
-   7064,7112, 7080,7512, 7088,7136, 7096,7640, 7128,7152, 7144,7664,
-   7160,8176, 7176,7200, 7192,7216, 7224,7272, 7240,7264, 7256,7280,
-   7288,7736, 7296,7680, 7304,7712, 7312,7936, 7320,7968, 7328,7688,
-   7336,7720, 7344,7944, 7352,7976, 7360,7696, 7368,7728, 7376,7952,
-   7384,7984, 7392,7704, 7400,7736, 7408,7960, 7416,7800, 7432,7456,
-   7448,7472, 7480,7592, 7496,7520, 7512,7536, 7528,7976, 7544,7864,
-   7552,7744, 7560,7776, 7568,8000, 7576,8032, 7584,7752, 7592,7784,
-   7600,8008, 7608,8040, 7616,7760, 7624,7792, 7632,8016, 7640,8048,
-   7648,7768, 7656,7800, 7664,8024, 7672,7928, 7688,7712, 7704,7728,
-   7752,7776, 7768,7792, 7800,7992, 7816,7840, 7824,8064, 7832,8096,
-   7856,8072, 7864,8104, 7872,8064, 7880,8072, 7888,8080, 7896,8112,
-   7904,8096, 7912,8104, 7920,8088, 7928,8056, 7944,7968, 7960,7984,
-   8008,8032, 8024,8048, 8056,8120, 8072,8096, 8080,8128, 8088,8160,
-   8112,8136, 8120,8168, 8136,8160, 8152,8176
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
-
-const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH] =
-{
-   /* 8x2, size 3808 */
-   8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024,
-   72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824,
-   128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752,
-   184,14848, 192,3072, 200,7168, 208,11264, 216,15360, 224,3584, 232,7680,
-   240,11776, 248,15872, 256,1024, 264,4160, 272,8256, 280,12352, 288,576,
-   296,4672, 304,8768, 312,12864, 320,1088, 328,5184, 336,9280, 344,13376,
-   352,1600, 360,5696, 368,9792, 376,13888, 384,2112, 392,6208, 400,10304,
-   408,14400, 416,2624, 424,6720, 432,10816, 440,14912, 448,3136, 456,7232,
-   464,11328, 472,15424, 480,3648, 488,7744, 496,11840, 504,15936, 512,2048,
-   520,4224, 528,8320, 536,12416, 544,640, 552,4736, 560,8832, 568,12928,
-   576,1152, 584,5248, 592,9344, 600,13440, 608,1664, 616,5760, 624,9856,
-   632,13952, 640,2176, 648,6272, 656,10368, 664,14464, 672,2688, 680,6784,
-   688,10880, 696,14976, 704,3200, 712,7296, 720,11392, 728,15488, 736,3712,
-   744,7808, 752,11904, 760,16000, 768,3072, 776,4288, 784,8384, 792,12480,
-   800,3200, 808,4800, 816,8896, 824,12992, 832,1216, 840,5312, 848,9408,
-   856,13504, 864,1728, 872,5824, 880,9920, 888,14016, 896,2240, 904,6336,
-   912,10432, 920,14528, 928,2752, 936,6848, 944,10944, 952,15040, 960,3264,
-   968,7360, 976,11456, 984,15552, 992,3776, 1000,7872, 1008,11968, 1016,16064,
-   1032,4352, 1040,8448, 1048,12544, 1056,3072, 1064,4864, 1072,8960,
-   1080,13056, 1088,1280, 1096,5376, 1104,9472, 1112,13568, 1120,1792,
-   1128,5888, 1136,9984, 1144,14080, 1152,2304, 1160,6400, 1168,10496,
-   1176,14592, 1184,2816, 1192,6912, 1200,11008, 1208,15104, 1216,3328,
-   1224,7424, 1232,11520, 1240,15616, 1248,3840, 1256,7936, 1264,12032,
-   1272,16128, 1288,4416, 1296,8512, 1304,12608, 1312,3328, 1320,4928,
-   1328,9024, 1336,13120, 1352,5440, 1360,9536, 1368,13632, 1376,1856,
-   1384,5952, 1392,10048, 1400,14144, 1408,2368, 1416,6464, 1424,10560,
-   1432,14656, 1440,2880, 1448,6976, 1456,11072, 1464,15168, 1472,3392,
-   1480,7488, 1488,11584, 1496,15680, 1504,3904, 1512,8000, 1520,12096,
-   1528,16192, 1536,2112, 1544,4480, 1552,8576, 1560,12672, 1568,2240,
-   1576,4992, 1584,9088, 1592,13184, 1600,2368, 1608,5504, 1616,9600,
-   1624,13696, 1632,1920, 1640,6016, 1648,10112, 1656,14208, 1664,2432,
-   1672,6528, 1680,10624, 1688,14720, 1696,2944, 1704,7040, 1712,11136,
-   1720,15232, 1728,3456, 1736,7552, 1744,11648, 1752,15744, 1760,3968,
-   1768,8064, 1776,12160, 1784,16256, 1792,3136, 1800,4544, 1808,8640,
-   1816,12736, 1824,3264, 1832,5056, 1840,9152, 1848,13248, 1856,3392,
-   1864,5568, 1872,9664, 1880,13760, 1888,1984, 1896,6080, 1904,10176,
-   1912,14272, 1920,2496, 1928,6592, 1936,10688, 1944,14784, 1952,3008,
-   1960,7104, 1968,11200, 1976,15296, 1984,3520, 1992,7616, 2000,11712,
-   2008,15808, 2016,4032, 2024,8128, 2032,12224, 2040,16320, 2048,4096,
-   2056,4104, 2064,8200, 2072,12296, 2080,4224, 2088,4616, 2096,8712,
-   2104,12808, 2112,4352, 2120,5128, 2128,9224, 2136,13320, 2144,4480,
-   2152,5640, 2160,9736, 2168,13832, 2176,4104, 2184,6152, 2192,10248,
-   2200,14344, 2208,2568, 2216,6664, 2224,10760, 2232,14856, 2240,3080,
-   2248,7176, 2256,11272, 2264,15368, 2272,3592, 2280,7688, 2288,11784,
-   2296,15880, 2304,5120, 2312,4168, 2320,8264, 2328,12360, 2336,5248,
-   2344,4680, 2352,8776, 2360,12872, 2368,5376, 2376,5192, 2384,9288,
-   2392,13384, 2400,5504, 2408,5704, 2416,9800, 2424,13896, 2432,5128,
-   2440,6216, 2448,10312, 2456,14408, 2464,2632, 2472,6728, 2480,10824,
-   2488,14920, 2496,3144, 2504,7240, 2512,11336, 2520,15432, 2528,3656,
-   2536,7752, 2544,11848, 2552,15944, 2560,6144, 2568,4232, 2576,8328,
-   2584,12424, 2592,6272, 2600,4744, 2608,8840, 2616,12936, 2624,6400,
-   2632,5256, 2640,9352, 2648,13448, 2656,6528, 2664,5768, 2672,9864,
-   2680,13960, 2688,6152, 2696,6280, 2704,10376, 2712,14472, 2720,6280,
-   2728,6792, 2736,10888, 2744,14984, 2752,3208, 2760,7304, 2768,11400,
-   2776,15496, 2784,3720, 2792,7816, 2800,11912, 2808,16008, 2816,7168,
-   2824,4296, 2832,8392, 2840,12488, 2848,7296, 2856,4808, 2864,8904,
-   2872,13000, 2880,7424, 2888,5320, 2896,9416, 2904,13512, 2912,7552,
-   2920,5832, 2928,9928, 2936,14024, 2944,7176, 2952,6344, 2960,10440,
-   2968,14536, 2976,7304, 2984,6856, 2992,10952, 3000,15048, 3008,3272,
-   3016,7368, 3024,11464, 3032,15560, 3040,3784, 3048,7880, 3056,11976,
-   3064,16072, 3072,4160, 3080,4360, 3088,8456, 3096,12552, 3104,4288,
-   3112,4872, 3120,8968, 3128,13064, 3136,4416, 3144,5384, 3152,9480,
-   3160,13576, 3168,4544, 3176,5896, 3184,9992, 3192,14088, 3200,4168,
-   3208,6408, 3216,10504, 3224,14600, 3232,4296, 3240,6920, 3248,11016,
-   3256,15112, 3264,3336, 3272,7432, 3280,11528, 3288,15624, 3296,3848,
-   3304,7944, 3312,12040, 3320,16136, 3328,5184, 3336,4424, 3344,8520,
-   3352,12616, 3360,5312, 3368,4936, 3376,9032, 3384,13128, 3392,5440,
-   3400,5448, 3408,9544, 3416,13640, 3424,5568, 3432,5960, 3440,10056,
-   3448,14152, 3456,5192, 3464,6472, 3472,10568, 3480,14664, 3488,5320,
-   3496,6984, 3504,11080, 3512,15176, 3520,5448, 3528,7496, 3536,11592,
-   3544,15688, 3552,3912, 3560,8008, 3568,12104, 3576,16200, 3584,6208,
-   3592,4488, 3600,8584, 3608,12680, 3616,6336, 3624,5000, 3632,9096,
-   3640,13192, 3648,6464, 3656,5512, 3664,9608, 3672,13704, 3680,6592,
-   3688,6024, 3696,10120, 3704,14216, 3712,6216, 3720,6536, 3728,10632,
-   3736,14728, 3744,6344, 3752,7048, 3760,11144, 3768,15240, 3776,6472,
-   3784,7560, 3792,11656, 3800,15752, 3808,3976, 3816,8072, 3824,12168,
-   3832,16264, 3840,7232, 3848,4552, 3856,8648, 3864,12744, 3872,7360,
-   3880,5064, 3888,9160, 3896,13256, 3904,7488, 3912,5576, 3920,9672,
-   3928,13768, 3936,7616, 3944,6088, 3952,10184, 3960,14280, 3968,7240,
-   3976,6600, 3984,10696, 3992,14792, 4000,7368, 4008,7112, 4016,11208,
-   4024,15304, 4032,7496, 4040,7624, 4048,11720, 4056,15816, 4064,7624,
-   4072,8136, 4080,12232, 4088,16328, 4096,8192, 4104,4112, 4112,8208,
-   4120,12304, 4128,8320, 4136,4624, 4144,8720, 4152,12816, 4160,8448,
-   4168,5136, 4176,9232, 4184,13328, 4192,8576, 4200,5648, 4208,9744,
-   4216,13840, 4224,8200, 4232,6160, 4240,10256, 4248,14352, 4256,8328,
-   4264,6672, 4272,10768, 4280,14864, 4288,8456, 4296,7184, 4304,11280,
-   4312,15376, 4320,8584, 4328,7696, 4336,11792, 4344,15888, 4352,9216,
-   4360,9232, 4368,8272, 4376,12368, 4384,9344, 4392,4688, 4400,8784,
-   4408,12880, 4416,9472, 4424,5200, 4432,9296, 4440,13392, 4448,9600,
-   4456,5712, 4464,9808, 4472,13904, 4480,9224, 4488,6224, 4496,10320,
-   4504,14416, 4512,9352, 4520,6736, 4528,10832, 4536,14928, 4544,9480,
-   4552,7248, 4560,11344, 4568,15440, 4576,9608, 4584,7760, 4592,11856,
-   4600,15952, 4608,10240, 4616,10256, 4624,8336, 4632,12432, 4640,10368,
-   4648,4752, 4656,8848, 4664,12944, 4672,10496, 4680,5264, 4688,9360,
-   4696,13456, 4704,10624, 4712,5776, 4720,9872, 4728,13968, 4736,10248,
-   4744,6288, 4752,10384, 4760,14480, 4768,10376, 4776,6800, 4784,10896,
-   4792,14992, 4800,10504, 4808,7312, 4816,11408, 4824,15504, 4832,10632,
-   4840,7824, 4848,11920, 4856,16016, 4864,11264, 4872,11280, 4880,8400,
-   4888,12496, 4896,11392, 4904,11408, 4912,8912, 4920,13008, 4928,11520,
-   4936,5328, 4944,9424, 4952,13520, 4960,11648, 4968,5840, 4976,9936,
-   4984,14032, 4992,11272, 5000,6352, 5008,10448, 5016,14544, 5024,11400,
-   5032,6864, 5040,10960, 5048,15056, 5056,11528, 5064,7376, 5072,11472,
-   5080,15568, 5088,11656, 5096,7888, 5104,11984, 5112,16080, 5120,8256,
-   5128,8272, 5136,8464, 5144,12560, 5152,8384, 5160,8400, 5168,8976,
-   5176,13072, 5184,8512, 5192,5392, 5200,9488, 5208,13584, 5216,8640,
-   5224,5904, 5232,10000, 5240,14096, 5248,8264, 5256,6416, 5264,10512,
-   5272,14608, 5280,8392, 5288,6928, 5296,11024, 5304,15120, 5312,8520,
-   5320,7440, 5328,11536, 5336,15632, 5344,8648, 5352,7952, 5360,12048,
-   5368,16144, 5376,9280, 5384,9296, 5392,8528, 5400,12624, 5408,9408,
-   5416,9424, 5424,9040, 5432,13136, 5440,9536, 5448,5456, 5456,9552,
-   5464,13648, 5472,9664, 5480,5968, 5488,10064, 5496,14160, 5504,9288,
-   5512,6480, 5520,10576, 5528,14672, 5536,9416, 5544,6992, 5552,11088,
-   5560,15184, 5568,9544, 5576,7504, 5584,11600, 5592,15696, 5600,9672,
-   5608,8016, 5616,12112, 5624,16208, 5632,10304, 5640,10320, 5648,8592,
-   5656,12688, 5664,10432, 5672,10448, 5680,9104, 5688,13200, 5696,10560,
-   5704,10576, 5712,9616, 5720,13712, 5728,10688, 5736,6032, 5744,10128,
-   5752,14224, 5760,10312, 5768,6544, 5776,10640, 5784,14736, 5792,10440,
-   5800,7056, 5808,11152, 5816,15248, 5824,10568, 5832,7568, 5840,11664,
-   5848,15760, 5856,10696, 5864,8080, 5872,12176, 5880,16272, 5888,11328,
-   5896,11344, 5904,8656, 5912,12752, 5920,11456, 5928,11472, 5936,9168,
-   5944,13264, 5952,11584, 5960,11600, 5968,9680, 5976,13776, 5984,11712,
-   5992,6096, 6000,10192, 6008,14288, 6016,11336, 6024,6608, 6032,10704,
-   6040,14800, 6048,11464, 6056,7120, 6064,11216, 6072,15312, 6080,11592,
-   6088,7632, 6096,11728, 6104,15824, 6112,11720, 6120,8144, 6128,12240,
-   6136,16336, 6144,12288, 6152,12304, 6160,8216, 6168,12312, 6176,12416,
-   6184,12432, 6192,8728, 6200,12824, 6208,12544, 6216,12560, 6224,9240,
-   6232,13336, 6240,12672, 6248,12688, 6256,9752, 6264,13848, 6272,12296,
-   6280,12312, 6288,10264, 6296,14360, 6304,12424, 6312,6680, 6320,10776,
-   6328,14872, 6336,12552, 6344,7192, 6352,11288, 6360,15384, 6368,12680,
-   6376,7704, 6384,11800, 6392,15896, 6400,13312, 6408,13328, 6416,8280,
-   6424,12376, 6432,13440, 6440,13456, 6448,8792, 6456,12888, 6464,13568,
-   6472,13584, 6480,9304, 6488,13400, 6496,13696, 6504,13712, 6512,9816,
-   6520,13912, 6528,13320, 6536,13336, 6544,10328, 6552,14424, 6560,13448,
-   6568,6744, 6576,10840, 6584,14936, 6592,13576, 6600,7256, 6608,11352,
-   6616,15448, 6624,13704, 6632,7768, 6640,11864, 6648,15960, 6656,14336,
-   6664,14352, 6672,8344, 6680,12440, 6688,14464, 6696,14480, 6704,8856,
-   6712,12952, 6720,14592, 6728,14608, 6736,9368, 6744,13464, 6752,14720,
-   6760,14736, 6768,9880, 6776,13976, 6784,14344, 6792,14360, 6800,10392,
-   6808,14488, 6816,14472, 6824,14488, 6832,10904, 6840,15000, 6848,14600,
-   6856,7320, 6864,11416, 6872,15512, 6880,14728, 6888,7832, 6896,11928,
-   6904,16024, 6912,15360, 6920,15376, 6928,8408, 6936,12504, 6944,15488,
-   6952,15504, 6960,8920, 6968,13016, 6976,15616, 6984,15632, 6992,9432,
-   7000,13528, 7008,15744, 7016,15760, 7024,9944, 7032,14040, 7040,15368,
-   7048,15384, 7056,10456, 7064,14552, 7072,15496, 7080,15512, 7088,10968,
-   7096,15064, 7104,15624, 7112,7384, 7120,11480, 7128,15576, 7136,15752,
-   7144,7896, 7152,11992, 7160,16088, 7168,12352, 7176,12368, 7184,8472,
-   7192,12568, 7200,12480, 7208,12496, 7216,8984, 7224,13080, 7232,12608,
-   7240,12624, 7248,9496, 7256,13592, 7264,12736, 7272,12752, 7280,10008,
-   7288,14104, 7296,12360, 7304,12376, 7312,10520, 7320,14616, 7328,12488,
-   7336,12504, 7344,11032, 7352,15128, 7360,12616, 7368,7448, 7376,11544,
-   7384,15640, 7392,12744, 7400,7960, 7408,12056, 7416,16152, 7424,13376,
-   7432,13392, 7440,8536, 7448,12632, 7456,13504, 7464,13520, 7472,9048,
-   7480,13144, 7488,13632, 7496,13648, 7504,9560, 7512,13656, 7520,13760,
-   7528,13776, 7536,10072, 7544,14168, 7552,13384, 7560,13400, 7568,10584,
-   7576,14680, 7584,13512, 7592,13528, 7600,11096, 7608,15192, 7616,13640,
-   7624,13656, 7632,11608, 7640,15704, 7648,13768, 7656,8024, 7664,12120,
-   7672,16216, 7680,14400, 7688,14416, 7696,8600, 7704,12696, 7712,14528,
-   7720,14544, 7728,9112, 7736,13208, 7744,14656, 7752,14672, 7760,9624,
-   7768,13720, 7776,14784, 7784,14800, 7792,10136, 7800,14232, 7808,14408,
-   7816,14424, 7824,10648, 7832,14744, 7840,14536, 7848,14552, 7856,11160,
-   7864,15256, 7872,14664, 7880,14680, 7888,11672, 7896,15768, 7904,14792,
-   7912,8088, 7920,12184, 7928,16280, 7936,15424, 7944,15440, 7952,8664,
-   7960,12760, 7968,15552, 7976,15568, 7984,9176, 7992,13272, 8000,15680,
-   8008,15696, 8016,9688, 8024,13784, 8032,15808, 8040,15824, 8048,10200,
-   8056,14296, 8064,15432, 8072,15448, 8080,10712, 8088,14808, 8096,15560,
-   8104,15576, 8112,11224, 8120,15320, 8128,15688, 8136,15704, 8144,11736,
-   8152,15832, 8160,15816, 8168,15832, 8176,12248, 8184,16344, 8200,8320,
-   8208,8224, 8216,12320, 8232,10368, 8240,8736, 8248,12832, 8256,8448,
-   8264,8384, 8272,9248, 8280,13344, 8288,9232, 8296,10432, 8304,9760,
-   8312,13856, 8328,12416, 8336,10272, 8344,14368, 8352,12296, 8360,14464,
-   8368,10784, 8376,14880, 8384,8456, 8392,12480, 8400,11296, 8408,15392,
-   8416,12552, 8424,14528, 8432,11808, 8440,15904, 8448,9216, 8456,8576,
-   8464,9232, 8472,12384, 8480,9248, 8488,10624, 8496,8800, 8504,12896,
-   8512,9472, 8520,8640, 8528,9312, 8536,13408, 8544,9296, 8552,10688,
-   8560,9824, 8568,13920, 8576,9224, 8584,12672, 8592,10336, 8600,14432,
-   8608,13320, 8616,14720, 8624,10848, 8632,14944, 8640,9480, 8648,12736,
-   8656,11360, 8664,15456, 8672,13576, 8680,14784, 8688,11872, 8696,15968,
-   8704,12288, 8712,12416, 8720,12296, 8728,12448, 8736,12304, 8744,10376,
-   8752,8864, 8760,12960, 8768,12352, 8776,12480, 8784,9376, 8792,13472,
-   8800,12368, 8808,10440, 8816,9888, 8824,13984, 8832,12320, 8840,12424,
-   8848,10400, 8856,14496, 8864,12312, 8872,14472, 8880,10912, 8888,15008,
-   8896,12384, 8904,12488, 8912,11424, 8920,15520, 8928,12568, 8936,14536,
-   8944,11936, 8952,16032, 8960,12544, 8968,12672, 8976,12552, 8984,12512,
-   8992,12560, 9000,10632, 9008,12568, 9016,13024, 9024,12608, 9032,12736,
-   9040,9440, 9048,13536, 9056,12624, 9064,10696, 9072,9952, 9080,14048,
-   9088,9240, 9096,12680, 9104,10464, 9112,14560, 9120,13336, 9128,14728,
-   9136,10976, 9144,15072, 9152,9496, 9160,12744, 9168,11488, 9176,15584,
-   9184,13592, 9192,14792, 9200,12000, 9208,16096, 9224,9344, 9232,9248,
-   9240,12576, 9256,11392, 9264,12560, 9272,13088, 9280,9472, 9288,9408,
-   9296,9504, 9304,13600, 9312,9488, 9320,11456, 9328,10016, 9336,14112,
-   9352,13440, 9360,10528, 9368,14624, 9376,12360, 9384,15488, 9392,11040,
-   9400,15136, 9408,9480, 9416,13504, 9424,11552, 9432,15648, 9440,12616,
-   9448,15552, 9456,12064, 9464,16160, 9480,9600, 9488,9504, 9496,12640,
-   9512,11648, 9520,12624, 9528,13152, 9544,9664, 9552,9568, 9560,13664,
-   9576,11712, 9584,10080, 9592,14176, 9608,13696, 9616,10592, 9624,14688,
-   9632,13384, 9640,15744, 9648,11104, 9656,15200, 9672,13760, 9680,11616,
-   9688,15712, 9696,13640, 9704,15808, 9712,12128, 9720,16224, 9728,13312,
-   9736,13440, 9744,13320, 9752,12704, 9760,13328, 9768,11400, 9776,13336,
-   9784,13216, 9792,13376, 9800,13504, 9808,13384, 9816,13728, 9824,13392,
-   9832,11464, 9840,10144, 9848,14240, 9856,13344, 9864,13448, 9872,10656,
-   9880,14752, 9888,12376, 9896,15496, 9904,11168, 9912,15264, 9920,13408,
-   9928,13512, 9936,11680, 9944,15776, 9952,12632, 9960,15560, 9968,12192,
-   9976,16288, 9984,13568, 9992,13696, 10000,13576, 10008,12768, 10016,13584,
-   10024,11656, 10032,13592, 10040,13280, 10048,13632, 10056,13760,
-   10064,13640, 10072,13792, 10080,13648, 10088,11720, 10096,10208,
-   10104,14304, 10112,13600, 10120,13704, 10128,10720, 10136,14816,
-   10144,13400, 10152,15752, 10160,11232, 10168,15328, 10176,13664,
-   10184,13768, 10192,11744, 10200,15840, 10208,13656, 10216,15816,
-   10224,12256, 10232,16352, 10248,10272, 10256,10368, 10264,12328,
-   10280,10384, 10288,10376, 10296,12840, 10304,11264, 10312,11296,
-   10320,11392, 10328,13352, 10336,11272, 10344,10448, 10352,11400,
-   10360,13864, 10376,12432, 10392,14376, 10400,12328, 10408,14480,
-   10416,10792, 10424,14888, 10432,11280, 10440,12496, 10448,11304,
-   10456,15400, 10464,11288, 10472,14544, 10480,11816, 10488,15912,
-   10496,11264, 10504,11272, 10512,11280, 10520,12392, 10528,11296,
-   10536,10640, 10544,12496, 10552,12904, 10560,11328, 10568,11360,
-   10576,11456, 10584,13416, 10592,11336, 10600,10704, 10608,11464,
-   10616,13928, 10624,11392, 10632,12688, 10640,11304, 10648,14440,
-   10656,13352, 10664,14736, 10672,10856, 10680,14952, 10688,11344,
-   10696,12752, 10704,11368, 10712,15464, 10720,11352, 10728,14800,
-   10736,11880, 10744,15976, 10752,14336, 10760,14368, 10768,14464,
-   10776,12456, 10784,14344, 10792,14376, 10800,14472, 10808,12968,
-   10816,15360, 10824,15392, 10832,15488, 10840,13480, 10848,15368,
-   10856,15400, 10864,15496, 10872,13992, 10880,14352, 10888,12440,
-   10896,14480, 10904,14504, 10912,14360, 10920,14488, 10928,14488,
-   10936,15016, 10944,15376, 10952,12504, 10960,11432, 10968,15528,
-   10976,15384, 10984,14552, 10992,11944, 11000,16040, 11008,14400,
-   11016,14432, 11024,14528, 11032,12520, 11040,14408, 11048,14440,
-   11056,14536, 11064,13032, 11072,15424, 11080,15456, 11088,15552,
-   11096,13544, 11104,15432, 11112,15464, 11120,15560, 11128,14056,
-   11136,14416, 11144,12696, 11152,14544, 11160,14568, 11168,14424,
-   11176,14744, 11184,14552, 11192,15080, 11200,15440, 11208,12760,
-   11216,11496, 11224,15592, 11232,15448, 11240,14808, 11248,12008,
-   11256,16104, 11272,11296, 11280,11392, 11288,12584, 11304,11408,
-   11312,12688, 11320,13096, 11328,11520, 11336,11552, 11344,11648,
-   11352,13608, 11360,11528, 11368,11472, 11376,11656, 11384,14120,
-   11400,13456, 11416,14632, 11424,12392, 11432,15504, 11440,14440,
-   11448,15144, 11456,11536, 11464,13520, 11472,11560, 11480,15656,
-   11488,11544, 11496,15568, 11504,12072, 11512,16168, 11528,11552,
-   11536,11648, 11544,12648, 11560,11664, 11568,12752, 11576,13160,
-   11592,11616, 11600,11712, 11608,13672, 11624,11728, 11632,11720,
-   11640,14184, 11656,13712, 11672,14696, 11680,13416, 11688,15760,
-   11696,15464, 11704,15208, 11720,13776, 11736,15720, 11744,13672,
-   11752,15824, 11760,12136, 11768,16232, 11776,14592, 11784,14624,
-   11792,14720, 11800,12712, 11808,14600, 11816,14632, 11824,14728,
-   11832,13224, 11840,15616, 11848,15648, 11856,15744, 11864,13736,
-   11872,15624, 11880,15656, 11888,15752, 11896,14248, 11904,14608,
-   11912,13464, 11920,14736, 11928,14760, 11936,14616, 11944,15512,
-   11952,14744, 11960,15272, 11968,15632, 11976,13528, 11984,15760,
-   11992,15784, 12000,15640, 12008,15576, 12016,12200, 12024,16296,
-   12032,14656, 12040,14688, 12048,14784, 12056,12776, 12064,14664,
-   12072,14696, 12080,14792, 12088,13288, 12096,15680, 12104,15712,
-   12112,15808, 12120,13800, 12128,15688, 12136,15720, 12144,15816,
-   12152,14312, 12160,14672, 12168,13720, 12176,14800, 12184,14824,
-   12192,14680, 12200,15768, 12208,14808, 12216,15336, 12224,15696,
-   12232,13784, 12240,15824, 12248,15848, 12256,15704, 12264,15832,
-   12272,15832, 12280,16360, 12312,12336, 12344,12848, 12352,12544,
-   12360,12552, 12368,12560, 12376,13360, 12384,12576, 12392,12584,
-   12400,13336, 12408,13872, 12424,12448, 12440,14384, 12456,14496,
-   12464,14472, 12472,14896, 12480,12672, 12488,12512, 12496,12688,
-   12504,15408, 12512,12680, 12520,14560, 12528,14728, 12536,15920,
-   12544,13312, 12552,13320, 12560,13328, 12568,13336, 12576,13344,
-   12584,13352, 12592,13360, 12600,12912, 12608,13568, 12616,13576,
-   12624,13584, 12632,13424, 12640,13600, 12648,13608, 12656,13400,
-   12664,13936, 12672,13440, 12680,12704, 12688,13456, 12696,14448,
-   12704,13448, 12712,14752, 12720,15496, 12728,14960, 12736,13696,
-   12744,12768, 12752,13712, 12760,15472, 12768,13704, 12776,14816,
-   12784,15752, 12792,15984, 12800,14336, 12808,14464, 12816,14344,
-   12824,14472, 12832,14352, 12840,14480, 12848,14360, 12856,12976,
-   12864,14400, 12872,14528, 12880,14408, 12888,13488, 12896,14416,
-   12904,14544, 12912,14424, 12920,14000, 12928,14368, 12936,14496,
-   12944,14376, 12952,14512, 12960,14384, 12968,14504, 12976,14488,
-   12984,15024, 12992,14432, 13000,14560, 13008,14440, 13016,15536,
-   13024,14448, 13032,14568, 13040,14744, 13048,16048, 13056,14592,
-   13064,14720, 13072,14600, 13080,14728, 13088,14608, 13096,14736,
-   13104,14616, 13112,14744, 13120,14656, 13128,14784, 13136,14664,
-   13144,13552, 13152,14672, 13160,14800, 13168,14680, 13176,14064,
-   13184,14624, 13192,14752, 13200,14632, 13208,14576, 13216,13464,
-   13224,14760, 13232,15512, 13240,15088, 13248,14688, 13256,14816,
-   13264,14696, 13272,15600, 13280,13720, 13288,14824, 13296,15768,
-   13304,16112, 13336,13360, 13368,14616, 13376,13568, 13384,13576,
-   13392,13584, 13400,13616, 13408,13600, 13416,13608, 13424,13592,
-   13432,14128, 13448,13472, 13464,14640, 13480,15520, 13488,14536,
-   13496,15152, 13504,13696, 13512,13536, 13520,13712, 13528,15664,
-   13536,13704, 13544,15584, 13552,14792, 13560,16176, 13592,13616,
-   13624,14680, 13656,13680, 13688,14192, 13704,13728, 13720,14704,
-   13736,15776, 13744,15560, 13752,15216, 13768,13792, 13784,15728,
-   13800,15840, 13808,15816, 13816,16240, 13824,15360, 13832,15488,
-   13840,15368, 13848,15496, 13856,15376, 13864,15504, 13872,15384,
-   13880,15512, 13888,15424, 13896,15552, 13904,15432, 13912,15560,
-   13920,15440, 13928,15568, 13936,15448, 13944,14256, 13952,15392,
-   13960,15520, 13968,15400, 13976,14768, 13984,15408, 13992,15528,
-   14000,14552, 14008,15280, 14016,15456, 14024,15584, 14032,15464,
-   14040,15792, 14048,15472, 14056,15592, 14064,14808, 14072,16304,
-   14080,15616, 14088,15744, 14096,15624, 14104,15752, 14112,15632,
-   14120,15760, 14128,15640, 14136,15768, 14144,15680, 14152,15808,
-   14160,15688, 14168,15816, 14176,15696, 14184,15824, 14192,15704,
-   14200,14320, 14208,15648, 14216,15776, 14224,15656, 14232,14832,
-   14240,15664, 14248,15784, 14256,15576, 14264,15344, 14272,15712,
-   14280,15840, 14288,15720, 14296,15856, 14304,15728, 14312,15848,
-   14320,15832, 14328,16368, 14392,14488, 14400,14592, 14408,14600,
-   14416,14608, 14424,14616, 14432,14624, 14440,14632, 14448,14640,
-   14456,15512, 14504,14512, 14520,14904, 14528,14720, 14536,14728,
-   14544,14736, 14552,15416, 14560,14752, 14568,14576, 14584,15928,
-   14576,14760, 14592,15360, 14600,15368, 14608,15376, 14616,15384,
-   14624,15392, 14632,15400, 14640,15408, 14648,15416, 14656,15616,
-   14664,15624, 14672,15632, 14680,15640, 14688,15648, 14696,15656,
-   14704,15664, 14712,15576, 14720,15488, 14728,15496, 14736,15504,
-   14744,15512, 14752,15520, 14760,14768, 14776,14968, 14768,15528,
-   14784,15744, 14792,15752, 14800,15760, 14808,15480, 14816,15776,
-   14824,14832, 14840,15992, 14832,15784, 14856,14864, 14864,14880,
-   14872,14896, 14880,14976, 14888,14992, 14896,15008, 14904,15024,
-   14912,15104, 14920,15120, 14928,15136, 14936,15152, 14944,15232,
-   14952,15248, 14960,15264, 14968,15280, 14984,15008, 15000,15024,
-   15016,15024, 15040,15112, 15048,15128, 15056,15144, 15064,15544,
-   15072,15240, 15080,15256, 15088,15272, 15096,16056, 15104,15872,
-   15112,15888, 15120,15904, 15128,15920, 15136,16000, 15144,16016,
-   15152,16032, 15160,16048, 15168,16128, 15176,16144, 15184,16160,
-   15192,16176, 15200,16256, 15208,16272, 15216,16288, 15224,16304,
-   15232,15880, 15240,15896, 15248,15912, 15256,15928, 15264,16008,
-   15272,16024, 15280,16040, 15288,16056, 15296,16136, 15304,16152,
-   15312,16168, 15320,15608, 15328,16264, 15336,16280, 15344,16296,
-   15352,16120, 15416,15512, 15424,15616, 15432,15624, 15440,15632,
-   15448,15640, 15456,15648, 15464,15656, 15472,15664, 15480,15768,
-   15528,15536, 15544,16048, 15552,15744, 15560,15752, 15568,15760,
-   15576,15672, 15584,15776, 15592,15600, 15600,15784, 15608,16184,
-   15672,15768, 15736,15832, 15784,15792, 15800,16304, 15848,15856,
-   15880,16000, 15864,16248, 15888,16000, 15896,16008, 15904,16000,
-   15912,16016, 15920,16008, 15928,16024, 15936,16128, 15944,16160,
-   15952,16256, 15960,16288, 15968,16136, 15976,16168, 15984,16264,
-   15992,16296, 16008,16032, 16024,16040, 16064,16144, 16040,16048,
-   16072,16176, 16080,16272, 16088,16304, 16096,16152, 16104,16184,
-   16112,16280, 16136,16256, 16120,16312, 16144,16256, 16152,16264,
-   16160,16256, 16168,16272, 16176,16264, 16184,16280, 16200,16208,
-   16208,16224, 16216,16240, 16224,16320, 16232,16336, 16240,16352,
-   16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368,
-   16328,16352, 16360,16368
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
-
-const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH] =
-{
-   /* radix 8, size 4032 */
-   8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512,
-   72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184,
-   128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600,
-   184,29696, 192,1536, 200,5632, 208,9728, 216,13824, 224,17920, 232,22016,
-   240,26112, 248,30208, 256,2048, 264,6144, 272,10240, 280,14336, 288,18432,
-   296,22528, 304,26624, 312,30720, 320,2560, 328,6656, 336,10752, 344,14848,
-   352,18944, 360,23040, 368,27136, 376,31232, 384,3072, 392,7168, 400,11264,
-   408,15360, 416,19456, 424,23552, 432,27648, 440,31744, 448,3584, 456,7680,
-   464,11776, 472,15872, 480,19968, 488,24064, 496,28160, 504,32256, 520,4160,
-   528,8256, 536,12352, 544,16448, 552,20544, 560,24640, 568,28736, 584,4672,
-   592,8768, 600,12864, 608,16960, 616,21056, 624,25152, 632,29248, 640,1088,
-   648,5184, 656,9280, 664,13376, 672,17472, 680,21568, 688,25664, 696,29760,
-   704,1600, 712,5696, 720,9792, 728,13888, 736,17984, 744,22080, 752,26176,
-   760,30272, 768,2112, 776,6208, 784,10304, 792,14400, 800,18496, 808,22592,
-   816,26688, 824,30784, 832,2624, 840,6720, 848,10816, 856,14912, 864,19008,
-   872,23104, 880,27200, 888,31296, 896,3136, 904,7232, 912,11328, 920,15424,
-   928,19520, 936,23616, 944,27712, 952,31808, 960,3648, 968,7744, 976,11840,
-   984,15936, 992,20032, 1000,24128, 1008,28224, 1016,32320, 1032,4224,
-   1040,8320, 1048,12416, 1056,16512, 1064,20608, 1072,24704, 1080,28800,
-   1096,4736, 1104,8832, 1112,12928, 1120,17024, 1128,21120, 1136,25216,
-   1144,29312, 1160,5248, 1168,9344, 1176,13440, 1184,17536, 1192,21632,
-   1200,25728, 1208,29824, 1216,1664, 1224,5760, 1232,9856, 1240,13952,
-   1248,18048, 1256,22144, 1264,26240, 1272,30336, 1280,2176, 1288,6272,
-   1296,10368, 1304,14464, 1312,18560, 1320,22656, 1328,26752, 1336,30848,
-   1344,2688, 1352,6784, 1360,10880, 1368,14976, 1376,19072, 1384,23168,
-   1392,27264, 1400,31360, 1408,3200, 1416,7296, 1424,11392, 1432,15488,
-   1440,19584, 1448,23680, 1456,27776, 1464,31872, 1472,3712, 1480,7808,
-   1488,11904, 1496,16000, 1504,20096, 1512,24192, 1520,28288, 1528,32384,
-   1544,4288, 1552,8384, 1560,12480, 1568,16576, 1576,20672, 1584,24768,
-   1592,28864, 1608,4800, 1616,8896, 1624,12992, 1632,17088, 1640,21184,
-   1648,25280, 1656,29376, 1672,5312, 1680,9408, 1688,13504, 1696,17600,
-   1704,21696, 1712,25792, 1720,29888, 1736,5824, 1744,9920, 1752,14016,
-   1760,18112, 1768,22208, 1776,26304, 1784,30400, 1792,2240, 1800,6336,
-   1808,10432, 1816,14528, 1824,18624, 1832,22720, 1840,26816, 1848,30912,
-   1856,2752, 1864,6848, 1872,10944, 1880,15040, 1888,19136, 1896,23232,
-   1904,27328, 1912,31424, 1920,3264, 1928,7360, 1936,11456, 1944,15552,
-   1952,19648, 1960,23744, 1968,27840, 1976,31936, 1984,3776, 1992,7872,
-   2000,11968, 2008,16064, 2016,20160, 2024,24256, 2032,28352, 2040,32448,
-   2056,4352, 2064,8448, 2072,12544, 2080,16640, 2088,20736, 2096,24832,
-   2104,28928, 2120,4864, 2128,8960, 2136,13056, 2144,17152, 2152,21248,
-   2160,25344, 2168,29440, 2184,5376, 2192,9472, 2200,13568, 2208,17664,
-   2216,21760, 2224,25856, 2232,29952, 2248,5888, 2256,9984, 2264,14080,
-   2272,18176, 2280,22272, 2288,26368, 2296,30464, 2312,6400, 2320,10496,
-   2328,14592, 2336,18688, 2344,22784, 2352,26880, 2360,30976, 2368,2816,
-   2376,6912, 2384,11008, 2392,15104, 2400,19200, 2408,23296, 2416,27392,
-   2424,31488, 2432,3328, 2440,7424, 2448,11520, 2456,15616, 2464,19712,
-   2472,23808, 2480,27904, 2488,32000, 2496,3840, 2504,7936, 2512,12032,
-   2520,16128, 2528,20224, 2536,24320, 2544,28416, 2552,32512, 2568,4416,
-   2576,8512, 2584,12608, 2592,16704, 2600,20800, 2608,24896, 2616,28992,
-   2632,4928, 2640,9024, 2648,13120, 2656,17216, 2664,21312, 2672,25408,
-   2680,29504, 2696,5440, 2704,9536, 2712,13632, 2720,17728, 2728,21824,
-   2736,25920, 2744,30016, 2760,5952, 2768,10048, 2776,14144, 2784,18240,
-   2792,22336, 2800,26432, 2808,30528, 2824,6464, 2832,10560, 2840,14656,
-   2848,18752, 2856,22848, 2864,26944, 2872,31040, 2888,6976, 2896,11072,
-   2904,15168, 2912,19264, 2920,23360, 2928,27456, 2936,31552, 2944,3392,
-   2952,7488, 2960,11584, 2968,15680, 2976,19776, 2984,23872, 2992,27968,
-   3000,32064, 3008,3904, 3016,8000, 3024,12096, 3032,16192, 3040,20288,
-   3048,24384, 3056,28480, 3064,32576, 3080,4480, 3088,8576, 3096,12672,
-   3104,16768, 3112,20864, 3120,24960, 3128,29056, 3144,4992, 3152,9088,
-   3160,13184, 3168,17280, 3176,21376, 3184,25472, 3192,29568, 3208,5504,
-   3216,9600, 3224,13696, 3232,17792, 3240,21888, 3248,25984, 3256,30080,
-   3272,6016, 3280,10112, 3288,14208, 3296,18304, 3304,22400, 3312,26496,
-   3320,30592, 3336,6528, 3344,10624, 3352,14720, 3360,18816, 3368,22912,
-   3376,27008, 3384,31104, 3400,7040, 3408,11136, 3416,15232, 3424,19328,
-   3432,23424, 3440,27520, 3448,31616, 3464,7552, 3472,11648, 3480,15744,
-   3488,19840, 3496,23936, 3504,28032, 3512,32128, 3520,3968, 3528,8064,
-   3536,12160, 3544,16256, 3552,20352, 3560,24448, 3568,28544, 3576,32640,
-   3592,4544, 3600,8640, 3608,12736, 3616,16832, 3624,20928, 3632,25024,
-   3640,29120, 3656,5056, 3664,9152, 3672,13248, 3680,17344, 3688,21440,
-   3696,25536, 3704,29632, 3720,5568, 3728,9664, 3736,13760, 3744,17856,
-   3752,21952, 3760,26048, 3768,30144, 3784,6080, 3792,10176, 3800,14272,
-   3808,18368, 3816,22464, 3824,26560, 3832,30656, 3848,6592, 3856,10688,
-   3864,14784, 3872,18880, 3880,22976, 3888,27072, 3896,31168, 3912,7104,
-   3920,11200, 3928,15296, 3936,19392, 3944,23488, 3952,27584, 3960,31680,
-   3976,7616, 3984,11712, 3992,15808, 4000,19904, 4008,24000, 4016,28096,
-   4024,32192, 4040,8128, 4048,12224, 4056,16320, 4064,20416, 4072,24512,
-   4080,28608, 4088,32704, 4112,8200, 4120,12296, 4128,16392, 4136,20488,
-   4144,24584, 4152,28680, 4168,4616, 4176,8712, 4184,12808, 4192,16904,
-   4200,21000, 4208,25096, 4216,29192, 4232,5128, 4240,9224, 4248,13320,
-   4256,17416, 4264,21512, 4272,25608, 4280,29704, 4296,5640, 4304,9736,
-   4312,13832, 4320,17928, 4328,22024, 4336,26120, 4344,30216, 4360,6152,
-   4368,10248, 4376,14344, 4384,18440, 4392,22536, 4400,26632, 4408,30728,
-   4424,6664, 4432,10760, 4440,14856, 4448,18952, 4456,23048, 4464,27144,
-   4472,31240, 4488,7176, 4496,11272, 4504,15368, 4512,19464, 4520,23560,
-   4528,27656, 4536,31752, 4552,7688, 4560,11784, 4568,15880, 4576,19976,
-   4584,24072, 4592,28168, 4600,32264, 4624,8264, 4632,12360, 4640,16456,
-   4648,20552, 4656,24648, 4664,28744, 4688,8776, 4696,12872, 4704,16968,
-   4712,21064, 4720,25160, 4728,29256, 4744,5192, 4752,9288, 4760,13384,
-   4768,17480, 4776,21576, 4784,25672, 4792,29768, 4808,5704, 4816,9800,
-   4824,13896, 4832,17992, 4840,22088, 4848,26184, 4856,30280, 4872,6216,
-   4880,10312, 4888,14408, 4896,18504, 4904,22600, 4912,26696, 4920,30792,
-   4936,6728, 4944,10824, 4952,14920, 4960,19016, 4968,23112, 4976,27208,
-   4984,31304, 5000,7240, 5008,11336, 5016,15432, 5024,19528, 5032,23624,
-   5040,27720, 5048,31816, 5064,7752, 5072,11848, 5080,15944, 5088,20040,
-   5096,24136, 5104,28232, 5112,32328, 5136,8328, 5144,12424, 5152,16520,
-   5160,20616, 5168,24712, 5176,28808, 5200,8840, 5208,12936, 5216,17032,
-   5224,21128, 5232,25224, 5240,29320, 5264,9352, 5272,13448, 5280,17544,
-   5288,21640, 5296,25736, 5304,29832, 5320,5768, 5328,9864, 5336,13960,
-   5344,18056, 5352,22152, 5360,26248, 5368,30344, 5384,6280, 5392,10376,
-   5400,14472, 5408,18568, 5416,22664, 5424,26760, 5432,30856, 5448,6792,
-   5456,10888, 5464,14984, 5472,19080, 5480,23176, 5488,27272, 5496,31368,
-   5512,7304, 5520,11400, 5528,15496, 5536,19592, 5544,23688, 5552,27784,
-   5560,31880, 5576,7816, 5584,11912, 5592,16008, 5600,20104, 5608,24200,
-   5616,28296, 5624,32392, 5648,8392, 5656,12488, 5664,16584, 5672,20680,
-   5680,24776, 5688,28872, 5712,8904, 5720,13000, 5728,17096, 5736,21192,
-   5744,25288, 5752,29384, 5776,9416, 5784,13512, 5792,17608, 5800,21704,
-   5808,25800, 5816,29896, 5840,9928, 5848,14024, 5856,18120, 5864,22216,
-   5872,26312, 5880,30408, 5896,6344, 5904,10440, 5912,14536, 5920,18632,
-   5928,22728, 5936,26824, 5944,30920, 5960,6856, 5968,10952, 5976,15048,
-   5984,19144, 5992,23240, 6000,27336, 6008,31432, 6024,7368, 6032,11464,
-   6040,15560, 6048,19656, 6056,23752, 6064,27848, 6072,31944, 6088,7880,
-   6096,11976, 6104,16072, 6112,20168, 6120,24264, 6128,28360, 6136,32456,
-   6160,8456, 6168,12552, 6176,16648, 6184,20744, 6192,24840, 6200,28936,
-   6224,8968, 6232,13064, 6240,17160, 6248,21256, 6256,25352, 6264,29448,
-   6288,9480, 6296,13576, 6304,17672, 6312,21768, 6320,25864, 6328,29960,
-   6352,9992, 6360,14088, 6368,18184, 6376,22280, 6384,26376, 6392,30472,
-   6416,10504, 6424,14600, 6432,18696, 6440,22792, 6448,26888, 6456,30984,
-   6472,6920, 6480,11016, 6488,15112, 6496,19208, 6504,23304, 6512,27400,
-   6520,31496, 6536,7432, 6544,11528, 6552,15624, 6560,19720, 6568,23816,
-   6576,27912, 6584,32008, 6600,7944, 6608,12040, 6616,16136, 6624,20232,
-   6632,24328, 6640,28424, 6648,32520, 6672,8520, 6680,12616, 6688,16712,
-   6696,20808, 6704,24904, 6712,29000, 6736,9032, 6744,13128, 6752,17224,
-   6760,21320, 6768,25416, 6776,29512, 6800,9544, 6808,13640, 6816,17736,
-   6824,21832, 6832,25928, 6840,30024, 6864,10056, 6872,14152, 6880,18248,
-   6888,22344, 6896,26440, 6904,30536, 6928,10568, 6936,14664, 6944,18760,
-   6952,22856, 6960,26952, 6968,31048, 6992,11080, 7000,15176, 7008,19272,
-   7016,23368, 7024,27464, 7032,31560, 7048,7496, 7056,11592, 7064,15688,
-   7072,19784, 7080,23880, 7088,27976, 7096,32072, 7112,8008, 7120,12104,
-   7128,16200, 7136,20296, 7144,24392, 7152,28488, 7160,32584, 7184,8584,
-   7192,12680, 7200,16776, 7208,20872, 7216,24968, 7224,29064, 7248,9096,
-   7256,13192, 7264,17288, 7272,21384, 7280,25480, 7288,29576, 7312,9608,
-   7320,13704, 7328,17800, 7336,21896, 7344,25992, 7352,30088, 7376,10120,
-   7384,14216, 7392,18312, 7400,22408, 7408,26504, 7416,30600, 7440,10632,
-   7448,14728, 7456,18824, 7464,22920, 7472,27016, 7480,31112, 7504,11144,
-   7512,15240, 7520,19336, 7528,23432, 7536,27528, 7544,31624, 7568,11656,
-   7576,15752, 7584,19848, 7592,23944, 7600,28040, 7608,32136, 7624,8072,
-   7632,12168, 7640,16264, 7648,20360, 7656,24456, 7664,28552, 7672,32648,
-   7696,8648, 7704,12744, 7712,16840, 7720,20936, 7728,25032, 7736,29128,
-   7760,9160, 7768,13256, 7776,17352, 7784,21448, 7792,25544, 7800,29640,
-   7824,9672, 7832,13768, 7840,17864, 7848,21960, 7856,26056, 7864,30152,
-   7888,10184, 7896,14280, 7904,18376, 7912,22472, 7920,26568, 7928,30664,
-   7952,10696, 7960,14792, 7968,18888, 7976,22984, 7984,27080, 7992,31176,
-   8016,11208, 8024,15304, 8032,19400, 8040,23496, 8048,27592, 8056,31688,
-   8080,11720, 8088,15816, 8096,19912, 8104,24008, 8112,28104, 8120,32200,
-   8144,12232, 8152,16328, 8160,20424, 8168,24520, 8176,28616, 8184,32712,
-   8216,12304, 8224,16400, 8232,20496, 8240,24592, 8248,28688, 8272,8720,
-   8280,12816, 8288,16912, 8296,21008, 8304,25104, 8312,29200, 8336,9232,
-   8344,13328, 8352,17424, 8360,21520, 8368,25616, 8376,29712, 8400,9744,
-   8408,13840, 8416,17936, 8424,22032, 8432,26128, 8440,30224, 8464,10256,
-   8472,14352, 8480,18448, 8488,22544, 8496,26640, 8504,30736, 8528,10768,
-   8536,14864, 8544,18960, 8552,23056, 8560,27152, 8568,31248, 8592,11280,
-   8600,15376, 8608,19472, 8616,23568, 8624,27664, 8632,31760, 8656,11792,
-   8664,15888, 8672,19984, 8680,24080, 8688,28176, 8696,32272, 8728,12368,
-   8736,16464, 8744,20560, 8752,24656, 8760,28752, 8792,12880, 8800,16976,
-   8808,21072, 8816,25168, 8824,29264, 8848,9296, 8856,13392, 8864,17488,
-   8872,21584, 8880,25680, 8888,29776, 8912,9808, 8920,13904, 8928,18000,
-   8936,22096, 8944,26192, 8952,30288, 8976,10320, 8984,14416, 8992,18512,
-   9000,22608, 9008,26704, 9016,30800, 9040,10832, 9048,14928, 9056,19024,
-   9064,23120, 9072,27216, 9080,31312, 9104,11344, 9112,15440, 9120,19536,
-   9128,23632, 9136,27728, 9144,31824, 9168,11856, 9176,15952, 9184,20048,
-   9192,24144, 9200,28240, 9208,32336, 9240,12432, 9248,16528, 9256,20624,
-   9264,24720, 9272,28816, 9304,12944, 9312,17040, 9320,21136, 9328,25232,
-   9336,29328, 9368,13456, 9376,17552, 9384,21648, 9392,25744, 9400,29840,
-   9424,9872, 9432,13968, 9440,18064, 9448,22160, 9456,26256, 9464,30352,
-   9488,10384, 9496,14480, 9504,18576, 9512,22672, 9520,26768, 9528,30864,
-   9552,10896, 9560,14992, 9568,19088, 9576,23184, 9584,27280, 9592,31376,
-   9616,11408, 9624,15504, 9632,19600, 9640,23696, 9648,27792, 9656,31888,
-   9680,11920, 9688,16016, 9696,20112, 9704,24208, 9712,28304, 9720,32400,
-   9752,12496, 9760,16592, 9768,20688, 9776,24784, 9784,28880, 9816,13008,
-   9824,17104, 9832,21200, 9840,25296, 9848,29392, 9880,13520, 9888,17616,
-   9896,21712, 9904,25808, 9912,29904, 9944,14032, 9952,18128, 9960,22224,
-   9968,26320, 9976,30416, 10000,10448, 10008,14544, 10016,18640, 10024,22736,
-   10032,26832, 10040,30928, 10064,10960, 10072,15056, 10080,19152,
-   10088,23248, 10096,27344, 10104,31440, 10128,11472, 10136,15568,
-   10144,19664, 10152,23760, 10160,27856, 10168,31952, 10192,11984,
-   10200,16080, 10208,20176, 10216,24272, 10224,28368, 10232,32464,
-   10264,12560, 10272,16656, 10280,20752, 10288,24848, 10296,28944,
-   10328,13072, 10336,17168, 10344,21264, 10352,25360, 10360,29456,
-   10392,13584, 10400,17680, 10408,21776, 10416,25872, 10424,29968,
-   10456,14096, 10464,18192, 10472,22288, 10480,26384, 10488,30480,
-   10520,14608, 10528,18704, 10536,22800, 10544,26896, 10552,30992,
-   10576,11024, 10584,15120, 10592,19216, 10600,23312, 10608,27408,
-   10616,31504, 10640,11536, 10648,15632, 10656,19728, 10664,23824,
-   10672,27920, 10680,32016, 10704,12048, 10712,16144, 10720,20240,
-   10728,24336, 10736,28432, 10744,32528, 10776,12624, 10784,16720,
-   10792,20816, 10800,24912, 10808,29008, 10840,13136, 10848,17232,
-   10856,21328, 10864,25424, 10872,29520, 10904,13648, 10912,17744,
-   10920,21840, 10928,25936, 10936,30032, 10968,14160, 10976,18256,
-   10984,22352, 10992,26448, 11000,30544, 11032,14672, 11040,18768,
-   11048,22864, 11056,26960, 11064,31056, 11096,15184, 11104,19280,
-   11112,23376, 11120,27472, 11128,31568, 11152,11600, 11160,15696,
-   11168,19792, 11176,23888, 11184,27984, 11192,32080, 11216,12112,
-   11224,16208, 11232,20304, 11240,24400, 11248,28496, 11256,32592,
-   11288,12688, 11296,16784, 11304,20880, 11312,24976, 11320,29072,
-   11352,13200, 11360,17296, 11368,21392, 11376,25488, 11384,29584,
-   11416,13712, 11424,17808, 11432,21904, 11440,26000, 11448,30096,
-   11480,14224, 11488,18320, 11496,22416, 11504,26512, 11512,30608,
-   11544,14736, 11552,18832, 11560,22928, 11568,27024, 11576,31120,
-   11608,15248, 11616,19344, 11624,23440, 11632,27536, 11640,31632,
-   11672,15760, 11680,19856, 11688,23952, 11696,28048, 11704,32144,
-   11728,12176, 11736,16272, 11744,20368, 11752,24464, 11760,28560,
-   11768,32656, 11800,12752, 11808,16848, 11816,20944, 11824,25040,
-   11832,29136, 11864,13264, 11872,17360, 11880,21456, 11888,25552,
-   11896,29648, 11928,13776, 11936,17872, 11944,21968, 11952,26064,
-   11960,30160, 11992,14288, 12000,18384, 12008,22480, 12016,26576,
-   12024,30672, 12056,14800, 12064,18896, 12072,22992, 12080,27088,
-   12088,31184, 12120,15312, 12128,19408, 12136,23504, 12144,27600,
-   12152,31696, 12184,15824, 12192,19920, 12200,24016, 12208,28112,
-   12216,32208, 12248,16336, 12256,20432, 12264,24528, 12272,28624,
-   12280,32720, 12320,16408, 12328,20504, 12336,24600, 12344,28696,
-   12376,12824, 12384,16920, 12392,21016, 12400,25112, 12408,29208,
-   12440,13336, 12448,17432, 12456,21528, 12464,25624, 12472,29720,
-   12504,13848, 12512,17944, 12520,22040, 12528,26136, 12536,30232,
-   12568,14360, 12576,18456, 12584,22552, 12592,26648, 12600,30744,
-   12632,14872, 12640,18968, 12648,23064, 12656,27160, 12664,31256,
-   12696,15384, 12704,19480, 12712,23576, 12720,27672, 12728,31768,
-   12760,15896, 12768,19992, 12776,24088, 12784,28184, 12792,32280,
-   12832,16472, 12840,20568, 12848,24664, 12856,28760, 12896,16984,
-   12904,21080, 12912,25176, 12920,29272, 12952,13400, 12960,17496,
-   12968,21592, 12976,25688, 12984,29784, 13016,13912, 13024,18008,
-   13032,22104, 13040,26200, 13048,30296, 13080,14424, 13088,18520,
-   13096,22616, 13104,26712, 13112,30808, 13144,14936, 13152,19032,
-   13160,23128, 13168,27224, 13176,31320, 13208,15448, 13216,19544,
-   13224,23640, 13232,27736, 13240,31832, 13272,15960, 13280,20056,
-   13288,24152, 13296,28248, 13304,32344, 13344,16536, 13352,20632,
-   13360,24728, 13368,28824, 13408,17048, 13416,21144, 13424,25240,
-   13432,29336, 13472,17560, 13480,21656, 13488,25752, 13496,29848,
-   13528,13976, 13536,18072, 13544,22168, 13552,26264, 13560,30360,
-   13592,14488, 13600,18584, 13608,22680, 13616,26776, 13624,30872,
-   13656,15000, 13664,19096, 13672,23192, 13680,27288, 13688,31384,
-   13720,15512, 13728,19608, 13736,23704, 13744,27800, 13752,31896,
-   13784,16024, 13792,20120, 13800,24216, 13808,28312, 13816,32408,
-   13856,16600, 13864,20696, 13872,24792, 13880,28888, 13920,17112,
-   13928,21208, 13936,25304, 13944,29400, 13984,17624, 13992,21720,
-   14000,25816, 14008,29912, 14048,18136, 14056,22232, 14064,26328,
-   14072,30424, 14104,14552, 14112,18648, 14120,22744, 14128,26840,
-   14136,30936, 14168,15064, 14176,19160, 14184,23256, 14192,27352,
-   14200,31448, 14232,15576, 14240,19672, 14248,23768, 14256,27864,
-   14264,31960, 14296,16088, 14304,20184, 14312,24280, 14320,28376,
-   14328,32472, 14368,16664, 14376,20760, 14384,24856, 14392,28952,
-   14432,17176, 14440,21272, 14448,25368, 14456,29464, 14496,17688,
-   14504,21784, 14512,25880, 14520,29976, 14560,18200, 14568,22296,
-   14576,26392, 14584,30488, 14624,18712, 14632,22808, 14640,26904,
-   14648,31000, 14680,15128, 14688,19224, 14696,23320, 14704,27416,
-   14712,31512, 14744,15640, 14752,19736, 14760,23832, 14768,27928,
-   14776,32024, 14808,16152, 14816,20248, 14824,24344, 14832,28440,
-   14840,32536, 14880,16728, 14888,20824, 14896,24920, 14904,29016,
-   14944,17240, 14952,21336, 14960,25432, 14968,29528, 15008,17752,
-   15016,21848, 15024,25944, 15032,30040, 15072,18264, 15080,22360,
-   15088,26456, 15096,30552, 15136,18776, 15144,22872, 15152,26968,
-   15160,31064, 15200,19288, 15208,23384, 15216,27480, 15224,31576,
-   15256,15704, 15264,19800, 15272,23896, 15280,27992, 15288,32088,
-   15320,16216, 15328,20312, 15336,24408, 15344,28504, 15352,32600,
-   15392,16792, 15400,20888, 15408,24984, 15416,29080, 15456,17304,
-   15464,21400, 15472,25496, 15480,29592, 15520,17816, 15528,21912,
-   15536,26008, 15544,30104, 15584,18328, 15592,22424, 15600,26520,
-   15608,30616, 15648,18840, 15656,22936, 15664,27032, 15672,31128,
-   15712,19352, 15720,23448, 15728,27544, 15736,31640, 15776,19864,
-   15784,23960, 15792,28056, 15800,32152, 15832,16280, 15840,20376,
-   15848,24472, 15856,28568, 15864,32664, 15904,16856, 15912,20952,
-   15920,25048, 15928,29144, 15968,17368, 15976,21464, 15984,25560,
-   15992,29656, 16032,17880, 16040,21976, 16048,26072, 16056,30168,
-   16096,18392, 16104,22488, 16112,26584, 16120,30680, 16160,18904,
-   16168,23000, 16176,27096, 16184,31192, 16224,19416, 16232,23512,
-   16240,27608, 16248,31704, 16288,19928, 16296,24024, 16304,28120,
-   16312,32216, 16352,20440, 16360,24536, 16368,28632, 16376,32728,
-   16424,20512, 16432,24608, 16440,28704, 16480,16928, 16488,21024,
-   16496,25120, 16504,29216, 16544,17440, 16552,21536, 16560,25632,
-   16568,29728, 16608,17952, 16616,22048, 16624,26144, 16632,30240,
-   16672,18464, 16680,22560, 16688,26656, 16696,30752, 16736,18976,
-   16744,23072, 16752,27168, 16760,31264, 16800,19488, 16808,23584,
-   16816,27680, 16824,31776, 16864,20000, 16872,24096, 16880,28192,
-   16888,32288, 16936,20576, 16944,24672, 16952,28768, 17000,21088,
-   17008,25184, 17016,29280, 17056,17504, 17064,21600, 17072,25696,
-   17080,29792, 17120,18016, 17128,22112, 17136,26208, 17144,30304,
-   17184,18528, 17192,22624, 17200,26720, 17208,30816, 17248,19040,
-   17256,23136, 17264,27232, 17272,31328, 17312,19552, 17320,23648,
-   17328,27744, 17336,31840, 17376,20064, 17384,24160, 17392,28256,
-   17400,32352, 17448,20640, 17456,24736, 17464,28832, 17512,21152,
-   17520,25248, 17528,29344, 17576,21664, 17584,25760, 17592,29856,
-   17632,18080, 17640,22176, 17648,26272, 17656,30368, 17696,18592,
-   17704,22688, 17712,26784, 17720,30880, 17760,19104, 17768,23200,
-   17776,27296, 17784,31392, 17824,19616, 17832,23712, 17840,27808,
-   17848,31904, 17888,20128, 17896,24224, 17904,28320, 17912,32416,
-   17960,20704, 17968,24800, 17976,28896, 18024,21216, 18032,25312,
-   18040,29408, 18088,21728, 18096,25824, 18104,29920, 18152,22240,
-   18160,26336, 18168,30432, 18208,18656, 18216,22752, 18224,26848,
-   18232,30944, 18272,19168, 18280,23264, 18288,27360, 18296,31456,
-   18336,19680, 18344,23776, 18352,27872, 18360,31968, 18400,20192,
-   18408,24288, 18416,28384, 18424,32480, 18472,20768, 18480,24864,
-   18488,28960, 18536,21280, 18544,25376, 18552,29472, 18600,21792,
-   18608,25888, 18616,29984, 18664,22304, 18672,26400, 18680,30496,
-   18728,22816, 18736,26912, 18744,31008, 18784,19232, 18792,23328,
-   18800,27424, 18808,31520, 18848,19744, 18856,23840, 18864,27936,
-   18872,32032, 18912,20256, 18920,24352, 18928,28448, 18936,32544,
-   18984,20832, 18992,24928, 19000,29024, 19048,21344, 19056,25440,
-   19064,29536, 19112,21856, 19120,25952, 19128,30048, 19176,22368,
-   19184,26464, 19192,30560, 19240,22880, 19248,26976, 19256,31072,
-   19304,23392, 19312,27488, 19320,31584, 19360,19808, 19368,23904,
-   19376,28000, 19384,32096, 19424,20320, 19432,24416, 19440,28512,
-   19448,32608, 19496,20896, 19504,24992, 19512,29088, 19560,21408,
-   19568,25504, 19576,29600, 19624,21920, 19632,26016, 19640,30112,
-   19688,22432, 19696,26528, 19704,30624, 19752,22944, 19760,27040,
-   19768,31136, 19816,23456, 19824,27552, 19832,31648, 19880,23968,
-   19888,28064, 19896,32160, 19936,20384, 19944,24480, 19952,28576,
-   19960,32672, 20008,20960, 20016,25056, 20024,29152, 20072,21472,
-   20080,25568, 20088,29664, 20136,21984, 20144,26080, 20152,30176,
-   20200,22496, 20208,26592, 20216,30688, 20264,23008, 20272,27104,
-   20280,31200, 20328,23520, 20336,27616, 20344,31712, 20392,24032,
-   20400,28128, 20408,32224, 20456,24544, 20464,28640, 20472,32736,
-   20528,24616, 20536,28712, 20584,21032, 20592,25128, 20600,29224,
-   20648,21544, 20656,25640, 20664,29736, 20712,22056, 20720,26152,
-   20728,30248, 20776,22568, 20784,26664, 20792,30760, 20840,23080,
-   20848,27176, 20856,31272, 20904,23592, 20912,27688, 20920,31784,
-   20968,24104, 20976,28200, 20984,32296, 21040,24680, 21048,28776,
-   21104,25192, 21112,29288, 21160,21608, 21168,25704, 21176,29800,
-   21224,22120, 21232,26216, 21240,30312, 21288,22632, 21296,26728,
-   21304,30824, 21352,23144, 21360,27240, 21368,31336, 21416,23656,
-   21424,27752, 21432,31848, 21480,24168, 21488,28264, 21496,32360,
-   21552,24744, 21560,28840, 21616,25256, 21624,29352, 21680,25768,
-   21688,29864, 21736,22184, 21744,26280, 21752,30376, 21800,22696,
-   21808,26792, 21816,30888, 21864,23208, 21872,27304, 21880,31400,
-   21928,23720, 21936,27816, 21944,31912, 21992,24232, 22000,28328,
-   22008,32424, 22064,24808, 22072,28904, 22128,25320, 22136,29416,
-   22192,25832, 22200,29928, 22256,26344, 22264,30440, 22312,22760,
-   22320,26856, 22328,30952, 22376,23272, 22384,27368, 22392,31464,
-   22440,23784, 22448,27880, 22456,31976, 22504,24296, 22512,28392,
-   22520,32488, 22576,24872, 22584,28968, 22640,25384, 22648,29480,
-   22704,25896, 22712,29992, 22768,26408, 22776,30504, 22832,26920,
-   22840,31016, 22888,23336, 22896,27432, 22904,31528, 22952,23848,
-   22960,27944, 22968,32040, 23016,24360, 23024,28456, 23032,32552,
-   23088,24936, 23096,29032, 23152,25448, 23160,29544, 23216,25960,
-   23224,30056, 23280,26472, 23288,30568, 23344,26984, 23352,31080,
-   23408,27496, 23416,31592, 23464,23912, 23472,28008, 23480,32104,
-   23528,24424, 23536,28520, 23544,32616, 23600,25000, 23608,29096,
-   23664,25512, 23672,29608, 23728,26024, 23736,30120, 23792,26536,
-   23800,30632, 23856,27048, 23864,31144, 23920,27560, 23928,31656,
-   23984,28072, 23992,32168, 24040,24488, 24048,28584, 24056,32680,
-   24112,25064, 24120,29160, 24176,25576, 24184,29672, 24240,26088,
-   24248,30184, 24304,26600, 24312,30696, 24368,27112, 24376,31208,
-   24432,27624, 24440,31720, 24496,28136, 24504,32232, 24560,28648,
-   24568,32744, 24632,28720, 24688,25136, 24696,29232, 24752,25648,
-   24760,29744, 24816,26160, 24824,30256, 24880,26672, 24888,30768,
-   24944,27184, 24952,31280, 25008,27696, 25016,31792, 25072,28208,
-   25080,32304, 25144,28784, 25208,29296, 25264,25712, 25272,29808,
-   25328,26224, 25336,30320, 25392,26736, 25400,30832, 25456,27248,
-   25464,31344, 25520,27760, 25528,31856, 25584,28272, 25592,32368,
-   25656,28848, 25720,29360, 25784,29872, 25840,26288, 25848,30384,
-   25904,26800, 25912,30896, 25968,27312, 25976,31408, 26032,27824,
-   26040,31920, 26096,28336, 26104,32432, 26168,28912, 26232,29424,
-   26296,29936, 26360,30448, 26416,26864, 26424,30960, 26480,27376,
-   26488,31472, 26544,27888, 26552,31984, 26608,28400, 26616,32496,
-   26680,28976, 26744,29488, 26808,30000, 26872,30512, 26936,31024,
-   26992,27440, 27000,31536, 27056,27952, 27064,32048, 27120,28464,
-   27128,32560, 27192,29040, 27256,29552, 27320,30064, 27384,30576,
-   27448,31088, 27512,31600, 27568,28016, 27576,32112, 27632,28528,
-   27640,32624, 27704,29104, 27768,29616, 27832,30128, 27896,30640,
-   27960,31152, 28024,31664, 28088,32176, 28144,28592, 28152,32688,
-   28216,29168, 28280,29680, 28344,30192, 28408,30704, 28472,31216,
-   28536,31728, 28600,32240, 28664,32752, 28792,29240, 28856,29752,
-   28920,30264, 28984,30776, 29048,31288, 29112,31800, 29176,32312,
-   29368,29816, 29432,30328, 29496,30840, 29560,31352, 29624,31864,
-   29688,32376, 29944,30392, 30008,30904, 30072,31416, 30136,31928,
-   30200,32440, 30520,30968, 30584,31480, 30648,31992, 30712,32504,
-   31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632,
-   32248,32696
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
-
-const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH] =
-{
-   /* radix 4, size 12 */
-   8,64, 16,32, 24,96, 40,80, 56,112, 88,104
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
-const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH] =
-{
-   /* 4x2, size 24 */
-   8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144,
-   88,208, 104,176, 120,240, 152,200, 184,232
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
-const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH] =
-{
-   /* radix 4, size 56 */
-   8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352,
-   112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432,
-   232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
-const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH] =
-{
-   /* 4x2, size 112 */
-   8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192,
-   104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608,
-   208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912,
-   328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624,
-   472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968,
-   664,808, 696,936, 728,872, 760,1000, 824,920, 888,984
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
-const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH] =
-{
-   /* radix 4, size 240 */
-   8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640,
-   88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320,
-   168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960,
-   248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672,
-   344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376,
-   432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040,
-   536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912,
-   632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488,
-   752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456,
-   880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520,
-   1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928,
-   1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832,
-   1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816,
-   1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
-const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH] =
-{
-   /* 4x2, size 480 */
-   8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280,
-   88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640,
-   168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944,
-   240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648,
-   328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216,
-   408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960,
-   488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616,
-   584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184,
-   664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976,
-   752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400,
-   848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784,
-   944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064,
-   1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344,
-   1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728,
-   1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152,
-   1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920,
-   1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024,
-   1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376,
-   1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480,
-   1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696,
-   1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824,
-   1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312,
-   2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464,
-   2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912,
-   2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624,
-   2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008,
-   2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072,
-   3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928,
-   3512,3800, 3576,4056, 3704,3896, 3832,4024
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
-const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] =
-{
-    /* radix 4, size 992 */
-    8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608,
-    80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352,
-    144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864,
-    208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176,
-    280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688,
-    344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528,
-    416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040,
-    480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088,
-    552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696,
-    624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392,
-    696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904,
-    760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360,
-    840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544,
-    912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008,
-    984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080,
-    1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688,
-    1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432,
-    1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944,
-    1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304,
-    1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696,
-    1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536,
-    1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048,
-    1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168,
-    1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776,
-    1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960,
-    1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320,
-    1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784,
-    1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624,
-    1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112,
-    2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184,
-    2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368,
-    2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832,
-    2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264,
-    2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728,
-    2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008,
-    2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224,
-    2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664,
-    2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944,
-    2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352,
-    2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792,
-    2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072,
-    3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168,
-    3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400,
-    3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936,
-    3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784,
-    3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552,
-    3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208,
-    3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792,
-    3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000,
-    3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848,
-    3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664,
-    4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176,
-    4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384,
-    4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256,
-    4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512,
-    4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192,
-    4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496,
-    4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368,
-    4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112,
-    5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720,
-    5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312,
-    5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080,
-    5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504,
-    5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888,
-    6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680,
-    6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808,
-    6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512,
-    6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736,
-    7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
-const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] =
-{
-    /* 4x2, size 1984 */
-    8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024,
-    72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512,
-    136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848,
-    192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680,
-    248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400,
-    312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520,
-    368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816,
-    424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080,
-    480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416,
-    544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248,
-    600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736,
-    664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856,
-    720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576,
-    784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408,
-    840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744,
-    904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232,
-    960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064,
-    1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208,
-    1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232,
-    1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720,
-    1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840,
-    1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560,
-    1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584,
-    1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072,
-    1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904,
-    1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240,
-    1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264,
-    1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752,
-    1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776,
-    1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496,
-    1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520,
-    1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008,
-    1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032,
-    2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272,
-    2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296,
-    2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784,
-    2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808,
-    2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432,
-    2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456,
-    2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944,
-    2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968,
-    2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496,
-    2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520,
-    2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888,
-    2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608,
-    2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536,
-    2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024,
-    2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048,
-    3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192,
-    3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408,
-    3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848,
-    3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872,
-    3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496,
-    3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712,
-    3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080,
-    3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416,
-    3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344,
-    3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024,
-    3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000,
-    3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624,
-    3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840,
-    3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208,
-    4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304,
-    4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280,
-    4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672,
-    4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888,
-    4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392,
-    4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072,
-    4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096,
-    4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288,
-    4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504,
-    4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776,
-    4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688,
-    4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664,
-    4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248,
-    5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272,
-    5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392,
-    5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736,
-    5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952,
-    5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648,
-    5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992,
-    5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016,
-    5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424,
-    5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008,
-    5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888,
-    5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680,
-    5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264,
-    6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240,
-    6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264,
-    6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848,
-    6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728,
-    6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520,
-    6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104,
-    6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080,
-    6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392,
-    6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976,
-    6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856,
-    6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648,
-    7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232,
-    7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112,
-    7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328,
-    7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864,
-    7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560,
-    7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632,
-    7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096,
-    7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528,
-    7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600,
-    7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064,
-    7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832,
-    8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296,
-    8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368,
-    8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272,
-    8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736,
-    8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600,
-    8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064,
-    8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136,
-    8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400,
-    8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960,
-    8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608,
-    9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240,
-    9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312,
-    9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824,
-    9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616,
-    9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128,
-    9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200,
-    9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560,
-    9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072,
-    10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816,
-    10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328,
-    10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840,
-    10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584,
-    10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048,
-    10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504,
-    10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992,
-    10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688,
-    11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296,
-    11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952,
-    11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672,
-    11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232,
-    11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080,
-    11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848,
-    12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336,
-    12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616,
-    12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152,
-    12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024,
-    13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280,
-    13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680,
-    13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576,
-    14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344,
-    14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184,
-    14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
-const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] =
-{
-    /* radix 4, size 4032 */
-    8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048,
-    72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720,
-    128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312,
-    184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552,
-    240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608,
-    296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136,
-    352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728,
-    408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968,
-    464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640,
-    528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304,
-    584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976,
-    640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568,
-    696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808,
-    752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248,
-    816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912,
-    872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368,
-    928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032,
-    984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320,
-    1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176,
-    1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464,
-    1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632,
-    1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776,
-    1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832,
-    1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688,
-    1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976,
-    1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144,
-    1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288,
-    1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576,
-    1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432,
-    1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720,
-    1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888,
-    1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032,
-    1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088,
-    1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944,
-    1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232,
-    1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400,
-    1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544,
-    2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256,
-    2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496,
-    2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784,
-    2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376,
-    2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232,
-    2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152,
-    2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008,
-    2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296,
-    2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888,
-    2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744,
-    2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896,
-    2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560,
-    2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728,
-    2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392,
-    2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680,
-    2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312,
-    2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976,
-    2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432,
-    2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288,
-    3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576,
-    3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480,
-    3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720,
-    3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312,
-    3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840,
-    3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896,
-    3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136,
-    3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424,
-    3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016,
-    3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872,
-    3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024,
-    3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688,
-    3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856,
-    3728,9664, 3736,26048, 3744,5568, 3752,21952, 3760,13760, 3768,30144,
-    3784,19904, 3792,11712, 3800,28096, 3808,7616, 3816,24000, 3824,15808,
-    3832,32192, 3848,17344, 3856,9152, 3864,25536, 3872,5056, 3880,21440,
-    3888,13248, 3896,29632, 3912,19392, 3920,11200, 3928,27584, 3936,7104,
-    3944,23488, 3952,15296, 3960,31680, 3976,18368, 3984,10176, 3992,26560,
-    4000,6080, 4008,22464, 4016,14272, 4024,30656, 4040,20416, 4048,12224,
-    4056,28608, 4064,8128, 4072,24512, 4080,16320, 4088,32704, 4104,16416,
-    4112,8224, 4120,24608, 4136,20512, 4144,12320, 4152,28704, 4168,18464,
-    4176,10272, 4184,26656, 4192,6176, 4200,22560, 4208,14368, 4216,30752,
-    4232,17440, 4240,9248, 4248,25632, 4256,5152, 4264,21536, 4272,13344,
-    4280,29728, 4296,19488, 4304,11296, 4312,27680, 4320,7200, 4328,23584,
-    4336,15392, 4344,31776, 4360,16928, 4368,8736, 4376,25120, 4384,4640,
-    4392,21024, 4400,12832, 4408,29216, 4424,18976, 4432,10784, 4440,27168,
-    4448,6688, 4456,23072, 4464,14880, 4472,31264, 4488,17952, 4496,9760,
-    4504,26144, 4512,5664, 4520,22048, 4528,13856, 4536,30240, 4552,20000,
-    4560,11808, 4568,28192, 4576,7712, 4584,24096, 4592,15904, 4600,32288,
-    4616,16672, 4624,8480, 4632,24864, 4648,20768, 4656,12576, 4664,28960,
-    4680,18720, 4688,10528, 4696,26912, 4704,6432, 4712,22816, 4720,14624,
-    4728,31008, 4744,17696, 4752,9504, 4760,25888, 4768,5408, 4776,21792,
-    4784,13600, 4792,29984, 4808,19744, 4816,11552, 4824,27936, 4832,7456,
-    4840,23840, 4848,15648, 4856,32032, 4872,17184, 4880,8992, 4888,25376,
-    4904,21280, 4912,13088, 4920,29472, 4936,19232, 4944,11040, 4952,27424,
-    4960,6944, 4968,23328, 4976,15136, 4984,31520, 5000,18208, 5008,10016,
-    5016,26400, 5024,5920, 5032,22304, 5040,14112, 5048,30496, 5064,20256,
-    5072,12064, 5080,28448, 5088,7968, 5096,24352, 5104,16160, 5112,32544,
-    5128,16544, 5136,8352, 5144,24736, 5160,20640, 5168,12448, 5176,28832,
-    5192,18592, 5200,10400, 5208,26784, 5216,6304, 5224,22688, 5232,14496,
-    5240,30880, 5256,17568, 5264,9376, 5272,25760, 5288,21664, 5296,13472,
-    5304,29856, 5320,19616, 5328,11424, 5336,27808, 5344,7328, 5352,23712,
-    5360,15520, 5368,31904, 5384,17056, 5392,8864, 5400,25248, 5416,21152,
-    5424,12960, 5432,29344, 5448,19104, 5456,10912, 5464,27296, 5472,6816,
-    5480,23200, 5488,15008, 5496,31392, 5512,18080, 5520,9888, 5528,26272,
-    5536,5792, 5544,22176, 5552,13984, 5560,30368, 5576,20128, 5584,11936,
-    5592,28320, 5600,7840, 5608,24224, 5616,16032, 5624,32416, 5640,16800,
-    5648,8608, 5656,24992, 5672,20896, 5680,12704, 5688,29088, 5704,18848,
-    5712,10656, 5720,27040, 5728,6560, 5736,22944, 5744,14752, 5752,31136,
-    5768,17824, 5776,9632, 5784,26016, 5800,21920, 5808,13728, 5816,30112,
-    5832,19872, 5840,11680, 5848,28064, 5856,7584, 5864,23968, 5872,15776,
-    5880,32160, 5896,17312, 5904,9120, 5912,25504, 5928,21408, 5936,13216,
-    5944,29600, 5960,19360, 5968,11168, 5976,27552, 5984,7072, 5992,23456,
-    6000,15264, 6008,31648, 6024,18336, 6032,10144, 6040,26528, 6056,22432,
-    6064,14240, 6072,30624, 6088,20384, 6096,12192, 6104,28576, 6112,8096,
-    6120,24480, 6128,16288, 6136,32672, 6152,16480, 6160,8288, 6168,24672,
-    6184,20576, 6192,12384, 6200,28768, 6216,18528, 6224,10336, 6232,26720,
-    6248,22624, 6256,14432, 6264,30816, 6280,17504, 6288,9312, 6296,25696,
-    6312,21600, 6320,13408, 6328,29792, 6344,19552, 6352,11360, 6360,27744,
-    6368,7264, 6376,23648, 6384,15456, 6392,31840, 6408,16992, 6416,8800,
-    6424,25184, 6440,21088, 6448,12896, 6456,29280, 6472,19040, 6480,10848,
-    6488,27232, 6496,6752, 6504,23136, 6512,14944, 6520,31328, 6536,18016,
-    6544,9824, 6552,26208, 6568,22112, 6576,13920, 6584,30304, 6600,20064,
-    6608,11872, 6616,28256, 6624,7776, 6632,24160, 6640,15968, 6648,32352,
-    6664,16736, 6672,8544, 6680,24928, 6696,20832, 6704,12640, 6712,29024,
-    6728,18784, 6736,10592, 6744,26976, 6760,22880, 6768,14688, 6776,31072,
-    6792,17760, 6800,9568, 6808,25952, 6824,21856, 6832,13664, 6840,30048,
-    6856,19808, 6864,11616, 6872,28000, 6880,7520, 6888,23904, 6896,15712,
-    6904,32096, 6920,17248, 6928,9056, 6936,25440, 6952,21344, 6960,13152,
-    6968,29536, 6984,19296, 6992,11104, 7000,27488, 7016,23392, 7024,15200,
-    7032,31584, 7048,18272, 7056,10080, 7064,26464, 7080,22368, 7088,14176,
-    7096,30560, 7112,20320, 7120,12128, 7128,28512, 7136,8032, 7144,24416,
-    7152,16224, 7160,32608, 7176,16608, 7184,8416, 7192,24800, 7208,20704,
-    7216,12512, 7224,28896, 7240,18656, 7248,10464, 7256,26848, 7272,22752,
-    7280,14560, 7288,30944, 7304,17632, 7312,9440, 7320,25824, 7336,21728,
-    7344,13536, 7352,29920, 7368,19680, 7376,11488, 7384,27872, 7400,23776,
-    7408,15584, 7416,31968, 7432,17120, 7440,8928, 7448,25312, 7464,21216,
-    7472,13024, 7480,29408, 7496,19168, 7504,10976, 7512,27360, 7528,23264,
-    7536,15072, 7544,31456, 7560,18144, 7568,9952, 7576,26336, 7592,22240,
-    7600,14048, 7608,30432, 7624,20192, 7632,12000, 7640,28384, 7648,7904,
-    7656,24288, 7664,16096, 7672,32480, 7688,16864, 7696,8672, 7704,25056,
-    7720,20960, 7728,12768, 7736,29152, 7752,18912, 7760,10720, 7768,27104,
-    7784,23008, 7792,14816, 7800,31200, 7816,17888, 7824,9696, 7832,26080,
-    7848,21984, 7856,13792, 7864,30176, 7880,19936, 7888,11744, 7896,28128,
-    7912,24032, 7920,15840, 7928,32224, 7944,17376, 7952,9184, 7960,25568,
-    7976,21472, 7984,13280, 7992,29664, 8008,19424, 8016,11232, 8024,27616,
-    8040,23520, 8048,15328, 8056,31712, 8072,18400, 8080,10208, 8088,26592,
-    8104,22496, 8112,14304, 8120,30688, 8136,20448, 8144,12256, 8152,28640,
-    8168,24544, 8176,16352, 8184,32736, 8200,16400, 8216,24592, 8232,20496,
-    8240,12304, 8248,28688, 8264,18448, 8272,10256, 8280,26640, 8296,22544,
-    8304,14352, 8312,30736, 8328,17424, 8336,9232, 8344,25616, 8360,21520,
-    8368,13328, 8376,29712, 8392,19472, 8400,11280, 8408,27664, 8424,23568,
-    8432,15376, 8440,31760, 8456,16912, 8464,8720, 8472,25104, 8488,21008,
-    8496,12816, 8504,29200, 8520,18960, 8528,10768, 8536,27152, 8552,23056,
-    8560,14864, 8568,31248, 8584,17936, 8592,9744, 8600,26128, 8616,22032,
-    8624,13840, 8632,30224, 8648,19984, 8656,11792, 8664,28176, 8680,24080,
-    8688,15888, 8696,32272, 8712,16656, 8728,24848, 8744,20752, 8752,12560,
-    8760,28944, 8776,18704, 8784,10512, 8792,26896, 8808,22800, 8816,14608,
-    8824,30992, 8840,17680, 8848,9488, 8856,25872, 8872,21776, 8880,13584,
-    8888,29968, 8904,19728, 8912,11536, 8920,27920, 8936,23824, 8944,15632,
-    8952,32016, 8968,17168, 8984,25360, 9000,21264, 9008,13072, 9016,29456,
-    9032,19216, 9040,11024, 9048,27408, 9064,23312, 9072,15120, 9080,31504,
-    9096,18192, 9104,10000, 9112,26384, 9128,22288, 9136,14096, 9144,30480,
-    9160,20240, 9168,12048, 9176,28432, 9192,24336, 9200,16144, 9208,32528,
-    9224,16528, 9240,24720, 9256,20624, 9264,12432, 9272,28816, 9288,18576,
-    9296,10384, 9304,26768, 9320,22672, 9328,14480, 9336,30864, 9352,17552,
-    9368,25744, 9384,21648, 9392,13456, 9400,29840, 9416,19600, 9424,11408,
-    9432,27792, 9448,23696, 9456,15504, 9464,31888, 9480,17040, 9496,25232,
-    9512,21136, 9520,12944, 9528,29328, 9544,19088, 9552,10896, 9560,27280,
-    9576,23184, 9584,14992, 9592,31376, 9608,18064, 9616,9872, 9624,26256,
-    9640,22160, 9648,13968, 9656,30352, 9672,20112, 9680,11920, 9688,28304,
-    9704,24208, 9712,16016, 9720,32400, 9736,16784, 9752,24976, 9768,20880,
-    9776,12688, 9784,29072, 9800,18832, 9808,10640, 9816,27024, 9832,22928,
-    9840,14736, 9848,31120, 9864,17808, 9880,26000, 9896,21904, 9904,13712,
-    9912,30096, 9928,19856, 9936,11664, 9944,28048, 9960,23952, 9968,15760,
-    9976,32144, 9992,17296, 10008,25488, 10024,21392, 10032,13200, 10040,29584,
-    10056,19344, 10064,11152, 10072,27536, 10088,23440, 10096,15248, 10104,31632,
-    10120,18320, 10136,26512, 10152,22416, 10160,14224, 10168,30608, 10184,20368,
-    10192,12176, 10200,28560, 10216,24464, 10224,16272, 10232,32656, 10248,16464,
-    10264,24656, 10280,20560, 10288,12368, 10296,28752, 10312,18512, 10328,26704,
-    10344,22608, 10352,14416, 10360,30800, 10376,17488, 10392,25680, 10408,21584,
-    10416,13392, 10424,29776, 10440,19536, 10448,11344, 10456,27728, 10472,23632,
-    10480,15440, 10488,31824, 10504,16976, 10520,25168, 10536,21072, 10544,12880,
-    10552,29264, 10568,19024, 10576,10832, 10584,27216, 10600,23120, 10608,14928,
-    10616,31312, 10632,18000, 10648,26192, 10664,22096, 10672,13904, 10680,30288,
-    10696,20048, 10704,11856, 10712,28240, 10728,24144, 10736,15952, 10744,32336,
-    10760,16720, 10776,24912, 10792,20816, 10800,12624, 10808,29008, 10824,18768,
-    10840,26960, 10856,22864, 10864,14672, 10872,31056, 10888,17744, 10904,25936,
-    10920,21840, 10928,13648, 10936,30032, 10952,19792, 10960,11600, 10968,27984,
-    10984,23888, 10992,15696, 11000,32080, 11016,17232, 11032,25424, 11048,21328,
-    11056,13136, 11064,29520, 11080,19280, 11096,27472, 11112,23376, 11120,15184,
-    11128,31568, 11144,18256, 11160,26448, 11176,22352, 11184,14160, 11192,30544,
-    11208,20304, 11216,12112, 11224,28496, 11240,24400, 11248,16208, 11256,32592,
-    11272,16592, 11288,24784, 11304,20688, 11312,12496, 11320,28880, 11336,18640,
-    11352,26832, 11368,22736, 11376,14544, 11384,30928, 11400,17616, 11416,25808,
-    11432,21712, 11440,13520, 11448,29904, 11464,19664, 11480,27856, 11496,23760,
-    11504,15568, 11512,31952, 11528,17104, 11544,25296, 11560,21200, 11568,13008,
-    11576,29392, 11592,19152, 11608,27344, 11624,23248, 11632,15056, 11640,31440,
-    11656,18128, 11672,26320, 11688,22224, 11696,14032, 11704,30416, 11720,20176,
-    11728,11984, 11736,28368, 11752,24272, 11760,16080, 11768,32464, 11784,16848,
-    11800,25040, 11816,20944, 11824,12752, 11832,29136, 11848,18896, 11864,27088,
-    11880,22992, 11888,14800, 11896,31184, 11912,17872, 11928,26064, 11944,21968,
-    11952,13776, 11960,30160, 11976,19920, 11992,28112, 12008,24016, 12016,15824,
-    12024,32208, 12040,17360, 12056,25552, 12072,21456, 12080,13264, 12088,29648,
-    12104,19408, 12120,27600, 12136,23504, 12144,15312, 12152,31696, 12168,18384,
-    12184,26576, 12200,22480, 12208,14288, 12216,30672, 12232,20432, 12248,28624,
-    12264,24528, 12272,16336, 12280,32720, 12296,16432, 12312,24624, 12328,20528,
-    12344,28720, 12360,18480, 12376,26672, 12392,22576, 12400,14384, 12408,30768,
-    12424,17456, 12440,25648, 12456,21552, 12464,13360, 12472,29744, 12488,19504,
-    12504,27696, 12520,23600, 12528,15408, 12536,31792, 12552,16944, 12568,25136,
-    12584,21040, 12592,12848, 12600,29232, 12616,18992, 12632,27184, 12648,23088,
-    12656,14896, 12664,31280, 12680,17968, 12696,26160, 12712,22064, 12720,13872,
-    12728,30256, 12744,20016, 12760,28208, 12776,24112, 12784,15920, 12792,32304,
-    12808,16688, 12824,24880, 12840,20784, 12856,28976, 12872,18736, 12888,26928,
-    12904,22832, 12912,14640, 12920,31024, 12936,17712, 12952,25904, 12968,21808,
-    12976,13616, 12984,30000, 13000,19760, 13016,27952, 13032,23856, 13040,15664,
-    13048,32048, 13064,17200, 13080,25392, 13096,21296, 13112,29488, 13128,19248,
-    13144,27440, 13160,23344, 13168,15152, 13176,31536, 13192,18224, 13208,26416,
-    13224,22320, 13232,14128, 13240,30512, 13256,20272, 13272,28464, 13288,24368,
-    13296,16176, 13304,32560, 13320,16560, 13336,24752, 13352,20656, 13368,28848,
-    13384,18608, 13400,26800, 13416,22704, 13424,14512, 13432,30896, 13448,17584,
-    13464,25776, 13480,21680, 13496,29872, 13512,19632, 13528,27824, 13544,23728,
-    13552,15536, 13560,31920, 13576,17072, 13592,25264, 13608,21168, 13624,29360,
-    13640,19120, 13656,27312, 13672,23216, 13680,15024, 13688,31408, 13704,18096,
-    13720,26288, 13736,22192, 13744,14000, 13752,30384, 13768,20144, 13784,28336,
-    13800,24240, 13808,16048, 13816,32432, 13832,16816, 13848,25008, 13864,20912,
-    13880,29104, 13896,18864, 13912,27056, 13928,22960, 13936,14768, 13944,31152,
-    13960,17840, 13976,26032, 13992,21936, 14008,30128, 14024,19888, 14040,28080,
-    14056,23984, 14064,15792, 14072,32176, 14088,17328, 14104,25520, 14120,21424,
-    14136,29616, 14152,19376, 14168,27568, 14184,23472, 14192,15280, 14200,31664,
-    14216,18352, 14232,26544, 14248,22448, 14264,30640, 14280,20400, 14296,28592,
-    14312,24496, 14320,16304, 14328,32688, 14344,16496, 14360,24688, 14376,20592,
-    14392,28784, 14408,18544, 14424,26736, 14440,22640, 14456,30832, 14472,17520,
-    14488,25712, 14504,21616, 14520,29808, 14536,19568, 14552,27760, 14568,23664,
-    14576,15472, 14584,31856, 14600,17008, 14616,25200, 14632,21104, 14648,29296,
-    14664,19056, 14680,27248, 14696,23152, 14704,14960, 14712,31344, 14728,18032,
-    14744,26224, 14760,22128, 14776,30320, 14792,20080, 14808,28272, 14824,24176,
-    14832,15984, 14840,32368, 14856,16752, 14872,24944, 14888,20848, 14904,29040,
-    14920,18800, 14936,26992, 14952,22896, 14968,31088, 14984,17776, 15000,25968,
-    15016,21872, 15032,30064, 15048,19824, 15064,28016, 15080,23920, 15088,15728,
-    15096,32112, 15112,17264, 15128,25456, 15144,21360, 15160,29552, 15176,19312,
-    15192,27504, 15208,23408, 15224,31600, 15240,18288, 15256,26480, 15272,22384,
-    15288,30576, 15304,20336, 15320,28528, 15336,24432, 15344,16240, 15352,32624,
-    15368,16624, 15384,24816, 15400,20720, 15416,28912, 15432,18672, 15448,26864,
-    15464,22768, 15480,30960, 15496,17648, 15512,25840, 15528,21744, 15544,29936,
-    15560,19696, 15576,27888, 15592,23792, 15608,31984, 15624,17136, 15640,25328,
-    15656,21232, 15672,29424, 15688,19184, 15704,27376, 15720,23280, 15736,31472,
-    15752,18160, 15768,26352, 15784,22256, 15800,30448, 15816,20208, 15832,28400,
-    15848,24304, 15856,16112, 15864,32496, 15880,16880, 15896,25072, 15912,20976,
-    15928,29168, 15944,18928, 15960,27120, 15976,23024, 15992,31216, 16008,17904,
-    16024,26096, 16040,22000, 16056,30192, 16072,19952, 16088,28144, 16104,24048,
-    16120,32240, 16136,17392, 16152,25584, 16168,21488, 16184,29680, 16200,19440,
-    16216,27632, 16232,23536, 16248,31728, 16264,18416, 16280,26608, 16296,22512,
-    16312,30704, 16328,20464, 16344,28656, 16360,24560, 16376,32752, 16408,24584,
-    16424,20488, 16440,28680, 16456,18440, 16472,26632, 16488,22536, 16504,30728,
-    16520,17416, 16536,25608, 16552,21512, 16568,29704, 16584,19464, 16600,27656,
-    16616,23560, 16632,31752, 16648,16904, 16664,25096, 16680,21000, 16696,29192,
-    16712,18952, 16728,27144, 16744,23048, 16760,31240, 16776,17928, 16792,26120,
-    16808,22024, 16824,30216, 16840,19976, 16856,28168, 16872,24072, 16888,32264,
-    16920,24840, 16936,20744, 16952,28936, 16968,18696, 16984,26888, 17000,22792,
-    17016,30984, 17032,17672, 17048,25864, 17064,21768, 17080,29960, 17096,19720,
-    17112,27912, 17128,23816, 17144,32008, 17176,25352, 17192,21256, 17208,29448,
-    17224,19208, 17240,27400, 17256,23304, 17272,31496, 17288,18184, 17304,26376,
-    17320,22280, 17336,30472, 17352,20232, 17368,28424, 17384,24328, 17400,32520,
-    17432,24712, 17448,20616, 17464,28808, 17480,18568, 17496,26760, 17512,22664,
-    17528,30856, 17560,25736, 17576,21640, 17592,29832, 17608,19592, 17624,27784,
-    17640,23688, 17656,31880, 17688,25224, 17704,21128, 17720,29320, 17736,19080,
-    17752,27272, 17768,23176, 17784,31368, 17800,18056, 17816,26248, 17832,22152,
-    17848,30344, 17864,20104, 17880,28296, 17896,24200, 17912,32392, 17944,24968,
-    17960,20872, 17976,29064, 17992,18824, 18008,27016, 18024,22920, 18040,31112,
-    18072,25992, 18088,21896, 18104,30088, 18120,19848, 18136,28040, 18152,23944,
-    18168,32136, 18200,25480, 18216,21384, 18232,29576, 18248,19336, 18264,27528,
-    18280,23432, 18296,31624, 18328,26504, 18344,22408, 18360,30600, 18376,20360,
-    18392,28552, 18408,24456, 18424,32648, 18456,24648, 18472,20552, 18488,28744,
-    18520,26696, 18536,22600, 18552,30792, 18584,25672, 18600,21576, 18616,29768,
-    18632,19528, 18648,27720, 18664,23624, 18680,31816, 18712,25160, 18728,21064,
-    18744,29256, 18760,19016, 18776,27208, 18792,23112, 18808,31304, 18840,26184,
-    18856,22088, 18872,30280, 18888,20040, 18904,28232, 18920,24136, 18936,32328,
-    18968,24904, 18984,20808, 19000,29000, 19032,26952, 19048,22856, 19064,31048,
-    19096,25928, 19112,21832, 19128,30024, 19144,19784, 19160,27976, 19176,23880,
-    19192,32072, 19224,25416, 19240,21320, 19256,29512, 19288,27464, 19304,23368,
-    19320,31560, 19352,26440, 19368,22344, 19384,30536, 19400,20296, 19416,28488,
-    19432,24392, 19448,32584, 19480,24776, 19496,20680, 19512,28872, 19544,26824,
-    19560,22728, 19576,30920, 19608,25800, 19624,21704, 19640,29896, 19672,27848,
-    19688,23752, 19704,31944, 19736,25288, 19752,21192, 19768,29384, 19800,27336,
-    19816,23240, 19832,31432, 19864,26312, 19880,22216, 19896,30408, 19912,20168,
-    19928,28360, 19944,24264, 19960,32456, 19992,25032, 20008,20936, 20024,29128,
-    20056,27080, 20072,22984, 20088,31176, 20120,26056, 20136,21960, 20152,30152,
-    20184,28104, 20200,24008, 20216,32200, 20248,25544, 20264,21448, 20280,29640,
-    20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664,
-    20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664,
-    20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688,
-    20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176,
-    20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200,
-    20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824,
-    21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848,
-    21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528,
-    21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552,
-    21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768,
-    21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352,
-    21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376,
-    21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048,
-    22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976,
-    22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656,
-    22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680,
-    22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752,
-    22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144,
-    22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360,
-    23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056,
-    23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496,
-    23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616,
-    23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928,
-    23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464,
-    23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064,
-    24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136,
-    24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600,
-    24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744,
-    24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208,
-    24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280,
-    25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928,
-    25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488,
-    25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848,
-    25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264,
-    26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128,
-    26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640,
-    26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784,
-    26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296,
-    27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992,
-    27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600,
-    27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448,
-    28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168,
-    28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776,
-    28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312,
-    29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568,
-    29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160,
-    30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376,
-    31480,32120, 31736,32632, 32248,32504
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
-/**
-  @par
-  Example code for Floating-point RFFT Twiddle factors Generation:
-  @par
-  <pre>TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' </pre>
-  @par
-  Real and Imag values are in interleaved fashion
-*/
-const float32_t twiddleCoef_rfft_32[32] = {
-    0.000000000f,  1.000000000f,
-    0.195090322f,  0.980785280f,
-    0.382683432f,  0.923879533f,
-    0.555570233f,  0.831469612f,
-    0.707106781f,  0.707106781f,
-    0.831469612f,  0.555570233f,
-    0.923879533f,  0.382683432f,
-    0.980785280f,  0.195090322f,
-    1.000000000f,  0.000000000f,
-    0.980785280f, -0.195090322f,
-    0.923879533f, -0.382683432f,
-    0.831469612f, -0.555570233f,
-    0.707106781f, -0.707106781f,
-    0.555570233f, -0.831469612f,
-    0.382683432f, -0.923879533f,
-    0.195090322f, -0.980785280f
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
-const float32_t twiddleCoef_rfft_64[64] = {
-    0.000000000000000f,  1.000000000000000f,
-    0.098017140329561f,  0.995184726672197f,
-    0.195090322016128f,  0.980785280403230f,
-    0.290284677254462f,  0.956940335732209f,
-    0.382683432365090f,  0.923879532511287f,
-    0.471396736825998f,  0.881921264348355f,
-    0.555570233019602f,  0.831469612302545f,
-    0.634393284163645f,  0.773010453362737f,
-    0.707106781186547f,  0.707106781186548f,
-    0.773010453362737f,  0.634393284163645f,
-    0.831469612302545f,  0.555570233019602f,
-    0.881921264348355f,  0.471396736825998f,
-    0.923879532511287f,  0.382683432365090f,
-    0.956940335732209f,  0.290284677254462f,
-    0.980785280403230f,  0.195090322016128f,
-    0.995184726672197f,  0.098017140329561f,
-    1.000000000000000f,  0.000000000000000f,
-    0.995184726672197f, -0.098017140329561f,
-    0.980785280403230f, -0.195090322016128f,
-    0.956940335732209f, -0.290284677254462f,
-    0.923879532511287f, -0.382683432365090f,
-    0.881921264348355f, -0.471396736825998f,
-    0.831469612302545f, -0.555570233019602f,
-    0.773010453362737f, -0.634393284163645f,
-    0.707106781186548f, -0.707106781186547f,
-    0.634393284163645f, -0.773010453362737f,
-    0.555570233019602f, -0.831469612302545f,
-    0.471396736825998f, -0.881921264348355f,
-    0.382683432365090f, -0.923879532511287f,
-    0.290284677254462f, -0.956940335732209f,
-    0.195090322016129f, -0.980785280403230f,
-    0.098017140329561f, -0.995184726672197f
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
-const float32_t twiddleCoef_rfft_128[128] = {
-    0.000000000f,  1.000000000f,
-    0.049067674f,  0.998795456f,
-    0.098017140f,  0.995184727f,
-    0.146730474f,  0.989176510f,
-    0.195090322f,  0.980785280f,
-    0.242980180f,  0.970031253f,
-    0.290284677f,  0.956940336f,
-    0.336889853f,  0.941544065f,
-    0.382683432f,  0.923879533f,
-    0.427555093f,  0.903989293f,
-    0.471396737f,  0.881921264f,
-    0.514102744f,  0.857728610f,
-    0.555570233f,  0.831469612f,
-    0.595699304f,  0.803207531f,
-    0.634393284f,  0.773010453f,
-    0.671558955f,  0.740951125f,
-    0.707106781f,  0.707106781f,
-    0.740951125f,  0.671558955f,
-    0.773010453f,  0.634393284f,
-    0.803207531f,  0.595699304f,
-    0.831469612f,  0.555570233f,
-    0.857728610f,  0.514102744f,
-    0.881921264f,  0.471396737f,
-    0.903989293f,  0.427555093f,
-    0.923879533f,  0.382683432f,
-    0.941544065f,  0.336889853f,
-    0.956940336f,  0.290284677f,
-    0.970031253f,  0.242980180f,
-    0.980785280f,  0.195090322f,
-    0.989176510f,  0.146730474f,
-    0.995184727f,  0.098017140f,
-    0.998795456f,  0.049067674f,
-    1.000000000f,  0.000000000f,
-    0.998795456f, -0.049067674f,
-    0.995184727f, -0.098017140f,
-    0.989176510f, -0.146730474f,
-    0.980785280f, -0.195090322f,
-    0.970031253f, -0.242980180f,
-    0.956940336f, -0.290284677f,
-    0.941544065f, -0.336889853f,
-    0.923879533f, -0.382683432f,
-    0.903989293f, -0.427555093f,
-    0.881921264f, -0.471396737f,
-    0.857728610f, -0.514102744f,
-    0.831469612f, -0.555570233f,
-    0.803207531f, -0.595699304f,
-    0.773010453f, -0.634393284f,
-    0.740951125f, -0.671558955f,
-    0.707106781f, -0.707106781f,
-    0.671558955f, -0.740951125f,
-    0.634393284f, -0.773010453f,
-    0.595699304f, -0.803207531f,
-    0.555570233f, -0.831469612f,
-    0.514102744f, -0.857728610f,
-    0.471396737f, -0.881921264f,
-    0.427555093f, -0.903989293f,
-    0.382683432f, -0.923879533f,
-    0.336889853f, -0.941544065f,
-    0.290284677f, -0.956940336f,
-    0.242980180f, -0.970031253f,
-    0.195090322f, -0.980785280f,
-    0.146730474f, -0.989176510f,
-    0.098017140f, -0.995184727f,
-    0.049067674f, -0.998795456f
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
-const float32_t twiddleCoef_rfft_256[256] = {
-    0.000000000f,  1.000000000f,
-    0.024541229f,  0.999698819f,
-    0.049067674f,  0.998795456f,
-    0.073564564f,  0.997290457f,
-    0.098017140f,  0.995184727f,
-    0.122410675f,  0.992479535f,
-    0.146730474f,  0.989176510f,
-    0.170961889f,  0.985277642f,
-    0.195090322f,  0.980785280f,
-    0.219101240f,  0.975702130f,
-    0.242980180f,  0.970031253f,
-    0.266712757f,  0.963776066f,
-    0.290284677f,  0.956940336f,
-    0.313681740f,  0.949528181f,
-    0.336889853f,  0.941544065f,
-    0.359895037f,  0.932992799f,
-    0.382683432f,  0.923879533f,
-    0.405241314f,  0.914209756f,
-    0.427555093f,  0.903989293f,
-    0.449611330f,  0.893224301f,
-    0.471396737f,  0.881921264f,
-    0.492898192f,  0.870086991f,
-    0.514102744f,  0.857728610f,
-    0.534997620f,  0.844853565f,
-    0.555570233f,  0.831469612f,
-    0.575808191f,  0.817584813f,
-    0.595699304f,  0.803207531f,
-    0.615231591f,  0.788346428f,
-    0.634393284f,  0.773010453f,
-    0.653172843f,  0.757208847f,
-    0.671558955f,  0.740951125f,
-    0.689540545f,  0.724247083f,
-    0.707106781f,  0.707106781f,
-    0.724247083f,  0.689540545f,
-    0.740951125f,  0.671558955f,
-    0.757208847f,  0.653172843f,
-    0.773010453f,  0.634393284f,
-    0.788346428f,  0.615231591f,
-    0.803207531f,  0.595699304f,
-    0.817584813f,  0.575808191f,
-    0.831469612f,  0.555570233f,
-    0.844853565f,  0.534997620f,
-    0.857728610f,  0.514102744f,
-    0.870086991f,  0.492898192f,
-    0.881921264f,  0.471396737f,
-    0.893224301f,  0.449611330f,
-    0.903989293f,  0.427555093f,
-    0.914209756f,  0.405241314f,
-    0.923879533f,  0.382683432f,
-    0.932992799f,  0.359895037f,
-    0.941544065f,  0.336889853f,
-    0.949528181f,  0.313681740f,
-    0.956940336f,  0.290284677f,
-    0.963776066f,  0.266712757f,
-    0.970031253f,  0.242980180f,
-    0.975702130f,  0.219101240f,
-    0.980785280f,  0.195090322f,
-    0.985277642f,  0.170961889f,
-    0.989176510f,  0.146730474f,
-    0.992479535f,  0.122410675f,
-    0.995184727f,  0.098017140f,
-    0.997290457f,  0.073564564f,
-    0.998795456f,  0.049067674f,
-    0.999698819f,  0.024541229f,
-    1.000000000f,  0.000000000f,
-    0.999698819f, -0.024541229f,
-    0.998795456f, -0.049067674f,
-    0.997290457f, -0.073564564f,
-    0.995184727f, -0.098017140f,
-    0.992479535f, -0.122410675f,
-    0.989176510f, -0.146730474f,
-    0.985277642f, -0.170961889f,
-    0.980785280f, -0.195090322f,
-    0.975702130f, -0.219101240f,
-    0.970031253f, -0.242980180f,
-    0.963776066f, -0.266712757f,
-    0.956940336f, -0.290284677f,
-    0.949528181f, -0.313681740f,
-    0.941544065f, -0.336889853f,
-    0.932992799f, -0.359895037f,
-    0.923879533f, -0.382683432f,
-    0.914209756f, -0.405241314f,
-    0.903989293f, -0.427555093f,
-    0.893224301f, -0.449611330f,
-    0.881921264f, -0.471396737f,
-    0.870086991f, -0.492898192f,
-    0.857728610f, -0.514102744f,
-    0.844853565f, -0.534997620f,
-    0.831469612f, -0.555570233f,
-    0.817584813f, -0.575808191f,
-    0.803207531f, -0.595699304f,
-    0.788346428f, -0.615231591f,
-    0.773010453f, -0.634393284f,
-    0.757208847f, -0.653172843f,
-    0.740951125f, -0.671558955f,
-    0.724247083f, -0.689540545f,
-    0.707106781f, -0.707106781f,
-    0.689540545f, -0.724247083f,
-    0.671558955f, -0.740951125f,
-    0.653172843f, -0.757208847f,
-    0.634393284f, -0.773010453f,
-    0.615231591f, -0.788346428f,
-    0.595699304f, -0.803207531f,
-    0.575808191f, -0.817584813f,
-    0.555570233f, -0.831469612f,
-    0.534997620f, -0.844853565f,
-    0.514102744f, -0.857728610f,
-    0.492898192f, -0.870086991f,
-    0.471396737f, -0.881921264f,
-    0.449611330f, -0.893224301f,
-    0.427555093f, -0.903989293f,
-    0.405241314f, -0.914209756f,
-    0.382683432f, -0.923879533f,
-    0.359895037f, -0.932992799f,
-    0.336889853f, -0.941544065f,
-    0.313681740f, -0.949528181f,
-    0.290284677f, -0.956940336f,
-    0.266712757f, -0.963776066f,
-    0.242980180f, -0.970031253f,
-    0.219101240f, -0.975702130f,
-    0.195090322f, -0.980785280f,
-    0.170961889f, -0.985277642f,
-    0.146730474f, -0.989176510f,
-    0.122410675f, -0.992479535f,
-    0.098017140f, -0.995184727f,
-    0.073564564f, -0.997290457f,
-    0.049067674f, -0.998795456f,
-    0.024541229f, -0.999698819f
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
-const float32_t twiddleCoef_rfft_512[512] = {
-    0.000000000f,  1.000000000f,
-    0.012271538f,  0.999924702f,
-    0.024541229f,  0.999698819f,
-    0.036807223f,  0.999322385f,
-    0.049067674f,  0.998795456f,
-    0.061320736f,  0.998118113f,
-    0.073564564f,  0.997290457f,
-    0.085797312f,  0.996312612f,
-    0.098017140f,  0.995184727f,
-    0.110222207f,  0.993906970f,
-    0.122410675f,  0.992479535f,
-    0.134580709f,  0.990902635f,
-    0.146730474f,  0.989176510f,
-    0.158858143f,  0.987301418f,
-    0.170961889f,  0.985277642f,
-    0.183039888f,  0.983105487f,
-    0.195090322f,  0.980785280f,
-    0.207111376f,  0.978317371f,
-    0.219101240f,  0.975702130f,
-    0.231058108f,  0.972939952f,
-    0.242980180f,  0.970031253f,
-    0.254865660f,  0.966976471f,
-    0.266712757f,  0.963776066f,
-    0.278519689f,  0.960430519f,
-    0.290284677f,  0.956940336f,
-    0.302005949f,  0.953306040f,
-    0.313681740f,  0.949528181f,
-    0.325310292f,  0.945607325f,
-    0.336889853f,  0.941544065f,
-    0.348418680f,  0.937339012f,
-    0.359895037f,  0.932992799f,
-    0.371317194f,  0.928506080f,
-    0.382683432f,  0.923879533f,
-    0.393992040f,  0.919113852f,
-    0.405241314f,  0.914209756f,
-    0.416429560f,  0.909167983f,
-    0.427555093f,  0.903989293f,
-    0.438616239f,  0.898674466f,
-    0.449611330f,  0.893224301f,
-    0.460538711f,  0.887639620f,
-    0.471396737f,  0.881921264f,
-    0.482183772f,  0.876070094f,
-    0.492898192f,  0.870086991f,
-    0.503538384f,  0.863972856f,
-    0.514102744f,  0.857728610f,
-    0.524589683f,  0.851355193f,
-    0.534997620f,  0.844853565f,
-    0.545324988f,  0.838224706f,
-    0.555570233f,  0.831469612f,
-    0.565731811f,  0.824589303f,
-    0.575808191f,  0.817584813f,
-    0.585797857f,  0.810457198f,
-    0.595699304f,  0.803207531f,
-    0.605511041f,  0.795836905f,
-    0.615231591f,  0.788346428f,
-    0.624859488f,  0.780737229f,
-    0.634393284f,  0.773010453f,
-    0.643831543f,  0.765167266f,
-    0.653172843f,  0.757208847f,
-    0.662415778f,  0.749136395f,
-    0.671558955f,  0.740951125f,
-    0.680600998f,  0.732654272f,
-    0.689540545f,  0.724247083f,
-    0.698376249f,  0.715730825f,
-    0.707106781f,  0.707106781f,
-    0.715730825f,  0.698376249f,
-    0.724247083f,  0.689540545f,
-    0.732654272f,  0.680600998f,
-    0.740951125f,  0.671558955f,
-    0.749136395f,  0.662415778f,
-    0.757208847f,  0.653172843f,
-    0.765167266f,  0.643831543f,
-    0.773010453f,  0.634393284f,
-    0.780737229f,  0.624859488f,
-    0.788346428f,  0.615231591f,
-    0.795836905f,  0.605511041f,
-    0.803207531f,  0.595699304f,
-    0.810457198f,  0.585797857f,
-    0.817584813f,  0.575808191f,
-    0.824589303f,  0.565731811f,
-    0.831469612f,  0.555570233f,
-    0.838224706f,  0.545324988f,
-    0.844853565f,  0.534997620f,
-    0.851355193f,  0.524589683f,
-    0.857728610f,  0.514102744f,
-    0.863972856f,  0.503538384f,
-    0.870086991f,  0.492898192f,
-    0.876070094f,  0.482183772f,
-    0.881921264f,  0.471396737f,
-    0.887639620f,  0.460538711f,
-    0.893224301f,  0.449611330f,
-    0.898674466f,  0.438616239f,
-    0.903989293f,  0.427555093f,
-    0.909167983f,  0.416429560f,
-    0.914209756f,  0.405241314f,
-    0.919113852f,  0.393992040f,
-    0.923879533f,  0.382683432f,
-    0.928506080f,  0.371317194f,
-    0.932992799f,  0.359895037f,
-    0.937339012f,  0.348418680f,
-    0.941544065f,  0.336889853f,
-    0.945607325f,  0.325310292f,
-    0.949528181f,  0.313681740f,
-    0.953306040f,  0.302005949f,
-    0.956940336f,  0.290284677f,
-    0.960430519f,  0.278519689f,
-    0.963776066f,  0.266712757f,
-    0.966976471f,  0.254865660f,
-    0.970031253f,  0.242980180f,
-    0.972939952f,  0.231058108f,
-    0.975702130f,  0.219101240f,
-    0.978317371f,  0.207111376f,
-    0.980785280f,  0.195090322f,
-    0.983105487f,  0.183039888f,
-    0.985277642f,  0.170961889f,
-    0.987301418f,  0.158858143f,
-    0.989176510f,  0.146730474f,
-    0.990902635f,  0.134580709f,
-    0.992479535f,  0.122410675f,
-    0.993906970f,  0.110222207f,
-    0.995184727f,  0.098017140f,
-    0.996312612f,  0.085797312f,
-    0.997290457f,  0.073564564f,
-    0.998118113f,  0.061320736f,
-    0.998795456f,  0.049067674f,
-    0.999322385f,  0.036807223f,
-    0.999698819f,  0.024541229f,
-    0.999924702f,  0.012271538f,
-    1.000000000f,  0.000000000f,
-    0.999924702f, -0.012271538f,
-    0.999698819f, -0.024541229f,
-    0.999322385f, -0.036807223f,
-    0.998795456f, -0.049067674f,
-    0.998118113f, -0.061320736f,
-    0.997290457f, -0.073564564f,
-    0.996312612f, -0.085797312f,
-    0.995184727f, -0.098017140f,
-    0.993906970f, -0.110222207f,
-    0.992479535f, -0.122410675f,
-    0.990902635f, -0.134580709f,
-    0.989176510f, -0.146730474f,
-    0.987301418f, -0.158858143f,
-    0.985277642f, -0.170961889f,
-    0.983105487f, -0.183039888f,
-    0.980785280f, -0.195090322f,
-    0.978317371f, -0.207111376f,
-    0.975702130f, -0.219101240f,
-    0.972939952f, -0.231058108f,
-    0.970031253f, -0.242980180f,
-    0.966976471f, -0.254865660f,
-    0.963776066f, -0.266712757f,
-    0.960430519f, -0.278519689f,
-    0.956940336f, -0.290284677f,
-    0.953306040f, -0.302005949f,
-    0.949528181f, -0.313681740f,
-    0.945607325f, -0.325310292f,
-    0.941544065f, -0.336889853f,
-    0.937339012f, -0.348418680f,
-    0.932992799f, -0.359895037f,
-    0.928506080f, -0.371317194f,
-    0.923879533f, -0.382683432f,
-    0.919113852f, -0.393992040f,
-    0.914209756f, -0.405241314f,
-    0.909167983f, -0.416429560f,
-    0.903989293f, -0.427555093f,
-    0.898674466f, -0.438616239f,
-    0.893224301f, -0.449611330f,
-    0.887639620f, -0.460538711f,
-    0.881921264f, -0.471396737f,
-    0.876070094f, -0.482183772f,
-    0.870086991f, -0.492898192f,
-    0.863972856f, -0.503538384f,
-    0.857728610f, -0.514102744f,
-    0.851355193f, -0.524589683f,
-    0.844853565f, -0.534997620f,
-    0.838224706f, -0.545324988f,
-    0.831469612f, -0.555570233f,
-    0.824589303f, -0.565731811f,
-    0.817584813f, -0.575808191f,
-    0.810457198f, -0.585797857f,
-    0.803207531f, -0.595699304f,
-    0.795836905f, -0.605511041f,
-    0.788346428f, -0.615231591f,
-    0.780737229f, -0.624859488f,
-    0.773010453f, -0.634393284f,
-    0.765167266f, -0.643831543f,
-    0.757208847f, -0.653172843f,
-    0.749136395f, -0.662415778f,
-    0.740951125f, -0.671558955f,
-    0.732654272f, -0.680600998f,
-    0.724247083f, -0.689540545f,
-    0.715730825f, -0.698376249f,
-    0.707106781f, -0.707106781f,
-    0.698376249f, -0.715730825f,
-    0.689540545f, -0.724247083f,
-    0.680600998f, -0.732654272f,
-    0.671558955f, -0.740951125f,
-    0.662415778f, -0.749136395f,
-    0.653172843f, -0.757208847f,
-    0.643831543f, -0.765167266f,
-    0.634393284f, -0.773010453f,
-    0.624859488f, -0.780737229f,
-    0.615231591f, -0.788346428f,
-    0.605511041f, -0.795836905f,
-    0.595699304f, -0.803207531f,
-    0.585797857f, -0.810457198f,
-    0.575808191f, -0.817584813f,
-    0.565731811f, -0.824589303f,
-    0.555570233f, -0.831469612f,
-    0.545324988f, -0.838224706f,
-    0.534997620f, -0.844853565f,
-    0.524589683f, -0.851355193f,
-    0.514102744f, -0.857728610f,
-    0.503538384f, -0.863972856f,
-    0.492898192f, -0.870086991f,
-    0.482183772f, -0.876070094f,
-    0.471396737f, -0.881921264f,
-    0.460538711f, -0.887639620f,
-    0.449611330f, -0.893224301f,
-    0.438616239f, -0.898674466f,
-    0.427555093f, -0.903989293f,
-    0.416429560f, -0.909167983f,
-    0.405241314f, -0.914209756f,
-    0.393992040f, -0.919113852f,
-    0.382683432f, -0.923879533f,
-    0.371317194f, -0.928506080f,
-    0.359895037f, -0.932992799f,
-    0.348418680f, -0.937339012f,
-    0.336889853f, -0.941544065f,
-    0.325310292f, -0.945607325f,
-    0.313681740f, -0.949528181f,
-    0.302005949f, -0.953306040f,
-    0.290284677f, -0.956940336f,
-    0.278519689f, -0.960430519f,
-    0.266712757f, -0.963776066f,
-    0.254865660f, -0.966976471f,
-    0.242980180f, -0.970031253f,
-    0.231058108f, -0.972939952f,
-    0.219101240f, -0.975702130f,
-    0.207111376f, -0.978317371f,
-    0.195090322f, -0.980785280f,
-    0.183039888f, -0.983105487f,
-    0.170961889f, -0.985277642f,
-    0.158858143f, -0.987301418f,
-    0.146730474f, -0.989176510f,
-    0.134580709f, -0.990902635f,
-    0.122410675f, -0.992479535f,
-    0.110222207f, -0.993906970f,
-    0.098017140f, -0.995184727f,
-    0.085797312f, -0.996312612f,
-    0.073564564f, -0.997290457f,
-    0.061320736f, -0.998118113f,
-    0.049067674f, -0.998795456f,
-    0.036807223f, -0.999322385f,
-    0.024541229f, -0.999698819f,
-    0.012271538f, -0.999924702f
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
-const float32_t twiddleCoef_rfft_1024[1024] = {
-    0.000000000f,  1.000000000f,
-    0.006135885f,  0.999981175f,
-    0.012271538f,  0.999924702f,
-    0.018406730f,  0.999830582f,
-    0.024541229f,  0.999698819f,
-    0.030674803f,  0.999529418f,
-    0.036807223f,  0.999322385f,
-    0.042938257f,  0.999077728f,
-    0.049067674f,  0.998795456f,
-    0.055195244f,  0.998475581f,
-    0.061320736f,  0.998118113f,
-    0.067443920f,  0.997723067f,
-    0.073564564f,  0.997290457f,
-    0.079682438f,  0.996820299f,
-    0.085797312f,  0.996312612f,
-    0.091908956f,  0.995767414f,
-    0.098017140f,  0.995184727f,
-    0.104121634f,  0.994564571f,
-    0.110222207f,  0.993906970f,
-    0.116318631f,  0.993211949f,
-    0.122410675f,  0.992479535f,
-    0.128498111f,  0.991709754f,
-    0.134580709f,  0.990902635f,
-    0.140658239f,  0.990058210f,
-    0.146730474f,  0.989176510f,
-    0.152797185f,  0.988257568f,
-    0.158858143f,  0.987301418f,
-    0.164913120f,  0.986308097f,
-    0.170961889f,  0.985277642f,
-    0.177004220f,  0.984210092f,
-    0.183039888f,  0.983105487f,
-    0.189068664f,  0.981963869f,
-    0.195090322f,  0.980785280f,
-    0.201104635f,  0.979569766f,
-    0.207111376f,  0.978317371f,
-    0.213110320f,  0.977028143f,
-    0.219101240f,  0.975702130f,
-    0.225083911f,  0.974339383f,
-    0.231058108f,  0.972939952f,
-    0.237023606f,  0.971503891f,
-    0.242980180f,  0.970031253f,
-    0.248927606f,  0.968522094f,
-    0.254865660f,  0.966976471f,
-    0.260794118f,  0.965394442f,
-    0.266712757f,  0.963776066f,
-    0.272621355f,  0.962121404f,
-    0.278519689f,  0.960430519f,
-    0.284407537f,  0.958703475f,
-    0.290284677f,  0.956940336f,
-    0.296150888f,  0.955141168f,
-    0.302005949f,  0.953306040f,
-    0.307849640f,  0.951435021f,
-    0.313681740f,  0.949528181f,
-    0.319502031f,  0.947585591f,
-    0.325310292f,  0.945607325f,
-    0.331106306f,  0.943593458f,
-    0.336889853f,  0.941544065f,
-    0.342660717f,  0.939459224f,
-    0.348418680f,  0.937339012f,
-    0.354163525f,  0.935183510f,
-    0.359895037f,  0.932992799f,
-    0.365612998f,  0.930766961f,
-    0.371317194f,  0.928506080f,
-    0.377007410f,  0.926210242f,
-    0.382683432f,  0.923879533f,
-    0.388345047f,  0.921514039f,
-    0.393992040f,  0.919113852f,
-    0.399624200f,  0.916679060f,
-    0.405241314f,  0.914209756f,
-    0.410843171f,  0.911706032f,
-    0.416429560f,  0.909167983f,
-    0.422000271f,  0.906595705f,
-    0.427555093f,  0.903989293f,
-    0.433093819f,  0.901348847f,
-    0.438616239f,  0.898674466f,
-    0.444122145f,  0.895966250f,
-    0.449611330f,  0.893224301f,
-    0.455083587f,  0.890448723f,
-    0.460538711f,  0.887639620f,
-    0.465976496f,  0.884797098f,
-    0.471396737f,  0.881921264f,
-    0.476799230f,  0.879012226f,
-    0.482183772f,  0.876070094f,
-    0.487550160f,  0.873094978f,
-    0.492898192f,  0.870086991f,
-    0.498227667f,  0.867046246f,
-    0.503538384f,  0.863972856f,
-    0.508830143f,  0.860866939f,
-    0.514102744f,  0.857728610f,
-    0.519355990f,  0.854557988f,
-    0.524589683f,  0.851355193f,
-    0.529803625f,  0.848120345f,
-    0.534997620f,  0.844853565f,
-    0.540171473f,  0.841554977f,
-    0.545324988f,  0.838224706f,
-    0.550457973f,  0.834862875f,
-    0.555570233f,  0.831469612f,
-    0.560661576f,  0.828045045f,
-    0.565731811f,  0.824589303f,
-    0.570780746f,  0.821102515f,
-    0.575808191f,  0.817584813f,
-    0.580813958f,  0.814036330f,
-    0.585797857f,  0.810457198f,
-    0.590759702f,  0.806847554f,
-    0.595699304f,  0.803207531f,
-    0.600616479f,  0.799537269f,
-    0.605511041f,  0.795836905f,
-    0.610382806f,  0.792106577f,
-    0.615231591f,  0.788346428f,
-    0.620057212f,  0.784556597f,
-    0.624859488f,  0.780737229f,
-    0.629638239f,  0.776888466f,
-    0.634393284f,  0.773010453f,
-    0.639124445f,  0.769103338f,
-    0.643831543f,  0.765167266f,
-    0.648514401f,  0.761202385f,
-    0.653172843f,  0.757208847f,
-    0.657806693f,  0.753186799f,
-    0.662415778f,  0.749136395f,
-    0.666999922f,  0.745057785f,
-    0.671558955f,  0.740951125f,
-    0.676092704f,  0.736816569f,
-    0.680600998f,  0.732654272f,
-    0.685083668f,  0.728464390f,
-    0.689540545f,  0.724247083f,
-    0.693971461f,  0.720002508f,
-    0.698376249f,  0.715730825f,
-    0.702754744f,  0.711432196f,
-    0.707106781f,  0.707106781f,
-    0.711432196f,  0.702754744f,
-    0.715730825f,  0.698376249f,
-    0.720002508f,  0.693971461f,
-    0.724247083f,  0.689540545f,
-    0.728464390f,  0.685083668f,
-    0.732654272f,  0.680600998f,
-    0.736816569f,  0.676092704f,
-    0.740951125f,  0.671558955f,
-    0.745057785f,  0.666999922f,
-    0.749136395f,  0.662415778f,
-    0.753186799f,  0.657806693f,
-    0.757208847f,  0.653172843f,
-    0.761202385f,  0.648514401f,
-    0.765167266f,  0.643831543f,
-    0.769103338f,  0.639124445f,
-    0.773010453f,  0.634393284f,
-    0.776888466f,  0.629638239f,
-    0.780737229f,  0.624859488f,
-    0.784556597f,  0.620057212f,
-    0.788346428f,  0.615231591f,
-    0.792106577f,  0.610382806f,
-    0.795836905f,  0.605511041f,
-    0.799537269f,  0.600616479f,
-    0.803207531f,  0.595699304f,
-    0.806847554f,  0.590759702f,
-    0.810457198f,  0.585797857f,
-    0.814036330f,  0.580813958f,
-    0.817584813f,  0.575808191f,
-    0.821102515f,  0.570780746f,
-    0.824589303f,  0.565731811f,
-    0.828045045f,  0.560661576f,
-    0.831469612f,  0.555570233f,
-    0.834862875f,  0.550457973f,
-    0.838224706f,  0.545324988f,
-    0.841554977f,  0.540171473f,
-    0.844853565f,  0.534997620f,
-    0.848120345f,  0.529803625f,
-    0.851355193f,  0.524589683f,
-    0.854557988f,  0.519355990f,
-    0.857728610f,  0.514102744f,
-    0.860866939f,  0.508830143f,
-    0.863972856f,  0.503538384f,
-    0.867046246f,  0.498227667f,
-    0.870086991f,  0.492898192f,
-    0.873094978f,  0.487550160f,
-    0.876070094f,  0.482183772f,
-    0.879012226f,  0.476799230f,
-    0.881921264f,  0.471396737f,
-    0.884797098f,  0.465976496f,
-    0.887639620f,  0.460538711f,
-    0.890448723f,  0.455083587f,
-    0.893224301f,  0.449611330f,
-    0.895966250f,  0.444122145f,
-    0.898674466f,  0.438616239f,
-    0.901348847f,  0.433093819f,
-    0.903989293f,  0.427555093f,
-    0.906595705f,  0.422000271f,
-    0.909167983f,  0.416429560f,
-    0.911706032f,  0.410843171f,
-    0.914209756f,  0.405241314f,
-    0.916679060f,  0.399624200f,
-    0.919113852f,  0.393992040f,
-    0.921514039f,  0.388345047f,
-    0.923879533f,  0.382683432f,
-    0.926210242f,  0.377007410f,
-    0.928506080f,  0.371317194f,
-    0.930766961f,  0.365612998f,
-    0.932992799f,  0.359895037f,
-    0.935183510f,  0.354163525f,
-    0.937339012f,  0.348418680f,
-    0.939459224f,  0.342660717f,
-    0.941544065f,  0.336889853f,
-    0.943593458f,  0.331106306f,
-    0.945607325f,  0.325310292f,
-    0.947585591f,  0.319502031f,
-    0.949528181f,  0.313681740f,
-    0.951435021f,  0.307849640f,
-    0.953306040f,  0.302005949f,
-    0.955141168f,  0.296150888f,
-    0.956940336f,  0.290284677f,
-    0.958703475f,  0.284407537f,
-    0.960430519f,  0.278519689f,
-    0.962121404f,  0.272621355f,
-    0.963776066f,  0.266712757f,
-    0.965394442f,  0.260794118f,
-    0.966976471f,  0.254865660f,
-    0.968522094f,  0.248927606f,
-    0.970031253f,  0.242980180f,
-    0.971503891f,  0.237023606f,
-    0.972939952f,  0.231058108f,
-    0.974339383f,  0.225083911f,
-    0.975702130f,  0.219101240f,
-    0.977028143f,  0.213110320f,
-    0.978317371f,  0.207111376f,
-    0.979569766f,  0.201104635f,
-    0.980785280f,  0.195090322f,
-    0.981963869f,  0.189068664f,
-    0.983105487f,  0.183039888f,
-    0.984210092f,  0.177004220f,
-    0.985277642f,  0.170961889f,
-    0.986308097f,  0.164913120f,
-    0.987301418f,  0.158858143f,
-    0.988257568f,  0.152797185f,
-    0.989176510f,  0.146730474f,
-    0.990058210f,  0.140658239f,
-    0.990902635f,  0.134580709f,
-    0.991709754f,  0.128498111f,
-    0.992479535f,  0.122410675f,
-    0.993211949f,  0.116318631f,
-    0.993906970f,  0.110222207f,
-    0.994564571f,  0.104121634f,
-    0.995184727f,  0.098017140f,
-    0.995767414f,  0.091908956f,
-    0.996312612f,  0.085797312f,
-    0.996820299f,  0.079682438f,
-    0.997290457f,  0.073564564f,
-    0.997723067f,  0.067443920f,
-    0.998118113f,  0.061320736f,
-    0.998475581f,  0.055195244f,
-    0.998795456f,  0.049067674f,
-    0.999077728f,  0.042938257f,
-    0.999322385f,  0.036807223f,
-    0.999529418f,  0.030674803f,
-    0.999698819f,  0.024541229f,
-    0.999830582f,  0.018406730f,
-    0.999924702f,  0.012271538f,
-    0.999981175f,  0.006135885f,
-    1.000000000f,  0.000000000f,
-    0.999981175f, -0.006135885f,
-    0.999924702f, -0.012271538f,
-    0.999830582f, -0.018406730f,
-    0.999698819f, -0.024541229f,
-    0.999529418f, -0.030674803f,
-    0.999322385f, -0.036807223f,
-    0.999077728f, -0.042938257f,
-    0.998795456f, -0.049067674f,
-    0.998475581f, -0.055195244f,
-    0.998118113f, -0.061320736f,
-    0.997723067f, -0.067443920f,
-    0.997290457f, -0.073564564f,
-    0.996820299f, -0.079682438f,
-    0.996312612f, -0.085797312f,
-    0.995767414f, -0.091908956f,
-    0.995184727f, -0.098017140f,
-    0.994564571f, -0.104121634f,
-    0.993906970f, -0.110222207f,
-    0.993211949f, -0.116318631f,
-    0.992479535f, -0.122410675f,
-    0.991709754f, -0.128498111f,
-    0.990902635f, -0.134580709f,
-    0.990058210f, -0.140658239f,
-    0.989176510f, -0.146730474f,
-    0.988257568f, -0.152797185f,
-    0.987301418f, -0.158858143f,
-    0.986308097f, -0.164913120f,
-    0.985277642f, -0.170961889f,
-    0.984210092f, -0.177004220f,
-    0.983105487f, -0.183039888f,
-    0.981963869f, -0.189068664f,
-    0.980785280f, -0.195090322f,
-    0.979569766f, -0.201104635f,
-    0.978317371f, -0.207111376f,
-    0.977028143f, -0.213110320f,
-    0.975702130f, -0.219101240f,
-    0.974339383f, -0.225083911f,
-    0.972939952f, -0.231058108f,
-    0.971503891f, -0.237023606f,
-    0.970031253f, -0.242980180f,
-    0.968522094f, -0.248927606f,
-    0.966976471f, -0.254865660f,
-    0.965394442f, -0.260794118f,
-    0.963776066f, -0.266712757f,
-    0.962121404f, -0.272621355f,
-    0.960430519f, -0.278519689f,
-    0.958703475f, -0.284407537f,
-    0.956940336f, -0.290284677f,
-    0.955141168f, -0.296150888f,
-    0.953306040f, -0.302005949f,
-    0.951435021f, -0.307849640f,
-    0.949528181f, -0.313681740f,
-    0.947585591f, -0.319502031f,
-    0.945607325f, -0.325310292f,
-    0.943593458f, -0.331106306f,
-    0.941544065f, -0.336889853f,
-    0.939459224f, -0.342660717f,
-    0.937339012f, -0.348418680f,
-    0.935183510f, -0.354163525f,
-    0.932992799f, -0.359895037f,
-    0.930766961f, -0.365612998f,
-    0.928506080f, -0.371317194f,
-    0.926210242f, -0.377007410f,
-    0.923879533f, -0.382683432f,
-    0.921514039f, -0.388345047f,
-    0.919113852f, -0.393992040f,
-    0.916679060f, -0.399624200f,
-    0.914209756f, -0.405241314f,
-    0.911706032f, -0.410843171f,
-    0.909167983f, -0.416429560f,
-    0.906595705f, -0.422000271f,
-    0.903989293f, -0.427555093f,
-    0.901348847f, -0.433093819f,
-    0.898674466f, -0.438616239f,
-    0.895966250f, -0.444122145f,
-    0.893224301f, -0.449611330f,
-    0.890448723f, -0.455083587f,
-    0.887639620f, -0.460538711f,
-    0.884797098f, -0.465976496f,
-    0.881921264f, -0.471396737f,
-    0.879012226f, -0.476799230f,
-    0.876070094f, -0.482183772f,
-    0.873094978f, -0.487550160f,
-    0.870086991f, -0.492898192f,
-    0.867046246f, -0.498227667f,
-    0.863972856f, -0.503538384f,
-    0.860866939f, -0.508830143f,
-    0.857728610f, -0.514102744f,
-    0.854557988f, -0.519355990f,
-    0.851355193f, -0.524589683f,
-    0.848120345f, -0.529803625f,
-    0.844853565f, -0.534997620f,
-    0.841554977f, -0.540171473f,
-    0.838224706f, -0.545324988f,
-    0.834862875f, -0.550457973f,
-    0.831469612f, -0.555570233f,
-    0.828045045f, -0.560661576f,
-    0.824589303f, -0.565731811f,
-    0.821102515f, -0.570780746f,
-    0.817584813f, -0.575808191f,
-    0.814036330f, -0.580813958f,
-    0.810457198f, -0.585797857f,
-    0.806847554f, -0.590759702f,
-    0.803207531f, -0.595699304f,
-    0.799537269f, -0.600616479f,
-    0.795836905f, -0.605511041f,
-    0.792106577f, -0.610382806f,
-    0.788346428f, -0.615231591f,
-    0.784556597f, -0.620057212f,
-    0.780737229f, -0.624859488f,
-    0.776888466f, -0.629638239f,
-    0.773010453f, -0.634393284f,
-    0.769103338f, -0.639124445f,
-    0.765167266f, -0.643831543f,
-    0.761202385f, -0.648514401f,
-    0.757208847f, -0.653172843f,
-    0.753186799f, -0.657806693f,
-    0.749136395f, -0.662415778f,
-    0.745057785f, -0.666999922f,
-    0.740951125f, -0.671558955f,
-    0.736816569f, -0.676092704f,
-    0.732654272f, -0.680600998f,
-    0.728464390f, -0.685083668f,
-    0.724247083f, -0.689540545f,
-    0.720002508f, -0.693971461f,
-    0.715730825f, -0.698376249f,
-    0.711432196f, -0.702754744f,
-    0.707106781f, -0.707106781f,
-    0.702754744f, -0.711432196f,
-    0.698376249f, -0.715730825f,
-    0.693971461f, -0.720002508f,
-    0.689540545f, -0.724247083f,
-    0.685083668f, -0.728464390f,
-    0.680600998f, -0.732654272f,
-    0.676092704f, -0.736816569f,
-    0.671558955f, -0.740951125f,
-    0.666999922f, -0.745057785f,
-    0.662415778f, -0.749136395f,
-    0.657806693f, -0.753186799f,
-    0.653172843f, -0.757208847f,
-    0.648514401f, -0.761202385f,
-    0.643831543f, -0.765167266f,
-    0.639124445f, -0.769103338f,
-    0.634393284f, -0.773010453f,
-    0.629638239f, -0.776888466f,
-    0.624859488f, -0.780737229f,
-    0.620057212f, -0.784556597f,
-    0.615231591f, -0.788346428f,
-    0.610382806f, -0.792106577f,
-    0.605511041f, -0.795836905f,
-    0.600616479f, -0.799537269f,
-    0.595699304f, -0.803207531f,
-    0.590759702f, -0.806847554f,
-    0.585797857f, -0.810457198f,
-    0.580813958f, -0.814036330f,
-    0.575808191f, -0.817584813f,
-    0.570780746f, -0.821102515f,
-    0.565731811f, -0.824589303f,
-    0.560661576f, -0.828045045f,
-    0.555570233f, -0.831469612f,
-    0.550457973f, -0.834862875f,
-    0.545324988f, -0.838224706f,
-    0.540171473f, -0.841554977f,
-    0.534997620f, -0.844853565f,
-    0.529803625f, -0.848120345f,
-    0.524589683f, -0.851355193f,
-    0.519355990f, -0.854557988f,
-    0.514102744f, -0.857728610f,
-    0.508830143f, -0.860866939f,
-    0.503538384f, -0.863972856f,
-    0.498227667f, -0.867046246f,
-    0.492898192f, -0.870086991f,
-    0.487550160f, -0.873094978f,
-    0.482183772f, -0.876070094f,
-    0.476799230f, -0.879012226f,
-    0.471396737f, -0.881921264f,
-    0.465976496f, -0.884797098f,
-    0.460538711f, -0.887639620f,
-    0.455083587f, -0.890448723f,
-    0.449611330f, -0.893224301f,
-    0.444122145f, -0.895966250f,
-    0.438616239f, -0.898674466f,
-    0.433093819f, -0.901348847f,
-    0.427555093f, -0.903989293f,
-    0.422000271f, -0.906595705f,
-    0.416429560f, -0.909167983f,
-    0.410843171f, -0.911706032f,
-    0.405241314f, -0.914209756f,
-    0.399624200f, -0.916679060f,
-    0.393992040f, -0.919113852f,
-    0.388345047f, -0.921514039f,
-    0.382683432f, -0.923879533f,
-    0.377007410f, -0.926210242f,
-    0.371317194f, -0.928506080f,
-    0.365612998f, -0.930766961f,
-    0.359895037f, -0.932992799f,
-    0.354163525f, -0.935183510f,
-    0.348418680f, -0.937339012f,
-    0.342660717f, -0.939459224f,
-    0.336889853f, -0.941544065f,
-    0.331106306f, -0.943593458f,
-    0.325310292f, -0.945607325f,
-    0.319502031f, -0.947585591f,
-    0.313681740f, -0.949528181f,
-    0.307849640f, -0.951435021f,
-    0.302005949f, -0.953306040f,
-    0.296150888f, -0.955141168f,
-    0.290284677f, -0.956940336f,
-    0.284407537f, -0.958703475f,
-    0.278519689f, -0.960430519f,
-    0.272621355f, -0.962121404f,
-    0.266712757f, -0.963776066f,
-    0.260794118f, -0.965394442f,
-    0.254865660f, -0.966976471f,
-    0.248927606f, -0.968522094f,
-    0.242980180f, -0.970031253f,
-    0.237023606f, -0.971503891f,
-    0.231058108f, -0.972939952f,
-    0.225083911f, -0.974339383f,
-    0.219101240f, -0.975702130f,
-    0.213110320f, -0.977028143f,
-    0.207111376f, -0.978317371f,
-    0.201104635f, -0.979569766f,
-    0.195090322f, -0.980785280f,
-    0.189068664f, -0.981963869f,
-    0.183039888f, -0.983105487f,
-    0.177004220f, -0.984210092f,
-    0.170961889f, -0.985277642f,
-    0.164913120f, -0.986308097f,
-    0.158858143f, -0.987301418f,
-    0.152797185f, -0.988257568f,
-    0.146730474f, -0.989176510f,
-    0.140658239f, -0.990058210f,
-    0.134580709f, -0.990902635f,
-    0.128498111f, -0.991709754f,
-    0.122410675f, -0.992479535f,
-    0.116318631f, -0.993211949f,
-    0.110222207f, -0.993906970f,
-    0.104121634f, -0.994564571f,
-    0.098017140f, -0.995184727f,
-    0.091908956f, -0.995767414f,
-    0.085797312f, -0.996312612f,
-    0.079682438f, -0.996820299f,
-    0.073564564f, -0.997290457f,
-    0.067443920f, -0.997723067f,
-    0.061320736f, -0.998118113f,
-    0.055195244f, -0.998475581f,
-    0.049067674f, -0.998795456f,
-    0.042938257f, -0.999077728f,
-    0.036807223f, -0.999322385f,
-    0.030674803f, -0.999529418f,
-    0.024541229f, -0.999698819f,
-    0.018406730f, -0.999830582f,
-    0.012271538f, -0.999924702f,
-    0.006135885f, -0.999981175f
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
-const float32_t twiddleCoef_rfft_2048[2048] = {
-    0.000000000f,  1.000000000f,
-    0.003067957f,  0.999995294f,
-    0.006135885f,  0.999981175f,
-    0.009203755f,  0.999957645f,
-    0.012271538f,  0.999924702f,
-    0.015339206f,  0.999882347f,
-    0.018406730f,  0.999830582f,
-    0.021474080f,  0.999769405f,
-    0.024541229f,  0.999698819f,
-    0.027608146f,  0.999618822f,
-    0.030674803f,  0.999529418f,
-    0.033741172f,  0.999430605f,
-    0.036807223f,  0.999322385f,
-    0.039872928f,  0.999204759f,
-    0.042938257f,  0.999077728f,
-    0.046003182f,  0.998941293f,
-    0.049067674f,  0.998795456f,
-    0.052131705f,  0.998640218f,
-    0.055195244f,  0.998475581f,
-    0.058258265f,  0.998301545f,
-    0.061320736f,  0.998118113f,
-    0.064382631f,  0.997925286f,
-    0.067443920f,  0.997723067f,
-    0.070504573f,  0.997511456f,
-    0.073564564f,  0.997290457f,
-    0.076623861f,  0.997060070f,
-    0.079682438f,  0.996820299f,
-    0.082740265f,  0.996571146f,
-    0.085797312f,  0.996312612f,
-    0.088853553f,  0.996044701f,
-    0.091908956f,  0.995767414f,
-    0.094963495f,  0.995480755f,
-    0.098017140f,  0.995184727f,
-    0.101069863f,  0.994879331f,
-    0.104121634f,  0.994564571f,
-    0.107172425f,  0.994240449f,
-    0.110222207f,  0.993906970f,
-    0.113270952f,  0.993564136f,
-    0.116318631f,  0.993211949f,
-    0.119365215f,  0.992850414f,
-    0.122410675f,  0.992479535f,
-    0.125454983f,  0.992099313f,
-    0.128498111f,  0.991709754f,
-    0.131540029f,  0.991310860f,
-    0.134580709f,  0.990902635f,
-    0.137620122f,  0.990485084f,
-    0.140658239f,  0.990058210f,
-    0.143695033f,  0.989622017f,
-    0.146730474f,  0.989176510f,
-    0.149764535f,  0.988721692f,
-    0.152797185f,  0.988257568f,
-    0.155828398f,  0.987784142f,
-    0.158858143f,  0.987301418f,
-    0.161886394f,  0.986809402f,
-    0.164913120f,  0.986308097f,
-    0.167938295f,  0.985797509f,
-    0.170961889f,  0.985277642f,
-    0.173983873f,  0.984748502f,
-    0.177004220f,  0.984210092f,
-    0.180022901f,  0.983662419f,
-    0.183039888f,  0.983105487f,
-    0.186055152f,  0.982539302f,
-    0.189068664f,  0.981963869f,
-    0.192080397f,  0.981379193f,
-    0.195090322f,  0.980785280f,
-    0.198098411f,  0.980182136f,
-    0.201104635f,  0.979569766f,
-    0.204108966f,  0.978948175f,
-    0.207111376f,  0.978317371f,
-    0.210111837f,  0.977677358f,
-    0.213110320f,  0.977028143f,
-    0.216106797f,  0.976369731f,
-    0.219101240f,  0.975702130f,
-    0.222093621f,  0.975025345f,
-    0.225083911f,  0.974339383f,
-    0.228072083f,  0.973644250f,
-    0.231058108f,  0.972939952f,
-    0.234041959f,  0.972226497f,
-    0.237023606f,  0.971503891f,
-    0.240003022f,  0.970772141f,
-    0.242980180f,  0.970031253f,
-    0.245955050f,  0.969281235f,
-    0.248927606f,  0.968522094f,
-    0.251897818f,  0.967753837f,
-    0.254865660f,  0.966976471f,
-    0.257831102f,  0.966190003f,
-    0.260794118f,  0.965394442f,
-    0.263754679f,  0.964589793f,
-    0.266712757f,  0.963776066f,
-    0.269668326f,  0.962953267f,
-    0.272621355f,  0.962121404f,
-    0.275571819f,  0.961280486f,
-    0.278519689f,  0.960430519f,
-    0.281464938f,  0.959571513f,
-    0.284407537f,  0.958703475f,
-    0.287347460f,  0.957826413f,
-    0.290284677f,  0.956940336f,
-    0.293219163f,  0.956045251f,
-    0.296150888f,  0.955141168f,
-    0.299079826f,  0.954228095f,
-    0.302005949f,  0.953306040f,
-    0.304929230f,  0.952375013f,
-    0.307849640f,  0.951435021f,
-    0.310767153f,  0.950486074f,
-    0.313681740f,  0.949528181f,
-    0.316593376f,  0.948561350f,
-    0.319502031f,  0.947585591f,
-    0.322407679f,  0.946600913f,
-    0.325310292f,  0.945607325f,
-    0.328209844f,  0.944604837f,
-    0.331106306f,  0.943593458f,
-    0.333999651f,  0.942573198f,
-    0.336889853f,  0.941544065f,
-    0.339776884f,  0.940506071f,
-    0.342660717f,  0.939459224f,
-    0.345541325f,  0.938403534f,
-    0.348418680f,  0.937339012f,
-    0.351292756f,  0.936265667f,
-    0.354163525f,  0.935183510f,
-    0.357030961f,  0.934092550f,
-    0.359895037f,  0.932992799f,
-    0.362755724f,  0.931884266f,
-    0.365612998f,  0.930766961f,
-    0.368466830f,  0.929640896f,
-    0.371317194f,  0.928506080f,
-    0.374164063f,  0.927362526f,
-    0.377007410f,  0.926210242f,
-    0.379847209f,  0.925049241f,
-    0.382683432f,  0.923879533f,
-    0.385516054f,  0.922701128f,
-    0.388345047f,  0.921514039f,
-    0.391170384f,  0.920318277f,
-    0.393992040f,  0.919113852f,
-    0.396809987f,  0.917900776f,
-    0.399624200f,  0.916679060f,
-    0.402434651f,  0.915448716f,
-    0.405241314f,  0.914209756f,
-    0.408044163f,  0.912962190f,
-    0.410843171f,  0.911706032f,
-    0.413638312f,  0.910441292f,
-    0.416429560f,  0.909167983f,
-    0.419216888f,  0.907886116f,
-    0.422000271f,  0.906595705f,
-    0.424779681f,  0.905296759f,
-    0.427555093f,  0.903989293f,
-    0.430326481f,  0.902673318f,
-    0.433093819f,  0.901348847f,
-    0.435857080f,  0.900015892f,
-    0.438616239f,  0.898674466f,
-    0.441371269f,  0.897324581f,
-    0.444122145f,  0.895966250f,
-    0.446868840f,  0.894599486f,
-    0.449611330f,  0.893224301f,
-    0.452349587f,  0.891840709f,
-    0.455083587f,  0.890448723f,
-    0.457813304f,  0.889048356f,
-    0.460538711f,  0.887639620f,
-    0.463259784f,  0.886222530f,
-    0.465976496f,  0.884797098f,
-    0.468688822f,  0.883363339f,
-    0.471396737f,  0.881921264f,
-    0.474100215f,  0.880470889f,
-    0.476799230f,  0.879012226f,
-    0.479493758f,  0.877545290f,
-    0.482183772f,  0.876070094f,
-    0.484869248f,  0.874586652f,
-    0.487550160f,  0.873094978f,
-    0.490226483f,  0.871595087f,
-    0.492898192f,  0.870086991f,
-    0.495565262f,  0.868570706f,
-    0.498227667f,  0.867046246f,
-    0.500885383f,  0.865513624f,
-    0.503538384f,  0.863972856f,
-    0.506186645f,  0.862423956f,
-    0.508830143f,  0.860866939f,
-    0.511468850f,  0.859301818f,
-    0.514102744f,  0.857728610f,
-    0.516731799f,  0.856147328f,
-    0.519355990f,  0.854557988f,
-    0.521975293f,  0.852960605f,
-    0.524589683f,  0.851355193f,
-    0.527199135f,  0.849741768f,
-    0.529803625f,  0.848120345f,
-    0.532403128f,  0.846490939f,
-    0.534997620f,  0.844853565f,
-    0.537587076f,  0.843208240f,
-    0.540171473f,  0.841554977f,
-    0.542750785f,  0.839893794f,
-    0.545324988f,  0.838224706f,
-    0.547894059f,  0.836547727f,
-    0.550457973f,  0.834862875f,
-    0.553016706f,  0.833170165f,
-    0.555570233f,  0.831469612f,
-    0.558118531f,  0.829761234f,
-    0.560661576f,  0.828045045f,
-    0.563199344f,  0.826321063f,
-    0.565731811f,  0.824589303f,
-    0.568258953f,  0.822849781f,
-    0.570780746f,  0.821102515f,
-    0.573297167f,  0.819347520f,
-    0.575808191f,  0.817584813f,
-    0.578313796f,  0.815814411f,
-    0.580813958f,  0.814036330f,
-    0.583308653f,  0.812250587f,
-    0.585797857f,  0.810457198f,
-    0.588281548f,  0.808656182f,
-    0.590759702f,  0.806847554f,
-    0.593232295f,  0.805031331f,
-    0.595699304f,  0.803207531f,
-    0.598160707f,  0.801376172f,
-    0.600616479f,  0.799537269f,
-    0.603066599f,  0.797690841f,
-    0.605511041f,  0.795836905f,
-    0.607949785f,  0.793975478f,
-    0.610382806f,  0.792106577f,
-    0.612810082f,  0.790230221f,
-    0.615231591f,  0.788346428f,
-    0.617647308f,  0.786455214f,
-    0.620057212f,  0.784556597f,
-    0.622461279f,  0.782650596f,
-    0.624859488f,  0.780737229f,
-    0.627251815f,  0.778816512f,
-    0.629638239f,  0.776888466f,
-    0.632018736f,  0.774953107f,
-    0.634393284f,  0.773010453f,
-    0.636761861f,  0.771060524f,
-    0.639124445f,  0.769103338f,
-    0.641481013f,  0.767138912f,
-    0.643831543f,  0.765167266f,
-    0.646176013f,  0.763188417f,
-    0.648514401f,  0.761202385f,
-    0.650846685f,  0.759209189f,
-    0.653172843f,  0.757208847f,
-    0.655492853f,  0.755201377f,
-    0.657806693f,  0.753186799f,
-    0.660114342f,  0.751165132f,
-    0.662415778f,  0.749136395f,
-    0.664710978f,  0.747100606f,
-    0.666999922f,  0.745057785f,
-    0.669282588f,  0.743007952f,
-    0.671558955f,  0.740951125f,
-    0.673829000f,  0.738887324f,
-    0.676092704f,  0.736816569f,
-    0.678350043f,  0.734738878f,
-    0.680600998f,  0.732654272f,
-    0.682845546f,  0.730562769f,
-    0.685083668f,  0.728464390f,
-    0.687315341f,  0.726359155f,
-    0.689540545f,  0.724247083f,
-    0.691759258f,  0.722128194f,
-    0.693971461f,  0.720002508f,
-    0.696177131f,  0.717870045f,
-    0.698376249f,  0.715730825f,
-    0.700568794f,  0.713584869f,
-    0.702754744f,  0.711432196f,
-    0.704934080f,  0.709272826f,
-    0.707106781f,  0.707106781f,
-    0.709272826f,  0.704934080f,
-    0.711432196f,  0.702754744f,
-    0.713584869f,  0.700568794f,
-    0.715730825f,  0.698376249f,
-    0.717870045f,  0.696177131f,
-    0.720002508f,  0.693971461f,
-    0.722128194f,  0.691759258f,
-    0.724247083f,  0.689540545f,
-    0.726359155f,  0.687315341f,
-    0.728464390f,  0.685083668f,
-    0.730562769f,  0.682845546f,
-    0.732654272f,  0.680600998f,
-    0.734738878f,  0.678350043f,
-    0.736816569f,  0.676092704f,
-    0.738887324f,  0.673829000f,
-    0.740951125f,  0.671558955f,
-    0.743007952f,  0.669282588f,
-    0.745057785f,  0.666999922f,
-    0.747100606f,  0.664710978f,
-    0.749136395f,  0.662415778f,
-    0.751165132f,  0.660114342f,
-    0.753186799f,  0.657806693f,
-    0.755201377f,  0.655492853f,
-    0.757208847f,  0.653172843f,
-    0.759209189f,  0.650846685f,
-    0.761202385f,  0.648514401f,
-    0.763188417f,  0.646176013f,
-    0.765167266f,  0.643831543f,
-    0.767138912f,  0.641481013f,
-    0.769103338f,  0.639124445f,
-    0.771060524f,  0.636761861f,
-    0.773010453f,  0.634393284f,
-    0.774953107f,  0.632018736f,
-    0.776888466f,  0.629638239f,
-    0.778816512f,  0.627251815f,
-    0.780737229f,  0.624859488f,
-    0.782650596f,  0.622461279f,
-    0.784556597f,  0.620057212f,
-    0.786455214f,  0.617647308f,
-    0.788346428f,  0.615231591f,
-    0.790230221f,  0.612810082f,
-    0.792106577f,  0.610382806f,
-    0.793975478f,  0.607949785f,
-    0.795836905f,  0.605511041f,
-    0.797690841f,  0.603066599f,
-    0.799537269f,  0.600616479f,
-    0.801376172f,  0.598160707f,
-    0.803207531f,  0.595699304f,
-    0.805031331f,  0.593232295f,
-    0.806847554f,  0.590759702f,
-    0.808656182f,  0.588281548f,
-    0.810457198f,  0.585797857f,
-    0.812250587f,  0.583308653f,
-    0.814036330f,  0.580813958f,
-    0.815814411f,  0.578313796f,
-    0.817584813f,  0.575808191f,
-    0.819347520f,  0.573297167f,
-    0.821102515f,  0.570780746f,
-    0.822849781f,  0.568258953f,
-    0.824589303f,  0.565731811f,
-    0.826321063f,  0.563199344f,
-    0.828045045f,  0.560661576f,
-    0.829761234f,  0.558118531f,
-    0.831469612f,  0.555570233f,
-    0.833170165f,  0.553016706f,
-    0.834862875f,  0.550457973f,
-    0.836547727f,  0.547894059f,
-    0.838224706f,  0.545324988f,
-    0.839893794f,  0.542750785f,
-    0.841554977f,  0.540171473f,
-    0.843208240f,  0.537587076f,
-    0.844853565f,  0.534997620f,
-    0.846490939f,  0.532403128f,
-    0.848120345f,  0.529803625f,
-    0.849741768f,  0.527199135f,
-    0.851355193f,  0.524589683f,
-    0.852960605f,  0.521975293f,
-    0.854557988f,  0.519355990f,
-    0.856147328f,  0.516731799f,
-    0.857728610f,  0.514102744f,
-    0.859301818f,  0.511468850f,
-    0.860866939f,  0.508830143f,
-    0.862423956f,  0.506186645f,
-    0.863972856f,  0.503538384f,
-    0.865513624f,  0.500885383f,
-    0.867046246f,  0.498227667f,
-    0.868570706f,  0.495565262f,
-    0.870086991f,  0.492898192f,
-    0.871595087f,  0.490226483f,
-    0.873094978f,  0.487550160f,
-    0.874586652f,  0.484869248f,
-    0.876070094f,  0.482183772f,
-    0.877545290f,  0.479493758f,
-    0.879012226f,  0.476799230f,
-    0.880470889f,  0.474100215f,
-    0.881921264f,  0.471396737f,
-    0.883363339f,  0.468688822f,
-    0.884797098f,  0.465976496f,
-    0.886222530f,  0.463259784f,
-    0.887639620f,  0.460538711f,
-    0.889048356f,  0.457813304f,
-    0.890448723f,  0.455083587f,
-    0.891840709f,  0.452349587f,
-    0.893224301f,  0.449611330f,
-    0.894599486f,  0.446868840f,
-    0.895966250f,  0.444122145f,
-    0.897324581f,  0.441371269f,
-    0.898674466f,  0.438616239f,
-    0.900015892f,  0.435857080f,
-    0.901348847f,  0.433093819f,
-    0.902673318f,  0.430326481f,
-    0.903989293f,  0.427555093f,
-    0.905296759f,  0.424779681f,
-    0.906595705f,  0.422000271f,
-    0.907886116f,  0.419216888f,
-    0.909167983f,  0.416429560f,
-    0.910441292f,  0.413638312f,
-    0.911706032f,  0.410843171f,
-    0.912962190f,  0.408044163f,
-    0.914209756f,  0.405241314f,
-    0.915448716f,  0.402434651f,
-    0.916679060f,  0.399624200f,
-    0.917900776f,  0.396809987f,
-    0.919113852f,  0.393992040f,
-    0.920318277f,  0.391170384f,
-    0.921514039f,  0.388345047f,
-    0.922701128f,  0.385516054f,
-    0.923879533f,  0.382683432f,
-    0.925049241f,  0.379847209f,
-    0.926210242f,  0.377007410f,
-    0.927362526f,  0.374164063f,
-    0.928506080f,  0.371317194f,
-    0.929640896f,  0.368466830f,
-    0.930766961f,  0.365612998f,
-    0.931884266f,  0.362755724f,
-    0.932992799f,  0.359895037f,
-    0.934092550f,  0.357030961f,
-    0.935183510f,  0.354163525f,
-    0.936265667f,  0.351292756f,
-    0.937339012f,  0.348418680f,
-    0.938403534f,  0.345541325f,
-    0.939459224f,  0.342660717f,
-    0.940506071f,  0.339776884f,
-    0.941544065f,  0.336889853f,
-    0.942573198f,  0.333999651f,
-    0.943593458f,  0.331106306f,
-    0.944604837f,  0.328209844f,
-    0.945607325f,  0.325310292f,
-    0.946600913f,  0.322407679f,
-    0.947585591f,  0.319502031f,
-    0.948561350f,  0.316593376f,
-    0.949528181f,  0.313681740f,
-    0.950486074f,  0.310767153f,
-    0.951435021f,  0.307849640f,
-    0.952375013f,  0.304929230f,
-    0.953306040f,  0.302005949f,
-    0.954228095f,  0.299079826f,
-    0.955141168f,  0.296150888f,
-    0.956045251f,  0.293219163f,
-    0.956940336f,  0.290284677f,
-    0.957826413f,  0.287347460f,
-    0.958703475f,  0.284407537f,
-    0.959571513f,  0.281464938f,
-    0.960430519f,  0.278519689f,
-    0.961280486f,  0.275571819f,
-    0.962121404f,  0.272621355f,
-    0.962953267f,  0.269668326f,
-    0.963776066f,  0.266712757f,
-    0.964589793f,  0.263754679f,
-    0.965394442f,  0.260794118f,
-    0.966190003f,  0.257831102f,
-    0.966976471f,  0.254865660f,
-    0.967753837f,  0.251897818f,
-    0.968522094f,  0.248927606f,
-    0.969281235f,  0.245955050f,
-    0.970031253f,  0.242980180f,
-    0.970772141f,  0.240003022f,
-    0.971503891f,  0.237023606f,
-    0.972226497f,  0.234041959f,
-    0.972939952f,  0.231058108f,
-    0.973644250f,  0.228072083f,
-    0.974339383f,  0.225083911f,
-    0.975025345f,  0.222093621f,
-    0.975702130f,  0.219101240f,
-    0.976369731f,  0.216106797f,
-    0.977028143f,  0.213110320f,
-    0.977677358f,  0.210111837f,
-    0.978317371f,  0.207111376f,
-    0.978948175f,  0.204108966f,
-    0.979569766f,  0.201104635f,
-    0.980182136f,  0.198098411f,
-    0.980785280f,  0.195090322f,
-    0.981379193f,  0.192080397f,
-    0.981963869f,  0.189068664f,
-    0.982539302f,  0.186055152f,
-    0.983105487f,  0.183039888f,
-    0.983662419f,  0.180022901f,
-    0.984210092f,  0.177004220f,
-    0.984748502f,  0.173983873f,
-    0.985277642f,  0.170961889f,
-    0.985797509f,  0.167938295f,
-    0.986308097f,  0.164913120f,
-    0.986809402f,  0.161886394f,
-    0.987301418f,  0.158858143f,
-    0.987784142f,  0.155828398f,
-    0.988257568f,  0.152797185f,
-    0.988721692f,  0.149764535f,
-    0.989176510f,  0.146730474f,
-    0.989622017f,  0.143695033f,
-    0.990058210f,  0.140658239f,
-    0.990485084f,  0.137620122f,
-    0.990902635f,  0.134580709f,
-    0.991310860f,  0.131540029f,
-    0.991709754f,  0.128498111f,
-    0.992099313f,  0.125454983f,
-    0.992479535f,  0.122410675f,
-    0.992850414f,  0.119365215f,
-    0.993211949f,  0.116318631f,
-    0.993564136f,  0.113270952f,
-    0.993906970f,  0.110222207f,
-    0.994240449f,  0.107172425f,
-    0.994564571f,  0.104121634f,
-    0.994879331f,  0.101069863f,
-    0.995184727f,  0.098017140f,
-    0.995480755f,  0.094963495f,
-    0.995767414f,  0.091908956f,
-    0.996044701f,  0.088853553f,
-    0.996312612f,  0.085797312f,
-    0.996571146f,  0.082740265f,
-    0.996820299f,  0.079682438f,
-    0.997060070f,  0.076623861f,
-    0.997290457f,  0.073564564f,
-    0.997511456f,  0.070504573f,
-    0.997723067f,  0.067443920f,
-    0.997925286f,  0.064382631f,
-    0.998118113f,  0.061320736f,
-    0.998301545f,  0.058258265f,
-    0.998475581f,  0.055195244f,
-    0.998640218f,  0.052131705f,
-    0.998795456f,  0.049067674f,
-    0.998941293f,  0.046003182f,
-    0.999077728f,  0.042938257f,
-    0.999204759f,  0.039872928f,
-    0.999322385f,  0.036807223f,
-    0.999430605f,  0.033741172f,
-    0.999529418f,  0.030674803f,
-    0.999618822f,  0.027608146f,
-    0.999698819f,  0.024541229f,
-    0.999769405f,  0.021474080f,
-    0.999830582f,  0.018406730f,
-    0.999882347f,  0.015339206f,
-    0.999924702f,  0.012271538f,
-    0.999957645f,  0.009203755f,
-    0.999981175f,  0.006135885f,
-    0.999995294f,  0.003067957f,
-    1.000000000f,  0.000000000f,
-    0.999995294f, -0.003067957f,
-    0.999981175f, -0.006135885f,
-    0.999957645f, -0.009203755f,
-    0.999924702f, -0.012271538f,
-    0.999882347f, -0.015339206f,
-    0.999830582f, -0.018406730f,
-    0.999769405f, -0.021474080f,
-    0.999698819f, -0.024541229f,
-    0.999618822f, -0.027608146f,
-    0.999529418f, -0.030674803f,
-    0.999430605f, -0.033741172f,
-    0.999322385f, -0.036807223f,
-    0.999204759f, -0.039872928f,
-    0.999077728f, -0.042938257f,
-    0.998941293f, -0.046003182f,
-    0.998795456f, -0.049067674f,
-    0.998640218f, -0.052131705f,
-    0.998475581f, -0.055195244f,
-    0.998301545f, -0.058258265f,
-    0.998118113f, -0.061320736f,
-    0.997925286f, -0.064382631f,
-    0.997723067f, -0.067443920f,
-    0.997511456f, -0.070504573f,
-    0.997290457f, -0.073564564f,
-    0.997060070f, -0.076623861f,
-    0.996820299f, -0.079682438f,
-    0.996571146f, -0.082740265f,
-    0.996312612f, -0.085797312f,
-    0.996044701f, -0.088853553f,
-    0.995767414f, -0.091908956f,
-    0.995480755f, -0.094963495f,
-    0.995184727f, -0.098017140f,
-    0.994879331f, -0.101069863f,
-    0.994564571f, -0.104121634f,
-    0.994240449f, -0.107172425f,
-    0.993906970f, -0.110222207f,
-    0.993564136f, -0.113270952f,
-    0.993211949f, -0.116318631f,
-    0.992850414f, -0.119365215f,
-    0.992479535f, -0.122410675f,
-    0.992099313f, -0.125454983f,
-    0.991709754f, -0.128498111f,
-    0.991310860f, -0.131540029f,
-    0.990902635f, -0.134580709f,
-    0.990485084f, -0.137620122f,
-    0.990058210f, -0.140658239f,
-    0.989622017f, -0.143695033f,
-    0.989176510f, -0.146730474f,
-    0.988721692f, -0.149764535f,
-    0.988257568f, -0.152797185f,
-    0.987784142f, -0.155828398f,
-    0.987301418f, -0.158858143f,
-    0.986809402f, -0.161886394f,
-    0.986308097f, -0.164913120f,
-    0.985797509f, -0.167938295f,
-    0.985277642f, -0.170961889f,
-    0.984748502f, -0.173983873f,
-    0.984210092f, -0.177004220f,
-    0.983662419f, -0.180022901f,
-    0.983105487f, -0.183039888f,
-    0.982539302f, -0.186055152f,
-    0.981963869f, -0.189068664f,
-    0.981379193f, -0.192080397f,
-    0.980785280f, -0.195090322f,
-    0.980182136f, -0.198098411f,
-    0.979569766f, -0.201104635f,
-    0.978948175f, -0.204108966f,
-    0.978317371f, -0.207111376f,
-    0.977677358f, -0.210111837f,
-    0.977028143f, -0.213110320f,
-    0.976369731f, -0.216106797f,
-    0.975702130f, -0.219101240f,
-    0.975025345f, -0.222093621f,
-    0.974339383f, -0.225083911f,
-    0.973644250f, -0.228072083f,
-    0.972939952f, -0.231058108f,
-    0.972226497f, -0.234041959f,
-    0.971503891f, -0.237023606f,
-    0.970772141f, -0.240003022f,
-    0.970031253f, -0.242980180f,
-    0.969281235f, -0.245955050f,
-    0.968522094f, -0.248927606f,
-    0.967753837f, -0.251897818f,
-    0.966976471f, -0.254865660f,
-    0.966190003f, -0.257831102f,
-    0.965394442f, -0.260794118f,
-    0.964589793f, -0.263754679f,
-    0.963776066f, -0.266712757f,
-    0.962953267f, -0.269668326f,
-    0.962121404f, -0.272621355f,
-    0.961280486f, -0.275571819f,
-    0.960430519f, -0.278519689f,
-    0.959571513f, -0.281464938f,
-    0.958703475f, -0.284407537f,
-    0.957826413f, -0.287347460f,
-    0.956940336f, -0.290284677f,
-    0.956045251f, -0.293219163f,
-    0.955141168f, -0.296150888f,
-    0.954228095f, -0.299079826f,
-    0.953306040f, -0.302005949f,
-    0.952375013f, -0.304929230f,
-    0.951435021f, -0.307849640f,
-    0.950486074f, -0.310767153f,
-    0.949528181f, -0.313681740f,
-    0.948561350f, -0.316593376f,
-    0.947585591f, -0.319502031f,
-    0.946600913f, -0.322407679f,
-    0.945607325f, -0.325310292f,
-    0.944604837f, -0.328209844f,
-    0.943593458f, -0.331106306f,
-    0.942573198f, -0.333999651f,
-    0.941544065f, -0.336889853f,
-    0.940506071f, -0.339776884f,
-    0.939459224f, -0.342660717f,
-    0.938403534f, -0.345541325f,
-    0.937339012f, -0.348418680f,
-    0.936265667f, -0.351292756f,
-    0.935183510f, -0.354163525f,
-    0.934092550f, -0.357030961f,
-    0.932992799f, -0.359895037f,
-    0.931884266f, -0.362755724f,
-    0.930766961f, -0.365612998f,
-    0.929640896f, -0.368466830f,
-    0.928506080f, -0.371317194f,
-    0.927362526f, -0.374164063f,
-    0.926210242f, -0.377007410f,
-    0.925049241f, -0.379847209f,
-    0.923879533f, -0.382683432f,
-    0.922701128f, -0.385516054f,
-    0.921514039f, -0.388345047f,
-    0.920318277f, -0.391170384f,
-    0.919113852f, -0.393992040f,
-    0.917900776f, -0.396809987f,
-    0.916679060f, -0.399624200f,
-    0.915448716f, -0.402434651f,
-    0.914209756f, -0.405241314f,
-    0.912962190f, -0.408044163f,
-    0.911706032f, -0.410843171f,
-    0.910441292f, -0.413638312f,
-    0.909167983f, -0.416429560f,
-    0.907886116f, -0.419216888f,
-    0.906595705f, -0.422000271f,
-    0.905296759f, -0.424779681f,
-    0.903989293f, -0.427555093f,
-    0.902673318f, -0.430326481f,
-    0.901348847f, -0.433093819f,
-    0.900015892f, -0.435857080f,
-    0.898674466f, -0.438616239f,
-    0.897324581f, -0.441371269f,
-    0.895966250f, -0.444122145f,
-    0.894599486f, -0.446868840f,
-    0.893224301f, -0.449611330f,
-    0.891840709f, -0.452349587f,
-    0.890448723f, -0.455083587f,
-    0.889048356f, -0.457813304f,
-    0.887639620f, -0.460538711f,
-    0.886222530f, -0.463259784f,
-    0.884797098f, -0.465976496f,
-    0.883363339f, -0.468688822f,
-    0.881921264f, -0.471396737f,
-    0.880470889f, -0.474100215f,
-    0.879012226f, -0.476799230f,
-    0.877545290f, -0.479493758f,
-    0.876070094f, -0.482183772f,
-    0.874586652f, -0.484869248f,
-    0.873094978f, -0.487550160f,
-    0.871595087f, -0.490226483f,
-    0.870086991f, -0.492898192f,
-    0.868570706f, -0.495565262f,
-    0.867046246f, -0.498227667f,
-    0.865513624f, -0.500885383f,
-    0.863972856f, -0.503538384f,
-    0.862423956f, -0.506186645f,
-    0.860866939f, -0.508830143f,
-    0.859301818f, -0.511468850f,
-    0.857728610f, -0.514102744f,
-    0.856147328f, -0.516731799f,
-    0.854557988f, -0.519355990f,
-    0.852960605f, -0.521975293f,
-    0.851355193f, -0.524589683f,
-    0.849741768f, -0.527199135f,
-    0.848120345f, -0.529803625f,
-    0.846490939f, -0.532403128f,
-    0.844853565f, -0.534997620f,
-    0.843208240f, -0.537587076f,
-    0.841554977f, -0.540171473f,
-    0.839893794f, -0.542750785f,
-    0.838224706f, -0.545324988f,
-    0.836547727f, -0.547894059f,
-    0.834862875f, -0.550457973f,
-    0.833170165f, -0.553016706f,
-    0.831469612f, -0.555570233f,
-    0.829761234f, -0.558118531f,
-    0.828045045f, -0.560661576f,
-    0.826321063f, -0.563199344f,
-    0.824589303f, -0.565731811f,
-    0.822849781f, -0.568258953f,
-    0.821102515f, -0.570780746f,
-    0.819347520f, -0.573297167f,
-    0.817584813f, -0.575808191f,
-    0.815814411f, -0.578313796f,
-    0.814036330f, -0.580813958f,
-    0.812250587f, -0.583308653f,
-    0.810457198f, -0.585797857f,
-    0.808656182f, -0.588281548f,
-    0.806847554f, -0.590759702f,
-    0.805031331f, -0.593232295f,
-    0.803207531f, -0.595699304f,
-    0.801376172f, -0.598160707f,
-    0.799537269f, -0.600616479f,
-    0.797690841f, -0.603066599f,
-    0.795836905f, -0.605511041f,
-    0.793975478f, -0.607949785f,
-    0.792106577f, -0.610382806f,
-    0.790230221f, -0.612810082f,
-    0.788346428f, -0.615231591f,
-    0.786455214f, -0.617647308f,
-    0.784556597f, -0.620057212f,
-    0.782650596f, -0.622461279f,
-    0.780737229f, -0.624859488f,
-    0.778816512f, -0.627251815f,
-    0.776888466f, -0.629638239f,
-    0.774953107f, -0.632018736f,
-    0.773010453f, -0.634393284f,
-    0.771060524f, -0.636761861f,
-    0.769103338f, -0.639124445f,
-    0.767138912f, -0.641481013f,
-    0.765167266f, -0.643831543f,
-    0.763188417f, -0.646176013f,
-    0.761202385f, -0.648514401f,
-    0.759209189f, -0.650846685f,
-    0.757208847f, -0.653172843f,
-    0.755201377f, -0.655492853f,
-    0.753186799f, -0.657806693f,
-    0.751165132f, -0.660114342f,
-    0.749136395f, -0.662415778f,
-    0.747100606f, -0.664710978f,
-    0.745057785f, -0.666999922f,
-    0.743007952f, -0.669282588f,
-    0.740951125f, -0.671558955f,
-    0.738887324f, -0.673829000f,
-    0.736816569f, -0.676092704f,
-    0.734738878f, -0.678350043f,
-    0.732654272f, -0.680600998f,
-    0.730562769f, -0.682845546f,
-    0.728464390f, -0.685083668f,
-    0.726359155f, -0.687315341f,
-    0.724247083f, -0.689540545f,
-    0.722128194f, -0.691759258f,
-    0.720002508f, -0.693971461f,
-    0.717870045f, -0.696177131f,
-    0.715730825f, -0.698376249f,
-    0.713584869f, -0.700568794f,
-    0.711432196f, -0.702754744f,
-    0.709272826f, -0.704934080f,
-    0.707106781f, -0.707106781f,
-    0.704934080f, -0.709272826f,
-    0.702754744f, -0.711432196f,
-    0.700568794f, -0.713584869f,
-    0.698376249f, -0.715730825f,
-    0.696177131f, -0.717870045f,
-    0.693971461f, -0.720002508f,
-    0.691759258f, -0.722128194f,
-    0.689540545f, -0.724247083f,
-    0.687315341f, -0.726359155f,
-    0.685083668f, -0.728464390f,
-    0.682845546f, -0.730562769f,
-    0.680600998f, -0.732654272f,
-    0.678350043f, -0.734738878f,
-    0.676092704f, -0.736816569f,
-    0.673829000f, -0.738887324f,
-    0.671558955f, -0.740951125f,
-    0.669282588f, -0.743007952f,
-    0.666999922f, -0.745057785f,
-    0.664710978f, -0.747100606f,
-    0.662415778f, -0.749136395f,
-    0.660114342f, -0.751165132f,
-    0.657806693f, -0.753186799f,
-    0.655492853f, -0.755201377f,
-    0.653172843f, -0.757208847f,
-    0.650846685f, -0.759209189f,
-    0.648514401f, -0.761202385f,
-    0.646176013f, -0.763188417f,
-    0.643831543f, -0.765167266f,
-    0.641481013f, -0.767138912f,
-    0.639124445f, -0.769103338f,
-    0.636761861f, -0.771060524f,
-    0.634393284f, -0.773010453f,
-    0.632018736f, -0.774953107f,
-    0.629638239f, -0.776888466f,
-    0.627251815f, -0.778816512f,
-    0.624859488f, -0.780737229f,
-    0.622461279f, -0.782650596f,
-    0.620057212f, -0.784556597f,
-    0.617647308f, -0.786455214f,
-    0.615231591f, -0.788346428f,
-    0.612810082f, -0.790230221f,
-    0.610382806f, -0.792106577f,
-    0.607949785f, -0.793975478f,
-    0.605511041f, -0.795836905f,
-    0.603066599f, -0.797690841f,
-    0.600616479f, -0.799537269f,
-    0.598160707f, -0.801376172f,
-    0.595699304f, -0.803207531f,
-    0.593232295f, -0.805031331f,
-    0.590759702f, -0.806847554f,
-    0.588281548f, -0.808656182f,
-    0.585797857f, -0.810457198f,
-    0.583308653f, -0.812250587f,
-    0.580813958f, -0.814036330f,
-    0.578313796f, -0.815814411f,
-    0.575808191f, -0.817584813f,
-    0.573297167f, -0.819347520f,
-    0.570780746f, -0.821102515f,
-    0.568258953f, -0.822849781f,
-    0.565731811f, -0.824589303f,
-    0.563199344f, -0.826321063f,
-    0.560661576f, -0.828045045f,
-    0.558118531f, -0.829761234f,
-    0.555570233f, -0.831469612f,
-    0.553016706f, -0.833170165f,
-    0.550457973f, -0.834862875f,
-    0.547894059f, -0.836547727f,
-    0.545324988f, -0.838224706f,
-    0.542750785f, -0.839893794f,
-    0.540171473f, -0.841554977f,
-    0.537587076f, -0.843208240f,
-    0.534997620f, -0.844853565f,
-    0.532403128f, -0.846490939f,
-    0.529803625f, -0.848120345f,
-    0.527199135f, -0.849741768f,
-    0.524589683f, -0.851355193f,
-    0.521975293f, -0.852960605f,
-    0.519355990f, -0.854557988f,
-    0.516731799f, -0.856147328f,
-    0.514102744f, -0.857728610f,
-    0.511468850f, -0.859301818f,
-    0.508830143f, -0.860866939f,
-    0.506186645f, -0.862423956f,
-    0.503538384f, -0.863972856f,
-    0.500885383f, -0.865513624f,
-    0.498227667f, -0.867046246f,
-    0.495565262f, -0.868570706f,
-    0.492898192f, -0.870086991f,
-    0.490226483f, -0.871595087f,
-    0.487550160f, -0.873094978f,
-    0.484869248f, -0.874586652f,
-    0.482183772f, -0.876070094f,
-    0.479493758f, -0.877545290f,
-    0.476799230f, -0.879012226f,
-    0.474100215f, -0.880470889f,
-    0.471396737f, -0.881921264f,
-    0.468688822f, -0.883363339f,
-    0.465976496f, -0.884797098f,
-    0.463259784f, -0.886222530f,
-    0.460538711f, -0.887639620f,
-    0.457813304f, -0.889048356f,
-    0.455083587f, -0.890448723f,
-    0.452349587f, -0.891840709f,
-    0.449611330f, -0.893224301f,
-    0.446868840f, -0.894599486f,
-    0.444122145f, -0.895966250f,
-    0.441371269f, -0.897324581f,
-    0.438616239f, -0.898674466f,
-    0.435857080f, -0.900015892f,
-    0.433093819f, -0.901348847f,
-    0.430326481f, -0.902673318f,
-    0.427555093f, -0.903989293f,
-    0.424779681f, -0.905296759f,
-    0.422000271f, -0.906595705f,
-    0.419216888f, -0.907886116f,
-    0.416429560f, -0.909167983f,
-    0.413638312f, -0.910441292f,
-    0.410843171f, -0.911706032f,
-    0.408044163f, -0.912962190f,
-    0.405241314f, -0.914209756f,
-    0.402434651f, -0.915448716f,
-    0.399624200f, -0.916679060f,
-    0.396809987f, -0.917900776f,
-    0.393992040f, -0.919113852f,
-    0.391170384f, -0.920318277f,
-    0.388345047f, -0.921514039f,
-    0.385516054f, -0.922701128f,
-    0.382683432f, -0.923879533f,
-    0.379847209f, -0.925049241f,
-    0.377007410f, -0.926210242f,
-    0.374164063f, -0.927362526f,
-    0.371317194f, -0.928506080f,
-    0.368466830f, -0.929640896f,
-    0.365612998f, -0.930766961f,
-    0.362755724f, -0.931884266f,
-    0.359895037f, -0.932992799f,
-    0.357030961f, -0.934092550f,
-    0.354163525f, -0.935183510f,
-    0.351292756f, -0.936265667f,
-    0.348418680f, -0.937339012f,
-    0.345541325f, -0.938403534f,
-    0.342660717f, -0.939459224f,
-    0.339776884f, -0.940506071f,
-    0.336889853f, -0.941544065f,
-    0.333999651f, -0.942573198f,
-    0.331106306f, -0.943593458f,
-    0.328209844f, -0.944604837f,
-    0.325310292f, -0.945607325f,
-    0.322407679f, -0.946600913f,
-    0.319502031f, -0.947585591f,
-    0.316593376f, -0.948561350f,
-    0.313681740f, -0.949528181f,
-    0.310767153f, -0.950486074f,
-    0.307849640f, -0.951435021f,
-    0.304929230f, -0.952375013f,
-    0.302005949f, -0.953306040f,
-    0.299079826f, -0.954228095f,
-    0.296150888f, -0.955141168f,
-    0.293219163f, -0.956045251f,
-    0.290284677f, -0.956940336f,
-    0.287347460f, -0.957826413f,
-    0.284407537f, -0.958703475f,
-    0.281464938f, -0.959571513f,
-    0.278519689f, -0.960430519f,
-    0.275571819f, -0.961280486f,
-    0.272621355f, -0.962121404f,
-    0.269668326f, -0.962953267f,
-    0.266712757f, -0.963776066f,
-    0.263754679f, -0.964589793f,
-    0.260794118f, -0.965394442f,
-    0.257831102f, -0.966190003f,
-    0.254865660f, -0.966976471f,
-    0.251897818f, -0.967753837f,
-    0.248927606f, -0.968522094f,
-    0.245955050f, -0.969281235f,
-    0.242980180f, -0.970031253f,
-    0.240003022f, -0.970772141f,
-    0.237023606f, -0.971503891f,
-    0.234041959f, -0.972226497f,
-    0.231058108f, -0.972939952f,
-    0.228072083f, -0.973644250f,
-    0.225083911f, -0.974339383f,
-    0.222093621f, -0.975025345f,
-    0.219101240f, -0.975702130f,
-    0.216106797f, -0.976369731f,
-    0.213110320f, -0.977028143f,
-    0.210111837f, -0.977677358f,
-    0.207111376f, -0.978317371f,
-    0.204108966f, -0.978948175f,
-    0.201104635f, -0.979569766f,
-    0.198098411f, -0.980182136f,
-    0.195090322f, -0.980785280f,
-    0.192080397f, -0.981379193f,
-    0.189068664f, -0.981963869f,
-    0.186055152f, -0.982539302f,
-    0.183039888f, -0.983105487f,
-    0.180022901f, -0.983662419f,
-    0.177004220f, -0.984210092f,
-    0.173983873f, -0.984748502f,
-    0.170961889f, -0.985277642f,
-    0.167938295f, -0.985797509f,
-    0.164913120f, -0.986308097f,
-    0.161886394f, -0.986809402f,
-    0.158858143f, -0.987301418f,
-    0.155828398f, -0.987784142f,
-    0.152797185f, -0.988257568f,
-    0.149764535f, -0.988721692f,
-    0.146730474f, -0.989176510f,
-    0.143695033f, -0.989622017f,
-    0.140658239f, -0.990058210f,
-    0.137620122f, -0.990485084f,
-    0.134580709f, -0.990902635f,
-    0.131540029f, -0.991310860f,
-    0.128498111f, -0.991709754f,
-    0.125454983f, -0.992099313f,
-    0.122410675f, -0.992479535f,
-    0.119365215f, -0.992850414f,
-    0.116318631f, -0.993211949f,
-    0.113270952f, -0.993564136f,
-    0.110222207f, -0.993906970f,
-    0.107172425f, -0.994240449f,
-    0.104121634f, -0.994564571f,
-    0.101069863f, -0.994879331f,
-    0.098017140f, -0.995184727f,
-    0.094963495f, -0.995480755f,
-    0.091908956f, -0.995767414f,
-    0.088853553f, -0.996044701f,
-    0.085797312f, -0.996312612f,
-    0.082740265f, -0.996571146f,
-    0.079682438f, -0.996820299f,
-    0.076623861f, -0.997060070f,
-    0.073564564f, -0.997290457f,
-    0.070504573f, -0.997511456f,
-    0.067443920f, -0.997723067f,
-    0.064382631f, -0.997925286f,
-    0.061320736f, -0.998118113f,
-    0.058258265f, -0.998301545f,
-    0.055195244f, -0.998475581f,
-    0.052131705f, -0.998640218f,
-    0.049067674f, -0.998795456f,
-    0.046003182f, -0.998941293f,
-    0.042938257f, -0.999077728f,
-    0.039872928f, -0.999204759f,
-    0.036807223f, -0.999322385f,
-    0.033741172f, -0.999430605f,
-    0.030674803f, -0.999529418f,
-    0.027608146f, -0.999618822f,
-    0.024541229f, -0.999698819f,
-    0.021474080f, -0.999769405f,
-    0.018406730f, -0.999830582f,
-    0.015339206f, -0.999882347f,
-    0.012271538f, -0.999924702f,
-    0.009203755f, -0.999957645f,
-    0.006135885f, -0.999981175f,
-    0.003067957f, -0.999995294f
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
-const float32_t twiddleCoef_rfft_4096[4096] = {
-    0.000000000f,  1.000000000f,
-    0.001533980f,  0.999998823f,
-    0.003067957f,  0.999995294f,
-    0.004601926f,  0.999989411f,
-    0.006135885f,  0.999981175f,
-    0.007669829f,  0.999970586f,
-    0.009203755f,  0.999957645f,
-    0.010737659f,  0.999942350f,
-    0.012271538f,  0.999924702f,
-    0.013805389f,  0.999904701f,
-    0.015339206f,  0.999882347f,
-    0.016872988f,  0.999857641f,
-    0.018406730f,  0.999830582f,
-    0.019940429f,  0.999801170f,
-    0.021474080f,  0.999769405f,
-    0.023007681f,  0.999735288f,
-    0.024541229f,  0.999698819f,
-    0.026074718f,  0.999659997f,
-    0.027608146f,  0.999618822f,
-    0.029141509f,  0.999575296f,
-    0.030674803f,  0.999529418f,
-    0.032208025f,  0.999481187f,
-    0.033741172f,  0.999430605f,
-    0.035274239f,  0.999377670f,
-    0.036807223f,  0.999322385f,
-    0.038340120f,  0.999264747f,
-    0.039872928f,  0.999204759f,
-    0.041405641f,  0.999142419f,
-    0.042938257f,  0.999077728f,
-    0.044470772f,  0.999010686f,
-    0.046003182f,  0.998941293f,
-    0.047535484f,  0.998869550f,
-    0.049067674f,  0.998795456f,
-    0.050599749f,  0.998719012f,
-    0.052131705f,  0.998640218f,
-    0.053663538f,  0.998559074f,
-    0.055195244f,  0.998475581f,
-    0.056726821f,  0.998389737f,
-    0.058258265f,  0.998301545f,
-    0.059789571f,  0.998211003f,
-    0.061320736f,  0.998118113f,
-    0.062851758f,  0.998022874f,
-    0.064382631f,  0.997925286f,
-    0.065913353f,  0.997825350f,
-    0.067443920f,  0.997723067f,
-    0.068974328f,  0.997618435f,
-    0.070504573f,  0.997511456f,
-    0.072034653f,  0.997402130f,
-    0.073564564f,  0.997290457f,
-    0.075094301f,  0.997176437f,
-    0.076623861f,  0.997060070f,
-    0.078153242f,  0.996941358f,
-    0.079682438f,  0.996820299f,
-    0.081211447f,  0.996696895f,
-    0.082740265f,  0.996571146f,
-    0.084268888f,  0.996443051f,
-    0.085797312f,  0.996312612f,
-    0.087325535f,  0.996179829f,
-    0.088853553f,  0.996044701f,
-    0.090381361f,  0.995907229f,
-    0.091908956f,  0.995767414f,
-    0.093436336f,  0.995625256f,
-    0.094963495f,  0.995480755f,
-    0.096490431f,  0.995333912f,
-    0.098017140f,  0.995184727f,
-    0.099543619f,  0.995033199f,
-    0.101069863f,  0.994879331f,
-    0.102595869f,  0.994723121f,
-    0.104121634f,  0.994564571f,
-    0.105647154f,  0.994403680f,
-    0.107172425f,  0.994240449f,
-    0.108697444f,  0.994074879f,
-    0.110222207f,  0.993906970f,
-    0.111746711f,  0.993736722f,
-    0.113270952f,  0.993564136f,
-    0.114794927f,  0.993389211f,
-    0.116318631f,  0.993211949f,
-    0.117842062f,  0.993032350f,
-    0.119365215f,  0.992850414f,
-    0.120888087f,  0.992666142f,
-    0.122410675f,  0.992479535f,
-    0.123932975f,  0.992290591f,
-    0.125454983f,  0.992099313f,
-    0.126976696f,  0.991905700f,
-    0.128498111f,  0.991709754f,
-    0.130019223f,  0.991511473f,
-    0.131540029f,  0.991310860f,
-    0.133060525f,  0.991107914f,
-    0.134580709f,  0.990902635f,
-    0.136100575f,  0.990695025f,
-    0.137620122f,  0.990485084f,
-    0.139139344f,  0.990272812f,
-    0.140658239f,  0.990058210f,
-    0.142176804f,  0.989841278f,
-    0.143695033f,  0.989622017f,
-    0.145212925f,  0.989400428f,
-    0.146730474f,  0.989176510f,
-    0.148247679f,  0.988950265f,
-    0.149764535f,  0.988721692f,
-    0.151281038f,  0.988490793f,
-    0.152797185f,  0.988257568f,
-    0.154312973f,  0.988022017f,
-    0.155828398f,  0.987784142f,
-    0.157343456f,  0.987543942f,
-    0.158858143f,  0.987301418f,
-    0.160372457f,  0.987056571f,
-    0.161886394f,  0.986809402f,
-    0.163399949f,  0.986559910f,
-    0.164913120f,  0.986308097f,
-    0.166425904f,  0.986053963f,
-    0.167938295f,  0.985797509f,
-    0.169450291f,  0.985538735f,
-    0.170961889f,  0.985277642f,
-    0.172473084f,  0.985014231f,
-    0.173983873f,  0.984748502f,
-    0.175494253f,  0.984480455f,
-    0.177004220f,  0.984210092f,
-    0.178513771f,  0.983937413f,
-    0.180022901f,  0.983662419f,
-    0.181531608f,  0.983385110f,
-    0.183039888f,  0.983105487f,
-    0.184547737f,  0.982823551f,
-    0.186055152f,  0.982539302f,
-    0.187562129f,  0.982252741f,
-    0.189068664f,  0.981963869f,
-    0.190574755f,  0.981672686f,
-    0.192080397f,  0.981379193f,
-    0.193585587f,  0.981083391f,
-    0.195090322f,  0.980785280f,
-    0.196594598f,  0.980484862f,
-    0.198098411f,  0.980182136f,
-    0.199601758f,  0.979877104f,
-    0.201104635f,  0.979569766f,
-    0.202607039f,  0.979260123f,
-    0.204108966f,  0.978948175f,
-    0.205610413f,  0.978633924f,
-    0.207111376f,  0.978317371f,
-    0.208611852f,  0.977998515f,
-    0.210111837f,  0.977677358f,
-    0.211611327f,  0.977353900f,
-    0.213110320f,  0.977028143f,
-    0.214608811f,  0.976700086f,
-    0.216106797f,  0.976369731f,
-    0.217604275f,  0.976037079f,
-    0.219101240f,  0.975702130f,
-    0.220597690f,  0.975364885f,
-    0.222093621f,  0.975025345f,
-    0.223589029f,  0.974683511f,
-    0.225083911f,  0.974339383f,
-    0.226578264f,  0.973992962f,
-    0.228072083f,  0.973644250f,
-    0.229565366f,  0.973293246f,
-    0.231058108f,  0.972939952f,
-    0.232550307f,  0.972584369f,
-    0.234041959f,  0.972226497f,
-    0.235533059f,  0.971866337f,
-    0.237023606f,  0.971503891f,
-    0.238513595f,  0.971139158f,
-    0.240003022f,  0.970772141f,
-    0.241491885f,  0.970402839f,
-    0.242980180f,  0.970031253f,
-    0.244467903f,  0.969657385f,
-    0.245955050f,  0.969281235f,
-    0.247441619f,  0.968902805f,
-    0.248927606f,  0.968522094f,
-    0.250413007f,  0.968139105f,
-    0.251897818f,  0.967753837f,
-    0.253382037f,  0.967366292f,
-    0.254865660f,  0.966976471f,
-    0.256348682f,  0.966584374f,
-    0.257831102f,  0.966190003f,
-    0.259312915f,  0.965793359f,
-    0.260794118f,  0.965394442f,
-    0.262274707f,  0.964993253f,
-    0.263754679f,  0.964589793f,
-    0.265234030f,  0.964184064f,
-    0.266712757f,  0.963776066f,
-    0.268190857f,  0.963365800f,
-    0.269668326f,  0.962953267f,
-    0.271145160f,  0.962538468f,
-    0.272621355f,  0.962121404f,
-    0.274096910f,  0.961702077f,
-    0.275571819f,  0.961280486f,
-    0.277046080f,  0.960856633f,
-    0.278519689f,  0.960430519f,
-    0.279992643f,  0.960002146f,
-    0.281464938f,  0.959571513f,
-    0.282936570f,  0.959138622f,
-    0.284407537f,  0.958703475f,
-    0.285877835f,  0.958266071f,
-    0.287347460f,  0.957826413f,
-    0.288816408f,  0.957384501f,
-    0.290284677f,  0.956940336f,
-    0.291752263f,  0.956493919f,
-    0.293219163f,  0.956045251f,
-    0.294685372f,  0.955594334f,
-    0.296150888f,  0.955141168f,
-    0.297615707f,  0.954685755f,
-    0.299079826f,  0.954228095f,
-    0.300543241f,  0.953768190f,
-    0.302005949f,  0.953306040f,
-    0.303467947f,  0.952841648f,
-    0.304929230f,  0.952375013f,
-    0.306389795f,  0.951906137f,
-    0.307849640f,  0.951435021f,
-    0.309308760f,  0.950961666f,
-    0.310767153f,  0.950486074f,
-    0.312224814f,  0.950008245f,
-    0.313681740f,  0.949528181f,
-    0.315137929f,  0.949045882f,
-    0.316593376f,  0.948561350f,
-    0.318048077f,  0.948074586f,
-    0.319502031f,  0.947585591f,
-    0.320955232f,  0.947094366f,
-    0.322407679f,  0.946600913f,
-    0.323859367f,  0.946105232f,
-    0.325310292f,  0.945607325f,
-    0.326760452f,  0.945107193f,
-    0.328209844f,  0.944604837f,
-    0.329658463f,  0.944100258f,
-    0.331106306f,  0.943593458f,
-    0.332553370f,  0.943084437f,
-    0.333999651f,  0.942573198f,
-    0.335445147f,  0.942059740f,
-    0.336889853f,  0.941544065f,
-    0.338333767f,  0.941026175f,
-    0.339776884f,  0.940506071f,
-    0.341219202f,  0.939983753f,
-    0.342660717f,  0.939459224f,
-    0.344101426f,  0.938932484f,
-    0.345541325f,  0.938403534f,
-    0.346980411f,  0.937872376f,
-    0.348418680f,  0.937339012f,
-    0.349856130f,  0.936803442f,
-    0.351292756f,  0.936265667f,
-    0.352728556f,  0.935725689f,
-    0.354163525f,  0.935183510f,
-    0.355597662f,  0.934639130f,
-    0.357030961f,  0.934092550f,
-    0.358463421f,  0.933543773f,
-    0.359895037f,  0.932992799f,
-    0.361325806f,  0.932439629f,
-    0.362755724f,  0.931884266f,
-    0.364184790f,  0.931326709f,
-    0.365612998f,  0.930766961f,
-    0.367040346f,  0.930205023f,
-    0.368466830f,  0.929640896f,
-    0.369892447f,  0.929074581f,
-    0.371317194f,  0.928506080f,
-    0.372741067f,  0.927935395f,
-    0.374164063f,  0.927362526f,
-    0.375586178f,  0.926787474f,
-    0.377007410f,  0.926210242f,
-    0.378427755f,  0.925630831f,
-    0.379847209f,  0.925049241f,
-    0.381265769f,  0.924465474f,
-    0.382683432f,  0.923879533f,
-    0.384100195f,  0.923291417f,
-    0.385516054f,  0.922701128f,
-    0.386931006f,  0.922108669f,
-    0.388345047f,  0.921514039f,
-    0.389758174f,  0.920917242f,
-    0.391170384f,  0.920318277f,
-    0.392581674f,  0.919717146f,
-    0.393992040f,  0.919113852f,
-    0.395401479f,  0.918508394f,
-    0.396809987f,  0.917900776f,
-    0.398217562f,  0.917290997f,
-    0.399624200f,  0.916679060f,
-    0.401029897f,  0.916064966f,
-    0.402434651f,  0.915448716f,
-    0.403838458f,  0.914830312f,
-    0.405241314f,  0.914209756f,
-    0.406643217f,  0.913587048f,
-    0.408044163f,  0.912962190f,
-    0.409444149f,  0.912335185f,
-    0.410843171f,  0.911706032f,
-    0.412241227f,  0.911074734f,
-    0.413638312f,  0.910441292f,
-    0.415034424f,  0.909805708f,
-    0.416429560f,  0.909167983f,
-    0.417823716f,  0.908528119f,
-    0.419216888f,  0.907886116f,
-    0.420609074f,  0.907241978f,
-    0.422000271f,  0.906595705f,
-    0.423390474f,  0.905947298f,
-    0.424779681f,  0.905296759f,
-    0.426167889f,  0.904644091f,
-    0.427555093f,  0.903989293f,
-    0.428941292f,  0.903332368f,
-    0.430326481f,  0.902673318f,
-    0.431710658f,  0.902012144f,
-    0.433093819f,  0.901348847f,
-    0.434475961f,  0.900683429f,
-    0.435857080f,  0.900015892f,
-    0.437237174f,  0.899346237f,
-    0.438616239f,  0.898674466f,
-    0.439994271f,  0.898000580f,
-    0.441371269f,  0.897324581f,
-    0.442747228f,  0.896646470f,
-    0.444122145f,  0.895966250f,
-    0.445496017f,  0.895283921f,
-    0.446868840f,  0.894599486f,
-    0.448240612f,  0.893912945f,
-    0.449611330f,  0.893224301f,
-    0.450980989f,  0.892533555f,
-    0.452349587f,  0.891840709f,
-    0.453717121f,  0.891145765f,
-    0.455083587f,  0.890448723f,
-    0.456448982f,  0.889749586f,
-    0.457813304f,  0.889048356f,
-    0.459176548f,  0.888345033f,
-    0.460538711f,  0.887639620f,
-    0.461899791f,  0.886932119f,
-    0.463259784f,  0.886222530f,
-    0.464618686f,  0.885510856f,
-    0.465976496f,  0.884797098f,
-    0.467333209f,  0.884081259f,
-    0.468688822f,  0.883363339f,
-    0.470043332f,  0.882643340f,
-    0.471396737f,  0.881921264f,
-    0.472749032f,  0.881197113f,
-    0.474100215f,  0.880470889f,
-    0.475450282f,  0.879742593f,
-    0.476799230f,  0.879012226f,
-    0.478147056f,  0.878279792f,
-    0.479493758f,  0.877545290f,
-    0.480839331f,  0.876808724f,
-    0.482183772f,  0.876070094f,
-    0.483527079f,  0.875329403f,
-    0.484869248f,  0.874586652f,
-    0.486210276f,  0.873841843f,
-    0.487550160f,  0.873094978f,
-    0.488888897f,  0.872346059f,
-    0.490226483f,  0.871595087f,
-    0.491562916f,  0.870842063f,
-    0.492898192f,  0.870086991f,
-    0.494232309f,  0.869329871f,
-    0.495565262f,  0.868570706f,
-    0.496897049f,  0.867809497f,
-    0.498227667f,  0.867046246f,
-    0.499557113f,  0.866280954f,
-    0.500885383f,  0.865513624f,
-    0.502212474f,  0.864744258f,
-    0.503538384f,  0.863972856f,
-    0.504863109f,  0.863199422f,
-    0.506186645f,  0.862423956f,
-    0.507508991f,  0.861646461f,
-    0.508830143f,  0.860866939f,
-    0.510150097f,  0.860085390f,
-    0.511468850f,  0.859301818f,
-    0.512786401f,  0.858516224f,
-    0.514102744f,  0.857728610f,
-    0.515417878f,  0.856938977f,
-    0.516731799f,  0.856147328f,
-    0.518044504f,  0.855353665f,
-    0.519355990f,  0.854557988f,
-    0.520666254f,  0.853760301f,
-    0.521975293f,  0.852960605f,
-    0.523283103f,  0.852158902f,
-    0.524589683f,  0.851355193f,
-    0.525895027f,  0.850549481f,
-    0.527199135f,  0.849741768f,
-    0.528502002f,  0.848932055f,
-    0.529803625f,  0.848120345f,
-    0.531104001f,  0.847306639f,
-    0.532403128f,  0.846490939f,
-    0.533701002f,  0.845673247f,
-    0.534997620f,  0.844853565f,
-    0.536292979f,  0.844031895f,
-    0.537587076f,  0.843208240f,
-    0.538879909f,  0.842382600f,
-    0.540171473f,  0.841554977f,
-    0.541461766f,  0.840725375f,
-    0.542750785f,  0.839893794f,
-    0.544038527f,  0.839060237f,
-    0.545324988f,  0.838224706f,
-    0.546610167f,  0.837387202f,
-    0.547894059f,  0.836547727f,
-    0.549176662f,  0.835706284f,
-    0.550457973f,  0.834862875f,
-    0.551737988f,  0.834017501f,
-    0.553016706f,  0.833170165f,
-    0.554294121f,  0.832320868f,
-    0.555570233f,  0.831469612f,
-    0.556845037f,  0.830616400f,
-    0.558118531f,  0.829761234f,
-    0.559390712f,  0.828904115f,
-    0.560661576f,  0.828045045f,
-    0.561931121f,  0.827184027f,
-    0.563199344f,  0.826321063f,
-    0.564466242f,  0.825456154f,
-    0.565731811f,  0.824589303f,
-    0.566996049f,  0.823720511f,
-    0.568258953f,  0.822849781f,
-    0.569520519f,  0.821977115f,
-    0.570780746f,  0.821102515f,
-    0.572039629f,  0.820225983f,
-    0.573297167f,  0.819347520f,
-    0.574553355f,  0.818467130f,
-    0.575808191f,  0.817584813f,
-    0.577061673f,  0.816700573f,
-    0.578313796f,  0.815814411f,
-    0.579564559f,  0.814926329f,
-    0.580813958f,  0.814036330f,
-    0.582061990f,  0.813144415f,
-    0.583308653f,  0.812250587f,
-    0.584553943f,  0.811354847f,
-    0.585797857f,  0.810457198f,
-    0.587040394f,  0.809557642f,
-    0.588281548f,  0.808656182f,
-    0.589521319f,  0.807752818f,
-    0.590759702f,  0.806847554f,
-    0.591996695f,  0.805940391f,
-    0.593232295f,  0.805031331f,
-    0.594466499f,  0.804120377f,
-    0.595699304f,  0.803207531f,
-    0.596930708f,  0.802292796f,
-    0.598160707f,  0.801376172f,
-    0.599389298f,  0.800457662f,
-    0.600616479f,  0.799537269f,
-    0.601842247f,  0.798614995f,
-    0.603066599f,  0.797690841f,
-    0.604289531f,  0.796764810f,
-    0.605511041f,  0.795836905f,
-    0.606731127f,  0.794907126f,
-    0.607949785f,  0.793975478f,
-    0.609167012f,  0.793041960f,
-    0.610382806f,  0.792106577f,
-    0.611597164f,  0.791169330f,
-    0.612810082f,  0.790230221f,
-    0.614021559f,  0.789289253f,
-    0.615231591f,  0.788346428f,
-    0.616440175f,  0.787401747f,
-    0.617647308f,  0.786455214f,
-    0.618852988f,  0.785506830f,
-    0.620057212f,  0.784556597f,
-    0.621259977f,  0.783604519f,
-    0.622461279f,  0.782650596f,
-    0.623661118f,  0.781694832f,
-    0.624859488f,  0.780737229f,
-    0.626056388f,  0.779777788f,
-    0.627251815f,  0.778816512f,
-    0.628445767f,  0.777853404f,
-    0.629638239f,  0.776888466f,
-    0.630829230f,  0.775921699f,
-    0.632018736f,  0.774953107f,
-    0.633206755f,  0.773982691f,
-    0.634393284f,  0.773010453f,
-    0.635578320f,  0.772036397f,
-    0.636761861f,  0.771060524f,
-    0.637943904f,  0.770082837f,
-    0.639124445f,  0.769103338f,
-    0.640303482f,  0.768122029f,
-    0.641481013f,  0.767138912f,
-    0.642657034f,  0.766153990f,
-    0.643831543f,  0.765167266f,
-    0.645004537f,  0.764178741f,
-    0.646176013f,  0.763188417f,
-    0.647345969f,  0.762196298f,
-    0.648514401f,  0.761202385f,
-    0.649681307f,  0.760206682f,
-    0.650846685f,  0.759209189f,
-    0.652010531f,  0.758209910f,
-    0.653172843f,  0.757208847f,
-    0.654333618f,  0.756206001f,
-    0.655492853f,  0.755201377f,
-    0.656650546f,  0.754194975f,
-    0.657806693f,  0.753186799f,
-    0.658961293f,  0.752176850f,
-    0.660114342f,  0.751165132f,
-    0.661265838f,  0.750151646f,
-    0.662415778f,  0.749136395f,
-    0.663564159f,  0.748119380f,
-    0.664710978f,  0.747100606f,
-    0.665856234f,  0.746080074f,
-    0.666999922f,  0.745057785f,
-    0.668142041f,  0.744033744f,
-    0.669282588f,  0.743007952f,
-    0.670421560f,  0.741980412f,
-    0.671558955f,  0.740951125f,
-    0.672694769f,  0.739920095f,
-    0.673829000f,  0.738887324f,
-    0.674961646f,  0.737852815f,
-    0.676092704f,  0.736816569f,
-    0.677222170f,  0.735778589f,
-    0.678350043f,  0.734738878f,
-    0.679476320f,  0.733697438f,
-    0.680600998f,  0.732654272f,
-    0.681724074f,  0.731609381f,
-    0.682845546f,  0.730562769f,
-    0.683965412f,  0.729514438f,
-    0.685083668f,  0.728464390f,
-    0.686200312f,  0.727412629f,
-    0.687315341f,  0.726359155f,
-    0.688428753f,  0.725303972f,
-    0.689540545f,  0.724247083f,
-    0.690650714f,  0.723188489f,
-    0.691759258f,  0.722128194f,
-    0.692866175f,  0.721066199f,
-    0.693971461f,  0.720002508f,
-    0.695075114f,  0.718937122f,
-    0.696177131f,  0.717870045f,
-    0.697277511f,  0.716801279f,
-    0.698376249f,  0.715730825f,
-    0.699473345f,  0.714658688f,
-    0.700568794f,  0.713584869f,
-    0.701662595f,  0.712509371f,
-    0.702754744f,  0.711432196f,
-    0.703845241f,  0.710353347f,
-    0.704934080f,  0.709272826f,
-    0.706021261f,  0.708190637f,
-    0.707106781f,  0.707106781f,
-    0.708190637f,  0.706021261f,
-    0.709272826f,  0.704934080f,
-    0.710353347f,  0.703845241f,
-    0.711432196f,  0.702754744f,
-    0.712509371f,  0.701662595f,
-    0.713584869f,  0.700568794f,
-    0.714658688f,  0.699473345f,
-    0.715730825f,  0.698376249f,
-    0.716801279f,  0.697277511f,
-    0.717870045f,  0.696177131f,
-    0.718937122f,  0.695075114f,
-    0.720002508f,  0.693971461f,
-    0.721066199f,  0.692866175f,
-    0.722128194f,  0.691759258f,
-    0.723188489f,  0.690650714f,
-    0.724247083f,  0.689540545f,
-    0.725303972f,  0.688428753f,
-    0.726359155f,  0.687315341f,
-    0.727412629f,  0.686200312f,
-    0.728464390f,  0.685083668f,
-    0.729514438f,  0.683965412f,
-    0.730562769f,  0.682845546f,
-    0.731609381f,  0.681724074f,
-    0.732654272f,  0.680600998f,
-    0.733697438f,  0.679476320f,
-    0.734738878f,  0.678350043f,
-    0.735778589f,  0.677222170f,
-    0.736816569f,  0.676092704f,
-    0.737852815f,  0.674961646f,
-    0.738887324f,  0.673829000f,
-    0.739920095f,  0.672694769f,
-    0.740951125f,  0.671558955f,
-    0.741980412f,  0.670421560f,
-    0.743007952f,  0.669282588f,
-    0.744033744f,  0.668142041f,
-    0.745057785f,  0.666999922f,
-    0.746080074f,  0.665856234f,
-    0.747100606f,  0.664710978f,
-    0.748119380f,  0.663564159f,
-    0.749136395f,  0.662415778f,
-    0.750151646f,  0.661265838f,
-    0.751165132f,  0.660114342f,
-    0.752176850f,  0.658961293f,
-    0.753186799f,  0.657806693f,
-    0.754194975f,  0.656650546f,
-    0.755201377f,  0.655492853f,
-    0.756206001f,  0.654333618f,
-    0.757208847f,  0.653172843f,
-    0.758209910f,  0.652010531f,
-    0.759209189f,  0.650846685f,
-    0.760206682f,  0.649681307f,
-    0.761202385f,  0.648514401f,
-    0.762196298f,  0.647345969f,
-    0.763188417f,  0.646176013f,
-    0.764178741f,  0.645004537f,
-    0.765167266f,  0.643831543f,
-    0.766153990f,  0.642657034f,
-    0.767138912f,  0.641481013f,
-    0.768122029f,  0.640303482f,
-    0.769103338f,  0.639124445f,
-    0.770082837f,  0.637943904f,
-    0.771060524f,  0.636761861f,
-    0.772036397f,  0.635578320f,
-    0.773010453f,  0.634393284f,
-    0.773982691f,  0.633206755f,
-    0.774953107f,  0.632018736f,
-    0.775921699f,  0.630829230f,
-    0.776888466f,  0.629638239f,
-    0.777853404f,  0.628445767f,
-    0.778816512f,  0.627251815f,
-    0.779777788f,  0.626056388f,
-    0.780737229f,  0.624859488f,
-    0.781694832f,  0.623661118f,
-    0.782650596f,  0.622461279f,
-    0.783604519f,  0.621259977f,
-    0.784556597f,  0.620057212f,
-    0.785506830f,  0.618852988f,
-    0.786455214f,  0.617647308f,
-    0.787401747f,  0.616440175f,
-    0.788346428f,  0.615231591f,
-    0.789289253f,  0.614021559f,
-    0.790230221f,  0.612810082f,
-    0.791169330f,  0.611597164f,
-    0.792106577f,  0.610382806f,
-    0.793041960f,  0.609167012f,
-    0.793975478f,  0.607949785f,
-    0.794907126f,  0.606731127f,
-    0.795836905f,  0.605511041f,
-    0.796764810f,  0.604289531f,
-    0.797690841f,  0.603066599f,
-    0.798614995f,  0.601842247f,
-    0.799537269f,  0.600616479f,
-    0.800457662f,  0.599389298f,
-    0.801376172f,  0.598160707f,
-    0.802292796f,  0.596930708f,
-    0.803207531f,  0.595699304f,
-    0.804120377f,  0.594466499f,
-    0.805031331f,  0.593232295f,
-    0.805940391f,  0.591996695f,
-    0.806847554f,  0.590759702f,
-    0.807752818f,  0.589521319f,
-    0.808656182f,  0.588281548f,
-    0.809557642f,  0.587040394f,
-    0.810457198f,  0.585797857f,
-    0.811354847f,  0.584553943f,
-    0.812250587f,  0.583308653f,
-    0.813144415f,  0.582061990f,
-    0.814036330f,  0.580813958f,
-    0.814926329f,  0.579564559f,
-    0.815814411f,  0.578313796f,
-    0.816700573f,  0.577061673f,
-    0.817584813f,  0.575808191f,
-    0.818467130f,  0.574553355f,
-    0.819347520f,  0.573297167f,
-    0.820225983f,  0.572039629f,
-    0.821102515f,  0.570780746f,
-    0.821977115f,  0.569520519f,
-    0.822849781f,  0.568258953f,
-    0.823720511f,  0.566996049f,
-    0.824589303f,  0.565731811f,
-    0.825456154f,  0.564466242f,
-    0.826321063f,  0.563199344f,
-    0.827184027f,  0.561931121f,
-    0.828045045f,  0.560661576f,
-    0.828904115f,  0.559390712f,
-    0.829761234f,  0.558118531f,
-    0.830616400f,  0.556845037f,
-    0.831469612f,  0.555570233f,
-    0.832320868f,  0.554294121f,
-    0.833170165f,  0.553016706f,
-    0.834017501f,  0.551737988f,
-    0.834862875f,  0.550457973f,
-    0.835706284f,  0.549176662f,
-    0.836547727f,  0.547894059f,
-    0.837387202f,  0.546610167f,
-    0.838224706f,  0.545324988f,
-    0.839060237f,  0.544038527f,
-    0.839893794f,  0.542750785f,
-    0.840725375f,  0.541461766f,
-    0.841554977f,  0.540171473f,
-    0.842382600f,  0.538879909f,
-    0.843208240f,  0.537587076f,
-    0.844031895f,  0.536292979f,
-    0.844853565f,  0.534997620f,
-    0.845673247f,  0.533701002f,
-    0.846490939f,  0.532403128f,
-    0.847306639f,  0.531104001f,
-    0.848120345f,  0.529803625f,
-    0.848932055f,  0.528502002f,
-    0.849741768f,  0.527199135f,
-    0.850549481f,  0.525895027f,
-    0.851355193f,  0.524589683f,
-    0.852158902f,  0.523283103f,
-    0.852960605f,  0.521975293f,
-    0.853760301f,  0.520666254f,
-    0.854557988f,  0.519355990f,
-    0.855353665f,  0.518044504f,
-    0.856147328f,  0.516731799f,
-    0.856938977f,  0.515417878f,
-    0.857728610f,  0.514102744f,
-    0.858516224f,  0.512786401f,
-    0.859301818f,  0.511468850f,
-    0.860085390f,  0.510150097f,
-    0.860866939f,  0.508830143f,
-    0.861646461f,  0.507508991f,
-    0.862423956f,  0.506186645f,
-    0.863199422f,  0.504863109f,
-    0.863972856f,  0.503538384f,
-    0.864744258f,  0.502212474f,
-    0.865513624f,  0.500885383f,
-    0.866280954f,  0.499557113f,
-    0.867046246f,  0.498227667f,
-    0.867809497f,  0.496897049f,
-    0.868570706f,  0.495565262f,
-    0.869329871f,  0.494232309f,
-    0.870086991f,  0.492898192f,
-    0.870842063f,  0.491562916f,
-    0.871595087f,  0.490226483f,
-    0.872346059f,  0.488888897f,
-    0.873094978f,  0.487550160f,
-    0.873841843f,  0.486210276f,
-    0.874586652f,  0.484869248f,
-    0.875329403f,  0.483527079f,
-    0.876070094f,  0.482183772f,
-    0.876808724f,  0.480839331f,
-    0.877545290f,  0.479493758f,
-    0.878279792f,  0.478147056f,
-    0.879012226f,  0.476799230f,
-    0.879742593f,  0.475450282f,
-    0.880470889f,  0.474100215f,
-    0.881197113f,  0.472749032f,
-    0.881921264f,  0.471396737f,
-    0.882643340f,  0.470043332f,
-    0.883363339f,  0.468688822f,
-    0.884081259f,  0.467333209f,
-    0.884797098f,  0.465976496f,
-    0.885510856f,  0.464618686f,
-    0.886222530f,  0.463259784f,
-    0.886932119f,  0.461899791f,
-    0.887639620f,  0.460538711f,
-    0.888345033f,  0.459176548f,
-    0.889048356f,  0.457813304f,
-    0.889749586f,  0.456448982f,
-    0.890448723f,  0.455083587f,
-    0.891145765f,  0.453717121f,
-    0.891840709f,  0.452349587f,
-    0.892533555f,  0.450980989f,
-    0.893224301f,  0.449611330f,
-    0.893912945f,  0.448240612f,
-    0.894599486f,  0.446868840f,
-    0.895283921f,  0.445496017f,
-    0.895966250f,  0.444122145f,
-    0.896646470f,  0.442747228f,
-    0.897324581f,  0.441371269f,
-    0.898000580f,  0.439994271f,
-    0.898674466f,  0.438616239f,
-    0.899346237f,  0.437237174f,
-    0.900015892f,  0.435857080f,
-    0.900683429f,  0.434475961f,
-    0.901348847f,  0.433093819f,
-    0.902012144f,  0.431710658f,
-    0.902673318f,  0.430326481f,
-    0.903332368f,  0.428941292f,
-    0.903989293f,  0.427555093f,
-    0.904644091f,  0.426167889f,
-    0.905296759f,  0.424779681f,
-    0.905947298f,  0.423390474f,
-    0.906595705f,  0.422000271f,
-    0.907241978f,  0.420609074f,
-    0.907886116f,  0.419216888f,
-    0.908528119f,  0.417823716f,
-    0.909167983f,  0.416429560f,
-    0.909805708f,  0.415034424f,
-    0.910441292f,  0.413638312f,
-    0.911074734f,  0.412241227f,
-    0.911706032f,  0.410843171f,
-    0.912335185f,  0.409444149f,
-    0.912962190f,  0.408044163f,
-    0.913587048f,  0.406643217f,
-    0.914209756f,  0.405241314f,
-    0.914830312f,  0.403838458f,
-    0.915448716f,  0.402434651f,
-    0.916064966f,  0.401029897f,
-    0.916679060f,  0.399624200f,
-    0.917290997f,  0.398217562f,
-    0.917900776f,  0.396809987f,
-    0.918508394f,  0.395401479f,
-    0.919113852f,  0.393992040f,
-    0.919717146f,  0.392581674f,
-    0.920318277f,  0.391170384f,
-    0.920917242f,  0.389758174f,
-    0.921514039f,  0.388345047f,
-    0.922108669f,  0.386931006f,
-    0.922701128f,  0.385516054f,
-    0.923291417f,  0.384100195f,
-    0.923879533f,  0.382683432f,
-    0.924465474f,  0.381265769f,
-    0.925049241f,  0.379847209f,
-    0.925630831f,  0.378427755f,
-    0.926210242f,  0.377007410f,
-    0.926787474f,  0.375586178f,
-    0.927362526f,  0.374164063f,
-    0.927935395f,  0.372741067f,
-    0.928506080f,  0.371317194f,
-    0.929074581f,  0.369892447f,
-    0.929640896f,  0.368466830f,
-    0.930205023f,  0.367040346f,
-    0.930766961f,  0.365612998f,
-    0.931326709f,  0.364184790f,
-    0.931884266f,  0.362755724f,
-    0.932439629f,  0.361325806f,
-    0.932992799f,  0.359895037f,
-    0.933543773f,  0.358463421f,
-    0.934092550f,  0.357030961f,
-    0.934639130f,  0.355597662f,
-    0.935183510f,  0.354163525f,
-    0.935725689f,  0.352728556f,
-    0.936265667f,  0.351292756f,
-    0.936803442f,  0.349856130f,
-    0.937339012f,  0.348418680f,
-    0.937872376f,  0.346980411f,
-    0.938403534f,  0.345541325f,
-    0.938932484f,  0.344101426f,
-    0.939459224f,  0.342660717f,
-    0.939983753f,  0.341219202f,
-    0.940506071f,  0.339776884f,
-    0.941026175f,  0.338333767f,
-    0.941544065f,  0.336889853f,
-    0.942059740f,  0.335445147f,
-    0.942573198f,  0.333999651f,
-    0.943084437f,  0.332553370f,
-    0.943593458f,  0.331106306f,
-    0.944100258f,  0.329658463f,
-    0.944604837f,  0.328209844f,
-    0.945107193f,  0.326760452f,
-    0.945607325f,  0.325310292f,
-    0.946105232f,  0.323859367f,
-    0.946600913f,  0.322407679f,
-    0.947094366f,  0.320955232f,
-    0.947585591f,  0.319502031f,
-    0.948074586f,  0.318048077f,
-    0.948561350f,  0.316593376f,
-    0.949045882f,  0.315137929f,
-    0.949528181f,  0.313681740f,
-    0.950008245f,  0.312224814f,
-    0.950486074f,  0.310767153f,
-    0.950961666f,  0.309308760f,
-    0.951435021f,  0.307849640f,
-    0.951906137f,  0.306389795f,
-    0.952375013f,  0.304929230f,
-    0.952841648f,  0.303467947f,
-    0.953306040f,  0.302005949f,
-    0.953768190f,  0.300543241f,
-    0.954228095f,  0.299079826f,
-    0.954685755f,  0.297615707f,
-    0.955141168f,  0.296150888f,
-    0.955594334f,  0.294685372f,
-    0.956045251f,  0.293219163f,
-    0.956493919f,  0.291752263f,
-    0.956940336f,  0.290284677f,
-    0.957384501f,  0.288816408f,
-    0.957826413f,  0.287347460f,
-    0.958266071f,  0.285877835f,
-    0.958703475f,  0.284407537f,
-    0.959138622f,  0.282936570f,
-    0.959571513f,  0.281464938f,
-    0.960002146f,  0.279992643f,
-    0.960430519f,  0.278519689f,
-    0.960856633f,  0.277046080f,
-    0.961280486f,  0.275571819f,
-    0.961702077f,  0.274096910f,
-    0.962121404f,  0.272621355f,
-    0.962538468f,  0.271145160f,
-    0.962953267f,  0.269668326f,
-    0.963365800f,  0.268190857f,
-    0.963776066f,  0.266712757f,
-    0.964184064f,  0.265234030f,
-    0.964589793f,  0.263754679f,
-    0.964993253f,  0.262274707f,
-    0.965394442f,  0.260794118f,
-    0.965793359f,  0.259312915f,
-    0.966190003f,  0.257831102f,
-    0.966584374f,  0.256348682f,
-    0.966976471f,  0.254865660f,
-    0.967366292f,  0.253382037f,
-    0.967753837f,  0.251897818f,
-    0.968139105f,  0.250413007f,
-    0.968522094f,  0.248927606f,
-    0.968902805f,  0.247441619f,
-    0.969281235f,  0.245955050f,
-    0.969657385f,  0.244467903f,
-    0.970031253f,  0.242980180f,
-    0.970402839f,  0.241491885f,
-    0.970772141f,  0.240003022f,
-    0.971139158f,  0.238513595f,
-    0.971503891f,  0.237023606f,
-    0.971866337f,  0.235533059f,
-    0.972226497f,  0.234041959f,
-    0.972584369f,  0.232550307f,
-    0.972939952f,  0.231058108f,
-    0.973293246f,  0.229565366f,
-    0.973644250f,  0.228072083f,
-    0.973992962f,  0.226578264f,
-    0.974339383f,  0.225083911f,
-    0.974683511f,  0.223589029f,
-    0.975025345f,  0.222093621f,
-    0.975364885f,  0.220597690f,
-    0.975702130f,  0.219101240f,
-    0.976037079f,  0.217604275f,
-    0.976369731f,  0.216106797f,
-    0.976700086f,  0.214608811f,
-    0.977028143f,  0.213110320f,
-    0.977353900f,  0.211611327f,
-    0.977677358f,  0.210111837f,
-    0.977998515f,  0.208611852f,
-    0.978317371f,  0.207111376f,
-    0.978633924f,  0.205610413f,
-    0.978948175f,  0.204108966f,
-    0.979260123f,  0.202607039f,
-    0.979569766f,  0.201104635f,
-    0.979877104f,  0.199601758f,
-    0.980182136f,  0.198098411f,
-    0.980484862f,  0.196594598f,
-    0.980785280f,  0.195090322f,
-    0.981083391f,  0.193585587f,
-    0.981379193f,  0.192080397f,
-    0.981672686f,  0.190574755f,
-    0.981963869f,  0.189068664f,
-    0.982252741f,  0.187562129f,
-    0.982539302f,  0.186055152f,
-    0.982823551f,  0.184547737f,
-    0.983105487f,  0.183039888f,
-    0.983385110f,  0.181531608f,
-    0.983662419f,  0.180022901f,
-    0.983937413f,  0.178513771f,
-    0.984210092f,  0.177004220f,
-    0.984480455f,  0.175494253f,
-    0.984748502f,  0.173983873f,
-    0.985014231f,  0.172473084f,
-    0.985277642f,  0.170961889f,
-    0.985538735f,  0.169450291f,
-    0.985797509f,  0.167938295f,
-    0.986053963f,  0.166425904f,
-    0.986308097f,  0.164913120f,
-    0.986559910f,  0.163399949f,
-    0.986809402f,  0.161886394f,
-    0.987056571f,  0.160372457f,
-    0.987301418f,  0.158858143f,
-    0.987543942f,  0.157343456f,
-    0.987784142f,  0.155828398f,
-    0.988022017f,  0.154312973f,
-    0.988257568f,  0.152797185f,
-    0.988490793f,  0.151281038f,
-    0.988721692f,  0.149764535f,
-    0.988950265f,  0.148247679f,
-    0.989176510f,  0.146730474f,
-    0.989400428f,  0.145212925f,
-    0.989622017f,  0.143695033f,
-    0.989841278f,  0.142176804f,
-    0.990058210f,  0.140658239f,
-    0.990272812f,  0.139139344f,
-    0.990485084f,  0.137620122f,
-    0.990695025f,  0.136100575f,
-    0.990902635f,  0.134580709f,
-    0.991107914f,  0.133060525f,
-    0.991310860f,  0.131540029f,
-    0.991511473f,  0.130019223f,
-    0.991709754f,  0.128498111f,
-    0.991905700f,  0.126976696f,
-    0.992099313f,  0.125454983f,
-    0.992290591f,  0.123932975f,
-    0.992479535f,  0.122410675f,
-    0.992666142f,  0.120888087f,
-    0.992850414f,  0.119365215f,
-    0.993032350f,  0.117842062f,
-    0.993211949f,  0.116318631f,
-    0.993389211f,  0.114794927f,
-    0.993564136f,  0.113270952f,
-    0.993736722f,  0.111746711f,
-    0.993906970f,  0.110222207f,
-    0.994074879f,  0.108697444f,
-    0.994240449f,  0.107172425f,
-    0.994403680f,  0.105647154f,
-    0.994564571f,  0.104121634f,
-    0.994723121f,  0.102595869f,
-    0.994879331f,  0.101069863f,
-    0.995033199f,  0.099543619f,
-    0.995184727f,  0.098017140f,
-    0.995333912f,  0.096490431f,
-    0.995480755f,  0.094963495f,
-    0.995625256f,  0.093436336f,
-    0.995767414f,  0.091908956f,
-    0.995907229f,  0.090381361f,
-    0.996044701f,  0.088853553f,
-    0.996179829f,  0.087325535f,
-    0.996312612f,  0.085797312f,
-    0.996443051f,  0.084268888f,
-    0.996571146f,  0.082740265f,
-    0.996696895f,  0.081211447f,
-    0.996820299f,  0.079682438f,
-    0.996941358f,  0.078153242f,
-    0.997060070f,  0.076623861f,
-    0.997176437f,  0.075094301f,
-    0.997290457f,  0.073564564f,
-    0.997402130f,  0.072034653f,
-    0.997511456f,  0.070504573f,
-    0.997618435f,  0.068974328f,
-    0.997723067f,  0.067443920f,
-    0.997825350f,  0.065913353f,
-    0.997925286f,  0.064382631f,
-    0.998022874f,  0.062851758f,
-    0.998118113f,  0.061320736f,
-    0.998211003f,  0.059789571f,
-    0.998301545f,  0.058258265f,
-    0.998389737f,  0.056726821f,
-    0.998475581f,  0.055195244f,
-    0.998559074f,  0.053663538f,
-    0.998640218f,  0.052131705f,
-    0.998719012f,  0.050599749f,
-    0.998795456f,  0.049067674f,
-    0.998869550f,  0.047535484f,
-    0.998941293f,  0.046003182f,
-    0.999010686f,  0.044470772f,
-    0.999077728f,  0.042938257f,
-    0.999142419f,  0.041405641f,
-    0.999204759f,  0.039872928f,
-    0.999264747f,  0.038340120f,
-    0.999322385f,  0.036807223f,
-    0.999377670f,  0.035274239f,
-    0.999430605f,  0.033741172f,
-    0.999481187f,  0.032208025f,
-    0.999529418f,  0.030674803f,
-    0.999575296f,  0.029141509f,
-    0.999618822f,  0.027608146f,
-    0.999659997f,  0.026074718f,
-    0.999698819f,  0.024541229f,
-    0.999735288f,  0.023007681f,
-    0.999769405f,  0.021474080f,
-    0.999801170f,  0.019940429f,
-    0.999830582f,  0.018406730f,
-    0.999857641f,  0.016872988f,
-    0.999882347f,  0.015339206f,
-    0.999904701f,  0.013805389f,
-    0.999924702f,  0.012271538f,
-    0.999942350f,  0.010737659f,
-    0.999957645f,  0.009203755f,
-    0.999970586f,  0.007669829f,
-    0.999981175f,  0.006135885f,
-    0.999989411f,  0.004601926f,
-    0.999995294f,  0.003067957f,
-    0.999998823f,  0.001533980f,
-    1.000000000f,  0.000000000f,
-    0.999998823f, -0.001533980f,
-    0.999995294f, -0.003067957f,
-    0.999989411f, -0.004601926f,
-    0.999981175f, -0.006135885f,
-    0.999970586f, -0.007669829f,
-    0.999957645f, -0.009203755f,
-    0.999942350f, -0.010737659f,
-    0.999924702f, -0.012271538f,
-    0.999904701f, -0.013805389f,
-    0.999882347f, -0.015339206f,
-    0.999857641f, -0.016872988f,
-    0.999830582f, -0.018406730f,
-    0.999801170f, -0.019940429f,
-    0.999769405f, -0.021474080f,
-    0.999735288f, -0.023007681f,
-    0.999698819f, -0.024541229f,
-    0.999659997f, -0.026074718f,
-    0.999618822f, -0.027608146f,
-    0.999575296f, -0.029141509f,
-    0.999529418f, -0.030674803f,
-    0.999481187f, -0.032208025f,
-    0.999430605f, -0.033741172f,
-    0.999377670f, -0.035274239f,
-    0.999322385f, -0.036807223f,
-    0.999264747f, -0.038340120f,
-    0.999204759f, -0.039872928f,
-    0.999142419f, -0.041405641f,
-    0.999077728f, -0.042938257f,
-    0.999010686f, -0.044470772f,
-    0.998941293f, -0.046003182f,
-    0.998869550f, -0.047535484f,
-    0.998795456f, -0.049067674f,
-    0.998719012f, -0.050599749f,
-    0.998640218f, -0.052131705f,
-    0.998559074f, -0.053663538f,
-    0.998475581f, -0.055195244f,
-    0.998389737f, -0.056726821f,
-    0.998301545f, -0.058258265f,
-    0.998211003f, -0.059789571f,
-    0.998118113f, -0.061320736f,
-    0.998022874f, -0.062851758f,
-    0.997925286f, -0.064382631f,
-    0.997825350f, -0.065913353f,
-    0.997723067f, -0.067443920f,
-    0.997618435f, -0.068974328f,
-    0.997511456f, -0.070504573f,
-    0.997402130f, -0.072034653f,
-    0.997290457f, -0.073564564f,
-    0.997176437f, -0.075094301f,
-    0.997060070f, -0.076623861f,
-    0.996941358f, -0.078153242f,
-    0.996820299f, -0.079682438f,
-    0.996696895f, -0.081211447f,
-    0.996571146f, -0.082740265f,
-    0.996443051f, -0.084268888f,
-    0.996312612f, -0.085797312f,
-    0.996179829f, -0.087325535f,
-    0.996044701f, -0.088853553f,
-    0.995907229f, -0.090381361f,
-    0.995767414f, -0.091908956f,
-    0.995625256f, -0.093436336f,
-    0.995480755f, -0.094963495f,
-    0.995333912f, -0.096490431f,
-    0.995184727f, -0.098017140f,
-    0.995033199f, -0.099543619f,
-    0.994879331f, -0.101069863f,
-    0.994723121f, -0.102595869f,
-    0.994564571f, -0.104121634f,
-    0.994403680f, -0.105647154f,
-    0.994240449f, -0.107172425f,
-    0.994074879f, -0.108697444f,
-    0.993906970f, -0.110222207f,
-    0.993736722f, -0.111746711f,
-    0.993564136f, -0.113270952f,
-    0.993389211f, -0.114794927f,
-    0.993211949f, -0.116318631f,
-    0.993032350f, -0.117842062f,
-    0.992850414f, -0.119365215f,
-    0.992666142f, -0.120888087f,
-    0.992479535f, -0.122410675f,
-    0.992290591f, -0.123932975f,
-    0.992099313f, -0.125454983f,
-    0.991905700f, -0.126976696f,
-    0.991709754f, -0.128498111f,
-    0.991511473f, -0.130019223f,
-    0.991310860f, -0.131540029f,
-    0.991107914f, -0.133060525f,
-    0.990902635f, -0.134580709f,
-    0.990695025f, -0.136100575f,
-    0.990485084f, -0.137620122f,
-    0.990272812f, -0.139139344f,
-    0.990058210f, -0.140658239f,
-    0.989841278f, -0.142176804f,
-    0.989622017f, -0.143695033f,
-    0.989400428f, -0.145212925f,
-    0.989176510f, -0.146730474f,
-    0.988950265f, -0.148247679f,
-    0.988721692f, -0.149764535f,
-    0.988490793f, -0.151281038f,
-    0.988257568f, -0.152797185f,
-    0.988022017f, -0.154312973f,
-    0.987784142f, -0.155828398f,
-    0.987543942f, -0.157343456f,
-    0.987301418f, -0.158858143f,
-    0.987056571f, -0.160372457f,
-    0.986809402f, -0.161886394f,
-    0.986559910f, -0.163399949f,
-    0.986308097f, -0.164913120f,
-    0.986053963f, -0.166425904f,
-    0.985797509f, -0.167938295f,
-    0.985538735f, -0.169450291f,
-    0.985277642f, -0.170961889f,
-    0.985014231f, -0.172473084f,
-    0.984748502f, -0.173983873f,
-    0.984480455f, -0.175494253f,
-    0.984210092f, -0.177004220f,
-    0.983937413f, -0.178513771f,
-    0.983662419f, -0.180022901f,
-    0.983385110f, -0.181531608f,
-    0.983105487f, -0.183039888f,
-    0.982823551f, -0.184547737f,
-    0.982539302f, -0.186055152f,
-    0.982252741f, -0.187562129f,
-    0.981963869f, -0.189068664f,
-    0.981672686f, -0.190574755f,
-    0.981379193f, -0.192080397f,
-    0.981083391f, -0.193585587f,
-    0.980785280f, -0.195090322f,
-    0.980484862f, -0.196594598f,
-    0.980182136f, -0.198098411f,
-    0.979877104f, -0.199601758f,
-    0.979569766f, -0.201104635f,
-    0.979260123f, -0.202607039f,
-    0.978948175f, -0.204108966f,
-    0.978633924f, -0.205610413f,
-    0.978317371f, -0.207111376f,
-    0.977998515f, -0.208611852f,
-    0.977677358f, -0.210111837f,
-    0.977353900f, -0.211611327f,
-    0.977028143f, -0.213110320f,
-    0.976700086f, -0.214608811f,
-    0.976369731f, -0.216106797f,
-    0.976037079f, -0.217604275f,
-    0.975702130f, -0.219101240f,
-    0.975364885f, -0.220597690f,
-    0.975025345f, -0.222093621f,
-    0.974683511f, -0.223589029f,
-    0.974339383f, -0.225083911f,
-    0.973992962f, -0.226578264f,
-    0.973644250f, -0.228072083f,
-    0.973293246f, -0.229565366f,
-    0.972939952f, -0.231058108f,
-    0.972584369f, -0.232550307f,
-    0.972226497f, -0.234041959f,
-    0.971866337f, -0.235533059f,
-    0.971503891f, -0.237023606f,
-    0.971139158f, -0.238513595f,
-    0.970772141f, -0.240003022f,
-    0.970402839f, -0.241491885f,
-    0.970031253f, -0.242980180f,
-    0.969657385f, -0.244467903f,
-    0.969281235f, -0.245955050f,
-    0.968902805f, -0.247441619f,
-    0.968522094f, -0.248927606f,
-    0.968139105f, -0.250413007f,
-    0.967753837f, -0.251897818f,
-    0.967366292f, -0.253382037f,
-    0.966976471f, -0.254865660f,
-    0.966584374f, -0.256348682f,
-    0.966190003f, -0.257831102f,
-    0.965793359f, -0.259312915f,
-    0.965394442f, -0.260794118f,
-    0.964993253f, -0.262274707f,
-    0.964589793f, -0.263754679f,
-    0.964184064f, -0.265234030f,
-    0.963776066f, -0.266712757f,
-    0.963365800f, -0.268190857f,
-    0.962953267f, -0.269668326f,
-    0.962538468f, -0.271145160f,
-    0.962121404f, -0.272621355f,
-    0.961702077f, -0.274096910f,
-    0.961280486f, -0.275571819f,
-    0.960856633f, -0.277046080f,
-    0.960430519f, -0.278519689f,
-    0.960002146f, -0.279992643f,
-    0.959571513f, -0.281464938f,
-    0.959138622f, -0.282936570f,
-    0.958703475f, -0.284407537f,
-    0.958266071f, -0.285877835f,
-    0.957826413f, -0.287347460f,
-    0.957384501f, -0.288816408f,
-    0.956940336f, -0.290284677f,
-    0.956493919f, -0.291752263f,
-    0.956045251f, -0.293219163f,
-    0.955594334f, -0.294685372f,
-    0.955141168f, -0.296150888f,
-    0.954685755f, -0.297615707f,
-    0.954228095f, -0.299079826f,
-    0.953768190f, -0.300543241f,
-    0.953306040f, -0.302005949f,
-    0.952841648f, -0.303467947f,
-    0.952375013f, -0.304929230f,
-    0.951906137f, -0.306389795f,
-    0.951435021f, -0.307849640f,
-    0.950961666f, -0.309308760f,
-    0.950486074f, -0.310767153f,
-    0.950008245f, -0.312224814f,
-    0.949528181f, -0.313681740f,
-    0.949045882f, -0.315137929f,
-    0.948561350f, -0.316593376f,
-    0.948074586f, -0.318048077f,
-    0.947585591f, -0.319502031f,
-    0.947094366f, -0.320955232f,
-    0.946600913f, -0.322407679f,
-    0.946105232f, -0.323859367f,
-    0.945607325f, -0.325310292f,
-    0.945107193f, -0.326760452f,
-    0.944604837f, -0.328209844f,
-    0.944100258f, -0.329658463f,
-    0.943593458f, -0.331106306f,
-    0.943084437f, -0.332553370f,
-    0.942573198f, -0.333999651f,
-    0.942059740f, -0.335445147f,
-    0.941544065f, -0.336889853f,
-    0.941026175f, -0.338333767f,
-    0.940506071f, -0.339776884f,
-    0.939983753f, -0.341219202f,
-    0.939459224f, -0.342660717f,
-    0.938932484f, -0.344101426f,
-    0.938403534f, -0.345541325f,
-    0.937872376f, -0.346980411f,
-    0.937339012f, -0.348418680f,
-    0.936803442f, -0.349856130f,
-    0.936265667f, -0.351292756f,
-    0.935725689f, -0.352728556f,
-    0.935183510f, -0.354163525f,
-    0.934639130f, -0.355597662f,
-    0.934092550f, -0.357030961f,
-    0.933543773f, -0.358463421f,
-    0.932992799f, -0.359895037f,
-    0.932439629f, -0.361325806f,
-    0.931884266f, -0.362755724f,
-    0.931326709f, -0.364184790f,
-    0.930766961f, -0.365612998f,
-    0.930205023f, -0.367040346f,
-    0.929640896f, -0.368466830f,
-    0.929074581f, -0.369892447f,
-    0.928506080f, -0.371317194f,
-    0.927935395f, -0.372741067f,
-    0.927362526f, -0.374164063f,
-    0.926787474f, -0.375586178f,
-    0.926210242f, -0.377007410f,
-    0.925630831f, -0.378427755f,
-    0.925049241f, -0.379847209f,
-    0.924465474f, -0.381265769f,
-    0.923879533f, -0.382683432f,
-    0.923291417f, -0.384100195f,
-    0.922701128f, -0.385516054f,
-    0.922108669f, -0.386931006f,
-    0.921514039f, -0.388345047f,
-    0.920917242f, -0.389758174f,
-    0.920318277f, -0.391170384f,
-    0.919717146f, -0.392581674f,
-    0.919113852f, -0.393992040f,
-    0.918508394f, -0.395401479f,
-    0.917900776f, -0.396809987f,
-    0.917290997f, -0.398217562f,
-    0.916679060f, -0.399624200f,
-    0.916064966f, -0.401029897f,
-    0.915448716f, -0.402434651f,
-    0.914830312f, -0.403838458f,
-    0.914209756f, -0.405241314f,
-    0.913587048f, -0.406643217f,
-    0.912962190f, -0.408044163f,
-    0.912335185f, -0.409444149f,
-    0.911706032f, -0.410843171f,
-    0.911074734f, -0.412241227f,
-    0.910441292f, -0.413638312f,
-    0.909805708f, -0.415034424f,
-    0.909167983f, -0.416429560f,
-    0.908528119f, -0.417823716f,
-    0.907886116f, -0.419216888f,
-    0.907241978f, -0.420609074f,
-    0.906595705f, -0.422000271f,
-    0.905947298f, -0.423390474f,
-    0.905296759f, -0.424779681f,
-    0.904644091f, -0.426167889f,
-    0.903989293f, -0.427555093f,
-    0.903332368f, -0.428941292f,
-    0.902673318f, -0.430326481f,
-    0.902012144f, -0.431710658f,
-    0.901348847f, -0.433093819f,
-    0.900683429f, -0.434475961f,
-    0.900015892f, -0.435857080f,
-    0.899346237f, -0.437237174f,
-    0.898674466f, -0.438616239f,
-    0.898000580f, -0.439994271f,
-    0.897324581f, -0.441371269f,
-    0.896646470f, -0.442747228f,
-    0.895966250f, -0.444122145f,
-    0.895283921f, -0.445496017f,
-    0.894599486f, -0.446868840f,
-    0.893912945f, -0.448240612f,
-    0.893224301f, -0.449611330f,
-    0.892533555f, -0.450980989f,
-    0.891840709f, -0.452349587f,
-    0.891145765f, -0.453717121f,
-    0.890448723f, -0.455083587f,
-    0.889749586f, -0.456448982f,
-    0.889048356f, -0.457813304f,
-    0.888345033f, -0.459176548f,
-    0.887639620f, -0.460538711f,
-    0.886932119f, -0.461899791f,
-    0.886222530f, -0.463259784f,
-    0.885510856f, -0.464618686f,
-    0.884797098f, -0.465976496f,
-    0.884081259f, -0.467333209f,
-    0.883363339f, -0.468688822f,
-    0.882643340f, -0.470043332f,
-    0.881921264f, -0.471396737f,
-    0.881197113f, -0.472749032f,
-    0.880470889f, -0.474100215f,
-    0.879742593f, -0.475450282f,
-    0.879012226f, -0.476799230f,
-    0.878279792f, -0.478147056f,
-    0.877545290f, -0.479493758f,
-    0.876808724f, -0.480839331f,
-    0.876070094f, -0.482183772f,
-    0.875329403f, -0.483527079f,
-    0.874586652f, -0.484869248f,
-    0.873841843f, -0.486210276f,
-    0.873094978f, -0.487550160f,
-    0.872346059f, -0.488888897f,
-    0.871595087f, -0.490226483f,
-    0.870842063f, -0.491562916f,
-    0.870086991f, -0.492898192f,
-    0.869329871f, -0.494232309f,
-    0.868570706f, -0.495565262f,
-    0.867809497f, -0.496897049f,
-    0.867046246f, -0.498227667f,
-    0.866280954f, -0.499557113f,
-    0.865513624f, -0.500885383f,
-    0.864744258f, -0.502212474f,
-    0.863972856f, -0.503538384f,
-    0.863199422f, -0.504863109f,
-    0.862423956f, -0.506186645f,
-    0.861646461f, -0.507508991f,
-    0.860866939f, -0.508830143f,
-    0.860085390f, -0.510150097f,
-    0.859301818f, -0.511468850f,
-    0.858516224f, -0.512786401f,
-    0.857728610f, -0.514102744f,
-    0.856938977f, -0.515417878f,
-    0.856147328f, -0.516731799f,
-    0.855353665f, -0.518044504f,
-    0.854557988f, -0.519355990f,
-    0.853760301f, -0.520666254f,
-    0.852960605f, -0.521975293f,
-    0.852158902f, -0.523283103f,
-    0.851355193f, -0.524589683f,
-    0.850549481f, -0.525895027f,
-    0.849741768f, -0.527199135f,
-    0.848932055f, -0.528502002f,
-    0.848120345f, -0.529803625f,
-    0.847306639f, -0.531104001f,
-    0.846490939f, -0.532403128f,
-    0.845673247f, -0.533701002f,
-    0.844853565f, -0.534997620f,
-    0.844031895f, -0.536292979f,
-    0.843208240f, -0.537587076f,
-    0.842382600f, -0.538879909f,
-    0.841554977f, -0.540171473f,
-    0.840725375f, -0.541461766f,
-    0.839893794f, -0.542750785f,
-    0.839060237f, -0.544038527f,
-    0.838224706f, -0.545324988f,
-    0.837387202f, -0.546610167f,
-    0.836547727f, -0.547894059f,
-    0.835706284f, -0.549176662f,
-    0.834862875f, -0.550457973f,
-    0.834017501f, -0.551737988f,
-    0.833170165f, -0.553016706f,
-    0.832320868f, -0.554294121f,
-    0.831469612f, -0.555570233f,
-    0.830616400f, -0.556845037f,
-    0.829761234f, -0.558118531f,
-    0.828904115f, -0.559390712f,
-    0.828045045f, -0.560661576f,
-    0.827184027f, -0.561931121f,
-    0.826321063f, -0.563199344f,
-    0.825456154f, -0.564466242f,
-    0.824589303f, -0.565731811f,
-    0.823720511f, -0.566996049f,
-    0.822849781f, -0.568258953f,
-    0.821977115f, -0.569520519f,
-    0.821102515f, -0.570780746f,
-    0.820225983f, -0.572039629f,
-    0.819347520f, -0.573297167f,
-    0.818467130f, -0.574553355f,
-    0.817584813f, -0.575808191f,
-    0.816700573f, -0.577061673f,
-    0.815814411f, -0.578313796f,
-    0.814926329f, -0.579564559f,
-    0.814036330f, -0.580813958f,
-    0.813144415f, -0.582061990f,
-    0.812250587f, -0.583308653f,
-    0.811354847f, -0.584553943f,
-    0.810457198f, -0.585797857f,
-    0.809557642f, -0.587040394f,
-    0.808656182f, -0.588281548f,
-    0.807752818f, -0.589521319f,
-    0.806847554f, -0.590759702f,
-    0.805940391f, -0.591996695f,
-    0.805031331f, -0.593232295f,
-    0.804120377f, -0.594466499f,
-    0.803207531f, -0.595699304f,
-    0.802292796f, -0.596930708f,
-    0.801376172f, -0.598160707f,
-    0.800457662f, -0.599389298f,
-    0.799537269f, -0.600616479f,
-    0.798614995f, -0.601842247f,
-    0.797690841f, -0.603066599f,
-    0.796764810f, -0.604289531f,
-    0.795836905f, -0.605511041f,
-    0.794907126f, -0.606731127f,
-    0.793975478f, -0.607949785f,
-    0.793041960f, -0.609167012f,
-    0.792106577f, -0.610382806f,
-    0.791169330f, -0.611597164f,
-    0.790230221f, -0.612810082f,
-    0.789289253f, -0.614021559f,
-    0.788346428f, -0.615231591f,
-    0.787401747f, -0.616440175f,
-    0.786455214f, -0.617647308f,
-    0.785506830f, -0.618852988f,
-    0.784556597f, -0.620057212f,
-    0.783604519f, -0.621259977f,
-    0.782650596f, -0.622461279f,
-    0.781694832f, -0.623661118f,
-    0.780737229f, -0.624859488f,
-    0.779777788f, -0.626056388f,
-    0.778816512f, -0.627251815f,
-    0.777853404f, -0.628445767f,
-    0.776888466f, -0.629638239f,
-    0.775921699f, -0.630829230f,
-    0.774953107f, -0.632018736f,
-    0.773982691f, -0.633206755f,
-    0.773010453f, -0.634393284f,
-    0.772036397f, -0.635578320f,
-    0.771060524f, -0.636761861f,
-    0.770082837f, -0.637943904f,
-    0.769103338f, -0.639124445f,
-    0.768122029f, -0.640303482f,
-    0.767138912f, -0.641481013f,
-    0.766153990f, -0.642657034f,
-    0.765167266f, -0.643831543f,
-    0.764178741f, -0.645004537f,
-    0.763188417f, -0.646176013f,
-    0.762196298f, -0.647345969f,
-    0.761202385f, -0.648514401f,
-    0.760206682f, -0.649681307f,
-    0.759209189f, -0.650846685f,
-    0.758209910f, -0.652010531f,
-    0.757208847f, -0.653172843f,
-    0.756206001f, -0.654333618f,
-    0.755201377f, -0.655492853f,
-    0.754194975f, -0.656650546f,
-    0.753186799f, -0.657806693f,
-    0.752176850f, -0.658961293f,
-    0.751165132f, -0.660114342f,
-    0.750151646f, -0.661265838f,
-    0.749136395f, -0.662415778f,
-    0.748119380f, -0.663564159f,
-    0.747100606f, -0.664710978f,
-    0.746080074f, -0.665856234f,
-    0.745057785f, -0.666999922f,
-    0.744033744f, -0.668142041f,
-    0.743007952f, -0.669282588f,
-    0.741980412f, -0.670421560f,
-    0.740951125f, -0.671558955f,
-    0.739920095f, -0.672694769f,
-    0.738887324f, -0.673829000f,
-    0.737852815f, -0.674961646f,
-    0.736816569f, -0.676092704f,
-    0.735778589f, -0.677222170f,
-    0.734738878f, -0.678350043f,
-    0.733697438f, -0.679476320f,
-    0.732654272f, -0.680600998f,
-    0.731609381f, -0.681724074f,
-    0.730562769f, -0.682845546f,
-    0.729514438f, -0.683965412f,
-    0.728464390f, -0.685083668f,
-    0.727412629f, -0.686200312f,
-    0.726359155f, -0.687315341f,
-    0.725303972f, -0.688428753f,
-    0.724247083f, -0.689540545f,
-    0.723188489f, -0.690650714f,
-    0.722128194f, -0.691759258f,
-    0.721066199f, -0.692866175f,
-    0.720002508f, -0.693971461f,
-    0.718937122f, -0.695075114f,
-    0.717870045f, -0.696177131f,
-    0.716801279f, -0.697277511f,
-    0.715730825f, -0.698376249f,
-    0.714658688f, -0.699473345f,
-    0.713584869f, -0.700568794f,
-    0.712509371f, -0.701662595f,
-    0.711432196f, -0.702754744f,
-    0.710353347f, -0.703845241f,
-    0.709272826f, -0.704934080f,
-    0.708190637f, -0.706021261f,
-    0.707106781f, -0.707106781f,
-    0.706021261f, -0.708190637f,
-    0.704934080f, -0.709272826f,
-    0.703845241f, -0.710353347f,
-    0.702754744f, -0.711432196f,
-    0.701662595f, -0.712509371f,
-    0.700568794f, -0.713584869f,
-    0.699473345f, -0.714658688f,
-    0.698376249f, -0.715730825f,
-    0.697277511f, -0.716801279f,
-    0.696177131f, -0.717870045f,
-    0.695075114f, -0.718937122f,
-    0.693971461f, -0.720002508f,
-    0.692866175f, -0.721066199f,
-    0.691759258f, -0.722128194f,
-    0.690650714f, -0.723188489f,
-    0.689540545f, -0.724247083f,
-    0.688428753f, -0.725303972f,
-    0.687315341f, -0.726359155f,
-    0.686200312f, -0.727412629f,
-    0.685083668f, -0.728464390f,
-    0.683965412f, -0.729514438f,
-    0.682845546f, -0.730562769f,
-    0.681724074f, -0.731609381f,
-    0.680600998f, -0.732654272f,
-    0.679476320f, -0.733697438f,
-    0.678350043f, -0.734738878f,
-    0.677222170f, -0.735778589f,
-    0.676092704f, -0.736816569f,
-    0.674961646f, -0.737852815f,
-    0.673829000f, -0.738887324f,
-    0.672694769f, -0.739920095f,
-    0.671558955f, -0.740951125f,
-    0.670421560f, -0.741980412f,
-    0.669282588f, -0.743007952f,
-    0.668142041f, -0.744033744f,
-    0.666999922f, -0.745057785f,
-    0.665856234f, -0.746080074f,
-    0.664710978f, -0.747100606f,
-    0.663564159f, -0.748119380f,
-    0.662415778f, -0.749136395f,
-    0.661265838f, -0.750151646f,
-    0.660114342f, -0.751165132f,
-    0.658961293f, -0.752176850f,
-    0.657806693f, -0.753186799f,
-    0.656650546f, -0.754194975f,
-    0.655492853f, -0.755201377f,
-    0.654333618f, -0.756206001f,
-    0.653172843f, -0.757208847f,
-    0.652010531f, -0.758209910f,
-    0.650846685f, -0.759209189f,
-    0.649681307f, -0.760206682f,
-    0.648514401f, -0.761202385f,
-    0.647345969f, -0.762196298f,
-    0.646176013f, -0.763188417f,
-    0.645004537f, -0.764178741f,
-    0.643831543f, -0.765167266f,
-    0.642657034f, -0.766153990f,
-    0.641481013f, -0.767138912f,
-    0.640303482f, -0.768122029f,
-    0.639124445f, -0.769103338f,
-    0.637943904f, -0.770082837f,
-    0.636761861f, -0.771060524f,
-    0.635578320f, -0.772036397f,
-    0.634393284f, -0.773010453f,
-    0.633206755f, -0.773982691f,
-    0.632018736f, -0.774953107f,
-    0.630829230f, -0.775921699f,
-    0.629638239f, -0.776888466f,
-    0.628445767f, -0.777853404f,
-    0.627251815f, -0.778816512f,
-    0.626056388f, -0.779777788f,
-    0.624859488f, -0.780737229f,
-    0.623661118f, -0.781694832f,
-    0.622461279f, -0.782650596f,
-    0.621259977f, -0.783604519f,
-    0.620057212f, -0.784556597f,
-    0.618852988f, -0.785506830f,
-    0.617647308f, -0.786455214f,
-    0.616440175f, -0.787401747f,
-    0.615231591f, -0.788346428f,
-    0.614021559f, -0.789289253f,
-    0.612810082f, -0.790230221f,
-    0.611597164f, -0.791169330f,
-    0.610382806f, -0.792106577f,
-    0.609167012f, -0.793041960f,
-    0.607949785f, -0.793975478f,
-    0.606731127f, -0.794907126f,
-    0.605511041f, -0.795836905f,
-    0.604289531f, -0.796764810f,
-    0.603066599f, -0.797690841f,
-    0.601842247f, -0.798614995f,
-    0.600616479f, -0.799537269f,
-    0.599389298f, -0.800457662f,
-    0.598160707f, -0.801376172f,
-    0.596930708f, -0.802292796f,
-    0.595699304f, -0.803207531f,
-    0.594466499f, -0.804120377f,
-    0.593232295f, -0.805031331f,
-    0.591996695f, -0.805940391f,
-    0.590759702f, -0.806847554f,
-    0.589521319f, -0.807752818f,
-    0.588281548f, -0.808656182f,
-    0.587040394f, -0.809557642f,
-    0.585797857f, -0.810457198f,
-    0.584553943f, -0.811354847f,
-    0.583308653f, -0.812250587f,
-    0.582061990f, -0.813144415f,
-    0.580813958f, -0.814036330f,
-    0.579564559f, -0.814926329f,
-    0.578313796f, -0.815814411f,
-    0.577061673f, -0.816700573f,
-    0.575808191f, -0.817584813f,
-    0.574553355f, -0.818467130f,
-    0.573297167f, -0.819347520f,
-    0.572039629f, -0.820225983f,
-    0.570780746f, -0.821102515f,
-    0.569520519f, -0.821977115f,
-    0.568258953f, -0.822849781f,
-    0.566996049f, -0.823720511f,
-    0.565731811f, -0.824589303f,
-    0.564466242f, -0.825456154f,
-    0.563199344f, -0.826321063f,
-    0.561931121f, -0.827184027f,
-    0.560661576f, -0.828045045f,
-    0.559390712f, -0.828904115f,
-    0.558118531f, -0.829761234f,
-    0.556845037f, -0.830616400f,
-    0.555570233f, -0.831469612f,
-    0.554294121f, -0.832320868f,
-    0.553016706f, -0.833170165f,
-    0.551737988f, -0.834017501f,
-    0.550457973f, -0.834862875f,
-    0.549176662f, -0.835706284f,
-    0.547894059f, -0.836547727f,
-    0.546610167f, -0.837387202f,
-    0.545324988f, -0.838224706f,
-    0.544038527f, -0.839060237f,
-    0.542750785f, -0.839893794f,
-    0.541461766f, -0.840725375f,
-    0.540171473f, -0.841554977f,
-    0.538879909f, -0.842382600f,
-    0.537587076f, -0.843208240f,
-    0.536292979f, -0.844031895f,
-    0.534997620f, -0.844853565f,
-    0.533701002f, -0.845673247f,
-    0.532403128f, -0.846490939f,
-    0.531104001f, -0.847306639f,
-    0.529803625f, -0.848120345f,
-    0.528502002f, -0.848932055f,
-    0.527199135f, -0.849741768f,
-    0.525895027f, -0.850549481f,
-    0.524589683f, -0.851355193f,
-    0.523283103f, -0.852158902f,
-    0.521975293f, -0.852960605f,
-    0.520666254f, -0.853760301f,
-    0.519355990f, -0.854557988f,
-    0.518044504f, -0.855353665f,
-    0.516731799f, -0.856147328f,
-    0.515417878f, -0.856938977f,
-    0.514102744f, -0.857728610f,
-    0.512786401f, -0.858516224f,
-    0.511468850f, -0.859301818f,
-    0.510150097f, -0.860085390f,
-    0.508830143f, -0.860866939f,
-    0.507508991f, -0.861646461f,
-    0.506186645f, -0.862423956f,
-    0.504863109f, -0.863199422f,
-    0.503538384f, -0.863972856f,
-    0.502212474f, -0.864744258f,
-    0.500885383f, -0.865513624f,
-    0.499557113f, -0.866280954f,
-    0.498227667f, -0.867046246f,
-    0.496897049f, -0.867809497f,
-    0.495565262f, -0.868570706f,
-    0.494232309f, -0.869329871f,
-    0.492898192f, -0.870086991f,
-    0.491562916f, -0.870842063f,
-    0.490226483f, -0.871595087f,
-    0.488888897f, -0.872346059f,
-    0.487550160f, -0.873094978f,
-    0.486210276f, -0.873841843f,
-    0.484869248f, -0.874586652f,
-    0.483527079f, -0.875329403f,
-    0.482183772f, -0.876070094f,
-    0.480839331f, -0.876808724f,
-    0.479493758f, -0.877545290f,
-    0.478147056f, -0.878279792f,
-    0.476799230f, -0.879012226f,
-    0.475450282f, -0.879742593f,
-    0.474100215f, -0.880470889f,
-    0.472749032f, -0.881197113f,
-    0.471396737f, -0.881921264f,
-    0.470043332f, -0.882643340f,
-    0.468688822f, -0.883363339f,
-    0.467333209f, -0.884081259f,
-    0.465976496f, -0.884797098f,
-    0.464618686f, -0.885510856f,
-    0.463259784f, -0.886222530f,
-    0.461899791f, -0.886932119f,
-    0.460538711f, -0.887639620f,
-    0.459176548f, -0.888345033f,
-    0.457813304f, -0.889048356f,
-    0.456448982f, -0.889749586f,
-    0.455083587f, -0.890448723f,
-    0.453717121f, -0.891145765f,
-    0.452349587f, -0.891840709f,
-    0.450980989f, -0.892533555f,
-    0.449611330f, -0.893224301f,
-    0.448240612f, -0.893912945f,
-    0.446868840f, -0.894599486f,
-    0.445496017f, -0.895283921f,
-    0.444122145f, -0.895966250f,
-    0.442747228f, -0.896646470f,
-    0.441371269f, -0.897324581f,
-    0.439994271f, -0.898000580f,
-    0.438616239f, -0.898674466f,
-    0.437237174f, -0.899346237f,
-    0.435857080f, -0.900015892f,
-    0.434475961f, -0.900683429f,
-    0.433093819f, -0.901348847f,
-    0.431710658f, -0.902012144f,
-    0.430326481f, -0.902673318f,
-    0.428941292f, -0.903332368f,
-    0.427555093f, -0.903989293f,
-    0.426167889f, -0.904644091f,
-    0.424779681f, -0.905296759f,
-    0.423390474f, -0.905947298f,
-    0.422000271f, -0.906595705f,
-    0.420609074f, -0.907241978f,
-    0.419216888f, -0.907886116f,
-    0.417823716f, -0.908528119f,
-    0.416429560f, -0.909167983f,
-    0.415034424f, -0.909805708f,
-    0.413638312f, -0.910441292f,
-    0.412241227f, -0.911074734f,
-    0.410843171f, -0.911706032f,
-    0.409444149f, -0.912335185f,
-    0.408044163f, -0.912962190f,
-    0.406643217f, -0.913587048f,
-    0.405241314f, -0.914209756f,
-    0.403838458f, -0.914830312f,
-    0.402434651f, -0.915448716f,
-    0.401029897f, -0.916064966f,
-    0.399624200f, -0.916679060f,
-    0.398217562f, -0.917290997f,
-    0.396809987f, -0.917900776f,
-    0.395401479f, -0.918508394f,
-    0.393992040f, -0.919113852f,
-    0.392581674f, -0.919717146f,
-    0.391170384f, -0.920318277f,
-    0.389758174f, -0.920917242f,
-    0.388345047f, -0.921514039f,
-    0.386931006f, -0.922108669f,
-    0.385516054f, -0.922701128f,
-    0.384100195f, -0.923291417f,
-    0.382683432f, -0.923879533f,
-    0.381265769f, -0.924465474f,
-    0.379847209f, -0.925049241f,
-    0.378427755f, -0.925630831f,
-    0.377007410f, -0.926210242f,
-    0.375586178f, -0.926787474f,
-    0.374164063f, -0.927362526f,
-    0.372741067f, -0.927935395f,
-    0.371317194f, -0.928506080f,
-    0.369892447f, -0.929074581f,
-    0.368466830f, -0.929640896f,
-    0.367040346f, -0.930205023f,
-    0.365612998f, -0.930766961f,
-    0.364184790f, -0.931326709f,
-    0.362755724f, -0.931884266f,
-    0.361325806f, -0.932439629f,
-    0.359895037f, -0.932992799f,
-    0.358463421f, -0.933543773f,
-    0.357030961f, -0.934092550f,
-    0.355597662f, -0.934639130f,
-    0.354163525f, -0.935183510f,
-    0.352728556f, -0.935725689f,
-    0.351292756f, -0.936265667f,
-    0.349856130f, -0.936803442f,
-    0.348418680f, -0.937339012f,
-    0.346980411f, -0.937872376f,
-    0.345541325f, -0.938403534f,
-    0.344101426f, -0.938932484f,
-    0.342660717f, -0.939459224f,
-    0.341219202f, -0.939983753f,
-    0.339776884f, -0.940506071f,
-    0.338333767f, -0.941026175f,
-    0.336889853f, -0.941544065f,
-    0.335445147f, -0.942059740f,
-    0.333999651f, -0.942573198f,
-    0.332553370f, -0.943084437f,
-    0.331106306f, -0.943593458f,
-    0.329658463f, -0.944100258f,
-    0.328209844f, -0.944604837f,
-    0.326760452f, -0.945107193f,
-    0.325310292f, -0.945607325f,
-    0.323859367f, -0.946105232f,
-    0.322407679f, -0.946600913f,
-    0.320955232f, -0.947094366f,
-    0.319502031f, -0.947585591f,
-    0.318048077f, -0.948074586f,
-    0.316593376f, -0.948561350f,
-    0.315137929f, -0.949045882f,
-    0.313681740f, -0.949528181f,
-    0.312224814f, -0.950008245f,
-    0.310767153f, -0.950486074f,
-    0.309308760f, -0.950961666f,
-    0.307849640f, -0.951435021f,
-    0.306389795f, -0.951906137f,
-    0.304929230f, -0.952375013f,
-    0.303467947f, -0.952841648f,
-    0.302005949f, -0.953306040f,
-    0.300543241f, -0.953768190f,
-    0.299079826f, -0.954228095f,
-    0.297615707f, -0.954685755f,
-    0.296150888f, -0.955141168f,
-    0.294685372f, -0.955594334f,
-    0.293219163f, -0.956045251f,
-    0.291752263f, -0.956493919f,
-    0.290284677f, -0.956940336f,
-    0.288816408f, -0.957384501f,
-    0.287347460f, -0.957826413f,
-    0.285877835f, -0.958266071f,
-    0.284407537f, -0.958703475f,
-    0.282936570f, -0.959138622f,
-    0.281464938f, -0.959571513f,
-    0.279992643f, -0.960002146f,
-    0.278519689f, -0.960430519f,
-    0.277046080f, -0.960856633f,
-    0.275571819f, -0.961280486f,
-    0.274096910f, -0.961702077f,
-    0.272621355f, -0.962121404f,
-    0.271145160f, -0.962538468f,
-    0.269668326f, -0.962953267f,
-    0.268190857f, -0.963365800f,
-    0.266712757f, -0.963776066f,
-    0.265234030f, -0.964184064f,
-    0.263754679f, -0.964589793f,
-    0.262274707f, -0.964993253f,
-    0.260794118f, -0.965394442f,
-    0.259312915f, -0.965793359f,
-    0.257831102f, -0.966190003f,
-    0.256348682f, -0.966584374f,
-    0.254865660f, -0.966976471f,
-    0.253382037f, -0.967366292f,
-    0.251897818f, -0.967753837f,
-    0.250413007f, -0.968139105f,
-    0.248927606f, -0.968522094f,
-    0.247441619f, -0.968902805f,
-    0.245955050f, -0.969281235f,
-    0.244467903f, -0.969657385f,
-    0.242980180f, -0.970031253f,
-    0.241491885f, -0.970402839f,
-    0.240003022f, -0.970772141f,
-    0.238513595f, -0.971139158f,
-    0.237023606f, -0.971503891f,
-    0.235533059f, -0.971866337f,
-    0.234041959f, -0.972226497f,
-    0.232550307f, -0.972584369f,
-    0.231058108f, -0.972939952f,
-    0.229565366f, -0.973293246f,
-    0.228072083f, -0.973644250f,
-    0.226578264f, -0.973992962f,
-    0.225083911f, -0.974339383f,
-    0.223589029f, -0.974683511f,
-    0.222093621f, -0.975025345f,
-    0.220597690f, -0.975364885f,
-    0.219101240f, -0.975702130f,
-    0.217604275f, -0.976037079f,
-    0.216106797f, -0.976369731f,
-    0.214608811f, -0.976700086f,
-    0.213110320f, -0.977028143f,
-    0.211611327f, -0.977353900f,
-    0.210111837f, -0.977677358f,
-    0.208611852f, -0.977998515f,
-    0.207111376f, -0.978317371f,
-    0.205610413f, -0.978633924f,
-    0.204108966f, -0.978948175f,
-    0.202607039f, -0.979260123f,
-    0.201104635f, -0.979569766f,
-    0.199601758f, -0.979877104f,
-    0.198098411f, -0.980182136f,
-    0.196594598f, -0.980484862f,
-    0.195090322f, -0.980785280f,
-    0.193585587f, -0.981083391f,
-    0.192080397f, -0.981379193f,
-    0.190574755f, -0.981672686f,
-    0.189068664f, -0.981963869f,
-    0.187562129f, -0.982252741f,
-    0.186055152f, -0.982539302f,
-    0.184547737f, -0.982823551f,
-    0.183039888f, -0.983105487f,
-    0.181531608f, -0.983385110f,
-    0.180022901f, -0.983662419f,
-    0.178513771f, -0.983937413f,
-    0.177004220f, -0.984210092f,
-    0.175494253f, -0.984480455f,
-    0.173983873f, -0.984748502f,
-    0.172473084f, -0.985014231f,
-    0.170961889f, -0.985277642f,
-    0.169450291f, -0.985538735f,
-    0.167938295f, -0.985797509f,
-    0.166425904f, -0.986053963f,
-    0.164913120f, -0.986308097f,
-    0.163399949f, -0.986559910f,
-    0.161886394f, -0.986809402f,
-    0.160372457f, -0.987056571f,
-    0.158858143f, -0.987301418f,
-    0.157343456f, -0.987543942f,
-    0.155828398f, -0.987784142f,
-    0.154312973f, -0.988022017f,
-    0.152797185f, -0.988257568f,
-    0.151281038f, -0.988490793f,
-    0.149764535f, -0.988721692f,
-    0.148247679f, -0.988950265f,
-    0.146730474f, -0.989176510f,
-    0.145212925f, -0.989400428f,
-    0.143695033f, -0.989622017f,
-    0.142176804f, -0.989841278f,
-    0.140658239f, -0.990058210f,
-    0.139139344f, -0.990272812f,
-    0.137620122f, -0.990485084f,
-    0.136100575f, -0.990695025f,
-    0.134580709f, -0.990902635f,
-    0.133060525f, -0.991107914f,
-    0.131540029f, -0.991310860f,
-    0.130019223f, -0.991511473f,
-    0.128498111f, -0.991709754f,
-    0.126976696f, -0.991905700f,
-    0.125454983f, -0.992099313f,
-    0.123932975f, -0.992290591f,
-    0.122410675f, -0.992479535f,
-    0.120888087f, -0.992666142f,
-    0.119365215f, -0.992850414f,
-    0.117842062f, -0.993032350f,
-    0.116318631f, -0.993211949f,
-    0.114794927f, -0.993389211f,
-    0.113270952f, -0.993564136f,
-    0.111746711f, -0.993736722f,
-    0.110222207f, -0.993906970f,
-    0.108697444f, -0.994074879f,
-    0.107172425f, -0.994240449f,
-    0.105647154f, -0.994403680f,
-    0.104121634f, -0.994564571f,
-    0.102595869f, -0.994723121f,
-    0.101069863f, -0.994879331f,
-    0.099543619f, -0.995033199f,
-    0.098017140f, -0.995184727f,
-    0.096490431f, -0.995333912f,
-    0.094963495f, -0.995480755f,
-    0.093436336f, -0.995625256f,
-    0.091908956f, -0.995767414f,
-    0.090381361f, -0.995907229f,
-    0.088853553f, -0.996044701f,
-    0.087325535f, -0.996179829f,
-    0.085797312f, -0.996312612f,
-    0.084268888f, -0.996443051f,
-    0.082740265f, -0.996571146f,
-    0.081211447f, -0.996696895f,
-    0.079682438f, -0.996820299f,
-    0.078153242f, -0.996941358f,
-    0.076623861f, -0.997060070f,
-    0.075094301f, -0.997176437f,
-    0.073564564f, -0.997290457f,
-    0.072034653f, -0.997402130f,
-    0.070504573f, -0.997511456f,
-    0.068974328f, -0.997618435f,
-    0.067443920f, -0.997723067f,
-    0.065913353f, -0.997825350f,
-    0.064382631f, -0.997925286f,
-    0.062851758f, -0.998022874f,
-    0.061320736f, -0.998118113f,
-    0.059789571f, -0.998211003f,
-    0.058258265f, -0.998301545f,
-    0.056726821f, -0.998389737f,
-    0.055195244f, -0.998475581f,
-    0.053663538f, -0.998559074f,
-    0.052131705f, -0.998640218f,
-    0.050599749f, -0.998719012f,
-    0.049067674f, -0.998795456f,
-    0.047535484f, -0.998869550f,
-    0.046003182f, -0.998941293f,
-    0.044470772f, -0.999010686f,
-    0.042938257f, -0.999077728f,
-    0.041405641f, -0.999142419f,
-    0.039872928f, -0.999204759f,
-    0.038340120f, -0.999264747f,
-    0.036807223f, -0.999322385f,
-    0.035274239f, -0.999377670f,
-    0.033741172f, -0.999430605f,
-    0.032208025f, -0.999481187f,
-    0.030674803f, -0.999529418f,
-    0.029141509f, -0.999575296f,
-    0.027608146f, -0.999618822f,
-    0.026074718f, -0.999659997f,
-    0.024541229f, -0.999698819f,
-    0.023007681f, -0.999735288f,
-    0.021474080f, -0.999769405f,
-    0.019940429f, -0.999801170f,
-    0.018406730f, -0.999830582f,
-    0.016872988f, -0.999857641f,
-    0.015339206f, -0.999882347f,
-    0.013805389f, -0.999904701f,
-    0.012271538f, -0.999924702f,
-    0.010737659f, -0.999942350f,
-    0.009203755f, -0.999957645f,
-    0.007669829f, -0.999970586f,
-    0.006135885f, -0.999981175f,
-    0.004601926f, -0.999989411f,
-    0.003067957f, -0.999995294f,
-    0.001533980f, -0.999998823f
-};
-
-#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALL_TABLES) */
-
-/**
-  @ingroup RealFFT
- */
-
-/**
-  @addtogroup RealFFT_Table Real FFT Tables
-  @{
- */
-
-/**
-  @par
-  Generation of realCoefA array:
-  @par
-  n = 4096
-  <pre>for (i = 0; i < n; i++)
-  {
-     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }</pre>
- */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
-const float32_t realCoefA[8192] = {
-  0.500000000000000f, -0.500000000000000f, 0.499616503715515f, -0.499999850988388f,
-  0.499233007431030f, -0.499999403953552f, 0.498849511146545f, -0.499998688697815f,
-  0.498466014862061f, -0.499997645616531f, 0.498082518577576f, -0.499996334314346f,
-  0.497699022293091f, -0.499994695186615f, 0.497315555810928f, -0.499992787837982f,
-  0.496932059526443f, -0.499990582466125f, 0.496548563241959f, -0.499988079071045f,
-  0.496165096759796f, -0.499985307455063f, 0.495781600475311f, -0.499982208013535f,
-  0.495398133993149f, -0.499978810548782f, 0.495014637708664f, -0.499975144863129f,
-  0.494631171226501f, -0.499971181154251f, 0.494247704744339f, -0.499966919422150f,
-  0.493864238262177f, -0.499962359666824f, 0.493480771780014f, -0.499957501888275f,
-  0.493097305297852f, -0.499952346086502f, 0.492713838815689f, -0.499946922063828f,
-  0.492330402135849f, -0.499941170215607f, 0.491946935653687f, -0.499935150146484f,
-  0.491563498973846f, -0.499928832054138f, 0.491180062294006f, -0.499922215938568f,
-  0.490796625614166f, -0.499915301799774f, 0.490413218736649f, -0.499908089637756f,
-  0.490029782056808f, -0.499900579452515f, 0.489646375179291f, -0.499892801046371f,
-  0.489262968301773f, -0.499884694814682f, 0.488879561424255f, -0.499876320362091f,
-  0.488496154546738f, -0.499867647886276f, 0.488112777471542f, -0.499858677387238f,
-  0.487729400396347f, -0.499849408864975f, 0.487346023321152f, -0.499839842319489f,
-  0.486962646245956f, -0.499830007553101f, 0.486579269170761f, -0.499819844961166f,
-  0.486195921897888f, -0.499809414148331f, 0.485812574625015f, -0.499798685312271f,
-  0.485429257154465f, -0.499787658452988f, 0.485045909881592f, -0.499776333570480f,
-  0.484662592411041f, -0.499764710664749f, 0.484279274940491f, -0.499752789735794f,
-  0.483895987272263f, -0.499740600585938f, 0.483512699604034f, -0.499728083610535f,
-  0.483129411935806f, -0.499715298414230f, 0.482746154069901f, -0.499702215194702f,
-  0.482362866401672f, -0.499688833951950f, 0.481979638338089f, -0.499675154685974f,
-  0.481596380472183f, -0.499661177396774f, 0.481213152408600f, -0.499646931886673f,
-  0.480829954147339f, -0.499632388353348f, 0.480446726083755f, -0.499617516994476f,
-  0.480063527822495f, -0.499602377414703f, 0.479680359363556f, -0.499586939811707f,
-  0.479297190904617f, -0.499571204185486f, 0.478914022445679f, -0.499555170536041f,
-  0.478530883789063f, -0.499538868665695f, 0.478147745132446f, -0.499522238969803f,
-  0.477764606475830f, -0.499505341053009f, 0.477381497621536f, -0.499488145112991f,
-  0.476998418569565f, -0.499470651149750f, 0.476615339517593f, -0.499452859163284f,
-  0.476232260465622f, -0.499434769153595f, 0.475849211215973f, -0.499416410923004f,
-  0.475466161966324f, -0.499397724866867f, 0.475083142518997f, -0.499378770589828f,
-  0.474700123071671f, -0.499359518289566f, 0.474317133426666f, -0.499339967966080f,
-  0.473934143781662f, -0.499320119619370f, 0.473551183938980f, -0.499299973249435f,
-  0.473168224096298f, -0.499279528856277f, 0.472785294055939f, -0.499258816242218f,
-  0.472402364015579f, -0.499237775802612f, 0.472019463777542f, -0.499216467142105f,
-  0.471636593341827f, -0.499194860458374f, 0.471253722906113f, -0.499172955751419f,
-  0.470870882272720f, -0.499150782823563f, 0.470488041639328f, -0.499128282070160f,
-  0.470105201005936f, -0.499105513095856f, 0.469722419977188f, -0.499082416296005f,
-  0.469339638948441f, -0.499059051275253f, 0.468956857919693f, -0.499035388231277f,
-  0.468574106693268f, -0.499011427164078f, 0.468191385269165f, -0.498987197875977f,
-  0.467808693647385f, -0.498962640762329f, 0.467426002025604f, -0.498937815427780f,
-  0.467043310403824f, -0.498912662267685f, 0.466660678386688f, -0.498887240886688f,
-  0.466278046369553f, -0.498861521482468f, 0.465895414352417f, -0.498835533857346f,
-  0.465512841939926f, -0.498809218406677f, 0.465130269527435f, -0.498782604932785f,
-  0.464747726917267f, -0.498755723237991f, 0.464365184307098f, -0.498728543519974f,
-  0.463982671499252f, -0.498701065778732f, 0.463600188493729f, -0.498673290014267f,
-  0.463217705488205f, -0.498645216226578f, 0.462835282087326f, -0.498616874217987f,
-  0.462452858686447f, -0.498588204383850f, 0.462070435285568f, -0.498559266328812f,
-  0.461688071489334f, -0.498530030250549f, 0.461305707693100f, -0.498500496149063f,
-  0.460923373699188f, -0.498470664024353f, 0.460541069507599f, -0.498440563678741f,
-  0.460158795118332f, -0.498410135507584f, 0.459776520729065f, -0.498379439115524f,
-  0.459394276142120f, -0.498348444700241f, 0.459012061357498f, -0.498317152261734f,
-  0.458629876375198f, -0.498285561800003f, 0.458247691392899f, -0.498253703117371f,
-  0.457865566015244f, -0.498221516609192f, 0.457483440637589f, -0.498189061880112f,
-  0.457101345062256f, -0.498156309127808f, 0.456719279289246f, -0.498123258352280f,
-  0.456337243318558f, -0.498089909553528f, 0.455955207347870f, -0.498056292533875f,
-  0.455573230981827f, -0.498022347688675f, 0.455191254615784f, -0.497988134622574f,
-  0.454809308052063f, -0.497953623533249f, 0.454427421092987f, -0.497918814420700f,
-  0.454045534133911f, -0.497883707284927f, 0.453663676977158f, -0.497848302125931f,
-  0.453281819820404f, -0.497812628746033f, 0.452900022268295f, -0.497776657342911f,
-  0.452518254518509f, -0.497740387916565f, 0.452136516571045f, -0.497703820466995f,
-  0.451754778623581f, -0.497666954994202f, 0.451373100280762f, -0.497629791498184f,
-  0.450991421937943f, -0.497592359781265f, 0.450609803199768f, -0.497554630041122f,
-  0.450228184461594f, -0.497516602277756f, 0.449846625328064f, -0.497478276491165f,
-  0.449465066194534f, -0.497439652681351f, 0.449083566665649f, -0.497400760650635f,
-  0.448702067136765f, -0.497361570596695f, 0.448320597410202f, -0.497322082519531f,
-  0.447939187288284f, -0.497282296419144f, 0.447557777166367f, -0.497242212295532f,
-  0.447176426649094f, -0.497201830148697f, 0.446795076131821f, -0.497161179780960f,
-  0.446413785219193f, -0.497120231389999f, 0.446032524108887f, -0.497078984975815f,
-  0.445651292800903f, -0.497037440538406f, 0.445270061492920f, -0.496995598077774f,
-  0.444888889789581f, -0.496953487396240f, 0.444507747888565f, -0.496911078691483f,
-  0.444126635789871f, -0.496868371963501f, 0.443745553493500f, -0.496825367212296f,
-  0.443364530801773f, -0.496782064437866f, 0.442983508110046f, -0.496738493442535f,
-  0.442602545022964f, -0.496694594621658f, 0.442221581935883f, -0.496650427579880f,
-  0.441840678453445f, -0.496605962514877f, 0.441459804773331f, -0.496561229228973f,
-  0.441078960895538f, -0.496516168117523f, 0.440698176622391f, -0.496470838785172f,
-  0.440317392349243f, -0.496425211429596f, 0.439936667680740f, -0.496379286050797f,
-  0.439555943012238f, -0.496333062648773f, 0.439175277948380f, -0.496286571025848f,
-  0.438794672489166f, -0.496239781379700f, 0.438414067029953f, -0.496192663908005f,
-  0.438033521175385f, -0.496145308017731f, 0.437653005123138f, -0.496097624301910f,
-  0.437272518873215f, -0.496049642562866f, 0.436892062425613f, -0.496001392602921f,
-  0.436511665582657f, -0.495952844619751f, 0.436131268739700f, -0.495903998613358f,
-  0.435750931501389f, -0.495854884386063f, 0.435370653867722f, -0.495805442333221f,
-  0.434990376234055f, -0.495755732059479f, 0.434610158205032f, -0.495705723762512f,
-  0.434229999780655f, -0.495655417442322f, 0.433849841356277f, -0.495604842901230f,
-  0.433469742536545f, -0.495553970336914f, 0.433089673519135f, -0.495502769947052f,
-  0.432709634304047f, -0.495451331138611f, 0.432329654693604f, -0.495399564504623f,
-  0.431949704885483f, -0.495347499847412f, 0.431569814682007f, -0.495295166969299f,
-  0.431189924478531f, -0.495242536067963f, 0.430810123682022f, -0.495189607143402f,
-  0.430430322885513f, -0.495136409997940f, 0.430050581693649f, -0.495082914829254f,
-  0.429670870304108f, -0.495029091835022f, 0.429291218519211f, -0.494975030422211f,
-  0.428911596536636f, -0.494920641183853f, 0.428532034158707f, -0.494865983724594f,
-  0.428152471780777f, -0.494810998439789f, 0.427772998809814f, -0.494755744934082f,
-  0.427393525838852f, -0.494700223207474f, 0.427014142274857f, -0.494644373655319f,
-  0.426634758710861f, -0.494588255882263f, 0.426255434751511f, -0.494531840085983f,
-  0.425876170396805f, -0.494475126266479f, 0.425496935844421f, -0.494418144226074f,
-  0.425117731094360f, -0.494360834360123f, 0.424738585948944f, -0.494303256273270f,
-  0.424359470605850f, -0.494245409965515f, 0.423980414867401f, -0.494187235832214f,
-  0.423601418733597f, -0.494128793478012f, 0.423222452402115f, -0.494070053100586f,
-  0.422843515872955f, -0.494011014699936f, 0.422464638948441f, -0.493951678276062f,
-  0.422085791826248f, -0.493892073631287f, 0.421707004308701f, -0.493832170963287f,
-  0.421328276395798f, -0.493771970272064f, 0.420949578285217f, -0.493711471557617f,
-  0.420570939779282f, -0.493650704622269f, 0.420192331075668f, -0.493589639663696f,
-  0.419813781976700f, -0.493528276681900f, 0.419435262680054f, -0.493466645479202f,
-  0.419056802988052f, -0.493404686450958f, 0.418678402900696f, -0.493342459201813f,
-  0.418300032615662f, -0.493279963731766f, 0.417921721935272f, -0.493217140436172f,
-  0.417543441057205f, -0.493154048919678f, 0.417165219783783f, -0.493090659379959f,
-  0.416787058115005f, -0.493026971817017f, 0.416408926248550f, -0.492963016033173f,
-  0.416030853986740f, -0.492898762226105f, 0.415652841329575f, -0.492834210395813f,
-  0.415274858474731f, -0.492769360542297f, 0.414896935224533f, -0.492704242467880f,
-  0.414519041776657f, -0.492638826370239f, 0.414141237735748f, -0.492573112249374f,
-  0.413763463497162f, -0.492507129907608f, 0.413385748863220f, -0.492440819740295f,
-  0.413008064031601f, -0.492374241352081f, 0.412630438804626f, -0.492307394742966f,
-  0.412252873182297f, -0.492240220308304f, 0.411875367164612f, -0.492172777652740f,
-  0.411497890949249f, -0.492105036973953f, 0.411120474338531f, -0.492037028074265f,
-  0.410743117332459f, -0.491968721151352f, 0.410365819931030f, -0.491900116205215f,
-  0.409988552331924f, -0.491831213235855f, 0.409611344337463f, -0.491762012243271f,
-  0.409234195947647f, -0.491692543029785f, 0.408857107162476f, -0.491622805595398f,
-  0.408480048179626f, -0.491552740335464f, 0.408103078603745f, -0.491482406854630f,
-  0.407726138830185f, -0.491411775350571f, 0.407349258661270f, -0.491340845823288f,
-  0.406972438097000f, -0.491269648075104f, 0.406595647335052f, -0.491198152303696f,
-  0.406218945980072f, -0.491126358509064f, 0.405842274427414f, -0.491054296493530f,
-  0.405465662479401f, -0.490981936454773f, 0.405089110136032f, -0.490909278392792f,
-  0.404712617397308f, -0.490836352109909f, 0.404336184263229f, -0.490763127803802f,
-  0.403959810733795f, -0.490689605474472f, 0.403583467006683f, -0.490615785121918f,
-  0.403207212686539f, -0.490541696548462f, 0.402830988168716f, -0.490467309951782f,
-  0.402454853057861f, -0.490392625331879f, 0.402078747749329f, -0.490317672491074f,
-  0.401702702045441f, -0.490242421627045f, 0.401326715946198f, -0.490166902542114f,
-  0.400950789451599f, -0.490091055631638f, 0.400574922561646f, -0.490014940500259f,
-  0.400199115276337f, -0.489938557147980f, 0.399823367595673f, -0.489861875772476f,
-  0.399447679519653f, -0.489784896373749f, 0.399072051048279f, -0.489707618951797f,
-  0.398696482181549f, -0.489630073308945f, 0.398320972919464f, -0.489552229642868f,
-  0.397945523262024f, -0.489474087953568f, 0.397570133209229f, -0.489395678043365f,
-  0.397194802761078f, -0.489316970109940f, 0.396819531917572f, -0.489237964153290f,
-  0.396444320678711f, -0.489158689975739f, 0.396069169044495f, -0.489079117774963f,
-  0.395694077014923f, -0.488999247550964f, 0.395319044589996f, -0.488919109106064f,
-  0.394944071769714f, -0.488838672637939f, 0.394569188356400f, -0.488757967948914f,
-  0.394194334745407f, -0.488676935434341f, 0.393819570541382f, -0.488595664501190f,
-  0.393444836139679f, -0.488514065742493f, 0.393070191144943f, -0.488432198762894f,
-  0.392695605754852f, -0.488350033760071f, 0.392321079969406f, -0.488267600536346f,
-  0.391946613788605f, -0.488184869289398f, 0.391572207212448f, -0.488101840019226f,
-  0.391197860240936f, -0.488018542528152f, 0.390823602676392f, -0.487934947013855f,
-  0.390449374914169f, -0.487851053476334f, 0.390075236558914f, -0.487766891717911f,
-  0.389701157808304f, -0.487682431936264f, 0.389327138662338f, -0.487597703933716f,
-  0.388953179121017f, -0.487512677907944f, 0.388579308986664f, -0.487427353858948f,
-  0.388205498456955f, -0.487341761589050f, 0.387831717729568f, -0.487255871295929f,
-  0.387458056211472f, -0.487169682979584f, 0.387084424495697f, -0.487083226442337f,
-  0.386710882186890f, -0.486996471881866f, 0.386337369680405f, -0.486909449100494f,
-  0.385963946580887f, -0.486822128295898f, 0.385590612888336f, -0.486734509468079f,
-  0.385217308998108f, -0.486646622419357f, 0.384844094514847f, -0.486558437347412f,
-  0.384470939636230f, -0.486469984054565f, 0.384097874164581f, -0.486381232738495f,
-  0.383724838495255f, -0.486292183399200f, 0.383351892232895f, -0.486202865839005f,
-  0.382979035377502f, -0.486113250255585f, 0.382606208324432f, -0.486023366451263f,
-  0.382233470678329f, -0.485933154821396f, 0.381860792636871f, -0.485842704772949f,
-  0.381488204002380f, -0.485751956701279f, 0.381115674972534f, -0.485660910606384f,
-  0.380743205547333f, -0.485569566488266f, 0.380370795726776f, -0.485477954149246f,
-  0.379998475313187f, -0.485386073589325f, 0.379626244306564f, -0.485293895006180f,
-  0.379254043102264f, -0.485201418399811f, 0.378881961107254f, -0.485108673572540f,
-  0.378509908914566f, -0.485015630722046f, 0.378137946128845f, -0.484922289848328f,
-  0.377766042947769f, -0.484828680753708f, 0.377394229173660f, -0.484734803438187f,
-  0.377022475004196f, -0.484640628099442f, 0.376650810241699f, -0.484546154737473f,
-  0.376279205083847f, -0.484451413154602f, 0.375907659530640f, -0.484356373548508f,
-  0.375536203384399f, -0.484261035919189f, 0.375164806842804f, -0.484165430068970f,
-  0.374793499708176f, -0.484069555997849f, 0.374422252178192f, -0.483973383903503f,
-  0.374051094055176f, -0.483876913785934f, 0.373679995536804f, -0.483780175447464f,
-  0.373308986425400f, -0.483683139085770f, 0.372938036918640f, -0.483585834503174f,
-  0.372567176818848f, -0.483488231897354f, 0.372196376323700f, -0.483390361070633f,
-  0.371825665235519f, -0.483292192220688f, 0.371455013751984f, -0.483193725347519f,
-  0.371084451675415f, -0.483094990253448f, 0.370713949203491f, -0.482995986938477f,
-  0.370343536138535f, -0.482896685600281f, 0.369973212480545f, -0.482797086238861f,
-  0.369602948427200f, -0.482697218656540f, 0.369232743978500f, -0.482597053050995f,
-  0.368862658739090f, -0.482496619224548f, 0.368492603302002f, -0.482395917177200f,
-  0.368122667074203f, -0.482294887304306f, 0.367752790451050f, -0.482193619012833f,
-  0.367382973432541f, -0.482092022895813f, 0.367013275623322f, -0.481990188360214f,
-  0.366643607616425f, -0.481888025999069f, 0.366274058818817f, -0.481785595417023f,
-  0.365904569625854f, -0.481682896614075f, 0.365535169839859f, -0.481579899787903f,
-  0.365165829658508f, -0.481476634740829f, 0.364796578884125f, -0.481373071670532f,
-  0.364427417516708f, -0.481269240379334f, 0.364058345556259f, -0.481165111064911f,
-  0.363689333200455f, -0.481060713529587f, 0.363320380449295f, -0.480956017971039f,
-  0.362951546907425f, -0.480851024389267f, 0.362582772970200f, -0.480745792388916f,
-  0.362214088439941f, -0.480640232563019f, 0.361845493316650f, -0.480534434318542f,
-  0.361476957798004f, -0.480428308248520f, 0.361108511686325f, -0.480321943759918f,
-  0.360740154981613f, -0.480215251445770f, 0.360371887683868f, -0.480108320713043f,
-  0.360003679990768f, -0.480001062154770f, 0.359635561704636f, -0.479893565177917f,
-  0.359267532825470f, -0.479785770177841f, 0.358899593353271f, -0.479677677154541f,
-  0.358531713485718f, -0.479569315910339f, 0.358163923025131f, -0.479460656642914f,
-  0.357796221971512f, -0.479351729154587f, 0.357428610324860f, -0.479242533445358f,
-  0.357061088085175f, -0.479133039712906f, 0.356693625450134f, -0.479023247957230f,
-  0.356326282024384f, -0.478913217782974f, 0.355958998203278f, -0.478802859783173f,
-  0.355591803789139f, -0.478692263364792f, 0.355224698781967f, -0.478581339120865f,
-  0.354857653379440f, -0.478470176458359f, 0.354490727186203f, -0.478358715772629f,
-  0.354123860597610f, -0.478246957063675f, 0.353757113218308f, -0.478134930133820f,
-  0.353390425443649f, -0.478022634983063f, 0.353023827075958f, -0.477910041809082f,
-  0.352657318115234f, -0.477797180414200f, 0.352290898561478f, -0.477684020996094f,
-  0.351924568414688f, -0.477570593357086f, 0.351558297872543f, -0.477456867694855f,
-  0.351192146539688f, -0.477342873811722f, 0.350826084613800f, -0.477228611707687f,
-  0.350460082292557f, -0.477114051580429f, 0.350094199180603f, -0.476999223232269f,
-  0.349728375673294f, -0.476884096860886f, 0.349362671375275f, -0.476768702268600f,
-  0.348997026681900f, -0.476653009653091f, 0.348631471395493f, -0.476537048816681f,
-  0.348266035318375f, -0.476420819759369f, 0.347900658845901f, -0.476304292678833f,
-  0.347535371780396f, -0.476187497377396f, 0.347170203924179f, -0.476070433855057f,
-  0.346805095672607f, -0.475953072309494f, 0.346440106630325f, -0.475835442543030f,
-  0.346075177192688f, -0.475717514753342f, 0.345710366964340f, -0.475599318742752f,
-  0.345345616340637f, -0.475480824708939f, 0.344980984926224f, -0.475362062454224f,
-  0.344616413116455f, -0.475243031978607f, 0.344251960515976f, -0.475123733282089f,
-  0.343887597322464f, -0.475004136562347f, 0.343523323535919f, -0.474884241819382f,
-  0.343159139156342f, -0.474764078855515f, 0.342795044183731f, -0.474643647670746f,
-  0.342431038618088f, -0.474522948265076f, 0.342067122459412f, -0.474401950836182f,
-  0.341703325510025f, -0.474280685186386f, 0.341339588165283f, -0.474159121513367f,
-  0.340975970029831f, -0.474037289619446f, 0.340612411499023f, -0.473915189504623f,
-  0.340248972177505f, -0.473792791366577f, 0.339885622262955f, -0.473670125007629f,
-  0.339522391557693f, -0.473547190427780f, 0.339159220457077f, -0.473423957824707f,
-  0.338796168565750f, -0.473300457000732f, 0.338433176279068f, -0.473176687955856f,
-  0.338070303201675f, -0.473052620887756f, 0.337707549333572f, -0.472928285598755f,
-  0.337344855070114f, -0.472803652286530f, 0.336982280015945f, -0.472678780555725f,
-  0.336619764566422f, -0.472553610801697f, 0.336257368326187f, -0.472428143024445f,
-  0.335895091295242f, -0.472302407026291f, 0.335532873868942f, -0.472176402807236f,
-  0.335170775651932f, -0.472050130367279f, 0.334808766841888f, -0.471923559904099f,
-  0.334446847438812f, -0.471796721220016f, 0.334085017442703f, -0.471669614315033f,
-  0.333723306655884f, -0.471542209386826f, 0.333361685276031f, -0.471414536237717f,
-  0.333000183105469f, -0.471286594867706f, 0.332638740539551f, -0.471158385276794f,
-  0.332277417182922f, -0.471029877662659f, 0.331916213035584f, -0.470901101827621f,
-  0.331555068492889f, -0.470772027969360f, 0.331194043159485f, -0.470642685890198f,
-  0.330833107233047f, -0.470513075590134f, 0.330472290515900f, -0.470383197069168f,
-  0.330111563205719f, -0.470253020524979f, 0.329750925302505f, -0.470122605562210f,
-  0.329390406608582f, -0.469991862773895f, 0.329029977321625f, -0.469860881567001f,
-  0.328669637441635f, -0.469729602336884f, 0.328309416770935f, -0.469598054885864f,
-  0.327949285507202f, -0.469466239213943f, 0.327589273452759f, -0.469334155321121f,
-  0.327229350805283f, -0.469201773405075f, 0.326869517564774f, -0.469069123268127f,
-  0.326509803533554f, -0.468936175107956f, 0.326150178909302f, -0.468802988529205f,
-  0.325790673494339f, -0.468669503927231f, 0.325431257486343f, -0.468535751104355f,
-  0.325071930885315f, -0.468401730060577f, 0.324712723493576f, -0.468267410993576f,
-  0.324353635311127f, -0.468132823705673f, 0.323994606733322f, -0.467997968196869f,
-  0.323635727167130f, -0.467862844467163f, 0.323276937007904f, -0.467727422714233f,
-  0.322918236255646f, -0.467591762542725f, 0.322559654712677f, -0.467455804347992f,
-  0.322201162576675f, -0.467319577932358f, 0.321842789649963f, -0.467183053493500f,
-  0.321484506130219f, -0.467046260833740f, 0.321126341819763f, -0.466909229755402f,
-  0.320768296718597f, -0.466771900653839f, 0.320410341024399f, -0.466634273529053f,
-  0.320052474737167f, -0.466496407985687f, 0.319694727659225f, -0.466358244419098f,
-  0.319337099790573f, -0.466219812631607f, 0.318979561328888f, -0.466081112623215f,
-  0.318622142076492f, -0.465942144393921f, 0.318264812231064f, -0.465802878141403f,
-  0.317907601594925f, -0.465663343667984f, 0.317550510168076f, -0.465523540973663f,
-  0.317193508148193f, -0.465383470058441f, 0.316836595535278f, -0.465243130922318f,
-  0.316479831933975f, -0.465102523565292f, 0.316123157739639f, -0.464961618185043f,
-  0.315766572952271f, -0.464820444583893f, 0.315410137176514f, -0.464679002761841f,
-  0.315053790807724f, -0.464537292718887f, 0.314697533845901f, -0.464395314455032f,
-  0.314341396093369f, -0.464253038167953f, 0.313985377550125f, -0.464110493659973f,
-  0.313629478216171f, -0.463967710733414f, 0.313273668289185f, -0.463824629783630f,
-  0.312917977571487f, -0.463681250810623f, 0.312562376260757f, -0.463537633419037f,
-  0.312206923961639f, -0.463393747806549f, 0.311851561069489f, -0.463249564170837f,
-  0.311496287584305f, -0.463105112314224f, 0.311141163110733f, -0.462960392236710f,
-  0.310786128044128f, -0.462815403938293f, 0.310431212186813f, -0.462670147418976f,
-  0.310076385736465f, -0.462524622678757f, 0.309721708297729f, -0.462378799915314f,
-  0.309367120265961f, -0.462232738733292f, 0.309012651443481f, -0.462086379528046f,
-  0.308658272027969f, -0.461939752101898f, 0.308304041624069f, -0.461792886257172f,
-  0.307949900627136f, -0.461645722389221f, 0.307595878839493f, -0.461498260498047f,
-  0.307241976261139f, -0.461350560188293f, 0.306888192892075f, -0.461202591657639f,
-  0.306534498929977f, -0.461054325103760f, 0.306180924177170f, -0.460905820131302f,
-  0.305827468633652f, -0.460757017135620f, 0.305474132299423f, -0.460607945919037f,
-  0.305120915174484f, -0.460458606481552f, 0.304767817258835f, -0.460309028625488f,
-  0.304414808750153f, -0.460159152746201f, 0.304061919450760f, -0.460008978843689f,
-  0.303709149360657f, -0.459858566522598f, 0.303356528282166f, -0.459707885980606f,
-  0.303003966808319f, -0.459556937217712f, 0.302651554346085f, -0.459405690431595f,
-  0.302299261093140f, -0.459254205226898f, 0.301947087049484f, -0.459102421998978f,
-  0.301595002412796f, -0.458950400352478f, 0.301243066787720f, -0.458798080682755f,
-  0.300891220569611f, -0.458645492792130f, 0.300539493560791f, -0.458492636680603f,
-  0.300187885761261f, -0.458339542150497f, 0.299836426973343f, -0.458186149597168f,
-  0.299485057592392f, -0.458032488822937f, 0.299133807420731f, -0.457878559827805f,
-  0.298782676458359f, -0.457724362611771f, 0.298431664705276f, -0.457569897174835f,
-  0.298080772161484f, -0.457415163516998f, 0.297729998826981f, -0.457260161638260f,
-  0.297379344701767f, -0.457104891538620f, 0.297028809785843f, -0.456949323415756f,
-  0.296678394079208f, -0.456793516874313f, 0.296328097581863f, -0.456637442111969f,
-  0.295977920293808f, -0.456481099128723f, 0.295627862215042f, -0.456324487924576f,
-  0.295277923345566f, -0.456167578697205f, 0.294928103685379f, -0.456010431051254f,
-  0.294578403234482f, -0.455853015184402f, 0.294228851795197f, -0.455695331096649f,
-  0.293879389762878f, -0.455537378787994f, 0.293530046939850f, -0.455379128456116f,
-  0.293180853128433f, -0.455220639705658f, 0.292831748723984f, -0.455061882734299f,
-  0.292482793331146f, -0.454902857542038f, 0.292133957147598f, -0.454743564128876f,
-  0.291785210371017f, -0.454584002494812f, 0.291436612606049f, -0.454424172639847f,
-  0.291088134050369f, -0.454264044761658f, 0.290739774703979f, -0.454103678464890f,
-  0.290391564369202f, -0.453943043947220f, 0.290043443441391f, -0.453782171010971f,
-  0.289695471525192f, -0.453621000051498f, 0.289347589015961f, -0.453459560871124f,
-  0.288999855518341f, -0.453297853469849f, 0.288652241230011f, -0.453135877847672f,
-  0.288304775953293f, -0.452973634004593f, 0.287957400083542f, -0.452811151742935f,
-  0.287610173225403f, -0.452648371458054f, 0.287263035774231f, -0.452485352754593f,
-  0.286916047334671f, -0.452322036027908f, 0.286569178104401f, -0.452158480882645f,
-  0.286222457885742f, -0.451994657516479f, 0.285875827074051f, -0.451830536127090f,
-  0.285529345273972f, -0.451666176319122f, 0.285182982683182f, -0.451501548290253f,
-  0.284836769104004f, -0.451336652040482f, 0.284490644931793f, -0.451171487569809f,
-  0.284144669771194f, -0.451006084680557f, 0.283798813819885f, -0.450840383768082f,
-  0.283453077077866f, -0.450674414634705f, 0.283107489347458f, -0.450508207082748f,
-  0.282762020826340f, -0.450341701507568f, 0.282416671514511f, -0.450174957513809f,
-  0.282071471214294f, -0.450007945299149f, 0.281726360321045f, -0.449840664863586f,
-  0.281381398439407f, -0.449673116207123f, 0.281036585569382f, -0.449505299329758f,
-  0.280691891908646f, -0.449337244033813f, 0.280347317457199f, -0.449168890714645f,
-  0.280002862215042f, -0.449000298976898f, 0.279658555984497f, -0.448831409215927f,
-  0.279314368963242f, -0.448662281036377f, 0.278970301151276f, -0.448492884635925f,
-  0.278626382350922f, -0.448323249816895f, 0.278282582759857f, -0.448153316974640f,
-  0.277938932180405f, -0.447983115911484f, 0.277595400810242f, -0.447812676429749f,
-  0.277251988649368f, -0.447641968727112f, 0.276908725500107f, -0.447470992803574f,
-  0.276565581560135f, -0.447299748659134f, 0.276222556829453f, -0.447128236293793f,
-  0.275879681110382f, -0.446956485509872f, 0.275536954402924f, -0.446784436702728f,
-  0.275194346904755f, -0.446612149477005f, 0.274851858615875f, -0.446439594030380f,
-  0.274509519338608f, -0.446266770362854f, 0.274167299270630f, -0.446093708276749f,
-  0.273825198411942f, -0.445920348167419f, 0.273483246564865f, -0.445746749639511f,
-  0.273141443729401f, -0.445572882890701f, 0.272799760103226f, -0.445398747920990f,
-  0.272458195686340f, -0.445224374532700f, 0.272116780281067f, -0.445049703121185f,
-  0.271775513887405f, -0.444874793291092f, 0.271434366703033f, -0.444699615240097f,
-  0.271093338727951f, -0.444524168968201f, 0.270752459764481f, -0.444348484277725f,
-  0.270411729812622f, -0.444172531366348f, 0.270071119070053f, -0.443996280431747f,
-  0.269730657339096f, -0.443819820880890f, 0.269390314817429f, -0.443643063306808f,
-  0.269050091505051f, -0.443466067314148f, 0.268710047006607f, -0.443288803100586f,
-  0.268370121717453f, -0.443111270666122f, 0.268030315637589f, -0.442933470010757f,
-  0.267690658569336f, -0.442755430936813f, 0.267351150512695f, -0.442577123641968f,
-  0.267011761665344f, -0.442398548126221f, 0.266672492027283f, -0.442219734191895f,
-  0.266333401203156f, -0.442040622234344f, 0.265994429588318f, -0.441861271858215f,
-  0.265655577182770f, -0.441681683063507f, 0.265316903591156f, -0.441501796245575f,
-  0.264978319406509f, -0.441321671009064f, 0.264639914035797f, -0.441141277551651f,
-  0.264301627874374f, -0.440960645675659f, 0.263963490724564f, -0.440779715776443f,
-  0.263625472784042f, -0.440598547458649f, 0.263287603855133f, -0.440417140722275f,
-  0.262949883937836f, -0.440235435962677f, 0.262612313032150f, -0.440053492784500f,
-  0.262274861335754f, -0.439871311187744f, 0.261937558650970f, -0.439688831567764f,
-  0.261600375175476f, -0.439506113529205f, 0.261263370513916f, -0.439323127269745f,
-  0.260926485061646f, -0.439139902591705f, 0.260589718818665f, -0.438956409692764f,
-  0.260253131389618f, -0.438772648572922f, 0.259916663169861f, -0.438588619232178f,
-  0.259580343961716f, -0.438404351472855f, 0.259244143962860f, -0.438219845294952f,
-  0.258908122777939f, -0.438035041093826f, 0.258572220802307f, -0.437849998474121f,
-  0.258236467838287f, -0.437664687633514f, 0.257900834083557f, -0.437479138374329f,
-  0.257565379142761f, -0.437293320894241f, 0.257230043411255f, -0.437107264995575f,
-  0.256894856691360f, -0.436920911073685f, 0.256559818983078f, -0.436734348535538f,
-  0.256224930286407f, -0.436547487974167f, 0.255890160799026f, -0.436360388994217f,
-  0.255555540323257f, -0.436173021793365f, 0.255221068859100f, -0.435985416173935f,
-  0.254886746406555f, -0.435797542333603f, 0.254552572965622f, -0.435609430074692f,
-  0.254218548536301f, -0.435421019792557f, 0.253884643316269f, -0.435232400894165f,
-  0.253550916910172f, -0.435043483972549f, 0.253217309713364f, -0.434854328632355f,
-  0.252883851528168f, -0.434664934873581f, 0.252550542354584f, -0.434475272893906f,
-  0.252217382192612f, -0.434285342693329f, 0.251884341239929f, -0.434095174074173f,
-  0.251551479101181f, -0.433904737234116f, 0.251218736171722f, -0.433714061975479f,
-  0.250886172056198f, -0.433523118495941f, 0.250553727149963f, -0.433331936597824f,
-  0.250221431255341f, -0.433140486478806f, 0.249889299273491f, -0.432948768138886f,
-  0.249557301402092f, -0.432756811380386f, 0.249225467443466f, -0.432564586400986f,
-  0.248893767595291f, -0.432372123003006f, 0.248562216758728f, -0.432179391384125f,
-  0.248230814933777f, -0.431986421346664f, 0.247899547219276f, -0.431793183088303f,
-  0.247568443417549f, -0.431599706411362f, 0.247237488627434f, -0.431405961513519f,
-  0.246906682848930f, -0.431211978197098f, 0.246576011180878f, -0.431017726659775f,
-  0.246245503425598f, -0.430823236703873f, 0.245915144681931f, -0.430628478527069f,
-  0.245584934949875f, -0.430433481931686f, 0.245254859328270f, -0.430238217115402f,
-  0.244924947619438f, -0.430042684078217f, 0.244595184922218f, -0.429846942424774f,
-  0.244265571236610f, -0.429650902748108f, 0.243936106562614f, -0.429454624652863f,
-  0.243606805801392f, -0.429258108139038f, 0.243277639150620f, -0.429061323404312f,
-  0.242948621511459f, -0.428864300251007f, 0.242619767785072f, -0.428667008876801f,
-  0.242291063070297f, -0.428469479084015f, 0.241962507367134f, -0.428271710872650f,
-  0.241634100675583f, -0.428073674440384f, 0.241305842995644f, -0.427875369787216f,
-  0.240977749228477f, -0.427676826715469f, 0.240649804472923f, -0.427478045225143f,
-  0.240322008728981f, -0.427278995513916f, 0.239994361996651f, -0.427079707384110f,
-  0.239666879177094f, -0.426880151033401f, 0.239339530467987f, -0.426680356264114f,
-  0.239012360572815f, -0.426480293273926f, 0.238685324788094f, -0.426279991865158f,
-  0.238358452916145f, -0.426079452037811f, 0.238031730055809f, -0.425878643989563f,
-  0.237705156207085f, -0.425677597522736f, 0.237378746271133f, -0.425476282835007f,
-  0.237052485346794f, -0.425274729728699f, 0.236726388335228f, -0.425072938203812f,
-  0.236400425434113f, -0.424870878458023f, 0.236074641346931f, -0.424668580293655f,
-  0.235749006271362f, -0.424466013908386f, 0.235423520207405f, -0.424263238906860f,
-  0.235098183155060f, -0.424060165882111f, 0.234773010015488f, -0.423856884241104f,
-  0.234448000788689f, -0.423653304576874f, 0.234123140573502f, -0.423449516296387f,
-  0.233798429369926f, -0.423245459794998f, 0.233473882079124f, -0.423041164875031f,
-  0.233149498701096f, -0.422836631536484f, 0.232825264334679f, -0.422631829977036f,
-  0.232501193881035f, -0.422426789999008f, 0.232177272439003f, -0.422221481800079f,
-  0.231853514909744f, -0.422015935182571f, 0.231529906392097f, -0.421810150146484f,
-  0.231206461787224f, -0.421604126691818f, 0.230883181095123f, -0.421397835016251f,
-  0.230560049414635f, -0.421191304922104f, 0.230237081646919f, -0.420984506607056f,
-  0.229914262890816f, -0.420777499675751f, 0.229591608047485f, -0.420570224523544f,
-  0.229269117116928f, -0.420362681150436f, 0.228946775197983f, -0.420154929161072f,
-  0.228624612092972f, -0.419946908950806f, 0.228302597999573f, -0.419738620519638f,
-  0.227980732917786f, -0.419530123472214f, 0.227659046649933f, -0.419321358203888f,
-  0.227337509393692f, -0.419112354516983f, 0.227016136050224f, -0.418903112411499f,
-  0.226694911718369f, -0.418693602085114f, 0.226373866200447f, -0.418483853340149f,
-  0.226052969694138f, -0.418273866176605f, 0.225732237100601f, -0.418063640594482f,
-  0.225411668419838f, -0.417853146791458f, 0.225091263651848f, -0.417642414569855f,
-  0.224771007895470f, -0.417431443929672f, 0.224450930953026f, -0.417220205068588f,
-  0.224131003022194f, -0.417008757591248f, 0.223811239004135f, -0.416797041893005f,
-  0.223491653800011f, -0.416585087776184f, 0.223172217607498f, -0.416372895240784f,
-  0.222852945327759f, -0.416160434484482f, 0.222533836960793f, -0.415947735309601f,
-  0.222214877605438f, -0.415734797716141f, 0.221896097064018f, -0.415521621704102f,
-  0.221577480435371f, -0.415308207273483f, 0.221259027719498f, -0.415094524621964f,
-  0.220940738916397f, -0.414880603551865f, 0.220622614026070f, -0.414666473865509f,
-  0.220304638147354f, -0.414452046155930f, 0.219986841082573f, -0.414237409830093f,
-  0.219669207930565f, -0.414022535085678f, 0.219351738691330f, -0.413807392120361f,
-  0.219034433364868f, -0.413592010736465f, 0.218717306852341f, -0.413376390933990f,
-  0.218400329351425f, -0.413160532712936f, 0.218083515763283f, -0.412944436073303f,
-  0.217766880989075f, -0.412728071212769f, 0.217450410127640f, -0.412511497735977f,
-  0.217134088277817f, -0.412294656038284f, 0.216817945241928f, -0.412077575922012f,
-  0.216501981019974f, -0.411860257387161f, 0.216186165809631f, -0.411642700433731f,
-  0.215870529413223f, -0.411424905061722f, 0.215555042028427f, -0.411206841468811f,
-  0.215239733457565f, -0.410988569259644f, 0.214924603700638f, -0.410770028829575f,
-  0.214609622955322f, -0.410551249980927f, 0.214294821023941f, -0.410332232713699f,
-  0.213980183005333f, -0.410112977027893f, 0.213665723800659f, -0.409893482923508f,
-  0.213351413607597f, -0.409673750400543f, 0.213037282228470f, -0.409453779459000f,
-  0.212723329663277f, -0.409233570098877f, 0.212409526109695f, -0.409013092517853f,
-  0.212095901370049f, -0.408792406320572f, 0.211782455444336f, -0.408571451902390f,
-  0.211469158530235f, -0.408350288867950f, 0.211156040430069f, -0.408128857612610f,
-  0.210843101143837f, -0.407907217741013f, 0.210530325770378f, -0.407685309648514f,
-  0.210217714309692f, -0.407463163137436f, 0.209905281662941f, -0.407240778207779f,
-  0.209593027830124f, -0.407018154859543f, 0.209280923008919f, -0.406795293092728f,
-  0.208969011902809f, -0.406572192907333f, 0.208657249808311f, -0.406348884105682f,
-  0.208345666527748f, -0.406125307083130f, 0.208034262061119f, -0.405901491641998f,
-  0.207723021507263f, -0.405677437782288f, 0.207411959767342f, -0.405453115701675f,
-  0.207101076841354f, -0.405228585004807f, 0.206790357828140f, -0.405003815889359f,
-  0.206479802727699f, -0.404778808355331f, 0.206169426441193f, -0.404553562402725f,
-  0.205859228968620f, -0.404328078031540f, 0.205549195408821f, -0.404102355241776f,
-  0.205239340662956f, -0.403876423835754f, 0.204929664731026f, -0.403650224208832f,
-  0.204620152711868f, -0.403423786163330f, 0.204310819506645f, -0.403197109699249f,
-  0.204001650214195f, -0.402970194816589f, 0.203692659735680f, -0.402743041515350f,
-  0.203383848071098f, -0.402515679597855f, 0.203075215220451f, -0.402288049459457f,
-  0.202766746282578f, -0.402060180902481f, 0.202458456158638f, -0.401832103729248f,
-  0.202150344848633f, -0.401603758335114f, 0.201842412352562f, -0.401375204324722f,
-  0.201534643769264f, -0.401146411895752f, 0.201227053999901f, -0.400917351245880f,
-  0.200919643044472f, -0.400688081979752f, 0.200612410902977f, -0.400458574295044f,
-  0.200305357575417f, -0.400228828191757f, 0.199998468160629f, -0.399998843669891f,
-  0.199691757559776f, -0.399768620729446f, 0.199385225772858f, -0.399538189172745f,
-  0.199078872799873f, -0.399307489395142f, 0.198772698640823f, -0.399076581001282f,
-  0.198466703295708f, -0.398845434188843f, 0.198160871863365f, -0.398614019155502f,
-  0.197855234146118f, -0.398382395505905f, 0.197549775242805f, -0.398150533437729f,
-  0.197244480252266f, -0.397918462753296f, 0.196939364075661f, -0.397686123847961f,
-  0.196634441614151f, -0.397453576326370f, 0.196329683065414f, -0.397220760583878f,
-  0.196025103330612f, -0.396987736225128f, 0.195720717310905f, -0.396754473447800f,
-  0.195416495203972f, -0.396520972251892f, 0.195112451910973f, -0.396287262439728f,
-  0.194808602333069f, -0.396053284406662f, 0.194504916667938f, -0.395819097757339f,
-  0.194201424717903f, -0.395584672689438f, 0.193898096680641f, -0.395350009202957f,
-  0.193594962358475f, -0.395115107297897f, 0.193292006850243f, -0.394879996776581f,
-  0.192989215254784f, -0.394644618034363f, 0.192686617374420f, -0.394409030675888f,
-  0.192384198307991f, -0.394173204898834f, 0.192081972956657f, -0.393937170505524f,
-  0.191779911518097f, -0.393700867891312f, 0.191478043794632f, -0.393464356660843f,
-  0.191176339983940f, -0.393227607011795f, 0.190874829888344f, -0.392990618944168f,
-  0.190573498606682f, -0.392753422260284f, 0.190272361040115f, -0.392515957355499f,
-  0.189971387386322f, -0.392278283834457f, 0.189670607447624f, -0.392040401697159f,
-  0.189370006322861f, -0.391802251338959f, 0.189069598913193f, -0.391563892364502f,
-  0.188769355416298f, -0.391325294971466f, 0.188469305634499f, -0.391086459159851f,
-  0.188169434666634f, -0.390847414731979f, 0.187869757413864f, -0.390608131885529f,
-  0.187570258975029f, -0.390368610620499f, 0.187270939350128f, -0.390128880739212f,
-  0.186971798539162f, -0.389888882637024f, 0.186672851443291f, -0.389648675918579f,
-  0.186374098062515f, -0.389408260583878f, 0.186075508594513f, -0.389167606830597f,
-  0.185777112841606f, -0.388926714658737f, 0.185478910803795f, -0.388685584068298f,
-  0.185180887579918f, -0.388444244861603f, 0.184883043169975f, -0.388202667236328f,
-  0.184585392475128f, -0.387960851192474f, 0.184287920594215f, -0.387718826532364f,
-  0.183990627527237f, -0.387476563453674f, 0.183693528175354f, -0.387234061956406f,
-  0.183396622538567f, -0.386991351842880f, 0.183099895715714f, -0.386748403310776f,
-  0.182803362607956f, -0.386505216360092f, 0.182507008314133f, -0.386261820793152f,
-  0.182210832834244f, -0.386018186807632f, 0.181914865970612f, -0.385774344205856f,
-  0.181619063019753f, -0.385530263185501f, 0.181323468685150f, -0.385285943746567f,
-  0.181028053164482f, -0.385041415691376f, 0.180732816457748f, -0.384796649217606f,
-  0.180437773466110f, -0.384551674127579f, 0.180142924189568f, -0.384306460618973f,
-  0.179848253726959f, -0.384061008691788f, 0.179553776979446f, -0.383815348148346f,
-  0.179259493947029f, -0.383569449186325f, 0.178965389728546f, -0.383323341608047f,
-  0.178671479225159f, -0.383076995611191f, 0.178377762436867f, -0.382830440998077f,
-  0.178084224462509f, -0.382583618164063f, 0.177790880203247f, -0.382336616516113f,
-  0.177497729659081f, -0.382089376449585f, 0.177204772830009f, -0.381841897964478f,
-  0.176911994814873f, -0.381594210863113f, 0.176619410514832f, -0.381346285343170f,
-  0.176327019929886f, -0.381098151206970f, 0.176034808158875f, -0.380849778652191f,
-  0.175742805004120f, -0.380601197481155f, 0.175450980663300f, -0.380352377891541f,
-  0.175159350037575f, -0.380103349685669f, 0.174867913126946f, -0.379854083061218f,
-  0.174576655030251f, -0.379604607820511f, 0.174285605549812f, -0.379354894161224f,
-  0.173994734883308f, -0.379104942083359f, 0.173704057931900f, -0.378854811191559f,
-  0.173413574695587f, -0.378604412078857f, 0.173123285174370f, -0.378353834152222f,
-  0.172833189368248f, -0.378102988004684f, 0.172543287277222f, -0.377851963043213f,
-  0.172253578901291f, -0.377600699663162f, 0.171964049339294f, -0.377349197864532f,
-  0.171674728393555f, -0.377097487449646f, 0.171385586261749f, -0.376845568418503f,
-  0.171096652746201f, -0.376593410968781f, 0.170807912945747f, -0.376341015100479f,
-  0.170519351959229f, -0.376088410615921f, 0.170230999588966f, -0.375835597515106f,
-  0.169942826032639f, -0.375582575798035f, 0.169654861092567f, -0.375329315662384f,
-  0.169367074966431f, -0.375075817108154f, 0.169079497456551f, -0.374822109937668f,
-  0.168792113661766f, -0.374568194150925f, 0.168504923582077f, -0.374314039945602f,
-  0.168217927217484f, -0.374059677124023f, 0.167931124567986f, -0.373805105686188f,
-  0.167644515633583f, -0.373550295829773f, 0.167358100414276f, -0.373295277357101f,
-  0.167071878910065f, -0.373040050268173f, 0.166785866022110f, -0.372784584760666f,
-  0.166500031948090f, -0.372528880834579f, 0.166214406490326f, -0.372272998094559f,
-  0.165928974747658f, -0.372016876935959f, 0.165643751621246f, -0.371760547161102f,
-  0.165358707308769f, -0.371503978967667f, 0.165073871612549f, -0.371247202157974f,
-  0.164789214730263f, -0.370990216732025f, 0.164504766464233f, -0.370732992887497f,
-  0.164220526814461f, -0.370475560426712f, 0.163936465978622f, -0.370217919349670f,
-  0.163652613759041f, -0.369960039854050f, 0.163368955254555f, -0.369701951742172f,
-  0.163085505366325f, -0.369443655014038f, 0.162802234292030f, -0.369185149669647f,
-  0.162519171833992f, -0.368926405906677f, 0.162236317992210f, -0.368667453527451f,
-  0.161953642964363f, -0.368408292531967f, 0.161671176552773f, -0.368148893117905f,
-  0.161388918757439f, -0.367889285087585f, 0.161106839776039f, -0.367629468441010f,
-  0.160824984312058f, -0.367369443178177f, 0.160543307662010f, -0.367109179496765f,
-  0.160261839628220f, -0.366848707199097f, 0.159980565309525f, -0.366588026285172f,
-  0.159699499607086f, -0.366327136754990f, 0.159418627619743f, -0.366066008806229f,
-  0.159137964248657f, -0.365804702043533f, 0.158857494592667f, -0.365543156862259f,
-  0.158577233552933f, -0.365281373262405f, 0.158297166228294f, -0.365019410848618f,
-  0.158017292618752f, -0.364757210016251f, 0.157737627625465f, -0.364494800567627f,
-  0.157458171248436f, -0.364232182502747f, 0.157178908586502f, -0.363969355821610f,
-  0.156899839639664f, -0.363706320524216f, 0.156620979309082f, -0.363443046808243f,
-  0.156342327594757f, -0.363179564476013f, 0.156063869595528f, -0.362915903329849f,
-  0.155785620212555f, -0.362651973962784f, 0.155507579445839f, -0.362387865781784f,
-  0.155229732394218f, -0.362123548984528f, 0.154952079057693f, -0.361858993768692f,
-  0.154674649238586f, -0.361594229936600f, 0.154397398233414f, -0.361329287290573f,
-  0.154120370745659f, -0.361064106225967f, 0.153843536973000f, -0.360798716545105f,
-  0.153566911816597f, -0.360533088445663f, 0.153290495276451f, -0.360267281532288f,
-  0.153014272451401f, -0.360001266002655f, 0.152738258242607f, -0.359735012054443f,
-  0.152462437748909f, -0.359468549489975f, 0.152186840772629f, -0.359201908111572f,
-  0.151911437511444f, -0.358935028314590f, 0.151636242866516f, -0.358667939901352f,
-  0.151361241936684f, -0.358400642871857f, 0.151086464524269f, -0.358133137226105f,
-  0.150811880826950f, -0.357865422964096f, 0.150537505745888f, -0.357597470283508f,
-  0.150263324379921f, -0.357329338788986f, 0.149989366531372f, -0.357060998678207f,
-  0.149715602397919f, -0.356792420148849f, 0.149442046880722f, -0.356523662805557f,
-  0.149168699979782f, -0.356254696846008f, 0.148895561695099f, -0.355985492467880f,
-  0.148622632026672f, -0.355716109275818f, 0.148349896073341f, -0.355446487665176f,
-  0.148077383637428f, -0.355176687240601f, 0.147805064916611f, -0.354906648397446f,
-  0.147532954812050f, -0.354636400938034f, 0.147261068224907f, -0.354365974664688f,
-  0.146989375352860f, -0.354095309972763f, 0.146717891097069f, -0.353824466466904f,
-  0.146446615457535f, -0.353553384542465f, 0.146175548434258f, -0.353282123804092f,
-  0.145904675126076f, -0.353010624647141f, 0.145634025335312f, -0.352738946676254f,
-  0.145363584160805f, -0.352467030286789f, 0.145093351602554f, -0.352194935083389f,
-  0.144823327660561f, -0.351922631263733f, 0.144553512334824f, -0.351650089025497f,
-  0.144283905625343f, -0.351377367973328f, 0.144014507532120f, -0.351104438304901f,
-  0.143745318055153f, -0.350831300020218f, 0.143476337194443f, -0.350557953119278f,
-  0.143207564949989f, -0.350284397602081f, 0.142939001321793f, -0.350010633468628f,
-  0.142670661211014f, -0.349736660718918f, 0.142402514815331f, -0.349462509155273f,
-  0.142134591937065f, -0.349188119173050f, 0.141866862773895f, -0.348913550376892f,
-  0.141599357128143f, -0.348638743162155f, 0.141332060098648f, -0.348363757133484f,
-  0.141064971685410f, -0.348088562488556f, 0.140798106789589f, -0.347813159227371f,
-  0.140531435608864f, -0.347537547349930f, 0.140264987945557f, -0.347261756658554f,
-  0.139998748898506f, -0.346985727548599f, 0.139732718467712f, -0.346709519624710f,
-  0.139466896653175f, -0.346433073282242f, 0.139201298356056f, -0.346156448125839f,
-  0.138935908675194f, -0.345879614353180f, 0.138670727610588f, -0.345602601766586f,
-  0.138405755162239f, -0.345325350761414f, 0.138141006231308f, -0.345047920942307f,
-  0.137876465916634f, -0.344770282506943f, 0.137612134218216f, -0.344492435455322f,
-  0.137348011136055f, -0.344214379787445f, 0.137084111571312f, -0.343936115503311f,
-  0.136820420622826f, -0.343657672405243f, 0.136556953191757f, -0.343379020690918f,
-  0.136293679475784f, -0.343100160360336f, 0.136030644178391f, -0.342821091413498f,
-  0.135767802596092f, -0.342541843652725f, 0.135505184531212f, -0.342262357473373f,
-  0.135242775082588f, -0.341982692480087f, 0.134980589151382f, -0.341702848672867f,
-  0.134718611836433f, -0.341422766447067f, 0.134456858038902f, -0.341142505407333f,
-  0.134195312857628f, -0.340862035751343f, 0.133933976292610f, -0.340581357479095f,
-  0.133672863245010f, -0.340300500392914f, 0.133411958813667f, -0.340019434690475f,
-  0.133151277899742f, -0.339738160371780f, 0.132890805602074f, -0.339456677436829f,
-  0.132630556821823f, -0.339175015687943f, 0.132370531558990f, -0.338893145322800f,
-  0.132110700011253f, -0.338611096143723f, 0.131851106882095f, -0.338328808546066f,
-  0.131591722369194f, -0.338046342134476f, 0.131332546472549f, -0.337763696908951f,
-  0.131073594093323f, -0.337480813264847f, 0.130814850330353f, -0.337197750806808f,
-  0.130556344985962f, -0.336914509534836f, 0.130298033356667f, -0.336631029844284f,
-  0.130039945244789f, -0.336347371339798f, 0.129782080650330f, -0.336063534021378f,
-  0.129524439573288f, -0.335779488086700f, 0.129267007112503f, -0.335495233535767f,
-  0.129009798169136f, -0.335210770368576f, 0.128752797842026f, -0.334926128387451f,
-  0.128496021032333f, -0.334641307592392f, 0.128239467740059f, -0.334356248378754f,
-  0.127983123064041f, -0.334071010351181f, 0.127727001905441f, -0.333785593509674f,
-  0.127471104264259f, -0.333499968051910f, 0.127215430140495f, -0.333214133977890f,
-  0.126959964632988f, -0.332928121089935f, 0.126704722642899f, -0.332641899585724f,
-  0.126449704170227f, -0.332355499267578f, 0.126194894313812f, -0.332068890333176f,
-  0.125940307974815f, -0.331782072782516f, 0.125685945153236f, -0.331495076417923f,
-  0.125431805849075f, -0.331207901239395f, 0.125177875161171f, -0.330920487642288f,
-  0.124924175441265f, -0.330632925033569f, 0.124670691788197f, -0.330345153808594f,
-  0.124417431652546f, -0.330057173967361f, 0.124164395034313f, -0.329769015312195f,
-  0.123911574482918f, -0.329480648040771f, 0.123658977448940f, -0.329192101955414f,
-  0.123406603932381f, -0.328903347253799f, 0.123154446482658f, -0.328614413738251f,
-  0.122902512550354f, -0.328325271606445f, 0.122650802135468f, -0.328035950660706f,
-  0.122399315237999f, -0.327746421098709f, 0.122148044407368f, -0.327456712722778f,
-  0.121896997094154f, -0.327166795730591f, 0.121646173298359f, -0.326876699924469f,
-  0.121395580470562f, -0.326586425304413f, 0.121145196259022f, -0.326295942068100f,
-  0.120895043015480f, -0.326005280017853f, 0.120645113289356f, -0.325714409351349f,
-  0.120395407080650f, -0.325423330068588f, 0.120145916938782f, -0.325132101774216f,
-  0.119896657764912f, -0.324840664863586f, 0.119647622108459f, -0.324549019336700f,
-  0.119398809969425f, -0.324257194995880f, 0.119150213897228f, -0.323965191841125f,
-  0.118901848793030f, -0.323672980070114f, 0.118653707206249f, -0.323380589485168f,
-  0.118405789136887f, -0.323088020086288f, 0.118158094584942f, -0.322795242071152f,
-  0.117910631000996f, -0.322502255439758f, 0.117663383483887f, -0.322209119796753f,
-  0.117416366934776f, -0.321915775537491f, 0.117169573903084f, -0.321622252464294f,
-  0.116923004388809f, -0.321328520774841f, 0.116676658391953f, -0.321034610271454f,
-  0.116430543363094f, -0.320740520954132f, 0.116184651851654f, -0.320446223020554f,
-  0.115938983857632f, -0.320151746273041f, 0.115693546831608f, -0.319857090711594f,
-  0.115448333323002f, -0.319562226533890f, 0.115203343331814f, -0.319267183542252f,
-  0.114958584308624f, -0.318971961736679f, 0.114714048802853f, -0.318676531314850f,
-  0.114469736814499f, -0.318380922079086f, 0.114225655794144f, -0.318085134029388f,
-  0.113981798291206f, -0.317789167165756f, 0.113738171756268f, -0.317492991685867f,
-  0.113494776189327f, -0.317196637392044f, 0.113251596689224f, -0.316900104284287f,
-  0.113008655607700f, -0.316603392362595f, 0.112765938043594f, -0.316306471824646f,
-  0.112523443996906f, -0.316009372472763f, 0.112281180918217f, -0.315712094306946f,
-  0.112039148807526f, -0.315414607524872f, 0.111797347664833f, -0.315116971731186f,
-  0.111555770039558f, -0.314819127321243f, 0.111314415931702f, -0.314521104097366f,
-  0.111073300242424f, -0.314222872257233f, 0.110832408070564f, -0.313924491405487f,
-  0.110591746866703f, -0.313625901937485f, 0.110351309180260f, -0.313327133655548f,
-  0.110111102461815f, -0.313028186559677f, 0.109871134161949f, -0.312729060649872f,
-  0.109631389379501f, -0.312429755926132f, 0.109391868114471f, -0.312130242586136f,
-  0.109152585268021f, -0.311830550432205f, 0.108913525938988f, -0.311530679464340f,
-  0.108674705028534f, -0.311230629682541f, 0.108436107635498f, -0.310930401086807f,
-  0.108197741210461f, -0.310629993677139f, 0.107959605753422f, -0.310329377651215f,
-  0.107721701264381f, -0.310028612613678f, 0.107484027743340f, -0.309727638959885f,
-  0.107246585190296f, -0.309426486492157f, 0.107009373605251f, -0.309125155210495f,
-  0.106772392988205f, -0.308823645114899f, 0.106535643339157f, -0.308521956205368f,
-  0.106299124658108f, -0.308220088481903f, 0.106062836945057f, -0.307918041944504f,
-  0.105826787650585f, -0.307615786790848f, 0.105590961873531f, -0.307313382625580f,
-  0.105355374515057f, -0.307010769844055f, 0.105120018124580f, -0.306708008050919f,
-  0.104884892702103f, -0.306405037641525f, 0.104649998247623f, -0.306101888418198f,
-  0.104415334761143f, -0.305798590183258f, 0.104180909693241f, -0.305495083332062f,
-  0.103946708142757f, -0.305191397666931f, 0.103712752461433f, -0.304887533187866f,
-  0.103479020297527f, -0.304583519697189f, 0.103245526552200f, -0.304279297590256f,
-  0.103012263774872f, -0.303974896669388f, 0.102779231965542f, -0.303670316934586f,
-  0.102546438574791f, -0.303365558385849f, 0.102313876152039f, -0.303060621023178f,
-  0.102081544697285f, -0.302755534648895f, 0.101849451661110f, -0.302450239658356f,
-  0.101617597043514f, -0.302144765853882f, 0.101385973393917f, -0.301839113235474f,
-  0.101154580712318f, -0.301533311605453f, 0.100923426449299f, -0.301227301359177f,
-  0.100692503154278f, -0.300921112298965f, 0.100461818277836f, -0.300614774227142f,
-  0.100231364369392f, -0.300308227539063f, 0.100001148879528f, -0.300001531839371f,
-  0.099771171808243f, -0.299694657325745f, 0.099541425704956f, -0.299387603998184f,
-  0.099311910569668f, -0.299080342054367f, 0.099082641303539f, -0.298772931098938f,
-  0.098853603005409f, -0.298465341329575f, 0.098624803125858f, -0.298157602548599f,
-  0.098396234214306f, -0.297849655151367f, 0.098167903721333f, -0.297541528940201f,
-  0.097939811646938f, -0.297233253717422f, 0.097711957991123f, -0.296924799680710f,
-  0.097484335303307f, -0.296616137027740f, 0.097256951034069f, -0.296307325363159f,
-  0.097029805183411f, -0.295998334884644f, 0.096802897751331f, -0.295689195394516f,
-  0.096576221287251f, -0.295379847288132f, 0.096349790692329f, -0.295070350170136f,
-  0.096123591065407f, -0.294760644435883f, 0.095897629857063f, -0.294450789690018f,
-  0.095671907067299f, -0.294140785932541f, 0.095446422696114f, -0.293830573558807f,
-  0.095221176743507f, -0.293520182371140f, 0.094996169209480f, -0.293209642171860f,
-  0.094771400094032f, -0.292898923158646f, 0.094546869397163f, -0.292588025331497f,
-  0.094322577118874f, -0.292276978492737f, 0.094098523259163f, -0.291965723037720f,
-  0.093874707818031f, -0.291654318571091f, 0.093651130795479f, -0.291342735290527f,
-  0.093427792191505f, -0.291031002998352f, 0.093204692006111f, -0.290719062089920f,
-  0.092981837689877f, -0.290406972169876f, 0.092759214341640f, -0.290094703435898f,
-  0.092536836862564f, -0.289782285690308f, 0.092314697802067f, -0.289469659328461f,
-  0.092092797160149f, -0.289156883955002f, 0.091871134936810f, -0.288843959569931f,
-  0.091649711132050f, -0.288530826568604f, 0.091428533196449f, -0.288217544555664f,
-  0.091207593679428f, -0.287904083728790f, 0.090986892580986f, -0.287590473890305f,
-  0.090766437351704f, -0.287276685237885f, 0.090546220541000f, -0.286962717771530f,
-  0.090326242148876f, -0.286648571491241f, 0.090106502175331f, -0.286334276199341f,
-  0.089887008070946f, -0.286019802093506f, 0.089667752385139f, -0.285705178976059f,
-  0.089448742568493f, -0.285390377044678f, 0.089229971170425f, -0.285075396299362f,
-  0.089011445641518f, -0.284760266542435f, 0.088793158531189f, -0.284444957971573f,
-  0.088575109839439f, -0.284129470586777f, 0.088357307016850f, -0.283813834190369f,
-  0.088139742612839f, -0.283498018980026f, 0.087922424077988f, -0.283182054758072f,
-  0.087705351412296f, -0.282865911722183f, 0.087488517165184f, -0.282549589872360f,
-  0.087271921336651f, -0.282233119010925f, 0.087055571377277f, -0.281916469335556f,
-  0.086839467287064f, -0.281599670648575f, 0.086623609066010f, -0.281282693147659f,
-  0.086407989263535f, -0.280965566635132f, 0.086192607879639f, -0.280648261308670f,
-  0.085977479815483f, -0.280330777168274f, 0.085762590169907f, -0.280013144016266f,
-  0.085547938942909f, -0.279695361852646f, 0.085333541035652f, -0.279377400875092f,
-  0.085119381546974f, -0.279059261083603f, 0.084905467927456f, -0.278740972280502f,
-  0.084691800177097f, -0.278422504663467f, 0.084478378295898f, -0.278103888034821f,
-  0.084265194833279f, -0.277785122394562f, 0.084052257239819f, -0.277466177940369f,
-  0.083839565515518f, -0.277147054672241f, 0.083627119660378f, -0.276827782392502f,
-  0.083414919674397f, -0.276508361101151f, 0.083202958106995f, -0.276188760995865f,
-  0.082991249859333f, -0.275868982076645f, 0.082779780030251f, -0.275549083948135f,
-  0.082568563520908f, -0.275228977203369f, 0.082357585430145f, -0.274908751249313f,
-  0.082146860659122f, -0.274588316679001f, 0.081936374306679f, -0.274267762899399f,
-  0.081726133823395f, -0.273947030305862f, 0.081516146659851f, -0.273626148700714f,
-  0.081306397914886f, -0.273305088281631f, 0.081096902489662f, -0.272983878850937f,
-  0.080887645483017f, -0.272662490606308f, 0.080678641796112f, -0.272340953350067f,
-  0.080469883978367f, -0.272019267082214f, 0.080261372029781f, -0.271697402000427f,
-  0.080053105950356f, -0.271375387907028f, 0.079845085740089f, -0.271053224802017f,
-  0.079637311398983f, -0.270730882883072f, 0.079429790377617f, -0.270408391952515f,
-  0.079222507774830f, -0.270085722208023f, 0.079015478491783f, -0.269762933254242f,
-  0.078808702528477f, -0.269439965486526f, 0.078602164983749f, -0.269116818904877f,
-  0.078395880758762f, -0.268793523311615f, 0.078189842402935f, -0.268470078706741f,
-  0.077984049916267f, -0.268146485090256f, 0.077778510749340f, -0.267822742462158f,
-  0.077573217451572f, -0.267498821020126f, 0.077368170022964f, -0.267174720764160f,
-  0.077163375914097f, -0.266850501298904f, 0.076958827674389f, -0.266526103019714f,
-  0.076754532754421f, -0.266201555728912f, 0.076550483703613f, -0.265876859426498f,
-  0.076346680521965f, -0.265552014112473f, 0.076143130660057f, -0.265226989984512f,
-  0.075939826667309f, -0.264901816844940f, 0.075736775994301f, -0.264576494693756f,
-  0.075533971190453f, -0.264250993728638f, 0.075331419706345f, -0.263925373554230f,
-  0.075129114091396f, -0.263599574565887f, 0.074927061796188f, -0.263273626565933f,
-  0.074725262820721f, -0.262947499752045f, 0.074523709714413f, -0.262621253728867f,
-  0.074322402477264f, -0.262294828891754f, 0.074121348559856f, -0.261968284845352f,
-  0.073920547962189f, -0.261641561985016f, 0.073720000684261f, -0.261314690113068f,
-  0.073519699275494f, -0.260987639427185f, 0.073319651186466f, -0.260660469532013f,
-  0.073119848966599f, -0.260333120822906f, 0.072920300066471f, -0.260005623102188f,
-  0.072721004486084f, -0.259678006172180f, 0.072521962225437f, -0.259350210428238f,
-  0.072323165833950f, -0.259022265672684f, 0.072124622762203f, -0.258694142103195f,
-  0.071926333010197f, -0.258365899324417f, 0.071728296577930f, -0.258037507534027f,
-  0.071530513465405f, -0.257708936929703f, 0.071332976222038f, -0.257380217313766f,
-  0.071135692298412f, -0.257051378488541f, 0.070938661694527f, -0.256722360849380f,
-  0.070741884410381f, -0.256393194198608f, 0.070545360445976f, -0.256063878536224f,
-  0.070349089801311f, -0.255734413862228f, 0.070153072476387f, -0.255404800176620f,
-  0.069957308471203f, -0.255075037479401f, 0.069761790335178f, -0.254745125770569f,
-  0.069566532969475f, -0.254415065050125f, 0.069371521472931f, -0.254084855318069f,
-  0.069176770746708f, -0.253754496574402f, 0.068982265889645f, -0.253423988819122f,
-  0.068788021802902f, -0.253093332052231f, 0.068594031035900f, -0.252762526273727f,
-  0.068400286138058f, -0.252431541681290f, 0.068206802010536f, -0.252100437879562f,
-  0.068013571202755f, -0.251769185066223f, 0.067820593714714f, -0.251437783241272f,
-  0.067627869546413f, -0.251106232404709f, 0.067435398697853f, -0.250774532556534f,
-  0.067243188619614f, -0.250442683696747f, 0.067051224410534f, -0.250110685825348f,
-  0.066859520971775f, -0.249778553843498f, 0.066668070852757f, -0.249446272850037f,
-  0.066476874053478f, -0.249113827943802f, 0.066285938024521f, -0.248781248927116f,
-  0.066095255315304f, -0.248448520898819f, 0.065904818475246f, -0.248115643858910f,
-  0.065714649856091f, -0.247782632708550f, 0.065524727106094f, -0.247449472546577f,
-  0.065335065126419f, -0.247116148471832f, 0.065145656466484f, -0.246782705187798f,
-  0.064956501126289f, -0.246449097990990f, 0.064767606556416f, -0.246115356683731f,
-  0.064578965306282f, -0.245781451463699f, 0.064390584826469f, -0.245447427034378f,
-  0.064202457666397f, -0.245113238692284f, 0.064014583826065f, -0.244778916239738f,
-  0.063826970756054f, -0.244444444775581f, 0.063639611005783f, -0.244109839200974f,
-  0.063452512025833f, -0.243775084614754f, 0.063265666365623f, -0.243440181016922f,
-  0.063079081475735f, -0.243105143308640f, 0.062892749905586f, -0.242769956588745f,
-  0.062706671655178f, -0.242434620857239f, 0.062520854175091f, -0.242099151015282f,
-  0.062335297465324f, -0.241763532161713f, 0.062149997800589f, -0.241427779197693f,
-  0.061964951455593f, -0.241091892123222f, 0.061780165880919f, -0.240755841135979f,
-  0.061595637351274f, -0.240419670939446f, 0.061411365866661f, -0.240083336830139f,
-  0.061227355152369f, -0.239746883511543f, 0.061043601483107f, -0.239410281181335f,
-  0.060860104858875f, -0.239073529839516f, 0.060676865279675f, -0.238736644387245f,
-  0.060493886470795f, -0.238399609923363f, 0.060311164706945f, -0.238062441349030f,
-  0.060128703713417f, -0.237725138664246f, 0.059946499764919f, -0.237387686967850f,
-  0.059764556586742f, -0.237050101161003f, 0.059582870453596f, -0.236712381243706f,
-  0.059401445090771f, -0.236374512314796f, 0.059220276772976f, -0.236036509275436f,
-  0.059039369225502f, -0.235698372125626f, 0.058858718723059f, -0.235360085964203f,
-  0.058678328990936f, -0.235021665692329f, 0.058498200029135f, -0.234683111310005f,
-  0.058318331837654f, -0.234344407916069f, 0.058138720691204f, -0.234005570411682f,
-  0.057959370315075f, -0.233666598796844f, 0.057780280709267f, -0.233327493071556f,
-  0.057601451873779f, -0.232988253235817f, 0.057422880083323f, -0.232648864388466f,
-  0.057244572788477f, -0.232309341430664f, 0.057066522538662f, -0.231969684362412f,
-  0.056888736784458f, -0.231629893183708f, 0.056711208075285f, -0.231289967894554f,
-  0.056533940136433f, -0.230949893593788f, 0.056356932967901f, -0.230609700083733f,
-  0.056180190294981f, -0.230269357562065f, 0.056003704667091f, -0.229928880929947f,
-  0.055827483534813f, -0.229588270187378f, 0.055651523172855f, -0.229247525334358f,
-  0.055475823581219f, -0.228906646370888f, 0.055300384759903f, -0.228565633296967f,
-  0.055125206708908f, -0.228224486112595f, 0.054950293153524f, -0.227883204817772f,
-  0.054775636643171f, -0.227541789412498f, 0.054601248353720f, -0.227200239896774f,
-  0.054427117109299f, -0.226858556270599f, 0.054253250360489f, -0.226516738533974f,
-  0.054079644382000f, -0.226174786686897f, 0.053906302899122f, -0.225832715630531f,
-  0.053733222186565f, -0.225490495562553f, 0.053560405969620f, -0.225148141384125f,
-  0.053387850522995f, -0.224805667996407f, 0.053215555846691f, -0.224463045597076f,
-  0.053043525665998f, -0.224120303988457f, 0.052871759980917f, -0.223777428269386f,
-  0.052700258791447f, -0.223434418439865f, 0.052529018372297f, -0.223091274499893f,
-  0.052358038723469f, -0.222748011350632f, 0.052187327295542f, -0.222404599189758f,
-  0.052016876637936f, -0.222061067819595f, 0.051846686750650f, -0.221717402338982f,
-  0.051676765084267f, -0.221373617649078f, 0.051507104188204f, -0.221029683947563f,
-  0.051337707787752f, -0.220685631036758f, 0.051168579608202f, -0.220341444015503f,
-  0.050999708473682f, -0.219997137784958f, 0.050831105560064f, -0.219652697443962f,
-  0.050662767142057f, -0.219308122992516f, 0.050494693219662f, -0.218963414430618f,
-  0.050326880067587f, -0.218618586659431f, 0.050159335136414f, -0.218273624777794f,
-  0.049992054700851f, -0.217928543686867f, 0.049825038760900f, -0.217583328485489f,
-  0.049658283591270f, -0.217237979173660f, 0.049491796642542f, -0.216892510652542f,
-  0.049325577914715f, -0.216546908020973f, 0.049159619957209f, -0.216201186180115f,
-  0.048993926495314f, -0.215855330228806f, 0.048828501254320f, -0.215509355068207f,
-  0.048663340508938f, -0.215163245797157f, 0.048498444259167f, -0.214817002415657f,
-  0.048333816230297f, -0.214470639824867f, 0.048169452697039f, -0.214124158024788f,
-  0.048005353659391f, -0.213777542114258f, 0.047841522842646f, -0.213430806994438f,
-  0.047677956521511f, -0.213083937764168f, 0.047514654695988f, -0.212736949324608f,
-  0.047351621091366f, -0.212389841675758f, 0.047188851982355f, -0.212042599916458f,
-  0.047026351094246f, -0.211695238947868f, 0.046864114701748f, -0.211347743868828f,
-  0.046702146530151f, -0.211000129580498f, 0.046540446579456f, -0.210652396082878f,
-  0.046379011124372f, -0.210304543375969f, 0.046217843890190f, -0.209956556558609f,
-  0.046056941151619f, -0.209608450531960f, 0.045896306633949f, -0.209260210394859f,
-  0.045735940337181f, -0.208911851048470f, 0.045575842261314f, -0.208563387393951f,
-  0.045416008681059f, -0.208214774727821f, 0.045256443321705f, -0.207866057753563f,
-  0.045097146183252f, -0.207517206668854f, 0.044938117265701f, -0.207168251276016f,
-  0.044779352843761f, -0.206819161772728f, 0.044620860368013f, -0.206469938158989f,
-  0.044462632387877f, -0.206120610237122f, 0.044304672628641f, -0.205771163105965f,
-  0.044146984815598f, -0.205421581864357f, 0.043989561498165f, -0.205071896314621f,
-  0.043832406401634f, -0.204722076654434f, 0.043675523251295f, -0.204372137784958f,
-  0.043518904596567f, -0.204022079706192f, 0.043362557888031f, -0.203671902418137f,
-  0.043206475675106f, -0.203321605920792f, 0.043050665408373f, -0.202971190214157f,
-  0.042895123362541f, -0.202620655298233f, 0.042739849537611f, -0.202270001173019f,
-  0.042584843933582f, -0.201919227838516f, 0.042430106550455f, -0.201568335294724f,
-  0.042275641113520f, -0.201217323541641f, 0.042121443897486f, -0.200866192579269f,
-  0.041967518627644f, -0.200514942407608f, 0.041813857853413f, -0.200163587927818f,
-  0.041660469025373f, -0.199812099337578f, 0.041507352143526f, -0.199460506439209f,
-  0.041354499757290f, -0.199108779430389f, 0.041201923042536f, -0.198756948113441f,
-  0.041049610823393f, -0.198404997587204f, 0.040897574275732f, -0.198052927851677f,
-  0.040745802223682f, -0.197700738906860f, 0.040594302117825f, -0.197348430752754f,
-  0.040443073958158f, -0.196996018290520f, 0.040292114019394f, -0.196643486618996f,
-  0.040141426026821f, -0.196290835738182f, 0.039991009980440f, -0.195938065648079f,
-  0.039840862154961f, -0.195585191249847f, 0.039690986275673f, -0.195232197642326f,
-  0.039541378617287f, -0.194879084825516f, 0.039392042905092f, -0.194525867700577f,
-  0.039242979139090f, -0.194172516465187f, 0.039094187319279f, -0.193819075822830f,
-  0.038945667445660f, -0.193465501070023f, 0.038797415792942f, -0.193111822009087f,
-  0.038649436086416f, -0.192758023738861f, 0.038501728326082f, -0.192404121160507f,
-  0.038354292511940f, -0.192050099372864f, 0.038207128643990f, -0.191695958375931f,
-  0.038060232996941f, -0.191341713070869f, 0.037913613021374f, -0.190987363457680f,
-  0.037767261266708f, -0.190632879734039f, 0.037621185183525f, -0.190278306603432f,
-  0.037475381046534f, -0.189923599362373f, 0.037329845130444f, -0.189568802714348f,
-  0.037184584885836f, -0.189213871955872f, 0.037039596587420f, -0.188858851790428f,
-  0.036894880235195f, -0.188503712415695f, 0.036750435829163f, -0.188148453831673f,
-  0.036606263369322f, -0.187793090939522f, 0.036462362855673f, -0.187437608838081f,
-  0.036318738013506f, -0.187082037329674f, 0.036175385117531f, -0.186726331710815f,
-  0.036032304167747f, -0.186370536684990f, 0.035889495164156f, -0.186014622449875f,
-  0.035746958106756f, -0.185658603906631f, 0.035604696720839f, -0.185302466154099f,
-  0.035462711006403f, -0.184946224093437f, 0.035320993512869f, -0.184589877724648f,
-  0.035179551690817f, -0.184233412146568f, 0.035038381814957f, -0.183876842260361f,
-  0.034897487610579f, -0.183520168066025f, 0.034756865352392f, -0.183163389563560f,
-  0.034616518765688f, -0.182806491851807f, 0.034476444125175f, -0.182449504733086f,
-  0.034336645156145f, -0.182092398405075f, 0.034197118133307f, -0.181735187768936f,
-  0.034057866781950f, -0.181377857923508f, 0.033918887376785f, -0.181020438671112f,
-  0.033780183643103f, -0.180662900209427f, 0.033641755580902f, -0.180305257439613f,
-  0.033503599464893f, -0.179947525262833f, 0.033365719020367f, -0.179589673876762f,
-  0.033228114247322f, -0.179231703281403f, 0.033090781420469f, -0.178873643279076f,
-  0.032953724265099f, -0.178515478968620f, 0.032816942781210f, -0.178157210350037f,
-  0.032680433243513f, -0.177798837423325f, 0.032544203102589f, -0.177440345287323f,
-  0.032408244907856f, -0.177081763744354f, 0.032272562384605f, -0.176723077893257f,
-  0.032137155532837f, -0.176364272832870f, 0.032002024352551f, -0.176005378365517f,
-  0.031867165118456f, -0.175646379590034f, 0.031732585281134f, -0.175287276506424f,
-  0.031598277390003f, -0.174928069114685f, 0.031464248895645f, -0.174568757414818f,
-  0.031330492347479f, -0.174209341406822f, 0.031197015196085f, -0.173849821090698f,
-  0.031063811853528f, -0.173490211367607f, 0.030930884182453f, -0.173130482435226f,
-  0.030798232182860f, -0.172770664095879f, 0.030665857717395f, -0.172410741448402f,
-  0.030533758923411f, -0.172050714492798f, 0.030401935800910f, -0.171690583229065f,
-  0.030270388349891f, -0.171330362558365f, 0.030139118432999f, -0.170970037579536f,
-  0.030008124187589f, -0.170609608292580f, 0.029877405613661f, -0.170249074697495f,
-  0.029746964573860f, -0.169888436794281f, 0.029616801068187f, -0.169527709484100f,
-  0.029486913233995f, -0.169166877865791f, 0.029357301071286f, -0.168805956840515f,
-  0.029227968305349f, -0.168444931507111f, 0.029098909348249f, -0.168083801865578f,
-  0.028970129787922f, -0.167722567915916f, 0.028841627761722f, -0.167361244559288f,
-  0.028713401407003f, -0.166999831795692f, 0.028585452586412f, -0.166638299822807f,
-  0.028457781299949f, -0.166276678442955f, 0.028330387547612f, -0.165914967656136f,
-  0.028203271329403f, -0.165553152561188f, 0.028076432645321f, -0.165191248059273f,
-  0.027949871495366f, -0.164829224348068f, 0.027823587879539f, -0.164467126131058f,
-  0.027697581797838f, -0.164104923605919f, 0.027571853250265f, -0.163742616772652f,
-  0.027446404099464f, -0.163380220532417f, 0.027321230620146f, -0.163017734885216f,
-  0.027196336537600f, -0.162655144929886f, 0.027071721851826f, -0.162292465567589f,
-  0.026947384700179f, -0.161929681897163f, 0.026823325082660f, -0.161566808819771f,
-  0.026699542999268f, -0.161203846335411f, 0.026576040312648f, -0.160840779542923f,
-  0.026452817022800f, -0.160477623343468f, 0.026329871267080f, -0.160114362835884f,
-  0.026207204908133f, -0.159751012921333f, 0.026084816083312f, -0.159387573599815f,
-  0.025962706655264f, -0.159024044871330f, 0.025840876623988f, -0.158660411834717f,
-  0.025719324126840f, -0.158296689391136f, 0.025598052889109f, -0.157932877540588f,
-  0.025477059185505f, -0.157568961381912f, 0.025356344878674f, -0.157204970717430f,
-  0.025235909968615f, -0.156840875744820f, 0.025115754455328f, -0.156476691365242f,
-  0.024995878338814f, -0.156112402677536f, 0.024876279756427f, -0.155748039484024f,
-  0.024756962433457f, -0.155383571982384f, 0.024637924507260f, -0.155019029974937f,
-  0.024519165977836f, -0.154654383659363f, 0.024400688707829f, -0.154289647936821f,
-  0.024282488971949f, -0.153924822807312f, 0.024164570495486f, -0.153559908270836f,
-  0.024046931415796f, -0.153194904327393f, 0.023929571732879f, -0.152829796075821f,
-  0.023812493309379f, -0.152464613318443f, 0.023695694282651f, -0.152099341154099f,
-  0.023579176515341f, -0.151733979582787f, 0.023462938144803f, -0.151368513703346f,
-  0.023346979171038f, -0.151002973318100f, 0.023231301456690f, -0.150637343525887f,
-  0.023115905001760f, -0.150271624326706f, 0.023000787943602f, -0.149905815720558f,
-  0.022885952144861f, -0.149539917707443f, 0.022771397605538f, -0.149173930287361f,
-  0.022657122462988f, -0.148807853460312f, 0.022543128579855f, -0.148441687226295f,
-  0.022429415956140f, -0.148075446486473f, 0.022315984591842f, -0.147709101438522f,
-  0.022202832624316f, -0.147342681884766f, 0.022089963778853f, -0.146976172924042f,
-  0.021977374330163f, -0.146609574556351f, 0.021865066140890f, -0.146242901682854f,
-  0.021753041073680f, -0.145876124501228f, 0.021641295403242f, -0.145509272813797f,
-  0.021529832854867f, -0.145142331719399f, 0.021418649703264f, -0.144775316119194f,
-  0.021307749673724f, -0.144408211112022f, 0.021197130903602f, -0.144041016697884f,
-  0.021086793392897f, -0.143673732876778f, 0.020976737141609f, -0.143306359648705f,
-  0.020866964012384f, -0.142938911914825f, 0.020757472142577f, -0.142571389675140f,
-  0.020648263394833f, -0.142203763127327f, 0.020539334043860f, -0.141836062073708f,
-  0.020430689677596f, -0.141468286514282f, 0.020322324708104f, -0.141100421547890f,
-  0.020214242860675f, -0.140732467174530f, 0.020106444135308f, -0.140364438295364f,
-  0.019998926669359f, -0.139996320009232f, 0.019891692325473f, -0.139628127217293f,
-  0.019784741103649f, -0.139259845018387f, 0.019678071141243f, -0.138891488313675f,
-  0.019571684300900f, -0.138523042201996f, 0.019465578719974f, -0.138154521584511f,
-  0.019359756261110f, -0.137785911560059f, 0.019254218786955f, -0.137417227029800f,
-  0.019148962572217f, -0.137048453092575f, 0.019043987616897f, -0.136679604649544f,
-  0.018939297646284f, -0.136310681700706f, 0.018834890797734f, -0.135941669344902f,
-  0.018730765208602f, -0.135572582483292f, 0.018626924604177f, -0.135203406214714f,
-  0.018523367121816f, -0.134834155440331f, 0.018420090898871f, -0.134464830160141f,
-  0.018317099660635f, -0.134095430374146f, 0.018214391544461f, -0.133725941181183f,
-  0.018111966550350f, -0.133356377482414f, 0.018009826540947f, -0.132986739277840f,
-  0.017907967790961f, -0.132617011666298f, 0.017806394025683f, -0.132247209548950f,
-  0.017705103382468f, -0.131877332925797f, 0.017604095861316f, -0.131507381796837f,
-  0.017503373324871f, -0.131137356162071f, 0.017402933910489f, -0.130767241120338f,
-  0.017302779480815f, -0.130397051572800f, 0.017202908173203f, -0.130026802420616f,
-  0.017103319987655f, -0.129656463861465f, 0.017004016786814f, -0.129286035895348f,
-  0.016904998570681f, -0.128915548324585f, 0.016806263476610f, -0.128544986248016f,
-  0.016707813367248f, -0.128174334764481f, 0.016609646379948f, -0.127803623676300f,
-  0.016511764377356f, -0.127432823181152f, 0.016414167359471f, -0.127061963081360f,
-  0.016316853463650f, -0.126691013574600f, 0.016219824552536f, -0.126320004463196f,
-  0.016123080626130f, -0.125948905944824f, 0.016026621684432f, -0.125577747821808f,
-  0.015930447727442f, -0.125206500291824f, 0.015834558755159f, -0.124835193157196f,
-  0.015738952904940f, -0.124463804066181f, 0.015643632039428f, -0.124092340469360f,
-  0.015548598021269f, -0.123720809817314f, 0.015453847125173f, -0.123349204659462f,
-  0.015359382145107f, -0.122977524995804f, 0.015265202149749f, -0.122605770826340f,
-  0.015171307139099f, -0.122233949601650f, 0.015077698044479f, -0.121862053871155f,
-  0.014984373003244f, -0.121490091085434f, 0.014891333878040f, -0.121118053793907f,
-  0.014798580668867f, -0.120745941996574f, 0.014706112444401f, -0.120373763144016f,
-  0.014613929204643f, -0.120001509785652f, 0.014522032812238f, -0.119629189372063f,
-  0.014430420473218f, -0.119256794452667f, 0.014339094981551f, -0.118884332478046f,
-  0.014248054474592f, -0.118511803448200f, 0.014157299883664f, -0.118139199912548f,
-  0.014066831208766f, -0.117766529321671f, 0.013976648449898f, -0.117393791675568f,
-  0.013886751607060f, -0.117020979523659f, 0.013797140680254f, -0.116648100316525f,
-  0.013707815669477f, -0.116275154054165f, 0.013618776574731f, -0.115902140736580f,
-  0.013530024327338f, -0.115529052913189f, 0.013441557064652f, -0.115155905485153f,
-  0.013353376649320f, -0.114782683551311f, 0.013265483081341f, -0.114409394562244f,
-  0.013177875429392f, -0.114036038517952f, 0.013090553693473f, -0.113662622869015f,
-  0.013003518804908f, -0.113289132714272f, 0.012916770763695f, -0.112915575504303f,
-  0.012830308638513f, -0.112541958689690f, 0.012744133360684f, -0.112168267369270f,
-  0.012658244930208f, -0.111794516444206f, 0.012572642415762f, -0.111420698463917f,
-  0.012487327679992f, -0.111046813428402f, 0.012402298860252f, -0.110672861337662f,
-  0.012317557819188f, -0.110298842191696f, 0.012233102694154f, -0.109924763441086f,
-  0.012148935347795f, -0.109550617635250f, 0.012065053917468f, -0.109176412224770f,
-  0.011981460265815f, -0.108802139759064f, 0.011898153461516f, -0.108427800238132f,
-  0.011815134435892f, -0.108053401112556f, 0.011732402257621f, -0.107678934931755f,
-  0.011649956926703f, -0.107304409146309f, 0.011567799374461f, -0.106929816305637f,
-  0.011485928669572f, -0.106555156409740f, 0.011404345743358f, -0.106180444359779f,
-  0.011323049664497f, -0.105805665254593f, 0.011242041364312f, -0.105430819094181f,
-  0.011161320842803f, -0.105055920779705f, 0.011080888099968f, -0.104680955410004f,
-  0.011000742204487f, -0.104305922985077f, 0.010920885019004f, -0.103930838406086f,
-  0.010841314680874f, -0.103555686771870f, 0.010762032121420f, -0.103180475533009f,
-  0.010683037340641f, -0.102805204689503f, 0.010604331269860f, -0.102429874241352f,
-  0.010525912046432f, -0.102054484188557f, 0.010447781533003f, -0.101679034531116f,
-  0.010369938798249f, -0.101303517818451f, 0.010292383842170f, -0.100927948951721f,
-  0.010215117596090f, -0.100552320480347f, 0.010138138197362f, -0.100176624953747f,
-  0.010061448439956f, -0.099800877273083f, 0.009985045529902f, -0.099425069987774f,
-  0.009908932261169f, -0.099049203097820f, 0.009833106771111f, -0.098673284053802f,
-  0.009757569059730f, -0.098297297954559f, 0.009682320058346f, -0.097921259701252f,
-  0.009607359766960f, -0.097545161843300f, 0.009532688185573f, -0.097169004380703f,
-  0.009458304382861f, -0.096792794764042f, 0.009384209290147f, -0.096416525542736f,
-  0.009310402907431f, -0.096040196716785f, 0.009236886166036f, -0.095663815736771f,
-  0.009163657203317f, -0.095287375152111f, 0.009090716950595f, -0.094910882413387f,
-  0.009018065407872f, -0.094534330070019f, 0.008945702575147f, -0.094157725572586f,
-  0.008873629383743f, -0.093781061470509f, 0.008801844902337f, -0.093404345214367f,
-  0.008730349130929f, -0.093027576804161f, 0.008659142069519f, -0.092650748789310f,
-  0.008588224649429f, -0.092273868620396f, 0.008517595939338f, -0.091896936297417f,
-  0.008447255939245f, -0.091519944369793f, 0.008377205580473f, -0.091142900288105f,
-  0.008307444863021f, -0.090765804052353f, 0.008237972855568f, -0.090388655662537f,
-  0.008168790489435f, -0.090011447668076f, 0.008099896833301f, -0.089634194970131f,
-  0.008031292818487f, -0.089256882667542f, 0.007962978444993f, -0.088879525661469f,
-  0.007894953712821f, -0.088502109050751f, 0.007827218621969f, -0.088124647736549f,
-  0.007759772241116f, -0.087747126817703f, 0.007692615967244f, -0.087369553744793f,
-  0.007625748869032f, -0.086991935968399f, 0.007559171877801f, -0.086614266037941f,
-  0.007492884527892f, -0.086236543953419f, 0.007426886819303f, -0.085858769714832f,
-  0.007361178752035f, -0.085480943322182f, 0.007295760791749f, -0.085103072226048f,
-  0.007230632472783f, -0.084725148975849f, 0.007165793795139f, -0.084347173571587f,
-  0.007101245224476f, -0.083969146013260f, 0.007036986760795f, -0.083591073751450f,
-  0.006973018404096f, -0.083212949335575f, 0.006909339688718f, -0.082834780216217f,
-  0.006845951545984f, -0.082456558942795f, 0.006782853044569f, -0.082078292965889f,
-  0.006720044650137f, -0.081699974834919f, 0.006657526828349f, -0.081321612000465f,
-  0.006595299113542f, -0.080943197011948f, 0.006533361505717f, -0.080564737319946f,
-  0.006471714470536f, -0.080186225473881f, 0.006410357542336f, -0.079807676374912f,
-  0.006349290721118f, -0.079429075121880f, 0.006288514938205f, -0.079050421714783f,
-  0.006228029262275f, -0.078671731054783f, 0.006167833693326f, -0.078292988240719f,
-  0.006107929162681f, -0.077914200723171f, 0.006048315204680f, -0.077535368502140f,
-  0.005988991353661f, -0.077156484127045f, 0.005929958540946f, -0.076777562499046f,
-  0.005871216300875f, -0.076398596167564f, 0.005812764633447f, -0.076019577682018f,
-  0.005754603538662f, -0.075640521943569f, 0.005696733482182f, -0.075261414051056f,
-  0.005639153998345f, -0.074882268905640f, 0.005581865552813f, -0.074503071606159f,
-  0.005524867679924f, -0.074123837053776f, 0.005468160845339f, -0.073744557797909f,
-  0.005411745049059f, -0.073365233838558f, 0.005355620291084f, -0.072985872626305f,
-  0.005299786105752f, -0.072606459259987f, 0.005244242958724f, -0.072227008640766f,
-  0.005188991315663f, -0.071847513318062f, 0.005134030245245f, -0.071467980742455f,
-  0.005079360678792f, -0.071088403463364f, 0.005024982150644f, -0.070708781480789f,
-  0.004970894660801f, -0.070329122245312f, 0.004917098674923f, -0.069949418306351f,
-  0.004863593727350f, -0.069569669663906f, 0.004810380283743f, -0.069189883768559f,
-  0.004757457878441f, -0.068810060620308f, 0.004704826977104f, -0.068430192768574f,
-  0.004652487114072f, -0.068050287663937f, 0.004600439220667f, -0.067670337855816f,
-  0.004548682365566f, -0.067290350794792f, 0.004497217014432f, -0.066910326480865f,
-  0.004446043167263f, -0.066530264914036f, 0.004395160824060f, -0.066150158643723f,
-  0.004344569984823f, -0.065770015120506f, 0.004294271115214f, -0.065389834344387f,
-  0.004244263283908f, -0.065009608864784f, 0.004194547422230f, -0.064629353582859f,
-  0.004145123064518f, -0.064249053597450f, 0.004095990676433f, -0.063868723809719f,
-  0.004047149792314f, -0.063488349318504f, 0.003998600877821f, -0.063107937574387f,
-  0.003950343467295f, -0.062727488577366f, 0.003902378026396f, -0.062347009778023f,
-  0.003854704322293f, -0.061966486275196f, 0.003807322587818f, -0.061585929244757f,
-  0.003760232590139f, -0.061205338686705f, 0.003713434794918f, -0.060824707150459f,
-  0.003666928736493f, -0.060444042086601f, 0.003620714880526f, -0.060063343495131f,
-  0.003574792761356f, -0.059682607650757f, 0.003529162844643f, -0.059301838278770f,
-  0.003483824897557f, -0.058921031653881f, 0.003438779152930f, -0.058540191501379f,
-  0.003394025377929f, -0.058159314095974f, 0.003349563805386f, -0.057778406888247f,
-  0.003305394435301f, -0.057397462427616f, 0.003261517267674f, -0.057016488164663f,
-  0.003217932302505f, -0.056635476648808f, 0.003174639539793f, -0.056254431605339f,
-  0.003131638979539f, -0.055873356759548f, 0.003088930854574f, -0.055492244660854f,
-  0.003046514932066f, -0.055111102759838f, 0.003004391444847f, -0.054729927331209f,
-  0.002962560392916f, -0.054348722100258f, 0.002921021543443f, -0.053967483341694f,
-  0.002879775362089f, -0.053586211055517f, 0.002838821383193f, -0.053204908967018f,
-  0.002798160072416f, -0.052823577076197f, 0.002757790964097f, -0.052442211657763f,
-  0.002717714523897f, -0.052060816437006f, 0.002677930751815f, -0.051679391413927f,
-  0.002638439415023f, -0.051297932863235f, 0.002599240746349f, -0.050916448235512f,
-  0.002560334512964f, -0.050534930080175f, 0.002521721180528f, -0.050153385847807f,
-  0.002483400283381f, -0.049771808087826f, 0.002445372054353f, -0.049390204250813f,
-  0.002407636726275f, -0.049008570611477f, 0.002370193833485f, -0.048626907169819f,
-  0.002333043841645f, -0.048245213925838f, 0.002296186750755f, -0.047863494604826f,
-  0.002259622327983f, -0.047481749206781f, 0.002223350573331f, -0.047099970281124f,
-  0.002187371719629f, -0.046718169003725f, 0.002151685766876f, -0.046336337924004f,
-  0.002116292715073f, -0.045954477041960f, 0.002081192564219f, -0.045572593808174f,
-  0.002046385314316f, -0.045190680772066f, 0.002011870965362f, -0.044808741658926f,
-  0.001977649517357f, -0.044426776468754f, 0.001943721086718f, -0.044044785201550f,
-  0.001910085673444f, -0.043662767857313f, 0.001876743277535f, -0.043280724436045f,
-  0.001843693898991f, -0.042898654937744f, 0.001810937537812f, -0.042516563087702f,
-  0.001778474310413f, -0.042134445160627f, 0.001746304216795f, -0.041752301156521f,
-  0.001714427140541f, -0.041370131075382f, 0.001682843198068f, -0.040987938642502f,
-  0.001651552389376f, -0.040605723857880f, 0.001620554830879f, -0.040223482996225f,
-  0.001589850406162f, -0.039841219782829f, 0.001559439115226f, -0.039458930492401f,
-  0.001529321074486f, -0.039076622575521f, 0.001499496400356f, -0.038694288581610f,
-  0.001469964860007f, -0.038311932235956f, 0.001440726569854f, -0.037929553538561f,
-  0.001411781646311f, -0.037547148764133f, 0.001383129972965f, -0.037164725363255f,
-  0.001354771666229f, -0.036782283335924f, 0.001326706726104f, -0.036399815231562f,
-  0.001298935036175f, -0.036017324775457f, 0.001271456829272f, -0.035634815692902f,
-  0.001244271872565f, -0.035252287983894f, 0.001217380515300f, -0.034869734197855f,
-  0.001190782408230f, -0.034487165510654f, 0.001164477784187f, -0.034104570746422f,
-  0.001138466643170f, -0.033721961081028f, 0.001112748985179f, -0.033339329063892f,
-  0.001087324810214f, -0.032956674695015f, 0.001062194118276f, -0.032574005424976f,
-  0.001037356909364f, -0.032191313803196f, 0.001012813183479f, -0.031808607280254f,
-  0.000988563057035f, -0.031425878405571f, 0.000964606530033f, -0.031043132767081f,
-  0.000940943544265f, -0.030660368502140f, 0.000917574157938f, -0.030277585610747f,
-  0.000894498312846f, -0.029894785955548f, 0.000871716125403f, -0.029511967673898f,
-  0.000849227537401f, -0.029129132628441f, 0.000827032607049f, -0.028746278956532f,
-  0.000805131276138f, -0.028363410383463f, 0.000783523661084f, -0.027980525046587f,
-  0.000762209703680f, -0.027597622945905f, 0.000741189462133f, -0.027214704081416f,
-  0.000720462878235f, -0.026831768453121f, 0.000700030010194f, -0.026448817923665f,
-  0.000679890916217f, -0.026065852493048f, 0.000660045538098f, -0.025682870298624f,
-  0.000640493875835f, -0.025299875065684f, 0.000621235987637f, -0.024916863068938f,
-  0.000602271873504f, -0.024533838033676f, 0.000583601591643f, -0.024150796234608f,
-  0.000565225025639f, -0.023767741397023f, 0.000547142291907f, -0.023384673520923f,
-  0.000529353390448f, -0.023001590743661f, 0.000511858321261f, -0.022618494927883f,
-  0.000494657084346f, -0.022235386073589f, 0.000477749679703f, -0.021852264180779f,
-  0.000461136136437f, -0.021469129249454f, 0.000444816454547f, -0.021085981279612f,
-  0.000428790634032f, -0.020702820271254f, 0.000413058703998f, -0.020319648087025f,
-  0.000397620693548f, -0.019936462864280f, 0.000382476573577f, -0.019553268328309f,
-  0.000367626344087f, -0.019170060753822f, 0.000353070063284f, -0.018786842003465f,
-  0.000338807702065f, -0.018403612077236f, 0.000324839289533f, -0.018020370975137f,
-  0.000311164796585f, -0.017637118697166f, 0.000297784281429f, -0.017253857105970f,
-  0.000284697714960f, -0.016870586201549f, 0.000271905126283f, -0.016487304121256f,
-  0.000259406515397f, -0.016104012727737f, 0.000247201882303f, -0.015720712020993f,
-  0.000235291256104f, -0.015337402001023f, 0.000223674607696f, -0.014954082667828f,
-  0.000212351980736f, -0.014570754021406f, 0.000201323360670f, -0.014187417924404f,
-  0.000190588747500f, -0.013804072514176f, 0.000180148170330f, -0.013420719653368f,
-  0.000170001629158f, -0.013037359341979f, 0.000160149123985f, -0.012653990648687f,
-  0.000150590654812f, -0.012270614504814f, 0.000141326236189f, -0.011887230910361f,
-  0.000132355868118f, -0.011503840796649f, 0.000123679565149f, -0.011120444163680f,
-  0.000115297327284f, -0.010737040080130f, 0.000107209154521f, -0.010353630408645f,
-  0.000099415054137f, -0.009970214217901f, 0.000091915040684f, -0.009586792439222f,
-  0.000084709099610f, -0.009203365072608f, 0.000077797252743f, -0.008819932118058f,
-  0.000071179500083f, -0.008436493575573f, 0.000064855834353f, -0.008053051307797f,
-  0.000058826273744f, -0.007669602986425f, 0.000053090810979f, -0.007286150939763f,
-  0.000047649456974f, -0.006902694236487f, 0.000042502211727f, -0.006519233807921f,
-  0.000037649078877f, -0.006135769188404f, 0.000033090062061f, -0.005752300843596f,
-  0.000028825161280f, -0.005368829704821f, 0.000024854381991f, -0.004985354840755f,
-  0.000021177724193f, -0.004601877182722f, 0.000017795191525f, -0.004218397196382f,
-  0.000014706784896f, -0.003834914416075f, 0.000011912506125f, -0.003451429307461f,
-  0.000009412358850f, -0.003067942336202f, 0.000007206342616f, -0.002684453502297f,
-  0.000005294459243f, -0.002300963038579f, 0.000003676709639f, -0.001917471294291f,
-  0.000002353095169f, -0.001533978385851f, 0.000001323616516f, -0.001150484546088f,
-  0.000000588274133f, -0.000766990066040f, 0.000000147068562f, -0.000383495149435f,
-  0.000000000000000f, -0.000000000000023f, 0.000000147068562f, 0.000383495149435f,
-  0.000000588274133f, 0.000766990066040f, 0.000001323616516f, 0.001150484546088f,
-  0.000002353095169f, 0.001533978385851f, 0.000003676709639f, 0.001917471294291f,
-  0.000005294459243f, 0.002300963038579f, 0.000007206342616f, 0.002684453502297f,
-  0.000009412358850f, 0.003067942336202f, 0.000011912506125f, 0.003451429307461f,
-  0.000014706784896f, 0.003834914416075f, 0.000017795191525f, 0.004218397196382f,
-  0.000021177724193f, 0.004601877182722f, 0.000024854381991f, 0.004985354840755f,
-  0.000028825161280f, 0.005368829704821f, 0.000033090062061f, 0.005752300843596f,
-  0.000037649078877f, 0.006135769188404f, 0.000042502211727f, 0.006519233807921f,
-  0.000047649456974f, 0.006902694236487f, 0.000053090810979f, 0.007286150939763f,
-  0.000058826273744f, 0.007669602986425f, 0.000064855834353f, 0.008053051307797f,
-  0.000071179500083f, 0.008436493575573f, 0.000077797252743f, 0.008819932118058f,
-  0.000084709099610f, 0.009203365072608f, 0.000091915040684f, 0.009586792439222f,
-  0.000099415054137f, 0.009970214217901f, 0.000107209154521f, 0.010353630408645f,
-  0.000115297327284f, 0.010737040080130f, 0.000123679565149f, 0.011120444163680f,
-  0.000132355868118f, 0.011503840796649f, 0.000141326236189f, 0.011887230910361f,
-  0.000150590654812f, 0.012270614504814f, 0.000160149123985f, 0.012653990648687f,
-  0.000170001629158f, 0.013037359341979f, 0.000180148170330f, 0.013420719653368f,
-  0.000190588747500f, 0.013804072514176f, 0.000201323360670f, 0.014187417924404f,
-  0.000212351980736f, 0.014570754021406f, 0.000223674607696f, 0.014954082667828f,
-  0.000235291256104f, 0.015337402001023f, 0.000247201882303f, 0.015720712020993f,
-  0.000259406515397f, 0.016104012727737f, 0.000271905126283f, 0.016487304121256f,
-  0.000284697714960f, 0.016870586201549f, 0.000297784281429f, 0.017253857105970f,
-  0.000311164796585f, 0.017637118697166f, 0.000324839289533f, 0.018020370975137f,
-  0.000338807702065f, 0.018403612077236f, 0.000353070063284f, 0.018786842003465f,
-  0.000367626344087f, 0.019170060753822f, 0.000382476573577f, 0.019553268328309f,
-  0.000397620693548f, 0.019936462864280f, 0.000413058703998f, 0.020319648087025f,
-  0.000428790634032f, 0.020702820271254f, 0.000444816454547f, 0.021085981279612f,
-  0.000461136136437f, 0.021469129249454f, 0.000477749679703f, 0.021852264180779f,
-  0.000494657084346f, 0.022235386073589f, 0.000511858321261f, 0.022618494927883f,
-  0.000529353390448f, 0.023001590743661f, 0.000547142291907f, 0.023384673520923f,
-  0.000565225025639f, 0.023767741397023f, 0.000583601591643f, 0.024150796234608f,
-  0.000602271873504f, 0.024533838033676f, 0.000621235987637f, 0.024916863068938f,
-  0.000640493875835f, 0.025299875065684f, 0.000660045538098f, 0.025682870298624f,
-  0.000679890916217f, 0.026065852493048f, 0.000700030010194f, 0.026448817923665f,
-  0.000720462878235f, 0.026831768453121f, 0.000741189462133f, 0.027214704081416f,
-  0.000762209703680f, 0.027597622945905f, 0.000783523661084f, 0.027980525046587f,
-  0.000805131276138f, 0.028363410383463f, 0.000827032607049f, 0.028746278956532f,
-  0.000849227537401f, 0.029129132628441f, 0.000871716125403f, 0.029511967673898f,
-  0.000894498312846f, 0.029894785955548f, 0.000917574157938f, 0.030277585610747f,
-  0.000940943544265f, 0.030660368502140f, 0.000964606530033f, 0.031043132767081f,
-  0.000988563057035f, 0.031425878405571f, 0.001012813183479f, 0.031808607280254f,
-  0.001037356909364f, 0.032191313803196f, 0.001062194118276f, 0.032574005424976f,
-  0.001087324810214f, 0.032956674695015f, 0.001112748985179f, 0.033339329063892f,
-  0.001138466643170f, 0.033721961081028f, 0.001164477784187f, 0.034104570746422f,
-  0.001190782408230f, 0.034487165510654f, 0.001217380515300f, 0.034869734197855f,
-  0.001244271872565f, 0.035252287983894f, 0.001271456829272f, 0.035634815692902f,
-  0.001298935036175f, 0.036017324775457f, 0.001326706726104f, 0.036399815231562f,
-  0.001354771666229f, 0.036782283335924f, 0.001383129972965f, 0.037164725363255f,
-  0.001411781646311f, 0.037547148764133f, 0.001440726569854f, 0.037929553538561f,
-  0.001469964860007f, 0.038311932235956f, 0.001499496400356f, 0.038694288581610f,
-  0.001529321074486f, 0.039076622575521f, 0.001559439115226f, 0.039458930492401f,
-  0.001589850406162f, 0.039841219782829f, 0.001620554830879f, 0.040223482996225f,
-  0.001651552389376f, 0.040605723857880f, 0.001682843198068f, 0.040987938642502f,
-  0.001714427140541f, 0.041370131075382f, 0.001746304216795f, 0.041752301156521f,
-  0.001778474310413f, 0.042134445160627f, 0.001810937537812f, 0.042516563087702f,
-  0.001843693898991f, 0.042898654937744f, 0.001876743277535f, 0.043280724436045f,
-  0.001910085673444f, 0.043662767857313f, 0.001943721086718f, 0.044044785201550f,
-  0.001977649517357f, 0.044426776468754f, 0.002011870965362f, 0.044808741658926f,
-  0.002046385314316f, 0.045190680772066f, 0.002081192564219f, 0.045572593808174f,
-  0.002116292715073f, 0.045954477041960f, 0.002151685766876f, 0.046336337924004f,
-  0.002187371719629f, 0.046718169003725f, 0.002223350573331f, 0.047099970281124f,
-  0.002259622327983f, 0.047481749206781f, 0.002296186750755f, 0.047863494604826f,
-  0.002333043841645f, 0.048245213925838f, 0.002370193833485f, 0.048626907169819f,
-  0.002407636726275f, 0.049008570611477f, 0.002445372054353f, 0.049390204250813f,
-  0.002483400283381f, 0.049771808087826f, 0.002521721180528f, 0.050153385847807f,
-  0.002560334512964f, 0.050534930080175f, 0.002599240746349f, 0.050916448235512f,
-  0.002638439415023f, 0.051297932863235f, 0.002677930751815f, 0.051679391413927f,
-  0.002717714523897f, 0.052060816437006f, 0.002757790964097f, 0.052442211657763f,
-  0.002798160072416f, 0.052823577076197f, 0.002838821383193f, 0.053204908967018f,
-  0.002879775362089f, 0.053586211055517f, 0.002921021543443f, 0.053967483341694f,
-  0.002962560392916f, 0.054348722100258f, 0.003004391444847f, 0.054729927331209f,
-  0.003046514932066f, 0.055111102759838f, 0.003088930854574f, 0.055492244660854f,
-  0.003131638979539f, 0.055873356759548f, 0.003174639539793f, 0.056254431605339f,
-  0.003217932302505f, 0.056635476648808f, 0.003261517267674f, 0.057016488164663f,
-  0.003305394435301f, 0.057397462427616f, 0.003349563805386f, 0.057778406888247f,
-  0.003394025377929f, 0.058159314095974f, 0.003438779152930f, 0.058540191501379f,
-  0.003483824897557f, 0.058921031653881f, 0.003529162844643f, 0.059301838278770f,
-  0.003574792761356f, 0.059682607650757f, 0.003620714880526f, 0.060063343495131f,
-  0.003666928736493f, 0.060444042086601f, 0.003713434794918f, 0.060824707150459f,
-  0.003760232590139f, 0.061205338686705f, 0.003807322587818f, 0.061585929244757f,
-  0.003854704322293f, 0.061966486275196f, 0.003902378026396f, 0.062347009778023f,
-  0.003950343467295f, 0.062727488577366f, 0.003998600877821f, 0.063107937574387f,
-  0.004047149792314f, 0.063488349318504f, 0.004095990676433f, 0.063868723809719f,
-  0.004145123064518f, 0.064249053597450f, 0.004194547422230f, 0.064629353582859f,
-  0.004244263283908f, 0.065009608864784f, 0.004294271115214f, 0.065389834344387f,
-  0.004344569984823f, 0.065770015120506f, 0.004395160824060f, 0.066150158643723f,
-  0.004446043167263f, 0.066530264914036f, 0.004497217014432f, 0.066910326480865f,
-  0.004548682365566f, 0.067290350794792f, 0.004600439220667f, 0.067670337855816f,
-  0.004652487114072f, 0.068050287663937f, 0.004704826977104f, 0.068430192768574f,
-  0.004757457878441f, 0.068810060620308f, 0.004810380283743f, 0.069189883768559f,
-  0.004863593727350f, 0.069569669663906f, 0.004917098674923f, 0.069949418306351f,
-  0.004970894660801f, 0.070329122245312f, 0.005024982150644f, 0.070708781480789f,
-  0.005079360678792f, 0.071088403463364f, 0.005134030245245f, 0.071467980742455f,
-  0.005188991315663f, 0.071847513318062f, 0.005244242958724f, 0.072227008640766f,
-  0.005299786105752f, 0.072606459259987f, 0.005355620291084f, 0.072985872626305f,
-  0.005411745049059f, 0.073365233838558f, 0.005468160845339f, 0.073744557797909f,
-  0.005524867679924f, 0.074123837053776f, 0.005581865552813f, 0.074503071606159f,
-  0.005639153998345f, 0.074882268905640f, 0.005696733482182f, 0.075261414051056f,
-  0.005754603538662f, 0.075640521943569f, 0.005812764633447f, 0.076019577682018f,
-  0.005871216300875f, 0.076398596167564f, 0.005929958540946f, 0.076777562499046f,
-  0.005988991353661f, 0.077156484127045f, 0.006048315204680f, 0.077535368502140f,
-  0.006107929162681f, 0.077914200723171f, 0.006167833693326f, 0.078292988240719f,
-  0.006228029262275f, 0.078671731054783f, 0.006288514938205f, 0.079050421714783f,
-  0.006349290721118f, 0.079429075121880f, 0.006410357542336f, 0.079807676374912f,
-  0.006471714470536f, 0.080186225473881f, 0.006533361505717f, 0.080564737319946f,
-  0.006595299113542f, 0.080943197011948f, 0.006657526828349f, 0.081321612000465f,
-  0.006720044650137f, 0.081699974834919f, 0.006782853044569f, 0.082078292965889f,
-  0.006845951545984f, 0.082456558942795f, 0.006909339688718f, 0.082834780216217f,
-  0.006973018404096f, 0.083212949335575f, 0.007036986760795f, 0.083591073751450f,
-  0.007101245224476f, 0.083969146013260f, 0.007165793795139f, 0.084347173571587f,
-  0.007230632472783f, 0.084725148975849f, 0.007295760791749f, 0.085103072226048f,
-  0.007361178752035f, 0.085480943322182f, 0.007426886819303f, 0.085858769714832f,
-  0.007492884527892f, 0.086236543953419f, 0.007559171877801f, 0.086614266037941f,
-  0.007625748869032f, 0.086991935968399f, 0.007692615967244f, 0.087369553744793f,
-  0.007759772241116f, 0.087747126817703f, 0.007827218621969f, 0.088124647736549f,
-  0.007894953712821f, 0.088502109050751f, 0.007962978444993f, 0.088879525661469f,
-  0.008031292818487f, 0.089256882667542f, 0.008099896833301f, 0.089634194970131f,
-  0.008168790489435f, 0.090011447668076f, 0.008237972855568f, 0.090388655662537f,
-  0.008307444863021f, 0.090765804052353f, 0.008377205580473f, 0.091142900288105f,
-  0.008447255939245f, 0.091519944369793f, 0.008517595939338f, 0.091896936297417f,
-  0.008588224649429f, 0.092273868620396f, 0.008659142069519f, 0.092650748789310f,
-  0.008730349130929f, 0.093027576804161f, 0.008801844902337f, 0.093404345214367f,
-  0.008873629383743f, 0.093781061470509f, 0.008945702575147f, 0.094157725572586f,
-  0.009018065407872f, 0.094534330070019f, 0.009090716950595f, 0.094910882413387f,
-  0.009163657203317f, 0.095287375152111f, 0.009236886166036f, 0.095663815736771f,
-  0.009310402907431f, 0.096040196716785f, 0.009384209290147f, 0.096416525542736f,
-  0.009458304382861f, 0.096792794764042f, 0.009532688185573f, 0.097169004380703f,
-  0.009607359766960f, 0.097545161843300f, 0.009682320058346f, 0.097921259701252f,
-  0.009757569059730f, 0.098297297954559f, 0.009833106771111f, 0.098673284053802f,
-  0.009908932261169f, 0.099049203097820f, 0.009985045529902f, 0.099425069987774f,
-  0.010061448439956f, 0.099800877273083f, 0.010138138197362f, 0.100176624953747f,
-  0.010215117596090f, 0.100552320480347f, 0.010292383842170f, 0.100927948951721f,
-  0.010369938798249f, 0.101303517818451f, 0.010447781533003f, 0.101679034531116f,
-  0.010525912046432f, 0.102054484188557f, 0.010604331269860f, 0.102429874241352f,
-  0.010683037340641f, 0.102805204689503f, 0.010762032121420f, 0.103180475533009f,
-  0.010841314680874f, 0.103555686771870f, 0.010920885019004f, 0.103930838406086f,
-  0.011000742204487f, 0.104305922985077f, 0.011080888099968f, 0.104680955410004f,
-  0.011161320842803f, 0.105055920779705f, 0.011242041364312f, 0.105430819094181f,
-  0.011323049664497f, 0.105805665254593f, 0.011404345743358f, 0.106180444359779f,
-  0.011485928669572f, 0.106555156409740f, 0.011567799374461f, 0.106929816305637f,
-  0.011649956926703f, 0.107304409146309f, 0.011732402257621f, 0.107678934931755f,
-  0.011815134435892f, 0.108053401112556f, 0.011898153461516f, 0.108427800238132f,
-  0.011981460265815f, 0.108802139759064f, 0.012065053917468f, 0.109176412224770f,
-  0.012148935347795f, 0.109550617635250f, 0.012233102694154f, 0.109924763441086f,
-  0.012317557819188f, 0.110298842191696f, 0.012402298860252f, 0.110672861337662f,
-  0.012487327679992f, 0.111046813428402f, 0.012572642415762f, 0.111420698463917f,
-  0.012658244930208f, 0.111794516444206f, 0.012744133360684f, 0.112168267369270f,
-  0.012830308638513f, 0.112541958689690f, 0.012916770763695f, 0.112915575504303f,
-  0.013003518804908f, 0.113289132714272f, 0.013090553693473f, 0.113662622869015f,
-  0.013177875429392f, 0.114036038517952f, 0.013265483081341f, 0.114409394562244f,
-  0.013353376649320f, 0.114782683551311f, 0.013441557064652f, 0.115155905485153f,
-  0.013530024327338f, 0.115529052913189f, 0.013618776574731f, 0.115902140736580f,
-  0.013707815669477f, 0.116275154054165f, 0.013797140680254f, 0.116648100316525f,
-  0.013886751607060f, 0.117020979523659f, 0.013976648449898f, 0.117393791675568f,
-  0.014066831208766f, 0.117766529321671f, 0.014157299883664f, 0.118139199912548f,
-  0.014248054474592f, 0.118511803448200f, 0.014339094981551f, 0.118884332478046f,
-  0.014430420473218f, 0.119256794452667f, 0.014522032812238f, 0.119629189372063f,
-  0.014613929204643f, 0.120001509785652f, 0.014706112444401f, 0.120373763144016f,
-  0.014798580668867f, 0.120745941996574f, 0.014891333878040f, 0.121118053793907f,
-  0.014984373003244f, 0.121490091085434f, 0.015077698044479f, 0.121862053871155f,
-  0.015171307139099f, 0.122233949601650f, 0.015265202149749f, 0.122605770826340f,
-  0.015359382145107f, 0.122977524995804f, 0.015453847125173f, 0.123349204659462f,
-  0.015548598021269f, 0.123720809817314f, 0.015643632039428f, 0.124092340469360f,
-  0.015738952904940f, 0.124463804066181f, 0.015834558755159f, 0.124835193157196f,
-  0.015930447727442f, 0.125206500291824f, 0.016026621684432f, 0.125577747821808f,
-  0.016123080626130f, 0.125948905944824f, 0.016219824552536f, 0.126320004463196f,
-  0.016316853463650f, 0.126691013574600f, 0.016414167359471f, 0.127061963081360f,
-  0.016511764377356f, 0.127432823181152f, 0.016609646379948f, 0.127803623676300f,
-  0.016707813367248f, 0.128174334764481f, 0.016806263476610f, 0.128544986248016f,
-  0.016904998570681f, 0.128915548324585f, 0.017004016786814f, 0.129286035895348f,
-  0.017103319987655f, 0.129656463861465f, 0.017202908173203f, 0.130026802420616f,
-  0.017302779480815f, 0.130397051572800f, 0.017402933910489f, 0.130767241120338f,
-  0.017503373324871f, 0.131137356162071f, 0.017604095861316f, 0.131507381796837f,
-  0.017705103382468f, 0.131877332925797f, 0.017806394025683f, 0.132247209548950f,
-  0.017907967790961f, 0.132617011666298f, 0.018009826540947f, 0.132986739277840f,
-  0.018111966550350f, 0.133356377482414f, 0.018214391544461f, 0.133725941181183f,
-  0.018317099660635f, 0.134095430374146f, 0.018420090898871f, 0.134464830160141f,
-  0.018523367121816f, 0.134834155440331f, 0.018626924604177f, 0.135203406214714f,
-  0.018730765208602f, 0.135572582483292f, 0.018834890797734f, 0.135941669344902f,
-  0.018939297646284f, 0.136310681700706f, 0.019043987616897f, 0.136679604649544f,
-  0.019148962572217f, 0.137048453092575f, 0.019254218786955f, 0.137417227029800f,
-  0.019359756261110f, 0.137785911560059f, 0.019465578719974f, 0.138154521584511f,
-  0.019571684300900f, 0.138523042201996f, 0.019678071141243f, 0.138891488313675f,
-  0.019784741103649f, 0.139259845018387f, 0.019891692325473f, 0.139628127217293f,
-  0.019998926669359f, 0.139996320009232f, 0.020106444135308f, 0.140364438295364f,
-  0.020214242860675f, 0.140732467174530f, 0.020322324708104f, 0.141100421547890f,
-  0.020430689677596f, 0.141468286514282f, 0.020539334043860f, 0.141836062073708f,
-  0.020648263394833f, 0.142203763127327f, 0.020757472142577f, 0.142571389675140f,
-  0.020866964012384f, 0.142938911914825f, 0.020976737141609f, 0.143306359648705f,
-  0.021086793392897f, 0.143673732876778f, 0.021197130903602f, 0.144041016697884f,
-  0.021307749673724f, 0.144408211112022f, 0.021418649703264f, 0.144775316119194f,
-  0.021529832854867f, 0.145142331719399f, 0.021641295403242f, 0.145509272813797f,
-  0.021753041073680f, 0.145876124501228f, 0.021865066140890f, 0.146242901682854f,
-  0.021977374330163f, 0.146609574556351f, 0.022089963778853f, 0.146976172924042f,
-  0.022202832624316f, 0.147342681884766f, 0.022315984591842f, 0.147709101438522f,
-  0.022429415956140f, 0.148075446486473f, 0.022543128579855f, 0.148441687226295f,
-  0.022657122462988f, 0.148807853460312f, 0.022771397605538f, 0.149173930287361f,
-  0.022885952144861f, 0.149539917707443f, 0.023000787943602f, 0.149905815720558f,
-  0.023115905001760f, 0.150271624326706f, 0.023231301456690f, 0.150637343525887f,
-  0.023346979171038f, 0.151002973318100f, 0.023462938144803f, 0.151368513703346f,
-  0.023579176515341f, 0.151733979582787f, 0.023695694282651f, 0.152099341154099f,
-  0.023812493309379f, 0.152464613318443f, 0.023929571732879f, 0.152829796075821f,
-  0.024046931415796f, 0.153194904327393f, 0.024164570495486f, 0.153559908270836f,
-  0.024282488971949f, 0.153924822807312f, 0.024400688707829f, 0.154289647936821f,
-  0.024519165977836f, 0.154654383659363f, 0.024637924507260f, 0.155019029974937f,
-  0.024756962433457f, 0.155383571982384f, 0.024876279756427f, 0.155748039484024f,
-  0.024995878338814f, 0.156112402677536f, 0.025115754455328f, 0.156476691365242f,
-  0.025235909968615f, 0.156840875744820f, 0.025356344878674f, 0.157204970717430f,
-  0.025477059185505f, 0.157568961381912f, 0.025598052889109f, 0.157932877540588f,
-  0.025719324126840f, 0.158296689391136f, 0.025840876623988f, 0.158660411834717f,
-  0.025962706655264f, 0.159024044871330f, 0.026084816083312f, 0.159387573599815f,
-  0.026207204908133f, 0.159751012921333f, 0.026329871267080f, 0.160114362835884f,
-  0.026452817022800f, 0.160477623343468f, 0.026576040312648f, 0.160840779542923f,
-  0.026699542999268f, 0.161203846335411f, 0.026823325082660f, 0.161566808819771f,
-  0.026947384700179f, 0.161929681897163f, 0.027071721851826f, 0.162292465567589f,
-  0.027196336537600f, 0.162655144929886f, 0.027321230620146f, 0.163017734885216f,
-  0.027446404099464f, 0.163380220532417f, 0.027571853250265f, 0.163742616772652f,
-  0.027697581797838f, 0.164104923605919f, 0.027823587879539f, 0.164467126131058f,
-  0.027949871495366f, 0.164829224348068f, 0.028076432645321f, 0.165191248059273f,
-  0.028203271329403f, 0.165553152561188f, 0.028330387547612f, 0.165914967656136f,
-  0.028457781299949f, 0.166276678442955f, 0.028585452586412f, 0.166638299822807f,
-  0.028713401407003f, 0.166999831795692f, 0.028841627761722f, 0.167361244559288f,
-  0.028970129787922f, 0.167722567915916f, 0.029098909348249f, 0.168083801865578f,
-  0.029227968305349f, 0.168444931507111f, 0.029357301071286f, 0.168805956840515f,
-  0.029486913233995f, 0.169166877865791f, 0.029616801068187f, 0.169527709484100f,
-  0.029746964573860f, 0.169888436794281f, 0.029877405613661f, 0.170249074697495f,
-  0.030008124187589f, 0.170609608292580f, 0.030139118432999f, 0.170970037579536f,
-  0.030270388349891f, 0.171330362558365f, 0.030401935800910f, 0.171690583229065f,
-  0.030533758923411f, 0.172050714492798f, 0.030665857717395f, 0.172410741448402f,
-  0.030798232182860f, 0.172770664095879f, 0.030930884182453f, 0.173130482435226f,
-  0.031063811853528f, 0.173490211367607f, 0.031197015196085f, 0.173849821090698f,
-  0.031330492347479f, 0.174209341406822f, 0.031464248895645f, 0.174568757414818f,
-  0.031598277390003f, 0.174928069114685f, 0.031732585281134f, 0.175287276506424f,
-  0.031867165118456f, 0.175646379590034f, 0.032002024352551f, 0.176005378365517f,
-  0.032137155532837f, 0.176364272832870f, 0.032272562384605f, 0.176723077893257f,
-  0.032408244907856f, 0.177081763744354f, 0.032544203102589f, 0.177440345287323f,
-  0.032680433243513f, 0.177798837423325f, 0.032816942781210f, 0.178157210350037f,
-  0.032953724265099f, 0.178515478968620f, 0.033090781420469f, 0.178873643279076f,
-  0.033228114247322f, 0.179231703281403f, 0.033365719020367f, 0.179589673876762f,
-  0.033503599464893f, 0.179947525262833f, 0.033641755580902f, 0.180305257439613f,
-  0.033780183643103f, 0.180662900209427f, 0.033918887376785f, 0.181020438671112f,
-  0.034057866781950f, 0.181377857923508f, 0.034197118133307f, 0.181735187768936f,
-  0.034336645156145f, 0.182092398405075f, 0.034476444125175f, 0.182449504733086f,
-  0.034616518765688f, 0.182806491851807f, 0.034756865352392f, 0.183163389563560f,
-  0.034897487610579f, 0.183520168066025f, 0.035038381814957f, 0.183876842260361f,
-  0.035179551690817f, 0.184233412146568f, 0.035320993512869f, 0.184589877724648f,
-  0.035462711006403f, 0.184946224093437f, 0.035604696720839f, 0.185302466154099f,
-  0.035746958106756f, 0.185658603906631f, 0.035889495164156f, 0.186014622449875f,
-  0.036032304167747f, 0.186370536684990f, 0.036175385117531f, 0.186726331710815f,
-  0.036318738013506f, 0.187082037329674f, 0.036462362855673f, 0.187437608838081f,
-  0.036606263369322f, 0.187793090939522f, 0.036750435829163f, 0.188148453831673f,
-  0.036894880235195f, 0.188503712415695f, 0.037039596587420f, 0.188858851790428f,
-  0.037184584885836f, 0.189213871955872f, 0.037329845130444f, 0.189568802714348f,
-  0.037475381046534f, 0.189923599362373f, 0.037621185183525f, 0.190278306603432f,
-  0.037767261266708f, 0.190632879734039f, 0.037913613021374f, 0.190987363457680f,
-  0.038060232996941f, 0.191341713070869f, 0.038207128643990f, 0.191695958375931f,
-  0.038354292511940f, 0.192050099372864f, 0.038501728326082f, 0.192404121160507f,
-  0.038649436086416f, 0.192758023738861f, 0.038797415792942f, 0.193111822009087f,
-  0.038945667445660f, 0.193465501070023f, 0.039094187319279f, 0.193819075822830f,
-  0.039242979139090f, 0.194172516465187f, 0.039392042905092f, 0.194525867700577f,
-  0.039541378617287f, 0.194879084825516f, 0.039690986275673f, 0.195232197642326f,
-  0.039840862154961f, 0.195585191249847f, 0.039991009980440f, 0.195938065648079f,
-  0.040141426026821f, 0.196290835738182f, 0.040292114019394f, 0.196643486618996f,
-  0.040443073958158f, 0.196996018290520f, 0.040594302117825f, 0.197348430752754f,
-  0.040745802223682f, 0.197700738906860f, 0.040897574275732f, 0.198052927851677f,
-  0.041049610823393f, 0.198404997587204f, 0.041201923042536f, 0.198756948113441f,
-  0.041354499757290f, 0.199108779430389f, 0.041507352143526f, 0.199460506439209f,
-  0.041660469025373f, 0.199812099337578f, 0.041813857853413f, 0.200163587927818f,
-  0.041967518627644f, 0.200514942407608f, 0.042121443897486f, 0.200866192579269f,
-  0.042275641113520f, 0.201217323541641f, 0.042430106550455f, 0.201568335294724f,
-  0.042584843933582f, 0.201919227838516f, 0.042739849537611f, 0.202270001173019f,
-  0.042895123362541f, 0.202620655298233f, 0.043050665408373f, 0.202971190214157f,
-  0.043206475675106f, 0.203321605920792f, 0.043362557888031f, 0.203671902418137f,
-  0.043518904596567f, 0.204022079706192f, 0.043675523251295f, 0.204372137784958f,
-  0.043832406401634f, 0.204722076654434f, 0.043989561498165f, 0.205071896314621f,
-  0.044146984815598f, 0.205421581864357f, 0.044304672628641f, 0.205771163105965f,
-  0.044462632387877f, 0.206120610237122f, 0.044620860368013f, 0.206469938158989f,
-  0.044779352843761f, 0.206819161772728f, 0.044938117265701f, 0.207168251276016f,
-  0.045097146183252f, 0.207517206668854f, 0.045256443321705f, 0.207866057753563f,
-  0.045416008681059f, 0.208214774727821f, 0.045575842261314f, 0.208563387393951f,
-  0.045735940337181f, 0.208911851048470f, 0.045896306633949f, 0.209260210394859f,
-  0.046056941151619f, 0.209608450531960f, 0.046217843890190f, 0.209956556558609f,
-  0.046379011124372f, 0.210304543375969f, 0.046540446579456f, 0.210652396082878f,
-  0.046702146530151f, 0.211000129580498f, 0.046864114701748f, 0.211347743868828f,
-  0.047026351094246f, 0.211695238947868f, 0.047188851982355f, 0.212042599916458f,
-  0.047351621091366f, 0.212389841675758f, 0.047514654695988f, 0.212736949324608f,
-  0.047677956521511f, 0.213083937764168f, 0.047841522842646f, 0.213430806994438f,
-  0.048005353659391f, 0.213777542114258f, 0.048169452697039f, 0.214124158024788f,
-  0.048333816230297f, 0.214470639824867f, 0.048498444259167f, 0.214817002415657f,
-  0.048663340508938f, 0.215163245797157f, 0.048828501254320f, 0.215509355068207f,
-  0.048993926495314f, 0.215855330228806f, 0.049159619957209f, 0.216201186180115f,
-  0.049325577914715f, 0.216546908020973f, 0.049491796642542f, 0.216892510652542f,
-  0.049658283591270f, 0.217237979173660f, 0.049825038760900f, 0.217583328485489f,
-  0.049992054700851f, 0.217928543686867f, 0.050159335136414f, 0.218273624777794f,
-  0.050326880067587f, 0.218618586659431f, 0.050494693219662f, 0.218963414430618f,
-  0.050662767142057f, 0.219308122992516f, 0.050831105560064f, 0.219652697443962f,
-  0.050999708473682f, 0.219997137784958f, 0.051168579608202f, 0.220341444015503f,
-  0.051337707787752f, 0.220685631036758f, 0.051507104188204f, 0.221029683947563f,
-  0.051676765084267f, 0.221373617649078f, 0.051846686750650f, 0.221717402338982f,
-  0.052016876637936f, 0.222061067819595f, 0.052187327295542f, 0.222404599189758f,
-  0.052358038723469f, 0.222748011350632f, 0.052529018372297f, 0.223091274499893f,
-  0.052700258791447f, 0.223434418439865f, 0.052871759980917f, 0.223777428269386f,
-  0.053043525665998f, 0.224120303988457f, 0.053215555846691f, 0.224463045597076f,
-  0.053387850522995f, 0.224805667996407f, 0.053560405969620f, 0.225148141384125f,
-  0.053733222186565f, 0.225490495562553f, 0.053906302899122f, 0.225832715630531f,
-  0.054079644382000f, 0.226174786686897f, 0.054253250360489f, 0.226516738533974f,
-  0.054427117109299f, 0.226858556270599f, 0.054601248353720f, 0.227200239896774f,
-  0.054775636643171f, 0.227541789412498f, 0.054950293153524f, 0.227883204817772f,
-  0.055125206708908f, 0.228224486112595f, 0.055300384759903f, 0.228565633296967f,
-  0.055475823581219f, 0.228906646370888f, 0.055651523172855f, 0.229247525334358f,
-  0.055827483534813f, 0.229588270187378f, 0.056003704667091f, 0.229928880929947f,
-  0.056180190294981f, 0.230269357562065f, 0.056356932967901f, 0.230609700083733f,
-  0.056533940136433f, 0.230949893593788f, 0.056711208075285f, 0.231289967894554f,
-  0.056888736784458f, 0.231629893183708f, 0.057066522538662f, 0.231969684362412f,
-  0.057244572788477f, 0.232309341430664f, 0.057422880083323f, 0.232648864388466f,
-  0.057601451873779f, 0.232988253235817f, 0.057780280709267f, 0.233327493071556f,
-  0.057959370315075f, 0.233666598796844f, 0.058138720691204f, 0.234005570411682f,
-  0.058318331837654f, 0.234344407916069f, 0.058498200029135f, 0.234683111310005f,
-  0.058678328990936f, 0.235021665692329f, 0.058858718723059f, 0.235360085964203f,
-  0.059039369225502f, 0.235698372125626f, 0.059220276772976f, 0.236036509275436f,
-  0.059401445090771f, 0.236374512314796f, 0.059582870453596f, 0.236712381243706f,
-  0.059764556586742f, 0.237050101161003f, 0.059946499764919f, 0.237387686967850f,
-  0.060128703713417f, 0.237725138664246f, 0.060311164706945f, 0.238062441349030f,
-  0.060493886470795f, 0.238399609923363f, 0.060676865279675f, 0.238736644387245f,
-  0.060860104858875f, 0.239073529839516f, 0.061043601483107f, 0.239410281181335f,
-  0.061227355152369f, 0.239746883511543f, 0.061411365866661f, 0.240083336830139f,
-  0.061595637351274f, 0.240419670939446f, 0.061780165880919f, 0.240755841135979f,
-  0.061964951455593f, 0.241091892123222f, 0.062149997800589f, 0.241427779197693f,
-  0.062335297465324f, 0.241763532161713f, 0.062520854175091f, 0.242099151015282f,
-  0.062706671655178f, 0.242434620857239f, 0.062892749905586f, 0.242769956588745f,
-  0.063079081475735f, 0.243105143308640f, 0.063265666365623f, 0.243440181016922f,
-  0.063452512025833f, 0.243775084614754f, 0.063639611005783f, 0.244109839200974f,
-  0.063826970756054f, 0.244444444775581f, 0.064014583826065f, 0.244778916239738f,
-  0.064202457666397f, 0.245113238692284f, 0.064390584826469f, 0.245447427034378f,
-  0.064578965306282f, 0.245781451463699f, 0.064767606556416f, 0.246115356683731f,
-  0.064956501126289f, 0.246449097990990f, 0.065145656466484f, 0.246782705187798f,
-  0.065335065126419f, 0.247116148471832f, 0.065524727106094f, 0.247449472546577f,
-  0.065714649856091f, 0.247782632708550f, 0.065904818475246f, 0.248115643858910f,
-  0.066095255315304f, 0.248448520898819f, 0.066285938024521f, 0.248781248927116f,
-  0.066476874053478f, 0.249113827943802f, 0.066668070852757f, 0.249446272850037f,
-  0.066859520971775f, 0.249778553843498f, 0.067051224410534f, 0.250110685825348f,
-  0.067243188619614f, 0.250442683696747f, 0.067435398697853f, 0.250774532556534f,
-  0.067627869546413f, 0.251106232404709f, 0.067820593714714f, 0.251437783241272f,
-  0.068013571202755f, 0.251769185066223f, 0.068206802010536f, 0.252100437879562f,
-  0.068400286138058f, 0.252431541681290f, 0.068594031035900f, 0.252762526273727f,
-  0.068788021802902f, 0.253093332052231f, 0.068982265889645f, 0.253423988819122f,
-  0.069176770746708f, 0.253754496574402f, 0.069371521472931f, 0.254084855318069f,
-  0.069566532969475f, 0.254415065050125f, 0.069761790335178f, 0.254745125770569f,
-  0.069957308471203f, 0.255075037479401f, 0.070153072476387f, 0.255404800176620f,
-  0.070349089801311f, 0.255734413862228f, 0.070545360445976f, 0.256063878536224f,
-  0.070741884410381f, 0.256393194198608f, 0.070938661694527f, 0.256722360849380f,
-  0.071135692298412f, 0.257051378488541f, 0.071332976222038f, 0.257380217313766f,
-  0.071530513465405f, 0.257708936929703f, 0.071728296577930f, 0.258037507534027f,
-  0.071926333010197f, 0.258365899324417f, 0.072124622762203f, 0.258694142103195f,
-  0.072323165833950f, 0.259022265672684f, 0.072521962225437f, 0.259350210428238f,
-  0.072721004486084f, 0.259678006172180f, 0.072920300066471f, 0.260005623102188f,
-  0.073119848966599f, 0.260333120822906f, 0.073319651186466f, 0.260660469532013f,
-  0.073519699275494f, 0.260987639427185f, 0.073720000684261f, 0.261314690113068f,
-  0.073920547962189f, 0.261641561985016f, 0.074121348559856f, 0.261968284845352f,
-  0.074322402477264f, 0.262294828891754f, 0.074523709714413f, 0.262621253728867f,
-  0.074725262820721f, 0.262947499752045f, 0.074927061796188f, 0.263273626565933f,
-  0.075129114091396f, 0.263599574565887f, 0.075331419706345f, 0.263925373554230f,
-  0.075533971190453f, 0.264250993728638f, 0.075736775994301f, 0.264576494693756f,
-  0.075939826667309f, 0.264901816844940f, 0.076143130660057f, 0.265226989984512f,
-  0.076346680521965f, 0.265552014112473f, 0.076550483703613f, 0.265876859426498f,
-  0.076754532754421f, 0.266201555728912f, 0.076958827674389f, 0.266526103019714f,
-  0.077163375914097f, 0.266850501298904f, 0.077368170022964f, 0.267174720764160f,
-  0.077573217451572f, 0.267498821020126f, 0.077778510749340f, 0.267822742462158f,
-  0.077984049916267f, 0.268146485090256f, 0.078189842402935f, 0.268470078706741f,
-  0.078395880758762f, 0.268793523311615f, 0.078602164983749f, 0.269116818904877f,
-  0.078808702528477f, 0.269439965486526f, 0.079015478491783f, 0.269762933254242f,
-  0.079222507774830f, 0.270085722208023f, 0.079429790377617f, 0.270408391952515f,
-  0.079637311398983f, 0.270730882883072f, 0.079845085740089f, 0.271053224802017f,
-  0.080053105950356f, 0.271375387907028f, 0.080261372029781f, 0.271697402000427f,
-  0.080469883978367f, 0.272019267082214f, 0.080678641796112f, 0.272340953350067f,
-  0.080887645483017f, 0.272662490606308f, 0.081096902489662f, 0.272983878850937f,
-  0.081306397914886f, 0.273305088281631f, 0.081516146659851f, 0.273626148700714f,
-  0.081726133823395f, 0.273947030305862f, 0.081936374306679f, 0.274267762899399f,
-  0.082146860659122f, 0.274588316679001f, 0.082357585430145f, 0.274908751249313f,
-  0.082568563520908f, 0.275228977203369f, 0.082779780030251f, 0.275549083948135f,
-  0.082991249859333f, 0.275868982076645f, 0.083202958106995f, 0.276188760995865f,
-  0.083414919674397f, 0.276508361101151f, 0.083627119660378f, 0.276827782392502f,
-  0.083839565515518f, 0.277147054672241f, 0.084052257239819f, 0.277466177940369f,
-  0.084265194833279f, 0.277785122394562f, 0.084478378295898f, 0.278103888034821f,
-  0.084691800177097f, 0.278422504663467f, 0.084905467927456f, 0.278740972280502f,
-  0.085119381546974f, 0.279059261083603f, 0.085333541035652f, 0.279377400875092f,
-  0.085547938942909f, 0.279695361852646f, 0.085762590169907f, 0.280013144016266f,
-  0.085977479815483f, 0.280330777168274f, 0.086192607879639f, 0.280648261308670f,
-  0.086407989263535f, 0.280965566635132f, 0.086623609066010f, 0.281282693147659f,
-  0.086839467287064f, 0.281599670648575f, 0.087055571377277f, 0.281916469335556f,
-  0.087271921336651f, 0.282233119010925f, 0.087488517165184f, 0.282549589872360f,
-  0.087705351412296f, 0.282865911722183f, 0.087922424077988f, 0.283182054758072f,
-  0.088139742612839f, 0.283498018980026f, 0.088357307016850f, 0.283813834190369f,
-  0.088575109839439f, 0.284129470586777f, 0.088793158531189f, 0.284444957971573f,
-  0.089011445641518f, 0.284760266542435f, 0.089229971170425f, 0.285075396299362f,
-  0.089448742568493f, 0.285390377044678f, 0.089667752385139f, 0.285705178976059f,
-  0.089887008070946f, 0.286019802093506f, 0.090106502175331f, 0.286334276199341f,
-  0.090326242148876f, 0.286648571491241f, 0.090546220541000f, 0.286962717771530f,
-  0.090766437351704f, 0.287276685237885f, 0.090986892580986f, 0.287590473890305f,
-  0.091207593679428f, 0.287904083728790f, 0.091428533196449f, 0.288217544555664f,
-  0.091649711132050f, 0.288530826568604f, 0.091871134936810f, 0.288843959569931f,
-  0.092092797160149f, 0.289156883955002f, 0.092314697802067f, 0.289469659328461f,
-  0.092536836862564f, 0.289782285690308f, 0.092759214341640f, 0.290094703435898f,
-  0.092981837689877f, 0.290406972169876f, 0.093204692006111f, 0.290719062089920f,
-  0.093427792191505f, 0.291031002998352f, 0.093651130795479f, 0.291342735290527f,
-  0.093874707818031f, 0.291654318571091f, 0.094098523259163f, 0.291965723037720f,
-  0.094322577118874f, 0.292276978492737f, 0.094546869397163f, 0.292588025331497f,
-  0.094771400094032f, 0.292898923158646f, 0.094996169209480f, 0.293209642171860f,
-  0.095221176743507f, 0.293520182371140f, 0.095446422696114f, 0.293830573558807f,
-  0.095671907067299f, 0.294140785932541f, 0.095897629857063f, 0.294450789690018f,
-  0.096123591065407f, 0.294760644435883f, 0.096349790692329f, 0.295070350170136f,
-  0.096576221287251f, 0.295379847288132f, 0.096802897751331f, 0.295689195394516f,
-  0.097029805183411f, 0.295998334884644f, 0.097256951034069f, 0.296307325363159f,
-  0.097484335303307f, 0.296616137027740f, 0.097711957991123f, 0.296924799680710f,
-  0.097939811646938f, 0.297233253717422f, 0.098167903721333f, 0.297541528940201f,
-  0.098396234214306f, 0.297849655151367f, 0.098624803125858f, 0.298157602548599f,
-  0.098853603005409f, 0.298465341329575f, 0.099082641303539f, 0.298772931098938f,
-  0.099311910569668f, 0.299080342054367f, 0.099541425704956f, 0.299387603998184f,
-  0.099771171808243f, 0.299694657325745f, 0.100001148879528f, 0.300001531839371f,
-  0.100231364369392f, 0.300308227539063f, 0.100461818277836f, 0.300614774227142f,
-  0.100692503154278f, 0.300921112298965f, 0.100923426449299f, 0.301227301359177f,
-  0.101154580712318f, 0.301533311605453f, 0.101385973393917f, 0.301839113235474f,
-  0.101617597043514f, 0.302144765853882f, 0.101849451661110f, 0.302450239658356f,
-  0.102081544697285f, 0.302755534648895f, 0.102313876152039f, 0.303060621023178f,
-  0.102546438574791f, 0.303365558385849f, 0.102779231965542f, 0.303670316934586f,
-  0.103012263774872f, 0.303974896669388f, 0.103245526552200f, 0.304279297590256f,
-  0.103479020297527f, 0.304583519697189f, 0.103712752461433f, 0.304887533187866f,
-  0.103946708142757f, 0.305191397666931f, 0.104180909693241f, 0.305495083332062f,
-  0.104415334761143f, 0.305798590183258f, 0.104649998247623f, 0.306101888418198f,
-  0.104884892702103f, 0.306405037641525f, 0.105120018124580f, 0.306708008050919f,
-  0.105355374515057f, 0.307010769844055f, 0.105590961873531f, 0.307313382625580f,
-  0.105826787650585f, 0.307615786790848f, 0.106062836945057f, 0.307918041944504f,
-  0.106299124658108f, 0.308220088481903f, 0.106535643339157f, 0.308521956205368f,
-  0.106772392988205f, 0.308823645114899f, 0.107009373605251f, 0.309125155210495f,
-  0.107246585190296f, 0.309426486492157f, 0.107484027743340f, 0.309727638959885f,
-  0.107721701264381f, 0.310028612613678f, 0.107959605753422f, 0.310329377651215f,
-  0.108197741210461f, 0.310629993677139f, 0.108436107635498f, 0.310930401086807f,
-  0.108674705028534f, 0.311230629682541f, 0.108913525938988f, 0.311530679464340f,
-  0.109152585268021f, 0.311830550432205f, 0.109391868114471f, 0.312130242586136f,
-  0.109631389379501f, 0.312429755926132f, 0.109871134161949f, 0.312729060649872f,
-  0.110111102461815f, 0.313028186559677f, 0.110351309180260f, 0.313327133655548f,
-  0.110591746866703f, 0.313625901937485f, 0.110832408070564f, 0.313924491405487f,
-  0.111073300242424f, 0.314222872257233f, 0.111314415931702f, 0.314521104097366f,
-  0.111555770039558f, 0.314819127321243f, 0.111797347664833f, 0.315116971731186f,
-  0.112039148807526f, 0.315414607524872f, 0.112281180918217f, 0.315712094306946f,
-  0.112523443996906f, 0.316009372472763f, 0.112765938043594f, 0.316306471824646f,
-  0.113008655607700f, 0.316603392362595f, 0.113251596689224f, 0.316900104284287f,
-  0.113494776189327f, 0.317196637392044f, 0.113738171756268f, 0.317492991685867f,
-  0.113981798291206f, 0.317789167165756f, 0.114225655794144f, 0.318085134029388f,
-  0.114469736814499f, 0.318380922079086f, 0.114714048802853f, 0.318676531314850f,
-  0.114958584308624f, 0.318971961736679f, 0.115203343331814f, 0.319267183542252f,
-  0.115448333323002f, 0.319562226533890f, 0.115693546831608f, 0.319857090711594f,
-  0.115938983857632f, 0.320151746273041f, 0.116184651851654f, 0.320446223020554f,
-  0.116430543363094f, 0.320740520954132f, 0.116676658391953f, 0.321034610271454f,
-  0.116923004388809f, 0.321328520774841f, 0.117169573903084f, 0.321622252464294f,
-  0.117416366934776f, 0.321915775537491f, 0.117663383483887f, 0.322209119796753f,
-  0.117910631000996f, 0.322502255439758f, 0.118158094584942f, 0.322795242071152f,
-  0.118405789136887f, 0.323088020086288f, 0.118653707206249f, 0.323380589485168f,
-  0.118901848793030f, 0.323672980070114f, 0.119150213897228f, 0.323965191841125f,
-  0.119398809969425f, 0.324257194995880f, 0.119647622108459f, 0.324549019336700f,
-  0.119896657764912f, 0.324840664863586f, 0.120145916938782f, 0.325132101774216f,
-  0.120395407080650f, 0.325423330068588f, 0.120645113289356f, 0.325714409351349f,
-  0.120895043015480f, 0.326005280017853f, 0.121145196259022f, 0.326295942068100f,
-  0.121395580470562f, 0.326586425304413f, 0.121646173298359f, 0.326876699924469f,
-  0.121896997094154f, 0.327166795730591f, 0.122148044407368f, 0.327456712722778f,
-  0.122399315237999f, 0.327746421098709f, 0.122650802135468f, 0.328035950660706f,
-  0.122902512550354f, 0.328325271606445f, 0.123154446482658f, 0.328614413738251f,
-  0.123406603932381f, 0.328903347253799f, 0.123658977448940f, 0.329192101955414f,
-  0.123911574482918f, 0.329480648040771f, 0.124164395034313f, 0.329769015312195f,
-  0.124417431652546f, 0.330057173967361f, 0.124670691788197f, 0.330345153808594f,
-  0.124924175441265f, 0.330632925033569f, 0.125177875161171f, 0.330920487642288f,
-  0.125431805849075f, 0.331207901239395f, 0.125685945153236f, 0.331495076417923f,
-  0.125940307974815f, 0.331782072782516f, 0.126194894313812f, 0.332068890333176f,
-  0.126449704170227f, 0.332355499267578f, 0.126704722642899f, 0.332641899585724f,
-  0.126959964632988f, 0.332928121089935f, 0.127215430140495f, 0.333214133977890f,
-  0.127471104264259f, 0.333499968051910f, 0.127727001905441f, 0.333785593509674f,
-  0.127983123064041f, 0.334071010351181f, 0.128239467740059f, 0.334356248378754f,
-  0.128496021032333f, 0.334641307592392f, 0.128752797842026f, 0.334926128387451f,
-  0.129009798169136f, 0.335210770368576f, 0.129267007112503f, 0.335495233535767f,
-  0.129524439573288f, 0.335779488086700f, 0.129782080650330f, 0.336063534021378f,
-  0.130039945244789f, 0.336347371339798f, 0.130298033356667f, 0.336631029844284f,
-  0.130556344985962f, 0.336914509534836f, 0.130814850330353f, 0.337197750806808f,
-  0.131073594093323f, 0.337480813264847f, 0.131332546472549f, 0.337763696908951f,
-  0.131591722369194f, 0.338046342134476f, 0.131851106882095f, 0.338328808546066f,
-  0.132110700011253f, 0.338611096143723f, 0.132370531558990f, 0.338893145322800f,
-  0.132630556821823f, 0.339175015687943f, 0.132890805602074f, 0.339456677436829f,
-  0.133151277899742f, 0.339738160371780f, 0.133411958813667f, 0.340019434690475f,
-  0.133672863245010f, 0.340300500392914f, 0.133933976292610f, 0.340581357479095f,
-  0.134195312857628f, 0.340862035751343f, 0.134456858038902f, 0.341142505407333f,
-  0.134718611836433f, 0.341422766447067f, 0.134980589151382f, 0.341702848672867f,
-  0.135242775082588f, 0.341982692480087f, 0.135505184531212f, 0.342262357473373f,
-  0.135767802596092f, 0.342541843652725f, 0.136030644178391f, 0.342821091413498f,
-  0.136293679475784f, 0.343100160360336f, 0.136556953191757f, 0.343379020690918f,
-  0.136820420622826f, 0.343657672405243f, 0.137084111571312f, 0.343936115503311f,
-  0.137348011136055f, 0.344214379787445f, 0.137612134218216f, 0.344492435455322f,
-  0.137876465916634f, 0.344770282506943f, 0.138141006231308f, 0.345047920942307f,
-  0.138405755162239f, 0.345325350761414f, 0.138670727610588f, 0.345602601766586f,
-  0.138935908675194f, 0.345879614353180f, 0.139201298356056f, 0.346156448125839f,
-  0.139466896653175f, 0.346433073282242f, 0.139732718467712f, 0.346709519624710f,
-  0.139998748898506f, 0.346985727548599f, 0.140264987945557f, 0.347261756658554f,
-  0.140531435608864f, 0.347537547349930f, 0.140798106789589f, 0.347813159227371f,
-  0.141064971685410f, 0.348088562488556f, 0.141332060098648f, 0.348363757133484f,
-  0.141599357128143f, 0.348638743162155f, 0.141866862773895f, 0.348913550376892f,
-  0.142134591937065f, 0.349188119173050f, 0.142402514815331f, 0.349462509155273f,
-  0.142670661211014f, 0.349736660718918f, 0.142939001321793f, 0.350010633468628f,
-  0.143207564949989f, 0.350284397602081f, 0.143476337194443f, 0.350557953119278f,
-  0.143745318055153f, 0.350831300020218f, 0.144014507532120f, 0.351104438304901f,
-  0.144283905625343f, 0.351377367973328f, 0.144553512334824f, 0.351650089025497f,
-  0.144823327660561f, 0.351922631263733f, 0.145093351602554f, 0.352194935083389f,
-  0.145363584160805f, 0.352467030286789f, 0.145634025335312f, 0.352738946676254f,
-  0.145904675126076f, 0.353010624647141f, 0.146175548434258f, 0.353282123804092f,
-  0.146446615457535f, 0.353553384542465f, 0.146717891097069f, 0.353824466466904f,
-  0.146989375352860f, 0.354095309972763f, 0.147261068224907f, 0.354365974664688f,
-  0.147532954812050f, 0.354636400938034f, 0.147805064916611f, 0.354906648397446f,
-  0.148077383637428f, 0.355176687240601f, 0.148349896073341f, 0.355446487665176f,
-  0.148622632026672f, 0.355716109275818f, 0.148895561695099f, 0.355985492467880f,
-  0.149168699979782f, 0.356254696846008f, 0.149442046880722f, 0.356523662805557f,
-  0.149715602397919f, 0.356792420148849f, 0.149989366531372f, 0.357060998678207f,
-  0.150263324379921f, 0.357329338788986f, 0.150537505745888f, 0.357597470283508f,
-  0.150811880826950f, 0.357865422964096f, 0.151086464524269f, 0.358133137226105f,
-  0.151361241936684f, 0.358400642871857f, 0.151636242866516f, 0.358667939901352f,
-  0.151911437511444f, 0.358935028314590f, 0.152186840772629f, 0.359201908111572f,
-  0.152462437748909f, 0.359468549489975f, 0.152738258242607f, 0.359735012054443f,
-  0.153014272451401f, 0.360001266002655f, 0.153290495276451f, 0.360267281532288f,
-  0.153566911816597f, 0.360533088445663f, 0.153843536973000f, 0.360798716545105f,
-  0.154120370745659f, 0.361064106225967f, 0.154397398233414f, 0.361329287290573f,
-  0.154674649238586f, 0.361594229936600f, 0.154952079057693f, 0.361858993768692f,
-  0.155229732394218f, 0.362123548984528f, 0.155507579445839f, 0.362387865781784f,
-  0.155785620212555f, 0.362651973962784f, 0.156063869595528f, 0.362915903329849f,
-  0.156342327594757f, 0.363179564476013f, 0.156620979309082f, 0.363443046808243f,
-  0.156899839639664f, 0.363706320524216f, 0.157178908586502f, 0.363969355821610f,
-  0.157458171248436f, 0.364232182502747f, 0.157737627625465f, 0.364494800567627f,
-  0.158017292618752f, 0.364757210016251f, 0.158297166228294f, 0.365019410848618f,
-  0.158577233552933f, 0.365281373262405f, 0.158857494592667f, 0.365543156862259f,
-  0.159137964248657f, 0.365804702043533f, 0.159418627619743f, 0.366066008806229f,
-  0.159699499607086f, 0.366327136754990f, 0.159980565309525f, 0.366588026285172f,
-  0.160261839628220f, 0.366848707199097f, 0.160543307662010f, 0.367109179496765f,
-  0.160824984312058f, 0.367369443178177f, 0.161106839776039f, 0.367629468441010f,
-  0.161388918757439f, 0.367889285087585f, 0.161671176552773f, 0.368148893117905f,
-  0.161953642964363f, 0.368408292531967f, 0.162236317992210f, 0.368667453527451f,
-  0.162519171833992f, 0.368926405906677f, 0.162802234292030f, 0.369185149669647f,
-  0.163085505366325f, 0.369443655014038f, 0.163368955254555f, 0.369701951742172f,
-  0.163652613759041f, 0.369960039854050f, 0.163936465978622f, 0.370217919349670f,
-  0.164220526814461f, 0.370475560426712f, 0.164504766464233f, 0.370732992887497f,
-  0.164789214730263f, 0.370990216732025f, 0.165073871612549f, 0.371247202157974f,
-  0.165358707308769f, 0.371503978967667f, 0.165643751621246f, 0.371760547161102f,
-  0.165928974747658f, 0.372016876935959f, 0.166214406490326f, 0.372272998094559f,
-  0.166500031948090f, 0.372528880834579f, 0.166785866022110f, 0.372784584760666f,
-  0.167071878910065f, 0.373040050268173f, 0.167358100414276f, 0.373295277357101f,
-  0.167644515633583f, 0.373550295829773f, 0.167931124567986f, 0.373805105686188f,
-  0.168217927217484f, 0.374059677124023f, 0.168504923582077f, 0.374314039945602f,
-  0.168792113661766f, 0.374568194150925f, 0.169079497456551f, 0.374822109937668f,
-  0.169367074966431f, 0.375075817108154f, 0.169654861092567f, 0.375329315662384f,
-  0.169942826032639f, 0.375582575798035f, 0.170230999588966f, 0.375835597515106f,
-  0.170519351959229f, 0.376088410615921f, 0.170807912945747f, 0.376341015100479f,
-  0.171096652746201f, 0.376593410968781f, 0.171385586261749f, 0.376845568418503f,
-  0.171674728393555f, 0.377097487449646f, 0.171964049339294f, 0.377349197864532f,
-  0.172253578901291f, 0.377600699663162f, 0.172543287277222f, 0.377851963043213f,
-  0.172833189368248f, 0.378102988004684f, 0.173123285174370f, 0.378353834152222f,
-  0.173413574695587f, 0.378604412078857f, 0.173704057931900f, 0.378854811191559f,
-  0.173994734883308f, 0.379104942083359f, 0.174285605549812f, 0.379354894161224f,
-  0.174576655030251f, 0.379604607820511f, 0.174867913126946f, 0.379854083061218f,
-  0.175159350037575f, 0.380103349685669f, 0.175450980663300f, 0.380352377891541f,
-  0.175742805004120f, 0.380601197481155f, 0.176034808158875f, 0.380849778652191f,
-  0.176327019929886f, 0.381098151206970f, 0.176619410514832f, 0.381346285343170f,
-  0.176911994814873f, 0.381594210863113f, 0.177204772830009f, 0.381841897964478f,
-  0.177497729659081f, 0.382089376449585f, 0.177790880203247f, 0.382336616516113f,
-  0.178084224462509f, 0.382583618164063f, 0.178377762436867f, 0.382830440998077f,
-  0.178671479225159f, 0.383076995611191f, 0.178965389728546f, 0.383323341608047f,
-  0.179259493947029f, 0.383569449186325f, 0.179553776979446f, 0.383815348148346f,
-  0.179848253726959f, 0.384061008691788f, 0.180142924189568f, 0.384306460618973f,
-  0.180437773466110f, 0.384551674127579f, 0.180732816457748f, 0.384796649217606f,
-  0.181028053164482f, 0.385041415691376f, 0.181323468685150f, 0.385285943746567f,
-  0.181619063019753f, 0.385530263185501f, 0.181914865970612f, 0.385774344205856f,
-  0.182210832834244f, 0.386018186807632f, 0.182507008314133f, 0.386261820793152f,
-  0.182803362607956f, 0.386505216360092f, 0.183099895715714f, 0.386748403310776f,
-  0.183396622538567f, 0.386991351842880f, 0.183693528175354f, 0.387234061956406f,
-  0.183990627527237f, 0.387476563453674f, 0.184287920594215f, 0.387718826532364f,
-  0.184585392475128f, 0.387960851192474f, 0.184883043169975f, 0.388202667236328f,
-  0.185180887579918f, 0.388444244861603f, 0.185478910803795f, 0.388685584068298f,
-  0.185777112841606f, 0.388926714658737f, 0.186075508594513f, 0.389167606830597f,
-  0.186374098062515f, 0.389408260583878f, 0.186672851443291f, 0.389648675918579f,
-  0.186971798539162f, 0.389888882637024f, 0.187270939350128f, 0.390128880739212f,
-  0.187570258975029f, 0.390368610620499f, 0.187869757413864f, 0.390608131885529f,
-  0.188169434666634f, 0.390847414731979f, 0.188469305634499f, 0.391086459159851f,
-  0.188769355416298f, 0.391325294971466f, 0.189069598913193f, 0.391563892364502f,
-  0.189370006322861f, 0.391802251338959f, 0.189670607447624f, 0.392040401697159f,
-  0.189971387386322f, 0.392278283834457f, 0.190272361040115f, 0.392515957355499f,
-  0.190573498606682f, 0.392753422260284f, 0.190874829888344f, 0.392990618944168f,
-  0.191176339983940f, 0.393227607011795f, 0.191478043794632f, 0.393464356660843f,
-  0.191779911518097f, 0.393700867891312f, 0.192081972956657f, 0.393937170505524f,
-  0.192384198307991f, 0.394173204898834f, 0.192686617374420f, 0.394409030675888f,
-  0.192989215254784f, 0.394644618034363f, 0.193292006850243f, 0.394879996776581f,
-  0.193594962358475f, 0.395115107297897f, 0.193898096680641f, 0.395350009202957f,
-  0.194201424717903f, 0.395584672689438f, 0.194504916667938f, 0.395819097757339f,
-  0.194808602333069f, 0.396053284406662f, 0.195112451910973f, 0.396287262439728f,
-  0.195416495203972f, 0.396520972251892f, 0.195720717310905f, 0.396754473447800f,
-  0.196025103330612f, 0.396987736225128f, 0.196329683065414f, 0.397220760583878f,
-  0.196634441614151f, 0.397453576326370f, 0.196939364075661f, 0.397686123847961f,
-  0.197244480252266f, 0.397918462753296f, 0.197549775242805f, 0.398150533437729f,
-  0.197855234146118f, 0.398382395505905f, 0.198160871863365f, 0.398614019155502f,
-  0.198466703295708f, 0.398845434188843f, 0.198772698640823f, 0.399076581001282f,
-  0.199078872799873f, 0.399307489395142f, 0.199385225772858f, 0.399538189172745f,
-  0.199691757559776f, 0.399768620729446f, 0.199998468160629f, 0.399998843669891f,
-  0.200305357575417f, 0.400228828191757f, 0.200612410902977f, 0.400458574295044f,
-  0.200919643044472f, 0.400688081979752f, 0.201227053999901f, 0.400917351245880f,
-  0.201534643769264f, 0.401146411895752f, 0.201842412352562f, 0.401375204324722f,
-  0.202150344848633f, 0.401603758335114f, 0.202458456158638f, 0.401832103729248f,
-  0.202766746282578f, 0.402060180902481f, 0.203075215220451f, 0.402288049459457f,
-  0.203383848071098f, 0.402515679597855f, 0.203692659735680f, 0.402743041515350f,
-  0.204001650214195f, 0.402970194816589f, 0.204310819506645f, 0.403197109699249f,
-  0.204620152711868f, 0.403423786163330f, 0.204929664731026f, 0.403650224208832f,
-  0.205239340662956f, 0.403876423835754f, 0.205549195408821f, 0.404102355241776f,
-  0.205859228968620f, 0.404328078031540f, 0.206169426441193f, 0.404553562402725f,
-  0.206479802727699f, 0.404778808355331f, 0.206790357828140f, 0.405003815889359f,
-  0.207101076841354f, 0.405228585004807f, 0.207411959767342f, 0.405453115701675f,
-  0.207723021507263f, 0.405677437782288f, 0.208034262061119f, 0.405901491641998f,
-  0.208345666527748f, 0.406125307083130f, 0.208657249808311f, 0.406348884105682f,
-  0.208969011902809f, 0.406572192907333f, 0.209280923008919f, 0.406795293092728f,
-  0.209593027830124f, 0.407018154859543f, 0.209905281662941f, 0.407240778207779f,
-  0.210217714309692f, 0.407463163137436f, 0.210530325770378f, 0.407685309648514f,
-  0.210843101143837f, 0.407907217741013f, 0.211156040430069f, 0.408128857612610f,
-  0.211469158530235f, 0.408350288867950f, 0.211782455444336f, 0.408571451902390f,
-  0.212095901370049f, 0.408792406320572f, 0.212409526109695f, 0.409013092517853f,
-  0.212723329663277f, 0.409233570098877f, 0.213037282228470f, 0.409453779459000f,
-  0.213351413607597f, 0.409673750400543f, 0.213665723800659f, 0.409893482923508f,
-  0.213980183005333f, 0.410112977027893f, 0.214294821023941f, 0.410332232713699f,
-  0.214609622955322f, 0.410551249980927f, 0.214924603700638f, 0.410770028829575f,
-  0.215239733457565f, 0.410988569259644f, 0.215555042028427f, 0.411206841468811f,
-  0.215870529413223f, 0.411424905061722f, 0.216186165809631f, 0.411642700433731f,
-  0.216501981019974f, 0.411860257387161f, 0.216817945241928f, 0.412077575922012f,
-  0.217134088277817f, 0.412294656038284f, 0.217450410127640f, 0.412511497735977f,
-  0.217766880989075f, 0.412728071212769f, 0.218083515763283f, 0.412944436073303f,
-  0.218400329351425f, 0.413160532712936f, 0.218717306852341f, 0.413376390933990f,
-  0.219034433364868f, 0.413592010736465f, 0.219351738691330f, 0.413807392120361f,
-  0.219669207930565f, 0.414022535085678f, 0.219986841082573f, 0.414237409830093f,
-  0.220304638147354f, 0.414452046155930f, 0.220622614026070f, 0.414666473865509f,
-  0.220940738916397f, 0.414880603551865f, 0.221259027719498f, 0.415094524621964f,
-  0.221577480435371f, 0.415308207273483f, 0.221896097064018f, 0.415521621704102f,
-  0.222214877605438f, 0.415734797716141f, 0.222533836960793f, 0.415947735309601f,
-  0.222852945327759f, 0.416160434484482f, 0.223172217607498f, 0.416372895240784f,
-  0.223491653800011f, 0.416585087776184f, 0.223811239004135f, 0.416797041893005f,
-  0.224131003022194f, 0.417008757591248f, 0.224450930953026f, 0.417220205068588f,
-  0.224771007895470f, 0.417431443929672f, 0.225091263651848f, 0.417642414569855f,
-  0.225411668419838f, 0.417853146791458f, 0.225732237100601f, 0.418063640594482f,
-  0.226052969694138f, 0.418273866176605f, 0.226373866200447f, 0.418483853340149f,
-  0.226694911718369f, 0.418693602085114f, 0.227016136050224f, 0.418903112411499f,
-  0.227337509393692f, 0.419112354516983f, 0.227659046649933f, 0.419321358203888f,
-  0.227980732917786f, 0.419530123472214f, 0.228302597999573f, 0.419738620519638f,
-  0.228624612092972f, 0.419946908950806f, 0.228946775197983f, 0.420154929161072f,
-  0.229269117116928f, 0.420362681150436f, 0.229591608047485f, 0.420570224523544f,
-  0.229914262890816f, 0.420777499675751f, 0.230237081646919f, 0.420984506607056f,
-  0.230560049414635f, 0.421191304922104f, 0.230883181095123f, 0.421397835016251f,
-  0.231206461787224f, 0.421604126691818f, 0.231529906392097f, 0.421810150146484f,
-  0.231853514909744f, 0.422015935182571f, 0.232177272439003f, 0.422221481800079f,
-  0.232501193881035f, 0.422426789999008f, 0.232825264334679f, 0.422631829977036f,
-  0.233149498701096f, 0.422836631536484f, 0.233473882079124f, 0.423041164875031f,
-  0.233798429369926f, 0.423245459794998f, 0.234123140573502f, 0.423449516296387f,
-  0.234448000788689f, 0.423653304576874f, 0.234773010015488f, 0.423856884241104f,
-  0.235098183155060f, 0.424060165882111f, 0.235423520207405f, 0.424263238906860f,
-  0.235749006271362f, 0.424466013908386f, 0.236074641346931f, 0.424668580293655f,
-  0.236400425434113f, 0.424870878458023f, 0.236726388335228f, 0.425072938203812f,
-  0.237052485346794f, 0.425274729728699f, 0.237378746271133f, 0.425476282835007f,
-  0.237705156207085f, 0.425677597522736f, 0.238031730055809f, 0.425878643989563f,
-  0.238358452916145f, 0.426079452037811f, 0.238685324788094f, 0.426279991865158f,
-  0.239012360572815f, 0.426480293273926f, 0.239339530467987f, 0.426680356264114f,
-  0.239666879177094f, 0.426880151033401f, 0.239994361996651f, 0.427079707384110f,
-  0.240322008728981f, 0.427278995513916f, 0.240649804472923f, 0.427478045225143f,
-  0.240977749228477f, 0.427676826715469f, 0.241305842995644f, 0.427875369787216f,
-  0.241634100675583f, 0.428073674440384f, 0.241962507367134f, 0.428271710872650f,
-  0.242291063070297f, 0.428469479084015f, 0.242619767785072f, 0.428667008876801f,
-  0.242948621511459f, 0.428864300251007f, 0.243277639150620f, 0.429061323404312f,
-  0.243606805801392f, 0.429258108139038f, 0.243936106562614f, 0.429454624652863f,
-  0.244265571236610f, 0.429650902748108f, 0.244595184922218f, 0.429846942424774f,
-  0.244924947619438f, 0.430042684078217f, 0.245254859328270f, 0.430238217115402f,
-  0.245584934949875f, 0.430433481931686f, 0.245915144681931f, 0.430628478527069f,
-  0.246245503425598f, 0.430823236703873f, 0.246576011180878f, 0.431017726659775f,
-  0.246906682848930f, 0.431211978197098f, 0.247237488627434f, 0.431405961513519f,
-  0.247568443417549f, 0.431599706411362f, 0.247899547219276f, 0.431793183088303f,
-  0.248230814933777f, 0.431986421346664f, 0.248562216758728f, 0.432179391384125f,
-  0.248893767595291f, 0.432372123003006f, 0.249225467443466f, 0.432564586400986f,
-  0.249557301402092f, 0.432756811380386f, 0.249889299273491f, 0.432948768138886f,
-  0.250221431255341f, 0.433140486478806f, 0.250553727149963f, 0.433331936597824f,
-  0.250886172056198f, 0.433523118495941f, 0.251218736171722f, 0.433714061975479f,
-  0.251551479101181f, 0.433904737234116f, 0.251884341239929f, 0.434095174074173f,
-  0.252217382192612f, 0.434285342693329f, 0.252550542354584f, 0.434475272893906f,
-  0.252883851528168f, 0.434664934873581f, 0.253217309713364f, 0.434854328632355f,
-  0.253550916910172f, 0.435043483972549f, 0.253884643316269f, 0.435232400894165f,
-  0.254218548536301f, 0.435421019792557f, 0.254552572965622f, 0.435609430074692f,
-  0.254886746406555f, 0.435797542333603f, 0.255221068859100f, 0.435985416173935f,
-  0.255555540323257f, 0.436173021793365f, 0.255890160799026f, 0.436360388994217f,
-  0.256224930286407f, 0.436547487974167f, 0.256559818983078f, 0.436734348535538f,
-  0.256894856691360f, 0.436920911073685f, 0.257230043411255f, 0.437107264995575f,
-  0.257565379142761f, 0.437293320894241f, 0.257900834083557f, 0.437479138374329f,
-  0.258236467838287f, 0.437664687633514f, 0.258572220802307f, 0.437849998474121f,
-  0.258908122777939f, 0.438035041093826f, 0.259244143962860f, 0.438219845294952f,
-  0.259580343961716f, 0.438404351472855f, 0.259916663169861f, 0.438588619232178f,
-  0.260253131389618f, 0.438772648572922f, 0.260589718818665f, 0.438956409692764f,
-  0.260926485061646f, 0.439139902591705f, 0.261263370513916f, 0.439323127269745f,
-  0.261600375175476f, 0.439506113529205f, 0.261937558650970f, 0.439688831567764f,
-  0.262274861335754f, 0.439871311187744f, 0.262612313032150f, 0.440053492784500f,
-  0.262949883937836f, 0.440235435962677f, 0.263287603855133f, 0.440417140722275f,
-  0.263625472784042f, 0.440598547458649f, 0.263963490724564f, 0.440779715776443f,
-  0.264301627874374f, 0.440960645675659f, 0.264639914035797f, 0.441141277551651f,
-  0.264978319406509f, 0.441321671009064f, 0.265316903591156f, 0.441501796245575f,
-  0.265655577182770f, 0.441681683063507f, 0.265994429588318f, 0.441861271858215f,
-  0.266333401203156f, 0.442040622234344f, 0.266672492027283f, 0.442219734191895f,
-  0.267011761665344f, 0.442398548126221f, 0.267351150512695f, 0.442577123641968f,
-  0.267690658569336f, 0.442755430936813f, 0.268030315637589f, 0.442933470010757f,
-  0.268370121717453f, 0.443111270666122f, 0.268710047006607f, 0.443288803100586f,
-  0.269050091505051f, 0.443466067314148f, 0.269390314817429f, 0.443643063306808f,
-  0.269730657339096f, 0.443819820880890f, 0.270071119070053f, 0.443996280431747f,
-  0.270411729812622f, 0.444172531366348f, 0.270752459764481f, 0.444348484277725f,
-  0.271093338727951f, 0.444524168968201f, 0.271434366703033f, 0.444699615240097f,
-  0.271775513887405f, 0.444874793291092f, 0.272116780281067f, 0.445049703121185f,
-  0.272458195686340f, 0.445224374532700f, 0.272799760103226f, 0.445398747920990f,
-  0.273141443729401f, 0.445572882890701f, 0.273483246564865f, 0.445746749639511f,
-  0.273825198411942f, 0.445920348167419f, 0.274167299270630f, 0.446093708276749f,
-  0.274509519338608f, 0.446266770362854f, 0.274851858615875f, 0.446439594030380f,
-  0.275194346904755f, 0.446612149477005f, 0.275536954402924f, 0.446784436702728f,
-  0.275879681110382f, 0.446956485509872f, 0.276222556829453f, 0.447128236293793f,
-  0.276565581560135f, 0.447299748659134f, 0.276908725500107f, 0.447470992803574f,
-  0.277251988649368f, 0.447641968727112f, 0.277595400810242f, 0.447812676429749f,
-  0.277938932180405f, 0.447983115911484f, 0.278282582759857f, 0.448153316974640f,
-  0.278626382350922f, 0.448323249816895f, 0.278970301151276f, 0.448492884635925f,
-  0.279314368963242f, 0.448662281036377f, 0.279658555984497f, 0.448831409215927f,
-  0.280002862215042f, 0.449000298976898f, 0.280347317457199f, 0.449168890714645f,
-  0.280691891908646f, 0.449337244033813f, 0.281036585569382f, 0.449505299329758f,
-  0.281381398439407f, 0.449673116207123f, 0.281726360321045f, 0.449840664863586f,
-  0.282071471214294f, 0.450007945299149f, 0.282416671514511f, 0.450174957513809f,
-  0.282762020826340f, 0.450341701507568f, 0.283107489347458f, 0.450508207082748f,
-  0.283453077077866f, 0.450674414634705f, 0.283798813819885f, 0.450840383768082f,
-  0.284144669771194f, 0.451006084680557f, 0.284490644931793f, 0.451171487569809f,
-  0.284836769104004f, 0.451336652040482f, 0.285182982683182f, 0.451501548290253f,
-  0.285529345273972f, 0.451666176319122f, 0.285875827074051f, 0.451830536127090f,
-  0.286222457885742f, 0.451994657516479f, 0.286569178104401f, 0.452158480882645f,
-  0.286916047334671f, 0.452322036027908f, 0.287263035774231f, 0.452485352754593f,
-  0.287610173225403f, 0.452648371458054f, 0.287957400083542f, 0.452811151742935f,
-  0.288304775953293f, 0.452973634004593f, 0.288652241230011f, 0.453135877847672f,
-  0.288999855518341f, 0.453297853469849f, 0.289347589015961f, 0.453459560871124f,
-  0.289695471525192f, 0.453621000051498f, 0.290043443441391f, 0.453782171010971f,
-  0.290391564369202f, 0.453943043947220f, 0.290739774703979f, 0.454103678464890f,
-  0.291088134050369f, 0.454264044761658f, 0.291436612606049f, 0.454424172639847f,
-  0.291785210371017f, 0.454584002494812f, 0.292133957147598f, 0.454743564128876f,
-  0.292482793331146f, 0.454902857542038f, 0.292831748723984f, 0.455061882734299f,
-  0.293180853128433f, 0.455220639705658f, 0.293530046939850f, 0.455379128456116f,
-  0.293879389762878f, 0.455537378787994f, 0.294228851795197f, 0.455695331096649f,
-  0.294578403234482f, 0.455853015184402f, 0.294928103685379f, 0.456010431051254f,
-  0.295277923345566f, 0.456167578697205f, 0.295627862215042f, 0.456324487924576f,
-  0.295977920293808f, 0.456481099128723f, 0.296328097581863f, 0.456637442111969f,
-  0.296678394079208f, 0.456793516874313f, 0.297028809785843f, 0.456949323415756f,
-  0.297379344701767f, 0.457104891538620f, 0.297729998826981f, 0.457260161638260f,
-  0.298080772161484f, 0.457415163516998f, 0.298431664705276f, 0.457569897174835f,
-  0.298782676458359f, 0.457724362611771f, 0.299133807420731f, 0.457878559827805f,
-  0.299485057592392f, 0.458032488822937f, 0.299836426973343f, 0.458186149597168f,
-  0.300187885761261f, 0.458339542150497f, 0.300539493560791f, 0.458492636680603f,
-  0.300891220569611f, 0.458645492792130f, 0.301243066787720f, 0.458798080682755f,
-  0.301595002412796f, 0.458950400352478f, 0.301947087049484f, 0.459102421998978f,
-  0.302299261093140f, 0.459254205226898f, 0.302651554346085f, 0.459405690431595f,
-  0.303003966808319f, 0.459556937217712f, 0.303356528282166f, 0.459707885980606f,
-  0.303709149360657f, 0.459858566522598f, 0.304061919450760f, 0.460008978843689f,
-  0.304414808750153f, 0.460159152746201f, 0.304767817258835f, 0.460309028625488f,
-  0.305120915174484f, 0.460458606481552f, 0.305474132299423f, 0.460607945919037f,
-  0.305827468633652f, 0.460757017135620f, 0.306180924177170f, 0.460905820131302f,
-  0.306534498929977f, 0.461054325103760f, 0.306888192892075f, 0.461202591657639f,
-  0.307241976261139f, 0.461350560188293f, 0.307595878839493f, 0.461498260498047f,
-  0.307949900627136f, 0.461645722389221f, 0.308304041624069f, 0.461792886257172f,
-  0.308658272027969f, 0.461939752101898f, 0.309012651443481f, 0.462086379528046f,
-  0.309367120265961f, 0.462232738733292f, 0.309721708297729f, 0.462378799915314f,
-  0.310076385736465f, 0.462524622678757f, 0.310431212186813f, 0.462670147418976f,
-  0.310786128044128f, 0.462815403938293f, 0.311141163110733f, 0.462960392236710f,
-  0.311496287584305f, 0.463105112314224f, 0.311851561069489f, 0.463249564170837f,
-  0.312206923961639f, 0.463393747806549f, 0.312562376260757f, 0.463537633419037f,
-  0.312917977571487f, 0.463681250810623f, 0.313273668289185f, 0.463824629783630f,
-  0.313629478216171f, 0.463967710733414f, 0.313985377550125f, 0.464110493659973f,
-  0.314341396093369f, 0.464253038167953f, 0.314697533845901f, 0.464395314455032f,
-  0.315053790807724f, 0.464537292718887f, 0.315410137176514f, 0.464679002761841f,
-  0.315766572952271f, 0.464820444583893f, 0.316123157739639f, 0.464961618185043f,
-  0.316479831933975f, 0.465102523565292f, 0.316836595535278f, 0.465243130922318f,
-  0.317193508148193f, 0.465383470058441f, 0.317550510168076f, 0.465523540973663f,
-  0.317907601594925f, 0.465663343667984f, 0.318264812231064f, 0.465802878141403f,
-  0.318622142076492f, 0.465942144393921f, 0.318979561328888f, 0.466081112623215f,
-  0.319337099790573f, 0.466219812631607f, 0.319694727659225f, 0.466358244419098f,
-  0.320052474737167f, 0.466496407985687f, 0.320410341024399f, 0.466634273529053f,
-  0.320768296718597f, 0.466771900653839f, 0.321126341819763f, 0.466909229755402f,
-  0.321484506130219f, 0.467046260833740f, 0.321842789649963f, 0.467183053493500f,
-  0.322201162576675f, 0.467319577932358f, 0.322559654712677f, 0.467455804347992f,
-  0.322918236255646f, 0.467591762542725f, 0.323276937007904f, 0.467727422714233f,
-  0.323635727167130f, 0.467862844467163f, 0.323994606733322f, 0.467997968196869f,
-  0.324353635311127f, 0.468132823705673f, 0.324712723493576f, 0.468267410993576f,
-  0.325071930885315f, 0.468401730060577f, 0.325431257486343f, 0.468535751104355f,
-  0.325790673494339f, 0.468669503927231f, 0.326150178909302f, 0.468802988529205f,
-  0.326509803533554f, 0.468936175107956f, 0.326869517564774f, 0.469069123268127f,
-  0.327229350805283f, 0.469201773405075f, 0.327589273452759f, 0.469334155321121f,
-  0.327949285507202f, 0.469466239213943f, 0.328309416770935f, 0.469598054885864f,
-  0.328669637441635f, 0.469729602336884f, 0.329029977321625f, 0.469860881567001f,
-  0.329390406608582f, 0.469991862773895f, 0.329750925302505f, 0.470122605562210f,
-  0.330111563205719f, 0.470253020524979f, 0.330472290515900f, 0.470383197069168f,
-  0.330833107233047f, 0.470513075590134f, 0.331194043159485f, 0.470642685890198f,
-  0.331555068492889f, 0.470772027969360f, 0.331916213035584f, 0.470901101827621f,
-  0.332277417182922f, 0.471029877662659f, 0.332638740539551f, 0.471158385276794f,
-  0.333000183105469f, 0.471286594867706f, 0.333361685276031f, 0.471414536237717f,
-  0.333723306655884f, 0.471542209386826f, 0.334085017442703f, 0.471669614315033f,
-  0.334446847438812f, 0.471796721220016f, 0.334808766841888f, 0.471923559904099f,
-  0.335170775651932f, 0.472050130367279f, 0.335532873868942f, 0.472176402807236f,
-  0.335895091295242f, 0.472302407026291f, 0.336257368326187f, 0.472428143024445f,
-  0.336619764566422f, 0.472553610801697f, 0.336982280015945f, 0.472678780555725f,
-  0.337344855070114f, 0.472803652286530f, 0.337707549333572f, 0.472928285598755f,
-  0.338070303201675f, 0.473052620887756f, 0.338433176279068f, 0.473176687955856f,
-  0.338796168565750f, 0.473300457000732f, 0.339159220457077f, 0.473423957824707f,
-  0.339522391557693f, 0.473547190427780f, 0.339885622262955f, 0.473670125007629f,
-  0.340248972177505f, 0.473792791366577f, 0.340612411499023f, 0.473915189504623f,
-  0.340975970029831f, 0.474037289619446f, 0.341339588165283f, 0.474159121513367f,
-  0.341703325510025f, 0.474280685186386f, 0.342067122459412f, 0.474401950836182f,
-  0.342431038618088f, 0.474522948265076f, 0.342795044183731f, 0.474643647670746f,
-  0.343159139156342f, 0.474764078855515f, 0.343523323535919f, 0.474884241819382f,
-  0.343887597322464f, 0.475004136562347f, 0.344251960515976f, 0.475123733282089f,
-  0.344616413116455f, 0.475243031978607f, 0.344980984926224f, 0.475362062454224f,
-  0.345345616340637f, 0.475480824708939f, 0.345710366964340f, 0.475599318742752f,
-  0.346075177192688f, 0.475717514753342f, 0.346440106630325f, 0.475835442543030f,
-  0.346805095672607f, 0.475953072309494f, 0.347170203924179f, 0.476070433855057f,
-  0.347535371780396f, 0.476187497377396f, 0.347900658845901f, 0.476304292678833f,
-  0.348266035318375f, 0.476420819759369f, 0.348631471395493f, 0.476537048816681f,
-  0.348997026681900f, 0.476653009653091f, 0.349362671375275f, 0.476768702268600f,
-  0.349728375673294f, 0.476884096860886f, 0.350094199180603f, 0.476999223232269f,
-  0.350460082292557f, 0.477114051580429f, 0.350826084613800f, 0.477228611707687f,
-  0.351192146539688f, 0.477342873811722f, 0.351558297872543f, 0.477456867694855f,
-  0.351924568414688f, 0.477570593357086f, 0.352290898561478f, 0.477684020996094f,
-  0.352657318115234f, 0.477797180414200f, 0.353023827075958f, 0.477910041809082f,
-  0.353390425443649f, 0.478022634983063f, 0.353757113218308f, 0.478134930133820f,
-  0.354123860597610f, 0.478246957063675f, 0.354490727186203f, 0.478358715772629f,
-  0.354857653379440f, 0.478470176458359f, 0.355224698781967f, 0.478581339120865f,
-  0.355591803789139f, 0.478692263364792f, 0.355958998203278f, 0.478802859783173f,
-  0.356326282024384f, 0.478913217782974f, 0.356693625450134f, 0.479023247957230f,
-  0.357061088085175f, 0.479133039712906f, 0.357428610324860f, 0.479242533445358f,
-  0.357796221971512f, 0.479351729154587f, 0.358163923025131f, 0.479460656642914f,
-  0.358531713485718f, 0.479569315910339f, 0.358899593353271f, 0.479677677154541f,
-  0.359267532825470f, 0.479785770177841f, 0.359635561704636f, 0.479893565177917f,
-  0.360003679990768f, 0.480001062154770f, 0.360371887683868f, 0.480108320713043f,
-  0.360740154981613f, 0.480215251445770f, 0.361108511686325f, 0.480321943759918f,
-  0.361476957798004f, 0.480428308248520f, 0.361845493316650f, 0.480534434318542f,
-  0.362214088439941f, 0.480640232563019f, 0.362582772970200f, 0.480745792388916f,
-  0.362951546907425f, 0.480851024389267f, 0.363320380449295f, 0.480956017971039f,
-  0.363689333200455f, 0.481060713529587f, 0.364058345556259f, 0.481165111064911f,
-  0.364427417516708f, 0.481269240379334f, 0.364796578884125f, 0.481373071670532f,
-  0.365165829658508f, 0.481476634740829f, 0.365535169839859f, 0.481579899787903f,
-  0.365904569625854f, 0.481682896614075f, 0.366274058818817f, 0.481785595417023f,
-  0.366643607616425f, 0.481888025999069f, 0.367013275623322f, 0.481990188360214f,
-  0.367382973432541f, 0.482092022895813f, 0.367752790451050f, 0.482193619012833f,
-  0.368122667074203f, 0.482294887304306f, 0.368492603302002f, 0.482395917177200f,
-  0.368862658739090f, 0.482496619224548f, 0.369232743978500f, 0.482597053050995f,
-  0.369602948427200f, 0.482697218656540f, 0.369973212480545f, 0.482797086238861f,
-  0.370343536138535f, 0.482896685600281f, 0.370713949203491f, 0.482995986938477f,
-  0.371084451675415f, 0.483094990253448f, 0.371455013751984f, 0.483193725347519f,
-  0.371825665235519f, 0.483292192220688f, 0.372196376323700f, 0.483390361070633f,
-  0.372567176818848f, 0.483488231897354f, 0.372938036918640f, 0.483585834503174f,
-  0.373308986425400f, 0.483683139085770f, 0.373679995536804f, 0.483780175447464f,
-  0.374051094055176f, 0.483876913785934f, 0.374422252178192f, 0.483973383903503f,
-  0.374793499708176f, 0.484069555997849f, 0.375164806842804f, 0.484165430068970f,
-  0.375536203384399f, 0.484261035919189f, 0.375907659530640f, 0.484356373548508f,
-  0.376279205083847f, 0.484451413154602f, 0.376650810241699f, 0.484546154737473f,
-  0.377022475004196f, 0.484640628099442f, 0.377394229173660f, 0.484734803438187f,
-  0.377766042947769f, 0.484828680753708f, 0.378137946128845f, 0.484922289848328f,
-  0.378509908914566f, 0.485015630722046f, 0.378881961107254f, 0.485108673572540f,
-  0.379254043102264f, 0.485201418399811f, 0.379626244306564f, 0.485293895006180f,
-  0.379998475313187f, 0.485386073589325f, 0.380370795726776f, 0.485477954149246f,
-  0.380743205547333f, 0.485569566488266f, 0.381115674972534f, 0.485660910606384f,
-  0.381488204002380f, 0.485751956701279f, 0.381860792636871f, 0.485842704772949f,
-  0.382233470678329f, 0.485933154821396f, 0.382606208324432f, 0.486023366451263f,
-  0.382979035377502f, 0.486113250255585f, 0.383351892232895f, 0.486202865839005f,
-  0.383724838495255f, 0.486292183399200f, 0.384097874164581f, 0.486381232738495f,
-  0.384470939636230f, 0.486469984054565f, 0.384844094514847f, 0.486558437347412f,
-  0.385217308998108f, 0.486646622419357f, 0.385590612888336f, 0.486734509468079f,
-  0.385963946580887f, 0.486822128295898f, 0.386337369680405f, 0.486909449100494f,
-  0.386710882186890f, 0.486996471881866f, 0.387084424495697f, 0.487083226442337f,
-  0.387458056211472f, 0.487169682979584f, 0.387831717729568f, 0.487255871295929f,
-  0.388205498456955f, 0.487341761589050f, 0.388579308986664f, 0.487427353858948f,
-  0.388953179121017f, 0.487512677907944f, 0.389327138662338f, 0.487597703933716f,
-  0.389701157808304f, 0.487682431936264f, 0.390075236558914f, 0.487766891717911f,
-  0.390449374914169f, 0.487851053476334f, 0.390823602676392f, 0.487934947013855f,
-  0.391197860240936f, 0.488018542528152f, 0.391572207212448f, 0.488101840019226f,
-  0.391946613788605f, 0.488184869289398f, 0.392321079969406f, 0.488267600536346f,
-  0.392695605754852f, 0.488350033760071f, 0.393070191144943f, 0.488432198762894f,
-  0.393444836139679f, 0.488514065742493f, 0.393819570541382f, 0.488595664501190f,
-  0.394194334745407f, 0.488676935434341f, 0.394569188356400f, 0.488757967948914f,
-  0.394944071769714f, 0.488838672637939f, 0.395319044589996f, 0.488919109106064f,
-  0.395694077014923f, 0.488999247550964f, 0.396069169044495f, 0.489079117774963f,
-  0.396444320678711f, 0.489158689975739f, 0.396819531917572f, 0.489237964153290f,
-  0.397194802761078f, 0.489316970109940f, 0.397570133209229f, 0.489395678043365f,
-  0.397945523262024f, 0.489474087953568f, 0.398320972919464f, 0.489552229642868f,
-  0.398696482181549f, 0.489630073308945f, 0.399072051048279f, 0.489707618951797f,
-  0.399447679519653f, 0.489784896373749f, 0.399823367595673f, 0.489861875772476f,
-  0.400199115276337f, 0.489938557147980f, 0.400574922561646f, 0.490014940500259f,
-  0.400950789451599f, 0.490091055631638f, 0.401326715946198f, 0.490166902542114f,
-  0.401702702045441f, 0.490242421627045f, 0.402078747749329f, 0.490317672491074f,
-  0.402454853057861f, 0.490392625331879f, 0.402830988168716f, 0.490467309951782f,
-  0.403207212686539f, 0.490541696548462f, 0.403583467006683f, 0.490615785121918f,
-  0.403959810733795f, 0.490689605474472f, 0.404336184263229f, 0.490763127803802f,
-  0.404712617397308f, 0.490836352109909f, 0.405089110136032f, 0.490909278392792f,
-  0.405465662479401f, 0.490981936454773f, 0.405842274427414f, 0.491054296493530f,
-  0.406218945980072f, 0.491126358509064f, 0.406595647335052f, 0.491198152303696f,
-  0.406972438097000f, 0.491269648075104f, 0.407349258661270f, 0.491340845823288f,
-  0.407726138830185f, 0.491411775350571f, 0.408103078603745f, 0.491482406854630f,
-  0.408480048179626f, 0.491552740335464f, 0.408857107162476f, 0.491622805595398f,
-  0.409234195947647f, 0.491692543029785f, 0.409611344337463f, 0.491762012243271f,
-  0.409988552331924f, 0.491831213235855f, 0.410365819931030f, 0.491900116205215f,
-  0.410743117332459f, 0.491968721151352f, 0.411120474338531f, 0.492037028074265f,
-  0.411497890949249f, 0.492105036973953f, 0.411875367164612f, 0.492172777652740f,
-  0.412252873182297f, 0.492240220308304f, 0.412630438804626f, 0.492307394742966f,
-  0.413008064031601f, 0.492374241352081f, 0.413385748863220f, 0.492440819740295f,
-  0.413763463497162f, 0.492507129907608f, 0.414141237735748f, 0.492573112249374f,
-  0.414519041776657f, 0.492638826370239f, 0.414896935224533f, 0.492704242467880f,
-  0.415274858474731f, 0.492769360542297f, 0.415652841329575f, 0.492834210395813f,
-  0.416030853986740f, 0.492898762226105f, 0.416408926248550f, 0.492963016033173f,
-  0.416787058115005f, 0.493026971817017f, 0.417165219783783f, 0.493090659379959f,
-  0.417543441057205f, 0.493154048919678f, 0.417921721935272f, 0.493217140436172f,
-  0.418300032615662f, 0.493279963731766f, 0.418678402900696f, 0.493342459201813f,
-  0.419056802988052f, 0.493404686450958f, 0.419435262680054f, 0.493466645479202f,
-  0.419813781976700f, 0.493528276681900f, 0.420192331075668f, 0.493589639663696f,
-  0.420570939779282f, 0.493650704622269f, 0.420949578285217f, 0.493711471557617f,
-  0.421328276395798f, 0.493771970272064f, 0.421707004308701f, 0.493832170963287f,
-  0.422085791826248f, 0.493892073631287f, 0.422464638948441f, 0.493951678276062f,
-  0.422843515872955f, 0.494011014699936f, 0.423222452402115f, 0.494070053100586f,
-  0.423601418733597f, 0.494128793478012f, 0.423980414867401f, 0.494187235832214f,
-  0.424359470605850f, 0.494245409965515f, 0.424738585948944f, 0.494303256273270f,
-  0.425117731094360f, 0.494360834360123f, 0.425496935844421f, 0.494418144226074f,
-  0.425876170396805f, 0.494475126266479f, 0.426255434751511f, 0.494531840085983f,
-  0.426634758710861f, 0.494588255882263f, 0.427014142274857f, 0.494644373655319f,
-  0.427393525838852f, 0.494700223207474f, 0.427772998809814f, 0.494755744934082f,
-  0.428152471780777f, 0.494810998439789f, 0.428532034158707f, 0.494865983724594f,
-  0.428911596536636f, 0.494920641183853f, 0.429291218519211f, 0.494975030422211f,
-  0.429670870304108f, 0.495029091835022f, 0.430050581693649f, 0.495082914829254f,
-  0.430430322885513f, 0.495136409997940f, 0.430810123682022f, 0.495189607143402f,
-  0.431189924478531f, 0.495242536067963f, 0.431569814682007f, 0.495295166969299f,
-  0.431949704885483f, 0.495347499847412f, 0.432329654693604f, 0.495399564504623f,
-  0.432709634304047f, 0.495451331138611f, 0.433089673519135f, 0.495502769947052f,
-  0.433469742536545f, 0.495553970336914f, 0.433849841356277f, 0.495604842901230f,
-  0.434229999780655f, 0.495655417442322f, 0.434610158205032f, 0.495705723762512f,
-  0.434990376234055f, 0.495755732059479f, 0.435370653867722f, 0.495805442333221f,
-  0.435750931501389f, 0.495854884386063f, 0.436131268739700f, 0.495903998613358f,
-  0.436511665582657f, 0.495952844619751f, 0.436892062425613f, 0.496001392602921f,
-  0.437272518873215f, 0.496049642562866f, 0.437653005123138f, 0.496097624301910f,
-  0.438033521175385f, 0.496145308017731f, 0.438414067029953f, 0.496192663908005f,
-  0.438794672489166f, 0.496239781379700f, 0.439175277948380f, 0.496286571025848f,
-  0.439555943012238f, 0.496333062648773f, 0.439936667680740f, 0.496379286050797f,
-  0.440317392349243f, 0.496425211429596f, 0.440698176622391f, 0.496470838785172f,
-  0.441078960895538f, 0.496516168117523f, 0.441459804773331f, 0.496561229228973f,
-  0.441840678453445f, 0.496605962514877f, 0.442221581935883f, 0.496650427579880f,
-  0.442602545022964f, 0.496694594621658f, 0.442983508110046f, 0.496738493442535f,
-  0.443364530801773f, 0.496782064437866f, 0.443745553493500f, 0.496825367212296f,
-  0.444126635789871f, 0.496868371963501f, 0.444507747888565f, 0.496911078691483f,
-  0.444888889789581f, 0.496953487396240f, 0.445270061492920f, 0.496995598077774f,
-  0.445651292800903f, 0.497037440538406f, 0.446032524108887f, 0.497078984975815f,
-  0.446413785219193f, 0.497120231389999f, 0.446795076131821f, 0.497161179780960f,
-  0.447176426649094f, 0.497201830148697f, 0.447557777166367f, 0.497242212295532f,
-  0.447939187288284f, 0.497282296419144f, 0.448320597410202f, 0.497322082519531f,
-  0.448702067136765f, 0.497361570596695f, 0.449083566665649f, 0.497400760650635f,
-  0.449465066194534f, 0.497439652681351f, 0.449846625328064f, 0.497478276491165f,
-  0.450228184461594f, 0.497516602277756f, 0.450609803199768f, 0.497554630041122f,
-  0.450991421937943f, 0.497592359781265f, 0.451373100280762f, 0.497629791498184f,
-  0.451754778623581f, 0.497666954994202f, 0.452136516571045f, 0.497703820466995f,
-  0.452518254518509f, 0.497740387916565f, 0.452900022268295f, 0.497776657342911f,
-  0.453281819820404f, 0.497812628746033f, 0.453663676977158f, 0.497848302125931f,
-  0.454045534133911f, 0.497883707284927f, 0.454427421092987f, 0.497918814420700f,
-  0.454809308052063f, 0.497953623533249f, 0.455191254615784f, 0.497988134622574f,
-  0.455573230981827f, 0.498022347688675f, 0.455955207347870f, 0.498056292533875f,
-  0.456337243318558f, 0.498089909553528f, 0.456719279289246f, 0.498123258352280f,
-  0.457101345062256f, 0.498156309127808f, 0.457483440637589f, 0.498189061880112f,
-  0.457865566015244f, 0.498221516609192f, 0.458247691392899f, 0.498253703117371f,
-  0.458629876375198f, 0.498285561800003f, 0.459012061357498f, 0.498317152261734f,
-  0.459394276142120f, 0.498348444700241f, 0.459776520729065f, 0.498379439115524f,
-  0.460158795118332f, 0.498410135507584f, 0.460541069507599f, 0.498440563678741f,
-  0.460923373699188f, 0.498470664024353f, 0.461305707693100f, 0.498500496149063f,
-  0.461688071489334f, 0.498530030250549f, 0.462070435285568f, 0.498559266328812f,
-  0.462452858686447f, 0.498588204383850f, 0.462835282087326f, 0.498616874217987f,
-  0.463217705488205f, 0.498645216226578f, 0.463600188493729f, 0.498673290014267f,
-  0.463982671499252f, 0.498701065778732f, 0.464365184307098f, 0.498728543519974f,
-  0.464747726917267f, 0.498755723237991f, 0.465130269527435f, 0.498782604932785f,
-  0.465512841939926f, 0.498809218406677f, 0.465895414352417f, 0.498835533857346f,
-  0.466278046369553f, 0.498861521482468f, 0.466660678386688f, 0.498887240886688f,
-  0.467043310403824f, 0.498912662267685f, 0.467426002025604f, 0.498937815427780f,
-  0.467808693647385f, 0.498962640762329f, 0.468191385269165f, 0.498987197875977f,
-  0.468574106693268f, 0.499011427164078f, 0.468956857919693f, 0.499035388231277f,
-  0.469339638948441f, 0.499059051275253f, 0.469722419977188f, 0.499082416296005f,
-  0.470105201005936f, 0.499105513095856f, 0.470488041639328f, 0.499128282070160f,
-  0.470870882272720f, 0.499150782823563f, 0.471253722906113f, 0.499172955751419f,
-  0.471636593341827f, 0.499194860458374f, 0.472019463777542f, 0.499216467142105f,
-  0.472402364015579f, 0.499237775802612f, 0.472785294055939f, 0.499258816242218f,
-  0.473168224096298f, 0.499279528856277f, 0.473551183938980f, 0.499299973249435f,
-  0.473934143781662f, 0.499320119619370f, 0.474317133426666f, 0.499339967966080f,
-  0.474700123071671f, 0.499359518289566f, 0.475083142518997f, 0.499378770589828f,
-  0.475466161966324f, 0.499397724866867f, 0.475849211215973f, 0.499416410923004f,
-  0.476232260465622f, 0.499434769153595f, 0.476615339517593f, 0.499452859163284f,
-  0.476998418569565f, 0.499470651149750f, 0.477381497621536f, 0.499488145112991f,
-  0.477764606475830f, 0.499505341053009f, 0.478147745132446f, 0.499522238969803f,
-  0.478530883789063f, 0.499538868665695f, 0.478914022445679f, 0.499555170536041f,
-  0.479297190904617f, 0.499571204185486f, 0.479680359363556f, 0.499586939811707f,
-  0.480063527822495f, 0.499602377414703f, 0.480446726083755f, 0.499617516994476f,
-  0.480829954147339f, 0.499632388353348f, 0.481213152408600f, 0.499646931886673f,
-  0.481596380472183f, 0.499661177396774f, 0.481979638338089f, 0.499675154685974f,
-  0.482362866401672f, 0.499688833951950f, 0.482746154069901f, 0.499702215194702f,
-  0.483129411935806f, 0.499715298414230f, 0.483512699604034f, 0.499728083610535f,
-  0.483895987272263f, 0.499740600585938f, 0.484279274940491f, 0.499752789735794f,
-  0.484662592411041f, 0.499764710664749f, 0.485045909881592f, 0.499776333570480f,
-  0.485429257154465f, 0.499787658452988f, 0.485812574625015f, 0.499798685312271f,
-  0.486195921897888f, 0.499809414148331f, 0.486579269170761f, 0.499819844961166f,
-  0.486962646245956f, 0.499830007553101f, 0.487346023321152f, 0.499839842319489f,
-  0.487729400396347f, 0.499849408864975f, 0.488112777471542f, 0.499858677387238f,
-  0.488496154546738f, 0.499867647886276f, 0.488879561424255f, 0.499876320362091f,
-  0.489262968301773f, 0.499884694814682f, 0.489646375179291f, 0.499892801046371f,
-  0.490029782056808f, 0.499900579452515f, 0.490413218736649f, 0.499908089637756f,
-  0.490796625614166f, 0.499915301799774f, 0.491180062294006f, 0.499922215938568f,
-  0.491563498973846f, 0.499928832054138f, 0.491946935653687f, 0.499935150146484f,
-  0.492330402135849f, 0.499941170215607f, 0.492713838815689f, 0.499946922063828f,
-  0.493097305297852f, 0.499952346086502f, 0.493480771780014f, 0.499957501888275f,
-  0.493864238262177f, 0.499962359666824f, 0.494247704744339f, 0.499966919422150f,
-  0.494631171226501f, 0.499971181154251f, 0.495014637708664f, 0.499975144863129f,
-  0.495398133993149f, 0.499978810548782f, 0.495781600475311f, 0.499982208013535f,
-  0.496165096759796f, 0.499985307455063f, 0.496548563241959f, 0.499988079071045f,
-  0.496932059526443f, 0.499990582466125f, 0.497315555810928f, 0.499992787837982f,
-  0.497699022293091f, 0.499994695186615f, 0.498082518577576f, 0.499996334314346f,
-  0.498466014862061f, 0.499997645616531f, 0.498849511146545f, 0.499998688697815f,
-  0.499233007431030f, 0.499999403953552f, 0.499616503715515f, 0.499999850988388f,
-};
-
-
-/**
-  @par
-  Generation of realCoefB array:
-  @par
-  n = 4096
-  <pre>for (i = 0; i < n; i++)
-  {
-     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }</pre>
- */
-
-const float32_t realCoefB[8192] = {
-  0.500000000000000f, 0.500000000000000f, 0.500383496284485f, 0.499999850988388f,
-  0.500766992568970f, 0.499999403953552f, 0.501150488853455f, 0.499998688697815f,
-  0.501533985137939f, 0.499997645616531f, 0.501917481422424f, 0.499996334314346f,
-  0.502300977706909f, 0.499994695186615f, 0.502684473991394f, 0.499992787837982f,
-  0.503067970275879f, 0.499990582466125f, 0.503451406955719f, 0.499988079071045f,
-  0.503834903240204f, 0.499985307455063f, 0.504218399524689f, 0.499982208013535f,
-  0.504601895809174f, 0.499978810548782f, 0.504985332489014f, 0.499975144863129f,
-  0.505368828773499f, 0.499971181154251f, 0.505752325057983f, 0.499966919422150f,
-  0.506135761737823f, 0.499962359666824f, 0.506519258022308f, 0.499957501888275f,
-  0.506902694702148f, 0.499952346086502f, 0.507286131381989f, 0.499946922063828f,
-  0.507669627666473f, 0.499941170215607f, 0.508053064346313f, 0.499935150146484f,
-  0.508436501026154f, 0.499928832054138f, 0.508819937705994f, 0.499922215938568f,
-  0.509203374385834f, 0.499915301799774f, 0.509586811065674f, 0.499908089637756f,
-  0.509970188140869f, 0.499900579452515f, 0.510353624820709f, 0.499892801046371f,
-  0.510737061500549f, 0.499884694814682f, 0.511120438575745f, 0.499876320362091f,
-  0.511503815650940f, 0.499867647886276f, 0.511887252330780f, 0.499858677387238f,
-  0.512270629405975f, 0.499849408864975f, 0.512654006481171f, 0.499839842319489f,
-  0.513037383556366f, 0.499830007553101f, 0.513420701026917f, 0.499819844961166f,
-  0.513804078102112f, 0.499809414148331f, 0.514187395572662f, 0.499798685312271f,
-  0.514570772647858f, 0.499787658452988f, 0.514954090118408f, 0.499776333570480f,
-  0.515337407588959f, 0.499764710664749f, 0.515720725059509f, 0.499752789735794f,
-  0.516103982925415f, 0.499740600585938f, 0.516487300395966f, 0.499728083610535f,
-  0.516870558261871f, 0.499715298414230f, 0.517253875732422f, 0.499702215194702f,
-  0.517637133598328f, 0.499688833951950f, 0.518020391464233f, 0.499675154685974f,
-  0.518403589725494f, 0.499661177396774f, 0.518786847591400f, 0.499646931886673f,
-  0.519170045852661f, 0.499632388353348f, 0.519553244113922f, 0.499617516994476f,
-  0.519936442375183f, 0.499602377414703f, 0.520319640636444f, 0.499586939811707f,
-  0.520702838897705f, 0.499571204185486f, 0.521085977554321f, 0.499555170536041f,
-  0.521469116210938f, 0.499538868665695f, 0.521852254867554f, 0.499522238969803f,
-  0.522235393524170f, 0.499505341053009f, 0.522618472576141f, 0.499488145112991f,
-  0.523001611232758f, 0.499470651149750f, 0.523384690284729f, 0.499452859163284f,
-  0.523767769336700f, 0.499434769153595f, 0.524150788784027f, 0.499416410923004f,
-  0.524533808231354f, 0.499397724866867f, 0.524916887283325f, 0.499378770589828f,
-  0.525299847126007f, 0.499359518289566f, 0.525682866573334f, 0.499339967966080f,
-  0.526065826416016f, 0.499320119619370f, 0.526448845863342f, 0.499299973249435f,
-  0.526831746101379f, 0.499279528856277f, 0.527214705944061f, 0.499258816242218f,
-  0.527597606182098f, 0.499237775802612f, 0.527980506420136f, 0.499216467142105f,
-  0.528363406658173f, 0.499194860458374f, 0.528746306896210f, 0.499172955751419f,
-  0.529129147529602f, 0.499150782823563f, 0.529511988162994f, 0.499128282070160f,
-  0.529894769191742f, 0.499105513095856f, 0.530277609825134f, 0.499082416296005f,
-  0.530660390853882f, 0.499059051275253f, 0.531043112277985f, 0.499035388231277f,
-  0.531425893306732f, 0.499011427164078f, 0.531808614730835f, 0.498987197875977f,
-  0.532191336154938f, 0.498962640762329f, 0.532573997974396f, 0.498937815427780f,
-  0.532956659793854f, 0.498912662267685f, 0.533339321613312f, 0.498887240886688f,
-  0.533721983432770f, 0.498861521482468f, 0.534104585647583f, 0.498835533857346f,
-  0.534487187862396f, 0.498809218406677f, 0.534869730472565f, 0.498782604932785f,
-  0.535252273082733f, 0.498755723237991f, 0.535634815692902f, 0.498728543519974f,
-  0.536017298698425f, 0.498701065778732f, 0.536399841308594f, 0.498673290014267f,
-  0.536782264709473f, 0.498645216226578f, 0.537164747714996f, 0.498616874217987f,
-  0.537547171115875f, 0.498588204383850f, 0.537929534912109f, 0.498559266328812f,
-  0.538311958312988f, 0.498530030250549f, 0.538694262504578f, 0.498500496149063f,
-  0.539076626300812f, 0.498470664024353f, 0.539458930492401f, 0.498440563678741f,
-  0.539841234683990f, 0.498410135507584f, 0.540223479270935f, 0.498379439115524f,
-  0.540605723857880f, 0.498348444700241f, 0.540987968444824f, 0.498317152261734f,
-  0.541370153427124f, 0.498285561800003f, 0.541752278804779f, 0.498253703117371f,
-  0.542134463787079f, 0.498221516609192f, 0.542516589164734f, 0.498189061880112f,
-  0.542898654937744f, 0.498156309127808f, 0.543280720710754f, 0.498123258352280f,
-  0.543662786483765f, 0.498089909553528f, 0.544044792652130f, 0.498056292533875f,
-  0.544426798820496f, 0.498022347688675f, 0.544808745384216f, 0.497988134622574f,
-  0.545190691947937f, 0.497953623533249f, 0.545572578907013f, 0.497918814420700f,
-  0.545954465866089f, 0.497883707284927f, 0.546336352825165f, 0.497848302125931f,
-  0.546718180179596f, 0.497812628746033f, 0.547099947929382f, 0.497776657342911f,
-  0.547481775283813f, 0.497740387916565f, 0.547863483428955f, 0.497703820466995f,
-  0.548245191574097f, 0.497666954994202f, 0.548626899719238f, 0.497629791498184f,
-  0.549008548259735f, 0.497592359781265f, 0.549390196800232f, 0.497554630041122f,
-  0.549771785736084f, 0.497516602277756f, 0.550153374671936f, 0.497478276491165f,
-  0.550534904003143f, 0.497439652681351f, 0.550916433334351f, 0.497400760650635f,
-  0.551297962665558f, 0.497361570596695f, 0.551679372787476f, 0.497322082519531f,
-  0.552060842514038f, 0.497282296419144f, 0.552442193031311f, 0.497242212295532f,
-  0.552823603153229f, 0.497201830148697f, 0.553204894065857f, 0.497161179780960f,
-  0.553586184978485f, 0.497120231389999f, 0.553967475891113f, 0.497078984975815f,
-  0.554348707199097f, 0.497037440538406f, 0.554729938507080f, 0.496995598077774f,
-  0.555111110210419f, 0.496953487396240f, 0.555492222309113f, 0.496911078691483f,
-  0.555873334407806f, 0.496868371963501f, 0.556254446506500f, 0.496825367212296f,
-  0.556635499000549f, 0.496782064437866f, 0.557016491889954f, 0.496738493442535f,
-  0.557397484779358f, 0.496694594621658f, 0.557778418064117f, 0.496650427579880f,
-  0.558159291744232f, 0.496605962514877f, 0.558540165424347f, 0.496561229228973f,
-  0.558921039104462f, 0.496516168117523f, 0.559301853179932f, 0.496470838785172f,
-  0.559682607650757f, 0.496425211429596f, 0.560063362121582f, 0.496379286050797f,
-  0.560444056987762f, 0.496333062648773f, 0.560824692249298f, 0.496286571025848f,
-  0.561205327510834f, 0.496239781379700f, 0.561585903167725f, 0.496192663908005f,
-  0.561966478824615f, 0.496145308017731f, 0.562346994876862f, 0.496097624301910f,
-  0.562727510929108f, 0.496049642562866f, 0.563107967376709f, 0.496001392602921f,
-  0.563488364219666f, 0.495952844619751f, 0.563868701457977f, 0.495903998613358f,
-  0.564249038696289f, 0.495854884386063f, 0.564629375934601f, 0.495805442333221f,
-  0.565009593963623f, 0.495755732059479f, 0.565389811992645f, 0.495705723762512f,
-  0.565770030021667f, 0.495655417442322f, 0.566150128841400f, 0.495604842901230f,
-  0.566530287265778f, 0.495553970336914f, 0.566910326480865f, 0.495502769947052f,
-  0.567290365695953f, 0.495451331138611f, 0.567670345306396f, 0.495399564504623f,
-  0.568050265312195f, 0.495347499847412f, 0.568430185317993f, 0.495295166969299f,
-  0.568810045719147f, 0.495242536067963f, 0.569189906120300f, 0.495189607143402f,
-  0.569569647312164f, 0.495136409997940f, 0.569949388504028f, 0.495082914829254f,
-  0.570329129695892f, 0.495029091835022f, 0.570708811283112f, 0.494975030422211f,
-  0.571088373661041f, 0.494920641183853f, 0.571467995643616f, 0.494865983724594f,
-  0.571847498416901f, 0.494810998439789f, 0.572227001190186f, 0.494755744934082f,
-  0.572606444358826f, 0.494700223207474f, 0.572985887527466f, 0.494644373655319f,
-  0.573365211486816f, 0.494588255882263f, 0.573744535446167f, 0.494531840085983f,
-  0.574123859405518f, 0.494475126266479f, 0.574503064155579f, 0.494418144226074f,
-  0.574882268905640f, 0.494360834360123f, 0.575261414051056f, 0.494303256273270f,
-  0.575640499591827f, 0.494245409965515f, 0.576019585132599f, 0.494187235832214f,
-  0.576398611068726f, 0.494128793478012f, 0.576777577400208f, 0.494070053100586f,
-  0.577156484127045f, 0.494011014699936f, 0.577535390853882f, 0.493951678276062f,
-  0.577914178371429f, 0.493892073631287f, 0.578292965888977f, 0.493832170963287f,
-  0.578671753406525f, 0.493771970272064f, 0.579050421714783f, 0.493711471557617f,
-  0.579429090023041f, 0.493650704622269f, 0.579807698726654f, 0.493589639663696f,
-  0.580186247825623f, 0.493528276681900f, 0.580564737319946f, 0.493466645479202f,
-  0.580943167209625f, 0.493404686450958f, 0.581321597099304f, 0.493342459201813f,
-  0.581699967384338f, 0.493279963731766f, 0.582078278064728f, 0.493217140436172f,
-  0.582456588745117f, 0.493154048919678f, 0.582834780216217f, 0.493090659379959f,
-  0.583212971687317f, 0.493026971817017f, 0.583591103553772f, 0.492963016033173f,
-  0.583969175815582f, 0.492898762226105f, 0.584347188472748f, 0.492834210395813f,
-  0.584725141525269f, 0.492769360542297f, 0.585103094577789f, 0.492704242467880f,
-  0.585480928421021f, 0.492638826370239f, 0.585858762264252f, 0.492573112249374f,
-  0.586236536502838f, 0.492507129907608f, 0.586614251136780f, 0.492440819740295f,
-  0.586991965770721f, 0.492374241352081f, 0.587369561195374f, 0.492307394742966f,
-  0.587747097015381f, 0.492240220308304f, 0.588124632835388f, 0.492172777652740f,
-  0.588502109050751f, 0.492105036973953f, 0.588879525661469f, 0.492037028074265f,
-  0.589256882667542f, 0.491968721151352f, 0.589634180068970f, 0.491900116205215f,
-  0.590011477470398f, 0.491831213235855f, 0.590388655662537f, 0.491762012243271f,
-  0.590765833854675f, 0.491692543029785f, 0.591142892837524f, 0.491622805595398f,
-  0.591519951820374f, 0.491552740335464f, 0.591896951198578f, 0.491482406854630f,
-  0.592273890972137f, 0.491411775350571f, 0.592650771141052f, 0.491340845823288f,
-  0.593027591705322f, 0.491269648075104f, 0.593404352664948f, 0.491198152303696f,
-  0.593781054019928f, 0.491126358509064f, 0.594157755374908f, 0.491054296493530f,
-  0.594534337520599f, 0.490981936454773f, 0.594910860061646f, 0.490909278392792f,
-  0.595287382602692f, 0.490836352109909f, 0.595663845539093f, 0.490763127803802f,
-  0.596040189266205f, 0.490689605474472f, 0.596416532993317f, 0.490615785121918f,
-  0.596792817115784f, 0.490541696548462f, 0.597168982028961f, 0.490467309951782f,
-  0.597545146942139f, 0.490392625331879f, 0.597921252250671f, 0.490317672491074f,
-  0.598297297954559f, 0.490242421627045f, 0.598673284053802f, 0.490166902542114f,
-  0.599049210548401f, 0.490091055631638f, 0.599425077438354f, 0.490014940500259f,
-  0.599800884723663f, 0.489938557147980f, 0.600176632404327f, 0.489861875772476f,
-  0.600552320480347f, 0.489784896373749f, 0.600927948951721f, 0.489707618951797f,
-  0.601303517818451f, 0.489630073308945f, 0.601679027080536f, 0.489552229642868f,
-  0.602054476737976f, 0.489474087953568f, 0.602429866790771f, 0.489395678043365f,
-  0.602805197238922f, 0.489316970109940f, 0.603180468082428f, 0.489237964153290f,
-  0.603555679321289f, 0.489158689975739f, 0.603930830955505f, 0.489079117774963f,
-  0.604305922985077f, 0.488999247550964f, 0.604680955410004f, 0.488919109106064f,
-  0.605055928230286f, 0.488838672637939f, 0.605430841445923f, 0.488757967948914f,
-  0.605805635452271f, 0.488676935434341f, 0.606180429458618f, 0.488595664501190f,
-  0.606555163860321f, 0.488514065742493f, 0.606929838657379f, 0.488432198762894f,
-  0.607304394245148f, 0.488350033760071f, 0.607678949832916f, 0.488267600536346f,
-  0.608053386211395f, 0.488184869289398f, 0.608427822589874f, 0.488101840019226f,
-  0.608802139759064f, 0.488018542528152f, 0.609176397323608f, 0.487934947013855f,
-  0.609550595283508f, 0.487851053476334f, 0.609924793243408f, 0.487766891717911f,
-  0.610298871994019f, 0.487682431936264f, 0.610672831535339f, 0.487597703933716f,
-  0.611046791076660f, 0.487512677907944f, 0.611420691013336f, 0.487427353858948f,
-  0.611794531345367f, 0.487341761589050f, 0.612168252468109f, 0.487255871295929f,
-  0.612541973590851f, 0.487169682979584f, 0.612915575504303f, 0.487083226442337f,
-  0.613289117813110f, 0.486996471881866f, 0.613662600517273f, 0.486909449100494f,
-  0.614036023616791f, 0.486822128295898f, 0.614409387111664f, 0.486734509468079f,
-  0.614782691001892f, 0.486646622419357f, 0.615155875682831f, 0.486558437347412f,
-  0.615529060363770f, 0.486469984054565f, 0.615902125835419f, 0.486381232738495f,
-  0.616275131702423f, 0.486292183399200f, 0.616648077964783f, 0.486202865839005f,
-  0.617020964622498f, 0.486113250255585f, 0.617393791675568f, 0.486023366451263f,
-  0.617766559123993f, 0.485933154821396f, 0.618139207363129f, 0.485842704772949f,
-  0.618511795997620f, 0.485751956701279f, 0.618884325027466f, 0.485660910606384f,
-  0.619256794452667f, 0.485569566488266f, 0.619629204273224f, 0.485477954149246f,
-  0.620001494884491f, 0.485386073589325f, 0.620373785495758f, 0.485293895006180f,
-  0.620745956897736f, 0.485201418399811f, 0.621118068695068f, 0.485108673572540f,
-  0.621490061283112f, 0.485015630722046f, 0.621862053871155f, 0.484922289848328f,
-  0.622233927249908f, 0.484828680753708f, 0.622605800628662f, 0.484734803438187f,
-  0.622977554798126f, 0.484640628099442f, 0.623349189758301f, 0.484546154737473f,
-  0.623720824718475f, 0.484451413154602f, 0.624092340469360f, 0.484356373548508f,
-  0.624463796615601f, 0.484261035919189f, 0.624835193157196f, 0.484165430068970f,
-  0.625206530094147f, 0.484069555997849f, 0.625577747821808f, 0.483973383903503f,
-  0.625948905944824f, 0.483876913785934f, 0.626320004463196f, 0.483780175447464f,
-  0.626691043376923f, 0.483683139085770f, 0.627061963081360f, 0.483585834503174f,
-  0.627432823181152f, 0.483488231897354f, 0.627803623676300f, 0.483390361070633f,
-  0.628174364566803f, 0.483292192220688f, 0.628544986248016f, 0.483193725347519f,
-  0.628915548324585f, 0.483094990253448f, 0.629286050796509f, 0.482995986938477f,
-  0.629656434059143f, 0.482896685600281f, 0.630026817321777f, 0.482797086238861f,
-  0.630397081375122f, 0.482697218656540f, 0.630767226219177f, 0.482597053050995f,
-  0.631137371063232f, 0.482496619224548f, 0.631507396697998f, 0.482395917177200f,
-  0.631877362728119f, 0.482294887304306f, 0.632247209548950f, 0.482193619012833f,
-  0.632616996765137f, 0.482092022895813f, 0.632986724376678f, 0.481990188360214f,
-  0.633356392383575f, 0.481888025999069f, 0.633725941181183f, 0.481785595417023f,
-  0.634095430374146f, 0.481682896614075f, 0.634464859962463f, 0.481579899787903f,
-  0.634834170341492f, 0.481476634740829f, 0.635203421115875f, 0.481373071670532f,
-  0.635572552680969f, 0.481269240379334f, 0.635941684246063f, 0.481165111064911f,
-  0.636310696601868f, 0.481060713529587f, 0.636679589748383f, 0.480956017971039f,
-  0.637048482894897f, 0.480851024389267f, 0.637417197227478f, 0.480745792388916f,
-  0.637785911560059f, 0.480640232563019f, 0.638154506683350f, 0.480534434318542f,
-  0.638523042201996f, 0.480428308248520f, 0.638891458511353f, 0.480321943759918f,
-  0.639259815216064f, 0.480215251445770f, 0.639628112316132f, 0.480108320713043f,
-  0.639996349811554f, 0.480001062154770f, 0.640364408493042f, 0.479893565177917f,
-  0.640732467174530f, 0.479785770177841f, 0.641100406646729f, 0.479677677154541f,
-  0.641468286514282f, 0.479569315910339f, 0.641836047172546f, 0.479460656642914f,
-  0.642203748226166f, 0.479351729154587f, 0.642571389675140f, 0.479242533445358f,
-  0.642938911914825f, 0.479133039712906f, 0.643306374549866f, 0.479023247957230f,
-  0.643673717975616f, 0.478913217782974f, 0.644041001796722f, 0.478802859783173f,
-  0.644408226013184f, 0.478692263364792f, 0.644775331020355f, 0.478581339120865f,
-  0.645142316818237f, 0.478470176458359f, 0.645509302616119f, 0.478358715772629f,
-  0.645876109600067f, 0.478246957063675f, 0.646242916584015f, 0.478134930133820f,
-  0.646609604358673f, 0.478022634983063f, 0.646976172924042f, 0.477910041809082f,
-  0.647342681884766f, 0.477797180414200f, 0.647709131240845f, 0.477684020996094f,
-  0.648075461387634f, 0.477570593357086f, 0.648441672325134f, 0.477456867694855f,
-  0.648807883262634f, 0.477342873811722f, 0.649173915386200f, 0.477228611707687f,
-  0.649539887905121f, 0.477114051580429f, 0.649905800819397f, 0.476999223232269f,
-  0.650271594524384f, 0.476884096860886f, 0.650637328624725f, 0.476768702268600f,
-  0.651003003120422f, 0.476653009653091f, 0.651368498802185f, 0.476537048816681f,
-  0.651733994483948f, 0.476420819759369f, 0.652099311351776f, 0.476304292678833f,
-  0.652464628219604f, 0.476187497377396f, 0.652829825878143f, 0.476070433855057f,
-  0.653194904327393f, 0.475953072309494f, 0.653559923171997f, 0.475835442543030f,
-  0.653924822807312f, 0.475717514753342f, 0.654289662837982f, 0.475599318742752f,
-  0.654654383659363f, 0.475480824708939f, 0.655019044876099f, 0.475362062454224f,
-  0.655383586883545f, 0.475243031978607f, 0.655748009681702f, 0.475123733282089f,
-  0.656112432479858f, 0.475004136562347f, 0.656476676464081f, 0.474884241819382f,
-  0.656840860843658f, 0.474764078855515f, 0.657204985618591f, 0.474643647670746f,
-  0.657568991184235f, 0.474522948265076f, 0.657932877540588f, 0.474401950836182f,
-  0.658296704292297f, 0.474280685186386f, 0.658660411834717f, 0.474159121513367f,
-  0.659024059772491f, 0.474037289619446f, 0.659387588500977f, 0.473915189504623f,
-  0.659750998020172f, 0.473792791366577f, 0.660114347934723f, 0.473670125007629f,
-  0.660477638244629f, 0.473547190427780f, 0.660840749740601f, 0.473423957824707f,
-  0.661203861236572f, 0.473300457000732f, 0.661566793918610f, 0.473176687955856f,
-  0.661929666996002f, 0.473052620887756f, 0.662292480468750f, 0.472928285598755f,
-  0.662655174732208f, 0.472803652286530f, 0.663017749786377f, 0.472678780555725f,
-  0.663380205631256f, 0.472553610801697f, 0.663742601871490f, 0.472428143024445f,
-  0.664104938507080f, 0.472302407026291f, 0.664467096328735f, 0.472176402807236f,
-  0.664829254150391f, 0.472050130367279f, 0.665191233158112f, 0.471923559904099f,
-  0.665553152561188f, 0.471796721220016f, 0.665914952754974f, 0.471669614315033f,
-  0.666276693344116f, 0.471542209386826f, 0.666638314723969f, 0.471414536237717f,
-  0.666999816894531f, 0.471286594867706f, 0.667361259460449f, 0.471158385276794f,
-  0.667722582817078f, 0.471029877662659f, 0.668083786964417f, 0.470901101827621f,
-  0.668444931507111f, 0.470772027969360f, 0.668805956840515f, 0.470642685890198f,
-  0.669166862964630f, 0.470513075590134f, 0.669527709484100f, 0.470383197069168f,
-  0.669888436794281f, 0.470253020524979f, 0.670249044895172f, 0.470122605562210f,
-  0.670609593391418f, 0.469991862773895f, 0.670970022678375f, 0.469860881567001f,
-  0.671330332756042f, 0.469729602336884f, 0.671690583229065f, 0.469598054885864f,
-  0.672050714492798f, 0.469466239213943f, 0.672410726547241f, 0.469334155321121f,
-  0.672770678997040f, 0.469201773405075f, 0.673130512237549f, 0.469069123268127f,
-  0.673490226268768f, 0.468936175107956f, 0.673849821090698f, 0.468802988529205f,
-  0.674209356307983f, 0.468669503927231f, 0.674568772315979f, 0.468535751104355f,
-  0.674928069114685f, 0.468401730060577f, 0.675287246704102f, 0.468267410993576f,
-  0.675646364688873f, 0.468132823705673f, 0.676005363464355f, 0.467997968196869f,
-  0.676364302635193f, 0.467862844467163f, 0.676723062992096f, 0.467727422714233f,
-  0.677081763744354f, 0.467591762542725f, 0.677440345287323f, 0.467455804347992f,
-  0.677798807621002f, 0.467319577932358f, 0.678157210350037f, 0.467183053493500f,
-  0.678515493869781f, 0.467046260833740f, 0.678873658180237f, 0.466909229755402f,
-  0.679231703281403f, 0.466771900653839f, 0.679589688777924f, 0.466634273529053f,
-  0.679947495460510f, 0.466496407985687f, 0.680305242538452f, 0.466358244419098f,
-  0.680662930011749f, 0.466219812631607f, 0.681020438671112f, 0.466081112623215f,
-  0.681377887725830f, 0.465942144393921f, 0.681735157966614f, 0.465802878141403f,
-  0.682092368602753f, 0.465663343667984f, 0.682449519634247f, 0.465523540973663f,
-  0.682806491851807f, 0.465383470058441f, 0.683163404464722f, 0.465243130922318f,
-  0.683520197868347f, 0.465102523565292f, 0.683876872062683f, 0.464961618185043f,
-  0.684233427047729f, 0.464820444583893f, 0.684589862823486f, 0.464679002761841f,
-  0.684946238994598f, 0.464537292718887f, 0.685302436351776f, 0.464395314455032f,
-  0.685658574104309f, 0.464253038167953f, 0.686014592647552f, 0.464110493659973f,
-  0.686370551586151f, 0.463967710733414f, 0.686726331710815f, 0.463824629783630f,
-  0.687082052230835f, 0.463681250810623f, 0.687437593936920f, 0.463537633419037f,
-  0.687793076038361f, 0.463393747806549f, 0.688148438930511f, 0.463249564170837f,
-  0.688503682613373f, 0.463105112314224f, 0.688858866691589f, 0.462960392236710f,
-  0.689213871955872f, 0.462815403938293f, 0.689568817615509f, 0.462670147418976f,
-  0.689923584461212f, 0.462524622678757f, 0.690278291702271f, 0.462378799915314f,
-  0.690632879734039f, 0.462232738733292f, 0.690987348556519f, 0.462086379528046f,
-  0.691341698169708f, 0.461939752101898f, 0.691695988178253f, 0.461792886257172f,
-  0.692050099372864f, 0.461645722389221f, 0.692404091358185f, 0.461498260498047f,
-  0.692758023738861f, 0.461350560188293f, 0.693111836910248f, 0.461202591657639f,
-  0.693465530872345f, 0.461054325103760f, 0.693819046020508f, 0.460905820131302f,
-  0.694172501564026f, 0.460757017135620f, 0.694525837898254f, 0.460607945919037f,
-  0.694879114627838f, 0.460458606481552f, 0.695232212543488f, 0.460309028625488f,
-  0.695585191249847f, 0.460159152746201f, 0.695938050746918f, 0.460008978843689f,
-  0.696290850639343f, 0.459858566522598f, 0.696643471717834f, 0.459707885980606f,
-  0.696996033191681f, 0.459556937217712f, 0.697348415851593f, 0.459405690431595f,
-  0.697700738906860f, 0.459254205226898f, 0.698052942752838f, 0.459102421998978f,
-  0.698404967784882f, 0.458950400352478f, 0.698756933212280f, 0.458798080682755f,
-  0.699108779430389f, 0.458645492792130f, 0.699460506439209f, 0.458492636680603f,
-  0.699812114238739f, 0.458339542150497f, 0.700163602828979f, 0.458186149597168f,
-  0.700514972209930f, 0.458032488822937f, 0.700866222381592f, 0.457878559827805f,
-  0.701217353343964f, 0.457724362611771f, 0.701568365097046f, 0.457569897174835f,
-  0.701919257640839f, 0.457415163516998f, 0.702270030975342f, 0.457260161638260f,
-  0.702620685100555f, 0.457104891538620f, 0.702971220016479f, 0.456949323415756f,
-  0.703321635723114f, 0.456793516874313f, 0.703671932220459f, 0.456637442111969f,
-  0.704022109508514f, 0.456481099128723f, 0.704372167587280f, 0.456324487924576f,
-  0.704722046852112f, 0.456167578697205f, 0.705071866512299f, 0.456010431051254f,
-  0.705421566963196f, 0.455853015184402f, 0.705771148204803f, 0.455695331096649f,
-  0.706120610237122f, 0.455537378787994f, 0.706469953060150f, 0.455379128456116f,
-  0.706819176673889f, 0.455220639705658f, 0.707168221473694f, 0.455061882734299f,
-  0.707517206668854f, 0.454902857542038f, 0.707866072654724f, 0.454743564128876f,
-  0.708214759826660f, 0.454584002494812f, 0.708563387393951f, 0.454424172639847f,
-  0.708911836147308f, 0.454264044761658f, 0.709260225296021f, 0.454103678464890f,
-  0.709608435630798f, 0.453943043947220f, 0.709956526756287f, 0.453782171010971f,
-  0.710304558277130f, 0.453621000051498f, 0.710652410984039f, 0.453459560871124f,
-  0.711000144481659f, 0.453297853469849f, 0.711347758769989f, 0.453135877847672f,
-  0.711695253849030f, 0.452973634004593f, 0.712042629718781f, 0.452811151742935f,
-  0.712389826774597f, 0.452648371458054f, 0.712736964225769f, 0.452485352754593f,
-  0.713083922863007f, 0.452322036027908f, 0.713430821895599f, 0.452158480882645f,
-  0.713777542114258f, 0.451994657516479f, 0.714124143123627f, 0.451830536127090f,
-  0.714470624923706f, 0.451666176319122f, 0.714816987514496f, 0.451501548290253f,
-  0.715163230895996f, 0.451336652040482f, 0.715509355068207f, 0.451171487569809f,
-  0.715855300426483f, 0.451006084680557f, 0.716201186180115f, 0.450840383768082f,
-  0.716546893119812f, 0.450674414634705f, 0.716892480850220f, 0.450508207082748f,
-  0.717238008975983f, 0.450341701507568f, 0.717583298683167f, 0.450174957513809f,
-  0.717928528785706f, 0.450007945299149f, 0.718273639678955f, 0.449840664863586f,
-  0.718618571758270f, 0.449673116207123f, 0.718963444232941f, 0.449505299329758f,
-  0.719308137893677f, 0.449337244033813f, 0.719652712345123f, 0.449168890714645f,
-  0.719997107982636f, 0.449000298976898f, 0.720341444015503f, 0.448831409215927f,
-  0.720685660839081f, 0.448662281036377f, 0.721029698848724f, 0.448492884635925f,
-  0.721373617649078f, 0.448323249816895f, 0.721717417240143f, 0.448153316974640f,
-  0.722061097621918f, 0.447983115911484f, 0.722404599189758f, 0.447812676429749f,
-  0.722747981548309f, 0.447641968727112f, 0.723091304302216f, 0.447470992803574f,
-  0.723434448242188f, 0.447299748659134f, 0.723777413368225f, 0.447128236293793f,
-  0.724120318889618f, 0.446956485509872f, 0.724463045597076f, 0.446784436702728f,
-  0.724805653095245f, 0.446612149477005f, 0.725148141384125f, 0.446439594030380f,
-  0.725490510463715f, 0.446266770362854f, 0.725832700729370f, 0.446093708276749f,
-  0.726174771785736f, 0.445920348167419f, 0.726516723632813f, 0.445746749639511f,
-  0.726858556270599f, 0.445572882890701f, 0.727200269699097f, 0.445398747920990f,
-  0.727541804313660f, 0.445224374532700f, 0.727883219718933f, 0.445049703121185f,
-  0.728224515914917f, 0.444874793291092f, 0.728565633296967f, 0.444699615240097f,
-  0.728906631469727f, 0.444524168968201f, 0.729247510433197f, 0.444348484277725f,
-  0.729588270187378f, 0.444172531366348f, 0.729928910732269f, 0.443996280431747f,
-  0.730269372463226f, 0.443819820880890f, 0.730609714984894f, 0.443643063306808f,
-  0.730949878692627f, 0.443466067314148f, 0.731289982795715f, 0.443288803100586f,
-  0.731629908084869f, 0.443111270666122f, 0.731969714164734f, 0.442933470010757f,
-  0.732309341430664f, 0.442755430936813f, 0.732648849487305f, 0.442577123641968f,
-  0.732988238334656f, 0.442398548126221f, 0.733327507972717f, 0.442219734191895f,
-  0.733666598796844f, 0.442040622234344f, 0.734005570411682f, 0.441861271858215f,
-  0.734344422817230f, 0.441681683063507f, 0.734683096408844f, 0.441501796245575f,
-  0.735021650791168f, 0.441321671009064f, 0.735360085964203f, 0.441141277551651f,
-  0.735698342323303f, 0.440960645675659f, 0.736036539077759f, 0.440779715776443f,
-  0.736374497413635f, 0.440598547458649f, 0.736712396144867f, 0.440417140722275f,
-  0.737050116062164f, 0.440235435962677f, 0.737387716770172f, 0.440053492784500f,
-  0.737725138664246f, 0.439871311187744f, 0.738062441349030f, 0.439688831567764f,
-  0.738399624824524f, 0.439506113529205f, 0.738736629486084f, 0.439323127269745f,
-  0.739073514938354f, 0.439139902591705f, 0.739410281181335f, 0.438956409692764f,
-  0.739746868610382f, 0.438772648572922f, 0.740083336830139f, 0.438588619232178f,
-  0.740419685840607f, 0.438404351472855f, 0.740755856037140f, 0.438219845294952f,
-  0.741091907024384f, 0.438035041093826f, 0.741427779197693f, 0.437849998474121f,
-  0.741763532161713f, 0.437664687633514f, 0.742099165916443f, 0.437479138374329f,
-  0.742434620857239f, 0.437293320894241f, 0.742769956588745f, 0.437107264995575f,
-  0.743105113506317f, 0.436920911073685f, 0.743440151214600f, 0.436734348535538f,
-  0.743775069713593f, 0.436547487974167f, 0.744109809398651f, 0.436360388994217f,
-  0.744444429874420f, 0.436173021793365f, 0.744778931140900f, 0.435985416173935f,
-  0.745113253593445f, 0.435797542333603f, 0.745447397232056f, 0.435609430074692f,
-  0.745781481266022f, 0.435421019792557f, 0.746115326881409f, 0.435232400894165f,
-  0.746449112892151f, 0.435043483972549f, 0.746782720088959f, 0.434854328632355f,
-  0.747116148471832f, 0.434664934873581f, 0.747449457645416f, 0.434475272893906f,
-  0.747782647609711f, 0.434285342693329f, 0.748115658760071f, 0.434095174074173f,
-  0.748448550701141f, 0.433904737234116f, 0.748781263828278f, 0.433714061975479f,
-  0.749113857746124f, 0.433523118495941f, 0.749446272850037f, 0.433331936597824f,
-  0.749778568744659f, 0.433140486478806f, 0.750110685825348f, 0.432948768138886f,
-  0.750442683696747f, 0.432756811380386f, 0.750774562358856f, 0.432564586400986f,
-  0.751106262207031f, 0.432372123003006f, 0.751437783241272f, 0.432179391384125f,
-  0.751769185066223f, 0.431986421346664f, 0.752100467681885f, 0.431793183088303f,
-  0.752431571483612f, 0.431599706411362f, 0.752762496471405f, 0.431405961513519f,
-  0.753093302249908f, 0.431211978197098f, 0.753423988819122f, 0.431017726659775f,
-  0.753754496574402f, 0.430823236703873f, 0.754084885120392f, 0.430628478527069f,
-  0.754415094852448f, 0.430433481931686f, 0.754745125770569f, 0.430238217115402f,
-  0.755075037479401f, 0.430042684078217f, 0.755404829978943f, 0.429846942424774f,
-  0.755734443664551f, 0.429650902748108f, 0.756063878536224f, 0.429454624652863f,
-  0.756393194198608f, 0.429258108139038f, 0.756722390651703f, 0.429061323404312f,
-  0.757051348686218f, 0.428864300251007f, 0.757380247116089f, 0.428667008876801f,
-  0.757708966732025f, 0.428469479084015f, 0.758037507534027f, 0.428271710872650f,
-  0.758365929126740f, 0.428073674440384f, 0.758694171905518f, 0.427875369787216f,
-  0.759022235870361f, 0.427676826715469f, 0.759350180625916f, 0.427478045225143f,
-  0.759678006172180f, 0.427278995513916f, 0.760005652904511f, 0.427079707384110f,
-  0.760333120822906f, 0.426880151033401f, 0.760660469532013f, 0.426680356264114f,
-  0.760987639427185f, 0.426480293273926f, 0.761314690113068f, 0.426279991865158f,
-  0.761641561985016f, 0.426079452037811f, 0.761968255043030f, 0.425878643989563f,
-  0.762294828891754f, 0.425677597522736f, 0.762621283531189f, 0.425476282835007f,
-  0.762947499752045f, 0.425274729728699f, 0.763273596763611f, 0.425072938203812f,
-  0.763599574565887f, 0.424870878458023f, 0.763925373554230f, 0.424668580293655f,
-  0.764250993728638f, 0.424466013908386f, 0.764576494693756f, 0.424263238906860f,
-  0.764901816844940f, 0.424060165882111f, 0.765226960182190f, 0.423856884241104f,
-  0.765551984310150f, 0.423653304576874f, 0.765876889228821f, 0.423449516296387f,
-  0.766201555728912f, 0.423245459794998f, 0.766526103019714f, 0.423041164875031f,
-  0.766850471496582f, 0.422836631536484f, 0.767174720764160f, 0.422631829977036f,
-  0.767498791217804f, 0.422426789999008f, 0.767822742462158f, 0.422221481800079f,
-  0.768146514892578f, 0.422015935182571f, 0.768470108509064f, 0.421810150146484f,
-  0.768793523311615f, 0.421604126691818f, 0.769116818904877f, 0.421397835016251f,
-  0.769439935684204f, 0.421191304922104f, 0.769762933254242f, 0.420984506607056f,
-  0.770085752010345f, 0.420777499675751f, 0.770408391952515f, 0.420570224523544f,
-  0.770730912685394f, 0.420362681150436f, 0.771053194999695f, 0.420154929161072f,
-  0.771375417709351f, 0.419946908950806f, 0.771697402000427f, 0.419738620519638f,
-  0.772019267082214f, 0.419530123472214f, 0.772340953350067f, 0.419321358203888f,
-  0.772662520408630f, 0.419112354516983f, 0.772983849048615f, 0.418903112411499f,
-  0.773305058479309f, 0.418693602085114f, 0.773626148700714f, 0.418483853340149f,
-  0.773947000503540f, 0.418273866176605f, 0.774267733097076f, 0.418063640594482f,
-  0.774588346481323f, 0.417853146791458f, 0.774908721446991f, 0.417642414569855f,
-  0.775228977203369f, 0.417431443929672f, 0.775549054145813f, 0.417220205068588f,
-  0.775869011878967f, 0.417008757591248f, 0.776188731193542f, 0.416797041893005f,
-  0.776508331298828f, 0.416585087776184f, 0.776827812194824f, 0.416372895240784f,
-  0.777147054672241f, 0.416160434484482f, 0.777466177940369f, 0.415947735309601f,
-  0.777785122394562f, 0.415734797716141f, 0.778103888034821f, 0.415521621704102f,
-  0.778422534465790f, 0.415308207273483f, 0.778741002082825f, 0.415094524621964f,
-  0.779059290885925f, 0.414880603551865f, 0.779377400875092f, 0.414666473865509f,
-  0.779695332050323f, 0.414452046155930f, 0.780013144016266f, 0.414237409830093f,
-  0.780330777168274f, 0.414022535085678f, 0.780648231506348f, 0.413807392120361f,
-  0.780965566635132f, 0.413592010736465f, 0.781282722949982f, 0.413376390933990f,
-  0.781599700450897f, 0.413160532712936f, 0.781916499137878f, 0.412944436073303f,
-  0.782233119010925f, 0.412728071212769f, 0.782549619674683f, 0.412511497735977f,
-  0.782865881919861f, 0.412294656038284f, 0.783182024955750f, 0.412077575922012f,
-  0.783498048782349f, 0.411860257387161f, 0.783813834190369f, 0.411642700433731f,
-  0.784129500389099f, 0.411424905061722f, 0.784444928169250f, 0.411206841468811f,
-  0.784760236740112f, 0.410988569259644f, 0.785075426101685f, 0.410770028829575f,
-  0.785390377044678f, 0.410551249980927f, 0.785705149173737f, 0.410332232713699f,
-  0.786019802093506f, 0.410112977027893f, 0.786334276199341f, 0.409893482923508f,
-  0.786648571491241f, 0.409673750400543f, 0.786962687969208f, 0.409453779459000f,
-  0.787276685237885f, 0.409233570098877f, 0.787590444087982f, 0.409013092517853f,
-  0.787904083728790f, 0.408792406320572f, 0.788217544555664f, 0.408571451902390f,
-  0.788530826568604f, 0.408350288867950f, 0.788843929767609f, 0.408128857612610f,
-  0.789156913757324f, 0.407907217741013f, 0.789469659328461f, 0.407685309648514f,
-  0.789782285690308f, 0.407463163137436f, 0.790094733238220f, 0.407240778207779f,
-  0.790407001972198f, 0.407018154859543f, 0.790719091892242f, 0.406795293092728f,
-  0.791031002998352f, 0.406572192907333f, 0.791342735290527f, 0.406348884105682f,
-  0.791654348373413f, 0.406125307083130f, 0.791965723037720f, 0.405901491641998f,
-  0.792276978492737f, 0.405677437782288f, 0.792588055133820f, 0.405453115701675f,
-  0.792898952960968f, 0.405228585004807f, 0.793209671974182f, 0.405003815889359f,
-  0.793520212173462f, 0.404778808355331f, 0.793830573558807f, 0.404553562402725f,
-  0.794140756130219f, 0.404328078031540f, 0.794450819492340f, 0.404102355241776f,
-  0.794760644435883f, 0.403876423835754f, 0.795070350170136f, 0.403650224208832f,
-  0.795379877090454f, 0.403423786163330f, 0.795689165592194f, 0.403197109699249f,
-  0.795998334884644f, 0.402970194816589f, 0.796307325363159f, 0.402743041515350f,
-  0.796616137027740f, 0.402515679597855f, 0.796924769878387f, 0.402288049459457f,
-  0.797233223915100f, 0.402060180902481f, 0.797541558742523f, 0.401832103729248f,
-  0.797849655151367f, 0.401603758335114f, 0.798157572746277f, 0.401375204324722f,
-  0.798465371131897f, 0.401146411895752f, 0.798772931098938f, 0.400917351245880f,
-  0.799080371856689f, 0.400688081979752f, 0.799387574195862f, 0.400458574295044f,
-  0.799694657325745f, 0.400228828191757f, 0.800001561641693f, 0.399998843669891f,
-  0.800308227539063f, 0.399768620729446f, 0.800614774227142f, 0.399538189172745f,
-  0.800921142101288f, 0.399307489395142f, 0.801227271556854f, 0.399076581001282f,
-  0.801533281803131f, 0.398845434188843f, 0.801839113235474f, 0.398614019155502f,
-  0.802144765853882f, 0.398382395505905f, 0.802450239658356f, 0.398150533437729f,
-  0.802755534648895f, 0.397918462753296f, 0.803060650825500f, 0.397686123847961f,
-  0.803365588188171f, 0.397453576326370f, 0.803670346736908f, 0.397220760583878f,
-  0.803974866867065f, 0.396987736225128f, 0.804279267787933f, 0.396754473447800f,
-  0.804583489894867f, 0.396520972251892f, 0.804887533187866f, 0.396287262439728f,
-  0.805191397666931f, 0.396053284406662f, 0.805495083332062f, 0.395819097757339f,
-  0.805798590183258f, 0.395584672689438f, 0.806101918220520f, 0.395350009202957f,
-  0.806405067443848f, 0.395115107297897f, 0.806707978248596f, 0.394879996776581f,
-  0.807010769844055f, 0.394644618034363f, 0.807313382625580f, 0.394409030675888f,
-  0.807615816593170f, 0.394173204898834f, 0.807918012142181f, 0.393937170505524f,
-  0.808220088481903f, 0.393700867891312f, 0.808521986007690f, 0.393464356660843f,
-  0.808823645114899f, 0.393227607011795f, 0.809125185012817f, 0.392990618944168f,
-  0.809426486492157f, 0.392753422260284f, 0.809727668762207f, 0.392515957355499f,
-  0.810028612613678f, 0.392278283834457f, 0.810329377651215f, 0.392040401697159f,
-  0.810629963874817f, 0.391802251338959f, 0.810930430889130f, 0.391563892364502f,
-  0.811230659484863f, 0.391325294971466f, 0.811530709266663f, 0.391086459159851f,
-  0.811830580234528f, 0.390847414731979f, 0.812130272388458f, 0.390608131885529f,
-  0.812429726123810f, 0.390368610620499f, 0.812729060649872f, 0.390128880739212f,
-  0.813028216362000f, 0.389888882637024f, 0.813327133655548f, 0.389648675918579f,
-  0.813625931739807f, 0.389408260583878f, 0.813924491405487f, 0.389167606830597f,
-  0.814222872257233f, 0.388926714658737f, 0.814521074295044f, 0.388685584068298f,
-  0.814819097518921f, 0.388444244861603f, 0.815116941928864f, 0.388202667236328f,
-  0.815414607524872f, 0.387960851192474f, 0.815712094306946f, 0.387718826532364f,
-  0.816009342670441f, 0.387476563453674f, 0.816306471824646f, 0.387234061956406f,
-  0.816603362560272f, 0.386991351842880f, 0.816900074481964f, 0.386748403310776f,
-  0.817196667194366f, 0.386505216360092f, 0.817493021488190f, 0.386261820793152f,
-  0.817789137363434f, 0.386018186807632f, 0.818085134029388f, 0.385774344205856f,
-  0.818380951881409f, 0.385530263185501f, 0.818676531314850f, 0.385285943746567f,
-  0.818971931934357f, 0.385041415691376f, 0.819267153739929f, 0.384796649217606f,
-  0.819562196731567f, 0.384551674127579f, 0.819857060909271f, 0.384306460618973f,
-  0.820151746273041f, 0.384061008691788f, 0.820446193218231f, 0.383815348148346f,
-  0.820740520954132f, 0.383569449186325f, 0.821034610271454f, 0.383323341608047f,
-  0.821328520774841f, 0.383076995611191f, 0.821622252464294f, 0.382830440998077f,
-  0.821915745735168f, 0.382583618164063f, 0.822209119796753f, 0.382336616516113f,
-  0.822502255439758f, 0.382089376449585f, 0.822795212268829f, 0.381841897964478f,
-  0.823087990283966f, 0.381594210863113f, 0.823380589485168f, 0.381346285343170f,
-  0.823673009872437f, 0.381098151206970f, 0.823965191841125f, 0.380849778652191f,
-  0.824257194995880f, 0.380601197481155f, 0.824549019336700f, 0.380352377891541f,
-  0.824840664863586f, 0.380103349685669f, 0.825132071971893f, 0.379854083061218f,
-  0.825423359870911f, 0.379604607820511f, 0.825714409351349f, 0.379354894161224f,
-  0.826005280017853f, 0.379104942083359f, 0.826295912265778f, 0.378854811191559f,
-  0.826586425304413f, 0.378604412078857f, 0.826876699924469f, 0.378353834152222f,
-  0.827166795730591f, 0.378102988004684f, 0.827456712722778f, 0.377851963043213f,
-  0.827746450901031f, 0.377600699663162f, 0.828035950660706f, 0.377349197864532f,
-  0.828325271606445f, 0.377097487449646f, 0.828614413738251f, 0.376845568418503f,
-  0.828903317451477f, 0.376593410968781f, 0.829192101955414f, 0.376341015100479f,
-  0.829480648040771f, 0.376088410615921f, 0.829769015312195f, 0.375835597515106f,
-  0.830057144165039f, 0.375582575798035f, 0.830345153808594f, 0.375329315662384f,
-  0.830632925033569f, 0.375075817108154f, 0.830920517444611f, 0.374822109937668f,
-  0.831207871437073f, 0.374568194150925f, 0.831495106220245f, 0.374314039945602f,
-  0.831782102584839f, 0.374059677124023f, 0.832068860530853f, 0.373805105686188f,
-  0.832355499267578f, 0.373550295829773f, 0.832641899585724f, 0.373295277357101f,
-  0.832928121089935f, 0.373040050268173f, 0.833214163780212f, 0.372784584760666f,
-  0.833499968051910f, 0.372528880834579f, 0.833785593509674f, 0.372272998094559f,
-  0.834071040153503f, 0.372016876935959f, 0.834356248378754f, 0.371760547161102f,
-  0.834641277790070f, 0.371503978967667f, 0.834926128387451f, 0.371247202157974f,
-  0.835210800170898f, 0.370990216732025f, 0.835495233535767f, 0.370732992887497f,
-  0.835779488086700f, 0.370475560426712f, 0.836063504219055f, 0.370217919349670f,
-  0.836347401142120f, 0.369960039854050f, 0.836631059646606f, 0.369701951742172f,
-  0.836914479732513f, 0.369443655014038f, 0.837197780609131f, 0.369185149669647f,
-  0.837480843067169f, 0.368926405906677f, 0.837763667106628f, 0.368667453527451f,
-  0.838046371936798f, 0.368408292531967f, 0.838328838348389f, 0.368148893117905f,
-  0.838611066341400f, 0.367889285087585f, 0.838893175125122f, 0.367629468441010f,
-  0.839175045490265f, 0.367369443178177f, 0.839456677436829f, 0.367109179496765f,
-  0.839738130569458f, 0.366848707199097f, 0.840019404888153f, 0.366588026285172f,
-  0.840300500392914f, 0.366327136754990f, 0.840581357479095f, 0.366066008806229f,
-  0.840862035751343f, 0.365804702043533f, 0.841142535209656f, 0.365543156862259f,
-  0.841422796249390f, 0.365281373262405f, 0.841702818870544f, 0.365019410848618f,
-  0.841982722282410f, 0.364757210016251f, 0.842262387275696f, 0.364494800567627f,
-  0.842541813850403f, 0.364232182502747f, 0.842821121215820f, 0.363969355821610f,
-  0.843100130558014f, 0.363706320524216f, 0.843379020690918f, 0.363443046808243f,
-  0.843657672405243f, 0.363179564476013f, 0.843936145305634f, 0.362915903329849f,
-  0.844214379787445f, 0.362651973962784f, 0.844492435455322f, 0.362387865781784f,
-  0.844770252704620f, 0.362123548984528f, 0.845047891139984f, 0.361858993768692f,
-  0.845325350761414f, 0.361594229936600f, 0.845602571964264f, 0.361329287290573f,
-  0.845879614353180f, 0.361064106225967f, 0.846156477928162f, 0.360798716545105f,
-  0.846433103084564f, 0.360533088445663f, 0.846709489822388f, 0.360267281532288f,
-  0.846985757350922f, 0.360001266002655f, 0.847261726856232f, 0.359735012054443f,
-  0.847537577152252f, 0.359468549489975f, 0.847813189029694f, 0.359201908111572f,
-  0.848088562488556f, 0.358935028314590f, 0.848363757133484f, 0.358667939901352f,
-  0.848638772964478f, 0.358400642871857f, 0.848913550376892f, 0.358133137226105f,
-  0.849188148975372f, 0.357865422964096f, 0.849462509155273f, 0.357597470283508f,
-  0.849736690521240f, 0.357329338788986f, 0.850010633468628f, 0.357060998678207f,
-  0.850284397602081f, 0.356792420148849f, 0.850557923316956f, 0.356523662805557f,
-  0.850831270217896f, 0.356254696846008f, 0.851104438304901f, 0.355985492467880f,
-  0.851377367973328f, 0.355716109275818f, 0.851650118827820f, 0.355446487665176f,
-  0.851922631263733f, 0.355176687240601f, 0.852194905281067f, 0.354906648397446f,
-  0.852467060089111f, 0.354636400938034f, 0.852738916873932f, 0.354365974664688f,
-  0.853010654449463f, 0.354095309972763f, 0.853282094001770f, 0.353824466466904f,
-  0.853553414344788f, 0.353553384542465f, 0.853824436664581f, 0.353282123804092f,
-  0.854095339775085f, 0.353010624647141f, 0.854365944862366f, 0.352738946676254f,
-  0.854636430740356f, 0.352467030286789f, 0.854906618595123f, 0.352194935083389f,
-  0.855176687240601f, 0.351922631263733f, 0.855446517467499f, 0.351650089025497f,
-  0.855716109275818f, 0.351377367973328f, 0.855985522270203f, 0.351104438304901f,
-  0.856254696846008f, 0.350831300020218f, 0.856523692607880f, 0.350557953119278f,
-  0.856792449951172f, 0.350284397602081f, 0.857060968875885f, 0.350010633468628f,
-  0.857329368591309f, 0.349736660718918f, 0.857597470283508f, 0.349462509155273f,
-  0.857865393161774f, 0.349188119173050f, 0.858133137226105f, 0.348913550376892f,
-  0.858400642871857f, 0.348638743162155f, 0.858667910099030f, 0.348363757133484f,
-  0.858934998512268f, 0.348088562488556f, 0.859201908111572f, 0.347813159227371f,
-  0.859468579292297f, 0.347537547349930f, 0.859735012054443f, 0.347261756658554f,
-  0.860001266002655f, 0.346985727548599f, 0.860267281532288f, 0.346709519624710f,
-  0.860533118247986f, 0.346433073282242f, 0.860798716545105f, 0.346156448125839f,
-  0.861064076423645f, 0.345879614353180f, 0.861329257488251f, 0.345602601766586f,
-  0.861594259738922f, 0.345325350761414f, 0.861859023571014f, 0.345047920942307f,
-  0.862123548984528f, 0.344770282506943f, 0.862387895584106f, 0.344492435455322f,
-  0.862652003765106f, 0.344214379787445f, 0.862915873527527f, 0.343936115503311f,
-  0.863179564476013f, 0.343657672405243f, 0.863443076610565f, 0.343379020690918f,
-  0.863706290721893f, 0.343100160360336f, 0.863969385623932f, 0.342821091413498f,
-  0.864232182502747f, 0.342541843652725f, 0.864494800567627f, 0.342262357473373f,
-  0.864757239818573f, 0.341982692480087f, 0.865019381046295f, 0.341702848672867f,
-  0.865281403064728f, 0.341422766447067f, 0.865543127059937f, 0.341142505407333f,
-  0.865804672241211f, 0.340862035751343f, 0.866066038608551f, 0.340581357479095f,
-  0.866327106952667f, 0.340300500392914f, 0.866588056087494f, 0.340019434690475f,
-  0.866848707199097f, 0.339738160371780f, 0.867109179496765f, 0.339456677436829f,
-  0.867369413375854f, 0.339175015687943f, 0.867629468441010f, 0.338893145322800f,
-  0.867889285087585f, 0.338611096143723f, 0.868148922920227f, 0.338328808546066f,
-  0.868408262729645f, 0.338046342134476f, 0.868667483329773f, 0.337763696908951f,
-  0.868926405906677f, 0.337480813264847f, 0.869185149669647f, 0.337197750806808f,
-  0.869443655014038f, 0.336914509534836f, 0.869701981544495f, 0.336631029844284f,
-  0.869960069656372f, 0.336347371339798f, 0.870217919349670f, 0.336063534021378f,
-  0.870475590229034f, 0.335779488086700f, 0.870733022689819f, 0.335495233535767f,
-  0.870990216732025f, 0.335210770368576f, 0.871247172355652f, 0.334926128387451f,
-  0.871503949165344f, 0.334641307592392f, 0.871760547161102f, 0.334356248378754f,
-  0.872016847133636f, 0.334071010351181f, 0.872272968292236f, 0.333785593509674f,
-  0.872528910636902f, 0.333499968051910f, 0.872784554958344f, 0.333214133977890f,
-  0.873040020465851f, 0.332928121089935f, 0.873295307159424f, 0.332641899585724f,
-  0.873550295829773f, 0.332355499267578f, 0.873805105686188f, 0.332068890333176f,
-  0.874059677124023f, 0.331782072782516f, 0.874314069747925f, 0.331495076417923f,
-  0.874568223953247f, 0.331207901239395f, 0.874822139739990f, 0.330920487642288f,
-  0.875075817108154f, 0.330632925033569f, 0.875329315662384f, 0.330345153808594f,
-  0.875582575798035f, 0.330057173967361f, 0.875835597515106f, 0.329769015312195f,
-  0.876088440418243f, 0.329480648040771f, 0.876341044902802f, 0.329192101955414f,
-  0.876593410968781f, 0.328903347253799f, 0.876845538616180f, 0.328614413738251f,
-  0.877097487449646f, 0.328325271606445f, 0.877349197864532f, 0.328035950660706f,
-  0.877600669860840f, 0.327746421098709f, 0.877851963043213f, 0.327456712722778f,
-  0.878103017807007f, 0.327166795730591f, 0.878353834152222f, 0.326876699924469f,
-  0.878604412078857f, 0.326586425304413f, 0.878854811191559f, 0.326295942068100f,
-  0.879104971885681f, 0.326005280017853f, 0.879354894161224f, 0.325714409351349f,
-  0.879604578018188f, 0.325423330068588f, 0.879854083061218f, 0.325132101774216f,
-  0.880103349685669f, 0.324840664863586f, 0.880352377891541f, 0.324549019336700f,
-  0.880601167678833f, 0.324257194995880f, 0.880849778652191f, 0.323965191841125f,
-  0.881098151206970f, 0.323672980070114f, 0.881346285343170f, 0.323380589485168f,
-  0.881594181060791f, 0.323088020086288f, 0.881841897964478f, 0.322795242071152f,
-  0.882089376449585f, 0.322502255439758f, 0.882336616516113f, 0.322209119796753f,
-  0.882583618164063f, 0.321915775537491f, 0.882830440998077f, 0.321622252464294f,
-  0.883076965808868f, 0.321328520774841f, 0.883323311805725f, 0.321034610271454f,
-  0.883569478988647f, 0.320740520954132f, 0.883815348148346f, 0.320446223020554f,
-  0.884061038494110f, 0.320151746273041f, 0.884306430816650f, 0.319857090711594f,
-  0.884551644325256f, 0.319562226533890f, 0.884796679019928f, 0.319267183542252f,
-  0.885041415691376f, 0.318971961736679f, 0.885285973548889f, 0.318676531314850f,
-  0.885530233383179f, 0.318380922079086f, 0.885774314403534f, 0.318085134029388f,
-  0.886018216609955f, 0.317789167165756f, 0.886261820793152f, 0.317492991685867f,
-  0.886505246162415f, 0.317196637392044f, 0.886748373508453f, 0.316900104284287f,
-  0.886991322040558f, 0.316603392362595f, 0.887234091758728f, 0.316306471824646f,
-  0.887476563453674f, 0.316009372472763f, 0.887718796730042f, 0.315712094306946f,
-  0.887960851192474f, 0.315414607524872f, 0.888202667236328f, 0.315116971731186f,
-  0.888444244861603f, 0.314819127321243f, 0.888685584068298f, 0.314521104097366f,
-  0.888926684856415f, 0.314222872257233f, 0.889167606830597f, 0.313924491405487f,
-  0.889408230781555f, 0.313625901937485f, 0.889648675918579f, 0.313327133655548f,
-  0.889888882637024f, 0.313028186559677f, 0.890128850936890f, 0.312729060649872f,
-  0.890368640422821f, 0.312429755926132f, 0.890608131885529f, 0.312130242586136f,
-  0.890847444534302f, 0.311830550432205f, 0.891086459159851f, 0.311530679464340f,
-  0.891325294971466f, 0.311230629682541f, 0.891563892364502f, 0.310930401086807f,
-  0.891802251338959f, 0.310629993677139f, 0.892040371894836f, 0.310329377651215f,
-  0.892278313636780f, 0.310028612613678f, 0.892515957355499f, 0.309727638959885f,
-  0.892753422260284f, 0.309426486492157f, 0.892990648746490f, 0.309125155210495f,
-  0.893227577209473f, 0.308823645114899f, 0.893464326858521f, 0.308521956205368f,
-  0.893700897693634f, 0.308220088481903f, 0.893937170505524f, 0.307918041944504f,
-  0.894173204898834f, 0.307615786790848f, 0.894409060478210f, 0.307313382625580f,
-  0.894644618034363f, 0.307010769844055f, 0.894879996776581f, 0.306708008050919f,
-  0.895115137100220f, 0.306405037641525f, 0.895349979400635f, 0.306101888418198f,
-  0.895584642887115f, 0.305798590183258f, 0.895819067955017f, 0.305495083332062f,
-  0.896053314208984f, 0.305191397666931f, 0.896287262439728f, 0.304887533187866f,
-  0.896520972251892f, 0.304583519697189f, 0.896754503250122f, 0.304279297590256f,
-  0.896987736225128f, 0.303974896669388f, 0.897220790386200f, 0.303670316934586f,
-  0.897453546524048f, 0.303365558385849f, 0.897686123847961f, 0.303060621023178f,
-  0.897918462753296f, 0.302755534648895f, 0.898150563240051f, 0.302450239658356f,
-  0.898382425308228f, 0.302144765853882f, 0.898614048957825f, 0.301839113235474f,
-  0.898845434188843f, 0.301533311605453f, 0.899076581001282f, 0.301227301359177f,
-  0.899307489395142f, 0.300921112298965f, 0.899538159370422f, 0.300614774227142f,
-  0.899768650531769f, 0.300308227539063f, 0.899998843669891f, 0.300001531839371f,
-  0.900228857994080f, 0.299694657325745f, 0.900458574295044f, 0.299387603998184f,
-  0.900688111782074f, 0.299080342054367f, 0.900917351245880f, 0.298772931098938f,
-  0.901146411895752f, 0.298465341329575f, 0.901375174522400f, 0.298157602548599f,
-  0.901603758335114f, 0.297849655151367f, 0.901832103729248f, 0.297541528940201f,
-  0.902060210704803f, 0.297233253717422f, 0.902288019657135f, 0.296924799680710f,
-  0.902515649795532f, 0.296616137027740f, 0.902743041515350f, 0.296307325363159f,
-  0.902970194816589f, 0.295998334884644f, 0.903197109699249f, 0.295689195394516f,
-  0.903423786163330f, 0.295379847288132f, 0.903650224208832f, 0.295070350170136f,
-  0.903876423835754f, 0.294760644435883f, 0.904102385044098f, 0.294450789690018f,
-  0.904328107833862f, 0.294140785932541f, 0.904553592205048f, 0.293830573558807f,
-  0.904778838157654f, 0.293520182371140f, 0.905003845691681f, 0.293209642171860f,
-  0.905228614807129f, 0.292898923158646f, 0.905453145503998f, 0.292588025331497f,
-  0.905677437782288f, 0.292276978492737f, 0.905901491641998f, 0.291965723037720f,
-  0.906125307083130f, 0.291654318571091f, 0.906348884105682f, 0.291342735290527f,
-  0.906572222709656f, 0.291031002998352f, 0.906795322895050f, 0.290719062089920f,
-  0.907018184661865f, 0.290406972169876f, 0.907240808010101f, 0.290094703435898f,
-  0.907463192939758f, 0.289782285690308f, 0.907685279846191f, 0.289469659328461f,
-  0.907907187938690f, 0.289156883955002f, 0.908128857612610f, 0.288843959569931f,
-  0.908350288867950f, 0.288530826568604f, 0.908571481704712f, 0.288217544555664f,
-  0.908792436122894f, 0.287904083728790f, 0.909013092517853f, 0.287590473890305f,
-  0.909233570098877f, 0.287276685237885f, 0.909453809261322f, 0.286962717771530f,
-  0.909673750400543f, 0.286648571491241f, 0.909893512725830f, 0.286334276199341f,
-  0.910112977027893f, 0.286019802093506f, 0.910332262516022f, 0.285705178976059f,
-  0.910551249980927f, 0.285390377044678f, 0.910769999027252f, 0.285075396299362f,
-  0.910988569259644f, 0.284760266542435f, 0.911206841468811f, 0.284444957971573f,
-  0.911424875259399f, 0.284129470586777f, 0.911642670631409f, 0.283813834190369f,
-  0.911860227584839f, 0.283498018980026f, 0.912077546119690f, 0.283182054758072f,
-  0.912294626235962f, 0.282865911722183f, 0.912511467933655f, 0.282549589872360f,
-  0.912728071212769f, 0.282233119010925f, 0.912944436073303f, 0.281916469335556f,
-  0.913160502910614f, 0.281599670648575f, 0.913376390933990f, 0.281282693147659f,
-  0.913592040538788f, 0.280965566635132f, 0.913807392120361f, 0.280648261308670f,
-  0.914022505283356f, 0.280330777168274f, 0.914237439632416f, 0.280013144016266f,
-  0.914452075958252f, 0.279695361852646f, 0.914666473865509f, 0.279377400875092f,
-  0.914880633354187f, 0.279059261083603f, 0.915094554424286f, 0.278740972280502f,
-  0.915308177471161f, 0.278422504663467f, 0.915521621704102f, 0.278103888034821f,
-  0.915734827518463f, 0.277785122394562f, 0.915947735309601f, 0.277466177940369f,
-  0.916160404682159f, 0.277147054672241f, 0.916372895240784f, 0.276827782392502f,
-  0.916585087776184f, 0.276508361101151f, 0.916797041893005f, 0.276188760995865f,
-  0.917008757591248f, 0.275868982076645f, 0.917220234870911f, 0.275549083948135f,
-  0.917431414127350f, 0.275228977203369f, 0.917642414569855f, 0.274908751249313f,
-  0.917853116989136f, 0.274588316679001f, 0.918063640594482f, 0.274267762899399f,
-  0.918273866176605f, 0.273947030305862f, 0.918483853340149f, 0.273626148700714f,
-  0.918693602085114f, 0.273305088281631f, 0.918903112411499f, 0.272983878850937f,
-  0.919112324714661f, 0.272662490606308f, 0.919321358203888f, 0.272340953350067f,
-  0.919530093669891f, 0.272019267082214f, 0.919738650321960f, 0.271697402000427f,
-  0.919946908950806f, 0.271375387907028f, 0.920154929161072f, 0.271053224802017f,
-  0.920362710952759f, 0.270730882883072f, 0.920570194721222f, 0.270408391952515f,
-  0.920777499675751f, 0.270085722208023f, 0.920984506607056f, 0.269762933254242f,
-  0.921191275119781f, 0.269439965486526f, 0.921397805213928f, 0.269116818904877f,
-  0.921604096889496f, 0.268793523311615f, 0.921810150146484f, 0.268470078706741f,
-  0.922015964984894f, 0.268146485090256f, 0.922221481800079f, 0.267822742462158f,
-  0.922426760196686f, 0.267498821020126f, 0.922631800174713f, 0.267174720764160f,
-  0.922836601734161f, 0.266850501298904f, 0.923041164875031f, 0.266526103019714f,
-  0.923245489597321f, 0.266201555728912f, 0.923449516296387f, 0.265876859426498f,
-  0.923653304576874f, 0.265552014112473f, 0.923856854438782f, 0.265226989984512f,
-  0.924060165882111f, 0.264901816844940f, 0.924263238906860f, 0.264576494693756f,
-  0.924466013908386f, 0.264250993728638f, 0.924668610095978f, 0.263925373554230f,
-  0.924870908260345f, 0.263599574565887f, 0.925072908401489f, 0.263273626565933f,
-  0.925274729728699f, 0.262947499752045f, 0.925476312637329f, 0.262621253728867f,
-  0.925677597522736f, 0.262294828891754f, 0.925878643989563f, 0.261968284845352f,
-  0.926079452037811f, 0.261641561985016f, 0.926280021667480f, 0.261314690113068f,
-  0.926480293273926f, 0.260987639427185f, 0.926680326461792f, 0.260660469532013f,
-  0.926880121231079f, 0.260333120822906f, 0.927079677581787f, 0.260005623102188f,
-  0.927278995513916f, 0.259678006172180f, 0.927478015422821f, 0.259350210428238f,
-  0.927676856517792f, 0.259022265672684f, 0.927875399589539f, 0.258694142103195f,
-  0.928073644638062f, 0.258365899324417f, 0.928271710872650f, 0.258037507534027f,
-  0.928469479084015f, 0.257708936929703f, 0.928667008876801f, 0.257380217313766f,
-  0.928864300251007f, 0.257051378488541f, 0.929061353206635f, 0.256722360849380f,
-  0.929258108139038f, 0.256393194198608f, 0.929454624652863f, 0.256063878536224f,
-  0.929650902748108f, 0.255734413862228f, 0.929846942424774f, 0.255404800176620f,
-  0.930042684078217f, 0.255075037479401f, 0.930238187313080f, 0.254745125770569f,
-  0.930433452129364f, 0.254415065050125f, 0.930628478527069f, 0.254084855318069f,
-  0.930823206901550f, 0.253754496574402f, 0.931017756462097f, 0.253423988819122f,
-  0.931211948394775f, 0.253093332052231f, 0.931405961513519f, 0.252762526273727f,
-  0.931599736213684f, 0.252431541681290f, 0.931793212890625f, 0.252100437879562f,
-  0.931986451148987f, 0.251769185066223f, 0.932179391384125f, 0.251437783241272f,
-  0.932372152805328f, 0.251106232404709f, 0.932564616203308f, 0.250774532556534f,
-  0.932756841182709f, 0.250442683696747f, 0.932948768138886f, 0.250110685825348f,
-  0.933140456676483f, 0.249778553843498f, 0.933331906795502f, 0.249446272850037f,
-  0.933523118495941f, 0.249113827943802f, 0.933714091777802f, 0.248781248927116f,
-  0.933904767036438f, 0.248448520898819f, 0.934095203876495f, 0.248115643858910f,
-  0.934285342693329f, 0.247782632708550f, 0.934475243091583f, 0.247449472546577f,
-  0.934664964675903f, 0.247116148471832f, 0.934854328632355f, 0.246782705187798f,
-  0.935043513774872f, 0.246449097990990f, 0.935232400894165f, 0.246115356683731f,
-  0.935421049594879f, 0.245781451463699f, 0.935609400272369f, 0.245447427034378f,
-  0.935797572135925f, 0.245113238692284f, 0.935985386371613f, 0.244778916239738f,
-  0.936173021793365f, 0.244444444775581f, 0.936360359191895f, 0.244109839200974f,
-  0.936547517776489f, 0.243775084614754f, 0.936734318733215f, 0.243440181016922f,
-  0.936920940876007f, 0.243105143308640f, 0.937107264995575f, 0.242769956588745f,
-  0.937293350696564f, 0.242434620857239f, 0.937479138374329f, 0.242099151015282f,
-  0.937664687633514f, 0.241763532161713f, 0.937849998474121f, 0.241427779197693f,
-  0.938035070896149f, 0.241091892123222f, 0.938219845294952f, 0.240755841135979f,
-  0.938404381275177f, 0.240419670939446f, 0.938588619232178f, 0.240083336830139f,
-  0.938772618770599f, 0.239746883511543f, 0.938956379890442f, 0.239410281181335f,
-  0.939139902591705f, 0.239073529839516f, 0.939323127269745f, 0.238736644387245f,
-  0.939506113529205f, 0.238399609923363f, 0.939688861370087f, 0.238062441349030f,
-  0.939871311187744f, 0.237725138664246f, 0.940053522586823f, 0.237387686967850f,
-  0.940235435962677f, 0.237050101161003f, 0.940417110919952f, 0.236712381243706f,
-  0.940598547458649f, 0.236374512314796f, 0.940779745578766f, 0.236036509275436f,
-  0.940960645675659f, 0.235698372125626f, 0.941141307353973f, 0.235360085964203f,
-  0.941321671009064f, 0.235021665692329f, 0.941501796245575f, 0.234683111310005f,
-  0.941681683063507f, 0.234344407916069f, 0.941861271858215f, 0.234005570411682f,
-  0.942040622234344f, 0.233666598796844f, 0.942219734191895f, 0.233327493071556f,
-  0.942398548126221f, 0.232988253235817f, 0.942577123641968f, 0.232648864388466f,
-  0.942755401134491f, 0.232309341430664f, 0.942933499813080f, 0.231969684362412f,
-  0.943111240863800f, 0.231629893183708f, 0.943288803100586f, 0.231289967894554f,
-  0.943466067314148f, 0.230949893593788f, 0.943643093109131f, 0.230609700083733f,
-  0.943819820880890f, 0.230269357562065f, 0.943996310234070f, 0.229928880929947f,
-  0.944172501564026f, 0.229588270187378f, 0.944348454475403f, 0.229247525334358f,
-  0.944524168968201f, 0.228906646370888f, 0.944699645042419f, 0.228565633296967f,
-  0.944874763488770f, 0.228224486112595f, 0.945049703121185f, 0.227883204817772f,
-  0.945224344730377f, 0.227541789412498f, 0.945398747920990f, 0.227200239896774f,
-  0.945572853088379f, 0.226858556270599f, 0.945746779441834f, 0.226516738533974f,
-  0.945920348167419f, 0.226174786686897f, 0.946093678474426f, 0.225832715630531f,
-  0.946266770362854f, 0.225490495562553f, 0.946439623832703f, 0.225148141384125f,
-  0.946612179279327f, 0.224805667996407f, 0.946784436702728f, 0.224463045597076f,
-  0.946956455707550f, 0.224120303988457f, 0.947128236293793f, 0.223777428269386f,
-  0.947299718856812f, 0.223434418439865f, 0.947470963001251f, 0.223091274499893f,
-  0.947641968727112f, 0.222748011350632f, 0.947812676429749f, 0.222404599189758f,
-  0.947983145713806f, 0.222061067819595f, 0.948153316974640f, 0.221717402338982f,
-  0.948323249816895f, 0.221373617649078f, 0.948492884635925f, 0.221029683947563f,
-  0.948662281036377f, 0.220685631036758f, 0.948831439018250f, 0.220341444015503f,
-  0.949000298976898f, 0.219997137784958f, 0.949168920516968f, 0.219652697443962f,
-  0.949337244033813f, 0.219308122992516f, 0.949505329132080f, 0.218963414430618f,
-  0.949673116207123f, 0.218618586659431f, 0.949840664863586f, 0.218273624777794f,
-  0.950007975101471f, 0.217928543686867f, 0.950174987316132f, 0.217583328485489f,
-  0.950341701507568f, 0.217237979173660f, 0.950508177280426f, 0.216892510652542f,
-  0.950674414634705f, 0.216546908020973f, 0.950840353965759f, 0.216201186180115f,
-  0.951006054878235f, 0.215855330228806f, 0.951171517372131f, 0.215509355068207f,
-  0.951336681842804f, 0.215163245797157f, 0.951501548290253f, 0.214817002415657f,
-  0.951666176319122f, 0.214470639824867f, 0.951830565929413f, 0.214124158024788f,
-  0.951994657516479f, 0.213777542114258f, 0.952158451080322f, 0.213430806994438f,
-  0.952322065830231f, 0.213083937764168f, 0.952485322952271f, 0.212736949324608f,
-  0.952648401260376f, 0.212389841675758f, 0.952811121940613f, 0.212042599916458f,
-  0.952973663806915f, 0.211695238947868f, 0.953135907649994f, 0.211347743868828f,
-  0.953297853469849f, 0.211000129580498f, 0.953459560871124f, 0.210652396082878f,
-  0.953620970249176f, 0.210304543375969f, 0.953782141208649f, 0.209956556558609f,
-  0.953943073749542f, 0.209608450531960f, 0.954103708267212f, 0.209260210394859f,
-  0.954264044761658f, 0.208911851048470f, 0.954424142837524f, 0.208563387393951f,
-  0.954584002494812f, 0.208214774727821f, 0.954743564128876f, 0.207866057753563f,
-  0.954902827739716f, 0.207517206668854f, 0.955061912536621f, 0.207168251276016f,
-  0.955220639705658f, 0.206819161772728f, 0.955379128456116f, 0.206469938158989f,
-  0.955537378787994f, 0.206120610237122f, 0.955695331096649f, 0.205771163105965f,
-  0.955853044986725f, 0.205421581864357f, 0.956010460853577f, 0.205071896314621f,
-  0.956167578697205f, 0.204722076654434f, 0.956324458122253f, 0.204372137784958f,
-  0.956481099128723f, 0.204022079706192f, 0.956637442111969f, 0.203671902418137f,
-  0.956793546676636f, 0.203321605920792f, 0.956949353218079f, 0.202971190214157f,
-  0.957104861736298f, 0.202620655298233f, 0.957260131835938f, 0.202270001173019f,
-  0.957415163516998f, 0.201919227838516f, 0.957569897174835f, 0.201568335294724f,
-  0.957724332809448f, 0.201217323541641f, 0.957878530025482f, 0.200866192579269f,
-  0.958032488822937f, 0.200514942407608f, 0.958186149597168f, 0.200163587927818f,
-  0.958339512348175f, 0.199812099337578f, 0.958492636680603f, 0.199460506439209f,
-  0.958645522594452f, 0.199108779430389f, 0.958798050880432f, 0.198756948113441f,
-  0.958950400352478f, 0.198404997587204f, 0.959102451801300f, 0.198052927851677f,
-  0.959254205226898f, 0.197700738906860f, 0.959405720233917f, 0.197348430752754f,
-  0.959556937217712f, 0.196996018290520f, 0.959707856178284f, 0.196643486618996f,
-  0.959858596324921f, 0.196290835738182f, 0.960008978843689f, 0.195938065648079f,
-  0.960159122943878f, 0.195585191249847f, 0.960309028625488f, 0.195232197642326f,
-  0.960458636283875f, 0.194879084825516f, 0.960607945919037f, 0.194525867700577f,
-  0.960757017135620f, 0.194172516465187f, 0.960905790328979f, 0.193819075822830f,
-  0.961054325103760f, 0.193465501070023f, 0.961202561855316f, 0.193111822009087f,
-  0.961350560188293f, 0.192758023738861f, 0.961498260498047f, 0.192404121160507f,
-  0.961645722389221f, 0.192050099372864f, 0.961792886257172f, 0.191695958375931f,
-  0.961939752101898f, 0.191341713070869f, 0.962086379528046f, 0.190987363457680f,
-  0.962232708930969f, 0.190632879734039f, 0.962378799915314f, 0.190278306603432f,
-  0.962524592876434f, 0.189923599362373f, 0.962670147418976f, 0.189568802714348f,
-  0.962815403938293f, 0.189213871955872f, 0.962960422039032f, 0.188858851790428f,
-  0.963105142116547f, 0.188503712415695f, 0.963249564170837f, 0.188148453831673f,
-  0.963393747806549f, 0.187793090939522f, 0.963537633419037f, 0.187437608838081f,
-  0.963681280612946f, 0.187082037329674f, 0.963824629783630f, 0.186726331710815f,
-  0.963967680931091f, 0.186370536684990f, 0.964110493659973f, 0.186014622449875f,
-  0.964253067970276f, 0.185658603906631f, 0.964395284652710f, 0.185302466154099f,
-  0.964537262916565f, 0.184946224093437f, 0.964679002761841f, 0.184589877724648f,
-  0.964820444583893f, 0.184233412146568f, 0.964961588382721f, 0.183876842260361f,
-  0.965102493762970f, 0.183520168066025f, 0.965243160724640f, 0.183163389563560f,
-  0.965383470058441f, 0.182806491851807f, 0.965523540973663f, 0.182449504733086f,
-  0.965663373470306f, 0.182092398405075f, 0.965802907943726f, 0.181735187768936f,
-  0.965942144393921f, 0.181377857923508f, 0.966081082820892f, 0.181020438671112f,
-  0.966219842433929f, 0.180662900209427f, 0.966358244419098f, 0.180305257439613f,
-  0.966496407985687f, 0.179947525262833f, 0.966634273529053f, 0.179589673876762f,
-  0.966771900653839f, 0.179231703281403f, 0.966909229755402f, 0.178873643279076f,
-  0.967046260833740f, 0.178515478968620f, 0.967183053493500f, 0.178157210350037f,
-  0.967319548130035f, 0.177798837423325f, 0.967455804347992f, 0.177440345287323f,
-  0.967591762542725f, 0.177081763744354f, 0.967727422714233f, 0.176723077893257f,
-  0.967862844467163f, 0.176364272832870f, 0.967997968196869f, 0.176005378365517f,
-  0.968132853507996f, 0.175646379590034f, 0.968267440795898f, 0.175287276506424f,
-  0.968401730060577f, 0.174928069114685f, 0.968535780906677f, 0.174568757414818f,
-  0.968669533729553f, 0.174209341406822f, 0.968802988529205f, 0.173849821090698f,
-  0.968936204910278f, 0.173490211367607f, 0.969069123268127f, 0.173130482435226f,
-  0.969201743602753f, 0.172770664095879f, 0.969334125518799f, 0.172410741448402f,
-  0.969466269016266f, 0.172050714492798f, 0.969598054885864f, 0.171690583229065f,
-  0.969729602336884f, 0.171330362558365f, 0.969860911369324f, 0.170970037579536f,
-  0.969991862773895f, 0.170609608292580f, 0.970122575759888f, 0.170249074697495f,
-  0.970253050327301f, 0.169888436794281f, 0.970383226871490f, 0.169527709484100f,
-  0.970513105392456f, 0.169166877865791f, 0.970642685890198f, 0.168805956840515f,
-  0.970772027969360f, 0.168444931507111f, 0.970901072025299f, 0.168083801865578f,
-  0.971029877662659f, 0.167722567915916f, 0.971158385276794f, 0.167361244559288f,
-  0.971286594867706f, 0.166999831795692f, 0.971414566040039f, 0.166638299822807f,
-  0.971542239189148f, 0.166276678442955f, 0.971669614315033f, 0.165914967656136f,
-  0.971796751022339f, 0.165553152561188f, 0.971923589706421f, 0.165191248059273f,
-  0.972050130367279f, 0.164829224348068f, 0.972176432609558f, 0.164467126131058f,
-  0.972302436828613f, 0.164104923605919f, 0.972428143024445f, 0.163742616772652f,
-  0.972553610801697f, 0.163380220532417f, 0.972678780555725f, 0.163017734885216f,
-  0.972803652286530f, 0.162655144929886f, 0.972928285598755f, 0.162292465567589f,
-  0.973052620887756f, 0.161929681897163f, 0.973176658153534f, 0.161566808819771f,
-  0.973300457000732f, 0.161203846335411f, 0.973423957824707f, 0.160840779542923f,
-  0.973547160625458f, 0.160477623343468f, 0.973670125007629f, 0.160114362835884f,
-  0.973792791366577f, 0.159751012921333f, 0.973915159702301f, 0.159387573599815f,
-  0.974037289619446f, 0.159024044871330f, 0.974159121513367f, 0.158660411834717f,
-  0.974280655384064f, 0.158296689391136f, 0.974401950836182f, 0.157932877540588f,
-  0.974522948265076f, 0.157568961381912f, 0.974643647670746f, 0.157204970717430f,
-  0.974764108657837f, 0.156840875744820f, 0.974884271621704f, 0.156476691365242f,
-  0.975004136562347f, 0.156112402677536f, 0.975123703479767f, 0.155748039484024f,
-  0.975243031978607f, 0.155383571982384f, 0.975362062454224f, 0.155019029974937f,
-  0.975480854511261f, 0.154654383659363f, 0.975599288940430f, 0.154289647936821f,
-  0.975717484951019f, 0.153924822807312f, 0.975835442543030f, 0.153559908270836f,
-  0.975953042507172f, 0.153194904327393f, 0.976070404052734f, 0.152829796075821f,
-  0.976187527179718f, 0.152464613318443f, 0.976304292678833f, 0.152099341154099f,
-  0.976420819759369f, 0.151733979582787f, 0.976537048816681f, 0.151368513703346f,
-  0.976653039455414f, 0.151002973318100f, 0.976768672466278f, 0.150637343525887f,
-  0.976884067058563f, 0.150271624326706f, 0.976999223232269f, 0.149905815720558f,
-  0.977114021778107f, 0.149539917707443f, 0.977228581905365f, 0.149173930287361f,
-  0.977342903614044f, 0.148807853460312f, 0.977456867694855f, 0.148441687226295f,
-  0.977570593357086f, 0.148075446486473f, 0.977684020996094f, 0.147709101438522f,
-  0.977797150611877f, 0.147342681884766f, 0.977910041809082f, 0.146976172924042f,
-  0.978022634983063f, 0.146609574556351f, 0.978134930133820f, 0.146242901682854f,
-  0.978246986865997f, 0.145876124501228f, 0.978358685970306f, 0.145509272813797f,
-  0.978470146656036f, 0.145142331719399f, 0.978581368923187f, 0.144775316119194f,
-  0.978692233562469f, 0.144408211112022f, 0.978802859783173f, 0.144041016697884f,
-  0.978913187980652f, 0.143673732876778f, 0.979023277759552f, 0.143306359648705f,
-  0.979133009910584f, 0.142938911914825f, 0.979242503643036f, 0.142571389675140f,
-  0.979351758956909f, 0.142203763127327f, 0.979460656642914f, 0.141836062073708f,
-  0.979569315910339f, 0.141468286514282f, 0.979677677154541f, 0.141100421547890f,
-  0.979785740375519f, 0.140732467174530f, 0.979893565177917f, 0.140364438295364f,
-  0.980001091957092f, 0.139996320009232f, 0.980108320713043f, 0.139628127217293f,
-  0.980215251445770f, 0.139259845018387f, 0.980321943759918f, 0.138891488313675f,
-  0.980428338050842f, 0.138523042201996f, 0.980534434318542f, 0.138154521584511f,
-  0.980640232563019f, 0.137785911560059f, 0.980745792388916f, 0.137417227029800f,
-  0.980851054191589f, 0.137048453092575f, 0.980956017971039f, 0.136679604649544f,
-  0.981060683727264f, 0.136310681700706f, 0.981165111064911f, 0.135941669344902f,
-  0.981269240379334f, 0.135572582483292f, 0.981373071670532f, 0.135203406214714f,
-  0.981476604938507f, 0.134834155440331f, 0.981579899787903f, 0.134464830160141f,
-  0.981682896614075f, 0.134095430374146f, 0.981785595417023f, 0.133725941181183f,
-  0.981888055801392f, 0.133356377482414f, 0.981990158557892f, 0.132986739277840f,
-  0.982092022895813f, 0.132617011666298f, 0.982193589210510f, 0.132247209548950f,
-  0.982294917106628f, 0.131877332925797f, 0.982395887374878f, 0.131507381796837f,
-  0.982496619224548f, 0.131137356162071f, 0.982597053050995f, 0.130767241120338f,
-  0.982697248458862f, 0.130397051572800f, 0.982797086238861f, 0.130026802420616f,
-  0.982896685600281f, 0.129656463861465f, 0.982995986938477f, 0.129286035895348f,
-  0.983094990253448f, 0.128915548324585f, 0.983193755149841f, 0.128544986248016f,
-  0.983292162418365f, 0.128174334764481f, 0.983390331268311f, 0.127803623676300f,
-  0.983488261699677f, 0.127432823181152f, 0.983585834503174f, 0.127061963081360f,
-  0.983683168888092f, 0.126691013574600f, 0.983780145645142f, 0.126320004463196f,
-  0.983876943588257f, 0.125948905944824f, 0.983973383903503f, 0.125577747821808f,
-  0.984069526195526f, 0.125206500291824f, 0.984165430068970f, 0.124835193157196f,
-  0.984261035919189f, 0.124463804066181f, 0.984356343746185f, 0.124092340469360f,
-  0.984451413154602f, 0.123720809817314f, 0.984546124935150f, 0.123349204659462f,
-  0.984640598297119f, 0.122977524995804f, 0.984734773635864f, 0.122605770826340f,
-  0.984828710556030f, 0.122233949601650f, 0.984922289848328f, 0.121862053871155f,
-  0.985015630722046f, 0.121490091085434f, 0.985108673572540f, 0.121118053793907f,
-  0.985201418399811f, 0.120745941996574f, 0.985293865203857f, 0.120373763144016f,
-  0.985386073589325f, 0.120001509785652f, 0.985477983951569f, 0.119629189372063f,
-  0.985569596290588f, 0.119256794452667f, 0.985660910606384f, 0.118884332478046f,
-  0.985751926898956f, 0.118511803448200f, 0.985842704772949f, 0.118139199912548f,
-  0.985933184623718f, 0.117766529321671f, 0.986023366451263f, 0.117393791675568f,
-  0.986113250255585f, 0.117020979523659f, 0.986202836036682f, 0.116648100316525f,
-  0.986292183399200f, 0.116275154054165f, 0.986381232738495f, 0.115902140736580f,
-  0.986469984054565f, 0.115529052913189f, 0.986558437347412f, 0.115155905485153f,
-  0.986646652221680f, 0.114782683551311f, 0.986734509468079f, 0.114409394562244f,
-  0.986822128295898f, 0.114036038517952f, 0.986909449100494f, 0.113662622869015f,
-  0.986996471881866f, 0.113289132714272f, 0.987083256244659f, 0.112915575504303f,
-  0.987169682979584f, 0.112541958689690f, 0.987255871295929f, 0.112168267369270f,
-  0.987341761589050f, 0.111794516444206f, 0.987427353858948f, 0.111420698463917f,
-  0.987512648105621f, 0.111046813428402f, 0.987597703933716f, 0.110672861337662f,
-  0.987682461738586f, 0.110298842191696f, 0.987766921520233f, 0.109924763441086f,
-  0.987851083278656f, 0.109550617635250f, 0.987934947013855f, 0.109176412224770f,
-  0.988018512725830f, 0.108802139759064f, 0.988101840019226f, 0.108427800238132f,
-  0.988184869289398f, 0.108053401112556f, 0.988267600536346f, 0.107678934931755f,
-  0.988350033760071f, 0.107304409146309f, 0.988432228565216f, 0.106929816305637f,
-  0.988514065742493f, 0.106555156409740f, 0.988595664501190f, 0.106180444359779f,
-  0.988676965236664f, 0.105805665254593f, 0.988757967948914f, 0.105430819094181f,
-  0.988838672637939f, 0.105055920779705f, 0.988919138908386f, 0.104680955410004f,
-  0.988999247550964f, 0.104305922985077f, 0.989079117774963f, 0.103930838406086f,
-  0.989158689975739f, 0.103555686771870f, 0.989237964153290f, 0.103180475533009f,
-  0.989316940307617f, 0.102805204689503f, 0.989395678043365f, 0.102429874241352f,
-  0.989474058151245f, 0.102054484188557f, 0.989552199840546f, 0.101679034531116f,
-  0.989630043506622f, 0.101303517818451f, 0.989707589149475f, 0.100927948951721f,
-  0.989784896373749f, 0.100552320480347f, 0.989861845970154f, 0.100176624953747f,
-  0.989938557147980f, 0.099800877273083f, 0.990014970302582f, 0.099425069987774f,
-  0.990091085433960f, 0.099049203097820f, 0.990166902542114f, 0.098673284053802f,
-  0.990242421627045f, 0.098297297954559f, 0.990317702293396f, 0.097921259701252f,
-  0.990392625331879f, 0.097545161843300f, 0.990467309951782f, 0.097169004380703f,
-  0.990541696548462f, 0.096792794764042f, 0.990615785121918f, 0.096416525542736f,
-  0.990689575672150f, 0.096040196716785f, 0.990763127803802f, 0.095663815736771f,
-  0.990836322307587f, 0.095287375152111f, 0.990909278392792f, 0.094910882413387f,
-  0.990981936454773f, 0.094534330070019f, 0.991054296493530f, 0.094157725572586f,
-  0.991126358509064f, 0.093781061470509f, 0.991198182106018f, 0.093404345214367f,
-  0.991269648075104f, 0.093027576804161f, 0.991340875625610f, 0.092650748789310f,
-  0.991411805152893f, 0.092273868620396f, 0.991482377052307f, 0.091896936297417f,
-  0.991552770137787f, 0.091519944369793f, 0.991622805595398f, 0.091142900288105f,
-  0.991692543029785f, 0.090765804052353f, 0.991762042045593f, 0.090388655662537f,
-  0.991831183433533f, 0.090011447668076f, 0.991900086402893f, 0.089634194970131f,
-  0.991968691349030f, 0.089256882667542f, 0.992036998271942f, 0.088879525661469f,
-  0.992105066776276f, 0.088502109050751f, 0.992172777652740f, 0.088124647736549f,
-  0.992240250110626f, 0.087747126817703f, 0.992307364940643f, 0.087369553744793f,
-  0.992374241352081f, 0.086991935968399f, 0.992440819740295f, 0.086614266037941f,
-  0.992507100105286f, 0.086236543953419f, 0.992573142051697f, 0.085858769714832f,
-  0.992638826370239f, 0.085480943322182f, 0.992704212665558f, 0.085103072226048f,
-  0.992769360542297f, 0.084725148975849f, 0.992834210395813f, 0.084347173571587f,
-  0.992898762226105f, 0.083969146013260f, 0.992963016033173f, 0.083591073751450f,
-  0.993026971817017f, 0.083212949335575f, 0.993090689182281f, 0.082834780216217f,
-  0.993154048919678f, 0.082456558942795f, 0.993217170238495f, 0.082078292965889f,
-  0.993279933929443f, 0.081699974834919f, 0.993342459201813f, 0.081321612000465f,
-  0.993404686450958f, 0.080943197011948f, 0.993466615676880f, 0.080564737319946f,
-  0.993528306484222f, 0.080186225473881f, 0.993589639663696f, 0.079807676374912f,
-  0.993650734424591f, 0.079429075121880f, 0.993711471557617f, 0.079050421714783f,
-  0.993771970272064f, 0.078671731054783f, 0.993832170963287f, 0.078292988240719f,
-  0.993892073631287f, 0.077914200723171f, 0.993951678276062f, 0.077535368502140f,
-  0.994010984897614f, 0.077156484127045f, 0.994070053100586f, 0.076777562499046f,
-  0.994128763675690f, 0.076398596167564f, 0.994187235832214f, 0.076019577682018f,
-  0.994245409965515f, 0.075640521943569f, 0.994303286075592f, 0.075261414051056f,
-  0.994360864162445f, 0.074882268905640f, 0.994418144226074f, 0.074503071606159f,
-  0.994475126266479f, 0.074123837053776f, 0.994531810283661f, 0.073744557797909f,
-  0.994588255882263f, 0.073365233838558f, 0.994644403457642f, 0.072985872626305f,
-  0.994700193405151f, 0.072606459259987f, 0.994755744934082f, 0.072227008640766f,
-  0.994810998439789f, 0.071847513318062f, 0.994865953922272f, 0.071467980742455f,
-  0.994920611381531f, 0.071088403463364f, 0.994975030422211f, 0.070708781480789f,
-  0.995029091835022f, 0.070329122245312f, 0.995082914829254f, 0.069949418306351f,
-  0.995136380195618f, 0.069569669663906f, 0.995189607143402f, 0.069189883768559f,
-  0.995242536067963f, 0.068810060620308f, 0.995295166969299f, 0.068430192768574f,
-  0.995347499847412f, 0.068050287663937f, 0.995399534702301f, 0.067670337855816f,
-  0.995451331138611f, 0.067290350794792f, 0.995502769947052f, 0.066910326480865f,
-  0.995553970336914f, 0.066530264914036f, 0.995604813098907f, 0.066150158643723f,
-  0.995655417442322f, 0.065770015120506f, 0.995705723762512f, 0.065389834344387f,
-  0.995755732059479f, 0.065009608864784f, 0.995805442333221f, 0.064629353582859f,
-  0.995854854583740f, 0.064249053597450f, 0.995904028415680f, 0.063868723809719f,
-  0.995952844619751f, 0.063488349318504f, 0.996001422405243f, 0.063107937574387f,
-  0.996049642562866f, 0.062727488577366f, 0.996097624301910f, 0.062347009778023f,
-  0.996145308017731f, 0.061966486275196f, 0.996192693710327f, 0.061585929244757f,
-  0.996239781379700f, 0.061205338686705f, 0.996286571025848f, 0.060824707150459f,
-  0.996333062648773f, 0.060444042086601f, 0.996379256248474f, 0.060063343495131f,
-  0.996425211429596f, 0.059682607650757f, 0.996470808982849f, 0.059301838278770f,
-  0.996516168117523f, 0.058921031653881f, 0.996561229228973f, 0.058540191501379f,
-  0.996605992317200f, 0.058159314095974f, 0.996650457382202f, 0.057778406888247f,
-  0.996694624423981f, 0.057397462427616f, 0.996738493442535f, 0.057016488164663f,
-  0.996782064437866f, 0.056635476648808f, 0.996825337409973f, 0.056254431605339f,
-  0.996868371963501f, 0.055873356759548f, 0.996911048889160f, 0.055492244660854f,
-  0.996953487396240f, 0.055111102759838f, 0.996995627880096f, 0.054729927331209f,
-  0.997037410736084f, 0.054348722100258f, 0.997078955173492f, 0.053967483341694f,
-  0.997120201587677f, 0.053586211055517f, 0.997161149978638f, 0.053204908967018f,
-  0.997201859951019f, 0.052823577076197f, 0.997242212295532f, 0.052442211657763f,
-  0.997282266616821f, 0.052060816437006f, 0.997322082519531f, 0.051679391413927f,
-  0.997361540794373f, 0.051297932863235f, 0.997400760650635f, 0.050916448235512f,
-  0.997439682483673f, 0.050534930080175f, 0.997478306293488f, 0.050153385847807f,
-  0.997516572475433f, 0.049771808087826f, 0.997554600238800f, 0.049390204250813f,
-  0.997592389583588f, 0.049008570611477f, 0.997629821300507f, 0.048626907169819f,
-  0.997666954994202f, 0.048245213925838f, 0.997703790664673f, 0.047863494604826f,
-  0.997740387916565f, 0.047481749206781f, 0.997776627540588f, 0.047099970281124f,
-  0.997812628746033f, 0.046718169003725f, 0.997848331928253f, 0.046336337924004f,
-  0.997883677482605f, 0.045954477041960f, 0.997918784618378f, 0.045572593808174f,
-  0.997953593730927f, 0.045190680772066f, 0.997988104820251f, 0.044808741658926f,
-  0.998022377490997f, 0.044426776468754f, 0.998056292533875f, 0.044044785201550f,
-  0.998089909553528f, 0.043662767857313f, 0.998123228549957f, 0.043280724436045f,
-  0.998156309127808f, 0.042898654937744f, 0.998189091682434f, 0.042516563087702f,
-  0.998221516609192f, 0.042134445160627f, 0.998253703117371f, 0.041752301156521f,
-  0.998285591602325f, 0.041370131075382f, 0.998317182064056f, 0.040987938642502f,
-  0.998348474502563f, 0.040605723857880f, 0.998379468917847f, 0.040223482996225f,
-  0.998410165309906f, 0.039841219782829f, 0.998440563678741f, 0.039458930492401f,
-  0.998470664024353f, 0.039076622575521f, 0.998500525951386f, 0.038694288581610f,
-  0.998530030250549f, 0.038311932235956f, 0.998559296131134f, 0.037929553538561f,
-  0.998588204383850f, 0.037547148764133f, 0.998616874217987f, 0.037164725363255f,
-  0.998645246028900f, 0.036782283335924f, 0.998673319816589f, 0.036399815231562f,
-  0.998701035976410f, 0.036017324775457f, 0.998728513717651f, 0.035634815692902f,
-  0.998755753040314f, 0.035252287983894f, 0.998782634735107f, 0.034869734197855f,
-  0.998809218406677f, 0.034487165510654f, 0.998835504055023f, 0.034104570746422f,
-  0.998861551284790f, 0.033721961081028f, 0.998887240886688f, 0.033339329063892f,
-  0.998912692070007f, 0.032956674695015f, 0.998937785625458f, 0.032574005424976f,
-  0.998962640762329f, 0.032191313803196f, 0.998987197875977f, 0.031808607280254f,
-  0.999011456966400f, 0.031425878405571f, 0.999035418033600f, 0.031043132767081f,
-  0.999059081077576f, 0.030660368502140f, 0.999082446098328f, 0.030277585610747f,
-  0.999105513095856f, 0.029894785955548f, 0.999128282070160f, 0.029511967673898f,
-  0.999150753021240f, 0.029129132628441f, 0.999172985553741f, 0.028746278956532f,
-  0.999194860458374f, 0.028363410383463f, 0.999216496944427f, 0.027980525046587f,
-  0.999237775802612f, 0.027597622945905f, 0.999258816242218f, 0.027214704081416f,
-  0.999279558658600f, 0.026831768453121f, 0.999299943447113f, 0.026448817923665f,
-  0.999320089817047f, 0.026065852493048f, 0.999339938163757f, 0.025682870298624f,
-  0.999359488487244f, 0.025299875065684f, 0.999378740787506f, 0.024916863068938f,
-  0.999397754669189f, 0.024533838033676f, 0.999416410923004f, 0.024150796234608f,
-  0.999434769153595f, 0.023767741397023f, 0.999452829360962f, 0.023384673520923f,
-  0.999470651149750f, 0.023001590743661f, 0.999488115310669f, 0.022618494927883f,
-  0.999505341053009f, 0.022235386073589f, 0.999522268772125f, 0.021852264180779f,
-  0.999538838863373f, 0.021469129249454f, 0.999555170536041f, 0.021085981279612f,
-  0.999571204185486f, 0.020702820271254f, 0.999586939811707f, 0.020319648087025f,
-  0.999602377414703f, 0.019936462864280f, 0.999617516994476f, 0.019553268328309f,
-  0.999632358551025f, 0.019170060753822f, 0.999646902084351f, 0.018786842003465f,
-  0.999661207199097f, 0.018403612077236f, 0.999675154685974f, 0.018020370975137f,
-  0.999688863754272f, 0.017637118697166f, 0.999702215194702f, 0.017253857105970f,
-  0.999715328216553f, 0.016870586201549f, 0.999728083610535f, 0.016487304121256f,
-  0.999740600585938f, 0.016104012727737f, 0.999752819538116f, 0.015720712020993f,
-  0.999764680862427f, 0.015337402001023f, 0.999776303768158f, 0.014954082667828f,
-  0.999787628650665f, 0.014570754021406f, 0.999798655509949f, 0.014187417924404f,
-  0.999809384346008f, 0.013804072514176f, 0.999819874763489f, 0.013420719653368f,
-  0.999830007553101f, 0.013037359341979f, 0.999839842319489f, 0.012653990648687f,
-  0.999849438667297f, 0.012270614504814f, 0.999858677387238f, 0.011887230910361f,
-  0.999867618083954f, 0.011503840796649f, 0.999876320362091f, 0.011120444163680f,
-  0.999884724617004f, 0.010737040080130f, 0.999892771244049f, 0.010353630408645f,
-  0.999900579452515f, 0.009970214217901f, 0.999908089637756f, 0.009586792439222f,
-  0.999915301799774f, 0.009203365072608f, 0.999922215938568f, 0.008819932118058f,
-  0.999928832054138f, 0.008436493575573f, 0.999935150146484f, 0.008053051307797f,
-  0.999941170215607f, 0.007669602986425f, 0.999946892261505f, 0.007286150939763f,
-  0.999952375888824f, 0.006902694236487f, 0.999957501888275f, 0.006519233807921f,
-  0.999962329864502f, 0.006135769188404f, 0.999966919422150f, 0.005752300843596f,
-  0.999971151351929f, 0.005368829704821f, 0.999975144863129f, 0.004985354840755f,
-  0.999978840351105f, 0.004601877182722f, 0.999982178211212f, 0.004218397196382f,
-  0.999985277652740f, 0.003834914416075f, 0.999988079071045f, 0.003451429307461f,
-  0.999990582466125f, 0.003067942336202f, 0.999992787837982f, 0.002684453502297f,
-  0.999994695186615f, 0.002300963038579f, 0.999996304512024f, 0.001917471294291f,
-  0.999997675418854f, 0.001533978385851f, 0.999998688697815f, 0.001150484546088f,
-  0.999999403953552f, 0.000766990066040f, 0.999999880790710f, 0.000383495149435f,
-  1.000000000000000f, 0.000000000000023f, 0.999999880790710f, -0.000383495149435f,
-  0.999999403953552f, -0.000766990066040f, 0.999998688697815f, -0.001150484546088f,
-  0.999997675418854f, -0.001533978385851f, 0.999996304512024f, -0.001917471294291f,
-  0.999994695186615f, -0.002300963038579f, 0.999992787837982f, -0.002684453502297f,
-  0.999990582466125f, -0.003067942336202f, 0.999988079071045f, -0.003451429307461f,
-  0.999985277652740f, -0.003834914416075f, 0.999982178211212f, -0.004218397196382f,
-  0.999978840351105f, -0.004601877182722f, 0.999975144863129f, -0.004985354840755f,
-  0.999971151351929f, -0.005368829704821f, 0.999966919422150f, -0.005752300843596f,
-  0.999962329864502f, -0.006135769188404f, 0.999957501888275f, -0.006519233807921f,
-  0.999952375888824f, -0.006902694236487f, 0.999946892261505f, -0.007286150939763f,
-  0.999941170215607f, -0.007669602986425f, 0.999935150146484f, -0.008053051307797f,
-  0.999928832054138f, -0.008436493575573f, 0.999922215938568f, -0.008819932118058f,
-  0.999915301799774f, -0.009203365072608f, 0.999908089637756f, -0.009586792439222f,
-  0.999900579452515f, -0.009970214217901f, 0.999892771244049f, -0.010353630408645f,
-  0.999884724617004f, -0.010737040080130f, 0.999876320362091f, -0.011120444163680f,
-  0.999867618083954f, -0.011503840796649f, 0.999858677387238f, -0.011887230910361f,
-  0.999849438667297f, -0.012270614504814f, 0.999839842319489f, -0.012653990648687f,
-  0.999830007553101f, -0.013037359341979f, 0.999819874763489f, -0.013420719653368f,
-  0.999809384346008f, -0.013804072514176f, 0.999798655509949f, -0.014187417924404f,
-  0.999787628650665f, -0.014570754021406f, 0.999776303768158f, -0.014954082667828f,
-  0.999764680862427f, -0.015337402001023f, 0.999752819538116f, -0.015720712020993f,
-  0.999740600585938f, -0.016104012727737f, 0.999728083610535f, -0.016487304121256f,
-  0.999715328216553f, -0.016870586201549f, 0.999702215194702f, -0.017253857105970f,
-  0.999688863754272f, -0.017637118697166f, 0.999675154685974f, -0.018020370975137f,
-  0.999661207199097f, -0.018403612077236f, 0.999646902084351f, -0.018786842003465f,
-  0.999632358551025f, -0.019170060753822f, 0.999617516994476f, -0.019553268328309f,
-  0.999602377414703f, -0.019936462864280f, 0.999586939811707f, -0.020319648087025f,
-  0.999571204185486f, -0.020702820271254f, 0.999555170536041f, -0.021085981279612f,
-  0.999538838863373f, -0.021469129249454f, 0.999522268772125f, -0.021852264180779f,
-  0.999505341053009f, -0.022235386073589f, 0.999488115310669f, -0.022618494927883f,
-  0.999470651149750f, -0.023001590743661f, 0.999452829360962f, -0.023384673520923f,
-  0.999434769153595f, -0.023767741397023f, 0.999416410923004f, -0.024150796234608f,
-  0.999397754669189f, -0.024533838033676f, 0.999378740787506f, -0.024916863068938f,
-  0.999359488487244f, -0.025299875065684f, 0.999339938163757f, -0.025682870298624f,
-  0.999320089817047f, -0.026065852493048f, 0.999299943447113f, -0.026448817923665f,
-  0.999279558658600f, -0.026831768453121f, 0.999258816242218f, -0.027214704081416f,
-  0.999237775802612f, -0.027597622945905f, 0.999216496944427f, -0.027980525046587f,
-  0.999194860458374f, -0.028363410383463f, 0.999172985553741f, -0.028746278956532f,
-  0.999150753021240f, -0.029129132628441f, 0.999128282070160f, -0.029511967673898f,
-  0.999105513095856f, -0.029894785955548f, 0.999082446098328f, -0.030277585610747f,
-  0.999059081077576f, -0.030660368502140f, 0.999035418033600f, -0.031043132767081f,
-  0.999011456966400f, -0.031425878405571f, 0.998987197875977f, -0.031808607280254f,
-  0.998962640762329f, -0.032191313803196f, 0.998937785625458f, -0.032574005424976f,
-  0.998912692070007f, -0.032956674695015f, 0.998887240886688f, -0.033339329063892f,
-  0.998861551284790f, -0.033721961081028f, 0.998835504055023f, -0.034104570746422f,
-  0.998809218406677f, -0.034487165510654f, 0.998782634735107f, -0.034869734197855f,
-  0.998755753040314f, -0.035252287983894f, 0.998728513717651f, -0.035634815692902f,
-  0.998701035976410f, -0.036017324775457f, 0.998673319816589f, -0.036399815231562f,
-  0.998645246028900f, -0.036782283335924f, 0.998616874217987f, -0.037164725363255f,
-  0.998588204383850f, -0.037547148764133f, 0.998559296131134f, -0.037929553538561f,
-  0.998530030250549f, -0.038311932235956f, 0.998500525951386f, -0.038694288581610f,
-  0.998470664024353f, -0.039076622575521f, 0.998440563678741f, -0.039458930492401f,
-  0.998410165309906f, -0.039841219782829f, 0.998379468917847f, -0.040223482996225f,
-  0.998348474502563f, -0.040605723857880f, 0.998317182064056f, -0.040987938642502f,
-  0.998285591602325f, -0.041370131075382f, 0.998253703117371f, -0.041752301156521f,
-  0.998221516609192f, -0.042134445160627f, 0.998189091682434f, -0.042516563087702f,
-  0.998156309127808f, -0.042898654937744f, 0.998123228549957f, -0.043280724436045f,
-  0.998089909553528f, -0.043662767857313f, 0.998056292533875f, -0.044044785201550f,
-  0.998022377490997f, -0.044426776468754f, 0.997988104820251f, -0.044808741658926f,
-  0.997953593730927f, -0.045190680772066f, 0.997918784618378f, -0.045572593808174f,
-  0.997883677482605f, -0.045954477041960f, 0.997848331928253f, -0.046336337924004f,
-  0.997812628746033f, -0.046718169003725f, 0.997776627540588f, -0.047099970281124f,
-  0.997740387916565f, -0.047481749206781f, 0.997703790664673f, -0.047863494604826f,
-  0.997666954994202f, -0.048245213925838f, 0.997629821300507f, -0.048626907169819f,
-  0.997592389583588f, -0.049008570611477f, 0.997554600238800f, -0.049390204250813f,
-  0.997516572475433f, -0.049771808087826f, 0.997478306293488f, -0.050153385847807f,
-  0.997439682483673f, -0.050534930080175f, 0.997400760650635f, -0.050916448235512f,
-  0.997361540794373f, -0.051297932863235f, 0.997322082519531f, -0.051679391413927f,
-  0.997282266616821f, -0.052060816437006f, 0.997242212295532f, -0.052442211657763f,
-  0.997201859951019f, -0.052823577076197f, 0.997161149978638f, -0.053204908967018f,
-  0.997120201587677f, -0.053586211055517f, 0.997078955173492f, -0.053967483341694f,
-  0.997037410736084f, -0.054348722100258f, 0.996995627880096f, -0.054729927331209f,
-  0.996953487396240f, -0.055111102759838f, 0.996911048889160f, -0.055492244660854f,
-  0.996868371963501f, -0.055873356759548f, 0.996825337409973f, -0.056254431605339f,
-  0.996782064437866f, -0.056635476648808f, 0.996738493442535f, -0.057016488164663f,
-  0.996694624423981f, -0.057397462427616f, 0.996650457382202f, -0.057778406888247f,
-  0.996605992317200f, -0.058159314095974f, 0.996561229228973f, -0.058540191501379f,
-  0.996516168117523f, -0.058921031653881f, 0.996470808982849f, -0.059301838278770f,
-  0.996425211429596f, -0.059682607650757f, 0.996379256248474f, -0.060063343495131f,
-  0.996333062648773f, -0.060444042086601f, 0.996286571025848f, -0.060824707150459f,
-  0.996239781379700f, -0.061205338686705f, 0.996192693710327f, -0.061585929244757f,
-  0.996145308017731f, -0.061966486275196f, 0.996097624301910f, -0.062347009778023f,
-  0.996049642562866f, -0.062727488577366f, 0.996001422405243f, -0.063107937574387f,
-  0.995952844619751f, -0.063488349318504f, 0.995904028415680f, -0.063868723809719f,
-  0.995854854583740f, -0.064249053597450f, 0.995805442333221f, -0.064629353582859f,
-  0.995755732059479f, -0.065009608864784f, 0.995705723762512f, -0.065389834344387f,
-  0.995655417442322f, -0.065770015120506f, 0.995604813098907f, -0.066150158643723f,
-  0.995553970336914f, -0.066530264914036f, 0.995502769947052f, -0.066910326480865f,
-  0.995451331138611f, -0.067290350794792f, 0.995399534702301f, -0.067670337855816f,
-  0.995347499847412f, -0.068050287663937f, 0.995295166969299f, -0.068430192768574f,
-  0.995242536067963f, -0.068810060620308f, 0.995189607143402f, -0.069189883768559f,
-  0.995136380195618f, -0.069569669663906f, 0.995082914829254f, -0.069949418306351f,
-  0.995029091835022f, -0.070329122245312f, 0.994975030422211f, -0.070708781480789f,
-  0.994920611381531f, -0.071088403463364f, 0.994865953922272f, -0.071467980742455f,
-  0.994810998439789f, -0.071847513318062f, 0.994755744934082f, -0.072227008640766f,
-  0.994700193405151f, -0.072606459259987f, 0.994644403457642f, -0.072985872626305f,
-  0.994588255882263f, -0.073365233838558f, 0.994531810283661f, -0.073744557797909f,
-  0.994475126266479f, -0.074123837053776f, 0.994418144226074f, -0.074503071606159f,
-  0.994360864162445f, -0.074882268905640f, 0.994303286075592f, -0.075261414051056f,
-  0.994245409965515f, -0.075640521943569f, 0.994187235832214f, -0.076019577682018f,
-  0.994128763675690f, -0.076398596167564f, 0.994070053100586f, -0.076777562499046f,
-  0.994010984897614f, -0.077156484127045f, 0.993951678276062f, -0.077535368502140f,
-  0.993892073631287f, -0.077914200723171f, 0.993832170963287f, -0.078292988240719f,
-  0.993771970272064f, -0.078671731054783f, 0.993711471557617f, -0.079050421714783f,
-  0.993650734424591f, -0.079429075121880f, 0.993589639663696f, -0.079807676374912f,
-  0.993528306484222f, -0.080186225473881f, 0.993466615676880f, -0.080564737319946f,
-  0.993404686450958f, -0.080943197011948f, 0.993342459201813f, -0.081321612000465f,
-  0.993279933929443f, -0.081699974834919f, 0.993217170238495f, -0.082078292965889f,
-  0.993154048919678f, -0.082456558942795f, 0.993090689182281f, -0.082834780216217f,
-  0.993026971817017f, -0.083212949335575f, 0.992963016033173f, -0.083591073751450f,
-  0.992898762226105f, -0.083969146013260f, 0.992834210395813f, -0.084347173571587f,
-  0.992769360542297f, -0.084725148975849f, 0.992704212665558f, -0.085103072226048f,
-  0.992638826370239f, -0.085480943322182f, 0.992573142051697f, -0.085858769714832f,
-  0.992507100105286f, -0.086236543953419f, 0.992440819740295f, -0.086614266037941f,
-  0.992374241352081f, -0.086991935968399f, 0.992307364940643f, -0.087369553744793f,
-  0.992240250110626f, -0.087747126817703f, 0.992172777652740f, -0.088124647736549f,
-  0.992105066776276f, -0.088502109050751f, 0.992036998271942f, -0.088879525661469f,
-  0.991968691349030f, -0.089256882667542f, 0.991900086402893f, -0.089634194970131f,
-  0.991831183433533f, -0.090011447668076f, 0.991762042045593f, -0.090388655662537f,
-  0.991692543029785f, -0.090765804052353f, 0.991622805595398f, -0.091142900288105f,
-  0.991552770137787f, -0.091519944369793f, 0.991482377052307f, -0.091896936297417f,
-  0.991411805152893f, -0.092273868620396f, 0.991340875625610f, -0.092650748789310f,
-  0.991269648075104f, -0.093027576804161f, 0.991198182106018f, -0.093404345214367f,
-  0.991126358509064f, -0.093781061470509f, 0.991054296493530f, -0.094157725572586f,
-  0.990981936454773f, -0.094534330070019f, 0.990909278392792f, -0.094910882413387f,
-  0.990836322307587f, -0.095287375152111f, 0.990763127803802f, -0.095663815736771f,
-  0.990689575672150f, -0.096040196716785f, 0.990615785121918f, -0.096416525542736f,
-  0.990541696548462f, -0.096792794764042f, 0.990467309951782f, -0.097169004380703f,
-  0.990392625331879f, -0.097545161843300f, 0.990317702293396f, -0.097921259701252f,
-  0.990242421627045f, -0.098297297954559f, 0.990166902542114f, -0.098673284053802f,
-  0.990091085433960f, -0.099049203097820f, 0.990014970302582f, -0.099425069987774f,
-  0.989938557147980f, -0.099800877273083f, 0.989861845970154f, -0.100176624953747f,
-  0.989784896373749f, -0.100552320480347f, 0.989707589149475f, -0.100927948951721f,
-  0.989630043506622f, -0.101303517818451f, 0.989552199840546f, -0.101679034531116f,
-  0.989474058151245f, -0.102054484188557f, 0.989395678043365f, -0.102429874241352f,
-  0.989316940307617f, -0.102805204689503f, 0.989237964153290f, -0.103180475533009f,
-  0.989158689975739f, -0.103555686771870f, 0.989079117774963f, -0.103930838406086f,
-  0.988999247550964f, -0.104305922985077f, 0.988919138908386f, -0.104680955410004f,
-  0.988838672637939f, -0.105055920779705f, 0.988757967948914f, -0.105430819094181f,
-  0.988676965236664f, -0.105805665254593f, 0.988595664501190f, -0.106180444359779f,
-  0.988514065742493f, -0.106555156409740f, 0.988432228565216f, -0.106929816305637f,
-  0.988350033760071f, -0.107304409146309f, 0.988267600536346f, -0.107678934931755f,
-  0.988184869289398f, -0.108053401112556f, 0.988101840019226f, -0.108427800238132f,
-  0.988018512725830f, -0.108802139759064f, 0.987934947013855f, -0.109176412224770f,
-  0.987851083278656f, -0.109550617635250f, 0.987766921520233f, -0.109924763441086f,
-  0.987682461738586f, -0.110298842191696f, 0.987597703933716f, -0.110672861337662f,
-  0.987512648105621f, -0.111046813428402f, 0.987427353858948f, -0.111420698463917f,
-  0.987341761589050f, -0.111794516444206f, 0.987255871295929f, -0.112168267369270f,
-  0.987169682979584f, -0.112541958689690f, 0.987083256244659f, -0.112915575504303f,
-  0.986996471881866f, -0.113289132714272f, 0.986909449100494f, -0.113662622869015f,
-  0.986822128295898f, -0.114036038517952f, 0.986734509468079f, -0.114409394562244f,
-  0.986646652221680f, -0.114782683551311f, 0.986558437347412f, -0.115155905485153f,
-  0.986469984054565f, -0.115529052913189f, 0.986381232738495f, -0.115902140736580f,
-  0.986292183399200f, -0.116275154054165f, 0.986202836036682f, -0.116648100316525f,
-  0.986113250255585f, -0.117020979523659f, 0.986023366451263f, -0.117393791675568f,
-  0.985933184623718f, -0.117766529321671f, 0.985842704772949f, -0.118139199912548f,
-  0.985751926898956f, -0.118511803448200f, 0.985660910606384f, -0.118884332478046f,
-  0.985569596290588f, -0.119256794452667f, 0.985477983951569f, -0.119629189372063f,
-  0.985386073589325f, -0.120001509785652f, 0.985293865203857f, -0.120373763144016f,
-  0.985201418399811f, -0.120745941996574f, 0.985108673572540f, -0.121118053793907f,
-  0.985015630722046f, -0.121490091085434f, 0.984922289848328f, -0.121862053871155f,
-  0.984828710556030f, -0.122233949601650f, 0.984734773635864f, -0.122605770826340f,
-  0.984640598297119f, -0.122977524995804f, 0.984546124935150f, -0.123349204659462f,
-  0.984451413154602f, -0.123720809817314f, 0.984356343746185f, -0.124092340469360f,
-  0.984261035919189f, -0.124463804066181f, 0.984165430068970f, -0.124835193157196f,
-  0.984069526195526f, -0.125206500291824f, 0.983973383903503f, -0.125577747821808f,
-  0.983876943588257f, -0.125948905944824f, 0.983780145645142f, -0.126320004463196f,
-  0.983683168888092f, -0.126691013574600f, 0.983585834503174f, -0.127061963081360f,
-  0.983488261699677f, -0.127432823181152f, 0.983390331268311f, -0.127803623676300f,
-  0.983292162418365f, -0.128174334764481f, 0.983193755149841f, -0.128544986248016f,
-  0.983094990253448f, -0.128915548324585f, 0.982995986938477f, -0.129286035895348f,
-  0.982896685600281f, -0.129656463861465f, 0.982797086238861f, -0.130026802420616f,
-  0.982697248458862f, -0.130397051572800f, 0.982597053050995f, -0.130767241120338f,
-  0.982496619224548f, -0.131137356162071f, 0.982395887374878f, -0.131507381796837f,
-  0.982294917106628f, -0.131877332925797f, 0.982193589210510f, -0.132247209548950f,
-  0.982092022895813f, -0.132617011666298f, 0.981990158557892f, -0.132986739277840f,
-  0.981888055801392f, -0.133356377482414f, 0.981785595417023f, -0.133725941181183f,
-  0.981682896614075f, -0.134095430374146f, 0.981579899787903f, -0.134464830160141f,
-  0.981476604938507f, -0.134834155440331f, 0.981373071670532f, -0.135203406214714f,
-  0.981269240379334f, -0.135572582483292f, 0.981165111064911f, -0.135941669344902f,
-  0.981060683727264f, -0.136310681700706f, 0.980956017971039f, -0.136679604649544f,
-  0.980851054191589f, -0.137048453092575f, 0.980745792388916f, -0.137417227029800f,
-  0.980640232563019f, -0.137785911560059f, 0.980534434318542f, -0.138154521584511f,
-  0.980428338050842f, -0.138523042201996f, 0.980321943759918f, -0.138891488313675f,
-  0.980215251445770f, -0.139259845018387f, 0.980108320713043f, -0.139628127217293f,
-  0.980001091957092f, -0.139996320009232f, 0.979893565177917f, -0.140364438295364f,
-  0.979785740375519f, -0.140732467174530f, 0.979677677154541f, -0.141100421547890f,
-  0.979569315910339f, -0.141468286514282f, 0.979460656642914f, -0.141836062073708f,
-  0.979351758956909f, -0.142203763127327f, 0.979242503643036f, -0.142571389675140f,
-  0.979133009910584f, -0.142938911914825f, 0.979023277759552f, -0.143306359648705f,
-  0.978913187980652f, -0.143673732876778f, 0.978802859783173f, -0.144041016697884f,
-  0.978692233562469f, -0.144408211112022f, 0.978581368923187f, -0.144775316119194f,
-  0.978470146656036f, -0.145142331719399f, 0.978358685970306f, -0.145509272813797f,
-  0.978246986865997f, -0.145876124501228f, 0.978134930133820f, -0.146242901682854f,
-  0.978022634983063f, -0.146609574556351f, 0.977910041809082f, -0.146976172924042f,
-  0.977797150611877f, -0.147342681884766f, 0.977684020996094f, -0.147709101438522f,
-  0.977570593357086f, -0.148075446486473f, 0.977456867694855f, -0.148441687226295f,
-  0.977342903614044f, -0.148807853460312f, 0.977228581905365f, -0.149173930287361f,
-  0.977114021778107f, -0.149539917707443f, 0.976999223232269f, -0.149905815720558f,
-  0.976884067058563f, -0.150271624326706f, 0.976768672466278f, -0.150637343525887f,
-  0.976653039455414f, -0.151002973318100f, 0.976537048816681f, -0.151368513703346f,
-  0.976420819759369f, -0.151733979582787f, 0.976304292678833f, -0.152099341154099f,
-  0.976187527179718f, -0.152464613318443f, 0.976070404052734f, -0.152829796075821f,
-  0.975953042507172f, -0.153194904327393f, 0.975835442543030f, -0.153559908270836f,
-  0.975717484951019f, -0.153924822807312f, 0.975599288940430f, -0.154289647936821f,
-  0.975480854511261f, -0.154654383659363f, 0.975362062454224f, -0.155019029974937f,
-  0.975243031978607f, -0.155383571982384f, 0.975123703479767f, -0.155748039484024f,
-  0.975004136562347f, -0.156112402677536f, 0.974884271621704f, -0.156476691365242f,
-  0.974764108657837f, -0.156840875744820f, 0.974643647670746f, -0.157204970717430f,
-  0.974522948265076f, -0.157568961381912f, 0.974401950836182f, -0.157932877540588f,
-  0.974280655384064f, -0.158296689391136f, 0.974159121513367f, -0.158660411834717f,
-  0.974037289619446f, -0.159024044871330f, 0.973915159702301f, -0.159387573599815f,
-  0.973792791366577f, -0.159751012921333f, 0.973670125007629f, -0.160114362835884f,
-  0.973547160625458f, -0.160477623343468f, 0.973423957824707f, -0.160840779542923f,
-  0.973300457000732f, -0.161203846335411f, 0.973176658153534f, -0.161566808819771f,
-  0.973052620887756f, -0.161929681897163f, 0.972928285598755f, -0.162292465567589f,
-  0.972803652286530f, -0.162655144929886f, 0.972678780555725f, -0.163017734885216f,
-  0.972553610801697f, -0.163380220532417f, 0.972428143024445f, -0.163742616772652f,
-  0.972302436828613f, -0.164104923605919f, 0.972176432609558f, -0.164467126131058f,
-  0.972050130367279f, -0.164829224348068f, 0.971923589706421f, -0.165191248059273f,
-  0.971796751022339f, -0.165553152561188f, 0.971669614315033f, -0.165914967656136f,
-  0.971542239189148f, -0.166276678442955f, 0.971414566040039f, -0.166638299822807f,
-  0.971286594867706f, -0.166999831795692f, 0.971158385276794f, -0.167361244559288f,
-  0.971029877662659f, -0.167722567915916f, 0.970901072025299f, -0.168083801865578f,
-  0.970772027969360f, -0.168444931507111f, 0.970642685890198f, -0.168805956840515f,
-  0.970513105392456f, -0.169166877865791f, 0.970383226871490f, -0.169527709484100f,
-  0.970253050327301f, -0.169888436794281f, 0.970122575759888f, -0.170249074697495f,
-  0.969991862773895f, -0.170609608292580f, 0.969860911369324f, -0.170970037579536f,
-  0.969729602336884f, -0.171330362558365f, 0.969598054885864f, -0.171690583229065f,
-  0.969466269016266f, -0.172050714492798f, 0.969334125518799f, -0.172410741448402f,
-  0.969201743602753f, -0.172770664095879f, 0.969069123268127f, -0.173130482435226f,
-  0.968936204910278f, -0.173490211367607f, 0.968802988529205f, -0.173849821090698f,
-  0.968669533729553f, -0.174209341406822f, 0.968535780906677f, -0.174568757414818f,
-  0.968401730060577f, -0.174928069114685f, 0.968267440795898f, -0.175287276506424f,
-  0.968132853507996f, -0.175646379590034f, 0.967997968196869f, -0.176005378365517f,
-  0.967862844467163f, -0.176364272832870f, 0.967727422714233f, -0.176723077893257f,
-  0.967591762542725f, -0.177081763744354f, 0.967455804347992f, -0.177440345287323f,
-  0.967319548130035f, -0.177798837423325f, 0.967183053493500f, -0.178157210350037f,
-  0.967046260833740f, -0.178515478968620f, 0.966909229755402f, -0.178873643279076f,
-  0.966771900653839f, -0.179231703281403f, 0.966634273529053f, -0.179589673876762f,
-  0.966496407985687f, -0.179947525262833f, 0.966358244419098f, -0.180305257439613f,
-  0.966219842433929f, -0.180662900209427f, 0.966081082820892f, -0.181020438671112f,
-  0.965942144393921f, -0.181377857923508f, 0.965802907943726f, -0.181735187768936f,
-  0.965663373470306f, -0.182092398405075f, 0.965523540973663f, -0.182449504733086f,
-  0.965383470058441f, -0.182806491851807f, 0.965243160724640f, -0.183163389563560f,
-  0.965102493762970f, -0.183520168066025f, 0.964961588382721f, -0.183876842260361f,
-  0.964820444583893f, -0.184233412146568f, 0.964679002761841f, -0.184589877724648f,
-  0.964537262916565f, -0.184946224093437f, 0.964395284652710f, -0.185302466154099f,
-  0.964253067970276f, -0.185658603906631f, 0.964110493659973f, -0.186014622449875f,
-  0.963967680931091f, -0.186370536684990f, 0.963824629783630f, -0.186726331710815f,
-  0.963681280612946f, -0.187082037329674f, 0.963537633419037f, -0.187437608838081f,
-  0.963393747806549f, -0.187793090939522f, 0.963249564170837f, -0.188148453831673f,
-  0.963105142116547f, -0.188503712415695f, 0.962960422039032f, -0.188858851790428f,
-  0.962815403938293f, -0.189213871955872f, 0.962670147418976f, -0.189568802714348f,
-  0.962524592876434f, -0.189923599362373f, 0.962378799915314f, -0.190278306603432f,
-  0.962232708930969f, -0.190632879734039f, 0.962086379528046f, -0.190987363457680f,
-  0.961939752101898f, -0.191341713070869f, 0.961792886257172f, -0.191695958375931f,
-  0.961645722389221f, -0.192050099372864f, 0.961498260498047f, -0.192404121160507f,
-  0.961350560188293f, -0.192758023738861f, 0.961202561855316f, -0.193111822009087f,
-  0.961054325103760f, -0.193465501070023f, 0.960905790328979f, -0.193819075822830f,
-  0.960757017135620f, -0.194172516465187f, 0.960607945919037f, -0.194525867700577f,
-  0.960458636283875f, -0.194879084825516f, 0.960309028625488f, -0.195232197642326f,
-  0.960159122943878f, -0.195585191249847f, 0.960008978843689f, -0.195938065648079f,
-  0.959858596324921f, -0.196290835738182f, 0.959707856178284f, -0.196643486618996f,
-  0.959556937217712f, -0.196996018290520f, 0.959405720233917f, -0.197348430752754f,
-  0.959254205226898f, -0.197700738906860f, 0.959102451801300f, -0.198052927851677f,
-  0.958950400352478f, -0.198404997587204f, 0.958798050880432f, -0.198756948113441f,
-  0.958645522594452f, -0.199108779430389f, 0.958492636680603f, -0.199460506439209f,
-  0.958339512348175f, -0.199812099337578f, 0.958186149597168f, -0.200163587927818f,
-  0.958032488822937f, -0.200514942407608f, 0.957878530025482f, -0.200866192579269f,
-  0.957724332809448f, -0.201217323541641f, 0.957569897174835f, -0.201568335294724f,
-  0.957415163516998f, -0.201919227838516f, 0.957260131835938f, -0.202270001173019f,
-  0.957104861736298f, -0.202620655298233f, 0.956949353218079f, -0.202971190214157f,
-  0.956793546676636f, -0.203321605920792f, 0.956637442111969f, -0.203671902418137f,
-  0.956481099128723f, -0.204022079706192f, 0.956324458122253f, -0.204372137784958f,
-  0.956167578697205f, -0.204722076654434f, 0.956010460853577f, -0.205071896314621f,
-  0.955853044986725f, -0.205421581864357f, 0.955695331096649f, -0.205771163105965f,
-  0.955537378787994f, -0.206120610237122f, 0.955379128456116f, -0.206469938158989f,
-  0.955220639705658f, -0.206819161772728f, 0.955061912536621f, -0.207168251276016f,
-  0.954902827739716f, -0.207517206668854f, 0.954743564128876f, -0.207866057753563f,
-  0.954584002494812f, -0.208214774727821f, 0.954424142837524f, -0.208563387393951f,
-  0.954264044761658f, -0.208911851048470f, 0.954103708267212f, -0.209260210394859f,
-  0.953943073749542f, -0.209608450531960f, 0.953782141208649f, -0.209956556558609f,
-  0.953620970249176f, -0.210304543375969f, 0.953459560871124f, -0.210652396082878f,
-  0.953297853469849f, -0.211000129580498f, 0.953135907649994f, -0.211347743868828f,
-  0.952973663806915f, -0.211695238947868f, 0.952811121940613f, -0.212042599916458f,
-  0.952648401260376f, -0.212389841675758f, 0.952485322952271f, -0.212736949324608f,
-  0.952322065830231f, -0.213083937764168f, 0.952158451080322f, -0.213430806994438f,
-  0.951994657516479f, -0.213777542114258f, 0.951830565929413f, -0.214124158024788f,
-  0.951666176319122f, -0.214470639824867f, 0.951501548290253f, -0.214817002415657f,
-  0.951336681842804f, -0.215163245797157f, 0.951171517372131f, -0.215509355068207f,
-  0.951006054878235f, -0.215855330228806f, 0.950840353965759f, -0.216201186180115f,
-  0.950674414634705f, -0.216546908020973f, 0.950508177280426f, -0.216892510652542f,
-  0.950341701507568f, -0.217237979173660f, 0.950174987316132f, -0.217583328485489f,
-  0.950007975101471f, -0.217928543686867f, 0.949840664863586f, -0.218273624777794f,
-  0.949673116207123f, -0.218618586659431f, 0.949505329132080f, -0.218963414430618f,
-  0.949337244033813f, -0.219308122992516f, 0.949168920516968f, -0.219652697443962f,
-  0.949000298976898f, -0.219997137784958f, 0.948831439018250f, -0.220341444015503f,
-  0.948662281036377f, -0.220685631036758f, 0.948492884635925f, -0.221029683947563f,
-  0.948323249816895f, -0.221373617649078f, 0.948153316974640f, -0.221717402338982f,
-  0.947983145713806f, -0.222061067819595f, 0.947812676429749f, -0.222404599189758f,
-  0.947641968727112f, -0.222748011350632f, 0.947470963001251f, -0.223091274499893f,
-  0.947299718856812f, -0.223434418439865f, 0.947128236293793f, -0.223777428269386f,
-  0.946956455707550f, -0.224120303988457f, 0.946784436702728f, -0.224463045597076f,
-  0.946612179279327f, -0.224805667996407f, 0.946439623832703f, -0.225148141384125f,
-  0.946266770362854f, -0.225490495562553f, 0.946093678474426f, -0.225832715630531f,
-  0.945920348167419f, -0.226174786686897f, 0.945746779441834f, -0.226516738533974f,
-  0.945572853088379f, -0.226858556270599f, 0.945398747920990f, -0.227200239896774f,
-  0.945224344730377f, -0.227541789412498f, 0.945049703121185f, -0.227883204817772f,
-  0.944874763488770f, -0.228224486112595f, 0.944699645042419f, -0.228565633296967f,
-  0.944524168968201f, -0.228906646370888f, 0.944348454475403f, -0.229247525334358f,
-  0.944172501564026f, -0.229588270187378f, 0.943996310234070f, -0.229928880929947f,
-  0.943819820880890f, -0.230269357562065f, 0.943643093109131f, -0.230609700083733f,
-  0.943466067314148f, -0.230949893593788f, 0.943288803100586f, -0.231289967894554f,
-  0.943111240863800f, -0.231629893183708f, 0.942933499813080f, -0.231969684362412f,
-  0.942755401134491f, -0.232309341430664f, 0.942577123641968f, -0.232648864388466f,
-  0.942398548126221f, -0.232988253235817f, 0.942219734191895f, -0.233327493071556f,
-  0.942040622234344f, -0.233666598796844f, 0.941861271858215f, -0.234005570411682f,
-  0.941681683063507f, -0.234344407916069f, 0.941501796245575f, -0.234683111310005f,
-  0.941321671009064f, -0.235021665692329f, 0.941141307353973f, -0.235360085964203f,
-  0.940960645675659f, -0.235698372125626f, 0.940779745578766f, -0.236036509275436f,
-  0.940598547458649f, -0.236374512314796f, 0.940417110919952f, -0.236712381243706f,
-  0.940235435962677f, -0.237050101161003f, 0.940053522586823f, -0.237387686967850f,
-  0.939871311187744f, -0.237725138664246f, 0.939688861370087f, -0.238062441349030f,
-  0.939506113529205f, -0.238399609923363f, 0.939323127269745f, -0.238736644387245f,
-  0.939139902591705f, -0.239073529839516f, 0.938956379890442f, -0.239410281181335f,
-  0.938772618770599f, -0.239746883511543f, 0.938588619232178f, -0.240083336830139f,
-  0.938404381275177f, -0.240419670939446f, 0.938219845294952f, -0.240755841135979f,
-  0.938035070896149f, -0.241091892123222f, 0.937849998474121f, -0.241427779197693f,
-  0.937664687633514f, -0.241763532161713f, 0.937479138374329f, -0.242099151015282f,
-  0.937293350696564f, -0.242434620857239f, 0.937107264995575f, -0.242769956588745f,
-  0.936920940876007f, -0.243105143308640f, 0.936734318733215f, -0.243440181016922f,
-  0.936547517776489f, -0.243775084614754f, 0.936360359191895f, -0.244109839200974f,
-  0.936173021793365f, -0.244444444775581f, 0.935985386371613f, -0.244778916239738f,
-  0.935797572135925f, -0.245113238692284f, 0.935609400272369f, -0.245447427034378f,
-  0.935421049594879f, -0.245781451463699f, 0.935232400894165f, -0.246115356683731f,
-  0.935043513774872f, -0.246449097990990f, 0.934854328632355f, -0.246782705187798f,
-  0.934664964675903f, -0.247116148471832f, 0.934475243091583f, -0.247449472546577f,
-  0.934285342693329f, -0.247782632708550f, 0.934095203876495f, -0.248115643858910f,
-  0.933904767036438f, -0.248448520898819f, 0.933714091777802f, -0.248781248927116f,
-  0.933523118495941f, -0.249113827943802f, 0.933331906795502f, -0.249446272850037f,
-  0.933140456676483f, -0.249778553843498f, 0.932948768138886f, -0.250110685825348f,
-  0.932756841182709f, -0.250442683696747f, 0.932564616203308f, -0.250774532556534f,
-  0.932372152805328f, -0.251106232404709f, 0.932179391384125f, -0.251437783241272f,
-  0.931986451148987f, -0.251769185066223f, 0.931793212890625f, -0.252100437879562f,
-  0.931599736213684f, -0.252431541681290f, 0.931405961513519f, -0.252762526273727f,
-  0.931211948394775f, -0.253093332052231f, 0.931017756462097f, -0.253423988819122f,
-  0.930823206901550f, -0.253754496574402f, 0.930628478527069f, -0.254084855318069f,
-  0.930433452129364f, -0.254415065050125f, 0.930238187313080f, -0.254745125770569f,
-  0.930042684078217f, -0.255075037479401f, 0.929846942424774f, -0.255404800176620f,
-  0.929650902748108f, -0.255734413862228f, 0.929454624652863f, -0.256063878536224f,
-  0.929258108139038f, -0.256393194198608f, 0.929061353206635f, -0.256722360849380f,
-  0.928864300251007f, -0.257051378488541f, 0.928667008876801f, -0.257380217313766f,
-  0.928469479084015f, -0.257708936929703f, 0.928271710872650f, -0.258037507534027f,
-  0.928073644638062f, -0.258365899324417f, 0.927875399589539f, -0.258694142103195f,
-  0.927676856517792f, -0.259022265672684f, 0.927478015422821f, -0.259350210428238f,
-  0.927278995513916f, -0.259678006172180f, 0.927079677581787f, -0.260005623102188f,
-  0.926880121231079f, -0.260333120822906f, 0.926680326461792f, -0.260660469532013f,
-  0.926480293273926f, -0.260987639427185f, 0.926280021667480f, -0.261314690113068f,
-  0.926079452037811f, -0.261641561985016f, 0.925878643989563f, -0.261968284845352f,
-  0.925677597522736f, -0.262294828891754f, 0.925476312637329f, -0.262621253728867f,
-  0.925274729728699f, -0.262947499752045f, 0.925072908401489f, -0.263273626565933f,
-  0.924870908260345f, -0.263599574565887f, 0.924668610095978f, -0.263925373554230f,
-  0.924466013908386f, -0.264250993728638f, 0.924263238906860f, -0.264576494693756f,
-  0.924060165882111f, -0.264901816844940f, 0.923856854438782f, -0.265226989984512f,
-  0.923653304576874f, -0.265552014112473f, 0.923449516296387f, -0.265876859426498f,
-  0.923245489597321f, -0.266201555728912f, 0.923041164875031f, -0.266526103019714f,
-  0.922836601734161f, -0.266850501298904f, 0.922631800174713f, -0.267174720764160f,
-  0.922426760196686f, -0.267498821020126f, 0.922221481800079f, -0.267822742462158f,
-  0.922015964984894f, -0.268146485090256f, 0.921810150146484f, -0.268470078706741f,
-  0.921604096889496f, -0.268793523311615f, 0.921397805213928f, -0.269116818904877f,
-  0.921191275119781f, -0.269439965486526f, 0.920984506607056f, -0.269762933254242f,
-  0.920777499675751f, -0.270085722208023f, 0.920570194721222f, -0.270408391952515f,
-  0.920362710952759f, -0.270730882883072f, 0.920154929161072f, -0.271053224802017f,
-  0.919946908950806f, -0.271375387907028f, 0.919738650321960f, -0.271697402000427f,
-  0.919530093669891f, -0.272019267082214f, 0.919321358203888f, -0.272340953350067f,
-  0.919112324714661f, -0.272662490606308f, 0.918903112411499f, -0.272983878850937f,
-  0.918693602085114f, -0.273305088281631f, 0.918483853340149f, -0.273626148700714f,
-  0.918273866176605f, -0.273947030305862f, 0.918063640594482f, -0.274267762899399f,
-  0.917853116989136f, -0.274588316679001f, 0.917642414569855f, -0.274908751249313f,
-  0.917431414127350f, -0.275228977203369f, 0.917220234870911f, -0.275549083948135f,
-  0.917008757591248f, -0.275868982076645f, 0.916797041893005f, -0.276188760995865f,
-  0.916585087776184f, -0.276508361101151f, 0.916372895240784f, -0.276827782392502f,
-  0.916160404682159f, -0.277147054672241f, 0.915947735309601f, -0.277466177940369f,
-  0.915734827518463f, -0.277785122394562f, 0.915521621704102f, -0.278103888034821f,
-  0.915308177471161f, -0.278422504663467f, 0.915094554424286f, -0.278740972280502f,
-  0.914880633354187f, -0.279059261083603f, 0.914666473865509f, -0.279377400875092f,
-  0.914452075958252f, -0.279695361852646f, 0.914237439632416f, -0.280013144016266f,
-  0.914022505283356f, -0.280330777168274f, 0.913807392120361f, -0.280648261308670f,
-  0.913592040538788f, -0.280965566635132f, 0.913376390933990f, -0.281282693147659f,
-  0.913160502910614f, -0.281599670648575f, 0.912944436073303f, -0.281916469335556f,
-  0.912728071212769f, -0.282233119010925f, 0.912511467933655f, -0.282549589872360f,
-  0.912294626235962f, -0.282865911722183f, 0.912077546119690f, -0.283182054758072f,
-  0.911860227584839f, -0.283498018980026f, 0.911642670631409f, -0.283813834190369f,
-  0.911424875259399f, -0.284129470586777f, 0.911206841468811f, -0.284444957971573f,
-  0.910988569259644f, -0.284760266542435f, 0.910769999027252f, -0.285075396299362f,
-  0.910551249980927f, -0.285390377044678f, 0.910332262516022f, -0.285705178976059f,
-  0.910112977027893f, -0.286019802093506f, 0.909893512725830f, -0.286334276199341f,
-  0.909673750400543f, -0.286648571491241f, 0.909453809261322f, -0.286962717771530f,
-  0.909233570098877f, -0.287276685237885f, 0.909013092517853f, -0.287590473890305f,
-  0.908792436122894f, -0.287904083728790f, 0.908571481704712f, -0.288217544555664f,
-  0.908350288867950f, -0.288530826568604f, 0.908128857612610f, -0.288843959569931f,
-  0.907907187938690f, -0.289156883955002f, 0.907685279846191f, -0.289469659328461f,
-  0.907463192939758f, -0.289782285690308f, 0.907240808010101f, -0.290094703435898f,
-  0.907018184661865f, -0.290406972169876f, 0.906795322895050f, -0.290719062089920f,
-  0.906572222709656f, -0.291031002998352f, 0.906348884105682f, -0.291342735290527f,
-  0.906125307083130f, -0.291654318571091f, 0.905901491641998f, -0.291965723037720f,
-  0.905677437782288f, -0.292276978492737f, 0.905453145503998f, -0.292588025331497f,
-  0.905228614807129f, -0.292898923158646f, 0.905003845691681f, -0.293209642171860f,
-  0.904778838157654f, -0.293520182371140f, 0.904553592205048f, -0.293830573558807f,
-  0.904328107833862f, -0.294140785932541f, 0.904102385044098f, -0.294450789690018f,
-  0.903876423835754f, -0.294760644435883f, 0.903650224208832f, -0.295070350170136f,
-  0.903423786163330f, -0.295379847288132f, 0.903197109699249f, -0.295689195394516f,
-  0.902970194816589f, -0.295998334884644f, 0.902743041515350f, -0.296307325363159f,
-  0.902515649795532f, -0.296616137027740f, 0.902288019657135f, -0.296924799680710f,
-  0.902060210704803f, -0.297233253717422f, 0.901832103729248f, -0.297541528940201f,
-  0.901603758335114f, -0.297849655151367f, 0.901375174522400f, -0.298157602548599f,
-  0.901146411895752f, -0.298465341329575f, 0.900917351245880f, -0.298772931098938f,
-  0.900688111782074f, -0.299080342054367f, 0.900458574295044f, -0.299387603998184f,
-  0.900228857994080f, -0.299694657325745f, 0.899998843669891f, -0.300001531839371f,
-  0.899768650531769f, -0.300308227539063f, 0.899538159370422f, -0.300614774227142f,
-  0.899307489395142f, -0.300921112298965f, 0.899076581001282f, -0.301227301359177f,
-  0.898845434188843f, -0.301533311605453f, 0.898614048957825f, -0.301839113235474f,
-  0.898382425308228f, -0.302144765853882f, 0.898150563240051f, -0.302450239658356f,
-  0.897918462753296f, -0.302755534648895f, 0.897686123847961f, -0.303060621023178f,
-  0.897453546524048f, -0.303365558385849f, 0.897220790386200f, -0.303670316934586f,
-  0.896987736225128f, -0.303974896669388f, 0.896754503250122f, -0.304279297590256f,
-  0.896520972251892f, -0.304583519697189f, 0.896287262439728f, -0.304887533187866f,
-  0.896053314208984f, -0.305191397666931f, 0.895819067955017f, -0.305495083332062f,
-  0.895584642887115f, -0.305798590183258f, 0.895349979400635f, -0.306101888418198f,
-  0.895115137100220f, -0.306405037641525f, 0.894879996776581f, -0.306708008050919f,
-  0.894644618034363f, -0.307010769844055f, 0.894409060478210f, -0.307313382625580f,
-  0.894173204898834f, -0.307615786790848f, 0.893937170505524f, -0.307918041944504f,
-  0.893700897693634f, -0.308220088481903f, 0.893464326858521f, -0.308521956205368f,
-  0.893227577209473f, -0.308823645114899f, 0.892990648746490f, -0.309125155210495f,
-  0.892753422260284f, -0.309426486492157f, 0.892515957355499f, -0.309727638959885f,
-  0.892278313636780f, -0.310028612613678f, 0.892040371894836f, -0.310329377651215f,
-  0.891802251338959f, -0.310629993677139f, 0.891563892364502f, -0.310930401086807f,
-  0.891325294971466f, -0.311230629682541f, 0.891086459159851f, -0.311530679464340f,
-  0.890847444534302f, -0.311830550432205f, 0.890608131885529f, -0.312130242586136f,
-  0.890368640422821f, -0.312429755926132f, 0.890128850936890f, -0.312729060649872f,
-  0.889888882637024f, -0.313028186559677f, 0.889648675918579f, -0.313327133655548f,
-  0.889408230781555f, -0.313625901937485f, 0.889167606830597f, -0.313924491405487f,
-  0.888926684856415f, -0.314222872257233f, 0.888685584068298f, -0.314521104097366f,
-  0.888444244861603f, -0.314819127321243f, 0.888202667236328f, -0.315116971731186f,
-  0.887960851192474f, -0.315414607524872f, 0.887718796730042f, -0.315712094306946f,
-  0.887476563453674f, -0.316009372472763f, 0.887234091758728f, -0.316306471824646f,
-  0.886991322040558f, -0.316603392362595f, 0.886748373508453f, -0.316900104284287f,
-  0.886505246162415f, -0.317196637392044f, 0.886261820793152f, -0.317492991685867f,
-  0.886018216609955f, -0.317789167165756f, 0.885774314403534f, -0.318085134029388f,
-  0.885530233383179f, -0.318380922079086f, 0.885285973548889f, -0.318676531314850f,
-  0.885041415691376f, -0.318971961736679f, 0.884796679019928f, -0.319267183542252f,
-  0.884551644325256f, -0.319562226533890f, 0.884306430816650f, -0.319857090711594f,
-  0.884061038494110f, -0.320151746273041f, 0.883815348148346f, -0.320446223020554f,
-  0.883569478988647f, -0.320740520954132f, 0.883323311805725f, -0.321034610271454f,
-  0.883076965808868f, -0.321328520774841f, 0.882830440998077f, -0.321622252464294f,
-  0.882583618164063f, -0.321915775537491f, 0.882336616516113f, -0.322209119796753f,
-  0.882089376449585f, -0.322502255439758f, 0.881841897964478f, -0.322795242071152f,
-  0.881594181060791f, -0.323088020086288f, 0.881346285343170f, -0.323380589485168f,
-  0.881098151206970f, -0.323672980070114f, 0.880849778652191f, -0.323965191841125f,
-  0.880601167678833f, -0.324257194995880f, 0.880352377891541f, -0.324549019336700f,
-  0.880103349685669f, -0.324840664863586f, 0.879854083061218f, -0.325132101774216f,
-  0.879604578018188f, -0.325423330068588f, 0.879354894161224f, -0.325714409351349f,
-  0.879104971885681f, -0.326005280017853f, 0.878854811191559f, -0.326295942068100f,
-  0.878604412078857f, -0.326586425304413f, 0.878353834152222f, -0.326876699924469f,
-  0.878103017807007f, -0.327166795730591f, 0.877851963043213f, -0.327456712722778f,
-  0.877600669860840f, -0.327746421098709f, 0.877349197864532f, -0.328035950660706f,
-  0.877097487449646f, -0.328325271606445f, 0.876845538616180f, -0.328614413738251f,
-  0.876593410968781f, -0.328903347253799f, 0.876341044902802f, -0.329192101955414f,
-  0.876088440418243f, -0.329480648040771f, 0.875835597515106f, -0.329769015312195f,
-  0.875582575798035f, -0.330057173967361f, 0.875329315662384f, -0.330345153808594f,
-  0.875075817108154f, -0.330632925033569f, 0.874822139739990f, -0.330920487642288f,
-  0.874568223953247f, -0.331207901239395f, 0.874314069747925f, -0.331495076417923f,
-  0.874059677124023f, -0.331782072782516f, 0.873805105686188f, -0.332068890333176f,
-  0.873550295829773f, -0.332355499267578f, 0.873295307159424f, -0.332641899585724f,
-  0.873040020465851f, -0.332928121089935f, 0.872784554958344f, -0.333214133977890f,
-  0.872528910636902f, -0.333499968051910f, 0.872272968292236f, -0.333785593509674f,
-  0.872016847133636f, -0.334071010351181f, 0.871760547161102f, -0.334356248378754f,
-  0.871503949165344f, -0.334641307592392f, 0.871247172355652f, -0.334926128387451f,
-  0.870990216732025f, -0.335210770368576f, 0.870733022689819f, -0.335495233535767f,
-  0.870475590229034f, -0.335779488086700f, 0.870217919349670f, -0.336063534021378f,
-  0.869960069656372f, -0.336347371339798f, 0.869701981544495f, -0.336631029844284f,
-  0.869443655014038f, -0.336914509534836f, 0.869185149669647f, -0.337197750806808f,
-  0.868926405906677f, -0.337480813264847f, 0.868667483329773f, -0.337763696908951f,
-  0.868408262729645f, -0.338046342134476f, 0.868148922920227f, -0.338328808546066f,
-  0.867889285087585f, -0.338611096143723f, 0.867629468441010f, -0.338893145322800f,
-  0.867369413375854f, -0.339175015687943f, 0.867109179496765f, -0.339456677436829f,
-  0.866848707199097f, -0.339738160371780f, 0.866588056087494f, -0.340019434690475f,
-  0.866327106952667f, -0.340300500392914f, 0.866066038608551f, -0.340581357479095f,
-  0.865804672241211f, -0.340862035751343f, 0.865543127059937f, -0.341142505407333f,
-  0.865281403064728f, -0.341422766447067f, 0.865019381046295f, -0.341702848672867f,
-  0.864757239818573f, -0.341982692480087f, 0.864494800567627f, -0.342262357473373f,
-  0.864232182502747f, -0.342541843652725f, 0.863969385623932f, -0.342821091413498f,
-  0.863706290721893f, -0.343100160360336f, 0.863443076610565f, -0.343379020690918f,
-  0.863179564476013f, -0.343657672405243f, 0.862915873527527f, -0.343936115503311f,
-  0.862652003765106f, -0.344214379787445f, 0.862387895584106f, -0.344492435455322f,
-  0.862123548984528f, -0.344770282506943f, 0.861859023571014f, -0.345047920942307f,
-  0.861594259738922f, -0.345325350761414f, 0.861329257488251f, -0.345602601766586f,
-  0.861064076423645f, -0.345879614353180f, 0.860798716545105f, -0.346156448125839f,
-  0.860533118247986f, -0.346433073282242f, 0.860267281532288f, -0.346709519624710f,
-  0.860001266002655f, -0.346985727548599f, 0.859735012054443f, -0.347261756658554f,
-  0.859468579292297f, -0.347537547349930f, 0.859201908111572f, -0.347813159227371f,
-  0.858934998512268f, -0.348088562488556f, 0.858667910099030f, -0.348363757133484f,
-  0.858400642871857f, -0.348638743162155f, 0.858133137226105f, -0.348913550376892f,
-  0.857865393161774f, -0.349188119173050f, 0.857597470283508f, -0.349462509155273f,
-  0.857329368591309f, -0.349736660718918f, 0.857060968875885f, -0.350010633468628f,
-  0.856792449951172f, -0.350284397602081f, 0.856523692607880f, -0.350557953119278f,
-  0.856254696846008f, -0.350831300020218f, 0.855985522270203f, -0.351104438304901f,
-  0.855716109275818f, -0.351377367973328f, 0.855446517467499f, -0.351650089025497f,
-  0.855176687240601f, -0.351922631263733f, 0.854906618595123f, -0.352194935083389f,
-  0.854636430740356f, -0.352467030286789f, 0.854365944862366f, -0.352738946676254f,
-  0.854095339775085f, -0.353010624647141f, 0.853824436664581f, -0.353282123804092f,
-  0.853553414344788f, -0.353553384542465f, 0.853282094001770f, -0.353824466466904f,
-  0.853010654449463f, -0.354095309972763f, 0.852738916873932f, -0.354365974664688f,
-  0.852467060089111f, -0.354636400938034f, 0.852194905281067f, -0.354906648397446f,
-  0.851922631263733f, -0.355176687240601f, 0.851650118827820f, -0.355446487665176f,
-  0.851377367973328f, -0.355716109275818f, 0.851104438304901f, -0.355985492467880f,
-  0.850831270217896f, -0.356254696846008f, 0.850557923316956f, -0.356523662805557f,
-  0.850284397602081f, -0.356792420148849f, 0.850010633468628f, -0.357060998678207f,
-  0.849736690521240f, -0.357329338788986f, 0.849462509155273f, -0.357597470283508f,
-  0.849188148975372f, -0.357865422964096f, 0.848913550376892f, -0.358133137226105f,
-  0.848638772964478f, -0.358400642871857f, 0.848363757133484f, -0.358667939901352f,
-  0.848088562488556f, -0.358935028314590f, 0.847813189029694f, -0.359201908111572f,
-  0.847537577152252f, -0.359468549489975f, 0.847261726856232f, -0.359735012054443f,
-  0.846985757350922f, -0.360001266002655f, 0.846709489822388f, -0.360267281532288f,
-  0.846433103084564f, -0.360533088445663f, 0.846156477928162f, -0.360798716545105f,
-  0.845879614353180f, -0.361064106225967f, 0.845602571964264f, -0.361329287290573f,
-  0.845325350761414f, -0.361594229936600f, 0.845047891139984f, -0.361858993768692f,
-  0.844770252704620f, -0.362123548984528f, 0.844492435455322f, -0.362387865781784f,
-  0.844214379787445f, -0.362651973962784f, 0.843936145305634f, -0.362915903329849f,
-  0.843657672405243f, -0.363179564476013f, 0.843379020690918f, -0.363443046808243f,
-  0.843100130558014f, -0.363706320524216f, 0.842821121215820f, -0.363969355821610f,
-  0.842541813850403f, -0.364232182502747f, 0.842262387275696f, -0.364494800567627f,
-  0.841982722282410f, -0.364757210016251f, 0.841702818870544f, -0.365019410848618f,
-  0.841422796249390f, -0.365281373262405f, 0.841142535209656f, -0.365543156862259f,
-  0.840862035751343f, -0.365804702043533f, 0.840581357479095f, -0.366066008806229f,
-  0.840300500392914f, -0.366327136754990f, 0.840019404888153f, -0.366588026285172f,
-  0.839738130569458f, -0.366848707199097f, 0.839456677436829f, -0.367109179496765f,
-  0.839175045490265f, -0.367369443178177f, 0.838893175125122f, -0.367629468441010f,
-  0.838611066341400f, -0.367889285087585f, 0.838328838348389f, -0.368148893117905f,
-  0.838046371936798f, -0.368408292531967f, 0.837763667106628f, -0.368667453527451f,
-  0.837480843067169f, -0.368926405906677f, 0.837197780609131f, -0.369185149669647f,
-  0.836914479732513f, -0.369443655014038f, 0.836631059646606f, -0.369701951742172f,
-  0.836347401142120f, -0.369960039854050f, 0.836063504219055f, -0.370217919349670f,
-  0.835779488086700f, -0.370475560426712f, 0.835495233535767f, -0.370732992887497f,
-  0.835210800170898f, -0.370990216732025f, 0.834926128387451f, -0.371247202157974f,
-  0.834641277790070f, -0.371503978967667f, 0.834356248378754f, -0.371760547161102f,
-  0.834071040153503f, -0.372016876935959f, 0.833785593509674f, -0.372272998094559f,
-  0.833499968051910f, -0.372528880834579f, 0.833214163780212f, -0.372784584760666f,
-  0.832928121089935f, -0.373040050268173f, 0.832641899585724f, -0.373295277357101f,
-  0.832355499267578f, -0.373550295829773f, 0.832068860530853f, -0.373805105686188f,
-  0.831782102584839f, -0.374059677124023f, 0.831495106220245f, -0.374314039945602f,
-  0.831207871437073f, -0.374568194150925f, 0.830920517444611f, -0.374822109937668f,
-  0.830632925033569f, -0.375075817108154f, 0.830345153808594f, -0.375329315662384f,
-  0.830057144165039f, -0.375582575798035f, 0.829769015312195f, -0.375835597515106f,
-  0.829480648040771f, -0.376088410615921f, 0.829192101955414f, -0.376341015100479f,
-  0.828903317451477f, -0.376593410968781f, 0.828614413738251f, -0.376845568418503f,
-  0.828325271606445f, -0.377097487449646f, 0.828035950660706f, -0.377349197864532f,
-  0.827746450901031f, -0.377600699663162f, 0.827456712722778f, -0.377851963043213f,
-  0.827166795730591f, -0.378102988004684f, 0.826876699924469f, -0.378353834152222f,
-  0.826586425304413f, -0.378604412078857f, 0.826295912265778f, -0.378854811191559f,
-  0.826005280017853f, -0.379104942083359f, 0.825714409351349f, -0.379354894161224f,
-  0.825423359870911f, -0.379604607820511f, 0.825132071971893f, -0.379854083061218f,
-  0.824840664863586f, -0.380103349685669f, 0.824549019336700f, -0.380352377891541f,
-  0.824257194995880f, -0.380601197481155f, 0.823965191841125f, -0.380849778652191f,
-  0.823673009872437f, -0.381098151206970f, 0.823380589485168f, -0.381346285343170f,
-  0.823087990283966f, -0.381594210863113f, 0.822795212268829f, -0.381841897964478f,
-  0.822502255439758f, -0.382089376449585f, 0.822209119796753f, -0.382336616516113f,
-  0.821915745735168f, -0.382583618164063f, 0.821622252464294f, -0.382830440998077f,
-  0.821328520774841f, -0.383076995611191f, 0.821034610271454f, -0.383323341608047f,
-  0.820740520954132f, -0.383569449186325f, 0.820446193218231f, -0.383815348148346f,
-  0.820151746273041f, -0.384061008691788f, 0.819857060909271f, -0.384306460618973f,
-  0.819562196731567f, -0.384551674127579f, 0.819267153739929f, -0.384796649217606f,
-  0.818971931934357f, -0.385041415691376f, 0.818676531314850f, -0.385285943746567f,
-  0.818380951881409f, -0.385530263185501f, 0.818085134029388f, -0.385774344205856f,
-  0.817789137363434f, -0.386018186807632f, 0.817493021488190f, -0.386261820793152f,
-  0.817196667194366f, -0.386505216360092f, 0.816900074481964f, -0.386748403310776f,
-  0.816603362560272f, -0.386991351842880f, 0.816306471824646f, -0.387234061956406f,
-  0.816009342670441f, -0.387476563453674f, 0.815712094306946f, -0.387718826532364f,
-  0.815414607524872f, -0.387960851192474f, 0.815116941928864f, -0.388202667236328f,
-  0.814819097518921f, -0.388444244861603f, 0.814521074295044f, -0.388685584068298f,
-  0.814222872257233f, -0.388926714658737f, 0.813924491405487f, -0.389167606830597f,
-  0.813625931739807f, -0.389408260583878f, 0.813327133655548f, -0.389648675918579f,
-  0.813028216362000f, -0.389888882637024f, 0.812729060649872f, -0.390128880739212f,
-  0.812429726123810f, -0.390368610620499f, 0.812130272388458f, -0.390608131885529f,
-  0.811830580234528f, -0.390847414731979f, 0.811530709266663f, -0.391086459159851f,
-  0.811230659484863f, -0.391325294971466f, 0.810930430889130f, -0.391563892364502f,
-  0.810629963874817f, -0.391802251338959f, 0.810329377651215f, -0.392040401697159f,
-  0.810028612613678f, -0.392278283834457f, 0.809727668762207f, -0.392515957355499f,
-  0.809426486492157f, -0.392753422260284f, 0.809125185012817f, -0.392990618944168f,
-  0.808823645114899f, -0.393227607011795f, 0.808521986007690f, -0.393464356660843f,
-  0.808220088481903f, -0.393700867891312f, 0.807918012142181f, -0.393937170505524f,
-  0.807615816593170f, -0.394173204898834f, 0.807313382625580f, -0.394409030675888f,
-  0.807010769844055f, -0.394644618034363f, 0.806707978248596f, -0.394879996776581f,
-  0.806405067443848f, -0.395115107297897f, 0.806101918220520f, -0.395350009202957f,
-  0.805798590183258f, -0.395584672689438f, 0.805495083332062f, -0.395819097757339f,
-  0.805191397666931f, -0.396053284406662f, 0.804887533187866f, -0.396287262439728f,
-  0.804583489894867f, -0.396520972251892f, 0.804279267787933f, -0.396754473447800f,
-  0.803974866867065f, -0.396987736225128f, 0.803670346736908f, -0.397220760583878f,
-  0.803365588188171f, -0.397453576326370f, 0.803060650825500f, -0.397686123847961f,
-  0.802755534648895f, -0.397918462753296f, 0.802450239658356f, -0.398150533437729f,
-  0.802144765853882f, -0.398382395505905f, 0.801839113235474f, -0.398614019155502f,
-  0.801533281803131f, -0.398845434188843f, 0.801227271556854f, -0.399076581001282f,
-  0.800921142101288f, -0.399307489395142f, 0.800614774227142f, -0.399538189172745f,
-  0.800308227539063f, -0.399768620729446f, 0.800001561641693f, -0.399998843669891f,
-  0.799694657325745f, -0.400228828191757f, 0.799387574195862f, -0.400458574295044f,
-  0.799080371856689f, -0.400688081979752f, 0.798772931098938f, -0.400917351245880f,
-  0.798465371131897f, -0.401146411895752f, 0.798157572746277f, -0.401375204324722f,
-  0.797849655151367f, -0.401603758335114f, 0.797541558742523f, -0.401832103729248f,
-  0.797233223915100f, -0.402060180902481f, 0.796924769878387f, -0.402288049459457f,
-  0.796616137027740f, -0.402515679597855f, 0.796307325363159f, -0.402743041515350f,
-  0.795998334884644f, -0.402970194816589f, 0.795689165592194f, -0.403197109699249f,
-  0.795379877090454f, -0.403423786163330f, 0.795070350170136f, -0.403650224208832f,
-  0.794760644435883f, -0.403876423835754f, 0.794450819492340f, -0.404102355241776f,
-  0.794140756130219f, -0.404328078031540f, 0.793830573558807f, -0.404553562402725f,
-  0.793520212173462f, -0.404778808355331f, 0.793209671974182f, -0.405003815889359f,
-  0.792898952960968f, -0.405228585004807f, 0.792588055133820f, -0.405453115701675f,
-  0.792276978492737f, -0.405677437782288f, 0.791965723037720f, -0.405901491641998f,
-  0.791654348373413f, -0.406125307083130f, 0.791342735290527f, -0.406348884105682f,
-  0.791031002998352f, -0.406572192907333f, 0.790719091892242f, -0.406795293092728f,
-  0.790407001972198f, -0.407018154859543f, 0.790094733238220f, -0.407240778207779f,
-  0.789782285690308f, -0.407463163137436f, 0.789469659328461f, -0.407685309648514f,
-  0.789156913757324f, -0.407907217741013f, 0.788843929767609f, -0.408128857612610f,
-  0.788530826568604f, -0.408350288867950f, 0.788217544555664f, -0.408571451902390f,
-  0.787904083728790f, -0.408792406320572f, 0.787590444087982f, -0.409013092517853f,
-  0.787276685237885f, -0.409233570098877f, 0.786962687969208f, -0.409453779459000f,
-  0.786648571491241f, -0.409673750400543f, 0.786334276199341f, -0.409893482923508f,
-  0.786019802093506f, -0.410112977027893f, 0.785705149173737f, -0.410332232713699f,
-  0.785390377044678f, -0.410551249980927f, 0.785075426101685f, -0.410770028829575f,
-  0.784760236740112f, -0.410988569259644f, 0.784444928169250f, -0.411206841468811f,
-  0.784129500389099f, -0.411424905061722f, 0.783813834190369f, -0.411642700433731f,
-  0.783498048782349f, -0.411860257387161f, 0.783182024955750f, -0.412077575922012f,
-  0.782865881919861f, -0.412294656038284f, 0.782549619674683f, -0.412511497735977f,
-  0.782233119010925f, -0.412728071212769f, 0.781916499137878f, -0.412944436073303f,
-  0.781599700450897f, -0.413160532712936f, 0.781282722949982f, -0.413376390933990f,
-  0.780965566635132f, -0.413592010736465f, 0.780648231506348f, -0.413807392120361f,
-  0.780330777168274f, -0.414022535085678f, 0.780013144016266f, -0.414237409830093f,
-  0.779695332050323f, -0.414452046155930f, 0.779377400875092f, -0.414666473865509f,
-  0.779059290885925f, -0.414880603551865f, 0.778741002082825f, -0.415094524621964f,
-  0.778422534465790f, -0.415308207273483f, 0.778103888034821f, -0.415521621704102f,
-  0.777785122394562f, -0.415734797716141f, 0.777466177940369f, -0.415947735309601f,
-  0.777147054672241f, -0.416160434484482f, 0.776827812194824f, -0.416372895240784f,
-  0.776508331298828f, -0.416585087776184f, 0.776188731193542f, -0.416797041893005f,
-  0.775869011878967f, -0.417008757591248f, 0.775549054145813f, -0.417220205068588f,
-  0.775228977203369f, -0.417431443929672f, 0.774908721446991f, -0.417642414569855f,
-  0.774588346481323f, -0.417853146791458f, 0.774267733097076f, -0.418063640594482f,
-  0.773947000503540f, -0.418273866176605f, 0.773626148700714f, -0.418483853340149f,
-  0.773305058479309f, -0.418693602085114f, 0.772983849048615f, -0.418903112411499f,
-  0.772662520408630f, -0.419112354516983f, 0.772340953350067f, -0.419321358203888f,
-  0.772019267082214f, -0.419530123472214f, 0.771697402000427f, -0.419738620519638f,
-  0.771375417709351f, -0.419946908950806f, 0.771053194999695f, -0.420154929161072f,
-  0.770730912685394f, -0.420362681150436f, 0.770408391952515f, -0.420570224523544f,
-  0.770085752010345f, -0.420777499675751f, 0.769762933254242f, -0.420984506607056f,
-  0.769439935684204f, -0.421191304922104f, 0.769116818904877f, -0.421397835016251f,
-  0.768793523311615f, -0.421604126691818f, 0.768470108509064f, -0.421810150146484f,
-  0.768146514892578f, -0.422015935182571f, 0.767822742462158f, -0.422221481800079f,
-  0.767498791217804f, -0.422426789999008f, 0.767174720764160f, -0.422631829977036f,
-  0.766850471496582f, -0.422836631536484f, 0.766526103019714f, -0.423041164875031f,
-  0.766201555728912f, -0.423245459794998f, 0.765876889228821f, -0.423449516296387f,
-  0.765551984310150f, -0.423653304576874f, 0.765226960182190f, -0.423856884241104f,
-  0.764901816844940f, -0.424060165882111f, 0.764576494693756f, -0.424263238906860f,
-  0.764250993728638f, -0.424466013908386f, 0.763925373554230f, -0.424668580293655f,
-  0.763599574565887f, -0.424870878458023f, 0.763273596763611f, -0.425072938203812f,
-  0.762947499752045f, -0.425274729728699f, 0.762621283531189f, -0.425476282835007f,
-  0.762294828891754f, -0.425677597522736f, 0.761968255043030f, -0.425878643989563f,
-  0.761641561985016f, -0.426079452037811f, 0.761314690113068f, -0.426279991865158f,
-  0.760987639427185f, -0.426480293273926f, 0.760660469532013f, -0.426680356264114f,
-  0.760333120822906f, -0.426880151033401f, 0.760005652904511f, -0.427079707384110f,
-  0.759678006172180f, -0.427278995513916f, 0.759350180625916f, -0.427478045225143f,
-  0.759022235870361f, -0.427676826715469f, 0.758694171905518f, -0.427875369787216f,
-  0.758365929126740f, -0.428073674440384f, 0.758037507534027f, -0.428271710872650f,
-  0.757708966732025f, -0.428469479084015f, 0.757380247116089f, -0.428667008876801f,
-  0.757051348686218f, -0.428864300251007f, 0.756722390651703f, -0.429061323404312f,
-  0.756393194198608f, -0.429258108139038f, 0.756063878536224f, -0.429454624652863f,
-  0.755734443664551f, -0.429650902748108f, 0.755404829978943f, -0.429846942424774f,
-  0.755075037479401f, -0.430042684078217f, 0.754745125770569f, -0.430238217115402f,
-  0.754415094852448f, -0.430433481931686f, 0.754084885120392f, -0.430628478527069f,
-  0.753754496574402f, -0.430823236703873f, 0.753423988819122f, -0.431017726659775f,
-  0.753093302249908f, -0.431211978197098f, 0.752762496471405f, -0.431405961513519f,
-  0.752431571483612f, -0.431599706411362f, 0.752100467681885f, -0.431793183088303f,
-  0.751769185066223f, -0.431986421346664f, 0.751437783241272f, -0.432179391384125f,
-  0.751106262207031f, -0.432372123003006f, 0.750774562358856f, -0.432564586400986f,
-  0.750442683696747f, -0.432756811380386f, 0.750110685825348f, -0.432948768138886f,
-  0.749778568744659f, -0.433140486478806f, 0.749446272850037f, -0.433331936597824f,
-  0.749113857746124f, -0.433523118495941f, 0.748781263828278f, -0.433714061975479f,
-  0.748448550701141f, -0.433904737234116f, 0.748115658760071f, -0.434095174074173f,
-  0.747782647609711f, -0.434285342693329f, 0.747449457645416f, -0.434475272893906f,
-  0.747116148471832f, -0.434664934873581f, 0.746782720088959f, -0.434854328632355f,
-  0.746449112892151f, -0.435043483972549f, 0.746115326881409f, -0.435232400894165f,
-  0.745781481266022f, -0.435421019792557f, 0.745447397232056f, -0.435609430074692f,
-  0.745113253593445f, -0.435797542333603f, 0.744778931140900f, -0.435985416173935f,
-  0.744444429874420f, -0.436173021793365f, 0.744109809398651f, -0.436360388994217f,
-  0.743775069713593f, -0.436547487974167f, 0.743440151214600f, -0.436734348535538f,
-  0.743105113506317f, -0.436920911073685f, 0.742769956588745f, -0.437107264995575f,
-  0.742434620857239f, -0.437293320894241f, 0.742099165916443f, -0.437479138374329f,
-  0.741763532161713f, -0.437664687633514f, 0.741427779197693f, -0.437849998474121f,
-  0.741091907024384f, -0.438035041093826f, 0.740755856037140f, -0.438219845294952f,
-  0.740419685840607f, -0.438404351472855f, 0.740083336830139f, -0.438588619232178f,
-  0.739746868610382f, -0.438772648572922f, 0.739410281181335f, -0.438956409692764f,
-  0.739073514938354f, -0.439139902591705f, 0.738736629486084f, -0.439323127269745f,
-  0.738399624824524f, -0.439506113529205f, 0.738062441349030f, -0.439688831567764f,
-  0.737725138664246f, -0.439871311187744f, 0.737387716770172f, -0.440053492784500f,
-  0.737050116062164f, -0.440235435962677f, 0.736712396144867f, -0.440417140722275f,
-  0.736374497413635f, -0.440598547458649f, 0.736036539077759f, -0.440779715776443f,
-  0.735698342323303f, -0.440960645675659f, 0.735360085964203f, -0.441141277551651f,
-  0.735021650791168f, -0.441321671009064f, 0.734683096408844f, -0.441501796245575f,
-  0.734344422817230f, -0.441681683063507f, 0.734005570411682f, -0.441861271858215f,
-  0.733666598796844f, -0.442040622234344f, 0.733327507972717f, -0.442219734191895f,
-  0.732988238334656f, -0.442398548126221f, 0.732648849487305f, -0.442577123641968f,
-  0.732309341430664f, -0.442755430936813f, 0.731969714164734f, -0.442933470010757f,
-  0.731629908084869f, -0.443111270666122f, 0.731289982795715f, -0.443288803100586f,
-  0.730949878692627f, -0.443466067314148f, 0.730609714984894f, -0.443643063306808f,
-  0.730269372463226f, -0.443819820880890f, 0.729928910732269f, -0.443996280431747f,
-  0.729588270187378f, -0.444172531366348f, 0.729247510433197f, -0.444348484277725f,
-  0.728906631469727f, -0.444524168968201f, 0.728565633296967f, -0.444699615240097f,
-  0.728224515914917f, -0.444874793291092f, 0.727883219718933f, -0.445049703121185f,
-  0.727541804313660f, -0.445224374532700f, 0.727200269699097f, -0.445398747920990f,
-  0.726858556270599f, -0.445572882890701f, 0.726516723632813f, -0.445746749639511f,
-  0.726174771785736f, -0.445920348167419f, 0.725832700729370f, -0.446093708276749f,
-  0.725490510463715f, -0.446266770362854f, 0.725148141384125f, -0.446439594030380f,
-  0.724805653095245f, -0.446612149477005f, 0.724463045597076f, -0.446784436702728f,
-  0.724120318889618f, -0.446956485509872f, 0.723777413368225f, -0.447128236293793f,
-  0.723434448242188f, -0.447299748659134f, 0.723091304302216f, -0.447470992803574f,
-  0.722747981548309f, -0.447641968727112f, 0.722404599189758f, -0.447812676429749f,
-  0.722061097621918f, -0.447983115911484f, 0.721717417240143f, -0.448153316974640f,
-  0.721373617649078f, -0.448323249816895f, 0.721029698848724f, -0.448492884635925f,
-  0.720685660839081f, -0.448662281036377f, 0.720341444015503f, -0.448831409215927f,
-  0.719997107982636f, -0.449000298976898f, 0.719652712345123f, -0.449168890714645f,
-  0.719308137893677f, -0.449337244033813f, 0.718963444232941f, -0.449505299329758f,
-  0.718618571758270f, -0.449673116207123f, 0.718273639678955f, -0.449840664863586f,
-  0.717928528785706f, -0.450007945299149f, 0.717583298683167f, -0.450174957513809f,
-  0.717238008975983f, -0.450341701507568f, 0.716892480850220f, -0.450508207082748f,
-  0.716546893119812f, -0.450674414634705f, 0.716201186180115f, -0.450840383768082f,
-  0.715855300426483f, -0.451006084680557f, 0.715509355068207f, -0.451171487569809f,
-  0.715163230895996f, -0.451336652040482f, 0.714816987514496f, -0.451501548290253f,
-  0.714470624923706f, -0.451666176319122f, 0.714124143123627f, -0.451830536127090f,
-  0.713777542114258f, -0.451994657516479f, 0.713430821895599f, -0.452158480882645f,
-  0.713083922863007f, -0.452322036027908f, 0.712736964225769f, -0.452485352754593f,
-  0.712389826774597f, -0.452648371458054f, 0.712042629718781f, -0.452811151742935f,
-  0.711695253849030f, -0.452973634004593f, 0.711347758769989f, -0.453135877847672f,
-  0.711000144481659f, -0.453297853469849f, 0.710652410984039f, -0.453459560871124f,
-  0.710304558277130f, -0.453621000051498f, 0.709956526756287f, -0.453782171010971f,
-  0.709608435630798f, -0.453943043947220f, 0.709260225296021f, -0.454103678464890f,
-  0.708911836147308f, -0.454264044761658f, 0.708563387393951f, -0.454424172639847f,
-  0.708214759826660f, -0.454584002494812f, 0.707866072654724f, -0.454743564128876f,
-  0.707517206668854f, -0.454902857542038f, 0.707168221473694f, -0.455061882734299f,
-  0.706819176673889f, -0.455220639705658f, 0.706469953060150f, -0.455379128456116f,
-  0.706120610237122f, -0.455537378787994f, 0.705771148204803f, -0.455695331096649f,
-  0.705421566963196f, -0.455853015184402f, 0.705071866512299f, -0.456010431051254f,
-  0.704722046852112f, -0.456167578697205f, 0.704372167587280f, -0.456324487924576f,
-  0.704022109508514f, -0.456481099128723f, 0.703671932220459f, -0.456637442111969f,
-  0.703321635723114f, -0.456793516874313f, 0.702971220016479f, -0.456949323415756f,
-  0.702620685100555f, -0.457104891538620f, 0.702270030975342f, -0.457260161638260f,
-  0.701919257640839f, -0.457415163516998f, 0.701568365097046f, -0.457569897174835f,
-  0.701217353343964f, -0.457724362611771f, 0.700866222381592f, -0.457878559827805f,
-  0.700514972209930f, -0.458032488822937f, 0.700163602828979f, -0.458186149597168f,
-  0.699812114238739f, -0.458339542150497f, 0.699460506439209f, -0.458492636680603f,
-  0.699108779430389f, -0.458645492792130f, 0.698756933212280f, -0.458798080682755f,
-  0.698404967784882f, -0.458950400352478f, 0.698052942752838f, -0.459102421998978f,
-  0.697700738906860f, -0.459254205226898f, 0.697348415851593f, -0.459405690431595f,
-  0.696996033191681f, -0.459556937217712f, 0.696643471717834f, -0.459707885980606f,
-  0.696290850639343f, -0.459858566522598f, 0.695938050746918f, -0.460008978843689f,
-  0.695585191249847f, -0.460159152746201f, 0.695232212543488f, -0.460309028625488f,
-  0.694879114627838f, -0.460458606481552f, 0.694525837898254f, -0.460607945919037f,
-  0.694172501564026f, -0.460757017135620f, 0.693819046020508f, -0.460905820131302f,
-  0.693465530872345f, -0.461054325103760f, 0.693111836910248f, -0.461202591657639f,
-  0.692758023738861f, -0.461350560188293f, 0.692404091358185f, -0.461498260498047f,
-  0.692050099372864f, -0.461645722389221f, 0.691695988178253f, -0.461792886257172f,
-  0.691341698169708f, -0.461939752101898f, 0.690987348556519f, -0.462086379528046f,
-  0.690632879734039f, -0.462232738733292f, 0.690278291702271f, -0.462378799915314f,
-  0.689923584461212f, -0.462524622678757f, 0.689568817615509f, -0.462670147418976f,
-  0.689213871955872f, -0.462815403938293f, 0.688858866691589f, -0.462960392236710f,
-  0.688503682613373f, -0.463105112314224f, 0.688148438930511f, -0.463249564170837f,
-  0.687793076038361f, -0.463393747806549f, 0.687437593936920f, -0.463537633419037f,
-  0.687082052230835f, -0.463681250810623f, 0.686726331710815f, -0.463824629783630f,
-  0.686370551586151f, -0.463967710733414f, 0.686014592647552f, -0.464110493659973f,
-  0.685658574104309f, -0.464253038167953f, 0.685302436351776f, -0.464395314455032f,
-  0.684946238994598f, -0.464537292718887f, 0.684589862823486f, -0.464679002761841f,
-  0.684233427047729f, -0.464820444583893f, 0.683876872062683f, -0.464961618185043f,
-  0.683520197868347f, -0.465102523565292f, 0.683163404464722f, -0.465243130922318f,
-  0.682806491851807f, -0.465383470058441f, 0.682449519634247f, -0.465523540973663f,
-  0.682092368602753f, -0.465663343667984f, 0.681735157966614f, -0.465802878141403f,
-  0.681377887725830f, -0.465942144393921f, 0.681020438671112f, -0.466081112623215f,
-  0.680662930011749f, -0.466219812631607f, 0.680305242538452f, -0.466358244419098f,
-  0.679947495460510f, -0.466496407985687f, 0.679589688777924f, -0.466634273529053f,
-  0.679231703281403f, -0.466771900653839f, 0.678873658180237f, -0.466909229755402f,
-  0.678515493869781f, -0.467046260833740f, 0.678157210350037f, -0.467183053493500f,
-  0.677798807621002f, -0.467319577932358f, 0.677440345287323f, -0.467455804347992f,
-  0.677081763744354f, -0.467591762542725f, 0.676723062992096f, -0.467727422714233f,
-  0.676364302635193f, -0.467862844467163f, 0.676005363464355f, -0.467997968196869f,
-  0.675646364688873f, -0.468132823705673f, 0.675287246704102f, -0.468267410993576f,
-  0.674928069114685f, -0.468401730060577f, 0.674568772315979f, -0.468535751104355f,
-  0.674209356307983f, -0.468669503927231f, 0.673849821090698f, -0.468802988529205f,
-  0.673490226268768f, -0.468936175107956f, 0.673130512237549f, -0.469069123268127f,
-  0.672770678997040f, -0.469201773405075f, 0.672410726547241f, -0.469334155321121f,
-  0.672050714492798f, -0.469466239213943f, 0.671690583229065f, -0.469598054885864f,
-  0.671330332756042f, -0.469729602336884f, 0.670970022678375f, -0.469860881567001f,
-  0.670609593391418f, -0.469991862773895f, 0.670249044895172f, -0.470122605562210f,
-  0.669888436794281f, -0.470253020524979f, 0.669527709484100f, -0.470383197069168f,
-  0.669166862964630f, -0.470513075590134f, 0.668805956840515f, -0.470642685890198f,
-  0.668444931507111f, -0.470772027969360f, 0.668083786964417f, -0.470901101827621f,
-  0.667722582817078f, -0.471029877662659f, 0.667361259460449f, -0.471158385276794f,
-  0.666999816894531f, -0.471286594867706f, 0.666638314723969f, -0.471414536237717f,
-  0.666276693344116f, -0.471542209386826f, 0.665914952754974f, -0.471669614315033f,
-  0.665553152561188f, -0.471796721220016f, 0.665191233158112f, -0.471923559904099f,
-  0.664829254150391f, -0.472050130367279f, 0.664467096328735f, -0.472176402807236f,
-  0.664104938507080f, -0.472302407026291f, 0.663742601871490f, -0.472428143024445f,
-  0.663380205631256f, -0.472553610801697f, 0.663017749786377f, -0.472678780555725f,
-  0.662655174732208f, -0.472803652286530f, 0.662292480468750f, -0.472928285598755f,
-  0.661929666996002f, -0.473052620887756f, 0.661566793918610f, -0.473176687955856f,
-  0.661203861236572f, -0.473300457000732f, 0.660840749740601f, -0.473423957824707f,
-  0.660477638244629f, -0.473547190427780f, 0.660114347934723f, -0.473670125007629f,
-  0.659750998020172f, -0.473792791366577f, 0.659387588500977f, -0.473915189504623f,
-  0.659024059772491f, -0.474037289619446f, 0.658660411834717f, -0.474159121513367f,
-  0.658296704292297f, -0.474280685186386f, 0.657932877540588f, -0.474401950836182f,
-  0.657568991184235f, -0.474522948265076f, 0.657204985618591f, -0.474643647670746f,
-  0.656840860843658f, -0.474764078855515f, 0.656476676464081f, -0.474884241819382f,
-  0.656112432479858f, -0.475004136562347f, 0.655748009681702f, -0.475123733282089f,
-  0.655383586883545f, -0.475243031978607f, 0.655019044876099f, -0.475362062454224f,
-  0.654654383659363f, -0.475480824708939f, 0.654289662837982f, -0.475599318742752f,
-  0.653924822807312f, -0.475717514753342f, 0.653559923171997f, -0.475835442543030f,
-  0.653194904327393f, -0.475953072309494f, 0.652829825878143f, -0.476070433855057f,
-  0.652464628219604f, -0.476187497377396f, 0.652099311351776f, -0.476304292678833f,
-  0.651733994483948f, -0.476420819759369f, 0.651368498802185f, -0.476537048816681f,
-  0.651003003120422f, -0.476653009653091f, 0.650637328624725f, -0.476768702268600f,
-  0.650271594524384f, -0.476884096860886f, 0.649905800819397f, -0.476999223232269f,
-  0.649539887905121f, -0.477114051580429f, 0.649173915386200f, -0.477228611707687f,
-  0.648807883262634f, -0.477342873811722f, 0.648441672325134f, -0.477456867694855f,
-  0.648075461387634f, -0.477570593357086f, 0.647709131240845f, -0.477684020996094f,
-  0.647342681884766f, -0.477797180414200f, 0.646976172924042f, -0.477910041809082f,
-  0.646609604358673f, -0.478022634983063f, 0.646242916584015f, -0.478134930133820f,
-  0.645876109600067f, -0.478246957063675f, 0.645509302616119f, -0.478358715772629f,
-  0.645142316818237f, -0.478470176458359f, 0.644775331020355f, -0.478581339120865f,
-  0.644408226013184f, -0.478692263364792f, 0.644041001796722f, -0.478802859783173f,
-  0.643673717975616f, -0.478913217782974f, 0.643306374549866f, -0.479023247957230f,
-  0.642938911914825f, -0.479133039712906f, 0.642571389675140f, -0.479242533445358f,
-  0.642203748226166f, -0.479351729154587f, 0.641836047172546f, -0.479460656642914f,
-  0.641468286514282f, -0.479569315910339f, 0.641100406646729f, -0.479677677154541f,
-  0.640732467174530f, -0.479785770177841f, 0.640364408493042f, -0.479893565177917f,
-  0.639996349811554f, -0.480001062154770f, 0.639628112316132f, -0.480108320713043f,
-  0.639259815216064f, -0.480215251445770f, 0.638891458511353f, -0.480321943759918f,
-  0.638523042201996f, -0.480428308248520f, 0.638154506683350f, -0.480534434318542f,
-  0.637785911560059f, -0.480640232563019f, 0.637417197227478f, -0.480745792388916f,
-  0.637048482894897f, -0.480851024389267f, 0.636679589748383f, -0.480956017971039f,
-  0.636310696601868f, -0.481060713529587f, 0.635941684246063f, -0.481165111064911f,
-  0.635572552680969f, -0.481269240379334f, 0.635203421115875f, -0.481373071670532f,
-  0.634834170341492f, -0.481476634740829f, 0.634464859962463f, -0.481579899787903f,
-  0.634095430374146f, -0.481682896614075f, 0.633725941181183f, -0.481785595417023f,
-  0.633356392383575f, -0.481888025999069f, 0.632986724376678f, -0.481990188360214f,
-  0.632616996765137f, -0.482092022895813f, 0.632247209548950f, -0.482193619012833f,
-  0.631877362728119f, -0.482294887304306f, 0.631507396697998f, -0.482395917177200f,
-  0.631137371063232f, -0.482496619224548f, 0.630767226219177f, -0.482597053050995f,
-  0.630397081375122f, -0.482697218656540f, 0.630026817321777f, -0.482797086238861f,
-  0.629656434059143f, -0.482896685600281f, 0.629286050796509f, -0.482995986938477f,
-  0.628915548324585f, -0.483094990253448f, 0.628544986248016f, -0.483193725347519f,
-  0.628174364566803f, -0.483292192220688f, 0.627803623676300f, -0.483390361070633f,
-  0.627432823181152f, -0.483488231897354f, 0.627061963081360f, -0.483585834503174f,
-  0.626691043376923f, -0.483683139085770f, 0.626320004463196f, -0.483780175447464f,
-  0.625948905944824f, -0.483876913785934f, 0.625577747821808f, -0.483973383903503f,
-  0.625206530094147f, -0.484069555997849f, 0.624835193157196f, -0.484165430068970f,
-  0.624463796615601f, -0.484261035919189f, 0.624092340469360f, -0.484356373548508f,
-  0.623720824718475f, -0.484451413154602f, 0.623349189758301f, -0.484546154737473f,
-  0.622977554798126f, -0.484640628099442f, 0.622605800628662f, -0.484734803438187f,
-  0.622233927249908f, -0.484828680753708f, 0.621862053871155f, -0.484922289848328f,
-  0.621490061283112f, -0.485015630722046f, 0.621118068695068f, -0.485108673572540f,
-  0.620745956897736f, -0.485201418399811f, 0.620373785495758f, -0.485293895006180f,
-  0.620001494884491f, -0.485386073589325f, 0.619629204273224f, -0.485477954149246f,
-  0.619256794452667f, -0.485569566488266f, 0.618884325027466f, -0.485660910606384f,
-  0.618511795997620f, -0.485751956701279f, 0.618139207363129f, -0.485842704772949f,
-  0.617766559123993f, -0.485933154821396f, 0.617393791675568f, -0.486023366451263f,
-  0.617020964622498f, -0.486113250255585f, 0.616648077964783f, -0.486202865839005f,
-  0.616275131702423f, -0.486292183399200f, 0.615902125835419f, -0.486381232738495f,
-  0.615529060363770f, -0.486469984054565f, 0.615155875682831f, -0.486558437347412f,
-  0.614782691001892f, -0.486646622419357f, 0.614409387111664f, -0.486734509468079f,
-  0.614036023616791f, -0.486822128295898f, 0.613662600517273f, -0.486909449100494f,
-  0.613289117813110f, -0.486996471881866f, 0.612915575504303f, -0.487083226442337f,
-  0.612541973590851f, -0.487169682979584f, 0.612168252468109f, -0.487255871295929f,
-  0.611794531345367f, -0.487341761589050f, 0.611420691013336f, -0.487427353858948f,
-  0.611046791076660f, -0.487512677907944f, 0.610672831535339f, -0.487597703933716f,
-  0.610298871994019f, -0.487682431936264f, 0.609924793243408f, -0.487766891717911f,
-  0.609550595283508f, -0.487851053476334f, 0.609176397323608f, -0.487934947013855f,
-  0.608802139759064f, -0.488018542528152f, 0.608427822589874f, -0.488101840019226f,
-  0.608053386211395f, -0.488184869289398f, 0.607678949832916f, -0.488267600536346f,
-  0.607304394245148f, -0.488350033760071f, 0.606929838657379f, -0.488432198762894f,
-  0.606555163860321f, -0.488514065742493f, 0.606180429458618f, -0.488595664501190f,
-  0.605805635452271f, -0.488676935434341f, 0.605430841445923f, -0.488757967948914f,
-  0.605055928230286f, -0.488838672637939f, 0.604680955410004f, -0.488919109106064f,
-  0.604305922985077f, -0.488999247550964f, 0.603930830955505f, -0.489079117774963f,
-  0.603555679321289f, -0.489158689975739f, 0.603180468082428f, -0.489237964153290f,
-  0.602805197238922f, -0.489316970109940f, 0.602429866790771f, -0.489395678043365f,
-  0.602054476737976f, -0.489474087953568f, 0.601679027080536f, -0.489552229642868f,
-  0.601303517818451f, -0.489630073308945f, 0.600927948951721f, -0.489707618951797f,
-  0.600552320480347f, -0.489784896373749f, 0.600176632404327f, -0.489861875772476f,
-  0.599800884723663f, -0.489938557147980f, 0.599425077438354f, -0.490014940500259f,
-  0.599049210548401f, -0.490091055631638f, 0.598673284053802f, -0.490166902542114f,
-  0.598297297954559f, -0.490242421627045f, 0.597921252250671f, -0.490317672491074f,
-  0.597545146942139f, -0.490392625331879f, 0.597168982028961f, -0.490467309951782f,
-  0.596792817115784f, -0.490541696548462f, 0.596416532993317f, -0.490615785121918f,
-  0.596040189266205f, -0.490689605474472f, 0.595663845539093f, -0.490763127803802f,
-  0.595287382602692f, -0.490836352109909f, 0.594910860061646f, -0.490909278392792f,
-  0.594534337520599f, -0.490981936454773f, 0.594157755374908f, -0.491054296493530f,
-  0.593781054019928f, -0.491126358509064f, 0.593404352664948f, -0.491198152303696f,
-  0.593027591705322f, -0.491269648075104f, 0.592650771141052f, -0.491340845823288f,
-  0.592273890972137f, -0.491411775350571f, 0.591896951198578f, -0.491482406854630f,
-  0.591519951820374f, -0.491552740335464f, 0.591142892837524f, -0.491622805595398f,
-  0.590765833854675f, -0.491692543029785f, 0.590388655662537f, -0.491762012243271f,
-  0.590011477470398f, -0.491831213235855f, 0.589634180068970f, -0.491900116205215f,
-  0.589256882667542f, -0.491968721151352f, 0.588879525661469f, -0.492037028074265f,
-  0.588502109050751f, -0.492105036973953f, 0.588124632835388f, -0.492172777652740f,
-  0.587747097015381f, -0.492240220308304f, 0.587369561195374f, -0.492307394742966f,
-  0.586991965770721f, -0.492374241352081f, 0.586614251136780f, -0.492440819740295f,
-  0.586236536502838f, -0.492507129907608f, 0.585858762264252f, -0.492573112249374f,
-  0.585480928421021f, -0.492638826370239f, 0.585103094577789f, -0.492704242467880f,
-  0.584725141525269f, -0.492769360542297f, 0.584347188472748f, -0.492834210395813f,
-  0.583969175815582f, -0.492898762226105f, 0.583591103553772f, -0.492963016033173f,
-  0.583212971687317f, -0.493026971817017f, 0.582834780216217f, -0.493090659379959f,
-  0.582456588745117f, -0.493154048919678f, 0.582078278064728f, -0.493217140436172f,
-  0.581699967384338f, -0.493279963731766f, 0.581321597099304f, -0.493342459201813f,
-  0.580943167209625f, -0.493404686450958f, 0.580564737319946f, -0.493466645479202f,
-  0.580186247825623f, -0.493528276681900f, 0.579807698726654f, -0.493589639663696f,
-  0.579429090023041f, -0.493650704622269f, 0.579050421714783f, -0.493711471557617f,
-  0.578671753406525f, -0.493771970272064f, 0.578292965888977f, -0.493832170963287f,
-  0.577914178371429f, -0.493892073631287f, 0.577535390853882f, -0.493951678276062f,
-  0.577156484127045f, -0.494011014699936f, 0.576777577400208f, -0.494070053100586f,
-  0.576398611068726f, -0.494128793478012f, 0.576019585132599f, -0.494187235832214f,
-  0.575640499591827f, -0.494245409965515f, 0.575261414051056f, -0.494303256273270f,
-  0.574882268905640f, -0.494360834360123f, 0.574503064155579f, -0.494418144226074f,
-  0.574123859405518f, -0.494475126266479f, 0.573744535446167f, -0.494531840085983f,
-  0.573365211486816f, -0.494588255882263f, 0.572985887527466f, -0.494644373655319f,
-  0.572606444358826f, -0.494700223207474f, 0.572227001190186f, -0.494755744934082f,
-  0.571847498416901f, -0.494810998439789f, 0.571467995643616f, -0.494865983724594f,
-  0.571088373661041f, -0.494920641183853f, 0.570708811283112f, -0.494975030422211f,
-  0.570329129695892f, -0.495029091835022f, 0.569949388504028f, -0.495082914829254f,
-  0.569569647312164f, -0.495136409997940f, 0.569189906120300f, -0.495189607143402f,
-  0.568810045719147f, -0.495242536067963f, 0.568430185317993f, -0.495295166969299f,
-  0.568050265312195f, -0.495347499847412f, 0.567670345306396f, -0.495399564504623f,
-  0.567290365695953f, -0.495451331138611f, 0.566910326480865f, -0.495502769947052f,
-  0.566530287265778f, -0.495553970336914f, 0.566150128841400f, -0.495604842901230f,
-  0.565770030021667f, -0.495655417442322f, 0.565389811992645f, -0.495705723762512f,
-  0.565009593963623f, -0.495755732059479f, 0.564629375934601f, -0.495805442333221f,
-  0.564249038696289f, -0.495854884386063f, 0.563868701457977f, -0.495903998613358f,
-  0.563488364219666f, -0.495952844619751f, 0.563107967376709f, -0.496001392602921f,
-  0.562727510929108f, -0.496049642562866f, 0.562346994876862f, -0.496097624301910f,
-  0.561966478824615f, -0.496145308017731f, 0.561585903167725f, -0.496192663908005f,
-  0.561205327510834f, -0.496239781379700f, 0.560824692249298f, -0.496286571025848f,
-  0.560444056987762f, -0.496333062648773f, 0.560063362121582f, -0.496379286050797f,
-  0.559682607650757f, -0.496425211429596f, 0.559301853179932f, -0.496470838785172f,
-  0.558921039104462f, -0.496516168117523f, 0.558540165424347f, -0.496561229228973f,
-  0.558159291744232f, -0.496605962514877f, 0.557778418064117f, -0.496650427579880f,
-  0.557397484779358f, -0.496694594621658f, 0.557016491889954f, -0.496738493442535f,
-  0.556635499000549f, -0.496782064437866f, 0.556254446506500f, -0.496825367212296f,
-  0.555873334407806f, -0.496868371963501f, 0.555492222309113f, -0.496911078691483f,
-  0.555111110210419f, -0.496953487396240f, 0.554729938507080f, -0.496995598077774f,
-  0.554348707199097f, -0.497037440538406f, 0.553967475891113f, -0.497078984975815f,
-  0.553586184978485f, -0.497120231389999f, 0.553204894065857f, -0.497161179780960f,
-  0.552823603153229f, -0.497201830148697f, 0.552442193031311f, -0.497242212295532f,
-  0.552060842514038f, -0.497282296419144f, 0.551679372787476f, -0.497322082519531f,
-  0.551297962665558f, -0.497361570596695f, 0.550916433334351f, -0.497400760650635f,
-  0.550534904003143f, -0.497439652681351f, 0.550153374671936f, -0.497478276491165f,
-  0.549771785736084f, -0.497516602277756f, 0.549390196800232f, -0.497554630041122f,
-  0.549008548259735f, -0.497592359781265f, 0.548626899719238f, -0.497629791498184f,
-  0.548245191574097f, -0.497666954994202f, 0.547863483428955f, -0.497703820466995f,
-  0.547481775283813f, -0.497740387916565f, 0.547099947929382f, -0.497776657342911f,
-  0.546718180179596f, -0.497812628746033f, 0.546336352825165f, -0.497848302125931f,
-  0.545954465866089f, -0.497883707284927f, 0.545572578907013f, -0.497918814420700f,
-  0.545190691947937f, -0.497953623533249f, 0.544808745384216f, -0.497988134622574f,
-  0.544426798820496f, -0.498022347688675f, 0.544044792652130f, -0.498056292533875f,
-  0.543662786483765f, -0.498089909553528f, 0.543280720710754f, -0.498123258352280f,
-  0.542898654937744f, -0.498156309127808f, 0.542516589164734f, -0.498189061880112f,
-  0.542134463787079f, -0.498221516609192f, 0.541752278804779f, -0.498253703117371f,
-  0.541370153427124f, -0.498285561800003f, 0.540987968444824f, -0.498317152261734f,
-  0.540605723857880f, -0.498348444700241f, 0.540223479270935f, -0.498379439115524f,
-  0.539841234683990f, -0.498410135507584f, 0.539458930492401f, -0.498440563678741f,
-  0.539076626300812f, -0.498470664024353f, 0.538694262504578f, -0.498500496149063f,
-  0.538311958312988f, -0.498530030250549f, 0.537929534912109f, -0.498559266328812f,
-  0.537547171115875f, -0.498588204383850f, 0.537164747714996f, -0.498616874217987f,
-  0.536782264709473f, -0.498645216226578f, 0.536399841308594f, -0.498673290014267f,
-  0.536017298698425f, -0.498701065778732f, 0.535634815692902f, -0.498728543519974f,
-  0.535252273082733f, -0.498755723237991f, 0.534869730472565f, -0.498782604932785f,
-  0.534487187862396f, -0.498809218406677f, 0.534104585647583f, -0.498835533857346f,
-  0.533721983432770f, -0.498861521482468f, 0.533339321613312f, -0.498887240886688f,
-  0.532956659793854f, -0.498912662267685f, 0.532573997974396f, -0.498937815427780f,
-  0.532191336154938f, -0.498962640762329f, 0.531808614730835f, -0.498987197875977f,
-  0.531425893306732f, -0.499011427164078f, 0.531043112277985f, -0.499035388231277f,
-  0.530660390853882f, -0.499059051275253f, 0.530277609825134f, -0.499082416296005f,
-  0.529894769191742f, -0.499105513095856f, 0.529511988162994f, -0.499128282070160f,
-  0.529129147529602f, -0.499150782823563f, 0.528746306896210f, -0.499172955751419f,
-  0.528363406658173f, -0.499194860458374f, 0.527980506420136f, -0.499216467142105f,
-  0.527597606182098f, -0.499237775802612f, 0.527214705944061f, -0.499258816242218f,
-  0.526831746101379f, -0.499279528856277f, 0.526448845863342f, -0.499299973249435f,
-  0.526065826416016f, -0.499320119619370f, 0.525682866573334f, -0.499339967966080f,
-  0.525299847126007f, -0.499359518289566f, 0.524916887283325f, -0.499378770589828f,
-  0.524533808231354f, -0.499397724866867f, 0.524150788784027f, -0.499416410923004f,
-  0.523767769336700f, -0.499434769153595f, 0.523384690284729f, -0.499452859163284f,
-  0.523001611232758f, -0.499470651149750f, 0.522618472576141f, -0.499488145112991f,
-  0.522235393524170f, -0.499505341053009f, 0.521852254867554f, -0.499522238969803f,
-  0.521469116210938f, -0.499538868665695f, 0.521085977554321f, -0.499555170536041f,
-  0.520702838897705f, -0.499571204185486f, 0.520319640636444f, -0.499586939811707f,
-  0.519936442375183f, -0.499602377414703f, 0.519553244113922f, -0.499617516994476f,
-  0.519170045852661f, -0.499632388353348f, 0.518786847591400f, -0.499646931886673f,
-  0.518403589725494f, -0.499661177396774f, 0.518020391464233f, -0.499675154685974f,
-  0.517637133598328f, -0.499688833951950f, 0.517253875732422f, -0.499702215194702f,
-  0.516870558261871f, -0.499715298414230f, 0.516487300395966f, -0.499728083610535f,
-  0.516103982925415f, -0.499740600585938f, 0.515720725059509f, -0.499752789735794f,
-  0.515337407588959f, -0.499764710664749f, 0.514954090118408f, -0.499776333570480f,
-  0.514570772647858f, -0.499787658452988f, 0.514187395572662f, -0.499798685312271f,
-  0.513804078102112f, -0.499809414148331f, 0.513420701026917f, -0.499819844961166f,
-  0.513037383556366f, -0.499830007553101f, 0.512654006481171f, -0.499839842319489f,
-  0.512270629405975f, -0.499849408864975f, 0.511887252330780f, -0.499858677387238f,
-  0.511503815650940f, -0.499867647886276f, 0.511120438575745f, -0.499876320362091f,
-  0.510737061500549f, -0.499884694814682f, 0.510353624820709f, -0.499892801046371f,
-  0.509970188140869f, -0.499900579452515f, 0.509586811065674f, -0.499908089637756f,
-  0.509203374385834f, -0.499915301799774f, 0.508819937705994f, -0.499922215938568f,
-  0.508436501026154f, -0.499928832054138f, 0.508053064346313f, -0.499935150146484f,
-  0.507669627666473f, -0.499941170215607f, 0.507286131381989f, -0.499946922063828f,
-  0.506902694702148f, -0.499952346086502f, 0.506519258022308f, -0.499957501888275f,
-  0.506135761737823f, -0.499962359666824f, 0.505752325057983f, -0.499966919422150f,
-  0.505368828773499f, -0.499971181154251f, 0.504985332489014f, -0.499975144863129f,
-  0.504601895809174f, -0.499978810548782f, 0.504218399524689f, -0.499982208013535f,
-  0.503834903240204f, -0.499985307455063f, 0.503451406955719f, -0.499988079071045f,
-  0.503067970275879f, -0.499990582466125f, 0.502684473991394f, -0.499992787837982f,
-  0.502300977706909f, -0.499994695186615f, 0.501917481422424f, -0.499996334314346f,
-  0.501533985137939f, -0.499997645616531f, 0.501150488853455f, -0.499998688697815f,
-  0.500766992568970f, -0.499999403953552f, 0.500383496284485f, -0.499999850988388f,
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
-/**
-  @par
-  Generation fixed-point realCoefAQ31 array in Q31 format:
-  @par
-  n = 4096
-  <pre>for (i = 0; i < n; i++)
-  {
-     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }</pre>
-  @par
-  Convert to fixed point Q31 format
-      round(pATable[i] * pow(2, 31))
-*/
-const q31_t realCoefAQ31[8192] = {
-    (q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c,
-    (q31_t)0x3fe6de05, (q31_t)0xc00004ef, (q31_t)0x3fda4d09, (q31_t)0xc0000b1a,
-    (q31_t)0x3fcdbc0f, (q31_t)0xc00013bd, (q31_t)0x3fc12b16, (q31_t)0xc0001ed8,
-    (q31_t)0x3fb49a1f, (q31_t)0xc0002c6a, (q31_t)0x3fa8092c, (q31_t)0xc0003c74,
-    (q31_t)0x3f9b783c, (q31_t)0xc0004ef5, (q31_t)0x3f8ee750, (q31_t)0xc00063ee,
-    (q31_t)0x3f825668, (q31_t)0xc0007b5f, (q31_t)0x3f75c585, (q31_t)0xc0009547,
-    (q31_t)0x3f6934a8, (q31_t)0xc000b1a7, (q31_t)0x3f5ca3d0, (q31_t)0xc000d07e,
-    (q31_t)0x3f5012fe, (q31_t)0xc000f1ce, (q31_t)0x3f438234, (q31_t)0xc0011594,
-    (q31_t)0x3f36f170, (q31_t)0xc0013bd3, (q31_t)0x3f2a60b4, (q31_t)0xc0016489,
-    (q31_t)0x3f1dd001, (q31_t)0xc0018fb6, (q31_t)0x3f113f56, (q31_t)0xc001bd5c,
-    (q31_t)0x3f04aeb5, (q31_t)0xc001ed78, (q31_t)0x3ef81e1d, (q31_t)0xc002200d,
-    (q31_t)0x3eeb8d8f, (q31_t)0xc0025519, (q31_t)0x3edefd0c, (q31_t)0xc0028c9c,
-    (q31_t)0x3ed26c94, (q31_t)0xc002c697, (q31_t)0x3ec5dc28, (q31_t)0xc003030a,
-    (q31_t)0x3eb94bc8, (q31_t)0xc00341f4, (q31_t)0x3eacbb74, (q31_t)0xc0038356,
-    (q31_t)0x3ea02b2e, (q31_t)0xc003c72f, (q31_t)0x3e939af5, (q31_t)0xc0040d80,
-    (q31_t)0x3e870aca, (q31_t)0xc0045648, (q31_t)0x3e7a7aae, (q31_t)0xc004a188,
-    (q31_t)0x3e6deaa1, (q31_t)0xc004ef3f, (q31_t)0x3e615aa3, (q31_t)0xc0053f6e,
-    (q31_t)0x3e54cab5, (q31_t)0xc0059214, (q31_t)0x3e483ad8, (q31_t)0xc005e731,
-    (q31_t)0x3e3bab0b, (q31_t)0xc0063ec6, (q31_t)0x3e2f1b50, (q31_t)0xc00698d3,
-    (q31_t)0x3e228ba7, (q31_t)0xc006f556, (q31_t)0x3e15fc11, (q31_t)0xc0075452,
-    (q31_t)0x3e096c8d, (q31_t)0xc007b5c4, (q31_t)0x3dfcdd1d, (q31_t)0xc00819ae,
-    (q31_t)0x3df04dc0, (q31_t)0xc008800f, (q31_t)0x3de3be78, (q31_t)0xc008e8e8,
-    (q31_t)0x3dd72f45, (q31_t)0xc0095438, (q31_t)0x3dcaa027, (q31_t)0xc009c1ff,
-    (q31_t)0x3dbe111e, (q31_t)0xc00a323d, (q31_t)0x3db1822c, (q31_t)0xc00aa4f3,
-    (q31_t)0x3da4f351, (q31_t)0xc00b1a20, (q31_t)0x3d98648d, (q31_t)0xc00b91c4,
-    (q31_t)0x3d8bd5e1, (q31_t)0xc00c0be0, (q31_t)0x3d7f474d, (q31_t)0xc00c8872,
-    (q31_t)0x3d72b8d2, (q31_t)0xc00d077c, (q31_t)0x3d662a70, (q31_t)0xc00d88fd,
-    (q31_t)0x3d599c28, (q31_t)0xc00e0cf5, (q31_t)0x3d4d0df9, (q31_t)0xc00e9364,
-    (q31_t)0x3d407fe6, (q31_t)0xc00f1c4a, (q31_t)0x3d33f1ed, (q31_t)0xc00fa7a8,
-    (q31_t)0x3d276410, (q31_t)0xc010357c, (q31_t)0x3d1ad650, (q31_t)0xc010c5c7,
-    (q31_t)0x3d0e48ab, (q31_t)0xc011588a, (q31_t)0x3d01bb24, (q31_t)0xc011edc3,
-    (q31_t)0x3cf52dbb, (q31_t)0xc0128574, (q31_t)0x3ce8a06f, (q31_t)0xc0131f9b,
-    (q31_t)0x3cdc1342, (q31_t)0xc013bc39, (q31_t)0x3ccf8634, (q31_t)0xc0145b4e,
-    (q31_t)0x3cc2f945, (q31_t)0xc014fcda, (q31_t)0x3cb66c77, (q31_t)0xc015a0dd,
-    (q31_t)0x3ca9dfc8, (q31_t)0xc0164757, (q31_t)0x3c9d533b, (q31_t)0xc016f047,
-    (q31_t)0x3c90c6cf, (q31_t)0xc0179bae, (q31_t)0x3c843a85, (q31_t)0xc018498c,
-    (q31_t)0x3c77ae5e, (q31_t)0xc018f9e1, (q31_t)0x3c6b2259, (q31_t)0xc019acac,
-    (q31_t)0x3c5e9678, (q31_t)0xc01a61ee, (q31_t)0x3c520aba, (q31_t)0xc01b19a7,
-    (q31_t)0x3c457f21, (q31_t)0xc01bd3d6, (q31_t)0x3c38f3ac, (q31_t)0xc01c907c,
-    (q31_t)0x3c2c685d, (q31_t)0xc01d4f99, (q31_t)0x3c1fdd34, (q31_t)0xc01e112b,
-    (q31_t)0x3c135231, (q31_t)0xc01ed535, (q31_t)0x3c06c754, (q31_t)0xc01f9bb5,
-    (q31_t)0x3bfa3c9f, (q31_t)0xc02064ab, (q31_t)0x3bedb212, (q31_t)0xc0213018,
-    (q31_t)0x3be127ac, (q31_t)0xc021fdfb, (q31_t)0x3bd49d70, (q31_t)0xc022ce54,
-    (q31_t)0x3bc8135c, (q31_t)0xc023a124, (q31_t)0x3bbb8973, (q31_t)0xc024766a,
-    (q31_t)0x3baeffb3, (q31_t)0xc0254e27, (q31_t)0x3ba2761e, (q31_t)0xc0262859,
-    (q31_t)0x3b95ecb4, (q31_t)0xc0270502, (q31_t)0x3b896375, (q31_t)0xc027e421,
-    (q31_t)0x3b7cda63, (q31_t)0xc028c5b6, (q31_t)0x3b70517d, (q31_t)0xc029a9c1,
-    (q31_t)0x3b63c8c4, (q31_t)0xc02a9042, (q31_t)0x3b574039, (q31_t)0xc02b7939,
-    (q31_t)0x3b4ab7db, (q31_t)0xc02c64a6, (q31_t)0x3b3e2fac, (q31_t)0xc02d5289,
-    (q31_t)0x3b31a7ac, (q31_t)0xc02e42e2, (q31_t)0x3b251fdc, (q31_t)0xc02f35b1,
-    (q31_t)0x3b18983b, (q31_t)0xc0302af5, (q31_t)0x3b0c10cb, (q31_t)0xc03122b0,
-    (q31_t)0x3aff898c, (q31_t)0xc0321ce0, (q31_t)0x3af3027e, (q31_t)0xc0331986,
-    (q31_t)0x3ae67ba2, (q31_t)0xc03418a2, (q31_t)0x3ad9f4f8, (q31_t)0xc0351a33,
-    (q31_t)0x3acd6e81, (q31_t)0xc0361e3a, (q31_t)0x3ac0e83d, (q31_t)0xc03724b6,
-    (q31_t)0x3ab4622d, (q31_t)0xc0382da8, (q31_t)0x3aa7dc52, (q31_t)0xc0393910,
-    (q31_t)0x3a9b56ab, (q31_t)0xc03a46ed, (q31_t)0x3a8ed139, (q31_t)0xc03b573f,
-    (q31_t)0x3a824bfd, (q31_t)0xc03c6a07, (q31_t)0x3a75c6f8, (q31_t)0xc03d7f44,
-    (q31_t)0x3a694229, (q31_t)0xc03e96f6, (q31_t)0x3a5cbd91, (q31_t)0xc03fb11d,
-    (q31_t)0x3a503930, (q31_t)0xc040cdba, (q31_t)0x3a43b508, (q31_t)0xc041eccc,
-    (q31_t)0x3a373119, (q31_t)0xc0430e53, (q31_t)0x3a2aad62, (q31_t)0xc044324f,
-    (q31_t)0x3a1e29e5, (q31_t)0xc04558c0, (q31_t)0x3a11a6a3, (q31_t)0xc04681a6,
-    (q31_t)0x3a05239a, (q31_t)0xc047ad01, (q31_t)0x39f8a0cd, (q31_t)0xc048dad1,
-    (q31_t)0x39ec1e3b, (q31_t)0xc04a0b16, (q31_t)0x39df9be6, (q31_t)0xc04b3dcf,
-    (q31_t)0x39d319cc, (q31_t)0xc04c72fe, (q31_t)0x39c697f0, (q31_t)0xc04daaa1,
-    (q31_t)0x39ba1651, (q31_t)0xc04ee4b8, (q31_t)0x39ad94f0, (q31_t)0xc0502145,
-    (q31_t)0x39a113cd, (q31_t)0xc0516045, (q31_t)0x399492ea, (q31_t)0xc052a1bb,
-    (q31_t)0x39881245, (q31_t)0xc053e5a5, (q31_t)0x397b91e1, (q31_t)0xc0552c03,
-    (q31_t)0x396f11bc, (q31_t)0xc05674d6, (q31_t)0x396291d9, (q31_t)0xc057c01d,
-    (q31_t)0x39561237, (q31_t)0xc0590dd8, (q31_t)0x394992d7, (q31_t)0xc05a5e07,
-    (q31_t)0x393d13b8, (q31_t)0xc05bb0ab, (q31_t)0x393094dd, (q31_t)0xc05d05c3,
-    (q31_t)0x39241645, (q31_t)0xc05e5d4e, (q31_t)0x391797f0, (q31_t)0xc05fb74e,
-    (q31_t)0x390b19e0, (q31_t)0xc06113c2, (q31_t)0x38fe9c15, (q31_t)0xc06272aa,
-    (q31_t)0x38f21e8e, (q31_t)0xc063d405, (q31_t)0x38e5a14d, (q31_t)0xc06537d4,
-    (q31_t)0x38d92452, (q31_t)0xc0669e18, (q31_t)0x38cca79e, (q31_t)0xc06806ce,
-    (q31_t)0x38c02b31, (q31_t)0xc06971f9, (q31_t)0x38b3af0c, (q31_t)0xc06adf97,
-    (q31_t)0x38a7332e, (q31_t)0xc06c4fa8, (q31_t)0x389ab799, (q31_t)0xc06dc22e,
-    (q31_t)0x388e3c4d, (q31_t)0xc06f3726, (q31_t)0x3881c14b, (q31_t)0xc070ae92,
-    (q31_t)0x38754692, (q31_t)0xc0722871, (q31_t)0x3868cc24, (q31_t)0xc073a4c3,
-    (q31_t)0x385c5201, (q31_t)0xc0752389, (q31_t)0x384fd829, (q31_t)0xc076a4c2,
-    (q31_t)0x38435e9d, (q31_t)0xc078286e, (q31_t)0x3836e55d, (q31_t)0xc079ae8c,
-    (q31_t)0x382a6c6a, (q31_t)0xc07b371e, (q31_t)0x381df3c5, (q31_t)0xc07cc223,
-    (q31_t)0x38117b6d, (q31_t)0xc07e4f9b, (q31_t)0x38050364, (q31_t)0xc07fdf85,
-    (q31_t)0x37f88ba9, (q31_t)0xc08171e2, (q31_t)0x37ec143e, (q31_t)0xc08306b2,
-    (q31_t)0x37df9d22, (q31_t)0xc0849df4, (q31_t)0x37d32657, (q31_t)0xc08637a9,
-    (q31_t)0x37c6afdc, (q31_t)0xc087d3d0, (q31_t)0x37ba39b3, (q31_t)0xc089726a,
-    (q31_t)0x37adc3db, (q31_t)0xc08b1376, (q31_t)0x37a14e55, (q31_t)0xc08cb6f5,
-    (q31_t)0x3794d922, (q31_t)0xc08e5ce5, (q31_t)0x37886442, (q31_t)0xc0900548,
-    (q31_t)0x377befb5, (q31_t)0xc091b01d, (q31_t)0x376f7b7d, (q31_t)0xc0935d64,
-    (q31_t)0x37630799, (q31_t)0xc0950d1d, (q31_t)0x3756940a, (q31_t)0xc096bf48,
-    (q31_t)0x374a20d0, (q31_t)0xc09873e4, (q31_t)0x373daded, (q31_t)0xc09a2af3,
-    (q31_t)0x37313b60, (q31_t)0xc09be473, (q31_t)0x3724c92a, (q31_t)0xc09da065,
-    (q31_t)0x3718574b, (q31_t)0xc09f5ec8, (q31_t)0x370be5c4, (q31_t)0xc0a11f9d,
-    (q31_t)0x36ff7496, (q31_t)0xc0a2e2e3, (q31_t)0x36f303c0, (q31_t)0xc0a4a89b,
-    (q31_t)0x36e69344, (q31_t)0xc0a670c4, (q31_t)0x36da2321, (q31_t)0xc0a83b5e,
-    (q31_t)0x36cdb359, (q31_t)0xc0aa086a, (q31_t)0x36c143ec, (q31_t)0xc0abd7e6,
-    (q31_t)0x36b4d4d9, (q31_t)0xc0ada9d4, (q31_t)0x36a86623, (q31_t)0xc0af7e33,
-    (q31_t)0x369bf7c9, (q31_t)0xc0b15502, (q31_t)0x368f89cb, (q31_t)0xc0b32e42,
-    (q31_t)0x36831c2b, (q31_t)0xc0b509f3, (q31_t)0x3676aee8, (q31_t)0xc0b6e815,
-    (q31_t)0x366a4203, (q31_t)0xc0b8c8a7, (q31_t)0x365dd57d, (q31_t)0xc0baabaa,
-    (q31_t)0x36516956, (q31_t)0xc0bc911d, (q31_t)0x3644fd8f, (q31_t)0xc0be7901,
-    (q31_t)0x36389228, (q31_t)0xc0c06355, (q31_t)0x362c2721, (q31_t)0xc0c25019,
-    (q31_t)0x361fbc7b, (q31_t)0xc0c43f4d, (q31_t)0x36135237, (q31_t)0xc0c630f2,
-    (q31_t)0x3606e854, (q31_t)0xc0c82506, (q31_t)0x35fa7ed4, (q31_t)0xc0ca1b8a,
-    (q31_t)0x35ee15b7, (q31_t)0xc0cc147f, (q31_t)0x35e1acfd, (q31_t)0xc0ce0fe3,
-    (q31_t)0x35d544a7, (q31_t)0xc0d00db6, (q31_t)0x35c8dcb6, (q31_t)0xc0d20dfa,
-    (q31_t)0x35bc7529, (q31_t)0xc0d410ad, (q31_t)0x35b00e02, (q31_t)0xc0d615cf,
-    (q31_t)0x35a3a740, (q31_t)0xc0d81d61, (q31_t)0x359740e5, (q31_t)0xc0da2762,
-    (q31_t)0x358adaf0, (q31_t)0xc0dc33d2, (q31_t)0x357e7563, (q31_t)0xc0de42b2,
-    (q31_t)0x3572103d, (q31_t)0xc0e05401, (q31_t)0x3565ab80, (q31_t)0xc0e267be,
-    (q31_t)0x3559472b, (q31_t)0xc0e47deb, (q31_t)0x354ce33f, (q31_t)0xc0e69686,
-    (q31_t)0x35407fbd, (q31_t)0xc0e8b190, (q31_t)0x35341ca5, (q31_t)0xc0eacf09,
-    (q31_t)0x3527b9f7, (q31_t)0xc0eceef1, (q31_t)0x351b57b5, (q31_t)0xc0ef1147,
-    (q31_t)0x350ef5de, (q31_t)0xc0f1360b, (q31_t)0x35029473, (q31_t)0xc0f35d3e,
-    (q31_t)0x34f63374, (q31_t)0xc0f586df, (q31_t)0x34e9d2e3, (q31_t)0xc0f7b2ee,
-    (q31_t)0x34dd72be, (q31_t)0xc0f9e16b, (q31_t)0x34d11308, (q31_t)0xc0fc1257,
-    (q31_t)0x34c4b3c0, (q31_t)0xc0fe45b0, (q31_t)0x34b854e7, (q31_t)0xc1007b77,
-    (q31_t)0x34abf67e, (q31_t)0xc102b3ac, (q31_t)0x349f9884, (q31_t)0xc104ee4f,
-    (q31_t)0x34933afa, (q31_t)0xc1072b5f, (q31_t)0x3486dde1, (q31_t)0xc1096add,
-    (q31_t)0x347a8139, (q31_t)0xc10bacc8, (q31_t)0x346e2504, (q31_t)0xc10df120,
-    (q31_t)0x3461c940, (q31_t)0xc11037e6, (q31_t)0x34556def, (q31_t)0xc1128119,
-    (q31_t)0x34491311, (q31_t)0xc114ccb9, (q31_t)0x343cb8a7, (q31_t)0xc1171ac6,
-    (q31_t)0x34305eb0, (q31_t)0xc1196b3f, (q31_t)0x3424052f, (q31_t)0xc11bbe26,
-    (q31_t)0x3417ac22, (q31_t)0xc11e1379, (q31_t)0x340b538b, (q31_t)0xc1206b39,
-    (q31_t)0x33fefb6a, (q31_t)0xc122c566, (q31_t)0x33f2a3bf, (q31_t)0xc12521ff,
-    (q31_t)0x33e64c8c, (q31_t)0xc1278104, (q31_t)0x33d9f5cf, (q31_t)0xc129e276,
-    (q31_t)0x33cd9f8b, (q31_t)0xc12c4653, (q31_t)0x33c149bf, (q31_t)0xc12eac9d,
-    (q31_t)0x33b4f46c, (q31_t)0xc1311553, (q31_t)0x33a89f92, (q31_t)0xc1338075,
-    (q31_t)0x339c4b32, (q31_t)0xc135ee02, (q31_t)0x338ff74d, (q31_t)0xc1385dfb,
-    (q31_t)0x3383a3e2, (q31_t)0xc13ad060, (q31_t)0x337750f2, (q31_t)0xc13d4530,
-    (q31_t)0x336afe7e, (q31_t)0xc13fbc6c, (q31_t)0x335eac86, (q31_t)0xc1423613,
-    (q31_t)0x33525b0b, (q31_t)0xc144b225, (q31_t)0x33460a0d, (q31_t)0xc14730a3,
-    (q31_t)0x3339b98d, (q31_t)0xc149b18b, (q31_t)0x332d698a, (q31_t)0xc14c34df,
-    (q31_t)0x33211a07, (q31_t)0xc14eba9d, (q31_t)0x3314cb02, (q31_t)0xc15142c6,
-    (q31_t)0x33087c7d, (q31_t)0xc153cd5a, (q31_t)0x32fc2e77, (q31_t)0xc1565a58,
-    (q31_t)0x32efe0f2, (q31_t)0xc158e9c1, (q31_t)0x32e393ef, (q31_t)0xc15b7b94,
-    (q31_t)0x32d7476c, (q31_t)0xc15e0fd1, (q31_t)0x32cafb6b, (q31_t)0xc160a678,
-    (q31_t)0x32beafed, (q31_t)0xc1633f8a, (q31_t)0x32b264f2, (q31_t)0xc165db05,
-    (q31_t)0x32a61a7a, (q31_t)0xc16878eb, (q31_t)0x3299d085, (q31_t)0xc16b193a,
-    (q31_t)0x328d8715, (q31_t)0xc16dbbf3, (q31_t)0x32813e2a, (q31_t)0xc1706115,
-    (q31_t)0x3274f5c3, (q31_t)0xc17308a1, (q31_t)0x3268ade3, (q31_t)0xc175b296,
-    (q31_t)0x325c6688, (q31_t)0xc1785ef4, (q31_t)0x32501fb5, (q31_t)0xc17b0dbb,
-    (q31_t)0x3243d968, (q31_t)0xc17dbeec, (q31_t)0x323793a3, (q31_t)0xc1807285,
-    (q31_t)0x322b4e66, (q31_t)0xc1832888, (q31_t)0x321f09b1, (q31_t)0xc185e0f3,
-    (q31_t)0x3212c585, (q31_t)0xc1889bc6, (q31_t)0x320681e3, (q31_t)0xc18b5903,
-    (q31_t)0x31fa3ecb, (q31_t)0xc18e18a7, (q31_t)0x31edfc3d, (q31_t)0xc190dab4,
-    (q31_t)0x31e1ba3a, (q31_t)0xc1939f29, (q31_t)0x31d578c2, (q31_t)0xc1966606,
-    (q31_t)0x31c937d6, (q31_t)0xc1992f4c, (q31_t)0x31bcf777, (q31_t)0xc19bfaf9,
-    (q31_t)0x31b0b7a4, (q31_t)0xc19ec90d, (q31_t)0x31a4785e, (q31_t)0xc1a1998a,
-    (q31_t)0x319839a6, (q31_t)0xc1a46c6e, (q31_t)0x318bfb7d, (q31_t)0xc1a741b9,
-    (q31_t)0x317fbde2, (q31_t)0xc1aa196c, (q31_t)0x317380d6, (q31_t)0xc1acf386,
-    (q31_t)0x31674459, (q31_t)0xc1afd007, (q31_t)0x315b086d, (q31_t)0xc1b2aef0,
-    (q31_t)0x314ecd11, (q31_t)0xc1b5903f, (q31_t)0x31429247, (q31_t)0xc1b873f5,
-    (q31_t)0x3136580d, (q31_t)0xc1bb5a11, (q31_t)0x312a1e66, (q31_t)0xc1be4294,
-    (q31_t)0x311de551, (q31_t)0xc1c12d7e, (q31_t)0x3111accf, (q31_t)0xc1c41ace,
-    (q31_t)0x310574e0, (q31_t)0xc1c70a84, (q31_t)0x30f93d86, (q31_t)0xc1c9fca0,
-    (q31_t)0x30ed06bf, (q31_t)0xc1ccf122, (q31_t)0x30e0d08d, (q31_t)0xc1cfe80a,
-    (q31_t)0x30d49af1, (q31_t)0xc1d2e158, (q31_t)0x30c865ea, (q31_t)0xc1d5dd0c,
-    (q31_t)0x30bc317a, (q31_t)0xc1d8db25, (q31_t)0x30affda0, (q31_t)0xc1dbdba3,
-    (q31_t)0x30a3ca5d, (q31_t)0xc1dede87, (q31_t)0x309797b2, (q31_t)0xc1e1e3d0,
-    (q31_t)0x308b659f, (q31_t)0xc1e4eb7e, (q31_t)0x307f3424, (q31_t)0xc1e7f591,
-    (q31_t)0x30730342, (q31_t)0xc1eb0209, (q31_t)0x3066d2fa, (q31_t)0xc1ee10e5,
-    (q31_t)0x305aa34c, (q31_t)0xc1f12227, (q31_t)0x304e7438, (q31_t)0xc1f435cc,
-    (q31_t)0x304245c0, (q31_t)0xc1f74bd6, (q31_t)0x303617e2, (q31_t)0xc1fa6445,
-    (q31_t)0x3029eaa1, (q31_t)0xc1fd7f17, (q31_t)0x301dbdfb, (q31_t)0xc2009c4e,
-    (q31_t)0x301191f3, (q31_t)0xc203bbe8, (q31_t)0x30056687, (q31_t)0xc206dde6,
-    (q31_t)0x2ff93bba, (q31_t)0xc20a0248, (q31_t)0x2fed118a, (q31_t)0xc20d290d,
-    (q31_t)0x2fe0e7f9, (q31_t)0xc2105236, (q31_t)0x2fd4bf08, (q31_t)0xc2137dc2,
-    (q31_t)0x2fc896b5, (q31_t)0xc216abb1, (q31_t)0x2fbc6f03, (q31_t)0xc219dc03,
-    (q31_t)0x2fb047f2, (q31_t)0xc21d0eb8, (q31_t)0x2fa42181, (q31_t)0xc22043d0,
-    (q31_t)0x2f97fbb2, (q31_t)0xc2237b4b, (q31_t)0x2f8bd685, (q31_t)0xc226b528,
-    (q31_t)0x2f7fb1fa, (q31_t)0xc229f167, (q31_t)0x2f738e12, (q31_t)0xc22d3009,
-    (q31_t)0x2f676ace, (q31_t)0xc230710d, (q31_t)0x2f5b482d, (q31_t)0xc233b473,
-    (q31_t)0x2f4f2630, (q31_t)0xc236fa3b, (q31_t)0x2f4304d8, (q31_t)0xc23a4265,
-    (q31_t)0x2f36e426, (q31_t)0xc23d8cf1, (q31_t)0x2f2ac419, (q31_t)0xc240d9de,
-    (q31_t)0x2f1ea4b2, (q31_t)0xc244292c, (q31_t)0x2f1285f2, (q31_t)0xc2477adc,
-    (q31_t)0x2f0667d9, (q31_t)0xc24aceed, (q31_t)0x2efa4a67, (q31_t)0xc24e255e,
-    (q31_t)0x2eee2d9d, (q31_t)0xc2517e31, (q31_t)0x2ee2117c, (q31_t)0xc254d965,
-    (q31_t)0x2ed5f604, (q31_t)0xc25836f9, (q31_t)0x2ec9db35, (q31_t)0xc25b96ee,
-    (q31_t)0x2ebdc110, (q31_t)0xc25ef943, (q31_t)0x2eb1a796, (q31_t)0xc2625df8,
-    (q31_t)0x2ea58ec6, (q31_t)0xc265c50e, (q31_t)0x2e9976a1, (q31_t)0xc2692e83,
-    (q31_t)0x2e8d5f29, (q31_t)0xc26c9a58, (q31_t)0x2e81485c, (q31_t)0xc270088e,
-    (q31_t)0x2e75323c, (q31_t)0xc2737922, (q31_t)0x2e691cc9, (q31_t)0xc276ec16,
-    (q31_t)0x2e5d0804, (q31_t)0xc27a616a, (q31_t)0x2e50f3ed, (q31_t)0xc27dd91c,
-    (q31_t)0x2e44e084, (q31_t)0xc281532e, (q31_t)0x2e38cdcb, (q31_t)0xc284cf9f,
-    (q31_t)0x2e2cbbc1, (q31_t)0xc2884e6e, (q31_t)0x2e20aa67, (q31_t)0xc28bcf9c,
-    (q31_t)0x2e1499bd, (q31_t)0xc28f5329, (q31_t)0x2e0889c4, (q31_t)0xc292d914,
-    (q31_t)0x2dfc7a7c, (q31_t)0xc296615d, (q31_t)0x2df06be6, (q31_t)0xc299ec05,
-    (q31_t)0x2de45e03, (q31_t)0xc29d790a, (q31_t)0x2dd850d2, (q31_t)0xc2a1086d,
-    (q31_t)0x2dcc4454, (q31_t)0xc2a49a2e, (q31_t)0x2dc0388a, (q31_t)0xc2a82e4d,
-    (q31_t)0x2db42d74, (q31_t)0xc2abc4c9, (q31_t)0x2da82313, (q31_t)0xc2af5da2,
-    (q31_t)0x2d9c1967, (q31_t)0xc2b2f8d8, (q31_t)0x2d901070, (q31_t)0xc2b6966c,
-    (q31_t)0x2d84082f, (q31_t)0xc2ba365c, (q31_t)0x2d7800a5, (q31_t)0xc2bdd8a9,
-    (q31_t)0x2d6bf9d1, (q31_t)0xc2c17d52, (q31_t)0x2d5ff3b5, (q31_t)0xc2c52459,
-    (q31_t)0x2d53ee51, (q31_t)0xc2c8cdbb, (q31_t)0x2d47e9a5, (q31_t)0xc2cc7979,
-    (q31_t)0x2d3be5b1, (q31_t)0xc2d02794, (q31_t)0x2d2fe277, (q31_t)0xc2d3d80a,
-    (q31_t)0x2d23dff7, (q31_t)0xc2d78add, (q31_t)0x2d17de31, (q31_t)0xc2db400a,
-    (q31_t)0x2d0bdd25, (q31_t)0xc2def794, (q31_t)0x2cffdcd4, (q31_t)0xc2e2b178,
-    (q31_t)0x2cf3dd3f, (q31_t)0xc2e66db8, (q31_t)0x2ce7de66, (q31_t)0xc2ea2c53,
-    (q31_t)0x2cdbe04a, (q31_t)0xc2eded49, (q31_t)0x2ccfe2ea, (q31_t)0xc2f1b099,
-    (q31_t)0x2cc3e648, (q31_t)0xc2f57644, (q31_t)0x2cb7ea63, (q31_t)0xc2f93e4a,
-    (q31_t)0x2cabef3d, (q31_t)0xc2fd08a9, (q31_t)0x2c9ff4d6, (q31_t)0xc300d563,
-    (q31_t)0x2c93fb2e, (q31_t)0xc304a477, (q31_t)0x2c880245, (q31_t)0xc30875e5,
-    (q31_t)0x2c7c0a1d, (q31_t)0xc30c49ad, (q31_t)0x2c7012b5, (q31_t)0xc3101fce,
-    (q31_t)0x2c641c0e, (q31_t)0xc313f848, (q31_t)0x2c582629, (q31_t)0xc317d31c,
-    (q31_t)0x2c4c3106, (q31_t)0xc31bb049, (q31_t)0x2c403ca5, (q31_t)0xc31f8fcf,
-    (q31_t)0x2c344908, (q31_t)0xc32371ae, (q31_t)0x2c28562d, (q31_t)0xc32755e5,
-    (q31_t)0x2c1c6417, (q31_t)0xc32b3c75, (q31_t)0x2c1072c4, (q31_t)0xc32f255e,
-    (q31_t)0x2c048237, (q31_t)0xc333109e, (q31_t)0x2bf8926f, (q31_t)0xc336fe37,
-    (q31_t)0x2beca36c, (q31_t)0xc33aee27, (q31_t)0x2be0b52f, (q31_t)0xc33ee070,
-    (q31_t)0x2bd4c7ba, (q31_t)0xc342d510, (q31_t)0x2bc8db0b, (q31_t)0xc346cc07,
-    (q31_t)0x2bbcef23, (q31_t)0xc34ac556, (q31_t)0x2bb10404, (q31_t)0xc34ec0fc,
-    (q31_t)0x2ba519ad, (q31_t)0xc352bef9, (q31_t)0x2b99301f, (q31_t)0xc356bf4d,
-    (q31_t)0x2b8d475b, (q31_t)0xc35ac1f7, (q31_t)0x2b815f60, (q31_t)0xc35ec6f8,
-    (q31_t)0x2b75782f, (q31_t)0xc362ce50, (q31_t)0x2b6991ca, (q31_t)0xc366d7fd,
-    (q31_t)0x2b5dac2f, (q31_t)0xc36ae401, (q31_t)0x2b51c760, (q31_t)0xc36ef25b,
-    (q31_t)0x2b45e35d, (q31_t)0xc373030a, (q31_t)0x2b3a0027, (q31_t)0xc377160f,
-    (q31_t)0x2b2e1dbe, (q31_t)0xc37b2b6a, (q31_t)0x2b223c22, (q31_t)0xc37f4319,
-    (q31_t)0x2b165b54, (q31_t)0xc3835d1e, (q31_t)0x2b0a7b54, (q31_t)0xc3877978,
-    (q31_t)0x2afe9c24, (q31_t)0xc38b9827, (q31_t)0x2af2bdc3, (q31_t)0xc38fb92a,
-    (q31_t)0x2ae6e031, (q31_t)0xc393dc82, (q31_t)0x2adb0370, (q31_t)0xc398022f,
-    (q31_t)0x2acf277f, (q31_t)0xc39c2a2f, (q31_t)0x2ac34c60, (q31_t)0xc3a05484,
-    (q31_t)0x2ab77212, (q31_t)0xc3a4812c, (q31_t)0x2aab9896, (q31_t)0xc3a8b028,
-    (q31_t)0x2a9fbfed, (q31_t)0xc3ace178, (q31_t)0x2a93e817, (q31_t)0xc3b1151b,
-    (q31_t)0x2a881114, (q31_t)0xc3b54b11, (q31_t)0x2a7c3ae5, (q31_t)0xc3b9835a,
-    (q31_t)0x2a70658a, (q31_t)0xc3bdbdf6, (q31_t)0x2a649105, (q31_t)0xc3c1fae5,
-    (q31_t)0x2a58bd54, (q31_t)0xc3c63a26, (q31_t)0x2a4cea79, (q31_t)0xc3ca7bba,
-    (q31_t)0x2a411874, (q31_t)0xc3cebfa0, (q31_t)0x2a354746, (q31_t)0xc3d305d8,
-    (q31_t)0x2a2976ef, (q31_t)0xc3d74e62, (q31_t)0x2a1da770, (q31_t)0xc3db993e,
-    (q31_t)0x2a11d8c8, (q31_t)0xc3dfe66c, (q31_t)0x2a060af9, (q31_t)0xc3e435ea,
-    (q31_t)0x29fa3e03, (q31_t)0xc3e887bb, (q31_t)0x29ee71e6, (q31_t)0xc3ecdbdc,
-    (q31_t)0x29e2a6a3, (q31_t)0xc3f1324e, (q31_t)0x29d6dc3b, (q31_t)0xc3f58b10,
-    (q31_t)0x29cb12ad, (q31_t)0xc3f9e624, (q31_t)0x29bf49fa, (q31_t)0xc3fe4388,
-    (q31_t)0x29b38223, (q31_t)0xc402a33c, (q31_t)0x29a7bb28, (q31_t)0xc4070540,
-    (q31_t)0x299bf509, (q31_t)0xc40b6994, (q31_t)0x29902fc7, (q31_t)0xc40fd037,
-    (q31_t)0x29846b63, (q31_t)0xc414392b, (q31_t)0x2978a7dd, (q31_t)0xc418a46d,
-    (q31_t)0x296ce535, (q31_t)0xc41d11ff, (q31_t)0x2961236c, (q31_t)0xc42181e0,
-    (q31_t)0x29556282, (q31_t)0xc425f410, (q31_t)0x2949a278, (q31_t)0xc42a688f,
-    (q31_t)0x293de34e, (q31_t)0xc42edf5c, (q31_t)0x29322505, (q31_t)0xc4335877,
-    (q31_t)0x2926679c, (q31_t)0xc437d3e1, (q31_t)0x291aab16, (q31_t)0xc43c5199,
-    (q31_t)0x290eef71, (q31_t)0xc440d19e, (q31_t)0x290334af, (q31_t)0xc44553f2,
-    (q31_t)0x28f77acf, (q31_t)0xc449d892, (q31_t)0x28ebc1d3, (q31_t)0xc44e5f80,
-    (q31_t)0x28e009ba, (q31_t)0xc452e8bc, (q31_t)0x28d45286, (q31_t)0xc4577444,
-    (q31_t)0x28c89c37, (q31_t)0xc45c0219, (q31_t)0x28bce6cd, (q31_t)0xc460923b,
-    (q31_t)0x28b13248, (q31_t)0xc46524a9, (q31_t)0x28a57ea9, (q31_t)0xc469b963,
-    (q31_t)0x2899cbf1, (q31_t)0xc46e5069, (q31_t)0x288e1a20, (q31_t)0xc472e9bc,
-    (q31_t)0x28826936, (q31_t)0xc477855a, (q31_t)0x2876b934, (q31_t)0xc47c2344,
-    (q31_t)0x286b0a1a, (q31_t)0xc480c379, (q31_t)0x285f5be9, (q31_t)0xc48565f9,
-    (q31_t)0x2853aea1, (q31_t)0xc48a0ac4, (q31_t)0x28480243, (q31_t)0xc48eb1db,
-    (q31_t)0x283c56cf, (q31_t)0xc4935b3c, (q31_t)0x2830ac45, (q31_t)0xc49806e7,
-    (q31_t)0x282502a7, (q31_t)0xc49cb4dd, (q31_t)0x281959f4, (q31_t)0xc4a1651c,
-    (q31_t)0x280db22d, (q31_t)0xc4a617a6, (q31_t)0x28020b52, (q31_t)0xc4aacc7a,
-    (q31_t)0x27f66564, (q31_t)0xc4af8397, (q31_t)0x27eac063, (q31_t)0xc4b43cfd,
-    (q31_t)0x27df1c50, (q31_t)0xc4b8f8ad, (q31_t)0x27d3792b, (q31_t)0xc4bdb6a6,
-    (q31_t)0x27c7d6f4, (q31_t)0xc4c276e8, (q31_t)0x27bc35ad, (q31_t)0xc4c73972,
-    (q31_t)0x27b09555, (q31_t)0xc4cbfe45, (q31_t)0x27a4f5ed, (q31_t)0xc4d0c560,
-    (q31_t)0x27995776, (q31_t)0xc4d58ec3, (q31_t)0x278db9ef, (q31_t)0xc4da5a6f,
-    (q31_t)0x27821d59, (q31_t)0xc4df2862, (q31_t)0x277681b6, (q31_t)0xc4e3f89c,
-    (q31_t)0x276ae704, (q31_t)0xc4e8cb1e, (q31_t)0x275f4d45, (q31_t)0xc4ed9fe7,
-    (q31_t)0x2753b479, (q31_t)0xc4f276f7, (q31_t)0x27481ca1, (q31_t)0xc4f7504e,
-    (q31_t)0x273c85bc, (q31_t)0xc4fc2bec, (q31_t)0x2730efcc, (q31_t)0xc50109d0,
-    (q31_t)0x27255ad1, (q31_t)0xc505e9fb, (q31_t)0x2719c6cb, (q31_t)0xc50acc6b,
-    (q31_t)0x270e33bb, (q31_t)0xc50fb121, (q31_t)0x2702a1a1, (q31_t)0xc514981d,
-    (q31_t)0x26f7107e, (q31_t)0xc519815f, (q31_t)0x26eb8052, (q31_t)0xc51e6ce6,
-    (q31_t)0x26dff11d, (q31_t)0xc5235ab2, (q31_t)0x26d462e1, (q31_t)0xc5284ac3,
-    (q31_t)0x26c8d59c, (q31_t)0xc52d3d18, (q31_t)0x26bd4951, (q31_t)0xc53231b3,
-    (q31_t)0x26b1bdff, (q31_t)0xc5372891, (q31_t)0x26a633a6, (q31_t)0xc53c21b4,
-    (q31_t)0x269aaa48, (q31_t)0xc5411d1b, (q31_t)0x268f21e5, (q31_t)0xc5461ac6,
-    (q31_t)0x26839a7c, (q31_t)0xc54b1ab4, (q31_t)0x26781410, (q31_t)0xc5501ce5,
-    (q31_t)0x266c8e9f, (q31_t)0xc555215a, (q31_t)0x26610a2a, (q31_t)0xc55a2812,
-    (q31_t)0x265586b3, (q31_t)0xc55f310d, (q31_t)0x264a0438, (q31_t)0xc5643c4a,
-    (q31_t)0x263e82bc, (q31_t)0xc56949ca, (q31_t)0x2633023e, (q31_t)0xc56e598c,
-    (q31_t)0x262782be, (q31_t)0xc5736b90, (q31_t)0x261c043d, (q31_t)0xc5787fd6,
-    (q31_t)0x261086bc, (q31_t)0xc57d965d, (q31_t)0x26050a3b, (q31_t)0xc582af26,
-    (q31_t)0x25f98ebb, (q31_t)0xc587ca31, (q31_t)0x25ee143b, (q31_t)0xc58ce77c,
-    (q31_t)0x25e29abc, (q31_t)0xc5920708, (q31_t)0x25d72240, (q31_t)0xc59728d5,
-    (q31_t)0x25cbaac5, (q31_t)0xc59c4ce3, (q31_t)0x25c0344d, (q31_t)0xc5a17330,
-    (q31_t)0x25b4bed8, (q31_t)0xc5a69bbe, (q31_t)0x25a94a67, (q31_t)0xc5abc68c,
-    (q31_t)0x259dd6f9, (q31_t)0xc5b0f399, (q31_t)0x25926490, (q31_t)0xc5b622e6,
-    (q31_t)0x2586f32c, (q31_t)0xc5bb5472, (q31_t)0x257b82cd, (q31_t)0xc5c0883d,
-    (q31_t)0x25701374, (q31_t)0xc5c5be47, (q31_t)0x2564a521, (q31_t)0xc5caf690,
-    (q31_t)0x255937d5, (q31_t)0xc5d03118, (q31_t)0x254dcb8f, (q31_t)0xc5d56ddd,
-    (q31_t)0x25426051, (q31_t)0xc5daace1, (q31_t)0x2536f61b, (q31_t)0xc5dfee22,
-    (q31_t)0x252b8cee, (q31_t)0xc5e531a1, (q31_t)0x252024c9, (q31_t)0xc5ea775e,
-    (q31_t)0x2514bdad, (q31_t)0xc5efbf58, (q31_t)0x2509579b, (q31_t)0xc5f5098f,
-    (q31_t)0x24fdf294, (q31_t)0xc5fa5603, (q31_t)0x24f28e96, (q31_t)0xc5ffa4b3,
-    (q31_t)0x24e72ba4, (q31_t)0xc604f5a0, (q31_t)0x24dbc9bd, (q31_t)0xc60a48c9,
-    (q31_t)0x24d068e2, (q31_t)0xc60f9e2e, (q31_t)0x24c50914, (q31_t)0xc614f5cf,
-    (q31_t)0x24b9aa52, (q31_t)0xc61a4fac, (q31_t)0x24ae4c9d, (q31_t)0xc61fabc4,
-    (q31_t)0x24a2eff6, (q31_t)0xc6250a18, (q31_t)0x2497945d, (q31_t)0xc62a6aa6,
-    (q31_t)0x248c39d3, (q31_t)0xc62fcd6f, (q31_t)0x2480e057, (q31_t)0xc6353273,
-    (q31_t)0x247587eb, (q31_t)0xc63a99b1, (q31_t)0x246a308f, (q31_t)0xc6400329,
-    (q31_t)0x245eda43, (q31_t)0xc6456edb, (q31_t)0x24538507, (q31_t)0xc64adcc7,
-    (q31_t)0x244830dd, (q31_t)0xc6504ced, (q31_t)0x243cddc4, (q31_t)0xc655bf4c,
-    (q31_t)0x24318bbe, (q31_t)0xc65b33e4, (q31_t)0x24263ac9, (q31_t)0xc660aab5,
-    (q31_t)0x241aeae8, (q31_t)0xc66623be, (q31_t)0x240f9c1a, (q31_t)0xc66b9f01,
-    (q31_t)0x24044e60, (q31_t)0xc6711c7b, (q31_t)0x23f901ba, (q31_t)0xc6769c2e,
-    (q31_t)0x23edb628, (q31_t)0xc67c1e18, (q31_t)0x23e26bac, (q31_t)0xc681a23a,
-    (q31_t)0x23d72245, (q31_t)0xc6872894, (q31_t)0x23cbd9f4, (q31_t)0xc68cb124,
-    (q31_t)0x23c092b9, (q31_t)0xc6923bec, (q31_t)0x23b54c95, (q31_t)0xc697c8eb,
-    (q31_t)0x23aa0788, (q31_t)0xc69d5820, (q31_t)0x239ec393, (q31_t)0xc6a2e98b,
-    (q31_t)0x239380b6, (q31_t)0xc6a87d2d, (q31_t)0x23883ef2, (q31_t)0xc6ae1304,
-    (q31_t)0x237cfe47, (q31_t)0xc6b3ab12, (q31_t)0x2371beb5, (q31_t)0xc6b94554,
-    (q31_t)0x2366803c, (q31_t)0xc6bee1cd, (q31_t)0x235b42df, (q31_t)0xc6c4807a,
-    (q31_t)0x2350069b, (q31_t)0xc6ca215c, (q31_t)0x2344cb73, (q31_t)0xc6cfc472,
-    (q31_t)0x23399167, (q31_t)0xc6d569be, (q31_t)0x232e5876, (q31_t)0xc6db113d,
-    (q31_t)0x232320a2, (q31_t)0xc6e0baf0, (q31_t)0x2317e9eb, (q31_t)0xc6e666d7,
-    (q31_t)0x230cb451, (q31_t)0xc6ec14f2, (q31_t)0x23017fd5, (q31_t)0xc6f1c540,
-    (q31_t)0x22f64c77, (q31_t)0xc6f777c1, (q31_t)0x22eb1a37, (q31_t)0xc6fd2c75,
-    (q31_t)0x22dfe917, (q31_t)0xc702e35c, (q31_t)0x22d4b916, (q31_t)0xc7089c75,
-    (q31_t)0x22c98a35, (q31_t)0xc70e57c0, (q31_t)0x22be5c74, (q31_t)0xc714153e,
-    (q31_t)0x22b32fd4, (q31_t)0xc719d4ed, (q31_t)0x22a80456, (q31_t)0xc71f96ce,
-    (q31_t)0x229cd9f8, (q31_t)0xc7255ae0, (q31_t)0x2291b0bd, (q31_t)0xc72b2123,
-    (q31_t)0x228688a4, (q31_t)0xc730e997, (q31_t)0x227b61af, (q31_t)0xc736b43c,
-    (q31_t)0x22703bdc, (q31_t)0xc73c8111, (q31_t)0x2265172e, (q31_t)0xc7425016,
-    (q31_t)0x2259f3a3, (q31_t)0xc748214c, (q31_t)0x224ed13d, (q31_t)0xc74df4b1,
-    (q31_t)0x2243affc, (q31_t)0xc753ca46, (q31_t)0x22388fe1, (q31_t)0xc759a20a,
-    (q31_t)0x222d70eb, (q31_t)0xc75f7bfe, (q31_t)0x2222531c, (q31_t)0xc7655820,
-    (q31_t)0x22173674, (q31_t)0xc76b3671, (q31_t)0x220c1af3, (q31_t)0xc77116f0,
-    (q31_t)0x22010099, (q31_t)0xc776f99d, (q31_t)0x21f5e768, (q31_t)0xc77cde79,
-    (q31_t)0x21eacf5f, (q31_t)0xc782c582, (q31_t)0x21dfb87f, (q31_t)0xc788aeb9,
-    (q31_t)0x21d4a2c8, (q31_t)0xc78e9a1d, (q31_t)0x21c98e3b, (q31_t)0xc79487ae,
-    (q31_t)0x21be7ad8, (q31_t)0xc79a776c, (q31_t)0x21b368a0, (q31_t)0xc7a06957,
-    (q31_t)0x21a85793, (q31_t)0xc7a65d6e, (q31_t)0x219d47b1, (q31_t)0xc7ac53b1,
-    (q31_t)0x219238fb, (q31_t)0xc7b24c20, (q31_t)0x21872b72, (q31_t)0xc7b846ba,
-    (q31_t)0x217c1f15, (q31_t)0xc7be4381, (q31_t)0x217113e5, (q31_t)0xc7c44272,
-    (q31_t)0x216609e3, (q31_t)0xc7ca438f, (q31_t)0x215b0110, (q31_t)0xc7d046d6,
-    (q31_t)0x214ff96a, (q31_t)0xc7d64c47, (q31_t)0x2144f2f3, (q31_t)0xc7dc53e3,
-    (q31_t)0x2139edac, (q31_t)0xc7e25daa, (q31_t)0x212ee995, (q31_t)0xc7e8699a,
-    (q31_t)0x2123e6ad, (q31_t)0xc7ee77b3, (q31_t)0x2118e4f6, (q31_t)0xc7f487f6,
-    (q31_t)0x210de470, (q31_t)0xc7fa9a62, (q31_t)0x2102e51c, (q31_t)0xc800aef7,
-    (q31_t)0x20f7e6f9, (q31_t)0xc806c5b5, (q31_t)0x20ecea09, (q31_t)0xc80cde9b,
-    (q31_t)0x20e1ee4b, (q31_t)0xc812f9a9, (q31_t)0x20d6f3c1, (q31_t)0xc81916df,
-    (q31_t)0x20cbfa6a, (q31_t)0xc81f363d, (q31_t)0x20c10247, (q31_t)0xc82557c3,
-    (q31_t)0x20b60b58, (q31_t)0xc82b7b70, (q31_t)0x20ab159e, (q31_t)0xc831a143,
-    (q31_t)0x20a0211a, (q31_t)0xc837c93e, (q31_t)0x20952dcb, (q31_t)0xc83df35f,
-    (q31_t)0x208a3bb2, (q31_t)0xc8441fa6, (q31_t)0x207f4acf, (q31_t)0xc84a4e14,
-    (q31_t)0x20745b24, (q31_t)0xc8507ea7, (q31_t)0x20696cb0, (q31_t)0xc856b160,
-    (q31_t)0x205e7f74, (q31_t)0xc85ce63e, (q31_t)0x2053936f, (q31_t)0xc8631d42,
-    (q31_t)0x2048a8a4, (q31_t)0xc869566a, (q31_t)0x203dbf11, (q31_t)0xc86f91b7,
-    (q31_t)0x2032d6b8, (q31_t)0xc875cf28, (q31_t)0x2027ef99, (q31_t)0xc87c0ebd,
-    (q31_t)0x201d09b4, (q31_t)0xc8825077, (q31_t)0x2012250a, (q31_t)0xc8889454,
-    (q31_t)0x2007419b, (q31_t)0xc88eda54, (q31_t)0x1ffc5f67, (q31_t)0xc8952278,
-    (q31_t)0x1ff17e70, (q31_t)0xc89b6cbf, (q31_t)0x1fe69eb4, (q31_t)0xc8a1b928,
-    (q31_t)0x1fdbc036, (q31_t)0xc8a807b4, (q31_t)0x1fd0e2f5, (q31_t)0xc8ae5862,
-    (q31_t)0x1fc606f1, (q31_t)0xc8b4ab32, (q31_t)0x1fbb2c2c, (q31_t)0xc8bb0023,
-    (q31_t)0x1fb052a5, (q31_t)0xc8c15736, (q31_t)0x1fa57a5d, (q31_t)0xc8c7b06b,
-    (q31_t)0x1f9aa354, (q31_t)0xc8ce0bc0, (q31_t)0x1f8fcd8b, (q31_t)0xc8d46936,
-    (q31_t)0x1f84f902, (q31_t)0xc8dac8cd, (q31_t)0x1f7a25ba, (q31_t)0xc8e12a84,
-    (q31_t)0x1f6f53b3, (q31_t)0xc8e78e5b, (q31_t)0x1f6482ed, (q31_t)0xc8edf452,
-    (q31_t)0x1f59b369, (q31_t)0xc8f45c68, (q31_t)0x1f4ee527, (q31_t)0xc8fac69e,
-    (q31_t)0x1f441828, (q31_t)0xc90132f2, (q31_t)0x1f394c6b, (q31_t)0xc907a166,
-    (q31_t)0x1f2e81f3, (q31_t)0xc90e11f7, (q31_t)0x1f23b8be, (q31_t)0xc91484a8,
-    (q31_t)0x1f18f0ce, (q31_t)0xc91af976, (q31_t)0x1f0e2a22, (q31_t)0xc9217062,
-    (q31_t)0x1f0364bc, (q31_t)0xc927e96b, (q31_t)0x1ef8a09b, (q31_t)0xc92e6492,
-    (q31_t)0x1eedddc0, (q31_t)0xc934e1d6, (q31_t)0x1ee31c2b, (q31_t)0xc93b6137,
-    (q31_t)0x1ed85bdd, (q31_t)0xc941e2b4, (q31_t)0x1ecd9cd7, (q31_t)0xc948664d,
-    (q31_t)0x1ec2df18, (q31_t)0xc94eec03, (q31_t)0x1eb822a1, (q31_t)0xc95573d4,
-    (q31_t)0x1ead6773, (q31_t)0xc95bfdc1, (q31_t)0x1ea2ad8d, (q31_t)0xc96289c9,
-    (q31_t)0x1e97f4f1, (q31_t)0xc96917ec, (q31_t)0x1e8d3d9e, (q31_t)0xc96fa82a,
-    (q31_t)0x1e828796, (q31_t)0xc9763a83, (q31_t)0x1e77d2d8, (q31_t)0xc97ccef5,
-    (q31_t)0x1e6d1f65, (q31_t)0xc9836582, (q31_t)0x1e626d3e, (q31_t)0xc989fe29,
-    (q31_t)0x1e57bc62, (q31_t)0xc99098e9, (q31_t)0x1e4d0cd2, (q31_t)0xc99735c2,
-    (q31_t)0x1e425e8f, (q31_t)0xc99dd4b4, (q31_t)0x1e37b199, (q31_t)0xc9a475bf,
-    (q31_t)0x1e2d05f1, (q31_t)0xc9ab18e3, (q31_t)0x1e225b96, (q31_t)0xc9b1be1e,
-    (q31_t)0x1e17b28a, (q31_t)0xc9b86572, (q31_t)0x1e0d0acc, (q31_t)0xc9bf0edd,
-    (q31_t)0x1e02645d, (q31_t)0xc9c5ba60, (q31_t)0x1df7bf3e, (q31_t)0xc9cc67fa,
-    (q31_t)0x1ded1b6e, (q31_t)0xc9d317ab, (q31_t)0x1de278ef, (q31_t)0xc9d9c973,
-    (q31_t)0x1dd7d7c1, (q31_t)0xc9e07d51, (q31_t)0x1dcd37e4, (q31_t)0xc9e73346,
-    (q31_t)0x1dc29958, (q31_t)0xc9edeb50, (q31_t)0x1db7fc1e, (q31_t)0xc9f4a570,
-    (q31_t)0x1dad6036, (q31_t)0xc9fb61a5, (q31_t)0x1da2c5a2, (q31_t)0xca021fef,
-    (q31_t)0x1d982c60, (q31_t)0xca08e04f, (q31_t)0x1d8d9472, (q31_t)0xca0fa2c3,
-    (q31_t)0x1d82fdd8, (q31_t)0xca16674b, (q31_t)0x1d786892, (q31_t)0xca1d2de7,
-    (q31_t)0x1d6dd4a2, (q31_t)0xca23f698, (q31_t)0x1d634206, (q31_t)0xca2ac15b,
-    (q31_t)0x1d58b0c0, (q31_t)0xca318e32, (q31_t)0x1d4e20d0, (q31_t)0xca385d1d,
-    (q31_t)0x1d439236, (q31_t)0xca3f2e19, (q31_t)0x1d3904f4, (q31_t)0xca460129,
-    (q31_t)0x1d2e7908, (q31_t)0xca4cd64b, (q31_t)0x1d23ee74, (q31_t)0xca53ad7e,
-    (q31_t)0x1d196538, (q31_t)0xca5a86c4, (q31_t)0x1d0edd55, (q31_t)0xca61621b,
-    (q31_t)0x1d0456ca, (q31_t)0xca683f83, (q31_t)0x1cf9d199, (q31_t)0xca6f1efc,
-    (q31_t)0x1cef4dc2, (q31_t)0xca760086, (q31_t)0x1ce4cb44, (q31_t)0xca7ce420,
-    (q31_t)0x1cda4a21, (q31_t)0xca83c9ca, (q31_t)0x1ccfca59, (q31_t)0xca8ab184,
-    (q31_t)0x1cc54bec, (q31_t)0xca919b4e, (q31_t)0x1cbacedb, (q31_t)0xca988727,
-    (q31_t)0x1cb05326, (q31_t)0xca9f750f, (q31_t)0x1ca5d8cd, (q31_t)0xcaa66506,
-    (q31_t)0x1c9b5fd2, (q31_t)0xcaad570c, (q31_t)0x1c90e834, (q31_t)0xcab44b1f,
-    (q31_t)0x1c8671f3, (q31_t)0xcabb4141, (q31_t)0x1c7bfd11, (q31_t)0xcac23971,
-    (q31_t)0x1c71898d, (q31_t)0xcac933ae, (q31_t)0x1c671768, (q31_t)0xcad02ff8,
-    (q31_t)0x1c5ca6a2, (q31_t)0xcad72e4f, (q31_t)0x1c52373c, (q31_t)0xcade2eb3,
-    (q31_t)0x1c47c936, (q31_t)0xcae53123, (q31_t)0x1c3d5c91, (q31_t)0xcaec35a0,
-    (q31_t)0x1c32f14d, (q31_t)0xcaf33c28, (q31_t)0x1c28876a, (q31_t)0xcafa44bc,
-    (q31_t)0x1c1e1ee9, (q31_t)0xcb014f5b, (q31_t)0x1c13b7c9, (q31_t)0xcb085c05,
-    (q31_t)0x1c09520d, (q31_t)0xcb0f6aba, (q31_t)0x1bfeedb3, (q31_t)0xcb167b79,
-    (q31_t)0x1bf48abd, (q31_t)0xcb1d8e43, (q31_t)0x1bea292b, (q31_t)0xcb24a316,
-    (q31_t)0x1bdfc8fc, (q31_t)0xcb2bb9f4, (q31_t)0x1bd56a32, (q31_t)0xcb32d2da,
-    (q31_t)0x1bcb0cce, (q31_t)0xcb39edca, (q31_t)0x1bc0b0ce, (q31_t)0xcb410ac3,
-    (q31_t)0x1bb65634, (q31_t)0xcb4829c4, (q31_t)0x1babfd01, (q31_t)0xcb4f4acd,
-    (q31_t)0x1ba1a534, (q31_t)0xcb566ddf, (q31_t)0x1b974ece, (q31_t)0xcb5d92f8,
-    (q31_t)0x1b8cf9cf, (q31_t)0xcb64ba19, (q31_t)0x1b82a638, (q31_t)0xcb6be341,
-    (q31_t)0x1b785409, (q31_t)0xcb730e70, (q31_t)0x1b6e0342, (q31_t)0xcb7a3ba5,
-    (q31_t)0x1b63b3e5, (q31_t)0xcb816ae1, (q31_t)0x1b5965f1, (q31_t)0xcb889c23,
-    (q31_t)0x1b4f1967, (q31_t)0xcb8fcf6b, (q31_t)0x1b44ce46, (q31_t)0xcb9704b9,
-    (q31_t)0x1b3a8491, (q31_t)0xcb9e3c0b, (q31_t)0x1b303c46, (q31_t)0xcba57563,
-    (q31_t)0x1b25f566, (q31_t)0xcbacb0bf, (q31_t)0x1b1baff2, (q31_t)0xcbb3ee20,
-    (q31_t)0x1b116beb, (q31_t)0xcbbb2d85, (q31_t)0x1b072950, (q31_t)0xcbc26eee,
-    (q31_t)0x1afce821, (q31_t)0xcbc9b25a, (q31_t)0x1af2a860, (q31_t)0xcbd0f7ca,
-    (q31_t)0x1ae86a0d, (q31_t)0xcbd83f3d, (q31_t)0x1ade2d28, (q31_t)0xcbdf88b3,
-    (q31_t)0x1ad3f1b1, (q31_t)0xcbe6d42b, (q31_t)0x1ac9b7a9, (q31_t)0xcbee21a5,
-    (q31_t)0x1abf7f11, (q31_t)0xcbf57121, (q31_t)0x1ab547e8, (q31_t)0xcbfcc29f,
-    (q31_t)0x1aab122f, (q31_t)0xcc04161e, (q31_t)0x1aa0dde7, (q31_t)0xcc0b6b9e,
-    (q31_t)0x1a96ab0f, (q31_t)0xcc12c31f, (q31_t)0x1a8c79a9, (q31_t)0xcc1a1ca0,
-    (q31_t)0x1a8249b4, (q31_t)0xcc217822, (q31_t)0x1a781b31, (q31_t)0xcc28d5a3,
-    (q31_t)0x1a6dee21, (q31_t)0xcc303524, (q31_t)0x1a63c284, (q31_t)0xcc3796a5,
-    (q31_t)0x1a599859, (q31_t)0xcc3efa25, (q31_t)0x1a4f6fa3, (q31_t)0xcc465fa3,
-    (q31_t)0x1a454860, (q31_t)0xcc4dc720, (q31_t)0x1a3b2292, (q31_t)0xcc55309b,
-    (q31_t)0x1a30fe38, (q31_t)0xcc5c9c14, (q31_t)0x1a26db54, (q31_t)0xcc64098b,
-    (q31_t)0x1a1cb9e5, (q31_t)0xcc6b78ff, (q31_t)0x1a1299ec, (q31_t)0xcc72ea70,
-    (q31_t)0x1a087b69, (q31_t)0xcc7a5dde, (q31_t)0x19fe5e5e, (q31_t)0xcc81d349,
-    (q31_t)0x19f442c9, (q31_t)0xcc894aaf, (q31_t)0x19ea28ac, (q31_t)0xcc90c412,
-    (q31_t)0x19e01006, (q31_t)0xcc983f70, (q31_t)0x19d5f8d9, (q31_t)0xcc9fbcca,
-    (q31_t)0x19cbe325, (q31_t)0xcca73c1e, (q31_t)0x19c1cee9, (q31_t)0xccaebd6e,
-    (q31_t)0x19b7bc27, (q31_t)0xccb640b8, (q31_t)0x19adaadf, (q31_t)0xccbdc5fc,
-    (q31_t)0x19a39b11, (q31_t)0xccc54d3a, (q31_t)0x19998cbe, (q31_t)0xccccd671,
-    (q31_t)0x198f7fe6, (q31_t)0xccd461a2, (q31_t)0x19857489, (q31_t)0xccdbeecc,
-    (q31_t)0x197b6aa8, (q31_t)0xcce37def, (q31_t)0x19716243, (q31_t)0xcceb0f0a,
-    (q31_t)0x19675b5a, (q31_t)0xccf2a21d, (q31_t)0x195d55ef, (q31_t)0xccfa3729,
-    (q31_t)0x19535201, (q31_t)0xcd01ce2b, (q31_t)0x19494f90, (q31_t)0xcd096725,
-    (q31_t)0x193f4e9e, (q31_t)0xcd110216, (q31_t)0x19354f2a, (q31_t)0xcd189efe,
-    (q31_t)0x192b5135, (q31_t)0xcd203ddc, (q31_t)0x192154bf, (q31_t)0xcd27deb0,
-    (q31_t)0x191759c9, (q31_t)0xcd2f817b, (q31_t)0x190d6053, (q31_t)0xcd37263a,
-    (q31_t)0x1903685d, (q31_t)0xcd3eccef, (q31_t)0x18f971e8, (q31_t)0xcd467599,
-    (q31_t)0x18ef7cf4, (q31_t)0xcd4e2037, (q31_t)0x18e58982, (q31_t)0xcd55ccca,
-    (q31_t)0x18db9792, (q31_t)0xcd5d7b50, (q31_t)0x18d1a724, (q31_t)0xcd652bcb,
-    (q31_t)0x18c7b838, (q31_t)0xcd6cde39, (q31_t)0x18bdcad0, (q31_t)0xcd74929a,
-    (q31_t)0x18b3deeb, (q31_t)0xcd7c48ee, (q31_t)0x18a9f48a, (q31_t)0xcd840134,
-    (q31_t)0x18a00bae, (q31_t)0xcd8bbb6d, (q31_t)0x18962456, (q31_t)0xcd937798,
-    (q31_t)0x188c3e83, (q31_t)0xcd9b35b4, (q31_t)0x18825a35, (q31_t)0xcda2f5c2,
-    (q31_t)0x1878776d, (q31_t)0xcdaab7c0, (q31_t)0x186e962b, (q31_t)0xcdb27bb0,
-    (q31_t)0x1864b670, (q31_t)0xcdba4190, (q31_t)0x185ad83c, (q31_t)0xcdc20960,
-    (q31_t)0x1850fb8e, (q31_t)0xcdc9d320, (q31_t)0x18472069, (q31_t)0xcdd19ed0,
-    (q31_t)0x183d46cc, (q31_t)0xcdd96c6f, (q31_t)0x18336eb7, (q31_t)0xcde13bfd,
-    (q31_t)0x1829982b, (q31_t)0xcde90d79, (q31_t)0x181fc328, (q31_t)0xcdf0e0e4,
-    (q31_t)0x1815efae, (q31_t)0xcdf8b63d, (q31_t)0x180c1dbf, (q31_t)0xce008d84,
-    (q31_t)0x18024d59, (q31_t)0xce0866b8, (q31_t)0x17f87e7f, (q31_t)0xce1041d9,
-    (q31_t)0x17eeb130, (q31_t)0xce181ee8, (q31_t)0x17e4e56c, (q31_t)0xce1ffde2,
-    (q31_t)0x17db1b34, (q31_t)0xce27dec9, (q31_t)0x17d15288, (q31_t)0xce2fc19c,
-    (q31_t)0x17c78b68, (q31_t)0xce37a65b, (q31_t)0x17bdc5d6, (q31_t)0xce3f8d05,
-    (q31_t)0x17b401d1, (q31_t)0xce47759a, (q31_t)0x17aa3f5a, (q31_t)0xce4f6019,
-    (q31_t)0x17a07e70, (q31_t)0xce574c84, (q31_t)0x1796bf16, (q31_t)0xce5f3ad8,
-    (q31_t)0x178d014a, (q31_t)0xce672b16, (q31_t)0x1783450d, (q31_t)0xce6f1d3d,
-    (q31_t)0x17798a60, (q31_t)0xce77114e, (q31_t)0x176fd143, (q31_t)0xce7f0748,
-    (q31_t)0x176619b6, (q31_t)0xce86ff2a, (q31_t)0x175c63ba, (q31_t)0xce8ef8f4,
-    (q31_t)0x1752af4f, (q31_t)0xce96f4a7, (q31_t)0x1748fc75, (q31_t)0xce9ef241,
-    (q31_t)0x173f4b2e, (q31_t)0xcea6f1c2, (q31_t)0x17359b78, (q31_t)0xceaef32b,
-    (q31_t)0x172bed55, (q31_t)0xceb6f67a, (q31_t)0x172240c5, (q31_t)0xcebefbb0,
-    (q31_t)0x171895c9, (q31_t)0xcec702cb, (q31_t)0x170eec60, (q31_t)0xcecf0bcd,
-    (q31_t)0x1705448b, (q31_t)0xced716b4, (q31_t)0x16fb9e4b, (q31_t)0xcedf2380,
-    (q31_t)0x16f1f99f, (q31_t)0xcee73231, (q31_t)0x16e85689, (q31_t)0xceef42c7,
-    (q31_t)0x16deb508, (q31_t)0xcef75541, (q31_t)0x16d5151d, (q31_t)0xceff699f,
-    (q31_t)0x16cb76c9, (q31_t)0xcf077fe1, (q31_t)0x16c1da0b, (q31_t)0xcf0f9805,
-    (q31_t)0x16b83ee4, (q31_t)0xcf17b20d, (q31_t)0x16aea555, (q31_t)0xcf1fcdf8,
-    (q31_t)0x16a50d5d, (q31_t)0xcf27ebc5, (q31_t)0x169b76fe, (q31_t)0xcf300b74,
-    (q31_t)0x1691e237, (q31_t)0xcf382d05, (q31_t)0x16884f09, (q31_t)0xcf405077,
-    (q31_t)0x167ebd74, (q31_t)0xcf4875ca, (q31_t)0x16752d79, (q31_t)0xcf509cfe,
-    (q31_t)0x166b9f18, (q31_t)0xcf58c613, (q31_t)0x16621251, (q31_t)0xcf60f108,
-    (q31_t)0x16588725, (q31_t)0xcf691ddd, (q31_t)0x164efd94, (q31_t)0xcf714c91,
-    (q31_t)0x1645759f, (q31_t)0xcf797d24, (q31_t)0x163bef46, (q31_t)0xcf81af97,
-    (q31_t)0x16326a88, (q31_t)0xcf89e3e8, (q31_t)0x1628e767, (q31_t)0xcf921a17,
-    (q31_t)0x161f65e4, (q31_t)0xcf9a5225, (q31_t)0x1615e5fd, (q31_t)0xcfa28c10,
-    (q31_t)0x160c67b4, (q31_t)0xcfaac7d8, (q31_t)0x1602eb0a, (q31_t)0xcfb3057d,
-    (q31_t)0x15f96ffd, (q31_t)0xcfbb4500, (q31_t)0x15eff690, (q31_t)0xcfc3865e,
-    (q31_t)0x15e67ec1, (q31_t)0xcfcbc999, (q31_t)0x15dd0892, (q31_t)0xcfd40eaf,
-    (q31_t)0x15d39403, (q31_t)0xcfdc55a1, (q31_t)0x15ca2115, (q31_t)0xcfe49e6d,
-    (q31_t)0x15c0afc6, (q31_t)0xcfece915, (q31_t)0x15b74019, (q31_t)0xcff53597,
-    (q31_t)0x15add20d, (q31_t)0xcffd83f4, (q31_t)0x15a465a3, (q31_t)0xd005d42a,
-    (q31_t)0x159afadb, (q31_t)0xd00e2639, (q31_t)0x159191b5, (q31_t)0xd0167a22,
-    (q31_t)0x15882a32, (q31_t)0xd01ecfe4, (q31_t)0x157ec452, (q31_t)0xd027277e,
-    (q31_t)0x15756016, (q31_t)0xd02f80f1, (q31_t)0x156bfd7d, (q31_t)0xd037dc3b,
-    (q31_t)0x15629c89, (q31_t)0xd040395d, (q31_t)0x15593d3a, (q31_t)0xd0489856,
-    (q31_t)0x154fdf8f, (q31_t)0xd050f926, (q31_t)0x15468389, (q31_t)0xd0595bcd,
-    (q31_t)0x153d292a, (q31_t)0xd061c04a, (q31_t)0x1533d070, (q31_t)0xd06a269d,
-    (q31_t)0x152a795d, (q31_t)0xd0728ec6, (q31_t)0x152123f0, (q31_t)0xd07af8c4,
-    (q31_t)0x1517d02b, (q31_t)0xd0836497, (q31_t)0x150e7e0d, (q31_t)0xd08bd23f,
-    (q31_t)0x15052d97, (q31_t)0xd09441bb, (q31_t)0x14fbdec9, (q31_t)0xd09cb30b,
-    (q31_t)0x14f291a4, (q31_t)0xd0a5262f, (q31_t)0x14e94627, (q31_t)0xd0ad9b26,
-    (q31_t)0x14dffc54, (q31_t)0xd0b611f1, (q31_t)0x14d6b42b, (q31_t)0xd0be8a8d,
-    (q31_t)0x14cd6dab, (q31_t)0xd0c704fd, (q31_t)0x14c428d6, (q31_t)0xd0cf813e,
-    (q31_t)0x14bae5ab, (q31_t)0xd0d7ff51, (q31_t)0x14b1a42c, (q31_t)0xd0e07f36,
-    (q31_t)0x14a86458, (q31_t)0xd0e900ec, (q31_t)0x149f2630, (q31_t)0xd0f18472,
-    (q31_t)0x1495e9b3, (q31_t)0xd0fa09c9, (q31_t)0x148caee4, (q31_t)0xd10290f0,
-    (q31_t)0x148375c1, (q31_t)0xd10b19e7, (q31_t)0x147a3e4b, (q31_t)0xd113a4ad,
-    (q31_t)0x14710883, (q31_t)0xd11c3142, (q31_t)0x1467d469, (q31_t)0xd124bfa6,
-    (q31_t)0x145ea1fd, (q31_t)0xd12d4fd9, (q31_t)0x14557140, (q31_t)0xd135e1d9,
-    (q31_t)0x144c4232, (q31_t)0xd13e75a8, (q31_t)0x144314d3, (q31_t)0xd1470b44,
-    (q31_t)0x1439e923, (q31_t)0xd14fa2ad, (q31_t)0x1430bf24, (q31_t)0xd1583be2,
-    (q31_t)0x142796d5, (q31_t)0xd160d6e5, (q31_t)0x141e7037, (q31_t)0xd16973b3,
-    (q31_t)0x14154b4a, (q31_t)0xd172124d, (q31_t)0x140c280e, (q31_t)0xd17ab2b3,
-    (q31_t)0x14030684, (q31_t)0xd18354e4, (q31_t)0x13f9e6ad, (q31_t)0xd18bf8e0,
-    (q31_t)0x13f0c887, (q31_t)0xd1949ea6, (q31_t)0x13e7ac15, (q31_t)0xd19d4636,
-    (q31_t)0x13de9156, (q31_t)0xd1a5ef90, (q31_t)0x13d5784a, (q31_t)0xd1ae9ab4,
-    (q31_t)0x13cc60f2, (q31_t)0xd1b747a0, (q31_t)0x13c34b4f, (q31_t)0xd1bff656,
-    (q31_t)0x13ba3760, (q31_t)0xd1c8a6d4, (q31_t)0x13b12526, (q31_t)0xd1d1591a,
-    (q31_t)0x13a814a2, (q31_t)0xd1da0d28, (q31_t)0x139f05d3, (q31_t)0xd1e2c2fd,
-    (q31_t)0x1395f8ba, (q31_t)0xd1eb7a9a, (q31_t)0x138ced57, (q31_t)0xd1f433fd,
-    (q31_t)0x1383e3ab, (q31_t)0xd1fcef27, (q31_t)0x137adbb6, (q31_t)0xd205ac17,
-    (q31_t)0x1371d579, (q31_t)0xd20e6acc, (q31_t)0x1368d0f3, (q31_t)0xd2172b48,
-    (q31_t)0x135fce26, (q31_t)0xd21fed88, (q31_t)0x1356cd11, (q31_t)0xd228b18d,
-    (q31_t)0x134dcdb4, (q31_t)0xd2317756, (q31_t)0x1344d011, (q31_t)0xd23a3ee4,
-    (q31_t)0x133bd427, (q31_t)0xd2430835, (q31_t)0x1332d9f7, (q31_t)0xd24bd34a,
-    (q31_t)0x1329e181, (q31_t)0xd254a021, (q31_t)0x1320eac6, (q31_t)0xd25d6ebc,
-    (q31_t)0x1317f5c6, (q31_t)0xd2663f19, (q31_t)0x130f0280, (q31_t)0xd26f1138,
-    (q31_t)0x130610f7, (q31_t)0xd277e518, (q31_t)0x12fd2129, (q31_t)0xd280babb,
-    (q31_t)0x12f43318, (q31_t)0xd289921e, (q31_t)0x12eb46c3, (q31_t)0xd2926b41,
-    (q31_t)0x12e25c2b, (q31_t)0xd29b4626, (q31_t)0x12d97350, (q31_t)0xd2a422ca,
-    (q31_t)0x12d08c33, (q31_t)0xd2ad012e, (q31_t)0x12c7a6d4, (q31_t)0xd2b5e151,
-    (q31_t)0x12bec333, (q31_t)0xd2bec333, (q31_t)0x12b5e151, (q31_t)0xd2c7a6d4,
-    (q31_t)0x12ad012e, (q31_t)0xd2d08c33, (q31_t)0x12a422ca, (q31_t)0xd2d97350,
-    (q31_t)0x129b4626, (q31_t)0xd2e25c2b, (q31_t)0x12926b41, (q31_t)0xd2eb46c3,
-    (q31_t)0x1289921e, (q31_t)0xd2f43318, (q31_t)0x1280babb, (q31_t)0xd2fd2129,
-    (q31_t)0x1277e518, (q31_t)0xd30610f7, (q31_t)0x126f1138, (q31_t)0xd30f0280,
-    (q31_t)0x12663f19, (q31_t)0xd317f5c6, (q31_t)0x125d6ebc, (q31_t)0xd320eac6,
-    (q31_t)0x1254a021, (q31_t)0xd329e181, (q31_t)0x124bd34a, (q31_t)0xd332d9f7,
-    (q31_t)0x12430835, (q31_t)0xd33bd427, (q31_t)0x123a3ee4, (q31_t)0xd344d011,
-    (q31_t)0x12317756, (q31_t)0xd34dcdb4, (q31_t)0x1228b18d, (q31_t)0xd356cd11,
-    (q31_t)0x121fed88, (q31_t)0xd35fce26, (q31_t)0x12172b48, (q31_t)0xd368d0f3,
-    (q31_t)0x120e6acc, (q31_t)0xd371d579, (q31_t)0x1205ac17, (q31_t)0xd37adbb6,
-    (q31_t)0x11fcef27, (q31_t)0xd383e3ab, (q31_t)0x11f433fd, (q31_t)0xd38ced57,
-    (q31_t)0x11eb7a9a, (q31_t)0xd395f8ba, (q31_t)0x11e2c2fd, (q31_t)0xd39f05d3,
-    (q31_t)0x11da0d28, (q31_t)0xd3a814a2, (q31_t)0x11d1591a, (q31_t)0xd3b12526,
-    (q31_t)0x11c8a6d4, (q31_t)0xd3ba3760, (q31_t)0x11bff656, (q31_t)0xd3c34b4f,
-    (q31_t)0x11b747a0, (q31_t)0xd3cc60f2, (q31_t)0x11ae9ab4, (q31_t)0xd3d5784a,
-    (q31_t)0x11a5ef90, (q31_t)0xd3de9156, (q31_t)0x119d4636, (q31_t)0xd3e7ac15,
-    (q31_t)0x11949ea6, (q31_t)0xd3f0c887, (q31_t)0x118bf8e0, (q31_t)0xd3f9e6ad,
-    (q31_t)0x118354e4, (q31_t)0xd4030684, (q31_t)0x117ab2b3, (q31_t)0xd40c280e,
-    (q31_t)0x1172124d, (q31_t)0xd4154b4a, (q31_t)0x116973b3, (q31_t)0xd41e7037,
-    (q31_t)0x1160d6e5, (q31_t)0xd42796d5, (q31_t)0x11583be2, (q31_t)0xd430bf24,
-    (q31_t)0x114fa2ad, (q31_t)0xd439e923, (q31_t)0x11470b44, (q31_t)0xd44314d3,
-    (q31_t)0x113e75a8, (q31_t)0xd44c4232, (q31_t)0x1135e1d9, (q31_t)0xd4557140,
-    (q31_t)0x112d4fd9, (q31_t)0xd45ea1fd, (q31_t)0x1124bfa6, (q31_t)0xd467d469,
-    (q31_t)0x111c3142, (q31_t)0xd4710883, (q31_t)0x1113a4ad, (q31_t)0xd47a3e4b,
-    (q31_t)0x110b19e7, (q31_t)0xd48375c1, (q31_t)0x110290f0, (q31_t)0xd48caee4,
-    (q31_t)0x10fa09c9, (q31_t)0xd495e9b3, (q31_t)0x10f18472, (q31_t)0xd49f2630,
-    (q31_t)0x10e900ec, (q31_t)0xd4a86458, (q31_t)0x10e07f36, (q31_t)0xd4b1a42c,
-    (q31_t)0x10d7ff51, (q31_t)0xd4bae5ab, (q31_t)0x10cf813e, (q31_t)0xd4c428d6,
-    (q31_t)0x10c704fd, (q31_t)0xd4cd6dab, (q31_t)0x10be8a8d, (q31_t)0xd4d6b42b,
-    (q31_t)0x10b611f1, (q31_t)0xd4dffc54, (q31_t)0x10ad9b26, (q31_t)0xd4e94627,
-    (q31_t)0x10a5262f, (q31_t)0xd4f291a4, (q31_t)0x109cb30b, (q31_t)0xd4fbdec9,
-    (q31_t)0x109441bb, (q31_t)0xd5052d97, (q31_t)0x108bd23f, (q31_t)0xd50e7e0d,
-    (q31_t)0x10836497, (q31_t)0xd517d02b, (q31_t)0x107af8c4, (q31_t)0xd52123f0,
-    (q31_t)0x10728ec6, (q31_t)0xd52a795d, (q31_t)0x106a269d, (q31_t)0xd533d070,
-    (q31_t)0x1061c04a, (q31_t)0xd53d292a, (q31_t)0x10595bcd, (q31_t)0xd5468389,
-    (q31_t)0x1050f926, (q31_t)0xd54fdf8f, (q31_t)0x10489856, (q31_t)0xd5593d3a,
-    (q31_t)0x1040395d, (q31_t)0xd5629c89, (q31_t)0x1037dc3b, (q31_t)0xd56bfd7d,
-    (q31_t)0x102f80f1, (q31_t)0xd5756016, (q31_t)0x1027277e, (q31_t)0xd57ec452,
-    (q31_t)0x101ecfe4, (q31_t)0xd5882a32, (q31_t)0x10167a22, (q31_t)0xd59191b5,
-    (q31_t)0x100e2639, (q31_t)0xd59afadb, (q31_t)0x1005d42a, (q31_t)0xd5a465a3,
-    (q31_t)0xffd83f4, (q31_t)0xd5add20d, (q31_t)0xff53597, (q31_t)0xd5b74019,
-    (q31_t)0xfece915, (q31_t)0xd5c0afc6, (q31_t)0xfe49e6d, (q31_t)0xd5ca2115,
-    (q31_t)0xfdc55a1, (q31_t)0xd5d39403, (q31_t)0xfd40eaf, (q31_t)0xd5dd0892,
-    (q31_t)0xfcbc999, (q31_t)0xd5e67ec1, (q31_t)0xfc3865e, (q31_t)0xd5eff690,
-    (q31_t)0xfbb4500, (q31_t)0xd5f96ffd, (q31_t)0xfb3057d, (q31_t)0xd602eb0a,
-    (q31_t)0xfaac7d8, (q31_t)0xd60c67b4, (q31_t)0xfa28c10, (q31_t)0xd615e5fd,
-    (q31_t)0xf9a5225, (q31_t)0xd61f65e4, (q31_t)0xf921a17, (q31_t)0xd628e767,
-    (q31_t)0xf89e3e8, (q31_t)0xd6326a88, (q31_t)0xf81af97, (q31_t)0xd63bef46,
-    (q31_t)0xf797d24, (q31_t)0xd645759f, (q31_t)0xf714c91, (q31_t)0xd64efd94,
-    (q31_t)0xf691ddd, (q31_t)0xd6588725, (q31_t)0xf60f108, (q31_t)0xd6621251,
-    (q31_t)0xf58c613, (q31_t)0xd66b9f18, (q31_t)0xf509cfe, (q31_t)0xd6752d79,
-    (q31_t)0xf4875ca, (q31_t)0xd67ebd74, (q31_t)0xf405077, (q31_t)0xd6884f09,
-    (q31_t)0xf382d05, (q31_t)0xd691e237, (q31_t)0xf300b74, (q31_t)0xd69b76fe,
-    (q31_t)0xf27ebc5, (q31_t)0xd6a50d5d, (q31_t)0xf1fcdf8, (q31_t)0xd6aea555,
-    (q31_t)0xf17b20d, (q31_t)0xd6b83ee4, (q31_t)0xf0f9805, (q31_t)0xd6c1da0b,
-    (q31_t)0xf077fe1, (q31_t)0xd6cb76c9, (q31_t)0xeff699f, (q31_t)0xd6d5151d,
-    (q31_t)0xef75541, (q31_t)0xd6deb508, (q31_t)0xeef42c7, (q31_t)0xd6e85689,
-    (q31_t)0xee73231, (q31_t)0xd6f1f99f, (q31_t)0xedf2380, (q31_t)0xd6fb9e4b,
-    (q31_t)0xed716b4, (q31_t)0xd705448b, (q31_t)0xecf0bcd, (q31_t)0xd70eec60,
-    (q31_t)0xec702cb, (q31_t)0xd71895c9, (q31_t)0xebefbb0, (q31_t)0xd72240c5,
-    (q31_t)0xeb6f67a, (q31_t)0xd72bed55, (q31_t)0xeaef32b, (q31_t)0xd7359b78,
-    (q31_t)0xea6f1c2, (q31_t)0xd73f4b2e, (q31_t)0xe9ef241, (q31_t)0xd748fc75,
-    (q31_t)0xe96f4a7, (q31_t)0xd752af4f, (q31_t)0xe8ef8f4, (q31_t)0xd75c63ba,
-    (q31_t)0xe86ff2a, (q31_t)0xd76619b6, (q31_t)0xe7f0748, (q31_t)0xd76fd143,
-    (q31_t)0xe77114e, (q31_t)0xd7798a60, (q31_t)0xe6f1d3d, (q31_t)0xd783450d,
-    (q31_t)0xe672b16, (q31_t)0xd78d014a, (q31_t)0xe5f3ad8, (q31_t)0xd796bf16,
-    (q31_t)0xe574c84, (q31_t)0xd7a07e70, (q31_t)0xe4f6019, (q31_t)0xd7aa3f5a,
-    (q31_t)0xe47759a, (q31_t)0xd7b401d1, (q31_t)0xe3f8d05, (q31_t)0xd7bdc5d6,
-    (q31_t)0xe37a65b, (q31_t)0xd7c78b68, (q31_t)0xe2fc19c, (q31_t)0xd7d15288,
-    (q31_t)0xe27dec9, (q31_t)0xd7db1b34, (q31_t)0xe1ffde2, (q31_t)0xd7e4e56c,
-    (q31_t)0xe181ee8, (q31_t)0xd7eeb130, (q31_t)0xe1041d9, (q31_t)0xd7f87e7f,
-    (q31_t)0xe0866b8, (q31_t)0xd8024d59, (q31_t)0xe008d84, (q31_t)0xd80c1dbf,
-    (q31_t)0xdf8b63d, (q31_t)0xd815efae, (q31_t)0xdf0e0e4, (q31_t)0xd81fc328,
-    (q31_t)0xde90d79, (q31_t)0xd829982b, (q31_t)0xde13bfd, (q31_t)0xd8336eb7,
-    (q31_t)0xdd96c6f, (q31_t)0xd83d46cc, (q31_t)0xdd19ed0, (q31_t)0xd8472069,
-    (q31_t)0xdc9d320, (q31_t)0xd850fb8e, (q31_t)0xdc20960, (q31_t)0xd85ad83c,
-    (q31_t)0xdba4190, (q31_t)0xd864b670, (q31_t)0xdb27bb0, (q31_t)0xd86e962b,
-    (q31_t)0xdaab7c0, (q31_t)0xd878776d, (q31_t)0xda2f5c2, (q31_t)0xd8825a35,
-    (q31_t)0xd9b35b4, (q31_t)0xd88c3e83, (q31_t)0xd937798, (q31_t)0xd8962456,
-    (q31_t)0xd8bbb6d, (q31_t)0xd8a00bae, (q31_t)0xd840134, (q31_t)0xd8a9f48a,
-    (q31_t)0xd7c48ee, (q31_t)0xd8b3deeb, (q31_t)0xd74929a, (q31_t)0xd8bdcad0,
-    (q31_t)0xd6cde39, (q31_t)0xd8c7b838, (q31_t)0xd652bcb, (q31_t)0xd8d1a724,
-    (q31_t)0xd5d7b50, (q31_t)0xd8db9792, (q31_t)0xd55ccca, (q31_t)0xd8e58982,
-    (q31_t)0xd4e2037, (q31_t)0xd8ef7cf4, (q31_t)0xd467599, (q31_t)0xd8f971e8,
-    (q31_t)0xd3eccef, (q31_t)0xd903685d, (q31_t)0xd37263a, (q31_t)0xd90d6053,
-    (q31_t)0xd2f817b, (q31_t)0xd91759c9, (q31_t)0xd27deb0, (q31_t)0xd92154bf,
-    (q31_t)0xd203ddc, (q31_t)0xd92b5135, (q31_t)0xd189efe, (q31_t)0xd9354f2a,
-    (q31_t)0xd110216, (q31_t)0xd93f4e9e, (q31_t)0xd096725, (q31_t)0xd9494f90,
-    (q31_t)0xd01ce2b, (q31_t)0xd9535201, (q31_t)0xcfa3729, (q31_t)0xd95d55ef,
-    (q31_t)0xcf2a21d, (q31_t)0xd9675b5a, (q31_t)0xceb0f0a, (q31_t)0xd9716243,
-    (q31_t)0xce37def, (q31_t)0xd97b6aa8, (q31_t)0xcdbeecc, (q31_t)0xd9857489,
-    (q31_t)0xcd461a2, (q31_t)0xd98f7fe6, (q31_t)0xcccd671, (q31_t)0xd9998cbe,
-    (q31_t)0xcc54d3a, (q31_t)0xd9a39b11, (q31_t)0xcbdc5fc, (q31_t)0xd9adaadf,
-    (q31_t)0xcb640b8, (q31_t)0xd9b7bc27, (q31_t)0xcaebd6e, (q31_t)0xd9c1cee9,
-    (q31_t)0xca73c1e, (q31_t)0xd9cbe325, (q31_t)0xc9fbcca, (q31_t)0xd9d5f8d9,
-    (q31_t)0xc983f70, (q31_t)0xd9e01006, (q31_t)0xc90c412, (q31_t)0xd9ea28ac,
-    (q31_t)0xc894aaf, (q31_t)0xd9f442c9, (q31_t)0xc81d349, (q31_t)0xd9fe5e5e,
-    (q31_t)0xc7a5dde, (q31_t)0xda087b69, (q31_t)0xc72ea70, (q31_t)0xda1299ec,
-    (q31_t)0xc6b78ff, (q31_t)0xda1cb9e5, (q31_t)0xc64098b, (q31_t)0xda26db54,
-    (q31_t)0xc5c9c14, (q31_t)0xda30fe38, (q31_t)0xc55309b, (q31_t)0xda3b2292,
-    (q31_t)0xc4dc720, (q31_t)0xda454860, (q31_t)0xc465fa3, (q31_t)0xda4f6fa3,
-    (q31_t)0xc3efa25, (q31_t)0xda599859, (q31_t)0xc3796a5, (q31_t)0xda63c284,
-    (q31_t)0xc303524, (q31_t)0xda6dee21, (q31_t)0xc28d5a3, (q31_t)0xda781b31,
-    (q31_t)0xc217822, (q31_t)0xda8249b4, (q31_t)0xc1a1ca0, (q31_t)0xda8c79a9,
-    (q31_t)0xc12c31f, (q31_t)0xda96ab0f, (q31_t)0xc0b6b9e, (q31_t)0xdaa0dde7,
-    (q31_t)0xc04161e, (q31_t)0xdaab122f, (q31_t)0xbfcc29f, (q31_t)0xdab547e8,
-    (q31_t)0xbf57121, (q31_t)0xdabf7f11, (q31_t)0xbee21a5, (q31_t)0xdac9b7a9,
-    (q31_t)0xbe6d42b, (q31_t)0xdad3f1b1, (q31_t)0xbdf88b3, (q31_t)0xdade2d28,
-    (q31_t)0xbd83f3d, (q31_t)0xdae86a0d, (q31_t)0xbd0f7ca, (q31_t)0xdaf2a860,
-    (q31_t)0xbc9b25a, (q31_t)0xdafce821, (q31_t)0xbc26eee, (q31_t)0xdb072950,
-    (q31_t)0xbbb2d85, (q31_t)0xdb116beb, (q31_t)0xbb3ee20, (q31_t)0xdb1baff2,
-    (q31_t)0xbacb0bf, (q31_t)0xdb25f566, (q31_t)0xba57563, (q31_t)0xdb303c46,
-    (q31_t)0xb9e3c0b, (q31_t)0xdb3a8491, (q31_t)0xb9704b9, (q31_t)0xdb44ce46,
-    (q31_t)0xb8fcf6b, (q31_t)0xdb4f1967, (q31_t)0xb889c23, (q31_t)0xdb5965f1,
-    (q31_t)0xb816ae1, (q31_t)0xdb63b3e5, (q31_t)0xb7a3ba5, (q31_t)0xdb6e0342,
-    (q31_t)0xb730e70, (q31_t)0xdb785409, (q31_t)0xb6be341, (q31_t)0xdb82a638,
-    (q31_t)0xb64ba19, (q31_t)0xdb8cf9cf, (q31_t)0xb5d92f8, (q31_t)0xdb974ece,
-    (q31_t)0xb566ddf, (q31_t)0xdba1a534, (q31_t)0xb4f4acd, (q31_t)0xdbabfd01,
-    (q31_t)0xb4829c4, (q31_t)0xdbb65634, (q31_t)0xb410ac3, (q31_t)0xdbc0b0ce,
-    (q31_t)0xb39edca, (q31_t)0xdbcb0cce, (q31_t)0xb32d2da, (q31_t)0xdbd56a32,
-    (q31_t)0xb2bb9f4, (q31_t)0xdbdfc8fc, (q31_t)0xb24a316, (q31_t)0xdbea292b,
-    (q31_t)0xb1d8e43, (q31_t)0xdbf48abd, (q31_t)0xb167b79, (q31_t)0xdbfeedb3,
-    (q31_t)0xb0f6aba, (q31_t)0xdc09520d, (q31_t)0xb085c05, (q31_t)0xdc13b7c9,
-    (q31_t)0xb014f5b, (q31_t)0xdc1e1ee9, (q31_t)0xafa44bc, (q31_t)0xdc28876a,
-    (q31_t)0xaf33c28, (q31_t)0xdc32f14d, (q31_t)0xaec35a0, (q31_t)0xdc3d5c91,
-    (q31_t)0xae53123, (q31_t)0xdc47c936, (q31_t)0xade2eb3, (q31_t)0xdc52373c,
-    (q31_t)0xad72e4f, (q31_t)0xdc5ca6a2, (q31_t)0xad02ff8, (q31_t)0xdc671768,
-    (q31_t)0xac933ae, (q31_t)0xdc71898d, (q31_t)0xac23971, (q31_t)0xdc7bfd11,
-    (q31_t)0xabb4141, (q31_t)0xdc8671f3, (q31_t)0xab44b1f, (q31_t)0xdc90e834,
-    (q31_t)0xaad570c, (q31_t)0xdc9b5fd2, (q31_t)0xaa66506, (q31_t)0xdca5d8cd,
-    (q31_t)0xa9f750f, (q31_t)0xdcb05326, (q31_t)0xa988727, (q31_t)0xdcbacedb,
-    (q31_t)0xa919b4e, (q31_t)0xdcc54bec, (q31_t)0xa8ab184, (q31_t)0xdccfca59,
-    (q31_t)0xa83c9ca, (q31_t)0xdcda4a21, (q31_t)0xa7ce420, (q31_t)0xdce4cb44,
-    (q31_t)0xa760086, (q31_t)0xdcef4dc2, (q31_t)0xa6f1efc, (q31_t)0xdcf9d199,
-    (q31_t)0xa683f83, (q31_t)0xdd0456ca, (q31_t)0xa61621b, (q31_t)0xdd0edd55,
-    (q31_t)0xa5a86c4, (q31_t)0xdd196538, (q31_t)0xa53ad7e, (q31_t)0xdd23ee74,
-    (q31_t)0xa4cd64b, (q31_t)0xdd2e7908, (q31_t)0xa460129, (q31_t)0xdd3904f4,
-    (q31_t)0xa3f2e19, (q31_t)0xdd439236, (q31_t)0xa385d1d, (q31_t)0xdd4e20d0,
-    (q31_t)0xa318e32, (q31_t)0xdd58b0c0, (q31_t)0xa2ac15b, (q31_t)0xdd634206,
-    (q31_t)0xa23f698, (q31_t)0xdd6dd4a2, (q31_t)0xa1d2de7, (q31_t)0xdd786892,
-    (q31_t)0xa16674b, (q31_t)0xdd82fdd8, (q31_t)0xa0fa2c3, (q31_t)0xdd8d9472,
-    (q31_t)0xa08e04f, (q31_t)0xdd982c60, (q31_t)0xa021fef, (q31_t)0xdda2c5a2,
-    (q31_t)0x9fb61a5, (q31_t)0xddad6036, (q31_t)0x9f4a570, (q31_t)0xddb7fc1e,
-    (q31_t)0x9edeb50, (q31_t)0xddc29958, (q31_t)0x9e73346, (q31_t)0xddcd37e4,
-    (q31_t)0x9e07d51, (q31_t)0xddd7d7c1, (q31_t)0x9d9c973, (q31_t)0xdde278ef,
-    (q31_t)0x9d317ab, (q31_t)0xdded1b6e, (q31_t)0x9cc67fa, (q31_t)0xddf7bf3e,
-    (q31_t)0x9c5ba60, (q31_t)0xde02645d, (q31_t)0x9bf0edd, (q31_t)0xde0d0acc,
-    (q31_t)0x9b86572, (q31_t)0xde17b28a, (q31_t)0x9b1be1e, (q31_t)0xde225b96,
-    (q31_t)0x9ab18e3, (q31_t)0xde2d05f1, (q31_t)0x9a475bf, (q31_t)0xde37b199,
-    (q31_t)0x99dd4b4, (q31_t)0xde425e8f, (q31_t)0x99735c2, (q31_t)0xde4d0cd2,
-    (q31_t)0x99098e9, (q31_t)0xde57bc62, (q31_t)0x989fe29, (q31_t)0xde626d3e,
-    (q31_t)0x9836582, (q31_t)0xde6d1f65, (q31_t)0x97ccef5, (q31_t)0xde77d2d8,
-    (q31_t)0x9763a83, (q31_t)0xde828796, (q31_t)0x96fa82a, (q31_t)0xde8d3d9e,
-    (q31_t)0x96917ec, (q31_t)0xde97f4f1, (q31_t)0x96289c9, (q31_t)0xdea2ad8d,
-    (q31_t)0x95bfdc1, (q31_t)0xdead6773, (q31_t)0x95573d4, (q31_t)0xdeb822a1,
-    (q31_t)0x94eec03, (q31_t)0xdec2df18, (q31_t)0x948664d, (q31_t)0xdecd9cd7,
-    (q31_t)0x941e2b4, (q31_t)0xded85bdd, (q31_t)0x93b6137, (q31_t)0xdee31c2b,
-    (q31_t)0x934e1d6, (q31_t)0xdeedddc0, (q31_t)0x92e6492, (q31_t)0xdef8a09b,
-    (q31_t)0x927e96b, (q31_t)0xdf0364bc, (q31_t)0x9217062, (q31_t)0xdf0e2a22,
-    (q31_t)0x91af976, (q31_t)0xdf18f0ce, (q31_t)0x91484a8, (q31_t)0xdf23b8be,
-    (q31_t)0x90e11f7, (q31_t)0xdf2e81f3, (q31_t)0x907a166, (q31_t)0xdf394c6b,
-    (q31_t)0x90132f2, (q31_t)0xdf441828, (q31_t)0x8fac69e, (q31_t)0xdf4ee527,
-    (q31_t)0x8f45c68, (q31_t)0xdf59b369, (q31_t)0x8edf452, (q31_t)0xdf6482ed,
-    (q31_t)0x8e78e5b, (q31_t)0xdf6f53b3, (q31_t)0x8e12a84, (q31_t)0xdf7a25ba,
-    (q31_t)0x8dac8cd, (q31_t)0xdf84f902, (q31_t)0x8d46936, (q31_t)0xdf8fcd8b,
-    (q31_t)0x8ce0bc0, (q31_t)0xdf9aa354, (q31_t)0x8c7b06b, (q31_t)0xdfa57a5d,
-    (q31_t)0x8c15736, (q31_t)0xdfb052a5, (q31_t)0x8bb0023, (q31_t)0xdfbb2c2c,
-    (q31_t)0x8b4ab32, (q31_t)0xdfc606f1, (q31_t)0x8ae5862, (q31_t)0xdfd0e2f5,
-    (q31_t)0x8a807b4, (q31_t)0xdfdbc036, (q31_t)0x8a1b928, (q31_t)0xdfe69eb4,
-    (q31_t)0x89b6cbf, (q31_t)0xdff17e70, (q31_t)0x8952278, (q31_t)0xdffc5f67,
-    (q31_t)0x88eda54, (q31_t)0xe007419b, (q31_t)0x8889454, (q31_t)0xe012250a,
-    (q31_t)0x8825077, (q31_t)0xe01d09b4, (q31_t)0x87c0ebd, (q31_t)0xe027ef99,
-    (q31_t)0x875cf28, (q31_t)0xe032d6b8, (q31_t)0x86f91b7, (q31_t)0xe03dbf11,
-    (q31_t)0x869566a, (q31_t)0xe048a8a4, (q31_t)0x8631d42, (q31_t)0xe053936f,
-    (q31_t)0x85ce63e, (q31_t)0xe05e7f74, (q31_t)0x856b160, (q31_t)0xe0696cb0,
-    (q31_t)0x8507ea7, (q31_t)0xe0745b24, (q31_t)0x84a4e14, (q31_t)0xe07f4acf,
-    (q31_t)0x8441fa6, (q31_t)0xe08a3bb2, (q31_t)0x83df35f, (q31_t)0xe0952dcb,
-    (q31_t)0x837c93e, (q31_t)0xe0a0211a, (q31_t)0x831a143, (q31_t)0xe0ab159e,
-    (q31_t)0x82b7b70, (q31_t)0xe0b60b58, (q31_t)0x82557c3, (q31_t)0xe0c10247,
-    (q31_t)0x81f363d, (q31_t)0xe0cbfa6a, (q31_t)0x81916df, (q31_t)0xe0d6f3c1,
-    (q31_t)0x812f9a9, (q31_t)0xe0e1ee4b, (q31_t)0x80cde9b, (q31_t)0xe0ecea09,
-    (q31_t)0x806c5b5, (q31_t)0xe0f7e6f9, (q31_t)0x800aef7, (q31_t)0xe102e51c,
-    (q31_t)0x7fa9a62, (q31_t)0xe10de470, (q31_t)0x7f487f6, (q31_t)0xe118e4f6,
-    (q31_t)0x7ee77b3, (q31_t)0xe123e6ad, (q31_t)0x7e8699a, (q31_t)0xe12ee995,
-    (q31_t)0x7e25daa, (q31_t)0xe139edac, (q31_t)0x7dc53e3, (q31_t)0xe144f2f3,
-    (q31_t)0x7d64c47, (q31_t)0xe14ff96a, (q31_t)0x7d046d6, (q31_t)0xe15b0110,
-    (q31_t)0x7ca438f, (q31_t)0xe16609e3, (q31_t)0x7c44272, (q31_t)0xe17113e5,
-    (q31_t)0x7be4381, (q31_t)0xe17c1f15, (q31_t)0x7b846ba, (q31_t)0xe1872b72,
-    (q31_t)0x7b24c20, (q31_t)0xe19238fb, (q31_t)0x7ac53b1, (q31_t)0xe19d47b1,
-    (q31_t)0x7a65d6e, (q31_t)0xe1a85793, (q31_t)0x7a06957, (q31_t)0xe1b368a0,
-    (q31_t)0x79a776c, (q31_t)0xe1be7ad8, (q31_t)0x79487ae, (q31_t)0xe1c98e3b,
-    (q31_t)0x78e9a1d, (q31_t)0xe1d4a2c8, (q31_t)0x788aeb9, (q31_t)0xe1dfb87f,
-    (q31_t)0x782c582, (q31_t)0xe1eacf5f, (q31_t)0x77cde79, (q31_t)0xe1f5e768,
-    (q31_t)0x776f99d, (q31_t)0xe2010099, (q31_t)0x77116f0, (q31_t)0xe20c1af3,
-    (q31_t)0x76b3671, (q31_t)0xe2173674, (q31_t)0x7655820, (q31_t)0xe222531c,
-    (q31_t)0x75f7bfe, (q31_t)0xe22d70eb, (q31_t)0x759a20a, (q31_t)0xe2388fe1,
-    (q31_t)0x753ca46, (q31_t)0xe243affc, (q31_t)0x74df4b1, (q31_t)0xe24ed13d,
-    (q31_t)0x748214c, (q31_t)0xe259f3a3, (q31_t)0x7425016, (q31_t)0xe265172e,
-    (q31_t)0x73c8111, (q31_t)0xe2703bdc, (q31_t)0x736b43c, (q31_t)0xe27b61af,
-    (q31_t)0x730e997, (q31_t)0xe28688a4, (q31_t)0x72b2123, (q31_t)0xe291b0bd,
-    (q31_t)0x7255ae0, (q31_t)0xe29cd9f8, (q31_t)0x71f96ce, (q31_t)0xe2a80456,
-    (q31_t)0x719d4ed, (q31_t)0xe2b32fd4, (q31_t)0x714153e, (q31_t)0xe2be5c74,
-    (q31_t)0x70e57c0, (q31_t)0xe2c98a35, (q31_t)0x7089c75, (q31_t)0xe2d4b916,
-    (q31_t)0x702e35c, (q31_t)0xe2dfe917, (q31_t)0x6fd2c75, (q31_t)0xe2eb1a37,
-    (q31_t)0x6f777c1, (q31_t)0xe2f64c77, (q31_t)0x6f1c540, (q31_t)0xe3017fd5,
-    (q31_t)0x6ec14f2, (q31_t)0xe30cb451, (q31_t)0x6e666d7, (q31_t)0xe317e9eb,
-    (q31_t)0x6e0baf0, (q31_t)0xe32320a2, (q31_t)0x6db113d, (q31_t)0xe32e5876,
-    (q31_t)0x6d569be, (q31_t)0xe3399167, (q31_t)0x6cfc472, (q31_t)0xe344cb73,
-    (q31_t)0x6ca215c, (q31_t)0xe350069b, (q31_t)0x6c4807a, (q31_t)0xe35b42df,
-    (q31_t)0x6bee1cd, (q31_t)0xe366803c, (q31_t)0x6b94554, (q31_t)0xe371beb5,
-    (q31_t)0x6b3ab12, (q31_t)0xe37cfe47, (q31_t)0x6ae1304, (q31_t)0xe3883ef2,
-    (q31_t)0x6a87d2d, (q31_t)0xe39380b6, (q31_t)0x6a2e98b, (q31_t)0xe39ec393,
-    (q31_t)0x69d5820, (q31_t)0xe3aa0788, (q31_t)0x697c8eb, (q31_t)0xe3b54c95,
-    (q31_t)0x6923bec, (q31_t)0xe3c092b9, (q31_t)0x68cb124, (q31_t)0xe3cbd9f4,
-    (q31_t)0x6872894, (q31_t)0xe3d72245, (q31_t)0x681a23a, (q31_t)0xe3e26bac,
-    (q31_t)0x67c1e18, (q31_t)0xe3edb628, (q31_t)0x6769c2e, (q31_t)0xe3f901ba,
-    (q31_t)0x6711c7b, (q31_t)0xe4044e60, (q31_t)0x66b9f01, (q31_t)0xe40f9c1a,
-    (q31_t)0x66623be, (q31_t)0xe41aeae8, (q31_t)0x660aab5, (q31_t)0xe4263ac9,
-    (q31_t)0x65b33e4, (q31_t)0xe4318bbe, (q31_t)0x655bf4c, (q31_t)0xe43cddc4,
-    (q31_t)0x6504ced, (q31_t)0xe44830dd, (q31_t)0x64adcc7, (q31_t)0xe4538507,
-    (q31_t)0x6456edb, (q31_t)0xe45eda43, (q31_t)0x6400329, (q31_t)0xe46a308f,
-    (q31_t)0x63a99b1, (q31_t)0xe47587eb, (q31_t)0x6353273, (q31_t)0xe480e057,
-    (q31_t)0x62fcd6f, (q31_t)0xe48c39d3, (q31_t)0x62a6aa6, (q31_t)0xe497945d,
-    (q31_t)0x6250a18, (q31_t)0xe4a2eff6, (q31_t)0x61fabc4, (q31_t)0xe4ae4c9d,
-    (q31_t)0x61a4fac, (q31_t)0xe4b9aa52, (q31_t)0x614f5cf, (q31_t)0xe4c50914,
-    (q31_t)0x60f9e2e, (q31_t)0xe4d068e2, (q31_t)0x60a48c9, (q31_t)0xe4dbc9bd,
-    (q31_t)0x604f5a0, (q31_t)0xe4e72ba4, (q31_t)0x5ffa4b3, (q31_t)0xe4f28e96,
-    (q31_t)0x5fa5603, (q31_t)0xe4fdf294, (q31_t)0x5f5098f, (q31_t)0xe509579b,
-    (q31_t)0x5efbf58, (q31_t)0xe514bdad, (q31_t)0x5ea775e, (q31_t)0xe52024c9,
-    (q31_t)0x5e531a1, (q31_t)0xe52b8cee, (q31_t)0x5dfee22, (q31_t)0xe536f61b,
-    (q31_t)0x5daace1, (q31_t)0xe5426051, (q31_t)0x5d56ddd, (q31_t)0xe54dcb8f,
-    (q31_t)0x5d03118, (q31_t)0xe55937d5, (q31_t)0x5caf690, (q31_t)0xe564a521,
-    (q31_t)0x5c5be47, (q31_t)0xe5701374, (q31_t)0x5c0883d, (q31_t)0xe57b82cd,
-    (q31_t)0x5bb5472, (q31_t)0xe586f32c, (q31_t)0x5b622e6, (q31_t)0xe5926490,
-    (q31_t)0x5b0f399, (q31_t)0xe59dd6f9, (q31_t)0x5abc68c, (q31_t)0xe5a94a67,
-    (q31_t)0x5a69bbe, (q31_t)0xe5b4bed8, (q31_t)0x5a17330, (q31_t)0xe5c0344d,
-    (q31_t)0x59c4ce3, (q31_t)0xe5cbaac5, (q31_t)0x59728d5, (q31_t)0xe5d72240,
-    (q31_t)0x5920708, (q31_t)0xe5e29abc, (q31_t)0x58ce77c, (q31_t)0xe5ee143b,
-    (q31_t)0x587ca31, (q31_t)0xe5f98ebb, (q31_t)0x582af26, (q31_t)0xe6050a3b,
-    (q31_t)0x57d965d, (q31_t)0xe61086bc, (q31_t)0x5787fd6, (q31_t)0xe61c043d,
-    (q31_t)0x5736b90, (q31_t)0xe62782be, (q31_t)0x56e598c, (q31_t)0xe633023e,
-    (q31_t)0x56949ca, (q31_t)0xe63e82bc, (q31_t)0x5643c4a, (q31_t)0xe64a0438,
-    (q31_t)0x55f310d, (q31_t)0xe65586b3, (q31_t)0x55a2812, (q31_t)0xe6610a2a,
-    (q31_t)0x555215a, (q31_t)0xe66c8e9f, (q31_t)0x5501ce5, (q31_t)0xe6781410,
-    (q31_t)0x54b1ab4, (q31_t)0xe6839a7c, (q31_t)0x5461ac6, (q31_t)0xe68f21e5,
-    (q31_t)0x5411d1b, (q31_t)0xe69aaa48, (q31_t)0x53c21b4, (q31_t)0xe6a633a6,
-    (q31_t)0x5372891, (q31_t)0xe6b1bdff, (q31_t)0x53231b3, (q31_t)0xe6bd4951,
-    (q31_t)0x52d3d18, (q31_t)0xe6c8d59c, (q31_t)0x5284ac3, (q31_t)0xe6d462e1,
-    (q31_t)0x5235ab2, (q31_t)0xe6dff11d, (q31_t)0x51e6ce6, (q31_t)0xe6eb8052,
-    (q31_t)0x519815f, (q31_t)0xe6f7107e, (q31_t)0x514981d, (q31_t)0xe702a1a1,
-    (q31_t)0x50fb121, (q31_t)0xe70e33bb, (q31_t)0x50acc6b, (q31_t)0xe719c6cb,
-    (q31_t)0x505e9fb, (q31_t)0xe7255ad1, (q31_t)0x50109d0, (q31_t)0xe730efcc,
-    (q31_t)0x4fc2bec, (q31_t)0xe73c85bc, (q31_t)0x4f7504e, (q31_t)0xe7481ca1,
-    (q31_t)0x4f276f7, (q31_t)0xe753b479, (q31_t)0x4ed9fe7, (q31_t)0xe75f4d45,
-    (q31_t)0x4e8cb1e, (q31_t)0xe76ae704, (q31_t)0x4e3f89c, (q31_t)0xe77681b6,
-    (q31_t)0x4df2862, (q31_t)0xe7821d59, (q31_t)0x4da5a6f, (q31_t)0xe78db9ef,
-    (q31_t)0x4d58ec3, (q31_t)0xe7995776, (q31_t)0x4d0c560, (q31_t)0xe7a4f5ed,
-    (q31_t)0x4cbfe45, (q31_t)0xe7b09555, (q31_t)0x4c73972, (q31_t)0xe7bc35ad,
-    (q31_t)0x4c276e8, (q31_t)0xe7c7d6f4, (q31_t)0x4bdb6a6, (q31_t)0xe7d3792b,
-    (q31_t)0x4b8f8ad, (q31_t)0xe7df1c50, (q31_t)0x4b43cfd, (q31_t)0xe7eac063,
-    (q31_t)0x4af8397, (q31_t)0xe7f66564, (q31_t)0x4aacc7a, (q31_t)0xe8020b52,
-    (q31_t)0x4a617a6, (q31_t)0xe80db22d, (q31_t)0x4a1651c, (q31_t)0xe81959f4,
-    (q31_t)0x49cb4dd, (q31_t)0xe82502a7, (q31_t)0x49806e7, (q31_t)0xe830ac45,
-    (q31_t)0x4935b3c, (q31_t)0xe83c56cf, (q31_t)0x48eb1db, (q31_t)0xe8480243,
-    (q31_t)0x48a0ac4, (q31_t)0xe853aea1, (q31_t)0x48565f9, (q31_t)0xe85f5be9,
-    (q31_t)0x480c379, (q31_t)0xe86b0a1a, (q31_t)0x47c2344, (q31_t)0xe876b934,
-    (q31_t)0x477855a, (q31_t)0xe8826936, (q31_t)0x472e9bc, (q31_t)0xe88e1a20,
-    (q31_t)0x46e5069, (q31_t)0xe899cbf1, (q31_t)0x469b963, (q31_t)0xe8a57ea9,
-    (q31_t)0x46524a9, (q31_t)0xe8b13248, (q31_t)0x460923b, (q31_t)0xe8bce6cd,
-    (q31_t)0x45c0219, (q31_t)0xe8c89c37, (q31_t)0x4577444, (q31_t)0xe8d45286,
-    (q31_t)0x452e8bc, (q31_t)0xe8e009ba, (q31_t)0x44e5f80, (q31_t)0xe8ebc1d3,
-    (q31_t)0x449d892, (q31_t)0xe8f77acf, (q31_t)0x44553f2, (q31_t)0xe90334af,
-    (q31_t)0x440d19e, (q31_t)0xe90eef71, (q31_t)0x43c5199, (q31_t)0xe91aab16,
-    (q31_t)0x437d3e1, (q31_t)0xe926679c, (q31_t)0x4335877, (q31_t)0xe9322505,
-    (q31_t)0x42edf5c, (q31_t)0xe93de34e, (q31_t)0x42a688f, (q31_t)0xe949a278,
-    (q31_t)0x425f410, (q31_t)0xe9556282, (q31_t)0x42181e0, (q31_t)0xe961236c,
-    (q31_t)0x41d11ff, (q31_t)0xe96ce535, (q31_t)0x418a46d, (q31_t)0xe978a7dd,
-    (q31_t)0x414392b, (q31_t)0xe9846b63, (q31_t)0x40fd037, (q31_t)0xe9902fc7,
-    (q31_t)0x40b6994, (q31_t)0xe99bf509, (q31_t)0x4070540, (q31_t)0xe9a7bb28,
-    (q31_t)0x402a33c, (q31_t)0xe9b38223, (q31_t)0x3fe4388, (q31_t)0xe9bf49fa,
-    (q31_t)0x3f9e624, (q31_t)0xe9cb12ad, (q31_t)0x3f58b10, (q31_t)0xe9d6dc3b,
-    (q31_t)0x3f1324e, (q31_t)0xe9e2a6a3, (q31_t)0x3ecdbdc, (q31_t)0xe9ee71e6,
-    (q31_t)0x3e887bb, (q31_t)0xe9fa3e03, (q31_t)0x3e435ea, (q31_t)0xea060af9,
-    (q31_t)0x3dfe66c, (q31_t)0xea11d8c8, (q31_t)0x3db993e, (q31_t)0xea1da770,
-    (q31_t)0x3d74e62, (q31_t)0xea2976ef, (q31_t)0x3d305d8, (q31_t)0xea354746,
-    (q31_t)0x3cebfa0, (q31_t)0xea411874, (q31_t)0x3ca7bba, (q31_t)0xea4cea79,
-    (q31_t)0x3c63a26, (q31_t)0xea58bd54, (q31_t)0x3c1fae5, (q31_t)0xea649105,
-    (q31_t)0x3bdbdf6, (q31_t)0xea70658a, (q31_t)0x3b9835a, (q31_t)0xea7c3ae5,
-    (q31_t)0x3b54b11, (q31_t)0xea881114, (q31_t)0x3b1151b, (q31_t)0xea93e817,
-    (q31_t)0x3ace178, (q31_t)0xea9fbfed, (q31_t)0x3a8b028, (q31_t)0xeaab9896,
-    (q31_t)0x3a4812c, (q31_t)0xeab77212, (q31_t)0x3a05484, (q31_t)0xeac34c60,
-    (q31_t)0x39c2a2f, (q31_t)0xeacf277f, (q31_t)0x398022f, (q31_t)0xeadb0370,
-    (q31_t)0x393dc82, (q31_t)0xeae6e031, (q31_t)0x38fb92a, (q31_t)0xeaf2bdc3,
-    (q31_t)0x38b9827, (q31_t)0xeafe9c24, (q31_t)0x3877978, (q31_t)0xeb0a7b54,
-    (q31_t)0x3835d1e, (q31_t)0xeb165b54, (q31_t)0x37f4319, (q31_t)0xeb223c22,
-    (q31_t)0x37b2b6a, (q31_t)0xeb2e1dbe, (q31_t)0x377160f, (q31_t)0xeb3a0027,
-    (q31_t)0x373030a, (q31_t)0xeb45e35d, (q31_t)0x36ef25b, (q31_t)0xeb51c760,
-    (q31_t)0x36ae401, (q31_t)0xeb5dac2f, (q31_t)0x366d7fd, (q31_t)0xeb6991ca,
-    (q31_t)0x362ce50, (q31_t)0xeb75782f, (q31_t)0x35ec6f8, (q31_t)0xeb815f60,
-    (q31_t)0x35ac1f7, (q31_t)0xeb8d475b, (q31_t)0x356bf4d, (q31_t)0xeb99301f,
-    (q31_t)0x352bef9, (q31_t)0xeba519ad, (q31_t)0x34ec0fc, (q31_t)0xebb10404,
-    (q31_t)0x34ac556, (q31_t)0xebbcef23, (q31_t)0x346cc07, (q31_t)0xebc8db0b,
-    (q31_t)0x342d510, (q31_t)0xebd4c7ba, (q31_t)0x33ee070, (q31_t)0xebe0b52f,
-    (q31_t)0x33aee27, (q31_t)0xebeca36c, (q31_t)0x336fe37, (q31_t)0xebf8926f,
-    (q31_t)0x333109e, (q31_t)0xec048237, (q31_t)0x32f255e, (q31_t)0xec1072c4,
-    (q31_t)0x32b3c75, (q31_t)0xec1c6417, (q31_t)0x32755e5, (q31_t)0xec28562d,
-    (q31_t)0x32371ae, (q31_t)0xec344908, (q31_t)0x31f8fcf, (q31_t)0xec403ca5,
-    (q31_t)0x31bb049, (q31_t)0xec4c3106, (q31_t)0x317d31c, (q31_t)0xec582629,
-    (q31_t)0x313f848, (q31_t)0xec641c0e, (q31_t)0x3101fce, (q31_t)0xec7012b5,
-    (q31_t)0x30c49ad, (q31_t)0xec7c0a1d, (q31_t)0x30875e5, (q31_t)0xec880245,
-    (q31_t)0x304a477, (q31_t)0xec93fb2e, (q31_t)0x300d563, (q31_t)0xec9ff4d6,
-    (q31_t)0x2fd08a9, (q31_t)0xecabef3d, (q31_t)0x2f93e4a, (q31_t)0xecb7ea63,
-    (q31_t)0x2f57644, (q31_t)0xecc3e648, (q31_t)0x2f1b099, (q31_t)0xeccfe2ea,
-    (q31_t)0x2eded49, (q31_t)0xecdbe04a, (q31_t)0x2ea2c53, (q31_t)0xece7de66,
-    (q31_t)0x2e66db8, (q31_t)0xecf3dd3f, (q31_t)0x2e2b178, (q31_t)0xecffdcd4,
-    (q31_t)0x2def794, (q31_t)0xed0bdd25, (q31_t)0x2db400a, (q31_t)0xed17de31,
-    (q31_t)0x2d78add, (q31_t)0xed23dff7, (q31_t)0x2d3d80a, (q31_t)0xed2fe277,
-    (q31_t)0x2d02794, (q31_t)0xed3be5b1, (q31_t)0x2cc7979, (q31_t)0xed47e9a5,
-    (q31_t)0x2c8cdbb, (q31_t)0xed53ee51, (q31_t)0x2c52459, (q31_t)0xed5ff3b5,
-    (q31_t)0x2c17d52, (q31_t)0xed6bf9d1, (q31_t)0x2bdd8a9, (q31_t)0xed7800a5,
-    (q31_t)0x2ba365c, (q31_t)0xed84082f, (q31_t)0x2b6966c, (q31_t)0xed901070,
-    (q31_t)0x2b2f8d8, (q31_t)0xed9c1967, (q31_t)0x2af5da2, (q31_t)0xeda82313,
-    (q31_t)0x2abc4c9, (q31_t)0xedb42d74, (q31_t)0x2a82e4d, (q31_t)0xedc0388a,
-    (q31_t)0x2a49a2e, (q31_t)0xedcc4454, (q31_t)0x2a1086d, (q31_t)0xedd850d2,
-    (q31_t)0x29d790a, (q31_t)0xede45e03, (q31_t)0x299ec05, (q31_t)0xedf06be6,
-    (q31_t)0x296615d, (q31_t)0xedfc7a7c, (q31_t)0x292d914, (q31_t)0xee0889c4,
-    (q31_t)0x28f5329, (q31_t)0xee1499bd, (q31_t)0x28bcf9c, (q31_t)0xee20aa67,
-    (q31_t)0x2884e6e, (q31_t)0xee2cbbc1, (q31_t)0x284cf9f, (q31_t)0xee38cdcb,
-    (q31_t)0x281532e, (q31_t)0xee44e084, (q31_t)0x27dd91c, (q31_t)0xee50f3ed,
-    (q31_t)0x27a616a, (q31_t)0xee5d0804, (q31_t)0x276ec16, (q31_t)0xee691cc9,
-    (q31_t)0x2737922, (q31_t)0xee75323c, (q31_t)0x270088e, (q31_t)0xee81485c,
-    (q31_t)0x26c9a58, (q31_t)0xee8d5f29, (q31_t)0x2692e83, (q31_t)0xee9976a1,
-    (q31_t)0x265c50e, (q31_t)0xeea58ec6, (q31_t)0x2625df8, (q31_t)0xeeb1a796,
-    (q31_t)0x25ef943, (q31_t)0xeebdc110, (q31_t)0x25b96ee, (q31_t)0xeec9db35,
-    (q31_t)0x25836f9, (q31_t)0xeed5f604, (q31_t)0x254d965, (q31_t)0xeee2117c,
-    (q31_t)0x2517e31, (q31_t)0xeeee2d9d, (q31_t)0x24e255e, (q31_t)0xeefa4a67,
-    (q31_t)0x24aceed, (q31_t)0xef0667d9, (q31_t)0x2477adc, (q31_t)0xef1285f2,
-    (q31_t)0x244292c, (q31_t)0xef1ea4b2, (q31_t)0x240d9de, (q31_t)0xef2ac419,
-    (q31_t)0x23d8cf1, (q31_t)0xef36e426, (q31_t)0x23a4265, (q31_t)0xef4304d8,
-    (q31_t)0x236fa3b, (q31_t)0xef4f2630, (q31_t)0x233b473, (q31_t)0xef5b482d,
-    (q31_t)0x230710d, (q31_t)0xef676ace, (q31_t)0x22d3009, (q31_t)0xef738e12,
-    (q31_t)0x229f167, (q31_t)0xef7fb1fa, (q31_t)0x226b528, (q31_t)0xef8bd685,
-    (q31_t)0x2237b4b, (q31_t)0xef97fbb2, (q31_t)0x22043d0, (q31_t)0xefa42181,
-    (q31_t)0x21d0eb8, (q31_t)0xefb047f2, (q31_t)0x219dc03, (q31_t)0xefbc6f03,
-    (q31_t)0x216abb1, (q31_t)0xefc896b5, (q31_t)0x2137dc2, (q31_t)0xefd4bf08,
-    (q31_t)0x2105236, (q31_t)0xefe0e7f9, (q31_t)0x20d290d, (q31_t)0xefed118a,
-    (q31_t)0x20a0248, (q31_t)0xeff93bba, (q31_t)0x206dde6, (q31_t)0xf0056687,
-    (q31_t)0x203bbe8, (q31_t)0xf01191f3, (q31_t)0x2009c4e, (q31_t)0xf01dbdfb,
-    (q31_t)0x1fd7f17, (q31_t)0xf029eaa1, (q31_t)0x1fa6445, (q31_t)0xf03617e2,
-    (q31_t)0x1f74bd6, (q31_t)0xf04245c0, (q31_t)0x1f435cc, (q31_t)0xf04e7438,
-    (q31_t)0x1f12227, (q31_t)0xf05aa34c, (q31_t)0x1ee10e5, (q31_t)0xf066d2fa,
-    (q31_t)0x1eb0209, (q31_t)0xf0730342, (q31_t)0x1e7f591, (q31_t)0xf07f3424,
-    (q31_t)0x1e4eb7e, (q31_t)0xf08b659f, (q31_t)0x1e1e3d0, (q31_t)0xf09797b2,
-    (q31_t)0x1dede87, (q31_t)0xf0a3ca5d, (q31_t)0x1dbdba3, (q31_t)0xf0affda0,
-    (q31_t)0x1d8db25, (q31_t)0xf0bc317a, (q31_t)0x1d5dd0c, (q31_t)0xf0c865ea,
-    (q31_t)0x1d2e158, (q31_t)0xf0d49af1, (q31_t)0x1cfe80a, (q31_t)0xf0e0d08d,
-    (q31_t)0x1ccf122, (q31_t)0xf0ed06bf, (q31_t)0x1c9fca0, (q31_t)0xf0f93d86,
-    (q31_t)0x1c70a84, (q31_t)0xf10574e0, (q31_t)0x1c41ace, (q31_t)0xf111accf,
-    (q31_t)0x1c12d7e, (q31_t)0xf11de551, (q31_t)0x1be4294, (q31_t)0xf12a1e66,
-    (q31_t)0x1bb5a11, (q31_t)0xf136580d, (q31_t)0x1b873f5, (q31_t)0xf1429247,
-    (q31_t)0x1b5903f, (q31_t)0xf14ecd11, (q31_t)0x1b2aef0, (q31_t)0xf15b086d,
-    (q31_t)0x1afd007, (q31_t)0xf1674459, (q31_t)0x1acf386, (q31_t)0xf17380d6,
-    (q31_t)0x1aa196c, (q31_t)0xf17fbde2, (q31_t)0x1a741b9, (q31_t)0xf18bfb7d,
-    (q31_t)0x1a46c6e, (q31_t)0xf19839a6, (q31_t)0x1a1998a, (q31_t)0xf1a4785e,
-    (q31_t)0x19ec90d, (q31_t)0xf1b0b7a4, (q31_t)0x19bfaf9, (q31_t)0xf1bcf777,
-    (q31_t)0x1992f4c, (q31_t)0xf1c937d6, (q31_t)0x1966606, (q31_t)0xf1d578c2,
-    (q31_t)0x1939f29, (q31_t)0xf1e1ba3a, (q31_t)0x190dab4, (q31_t)0xf1edfc3d,
-    (q31_t)0x18e18a7, (q31_t)0xf1fa3ecb, (q31_t)0x18b5903, (q31_t)0xf20681e3,
-    (q31_t)0x1889bc6, (q31_t)0xf212c585, (q31_t)0x185e0f3, (q31_t)0xf21f09b1,
-    (q31_t)0x1832888, (q31_t)0xf22b4e66, (q31_t)0x1807285, (q31_t)0xf23793a3,
-    (q31_t)0x17dbeec, (q31_t)0xf243d968, (q31_t)0x17b0dbb, (q31_t)0xf2501fb5,
-    (q31_t)0x1785ef4, (q31_t)0xf25c6688, (q31_t)0x175b296, (q31_t)0xf268ade3,
-    (q31_t)0x17308a1, (q31_t)0xf274f5c3, (q31_t)0x1706115, (q31_t)0xf2813e2a,
-    (q31_t)0x16dbbf3, (q31_t)0xf28d8715, (q31_t)0x16b193a, (q31_t)0xf299d085,
-    (q31_t)0x16878eb, (q31_t)0xf2a61a7a, (q31_t)0x165db05, (q31_t)0xf2b264f2,
-    (q31_t)0x1633f8a, (q31_t)0xf2beafed, (q31_t)0x160a678, (q31_t)0xf2cafb6b,
-    (q31_t)0x15e0fd1, (q31_t)0xf2d7476c, (q31_t)0x15b7b94, (q31_t)0xf2e393ef,
-    (q31_t)0x158e9c1, (q31_t)0xf2efe0f2, (q31_t)0x1565a58, (q31_t)0xf2fc2e77,
-    (q31_t)0x153cd5a, (q31_t)0xf3087c7d, (q31_t)0x15142c6, (q31_t)0xf314cb02,
-    (q31_t)0x14eba9d, (q31_t)0xf3211a07, (q31_t)0x14c34df, (q31_t)0xf32d698a,
-    (q31_t)0x149b18b, (q31_t)0xf339b98d, (q31_t)0x14730a3, (q31_t)0xf3460a0d,
-    (q31_t)0x144b225, (q31_t)0xf3525b0b, (q31_t)0x1423613, (q31_t)0xf35eac86,
-    (q31_t)0x13fbc6c, (q31_t)0xf36afe7e, (q31_t)0x13d4530, (q31_t)0xf37750f2,
-    (q31_t)0x13ad060, (q31_t)0xf383a3e2, (q31_t)0x1385dfb, (q31_t)0xf38ff74d,
-    (q31_t)0x135ee02, (q31_t)0xf39c4b32, (q31_t)0x1338075, (q31_t)0xf3a89f92,
-    (q31_t)0x1311553, (q31_t)0xf3b4f46c, (q31_t)0x12eac9d, (q31_t)0xf3c149bf,
-    (q31_t)0x12c4653, (q31_t)0xf3cd9f8b, (q31_t)0x129e276, (q31_t)0xf3d9f5cf,
-    (q31_t)0x1278104, (q31_t)0xf3e64c8c, (q31_t)0x12521ff, (q31_t)0xf3f2a3bf,
-    (q31_t)0x122c566, (q31_t)0xf3fefb6a, (q31_t)0x1206b39, (q31_t)0xf40b538b,
-    (q31_t)0x11e1379, (q31_t)0xf417ac22, (q31_t)0x11bbe26, (q31_t)0xf424052f,
-    (q31_t)0x1196b3f, (q31_t)0xf4305eb0, (q31_t)0x1171ac6, (q31_t)0xf43cb8a7,
-    (q31_t)0x114ccb9, (q31_t)0xf4491311, (q31_t)0x1128119, (q31_t)0xf4556def,
-    (q31_t)0x11037e6, (q31_t)0xf461c940, (q31_t)0x10df120, (q31_t)0xf46e2504,
-    (q31_t)0x10bacc8, (q31_t)0xf47a8139, (q31_t)0x1096add, (q31_t)0xf486dde1,
-    (q31_t)0x1072b5f, (q31_t)0xf4933afa, (q31_t)0x104ee4f, (q31_t)0xf49f9884,
-    (q31_t)0x102b3ac, (q31_t)0xf4abf67e, (q31_t)0x1007b77, (q31_t)0xf4b854e7,
-    (q31_t)0xfe45b0, (q31_t)0xf4c4b3c0, (q31_t)0xfc1257, (q31_t)0xf4d11308,
-    (q31_t)0xf9e16b, (q31_t)0xf4dd72be, (q31_t)0xf7b2ee, (q31_t)0xf4e9d2e3,
-    (q31_t)0xf586df, (q31_t)0xf4f63374, (q31_t)0xf35d3e, (q31_t)0xf5029473,
-    (q31_t)0xf1360b, (q31_t)0xf50ef5de, (q31_t)0xef1147, (q31_t)0xf51b57b5,
-    (q31_t)0xeceef1, (q31_t)0xf527b9f7, (q31_t)0xeacf09, (q31_t)0xf5341ca5,
-    (q31_t)0xe8b190, (q31_t)0xf5407fbd, (q31_t)0xe69686, (q31_t)0xf54ce33f,
-    (q31_t)0xe47deb, (q31_t)0xf559472b, (q31_t)0xe267be, (q31_t)0xf565ab80,
-    (q31_t)0xe05401, (q31_t)0xf572103d, (q31_t)0xde42b2, (q31_t)0xf57e7563,
-    (q31_t)0xdc33d2, (q31_t)0xf58adaf0, (q31_t)0xda2762, (q31_t)0xf59740e5,
-    (q31_t)0xd81d61, (q31_t)0xf5a3a740, (q31_t)0xd615cf, (q31_t)0xf5b00e02,
-    (q31_t)0xd410ad, (q31_t)0xf5bc7529, (q31_t)0xd20dfa, (q31_t)0xf5c8dcb6,
-    (q31_t)0xd00db6, (q31_t)0xf5d544a7, (q31_t)0xce0fe3, (q31_t)0xf5e1acfd,
-    (q31_t)0xcc147f, (q31_t)0xf5ee15b7, (q31_t)0xca1b8a, (q31_t)0xf5fa7ed4,
-    (q31_t)0xc82506, (q31_t)0xf606e854, (q31_t)0xc630f2, (q31_t)0xf6135237,
-    (q31_t)0xc43f4d, (q31_t)0xf61fbc7b, (q31_t)0xc25019, (q31_t)0xf62c2721,
-    (q31_t)0xc06355, (q31_t)0xf6389228, (q31_t)0xbe7901, (q31_t)0xf644fd8f,
-    (q31_t)0xbc911d, (q31_t)0xf6516956, (q31_t)0xbaabaa, (q31_t)0xf65dd57d,
-    (q31_t)0xb8c8a7, (q31_t)0xf66a4203, (q31_t)0xb6e815, (q31_t)0xf676aee8,
-    (q31_t)0xb509f3, (q31_t)0xf6831c2b, (q31_t)0xb32e42, (q31_t)0xf68f89cb,
-    (q31_t)0xb15502, (q31_t)0xf69bf7c9, (q31_t)0xaf7e33, (q31_t)0xf6a86623,
-    (q31_t)0xada9d4, (q31_t)0xf6b4d4d9, (q31_t)0xabd7e6, (q31_t)0xf6c143ec,
-    (q31_t)0xaa086a, (q31_t)0xf6cdb359, (q31_t)0xa83b5e, (q31_t)0xf6da2321,
-    (q31_t)0xa670c4, (q31_t)0xf6e69344, (q31_t)0xa4a89b, (q31_t)0xf6f303c0,
-    (q31_t)0xa2e2e3, (q31_t)0xf6ff7496, (q31_t)0xa11f9d, (q31_t)0xf70be5c4,
-    (q31_t)0x9f5ec8, (q31_t)0xf718574b, (q31_t)0x9da065, (q31_t)0xf724c92a,
-    (q31_t)0x9be473, (q31_t)0xf7313b60, (q31_t)0x9a2af3, (q31_t)0xf73daded,
-    (q31_t)0x9873e4, (q31_t)0xf74a20d0, (q31_t)0x96bf48, (q31_t)0xf756940a,
-    (q31_t)0x950d1d, (q31_t)0xf7630799, (q31_t)0x935d64, (q31_t)0xf76f7b7d,
-    (q31_t)0x91b01d, (q31_t)0xf77befb5, (q31_t)0x900548, (q31_t)0xf7886442,
-    (q31_t)0x8e5ce5, (q31_t)0xf794d922, (q31_t)0x8cb6f5, (q31_t)0xf7a14e55,
-    (q31_t)0x8b1376, (q31_t)0xf7adc3db, (q31_t)0x89726a, (q31_t)0xf7ba39b3,
-    (q31_t)0x87d3d0, (q31_t)0xf7c6afdc, (q31_t)0x8637a9, (q31_t)0xf7d32657,
-    (q31_t)0x849df4, (q31_t)0xf7df9d22, (q31_t)0x8306b2, (q31_t)0xf7ec143e,
-    (q31_t)0x8171e2, (q31_t)0xf7f88ba9, (q31_t)0x7fdf85, (q31_t)0xf8050364,
-    (q31_t)0x7e4f9b, (q31_t)0xf8117b6d, (q31_t)0x7cc223, (q31_t)0xf81df3c5,
-    (q31_t)0x7b371e, (q31_t)0xf82a6c6a, (q31_t)0x79ae8c, (q31_t)0xf836e55d,
-    (q31_t)0x78286e, (q31_t)0xf8435e9d, (q31_t)0x76a4c2, (q31_t)0xf84fd829,
-    (q31_t)0x752389, (q31_t)0xf85c5201, (q31_t)0x73a4c3, (q31_t)0xf868cc24,
-    (q31_t)0x722871, (q31_t)0xf8754692, (q31_t)0x70ae92, (q31_t)0xf881c14b,
-    (q31_t)0x6f3726, (q31_t)0xf88e3c4d, (q31_t)0x6dc22e, (q31_t)0xf89ab799,
-    (q31_t)0x6c4fa8, (q31_t)0xf8a7332e, (q31_t)0x6adf97, (q31_t)0xf8b3af0c,
-    (q31_t)0x6971f9, (q31_t)0xf8c02b31, (q31_t)0x6806ce, (q31_t)0xf8cca79e,
-    (q31_t)0x669e18, (q31_t)0xf8d92452, (q31_t)0x6537d4, (q31_t)0xf8e5a14d,
-    (q31_t)0x63d405, (q31_t)0xf8f21e8e, (q31_t)0x6272aa, (q31_t)0xf8fe9c15,
-    (q31_t)0x6113c2, (q31_t)0xf90b19e0, (q31_t)0x5fb74e, (q31_t)0xf91797f0,
-    (q31_t)0x5e5d4e, (q31_t)0xf9241645, (q31_t)0x5d05c3, (q31_t)0xf93094dd,
-    (q31_t)0x5bb0ab, (q31_t)0xf93d13b8, (q31_t)0x5a5e07, (q31_t)0xf94992d7,
-    (q31_t)0x590dd8, (q31_t)0xf9561237, (q31_t)0x57c01d, (q31_t)0xf96291d9,
-    (q31_t)0x5674d6, (q31_t)0xf96f11bc, (q31_t)0x552c03, (q31_t)0xf97b91e1,
-    (q31_t)0x53e5a5, (q31_t)0xf9881245, (q31_t)0x52a1bb, (q31_t)0xf99492ea,
-    (q31_t)0x516045, (q31_t)0xf9a113cd, (q31_t)0x502145, (q31_t)0xf9ad94f0,
-    (q31_t)0x4ee4b8, (q31_t)0xf9ba1651, (q31_t)0x4daaa1, (q31_t)0xf9c697f0,
-    (q31_t)0x4c72fe, (q31_t)0xf9d319cc, (q31_t)0x4b3dcf, (q31_t)0xf9df9be6,
-    (q31_t)0x4a0b16, (q31_t)0xf9ec1e3b, (q31_t)0x48dad1, (q31_t)0xf9f8a0cd,
-    (q31_t)0x47ad01, (q31_t)0xfa05239a, (q31_t)0x4681a6, (q31_t)0xfa11a6a3,
-    (q31_t)0x4558c0, (q31_t)0xfa1e29e5, (q31_t)0x44324f, (q31_t)0xfa2aad62,
-    (q31_t)0x430e53, (q31_t)0xfa373119, (q31_t)0x41eccc, (q31_t)0xfa43b508,
-    (q31_t)0x40cdba, (q31_t)0xfa503930, (q31_t)0x3fb11d, (q31_t)0xfa5cbd91,
-    (q31_t)0x3e96f6, (q31_t)0xfa694229, (q31_t)0x3d7f44, (q31_t)0xfa75c6f8,
-    (q31_t)0x3c6a07, (q31_t)0xfa824bfd, (q31_t)0x3b573f, (q31_t)0xfa8ed139,
-    (q31_t)0x3a46ed, (q31_t)0xfa9b56ab, (q31_t)0x393910, (q31_t)0xfaa7dc52,
-    (q31_t)0x382da8, (q31_t)0xfab4622d, (q31_t)0x3724b6, (q31_t)0xfac0e83d,
-    (q31_t)0x361e3a, (q31_t)0xfacd6e81, (q31_t)0x351a33, (q31_t)0xfad9f4f8,
-    (q31_t)0x3418a2, (q31_t)0xfae67ba2, (q31_t)0x331986, (q31_t)0xfaf3027e,
-    (q31_t)0x321ce0, (q31_t)0xfaff898c, (q31_t)0x3122b0, (q31_t)0xfb0c10cb,
-    (q31_t)0x302af5, (q31_t)0xfb18983b, (q31_t)0x2f35b1, (q31_t)0xfb251fdc,
-    (q31_t)0x2e42e2, (q31_t)0xfb31a7ac, (q31_t)0x2d5289, (q31_t)0xfb3e2fac,
-    (q31_t)0x2c64a6, (q31_t)0xfb4ab7db, (q31_t)0x2b7939, (q31_t)0xfb574039,
-    (q31_t)0x2a9042, (q31_t)0xfb63c8c4, (q31_t)0x29a9c1, (q31_t)0xfb70517d,
-    (q31_t)0x28c5b6, (q31_t)0xfb7cda63, (q31_t)0x27e421, (q31_t)0xfb896375,
-    (q31_t)0x270502, (q31_t)0xfb95ecb4, (q31_t)0x262859, (q31_t)0xfba2761e,
-    (q31_t)0x254e27, (q31_t)0xfbaeffb3, (q31_t)0x24766a, (q31_t)0xfbbb8973,
-    (q31_t)0x23a124, (q31_t)0xfbc8135c, (q31_t)0x22ce54, (q31_t)0xfbd49d70,
-    (q31_t)0x21fdfb, (q31_t)0xfbe127ac, (q31_t)0x213018, (q31_t)0xfbedb212,
-    (q31_t)0x2064ab, (q31_t)0xfbfa3c9f, (q31_t)0x1f9bb5, (q31_t)0xfc06c754,
-    (q31_t)0x1ed535, (q31_t)0xfc135231, (q31_t)0x1e112b, (q31_t)0xfc1fdd34,
-    (q31_t)0x1d4f99, (q31_t)0xfc2c685d, (q31_t)0x1c907c, (q31_t)0xfc38f3ac,
-    (q31_t)0x1bd3d6, (q31_t)0xfc457f21, (q31_t)0x1b19a7, (q31_t)0xfc520aba,
-    (q31_t)0x1a61ee, (q31_t)0xfc5e9678, (q31_t)0x19acac, (q31_t)0xfc6b2259,
-    (q31_t)0x18f9e1, (q31_t)0xfc77ae5e, (q31_t)0x18498c, (q31_t)0xfc843a85,
-    (q31_t)0x179bae, (q31_t)0xfc90c6cf, (q31_t)0x16f047, (q31_t)0xfc9d533b,
-    (q31_t)0x164757, (q31_t)0xfca9dfc8, (q31_t)0x15a0dd, (q31_t)0xfcb66c77,
-    (q31_t)0x14fcda, (q31_t)0xfcc2f945, (q31_t)0x145b4e, (q31_t)0xfccf8634,
-    (q31_t)0x13bc39, (q31_t)0xfcdc1342, (q31_t)0x131f9b, (q31_t)0xfce8a06f,
-    (q31_t)0x128574, (q31_t)0xfcf52dbb, (q31_t)0x11edc3, (q31_t)0xfd01bb24,
-    (q31_t)0x11588a, (q31_t)0xfd0e48ab, (q31_t)0x10c5c7, (q31_t)0xfd1ad650,
-    (q31_t)0x10357c, (q31_t)0xfd276410, (q31_t)0xfa7a8, (q31_t)0xfd33f1ed,
-    (q31_t)0xf1c4a, (q31_t)0xfd407fe6, (q31_t)0xe9364, (q31_t)0xfd4d0df9,
-    (q31_t)0xe0cf5, (q31_t)0xfd599c28, (q31_t)0xd88fd, (q31_t)0xfd662a70,
-    (q31_t)0xd077c, (q31_t)0xfd72b8d2, (q31_t)0xc8872, (q31_t)0xfd7f474d,
-    (q31_t)0xc0be0, (q31_t)0xfd8bd5e1, (q31_t)0xb91c4, (q31_t)0xfd98648d,
-    (q31_t)0xb1a20, (q31_t)0xfda4f351, (q31_t)0xaa4f3, (q31_t)0xfdb1822c,
-    (q31_t)0xa323d, (q31_t)0xfdbe111e, (q31_t)0x9c1ff, (q31_t)0xfdcaa027,
-    (q31_t)0x95438, (q31_t)0xfdd72f45, (q31_t)0x8e8e8, (q31_t)0xfde3be78,
-    (q31_t)0x8800f, (q31_t)0xfdf04dc0, (q31_t)0x819ae, (q31_t)0xfdfcdd1d,
-    (q31_t)0x7b5c4, (q31_t)0xfe096c8d, (q31_t)0x75452, (q31_t)0xfe15fc11,
-    (q31_t)0x6f556, (q31_t)0xfe228ba7, (q31_t)0x698d3, (q31_t)0xfe2f1b50,
-    (q31_t)0x63ec6, (q31_t)0xfe3bab0b, (q31_t)0x5e731, (q31_t)0xfe483ad8,
-    (q31_t)0x59214, (q31_t)0xfe54cab5, (q31_t)0x53f6e, (q31_t)0xfe615aa3,
-    (q31_t)0x4ef3f, (q31_t)0xfe6deaa1, (q31_t)0x4a188, (q31_t)0xfe7a7aae,
-    (q31_t)0x45648, (q31_t)0xfe870aca, (q31_t)0x40d80, (q31_t)0xfe939af5,
-    (q31_t)0x3c72f, (q31_t)0xfea02b2e, (q31_t)0x38356, (q31_t)0xfeacbb74,
-    (q31_t)0x341f4, (q31_t)0xfeb94bc8, (q31_t)0x3030a, (q31_t)0xfec5dc28,
-    (q31_t)0x2c697, (q31_t)0xfed26c94, (q31_t)0x28c9c, (q31_t)0xfedefd0c,
-    (q31_t)0x25519, (q31_t)0xfeeb8d8f, (q31_t)0x2200d, (q31_t)0xfef81e1d,
-    (q31_t)0x1ed78, (q31_t)0xff04aeb5, (q31_t)0x1bd5c, (q31_t)0xff113f56,
-    (q31_t)0x18fb6, (q31_t)0xff1dd001, (q31_t)0x16489, (q31_t)0xff2a60b4,
-    (q31_t)0x13bd3, (q31_t)0xff36f170, (q31_t)0x11594, (q31_t)0xff438234,
-    (q31_t)0xf1ce, (q31_t)0xff5012fe, (q31_t)0xd07e, (q31_t)0xff5ca3d0,
-    (q31_t)0xb1a7, (q31_t)0xff6934a8, (q31_t)0x9547, (q31_t)0xff75c585,
-    (q31_t)0x7b5f, (q31_t)0xff825668, (q31_t)0x63ee, (q31_t)0xff8ee750,
-    (q31_t)0x4ef5, (q31_t)0xff9b783c, (q31_t)0x3c74, (q31_t)0xffa8092c,
-    (q31_t)0x2c6a, (q31_t)0xffb49a1f, (q31_t)0x1ed8, (q31_t)0xffc12b16,
-    (q31_t)0x13bd, (q31_t)0xffcdbc0f, (q31_t)0xb1a, (q31_t)0xffda4d09,
-    (q31_t)0x4ef, (q31_t)0xffe6de05, (q31_t)0x13c, (q31_t)0xfff36f02,
-    (q31_t)0x0, (q31_t)0x0, (q31_t)0x13c, (q31_t)0xc90fe,
-    (q31_t)0x4ef, (q31_t)0x1921fb, (q31_t)0xb1a, (q31_t)0x25b2f7,
-    (q31_t)0x13bd, (q31_t)0x3243f1, (q31_t)0x1ed8, (q31_t)0x3ed4ea,
-    (q31_t)0x2c6a, (q31_t)0x4b65e1, (q31_t)0x3c74, (q31_t)0x57f6d4,
-    (q31_t)0x4ef5, (q31_t)0x6487c4, (q31_t)0x63ee, (q31_t)0x7118b0,
-    (q31_t)0x7b5f, (q31_t)0x7da998, (q31_t)0x9547, (q31_t)0x8a3a7b,
-    (q31_t)0xb1a7, (q31_t)0x96cb58, (q31_t)0xd07e, (q31_t)0xa35c30,
-    (q31_t)0xf1ce, (q31_t)0xafed02, (q31_t)0x11594, (q31_t)0xbc7dcc,
-    (q31_t)0x13bd3, (q31_t)0xc90e90, (q31_t)0x16489, (q31_t)0xd59f4c,
-    (q31_t)0x18fb6, (q31_t)0xe22fff, (q31_t)0x1bd5c, (q31_t)0xeec0aa,
-    (q31_t)0x1ed78, (q31_t)0xfb514b, (q31_t)0x2200d, (q31_t)0x107e1e3,
-    (q31_t)0x25519, (q31_t)0x1147271, (q31_t)0x28c9c, (q31_t)0x12102f4,
-    (q31_t)0x2c697, (q31_t)0x12d936c, (q31_t)0x3030a, (q31_t)0x13a23d8,
-    (q31_t)0x341f4, (q31_t)0x146b438, (q31_t)0x38356, (q31_t)0x153448c,
-    (q31_t)0x3c72f, (q31_t)0x15fd4d2, (q31_t)0x40d80, (q31_t)0x16c650b,
-    (q31_t)0x45648, (q31_t)0x178f536, (q31_t)0x4a188, (q31_t)0x1858552,
-    (q31_t)0x4ef3f, (q31_t)0x192155f, (q31_t)0x53f6e, (q31_t)0x19ea55d,
-    (q31_t)0x59214, (q31_t)0x1ab354b, (q31_t)0x5e731, (q31_t)0x1b7c528,
-    (q31_t)0x63ec6, (q31_t)0x1c454f5, (q31_t)0x698d3, (q31_t)0x1d0e4b0,
-    (q31_t)0x6f556, (q31_t)0x1dd7459, (q31_t)0x75452, (q31_t)0x1ea03ef,
-    (q31_t)0x7b5c4, (q31_t)0x1f69373, (q31_t)0x819ae, (q31_t)0x20322e3,
-    (q31_t)0x8800f, (q31_t)0x20fb240, (q31_t)0x8e8e8, (q31_t)0x21c4188,
-    (q31_t)0x95438, (q31_t)0x228d0bb, (q31_t)0x9c1ff, (q31_t)0x2355fd9,
-    (q31_t)0xa323d, (q31_t)0x241eee2, (q31_t)0xaa4f3, (q31_t)0x24e7dd4,
-    (q31_t)0xb1a20, (q31_t)0x25b0caf, (q31_t)0xb91c4, (q31_t)0x2679b73,
-    (q31_t)0xc0be0, (q31_t)0x2742a1f, (q31_t)0xc8872, (q31_t)0x280b8b3,
-    (q31_t)0xd077c, (q31_t)0x28d472e, (q31_t)0xd88fd, (q31_t)0x299d590,
-    (q31_t)0xe0cf5, (q31_t)0x2a663d8, (q31_t)0xe9364, (q31_t)0x2b2f207,
-    (q31_t)0xf1c4a, (q31_t)0x2bf801a, (q31_t)0xfa7a8, (q31_t)0x2cc0e13,
-    (q31_t)0x10357c, (q31_t)0x2d89bf0, (q31_t)0x10c5c7, (q31_t)0x2e529b0,
-    (q31_t)0x11588a, (q31_t)0x2f1b755, (q31_t)0x11edc3, (q31_t)0x2fe44dc,
-    (q31_t)0x128574, (q31_t)0x30ad245, (q31_t)0x131f9b, (q31_t)0x3175f91,
-    (q31_t)0x13bc39, (q31_t)0x323ecbe, (q31_t)0x145b4e, (q31_t)0x33079cc,
-    (q31_t)0x14fcda, (q31_t)0x33d06bb, (q31_t)0x15a0dd, (q31_t)0x3499389,
-    (q31_t)0x164757, (q31_t)0x3562038, (q31_t)0x16f047, (q31_t)0x362acc5,
-    (q31_t)0x179bae, (q31_t)0x36f3931, (q31_t)0x18498c, (q31_t)0x37bc57b,
-    (q31_t)0x18f9e1, (q31_t)0x38851a2, (q31_t)0x19acac, (q31_t)0x394dda7,
-    (q31_t)0x1a61ee, (q31_t)0x3a16988, (q31_t)0x1b19a7, (q31_t)0x3adf546,
-    (q31_t)0x1bd3d6, (q31_t)0x3ba80df, (q31_t)0x1c907c, (q31_t)0x3c70c54,
-    (q31_t)0x1d4f99, (q31_t)0x3d397a3, (q31_t)0x1e112b, (q31_t)0x3e022cc,
-    (q31_t)0x1ed535, (q31_t)0x3ecadcf, (q31_t)0x1f9bb5, (q31_t)0x3f938ac,
-    (q31_t)0x2064ab, (q31_t)0x405c361, (q31_t)0x213018, (q31_t)0x4124dee,
-    (q31_t)0x21fdfb, (q31_t)0x41ed854, (q31_t)0x22ce54, (q31_t)0x42b6290,
-    (q31_t)0x23a124, (q31_t)0x437eca4, (q31_t)0x24766a, (q31_t)0x444768d,
-    (q31_t)0x254e27, (q31_t)0x451004d, (q31_t)0x262859, (q31_t)0x45d89e2,
-    (q31_t)0x270502, (q31_t)0x46a134c, (q31_t)0x27e421, (q31_t)0x4769c8b,
-    (q31_t)0x28c5b6, (q31_t)0x483259d, (q31_t)0x29a9c1, (q31_t)0x48fae83,
-    (q31_t)0x2a9042, (q31_t)0x49c373c, (q31_t)0x2b7939, (q31_t)0x4a8bfc7,
-    (q31_t)0x2c64a6, (q31_t)0x4b54825, (q31_t)0x2d5289, (q31_t)0x4c1d054,
-    (q31_t)0x2e42e2, (q31_t)0x4ce5854, (q31_t)0x2f35b1, (q31_t)0x4dae024,
-    (q31_t)0x302af5, (q31_t)0x4e767c5, (q31_t)0x3122b0, (q31_t)0x4f3ef35,
-    (q31_t)0x321ce0, (q31_t)0x5007674, (q31_t)0x331986, (q31_t)0x50cfd82,
-    (q31_t)0x3418a2, (q31_t)0x519845e, (q31_t)0x351a33, (q31_t)0x5260b08,
-    (q31_t)0x361e3a, (q31_t)0x532917f, (q31_t)0x3724b6, (q31_t)0x53f17c3,
-    (q31_t)0x382da8, (q31_t)0x54b9dd3, (q31_t)0x393910, (q31_t)0x55823ae,
-    (q31_t)0x3a46ed, (q31_t)0x564a955, (q31_t)0x3b573f, (q31_t)0x5712ec7,
-    (q31_t)0x3c6a07, (q31_t)0x57db403, (q31_t)0x3d7f44, (q31_t)0x58a3908,
-    (q31_t)0x3e96f6, (q31_t)0x596bdd7, (q31_t)0x3fb11d, (q31_t)0x5a3426f,
-    (q31_t)0x40cdba, (q31_t)0x5afc6d0, (q31_t)0x41eccc, (q31_t)0x5bc4af8,
-    (q31_t)0x430e53, (q31_t)0x5c8cee7, (q31_t)0x44324f, (q31_t)0x5d5529e,
-    (q31_t)0x4558c0, (q31_t)0x5e1d61b, (q31_t)0x4681a6, (q31_t)0x5ee595d,
-    (q31_t)0x47ad01, (q31_t)0x5fadc66, (q31_t)0x48dad1, (q31_t)0x6075f33,
-    (q31_t)0x4a0b16, (q31_t)0x613e1c5, (q31_t)0x4b3dcf, (q31_t)0x620641a,
-    (q31_t)0x4c72fe, (q31_t)0x62ce634, (q31_t)0x4daaa1, (q31_t)0x6396810,
-    (q31_t)0x4ee4b8, (q31_t)0x645e9af, (q31_t)0x502145, (q31_t)0x6526b10,
-    (q31_t)0x516045, (q31_t)0x65eec33, (q31_t)0x52a1bb, (q31_t)0x66b6d16,
-    (q31_t)0x53e5a5, (q31_t)0x677edbb, (q31_t)0x552c03, (q31_t)0x6846e1f,
-    (q31_t)0x5674d6, (q31_t)0x690ee44, (q31_t)0x57c01d, (q31_t)0x69d6e27,
-    (q31_t)0x590dd8, (q31_t)0x6a9edc9, (q31_t)0x5a5e07, (q31_t)0x6b66d29,
-    (q31_t)0x5bb0ab, (q31_t)0x6c2ec48, (q31_t)0x5d05c3, (q31_t)0x6cf6b23,
-    (q31_t)0x5e5d4e, (q31_t)0x6dbe9bb, (q31_t)0x5fb74e, (q31_t)0x6e86810,
-    (q31_t)0x6113c2, (q31_t)0x6f4e620, (q31_t)0x6272aa, (q31_t)0x70163eb,
-    (q31_t)0x63d405, (q31_t)0x70de172, (q31_t)0x6537d4, (q31_t)0x71a5eb3,
-    (q31_t)0x669e18, (q31_t)0x726dbae, (q31_t)0x6806ce, (q31_t)0x7335862,
-    (q31_t)0x6971f9, (q31_t)0x73fd4cf, (q31_t)0x6adf97, (q31_t)0x74c50f4,
-    (q31_t)0x6c4fa8, (q31_t)0x758ccd2, (q31_t)0x6dc22e, (q31_t)0x7654867,
-    (q31_t)0x6f3726, (q31_t)0x771c3b3, (q31_t)0x70ae92, (q31_t)0x77e3eb5,
-    (q31_t)0x722871, (q31_t)0x78ab96e, (q31_t)0x73a4c3, (q31_t)0x79733dc,
-    (q31_t)0x752389, (q31_t)0x7a3adff, (q31_t)0x76a4c2, (q31_t)0x7b027d7,
-    (q31_t)0x78286e, (q31_t)0x7bca163, (q31_t)0x79ae8c, (q31_t)0x7c91aa3,
-    (q31_t)0x7b371e, (q31_t)0x7d59396, (q31_t)0x7cc223, (q31_t)0x7e20c3b,
-    (q31_t)0x7e4f9b, (q31_t)0x7ee8493, (q31_t)0x7fdf85, (q31_t)0x7fafc9c,
-    (q31_t)0x8171e2, (q31_t)0x8077457, (q31_t)0x8306b2, (q31_t)0x813ebc2,
-    (q31_t)0x849df4, (q31_t)0x82062de, (q31_t)0x8637a9, (q31_t)0x82cd9a9,
-    (q31_t)0x87d3d0, (q31_t)0x8395024, (q31_t)0x89726a, (q31_t)0x845c64d,
-    (q31_t)0x8b1376, (q31_t)0x8523c25, (q31_t)0x8cb6f5, (q31_t)0x85eb1ab,
-    (q31_t)0x8e5ce5, (q31_t)0x86b26de, (q31_t)0x900548, (q31_t)0x8779bbe,
-    (q31_t)0x91b01d, (q31_t)0x884104b, (q31_t)0x935d64, (q31_t)0x8908483,
-    (q31_t)0x950d1d, (q31_t)0x89cf867, (q31_t)0x96bf48, (q31_t)0x8a96bf6,
-    (q31_t)0x9873e4, (q31_t)0x8b5df30, (q31_t)0x9a2af3, (q31_t)0x8c25213,
-    (q31_t)0x9be473, (q31_t)0x8cec4a0, (q31_t)0x9da065, (q31_t)0x8db36d6,
-    (q31_t)0x9f5ec8, (q31_t)0x8e7a8b5, (q31_t)0xa11f9d, (q31_t)0x8f41a3c,
-    (q31_t)0xa2e2e3, (q31_t)0x9008b6a, (q31_t)0xa4a89b, (q31_t)0x90cfc40,
-    (q31_t)0xa670c4, (q31_t)0x9196cbc, (q31_t)0xa83b5e, (q31_t)0x925dcdf,
-    (q31_t)0xaa086a, (q31_t)0x9324ca7, (q31_t)0xabd7e6, (q31_t)0x93ebc14,
-    (q31_t)0xada9d4, (q31_t)0x94b2b27, (q31_t)0xaf7e33, (q31_t)0x95799dd,
-    (q31_t)0xb15502, (q31_t)0x9640837, (q31_t)0xb32e42, (q31_t)0x9707635,
-    (q31_t)0xb509f3, (q31_t)0x97ce3d5, (q31_t)0xb6e815, (q31_t)0x9895118,
-    (q31_t)0xb8c8a7, (q31_t)0x995bdfd, (q31_t)0xbaabaa, (q31_t)0x9a22a83,
-    (q31_t)0xbc911d, (q31_t)0x9ae96aa, (q31_t)0xbe7901, (q31_t)0x9bb0271,
-    (q31_t)0xc06355, (q31_t)0x9c76dd8, (q31_t)0xc25019, (q31_t)0x9d3d8df,
-    (q31_t)0xc43f4d, (q31_t)0x9e04385, (q31_t)0xc630f2, (q31_t)0x9ecadc9,
-    (q31_t)0xc82506, (q31_t)0x9f917ac, (q31_t)0xca1b8a, (q31_t)0xa05812c,
-    (q31_t)0xcc147f, (q31_t)0xa11ea49, (q31_t)0xce0fe3, (q31_t)0xa1e5303,
-    (q31_t)0xd00db6, (q31_t)0xa2abb59, (q31_t)0xd20dfa, (q31_t)0xa37234a,
-    (q31_t)0xd410ad, (q31_t)0xa438ad7, (q31_t)0xd615cf, (q31_t)0xa4ff1fe,
-    (q31_t)0xd81d61, (q31_t)0xa5c58c0, (q31_t)0xda2762, (q31_t)0xa68bf1b,
-    (q31_t)0xdc33d2, (q31_t)0xa752510, (q31_t)0xde42b2, (q31_t)0xa818a9d,
-    (q31_t)0xe05401, (q31_t)0xa8defc3, (q31_t)0xe267be, (q31_t)0xa9a5480,
-    (q31_t)0xe47deb, (q31_t)0xaa6b8d5, (q31_t)0xe69686, (q31_t)0xab31cc1,
-    (q31_t)0xe8b190, (q31_t)0xabf8043, (q31_t)0xeacf09, (q31_t)0xacbe35b,
-    (q31_t)0xeceef1, (q31_t)0xad84609, (q31_t)0xef1147, (q31_t)0xae4a84b,
-    (q31_t)0xf1360b, (q31_t)0xaf10a22, (q31_t)0xf35d3e, (q31_t)0xafd6b8d,
-    (q31_t)0xf586df, (q31_t)0xb09cc8c, (q31_t)0xf7b2ee, (q31_t)0xb162d1d,
-    (q31_t)0xf9e16b, (q31_t)0xb228d42, (q31_t)0xfc1257, (q31_t)0xb2eecf8,
-    (q31_t)0xfe45b0, (q31_t)0xb3b4c40, (q31_t)0x1007b77, (q31_t)0xb47ab19,
-    (q31_t)0x102b3ac, (q31_t)0xb540982, (q31_t)0x104ee4f, (q31_t)0xb60677c,
-    (q31_t)0x1072b5f, (q31_t)0xb6cc506, (q31_t)0x1096add, (q31_t)0xb79221f,
-    (q31_t)0x10bacc8, (q31_t)0xb857ec7, (q31_t)0x10df120, (q31_t)0xb91dafc,
-    (q31_t)0x11037e6, (q31_t)0xb9e36c0, (q31_t)0x1128119, (q31_t)0xbaa9211,
-    (q31_t)0x114ccb9, (q31_t)0xbb6ecef, (q31_t)0x1171ac6, (q31_t)0xbc34759,
-    (q31_t)0x1196b3f, (q31_t)0xbcfa150, (q31_t)0x11bbe26, (q31_t)0xbdbfad1,
-    (q31_t)0x11e1379, (q31_t)0xbe853de, (q31_t)0x1206b39, (q31_t)0xbf4ac75,
-    (q31_t)0x122c566, (q31_t)0xc010496, (q31_t)0x12521ff, (q31_t)0xc0d5c41,
-    (q31_t)0x1278104, (q31_t)0xc19b374, (q31_t)0x129e276, (q31_t)0xc260a31,
-    (q31_t)0x12c4653, (q31_t)0xc326075, (q31_t)0x12eac9d, (q31_t)0xc3eb641,
-    (q31_t)0x1311553, (q31_t)0xc4b0b94, (q31_t)0x1338075, (q31_t)0xc57606e,
-    (q31_t)0x135ee02, (q31_t)0xc63b4ce, (q31_t)0x1385dfb, (q31_t)0xc7008b3,
-    (q31_t)0x13ad060, (q31_t)0xc7c5c1e, (q31_t)0x13d4530, (q31_t)0xc88af0e,
-    (q31_t)0x13fbc6c, (q31_t)0xc950182, (q31_t)0x1423613, (q31_t)0xca1537a,
-    (q31_t)0x144b225, (q31_t)0xcada4f5, (q31_t)0x14730a3, (q31_t)0xcb9f5f3,
-    (q31_t)0x149b18b, (q31_t)0xcc64673, (q31_t)0x14c34df, (q31_t)0xcd29676,
-    (q31_t)0x14eba9d, (q31_t)0xcdee5f9, (q31_t)0x15142c6, (q31_t)0xceb34fe,
-    (q31_t)0x153cd5a, (q31_t)0xcf78383, (q31_t)0x1565a58, (q31_t)0xd03d189,
-    (q31_t)0x158e9c1, (q31_t)0xd101f0e, (q31_t)0x15b7b94, (q31_t)0xd1c6c11,
-    (q31_t)0x15e0fd1, (q31_t)0xd28b894, (q31_t)0x160a678, (q31_t)0xd350495,
-    (q31_t)0x1633f8a, (q31_t)0xd415013, (q31_t)0x165db05, (q31_t)0xd4d9b0e,
-    (q31_t)0x16878eb, (q31_t)0xd59e586, (q31_t)0x16b193a, (q31_t)0xd662f7b,
-    (q31_t)0x16dbbf3, (q31_t)0xd7278eb, (q31_t)0x1706115, (q31_t)0xd7ec1d6,
-    (q31_t)0x17308a1, (q31_t)0xd8b0a3d, (q31_t)0x175b296, (q31_t)0xd97521d,
-    (q31_t)0x1785ef4, (q31_t)0xda39978, (q31_t)0x17b0dbb, (q31_t)0xdafe04b,
-    (q31_t)0x17dbeec, (q31_t)0xdbc2698, (q31_t)0x1807285, (q31_t)0xdc86c5d,
-    (q31_t)0x1832888, (q31_t)0xdd4b19a, (q31_t)0x185e0f3, (q31_t)0xde0f64f,
-    (q31_t)0x1889bc6, (q31_t)0xded3a7b, (q31_t)0x18b5903, (q31_t)0xdf97e1d,
-    (q31_t)0x18e18a7, (q31_t)0xe05c135, (q31_t)0x190dab4, (q31_t)0xe1203c3,
-    (q31_t)0x1939f29, (q31_t)0xe1e45c6, (q31_t)0x1966606, (q31_t)0xe2a873e,
-    (q31_t)0x1992f4c, (q31_t)0xe36c82a, (q31_t)0x19bfaf9, (q31_t)0xe430889,
-    (q31_t)0x19ec90d, (q31_t)0xe4f485c, (q31_t)0x1a1998a, (q31_t)0xe5b87a2,
-    (q31_t)0x1a46c6e, (q31_t)0xe67c65a, (q31_t)0x1a741b9, (q31_t)0xe740483,
-    (q31_t)0x1aa196c, (q31_t)0xe80421e, (q31_t)0x1acf386, (q31_t)0xe8c7f2a,
-    (q31_t)0x1afd007, (q31_t)0xe98bba7, (q31_t)0x1b2aef0, (q31_t)0xea4f793,
-    (q31_t)0x1b5903f, (q31_t)0xeb132ef, (q31_t)0x1b873f5, (q31_t)0xebd6db9,
-    (q31_t)0x1bb5a11, (q31_t)0xec9a7f3, (q31_t)0x1be4294, (q31_t)0xed5e19a,
-    (q31_t)0x1c12d7e, (q31_t)0xee21aaf, (q31_t)0x1c41ace, (q31_t)0xeee5331,
-    (q31_t)0x1c70a84, (q31_t)0xefa8b20, (q31_t)0x1c9fca0, (q31_t)0xf06c27a,
-    (q31_t)0x1ccf122, (q31_t)0xf12f941, (q31_t)0x1cfe80a, (q31_t)0xf1f2f73,
-    (q31_t)0x1d2e158, (q31_t)0xf2b650f, (q31_t)0x1d5dd0c, (q31_t)0xf379a16,
-    (q31_t)0x1d8db25, (q31_t)0xf43ce86, (q31_t)0x1dbdba3, (q31_t)0xf500260,
-    (q31_t)0x1dede87, (q31_t)0xf5c35a3, (q31_t)0x1e1e3d0, (q31_t)0xf68684e,
-    (q31_t)0x1e4eb7e, (q31_t)0xf749a61, (q31_t)0x1e7f591, (q31_t)0xf80cbdc,
-    (q31_t)0x1eb0209, (q31_t)0xf8cfcbe, (q31_t)0x1ee10e5, (q31_t)0xf992d06,
-    (q31_t)0x1f12227, (q31_t)0xfa55cb4, (q31_t)0x1f435cc, (q31_t)0xfb18bc8,
-    (q31_t)0x1f74bd6, (q31_t)0xfbdba40, (q31_t)0x1fa6445, (q31_t)0xfc9e81e,
-    (q31_t)0x1fd7f17, (q31_t)0xfd6155f, (q31_t)0x2009c4e, (q31_t)0xfe24205,
-    (q31_t)0x203bbe8, (q31_t)0xfee6e0d, (q31_t)0x206dde6, (q31_t)0xffa9979,
-    (q31_t)0x20a0248, (q31_t)0x1006c446, (q31_t)0x20d290d, (q31_t)0x1012ee76,
-    (q31_t)0x2105236, (q31_t)0x101f1807, (q31_t)0x2137dc2, (q31_t)0x102b40f8,
-    (q31_t)0x216abb1, (q31_t)0x1037694b, (q31_t)0x219dc03, (q31_t)0x104390fd,
-    (q31_t)0x21d0eb8, (q31_t)0x104fb80e, (q31_t)0x22043d0, (q31_t)0x105bde7f,
-    (q31_t)0x2237b4b, (q31_t)0x1068044e, (q31_t)0x226b528, (q31_t)0x1074297b,
-    (q31_t)0x229f167, (q31_t)0x10804e06, (q31_t)0x22d3009, (q31_t)0x108c71ee,
-    (q31_t)0x230710d, (q31_t)0x10989532, (q31_t)0x233b473, (q31_t)0x10a4b7d3,
-    (q31_t)0x236fa3b, (q31_t)0x10b0d9d0, (q31_t)0x23a4265, (q31_t)0x10bcfb28,
-    (q31_t)0x23d8cf1, (q31_t)0x10c91bda, (q31_t)0x240d9de, (q31_t)0x10d53be7,
-    (q31_t)0x244292c, (q31_t)0x10e15b4e, (q31_t)0x2477adc, (q31_t)0x10ed7a0e,
-    (q31_t)0x24aceed, (q31_t)0x10f99827, (q31_t)0x24e255e, (q31_t)0x1105b599,
-    (q31_t)0x2517e31, (q31_t)0x1111d263, (q31_t)0x254d965, (q31_t)0x111dee84,
-    (q31_t)0x25836f9, (q31_t)0x112a09fc, (q31_t)0x25b96ee, (q31_t)0x113624cb,
-    (q31_t)0x25ef943, (q31_t)0x11423ef0, (q31_t)0x2625df8, (q31_t)0x114e586a,
-    (q31_t)0x265c50e, (q31_t)0x115a713a, (q31_t)0x2692e83, (q31_t)0x1166895f,
-    (q31_t)0x26c9a58, (q31_t)0x1172a0d7, (q31_t)0x270088e, (q31_t)0x117eb7a4,
-    (q31_t)0x2737922, (q31_t)0x118acdc4, (q31_t)0x276ec16, (q31_t)0x1196e337,
-    (q31_t)0x27a616a, (q31_t)0x11a2f7fc, (q31_t)0x27dd91c, (q31_t)0x11af0c13,
-    (q31_t)0x281532e, (q31_t)0x11bb1f7c, (q31_t)0x284cf9f, (q31_t)0x11c73235,
-    (q31_t)0x2884e6e, (q31_t)0x11d3443f, (q31_t)0x28bcf9c, (q31_t)0x11df5599,
-    (q31_t)0x28f5329, (q31_t)0x11eb6643, (q31_t)0x292d914, (q31_t)0x11f7763c,
-    (q31_t)0x296615d, (q31_t)0x12038584, (q31_t)0x299ec05, (q31_t)0x120f941a,
-    (q31_t)0x29d790a, (q31_t)0x121ba1fd, (q31_t)0x2a1086d, (q31_t)0x1227af2e,
-    (q31_t)0x2a49a2e, (q31_t)0x1233bbac, (q31_t)0x2a82e4d, (q31_t)0x123fc776,
-    (q31_t)0x2abc4c9, (q31_t)0x124bd28c, (q31_t)0x2af5da2, (q31_t)0x1257dced,
-    (q31_t)0x2b2f8d8, (q31_t)0x1263e699, (q31_t)0x2b6966c, (q31_t)0x126fef90,
-    (q31_t)0x2ba365c, (q31_t)0x127bf7d1, (q31_t)0x2bdd8a9, (q31_t)0x1287ff5b,
-    (q31_t)0x2c17d52, (q31_t)0x1294062f, (q31_t)0x2c52459, (q31_t)0x12a00c4b,
-    (q31_t)0x2c8cdbb, (q31_t)0x12ac11af, (q31_t)0x2cc7979, (q31_t)0x12b8165b,
-    (q31_t)0x2d02794, (q31_t)0x12c41a4f, (q31_t)0x2d3d80a, (q31_t)0x12d01d89,
-    (q31_t)0x2d78add, (q31_t)0x12dc2009, (q31_t)0x2db400a, (q31_t)0x12e821cf,
-    (q31_t)0x2def794, (q31_t)0x12f422db, (q31_t)0x2e2b178, (q31_t)0x1300232c,
-    (q31_t)0x2e66db8, (q31_t)0x130c22c1, (q31_t)0x2ea2c53, (q31_t)0x1318219a,
-    (q31_t)0x2eded49, (q31_t)0x13241fb6, (q31_t)0x2f1b099, (q31_t)0x13301d16,
-    (q31_t)0x2f57644, (q31_t)0x133c19b8, (q31_t)0x2f93e4a, (q31_t)0x1348159d,
-    (q31_t)0x2fd08a9, (q31_t)0x135410c3, (q31_t)0x300d563, (q31_t)0x13600b2a,
-    (q31_t)0x304a477, (q31_t)0x136c04d2, (q31_t)0x30875e5, (q31_t)0x1377fdbb,
-    (q31_t)0x30c49ad, (q31_t)0x1383f5e3, (q31_t)0x3101fce, (q31_t)0x138fed4b,
-    (q31_t)0x313f848, (q31_t)0x139be3f2, (q31_t)0x317d31c, (q31_t)0x13a7d9d7,
-    (q31_t)0x31bb049, (q31_t)0x13b3cefa, (q31_t)0x31f8fcf, (q31_t)0x13bfc35b,
-    (q31_t)0x32371ae, (q31_t)0x13cbb6f8, (q31_t)0x32755e5, (q31_t)0x13d7a9d3,
-    (q31_t)0x32b3c75, (q31_t)0x13e39be9, (q31_t)0x32f255e, (q31_t)0x13ef8d3c,
-    (q31_t)0x333109e, (q31_t)0x13fb7dc9, (q31_t)0x336fe37, (q31_t)0x14076d91,
-    (q31_t)0x33aee27, (q31_t)0x14135c94, (q31_t)0x33ee070, (q31_t)0x141f4ad1,
-    (q31_t)0x342d510, (q31_t)0x142b3846, (q31_t)0x346cc07, (q31_t)0x143724f5,
-    (q31_t)0x34ac556, (q31_t)0x144310dd, (q31_t)0x34ec0fc, (q31_t)0x144efbfc,
-    (q31_t)0x352bef9, (q31_t)0x145ae653, (q31_t)0x356bf4d, (q31_t)0x1466cfe1,
-    (q31_t)0x35ac1f7, (q31_t)0x1472b8a5, (q31_t)0x35ec6f8, (q31_t)0x147ea0a0,
-    (q31_t)0x362ce50, (q31_t)0x148a87d1, (q31_t)0x366d7fd, (q31_t)0x14966e36,
-    (q31_t)0x36ae401, (q31_t)0x14a253d1, (q31_t)0x36ef25b, (q31_t)0x14ae38a0,
-    (q31_t)0x373030a, (q31_t)0x14ba1ca3, (q31_t)0x377160f, (q31_t)0x14c5ffd9,
-    (q31_t)0x37b2b6a, (q31_t)0x14d1e242, (q31_t)0x37f4319, (q31_t)0x14ddc3de,
-    (q31_t)0x3835d1e, (q31_t)0x14e9a4ac, (q31_t)0x3877978, (q31_t)0x14f584ac,
-    (q31_t)0x38b9827, (q31_t)0x150163dc, (q31_t)0x38fb92a, (q31_t)0x150d423d,
-    (q31_t)0x393dc82, (q31_t)0x15191fcf, (q31_t)0x398022f, (q31_t)0x1524fc90,
-    (q31_t)0x39c2a2f, (q31_t)0x1530d881, (q31_t)0x3a05484, (q31_t)0x153cb3a0,
-    (q31_t)0x3a4812c, (q31_t)0x15488dee, (q31_t)0x3a8b028, (q31_t)0x1554676a,
-    (q31_t)0x3ace178, (q31_t)0x15604013, (q31_t)0x3b1151b, (q31_t)0x156c17e9,
-    (q31_t)0x3b54b11, (q31_t)0x1577eeec, (q31_t)0x3b9835a, (q31_t)0x1583c51b,
-    (q31_t)0x3bdbdf6, (q31_t)0x158f9a76, (q31_t)0x3c1fae5, (q31_t)0x159b6efb,
-    (q31_t)0x3c63a26, (q31_t)0x15a742ac, (q31_t)0x3ca7bba, (q31_t)0x15b31587,
-    (q31_t)0x3cebfa0, (q31_t)0x15bee78c, (q31_t)0x3d305d8, (q31_t)0x15cab8ba,
-    (q31_t)0x3d74e62, (q31_t)0x15d68911, (q31_t)0x3db993e, (q31_t)0x15e25890,
-    (q31_t)0x3dfe66c, (q31_t)0x15ee2738, (q31_t)0x3e435ea, (q31_t)0x15f9f507,
-    (q31_t)0x3e887bb, (q31_t)0x1605c1fd, (q31_t)0x3ecdbdc, (q31_t)0x16118e1a,
-    (q31_t)0x3f1324e, (q31_t)0x161d595d, (q31_t)0x3f58b10, (q31_t)0x162923c5,
-    (q31_t)0x3f9e624, (q31_t)0x1634ed53, (q31_t)0x3fe4388, (q31_t)0x1640b606,
-    (q31_t)0x402a33c, (q31_t)0x164c7ddd, (q31_t)0x4070540, (q31_t)0x165844d8,
-    (q31_t)0x40b6994, (q31_t)0x16640af7, (q31_t)0x40fd037, (q31_t)0x166fd039,
-    (q31_t)0x414392b, (q31_t)0x167b949d, (q31_t)0x418a46d, (q31_t)0x16875823,
-    (q31_t)0x41d11ff, (q31_t)0x16931acb, (q31_t)0x42181e0, (q31_t)0x169edc94,
-    (q31_t)0x425f410, (q31_t)0x16aa9d7e, (q31_t)0x42a688f, (q31_t)0x16b65d88,
-    (q31_t)0x42edf5c, (q31_t)0x16c21cb2, (q31_t)0x4335877, (q31_t)0x16cddafb,
-    (q31_t)0x437d3e1, (q31_t)0x16d99864, (q31_t)0x43c5199, (q31_t)0x16e554ea,
-    (q31_t)0x440d19e, (q31_t)0x16f1108f, (q31_t)0x44553f2, (q31_t)0x16fccb51,
-    (q31_t)0x449d892, (q31_t)0x17088531, (q31_t)0x44e5f80, (q31_t)0x17143e2d,
-    (q31_t)0x452e8bc, (q31_t)0x171ff646, (q31_t)0x4577444, (q31_t)0x172bad7a,
-    (q31_t)0x45c0219, (q31_t)0x173763c9, (q31_t)0x460923b, (q31_t)0x17431933,
-    (q31_t)0x46524a9, (q31_t)0x174ecdb8, (q31_t)0x469b963, (q31_t)0x175a8157,
-    (q31_t)0x46e5069, (q31_t)0x1766340f, (q31_t)0x472e9bc, (q31_t)0x1771e5e0,
-    (q31_t)0x477855a, (q31_t)0x177d96ca, (q31_t)0x47c2344, (q31_t)0x178946cc,
-    (q31_t)0x480c379, (q31_t)0x1794f5e6, (q31_t)0x48565f9, (q31_t)0x17a0a417,
-    (q31_t)0x48a0ac4, (q31_t)0x17ac515f, (q31_t)0x48eb1db, (q31_t)0x17b7fdbd,
-    (q31_t)0x4935b3c, (q31_t)0x17c3a931, (q31_t)0x49806e7, (q31_t)0x17cf53bb,
-    (q31_t)0x49cb4dd, (q31_t)0x17dafd59, (q31_t)0x4a1651c, (q31_t)0x17e6a60c,
-    (q31_t)0x4a617a6, (q31_t)0x17f24dd3, (q31_t)0x4aacc7a, (q31_t)0x17fdf4ae,
-    (q31_t)0x4af8397, (q31_t)0x18099a9c, (q31_t)0x4b43cfd, (q31_t)0x18153f9d,
-    (q31_t)0x4b8f8ad, (q31_t)0x1820e3b0, (q31_t)0x4bdb6a6, (q31_t)0x182c86d5,
-    (q31_t)0x4c276e8, (q31_t)0x1838290c, (q31_t)0x4c73972, (q31_t)0x1843ca53,
-    (q31_t)0x4cbfe45, (q31_t)0x184f6aab, (q31_t)0x4d0c560, (q31_t)0x185b0a13,
-    (q31_t)0x4d58ec3, (q31_t)0x1866a88a, (q31_t)0x4da5a6f, (q31_t)0x18724611,
-    (q31_t)0x4df2862, (q31_t)0x187de2a7, (q31_t)0x4e3f89c, (q31_t)0x18897e4a,
-    (q31_t)0x4e8cb1e, (q31_t)0x189518fc, (q31_t)0x4ed9fe7, (q31_t)0x18a0b2bb,
-    (q31_t)0x4f276f7, (q31_t)0x18ac4b87, (q31_t)0x4f7504e, (q31_t)0x18b7e35f,
-    (q31_t)0x4fc2bec, (q31_t)0x18c37a44, (q31_t)0x50109d0, (q31_t)0x18cf1034,
-    (q31_t)0x505e9fb, (q31_t)0x18daa52f, (q31_t)0x50acc6b, (q31_t)0x18e63935,
-    (q31_t)0x50fb121, (q31_t)0x18f1cc45, (q31_t)0x514981d, (q31_t)0x18fd5e5f,
-    (q31_t)0x519815f, (q31_t)0x1908ef82, (q31_t)0x51e6ce6, (q31_t)0x19147fae,
-    (q31_t)0x5235ab2, (q31_t)0x19200ee3, (q31_t)0x5284ac3, (q31_t)0x192b9d1f,
-    (q31_t)0x52d3d18, (q31_t)0x19372a64, (q31_t)0x53231b3, (q31_t)0x1942b6af,
-    (q31_t)0x5372891, (q31_t)0x194e4201, (q31_t)0x53c21b4, (q31_t)0x1959cc5a,
-    (q31_t)0x5411d1b, (q31_t)0x196555b8, (q31_t)0x5461ac6, (q31_t)0x1970de1b,
-    (q31_t)0x54b1ab4, (q31_t)0x197c6584, (q31_t)0x5501ce5, (q31_t)0x1987ebf0,
-    (q31_t)0x555215a, (q31_t)0x19937161, (q31_t)0x55a2812, (q31_t)0x199ef5d6,
-    (q31_t)0x55f310d, (q31_t)0x19aa794d, (q31_t)0x5643c4a, (q31_t)0x19b5fbc8,
-    (q31_t)0x56949ca, (q31_t)0x19c17d44, (q31_t)0x56e598c, (q31_t)0x19ccfdc2,
-    (q31_t)0x5736b90, (q31_t)0x19d87d42, (q31_t)0x5787fd6, (q31_t)0x19e3fbc3,
-    (q31_t)0x57d965d, (q31_t)0x19ef7944, (q31_t)0x582af26, (q31_t)0x19faf5c5,
-    (q31_t)0x587ca31, (q31_t)0x1a067145, (q31_t)0x58ce77c, (q31_t)0x1a11ebc5,
-    (q31_t)0x5920708, (q31_t)0x1a1d6544, (q31_t)0x59728d5, (q31_t)0x1a28ddc0,
-    (q31_t)0x59c4ce3, (q31_t)0x1a34553b, (q31_t)0x5a17330, (q31_t)0x1a3fcbb3,
-    (q31_t)0x5a69bbe, (q31_t)0x1a4b4128, (q31_t)0x5abc68c, (q31_t)0x1a56b599,
-    (q31_t)0x5b0f399, (q31_t)0x1a622907, (q31_t)0x5b622e6, (q31_t)0x1a6d9b70,
-    (q31_t)0x5bb5472, (q31_t)0x1a790cd4, (q31_t)0x5c0883d, (q31_t)0x1a847d33,
-    (q31_t)0x5c5be47, (q31_t)0x1a8fec8c, (q31_t)0x5caf690, (q31_t)0x1a9b5adf,
-    (q31_t)0x5d03118, (q31_t)0x1aa6c82b, (q31_t)0x5d56ddd, (q31_t)0x1ab23471,
-    (q31_t)0x5daace1, (q31_t)0x1abd9faf, (q31_t)0x5dfee22, (q31_t)0x1ac909e5,
-    (q31_t)0x5e531a1, (q31_t)0x1ad47312, (q31_t)0x5ea775e, (q31_t)0x1adfdb37,
-    (q31_t)0x5efbf58, (q31_t)0x1aeb4253, (q31_t)0x5f5098f, (q31_t)0x1af6a865,
-    (q31_t)0x5fa5603, (q31_t)0x1b020d6c, (q31_t)0x5ffa4b3, (q31_t)0x1b0d716a,
-    (q31_t)0x604f5a0, (q31_t)0x1b18d45c, (q31_t)0x60a48c9, (q31_t)0x1b243643,
-    (q31_t)0x60f9e2e, (q31_t)0x1b2f971e, (q31_t)0x614f5cf, (q31_t)0x1b3af6ec,
-    (q31_t)0x61a4fac, (q31_t)0x1b4655ae, (q31_t)0x61fabc4, (q31_t)0x1b51b363,
-    (q31_t)0x6250a18, (q31_t)0x1b5d100a, (q31_t)0x62a6aa6, (q31_t)0x1b686ba3,
-    (q31_t)0x62fcd6f, (q31_t)0x1b73c62d, (q31_t)0x6353273, (q31_t)0x1b7f1fa9,
-    (q31_t)0x63a99b1, (q31_t)0x1b8a7815, (q31_t)0x6400329, (q31_t)0x1b95cf71,
-    (q31_t)0x6456edb, (q31_t)0x1ba125bd, (q31_t)0x64adcc7, (q31_t)0x1bac7af9,
-    (q31_t)0x6504ced, (q31_t)0x1bb7cf23, (q31_t)0x655bf4c, (q31_t)0x1bc3223c,
-    (q31_t)0x65b33e4, (q31_t)0x1bce7442, (q31_t)0x660aab5, (q31_t)0x1bd9c537,
-    (q31_t)0x66623be, (q31_t)0x1be51518, (q31_t)0x66b9f01, (q31_t)0x1bf063e6,
-    (q31_t)0x6711c7b, (q31_t)0x1bfbb1a0, (q31_t)0x6769c2e, (q31_t)0x1c06fe46,
-    (q31_t)0x67c1e18, (q31_t)0x1c1249d8, (q31_t)0x681a23a, (q31_t)0x1c1d9454,
-    (q31_t)0x6872894, (q31_t)0x1c28ddbb, (q31_t)0x68cb124, (q31_t)0x1c34260c,
-    (q31_t)0x6923bec, (q31_t)0x1c3f6d47, (q31_t)0x697c8eb, (q31_t)0x1c4ab36b,
-    (q31_t)0x69d5820, (q31_t)0x1c55f878, (q31_t)0x6a2e98b, (q31_t)0x1c613c6d,
-    (q31_t)0x6a87d2d, (q31_t)0x1c6c7f4a, (q31_t)0x6ae1304, (q31_t)0x1c77c10e,
-    (q31_t)0x6b3ab12, (q31_t)0x1c8301b9, (q31_t)0x6b94554, (q31_t)0x1c8e414b,
-    (q31_t)0x6bee1cd, (q31_t)0x1c997fc4, (q31_t)0x6c4807a, (q31_t)0x1ca4bd21,
-    (q31_t)0x6ca215c, (q31_t)0x1caff965, (q31_t)0x6cfc472, (q31_t)0x1cbb348d,
-    (q31_t)0x6d569be, (q31_t)0x1cc66e99, (q31_t)0x6db113d, (q31_t)0x1cd1a78a,
-    (q31_t)0x6e0baf0, (q31_t)0x1cdcdf5e, (q31_t)0x6e666d7, (q31_t)0x1ce81615,
-    (q31_t)0x6ec14f2, (q31_t)0x1cf34baf, (q31_t)0x6f1c540, (q31_t)0x1cfe802b,
-    (q31_t)0x6f777c1, (q31_t)0x1d09b389, (q31_t)0x6fd2c75, (q31_t)0x1d14e5c9,
-    (q31_t)0x702e35c, (q31_t)0x1d2016e9, (q31_t)0x7089c75, (q31_t)0x1d2b46ea,
-    (q31_t)0x70e57c0, (q31_t)0x1d3675cb, (q31_t)0x714153e, (q31_t)0x1d41a38c,
-    (q31_t)0x719d4ed, (q31_t)0x1d4cd02c, (q31_t)0x71f96ce, (q31_t)0x1d57fbaa,
-    (q31_t)0x7255ae0, (q31_t)0x1d632608, (q31_t)0x72b2123, (q31_t)0x1d6e4f43,
-    (q31_t)0x730e997, (q31_t)0x1d79775c, (q31_t)0x736b43c, (q31_t)0x1d849e51,
-    (q31_t)0x73c8111, (q31_t)0x1d8fc424, (q31_t)0x7425016, (q31_t)0x1d9ae8d2,
-    (q31_t)0x748214c, (q31_t)0x1da60c5d, (q31_t)0x74df4b1, (q31_t)0x1db12ec3,
-    (q31_t)0x753ca46, (q31_t)0x1dbc5004, (q31_t)0x759a20a, (q31_t)0x1dc7701f,
-    (q31_t)0x75f7bfe, (q31_t)0x1dd28f15, (q31_t)0x7655820, (q31_t)0x1dddace4,
-    (q31_t)0x76b3671, (q31_t)0x1de8c98c, (q31_t)0x77116f0, (q31_t)0x1df3e50d,
-    (q31_t)0x776f99d, (q31_t)0x1dfeff67, (q31_t)0x77cde79, (q31_t)0x1e0a1898,
-    (q31_t)0x782c582, (q31_t)0x1e1530a1, (q31_t)0x788aeb9, (q31_t)0x1e204781,
-    (q31_t)0x78e9a1d, (q31_t)0x1e2b5d38, (q31_t)0x79487ae, (q31_t)0x1e3671c5,
-    (q31_t)0x79a776c, (q31_t)0x1e418528, (q31_t)0x7a06957, (q31_t)0x1e4c9760,
-    (q31_t)0x7a65d6e, (q31_t)0x1e57a86d, (q31_t)0x7ac53b1, (q31_t)0x1e62b84f,
-    (q31_t)0x7b24c20, (q31_t)0x1e6dc705, (q31_t)0x7b846ba, (q31_t)0x1e78d48e,
-    (q31_t)0x7be4381, (q31_t)0x1e83e0eb, (q31_t)0x7c44272, (q31_t)0x1e8eec1b,
-    (q31_t)0x7ca438f, (q31_t)0x1e99f61d, (q31_t)0x7d046d6, (q31_t)0x1ea4fef0,
-    (q31_t)0x7d64c47, (q31_t)0x1eb00696, (q31_t)0x7dc53e3, (q31_t)0x1ebb0d0d,
-    (q31_t)0x7e25daa, (q31_t)0x1ec61254, (q31_t)0x7e8699a, (q31_t)0x1ed1166b,
-    (q31_t)0x7ee77b3, (q31_t)0x1edc1953, (q31_t)0x7f487f6, (q31_t)0x1ee71b0a,
-    (q31_t)0x7fa9a62, (q31_t)0x1ef21b90, (q31_t)0x800aef7, (q31_t)0x1efd1ae4,
-    (q31_t)0x806c5b5, (q31_t)0x1f081907, (q31_t)0x80cde9b, (q31_t)0x1f1315f7,
-    (q31_t)0x812f9a9, (q31_t)0x1f1e11b5, (q31_t)0x81916df, (q31_t)0x1f290c3f,
-    (q31_t)0x81f363d, (q31_t)0x1f340596, (q31_t)0x82557c3, (q31_t)0x1f3efdb9,
-    (q31_t)0x82b7b70, (q31_t)0x1f49f4a8, (q31_t)0x831a143, (q31_t)0x1f54ea62,
-    (q31_t)0x837c93e, (q31_t)0x1f5fdee6, (q31_t)0x83df35f, (q31_t)0x1f6ad235,
-    (q31_t)0x8441fa6, (q31_t)0x1f75c44e, (q31_t)0x84a4e14, (q31_t)0x1f80b531,
-    (q31_t)0x8507ea7, (q31_t)0x1f8ba4dc, (q31_t)0x856b160, (q31_t)0x1f969350,
-    (q31_t)0x85ce63e, (q31_t)0x1fa1808c, (q31_t)0x8631d42, (q31_t)0x1fac6c91,
-    (q31_t)0x869566a, (q31_t)0x1fb7575c, (q31_t)0x86f91b7, (q31_t)0x1fc240ef,
-    (q31_t)0x875cf28, (q31_t)0x1fcd2948, (q31_t)0x87c0ebd, (q31_t)0x1fd81067,
-    (q31_t)0x8825077, (q31_t)0x1fe2f64c, (q31_t)0x8889454, (q31_t)0x1feddaf6,
-    (q31_t)0x88eda54, (q31_t)0x1ff8be65, (q31_t)0x8952278, (q31_t)0x2003a099,
-    (q31_t)0x89b6cbf, (q31_t)0x200e8190, (q31_t)0x8a1b928, (q31_t)0x2019614c,
-    (q31_t)0x8a807b4, (q31_t)0x20243fca, (q31_t)0x8ae5862, (q31_t)0x202f1d0b,
-    (q31_t)0x8b4ab32, (q31_t)0x2039f90f, (q31_t)0x8bb0023, (q31_t)0x2044d3d4,
-    (q31_t)0x8c15736, (q31_t)0x204fad5b, (q31_t)0x8c7b06b, (q31_t)0x205a85a3,
-    (q31_t)0x8ce0bc0, (q31_t)0x20655cac, (q31_t)0x8d46936, (q31_t)0x20703275,
-    (q31_t)0x8dac8cd, (q31_t)0x207b06fe, (q31_t)0x8e12a84, (q31_t)0x2085da46,
-    (q31_t)0x8e78e5b, (q31_t)0x2090ac4d, (q31_t)0x8edf452, (q31_t)0x209b7d13,
-    (q31_t)0x8f45c68, (q31_t)0x20a64c97, (q31_t)0x8fac69e, (q31_t)0x20b11ad9,
-    (q31_t)0x90132f2, (q31_t)0x20bbe7d8, (q31_t)0x907a166, (q31_t)0x20c6b395,
-    (q31_t)0x90e11f7, (q31_t)0x20d17e0d, (q31_t)0x91484a8, (q31_t)0x20dc4742,
-    (q31_t)0x91af976, (q31_t)0x20e70f32, (q31_t)0x9217062, (q31_t)0x20f1d5de,
-    (q31_t)0x927e96b, (q31_t)0x20fc9b44, (q31_t)0x92e6492, (q31_t)0x21075f65,
-    (q31_t)0x934e1d6, (q31_t)0x21122240, (q31_t)0x93b6137, (q31_t)0x211ce3d5,
-    (q31_t)0x941e2b4, (q31_t)0x2127a423, (q31_t)0x948664d, (q31_t)0x21326329,
-    (q31_t)0x94eec03, (q31_t)0x213d20e8, (q31_t)0x95573d4, (q31_t)0x2147dd5f,
-    (q31_t)0x95bfdc1, (q31_t)0x2152988d, (q31_t)0x96289c9, (q31_t)0x215d5273,
-    (q31_t)0x96917ec, (q31_t)0x21680b0f, (q31_t)0x96fa82a, (q31_t)0x2172c262,
-    (q31_t)0x9763a83, (q31_t)0x217d786a, (q31_t)0x97ccef5, (q31_t)0x21882d28,
-    (q31_t)0x9836582, (q31_t)0x2192e09b, (q31_t)0x989fe29, (q31_t)0x219d92c2,
-    (q31_t)0x99098e9, (q31_t)0x21a8439e, (q31_t)0x99735c2, (q31_t)0x21b2f32e,
-    (q31_t)0x99dd4b4, (q31_t)0x21bda171, (q31_t)0x9a475bf, (q31_t)0x21c84e67,
-    (q31_t)0x9ab18e3, (q31_t)0x21d2fa0f, (q31_t)0x9b1be1e, (q31_t)0x21dda46a,
-    (q31_t)0x9b86572, (q31_t)0x21e84d76, (q31_t)0x9bf0edd, (q31_t)0x21f2f534,
-    (q31_t)0x9c5ba60, (q31_t)0x21fd9ba3, (q31_t)0x9cc67fa, (q31_t)0x220840c2,
-    (q31_t)0x9d317ab, (q31_t)0x2212e492, (q31_t)0x9d9c973, (q31_t)0x221d8711,
-    (q31_t)0x9e07d51, (q31_t)0x2228283f, (q31_t)0x9e73346, (q31_t)0x2232c81c,
-    (q31_t)0x9edeb50, (q31_t)0x223d66a8, (q31_t)0x9f4a570, (q31_t)0x224803e2,
-    (q31_t)0x9fb61a5, (q31_t)0x22529fca, (q31_t)0xa021fef, (q31_t)0x225d3a5e,
-    (q31_t)0xa08e04f, (q31_t)0x2267d3a0, (q31_t)0xa0fa2c3, (q31_t)0x22726b8e,
-    (q31_t)0xa16674b, (q31_t)0x227d0228, (q31_t)0xa1d2de7, (q31_t)0x2287976e,
-    (q31_t)0xa23f698, (q31_t)0x22922b5e, (q31_t)0xa2ac15b, (q31_t)0x229cbdfa,
-    (q31_t)0xa318e32, (q31_t)0x22a74f40, (q31_t)0xa385d1d, (q31_t)0x22b1df30,
-    (q31_t)0xa3f2e19, (q31_t)0x22bc6dca, (q31_t)0xa460129, (q31_t)0x22c6fb0c,
-    (q31_t)0xa4cd64b, (q31_t)0x22d186f8, (q31_t)0xa53ad7e, (q31_t)0x22dc118c,
-    (q31_t)0xa5a86c4, (q31_t)0x22e69ac8, (q31_t)0xa61621b, (q31_t)0x22f122ab,
-    (q31_t)0xa683f83, (q31_t)0x22fba936, (q31_t)0xa6f1efc, (q31_t)0x23062e67,
-    (q31_t)0xa760086, (q31_t)0x2310b23e, (q31_t)0xa7ce420, (q31_t)0x231b34bc,
-    (q31_t)0xa83c9ca, (q31_t)0x2325b5df, (q31_t)0xa8ab184, (q31_t)0x233035a7,
-    (q31_t)0xa919b4e, (q31_t)0x233ab414, (q31_t)0xa988727, (q31_t)0x23453125,
-    (q31_t)0xa9f750f, (q31_t)0x234facda, (q31_t)0xaa66506, (q31_t)0x235a2733,
-    (q31_t)0xaad570c, (q31_t)0x2364a02e, (q31_t)0xab44b1f, (q31_t)0x236f17cc,
-    (q31_t)0xabb4141, (q31_t)0x23798e0d, (q31_t)0xac23971, (q31_t)0x238402ef,
-    (q31_t)0xac933ae, (q31_t)0x238e7673, (q31_t)0xad02ff8, (q31_t)0x2398e898,
-    (q31_t)0xad72e4f, (q31_t)0x23a3595e, (q31_t)0xade2eb3, (q31_t)0x23adc8c4,
-    (q31_t)0xae53123, (q31_t)0x23b836ca, (q31_t)0xaec35a0, (q31_t)0x23c2a36f,
-    (q31_t)0xaf33c28, (q31_t)0x23cd0eb3, (q31_t)0xafa44bc, (q31_t)0x23d77896,
-    (q31_t)0xb014f5b, (q31_t)0x23e1e117, (q31_t)0xb085c05, (q31_t)0x23ec4837,
-    (q31_t)0xb0f6aba, (q31_t)0x23f6adf3, (q31_t)0xb167b79, (q31_t)0x2401124d,
-    (q31_t)0xb1d8e43, (q31_t)0x240b7543, (q31_t)0xb24a316, (q31_t)0x2415d6d5,
-    (q31_t)0xb2bb9f4, (q31_t)0x24203704, (q31_t)0xb32d2da, (q31_t)0x242a95ce,
-    (q31_t)0xb39edca, (q31_t)0x2434f332, (q31_t)0xb410ac3, (q31_t)0x243f4f32,
-    (q31_t)0xb4829c4, (q31_t)0x2449a9cc, (q31_t)0xb4f4acd, (q31_t)0x245402ff,
-    (q31_t)0xb566ddf, (q31_t)0x245e5acc, (q31_t)0xb5d92f8, (q31_t)0x2468b132,
-    (q31_t)0xb64ba19, (q31_t)0x24730631, (q31_t)0xb6be341, (q31_t)0x247d59c8,
-    (q31_t)0xb730e70, (q31_t)0x2487abf7, (q31_t)0xb7a3ba5, (q31_t)0x2491fcbe,
-    (q31_t)0xb816ae1, (q31_t)0x249c4c1b, (q31_t)0xb889c23, (q31_t)0x24a69a0f,
-    (q31_t)0xb8fcf6b, (q31_t)0x24b0e699, (q31_t)0xb9704b9, (q31_t)0x24bb31ba,
-    (q31_t)0xb9e3c0b, (q31_t)0x24c57b6f, (q31_t)0xba57563, (q31_t)0x24cfc3ba,
-    (q31_t)0xbacb0bf, (q31_t)0x24da0a9a, (q31_t)0xbb3ee20, (q31_t)0x24e4500e,
-    (q31_t)0xbbb2d85, (q31_t)0x24ee9415, (q31_t)0xbc26eee, (q31_t)0x24f8d6b0,
-    (q31_t)0xbc9b25a, (q31_t)0x250317df, (q31_t)0xbd0f7ca, (q31_t)0x250d57a0,
-    (q31_t)0xbd83f3d, (q31_t)0x251795f3, (q31_t)0xbdf88b3, (q31_t)0x2521d2d8,
-    (q31_t)0xbe6d42b, (q31_t)0x252c0e4f, (q31_t)0xbee21a5, (q31_t)0x25364857,
-    (q31_t)0xbf57121, (q31_t)0x254080ef, (q31_t)0xbfcc29f, (q31_t)0x254ab818,
-    (q31_t)0xc04161e, (q31_t)0x2554edd1, (q31_t)0xc0b6b9e, (q31_t)0x255f2219,
-    (q31_t)0xc12c31f, (q31_t)0x256954f1, (q31_t)0xc1a1ca0, (q31_t)0x25738657,
-    (q31_t)0xc217822, (q31_t)0x257db64c, (q31_t)0xc28d5a3, (q31_t)0x2587e4cf,
-    (q31_t)0xc303524, (q31_t)0x259211df, (q31_t)0xc3796a5, (q31_t)0x259c3d7c,
-    (q31_t)0xc3efa25, (q31_t)0x25a667a7, (q31_t)0xc465fa3, (q31_t)0x25b0905d,
-    (q31_t)0xc4dc720, (q31_t)0x25bab7a0, (q31_t)0xc55309b, (q31_t)0x25c4dd6e,
-    (q31_t)0xc5c9c14, (q31_t)0x25cf01c8, (q31_t)0xc64098b, (q31_t)0x25d924ac,
-    (q31_t)0xc6b78ff, (q31_t)0x25e3461b, (q31_t)0xc72ea70, (q31_t)0x25ed6614,
-    (q31_t)0xc7a5dde, (q31_t)0x25f78497, (q31_t)0xc81d349, (q31_t)0x2601a1a2,
-    (q31_t)0xc894aaf, (q31_t)0x260bbd37, (q31_t)0xc90c412, (q31_t)0x2615d754,
-    (q31_t)0xc983f70, (q31_t)0x261feffa, (q31_t)0xc9fbcca, (q31_t)0x262a0727,
-    (q31_t)0xca73c1e, (q31_t)0x26341cdb, (q31_t)0xcaebd6e, (q31_t)0x263e3117,
-    (q31_t)0xcb640b8, (q31_t)0x264843d9, (q31_t)0xcbdc5fc, (q31_t)0x26525521,
-    (q31_t)0xcc54d3a, (q31_t)0x265c64ef, (q31_t)0xcccd671, (q31_t)0x26667342,
-    (q31_t)0xcd461a2, (q31_t)0x2670801a, (q31_t)0xcdbeecc, (q31_t)0x267a8b77,
-    (q31_t)0xce37def, (q31_t)0x26849558, (q31_t)0xceb0f0a, (q31_t)0x268e9dbd,
-    (q31_t)0xcf2a21d, (q31_t)0x2698a4a6, (q31_t)0xcfa3729, (q31_t)0x26a2aa11,
-    (q31_t)0xd01ce2b, (q31_t)0x26acadff, (q31_t)0xd096725, (q31_t)0x26b6b070,
-    (q31_t)0xd110216, (q31_t)0x26c0b162, (q31_t)0xd189efe, (q31_t)0x26cab0d6,
-    (q31_t)0xd203ddc, (q31_t)0x26d4aecb, (q31_t)0xd27deb0, (q31_t)0x26deab41,
-    (q31_t)0xd2f817b, (q31_t)0x26e8a637, (q31_t)0xd37263a, (q31_t)0x26f29fad,
-    (q31_t)0xd3eccef, (q31_t)0x26fc97a3, (q31_t)0xd467599, (q31_t)0x27068e18,
-    (q31_t)0xd4e2037, (q31_t)0x2710830c, (q31_t)0xd55ccca, (q31_t)0x271a767e,
-    (q31_t)0xd5d7b50, (q31_t)0x2724686e, (q31_t)0xd652bcb, (q31_t)0x272e58dc,
-    (q31_t)0xd6cde39, (q31_t)0x273847c8, (q31_t)0xd74929a, (q31_t)0x27423530,
-    (q31_t)0xd7c48ee, (q31_t)0x274c2115, (q31_t)0xd840134, (q31_t)0x27560b76,
-    (q31_t)0xd8bbb6d, (q31_t)0x275ff452, (q31_t)0xd937798, (q31_t)0x2769dbaa,
-    (q31_t)0xd9b35b4, (q31_t)0x2773c17d, (q31_t)0xda2f5c2, (q31_t)0x277da5cb,
-    (q31_t)0xdaab7c0, (q31_t)0x27878893, (q31_t)0xdb27bb0, (q31_t)0x279169d5,
-    (q31_t)0xdba4190, (q31_t)0x279b4990, (q31_t)0xdc20960, (q31_t)0x27a527c4,
-    (q31_t)0xdc9d320, (q31_t)0x27af0472, (q31_t)0xdd19ed0, (q31_t)0x27b8df97,
-    (q31_t)0xdd96c6f, (q31_t)0x27c2b934, (q31_t)0xde13bfd, (q31_t)0x27cc9149,
-    (q31_t)0xde90d79, (q31_t)0x27d667d5, (q31_t)0xdf0e0e4, (q31_t)0x27e03cd8,
-    (q31_t)0xdf8b63d, (q31_t)0x27ea1052, (q31_t)0xe008d84, (q31_t)0x27f3e241,
-    (q31_t)0xe0866b8, (q31_t)0x27fdb2a7, (q31_t)0xe1041d9, (q31_t)0x28078181,
-    (q31_t)0xe181ee8, (q31_t)0x28114ed0, (q31_t)0xe1ffde2, (q31_t)0x281b1a94,
-    (q31_t)0xe27dec9, (q31_t)0x2824e4cc, (q31_t)0xe2fc19c, (q31_t)0x282ead78,
-    (q31_t)0xe37a65b, (q31_t)0x28387498, (q31_t)0xe3f8d05, (q31_t)0x28423a2a,
-    (q31_t)0xe47759a, (q31_t)0x284bfe2f, (q31_t)0xe4f6019, (q31_t)0x2855c0a6,
-    (q31_t)0xe574c84, (q31_t)0x285f8190, (q31_t)0xe5f3ad8, (q31_t)0x286940ea,
-    (q31_t)0xe672b16, (q31_t)0x2872feb6, (q31_t)0xe6f1d3d, (q31_t)0x287cbaf3,
-    (q31_t)0xe77114e, (q31_t)0x288675a0, (q31_t)0xe7f0748, (q31_t)0x28902ebd,
-    (q31_t)0xe86ff2a, (q31_t)0x2899e64a, (q31_t)0xe8ef8f4, (q31_t)0x28a39c46,
-    (q31_t)0xe96f4a7, (q31_t)0x28ad50b1, (q31_t)0xe9ef241, (q31_t)0x28b7038b,
-    (q31_t)0xea6f1c2, (q31_t)0x28c0b4d2, (q31_t)0xeaef32b, (q31_t)0x28ca6488,
-    (q31_t)0xeb6f67a, (q31_t)0x28d412ab, (q31_t)0xebefbb0, (q31_t)0x28ddbf3b,
-    (q31_t)0xec702cb, (q31_t)0x28e76a37, (q31_t)0xecf0bcd, (q31_t)0x28f113a0,
-    (q31_t)0xed716b4, (q31_t)0x28fabb75, (q31_t)0xedf2380, (q31_t)0x290461b5,
-    (q31_t)0xee73231, (q31_t)0x290e0661, (q31_t)0xeef42c7, (q31_t)0x2917a977,
-    (q31_t)0xef75541, (q31_t)0x29214af8, (q31_t)0xeff699f, (q31_t)0x292aeae3,
-    (q31_t)0xf077fe1, (q31_t)0x29348937, (q31_t)0xf0f9805, (q31_t)0x293e25f5,
-    (q31_t)0xf17b20d, (q31_t)0x2947c11c, (q31_t)0xf1fcdf8, (q31_t)0x29515aab,
-    (q31_t)0xf27ebc5, (q31_t)0x295af2a3, (q31_t)0xf300b74, (q31_t)0x29648902,
-    (q31_t)0xf382d05, (q31_t)0x296e1dc9, (q31_t)0xf405077, (q31_t)0x2977b0f7,
-    (q31_t)0xf4875ca, (q31_t)0x2981428c, (q31_t)0xf509cfe, (q31_t)0x298ad287,
-    (q31_t)0xf58c613, (q31_t)0x299460e8, (q31_t)0xf60f108, (q31_t)0x299dedaf,
-    (q31_t)0xf691ddd, (q31_t)0x29a778db, (q31_t)0xf714c91, (q31_t)0x29b1026c,
-    (q31_t)0xf797d24, (q31_t)0x29ba8a61, (q31_t)0xf81af97, (q31_t)0x29c410ba,
-    (q31_t)0xf89e3e8, (q31_t)0x29cd9578, (q31_t)0xf921a17, (q31_t)0x29d71899,
-    (q31_t)0xf9a5225, (q31_t)0x29e09a1c, (q31_t)0xfa28c10, (q31_t)0x29ea1a03,
-    (q31_t)0xfaac7d8, (q31_t)0x29f3984c, (q31_t)0xfb3057d, (q31_t)0x29fd14f6,
-    (q31_t)0xfbb4500, (q31_t)0x2a069003, (q31_t)0xfc3865e, (q31_t)0x2a100970,
-    (q31_t)0xfcbc999, (q31_t)0x2a19813f, (q31_t)0xfd40eaf, (q31_t)0x2a22f76e,
-    (q31_t)0xfdc55a1, (q31_t)0x2a2c6bfd, (q31_t)0xfe49e6d, (q31_t)0x2a35deeb,
-    (q31_t)0xfece915, (q31_t)0x2a3f503a, (q31_t)0xff53597, (q31_t)0x2a48bfe7,
-    (q31_t)0xffd83f4, (q31_t)0x2a522df3, (q31_t)0x1005d42a, (q31_t)0x2a5b9a5d,
-    (q31_t)0x100e2639, (q31_t)0x2a650525, (q31_t)0x10167a22, (q31_t)0x2a6e6e4b,
-    (q31_t)0x101ecfe4, (q31_t)0x2a77d5ce, (q31_t)0x1027277e, (q31_t)0x2a813bae,
-    (q31_t)0x102f80f1, (q31_t)0x2a8a9fea, (q31_t)0x1037dc3b, (q31_t)0x2a940283,
-    (q31_t)0x1040395d, (q31_t)0x2a9d6377, (q31_t)0x10489856, (q31_t)0x2aa6c2c6,
-    (q31_t)0x1050f926, (q31_t)0x2ab02071, (q31_t)0x10595bcd, (q31_t)0x2ab97c77,
-    (q31_t)0x1061c04a, (q31_t)0x2ac2d6d6, (q31_t)0x106a269d, (q31_t)0x2acc2f90,
-    (q31_t)0x10728ec6, (q31_t)0x2ad586a3, (q31_t)0x107af8c4, (q31_t)0x2adedc10,
-    (q31_t)0x10836497, (q31_t)0x2ae82fd5, (q31_t)0x108bd23f, (q31_t)0x2af181f3,
-    (q31_t)0x109441bb, (q31_t)0x2afad269, (q31_t)0x109cb30b, (q31_t)0x2b042137,
-    (q31_t)0x10a5262f, (q31_t)0x2b0d6e5c, (q31_t)0x10ad9b26, (q31_t)0x2b16b9d9,
-    (q31_t)0x10b611f1, (q31_t)0x2b2003ac, (q31_t)0x10be8a8d, (q31_t)0x2b294bd5,
-    (q31_t)0x10c704fd, (q31_t)0x2b329255, (q31_t)0x10cf813e, (q31_t)0x2b3bd72a,
-    (q31_t)0x10d7ff51, (q31_t)0x2b451a55, (q31_t)0x10e07f36, (q31_t)0x2b4e5bd4,
-    (q31_t)0x10e900ec, (q31_t)0x2b579ba8, (q31_t)0x10f18472, (q31_t)0x2b60d9d0,
-    (q31_t)0x10fa09c9, (q31_t)0x2b6a164d, (q31_t)0x110290f0, (q31_t)0x2b73511c,
-    (q31_t)0x110b19e7, (q31_t)0x2b7c8a3f, (q31_t)0x1113a4ad, (q31_t)0x2b85c1b5,
-    (q31_t)0x111c3142, (q31_t)0x2b8ef77d, (q31_t)0x1124bfa6, (q31_t)0x2b982b97,
-    (q31_t)0x112d4fd9, (q31_t)0x2ba15e03, (q31_t)0x1135e1d9, (q31_t)0x2baa8ec0,
-    (q31_t)0x113e75a8, (q31_t)0x2bb3bdce, (q31_t)0x11470b44, (q31_t)0x2bbceb2d,
-    (q31_t)0x114fa2ad, (q31_t)0x2bc616dd, (q31_t)0x11583be2, (q31_t)0x2bcf40dc,
-    (q31_t)0x1160d6e5, (q31_t)0x2bd8692b, (q31_t)0x116973b3, (q31_t)0x2be18fc9,
-    (q31_t)0x1172124d, (q31_t)0x2beab4b6, (q31_t)0x117ab2b3, (q31_t)0x2bf3d7f2,
-    (q31_t)0x118354e4, (q31_t)0x2bfcf97c, (q31_t)0x118bf8e0, (q31_t)0x2c061953,
-    (q31_t)0x11949ea6, (q31_t)0x2c0f3779, (q31_t)0x119d4636, (q31_t)0x2c1853eb,
-    (q31_t)0x11a5ef90, (q31_t)0x2c216eaa, (q31_t)0x11ae9ab4, (q31_t)0x2c2a87b6,
-    (q31_t)0x11b747a0, (q31_t)0x2c339f0e, (q31_t)0x11bff656, (q31_t)0x2c3cb4b1,
-    (q31_t)0x11c8a6d4, (q31_t)0x2c45c8a0, (q31_t)0x11d1591a, (q31_t)0x2c4edada,
-    (q31_t)0x11da0d28, (q31_t)0x2c57eb5e, (q31_t)0x11e2c2fd, (q31_t)0x2c60fa2d,
-    (q31_t)0x11eb7a9a, (q31_t)0x2c6a0746, (q31_t)0x11f433fd, (q31_t)0x2c7312a9,
-    (q31_t)0x11fcef27, (q31_t)0x2c7c1c55, (q31_t)0x1205ac17, (q31_t)0x2c85244a,
-    (q31_t)0x120e6acc, (q31_t)0x2c8e2a87, (q31_t)0x12172b48, (q31_t)0x2c972f0d,
-    (q31_t)0x121fed88, (q31_t)0x2ca031da, (q31_t)0x1228b18d, (q31_t)0x2ca932ef,
-    (q31_t)0x12317756, (q31_t)0x2cb2324c, (q31_t)0x123a3ee4, (q31_t)0x2cbb2fef,
-    (q31_t)0x12430835, (q31_t)0x2cc42bd9, (q31_t)0x124bd34a, (q31_t)0x2ccd2609,
-    (q31_t)0x1254a021, (q31_t)0x2cd61e7f, (q31_t)0x125d6ebc, (q31_t)0x2cdf153a,
-    (q31_t)0x12663f19, (q31_t)0x2ce80a3a, (q31_t)0x126f1138, (q31_t)0x2cf0fd80,
-    (q31_t)0x1277e518, (q31_t)0x2cf9ef09, (q31_t)0x1280babb, (q31_t)0x2d02ded7,
-    (q31_t)0x1289921e, (q31_t)0x2d0bcce8, (q31_t)0x12926b41, (q31_t)0x2d14b93d,
-    (q31_t)0x129b4626, (q31_t)0x2d1da3d5, (q31_t)0x12a422ca, (q31_t)0x2d268cb0,
-    (q31_t)0x12ad012e, (q31_t)0x2d2f73cd, (q31_t)0x12b5e151, (q31_t)0x2d38592c,
-    (q31_t)0x12bec333, (q31_t)0x2d413ccd, (q31_t)0x12c7a6d4, (q31_t)0x2d4a1eaf,
-    (q31_t)0x12d08c33, (q31_t)0x2d52fed2, (q31_t)0x12d97350, (q31_t)0x2d5bdd36,
-    (q31_t)0x12e25c2b, (q31_t)0x2d64b9da, (q31_t)0x12eb46c3, (q31_t)0x2d6d94bf,
-    (q31_t)0x12f43318, (q31_t)0x2d766de2, (q31_t)0x12fd2129, (q31_t)0x2d7f4545,
-    (q31_t)0x130610f7, (q31_t)0x2d881ae8, (q31_t)0x130f0280, (q31_t)0x2d90eec8,
-    (q31_t)0x1317f5c6, (q31_t)0x2d99c0e7, (q31_t)0x1320eac6, (q31_t)0x2da29144,
-    (q31_t)0x1329e181, (q31_t)0x2dab5fdf, (q31_t)0x1332d9f7, (q31_t)0x2db42cb6,
-    (q31_t)0x133bd427, (q31_t)0x2dbcf7cb, (q31_t)0x1344d011, (q31_t)0x2dc5c11c,
-    (q31_t)0x134dcdb4, (q31_t)0x2dce88aa, (q31_t)0x1356cd11, (q31_t)0x2dd74e73,
-    (q31_t)0x135fce26, (q31_t)0x2de01278, (q31_t)0x1368d0f3, (q31_t)0x2de8d4b8,
-    (q31_t)0x1371d579, (q31_t)0x2df19534, (q31_t)0x137adbb6, (q31_t)0x2dfa53e9,
-    (q31_t)0x1383e3ab, (q31_t)0x2e0310d9, (q31_t)0x138ced57, (q31_t)0x2e0bcc03,
-    (q31_t)0x1395f8ba, (q31_t)0x2e148566, (q31_t)0x139f05d3, (q31_t)0x2e1d3d03,
-    (q31_t)0x13a814a2, (q31_t)0x2e25f2d8, (q31_t)0x13b12526, (q31_t)0x2e2ea6e6,
-    (q31_t)0x13ba3760, (q31_t)0x2e37592c, (q31_t)0x13c34b4f, (q31_t)0x2e4009aa,
-    (q31_t)0x13cc60f2, (q31_t)0x2e48b860, (q31_t)0x13d5784a, (q31_t)0x2e51654c,
-    (q31_t)0x13de9156, (q31_t)0x2e5a1070, (q31_t)0x13e7ac15, (q31_t)0x2e62b9ca,
-    (q31_t)0x13f0c887, (q31_t)0x2e6b615a, (q31_t)0x13f9e6ad, (q31_t)0x2e740720,
-    (q31_t)0x14030684, (q31_t)0x2e7cab1c, (q31_t)0x140c280e, (q31_t)0x2e854d4d,
-    (q31_t)0x14154b4a, (q31_t)0x2e8dedb3, (q31_t)0x141e7037, (q31_t)0x2e968c4d,
-    (q31_t)0x142796d5, (q31_t)0x2e9f291b, (q31_t)0x1430bf24, (q31_t)0x2ea7c41e,
-    (q31_t)0x1439e923, (q31_t)0x2eb05d53, (q31_t)0x144314d3, (q31_t)0x2eb8f4bc,
-    (q31_t)0x144c4232, (q31_t)0x2ec18a58, (q31_t)0x14557140, (q31_t)0x2eca1e27,
-    (q31_t)0x145ea1fd, (q31_t)0x2ed2b027, (q31_t)0x1467d469, (q31_t)0x2edb405a,
-    (q31_t)0x14710883, (q31_t)0x2ee3cebe, (q31_t)0x147a3e4b, (q31_t)0x2eec5b53,
-    (q31_t)0x148375c1, (q31_t)0x2ef4e619, (q31_t)0x148caee4, (q31_t)0x2efd6f10,
-    (q31_t)0x1495e9b3, (q31_t)0x2f05f637, (q31_t)0x149f2630, (q31_t)0x2f0e7b8e,
-    (q31_t)0x14a86458, (q31_t)0x2f16ff14, (q31_t)0x14b1a42c, (q31_t)0x2f1f80ca,
-    (q31_t)0x14bae5ab, (q31_t)0x2f2800af, (q31_t)0x14c428d6, (q31_t)0x2f307ec2,
-    (q31_t)0x14cd6dab, (q31_t)0x2f38fb03, (q31_t)0x14d6b42b, (q31_t)0x2f417573,
-    (q31_t)0x14dffc54, (q31_t)0x2f49ee0f, (q31_t)0x14e94627, (q31_t)0x2f5264da,
-    (q31_t)0x14f291a4, (q31_t)0x2f5ad9d1, (q31_t)0x14fbdec9, (q31_t)0x2f634cf5,
-    (q31_t)0x15052d97, (q31_t)0x2f6bbe45, (q31_t)0x150e7e0d, (q31_t)0x2f742dc1,
-    (q31_t)0x1517d02b, (q31_t)0x2f7c9b69, (q31_t)0x152123f0, (q31_t)0x2f85073c,
-    (q31_t)0x152a795d, (q31_t)0x2f8d713a, (q31_t)0x1533d070, (q31_t)0x2f95d963,
-    (q31_t)0x153d292a, (q31_t)0x2f9e3fb6, (q31_t)0x15468389, (q31_t)0x2fa6a433,
-    (q31_t)0x154fdf8f, (q31_t)0x2faf06da, (q31_t)0x15593d3a, (q31_t)0x2fb767aa,
-    (q31_t)0x15629c89, (q31_t)0x2fbfc6a3, (q31_t)0x156bfd7d, (q31_t)0x2fc823c5,
-    (q31_t)0x15756016, (q31_t)0x2fd07f0f, (q31_t)0x157ec452, (q31_t)0x2fd8d882,
-    (q31_t)0x15882a32, (q31_t)0x2fe1301c, (q31_t)0x159191b5, (q31_t)0x2fe985de,
-    (q31_t)0x159afadb, (q31_t)0x2ff1d9c7, (q31_t)0x15a465a3, (q31_t)0x2ffa2bd6,
-    (q31_t)0x15add20d, (q31_t)0x30027c0c, (q31_t)0x15b74019, (q31_t)0x300aca69,
-    (q31_t)0x15c0afc6, (q31_t)0x301316eb, (q31_t)0x15ca2115, (q31_t)0x301b6193,
-    (q31_t)0x15d39403, (q31_t)0x3023aa5f, (q31_t)0x15dd0892, (q31_t)0x302bf151,
-    (q31_t)0x15e67ec1, (q31_t)0x30343667, (q31_t)0x15eff690, (q31_t)0x303c79a2,
-    (q31_t)0x15f96ffd, (q31_t)0x3044bb00, (q31_t)0x1602eb0a, (q31_t)0x304cfa83,
-    (q31_t)0x160c67b4, (q31_t)0x30553828, (q31_t)0x1615e5fd, (q31_t)0x305d73f0,
-    (q31_t)0x161f65e4, (q31_t)0x3065addb, (q31_t)0x1628e767, (q31_t)0x306de5e9,
-    (q31_t)0x16326a88, (q31_t)0x30761c18, (q31_t)0x163bef46, (q31_t)0x307e5069,
-    (q31_t)0x1645759f, (q31_t)0x308682dc, (q31_t)0x164efd94, (q31_t)0x308eb36f,
-    (q31_t)0x16588725, (q31_t)0x3096e223, (q31_t)0x16621251, (q31_t)0x309f0ef8,
-    (q31_t)0x166b9f18, (q31_t)0x30a739ed, (q31_t)0x16752d79, (q31_t)0x30af6302,
-    (q31_t)0x167ebd74, (q31_t)0x30b78a36, (q31_t)0x16884f09, (q31_t)0x30bfaf89,
-    (q31_t)0x1691e237, (q31_t)0x30c7d2fb, (q31_t)0x169b76fe, (q31_t)0x30cff48c,
-    (q31_t)0x16a50d5d, (q31_t)0x30d8143b, (q31_t)0x16aea555, (q31_t)0x30e03208,
-    (q31_t)0x16b83ee4, (q31_t)0x30e84df3, (q31_t)0x16c1da0b, (q31_t)0x30f067fb,
-    (q31_t)0x16cb76c9, (q31_t)0x30f8801f, (q31_t)0x16d5151d, (q31_t)0x31009661,
-    (q31_t)0x16deb508, (q31_t)0x3108aabf, (q31_t)0x16e85689, (q31_t)0x3110bd39,
-    (q31_t)0x16f1f99f, (q31_t)0x3118cdcf, (q31_t)0x16fb9e4b, (q31_t)0x3120dc80,
-    (q31_t)0x1705448b, (q31_t)0x3128e94c, (q31_t)0x170eec60, (q31_t)0x3130f433,
-    (q31_t)0x171895c9, (q31_t)0x3138fd35, (q31_t)0x172240c5, (q31_t)0x31410450,
-    (q31_t)0x172bed55, (q31_t)0x31490986, (q31_t)0x17359b78, (q31_t)0x31510cd5,
-    (q31_t)0x173f4b2e, (q31_t)0x31590e3e, (q31_t)0x1748fc75, (q31_t)0x31610dbf,
-    (q31_t)0x1752af4f, (q31_t)0x31690b59, (q31_t)0x175c63ba, (q31_t)0x3171070c,
-    (q31_t)0x176619b6, (q31_t)0x317900d6, (q31_t)0x176fd143, (q31_t)0x3180f8b8,
-    (q31_t)0x17798a60, (q31_t)0x3188eeb2, (q31_t)0x1783450d, (q31_t)0x3190e2c3,
-    (q31_t)0x178d014a, (q31_t)0x3198d4ea, (q31_t)0x1796bf16, (q31_t)0x31a0c528,
-    (q31_t)0x17a07e70, (q31_t)0x31a8b37c, (q31_t)0x17aa3f5a, (q31_t)0x31b09fe7,
-    (q31_t)0x17b401d1, (q31_t)0x31b88a66, (q31_t)0x17bdc5d6, (q31_t)0x31c072fb,
-    (q31_t)0x17c78b68, (q31_t)0x31c859a5, (q31_t)0x17d15288, (q31_t)0x31d03e64,
-    (q31_t)0x17db1b34, (q31_t)0x31d82137, (q31_t)0x17e4e56c, (q31_t)0x31e0021e,
-    (q31_t)0x17eeb130, (q31_t)0x31e7e118, (q31_t)0x17f87e7f, (q31_t)0x31efbe27,
-    (q31_t)0x18024d59, (q31_t)0x31f79948, (q31_t)0x180c1dbf, (q31_t)0x31ff727c,
-    (q31_t)0x1815efae, (q31_t)0x320749c3, (q31_t)0x181fc328, (q31_t)0x320f1f1c,
-    (q31_t)0x1829982b, (q31_t)0x3216f287, (q31_t)0x18336eb7, (q31_t)0x321ec403,
-    (q31_t)0x183d46cc, (q31_t)0x32269391, (q31_t)0x18472069, (q31_t)0x322e6130,
-    (q31_t)0x1850fb8e, (q31_t)0x32362ce0, (q31_t)0x185ad83c, (q31_t)0x323df6a0,
-    (q31_t)0x1864b670, (q31_t)0x3245be70, (q31_t)0x186e962b, (q31_t)0x324d8450,
-    (q31_t)0x1878776d, (q31_t)0x32554840, (q31_t)0x18825a35, (q31_t)0x325d0a3e,
-    (q31_t)0x188c3e83, (q31_t)0x3264ca4c, (q31_t)0x18962456, (q31_t)0x326c8868,
-    (q31_t)0x18a00bae, (q31_t)0x32744493, (q31_t)0x18a9f48a, (q31_t)0x327bfecc,
-    (q31_t)0x18b3deeb, (q31_t)0x3283b712, (q31_t)0x18bdcad0, (q31_t)0x328b6d66,
-    (q31_t)0x18c7b838, (q31_t)0x329321c7, (q31_t)0x18d1a724, (q31_t)0x329ad435,
-    (q31_t)0x18db9792, (q31_t)0x32a284b0, (q31_t)0x18e58982, (q31_t)0x32aa3336,
-    (q31_t)0x18ef7cf4, (q31_t)0x32b1dfc9, (q31_t)0x18f971e8, (q31_t)0x32b98a67,
-    (q31_t)0x1903685d, (q31_t)0x32c13311, (q31_t)0x190d6053, (q31_t)0x32c8d9c6,
-    (q31_t)0x191759c9, (q31_t)0x32d07e85, (q31_t)0x192154bf, (q31_t)0x32d82150,
-    (q31_t)0x192b5135, (q31_t)0x32dfc224, (q31_t)0x19354f2a, (q31_t)0x32e76102,
-    (q31_t)0x193f4e9e, (q31_t)0x32eefdea, (q31_t)0x19494f90, (q31_t)0x32f698db,
-    (q31_t)0x19535201, (q31_t)0x32fe31d5, (q31_t)0x195d55ef, (q31_t)0x3305c8d7,
-    (q31_t)0x19675b5a, (q31_t)0x330d5de3, (q31_t)0x19716243, (q31_t)0x3314f0f6,
-    (q31_t)0x197b6aa8, (q31_t)0x331c8211, (q31_t)0x19857489, (q31_t)0x33241134,
-    (q31_t)0x198f7fe6, (q31_t)0x332b9e5e, (q31_t)0x19998cbe, (q31_t)0x3333298f,
-    (q31_t)0x19a39b11, (q31_t)0x333ab2c6, (q31_t)0x19adaadf, (q31_t)0x33423a04,
-    (q31_t)0x19b7bc27, (q31_t)0x3349bf48, (q31_t)0x19c1cee9, (q31_t)0x33514292,
-    (q31_t)0x19cbe325, (q31_t)0x3358c3e2, (q31_t)0x19d5f8d9, (q31_t)0x33604336,
-    (q31_t)0x19e01006, (q31_t)0x3367c090, (q31_t)0x19ea28ac, (q31_t)0x336f3bee,
-    (q31_t)0x19f442c9, (q31_t)0x3376b551, (q31_t)0x19fe5e5e, (q31_t)0x337e2cb7,
-    (q31_t)0x1a087b69, (q31_t)0x3385a222, (q31_t)0x1a1299ec, (q31_t)0x338d1590,
-    (q31_t)0x1a1cb9e5, (q31_t)0x33948701, (q31_t)0x1a26db54, (q31_t)0x339bf675,
-    (q31_t)0x1a30fe38, (q31_t)0x33a363ec, (q31_t)0x1a3b2292, (q31_t)0x33aacf65,
-    (q31_t)0x1a454860, (q31_t)0x33b238e0, (q31_t)0x1a4f6fa3, (q31_t)0x33b9a05d,
-    (q31_t)0x1a599859, (q31_t)0x33c105db, (q31_t)0x1a63c284, (q31_t)0x33c8695b,
-    (q31_t)0x1a6dee21, (q31_t)0x33cfcadc, (q31_t)0x1a781b31, (q31_t)0x33d72a5d,
-    (q31_t)0x1a8249b4, (q31_t)0x33de87de, (q31_t)0x1a8c79a9, (q31_t)0x33e5e360,
-    (q31_t)0x1a96ab0f, (q31_t)0x33ed3ce1, (q31_t)0x1aa0dde7, (q31_t)0x33f49462,
-    (q31_t)0x1aab122f, (q31_t)0x33fbe9e2, (q31_t)0x1ab547e8, (q31_t)0x34033d61,
-    (q31_t)0x1abf7f11, (q31_t)0x340a8edf, (q31_t)0x1ac9b7a9, (q31_t)0x3411de5b,
-    (q31_t)0x1ad3f1b1, (q31_t)0x34192bd5, (q31_t)0x1ade2d28, (q31_t)0x3420774d,
-    (q31_t)0x1ae86a0d, (q31_t)0x3427c0c3, (q31_t)0x1af2a860, (q31_t)0x342f0836,
-    (q31_t)0x1afce821, (q31_t)0x34364da6, (q31_t)0x1b072950, (q31_t)0x343d9112,
-    (q31_t)0x1b116beb, (q31_t)0x3444d27b, (q31_t)0x1b1baff2, (q31_t)0x344c11e0,
-    (q31_t)0x1b25f566, (q31_t)0x34534f41, (q31_t)0x1b303c46, (q31_t)0x345a8a9d,
-    (q31_t)0x1b3a8491, (q31_t)0x3461c3f5, (q31_t)0x1b44ce46, (q31_t)0x3468fb47,
-    (q31_t)0x1b4f1967, (q31_t)0x34703095, (q31_t)0x1b5965f1, (q31_t)0x347763dd,
-    (q31_t)0x1b63b3e5, (q31_t)0x347e951f, (q31_t)0x1b6e0342, (q31_t)0x3485c45b,
-    (q31_t)0x1b785409, (q31_t)0x348cf190, (q31_t)0x1b82a638, (q31_t)0x34941cbf,
-    (q31_t)0x1b8cf9cf, (q31_t)0x349b45e7, (q31_t)0x1b974ece, (q31_t)0x34a26d08,
-    (q31_t)0x1ba1a534, (q31_t)0x34a99221, (q31_t)0x1babfd01, (q31_t)0x34b0b533,
-    (q31_t)0x1bb65634, (q31_t)0x34b7d63c, (q31_t)0x1bc0b0ce, (q31_t)0x34bef53d,
-    (q31_t)0x1bcb0cce, (q31_t)0x34c61236, (q31_t)0x1bd56a32, (q31_t)0x34cd2d26,
-    (q31_t)0x1bdfc8fc, (q31_t)0x34d4460c, (q31_t)0x1bea292b, (q31_t)0x34db5cea,
-    (q31_t)0x1bf48abd, (q31_t)0x34e271bd, (q31_t)0x1bfeedb3, (q31_t)0x34e98487,
-    (q31_t)0x1c09520d, (q31_t)0x34f09546, (q31_t)0x1c13b7c9, (q31_t)0x34f7a3fb,
-    (q31_t)0x1c1e1ee9, (q31_t)0x34feb0a5, (q31_t)0x1c28876a, (q31_t)0x3505bb44,
-    (q31_t)0x1c32f14d, (q31_t)0x350cc3d8, (q31_t)0x1c3d5c91, (q31_t)0x3513ca60,
-    (q31_t)0x1c47c936, (q31_t)0x351acedd, (q31_t)0x1c52373c, (q31_t)0x3521d14d,
-    (q31_t)0x1c5ca6a2, (q31_t)0x3528d1b1, (q31_t)0x1c671768, (q31_t)0x352fd008,
-    (q31_t)0x1c71898d, (q31_t)0x3536cc52, (q31_t)0x1c7bfd11, (q31_t)0x353dc68f,
-    (q31_t)0x1c8671f3, (q31_t)0x3544bebf, (q31_t)0x1c90e834, (q31_t)0x354bb4e1,
-    (q31_t)0x1c9b5fd2, (q31_t)0x3552a8f4, (q31_t)0x1ca5d8cd, (q31_t)0x35599afa,
-    (q31_t)0x1cb05326, (q31_t)0x35608af1, (q31_t)0x1cbacedb, (q31_t)0x356778d9,
-    (q31_t)0x1cc54bec, (q31_t)0x356e64b2, (q31_t)0x1ccfca59, (q31_t)0x35754e7c,
-    (q31_t)0x1cda4a21, (q31_t)0x357c3636, (q31_t)0x1ce4cb44, (q31_t)0x35831be0,
-    (q31_t)0x1cef4dc2, (q31_t)0x3589ff7a, (q31_t)0x1cf9d199, (q31_t)0x3590e104,
-    (q31_t)0x1d0456ca, (q31_t)0x3597c07d, (q31_t)0x1d0edd55, (q31_t)0x359e9de5,
-    (q31_t)0x1d196538, (q31_t)0x35a5793c, (q31_t)0x1d23ee74, (q31_t)0x35ac5282,
-    (q31_t)0x1d2e7908, (q31_t)0x35b329b5, (q31_t)0x1d3904f4, (q31_t)0x35b9fed7,
-    (q31_t)0x1d439236, (q31_t)0x35c0d1e7, (q31_t)0x1d4e20d0, (q31_t)0x35c7a2e3,
-    (q31_t)0x1d58b0c0, (q31_t)0x35ce71ce, (q31_t)0x1d634206, (q31_t)0x35d53ea5,
-    (q31_t)0x1d6dd4a2, (q31_t)0x35dc0968, (q31_t)0x1d786892, (q31_t)0x35e2d219,
-    (q31_t)0x1d82fdd8, (q31_t)0x35e998b5, (q31_t)0x1d8d9472, (q31_t)0x35f05d3d,
-    (q31_t)0x1d982c60, (q31_t)0x35f71fb1, (q31_t)0x1da2c5a2, (q31_t)0x35fde011,
-    (q31_t)0x1dad6036, (q31_t)0x36049e5b, (q31_t)0x1db7fc1e, (q31_t)0x360b5a90,
-    (q31_t)0x1dc29958, (q31_t)0x361214b0, (q31_t)0x1dcd37e4, (q31_t)0x3618ccba,
-    (q31_t)0x1dd7d7c1, (q31_t)0x361f82af, (q31_t)0x1de278ef, (q31_t)0x3626368d,
-    (q31_t)0x1ded1b6e, (q31_t)0x362ce855, (q31_t)0x1df7bf3e, (q31_t)0x36339806,
-    (q31_t)0x1e02645d, (q31_t)0x363a45a0, (q31_t)0x1e0d0acc, (q31_t)0x3640f123,
-    (q31_t)0x1e17b28a, (q31_t)0x36479a8e, (q31_t)0x1e225b96, (q31_t)0x364e41e2,
-    (q31_t)0x1e2d05f1, (q31_t)0x3654e71d, (q31_t)0x1e37b199, (q31_t)0x365b8a41,
-    (q31_t)0x1e425e8f, (q31_t)0x36622b4c, (q31_t)0x1e4d0cd2, (q31_t)0x3668ca3e,
-    (q31_t)0x1e57bc62, (q31_t)0x366f6717, (q31_t)0x1e626d3e, (q31_t)0x367601d7,
-    (q31_t)0x1e6d1f65, (q31_t)0x367c9a7e, (q31_t)0x1e77d2d8, (q31_t)0x3683310b,
-    (q31_t)0x1e828796, (q31_t)0x3689c57d, (q31_t)0x1e8d3d9e, (q31_t)0x369057d6,
-    (q31_t)0x1e97f4f1, (q31_t)0x3696e814, (q31_t)0x1ea2ad8d, (q31_t)0x369d7637,
-    (q31_t)0x1ead6773, (q31_t)0x36a4023f, (q31_t)0x1eb822a1, (q31_t)0x36aa8c2c,
-    (q31_t)0x1ec2df18, (q31_t)0x36b113fd, (q31_t)0x1ecd9cd7, (q31_t)0x36b799b3,
-    (q31_t)0x1ed85bdd, (q31_t)0x36be1d4c, (q31_t)0x1ee31c2b, (q31_t)0x36c49ec9,
-    (q31_t)0x1eedddc0, (q31_t)0x36cb1e2a, (q31_t)0x1ef8a09b, (q31_t)0x36d19b6e,
-    (q31_t)0x1f0364bc, (q31_t)0x36d81695, (q31_t)0x1f0e2a22, (q31_t)0x36de8f9e,
-    (q31_t)0x1f18f0ce, (q31_t)0x36e5068a, (q31_t)0x1f23b8be, (q31_t)0x36eb7b58,
-    (q31_t)0x1f2e81f3, (q31_t)0x36f1ee09, (q31_t)0x1f394c6b, (q31_t)0x36f85e9a,
-    (q31_t)0x1f441828, (q31_t)0x36fecd0e, (q31_t)0x1f4ee527, (q31_t)0x37053962,
-    (q31_t)0x1f59b369, (q31_t)0x370ba398, (q31_t)0x1f6482ed, (q31_t)0x37120bae,
-    (q31_t)0x1f6f53b3, (q31_t)0x371871a5, (q31_t)0x1f7a25ba, (q31_t)0x371ed57c,
-    (q31_t)0x1f84f902, (q31_t)0x37253733, (q31_t)0x1f8fcd8b, (q31_t)0x372b96ca,
-    (q31_t)0x1f9aa354, (q31_t)0x3731f440, (q31_t)0x1fa57a5d, (q31_t)0x37384f95,
-    (q31_t)0x1fb052a5, (q31_t)0x373ea8ca, (q31_t)0x1fbb2c2c, (q31_t)0x3744ffdd,
-    (q31_t)0x1fc606f1, (q31_t)0x374b54ce, (q31_t)0x1fd0e2f5, (q31_t)0x3751a79e,
-    (q31_t)0x1fdbc036, (q31_t)0x3757f84c, (q31_t)0x1fe69eb4, (q31_t)0x375e46d8,
-    (q31_t)0x1ff17e70, (q31_t)0x37649341, (q31_t)0x1ffc5f67, (q31_t)0x376add88,
-    (q31_t)0x2007419b, (q31_t)0x377125ac, (q31_t)0x2012250a, (q31_t)0x37776bac,
-    (q31_t)0x201d09b4, (q31_t)0x377daf89, (q31_t)0x2027ef99, (q31_t)0x3783f143,
-    (q31_t)0x2032d6b8, (q31_t)0x378a30d8, (q31_t)0x203dbf11, (q31_t)0x37906e49,
-    (q31_t)0x2048a8a4, (q31_t)0x3796a996, (q31_t)0x2053936f, (q31_t)0x379ce2be,
-    (q31_t)0x205e7f74, (q31_t)0x37a319c2, (q31_t)0x20696cb0, (q31_t)0x37a94ea0,
-    (q31_t)0x20745b24, (q31_t)0x37af8159, (q31_t)0x207f4acf, (q31_t)0x37b5b1ec,
-    (q31_t)0x208a3bb2, (q31_t)0x37bbe05a, (q31_t)0x20952dcb, (q31_t)0x37c20ca1,
-    (q31_t)0x20a0211a, (q31_t)0x37c836c2, (q31_t)0x20ab159e, (q31_t)0x37ce5ebd,
-    (q31_t)0x20b60b58, (q31_t)0x37d48490, (q31_t)0x20c10247, (q31_t)0x37daa83d,
-    (q31_t)0x20cbfa6a, (q31_t)0x37e0c9c3, (q31_t)0x20d6f3c1, (q31_t)0x37e6e921,
-    (q31_t)0x20e1ee4b, (q31_t)0x37ed0657, (q31_t)0x20ecea09, (q31_t)0x37f32165,
-    (q31_t)0x20f7e6f9, (q31_t)0x37f93a4b, (q31_t)0x2102e51c, (q31_t)0x37ff5109,
-    (q31_t)0x210de470, (q31_t)0x3805659e, (q31_t)0x2118e4f6, (q31_t)0x380b780a,
-    (q31_t)0x2123e6ad, (q31_t)0x3811884d, (q31_t)0x212ee995, (q31_t)0x38179666,
-    (q31_t)0x2139edac, (q31_t)0x381da256, (q31_t)0x2144f2f3, (q31_t)0x3823ac1d,
-    (q31_t)0x214ff96a, (q31_t)0x3829b3b9, (q31_t)0x215b0110, (q31_t)0x382fb92a,
-    (q31_t)0x216609e3, (q31_t)0x3835bc71, (q31_t)0x217113e5, (q31_t)0x383bbd8e,
-    (q31_t)0x217c1f15, (q31_t)0x3841bc7f, (q31_t)0x21872b72, (q31_t)0x3847b946,
-    (q31_t)0x219238fb, (q31_t)0x384db3e0, (q31_t)0x219d47b1, (q31_t)0x3853ac4f,
-    (q31_t)0x21a85793, (q31_t)0x3859a292, (q31_t)0x21b368a0, (q31_t)0x385f96a9,
-    (q31_t)0x21be7ad8, (q31_t)0x38658894, (q31_t)0x21c98e3b, (q31_t)0x386b7852,
-    (q31_t)0x21d4a2c8, (q31_t)0x387165e3, (q31_t)0x21dfb87f, (q31_t)0x38775147,
-    (q31_t)0x21eacf5f, (q31_t)0x387d3a7e, (q31_t)0x21f5e768, (q31_t)0x38832187,
-    (q31_t)0x22010099, (q31_t)0x38890663, (q31_t)0x220c1af3, (q31_t)0x388ee910,
-    (q31_t)0x22173674, (q31_t)0x3894c98f, (q31_t)0x2222531c, (q31_t)0x389aa7e0,
-    (q31_t)0x222d70eb, (q31_t)0x38a08402, (q31_t)0x22388fe1, (q31_t)0x38a65df6,
-    (q31_t)0x2243affc, (q31_t)0x38ac35ba, (q31_t)0x224ed13d, (q31_t)0x38b20b4f,
-    (q31_t)0x2259f3a3, (q31_t)0x38b7deb4, (q31_t)0x2265172e, (q31_t)0x38bdafea,
-    (q31_t)0x22703bdc, (q31_t)0x38c37eef, (q31_t)0x227b61af, (q31_t)0x38c94bc4,
-    (q31_t)0x228688a4, (q31_t)0x38cf1669, (q31_t)0x2291b0bd, (q31_t)0x38d4dedd,
-    (q31_t)0x229cd9f8, (q31_t)0x38daa520, (q31_t)0x22a80456, (q31_t)0x38e06932,
-    (q31_t)0x22b32fd4, (q31_t)0x38e62b13, (q31_t)0x22be5c74, (q31_t)0x38ebeac2,
-    (q31_t)0x22c98a35, (q31_t)0x38f1a840, (q31_t)0x22d4b916, (q31_t)0x38f7638b,
-    (q31_t)0x22dfe917, (q31_t)0x38fd1ca4, (q31_t)0x22eb1a37, (q31_t)0x3902d38b,
-    (q31_t)0x22f64c77, (q31_t)0x3908883f, (q31_t)0x23017fd5, (q31_t)0x390e3ac0,
-    (q31_t)0x230cb451, (q31_t)0x3913eb0e, (q31_t)0x2317e9eb, (q31_t)0x39199929,
-    (q31_t)0x232320a2, (q31_t)0x391f4510, (q31_t)0x232e5876, (q31_t)0x3924eec3,
-    (q31_t)0x23399167, (q31_t)0x392a9642, (q31_t)0x2344cb73, (q31_t)0x39303b8e,
-    (q31_t)0x2350069b, (q31_t)0x3935dea4, (q31_t)0x235b42df, (q31_t)0x393b7f86,
-    (q31_t)0x2366803c, (q31_t)0x39411e33, (q31_t)0x2371beb5, (q31_t)0x3946baac,
-    (q31_t)0x237cfe47, (q31_t)0x394c54ee, (q31_t)0x23883ef2, (q31_t)0x3951ecfc,
-    (q31_t)0x239380b6, (q31_t)0x395782d3, (q31_t)0x239ec393, (q31_t)0x395d1675,
-    (q31_t)0x23aa0788, (q31_t)0x3962a7e0, (q31_t)0x23b54c95, (q31_t)0x39683715,
-    (q31_t)0x23c092b9, (q31_t)0x396dc414, (q31_t)0x23cbd9f4, (q31_t)0x39734edc,
-    (q31_t)0x23d72245, (q31_t)0x3978d76c, (q31_t)0x23e26bac, (q31_t)0x397e5dc6,
-    (q31_t)0x23edb628, (q31_t)0x3983e1e8, (q31_t)0x23f901ba, (q31_t)0x398963d2,
-    (q31_t)0x24044e60, (q31_t)0x398ee385, (q31_t)0x240f9c1a, (q31_t)0x399460ff,
-    (q31_t)0x241aeae8, (q31_t)0x3999dc42, (q31_t)0x24263ac9, (q31_t)0x399f554b,
-    (q31_t)0x24318bbe, (q31_t)0x39a4cc1c, (q31_t)0x243cddc4, (q31_t)0x39aa40b4,
-    (q31_t)0x244830dd, (q31_t)0x39afb313, (q31_t)0x24538507, (q31_t)0x39b52339,
-    (q31_t)0x245eda43, (q31_t)0x39ba9125, (q31_t)0x246a308f, (q31_t)0x39bffcd7,
-    (q31_t)0x247587eb, (q31_t)0x39c5664f, (q31_t)0x2480e057, (q31_t)0x39cacd8d,
-    (q31_t)0x248c39d3, (q31_t)0x39d03291, (q31_t)0x2497945d, (q31_t)0x39d5955a,
-    (q31_t)0x24a2eff6, (q31_t)0x39daf5e8, (q31_t)0x24ae4c9d, (q31_t)0x39e0543c,
-    (q31_t)0x24b9aa52, (q31_t)0x39e5b054, (q31_t)0x24c50914, (q31_t)0x39eb0a31,
-    (q31_t)0x24d068e2, (q31_t)0x39f061d2, (q31_t)0x24dbc9bd, (q31_t)0x39f5b737,
-    (q31_t)0x24e72ba4, (q31_t)0x39fb0a60, (q31_t)0x24f28e96, (q31_t)0x3a005b4d,
-    (q31_t)0x24fdf294, (q31_t)0x3a05a9fd, (q31_t)0x2509579b, (q31_t)0x3a0af671,
-    (q31_t)0x2514bdad, (q31_t)0x3a1040a8, (q31_t)0x252024c9, (q31_t)0x3a1588a2,
-    (q31_t)0x252b8cee, (q31_t)0x3a1ace5f, (q31_t)0x2536f61b, (q31_t)0x3a2011de,
-    (q31_t)0x25426051, (q31_t)0x3a25531f, (q31_t)0x254dcb8f, (q31_t)0x3a2a9223,
-    (q31_t)0x255937d5, (q31_t)0x3a2fcee8, (q31_t)0x2564a521, (q31_t)0x3a350970,
-    (q31_t)0x25701374, (q31_t)0x3a3a41b9, (q31_t)0x257b82cd, (q31_t)0x3a3f77c3,
-    (q31_t)0x2586f32c, (q31_t)0x3a44ab8e, (q31_t)0x25926490, (q31_t)0x3a49dd1a,
-    (q31_t)0x259dd6f9, (q31_t)0x3a4f0c67, (q31_t)0x25a94a67, (q31_t)0x3a543974,
-    (q31_t)0x25b4bed8, (q31_t)0x3a596442, (q31_t)0x25c0344d, (q31_t)0x3a5e8cd0,
-    (q31_t)0x25cbaac5, (q31_t)0x3a63b31d, (q31_t)0x25d72240, (q31_t)0x3a68d72b,
-    (q31_t)0x25e29abc, (q31_t)0x3a6df8f8, (q31_t)0x25ee143b, (q31_t)0x3a731884,
-    (q31_t)0x25f98ebb, (q31_t)0x3a7835cf, (q31_t)0x26050a3b, (q31_t)0x3a7d50da,
-    (q31_t)0x261086bc, (q31_t)0x3a8269a3, (q31_t)0x261c043d, (q31_t)0x3a87802a,
-    (q31_t)0x262782be, (q31_t)0x3a8c9470, (q31_t)0x2633023e, (q31_t)0x3a91a674,
-    (q31_t)0x263e82bc, (q31_t)0x3a96b636, (q31_t)0x264a0438, (q31_t)0x3a9bc3b6,
-    (q31_t)0x265586b3, (q31_t)0x3aa0cef3, (q31_t)0x26610a2a, (q31_t)0x3aa5d7ee,
-    (q31_t)0x266c8e9f, (q31_t)0x3aaadea6, (q31_t)0x26781410, (q31_t)0x3aafe31b,
-    (q31_t)0x26839a7c, (q31_t)0x3ab4e54c, (q31_t)0x268f21e5, (q31_t)0x3ab9e53a,
-    (q31_t)0x269aaa48, (q31_t)0x3abee2e5, (q31_t)0x26a633a6, (q31_t)0x3ac3de4c,
-    (q31_t)0x26b1bdff, (q31_t)0x3ac8d76f, (q31_t)0x26bd4951, (q31_t)0x3acdce4d,
-    (q31_t)0x26c8d59c, (q31_t)0x3ad2c2e8, (q31_t)0x26d462e1, (q31_t)0x3ad7b53d,
-    (q31_t)0x26dff11d, (q31_t)0x3adca54e, (q31_t)0x26eb8052, (q31_t)0x3ae1931a,
-    (q31_t)0x26f7107e, (q31_t)0x3ae67ea1, (q31_t)0x2702a1a1, (q31_t)0x3aeb67e3,
-    (q31_t)0x270e33bb, (q31_t)0x3af04edf, (q31_t)0x2719c6cb, (q31_t)0x3af53395,
-    (q31_t)0x27255ad1, (q31_t)0x3afa1605, (q31_t)0x2730efcc, (q31_t)0x3afef630,
-    (q31_t)0x273c85bc, (q31_t)0x3b03d414, (q31_t)0x27481ca1, (q31_t)0x3b08afb2,
-    (q31_t)0x2753b479, (q31_t)0x3b0d8909, (q31_t)0x275f4d45, (q31_t)0x3b126019,
-    (q31_t)0x276ae704, (q31_t)0x3b1734e2, (q31_t)0x277681b6, (q31_t)0x3b1c0764,
-    (q31_t)0x27821d59, (q31_t)0x3b20d79e, (q31_t)0x278db9ef, (q31_t)0x3b25a591,
-    (q31_t)0x27995776, (q31_t)0x3b2a713d, (q31_t)0x27a4f5ed, (q31_t)0x3b2f3aa0,
-    (q31_t)0x27b09555, (q31_t)0x3b3401bb, (q31_t)0x27bc35ad, (q31_t)0x3b38c68e,
-    (q31_t)0x27c7d6f4, (q31_t)0x3b3d8918, (q31_t)0x27d3792b, (q31_t)0x3b42495a,
-    (q31_t)0x27df1c50, (q31_t)0x3b470753, (q31_t)0x27eac063, (q31_t)0x3b4bc303,
-    (q31_t)0x27f66564, (q31_t)0x3b507c69, (q31_t)0x28020b52, (q31_t)0x3b553386,
-    (q31_t)0x280db22d, (q31_t)0x3b59e85a, (q31_t)0x281959f4, (q31_t)0x3b5e9ae4,
-    (q31_t)0x282502a7, (q31_t)0x3b634b23, (q31_t)0x2830ac45, (q31_t)0x3b67f919,
-    (q31_t)0x283c56cf, (q31_t)0x3b6ca4c4, (q31_t)0x28480243, (q31_t)0x3b714e25,
-    (q31_t)0x2853aea1, (q31_t)0x3b75f53c, (q31_t)0x285f5be9, (q31_t)0x3b7a9a07,
-    (q31_t)0x286b0a1a, (q31_t)0x3b7f3c87, (q31_t)0x2876b934, (q31_t)0x3b83dcbc,
-    (q31_t)0x28826936, (q31_t)0x3b887aa6, (q31_t)0x288e1a20, (q31_t)0x3b8d1644,
-    (q31_t)0x2899cbf1, (q31_t)0x3b91af97, (q31_t)0x28a57ea9, (q31_t)0x3b96469d,
-    (q31_t)0x28b13248, (q31_t)0x3b9adb57, (q31_t)0x28bce6cd, (q31_t)0x3b9f6dc5,
-    (q31_t)0x28c89c37, (q31_t)0x3ba3fde7, (q31_t)0x28d45286, (q31_t)0x3ba88bbc,
-    (q31_t)0x28e009ba, (q31_t)0x3bad1744, (q31_t)0x28ebc1d3, (q31_t)0x3bb1a080,
-    (q31_t)0x28f77acf, (q31_t)0x3bb6276e, (q31_t)0x290334af, (q31_t)0x3bbaac0e,
-    (q31_t)0x290eef71, (q31_t)0x3bbf2e62, (q31_t)0x291aab16, (q31_t)0x3bc3ae67,
-    (q31_t)0x2926679c, (q31_t)0x3bc82c1f, (q31_t)0x29322505, (q31_t)0x3bcca789,
-    (q31_t)0x293de34e, (q31_t)0x3bd120a4, (q31_t)0x2949a278, (q31_t)0x3bd59771,
-    (q31_t)0x29556282, (q31_t)0x3bda0bf0, (q31_t)0x2961236c, (q31_t)0x3bde7e20,
-    (q31_t)0x296ce535, (q31_t)0x3be2ee01, (q31_t)0x2978a7dd, (q31_t)0x3be75b93,
-    (q31_t)0x29846b63, (q31_t)0x3bebc6d5, (q31_t)0x29902fc7, (q31_t)0x3bf02fc9,
-    (q31_t)0x299bf509, (q31_t)0x3bf4966c, (q31_t)0x29a7bb28, (q31_t)0x3bf8fac0,
-    (q31_t)0x29b38223, (q31_t)0x3bfd5cc4, (q31_t)0x29bf49fa, (q31_t)0x3c01bc78,
-    (q31_t)0x29cb12ad, (q31_t)0x3c0619dc, (q31_t)0x29d6dc3b, (q31_t)0x3c0a74f0,
-    (q31_t)0x29e2a6a3, (q31_t)0x3c0ecdb2, (q31_t)0x29ee71e6, (q31_t)0x3c132424,
-    (q31_t)0x29fa3e03, (q31_t)0x3c177845, (q31_t)0x2a060af9, (q31_t)0x3c1bca16,
-    (q31_t)0x2a11d8c8, (q31_t)0x3c201994, (q31_t)0x2a1da770, (q31_t)0x3c2466c2,
-    (q31_t)0x2a2976ef, (q31_t)0x3c28b19e, (q31_t)0x2a354746, (q31_t)0x3c2cfa28,
-    (q31_t)0x2a411874, (q31_t)0x3c314060, (q31_t)0x2a4cea79, (q31_t)0x3c358446,
-    (q31_t)0x2a58bd54, (q31_t)0x3c39c5da, (q31_t)0x2a649105, (q31_t)0x3c3e051b,
-    (q31_t)0x2a70658a, (q31_t)0x3c42420a, (q31_t)0x2a7c3ae5, (q31_t)0x3c467ca6,
-    (q31_t)0x2a881114, (q31_t)0x3c4ab4ef, (q31_t)0x2a93e817, (q31_t)0x3c4eeae5,
-    (q31_t)0x2a9fbfed, (q31_t)0x3c531e88, (q31_t)0x2aab9896, (q31_t)0x3c574fd8,
-    (q31_t)0x2ab77212, (q31_t)0x3c5b7ed4, (q31_t)0x2ac34c60, (q31_t)0x3c5fab7c,
-    (q31_t)0x2acf277f, (q31_t)0x3c63d5d1, (q31_t)0x2adb0370, (q31_t)0x3c67fdd1,
-    (q31_t)0x2ae6e031, (q31_t)0x3c6c237e, (q31_t)0x2af2bdc3, (q31_t)0x3c7046d6,
-    (q31_t)0x2afe9c24, (q31_t)0x3c7467d9, (q31_t)0x2b0a7b54, (q31_t)0x3c788688,
-    (q31_t)0x2b165b54, (q31_t)0x3c7ca2e2, (q31_t)0x2b223c22, (q31_t)0x3c80bce7,
-    (q31_t)0x2b2e1dbe, (q31_t)0x3c84d496, (q31_t)0x2b3a0027, (q31_t)0x3c88e9f1,
-    (q31_t)0x2b45e35d, (q31_t)0x3c8cfcf6, (q31_t)0x2b51c760, (q31_t)0x3c910da5,
-    (q31_t)0x2b5dac2f, (q31_t)0x3c951bff, (q31_t)0x2b6991ca, (q31_t)0x3c992803,
-    (q31_t)0x2b75782f, (q31_t)0x3c9d31b0, (q31_t)0x2b815f60, (q31_t)0x3ca13908,
-    (q31_t)0x2b8d475b, (q31_t)0x3ca53e09, (q31_t)0x2b99301f, (q31_t)0x3ca940b3,
-    (q31_t)0x2ba519ad, (q31_t)0x3cad4107, (q31_t)0x2bb10404, (q31_t)0x3cb13f04,
-    (q31_t)0x2bbcef23, (q31_t)0x3cb53aaa, (q31_t)0x2bc8db0b, (q31_t)0x3cb933f9,
-    (q31_t)0x2bd4c7ba, (q31_t)0x3cbd2af0, (q31_t)0x2be0b52f, (q31_t)0x3cc11f90,
-    (q31_t)0x2beca36c, (q31_t)0x3cc511d9, (q31_t)0x2bf8926f, (q31_t)0x3cc901c9,
-    (q31_t)0x2c048237, (q31_t)0x3cccef62, (q31_t)0x2c1072c4, (q31_t)0x3cd0daa2,
-    (q31_t)0x2c1c6417, (q31_t)0x3cd4c38b, (q31_t)0x2c28562d, (q31_t)0x3cd8aa1b,
-    (q31_t)0x2c344908, (q31_t)0x3cdc8e52, (q31_t)0x2c403ca5, (q31_t)0x3ce07031,
-    (q31_t)0x2c4c3106, (q31_t)0x3ce44fb7, (q31_t)0x2c582629, (q31_t)0x3ce82ce4,
-    (q31_t)0x2c641c0e, (q31_t)0x3cec07b8, (q31_t)0x2c7012b5, (q31_t)0x3cefe032,
-    (q31_t)0x2c7c0a1d, (q31_t)0x3cf3b653, (q31_t)0x2c880245, (q31_t)0x3cf78a1b,
-    (q31_t)0x2c93fb2e, (q31_t)0x3cfb5b89, (q31_t)0x2c9ff4d6, (q31_t)0x3cff2a9d,
-    (q31_t)0x2cabef3d, (q31_t)0x3d02f757, (q31_t)0x2cb7ea63, (q31_t)0x3d06c1b6,
-    (q31_t)0x2cc3e648, (q31_t)0x3d0a89bc, (q31_t)0x2ccfe2ea, (q31_t)0x3d0e4f67,
-    (q31_t)0x2cdbe04a, (q31_t)0x3d1212b7, (q31_t)0x2ce7de66, (q31_t)0x3d15d3ad,
-    (q31_t)0x2cf3dd3f, (q31_t)0x3d199248, (q31_t)0x2cffdcd4, (q31_t)0x3d1d4e88,
-    (q31_t)0x2d0bdd25, (q31_t)0x3d21086c, (q31_t)0x2d17de31, (q31_t)0x3d24bff6,
-    (q31_t)0x2d23dff7, (q31_t)0x3d287523, (q31_t)0x2d2fe277, (q31_t)0x3d2c27f6,
-    (q31_t)0x2d3be5b1, (q31_t)0x3d2fd86c, (q31_t)0x2d47e9a5, (q31_t)0x3d338687,
-    (q31_t)0x2d53ee51, (q31_t)0x3d373245, (q31_t)0x2d5ff3b5, (q31_t)0x3d3adba7,
-    (q31_t)0x2d6bf9d1, (q31_t)0x3d3e82ae, (q31_t)0x2d7800a5, (q31_t)0x3d422757,
-    (q31_t)0x2d84082f, (q31_t)0x3d45c9a4, (q31_t)0x2d901070, (q31_t)0x3d496994,
-    (q31_t)0x2d9c1967, (q31_t)0x3d4d0728, (q31_t)0x2da82313, (q31_t)0x3d50a25e,
-    (q31_t)0x2db42d74, (q31_t)0x3d543b37, (q31_t)0x2dc0388a, (q31_t)0x3d57d1b3,
-    (q31_t)0x2dcc4454, (q31_t)0x3d5b65d2, (q31_t)0x2dd850d2, (q31_t)0x3d5ef793,
-    (q31_t)0x2de45e03, (q31_t)0x3d6286f6, (q31_t)0x2df06be6, (q31_t)0x3d6613fb,
-    (q31_t)0x2dfc7a7c, (q31_t)0x3d699ea3, (q31_t)0x2e0889c4, (q31_t)0x3d6d26ec,
-    (q31_t)0x2e1499bd, (q31_t)0x3d70acd7, (q31_t)0x2e20aa67, (q31_t)0x3d743064,
-    (q31_t)0x2e2cbbc1, (q31_t)0x3d77b192, (q31_t)0x2e38cdcb, (q31_t)0x3d7b3061,
-    (q31_t)0x2e44e084, (q31_t)0x3d7eacd2, (q31_t)0x2e50f3ed, (q31_t)0x3d8226e4,
-    (q31_t)0x2e5d0804, (q31_t)0x3d859e96, (q31_t)0x2e691cc9, (q31_t)0x3d8913ea,
-    (q31_t)0x2e75323c, (q31_t)0x3d8c86de, (q31_t)0x2e81485c, (q31_t)0x3d8ff772,
-    (q31_t)0x2e8d5f29, (q31_t)0x3d9365a8, (q31_t)0x2e9976a1, (q31_t)0x3d96d17d,
-    (q31_t)0x2ea58ec6, (q31_t)0x3d9a3af2, (q31_t)0x2eb1a796, (q31_t)0x3d9da208,
-    (q31_t)0x2ebdc110, (q31_t)0x3da106bd, (q31_t)0x2ec9db35, (q31_t)0x3da46912,
-    (q31_t)0x2ed5f604, (q31_t)0x3da7c907, (q31_t)0x2ee2117c, (q31_t)0x3dab269b,
-    (q31_t)0x2eee2d9d, (q31_t)0x3dae81cf, (q31_t)0x2efa4a67, (q31_t)0x3db1daa2,
-    (q31_t)0x2f0667d9, (q31_t)0x3db53113, (q31_t)0x2f1285f2, (q31_t)0x3db88524,
-    (q31_t)0x2f1ea4b2, (q31_t)0x3dbbd6d4, (q31_t)0x2f2ac419, (q31_t)0x3dbf2622,
-    (q31_t)0x2f36e426, (q31_t)0x3dc2730f, (q31_t)0x2f4304d8, (q31_t)0x3dc5bd9b,
-    (q31_t)0x2f4f2630, (q31_t)0x3dc905c5, (q31_t)0x2f5b482d, (q31_t)0x3dcc4b8d,
-    (q31_t)0x2f676ace, (q31_t)0x3dcf8ef3, (q31_t)0x2f738e12, (q31_t)0x3dd2cff7,
-    (q31_t)0x2f7fb1fa, (q31_t)0x3dd60e99, (q31_t)0x2f8bd685, (q31_t)0x3dd94ad8,
-    (q31_t)0x2f97fbb2, (q31_t)0x3ddc84b5, (q31_t)0x2fa42181, (q31_t)0x3ddfbc30,
-    (q31_t)0x2fb047f2, (q31_t)0x3de2f148, (q31_t)0x2fbc6f03, (q31_t)0x3de623fd,
-    (q31_t)0x2fc896b5, (q31_t)0x3de9544f, (q31_t)0x2fd4bf08, (q31_t)0x3dec823e,
-    (q31_t)0x2fe0e7f9, (q31_t)0x3defadca, (q31_t)0x2fed118a, (q31_t)0x3df2d6f3,
-    (q31_t)0x2ff93bba, (q31_t)0x3df5fdb8, (q31_t)0x30056687, (q31_t)0x3df9221a,
-    (q31_t)0x301191f3, (q31_t)0x3dfc4418, (q31_t)0x301dbdfb, (q31_t)0x3dff63b2,
-    (q31_t)0x3029eaa1, (q31_t)0x3e0280e9, (q31_t)0x303617e2, (q31_t)0x3e059bbb,
-    (q31_t)0x304245c0, (q31_t)0x3e08b42a, (q31_t)0x304e7438, (q31_t)0x3e0bca34,
-    (q31_t)0x305aa34c, (q31_t)0x3e0eddd9, (q31_t)0x3066d2fa, (q31_t)0x3e11ef1b,
-    (q31_t)0x30730342, (q31_t)0x3e14fdf7, (q31_t)0x307f3424, (q31_t)0x3e180a6f,
-    (q31_t)0x308b659f, (q31_t)0x3e1b1482, (q31_t)0x309797b2, (q31_t)0x3e1e1c30,
-    (q31_t)0x30a3ca5d, (q31_t)0x3e212179, (q31_t)0x30affda0, (q31_t)0x3e24245d,
-    (q31_t)0x30bc317a, (q31_t)0x3e2724db, (q31_t)0x30c865ea, (q31_t)0x3e2a22f4,
-    (q31_t)0x30d49af1, (q31_t)0x3e2d1ea8, (q31_t)0x30e0d08d, (q31_t)0x3e3017f6,
-    (q31_t)0x30ed06bf, (q31_t)0x3e330ede, (q31_t)0x30f93d86, (q31_t)0x3e360360,
-    (q31_t)0x310574e0, (q31_t)0x3e38f57c, (q31_t)0x3111accf, (q31_t)0x3e3be532,
-    (q31_t)0x311de551, (q31_t)0x3e3ed282, (q31_t)0x312a1e66, (q31_t)0x3e41bd6c,
-    (q31_t)0x3136580d, (q31_t)0x3e44a5ef, (q31_t)0x31429247, (q31_t)0x3e478c0b,
-    (q31_t)0x314ecd11, (q31_t)0x3e4a6fc1, (q31_t)0x315b086d, (q31_t)0x3e4d5110,
-    (q31_t)0x31674459, (q31_t)0x3e502ff9, (q31_t)0x317380d6, (q31_t)0x3e530c7a,
-    (q31_t)0x317fbde2, (q31_t)0x3e55e694, (q31_t)0x318bfb7d, (q31_t)0x3e58be47,
-    (q31_t)0x319839a6, (q31_t)0x3e5b9392, (q31_t)0x31a4785e, (q31_t)0x3e5e6676,
-    (q31_t)0x31b0b7a4, (q31_t)0x3e6136f3, (q31_t)0x31bcf777, (q31_t)0x3e640507,
-    (q31_t)0x31c937d6, (q31_t)0x3e66d0b4, (q31_t)0x31d578c2, (q31_t)0x3e6999fa,
-    (q31_t)0x31e1ba3a, (q31_t)0x3e6c60d7, (q31_t)0x31edfc3d, (q31_t)0x3e6f254c,
-    (q31_t)0x31fa3ecb, (q31_t)0x3e71e759, (q31_t)0x320681e3, (q31_t)0x3e74a6fd,
-    (q31_t)0x3212c585, (q31_t)0x3e77643a, (q31_t)0x321f09b1, (q31_t)0x3e7a1f0d,
-    (q31_t)0x322b4e66, (q31_t)0x3e7cd778, (q31_t)0x323793a3, (q31_t)0x3e7f8d7b,
-    (q31_t)0x3243d968, (q31_t)0x3e824114, (q31_t)0x32501fb5, (q31_t)0x3e84f245,
-    (q31_t)0x325c6688, (q31_t)0x3e87a10c, (q31_t)0x3268ade3, (q31_t)0x3e8a4d6a,
-    (q31_t)0x3274f5c3, (q31_t)0x3e8cf75f, (q31_t)0x32813e2a, (q31_t)0x3e8f9eeb,
-    (q31_t)0x328d8715, (q31_t)0x3e92440d, (q31_t)0x3299d085, (q31_t)0x3e94e6c6,
-    (q31_t)0x32a61a7a, (q31_t)0x3e978715, (q31_t)0x32b264f2, (q31_t)0x3e9a24fb,
-    (q31_t)0x32beafed, (q31_t)0x3e9cc076, (q31_t)0x32cafb6b, (q31_t)0x3e9f5988,
-    (q31_t)0x32d7476c, (q31_t)0x3ea1f02f, (q31_t)0x32e393ef, (q31_t)0x3ea4846c,
-    (q31_t)0x32efe0f2, (q31_t)0x3ea7163f, (q31_t)0x32fc2e77, (q31_t)0x3ea9a5a8,
-    (q31_t)0x33087c7d, (q31_t)0x3eac32a6, (q31_t)0x3314cb02, (q31_t)0x3eaebd3a,
-    (q31_t)0x33211a07, (q31_t)0x3eb14563, (q31_t)0x332d698a, (q31_t)0x3eb3cb21,
-    (q31_t)0x3339b98d, (q31_t)0x3eb64e75, (q31_t)0x33460a0d, (q31_t)0x3eb8cf5d,
-    (q31_t)0x33525b0b, (q31_t)0x3ebb4ddb, (q31_t)0x335eac86, (q31_t)0x3ebdc9ed,
-    (q31_t)0x336afe7e, (q31_t)0x3ec04394, (q31_t)0x337750f2, (q31_t)0x3ec2bad0,
-    (q31_t)0x3383a3e2, (q31_t)0x3ec52fa0, (q31_t)0x338ff74d, (q31_t)0x3ec7a205,
-    (q31_t)0x339c4b32, (q31_t)0x3eca11fe, (q31_t)0x33a89f92, (q31_t)0x3ecc7f8b,
-    (q31_t)0x33b4f46c, (q31_t)0x3eceeaad, (q31_t)0x33c149bf, (q31_t)0x3ed15363,
-    (q31_t)0x33cd9f8b, (q31_t)0x3ed3b9ad, (q31_t)0x33d9f5cf, (q31_t)0x3ed61d8a,
-    (q31_t)0x33e64c8c, (q31_t)0x3ed87efc, (q31_t)0x33f2a3bf, (q31_t)0x3edade01,
-    (q31_t)0x33fefb6a, (q31_t)0x3edd3a9a, (q31_t)0x340b538b, (q31_t)0x3edf94c7,
-    (q31_t)0x3417ac22, (q31_t)0x3ee1ec87, (q31_t)0x3424052f, (q31_t)0x3ee441da,
-    (q31_t)0x34305eb0, (q31_t)0x3ee694c1, (q31_t)0x343cb8a7, (q31_t)0x3ee8e53a,
-    (q31_t)0x34491311, (q31_t)0x3eeb3347, (q31_t)0x34556def, (q31_t)0x3eed7ee7,
-    (q31_t)0x3461c940, (q31_t)0x3eefc81a, (q31_t)0x346e2504, (q31_t)0x3ef20ee0,
-    (q31_t)0x347a8139, (q31_t)0x3ef45338, (q31_t)0x3486dde1, (q31_t)0x3ef69523,
-    (q31_t)0x34933afa, (q31_t)0x3ef8d4a1, (q31_t)0x349f9884, (q31_t)0x3efb11b1,
-    (q31_t)0x34abf67e, (q31_t)0x3efd4c54, (q31_t)0x34b854e7, (q31_t)0x3eff8489,
-    (q31_t)0x34c4b3c0, (q31_t)0x3f01ba50, (q31_t)0x34d11308, (q31_t)0x3f03eda9,
-    (q31_t)0x34dd72be, (q31_t)0x3f061e95, (q31_t)0x34e9d2e3, (q31_t)0x3f084d12,
-    (q31_t)0x34f63374, (q31_t)0x3f0a7921, (q31_t)0x35029473, (q31_t)0x3f0ca2c2,
-    (q31_t)0x350ef5de, (q31_t)0x3f0ec9f5, (q31_t)0x351b57b5, (q31_t)0x3f10eeb9,
-    (q31_t)0x3527b9f7, (q31_t)0x3f13110f, (q31_t)0x35341ca5, (q31_t)0x3f1530f7,
-    (q31_t)0x35407fbd, (q31_t)0x3f174e70, (q31_t)0x354ce33f, (q31_t)0x3f19697a,
-    (q31_t)0x3559472b, (q31_t)0x3f1b8215, (q31_t)0x3565ab80, (q31_t)0x3f1d9842,
-    (q31_t)0x3572103d, (q31_t)0x3f1fabff, (q31_t)0x357e7563, (q31_t)0x3f21bd4e,
-    (q31_t)0x358adaf0, (q31_t)0x3f23cc2e, (q31_t)0x359740e5, (q31_t)0x3f25d89e,
-    (q31_t)0x35a3a740, (q31_t)0x3f27e29f, (q31_t)0x35b00e02, (q31_t)0x3f29ea31,
-    (q31_t)0x35bc7529, (q31_t)0x3f2bef53, (q31_t)0x35c8dcb6, (q31_t)0x3f2df206,
-    (q31_t)0x35d544a7, (q31_t)0x3f2ff24a, (q31_t)0x35e1acfd, (q31_t)0x3f31f01d,
-    (q31_t)0x35ee15b7, (q31_t)0x3f33eb81, (q31_t)0x35fa7ed4, (q31_t)0x3f35e476,
-    (q31_t)0x3606e854, (q31_t)0x3f37dafa, (q31_t)0x36135237, (q31_t)0x3f39cf0e,
-    (q31_t)0x361fbc7b, (q31_t)0x3f3bc0b3, (q31_t)0x362c2721, (q31_t)0x3f3dafe7,
-    (q31_t)0x36389228, (q31_t)0x3f3f9cab, (q31_t)0x3644fd8f, (q31_t)0x3f4186ff,
-    (q31_t)0x36516956, (q31_t)0x3f436ee3, (q31_t)0x365dd57d, (q31_t)0x3f455456,
-    (q31_t)0x366a4203, (q31_t)0x3f473759, (q31_t)0x3676aee8, (q31_t)0x3f4917eb,
-    (q31_t)0x36831c2b, (q31_t)0x3f4af60d, (q31_t)0x368f89cb, (q31_t)0x3f4cd1be,
-    (q31_t)0x369bf7c9, (q31_t)0x3f4eaafe, (q31_t)0x36a86623, (q31_t)0x3f5081cd,
-    (q31_t)0x36b4d4d9, (q31_t)0x3f52562c, (q31_t)0x36c143ec, (q31_t)0x3f54281a,
-    (q31_t)0x36cdb359, (q31_t)0x3f55f796, (q31_t)0x36da2321, (q31_t)0x3f57c4a2,
-    (q31_t)0x36e69344, (q31_t)0x3f598f3c, (q31_t)0x36f303c0, (q31_t)0x3f5b5765,
-    (q31_t)0x36ff7496, (q31_t)0x3f5d1d1d, (q31_t)0x370be5c4, (q31_t)0x3f5ee063,
-    (q31_t)0x3718574b, (q31_t)0x3f60a138, (q31_t)0x3724c92a, (q31_t)0x3f625f9b,
-    (q31_t)0x37313b60, (q31_t)0x3f641b8d, (q31_t)0x373daded, (q31_t)0x3f65d50d,
-    (q31_t)0x374a20d0, (q31_t)0x3f678c1c, (q31_t)0x3756940a, (q31_t)0x3f6940b8,
-    (q31_t)0x37630799, (q31_t)0x3f6af2e3, (q31_t)0x376f7b7d, (q31_t)0x3f6ca29c,
-    (q31_t)0x377befb5, (q31_t)0x3f6e4fe3, (q31_t)0x37886442, (q31_t)0x3f6ffab8,
-    (q31_t)0x3794d922, (q31_t)0x3f71a31b, (q31_t)0x37a14e55, (q31_t)0x3f73490b,
-    (q31_t)0x37adc3db, (q31_t)0x3f74ec8a, (q31_t)0x37ba39b3, (q31_t)0x3f768d96,
-    (q31_t)0x37c6afdc, (q31_t)0x3f782c30, (q31_t)0x37d32657, (q31_t)0x3f79c857,
-    (q31_t)0x37df9d22, (q31_t)0x3f7b620c, (q31_t)0x37ec143e, (q31_t)0x3f7cf94e,
-    (q31_t)0x37f88ba9, (q31_t)0x3f7e8e1e, (q31_t)0x38050364, (q31_t)0x3f80207b,
-    (q31_t)0x38117b6d, (q31_t)0x3f81b065, (q31_t)0x381df3c5, (q31_t)0x3f833ddd,
-    (q31_t)0x382a6c6a, (q31_t)0x3f84c8e2, (q31_t)0x3836e55d, (q31_t)0x3f865174,
-    (q31_t)0x38435e9d, (q31_t)0x3f87d792, (q31_t)0x384fd829, (q31_t)0x3f895b3e,
-    (q31_t)0x385c5201, (q31_t)0x3f8adc77, (q31_t)0x3868cc24, (q31_t)0x3f8c5b3d,
-    (q31_t)0x38754692, (q31_t)0x3f8dd78f, (q31_t)0x3881c14b, (q31_t)0x3f8f516e,
-    (q31_t)0x388e3c4d, (q31_t)0x3f90c8da, (q31_t)0x389ab799, (q31_t)0x3f923dd2,
-    (q31_t)0x38a7332e, (q31_t)0x3f93b058, (q31_t)0x38b3af0c, (q31_t)0x3f952069,
-    (q31_t)0x38c02b31, (q31_t)0x3f968e07, (q31_t)0x38cca79e, (q31_t)0x3f97f932,
-    (q31_t)0x38d92452, (q31_t)0x3f9961e8, (q31_t)0x38e5a14d, (q31_t)0x3f9ac82c,
-    (q31_t)0x38f21e8e, (q31_t)0x3f9c2bfb, (q31_t)0x38fe9c15, (q31_t)0x3f9d8d56,
-    (q31_t)0x390b19e0, (q31_t)0x3f9eec3e, (q31_t)0x391797f0, (q31_t)0x3fa048b2,
-    (q31_t)0x39241645, (q31_t)0x3fa1a2b2, (q31_t)0x393094dd, (q31_t)0x3fa2fa3d,
-    (q31_t)0x393d13b8, (q31_t)0x3fa44f55, (q31_t)0x394992d7, (q31_t)0x3fa5a1f9,
-    (q31_t)0x39561237, (q31_t)0x3fa6f228, (q31_t)0x396291d9, (q31_t)0x3fa83fe3,
-    (q31_t)0x396f11bc, (q31_t)0x3fa98b2a, (q31_t)0x397b91e1, (q31_t)0x3faad3fd,
-    (q31_t)0x39881245, (q31_t)0x3fac1a5b, (q31_t)0x399492ea, (q31_t)0x3fad5e45,
-    (q31_t)0x39a113cd, (q31_t)0x3fae9fbb, (q31_t)0x39ad94f0, (q31_t)0x3fafdebb,
-    (q31_t)0x39ba1651, (q31_t)0x3fb11b48, (q31_t)0x39c697f0, (q31_t)0x3fb2555f,
-    (q31_t)0x39d319cc, (q31_t)0x3fb38d02, (q31_t)0x39df9be6, (q31_t)0x3fb4c231,
-    (q31_t)0x39ec1e3b, (q31_t)0x3fb5f4ea, (q31_t)0x39f8a0cd, (q31_t)0x3fb7252f,
-    (q31_t)0x3a05239a, (q31_t)0x3fb852ff, (q31_t)0x3a11a6a3, (q31_t)0x3fb97e5a,
-    (q31_t)0x3a1e29e5, (q31_t)0x3fbaa740, (q31_t)0x3a2aad62, (q31_t)0x3fbbcdb1,
-    (q31_t)0x3a373119, (q31_t)0x3fbcf1ad, (q31_t)0x3a43b508, (q31_t)0x3fbe1334,
-    (q31_t)0x3a503930, (q31_t)0x3fbf3246, (q31_t)0x3a5cbd91, (q31_t)0x3fc04ee3,
-    (q31_t)0x3a694229, (q31_t)0x3fc1690a, (q31_t)0x3a75c6f8, (q31_t)0x3fc280bc,
-    (q31_t)0x3a824bfd, (q31_t)0x3fc395f9, (q31_t)0x3a8ed139, (q31_t)0x3fc4a8c1,
-    (q31_t)0x3a9b56ab, (q31_t)0x3fc5b913, (q31_t)0x3aa7dc52, (q31_t)0x3fc6c6f0,
-    (q31_t)0x3ab4622d, (q31_t)0x3fc7d258, (q31_t)0x3ac0e83d, (q31_t)0x3fc8db4a,
-    (q31_t)0x3acd6e81, (q31_t)0x3fc9e1c6, (q31_t)0x3ad9f4f8, (q31_t)0x3fcae5cd,
-    (q31_t)0x3ae67ba2, (q31_t)0x3fcbe75e, (q31_t)0x3af3027e, (q31_t)0x3fcce67a,
-    (q31_t)0x3aff898c, (q31_t)0x3fcde320, (q31_t)0x3b0c10cb, (q31_t)0x3fcedd50,
-    (q31_t)0x3b18983b, (q31_t)0x3fcfd50b, (q31_t)0x3b251fdc, (q31_t)0x3fd0ca4f,
-    (q31_t)0x3b31a7ac, (q31_t)0x3fd1bd1e, (q31_t)0x3b3e2fac, (q31_t)0x3fd2ad77,
-    (q31_t)0x3b4ab7db, (q31_t)0x3fd39b5a, (q31_t)0x3b574039, (q31_t)0x3fd486c7,
-    (q31_t)0x3b63c8c4, (q31_t)0x3fd56fbe, (q31_t)0x3b70517d, (q31_t)0x3fd6563f,
-    (q31_t)0x3b7cda63, (q31_t)0x3fd73a4a, (q31_t)0x3b896375, (q31_t)0x3fd81bdf,
-    (q31_t)0x3b95ecb4, (q31_t)0x3fd8fafe, (q31_t)0x3ba2761e, (q31_t)0x3fd9d7a7,
-    (q31_t)0x3baeffb3, (q31_t)0x3fdab1d9, (q31_t)0x3bbb8973, (q31_t)0x3fdb8996,
-    (q31_t)0x3bc8135c, (q31_t)0x3fdc5edc, (q31_t)0x3bd49d70, (q31_t)0x3fdd31ac,
-    (q31_t)0x3be127ac, (q31_t)0x3fde0205, (q31_t)0x3bedb212, (q31_t)0x3fdecfe8,
-    (q31_t)0x3bfa3c9f, (q31_t)0x3fdf9b55, (q31_t)0x3c06c754, (q31_t)0x3fe0644b,
-    (q31_t)0x3c135231, (q31_t)0x3fe12acb, (q31_t)0x3c1fdd34, (q31_t)0x3fe1eed5,
-    (q31_t)0x3c2c685d, (q31_t)0x3fe2b067, (q31_t)0x3c38f3ac, (q31_t)0x3fe36f84,
-    (q31_t)0x3c457f21, (q31_t)0x3fe42c2a, (q31_t)0x3c520aba, (q31_t)0x3fe4e659,
-    (q31_t)0x3c5e9678, (q31_t)0x3fe59e12, (q31_t)0x3c6b2259, (q31_t)0x3fe65354,
-    (q31_t)0x3c77ae5e, (q31_t)0x3fe7061f, (q31_t)0x3c843a85, (q31_t)0x3fe7b674,
-    (q31_t)0x3c90c6cf, (q31_t)0x3fe86452, (q31_t)0x3c9d533b, (q31_t)0x3fe90fb9,
-    (q31_t)0x3ca9dfc8, (q31_t)0x3fe9b8a9, (q31_t)0x3cb66c77, (q31_t)0x3fea5f23,
-    (q31_t)0x3cc2f945, (q31_t)0x3feb0326, (q31_t)0x3ccf8634, (q31_t)0x3feba4b2,
-    (q31_t)0x3cdc1342, (q31_t)0x3fec43c7, (q31_t)0x3ce8a06f, (q31_t)0x3fece065,
-    (q31_t)0x3cf52dbb, (q31_t)0x3fed7a8c, (q31_t)0x3d01bb24, (q31_t)0x3fee123d,
-    (q31_t)0x3d0e48ab, (q31_t)0x3feea776, (q31_t)0x3d1ad650, (q31_t)0x3fef3a39,
-    (q31_t)0x3d276410, (q31_t)0x3fefca84, (q31_t)0x3d33f1ed, (q31_t)0x3ff05858,
-    (q31_t)0x3d407fe6, (q31_t)0x3ff0e3b6, (q31_t)0x3d4d0df9, (q31_t)0x3ff16c9c,
-    (q31_t)0x3d599c28, (q31_t)0x3ff1f30b, (q31_t)0x3d662a70, (q31_t)0x3ff27703,
-    (q31_t)0x3d72b8d2, (q31_t)0x3ff2f884, (q31_t)0x3d7f474d, (q31_t)0x3ff3778e,
-    (q31_t)0x3d8bd5e1, (q31_t)0x3ff3f420, (q31_t)0x3d98648d, (q31_t)0x3ff46e3c,
-    (q31_t)0x3da4f351, (q31_t)0x3ff4e5e0, (q31_t)0x3db1822c, (q31_t)0x3ff55b0d,
-    (q31_t)0x3dbe111e, (q31_t)0x3ff5cdc3, (q31_t)0x3dcaa027, (q31_t)0x3ff63e01,
-    (q31_t)0x3dd72f45, (q31_t)0x3ff6abc8, (q31_t)0x3de3be78, (q31_t)0x3ff71718,
-    (q31_t)0x3df04dc0, (q31_t)0x3ff77ff1, (q31_t)0x3dfcdd1d, (q31_t)0x3ff7e652,
-    (q31_t)0x3e096c8d, (q31_t)0x3ff84a3c, (q31_t)0x3e15fc11, (q31_t)0x3ff8abae,
-    (q31_t)0x3e228ba7, (q31_t)0x3ff90aaa, (q31_t)0x3e2f1b50, (q31_t)0x3ff9672d,
-    (q31_t)0x3e3bab0b, (q31_t)0x3ff9c13a, (q31_t)0x3e483ad8, (q31_t)0x3ffa18cf,
-    (q31_t)0x3e54cab5, (q31_t)0x3ffa6dec, (q31_t)0x3e615aa3, (q31_t)0x3ffac092,
-    (q31_t)0x3e6deaa1, (q31_t)0x3ffb10c1, (q31_t)0x3e7a7aae, (q31_t)0x3ffb5e78,
-    (q31_t)0x3e870aca, (q31_t)0x3ffba9b8, (q31_t)0x3e939af5, (q31_t)0x3ffbf280,
-    (q31_t)0x3ea02b2e, (q31_t)0x3ffc38d1, (q31_t)0x3eacbb74, (q31_t)0x3ffc7caa,
-    (q31_t)0x3eb94bc8, (q31_t)0x3ffcbe0c, (q31_t)0x3ec5dc28, (q31_t)0x3ffcfcf6,
-    (q31_t)0x3ed26c94, (q31_t)0x3ffd3969, (q31_t)0x3edefd0c, (q31_t)0x3ffd7364,
-    (q31_t)0x3eeb8d8f, (q31_t)0x3ffdaae7, (q31_t)0x3ef81e1d, (q31_t)0x3ffddff3,
-    (q31_t)0x3f04aeb5, (q31_t)0x3ffe1288, (q31_t)0x3f113f56, (q31_t)0x3ffe42a4,
-    (q31_t)0x3f1dd001, (q31_t)0x3ffe704a, (q31_t)0x3f2a60b4, (q31_t)0x3ffe9b77,
-    (q31_t)0x3f36f170, (q31_t)0x3ffec42d, (q31_t)0x3f438234, (q31_t)0x3ffeea6c,
-    (q31_t)0x3f5012fe, (q31_t)0x3fff0e32, (q31_t)0x3f5ca3d0, (q31_t)0x3fff2f82,
-    (q31_t)0x3f6934a8, (q31_t)0x3fff4e59, (q31_t)0x3f75c585, (q31_t)0x3fff6ab9,
-    (q31_t)0x3f825668, (q31_t)0x3fff84a1, (q31_t)0x3f8ee750, (q31_t)0x3fff9c12,
-    (q31_t)0x3f9b783c, (q31_t)0x3fffb10b, (q31_t)0x3fa8092c, (q31_t)0x3fffc38c,
-    (q31_t)0x3fb49a1f, (q31_t)0x3fffd396, (q31_t)0x3fc12b16, (q31_t)0x3fffe128,
-    (q31_t)0x3fcdbc0f, (q31_t)0x3fffec43, (q31_t)0x3fda4d09, (q31_t)0x3ffff4e6,
-    (q31_t)0x3fe6de05, (q31_t)0x3ffffb11, (q31_t)0x3ff36f02, (q31_t)0x3ffffec4,
-};
-
-
-/**
-  @par
-  Generation of realCoefBQ31 array:
-  @par
-   n = 4096
-  <pre>for (i = 0; i < n; i++)
-  {
-     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  } </pre>
-  @par
-  Convert to fixed point Q31 format
-      round(pBTable[i] * pow(2, 31))
- */
-
-const q31_t realCoefBQ31[8192] = {
-    (q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4,
-    (q31_t)0x401921fb, (q31_t)0x3ffffb11, (q31_t)0x4025b2f7, (q31_t)0x3ffff4e6,
-    (q31_t)0x403243f1, (q31_t)0x3fffec43, (q31_t)0x403ed4ea, (q31_t)0x3fffe128,
-    (q31_t)0x404b65e1, (q31_t)0x3fffd396, (q31_t)0x4057f6d4, (q31_t)0x3fffc38c,
-    (q31_t)0x406487c4, (q31_t)0x3fffb10b, (q31_t)0x407118b0, (q31_t)0x3fff9c12,
-    (q31_t)0x407da998, (q31_t)0x3fff84a1, (q31_t)0x408a3a7b, (q31_t)0x3fff6ab9,
-    (q31_t)0x4096cb58, (q31_t)0x3fff4e59, (q31_t)0x40a35c30, (q31_t)0x3fff2f82,
-    (q31_t)0x40afed02, (q31_t)0x3fff0e32, (q31_t)0x40bc7dcc, (q31_t)0x3ffeea6c,
-    (q31_t)0x40c90e90, (q31_t)0x3ffec42d, (q31_t)0x40d59f4c, (q31_t)0x3ffe9b77,
-    (q31_t)0x40e22fff, (q31_t)0x3ffe704a, (q31_t)0x40eec0aa, (q31_t)0x3ffe42a4,
-    (q31_t)0x40fb514b, (q31_t)0x3ffe1288, (q31_t)0x4107e1e3, (q31_t)0x3ffddff3,
-    (q31_t)0x41147271, (q31_t)0x3ffdaae7, (q31_t)0x412102f4, (q31_t)0x3ffd7364,
-    (q31_t)0x412d936c, (q31_t)0x3ffd3969, (q31_t)0x413a23d8, (q31_t)0x3ffcfcf6,
-    (q31_t)0x4146b438, (q31_t)0x3ffcbe0c, (q31_t)0x4153448c, (q31_t)0x3ffc7caa,
-    (q31_t)0x415fd4d2, (q31_t)0x3ffc38d1, (q31_t)0x416c650b, (q31_t)0x3ffbf280,
-    (q31_t)0x4178f536, (q31_t)0x3ffba9b8, (q31_t)0x41858552, (q31_t)0x3ffb5e78,
-    (q31_t)0x4192155f, (q31_t)0x3ffb10c1, (q31_t)0x419ea55d, (q31_t)0x3ffac092,
-    (q31_t)0x41ab354b, (q31_t)0x3ffa6dec, (q31_t)0x41b7c528, (q31_t)0x3ffa18cf,
-    (q31_t)0x41c454f5, (q31_t)0x3ff9c13a, (q31_t)0x41d0e4b0, (q31_t)0x3ff9672d,
-    (q31_t)0x41dd7459, (q31_t)0x3ff90aaa, (q31_t)0x41ea03ef, (q31_t)0x3ff8abae,
-    (q31_t)0x41f69373, (q31_t)0x3ff84a3c, (q31_t)0x420322e3, (q31_t)0x3ff7e652,
-    (q31_t)0x420fb240, (q31_t)0x3ff77ff1, (q31_t)0x421c4188, (q31_t)0x3ff71718,
-    (q31_t)0x4228d0bb, (q31_t)0x3ff6abc8, (q31_t)0x42355fd9, (q31_t)0x3ff63e01,
-    (q31_t)0x4241eee2, (q31_t)0x3ff5cdc3, (q31_t)0x424e7dd4, (q31_t)0x3ff55b0d,
-    (q31_t)0x425b0caf, (q31_t)0x3ff4e5e0, (q31_t)0x42679b73, (q31_t)0x3ff46e3c,
-    (q31_t)0x42742a1f, (q31_t)0x3ff3f420, (q31_t)0x4280b8b3, (q31_t)0x3ff3778e,
-    (q31_t)0x428d472e, (q31_t)0x3ff2f884, (q31_t)0x4299d590, (q31_t)0x3ff27703,
-    (q31_t)0x42a663d8, (q31_t)0x3ff1f30b, (q31_t)0x42b2f207, (q31_t)0x3ff16c9c,
-    (q31_t)0x42bf801a, (q31_t)0x3ff0e3b6, (q31_t)0x42cc0e13, (q31_t)0x3ff05858,
-    (q31_t)0x42d89bf0, (q31_t)0x3fefca84, (q31_t)0x42e529b0, (q31_t)0x3fef3a39,
-    (q31_t)0x42f1b755, (q31_t)0x3feea776, (q31_t)0x42fe44dc, (q31_t)0x3fee123d,
-    (q31_t)0x430ad245, (q31_t)0x3fed7a8c, (q31_t)0x43175f91, (q31_t)0x3fece065,
-    (q31_t)0x4323ecbe, (q31_t)0x3fec43c7, (q31_t)0x433079cc, (q31_t)0x3feba4b2,
-    (q31_t)0x433d06bb, (q31_t)0x3feb0326, (q31_t)0x43499389, (q31_t)0x3fea5f23,
-    (q31_t)0x43562038, (q31_t)0x3fe9b8a9, (q31_t)0x4362acc5, (q31_t)0x3fe90fb9,
-    (q31_t)0x436f3931, (q31_t)0x3fe86452, (q31_t)0x437bc57b, (q31_t)0x3fe7b674,
-    (q31_t)0x438851a2, (q31_t)0x3fe7061f, (q31_t)0x4394dda7, (q31_t)0x3fe65354,
-    (q31_t)0x43a16988, (q31_t)0x3fe59e12, (q31_t)0x43adf546, (q31_t)0x3fe4e659,
-    (q31_t)0x43ba80df, (q31_t)0x3fe42c2a, (q31_t)0x43c70c54, (q31_t)0x3fe36f84,
-    (q31_t)0x43d397a3, (q31_t)0x3fe2b067, (q31_t)0x43e022cc, (q31_t)0x3fe1eed5,
-    (q31_t)0x43ecadcf, (q31_t)0x3fe12acb, (q31_t)0x43f938ac, (q31_t)0x3fe0644b,
-    (q31_t)0x4405c361, (q31_t)0x3fdf9b55, (q31_t)0x44124dee, (q31_t)0x3fdecfe8,
-    (q31_t)0x441ed854, (q31_t)0x3fde0205, (q31_t)0x442b6290, (q31_t)0x3fdd31ac,
-    (q31_t)0x4437eca4, (q31_t)0x3fdc5edc, (q31_t)0x4444768d, (q31_t)0x3fdb8996,
-    (q31_t)0x4451004d, (q31_t)0x3fdab1d9, (q31_t)0x445d89e2, (q31_t)0x3fd9d7a7,
-    (q31_t)0x446a134c, (q31_t)0x3fd8fafe, (q31_t)0x44769c8b, (q31_t)0x3fd81bdf,
-    (q31_t)0x4483259d, (q31_t)0x3fd73a4a, (q31_t)0x448fae83, (q31_t)0x3fd6563f,
-    (q31_t)0x449c373c, (q31_t)0x3fd56fbe, (q31_t)0x44a8bfc7, (q31_t)0x3fd486c7,
-    (q31_t)0x44b54825, (q31_t)0x3fd39b5a, (q31_t)0x44c1d054, (q31_t)0x3fd2ad77,
-    (q31_t)0x44ce5854, (q31_t)0x3fd1bd1e, (q31_t)0x44dae024, (q31_t)0x3fd0ca4f,
-    (q31_t)0x44e767c5, (q31_t)0x3fcfd50b, (q31_t)0x44f3ef35, (q31_t)0x3fcedd50,
-    (q31_t)0x45007674, (q31_t)0x3fcde320, (q31_t)0x450cfd82, (q31_t)0x3fcce67a,
-    (q31_t)0x4519845e, (q31_t)0x3fcbe75e, (q31_t)0x45260b08, (q31_t)0x3fcae5cd,
-    (q31_t)0x4532917f, (q31_t)0x3fc9e1c6, (q31_t)0x453f17c3, (q31_t)0x3fc8db4a,
-    (q31_t)0x454b9dd3, (q31_t)0x3fc7d258, (q31_t)0x455823ae, (q31_t)0x3fc6c6f0,
-    (q31_t)0x4564a955, (q31_t)0x3fc5b913, (q31_t)0x45712ec7, (q31_t)0x3fc4a8c1,
-    (q31_t)0x457db403, (q31_t)0x3fc395f9, (q31_t)0x458a3908, (q31_t)0x3fc280bc,
-    (q31_t)0x4596bdd7, (q31_t)0x3fc1690a, (q31_t)0x45a3426f, (q31_t)0x3fc04ee3,
-    (q31_t)0x45afc6d0, (q31_t)0x3fbf3246, (q31_t)0x45bc4af8, (q31_t)0x3fbe1334,
-    (q31_t)0x45c8cee7, (q31_t)0x3fbcf1ad, (q31_t)0x45d5529e, (q31_t)0x3fbbcdb1,
-    (q31_t)0x45e1d61b, (q31_t)0x3fbaa740, (q31_t)0x45ee595d, (q31_t)0x3fb97e5a,
-    (q31_t)0x45fadc66, (q31_t)0x3fb852ff, (q31_t)0x46075f33, (q31_t)0x3fb7252f,
-    (q31_t)0x4613e1c5, (q31_t)0x3fb5f4ea, (q31_t)0x4620641a, (q31_t)0x3fb4c231,
-    (q31_t)0x462ce634, (q31_t)0x3fb38d02, (q31_t)0x46396810, (q31_t)0x3fb2555f,
-    (q31_t)0x4645e9af, (q31_t)0x3fb11b48, (q31_t)0x46526b10, (q31_t)0x3fafdebb,
-    (q31_t)0x465eec33, (q31_t)0x3fae9fbb, (q31_t)0x466b6d16, (q31_t)0x3fad5e45,
-    (q31_t)0x4677edbb, (q31_t)0x3fac1a5b, (q31_t)0x46846e1f, (q31_t)0x3faad3fd,
-    (q31_t)0x4690ee44, (q31_t)0x3fa98b2a, (q31_t)0x469d6e27, (q31_t)0x3fa83fe3,
-    (q31_t)0x46a9edc9, (q31_t)0x3fa6f228, (q31_t)0x46b66d29, (q31_t)0x3fa5a1f9,
-    (q31_t)0x46c2ec48, (q31_t)0x3fa44f55, (q31_t)0x46cf6b23, (q31_t)0x3fa2fa3d,
-    (q31_t)0x46dbe9bb, (q31_t)0x3fa1a2b2, (q31_t)0x46e86810, (q31_t)0x3fa048b2,
-    (q31_t)0x46f4e620, (q31_t)0x3f9eec3e, (q31_t)0x470163eb, (q31_t)0x3f9d8d56,
-    (q31_t)0x470de172, (q31_t)0x3f9c2bfb, (q31_t)0x471a5eb3, (q31_t)0x3f9ac82c,
-    (q31_t)0x4726dbae, (q31_t)0x3f9961e8, (q31_t)0x47335862, (q31_t)0x3f97f932,
-    (q31_t)0x473fd4cf, (q31_t)0x3f968e07, (q31_t)0x474c50f4, (q31_t)0x3f952069,
-    (q31_t)0x4758ccd2, (q31_t)0x3f93b058, (q31_t)0x47654867, (q31_t)0x3f923dd2,
-    (q31_t)0x4771c3b3, (q31_t)0x3f90c8da, (q31_t)0x477e3eb5, (q31_t)0x3f8f516e,
-    (q31_t)0x478ab96e, (q31_t)0x3f8dd78f, (q31_t)0x479733dc, (q31_t)0x3f8c5b3d,
-    (q31_t)0x47a3adff, (q31_t)0x3f8adc77, (q31_t)0x47b027d7, (q31_t)0x3f895b3e,
-    (q31_t)0x47bca163, (q31_t)0x3f87d792, (q31_t)0x47c91aa3, (q31_t)0x3f865174,
-    (q31_t)0x47d59396, (q31_t)0x3f84c8e2, (q31_t)0x47e20c3b, (q31_t)0x3f833ddd,
-    (q31_t)0x47ee8493, (q31_t)0x3f81b065, (q31_t)0x47fafc9c, (q31_t)0x3f80207b,
-    (q31_t)0x48077457, (q31_t)0x3f7e8e1e, (q31_t)0x4813ebc2, (q31_t)0x3f7cf94e,
-    (q31_t)0x482062de, (q31_t)0x3f7b620c, (q31_t)0x482cd9a9, (q31_t)0x3f79c857,
-    (q31_t)0x48395024, (q31_t)0x3f782c30, (q31_t)0x4845c64d, (q31_t)0x3f768d96,
-    (q31_t)0x48523c25, (q31_t)0x3f74ec8a, (q31_t)0x485eb1ab, (q31_t)0x3f73490b,
-    (q31_t)0x486b26de, (q31_t)0x3f71a31b, (q31_t)0x48779bbe, (q31_t)0x3f6ffab8,
-    (q31_t)0x4884104b, (q31_t)0x3f6e4fe3, (q31_t)0x48908483, (q31_t)0x3f6ca29c,
-    (q31_t)0x489cf867, (q31_t)0x3f6af2e3, (q31_t)0x48a96bf6, (q31_t)0x3f6940b8,
-    (q31_t)0x48b5df30, (q31_t)0x3f678c1c, (q31_t)0x48c25213, (q31_t)0x3f65d50d,
-    (q31_t)0x48cec4a0, (q31_t)0x3f641b8d, (q31_t)0x48db36d6, (q31_t)0x3f625f9b,
-    (q31_t)0x48e7a8b5, (q31_t)0x3f60a138, (q31_t)0x48f41a3c, (q31_t)0x3f5ee063,
-    (q31_t)0x49008b6a, (q31_t)0x3f5d1d1d, (q31_t)0x490cfc40, (q31_t)0x3f5b5765,
-    (q31_t)0x49196cbc, (q31_t)0x3f598f3c, (q31_t)0x4925dcdf, (q31_t)0x3f57c4a2,
-    (q31_t)0x49324ca7, (q31_t)0x3f55f796, (q31_t)0x493ebc14, (q31_t)0x3f54281a,
-    (q31_t)0x494b2b27, (q31_t)0x3f52562c, (q31_t)0x495799dd, (q31_t)0x3f5081cd,
-    (q31_t)0x49640837, (q31_t)0x3f4eaafe, (q31_t)0x49707635, (q31_t)0x3f4cd1be,
-    (q31_t)0x497ce3d5, (q31_t)0x3f4af60d, (q31_t)0x49895118, (q31_t)0x3f4917eb,
-    (q31_t)0x4995bdfd, (q31_t)0x3f473759, (q31_t)0x49a22a83, (q31_t)0x3f455456,
-    (q31_t)0x49ae96aa, (q31_t)0x3f436ee3, (q31_t)0x49bb0271, (q31_t)0x3f4186ff,
-    (q31_t)0x49c76dd8, (q31_t)0x3f3f9cab, (q31_t)0x49d3d8df, (q31_t)0x3f3dafe7,
-    (q31_t)0x49e04385, (q31_t)0x3f3bc0b3, (q31_t)0x49ecadc9, (q31_t)0x3f39cf0e,
-    (q31_t)0x49f917ac, (q31_t)0x3f37dafa, (q31_t)0x4a05812c, (q31_t)0x3f35e476,
-    (q31_t)0x4a11ea49, (q31_t)0x3f33eb81, (q31_t)0x4a1e5303, (q31_t)0x3f31f01d,
-    (q31_t)0x4a2abb59, (q31_t)0x3f2ff24a, (q31_t)0x4a37234a, (q31_t)0x3f2df206,
-    (q31_t)0x4a438ad7, (q31_t)0x3f2bef53, (q31_t)0x4a4ff1fe, (q31_t)0x3f29ea31,
-    (q31_t)0x4a5c58c0, (q31_t)0x3f27e29f, (q31_t)0x4a68bf1b, (q31_t)0x3f25d89e,
-    (q31_t)0x4a752510, (q31_t)0x3f23cc2e, (q31_t)0x4a818a9d, (q31_t)0x3f21bd4e,
-    (q31_t)0x4a8defc3, (q31_t)0x3f1fabff, (q31_t)0x4a9a5480, (q31_t)0x3f1d9842,
-    (q31_t)0x4aa6b8d5, (q31_t)0x3f1b8215, (q31_t)0x4ab31cc1, (q31_t)0x3f19697a,
-    (q31_t)0x4abf8043, (q31_t)0x3f174e70, (q31_t)0x4acbe35b, (q31_t)0x3f1530f7,
-    (q31_t)0x4ad84609, (q31_t)0x3f13110f, (q31_t)0x4ae4a84b, (q31_t)0x3f10eeb9,
-    (q31_t)0x4af10a22, (q31_t)0x3f0ec9f5, (q31_t)0x4afd6b8d, (q31_t)0x3f0ca2c2,
-    (q31_t)0x4b09cc8c, (q31_t)0x3f0a7921, (q31_t)0x4b162d1d, (q31_t)0x3f084d12,
-    (q31_t)0x4b228d42, (q31_t)0x3f061e95, (q31_t)0x4b2eecf8, (q31_t)0x3f03eda9,
-    (q31_t)0x4b3b4c40, (q31_t)0x3f01ba50, (q31_t)0x4b47ab19, (q31_t)0x3eff8489,
-    (q31_t)0x4b540982, (q31_t)0x3efd4c54, (q31_t)0x4b60677c, (q31_t)0x3efb11b1,
-    (q31_t)0x4b6cc506, (q31_t)0x3ef8d4a1, (q31_t)0x4b79221f, (q31_t)0x3ef69523,
-    (q31_t)0x4b857ec7, (q31_t)0x3ef45338, (q31_t)0x4b91dafc, (q31_t)0x3ef20ee0,
-    (q31_t)0x4b9e36c0, (q31_t)0x3eefc81a, (q31_t)0x4baa9211, (q31_t)0x3eed7ee7,
-    (q31_t)0x4bb6ecef, (q31_t)0x3eeb3347, (q31_t)0x4bc34759, (q31_t)0x3ee8e53a,
-    (q31_t)0x4bcfa150, (q31_t)0x3ee694c1, (q31_t)0x4bdbfad1, (q31_t)0x3ee441da,
-    (q31_t)0x4be853de, (q31_t)0x3ee1ec87, (q31_t)0x4bf4ac75, (q31_t)0x3edf94c7,
-    (q31_t)0x4c010496, (q31_t)0x3edd3a9a, (q31_t)0x4c0d5c41, (q31_t)0x3edade01,
-    (q31_t)0x4c19b374, (q31_t)0x3ed87efc, (q31_t)0x4c260a31, (q31_t)0x3ed61d8a,
-    (q31_t)0x4c326075, (q31_t)0x3ed3b9ad, (q31_t)0x4c3eb641, (q31_t)0x3ed15363,
-    (q31_t)0x4c4b0b94, (q31_t)0x3eceeaad, (q31_t)0x4c57606e, (q31_t)0x3ecc7f8b,
-    (q31_t)0x4c63b4ce, (q31_t)0x3eca11fe, (q31_t)0x4c7008b3, (q31_t)0x3ec7a205,
-    (q31_t)0x4c7c5c1e, (q31_t)0x3ec52fa0, (q31_t)0x4c88af0e, (q31_t)0x3ec2bad0,
-    (q31_t)0x4c950182, (q31_t)0x3ec04394, (q31_t)0x4ca1537a, (q31_t)0x3ebdc9ed,
-    (q31_t)0x4cada4f5, (q31_t)0x3ebb4ddb, (q31_t)0x4cb9f5f3, (q31_t)0x3eb8cf5d,
-    (q31_t)0x4cc64673, (q31_t)0x3eb64e75, (q31_t)0x4cd29676, (q31_t)0x3eb3cb21,
-    (q31_t)0x4cdee5f9, (q31_t)0x3eb14563, (q31_t)0x4ceb34fe, (q31_t)0x3eaebd3a,
-    (q31_t)0x4cf78383, (q31_t)0x3eac32a6, (q31_t)0x4d03d189, (q31_t)0x3ea9a5a8,
-    (q31_t)0x4d101f0e, (q31_t)0x3ea7163f, (q31_t)0x4d1c6c11, (q31_t)0x3ea4846c,
-    (q31_t)0x4d28b894, (q31_t)0x3ea1f02f, (q31_t)0x4d350495, (q31_t)0x3e9f5988,
-    (q31_t)0x4d415013, (q31_t)0x3e9cc076, (q31_t)0x4d4d9b0e, (q31_t)0x3e9a24fb,
-    (q31_t)0x4d59e586, (q31_t)0x3e978715, (q31_t)0x4d662f7b, (q31_t)0x3e94e6c6,
-    (q31_t)0x4d7278eb, (q31_t)0x3e92440d, (q31_t)0x4d7ec1d6, (q31_t)0x3e8f9eeb,
-    (q31_t)0x4d8b0a3d, (q31_t)0x3e8cf75f, (q31_t)0x4d97521d, (q31_t)0x3e8a4d6a,
-    (q31_t)0x4da39978, (q31_t)0x3e87a10c, (q31_t)0x4dafe04b, (q31_t)0x3e84f245,
-    (q31_t)0x4dbc2698, (q31_t)0x3e824114, (q31_t)0x4dc86c5d, (q31_t)0x3e7f8d7b,
-    (q31_t)0x4dd4b19a, (q31_t)0x3e7cd778, (q31_t)0x4de0f64f, (q31_t)0x3e7a1f0d,
-    (q31_t)0x4ded3a7b, (q31_t)0x3e77643a, (q31_t)0x4df97e1d, (q31_t)0x3e74a6fd,
-    (q31_t)0x4e05c135, (q31_t)0x3e71e759, (q31_t)0x4e1203c3, (q31_t)0x3e6f254c,
-    (q31_t)0x4e1e45c6, (q31_t)0x3e6c60d7, (q31_t)0x4e2a873e, (q31_t)0x3e6999fa,
-    (q31_t)0x4e36c82a, (q31_t)0x3e66d0b4, (q31_t)0x4e430889, (q31_t)0x3e640507,
-    (q31_t)0x4e4f485c, (q31_t)0x3e6136f3, (q31_t)0x4e5b87a2, (q31_t)0x3e5e6676,
-    (q31_t)0x4e67c65a, (q31_t)0x3e5b9392, (q31_t)0x4e740483, (q31_t)0x3e58be47,
-    (q31_t)0x4e80421e, (q31_t)0x3e55e694, (q31_t)0x4e8c7f2a, (q31_t)0x3e530c7a,
-    (q31_t)0x4e98bba7, (q31_t)0x3e502ff9, (q31_t)0x4ea4f793, (q31_t)0x3e4d5110,
-    (q31_t)0x4eb132ef, (q31_t)0x3e4a6fc1, (q31_t)0x4ebd6db9, (q31_t)0x3e478c0b,
-    (q31_t)0x4ec9a7f3, (q31_t)0x3e44a5ef, (q31_t)0x4ed5e19a, (q31_t)0x3e41bd6c,
-    (q31_t)0x4ee21aaf, (q31_t)0x3e3ed282, (q31_t)0x4eee5331, (q31_t)0x3e3be532,
-    (q31_t)0x4efa8b20, (q31_t)0x3e38f57c, (q31_t)0x4f06c27a, (q31_t)0x3e360360,
-    (q31_t)0x4f12f941, (q31_t)0x3e330ede, (q31_t)0x4f1f2f73, (q31_t)0x3e3017f6,
-    (q31_t)0x4f2b650f, (q31_t)0x3e2d1ea8, (q31_t)0x4f379a16, (q31_t)0x3e2a22f4,
-    (q31_t)0x4f43ce86, (q31_t)0x3e2724db, (q31_t)0x4f500260, (q31_t)0x3e24245d,
-    (q31_t)0x4f5c35a3, (q31_t)0x3e212179, (q31_t)0x4f68684e, (q31_t)0x3e1e1c30,
-    (q31_t)0x4f749a61, (q31_t)0x3e1b1482, (q31_t)0x4f80cbdc, (q31_t)0x3e180a6f,
-    (q31_t)0x4f8cfcbe, (q31_t)0x3e14fdf7, (q31_t)0x4f992d06, (q31_t)0x3e11ef1b,
-    (q31_t)0x4fa55cb4, (q31_t)0x3e0eddd9, (q31_t)0x4fb18bc8, (q31_t)0x3e0bca34,
-    (q31_t)0x4fbdba40, (q31_t)0x3e08b42a, (q31_t)0x4fc9e81e, (q31_t)0x3e059bbb,
-    (q31_t)0x4fd6155f, (q31_t)0x3e0280e9, (q31_t)0x4fe24205, (q31_t)0x3dff63b2,
-    (q31_t)0x4fee6e0d, (q31_t)0x3dfc4418, (q31_t)0x4ffa9979, (q31_t)0x3df9221a,
-    (q31_t)0x5006c446, (q31_t)0x3df5fdb8, (q31_t)0x5012ee76, (q31_t)0x3df2d6f3,
-    (q31_t)0x501f1807, (q31_t)0x3defadca, (q31_t)0x502b40f8, (q31_t)0x3dec823e,
-    (q31_t)0x5037694b, (q31_t)0x3de9544f, (q31_t)0x504390fd, (q31_t)0x3de623fd,
-    (q31_t)0x504fb80e, (q31_t)0x3de2f148, (q31_t)0x505bde7f, (q31_t)0x3ddfbc30,
-    (q31_t)0x5068044e, (q31_t)0x3ddc84b5, (q31_t)0x5074297b, (q31_t)0x3dd94ad8,
-    (q31_t)0x50804e06, (q31_t)0x3dd60e99, (q31_t)0x508c71ee, (q31_t)0x3dd2cff7,
-    (q31_t)0x50989532, (q31_t)0x3dcf8ef3, (q31_t)0x50a4b7d3, (q31_t)0x3dcc4b8d,
-    (q31_t)0x50b0d9d0, (q31_t)0x3dc905c5, (q31_t)0x50bcfb28, (q31_t)0x3dc5bd9b,
-    (q31_t)0x50c91bda, (q31_t)0x3dc2730f, (q31_t)0x50d53be7, (q31_t)0x3dbf2622,
-    (q31_t)0x50e15b4e, (q31_t)0x3dbbd6d4, (q31_t)0x50ed7a0e, (q31_t)0x3db88524,
-    (q31_t)0x50f99827, (q31_t)0x3db53113, (q31_t)0x5105b599, (q31_t)0x3db1daa2,
-    (q31_t)0x5111d263, (q31_t)0x3dae81cf, (q31_t)0x511dee84, (q31_t)0x3dab269b,
-    (q31_t)0x512a09fc, (q31_t)0x3da7c907, (q31_t)0x513624cb, (q31_t)0x3da46912,
-    (q31_t)0x51423ef0, (q31_t)0x3da106bd, (q31_t)0x514e586a, (q31_t)0x3d9da208,
-    (q31_t)0x515a713a, (q31_t)0x3d9a3af2, (q31_t)0x5166895f, (q31_t)0x3d96d17d,
-    (q31_t)0x5172a0d7, (q31_t)0x3d9365a8, (q31_t)0x517eb7a4, (q31_t)0x3d8ff772,
-    (q31_t)0x518acdc4, (q31_t)0x3d8c86de, (q31_t)0x5196e337, (q31_t)0x3d8913ea,
-    (q31_t)0x51a2f7fc, (q31_t)0x3d859e96, (q31_t)0x51af0c13, (q31_t)0x3d8226e4,
-    (q31_t)0x51bb1f7c, (q31_t)0x3d7eacd2, (q31_t)0x51c73235, (q31_t)0x3d7b3061,
-    (q31_t)0x51d3443f, (q31_t)0x3d77b192, (q31_t)0x51df5599, (q31_t)0x3d743064,
-    (q31_t)0x51eb6643, (q31_t)0x3d70acd7, (q31_t)0x51f7763c, (q31_t)0x3d6d26ec,
-    (q31_t)0x52038584, (q31_t)0x3d699ea3, (q31_t)0x520f941a, (q31_t)0x3d6613fb,
-    (q31_t)0x521ba1fd, (q31_t)0x3d6286f6, (q31_t)0x5227af2e, (q31_t)0x3d5ef793,
-    (q31_t)0x5233bbac, (q31_t)0x3d5b65d2, (q31_t)0x523fc776, (q31_t)0x3d57d1b3,
-    (q31_t)0x524bd28c, (q31_t)0x3d543b37, (q31_t)0x5257dced, (q31_t)0x3d50a25e,
-    (q31_t)0x5263e699, (q31_t)0x3d4d0728, (q31_t)0x526fef90, (q31_t)0x3d496994,
-    (q31_t)0x527bf7d1, (q31_t)0x3d45c9a4, (q31_t)0x5287ff5b, (q31_t)0x3d422757,
-    (q31_t)0x5294062f, (q31_t)0x3d3e82ae, (q31_t)0x52a00c4b, (q31_t)0x3d3adba7,
-    (q31_t)0x52ac11af, (q31_t)0x3d373245, (q31_t)0x52b8165b, (q31_t)0x3d338687,
-    (q31_t)0x52c41a4f, (q31_t)0x3d2fd86c, (q31_t)0x52d01d89, (q31_t)0x3d2c27f6,
-    (q31_t)0x52dc2009, (q31_t)0x3d287523, (q31_t)0x52e821cf, (q31_t)0x3d24bff6,
-    (q31_t)0x52f422db, (q31_t)0x3d21086c, (q31_t)0x5300232c, (q31_t)0x3d1d4e88,
-    (q31_t)0x530c22c1, (q31_t)0x3d199248, (q31_t)0x5318219a, (q31_t)0x3d15d3ad,
-    (q31_t)0x53241fb6, (q31_t)0x3d1212b7, (q31_t)0x53301d16, (q31_t)0x3d0e4f67,
-    (q31_t)0x533c19b8, (q31_t)0x3d0a89bc, (q31_t)0x5348159d, (q31_t)0x3d06c1b6,
-    (q31_t)0x535410c3, (q31_t)0x3d02f757, (q31_t)0x53600b2a, (q31_t)0x3cff2a9d,
-    (q31_t)0x536c04d2, (q31_t)0x3cfb5b89, (q31_t)0x5377fdbb, (q31_t)0x3cf78a1b,
-    (q31_t)0x5383f5e3, (q31_t)0x3cf3b653, (q31_t)0x538fed4b, (q31_t)0x3cefe032,
-    (q31_t)0x539be3f2, (q31_t)0x3cec07b8, (q31_t)0x53a7d9d7, (q31_t)0x3ce82ce4,
-    (q31_t)0x53b3cefa, (q31_t)0x3ce44fb7, (q31_t)0x53bfc35b, (q31_t)0x3ce07031,
-    (q31_t)0x53cbb6f8, (q31_t)0x3cdc8e52, (q31_t)0x53d7a9d3, (q31_t)0x3cd8aa1b,
-    (q31_t)0x53e39be9, (q31_t)0x3cd4c38b, (q31_t)0x53ef8d3c, (q31_t)0x3cd0daa2,
-    (q31_t)0x53fb7dc9, (q31_t)0x3cccef62, (q31_t)0x54076d91, (q31_t)0x3cc901c9,
-    (q31_t)0x54135c94, (q31_t)0x3cc511d9, (q31_t)0x541f4ad1, (q31_t)0x3cc11f90,
-    (q31_t)0x542b3846, (q31_t)0x3cbd2af0, (q31_t)0x543724f5, (q31_t)0x3cb933f9,
-    (q31_t)0x544310dd, (q31_t)0x3cb53aaa, (q31_t)0x544efbfc, (q31_t)0x3cb13f04,
-    (q31_t)0x545ae653, (q31_t)0x3cad4107, (q31_t)0x5466cfe1, (q31_t)0x3ca940b3,
-    (q31_t)0x5472b8a5, (q31_t)0x3ca53e09, (q31_t)0x547ea0a0, (q31_t)0x3ca13908,
-    (q31_t)0x548a87d1, (q31_t)0x3c9d31b0, (q31_t)0x54966e36, (q31_t)0x3c992803,
-    (q31_t)0x54a253d1, (q31_t)0x3c951bff, (q31_t)0x54ae38a0, (q31_t)0x3c910da5,
-    (q31_t)0x54ba1ca3, (q31_t)0x3c8cfcf6, (q31_t)0x54c5ffd9, (q31_t)0x3c88e9f1,
-    (q31_t)0x54d1e242, (q31_t)0x3c84d496, (q31_t)0x54ddc3de, (q31_t)0x3c80bce7,
-    (q31_t)0x54e9a4ac, (q31_t)0x3c7ca2e2, (q31_t)0x54f584ac, (q31_t)0x3c788688,
-    (q31_t)0x550163dc, (q31_t)0x3c7467d9, (q31_t)0x550d423d, (q31_t)0x3c7046d6,
-    (q31_t)0x55191fcf, (q31_t)0x3c6c237e, (q31_t)0x5524fc90, (q31_t)0x3c67fdd1,
-    (q31_t)0x5530d881, (q31_t)0x3c63d5d1, (q31_t)0x553cb3a0, (q31_t)0x3c5fab7c,
-    (q31_t)0x55488dee, (q31_t)0x3c5b7ed4, (q31_t)0x5554676a, (q31_t)0x3c574fd8,
-    (q31_t)0x55604013, (q31_t)0x3c531e88, (q31_t)0x556c17e9, (q31_t)0x3c4eeae5,
-    (q31_t)0x5577eeec, (q31_t)0x3c4ab4ef, (q31_t)0x5583c51b, (q31_t)0x3c467ca6,
-    (q31_t)0x558f9a76, (q31_t)0x3c42420a, (q31_t)0x559b6efb, (q31_t)0x3c3e051b,
-    (q31_t)0x55a742ac, (q31_t)0x3c39c5da, (q31_t)0x55b31587, (q31_t)0x3c358446,
-    (q31_t)0x55bee78c, (q31_t)0x3c314060, (q31_t)0x55cab8ba, (q31_t)0x3c2cfa28,
-    (q31_t)0x55d68911, (q31_t)0x3c28b19e, (q31_t)0x55e25890, (q31_t)0x3c2466c2,
-    (q31_t)0x55ee2738, (q31_t)0x3c201994, (q31_t)0x55f9f507, (q31_t)0x3c1bca16,
-    (q31_t)0x5605c1fd, (q31_t)0x3c177845, (q31_t)0x56118e1a, (q31_t)0x3c132424,
-    (q31_t)0x561d595d, (q31_t)0x3c0ecdb2, (q31_t)0x562923c5, (q31_t)0x3c0a74f0,
-    (q31_t)0x5634ed53, (q31_t)0x3c0619dc, (q31_t)0x5640b606, (q31_t)0x3c01bc78,
-    (q31_t)0x564c7ddd, (q31_t)0x3bfd5cc4, (q31_t)0x565844d8, (q31_t)0x3bf8fac0,
-    (q31_t)0x56640af7, (q31_t)0x3bf4966c, (q31_t)0x566fd039, (q31_t)0x3bf02fc9,
-    (q31_t)0x567b949d, (q31_t)0x3bebc6d5, (q31_t)0x56875823, (q31_t)0x3be75b93,
-    (q31_t)0x56931acb, (q31_t)0x3be2ee01, (q31_t)0x569edc94, (q31_t)0x3bde7e20,
-    (q31_t)0x56aa9d7e, (q31_t)0x3bda0bf0, (q31_t)0x56b65d88, (q31_t)0x3bd59771,
-    (q31_t)0x56c21cb2, (q31_t)0x3bd120a4, (q31_t)0x56cddafb, (q31_t)0x3bcca789,
-    (q31_t)0x56d99864, (q31_t)0x3bc82c1f, (q31_t)0x56e554ea, (q31_t)0x3bc3ae67,
-    (q31_t)0x56f1108f, (q31_t)0x3bbf2e62, (q31_t)0x56fccb51, (q31_t)0x3bbaac0e,
-    (q31_t)0x57088531, (q31_t)0x3bb6276e, (q31_t)0x57143e2d, (q31_t)0x3bb1a080,
-    (q31_t)0x571ff646, (q31_t)0x3bad1744, (q31_t)0x572bad7a, (q31_t)0x3ba88bbc,
-    (q31_t)0x573763c9, (q31_t)0x3ba3fde7, (q31_t)0x57431933, (q31_t)0x3b9f6dc5,
-    (q31_t)0x574ecdb8, (q31_t)0x3b9adb57, (q31_t)0x575a8157, (q31_t)0x3b96469d,
-    (q31_t)0x5766340f, (q31_t)0x3b91af97, (q31_t)0x5771e5e0, (q31_t)0x3b8d1644,
-    (q31_t)0x577d96ca, (q31_t)0x3b887aa6, (q31_t)0x578946cc, (q31_t)0x3b83dcbc,
-    (q31_t)0x5794f5e6, (q31_t)0x3b7f3c87, (q31_t)0x57a0a417, (q31_t)0x3b7a9a07,
-    (q31_t)0x57ac515f, (q31_t)0x3b75f53c, (q31_t)0x57b7fdbd, (q31_t)0x3b714e25,
-    (q31_t)0x57c3a931, (q31_t)0x3b6ca4c4, (q31_t)0x57cf53bb, (q31_t)0x3b67f919,
-    (q31_t)0x57dafd59, (q31_t)0x3b634b23, (q31_t)0x57e6a60c, (q31_t)0x3b5e9ae4,
-    (q31_t)0x57f24dd3, (q31_t)0x3b59e85a, (q31_t)0x57fdf4ae, (q31_t)0x3b553386,
-    (q31_t)0x58099a9c, (q31_t)0x3b507c69, (q31_t)0x58153f9d, (q31_t)0x3b4bc303,
-    (q31_t)0x5820e3b0, (q31_t)0x3b470753, (q31_t)0x582c86d5, (q31_t)0x3b42495a,
-    (q31_t)0x5838290c, (q31_t)0x3b3d8918, (q31_t)0x5843ca53, (q31_t)0x3b38c68e,
-    (q31_t)0x584f6aab, (q31_t)0x3b3401bb, (q31_t)0x585b0a13, (q31_t)0x3b2f3aa0,
-    (q31_t)0x5866a88a, (q31_t)0x3b2a713d, (q31_t)0x58724611, (q31_t)0x3b25a591,
-    (q31_t)0x587de2a7, (q31_t)0x3b20d79e, (q31_t)0x58897e4a, (q31_t)0x3b1c0764,
-    (q31_t)0x589518fc, (q31_t)0x3b1734e2, (q31_t)0x58a0b2bb, (q31_t)0x3b126019,
-    (q31_t)0x58ac4b87, (q31_t)0x3b0d8909, (q31_t)0x58b7e35f, (q31_t)0x3b08afb2,
-    (q31_t)0x58c37a44, (q31_t)0x3b03d414, (q31_t)0x58cf1034, (q31_t)0x3afef630,
-    (q31_t)0x58daa52f, (q31_t)0x3afa1605, (q31_t)0x58e63935, (q31_t)0x3af53395,
-    (q31_t)0x58f1cc45, (q31_t)0x3af04edf, (q31_t)0x58fd5e5f, (q31_t)0x3aeb67e3,
-    (q31_t)0x5908ef82, (q31_t)0x3ae67ea1, (q31_t)0x59147fae, (q31_t)0x3ae1931a,
-    (q31_t)0x59200ee3, (q31_t)0x3adca54e, (q31_t)0x592b9d1f, (q31_t)0x3ad7b53d,
-    (q31_t)0x59372a64, (q31_t)0x3ad2c2e8, (q31_t)0x5942b6af, (q31_t)0x3acdce4d,
-    (q31_t)0x594e4201, (q31_t)0x3ac8d76f, (q31_t)0x5959cc5a, (q31_t)0x3ac3de4c,
-    (q31_t)0x596555b8, (q31_t)0x3abee2e5, (q31_t)0x5970de1b, (q31_t)0x3ab9e53a,
-    (q31_t)0x597c6584, (q31_t)0x3ab4e54c, (q31_t)0x5987ebf0, (q31_t)0x3aafe31b,
-    (q31_t)0x59937161, (q31_t)0x3aaadea6, (q31_t)0x599ef5d6, (q31_t)0x3aa5d7ee,
-    (q31_t)0x59aa794d, (q31_t)0x3aa0cef3, (q31_t)0x59b5fbc8, (q31_t)0x3a9bc3b6,
-    (q31_t)0x59c17d44, (q31_t)0x3a96b636, (q31_t)0x59ccfdc2, (q31_t)0x3a91a674,
-    (q31_t)0x59d87d42, (q31_t)0x3a8c9470, (q31_t)0x59e3fbc3, (q31_t)0x3a87802a,
-    (q31_t)0x59ef7944, (q31_t)0x3a8269a3, (q31_t)0x59faf5c5, (q31_t)0x3a7d50da,
-    (q31_t)0x5a067145, (q31_t)0x3a7835cf, (q31_t)0x5a11ebc5, (q31_t)0x3a731884,
-    (q31_t)0x5a1d6544, (q31_t)0x3a6df8f8, (q31_t)0x5a28ddc0, (q31_t)0x3a68d72b,
-    (q31_t)0x5a34553b, (q31_t)0x3a63b31d, (q31_t)0x5a3fcbb3, (q31_t)0x3a5e8cd0,
-    (q31_t)0x5a4b4128, (q31_t)0x3a596442, (q31_t)0x5a56b599, (q31_t)0x3a543974,
-    (q31_t)0x5a622907, (q31_t)0x3a4f0c67, (q31_t)0x5a6d9b70, (q31_t)0x3a49dd1a,
-    (q31_t)0x5a790cd4, (q31_t)0x3a44ab8e, (q31_t)0x5a847d33, (q31_t)0x3a3f77c3,
-    (q31_t)0x5a8fec8c, (q31_t)0x3a3a41b9, (q31_t)0x5a9b5adf, (q31_t)0x3a350970,
-    (q31_t)0x5aa6c82b, (q31_t)0x3a2fcee8, (q31_t)0x5ab23471, (q31_t)0x3a2a9223,
-    (q31_t)0x5abd9faf, (q31_t)0x3a25531f, (q31_t)0x5ac909e5, (q31_t)0x3a2011de,
-    (q31_t)0x5ad47312, (q31_t)0x3a1ace5f, (q31_t)0x5adfdb37, (q31_t)0x3a1588a2,
-    (q31_t)0x5aeb4253, (q31_t)0x3a1040a8, (q31_t)0x5af6a865, (q31_t)0x3a0af671,
-    (q31_t)0x5b020d6c, (q31_t)0x3a05a9fd, (q31_t)0x5b0d716a, (q31_t)0x3a005b4d,
-    (q31_t)0x5b18d45c, (q31_t)0x39fb0a60, (q31_t)0x5b243643, (q31_t)0x39f5b737,
-    (q31_t)0x5b2f971e, (q31_t)0x39f061d2, (q31_t)0x5b3af6ec, (q31_t)0x39eb0a31,
-    (q31_t)0x5b4655ae, (q31_t)0x39e5b054, (q31_t)0x5b51b363, (q31_t)0x39e0543c,
-    (q31_t)0x5b5d100a, (q31_t)0x39daf5e8, (q31_t)0x5b686ba3, (q31_t)0x39d5955a,
-    (q31_t)0x5b73c62d, (q31_t)0x39d03291, (q31_t)0x5b7f1fa9, (q31_t)0x39cacd8d,
-    (q31_t)0x5b8a7815, (q31_t)0x39c5664f, (q31_t)0x5b95cf71, (q31_t)0x39bffcd7,
-    (q31_t)0x5ba125bd, (q31_t)0x39ba9125, (q31_t)0x5bac7af9, (q31_t)0x39b52339,
-    (q31_t)0x5bb7cf23, (q31_t)0x39afb313, (q31_t)0x5bc3223c, (q31_t)0x39aa40b4,
-    (q31_t)0x5bce7442, (q31_t)0x39a4cc1c, (q31_t)0x5bd9c537, (q31_t)0x399f554b,
-    (q31_t)0x5be51518, (q31_t)0x3999dc42, (q31_t)0x5bf063e6, (q31_t)0x399460ff,
-    (q31_t)0x5bfbb1a0, (q31_t)0x398ee385, (q31_t)0x5c06fe46, (q31_t)0x398963d2,
-    (q31_t)0x5c1249d8, (q31_t)0x3983e1e8, (q31_t)0x5c1d9454, (q31_t)0x397e5dc6,
-    (q31_t)0x5c28ddbb, (q31_t)0x3978d76c, (q31_t)0x5c34260c, (q31_t)0x39734edc,
-    (q31_t)0x5c3f6d47, (q31_t)0x396dc414, (q31_t)0x5c4ab36b, (q31_t)0x39683715,
-    (q31_t)0x5c55f878, (q31_t)0x3962a7e0, (q31_t)0x5c613c6d, (q31_t)0x395d1675,
-    (q31_t)0x5c6c7f4a, (q31_t)0x395782d3, (q31_t)0x5c77c10e, (q31_t)0x3951ecfc,
-    (q31_t)0x5c8301b9, (q31_t)0x394c54ee, (q31_t)0x5c8e414b, (q31_t)0x3946baac,
-    (q31_t)0x5c997fc4, (q31_t)0x39411e33, (q31_t)0x5ca4bd21, (q31_t)0x393b7f86,
-    (q31_t)0x5caff965, (q31_t)0x3935dea4, (q31_t)0x5cbb348d, (q31_t)0x39303b8e,
-    (q31_t)0x5cc66e99, (q31_t)0x392a9642, (q31_t)0x5cd1a78a, (q31_t)0x3924eec3,
-    (q31_t)0x5cdcdf5e, (q31_t)0x391f4510, (q31_t)0x5ce81615, (q31_t)0x39199929,
-    (q31_t)0x5cf34baf, (q31_t)0x3913eb0e, (q31_t)0x5cfe802b, (q31_t)0x390e3ac0,
-    (q31_t)0x5d09b389, (q31_t)0x3908883f, (q31_t)0x5d14e5c9, (q31_t)0x3902d38b,
-    (q31_t)0x5d2016e9, (q31_t)0x38fd1ca4, (q31_t)0x5d2b46ea, (q31_t)0x38f7638b,
-    (q31_t)0x5d3675cb, (q31_t)0x38f1a840, (q31_t)0x5d41a38c, (q31_t)0x38ebeac2,
-    (q31_t)0x5d4cd02c, (q31_t)0x38e62b13, (q31_t)0x5d57fbaa, (q31_t)0x38e06932,
-    (q31_t)0x5d632608, (q31_t)0x38daa520, (q31_t)0x5d6e4f43, (q31_t)0x38d4dedd,
-    (q31_t)0x5d79775c, (q31_t)0x38cf1669, (q31_t)0x5d849e51, (q31_t)0x38c94bc4,
-    (q31_t)0x5d8fc424, (q31_t)0x38c37eef, (q31_t)0x5d9ae8d2, (q31_t)0x38bdafea,
-    (q31_t)0x5da60c5d, (q31_t)0x38b7deb4, (q31_t)0x5db12ec3, (q31_t)0x38b20b4f,
-    (q31_t)0x5dbc5004, (q31_t)0x38ac35ba, (q31_t)0x5dc7701f, (q31_t)0x38a65df6,
-    (q31_t)0x5dd28f15, (q31_t)0x38a08402, (q31_t)0x5dddace4, (q31_t)0x389aa7e0,
-    (q31_t)0x5de8c98c, (q31_t)0x3894c98f, (q31_t)0x5df3e50d, (q31_t)0x388ee910,
-    (q31_t)0x5dfeff67, (q31_t)0x38890663, (q31_t)0x5e0a1898, (q31_t)0x38832187,
-    (q31_t)0x5e1530a1, (q31_t)0x387d3a7e, (q31_t)0x5e204781, (q31_t)0x38775147,
-    (q31_t)0x5e2b5d38, (q31_t)0x387165e3, (q31_t)0x5e3671c5, (q31_t)0x386b7852,
-    (q31_t)0x5e418528, (q31_t)0x38658894, (q31_t)0x5e4c9760, (q31_t)0x385f96a9,
-    (q31_t)0x5e57a86d, (q31_t)0x3859a292, (q31_t)0x5e62b84f, (q31_t)0x3853ac4f,
-    (q31_t)0x5e6dc705, (q31_t)0x384db3e0, (q31_t)0x5e78d48e, (q31_t)0x3847b946,
-    (q31_t)0x5e83e0eb, (q31_t)0x3841bc7f, (q31_t)0x5e8eec1b, (q31_t)0x383bbd8e,
-    (q31_t)0x5e99f61d, (q31_t)0x3835bc71, (q31_t)0x5ea4fef0, (q31_t)0x382fb92a,
-    (q31_t)0x5eb00696, (q31_t)0x3829b3b9, (q31_t)0x5ebb0d0d, (q31_t)0x3823ac1d,
-    (q31_t)0x5ec61254, (q31_t)0x381da256, (q31_t)0x5ed1166b, (q31_t)0x38179666,
-    (q31_t)0x5edc1953, (q31_t)0x3811884d, (q31_t)0x5ee71b0a, (q31_t)0x380b780a,
-    (q31_t)0x5ef21b90, (q31_t)0x3805659e, (q31_t)0x5efd1ae4, (q31_t)0x37ff5109,
-    (q31_t)0x5f081907, (q31_t)0x37f93a4b, (q31_t)0x5f1315f7, (q31_t)0x37f32165,
-    (q31_t)0x5f1e11b5, (q31_t)0x37ed0657, (q31_t)0x5f290c3f, (q31_t)0x37e6e921,
-    (q31_t)0x5f340596, (q31_t)0x37e0c9c3, (q31_t)0x5f3efdb9, (q31_t)0x37daa83d,
-    (q31_t)0x5f49f4a8, (q31_t)0x37d48490, (q31_t)0x5f54ea62, (q31_t)0x37ce5ebd,
-    (q31_t)0x5f5fdee6, (q31_t)0x37c836c2, (q31_t)0x5f6ad235, (q31_t)0x37c20ca1,
-    (q31_t)0x5f75c44e, (q31_t)0x37bbe05a, (q31_t)0x5f80b531, (q31_t)0x37b5b1ec,
-    (q31_t)0x5f8ba4dc, (q31_t)0x37af8159, (q31_t)0x5f969350, (q31_t)0x37a94ea0,
-    (q31_t)0x5fa1808c, (q31_t)0x37a319c2, (q31_t)0x5fac6c91, (q31_t)0x379ce2be,
-    (q31_t)0x5fb7575c, (q31_t)0x3796a996, (q31_t)0x5fc240ef, (q31_t)0x37906e49,
-    (q31_t)0x5fcd2948, (q31_t)0x378a30d8, (q31_t)0x5fd81067, (q31_t)0x3783f143,
-    (q31_t)0x5fe2f64c, (q31_t)0x377daf89, (q31_t)0x5feddaf6, (q31_t)0x37776bac,
-    (q31_t)0x5ff8be65, (q31_t)0x377125ac, (q31_t)0x6003a099, (q31_t)0x376add88,
-    (q31_t)0x600e8190, (q31_t)0x37649341, (q31_t)0x6019614c, (q31_t)0x375e46d8,
-    (q31_t)0x60243fca, (q31_t)0x3757f84c, (q31_t)0x602f1d0b, (q31_t)0x3751a79e,
-    (q31_t)0x6039f90f, (q31_t)0x374b54ce, (q31_t)0x6044d3d4, (q31_t)0x3744ffdd,
-    (q31_t)0x604fad5b, (q31_t)0x373ea8ca, (q31_t)0x605a85a3, (q31_t)0x37384f95,
-    (q31_t)0x60655cac, (q31_t)0x3731f440, (q31_t)0x60703275, (q31_t)0x372b96ca,
-    (q31_t)0x607b06fe, (q31_t)0x37253733, (q31_t)0x6085da46, (q31_t)0x371ed57c,
-    (q31_t)0x6090ac4d, (q31_t)0x371871a5, (q31_t)0x609b7d13, (q31_t)0x37120bae,
-    (q31_t)0x60a64c97, (q31_t)0x370ba398, (q31_t)0x60b11ad9, (q31_t)0x37053962,
-    (q31_t)0x60bbe7d8, (q31_t)0x36fecd0e, (q31_t)0x60c6b395, (q31_t)0x36f85e9a,
-    (q31_t)0x60d17e0d, (q31_t)0x36f1ee09, (q31_t)0x60dc4742, (q31_t)0x36eb7b58,
-    (q31_t)0x60e70f32, (q31_t)0x36e5068a, (q31_t)0x60f1d5de, (q31_t)0x36de8f9e,
-    (q31_t)0x60fc9b44, (q31_t)0x36d81695, (q31_t)0x61075f65, (q31_t)0x36d19b6e,
-    (q31_t)0x61122240, (q31_t)0x36cb1e2a, (q31_t)0x611ce3d5, (q31_t)0x36c49ec9,
-    (q31_t)0x6127a423, (q31_t)0x36be1d4c, (q31_t)0x61326329, (q31_t)0x36b799b3,
-    (q31_t)0x613d20e8, (q31_t)0x36b113fd, (q31_t)0x6147dd5f, (q31_t)0x36aa8c2c,
-    (q31_t)0x6152988d, (q31_t)0x36a4023f, (q31_t)0x615d5273, (q31_t)0x369d7637,
-    (q31_t)0x61680b0f, (q31_t)0x3696e814, (q31_t)0x6172c262, (q31_t)0x369057d6,
-    (q31_t)0x617d786a, (q31_t)0x3689c57d, (q31_t)0x61882d28, (q31_t)0x3683310b,
-    (q31_t)0x6192e09b, (q31_t)0x367c9a7e, (q31_t)0x619d92c2, (q31_t)0x367601d7,
-    (q31_t)0x61a8439e, (q31_t)0x366f6717, (q31_t)0x61b2f32e, (q31_t)0x3668ca3e,
-    (q31_t)0x61bda171, (q31_t)0x36622b4c, (q31_t)0x61c84e67, (q31_t)0x365b8a41,
-    (q31_t)0x61d2fa0f, (q31_t)0x3654e71d, (q31_t)0x61dda46a, (q31_t)0x364e41e2,
-    (q31_t)0x61e84d76, (q31_t)0x36479a8e, (q31_t)0x61f2f534, (q31_t)0x3640f123,
-    (q31_t)0x61fd9ba3, (q31_t)0x363a45a0, (q31_t)0x620840c2, (q31_t)0x36339806,
-    (q31_t)0x6212e492, (q31_t)0x362ce855, (q31_t)0x621d8711, (q31_t)0x3626368d,
-    (q31_t)0x6228283f, (q31_t)0x361f82af, (q31_t)0x6232c81c, (q31_t)0x3618ccba,
-    (q31_t)0x623d66a8, (q31_t)0x361214b0, (q31_t)0x624803e2, (q31_t)0x360b5a90,
-    (q31_t)0x62529fca, (q31_t)0x36049e5b, (q31_t)0x625d3a5e, (q31_t)0x35fde011,
-    (q31_t)0x6267d3a0, (q31_t)0x35f71fb1, (q31_t)0x62726b8e, (q31_t)0x35f05d3d,
-    (q31_t)0x627d0228, (q31_t)0x35e998b5, (q31_t)0x6287976e, (q31_t)0x35e2d219,
-    (q31_t)0x62922b5e, (q31_t)0x35dc0968, (q31_t)0x629cbdfa, (q31_t)0x35d53ea5,
-    (q31_t)0x62a74f40, (q31_t)0x35ce71ce, (q31_t)0x62b1df30, (q31_t)0x35c7a2e3,
-    (q31_t)0x62bc6dca, (q31_t)0x35c0d1e7, (q31_t)0x62c6fb0c, (q31_t)0x35b9fed7,
-    (q31_t)0x62d186f8, (q31_t)0x35b329b5, (q31_t)0x62dc118c, (q31_t)0x35ac5282,
-    (q31_t)0x62e69ac8, (q31_t)0x35a5793c, (q31_t)0x62f122ab, (q31_t)0x359e9de5,
-    (q31_t)0x62fba936, (q31_t)0x3597c07d, (q31_t)0x63062e67, (q31_t)0x3590e104,
-    (q31_t)0x6310b23e, (q31_t)0x3589ff7a, (q31_t)0x631b34bc, (q31_t)0x35831be0,
-    (q31_t)0x6325b5df, (q31_t)0x357c3636, (q31_t)0x633035a7, (q31_t)0x35754e7c,
-    (q31_t)0x633ab414, (q31_t)0x356e64b2, (q31_t)0x63453125, (q31_t)0x356778d9,
-    (q31_t)0x634facda, (q31_t)0x35608af1, (q31_t)0x635a2733, (q31_t)0x35599afa,
-    (q31_t)0x6364a02e, (q31_t)0x3552a8f4, (q31_t)0x636f17cc, (q31_t)0x354bb4e1,
-    (q31_t)0x63798e0d, (q31_t)0x3544bebf, (q31_t)0x638402ef, (q31_t)0x353dc68f,
-    (q31_t)0x638e7673, (q31_t)0x3536cc52, (q31_t)0x6398e898, (q31_t)0x352fd008,
-    (q31_t)0x63a3595e, (q31_t)0x3528d1b1, (q31_t)0x63adc8c4, (q31_t)0x3521d14d,
-    (q31_t)0x63b836ca, (q31_t)0x351acedd, (q31_t)0x63c2a36f, (q31_t)0x3513ca60,
-    (q31_t)0x63cd0eb3, (q31_t)0x350cc3d8, (q31_t)0x63d77896, (q31_t)0x3505bb44,
-    (q31_t)0x63e1e117, (q31_t)0x34feb0a5, (q31_t)0x63ec4837, (q31_t)0x34f7a3fb,
-    (q31_t)0x63f6adf3, (q31_t)0x34f09546, (q31_t)0x6401124d, (q31_t)0x34e98487,
-    (q31_t)0x640b7543, (q31_t)0x34e271bd, (q31_t)0x6415d6d5, (q31_t)0x34db5cea,
-    (q31_t)0x64203704, (q31_t)0x34d4460c, (q31_t)0x642a95ce, (q31_t)0x34cd2d26,
-    (q31_t)0x6434f332, (q31_t)0x34c61236, (q31_t)0x643f4f32, (q31_t)0x34bef53d,
-    (q31_t)0x6449a9cc, (q31_t)0x34b7d63c, (q31_t)0x645402ff, (q31_t)0x34b0b533,
-    (q31_t)0x645e5acc, (q31_t)0x34a99221, (q31_t)0x6468b132, (q31_t)0x34a26d08,
-    (q31_t)0x64730631, (q31_t)0x349b45e7, (q31_t)0x647d59c8, (q31_t)0x34941cbf,
-    (q31_t)0x6487abf7, (q31_t)0x348cf190, (q31_t)0x6491fcbe, (q31_t)0x3485c45b,
-    (q31_t)0x649c4c1b, (q31_t)0x347e951f, (q31_t)0x64a69a0f, (q31_t)0x347763dd,
-    (q31_t)0x64b0e699, (q31_t)0x34703095, (q31_t)0x64bb31ba, (q31_t)0x3468fb47,
-    (q31_t)0x64c57b6f, (q31_t)0x3461c3f5, (q31_t)0x64cfc3ba, (q31_t)0x345a8a9d,
-    (q31_t)0x64da0a9a, (q31_t)0x34534f41, (q31_t)0x64e4500e, (q31_t)0x344c11e0,
-    (q31_t)0x64ee9415, (q31_t)0x3444d27b, (q31_t)0x64f8d6b0, (q31_t)0x343d9112,
-    (q31_t)0x650317df, (q31_t)0x34364da6, (q31_t)0x650d57a0, (q31_t)0x342f0836,
-    (q31_t)0x651795f3, (q31_t)0x3427c0c3, (q31_t)0x6521d2d8, (q31_t)0x3420774d,
-    (q31_t)0x652c0e4f, (q31_t)0x34192bd5, (q31_t)0x65364857, (q31_t)0x3411de5b,
-    (q31_t)0x654080ef, (q31_t)0x340a8edf, (q31_t)0x654ab818, (q31_t)0x34033d61,
-    (q31_t)0x6554edd1, (q31_t)0x33fbe9e2, (q31_t)0x655f2219, (q31_t)0x33f49462,
-    (q31_t)0x656954f1, (q31_t)0x33ed3ce1, (q31_t)0x65738657, (q31_t)0x33e5e360,
-    (q31_t)0x657db64c, (q31_t)0x33de87de, (q31_t)0x6587e4cf, (q31_t)0x33d72a5d,
-    (q31_t)0x659211df, (q31_t)0x33cfcadc, (q31_t)0x659c3d7c, (q31_t)0x33c8695b,
-    (q31_t)0x65a667a7, (q31_t)0x33c105db, (q31_t)0x65b0905d, (q31_t)0x33b9a05d,
-    (q31_t)0x65bab7a0, (q31_t)0x33b238e0, (q31_t)0x65c4dd6e, (q31_t)0x33aacf65,
-    (q31_t)0x65cf01c8, (q31_t)0x33a363ec, (q31_t)0x65d924ac, (q31_t)0x339bf675,
-    (q31_t)0x65e3461b, (q31_t)0x33948701, (q31_t)0x65ed6614, (q31_t)0x338d1590,
-    (q31_t)0x65f78497, (q31_t)0x3385a222, (q31_t)0x6601a1a2, (q31_t)0x337e2cb7,
-    (q31_t)0x660bbd37, (q31_t)0x3376b551, (q31_t)0x6615d754, (q31_t)0x336f3bee,
-    (q31_t)0x661feffa, (q31_t)0x3367c090, (q31_t)0x662a0727, (q31_t)0x33604336,
-    (q31_t)0x66341cdb, (q31_t)0x3358c3e2, (q31_t)0x663e3117, (q31_t)0x33514292,
-    (q31_t)0x664843d9, (q31_t)0x3349bf48, (q31_t)0x66525521, (q31_t)0x33423a04,
-    (q31_t)0x665c64ef, (q31_t)0x333ab2c6, (q31_t)0x66667342, (q31_t)0x3333298f,
-    (q31_t)0x6670801a, (q31_t)0x332b9e5e, (q31_t)0x667a8b77, (q31_t)0x33241134,
-    (q31_t)0x66849558, (q31_t)0x331c8211, (q31_t)0x668e9dbd, (q31_t)0x3314f0f6,
-    (q31_t)0x6698a4a6, (q31_t)0x330d5de3, (q31_t)0x66a2aa11, (q31_t)0x3305c8d7,
-    (q31_t)0x66acadff, (q31_t)0x32fe31d5, (q31_t)0x66b6b070, (q31_t)0x32f698db,
-    (q31_t)0x66c0b162, (q31_t)0x32eefdea, (q31_t)0x66cab0d6, (q31_t)0x32e76102,
-    (q31_t)0x66d4aecb, (q31_t)0x32dfc224, (q31_t)0x66deab41, (q31_t)0x32d82150,
-    (q31_t)0x66e8a637, (q31_t)0x32d07e85, (q31_t)0x66f29fad, (q31_t)0x32c8d9c6,
-    (q31_t)0x66fc97a3, (q31_t)0x32c13311, (q31_t)0x67068e18, (q31_t)0x32b98a67,
-    (q31_t)0x6710830c, (q31_t)0x32b1dfc9, (q31_t)0x671a767e, (q31_t)0x32aa3336,
-    (q31_t)0x6724686e, (q31_t)0x32a284b0, (q31_t)0x672e58dc, (q31_t)0x329ad435,
-    (q31_t)0x673847c8, (q31_t)0x329321c7, (q31_t)0x67423530, (q31_t)0x328b6d66,
-    (q31_t)0x674c2115, (q31_t)0x3283b712, (q31_t)0x67560b76, (q31_t)0x327bfecc,
-    (q31_t)0x675ff452, (q31_t)0x32744493, (q31_t)0x6769dbaa, (q31_t)0x326c8868,
-    (q31_t)0x6773c17d, (q31_t)0x3264ca4c, (q31_t)0x677da5cb, (q31_t)0x325d0a3e,
-    (q31_t)0x67878893, (q31_t)0x32554840, (q31_t)0x679169d5, (q31_t)0x324d8450,
-    (q31_t)0x679b4990, (q31_t)0x3245be70, (q31_t)0x67a527c4, (q31_t)0x323df6a0,
-    (q31_t)0x67af0472, (q31_t)0x32362ce0, (q31_t)0x67b8df97, (q31_t)0x322e6130,
-    (q31_t)0x67c2b934, (q31_t)0x32269391, (q31_t)0x67cc9149, (q31_t)0x321ec403,
-    (q31_t)0x67d667d5, (q31_t)0x3216f287, (q31_t)0x67e03cd8, (q31_t)0x320f1f1c,
-    (q31_t)0x67ea1052, (q31_t)0x320749c3, (q31_t)0x67f3e241, (q31_t)0x31ff727c,
-    (q31_t)0x67fdb2a7, (q31_t)0x31f79948, (q31_t)0x68078181, (q31_t)0x31efbe27,
-    (q31_t)0x68114ed0, (q31_t)0x31e7e118, (q31_t)0x681b1a94, (q31_t)0x31e0021e,
-    (q31_t)0x6824e4cc, (q31_t)0x31d82137, (q31_t)0x682ead78, (q31_t)0x31d03e64,
-    (q31_t)0x68387498, (q31_t)0x31c859a5, (q31_t)0x68423a2a, (q31_t)0x31c072fb,
-    (q31_t)0x684bfe2f, (q31_t)0x31b88a66, (q31_t)0x6855c0a6, (q31_t)0x31b09fe7,
-    (q31_t)0x685f8190, (q31_t)0x31a8b37c, (q31_t)0x686940ea, (q31_t)0x31a0c528,
-    (q31_t)0x6872feb6, (q31_t)0x3198d4ea, (q31_t)0x687cbaf3, (q31_t)0x3190e2c3,
-    (q31_t)0x688675a0, (q31_t)0x3188eeb2, (q31_t)0x68902ebd, (q31_t)0x3180f8b8,
-    (q31_t)0x6899e64a, (q31_t)0x317900d6, (q31_t)0x68a39c46, (q31_t)0x3171070c,
-    (q31_t)0x68ad50b1, (q31_t)0x31690b59, (q31_t)0x68b7038b, (q31_t)0x31610dbf,
-    (q31_t)0x68c0b4d2, (q31_t)0x31590e3e, (q31_t)0x68ca6488, (q31_t)0x31510cd5,
-    (q31_t)0x68d412ab, (q31_t)0x31490986, (q31_t)0x68ddbf3b, (q31_t)0x31410450,
-    (q31_t)0x68e76a37, (q31_t)0x3138fd35, (q31_t)0x68f113a0, (q31_t)0x3130f433,
-    (q31_t)0x68fabb75, (q31_t)0x3128e94c, (q31_t)0x690461b5, (q31_t)0x3120dc80,
-    (q31_t)0x690e0661, (q31_t)0x3118cdcf, (q31_t)0x6917a977, (q31_t)0x3110bd39,
-    (q31_t)0x69214af8, (q31_t)0x3108aabf, (q31_t)0x692aeae3, (q31_t)0x31009661,
-    (q31_t)0x69348937, (q31_t)0x30f8801f, (q31_t)0x693e25f5, (q31_t)0x30f067fb,
-    (q31_t)0x6947c11c, (q31_t)0x30e84df3, (q31_t)0x69515aab, (q31_t)0x30e03208,
-    (q31_t)0x695af2a3, (q31_t)0x30d8143b, (q31_t)0x69648902, (q31_t)0x30cff48c,
-    (q31_t)0x696e1dc9, (q31_t)0x30c7d2fb, (q31_t)0x6977b0f7, (q31_t)0x30bfaf89,
-    (q31_t)0x6981428c, (q31_t)0x30b78a36, (q31_t)0x698ad287, (q31_t)0x30af6302,
-    (q31_t)0x699460e8, (q31_t)0x30a739ed, (q31_t)0x699dedaf, (q31_t)0x309f0ef8,
-    (q31_t)0x69a778db, (q31_t)0x3096e223, (q31_t)0x69b1026c, (q31_t)0x308eb36f,
-    (q31_t)0x69ba8a61, (q31_t)0x308682dc, (q31_t)0x69c410ba, (q31_t)0x307e5069,
-    (q31_t)0x69cd9578, (q31_t)0x30761c18, (q31_t)0x69d71899, (q31_t)0x306de5e9,
-    (q31_t)0x69e09a1c, (q31_t)0x3065addb, (q31_t)0x69ea1a03, (q31_t)0x305d73f0,
-    (q31_t)0x69f3984c, (q31_t)0x30553828, (q31_t)0x69fd14f6, (q31_t)0x304cfa83,
-    (q31_t)0x6a069003, (q31_t)0x3044bb00, (q31_t)0x6a100970, (q31_t)0x303c79a2,
-    (q31_t)0x6a19813f, (q31_t)0x30343667, (q31_t)0x6a22f76e, (q31_t)0x302bf151,
-    (q31_t)0x6a2c6bfd, (q31_t)0x3023aa5f, (q31_t)0x6a35deeb, (q31_t)0x301b6193,
-    (q31_t)0x6a3f503a, (q31_t)0x301316eb, (q31_t)0x6a48bfe7, (q31_t)0x300aca69,
-    (q31_t)0x6a522df3, (q31_t)0x30027c0c, (q31_t)0x6a5b9a5d, (q31_t)0x2ffa2bd6,
-    (q31_t)0x6a650525, (q31_t)0x2ff1d9c7, (q31_t)0x6a6e6e4b, (q31_t)0x2fe985de,
-    (q31_t)0x6a77d5ce, (q31_t)0x2fe1301c, (q31_t)0x6a813bae, (q31_t)0x2fd8d882,
-    (q31_t)0x6a8a9fea, (q31_t)0x2fd07f0f, (q31_t)0x6a940283, (q31_t)0x2fc823c5,
-    (q31_t)0x6a9d6377, (q31_t)0x2fbfc6a3, (q31_t)0x6aa6c2c6, (q31_t)0x2fb767aa,
-    (q31_t)0x6ab02071, (q31_t)0x2faf06da, (q31_t)0x6ab97c77, (q31_t)0x2fa6a433,
-    (q31_t)0x6ac2d6d6, (q31_t)0x2f9e3fb6, (q31_t)0x6acc2f90, (q31_t)0x2f95d963,
-    (q31_t)0x6ad586a3, (q31_t)0x2f8d713a, (q31_t)0x6adedc10, (q31_t)0x2f85073c,
-    (q31_t)0x6ae82fd5, (q31_t)0x2f7c9b69, (q31_t)0x6af181f3, (q31_t)0x2f742dc1,
-    (q31_t)0x6afad269, (q31_t)0x2f6bbe45, (q31_t)0x6b042137, (q31_t)0x2f634cf5,
-    (q31_t)0x6b0d6e5c, (q31_t)0x2f5ad9d1, (q31_t)0x6b16b9d9, (q31_t)0x2f5264da,
-    (q31_t)0x6b2003ac, (q31_t)0x2f49ee0f, (q31_t)0x6b294bd5, (q31_t)0x2f417573,
-    (q31_t)0x6b329255, (q31_t)0x2f38fb03, (q31_t)0x6b3bd72a, (q31_t)0x2f307ec2,
-    (q31_t)0x6b451a55, (q31_t)0x2f2800af, (q31_t)0x6b4e5bd4, (q31_t)0x2f1f80ca,
-    (q31_t)0x6b579ba8, (q31_t)0x2f16ff14, (q31_t)0x6b60d9d0, (q31_t)0x2f0e7b8e,
-    (q31_t)0x6b6a164d, (q31_t)0x2f05f637, (q31_t)0x6b73511c, (q31_t)0x2efd6f10,
-    (q31_t)0x6b7c8a3f, (q31_t)0x2ef4e619, (q31_t)0x6b85c1b5, (q31_t)0x2eec5b53,
-    (q31_t)0x6b8ef77d, (q31_t)0x2ee3cebe, (q31_t)0x6b982b97, (q31_t)0x2edb405a,
-    (q31_t)0x6ba15e03, (q31_t)0x2ed2b027, (q31_t)0x6baa8ec0, (q31_t)0x2eca1e27,
-    (q31_t)0x6bb3bdce, (q31_t)0x2ec18a58, (q31_t)0x6bbceb2d, (q31_t)0x2eb8f4bc,
-    (q31_t)0x6bc616dd, (q31_t)0x2eb05d53, (q31_t)0x6bcf40dc, (q31_t)0x2ea7c41e,
-    (q31_t)0x6bd8692b, (q31_t)0x2e9f291b, (q31_t)0x6be18fc9, (q31_t)0x2e968c4d,
-    (q31_t)0x6beab4b6, (q31_t)0x2e8dedb3, (q31_t)0x6bf3d7f2, (q31_t)0x2e854d4d,
-    (q31_t)0x6bfcf97c, (q31_t)0x2e7cab1c, (q31_t)0x6c061953, (q31_t)0x2e740720,
-    (q31_t)0x6c0f3779, (q31_t)0x2e6b615a, (q31_t)0x6c1853eb, (q31_t)0x2e62b9ca,
-    (q31_t)0x6c216eaa, (q31_t)0x2e5a1070, (q31_t)0x6c2a87b6, (q31_t)0x2e51654c,
-    (q31_t)0x6c339f0e, (q31_t)0x2e48b860, (q31_t)0x6c3cb4b1, (q31_t)0x2e4009aa,
-    (q31_t)0x6c45c8a0, (q31_t)0x2e37592c, (q31_t)0x6c4edada, (q31_t)0x2e2ea6e6,
-    (q31_t)0x6c57eb5e, (q31_t)0x2e25f2d8, (q31_t)0x6c60fa2d, (q31_t)0x2e1d3d03,
-    (q31_t)0x6c6a0746, (q31_t)0x2e148566, (q31_t)0x6c7312a9, (q31_t)0x2e0bcc03,
-    (q31_t)0x6c7c1c55, (q31_t)0x2e0310d9, (q31_t)0x6c85244a, (q31_t)0x2dfa53e9,
-    (q31_t)0x6c8e2a87, (q31_t)0x2df19534, (q31_t)0x6c972f0d, (q31_t)0x2de8d4b8,
-    (q31_t)0x6ca031da, (q31_t)0x2de01278, (q31_t)0x6ca932ef, (q31_t)0x2dd74e73,
-    (q31_t)0x6cb2324c, (q31_t)0x2dce88aa, (q31_t)0x6cbb2fef, (q31_t)0x2dc5c11c,
-    (q31_t)0x6cc42bd9, (q31_t)0x2dbcf7cb, (q31_t)0x6ccd2609, (q31_t)0x2db42cb6,
-    (q31_t)0x6cd61e7f, (q31_t)0x2dab5fdf, (q31_t)0x6cdf153a, (q31_t)0x2da29144,
-    (q31_t)0x6ce80a3a, (q31_t)0x2d99c0e7, (q31_t)0x6cf0fd80, (q31_t)0x2d90eec8,
-    (q31_t)0x6cf9ef09, (q31_t)0x2d881ae8, (q31_t)0x6d02ded7, (q31_t)0x2d7f4545,
-    (q31_t)0x6d0bcce8, (q31_t)0x2d766de2, (q31_t)0x6d14b93d, (q31_t)0x2d6d94bf,
-    (q31_t)0x6d1da3d5, (q31_t)0x2d64b9da, (q31_t)0x6d268cb0, (q31_t)0x2d5bdd36,
-    (q31_t)0x6d2f73cd, (q31_t)0x2d52fed2, (q31_t)0x6d38592c, (q31_t)0x2d4a1eaf,
-    (q31_t)0x6d413ccd, (q31_t)0x2d413ccd, (q31_t)0x6d4a1eaf, (q31_t)0x2d38592c,
-    (q31_t)0x6d52fed2, (q31_t)0x2d2f73cd, (q31_t)0x6d5bdd36, (q31_t)0x2d268cb0,
-    (q31_t)0x6d64b9da, (q31_t)0x2d1da3d5, (q31_t)0x6d6d94bf, (q31_t)0x2d14b93d,
-    (q31_t)0x6d766de2, (q31_t)0x2d0bcce8, (q31_t)0x6d7f4545, (q31_t)0x2d02ded7,
-    (q31_t)0x6d881ae8, (q31_t)0x2cf9ef09, (q31_t)0x6d90eec8, (q31_t)0x2cf0fd80,
-    (q31_t)0x6d99c0e7, (q31_t)0x2ce80a3a, (q31_t)0x6da29144, (q31_t)0x2cdf153a,
-    (q31_t)0x6dab5fdf, (q31_t)0x2cd61e7f, (q31_t)0x6db42cb6, (q31_t)0x2ccd2609,
-    (q31_t)0x6dbcf7cb, (q31_t)0x2cc42bd9, (q31_t)0x6dc5c11c, (q31_t)0x2cbb2fef,
-    (q31_t)0x6dce88aa, (q31_t)0x2cb2324c, (q31_t)0x6dd74e73, (q31_t)0x2ca932ef,
-    (q31_t)0x6de01278, (q31_t)0x2ca031da, (q31_t)0x6de8d4b8, (q31_t)0x2c972f0d,
-    (q31_t)0x6df19534, (q31_t)0x2c8e2a87, (q31_t)0x6dfa53e9, (q31_t)0x2c85244a,
-    (q31_t)0x6e0310d9, (q31_t)0x2c7c1c55, (q31_t)0x6e0bcc03, (q31_t)0x2c7312a9,
-    (q31_t)0x6e148566, (q31_t)0x2c6a0746, (q31_t)0x6e1d3d03, (q31_t)0x2c60fa2d,
-    (q31_t)0x6e25f2d8, (q31_t)0x2c57eb5e, (q31_t)0x6e2ea6e6, (q31_t)0x2c4edada,
-    (q31_t)0x6e37592c, (q31_t)0x2c45c8a0, (q31_t)0x6e4009aa, (q31_t)0x2c3cb4b1,
-    (q31_t)0x6e48b860, (q31_t)0x2c339f0e, (q31_t)0x6e51654c, (q31_t)0x2c2a87b6,
-    (q31_t)0x6e5a1070, (q31_t)0x2c216eaa, (q31_t)0x6e62b9ca, (q31_t)0x2c1853eb,
-    (q31_t)0x6e6b615a, (q31_t)0x2c0f3779, (q31_t)0x6e740720, (q31_t)0x2c061953,
-    (q31_t)0x6e7cab1c, (q31_t)0x2bfcf97c, (q31_t)0x6e854d4d, (q31_t)0x2bf3d7f2,
-    (q31_t)0x6e8dedb3, (q31_t)0x2beab4b6, (q31_t)0x6e968c4d, (q31_t)0x2be18fc9,
-    (q31_t)0x6e9f291b, (q31_t)0x2bd8692b, (q31_t)0x6ea7c41e, (q31_t)0x2bcf40dc,
-    (q31_t)0x6eb05d53, (q31_t)0x2bc616dd, (q31_t)0x6eb8f4bc, (q31_t)0x2bbceb2d,
-    (q31_t)0x6ec18a58, (q31_t)0x2bb3bdce, (q31_t)0x6eca1e27, (q31_t)0x2baa8ec0,
-    (q31_t)0x6ed2b027, (q31_t)0x2ba15e03, (q31_t)0x6edb405a, (q31_t)0x2b982b97,
-    (q31_t)0x6ee3cebe, (q31_t)0x2b8ef77d, (q31_t)0x6eec5b53, (q31_t)0x2b85c1b5,
-    (q31_t)0x6ef4e619, (q31_t)0x2b7c8a3f, (q31_t)0x6efd6f10, (q31_t)0x2b73511c,
-    (q31_t)0x6f05f637, (q31_t)0x2b6a164d, (q31_t)0x6f0e7b8e, (q31_t)0x2b60d9d0,
-    (q31_t)0x6f16ff14, (q31_t)0x2b579ba8, (q31_t)0x6f1f80ca, (q31_t)0x2b4e5bd4,
-    (q31_t)0x6f2800af, (q31_t)0x2b451a55, (q31_t)0x6f307ec2, (q31_t)0x2b3bd72a,
-    (q31_t)0x6f38fb03, (q31_t)0x2b329255, (q31_t)0x6f417573, (q31_t)0x2b294bd5,
-    (q31_t)0x6f49ee0f, (q31_t)0x2b2003ac, (q31_t)0x6f5264da, (q31_t)0x2b16b9d9,
-    (q31_t)0x6f5ad9d1, (q31_t)0x2b0d6e5c, (q31_t)0x6f634cf5, (q31_t)0x2b042137,
-    (q31_t)0x6f6bbe45, (q31_t)0x2afad269, (q31_t)0x6f742dc1, (q31_t)0x2af181f3,
-    (q31_t)0x6f7c9b69, (q31_t)0x2ae82fd5, (q31_t)0x6f85073c, (q31_t)0x2adedc10,
-    (q31_t)0x6f8d713a, (q31_t)0x2ad586a3, (q31_t)0x6f95d963, (q31_t)0x2acc2f90,
-    (q31_t)0x6f9e3fb6, (q31_t)0x2ac2d6d6, (q31_t)0x6fa6a433, (q31_t)0x2ab97c77,
-    (q31_t)0x6faf06da, (q31_t)0x2ab02071, (q31_t)0x6fb767aa, (q31_t)0x2aa6c2c6,
-    (q31_t)0x6fbfc6a3, (q31_t)0x2a9d6377, (q31_t)0x6fc823c5, (q31_t)0x2a940283,
-    (q31_t)0x6fd07f0f, (q31_t)0x2a8a9fea, (q31_t)0x6fd8d882, (q31_t)0x2a813bae,
-    (q31_t)0x6fe1301c, (q31_t)0x2a77d5ce, (q31_t)0x6fe985de, (q31_t)0x2a6e6e4b,
-    (q31_t)0x6ff1d9c7, (q31_t)0x2a650525, (q31_t)0x6ffa2bd6, (q31_t)0x2a5b9a5d,
-    (q31_t)0x70027c0c, (q31_t)0x2a522df3, (q31_t)0x700aca69, (q31_t)0x2a48bfe7,
-    (q31_t)0x701316eb, (q31_t)0x2a3f503a, (q31_t)0x701b6193, (q31_t)0x2a35deeb,
-    (q31_t)0x7023aa5f, (q31_t)0x2a2c6bfd, (q31_t)0x702bf151, (q31_t)0x2a22f76e,
-    (q31_t)0x70343667, (q31_t)0x2a19813f, (q31_t)0x703c79a2, (q31_t)0x2a100970,
-    (q31_t)0x7044bb00, (q31_t)0x2a069003, (q31_t)0x704cfa83, (q31_t)0x29fd14f6,
-    (q31_t)0x70553828, (q31_t)0x29f3984c, (q31_t)0x705d73f0, (q31_t)0x29ea1a03,
-    (q31_t)0x7065addb, (q31_t)0x29e09a1c, (q31_t)0x706de5e9, (q31_t)0x29d71899,
-    (q31_t)0x70761c18, (q31_t)0x29cd9578, (q31_t)0x707e5069, (q31_t)0x29c410ba,
-    (q31_t)0x708682dc, (q31_t)0x29ba8a61, (q31_t)0x708eb36f, (q31_t)0x29b1026c,
-    (q31_t)0x7096e223, (q31_t)0x29a778db, (q31_t)0x709f0ef8, (q31_t)0x299dedaf,
-    (q31_t)0x70a739ed, (q31_t)0x299460e8, (q31_t)0x70af6302, (q31_t)0x298ad287,
-    (q31_t)0x70b78a36, (q31_t)0x2981428c, (q31_t)0x70bfaf89, (q31_t)0x2977b0f7,
-    (q31_t)0x70c7d2fb, (q31_t)0x296e1dc9, (q31_t)0x70cff48c, (q31_t)0x29648902,
-    (q31_t)0x70d8143b, (q31_t)0x295af2a3, (q31_t)0x70e03208, (q31_t)0x29515aab,
-    (q31_t)0x70e84df3, (q31_t)0x2947c11c, (q31_t)0x70f067fb, (q31_t)0x293e25f5,
-    (q31_t)0x70f8801f, (q31_t)0x29348937, (q31_t)0x71009661, (q31_t)0x292aeae3,
-    (q31_t)0x7108aabf, (q31_t)0x29214af8, (q31_t)0x7110bd39, (q31_t)0x2917a977,
-    (q31_t)0x7118cdcf, (q31_t)0x290e0661, (q31_t)0x7120dc80, (q31_t)0x290461b5,
-    (q31_t)0x7128e94c, (q31_t)0x28fabb75, (q31_t)0x7130f433, (q31_t)0x28f113a0,
-    (q31_t)0x7138fd35, (q31_t)0x28e76a37, (q31_t)0x71410450, (q31_t)0x28ddbf3b,
-    (q31_t)0x71490986, (q31_t)0x28d412ab, (q31_t)0x71510cd5, (q31_t)0x28ca6488,
-    (q31_t)0x71590e3e, (q31_t)0x28c0b4d2, (q31_t)0x71610dbf, (q31_t)0x28b7038b,
-    (q31_t)0x71690b59, (q31_t)0x28ad50b1, (q31_t)0x7171070c, (q31_t)0x28a39c46,
-    (q31_t)0x717900d6, (q31_t)0x2899e64a, (q31_t)0x7180f8b8, (q31_t)0x28902ebd,
-    (q31_t)0x7188eeb2, (q31_t)0x288675a0, (q31_t)0x7190e2c3, (q31_t)0x287cbaf3,
-    (q31_t)0x7198d4ea, (q31_t)0x2872feb6, (q31_t)0x71a0c528, (q31_t)0x286940ea,
-    (q31_t)0x71a8b37c, (q31_t)0x285f8190, (q31_t)0x71b09fe7, (q31_t)0x2855c0a6,
-    (q31_t)0x71b88a66, (q31_t)0x284bfe2f, (q31_t)0x71c072fb, (q31_t)0x28423a2a,
-    (q31_t)0x71c859a5, (q31_t)0x28387498, (q31_t)0x71d03e64, (q31_t)0x282ead78,
-    (q31_t)0x71d82137, (q31_t)0x2824e4cc, (q31_t)0x71e0021e, (q31_t)0x281b1a94,
-    (q31_t)0x71e7e118, (q31_t)0x28114ed0, (q31_t)0x71efbe27, (q31_t)0x28078181,
-    (q31_t)0x71f79948, (q31_t)0x27fdb2a7, (q31_t)0x71ff727c, (q31_t)0x27f3e241,
-    (q31_t)0x720749c3, (q31_t)0x27ea1052, (q31_t)0x720f1f1c, (q31_t)0x27e03cd8,
-    (q31_t)0x7216f287, (q31_t)0x27d667d5, (q31_t)0x721ec403, (q31_t)0x27cc9149,
-    (q31_t)0x72269391, (q31_t)0x27c2b934, (q31_t)0x722e6130, (q31_t)0x27b8df97,
-    (q31_t)0x72362ce0, (q31_t)0x27af0472, (q31_t)0x723df6a0, (q31_t)0x27a527c4,
-    (q31_t)0x7245be70, (q31_t)0x279b4990, (q31_t)0x724d8450, (q31_t)0x279169d5,
-    (q31_t)0x72554840, (q31_t)0x27878893, (q31_t)0x725d0a3e, (q31_t)0x277da5cb,
-    (q31_t)0x7264ca4c, (q31_t)0x2773c17d, (q31_t)0x726c8868, (q31_t)0x2769dbaa,
-    (q31_t)0x72744493, (q31_t)0x275ff452, (q31_t)0x727bfecc, (q31_t)0x27560b76,
-    (q31_t)0x7283b712, (q31_t)0x274c2115, (q31_t)0x728b6d66, (q31_t)0x27423530,
-    (q31_t)0x729321c7, (q31_t)0x273847c8, (q31_t)0x729ad435, (q31_t)0x272e58dc,
-    (q31_t)0x72a284b0, (q31_t)0x2724686e, (q31_t)0x72aa3336, (q31_t)0x271a767e,
-    (q31_t)0x72b1dfc9, (q31_t)0x2710830c, (q31_t)0x72b98a67, (q31_t)0x27068e18,
-    (q31_t)0x72c13311, (q31_t)0x26fc97a3, (q31_t)0x72c8d9c6, (q31_t)0x26f29fad,
-    (q31_t)0x72d07e85, (q31_t)0x26e8a637, (q31_t)0x72d82150, (q31_t)0x26deab41,
-    (q31_t)0x72dfc224, (q31_t)0x26d4aecb, (q31_t)0x72e76102, (q31_t)0x26cab0d6,
-    (q31_t)0x72eefdea, (q31_t)0x26c0b162, (q31_t)0x72f698db, (q31_t)0x26b6b070,
-    (q31_t)0x72fe31d5, (q31_t)0x26acadff, (q31_t)0x7305c8d7, (q31_t)0x26a2aa11,
-    (q31_t)0x730d5de3, (q31_t)0x2698a4a6, (q31_t)0x7314f0f6, (q31_t)0x268e9dbd,
-    (q31_t)0x731c8211, (q31_t)0x26849558, (q31_t)0x73241134, (q31_t)0x267a8b77,
-    (q31_t)0x732b9e5e, (q31_t)0x2670801a, (q31_t)0x7333298f, (q31_t)0x26667342,
-    (q31_t)0x733ab2c6, (q31_t)0x265c64ef, (q31_t)0x73423a04, (q31_t)0x26525521,
-    (q31_t)0x7349bf48, (q31_t)0x264843d9, (q31_t)0x73514292, (q31_t)0x263e3117,
-    (q31_t)0x7358c3e2, (q31_t)0x26341cdb, (q31_t)0x73604336, (q31_t)0x262a0727,
-    (q31_t)0x7367c090, (q31_t)0x261feffa, (q31_t)0x736f3bee, (q31_t)0x2615d754,
-    (q31_t)0x7376b551, (q31_t)0x260bbd37, (q31_t)0x737e2cb7, (q31_t)0x2601a1a2,
-    (q31_t)0x7385a222, (q31_t)0x25f78497, (q31_t)0x738d1590, (q31_t)0x25ed6614,
-    (q31_t)0x73948701, (q31_t)0x25e3461b, (q31_t)0x739bf675, (q31_t)0x25d924ac,
-    (q31_t)0x73a363ec, (q31_t)0x25cf01c8, (q31_t)0x73aacf65, (q31_t)0x25c4dd6e,
-    (q31_t)0x73b238e0, (q31_t)0x25bab7a0, (q31_t)0x73b9a05d, (q31_t)0x25b0905d,
-    (q31_t)0x73c105db, (q31_t)0x25a667a7, (q31_t)0x73c8695b, (q31_t)0x259c3d7c,
-    (q31_t)0x73cfcadc, (q31_t)0x259211df, (q31_t)0x73d72a5d, (q31_t)0x2587e4cf,
-    (q31_t)0x73de87de, (q31_t)0x257db64c, (q31_t)0x73e5e360, (q31_t)0x25738657,
-    (q31_t)0x73ed3ce1, (q31_t)0x256954f1, (q31_t)0x73f49462, (q31_t)0x255f2219,
-    (q31_t)0x73fbe9e2, (q31_t)0x2554edd1, (q31_t)0x74033d61, (q31_t)0x254ab818,
-    (q31_t)0x740a8edf, (q31_t)0x254080ef, (q31_t)0x7411de5b, (q31_t)0x25364857,
-    (q31_t)0x74192bd5, (q31_t)0x252c0e4f, (q31_t)0x7420774d, (q31_t)0x2521d2d8,
-    (q31_t)0x7427c0c3, (q31_t)0x251795f3, (q31_t)0x742f0836, (q31_t)0x250d57a0,
-    (q31_t)0x74364da6, (q31_t)0x250317df, (q31_t)0x743d9112, (q31_t)0x24f8d6b0,
-    (q31_t)0x7444d27b, (q31_t)0x24ee9415, (q31_t)0x744c11e0, (q31_t)0x24e4500e,
-    (q31_t)0x74534f41, (q31_t)0x24da0a9a, (q31_t)0x745a8a9d, (q31_t)0x24cfc3ba,
-    (q31_t)0x7461c3f5, (q31_t)0x24c57b6f, (q31_t)0x7468fb47, (q31_t)0x24bb31ba,
-    (q31_t)0x74703095, (q31_t)0x24b0e699, (q31_t)0x747763dd, (q31_t)0x24a69a0f,
-    (q31_t)0x747e951f, (q31_t)0x249c4c1b, (q31_t)0x7485c45b, (q31_t)0x2491fcbe,
-    (q31_t)0x748cf190, (q31_t)0x2487abf7, (q31_t)0x74941cbf, (q31_t)0x247d59c8,
-    (q31_t)0x749b45e7, (q31_t)0x24730631, (q31_t)0x74a26d08, (q31_t)0x2468b132,
-    (q31_t)0x74a99221, (q31_t)0x245e5acc, (q31_t)0x74b0b533, (q31_t)0x245402ff,
-    (q31_t)0x74b7d63c, (q31_t)0x2449a9cc, (q31_t)0x74bef53d, (q31_t)0x243f4f32,
-    (q31_t)0x74c61236, (q31_t)0x2434f332, (q31_t)0x74cd2d26, (q31_t)0x242a95ce,
-    (q31_t)0x74d4460c, (q31_t)0x24203704, (q31_t)0x74db5cea, (q31_t)0x2415d6d5,
-    (q31_t)0x74e271bd, (q31_t)0x240b7543, (q31_t)0x74e98487, (q31_t)0x2401124d,
-    (q31_t)0x74f09546, (q31_t)0x23f6adf3, (q31_t)0x74f7a3fb, (q31_t)0x23ec4837,
-    (q31_t)0x74feb0a5, (q31_t)0x23e1e117, (q31_t)0x7505bb44, (q31_t)0x23d77896,
-    (q31_t)0x750cc3d8, (q31_t)0x23cd0eb3, (q31_t)0x7513ca60, (q31_t)0x23c2a36f,
-    (q31_t)0x751acedd, (q31_t)0x23b836ca, (q31_t)0x7521d14d, (q31_t)0x23adc8c4,
-    (q31_t)0x7528d1b1, (q31_t)0x23a3595e, (q31_t)0x752fd008, (q31_t)0x2398e898,
-    (q31_t)0x7536cc52, (q31_t)0x238e7673, (q31_t)0x753dc68f, (q31_t)0x238402ef,
-    (q31_t)0x7544bebf, (q31_t)0x23798e0d, (q31_t)0x754bb4e1, (q31_t)0x236f17cc,
-    (q31_t)0x7552a8f4, (q31_t)0x2364a02e, (q31_t)0x75599afa, (q31_t)0x235a2733,
-    (q31_t)0x75608af1, (q31_t)0x234facda, (q31_t)0x756778d9, (q31_t)0x23453125,
-    (q31_t)0x756e64b2, (q31_t)0x233ab414, (q31_t)0x75754e7c, (q31_t)0x233035a7,
-    (q31_t)0x757c3636, (q31_t)0x2325b5df, (q31_t)0x75831be0, (q31_t)0x231b34bc,
-    (q31_t)0x7589ff7a, (q31_t)0x2310b23e, (q31_t)0x7590e104, (q31_t)0x23062e67,
-    (q31_t)0x7597c07d, (q31_t)0x22fba936, (q31_t)0x759e9de5, (q31_t)0x22f122ab,
-    (q31_t)0x75a5793c, (q31_t)0x22e69ac8, (q31_t)0x75ac5282, (q31_t)0x22dc118c,
-    (q31_t)0x75b329b5, (q31_t)0x22d186f8, (q31_t)0x75b9fed7, (q31_t)0x22c6fb0c,
-    (q31_t)0x75c0d1e7, (q31_t)0x22bc6dca, (q31_t)0x75c7a2e3, (q31_t)0x22b1df30,
-    (q31_t)0x75ce71ce, (q31_t)0x22a74f40, (q31_t)0x75d53ea5, (q31_t)0x229cbdfa,
-    (q31_t)0x75dc0968, (q31_t)0x22922b5e, (q31_t)0x75e2d219, (q31_t)0x2287976e,
-    (q31_t)0x75e998b5, (q31_t)0x227d0228, (q31_t)0x75f05d3d, (q31_t)0x22726b8e,
-    (q31_t)0x75f71fb1, (q31_t)0x2267d3a0, (q31_t)0x75fde011, (q31_t)0x225d3a5e,
-    (q31_t)0x76049e5b, (q31_t)0x22529fca, (q31_t)0x760b5a90, (q31_t)0x224803e2,
-    (q31_t)0x761214b0, (q31_t)0x223d66a8, (q31_t)0x7618ccba, (q31_t)0x2232c81c,
-    (q31_t)0x761f82af, (q31_t)0x2228283f, (q31_t)0x7626368d, (q31_t)0x221d8711,
-    (q31_t)0x762ce855, (q31_t)0x2212e492, (q31_t)0x76339806, (q31_t)0x220840c2,
-    (q31_t)0x763a45a0, (q31_t)0x21fd9ba3, (q31_t)0x7640f123, (q31_t)0x21f2f534,
-    (q31_t)0x76479a8e, (q31_t)0x21e84d76, (q31_t)0x764e41e2, (q31_t)0x21dda46a,
-    (q31_t)0x7654e71d, (q31_t)0x21d2fa0f, (q31_t)0x765b8a41, (q31_t)0x21c84e67,
-    (q31_t)0x76622b4c, (q31_t)0x21bda171, (q31_t)0x7668ca3e, (q31_t)0x21b2f32e,
-    (q31_t)0x766f6717, (q31_t)0x21a8439e, (q31_t)0x767601d7, (q31_t)0x219d92c2,
-    (q31_t)0x767c9a7e, (q31_t)0x2192e09b, (q31_t)0x7683310b, (q31_t)0x21882d28,
-    (q31_t)0x7689c57d, (q31_t)0x217d786a, (q31_t)0x769057d6, (q31_t)0x2172c262,
-    (q31_t)0x7696e814, (q31_t)0x21680b0f, (q31_t)0x769d7637, (q31_t)0x215d5273,
-    (q31_t)0x76a4023f, (q31_t)0x2152988d, (q31_t)0x76aa8c2c, (q31_t)0x2147dd5f,
-    (q31_t)0x76b113fd, (q31_t)0x213d20e8, (q31_t)0x76b799b3, (q31_t)0x21326329,
-    (q31_t)0x76be1d4c, (q31_t)0x2127a423, (q31_t)0x76c49ec9, (q31_t)0x211ce3d5,
-    (q31_t)0x76cb1e2a, (q31_t)0x21122240, (q31_t)0x76d19b6e, (q31_t)0x21075f65,
-    (q31_t)0x76d81695, (q31_t)0x20fc9b44, (q31_t)0x76de8f9e, (q31_t)0x20f1d5de,
-    (q31_t)0x76e5068a, (q31_t)0x20e70f32, (q31_t)0x76eb7b58, (q31_t)0x20dc4742,
-    (q31_t)0x76f1ee09, (q31_t)0x20d17e0d, (q31_t)0x76f85e9a, (q31_t)0x20c6b395,
-    (q31_t)0x76fecd0e, (q31_t)0x20bbe7d8, (q31_t)0x77053962, (q31_t)0x20b11ad9,
-    (q31_t)0x770ba398, (q31_t)0x20a64c97, (q31_t)0x77120bae, (q31_t)0x209b7d13,
-    (q31_t)0x771871a5, (q31_t)0x2090ac4d, (q31_t)0x771ed57c, (q31_t)0x2085da46,
-    (q31_t)0x77253733, (q31_t)0x207b06fe, (q31_t)0x772b96ca, (q31_t)0x20703275,
-    (q31_t)0x7731f440, (q31_t)0x20655cac, (q31_t)0x77384f95, (q31_t)0x205a85a3,
-    (q31_t)0x773ea8ca, (q31_t)0x204fad5b, (q31_t)0x7744ffdd, (q31_t)0x2044d3d4,
-    (q31_t)0x774b54ce, (q31_t)0x2039f90f, (q31_t)0x7751a79e, (q31_t)0x202f1d0b,
-    (q31_t)0x7757f84c, (q31_t)0x20243fca, (q31_t)0x775e46d8, (q31_t)0x2019614c,
-    (q31_t)0x77649341, (q31_t)0x200e8190, (q31_t)0x776add88, (q31_t)0x2003a099,
-    (q31_t)0x777125ac, (q31_t)0x1ff8be65, (q31_t)0x77776bac, (q31_t)0x1feddaf6,
-    (q31_t)0x777daf89, (q31_t)0x1fe2f64c, (q31_t)0x7783f143, (q31_t)0x1fd81067,
-    (q31_t)0x778a30d8, (q31_t)0x1fcd2948, (q31_t)0x77906e49, (q31_t)0x1fc240ef,
-    (q31_t)0x7796a996, (q31_t)0x1fb7575c, (q31_t)0x779ce2be, (q31_t)0x1fac6c91,
-    (q31_t)0x77a319c2, (q31_t)0x1fa1808c, (q31_t)0x77a94ea0, (q31_t)0x1f969350,
-    (q31_t)0x77af8159, (q31_t)0x1f8ba4dc, (q31_t)0x77b5b1ec, (q31_t)0x1f80b531,
-    (q31_t)0x77bbe05a, (q31_t)0x1f75c44e, (q31_t)0x77c20ca1, (q31_t)0x1f6ad235,
-    (q31_t)0x77c836c2, (q31_t)0x1f5fdee6, (q31_t)0x77ce5ebd, (q31_t)0x1f54ea62,
-    (q31_t)0x77d48490, (q31_t)0x1f49f4a8, (q31_t)0x77daa83d, (q31_t)0x1f3efdb9,
-    (q31_t)0x77e0c9c3, (q31_t)0x1f340596, (q31_t)0x77e6e921, (q31_t)0x1f290c3f,
-    (q31_t)0x77ed0657, (q31_t)0x1f1e11b5, (q31_t)0x77f32165, (q31_t)0x1f1315f7,
-    (q31_t)0x77f93a4b, (q31_t)0x1f081907, (q31_t)0x77ff5109, (q31_t)0x1efd1ae4,
-    (q31_t)0x7805659e, (q31_t)0x1ef21b90, (q31_t)0x780b780a, (q31_t)0x1ee71b0a,
-    (q31_t)0x7811884d, (q31_t)0x1edc1953, (q31_t)0x78179666, (q31_t)0x1ed1166b,
-    (q31_t)0x781da256, (q31_t)0x1ec61254, (q31_t)0x7823ac1d, (q31_t)0x1ebb0d0d,
-    (q31_t)0x7829b3b9, (q31_t)0x1eb00696, (q31_t)0x782fb92a, (q31_t)0x1ea4fef0,
-    (q31_t)0x7835bc71, (q31_t)0x1e99f61d, (q31_t)0x783bbd8e, (q31_t)0x1e8eec1b,
-    (q31_t)0x7841bc7f, (q31_t)0x1e83e0eb, (q31_t)0x7847b946, (q31_t)0x1e78d48e,
-    (q31_t)0x784db3e0, (q31_t)0x1e6dc705, (q31_t)0x7853ac4f, (q31_t)0x1e62b84f,
-    (q31_t)0x7859a292, (q31_t)0x1e57a86d, (q31_t)0x785f96a9, (q31_t)0x1e4c9760,
-    (q31_t)0x78658894, (q31_t)0x1e418528, (q31_t)0x786b7852, (q31_t)0x1e3671c5,
-    (q31_t)0x787165e3, (q31_t)0x1e2b5d38, (q31_t)0x78775147, (q31_t)0x1e204781,
-    (q31_t)0x787d3a7e, (q31_t)0x1e1530a1, (q31_t)0x78832187, (q31_t)0x1e0a1898,
-    (q31_t)0x78890663, (q31_t)0x1dfeff67, (q31_t)0x788ee910, (q31_t)0x1df3e50d,
-    (q31_t)0x7894c98f, (q31_t)0x1de8c98c, (q31_t)0x789aa7e0, (q31_t)0x1dddace4,
-    (q31_t)0x78a08402, (q31_t)0x1dd28f15, (q31_t)0x78a65df6, (q31_t)0x1dc7701f,
-    (q31_t)0x78ac35ba, (q31_t)0x1dbc5004, (q31_t)0x78b20b4f, (q31_t)0x1db12ec3,
-    (q31_t)0x78b7deb4, (q31_t)0x1da60c5d, (q31_t)0x78bdafea, (q31_t)0x1d9ae8d2,
-    (q31_t)0x78c37eef, (q31_t)0x1d8fc424, (q31_t)0x78c94bc4, (q31_t)0x1d849e51,
-    (q31_t)0x78cf1669, (q31_t)0x1d79775c, (q31_t)0x78d4dedd, (q31_t)0x1d6e4f43,
-    (q31_t)0x78daa520, (q31_t)0x1d632608, (q31_t)0x78e06932, (q31_t)0x1d57fbaa,
-    (q31_t)0x78e62b13, (q31_t)0x1d4cd02c, (q31_t)0x78ebeac2, (q31_t)0x1d41a38c,
-    (q31_t)0x78f1a840, (q31_t)0x1d3675cb, (q31_t)0x78f7638b, (q31_t)0x1d2b46ea,
-    (q31_t)0x78fd1ca4, (q31_t)0x1d2016e9, (q31_t)0x7902d38b, (q31_t)0x1d14e5c9,
-    (q31_t)0x7908883f, (q31_t)0x1d09b389, (q31_t)0x790e3ac0, (q31_t)0x1cfe802b,
-    (q31_t)0x7913eb0e, (q31_t)0x1cf34baf, (q31_t)0x79199929, (q31_t)0x1ce81615,
-    (q31_t)0x791f4510, (q31_t)0x1cdcdf5e, (q31_t)0x7924eec3, (q31_t)0x1cd1a78a,
-    (q31_t)0x792a9642, (q31_t)0x1cc66e99, (q31_t)0x79303b8e, (q31_t)0x1cbb348d,
-    (q31_t)0x7935dea4, (q31_t)0x1caff965, (q31_t)0x793b7f86, (q31_t)0x1ca4bd21,
-    (q31_t)0x79411e33, (q31_t)0x1c997fc4, (q31_t)0x7946baac, (q31_t)0x1c8e414b,
-    (q31_t)0x794c54ee, (q31_t)0x1c8301b9, (q31_t)0x7951ecfc, (q31_t)0x1c77c10e,
-    (q31_t)0x795782d3, (q31_t)0x1c6c7f4a, (q31_t)0x795d1675, (q31_t)0x1c613c6d,
-    (q31_t)0x7962a7e0, (q31_t)0x1c55f878, (q31_t)0x79683715, (q31_t)0x1c4ab36b,
-    (q31_t)0x796dc414, (q31_t)0x1c3f6d47, (q31_t)0x79734edc, (q31_t)0x1c34260c,
-    (q31_t)0x7978d76c, (q31_t)0x1c28ddbb, (q31_t)0x797e5dc6, (q31_t)0x1c1d9454,
-    (q31_t)0x7983e1e8, (q31_t)0x1c1249d8, (q31_t)0x798963d2, (q31_t)0x1c06fe46,
-    (q31_t)0x798ee385, (q31_t)0x1bfbb1a0, (q31_t)0x799460ff, (q31_t)0x1bf063e6,
-    (q31_t)0x7999dc42, (q31_t)0x1be51518, (q31_t)0x799f554b, (q31_t)0x1bd9c537,
-    (q31_t)0x79a4cc1c, (q31_t)0x1bce7442, (q31_t)0x79aa40b4, (q31_t)0x1bc3223c,
-    (q31_t)0x79afb313, (q31_t)0x1bb7cf23, (q31_t)0x79b52339, (q31_t)0x1bac7af9,
-    (q31_t)0x79ba9125, (q31_t)0x1ba125bd, (q31_t)0x79bffcd7, (q31_t)0x1b95cf71,
-    (q31_t)0x79c5664f, (q31_t)0x1b8a7815, (q31_t)0x79cacd8d, (q31_t)0x1b7f1fa9,
-    (q31_t)0x79d03291, (q31_t)0x1b73c62d, (q31_t)0x79d5955a, (q31_t)0x1b686ba3,
-    (q31_t)0x79daf5e8, (q31_t)0x1b5d100a, (q31_t)0x79e0543c, (q31_t)0x1b51b363,
-    (q31_t)0x79e5b054, (q31_t)0x1b4655ae, (q31_t)0x79eb0a31, (q31_t)0x1b3af6ec,
-    (q31_t)0x79f061d2, (q31_t)0x1b2f971e, (q31_t)0x79f5b737, (q31_t)0x1b243643,
-    (q31_t)0x79fb0a60, (q31_t)0x1b18d45c, (q31_t)0x7a005b4d, (q31_t)0x1b0d716a,
-    (q31_t)0x7a05a9fd, (q31_t)0x1b020d6c, (q31_t)0x7a0af671, (q31_t)0x1af6a865,
-    (q31_t)0x7a1040a8, (q31_t)0x1aeb4253, (q31_t)0x7a1588a2, (q31_t)0x1adfdb37,
-    (q31_t)0x7a1ace5f, (q31_t)0x1ad47312, (q31_t)0x7a2011de, (q31_t)0x1ac909e5,
-    (q31_t)0x7a25531f, (q31_t)0x1abd9faf, (q31_t)0x7a2a9223, (q31_t)0x1ab23471,
-    (q31_t)0x7a2fcee8, (q31_t)0x1aa6c82b, (q31_t)0x7a350970, (q31_t)0x1a9b5adf,
-    (q31_t)0x7a3a41b9, (q31_t)0x1a8fec8c, (q31_t)0x7a3f77c3, (q31_t)0x1a847d33,
-    (q31_t)0x7a44ab8e, (q31_t)0x1a790cd4, (q31_t)0x7a49dd1a, (q31_t)0x1a6d9b70,
-    (q31_t)0x7a4f0c67, (q31_t)0x1a622907, (q31_t)0x7a543974, (q31_t)0x1a56b599,
-    (q31_t)0x7a596442, (q31_t)0x1a4b4128, (q31_t)0x7a5e8cd0, (q31_t)0x1a3fcbb3,
-    (q31_t)0x7a63b31d, (q31_t)0x1a34553b, (q31_t)0x7a68d72b, (q31_t)0x1a28ddc0,
-    (q31_t)0x7a6df8f8, (q31_t)0x1a1d6544, (q31_t)0x7a731884, (q31_t)0x1a11ebc5,
-    (q31_t)0x7a7835cf, (q31_t)0x1a067145, (q31_t)0x7a7d50da, (q31_t)0x19faf5c5,
-    (q31_t)0x7a8269a3, (q31_t)0x19ef7944, (q31_t)0x7a87802a, (q31_t)0x19e3fbc3,
-    (q31_t)0x7a8c9470, (q31_t)0x19d87d42, (q31_t)0x7a91a674, (q31_t)0x19ccfdc2,
-    (q31_t)0x7a96b636, (q31_t)0x19c17d44, (q31_t)0x7a9bc3b6, (q31_t)0x19b5fbc8,
-    (q31_t)0x7aa0cef3, (q31_t)0x19aa794d, (q31_t)0x7aa5d7ee, (q31_t)0x199ef5d6,
-    (q31_t)0x7aaadea6, (q31_t)0x19937161, (q31_t)0x7aafe31b, (q31_t)0x1987ebf0,
-    (q31_t)0x7ab4e54c, (q31_t)0x197c6584, (q31_t)0x7ab9e53a, (q31_t)0x1970de1b,
-    (q31_t)0x7abee2e5, (q31_t)0x196555b8, (q31_t)0x7ac3de4c, (q31_t)0x1959cc5a,
-    (q31_t)0x7ac8d76f, (q31_t)0x194e4201, (q31_t)0x7acdce4d, (q31_t)0x1942b6af,
-    (q31_t)0x7ad2c2e8, (q31_t)0x19372a64, (q31_t)0x7ad7b53d, (q31_t)0x192b9d1f,
-    (q31_t)0x7adca54e, (q31_t)0x19200ee3, (q31_t)0x7ae1931a, (q31_t)0x19147fae,
-    (q31_t)0x7ae67ea1, (q31_t)0x1908ef82, (q31_t)0x7aeb67e3, (q31_t)0x18fd5e5f,
-    (q31_t)0x7af04edf, (q31_t)0x18f1cc45, (q31_t)0x7af53395, (q31_t)0x18e63935,
-    (q31_t)0x7afa1605, (q31_t)0x18daa52f, (q31_t)0x7afef630, (q31_t)0x18cf1034,
-    (q31_t)0x7b03d414, (q31_t)0x18c37a44, (q31_t)0x7b08afb2, (q31_t)0x18b7e35f,
-    (q31_t)0x7b0d8909, (q31_t)0x18ac4b87, (q31_t)0x7b126019, (q31_t)0x18a0b2bb,
-    (q31_t)0x7b1734e2, (q31_t)0x189518fc, (q31_t)0x7b1c0764, (q31_t)0x18897e4a,
-    (q31_t)0x7b20d79e, (q31_t)0x187de2a7, (q31_t)0x7b25a591, (q31_t)0x18724611,
-    (q31_t)0x7b2a713d, (q31_t)0x1866a88a, (q31_t)0x7b2f3aa0, (q31_t)0x185b0a13,
-    (q31_t)0x7b3401bb, (q31_t)0x184f6aab, (q31_t)0x7b38c68e, (q31_t)0x1843ca53,
-    (q31_t)0x7b3d8918, (q31_t)0x1838290c, (q31_t)0x7b42495a, (q31_t)0x182c86d5,
-    (q31_t)0x7b470753, (q31_t)0x1820e3b0, (q31_t)0x7b4bc303, (q31_t)0x18153f9d,
-    (q31_t)0x7b507c69, (q31_t)0x18099a9c, (q31_t)0x7b553386, (q31_t)0x17fdf4ae,
-    (q31_t)0x7b59e85a, (q31_t)0x17f24dd3, (q31_t)0x7b5e9ae4, (q31_t)0x17e6a60c,
-    (q31_t)0x7b634b23, (q31_t)0x17dafd59, (q31_t)0x7b67f919, (q31_t)0x17cf53bb,
-    (q31_t)0x7b6ca4c4, (q31_t)0x17c3a931, (q31_t)0x7b714e25, (q31_t)0x17b7fdbd,
-    (q31_t)0x7b75f53c, (q31_t)0x17ac515f, (q31_t)0x7b7a9a07, (q31_t)0x17a0a417,
-    (q31_t)0x7b7f3c87, (q31_t)0x1794f5e6, (q31_t)0x7b83dcbc, (q31_t)0x178946cc,
-    (q31_t)0x7b887aa6, (q31_t)0x177d96ca, (q31_t)0x7b8d1644, (q31_t)0x1771e5e0,
-    (q31_t)0x7b91af97, (q31_t)0x1766340f, (q31_t)0x7b96469d, (q31_t)0x175a8157,
-    (q31_t)0x7b9adb57, (q31_t)0x174ecdb8, (q31_t)0x7b9f6dc5, (q31_t)0x17431933,
-    (q31_t)0x7ba3fde7, (q31_t)0x173763c9, (q31_t)0x7ba88bbc, (q31_t)0x172bad7a,
-    (q31_t)0x7bad1744, (q31_t)0x171ff646, (q31_t)0x7bb1a080, (q31_t)0x17143e2d,
-    (q31_t)0x7bb6276e, (q31_t)0x17088531, (q31_t)0x7bbaac0e, (q31_t)0x16fccb51,
-    (q31_t)0x7bbf2e62, (q31_t)0x16f1108f, (q31_t)0x7bc3ae67, (q31_t)0x16e554ea,
-    (q31_t)0x7bc82c1f, (q31_t)0x16d99864, (q31_t)0x7bcca789, (q31_t)0x16cddafb,
-    (q31_t)0x7bd120a4, (q31_t)0x16c21cb2, (q31_t)0x7bd59771, (q31_t)0x16b65d88,
-    (q31_t)0x7bda0bf0, (q31_t)0x16aa9d7e, (q31_t)0x7bde7e20, (q31_t)0x169edc94,
-    (q31_t)0x7be2ee01, (q31_t)0x16931acb, (q31_t)0x7be75b93, (q31_t)0x16875823,
-    (q31_t)0x7bebc6d5, (q31_t)0x167b949d, (q31_t)0x7bf02fc9, (q31_t)0x166fd039,
-    (q31_t)0x7bf4966c, (q31_t)0x16640af7, (q31_t)0x7bf8fac0, (q31_t)0x165844d8,
-    (q31_t)0x7bfd5cc4, (q31_t)0x164c7ddd, (q31_t)0x7c01bc78, (q31_t)0x1640b606,
-    (q31_t)0x7c0619dc, (q31_t)0x1634ed53, (q31_t)0x7c0a74f0, (q31_t)0x162923c5,
-    (q31_t)0x7c0ecdb2, (q31_t)0x161d595d, (q31_t)0x7c132424, (q31_t)0x16118e1a,
-    (q31_t)0x7c177845, (q31_t)0x1605c1fd, (q31_t)0x7c1bca16, (q31_t)0x15f9f507,
-    (q31_t)0x7c201994, (q31_t)0x15ee2738, (q31_t)0x7c2466c2, (q31_t)0x15e25890,
-    (q31_t)0x7c28b19e, (q31_t)0x15d68911, (q31_t)0x7c2cfa28, (q31_t)0x15cab8ba,
-    (q31_t)0x7c314060, (q31_t)0x15bee78c, (q31_t)0x7c358446, (q31_t)0x15b31587,
-    (q31_t)0x7c39c5da, (q31_t)0x15a742ac, (q31_t)0x7c3e051b, (q31_t)0x159b6efb,
-    (q31_t)0x7c42420a, (q31_t)0x158f9a76, (q31_t)0x7c467ca6, (q31_t)0x1583c51b,
-    (q31_t)0x7c4ab4ef, (q31_t)0x1577eeec, (q31_t)0x7c4eeae5, (q31_t)0x156c17e9,
-    (q31_t)0x7c531e88, (q31_t)0x15604013, (q31_t)0x7c574fd8, (q31_t)0x1554676a,
-    (q31_t)0x7c5b7ed4, (q31_t)0x15488dee, (q31_t)0x7c5fab7c, (q31_t)0x153cb3a0,
-    (q31_t)0x7c63d5d1, (q31_t)0x1530d881, (q31_t)0x7c67fdd1, (q31_t)0x1524fc90,
-    (q31_t)0x7c6c237e, (q31_t)0x15191fcf, (q31_t)0x7c7046d6, (q31_t)0x150d423d,
-    (q31_t)0x7c7467d9, (q31_t)0x150163dc, (q31_t)0x7c788688, (q31_t)0x14f584ac,
-    (q31_t)0x7c7ca2e2, (q31_t)0x14e9a4ac, (q31_t)0x7c80bce7, (q31_t)0x14ddc3de,
-    (q31_t)0x7c84d496, (q31_t)0x14d1e242, (q31_t)0x7c88e9f1, (q31_t)0x14c5ffd9,
-    (q31_t)0x7c8cfcf6, (q31_t)0x14ba1ca3, (q31_t)0x7c910da5, (q31_t)0x14ae38a0,
-    (q31_t)0x7c951bff, (q31_t)0x14a253d1, (q31_t)0x7c992803, (q31_t)0x14966e36,
-    (q31_t)0x7c9d31b0, (q31_t)0x148a87d1, (q31_t)0x7ca13908, (q31_t)0x147ea0a0,
-    (q31_t)0x7ca53e09, (q31_t)0x1472b8a5, (q31_t)0x7ca940b3, (q31_t)0x1466cfe1,
-    (q31_t)0x7cad4107, (q31_t)0x145ae653, (q31_t)0x7cb13f04, (q31_t)0x144efbfc,
-    (q31_t)0x7cb53aaa, (q31_t)0x144310dd, (q31_t)0x7cb933f9, (q31_t)0x143724f5,
-    (q31_t)0x7cbd2af0, (q31_t)0x142b3846, (q31_t)0x7cc11f90, (q31_t)0x141f4ad1,
-    (q31_t)0x7cc511d9, (q31_t)0x14135c94, (q31_t)0x7cc901c9, (q31_t)0x14076d91,
-    (q31_t)0x7cccef62, (q31_t)0x13fb7dc9, (q31_t)0x7cd0daa2, (q31_t)0x13ef8d3c,
-    (q31_t)0x7cd4c38b, (q31_t)0x13e39be9, (q31_t)0x7cd8aa1b, (q31_t)0x13d7a9d3,
-    (q31_t)0x7cdc8e52, (q31_t)0x13cbb6f8, (q31_t)0x7ce07031, (q31_t)0x13bfc35b,
-    (q31_t)0x7ce44fb7, (q31_t)0x13b3cefa, (q31_t)0x7ce82ce4, (q31_t)0x13a7d9d7,
-    (q31_t)0x7cec07b8, (q31_t)0x139be3f2, (q31_t)0x7cefe032, (q31_t)0x138fed4b,
-    (q31_t)0x7cf3b653, (q31_t)0x1383f5e3, (q31_t)0x7cf78a1b, (q31_t)0x1377fdbb,
-    (q31_t)0x7cfb5b89, (q31_t)0x136c04d2, (q31_t)0x7cff2a9d, (q31_t)0x13600b2a,
-    (q31_t)0x7d02f757, (q31_t)0x135410c3, (q31_t)0x7d06c1b6, (q31_t)0x1348159d,
-    (q31_t)0x7d0a89bc, (q31_t)0x133c19b8, (q31_t)0x7d0e4f67, (q31_t)0x13301d16,
-    (q31_t)0x7d1212b7, (q31_t)0x13241fb6, (q31_t)0x7d15d3ad, (q31_t)0x1318219a,
-    (q31_t)0x7d199248, (q31_t)0x130c22c1, (q31_t)0x7d1d4e88, (q31_t)0x1300232c,
-    (q31_t)0x7d21086c, (q31_t)0x12f422db, (q31_t)0x7d24bff6, (q31_t)0x12e821cf,
-    (q31_t)0x7d287523, (q31_t)0x12dc2009, (q31_t)0x7d2c27f6, (q31_t)0x12d01d89,
-    (q31_t)0x7d2fd86c, (q31_t)0x12c41a4f, (q31_t)0x7d338687, (q31_t)0x12b8165b,
-    (q31_t)0x7d373245, (q31_t)0x12ac11af, (q31_t)0x7d3adba7, (q31_t)0x12a00c4b,
-    (q31_t)0x7d3e82ae, (q31_t)0x1294062f, (q31_t)0x7d422757, (q31_t)0x1287ff5b,
-    (q31_t)0x7d45c9a4, (q31_t)0x127bf7d1, (q31_t)0x7d496994, (q31_t)0x126fef90,
-    (q31_t)0x7d4d0728, (q31_t)0x1263e699, (q31_t)0x7d50a25e, (q31_t)0x1257dced,
-    (q31_t)0x7d543b37, (q31_t)0x124bd28c, (q31_t)0x7d57d1b3, (q31_t)0x123fc776,
-    (q31_t)0x7d5b65d2, (q31_t)0x1233bbac, (q31_t)0x7d5ef793, (q31_t)0x1227af2e,
-    (q31_t)0x7d6286f6, (q31_t)0x121ba1fd, (q31_t)0x7d6613fb, (q31_t)0x120f941a,
-    (q31_t)0x7d699ea3, (q31_t)0x12038584, (q31_t)0x7d6d26ec, (q31_t)0x11f7763c,
-    (q31_t)0x7d70acd7, (q31_t)0x11eb6643, (q31_t)0x7d743064, (q31_t)0x11df5599,
-    (q31_t)0x7d77b192, (q31_t)0x11d3443f, (q31_t)0x7d7b3061, (q31_t)0x11c73235,
-    (q31_t)0x7d7eacd2, (q31_t)0x11bb1f7c, (q31_t)0x7d8226e4, (q31_t)0x11af0c13,
-    (q31_t)0x7d859e96, (q31_t)0x11a2f7fc, (q31_t)0x7d8913ea, (q31_t)0x1196e337,
-    (q31_t)0x7d8c86de, (q31_t)0x118acdc4, (q31_t)0x7d8ff772, (q31_t)0x117eb7a4,
-    (q31_t)0x7d9365a8, (q31_t)0x1172a0d7, (q31_t)0x7d96d17d, (q31_t)0x1166895f,
-    (q31_t)0x7d9a3af2, (q31_t)0x115a713a, (q31_t)0x7d9da208, (q31_t)0x114e586a,
-    (q31_t)0x7da106bd, (q31_t)0x11423ef0, (q31_t)0x7da46912, (q31_t)0x113624cb,
-    (q31_t)0x7da7c907, (q31_t)0x112a09fc, (q31_t)0x7dab269b, (q31_t)0x111dee84,
-    (q31_t)0x7dae81cf, (q31_t)0x1111d263, (q31_t)0x7db1daa2, (q31_t)0x1105b599,
-    (q31_t)0x7db53113, (q31_t)0x10f99827, (q31_t)0x7db88524, (q31_t)0x10ed7a0e,
-    (q31_t)0x7dbbd6d4, (q31_t)0x10e15b4e, (q31_t)0x7dbf2622, (q31_t)0x10d53be7,
-    (q31_t)0x7dc2730f, (q31_t)0x10c91bda, (q31_t)0x7dc5bd9b, (q31_t)0x10bcfb28,
-    (q31_t)0x7dc905c5, (q31_t)0x10b0d9d0, (q31_t)0x7dcc4b8d, (q31_t)0x10a4b7d3,
-    (q31_t)0x7dcf8ef3, (q31_t)0x10989532, (q31_t)0x7dd2cff7, (q31_t)0x108c71ee,
-    (q31_t)0x7dd60e99, (q31_t)0x10804e06, (q31_t)0x7dd94ad8, (q31_t)0x1074297b,
-    (q31_t)0x7ddc84b5, (q31_t)0x1068044e, (q31_t)0x7ddfbc30, (q31_t)0x105bde7f,
-    (q31_t)0x7de2f148, (q31_t)0x104fb80e, (q31_t)0x7de623fd, (q31_t)0x104390fd,
-    (q31_t)0x7de9544f, (q31_t)0x1037694b, (q31_t)0x7dec823e, (q31_t)0x102b40f8,
-    (q31_t)0x7defadca, (q31_t)0x101f1807, (q31_t)0x7df2d6f3, (q31_t)0x1012ee76,
-    (q31_t)0x7df5fdb8, (q31_t)0x1006c446, (q31_t)0x7df9221a, (q31_t)0xffa9979,
-    (q31_t)0x7dfc4418, (q31_t)0xfee6e0d, (q31_t)0x7dff63b2, (q31_t)0xfe24205,
-    (q31_t)0x7e0280e9, (q31_t)0xfd6155f, (q31_t)0x7e059bbb, (q31_t)0xfc9e81e,
-    (q31_t)0x7e08b42a, (q31_t)0xfbdba40, (q31_t)0x7e0bca34, (q31_t)0xfb18bc8,
-    (q31_t)0x7e0eddd9, (q31_t)0xfa55cb4, (q31_t)0x7e11ef1b, (q31_t)0xf992d06,
-    (q31_t)0x7e14fdf7, (q31_t)0xf8cfcbe, (q31_t)0x7e180a6f, (q31_t)0xf80cbdc,
-    (q31_t)0x7e1b1482, (q31_t)0xf749a61, (q31_t)0x7e1e1c30, (q31_t)0xf68684e,
-    (q31_t)0x7e212179, (q31_t)0xf5c35a3, (q31_t)0x7e24245d, (q31_t)0xf500260,
-    (q31_t)0x7e2724db, (q31_t)0xf43ce86, (q31_t)0x7e2a22f4, (q31_t)0xf379a16,
-    (q31_t)0x7e2d1ea8, (q31_t)0xf2b650f, (q31_t)0x7e3017f6, (q31_t)0xf1f2f73,
-    (q31_t)0x7e330ede, (q31_t)0xf12f941, (q31_t)0x7e360360, (q31_t)0xf06c27a,
-    (q31_t)0x7e38f57c, (q31_t)0xefa8b20, (q31_t)0x7e3be532, (q31_t)0xeee5331,
-    (q31_t)0x7e3ed282, (q31_t)0xee21aaf, (q31_t)0x7e41bd6c, (q31_t)0xed5e19a,
-    (q31_t)0x7e44a5ef, (q31_t)0xec9a7f3, (q31_t)0x7e478c0b, (q31_t)0xebd6db9,
-    (q31_t)0x7e4a6fc1, (q31_t)0xeb132ef, (q31_t)0x7e4d5110, (q31_t)0xea4f793,
-    (q31_t)0x7e502ff9, (q31_t)0xe98bba7, (q31_t)0x7e530c7a, (q31_t)0xe8c7f2a,
-    (q31_t)0x7e55e694, (q31_t)0xe80421e, (q31_t)0x7e58be47, (q31_t)0xe740483,
-    (q31_t)0x7e5b9392, (q31_t)0xe67c65a, (q31_t)0x7e5e6676, (q31_t)0xe5b87a2,
-    (q31_t)0x7e6136f3, (q31_t)0xe4f485c, (q31_t)0x7e640507, (q31_t)0xe430889,
-    (q31_t)0x7e66d0b4, (q31_t)0xe36c82a, (q31_t)0x7e6999fa, (q31_t)0xe2a873e,
-    (q31_t)0x7e6c60d7, (q31_t)0xe1e45c6, (q31_t)0x7e6f254c, (q31_t)0xe1203c3,
-    (q31_t)0x7e71e759, (q31_t)0xe05c135, (q31_t)0x7e74a6fd, (q31_t)0xdf97e1d,
-    (q31_t)0x7e77643a, (q31_t)0xded3a7b, (q31_t)0x7e7a1f0d, (q31_t)0xde0f64f,
-    (q31_t)0x7e7cd778, (q31_t)0xdd4b19a, (q31_t)0x7e7f8d7b, (q31_t)0xdc86c5d,
-    (q31_t)0x7e824114, (q31_t)0xdbc2698, (q31_t)0x7e84f245, (q31_t)0xdafe04b,
-    (q31_t)0x7e87a10c, (q31_t)0xda39978, (q31_t)0x7e8a4d6a, (q31_t)0xd97521d,
-    (q31_t)0x7e8cf75f, (q31_t)0xd8b0a3d, (q31_t)0x7e8f9eeb, (q31_t)0xd7ec1d6,
-    (q31_t)0x7e92440d, (q31_t)0xd7278eb, (q31_t)0x7e94e6c6, (q31_t)0xd662f7b,
-    (q31_t)0x7e978715, (q31_t)0xd59e586, (q31_t)0x7e9a24fb, (q31_t)0xd4d9b0e,
-    (q31_t)0x7e9cc076, (q31_t)0xd415013, (q31_t)0x7e9f5988, (q31_t)0xd350495,
-    (q31_t)0x7ea1f02f, (q31_t)0xd28b894, (q31_t)0x7ea4846c, (q31_t)0xd1c6c11,
-    (q31_t)0x7ea7163f, (q31_t)0xd101f0e, (q31_t)0x7ea9a5a8, (q31_t)0xd03d189,
-    (q31_t)0x7eac32a6, (q31_t)0xcf78383, (q31_t)0x7eaebd3a, (q31_t)0xceb34fe,
-    (q31_t)0x7eb14563, (q31_t)0xcdee5f9, (q31_t)0x7eb3cb21, (q31_t)0xcd29676,
-    (q31_t)0x7eb64e75, (q31_t)0xcc64673, (q31_t)0x7eb8cf5d, (q31_t)0xcb9f5f3,
-    (q31_t)0x7ebb4ddb, (q31_t)0xcada4f5, (q31_t)0x7ebdc9ed, (q31_t)0xca1537a,
-    (q31_t)0x7ec04394, (q31_t)0xc950182, (q31_t)0x7ec2bad0, (q31_t)0xc88af0e,
-    (q31_t)0x7ec52fa0, (q31_t)0xc7c5c1e, (q31_t)0x7ec7a205, (q31_t)0xc7008b3,
-    (q31_t)0x7eca11fe, (q31_t)0xc63b4ce, (q31_t)0x7ecc7f8b, (q31_t)0xc57606e,
-    (q31_t)0x7eceeaad, (q31_t)0xc4b0b94, (q31_t)0x7ed15363, (q31_t)0xc3eb641,
-    (q31_t)0x7ed3b9ad, (q31_t)0xc326075, (q31_t)0x7ed61d8a, (q31_t)0xc260a31,
-    (q31_t)0x7ed87efc, (q31_t)0xc19b374, (q31_t)0x7edade01, (q31_t)0xc0d5c41,
-    (q31_t)0x7edd3a9a, (q31_t)0xc010496, (q31_t)0x7edf94c7, (q31_t)0xbf4ac75,
-    (q31_t)0x7ee1ec87, (q31_t)0xbe853de, (q31_t)0x7ee441da, (q31_t)0xbdbfad1,
-    (q31_t)0x7ee694c1, (q31_t)0xbcfa150, (q31_t)0x7ee8e53a, (q31_t)0xbc34759,
-    (q31_t)0x7eeb3347, (q31_t)0xbb6ecef, (q31_t)0x7eed7ee7, (q31_t)0xbaa9211,
-    (q31_t)0x7eefc81a, (q31_t)0xb9e36c0, (q31_t)0x7ef20ee0, (q31_t)0xb91dafc,
-    (q31_t)0x7ef45338, (q31_t)0xb857ec7, (q31_t)0x7ef69523, (q31_t)0xb79221f,
-    (q31_t)0x7ef8d4a1, (q31_t)0xb6cc506, (q31_t)0x7efb11b1, (q31_t)0xb60677c,
-    (q31_t)0x7efd4c54, (q31_t)0xb540982, (q31_t)0x7eff8489, (q31_t)0xb47ab19,
-    (q31_t)0x7f01ba50, (q31_t)0xb3b4c40, (q31_t)0x7f03eda9, (q31_t)0xb2eecf8,
-    (q31_t)0x7f061e95, (q31_t)0xb228d42, (q31_t)0x7f084d12, (q31_t)0xb162d1d,
-    (q31_t)0x7f0a7921, (q31_t)0xb09cc8c, (q31_t)0x7f0ca2c2, (q31_t)0xafd6b8d,
-    (q31_t)0x7f0ec9f5, (q31_t)0xaf10a22, (q31_t)0x7f10eeb9, (q31_t)0xae4a84b,
-    (q31_t)0x7f13110f, (q31_t)0xad84609, (q31_t)0x7f1530f7, (q31_t)0xacbe35b,
-    (q31_t)0x7f174e70, (q31_t)0xabf8043, (q31_t)0x7f19697a, (q31_t)0xab31cc1,
-    (q31_t)0x7f1b8215, (q31_t)0xaa6b8d5, (q31_t)0x7f1d9842, (q31_t)0xa9a5480,
-    (q31_t)0x7f1fabff, (q31_t)0xa8defc3, (q31_t)0x7f21bd4e, (q31_t)0xa818a9d,
-    (q31_t)0x7f23cc2e, (q31_t)0xa752510, (q31_t)0x7f25d89e, (q31_t)0xa68bf1b,
-    (q31_t)0x7f27e29f, (q31_t)0xa5c58c0, (q31_t)0x7f29ea31, (q31_t)0xa4ff1fe,
-    (q31_t)0x7f2bef53, (q31_t)0xa438ad7, (q31_t)0x7f2df206, (q31_t)0xa37234a,
-    (q31_t)0x7f2ff24a, (q31_t)0xa2abb59, (q31_t)0x7f31f01d, (q31_t)0xa1e5303,
-    (q31_t)0x7f33eb81, (q31_t)0xa11ea49, (q31_t)0x7f35e476, (q31_t)0xa05812c,
-    (q31_t)0x7f37dafa, (q31_t)0x9f917ac, (q31_t)0x7f39cf0e, (q31_t)0x9ecadc9,
-    (q31_t)0x7f3bc0b3, (q31_t)0x9e04385, (q31_t)0x7f3dafe7, (q31_t)0x9d3d8df,
-    (q31_t)0x7f3f9cab, (q31_t)0x9c76dd8, (q31_t)0x7f4186ff, (q31_t)0x9bb0271,
-    (q31_t)0x7f436ee3, (q31_t)0x9ae96aa, (q31_t)0x7f455456, (q31_t)0x9a22a83,
-    (q31_t)0x7f473759, (q31_t)0x995bdfd, (q31_t)0x7f4917eb, (q31_t)0x9895118,
-    (q31_t)0x7f4af60d, (q31_t)0x97ce3d5, (q31_t)0x7f4cd1be, (q31_t)0x9707635,
-    (q31_t)0x7f4eaafe, (q31_t)0x9640837, (q31_t)0x7f5081cd, (q31_t)0x95799dd,
-    (q31_t)0x7f52562c, (q31_t)0x94b2b27, (q31_t)0x7f54281a, (q31_t)0x93ebc14,
-    (q31_t)0x7f55f796, (q31_t)0x9324ca7, (q31_t)0x7f57c4a2, (q31_t)0x925dcdf,
-    (q31_t)0x7f598f3c, (q31_t)0x9196cbc, (q31_t)0x7f5b5765, (q31_t)0x90cfc40,
-    (q31_t)0x7f5d1d1d, (q31_t)0x9008b6a, (q31_t)0x7f5ee063, (q31_t)0x8f41a3c,
-    (q31_t)0x7f60a138, (q31_t)0x8e7a8b5, (q31_t)0x7f625f9b, (q31_t)0x8db36d6,
-    (q31_t)0x7f641b8d, (q31_t)0x8cec4a0, (q31_t)0x7f65d50d, (q31_t)0x8c25213,
-    (q31_t)0x7f678c1c, (q31_t)0x8b5df30, (q31_t)0x7f6940b8, (q31_t)0x8a96bf6,
-    (q31_t)0x7f6af2e3, (q31_t)0x89cf867, (q31_t)0x7f6ca29c, (q31_t)0x8908483,
-    (q31_t)0x7f6e4fe3, (q31_t)0x884104b, (q31_t)0x7f6ffab8, (q31_t)0x8779bbe,
-    (q31_t)0x7f71a31b, (q31_t)0x86b26de, (q31_t)0x7f73490b, (q31_t)0x85eb1ab,
-    (q31_t)0x7f74ec8a, (q31_t)0x8523c25, (q31_t)0x7f768d96, (q31_t)0x845c64d,
-    (q31_t)0x7f782c30, (q31_t)0x8395024, (q31_t)0x7f79c857, (q31_t)0x82cd9a9,
-    (q31_t)0x7f7b620c, (q31_t)0x82062de, (q31_t)0x7f7cf94e, (q31_t)0x813ebc2,
-    (q31_t)0x7f7e8e1e, (q31_t)0x8077457, (q31_t)0x7f80207b, (q31_t)0x7fafc9c,
-    (q31_t)0x7f81b065, (q31_t)0x7ee8493, (q31_t)0x7f833ddd, (q31_t)0x7e20c3b,
-    (q31_t)0x7f84c8e2, (q31_t)0x7d59396, (q31_t)0x7f865174, (q31_t)0x7c91aa3,
-    (q31_t)0x7f87d792, (q31_t)0x7bca163, (q31_t)0x7f895b3e, (q31_t)0x7b027d7,
-    (q31_t)0x7f8adc77, (q31_t)0x7a3adff, (q31_t)0x7f8c5b3d, (q31_t)0x79733dc,
-    (q31_t)0x7f8dd78f, (q31_t)0x78ab96e, (q31_t)0x7f8f516e, (q31_t)0x77e3eb5,
-    (q31_t)0x7f90c8da, (q31_t)0x771c3b3, (q31_t)0x7f923dd2, (q31_t)0x7654867,
-    (q31_t)0x7f93b058, (q31_t)0x758ccd2, (q31_t)0x7f952069, (q31_t)0x74c50f4,
-    (q31_t)0x7f968e07, (q31_t)0x73fd4cf, (q31_t)0x7f97f932, (q31_t)0x7335862,
-    (q31_t)0x7f9961e8, (q31_t)0x726dbae, (q31_t)0x7f9ac82c, (q31_t)0x71a5eb3,
-    (q31_t)0x7f9c2bfb, (q31_t)0x70de172, (q31_t)0x7f9d8d56, (q31_t)0x70163eb,
-    (q31_t)0x7f9eec3e, (q31_t)0x6f4e620, (q31_t)0x7fa048b2, (q31_t)0x6e86810,
-    (q31_t)0x7fa1a2b2, (q31_t)0x6dbe9bb, (q31_t)0x7fa2fa3d, (q31_t)0x6cf6b23,
-    (q31_t)0x7fa44f55, (q31_t)0x6c2ec48, (q31_t)0x7fa5a1f9, (q31_t)0x6b66d29,
-    (q31_t)0x7fa6f228, (q31_t)0x6a9edc9, (q31_t)0x7fa83fe3, (q31_t)0x69d6e27,
-    (q31_t)0x7fa98b2a, (q31_t)0x690ee44, (q31_t)0x7faad3fd, (q31_t)0x6846e1f,
-    (q31_t)0x7fac1a5b, (q31_t)0x677edbb, (q31_t)0x7fad5e45, (q31_t)0x66b6d16,
-    (q31_t)0x7fae9fbb, (q31_t)0x65eec33, (q31_t)0x7fafdebb, (q31_t)0x6526b10,
-    (q31_t)0x7fb11b48, (q31_t)0x645e9af, (q31_t)0x7fb2555f, (q31_t)0x6396810,
-    (q31_t)0x7fb38d02, (q31_t)0x62ce634, (q31_t)0x7fb4c231, (q31_t)0x620641a,
-    (q31_t)0x7fb5f4ea, (q31_t)0x613e1c5, (q31_t)0x7fb7252f, (q31_t)0x6075f33,
-    (q31_t)0x7fb852ff, (q31_t)0x5fadc66, (q31_t)0x7fb97e5a, (q31_t)0x5ee595d,
-    (q31_t)0x7fbaa740, (q31_t)0x5e1d61b, (q31_t)0x7fbbcdb1, (q31_t)0x5d5529e,
-    (q31_t)0x7fbcf1ad, (q31_t)0x5c8cee7, (q31_t)0x7fbe1334, (q31_t)0x5bc4af8,
-    (q31_t)0x7fbf3246, (q31_t)0x5afc6d0, (q31_t)0x7fc04ee3, (q31_t)0x5a3426f,
-    (q31_t)0x7fc1690a, (q31_t)0x596bdd7, (q31_t)0x7fc280bc, (q31_t)0x58a3908,
-    (q31_t)0x7fc395f9, (q31_t)0x57db403, (q31_t)0x7fc4a8c1, (q31_t)0x5712ec7,
-    (q31_t)0x7fc5b913, (q31_t)0x564a955, (q31_t)0x7fc6c6f0, (q31_t)0x55823ae,
-    (q31_t)0x7fc7d258, (q31_t)0x54b9dd3, (q31_t)0x7fc8db4a, (q31_t)0x53f17c3,
-    (q31_t)0x7fc9e1c6, (q31_t)0x532917f, (q31_t)0x7fcae5cd, (q31_t)0x5260b08,
-    (q31_t)0x7fcbe75e, (q31_t)0x519845e, (q31_t)0x7fcce67a, (q31_t)0x50cfd82,
-    (q31_t)0x7fcde320, (q31_t)0x5007674, (q31_t)0x7fcedd50, (q31_t)0x4f3ef35,
-    (q31_t)0x7fcfd50b, (q31_t)0x4e767c5, (q31_t)0x7fd0ca4f, (q31_t)0x4dae024,
-    (q31_t)0x7fd1bd1e, (q31_t)0x4ce5854, (q31_t)0x7fd2ad77, (q31_t)0x4c1d054,
-    (q31_t)0x7fd39b5a, (q31_t)0x4b54825, (q31_t)0x7fd486c7, (q31_t)0x4a8bfc7,
-    (q31_t)0x7fd56fbe, (q31_t)0x49c373c, (q31_t)0x7fd6563f, (q31_t)0x48fae83,
-    (q31_t)0x7fd73a4a, (q31_t)0x483259d, (q31_t)0x7fd81bdf, (q31_t)0x4769c8b,
-    (q31_t)0x7fd8fafe, (q31_t)0x46a134c, (q31_t)0x7fd9d7a7, (q31_t)0x45d89e2,
-    (q31_t)0x7fdab1d9, (q31_t)0x451004d, (q31_t)0x7fdb8996, (q31_t)0x444768d,
-    (q31_t)0x7fdc5edc, (q31_t)0x437eca4, (q31_t)0x7fdd31ac, (q31_t)0x42b6290,
-    (q31_t)0x7fde0205, (q31_t)0x41ed854, (q31_t)0x7fdecfe8, (q31_t)0x4124dee,
-    (q31_t)0x7fdf9b55, (q31_t)0x405c361, (q31_t)0x7fe0644b, (q31_t)0x3f938ac,
-    (q31_t)0x7fe12acb, (q31_t)0x3ecadcf, (q31_t)0x7fe1eed5, (q31_t)0x3e022cc,
-    (q31_t)0x7fe2b067, (q31_t)0x3d397a3, (q31_t)0x7fe36f84, (q31_t)0x3c70c54,
-    (q31_t)0x7fe42c2a, (q31_t)0x3ba80df, (q31_t)0x7fe4e659, (q31_t)0x3adf546,
-    (q31_t)0x7fe59e12, (q31_t)0x3a16988, (q31_t)0x7fe65354, (q31_t)0x394dda7,
-    (q31_t)0x7fe7061f, (q31_t)0x38851a2, (q31_t)0x7fe7b674, (q31_t)0x37bc57b,
-    (q31_t)0x7fe86452, (q31_t)0x36f3931, (q31_t)0x7fe90fb9, (q31_t)0x362acc5,
-    (q31_t)0x7fe9b8a9, (q31_t)0x3562038, (q31_t)0x7fea5f23, (q31_t)0x3499389,
-    (q31_t)0x7feb0326, (q31_t)0x33d06bb, (q31_t)0x7feba4b2, (q31_t)0x33079cc,
-    (q31_t)0x7fec43c7, (q31_t)0x323ecbe, (q31_t)0x7fece065, (q31_t)0x3175f91,
-    (q31_t)0x7fed7a8c, (q31_t)0x30ad245, (q31_t)0x7fee123d, (q31_t)0x2fe44dc,
-    (q31_t)0x7feea776, (q31_t)0x2f1b755, (q31_t)0x7fef3a39, (q31_t)0x2e529b0,
-    (q31_t)0x7fefca84, (q31_t)0x2d89bf0, (q31_t)0x7ff05858, (q31_t)0x2cc0e13,
-    (q31_t)0x7ff0e3b6, (q31_t)0x2bf801a, (q31_t)0x7ff16c9c, (q31_t)0x2b2f207,
-    (q31_t)0x7ff1f30b, (q31_t)0x2a663d8, (q31_t)0x7ff27703, (q31_t)0x299d590,
-    (q31_t)0x7ff2f884, (q31_t)0x28d472e, (q31_t)0x7ff3778e, (q31_t)0x280b8b3,
-    (q31_t)0x7ff3f420, (q31_t)0x2742a1f, (q31_t)0x7ff46e3c, (q31_t)0x2679b73,
-    (q31_t)0x7ff4e5e0, (q31_t)0x25b0caf, (q31_t)0x7ff55b0d, (q31_t)0x24e7dd4,
-    (q31_t)0x7ff5cdc3, (q31_t)0x241eee2, (q31_t)0x7ff63e01, (q31_t)0x2355fd9,
-    (q31_t)0x7ff6abc8, (q31_t)0x228d0bb, (q31_t)0x7ff71718, (q31_t)0x21c4188,
-    (q31_t)0x7ff77ff1, (q31_t)0x20fb240, (q31_t)0x7ff7e652, (q31_t)0x20322e3,
-    (q31_t)0x7ff84a3c, (q31_t)0x1f69373, (q31_t)0x7ff8abae, (q31_t)0x1ea03ef,
-    (q31_t)0x7ff90aaa, (q31_t)0x1dd7459, (q31_t)0x7ff9672d, (q31_t)0x1d0e4b0,
-    (q31_t)0x7ff9c13a, (q31_t)0x1c454f5, (q31_t)0x7ffa18cf, (q31_t)0x1b7c528,
-    (q31_t)0x7ffa6dec, (q31_t)0x1ab354b, (q31_t)0x7ffac092, (q31_t)0x19ea55d,
-    (q31_t)0x7ffb10c1, (q31_t)0x192155f, (q31_t)0x7ffb5e78, (q31_t)0x1858552,
-    (q31_t)0x7ffba9b8, (q31_t)0x178f536, (q31_t)0x7ffbf280, (q31_t)0x16c650b,
-    (q31_t)0x7ffc38d1, (q31_t)0x15fd4d2, (q31_t)0x7ffc7caa, (q31_t)0x153448c,
-    (q31_t)0x7ffcbe0c, (q31_t)0x146b438, (q31_t)0x7ffcfcf6, (q31_t)0x13a23d8,
-    (q31_t)0x7ffd3969, (q31_t)0x12d936c, (q31_t)0x7ffd7364, (q31_t)0x12102f4,
-    (q31_t)0x7ffdaae7, (q31_t)0x1147271, (q31_t)0x7ffddff3, (q31_t)0x107e1e3,
-    (q31_t)0x7ffe1288, (q31_t)0xfb514b, (q31_t)0x7ffe42a4, (q31_t)0xeec0aa,
-    (q31_t)0x7ffe704a, (q31_t)0xe22fff, (q31_t)0x7ffe9b77, (q31_t)0xd59f4c,
-    (q31_t)0x7ffec42d, (q31_t)0xc90e90, (q31_t)0x7ffeea6c, (q31_t)0xbc7dcc,
-    (q31_t)0x7fff0e32, (q31_t)0xafed02, (q31_t)0x7fff2f82, (q31_t)0xa35c30,
-    (q31_t)0x7fff4e59, (q31_t)0x96cb58, (q31_t)0x7fff6ab9, (q31_t)0x8a3a7b,
-    (q31_t)0x7fff84a1, (q31_t)0x7da998, (q31_t)0x7fff9c12, (q31_t)0x7118b0,
-    (q31_t)0x7fffb10b, (q31_t)0x6487c4, (q31_t)0x7fffc38c, (q31_t)0x57f6d4,
-    (q31_t)0x7fffd396, (q31_t)0x4b65e1, (q31_t)0x7fffe128, (q31_t)0x3ed4ea,
-    (q31_t)0x7fffec43, (q31_t)0x3243f1, (q31_t)0x7ffff4e6, (q31_t)0x25b2f7,
-    (q31_t)0x7ffffb11, (q31_t)0x1921fb, (q31_t)0x7ffffec4, (q31_t)0xc90fe,
-    (q31_t)0x7fffffff, (q31_t)0x0, (q31_t)0x7ffffec4, (q31_t)0xfff36f02,
-    (q31_t)0x7ffffb11, (q31_t)0xffe6de05, (q31_t)0x7ffff4e6, (q31_t)0xffda4d09,
-    (q31_t)0x7fffec43, (q31_t)0xffcdbc0f, (q31_t)0x7fffe128, (q31_t)0xffc12b16,
-    (q31_t)0x7fffd396, (q31_t)0xffb49a1f, (q31_t)0x7fffc38c, (q31_t)0xffa8092c,
-    (q31_t)0x7fffb10b, (q31_t)0xff9b783c, (q31_t)0x7fff9c12, (q31_t)0xff8ee750,
-    (q31_t)0x7fff84a1, (q31_t)0xff825668, (q31_t)0x7fff6ab9, (q31_t)0xff75c585,
-    (q31_t)0x7fff4e59, (q31_t)0xff6934a8, (q31_t)0x7fff2f82, (q31_t)0xff5ca3d0,
-    (q31_t)0x7fff0e32, (q31_t)0xff5012fe, (q31_t)0x7ffeea6c, (q31_t)0xff438234,
-    (q31_t)0x7ffec42d, (q31_t)0xff36f170, (q31_t)0x7ffe9b77, (q31_t)0xff2a60b4,
-    (q31_t)0x7ffe704a, (q31_t)0xff1dd001, (q31_t)0x7ffe42a4, (q31_t)0xff113f56,
-    (q31_t)0x7ffe1288, (q31_t)0xff04aeb5, (q31_t)0x7ffddff3, (q31_t)0xfef81e1d,
-    (q31_t)0x7ffdaae7, (q31_t)0xfeeb8d8f, (q31_t)0x7ffd7364, (q31_t)0xfedefd0c,
-    (q31_t)0x7ffd3969, (q31_t)0xfed26c94, (q31_t)0x7ffcfcf6, (q31_t)0xfec5dc28,
-    (q31_t)0x7ffcbe0c, (q31_t)0xfeb94bc8, (q31_t)0x7ffc7caa, (q31_t)0xfeacbb74,
-    (q31_t)0x7ffc38d1, (q31_t)0xfea02b2e, (q31_t)0x7ffbf280, (q31_t)0xfe939af5,
-    (q31_t)0x7ffba9b8, (q31_t)0xfe870aca, (q31_t)0x7ffb5e78, (q31_t)0xfe7a7aae,
-    (q31_t)0x7ffb10c1, (q31_t)0xfe6deaa1, (q31_t)0x7ffac092, (q31_t)0xfe615aa3,
-    (q31_t)0x7ffa6dec, (q31_t)0xfe54cab5, (q31_t)0x7ffa18cf, (q31_t)0xfe483ad8,
-    (q31_t)0x7ff9c13a, (q31_t)0xfe3bab0b, (q31_t)0x7ff9672d, (q31_t)0xfe2f1b50,
-    (q31_t)0x7ff90aaa, (q31_t)0xfe228ba7, (q31_t)0x7ff8abae, (q31_t)0xfe15fc11,
-    (q31_t)0x7ff84a3c, (q31_t)0xfe096c8d, (q31_t)0x7ff7e652, (q31_t)0xfdfcdd1d,
-    (q31_t)0x7ff77ff1, (q31_t)0xfdf04dc0, (q31_t)0x7ff71718, (q31_t)0xfde3be78,
-    (q31_t)0x7ff6abc8, (q31_t)0xfdd72f45, (q31_t)0x7ff63e01, (q31_t)0xfdcaa027,
-    (q31_t)0x7ff5cdc3, (q31_t)0xfdbe111e, (q31_t)0x7ff55b0d, (q31_t)0xfdb1822c,
-    (q31_t)0x7ff4e5e0, (q31_t)0xfda4f351, (q31_t)0x7ff46e3c, (q31_t)0xfd98648d,
-    (q31_t)0x7ff3f420, (q31_t)0xfd8bd5e1, (q31_t)0x7ff3778e, (q31_t)0xfd7f474d,
-    (q31_t)0x7ff2f884, (q31_t)0xfd72b8d2, (q31_t)0x7ff27703, (q31_t)0xfd662a70,
-    (q31_t)0x7ff1f30b, (q31_t)0xfd599c28, (q31_t)0x7ff16c9c, (q31_t)0xfd4d0df9,
-    (q31_t)0x7ff0e3b6, (q31_t)0xfd407fe6, (q31_t)0x7ff05858, (q31_t)0xfd33f1ed,
-    (q31_t)0x7fefca84, (q31_t)0xfd276410, (q31_t)0x7fef3a39, (q31_t)0xfd1ad650,
-    (q31_t)0x7feea776, (q31_t)0xfd0e48ab, (q31_t)0x7fee123d, (q31_t)0xfd01bb24,
-    (q31_t)0x7fed7a8c, (q31_t)0xfcf52dbb, (q31_t)0x7fece065, (q31_t)0xfce8a06f,
-    (q31_t)0x7fec43c7, (q31_t)0xfcdc1342, (q31_t)0x7feba4b2, (q31_t)0xfccf8634,
-    (q31_t)0x7feb0326, (q31_t)0xfcc2f945, (q31_t)0x7fea5f23, (q31_t)0xfcb66c77,
-    (q31_t)0x7fe9b8a9, (q31_t)0xfca9dfc8, (q31_t)0x7fe90fb9, (q31_t)0xfc9d533b,
-    (q31_t)0x7fe86452, (q31_t)0xfc90c6cf, (q31_t)0x7fe7b674, (q31_t)0xfc843a85,
-    (q31_t)0x7fe7061f, (q31_t)0xfc77ae5e, (q31_t)0x7fe65354, (q31_t)0xfc6b2259,
-    (q31_t)0x7fe59e12, (q31_t)0xfc5e9678, (q31_t)0x7fe4e659, (q31_t)0xfc520aba,
-    (q31_t)0x7fe42c2a, (q31_t)0xfc457f21, (q31_t)0x7fe36f84, (q31_t)0xfc38f3ac,
-    (q31_t)0x7fe2b067, (q31_t)0xfc2c685d, (q31_t)0x7fe1eed5, (q31_t)0xfc1fdd34,
-    (q31_t)0x7fe12acb, (q31_t)0xfc135231, (q31_t)0x7fe0644b, (q31_t)0xfc06c754,
-    (q31_t)0x7fdf9b55, (q31_t)0xfbfa3c9f, (q31_t)0x7fdecfe8, (q31_t)0xfbedb212,
-    (q31_t)0x7fde0205, (q31_t)0xfbe127ac, (q31_t)0x7fdd31ac, (q31_t)0xfbd49d70,
-    (q31_t)0x7fdc5edc, (q31_t)0xfbc8135c, (q31_t)0x7fdb8996, (q31_t)0xfbbb8973,
-    (q31_t)0x7fdab1d9, (q31_t)0xfbaeffb3, (q31_t)0x7fd9d7a7, (q31_t)0xfba2761e,
-    (q31_t)0x7fd8fafe, (q31_t)0xfb95ecb4, (q31_t)0x7fd81bdf, (q31_t)0xfb896375,
-    (q31_t)0x7fd73a4a, (q31_t)0xfb7cda63, (q31_t)0x7fd6563f, (q31_t)0xfb70517d,
-    (q31_t)0x7fd56fbe, (q31_t)0xfb63c8c4, (q31_t)0x7fd486c7, (q31_t)0xfb574039,
-    (q31_t)0x7fd39b5a, (q31_t)0xfb4ab7db, (q31_t)0x7fd2ad77, (q31_t)0xfb3e2fac,
-    (q31_t)0x7fd1bd1e, (q31_t)0xfb31a7ac, (q31_t)0x7fd0ca4f, (q31_t)0xfb251fdc,
-    (q31_t)0x7fcfd50b, (q31_t)0xfb18983b, (q31_t)0x7fcedd50, (q31_t)0xfb0c10cb,
-    (q31_t)0x7fcde320, (q31_t)0xfaff898c, (q31_t)0x7fcce67a, (q31_t)0xfaf3027e,
-    (q31_t)0x7fcbe75e, (q31_t)0xfae67ba2, (q31_t)0x7fcae5cd, (q31_t)0xfad9f4f8,
-    (q31_t)0x7fc9e1c6, (q31_t)0xfacd6e81, (q31_t)0x7fc8db4a, (q31_t)0xfac0e83d,
-    (q31_t)0x7fc7d258, (q31_t)0xfab4622d, (q31_t)0x7fc6c6f0, (q31_t)0xfaa7dc52,
-    (q31_t)0x7fc5b913, (q31_t)0xfa9b56ab, (q31_t)0x7fc4a8c1, (q31_t)0xfa8ed139,
-    (q31_t)0x7fc395f9, (q31_t)0xfa824bfd, (q31_t)0x7fc280bc, (q31_t)0xfa75c6f8,
-    (q31_t)0x7fc1690a, (q31_t)0xfa694229, (q31_t)0x7fc04ee3, (q31_t)0xfa5cbd91,
-    (q31_t)0x7fbf3246, (q31_t)0xfa503930, (q31_t)0x7fbe1334, (q31_t)0xfa43b508,
-    (q31_t)0x7fbcf1ad, (q31_t)0xfa373119, (q31_t)0x7fbbcdb1, (q31_t)0xfa2aad62,
-    (q31_t)0x7fbaa740, (q31_t)0xfa1e29e5, (q31_t)0x7fb97e5a, (q31_t)0xfa11a6a3,
-    (q31_t)0x7fb852ff, (q31_t)0xfa05239a, (q31_t)0x7fb7252f, (q31_t)0xf9f8a0cd,
-    (q31_t)0x7fb5f4ea, (q31_t)0xf9ec1e3b, (q31_t)0x7fb4c231, (q31_t)0xf9df9be6,
-    (q31_t)0x7fb38d02, (q31_t)0xf9d319cc, (q31_t)0x7fb2555f, (q31_t)0xf9c697f0,
-    (q31_t)0x7fb11b48, (q31_t)0xf9ba1651, (q31_t)0x7fafdebb, (q31_t)0xf9ad94f0,
-    (q31_t)0x7fae9fbb, (q31_t)0xf9a113cd, (q31_t)0x7fad5e45, (q31_t)0xf99492ea,
-    (q31_t)0x7fac1a5b, (q31_t)0xf9881245, (q31_t)0x7faad3fd, (q31_t)0xf97b91e1,
-    (q31_t)0x7fa98b2a, (q31_t)0xf96f11bc, (q31_t)0x7fa83fe3, (q31_t)0xf96291d9,
-    (q31_t)0x7fa6f228, (q31_t)0xf9561237, (q31_t)0x7fa5a1f9, (q31_t)0xf94992d7,
-    (q31_t)0x7fa44f55, (q31_t)0xf93d13b8, (q31_t)0x7fa2fa3d, (q31_t)0xf93094dd,
-    (q31_t)0x7fa1a2b2, (q31_t)0xf9241645, (q31_t)0x7fa048b2, (q31_t)0xf91797f0,
-    (q31_t)0x7f9eec3e, (q31_t)0xf90b19e0, (q31_t)0x7f9d8d56, (q31_t)0xf8fe9c15,
-    (q31_t)0x7f9c2bfb, (q31_t)0xf8f21e8e, (q31_t)0x7f9ac82c, (q31_t)0xf8e5a14d,
-    (q31_t)0x7f9961e8, (q31_t)0xf8d92452, (q31_t)0x7f97f932, (q31_t)0xf8cca79e,
-    (q31_t)0x7f968e07, (q31_t)0xf8c02b31, (q31_t)0x7f952069, (q31_t)0xf8b3af0c,
-    (q31_t)0x7f93b058, (q31_t)0xf8a7332e, (q31_t)0x7f923dd2, (q31_t)0xf89ab799,
-    (q31_t)0x7f90c8da, (q31_t)0xf88e3c4d, (q31_t)0x7f8f516e, (q31_t)0xf881c14b,
-    (q31_t)0x7f8dd78f, (q31_t)0xf8754692, (q31_t)0x7f8c5b3d, (q31_t)0xf868cc24,
-    (q31_t)0x7f8adc77, (q31_t)0xf85c5201, (q31_t)0x7f895b3e, (q31_t)0xf84fd829,
-    (q31_t)0x7f87d792, (q31_t)0xf8435e9d, (q31_t)0x7f865174, (q31_t)0xf836e55d,
-    (q31_t)0x7f84c8e2, (q31_t)0xf82a6c6a, (q31_t)0x7f833ddd, (q31_t)0xf81df3c5,
-    (q31_t)0x7f81b065, (q31_t)0xf8117b6d, (q31_t)0x7f80207b, (q31_t)0xf8050364,
-    (q31_t)0x7f7e8e1e, (q31_t)0xf7f88ba9, (q31_t)0x7f7cf94e, (q31_t)0xf7ec143e,
-    (q31_t)0x7f7b620c, (q31_t)0xf7df9d22, (q31_t)0x7f79c857, (q31_t)0xf7d32657,
-    (q31_t)0x7f782c30, (q31_t)0xf7c6afdc, (q31_t)0x7f768d96, (q31_t)0xf7ba39b3,
-    (q31_t)0x7f74ec8a, (q31_t)0xf7adc3db, (q31_t)0x7f73490b, (q31_t)0xf7a14e55,
-    (q31_t)0x7f71a31b, (q31_t)0xf794d922, (q31_t)0x7f6ffab8, (q31_t)0xf7886442,
-    (q31_t)0x7f6e4fe3, (q31_t)0xf77befb5, (q31_t)0x7f6ca29c, (q31_t)0xf76f7b7d,
-    (q31_t)0x7f6af2e3, (q31_t)0xf7630799, (q31_t)0x7f6940b8, (q31_t)0xf756940a,
-    (q31_t)0x7f678c1c, (q31_t)0xf74a20d0, (q31_t)0x7f65d50d, (q31_t)0xf73daded,
-    (q31_t)0x7f641b8d, (q31_t)0xf7313b60, (q31_t)0x7f625f9b, (q31_t)0xf724c92a,
-    (q31_t)0x7f60a138, (q31_t)0xf718574b, (q31_t)0x7f5ee063, (q31_t)0xf70be5c4,
-    (q31_t)0x7f5d1d1d, (q31_t)0xf6ff7496, (q31_t)0x7f5b5765, (q31_t)0xf6f303c0,
-    (q31_t)0x7f598f3c, (q31_t)0xf6e69344, (q31_t)0x7f57c4a2, (q31_t)0xf6da2321,
-    (q31_t)0x7f55f796, (q31_t)0xf6cdb359, (q31_t)0x7f54281a, (q31_t)0xf6c143ec,
-    (q31_t)0x7f52562c, (q31_t)0xf6b4d4d9, (q31_t)0x7f5081cd, (q31_t)0xf6a86623,
-    (q31_t)0x7f4eaafe, (q31_t)0xf69bf7c9, (q31_t)0x7f4cd1be, (q31_t)0xf68f89cb,
-    (q31_t)0x7f4af60d, (q31_t)0xf6831c2b, (q31_t)0x7f4917eb, (q31_t)0xf676aee8,
-    (q31_t)0x7f473759, (q31_t)0xf66a4203, (q31_t)0x7f455456, (q31_t)0xf65dd57d,
-    (q31_t)0x7f436ee3, (q31_t)0xf6516956, (q31_t)0x7f4186ff, (q31_t)0xf644fd8f,
-    (q31_t)0x7f3f9cab, (q31_t)0xf6389228, (q31_t)0x7f3dafe7, (q31_t)0xf62c2721,
-    (q31_t)0x7f3bc0b3, (q31_t)0xf61fbc7b, (q31_t)0x7f39cf0e, (q31_t)0xf6135237,
-    (q31_t)0x7f37dafa, (q31_t)0xf606e854, (q31_t)0x7f35e476, (q31_t)0xf5fa7ed4,
-    (q31_t)0x7f33eb81, (q31_t)0xf5ee15b7, (q31_t)0x7f31f01d, (q31_t)0xf5e1acfd,
-    (q31_t)0x7f2ff24a, (q31_t)0xf5d544a7, (q31_t)0x7f2df206, (q31_t)0xf5c8dcb6,
-    (q31_t)0x7f2bef53, (q31_t)0xf5bc7529, (q31_t)0x7f29ea31, (q31_t)0xf5b00e02,
-    (q31_t)0x7f27e29f, (q31_t)0xf5a3a740, (q31_t)0x7f25d89e, (q31_t)0xf59740e5,
-    (q31_t)0x7f23cc2e, (q31_t)0xf58adaf0, (q31_t)0x7f21bd4e, (q31_t)0xf57e7563,
-    (q31_t)0x7f1fabff, (q31_t)0xf572103d, (q31_t)0x7f1d9842, (q31_t)0xf565ab80,
-    (q31_t)0x7f1b8215, (q31_t)0xf559472b, (q31_t)0x7f19697a, (q31_t)0xf54ce33f,
-    (q31_t)0x7f174e70, (q31_t)0xf5407fbd, (q31_t)0x7f1530f7, (q31_t)0xf5341ca5,
-    (q31_t)0x7f13110f, (q31_t)0xf527b9f7, (q31_t)0x7f10eeb9, (q31_t)0xf51b57b5,
-    (q31_t)0x7f0ec9f5, (q31_t)0xf50ef5de, (q31_t)0x7f0ca2c2, (q31_t)0xf5029473,
-    (q31_t)0x7f0a7921, (q31_t)0xf4f63374, (q31_t)0x7f084d12, (q31_t)0xf4e9d2e3,
-    (q31_t)0x7f061e95, (q31_t)0xf4dd72be, (q31_t)0x7f03eda9, (q31_t)0xf4d11308,
-    (q31_t)0x7f01ba50, (q31_t)0xf4c4b3c0, (q31_t)0x7eff8489, (q31_t)0xf4b854e7,
-    (q31_t)0x7efd4c54, (q31_t)0xf4abf67e, (q31_t)0x7efb11b1, (q31_t)0xf49f9884,
-    (q31_t)0x7ef8d4a1, (q31_t)0xf4933afa, (q31_t)0x7ef69523, (q31_t)0xf486dde1,
-    (q31_t)0x7ef45338, (q31_t)0xf47a8139, (q31_t)0x7ef20ee0, (q31_t)0xf46e2504,
-    (q31_t)0x7eefc81a, (q31_t)0xf461c940, (q31_t)0x7eed7ee7, (q31_t)0xf4556def,
-    (q31_t)0x7eeb3347, (q31_t)0xf4491311, (q31_t)0x7ee8e53a, (q31_t)0xf43cb8a7,
-    (q31_t)0x7ee694c1, (q31_t)0xf4305eb0, (q31_t)0x7ee441da, (q31_t)0xf424052f,
-    (q31_t)0x7ee1ec87, (q31_t)0xf417ac22, (q31_t)0x7edf94c7, (q31_t)0xf40b538b,
-    (q31_t)0x7edd3a9a, (q31_t)0xf3fefb6a, (q31_t)0x7edade01, (q31_t)0xf3f2a3bf,
-    (q31_t)0x7ed87efc, (q31_t)0xf3e64c8c, (q31_t)0x7ed61d8a, (q31_t)0xf3d9f5cf,
-    (q31_t)0x7ed3b9ad, (q31_t)0xf3cd9f8b, (q31_t)0x7ed15363, (q31_t)0xf3c149bf,
-    (q31_t)0x7eceeaad, (q31_t)0xf3b4f46c, (q31_t)0x7ecc7f8b, (q31_t)0xf3a89f92,
-    (q31_t)0x7eca11fe, (q31_t)0xf39c4b32, (q31_t)0x7ec7a205, (q31_t)0xf38ff74d,
-    (q31_t)0x7ec52fa0, (q31_t)0xf383a3e2, (q31_t)0x7ec2bad0, (q31_t)0xf37750f2,
-    (q31_t)0x7ec04394, (q31_t)0xf36afe7e, (q31_t)0x7ebdc9ed, (q31_t)0xf35eac86,
-    (q31_t)0x7ebb4ddb, (q31_t)0xf3525b0b, (q31_t)0x7eb8cf5d, (q31_t)0xf3460a0d,
-    (q31_t)0x7eb64e75, (q31_t)0xf339b98d, (q31_t)0x7eb3cb21, (q31_t)0xf32d698a,
-    (q31_t)0x7eb14563, (q31_t)0xf3211a07, (q31_t)0x7eaebd3a, (q31_t)0xf314cb02,
-    (q31_t)0x7eac32a6, (q31_t)0xf3087c7d, (q31_t)0x7ea9a5a8, (q31_t)0xf2fc2e77,
-    (q31_t)0x7ea7163f, (q31_t)0xf2efe0f2, (q31_t)0x7ea4846c, (q31_t)0xf2e393ef,
-    (q31_t)0x7ea1f02f, (q31_t)0xf2d7476c, (q31_t)0x7e9f5988, (q31_t)0xf2cafb6b,
-    (q31_t)0x7e9cc076, (q31_t)0xf2beafed, (q31_t)0x7e9a24fb, (q31_t)0xf2b264f2,
-    (q31_t)0x7e978715, (q31_t)0xf2a61a7a, (q31_t)0x7e94e6c6, (q31_t)0xf299d085,
-    (q31_t)0x7e92440d, (q31_t)0xf28d8715, (q31_t)0x7e8f9eeb, (q31_t)0xf2813e2a,
-    (q31_t)0x7e8cf75f, (q31_t)0xf274f5c3, (q31_t)0x7e8a4d6a, (q31_t)0xf268ade3,
-    (q31_t)0x7e87a10c, (q31_t)0xf25c6688, (q31_t)0x7e84f245, (q31_t)0xf2501fb5,
-    (q31_t)0x7e824114, (q31_t)0xf243d968, (q31_t)0x7e7f8d7b, (q31_t)0xf23793a3,
-    (q31_t)0x7e7cd778, (q31_t)0xf22b4e66, (q31_t)0x7e7a1f0d, (q31_t)0xf21f09b1,
-    (q31_t)0x7e77643a, (q31_t)0xf212c585, (q31_t)0x7e74a6fd, (q31_t)0xf20681e3,
-    (q31_t)0x7e71e759, (q31_t)0xf1fa3ecb, (q31_t)0x7e6f254c, (q31_t)0xf1edfc3d,
-    (q31_t)0x7e6c60d7, (q31_t)0xf1e1ba3a, (q31_t)0x7e6999fa, (q31_t)0xf1d578c2,
-    (q31_t)0x7e66d0b4, (q31_t)0xf1c937d6, (q31_t)0x7e640507, (q31_t)0xf1bcf777,
-    (q31_t)0x7e6136f3, (q31_t)0xf1b0b7a4, (q31_t)0x7e5e6676, (q31_t)0xf1a4785e,
-    (q31_t)0x7e5b9392, (q31_t)0xf19839a6, (q31_t)0x7e58be47, (q31_t)0xf18bfb7d,
-    (q31_t)0x7e55e694, (q31_t)0xf17fbde2, (q31_t)0x7e530c7a, (q31_t)0xf17380d6,
-    (q31_t)0x7e502ff9, (q31_t)0xf1674459, (q31_t)0x7e4d5110, (q31_t)0xf15b086d,
-    (q31_t)0x7e4a6fc1, (q31_t)0xf14ecd11, (q31_t)0x7e478c0b, (q31_t)0xf1429247,
-    (q31_t)0x7e44a5ef, (q31_t)0xf136580d, (q31_t)0x7e41bd6c, (q31_t)0xf12a1e66,
-    (q31_t)0x7e3ed282, (q31_t)0xf11de551, (q31_t)0x7e3be532, (q31_t)0xf111accf,
-    (q31_t)0x7e38f57c, (q31_t)0xf10574e0, (q31_t)0x7e360360, (q31_t)0xf0f93d86,
-    (q31_t)0x7e330ede, (q31_t)0xf0ed06bf, (q31_t)0x7e3017f6, (q31_t)0xf0e0d08d,
-    (q31_t)0x7e2d1ea8, (q31_t)0xf0d49af1, (q31_t)0x7e2a22f4, (q31_t)0xf0c865ea,
-    (q31_t)0x7e2724db, (q31_t)0xf0bc317a, (q31_t)0x7e24245d, (q31_t)0xf0affda0,
-    (q31_t)0x7e212179, (q31_t)0xf0a3ca5d, (q31_t)0x7e1e1c30, (q31_t)0xf09797b2,
-    (q31_t)0x7e1b1482, (q31_t)0xf08b659f, (q31_t)0x7e180a6f, (q31_t)0xf07f3424,
-    (q31_t)0x7e14fdf7, (q31_t)0xf0730342, (q31_t)0x7e11ef1b, (q31_t)0xf066d2fa,
-    (q31_t)0x7e0eddd9, (q31_t)0xf05aa34c, (q31_t)0x7e0bca34, (q31_t)0xf04e7438,
-    (q31_t)0x7e08b42a, (q31_t)0xf04245c0, (q31_t)0x7e059bbb, (q31_t)0xf03617e2,
-    (q31_t)0x7e0280e9, (q31_t)0xf029eaa1, (q31_t)0x7dff63b2, (q31_t)0xf01dbdfb,
-    (q31_t)0x7dfc4418, (q31_t)0xf01191f3, (q31_t)0x7df9221a, (q31_t)0xf0056687,
-    (q31_t)0x7df5fdb8, (q31_t)0xeff93bba, (q31_t)0x7df2d6f3, (q31_t)0xefed118a,
-    (q31_t)0x7defadca, (q31_t)0xefe0e7f9, (q31_t)0x7dec823e, (q31_t)0xefd4bf08,
-    (q31_t)0x7de9544f, (q31_t)0xefc896b5, (q31_t)0x7de623fd, (q31_t)0xefbc6f03,
-    (q31_t)0x7de2f148, (q31_t)0xefb047f2, (q31_t)0x7ddfbc30, (q31_t)0xefa42181,
-    (q31_t)0x7ddc84b5, (q31_t)0xef97fbb2, (q31_t)0x7dd94ad8, (q31_t)0xef8bd685,
-    (q31_t)0x7dd60e99, (q31_t)0xef7fb1fa, (q31_t)0x7dd2cff7, (q31_t)0xef738e12,
-    (q31_t)0x7dcf8ef3, (q31_t)0xef676ace, (q31_t)0x7dcc4b8d, (q31_t)0xef5b482d,
-    (q31_t)0x7dc905c5, (q31_t)0xef4f2630, (q31_t)0x7dc5bd9b, (q31_t)0xef4304d8,
-    (q31_t)0x7dc2730f, (q31_t)0xef36e426, (q31_t)0x7dbf2622, (q31_t)0xef2ac419,
-    (q31_t)0x7dbbd6d4, (q31_t)0xef1ea4b2, (q31_t)0x7db88524, (q31_t)0xef1285f2,
-    (q31_t)0x7db53113, (q31_t)0xef0667d9, (q31_t)0x7db1daa2, (q31_t)0xeefa4a67,
-    (q31_t)0x7dae81cf, (q31_t)0xeeee2d9d, (q31_t)0x7dab269b, (q31_t)0xeee2117c,
-    (q31_t)0x7da7c907, (q31_t)0xeed5f604, (q31_t)0x7da46912, (q31_t)0xeec9db35,
-    (q31_t)0x7da106bd, (q31_t)0xeebdc110, (q31_t)0x7d9da208, (q31_t)0xeeb1a796,
-    (q31_t)0x7d9a3af2, (q31_t)0xeea58ec6, (q31_t)0x7d96d17d, (q31_t)0xee9976a1,
-    (q31_t)0x7d9365a8, (q31_t)0xee8d5f29, (q31_t)0x7d8ff772, (q31_t)0xee81485c,
-    (q31_t)0x7d8c86de, (q31_t)0xee75323c, (q31_t)0x7d8913ea, (q31_t)0xee691cc9,
-    (q31_t)0x7d859e96, (q31_t)0xee5d0804, (q31_t)0x7d8226e4, (q31_t)0xee50f3ed,
-    (q31_t)0x7d7eacd2, (q31_t)0xee44e084, (q31_t)0x7d7b3061, (q31_t)0xee38cdcb,
-    (q31_t)0x7d77b192, (q31_t)0xee2cbbc1, (q31_t)0x7d743064, (q31_t)0xee20aa67,
-    (q31_t)0x7d70acd7, (q31_t)0xee1499bd, (q31_t)0x7d6d26ec, (q31_t)0xee0889c4,
-    (q31_t)0x7d699ea3, (q31_t)0xedfc7a7c, (q31_t)0x7d6613fb, (q31_t)0xedf06be6,
-    (q31_t)0x7d6286f6, (q31_t)0xede45e03, (q31_t)0x7d5ef793, (q31_t)0xedd850d2,
-    (q31_t)0x7d5b65d2, (q31_t)0xedcc4454, (q31_t)0x7d57d1b3, (q31_t)0xedc0388a,
-    (q31_t)0x7d543b37, (q31_t)0xedb42d74, (q31_t)0x7d50a25e, (q31_t)0xeda82313,
-    (q31_t)0x7d4d0728, (q31_t)0xed9c1967, (q31_t)0x7d496994, (q31_t)0xed901070,
-    (q31_t)0x7d45c9a4, (q31_t)0xed84082f, (q31_t)0x7d422757, (q31_t)0xed7800a5,
-    (q31_t)0x7d3e82ae, (q31_t)0xed6bf9d1, (q31_t)0x7d3adba7, (q31_t)0xed5ff3b5,
-    (q31_t)0x7d373245, (q31_t)0xed53ee51, (q31_t)0x7d338687, (q31_t)0xed47e9a5,
-    (q31_t)0x7d2fd86c, (q31_t)0xed3be5b1, (q31_t)0x7d2c27f6, (q31_t)0xed2fe277,
-    (q31_t)0x7d287523, (q31_t)0xed23dff7, (q31_t)0x7d24bff6, (q31_t)0xed17de31,
-    (q31_t)0x7d21086c, (q31_t)0xed0bdd25, (q31_t)0x7d1d4e88, (q31_t)0xecffdcd4,
-    (q31_t)0x7d199248, (q31_t)0xecf3dd3f, (q31_t)0x7d15d3ad, (q31_t)0xece7de66,
-    (q31_t)0x7d1212b7, (q31_t)0xecdbe04a, (q31_t)0x7d0e4f67, (q31_t)0xeccfe2ea,
-    (q31_t)0x7d0a89bc, (q31_t)0xecc3e648, (q31_t)0x7d06c1b6, (q31_t)0xecb7ea63,
-    (q31_t)0x7d02f757, (q31_t)0xecabef3d, (q31_t)0x7cff2a9d, (q31_t)0xec9ff4d6,
-    (q31_t)0x7cfb5b89, (q31_t)0xec93fb2e, (q31_t)0x7cf78a1b, (q31_t)0xec880245,
-    (q31_t)0x7cf3b653, (q31_t)0xec7c0a1d, (q31_t)0x7cefe032, (q31_t)0xec7012b5,
-    (q31_t)0x7cec07b8, (q31_t)0xec641c0e, (q31_t)0x7ce82ce4, (q31_t)0xec582629,
-    (q31_t)0x7ce44fb7, (q31_t)0xec4c3106, (q31_t)0x7ce07031, (q31_t)0xec403ca5,
-    (q31_t)0x7cdc8e52, (q31_t)0xec344908, (q31_t)0x7cd8aa1b, (q31_t)0xec28562d,
-    (q31_t)0x7cd4c38b, (q31_t)0xec1c6417, (q31_t)0x7cd0daa2, (q31_t)0xec1072c4,
-    (q31_t)0x7cccef62, (q31_t)0xec048237, (q31_t)0x7cc901c9, (q31_t)0xebf8926f,
-    (q31_t)0x7cc511d9, (q31_t)0xebeca36c, (q31_t)0x7cc11f90, (q31_t)0xebe0b52f,
-    (q31_t)0x7cbd2af0, (q31_t)0xebd4c7ba, (q31_t)0x7cb933f9, (q31_t)0xebc8db0b,
-    (q31_t)0x7cb53aaa, (q31_t)0xebbcef23, (q31_t)0x7cb13f04, (q31_t)0xebb10404,
-    (q31_t)0x7cad4107, (q31_t)0xeba519ad, (q31_t)0x7ca940b3, (q31_t)0xeb99301f,
-    (q31_t)0x7ca53e09, (q31_t)0xeb8d475b, (q31_t)0x7ca13908, (q31_t)0xeb815f60,
-    (q31_t)0x7c9d31b0, (q31_t)0xeb75782f, (q31_t)0x7c992803, (q31_t)0xeb6991ca,
-    (q31_t)0x7c951bff, (q31_t)0xeb5dac2f, (q31_t)0x7c910da5, (q31_t)0xeb51c760,
-    (q31_t)0x7c8cfcf6, (q31_t)0xeb45e35d, (q31_t)0x7c88e9f1, (q31_t)0xeb3a0027,
-    (q31_t)0x7c84d496, (q31_t)0xeb2e1dbe, (q31_t)0x7c80bce7, (q31_t)0xeb223c22,
-    (q31_t)0x7c7ca2e2, (q31_t)0xeb165b54, (q31_t)0x7c788688, (q31_t)0xeb0a7b54,
-    (q31_t)0x7c7467d9, (q31_t)0xeafe9c24, (q31_t)0x7c7046d6, (q31_t)0xeaf2bdc3,
-    (q31_t)0x7c6c237e, (q31_t)0xeae6e031, (q31_t)0x7c67fdd1, (q31_t)0xeadb0370,
-    (q31_t)0x7c63d5d1, (q31_t)0xeacf277f, (q31_t)0x7c5fab7c, (q31_t)0xeac34c60,
-    (q31_t)0x7c5b7ed4, (q31_t)0xeab77212, (q31_t)0x7c574fd8, (q31_t)0xeaab9896,
-    (q31_t)0x7c531e88, (q31_t)0xea9fbfed, (q31_t)0x7c4eeae5, (q31_t)0xea93e817,
-    (q31_t)0x7c4ab4ef, (q31_t)0xea881114, (q31_t)0x7c467ca6, (q31_t)0xea7c3ae5,
-    (q31_t)0x7c42420a, (q31_t)0xea70658a, (q31_t)0x7c3e051b, (q31_t)0xea649105,
-    (q31_t)0x7c39c5da, (q31_t)0xea58bd54, (q31_t)0x7c358446, (q31_t)0xea4cea79,
-    (q31_t)0x7c314060, (q31_t)0xea411874, (q31_t)0x7c2cfa28, (q31_t)0xea354746,
-    (q31_t)0x7c28b19e, (q31_t)0xea2976ef, (q31_t)0x7c2466c2, (q31_t)0xea1da770,
-    (q31_t)0x7c201994, (q31_t)0xea11d8c8, (q31_t)0x7c1bca16, (q31_t)0xea060af9,
-    (q31_t)0x7c177845, (q31_t)0xe9fa3e03, (q31_t)0x7c132424, (q31_t)0xe9ee71e6,
-    (q31_t)0x7c0ecdb2, (q31_t)0xe9e2a6a3, (q31_t)0x7c0a74f0, (q31_t)0xe9d6dc3b,
-    (q31_t)0x7c0619dc, (q31_t)0xe9cb12ad, (q31_t)0x7c01bc78, (q31_t)0xe9bf49fa,
-    (q31_t)0x7bfd5cc4, (q31_t)0xe9b38223, (q31_t)0x7bf8fac0, (q31_t)0xe9a7bb28,
-    (q31_t)0x7bf4966c, (q31_t)0xe99bf509, (q31_t)0x7bf02fc9, (q31_t)0xe9902fc7,
-    (q31_t)0x7bebc6d5, (q31_t)0xe9846b63, (q31_t)0x7be75b93, (q31_t)0xe978a7dd,
-    (q31_t)0x7be2ee01, (q31_t)0xe96ce535, (q31_t)0x7bde7e20, (q31_t)0xe961236c,
-    (q31_t)0x7bda0bf0, (q31_t)0xe9556282, (q31_t)0x7bd59771, (q31_t)0xe949a278,
-    (q31_t)0x7bd120a4, (q31_t)0xe93de34e, (q31_t)0x7bcca789, (q31_t)0xe9322505,
-    (q31_t)0x7bc82c1f, (q31_t)0xe926679c, (q31_t)0x7bc3ae67, (q31_t)0xe91aab16,
-    (q31_t)0x7bbf2e62, (q31_t)0xe90eef71, (q31_t)0x7bbaac0e, (q31_t)0xe90334af,
-    (q31_t)0x7bb6276e, (q31_t)0xe8f77acf, (q31_t)0x7bb1a080, (q31_t)0xe8ebc1d3,
-    (q31_t)0x7bad1744, (q31_t)0xe8e009ba, (q31_t)0x7ba88bbc, (q31_t)0xe8d45286,
-    (q31_t)0x7ba3fde7, (q31_t)0xe8c89c37, (q31_t)0x7b9f6dc5, (q31_t)0xe8bce6cd,
-    (q31_t)0x7b9adb57, (q31_t)0xe8b13248, (q31_t)0x7b96469d, (q31_t)0xe8a57ea9,
-    (q31_t)0x7b91af97, (q31_t)0xe899cbf1, (q31_t)0x7b8d1644, (q31_t)0xe88e1a20,
-    (q31_t)0x7b887aa6, (q31_t)0xe8826936, (q31_t)0x7b83dcbc, (q31_t)0xe876b934,
-    (q31_t)0x7b7f3c87, (q31_t)0xe86b0a1a, (q31_t)0x7b7a9a07, (q31_t)0xe85f5be9,
-    (q31_t)0x7b75f53c, (q31_t)0xe853aea1, (q31_t)0x7b714e25, (q31_t)0xe8480243,
-    (q31_t)0x7b6ca4c4, (q31_t)0xe83c56cf, (q31_t)0x7b67f919, (q31_t)0xe830ac45,
-    (q31_t)0x7b634b23, (q31_t)0xe82502a7, (q31_t)0x7b5e9ae4, (q31_t)0xe81959f4,
-    (q31_t)0x7b59e85a, (q31_t)0xe80db22d, (q31_t)0x7b553386, (q31_t)0xe8020b52,
-    (q31_t)0x7b507c69, (q31_t)0xe7f66564, (q31_t)0x7b4bc303, (q31_t)0xe7eac063,
-    (q31_t)0x7b470753, (q31_t)0xe7df1c50, (q31_t)0x7b42495a, (q31_t)0xe7d3792b,
-    (q31_t)0x7b3d8918, (q31_t)0xe7c7d6f4, (q31_t)0x7b38c68e, (q31_t)0xe7bc35ad,
-    (q31_t)0x7b3401bb, (q31_t)0xe7b09555, (q31_t)0x7b2f3aa0, (q31_t)0xe7a4f5ed,
-    (q31_t)0x7b2a713d, (q31_t)0xe7995776, (q31_t)0x7b25a591, (q31_t)0xe78db9ef,
-    (q31_t)0x7b20d79e, (q31_t)0xe7821d59, (q31_t)0x7b1c0764, (q31_t)0xe77681b6,
-    (q31_t)0x7b1734e2, (q31_t)0xe76ae704, (q31_t)0x7b126019, (q31_t)0xe75f4d45,
-    (q31_t)0x7b0d8909, (q31_t)0xe753b479, (q31_t)0x7b08afb2, (q31_t)0xe7481ca1,
-    (q31_t)0x7b03d414, (q31_t)0xe73c85bc, (q31_t)0x7afef630, (q31_t)0xe730efcc,
-    (q31_t)0x7afa1605, (q31_t)0xe7255ad1, (q31_t)0x7af53395, (q31_t)0xe719c6cb,
-    (q31_t)0x7af04edf, (q31_t)0xe70e33bb, (q31_t)0x7aeb67e3, (q31_t)0xe702a1a1,
-    (q31_t)0x7ae67ea1, (q31_t)0xe6f7107e, (q31_t)0x7ae1931a, (q31_t)0xe6eb8052,
-    (q31_t)0x7adca54e, (q31_t)0xe6dff11d, (q31_t)0x7ad7b53d, (q31_t)0xe6d462e1,
-    (q31_t)0x7ad2c2e8, (q31_t)0xe6c8d59c, (q31_t)0x7acdce4d, (q31_t)0xe6bd4951,
-    (q31_t)0x7ac8d76f, (q31_t)0xe6b1bdff, (q31_t)0x7ac3de4c, (q31_t)0xe6a633a6,
-    (q31_t)0x7abee2e5, (q31_t)0xe69aaa48, (q31_t)0x7ab9e53a, (q31_t)0xe68f21e5,
-    (q31_t)0x7ab4e54c, (q31_t)0xe6839a7c, (q31_t)0x7aafe31b, (q31_t)0xe6781410,
-    (q31_t)0x7aaadea6, (q31_t)0xe66c8e9f, (q31_t)0x7aa5d7ee, (q31_t)0xe6610a2a,
-    (q31_t)0x7aa0cef3, (q31_t)0xe65586b3, (q31_t)0x7a9bc3b6, (q31_t)0xe64a0438,
-    (q31_t)0x7a96b636, (q31_t)0xe63e82bc, (q31_t)0x7a91a674, (q31_t)0xe633023e,
-    (q31_t)0x7a8c9470, (q31_t)0xe62782be, (q31_t)0x7a87802a, (q31_t)0xe61c043d,
-    (q31_t)0x7a8269a3, (q31_t)0xe61086bc, (q31_t)0x7a7d50da, (q31_t)0xe6050a3b,
-    (q31_t)0x7a7835cf, (q31_t)0xe5f98ebb, (q31_t)0x7a731884, (q31_t)0xe5ee143b,
-    (q31_t)0x7a6df8f8, (q31_t)0xe5e29abc, (q31_t)0x7a68d72b, (q31_t)0xe5d72240,
-    (q31_t)0x7a63b31d, (q31_t)0xe5cbaac5, (q31_t)0x7a5e8cd0, (q31_t)0xe5c0344d,
-    (q31_t)0x7a596442, (q31_t)0xe5b4bed8, (q31_t)0x7a543974, (q31_t)0xe5a94a67,
-    (q31_t)0x7a4f0c67, (q31_t)0xe59dd6f9, (q31_t)0x7a49dd1a, (q31_t)0xe5926490,
-    (q31_t)0x7a44ab8e, (q31_t)0xe586f32c, (q31_t)0x7a3f77c3, (q31_t)0xe57b82cd,
-    (q31_t)0x7a3a41b9, (q31_t)0xe5701374, (q31_t)0x7a350970, (q31_t)0xe564a521,
-    (q31_t)0x7a2fcee8, (q31_t)0xe55937d5, (q31_t)0x7a2a9223, (q31_t)0xe54dcb8f,
-    (q31_t)0x7a25531f, (q31_t)0xe5426051, (q31_t)0x7a2011de, (q31_t)0xe536f61b,
-    (q31_t)0x7a1ace5f, (q31_t)0xe52b8cee, (q31_t)0x7a1588a2, (q31_t)0xe52024c9,
-    (q31_t)0x7a1040a8, (q31_t)0xe514bdad, (q31_t)0x7a0af671, (q31_t)0xe509579b,
-    (q31_t)0x7a05a9fd, (q31_t)0xe4fdf294, (q31_t)0x7a005b4d, (q31_t)0xe4f28e96,
-    (q31_t)0x79fb0a60, (q31_t)0xe4e72ba4, (q31_t)0x79f5b737, (q31_t)0xe4dbc9bd,
-    (q31_t)0x79f061d2, (q31_t)0xe4d068e2, (q31_t)0x79eb0a31, (q31_t)0xe4c50914,
-    (q31_t)0x79e5b054, (q31_t)0xe4b9aa52, (q31_t)0x79e0543c, (q31_t)0xe4ae4c9d,
-    (q31_t)0x79daf5e8, (q31_t)0xe4a2eff6, (q31_t)0x79d5955a, (q31_t)0xe497945d,
-    (q31_t)0x79d03291, (q31_t)0xe48c39d3, (q31_t)0x79cacd8d, (q31_t)0xe480e057,
-    (q31_t)0x79c5664f, (q31_t)0xe47587eb, (q31_t)0x79bffcd7, (q31_t)0xe46a308f,
-    (q31_t)0x79ba9125, (q31_t)0xe45eda43, (q31_t)0x79b52339, (q31_t)0xe4538507,
-    (q31_t)0x79afb313, (q31_t)0xe44830dd, (q31_t)0x79aa40b4, (q31_t)0xe43cddc4,
-    (q31_t)0x79a4cc1c, (q31_t)0xe4318bbe, (q31_t)0x799f554b, (q31_t)0xe4263ac9,
-    (q31_t)0x7999dc42, (q31_t)0xe41aeae8, (q31_t)0x799460ff, (q31_t)0xe40f9c1a,
-    (q31_t)0x798ee385, (q31_t)0xe4044e60, (q31_t)0x798963d2, (q31_t)0xe3f901ba,
-    (q31_t)0x7983e1e8, (q31_t)0xe3edb628, (q31_t)0x797e5dc6, (q31_t)0xe3e26bac,
-    (q31_t)0x7978d76c, (q31_t)0xe3d72245, (q31_t)0x79734edc, (q31_t)0xe3cbd9f4,
-    (q31_t)0x796dc414, (q31_t)0xe3c092b9, (q31_t)0x79683715, (q31_t)0xe3b54c95,
-    (q31_t)0x7962a7e0, (q31_t)0xe3aa0788, (q31_t)0x795d1675, (q31_t)0xe39ec393,
-    (q31_t)0x795782d3, (q31_t)0xe39380b6, (q31_t)0x7951ecfc, (q31_t)0xe3883ef2,
-    (q31_t)0x794c54ee, (q31_t)0xe37cfe47, (q31_t)0x7946baac, (q31_t)0xe371beb5,
-    (q31_t)0x79411e33, (q31_t)0xe366803c, (q31_t)0x793b7f86, (q31_t)0xe35b42df,
-    (q31_t)0x7935dea4, (q31_t)0xe350069b, (q31_t)0x79303b8e, (q31_t)0xe344cb73,
-    (q31_t)0x792a9642, (q31_t)0xe3399167, (q31_t)0x7924eec3, (q31_t)0xe32e5876,
-    (q31_t)0x791f4510, (q31_t)0xe32320a2, (q31_t)0x79199929, (q31_t)0xe317e9eb,
-    (q31_t)0x7913eb0e, (q31_t)0xe30cb451, (q31_t)0x790e3ac0, (q31_t)0xe3017fd5,
-    (q31_t)0x7908883f, (q31_t)0xe2f64c77, (q31_t)0x7902d38b, (q31_t)0xe2eb1a37,
-    (q31_t)0x78fd1ca4, (q31_t)0xe2dfe917, (q31_t)0x78f7638b, (q31_t)0xe2d4b916,
-    (q31_t)0x78f1a840, (q31_t)0xe2c98a35, (q31_t)0x78ebeac2, (q31_t)0xe2be5c74,
-    (q31_t)0x78e62b13, (q31_t)0xe2b32fd4, (q31_t)0x78e06932, (q31_t)0xe2a80456,
-    (q31_t)0x78daa520, (q31_t)0xe29cd9f8, (q31_t)0x78d4dedd, (q31_t)0xe291b0bd,
-    (q31_t)0x78cf1669, (q31_t)0xe28688a4, (q31_t)0x78c94bc4, (q31_t)0xe27b61af,
-    (q31_t)0x78c37eef, (q31_t)0xe2703bdc, (q31_t)0x78bdafea, (q31_t)0xe265172e,
-    (q31_t)0x78b7deb4, (q31_t)0xe259f3a3, (q31_t)0x78b20b4f, (q31_t)0xe24ed13d,
-    (q31_t)0x78ac35ba, (q31_t)0xe243affc, (q31_t)0x78a65df6, (q31_t)0xe2388fe1,
-    (q31_t)0x78a08402, (q31_t)0xe22d70eb, (q31_t)0x789aa7e0, (q31_t)0xe222531c,
-    (q31_t)0x7894c98f, (q31_t)0xe2173674, (q31_t)0x788ee910, (q31_t)0xe20c1af3,
-    (q31_t)0x78890663, (q31_t)0xe2010099, (q31_t)0x78832187, (q31_t)0xe1f5e768,
-    (q31_t)0x787d3a7e, (q31_t)0xe1eacf5f, (q31_t)0x78775147, (q31_t)0xe1dfb87f,
-    (q31_t)0x787165e3, (q31_t)0xe1d4a2c8, (q31_t)0x786b7852, (q31_t)0xe1c98e3b,
-    (q31_t)0x78658894, (q31_t)0xe1be7ad8, (q31_t)0x785f96a9, (q31_t)0xe1b368a0,
-    (q31_t)0x7859a292, (q31_t)0xe1a85793, (q31_t)0x7853ac4f, (q31_t)0xe19d47b1,
-    (q31_t)0x784db3e0, (q31_t)0xe19238fb, (q31_t)0x7847b946, (q31_t)0xe1872b72,
-    (q31_t)0x7841bc7f, (q31_t)0xe17c1f15, (q31_t)0x783bbd8e, (q31_t)0xe17113e5,
-    (q31_t)0x7835bc71, (q31_t)0xe16609e3, (q31_t)0x782fb92a, (q31_t)0xe15b0110,
-    (q31_t)0x7829b3b9, (q31_t)0xe14ff96a, (q31_t)0x7823ac1d, (q31_t)0xe144f2f3,
-    (q31_t)0x781da256, (q31_t)0xe139edac, (q31_t)0x78179666, (q31_t)0xe12ee995,
-    (q31_t)0x7811884d, (q31_t)0xe123e6ad, (q31_t)0x780b780a, (q31_t)0xe118e4f6,
-    (q31_t)0x7805659e, (q31_t)0xe10de470, (q31_t)0x77ff5109, (q31_t)0xe102e51c,
-    (q31_t)0x77f93a4b, (q31_t)0xe0f7e6f9, (q31_t)0x77f32165, (q31_t)0xe0ecea09,
-    (q31_t)0x77ed0657, (q31_t)0xe0e1ee4b, (q31_t)0x77e6e921, (q31_t)0xe0d6f3c1,
-    (q31_t)0x77e0c9c3, (q31_t)0xe0cbfa6a, (q31_t)0x77daa83d, (q31_t)0xe0c10247,
-    (q31_t)0x77d48490, (q31_t)0xe0b60b58, (q31_t)0x77ce5ebd, (q31_t)0xe0ab159e,
-    (q31_t)0x77c836c2, (q31_t)0xe0a0211a, (q31_t)0x77c20ca1, (q31_t)0xe0952dcb,
-    (q31_t)0x77bbe05a, (q31_t)0xe08a3bb2, (q31_t)0x77b5b1ec, (q31_t)0xe07f4acf,
-    (q31_t)0x77af8159, (q31_t)0xe0745b24, (q31_t)0x77a94ea0, (q31_t)0xe0696cb0,
-    (q31_t)0x77a319c2, (q31_t)0xe05e7f74, (q31_t)0x779ce2be, (q31_t)0xe053936f,
-    (q31_t)0x7796a996, (q31_t)0xe048a8a4, (q31_t)0x77906e49, (q31_t)0xe03dbf11,
-    (q31_t)0x778a30d8, (q31_t)0xe032d6b8, (q31_t)0x7783f143, (q31_t)0xe027ef99,
-    (q31_t)0x777daf89, (q31_t)0xe01d09b4, (q31_t)0x77776bac, (q31_t)0xe012250a,
-    (q31_t)0x777125ac, (q31_t)0xe007419b, (q31_t)0x776add88, (q31_t)0xdffc5f67,
-    (q31_t)0x77649341, (q31_t)0xdff17e70, (q31_t)0x775e46d8, (q31_t)0xdfe69eb4,
-    (q31_t)0x7757f84c, (q31_t)0xdfdbc036, (q31_t)0x7751a79e, (q31_t)0xdfd0e2f5,
-    (q31_t)0x774b54ce, (q31_t)0xdfc606f1, (q31_t)0x7744ffdd, (q31_t)0xdfbb2c2c,
-    (q31_t)0x773ea8ca, (q31_t)0xdfb052a5, (q31_t)0x77384f95, (q31_t)0xdfa57a5d,
-    (q31_t)0x7731f440, (q31_t)0xdf9aa354, (q31_t)0x772b96ca, (q31_t)0xdf8fcd8b,
-    (q31_t)0x77253733, (q31_t)0xdf84f902, (q31_t)0x771ed57c, (q31_t)0xdf7a25ba,
-    (q31_t)0x771871a5, (q31_t)0xdf6f53b3, (q31_t)0x77120bae, (q31_t)0xdf6482ed,
-    (q31_t)0x770ba398, (q31_t)0xdf59b369, (q31_t)0x77053962, (q31_t)0xdf4ee527,
-    (q31_t)0x76fecd0e, (q31_t)0xdf441828, (q31_t)0x76f85e9a, (q31_t)0xdf394c6b,
-    (q31_t)0x76f1ee09, (q31_t)0xdf2e81f3, (q31_t)0x76eb7b58, (q31_t)0xdf23b8be,
-    (q31_t)0x76e5068a, (q31_t)0xdf18f0ce, (q31_t)0x76de8f9e, (q31_t)0xdf0e2a22,
-    (q31_t)0x76d81695, (q31_t)0xdf0364bc, (q31_t)0x76d19b6e, (q31_t)0xdef8a09b,
-    (q31_t)0x76cb1e2a, (q31_t)0xdeedddc0, (q31_t)0x76c49ec9, (q31_t)0xdee31c2b,
-    (q31_t)0x76be1d4c, (q31_t)0xded85bdd, (q31_t)0x76b799b3, (q31_t)0xdecd9cd7,
-    (q31_t)0x76b113fd, (q31_t)0xdec2df18, (q31_t)0x76aa8c2c, (q31_t)0xdeb822a1,
-    (q31_t)0x76a4023f, (q31_t)0xdead6773, (q31_t)0x769d7637, (q31_t)0xdea2ad8d,
-    (q31_t)0x7696e814, (q31_t)0xde97f4f1, (q31_t)0x769057d6, (q31_t)0xde8d3d9e,
-    (q31_t)0x7689c57d, (q31_t)0xde828796, (q31_t)0x7683310b, (q31_t)0xde77d2d8,
-    (q31_t)0x767c9a7e, (q31_t)0xde6d1f65, (q31_t)0x767601d7, (q31_t)0xde626d3e,
-    (q31_t)0x766f6717, (q31_t)0xde57bc62, (q31_t)0x7668ca3e, (q31_t)0xde4d0cd2,
-    (q31_t)0x76622b4c, (q31_t)0xde425e8f, (q31_t)0x765b8a41, (q31_t)0xde37b199,
-    (q31_t)0x7654e71d, (q31_t)0xde2d05f1, (q31_t)0x764e41e2, (q31_t)0xde225b96,
-    (q31_t)0x76479a8e, (q31_t)0xde17b28a, (q31_t)0x7640f123, (q31_t)0xde0d0acc,
-    (q31_t)0x763a45a0, (q31_t)0xde02645d, (q31_t)0x76339806, (q31_t)0xddf7bf3e,
-    (q31_t)0x762ce855, (q31_t)0xdded1b6e, (q31_t)0x7626368d, (q31_t)0xdde278ef,
-    (q31_t)0x761f82af, (q31_t)0xddd7d7c1, (q31_t)0x7618ccba, (q31_t)0xddcd37e4,
-    (q31_t)0x761214b0, (q31_t)0xddc29958, (q31_t)0x760b5a90, (q31_t)0xddb7fc1e,
-    (q31_t)0x76049e5b, (q31_t)0xddad6036, (q31_t)0x75fde011, (q31_t)0xdda2c5a2,
-    (q31_t)0x75f71fb1, (q31_t)0xdd982c60, (q31_t)0x75f05d3d, (q31_t)0xdd8d9472,
-    (q31_t)0x75e998b5, (q31_t)0xdd82fdd8, (q31_t)0x75e2d219, (q31_t)0xdd786892,
-    (q31_t)0x75dc0968, (q31_t)0xdd6dd4a2, (q31_t)0x75d53ea5, (q31_t)0xdd634206,
-    (q31_t)0x75ce71ce, (q31_t)0xdd58b0c0, (q31_t)0x75c7a2e3, (q31_t)0xdd4e20d0,
-    (q31_t)0x75c0d1e7, (q31_t)0xdd439236, (q31_t)0x75b9fed7, (q31_t)0xdd3904f4,
-    (q31_t)0x75b329b5, (q31_t)0xdd2e7908, (q31_t)0x75ac5282, (q31_t)0xdd23ee74,
-    (q31_t)0x75a5793c, (q31_t)0xdd196538, (q31_t)0x759e9de5, (q31_t)0xdd0edd55,
-    (q31_t)0x7597c07d, (q31_t)0xdd0456ca, (q31_t)0x7590e104, (q31_t)0xdcf9d199,
-    (q31_t)0x7589ff7a, (q31_t)0xdcef4dc2, (q31_t)0x75831be0, (q31_t)0xdce4cb44,
-    (q31_t)0x757c3636, (q31_t)0xdcda4a21, (q31_t)0x75754e7c, (q31_t)0xdccfca59,
-    (q31_t)0x756e64b2, (q31_t)0xdcc54bec, (q31_t)0x756778d9, (q31_t)0xdcbacedb,
-    (q31_t)0x75608af1, (q31_t)0xdcb05326, (q31_t)0x75599afa, (q31_t)0xdca5d8cd,
-    (q31_t)0x7552a8f4, (q31_t)0xdc9b5fd2, (q31_t)0x754bb4e1, (q31_t)0xdc90e834,
-    (q31_t)0x7544bebf, (q31_t)0xdc8671f3, (q31_t)0x753dc68f, (q31_t)0xdc7bfd11,
-    (q31_t)0x7536cc52, (q31_t)0xdc71898d, (q31_t)0x752fd008, (q31_t)0xdc671768,
-    (q31_t)0x7528d1b1, (q31_t)0xdc5ca6a2, (q31_t)0x7521d14d, (q31_t)0xdc52373c,
-    (q31_t)0x751acedd, (q31_t)0xdc47c936, (q31_t)0x7513ca60, (q31_t)0xdc3d5c91,
-    (q31_t)0x750cc3d8, (q31_t)0xdc32f14d, (q31_t)0x7505bb44, (q31_t)0xdc28876a,
-    (q31_t)0x74feb0a5, (q31_t)0xdc1e1ee9, (q31_t)0x74f7a3fb, (q31_t)0xdc13b7c9,
-    (q31_t)0x74f09546, (q31_t)0xdc09520d, (q31_t)0x74e98487, (q31_t)0xdbfeedb3,
-    (q31_t)0x74e271bd, (q31_t)0xdbf48abd, (q31_t)0x74db5cea, (q31_t)0xdbea292b,
-    (q31_t)0x74d4460c, (q31_t)0xdbdfc8fc, (q31_t)0x74cd2d26, (q31_t)0xdbd56a32,
-    (q31_t)0x74c61236, (q31_t)0xdbcb0cce, (q31_t)0x74bef53d, (q31_t)0xdbc0b0ce,
-    (q31_t)0x74b7d63c, (q31_t)0xdbb65634, (q31_t)0x74b0b533, (q31_t)0xdbabfd01,
-    (q31_t)0x74a99221, (q31_t)0xdba1a534, (q31_t)0x74a26d08, (q31_t)0xdb974ece,
-    (q31_t)0x749b45e7, (q31_t)0xdb8cf9cf, (q31_t)0x74941cbf, (q31_t)0xdb82a638,
-    (q31_t)0x748cf190, (q31_t)0xdb785409, (q31_t)0x7485c45b, (q31_t)0xdb6e0342,
-    (q31_t)0x747e951f, (q31_t)0xdb63b3e5, (q31_t)0x747763dd, (q31_t)0xdb5965f1,
-    (q31_t)0x74703095, (q31_t)0xdb4f1967, (q31_t)0x7468fb47, (q31_t)0xdb44ce46,
-    (q31_t)0x7461c3f5, (q31_t)0xdb3a8491, (q31_t)0x745a8a9d, (q31_t)0xdb303c46,
-    (q31_t)0x74534f41, (q31_t)0xdb25f566, (q31_t)0x744c11e0, (q31_t)0xdb1baff2,
-    (q31_t)0x7444d27b, (q31_t)0xdb116beb, (q31_t)0x743d9112, (q31_t)0xdb072950,
-    (q31_t)0x74364da6, (q31_t)0xdafce821, (q31_t)0x742f0836, (q31_t)0xdaf2a860,
-    (q31_t)0x7427c0c3, (q31_t)0xdae86a0d, (q31_t)0x7420774d, (q31_t)0xdade2d28,
-    (q31_t)0x74192bd5, (q31_t)0xdad3f1b1, (q31_t)0x7411de5b, (q31_t)0xdac9b7a9,
-    (q31_t)0x740a8edf, (q31_t)0xdabf7f11, (q31_t)0x74033d61, (q31_t)0xdab547e8,
-    (q31_t)0x73fbe9e2, (q31_t)0xdaab122f, (q31_t)0x73f49462, (q31_t)0xdaa0dde7,
-    (q31_t)0x73ed3ce1, (q31_t)0xda96ab0f, (q31_t)0x73e5e360, (q31_t)0xda8c79a9,
-    (q31_t)0x73de87de, (q31_t)0xda8249b4, (q31_t)0x73d72a5d, (q31_t)0xda781b31,
-    (q31_t)0x73cfcadc, (q31_t)0xda6dee21, (q31_t)0x73c8695b, (q31_t)0xda63c284,
-    (q31_t)0x73c105db, (q31_t)0xda599859, (q31_t)0x73b9a05d, (q31_t)0xda4f6fa3,
-    (q31_t)0x73b238e0, (q31_t)0xda454860, (q31_t)0x73aacf65, (q31_t)0xda3b2292,
-    (q31_t)0x73a363ec, (q31_t)0xda30fe38, (q31_t)0x739bf675, (q31_t)0xda26db54,
-    (q31_t)0x73948701, (q31_t)0xda1cb9e5, (q31_t)0x738d1590, (q31_t)0xda1299ec,
-    (q31_t)0x7385a222, (q31_t)0xda087b69, (q31_t)0x737e2cb7, (q31_t)0xd9fe5e5e,
-    (q31_t)0x7376b551, (q31_t)0xd9f442c9, (q31_t)0x736f3bee, (q31_t)0xd9ea28ac,
-    (q31_t)0x7367c090, (q31_t)0xd9e01006, (q31_t)0x73604336, (q31_t)0xd9d5f8d9,
-    (q31_t)0x7358c3e2, (q31_t)0xd9cbe325, (q31_t)0x73514292, (q31_t)0xd9c1cee9,
-    (q31_t)0x7349bf48, (q31_t)0xd9b7bc27, (q31_t)0x73423a04, (q31_t)0xd9adaadf,
-    (q31_t)0x733ab2c6, (q31_t)0xd9a39b11, (q31_t)0x7333298f, (q31_t)0xd9998cbe,
-    (q31_t)0x732b9e5e, (q31_t)0xd98f7fe6, (q31_t)0x73241134, (q31_t)0xd9857489,
-    (q31_t)0x731c8211, (q31_t)0xd97b6aa8, (q31_t)0x7314f0f6, (q31_t)0xd9716243,
-    (q31_t)0x730d5de3, (q31_t)0xd9675b5a, (q31_t)0x7305c8d7, (q31_t)0xd95d55ef,
-    (q31_t)0x72fe31d5, (q31_t)0xd9535201, (q31_t)0x72f698db, (q31_t)0xd9494f90,
-    (q31_t)0x72eefdea, (q31_t)0xd93f4e9e, (q31_t)0x72e76102, (q31_t)0xd9354f2a,
-    (q31_t)0x72dfc224, (q31_t)0xd92b5135, (q31_t)0x72d82150, (q31_t)0xd92154bf,
-    (q31_t)0x72d07e85, (q31_t)0xd91759c9, (q31_t)0x72c8d9c6, (q31_t)0xd90d6053,
-    (q31_t)0x72c13311, (q31_t)0xd903685d, (q31_t)0x72b98a67, (q31_t)0xd8f971e8,
-    (q31_t)0x72b1dfc9, (q31_t)0xd8ef7cf4, (q31_t)0x72aa3336, (q31_t)0xd8e58982,
-    (q31_t)0x72a284b0, (q31_t)0xd8db9792, (q31_t)0x729ad435, (q31_t)0xd8d1a724,
-    (q31_t)0x729321c7, (q31_t)0xd8c7b838, (q31_t)0x728b6d66, (q31_t)0xd8bdcad0,
-    (q31_t)0x7283b712, (q31_t)0xd8b3deeb, (q31_t)0x727bfecc, (q31_t)0xd8a9f48a,
-    (q31_t)0x72744493, (q31_t)0xd8a00bae, (q31_t)0x726c8868, (q31_t)0xd8962456,
-    (q31_t)0x7264ca4c, (q31_t)0xd88c3e83, (q31_t)0x725d0a3e, (q31_t)0xd8825a35,
-    (q31_t)0x72554840, (q31_t)0xd878776d, (q31_t)0x724d8450, (q31_t)0xd86e962b,
-    (q31_t)0x7245be70, (q31_t)0xd864b670, (q31_t)0x723df6a0, (q31_t)0xd85ad83c,
-    (q31_t)0x72362ce0, (q31_t)0xd850fb8e, (q31_t)0x722e6130, (q31_t)0xd8472069,
-    (q31_t)0x72269391, (q31_t)0xd83d46cc, (q31_t)0x721ec403, (q31_t)0xd8336eb7,
-    (q31_t)0x7216f287, (q31_t)0xd829982b, (q31_t)0x720f1f1c, (q31_t)0xd81fc328,
-    (q31_t)0x720749c3, (q31_t)0xd815efae, (q31_t)0x71ff727c, (q31_t)0xd80c1dbf,
-    (q31_t)0x71f79948, (q31_t)0xd8024d59, (q31_t)0x71efbe27, (q31_t)0xd7f87e7f,
-    (q31_t)0x71e7e118, (q31_t)0xd7eeb130, (q31_t)0x71e0021e, (q31_t)0xd7e4e56c,
-    (q31_t)0x71d82137, (q31_t)0xd7db1b34, (q31_t)0x71d03e64, (q31_t)0xd7d15288,
-    (q31_t)0x71c859a5, (q31_t)0xd7c78b68, (q31_t)0x71c072fb, (q31_t)0xd7bdc5d6,
-    (q31_t)0x71b88a66, (q31_t)0xd7b401d1, (q31_t)0x71b09fe7, (q31_t)0xd7aa3f5a,
-    (q31_t)0x71a8b37c, (q31_t)0xd7a07e70, (q31_t)0x71a0c528, (q31_t)0xd796bf16,
-    (q31_t)0x7198d4ea, (q31_t)0xd78d014a, (q31_t)0x7190e2c3, (q31_t)0xd783450d,
-    (q31_t)0x7188eeb2, (q31_t)0xd7798a60, (q31_t)0x7180f8b8, (q31_t)0xd76fd143,
-    (q31_t)0x717900d6, (q31_t)0xd76619b6, (q31_t)0x7171070c, (q31_t)0xd75c63ba,
-    (q31_t)0x71690b59, (q31_t)0xd752af4f, (q31_t)0x71610dbf, (q31_t)0xd748fc75,
-    (q31_t)0x71590e3e, (q31_t)0xd73f4b2e, (q31_t)0x71510cd5, (q31_t)0xd7359b78,
-    (q31_t)0x71490986, (q31_t)0xd72bed55, (q31_t)0x71410450, (q31_t)0xd72240c5,
-    (q31_t)0x7138fd35, (q31_t)0xd71895c9, (q31_t)0x7130f433, (q31_t)0xd70eec60,
-    (q31_t)0x7128e94c, (q31_t)0xd705448b, (q31_t)0x7120dc80, (q31_t)0xd6fb9e4b,
-    (q31_t)0x7118cdcf, (q31_t)0xd6f1f99f, (q31_t)0x7110bd39, (q31_t)0xd6e85689,
-    (q31_t)0x7108aabf, (q31_t)0xd6deb508, (q31_t)0x71009661, (q31_t)0xd6d5151d,
-    (q31_t)0x70f8801f, (q31_t)0xd6cb76c9, (q31_t)0x70f067fb, (q31_t)0xd6c1da0b,
-    (q31_t)0x70e84df3, (q31_t)0xd6b83ee4, (q31_t)0x70e03208, (q31_t)0xd6aea555,
-    (q31_t)0x70d8143b, (q31_t)0xd6a50d5d, (q31_t)0x70cff48c, (q31_t)0xd69b76fe,
-    (q31_t)0x70c7d2fb, (q31_t)0xd691e237, (q31_t)0x70bfaf89, (q31_t)0xd6884f09,
-    (q31_t)0x70b78a36, (q31_t)0xd67ebd74, (q31_t)0x70af6302, (q31_t)0xd6752d79,
-    (q31_t)0x70a739ed, (q31_t)0xd66b9f18, (q31_t)0x709f0ef8, (q31_t)0xd6621251,
-    (q31_t)0x7096e223, (q31_t)0xd6588725, (q31_t)0x708eb36f, (q31_t)0xd64efd94,
-    (q31_t)0x708682dc, (q31_t)0xd645759f, (q31_t)0x707e5069, (q31_t)0xd63bef46,
-    (q31_t)0x70761c18, (q31_t)0xd6326a88, (q31_t)0x706de5e9, (q31_t)0xd628e767,
-    (q31_t)0x7065addb, (q31_t)0xd61f65e4, (q31_t)0x705d73f0, (q31_t)0xd615e5fd,
-    (q31_t)0x70553828, (q31_t)0xd60c67b4, (q31_t)0x704cfa83, (q31_t)0xd602eb0a,
-    (q31_t)0x7044bb00, (q31_t)0xd5f96ffd, (q31_t)0x703c79a2, (q31_t)0xd5eff690,
-    (q31_t)0x70343667, (q31_t)0xd5e67ec1, (q31_t)0x702bf151, (q31_t)0xd5dd0892,
-    (q31_t)0x7023aa5f, (q31_t)0xd5d39403, (q31_t)0x701b6193, (q31_t)0xd5ca2115,
-    (q31_t)0x701316eb, (q31_t)0xd5c0afc6, (q31_t)0x700aca69, (q31_t)0xd5b74019,
-    (q31_t)0x70027c0c, (q31_t)0xd5add20d, (q31_t)0x6ffa2bd6, (q31_t)0xd5a465a3,
-    (q31_t)0x6ff1d9c7, (q31_t)0xd59afadb, (q31_t)0x6fe985de, (q31_t)0xd59191b5,
-    (q31_t)0x6fe1301c, (q31_t)0xd5882a32, (q31_t)0x6fd8d882, (q31_t)0xd57ec452,
-    (q31_t)0x6fd07f0f, (q31_t)0xd5756016, (q31_t)0x6fc823c5, (q31_t)0xd56bfd7d,
-    (q31_t)0x6fbfc6a3, (q31_t)0xd5629c89, (q31_t)0x6fb767aa, (q31_t)0xd5593d3a,
-    (q31_t)0x6faf06da, (q31_t)0xd54fdf8f, (q31_t)0x6fa6a433, (q31_t)0xd5468389,
-    (q31_t)0x6f9e3fb6, (q31_t)0xd53d292a, (q31_t)0x6f95d963, (q31_t)0xd533d070,
-    (q31_t)0x6f8d713a, (q31_t)0xd52a795d, (q31_t)0x6f85073c, (q31_t)0xd52123f0,
-    (q31_t)0x6f7c9b69, (q31_t)0xd517d02b, (q31_t)0x6f742dc1, (q31_t)0xd50e7e0d,
-    (q31_t)0x6f6bbe45, (q31_t)0xd5052d97, (q31_t)0x6f634cf5, (q31_t)0xd4fbdec9,
-    (q31_t)0x6f5ad9d1, (q31_t)0xd4f291a4, (q31_t)0x6f5264da, (q31_t)0xd4e94627,
-    (q31_t)0x6f49ee0f, (q31_t)0xd4dffc54, (q31_t)0x6f417573, (q31_t)0xd4d6b42b,
-    (q31_t)0x6f38fb03, (q31_t)0xd4cd6dab, (q31_t)0x6f307ec2, (q31_t)0xd4c428d6,
-    (q31_t)0x6f2800af, (q31_t)0xd4bae5ab, (q31_t)0x6f1f80ca, (q31_t)0xd4b1a42c,
-    (q31_t)0x6f16ff14, (q31_t)0xd4a86458, (q31_t)0x6f0e7b8e, (q31_t)0xd49f2630,
-    (q31_t)0x6f05f637, (q31_t)0xd495e9b3, (q31_t)0x6efd6f10, (q31_t)0xd48caee4,
-    (q31_t)0x6ef4e619, (q31_t)0xd48375c1, (q31_t)0x6eec5b53, (q31_t)0xd47a3e4b,
-    (q31_t)0x6ee3cebe, (q31_t)0xd4710883, (q31_t)0x6edb405a, (q31_t)0xd467d469,
-    (q31_t)0x6ed2b027, (q31_t)0xd45ea1fd, (q31_t)0x6eca1e27, (q31_t)0xd4557140,
-    (q31_t)0x6ec18a58, (q31_t)0xd44c4232, (q31_t)0x6eb8f4bc, (q31_t)0xd44314d3,
-    (q31_t)0x6eb05d53, (q31_t)0xd439e923, (q31_t)0x6ea7c41e, (q31_t)0xd430bf24,
-    (q31_t)0x6e9f291b, (q31_t)0xd42796d5, (q31_t)0x6e968c4d, (q31_t)0xd41e7037,
-    (q31_t)0x6e8dedb3, (q31_t)0xd4154b4a, (q31_t)0x6e854d4d, (q31_t)0xd40c280e,
-    (q31_t)0x6e7cab1c, (q31_t)0xd4030684, (q31_t)0x6e740720, (q31_t)0xd3f9e6ad,
-    (q31_t)0x6e6b615a, (q31_t)0xd3f0c887, (q31_t)0x6e62b9ca, (q31_t)0xd3e7ac15,
-    (q31_t)0x6e5a1070, (q31_t)0xd3de9156, (q31_t)0x6e51654c, (q31_t)0xd3d5784a,
-    (q31_t)0x6e48b860, (q31_t)0xd3cc60f2, (q31_t)0x6e4009aa, (q31_t)0xd3c34b4f,
-    (q31_t)0x6e37592c, (q31_t)0xd3ba3760, (q31_t)0x6e2ea6e6, (q31_t)0xd3b12526,
-    (q31_t)0x6e25f2d8, (q31_t)0xd3a814a2, (q31_t)0x6e1d3d03, (q31_t)0xd39f05d3,
-    (q31_t)0x6e148566, (q31_t)0xd395f8ba, (q31_t)0x6e0bcc03, (q31_t)0xd38ced57,
-    (q31_t)0x6e0310d9, (q31_t)0xd383e3ab, (q31_t)0x6dfa53e9, (q31_t)0xd37adbb6,
-    (q31_t)0x6df19534, (q31_t)0xd371d579, (q31_t)0x6de8d4b8, (q31_t)0xd368d0f3,
-    (q31_t)0x6de01278, (q31_t)0xd35fce26, (q31_t)0x6dd74e73, (q31_t)0xd356cd11,
-    (q31_t)0x6dce88aa, (q31_t)0xd34dcdb4, (q31_t)0x6dc5c11c, (q31_t)0xd344d011,
-    (q31_t)0x6dbcf7cb, (q31_t)0xd33bd427, (q31_t)0x6db42cb6, (q31_t)0xd332d9f7,
-    (q31_t)0x6dab5fdf, (q31_t)0xd329e181, (q31_t)0x6da29144, (q31_t)0xd320eac6,
-    (q31_t)0x6d99c0e7, (q31_t)0xd317f5c6, (q31_t)0x6d90eec8, (q31_t)0xd30f0280,
-    (q31_t)0x6d881ae8, (q31_t)0xd30610f7, (q31_t)0x6d7f4545, (q31_t)0xd2fd2129,
-    (q31_t)0x6d766de2, (q31_t)0xd2f43318, (q31_t)0x6d6d94bf, (q31_t)0xd2eb46c3,
-    (q31_t)0x6d64b9da, (q31_t)0xd2e25c2b, (q31_t)0x6d5bdd36, (q31_t)0xd2d97350,
-    (q31_t)0x6d52fed2, (q31_t)0xd2d08c33, (q31_t)0x6d4a1eaf, (q31_t)0xd2c7a6d4,
-    (q31_t)0x6d413ccd, (q31_t)0xd2bec333, (q31_t)0x6d38592c, (q31_t)0xd2b5e151,
-    (q31_t)0x6d2f73cd, (q31_t)0xd2ad012e, (q31_t)0x6d268cb0, (q31_t)0xd2a422ca,
-    (q31_t)0x6d1da3d5, (q31_t)0xd29b4626, (q31_t)0x6d14b93d, (q31_t)0xd2926b41,
-    (q31_t)0x6d0bcce8, (q31_t)0xd289921e, (q31_t)0x6d02ded7, (q31_t)0xd280babb,
-    (q31_t)0x6cf9ef09, (q31_t)0xd277e518, (q31_t)0x6cf0fd80, (q31_t)0xd26f1138,
-    (q31_t)0x6ce80a3a, (q31_t)0xd2663f19, (q31_t)0x6cdf153a, (q31_t)0xd25d6ebc,
-    (q31_t)0x6cd61e7f, (q31_t)0xd254a021, (q31_t)0x6ccd2609, (q31_t)0xd24bd34a,
-    (q31_t)0x6cc42bd9, (q31_t)0xd2430835, (q31_t)0x6cbb2fef, (q31_t)0xd23a3ee4,
-    (q31_t)0x6cb2324c, (q31_t)0xd2317756, (q31_t)0x6ca932ef, (q31_t)0xd228b18d,
-    (q31_t)0x6ca031da, (q31_t)0xd21fed88, (q31_t)0x6c972f0d, (q31_t)0xd2172b48,
-    (q31_t)0x6c8e2a87, (q31_t)0xd20e6acc, (q31_t)0x6c85244a, (q31_t)0xd205ac17,
-    (q31_t)0x6c7c1c55, (q31_t)0xd1fcef27, (q31_t)0x6c7312a9, (q31_t)0xd1f433fd,
-    (q31_t)0x6c6a0746, (q31_t)0xd1eb7a9a, (q31_t)0x6c60fa2d, (q31_t)0xd1e2c2fd,
-    (q31_t)0x6c57eb5e, (q31_t)0xd1da0d28, (q31_t)0x6c4edada, (q31_t)0xd1d1591a,
-    (q31_t)0x6c45c8a0, (q31_t)0xd1c8a6d4, (q31_t)0x6c3cb4b1, (q31_t)0xd1bff656,
-    (q31_t)0x6c339f0e, (q31_t)0xd1b747a0, (q31_t)0x6c2a87b6, (q31_t)0xd1ae9ab4,
-    (q31_t)0x6c216eaa, (q31_t)0xd1a5ef90, (q31_t)0x6c1853eb, (q31_t)0xd19d4636,
-    (q31_t)0x6c0f3779, (q31_t)0xd1949ea6, (q31_t)0x6c061953, (q31_t)0xd18bf8e0,
-    (q31_t)0x6bfcf97c, (q31_t)0xd18354e4, (q31_t)0x6bf3d7f2, (q31_t)0xd17ab2b3,
-    (q31_t)0x6beab4b6, (q31_t)0xd172124d, (q31_t)0x6be18fc9, (q31_t)0xd16973b3,
-    (q31_t)0x6bd8692b, (q31_t)0xd160d6e5, (q31_t)0x6bcf40dc, (q31_t)0xd1583be2,
-    (q31_t)0x6bc616dd, (q31_t)0xd14fa2ad, (q31_t)0x6bbceb2d, (q31_t)0xd1470b44,
-    (q31_t)0x6bb3bdce, (q31_t)0xd13e75a8, (q31_t)0x6baa8ec0, (q31_t)0xd135e1d9,
-    (q31_t)0x6ba15e03, (q31_t)0xd12d4fd9, (q31_t)0x6b982b97, (q31_t)0xd124bfa6,
-    (q31_t)0x6b8ef77d, (q31_t)0xd11c3142, (q31_t)0x6b85c1b5, (q31_t)0xd113a4ad,
-    (q31_t)0x6b7c8a3f, (q31_t)0xd10b19e7, (q31_t)0x6b73511c, (q31_t)0xd10290f0,
-    (q31_t)0x6b6a164d, (q31_t)0xd0fa09c9, (q31_t)0x6b60d9d0, (q31_t)0xd0f18472,
-    (q31_t)0x6b579ba8, (q31_t)0xd0e900ec, (q31_t)0x6b4e5bd4, (q31_t)0xd0e07f36,
-    (q31_t)0x6b451a55, (q31_t)0xd0d7ff51, (q31_t)0x6b3bd72a, (q31_t)0xd0cf813e,
-    (q31_t)0x6b329255, (q31_t)0xd0c704fd, (q31_t)0x6b294bd5, (q31_t)0xd0be8a8d,
-    (q31_t)0x6b2003ac, (q31_t)0xd0b611f1, (q31_t)0x6b16b9d9, (q31_t)0xd0ad9b26,
-    (q31_t)0x6b0d6e5c, (q31_t)0xd0a5262f, (q31_t)0x6b042137, (q31_t)0xd09cb30b,
-    (q31_t)0x6afad269, (q31_t)0xd09441bb, (q31_t)0x6af181f3, (q31_t)0xd08bd23f,
-    (q31_t)0x6ae82fd5, (q31_t)0xd0836497, (q31_t)0x6adedc10, (q31_t)0xd07af8c4,
-    (q31_t)0x6ad586a3, (q31_t)0xd0728ec6, (q31_t)0x6acc2f90, (q31_t)0xd06a269d,
-    (q31_t)0x6ac2d6d6, (q31_t)0xd061c04a, (q31_t)0x6ab97c77, (q31_t)0xd0595bcd,
-    (q31_t)0x6ab02071, (q31_t)0xd050f926, (q31_t)0x6aa6c2c6, (q31_t)0xd0489856,
-    (q31_t)0x6a9d6377, (q31_t)0xd040395d, (q31_t)0x6a940283, (q31_t)0xd037dc3b,
-    (q31_t)0x6a8a9fea, (q31_t)0xd02f80f1, (q31_t)0x6a813bae, (q31_t)0xd027277e,
-    (q31_t)0x6a77d5ce, (q31_t)0xd01ecfe4, (q31_t)0x6a6e6e4b, (q31_t)0xd0167a22,
-    (q31_t)0x6a650525, (q31_t)0xd00e2639, (q31_t)0x6a5b9a5d, (q31_t)0xd005d42a,
-    (q31_t)0x6a522df3, (q31_t)0xcffd83f4, (q31_t)0x6a48bfe7, (q31_t)0xcff53597,
-    (q31_t)0x6a3f503a, (q31_t)0xcfece915, (q31_t)0x6a35deeb, (q31_t)0xcfe49e6d,
-    (q31_t)0x6a2c6bfd, (q31_t)0xcfdc55a1, (q31_t)0x6a22f76e, (q31_t)0xcfd40eaf,
-    (q31_t)0x6a19813f, (q31_t)0xcfcbc999, (q31_t)0x6a100970, (q31_t)0xcfc3865e,
-    (q31_t)0x6a069003, (q31_t)0xcfbb4500, (q31_t)0x69fd14f6, (q31_t)0xcfb3057d,
-    (q31_t)0x69f3984c, (q31_t)0xcfaac7d8, (q31_t)0x69ea1a03, (q31_t)0xcfa28c10,
-    (q31_t)0x69e09a1c, (q31_t)0xcf9a5225, (q31_t)0x69d71899, (q31_t)0xcf921a17,
-    (q31_t)0x69cd9578, (q31_t)0xcf89e3e8, (q31_t)0x69c410ba, (q31_t)0xcf81af97,
-    (q31_t)0x69ba8a61, (q31_t)0xcf797d24, (q31_t)0x69b1026c, (q31_t)0xcf714c91,
-    (q31_t)0x69a778db, (q31_t)0xcf691ddd, (q31_t)0x699dedaf, (q31_t)0xcf60f108,
-    (q31_t)0x699460e8, (q31_t)0xcf58c613, (q31_t)0x698ad287, (q31_t)0xcf509cfe,
-    (q31_t)0x6981428c, (q31_t)0xcf4875ca, (q31_t)0x6977b0f7, (q31_t)0xcf405077,
-    (q31_t)0x696e1dc9, (q31_t)0xcf382d05, (q31_t)0x69648902, (q31_t)0xcf300b74,
-    (q31_t)0x695af2a3, (q31_t)0xcf27ebc5, (q31_t)0x69515aab, (q31_t)0xcf1fcdf8,
-    (q31_t)0x6947c11c, (q31_t)0xcf17b20d, (q31_t)0x693e25f5, (q31_t)0xcf0f9805,
-    (q31_t)0x69348937, (q31_t)0xcf077fe1, (q31_t)0x692aeae3, (q31_t)0xceff699f,
-    (q31_t)0x69214af8, (q31_t)0xcef75541, (q31_t)0x6917a977, (q31_t)0xceef42c7,
-    (q31_t)0x690e0661, (q31_t)0xcee73231, (q31_t)0x690461b5, (q31_t)0xcedf2380,
-    (q31_t)0x68fabb75, (q31_t)0xced716b4, (q31_t)0x68f113a0, (q31_t)0xcecf0bcd,
-    (q31_t)0x68e76a37, (q31_t)0xcec702cb, (q31_t)0x68ddbf3b, (q31_t)0xcebefbb0,
-    (q31_t)0x68d412ab, (q31_t)0xceb6f67a, (q31_t)0x68ca6488, (q31_t)0xceaef32b,
-    (q31_t)0x68c0b4d2, (q31_t)0xcea6f1c2, (q31_t)0x68b7038b, (q31_t)0xce9ef241,
-    (q31_t)0x68ad50b1, (q31_t)0xce96f4a7, (q31_t)0x68a39c46, (q31_t)0xce8ef8f4,
-    (q31_t)0x6899e64a, (q31_t)0xce86ff2a, (q31_t)0x68902ebd, (q31_t)0xce7f0748,
-    (q31_t)0x688675a0, (q31_t)0xce77114e, (q31_t)0x687cbaf3, (q31_t)0xce6f1d3d,
-    (q31_t)0x6872feb6, (q31_t)0xce672b16, (q31_t)0x686940ea, (q31_t)0xce5f3ad8,
-    (q31_t)0x685f8190, (q31_t)0xce574c84, (q31_t)0x6855c0a6, (q31_t)0xce4f6019,
-    (q31_t)0x684bfe2f, (q31_t)0xce47759a, (q31_t)0x68423a2a, (q31_t)0xce3f8d05,
-    (q31_t)0x68387498, (q31_t)0xce37a65b, (q31_t)0x682ead78, (q31_t)0xce2fc19c,
-    (q31_t)0x6824e4cc, (q31_t)0xce27dec9, (q31_t)0x681b1a94, (q31_t)0xce1ffde2,
-    (q31_t)0x68114ed0, (q31_t)0xce181ee8, (q31_t)0x68078181, (q31_t)0xce1041d9,
-    (q31_t)0x67fdb2a7, (q31_t)0xce0866b8, (q31_t)0x67f3e241, (q31_t)0xce008d84,
-    (q31_t)0x67ea1052, (q31_t)0xcdf8b63d, (q31_t)0x67e03cd8, (q31_t)0xcdf0e0e4,
-    (q31_t)0x67d667d5, (q31_t)0xcde90d79, (q31_t)0x67cc9149, (q31_t)0xcde13bfd,
-    (q31_t)0x67c2b934, (q31_t)0xcdd96c6f, (q31_t)0x67b8df97, (q31_t)0xcdd19ed0,
-    (q31_t)0x67af0472, (q31_t)0xcdc9d320, (q31_t)0x67a527c4, (q31_t)0xcdc20960,
-    (q31_t)0x679b4990, (q31_t)0xcdba4190, (q31_t)0x679169d5, (q31_t)0xcdb27bb0,
-    (q31_t)0x67878893, (q31_t)0xcdaab7c0, (q31_t)0x677da5cb, (q31_t)0xcda2f5c2,
-    (q31_t)0x6773c17d, (q31_t)0xcd9b35b4, (q31_t)0x6769dbaa, (q31_t)0xcd937798,
-    (q31_t)0x675ff452, (q31_t)0xcd8bbb6d, (q31_t)0x67560b76, (q31_t)0xcd840134,
-    (q31_t)0x674c2115, (q31_t)0xcd7c48ee, (q31_t)0x67423530, (q31_t)0xcd74929a,
-    (q31_t)0x673847c8, (q31_t)0xcd6cde39, (q31_t)0x672e58dc, (q31_t)0xcd652bcb,
-    (q31_t)0x6724686e, (q31_t)0xcd5d7b50, (q31_t)0x671a767e, (q31_t)0xcd55ccca,
-    (q31_t)0x6710830c, (q31_t)0xcd4e2037, (q31_t)0x67068e18, (q31_t)0xcd467599,
-    (q31_t)0x66fc97a3, (q31_t)0xcd3eccef, (q31_t)0x66f29fad, (q31_t)0xcd37263a,
-    (q31_t)0x66e8a637, (q31_t)0xcd2f817b, (q31_t)0x66deab41, (q31_t)0xcd27deb0,
-    (q31_t)0x66d4aecb, (q31_t)0xcd203ddc, (q31_t)0x66cab0d6, (q31_t)0xcd189efe,
-    (q31_t)0x66c0b162, (q31_t)0xcd110216, (q31_t)0x66b6b070, (q31_t)0xcd096725,
-    (q31_t)0x66acadff, (q31_t)0xcd01ce2b, (q31_t)0x66a2aa11, (q31_t)0xccfa3729,
-    (q31_t)0x6698a4a6, (q31_t)0xccf2a21d, (q31_t)0x668e9dbd, (q31_t)0xcceb0f0a,
-    (q31_t)0x66849558, (q31_t)0xcce37def, (q31_t)0x667a8b77, (q31_t)0xccdbeecc,
-    (q31_t)0x6670801a, (q31_t)0xccd461a2, (q31_t)0x66667342, (q31_t)0xccccd671,
-    (q31_t)0x665c64ef, (q31_t)0xccc54d3a, (q31_t)0x66525521, (q31_t)0xccbdc5fc,
-    (q31_t)0x664843d9, (q31_t)0xccb640b8, (q31_t)0x663e3117, (q31_t)0xccaebd6e,
-    (q31_t)0x66341cdb, (q31_t)0xcca73c1e, (q31_t)0x662a0727, (q31_t)0xcc9fbcca,
-    (q31_t)0x661feffa, (q31_t)0xcc983f70, (q31_t)0x6615d754, (q31_t)0xcc90c412,
-    (q31_t)0x660bbd37, (q31_t)0xcc894aaf, (q31_t)0x6601a1a2, (q31_t)0xcc81d349,
-    (q31_t)0x65f78497, (q31_t)0xcc7a5dde, (q31_t)0x65ed6614, (q31_t)0xcc72ea70,
-    (q31_t)0x65e3461b, (q31_t)0xcc6b78ff, (q31_t)0x65d924ac, (q31_t)0xcc64098b,
-    (q31_t)0x65cf01c8, (q31_t)0xcc5c9c14, (q31_t)0x65c4dd6e, (q31_t)0xcc55309b,
-    (q31_t)0x65bab7a0, (q31_t)0xcc4dc720, (q31_t)0x65b0905d, (q31_t)0xcc465fa3,
-    (q31_t)0x65a667a7, (q31_t)0xcc3efa25, (q31_t)0x659c3d7c, (q31_t)0xcc3796a5,
-    (q31_t)0x659211df, (q31_t)0xcc303524, (q31_t)0x6587e4cf, (q31_t)0xcc28d5a3,
-    (q31_t)0x657db64c, (q31_t)0xcc217822, (q31_t)0x65738657, (q31_t)0xcc1a1ca0,
-    (q31_t)0x656954f1, (q31_t)0xcc12c31f, (q31_t)0x655f2219, (q31_t)0xcc0b6b9e,
-    (q31_t)0x6554edd1, (q31_t)0xcc04161e, (q31_t)0x654ab818, (q31_t)0xcbfcc29f,
-    (q31_t)0x654080ef, (q31_t)0xcbf57121, (q31_t)0x65364857, (q31_t)0xcbee21a5,
-    (q31_t)0x652c0e4f, (q31_t)0xcbe6d42b, (q31_t)0x6521d2d8, (q31_t)0xcbdf88b3,
-    (q31_t)0x651795f3, (q31_t)0xcbd83f3d, (q31_t)0x650d57a0, (q31_t)0xcbd0f7ca,
-    (q31_t)0x650317df, (q31_t)0xcbc9b25a, (q31_t)0x64f8d6b0, (q31_t)0xcbc26eee,
-    (q31_t)0x64ee9415, (q31_t)0xcbbb2d85, (q31_t)0x64e4500e, (q31_t)0xcbb3ee20,
-    (q31_t)0x64da0a9a, (q31_t)0xcbacb0bf, (q31_t)0x64cfc3ba, (q31_t)0xcba57563,
-    (q31_t)0x64c57b6f, (q31_t)0xcb9e3c0b, (q31_t)0x64bb31ba, (q31_t)0xcb9704b9,
-    (q31_t)0x64b0e699, (q31_t)0xcb8fcf6b, (q31_t)0x64a69a0f, (q31_t)0xcb889c23,
-    (q31_t)0x649c4c1b, (q31_t)0xcb816ae1, (q31_t)0x6491fcbe, (q31_t)0xcb7a3ba5,
-    (q31_t)0x6487abf7, (q31_t)0xcb730e70, (q31_t)0x647d59c8, (q31_t)0xcb6be341,
-    (q31_t)0x64730631, (q31_t)0xcb64ba19, (q31_t)0x6468b132, (q31_t)0xcb5d92f8,
-    (q31_t)0x645e5acc, (q31_t)0xcb566ddf, (q31_t)0x645402ff, (q31_t)0xcb4f4acd,
-    (q31_t)0x6449a9cc, (q31_t)0xcb4829c4, (q31_t)0x643f4f32, (q31_t)0xcb410ac3,
-    (q31_t)0x6434f332, (q31_t)0xcb39edca, (q31_t)0x642a95ce, (q31_t)0xcb32d2da,
-    (q31_t)0x64203704, (q31_t)0xcb2bb9f4, (q31_t)0x6415d6d5, (q31_t)0xcb24a316,
-    (q31_t)0x640b7543, (q31_t)0xcb1d8e43, (q31_t)0x6401124d, (q31_t)0xcb167b79,
-    (q31_t)0x63f6adf3, (q31_t)0xcb0f6aba, (q31_t)0x63ec4837, (q31_t)0xcb085c05,
-    (q31_t)0x63e1e117, (q31_t)0xcb014f5b, (q31_t)0x63d77896, (q31_t)0xcafa44bc,
-    (q31_t)0x63cd0eb3, (q31_t)0xcaf33c28, (q31_t)0x63c2a36f, (q31_t)0xcaec35a0,
-    (q31_t)0x63b836ca, (q31_t)0xcae53123, (q31_t)0x63adc8c4, (q31_t)0xcade2eb3,
-    (q31_t)0x63a3595e, (q31_t)0xcad72e4f, (q31_t)0x6398e898, (q31_t)0xcad02ff8,
-    (q31_t)0x638e7673, (q31_t)0xcac933ae, (q31_t)0x638402ef, (q31_t)0xcac23971,
-    (q31_t)0x63798e0d, (q31_t)0xcabb4141, (q31_t)0x636f17cc, (q31_t)0xcab44b1f,
-    (q31_t)0x6364a02e, (q31_t)0xcaad570c, (q31_t)0x635a2733, (q31_t)0xcaa66506,
-    (q31_t)0x634facda, (q31_t)0xca9f750f, (q31_t)0x63453125, (q31_t)0xca988727,
-    (q31_t)0x633ab414, (q31_t)0xca919b4e, (q31_t)0x633035a7, (q31_t)0xca8ab184,
-    (q31_t)0x6325b5df, (q31_t)0xca83c9ca, (q31_t)0x631b34bc, (q31_t)0xca7ce420,
-    (q31_t)0x6310b23e, (q31_t)0xca760086, (q31_t)0x63062e67, (q31_t)0xca6f1efc,
-    (q31_t)0x62fba936, (q31_t)0xca683f83, (q31_t)0x62f122ab, (q31_t)0xca61621b,
-    (q31_t)0x62e69ac8, (q31_t)0xca5a86c4, (q31_t)0x62dc118c, (q31_t)0xca53ad7e,
-    (q31_t)0x62d186f8, (q31_t)0xca4cd64b, (q31_t)0x62c6fb0c, (q31_t)0xca460129,
-    (q31_t)0x62bc6dca, (q31_t)0xca3f2e19, (q31_t)0x62b1df30, (q31_t)0xca385d1d,
-    (q31_t)0x62a74f40, (q31_t)0xca318e32, (q31_t)0x629cbdfa, (q31_t)0xca2ac15b,
-    (q31_t)0x62922b5e, (q31_t)0xca23f698, (q31_t)0x6287976e, (q31_t)0xca1d2de7,
-    (q31_t)0x627d0228, (q31_t)0xca16674b, (q31_t)0x62726b8e, (q31_t)0xca0fa2c3,
-    (q31_t)0x6267d3a0, (q31_t)0xca08e04f, (q31_t)0x625d3a5e, (q31_t)0xca021fef,
-    (q31_t)0x62529fca, (q31_t)0xc9fb61a5, (q31_t)0x624803e2, (q31_t)0xc9f4a570,
-    (q31_t)0x623d66a8, (q31_t)0xc9edeb50, (q31_t)0x6232c81c, (q31_t)0xc9e73346,
-    (q31_t)0x6228283f, (q31_t)0xc9e07d51, (q31_t)0x621d8711, (q31_t)0xc9d9c973,
-    (q31_t)0x6212e492, (q31_t)0xc9d317ab, (q31_t)0x620840c2, (q31_t)0xc9cc67fa,
-    (q31_t)0x61fd9ba3, (q31_t)0xc9c5ba60, (q31_t)0x61f2f534, (q31_t)0xc9bf0edd,
-    (q31_t)0x61e84d76, (q31_t)0xc9b86572, (q31_t)0x61dda46a, (q31_t)0xc9b1be1e,
-    (q31_t)0x61d2fa0f, (q31_t)0xc9ab18e3, (q31_t)0x61c84e67, (q31_t)0xc9a475bf,
-    (q31_t)0x61bda171, (q31_t)0xc99dd4b4, (q31_t)0x61b2f32e, (q31_t)0xc99735c2,
-    (q31_t)0x61a8439e, (q31_t)0xc99098e9, (q31_t)0x619d92c2, (q31_t)0xc989fe29,
-    (q31_t)0x6192e09b, (q31_t)0xc9836582, (q31_t)0x61882d28, (q31_t)0xc97ccef5,
-    (q31_t)0x617d786a, (q31_t)0xc9763a83, (q31_t)0x6172c262, (q31_t)0xc96fa82a,
-    (q31_t)0x61680b0f, (q31_t)0xc96917ec, (q31_t)0x615d5273, (q31_t)0xc96289c9,
-    (q31_t)0x6152988d, (q31_t)0xc95bfdc1, (q31_t)0x6147dd5f, (q31_t)0xc95573d4,
-    (q31_t)0x613d20e8, (q31_t)0xc94eec03, (q31_t)0x61326329, (q31_t)0xc948664d,
-    (q31_t)0x6127a423, (q31_t)0xc941e2b4, (q31_t)0x611ce3d5, (q31_t)0xc93b6137,
-    (q31_t)0x61122240, (q31_t)0xc934e1d6, (q31_t)0x61075f65, (q31_t)0xc92e6492,
-    (q31_t)0x60fc9b44, (q31_t)0xc927e96b, (q31_t)0x60f1d5de, (q31_t)0xc9217062,
-    (q31_t)0x60e70f32, (q31_t)0xc91af976, (q31_t)0x60dc4742, (q31_t)0xc91484a8,
-    (q31_t)0x60d17e0d, (q31_t)0xc90e11f7, (q31_t)0x60c6b395, (q31_t)0xc907a166,
-    (q31_t)0x60bbe7d8, (q31_t)0xc90132f2, (q31_t)0x60b11ad9, (q31_t)0xc8fac69e,
-    (q31_t)0x60a64c97, (q31_t)0xc8f45c68, (q31_t)0x609b7d13, (q31_t)0xc8edf452,
-    (q31_t)0x6090ac4d, (q31_t)0xc8e78e5b, (q31_t)0x6085da46, (q31_t)0xc8e12a84,
-    (q31_t)0x607b06fe, (q31_t)0xc8dac8cd, (q31_t)0x60703275, (q31_t)0xc8d46936,
-    (q31_t)0x60655cac, (q31_t)0xc8ce0bc0, (q31_t)0x605a85a3, (q31_t)0xc8c7b06b,
-    (q31_t)0x604fad5b, (q31_t)0xc8c15736, (q31_t)0x6044d3d4, (q31_t)0xc8bb0023,
-    (q31_t)0x6039f90f, (q31_t)0xc8b4ab32, (q31_t)0x602f1d0b, (q31_t)0xc8ae5862,
-    (q31_t)0x60243fca, (q31_t)0xc8a807b4, (q31_t)0x6019614c, (q31_t)0xc8a1b928,
-    (q31_t)0x600e8190, (q31_t)0xc89b6cbf, (q31_t)0x6003a099, (q31_t)0xc8952278,
-    (q31_t)0x5ff8be65, (q31_t)0xc88eda54, (q31_t)0x5feddaf6, (q31_t)0xc8889454,
-    (q31_t)0x5fe2f64c, (q31_t)0xc8825077, (q31_t)0x5fd81067, (q31_t)0xc87c0ebd,
-    (q31_t)0x5fcd2948, (q31_t)0xc875cf28, (q31_t)0x5fc240ef, (q31_t)0xc86f91b7,
-    (q31_t)0x5fb7575c, (q31_t)0xc869566a, (q31_t)0x5fac6c91, (q31_t)0xc8631d42,
-    (q31_t)0x5fa1808c, (q31_t)0xc85ce63e, (q31_t)0x5f969350, (q31_t)0xc856b160,
-    (q31_t)0x5f8ba4dc, (q31_t)0xc8507ea7, (q31_t)0x5f80b531, (q31_t)0xc84a4e14,
-    (q31_t)0x5f75c44e, (q31_t)0xc8441fa6, (q31_t)0x5f6ad235, (q31_t)0xc83df35f,
-    (q31_t)0x5f5fdee6, (q31_t)0xc837c93e, (q31_t)0x5f54ea62, (q31_t)0xc831a143,
-    (q31_t)0x5f49f4a8, (q31_t)0xc82b7b70, (q31_t)0x5f3efdb9, (q31_t)0xc82557c3,
-    (q31_t)0x5f340596, (q31_t)0xc81f363d, (q31_t)0x5f290c3f, (q31_t)0xc81916df,
-    (q31_t)0x5f1e11b5, (q31_t)0xc812f9a9, (q31_t)0x5f1315f7, (q31_t)0xc80cde9b,
-    (q31_t)0x5f081907, (q31_t)0xc806c5b5, (q31_t)0x5efd1ae4, (q31_t)0xc800aef7,
-    (q31_t)0x5ef21b90, (q31_t)0xc7fa9a62, (q31_t)0x5ee71b0a, (q31_t)0xc7f487f6,
-    (q31_t)0x5edc1953, (q31_t)0xc7ee77b3, (q31_t)0x5ed1166b, (q31_t)0xc7e8699a,
-    (q31_t)0x5ec61254, (q31_t)0xc7e25daa, (q31_t)0x5ebb0d0d, (q31_t)0xc7dc53e3,
-    (q31_t)0x5eb00696, (q31_t)0xc7d64c47, (q31_t)0x5ea4fef0, (q31_t)0xc7d046d6,
-    (q31_t)0x5e99f61d, (q31_t)0xc7ca438f, (q31_t)0x5e8eec1b, (q31_t)0xc7c44272,
-    (q31_t)0x5e83e0eb, (q31_t)0xc7be4381, (q31_t)0x5e78d48e, (q31_t)0xc7b846ba,
-    (q31_t)0x5e6dc705, (q31_t)0xc7b24c20, (q31_t)0x5e62b84f, (q31_t)0xc7ac53b1,
-    (q31_t)0x5e57a86d, (q31_t)0xc7a65d6e, (q31_t)0x5e4c9760, (q31_t)0xc7a06957,
-    (q31_t)0x5e418528, (q31_t)0xc79a776c, (q31_t)0x5e3671c5, (q31_t)0xc79487ae,
-    (q31_t)0x5e2b5d38, (q31_t)0xc78e9a1d, (q31_t)0x5e204781, (q31_t)0xc788aeb9,
-    (q31_t)0x5e1530a1, (q31_t)0xc782c582, (q31_t)0x5e0a1898, (q31_t)0xc77cde79,
-    (q31_t)0x5dfeff67, (q31_t)0xc776f99d, (q31_t)0x5df3e50d, (q31_t)0xc77116f0,
-    (q31_t)0x5de8c98c, (q31_t)0xc76b3671, (q31_t)0x5dddace4, (q31_t)0xc7655820,
-    (q31_t)0x5dd28f15, (q31_t)0xc75f7bfe, (q31_t)0x5dc7701f, (q31_t)0xc759a20a,
-    (q31_t)0x5dbc5004, (q31_t)0xc753ca46, (q31_t)0x5db12ec3, (q31_t)0xc74df4b1,
-    (q31_t)0x5da60c5d, (q31_t)0xc748214c, (q31_t)0x5d9ae8d2, (q31_t)0xc7425016,
-    (q31_t)0x5d8fc424, (q31_t)0xc73c8111, (q31_t)0x5d849e51, (q31_t)0xc736b43c,
-    (q31_t)0x5d79775c, (q31_t)0xc730e997, (q31_t)0x5d6e4f43, (q31_t)0xc72b2123,
-    (q31_t)0x5d632608, (q31_t)0xc7255ae0, (q31_t)0x5d57fbaa, (q31_t)0xc71f96ce,
-    (q31_t)0x5d4cd02c, (q31_t)0xc719d4ed, (q31_t)0x5d41a38c, (q31_t)0xc714153e,
-    (q31_t)0x5d3675cb, (q31_t)0xc70e57c0, (q31_t)0x5d2b46ea, (q31_t)0xc7089c75,
-    (q31_t)0x5d2016e9, (q31_t)0xc702e35c, (q31_t)0x5d14e5c9, (q31_t)0xc6fd2c75,
-    (q31_t)0x5d09b389, (q31_t)0xc6f777c1, (q31_t)0x5cfe802b, (q31_t)0xc6f1c540,
-    (q31_t)0x5cf34baf, (q31_t)0xc6ec14f2, (q31_t)0x5ce81615, (q31_t)0xc6e666d7,
-    (q31_t)0x5cdcdf5e, (q31_t)0xc6e0baf0, (q31_t)0x5cd1a78a, (q31_t)0xc6db113d,
-    (q31_t)0x5cc66e99, (q31_t)0xc6d569be, (q31_t)0x5cbb348d, (q31_t)0xc6cfc472,
-    (q31_t)0x5caff965, (q31_t)0xc6ca215c, (q31_t)0x5ca4bd21, (q31_t)0xc6c4807a,
-    (q31_t)0x5c997fc4, (q31_t)0xc6bee1cd, (q31_t)0x5c8e414b, (q31_t)0xc6b94554,
-    (q31_t)0x5c8301b9, (q31_t)0xc6b3ab12, (q31_t)0x5c77c10e, (q31_t)0xc6ae1304,
-    (q31_t)0x5c6c7f4a, (q31_t)0xc6a87d2d, (q31_t)0x5c613c6d, (q31_t)0xc6a2e98b,
-    (q31_t)0x5c55f878, (q31_t)0xc69d5820, (q31_t)0x5c4ab36b, (q31_t)0xc697c8eb,
-    (q31_t)0x5c3f6d47, (q31_t)0xc6923bec, (q31_t)0x5c34260c, (q31_t)0xc68cb124,
-    (q31_t)0x5c28ddbb, (q31_t)0xc6872894, (q31_t)0x5c1d9454, (q31_t)0xc681a23a,
-    (q31_t)0x5c1249d8, (q31_t)0xc67c1e18, (q31_t)0x5c06fe46, (q31_t)0xc6769c2e,
-    (q31_t)0x5bfbb1a0, (q31_t)0xc6711c7b, (q31_t)0x5bf063e6, (q31_t)0xc66b9f01,
-    (q31_t)0x5be51518, (q31_t)0xc66623be, (q31_t)0x5bd9c537, (q31_t)0xc660aab5,
-    (q31_t)0x5bce7442, (q31_t)0xc65b33e4, (q31_t)0x5bc3223c, (q31_t)0xc655bf4c,
-    (q31_t)0x5bb7cf23, (q31_t)0xc6504ced, (q31_t)0x5bac7af9, (q31_t)0xc64adcc7,
-    (q31_t)0x5ba125bd, (q31_t)0xc6456edb, (q31_t)0x5b95cf71, (q31_t)0xc6400329,
-    (q31_t)0x5b8a7815, (q31_t)0xc63a99b1, (q31_t)0x5b7f1fa9, (q31_t)0xc6353273,
-    (q31_t)0x5b73c62d, (q31_t)0xc62fcd6f, (q31_t)0x5b686ba3, (q31_t)0xc62a6aa6,
-    (q31_t)0x5b5d100a, (q31_t)0xc6250a18, (q31_t)0x5b51b363, (q31_t)0xc61fabc4,
-    (q31_t)0x5b4655ae, (q31_t)0xc61a4fac, (q31_t)0x5b3af6ec, (q31_t)0xc614f5cf,
-    (q31_t)0x5b2f971e, (q31_t)0xc60f9e2e, (q31_t)0x5b243643, (q31_t)0xc60a48c9,
-    (q31_t)0x5b18d45c, (q31_t)0xc604f5a0, (q31_t)0x5b0d716a, (q31_t)0xc5ffa4b3,
-    (q31_t)0x5b020d6c, (q31_t)0xc5fa5603, (q31_t)0x5af6a865, (q31_t)0xc5f5098f,
-    (q31_t)0x5aeb4253, (q31_t)0xc5efbf58, (q31_t)0x5adfdb37, (q31_t)0xc5ea775e,
-    (q31_t)0x5ad47312, (q31_t)0xc5e531a1, (q31_t)0x5ac909e5, (q31_t)0xc5dfee22,
-    (q31_t)0x5abd9faf, (q31_t)0xc5daace1, (q31_t)0x5ab23471, (q31_t)0xc5d56ddd,
-    (q31_t)0x5aa6c82b, (q31_t)0xc5d03118, (q31_t)0x5a9b5adf, (q31_t)0xc5caf690,
-    (q31_t)0x5a8fec8c, (q31_t)0xc5c5be47, (q31_t)0x5a847d33, (q31_t)0xc5c0883d,
-    (q31_t)0x5a790cd4, (q31_t)0xc5bb5472, (q31_t)0x5a6d9b70, (q31_t)0xc5b622e6,
-    (q31_t)0x5a622907, (q31_t)0xc5b0f399, (q31_t)0x5a56b599, (q31_t)0xc5abc68c,
-    (q31_t)0x5a4b4128, (q31_t)0xc5a69bbe, (q31_t)0x5a3fcbb3, (q31_t)0xc5a17330,
-    (q31_t)0x5a34553b, (q31_t)0xc59c4ce3, (q31_t)0x5a28ddc0, (q31_t)0xc59728d5,
-    (q31_t)0x5a1d6544, (q31_t)0xc5920708, (q31_t)0x5a11ebc5, (q31_t)0xc58ce77c,
-    (q31_t)0x5a067145, (q31_t)0xc587ca31, (q31_t)0x59faf5c5, (q31_t)0xc582af26,
-    (q31_t)0x59ef7944, (q31_t)0xc57d965d, (q31_t)0x59e3fbc3, (q31_t)0xc5787fd6,
-    (q31_t)0x59d87d42, (q31_t)0xc5736b90, (q31_t)0x59ccfdc2, (q31_t)0xc56e598c,
-    (q31_t)0x59c17d44, (q31_t)0xc56949ca, (q31_t)0x59b5fbc8, (q31_t)0xc5643c4a,
-    (q31_t)0x59aa794d, (q31_t)0xc55f310d, (q31_t)0x599ef5d6, (q31_t)0xc55a2812,
-    (q31_t)0x59937161, (q31_t)0xc555215a, (q31_t)0x5987ebf0, (q31_t)0xc5501ce5,
-    (q31_t)0x597c6584, (q31_t)0xc54b1ab4, (q31_t)0x5970de1b, (q31_t)0xc5461ac6,
-    (q31_t)0x596555b8, (q31_t)0xc5411d1b, (q31_t)0x5959cc5a, (q31_t)0xc53c21b4,
-    (q31_t)0x594e4201, (q31_t)0xc5372891, (q31_t)0x5942b6af, (q31_t)0xc53231b3,
-    (q31_t)0x59372a64, (q31_t)0xc52d3d18, (q31_t)0x592b9d1f, (q31_t)0xc5284ac3,
-    (q31_t)0x59200ee3, (q31_t)0xc5235ab2, (q31_t)0x59147fae, (q31_t)0xc51e6ce6,
-    (q31_t)0x5908ef82, (q31_t)0xc519815f, (q31_t)0x58fd5e5f, (q31_t)0xc514981d,
-    (q31_t)0x58f1cc45, (q31_t)0xc50fb121, (q31_t)0x58e63935, (q31_t)0xc50acc6b,
-    (q31_t)0x58daa52f, (q31_t)0xc505e9fb, (q31_t)0x58cf1034, (q31_t)0xc50109d0,
-    (q31_t)0x58c37a44, (q31_t)0xc4fc2bec, (q31_t)0x58b7e35f, (q31_t)0xc4f7504e,
-    (q31_t)0x58ac4b87, (q31_t)0xc4f276f7, (q31_t)0x58a0b2bb, (q31_t)0xc4ed9fe7,
-    (q31_t)0x589518fc, (q31_t)0xc4e8cb1e, (q31_t)0x58897e4a, (q31_t)0xc4e3f89c,
-    (q31_t)0x587de2a7, (q31_t)0xc4df2862, (q31_t)0x58724611, (q31_t)0xc4da5a6f,
-    (q31_t)0x5866a88a, (q31_t)0xc4d58ec3, (q31_t)0x585b0a13, (q31_t)0xc4d0c560,
-    (q31_t)0x584f6aab, (q31_t)0xc4cbfe45, (q31_t)0x5843ca53, (q31_t)0xc4c73972,
-    (q31_t)0x5838290c, (q31_t)0xc4c276e8, (q31_t)0x582c86d5, (q31_t)0xc4bdb6a6,
-    (q31_t)0x5820e3b0, (q31_t)0xc4b8f8ad, (q31_t)0x58153f9d, (q31_t)0xc4b43cfd,
-    (q31_t)0x58099a9c, (q31_t)0xc4af8397, (q31_t)0x57fdf4ae, (q31_t)0xc4aacc7a,
-    (q31_t)0x57f24dd3, (q31_t)0xc4a617a6, (q31_t)0x57e6a60c, (q31_t)0xc4a1651c,
-    (q31_t)0x57dafd59, (q31_t)0xc49cb4dd, (q31_t)0x57cf53bb, (q31_t)0xc49806e7,
-    (q31_t)0x57c3a931, (q31_t)0xc4935b3c, (q31_t)0x57b7fdbd, (q31_t)0xc48eb1db,
-    (q31_t)0x57ac515f, (q31_t)0xc48a0ac4, (q31_t)0x57a0a417, (q31_t)0xc48565f9,
-    (q31_t)0x5794f5e6, (q31_t)0xc480c379, (q31_t)0x578946cc, (q31_t)0xc47c2344,
-    (q31_t)0x577d96ca, (q31_t)0xc477855a, (q31_t)0x5771e5e0, (q31_t)0xc472e9bc,
-    (q31_t)0x5766340f, (q31_t)0xc46e5069, (q31_t)0x575a8157, (q31_t)0xc469b963,
-    (q31_t)0x574ecdb8, (q31_t)0xc46524a9, (q31_t)0x57431933, (q31_t)0xc460923b,
-    (q31_t)0x573763c9, (q31_t)0xc45c0219, (q31_t)0x572bad7a, (q31_t)0xc4577444,
-    (q31_t)0x571ff646, (q31_t)0xc452e8bc, (q31_t)0x57143e2d, (q31_t)0xc44e5f80,
-    (q31_t)0x57088531, (q31_t)0xc449d892, (q31_t)0x56fccb51, (q31_t)0xc44553f2,
-    (q31_t)0x56f1108f, (q31_t)0xc440d19e, (q31_t)0x56e554ea, (q31_t)0xc43c5199,
-    (q31_t)0x56d99864, (q31_t)0xc437d3e1, (q31_t)0x56cddafb, (q31_t)0xc4335877,
-    (q31_t)0x56c21cb2, (q31_t)0xc42edf5c, (q31_t)0x56b65d88, (q31_t)0xc42a688f,
-    (q31_t)0x56aa9d7e, (q31_t)0xc425f410, (q31_t)0x569edc94, (q31_t)0xc42181e0,
-    (q31_t)0x56931acb, (q31_t)0xc41d11ff, (q31_t)0x56875823, (q31_t)0xc418a46d,
-    (q31_t)0x567b949d, (q31_t)0xc414392b, (q31_t)0x566fd039, (q31_t)0xc40fd037,
-    (q31_t)0x56640af7, (q31_t)0xc40b6994, (q31_t)0x565844d8, (q31_t)0xc4070540,
-    (q31_t)0x564c7ddd, (q31_t)0xc402a33c, (q31_t)0x5640b606, (q31_t)0xc3fe4388,
-    (q31_t)0x5634ed53, (q31_t)0xc3f9e624, (q31_t)0x562923c5, (q31_t)0xc3f58b10,
-    (q31_t)0x561d595d, (q31_t)0xc3f1324e, (q31_t)0x56118e1a, (q31_t)0xc3ecdbdc,
-    (q31_t)0x5605c1fd, (q31_t)0xc3e887bb, (q31_t)0x55f9f507, (q31_t)0xc3e435ea,
-    (q31_t)0x55ee2738, (q31_t)0xc3dfe66c, (q31_t)0x55e25890, (q31_t)0xc3db993e,
-    (q31_t)0x55d68911, (q31_t)0xc3d74e62, (q31_t)0x55cab8ba, (q31_t)0xc3d305d8,
-    (q31_t)0x55bee78c, (q31_t)0xc3cebfa0, (q31_t)0x55b31587, (q31_t)0xc3ca7bba,
-    (q31_t)0x55a742ac, (q31_t)0xc3c63a26, (q31_t)0x559b6efb, (q31_t)0xc3c1fae5,
-    (q31_t)0x558f9a76, (q31_t)0xc3bdbdf6, (q31_t)0x5583c51b, (q31_t)0xc3b9835a,
-    (q31_t)0x5577eeec, (q31_t)0xc3b54b11, (q31_t)0x556c17e9, (q31_t)0xc3b1151b,
-    (q31_t)0x55604013, (q31_t)0xc3ace178, (q31_t)0x5554676a, (q31_t)0xc3a8b028,
-    (q31_t)0x55488dee, (q31_t)0xc3a4812c, (q31_t)0x553cb3a0, (q31_t)0xc3a05484,
-    (q31_t)0x5530d881, (q31_t)0xc39c2a2f, (q31_t)0x5524fc90, (q31_t)0xc398022f,
-    (q31_t)0x55191fcf, (q31_t)0xc393dc82, (q31_t)0x550d423d, (q31_t)0xc38fb92a,
-    (q31_t)0x550163dc, (q31_t)0xc38b9827, (q31_t)0x54f584ac, (q31_t)0xc3877978,
-    (q31_t)0x54e9a4ac, (q31_t)0xc3835d1e, (q31_t)0x54ddc3de, (q31_t)0xc37f4319,
-    (q31_t)0x54d1e242, (q31_t)0xc37b2b6a, (q31_t)0x54c5ffd9, (q31_t)0xc377160f,
-    (q31_t)0x54ba1ca3, (q31_t)0xc373030a, (q31_t)0x54ae38a0, (q31_t)0xc36ef25b,
-    (q31_t)0x54a253d1, (q31_t)0xc36ae401, (q31_t)0x54966e36, (q31_t)0xc366d7fd,
-    (q31_t)0x548a87d1, (q31_t)0xc362ce50, (q31_t)0x547ea0a0, (q31_t)0xc35ec6f8,
-    (q31_t)0x5472b8a5, (q31_t)0xc35ac1f7, (q31_t)0x5466cfe1, (q31_t)0xc356bf4d,
-    (q31_t)0x545ae653, (q31_t)0xc352bef9, (q31_t)0x544efbfc, (q31_t)0xc34ec0fc,
-    (q31_t)0x544310dd, (q31_t)0xc34ac556, (q31_t)0x543724f5, (q31_t)0xc346cc07,
-    (q31_t)0x542b3846, (q31_t)0xc342d510, (q31_t)0x541f4ad1, (q31_t)0xc33ee070,
-    (q31_t)0x54135c94, (q31_t)0xc33aee27, (q31_t)0x54076d91, (q31_t)0xc336fe37,
-    (q31_t)0x53fb7dc9, (q31_t)0xc333109e, (q31_t)0x53ef8d3c, (q31_t)0xc32f255e,
-    (q31_t)0x53e39be9, (q31_t)0xc32b3c75, (q31_t)0x53d7a9d3, (q31_t)0xc32755e5,
-    (q31_t)0x53cbb6f8, (q31_t)0xc32371ae, (q31_t)0x53bfc35b, (q31_t)0xc31f8fcf,
-    (q31_t)0x53b3cefa, (q31_t)0xc31bb049, (q31_t)0x53a7d9d7, (q31_t)0xc317d31c,
-    (q31_t)0x539be3f2, (q31_t)0xc313f848, (q31_t)0x538fed4b, (q31_t)0xc3101fce,
-    (q31_t)0x5383f5e3, (q31_t)0xc30c49ad, (q31_t)0x5377fdbb, (q31_t)0xc30875e5,
-    (q31_t)0x536c04d2, (q31_t)0xc304a477, (q31_t)0x53600b2a, (q31_t)0xc300d563,
-    (q31_t)0x535410c3, (q31_t)0xc2fd08a9, (q31_t)0x5348159d, (q31_t)0xc2f93e4a,
-    (q31_t)0x533c19b8, (q31_t)0xc2f57644, (q31_t)0x53301d16, (q31_t)0xc2f1b099,
-    (q31_t)0x53241fb6, (q31_t)0xc2eded49, (q31_t)0x5318219a, (q31_t)0xc2ea2c53,
-    (q31_t)0x530c22c1, (q31_t)0xc2e66db8, (q31_t)0x5300232c, (q31_t)0xc2e2b178,
-    (q31_t)0x52f422db, (q31_t)0xc2def794, (q31_t)0x52e821cf, (q31_t)0xc2db400a,
-    (q31_t)0x52dc2009, (q31_t)0xc2d78add, (q31_t)0x52d01d89, (q31_t)0xc2d3d80a,
-    (q31_t)0x52c41a4f, (q31_t)0xc2d02794, (q31_t)0x52b8165b, (q31_t)0xc2cc7979,
-    (q31_t)0x52ac11af, (q31_t)0xc2c8cdbb, (q31_t)0x52a00c4b, (q31_t)0xc2c52459,
-    (q31_t)0x5294062f, (q31_t)0xc2c17d52, (q31_t)0x5287ff5b, (q31_t)0xc2bdd8a9,
-    (q31_t)0x527bf7d1, (q31_t)0xc2ba365c, (q31_t)0x526fef90, (q31_t)0xc2b6966c,
-    (q31_t)0x5263e699, (q31_t)0xc2b2f8d8, (q31_t)0x5257dced, (q31_t)0xc2af5da2,
-    (q31_t)0x524bd28c, (q31_t)0xc2abc4c9, (q31_t)0x523fc776, (q31_t)0xc2a82e4d,
-    (q31_t)0x5233bbac, (q31_t)0xc2a49a2e, (q31_t)0x5227af2e, (q31_t)0xc2a1086d,
-    (q31_t)0x521ba1fd, (q31_t)0xc29d790a, (q31_t)0x520f941a, (q31_t)0xc299ec05,
-    (q31_t)0x52038584, (q31_t)0xc296615d, (q31_t)0x51f7763c, (q31_t)0xc292d914,
-    (q31_t)0x51eb6643, (q31_t)0xc28f5329, (q31_t)0x51df5599, (q31_t)0xc28bcf9c,
-    (q31_t)0x51d3443f, (q31_t)0xc2884e6e, (q31_t)0x51c73235, (q31_t)0xc284cf9f,
-    (q31_t)0x51bb1f7c, (q31_t)0xc281532e, (q31_t)0x51af0c13, (q31_t)0xc27dd91c,
-    (q31_t)0x51a2f7fc, (q31_t)0xc27a616a, (q31_t)0x5196e337, (q31_t)0xc276ec16,
-    (q31_t)0x518acdc4, (q31_t)0xc2737922, (q31_t)0x517eb7a4, (q31_t)0xc270088e,
-    (q31_t)0x5172a0d7, (q31_t)0xc26c9a58, (q31_t)0x5166895f, (q31_t)0xc2692e83,
-    (q31_t)0x515a713a, (q31_t)0xc265c50e, (q31_t)0x514e586a, (q31_t)0xc2625df8,
-    (q31_t)0x51423ef0, (q31_t)0xc25ef943, (q31_t)0x513624cb, (q31_t)0xc25b96ee,
-    (q31_t)0x512a09fc, (q31_t)0xc25836f9, (q31_t)0x511dee84, (q31_t)0xc254d965,
-    (q31_t)0x5111d263, (q31_t)0xc2517e31, (q31_t)0x5105b599, (q31_t)0xc24e255e,
-    (q31_t)0x50f99827, (q31_t)0xc24aceed, (q31_t)0x50ed7a0e, (q31_t)0xc2477adc,
-    (q31_t)0x50e15b4e, (q31_t)0xc244292c, (q31_t)0x50d53be7, (q31_t)0xc240d9de,
-    (q31_t)0x50c91bda, (q31_t)0xc23d8cf1, (q31_t)0x50bcfb28, (q31_t)0xc23a4265,
-    (q31_t)0x50b0d9d0, (q31_t)0xc236fa3b, (q31_t)0x50a4b7d3, (q31_t)0xc233b473,
-    (q31_t)0x50989532, (q31_t)0xc230710d, (q31_t)0x508c71ee, (q31_t)0xc22d3009,
-    (q31_t)0x50804e06, (q31_t)0xc229f167, (q31_t)0x5074297b, (q31_t)0xc226b528,
-    (q31_t)0x5068044e, (q31_t)0xc2237b4b, (q31_t)0x505bde7f, (q31_t)0xc22043d0,
-    (q31_t)0x504fb80e, (q31_t)0xc21d0eb8, (q31_t)0x504390fd, (q31_t)0xc219dc03,
-    (q31_t)0x5037694b, (q31_t)0xc216abb1, (q31_t)0x502b40f8, (q31_t)0xc2137dc2,
-    (q31_t)0x501f1807, (q31_t)0xc2105236, (q31_t)0x5012ee76, (q31_t)0xc20d290d,
-    (q31_t)0x5006c446, (q31_t)0xc20a0248, (q31_t)0x4ffa9979, (q31_t)0xc206dde6,
-    (q31_t)0x4fee6e0d, (q31_t)0xc203bbe8, (q31_t)0x4fe24205, (q31_t)0xc2009c4e,
-    (q31_t)0x4fd6155f, (q31_t)0xc1fd7f17, (q31_t)0x4fc9e81e, (q31_t)0xc1fa6445,
-    (q31_t)0x4fbdba40, (q31_t)0xc1f74bd6, (q31_t)0x4fb18bc8, (q31_t)0xc1f435cc,
-    (q31_t)0x4fa55cb4, (q31_t)0xc1f12227, (q31_t)0x4f992d06, (q31_t)0xc1ee10e5,
-    (q31_t)0x4f8cfcbe, (q31_t)0xc1eb0209, (q31_t)0x4f80cbdc, (q31_t)0xc1e7f591,
-    (q31_t)0x4f749a61, (q31_t)0xc1e4eb7e, (q31_t)0x4f68684e, (q31_t)0xc1e1e3d0,
-    (q31_t)0x4f5c35a3, (q31_t)0xc1dede87, (q31_t)0x4f500260, (q31_t)0xc1dbdba3,
-    (q31_t)0x4f43ce86, (q31_t)0xc1d8db25, (q31_t)0x4f379a16, (q31_t)0xc1d5dd0c,
-    (q31_t)0x4f2b650f, (q31_t)0xc1d2e158, (q31_t)0x4f1f2f73, (q31_t)0xc1cfe80a,
-    (q31_t)0x4f12f941, (q31_t)0xc1ccf122, (q31_t)0x4f06c27a, (q31_t)0xc1c9fca0,
-    (q31_t)0x4efa8b20, (q31_t)0xc1c70a84, (q31_t)0x4eee5331, (q31_t)0xc1c41ace,
-    (q31_t)0x4ee21aaf, (q31_t)0xc1c12d7e, (q31_t)0x4ed5e19a, (q31_t)0xc1be4294,
-    (q31_t)0x4ec9a7f3, (q31_t)0xc1bb5a11, (q31_t)0x4ebd6db9, (q31_t)0xc1b873f5,
-    (q31_t)0x4eb132ef, (q31_t)0xc1b5903f, (q31_t)0x4ea4f793, (q31_t)0xc1b2aef0,
-    (q31_t)0x4e98bba7, (q31_t)0xc1afd007, (q31_t)0x4e8c7f2a, (q31_t)0xc1acf386,
-    (q31_t)0x4e80421e, (q31_t)0xc1aa196c, (q31_t)0x4e740483, (q31_t)0xc1a741b9,
-    (q31_t)0x4e67c65a, (q31_t)0xc1a46c6e, (q31_t)0x4e5b87a2, (q31_t)0xc1a1998a,
-    (q31_t)0x4e4f485c, (q31_t)0xc19ec90d, (q31_t)0x4e430889, (q31_t)0xc19bfaf9,
-    (q31_t)0x4e36c82a, (q31_t)0xc1992f4c, (q31_t)0x4e2a873e, (q31_t)0xc1966606,
-    (q31_t)0x4e1e45c6, (q31_t)0xc1939f29, (q31_t)0x4e1203c3, (q31_t)0xc190dab4,
-    (q31_t)0x4e05c135, (q31_t)0xc18e18a7, (q31_t)0x4df97e1d, (q31_t)0xc18b5903,
-    (q31_t)0x4ded3a7b, (q31_t)0xc1889bc6, (q31_t)0x4de0f64f, (q31_t)0xc185e0f3,
-    (q31_t)0x4dd4b19a, (q31_t)0xc1832888, (q31_t)0x4dc86c5d, (q31_t)0xc1807285,
-    (q31_t)0x4dbc2698, (q31_t)0xc17dbeec, (q31_t)0x4dafe04b, (q31_t)0xc17b0dbb,
-    (q31_t)0x4da39978, (q31_t)0xc1785ef4, (q31_t)0x4d97521d, (q31_t)0xc175b296,
-    (q31_t)0x4d8b0a3d, (q31_t)0xc17308a1, (q31_t)0x4d7ec1d6, (q31_t)0xc1706115,
-    (q31_t)0x4d7278eb, (q31_t)0xc16dbbf3, (q31_t)0x4d662f7b, (q31_t)0xc16b193a,
-    (q31_t)0x4d59e586, (q31_t)0xc16878eb, (q31_t)0x4d4d9b0e, (q31_t)0xc165db05,
-    (q31_t)0x4d415013, (q31_t)0xc1633f8a, (q31_t)0x4d350495, (q31_t)0xc160a678,
-    (q31_t)0x4d28b894, (q31_t)0xc15e0fd1, (q31_t)0x4d1c6c11, (q31_t)0xc15b7b94,
-    (q31_t)0x4d101f0e, (q31_t)0xc158e9c1, (q31_t)0x4d03d189, (q31_t)0xc1565a58,
-    (q31_t)0x4cf78383, (q31_t)0xc153cd5a, (q31_t)0x4ceb34fe, (q31_t)0xc15142c6,
-    (q31_t)0x4cdee5f9, (q31_t)0xc14eba9d, (q31_t)0x4cd29676, (q31_t)0xc14c34df,
-    (q31_t)0x4cc64673, (q31_t)0xc149b18b, (q31_t)0x4cb9f5f3, (q31_t)0xc14730a3,
-    (q31_t)0x4cada4f5, (q31_t)0xc144b225, (q31_t)0x4ca1537a, (q31_t)0xc1423613,
-    (q31_t)0x4c950182, (q31_t)0xc13fbc6c, (q31_t)0x4c88af0e, (q31_t)0xc13d4530,
-    (q31_t)0x4c7c5c1e, (q31_t)0xc13ad060, (q31_t)0x4c7008b3, (q31_t)0xc1385dfb,
-    (q31_t)0x4c63b4ce, (q31_t)0xc135ee02, (q31_t)0x4c57606e, (q31_t)0xc1338075,
-    (q31_t)0x4c4b0b94, (q31_t)0xc1311553, (q31_t)0x4c3eb641, (q31_t)0xc12eac9d,
-    (q31_t)0x4c326075, (q31_t)0xc12c4653, (q31_t)0x4c260a31, (q31_t)0xc129e276,
-    (q31_t)0x4c19b374, (q31_t)0xc1278104, (q31_t)0x4c0d5c41, (q31_t)0xc12521ff,
-    (q31_t)0x4c010496, (q31_t)0xc122c566, (q31_t)0x4bf4ac75, (q31_t)0xc1206b39,
-    (q31_t)0x4be853de, (q31_t)0xc11e1379, (q31_t)0x4bdbfad1, (q31_t)0xc11bbe26,
-    (q31_t)0x4bcfa150, (q31_t)0xc1196b3f, (q31_t)0x4bc34759, (q31_t)0xc1171ac6,
-    (q31_t)0x4bb6ecef, (q31_t)0xc114ccb9, (q31_t)0x4baa9211, (q31_t)0xc1128119,
-    (q31_t)0x4b9e36c0, (q31_t)0xc11037e6, (q31_t)0x4b91dafc, (q31_t)0xc10df120,
-    (q31_t)0x4b857ec7, (q31_t)0xc10bacc8, (q31_t)0x4b79221f, (q31_t)0xc1096add,
-    (q31_t)0x4b6cc506, (q31_t)0xc1072b5f, (q31_t)0x4b60677c, (q31_t)0xc104ee4f,
-    (q31_t)0x4b540982, (q31_t)0xc102b3ac, (q31_t)0x4b47ab19, (q31_t)0xc1007b77,
-    (q31_t)0x4b3b4c40, (q31_t)0xc0fe45b0, (q31_t)0x4b2eecf8, (q31_t)0xc0fc1257,
-    (q31_t)0x4b228d42, (q31_t)0xc0f9e16b, (q31_t)0x4b162d1d, (q31_t)0xc0f7b2ee,
-    (q31_t)0x4b09cc8c, (q31_t)0xc0f586df, (q31_t)0x4afd6b8d, (q31_t)0xc0f35d3e,
-    (q31_t)0x4af10a22, (q31_t)0xc0f1360b, (q31_t)0x4ae4a84b, (q31_t)0xc0ef1147,
-    (q31_t)0x4ad84609, (q31_t)0xc0eceef1, (q31_t)0x4acbe35b, (q31_t)0xc0eacf09,
-    (q31_t)0x4abf8043, (q31_t)0xc0e8b190, (q31_t)0x4ab31cc1, (q31_t)0xc0e69686,
-    (q31_t)0x4aa6b8d5, (q31_t)0xc0e47deb, (q31_t)0x4a9a5480, (q31_t)0xc0e267be,
-    (q31_t)0x4a8defc3, (q31_t)0xc0e05401, (q31_t)0x4a818a9d, (q31_t)0xc0de42b2,
-    (q31_t)0x4a752510, (q31_t)0xc0dc33d2, (q31_t)0x4a68bf1b, (q31_t)0xc0da2762,
-    (q31_t)0x4a5c58c0, (q31_t)0xc0d81d61, (q31_t)0x4a4ff1fe, (q31_t)0xc0d615cf,
-    (q31_t)0x4a438ad7, (q31_t)0xc0d410ad, (q31_t)0x4a37234a, (q31_t)0xc0d20dfa,
-    (q31_t)0x4a2abb59, (q31_t)0xc0d00db6, (q31_t)0x4a1e5303, (q31_t)0xc0ce0fe3,
-    (q31_t)0x4a11ea49, (q31_t)0xc0cc147f, (q31_t)0x4a05812c, (q31_t)0xc0ca1b8a,
-    (q31_t)0x49f917ac, (q31_t)0xc0c82506, (q31_t)0x49ecadc9, (q31_t)0xc0c630f2,
-    (q31_t)0x49e04385, (q31_t)0xc0c43f4d, (q31_t)0x49d3d8df, (q31_t)0xc0c25019,
-    (q31_t)0x49c76dd8, (q31_t)0xc0c06355, (q31_t)0x49bb0271, (q31_t)0xc0be7901,
-    (q31_t)0x49ae96aa, (q31_t)0xc0bc911d, (q31_t)0x49a22a83, (q31_t)0xc0baabaa,
-    (q31_t)0x4995bdfd, (q31_t)0xc0b8c8a7, (q31_t)0x49895118, (q31_t)0xc0b6e815,
-    (q31_t)0x497ce3d5, (q31_t)0xc0b509f3, (q31_t)0x49707635, (q31_t)0xc0b32e42,
-    (q31_t)0x49640837, (q31_t)0xc0b15502, (q31_t)0x495799dd, (q31_t)0xc0af7e33,
-    (q31_t)0x494b2b27, (q31_t)0xc0ada9d4, (q31_t)0x493ebc14, (q31_t)0xc0abd7e6,
-    (q31_t)0x49324ca7, (q31_t)0xc0aa086a, (q31_t)0x4925dcdf, (q31_t)0xc0a83b5e,
-    (q31_t)0x49196cbc, (q31_t)0xc0a670c4, (q31_t)0x490cfc40, (q31_t)0xc0a4a89b,
-    (q31_t)0x49008b6a, (q31_t)0xc0a2e2e3, (q31_t)0x48f41a3c, (q31_t)0xc0a11f9d,
-    (q31_t)0x48e7a8b5, (q31_t)0xc09f5ec8, (q31_t)0x48db36d6, (q31_t)0xc09da065,
-    (q31_t)0x48cec4a0, (q31_t)0xc09be473, (q31_t)0x48c25213, (q31_t)0xc09a2af3,
-    (q31_t)0x48b5df30, (q31_t)0xc09873e4, (q31_t)0x48a96bf6, (q31_t)0xc096bf48,
-    (q31_t)0x489cf867, (q31_t)0xc0950d1d, (q31_t)0x48908483, (q31_t)0xc0935d64,
-    (q31_t)0x4884104b, (q31_t)0xc091b01d, (q31_t)0x48779bbe, (q31_t)0xc0900548,
-    (q31_t)0x486b26de, (q31_t)0xc08e5ce5, (q31_t)0x485eb1ab, (q31_t)0xc08cb6f5,
-    (q31_t)0x48523c25, (q31_t)0xc08b1376, (q31_t)0x4845c64d, (q31_t)0xc089726a,
-    (q31_t)0x48395024, (q31_t)0xc087d3d0, (q31_t)0x482cd9a9, (q31_t)0xc08637a9,
-    (q31_t)0x482062de, (q31_t)0xc0849df4, (q31_t)0x4813ebc2, (q31_t)0xc08306b2,
-    (q31_t)0x48077457, (q31_t)0xc08171e2, (q31_t)0x47fafc9c, (q31_t)0xc07fdf85,
-    (q31_t)0x47ee8493, (q31_t)0xc07e4f9b, (q31_t)0x47e20c3b, (q31_t)0xc07cc223,
-    (q31_t)0x47d59396, (q31_t)0xc07b371e, (q31_t)0x47c91aa3, (q31_t)0xc079ae8c,
-    (q31_t)0x47bca163, (q31_t)0xc078286e, (q31_t)0x47b027d7, (q31_t)0xc076a4c2,
-    (q31_t)0x47a3adff, (q31_t)0xc0752389, (q31_t)0x479733dc, (q31_t)0xc073a4c3,
-    (q31_t)0x478ab96e, (q31_t)0xc0722871, (q31_t)0x477e3eb5, (q31_t)0xc070ae92,
-    (q31_t)0x4771c3b3, (q31_t)0xc06f3726, (q31_t)0x47654867, (q31_t)0xc06dc22e,
-    (q31_t)0x4758ccd2, (q31_t)0xc06c4fa8, (q31_t)0x474c50f4, (q31_t)0xc06adf97,
-    (q31_t)0x473fd4cf, (q31_t)0xc06971f9, (q31_t)0x47335862, (q31_t)0xc06806ce,
-    (q31_t)0x4726dbae, (q31_t)0xc0669e18, (q31_t)0x471a5eb3, (q31_t)0xc06537d4,
-    (q31_t)0x470de172, (q31_t)0xc063d405, (q31_t)0x470163eb, (q31_t)0xc06272aa,
-    (q31_t)0x46f4e620, (q31_t)0xc06113c2, (q31_t)0x46e86810, (q31_t)0xc05fb74e,
-    (q31_t)0x46dbe9bb, (q31_t)0xc05e5d4e, (q31_t)0x46cf6b23, (q31_t)0xc05d05c3,
-    (q31_t)0x46c2ec48, (q31_t)0xc05bb0ab, (q31_t)0x46b66d29, (q31_t)0xc05a5e07,
-    (q31_t)0x46a9edc9, (q31_t)0xc0590dd8, (q31_t)0x469d6e27, (q31_t)0xc057c01d,
-    (q31_t)0x4690ee44, (q31_t)0xc05674d6, (q31_t)0x46846e1f, (q31_t)0xc0552c03,
-    (q31_t)0x4677edbb, (q31_t)0xc053e5a5, (q31_t)0x466b6d16, (q31_t)0xc052a1bb,
-    (q31_t)0x465eec33, (q31_t)0xc0516045, (q31_t)0x46526b10, (q31_t)0xc0502145,
-    (q31_t)0x4645e9af, (q31_t)0xc04ee4b8, (q31_t)0x46396810, (q31_t)0xc04daaa1,
-    (q31_t)0x462ce634, (q31_t)0xc04c72fe, (q31_t)0x4620641a, (q31_t)0xc04b3dcf,
-    (q31_t)0x4613e1c5, (q31_t)0xc04a0b16, (q31_t)0x46075f33, (q31_t)0xc048dad1,
-    (q31_t)0x45fadc66, (q31_t)0xc047ad01, (q31_t)0x45ee595d, (q31_t)0xc04681a6,
-    (q31_t)0x45e1d61b, (q31_t)0xc04558c0, (q31_t)0x45d5529e, (q31_t)0xc044324f,
-    (q31_t)0x45c8cee7, (q31_t)0xc0430e53, (q31_t)0x45bc4af8, (q31_t)0xc041eccc,
-    (q31_t)0x45afc6d0, (q31_t)0xc040cdba, (q31_t)0x45a3426f, (q31_t)0xc03fb11d,
-    (q31_t)0x4596bdd7, (q31_t)0xc03e96f6, (q31_t)0x458a3908, (q31_t)0xc03d7f44,
-    (q31_t)0x457db403, (q31_t)0xc03c6a07, (q31_t)0x45712ec7, (q31_t)0xc03b573f,
-    (q31_t)0x4564a955, (q31_t)0xc03a46ed, (q31_t)0x455823ae, (q31_t)0xc0393910,
-    (q31_t)0x454b9dd3, (q31_t)0xc0382da8, (q31_t)0x453f17c3, (q31_t)0xc03724b6,
-    (q31_t)0x4532917f, (q31_t)0xc0361e3a, (q31_t)0x45260b08, (q31_t)0xc0351a33,
-    (q31_t)0x4519845e, (q31_t)0xc03418a2, (q31_t)0x450cfd82, (q31_t)0xc0331986,
-    (q31_t)0x45007674, (q31_t)0xc0321ce0, (q31_t)0x44f3ef35, (q31_t)0xc03122b0,
-    (q31_t)0x44e767c5, (q31_t)0xc0302af5, (q31_t)0x44dae024, (q31_t)0xc02f35b1,
-    (q31_t)0x44ce5854, (q31_t)0xc02e42e2, (q31_t)0x44c1d054, (q31_t)0xc02d5289,
-    (q31_t)0x44b54825, (q31_t)0xc02c64a6, (q31_t)0x44a8bfc7, (q31_t)0xc02b7939,
-    (q31_t)0x449c373c, (q31_t)0xc02a9042, (q31_t)0x448fae83, (q31_t)0xc029a9c1,
-    (q31_t)0x4483259d, (q31_t)0xc028c5b6, (q31_t)0x44769c8b, (q31_t)0xc027e421,
-    (q31_t)0x446a134c, (q31_t)0xc0270502, (q31_t)0x445d89e2, (q31_t)0xc0262859,
-    (q31_t)0x4451004d, (q31_t)0xc0254e27, (q31_t)0x4444768d, (q31_t)0xc024766a,
-    (q31_t)0x4437eca4, (q31_t)0xc023a124, (q31_t)0x442b6290, (q31_t)0xc022ce54,
-    (q31_t)0x441ed854, (q31_t)0xc021fdfb, (q31_t)0x44124dee, (q31_t)0xc0213018,
-    (q31_t)0x4405c361, (q31_t)0xc02064ab, (q31_t)0x43f938ac, (q31_t)0xc01f9bb5,
-    (q31_t)0x43ecadcf, (q31_t)0xc01ed535, (q31_t)0x43e022cc, (q31_t)0xc01e112b,
-    (q31_t)0x43d397a3, (q31_t)0xc01d4f99, (q31_t)0x43c70c54, (q31_t)0xc01c907c,
-    (q31_t)0x43ba80df, (q31_t)0xc01bd3d6, (q31_t)0x43adf546, (q31_t)0xc01b19a7,
-    (q31_t)0x43a16988, (q31_t)0xc01a61ee, (q31_t)0x4394dda7, (q31_t)0xc019acac,
-    (q31_t)0x438851a2, (q31_t)0xc018f9e1, (q31_t)0x437bc57b, (q31_t)0xc018498c,
-    (q31_t)0x436f3931, (q31_t)0xc0179bae, (q31_t)0x4362acc5, (q31_t)0xc016f047,
-    (q31_t)0x43562038, (q31_t)0xc0164757, (q31_t)0x43499389, (q31_t)0xc015a0dd,
-    (q31_t)0x433d06bb, (q31_t)0xc014fcda, (q31_t)0x433079cc, (q31_t)0xc0145b4e,
-    (q31_t)0x4323ecbe, (q31_t)0xc013bc39, (q31_t)0x43175f91, (q31_t)0xc0131f9b,
-    (q31_t)0x430ad245, (q31_t)0xc0128574, (q31_t)0x42fe44dc, (q31_t)0xc011edc3,
-    (q31_t)0x42f1b755, (q31_t)0xc011588a, (q31_t)0x42e529b0, (q31_t)0xc010c5c7,
-    (q31_t)0x42d89bf0, (q31_t)0xc010357c, (q31_t)0x42cc0e13, (q31_t)0xc00fa7a8,
-    (q31_t)0x42bf801a, (q31_t)0xc00f1c4a, (q31_t)0x42b2f207, (q31_t)0xc00e9364,
-    (q31_t)0x42a663d8, (q31_t)0xc00e0cf5, (q31_t)0x4299d590, (q31_t)0xc00d88fd,
-    (q31_t)0x428d472e, (q31_t)0xc00d077c, (q31_t)0x4280b8b3, (q31_t)0xc00c8872,
-    (q31_t)0x42742a1f, (q31_t)0xc00c0be0, (q31_t)0x42679b73, (q31_t)0xc00b91c4,
-    (q31_t)0x425b0caf, (q31_t)0xc00b1a20, (q31_t)0x424e7dd4, (q31_t)0xc00aa4f3,
-    (q31_t)0x4241eee2, (q31_t)0xc00a323d, (q31_t)0x42355fd9, (q31_t)0xc009c1ff,
-    (q31_t)0x4228d0bb, (q31_t)0xc0095438, (q31_t)0x421c4188, (q31_t)0xc008e8e8,
-    (q31_t)0x420fb240, (q31_t)0xc008800f, (q31_t)0x420322e3, (q31_t)0xc00819ae,
-    (q31_t)0x41f69373, (q31_t)0xc007b5c4, (q31_t)0x41ea03ef, (q31_t)0xc0075452,
-    (q31_t)0x41dd7459, (q31_t)0xc006f556, (q31_t)0x41d0e4b0, (q31_t)0xc00698d3,
-    (q31_t)0x41c454f5, (q31_t)0xc0063ec6, (q31_t)0x41b7c528, (q31_t)0xc005e731,
-    (q31_t)0x41ab354b, (q31_t)0xc0059214, (q31_t)0x419ea55d, (q31_t)0xc0053f6e,
-    (q31_t)0x4192155f, (q31_t)0xc004ef3f, (q31_t)0x41858552, (q31_t)0xc004a188,
-    (q31_t)0x4178f536, (q31_t)0xc0045648, (q31_t)0x416c650b, (q31_t)0xc0040d80,
-    (q31_t)0x415fd4d2, (q31_t)0xc003c72f, (q31_t)0x4153448c, (q31_t)0xc0038356,
-    (q31_t)0x4146b438, (q31_t)0xc00341f4, (q31_t)0x413a23d8, (q31_t)0xc003030a,
-    (q31_t)0x412d936c, (q31_t)0xc002c697, (q31_t)0x412102f4, (q31_t)0xc0028c9c,
-    (q31_t)0x41147271, (q31_t)0xc0025519, (q31_t)0x4107e1e3, (q31_t)0xc002200d,
-    (q31_t)0x40fb514b, (q31_t)0xc001ed78, (q31_t)0x40eec0aa, (q31_t)0xc001bd5c,
-    (q31_t)0x40e22fff, (q31_t)0xc0018fb6, (q31_t)0x40d59f4c, (q31_t)0xc0016489,
-    (q31_t)0x40c90e90, (q31_t)0xc0013bd3, (q31_t)0x40bc7dcc, (q31_t)0xc0011594,
-    (q31_t)0x40afed02, (q31_t)0xc000f1ce, (q31_t)0x40a35c30, (q31_t)0xc000d07e,
-    (q31_t)0x4096cb58, (q31_t)0xc000b1a7, (q31_t)0x408a3a7b, (q31_t)0xc0009547,
-    (q31_t)0x407da998, (q31_t)0xc0007b5f, (q31_t)0x407118b0, (q31_t)0xc00063ee,
-    (q31_t)0x406487c4, (q31_t)0xc0004ef5, (q31_t)0x4057f6d4, (q31_t)0xc0003c74,
-    (q31_t)0x404b65e1, (q31_t)0xc0002c6a, (q31_t)0x403ed4ea, (q31_t)0xc0001ed8,
-    (q31_t)0x403243f1, (q31_t)0xc00013bd, (q31_t)0x4025b2f7, (q31_t)0xc0000b1a,
-    (q31_t)0x401921fb, (q31_t)0xc00004ef, (q31_t)0x400c90fe, (q31_t)0xc000013c,
-};
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
-/**
-  @par
-  Generation fixed-point realCoefAQ15 array in Q15 format:
-  @par
-  n = 4096
-  <pre>for (i = 0; i < n; i++)
-  {
-     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
-     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }</pre>
-  @par
-  Convert to fixed point Q15 format
-        round(pATable[i] * pow(2, 15))
- */
-const q15_t __ALIGNED(4) realCoefAQ15[8192] = {
-    (q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7, (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000,
-    (q15_t)0x3fce, (q15_t)0xc000, (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8, (q15_t)0xc000,
-    (q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000, (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001,
-    (q15_t)0x3f69, (q15_t)0xc001, (q15_t)0x3f5d, (q15_t)0xc001, (q15_t)0x3f50, (q15_t)0xc001, (q15_t)0x3f44, (q15_t)0xc001,
-    (q15_t)0x3f37, (q15_t)0xc001, (q15_t)0x3f2a, (q15_t)0xc001, (q15_t)0x3f1e, (q15_t)0xc002, (q15_t)0x3f11, (q15_t)0xc002,
-    (q15_t)0x3f05, (q15_t)0xc002, (q15_t)0x3ef8, (q15_t)0xc002, (q15_t)0x3eec, (q15_t)0xc002, (q15_t)0x3edf, (q15_t)0xc003,
-    (q15_t)0x3ed2, (q15_t)0xc003, (q15_t)0x3ec6, (q15_t)0xc003, (q15_t)0x3eb9, (q15_t)0xc003, (q15_t)0x3ead, (q15_t)0xc004,
-    (q15_t)0x3ea0, (q15_t)0xc004, (q15_t)0x3e94, (q15_t)0xc004, (q15_t)0x3e87, (q15_t)0xc004, (q15_t)0x3e7a, (q15_t)0xc005,
-    (q15_t)0x3e6e, (q15_t)0xc005, (q15_t)0x3e61, (q15_t)0xc005, (q15_t)0x3e55, (q15_t)0xc006, (q15_t)0x3e48, (q15_t)0xc006,
-    (q15_t)0x3e3c, (q15_t)0xc006, (q15_t)0x3e2f, (q15_t)0xc007, (q15_t)0x3e23, (q15_t)0xc007, (q15_t)0x3e16, (q15_t)0xc007,
-    (q15_t)0x3e09, (q15_t)0xc008, (q15_t)0x3dfd, (q15_t)0xc008, (q15_t)0x3df0, (q15_t)0xc009, (q15_t)0x3de4, (q15_t)0xc009,
-    (q15_t)0x3dd7, (q15_t)0xc009, (q15_t)0x3dcb, (q15_t)0xc00a, (q15_t)0x3dbe, (q15_t)0xc00a, (q15_t)0x3db2, (q15_t)0xc00b,
-    (q15_t)0x3da5, (q15_t)0xc00b, (q15_t)0x3d98, (q15_t)0xc00c, (q15_t)0x3d8c, (q15_t)0xc00c, (q15_t)0x3d7f, (q15_t)0xc00d,
-    (q15_t)0x3d73, (q15_t)0xc00d, (q15_t)0x3d66, (q15_t)0xc00e, (q15_t)0x3d5a, (q15_t)0xc00e, (q15_t)0x3d4d, (q15_t)0xc00f,
-    (q15_t)0x3d40, (q15_t)0xc00f, (q15_t)0x3d34, (q15_t)0xc010, (q15_t)0x3d27, (q15_t)0xc010, (q15_t)0x3d1b, (q15_t)0xc011,
-    (q15_t)0x3d0e, (q15_t)0xc011, (q15_t)0x3d02, (q15_t)0xc012, (q15_t)0x3cf5, (q15_t)0xc013, (q15_t)0x3ce9, (q15_t)0xc013,
-    (q15_t)0x3cdc, (q15_t)0xc014, (q15_t)0x3cd0, (q15_t)0xc014, (q15_t)0x3cc3, (q15_t)0xc015, (q15_t)0x3cb6, (q15_t)0xc016,
-    (q15_t)0x3caa, (q15_t)0xc016, (q15_t)0x3c9d, (q15_t)0xc017, (q15_t)0x3c91, (q15_t)0xc018, (q15_t)0x3c84, (q15_t)0xc018,
-    (q15_t)0x3c78, (q15_t)0xc019, (q15_t)0x3c6b, (q15_t)0xc01a, (q15_t)0x3c5f, (q15_t)0xc01a, (q15_t)0x3c52, (q15_t)0xc01b,
-    (q15_t)0x3c45, (q15_t)0xc01c, (q15_t)0x3c39, (q15_t)0xc01d, (q15_t)0x3c2c, (q15_t)0xc01d, (q15_t)0x3c20, (q15_t)0xc01e,
-    (q15_t)0x3c13, (q15_t)0xc01f, (q15_t)0x3c07, (q15_t)0xc020, (q15_t)0x3bfa, (q15_t)0xc020, (q15_t)0x3bee, (q15_t)0xc021,
-    (q15_t)0x3be1, (q15_t)0xc022, (q15_t)0x3bd5, (q15_t)0xc023, (q15_t)0x3bc8, (q15_t)0xc024, (q15_t)0x3bbc, (q15_t)0xc024,
-    (q15_t)0x3baf, (q15_t)0xc025, (q15_t)0x3ba2, (q15_t)0xc026, (q15_t)0x3b96, (q15_t)0xc027, (q15_t)0x3b89, (q15_t)0xc028,
-    (q15_t)0x3b7d, (q15_t)0xc029, (q15_t)0x3b70, (q15_t)0xc02a, (q15_t)0x3b64, (q15_t)0xc02b, (q15_t)0x3b57, (q15_t)0xc02b,
-    (q15_t)0x3b4b, (q15_t)0xc02c, (q15_t)0x3b3e, (q15_t)0xc02d, (q15_t)0x3b32, (q15_t)0xc02e, (q15_t)0x3b25, (q15_t)0xc02f,
-    (q15_t)0x3b19, (q15_t)0xc030, (q15_t)0x3b0c, (q15_t)0xc031, (q15_t)0x3b00, (q15_t)0xc032, (q15_t)0x3af3, (q15_t)0xc033,
-    (q15_t)0x3ae6, (q15_t)0xc034, (q15_t)0x3ada, (q15_t)0xc035, (q15_t)0x3acd, (q15_t)0xc036, (q15_t)0x3ac1, (q15_t)0xc037,
-    (q15_t)0x3ab4, (q15_t)0xc038, (q15_t)0x3aa8, (q15_t)0xc039, (q15_t)0x3a9b, (q15_t)0xc03a, (q15_t)0x3a8f, (q15_t)0xc03b,
-    (q15_t)0x3a82, (q15_t)0xc03c, (q15_t)0x3a76, (q15_t)0xc03d, (q15_t)0x3a69, (q15_t)0xc03f, (q15_t)0x3a5d, (q15_t)0xc040,
-    (q15_t)0x3a50, (q15_t)0xc041, (q15_t)0x3a44, (q15_t)0xc042, (q15_t)0x3a37, (q15_t)0xc043, (q15_t)0x3a2b, (q15_t)0xc044,
-    (q15_t)0x3a1e, (q15_t)0xc045, (q15_t)0x3a12, (q15_t)0xc047, (q15_t)0x3a05, (q15_t)0xc048, (q15_t)0x39f9, (q15_t)0xc049,
-    (q15_t)0x39ec, (q15_t)0xc04a, (q15_t)0x39e0, (q15_t)0xc04b, (q15_t)0x39d3, (q15_t)0xc04c, (q15_t)0x39c7, (q15_t)0xc04e,
-    (q15_t)0x39ba, (q15_t)0xc04f, (q15_t)0x39ae, (q15_t)0xc050, (q15_t)0x39a1, (q15_t)0xc051, (q15_t)0x3995, (q15_t)0xc053,
-    (q15_t)0x3988, (q15_t)0xc054, (q15_t)0x397c, (q15_t)0xc055, (q15_t)0x396f, (q15_t)0xc056, (q15_t)0x3963, (q15_t)0xc058,
-    (q15_t)0x3956, (q15_t)0xc059, (q15_t)0x394a, (q15_t)0xc05a, (q15_t)0x393d, (q15_t)0xc05c, (q15_t)0x3931, (q15_t)0xc05d,
-    (q15_t)0x3924, (q15_t)0xc05e, (q15_t)0x3918, (q15_t)0xc060, (q15_t)0x390b, (q15_t)0xc061, (q15_t)0x38ff, (q15_t)0xc062,
-    (q15_t)0x38f2, (q15_t)0xc064, (q15_t)0x38e6, (q15_t)0xc065, (q15_t)0x38d9, (q15_t)0xc067, (q15_t)0x38cd, (q15_t)0xc068,
-    (q15_t)0x38c0, (q15_t)0xc069, (q15_t)0x38b4, (q15_t)0xc06b, (q15_t)0x38a7, (q15_t)0xc06c, (q15_t)0x389b, (q15_t)0xc06e,
-    (q15_t)0x388e, (q15_t)0xc06f, (q15_t)0x3882, (q15_t)0xc071, (q15_t)0x3875, (q15_t)0xc072, (q15_t)0x3869, (q15_t)0xc074,
-    (q15_t)0x385c, (q15_t)0xc075, (q15_t)0x3850, (q15_t)0xc077, (q15_t)0x3843, (q15_t)0xc078, (q15_t)0x3837, (q15_t)0xc07a,
-    (q15_t)0x382a, (q15_t)0xc07b, (q15_t)0x381e, (q15_t)0xc07d, (q15_t)0x3811, (q15_t)0xc07e, (q15_t)0x3805, (q15_t)0xc080,
-    (q15_t)0x37f9, (q15_t)0xc081, (q15_t)0x37ec, (q15_t)0xc083, (q15_t)0x37e0, (q15_t)0xc085, (q15_t)0x37d3, (q15_t)0xc086,
-    (q15_t)0x37c7, (q15_t)0xc088, (q15_t)0x37ba, (q15_t)0xc089, (q15_t)0x37ae, (q15_t)0xc08b, (q15_t)0x37a1, (q15_t)0xc08d,
-    (q15_t)0x3795, (q15_t)0xc08e, (q15_t)0x3788, (q15_t)0xc090, (q15_t)0x377c, (q15_t)0xc092, (q15_t)0x376f, (q15_t)0xc093,
-    (q15_t)0x3763, (q15_t)0xc095, (q15_t)0x3757, (q15_t)0xc097, (q15_t)0x374a, (q15_t)0xc098, (q15_t)0x373e, (q15_t)0xc09a,
-    (q15_t)0x3731, (q15_t)0xc09c, (q15_t)0x3725, (q15_t)0xc09e, (q15_t)0x3718, (q15_t)0xc09f, (q15_t)0x370c, (q15_t)0xc0a1,
-    (q15_t)0x36ff, (q15_t)0xc0a3, (q15_t)0x36f3, (q15_t)0xc0a5, (q15_t)0x36e7, (q15_t)0xc0a6, (q15_t)0x36da, (q15_t)0xc0a8,
-    (q15_t)0x36ce, (q15_t)0xc0aa, (q15_t)0x36c1, (q15_t)0xc0ac, (q15_t)0x36b5, (q15_t)0xc0ae, (q15_t)0x36a8, (q15_t)0xc0af,
-    (q15_t)0x369c, (q15_t)0xc0b1, (q15_t)0x3690, (q15_t)0xc0b3, (q15_t)0x3683, (q15_t)0xc0b5, (q15_t)0x3677, (q15_t)0xc0b7,
-    (q15_t)0x366a, (q15_t)0xc0b9, (q15_t)0x365e, (q15_t)0xc0bb, (q15_t)0x3651, (q15_t)0xc0bd, (q15_t)0x3645, (q15_t)0xc0be,
-    (q15_t)0x3639, (q15_t)0xc0c0, (q15_t)0x362c, (q15_t)0xc0c2, (q15_t)0x3620, (q15_t)0xc0c4, (q15_t)0x3613, (q15_t)0xc0c6,
-    (q15_t)0x3607, (q15_t)0xc0c8, (q15_t)0x35fa, (q15_t)0xc0ca, (q15_t)0x35ee, (q15_t)0xc0cc, (q15_t)0x35e2, (q15_t)0xc0ce,
-    (q15_t)0x35d5, (q15_t)0xc0d0, (q15_t)0x35c9, (q15_t)0xc0d2, (q15_t)0x35bc, (q15_t)0xc0d4, (q15_t)0x35b0, (q15_t)0xc0d6,
-    (q15_t)0x35a4, (q15_t)0xc0d8, (q15_t)0x3597, (q15_t)0xc0da, (q15_t)0x358b, (q15_t)0xc0dc, (q15_t)0x357e, (q15_t)0xc0de,
-    (q15_t)0x3572, (q15_t)0xc0e0, (q15_t)0x3566, (q15_t)0xc0e2, (q15_t)0x3559, (q15_t)0xc0e4, (q15_t)0x354d, (q15_t)0xc0e7,
-    (q15_t)0x3540, (q15_t)0xc0e9, (q15_t)0x3534, (q15_t)0xc0eb, (q15_t)0x3528, (q15_t)0xc0ed, (q15_t)0x351b, (q15_t)0xc0ef,
-    (q15_t)0x350f, (q15_t)0xc0f1, (q15_t)0x3503, (q15_t)0xc0f3, (q15_t)0x34f6, (q15_t)0xc0f6, (q15_t)0x34ea, (q15_t)0xc0f8,
-    (q15_t)0x34dd, (q15_t)0xc0fa, (q15_t)0x34d1, (q15_t)0xc0fc, (q15_t)0x34c5, (q15_t)0xc0fe, (q15_t)0x34b8, (q15_t)0xc100,
-    (q15_t)0x34ac, (q15_t)0xc103, (q15_t)0x34a0, (q15_t)0xc105, (q15_t)0x3493, (q15_t)0xc107, (q15_t)0x3487, (q15_t)0xc109,
-    (q15_t)0x347b, (q15_t)0xc10c, (q15_t)0x346e, (q15_t)0xc10e, (q15_t)0x3462, (q15_t)0xc110, (q15_t)0x3455, (q15_t)0xc113,
-    (q15_t)0x3449, (q15_t)0xc115, (q15_t)0x343d, (q15_t)0xc117, (q15_t)0x3430, (q15_t)0xc119, (q15_t)0x3424, (q15_t)0xc11c,
-    (q15_t)0x3418, (q15_t)0xc11e, (q15_t)0x340b, (q15_t)0xc120, (q15_t)0x33ff, (q15_t)0xc123, (q15_t)0x33f3, (q15_t)0xc125,
-    (q15_t)0x33e6, (q15_t)0xc128, (q15_t)0x33da, (q15_t)0xc12a, (q15_t)0x33ce, (q15_t)0xc12c, (q15_t)0x33c1, (q15_t)0xc12f,
-    (q15_t)0x33b5, (q15_t)0xc131, (q15_t)0x33a9, (q15_t)0xc134, (q15_t)0x339c, (q15_t)0xc136, (q15_t)0x3390, (q15_t)0xc138,
-    (q15_t)0x3384, (q15_t)0xc13b, (q15_t)0x3377, (q15_t)0xc13d, (q15_t)0x336b, (q15_t)0xc140, (q15_t)0x335f, (q15_t)0xc142,
-    (q15_t)0x3352, (q15_t)0xc145, (q15_t)0x3346, (q15_t)0xc147, (q15_t)0x333a, (q15_t)0xc14a, (q15_t)0x332d, (q15_t)0xc14c,
-    (q15_t)0x3321, (q15_t)0xc14f, (q15_t)0x3315, (q15_t)0xc151, (q15_t)0x3308, (q15_t)0xc154, (q15_t)0x32fc, (q15_t)0xc156,
-    (q15_t)0x32f0, (q15_t)0xc159, (q15_t)0x32e4, (q15_t)0xc15b, (q15_t)0x32d7, (q15_t)0xc15e, (q15_t)0x32cb, (q15_t)0xc161,
-    (q15_t)0x32bf, (q15_t)0xc163, (q15_t)0x32b2, (q15_t)0xc166, (q15_t)0x32a6, (q15_t)0xc168, (q15_t)0x329a, (q15_t)0xc16b,
-    (q15_t)0x328e, (q15_t)0xc16e, (q15_t)0x3281, (q15_t)0xc170, (q15_t)0x3275, (q15_t)0xc173, (q15_t)0x3269, (q15_t)0xc176,
-    (q15_t)0x325c, (q15_t)0xc178, (q15_t)0x3250, (q15_t)0xc17b, (q15_t)0x3244, (q15_t)0xc17e, (q15_t)0x3238, (q15_t)0xc180,
-    (q15_t)0x322b, (q15_t)0xc183, (q15_t)0x321f, (q15_t)0xc186, (q15_t)0x3213, (q15_t)0xc189, (q15_t)0x3207, (q15_t)0xc18b,
-    (q15_t)0x31fa, (q15_t)0xc18e, (q15_t)0x31ee, (q15_t)0xc191, (q15_t)0x31e2, (q15_t)0xc194, (q15_t)0x31d5, (q15_t)0xc196,
-    (q15_t)0x31c9, (q15_t)0xc199, (q15_t)0x31bd, (q15_t)0xc19c, (q15_t)0x31b1, (q15_t)0xc19f, (q15_t)0x31a4, (q15_t)0xc1a2,
-    (q15_t)0x3198, (q15_t)0xc1a4, (q15_t)0x318c, (q15_t)0xc1a7, (q15_t)0x3180, (q15_t)0xc1aa, (q15_t)0x3174, (q15_t)0xc1ad,
-    (q15_t)0x3167, (q15_t)0xc1b0, (q15_t)0x315b, (q15_t)0xc1b3, (q15_t)0x314f, (q15_t)0xc1b6, (q15_t)0x3143, (q15_t)0xc1b8,
-    (q15_t)0x3136, (q15_t)0xc1bb, (q15_t)0x312a, (q15_t)0xc1be, (q15_t)0x311e, (q15_t)0xc1c1, (q15_t)0x3112, (q15_t)0xc1c4,
-    (q15_t)0x3105, (q15_t)0xc1c7, (q15_t)0x30f9, (q15_t)0xc1ca, (q15_t)0x30ed, (q15_t)0xc1cd, (q15_t)0x30e1, (q15_t)0xc1d0,
-    (q15_t)0x30d5, (q15_t)0xc1d3, (q15_t)0x30c8, (q15_t)0xc1d6, (q15_t)0x30bc, (q15_t)0xc1d9, (q15_t)0x30b0, (q15_t)0xc1dc,
-    (q15_t)0x30a4, (q15_t)0xc1df, (q15_t)0x3098, (q15_t)0xc1e2, (q15_t)0x308b, (q15_t)0xc1e5, (q15_t)0x307f, (q15_t)0xc1e8,
-    (q15_t)0x3073, (q15_t)0xc1eb, (q15_t)0x3067, (q15_t)0xc1ee, (q15_t)0x305b, (q15_t)0xc1f1, (q15_t)0x304e, (q15_t)0xc1f4,
-    (q15_t)0x3042, (q15_t)0xc1f7, (q15_t)0x3036, (q15_t)0xc1fa, (q15_t)0x302a, (q15_t)0xc1fd, (q15_t)0x301e, (q15_t)0xc201,
-    (q15_t)0x3012, (q15_t)0xc204, (q15_t)0x3005, (q15_t)0xc207, (q15_t)0x2ff9, (q15_t)0xc20a, (q15_t)0x2fed, (q15_t)0xc20d,
-    (q15_t)0x2fe1, (q15_t)0xc210, (q15_t)0x2fd5, (q15_t)0xc213, (q15_t)0x2fc9, (q15_t)0xc217, (q15_t)0x2fbc, (q15_t)0xc21a,
-    (q15_t)0x2fb0, (q15_t)0xc21d, (q15_t)0x2fa4, (q15_t)0xc220, (q15_t)0x2f98, (q15_t)0xc223, (q15_t)0x2f8c, (q15_t)0xc227,
-    (q15_t)0x2f80, (q15_t)0xc22a, (q15_t)0x2f74, (q15_t)0xc22d, (q15_t)0x2f67, (q15_t)0xc230, (q15_t)0x2f5b, (q15_t)0xc234,
-    (q15_t)0x2f4f, (q15_t)0xc237, (q15_t)0x2f43, (q15_t)0xc23a, (q15_t)0x2f37, (q15_t)0xc23e, (q15_t)0x2f2b, (q15_t)0xc241,
-    (q15_t)0x2f1f, (q15_t)0xc244, (q15_t)0x2f13, (q15_t)0xc247, (q15_t)0x2f06, (q15_t)0xc24b, (q15_t)0x2efa, (q15_t)0xc24e,
-    (q15_t)0x2eee, (q15_t)0xc251, (q15_t)0x2ee2, (q15_t)0xc255, (q15_t)0x2ed6, (q15_t)0xc258, (q15_t)0x2eca, (q15_t)0xc25c,
-    (q15_t)0x2ebe, (q15_t)0xc25f, (q15_t)0x2eb2, (q15_t)0xc262, (q15_t)0x2ea6, (q15_t)0xc266, (q15_t)0x2e99, (q15_t)0xc269,
-    (q15_t)0x2e8d, (q15_t)0xc26d, (q15_t)0x2e81, (q15_t)0xc270, (q15_t)0x2e75, (q15_t)0xc273, (q15_t)0x2e69, (q15_t)0xc277,
-    (q15_t)0x2e5d, (q15_t)0xc27a, (q15_t)0x2e51, (q15_t)0xc27e, (q15_t)0x2e45, (q15_t)0xc281, (q15_t)0x2e39, (q15_t)0xc285,
-    (q15_t)0x2e2d, (q15_t)0xc288, (q15_t)0x2e21, (q15_t)0xc28c, (q15_t)0x2e15, (q15_t)0xc28f, (q15_t)0x2e09, (q15_t)0xc293,
-    (q15_t)0x2dfc, (q15_t)0xc296, (q15_t)0x2df0, (q15_t)0xc29a, (q15_t)0x2de4, (q15_t)0xc29d, (q15_t)0x2dd8, (q15_t)0xc2a1,
-    (q15_t)0x2dcc, (q15_t)0xc2a5, (q15_t)0x2dc0, (q15_t)0xc2a8, (q15_t)0x2db4, (q15_t)0xc2ac, (q15_t)0x2da8, (q15_t)0xc2af,
-    (q15_t)0x2d9c, (q15_t)0xc2b3, (q15_t)0x2d90, (q15_t)0xc2b7, (q15_t)0x2d84, (q15_t)0xc2ba, (q15_t)0x2d78, (q15_t)0xc2be,
-    (q15_t)0x2d6c, (q15_t)0xc2c1, (q15_t)0x2d60, (q15_t)0xc2c5, (q15_t)0x2d54, (q15_t)0xc2c9, (q15_t)0x2d48, (q15_t)0xc2cc,
-    (q15_t)0x2d3c, (q15_t)0xc2d0, (q15_t)0x2d30, (q15_t)0xc2d4, (q15_t)0x2d24, (q15_t)0xc2d8, (q15_t)0x2d18, (q15_t)0xc2db,
-    (q15_t)0x2d0c, (q15_t)0xc2df, (q15_t)0x2d00, (q15_t)0xc2e3, (q15_t)0x2cf4, (q15_t)0xc2e6, (q15_t)0x2ce8, (q15_t)0xc2ea,
-    (q15_t)0x2cdc, (q15_t)0xc2ee, (q15_t)0x2cd0, (q15_t)0xc2f2, (q15_t)0x2cc4, (q15_t)0xc2f5, (q15_t)0x2cb8, (q15_t)0xc2f9,
-    (q15_t)0x2cac, (q15_t)0xc2fd, (q15_t)0x2ca0, (q15_t)0xc301, (q15_t)0x2c94, (q15_t)0xc305, (q15_t)0x2c88, (q15_t)0xc308,
-    (q15_t)0x2c7c, (q15_t)0xc30c, (q15_t)0x2c70, (q15_t)0xc310, (q15_t)0x2c64, (q15_t)0xc314, (q15_t)0x2c58, (q15_t)0xc318,
-    (q15_t)0x2c4c, (q15_t)0xc31c, (q15_t)0x2c40, (q15_t)0xc320, (q15_t)0x2c34, (q15_t)0xc323, (q15_t)0x2c28, (q15_t)0xc327,
-    (q15_t)0x2c1c, (q15_t)0xc32b, (q15_t)0x2c10, (q15_t)0xc32f, (q15_t)0x2c05, (q15_t)0xc333, (q15_t)0x2bf9, (q15_t)0xc337,
-    (q15_t)0x2bed, (q15_t)0xc33b, (q15_t)0x2be1, (q15_t)0xc33f, (q15_t)0x2bd5, (q15_t)0xc343, (q15_t)0x2bc9, (q15_t)0xc347,
-    (q15_t)0x2bbd, (q15_t)0xc34b, (q15_t)0x2bb1, (q15_t)0xc34f, (q15_t)0x2ba5, (q15_t)0xc353, (q15_t)0x2b99, (q15_t)0xc357,
-    (q15_t)0x2b8d, (q15_t)0xc35b, (q15_t)0x2b81, (q15_t)0xc35f, (q15_t)0x2b75, (q15_t)0xc363, (q15_t)0x2b6a, (q15_t)0xc367,
-    (q15_t)0x2b5e, (q15_t)0xc36b, (q15_t)0x2b52, (q15_t)0xc36f, (q15_t)0x2b46, (q15_t)0xc373, (q15_t)0x2b3a, (q15_t)0xc377,
-    (q15_t)0x2b2e, (q15_t)0xc37b, (q15_t)0x2b22, (q15_t)0xc37f, (q15_t)0x2b16, (q15_t)0xc383, (q15_t)0x2b0a, (q15_t)0xc387,
-    (q15_t)0x2aff, (q15_t)0xc38c, (q15_t)0x2af3, (q15_t)0xc390, (q15_t)0x2ae7, (q15_t)0xc394, (q15_t)0x2adb, (q15_t)0xc398,
-    (q15_t)0x2acf, (q15_t)0xc39c, (q15_t)0x2ac3, (q15_t)0xc3a0, (q15_t)0x2ab7, (q15_t)0xc3a5, (q15_t)0x2aac, (q15_t)0xc3a9,
-    (q15_t)0x2aa0, (q15_t)0xc3ad, (q15_t)0x2a94, (q15_t)0xc3b1, (q15_t)0x2a88, (q15_t)0xc3b5, (q15_t)0x2a7c, (q15_t)0xc3ba,
-    (q15_t)0x2a70, (q15_t)0xc3be, (q15_t)0x2a65, (q15_t)0xc3c2, (q15_t)0x2a59, (q15_t)0xc3c6, (q15_t)0x2a4d, (q15_t)0xc3ca,
-    (q15_t)0x2a41, (q15_t)0xc3cf, (q15_t)0x2a35, (q15_t)0xc3d3, (q15_t)0x2a29, (q15_t)0xc3d7, (q15_t)0x2a1e, (q15_t)0xc3dc,
-    (q15_t)0x2a12, (q15_t)0xc3e0, (q15_t)0x2a06, (q15_t)0xc3e4, (q15_t)0x29fa, (q15_t)0xc3e9, (q15_t)0x29ee, (q15_t)0xc3ed,
-    (q15_t)0x29e3, (q15_t)0xc3f1, (q15_t)0x29d7, (q15_t)0xc3f6, (q15_t)0x29cb, (q15_t)0xc3fa, (q15_t)0x29bf, (q15_t)0xc3fe,
-    (q15_t)0x29b4, (q15_t)0xc403, (q15_t)0x29a8, (q15_t)0xc407, (q15_t)0x299c, (q15_t)0xc40b, (q15_t)0x2990, (q15_t)0xc410,
-    (q15_t)0x2984, (q15_t)0xc414, (q15_t)0x2979, (q15_t)0xc419, (q15_t)0x296d, (q15_t)0xc41d, (q15_t)0x2961, (q15_t)0xc422,
-    (q15_t)0x2955, (q15_t)0xc426, (q15_t)0x294a, (q15_t)0xc42a, (q15_t)0x293e, (q15_t)0xc42f, (q15_t)0x2932, (q15_t)0xc433,
-    (q15_t)0x2926, (q15_t)0xc438, (q15_t)0x291b, (q15_t)0xc43c, (q15_t)0x290f, (q15_t)0xc441, (q15_t)0x2903, (q15_t)0xc445,
-    (q15_t)0x28f7, (q15_t)0xc44a, (q15_t)0x28ec, (q15_t)0xc44e, (q15_t)0x28e0, (q15_t)0xc453, (q15_t)0x28d4, (q15_t)0xc457,
-    (q15_t)0x28c9, (q15_t)0xc45c, (q15_t)0x28bd, (q15_t)0xc461, (q15_t)0x28b1, (q15_t)0xc465, (q15_t)0x28a5, (q15_t)0xc46a,
-    (q15_t)0x289a, (q15_t)0xc46e, (q15_t)0x288e, (q15_t)0xc473, (q15_t)0x2882, (q15_t)0xc478, (q15_t)0x2877, (q15_t)0xc47c,
-    (q15_t)0x286b, (q15_t)0xc481, (q15_t)0x285f, (q15_t)0xc485, (q15_t)0x2854, (q15_t)0xc48a, (q15_t)0x2848, (q15_t)0xc48f,
-    (q15_t)0x283c, (q15_t)0xc493, (q15_t)0x2831, (q15_t)0xc498, (q15_t)0x2825, (q15_t)0xc49d, (q15_t)0x2819, (q15_t)0xc4a1,
-    (q15_t)0x280e, (q15_t)0xc4a6, (q15_t)0x2802, (q15_t)0xc4ab, (q15_t)0x27f6, (q15_t)0xc4b0, (q15_t)0x27eb, (q15_t)0xc4b4,
-    (q15_t)0x27df, (q15_t)0xc4b9, (q15_t)0x27d3, (q15_t)0xc4be, (q15_t)0x27c8, (q15_t)0xc4c2, (q15_t)0x27bc, (q15_t)0xc4c7,
-    (q15_t)0x27b1, (q15_t)0xc4cc, (q15_t)0x27a5, (q15_t)0xc4d1, (q15_t)0x2799, (q15_t)0xc4d6, (q15_t)0x278e, (q15_t)0xc4da,
-    (q15_t)0x2782, (q15_t)0xc4df, (q15_t)0x2777, (q15_t)0xc4e4, (q15_t)0x276b, (q15_t)0xc4e9, (q15_t)0x275f, (q15_t)0xc4ee,
-    (q15_t)0x2754, (q15_t)0xc4f2, (q15_t)0x2748, (q15_t)0xc4f7, (q15_t)0x273d, (q15_t)0xc4fc, (q15_t)0x2731, (q15_t)0xc501,
-    (q15_t)0x2725, (q15_t)0xc506, (q15_t)0x271a, (q15_t)0xc50b, (q15_t)0x270e, (q15_t)0xc510, (q15_t)0x2703, (q15_t)0xc515,
-    (q15_t)0x26f7, (q15_t)0xc51a, (q15_t)0x26ec, (q15_t)0xc51e, (q15_t)0x26e0, (q15_t)0xc523, (q15_t)0x26d4, (q15_t)0xc528,
-    (q15_t)0x26c9, (q15_t)0xc52d, (q15_t)0x26bd, (q15_t)0xc532, (q15_t)0x26b2, (q15_t)0xc537, (q15_t)0x26a6, (q15_t)0xc53c,
-    (q15_t)0x269b, (q15_t)0xc541, (q15_t)0x268f, (q15_t)0xc546, (q15_t)0x2684, (q15_t)0xc54b, (q15_t)0x2678, (q15_t)0xc550,
-    (q15_t)0x266d, (q15_t)0xc555, (q15_t)0x2661, (q15_t)0xc55a, (q15_t)0x2656, (q15_t)0xc55f, (q15_t)0x264a, (q15_t)0xc564,
-    (q15_t)0x263f, (q15_t)0xc569, (q15_t)0x2633, (q15_t)0xc56e, (q15_t)0x2628, (q15_t)0xc573, (q15_t)0x261c, (q15_t)0xc578,
-    (q15_t)0x2611, (q15_t)0xc57e, (q15_t)0x2605, (q15_t)0xc583, (q15_t)0x25fa, (q15_t)0xc588, (q15_t)0x25ee, (q15_t)0xc58d,
-    (q15_t)0x25e3, (q15_t)0xc592, (q15_t)0x25d7, (q15_t)0xc597, (q15_t)0x25cc, (q15_t)0xc59c, (q15_t)0x25c0, (q15_t)0xc5a1,
-    (q15_t)0x25b5, (q15_t)0xc5a7, (q15_t)0x25a9, (q15_t)0xc5ac, (q15_t)0x259e, (q15_t)0xc5b1, (q15_t)0x2592, (q15_t)0xc5b6,
-    (q15_t)0x2587, (q15_t)0xc5bb, (q15_t)0x257c, (q15_t)0xc5c1, (q15_t)0x2570, (q15_t)0xc5c6, (q15_t)0x2565, (q15_t)0xc5cb,
-    (q15_t)0x2559, (q15_t)0xc5d0, (q15_t)0x254e, (q15_t)0xc5d5, (q15_t)0x2542, (q15_t)0xc5db, (q15_t)0x2537, (q15_t)0xc5e0,
-    (q15_t)0x252c, (q15_t)0xc5e5, (q15_t)0x2520, (q15_t)0xc5ea, (q15_t)0x2515, (q15_t)0xc5f0, (q15_t)0x2509, (q15_t)0xc5f5,
-    (q15_t)0x24fe, (q15_t)0xc5fa, (q15_t)0x24f3, (q15_t)0xc600, (q15_t)0x24e7, (q15_t)0xc605, (q15_t)0x24dc, (q15_t)0xc60a,
-    (q15_t)0x24d0, (q15_t)0xc610, (q15_t)0x24c5, (q15_t)0xc615, (q15_t)0x24ba, (q15_t)0xc61a, (q15_t)0x24ae, (q15_t)0xc620,
-    (q15_t)0x24a3, (q15_t)0xc625, (q15_t)0x2498, (q15_t)0xc62a, (q15_t)0x248c, (q15_t)0xc630, (q15_t)0x2481, (q15_t)0xc635,
-    (q15_t)0x2476, (q15_t)0xc63b, (q15_t)0x246a, (q15_t)0xc640, (q15_t)0x245f, (q15_t)0xc645, (q15_t)0x2454, (q15_t)0xc64b,
-    (q15_t)0x2448, (q15_t)0xc650, (q15_t)0x243d, (q15_t)0xc656, (q15_t)0x2432, (q15_t)0xc65b, (q15_t)0x2426, (q15_t)0xc661,
-    (q15_t)0x241b, (q15_t)0xc666, (q15_t)0x2410, (q15_t)0xc66c, (q15_t)0x2404, (q15_t)0xc671, (q15_t)0x23f9, (q15_t)0xc677,
-    (q15_t)0x23ee, (q15_t)0xc67c, (q15_t)0x23e2, (q15_t)0xc682, (q15_t)0x23d7, (q15_t)0xc687, (q15_t)0x23cc, (q15_t)0xc68d,
-    (q15_t)0x23c1, (q15_t)0xc692, (q15_t)0x23b5, (q15_t)0xc698, (q15_t)0x23aa, (q15_t)0xc69d, (q15_t)0x239f, (q15_t)0xc6a3,
-    (q15_t)0x2394, (q15_t)0xc6a8, (q15_t)0x2388, (q15_t)0xc6ae, (q15_t)0x237d, (q15_t)0xc6b4, (q15_t)0x2372, (q15_t)0xc6b9,
-    (q15_t)0x2367, (q15_t)0xc6bf, (q15_t)0x235b, (q15_t)0xc6c5, (q15_t)0x2350, (q15_t)0xc6ca, (q15_t)0x2345, (q15_t)0xc6d0,
-    (q15_t)0x233a, (q15_t)0xc6d5, (q15_t)0x232e, (q15_t)0xc6db, (q15_t)0x2323, (q15_t)0xc6e1, (q15_t)0x2318, (q15_t)0xc6e6,
-    (q15_t)0x230d, (q15_t)0xc6ec, (q15_t)0x2301, (q15_t)0xc6f2, (q15_t)0x22f6, (q15_t)0xc6f7, (q15_t)0x22eb, (q15_t)0xc6fd,
-    (q15_t)0x22e0, (q15_t)0xc703, (q15_t)0x22d5, (q15_t)0xc709, (q15_t)0x22ca, (q15_t)0xc70e, (q15_t)0x22be, (q15_t)0xc714,
-    (q15_t)0x22b3, (q15_t)0xc71a, (q15_t)0x22a8, (q15_t)0xc720, (q15_t)0x229d, (q15_t)0xc725, (q15_t)0x2292, (q15_t)0xc72b,
-    (q15_t)0x2287, (q15_t)0xc731, (q15_t)0x227b, (q15_t)0xc737, (q15_t)0x2270, (q15_t)0xc73d, (q15_t)0x2265, (q15_t)0xc742,
-    (q15_t)0x225a, (q15_t)0xc748, (q15_t)0x224f, (q15_t)0xc74e, (q15_t)0x2244, (q15_t)0xc754, (q15_t)0x2239, (q15_t)0xc75a,
-    (q15_t)0x222d, (q15_t)0xc75f, (q15_t)0x2222, (q15_t)0xc765, (q15_t)0x2217, (q15_t)0xc76b, (q15_t)0x220c, (q15_t)0xc771,
-    (q15_t)0x2201, (q15_t)0xc777, (q15_t)0x21f6, (q15_t)0xc77d, (q15_t)0x21eb, (q15_t)0xc783, (q15_t)0x21e0, (q15_t)0xc789,
-    (q15_t)0x21d5, (q15_t)0xc78f, (q15_t)0x21ca, (q15_t)0xc795, (q15_t)0x21be, (q15_t)0xc79a, (q15_t)0x21b3, (q15_t)0xc7a0,
-    (q15_t)0x21a8, (q15_t)0xc7a6, (q15_t)0x219d, (q15_t)0xc7ac, (q15_t)0x2192, (q15_t)0xc7b2, (q15_t)0x2187, (q15_t)0xc7b8,
-    (q15_t)0x217c, (q15_t)0xc7be, (q15_t)0x2171, (q15_t)0xc7c4, (q15_t)0x2166, (q15_t)0xc7ca, (q15_t)0x215b, (q15_t)0xc7d0,
-    (q15_t)0x2150, (q15_t)0xc7d6, (q15_t)0x2145, (q15_t)0xc7dc, (q15_t)0x213a, (q15_t)0xc7e2, (q15_t)0x212f, (q15_t)0xc7e8,
-    (q15_t)0x2124, (q15_t)0xc7ee, (q15_t)0x2119, (q15_t)0xc7f5, (q15_t)0x210e, (q15_t)0xc7fb, (q15_t)0x2103, (q15_t)0xc801,
-    (q15_t)0x20f8, (q15_t)0xc807, (q15_t)0x20ed, (q15_t)0xc80d, (q15_t)0x20e2, (q15_t)0xc813, (q15_t)0x20d7, (q15_t)0xc819,
-    (q15_t)0x20cc, (q15_t)0xc81f, (q15_t)0x20c1, (q15_t)0xc825, (q15_t)0x20b6, (q15_t)0xc82b, (q15_t)0x20ab, (q15_t)0xc832,
-    (q15_t)0x20a0, (q15_t)0xc838, (q15_t)0x2095, (q15_t)0xc83e, (q15_t)0x208a, (q15_t)0xc844, (q15_t)0x207f, (q15_t)0xc84a,
-    (q15_t)0x2074, (q15_t)0xc850, (q15_t)0x2069, (q15_t)0xc857, (q15_t)0x205e, (q15_t)0xc85d, (q15_t)0x2054, (q15_t)0xc863,
-    (q15_t)0x2049, (q15_t)0xc869, (q15_t)0x203e, (q15_t)0xc870, (q15_t)0x2033, (q15_t)0xc876, (q15_t)0x2028, (q15_t)0xc87c,
-    (q15_t)0x201d, (q15_t)0xc882, (q15_t)0x2012, (q15_t)0xc889, (q15_t)0x2007, (q15_t)0xc88f, (q15_t)0x1ffc, (q15_t)0xc895,
-    (q15_t)0x1ff1, (q15_t)0xc89b, (q15_t)0x1fe7, (q15_t)0xc8a2, (q15_t)0x1fdc, (q15_t)0xc8a8, (q15_t)0x1fd1, (q15_t)0xc8ae,
-    (q15_t)0x1fc6, (q15_t)0xc8b5, (q15_t)0x1fbb, (q15_t)0xc8bb, (q15_t)0x1fb0, (q15_t)0xc8c1, (q15_t)0x1fa5, (q15_t)0xc8c8,
-    (q15_t)0x1f9b, (q15_t)0xc8ce, (q15_t)0x1f90, (q15_t)0xc8d4, (q15_t)0x1f85, (q15_t)0xc8db, (q15_t)0x1f7a, (q15_t)0xc8e1,
-    (q15_t)0x1f6f, (q15_t)0xc8e8, (q15_t)0x1f65, (q15_t)0xc8ee, (q15_t)0x1f5a, (q15_t)0xc8f4, (q15_t)0x1f4f, (q15_t)0xc8fb,
-    (q15_t)0x1f44, (q15_t)0xc901, (q15_t)0x1f39, (q15_t)0xc908, (q15_t)0x1f2f, (q15_t)0xc90e, (q15_t)0x1f24, (q15_t)0xc915,
-    (q15_t)0x1f19, (q15_t)0xc91b, (q15_t)0x1f0e, (q15_t)0xc921, (q15_t)0x1f03, (q15_t)0xc928, (q15_t)0x1ef9, (q15_t)0xc92e,
-    (q15_t)0x1eee, (q15_t)0xc935, (q15_t)0x1ee3, (q15_t)0xc93b, (q15_t)0x1ed8, (q15_t)0xc942, (q15_t)0x1ece, (q15_t)0xc948,
-    (q15_t)0x1ec3, (q15_t)0xc94f, (q15_t)0x1eb8, (q15_t)0xc955, (q15_t)0x1ead, (q15_t)0xc95c, (q15_t)0x1ea3, (q15_t)0xc963,
-    (q15_t)0x1e98, (q15_t)0xc969, (q15_t)0x1e8d, (q15_t)0xc970, (q15_t)0x1e83, (q15_t)0xc976, (q15_t)0x1e78, (q15_t)0xc97d,
-    (q15_t)0x1e6d, (q15_t)0xc983, (q15_t)0x1e62, (q15_t)0xc98a, (q15_t)0x1e58, (q15_t)0xc991, (q15_t)0x1e4d, (q15_t)0xc997,
-    (q15_t)0x1e42, (q15_t)0xc99e, (q15_t)0x1e38, (q15_t)0xc9a4, (q15_t)0x1e2d, (q15_t)0xc9ab, (q15_t)0x1e22, (q15_t)0xc9b2,
-    (q15_t)0x1e18, (q15_t)0xc9b8, (q15_t)0x1e0d, (q15_t)0xc9bf, (q15_t)0x1e02, (q15_t)0xc9c6, (q15_t)0x1df8, (q15_t)0xc9cc,
-    (q15_t)0x1ded, (q15_t)0xc9d3, (q15_t)0x1de2, (q15_t)0xc9da, (q15_t)0x1dd8, (q15_t)0xc9e0, (q15_t)0x1dcd, (q15_t)0xc9e7,
-    (q15_t)0x1dc3, (q15_t)0xc9ee, (q15_t)0x1db8, (q15_t)0xc9f5, (q15_t)0x1dad, (q15_t)0xc9fb, (q15_t)0x1da3, (q15_t)0xca02,
-    (q15_t)0x1d98, (q15_t)0xca09, (q15_t)0x1d8e, (q15_t)0xca10, (q15_t)0x1d83, (q15_t)0xca16, (q15_t)0x1d78, (q15_t)0xca1d,
-    (q15_t)0x1d6e, (q15_t)0xca24, (q15_t)0x1d63, (q15_t)0xca2b, (q15_t)0x1d59, (q15_t)0xca32, (q15_t)0x1d4e, (q15_t)0xca38,
-    (q15_t)0x1d44, (q15_t)0xca3f, (q15_t)0x1d39, (q15_t)0xca46, (q15_t)0x1d2e, (q15_t)0xca4d, (q15_t)0x1d24, (q15_t)0xca54,
-    (q15_t)0x1d19, (q15_t)0xca5b, (q15_t)0x1d0f, (q15_t)0xca61, (q15_t)0x1d04, (q15_t)0xca68, (q15_t)0x1cfa, (q15_t)0xca6f,
-    (q15_t)0x1cef, (q15_t)0xca76, (q15_t)0x1ce5, (q15_t)0xca7d, (q15_t)0x1cda, (q15_t)0xca84, (q15_t)0x1cd0, (q15_t)0xca8b,
-    (q15_t)0x1cc5, (q15_t)0xca92, (q15_t)0x1cbb, (q15_t)0xca99, (q15_t)0x1cb0, (q15_t)0xca9f, (q15_t)0x1ca6, (q15_t)0xcaa6,
-    (q15_t)0x1c9b, (q15_t)0xcaad, (q15_t)0x1c91, (q15_t)0xcab4, (q15_t)0x1c86, (q15_t)0xcabb, (q15_t)0x1c7c, (q15_t)0xcac2,
-    (q15_t)0x1c72, (q15_t)0xcac9, (q15_t)0x1c67, (q15_t)0xcad0, (q15_t)0x1c5d, (q15_t)0xcad7, (q15_t)0x1c52, (q15_t)0xcade,
-    (q15_t)0x1c48, (q15_t)0xcae5, (q15_t)0x1c3d, (q15_t)0xcaec, (q15_t)0x1c33, (q15_t)0xcaf3, (q15_t)0x1c29, (q15_t)0xcafa,
-    (q15_t)0x1c1e, (q15_t)0xcb01, (q15_t)0x1c14, (q15_t)0xcb08, (q15_t)0x1c09, (q15_t)0xcb0f, (q15_t)0x1bff, (q15_t)0xcb16,
-    (q15_t)0x1bf5, (q15_t)0xcb1e, (q15_t)0x1bea, (q15_t)0xcb25, (q15_t)0x1be0, (q15_t)0xcb2c, (q15_t)0x1bd5, (q15_t)0xcb33,
-    (q15_t)0x1bcb, (q15_t)0xcb3a, (q15_t)0x1bc1, (q15_t)0xcb41, (q15_t)0x1bb6, (q15_t)0xcb48, (q15_t)0x1bac, (q15_t)0xcb4f,
-    (q15_t)0x1ba2, (q15_t)0xcb56, (q15_t)0x1b97, (q15_t)0xcb5e, (q15_t)0x1b8d, (q15_t)0xcb65, (q15_t)0x1b83, (q15_t)0xcb6c,
-    (q15_t)0x1b78, (q15_t)0xcb73, (q15_t)0x1b6e, (q15_t)0xcb7a, (q15_t)0x1b64, (q15_t)0xcb81, (q15_t)0x1b59, (q15_t)0xcb89,
-    (q15_t)0x1b4f, (q15_t)0xcb90, (q15_t)0x1b45, (q15_t)0xcb97, (q15_t)0x1b3b, (q15_t)0xcb9e, (q15_t)0x1b30, (q15_t)0xcba5,
-    (q15_t)0x1b26, (q15_t)0xcbad, (q15_t)0x1b1c, (q15_t)0xcbb4, (q15_t)0x1b11, (q15_t)0xcbbb, (q15_t)0x1b07, (q15_t)0xcbc2,
-    (q15_t)0x1afd, (q15_t)0xcbca, (q15_t)0x1af3, (q15_t)0xcbd1, (q15_t)0x1ae8, (q15_t)0xcbd8, (q15_t)0x1ade, (q15_t)0xcbe0,
-    (q15_t)0x1ad4, (q15_t)0xcbe7, (q15_t)0x1aca, (q15_t)0xcbee, (q15_t)0x1abf, (q15_t)0xcbf5, (q15_t)0x1ab5, (q15_t)0xcbfd,
-    (q15_t)0x1aab, (q15_t)0xcc04, (q15_t)0x1aa1, (q15_t)0xcc0b, (q15_t)0x1a97, (q15_t)0xcc13, (q15_t)0x1a8c, (q15_t)0xcc1a,
-    (q15_t)0x1a82, (q15_t)0xcc21, (q15_t)0x1a78, (q15_t)0xcc29, (q15_t)0x1a6e, (q15_t)0xcc30, (q15_t)0x1a64, (q15_t)0xcc38,
-    (q15_t)0x1a5a, (q15_t)0xcc3f, (q15_t)0x1a4f, (q15_t)0xcc46, (q15_t)0x1a45, (q15_t)0xcc4e, (q15_t)0x1a3b, (q15_t)0xcc55,
-    (q15_t)0x1a31, (q15_t)0xcc5d, (q15_t)0x1a27, (q15_t)0xcc64, (q15_t)0x1a1d, (q15_t)0xcc6b, (q15_t)0x1a13, (q15_t)0xcc73,
-    (q15_t)0x1a08, (q15_t)0xcc7a, (q15_t)0x19fe, (q15_t)0xcc82, (q15_t)0x19f4, (q15_t)0xcc89, (q15_t)0x19ea, (q15_t)0xcc91,
-    (q15_t)0x19e0, (q15_t)0xcc98, (q15_t)0x19d6, (q15_t)0xcca0, (q15_t)0x19cc, (q15_t)0xcca7, (q15_t)0x19c2, (q15_t)0xccaf,
-    (q15_t)0x19b8, (q15_t)0xccb6, (q15_t)0x19ae, (q15_t)0xccbe, (q15_t)0x19a4, (q15_t)0xccc5, (q15_t)0x199a, (q15_t)0xcccd,
-    (q15_t)0x198f, (q15_t)0xccd4, (q15_t)0x1985, (q15_t)0xccdc, (q15_t)0x197b, (q15_t)0xcce3, (q15_t)0x1971, (q15_t)0xcceb,
-    (q15_t)0x1967, (q15_t)0xccf3, (q15_t)0x195d, (q15_t)0xccfa, (q15_t)0x1953, (q15_t)0xcd02, (q15_t)0x1949, (q15_t)0xcd09,
-    (q15_t)0x193f, (q15_t)0xcd11, (q15_t)0x1935, (q15_t)0xcd19, (q15_t)0x192b, (q15_t)0xcd20, (q15_t)0x1921, (q15_t)0xcd28,
-    (q15_t)0x1917, (q15_t)0xcd30, (q15_t)0x190d, (q15_t)0xcd37, (q15_t)0x1903, (q15_t)0xcd3f, (q15_t)0x18f9, (q15_t)0xcd46,
-    (q15_t)0x18ef, (q15_t)0xcd4e, (q15_t)0x18e6, (q15_t)0xcd56, (q15_t)0x18dc, (q15_t)0xcd5d, (q15_t)0x18d2, (q15_t)0xcd65,
-    (q15_t)0x18c8, (q15_t)0xcd6d, (q15_t)0x18be, (q15_t)0xcd75, (q15_t)0x18b4, (q15_t)0xcd7c, (q15_t)0x18aa, (q15_t)0xcd84,
-    (q15_t)0x18a0, (q15_t)0xcd8c, (q15_t)0x1896, (q15_t)0xcd93, (q15_t)0x188c, (q15_t)0xcd9b, (q15_t)0x1882, (q15_t)0xcda3,
-    (q15_t)0x1878, (q15_t)0xcdab, (q15_t)0x186f, (q15_t)0xcdb2, (q15_t)0x1865, (q15_t)0xcdba, (q15_t)0x185b, (q15_t)0xcdc2,
-    (q15_t)0x1851, (q15_t)0xcdca, (q15_t)0x1847, (q15_t)0xcdd2, (q15_t)0x183d, (q15_t)0xcdd9, (q15_t)0x1833, (q15_t)0xcde1,
-    (q15_t)0x182a, (q15_t)0xcde9, (q15_t)0x1820, (q15_t)0xcdf1, (q15_t)0x1816, (q15_t)0xcdf9, (q15_t)0x180c, (q15_t)0xce01,
-    (q15_t)0x1802, (q15_t)0xce08, (q15_t)0x17f8, (q15_t)0xce10, (q15_t)0x17ef, (q15_t)0xce18, (q15_t)0x17e5, (q15_t)0xce20,
-    (q15_t)0x17db, (q15_t)0xce28, (q15_t)0x17d1, (q15_t)0xce30, (q15_t)0x17c8, (q15_t)0xce38, (q15_t)0x17be, (q15_t)0xce40,
-    (q15_t)0x17b4, (q15_t)0xce47, (q15_t)0x17aa, (q15_t)0xce4f, (q15_t)0x17a0, (q15_t)0xce57, (q15_t)0x1797, (q15_t)0xce5f,
-    (q15_t)0x178d, (q15_t)0xce67, (q15_t)0x1783, (q15_t)0xce6f, (q15_t)0x177a, (q15_t)0xce77, (q15_t)0x1770, (q15_t)0xce7f,
-    (q15_t)0x1766, (q15_t)0xce87, (q15_t)0x175c, (q15_t)0xce8f, (q15_t)0x1753, (q15_t)0xce97, (q15_t)0x1749, (q15_t)0xce9f,
-    (q15_t)0x173f, (q15_t)0xcea7, (q15_t)0x1736, (q15_t)0xceaf, (q15_t)0x172c, (q15_t)0xceb7, (q15_t)0x1722, (q15_t)0xcebf,
-    (q15_t)0x1719, (q15_t)0xcec7, (q15_t)0x170f, (q15_t)0xcecf, (q15_t)0x1705, (q15_t)0xced7, (q15_t)0x16fc, (q15_t)0xcedf,
-    (q15_t)0x16f2, (q15_t)0xcee7, (q15_t)0x16e8, (q15_t)0xceef, (q15_t)0x16df, (q15_t)0xcef7, (q15_t)0x16d5, (q15_t)0xceff,
-    (q15_t)0x16cb, (q15_t)0xcf07, (q15_t)0x16c2, (q15_t)0xcf10, (q15_t)0x16b8, (q15_t)0xcf18, (q15_t)0x16af, (q15_t)0xcf20,
-    (q15_t)0x16a5, (q15_t)0xcf28, (q15_t)0x169b, (q15_t)0xcf30, (q15_t)0x1692, (q15_t)0xcf38, (q15_t)0x1688, (q15_t)0xcf40,
-    (q15_t)0x167f, (q15_t)0xcf48, (q15_t)0x1675, (q15_t)0xcf51, (q15_t)0x166c, (q15_t)0xcf59, (q15_t)0x1662, (q15_t)0xcf61,
-    (q15_t)0x1659, (q15_t)0xcf69, (q15_t)0x164f, (q15_t)0xcf71, (q15_t)0x1645, (q15_t)0xcf79, (q15_t)0x163c, (q15_t)0xcf82,
-    (q15_t)0x1632, (q15_t)0xcf8a, (q15_t)0x1629, (q15_t)0xcf92, (q15_t)0x161f, (q15_t)0xcf9a, (q15_t)0x1616, (q15_t)0xcfa3,
-    (q15_t)0x160c, (q15_t)0xcfab, (q15_t)0x1603, (q15_t)0xcfb3, (q15_t)0x15f9, (q15_t)0xcfbb, (q15_t)0x15f0, (q15_t)0xcfc4,
-    (q15_t)0x15e6, (q15_t)0xcfcc, (q15_t)0x15dd, (q15_t)0xcfd4, (q15_t)0x15d4, (q15_t)0xcfdc, (q15_t)0x15ca, (q15_t)0xcfe5,
-    (q15_t)0x15c1, (q15_t)0xcfed, (q15_t)0x15b7, (q15_t)0xcff5, (q15_t)0x15ae, (q15_t)0xcffe, (q15_t)0x15a4, (q15_t)0xd006,
-    (q15_t)0x159b, (q15_t)0xd00e, (q15_t)0x1592, (q15_t)0xd016, (q15_t)0x1588, (q15_t)0xd01f, (q15_t)0x157f, (q15_t)0xd027,
-    (q15_t)0x1575, (q15_t)0xd030, (q15_t)0x156c, (q15_t)0xd038, (q15_t)0x1563, (q15_t)0xd040, (q15_t)0x1559, (q15_t)0xd049,
-    (q15_t)0x1550, (q15_t)0xd051, (q15_t)0x1547, (q15_t)0xd059, (q15_t)0x153d, (q15_t)0xd062, (q15_t)0x1534, (q15_t)0xd06a,
-    (q15_t)0x152a, (q15_t)0xd073, (q15_t)0x1521, (q15_t)0xd07b, (q15_t)0x1518, (q15_t)0xd083, (q15_t)0x150e, (q15_t)0xd08c,
-    (q15_t)0x1505, (q15_t)0xd094, (q15_t)0x14fc, (q15_t)0xd09d, (q15_t)0x14f3, (q15_t)0xd0a5, (q15_t)0x14e9, (q15_t)0xd0ae,
-    (q15_t)0x14e0, (q15_t)0xd0b6, (q15_t)0x14d7, (q15_t)0xd0bf, (q15_t)0x14cd, (q15_t)0xd0c7, (q15_t)0x14c4, (q15_t)0xd0d0,
-    (q15_t)0x14bb, (q15_t)0xd0d8, (q15_t)0x14b2, (q15_t)0xd0e0, (q15_t)0x14a8, (q15_t)0xd0e9, (q15_t)0x149f, (q15_t)0xd0f2,
-    (q15_t)0x1496, (q15_t)0xd0fa, (q15_t)0x148d, (q15_t)0xd103, (q15_t)0x1483, (q15_t)0xd10b, (q15_t)0x147a, (q15_t)0xd114,
-    (q15_t)0x1471, (q15_t)0xd11c, (q15_t)0x1468, (q15_t)0xd125, (q15_t)0x145f, (q15_t)0xd12d, (q15_t)0x1455, (q15_t)0xd136,
-    (q15_t)0x144c, (q15_t)0xd13e, (q15_t)0x1443, (q15_t)0xd147, (q15_t)0x143a, (q15_t)0xd150, (q15_t)0x1431, (q15_t)0xd158,
-    (q15_t)0x1428, (q15_t)0xd161, (q15_t)0x141e, (q15_t)0xd169, (q15_t)0x1415, (q15_t)0xd172, (q15_t)0x140c, (q15_t)0xd17b,
-    (q15_t)0x1403, (q15_t)0xd183, (q15_t)0x13fa, (q15_t)0xd18c, (q15_t)0x13f1, (q15_t)0xd195, (q15_t)0x13e8, (q15_t)0xd19d,
-    (q15_t)0x13df, (q15_t)0xd1a6, (q15_t)0x13d5, (q15_t)0xd1af, (q15_t)0x13cc, (q15_t)0xd1b7, (q15_t)0x13c3, (q15_t)0xd1c0,
-    (q15_t)0x13ba, (q15_t)0xd1c9, (q15_t)0x13b1, (q15_t)0xd1d1, (q15_t)0x13a8, (q15_t)0xd1da, (q15_t)0x139f, (q15_t)0xd1e3,
-    (q15_t)0x1396, (q15_t)0xd1eb, (q15_t)0x138d, (q15_t)0xd1f4, (q15_t)0x1384, (q15_t)0xd1fd, (q15_t)0x137b, (q15_t)0xd206,
-    (q15_t)0x1372, (q15_t)0xd20e, (q15_t)0x1369, (q15_t)0xd217, (q15_t)0x1360, (q15_t)0xd220, (q15_t)0x1357, (q15_t)0xd229,
-    (q15_t)0x134e, (q15_t)0xd231, (q15_t)0x1345, (q15_t)0xd23a, (q15_t)0x133c, (q15_t)0xd243, (q15_t)0x1333, (q15_t)0xd24c,
-    (q15_t)0x132a, (q15_t)0xd255, (q15_t)0x1321, (q15_t)0xd25d, (q15_t)0x1318, (q15_t)0xd266, (q15_t)0x130f, (q15_t)0xd26f,
-    (q15_t)0x1306, (q15_t)0xd278, (q15_t)0x12fd, (q15_t)0xd281, (q15_t)0x12f4, (q15_t)0xd28a, (q15_t)0x12eb, (q15_t)0xd292,
-    (q15_t)0x12e2, (q15_t)0xd29b, (q15_t)0x12d9, (q15_t)0xd2a4, (q15_t)0x12d1, (q15_t)0xd2ad, (q15_t)0x12c8, (q15_t)0xd2b6,
-    (q15_t)0x12bf, (q15_t)0xd2bf, (q15_t)0x12b6, (q15_t)0xd2c8, (q15_t)0x12ad, (q15_t)0xd2d1, (q15_t)0x12a4, (q15_t)0xd2d9,
-    (q15_t)0x129b, (q15_t)0xd2e2, (q15_t)0x1292, (q15_t)0xd2eb, (q15_t)0x128a, (q15_t)0xd2f4, (q15_t)0x1281, (q15_t)0xd2fd,
-    (q15_t)0x1278, (q15_t)0xd306, (q15_t)0x126f, (q15_t)0xd30f, (q15_t)0x1266, (q15_t)0xd318, (q15_t)0x125d, (q15_t)0xd321,
-    (q15_t)0x1255, (q15_t)0xd32a, (q15_t)0x124c, (q15_t)0xd333, (q15_t)0x1243, (q15_t)0xd33c, (q15_t)0x123a, (q15_t)0xd345,
-    (q15_t)0x1231, (q15_t)0xd34e, (q15_t)0x1229, (q15_t)0xd357, (q15_t)0x1220, (q15_t)0xd360, (q15_t)0x1217, (q15_t)0xd369,
-    (q15_t)0x120e, (q15_t)0xd372, (q15_t)0x1206, (q15_t)0xd37b, (q15_t)0x11fd, (q15_t)0xd384, (q15_t)0x11f4, (q15_t)0xd38d,
-    (q15_t)0x11eb, (q15_t)0xd396, (q15_t)0x11e3, (q15_t)0xd39f, (q15_t)0x11da, (q15_t)0xd3a8, (q15_t)0x11d1, (q15_t)0xd3b1,
-    (q15_t)0x11c9, (q15_t)0xd3ba, (q15_t)0x11c0, (q15_t)0xd3c3, (q15_t)0x11b7, (q15_t)0xd3cc, (q15_t)0x11af, (q15_t)0xd3d5,
-    (q15_t)0x11a6, (q15_t)0xd3df, (q15_t)0x119d, (q15_t)0xd3e8, (q15_t)0x1195, (q15_t)0xd3f1, (q15_t)0x118c, (q15_t)0xd3fa,
-    (q15_t)0x1183, (q15_t)0xd403, (q15_t)0x117b, (q15_t)0xd40c, (q15_t)0x1172, (q15_t)0xd415, (q15_t)0x1169, (q15_t)0xd41e,
-    (q15_t)0x1161, (q15_t)0xd428, (q15_t)0x1158, (q15_t)0xd431, (q15_t)0x1150, (q15_t)0xd43a, (q15_t)0x1147, (q15_t)0xd443,
-    (q15_t)0x113e, (q15_t)0xd44c, (q15_t)0x1136, (q15_t)0xd455, (q15_t)0x112d, (q15_t)0xd45f, (q15_t)0x1125, (q15_t)0xd468,
-    (q15_t)0x111c, (q15_t)0xd471, (q15_t)0x1114, (q15_t)0xd47a, (q15_t)0x110b, (q15_t)0xd483, (q15_t)0x1103, (q15_t)0xd48d,
-    (q15_t)0x10fa, (q15_t)0xd496, (q15_t)0x10f2, (q15_t)0xd49f, (q15_t)0x10e9, (q15_t)0xd4a8, (q15_t)0x10e0, (q15_t)0xd4b2,
-    (q15_t)0x10d8, (q15_t)0xd4bb, (q15_t)0x10d0, (q15_t)0xd4c4, (q15_t)0x10c7, (q15_t)0xd4cd, (q15_t)0x10bf, (q15_t)0xd4d7,
-    (q15_t)0x10b6, (q15_t)0xd4e0, (q15_t)0x10ae, (q15_t)0xd4e9, (q15_t)0x10a5, (q15_t)0xd4f3, (q15_t)0x109d, (q15_t)0xd4fc,
-    (q15_t)0x1094, (q15_t)0xd505, (q15_t)0x108c, (q15_t)0xd50e, (q15_t)0x1083, (q15_t)0xd518, (q15_t)0x107b, (q15_t)0xd521,
-    (q15_t)0x1073, (q15_t)0xd52a, (q15_t)0x106a, (q15_t)0xd534, (q15_t)0x1062, (q15_t)0xd53d, (q15_t)0x1059, (q15_t)0xd547,
-    (q15_t)0x1051, (q15_t)0xd550, (q15_t)0x1049, (q15_t)0xd559, (q15_t)0x1040, (q15_t)0xd563, (q15_t)0x1038, (q15_t)0xd56c,
-    (q15_t)0x1030, (q15_t)0xd575, (q15_t)0x1027, (q15_t)0xd57f, (q15_t)0x101f, (q15_t)0xd588, (q15_t)0x1016, (q15_t)0xd592,
-    (q15_t)0x100e, (q15_t)0xd59b, (q15_t)0x1006, (q15_t)0xd5a4, (q15_t)0xffe, (q15_t)0xd5ae, (q15_t)0xff5, (q15_t)0xd5b7,
-    (q15_t)0xfed, (q15_t)0xd5c1, (q15_t)0xfe5, (q15_t)0xd5ca, (q15_t)0xfdc, (q15_t)0xd5d4, (q15_t)0xfd4, (q15_t)0xd5dd,
-    (q15_t)0xfcc, (q15_t)0xd5e6, (q15_t)0xfc4, (q15_t)0xd5f0, (q15_t)0xfbb, (q15_t)0xd5f9, (q15_t)0xfb3, (q15_t)0xd603,
-    (q15_t)0xfab, (q15_t)0xd60c, (q15_t)0xfa3, (q15_t)0xd616, (q15_t)0xf9a, (q15_t)0xd61f, (q15_t)0xf92, (q15_t)0xd629,
-    (q15_t)0xf8a, (q15_t)0xd632, (q15_t)0xf82, (q15_t)0xd63c, (q15_t)0xf79, (q15_t)0xd645, (q15_t)0xf71, (q15_t)0xd64f,
-    (q15_t)0xf69, (q15_t)0xd659, (q15_t)0xf61, (q15_t)0xd662, (q15_t)0xf59, (q15_t)0xd66c, (q15_t)0xf51, (q15_t)0xd675,
-    (q15_t)0xf48, (q15_t)0xd67f, (q15_t)0xf40, (q15_t)0xd688, (q15_t)0xf38, (q15_t)0xd692, (q15_t)0xf30, (q15_t)0xd69b,
-    (q15_t)0xf28, (q15_t)0xd6a5, (q15_t)0xf20, (q15_t)0xd6af, (q15_t)0xf18, (q15_t)0xd6b8, (q15_t)0xf10, (q15_t)0xd6c2,
-    (q15_t)0xf07, (q15_t)0xd6cb, (q15_t)0xeff, (q15_t)0xd6d5, (q15_t)0xef7, (q15_t)0xd6df, (q15_t)0xeef, (q15_t)0xd6e8,
-    (q15_t)0xee7, (q15_t)0xd6f2, (q15_t)0xedf, (q15_t)0xd6fc, (q15_t)0xed7, (q15_t)0xd705, (q15_t)0xecf, (q15_t)0xd70f,
-    (q15_t)0xec7, (q15_t)0xd719, (q15_t)0xebf, (q15_t)0xd722, (q15_t)0xeb7, (q15_t)0xd72c, (q15_t)0xeaf, (q15_t)0xd736,
-    (q15_t)0xea7, (q15_t)0xd73f, (q15_t)0xe9f, (q15_t)0xd749, (q15_t)0xe97, (q15_t)0xd753, (q15_t)0xe8f, (q15_t)0xd75c,
-    (q15_t)0xe87, (q15_t)0xd766, (q15_t)0xe7f, (q15_t)0xd770, (q15_t)0xe77, (q15_t)0xd77a, (q15_t)0xe6f, (q15_t)0xd783,
-    (q15_t)0xe67, (q15_t)0xd78d, (q15_t)0xe5f, (q15_t)0xd797, (q15_t)0xe57, (q15_t)0xd7a0, (q15_t)0xe4f, (q15_t)0xd7aa,
-    (q15_t)0xe47, (q15_t)0xd7b4, (q15_t)0xe40, (q15_t)0xd7be, (q15_t)0xe38, (q15_t)0xd7c8, (q15_t)0xe30, (q15_t)0xd7d1,
-    (q15_t)0xe28, (q15_t)0xd7db, (q15_t)0xe20, (q15_t)0xd7e5, (q15_t)0xe18, (q15_t)0xd7ef, (q15_t)0xe10, (q15_t)0xd7f8,
-    (q15_t)0xe08, (q15_t)0xd802, (q15_t)0xe01, (q15_t)0xd80c, (q15_t)0xdf9, (q15_t)0xd816, (q15_t)0xdf1, (q15_t)0xd820,
-    (q15_t)0xde9, (q15_t)0xd82a, (q15_t)0xde1, (q15_t)0xd833, (q15_t)0xdd9, (q15_t)0xd83d, (q15_t)0xdd2, (q15_t)0xd847,
-    (q15_t)0xdca, (q15_t)0xd851, (q15_t)0xdc2, (q15_t)0xd85b, (q15_t)0xdba, (q15_t)0xd865, (q15_t)0xdb2, (q15_t)0xd86f,
-    (q15_t)0xdab, (q15_t)0xd878, (q15_t)0xda3, (q15_t)0xd882, (q15_t)0xd9b, (q15_t)0xd88c, (q15_t)0xd93, (q15_t)0xd896,
-    (q15_t)0xd8c, (q15_t)0xd8a0, (q15_t)0xd84, (q15_t)0xd8aa, (q15_t)0xd7c, (q15_t)0xd8b4, (q15_t)0xd75, (q15_t)0xd8be,
-    (q15_t)0xd6d, (q15_t)0xd8c8, (q15_t)0xd65, (q15_t)0xd8d2, (q15_t)0xd5d, (q15_t)0xd8dc, (q15_t)0xd56, (q15_t)0xd8e6,
-    (q15_t)0xd4e, (q15_t)0xd8ef, (q15_t)0xd46, (q15_t)0xd8f9, (q15_t)0xd3f, (q15_t)0xd903, (q15_t)0xd37, (q15_t)0xd90d,
-    (q15_t)0xd30, (q15_t)0xd917, (q15_t)0xd28, (q15_t)0xd921, (q15_t)0xd20, (q15_t)0xd92b, (q15_t)0xd19, (q15_t)0xd935,
-    (q15_t)0xd11, (q15_t)0xd93f, (q15_t)0xd09, (q15_t)0xd949, (q15_t)0xd02, (q15_t)0xd953, (q15_t)0xcfa, (q15_t)0xd95d,
-    (q15_t)0xcf3, (q15_t)0xd967, (q15_t)0xceb, (q15_t)0xd971, (q15_t)0xce3, (q15_t)0xd97b, (q15_t)0xcdc, (q15_t)0xd985,
-    (q15_t)0xcd4, (q15_t)0xd98f, (q15_t)0xccd, (q15_t)0xd99a, (q15_t)0xcc5, (q15_t)0xd9a4, (q15_t)0xcbe, (q15_t)0xd9ae,
-    (q15_t)0xcb6, (q15_t)0xd9b8, (q15_t)0xcaf, (q15_t)0xd9c2, (q15_t)0xca7, (q15_t)0xd9cc, (q15_t)0xca0, (q15_t)0xd9d6,
-    (q15_t)0xc98, (q15_t)0xd9e0, (q15_t)0xc91, (q15_t)0xd9ea, (q15_t)0xc89, (q15_t)0xd9f4, (q15_t)0xc82, (q15_t)0xd9fe,
-    (q15_t)0xc7a, (q15_t)0xda08, (q15_t)0xc73, (q15_t)0xda13, (q15_t)0xc6b, (q15_t)0xda1d, (q15_t)0xc64, (q15_t)0xda27,
-    (q15_t)0xc5d, (q15_t)0xda31, (q15_t)0xc55, (q15_t)0xda3b, (q15_t)0xc4e, (q15_t)0xda45, (q15_t)0xc46, (q15_t)0xda4f,
-    (q15_t)0xc3f, (q15_t)0xda5a, (q15_t)0xc38, (q15_t)0xda64, (q15_t)0xc30, (q15_t)0xda6e, (q15_t)0xc29, (q15_t)0xda78,
-    (q15_t)0xc21, (q15_t)0xda82, (q15_t)0xc1a, (q15_t)0xda8c, (q15_t)0xc13, (q15_t)0xda97, (q15_t)0xc0b, (q15_t)0xdaa1,
-    (q15_t)0xc04, (q15_t)0xdaab, (q15_t)0xbfd, (q15_t)0xdab5, (q15_t)0xbf5, (q15_t)0xdabf, (q15_t)0xbee, (q15_t)0xdaca,
-    (q15_t)0xbe7, (q15_t)0xdad4, (q15_t)0xbe0, (q15_t)0xdade, (q15_t)0xbd8, (q15_t)0xdae8, (q15_t)0xbd1, (q15_t)0xdaf3,
-    (q15_t)0xbca, (q15_t)0xdafd, (q15_t)0xbc2, (q15_t)0xdb07, (q15_t)0xbbb, (q15_t)0xdb11, (q15_t)0xbb4, (q15_t)0xdb1c,
-    (q15_t)0xbad, (q15_t)0xdb26, (q15_t)0xba5, (q15_t)0xdb30, (q15_t)0xb9e, (q15_t)0xdb3b, (q15_t)0xb97, (q15_t)0xdb45,
-    (q15_t)0xb90, (q15_t)0xdb4f, (q15_t)0xb89, (q15_t)0xdb59, (q15_t)0xb81, (q15_t)0xdb64, (q15_t)0xb7a, (q15_t)0xdb6e,
-    (q15_t)0xb73, (q15_t)0xdb78, (q15_t)0xb6c, (q15_t)0xdb83, (q15_t)0xb65, (q15_t)0xdb8d, (q15_t)0xb5e, (q15_t)0xdb97,
-    (q15_t)0xb56, (q15_t)0xdba2, (q15_t)0xb4f, (q15_t)0xdbac, (q15_t)0xb48, (q15_t)0xdbb6, (q15_t)0xb41, (q15_t)0xdbc1,
-    (q15_t)0xb3a, (q15_t)0xdbcb, (q15_t)0xb33, (q15_t)0xdbd5, (q15_t)0xb2c, (q15_t)0xdbe0, (q15_t)0xb25, (q15_t)0xdbea,
-    (q15_t)0xb1e, (q15_t)0xdbf5, (q15_t)0xb16, (q15_t)0xdbff, (q15_t)0xb0f, (q15_t)0xdc09, (q15_t)0xb08, (q15_t)0xdc14,
-    (q15_t)0xb01, (q15_t)0xdc1e, (q15_t)0xafa, (q15_t)0xdc29, (q15_t)0xaf3, (q15_t)0xdc33, (q15_t)0xaec, (q15_t)0xdc3d,
-    (q15_t)0xae5, (q15_t)0xdc48, (q15_t)0xade, (q15_t)0xdc52, (q15_t)0xad7, (q15_t)0xdc5d, (q15_t)0xad0, (q15_t)0xdc67,
-    (q15_t)0xac9, (q15_t)0xdc72, (q15_t)0xac2, (q15_t)0xdc7c, (q15_t)0xabb, (q15_t)0xdc86, (q15_t)0xab4, (q15_t)0xdc91,
-    (q15_t)0xaad, (q15_t)0xdc9b, (q15_t)0xaa6, (q15_t)0xdca6, (q15_t)0xa9f, (q15_t)0xdcb0, (q15_t)0xa99, (q15_t)0xdcbb,
-    (q15_t)0xa92, (q15_t)0xdcc5, (q15_t)0xa8b, (q15_t)0xdcd0, (q15_t)0xa84, (q15_t)0xdcda, (q15_t)0xa7d, (q15_t)0xdce5,
-    (q15_t)0xa76, (q15_t)0xdcef, (q15_t)0xa6f, (q15_t)0xdcfa, (q15_t)0xa68, (q15_t)0xdd04, (q15_t)0xa61, (q15_t)0xdd0f,
-    (q15_t)0xa5b, (q15_t)0xdd19, (q15_t)0xa54, (q15_t)0xdd24, (q15_t)0xa4d, (q15_t)0xdd2e, (q15_t)0xa46, (q15_t)0xdd39,
-    (q15_t)0xa3f, (q15_t)0xdd44, (q15_t)0xa38, (q15_t)0xdd4e, (q15_t)0xa32, (q15_t)0xdd59, (q15_t)0xa2b, (q15_t)0xdd63,
-    (q15_t)0xa24, (q15_t)0xdd6e, (q15_t)0xa1d, (q15_t)0xdd78, (q15_t)0xa16, (q15_t)0xdd83, (q15_t)0xa10, (q15_t)0xdd8e,
-    (q15_t)0xa09, (q15_t)0xdd98, (q15_t)0xa02, (q15_t)0xdda3, (q15_t)0x9fb, (q15_t)0xddad, (q15_t)0x9f5, (q15_t)0xddb8,
-    (q15_t)0x9ee, (q15_t)0xddc3, (q15_t)0x9e7, (q15_t)0xddcd, (q15_t)0x9e0, (q15_t)0xddd8, (q15_t)0x9da, (q15_t)0xdde2,
-    (q15_t)0x9d3, (q15_t)0xdded, (q15_t)0x9cc, (q15_t)0xddf8, (q15_t)0x9c6, (q15_t)0xde02, (q15_t)0x9bf, (q15_t)0xde0d,
-    (q15_t)0x9b8, (q15_t)0xde18, (q15_t)0x9b2, (q15_t)0xde22, (q15_t)0x9ab, (q15_t)0xde2d, (q15_t)0x9a4, (q15_t)0xde38,
-    (q15_t)0x99e, (q15_t)0xde42, (q15_t)0x997, (q15_t)0xde4d, (q15_t)0x991, (q15_t)0xde58, (q15_t)0x98a, (q15_t)0xde62,
-    (q15_t)0x983, (q15_t)0xde6d, (q15_t)0x97d, (q15_t)0xde78, (q15_t)0x976, (q15_t)0xde83, (q15_t)0x970, (q15_t)0xde8d,
-    (q15_t)0x969, (q15_t)0xde98, (q15_t)0x963, (q15_t)0xdea3, (q15_t)0x95c, (q15_t)0xdead, (q15_t)0x955, (q15_t)0xdeb8,
-    (q15_t)0x94f, (q15_t)0xdec3, (q15_t)0x948, (q15_t)0xdece, (q15_t)0x942, (q15_t)0xded8, (q15_t)0x93b, (q15_t)0xdee3,
-    (q15_t)0x935, (q15_t)0xdeee, (q15_t)0x92e, (q15_t)0xdef9, (q15_t)0x928, (q15_t)0xdf03, (q15_t)0x921, (q15_t)0xdf0e,
-    (q15_t)0x91b, (q15_t)0xdf19, (q15_t)0x915, (q15_t)0xdf24, (q15_t)0x90e, (q15_t)0xdf2f, (q15_t)0x908, (q15_t)0xdf39,
-    (q15_t)0x901, (q15_t)0xdf44, (q15_t)0x8fb, (q15_t)0xdf4f, (q15_t)0x8f4, (q15_t)0xdf5a, (q15_t)0x8ee, (q15_t)0xdf65,
-    (q15_t)0x8e8, (q15_t)0xdf6f, (q15_t)0x8e1, (q15_t)0xdf7a, (q15_t)0x8db, (q15_t)0xdf85, (q15_t)0x8d4, (q15_t)0xdf90,
-    (q15_t)0x8ce, (q15_t)0xdf9b, (q15_t)0x8c8, (q15_t)0xdfa5, (q15_t)0x8c1, (q15_t)0xdfb0, (q15_t)0x8bb, (q15_t)0xdfbb,
-    (q15_t)0x8b5, (q15_t)0xdfc6, (q15_t)0x8ae, (q15_t)0xdfd1, (q15_t)0x8a8, (q15_t)0xdfdc, (q15_t)0x8a2, (q15_t)0xdfe7,
-    (q15_t)0x89b, (q15_t)0xdff1, (q15_t)0x895, (q15_t)0xdffc, (q15_t)0x88f, (q15_t)0xe007, (q15_t)0x889, (q15_t)0xe012,
-    (q15_t)0x882, (q15_t)0xe01d, (q15_t)0x87c, (q15_t)0xe028, (q15_t)0x876, (q15_t)0xe033, (q15_t)0x870, (q15_t)0xe03e,
-    (q15_t)0x869, (q15_t)0xe049, (q15_t)0x863, (q15_t)0xe054, (q15_t)0x85d, (q15_t)0xe05e, (q15_t)0x857, (q15_t)0xe069,
-    (q15_t)0x850, (q15_t)0xe074, (q15_t)0x84a, (q15_t)0xe07f, (q15_t)0x844, (q15_t)0xe08a, (q15_t)0x83e, (q15_t)0xe095,
-    (q15_t)0x838, (q15_t)0xe0a0, (q15_t)0x832, (q15_t)0xe0ab, (q15_t)0x82b, (q15_t)0xe0b6, (q15_t)0x825, (q15_t)0xe0c1,
-    (q15_t)0x81f, (q15_t)0xe0cc, (q15_t)0x819, (q15_t)0xe0d7, (q15_t)0x813, (q15_t)0xe0e2, (q15_t)0x80d, (q15_t)0xe0ed,
-    (q15_t)0x807, (q15_t)0xe0f8, (q15_t)0x801, (q15_t)0xe103, (q15_t)0x7fb, (q15_t)0xe10e, (q15_t)0x7f5, (q15_t)0xe119,
-    (q15_t)0x7ee, (q15_t)0xe124, (q15_t)0x7e8, (q15_t)0xe12f, (q15_t)0x7e2, (q15_t)0xe13a, (q15_t)0x7dc, (q15_t)0xe145,
-    (q15_t)0x7d6, (q15_t)0xe150, (q15_t)0x7d0, (q15_t)0xe15b, (q15_t)0x7ca, (q15_t)0xe166, (q15_t)0x7c4, (q15_t)0xe171,
-    (q15_t)0x7be, (q15_t)0xe17c, (q15_t)0x7b8, (q15_t)0xe187, (q15_t)0x7b2, (q15_t)0xe192, (q15_t)0x7ac, (q15_t)0xe19d,
-    (q15_t)0x7a6, (q15_t)0xe1a8, (q15_t)0x7a0, (q15_t)0xe1b3, (q15_t)0x79a, (q15_t)0xe1be, (q15_t)0x795, (q15_t)0xe1ca,
-    (q15_t)0x78f, (q15_t)0xe1d5, (q15_t)0x789, (q15_t)0xe1e0, (q15_t)0x783, (q15_t)0xe1eb, (q15_t)0x77d, (q15_t)0xe1f6,
-    (q15_t)0x777, (q15_t)0xe201, (q15_t)0x771, (q15_t)0xe20c, (q15_t)0x76b, (q15_t)0xe217, (q15_t)0x765, (q15_t)0xe222,
-    (q15_t)0x75f, (q15_t)0xe22d, (q15_t)0x75a, (q15_t)0xe239, (q15_t)0x754, (q15_t)0xe244, (q15_t)0x74e, (q15_t)0xe24f,
-    (q15_t)0x748, (q15_t)0xe25a, (q15_t)0x742, (q15_t)0xe265, (q15_t)0x73d, (q15_t)0xe270, (q15_t)0x737, (q15_t)0xe27b,
-    (q15_t)0x731, (q15_t)0xe287, (q15_t)0x72b, (q15_t)0xe292, (q15_t)0x725, (q15_t)0xe29d, (q15_t)0x720, (q15_t)0xe2a8,
-    (q15_t)0x71a, (q15_t)0xe2b3, (q15_t)0x714, (q15_t)0xe2be, (q15_t)0x70e, (q15_t)0xe2ca, (q15_t)0x709, (q15_t)0xe2d5,
-    (q15_t)0x703, (q15_t)0xe2e0, (q15_t)0x6fd, (q15_t)0xe2eb, (q15_t)0x6f7, (q15_t)0xe2f6, (q15_t)0x6f2, (q15_t)0xe301,
-    (q15_t)0x6ec, (q15_t)0xe30d, (q15_t)0x6e6, (q15_t)0xe318, (q15_t)0x6e1, (q15_t)0xe323, (q15_t)0x6db, (q15_t)0xe32e,
-    (q15_t)0x6d5, (q15_t)0xe33a, (q15_t)0x6d0, (q15_t)0xe345, (q15_t)0x6ca, (q15_t)0xe350, (q15_t)0x6c5, (q15_t)0xe35b,
-    (q15_t)0x6bf, (q15_t)0xe367, (q15_t)0x6b9, (q15_t)0xe372, (q15_t)0x6b4, (q15_t)0xe37d, (q15_t)0x6ae, (q15_t)0xe388,
-    (q15_t)0x6a8, (q15_t)0xe394, (q15_t)0x6a3, (q15_t)0xe39f, (q15_t)0x69d, (q15_t)0xe3aa, (q15_t)0x698, (q15_t)0xe3b5,
-    (q15_t)0x692, (q15_t)0xe3c1, (q15_t)0x68d, (q15_t)0xe3cc, (q15_t)0x687, (q15_t)0xe3d7, (q15_t)0x682, (q15_t)0xe3e2,
-    (q15_t)0x67c, (q15_t)0xe3ee, (q15_t)0x677, (q15_t)0xe3f9, (q15_t)0x671, (q15_t)0xe404, (q15_t)0x66c, (q15_t)0xe410,
-    (q15_t)0x666, (q15_t)0xe41b, (q15_t)0x661, (q15_t)0xe426, (q15_t)0x65b, (q15_t)0xe432, (q15_t)0x656, (q15_t)0xe43d,
-    (q15_t)0x650, (q15_t)0xe448, (q15_t)0x64b, (q15_t)0xe454, (q15_t)0x645, (q15_t)0xe45f, (q15_t)0x640, (q15_t)0xe46a,
-    (q15_t)0x63b, (q15_t)0xe476, (q15_t)0x635, (q15_t)0xe481, (q15_t)0x630, (q15_t)0xe48c, (q15_t)0x62a, (q15_t)0xe498,
-    (q15_t)0x625, (q15_t)0xe4a3, (q15_t)0x620, (q15_t)0xe4ae, (q15_t)0x61a, (q15_t)0xe4ba, (q15_t)0x615, (q15_t)0xe4c5,
-    (q15_t)0x610, (q15_t)0xe4d0, (q15_t)0x60a, (q15_t)0xe4dc, (q15_t)0x605, (q15_t)0xe4e7, (q15_t)0x600, (q15_t)0xe4f3,
-    (q15_t)0x5fa, (q15_t)0xe4fe, (q15_t)0x5f5, (q15_t)0xe509, (q15_t)0x5f0, (q15_t)0xe515, (q15_t)0x5ea, (q15_t)0xe520,
-    (q15_t)0x5e5, (q15_t)0xe52c, (q15_t)0x5e0, (q15_t)0xe537, (q15_t)0x5db, (q15_t)0xe542, (q15_t)0x5d5, (q15_t)0xe54e,
-    (q15_t)0x5d0, (q15_t)0xe559, (q15_t)0x5cb, (q15_t)0xe565, (q15_t)0x5c6, (q15_t)0xe570, (q15_t)0x5c1, (q15_t)0xe57c,
-    (q15_t)0x5bb, (q15_t)0xe587, (q15_t)0x5b6, (q15_t)0xe592, (q15_t)0x5b1, (q15_t)0xe59e, (q15_t)0x5ac, (q15_t)0xe5a9,
-    (q15_t)0x5a7, (q15_t)0xe5b5, (q15_t)0x5a1, (q15_t)0xe5c0, (q15_t)0x59c, (q15_t)0xe5cc, (q15_t)0x597, (q15_t)0xe5d7,
-    (q15_t)0x592, (q15_t)0xe5e3, (q15_t)0x58d, (q15_t)0xe5ee, (q15_t)0x588, (q15_t)0xe5fa, (q15_t)0x583, (q15_t)0xe605,
-    (q15_t)0x57e, (q15_t)0xe611, (q15_t)0x578, (q15_t)0xe61c, (q15_t)0x573, (q15_t)0xe628, (q15_t)0x56e, (q15_t)0xe633,
-    (q15_t)0x569, (q15_t)0xe63f, (q15_t)0x564, (q15_t)0xe64a, (q15_t)0x55f, (q15_t)0xe656, (q15_t)0x55a, (q15_t)0xe661,
-    (q15_t)0x555, (q15_t)0xe66d, (q15_t)0x550, (q15_t)0xe678, (q15_t)0x54b, (q15_t)0xe684, (q15_t)0x546, (q15_t)0xe68f,
-    (q15_t)0x541, (q15_t)0xe69b, (q15_t)0x53c, (q15_t)0xe6a6, (q15_t)0x537, (q15_t)0xe6b2, (q15_t)0x532, (q15_t)0xe6bd,
-    (q15_t)0x52d, (q15_t)0xe6c9, (q15_t)0x528, (q15_t)0xe6d4, (q15_t)0x523, (q15_t)0xe6e0, (q15_t)0x51e, (q15_t)0xe6ec,
-    (q15_t)0x51a, (q15_t)0xe6f7, (q15_t)0x515, (q15_t)0xe703, (q15_t)0x510, (q15_t)0xe70e, (q15_t)0x50b, (q15_t)0xe71a,
-    (q15_t)0x506, (q15_t)0xe725, (q15_t)0x501, (q15_t)0xe731, (q15_t)0x4fc, (q15_t)0xe73d, (q15_t)0x4f7, (q15_t)0xe748,
-    (q15_t)0x4f2, (q15_t)0xe754, (q15_t)0x4ee, (q15_t)0xe75f, (q15_t)0x4e9, (q15_t)0xe76b, (q15_t)0x4e4, (q15_t)0xe777,
-    (q15_t)0x4df, (q15_t)0xe782, (q15_t)0x4da, (q15_t)0xe78e, (q15_t)0x4d6, (q15_t)0xe799, (q15_t)0x4d1, (q15_t)0xe7a5,
-    (q15_t)0x4cc, (q15_t)0xe7b1, (q15_t)0x4c7, (q15_t)0xe7bc, (q15_t)0x4c2, (q15_t)0xe7c8, (q15_t)0x4be, (q15_t)0xe7d3,
-    (q15_t)0x4b9, (q15_t)0xe7df, (q15_t)0x4b4, (q15_t)0xe7eb, (q15_t)0x4b0, (q15_t)0xe7f6, (q15_t)0x4ab, (q15_t)0xe802,
-    (q15_t)0x4a6, (q15_t)0xe80e, (q15_t)0x4a1, (q15_t)0xe819, (q15_t)0x49d, (q15_t)0xe825, (q15_t)0x498, (q15_t)0xe831,
-    (q15_t)0x493, (q15_t)0xe83c, (q15_t)0x48f, (q15_t)0xe848, (q15_t)0x48a, (q15_t)0xe854, (q15_t)0x485, (q15_t)0xe85f,
-    (q15_t)0x481, (q15_t)0xe86b, (q15_t)0x47c, (q15_t)0xe877, (q15_t)0x478, (q15_t)0xe882, (q15_t)0x473, (q15_t)0xe88e,
-    (q15_t)0x46e, (q15_t)0xe89a, (q15_t)0x46a, (q15_t)0xe8a5, (q15_t)0x465, (q15_t)0xe8b1, (q15_t)0x461, (q15_t)0xe8bd,
-    (q15_t)0x45c, (q15_t)0xe8c9, (q15_t)0x457, (q15_t)0xe8d4, (q15_t)0x453, (q15_t)0xe8e0, (q15_t)0x44e, (q15_t)0xe8ec,
-    (q15_t)0x44a, (q15_t)0xe8f7, (q15_t)0x445, (q15_t)0xe903, (q15_t)0x441, (q15_t)0xe90f, (q15_t)0x43c, (q15_t)0xe91b,
-    (q15_t)0x438, (q15_t)0xe926, (q15_t)0x433, (q15_t)0xe932, (q15_t)0x42f, (q15_t)0xe93e, (q15_t)0x42a, (q15_t)0xe94a,
-    (q15_t)0x426, (q15_t)0xe955, (q15_t)0x422, (q15_t)0xe961, (q15_t)0x41d, (q15_t)0xe96d, (q15_t)0x419, (q15_t)0xe979,
-    (q15_t)0x414, (q15_t)0xe984, (q15_t)0x410, (q15_t)0xe990, (q15_t)0x40b, (q15_t)0xe99c, (q15_t)0x407, (q15_t)0xe9a8,
-    (q15_t)0x403, (q15_t)0xe9b4, (q15_t)0x3fe, (q15_t)0xe9bf, (q15_t)0x3fa, (q15_t)0xe9cb, (q15_t)0x3f6, (q15_t)0xe9d7,
-    (q15_t)0x3f1, (q15_t)0xe9e3, (q15_t)0x3ed, (q15_t)0xe9ee, (q15_t)0x3e9, (q15_t)0xe9fa, (q15_t)0x3e4, (q15_t)0xea06,
-    (q15_t)0x3e0, (q15_t)0xea12, (q15_t)0x3dc, (q15_t)0xea1e, (q15_t)0x3d7, (q15_t)0xea29, (q15_t)0x3d3, (q15_t)0xea35,
-    (q15_t)0x3cf, (q15_t)0xea41, (q15_t)0x3ca, (q15_t)0xea4d, (q15_t)0x3c6, (q15_t)0xea59, (q15_t)0x3c2, (q15_t)0xea65,
-    (q15_t)0x3be, (q15_t)0xea70, (q15_t)0x3ba, (q15_t)0xea7c, (q15_t)0x3b5, (q15_t)0xea88, (q15_t)0x3b1, (q15_t)0xea94,
-    (q15_t)0x3ad, (q15_t)0xeaa0, (q15_t)0x3a9, (q15_t)0xeaac, (q15_t)0x3a5, (q15_t)0xeab7, (q15_t)0x3a0, (q15_t)0xeac3,
-    (q15_t)0x39c, (q15_t)0xeacf, (q15_t)0x398, (q15_t)0xeadb, (q15_t)0x394, (q15_t)0xeae7, (q15_t)0x390, (q15_t)0xeaf3,
-    (q15_t)0x38c, (q15_t)0xeaff, (q15_t)0x387, (q15_t)0xeb0a, (q15_t)0x383, (q15_t)0xeb16, (q15_t)0x37f, (q15_t)0xeb22,
-    (q15_t)0x37b, (q15_t)0xeb2e, (q15_t)0x377, (q15_t)0xeb3a, (q15_t)0x373, (q15_t)0xeb46, (q15_t)0x36f, (q15_t)0xeb52,
-    (q15_t)0x36b, (q15_t)0xeb5e, (q15_t)0x367, (q15_t)0xeb6a, (q15_t)0x363, (q15_t)0xeb75, (q15_t)0x35f, (q15_t)0xeb81,
-    (q15_t)0x35b, (q15_t)0xeb8d, (q15_t)0x357, (q15_t)0xeb99, (q15_t)0x353, (q15_t)0xeba5, (q15_t)0x34f, (q15_t)0xebb1,
-    (q15_t)0x34b, (q15_t)0xebbd, (q15_t)0x347, (q15_t)0xebc9, (q15_t)0x343, (q15_t)0xebd5, (q15_t)0x33f, (q15_t)0xebe1,
-    (q15_t)0x33b, (q15_t)0xebed, (q15_t)0x337, (q15_t)0xebf9, (q15_t)0x333, (q15_t)0xec05, (q15_t)0x32f, (q15_t)0xec10,
-    (q15_t)0x32b, (q15_t)0xec1c, (q15_t)0x327, (q15_t)0xec28, (q15_t)0x323, (q15_t)0xec34, (q15_t)0x320, (q15_t)0xec40,
-    (q15_t)0x31c, (q15_t)0xec4c, (q15_t)0x318, (q15_t)0xec58, (q15_t)0x314, (q15_t)0xec64, (q15_t)0x310, (q15_t)0xec70,
-    (q15_t)0x30c, (q15_t)0xec7c, (q15_t)0x308, (q15_t)0xec88, (q15_t)0x305, (q15_t)0xec94, (q15_t)0x301, (q15_t)0xeca0,
-    (q15_t)0x2fd, (q15_t)0xecac, (q15_t)0x2f9, (q15_t)0xecb8, (q15_t)0x2f5, (q15_t)0xecc4, (q15_t)0x2f2, (q15_t)0xecd0,
-    (q15_t)0x2ee, (q15_t)0xecdc, (q15_t)0x2ea, (q15_t)0xece8, (q15_t)0x2e6, (q15_t)0xecf4, (q15_t)0x2e3, (q15_t)0xed00,
-    (q15_t)0x2df, (q15_t)0xed0c, (q15_t)0x2db, (q15_t)0xed18, (q15_t)0x2d8, (q15_t)0xed24, (q15_t)0x2d4, (q15_t)0xed30,
-    (q15_t)0x2d0, (q15_t)0xed3c, (q15_t)0x2cc, (q15_t)0xed48, (q15_t)0x2c9, (q15_t)0xed54, (q15_t)0x2c5, (q15_t)0xed60,
-    (q15_t)0x2c1, (q15_t)0xed6c, (q15_t)0x2be, (q15_t)0xed78, (q15_t)0x2ba, (q15_t)0xed84, (q15_t)0x2b7, (q15_t)0xed90,
-    (q15_t)0x2b3, (q15_t)0xed9c, (q15_t)0x2af, (q15_t)0xeda8, (q15_t)0x2ac, (q15_t)0xedb4, (q15_t)0x2a8, (q15_t)0xedc0,
-    (q15_t)0x2a5, (q15_t)0xedcc, (q15_t)0x2a1, (q15_t)0xedd8, (q15_t)0x29d, (q15_t)0xede4, (q15_t)0x29a, (q15_t)0xedf0,
-    (q15_t)0x296, (q15_t)0xedfc, (q15_t)0x293, (q15_t)0xee09, (q15_t)0x28f, (q15_t)0xee15, (q15_t)0x28c, (q15_t)0xee21,
-    (q15_t)0x288, (q15_t)0xee2d, (q15_t)0x285, (q15_t)0xee39, (q15_t)0x281, (q15_t)0xee45, (q15_t)0x27e, (q15_t)0xee51,
-    (q15_t)0x27a, (q15_t)0xee5d, (q15_t)0x277, (q15_t)0xee69, (q15_t)0x273, (q15_t)0xee75, (q15_t)0x270, (q15_t)0xee81,
-    (q15_t)0x26d, (q15_t)0xee8d, (q15_t)0x269, (q15_t)0xee99, (q15_t)0x266, (q15_t)0xeea6, (q15_t)0x262, (q15_t)0xeeb2,
-    (q15_t)0x25f, (q15_t)0xeebe, (q15_t)0x25c, (q15_t)0xeeca, (q15_t)0x258, (q15_t)0xeed6, (q15_t)0x255, (q15_t)0xeee2,
-    (q15_t)0x251, (q15_t)0xeeee, (q15_t)0x24e, (q15_t)0xeefa, (q15_t)0x24b, (q15_t)0xef06, (q15_t)0x247, (q15_t)0xef13,
-    (q15_t)0x244, (q15_t)0xef1f, (q15_t)0x241, (q15_t)0xef2b, (q15_t)0x23e, (q15_t)0xef37, (q15_t)0x23a, (q15_t)0xef43,
-    (q15_t)0x237, (q15_t)0xef4f, (q15_t)0x234, (q15_t)0xef5b, (q15_t)0x230, (q15_t)0xef67, (q15_t)0x22d, (q15_t)0xef74,
-    (q15_t)0x22a, (q15_t)0xef80, (q15_t)0x227, (q15_t)0xef8c, (q15_t)0x223, (q15_t)0xef98, (q15_t)0x220, (q15_t)0xefa4,
-    (q15_t)0x21d, (q15_t)0xefb0, (q15_t)0x21a, (q15_t)0xefbc, (q15_t)0x217, (q15_t)0xefc9, (q15_t)0x213, (q15_t)0xefd5,
-    (q15_t)0x210, (q15_t)0xefe1, (q15_t)0x20d, (q15_t)0xefed, (q15_t)0x20a, (q15_t)0xeff9, (q15_t)0x207, (q15_t)0xf005,
-    (q15_t)0x204, (q15_t)0xf012, (q15_t)0x201, (q15_t)0xf01e, (q15_t)0x1fd, (q15_t)0xf02a, (q15_t)0x1fa, (q15_t)0xf036,
-    (q15_t)0x1f7, (q15_t)0xf042, (q15_t)0x1f4, (q15_t)0xf04e, (q15_t)0x1f1, (q15_t)0xf05b, (q15_t)0x1ee, (q15_t)0xf067,
-    (q15_t)0x1eb, (q15_t)0xf073, (q15_t)0x1e8, (q15_t)0xf07f, (q15_t)0x1e5, (q15_t)0xf08b, (q15_t)0x1e2, (q15_t)0xf098,
-    (q15_t)0x1df, (q15_t)0xf0a4, (q15_t)0x1dc, (q15_t)0xf0b0, (q15_t)0x1d9, (q15_t)0xf0bc, (q15_t)0x1d6, (q15_t)0xf0c8,
-    (q15_t)0x1d3, (q15_t)0xf0d5, (q15_t)0x1d0, (q15_t)0xf0e1, (q15_t)0x1cd, (q15_t)0xf0ed, (q15_t)0x1ca, (q15_t)0xf0f9,
-    (q15_t)0x1c7, (q15_t)0xf105, (q15_t)0x1c4, (q15_t)0xf112, (q15_t)0x1c1, (q15_t)0xf11e, (q15_t)0x1be, (q15_t)0xf12a,
-    (q15_t)0x1bb, (q15_t)0xf136, (q15_t)0x1b8, (q15_t)0xf143, (q15_t)0x1b6, (q15_t)0xf14f, (q15_t)0x1b3, (q15_t)0xf15b,
-    (q15_t)0x1b0, (q15_t)0xf167, (q15_t)0x1ad, (q15_t)0xf174, (q15_t)0x1aa, (q15_t)0xf180, (q15_t)0x1a7, (q15_t)0xf18c,
-    (q15_t)0x1a4, (q15_t)0xf198, (q15_t)0x1a2, (q15_t)0xf1a4, (q15_t)0x19f, (q15_t)0xf1b1, (q15_t)0x19c, (q15_t)0xf1bd,
-    (q15_t)0x199, (q15_t)0xf1c9, (q15_t)0x196, (q15_t)0xf1d5, (q15_t)0x194, (q15_t)0xf1e2, (q15_t)0x191, (q15_t)0xf1ee,
-    (q15_t)0x18e, (q15_t)0xf1fa, (q15_t)0x18b, (q15_t)0xf207, (q15_t)0x189, (q15_t)0xf213, (q15_t)0x186, (q15_t)0xf21f,
-    (q15_t)0x183, (q15_t)0xf22b, (q15_t)0x180, (q15_t)0xf238, (q15_t)0x17e, (q15_t)0xf244, (q15_t)0x17b, (q15_t)0xf250,
-    (q15_t)0x178, (q15_t)0xf25c, (q15_t)0x176, (q15_t)0xf269, (q15_t)0x173, (q15_t)0xf275, (q15_t)0x170, (q15_t)0xf281,
-    (q15_t)0x16e, (q15_t)0xf28e, (q15_t)0x16b, (q15_t)0xf29a, (q15_t)0x168, (q15_t)0xf2a6, (q15_t)0x166, (q15_t)0xf2b2,
-    (q15_t)0x163, (q15_t)0xf2bf, (q15_t)0x161, (q15_t)0xf2cb, (q15_t)0x15e, (q15_t)0xf2d7, (q15_t)0x15b, (q15_t)0xf2e4,
-    (q15_t)0x159, (q15_t)0xf2f0, (q15_t)0x156, (q15_t)0xf2fc, (q15_t)0x154, (q15_t)0xf308, (q15_t)0x151, (q15_t)0xf315,
-    (q15_t)0x14f, (q15_t)0xf321, (q15_t)0x14c, (q15_t)0xf32d, (q15_t)0x14a, (q15_t)0xf33a, (q15_t)0x147, (q15_t)0xf346,
-    (q15_t)0x145, (q15_t)0xf352, (q15_t)0x142, (q15_t)0xf35f, (q15_t)0x140, (q15_t)0xf36b, (q15_t)0x13d, (q15_t)0xf377,
-    (q15_t)0x13b, (q15_t)0xf384, (q15_t)0x138, (q15_t)0xf390, (q15_t)0x136, (q15_t)0xf39c, (q15_t)0x134, (q15_t)0xf3a9,
-    (q15_t)0x131, (q15_t)0xf3b5, (q15_t)0x12f, (q15_t)0xf3c1, (q15_t)0x12c, (q15_t)0xf3ce, (q15_t)0x12a, (q15_t)0xf3da,
-    (q15_t)0x128, (q15_t)0xf3e6, (q15_t)0x125, (q15_t)0xf3f3, (q15_t)0x123, (q15_t)0xf3ff, (q15_t)0x120, (q15_t)0xf40b,
-    (q15_t)0x11e, (q15_t)0xf418, (q15_t)0x11c, (q15_t)0xf424, (q15_t)0x119, (q15_t)0xf430, (q15_t)0x117, (q15_t)0xf43d,
-    (q15_t)0x115, (q15_t)0xf449, (q15_t)0x113, (q15_t)0xf455, (q15_t)0x110, (q15_t)0xf462, (q15_t)0x10e, (q15_t)0xf46e,
-    (q15_t)0x10c, (q15_t)0xf47b, (q15_t)0x109, (q15_t)0xf487, (q15_t)0x107, (q15_t)0xf493, (q15_t)0x105, (q15_t)0xf4a0,
-    (q15_t)0x103, (q15_t)0xf4ac, (q15_t)0x100, (q15_t)0xf4b8, (q15_t)0xfe, (q15_t)0xf4c5, (q15_t)0xfc, (q15_t)0xf4d1,
-    (q15_t)0xfa, (q15_t)0xf4dd, (q15_t)0xf8, (q15_t)0xf4ea, (q15_t)0xf6, (q15_t)0xf4f6, (q15_t)0xf3, (q15_t)0xf503,
-    (q15_t)0xf1, (q15_t)0xf50f, (q15_t)0xef, (q15_t)0xf51b, (q15_t)0xed, (q15_t)0xf528, (q15_t)0xeb, (q15_t)0xf534,
-    (q15_t)0xe9, (q15_t)0xf540, (q15_t)0xe7, (q15_t)0xf54d, (q15_t)0xe4, (q15_t)0xf559, (q15_t)0xe2, (q15_t)0xf566,
-    (q15_t)0xe0, (q15_t)0xf572, (q15_t)0xde, (q15_t)0xf57e, (q15_t)0xdc, (q15_t)0xf58b, (q15_t)0xda, (q15_t)0xf597,
-    (q15_t)0xd8, (q15_t)0xf5a4, (q15_t)0xd6, (q15_t)0xf5b0, (q15_t)0xd4, (q15_t)0xf5bc, (q15_t)0xd2, (q15_t)0xf5c9,
-    (q15_t)0xd0, (q15_t)0xf5d5, (q15_t)0xce, (q15_t)0xf5e2, (q15_t)0xcc, (q15_t)0xf5ee, (q15_t)0xca, (q15_t)0xf5fa,
-    (q15_t)0xc8, (q15_t)0xf607, (q15_t)0xc6, (q15_t)0xf613, (q15_t)0xc4, (q15_t)0xf620, (q15_t)0xc2, (q15_t)0xf62c,
-    (q15_t)0xc0, (q15_t)0xf639, (q15_t)0xbe, (q15_t)0xf645, (q15_t)0xbd, (q15_t)0xf651, (q15_t)0xbb, (q15_t)0xf65e,
-    (q15_t)0xb9, (q15_t)0xf66a, (q15_t)0xb7, (q15_t)0xf677, (q15_t)0xb5, (q15_t)0xf683, (q15_t)0xb3, (q15_t)0xf690,
-    (q15_t)0xb1, (q15_t)0xf69c, (q15_t)0xaf, (q15_t)0xf6a8, (q15_t)0xae, (q15_t)0xf6b5, (q15_t)0xac, (q15_t)0xf6c1,
-    (q15_t)0xaa, (q15_t)0xf6ce, (q15_t)0xa8, (q15_t)0xf6da, (q15_t)0xa6, (q15_t)0xf6e7, (q15_t)0xa5, (q15_t)0xf6f3,
-    (q15_t)0xa3, (q15_t)0xf6ff, (q15_t)0xa1, (q15_t)0xf70c, (q15_t)0x9f, (q15_t)0xf718, (q15_t)0x9e, (q15_t)0xf725,
-    (q15_t)0x9c, (q15_t)0xf731, (q15_t)0x9a, (q15_t)0xf73e, (q15_t)0x98, (q15_t)0xf74a, (q15_t)0x97, (q15_t)0xf757,
-    (q15_t)0x95, (q15_t)0xf763, (q15_t)0x93, (q15_t)0xf76f, (q15_t)0x92, (q15_t)0xf77c, (q15_t)0x90, (q15_t)0xf788,
-    (q15_t)0x8e, (q15_t)0xf795, (q15_t)0x8d, (q15_t)0xf7a1, (q15_t)0x8b, (q15_t)0xf7ae, (q15_t)0x89, (q15_t)0xf7ba,
-    (q15_t)0x88, (q15_t)0xf7c7, (q15_t)0x86, (q15_t)0xf7d3, (q15_t)0x85, (q15_t)0xf7e0, (q15_t)0x83, (q15_t)0xf7ec,
-    (q15_t)0x81, (q15_t)0xf7f9, (q15_t)0x80, (q15_t)0xf805, (q15_t)0x7e, (q15_t)0xf811, (q15_t)0x7d, (q15_t)0xf81e,
-    (q15_t)0x7b, (q15_t)0xf82a, (q15_t)0x7a, (q15_t)0xf837, (q15_t)0x78, (q15_t)0xf843, (q15_t)0x77, (q15_t)0xf850,
-    (q15_t)0x75, (q15_t)0xf85c, (q15_t)0x74, (q15_t)0xf869, (q15_t)0x72, (q15_t)0xf875, (q15_t)0x71, (q15_t)0xf882,
-    (q15_t)0x6f, (q15_t)0xf88e, (q15_t)0x6e, (q15_t)0xf89b, (q15_t)0x6c, (q15_t)0xf8a7, (q15_t)0x6b, (q15_t)0xf8b4,
-    (q15_t)0x69, (q15_t)0xf8c0, (q15_t)0x68, (q15_t)0xf8cd, (q15_t)0x67, (q15_t)0xf8d9, (q15_t)0x65, (q15_t)0xf8e6,
-    (q15_t)0x64, (q15_t)0xf8f2, (q15_t)0x62, (q15_t)0xf8ff, (q15_t)0x61, (q15_t)0xf90b, (q15_t)0x60, (q15_t)0xf918,
-    (q15_t)0x5e, (q15_t)0xf924, (q15_t)0x5d, (q15_t)0xf931, (q15_t)0x5c, (q15_t)0xf93d, (q15_t)0x5a, (q15_t)0xf94a,
-    (q15_t)0x59, (q15_t)0xf956, (q15_t)0x58, (q15_t)0xf963, (q15_t)0x56, (q15_t)0xf96f, (q15_t)0x55, (q15_t)0xf97c,
-    (q15_t)0x54, (q15_t)0xf988, (q15_t)0x53, (q15_t)0xf995, (q15_t)0x51, (q15_t)0xf9a1, (q15_t)0x50, (q15_t)0xf9ae,
-    (q15_t)0x4f, (q15_t)0xf9ba, (q15_t)0x4e, (q15_t)0xf9c7, (q15_t)0x4c, (q15_t)0xf9d3, (q15_t)0x4b, (q15_t)0xf9e0,
-    (q15_t)0x4a, (q15_t)0xf9ec, (q15_t)0x49, (q15_t)0xf9f9, (q15_t)0x48, (q15_t)0xfa05, (q15_t)0x47, (q15_t)0xfa12,
-    (q15_t)0x45, (q15_t)0xfa1e, (q15_t)0x44, (q15_t)0xfa2b, (q15_t)0x43, (q15_t)0xfa37, (q15_t)0x42, (q15_t)0xfa44,
-    (q15_t)0x41, (q15_t)0xfa50, (q15_t)0x40, (q15_t)0xfa5d, (q15_t)0x3f, (q15_t)0xfa69, (q15_t)0x3d, (q15_t)0xfa76,
-    (q15_t)0x3c, (q15_t)0xfa82, (q15_t)0x3b, (q15_t)0xfa8f, (q15_t)0x3a, (q15_t)0xfa9b, (q15_t)0x39, (q15_t)0xfaa8,
-    (q15_t)0x38, (q15_t)0xfab4, (q15_t)0x37, (q15_t)0xfac1, (q15_t)0x36, (q15_t)0xfacd, (q15_t)0x35, (q15_t)0xfada,
-    (q15_t)0x34, (q15_t)0xfae6, (q15_t)0x33, (q15_t)0xfaf3, (q15_t)0x32, (q15_t)0xfb00, (q15_t)0x31, (q15_t)0xfb0c,
-    (q15_t)0x30, (q15_t)0xfb19, (q15_t)0x2f, (q15_t)0xfb25, (q15_t)0x2e, (q15_t)0xfb32, (q15_t)0x2d, (q15_t)0xfb3e,
-    (q15_t)0x2c, (q15_t)0xfb4b, (q15_t)0x2b, (q15_t)0xfb57, (q15_t)0x2b, (q15_t)0xfb64, (q15_t)0x2a, (q15_t)0xfb70,
-    (q15_t)0x29, (q15_t)0xfb7d, (q15_t)0x28, (q15_t)0xfb89, (q15_t)0x27, (q15_t)0xfb96, (q15_t)0x26, (q15_t)0xfba2,
-    (q15_t)0x25, (q15_t)0xfbaf, (q15_t)0x24, (q15_t)0xfbbc, (q15_t)0x24, (q15_t)0xfbc8, (q15_t)0x23, (q15_t)0xfbd5,
-    (q15_t)0x22, (q15_t)0xfbe1, (q15_t)0x21, (q15_t)0xfbee, (q15_t)0x20, (q15_t)0xfbfa, (q15_t)0x20, (q15_t)0xfc07,
-    (q15_t)0x1f, (q15_t)0xfc13, (q15_t)0x1e, (q15_t)0xfc20, (q15_t)0x1d, (q15_t)0xfc2c, (q15_t)0x1d, (q15_t)0xfc39,
-    (q15_t)0x1c, (q15_t)0xfc45, (q15_t)0x1b, (q15_t)0xfc52, (q15_t)0x1a, (q15_t)0xfc5f, (q15_t)0x1a, (q15_t)0xfc6b,
-    (q15_t)0x19, (q15_t)0xfc78, (q15_t)0x18, (q15_t)0xfc84, (q15_t)0x18, (q15_t)0xfc91, (q15_t)0x17, (q15_t)0xfc9d,
-    (q15_t)0x16, (q15_t)0xfcaa, (q15_t)0x16, (q15_t)0xfcb6, (q15_t)0x15, (q15_t)0xfcc3, (q15_t)0x14, (q15_t)0xfcd0,
-    (q15_t)0x14, (q15_t)0xfcdc, (q15_t)0x13, (q15_t)0xfce9, (q15_t)0x13, (q15_t)0xfcf5, (q15_t)0x12, (q15_t)0xfd02,
-    (q15_t)0x11, (q15_t)0xfd0e, (q15_t)0x11, (q15_t)0xfd1b, (q15_t)0x10, (q15_t)0xfd27, (q15_t)0x10, (q15_t)0xfd34,
-    (q15_t)0xf, (q15_t)0xfd40, (q15_t)0xf, (q15_t)0xfd4d, (q15_t)0xe, (q15_t)0xfd5a, (q15_t)0xe, (q15_t)0xfd66,
-    (q15_t)0xd, (q15_t)0xfd73, (q15_t)0xd, (q15_t)0xfd7f, (q15_t)0xc, (q15_t)0xfd8c, (q15_t)0xc, (q15_t)0xfd98,
-    (q15_t)0xb, (q15_t)0xfda5, (q15_t)0xb, (q15_t)0xfdb2, (q15_t)0xa, (q15_t)0xfdbe, (q15_t)0xa, (q15_t)0xfdcb,
-    (q15_t)0x9, (q15_t)0xfdd7, (q15_t)0x9, (q15_t)0xfde4, (q15_t)0x9, (q15_t)0xfdf0, (q15_t)0x8, (q15_t)0xfdfd,
-    (q15_t)0x8, (q15_t)0xfe09, (q15_t)0x7, (q15_t)0xfe16, (q15_t)0x7, (q15_t)0xfe23, (q15_t)0x7, (q15_t)0xfe2f,
-    (q15_t)0x6, (q15_t)0xfe3c, (q15_t)0x6, (q15_t)0xfe48, (q15_t)0x6, (q15_t)0xfe55, (q15_t)0x5, (q15_t)0xfe61,
-    (q15_t)0x5, (q15_t)0xfe6e, (q15_t)0x5, (q15_t)0xfe7a, (q15_t)0x4, (q15_t)0xfe87, (q15_t)0x4, (q15_t)0xfe94,
-    (q15_t)0x4, (q15_t)0xfea0, (q15_t)0x4, (q15_t)0xfead, (q15_t)0x3, (q15_t)0xfeb9, (q15_t)0x3, (q15_t)0xfec6,
-    (q15_t)0x3, (q15_t)0xfed2, (q15_t)0x3, (q15_t)0xfedf, (q15_t)0x2, (q15_t)0xfeec, (q15_t)0x2, (q15_t)0xfef8,
-    (q15_t)0x2, (q15_t)0xff05, (q15_t)0x2, (q15_t)0xff11, (q15_t)0x2, (q15_t)0xff1e, (q15_t)0x1, (q15_t)0xff2a,
-    (q15_t)0x1, (q15_t)0xff37, (q15_t)0x1, (q15_t)0xff44, (q15_t)0x1, (q15_t)0xff50, (q15_t)0x1, (q15_t)0xff5d,
-    (q15_t)0x1, (q15_t)0xff69, (q15_t)0x1, (q15_t)0xff76, (q15_t)0x0, (q15_t)0xff82, (q15_t)0x0, (q15_t)0xff8f,
-    (q15_t)0x0, (q15_t)0xff9b, (q15_t)0x0, (q15_t)0xffa8, (q15_t)0x0, (q15_t)0xffb5, (q15_t)0x0, (q15_t)0xffc1,
-    (q15_t)0x0, (q15_t)0xffce, (q15_t)0x0, (q15_t)0xffda, (q15_t)0x0, (q15_t)0xffe7, (q15_t)0x0, (q15_t)0xfff3,
-    (q15_t)0x0, (q15_t)0x0, (q15_t)0x0, (q15_t)0xd, (q15_t)0x0, (q15_t)0x19, (q15_t)0x0, (q15_t)0x26,
-    (q15_t)0x0, (q15_t)0x32, (q15_t)0x0, (q15_t)0x3f, (q15_t)0x0, (q15_t)0x4b, (q15_t)0x0, (q15_t)0x58,
-    (q15_t)0x0, (q15_t)0x65, (q15_t)0x0, (q15_t)0x71, (q15_t)0x0, (q15_t)0x7e, (q15_t)0x1, (q15_t)0x8a,
-    (q15_t)0x1, (q15_t)0x97, (q15_t)0x1, (q15_t)0xa3, (q15_t)0x1, (q15_t)0xb0, (q15_t)0x1, (q15_t)0xbc,
-    (q15_t)0x1, (q15_t)0xc9, (q15_t)0x1, (q15_t)0xd6, (q15_t)0x2, (q15_t)0xe2, (q15_t)0x2, (q15_t)0xef,
-    (q15_t)0x2, (q15_t)0xfb, (q15_t)0x2, (q15_t)0x108, (q15_t)0x2, (q15_t)0x114, (q15_t)0x3, (q15_t)0x121,
-    (q15_t)0x3, (q15_t)0x12e, (q15_t)0x3, (q15_t)0x13a, (q15_t)0x3, (q15_t)0x147, (q15_t)0x4, (q15_t)0x153,
-    (q15_t)0x4, (q15_t)0x160, (q15_t)0x4, (q15_t)0x16c, (q15_t)0x4, (q15_t)0x179, (q15_t)0x5, (q15_t)0x186,
-    (q15_t)0x5, (q15_t)0x192, (q15_t)0x5, (q15_t)0x19f, (q15_t)0x6, (q15_t)0x1ab, (q15_t)0x6, (q15_t)0x1b8,
-    (q15_t)0x6, (q15_t)0x1c4, (q15_t)0x7, (q15_t)0x1d1, (q15_t)0x7, (q15_t)0x1dd, (q15_t)0x7, (q15_t)0x1ea,
-    (q15_t)0x8, (q15_t)0x1f7, (q15_t)0x8, (q15_t)0x203, (q15_t)0x9, (q15_t)0x210, (q15_t)0x9, (q15_t)0x21c,
-    (q15_t)0x9, (q15_t)0x229, (q15_t)0xa, (q15_t)0x235, (q15_t)0xa, (q15_t)0x242, (q15_t)0xb, (q15_t)0x24e,
-    (q15_t)0xb, (q15_t)0x25b, (q15_t)0xc, (q15_t)0x268, (q15_t)0xc, (q15_t)0x274, (q15_t)0xd, (q15_t)0x281,
-    (q15_t)0xd, (q15_t)0x28d, (q15_t)0xe, (q15_t)0x29a, (q15_t)0xe, (q15_t)0x2a6, (q15_t)0xf, (q15_t)0x2b3,
-    (q15_t)0xf, (q15_t)0x2c0, (q15_t)0x10, (q15_t)0x2cc, (q15_t)0x10, (q15_t)0x2d9, (q15_t)0x11, (q15_t)0x2e5,
-    (q15_t)0x11, (q15_t)0x2f2, (q15_t)0x12, (q15_t)0x2fe, (q15_t)0x13, (q15_t)0x30b, (q15_t)0x13, (q15_t)0x317,
-    (q15_t)0x14, (q15_t)0x324, (q15_t)0x14, (q15_t)0x330, (q15_t)0x15, (q15_t)0x33d, (q15_t)0x16, (q15_t)0x34a,
-    (q15_t)0x16, (q15_t)0x356, (q15_t)0x17, (q15_t)0x363, (q15_t)0x18, (q15_t)0x36f, (q15_t)0x18, (q15_t)0x37c,
-    (q15_t)0x19, (q15_t)0x388, (q15_t)0x1a, (q15_t)0x395, (q15_t)0x1a, (q15_t)0x3a1, (q15_t)0x1b, (q15_t)0x3ae,
-    (q15_t)0x1c, (q15_t)0x3bb, (q15_t)0x1d, (q15_t)0x3c7, (q15_t)0x1d, (q15_t)0x3d4, (q15_t)0x1e, (q15_t)0x3e0,
-    (q15_t)0x1f, (q15_t)0x3ed, (q15_t)0x20, (q15_t)0x3f9, (q15_t)0x20, (q15_t)0x406, (q15_t)0x21, (q15_t)0x412,
-    (q15_t)0x22, (q15_t)0x41f, (q15_t)0x23, (q15_t)0x42b, (q15_t)0x24, (q15_t)0x438, (q15_t)0x24, (q15_t)0x444,
-    (q15_t)0x25, (q15_t)0x451, (q15_t)0x26, (q15_t)0x45e, (q15_t)0x27, (q15_t)0x46a, (q15_t)0x28, (q15_t)0x477,
-    (q15_t)0x29, (q15_t)0x483, (q15_t)0x2a, (q15_t)0x490, (q15_t)0x2b, (q15_t)0x49c, (q15_t)0x2b, (q15_t)0x4a9,
-    (q15_t)0x2c, (q15_t)0x4b5, (q15_t)0x2d, (q15_t)0x4c2, (q15_t)0x2e, (q15_t)0x4ce, (q15_t)0x2f, (q15_t)0x4db,
-    (q15_t)0x30, (q15_t)0x4e7, (q15_t)0x31, (q15_t)0x4f4, (q15_t)0x32, (q15_t)0x500, (q15_t)0x33, (q15_t)0x50d,
-    (q15_t)0x34, (q15_t)0x51a, (q15_t)0x35, (q15_t)0x526, (q15_t)0x36, (q15_t)0x533, (q15_t)0x37, (q15_t)0x53f,
-    (q15_t)0x38, (q15_t)0x54c, (q15_t)0x39, (q15_t)0x558, (q15_t)0x3a, (q15_t)0x565, (q15_t)0x3b, (q15_t)0x571,
-    (q15_t)0x3c, (q15_t)0x57e, (q15_t)0x3d, (q15_t)0x58a, (q15_t)0x3f, (q15_t)0x597, (q15_t)0x40, (q15_t)0x5a3,
-    (q15_t)0x41, (q15_t)0x5b0, (q15_t)0x42, (q15_t)0x5bc, (q15_t)0x43, (q15_t)0x5c9, (q15_t)0x44, (q15_t)0x5d5,
-    (q15_t)0x45, (q15_t)0x5e2, (q15_t)0x47, (q15_t)0x5ee, (q15_t)0x48, (q15_t)0x5fb, (q15_t)0x49, (q15_t)0x607,
-    (q15_t)0x4a, (q15_t)0x614, (q15_t)0x4b, (q15_t)0x620, (q15_t)0x4c, (q15_t)0x62d, (q15_t)0x4e, (q15_t)0x639,
-    (q15_t)0x4f, (q15_t)0x646, (q15_t)0x50, (q15_t)0x652, (q15_t)0x51, (q15_t)0x65f, (q15_t)0x53, (q15_t)0x66b,
-    (q15_t)0x54, (q15_t)0x678, (q15_t)0x55, (q15_t)0x684, (q15_t)0x56, (q15_t)0x691, (q15_t)0x58, (q15_t)0x69d,
-    (q15_t)0x59, (q15_t)0x6aa, (q15_t)0x5a, (q15_t)0x6b6, (q15_t)0x5c, (q15_t)0x6c3, (q15_t)0x5d, (q15_t)0x6cf,
-    (q15_t)0x5e, (q15_t)0x6dc, (q15_t)0x60, (q15_t)0x6e8, (q15_t)0x61, (q15_t)0x6f5, (q15_t)0x62, (q15_t)0x701,
-    (q15_t)0x64, (q15_t)0x70e, (q15_t)0x65, (q15_t)0x71a, (q15_t)0x67, (q15_t)0x727, (q15_t)0x68, (q15_t)0x733,
-    (q15_t)0x69, (q15_t)0x740, (q15_t)0x6b, (q15_t)0x74c, (q15_t)0x6c, (q15_t)0x759, (q15_t)0x6e, (q15_t)0x765,
-    (q15_t)0x6f, (q15_t)0x772, (q15_t)0x71, (q15_t)0x77e, (q15_t)0x72, (q15_t)0x78b, (q15_t)0x74, (q15_t)0x797,
-    (q15_t)0x75, (q15_t)0x7a4, (q15_t)0x77, (q15_t)0x7b0, (q15_t)0x78, (q15_t)0x7bd, (q15_t)0x7a, (q15_t)0x7c9,
-    (q15_t)0x7b, (q15_t)0x7d6, (q15_t)0x7d, (q15_t)0x7e2, (q15_t)0x7e, (q15_t)0x7ef, (q15_t)0x80, (q15_t)0x7fb,
-    (q15_t)0x81, (q15_t)0x807, (q15_t)0x83, (q15_t)0x814, (q15_t)0x85, (q15_t)0x820, (q15_t)0x86, (q15_t)0x82d,
-    (q15_t)0x88, (q15_t)0x839, (q15_t)0x89, (q15_t)0x846, (q15_t)0x8b, (q15_t)0x852, (q15_t)0x8d, (q15_t)0x85f,
-    (q15_t)0x8e, (q15_t)0x86b, (q15_t)0x90, (q15_t)0x878, (q15_t)0x92, (q15_t)0x884, (q15_t)0x93, (q15_t)0x891,
-    (q15_t)0x95, (q15_t)0x89d, (q15_t)0x97, (q15_t)0x8a9, (q15_t)0x98, (q15_t)0x8b6, (q15_t)0x9a, (q15_t)0x8c2,
-    (q15_t)0x9c, (q15_t)0x8cf, (q15_t)0x9e, (q15_t)0x8db, (q15_t)0x9f, (q15_t)0x8e8, (q15_t)0xa1, (q15_t)0x8f4,
-    (q15_t)0xa3, (q15_t)0x901, (q15_t)0xa5, (q15_t)0x90d, (q15_t)0xa6, (q15_t)0x919, (q15_t)0xa8, (q15_t)0x926,
-    (q15_t)0xaa, (q15_t)0x932, (q15_t)0xac, (q15_t)0x93f, (q15_t)0xae, (q15_t)0x94b, (q15_t)0xaf, (q15_t)0x958,
-    (q15_t)0xb1, (q15_t)0x964, (q15_t)0xb3, (q15_t)0x970, (q15_t)0xb5, (q15_t)0x97d, (q15_t)0xb7, (q15_t)0x989,
-    (q15_t)0xb9, (q15_t)0x996, (q15_t)0xbb, (q15_t)0x9a2, (q15_t)0xbd, (q15_t)0x9af, (q15_t)0xbe, (q15_t)0x9bb,
-    (q15_t)0xc0, (q15_t)0x9c7, (q15_t)0xc2, (q15_t)0x9d4, (q15_t)0xc4, (q15_t)0x9e0, (q15_t)0xc6, (q15_t)0x9ed,
-    (q15_t)0xc8, (q15_t)0x9f9, (q15_t)0xca, (q15_t)0xa06, (q15_t)0xcc, (q15_t)0xa12, (q15_t)0xce, (q15_t)0xa1e,
-    (q15_t)0xd0, (q15_t)0xa2b, (q15_t)0xd2, (q15_t)0xa37, (q15_t)0xd4, (q15_t)0xa44, (q15_t)0xd6, (q15_t)0xa50,
-    (q15_t)0xd8, (q15_t)0xa5c, (q15_t)0xda, (q15_t)0xa69, (q15_t)0xdc, (q15_t)0xa75, (q15_t)0xde, (q15_t)0xa82,
-    (q15_t)0xe0, (q15_t)0xa8e, (q15_t)0xe2, (q15_t)0xa9a, (q15_t)0xe4, (q15_t)0xaa7, (q15_t)0xe7, (q15_t)0xab3,
-    (q15_t)0xe9, (q15_t)0xac0, (q15_t)0xeb, (q15_t)0xacc, (q15_t)0xed, (q15_t)0xad8, (q15_t)0xef, (q15_t)0xae5,
-    (q15_t)0xf1, (q15_t)0xaf1, (q15_t)0xf3, (q15_t)0xafd, (q15_t)0xf6, (q15_t)0xb0a, (q15_t)0xf8, (q15_t)0xb16,
-    (q15_t)0xfa, (q15_t)0xb23, (q15_t)0xfc, (q15_t)0xb2f, (q15_t)0xfe, (q15_t)0xb3b, (q15_t)0x100, (q15_t)0xb48,
-    (q15_t)0x103, (q15_t)0xb54, (q15_t)0x105, (q15_t)0xb60, (q15_t)0x107, (q15_t)0xb6d, (q15_t)0x109, (q15_t)0xb79,
-    (q15_t)0x10c, (q15_t)0xb85, (q15_t)0x10e, (q15_t)0xb92, (q15_t)0x110, (q15_t)0xb9e, (q15_t)0x113, (q15_t)0xbab,
-    (q15_t)0x115, (q15_t)0xbb7, (q15_t)0x117, (q15_t)0xbc3, (q15_t)0x119, (q15_t)0xbd0, (q15_t)0x11c, (q15_t)0xbdc,
-    (q15_t)0x11e, (q15_t)0xbe8, (q15_t)0x120, (q15_t)0xbf5, (q15_t)0x123, (q15_t)0xc01, (q15_t)0x125, (q15_t)0xc0d,
-    (q15_t)0x128, (q15_t)0xc1a, (q15_t)0x12a, (q15_t)0xc26, (q15_t)0x12c, (q15_t)0xc32, (q15_t)0x12f, (q15_t)0xc3f,
-    (q15_t)0x131, (q15_t)0xc4b, (q15_t)0x134, (q15_t)0xc57, (q15_t)0x136, (q15_t)0xc64, (q15_t)0x138, (q15_t)0xc70,
-    (q15_t)0x13b, (q15_t)0xc7c, (q15_t)0x13d, (q15_t)0xc89, (q15_t)0x140, (q15_t)0xc95, (q15_t)0x142, (q15_t)0xca1,
-    (q15_t)0x145, (q15_t)0xcae, (q15_t)0x147, (q15_t)0xcba, (q15_t)0x14a, (q15_t)0xcc6, (q15_t)0x14c, (q15_t)0xcd3,
-    (q15_t)0x14f, (q15_t)0xcdf, (q15_t)0x151, (q15_t)0xceb, (q15_t)0x154, (q15_t)0xcf8, (q15_t)0x156, (q15_t)0xd04,
-    (q15_t)0x159, (q15_t)0xd10, (q15_t)0x15b, (q15_t)0xd1c, (q15_t)0x15e, (q15_t)0xd29, (q15_t)0x161, (q15_t)0xd35,
-    (q15_t)0x163, (q15_t)0xd41, (q15_t)0x166, (q15_t)0xd4e, (q15_t)0x168, (q15_t)0xd5a, (q15_t)0x16b, (q15_t)0xd66,
-    (q15_t)0x16e, (q15_t)0xd72, (q15_t)0x170, (q15_t)0xd7f, (q15_t)0x173, (q15_t)0xd8b, (q15_t)0x176, (q15_t)0xd97,
-    (q15_t)0x178, (q15_t)0xda4, (q15_t)0x17b, (q15_t)0xdb0, (q15_t)0x17e, (q15_t)0xdbc, (q15_t)0x180, (q15_t)0xdc8,
-    (q15_t)0x183, (q15_t)0xdd5, (q15_t)0x186, (q15_t)0xde1, (q15_t)0x189, (q15_t)0xded, (q15_t)0x18b, (q15_t)0xdf9,
-    (q15_t)0x18e, (q15_t)0xe06, (q15_t)0x191, (q15_t)0xe12, (q15_t)0x194, (q15_t)0xe1e, (q15_t)0x196, (q15_t)0xe2b,
-    (q15_t)0x199, (q15_t)0xe37, (q15_t)0x19c, (q15_t)0xe43, (q15_t)0x19f, (q15_t)0xe4f, (q15_t)0x1a2, (q15_t)0xe5c,
-    (q15_t)0x1a4, (q15_t)0xe68, (q15_t)0x1a7, (q15_t)0xe74, (q15_t)0x1aa, (q15_t)0xe80, (q15_t)0x1ad, (q15_t)0xe8c,
-    (q15_t)0x1b0, (q15_t)0xe99, (q15_t)0x1b3, (q15_t)0xea5, (q15_t)0x1b6, (q15_t)0xeb1, (q15_t)0x1b8, (q15_t)0xebd,
-    (q15_t)0x1bb, (q15_t)0xeca, (q15_t)0x1be, (q15_t)0xed6, (q15_t)0x1c1, (q15_t)0xee2, (q15_t)0x1c4, (q15_t)0xeee,
-    (q15_t)0x1c7, (q15_t)0xefb, (q15_t)0x1ca, (q15_t)0xf07, (q15_t)0x1cd, (q15_t)0xf13, (q15_t)0x1d0, (q15_t)0xf1f,
-    (q15_t)0x1d3, (q15_t)0xf2b, (q15_t)0x1d6, (q15_t)0xf38, (q15_t)0x1d9, (q15_t)0xf44, (q15_t)0x1dc, (q15_t)0xf50,
-    (q15_t)0x1df, (q15_t)0xf5c, (q15_t)0x1e2, (q15_t)0xf68, (q15_t)0x1e5, (q15_t)0xf75, (q15_t)0x1e8, (q15_t)0xf81,
-    (q15_t)0x1eb, (q15_t)0xf8d, (q15_t)0x1ee, (q15_t)0xf99, (q15_t)0x1f1, (q15_t)0xfa5, (q15_t)0x1f4, (q15_t)0xfb2,
-    (q15_t)0x1f7, (q15_t)0xfbe, (q15_t)0x1fa, (q15_t)0xfca, (q15_t)0x1fd, (q15_t)0xfd6, (q15_t)0x201, (q15_t)0xfe2,
-    (q15_t)0x204, (q15_t)0xfee, (q15_t)0x207, (q15_t)0xffb, (q15_t)0x20a, (q15_t)0x1007, (q15_t)0x20d, (q15_t)0x1013,
-    (q15_t)0x210, (q15_t)0x101f, (q15_t)0x213, (q15_t)0x102b, (q15_t)0x217, (q15_t)0x1037, (q15_t)0x21a, (q15_t)0x1044,
-    (q15_t)0x21d, (q15_t)0x1050, (q15_t)0x220, (q15_t)0x105c, (q15_t)0x223, (q15_t)0x1068, (q15_t)0x227, (q15_t)0x1074,
-    (q15_t)0x22a, (q15_t)0x1080, (q15_t)0x22d, (q15_t)0x108c, (q15_t)0x230, (q15_t)0x1099, (q15_t)0x234, (q15_t)0x10a5,
-    (q15_t)0x237, (q15_t)0x10b1, (q15_t)0x23a, (q15_t)0x10bd, (q15_t)0x23e, (q15_t)0x10c9, (q15_t)0x241, (q15_t)0x10d5,
-    (q15_t)0x244, (q15_t)0x10e1, (q15_t)0x247, (q15_t)0x10ed, (q15_t)0x24b, (q15_t)0x10fa, (q15_t)0x24e, (q15_t)0x1106,
-    (q15_t)0x251, (q15_t)0x1112, (q15_t)0x255, (q15_t)0x111e, (q15_t)0x258, (q15_t)0x112a, (q15_t)0x25c, (q15_t)0x1136,
-    (q15_t)0x25f, (q15_t)0x1142, (q15_t)0x262, (q15_t)0x114e, (q15_t)0x266, (q15_t)0x115a, (q15_t)0x269, (q15_t)0x1167,
-    (q15_t)0x26d, (q15_t)0x1173, (q15_t)0x270, (q15_t)0x117f, (q15_t)0x273, (q15_t)0x118b, (q15_t)0x277, (q15_t)0x1197,
-    (q15_t)0x27a, (q15_t)0x11a3, (q15_t)0x27e, (q15_t)0x11af, (q15_t)0x281, (q15_t)0x11bb, (q15_t)0x285, (q15_t)0x11c7,
-    (q15_t)0x288, (q15_t)0x11d3, (q15_t)0x28c, (q15_t)0x11df, (q15_t)0x28f, (q15_t)0x11eb, (q15_t)0x293, (q15_t)0x11f7,
-    (q15_t)0x296, (q15_t)0x1204, (q15_t)0x29a, (q15_t)0x1210, (q15_t)0x29d, (q15_t)0x121c, (q15_t)0x2a1, (q15_t)0x1228,
-    (q15_t)0x2a5, (q15_t)0x1234, (q15_t)0x2a8, (q15_t)0x1240, (q15_t)0x2ac, (q15_t)0x124c, (q15_t)0x2af, (q15_t)0x1258,
-    (q15_t)0x2b3, (q15_t)0x1264, (q15_t)0x2b7, (q15_t)0x1270, (q15_t)0x2ba, (q15_t)0x127c, (q15_t)0x2be, (q15_t)0x1288,
-    (q15_t)0x2c1, (q15_t)0x1294, (q15_t)0x2c5, (q15_t)0x12a0, (q15_t)0x2c9, (q15_t)0x12ac, (q15_t)0x2cc, (q15_t)0x12b8,
-    (q15_t)0x2d0, (q15_t)0x12c4, (q15_t)0x2d4, (q15_t)0x12d0, (q15_t)0x2d8, (q15_t)0x12dc, (q15_t)0x2db, (q15_t)0x12e8,
-    (q15_t)0x2df, (q15_t)0x12f4, (q15_t)0x2e3, (q15_t)0x1300, (q15_t)0x2e6, (q15_t)0x130c, (q15_t)0x2ea, (q15_t)0x1318,
-    (q15_t)0x2ee, (q15_t)0x1324, (q15_t)0x2f2, (q15_t)0x1330, (q15_t)0x2f5, (q15_t)0x133c, (q15_t)0x2f9, (q15_t)0x1348,
-    (q15_t)0x2fd, (q15_t)0x1354, (q15_t)0x301, (q15_t)0x1360, (q15_t)0x305, (q15_t)0x136c, (q15_t)0x308, (q15_t)0x1378,
-    (q15_t)0x30c, (q15_t)0x1384, (q15_t)0x310, (q15_t)0x1390, (q15_t)0x314, (q15_t)0x139c, (q15_t)0x318, (q15_t)0x13a8,
-    (q15_t)0x31c, (q15_t)0x13b4, (q15_t)0x320, (q15_t)0x13c0, (q15_t)0x323, (q15_t)0x13cc, (q15_t)0x327, (q15_t)0x13d8,
-    (q15_t)0x32b, (q15_t)0x13e4, (q15_t)0x32f, (q15_t)0x13f0, (q15_t)0x333, (q15_t)0x13fb, (q15_t)0x337, (q15_t)0x1407,
-    (q15_t)0x33b, (q15_t)0x1413, (q15_t)0x33f, (q15_t)0x141f, (q15_t)0x343, (q15_t)0x142b, (q15_t)0x347, (q15_t)0x1437,
-    (q15_t)0x34b, (q15_t)0x1443, (q15_t)0x34f, (q15_t)0x144f, (q15_t)0x353, (q15_t)0x145b, (q15_t)0x357, (q15_t)0x1467,
-    (q15_t)0x35b, (q15_t)0x1473, (q15_t)0x35f, (q15_t)0x147f, (q15_t)0x363, (q15_t)0x148b, (q15_t)0x367, (q15_t)0x1496,
-    (q15_t)0x36b, (q15_t)0x14a2, (q15_t)0x36f, (q15_t)0x14ae, (q15_t)0x373, (q15_t)0x14ba, (q15_t)0x377, (q15_t)0x14c6,
-    (q15_t)0x37b, (q15_t)0x14d2, (q15_t)0x37f, (q15_t)0x14de, (q15_t)0x383, (q15_t)0x14ea, (q15_t)0x387, (q15_t)0x14f6,
-    (q15_t)0x38c, (q15_t)0x1501, (q15_t)0x390, (q15_t)0x150d, (q15_t)0x394, (q15_t)0x1519, (q15_t)0x398, (q15_t)0x1525,
-    (q15_t)0x39c, (q15_t)0x1531, (q15_t)0x3a0, (q15_t)0x153d, (q15_t)0x3a5, (q15_t)0x1549, (q15_t)0x3a9, (q15_t)0x1554,
-    (q15_t)0x3ad, (q15_t)0x1560, (q15_t)0x3b1, (q15_t)0x156c, (q15_t)0x3b5, (q15_t)0x1578, (q15_t)0x3ba, (q15_t)0x1584,
-    (q15_t)0x3be, (q15_t)0x1590, (q15_t)0x3c2, (q15_t)0x159b, (q15_t)0x3c6, (q15_t)0x15a7, (q15_t)0x3ca, (q15_t)0x15b3,
-    (q15_t)0x3cf, (q15_t)0x15bf, (q15_t)0x3d3, (q15_t)0x15cb, (q15_t)0x3d7, (q15_t)0x15d7, (q15_t)0x3dc, (q15_t)0x15e2,
-    (q15_t)0x3e0, (q15_t)0x15ee, (q15_t)0x3e4, (q15_t)0x15fa, (q15_t)0x3e9, (q15_t)0x1606, (q15_t)0x3ed, (q15_t)0x1612,
-    (q15_t)0x3f1, (q15_t)0x161d, (q15_t)0x3f6, (q15_t)0x1629, (q15_t)0x3fa, (q15_t)0x1635, (q15_t)0x3fe, (q15_t)0x1641,
-    (q15_t)0x403, (q15_t)0x164c, (q15_t)0x407, (q15_t)0x1658, (q15_t)0x40b, (q15_t)0x1664, (q15_t)0x410, (q15_t)0x1670,
-    (q15_t)0x414, (q15_t)0x167c, (q15_t)0x419, (q15_t)0x1687, (q15_t)0x41d, (q15_t)0x1693, (q15_t)0x422, (q15_t)0x169f,
-    (q15_t)0x426, (q15_t)0x16ab, (q15_t)0x42a, (q15_t)0x16b6, (q15_t)0x42f, (q15_t)0x16c2, (q15_t)0x433, (q15_t)0x16ce,
-    (q15_t)0x438, (q15_t)0x16da, (q15_t)0x43c, (q15_t)0x16e5, (q15_t)0x441, (q15_t)0x16f1, (q15_t)0x445, (q15_t)0x16fd,
-    (q15_t)0x44a, (q15_t)0x1709, (q15_t)0x44e, (q15_t)0x1714, (q15_t)0x453, (q15_t)0x1720, (q15_t)0x457, (q15_t)0x172c,
-    (q15_t)0x45c, (q15_t)0x1737, (q15_t)0x461, (q15_t)0x1743, (q15_t)0x465, (q15_t)0x174f, (q15_t)0x46a, (q15_t)0x175b,
-    (q15_t)0x46e, (q15_t)0x1766, (q15_t)0x473, (q15_t)0x1772, (q15_t)0x478, (q15_t)0x177e, (q15_t)0x47c, (q15_t)0x1789,
-    (q15_t)0x481, (q15_t)0x1795, (q15_t)0x485, (q15_t)0x17a1, (q15_t)0x48a, (q15_t)0x17ac, (q15_t)0x48f, (q15_t)0x17b8,
-    (q15_t)0x493, (q15_t)0x17c4, (q15_t)0x498, (q15_t)0x17cf, (q15_t)0x49d, (q15_t)0x17db, (q15_t)0x4a1, (q15_t)0x17e7,
-    (q15_t)0x4a6, (q15_t)0x17f2, (q15_t)0x4ab, (q15_t)0x17fe, (q15_t)0x4b0, (q15_t)0x180a, (q15_t)0x4b4, (q15_t)0x1815,
-    (q15_t)0x4b9, (q15_t)0x1821, (q15_t)0x4be, (q15_t)0x182d, (q15_t)0x4c2, (q15_t)0x1838, (q15_t)0x4c7, (q15_t)0x1844,
-    (q15_t)0x4cc, (q15_t)0x184f, (q15_t)0x4d1, (q15_t)0x185b, (q15_t)0x4d6, (q15_t)0x1867, (q15_t)0x4da, (q15_t)0x1872,
-    (q15_t)0x4df, (q15_t)0x187e, (q15_t)0x4e4, (q15_t)0x1889, (q15_t)0x4e9, (q15_t)0x1895, (q15_t)0x4ee, (q15_t)0x18a1,
-    (q15_t)0x4f2, (q15_t)0x18ac, (q15_t)0x4f7, (q15_t)0x18b8, (q15_t)0x4fc, (q15_t)0x18c3, (q15_t)0x501, (q15_t)0x18cf,
-    (q15_t)0x506, (q15_t)0x18db, (q15_t)0x50b, (q15_t)0x18e6, (q15_t)0x510, (q15_t)0x18f2, (q15_t)0x515, (q15_t)0x18fd,
-    (q15_t)0x51a, (q15_t)0x1909, (q15_t)0x51e, (q15_t)0x1914, (q15_t)0x523, (q15_t)0x1920, (q15_t)0x528, (q15_t)0x192c,
-    (q15_t)0x52d, (q15_t)0x1937, (q15_t)0x532, (q15_t)0x1943, (q15_t)0x537, (q15_t)0x194e, (q15_t)0x53c, (q15_t)0x195a,
-    (q15_t)0x541, (q15_t)0x1965, (q15_t)0x546, (q15_t)0x1971, (q15_t)0x54b, (q15_t)0x197c, (q15_t)0x550, (q15_t)0x1988,
-    (q15_t)0x555, (q15_t)0x1993, (q15_t)0x55a, (q15_t)0x199f, (q15_t)0x55f, (q15_t)0x19aa, (q15_t)0x564, (q15_t)0x19b6,
-    (q15_t)0x569, (q15_t)0x19c1, (q15_t)0x56e, (q15_t)0x19cd, (q15_t)0x573, (q15_t)0x19d8, (q15_t)0x578, (q15_t)0x19e4,
-    (q15_t)0x57e, (q15_t)0x19ef, (q15_t)0x583, (q15_t)0x19fb, (q15_t)0x588, (q15_t)0x1a06, (q15_t)0x58d, (q15_t)0x1a12,
-    (q15_t)0x592, (q15_t)0x1a1d, (q15_t)0x597, (q15_t)0x1a29, (q15_t)0x59c, (q15_t)0x1a34, (q15_t)0x5a1, (q15_t)0x1a40,
-    (q15_t)0x5a7, (q15_t)0x1a4b, (q15_t)0x5ac, (q15_t)0x1a57, (q15_t)0x5b1, (q15_t)0x1a62, (q15_t)0x5b6, (q15_t)0x1a6e,
-    (q15_t)0x5bb, (q15_t)0x1a79, (q15_t)0x5c1, (q15_t)0x1a84, (q15_t)0x5c6, (q15_t)0x1a90, (q15_t)0x5cb, (q15_t)0x1a9b,
-    (q15_t)0x5d0, (q15_t)0x1aa7, (q15_t)0x5d5, (q15_t)0x1ab2, (q15_t)0x5db, (q15_t)0x1abe, (q15_t)0x5e0, (q15_t)0x1ac9,
-    (q15_t)0x5e5, (q15_t)0x1ad4, (q15_t)0x5ea, (q15_t)0x1ae0, (q15_t)0x5f0, (q15_t)0x1aeb, (q15_t)0x5f5, (q15_t)0x1af7,
-    (q15_t)0x5fa, (q15_t)0x1b02, (q15_t)0x600, (q15_t)0x1b0d, (q15_t)0x605, (q15_t)0x1b19, (q15_t)0x60a, (q15_t)0x1b24,
-    (q15_t)0x610, (q15_t)0x1b30, (q15_t)0x615, (q15_t)0x1b3b, (q15_t)0x61a, (q15_t)0x1b46, (q15_t)0x620, (q15_t)0x1b52,
-    (q15_t)0x625, (q15_t)0x1b5d, (q15_t)0x62a, (q15_t)0x1b68, (q15_t)0x630, (q15_t)0x1b74, (q15_t)0x635, (q15_t)0x1b7f,
-    (q15_t)0x63b, (q15_t)0x1b8a, (q15_t)0x640, (q15_t)0x1b96, (q15_t)0x645, (q15_t)0x1ba1, (q15_t)0x64b, (q15_t)0x1bac,
-    (q15_t)0x650, (q15_t)0x1bb8, (q15_t)0x656, (q15_t)0x1bc3, (q15_t)0x65b, (q15_t)0x1bce, (q15_t)0x661, (q15_t)0x1bda,
-    (q15_t)0x666, (q15_t)0x1be5, (q15_t)0x66c, (q15_t)0x1bf0, (q15_t)0x671, (q15_t)0x1bfc, (q15_t)0x677, (q15_t)0x1c07,
-    (q15_t)0x67c, (q15_t)0x1c12, (q15_t)0x682, (q15_t)0x1c1e, (q15_t)0x687, (q15_t)0x1c29, (q15_t)0x68d, (q15_t)0x1c34,
-    (q15_t)0x692, (q15_t)0x1c3f, (q15_t)0x698, (q15_t)0x1c4b, (q15_t)0x69d, (q15_t)0x1c56, (q15_t)0x6a3, (q15_t)0x1c61,
-    (q15_t)0x6a8, (q15_t)0x1c6c, (q15_t)0x6ae, (q15_t)0x1c78, (q15_t)0x6b4, (q15_t)0x1c83, (q15_t)0x6b9, (q15_t)0x1c8e,
-    (q15_t)0x6bf, (q15_t)0x1c99, (q15_t)0x6c5, (q15_t)0x1ca5, (q15_t)0x6ca, (q15_t)0x1cb0, (q15_t)0x6d0, (q15_t)0x1cbb,
-    (q15_t)0x6d5, (q15_t)0x1cc6, (q15_t)0x6db, (q15_t)0x1cd2, (q15_t)0x6e1, (q15_t)0x1cdd, (q15_t)0x6e6, (q15_t)0x1ce8,
-    (q15_t)0x6ec, (q15_t)0x1cf3, (q15_t)0x6f2, (q15_t)0x1cff, (q15_t)0x6f7, (q15_t)0x1d0a, (q15_t)0x6fd, (q15_t)0x1d15,
-    (q15_t)0x703, (q15_t)0x1d20, (q15_t)0x709, (q15_t)0x1d2b, (q15_t)0x70e, (q15_t)0x1d36, (q15_t)0x714, (q15_t)0x1d42,
-    (q15_t)0x71a, (q15_t)0x1d4d, (q15_t)0x720, (q15_t)0x1d58, (q15_t)0x725, (q15_t)0x1d63, (q15_t)0x72b, (q15_t)0x1d6e,
-    (q15_t)0x731, (q15_t)0x1d79, (q15_t)0x737, (q15_t)0x1d85, (q15_t)0x73d, (q15_t)0x1d90, (q15_t)0x742, (q15_t)0x1d9b,
-    (q15_t)0x748, (q15_t)0x1da6, (q15_t)0x74e, (q15_t)0x1db1, (q15_t)0x754, (q15_t)0x1dbc, (q15_t)0x75a, (q15_t)0x1dc7,
-    (q15_t)0x75f, (q15_t)0x1dd3, (q15_t)0x765, (q15_t)0x1dde, (q15_t)0x76b, (q15_t)0x1de9, (q15_t)0x771, (q15_t)0x1df4,
-    (q15_t)0x777, (q15_t)0x1dff, (q15_t)0x77d, (q15_t)0x1e0a, (q15_t)0x783, (q15_t)0x1e15, (q15_t)0x789, (q15_t)0x1e20,
-    (q15_t)0x78f, (q15_t)0x1e2b, (q15_t)0x795, (q15_t)0x1e36, (q15_t)0x79a, (q15_t)0x1e42, (q15_t)0x7a0, (q15_t)0x1e4d,
-    (q15_t)0x7a6, (q15_t)0x1e58, (q15_t)0x7ac, (q15_t)0x1e63, (q15_t)0x7b2, (q15_t)0x1e6e, (q15_t)0x7b8, (q15_t)0x1e79,
-    (q15_t)0x7be, (q15_t)0x1e84, (q15_t)0x7c4, (q15_t)0x1e8f, (q15_t)0x7ca, (q15_t)0x1e9a, (q15_t)0x7d0, (q15_t)0x1ea5,
-    (q15_t)0x7d6, (q15_t)0x1eb0, (q15_t)0x7dc, (q15_t)0x1ebb, (q15_t)0x7e2, (q15_t)0x1ec6, (q15_t)0x7e8, (q15_t)0x1ed1,
-    (q15_t)0x7ee, (q15_t)0x1edc, (q15_t)0x7f5, (q15_t)0x1ee7, (q15_t)0x7fb, (q15_t)0x1ef2, (q15_t)0x801, (q15_t)0x1efd,
-    (q15_t)0x807, (q15_t)0x1f08, (q15_t)0x80d, (q15_t)0x1f13, (q15_t)0x813, (q15_t)0x1f1e, (q15_t)0x819, (q15_t)0x1f29,
-    (q15_t)0x81f, (q15_t)0x1f34, (q15_t)0x825, (q15_t)0x1f3f, (q15_t)0x82b, (q15_t)0x1f4a, (q15_t)0x832, (q15_t)0x1f55,
-    (q15_t)0x838, (q15_t)0x1f60, (q15_t)0x83e, (q15_t)0x1f6b, (q15_t)0x844, (q15_t)0x1f76, (q15_t)0x84a, (q15_t)0x1f81,
-    (q15_t)0x850, (q15_t)0x1f8c, (q15_t)0x857, (q15_t)0x1f97, (q15_t)0x85d, (q15_t)0x1fa2, (q15_t)0x863, (q15_t)0x1fac,
-    (q15_t)0x869, (q15_t)0x1fb7, (q15_t)0x870, (q15_t)0x1fc2, (q15_t)0x876, (q15_t)0x1fcd, (q15_t)0x87c, (q15_t)0x1fd8,
-    (q15_t)0x882, (q15_t)0x1fe3, (q15_t)0x889, (q15_t)0x1fee, (q15_t)0x88f, (q15_t)0x1ff9, (q15_t)0x895, (q15_t)0x2004,
-    (q15_t)0x89b, (q15_t)0x200f, (q15_t)0x8a2, (q15_t)0x2019, (q15_t)0x8a8, (q15_t)0x2024, (q15_t)0x8ae, (q15_t)0x202f,
-    (q15_t)0x8b5, (q15_t)0x203a, (q15_t)0x8bb, (q15_t)0x2045, (q15_t)0x8c1, (q15_t)0x2050, (q15_t)0x8c8, (q15_t)0x205b,
-    (q15_t)0x8ce, (q15_t)0x2065, (q15_t)0x8d4, (q15_t)0x2070, (q15_t)0x8db, (q15_t)0x207b, (q15_t)0x8e1, (q15_t)0x2086,
-    (q15_t)0x8e8, (q15_t)0x2091, (q15_t)0x8ee, (q15_t)0x209b, (q15_t)0x8f4, (q15_t)0x20a6, (q15_t)0x8fb, (q15_t)0x20b1,
-    (q15_t)0x901, (q15_t)0x20bc, (q15_t)0x908, (q15_t)0x20c7, (q15_t)0x90e, (q15_t)0x20d1, (q15_t)0x915, (q15_t)0x20dc,
-    (q15_t)0x91b, (q15_t)0x20e7, (q15_t)0x921, (q15_t)0x20f2, (q15_t)0x928, (q15_t)0x20fd, (q15_t)0x92e, (q15_t)0x2107,
-    (q15_t)0x935, (q15_t)0x2112, (q15_t)0x93b, (q15_t)0x211d, (q15_t)0x942, (q15_t)0x2128, (q15_t)0x948, (q15_t)0x2132,
-    (q15_t)0x94f, (q15_t)0x213d, (q15_t)0x955, (q15_t)0x2148, (q15_t)0x95c, (q15_t)0x2153, (q15_t)0x963, (q15_t)0x215d,
-    (q15_t)0x969, (q15_t)0x2168, (q15_t)0x970, (q15_t)0x2173, (q15_t)0x976, (q15_t)0x217d, (q15_t)0x97d, (q15_t)0x2188,
-    (q15_t)0x983, (q15_t)0x2193, (q15_t)0x98a, (q15_t)0x219e, (q15_t)0x991, (q15_t)0x21a8, (q15_t)0x997, (q15_t)0x21b3,
-    (q15_t)0x99e, (q15_t)0x21be, (q15_t)0x9a4, (q15_t)0x21c8, (q15_t)0x9ab, (q15_t)0x21d3, (q15_t)0x9b2, (q15_t)0x21de,
-    (q15_t)0x9b8, (q15_t)0x21e8, (q15_t)0x9bf, (q15_t)0x21f3, (q15_t)0x9c6, (q15_t)0x21fe, (q15_t)0x9cc, (q15_t)0x2208,
-    (q15_t)0x9d3, (q15_t)0x2213, (q15_t)0x9da, (q15_t)0x221e, (q15_t)0x9e0, (q15_t)0x2228, (q15_t)0x9e7, (q15_t)0x2233,
-    (q15_t)0x9ee, (q15_t)0x223d, (q15_t)0x9f5, (q15_t)0x2248, (q15_t)0x9fb, (q15_t)0x2253, (q15_t)0xa02, (q15_t)0x225d,
-    (q15_t)0xa09, (q15_t)0x2268, (q15_t)0xa10, (q15_t)0x2272, (q15_t)0xa16, (q15_t)0x227d, (q15_t)0xa1d, (q15_t)0x2288,
-    (q15_t)0xa24, (q15_t)0x2292, (q15_t)0xa2b, (q15_t)0x229d, (q15_t)0xa32, (q15_t)0x22a7, (q15_t)0xa38, (q15_t)0x22b2,
-    (q15_t)0xa3f, (q15_t)0x22bc, (q15_t)0xa46, (q15_t)0x22c7, (q15_t)0xa4d, (q15_t)0x22d2, (q15_t)0xa54, (q15_t)0x22dc,
-    (q15_t)0xa5b, (q15_t)0x22e7, (q15_t)0xa61, (q15_t)0x22f1, (q15_t)0xa68, (q15_t)0x22fc, (q15_t)0xa6f, (q15_t)0x2306,
-    (q15_t)0xa76, (q15_t)0x2311, (q15_t)0xa7d, (q15_t)0x231b, (q15_t)0xa84, (q15_t)0x2326, (q15_t)0xa8b, (q15_t)0x2330,
-    (q15_t)0xa92, (q15_t)0x233b, (q15_t)0xa99, (q15_t)0x2345, (q15_t)0xa9f, (q15_t)0x2350, (q15_t)0xaa6, (q15_t)0x235a,
-    (q15_t)0xaad, (q15_t)0x2365, (q15_t)0xab4, (q15_t)0x236f, (q15_t)0xabb, (q15_t)0x237a, (q15_t)0xac2, (q15_t)0x2384,
-    (q15_t)0xac9, (q15_t)0x238e, (q15_t)0xad0, (q15_t)0x2399, (q15_t)0xad7, (q15_t)0x23a3, (q15_t)0xade, (q15_t)0x23ae,
-    (q15_t)0xae5, (q15_t)0x23b8, (q15_t)0xaec, (q15_t)0x23c3, (q15_t)0xaf3, (q15_t)0x23cd, (q15_t)0xafa, (q15_t)0x23d7,
-    (q15_t)0xb01, (q15_t)0x23e2, (q15_t)0xb08, (q15_t)0x23ec, (q15_t)0xb0f, (q15_t)0x23f7, (q15_t)0xb16, (q15_t)0x2401,
-    (q15_t)0xb1e, (q15_t)0x240b, (q15_t)0xb25, (q15_t)0x2416, (q15_t)0xb2c, (q15_t)0x2420, (q15_t)0xb33, (q15_t)0x242b,
-    (q15_t)0xb3a, (q15_t)0x2435, (q15_t)0xb41, (q15_t)0x243f, (q15_t)0xb48, (q15_t)0x244a, (q15_t)0xb4f, (q15_t)0x2454,
-    (q15_t)0xb56, (q15_t)0x245e, (q15_t)0xb5e, (q15_t)0x2469, (q15_t)0xb65, (q15_t)0x2473, (q15_t)0xb6c, (q15_t)0x247d,
-    (q15_t)0xb73, (q15_t)0x2488, (q15_t)0xb7a, (q15_t)0x2492, (q15_t)0xb81, (q15_t)0x249c, (q15_t)0xb89, (q15_t)0x24a7,
-    (q15_t)0xb90, (q15_t)0x24b1, (q15_t)0xb97, (q15_t)0x24bb, (q15_t)0xb9e, (q15_t)0x24c5, (q15_t)0xba5, (q15_t)0x24d0,
-    (q15_t)0xbad, (q15_t)0x24da, (q15_t)0xbb4, (q15_t)0x24e4, (q15_t)0xbbb, (q15_t)0x24ef, (q15_t)0xbc2, (q15_t)0x24f9,
-    (q15_t)0xbca, (q15_t)0x2503, (q15_t)0xbd1, (q15_t)0x250d, (q15_t)0xbd8, (q15_t)0x2518, (q15_t)0xbe0, (q15_t)0x2522,
-    (q15_t)0xbe7, (q15_t)0x252c, (q15_t)0xbee, (q15_t)0x2536, (q15_t)0xbf5, (q15_t)0x2541, (q15_t)0xbfd, (q15_t)0x254b,
-    (q15_t)0xc04, (q15_t)0x2555, (q15_t)0xc0b, (q15_t)0x255f, (q15_t)0xc13, (q15_t)0x2569, (q15_t)0xc1a, (q15_t)0x2574,
-    (q15_t)0xc21, (q15_t)0x257e, (q15_t)0xc29, (q15_t)0x2588, (q15_t)0xc30, (q15_t)0x2592, (q15_t)0xc38, (q15_t)0x259c,
-    (q15_t)0xc3f, (q15_t)0x25a6, (q15_t)0xc46, (q15_t)0x25b1, (q15_t)0xc4e, (q15_t)0x25bb, (q15_t)0xc55, (q15_t)0x25c5,
-    (q15_t)0xc5d, (q15_t)0x25cf, (q15_t)0xc64, (q15_t)0x25d9, (q15_t)0xc6b, (q15_t)0x25e3, (q15_t)0xc73, (q15_t)0x25ed,
-    (q15_t)0xc7a, (q15_t)0x25f8, (q15_t)0xc82, (q15_t)0x2602, (q15_t)0xc89, (q15_t)0x260c, (q15_t)0xc91, (q15_t)0x2616,
-    (q15_t)0xc98, (q15_t)0x2620, (q15_t)0xca0, (q15_t)0x262a, (q15_t)0xca7, (q15_t)0x2634, (q15_t)0xcaf, (q15_t)0x263e,
-    (q15_t)0xcb6, (q15_t)0x2648, (q15_t)0xcbe, (q15_t)0x2652, (q15_t)0xcc5, (q15_t)0x265c, (q15_t)0xccd, (q15_t)0x2666,
-    (q15_t)0xcd4, (q15_t)0x2671, (q15_t)0xcdc, (q15_t)0x267b, (q15_t)0xce3, (q15_t)0x2685, (q15_t)0xceb, (q15_t)0x268f,
-    (q15_t)0xcf3, (q15_t)0x2699, (q15_t)0xcfa, (q15_t)0x26a3, (q15_t)0xd02, (q15_t)0x26ad, (q15_t)0xd09, (q15_t)0x26b7,
-    (q15_t)0xd11, (q15_t)0x26c1, (q15_t)0xd19, (q15_t)0x26cb, (q15_t)0xd20, (q15_t)0x26d5, (q15_t)0xd28, (q15_t)0x26df,
-    (q15_t)0xd30, (q15_t)0x26e9, (q15_t)0xd37, (q15_t)0x26f3, (q15_t)0xd3f, (q15_t)0x26fd, (q15_t)0xd46, (q15_t)0x2707,
-    (q15_t)0xd4e, (q15_t)0x2711, (q15_t)0xd56, (q15_t)0x271a, (q15_t)0xd5d, (q15_t)0x2724, (q15_t)0xd65, (q15_t)0x272e,
-    (q15_t)0xd6d, (q15_t)0x2738, (q15_t)0xd75, (q15_t)0x2742, (q15_t)0xd7c, (q15_t)0x274c, (q15_t)0xd84, (q15_t)0x2756,
-    (q15_t)0xd8c, (q15_t)0x2760, (q15_t)0xd93, (q15_t)0x276a, (q15_t)0xd9b, (q15_t)0x2774, (q15_t)0xda3, (q15_t)0x277e,
-    (q15_t)0xdab, (q15_t)0x2788, (q15_t)0xdb2, (q15_t)0x2791, (q15_t)0xdba, (q15_t)0x279b, (q15_t)0xdc2, (q15_t)0x27a5,
-    (q15_t)0xdca, (q15_t)0x27af, (q15_t)0xdd2, (q15_t)0x27b9, (q15_t)0xdd9, (q15_t)0x27c3, (q15_t)0xde1, (q15_t)0x27cd,
-    (q15_t)0xde9, (q15_t)0x27d6, (q15_t)0xdf1, (q15_t)0x27e0, (q15_t)0xdf9, (q15_t)0x27ea, (q15_t)0xe01, (q15_t)0x27f4,
-    (q15_t)0xe08, (q15_t)0x27fe, (q15_t)0xe10, (q15_t)0x2808, (q15_t)0xe18, (q15_t)0x2811, (q15_t)0xe20, (q15_t)0x281b,
-    (q15_t)0xe28, (q15_t)0x2825, (q15_t)0xe30, (q15_t)0x282f, (q15_t)0xe38, (q15_t)0x2838, (q15_t)0xe40, (q15_t)0x2842,
-    (q15_t)0xe47, (q15_t)0x284c, (q15_t)0xe4f, (q15_t)0x2856, (q15_t)0xe57, (q15_t)0x2860, (q15_t)0xe5f, (q15_t)0x2869,
-    (q15_t)0xe67, (q15_t)0x2873, (q15_t)0xe6f, (q15_t)0x287d, (q15_t)0xe77, (q15_t)0x2886, (q15_t)0xe7f, (q15_t)0x2890,
-    (q15_t)0xe87, (q15_t)0x289a, (q15_t)0xe8f, (q15_t)0x28a4, (q15_t)0xe97, (q15_t)0x28ad, (q15_t)0xe9f, (q15_t)0x28b7,
-    (q15_t)0xea7, (q15_t)0x28c1, (q15_t)0xeaf, (q15_t)0x28ca, (q15_t)0xeb7, (q15_t)0x28d4, (q15_t)0xebf, (q15_t)0x28de,
-    (q15_t)0xec7, (q15_t)0x28e7, (q15_t)0xecf, (q15_t)0x28f1, (q15_t)0xed7, (q15_t)0x28fb, (q15_t)0xedf, (q15_t)0x2904,
-    (q15_t)0xee7, (q15_t)0x290e, (q15_t)0xeef, (q15_t)0x2918, (q15_t)0xef7, (q15_t)0x2921, (q15_t)0xeff, (q15_t)0x292b,
-    (q15_t)0xf07, (q15_t)0x2935, (q15_t)0xf10, (q15_t)0x293e, (q15_t)0xf18, (q15_t)0x2948, (q15_t)0xf20, (q15_t)0x2951,
-    (q15_t)0xf28, (q15_t)0x295b, (q15_t)0xf30, (q15_t)0x2965, (q15_t)0xf38, (q15_t)0x296e, (q15_t)0xf40, (q15_t)0x2978,
-    (q15_t)0xf48, (q15_t)0x2981, (q15_t)0xf51, (q15_t)0x298b, (q15_t)0xf59, (q15_t)0x2994, (q15_t)0xf61, (q15_t)0x299e,
-    (q15_t)0xf69, (q15_t)0x29a7, (q15_t)0xf71, (q15_t)0x29b1, (q15_t)0xf79, (q15_t)0x29bb, (q15_t)0xf82, (q15_t)0x29c4,
-    (q15_t)0xf8a, (q15_t)0x29ce, (q15_t)0xf92, (q15_t)0x29d7, (q15_t)0xf9a, (q15_t)0x29e1, (q15_t)0xfa3, (q15_t)0x29ea,
-    (q15_t)0xfab, (q15_t)0x29f4, (q15_t)0xfb3, (q15_t)0x29fd, (q15_t)0xfbb, (q15_t)0x2a07, (q15_t)0xfc4, (q15_t)0x2a10,
-    (q15_t)0xfcc, (q15_t)0x2a1a, (q15_t)0xfd4, (q15_t)0x2a23, (q15_t)0xfdc, (q15_t)0x2a2c, (q15_t)0xfe5, (q15_t)0x2a36,
-    (q15_t)0xfed, (q15_t)0x2a3f, (q15_t)0xff5, (q15_t)0x2a49, (q15_t)0xffe, (q15_t)0x2a52, (q15_t)0x1006, (q15_t)0x2a5c,
-    (q15_t)0x100e, (q15_t)0x2a65, (q15_t)0x1016, (q15_t)0x2a6e, (q15_t)0x101f, (q15_t)0x2a78, (q15_t)0x1027, (q15_t)0x2a81,
-    (q15_t)0x1030, (q15_t)0x2a8b, (q15_t)0x1038, (q15_t)0x2a94, (q15_t)0x1040, (q15_t)0x2a9d, (q15_t)0x1049, (q15_t)0x2aa7,
-    (q15_t)0x1051, (q15_t)0x2ab0, (q15_t)0x1059, (q15_t)0x2ab9, (q15_t)0x1062, (q15_t)0x2ac3, (q15_t)0x106a, (q15_t)0x2acc,
-    (q15_t)0x1073, (q15_t)0x2ad6, (q15_t)0x107b, (q15_t)0x2adf, (q15_t)0x1083, (q15_t)0x2ae8, (q15_t)0x108c, (q15_t)0x2af2,
-    (q15_t)0x1094, (q15_t)0x2afb, (q15_t)0x109d, (q15_t)0x2b04, (q15_t)0x10a5, (q15_t)0x2b0d, (q15_t)0x10ae, (q15_t)0x2b17,
-    (q15_t)0x10b6, (q15_t)0x2b20, (q15_t)0x10bf, (q15_t)0x2b29, (q15_t)0x10c7, (q15_t)0x2b33, (q15_t)0x10d0, (q15_t)0x2b3c,
-    (q15_t)0x10d8, (q15_t)0x2b45, (q15_t)0x10e0, (q15_t)0x2b4e, (q15_t)0x10e9, (q15_t)0x2b58, (q15_t)0x10f2, (q15_t)0x2b61,
-    (q15_t)0x10fa, (q15_t)0x2b6a, (q15_t)0x1103, (q15_t)0x2b73, (q15_t)0x110b, (q15_t)0x2b7d, (q15_t)0x1114, (q15_t)0x2b86,
-    (q15_t)0x111c, (q15_t)0x2b8f, (q15_t)0x1125, (q15_t)0x2b98, (q15_t)0x112d, (q15_t)0x2ba1, (q15_t)0x1136, (q15_t)0x2bab,
-    (q15_t)0x113e, (q15_t)0x2bb4, (q15_t)0x1147, (q15_t)0x2bbd, (q15_t)0x1150, (q15_t)0x2bc6, (q15_t)0x1158, (q15_t)0x2bcf,
-    (q15_t)0x1161, (q15_t)0x2bd8, (q15_t)0x1169, (q15_t)0x2be2, (q15_t)0x1172, (q15_t)0x2beb, (q15_t)0x117b, (q15_t)0x2bf4,
-    (q15_t)0x1183, (q15_t)0x2bfd, (q15_t)0x118c, (q15_t)0x2c06, (q15_t)0x1195, (q15_t)0x2c0f, (q15_t)0x119d, (q15_t)0x2c18,
-    (q15_t)0x11a6, (q15_t)0x2c21, (q15_t)0x11af, (q15_t)0x2c2b, (q15_t)0x11b7, (q15_t)0x2c34, (q15_t)0x11c0, (q15_t)0x2c3d,
-    (q15_t)0x11c9, (q15_t)0x2c46, (q15_t)0x11d1, (q15_t)0x2c4f, (q15_t)0x11da, (q15_t)0x2c58, (q15_t)0x11e3, (q15_t)0x2c61,
-    (q15_t)0x11eb, (q15_t)0x2c6a, (q15_t)0x11f4, (q15_t)0x2c73, (q15_t)0x11fd, (q15_t)0x2c7c, (q15_t)0x1206, (q15_t)0x2c85,
-    (q15_t)0x120e, (q15_t)0x2c8e, (q15_t)0x1217, (q15_t)0x2c97, (q15_t)0x1220, (q15_t)0x2ca0, (q15_t)0x1229, (q15_t)0x2ca9,
-    (q15_t)0x1231, (q15_t)0x2cb2, (q15_t)0x123a, (q15_t)0x2cbb, (q15_t)0x1243, (q15_t)0x2cc4, (q15_t)0x124c, (q15_t)0x2ccd,
-    (q15_t)0x1255, (q15_t)0x2cd6, (q15_t)0x125d, (q15_t)0x2cdf, (q15_t)0x1266, (q15_t)0x2ce8, (q15_t)0x126f, (q15_t)0x2cf1,
-    (q15_t)0x1278, (q15_t)0x2cfa, (q15_t)0x1281, (q15_t)0x2d03, (q15_t)0x128a, (q15_t)0x2d0c, (q15_t)0x1292, (q15_t)0x2d15,
-    (q15_t)0x129b, (q15_t)0x2d1e, (q15_t)0x12a4, (q15_t)0x2d27, (q15_t)0x12ad, (q15_t)0x2d2f, (q15_t)0x12b6, (q15_t)0x2d38,
-    (q15_t)0x12bf, (q15_t)0x2d41, (q15_t)0x12c8, (q15_t)0x2d4a, (q15_t)0x12d1, (q15_t)0x2d53, (q15_t)0x12d9, (q15_t)0x2d5c,
-    (q15_t)0x12e2, (q15_t)0x2d65, (q15_t)0x12eb, (q15_t)0x2d6e, (q15_t)0x12f4, (q15_t)0x2d76, (q15_t)0x12fd, (q15_t)0x2d7f,
-    (q15_t)0x1306, (q15_t)0x2d88, (q15_t)0x130f, (q15_t)0x2d91, (q15_t)0x1318, (q15_t)0x2d9a, (q15_t)0x1321, (q15_t)0x2da3,
-    (q15_t)0x132a, (q15_t)0x2dab, (q15_t)0x1333, (q15_t)0x2db4, (q15_t)0x133c, (q15_t)0x2dbd, (q15_t)0x1345, (q15_t)0x2dc6,
-    (q15_t)0x134e, (q15_t)0x2dcf, (q15_t)0x1357, (q15_t)0x2dd7, (q15_t)0x1360, (q15_t)0x2de0, (q15_t)0x1369, (q15_t)0x2de9,
-    (q15_t)0x1372, (q15_t)0x2df2, (q15_t)0x137b, (q15_t)0x2dfa, (q15_t)0x1384, (q15_t)0x2e03, (q15_t)0x138d, (q15_t)0x2e0c,
-    (q15_t)0x1396, (q15_t)0x2e15, (q15_t)0x139f, (q15_t)0x2e1d, (q15_t)0x13a8, (q15_t)0x2e26, (q15_t)0x13b1, (q15_t)0x2e2f,
-    (q15_t)0x13ba, (q15_t)0x2e37, (q15_t)0x13c3, (q15_t)0x2e40, (q15_t)0x13cc, (q15_t)0x2e49, (q15_t)0x13d5, (q15_t)0x2e51,
-    (q15_t)0x13df, (q15_t)0x2e5a, (q15_t)0x13e8, (q15_t)0x2e63, (q15_t)0x13f1, (q15_t)0x2e6b, (q15_t)0x13fa, (q15_t)0x2e74,
-    (q15_t)0x1403, (q15_t)0x2e7d, (q15_t)0x140c, (q15_t)0x2e85, (q15_t)0x1415, (q15_t)0x2e8e, (q15_t)0x141e, (q15_t)0x2e97,
-    (q15_t)0x1428, (q15_t)0x2e9f, (q15_t)0x1431, (q15_t)0x2ea8, (q15_t)0x143a, (q15_t)0x2eb0, (q15_t)0x1443, (q15_t)0x2eb9,
-    (q15_t)0x144c, (q15_t)0x2ec2, (q15_t)0x1455, (q15_t)0x2eca, (q15_t)0x145f, (q15_t)0x2ed3, (q15_t)0x1468, (q15_t)0x2edb,
-    (q15_t)0x1471, (q15_t)0x2ee4, (q15_t)0x147a, (q15_t)0x2eec, (q15_t)0x1483, (q15_t)0x2ef5, (q15_t)0x148d, (q15_t)0x2efd,
-    (q15_t)0x1496, (q15_t)0x2f06, (q15_t)0x149f, (q15_t)0x2f0e, (q15_t)0x14a8, (q15_t)0x2f17, (q15_t)0x14b2, (q15_t)0x2f20,
-    (q15_t)0x14bb, (q15_t)0x2f28, (q15_t)0x14c4, (q15_t)0x2f30, (q15_t)0x14cd, (q15_t)0x2f39, (q15_t)0x14d7, (q15_t)0x2f41,
-    (q15_t)0x14e0, (q15_t)0x2f4a, (q15_t)0x14e9, (q15_t)0x2f52, (q15_t)0x14f3, (q15_t)0x2f5b, (q15_t)0x14fc, (q15_t)0x2f63,
-    (q15_t)0x1505, (q15_t)0x2f6c, (q15_t)0x150e, (q15_t)0x2f74, (q15_t)0x1518, (q15_t)0x2f7d, (q15_t)0x1521, (q15_t)0x2f85,
-    (q15_t)0x152a, (q15_t)0x2f8d, (q15_t)0x1534, (q15_t)0x2f96, (q15_t)0x153d, (q15_t)0x2f9e, (q15_t)0x1547, (q15_t)0x2fa7,
-    (q15_t)0x1550, (q15_t)0x2faf, (q15_t)0x1559, (q15_t)0x2fb7, (q15_t)0x1563, (q15_t)0x2fc0, (q15_t)0x156c, (q15_t)0x2fc8,
-    (q15_t)0x1575, (q15_t)0x2fd0, (q15_t)0x157f, (q15_t)0x2fd9, (q15_t)0x1588, (q15_t)0x2fe1, (q15_t)0x1592, (q15_t)0x2fea,
-    (q15_t)0x159b, (q15_t)0x2ff2, (q15_t)0x15a4, (q15_t)0x2ffa, (q15_t)0x15ae, (q15_t)0x3002, (q15_t)0x15b7, (q15_t)0x300b,
-    (q15_t)0x15c1, (q15_t)0x3013, (q15_t)0x15ca, (q15_t)0x301b, (q15_t)0x15d4, (q15_t)0x3024, (q15_t)0x15dd, (q15_t)0x302c,
-    (q15_t)0x15e6, (q15_t)0x3034, (q15_t)0x15f0, (q15_t)0x303c, (q15_t)0x15f9, (q15_t)0x3045, (q15_t)0x1603, (q15_t)0x304d,
-    (q15_t)0x160c, (q15_t)0x3055, (q15_t)0x1616, (q15_t)0x305d, (q15_t)0x161f, (q15_t)0x3066, (q15_t)0x1629, (q15_t)0x306e,
-    (q15_t)0x1632, (q15_t)0x3076, (q15_t)0x163c, (q15_t)0x307e, (q15_t)0x1645, (q15_t)0x3087, (q15_t)0x164f, (q15_t)0x308f,
-    (q15_t)0x1659, (q15_t)0x3097, (q15_t)0x1662, (q15_t)0x309f, (q15_t)0x166c, (q15_t)0x30a7, (q15_t)0x1675, (q15_t)0x30af,
-    (q15_t)0x167f, (q15_t)0x30b8, (q15_t)0x1688, (q15_t)0x30c0, (q15_t)0x1692, (q15_t)0x30c8, (q15_t)0x169b, (q15_t)0x30d0,
-    (q15_t)0x16a5, (q15_t)0x30d8, (q15_t)0x16af, (q15_t)0x30e0, (q15_t)0x16b8, (q15_t)0x30e8, (q15_t)0x16c2, (q15_t)0x30f0,
-    (q15_t)0x16cb, (q15_t)0x30f9, (q15_t)0x16d5, (q15_t)0x3101, (q15_t)0x16df, (q15_t)0x3109, (q15_t)0x16e8, (q15_t)0x3111,
-    (q15_t)0x16f2, (q15_t)0x3119, (q15_t)0x16fc, (q15_t)0x3121, (q15_t)0x1705, (q15_t)0x3129, (q15_t)0x170f, (q15_t)0x3131,
-    (q15_t)0x1719, (q15_t)0x3139, (q15_t)0x1722, (q15_t)0x3141, (q15_t)0x172c, (q15_t)0x3149, (q15_t)0x1736, (q15_t)0x3151,
-    (q15_t)0x173f, (q15_t)0x3159, (q15_t)0x1749, (q15_t)0x3161, (q15_t)0x1753, (q15_t)0x3169, (q15_t)0x175c, (q15_t)0x3171,
-    (q15_t)0x1766, (q15_t)0x3179, (q15_t)0x1770, (q15_t)0x3181, (q15_t)0x177a, (q15_t)0x3189, (q15_t)0x1783, (q15_t)0x3191,
-    (q15_t)0x178d, (q15_t)0x3199, (q15_t)0x1797, (q15_t)0x31a1, (q15_t)0x17a0, (q15_t)0x31a9, (q15_t)0x17aa, (q15_t)0x31b1,
-    (q15_t)0x17b4, (q15_t)0x31b9, (q15_t)0x17be, (q15_t)0x31c0, (q15_t)0x17c8, (q15_t)0x31c8, (q15_t)0x17d1, (q15_t)0x31d0,
-    (q15_t)0x17db, (q15_t)0x31d8, (q15_t)0x17e5, (q15_t)0x31e0, (q15_t)0x17ef, (q15_t)0x31e8, (q15_t)0x17f8, (q15_t)0x31f0,
-    (q15_t)0x1802, (q15_t)0x31f8, (q15_t)0x180c, (q15_t)0x31ff, (q15_t)0x1816, (q15_t)0x3207, (q15_t)0x1820, (q15_t)0x320f,
-    (q15_t)0x182a, (q15_t)0x3217, (q15_t)0x1833, (q15_t)0x321f, (q15_t)0x183d, (q15_t)0x3227, (q15_t)0x1847, (q15_t)0x322e,
-    (q15_t)0x1851, (q15_t)0x3236, (q15_t)0x185b, (q15_t)0x323e, (q15_t)0x1865, (q15_t)0x3246, (q15_t)0x186f, (q15_t)0x324e,
-    (q15_t)0x1878, (q15_t)0x3255, (q15_t)0x1882, (q15_t)0x325d, (q15_t)0x188c, (q15_t)0x3265, (q15_t)0x1896, (q15_t)0x326d,
-    (q15_t)0x18a0, (q15_t)0x3274, (q15_t)0x18aa, (q15_t)0x327c, (q15_t)0x18b4, (q15_t)0x3284, (q15_t)0x18be, (q15_t)0x328b,
-    (q15_t)0x18c8, (q15_t)0x3293, (q15_t)0x18d2, (q15_t)0x329b, (q15_t)0x18dc, (q15_t)0x32a3, (q15_t)0x18e6, (q15_t)0x32aa,
-    (q15_t)0x18ef, (q15_t)0x32b2, (q15_t)0x18f9, (q15_t)0x32ba, (q15_t)0x1903, (q15_t)0x32c1, (q15_t)0x190d, (q15_t)0x32c9,
-    (q15_t)0x1917, (q15_t)0x32d0, (q15_t)0x1921, (q15_t)0x32d8, (q15_t)0x192b, (q15_t)0x32e0, (q15_t)0x1935, (q15_t)0x32e7,
-    (q15_t)0x193f, (q15_t)0x32ef, (q15_t)0x1949, (q15_t)0x32f7, (q15_t)0x1953, (q15_t)0x32fe, (q15_t)0x195d, (q15_t)0x3306,
-    (q15_t)0x1967, (q15_t)0x330d, (q15_t)0x1971, (q15_t)0x3315, (q15_t)0x197b, (q15_t)0x331d, (q15_t)0x1985, (q15_t)0x3324,
-    (q15_t)0x198f, (q15_t)0x332c, (q15_t)0x199a, (q15_t)0x3333, (q15_t)0x19a4, (q15_t)0x333b, (q15_t)0x19ae, (q15_t)0x3342,
-    (q15_t)0x19b8, (q15_t)0x334a, (q15_t)0x19c2, (q15_t)0x3351, (q15_t)0x19cc, (q15_t)0x3359, (q15_t)0x19d6, (q15_t)0x3360,
-    (q15_t)0x19e0, (q15_t)0x3368, (q15_t)0x19ea, (q15_t)0x336f, (q15_t)0x19f4, (q15_t)0x3377, (q15_t)0x19fe, (q15_t)0x337e,
-    (q15_t)0x1a08, (q15_t)0x3386, (q15_t)0x1a13, (q15_t)0x338d, (q15_t)0x1a1d, (q15_t)0x3395, (q15_t)0x1a27, (q15_t)0x339c,
-    (q15_t)0x1a31, (q15_t)0x33a3, (q15_t)0x1a3b, (q15_t)0x33ab, (q15_t)0x1a45, (q15_t)0x33b2, (q15_t)0x1a4f, (q15_t)0x33ba,
-    (q15_t)0x1a5a, (q15_t)0x33c1, (q15_t)0x1a64, (q15_t)0x33c8, (q15_t)0x1a6e, (q15_t)0x33d0, (q15_t)0x1a78, (q15_t)0x33d7,
-    (q15_t)0x1a82, (q15_t)0x33df, (q15_t)0x1a8c, (q15_t)0x33e6, (q15_t)0x1a97, (q15_t)0x33ed, (q15_t)0x1aa1, (q15_t)0x33f5,
-    (q15_t)0x1aab, (q15_t)0x33fc, (q15_t)0x1ab5, (q15_t)0x3403, (q15_t)0x1abf, (q15_t)0x340b, (q15_t)0x1aca, (q15_t)0x3412,
-    (q15_t)0x1ad4, (q15_t)0x3419, (q15_t)0x1ade, (q15_t)0x3420, (q15_t)0x1ae8, (q15_t)0x3428, (q15_t)0x1af3, (q15_t)0x342f,
-    (q15_t)0x1afd, (q15_t)0x3436, (q15_t)0x1b07, (q15_t)0x343e, (q15_t)0x1b11, (q15_t)0x3445, (q15_t)0x1b1c, (q15_t)0x344c,
-    (q15_t)0x1b26, (q15_t)0x3453, (q15_t)0x1b30, (q15_t)0x345b, (q15_t)0x1b3b, (q15_t)0x3462, (q15_t)0x1b45, (q15_t)0x3469,
-    (q15_t)0x1b4f, (q15_t)0x3470, (q15_t)0x1b59, (q15_t)0x3477, (q15_t)0x1b64, (q15_t)0x347f, (q15_t)0x1b6e, (q15_t)0x3486,
-    (q15_t)0x1b78, (q15_t)0x348d, (q15_t)0x1b83, (q15_t)0x3494, (q15_t)0x1b8d, (q15_t)0x349b, (q15_t)0x1b97, (q15_t)0x34a2,
-    (q15_t)0x1ba2, (q15_t)0x34aa, (q15_t)0x1bac, (q15_t)0x34b1, (q15_t)0x1bb6, (q15_t)0x34b8, (q15_t)0x1bc1, (q15_t)0x34bf,
-    (q15_t)0x1bcb, (q15_t)0x34c6, (q15_t)0x1bd5, (q15_t)0x34cd, (q15_t)0x1be0, (q15_t)0x34d4, (q15_t)0x1bea, (q15_t)0x34db,
-    (q15_t)0x1bf5, (q15_t)0x34e2, (q15_t)0x1bff, (q15_t)0x34ea, (q15_t)0x1c09, (q15_t)0x34f1, (q15_t)0x1c14, (q15_t)0x34f8,
-    (q15_t)0x1c1e, (q15_t)0x34ff, (q15_t)0x1c29, (q15_t)0x3506, (q15_t)0x1c33, (q15_t)0x350d, (q15_t)0x1c3d, (q15_t)0x3514,
-    (q15_t)0x1c48, (q15_t)0x351b, (q15_t)0x1c52, (q15_t)0x3522, (q15_t)0x1c5d, (q15_t)0x3529, (q15_t)0x1c67, (q15_t)0x3530,
-    (q15_t)0x1c72, (q15_t)0x3537, (q15_t)0x1c7c, (q15_t)0x353e, (q15_t)0x1c86, (q15_t)0x3545, (q15_t)0x1c91, (q15_t)0x354c,
-    (q15_t)0x1c9b, (q15_t)0x3553, (q15_t)0x1ca6, (q15_t)0x355a, (q15_t)0x1cb0, (q15_t)0x3561, (q15_t)0x1cbb, (q15_t)0x3567,
-    (q15_t)0x1cc5, (q15_t)0x356e, (q15_t)0x1cd0, (q15_t)0x3575, (q15_t)0x1cda, (q15_t)0x357c, (q15_t)0x1ce5, (q15_t)0x3583,
-    (q15_t)0x1cef, (q15_t)0x358a, (q15_t)0x1cfa, (q15_t)0x3591, (q15_t)0x1d04, (q15_t)0x3598, (q15_t)0x1d0f, (q15_t)0x359f,
-    (q15_t)0x1d19, (q15_t)0x35a5, (q15_t)0x1d24, (q15_t)0x35ac, (q15_t)0x1d2e, (q15_t)0x35b3, (q15_t)0x1d39, (q15_t)0x35ba,
-    (q15_t)0x1d44, (q15_t)0x35c1, (q15_t)0x1d4e, (q15_t)0x35c8, (q15_t)0x1d59, (q15_t)0x35ce, (q15_t)0x1d63, (q15_t)0x35d5,
-    (q15_t)0x1d6e, (q15_t)0x35dc, (q15_t)0x1d78, (q15_t)0x35e3, (q15_t)0x1d83, (q15_t)0x35ea, (q15_t)0x1d8e, (q15_t)0x35f0,
-    (q15_t)0x1d98, (q15_t)0x35f7, (q15_t)0x1da3, (q15_t)0x35fe, (q15_t)0x1dad, (q15_t)0x3605, (q15_t)0x1db8, (q15_t)0x360b,
-    (q15_t)0x1dc3, (q15_t)0x3612, (q15_t)0x1dcd, (q15_t)0x3619, (q15_t)0x1dd8, (q15_t)0x3620, (q15_t)0x1de2, (q15_t)0x3626,
-    (q15_t)0x1ded, (q15_t)0x362d, (q15_t)0x1df8, (q15_t)0x3634, (q15_t)0x1e02, (q15_t)0x363a, (q15_t)0x1e0d, (q15_t)0x3641,
-    (q15_t)0x1e18, (q15_t)0x3648, (q15_t)0x1e22, (q15_t)0x364e, (q15_t)0x1e2d, (q15_t)0x3655, (q15_t)0x1e38, (q15_t)0x365c,
-    (q15_t)0x1e42, (q15_t)0x3662, (q15_t)0x1e4d, (q15_t)0x3669, (q15_t)0x1e58, (q15_t)0x366f, (q15_t)0x1e62, (q15_t)0x3676,
-    (q15_t)0x1e6d, (q15_t)0x367d, (q15_t)0x1e78, (q15_t)0x3683, (q15_t)0x1e83, (q15_t)0x368a, (q15_t)0x1e8d, (q15_t)0x3690,
-    (q15_t)0x1e98, (q15_t)0x3697, (q15_t)0x1ea3, (q15_t)0x369d, (q15_t)0x1ead, (q15_t)0x36a4, (q15_t)0x1eb8, (q15_t)0x36ab,
-    (q15_t)0x1ec3, (q15_t)0x36b1, (q15_t)0x1ece, (q15_t)0x36b8, (q15_t)0x1ed8, (q15_t)0x36be, (q15_t)0x1ee3, (q15_t)0x36c5,
-    (q15_t)0x1eee, (q15_t)0x36cb, (q15_t)0x1ef9, (q15_t)0x36d2, (q15_t)0x1f03, (q15_t)0x36d8, (q15_t)0x1f0e, (q15_t)0x36df,
-    (q15_t)0x1f19, (q15_t)0x36e5, (q15_t)0x1f24, (q15_t)0x36eb, (q15_t)0x1f2f, (q15_t)0x36f2, (q15_t)0x1f39, (q15_t)0x36f8,
-    (q15_t)0x1f44, (q15_t)0x36ff, (q15_t)0x1f4f, (q15_t)0x3705, (q15_t)0x1f5a, (q15_t)0x370c, (q15_t)0x1f65, (q15_t)0x3712,
-    (q15_t)0x1f6f, (q15_t)0x3718, (q15_t)0x1f7a, (q15_t)0x371f, (q15_t)0x1f85, (q15_t)0x3725, (q15_t)0x1f90, (q15_t)0x372c,
-    (q15_t)0x1f9b, (q15_t)0x3732, (q15_t)0x1fa5, (q15_t)0x3738, (q15_t)0x1fb0, (q15_t)0x373f, (q15_t)0x1fbb, (q15_t)0x3745,
-    (q15_t)0x1fc6, (q15_t)0x374b, (q15_t)0x1fd1, (q15_t)0x3752, (q15_t)0x1fdc, (q15_t)0x3758, (q15_t)0x1fe7, (q15_t)0x375e,
-    (q15_t)0x1ff1, (q15_t)0x3765, (q15_t)0x1ffc, (q15_t)0x376b, (q15_t)0x2007, (q15_t)0x3771, (q15_t)0x2012, (q15_t)0x3777,
-    (q15_t)0x201d, (q15_t)0x377e, (q15_t)0x2028, (q15_t)0x3784, (q15_t)0x2033, (q15_t)0x378a, (q15_t)0x203e, (q15_t)0x3790,
-    (q15_t)0x2049, (q15_t)0x3797, (q15_t)0x2054, (q15_t)0x379d, (q15_t)0x205e, (q15_t)0x37a3, (q15_t)0x2069, (q15_t)0x37a9,
-    (q15_t)0x2074, (q15_t)0x37b0, (q15_t)0x207f, (q15_t)0x37b6, (q15_t)0x208a, (q15_t)0x37bc, (q15_t)0x2095, (q15_t)0x37c2,
-    (q15_t)0x20a0, (q15_t)0x37c8, (q15_t)0x20ab, (q15_t)0x37ce, (q15_t)0x20b6, (q15_t)0x37d5, (q15_t)0x20c1, (q15_t)0x37db,
-    (q15_t)0x20cc, (q15_t)0x37e1, (q15_t)0x20d7, (q15_t)0x37e7, (q15_t)0x20e2, (q15_t)0x37ed, (q15_t)0x20ed, (q15_t)0x37f3,
-    (q15_t)0x20f8, (q15_t)0x37f9, (q15_t)0x2103, (q15_t)0x37ff, (q15_t)0x210e, (q15_t)0x3805, (q15_t)0x2119, (q15_t)0x380b,
-    (q15_t)0x2124, (q15_t)0x3812, (q15_t)0x212f, (q15_t)0x3818, (q15_t)0x213a, (q15_t)0x381e, (q15_t)0x2145, (q15_t)0x3824,
-    (q15_t)0x2150, (q15_t)0x382a, (q15_t)0x215b, (q15_t)0x3830, (q15_t)0x2166, (q15_t)0x3836, (q15_t)0x2171, (q15_t)0x383c,
-    (q15_t)0x217c, (q15_t)0x3842, (q15_t)0x2187, (q15_t)0x3848, (q15_t)0x2192, (q15_t)0x384e, (q15_t)0x219d, (q15_t)0x3854,
-    (q15_t)0x21a8, (q15_t)0x385a, (q15_t)0x21b3, (q15_t)0x3860, (q15_t)0x21be, (q15_t)0x3866, (q15_t)0x21ca, (q15_t)0x386b,
-    (q15_t)0x21d5, (q15_t)0x3871, (q15_t)0x21e0, (q15_t)0x3877, (q15_t)0x21eb, (q15_t)0x387d, (q15_t)0x21f6, (q15_t)0x3883,
-    (q15_t)0x2201, (q15_t)0x3889, (q15_t)0x220c, (q15_t)0x388f, (q15_t)0x2217, (q15_t)0x3895, (q15_t)0x2222, (q15_t)0x389b,
-    (q15_t)0x222d, (q15_t)0x38a1, (q15_t)0x2239, (q15_t)0x38a6, (q15_t)0x2244, (q15_t)0x38ac, (q15_t)0x224f, (q15_t)0x38b2,
-    (q15_t)0x225a, (q15_t)0x38b8, (q15_t)0x2265, (q15_t)0x38be, (q15_t)0x2270, (q15_t)0x38c3, (q15_t)0x227b, (q15_t)0x38c9,
-    (q15_t)0x2287, (q15_t)0x38cf, (q15_t)0x2292, (q15_t)0x38d5, (q15_t)0x229d, (q15_t)0x38db, (q15_t)0x22a8, (q15_t)0x38e0,
-    (q15_t)0x22b3, (q15_t)0x38e6, (q15_t)0x22be, (q15_t)0x38ec, (q15_t)0x22ca, (q15_t)0x38f2, (q15_t)0x22d5, (q15_t)0x38f7,
-    (q15_t)0x22e0, (q15_t)0x38fd, (q15_t)0x22eb, (q15_t)0x3903, (q15_t)0x22f6, (q15_t)0x3909, (q15_t)0x2301, (q15_t)0x390e,
-    (q15_t)0x230d, (q15_t)0x3914, (q15_t)0x2318, (q15_t)0x391a, (q15_t)0x2323, (q15_t)0x391f, (q15_t)0x232e, (q15_t)0x3925,
-    (q15_t)0x233a, (q15_t)0x392b, (q15_t)0x2345, (q15_t)0x3930, (q15_t)0x2350, (q15_t)0x3936, (q15_t)0x235b, (q15_t)0x393b,
-    (q15_t)0x2367, (q15_t)0x3941, (q15_t)0x2372, (q15_t)0x3947, (q15_t)0x237d, (q15_t)0x394c, (q15_t)0x2388, (q15_t)0x3952,
-    (q15_t)0x2394, (q15_t)0x3958, (q15_t)0x239f, (q15_t)0x395d, (q15_t)0x23aa, (q15_t)0x3963, (q15_t)0x23b5, (q15_t)0x3968,
-    (q15_t)0x23c1, (q15_t)0x396e, (q15_t)0x23cc, (q15_t)0x3973, (q15_t)0x23d7, (q15_t)0x3979, (q15_t)0x23e2, (q15_t)0x397e,
-    (q15_t)0x23ee, (q15_t)0x3984, (q15_t)0x23f9, (q15_t)0x3989, (q15_t)0x2404, (q15_t)0x398f, (q15_t)0x2410, (q15_t)0x3994,
-    (q15_t)0x241b, (q15_t)0x399a, (q15_t)0x2426, (q15_t)0x399f, (q15_t)0x2432, (q15_t)0x39a5, (q15_t)0x243d, (q15_t)0x39aa,
-    (q15_t)0x2448, (q15_t)0x39b0, (q15_t)0x2454, (q15_t)0x39b5, (q15_t)0x245f, (q15_t)0x39bb, (q15_t)0x246a, (q15_t)0x39c0,
-    (q15_t)0x2476, (q15_t)0x39c5, (q15_t)0x2481, (q15_t)0x39cb, (q15_t)0x248c, (q15_t)0x39d0, (q15_t)0x2498, (q15_t)0x39d6,
-    (q15_t)0x24a3, (q15_t)0x39db, (q15_t)0x24ae, (q15_t)0x39e0, (q15_t)0x24ba, (q15_t)0x39e6, (q15_t)0x24c5, (q15_t)0x39eb,
-    (q15_t)0x24d0, (q15_t)0x39f0, (q15_t)0x24dc, (q15_t)0x39f6, (q15_t)0x24e7, (q15_t)0x39fb, (q15_t)0x24f3, (q15_t)0x3a00,
-    (q15_t)0x24fe, (q15_t)0x3a06, (q15_t)0x2509, (q15_t)0x3a0b, (q15_t)0x2515, (q15_t)0x3a10, (q15_t)0x2520, (q15_t)0x3a16,
-    (q15_t)0x252c, (q15_t)0x3a1b, (q15_t)0x2537, (q15_t)0x3a20, (q15_t)0x2542, (q15_t)0x3a25, (q15_t)0x254e, (q15_t)0x3a2b,
-    (q15_t)0x2559, (q15_t)0x3a30, (q15_t)0x2565, (q15_t)0x3a35, (q15_t)0x2570, (q15_t)0x3a3a, (q15_t)0x257c, (q15_t)0x3a3f,
-    (q15_t)0x2587, (q15_t)0x3a45, (q15_t)0x2592, (q15_t)0x3a4a, (q15_t)0x259e, (q15_t)0x3a4f, (q15_t)0x25a9, (q15_t)0x3a54,
-    (q15_t)0x25b5, (q15_t)0x3a59, (q15_t)0x25c0, (q15_t)0x3a5f, (q15_t)0x25cc, (q15_t)0x3a64, (q15_t)0x25d7, (q15_t)0x3a69,
-    (q15_t)0x25e3, (q15_t)0x3a6e, (q15_t)0x25ee, (q15_t)0x3a73, (q15_t)0x25fa, (q15_t)0x3a78, (q15_t)0x2605, (q15_t)0x3a7d,
-    (q15_t)0x2611, (q15_t)0x3a82, (q15_t)0x261c, (q15_t)0x3a88, (q15_t)0x2628, (q15_t)0x3a8d, (q15_t)0x2633, (q15_t)0x3a92,
-    (q15_t)0x263f, (q15_t)0x3a97, (q15_t)0x264a, (q15_t)0x3a9c, (q15_t)0x2656, (q15_t)0x3aa1, (q15_t)0x2661, (q15_t)0x3aa6,
-    (q15_t)0x266d, (q15_t)0x3aab, (q15_t)0x2678, (q15_t)0x3ab0, (q15_t)0x2684, (q15_t)0x3ab5, (q15_t)0x268f, (q15_t)0x3aba,
-    (q15_t)0x269b, (q15_t)0x3abf, (q15_t)0x26a6, (q15_t)0x3ac4, (q15_t)0x26b2, (q15_t)0x3ac9, (q15_t)0x26bd, (q15_t)0x3ace,
-    (q15_t)0x26c9, (q15_t)0x3ad3, (q15_t)0x26d4, (q15_t)0x3ad8, (q15_t)0x26e0, (q15_t)0x3add, (q15_t)0x26ec, (q15_t)0x3ae2,
-    (q15_t)0x26f7, (q15_t)0x3ae6, (q15_t)0x2703, (q15_t)0x3aeb, (q15_t)0x270e, (q15_t)0x3af0, (q15_t)0x271a, (q15_t)0x3af5,
-    (q15_t)0x2725, (q15_t)0x3afa, (q15_t)0x2731, (q15_t)0x3aff, (q15_t)0x273d, (q15_t)0x3b04, (q15_t)0x2748, (q15_t)0x3b09,
-    (q15_t)0x2754, (q15_t)0x3b0e, (q15_t)0x275f, (q15_t)0x3b12, (q15_t)0x276b, (q15_t)0x3b17, (q15_t)0x2777, (q15_t)0x3b1c,
-    (q15_t)0x2782, (q15_t)0x3b21, (q15_t)0x278e, (q15_t)0x3b26, (q15_t)0x2799, (q15_t)0x3b2a, (q15_t)0x27a5, (q15_t)0x3b2f,
-    (q15_t)0x27b1, (q15_t)0x3b34, (q15_t)0x27bc, (q15_t)0x3b39, (q15_t)0x27c8, (q15_t)0x3b3e, (q15_t)0x27d3, (q15_t)0x3b42,
-    (q15_t)0x27df, (q15_t)0x3b47, (q15_t)0x27eb, (q15_t)0x3b4c, (q15_t)0x27f6, (q15_t)0x3b50, (q15_t)0x2802, (q15_t)0x3b55,
-    (q15_t)0x280e, (q15_t)0x3b5a, (q15_t)0x2819, (q15_t)0x3b5f, (q15_t)0x2825, (q15_t)0x3b63, (q15_t)0x2831, (q15_t)0x3b68,
-    (q15_t)0x283c, (q15_t)0x3b6d, (q15_t)0x2848, (q15_t)0x3b71, (q15_t)0x2854, (q15_t)0x3b76, (q15_t)0x285f, (q15_t)0x3b7b,
-    (q15_t)0x286b, (q15_t)0x3b7f, (q15_t)0x2877, (q15_t)0x3b84, (q15_t)0x2882, (q15_t)0x3b88, (q15_t)0x288e, (q15_t)0x3b8d,
-    (q15_t)0x289a, (q15_t)0x3b92, (q15_t)0x28a5, (q15_t)0x3b96, (q15_t)0x28b1, (q15_t)0x3b9b, (q15_t)0x28bd, (q15_t)0x3b9f,
-    (q15_t)0x28c9, (q15_t)0x3ba4, (q15_t)0x28d4, (q15_t)0x3ba9, (q15_t)0x28e0, (q15_t)0x3bad, (q15_t)0x28ec, (q15_t)0x3bb2,
-    (q15_t)0x28f7, (q15_t)0x3bb6, (q15_t)0x2903, (q15_t)0x3bbb, (q15_t)0x290f, (q15_t)0x3bbf, (q15_t)0x291b, (q15_t)0x3bc4,
-    (q15_t)0x2926, (q15_t)0x3bc8, (q15_t)0x2932, (q15_t)0x3bcd, (q15_t)0x293e, (q15_t)0x3bd1, (q15_t)0x294a, (q15_t)0x3bd6,
-    (q15_t)0x2955, (q15_t)0x3bda, (q15_t)0x2961, (q15_t)0x3bde, (q15_t)0x296d, (q15_t)0x3be3, (q15_t)0x2979, (q15_t)0x3be7,
-    (q15_t)0x2984, (q15_t)0x3bec, (q15_t)0x2990, (q15_t)0x3bf0, (q15_t)0x299c, (q15_t)0x3bf5, (q15_t)0x29a8, (q15_t)0x3bf9,
-    (q15_t)0x29b4, (q15_t)0x3bfd, (q15_t)0x29bf, (q15_t)0x3c02, (q15_t)0x29cb, (q15_t)0x3c06, (q15_t)0x29d7, (q15_t)0x3c0a,
-    (q15_t)0x29e3, (q15_t)0x3c0f, (q15_t)0x29ee, (q15_t)0x3c13, (q15_t)0x29fa, (q15_t)0x3c17, (q15_t)0x2a06, (q15_t)0x3c1c,
-    (q15_t)0x2a12, (q15_t)0x3c20, (q15_t)0x2a1e, (q15_t)0x3c24, (q15_t)0x2a29, (q15_t)0x3c29, (q15_t)0x2a35, (q15_t)0x3c2d,
-    (q15_t)0x2a41, (q15_t)0x3c31, (q15_t)0x2a4d, (q15_t)0x3c36, (q15_t)0x2a59, (q15_t)0x3c3a, (q15_t)0x2a65, (q15_t)0x3c3e,
-    (q15_t)0x2a70, (q15_t)0x3c42, (q15_t)0x2a7c, (q15_t)0x3c46, (q15_t)0x2a88, (q15_t)0x3c4b, (q15_t)0x2a94, (q15_t)0x3c4f,
-    (q15_t)0x2aa0, (q15_t)0x3c53, (q15_t)0x2aac, (q15_t)0x3c57, (q15_t)0x2ab7, (q15_t)0x3c5b, (q15_t)0x2ac3, (q15_t)0x3c60,
-    (q15_t)0x2acf, (q15_t)0x3c64, (q15_t)0x2adb, (q15_t)0x3c68, (q15_t)0x2ae7, (q15_t)0x3c6c, (q15_t)0x2af3, (q15_t)0x3c70,
-    (q15_t)0x2aff, (q15_t)0x3c74, (q15_t)0x2b0a, (q15_t)0x3c79, (q15_t)0x2b16, (q15_t)0x3c7d, (q15_t)0x2b22, (q15_t)0x3c81,
-    (q15_t)0x2b2e, (q15_t)0x3c85, (q15_t)0x2b3a, (q15_t)0x3c89, (q15_t)0x2b46, (q15_t)0x3c8d, (q15_t)0x2b52, (q15_t)0x3c91,
-    (q15_t)0x2b5e, (q15_t)0x3c95, (q15_t)0x2b6a, (q15_t)0x3c99, (q15_t)0x2b75, (q15_t)0x3c9d, (q15_t)0x2b81, (q15_t)0x3ca1,
-    (q15_t)0x2b8d, (q15_t)0x3ca5, (q15_t)0x2b99, (q15_t)0x3ca9, (q15_t)0x2ba5, (q15_t)0x3cad, (q15_t)0x2bb1, (q15_t)0x3cb1,
-    (q15_t)0x2bbd, (q15_t)0x3cb5, (q15_t)0x2bc9, (q15_t)0x3cb9, (q15_t)0x2bd5, (q15_t)0x3cbd, (q15_t)0x2be1, (q15_t)0x3cc1,
-    (q15_t)0x2bed, (q15_t)0x3cc5, (q15_t)0x2bf9, (q15_t)0x3cc9, (q15_t)0x2c05, (q15_t)0x3ccd, (q15_t)0x2c10, (q15_t)0x3cd1,
-    (q15_t)0x2c1c, (q15_t)0x3cd5, (q15_t)0x2c28, (q15_t)0x3cd9, (q15_t)0x2c34, (q15_t)0x3cdd, (q15_t)0x2c40, (q15_t)0x3ce0,
-    (q15_t)0x2c4c, (q15_t)0x3ce4, (q15_t)0x2c58, (q15_t)0x3ce8, (q15_t)0x2c64, (q15_t)0x3cec, (q15_t)0x2c70, (q15_t)0x3cf0,
-    (q15_t)0x2c7c, (q15_t)0x3cf4, (q15_t)0x2c88, (q15_t)0x3cf8, (q15_t)0x2c94, (q15_t)0x3cfb, (q15_t)0x2ca0, (q15_t)0x3cff,
-    (q15_t)0x2cac, (q15_t)0x3d03, (q15_t)0x2cb8, (q15_t)0x3d07, (q15_t)0x2cc4, (q15_t)0x3d0b, (q15_t)0x2cd0, (q15_t)0x3d0e,
-    (q15_t)0x2cdc, (q15_t)0x3d12, (q15_t)0x2ce8, (q15_t)0x3d16, (q15_t)0x2cf4, (q15_t)0x3d1a, (q15_t)0x2d00, (q15_t)0x3d1d,
-    (q15_t)0x2d0c, (q15_t)0x3d21, (q15_t)0x2d18, (q15_t)0x3d25, (q15_t)0x2d24, (q15_t)0x3d28, (q15_t)0x2d30, (q15_t)0x3d2c,
-    (q15_t)0x2d3c, (q15_t)0x3d30, (q15_t)0x2d48, (q15_t)0x3d34, (q15_t)0x2d54, (q15_t)0x3d37, (q15_t)0x2d60, (q15_t)0x3d3b,
-    (q15_t)0x2d6c, (q15_t)0x3d3f, (q15_t)0x2d78, (q15_t)0x3d42, (q15_t)0x2d84, (q15_t)0x3d46, (q15_t)0x2d90, (q15_t)0x3d49,
-    (q15_t)0x2d9c, (q15_t)0x3d4d, (q15_t)0x2da8, (q15_t)0x3d51, (q15_t)0x2db4, (q15_t)0x3d54, (q15_t)0x2dc0, (q15_t)0x3d58,
-    (q15_t)0x2dcc, (q15_t)0x3d5b, (q15_t)0x2dd8, (q15_t)0x3d5f, (q15_t)0x2de4, (q15_t)0x3d63, (q15_t)0x2df0, (q15_t)0x3d66,
-    (q15_t)0x2dfc, (q15_t)0x3d6a, (q15_t)0x2e09, (q15_t)0x3d6d, (q15_t)0x2e15, (q15_t)0x3d71, (q15_t)0x2e21, (q15_t)0x3d74,
-    (q15_t)0x2e2d, (q15_t)0x3d78, (q15_t)0x2e39, (q15_t)0x3d7b, (q15_t)0x2e45, (q15_t)0x3d7f, (q15_t)0x2e51, (q15_t)0x3d82,
-    (q15_t)0x2e5d, (q15_t)0x3d86, (q15_t)0x2e69, (q15_t)0x3d89, (q15_t)0x2e75, (q15_t)0x3d8d, (q15_t)0x2e81, (q15_t)0x3d90,
-    (q15_t)0x2e8d, (q15_t)0x3d93, (q15_t)0x2e99, (q15_t)0x3d97, (q15_t)0x2ea6, (q15_t)0x3d9a, (q15_t)0x2eb2, (q15_t)0x3d9e,
-    (q15_t)0x2ebe, (q15_t)0x3da1, (q15_t)0x2eca, (q15_t)0x3da4, (q15_t)0x2ed6, (q15_t)0x3da8, (q15_t)0x2ee2, (q15_t)0x3dab,
-    (q15_t)0x2eee, (q15_t)0x3daf, (q15_t)0x2efa, (q15_t)0x3db2, (q15_t)0x2f06, (q15_t)0x3db5, (q15_t)0x2f13, (q15_t)0x3db9,
-    (q15_t)0x2f1f, (q15_t)0x3dbc, (q15_t)0x2f2b, (q15_t)0x3dbf, (q15_t)0x2f37, (q15_t)0x3dc2, (q15_t)0x2f43, (q15_t)0x3dc6,
-    (q15_t)0x2f4f, (q15_t)0x3dc9, (q15_t)0x2f5b, (q15_t)0x3dcc, (q15_t)0x2f67, (q15_t)0x3dd0, (q15_t)0x2f74, (q15_t)0x3dd3,
-    (q15_t)0x2f80, (q15_t)0x3dd6, (q15_t)0x2f8c, (q15_t)0x3dd9, (q15_t)0x2f98, (q15_t)0x3ddd, (q15_t)0x2fa4, (q15_t)0x3de0,
-    (q15_t)0x2fb0, (q15_t)0x3de3, (q15_t)0x2fbc, (q15_t)0x3de6, (q15_t)0x2fc9, (q15_t)0x3de9, (q15_t)0x2fd5, (q15_t)0x3ded,
-    (q15_t)0x2fe1, (q15_t)0x3df0, (q15_t)0x2fed, (q15_t)0x3df3, (q15_t)0x2ff9, (q15_t)0x3df6, (q15_t)0x3005, (q15_t)0x3df9,
-    (q15_t)0x3012, (q15_t)0x3dfc, (q15_t)0x301e, (q15_t)0x3dff, (q15_t)0x302a, (q15_t)0x3e03, (q15_t)0x3036, (q15_t)0x3e06,
-    (q15_t)0x3042, (q15_t)0x3e09, (q15_t)0x304e, (q15_t)0x3e0c, (q15_t)0x305b, (q15_t)0x3e0f, (q15_t)0x3067, (q15_t)0x3e12,
-    (q15_t)0x3073, (q15_t)0x3e15, (q15_t)0x307f, (q15_t)0x3e18, (q15_t)0x308b, (q15_t)0x3e1b, (q15_t)0x3098, (q15_t)0x3e1e,
-    (q15_t)0x30a4, (q15_t)0x3e21, (q15_t)0x30b0, (q15_t)0x3e24, (q15_t)0x30bc, (q15_t)0x3e27, (q15_t)0x30c8, (q15_t)0x3e2a,
-    (q15_t)0x30d5, (q15_t)0x3e2d, (q15_t)0x30e1, (q15_t)0x3e30, (q15_t)0x30ed, (q15_t)0x3e33, (q15_t)0x30f9, (q15_t)0x3e36,
-    (q15_t)0x3105, (q15_t)0x3e39, (q15_t)0x3112, (q15_t)0x3e3c, (q15_t)0x311e, (q15_t)0x3e3f, (q15_t)0x312a, (q15_t)0x3e42,
-    (q15_t)0x3136, (q15_t)0x3e45, (q15_t)0x3143, (q15_t)0x3e48, (q15_t)0x314f, (q15_t)0x3e4a, (q15_t)0x315b, (q15_t)0x3e4d,
-    (q15_t)0x3167, (q15_t)0x3e50, (q15_t)0x3174, (q15_t)0x3e53, (q15_t)0x3180, (q15_t)0x3e56, (q15_t)0x318c, (q15_t)0x3e59,
-    (q15_t)0x3198, (q15_t)0x3e5c, (q15_t)0x31a4, (q15_t)0x3e5e, (q15_t)0x31b1, (q15_t)0x3e61, (q15_t)0x31bd, (q15_t)0x3e64,
-    (q15_t)0x31c9, (q15_t)0x3e67, (q15_t)0x31d5, (q15_t)0x3e6a, (q15_t)0x31e2, (q15_t)0x3e6c, (q15_t)0x31ee, (q15_t)0x3e6f,
-    (q15_t)0x31fa, (q15_t)0x3e72, (q15_t)0x3207, (q15_t)0x3e75, (q15_t)0x3213, (q15_t)0x3e77, (q15_t)0x321f, (q15_t)0x3e7a,
-    (q15_t)0x322b, (q15_t)0x3e7d, (q15_t)0x3238, (q15_t)0x3e80, (q15_t)0x3244, (q15_t)0x3e82, (q15_t)0x3250, (q15_t)0x3e85,
-    (q15_t)0x325c, (q15_t)0x3e88, (q15_t)0x3269, (q15_t)0x3e8a, (q15_t)0x3275, (q15_t)0x3e8d, (q15_t)0x3281, (q15_t)0x3e90,
-    (q15_t)0x328e, (q15_t)0x3e92, (q15_t)0x329a, (q15_t)0x3e95, (q15_t)0x32a6, (q15_t)0x3e98, (q15_t)0x32b2, (q15_t)0x3e9a,
-    (q15_t)0x32bf, (q15_t)0x3e9d, (q15_t)0x32cb, (q15_t)0x3e9f, (q15_t)0x32d7, (q15_t)0x3ea2, (q15_t)0x32e4, (q15_t)0x3ea5,
-    (q15_t)0x32f0, (q15_t)0x3ea7, (q15_t)0x32fc, (q15_t)0x3eaa, (q15_t)0x3308, (q15_t)0x3eac, (q15_t)0x3315, (q15_t)0x3eaf,
-    (q15_t)0x3321, (q15_t)0x3eb1, (q15_t)0x332d, (q15_t)0x3eb4, (q15_t)0x333a, (q15_t)0x3eb6, (q15_t)0x3346, (q15_t)0x3eb9,
-    (q15_t)0x3352, (q15_t)0x3ebb, (q15_t)0x335f, (q15_t)0x3ebe, (q15_t)0x336b, (q15_t)0x3ec0, (q15_t)0x3377, (q15_t)0x3ec3,
-    (q15_t)0x3384, (q15_t)0x3ec5, (q15_t)0x3390, (q15_t)0x3ec8, (q15_t)0x339c, (q15_t)0x3eca, (q15_t)0x33a9, (q15_t)0x3ecc,
-    (q15_t)0x33b5, (q15_t)0x3ecf, (q15_t)0x33c1, (q15_t)0x3ed1, (q15_t)0x33ce, (q15_t)0x3ed4, (q15_t)0x33da, (q15_t)0x3ed6,
-    (q15_t)0x33e6, (q15_t)0x3ed8, (q15_t)0x33f3, (q15_t)0x3edb, (q15_t)0x33ff, (q15_t)0x3edd, (q15_t)0x340b, (q15_t)0x3ee0,
-    (q15_t)0x3418, (q15_t)0x3ee2, (q15_t)0x3424, (q15_t)0x3ee4, (q15_t)0x3430, (q15_t)0x3ee7, (q15_t)0x343d, (q15_t)0x3ee9,
-    (q15_t)0x3449, (q15_t)0x3eeb, (q15_t)0x3455, (q15_t)0x3eed, (q15_t)0x3462, (q15_t)0x3ef0, (q15_t)0x346e, (q15_t)0x3ef2,
-    (q15_t)0x347b, (q15_t)0x3ef4, (q15_t)0x3487, (q15_t)0x3ef7, (q15_t)0x3493, (q15_t)0x3ef9, (q15_t)0x34a0, (q15_t)0x3efb,
-    (q15_t)0x34ac, (q15_t)0x3efd, (q15_t)0x34b8, (q15_t)0x3f00, (q15_t)0x34c5, (q15_t)0x3f02, (q15_t)0x34d1, (q15_t)0x3f04,
-    (q15_t)0x34dd, (q15_t)0x3f06, (q15_t)0x34ea, (q15_t)0x3f08, (q15_t)0x34f6, (q15_t)0x3f0a, (q15_t)0x3503, (q15_t)0x3f0d,
-    (q15_t)0x350f, (q15_t)0x3f0f, (q15_t)0x351b, (q15_t)0x3f11, (q15_t)0x3528, (q15_t)0x3f13, (q15_t)0x3534, (q15_t)0x3f15,
-    (q15_t)0x3540, (q15_t)0x3f17, (q15_t)0x354d, (q15_t)0x3f19, (q15_t)0x3559, (q15_t)0x3f1c, (q15_t)0x3566, (q15_t)0x3f1e,
-    (q15_t)0x3572, (q15_t)0x3f20, (q15_t)0x357e, (q15_t)0x3f22, (q15_t)0x358b, (q15_t)0x3f24, (q15_t)0x3597, (q15_t)0x3f26,
-    (q15_t)0x35a4, (q15_t)0x3f28, (q15_t)0x35b0, (q15_t)0x3f2a, (q15_t)0x35bc, (q15_t)0x3f2c, (q15_t)0x35c9, (q15_t)0x3f2e,
-    (q15_t)0x35d5, (q15_t)0x3f30, (q15_t)0x35e2, (q15_t)0x3f32, (q15_t)0x35ee, (q15_t)0x3f34, (q15_t)0x35fa, (q15_t)0x3f36,
-    (q15_t)0x3607, (q15_t)0x3f38, (q15_t)0x3613, (q15_t)0x3f3a, (q15_t)0x3620, (q15_t)0x3f3c, (q15_t)0x362c, (q15_t)0x3f3e,
-    (q15_t)0x3639, (q15_t)0x3f40, (q15_t)0x3645, (q15_t)0x3f42, (q15_t)0x3651, (q15_t)0x3f43, (q15_t)0x365e, (q15_t)0x3f45,
-    (q15_t)0x366a, (q15_t)0x3f47, (q15_t)0x3677, (q15_t)0x3f49, (q15_t)0x3683, (q15_t)0x3f4b, (q15_t)0x3690, (q15_t)0x3f4d,
-    (q15_t)0x369c, (q15_t)0x3f4f, (q15_t)0x36a8, (q15_t)0x3f51, (q15_t)0x36b5, (q15_t)0x3f52, (q15_t)0x36c1, (q15_t)0x3f54,
-    (q15_t)0x36ce, (q15_t)0x3f56, (q15_t)0x36da, (q15_t)0x3f58, (q15_t)0x36e7, (q15_t)0x3f5a, (q15_t)0x36f3, (q15_t)0x3f5b,
-    (q15_t)0x36ff, (q15_t)0x3f5d, (q15_t)0x370c, (q15_t)0x3f5f, (q15_t)0x3718, (q15_t)0x3f61, (q15_t)0x3725, (q15_t)0x3f62,
-    (q15_t)0x3731, (q15_t)0x3f64, (q15_t)0x373e, (q15_t)0x3f66, (q15_t)0x374a, (q15_t)0x3f68, (q15_t)0x3757, (q15_t)0x3f69,
-    (q15_t)0x3763, (q15_t)0x3f6b, (q15_t)0x376f, (q15_t)0x3f6d, (q15_t)0x377c, (q15_t)0x3f6e, (q15_t)0x3788, (q15_t)0x3f70,
-    (q15_t)0x3795, (q15_t)0x3f72, (q15_t)0x37a1, (q15_t)0x3f73, (q15_t)0x37ae, (q15_t)0x3f75, (q15_t)0x37ba, (q15_t)0x3f77,
-    (q15_t)0x37c7, (q15_t)0x3f78, (q15_t)0x37d3, (q15_t)0x3f7a, (q15_t)0x37e0, (q15_t)0x3f7b, (q15_t)0x37ec, (q15_t)0x3f7d,
-    (q15_t)0x37f9, (q15_t)0x3f7f, (q15_t)0x3805, (q15_t)0x3f80, (q15_t)0x3811, (q15_t)0x3f82, (q15_t)0x381e, (q15_t)0x3f83,
-    (q15_t)0x382a, (q15_t)0x3f85, (q15_t)0x3837, (q15_t)0x3f86, (q15_t)0x3843, (q15_t)0x3f88, (q15_t)0x3850, (q15_t)0x3f89,
-    (q15_t)0x385c, (q15_t)0x3f8b, (q15_t)0x3869, (q15_t)0x3f8c, (q15_t)0x3875, (q15_t)0x3f8e, (q15_t)0x3882, (q15_t)0x3f8f,
-    (q15_t)0x388e, (q15_t)0x3f91, (q15_t)0x389b, (q15_t)0x3f92, (q15_t)0x38a7, (q15_t)0x3f94, (q15_t)0x38b4, (q15_t)0x3f95,
-    (q15_t)0x38c0, (q15_t)0x3f97, (q15_t)0x38cd, (q15_t)0x3f98, (q15_t)0x38d9, (q15_t)0x3f99, (q15_t)0x38e6, (q15_t)0x3f9b,
-    (q15_t)0x38f2, (q15_t)0x3f9c, (q15_t)0x38ff, (q15_t)0x3f9e, (q15_t)0x390b, (q15_t)0x3f9f, (q15_t)0x3918, (q15_t)0x3fa0,
-    (q15_t)0x3924, (q15_t)0x3fa2, (q15_t)0x3931, (q15_t)0x3fa3, (q15_t)0x393d, (q15_t)0x3fa4, (q15_t)0x394a, (q15_t)0x3fa6,
-    (q15_t)0x3956, (q15_t)0x3fa7, (q15_t)0x3963, (q15_t)0x3fa8, (q15_t)0x396f, (q15_t)0x3faa, (q15_t)0x397c, (q15_t)0x3fab,
-    (q15_t)0x3988, (q15_t)0x3fac, (q15_t)0x3995, (q15_t)0x3fad, (q15_t)0x39a1, (q15_t)0x3faf, (q15_t)0x39ae, (q15_t)0x3fb0,
-    (q15_t)0x39ba, (q15_t)0x3fb1, (q15_t)0x39c7, (q15_t)0x3fb2, (q15_t)0x39d3, (q15_t)0x3fb4, (q15_t)0x39e0, (q15_t)0x3fb5,
-    (q15_t)0x39ec, (q15_t)0x3fb6, (q15_t)0x39f9, (q15_t)0x3fb7, (q15_t)0x3a05, (q15_t)0x3fb8, (q15_t)0x3a12, (q15_t)0x3fb9,
-    (q15_t)0x3a1e, (q15_t)0x3fbb, (q15_t)0x3a2b, (q15_t)0x3fbc, (q15_t)0x3a37, (q15_t)0x3fbd, (q15_t)0x3a44, (q15_t)0x3fbe,
-    (q15_t)0x3a50, (q15_t)0x3fbf, (q15_t)0x3a5d, (q15_t)0x3fc0, (q15_t)0x3a69, (q15_t)0x3fc1, (q15_t)0x3a76, (q15_t)0x3fc3,
-    (q15_t)0x3a82, (q15_t)0x3fc4, (q15_t)0x3a8f, (q15_t)0x3fc5, (q15_t)0x3a9b, (q15_t)0x3fc6, (q15_t)0x3aa8, (q15_t)0x3fc7,
-    (q15_t)0x3ab4, (q15_t)0x3fc8, (q15_t)0x3ac1, (q15_t)0x3fc9, (q15_t)0x3acd, (q15_t)0x3fca, (q15_t)0x3ada, (q15_t)0x3fcb,
-    (q15_t)0x3ae6, (q15_t)0x3fcc, (q15_t)0x3af3, (q15_t)0x3fcd, (q15_t)0x3b00, (q15_t)0x3fce, (q15_t)0x3b0c, (q15_t)0x3fcf,
-    (q15_t)0x3b19, (q15_t)0x3fd0, (q15_t)0x3b25, (q15_t)0x3fd1, (q15_t)0x3b32, (q15_t)0x3fd2, (q15_t)0x3b3e, (q15_t)0x3fd3,
-    (q15_t)0x3b4b, (q15_t)0x3fd4, (q15_t)0x3b57, (q15_t)0x3fd5, (q15_t)0x3b64, (q15_t)0x3fd5, (q15_t)0x3b70, (q15_t)0x3fd6,
-    (q15_t)0x3b7d, (q15_t)0x3fd7, (q15_t)0x3b89, (q15_t)0x3fd8, (q15_t)0x3b96, (q15_t)0x3fd9, (q15_t)0x3ba2, (q15_t)0x3fda,
-    (q15_t)0x3baf, (q15_t)0x3fdb, (q15_t)0x3bbc, (q15_t)0x3fdc, (q15_t)0x3bc8, (q15_t)0x3fdc, (q15_t)0x3bd5, (q15_t)0x3fdd,
-    (q15_t)0x3be1, (q15_t)0x3fde, (q15_t)0x3bee, (q15_t)0x3fdf, (q15_t)0x3bfa, (q15_t)0x3fe0, (q15_t)0x3c07, (q15_t)0x3fe0,
-    (q15_t)0x3c13, (q15_t)0x3fe1, (q15_t)0x3c20, (q15_t)0x3fe2, (q15_t)0x3c2c, (q15_t)0x3fe3, (q15_t)0x3c39, (q15_t)0x3fe3,
-    (q15_t)0x3c45, (q15_t)0x3fe4, (q15_t)0x3c52, (q15_t)0x3fe5, (q15_t)0x3c5f, (q15_t)0x3fe6, (q15_t)0x3c6b, (q15_t)0x3fe6,
-    (q15_t)0x3c78, (q15_t)0x3fe7, (q15_t)0x3c84, (q15_t)0x3fe8, (q15_t)0x3c91, (q15_t)0x3fe8, (q15_t)0x3c9d, (q15_t)0x3fe9,
-    (q15_t)0x3caa, (q15_t)0x3fea, (q15_t)0x3cb6, (q15_t)0x3fea, (q15_t)0x3cc3, (q15_t)0x3feb, (q15_t)0x3cd0, (q15_t)0x3fec,
-    (q15_t)0x3cdc, (q15_t)0x3fec, (q15_t)0x3ce9, (q15_t)0x3fed, (q15_t)0x3cf5, (q15_t)0x3fed, (q15_t)0x3d02, (q15_t)0x3fee,
-    (q15_t)0x3d0e, (q15_t)0x3fef, (q15_t)0x3d1b, (q15_t)0x3fef, (q15_t)0x3d27, (q15_t)0x3ff0, (q15_t)0x3d34, (q15_t)0x3ff0,
-    (q15_t)0x3d40, (q15_t)0x3ff1, (q15_t)0x3d4d, (q15_t)0x3ff1, (q15_t)0x3d5a, (q15_t)0x3ff2, (q15_t)0x3d66, (q15_t)0x3ff2,
-    (q15_t)0x3d73, (q15_t)0x3ff3, (q15_t)0x3d7f, (q15_t)0x3ff3, (q15_t)0x3d8c, (q15_t)0x3ff4, (q15_t)0x3d98, (q15_t)0x3ff4,
-    (q15_t)0x3da5, (q15_t)0x3ff5, (q15_t)0x3db2, (q15_t)0x3ff5, (q15_t)0x3dbe, (q15_t)0x3ff6, (q15_t)0x3dcb, (q15_t)0x3ff6,
-    (q15_t)0x3dd7, (q15_t)0x3ff7, (q15_t)0x3de4, (q15_t)0x3ff7, (q15_t)0x3df0, (q15_t)0x3ff7, (q15_t)0x3dfd, (q15_t)0x3ff8,
-    (q15_t)0x3e09, (q15_t)0x3ff8, (q15_t)0x3e16, (q15_t)0x3ff9, (q15_t)0x3e23, (q15_t)0x3ff9, (q15_t)0x3e2f, (q15_t)0x3ff9,
-    (q15_t)0x3e3c, (q15_t)0x3ffa, (q15_t)0x3e48, (q15_t)0x3ffa, (q15_t)0x3e55, (q15_t)0x3ffa, (q15_t)0x3e61, (q15_t)0x3ffb,
-    (q15_t)0x3e6e, (q15_t)0x3ffb, (q15_t)0x3e7a, (q15_t)0x3ffb, (q15_t)0x3e87, (q15_t)0x3ffc, (q15_t)0x3e94, (q15_t)0x3ffc,
-    (q15_t)0x3ea0, (q15_t)0x3ffc, (q15_t)0x3ead, (q15_t)0x3ffc, (q15_t)0x3eb9, (q15_t)0x3ffd, (q15_t)0x3ec6, (q15_t)0x3ffd,
-    (q15_t)0x3ed2, (q15_t)0x3ffd, (q15_t)0x3edf, (q15_t)0x3ffd, (q15_t)0x3eec, (q15_t)0x3ffe, (q15_t)0x3ef8, (q15_t)0x3ffe,
-    (q15_t)0x3f05, (q15_t)0x3ffe, (q15_t)0x3f11, (q15_t)0x3ffe, (q15_t)0x3f1e, (q15_t)0x3ffe, (q15_t)0x3f2a, (q15_t)0x3fff,
-    (q15_t)0x3f37, (q15_t)0x3fff, (q15_t)0x3f44, (q15_t)0x3fff, (q15_t)0x3f50, (q15_t)0x3fff, (q15_t)0x3f5d, (q15_t)0x3fff,
-    (q15_t)0x3f69, (q15_t)0x3fff, (q15_t)0x3f76, (q15_t)0x3fff, (q15_t)0x3f82, (q15_t)0x4000, (q15_t)0x3f8f, (q15_t)0x4000,
-    (q15_t)0x3f9b, (q15_t)0x4000, (q15_t)0x3fa8, (q15_t)0x4000, (q15_t)0x3fb5, (q15_t)0x4000, (q15_t)0x3fc1, (q15_t)0x4000,
-    (q15_t)0x3fce, (q15_t)0x4000, (q15_t)0x3fda, (q15_t)0x4000, (q15_t)0x3fe7, (q15_t)0x4000, (q15_t)0x3ff3, (q15_t)0x4000,
-};
-
-/**
-  @par
-  Generation of real_CoefB array:
-  @par
-  n = 4096
-  <pre>for (i = 0; i < n; i++)
-  {
-     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
-     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
-  }</pre>
-  @par
-  Convert to fixed point Q15 format
-        round(pBTable[i] * pow(2, 15))
-*/
-const q15_t __ALIGNED(4) realCoefBQ15[8192] = {
-    (q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019, (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000,
-    (q15_t)0x4032, (q15_t)0x4000, (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058, (q15_t)0x4000,
-    (q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000, (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff,
-    (q15_t)0x4097, (q15_t)0x3fff, (q15_t)0x40a3, (q15_t)0x3fff, (q15_t)0x40b0, (q15_t)0x3fff, (q15_t)0x40bc, (q15_t)0x3fff,
-    (q15_t)0x40c9, (q15_t)0x3fff, (q15_t)0x40d6, (q15_t)0x3fff, (q15_t)0x40e2, (q15_t)0x3ffe, (q15_t)0x40ef, (q15_t)0x3ffe,
-    (q15_t)0x40fb, (q15_t)0x3ffe, (q15_t)0x4108, (q15_t)0x3ffe, (q15_t)0x4114, (q15_t)0x3ffe, (q15_t)0x4121, (q15_t)0x3ffd,
-    (q15_t)0x412e, (q15_t)0x3ffd, (q15_t)0x413a, (q15_t)0x3ffd, (q15_t)0x4147, (q15_t)0x3ffd, (q15_t)0x4153, (q15_t)0x3ffc,
-    (q15_t)0x4160, (q15_t)0x3ffc, (q15_t)0x416c, (q15_t)0x3ffc, (q15_t)0x4179, (q15_t)0x3ffc, (q15_t)0x4186, (q15_t)0x3ffb,
-    (q15_t)0x4192, (q15_t)0x3ffb, (q15_t)0x419f, (q15_t)0x3ffb, (q15_t)0x41ab, (q15_t)0x3ffa, (q15_t)0x41b8, (q15_t)0x3ffa,
-    (q15_t)0x41c4, (q15_t)0x3ffa, (q15_t)0x41d1, (q15_t)0x3ff9, (q15_t)0x41dd, (q15_t)0x3ff9, (q15_t)0x41ea, (q15_t)0x3ff9,
-    (q15_t)0x41f7, (q15_t)0x3ff8, (q15_t)0x4203, (q15_t)0x3ff8, (q15_t)0x4210, (q15_t)0x3ff7, (q15_t)0x421c, (q15_t)0x3ff7,
-    (q15_t)0x4229, (q15_t)0x3ff7, (q15_t)0x4235, (q15_t)0x3ff6, (q15_t)0x4242, (q15_t)0x3ff6, (q15_t)0x424e, (q15_t)0x3ff5,
-    (q15_t)0x425b, (q15_t)0x3ff5, (q15_t)0x4268, (q15_t)0x3ff4, (q15_t)0x4274, (q15_t)0x3ff4, (q15_t)0x4281, (q15_t)0x3ff3,
-    (q15_t)0x428d, (q15_t)0x3ff3, (q15_t)0x429a, (q15_t)0x3ff2, (q15_t)0x42a6, (q15_t)0x3ff2, (q15_t)0x42b3, (q15_t)0x3ff1,
-    (q15_t)0x42c0, (q15_t)0x3ff1, (q15_t)0x42cc, (q15_t)0x3ff0, (q15_t)0x42d9, (q15_t)0x3ff0, (q15_t)0x42e5, (q15_t)0x3fef,
-    (q15_t)0x42f2, (q15_t)0x3fef, (q15_t)0x42fe, (q15_t)0x3fee, (q15_t)0x430b, (q15_t)0x3fed, (q15_t)0x4317, (q15_t)0x3fed,
-    (q15_t)0x4324, (q15_t)0x3fec, (q15_t)0x4330, (q15_t)0x3fec, (q15_t)0x433d, (q15_t)0x3feb, (q15_t)0x434a, (q15_t)0x3fea,
-    (q15_t)0x4356, (q15_t)0x3fea, (q15_t)0x4363, (q15_t)0x3fe9, (q15_t)0x436f, (q15_t)0x3fe8, (q15_t)0x437c, (q15_t)0x3fe8,
-    (q15_t)0x4388, (q15_t)0x3fe7, (q15_t)0x4395, (q15_t)0x3fe6, (q15_t)0x43a1, (q15_t)0x3fe6, (q15_t)0x43ae, (q15_t)0x3fe5,
-    (q15_t)0x43bb, (q15_t)0x3fe4, (q15_t)0x43c7, (q15_t)0x3fe3, (q15_t)0x43d4, (q15_t)0x3fe3, (q15_t)0x43e0, (q15_t)0x3fe2,
-    (q15_t)0x43ed, (q15_t)0x3fe1, (q15_t)0x43f9, (q15_t)0x3fe0, (q15_t)0x4406, (q15_t)0x3fe0, (q15_t)0x4412, (q15_t)0x3fdf,
-    (q15_t)0x441f, (q15_t)0x3fde, (q15_t)0x442b, (q15_t)0x3fdd, (q15_t)0x4438, (q15_t)0x3fdc, (q15_t)0x4444, (q15_t)0x3fdc,
-    (q15_t)0x4451, (q15_t)0x3fdb, (q15_t)0x445e, (q15_t)0x3fda, (q15_t)0x446a, (q15_t)0x3fd9, (q15_t)0x4477, (q15_t)0x3fd8,
-    (q15_t)0x4483, (q15_t)0x3fd7, (q15_t)0x4490, (q15_t)0x3fd6, (q15_t)0x449c, (q15_t)0x3fd5, (q15_t)0x44a9, (q15_t)0x3fd5,
-    (q15_t)0x44b5, (q15_t)0x3fd4, (q15_t)0x44c2, (q15_t)0x3fd3, (q15_t)0x44ce, (q15_t)0x3fd2, (q15_t)0x44db, (q15_t)0x3fd1,
-    (q15_t)0x44e7, (q15_t)0x3fd0, (q15_t)0x44f4, (q15_t)0x3fcf, (q15_t)0x4500, (q15_t)0x3fce, (q15_t)0x450d, (q15_t)0x3fcd,
-    (q15_t)0x451a, (q15_t)0x3fcc, (q15_t)0x4526, (q15_t)0x3fcb, (q15_t)0x4533, (q15_t)0x3fca, (q15_t)0x453f, (q15_t)0x3fc9,
-    (q15_t)0x454c, (q15_t)0x3fc8, (q15_t)0x4558, (q15_t)0x3fc7, (q15_t)0x4565, (q15_t)0x3fc6, (q15_t)0x4571, (q15_t)0x3fc5,
-    (q15_t)0x457e, (q15_t)0x3fc4, (q15_t)0x458a, (q15_t)0x3fc3, (q15_t)0x4597, (q15_t)0x3fc1, (q15_t)0x45a3, (q15_t)0x3fc0,
-    (q15_t)0x45b0, (q15_t)0x3fbf, (q15_t)0x45bc, (q15_t)0x3fbe, (q15_t)0x45c9, (q15_t)0x3fbd, (q15_t)0x45d5, (q15_t)0x3fbc,
-    (q15_t)0x45e2, (q15_t)0x3fbb, (q15_t)0x45ee, (q15_t)0x3fb9, (q15_t)0x45fb, (q15_t)0x3fb8, (q15_t)0x4607, (q15_t)0x3fb7,
-    (q15_t)0x4614, (q15_t)0x3fb6, (q15_t)0x4620, (q15_t)0x3fb5, (q15_t)0x462d, (q15_t)0x3fb4, (q15_t)0x4639, (q15_t)0x3fb2,
-    (q15_t)0x4646, (q15_t)0x3fb1, (q15_t)0x4652, (q15_t)0x3fb0, (q15_t)0x465f, (q15_t)0x3faf, (q15_t)0x466b, (q15_t)0x3fad,
-    (q15_t)0x4678, (q15_t)0x3fac, (q15_t)0x4684, (q15_t)0x3fab, (q15_t)0x4691, (q15_t)0x3faa, (q15_t)0x469d, (q15_t)0x3fa8,
-    (q15_t)0x46aa, (q15_t)0x3fa7, (q15_t)0x46b6, (q15_t)0x3fa6, (q15_t)0x46c3, (q15_t)0x3fa4, (q15_t)0x46cf, (q15_t)0x3fa3,
-    (q15_t)0x46dc, (q15_t)0x3fa2, (q15_t)0x46e8, (q15_t)0x3fa0, (q15_t)0x46f5, (q15_t)0x3f9f, (q15_t)0x4701, (q15_t)0x3f9e,
-    (q15_t)0x470e, (q15_t)0x3f9c, (q15_t)0x471a, (q15_t)0x3f9b, (q15_t)0x4727, (q15_t)0x3f99, (q15_t)0x4733, (q15_t)0x3f98,
-    (q15_t)0x4740, (q15_t)0x3f97, (q15_t)0x474c, (q15_t)0x3f95, (q15_t)0x4759, (q15_t)0x3f94, (q15_t)0x4765, (q15_t)0x3f92,
-    (q15_t)0x4772, (q15_t)0x3f91, (q15_t)0x477e, (q15_t)0x3f8f, (q15_t)0x478b, (q15_t)0x3f8e, (q15_t)0x4797, (q15_t)0x3f8c,
-    (q15_t)0x47a4, (q15_t)0x3f8b, (q15_t)0x47b0, (q15_t)0x3f89, (q15_t)0x47bd, (q15_t)0x3f88, (q15_t)0x47c9, (q15_t)0x3f86,
-    (q15_t)0x47d6, (q15_t)0x3f85, (q15_t)0x47e2, (q15_t)0x3f83, (q15_t)0x47ef, (q15_t)0x3f82, (q15_t)0x47fb, (q15_t)0x3f80,
-    (q15_t)0x4807, (q15_t)0x3f7f, (q15_t)0x4814, (q15_t)0x3f7d, (q15_t)0x4820, (q15_t)0x3f7b, (q15_t)0x482d, (q15_t)0x3f7a,
-    (q15_t)0x4839, (q15_t)0x3f78, (q15_t)0x4846, (q15_t)0x3f77, (q15_t)0x4852, (q15_t)0x3f75, (q15_t)0x485f, (q15_t)0x3f73,
-    (q15_t)0x486b, (q15_t)0x3f72, (q15_t)0x4878, (q15_t)0x3f70, (q15_t)0x4884, (q15_t)0x3f6e, (q15_t)0x4891, (q15_t)0x3f6d,
-    (q15_t)0x489d, (q15_t)0x3f6b, (q15_t)0x48a9, (q15_t)0x3f69, (q15_t)0x48b6, (q15_t)0x3f68, (q15_t)0x48c2, (q15_t)0x3f66,
-    (q15_t)0x48cf, (q15_t)0x3f64, (q15_t)0x48db, (q15_t)0x3f62, (q15_t)0x48e8, (q15_t)0x3f61, (q15_t)0x48f4, (q15_t)0x3f5f,
-    (q15_t)0x4901, (q15_t)0x3f5d, (q15_t)0x490d, (q15_t)0x3f5b, (q15_t)0x4919, (q15_t)0x3f5a, (q15_t)0x4926, (q15_t)0x3f58,
-    (q15_t)0x4932, (q15_t)0x3f56, (q15_t)0x493f, (q15_t)0x3f54, (q15_t)0x494b, (q15_t)0x3f52, (q15_t)0x4958, (q15_t)0x3f51,
-    (q15_t)0x4964, (q15_t)0x3f4f, (q15_t)0x4970, (q15_t)0x3f4d, (q15_t)0x497d, (q15_t)0x3f4b, (q15_t)0x4989, (q15_t)0x3f49,
-    (q15_t)0x4996, (q15_t)0x3f47, (q15_t)0x49a2, (q15_t)0x3f45, (q15_t)0x49af, (q15_t)0x3f43, (q15_t)0x49bb, (q15_t)0x3f42,
-    (q15_t)0x49c7, (q15_t)0x3f40, (q15_t)0x49d4, (q15_t)0x3f3e, (q15_t)0x49e0, (q15_t)0x3f3c, (q15_t)0x49ed, (q15_t)0x3f3a,
-    (q15_t)0x49f9, (q15_t)0x3f38, (q15_t)0x4a06, (q15_t)0x3f36, (q15_t)0x4a12, (q15_t)0x3f34, (q15_t)0x4a1e, (q15_t)0x3f32,
-    (q15_t)0x4a2b, (q15_t)0x3f30, (q15_t)0x4a37, (q15_t)0x3f2e, (q15_t)0x4a44, (q15_t)0x3f2c, (q15_t)0x4a50, (q15_t)0x3f2a,
-    (q15_t)0x4a5c, (q15_t)0x3f28, (q15_t)0x4a69, (q15_t)0x3f26, (q15_t)0x4a75, (q15_t)0x3f24, (q15_t)0x4a82, (q15_t)0x3f22,
-    (q15_t)0x4a8e, (q15_t)0x3f20, (q15_t)0x4a9a, (q15_t)0x3f1e, (q15_t)0x4aa7, (q15_t)0x3f1c, (q15_t)0x4ab3, (q15_t)0x3f19,
-    (q15_t)0x4ac0, (q15_t)0x3f17, (q15_t)0x4acc, (q15_t)0x3f15, (q15_t)0x4ad8, (q15_t)0x3f13, (q15_t)0x4ae5, (q15_t)0x3f11,
-    (q15_t)0x4af1, (q15_t)0x3f0f, (q15_t)0x4afd, (q15_t)0x3f0d, (q15_t)0x4b0a, (q15_t)0x3f0a, (q15_t)0x4b16, (q15_t)0x3f08,
-    (q15_t)0x4b23, (q15_t)0x3f06, (q15_t)0x4b2f, (q15_t)0x3f04, (q15_t)0x4b3b, (q15_t)0x3f02, (q15_t)0x4b48, (q15_t)0x3f00,
-    (q15_t)0x4b54, (q15_t)0x3efd, (q15_t)0x4b60, (q15_t)0x3efb, (q15_t)0x4b6d, (q15_t)0x3ef9, (q15_t)0x4b79, (q15_t)0x3ef7,
-    (q15_t)0x4b85, (q15_t)0x3ef4, (q15_t)0x4b92, (q15_t)0x3ef2, (q15_t)0x4b9e, (q15_t)0x3ef0, (q15_t)0x4bab, (q15_t)0x3eed,
-    (q15_t)0x4bb7, (q15_t)0x3eeb, (q15_t)0x4bc3, (q15_t)0x3ee9, (q15_t)0x4bd0, (q15_t)0x3ee7, (q15_t)0x4bdc, (q15_t)0x3ee4,
-    (q15_t)0x4be8, (q15_t)0x3ee2, (q15_t)0x4bf5, (q15_t)0x3ee0, (q15_t)0x4c01, (q15_t)0x3edd, (q15_t)0x4c0d, (q15_t)0x3edb,
-    (q15_t)0x4c1a, (q15_t)0x3ed8, (q15_t)0x4c26, (q15_t)0x3ed6, (q15_t)0x4c32, (q15_t)0x3ed4, (q15_t)0x4c3f, (q15_t)0x3ed1,
-    (q15_t)0x4c4b, (q15_t)0x3ecf, (q15_t)0x4c57, (q15_t)0x3ecc, (q15_t)0x4c64, (q15_t)0x3eca, (q15_t)0x4c70, (q15_t)0x3ec8,
-    (q15_t)0x4c7c, (q15_t)0x3ec5, (q15_t)0x4c89, (q15_t)0x3ec3, (q15_t)0x4c95, (q15_t)0x3ec0, (q15_t)0x4ca1, (q15_t)0x3ebe,
-    (q15_t)0x4cae, (q15_t)0x3ebb, (q15_t)0x4cba, (q15_t)0x3eb9, (q15_t)0x4cc6, (q15_t)0x3eb6, (q15_t)0x4cd3, (q15_t)0x3eb4,
-    (q15_t)0x4cdf, (q15_t)0x3eb1, (q15_t)0x4ceb, (q15_t)0x3eaf, (q15_t)0x4cf8, (q15_t)0x3eac, (q15_t)0x4d04, (q15_t)0x3eaa,
-    (q15_t)0x4d10, (q15_t)0x3ea7, (q15_t)0x4d1c, (q15_t)0x3ea5, (q15_t)0x4d29, (q15_t)0x3ea2, (q15_t)0x4d35, (q15_t)0x3e9f,
-    (q15_t)0x4d41, (q15_t)0x3e9d, (q15_t)0x4d4e, (q15_t)0x3e9a, (q15_t)0x4d5a, (q15_t)0x3e98, (q15_t)0x4d66, (q15_t)0x3e95,
-    (q15_t)0x4d72, (q15_t)0x3e92, (q15_t)0x4d7f, (q15_t)0x3e90, (q15_t)0x4d8b, (q15_t)0x3e8d, (q15_t)0x4d97, (q15_t)0x3e8a,
-    (q15_t)0x4da4, (q15_t)0x3e88, (q15_t)0x4db0, (q15_t)0x3e85, (q15_t)0x4dbc, (q15_t)0x3e82, (q15_t)0x4dc8, (q15_t)0x3e80,
-    (q15_t)0x4dd5, (q15_t)0x3e7d, (q15_t)0x4de1, (q15_t)0x3e7a, (q15_t)0x4ded, (q15_t)0x3e77, (q15_t)0x4df9, (q15_t)0x3e75,
-    (q15_t)0x4e06, (q15_t)0x3e72, (q15_t)0x4e12, (q15_t)0x3e6f, (q15_t)0x4e1e, (q15_t)0x3e6c, (q15_t)0x4e2b, (q15_t)0x3e6a,
-    (q15_t)0x4e37, (q15_t)0x3e67, (q15_t)0x4e43, (q15_t)0x3e64, (q15_t)0x4e4f, (q15_t)0x3e61, (q15_t)0x4e5c, (q15_t)0x3e5e,
-    (q15_t)0x4e68, (q15_t)0x3e5c, (q15_t)0x4e74, (q15_t)0x3e59, (q15_t)0x4e80, (q15_t)0x3e56, (q15_t)0x4e8c, (q15_t)0x3e53,
-    (q15_t)0x4e99, (q15_t)0x3e50, (q15_t)0x4ea5, (q15_t)0x3e4d, (q15_t)0x4eb1, (q15_t)0x3e4a, (q15_t)0x4ebd, (q15_t)0x3e48,
-    (q15_t)0x4eca, (q15_t)0x3e45, (q15_t)0x4ed6, (q15_t)0x3e42, (q15_t)0x4ee2, (q15_t)0x3e3f, (q15_t)0x4eee, (q15_t)0x3e3c,
-    (q15_t)0x4efb, (q15_t)0x3e39, (q15_t)0x4f07, (q15_t)0x3e36, (q15_t)0x4f13, (q15_t)0x3e33, (q15_t)0x4f1f, (q15_t)0x3e30,
-    (q15_t)0x4f2b, (q15_t)0x3e2d, (q15_t)0x4f38, (q15_t)0x3e2a, (q15_t)0x4f44, (q15_t)0x3e27, (q15_t)0x4f50, (q15_t)0x3e24,
-    (q15_t)0x4f5c, (q15_t)0x3e21, (q15_t)0x4f68, (q15_t)0x3e1e, (q15_t)0x4f75, (q15_t)0x3e1b, (q15_t)0x4f81, (q15_t)0x3e18,
-    (q15_t)0x4f8d, (q15_t)0x3e15, (q15_t)0x4f99, (q15_t)0x3e12, (q15_t)0x4fa5, (q15_t)0x3e0f, (q15_t)0x4fb2, (q15_t)0x3e0c,
-    (q15_t)0x4fbe, (q15_t)0x3e09, (q15_t)0x4fca, (q15_t)0x3e06, (q15_t)0x4fd6, (q15_t)0x3e03, (q15_t)0x4fe2, (q15_t)0x3dff,
-    (q15_t)0x4fee, (q15_t)0x3dfc, (q15_t)0x4ffb, (q15_t)0x3df9, (q15_t)0x5007, (q15_t)0x3df6, (q15_t)0x5013, (q15_t)0x3df3,
-    (q15_t)0x501f, (q15_t)0x3df0, (q15_t)0x502b, (q15_t)0x3ded, (q15_t)0x5037, (q15_t)0x3de9, (q15_t)0x5044, (q15_t)0x3de6,
-    (q15_t)0x5050, (q15_t)0x3de3, (q15_t)0x505c, (q15_t)0x3de0, (q15_t)0x5068, (q15_t)0x3ddd, (q15_t)0x5074, (q15_t)0x3dd9,
-    (q15_t)0x5080, (q15_t)0x3dd6, (q15_t)0x508c, (q15_t)0x3dd3, (q15_t)0x5099, (q15_t)0x3dd0, (q15_t)0x50a5, (q15_t)0x3dcc,
-    (q15_t)0x50b1, (q15_t)0x3dc9, (q15_t)0x50bd, (q15_t)0x3dc6, (q15_t)0x50c9, (q15_t)0x3dc2, (q15_t)0x50d5, (q15_t)0x3dbf,
-    (q15_t)0x50e1, (q15_t)0x3dbc, (q15_t)0x50ed, (q15_t)0x3db9, (q15_t)0x50fa, (q15_t)0x3db5, (q15_t)0x5106, (q15_t)0x3db2,
-    (q15_t)0x5112, (q15_t)0x3daf, (q15_t)0x511e, (q15_t)0x3dab, (q15_t)0x512a, (q15_t)0x3da8, (q15_t)0x5136, (q15_t)0x3da4,
-    (q15_t)0x5142, (q15_t)0x3da1, (q15_t)0x514e, (q15_t)0x3d9e, (q15_t)0x515a, (q15_t)0x3d9a, (q15_t)0x5167, (q15_t)0x3d97,
-    (q15_t)0x5173, (q15_t)0x3d93, (q15_t)0x517f, (q15_t)0x3d90, (q15_t)0x518b, (q15_t)0x3d8d, (q15_t)0x5197, (q15_t)0x3d89,
-    (q15_t)0x51a3, (q15_t)0x3d86, (q15_t)0x51af, (q15_t)0x3d82, (q15_t)0x51bb, (q15_t)0x3d7f, (q15_t)0x51c7, (q15_t)0x3d7b,
-    (q15_t)0x51d3, (q15_t)0x3d78, (q15_t)0x51df, (q15_t)0x3d74, (q15_t)0x51eb, (q15_t)0x3d71, (q15_t)0x51f7, (q15_t)0x3d6d,
-    (q15_t)0x5204, (q15_t)0x3d6a, (q15_t)0x5210, (q15_t)0x3d66, (q15_t)0x521c, (q15_t)0x3d63, (q15_t)0x5228, (q15_t)0x3d5f,
-    (q15_t)0x5234, (q15_t)0x3d5b, (q15_t)0x5240, (q15_t)0x3d58, (q15_t)0x524c, (q15_t)0x3d54, (q15_t)0x5258, (q15_t)0x3d51,
-    (q15_t)0x5264, (q15_t)0x3d4d, (q15_t)0x5270, (q15_t)0x3d49, (q15_t)0x527c, (q15_t)0x3d46, (q15_t)0x5288, (q15_t)0x3d42,
-    (q15_t)0x5294, (q15_t)0x3d3f, (q15_t)0x52a0, (q15_t)0x3d3b, (q15_t)0x52ac, (q15_t)0x3d37, (q15_t)0x52b8, (q15_t)0x3d34,
-    (q15_t)0x52c4, (q15_t)0x3d30, (q15_t)0x52d0, (q15_t)0x3d2c, (q15_t)0x52dc, (q15_t)0x3d28, (q15_t)0x52e8, (q15_t)0x3d25,
-    (q15_t)0x52f4, (q15_t)0x3d21, (q15_t)0x5300, (q15_t)0x3d1d, (q15_t)0x530c, (q15_t)0x3d1a, (q15_t)0x5318, (q15_t)0x3d16,
-    (q15_t)0x5324, (q15_t)0x3d12, (q15_t)0x5330, (q15_t)0x3d0e, (q15_t)0x533c, (q15_t)0x3d0b, (q15_t)0x5348, (q15_t)0x3d07,
-    (q15_t)0x5354, (q15_t)0x3d03, (q15_t)0x5360, (q15_t)0x3cff, (q15_t)0x536c, (q15_t)0x3cfb, (q15_t)0x5378, (q15_t)0x3cf8,
-    (q15_t)0x5384, (q15_t)0x3cf4, (q15_t)0x5390, (q15_t)0x3cf0, (q15_t)0x539c, (q15_t)0x3cec, (q15_t)0x53a8, (q15_t)0x3ce8,
-    (q15_t)0x53b4, (q15_t)0x3ce4, (q15_t)0x53c0, (q15_t)0x3ce0, (q15_t)0x53cc, (q15_t)0x3cdd, (q15_t)0x53d8, (q15_t)0x3cd9,
-    (q15_t)0x53e4, (q15_t)0x3cd5, (q15_t)0x53f0, (q15_t)0x3cd1, (q15_t)0x53fb, (q15_t)0x3ccd, (q15_t)0x5407, (q15_t)0x3cc9,
-    (q15_t)0x5413, (q15_t)0x3cc5, (q15_t)0x541f, (q15_t)0x3cc1, (q15_t)0x542b, (q15_t)0x3cbd, (q15_t)0x5437, (q15_t)0x3cb9,
-    (q15_t)0x5443, (q15_t)0x3cb5, (q15_t)0x544f, (q15_t)0x3cb1, (q15_t)0x545b, (q15_t)0x3cad, (q15_t)0x5467, (q15_t)0x3ca9,
-    (q15_t)0x5473, (q15_t)0x3ca5, (q15_t)0x547f, (q15_t)0x3ca1, (q15_t)0x548b, (q15_t)0x3c9d, (q15_t)0x5496, (q15_t)0x3c99,
-    (q15_t)0x54a2, (q15_t)0x3c95, (q15_t)0x54ae, (q15_t)0x3c91, (q15_t)0x54ba, (q15_t)0x3c8d, (q15_t)0x54c6, (q15_t)0x3c89,
-    (q15_t)0x54d2, (q15_t)0x3c85, (q15_t)0x54de, (q15_t)0x3c81, (q15_t)0x54ea, (q15_t)0x3c7d, (q15_t)0x54f6, (q15_t)0x3c79,
-    (q15_t)0x5501, (q15_t)0x3c74, (q15_t)0x550d, (q15_t)0x3c70, (q15_t)0x5519, (q15_t)0x3c6c, (q15_t)0x5525, (q15_t)0x3c68,
-    (q15_t)0x5531, (q15_t)0x3c64, (q15_t)0x553d, (q15_t)0x3c60, (q15_t)0x5549, (q15_t)0x3c5b, (q15_t)0x5554, (q15_t)0x3c57,
-    (q15_t)0x5560, (q15_t)0x3c53, (q15_t)0x556c, (q15_t)0x3c4f, (q15_t)0x5578, (q15_t)0x3c4b, (q15_t)0x5584, (q15_t)0x3c46,
-    (q15_t)0x5590, (q15_t)0x3c42, (q15_t)0x559b, (q15_t)0x3c3e, (q15_t)0x55a7, (q15_t)0x3c3a, (q15_t)0x55b3, (q15_t)0x3c36,
-    (q15_t)0x55bf, (q15_t)0x3c31, (q15_t)0x55cb, (q15_t)0x3c2d, (q15_t)0x55d7, (q15_t)0x3c29, (q15_t)0x55e2, (q15_t)0x3c24,
-    (q15_t)0x55ee, (q15_t)0x3c20, (q15_t)0x55fa, (q15_t)0x3c1c, (q15_t)0x5606, (q15_t)0x3c17, (q15_t)0x5612, (q15_t)0x3c13,
-    (q15_t)0x561d, (q15_t)0x3c0f, (q15_t)0x5629, (q15_t)0x3c0a, (q15_t)0x5635, (q15_t)0x3c06, (q15_t)0x5641, (q15_t)0x3c02,
-    (q15_t)0x564c, (q15_t)0x3bfd, (q15_t)0x5658, (q15_t)0x3bf9, (q15_t)0x5664, (q15_t)0x3bf5, (q15_t)0x5670, (q15_t)0x3bf0,
-    (q15_t)0x567c, (q15_t)0x3bec, (q15_t)0x5687, (q15_t)0x3be7, (q15_t)0x5693, (q15_t)0x3be3, (q15_t)0x569f, (q15_t)0x3bde,
-    (q15_t)0x56ab, (q15_t)0x3bda, (q15_t)0x56b6, (q15_t)0x3bd6, (q15_t)0x56c2, (q15_t)0x3bd1, (q15_t)0x56ce, (q15_t)0x3bcd,
-    (q15_t)0x56da, (q15_t)0x3bc8, (q15_t)0x56e5, (q15_t)0x3bc4, (q15_t)0x56f1, (q15_t)0x3bbf, (q15_t)0x56fd, (q15_t)0x3bbb,
-    (q15_t)0x5709, (q15_t)0x3bb6, (q15_t)0x5714, (q15_t)0x3bb2, (q15_t)0x5720, (q15_t)0x3bad, (q15_t)0x572c, (q15_t)0x3ba9,
-    (q15_t)0x5737, (q15_t)0x3ba4, (q15_t)0x5743, (q15_t)0x3b9f, (q15_t)0x574f, (q15_t)0x3b9b, (q15_t)0x575b, (q15_t)0x3b96,
-    (q15_t)0x5766, (q15_t)0x3b92, (q15_t)0x5772, (q15_t)0x3b8d, (q15_t)0x577e, (q15_t)0x3b88, (q15_t)0x5789, (q15_t)0x3b84,
-    (q15_t)0x5795, (q15_t)0x3b7f, (q15_t)0x57a1, (q15_t)0x3b7b, (q15_t)0x57ac, (q15_t)0x3b76, (q15_t)0x57b8, (q15_t)0x3b71,
-    (q15_t)0x57c4, (q15_t)0x3b6d, (q15_t)0x57cf, (q15_t)0x3b68, (q15_t)0x57db, (q15_t)0x3b63, (q15_t)0x57e7, (q15_t)0x3b5f,
-    (q15_t)0x57f2, (q15_t)0x3b5a, (q15_t)0x57fe, (q15_t)0x3b55, (q15_t)0x580a, (q15_t)0x3b50, (q15_t)0x5815, (q15_t)0x3b4c,
-    (q15_t)0x5821, (q15_t)0x3b47, (q15_t)0x582d, (q15_t)0x3b42, (q15_t)0x5838, (q15_t)0x3b3e, (q15_t)0x5844, (q15_t)0x3b39,
-    (q15_t)0x584f, (q15_t)0x3b34, (q15_t)0x585b, (q15_t)0x3b2f, (q15_t)0x5867, (q15_t)0x3b2a, (q15_t)0x5872, (q15_t)0x3b26,
-    (q15_t)0x587e, (q15_t)0x3b21, (q15_t)0x5889, (q15_t)0x3b1c, (q15_t)0x5895, (q15_t)0x3b17, (q15_t)0x58a1, (q15_t)0x3b12,
-    (q15_t)0x58ac, (q15_t)0x3b0e, (q15_t)0x58b8, (q15_t)0x3b09, (q15_t)0x58c3, (q15_t)0x3b04, (q15_t)0x58cf, (q15_t)0x3aff,
-    (q15_t)0x58db, (q15_t)0x3afa, (q15_t)0x58e6, (q15_t)0x3af5, (q15_t)0x58f2, (q15_t)0x3af0, (q15_t)0x58fd, (q15_t)0x3aeb,
-    (q15_t)0x5909, (q15_t)0x3ae6, (q15_t)0x5914, (q15_t)0x3ae2, (q15_t)0x5920, (q15_t)0x3add, (q15_t)0x592c, (q15_t)0x3ad8,
-    (q15_t)0x5937, (q15_t)0x3ad3, (q15_t)0x5943, (q15_t)0x3ace, (q15_t)0x594e, (q15_t)0x3ac9, (q15_t)0x595a, (q15_t)0x3ac4,
-    (q15_t)0x5965, (q15_t)0x3abf, (q15_t)0x5971, (q15_t)0x3aba, (q15_t)0x597c, (q15_t)0x3ab5, (q15_t)0x5988, (q15_t)0x3ab0,
-    (q15_t)0x5993, (q15_t)0x3aab, (q15_t)0x599f, (q15_t)0x3aa6, (q15_t)0x59aa, (q15_t)0x3aa1, (q15_t)0x59b6, (q15_t)0x3a9c,
-    (q15_t)0x59c1, (q15_t)0x3a97, (q15_t)0x59cd, (q15_t)0x3a92, (q15_t)0x59d8, (q15_t)0x3a8d, (q15_t)0x59e4, (q15_t)0x3a88,
-    (q15_t)0x59ef, (q15_t)0x3a82, (q15_t)0x59fb, (q15_t)0x3a7d, (q15_t)0x5a06, (q15_t)0x3a78, (q15_t)0x5a12, (q15_t)0x3a73,
-    (q15_t)0x5a1d, (q15_t)0x3a6e, (q15_t)0x5a29, (q15_t)0x3a69, (q15_t)0x5a34, (q15_t)0x3a64, (q15_t)0x5a40, (q15_t)0x3a5f,
-    (q15_t)0x5a4b, (q15_t)0x3a59, (q15_t)0x5a57, (q15_t)0x3a54, (q15_t)0x5a62, (q15_t)0x3a4f, (q15_t)0x5a6e, (q15_t)0x3a4a,
-    (q15_t)0x5a79, (q15_t)0x3a45, (q15_t)0x5a84, (q15_t)0x3a3f, (q15_t)0x5a90, (q15_t)0x3a3a, (q15_t)0x5a9b, (q15_t)0x3a35,
-    (q15_t)0x5aa7, (q15_t)0x3a30, (q15_t)0x5ab2, (q15_t)0x3a2b, (q15_t)0x5abe, (q15_t)0x3a25, (q15_t)0x5ac9, (q15_t)0x3a20,
-    (q15_t)0x5ad4, (q15_t)0x3a1b, (q15_t)0x5ae0, (q15_t)0x3a16, (q15_t)0x5aeb, (q15_t)0x3a10, (q15_t)0x5af7, (q15_t)0x3a0b,
-    (q15_t)0x5b02, (q15_t)0x3a06, (q15_t)0x5b0d, (q15_t)0x3a00, (q15_t)0x5b19, (q15_t)0x39fb, (q15_t)0x5b24, (q15_t)0x39f6,
-    (q15_t)0x5b30, (q15_t)0x39f0, (q15_t)0x5b3b, (q15_t)0x39eb, (q15_t)0x5b46, (q15_t)0x39e6, (q15_t)0x5b52, (q15_t)0x39e0,
-    (q15_t)0x5b5d, (q15_t)0x39db, (q15_t)0x5b68, (q15_t)0x39d6, (q15_t)0x5b74, (q15_t)0x39d0, (q15_t)0x5b7f, (q15_t)0x39cb,
-    (q15_t)0x5b8a, (q15_t)0x39c5, (q15_t)0x5b96, (q15_t)0x39c0, (q15_t)0x5ba1, (q15_t)0x39bb, (q15_t)0x5bac, (q15_t)0x39b5,
-    (q15_t)0x5bb8, (q15_t)0x39b0, (q15_t)0x5bc3, (q15_t)0x39aa, (q15_t)0x5bce, (q15_t)0x39a5, (q15_t)0x5bda, (q15_t)0x399f,
-    (q15_t)0x5be5, (q15_t)0x399a, (q15_t)0x5bf0, (q15_t)0x3994, (q15_t)0x5bfc, (q15_t)0x398f, (q15_t)0x5c07, (q15_t)0x3989,
-    (q15_t)0x5c12, (q15_t)0x3984, (q15_t)0x5c1e, (q15_t)0x397e, (q15_t)0x5c29, (q15_t)0x3979, (q15_t)0x5c34, (q15_t)0x3973,
-    (q15_t)0x5c3f, (q15_t)0x396e, (q15_t)0x5c4b, (q15_t)0x3968, (q15_t)0x5c56, (q15_t)0x3963, (q15_t)0x5c61, (q15_t)0x395d,
-    (q15_t)0x5c6c, (q15_t)0x3958, (q15_t)0x5c78, (q15_t)0x3952, (q15_t)0x5c83, (q15_t)0x394c, (q15_t)0x5c8e, (q15_t)0x3947,
-    (q15_t)0x5c99, (q15_t)0x3941, (q15_t)0x5ca5, (q15_t)0x393b, (q15_t)0x5cb0, (q15_t)0x3936, (q15_t)0x5cbb, (q15_t)0x3930,
-    (q15_t)0x5cc6, (q15_t)0x392b, (q15_t)0x5cd2, (q15_t)0x3925, (q15_t)0x5cdd, (q15_t)0x391f, (q15_t)0x5ce8, (q15_t)0x391a,
-    (q15_t)0x5cf3, (q15_t)0x3914, (q15_t)0x5cff, (q15_t)0x390e, (q15_t)0x5d0a, (q15_t)0x3909, (q15_t)0x5d15, (q15_t)0x3903,
-    (q15_t)0x5d20, (q15_t)0x38fd, (q15_t)0x5d2b, (q15_t)0x38f7, (q15_t)0x5d36, (q15_t)0x38f2, (q15_t)0x5d42, (q15_t)0x38ec,
-    (q15_t)0x5d4d, (q15_t)0x38e6, (q15_t)0x5d58, (q15_t)0x38e0, (q15_t)0x5d63, (q15_t)0x38db, (q15_t)0x5d6e, (q15_t)0x38d5,
-    (q15_t)0x5d79, (q15_t)0x38cf, (q15_t)0x5d85, (q15_t)0x38c9, (q15_t)0x5d90, (q15_t)0x38c3, (q15_t)0x5d9b, (q15_t)0x38be,
-    (q15_t)0x5da6, (q15_t)0x38b8, (q15_t)0x5db1, (q15_t)0x38b2, (q15_t)0x5dbc, (q15_t)0x38ac, (q15_t)0x5dc7, (q15_t)0x38a6,
-    (q15_t)0x5dd3, (q15_t)0x38a1, (q15_t)0x5dde, (q15_t)0x389b, (q15_t)0x5de9, (q15_t)0x3895, (q15_t)0x5df4, (q15_t)0x388f,
-    (q15_t)0x5dff, (q15_t)0x3889, (q15_t)0x5e0a, (q15_t)0x3883, (q15_t)0x5e15, (q15_t)0x387d, (q15_t)0x5e20, (q15_t)0x3877,
-    (q15_t)0x5e2b, (q15_t)0x3871, (q15_t)0x5e36, (q15_t)0x386b, (q15_t)0x5e42, (q15_t)0x3866, (q15_t)0x5e4d, (q15_t)0x3860,
-    (q15_t)0x5e58, (q15_t)0x385a, (q15_t)0x5e63, (q15_t)0x3854, (q15_t)0x5e6e, (q15_t)0x384e, (q15_t)0x5e79, (q15_t)0x3848,
-    (q15_t)0x5e84, (q15_t)0x3842, (q15_t)0x5e8f, (q15_t)0x383c, (q15_t)0x5e9a, (q15_t)0x3836, (q15_t)0x5ea5, (q15_t)0x3830,
-    (q15_t)0x5eb0, (q15_t)0x382a, (q15_t)0x5ebb, (q15_t)0x3824, (q15_t)0x5ec6, (q15_t)0x381e, (q15_t)0x5ed1, (q15_t)0x3818,
-    (q15_t)0x5edc, (q15_t)0x3812, (q15_t)0x5ee7, (q15_t)0x380b, (q15_t)0x5ef2, (q15_t)0x3805, (q15_t)0x5efd, (q15_t)0x37ff,
-    (q15_t)0x5f08, (q15_t)0x37f9, (q15_t)0x5f13, (q15_t)0x37f3, (q15_t)0x5f1e, (q15_t)0x37ed, (q15_t)0x5f29, (q15_t)0x37e7,
-    (q15_t)0x5f34, (q15_t)0x37e1, (q15_t)0x5f3f, (q15_t)0x37db, (q15_t)0x5f4a, (q15_t)0x37d5, (q15_t)0x5f55, (q15_t)0x37ce,
-    (q15_t)0x5f60, (q15_t)0x37c8, (q15_t)0x5f6b, (q15_t)0x37c2, (q15_t)0x5f76, (q15_t)0x37bc, (q15_t)0x5f81, (q15_t)0x37b6,
-    (q15_t)0x5f8c, (q15_t)0x37b0, (q15_t)0x5f97, (q15_t)0x37a9, (q15_t)0x5fa2, (q15_t)0x37a3, (q15_t)0x5fac, (q15_t)0x379d,
-    (q15_t)0x5fb7, (q15_t)0x3797, (q15_t)0x5fc2, (q15_t)0x3790, (q15_t)0x5fcd, (q15_t)0x378a, (q15_t)0x5fd8, (q15_t)0x3784,
-    (q15_t)0x5fe3, (q15_t)0x377e, (q15_t)0x5fee, (q15_t)0x3777, (q15_t)0x5ff9, (q15_t)0x3771, (q15_t)0x6004, (q15_t)0x376b,
-    (q15_t)0x600f, (q15_t)0x3765, (q15_t)0x6019, (q15_t)0x375e, (q15_t)0x6024, (q15_t)0x3758, (q15_t)0x602f, (q15_t)0x3752,
-    (q15_t)0x603a, (q15_t)0x374b, (q15_t)0x6045, (q15_t)0x3745, (q15_t)0x6050, (q15_t)0x373f, (q15_t)0x605b, (q15_t)0x3738,
-    (q15_t)0x6065, (q15_t)0x3732, (q15_t)0x6070, (q15_t)0x372c, (q15_t)0x607b, (q15_t)0x3725, (q15_t)0x6086, (q15_t)0x371f,
-    (q15_t)0x6091, (q15_t)0x3718, (q15_t)0x609b, (q15_t)0x3712, (q15_t)0x60a6, (q15_t)0x370c, (q15_t)0x60b1, (q15_t)0x3705,
-    (q15_t)0x60bc, (q15_t)0x36ff, (q15_t)0x60c7, (q15_t)0x36f8, (q15_t)0x60d1, (q15_t)0x36f2, (q15_t)0x60dc, (q15_t)0x36eb,
-    (q15_t)0x60e7, (q15_t)0x36e5, (q15_t)0x60f2, (q15_t)0x36df, (q15_t)0x60fd, (q15_t)0x36d8, (q15_t)0x6107, (q15_t)0x36d2,
-    (q15_t)0x6112, (q15_t)0x36cb, (q15_t)0x611d, (q15_t)0x36c5, (q15_t)0x6128, (q15_t)0x36be, (q15_t)0x6132, (q15_t)0x36b8,
-    (q15_t)0x613d, (q15_t)0x36b1, (q15_t)0x6148, (q15_t)0x36ab, (q15_t)0x6153, (q15_t)0x36a4, (q15_t)0x615d, (q15_t)0x369d,
-    (q15_t)0x6168, (q15_t)0x3697, (q15_t)0x6173, (q15_t)0x3690, (q15_t)0x617d, (q15_t)0x368a, (q15_t)0x6188, (q15_t)0x3683,
-    (q15_t)0x6193, (q15_t)0x367d, (q15_t)0x619e, (q15_t)0x3676, (q15_t)0x61a8, (q15_t)0x366f, (q15_t)0x61b3, (q15_t)0x3669,
-    (q15_t)0x61be, (q15_t)0x3662, (q15_t)0x61c8, (q15_t)0x365c, (q15_t)0x61d3, (q15_t)0x3655, (q15_t)0x61de, (q15_t)0x364e,
-    (q15_t)0x61e8, (q15_t)0x3648, (q15_t)0x61f3, (q15_t)0x3641, (q15_t)0x61fe, (q15_t)0x363a, (q15_t)0x6208, (q15_t)0x3634,
-    (q15_t)0x6213, (q15_t)0x362d, (q15_t)0x621e, (q15_t)0x3626, (q15_t)0x6228, (q15_t)0x3620, (q15_t)0x6233, (q15_t)0x3619,
-    (q15_t)0x623d, (q15_t)0x3612, (q15_t)0x6248, (q15_t)0x360b, (q15_t)0x6253, (q15_t)0x3605, (q15_t)0x625d, (q15_t)0x35fe,
-    (q15_t)0x6268, (q15_t)0x35f7, (q15_t)0x6272, (q15_t)0x35f0, (q15_t)0x627d, (q15_t)0x35ea, (q15_t)0x6288, (q15_t)0x35e3,
-    (q15_t)0x6292, (q15_t)0x35dc, (q15_t)0x629d, (q15_t)0x35d5, (q15_t)0x62a7, (q15_t)0x35ce, (q15_t)0x62b2, (q15_t)0x35c8,
-    (q15_t)0x62bc, (q15_t)0x35c1, (q15_t)0x62c7, (q15_t)0x35ba, (q15_t)0x62d2, (q15_t)0x35b3, (q15_t)0x62dc, (q15_t)0x35ac,
-    (q15_t)0x62e7, (q15_t)0x35a5, (q15_t)0x62f1, (q15_t)0x359f, (q15_t)0x62fc, (q15_t)0x3598, (q15_t)0x6306, (q15_t)0x3591,
-    (q15_t)0x6311, (q15_t)0x358a, (q15_t)0x631b, (q15_t)0x3583, (q15_t)0x6326, (q15_t)0x357c, (q15_t)0x6330, (q15_t)0x3575,
-    (q15_t)0x633b, (q15_t)0x356e, (q15_t)0x6345, (q15_t)0x3567, (q15_t)0x6350, (q15_t)0x3561, (q15_t)0x635a, (q15_t)0x355a,
-    (q15_t)0x6365, (q15_t)0x3553, (q15_t)0x636f, (q15_t)0x354c, (q15_t)0x637a, (q15_t)0x3545, (q15_t)0x6384, (q15_t)0x353e,
-    (q15_t)0x638e, (q15_t)0x3537, (q15_t)0x6399, (q15_t)0x3530, (q15_t)0x63a3, (q15_t)0x3529, (q15_t)0x63ae, (q15_t)0x3522,
-    (q15_t)0x63b8, (q15_t)0x351b, (q15_t)0x63c3, (q15_t)0x3514, (q15_t)0x63cd, (q15_t)0x350d, (q15_t)0x63d7, (q15_t)0x3506,
-    (q15_t)0x63e2, (q15_t)0x34ff, (q15_t)0x63ec, (q15_t)0x34f8, (q15_t)0x63f7, (q15_t)0x34f1, (q15_t)0x6401, (q15_t)0x34ea,
-    (q15_t)0x640b, (q15_t)0x34e2, (q15_t)0x6416, (q15_t)0x34db, (q15_t)0x6420, (q15_t)0x34d4, (q15_t)0x642b, (q15_t)0x34cd,
-    (q15_t)0x6435, (q15_t)0x34c6, (q15_t)0x643f, (q15_t)0x34bf, (q15_t)0x644a, (q15_t)0x34b8, (q15_t)0x6454, (q15_t)0x34b1,
-    (q15_t)0x645e, (q15_t)0x34aa, (q15_t)0x6469, (q15_t)0x34a2, (q15_t)0x6473, (q15_t)0x349b, (q15_t)0x647d, (q15_t)0x3494,
-    (q15_t)0x6488, (q15_t)0x348d, (q15_t)0x6492, (q15_t)0x3486, (q15_t)0x649c, (q15_t)0x347f, (q15_t)0x64a7, (q15_t)0x3477,
-    (q15_t)0x64b1, (q15_t)0x3470, (q15_t)0x64bb, (q15_t)0x3469, (q15_t)0x64c5, (q15_t)0x3462, (q15_t)0x64d0, (q15_t)0x345b,
-    (q15_t)0x64da, (q15_t)0x3453, (q15_t)0x64e4, (q15_t)0x344c, (q15_t)0x64ef, (q15_t)0x3445, (q15_t)0x64f9, (q15_t)0x343e,
-    (q15_t)0x6503, (q15_t)0x3436, (q15_t)0x650d, (q15_t)0x342f, (q15_t)0x6518, (q15_t)0x3428, (q15_t)0x6522, (q15_t)0x3420,
-    (q15_t)0x652c, (q15_t)0x3419, (q15_t)0x6536, (q15_t)0x3412, (q15_t)0x6541, (q15_t)0x340b, (q15_t)0x654b, (q15_t)0x3403,
-    (q15_t)0x6555, (q15_t)0x33fc, (q15_t)0x655f, (q15_t)0x33f5, (q15_t)0x6569, (q15_t)0x33ed, (q15_t)0x6574, (q15_t)0x33e6,
-    (q15_t)0x657e, (q15_t)0x33df, (q15_t)0x6588, (q15_t)0x33d7, (q15_t)0x6592, (q15_t)0x33d0, (q15_t)0x659c, (q15_t)0x33c8,
-    (q15_t)0x65a6, (q15_t)0x33c1, (q15_t)0x65b1, (q15_t)0x33ba, (q15_t)0x65bb, (q15_t)0x33b2, (q15_t)0x65c5, (q15_t)0x33ab,
-    (q15_t)0x65cf, (q15_t)0x33a3, (q15_t)0x65d9, (q15_t)0x339c, (q15_t)0x65e3, (q15_t)0x3395, (q15_t)0x65ed, (q15_t)0x338d,
-    (q15_t)0x65f8, (q15_t)0x3386, (q15_t)0x6602, (q15_t)0x337e, (q15_t)0x660c, (q15_t)0x3377, (q15_t)0x6616, (q15_t)0x336f,
-    (q15_t)0x6620, (q15_t)0x3368, (q15_t)0x662a, (q15_t)0x3360, (q15_t)0x6634, (q15_t)0x3359, (q15_t)0x663e, (q15_t)0x3351,
-    (q15_t)0x6648, (q15_t)0x334a, (q15_t)0x6652, (q15_t)0x3342, (q15_t)0x665c, (q15_t)0x333b, (q15_t)0x6666, (q15_t)0x3333,
-    (q15_t)0x6671, (q15_t)0x332c, (q15_t)0x667b, (q15_t)0x3324, (q15_t)0x6685, (q15_t)0x331d, (q15_t)0x668f, (q15_t)0x3315,
-    (q15_t)0x6699, (q15_t)0x330d, (q15_t)0x66a3, (q15_t)0x3306, (q15_t)0x66ad, (q15_t)0x32fe, (q15_t)0x66b7, (q15_t)0x32f7,
-    (q15_t)0x66c1, (q15_t)0x32ef, (q15_t)0x66cb, (q15_t)0x32e7, (q15_t)0x66d5, (q15_t)0x32e0, (q15_t)0x66df, (q15_t)0x32d8,
-    (q15_t)0x66e9, (q15_t)0x32d0, (q15_t)0x66f3, (q15_t)0x32c9, (q15_t)0x66fd, (q15_t)0x32c1, (q15_t)0x6707, (q15_t)0x32ba,
-    (q15_t)0x6711, (q15_t)0x32b2, (q15_t)0x671a, (q15_t)0x32aa, (q15_t)0x6724, (q15_t)0x32a3, (q15_t)0x672e, (q15_t)0x329b,
-    (q15_t)0x6738, (q15_t)0x3293, (q15_t)0x6742, (q15_t)0x328b, (q15_t)0x674c, (q15_t)0x3284, (q15_t)0x6756, (q15_t)0x327c,
-    (q15_t)0x6760, (q15_t)0x3274, (q15_t)0x676a, (q15_t)0x326d, (q15_t)0x6774, (q15_t)0x3265, (q15_t)0x677e, (q15_t)0x325d,
-    (q15_t)0x6788, (q15_t)0x3255, (q15_t)0x6791, (q15_t)0x324e, (q15_t)0x679b, (q15_t)0x3246, (q15_t)0x67a5, (q15_t)0x323e,
-    (q15_t)0x67af, (q15_t)0x3236, (q15_t)0x67b9, (q15_t)0x322e, (q15_t)0x67c3, (q15_t)0x3227, (q15_t)0x67cd, (q15_t)0x321f,
-    (q15_t)0x67d6, (q15_t)0x3217, (q15_t)0x67e0, (q15_t)0x320f, (q15_t)0x67ea, (q15_t)0x3207, (q15_t)0x67f4, (q15_t)0x31ff,
-    (q15_t)0x67fe, (q15_t)0x31f8, (q15_t)0x6808, (q15_t)0x31f0, (q15_t)0x6811, (q15_t)0x31e8, (q15_t)0x681b, (q15_t)0x31e0,
-    (q15_t)0x6825, (q15_t)0x31d8, (q15_t)0x682f, (q15_t)0x31d0, (q15_t)0x6838, (q15_t)0x31c8, (q15_t)0x6842, (q15_t)0x31c0,
-    (q15_t)0x684c, (q15_t)0x31b9, (q15_t)0x6856, (q15_t)0x31b1, (q15_t)0x6860, (q15_t)0x31a9, (q15_t)0x6869, (q15_t)0x31a1,
-    (q15_t)0x6873, (q15_t)0x3199, (q15_t)0x687d, (q15_t)0x3191, (q15_t)0x6886, (q15_t)0x3189, (q15_t)0x6890, (q15_t)0x3181,
-    (q15_t)0x689a, (q15_t)0x3179, (q15_t)0x68a4, (q15_t)0x3171, (q15_t)0x68ad, (q15_t)0x3169, (q15_t)0x68b7, (q15_t)0x3161,
-    (q15_t)0x68c1, (q15_t)0x3159, (q15_t)0x68ca, (q15_t)0x3151, (q15_t)0x68d4, (q15_t)0x3149, (q15_t)0x68de, (q15_t)0x3141,
-    (q15_t)0x68e7, (q15_t)0x3139, (q15_t)0x68f1, (q15_t)0x3131, (q15_t)0x68fb, (q15_t)0x3129, (q15_t)0x6904, (q15_t)0x3121,
-    (q15_t)0x690e, (q15_t)0x3119, (q15_t)0x6918, (q15_t)0x3111, (q15_t)0x6921, (q15_t)0x3109, (q15_t)0x692b, (q15_t)0x3101,
-    (q15_t)0x6935, (q15_t)0x30f9, (q15_t)0x693e, (q15_t)0x30f0, (q15_t)0x6948, (q15_t)0x30e8, (q15_t)0x6951, (q15_t)0x30e0,
-    (q15_t)0x695b, (q15_t)0x30d8, (q15_t)0x6965, (q15_t)0x30d0, (q15_t)0x696e, (q15_t)0x30c8, (q15_t)0x6978, (q15_t)0x30c0,
-    (q15_t)0x6981, (q15_t)0x30b8, (q15_t)0x698b, (q15_t)0x30af, (q15_t)0x6994, (q15_t)0x30a7, (q15_t)0x699e, (q15_t)0x309f,
-    (q15_t)0x69a7, (q15_t)0x3097, (q15_t)0x69b1, (q15_t)0x308f, (q15_t)0x69bb, (q15_t)0x3087, (q15_t)0x69c4, (q15_t)0x307e,
-    (q15_t)0x69ce, (q15_t)0x3076, (q15_t)0x69d7, (q15_t)0x306e, (q15_t)0x69e1, (q15_t)0x3066, (q15_t)0x69ea, (q15_t)0x305d,
-    (q15_t)0x69f4, (q15_t)0x3055, (q15_t)0x69fd, (q15_t)0x304d, (q15_t)0x6a07, (q15_t)0x3045, (q15_t)0x6a10, (q15_t)0x303c,
-    (q15_t)0x6a1a, (q15_t)0x3034, (q15_t)0x6a23, (q15_t)0x302c, (q15_t)0x6a2c, (q15_t)0x3024, (q15_t)0x6a36, (q15_t)0x301b,
-    (q15_t)0x6a3f, (q15_t)0x3013, (q15_t)0x6a49, (q15_t)0x300b, (q15_t)0x6a52, (q15_t)0x3002, (q15_t)0x6a5c, (q15_t)0x2ffa,
-    (q15_t)0x6a65, (q15_t)0x2ff2, (q15_t)0x6a6e, (q15_t)0x2fea, (q15_t)0x6a78, (q15_t)0x2fe1, (q15_t)0x6a81, (q15_t)0x2fd9,
-    (q15_t)0x6a8b, (q15_t)0x2fd0, (q15_t)0x6a94, (q15_t)0x2fc8, (q15_t)0x6a9d, (q15_t)0x2fc0, (q15_t)0x6aa7, (q15_t)0x2fb7,
-    (q15_t)0x6ab0, (q15_t)0x2faf, (q15_t)0x6ab9, (q15_t)0x2fa7, (q15_t)0x6ac3, (q15_t)0x2f9e, (q15_t)0x6acc, (q15_t)0x2f96,
-    (q15_t)0x6ad6, (q15_t)0x2f8d, (q15_t)0x6adf, (q15_t)0x2f85, (q15_t)0x6ae8, (q15_t)0x2f7d, (q15_t)0x6af2, (q15_t)0x2f74,
-    (q15_t)0x6afb, (q15_t)0x2f6c, (q15_t)0x6b04, (q15_t)0x2f63, (q15_t)0x6b0d, (q15_t)0x2f5b, (q15_t)0x6b17, (q15_t)0x2f52,
-    (q15_t)0x6b20, (q15_t)0x2f4a, (q15_t)0x6b29, (q15_t)0x2f41, (q15_t)0x6b33, (q15_t)0x2f39, (q15_t)0x6b3c, (q15_t)0x2f30,
-    (q15_t)0x6b45, (q15_t)0x2f28, (q15_t)0x6b4e, (q15_t)0x2f20, (q15_t)0x6b58, (q15_t)0x2f17, (q15_t)0x6b61, (q15_t)0x2f0e,
-    (q15_t)0x6b6a, (q15_t)0x2f06, (q15_t)0x6b73, (q15_t)0x2efd, (q15_t)0x6b7d, (q15_t)0x2ef5, (q15_t)0x6b86, (q15_t)0x2eec,
-    (q15_t)0x6b8f, (q15_t)0x2ee4, (q15_t)0x6b98, (q15_t)0x2edb, (q15_t)0x6ba1, (q15_t)0x2ed3, (q15_t)0x6bab, (q15_t)0x2eca,
-    (q15_t)0x6bb4, (q15_t)0x2ec2, (q15_t)0x6bbd, (q15_t)0x2eb9, (q15_t)0x6bc6, (q15_t)0x2eb0, (q15_t)0x6bcf, (q15_t)0x2ea8,
-    (q15_t)0x6bd8, (q15_t)0x2e9f, (q15_t)0x6be2, (q15_t)0x2e97, (q15_t)0x6beb, (q15_t)0x2e8e, (q15_t)0x6bf4, (q15_t)0x2e85,
-    (q15_t)0x6bfd, (q15_t)0x2e7d, (q15_t)0x6c06, (q15_t)0x2e74, (q15_t)0x6c0f, (q15_t)0x2e6b, (q15_t)0x6c18, (q15_t)0x2e63,
-    (q15_t)0x6c21, (q15_t)0x2e5a, (q15_t)0x6c2b, (q15_t)0x2e51, (q15_t)0x6c34, (q15_t)0x2e49, (q15_t)0x6c3d, (q15_t)0x2e40,
-    (q15_t)0x6c46, (q15_t)0x2e37, (q15_t)0x6c4f, (q15_t)0x2e2f, (q15_t)0x6c58, (q15_t)0x2e26, (q15_t)0x6c61, (q15_t)0x2e1d,
-    (q15_t)0x6c6a, (q15_t)0x2e15, (q15_t)0x6c73, (q15_t)0x2e0c, (q15_t)0x6c7c, (q15_t)0x2e03, (q15_t)0x6c85, (q15_t)0x2dfa,
-    (q15_t)0x6c8e, (q15_t)0x2df2, (q15_t)0x6c97, (q15_t)0x2de9, (q15_t)0x6ca0, (q15_t)0x2de0, (q15_t)0x6ca9, (q15_t)0x2dd7,
-    (q15_t)0x6cb2, (q15_t)0x2dcf, (q15_t)0x6cbb, (q15_t)0x2dc6, (q15_t)0x6cc4, (q15_t)0x2dbd, (q15_t)0x6ccd, (q15_t)0x2db4,
-    (q15_t)0x6cd6, (q15_t)0x2dab, (q15_t)0x6cdf, (q15_t)0x2da3, (q15_t)0x6ce8, (q15_t)0x2d9a, (q15_t)0x6cf1, (q15_t)0x2d91,
-    (q15_t)0x6cfa, (q15_t)0x2d88, (q15_t)0x6d03, (q15_t)0x2d7f, (q15_t)0x6d0c, (q15_t)0x2d76, (q15_t)0x6d15, (q15_t)0x2d6e,
-    (q15_t)0x6d1e, (q15_t)0x2d65, (q15_t)0x6d27, (q15_t)0x2d5c, (q15_t)0x6d2f, (q15_t)0x2d53, (q15_t)0x6d38, (q15_t)0x2d4a,
-    (q15_t)0x6d41, (q15_t)0x2d41, (q15_t)0x6d4a, (q15_t)0x2d38, (q15_t)0x6d53, (q15_t)0x2d2f, (q15_t)0x6d5c, (q15_t)0x2d27,
-    (q15_t)0x6d65, (q15_t)0x2d1e, (q15_t)0x6d6e, (q15_t)0x2d15, (q15_t)0x6d76, (q15_t)0x2d0c, (q15_t)0x6d7f, (q15_t)0x2d03,
-    (q15_t)0x6d88, (q15_t)0x2cfa, (q15_t)0x6d91, (q15_t)0x2cf1, (q15_t)0x6d9a, (q15_t)0x2ce8, (q15_t)0x6da3, (q15_t)0x2cdf,
-    (q15_t)0x6dab, (q15_t)0x2cd6, (q15_t)0x6db4, (q15_t)0x2ccd, (q15_t)0x6dbd, (q15_t)0x2cc4, (q15_t)0x6dc6, (q15_t)0x2cbb,
-    (q15_t)0x6dcf, (q15_t)0x2cb2, (q15_t)0x6dd7, (q15_t)0x2ca9, (q15_t)0x6de0, (q15_t)0x2ca0, (q15_t)0x6de9, (q15_t)0x2c97,
-    (q15_t)0x6df2, (q15_t)0x2c8e, (q15_t)0x6dfa, (q15_t)0x2c85, (q15_t)0x6e03, (q15_t)0x2c7c, (q15_t)0x6e0c, (q15_t)0x2c73,
-    (q15_t)0x6e15, (q15_t)0x2c6a, (q15_t)0x6e1d, (q15_t)0x2c61, (q15_t)0x6e26, (q15_t)0x2c58, (q15_t)0x6e2f, (q15_t)0x2c4f,
-    (q15_t)0x6e37, (q15_t)0x2c46, (q15_t)0x6e40, (q15_t)0x2c3d, (q15_t)0x6e49, (q15_t)0x2c34, (q15_t)0x6e51, (q15_t)0x2c2b,
-    (q15_t)0x6e5a, (q15_t)0x2c21, (q15_t)0x6e63, (q15_t)0x2c18, (q15_t)0x6e6b, (q15_t)0x2c0f, (q15_t)0x6e74, (q15_t)0x2c06,
-    (q15_t)0x6e7d, (q15_t)0x2bfd, (q15_t)0x6e85, (q15_t)0x2bf4, (q15_t)0x6e8e, (q15_t)0x2beb, (q15_t)0x6e97, (q15_t)0x2be2,
-    (q15_t)0x6e9f, (q15_t)0x2bd8, (q15_t)0x6ea8, (q15_t)0x2bcf, (q15_t)0x6eb0, (q15_t)0x2bc6, (q15_t)0x6eb9, (q15_t)0x2bbd,
-    (q15_t)0x6ec2, (q15_t)0x2bb4, (q15_t)0x6eca, (q15_t)0x2bab, (q15_t)0x6ed3, (q15_t)0x2ba1, (q15_t)0x6edb, (q15_t)0x2b98,
-    (q15_t)0x6ee4, (q15_t)0x2b8f, (q15_t)0x6eec, (q15_t)0x2b86, (q15_t)0x6ef5, (q15_t)0x2b7d, (q15_t)0x6efd, (q15_t)0x2b73,
-    (q15_t)0x6f06, (q15_t)0x2b6a, (q15_t)0x6f0e, (q15_t)0x2b61, (q15_t)0x6f17, (q15_t)0x2b58, (q15_t)0x6f20, (q15_t)0x2b4e,
-    (q15_t)0x6f28, (q15_t)0x2b45, (q15_t)0x6f30, (q15_t)0x2b3c, (q15_t)0x6f39, (q15_t)0x2b33, (q15_t)0x6f41, (q15_t)0x2b29,
-    (q15_t)0x6f4a, (q15_t)0x2b20, (q15_t)0x6f52, (q15_t)0x2b17, (q15_t)0x6f5b, (q15_t)0x2b0d, (q15_t)0x6f63, (q15_t)0x2b04,
-    (q15_t)0x6f6c, (q15_t)0x2afb, (q15_t)0x6f74, (q15_t)0x2af2, (q15_t)0x6f7d, (q15_t)0x2ae8, (q15_t)0x6f85, (q15_t)0x2adf,
-    (q15_t)0x6f8d, (q15_t)0x2ad6, (q15_t)0x6f96, (q15_t)0x2acc, (q15_t)0x6f9e, (q15_t)0x2ac3, (q15_t)0x6fa7, (q15_t)0x2ab9,
-    (q15_t)0x6faf, (q15_t)0x2ab0, (q15_t)0x6fb7, (q15_t)0x2aa7, (q15_t)0x6fc0, (q15_t)0x2a9d, (q15_t)0x6fc8, (q15_t)0x2a94,
-    (q15_t)0x6fd0, (q15_t)0x2a8b, (q15_t)0x6fd9, (q15_t)0x2a81, (q15_t)0x6fe1, (q15_t)0x2a78, (q15_t)0x6fea, (q15_t)0x2a6e,
-    (q15_t)0x6ff2, (q15_t)0x2a65, (q15_t)0x6ffa, (q15_t)0x2a5c, (q15_t)0x7002, (q15_t)0x2a52, (q15_t)0x700b, (q15_t)0x2a49,
-    (q15_t)0x7013, (q15_t)0x2a3f, (q15_t)0x701b, (q15_t)0x2a36, (q15_t)0x7024, (q15_t)0x2a2c, (q15_t)0x702c, (q15_t)0x2a23,
-    (q15_t)0x7034, (q15_t)0x2a1a, (q15_t)0x703c, (q15_t)0x2a10, (q15_t)0x7045, (q15_t)0x2a07, (q15_t)0x704d, (q15_t)0x29fd,
-    (q15_t)0x7055, (q15_t)0x29f4, (q15_t)0x705d, (q15_t)0x29ea, (q15_t)0x7066, (q15_t)0x29e1, (q15_t)0x706e, (q15_t)0x29d7,
-    (q15_t)0x7076, (q15_t)0x29ce, (q15_t)0x707e, (q15_t)0x29c4, (q15_t)0x7087, (q15_t)0x29bb, (q15_t)0x708f, (q15_t)0x29b1,
-    (q15_t)0x7097, (q15_t)0x29a7, (q15_t)0x709f, (q15_t)0x299e, (q15_t)0x70a7, (q15_t)0x2994, (q15_t)0x70af, (q15_t)0x298b,
-    (q15_t)0x70b8, (q15_t)0x2981, (q15_t)0x70c0, (q15_t)0x2978, (q15_t)0x70c8, (q15_t)0x296e, (q15_t)0x70d0, (q15_t)0x2965,
-    (q15_t)0x70d8, (q15_t)0x295b, (q15_t)0x70e0, (q15_t)0x2951, (q15_t)0x70e8, (q15_t)0x2948, (q15_t)0x70f0, (q15_t)0x293e,
-    (q15_t)0x70f9, (q15_t)0x2935, (q15_t)0x7101, (q15_t)0x292b, (q15_t)0x7109, (q15_t)0x2921, (q15_t)0x7111, (q15_t)0x2918,
-    (q15_t)0x7119, (q15_t)0x290e, (q15_t)0x7121, (q15_t)0x2904, (q15_t)0x7129, (q15_t)0x28fb, (q15_t)0x7131, (q15_t)0x28f1,
-    (q15_t)0x7139, (q15_t)0x28e7, (q15_t)0x7141, (q15_t)0x28de, (q15_t)0x7149, (q15_t)0x28d4, (q15_t)0x7151, (q15_t)0x28ca,
-    (q15_t)0x7159, (q15_t)0x28c1, (q15_t)0x7161, (q15_t)0x28b7, (q15_t)0x7169, (q15_t)0x28ad, (q15_t)0x7171, (q15_t)0x28a4,
-    (q15_t)0x7179, (q15_t)0x289a, (q15_t)0x7181, (q15_t)0x2890, (q15_t)0x7189, (q15_t)0x2886, (q15_t)0x7191, (q15_t)0x287d,
-    (q15_t)0x7199, (q15_t)0x2873, (q15_t)0x71a1, (q15_t)0x2869, (q15_t)0x71a9, (q15_t)0x2860, (q15_t)0x71b1, (q15_t)0x2856,
-    (q15_t)0x71b9, (q15_t)0x284c, (q15_t)0x71c0, (q15_t)0x2842, (q15_t)0x71c8, (q15_t)0x2838, (q15_t)0x71d0, (q15_t)0x282f,
-    (q15_t)0x71d8, (q15_t)0x2825, (q15_t)0x71e0, (q15_t)0x281b, (q15_t)0x71e8, (q15_t)0x2811, (q15_t)0x71f0, (q15_t)0x2808,
-    (q15_t)0x71f8, (q15_t)0x27fe, (q15_t)0x71ff, (q15_t)0x27f4, (q15_t)0x7207, (q15_t)0x27ea, (q15_t)0x720f, (q15_t)0x27e0,
-    (q15_t)0x7217, (q15_t)0x27d6, (q15_t)0x721f, (q15_t)0x27cd, (q15_t)0x7227, (q15_t)0x27c3, (q15_t)0x722e, (q15_t)0x27b9,
-    (q15_t)0x7236, (q15_t)0x27af, (q15_t)0x723e, (q15_t)0x27a5, (q15_t)0x7246, (q15_t)0x279b, (q15_t)0x724e, (q15_t)0x2791,
-    (q15_t)0x7255, (q15_t)0x2788, (q15_t)0x725d, (q15_t)0x277e, (q15_t)0x7265, (q15_t)0x2774, (q15_t)0x726d, (q15_t)0x276a,
-    (q15_t)0x7274, (q15_t)0x2760, (q15_t)0x727c, (q15_t)0x2756, (q15_t)0x7284, (q15_t)0x274c, (q15_t)0x728b, (q15_t)0x2742,
-    (q15_t)0x7293, (q15_t)0x2738, (q15_t)0x729b, (q15_t)0x272e, (q15_t)0x72a3, (q15_t)0x2724, (q15_t)0x72aa, (q15_t)0x271a,
-    (q15_t)0x72b2, (q15_t)0x2711, (q15_t)0x72ba, (q15_t)0x2707, (q15_t)0x72c1, (q15_t)0x26fd, (q15_t)0x72c9, (q15_t)0x26f3,
-    (q15_t)0x72d0, (q15_t)0x26e9, (q15_t)0x72d8, (q15_t)0x26df, (q15_t)0x72e0, (q15_t)0x26d5, (q15_t)0x72e7, (q15_t)0x26cb,
-    (q15_t)0x72ef, (q15_t)0x26c1, (q15_t)0x72f7, (q15_t)0x26b7, (q15_t)0x72fe, (q15_t)0x26ad, (q15_t)0x7306, (q15_t)0x26a3,
-    (q15_t)0x730d, (q15_t)0x2699, (q15_t)0x7315, (q15_t)0x268f, (q15_t)0x731d, (q15_t)0x2685, (q15_t)0x7324, (q15_t)0x267b,
-    (q15_t)0x732c, (q15_t)0x2671, (q15_t)0x7333, (q15_t)0x2666, (q15_t)0x733b, (q15_t)0x265c, (q15_t)0x7342, (q15_t)0x2652,
-    (q15_t)0x734a, (q15_t)0x2648, (q15_t)0x7351, (q15_t)0x263e, (q15_t)0x7359, (q15_t)0x2634, (q15_t)0x7360, (q15_t)0x262a,
-    (q15_t)0x7368, (q15_t)0x2620, (q15_t)0x736f, (q15_t)0x2616, (q15_t)0x7377, (q15_t)0x260c, (q15_t)0x737e, (q15_t)0x2602,
-    (q15_t)0x7386, (q15_t)0x25f8, (q15_t)0x738d, (q15_t)0x25ed, (q15_t)0x7395, (q15_t)0x25e3, (q15_t)0x739c, (q15_t)0x25d9,
-    (q15_t)0x73a3, (q15_t)0x25cf, (q15_t)0x73ab, (q15_t)0x25c5, (q15_t)0x73b2, (q15_t)0x25bb, (q15_t)0x73ba, (q15_t)0x25b1,
-    (q15_t)0x73c1, (q15_t)0x25a6, (q15_t)0x73c8, (q15_t)0x259c, (q15_t)0x73d0, (q15_t)0x2592, (q15_t)0x73d7, (q15_t)0x2588,
-    (q15_t)0x73df, (q15_t)0x257e, (q15_t)0x73e6, (q15_t)0x2574, (q15_t)0x73ed, (q15_t)0x2569, (q15_t)0x73f5, (q15_t)0x255f,
-    (q15_t)0x73fc, (q15_t)0x2555, (q15_t)0x7403, (q15_t)0x254b, (q15_t)0x740b, (q15_t)0x2541, (q15_t)0x7412, (q15_t)0x2536,
-    (q15_t)0x7419, (q15_t)0x252c, (q15_t)0x7420, (q15_t)0x2522, (q15_t)0x7428, (q15_t)0x2518, (q15_t)0x742f, (q15_t)0x250d,
-    (q15_t)0x7436, (q15_t)0x2503, (q15_t)0x743e, (q15_t)0x24f9, (q15_t)0x7445, (q15_t)0x24ef, (q15_t)0x744c, (q15_t)0x24e4,
-    (q15_t)0x7453, (q15_t)0x24da, (q15_t)0x745b, (q15_t)0x24d0, (q15_t)0x7462, (q15_t)0x24c5, (q15_t)0x7469, (q15_t)0x24bb,
-    (q15_t)0x7470, (q15_t)0x24b1, (q15_t)0x7477, (q15_t)0x24a7, (q15_t)0x747f, (q15_t)0x249c, (q15_t)0x7486, (q15_t)0x2492,
-    (q15_t)0x748d, (q15_t)0x2488, (q15_t)0x7494, (q15_t)0x247d, (q15_t)0x749b, (q15_t)0x2473, (q15_t)0x74a2, (q15_t)0x2469,
-    (q15_t)0x74aa, (q15_t)0x245e, (q15_t)0x74b1, (q15_t)0x2454, (q15_t)0x74b8, (q15_t)0x244a, (q15_t)0x74bf, (q15_t)0x243f,
-    (q15_t)0x74c6, (q15_t)0x2435, (q15_t)0x74cd, (q15_t)0x242b, (q15_t)0x74d4, (q15_t)0x2420, (q15_t)0x74db, (q15_t)0x2416,
-    (q15_t)0x74e2, (q15_t)0x240b, (q15_t)0x74ea, (q15_t)0x2401, (q15_t)0x74f1, (q15_t)0x23f7, (q15_t)0x74f8, (q15_t)0x23ec,
-    (q15_t)0x74ff, (q15_t)0x23e2, (q15_t)0x7506, (q15_t)0x23d7, (q15_t)0x750d, (q15_t)0x23cd, (q15_t)0x7514, (q15_t)0x23c3,
-    (q15_t)0x751b, (q15_t)0x23b8, (q15_t)0x7522, (q15_t)0x23ae, (q15_t)0x7529, (q15_t)0x23a3, (q15_t)0x7530, (q15_t)0x2399,
-    (q15_t)0x7537, (q15_t)0x238e, (q15_t)0x753e, (q15_t)0x2384, (q15_t)0x7545, (q15_t)0x237a, (q15_t)0x754c, (q15_t)0x236f,
-    (q15_t)0x7553, (q15_t)0x2365, (q15_t)0x755a, (q15_t)0x235a, (q15_t)0x7561, (q15_t)0x2350, (q15_t)0x7567, (q15_t)0x2345,
-    (q15_t)0x756e, (q15_t)0x233b, (q15_t)0x7575, (q15_t)0x2330, (q15_t)0x757c, (q15_t)0x2326, (q15_t)0x7583, (q15_t)0x231b,
-    (q15_t)0x758a, (q15_t)0x2311, (q15_t)0x7591, (q15_t)0x2306, (q15_t)0x7598, (q15_t)0x22fc, (q15_t)0x759f, (q15_t)0x22f1,
-    (q15_t)0x75a5, (q15_t)0x22e7, (q15_t)0x75ac, (q15_t)0x22dc, (q15_t)0x75b3, (q15_t)0x22d2, (q15_t)0x75ba, (q15_t)0x22c7,
-    (q15_t)0x75c1, (q15_t)0x22bc, (q15_t)0x75c8, (q15_t)0x22b2, (q15_t)0x75ce, (q15_t)0x22a7, (q15_t)0x75d5, (q15_t)0x229d,
-    (q15_t)0x75dc, (q15_t)0x2292, (q15_t)0x75e3, (q15_t)0x2288, (q15_t)0x75ea, (q15_t)0x227d, (q15_t)0x75f0, (q15_t)0x2272,
-    (q15_t)0x75f7, (q15_t)0x2268, (q15_t)0x75fe, (q15_t)0x225d, (q15_t)0x7605, (q15_t)0x2253, (q15_t)0x760b, (q15_t)0x2248,
-    (q15_t)0x7612, (q15_t)0x223d, (q15_t)0x7619, (q15_t)0x2233, (q15_t)0x7620, (q15_t)0x2228, (q15_t)0x7626, (q15_t)0x221e,
-    (q15_t)0x762d, (q15_t)0x2213, (q15_t)0x7634, (q15_t)0x2208, (q15_t)0x763a, (q15_t)0x21fe, (q15_t)0x7641, (q15_t)0x21f3,
-    (q15_t)0x7648, (q15_t)0x21e8, (q15_t)0x764e, (q15_t)0x21de, (q15_t)0x7655, (q15_t)0x21d3, (q15_t)0x765c, (q15_t)0x21c8,
-    (q15_t)0x7662, (q15_t)0x21be, (q15_t)0x7669, (q15_t)0x21b3, (q15_t)0x766f, (q15_t)0x21a8, (q15_t)0x7676, (q15_t)0x219e,
-    (q15_t)0x767d, (q15_t)0x2193, (q15_t)0x7683, (q15_t)0x2188, (q15_t)0x768a, (q15_t)0x217d, (q15_t)0x7690, (q15_t)0x2173,
-    (q15_t)0x7697, (q15_t)0x2168, (q15_t)0x769d, (q15_t)0x215d, (q15_t)0x76a4, (q15_t)0x2153, (q15_t)0x76ab, (q15_t)0x2148,
-    (q15_t)0x76b1, (q15_t)0x213d, (q15_t)0x76b8, (q15_t)0x2132, (q15_t)0x76be, (q15_t)0x2128, (q15_t)0x76c5, (q15_t)0x211d,
-    (q15_t)0x76cb, (q15_t)0x2112, (q15_t)0x76d2, (q15_t)0x2107, (q15_t)0x76d8, (q15_t)0x20fd, (q15_t)0x76df, (q15_t)0x20f2,
-    (q15_t)0x76e5, (q15_t)0x20e7, (q15_t)0x76eb, (q15_t)0x20dc, (q15_t)0x76f2, (q15_t)0x20d1, (q15_t)0x76f8, (q15_t)0x20c7,
-    (q15_t)0x76ff, (q15_t)0x20bc, (q15_t)0x7705, (q15_t)0x20b1, (q15_t)0x770c, (q15_t)0x20a6, (q15_t)0x7712, (q15_t)0x209b,
-    (q15_t)0x7718, (q15_t)0x2091, (q15_t)0x771f, (q15_t)0x2086, (q15_t)0x7725, (q15_t)0x207b, (q15_t)0x772c, (q15_t)0x2070,
-    (q15_t)0x7732, (q15_t)0x2065, (q15_t)0x7738, (q15_t)0x205b, (q15_t)0x773f, (q15_t)0x2050, (q15_t)0x7745, (q15_t)0x2045,
-    (q15_t)0x774b, (q15_t)0x203a, (q15_t)0x7752, (q15_t)0x202f, (q15_t)0x7758, (q15_t)0x2024, (q15_t)0x775e, (q15_t)0x2019,
-    (q15_t)0x7765, (q15_t)0x200f, (q15_t)0x776b, (q15_t)0x2004, (q15_t)0x7771, (q15_t)0x1ff9, (q15_t)0x7777, (q15_t)0x1fee,
-    (q15_t)0x777e, (q15_t)0x1fe3, (q15_t)0x7784, (q15_t)0x1fd8, (q15_t)0x778a, (q15_t)0x1fcd, (q15_t)0x7790, (q15_t)0x1fc2,
-    (q15_t)0x7797, (q15_t)0x1fb7, (q15_t)0x779d, (q15_t)0x1fac, (q15_t)0x77a3, (q15_t)0x1fa2, (q15_t)0x77a9, (q15_t)0x1f97,
-    (q15_t)0x77b0, (q15_t)0x1f8c, (q15_t)0x77b6, (q15_t)0x1f81, (q15_t)0x77bc, (q15_t)0x1f76, (q15_t)0x77c2, (q15_t)0x1f6b,
-    (q15_t)0x77c8, (q15_t)0x1f60, (q15_t)0x77ce, (q15_t)0x1f55, (q15_t)0x77d5, (q15_t)0x1f4a, (q15_t)0x77db, (q15_t)0x1f3f,
-    (q15_t)0x77e1, (q15_t)0x1f34, (q15_t)0x77e7, (q15_t)0x1f29, (q15_t)0x77ed, (q15_t)0x1f1e, (q15_t)0x77f3, (q15_t)0x1f13,
-    (q15_t)0x77f9, (q15_t)0x1f08, (q15_t)0x77ff, (q15_t)0x1efd, (q15_t)0x7805, (q15_t)0x1ef2, (q15_t)0x780b, (q15_t)0x1ee7,
-    (q15_t)0x7812, (q15_t)0x1edc, (q15_t)0x7818, (q15_t)0x1ed1, (q15_t)0x781e, (q15_t)0x1ec6, (q15_t)0x7824, (q15_t)0x1ebb,
-    (q15_t)0x782a, (q15_t)0x1eb0, (q15_t)0x7830, (q15_t)0x1ea5, (q15_t)0x7836, (q15_t)0x1e9a, (q15_t)0x783c, (q15_t)0x1e8f,
-    (q15_t)0x7842, (q15_t)0x1e84, (q15_t)0x7848, (q15_t)0x1e79, (q15_t)0x784e, (q15_t)0x1e6e, (q15_t)0x7854, (q15_t)0x1e63,
-    (q15_t)0x785a, (q15_t)0x1e58, (q15_t)0x7860, (q15_t)0x1e4d, (q15_t)0x7866, (q15_t)0x1e42, (q15_t)0x786b, (q15_t)0x1e36,
-    (q15_t)0x7871, (q15_t)0x1e2b, (q15_t)0x7877, (q15_t)0x1e20, (q15_t)0x787d, (q15_t)0x1e15, (q15_t)0x7883, (q15_t)0x1e0a,
-    (q15_t)0x7889, (q15_t)0x1dff, (q15_t)0x788f, (q15_t)0x1df4, (q15_t)0x7895, (q15_t)0x1de9, (q15_t)0x789b, (q15_t)0x1dde,
-    (q15_t)0x78a1, (q15_t)0x1dd3, (q15_t)0x78a6, (q15_t)0x1dc7, (q15_t)0x78ac, (q15_t)0x1dbc, (q15_t)0x78b2, (q15_t)0x1db1,
-    (q15_t)0x78b8, (q15_t)0x1da6, (q15_t)0x78be, (q15_t)0x1d9b, (q15_t)0x78c3, (q15_t)0x1d90, (q15_t)0x78c9, (q15_t)0x1d85,
-    (q15_t)0x78cf, (q15_t)0x1d79, (q15_t)0x78d5, (q15_t)0x1d6e, (q15_t)0x78db, (q15_t)0x1d63, (q15_t)0x78e0, (q15_t)0x1d58,
-    (q15_t)0x78e6, (q15_t)0x1d4d, (q15_t)0x78ec, (q15_t)0x1d42, (q15_t)0x78f2, (q15_t)0x1d36, (q15_t)0x78f7, (q15_t)0x1d2b,
-    (q15_t)0x78fd, (q15_t)0x1d20, (q15_t)0x7903, (q15_t)0x1d15, (q15_t)0x7909, (q15_t)0x1d0a, (q15_t)0x790e, (q15_t)0x1cff,
-    (q15_t)0x7914, (q15_t)0x1cf3, (q15_t)0x791a, (q15_t)0x1ce8, (q15_t)0x791f, (q15_t)0x1cdd, (q15_t)0x7925, (q15_t)0x1cd2,
-    (q15_t)0x792b, (q15_t)0x1cc6, (q15_t)0x7930, (q15_t)0x1cbb, (q15_t)0x7936, (q15_t)0x1cb0, (q15_t)0x793b, (q15_t)0x1ca5,
-    (q15_t)0x7941, (q15_t)0x1c99, (q15_t)0x7947, (q15_t)0x1c8e, (q15_t)0x794c, (q15_t)0x1c83, (q15_t)0x7952, (q15_t)0x1c78,
-    (q15_t)0x7958, (q15_t)0x1c6c, (q15_t)0x795d, (q15_t)0x1c61, (q15_t)0x7963, (q15_t)0x1c56, (q15_t)0x7968, (q15_t)0x1c4b,
-    (q15_t)0x796e, (q15_t)0x1c3f, (q15_t)0x7973, (q15_t)0x1c34, (q15_t)0x7979, (q15_t)0x1c29, (q15_t)0x797e, (q15_t)0x1c1e,
-    (q15_t)0x7984, (q15_t)0x1c12, (q15_t)0x7989, (q15_t)0x1c07, (q15_t)0x798f, (q15_t)0x1bfc, (q15_t)0x7994, (q15_t)0x1bf0,
-    (q15_t)0x799a, (q15_t)0x1be5, (q15_t)0x799f, (q15_t)0x1bda, (q15_t)0x79a5, (q15_t)0x1bce, (q15_t)0x79aa, (q15_t)0x1bc3,
-    (q15_t)0x79b0, (q15_t)0x1bb8, (q15_t)0x79b5, (q15_t)0x1bac, (q15_t)0x79bb, (q15_t)0x1ba1, (q15_t)0x79c0, (q15_t)0x1b96,
-    (q15_t)0x79c5, (q15_t)0x1b8a, (q15_t)0x79cb, (q15_t)0x1b7f, (q15_t)0x79d0, (q15_t)0x1b74, (q15_t)0x79d6, (q15_t)0x1b68,
-    (q15_t)0x79db, (q15_t)0x1b5d, (q15_t)0x79e0, (q15_t)0x1b52, (q15_t)0x79e6, (q15_t)0x1b46, (q15_t)0x79eb, (q15_t)0x1b3b,
-    (q15_t)0x79f0, (q15_t)0x1b30, (q15_t)0x79f6, (q15_t)0x1b24, (q15_t)0x79fb, (q15_t)0x1b19, (q15_t)0x7a00, (q15_t)0x1b0d,
-    (q15_t)0x7a06, (q15_t)0x1b02, (q15_t)0x7a0b, (q15_t)0x1af7, (q15_t)0x7a10, (q15_t)0x1aeb, (q15_t)0x7a16, (q15_t)0x1ae0,
-    (q15_t)0x7a1b, (q15_t)0x1ad4, (q15_t)0x7a20, (q15_t)0x1ac9, (q15_t)0x7a25, (q15_t)0x1abe, (q15_t)0x7a2b, (q15_t)0x1ab2,
-    (q15_t)0x7a30, (q15_t)0x1aa7, (q15_t)0x7a35, (q15_t)0x1a9b, (q15_t)0x7a3a, (q15_t)0x1a90, (q15_t)0x7a3f, (q15_t)0x1a84,
-    (q15_t)0x7a45, (q15_t)0x1a79, (q15_t)0x7a4a, (q15_t)0x1a6e, (q15_t)0x7a4f, (q15_t)0x1a62, (q15_t)0x7a54, (q15_t)0x1a57,
-    (q15_t)0x7a59, (q15_t)0x1a4b, (q15_t)0x7a5f, (q15_t)0x1a40, (q15_t)0x7a64, (q15_t)0x1a34, (q15_t)0x7a69, (q15_t)0x1a29,
-    (q15_t)0x7a6e, (q15_t)0x1a1d, (q15_t)0x7a73, (q15_t)0x1a12, (q15_t)0x7a78, (q15_t)0x1a06, (q15_t)0x7a7d, (q15_t)0x19fb,
-    (q15_t)0x7a82, (q15_t)0x19ef, (q15_t)0x7a88, (q15_t)0x19e4, (q15_t)0x7a8d, (q15_t)0x19d8, (q15_t)0x7a92, (q15_t)0x19cd,
-    (q15_t)0x7a97, (q15_t)0x19c1, (q15_t)0x7a9c, (q15_t)0x19b6, (q15_t)0x7aa1, (q15_t)0x19aa, (q15_t)0x7aa6, (q15_t)0x199f,
-    (q15_t)0x7aab, (q15_t)0x1993, (q15_t)0x7ab0, (q15_t)0x1988, (q15_t)0x7ab5, (q15_t)0x197c, (q15_t)0x7aba, (q15_t)0x1971,
-    (q15_t)0x7abf, (q15_t)0x1965, (q15_t)0x7ac4, (q15_t)0x195a, (q15_t)0x7ac9, (q15_t)0x194e, (q15_t)0x7ace, (q15_t)0x1943,
-    (q15_t)0x7ad3, (q15_t)0x1937, (q15_t)0x7ad8, (q15_t)0x192c, (q15_t)0x7add, (q15_t)0x1920, (q15_t)0x7ae2, (q15_t)0x1914,
-    (q15_t)0x7ae6, (q15_t)0x1909, (q15_t)0x7aeb, (q15_t)0x18fd, (q15_t)0x7af0, (q15_t)0x18f2, (q15_t)0x7af5, (q15_t)0x18e6,
-    (q15_t)0x7afa, (q15_t)0x18db, (q15_t)0x7aff, (q15_t)0x18cf, (q15_t)0x7b04, (q15_t)0x18c3, (q15_t)0x7b09, (q15_t)0x18b8,
-    (q15_t)0x7b0e, (q15_t)0x18ac, (q15_t)0x7b12, (q15_t)0x18a1, (q15_t)0x7b17, (q15_t)0x1895, (q15_t)0x7b1c, (q15_t)0x1889,
-    (q15_t)0x7b21, (q15_t)0x187e, (q15_t)0x7b26, (q15_t)0x1872, (q15_t)0x7b2a, (q15_t)0x1867, (q15_t)0x7b2f, (q15_t)0x185b,
-    (q15_t)0x7b34, (q15_t)0x184f, (q15_t)0x7b39, (q15_t)0x1844, (q15_t)0x7b3e, (q15_t)0x1838, (q15_t)0x7b42, (q15_t)0x182d,
-    (q15_t)0x7b47, (q15_t)0x1821, (q15_t)0x7b4c, (q15_t)0x1815, (q15_t)0x7b50, (q15_t)0x180a, (q15_t)0x7b55, (q15_t)0x17fe,
-    (q15_t)0x7b5a, (q15_t)0x17f2, (q15_t)0x7b5f, (q15_t)0x17e7, (q15_t)0x7b63, (q15_t)0x17db, (q15_t)0x7b68, (q15_t)0x17cf,
-    (q15_t)0x7b6d, (q15_t)0x17c4, (q15_t)0x7b71, (q15_t)0x17b8, (q15_t)0x7b76, (q15_t)0x17ac, (q15_t)0x7b7b, (q15_t)0x17a1,
-    (q15_t)0x7b7f, (q15_t)0x1795, (q15_t)0x7b84, (q15_t)0x1789, (q15_t)0x7b88, (q15_t)0x177e, (q15_t)0x7b8d, (q15_t)0x1772,
-    (q15_t)0x7b92, (q15_t)0x1766, (q15_t)0x7b96, (q15_t)0x175b, (q15_t)0x7b9b, (q15_t)0x174f, (q15_t)0x7b9f, (q15_t)0x1743,
-    (q15_t)0x7ba4, (q15_t)0x1737, (q15_t)0x7ba9, (q15_t)0x172c, (q15_t)0x7bad, (q15_t)0x1720, (q15_t)0x7bb2, (q15_t)0x1714,
-    (q15_t)0x7bb6, (q15_t)0x1709, (q15_t)0x7bbb, (q15_t)0x16fd, (q15_t)0x7bbf, (q15_t)0x16f1, (q15_t)0x7bc4, (q15_t)0x16e5,
-    (q15_t)0x7bc8, (q15_t)0x16da, (q15_t)0x7bcd, (q15_t)0x16ce, (q15_t)0x7bd1, (q15_t)0x16c2, (q15_t)0x7bd6, (q15_t)0x16b6,
-    (q15_t)0x7bda, (q15_t)0x16ab, (q15_t)0x7bde, (q15_t)0x169f, (q15_t)0x7be3, (q15_t)0x1693, (q15_t)0x7be7, (q15_t)0x1687,
-    (q15_t)0x7bec, (q15_t)0x167c, (q15_t)0x7bf0, (q15_t)0x1670, (q15_t)0x7bf5, (q15_t)0x1664, (q15_t)0x7bf9, (q15_t)0x1658,
-    (q15_t)0x7bfd, (q15_t)0x164c, (q15_t)0x7c02, (q15_t)0x1641, (q15_t)0x7c06, (q15_t)0x1635, (q15_t)0x7c0a, (q15_t)0x1629,
-    (q15_t)0x7c0f, (q15_t)0x161d, (q15_t)0x7c13, (q15_t)0x1612, (q15_t)0x7c17, (q15_t)0x1606, (q15_t)0x7c1c, (q15_t)0x15fa,
-    (q15_t)0x7c20, (q15_t)0x15ee, (q15_t)0x7c24, (q15_t)0x15e2, (q15_t)0x7c29, (q15_t)0x15d7, (q15_t)0x7c2d, (q15_t)0x15cb,
-    (q15_t)0x7c31, (q15_t)0x15bf, (q15_t)0x7c36, (q15_t)0x15b3, (q15_t)0x7c3a, (q15_t)0x15a7, (q15_t)0x7c3e, (q15_t)0x159b,
-    (q15_t)0x7c42, (q15_t)0x1590, (q15_t)0x7c46, (q15_t)0x1584, (q15_t)0x7c4b, (q15_t)0x1578, (q15_t)0x7c4f, (q15_t)0x156c,
-    (q15_t)0x7c53, (q15_t)0x1560, (q15_t)0x7c57, (q15_t)0x1554, (q15_t)0x7c5b, (q15_t)0x1549, (q15_t)0x7c60, (q15_t)0x153d,
-    (q15_t)0x7c64, (q15_t)0x1531, (q15_t)0x7c68, (q15_t)0x1525, (q15_t)0x7c6c, (q15_t)0x1519, (q15_t)0x7c70, (q15_t)0x150d,
-    (q15_t)0x7c74, (q15_t)0x1501, (q15_t)0x7c79, (q15_t)0x14f6, (q15_t)0x7c7d, (q15_t)0x14ea, (q15_t)0x7c81, (q15_t)0x14de,
-    (q15_t)0x7c85, (q15_t)0x14d2, (q15_t)0x7c89, (q15_t)0x14c6, (q15_t)0x7c8d, (q15_t)0x14ba, (q15_t)0x7c91, (q15_t)0x14ae,
-    (q15_t)0x7c95, (q15_t)0x14a2, (q15_t)0x7c99, (q15_t)0x1496, (q15_t)0x7c9d, (q15_t)0x148b, (q15_t)0x7ca1, (q15_t)0x147f,
-    (q15_t)0x7ca5, (q15_t)0x1473, (q15_t)0x7ca9, (q15_t)0x1467, (q15_t)0x7cad, (q15_t)0x145b, (q15_t)0x7cb1, (q15_t)0x144f,
-    (q15_t)0x7cb5, (q15_t)0x1443, (q15_t)0x7cb9, (q15_t)0x1437, (q15_t)0x7cbd, (q15_t)0x142b, (q15_t)0x7cc1, (q15_t)0x141f,
-    (q15_t)0x7cc5, (q15_t)0x1413, (q15_t)0x7cc9, (q15_t)0x1407, (q15_t)0x7ccd, (q15_t)0x13fb, (q15_t)0x7cd1, (q15_t)0x13f0,
-    (q15_t)0x7cd5, (q15_t)0x13e4, (q15_t)0x7cd9, (q15_t)0x13d8, (q15_t)0x7cdd, (q15_t)0x13cc, (q15_t)0x7ce0, (q15_t)0x13c0,
-    (q15_t)0x7ce4, (q15_t)0x13b4, (q15_t)0x7ce8, (q15_t)0x13a8, (q15_t)0x7cec, (q15_t)0x139c, (q15_t)0x7cf0, (q15_t)0x1390,
-    (q15_t)0x7cf4, (q15_t)0x1384, (q15_t)0x7cf8, (q15_t)0x1378, (q15_t)0x7cfb, (q15_t)0x136c, (q15_t)0x7cff, (q15_t)0x1360,
-    (q15_t)0x7d03, (q15_t)0x1354, (q15_t)0x7d07, (q15_t)0x1348, (q15_t)0x7d0b, (q15_t)0x133c, (q15_t)0x7d0e, (q15_t)0x1330,
-    (q15_t)0x7d12, (q15_t)0x1324, (q15_t)0x7d16, (q15_t)0x1318, (q15_t)0x7d1a, (q15_t)0x130c, (q15_t)0x7d1d, (q15_t)0x1300,
-    (q15_t)0x7d21, (q15_t)0x12f4, (q15_t)0x7d25, (q15_t)0x12e8, (q15_t)0x7d28, (q15_t)0x12dc, (q15_t)0x7d2c, (q15_t)0x12d0,
-    (q15_t)0x7d30, (q15_t)0x12c4, (q15_t)0x7d34, (q15_t)0x12b8, (q15_t)0x7d37, (q15_t)0x12ac, (q15_t)0x7d3b, (q15_t)0x12a0,
-    (q15_t)0x7d3f, (q15_t)0x1294, (q15_t)0x7d42, (q15_t)0x1288, (q15_t)0x7d46, (q15_t)0x127c, (q15_t)0x7d49, (q15_t)0x1270,
-    (q15_t)0x7d4d, (q15_t)0x1264, (q15_t)0x7d51, (q15_t)0x1258, (q15_t)0x7d54, (q15_t)0x124c, (q15_t)0x7d58, (q15_t)0x1240,
-    (q15_t)0x7d5b, (q15_t)0x1234, (q15_t)0x7d5f, (q15_t)0x1228, (q15_t)0x7d63, (q15_t)0x121c, (q15_t)0x7d66, (q15_t)0x1210,
-    (q15_t)0x7d6a, (q15_t)0x1204, (q15_t)0x7d6d, (q15_t)0x11f7, (q15_t)0x7d71, (q15_t)0x11eb, (q15_t)0x7d74, (q15_t)0x11df,
-    (q15_t)0x7d78, (q15_t)0x11d3, (q15_t)0x7d7b, (q15_t)0x11c7, (q15_t)0x7d7f, (q15_t)0x11bb, (q15_t)0x7d82, (q15_t)0x11af,
-    (q15_t)0x7d86, (q15_t)0x11a3, (q15_t)0x7d89, (q15_t)0x1197, (q15_t)0x7d8d, (q15_t)0x118b, (q15_t)0x7d90, (q15_t)0x117f,
-    (q15_t)0x7d93, (q15_t)0x1173, (q15_t)0x7d97, (q15_t)0x1167, (q15_t)0x7d9a, (q15_t)0x115a, (q15_t)0x7d9e, (q15_t)0x114e,
-    (q15_t)0x7da1, (q15_t)0x1142, (q15_t)0x7da4, (q15_t)0x1136, (q15_t)0x7da8, (q15_t)0x112a, (q15_t)0x7dab, (q15_t)0x111e,
-    (q15_t)0x7daf, (q15_t)0x1112, (q15_t)0x7db2, (q15_t)0x1106, (q15_t)0x7db5, (q15_t)0x10fa, (q15_t)0x7db9, (q15_t)0x10ed,
-    (q15_t)0x7dbc, (q15_t)0x10e1, (q15_t)0x7dbf, (q15_t)0x10d5, (q15_t)0x7dc2, (q15_t)0x10c9, (q15_t)0x7dc6, (q15_t)0x10bd,
-    (q15_t)0x7dc9, (q15_t)0x10b1, (q15_t)0x7dcc, (q15_t)0x10a5, (q15_t)0x7dd0, (q15_t)0x1099, (q15_t)0x7dd3, (q15_t)0x108c,
-    (q15_t)0x7dd6, (q15_t)0x1080, (q15_t)0x7dd9, (q15_t)0x1074, (q15_t)0x7ddd, (q15_t)0x1068, (q15_t)0x7de0, (q15_t)0x105c,
-    (q15_t)0x7de3, (q15_t)0x1050, (q15_t)0x7de6, (q15_t)0x1044, (q15_t)0x7de9, (q15_t)0x1037, (q15_t)0x7ded, (q15_t)0x102b,
-    (q15_t)0x7df0, (q15_t)0x101f, (q15_t)0x7df3, (q15_t)0x1013, (q15_t)0x7df6, (q15_t)0x1007, (q15_t)0x7df9, (q15_t)0xffb,
-    (q15_t)0x7dfc, (q15_t)0xfee, (q15_t)0x7dff, (q15_t)0xfe2, (q15_t)0x7e03, (q15_t)0xfd6, (q15_t)0x7e06, (q15_t)0xfca,
-    (q15_t)0x7e09, (q15_t)0xfbe, (q15_t)0x7e0c, (q15_t)0xfb2, (q15_t)0x7e0f, (q15_t)0xfa5, (q15_t)0x7e12, (q15_t)0xf99,
-    (q15_t)0x7e15, (q15_t)0xf8d, (q15_t)0x7e18, (q15_t)0xf81, (q15_t)0x7e1b, (q15_t)0xf75, (q15_t)0x7e1e, (q15_t)0xf68,
-    (q15_t)0x7e21, (q15_t)0xf5c, (q15_t)0x7e24, (q15_t)0xf50, (q15_t)0x7e27, (q15_t)0xf44, (q15_t)0x7e2a, (q15_t)0xf38,
-    (q15_t)0x7e2d, (q15_t)0xf2b, (q15_t)0x7e30, (q15_t)0xf1f, (q15_t)0x7e33, (q15_t)0xf13, (q15_t)0x7e36, (q15_t)0xf07,
-    (q15_t)0x7e39, (q15_t)0xefb, (q15_t)0x7e3c, (q15_t)0xeee, (q15_t)0x7e3f, (q15_t)0xee2, (q15_t)0x7e42, (q15_t)0xed6,
-    (q15_t)0x7e45, (q15_t)0xeca, (q15_t)0x7e48, (q15_t)0xebd, (q15_t)0x7e4a, (q15_t)0xeb1, (q15_t)0x7e4d, (q15_t)0xea5,
-    (q15_t)0x7e50, (q15_t)0xe99, (q15_t)0x7e53, (q15_t)0xe8c, (q15_t)0x7e56, (q15_t)0xe80, (q15_t)0x7e59, (q15_t)0xe74,
-    (q15_t)0x7e5c, (q15_t)0xe68, (q15_t)0x7e5e, (q15_t)0xe5c, (q15_t)0x7e61, (q15_t)0xe4f, (q15_t)0x7e64, (q15_t)0xe43,
-    (q15_t)0x7e67, (q15_t)0xe37, (q15_t)0x7e6a, (q15_t)0xe2b, (q15_t)0x7e6c, (q15_t)0xe1e, (q15_t)0x7e6f, (q15_t)0xe12,
-    (q15_t)0x7e72, (q15_t)0xe06, (q15_t)0x7e75, (q15_t)0xdf9, (q15_t)0x7e77, (q15_t)0xded, (q15_t)0x7e7a, (q15_t)0xde1,
-    (q15_t)0x7e7d, (q15_t)0xdd5, (q15_t)0x7e80, (q15_t)0xdc8, (q15_t)0x7e82, (q15_t)0xdbc, (q15_t)0x7e85, (q15_t)0xdb0,
-    (q15_t)0x7e88, (q15_t)0xda4, (q15_t)0x7e8a, (q15_t)0xd97, (q15_t)0x7e8d, (q15_t)0xd8b, (q15_t)0x7e90, (q15_t)0xd7f,
-    (q15_t)0x7e92, (q15_t)0xd72, (q15_t)0x7e95, (q15_t)0xd66, (q15_t)0x7e98, (q15_t)0xd5a, (q15_t)0x7e9a, (q15_t)0xd4e,
-    (q15_t)0x7e9d, (q15_t)0xd41, (q15_t)0x7e9f, (q15_t)0xd35, (q15_t)0x7ea2, (q15_t)0xd29, (q15_t)0x7ea5, (q15_t)0xd1c,
-    (q15_t)0x7ea7, (q15_t)0xd10, (q15_t)0x7eaa, (q15_t)0xd04, (q15_t)0x7eac, (q15_t)0xcf8, (q15_t)0x7eaf, (q15_t)0xceb,
-    (q15_t)0x7eb1, (q15_t)0xcdf, (q15_t)0x7eb4, (q15_t)0xcd3, (q15_t)0x7eb6, (q15_t)0xcc6, (q15_t)0x7eb9, (q15_t)0xcba,
-    (q15_t)0x7ebb, (q15_t)0xcae, (q15_t)0x7ebe, (q15_t)0xca1, (q15_t)0x7ec0, (q15_t)0xc95, (q15_t)0x7ec3, (q15_t)0xc89,
-    (q15_t)0x7ec5, (q15_t)0xc7c, (q15_t)0x7ec8, (q15_t)0xc70, (q15_t)0x7eca, (q15_t)0xc64, (q15_t)0x7ecc, (q15_t)0xc57,
-    (q15_t)0x7ecf, (q15_t)0xc4b, (q15_t)0x7ed1, (q15_t)0xc3f, (q15_t)0x7ed4, (q15_t)0xc32, (q15_t)0x7ed6, (q15_t)0xc26,
-    (q15_t)0x7ed8, (q15_t)0xc1a, (q15_t)0x7edb, (q15_t)0xc0d, (q15_t)0x7edd, (q15_t)0xc01, (q15_t)0x7ee0, (q15_t)0xbf5,
-    (q15_t)0x7ee2, (q15_t)0xbe8, (q15_t)0x7ee4, (q15_t)0xbdc, (q15_t)0x7ee7, (q15_t)0xbd0, (q15_t)0x7ee9, (q15_t)0xbc3,
-    (q15_t)0x7eeb, (q15_t)0xbb7, (q15_t)0x7eed, (q15_t)0xbab, (q15_t)0x7ef0, (q15_t)0xb9e, (q15_t)0x7ef2, (q15_t)0xb92,
-    (q15_t)0x7ef4, (q15_t)0xb85, (q15_t)0x7ef7, (q15_t)0xb79, (q15_t)0x7ef9, (q15_t)0xb6d, (q15_t)0x7efb, (q15_t)0xb60,
-    (q15_t)0x7efd, (q15_t)0xb54, (q15_t)0x7f00, (q15_t)0xb48, (q15_t)0x7f02, (q15_t)0xb3b, (q15_t)0x7f04, (q15_t)0xb2f,
-    (q15_t)0x7f06, (q15_t)0xb23, (q15_t)0x7f08, (q15_t)0xb16, (q15_t)0x7f0a, (q15_t)0xb0a, (q15_t)0x7f0d, (q15_t)0xafd,
-    (q15_t)0x7f0f, (q15_t)0xaf1, (q15_t)0x7f11, (q15_t)0xae5, (q15_t)0x7f13, (q15_t)0xad8, (q15_t)0x7f15, (q15_t)0xacc,
-    (q15_t)0x7f17, (q15_t)0xac0, (q15_t)0x7f19, (q15_t)0xab3, (q15_t)0x7f1c, (q15_t)0xaa7, (q15_t)0x7f1e, (q15_t)0xa9a,
-    (q15_t)0x7f20, (q15_t)0xa8e, (q15_t)0x7f22, (q15_t)0xa82, (q15_t)0x7f24, (q15_t)0xa75, (q15_t)0x7f26, (q15_t)0xa69,
-    (q15_t)0x7f28, (q15_t)0xa5c, (q15_t)0x7f2a, (q15_t)0xa50, (q15_t)0x7f2c, (q15_t)0xa44, (q15_t)0x7f2e, (q15_t)0xa37,
-    (q15_t)0x7f30, (q15_t)0xa2b, (q15_t)0x7f32, (q15_t)0xa1e, (q15_t)0x7f34, (q15_t)0xa12, (q15_t)0x7f36, (q15_t)0xa06,
-    (q15_t)0x7f38, (q15_t)0x9f9, (q15_t)0x7f3a, (q15_t)0x9ed, (q15_t)0x7f3c, (q15_t)0x9e0, (q15_t)0x7f3e, (q15_t)0x9d4,
-    (q15_t)0x7f40, (q15_t)0x9c7, (q15_t)0x7f42, (q15_t)0x9bb, (q15_t)0x7f43, (q15_t)0x9af, (q15_t)0x7f45, (q15_t)0x9a2,
-    (q15_t)0x7f47, (q15_t)0x996, (q15_t)0x7f49, (q15_t)0x989, (q15_t)0x7f4b, (q15_t)0x97d, (q15_t)0x7f4d, (q15_t)0x970,
-    (q15_t)0x7f4f, (q15_t)0x964, (q15_t)0x7f51, (q15_t)0x958, (q15_t)0x7f52, (q15_t)0x94b, (q15_t)0x7f54, (q15_t)0x93f,
-    (q15_t)0x7f56, (q15_t)0x932, (q15_t)0x7f58, (q15_t)0x926, (q15_t)0x7f5a, (q15_t)0x919, (q15_t)0x7f5b, (q15_t)0x90d,
-    (q15_t)0x7f5d, (q15_t)0x901, (q15_t)0x7f5f, (q15_t)0x8f4, (q15_t)0x7f61, (q15_t)0x8e8, (q15_t)0x7f62, (q15_t)0x8db,
-    (q15_t)0x7f64, (q15_t)0x8cf, (q15_t)0x7f66, (q15_t)0x8c2, (q15_t)0x7f68, (q15_t)0x8b6, (q15_t)0x7f69, (q15_t)0x8a9,
-    (q15_t)0x7f6b, (q15_t)0x89d, (q15_t)0x7f6d, (q15_t)0x891, (q15_t)0x7f6e, (q15_t)0x884, (q15_t)0x7f70, (q15_t)0x878,
-    (q15_t)0x7f72, (q15_t)0x86b, (q15_t)0x7f73, (q15_t)0x85f, (q15_t)0x7f75, (q15_t)0x852, (q15_t)0x7f77, (q15_t)0x846,
-    (q15_t)0x7f78, (q15_t)0x839, (q15_t)0x7f7a, (q15_t)0x82d, (q15_t)0x7f7b, (q15_t)0x820, (q15_t)0x7f7d, (q15_t)0x814,
-    (q15_t)0x7f7f, (q15_t)0x807, (q15_t)0x7f80, (q15_t)0x7fb, (q15_t)0x7f82, (q15_t)0x7ef, (q15_t)0x7f83, (q15_t)0x7e2,
-    (q15_t)0x7f85, (q15_t)0x7d6, (q15_t)0x7f86, (q15_t)0x7c9, (q15_t)0x7f88, (q15_t)0x7bd, (q15_t)0x7f89, (q15_t)0x7b0,
-    (q15_t)0x7f8b, (q15_t)0x7a4, (q15_t)0x7f8c, (q15_t)0x797, (q15_t)0x7f8e, (q15_t)0x78b, (q15_t)0x7f8f, (q15_t)0x77e,
-    (q15_t)0x7f91, (q15_t)0x772, (q15_t)0x7f92, (q15_t)0x765, (q15_t)0x7f94, (q15_t)0x759, (q15_t)0x7f95, (q15_t)0x74c,
-    (q15_t)0x7f97, (q15_t)0x740, (q15_t)0x7f98, (q15_t)0x733, (q15_t)0x7f99, (q15_t)0x727, (q15_t)0x7f9b, (q15_t)0x71a,
-    (q15_t)0x7f9c, (q15_t)0x70e, (q15_t)0x7f9e, (q15_t)0x701, (q15_t)0x7f9f, (q15_t)0x6f5, (q15_t)0x7fa0, (q15_t)0x6e8,
-    (q15_t)0x7fa2, (q15_t)0x6dc, (q15_t)0x7fa3, (q15_t)0x6cf, (q15_t)0x7fa4, (q15_t)0x6c3, (q15_t)0x7fa6, (q15_t)0x6b6,
-    (q15_t)0x7fa7, (q15_t)0x6aa, (q15_t)0x7fa8, (q15_t)0x69d, (q15_t)0x7faa, (q15_t)0x691, (q15_t)0x7fab, (q15_t)0x684,
-    (q15_t)0x7fac, (q15_t)0x678, (q15_t)0x7fad, (q15_t)0x66b, (q15_t)0x7faf, (q15_t)0x65f, (q15_t)0x7fb0, (q15_t)0x652,
-    (q15_t)0x7fb1, (q15_t)0x646, (q15_t)0x7fb2, (q15_t)0x639, (q15_t)0x7fb4, (q15_t)0x62d, (q15_t)0x7fb5, (q15_t)0x620,
-    (q15_t)0x7fb6, (q15_t)0x614, (q15_t)0x7fb7, (q15_t)0x607, (q15_t)0x7fb8, (q15_t)0x5fb, (q15_t)0x7fb9, (q15_t)0x5ee,
-    (q15_t)0x7fbb, (q15_t)0x5e2, (q15_t)0x7fbc, (q15_t)0x5d5, (q15_t)0x7fbd, (q15_t)0x5c9, (q15_t)0x7fbe, (q15_t)0x5bc,
-    (q15_t)0x7fbf, (q15_t)0x5b0, (q15_t)0x7fc0, (q15_t)0x5a3, (q15_t)0x7fc1, (q15_t)0x597, (q15_t)0x7fc3, (q15_t)0x58a,
-    (q15_t)0x7fc4, (q15_t)0x57e, (q15_t)0x7fc5, (q15_t)0x571, (q15_t)0x7fc6, (q15_t)0x565, (q15_t)0x7fc7, (q15_t)0x558,
-    (q15_t)0x7fc8, (q15_t)0x54c, (q15_t)0x7fc9, (q15_t)0x53f, (q15_t)0x7fca, (q15_t)0x533, (q15_t)0x7fcb, (q15_t)0x526,
-    (q15_t)0x7fcc, (q15_t)0x51a, (q15_t)0x7fcd, (q15_t)0x50d, (q15_t)0x7fce, (q15_t)0x500, (q15_t)0x7fcf, (q15_t)0x4f4,
-    (q15_t)0x7fd0, (q15_t)0x4e7, (q15_t)0x7fd1, (q15_t)0x4db, (q15_t)0x7fd2, (q15_t)0x4ce, (q15_t)0x7fd3, (q15_t)0x4c2,
-    (q15_t)0x7fd4, (q15_t)0x4b5, (q15_t)0x7fd5, (q15_t)0x4a9, (q15_t)0x7fd5, (q15_t)0x49c, (q15_t)0x7fd6, (q15_t)0x490,
-    (q15_t)0x7fd7, (q15_t)0x483, (q15_t)0x7fd8, (q15_t)0x477, (q15_t)0x7fd9, (q15_t)0x46a, (q15_t)0x7fda, (q15_t)0x45e,
-    (q15_t)0x7fdb, (q15_t)0x451, (q15_t)0x7fdc, (q15_t)0x444, (q15_t)0x7fdc, (q15_t)0x438, (q15_t)0x7fdd, (q15_t)0x42b,
-    (q15_t)0x7fde, (q15_t)0x41f, (q15_t)0x7fdf, (q15_t)0x412, (q15_t)0x7fe0, (q15_t)0x406, (q15_t)0x7fe0, (q15_t)0x3f9,
-    (q15_t)0x7fe1, (q15_t)0x3ed, (q15_t)0x7fe2, (q15_t)0x3e0, (q15_t)0x7fe3, (q15_t)0x3d4, (q15_t)0x7fe3, (q15_t)0x3c7,
-    (q15_t)0x7fe4, (q15_t)0x3bb, (q15_t)0x7fe5, (q15_t)0x3ae, (q15_t)0x7fe6, (q15_t)0x3a1, (q15_t)0x7fe6, (q15_t)0x395,
-    (q15_t)0x7fe7, (q15_t)0x388, (q15_t)0x7fe8, (q15_t)0x37c, (q15_t)0x7fe8, (q15_t)0x36f, (q15_t)0x7fe9, (q15_t)0x363,
-    (q15_t)0x7fea, (q15_t)0x356, (q15_t)0x7fea, (q15_t)0x34a, (q15_t)0x7feb, (q15_t)0x33d, (q15_t)0x7fec, (q15_t)0x330,
-    (q15_t)0x7fec, (q15_t)0x324, (q15_t)0x7fed, (q15_t)0x317, (q15_t)0x7fed, (q15_t)0x30b, (q15_t)0x7fee, (q15_t)0x2fe,
-    (q15_t)0x7fef, (q15_t)0x2f2, (q15_t)0x7fef, (q15_t)0x2e5, (q15_t)0x7ff0, (q15_t)0x2d9, (q15_t)0x7ff0, (q15_t)0x2cc,
-    (q15_t)0x7ff1, (q15_t)0x2c0, (q15_t)0x7ff1, (q15_t)0x2b3, (q15_t)0x7ff2, (q15_t)0x2a6, (q15_t)0x7ff2, (q15_t)0x29a,
-    (q15_t)0x7ff3, (q15_t)0x28d, (q15_t)0x7ff3, (q15_t)0x281, (q15_t)0x7ff4, (q15_t)0x274, (q15_t)0x7ff4, (q15_t)0x268,
-    (q15_t)0x7ff5, (q15_t)0x25b, (q15_t)0x7ff5, (q15_t)0x24e, (q15_t)0x7ff6, (q15_t)0x242, (q15_t)0x7ff6, (q15_t)0x235,
-    (q15_t)0x7ff7, (q15_t)0x229, (q15_t)0x7ff7, (q15_t)0x21c, (q15_t)0x7ff7, (q15_t)0x210, (q15_t)0x7ff8, (q15_t)0x203,
-    (q15_t)0x7ff8, (q15_t)0x1f7, (q15_t)0x7ff9, (q15_t)0x1ea, (q15_t)0x7ff9, (q15_t)0x1dd, (q15_t)0x7ff9, (q15_t)0x1d1,
-    (q15_t)0x7ffa, (q15_t)0x1c4, (q15_t)0x7ffa, (q15_t)0x1b8, (q15_t)0x7ffa, (q15_t)0x1ab, (q15_t)0x7ffb, (q15_t)0x19f,
-    (q15_t)0x7ffb, (q15_t)0x192, (q15_t)0x7ffb, (q15_t)0x186, (q15_t)0x7ffc, (q15_t)0x179, (q15_t)0x7ffc, (q15_t)0x16c,
-    (q15_t)0x7ffc, (q15_t)0x160, (q15_t)0x7ffc, (q15_t)0x153, (q15_t)0x7ffd, (q15_t)0x147, (q15_t)0x7ffd, (q15_t)0x13a,
-    (q15_t)0x7ffd, (q15_t)0x12e, (q15_t)0x7ffd, (q15_t)0x121, (q15_t)0x7ffe, (q15_t)0x114, (q15_t)0x7ffe, (q15_t)0x108,
-    (q15_t)0x7ffe, (q15_t)0xfb, (q15_t)0x7ffe, (q15_t)0xef, (q15_t)0x7ffe, (q15_t)0xe2, (q15_t)0x7fff, (q15_t)0xd6,
-    (q15_t)0x7fff, (q15_t)0xc9, (q15_t)0x7fff, (q15_t)0xbc, (q15_t)0x7fff, (q15_t)0xb0, (q15_t)0x7fff, (q15_t)0xa3,
-    (q15_t)0x7fff, (q15_t)0x97, (q15_t)0x7fff, (q15_t)0x8a, (q15_t)0x7fff, (q15_t)0x7e, (q15_t)0x7fff, (q15_t)0x71,
-    (q15_t)0x7fff, (q15_t)0x65, (q15_t)0x7fff, (q15_t)0x58, (q15_t)0x7fff, (q15_t)0x4b, (q15_t)0x7fff, (q15_t)0x3f,
-    (q15_t)0x7fff, (q15_t)0x32, (q15_t)0x7fff, (q15_t)0x26, (q15_t)0x7fff, (q15_t)0x19, (q15_t)0x7fff, (q15_t)0xd,
-    (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfff3, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffda,
-    (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc1, (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffa8,
-    (q15_t)0x7fff, (q15_t)0xff9b, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff82, (q15_t)0x7fff, (q15_t)0xff76,
-    (q15_t)0x7fff, (q15_t)0xff69, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff50, (q15_t)0x7fff, (q15_t)0xff44,
-    (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff2a, (q15_t)0x7ffe, (q15_t)0xff1e, (q15_t)0x7ffe, (q15_t)0xff11,
-    (q15_t)0x7ffe, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfef8, (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffd, (q15_t)0xfedf,
-    (q15_t)0x7ffd, (q15_t)0xfed2, (q15_t)0x7ffd, (q15_t)0xfec6, (q15_t)0x7ffd, (q15_t)0xfeb9, (q15_t)0x7ffc, (q15_t)0xfead,
-    (q15_t)0x7ffc, (q15_t)0xfea0, (q15_t)0x7ffc, (q15_t)0xfe94, (q15_t)0x7ffc, (q15_t)0xfe87, (q15_t)0x7ffb, (q15_t)0xfe7a,
-    (q15_t)0x7ffb, (q15_t)0xfe6e, (q15_t)0x7ffb, (q15_t)0xfe61, (q15_t)0x7ffa, (q15_t)0xfe55, (q15_t)0x7ffa, (q15_t)0xfe48,
-    (q15_t)0x7ffa, (q15_t)0xfe3c, (q15_t)0x7ff9, (q15_t)0xfe2f, (q15_t)0x7ff9, (q15_t)0xfe23, (q15_t)0x7ff9, (q15_t)0xfe16,
-    (q15_t)0x7ff8, (q15_t)0xfe09, (q15_t)0x7ff8, (q15_t)0xfdfd, (q15_t)0x7ff7, (q15_t)0xfdf0, (q15_t)0x7ff7, (q15_t)0xfde4,
-    (q15_t)0x7ff7, (q15_t)0xfdd7, (q15_t)0x7ff6, (q15_t)0xfdcb, (q15_t)0x7ff6, (q15_t)0xfdbe, (q15_t)0x7ff5, (q15_t)0xfdb2,
-    (q15_t)0x7ff5, (q15_t)0xfda5, (q15_t)0x7ff4, (q15_t)0xfd98, (q15_t)0x7ff4, (q15_t)0xfd8c, (q15_t)0x7ff3, (q15_t)0xfd7f,
-    (q15_t)0x7ff3, (q15_t)0xfd73, (q15_t)0x7ff2, (q15_t)0xfd66, (q15_t)0x7ff2, (q15_t)0xfd5a, (q15_t)0x7ff1, (q15_t)0xfd4d,
-    (q15_t)0x7ff1, (q15_t)0xfd40, (q15_t)0x7ff0, (q15_t)0xfd34, (q15_t)0x7ff0, (q15_t)0xfd27, (q15_t)0x7fef, (q15_t)0xfd1b,
-    (q15_t)0x7fef, (q15_t)0xfd0e, (q15_t)0x7fee, (q15_t)0xfd02, (q15_t)0x7fed, (q15_t)0xfcf5, (q15_t)0x7fed, (q15_t)0xfce9,
-    (q15_t)0x7fec, (q15_t)0xfcdc, (q15_t)0x7fec, (q15_t)0xfcd0, (q15_t)0x7feb, (q15_t)0xfcc3, (q15_t)0x7fea, (q15_t)0xfcb6,
-    (q15_t)0x7fea, (q15_t)0xfcaa, (q15_t)0x7fe9, (q15_t)0xfc9d, (q15_t)0x7fe8, (q15_t)0xfc91, (q15_t)0x7fe8, (q15_t)0xfc84,
-    (q15_t)0x7fe7, (q15_t)0xfc78, (q15_t)0x7fe6, (q15_t)0xfc6b, (q15_t)0x7fe6, (q15_t)0xfc5f, (q15_t)0x7fe5, (q15_t)0xfc52,
-    (q15_t)0x7fe4, (q15_t)0xfc45, (q15_t)0x7fe3, (q15_t)0xfc39, (q15_t)0x7fe3, (q15_t)0xfc2c, (q15_t)0x7fe2, (q15_t)0xfc20,
-    (q15_t)0x7fe1, (q15_t)0xfc13, (q15_t)0x7fe0, (q15_t)0xfc07, (q15_t)0x7fe0, (q15_t)0xfbfa, (q15_t)0x7fdf, (q15_t)0xfbee,
-    (q15_t)0x7fde, (q15_t)0xfbe1, (q15_t)0x7fdd, (q15_t)0xfbd5, (q15_t)0x7fdc, (q15_t)0xfbc8, (q15_t)0x7fdc, (q15_t)0xfbbc,
-    (q15_t)0x7fdb, (q15_t)0xfbaf, (q15_t)0x7fda, (q15_t)0xfba2, (q15_t)0x7fd9, (q15_t)0xfb96, (q15_t)0x7fd8, (q15_t)0xfb89,
-    (q15_t)0x7fd7, (q15_t)0xfb7d, (q15_t)0x7fd6, (q15_t)0xfb70, (q15_t)0x7fd5, (q15_t)0xfb64, (q15_t)0x7fd5, (q15_t)0xfb57,
-    (q15_t)0x7fd4, (q15_t)0xfb4b, (q15_t)0x7fd3, (q15_t)0xfb3e, (q15_t)0x7fd2, (q15_t)0xfb32, (q15_t)0x7fd1, (q15_t)0xfb25,
-    (q15_t)0x7fd0, (q15_t)0xfb19, (q15_t)0x7fcf, (q15_t)0xfb0c, (q15_t)0x7fce, (q15_t)0xfb00, (q15_t)0x7fcd, (q15_t)0xfaf3,
-    (q15_t)0x7fcc, (q15_t)0xfae6, (q15_t)0x7fcb, (q15_t)0xfada, (q15_t)0x7fca, (q15_t)0xfacd, (q15_t)0x7fc9, (q15_t)0xfac1,
-    (q15_t)0x7fc8, (q15_t)0xfab4, (q15_t)0x7fc7, (q15_t)0xfaa8, (q15_t)0x7fc6, (q15_t)0xfa9b, (q15_t)0x7fc5, (q15_t)0xfa8f,
-    (q15_t)0x7fc4, (q15_t)0xfa82, (q15_t)0x7fc3, (q15_t)0xfa76, (q15_t)0x7fc1, (q15_t)0xfa69, (q15_t)0x7fc0, (q15_t)0xfa5d,
-    (q15_t)0x7fbf, (q15_t)0xfa50, (q15_t)0x7fbe, (q15_t)0xfa44, (q15_t)0x7fbd, (q15_t)0xfa37, (q15_t)0x7fbc, (q15_t)0xfa2b,
-    (q15_t)0x7fbb, (q15_t)0xfa1e, (q15_t)0x7fb9, (q15_t)0xfa12, (q15_t)0x7fb8, (q15_t)0xfa05, (q15_t)0x7fb7, (q15_t)0xf9f9,
-    (q15_t)0x7fb6, (q15_t)0xf9ec, (q15_t)0x7fb5, (q15_t)0xf9e0, (q15_t)0x7fb4, (q15_t)0xf9d3, (q15_t)0x7fb2, (q15_t)0xf9c7,
-    (q15_t)0x7fb1, (q15_t)0xf9ba, (q15_t)0x7fb0, (q15_t)0xf9ae, (q15_t)0x7faf, (q15_t)0xf9a1, (q15_t)0x7fad, (q15_t)0xf995,
-    (q15_t)0x7fac, (q15_t)0xf988, (q15_t)0x7fab, (q15_t)0xf97c, (q15_t)0x7faa, (q15_t)0xf96f, (q15_t)0x7fa8, (q15_t)0xf963,
-    (q15_t)0x7fa7, (q15_t)0xf956, (q15_t)0x7fa6, (q15_t)0xf94a, (q15_t)0x7fa4, (q15_t)0xf93d, (q15_t)0x7fa3, (q15_t)0xf931,
-    (q15_t)0x7fa2, (q15_t)0xf924, (q15_t)0x7fa0, (q15_t)0xf918, (q15_t)0x7f9f, (q15_t)0xf90b, (q15_t)0x7f9e, (q15_t)0xf8ff,
-    (q15_t)0x7f9c, (q15_t)0xf8f2, (q15_t)0x7f9b, (q15_t)0xf8e6, (q15_t)0x7f99, (q15_t)0xf8d9, (q15_t)0x7f98, (q15_t)0xf8cd,
-    (q15_t)0x7f97, (q15_t)0xf8c0, (q15_t)0x7f95, (q15_t)0xf8b4, (q15_t)0x7f94, (q15_t)0xf8a7, (q15_t)0x7f92, (q15_t)0xf89b,
-    (q15_t)0x7f91, (q15_t)0xf88e, (q15_t)0x7f8f, (q15_t)0xf882, (q15_t)0x7f8e, (q15_t)0xf875, (q15_t)0x7f8c, (q15_t)0xf869,
-    (q15_t)0x7f8b, (q15_t)0xf85c, (q15_t)0x7f89, (q15_t)0xf850, (q15_t)0x7f88, (q15_t)0xf843, (q15_t)0x7f86, (q15_t)0xf837,
-    (q15_t)0x7f85, (q15_t)0xf82a, (q15_t)0x7f83, (q15_t)0xf81e, (q15_t)0x7f82, (q15_t)0xf811, (q15_t)0x7f80, (q15_t)0xf805,
-    (q15_t)0x7f7f, (q15_t)0xf7f9, (q15_t)0x7f7d, (q15_t)0xf7ec, (q15_t)0x7f7b, (q15_t)0xf7e0, (q15_t)0x7f7a, (q15_t)0xf7d3,
-    (q15_t)0x7f78, (q15_t)0xf7c7, (q15_t)0x7f77, (q15_t)0xf7ba, (q15_t)0x7f75, (q15_t)0xf7ae, (q15_t)0x7f73, (q15_t)0xf7a1,
-    (q15_t)0x7f72, (q15_t)0xf795, (q15_t)0x7f70, (q15_t)0xf788, (q15_t)0x7f6e, (q15_t)0xf77c, (q15_t)0x7f6d, (q15_t)0xf76f,
-    (q15_t)0x7f6b, (q15_t)0xf763, (q15_t)0x7f69, (q15_t)0xf757, (q15_t)0x7f68, (q15_t)0xf74a, (q15_t)0x7f66, (q15_t)0xf73e,
-    (q15_t)0x7f64, (q15_t)0xf731, (q15_t)0x7f62, (q15_t)0xf725, (q15_t)0x7f61, (q15_t)0xf718, (q15_t)0x7f5f, (q15_t)0xf70c,
-    (q15_t)0x7f5d, (q15_t)0xf6ff, (q15_t)0x7f5b, (q15_t)0xf6f3, (q15_t)0x7f5a, (q15_t)0xf6e7, (q15_t)0x7f58, (q15_t)0xf6da,
-    (q15_t)0x7f56, (q15_t)0xf6ce, (q15_t)0x7f54, (q15_t)0xf6c1, (q15_t)0x7f52, (q15_t)0xf6b5, (q15_t)0x7f51, (q15_t)0xf6a8,
-    (q15_t)0x7f4f, (q15_t)0xf69c, (q15_t)0x7f4d, (q15_t)0xf690, (q15_t)0x7f4b, (q15_t)0xf683, (q15_t)0x7f49, (q15_t)0xf677,
-    (q15_t)0x7f47, (q15_t)0xf66a, (q15_t)0x7f45, (q15_t)0xf65e, (q15_t)0x7f43, (q15_t)0xf651, (q15_t)0x7f42, (q15_t)0xf645,
-    (q15_t)0x7f40, (q15_t)0xf639, (q15_t)0x7f3e, (q15_t)0xf62c, (q15_t)0x7f3c, (q15_t)0xf620, (q15_t)0x7f3a, (q15_t)0xf613,
-    (q15_t)0x7f38, (q15_t)0xf607, (q15_t)0x7f36, (q15_t)0xf5fa, (q15_t)0x7f34, (q15_t)0xf5ee, (q15_t)0x7f32, (q15_t)0xf5e2,
-    (q15_t)0x7f30, (q15_t)0xf5d5, (q15_t)0x7f2e, (q15_t)0xf5c9, (q15_t)0x7f2c, (q15_t)0xf5bc, (q15_t)0x7f2a, (q15_t)0xf5b0,
-    (q15_t)0x7f28, (q15_t)0xf5a4, (q15_t)0x7f26, (q15_t)0xf597, (q15_t)0x7f24, (q15_t)0xf58b, (q15_t)0x7f22, (q15_t)0xf57e,
-    (q15_t)0x7f20, (q15_t)0xf572, (q15_t)0x7f1e, (q15_t)0xf566, (q15_t)0x7f1c, (q15_t)0xf559, (q15_t)0x7f19, (q15_t)0xf54d,
-    (q15_t)0x7f17, (q15_t)0xf540, (q15_t)0x7f15, (q15_t)0xf534, (q15_t)0x7f13, (q15_t)0xf528, (q15_t)0x7f11, (q15_t)0xf51b,
-    (q15_t)0x7f0f, (q15_t)0xf50f, (q15_t)0x7f0d, (q15_t)0xf503, (q15_t)0x7f0a, (q15_t)0xf4f6, (q15_t)0x7f08, (q15_t)0xf4ea,
-    (q15_t)0x7f06, (q15_t)0xf4dd, (q15_t)0x7f04, (q15_t)0xf4d1, (q15_t)0x7f02, (q15_t)0xf4c5, (q15_t)0x7f00, (q15_t)0xf4b8,
-    (q15_t)0x7efd, (q15_t)0xf4ac, (q15_t)0x7efb, (q15_t)0xf4a0, (q15_t)0x7ef9, (q15_t)0xf493, (q15_t)0x7ef7, (q15_t)0xf487,
-    (q15_t)0x7ef4, (q15_t)0xf47b, (q15_t)0x7ef2, (q15_t)0xf46e, (q15_t)0x7ef0, (q15_t)0xf462, (q15_t)0x7eed, (q15_t)0xf455,
-    (q15_t)0x7eeb, (q15_t)0xf449, (q15_t)0x7ee9, (q15_t)0xf43d, (q15_t)0x7ee7, (q15_t)0xf430, (q15_t)0x7ee4, (q15_t)0xf424,
-    (q15_t)0x7ee2, (q15_t)0xf418, (q15_t)0x7ee0, (q15_t)0xf40b, (q15_t)0x7edd, (q15_t)0xf3ff, (q15_t)0x7edb, (q15_t)0xf3f3,
-    (q15_t)0x7ed8, (q15_t)0xf3e6, (q15_t)0x7ed6, (q15_t)0xf3da, (q15_t)0x7ed4, (q15_t)0xf3ce, (q15_t)0x7ed1, (q15_t)0xf3c1,
-    (q15_t)0x7ecf, (q15_t)0xf3b5, (q15_t)0x7ecc, (q15_t)0xf3a9, (q15_t)0x7eca, (q15_t)0xf39c, (q15_t)0x7ec8, (q15_t)0xf390,
-    (q15_t)0x7ec5, (q15_t)0xf384, (q15_t)0x7ec3, (q15_t)0xf377, (q15_t)0x7ec0, (q15_t)0xf36b, (q15_t)0x7ebe, (q15_t)0xf35f,
-    (q15_t)0x7ebb, (q15_t)0xf352, (q15_t)0x7eb9, (q15_t)0xf346, (q15_t)0x7eb6, (q15_t)0xf33a, (q15_t)0x7eb4, (q15_t)0xf32d,
-    (q15_t)0x7eb1, (q15_t)0xf321, (q15_t)0x7eaf, (q15_t)0xf315, (q15_t)0x7eac, (q15_t)0xf308, (q15_t)0x7eaa, (q15_t)0xf2fc,
-    (q15_t)0x7ea7, (q15_t)0xf2f0, (q15_t)0x7ea5, (q15_t)0xf2e4, (q15_t)0x7ea2, (q15_t)0xf2d7, (q15_t)0x7e9f, (q15_t)0xf2cb,
-    (q15_t)0x7e9d, (q15_t)0xf2bf, (q15_t)0x7e9a, (q15_t)0xf2b2, (q15_t)0x7e98, (q15_t)0xf2a6, (q15_t)0x7e95, (q15_t)0xf29a,
-    (q15_t)0x7e92, (q15_t)0xf28e, (q15_t)0x7e90, (q15_t)0xf281, (q15_t)0x7e8d, (q15_t)0xf275, (q15_t)0x7e8a, (q15_t)0xf269,
-    (q15_t)0x7e88, (q15_t)0xf25c, (q15_t)0x7e85, (q15_t)0xf250, (q15_t)0x7e82, (q15_t)0xf244, (q15_t)0x7e80, (q15_t)0xf238,
-    (q15_t)0x7e7d, (q15_t)0xf22b, (q15_t)0x7e7a, (q15_t)0xf21f, (q15_t)0x7e77, (q15_t)0xf213, (q15_t)0x7e75, (q15_t)0xf207,
-    (q15_t)0x7e72, (q15_t)0xf1fa, (q15_t)0x7e6f, (q15_t)0xf1ee, (q15_t)0x7e6c, (q15_t)0xf1e2, (q15_t)0x7e6a, (q15_t)0xf1d5,
-    (q15_t)0x7e67, (q15_t)0xf1c9, (q15_t)0x7e64, (q15_t)0xf1bd, (q15_t)0x7e61, (q15_t)0xf1b1, (q15_t)0x7e5e, (q15_t)0xf1a4,
-    (q15_t)0x7e5c, (q15_t)0xf198, (q15_t)0x7e59, (q15_t)0xf18c, (q15_t)0x7e56, (q15_t)0xf180, (q15_t)0x7e53, (q15_t)0xf174,
-    (q15_t)0x7e50, (q15_t)0xf167, (q15_t)0x7e4d, (q15_t)0xf15b, (q15_t)0x7e4a, (q15_t)0xf14f, (q15_t)0x7e48, (q15_t)0xf143,
-    (q15_t)0x7e45, (q15_t)0xf136, (q15_t)0x7e42, (q15_t)0xf12a, (q15_t)0x7e3f, (q15_t)0xf11e, (q15_t)0x7e3c, (q15_t)0xf112,
-    (q15_t)0x7e39, (q15_t)0xf105, (q15_t)0x7e36, (q15_t)0xf0f9, (q15_t)0x7e33, (q15_t)0xf0ed, (q15_t)0x7e30, (q15_t)0xf0e1,
-    (q15_t)0x7e2d, (q15_t)0xf0d5, (q15_t)0x7e2a, (q15_t)0xf0c8, (q15_t)0x7e27, (q15_t)0xf0bc, (q15_t)0x7e24, (q15_t)0xf0b0,
-    (q15_t)0x7e21, (q15_t)0xf0a4, (q15_t)0x7e1e, (q15_t)0xf098, (q15_t)0x7e1b, (q15_t)0xf08b, (q15_t)0x7e18, (q15_t)0xf07f,
-    (q15_t)0x7e15, (q15_t)0xf073, (q15_t)0x7e12, (q15_t)0xf067, (q15_t)0x7e0f, (q15_t)0xf05b, (q15_t)0x7e0c, (q15_t)0xf04e,
-    (q15_t)0x7e09, (q15_t)0xf042, (q15_t)0x7e06, (q15_t)0xf036, (q15_t)0x7e03, (q15_t)0xf02a, (q15_t)0x7dff, (q15_t)0xf01e,
-    (q15_t)0x7dfc, (q15_t)0xf012, (q15_t)0x7df9, (q15_t)0xf005, (q15_t)0x7df6, (q15_t)0xeff9, (q15_t)0x7df3, (q15_t)0xefed,
-    (q15_t)0x7df0, (q15_t)0xefe1, (q15_t)0x7ded, (q15_t)0xefd5, (q15_t)0x7de9, (q15_t)0xefc9, (q15_t)0x7de6, (q15_t)0xefbc,
-    (q15_t)0x7de3, (q15_t)0xefb0, (q15_t)0x7de0, (q15_t)0xefa4, (q15_t)0x7ddd, (q15_t)0xef98, (q15_t)0x7dd9, (q15_t)0xef8c,
-    (q15_t)0x7dd6, (q15_t)0xef80, (q15_t)0x7dd3, (q15_t)0xef74, (q15_t)0x7dd0, (q15_t)0xef67, (q15_t)0x7dcc, (q15_t)0xef5b,
-    (q15_t)0x7dc9, (q15_t)0xef4f, (q15_t)0x7dc6, (q15_t)0xef43, (q15_t)0x7dc2, (q15_t)0xef37, (q15_t)0x7dbf, (q15_t)0xef2b,
-    (q15_t)0x7dbc, (q15_t)0xef1f, (q15_t)0x7db9, (q15_t)0xef13, (q15_t)0x7db5, (q15_t)0xef06, (q15_t)0x7db2, (q15_t)0xeefa,
-    (q15_t)0x7daf, (q15_t)0xeeee, (q15_t)0x7dab, (q15_t)0xeee2, (q15_t)0x7da8, (q15_t)0xeed6, (q15_t)0x7da4, (q15_t)0xeeca,
-    (q15_t)0x7da1, (q15_t)0xeebe, (q15_t)0x7d9e, (q15_t)0xeeb2, (q15_t)0x7d9a, (q15_t)0xeea6, (q15_t)0x7d97, (q15_t)0xee99,
-    (q15_t)0x7d93, (q15_t)0xee8d, (q15_t)0x7d90, (q15_t)0xee81, (q15_t)0x7d8d, (q15_t)0xee75, (q15_t)0x7d89, (q15_t)0xee69,
-    (q15_t)0x7d86, (q15_t)0xee5d, (q15_t)0x7d82, (q15_t)0xee51, (q15_t)0x7d7f, (q15_t)0xee45, (q15_t)0x7d7b, (q15_t)0xee39,
-    (q15_t)0x7d78, (q15_t)0xee2d, (q15_t)0x7d74, (q15_t)0xee21, (q15_t)0x7d71, (q15_t)0xee15, (q15_t)0x7d6d, (q15_t)0xee09,
-    (q15_t)0x7d6a, (q15_t)0xedfc, (q15_t)0x7d66, (q15_t)0xedf0, (q15_t)0x7d63, (q15_t)0xede4, (q15_t)0x7d5f, (q15_t)0xedd8,
-    (q15_t)0x7d5b, (q15_t)0xedcc, (q15_t)0x7d58, (q15_t)0xedc0, (q15_t)0x7d54, (q15_t)0xedb4, (q15_t)0x7d51, (q15_t)0xeda8,
-    (q15_t)0x7d4d, (q15_t)0xed9c, (q15_t)0x7d49, (q15_t)0xed90, (q15_t)0x7d46, (q15_t)0xed84, (q15_t)0x7d42, (q15_t)0xed78,
-    (q15_t)0x7d3f, (q15_t)0xed6c, (q15_t)0x7d3b, (q15_t)0xed60, (q15_t)0x7d37, (q15_t)0xed54, (q15_t)0x7d34, (q15_t)0xed48,
-    (q15_t)0x7d30, (q15_t)0xed3c, (q15_t)0x7d2c, (q15_t)0xed30, (q15_t)0x7d28, (q15_t)0xed24, (q15_t)0x7d25, (q15_t)0xed18,
-    (q15_t)0x7d21, (q15_t)0xed0c, (q15_t)0x7d1d, (q15_t)0xed00, (q15_t)0x7d1a, (q15_t)0xecf4, (q15_t)0x7d16, (q15_t)0xece8,
-    (q15_t)0x7d12, (q15_t)0xecdc, (q15_t)0x7d0e, (q15_t)0xecd0, (q15_t)0x7d0b, (q15_t)0xecc4, (q15_t)0x7d07, (q15_t)0xecb8,
-    (q15_t)0x7d03, (q15_t)0xecac, (q15_t)0x7cff, (q15_t)0xeca0, (q15_t)0x7cfb, (q15_t)0xec94, (q15_t)0x7cf8, (q15_t)0xec88,
-    (q15_t)0x7cf4, (q15_t)0xec7c, (q15_t)0x7cf0, (q15_t)0xec70, (q15_t)0x7cec, (q15_t)0xec64, (q15_t)0x7ce8, (q15_t)0xec58,
-    (q15_t)0x7ce4, (q15_t)0xec4c, (q15_t)0x7ce0, (q15_t)0xec40, (q15_t)0x7cdd, (q15_t)0xec34, (q15_t)0x7cd9, (q15_t)0xec28,
-    (q15_t)0x7cd5, (q15_t)0xec1c, (q15_t)0x7cd1, (q15_t)0xec10, (q15_t)0x7ccd, (q15_t)0xec05, (q15_t)0x7cc9, (q15_t)0xebf9,
-    (q15_t)0x7cc5, (q15_t)0xebed, (q15_t)0x7cc1, (q15_t)0xebe1, (q15_t)0x7cbd, (q15_t)0xebd5, (q15_t)0x7cb9, (q15_t)0xebc9,
-    (q15_t)0x7cb5, (q15_t)0xebbd, (q15_t)0x7cb1, (q15_t)0xebb1, (q15_t)0x7cad, (q15_t)0xeba5, (q15_t)0x7ca9, (q15_t)0xeb99,
-    (q15_t)0x7ca5, (q15_t)0xeb8d, (q15_t)0x7ca1, (q15_t)0xeb81, (q15_t)0x7c9d, (q15_t)0xeb75, (q15_t)0x7c99, (q15_t)0xeb6a,
-    (q15_t)0x7c95, (q15_t)0xeb5e, (q15_t)0x7c91, (q15_t)0xeb52, (q15_t)0x7c8d, (q15_t)0xeb46, (q15_t)0x7c89, (q15_t)0xeb3a,
-    (q15_t)0x7c85, (q15_t)0xeb2e, (q15_t)0x7c81, (q15_t)0xeb22, (q15_t)0x7c7d, (q15_t)0xeb16, (q15_t)0x7c79, (q15_t)0xeb0a,
-    (q15_t)0x7c74, (q15_t)0xeaff, (q15_t)0x7c70, (q15_t)0xeaf3, (q15_t)0x7c6c, (q15_t)0xeae7, (q15_t)0x7c68, (q15_t)0xeadb,
-    (q15_t)0x7c64, (q15_t)0xeacf, (q15_t)0x7c60, (q15_t)0xeac3, (q15_t)0x7c5b, (q15_t)0xeab7, (q15_t)0x7c57, (q15_t)0xeaac,
-    (q15_t)0x7c53, (q15_t)0xeaa0, (q15_t)0x7c4f, (q15_t)0xea94, (q15_t)0x7c4b, (q15_t)0xea88, (q15_t)0x7c46, (q15_t)0xea7c,
-    (q15_t)0x7c42, (q15_t)0xea70, (q15_t)0x7c3e, (q15_t)0xea65, (q15_t)0x7c3a, (q15_t)0xea59, (q15_t)0x7c36, (q15_t)0xea4d,
-    (q15_t)0x7c31, (q15_t)0xea41, (q15_t)0x7c2d, (q15_t)0xea35, (q15_t)0x7c29, (q15_t)0xea29, (q15_t)0x7c24, (q15_t)0xea1e,
-    (q15_t)0x7c20, (q15_t)0xea12, (q15_t)0x7c1c, (q15_t)0xea06, (q15_t)0x7c17, (q15_t)0xe9fa, (q15_t)0x7c13, (q15_t)0xe9ee,
-    (q15_t)0x7c0f, (q15_t)0xe9e3, (q15_t)0x7c0a, (q15_t)0xe9d7, (q15_t)0x7c06, (q15_t)0xe9cb, (q15_t)0x7c02, (q15_t)0xe9bf,
-    (q15_t)0x7bfd, (q15_t)0xe9b4, (q15_t)0x7bf9, (q15_t)0xe9a8, (q15_t)0x7bf5, (q15_t)0xe99c, (q15_t)0x7bf0, (q15_t)0xe990,
-    (q15_t)0x7bec, (q15_t)0xe984, (q15_t)0x7be7, (q15_t)0xe979, (q15_t)0x7be3, (q15_t)0xe96d, (q15_t)0x7bde, (q15_t)0xe961,
-    (q15_t)0x7bda, (q15_t)0xe955, (q15_t)0x7bd6, (q15_t)0xe94a, (q15_t)0x7bd1, (q15_t)0xe93e, (q15_t)0x7bcd, (q15_t)0xe932,
-    (q15_t)0x7bc8, (q15_t)0xe926, (q15_t)0x7bc4, (q15_t)0xe91b, (q15_t)0x7bbf, (q15_t)0xe90f, (q15_t)0x7bbb, (q15_t)0xe903,
-    (q15_t)0x7bb6, (q15_t)0xe8f7, (q15_t)0x7bb2, (q15_t)0xe8ec, (q15_t)0x7bad, (q15_t)0xe8e0, (q15_t)0x7ba9, (q15_t)0xe8d4,
-    (q15_t)0x7ba4, (q15_t)0xe8c9, (q15_t)0x7b9f, (q15_t)0xe8bd, (q15_t)0x7b9b, (q15_t)0xe8b1, (q15_t)0x7b96, (q15_t)0xe8a5,
-    (q15_t)0x7b92, (q15_t)0xe89a, (q15_t)0x7b8d, (q15_t)0xe88e, (q15_t)0x7b88, (q15_t)0xe882, (q15_t)0x7b84, (q15_t)0xe877,
-    (q15_t)0x7b7f, (q15_t)0xe86b, (q15_t)0x7b7b, (q15_t)0xe85f, (q15_t)0x7b76, (q15_t)0xe854, (q15_t)0x7b71, (q15_t)0xe848,
-    (q15_t)0x7b6d, (q15_t)0xe83c, (q15_t)0x7b68, (q15_t)0xe831, (q15_t)0x7b63, (q15_t)0xe825, (q15_t)0x7b5f, (q15_t)0xe819,
-    (q15_t)0x7b5a, (q15_t)0xe80e, (q15_t)0x7b55, (q15_t)0xe802, (q15_t)0x7b50, (q15_t)0xe7f6, (q15_t)0x7b4c, (q15_t)0xe7eb,
-    (q15_t)0x7b47, (q15_t)0xe7df, (q15_t)0x7b42, (q15_t)0xe7d3, (q15_t)0x7b3e, (q15_t)0xe7c8, (q15_t)0x7b39, (q15_t)0xe7bc,
-    (q15_t)0x7b34, (q15_t)0xe7b1, (q15_t)0x7b2f, (q15_t)0xe7a5, (q15_t)0x7b2a, (q15_t)0xe799, (q15_t)0x7b26, (q15_t)0xe78e,
-    (q15_t)0x7b21, (q15_t)0xe782, (q15_t)0x7b1c, (q15_t)0xe777, (q15_t)0x7b17, (q15_t)0xe76b, (q15_t)0x7b12, (q15_t)0xe75f,
-    (q15_t)0x7b0e, (q15_t)0xe754, (q15_t)0x7b09, (q15_t)0xe748, (q15_t)0x7b04, (q15_t)0xe73d, (q15_t)0x7aff, (q15_t)0xe731,
-    (q15_t)0x7afa, (q15_t)0xe725, (q15_t)0x7af5, (q15_t)0xe71a, (q15_t)0x7af0, (q15_t)0xe70e, (q15_t)0x7aeb, (q15_t)0xe703,
-    (q15_t)0x7ae6, (q15_t)0xe6f7, (q15_t)0x7ae2, (q15_t)0xe6ec, (q15_t)0x7add, (q15_t)0xe6e0, (q15_t)0x7ad8, (q15_t)0xe6d4,
-    (q15_t)0x7ad3, (q15_t)0xe6c9, (q15_t)0x7ace, (q15_t)0xe6bd, (q15_t)0x7ac9, (q15_t)0xe6b2, (q15_t)0x7ac4, (q15_t)0xe6a6,
-    (q15_t)0x7abf, (q15_t)0xe69b, (q15_t)0x7aba, (q15_t)0xe68f, (q15_t)0x7ab5, (q15_t)0xe684, (q15_t)0x7ab0, (q15_t)0xe678,
-    (q15_t)0x7aab, (q15_t)0xe66d, (q15_t)0x7aa6, (q15_t)0xe661, (q15_t)0x7aa1, (q15_t)0xe656, (q15_t)0x7a9c, (q15_t)0xe64a,
-    (q15_t)0x7a97, (q15_t)0xe63f, (q15_t)0x7a92, (q15_t)0xe633, (q15_t)0x7a8d, (q15_t)0xe628, (q15_t)0x7a88, (q15_t)0xe61c,
-    (q15_t)0x7a82, (q15_t)0xe611, (q15_t)0x7a7d, (q15_t)0xe605, (q15_t)0x7a78, (q15_t)0xe5fa, (q15_t)0x7a73, (q15_t)0xe5ee,
-    (q15_t)0x7a6e, (q15_t)0xe5e3, (q15_t)0x7a69, (q15_t)0xe5d7, (q15_t)0x7a64, (q15_t)0xe5cc, (q15_t)0x7a5f, (q15_t)0xe5c0,
-    (q15_t)0x7a59, (q15_t)0xe5b5, (q15_t)0x7a54, (q15_t)0xe5a9, (q15_t)0x7a4f, (q15_t)0xe59e, (q15_t)0x7a4a, (q15_t)0xe592,
-    (q15_t)0x7a45, (q15_t)0xe587, (q15_t)0x7a3f, (q15_t)0xe57c, (q15_t)0x7a3a, (q15_t)0xe570, (q15_t)0x7a35, (q15_t)0xe565,
-    (q15_t)0x7a30, (q15_t)0xe559, (q15_t)0x7a2b, (q15_t)0xe54e, (q15_t)0x7a25, (q15_t)0xe542, (q15_t)0x7a20, (q15_t)0xe537,
-    (q15_t)0x7a1b, (q15_t)0xe52c, (q15_t)0x7a16, (q15_t)0xe520, (q15_t)0x7a10, (q15_t)0xe515, (q15_t)0x7a0b, (q15_t)0xe509,
-    (q15_t)0x7a06, (q15_t)0xe4fe, (q15_t)0x7a00, (q15_t)0xe4f3, (q15_t)0x79fb, (q15_t)0xe4e7, (q15_t)0x79f6, (q15_t)0xe4dc,
-    (q15_t)0x79f0, (q15_t)0xe4d0, (q15_t)0x79eb, (q15_t)0xe4c5, (q15_t)0x79e6, (q15_t)0xe4ba, (q15_t)0x79e0, (q15_t)0xe4ae,
-    (q15_t)0x79db, (q15_t)0xe4a3, (q15_t)0x79d6, (q15_t)0xe498, (q15_t)0x79d0, (q15_t)0xe48c, (q15_t)0x79cb, (q15_t)0xe481,
-    (q15_t)0x79c5, (q15_t)0xe476, (q15_t)0x79c0, (q15_t)0xe46a, (q15_t)0x79bb, (q15_t)0xe45f, (q15_t)0x79b5, (q15_t)0xe454,
-    (q15_t)0x79b0, (q15_t)0xe448, (q15_t)0x79aa, (q15_t)0xe43d, (q15_t)0x79a5, (q15_t)0xe432, (q15_t)0x799f, (q15_t)0xe426,
-    (q15_t)0x799a, (q15_t)0xe41b, (q15_t)0x7994, (q15_t)0xe410, (q15_t)0x798f, (q15_t)0xe404, (q15_t)0x7989, (q15_t)0xe3f9,
-    (q15_t)0x7984, (q15_t)0xe3ee, (q15_t)0x797e, (q15_t)0xe3e2, (q15_t)0x7979, (q15_t)0xe3d7, (q15_t)0x7973, (q15_t)0xe3cc,
-    (q15_t)0x796e, (q15_t)0xe3c1, (q15_t)0x7968, (q15_t)0xe3b5, (q15_t)0x7963, (q15_t)0xe3aa, (q15_t)0x795d, (q15_t)0xe39f,
-    (q15_t)0x7958, (q15_t)0xe394, (q15_t)0x7952, (q15_t)0xe388, (q15_t)0x794c, (q15_t)0xe37d, (q15_t)0x7947, (q15_t)0xe372,
-    (q15_t)0x7941, (q15_t)0xe367, (q15_t)0x793b, (q15_t)0xe35b, (q15_t)0x7936, (q15_t)0xe350, (q15_t)0x7930, (q15_t)0xe345,
-    (q15_t)0x792b, (q15_t)0xe33a, (q15_t)0x7925, (q15_t)0xe32e, (q15_t)0x791f, (q15_t)0xe323, (q15_t)0x791a, (q15_t)0xe318,
-    (q15_t)0x7914, (q15_t)0xe30d, (q15_t)0x790e, (q15_t)0xe301, (q15_t)0x7909, (q15_t)0xe2f6, (q15_t)0x7903, (q15_t)0xe2eb,
-    (q15_t)0x78fd, (q15_t)0xe2e0, (q15_t)0x78f7, (q15_t)0xe2d5, (q15_t)0x78f2, (q15_t)0xe2ca, (q15_t)0x78ec, (q15_t)0xe2be,
-    (q15_t)0x78e6, (q15_t)0xe2b3, (q15_t)0x78e0, (q15_t)0xe2a8, (q15_t)0x78db, (q15_t)0xe29d, (q15_t)0x78d5, (q15_t)0xe292,
-    (q15_t)0x78cf, (q15_t)0xe287, (q15_t)0x78c9, (q15_t)0xe27b, (q15_t)0x78c3, (q15_t)0xe270, (q15_t)0x78be, (q15_t)0xe265,
-    (q15_t)0x78b8, (q15_t)0xe25a, (q15_t)0x78b2, (q15_t)0xe24f, (q15_t)0x78ac, (q15_t)0xe244, (q15_t)0x78a6, (q15_t)0xe239,
-    (q15_t)0x78a1, (q15_t)0xe22d, (q15_t)0x789b, (q15_t)0xe222, (q15_t)0x7895, (q15_t)0xe217, (q15_t)0x788f, (q15_t)0xe20c,
-    (q15_t)0x7889, (q15_t)0xe201, (q15_t)0x7883, (q15_t)0xe1f6, (q15_t)0x787d, (q15_t)0xe1eb, (q15_t)0x7877, (q15_t)0xe1e0,
-    (q15_t)0x7871, (q15_t)0xe1d5, (q15_t)0x786b, (q15_t)0xe1ca, (q15_t)0x7866, (q15_t)0xe1be, (q15_t)0x7860, (q15_t)0xe1b3,
-    (q15_t)0x785a, (q15_t)0xe1a8, (q15_t)0x7854, (q15_t)0xe19d, (q15_t)0x784e, (q15_t)0xe192, (q15_t)0x7848, (q15_t)0xe187,
-    (q15_t)0x7842, (q15_t)0xe17c, (q15_t)0x783c, (q15_t)0xe171, (q15_t)0x7836, (q15_t)0xe166, (q15_t)0x7830, (q15_t)0xe15b,
-    (q15_t)0x782a, (q15_t)0xe150, (q15_t)0x7824, (q15_t)0xe145, (q15_t)0x781e, (q15_t)0xe13a, (q15_t)0x7818, (q15_t)0xe12f,
-    (q15_t)0x7812, (q15_t)0xe124, (q15_t)0x780b, (q15_t)0xe119, (q15_t)0x7805, (q15_t)0xe10e, (q15_t)0x77ff, (q15_t)0xe103,
-    (q15_t)0x77f9, (q15_t)0xe0f8, (q15_t)0x77f3, (q15_t)0xe0ed, (q15_t)0x77ed, (q15_t)0xe0e2, (q15_t)0x77e7, (q15_t)0xe0d7,
-    (q15_t)0x77e1, (q15_t)0xe0cc, (q15_t)0x77db, (q15_t)0xe0c1, (q15_t)0x77d5, (q15_t)0xe0b6, (q15_t)0x77ce, (q15_t)0xe0ab,
-    (q15_t)0x77c8, (q15_t)0xe0a0, (q15_t)0x77c2, (q15_t)0xe095, (q15_t)0x77bc, (q15_t)0xe08a, (q15_t)0x77b6, (q15_t)0xe07f,
-    (q15_t)0x77b0, (q15_t)0xe074, (q15_t)0x77a9, (q15_t)0xe069, (q15_t)0x77a3, (q15_t)0xe05e, (q15_t)0x779d, (q15_t)0xe054,
-    (q15_t)0x7797, (q15_t)0xe049, (q15_t)0x7790, (q15_t)0xe03e, (q15_t)0x778a, (q15_t)0xe033, (q15_t)0x7784, (q15_t)0xe028,
-    (q15_t)0x777e, (q15_t)0xe01d, (q15_t)0x7777, (q15_t)0xe012, (q15_t)0x7771, (q15_t)0xe007, (q15_t)0x776b, (q15_t)0xdffc,
-    (q15_t)0x7765, (q15_t)0xdff1, (q15_t)0x775e, (q15_t)0xdfe7, (q15_t)0x7758, (q15_t)0xdfdc, (q15_t)0x7752, (q15_t)0xdfd1,
-    (q15_t)0x774b, (q15_t)0xdfc6, (q15_t)0x7745, (q15_t)0xdfbb, (q15_t)0x773f, (q15_t)0xdfb0, (q15_t)0x7738, (q15_t)0xdfa5,
-    (q15_t)0x7732, (q15_t)0xdf9b, (q15_t)0x772c, (q15_t)0xdf90, (q15_t)0x7725, (q15_t)0xdf85, (q15_t)0x771f, (q15_t)0xdf7a,
-    (q15_t)0x7718, (q15_t)0xdf6f, (q15_t)0x7712, (q15_t)0xdf65, (q15_t)0x770c, (q15_t)0xdf5a, (q15_t)0x7705, (q15_t)0xdf4f,
-    (q15_t)0x76ff, (q15_t)0xdf44, (q15_t)0x76f8, (q15_t)0xdf39, (q15_t)0x76f2, (q15_t)0xdf2f, (q15_t)0x76eb, (q15_t)0xdf24,
-    (q15_t)0x76e5, (q15_t)0xdf19, (q15_t)0x76df, (q15_t)0xdf0e, (q15_t)0x76d8, (q15_t)0xdf03, (q15_t)0x76d2, (q15_t)0xdef9,
-    (q15_t)0x76cb, (q15_t)0xdeee, (q15_t)0x76c5, (q15_t)0xdee3, (q15_t)0x76be, (q15_t)0xded8, (q15_t)0x76b8, (q15_t)0xdece,
-    (q15_t)0x76b1, (q15_t)0xdec3, (q15_t)0x76ab, (q15_t)0xdeb8, (q15_t)0x76a4, (q15_t)0xdead, (q15_t)0x769d, (q15_t)0xdea3,
-    (q15_t)0x7697, (q15_t)0xde98, (q15_t)0x7690, (q15_t)0xde8d, (q15_t)0x768a, (q15_t)0xde83, (q15_t)0x7683, (q15_t)0xde78,
-    (q15_t)0x767d, (q15_t)0xde6d, (q15_t)0x7676, (q15_t)0xde62, (q15_t)0x766f, (q15_t)0xde58, (q15_t)0x7669, (q15_t)0xde4d,
-    (q15_t)0x7662, (q15_t)0xde42, (q15_t)0x765c, (q15_t)0xde38, (q15_t)0x7655, (q15_t)0xde2d, (q15_t)0x764e, (q15_t)0xde22,
-    (q15_t)0x7648, (q15_t)0xde18, (q15_t)0x7641, (q15_t)0xde0d, (q15_t)0x763a, (q15_t)0xde02, (q15_t)0x7634, (q15_t)0xddf8,
-    (q15_t)0x762d, (q15_t)0xdded, (q15_t)0x7626, (q15_t)0xdde2, (q15_t)0x7620, (q15_t)0xddd8, (q15_t)0x7619, (q15_t)0xddcd,
-    (q15_t)0x7612, (q15_t)0xddc3, (q15_t)0x760b, (q15_t)0xddb8, (q15_t)0x7605, (q15_t)0xddad, (q15_t)0x75fe, (q15_t)0xdda3,
-    (q15_t)0x75f7, (q15_t)0xdd98, (q15_t)0x75f0, (q15_t)0xdd8e, (q15_t)0x75ea, (q15_t)0xdd83, (q15_t)0x75e3, (q15_t)0xdd78,
-    (q15_t)0x75dc, (q15_t)0xdd6e, (q15_t)0x75d5, (q15_t)0xdd63, (q15_t)0x75ce, (q15_t)0xdd59, (q15_t)0x75c8, (q15_t)0xdd4e,
-    (q15_t)0x75c1, (q15_t)0xdd44, (q15_t)0x75ba, (q15_t)0xdd39, (q15_t)0x75b3, (q15_t)0xdd2e, (q15_t)0x75ac, (q15_t)0xdd24,
-    (q15_t)0x75a5, (q15_t)0xdd19, (q15_t)0x759f, (q15_t)0xdd0f, (q15_t)0x7598, (q15_t)0xdd04, (q15_t)0x7591, (q15_t)0xdcfa,
-    (q15_t)0x758a, (q15_t)0xdcef, (q15_t)0x7583, (q15_t)0xdce5, (q15_t)0x757c, (q15_t)0xdcda, (q15_t)0x7575, (q15_t)0xdcd0,
-    (q15_t)0x756e, (q15_t)0xdcc5, (q15_t)0x7567, (q15_t)0xdcbb, (q15_t)0x7561, (q15_t)0xdcb0, (q15_t)0x755a, (q15_t)0xdca6,
-    (q15_t)0x7553, (q15_t)0xdc9b, (q15_t)0x754c, (q15_t)0xdc91, (q15_t)0x7545, (q15_t)0xdc86, (q15_t)0x753e, (q15_t)0xdc7c,
-    (q15_t)0x7537, (q15_t)0xdc72, (q15_t)0x7530, (q15_t)0xdc67, (q15_t)0x7529, (q15_t)0xdc5d, (q15_t)0x7522, (q15_t)0xdc52,
-    (q15_t)0x751b, (q15_t)0xdc48, (q15_t)0x7514, (q15_t)0xdc3d, (q15_t)0x750d, (q15_t)0xdc33, (q15_t)0x7506, (q15_t)0xdc29,
-    (q15_t)0x74ff, (q15_t)0xdc1e, (q15_t)0x74f8, (q15_t)0xdc14, (q15_t)0x74f1, (q15_t)0xdc09, (q15_t)0x74ea, (q15_t)0xdbff,
-    (q15_t)0x74e2, (q15_t)0xdbf5, (q15_t)0x74db, (q15_t)0xdbea, (q15_t)0x74d4, (q15_t)0xdbe0, (q15_t)0x74cd, (q15_t)0xdbd5,
-    (q15_t)0x74c6, (q15_t)0xdbcb, (q15_t)0x74bf, (q15_t)0xdbc1, (q15_t)0x74b8, (q15_t)0xdbb6, (q15_t)0x74b1, (q15_t)0xdbac,
-    (q15_t)0x74aa, (q15_t)0xdba2, (q15_t)0x74a2, (q15_t)0xdb97, (q15_t)0x749b, (q15_t)0xdb8d, (q15_t)0x7494, (q15_t)0xdb83,
-    (q15_t)0x748d, (q15_t)0xdb78, (q15_t)0x7486, (q15_t)0xdb6e, (q15_t)0x747f, (q15_t)0xdb64, (q15_t)0x7477, (q15_t)0xdb59,
-    (q15_t)0x7470, (q15_t)0xdb4f, (q15_t)0x7469, (q15_t)0xdb45, (q15_t)0x7462, (q15_t)0xdb3b, (q15_t)0x745b, (q15_t)0xdb30,
-    (q15_t)0x7453, (q15_t)0xdb26, (q15_t)0x744c, (q15_t)0xdb1c, (q15_t)0x7445, (q15_t)0xdb11, (q15_t)0x743e, (q15_t)0xdb07,
-    (q15_t)0x7436, (q15_t)0xdafd, (q15_t)0x742f, (q15_t)0xdaf3, (q15_t)0x7428, (q15_t)0xdae8, (q15_t)0x7420, (q15_t)0xdade,
-    (q15_t)0x7419, (q15_t)0xdad4, (q15_t)0x7412, (q15_t)0xdaca, (q15_t)0x740b, (q15_t)0xdabf, (q15_t)0x7403, (q15_t)0xdab5,
-    (q15_t)0x73fc, (q15_t)0xdaab, (q15_t)0x73f5, (q15_t)0xdaa1, (q15_t)0x73ed, (q15_t)0xda97, (q15_t)0x73e6, (q15_t)0xda8c,
-    (q15_t)0x73df, (q15_t)0xda82, (q15_t)0x73d7, (q15_t)0xda78, (q15_t)0x73d0, (q15_t)0xda6e, (q15_t)0x73c8, (q15_t)0xda64,
-    (q15_t)0x73c1, (q15_t)0xda5a, (q15_t)0x73ba, (q15_t)0xda4f, (q15_t)0x73b2, (q15_t)0xda45, (q15_t)0x73ab, (q15_t)0xda3b,
-    (q15_t)0x73a3, (q15_t)0xda31, (q15_t)0x739c, (q15_t)0xda27, (q15_t)0x7395, (q15_t)0xda1d, (q15_t)0x738d, (q15_t)0xda13,
-    (q15_t)0x7386, (q15_t)0xda08, (q15_t)0x737e, (q15_t)0xd9fe, (q15_t)0x7377, (q15_t)0xd9f4, (q15_t)0x736f, (q15_t)0xd9ea,
-    (q15_t)0x7368, (q15_t)0xd9e0, (q15_t)0x7360, (q15_t)0xd9d6, (q15_t)0x7359, (q15_t)0xd9cc, (q15_t)0x7351, (q15_t)0xd9c2,
-    (q15_t)0x734a, (q15_t)0xd9b8, (q15_t)0x7342, (q15_t)0xd9ae, (q15_t)0x733b, (q15_t)0xd9a4, (q15_t)0x7333, (q15_t)0xd99a,
-    (q15_t)0x732c, (q15_t)0xd98f, (q15_t)0x7324, (q15_t)0xd985, (q15_t)0x731d, (q15_t)0xd97b, (q15_t)0x7315, (q15_t)0xd971,
-    (q15_t)0x730d, (q15_t)0xd967, (q15_t)0x7306, (q15_t)0xd95d, (q15_t)0x72fe, (q15_t)0xd953, (q15_t)0x72f7, (q15_t)0xd949,
-    (q15_t)0x72ef, (q15_t)0xd93f, (q15_t)0x72e7, (q15_t)0xd935, (q15_t)0x72e0, (q15_t)0xd92b, (q15_t)0x72d8, (q15_t)0xd921,
-    (q15_t)0x72d0, (q15_t)0xd917, (q15_t)0x72c9, (q15_t)0xd90d, (q15_t)0x72c1, (q15_t)0xd903, (q15_t)0x72ba, (q15_t)0xd8f9,
-    (q15_t)0x72b2, (q15_t)0xd8ef, (q15_t)0x72aa, (q15_t)0xd8e6, (q15_t)0x72a3, (q15_t)0xd8dc, (q15_t)0x729b, (q15_t)0xd8d2,
-    (q15_t)0x7293, (q15_t)0xd8c8, (q15_t)0x728b, (q15_t)0xd8be, (q15_t)0x7284, (q15_t)0xd8b4, (q15_t)0x727c, (q15_t)0xd8aa,
-    (q15_t)0x7274, (q15_t)0xd8a0, (q15_t)0x726d, (q15_t)0xd896, (q15_t)0x7265, (q15_t)0xd88c, (q15_t)0x725d, (q15_t)0xd882,
-    (q15_t)0x7255, (q15_t)0xd878, (q15_t)0x724e, (q15_t)0xd86f, (q15_t)0x7246, (q15_t)0xd865, (q15_t)0x723e, (q15_t)0xd85b,
-    (q15_t)0x7236, (q15_t)0xd851, (q15_t)0x722e, (q15_t)0xd847, (q15_t)0x7227, (q15_t)0xd83d, (q15_t)0x721f, (q15_t)0xd833,
-    (q15_t)0x7217, (q15_t)0xd82a, (q15_t)0x720f, (q15_t)0xd820, (q15_t)0x7207, (q15_t)0xd816, (q15_t)0x71ff, (q15_t)0xd80c,
-    (q15_t)0x71f8, (q15_t)0xd802, (q15_t)0x71f0, (q15_t)0xd7f8, (q15_t)0x71e8, (q15_t)0xd7ef, (q15_t)0x71e0, (q15_t)0xd7e5,
-    (q15_t)0x71d8, (q15_t)0xd7db, (q15_t)0x71d0, (q15_t)0xd7d1, (q15_t)0x71c8, (q15_t)0xd7c8, (q15_t)0x71c0, (q15_t)0xd7be,
-    (q15_t)0x71b9, (q15_t)0xd7b4, (q15_t)0x71b1, (q15_t)0xd7aa, (q15_t)0x71a9, (q15_t)0xd7a0, (q15_t)0x71a1, (q15_t)0xd797,
-    (q15_t)0x7199, (q15_t)0xd78d, (q15_t)0x7191, (q15_t)0xd783, (q15_t)0x7189, (q15_t)0xd77a, (q15_t)0x7181, (q15_t)0xd770,
-    (q15_t)0x7179, (q15_t)0xd766, (q15_t)0x7171, (q15_t)0xd75c, (q15_t)0x7169, (q15_t)0xd753, (q15_t)0x7161, (q15_t)0xd749,
-    (q15_t)0x7159, (q15_t)0xd73f, (q15_t)0x7151, (q15_t)0xd736, (q15_t)0x7149, (q15_t)0xd72c, (q15_t)0x7141, (q15_t)0xd722,
-    (q15_t)0x7139, (q15_t)0xd719, (q15_t)0x7131, (q15_t)0xd70f, (q15_t)0x7129, (q15_t)0xd705, (q15_t)0x7121, (q15_t)0xd6fc,
-    (q15_t)0x7119, (q15_t)0xd6f2, (q15_t)0x7111, (q15_t)0xd6e8, (q15_t)0x7109, (q15_t)0xd6df, (q15_t)0x7101, (q15_t)0xd6d5,
-    (q15_t)0x70f9, (q15_t)0xd6cb, (q15_t)0x70f0, (q15_t)0xd6c2, (q15_t)0x70e8, (q15_t)0xd6b8, (q15_t)0x70e0, (q15_t)0xd6af,
-    (q15_t)0x70d8, (q15_t)0xd6a5, (q15_t)0x70d0, (q15_t)0xd69b, (q15_t)0x70c8, (q15_t)0xd692, (q15_t)0x70c0, (q15_t)0xd688,
-    (q15_t)0x70b8, (q15_t)0xd67f, (q15_t)0x70af, (q15_t)0xd675, (q15_t)0x70a7, (q15_t)0xd66c, (q15_t)0x709f, (q15_t)0xd662,
-    (q15_t)0x7097, (q15_t)0xd659, (q15_t)0x708f, (q15_t)0xd64f, (q15_t)0x7087, (q15_t)0xd645, (q15_t)0x707e, (q15_t)0xd63c,
-    (q15_t)0x7076, (q15_t)0xd632, (q15_t)0x706e, (q15_t)0xd629, (q15_t)0x7066, (q15_t)0xd61f, (q15_t)0x705d, (q15_t)0xd616,
-    (q15_t)0x7055, (q15_t)0xd60c, (q15_t)0x704d, (q15_t)0xd603, (q15_t)0x7045, (q15_t)0xd5f9, (q15_t)0x703c, (q15_t)0xd5f0,
-    (q15_t)0x7034, (q15_t)0xd5e6, (q15_t)0x702c, (q15_t)0xd5dd, (q15_t)0x7024, (q15_t)0xd5d4, (q15_t)0x701b, (q15_t)0xd5ca,
-    (q15_t)0x7013, (q15_t)0xd5c1, (q15_t)0x700b, (q15_t)0xd5b7, (q15_t)0x7002, (q15_t)0xd5ae, (q15_t)0x6ffa, (q15_t)0xd5a4,
-    (q15_t)0x6ff2, (q15_t)0xd59b, (q15_t)0x6fea, (q15_t)0xd592, (q15_t)0x6fe1, (q15_t)0xd588, (q15_t)0x6fd9, (q15_t)0xd57f,
-    (q15_t)0x6fd0, (q15_t)0xd575, (q15_t)0x6fc8, (q15_t)0xd56c, (q15_t)0x6fc0, (q15_t)0xd563, (q15_t)0x6fb7, (q15_t)0xd559,
-    (q15_t)0x6faf, (q15_t)0xd550, (q15_t)0x6fa7, (q15_t)0xd547, (q15_t)0x6f9e, (q15_t)0xd53d, (q15_t)0x6f96, (q15_t)0xd534,
-    (q15_t)0x6f8d, (q15_t)0xd52a, (q15_t)0x6f85, (q15_t)0xd521, (q15_t)0x6f7d, (q15_t)0xd518, (q15_t)0x6f74, (q15_t)0xd50e,
-    (q15_t)0x6f6c, (q15_t)0xd505, (q15_t)0x6f63, (q15_t)0xd4fc, (q15_t)0x6f5b, (q15_t)0xd4f3, (q15_t)0x6f52, (q15_t)0xd4e9,
-    (q15_t)0x6f4a, (q15_t)0xd4e0, (q15_t)0x6f41, (q15_t)0xd4d7, (q15_t)0x6f39, (q15_t)0xd4cd, (q15_t)0x6f30, (q15_t)0xd4c4,
-    (q15_t)0x6f28, (q15_t)0xd4bb, (q15_t)0x6f20, (q15_t)0xd4b2, (q15_t)0x6f17, (q15_t)0xd4a8, (q15_t)0x6f0e, (q15_t)0xd49f,
-    (q15_t)0x6f06, (q15_t)0xd496, (q15_t)0x6efd, (q15_t)0xd48d, (q15_t)0x6ef5, (q15_t)0xd483, (q15_t)0x6eec, (q15_t)0xd47a,
-    (q15_t)0x6ee4, (q15_t)0xd471, (q15_t)0x6edb, (q15_t)0xd468, (q15_t)0x6ed3, (q15_t)0xd45f, (q15_t)0x6eca, (q15_t)0xd455,
-    (q15_t)0x6ec2, (q15_t)0xd44c, (q15_t)0x6eb9, (q15_t)0xd443, (q15_t)0x6eb0, (q15_t)0xd43a, (q15_t)0x6ea8, (q15_t)0xd431,
-    (q15_t)0x6e9f, (q15_t)0xd428, (q15_t)0x6e97, (q15_t)0xd41e, (q15_t)0x6e8e, (q15_t)0xd415, (q15_t)0x6e85, (q15_t)0xd40c,
-    (q15_t)0x6e7d, (q15_t)0xd403, (q15_t)0x6e74, (q15_t)0xd3fa, (q15_t)0x6e6b, (q15_t)0xd3f1, (q15_t)0x6e63, (q15_t)0xd3e8,
-    (q15_t)0x6e5a, (q15_t)0xd3df, (q15_t)0x6e51, (q15_t)0xd3d5, (q15_t)0x6e49, (q15_t)0xd3cc, (q15_t)0x6e40, (q15_t)0xd3c3,
-    (q15_t)0x6e37, (q15_t)0xd3ba, (q15_t)0x6e2f, (q15_t)0xd3b1, (q15_t)0x6e26, (q15_t)0xd3a8, (q15_t)0x6e1d, (q15_t)0xd39f,
-    (q15_t)0x6e15, (q15_t)0xd396, (q15_t)0x6e0c, (q15_t)0xd38d, (q15_t)0x6e03, (q15_t)0xd384, (q15_t)0x6dfa, (q15_t)0xd37b,
-    (q15_t)0x6df2, (q15_t)0xd372, (q15_t)0x6de9, (q15_t)0xd369, (q15_t)0x6de0, (q15_t)0xd360, (q15_t)0x6dd7, (q15_t)0xd357,
-    (q15_t)0x6dcf, (q15_t)0xd34e, (q15_t)0x6dc6, (q15_t)0xd345, (q15_t)0x6dbd, (q15_t)0xd33c, (q15_t)0x6db4, (q15_t)0xd333,
-    (q15_t)0x6dab, (q15_t)0xd32a, (q15_t)0x6da3, (q15_t)0xd321, (q15_t)0x6d9a, (q15_t)0xd318, (q15_t)0x6d91, (q15_t)0xd30f,
-    (q15_t)0x6d88, (q15_t)0xd306, (q15_t)0x6d7f, (q15_t)0xd2fd, (q15_t)0x6d76, (q15_t)0xd2f4, (q15_t)0x6d6e, (q15_t)0xd2eb,
-    (q15_t)0x6d65, (q15_t)0xd2e2, (q15_t)0x6d5c, (q15_t)0xd2d9, (q15_t)0x6d53, (q15_t)0xd2d1, (q15_t)0x6d4a, (q15_t)0xd2c8,
-    (q15_t)0x6d41, (q15_t)0xd2bf, (q15_t)0x6d38, (q15_t)0xd2b6, (q15_t)0x6d2f, (q15_t)0xd2ad, (q15_t)0x6d27, (q15_t)0xd2a4,
-    (q15_t)0x6d1e, (q15_t)0xd29b, (q15_t)0x6d15, (q15_t)0xd292, (q15_t)0x6d0c, (q15_t)0xd28a, (q15_t)0x6d03, (q15_t)0xd281,
-    (q15_t)0x6cfa, (q15_t)0xd278, (q15_t)0x6cf1, (q15_t)0xd26f, (q15_t)0x6ce8, (q15_t)0xd266, (q15_t)0x6cdf, (q15_t)0xd25d,
-    (q15_t)0x6cd6, (q15_t)0xd255, (q15_t)0x6ccd, (q15_t)0xd24c, (q15_t)0x6cc4, (q15_t)0xd243, (q15_t)0x6cbb, (q15_t)0xd23a,
-    (q15_t)0x6cb2, (q15_t)0xd231, (q15_t)0x6ca9, (q15_t)0xd229, (q15_t)0x6ca0, (q15_t)0xd220, (q15_t)0x6c97, (q15_t)0xd217,
-    (q15_t)0x6c8e, (q15_t)0xd20e, (q15_t)0x6c85, (q15_t)0xd206, (q15_t)0x6c7c, (q15_t)0xd1fd, (q15_t)0x6c73, (q15_t)0xd1f4,
-    (q15_t)0x6c6a, (q15_t)0xd1eb, (q15_t)0x6c61, (q15_t)0xd1e3, (q15_t)0x6c58, (q15_t)0xd1da, (q15_t)0x6c4f, (q15_t)0xd1d1,
-    (q15_t)0x6c46, (q15_t)0xd1c9, (q15_t)0x6c3d, (q15_t)0xd1c0, (q15_t)0x6c34, (q15_t)0xd1b7, (q15_t)0x6c2b, (q15_t)0xd1af,
-    (q15_t)0x6c21, (q15_t)0xd1a6, (q15_t)0x6c18, (q15_t)0xd19d, (q15_t)0x6c0f, (q15_t)0xd195, (q15_t)0x6c06, (q15_t)0xd18c,
-    (q15_t)0x6bfd, (q15_t)0xd183, (q15_t)0x6bf4, (q15_t)0xd17b, (q15_t)0x6beb, (q15_t)0xd172, (q15_t)0x6be2, (q15_t)0xd169,
-    (q15_t)0x6bd8, (q15_t)0xd161, (q15_t)0x6bcf, (q15_t)0xd158, (q15_t)0x6bc6, (q15_t)0xd150, (q15_t)0x6bbd, (q15_t)0xd147,
-    (q15_t)0x6bb4, (q15_t)0xd13e, (q15_t)0x6bab, (q15_t)0xd136, (q15_t)0x6ba1, (q15_t)0xd12d, (q15_t)0x6b98, (q15_t)0xd125,
-    (q15_t)0x6b8f, (q15_t)0xd11c, (q15_t)0x6b86, (q15_t)0xd114, (q15_t)0x6b7d, (q15_t)0xd10b, (q15_t)0x6b73, (q15_t)0xd103,
-    (q15_t)0x6b6a, (q15_t)0xd0fa, (q15_t)0x6b61, (q15_t)0xd0f2, (q15_t)0x6b58, (q15_t)0xd0e9, (q15_t)0x6b4e, (q15_t)0xd0e0,
-    (q15_t)0x6b45, (q15_t)0xd0d8, (q15_t)0x6b3c, (q15_t)0xd0d0, (q15_t)0x6b33, (q15_t)0xd0c7, (q15_t)0x6b29, (q15_t)0xd0bf,
-    (q15_t)0x6b20, (q15_t)0xd0b6, (q15_t)0x6b17, (q15_t)0xd0ae, (q15_t)0x6b0d, (q15_t)0xd0a5, (q15_t)0x6b04, (q15_t)0xd09d,
-    (q15_t)0x6afb, (q15_t)0xd094, (q15_t)0x6af2, (q15_t)0xd08c, (q15_t)0x6ae8, (q15_t)0xd083, (q15_t)0x6adf, (q15_t)0xd07b,
-    (q15_t)0x6ad6, (q15_t)0xd073, (q15_t)0x6acc, (q15_t)0xd06a, (q15_t)0x6ac3, (q15_t)0xd062, (q15_t)0x6ab9, (q15_t)0xd059,
-    (q15_t)0x6ab0, (q15_t)0xd051, (q15_t)0x6aa7, (q15_t)0xd049, (q15_t)0x6a9d, (q15_t)0xd040, (q15_t)0x6a94, (q15_t)0xd038,
-    (q15_t)0x6a8b, (q15_t)0xd030, (q15_t)0x6a81, (q15_t)0xd027, (q15_t)0x6a78, (q15_t)0xd01f, (q15_t)0x6a6e, (q15_t)0xd016,
-    (q15_t)0x6a65, (q15_t)0xd00e, (q15_t)0x6a5c, (q15_t)0xd006, (q15_t)0x6a52, (q15_t)0xcffe, (q15_t)0x6a49, (q15_t)0xcff5,
-    (q15_t)0x6a3f, (q15_t)0xcfed, (q15_t)0x6a36, (q15_t)0xcfe5, (q15_t)0x6a2c, (q15_t)0xcfdc, (q15_t)0x6a23, (q15_t)0xcfd4,
-    (q15_t)0x6a1a, (q15_t)0xcfcc, (q15_t)0x6a10, (q15_t)0xcfc4, (q15_t)0x6a07, (q15_t)0xcfbb, (q15_t)0x69fd, (q15_t)0xcfb3,
-    (q15_t)0x69f4, (q15_t)0xcfab, (q15_t)0x69ea, (q15_t)0xcfa3, (q15_t)0x69e1, (q15_t)0xcf9a, (q15_t)0x69d7, (q15_t)0xcf92,
-    (q15_t)0x69ce, (q15_t)0xcf8a, (q15_t)0x69c4, (q15_t)0xcf82, (q15_t)0x69bb, (q15_t)0xcf79, (q15_t)0x69b1, (q15_t)0xcf71,
-    (q15_t)0x69a7, (q15_t)0xcf69, (q15_t)0x699e, (q15_t)0xcf61, (q15_t)0x6994, (q15_t)0xcf59, (q15_t)0x698b, (q15_t)0xcf51,
-    (q15_t)0x6981, (q15_t)0xcf48, (q15_t)0x6978, (q15_t)0xcf40, (q15_t)0x696e, (q15_t)0xcf38, (q15_t)0x6965, (q15_t)0xcf30,
-    (q15_t)0x695b, (q15_t)0xcf28, (q15_t)0x6951, (q15_t)0xcf20, (q15_t)0x6948, (q15_t)0xcf18, (q15_t)0x693e, (q15_t)0xcf10,
-    (q15_t)0x6935, (q15_t)0xcf07, (q15_t)0x692b, (q15_t)0xceff, (q15_t)0x6921, (q15_t)0xcef7, (q15_t)0x6918, (q15_t)0xceef,
-    (q15_t)0x690e, (q15_t)0xcee7, (q15_t)0x6904, (q15_t)0xcedf, (q15_t)0x68fb, (q15_t)0xced7, (q15_t)0x68f1, (q15_t)0xcecf,
-    (q15_t)0x68e7, (q15_t)0xcec7, (q15_t)0x68de, (q15_t)0xcebf, (q15_t)0x68d4, (q15_t)0xceb7, (q15_t)0x68ca, (q15_t)0xceaf,
-    (q15_t)0x68c1, (q15_t)0xcea7, (q15_t)0x68b7, (q15_t)0xce9f, (q15_t)0x68ad, (q15_t)0xce97, (q15_t)0x68a4, (q15_t)0xce8f,
-    (q15_t)0x689a, (q15_t)0xce87, (q15_t)0x6890, (q15_t)0xce7f, (q15_t)0x6886, (q15_t)0xce77, (q15_t)0x687d, (q15_t)0xce6f,
-    (q15_t)0x6873, (q15_t)0xce67, (q15_t)0x6869, (q15_t)0xce5f, (q15_t)0x6860, (q15_t)0xce57, (q15_t)0x6856, (q15_t)0xce4f,
-    (q15_t)0x684c, (q15_t)0xce47, (q15_t)0x6842, (q15_t)0xce40, (q15_t)0x6838, (q15_t)0xce38, (q15_t)0x682f, (q15_t)0xce30,
-    (q15_t)0x6825, (q15_t)0xce28, (q15_t)0x681b, (q15_t)0xce20, (q15_t)0x6811, (q15_t)0xce18, (q15_t)0x6808, (q15_t)0xce10,
-    (q15_t)0x67fe, (q15_t)0xce08, (q15_t)0x67f4, (q15_t)0xce01, (q15_t)0x67ea, (q15_t)0xcdf9, (q15_t)0x67e0, (q15_t)0xcdf1,
-    (q15_t)0x67d6, (q15_t)0xcde9, (q15_t)0x67cd, (q15_t)0xcde1, (q15_t)0x67c3, (q15_t)0xcdd9, (q15_t)0x67b9, (q15_t)0xcdd2,
-    (q15_t)0x67af, (q15_t)0xcdca, (q15_t)0x67a5, (q15_t)0xcdc2, (q15_t)0x679b, (q15_t)0xcdba, (q15_t)0x6791, (q15_t)0xcdb2,
-    (q15_t)0x6788, (q15_t)0xcdab, (q15_t)0x677e, (q15_t)0xcda3, (q15_t)0x6774, (q15_t)0xcd9b, (q15_t)0x676a, (q15_t)0xcd93,
-    (q15_t)0x6760, (q15_t)0xcd8c, (q15_t)0x6756, (q15_t)0xcd84, (q15_t)0x674c, (q15_t)0xcd7c, (q15_t)0x6742, (q15_t)0xcd75,
-    (q15_t)0x6738, (q15_t)0xcd6d, (q15_t)0x672e, (q15_t)0xcd65, (q15_t)0x6724, (q15_t)0xcd5d, (q15_t)0x671a, (q15_t)0xcd56,
-    (q15_t)0x6711, (q15_t)0xcd4e, (q15_t)0x6707, (q15_t)0xcd46, (q15_t)0x66fd, (q15_t)0xcd3f, (q15_t)0x66f3, (q15_t)0xcd37,
-    (q15_t)0x66e9, (q15_t)0xcd30, (q15_t)0x66df, (q15_t)0xcd28, (q15_t)0x66d5, (q15_t)0xcd20, (q15_t)0x66cb, (q15_t)0xcd19,
-    (q15_t)0x66c1, (q15_t)0xcd11, (q15_t)0x66b7, (q15_t)0xcd09, (q15_t)0x66ad, (q15_t)0xcd02, (q15_t)0x66a3, (q15_t)0xccfa,
-    (q15_t)0x6699, (q15_t)0xccf3, (q15_t)0x668f, (q15_t)0xcceb, (q15_t)0x6685, (q15_t)0xcce3, (q15_t)0x667b, (q15_t)0xccdc,
-    (q15_t)0x6671, (q15_t)0xccd4, (q15_t)0x6666, (q15_t)0xcccd, (q15_t)0x665c, (q15_t)0xccc5, (q15_t)0x6652, (q15_t)0xccbe,
-    (q15_t)0x6648, (q15_t)0xccb6, (q15_t)0x663e, (q15_t)0xccaf, (q15_t)0x6634, (q15_t)0xcca7, (q15_t)0x662a, (q15_t)0xcca0,
-    (q15_t)0x6620, (q15_t)0xcc98, (q15_t)0x6616, (q15_t)0xcc91, (q15_t)0x660c, (q15_t)0xcc89, (q15_t)0x6602, (q15_t)0xcc82,
-    (q15_t)0x65f8, (q15_t)0xcc7a, (q15_t)0x65ed, (q15_t)0xcc73, (q15_t)0x65e3, (q15_t)0xcc6b, (q15_t)0x65d9, (q15_t)0xcc64,
-    (q15_t)0x65cf, (q15_t)0xcc5d, (q15_t)0x65c5, (q15_t)0xcc55, (q15_t)0x65bb, (q15_t)0xcc4e, (q15_t)0x65b1, (q15_t)0xcc46,
-    (q15_t)0x65a6, (q15_t)0xcc3f, (q15_t)0x659c, (q15_t)0xcc38, (q15_t)0x6592, (q15_t)0xcc30, (q15_t)0x6588, (q15_t)0xcc29,
-    (q15_t)0x657e, (q15_t)0xcc21, (q15_t)0x6574, (q15_t)0xcc1a, (q15_t)0x6569, (q15_t)0xcc13, (q15_t)0x655f, (q15_t)0xcc0b,
-    (q15_t)0x6555, (q15_t)0xcc04, (q15_t)0x654b, (q15_t)0xcbfd, (q15_t)0x6541, (q15_t)0xcbf5, (q15_t)0x6536, (q15_t)0xcbee,
-    (q15_t)0x652c, (q15_t)0xcbe7, (q15_t)0x6522, (q15_t)0xcbe0, (q15_t)0x6518, (q15_t)0xcbd8, (q15_t)0x650d, (q15_t)0xcbd1,
-    (q15_t)0x6503, (q15_t)0xcbca, (q15_t)0x64f9, (q15_t)0xcbc2, (q15_t)0x64ef, (q15_t)0xcbbb, (q15_t)0x64e4, (q15_t)0xcbb4,
-    (q15_t)0x64da, (q15_t)0xcbad, (q15_t)0x64d0, (q15_t)0xcba5, (q15_t)0x64c5, (q15_t)0xcb9e, (q15_t)0x64bb, (q15_t)0xcb97,
-    (q15_t)0x64b1, (q15_t)0xcb90, (q15_t)0x64a7, (q15_t)0xcb89, (q15_t)0x649c, (q15_t)0xcb81, (q15_t)0x6492, (q15_t)0xcb7a,
-    (q15_t)0x6488, (q15_t)0xcb73, (q15_t)0x647d, (q15_t)0xcb6c, (q15_t)0x6473, (q15_t)0xcb65, (q15_t)0x6469, (q15_t)0xcb5e,
-    (q15_t)0x645e, (q15_t)0xcb56, (q15_t)0x6454, (q15_t)0xcb4f, (q15_t)0x644a, (q15_t)0xcb48, (q15_t)0x643f, (q15_t)0xcb41,
-    (q15_t)0x6435, (q15_t)0xcb3a, (q15_t)0x642b, (q15_t)0xcb33, (q15_t)0x6420, (q15_t)0xcb2c, (q15_t)0x6416, (q15_t)0xcb25,
-    (q15_t)0x640b, (q15_t)0xcb1e, (q15_t)0x6401, (q15_t)0xcb16, (q15_t)0x63f7, (q15_t)0xcb0f, (q15_t)0x63ec, (q15_t)0xcb08,
-    (q15_t)0x63e2, (q15_t)0xcb01, (q15_t)0x63d7, (q15_t)0xcafa, (q15_t)0x63cd, (q15_t)0xcaf3, (q15_t)0x63c3, (q15_t)0xcaec,
-    (q15_t)0x63b8, (q15_t)0xcae5, (q15_t)0x63ae, (q15_t)0xcade, (q15_t)0x63a3, (q15_t)0xcad7, (q15_t)0x6399, (q15_t)0xcad0,
-    (q15_t)0x638e, (q15_t)0xcac9, (q15_t)0x6384, (q15_t)0xcac2, (q15_t)0x637a, (q15_t)0xcabb, (q15_t)0x636f, (q15_t)0xcab4,
-    (q15_t)0x6365, (q15_t)0xcaad, (q15_t)0x635a, (q15_t)0xcaa6, (q15_t)0x6350, (q15_t)0xca9f, (q15_t)0x6345, (q15_t)0xca99,
-    (q15_t)0x633b, (q15_t)0xca92, (q15_t)0x6330, (q15_t)0xca8b, (q15_t)0x6326, (q15_t)0xca84, (q15_t)0x631b, (q15_t)0xca7d,
-    (q15_t)0x6311, (q15_t)0xca76, (q15_t)0x6306, (q15_t)0xca6f, (q15_t)0x62fc, (q15_t)0xca68, (q15_t)0x62f1, (q15_t)0xca61,
-    (q15_t)0x62e7, (q15_t)0xca5b, (q15_t)0x62dc, (q15_t)0xca54, (q15_t)0x62d2, (q15_t)0xca4d, (q15_t)0x62c7, (q15_t)0xca46,
-    (q15_t)0x62bc, (q15_t)0xca3f, (q15_t)0x62b2, (q15_t)0xca38, (q15_t)0x62a7, (q15_t)0xca32, (q15_t)0x629d, (q15_t)0xca2b,
-    (q15_t)0x6292, (q15_t)0xca24, (q15_t)0x6288, (q15_t)0xca1d, (q15_t)0x627d, (q15_t)0xca16, (q15_t)0x6272, (q15_t)0xca10,
-    (q15_t)0x6268, (q15_t)0xca09, (q15_t)0x625d, (q15_t)0xca02, (q15_t)0x6253, (q15_t)0xc9fb, (q15_t)0x6248, (q15_t)0xc9f5,
-    (q15_t)0x623d, (q15_t)0xc9ee, (q15_t)0x6233, (q15_t)0xc9e7, (q15_t)0x6228, (q15_t)0xc9e0, (q15_t)0x621e, (q15_t)0xc9da,
-    (q15_t)0x6213, (q15_t)0xc9d3, (q15_t)0x6208, (q15_t)0xc9cc, (q15_t)0x61fe, (q15_t)0xc9c6, (q15_t)0x61f3, (q15_t)0xc9bf,
-    (q15_t)0x61e8, (q15_t)0xc9b8, (q15_t)0x61de, (q15_t)0xc9b2, (q15_t)0x61d3, (q15_t)0xc9ab, (q15_t)0x61c8, (q15_t)0xc9a4,
-    (q15_t)0x61be, (q15_t)0xc99e, (q15_t)0x61b3, (q15_t)0xc997, (q15_t)0x61a8, (q15_t)0xc991, (q15_t)0x619e, (q15_t)0xc98a,
-    (q15_t)0x6193, (q15_t)0xc983, (q15_t)0x6188, (q15_t)0xc97d, (q15_t)0x617d, (q15_t)0xc976, (q15_t)0x6173, (q15_t)0xc970,
-    (q15_t)0x6168, (q15_t)0xc969, (q15_t)0x615d, (q15_t)0xc963, (q15_t)0x6153, (q15_t)0xc95c, (q15_t)0x6148, (q15_t)0xc955,
-    (q15_t)0x613d, (q15_t)0xc94f, (q15_t)0x6132, (q15_t)0xc948, (q15_t)0x6128, (q15_t)0xc942, (q15_t)0x611d, (q15_t)0xc93b,
-    (q15_t)0x6112, (q15_t)0xc935, (q15_t)0x6107, (q15_t)0xc92e, (q15_t)0x60fd, (q15_t)0xc928, (q15_t)0x60f2, (q15_t)0xc921,
-    (q15_t)0x60e7, (q15_t)0xc91b, (q15_t)0x60dc, (q15_t)0xc915, (q15_t)0x60d1, (q15_t)0xc90e, (q15_t)0x60c7, (q15_t)0xc908,
-    (q15_t)0x60bc, (q15_t)0xc901, (q15_t)0x60b1, (q15_t)0xc8fb, (q15_t)0x60a6, (q15_t)0xc8f4, (q15_t)0x609b, (q15_t)0xc8ee,
-    (q15_t)0x6091, (q15_t)0xc8e8, (q15_t)0x6086, (q15_t)0xc8e1, (q15_t)0x607b, (q15_t)0xc8db, (q15_t)0x6070, (q15_t)0xc8d4,
-    (q15_t)0x6065, (q15_t)0xc8ce, (q15_t)0x605b, (q15_t)0xc8c8, (q15_t)0x6050, (q15_t)0xc8c1, (q15_t)0x6045, (q15_t)0xc8bb,
-    (q15_t)0x603a, (q15_t)0xc8b5, (q15_t)0x602f, (q15_t)0xc8ae, (q15_t)0x6024, (q15_t)0xc8a8, (q15_t)0x6019, (q15_t)0xc8a2,
-    (q15_t)0x600f, (q15_t)0xc89b, (q15_t)0x6004, (q15_t)0xc895, (q15_t)0x5ff9, (q15_t)0xc88f, (q15_t)0x5fee, (q15_t)0xc889,
-    (q15_t)0x5fe3, (q15_t)0xc882, (q15_t)0x5fd8, (q15_t)0xc87c, (q15_t)0x5fcd, (q15_t)0xc876, (q15_t)0x5fc2, (q15_t)0xc870,
-    (q15_t)0x5fb7, (q15_t)0xc869, (q15_t)0x5fac, (q15_t)0xc863, (q15_t)0x5fa2, (q15_t)0xc85d, (q15_t)0x5f97, (q15_t)0xc857,
-    (q15_t)0x5f8c, (q15_t)0xc850, (q15_t)0x5f81, (q15_t)0xc84a, (q15_t)0x5f76, (q15_t)0xc844, (q15_t)0x5f6b, (q15_t)0xc83e,
-    (q15_t)0x5f60, (q15_t)0xc838, (q15_t)0x5f55, (q15_t)0xc832, (q15_t)0x5f4a, (q15_t)0xc82b, (q15_t)0x5f3f, (q15_t)0xc825,
-    (q15_t)0x5f34, (q15_t)0xc81f, (q15_t)0x5f29, (q15_t)0xc819, (q15_t)0x5f1e, (q15_t)0xc813, (q15_t)0x5f13, (q15_t)0xc80d,
-    (q15_t)0x5f08, (q15_t)0xc807, (q15_t)0x5efd, (q15_t)0xc801, (q15_t)0x5ef2, (q15_t)0xc7fb, (q15_t)0x5ee7, (q15_t)0xc7f5,
-    (q15_t)0x5edc, (q15_t)0xc7ee, (q15_t)0x5ed1, (q15_t)0xc7e8, (q15_t)0x5ec6, (q15_t)0xc7e2, (q15_t)0x5ebb, (q15_t)0xc7dc,
-    (q15_t)0x5eb0, (q15_t)0xc7d6, (q15_t)0x5ea5, (q15_t)0xc7d0, (q15_t)0x5e9a, (q15_t)0xc7ca, (q15_t)0x5e8f, (q15_t)0xc7c4,
-    (q15_t)0x5e84, (q15_t)0xc7be, (q15_t)0x5e79, (q15_t)0xc7b8, (q15_t)0x5e6e, (q15_t)0xc7b2, (q15_t)0x5e63, (q15_t)0xc7ac,
-    (q15_t)0x5e58, (q15_t)0xc7a6, (q15_t)0x5e4d, (q15_t)0xc7a0, (q15_t)0x5e42, (q15_t)0xc79a, (q15_t)0x5e36, (q15_t)0xc795,
-    (q15_t)0x5e2b, (q15_t)0xc78f, (q15_t)0x5e20, (q15_t)0xc789, (q15_t)0x5e15, (q15_t)0xc783, (q15_t)0x5e0a, (q15_t)0xc77d,
-    (q15_t)0x5dff, (q15_t)0xc777, (q15_t)0x5df4, (q15_t)0xc771, (q15_t)0x5de9, (q15_t)0xc76b, (q15_t)0x5dde, (q15_t)0xc765,
-    (q15_t)0x5dd3, (q15_t)0xc75f, (q15_t)0x5dc7, (q15_t)0xc75a, (q15_t)0x5dbc, (q15_t)0xc754, (q15_t)0x5db1, (q15_t)0xc74e,
-    (q15_t)0x5da6, (q15_t)0xc748, (q15_t)0x5d9b, (q15_t)0xc742, (q15_t)0x5d90, (q15_t)0xc73d, (q15_t)0x5d85, (q15_t)0xc737,
-    (q15_t)0x5d79, (q15_t)0xc731, (q15_t)0x5d6e, (q15_t)0xc72b, (q15_t)0x5d63, (q15_t)0xc725, (q15_t)0x5d58, (q15_t)0xc720,
-    (q15_t)0x5d4d, (q15_t)0xc71a, (q15_t)0x5d42, (q15_t)0xc714, (q15_t)0x5d36, (q15_t)0xc70e, (q15_t)0x5d2b, (q15_t)0xc709,
-    (q15_t)0x5d20, (q15_t)0xc703, (q15_t)0x5d15, (q15_t)0xc6fd, (q15_t)0x5d0a, (q15_t)0xc6f7, (q15_t)0x5cff, (q15_t)0xc6f2,
-    (q15_t)0x5cf3, (q15_t)0xc6ec, (q15_t)0x5ce8, (q15_t)0xc6e6, (q15_t)0x5cdd, (q15_t)0xc6e1, (q15_t)0x5cd2, (q15_t)0xc6db,
-    (q15_t)0x5cc6, (q15_t)0xc6d5, (q15_t)0x5cbb, (q15_t)0xc6d0, (q15_t)0x5cb0, (q15_t)0xc6ca, (q15_t)0x5ca5, (q15_t)0xc6c5,
-    (q15_t)0x5c99, (q15_t)0xc6bf, (q15_t)0x5c8e, (q15_t)0xc6b9, (q15_t)0x5c83, (q15_t)0xc6b4, (q15_t)0x5c78, (q15_t)0xc6ae,
-    (q15_t)0x5c6c, (q15_t)0xc6a8, (q15_t)0x5c61, (q15_t)0xc6a3, (q15_t)0x5c56, (q15_t)0xc69d, (q15_t)0x5c4b, (q15_t)0xc698,
-    (q15_t)0x5c3f, (q15_t)0xc692, (q15_t)0x5c34, (q15_t)0xc68d, (q15_t)0x5c29, (q15_t)0xc687, (q15_t)0x5c1e, (q15_t)0xc682,
-    (q15_t)0x5c12, (q15_t)0xc67c, (q15_t)0x5c07, (q15_t)0xc677, (q15_t)0x5bfc, (q15_t)0xc671, (q15_t)0x5bf0, (q15_t)0xc66c,
-    (q15_t)0x5be5, (q15_t)0xc666, (q15_t)0x5bda, (q15_t)0xc661, (q15_t)0x5bce, (q15_t)0xc65b, (q15_t)0x5bc3, (q15_t)0xc656,
-    (q15_t)0x5bb8, (q15_t)0xc650, (q15_t)0x5bac, (q15_t)0xc64b, (q15_t)0x5ba1, (q15_t)0xc645, (q15_t)0x5b96, (q15_t)0xc640,
-    (q15_t)0x5b8a, (q15_t)0xc63b, (q15_t)0x5b7f, (q15_t)0xc635, (q15_t)0x5b74, (q15_t)0xc630, (q15_t)0x5b68, (q15_t)0xc62a,
-    (q15_t)0x5b5d, (q15_t)0xc625, (q15_t)0x5b52, (q15_t)0xc620, (q15_t)0x5b46, (q15_t)0xc61a, (q15_t)0x5b3b, (q15_t)0xc615,
-    (q15_t)0x5b30, (q15_t)0xc610, (q15_t)0x5b24, (q15_t)0xc60a, (q15_t)0x5b19, (q15_t)0xc605, (q15_t)0x5b0d, (q15_t)0xc600,
-    (q15_t)0x5b02, (q15_t)0xc5fa, (q15_t)0x5af7, (q15_t)0xc5f5, (q15_t)0x5aeb, (q15_t)0xc5f0, (q15_t)0x5ae0, (q15_t)0xc5ea,
-    (q15_t)0x5ad4, (q15_t)0xc5e5, (q15_t)0x5ac9, (q15_t)0xc5e0, (q15_t)0x5abe, (q15_t)0xc5db, (q15_t)0x5ab2, (q15_t)0xc5d5,
-    (q15_t)0x5aa7, (q15_t)0xc5d0, (q15_t)0x5a9b, (q15_t)0xc5cb, (q15_t)0x5a90, (q15_t)0xc5c6, (q15_t)0x5a84, (q15_t)0xc5c1,
-    (q15_t)0x5a79, (q15_t)0xc5bb, (q15_t)0x5a6e, (q15_t)0xc5b6, (q15_t)0x5a62, (q15_t)0xc5b1, (q15_t)0x5a57, (q15_t)0xc5ac,
-    (q15_t)0x5a4b, (q15_t)0xc5a7, (q15_t)0x5a40, (q15_t)0xc5a1, (q15_t)0x5a34, (q15_t)0xc59c, (q15_t)0x5a29, (q15_t)0xc597,
-    (q15_t)0x5a1d, (q15_t)0xc592, (q15_t)0x5a12, (q15_t)0xc58d, (q15_t)0x5a06, (q15_t)0xc588, (q15_t)0x59fb, (q15_t)0xc583,
-    (q15_t)0x59ef, (q15_t)0xc57e, (q15_t)0x59e4, (q15_t)0xc578, (q15_t)0x59d8, (q15_t)0xc573, (q15_t)0x59cd, (q15_t)0xc56e,
-    (q15_t)0x59c1, (q15_t)0xc569, (q15_t)0x59b6, (q15_t)0xc564, (q15_t)0x59aa, (q15_t)0xc55f, (q15_t)0x599f, (q15_t)0xc55a,
-    (q15_t)0x5993, (q15_t)0xc555, (q15_t)0x5988, (q15_t)0xc550, (q15_t)0x597c, (q15_t)0xc54b, (q15_t)0x5971, (q15_t)0xc546,
-    (q15_t)0x5965, (q15_t)0xc541, (q15_t)0x595a, (q15_t)0xc53c, (q15_t)0x594e, (q15_t)0xc537, (q15_t)0x5943, (q15_t)0xc532,
-    (q15_t)0x5937, (q15_t)0xc52d, (q15_t)0x592c, (q15_t)0xc528, (q15_t)0x5920, (q15_t)0xc523, (q15_t)0x5914, (q15_t)0xc51e,
-    (q15_t)0x5909, (q15_t)0xc51a, (q15_t)0x58fd, (q15_t)0xc515, (q15_t)0x58f2, (q15_t)0xc510, (q15_t)0x58e6, (q15_t)0xc50b,
-    (q15_t)0x58db, (q15_t)0xc506, (q15_t)0x58cf, (q15_t)0xc501, (q15_t)0x58c3, (q15_t)0xc4fc, (q15_t)0x58b8, (q15_t)0xc4f7,
-    (q15_t)0x58ac, (q15_t)0xc4f2, (q15_t)0x58a1, (q15_t)0xc4ee, (q15_t)0x5895, (q15_t)0xc4e9, (q15_t)0x5889, (q15_t)0xc4e4,
-    (q15_t)0x587e, (q15_t)0xc4df, (q15_t)0x5872, (q15_t)0xc4da, (q15_t)0x5867, (q15_t)0xc4d6, (q15_t)0x585b, (q15_t)0xc4d1,
-    (q15_t)0x584f, (q15_t)0xc4cc, (q15_t)0x5844, (q15_t)0xc4c7, (q15_t)0x5838, (q15_t)0xc4c2, (q15_t)0x582d, (q15_t)0xc4be,
-    (q15_t)0x5821, (q15_t)0xc4b9, (q15_t)0x5815, (q15_t)0xc4b4, (q15_t)0x580a, (q15_t)0xc4b0, (q15_t)0x57fe, (q15_t)0xc4ab,
-    (q15_t)0x57f2, (q15_t)0xc4a6, (q15_t)0x57e7, (q15_t)0xc4a1, (q15_t)0x57db, (q15_t)0xc49d, (q15_t)0x57cf, (q15_t)0xc498,
-    (q15_t)0x57c4, (q15_t)0xc493, (q15_t)0x57b8, (q15_t)0xc48f, (q15_t)0x57ac, (q15_t)0xc48a, (q15_t)0x57a1, (q15_t)0xc485,
-    (q15_t)0x5795, (q15_t)0xc481, (q15_t)0x5789, (q15_t)0xc47c, (q15_t)0x577e, (q15_t)0xc478, (q15_t)0x5772, (q15_t)0xc473,
-    (q15_t)0x5766, (q15_t)0xc46e, (q15_t)0x575b, (q15_t)0xc46a, (q15_t)0x574f, (q15_t)0xc465, (q15_t)0x5743, (q15_t)0xc461,
-    (q15_t)0x5737, (q15_t)0xc45c, (q15_t)0x572c, (q15_t)0xc457, (q15_t)0x5720, (q15_t)0xc453, (q15_t)0x5714, (q15_t)0xc44e,
-    (q15_t)0x5709, (q15_t)0xc44a, (q15_t)0x56fd, (q15_t)0xc445, (q15_t)0x56f1, (q15_t)0xc441, (q15_t)0x56e5, (q15_t)0xc43c,
-    (q15_t)0x56da, (q15_t)0xc438, (q15_t)0x56ce, (q15_t)0xc433, (q15_t)0x56c2, (q15_t)0xc42f, (q15_t)0x56b6, (q15_t)0xc42a,
-    (q15_t)0x56ab, (q15_t)0xc426, (q15_t)0x569f, (q15_t)0xc422, (q15_t)0x5693, (q15_t)0xc41d, (q15_t)0x5687, (q15_t)0xc419,
-    (q15_t)0x567c, (q15_t)0xc414, (q15_t)0x5670, (q15_t)0xc410, (q15_t)0x5664, (q15_t)0xc40b, (q15_t)0x5658, (q15_t)0xc407,
-    (q15_t)0x564c, (q15_t)0xc403, (q15_t)0x5641, (q15_t)0xc3fe, (q15_t)0x5635, (q15_t)0xc3fa, (q15_t)0x5629, (q15_t)0xc3f6,
-    (q15_t)0x561d, (q15_t)0xc3f1, (q15_t)0x5612, (q15_t)0xc3ed, (q15_t)0x5606, (q15_t)0xc3e9, (q15_t)0x55fa, (q15_t)0xc3e4,
-    (q15_t)0x55ee, (q15_t)0xc3e0, (q15_t)0x55e2, (q15_t)0xc3dc, (q15_t)0x55d7, (q15_t)0xc3d7, (q15_t)0x55cb, (q15_t)0xc3d3,
-    (q15_t)0x55bf, (q15_t)0xc3cf, (q15_t)0x55b3, (q15_t)0xc3ca, (q15_t)0x55a7, (q15_t)0xc3c6, (q15_t)0x559b, (q15_t)0xc3c2,
-    (q15_t)0x5590, (q15_t)0xc3be, (q15_t)0x5584, (q15_t)0xc3ba, (q15_t)0x5578, (q15_t)0xc3b5, (q15_t)0x556c, (q15_t)0xc3b1,
-    (q15_t)0x5560, (q15_t)0xc3ad, (q15_t)0x5554, (q15_t)0xc3a9, (q15_t)0x5549, (q15_t)0xc3a5, (q15_t)0x553d, (q15_t)0xc3a0,
-    (q15_t)0x5531, (q15_t)0xc39c, (q15_t)0x5525, (q15_t)0xc398, (q15_t)0x5519, (q15_t)0xc394, (q15_t)0x550d, (q15_t)0xc390,
-    (q15_t)0x5501, (q15_t)0xc38c, (q15_t)0x54f6, (q15_t)0xc387, (q15_t)0x54ea, (q15_t)0xc383, (q15_t)0x54de, (q15_t)0xc37f,
-    (q15_t)0x54d2, (q15_t)0xc37b, (q15_t)0x54c6, (q15_t)0xc377, (q15_t)0x54ba, (q15_t)0xc373, (q15_t)0x54ae, (q15_t)0xc36f,
-    (q15_t)0x54a2, (q15_t)0xc36b, (q15_t)0x5496, (q15_t)0xc367, (q15_t)0x548b, (q15_t)0xc363, (q15_t)0x547f, (q15_t)0xc35f,
-    (q15_t)0x5473, (q15_t)0xc35b, (q15_t)0x5467, (q15_t)0xc357, (q15_t)0x545b, (q15_t)0xc353, (q15_t)0x544f, (q15_t)0xc34f,
-    (q15_t)0x5443, (q15_t)0xc34b, (q15_t)0x5437, (q15_t)0xc347, (q15_t)0x542b, (q15_t)0xc343, (q15_t)0x541f, (q15_t)0xc33f,
-    (q15_t)0x5413, (q15_t)0xc33b, (q15_t)0x5407, (q15_t)0xc337, (q15_t)0x53fb, (q15_t)0xc333, (q15_t)0x53f0, (q15_t)0xc32f,
-    (q15_t)0x53e4, (q15_t)0xc32b, (q15_t)0x53d8, (q15_t)0xc327, (q15_t)0x53cc, (q15_t)0xc323, (q15_t)0x53c0, (q15_t)0xc320,
-    (q15_t)0x53b4, (q15_t)0xc31c, (q15_t)0x53a8, (q15_t)0xc318, (q15_t)0x539c, (q15_t)0xc314, (q15_t)0x5390, (q15_t)0xc310,
-    (q15_t)0x5384, (q15_t)0xc30c, (q15_t)0x5378, (q15_t)0xc308, (q15_t)0x536c, (q15_t)0xc305, (q15_t)0x5360, (q15_t)0xc301,
-    (q15_t)0x5354, (q15_t)0xc2fd, (q15_t)0x5348, (q15_t)0xc2f9, (q15_t)0x533c, (q15_t)0xc2f5, (q15_t)0x5330, (q15_t)0xc2f2,
-    (q15_t)0x5324, (q15_t)0xc2ee, (q15_t)0x5318, (q15_t)0xc2ea, (q15_t)0x530c, (q15_t)0xc2e6, (q15_t)0x5300, (q15_t)0xc2e3,
-    (q15_t)0x52f4, (q15_t)0xc2df, (q15_t)0x52e8, (q15_t)0xc2db, (q15_t)0x52dc, (q15_t)0xc2d8, (q15_t)0x52d0, (q15_t)0xc2d4,
-    (q15_t)0x52c4, (q15_t)0xc2d0, (q15_t)0x52b8, (q15_t)0xc2cc, (q15_t)0x52ac, (q15_t)0xc2c9, (q15_t)0x52a0, (q15_t)0xc2c5,
-    (q15_t)0x5294, (q15_t)0xc2c1, (q15_t)0x5288, (q15_t)0xc2be, (q15_t)0x527c, (q15_t)0xc2ba, (q15_t)0x5270, (q15_t)0xc2b7,
-    (q15_t)0x5264, (q15_t)0xc2b3, (q15_t)0x5258, (q15_t)0xc2af, (q15_t)0x524c, (q15_t)0xc2ac, (q15_t)0x5240, (q15_t)0xc2a8,
-    (q15_t)0x5234, (q15_t)0xc2a5, (q15_t)0x5228, (q15_t)0xc2a1, (q15_t)0x521c, (q15_t)0xc29d, (q15_t)0x5210, (q15_t)0xc29a,
-    (q15_t)0x5204, (q15_t)0xc296, (q15_t)0x51f7, (q15_t)0xc293, (q15_t)0x51eb, (q15_t)0xc28f, (q15_t)0x51df, (q15_t)0xc28c,
-    (q15_t)0x51d3, (q15_t)0xc288, (q15_t)0x51c7, (q15_t)0xc285, (q15_t)0x51bb, (q15_t)0xc281, (q15_t)0x51af, (q15_t)0xc27e,
-    (q15_t)0x51a3, (q15_t)0xc27a, (q15_t)0x5197, (q15_t)0xc277, (q15_t)0x518b, (q15_t)0xc273, (q15_t)0x517f, (q15_t)0xc270,
-    (q15_t)0x5173, (q15_t)0xc26d, (q15_t)0x5167, (q15_t)0xc269, (q15_t)0x515a, (q15_t)0xc266, (q15_t)0x514e, (q15_t)0xc262,
-    (q15_t)0x5142, (q15_t)0xc25f, (q15_t)0x5136, (q15_t)0xc25c, (q15_t)0x512a, (q15_t)0xc258, (q15_t)0x511e, (q15_t)0xc255,
-    (q15_t)0x5112, (q15_t)0xc251, (q15_t)0x5106, (q15_t)0xc24e, (q15_t)0x50fa, (q15_t)0xc24b, (q15_t)0x50ed, (q15_t)0xc247,
-    (q15_t)0x50e1, (q15_t)0xc244, (q15_t)0x50d5, (q15_t)0xc241, (q15_t)0x50c9, (q15_t)0xc23e, (q15_t)0x50bd, (q15_t)0xc23a,
-    (q15_t)0x50b1, (q15_t)0xc237, (q15_t)0x50a5, (q15_t)0xc234, (q15_t)0x5099, (q15_t)0xc230, (q15_t)0x508c, (q15_t)0xc22d,
-    (q15_t)0x5080, (q15_t)0xc22a, (q15_t)0x5074, (q15_t)0xc227, (q15_t)0x5068, (q15_t)0xc223, (q15_t)0x505c, (q15_t)0xc220,
-    (q15_t)0x5050, (q15_t)0xc21d, (q15_t)0x5044, (q15_t)0xc21a, (q15_t)0x5037, (q15_t)0xc217, (q15_t)0x502b, (q15_t)0xc213,
-    (q15_t)0x501f, (q15_t)0xc210, (q15_t)0x5013, (q15_t)0xc20d, (q15_t)0x5007, (q15_t)0xc20a, (q15_t)0x4ffb, (q15_t)0xc207,
-    (q15_t)0x4fee, (q15_t)0xc204, (q15_t)0x4fe2, (q15_t)0xc201, (q15_t)0x4fd6, (q15_t)0xc1fd, (q15_t)0x4fca, (q15_t)0xc1fa,
-    (q15_t)0x4fbe, (q15_t)0xc1f7, (q15_t)0x4fb2, (q15_t)0xc1f4, (q15_t)0x4fa5, (q15_t)0xc1f1, (q15_t)0x4f99, (q15_t)0xc1ee,
-    (q15_t)0x4f8d, (q15_t)0xc1eb, (q15_t)0x4f81, (q15_t)0xc1e8, (q15_t)0x4f75, (q15_t)0xc1e5, (q15_t)0x4f68, (q15_t)0xc1e2,
-    (q15_t)0x4f5c, (q15_t)0xc1df, (q15_t)0x4f50, (q15_t)0xc1dc, (q15_t)0x4f44, (q15_t)0xc1d9, (q15_t)0x4f38, (q15_t)0xc1d6,
-    (q15_t)0x4f2b, (q15_t)0xc1d3, (q15_t)0x4f1f, (q15_t)0xc1d0, (q15_t)0x4f13, (q15_t)0xc1cd, (q15_t)0x4f07, (q15_t)0xc1ca,
-    (q15_t)0x4efb, (q15_t)0xc1c7, (q15_t)0x4eee, (q15_t)0xc1c4, (q15_t)0x4ee2, (q15_t)0xc1c1, (q15_t)0x4ed6, (q15_t)0xc1be,
-    (q15_t)0x4eca, (q15_t)0xc1bb, (q15_t)0x4ebd, (q15_t)0xc1b8, (q15_t)0x4eb1, (q15_t)0xc1b6, (q15_t)0x4ea5, (q15_t)0xc1b3,
-    (q15_t)0x4e99, (q15_t)0xc1b0, (q15_t)0x4e8c, (q15_t)0xc1ad, (q15_t)0x4e80, (q15_t)0xc1aa, (q15_t)0x4e74, (q15_t)0xc1a7,
-    (q15_t)0x4e68, (q15_t)0xc1a4, (q15_t)0x4e5c, (q15_t)0xc1a2, (q15_t)0x4e4f, (q15_t)0xc19f, (q15_t)0x4e43, (q15_t)0xc19c,
-    (q15_t)0x4e37, (q15_t)0xc199, (q15_t)0x4e2b, (q15_t)0xc196, (q15_t)0x4e1e, (q15_t)0xc194, (q15_t)0x4e12, (q15_t)0xc191,
-    (q15_t)0x4e06, (q15_t)0xc18e, (q15_t)0x4df9, (q15_t)0xc18b, (q15_t)0x4ded, (q15_t)0xc189, (q15_t)0x4de1, (q15_t)0xc186,
-    (q15_t)0x4dd5, (q15_t)0xc183, (q15_t)0x4dc8, (q15_t)0xc180, (q15_t)0x4dbc, (q15_t)0xc17e, (q15_t)0x4db0, (q15_t)0xc17b,
-    (q15_t)0x4da4, (q15_t)0xc178, (q15_t)0x4d97, (q15_t)0xc176, (q15_t)0x4d8b, (q15_t)0xc173, (q15_t)0x4d7f, (q15_t)0xc170,
-    (q15_t)0x4d72, (q15_t)0xc16e, (q15_t)0x4d66, (q15_t)0xc16b, (q15_t)0x4d5a, (q15_t)0xc168, (q15_t)0x4d4e, (q15_t)0xc166,
-    (q15_t)0x4d41, (q15_t)0xc163, (q15_t)0x4d35, (q15_t)0xc161, (q15_t)0x4d29, (q15_t)0xc15e, (q15_t)0x4d1c, (q15_t)0xc15b,
-    (q15_t)0x4d10, (q15_t)0xc159, (q15_t)0x4d04, (q15_t)0xc156, (q15_t)0x4cf8, (q15_t)0xc154, (q15_t)0x4ceb, (q15_t)0xc151,
-    (q15_t)0x4cdf, (q15_t)0xc14f, (q15_t)0x4cd3, (q15_t)0xc14c, (q15_t)0x4cc6, (q15_t)0xc14a, (q15_t)0x4cba, (q15_t)0xc147,
-    (q15_t)0x4cae, (q15_t)0xc145, (q15_t)0x4ca1, (q15_t)0xc142, (q15_t)0x4c95, (q15_t)0xc140, (q15_t)0x4c89, (q15_t)0xc13d,
-    (q15_t)0x4c7c, (q15_t)0xc13b, (q15_t)0x4c70, (q15_t)0xc138, (q15_t)0x4c64, (q15_t)0xc136, (q15_t)0x4c57, (q15_t)0xc134,
-    (q15_t)0x4c4b, (q15_t)0xc131, (q15_t)0x4c3f, (q15_t)0xc12f, (q15_t)0x4c32, (q15_t)0xc12c, (q15_t)0x4c26, (q15_t)0xc12a,
-    (q15_t)0x4c1a, (q15_t)0xc128, (q15_t)0x4c0d, (q15_t)0xc125, (q15_t)0x4c01, (q15_t)0xc123, (q15_t)0x4bf5, (q15_t)0xc120,
-    (q15_t)0x4be8, (q15_t)0xc11e, (q15_t)0x4bdc, (q15_t)0xc11c, (q15_t)0x4bd0, (q15_t)0xc119, (q15_t)0x4bc3, (q15_t)0xc117,
-    (q15_t)0x4bb7, (q15_t)0xc115, (q15_t)0x4bab, (q15_t)0xc113, (q15_t)0x4b9e, (q15_t)0xc110, (q15_t)0x4b92, (q15_t)0xc10e,
-    (q15_t)0x4b85, (q15_t)0xc10c, (q15_t)0x4b79, (q15_t)0xc109, (q15_t)0x4b6d, (q15_t)0xc107, (q15_t)0x4b60, (q15_t)0xc105,
-    (q15_t)0x4b54, (q15_t)0xc103, (q15_t)0x4b48, (q15_t)0xc100, (q15_t)0x4b3b, (q15_t)0xc0fe, (q15_t)0x4b2f, (q15_t)0xc0fc,
-    (q15_t)0x4b23, (q15_t)0xc0fa, (q15_t)0x4b16, (q15_t)0xc0f8, (q15_t)0x4b0a, (q15_t)0xc0f6, (q15_t)0x4afd, (q15_t)0xc0f3,
-    (q15_t)0x4af1, (q15_t)0xc0f1, (q15_t)0x4ae5, (q15_t)0xc0ef, (q15_t)0x4ad8, (q15_t)0xc0ed, (q15_t)0x4acc, (q15_t)0xc0eb,
-    (q15_t)0x4ac0, (q15_t)0xc0e9, (q15_t)0x4ab3, (q15_t)0xc0e7, (q15_t)0x4aa7, (q15_t)0xc0e4, (q15_t)0x4a9a, (q15_t)0xc0e2,
-    (q15_t)0x4a8e, (q15_t)0xc0e0, (q15_t)0x4a82, (q15_t)0xc0de, (q15_t)0x4a75, (q15_t)0xc0dc, (q15_t)0x4a69, (q15_t)0xc0da,
-    (q15_t)0x4a5c, (q15_t)0xc0d8, (q15_t)0x4a50, (q15_t)0xc0d6, (q15_t)0x4a44, (q15_t)0xc0d4, (q15_t)0x4a37, (q15_t)0xc0d2,
-    (q15_t)0x4a2b, (q15_t)0xc0d0, (q15_t)0x4a1e, (q15_t)0xc0ce, (q15_t)0x4a12, (q15_t)0xc0cc, (q15_t)0x4a06, (q15_t)0xc0ca,
-    (q15_t)0x49f9, (q15_t)0xc0c8, (q15_t)0x49ed, (q15_t)0xc0c6, (q15_t)0x49e0, (q15_t)0xc0c4, (q15_t)0x49d4, (q15_t)0xc0c2,
-    (q15_t)0x49c7, (q15_t)0xc0c0, (q15_t)0x49bb, (q15_t)0xc0be, (q15_t)0x49af, (q15_t)0xc0bd, (q15_t)0x49a2, (q15_t)0xc0bb,
-    (q15_t)0x4996, (q15_t)0xc0b9, (q15_t)0x4989, (q15_t)0xc0b7, (q15_t)0x497d, (q15_t)0xc0b5, (q15_t)0x4970, (q15_t)0xc0b3,
-    (q15_t)0x4964, (q15_t)0xc0b1, (q15_t)0x4958, (q15_t)0xc0af, (q15_t)0x494b, (q15_t)0xc0ae, (q15_t)0x493f, (q15_t)0xc0ac,
-    (q15_t)0x4932, (q15_t)0xc0aa, (q15_t)0x4926, (q15_t)0xc0a8, (q15_t)0x4919, (q15_t)0xc0a6, (q15_t)0x490d, (q15_t)0xc0a5,
-    (q15_t)0x4901, (q15_t)0xc0a3, (q15_t)0x48f4, (q15_t)0xc0a1, (q15_t)0x48e8, (q15_t)0xc09f, (q15_t)0x48db, (q15_t)0xc09e,
-    (q15_t)0x48cf, (q15_t)0xc09c, (q15_t)0x48c2, (q15_t)0xc09a, (q15_t)0x48b6, (q15_t)0xc098, (q15_t)0x48a9, (q15_t)0xc097,
-    (q15_t)0x489d, (q15_t)0xc095, (q15_t)0x4891, (q15_t)0xc093, (q15_t)0x4884, (q15_t)0xc092, (q15_t)0x4878, (q15_t)0xc090,
-    (q15_t)0x486b, (q15_t)0xc08e, (q15_t)0x485f, (q15_t)0xc08d, (q15_t)0x4852, (q15_t)0xc08b, (q15_t)0x4846, (q15_t)0xc089,
-    (q15_t)0x4839, (q15_t)0xc088, (q15_t)0x482d, (q15_t)0xc086, (q15_t)0x4820, (q15_t)0xc085, (q15_t)0x4814, (q15_t)0xc083,
-    (q15_t)0x4807, (q15_t)0xc081, (q15_t)0x47fb, (q15_t)0xc080, (q15_t)0x47ef, (q15_t)0xc07e, (q15_t)0x47e2, (q15_t)0xc07d,
-    (q15_t)0x47d6, (q15_t)0xc07b, (q15_t)0x47c9, (q15_t)0xc07a, (q15_t)0x47bd, (q15_t)0xc078, (q15_t)0x47b0, (q15_t)0xc077,
-    (q15_t)0x47a4, (q15_t)0xc075, (q15_t)0x4797, (q15_t)0xc074, (q15_t)0x478b, (q15_t)0xc072, (q15_t)0x477e, (q15_t)0xc071,
-    (q15_t)0x4772, (q15_t)0xc06f, (q15_t)0x4765, (q15_t)0xc06e, (q15_t)0x4759, (q15_t)0xc06c, (q15_t)0x474c, (q15_t)0xc06b,
-    (q15_t)0x4740, (q15_t)0xc069, (q15_t)0x4733, (q15_t)0xc068, (q15_t)0x4727, (q15_t)0xc067, (q15_t)0x471a, (q15_t)0xc065,
-    (q15_t)0x470e, (q15_t)0xc064, (q15_t)0x4701, (q15_t)0xc062, (q15_t)0x46f5, (q15_t)0xc061, (q15_t)0x46e8, (q15_t)0xc060,
-    (q15_t)0x46dc, (q15_t)0xc05e, (q15_t)0x46cf, (q15_t)0xc05d, (q15_t)0x46c3, (q15_t)0xc05c, (q15_t)0x46b6, (q15_t)0xc05a,
-    (q15_t)0x46aa, (q15_t)0xc059, (q15_t)0x469d, (q15_t)0xc058, (q15_t)0x4691, (q15_t)0xc056, (q15_t)0x4684, (q15_t)0xc055,
-    (q15_t)0x4678, (q15_t)0xc054, (q15_t)0x466b, (q15_t)0xc053, (q15_t)0x465f, (q15_t)0xc051, (q15_t)0x4652, (q15_t)0xc050,
-    (q15_t)0x4646, (q15_t)0xc04f, (q15_t)0x4639, (q15_t)0xc04e, (q15_t)0x462d, (q15_t)0xc04c, (q15_t)0x4620, (q15_t)0xc04b,
-    (q15_t)0x4614, (q15_t)0xc04a, (q15_t)0x4607, (q15_t)0xc049, (q15_t)0x45fb, (q15_t)0xc048, (q15_t)0x45ee, (q15_t)0xc047,
-    (q15_t)0x45e2, (q15_t)0xc045, (q15_t)0x45d5, (q15_t)0xc044, (q15_t)0x45c9, (q15_t)0xc043, (q15_t)0x45bc, (q15_t)0xc042,
-    (q15_t)0x45b0, (q15_t)0xc041, (q15_t)0x45a3, (q15_t)0xc040, (q15_t)0x4597, (q15_t)0xc03f, (q15_t)0x458a, (q15_t)0xc03d,
-    (q15_t)0x457e, (q15_t)0xc03c, (q15_t)0x4571, (q15_t)0xc03b, (q15_t)0x4565, (q15_t)0xc03a, (q15_t)0x4558, (q15_t)0xc039,
-    (q15_t)0x454c, (q15_t)0xc038, (q15_t)0x453f, (q15_t)0xc037, (q15_t)0x4533, (q15_t)0xc036, (q15_t)0x4526, (q15_t)0xc035,
-    (q15_t)0x451a, (q15_t)0xc034, (q15_t)0x450d, (q15_t)0xc033, (q15_t)0x4500, (q15_t)0xc032, (q15_t)0x44f4, (q15_t)0xc031,
-    (q15_t)0x44e7, (q15_t)0xc030, (q15_t)0x44db, (q15_t)0xc02f, (q15_t)0x44ce, (q15_t)0xc02e, (q15_t)0x44c2, (q15_t)0xc02d,
-    (q15_t)0x44b5, (q15_t)0xc02c, (q15_t)0x44a9, (q15_t)0xc02b, (q15_t)0x449c, (q15_t)0xc02b, (q15_t)0x4490, (q15_t)0xc02a,
-    (q15_t)0x4483, (q15_t)0xc029, (q15_t)0x4477, (q15_t)0xc028, (q15_t)0x446a, (q15_t)0xc027, (q15_t)0x445e, (q15_t)0xc026,
-    (q15_t)0x4451, (q15_t)0xc025, (q15_t)0x4444, (q15_t)0xc024, (q15_t)0x4438, (q15_t)0xc024, (q15_t)0x442b, (q15_t)0xc023,
-    (q15_t)0x441f, (q15_t)0xc022, (q15_t)0x4412, (q15_t)0xc021, (q15_t)0x4406, (q15_t)0xc020, (q15_t)0x43f9, (q15_t)0xc020,
-    (q15_t)0x43ed, (q15_t)0xc01f, (q15_t)0x43e0, (q15_t)0xc01e, (q15_t)0x43d4, (q15_t)0xc01d, (q15_t)0x43c7, (q15_t)0xc01d,
-    (q15_t)0x43bb, (q15_t)0xc01c, (q15_t)0x43ae, (q15_t)0xc01b, (q15_t)0x43a1, (q15_t)0xc01a, (q15_t)0x4395, (q15_t)0xc01a,
-    (q15_t)0x4388, (q15_t)0xc019, (q15_t)0x437c, (q15_t)0xc018, (q15_t)0x436f, (q15_t)0xc018, (q15_t)0x4363, (q15_t)0xc017,
-    (q15_t)0x4356, (q15_t)0xc016, (q15_t)0x434a, (q15_t)0xc016, (q15_t)0x433d, (q15_t)0xc015, (q15_t)0x4330, (q15_t)0xc014,
-    (q15_t)0x4324, (q15_t)0xc014, (q15_t)0x4317, (q15_t)0xc013, (q15_t)0x430b, (q15_t)0xc013, (q15_t)0x42fe, (q15_t)0xc012,
-    (q15_t)0x42f2, (q15_t)0xc011, (q15_t)0x42e5, (q15_t)0xc011, (q15_t)0x42d9, (q15_t)0xc010, (q15_t)0x42cc, (q15_t)0xc010,
-    (q15_t)0x42c0, (q15_t)0xc00f, (q15_t)0x42b3, (q15_t)0xc00f, (q15_t)0x42a6, (q15_t)0xc00e, (q15_t)0x429a, (q15_t)0xc00e,
-    (q15_t)0x428d, (q15_t)0xc00d, (q15_t)0x4281, (q15_t)0xc00d, (q15_t)0x4274, (q15_t)0xc00c, (q15_t)0x4268, (q15_t)0xc00c,
-    (q15_t)0x425b, (q15_t)0xc00b, (q15_t)0x424e, (q15_t)0xc00b, (q15_t)0x4242, (q15_t)0xc00a, (q15_t)0x4235, (q15_t)0xc00a,
-    (q15_t)0x4229, (q15_t)0xc009, (q15_t)0x421c, (q15_t)0xc009, (q15_t)0x4210, (q15_t)0xc009, (q15_t)0x4203, (q15_t)0xc008,
-    (q15_t)0x41f7, (q15_t)0xc008, (q15_t)0x41ea, (q15_t)0xc007, (q15_t)0x41dd, (q15_t)0xc007, (q15_t)0x41d1, (q15_t)0xc007,
-    (q15_t)0x41c4, (q15_t)0xc006, (q15_t)0x41b8, (q15_t)0xc006, (q15_t)0x41ab, (q15_t)0xc006, (q15_t)0x419f, (q15_t)0xc005,
-    (q15_t)0x4192, (q15_t)0xc005, (q15_t)0x4186, (q15_t)0xc005, (q15_t)0x4179, (q15_t)0xc004, (q15_t)0x416c, (q15_t)0xc004,
-    (q15_t)0x4160, (q15_t)0xc004, (q15_t)0x4153, (q15_t)0xc004, (q15_t)0x4147, (q15_t)0xc003, (q15_t)0x413a, (q15_t)0xc003,
-    (q15_t)0x412e, (q15_t)0xc003, (q15_t)0x4121, (q15_t)0xc003, (q15_t)0x4114, (q15_t)0xc002, (q15_t)0x4108, (q15_t)0xc002,
-    (q15_t)0x40fb, (q15_t)0xc002, (q15_t)0x40ef, (q15_t)0xc002, (q15_t)0x40e2, (q15_t)0xc002, (q15_t)0x40d6, (q15_t)0xc001,
-    (q15_t)0x40c9, (q15_t)0xc001, (q15_t)0x40bc, (q15_t)0xc001, (q15_t)0x40b0, (q15_t)0xc001, (q15_t)0x40a3, (q15_t)0xc001,
-    (q15_t)0x4097, (q15_t)0xc001, (q15_t)0x408a, (q15_t)0xc001, (q15_t)0x407e, (q15_t)0xc000, (q15_t)0x4071, (q15_t)0xc000,
-    (q15_t)0x4065, (q15_t)0xc000, (q15_t)0x4058, (q15_t)0xc000, (q15_t)0x404b, (q15_t)0xc000, (q15_t)0x403f, (q15_t)0xc000,
-    (q15_t)0x4032, (q15_t)0xc000, (q15_t)0x4026, (q15_t)0xc000, (q15_t)0x4019, (q15_t)0xc000, (q15_t)0x400d, (q15_t)0xc000,
-};
-
-#endif
-/**
-  @} end of RealFFT_Table group
- */
-
-/**
-  @ingroup DCT4_IDCT4
- */
-
-/**
-  @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
-  @{
- */
-
-/**
-  @brief  Weights Table
- */
-
-/**
-  @par
-  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
-  @par
-  C command to generate the table
-  <pre>
-  for(i = 0; i< N; i++)
-  {
-    weights[(2*i)]   =  cos (i*c);
-    weights[(2*i)+1] = -sin (i*c);
-  } </pre>
-  @par
-  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
-  @par
-  In the tables below the real and imaginary values are placed alternatively, hence the
-  array length is <code>2*N</code>.
- */
-
-
-/**
-  @par
-  cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
-  @par
-  C command to generate the table
-  @par
-  <pre> for(i = 0; i< N; i++)
-  {
-     cos_factors[i]= 2 * cos((2*i+1)*c/2);
-  } </pre>
-  @par
-  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-*/
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
-    const float32_t Weights_128[256] = {
-  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,  -0.012271538285719925f,
-  0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f, -0.036807222941358832f,
-  0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f, -0.061320736302208578f,
-  0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f, -0.085797312344439894f,
-  0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f, -0.110222207293883060f,
-  0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f, -0.134580708507126170f,
-  0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f, -0.158858143333861450f,
-  0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f, -0.183039887955140950f,
-  0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f, -0.207111376192218560f,
-  0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f, -0.231058108280671110f,
-  0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f, -0.254865659604514570f,
-  0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f, -0.278519689385053060f,
-  0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f, -0.302005949319228080f,
-  0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f, -0.325310292162262930f,
-  0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f, -0.348418680249434560f,
-  0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f, -0.371317193951837540f,
-  0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f, -0.393992040061048100f,
-  0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f, -0.416429560097637150f,
-  0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f, -0.438616238538527660f,
-  0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f, -0.460538710958240010f,
-  0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f, -0.482183772079122720f,
-  0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f, -0.503538383725717580f,
-  0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f, -0.524589682678468950f,
-  0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f, -0.545324988422046460f,
-  0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f, -0.565731810783613120f,
-  0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f, -0.585797857456438860f,
-  0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f, -0.605511041404325550f,
-  0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f, -0.624859488142386340f,
-  0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f, -0.643831542889791390f,
-  0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f, -0.662415777590171780f,
-  0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f, -0.680600997795453020f,
-  0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f, -0.698376249408972920f,
-  0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f, -0.715730825283818590f,
-  0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f, -0.732654271672412820f,
-  0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f, -0.749136394523459260f,
-  0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f, -0.765167265622458960f,
-  0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f, -0.780737228572094380f,
-  0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f, -0.795836904608883460f,
-  0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f, -0.810457198252594770f,
-  0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f, -0.824589302785025290f,
-  0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f, -0.838224705554837970f,
-  0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f, -0.851355193105265200f,
-  0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f, -0.863972856121586700f,
-  0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f, -0.876070094195406600f,
-  0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f, -0.887639620402853930f,
-  0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f, -0.898674465693953820f,
-  0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f, -0.909167983090522270f,
-  0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f, -0.919113851690057770f,
-  0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f, -0.928506080473215480f,
-  0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f, -0.937339011912574960f,
-  0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f, -0.945607325380521280f,
-  0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f, -0.953306040354193750f,
-  0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f, -0.960430519415565790f,
-  0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f, -0.966976471044852070f,
-  0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f, -0.972939952205560070f,
-  0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f, -0.978317370719627650f,
-  0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f, -0.983105487431216290f,
-  0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f, -0.987301418157858430f,
-  0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f, -0.990902635427780010f,
-  0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f, -0.993906970002356060f,
-  0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f, -0.996312612182778000f,
-  0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f, -0.998118112900149180f,
-  0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f, -0.999322384588349540f,
-  0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f, -0.999924701839144500f
-};
-
-    const float32_t cos_factors_128[128] = {
-  0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,
-  0.999077727752645360f,
-  0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f,
-  0.995767414467659820f,
-  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
-  0.990058210262297120f,
-  0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,
-  0.981963869109555240f,
-  0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f,
-  0.971503890986251780f,
-  0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f,
-  0.958703474895871600f,
-  0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,
-  0.943593458161960390f,
-  0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f,
-  0.926210242138311380f,
-  0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f,
-  0.906595704514915330f,
-  0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,
-  0.884797098430937790f,
-  0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f,
-  0.860866938637767310f,
-  0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f,
-  0.834862874986380010f,
-  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
-  0.806847553543799330f,
-  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
-  0.776888465673232440f,
-  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
-  0.745057785441466060f,
-  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
-  0.711432195745216430f,
-  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
-  0.676092703575316030f,
-  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
-  0.639124444863775730f,
-  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
-  0.600616479383868970f,
-  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
-  0.560661576197336030f,
-  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
-  0.519355990165589530f,
-  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
-  0.476799230063322250f,
-  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
-  0.433093818853152010f,
-  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
-  0.388345046698826300f,
-  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
-  0.342660717311994380f,
-  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
-  0.296150888243623960f,
-  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
-  0.248927605745720260f,
-  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
-  0.201104634842091960f,
-  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
-  0.152797185258443410f,
-  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
-  0.104121633872054730f,
-  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
-  0.055195244349690031f,
-  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
-  0.006135884649154515f
-};
-
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
-    const float32_t Weights_512[1024] = {
-  1.000000000000000000f,  0.000000000000000000f, 0.999995293809576190f, -0.003067956762965976f,
-  0.999981175282601110f, -0.006135884649154475f, 0.999957644551963900f, -0.009203754782059819f,
-  0.999924701839144500f, -0.012271538285719925f, 0.999882347454212560f, -0.015339206284988100f,
-  0.999830581795823400f, -0.018406729905804820f, 0.999769405351215280f, -0.021474080275469508f,
-  0.999698818696204250f, -0.024541228522912288f, 0.999618822495178640f, -0.027608145778965740f,
-  0.999529417501093140f, -0.030674803176636626f, 0.999430604555461730f, -0.033741171851377580f,
-  0.999322384588349540f, -0.036807222941358832f, 0.999204758618363890f, -0.039872927587739811f,
-  0.999077727752645360f, -0.042938256934940820f, 0.998941293186856870f, -0.046003182130914623f,
-  0.998795456205172410f, -0.049067674327418015f, 0.998640218180265270f, -0.052131704680283324f,
-  0.998475580573294770f, -0.055195244349689934f, 0.998301544933892890f, -0.058258264500435752f,
-  0.998118112900149180f, -0.061320736302208578f, 0.997925286198596000f, -0.064382630929857465f,
-  0.997723066644191640f, -0.067443919563664051f, 0.997511456140303450f, -0.070504573389613856f,
-  0.997290456678690210f, -0.073564563599667426f, 0.997060070339482960f, -0.076623861392031492f,
-  0.996820299291165670f, -0.079682437971430126f, 0.996571145790554840f, -0.082740264549375692f,
-  0.996312612182778000f, -0.085797312344439894f, 0.996044700901251970f, -0.088853552582524600f,
-  0.995767414467659820f, -0.091908956497132724f, 0.995480755491926940f, -0.094963495329638992f,
-  0.995184726672196930f, -0.098017140329560604f, 0.994879330794805620f, -0.101069862754827820f,
-  0.994564570734255420f, -0.104121633872054590f, 0.994240449453187900f, -0.107172424956808840f,
-  0.993906970002356060f, -0.110222207293883060f, 0.993564135520595300f, -0.113270952177564350f,
-  0.993211949234794500f, -0.116318630911904750f, 0.992850414459865100f, -0.119365214810991350f,
-  0.992479534598709970f, -0.122410675199216200f, 0.992099313142191800f, -0.125454983411546230f,
-  0.991709753669099530f, -0.128498110793793170f, 0.991310859846115440f, -0.131540028702883120f,
-  0.990902635427780010f, -0.134580708507126170f, 0.990485084256457090f, -0.137620121586486040f,
-  0.990058210262297120f, -0.140658239332849210f, 0.989622017463200890f, -0.143695033150294470f,
-  0.989176509964781010f, -0.146730474455361750f, 0.988721691960323780f, -0.149764534677321510f,
-  0.988257567730749460f, -0.152797185258443440f, 0.987784141644572180f, -0.155828397654265230f,
-  0.987301418157858430f, -0.158858143333861450f, 0.986809401814185530f, -0.161886393780111830f,
-  0.986308097244598670f, -0.164913120489969890f, 0.985797509167567480f, -0.167938294974731170f,
-  0.985277642388941220f, -0.170961888760301220f, 0.984748501801904210f, -0.173983873387463820f,
-  0.984210092386929030f, -0.177004220412148750f, 0.983662419211730250f, -0.180022901405699510f,
-  0.983105487431216290f, -0.183039887955140950f, 0.982539302287441240f, -0.186055151663446630f,
-  0.981963869109555240f, -0.189068664149806190f, 0.981379193313754560f, -0.192080397049892440f,
-  0.980785280403230430f, -0.195090322016128250f, 0.980182135968117430f, -0.198098410717953560f,
-  0.979569765685440520f, -0.201104634842091900f, 0.978948175319062200f, -0.204108966092816870f,
-  0.978317370719627650f, -0.207111376192218560f, 0.977677357824509930f, -0.210111836880469610f,
-  0.977028142657754390f, -0.213110319916091360f, 0.976369731330021140f, -0.216106797076219520f,
-  0.975702130038528570f, -0.219101240156869800f, 0.975025345066994120f, -0.222093620973203510f,
-  0.974339382785575860f, -0.225083911359792830f, 0.973644249650811980f, -0.228072083170885730f,
-  0.972939952205560180f, -0.231058108280671110f, 0.972226497078936270f, -0.234041958583543430f,
-  0.971503890986251780f, -0.237023605994367200f, 0.970772140728950350f, -0.240003022448741500f,
-  0.970031253194543970f, -0.242980179903263870f, 0.969281235356548530f, -0.245955050335794590f,
-  0.968522094274417380f, -0.248927605745720150f, 0.967753837093475510f, -0.251897818154216970f,
-  0.966976471044852070f, -0.254865659604514570f, 0.966190003445412500f, -0.257831102162158990f,
-  0.965394441697689400f, -0.260794117915275510f, 0.964589793289812760f, -0.263754678974831350f,
-  0.963776065795439840f, -0.266712757474898370f, 0.962953266873683880f, -0.269668325572915090f,
-  0.962121404269041580f, -0.272621355449948980f, 0.961280485811320640f, -0.275571819310958140f,
-  0.960430519415565790f, -0.278519689385053060f, 0.959571513081984520f, -0.281464937925757940f,
-  0.958703474895871600f, -0.284407537211271880f, 0.957826413027532910f, -0.287347459544729510f,
-  0.956940335732208820f, -0.290284677254462330f, 0.956045251349996410f, -0.293219162694258630f,
-  0.955141168305770780f, -0.296150888243623790f, 0.954228095109105670f, -0.299079826308040480f,
-  0.953306040354193860f, -0.302005949319228080f, 0.952375012719765880f, -0.304929229735402370f,
-  0.951435020969008340f, -0.307849640041534870f, 0.950486073949481700f, -0.310767152749611470f,
-  0.949528180593036670f, -0.313681740398891520f, 0.948561349915730270f, -0.316593375556165850f,
-  0.947585591017741090f, -0.319502030816015690f, 0.946600913083283530f, -0.322407678801069850f,
-  0.945607325380521280f, -0.325310292162262930f, 0.944604837261480260f, -0.328209843579092500f,
-  0.943593458161960390f, -0.331106305759876430f, 0.942573197601446870f, -0.333999651442009380f,
-  0.941544065183020810f, -0.336889853392220050f, 0.940506070593268300f, -0.339776884406826850f,
-  0.939459223602189920f, -0.342660717311994380f, 0.938403534063108060f, -0.345541324963989090f,
-  0.937339011912574960f, -0.348418680249434560f, 0.936265667170278260f, -0.351292756085567090f,
-  0.935183509938947610f, -0.354163525420490340f, 0.934092550404258980f, -0.357030961233429980f,
-  0.932992798834738960f, -0.359895036534988110f, 0.931884265581668150f, -0.362755724367397230f,
-  0.930766961078983710f, -0.365612997804773850f, 0.929640895843181330f, -0.368466829953372320f,
-  0.928506080473215590f, -0.371317193951837540f, 0.927362525650401110f, -0.374164062971457930f,
-  0.926210242138311380f, -0.377007410216418260f, 0.925049240782677580f, -0.379847208924051160f,
-  0.923879532511286740f, -0.382683432365089780f, 0.922701128333878630f, -0.385516053843918850f,
-  0.921514039342042010f, -0.388345046698826250f, 0.920318276709110590f, -0.391170384302253870f,
-  0.919113851690057770f, -0.393992040061048100f, 0.917900775621390500f, -0.396809987416710310f,
-  0.916679059921042700f, -0.399624199845646790f, 0.915448716088267830f, -0.402434650859418430f,
-  0.914209755703530690f, -0.405241314004989860f, 0.912962190428398210f, -0.408044162864978690f,
-  0.911706032005429880f, -0.410843171057903910f, 0.910441292258067250f, -0.413638312238434500f,
-  0.909167983090522380f, -0.416429560097637150f, 0.907886116487666260f, -0.419216888363223910f,
-  0.906595704514915330f, -0.422000270799799680f, 0.905296759318118820f, -0.424779681209108810f,
-  0.903989293123443340f, -0.427555093430282080f, 0.902673318237258830f, -0.430326481340082610f,
-  0.901348847046022030f, -0.433093818853151960f, 0.900015892016160280f, -0.435857079922255470f,
-  0.898674465693953820f, -0.438616238538527660f, 0.897324580705418320f, -0.441371268731716670f,
-  0.895966249756185220f, -0.444122144570429200f, 0.894599485631382700f, -0.446868840162374160f,
-  0.893224301195515320f, -0.449611329654606540f, 0.891840709392342720f, -0.452349587233770890f,
-  0.890448723244757880f, -0.455083587126343840f, 0.889048355854664570f, -0.457813303598877170f,
-  0.887639620402853930f, -0.460538710958240010f, 0.886222530148880640f, -0.463259783551860150f,
-  0.884797098430937790f, -0.465976495767966180f, 0.883363338665731580f, -0.468688822035827900f,
-  0.881921264348355050f, -0.471396736825997640f, 0.880470889052160750f, -0.474100214650549970f,
-  0.879012226428633530f, -0.476799230063322090f, 0.877545290207261350f, -0.479493757660153010f,
-  0.876070094195406600f, -0.482183772079122720f, 0.874586652278176110f, -0.484869248000791060f,
-  0.873094978418290090f, -0.487550160148436000f, 0.871595086655950980f, -0.490226483288291160f,
-  0.870086991108711460f, -0.492898192229784040f, 0.868570705971340900f, -0.495565261825772540f,
-  0.867046245515692650f, -0.498227666972781870f, 0.865513624090569090f, -0.500885382611240710f,
-  0.863972856121586810f, -0.503538383725717580f, 0.862423956111040610f, -0.506186645345155230f,
-  0.860866938637767310f, -0.508830142543106990f, 0.859301818357008470f, -0.511468850437970300f,
-  0.857728610000272120f, -0.514102744193221660f, 0.856147328375194470f, -0.516731799017649870f,
-  0.854557988365400530f, -0.519355990165589640f, 0.852960604930363630f, -0.521975292937154390f,
-  0.851355193105265200f, -0.524589682678468950f, 0.849741768000852550f, -0.527199134781901280f,
-  0.848120344803297230f, -0.529803624686294610f, 0.846490938774052130f, -0.532403127877197900f,
-  0.844853565249707120f, -0.534997619887097150f, 0.843208239641845440f, -0.537587076295645390f,
-  0.841554977436898440f, -0.540171472729892850f, 0.839893794195999520f, -0.542750784864515890f,
-  0.838224705554838080f, -0.545324988422046460f, 0.836547727223512010f, -0.547894059173100190f,
-  0.834862874986380010f, -0.550457972936604810f, 0.833170164701913190f, -0.553016705580027470f,
-  0.831469612302545240f, -0.555570233019602180f, 0.829761233794523050f, -0.558118531220556100f,
-  0.828045045257755800f, -0.560661576197336030f, 0.826321062845663530f, -0.563199344013834090f,
-  0.824589302785025290f, -0.565731810783613120f, 0.822849781375826430f, -0.568258952670131490f,
-  0.821102514991104650f, -0.570780745886967260f, 0.819347520076796900f, -0.573297166698042200f,
-  0.817584813151583710f, -0.575808191417845340f, 0.815814410806733780f, -0.578313796411655590f,
-  0.814036329705948410f, -0.580813958095764530f, 0.812250586585203880f, -0.583308652937698290f,
-  0.810457198252594770f, -0.585797857456438860f, 0.808656181588174980f, -0.588281548222645220f,
-  0.806847553543799330f, -0.590759701858874160f, 0.805031331142963660f, -0.593232295039799800f,
-  0.803207531480644940f, -0.595699304492433360f, 0.801376171723140240f, -0.598160706996342270f,
-  0.799537269107905010f, -0.600616479383868970f, 0.797690840943391160f, -0.603066598540348160f,
-  0.795836904608883570f, -0.605511041404325550f, 0.793975477554337170f, -0.607949784967773630f,
-  0.792106577300212390f, -0.610382806276309480f, 0.790230221437310030f, -0.612810082429409710f,
-  0.788346427626606340f, -0.615231590580626820f, 0.786455213599085770f, -0.617647307937803870f,
-  0.784556597155575240f, -0.620057211763289100f, 0.782650596166575730f, -0.622461279374149970f,
-  0.780737228572094490f, -0.624859488142386340f, 0.778816512381475980f, -0.627251815495144080f,
-  0.776888465673232440f, -0.629638238914926980f, 0.774953106594873930f, -0.632018735939809060f,
-  0.773010453362736990f, -0.634393284163645490f, 0.771060524261813820f, -0.636761861236284200f,
-  0.769103337645579700f, -0.639124444863775730f, 0.767138911935820400f, -0.641481012808583160f,
-  0.765167265622458960f, -0.643831542889791390f, 0.763188417263381270f, -0.646176012983316280f,
-  0.761202385484261780f, -0.648514401022112440f, 0.759209188978388070f, -0.650846684996380880f,
-  0.757208846506484570f, -0.653172842953776760f, 0.755201376896536550f, -0.655492852999615350f,
-  0.753186799043612520f, -0.657806693297078640f, 0.751165131909686480f, -0.660114342067420480f,
-  0.749136394523459370f, -0.662415777590171780f, 0.747100605980180130f, -0.664710978203344790f,
-  0.745057785441466060f, -0.666999922303637470f, 0.743007952135121720f, -0.669282588346636010f,
-  0.740951125354959110f, -0.671558954847018330f, 0.738887324460615110f, -0.673829000378756040f,
-  0.736816568877369900f, -0.676092703575315920f, 0.734738878095963500f, -0.678350043129861470f,
-  0.732654271672412820f, -0.680600997795453020f, 0.730562769227827590f, -0.682845546385248080f,
-  0.728464390448225200f, -0.685083667772700360f, 0.726359155084346010f, -0.687315340891759050f,
-  0.724247082951467000f, -0.689540544737066830f, 0.722128193929215350f, -0.691759258364157750f,
-  0.720002507961381650f, -0.693971460889654000f, 0.717870045055731710f, -0.696177131491462990f,
-  0.715730825283818590f, -0.698376249408972920f, 0.713584868780793640f, -0.700568793943248340f,
-  0.711432195745216430f, -0.702754744457225300f, 0.709272826438865690f, -0.704934080375904880f,
-  0.707106781186547570f, -0.707106781186547460f, 0.704934080375904990f, -0.709272826438865580f,
-  0.702754744457225300f, -0.711432195745216430f, 0.700568793943248450f, -0.713584868780793520f,
-  0.698376249408972920f, -0.715730825283818590f, 0.696177131491462990f, -0.717870045055731710f,
-  0.693971460889654000f, -0.720002507961381650f, 0.691759258364157750f, -0.722128193929215350f,
-  0.689540544737066940f, -0.724247082951466890f, 0.687315340891759160f, -0.726359155084346010f,
-  0.685083667772700360f, -0.728464390448225200f, 0.682845546385248080f, -0.730562769227827590f,
-  0.680600997795453130f, -0.732654271672412820f, 0.678350043129861580f, -0.734738878095963390f,
-  0.676092703575316030f, -0.736816568877369790f, 0.673829000378756150f, -0.738887324460615110f,
-  0.671558954847018330f, -0.740951125354959110f, 0.669282588346636010f, -0.743007952135121720f,
-  0.666999922303637470f, -0.745057785441465950f, 0.664710978203344900f, -0.747100605980180130f,
-  0.662415777590171780f, -0.749136394523459260f, 0.660114342067420480f, -0.751165131909686370f,
-  0.657806693297078640f, -0.753186799043612410f, 0.655492852999615460f, -0.755201376896536550f,
-  0.653172842953776760f, -0.757208846506484460f, 0.650846684996380990f, -0.759209188978387960f,
-  0.648514401022112550f, -0.761202385484261780f, 0.646176012983316390f, -0.763188417263381270f,
-  0.643831542889791500f, -0.765167265622458960f, 0.641481012808583160f, -0.767138911935820400f,
-  0.639124444863775730f, -0.769103337645579590f, 0.636761861236284200f, -0.771060524261813710f,
-  0.634393284163645490f, -0.773010453362736990f, 0.632018735939809060f, -0.774953106594873820f,
-  0.629638238914927100f, -0.776888465673232440f, 0.627251815495144190f, -0.778816512381475870f,
-  0.624859488142386450f, -0.780737228572094380f, 0.622461279374150080f, -0.782650596166575730f,
-  0.620057211763289210f, -0.784556597155575240f, 0.617647307937803980f, -0.786455213599085770f,
-  0.615231590580626820f, -0.788346427626606230f, 0.612810082429409710f, -0.790230221437310030f,
-  0.610382806276309480f, -0.792106577300212390f, 0.607949784967773740f, -0.793975477554337170f,
-  0.605511041404325550f, -0.795836904608883460f, 0.603066598540348280f, -0.797690840943391040f,
-  0.600616479383868970f, -0.799537269107905010f, 0.598160706996342380f, -0.801376171723140130f,
-  0.595699304492433470f, -0.803207531480644830f, 0.593232295039799800f, -0.805031331142963660f,
-  0.590759701858874280f, -0.806847553543799220f, 0.588281548222645330f, -0.808656181588174980f,
-  0.585797857456438860f, -0.810457198252594770f, 0.583308652937698290f, -0.812250586585203880f,
-  0.580813958095764530f, -0.814036329705948300f, 0.578313796411655590f, -0.815814410806733780f,
-  0.575808191417845340f, -0.817584813151583710f, 0.573297166698042320f, -0.819347520076796900f,
-  0.570780745886967370f, -0.821102514991104650f, 0.568258952670131490f, -0.822849781375826320f,
-  0.565731810783613230f, -0.824589302785025290f, 0.563199344013834090f, -0.826321062845663420f,
-  0.560661576197336030f, -0.828045045257755800f, 0.558118531220556100f, -0.829761233794523050f,
-  0.555570233019602290f, -0.831469612302545240f, 0.553016705580027580f, -0.833170164701913190f,
-  0.550457972936604810f, -0.834862874986380010f, 0.547894059173100190f, -0.836547727223511890f,
-  0.545324988422046460f, -0.838224705554837970f, 0.542750784864516000f, -0.839893794195999410f,
-  0.540171472729892970f, -0.841554977436898330f, 0.537587076295645510f, -0.843208239641845440f,
-  0.534997619887097260f, -0.844853565249707010f, 0.532403127877198010f, -0.846490938774052020f,
-  0.529803624686294830f, -0.848120344803297120f, 0.527199134781901390f, -0.849741768000852440f,
-  0.524589682678468840f, -0.851355193105265200f, 0.521975292937154390f, -0.852960604930363630f,
-  0.519355990165589530f, -0.854557988365400530f, 0.516731799017649980f, -0.856147328375194470f,
-  0.514102744193221660f, -0.857728610000272120f, 0.511468850437970520f, -0.859301818357008360f,
-  0.508830142543106990f, -0.860866938637767310f, 0.506186645345155450f, -0.862423956111040500f,
-  0.503538383725717580f, -0.863972856121586700f, 0.500885382611240940f, -0.865513624090568980f,
-  0.498227666972781870f, -0.867046245515692650f, 0.495565261825772490f, -0.868570705971340900f,
-  0.492898192229784090f, -0.870086991108711350f, 0.490226483288291100f, -0.871595086655951090f,
-  0.487550160148436050f, -0.873094978418290090f, 0.484869248000791120f, -0.874586652278176110f,
-  0.482183772079122830f, -0.876070094195406600f, 0.479493757660153010f, -0.877545290207261240f,
-  0.476799230063322250f, -0.879012226428633410f, 0.474100214650550020f, -0.880470889052160750f,
-  0.471396736825997810f, -0.881921264348354940f, 0.468688822035827960f, -0.883363338665731580f,
-  0.465976495767966130f, -0.884797098430937790f, 0.463259783551860260f, -0.886222530148880640f,
-  0.460538710958240010f, -0.887639620402853930f, 0.457813303598877290f, -0.889048355854664570f,
-  0.455083587126343840f, -0.890448723244757880f, 0.452349587233771000f, -0.891840709392342720f,
-  0.449611329654606600f, -0.893224301195515320f, 0.446868840162374330f, -0.894599485631382580f,
-  0.444122144570429260f, -0.895966249756185110f, 0.441371268731716620f, -0.897324580705418320f,
-  0.438616238538527710f, -0.898674465693953820f, 0.435857079922255470f, -0.900015892016160280f,
-  0.433093818853152010f, -0.901348847046022030f, 0.430326481340082610f, -0.902673318237258830f,
-  0.427555093430282200f, -0.903989293123443340f, 0.424779681209108810f, -0.905296759318118820f,
-  0.422000270799799790f, -0.906595704514915330f, 0.419216888363223960f, -0.907886116487666150f,
-  0.416429560097637320f, -0.909167983090522270f, 0.413638312238434560f, -0.910441292258067140f,
-  0.410843171057903910f, -0.911706032005429880f, 0.408044162864978740f, -0.912962190428398100f,
-  0.405241314004989860f, -0.914209755703530690f, 0.402434650859418540f, -0.915448716088267830f,
-  0.399624199845646790f, -0.916679059921042700f, 0.396809987416710420f, -0.917900775621390390f,
-  0.393992040061048100f, -0.919113851690057770f, 0.391170384302253980f, -0.920318276709110480f,
-  0.388345046698826300f, -0.921514039342041900f, 0.385516053843919020f, -0.922701128333878520f,
-  0.382683432365089840f, -0.923879532511286740f, 0.379847208924051110f, -0.925049240782677580f,
-  0.377007410216418310f, -0.926210242138311270f, 0.374164062971457990f, -0.927362525650401110f,
-  0.371317193951837600f, -0.928506080473215480f, 0.368466829953372320f, -0.929640895843181330f,
-  0.365612997804773960f, -0.930766961078983710f, 0.362755724367397230f, -0.931884265581668150f,
-  0.359895036534988280f, -0.932992798834738850f, 0.357030961233430030f, -0.934092550404258870f,
-  0.354163525420490510f, -0.935183509938947500f, 0.351292756085567150f, -0.936265667170278260f,
-  0.348418680249434510f, -0.937339011912574960f, 0.345541324963989150f, -0.938403534063108060f,
-  0.342660717311994380f, -0.939459223602189920f, 0.339776884406826960f, -0.940506070593268300f,
-  0.336889853392220050f, -0.941544065183020810f, 0.333999651442009490f, -0.942573197601446870f,
-  0.331106305759876430f, -0.943593458161960390f, 0.328209843579092660f, -0.944604837261480260f,
-  0.325310292162262980f, -0.945607325380521280f, 0.322407678801070020f, -0.946600913083283530f,
-  0.319502030816015750f, -0.947585591017741090f, 0.316593375556165850f, -0.948561349915730270f,
-  0.313681740398891570f, -0.949528180593036670f, 0.310767152749611470f, -0.950486073949481700f,
-  0.307849640041534980f, -0.951435020969008340f, 0.304929229735402430f, -0.952375012719765880f,
-  0.302005949319228200f, -0.953306040354193750f, 0.299079826308040480f, -0.954228095109105670f,
-  0.296150888243623960f, -0.955141168305770670f, 0.293219162694258680f, -0.956045251349996410f,
-  0.290284677254462330f, -0.956940335732208940f, 0.287347459544729570f, -0.957826413027532910f,
-  0.284407537211271820f, -0.958703474895871600f, 0.281464937925758050f, -0.959571513081984520f,
-  0.278519689385053060f, -0.960430519415565790f, 0.275571819310958250f, -0.961280485811320640f,
-  0.272621355449948980f, -0.962121404269041580f, 0.269668325572915200f, -0.962953266873683880f,
-  0.266712757474898420f, -0.963776065795439840f, 0.263754678974831510f, -0.964589793289812650f,
-  0.260794117915275570f, -0.965394441697689400f, 0.257831102162158930f, -0.966190003445412620f,
-  0.254865659604514630f, -0.966976471044852070f, 0.251897818154216910f, -0.967753837093475510f,
-  0.248927605745720260f, -0.968522094274417270f, 0.245955050335794590f, -0.969281235356548530f,
-  0.242980179903263980f, -0.970031253194543970f, 0.240003022448741500f, -0.970772140728950350f,
-  0.237023605994367340f, -0.971503890986251780f, 0.234041958583543460f, -0.972226497078936270f,
-  0.231058108280671280f, -0.972939952205560070f, 0.228072083170885790f, -0.973644249650811870f,
-  0.225083911359792780f, -0.974339382785575860f, 0.222093620973203590f, -0.975025345066994120f,
-  0.219101240156869770f, -0.975702130038528570f, 0.216106797076219600f, -0.976369731330021140f,
-  0.213110319916091360f, -0.977028142657754390f, 0.210111836880469720f, -0.977677357824509930f,
-  0.207111376192218560f, -0.978317370719627650f, 0.204108966092817010f, -0.978948175319062200f,
-  0.201104634842091960f, -0.979569765685440520f, 0.198098410717953730f, -0.980182135968117320f,
-  0.195090322016128330f, -0.980785280403230430f, 0.192080397049892380f, -0.981379193313754560f,
-  0.189068664149806280f, -0.981963869109555240f, 0.186055151663446630f, -0.982539302287441240f,
-  0.183039887955141060f, -0.983105487431216290f, 0.180022901405699510f, -0.983662419211730250f,
-  0.177004220412148860f, -0.984210092386929030f, 0.173983873387463850f, -0.984748501801904210f,
-  0.170961888760301360f, -0.985277642388941220f, 0.167938294974731230f, -0.985797509167567370f,
-  0.164913120489970090f, -0.986308097244598670f, 0.161886393780111910f, -0.986809401814185420f,
-  0.158858143333861390f, -0.987301418157858430f, 0.155828397654265320f, -0.987784141644572180f,
-  0.152797185258443410f, -0.988257567730749460f, 0.149764534677321620f, -0.988721691960323780f,
-  0.146730474455361750f, -0.989176509964781010f, 0.143695033150294580f, -0.989622017463200780f,
-  0.140658239332849240f, -0.990058210262297120f, 0.137620121586486180f, -0.990485084256456980f,
-  0.134580708507126220f, -0.990902635427780010f, 0.131540028702883280f, -0.991310859846115440f,
-  0.128498110793793220f, -0.991709753669099530f, 0.125454983411546210f, -0.992099313142191800f,
-  0.122410675199216280f, -0.992479534598709970f, 0.119365214810991350f, -0.992850414459865100f,
-  0.116318630911904880f, -0.993211949234794500f, 0.113270952177564360f, -0.993564135520595300f,
-  0.110222207293883180f, -0.993906970002356060f, 0.107172424956808870f, -0.994240449453187900f,
-  0.104121633872054730f, -0.994564570734255420f, 0.101069862754827880f, -0.994879330794805620f,
-  0.098017140329560770f, -0.995184726672196820f, 0.094963495329639061f, -0.995480755491926940f,
-  0.091908956497132696f, -0.995767414467659820f, 0.088853552582524684f, -0.996044700901251970f,
-  0.085797312344439880f, -0.996312612182778000f, 0.082740264549375803f, -0.996571145790554840f,
-  0.079682437971430126f, -0.996820299291165670f, 0.076623861392031617f, -0.997060070339482960f,
-  0.073564563599667454f, -0.997290456678690210f, 0.070504573389614009f, -0.997511456140303450f,
-  0.067443919563664106f, -0.997723066644191640f, 0.064382630929857410f, -0.997925286198596000f,
-  0.061320736302208648f, -0.998118112900149180f, 0.058258264500435732f, -0.998301544933892890f,
-  0.055195244349690031f, -0.998475580573294770f, 0.052131704680283317f, -0.998640218180265270f,
-  0.049067674327418126f, -0.998795456205172410f, 0.046003182130914644f, -0.998941293186856870f,
-  0.042938256934940959f, -0.999077727752645360f, 0.039872927587739845f, -0.999204758618363890f,
-  0.036807222941358991f, -0.999322384588349540f, 0.033741171851377642f, -0.999430604555461730f,
-  0.030674803176636581f, -0.999529417501093140f, 0.027608145778965820f, -0.999618822495178640f,
-  0.024541228522912264f, -0.999698818696204250f, 0.021474080275469605f, -0.999769405351215280f,
-  0.018406729905804820f, -0.999830581795823400f, 0.015339206284988220f, -0.999882347454212560f,
-  0.012271538285719944f, -0.999924701839144500f, 0.009203754782059960f, -0.999957644551963900f,
-  0.006135884649154515f, -0.999981175282601110f, 0.003067956762966138f, -0.999995293809576190f
-};
-
-    const float32_t cos_factors_512[512] = {
-  0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,
-  0.999942349676023910f,
-  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
-  0.999735288260561680f,
-  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
-  0.999377670388002850f,
-  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
-  0.998869549914283560f,
-  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
-  0.998211003360478190f,
-  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
-  0.997402129901275300f,
-  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
-  0.996443051350042630f,
-  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
-  0.995333912140482280f,
-  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
-  0.994074879304879370f,
-  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
-  0.992666142448948020f,
-  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
-  0.991107913723276890f,
-  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
-  0.989400427791380380f,
-  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
-  0.987543941794359230f,
-  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
-  0.985538735312176060f,
-  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
-  0.983385110321551180f,
-  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
-  0.981083391150486710f,
-  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
-  0.978633924429423210f,
-  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
-  0.976037079039039020f,
-  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
-  0.973293246054698250f,
-  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
-  0.970402838687555500f,
-  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
-  0.967366292222328510f,
-  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
-  0.964184063951745830f,
-  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
-  0.960856633107679660f,
-  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
-  0.957384500788975860f,
-  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
-  0.953768189885990330f,
-  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
-  0.950008245001843000f,
-  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
-  0.946105232370403450f,
-  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
-  0.942059739771017310f,
-  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
-  0.937872376439989890f,
-  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
-  0.933543772978836170f,
-  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
-  0.929074581259315860f,
-  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
-  0.924465474325262600f,
-  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
-  0.919717146291227360f,
-  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
-  0.914830312237946200f,
-  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
-  0.909805708104652220f,
-  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
-  0.904644090578246240f,
-  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
-  0.899346236979341570f,
-  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
-  0.893912945145203250f,
-  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
-  0.888345033309596350f,
-  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
-  0.882643339979562790f,
-  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
-  0.876808723809145650f,
-  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
-  0.870842063470078980f,
-  0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,
-  0.864744257519462380f,
-  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
-  0.858516224264442740f,
-  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
-  0.852158901623919830f,
-  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
-  0.845673246987299070f,
-  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
-  0.839060237070312740f,
-  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
-  0.832320867767929680f,
-  0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,
-  0.825456154004377550f,
-  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
-  0.818467129580298660f,
-  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
-  0.811354847017063730f,
-  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
-  0.804120377398265810f,
-  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
-  0.796764810208418830f,
-  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
-  0.789289253168885650f,
-  0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,
-  0.781694832071059390f,
-  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
-  0.773982690606822900f,
-  0.772036397150384520f, 0.770082836993347900f, 0.768122028523365420f,
-  0.766153990196312920f,
-  0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,
-  0.758209909813015280f,
-  0.756206001414394540f, 0.754194975316889170f, 0.752176850449042810f,
-  0.750151645806215070f,
-  0.748119380450403600f, 0.746080073510063780f, 0.744033744179929290f,
-  0.741980411720831070f,
-  0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,
-  0.733697438114660370f,
-  0.731609381223892630f, 0.729514438146997010f, 0.727412628602375770f,
-  0.725303972373060770f,
-  0.723188489306527460f, 0.721066199314508110f, 0.718937122372804490f,
-  0.716801278521099540f,
-  0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,
-  0.708190637033195400f,
-  0.706021261449339740f, 0.703845240524484940f, 0.701662594740168570f,
-  0.699473344640283770f,
-  0.697277510830886630f, 0.695075113980000880f, 0.692866174817424740f,
-  0.690650714134534720f,
-  0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,
-  0.681724074171649820f,
-  0.679476319899365080f, 0.677222170137180450f, 0.674961646102012040f,
-  0.672694769070772970f,
-  0.670421560380173090f, 0.668142041426518560f, 0.665856233665509720f,
-  0.663564158612039880f,
-  0.661265837839992270f, 0.658961292982037320f, 0.656650545729429050f,
-  0.654333617831800550f,
-  0.652010531096959500f, 0.649681307390683190f, 0.647345968636512060f,
-  0.645004536815544040f,
-  0.642657033966226860f, 0.640303482184151670f, 0.637943903621844170f,
-  0.635578320488556230f,
-  0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,
-  0.626056388404343520f,
-  0.623661117525694640f, 0.621259976511087660f, 0.618852987960976320f,
-  0.616440174530853650f,
-  0.614021558931038490f, 0.611597163926462020f, 0.609167012336453210f,
-  0.606731127034524480f,
-  0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,
-  0.596930708062196500f,
-  0.594466499184664540f, 0.591996694962040990f, 0.589521318641063940f,
-  0.587040393520918080f,
-  0.584553942953015330f, 0.582061990340775550f, 0.579564559139405740f,
-  0.577061672855679550f,
-  0.574553355047715760f, 0.572039629324757050f, 0.569520519346947250f,
-  0.566996048825108680f,
-  0.564466241520519500f, 0.561931121244689470f, 0.559390711859136140f,
-  0.556845037275160100f,
-  0.554294121453620110f, 0.551737988404707450f, 0.549176662187719770f,
-  0.546610166910834860f,
-  0.544038526730883930f, 0.541461765853123560f, 0.538879908531008420f,
-  0.536292979065963180f,
-  0.533701001807152960f, 0.531104001151255000f, 0.528502001542228480f,
-  0.525895027471084740f,
-  0.523283103475656430f, 0.520666254140367270f, 0.518044504095999340f,
-  0.515417878019463150f,
-  0.512786400633563070f, 0.510150096706766700f, 0.507508991052970870f,
-  0.504863108531267480f,
-  0.502212474045710900f, 0.499557112545081890f, 0.496897049022654640f,
-  0.494232308515959730f,
-  0.491562916106550060f, 0.488888896919763230f, 0.486210276124486530f,
-  0.483527078932918740f,
-  0.480839330600333900f, 0.478147056424843120f, 0.475450281747155870f,
-  0.472749031950342900f,
-  0.470043332459595620f, 0.467333208741988530f, 0.464618686306237820f,
-  0.461899790702462840f,
-  0.459176547521944150f, 0.456448982396883860f, 0.453717121000163930f,
-  0.450980989045103810f,
-  0.448240612285220000f, 0.445496016513981740f, 0.442747227564570130f,
-  0.439994271309633260f,
-  0.437237173661044200f, 0.434475960569655710f, 0.431710658025057370f,
-  0.428941292055329550f,
-  0.426167888726799620f, 0.423390474143796100f, 0.420609074448402510f,
-  0.417823715820212380f,
-  0.415034424476081630f, 0.412241226669883000f, 0.409444148692257590f,
-  0.406643216870369140f,
-  0.403838457567654130f, 0.401029897183575790f, 0.398217562153373620f,
-  0.395401478947816300f,
-  0.392581674072951530f, 0.389758174069856410f, 0.386931005514388690f,
-  0.384100195016935040f,
-  0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,
-  0.372741067009515810f,
-  0.369892447148934270f, 0.367040345719767240f, 0.364184789567079840f,
-  0.361325805568454340f,
-  0.358463420633736540f, 0.355597661704783960f, 0.352728555755210730f,
-  0.349856129790135030f,
-  0.346980410845923680f, 0.344101425989938980f, 0.341219202320282410f,
-  0.338333766965541290f,
-  0.335445147084531660f, 0.332553369866044220f, 0.329658462528587550f,
-  0.326760452320131790f,
-  0.323859366517852960f, 0.320955232427875210f, 0.318048077385015060f,
-  0.315137928752522440f,
-  0.312224813921825050f, 0.309308760312268780f, 0.306389795370861080f,
-  0.303467946572011370f,
-  0.300543241417273400f, 0.297615707435086310f, 0.294685372180514330f,
-  0.291752263234989370f,
-  0.288816408206049480f, 0.285877834727080730f, 0.282936570457055390f,
-  0.279992643080273380f,
-  0.277046080306099950f, 0.274096909868706330f, 0.271145159526808070f,
-  0.268190857063403180f,
-  0.265234030285511900f, 0.262274707023913590f, 0.259312915132886350f,
-  0.256348682489942910f,
-  0.253382036995570270f, 0.250413006572965280f, 0.247441619167773440f,
-  0.244467902747824210f,
-  0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,
-  0.232550307038775330f,
-  0.229565365820518870f, 0.226578263845610110f, 0.223589029229790020f,
-  0.220597690108873650f,
-  0.217604274638483670f, 0.214608810993786920f, 0.211611327369227610f,
-  0.208611851978263460f,
-  0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,
-  0.196594597670080220f,
-  0.193585587295803750f, 0.190574754820252800f, 0.187562128582529740f,
-  0.184547736938619640f,
-  0.181531608261125130f, 0.178513770938997590f, 0.175494253377271400f,
-  0.172473083996796030f,
-  0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,
-  0.160372457242928400f,
-  0.157343455616238280f, 0.154312973013020240f, 0.151281037957330250f,
-  0.148247678986896200f,
-  0.145212924652847520f, 0.142176803519448000f, 0.139139344163826280f,
-  0.136100575175706200f,
-  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
-  0.123932975118512200f,
-  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
-  0.111746711211126660f,
-  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
-  0.099543618660069444f,
-  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
-  0.087325535206192226f,
-  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
-  0.075094300847921291f,
-  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
-  0.062851757564161420f,
-  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
-  0.050599749036899337f,
-  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
-  0.038340120373552791f,
-  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
-  0.026074717829104040f,
-  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
-  0.013805388528060349f,
-  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
-  0.001533980186284766f
-};
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
-    const float32_t Weights_2048[4096] = {
-  1.000000000000000000f, 0.000000000000000000f, 0.999999705862882230f,  -0.000766990318742704f,
-  0.999998823451701880f, -0.001533980186284766f, 0.999997352766978210f,  -0.002300969151425805f,
-  0.999995293809576190f, -0.003067956762965976f, 0.999992646580707190f,  -0.003834942569706228f,
-  0.999989411081928400f, -0.004601926120448571f, 0.999985587315143200f,  -0.005368906963996343f,
-  0.999981175282601110f, -0.006135884649154475f, 0.999976174986897610f,  -0.006902858724729756f,
-  0.999970586430974140f, -0.007669828739531097f, 0.999964409618118280f,  -0.008436794242369799f,
-  0.999957644551963900f, -0.009203754782059819f, 0.999950291236490480f,  -0.009970709907418031f,
-  0.999942349676023910f, -0.010737659167264491f, 0.999933819875236000f,  -0.011504602110422714f,
-  0.999924701839144500f, -0.012271538285719925f, 0.999914995573113470f,  -0.013038467241987334f,
-  0.999904701082852900f, -0.013805388528060391f, 0.999893818374418490f,  -0.014572301692779064f,
-  0.999882347454212560f, -0.015339206284988100f, 0.999870288328982950f,  -0.016106101853537287f,
-  0.999857641005823860f, -0.016872987947281710f, 0.999844405492175240f,  -0.017639864115082053f,
-  0.999830581795823400f, -0.018406729905804820f, 0.999816169924900410f,  -0.019173584868322623f,
-  0.999801169887884260f, -0.019940428551514441f, 0.999785581693599210f,  -0.020707260504265895f,
-  0.999769405351215280f, -0.021474080275469508f, 0.999752640870248840f,  -0.022240887414024961f,
-  0.999735288260561680f, -0.023007681468839369f, 0.999717347532362190f,  -0.023774461988827555f,
-  0.999698818696204250f, -0.024541228522912288f, 0.999679701762987930f,  -0.025307980620024571f,
-  0.999659996743959220f, -0.026074717829103901f, 0.999639703650710200f,  -0.026841439699098531f,
-  0.999618822495178640f, -0.027608145778965740f, 0.999597353289648380f,  -0.028374835617672099f,
-  0.999575296046749220f, -0.029141508764193722f, 0.999552650779456990f,  -0.029908164767516555f,
-  0.999529417501093140f, -0.030674803176636626f, 0.999505596225325310f,  -0.031441423540560301f,
-  0.999481186966166950f, -0.032208025408304586f, 0.999456189737977340f,  -0.032974608328897335f,
-  0.999430604555461730f, -0.033741171851377580f, 0.999404431433671300f,  -0.034507715524795750f,
-  0.999377670388002850f, -0.035274238898213947f, 0.999350321434199440f,  -0.036040741520706229f,
-  0.999322384588349540f, -0.036807222941358832f, 0.999293859866887790f,  -0.037573682709270494f,
-  0.999264747286594420f, -0.038340120373552694f, 0.999235046864595850f,  -0.039106535483329888f,
-  0.999204758618363890f, -0.039872927587739811f, 0.999173882565716380f,  -0.040639296235933736f,
-  0.999142418724816910f, -0.041405640977076739f, 0.999110367114174890f,  -0.042171961360347947f,
-  0.999077727752645360f, -0.042938256934940820f, 0.999044500659429290f,  -0.043704527250063421f,
-  0.999010685854073380f, -0.044470771854938668f, 0.998976283356469820f,  -0.045236990298804590f,
-  0.998941293186856870f, -0.046003182130914623f, 0.998905715365818290f,  -0.046769346900537863f,
-  0.998869549914283560f, -0.047535484156959303f, 0.998832796853527990f,  -0.048301593449480144f,
-  0.998795456205172410f, -0.049067674327418015f, 0.998757527991183340f,  -0.049833726340107277f,
-  0.998719012233872940f, -0.050599749036899282f, 0.998679908955899090f,  -0.051365741967162593f,
-  0.998640218180265270f, -0.052131704680283324f, 0.998599939930320370f,  -0.052897636725665324f,
-  0.998559074229759310f, -0.053663537652730520f, 0.998517621102622210f,  -0.054429407010919133f,
-  0.998475580573294770f, -0.055195244349689934f, 0.998432952666508440f,  -0.055961049218520569f,
-  0.998389737407340160f, -0.056726821166907748f, 0.998345934821212370f,  -0.057492559744367566f,
-  0.998301544933892890f, -0.058258264500435752f, 0.998256567771495180f,  -0.059023934984667931f,
-  0.998211003360478190f, -0.059789570746639868f, 0.998164851727646240f,  -0.060555171335947788f,
-  0.998118112900149180f, -0.061320736302208578f, 0.998070786905482340f,  -0.062086265195060088f,
-  0.998022873771486240f, -0.062851757564161406f, 0.997974373526346990f,  -0.063617212959193106f,
-  0.997925286198596000f, -0.064382630929857465f, 0.997875611817110150f,  -0.065148011025878833f,
-  0.997825350411111640f, -0.065913352797003805f, 0.997774502010167820f,  -0.066678655793001557f,
-  0.997723066644191640f, -0.067443919563664051f, 0.997671044343441000f,  -0.068209143658806329f,
-  0.997618435138519550f, -0.068974327628266746f, 0.997565239060375750f,  -0.069739471021907307f,
-  0.997511456140303450f, -0.070504573389613856f, 0.997457086409941910f,  -0.071269634281296401f,
-  0.997402129901275300f, -0.072034653246889332f, 0.997346586646633230f,  -0.072799629836351673f,
-  0.997290456678690210f, -0.073564563599667426f, 0.997233740030466280f,  -0.074329454086845756f,
-  0.997176436735326190f, -0.075094300847921305f, 0.997118546826979980f,  -0.075859103432954447f,
-  0.997060070339482960f, -0.076623861392031492f, 0.997001007307235290f,  -0.077388574275265049f,
-  0.996941357764982160f, -0.078153241632794232f, 0.996881121747813850f,  -0.078917863014784942f,
-  0.996820299291165670f, -0.079682437971430126f, 0.996758890430818000f,  -0.080446966052950014f,
-  0.996696895202896060f, -0.081211446809592441f, 0.996634313643869900f,  -0.081975879791633066f,
-  0.996571145790554840f, -0.082740264549375692f, 0.996507391680110820f,  -0.083504600633152432f,
-  0.996443051350042630f, -0.084268887593324071f, 0.996378124838200210f,  -0.085033124980280275f,
-  0.996312612182778000f, -0.085797312344439894f, 0.996246513422315520f,  -0.086561449236251170f,
-  0.996179828595696980f, -0.087325535206192059f, 0.996112557742151130f,  -0.088089569804770507f,
-  0.996044700901251970f, -0.088853552582524600f, 0.995976258112917790f,  -0.089617483090022959f,
-  0.995907229417411720f, -0.090381360877864983f, 0.995837614855341610f,  -0.091145185496681005f,
-  0.995767414467659820f, -0.091908956497132724f, 0.995696628295663520f,  -0.092672673429913310f,
-  0.995625256380994310f, -0.093436335845747787f, 0.995553298765638470f,  -0.094199943295393204f,
-  0.995480755491926940f, -0.094963495329638992f, 0.995407626602534900f,  -0.095726991499307162f,
-  0.995333912140482280f, -0.096490431355252593f, 0.995259612149133390f,  -0.097253814448363271f,
-  0.995184726672196930f, -0.098017140329560604f, 0.995109255753726110f,  -0.098780408549799623f,
-  0.995033199438118630f, -0.099543618660069319f, 0.994956557770116380f,  -0.100306770211392860f,
-  0.994879330794805620f, -0.101069862754827820f, 0.994801518557617110f,  -0.101832895841466530f,
-  0.994723121104325700f, -0.102595869022436280f, 0.994644138481050710f,  -0.103358781848899610f,
-  0.994564570734255420f, -0.104121633872054590f, 0.994484417910747600f,  -0.104884424643134970f,
-  0.994403680057679100f, -0.105647153713410620f, 0.994322357222545810f,  -0.106409820634187680f,
-  0.994240449453187900f, -0.107172424956808840f, 0.994157956797789730f,  -0.107934966232653650f,
-  0.994074879304879370f, -0.108697444013138720f, 0.993991217023329380f,  -0.109459857849717980f,
-  0.993906970002356060f, -0.110222207293883060f, 0.993822138291519660f,  -0.110984491897163390f,
-  0.993736721940724600f, -0.111746711211126590f, 0.993650721000219120f,  -0.112508864787378690f,
-  0.993564135520595300f, -0.113270952177564350f, 0.993476965552789190f,  -0.114032972933367200f,
-  0.993389211148080650f, -0.114794926606510080f, 0.993300872358093280f,  -0.115556812748755260f,
-  0.993211949234794500f, -0.116318630911904750f, 0.993122441830495580f,  -0.117080380647800590f,
-  0.993032350197851410f, -0.117842061508324980f, 0.992941674389860470f,  -0.118603673045400720f,
-  0.992850414459865100f, -0.119365214810991350f, 0.992758570461551140f,  -0.120126686357101500f,
-  0.992666142448948020f, -0.120888087235777080f, 0.992573130476428810f,  -0.121649416999105530f,
-  0.992479534598709970f, -0.122410675199216200f, 0.992385354870851670f,  -0.123171861388280480f,
-  0.992290591348257370f, -0.123932975118512160f, 0.992195244086673920f,  -0.124694015942167640f,
-  0.992099313142191800f, -0.125454983411546230f, 0.992002798571244520f,  -0.126215877078990350f,
-  0.991905700430609330f, -0.126976696496885870f, 0.991808018777406430f,  -0.127737441217662310f,
-  0.991709753669099530f, -0.128498110793793170f, 0.991610905163495370f,  -0.129258704777796140f,
-  0.991511473318743900f, -0.130019222722233350f, 0.991411458193338540f,  -0.130779664179711710f,
-  0.991310859846115440f, -0.131540028702883120f, 0.991209678336254060f,  -0.132300315844444650f,
-  0.991107913723276890f, -0.133060525157139060f, 0.991005566067049370f,  -0.133820656193754720f,
-  0.990902635427780010f, -0.134580708507126170f, 0.990799121866020370f,  -0.135340681650134210f,
-  0.990695025442664630f, -0.136100575175706200f, 0.990590346218950150f,  -0.136860388636816380f,
-  0.990485084256457090f, -0.137620121586486040f, 0.990379239617108160f,  -0.138379773577783890f,
-  0.990272812363169110f, -0.139139344163826200f, 0.990165802557248400f,  -0.139898832897777210f,
-  0.990058210262297120f, -0.140658239332849210f, 0.989950035541608990f,  -0.141417563022303020f,
-  0.989841278458820530f, -0.142176803519448030f, 0.989731939077910570f,  -0.142935960377642670f,
-  0.989622017463200890f, -0.143695033150294470f, 0.989511513679355190f,  -0.144454021390860470f,
-  0.989400427791380380f, -0.145212924652847460f, 0.989288759864625170f,  -0.145971742489812210f,
-  0.989176509964781010f, -0.146730474455361750f, 0.989063678157881540f,  -0.147489120103153570f,
-  0.988950264510302990f, -0.148247678986896030f, 0.988836269088763540f,  -0.149006150660348450f,
-  0.988721691960323780f, -0.149764534677321510f, 0.988606533192386450f,  -0.150522830591677400f,
-  0.988490792852696590f, -0.151281037957330220f, 0.988374471009341280f,  -0.152039156328246050f,
-  0.988257567730749460f, -0.152797185258443440f, 0.988140083085692570f,  -0.153555124301993450f,
-  0.988022017143283530f, -0.154312973013020100f, 0.987903369972977790f,  -0.155070730945700510f,
-  0.987784141644572180f, -0.155828397654265230f, 0.987664332228205710f,  -0.156585972692998430f,
-  0.987543941794359230f, -0.157343455616238250f, 0.987422970413855410f,  -0.158100845978376980f,
-  0.987301418157858430f, -0.158858143333861450f, 0.987179285097874340f,  -0.159615347237193060f,
-  0.987056571305750970f, -0.160372457242928280f, 0.986933276853677710f,  -0.161129472905678810f,
-  0.986809401814185530f, -0.161886393780111830f, 0.986684946260146690f,  -0.162643219420950310f,
-  0.986559910264775410f, -0.163399949382973230f, 0.986434293901627180f,  -0.164156583221015810f,
-  0.986308097244598670f, -0.164913120489969890f, 0.986181320367928270f,  -0.165669560744784120f,
-  0.986053963346195440f, -0.166425903540464100f, 0.985926026254321130f,  -0.167182148432072940f,
-  0.985797509167567480f, -0.167938294974731170f, 0.985668412161537550f,  -0.168694342723617330f,
-  0.985538735312176060f, -0.169450291233967960f, 0.985408478695768420f,  -0.170206140061078070f,
-  0.985277642388941220f, -0.170961888760301220f, 0.985146226468662230f,  -0.171717536887049970f,
-  0.985014231012239840f, -0.172473083996795950f, 0.984881656097323700f,  -0.173228529645070320f,
-  0.984748501801904210f, -0.173983873387463820f, 0.984614768204312600f,  -0.174739114779627200f,
-  0.984480455383220930f, -0.175494253377271430f, 0.984345563417641900f,  -0.176249288736167880f,
-  0.984210092386929030f, -0.177004220412148750f, 0.984074042370776450f,  -0.177759047961107170f,
-  0.983937413449218920f, -0.178513770938997510f, 0.983800205702631600f,  -0.179268388901835750f,
-  0.983662419211730250f, -0.180022901405699510f, 0.983524054057571260f,  -0.180777308006728590f,
-  0.983385110321551180f, -0.181531608261124970f, 0.983245588085407070f,  -0.182285801725153300f,
-  0.983105487431216290f, -0.183039887955140950f, 0.982964808441396440f,  -0.183793866507478450f,
-  0.982823551198705240f, -0.184547736938619620f, 0.982681715786240860f,  -0.185301498805081900f,
-  0.982539302287441240f, -0.186055151663446630f, 0.982396310786084690f,  -0.186808695070359270f,
-  0.982252741366289370f, -0.187562128582529600f, 0.982108594112513610f,  -0.188315451756732120f,
-  0.981963869109555240f, -0.189068664149806190f, 0.981818566442552500f,  -0.189821765318656410f,
-  0.981672686196983110f, -0.190574754820252740f, 0.981526228458664770f,  -0.191327632211630900f,
-  0.981379193313754560f, -0.192080397049892440f, 0.981231580848749730f,  -0.192833048892205230f,
-  0.981083391150486710f, -0.193585587295803610f, 0.980934624306141640f,  -0.194338011817988600f,
-  0.980785280403230430f, -0.195090322016128250f, 0.980635359529608120f,  -0.195842517447657850f,
-  0.980484861773469380f, -0.196594597670080220f, 0.980333787223347960f,  -0.197346562240965920f,
-  0.980182135968117430f, -0.198098410717953560f, 0.980029908096990090f,  -0.198850142658750090f,
-  0.979877103699517640f, -0.199601757621130970f, 0.979723722865591170f,  -0.200353255162940450f,
-  0.979569765685440520f, -0.201104634842091900f, 0.979415232249634780f,  -0.201855896216568050f,
-  0.979260122649082020f, -0.202607038844421130f, 0.979104436975029250f,  -0.203358062283773320f,
-  0.978948175319062200f, -0.204108966092816870f, 0.978791337773105670f,  -0.204859749829814420f,
-  0.978633924429423210f, -0.205610413053099240f, 0.978475935380616830f,  -0.206360955321075510f,
-  0.978317370719627650f, -0.207111376192218560f, 0.978158230539735050f,  -0.207861675225075070f,
-  0.977998514934557140f, -0.208611851978263490f, 0.977838223998050430f,  -0.209361906010474160f,
-  0.977677357824509930f, -0.210111836880469610f, 0.977515916508569280f,  -0.210861644147084860f,
-  0.977353900145199960f, -0.211611327369227550f, 0.977191308829712280f,  -0.212360886105878420f,
-  0.977028142657754390f, -0.213110319916091360f, 0.976864401725312640f,  -0.213859628358993750f,
-  0.976700086128711840f, -0.214608810993786760f, 0.976535195964614470f,  -0.215357867379745550f,
-  0.976369731330021140f, -0.216106797076219520f, 0.976203692322270560f,  -0.216855599642632620f,
-  0.976037079039039020f, -0.217604274638483640f, 0.975869891578341030f,  -0.218352821623346320f,
-  0.975702130038528570f, -0.219101240156869800f, 0.975533794518291360f,  -0.219849529798778700f,
-  0.975364885116656980f, -0.220597690108873510f, 0.975195401932990370f,  -0.221345720647030810f,
-  0.975025345066994120f, -0.222093620973203510f, 0.974854714618708430f,  -0.222841390647421120f,
-  0.974683510688510670f, -0.223589029229789990f, 0.974511733377115720f,  -0.224336536280493600f,
-  0.974339382785575860f, -0.225083911359792830f, 0.974166459015280320f,  -0.225831154028026170f,
-  0.973992962167955830f, -0.226578263845610000f, 0.973818892345666100f,  -0.227325240373038860f,
-  0.973644249650811980f, -0.228072083170885730f, 0.973469034186131070f,  -0.228818791799802220f,
-  0.973293246054698250f, -0.229565365820518870f, 0.973116885359925130f,  -0.230311804793845440f,
-  0.972939952205560180f, -0.231058108280671110f, 0.972762446695688570f,  -0.231804275841964780f,
-  0.972584368934732210f, -0.232550307038775240f, 0.972405719027449770f,  -0.233296201432231590f,
-  0.972226497078936270f, -0.234041958583543430f, 0.972046703194623500f,  -0.234787578054000970f,
-  0.971866337480279400f, -0.235533059404975490f, 0.971685400042008540f,  -0.236278402197919570f,
-  0.971503890986251780f, -0.237023605994367200f, 0.971321810419786160f,  -0.237768670355934190f,
-  0.971139158449725090f, -0.238513594844318420f, 0.970955935183517970f,  -0.239258379021299980f,
-  0.970772140728950350f, -0.240003022448741500f, 0.970587775194143630f,  -0.240747524688588430f,
-  0.970402838687555500f, -0.241491885302869330f, 0.970217331317979160f,  -0.242236103853696010f,
-  0.970031253194543970f, -0.242980179903263870f, 0.969844604426714830f,  -0.243724113013852160f,
-  0.969657385124292450f, -0.244467902747824150f, 0.969469595397413060f,  -0.245211548667627540f,
-  0.969281235356548530f, -0.245955050335794590f, 0.969092305112506210f,  -0.246698407314942410f,
-  0.968902804776428870f, -0.247441619167773270f, 0.968712734459794780f,  -0.248184685457074780f,
-  0.968522094274417380f, -0.248927605745720150f, 0.968330884332445190f,  -0.249670379596668570f,
-  0.968139104746362440f, -0.250413006572965220f, 0.967946755628987800f,  -0.251155486237741920f,
-  0.967753837093475510f, -0.251897818154216970f, 0.967560349253314360f,  -0.252640001885695520f,
-  0.967366292222328510f, -0.253382036995570160f, 0.967171666114676640f,  -0.254123923047320620f,
-  0.966976471044852070f, -0.254865659604514570f, 0.966780707127683270f,  -0.255607246230807380f,
-  0.966584374478333120f, -0.256348682489942910f, 0.966387473212298900f,  -0.257089967945753120f,
-  0.966190003445412500f, -0.257831102162158990f, 0.965991965293840570f,
-  -0.258572084703170340f,
-  0.965793358874083680f, -0.259312915132886230f, 0.965594184302976830f,
-  -0.260053593015495190f,
-  0.965394441697689400f, -0.260794117915275510f, 0.965194131175724720f,
-  -0.261534489396595520f,
-  0.964993252854920320f, -0.262274707023913590f, 0.964791806853447900f,
-  -0.263014770361779000f,
-  0.964589793289812760f, -0.263754678974831350f, 0.964387212282854290f,
-  -0.264494432427801630f,
-  0.964184063951745830f, -0.265234030285511790f, 0.963980348415994110f,
-  -0.265973472112875590f,
-  0.963776065795439840f, -0.266712757474898370f, 0.963571216210257320f,
-  -0.267451885936677620f,
-  0.963365799780954050f, -0.268190857063403180f, 0.963159816628371360f,
-  -0.268929670420357260f,
-  0.962953266873683880f, -0.269668325572915090f, 0.962746150638399410f,
-  -0.270406822086544820f,
-  0.962538468044359160f, -0.271145159526808010f, 0.962330219213737400f,
-  -0.271883337459359720f,
-  0.962121404269041580f, -0.272621355449948980f, 0.961912023333112210f,
-  -0.273359213064418680f,
-  0.961702076529122540f, -0.274096909868706380f, 0.961491563980579000f,
-  -0.274834445428843940f,
-  0.961280485811320640f, -0.275571819310958140f, 0.961068842145519350f,
-  -0.276309031081271080f,
-  0.960856633107679660f, -0.277046080306099900f, 0.960643858822638590f,
-  -0.277782966551857690f,
-  0.960430519415565790f, -0.278519689385053060f, 0.960216615011963430f,
-  -0.279256248372291180f,
-  0.960002145737665960f, -0.279992643080273220f, 0.959787111718839900f,
-  -0.280728873075797190f,
-  0.959571513081984520f, -0.281464937925757940f, 0.959355349953930790f,
-  -0.282200837197147560f,
-  0.959138622461841890f, -0.282936570457055390f, 0.958921330733213170f,
-  -0.283672137272668430f,
-  0.958703474895871600f, -0.284407537211271880f, 0.958485055077976100f,
-  -0.285142769840248670f,
-  0.958266071408017670f, -0.285877834727080620f, 0.958046524014818600f,
-  -0.286612731439347790f,
-  0.957826413027532910f, -0.287347459544729510f, 0.957605738575646350f,
-  -0.288082018611004130f,
-  0.957384500788975860f, -0.288816408206049480f, 0.957162699797670210f,
-  -0.289550627897843030f,
-  0.956940335732208820f, -0.290284677254462330f, 0.956717408723403050f,
-  -0.291018555844085090f,
-  0.956493918902395100f, -0.291752263234989260f, 0.956269866400658030f,
-  -0.292485798995553880f,
-  0.956045251349996410f, -0.293219162694258630f, 0.955820073882545420f,
-  -0.293952353899684660f,
-  0.955594334130771110f, -0.294685372180514330f, 0.955368032227470350f,
-  -0.295418217105532010f,
-  0.955141168305770780f, -0.296150888243623790f, 0.954913742499130520f,
-  -0.296883385163778270f,
-  0.954685754941338340f, -0.297615707435086200f, 0.954457205766513490f,
-  -0.298347854626741400f,
-  0.954228095109105670f, -0.299079826308040480f, 0.953998423103894490f,
-  -0.299811622048383350f,
-  0.953768189885990330f, -0.300543241417273450f, 0.953537395590833280f,
-  -0.301274683984317950f,
-  0.953306040354193860f, -0.302005949319228080f, 0.953074124312172200f,
-  -0.302737036991819140f,
-  0.952841647601198720f, -0.303467946572011320f, 0.952608610358033350f,
-  -0.304198677629829110f,
-  0.952375012719765880f, -0.304929229735402370f, 0.952140854823815830f,
-  -0.305659602458966120f,
-  0.951906136807932350f, -0.306389795370860920f, 0.951670858810193860f,
-  -0.307119808041533100f,
-  0.951435020969008340f, -0.307849640041534870f, 0.951198623423113230f,
-  -0.308579290941525090f,
-  0.950961666311575080f, -0.309308760312268730f, 0.950724149773789610f,
-  -0.310038047724637890f,
-  0.950486073949481700f, -0.310767152749611470f, 0.950247438978705230f,
-  -0.311496074958275910f,
-  0.950008245001843000f, -0.312224813921824880f, 0.949768492159606680f,
-  -0.312953369211560200f,
-  0.949528180593036670f, -0.313681740398891520f, 0.949287310443502120f,
-  -0.314409927055336660f,
-  0.949045881852700560f, -0.315137928752522440f, 0.948803894962658490f,
-  -0.315865745062183960f,
-  0.948561349915730270f, -0.316593375556165850f, 0.948318246854599090f,
-  -0.317320819806421740f,
-  0.948074585922276230f, -0.318048077385014950f, 0.947830367262101010f,
-  -0.318775147864118480f,
-  0.947585591017741090f, -0.319502030816015690f, 0.947340257333192050f,
-  -0.320228725813099860f,
-  0.947094366352777220f, -0.320955232427875210f, 0.946847918221148000f,
-  -0.321681550232956580f,
-  0.946600913083283530f, -0.322407678801069850f, 0.946353351084490590f,
-  -0.323133617705052330f,
-  0.946105232370403450f, -0.323859366517852850f, 0.945856557086983910f,
-  -0.324584924812532150f,
-  0.945607325380521280f, -0.325310292162262930f, 0.945357537397632290f,
-  -0.326035468140330240f,
-  0.945107193285260610f, -0.326760452320131730f, 0.944856293190677210f,
-  -0.327485244275178000f,
-  0.944604837261480260f, -0.328209843579092500f, 0.944352825645594750f,
-  -0.328934249805612200f,
-  0.944100258491272660f, -0.329658462528587490f, 0.943847135947092690f,
-  -0.330382481321982780f,
-  0.943593458161960390f, -0.331106305759876430f, 0.943339225285107720f,
-  -0.331829935416461110f,
-  0.943084437466093490f, -0.332553369866044220f, 0.942829094854802710f,
-  -0.333276608683047930f,
-  0.942573197601446870f, -0.333999651442009380f, 0.942316745856563780f,
-  -0.334722497717581220f,
-  0.942059739771017310f, -0.335445147084531600f, 0.941802179495997650f,
-  -0.336167599117744520f,
-  0.941544065183020810f, -0.336889853392220050f, 0.941285396983928660f,
-  -0.337611909483074620f,
-  0.941026175050889260f, -0.338333766965541130f, 0.940766399536396070f,
-  -0.339055425414969640f,
-  0.940506070593268300f, -0.339776884406826850f, 0.940245188374650880f,
-  -0.340498143516697160f,
-  0.939983753034014050f, -0.341219202320282360f, 0.939721764725153340f,
-  -0.341940060393402190f,
-  0.939459223602189920f, -0.342660717311994380f, 0.939196129819569900f,
-  -0.343381172652115040f,
-  0.938932483532064600f, -0.344101425989938810f, 0.938668284894770170f,
-  -0.344821476901759290f,
-  0.938403534063108060f, -0.345541324963989090f, 0.938138231192824360f,
-  -0.346260969753160010f,
-  0.937872376439989890f, -0.346980410845923680f, 0.937605969960999990f,
-  -0.347699647819051380f,
-  0.937339011912574960f, -0.348418680249434560f, 0.937071502451759190f,
-  -0.349137507714084970f,
-  0.936803441735921560f, -0.349856129790134920f, 0.936534829922755500f,
-  -0.350574546054837510f,
-  0.936265667170278260f, -0.351292756085567090f, 0.935995953636831410f,
-  -0.352010759459819080f,
-  0.935725689481080370f, -0.352728555755210730f, 0.935454874862014620f,
-  -0.353446144549480810f,
-  0.935183509938947610f, -0.354163525420490340f, 0.934911594871516090f,
-  -0.354880697946222790f,
-  0.934639129819680780f, -0.355597661704783850f, 0.934366114943725790f,
-  -0.356314416274402410f,
-  0.934092550404258980f, -0.357030961233429980f, 0.933818436362210960f,
-  -0.357747296160341900f,
-  0.933543772978836170f, -0.358463420633736540f, 0.933268560415712050f,
-  -0.359179334232336500f,
-  0.932992798834738960f, -0.359895036534988110f, 0.932716488398140250f,
-  -0.360610527120662270f,
-  0.932439629268462360f, -0.361325805568454280f, 0.932162221608574430f,
-  -0.362040871457584180f,
-  0.931884265581668150f, -0.362755724367397230f, 0.931605761351257830f,
-  -0.363470363877363760f,
-  0.931326709081180430f, -0.364184789567079890f, 0.931047108935595280f,
-  -0.364899001016267320f,
-  0.930766961078983710f, -0.365612997804773850f, 0.930486265676149780f,
-  -0.366326779512573590f,
-  0.930205022892219070f, -0.367040345719767180f, 0.929923232892639670f,
-  -0.367753696006581980f,
-  0.929640895843181330f, -0.368466829953372320f, 0.929358011909935500f,
-  -0.369179747140620020f,
-  0.929074581259315860f, -0.369892447148934100f, 0.928790604058057020f,
-  -0.370604929559051670f,
-  0.928506080473215590f, -0.371317193951837540f, 0.928221010672169440f,
-  -0.372029239908285010f,
-  0.927935394822617890f, -0.372741067009515760f, 0.927649233092581180f,
-  -0.373452674836780300f,
-  0.927362525650401110f, -0.374164062971457930f, 0.927075272664740100f,
-  -0.374875230995057540f,
-  0.926787474304581750f, -0.375586178489217220f, 0.926499130739230510f,
-  -0.376296905035704790f,
-  0.926210242138311380f, -0.377007410216418260f, 0.925920808671770070f,
-  -0.377717693613385640f,
-  0.925630830509872720f, -0.378427754808765560f, 0.925340307823206310f,
-  -0.379137593384847320f,
-  0.925049240782677580f, -0.379847208924051160f, 0.924757629559513910f,
-  -0.380556601008928520f,
-  0.924465474325262600f, -0.381265769222162380f, 0.924172775251791200f,
-  -0.381974713146567220f,
-  0.923879532511286740f, -0.382683432365089780f, 0.923585746276256670f,
-  -0.383391926460808660f,
-  0.923291416719527640f, -0.384100195016935040f, 0.922996544014246250f,
-  -0.384808237616812880f,
-  0.922701128333878630f, -0.385516053843918850f, 0.922405169852209880f,
-  -0.386223643281862980f,
-  0.922108668743345180f, -0.386931005514388580f, 0.921811625181708120f,
-  -0.387638140125372730f,
-  0.921514039342042010f, -0.388345046698826250f, 0.921215911399408730f,
-  -0.389051724818894380f,
-  0.920917241529189520f, -0.389758174069856410f, 0.920618029907083970f,
-  -0.390464394036126590f,
-  0.920318276709110590f, -0.391170384302253870f, 0.920017982111606570f,
-  -0.391876144452922350f,
-  0.919717146291227360f, -0.392581674072951470f, 0.919415769424947070f,
-  -0.393286972747296400f,
-  0.919113851690057770f, -0.393992040061048100f, 0.918811393264170050f,
-  -0.394696875599433560f,
-  0.918508394325212250f, -0.395401478947816350f, 0.918204855051430900f,
-  -0.396105849691696270f,
-  0.917900775621390500f, -0.396809987416710310f, 0.917596156213972950f,
-  -0.397513891708632330f,
-  0.917290997008377910f, -0.398217562153373560f, 0.916985298184123000f,
-  -0.398920998336982910f,
-  0.916679059921042700f, -0.399624199845646790f, 0.916372282399289140f,
-  -0.400327166265690090f,
-  0.916064965799331720f, -0.401029897183575620f, 0.915757110301956720f,
-  -0.401732392185905010f,
-  0.915448716088267830f, -0.402434650859418430f, 0.915139783339685260f,
-  -0.403136672790995300f,
-  0.914830312237946200f, -0.403838457567654070f, 0.914520302965104450f,
-  -0.404540004776553000f,
-  0.914209755703530690f, -0.405241314004989860f, 0.913898670635911680f,
-  -0.405942384840402510f,
-  0.913587047945250810f, -0.406643216870369030f, 0.913274887814867760f,
-  -0.407343809682607970f,
-  0.912962190428398210f, -0.408044162864978690f, 0.912648955969793900f,
-  -0.408744276005481360f,
-  0.912335184623322750f, -0.409444148692257590f, 0.912020876573568340f,
-  -0.410143780513590240f,
-  0.911706032005429880f, -0.410843171057903910f, 0.911390651104122430f,
-  -0.411542319913765220f,
-  0.911074734055176360f, -0.412241226669882890f, 0.910758281044437570f,
-  -0.412939890915108080f,
-  0.910441292258067250f, -0.413638312238434500f, 0.910123767882541680f,
-  -0.414336490228999100f,
-  0.909805708104652220f, -0.415034424476081630f, 0.909487113111505430f,
-  -0.415732114569105360f,
-  0.909167983090522380f, -0.416429560097637150f, 0.908848318229439120f,
-  -0.417126760651387870f,
-  0.908528118716306120f, -0.417823715820212270f, 0.908207384739488700f,
-  -0.418520425194109700f,
-  0.907886116487666260f, -0.419216888363223910f, 0.907564314149832630f,
-  -0.419913104917843620f,
-  0.907241977915295820f, -0.420609074448402510f, 0.906919107973678140f,
-  -0.421304796545479640f,
-  0.906595704514915330f, -0.422000270799799680f, 0.906271767729257660f,
-  -0.422695496802232950f,
-  0.905947297807268460f, -0.423390474143796050f, 0.905622294939825270f,
-  -0.424085202415651560f,
-  0.905296759318118820f, -0.424779681209108810f, 0.904970691133653250f,
-  -0.425473910115623800f,
-  0.904644090578246240f, -0.426167888726799620f, 0.904316957844028320f,
-  -0.426861616634386430f,
-  0.903989293123443340f, -0.427555093430282080f, 0.903661096609247980f,
-  -0.428248318706531960f,
-  0.903332368494511820f, -0.428941292055329490f, 0.903003108972617150f,
-  -0.429634013069016380f,
-  0.902673318237258830f, -0.430326481340082610f, 0.902342996482444200f,
-  -0.431018696461167030f,
-  0.902012143902493180f, -0.431710658025057260f, 0.901680760692037730f,
-  -0.432402365624690140f,
-  0.901348847046022030f, -0.433093818853151960f, 0.901016403159702330f,
-  -0.433785017303678520f,
-  0.900683429228646970f, -0.434475960569655650f, 0.900349925448735600f,
-  -0.435166648244619260f,
-  0.900015892016160280f, -0.435857079922255470f, 0.899681329127423930f,
-  -0.436547255196401200f,
-  0.899346236979341570f, -0.437237173661044090f, 0.899010615769039070f,
-  -0.437926834910322860f,
-  0.898674465693953820f, -0.438616238538527660f, 0.898337786951834310f,
-  -0.439305384140099950f,
-  0.898000579740739880f, -0.439994271309633260f, 0.897662844259040860f,
-  -0.440682899641872900f,
-  0.897324580705418320f, -0.441371268731716670f, 0.896985789278863970f,
-  -0.442059378174214700f,
-  0.896646470178680150f, -0.442747227564570020f, 0.896306623604479550f,
-  -0.443434816498138480f,
-  0.895966249756185220f, -0.444122144570429200f, 0.895625348834030110f,
-  -0.444809211377104880f,
-  0.895283921038557580f, -0.445496016513981740f, 0.894941966570620750f,
-  -0.446182559577030070f,
-  0.894599485631382700f, -0.446868840162374160f, 0.894256478422316040f,
-  -0.447554857866293010f,
-  0.893912945145203250f, -0.448240612285219890f, 0.893568886002135910f,
-  -0.448926103015743260f,
-  0.893224301195515320f, -0.449611329654606540f, 0.892879190928051680f,
-  -0.450296291798708610f,
-  0.892533555402764580f, -0.450980989045103860f, 0.892187394822982480f,
-  -0.451665420991002490f,
-  0.891840709392342720f, -0.452349587233770890f, 0.891493499314791380f,
-  -0.453033487370931580f,
-  0.891145764794583180f, -0.453717121000163870f, 0.890797506036281490f,
-  -0.454400487719303580f,
-  0.890448723244757880f, -0.455083587126343840f, 0.890099416625192320f,
-  -0.455766418819434640f,
-  0.889749586383072780f, -0.456448982396883920f, 0.889399232724195520f,
-  -0.457131277457156980f,
-  0.889048355854664570f, -0.457813303598877170f, 0.888696955980891600f,
-  -0.458495060420826270f,
-  0.888345033309596350f, -0.459176547521944090f, 0.887992588047805560f,
-  -0.459857764501329540f,
-  0.887639620402853930f, -0.460538710958240010f, 0.887286130582383150f,
-  -0.461219386492092380f,
-  0.886932118794342190f, -0.461899790702462730f, 0.886577585246987040f,
-  -0.462579923189086810f,
-  0.886222530148880640f, -0.463259783551860150f, 0.885866953708892790f,
-  -0.463939371390838520f,
-  0.885510856136199950f, -0.464618686306237820f, 0.885154237640285110f,
-  -0.465297727898434600f,
-  0.884797098430937790f, -0.465976495767966180f, 0.884439438718253810f,
-  -0.466654989515530920f,
-  0.884081258712634990f, -0.467333208741988420f, 0.883722558624789660f,
-  -0.468011153048359830f,
-  0.883363338665731580f, -0.468688822035827900f, 0.883003599046780830f,
-  -0.469366215305737520f,
-  0.882643339979562790f, -0.470043332459595620f, 0.882282561676008710f,
-  -0.470720173099071600f,
-  0.881921264348355050f, -0.471396736825997640f, 0.881559448209143780f,
-  -0.472073023242368660f,
-  0.881197113471222090f, -0.472749031950342790f, 0.880834260347742040f,
-  -0.473424762552241530f,
-  0.880470889052160750f, -0.474100214650549970f, 0.880106999798240360f,
-  -0.474775387847917120f,
-  0.879742592800047410f, -0.475450281747155870f, 0.879377668271953290f,
-  -0.476124895951243580f,
-  0.879012226428633530f, -0.476799230063322090f, 0.878646267485068130f,
-  -0.477473283686698060f,
-  0.878279791656541580f, -0.478147056424843010f, 0.877912799158641840f,
-  -0.478820547881393890f,
-  0.877545290207261350f, -0.479493757660153010f, 0.877177265018595940f,
-  -0.480166685365088390f,
-  0.876808723809145650f, -0.480839330600333960f, 0.876439666795713610f,
-  -0.481511692970189860f,
-  0.876070094195406600f, -0.482183772079122720f, 0.875700006225634600f,
-  -0.482855567531765670f,
-  0.875329403104110890f, -0.483527078932918740f, 0.874958285048851650f,
-  -0.484198305887549030f,
-  0.874586652278176110f, -0.484869248000791060f, 0.874214505010706300f,
-  -0.485539904877946960f,
-  0.873841843465366860f, -0.486210276124486420f, 0.873468667861384880f,
-  -0.486880361346047340f,
-  0.873094978418290090f, -0.487550160148436000f, 0.872720775355914300f,
-  -0.488219672137626790f,
-  0.872346058894391540f, -0.488888896919763170f, 0.871970829254157810f,
-  -0.489557834101157440f,
-  0.871595086655950980f, -0.490226483288291160f, 0.871218831320811020f,
-  -0.490894844087815090f,
-  0.870842063470078980f, -0.491562916106549900f, 0.870464783325397670f,
-  -0.492230698951486020f,
-  0.870086991108711460f, -0.492898192229784040f, 0.869708687042265670f,
-  -0.493565395548774770f,
-  0.869329871348606840f, -0.494232308515959670f, 0.868950544250582380f,
-  -0.494898930739011260f,
-  0.868570705971340900f, -0.495565261825772540f, 0.868190356734331310f,
-  -0.496231301384258250f,
-  0.867809496763303320f, -0.496897049022654470f, 0.867428126282306920f,
-  -0.497562504349319150f,
-  0.867046245515692650f, -0.498227666972781870f, 0.866663854688111130f,
-  -0.498892536501744590f,
-  0.866280954024512990f, -0.499557112545081840f, 0.865897543750148820f,
-  -0.500221394711840680f,
-  0.865513624090569090f, -0.500885382611240710f, 0.865129195271623800f,
-  -0.501549075852675390f,
-  0.864744257519462380f, -0.502212474045710790f, 0.864358811060534030f,
-  -0.502875576800086990f,
-  0.863972856121586810f, -0.503538383725717580f, 0.863586392929668100f,
-  -0.504200894432690340f,
-  0.863199421712124160f, -0.504863108531267590f, 0.862811942696600330f,
-  -0.505525025631885390f,
-  0.862423956111040610f, -0.506186645345155230f, 0.862035462183687210f,
-  -0.506847967281863210f,
-  0.861646461143081300f, -0.507508991052970870f, 0.861256953218062170f,
-  -0.508169716269614600f,
-  0.860866938637767310f, -0.508830142543106990f, 0.860476417631632070f,
-  -0.509490269484936360f,
-  0.860085390429390140f, -0.510150096706766810f, 0.859693857261072610f,
-  -0.510809623820439040f,
-  0.859301818357008470f, -0.511468850437970300f, 0.858909273947823900f,
-  -0.512127776171554690f,
-  0.858516224264442740f, -0.512786400633562960f, 0.858122669538086140f,
-  -0.513444723436543460f,
-  0.857728610000272120f, -0.514102744193221660f, 0.857334045882815590f,
-  -0.514760462516501200f,
-  0.856938977417828760f, -0.515417878019462930f, 0.856543404837719960f,
-  -0.516074990315366630f,
-  0.856147328375194470f, -0.516731799017649870f, 0.855750748263253920f,
-  -0.517388303739929060f,
-  0.855353664735196030f, -0.518044504095999340f, 0.854956078024614930f,
-  -0.518700399699834950f,
-  0.854557988365400530f, -0.519355990165589640f, 0.854159395991738850f,
-  -0.520011275107596040f,
-  0.853760301138111410f, -0.520666254140367160f, 0.853360704039295430f,
-  -0.521320926878595660f,
-  0.852960604930363630f, -0.521975292937154390f, 0.852560004046684080f,
-  -0.522629351931096610f,
-  0.852158901623919830f, -0.523283103475656430f, 0.851757297898029120f,
-  -0.523936547186248600f,
-  0.851355193105265200f, -0.524589682678468950f, 0.850952587482175730f,
-  -0.525242509568094710f,
-  0.850549481265603480f, -0.525895027471084630f, 0.850145874692685210f,
-  -0.526547236003579440f,
-  0.849741768000852550f, -0.527199134781901280f, 0.849337161427830780f,
-  -0.527850723422555230f,
-  0.848932055211639610f, -0.528502001542228480f, 0.848526449590592650f,
-  -0.529152968757790610f,
-  0.848120344803297230f, -0.529803624686294610f, 0.847713741088654380f,
-  -0.530453968944976320f,
-  0.847306638685858320f, -0.531104001151255000f, 0.846899037834397240f,
-  -0.531753720922733320f,
-  0.846490938774052130f, -0.532403127877197900f, 0.846082341744897050f,
-  -0.533052221632619450f,
-  0.845673246987299070f, -0.533701001807152960f, 0.845263654741918220f,
-  -0.534349468019137520f,
-  0.844853565249707120f, -0.534997619887097150f, 0.844442978751910660f,
-  -0.535645457029741090f,
-  0.844031895490066410f, -0.536292979065963180f, 0.843620315706004150f,
-  -0.536940185614842910f,
-  0.843208239641845440f, -0.537587076295645390f, 0.842795667540004120f,
-  -0.538233650727821700f,
-  0.842382599643185850f, -0.538879908531008420f, 0.841969036194387680f,
-  -0.539525849325028890f,
-  0.841554977436898440f, -0.540171472729892850f, 0.841140423614298080f,
-  -0.540816778365796670f,
-  0.840725374970458070f, -0.541461765853123440f, 0.840309831749540770f,
-  -0.542106434812443920f,
-  0.839893794195999520f, -0.542750784864515890f, 0.839477262554578550f,
-  -0.543394815630284800f,
-  0.839060237070312740f, -0.544038526730883820f, 0.838642717988527300f,
-  -0.544681917787634530f,
-  0.838224705554838080f, -0.545324988422046460f, 0.837806200015150940f,
-  -0.545967738255817570f,
-  0.837387201615661940f, -0.546610166910834860f, 0.836967710602857020f,
-  -0.547252274009174090f,
-  0.836547727223512010f, -0.547894059173100190f, 0.836127251724692270f,
-  -0.548535522025067390f,
-  0.835706284353752600f, -0.549176662187719660f, 0.835284825358337370f,
-  -0.549817479283890910f,
-  0.834862874986380010f, -0.550457972936604810f, 0.834440433486103190f,
-  -0.551098142769075430f,
-  0.834017501106018130f, -0.551737988404707340f, 0.833594078094925140f,
-  -0.552377509467096070f,
-  0.833170164701913190f, -0.553016705580027470f, 0.832745761176359460f,
-  -0.553655576367479310f,
-  0.832320867767929680f, -0.554294121453620000f, 0.831895484726577590f,
-  -0.554932340462810370f,
-  0.831469612302545240f, -0.555570233019602180f, 0.831043250746362320f,
-  -0.556207798748739930f,
-  0.830616400308846310f, -0.556845037275160100f, 0.830189061241102370f,
-  -0.557481948223991550f,
-  0.829761233794523050f, -0.558118531220556100f, 0.829332918220788250f,
-  -0.558754785890368310f,
-  0.828904114771864870f, -0.559390711859136140f, 0.828474823700007130f,
-  -0.560026308752760380f,
-  0.828045045257755800f, -0.560661576197336030f, 0.827614779697938400f,
-  -0.561296513819151470f,
-  0.827184027273669130f, -0.561931121244689470f, 0.826752788238348520f,
-  -0.562565398100626560f,
-  0.826321062845663530f, -0.563199344013834090f, 0.825888851349586780f,
-  -0.563832958611378170f,
-  0.825456154004377550f, -0.564466241520519500f, 0.825022971064580220f,
-  -0.565099192368713980f,
-  0.824589302785025290f, -0.565731810783613120f, 0.824155149420828570f,
-  -0.566364096393063840f,
-  0.823720511227391430f, -0.566996048825108680f, 0.823285388460400110f,
-  -0.567627667707986230f,
-  0.822849781375826430f, -0.568258952670131490f, 0.822413690229926390f,
-  -0.568889903340175860f,
-  0.821977115279241550f, -0.569520519346947140f, 0.821540056780597610f,
-  -0.570150800319470300f,
-  0.821102514991104650f, -0.570780745886967260f, 0.820664490168157460f,
-  -0.571410355678857230f,
-  0.820225982569434690f, -0.572039629324757050f, 0.819786992452898990f,
-  -0.572668566454481160f,
-  0.819347520076796900f, -0.573297166698042200f, 0.818907565699658950f,
-  -0.573925429685650750f,
-  0.818467129580298660f, -0.574553355047715760f, 0.818026211977813440f,
-  -0.575180942414845080f,
-  0.817584813151583710f, -0.575808191417845340f, 0.817142933361272970f,
-  -0.576435101687721830f,
-  0.816700572866827850f, -0.577061672855679440f, 0.816257731928477390f,
-  -0.577687904553122800f,
-  0.815814410806733780f, -0.578313796411655590f, 0.815370609762391290f,
-  -0.578939348063081780f,
-  0.814926329056526620f, -0.579564559139405630f, 0.814481568950498610f,
-  -0.580189429272831680f,
-  0.814036329705948410f, -0.580813958095764530f, 0.813590611584798510f,
-  -0.581438145240810170f,
-  0.813144414849253590f, -0.582061990340775440f, 0.812697739761799490f,
-  -0.582685493028668460f,
-  0.812250586585203880f, -0.583308652937698290f, 0.811802955582515470f,
-  -0.583931469701276180f,
-  0.811354847017063730f, -0.584553942953015330f, 0.810906261152459670f,
-  -0.585176072326730410f,
-  0.810457198252594770f, -0.585797857456438860f, 0.810007658581641140f,
-  -0.586419297976360500f,
-  0.809557642404051260f, -0.587040393520917970f, 0.809107149984558240f,
-  -0.587661143724736660f,
-  0.808656181588174980f, -0.588281548222645220f, 0.808204737480194720f,
-  -0.588901606649675720f,
-  0.807752817926190360f, -0.589521318641063940f, 0.807300423192014450f,
-  -0.590140683832248820f,
-  0.806847553543799330f, -0.590759701858874160f, 0.806394209247956240f,
-  -0.591378372356787580f,
-  0.805940390571176280f, -0.591996694962040990f, 0.805486097780429230f,
-  -0.592614669310891130f,
-  0.805031331142963660f, -0.593232295039799800f, 0.804576090926307110f,
-  -0.593849571785433630f,
-  0.804120377398265810f, -0.594466499184664430f, 0.803664190826924090f,
-  -0.595083076874569960f,
-  0.803207531480644940f, -0.595699304492433360f, 0.802750399628069160f,
-  -0.596315181675743710f,
-  0.802292795538115720f, -0.596930708062196500f, 0.801834719479981310f,
-  -0.597545883289693160f,
-  0.801376171723140240f, -0.598160706996342270f, 0.800917152537344300f,
-  -0.598775178820458720f,
-  0.800457662192622820f, -0.599389298400564540f, 0.799997700959281910f,
-  -0.600003065375388940f,
-  0.799537269107905010f, -0.600616479383868970f, 0.799076366909352350f,
-  -0.601229540065148500f,
-  0.798614994634760820f, -0.601842247058580030f, 0.798153152555543750f,
-  -0.602454600003723750f,
-  0.797690840943391160f, -0.603066598540348160f, 0.797228060070268810f,
-  -0.603678242308430370f,
-  0.796764810208418830f, -0.604289530948155960f, 0.796301091630359110f,
-  -0.604900464099919820f,
-  0.795836904608883570f, -0.605511041404325550f, 0.795372249417061310f,
-  -0.606121262502186120f,
-  0.794907126328237010f, -0.606731127034524480f, 0.794441535616030590f,
-  -0.607340634642572930f,
-  0.793975477554337170f, -0.607949784967773630f, 0.793508952417326660f,
-  -0.608558577651779450f,
-  0.793041960479443640f, -0.609167012336453210f, 0.792574502015407690f,
-  -0.609775088663868430f,
-  0.792106577300212390f, -0.610382806276309480f, 0.791638186609125880f,
-  -0.610990164816271660f,
-  0.791169330217690200f, -0.611597163926461910f, 0.790700008401721610f,
-  -0.612203803249797950f,
-  0.790230221437310030f, -0.612810082429409710f, 0.789759969600819070f,
-  -0.613416001108638590f,
-  0.789289253168885650f, -0.614021558931038380f, 0.788818072418420280f,
-  -0.614626755540375050f,
-  0.788346427626606340f, -0.615231590580626820f, 0.787874319070900220f,
-  -0.615836063695985090f,
-  0.787401747029031430f, -0.616440174530853650f, 0.786928711779001810f,
-  -0.617043922729849760f,
-  0.786455213599085770f, -0.617647307937803870f, 0.785981252767830150f,
-  -0.618250329799760250f,
-  0.785506829564053930f, -0.618852987960976320f, 0.785031944266848080f,
-  -0.619455282066924020f,
-  0.784556597155575240f, -0.620057211763289100f, 0.784080788509869950f,
-  -0.620658776695972140f,
-  0.783604518609638200f, -0.621259976511087550f, 0.783127787735057310f,
-  -0.621860810854965360f,
-  0.782650596166575730f, -0.622461279374149970f, 0.782172944184913010f,
-  -0.623061381715401260f,
-  0.781694832071059390f, -0.623661117525694530f, 0.781216260106276090f,
-  -0.624260486452220650f,
-  0.780737228572094490f, -0.624859488142386340f, 0.780257737750316590f,
-  -0.625458122243814360f,
-  0.779777787923014550f, -0.626056388404343520f, 0.779297379372530300f,
-  -0.626654286272029350f,
-  0.778816512381475980f, -0.627251815495144080f, 0.778335187232733210f,
-  -0.627848975722176460f,
-  0.777853404209453150f, -0.628445766601832710f, 0.777371163595056310f,
-  -0.629042187783036000f,
-  0.776888465673232440f, -0.629638238914926980f, 0.776405310727940390f,
-  -0.630233919646864370f,
-  0.775921699043407690f, -0.630829229628424470f, 0.775437630904130540f,
-  -0.631424168509401860f,
-  0.774953106594873930f, -0.632018735939809060f, 0.774468126400670860f,
-  -0.632612931569877410f,
-  0.773982690606822900f, -0.633206755050057190f, 0.773496799498899050f,
-  -0.633800206031017280f,
-  0.773010453362736990f, -0.634393284163645490f, 0.772523652484441330f,
-  -0.634985989099049460f,
-  0.772036397150384520f, -0.635578320488556110f, 0.771548687647206300f,
-  -0.636170277983712170f,
-  0.771060524261813820f, -0.636761861236284200f, 0.770571907281380810f,
-  -0.637353069898259130f,
-  0.770082836993347900f, -0.637943903621844060f, 0.769593313685422940f,
-  -0.638534362059466790f,
-  0.769103337645579700f, -0.639124444863775730f, 0.768612909162058380f,
-  -0.639714151687640450f,
-  0.768122028523365420f, -0.640303482184151670f, 0.767630696018273380f,
-  -0.640892436006621380f,
-  0.767138911935820400f, -0.641481012808583160f, 0.766646676565310380f,
-  -0.642069212243792540f,
-  0.766153990196312920f, -0.642657033966226860f, 0.765660853118662500f,
-  -0.643244477630085850f,
-  0.765167265622458960f, -0.643831542889791390f, 0.764673227998067140f,
-  -0.644418229399988380f,
-  0.764178740536116670f, -0.645004536815543930f, 0.763683803527501870f,
-  -0.645590464791548690f,
-  0.763188417263381270f, -0.646176012983316280f, 0.762692582035177980f,
-  -0.646761181046383920f,
-  0.762196298134578900f, -0.647345968636512060f, 0.761699565853535380f,
-  -0.647930375409685340f,
-  0.761202385484261780f, -0.648514401022112440f, 0.760704757319236920f,
-  -0.649098045130225950f,
-  0.760206681651202420f, -0.649681307390683190f, 0.759708158773163440f,
-  -0.650264187460365850f,
-  0.759209188978388070f, -0.650846684996380880f, 0.758709772560407390f,
-  -0.651428799656059820f,
-  0.758209909813015280f, -0.652010531096959500f, 0.757709601030268080f,
-  -0.652591878976862440f,
-  0.757208846506484570f, -0.653172842953776760f, 0.756707646536245670f,
-  -0.653753422685936060f,
-  0.756206001414394540f, -0.654333617831800440f, 0.755703911436035880f,
-  -0.654913428050056030f,
-  0.755201376896536550f, -0.655492852999615350f, 0.754698398091524500f,
-  -0.656071892339617600f,
-  0.754194975316889170f, -0.656650545729428940f, 0.753691108868781210f,
-  -0.657228812828642540f,
-  0.753186799043612520f, -0.657806693297078640f, 0.752682046138055340f,
-  -0.658384186794785050f,
-  0.752176850449042810f, -0.658961292982037320f, 0.751671212273768430f,
-  -0.659538011519338660f,
-  0.751165131909686480f, -0.660114342067420480f, 0.750658609654510700f,
-  -0.660690284287242300f,
-  0.750151645806215070f, -0.661265837839992270f, 0.749644240663033480f,
-  -0.661841002387086870f,
-  0.749136394523459370f, -0.662415777590171780f, 0.748628107686245440f,
-  -0.662990163111121470f,
-  0.748119380450403600f, -0.663564158612039770f, 0.747610213115205150f,
-  -0.664137763755260010f,
-  0.747100605980180130f, -0.664710978203344790f, 0.746590559345117310f,
-  -0.665283801619087180f,
-  0.746080073510063780f, -0.665856233665509720f, 0.745569148775325430f,
-  -0.666428274005865240f,
-  0.745057785441466060f, -0.666999922303637470f, 0.744545983809307370f,
-  -0.667571178222540310f,
-  0.744033744179929290f, -0.668142041426518450f, 0.743521066854669120f,
-  -0.668712511579747980f,
-  0.743007952135121720f, -0.669282588346636010f, 0.742494400323139180f,
-  -0.669852271391821020f,
-  0.741980411720831070f, -0.670421560380173090f, 0.741465986630563290f,
-  -0.670990454976794220f,
-  0.740951125354959110f, -0.671558954847018330f, 0.740435828196898020f,
-  -0.672127059656411730f,
-  0.739920095459516200f, -0.672694769070772860f, 0.739403927446205760f,
-  -0.673262082756132970f,
-  0.738887324460615110f, -0.673829000378756040f, 0.738370286806648620f,
-  -0.674395521605139050f,
-  0.737852814788465980f, -0.674961646102011930f, 0.737334908710482910f,
-  -0.675527373536338520f,
-  0.736816568877369900f, -0.676092703575315920f, 0.736297795594053170f,
-  -0.676657635886374950f,
-  0.735778589165713590f, -0.677222170137180330f, 0.735258949897786840f,
-  -0.677786305995631500f,
-  0.734738878095963500f, -0.678350043129861470f, 0.734218374066188280f,
-  -0.678913381208238410f,
-  0.733697438114660370f, -0.679476319899364970f, 0.733176070547832740f,
-  -0.680038858872078930f,
-  0.732654271672412820f, -0.680600997795453020f, 0.732132041795361290f,
-  -0.681162736338795430f,
-  0.731609381223892630f, -0.681724074171649710f, 0.731086290265474340f,
-  -0.682285010963795570f,
-  0.730562769227827590f, -0.682845546385248080f, 0.730038818418926260f,
-  -0.683405680106258680f,
-  0.729514438146997010f, -0.683965411797315400f, 0.728989628720519420f,
-  -0.684524741129142300f,
-  0.728464390448225200f, -0.685083667772700360f, 0.727938723639098620f,
-  -0.685642191399187470f,
-  0.727412628602375770f, -0.686200311680038590f, 0.726886105647544970f,
-  -0.686758028286925890f,
-  0.726359155084346010f, -0.687315340891759050f, 0.725831777222770370f,
-  -0.687872249166685550f,
-  0.725303972373060770f, -0.688428752784090440f, 0.724775740845711280f,
-  -0.688984851416597040f,
-  0.724247082951467000f, -0.689540544737066830f, 0.723717999001323500f,
-  -0.690095832418599950f,
-  0.723188489306527460f, -0.690650714134534600f, 0.722658554178575610f,
-  -0.691205189558448450f,
-  0.722128193929215350f, -0.691759258364157750f, 0.721597408870443770f,
-  -0.692312920225718220f,
-  0.721066199314508110f, -0.692866174817424630f, 0.720534565573905270f,
-  -0.693419021813811760f,
-  0.720002507961381650f, -0.693971460889654000f, 0.719470026789932990f,
-  -0.694523491719965520f,
-  0.718937122372804490f, -0.695075113980000880f, 0.718403795023489830f,
-  -0.695626327345254870f,
-  0.717870045055731710f, -0.696177131491462990f, 0.717335872783521730f,
-  -0.696727526094601200f,
-  0.716801278521099540f, -0.697277510830886520f, 0.716266262582953120f,
-  -0.697827085376777290f,
-  0.715730825283818590f, -0.698376249408972920f, 0.715194966938680120f,
-  -0.698925002604414150f,
-  0.714658687862769090f, -0.699473344640283770f, 0.714121988371564820f,
-  -0.700021275194006250f,
-  0.713584868780793640f, -0.700568793943248340f, 0.713047329406429340f,
-  -0.701115900565918660f,
-  0.712509370564692320f, -0.701662594740168450f, 0.711970992572050100f,
-  -0.702208876144391870f,
-  0.711432195745216430f, -0.702754744457225300f, 0.710892980401151680f,
-  -0.703300199357548730f,
-  0.710353346857062420f, -0.703845240524484940f, 0.709813295430400840f,
-  -0.704389867637400410f,
-  0.709272826438865690f, -0.704934080375904880f, 0.708731940200400650f,
-  -0.705477878419852100f,
-  0.708190637033195400f, -0.706021261449339740f, 0.707648917255684350f,
-  -0.706564229144709510f,
-  0.707106781186547570f, -0.707106781186547460f, 0.706564229144709620f,
-  -0.707648917255684350f,
-  0.706021261449339740f, -0.708190637033195290f, 0.705477878419852210f,
-  -0.708731940200400650f,
-  0.704934080375904990f, -0.709272826438865580f, 0.704389867637400410f,
-  -0.709813295430400840f,
-  0.703845240524484940f, -0.710353346857062310f, 0.703300199357548730f,
-  -0.710892980401151680f,
-  0.702754744457225300f, -0.711432195745216430f, 0.702208876144391870f,
-  -0.711970992572049990f,
-  0.701662594740168570f, -0.712509370564692320f, 0.701115900565918660f,
-  -0.713047329406429230f,
-  0.700568793943248450f, -0.713584868780793520f, 0.700021275194006360f,
-  -0.714121988371564710f,
-  0.699473344640283770f, -0.714658687862768980f, 0.698925002604414150f,
-  -0.715194966938680010f,
-  0.698376249408972920f, -0.715730825283818590f, 0.697827085376777290f,
-  -0.716266262582953120f,
-  0.697277510830886630f, -0.716801278521099540f, 0.696727526094601200f,
-  -0.717335872783521730f,
-  0.696177131491462990f, -0.717870045055731710f, 0.695626327345254870f,
-  -0.718403795023489720f,
-  0.695075113980000880f, -0.718937122372804380f, 0.694523491719965520f,
-  -0.719470026789932990f,
-  0.693971460889654000f, -0.720002507961381650f, 0.693419021813811880f,
-  -0.720534565573905270f,
-  0.692866174817424740f, -0.721066199314508110f, 0.692312920225718220f,
-  -0.721597408870443660f,
-  0.691759258364157750f, -0.722128193929215350f, 0.691205189558448450f,
-  -0.722658554178575610f,
-  0.690650714134534720f, -0.723188489306527350f, 0.690095832418599950f,
-  -0.723717999001323390f,
-  0.689540544737066940f, -0.724247082951466890f, 0.688984851416597150f,
-  -0.724775740845711280f,
-  0.688428752784090550f, -0.725303972373060660f, 0.687872249166685550f,
-  -0.725831777222770370f,
-  0.687315340891759160f, -0.726359155084346010f, 0.686758028286925890f,
-  -0.726886105647544970f,
-  0.686200311680038700f, -0.727412628602375770f, 0.685642191399187470f,
-  -0.727938723639098620f,
-  0.685083667772700360f, -0.728464390448225200f, 0.684524741129142300f,
-  -0.728989628720519310f,
-  0.683965411797315510f, -0.729514438146996900f, 0.683405680106258790f,
-  -0.730038818418926150f,
-  0.682845546385248080f, -0.730562769227827590f, 0.682285010963795570f,
-  -0.731086290265474230f,
-  0.681724074171649820f, -0.731609381223892520f, 0.681162736338795430f,
-  -0.732132041795361290f,
-  0.680600997795453130f, -0.732654271672412820f, 0.680038858872079040f,
-  -0.733176070547832740f,
-  0.679476319899365080f, -0.733697438114660260f, 0.678913381208238410f,
-  -0.734218374066188170f,
-  0.678350043129861580f, -0.734738878095963390f, 0.677786305995631500f,
-  -0.735258949897786730f,
-  0.677222170137180450f, -0.735778589165713480f, 0.676657635886374950f,
-  -0.736297795594053060f,
-  0.676092703575316030f, -0.736816568877369790f, 0.675527373536338630f,
-  -0.737334908710482790f,
-  0.674961646102012040f, -0.737852814788465980f, 0.674395521605139050f,
-  -0.738370286806648510f,
-  0.673829000378756150f, -0.738887324460615110f, 0.673262082756132970f,
-  -0.739403927446205760f,
-  0.672694769070772970f, -0.739920095459516090f, 0.672127059656411840f,
-  -0.740435828196898020f,
-  0.671558954847018330f, -0.740951125354959110f, 0.670990454976794220f,
-  -0.741465986630563290f,
-  0.670421560380173090f, -0.741980411720830960f, 0.669852271391821130f,
-  -0.742494400323139180f,
-  0.669282588346636010f, -0.743007952135121720f, 0.668712511579748090f,
-  -0.743521066854669120f,
-  0.668142041426518560f, -0.744033744179929180f, 0.667571178222540310f,
-  -0.744545983809307250f,
-  0.666999922303637470f, -0.745057785441465950f, 0.666428274005865350f,
-  -0.745569148775325430f,
-  0.665856233665509720f, -0.746080073510063780f, 0.665283801619087180f,
-  -0.746590559345117310f,
-  0.664710978203344900f, -0.747100605980180130f, 0.664137763755260010f,
-  -0.747610213115205150f,
-  0.663564158612039880f, -0.748119380450403490f, 0.662990163111121470f,
-  -0.748628107686245330f,
-  0.662415777590171780f, -0.749136394523459260f, 0.661841002387086870f,
-  -0.749644240663033480f,
-  0.661265837839992270f, -0.750151645806214960f, 0.660690284287242300f,
-  -0.750658609654510590f,
-  0.660114342067420480f, -0.751165131909686370f, 0.659538011519338770f,
-  -0.751671212273768430f,
-  0.658961292982037320f, -0.752176850449042700f, 0.658384186794785050f,
-  -0.752682046138055230f,
-  0.657806693297078640f, -0.753186799043612410f, 0.657228812828642650f,
-  -0.753691108868781210f,
-  0.656650545729429050f, -0.754194975316889170f, 0.656071892339617710f,
-  -0.754698398091524390f,
-  0.655492852999615460f, -0.755201376896536550f, 0.654913428050056150f,
-  -0.755703911436035880f,
-  0.654333617831800550f, -0.756206001414394540f, 0.653753422685936170f,
-  -0.756707646536245670f,
-  0.653172842953776760f, -0.757208846506484460f, 0.652591878976862550f,
-  -0.757709601030268080f,
-  0.652010531096959500f, -0.758209909813015280f, 0.651428799656059820f,
-  -0.758709772560407390f,
-  0.650846684996380990f, -0.759209188978387960f, 0.650264187460365960f,
-  -0.759708158773163440f,
-  0.649681307390683190f, -0.760206681651202420f, 0.649098045130226060f,
-  -0.760704757319236920f,
-  0.648514401022112550f, -0.761202385484261780f, 0.647930375409685460f,
-  -0.761699565853535270f,
-  0.647345968636512060f, -0.762196298134578900f, 0.646761181046383920f,
-  -0.762692582035177870f,
-  0.646176012983316390f, -0.763188417263381270f, 0.645590464791548800f,
-  -0.763683803527501870f,
-  0.645004536815544040f, -0.764178740536116670f, 0.644418229399988380f,
-  -0.764673227998067140f,
-  0.643831542889791500f, -0.765167265622458960f, 0.643244477630085850f,
-  -0.765660853118662390f,
-  0.642657033966226860f, -0.766153990196312810f, 0.642069212243792540f,
-  -0.766646676565310380f,
-  0.641481012808583160f, -0.767138911935820400f, 0.640892436006621380f,
-  -0.767630696018273270f,
-  0.640303482184151670f, -0.768122028523365310f, 0.639714151687640450f,
-  -0.768612909162058270f,
-  0.639124444863775730f, -0.769103337645579590f, 0.638534362059466790f,
-  -0.769593313685422940f,
-  0.637943903621844170f, -0.770082836993347900f, 0.637353069898259130f,
-  -0.770571907281380700f,
-  0.636761861236284200f, -0.771060524261813710f, 0.636170277983712170f,
-  -0.771548687647206300f,
-  0.635578320488556230f, -0.772036397150384410f, 0.634985989099049460f,
-  -0.772523652484441330f,
-  0.634393284163645490f, -0.773010453362736990f, 0.633800206031017280f,
-  -0.773496799498899050f,
-  0.633206755050057190f, -0.773982690606822790f, 0.632612931569877520f,
-  -0.774468126400670860f,
-  0.632018735939809060f, -0.774953106594873820f, 0.631424168509401860f,
-  -0.775437630904130430f,
-  0.630829229628424470f, -0.775921699043407580f, 0.630233919646864480f,
-  -0.776405310727940390f,
-  0.629638238914927100f, -0.776888465673232440f, 0.629042187783036000f,
-  -0.777371163595056200f,
-  0.628445766601832710f, -0.777853404209453040f, 0.627848975722176570f,
-  -0.778335187232733090f,
-  0.627251815495144190f, -0.778816512381475870f, 0.626654286272029460f,
-  -0.779297379372530300f,
-  0.626056388404343520f, -0.779777787923014440f, 0.625458122243814360f,
-  -0.780257737750316590f,
-  0.624859488142386450f, -0.780737228572094380f, 0.624260486452220650f,
-  -0.781216260106276090f,
-  0.623661117525694640f, -0.781694832071059390f, 0.623061381715401370f,
-  -0.782172944184912900f,
-  0.622461279374150080f, -0.782650596166575730f, 0.621860810854965360f,
-  -0.783127787735057310f,
-  0.621259976511087660f, -0.783604518609638200f, 0.620658776695972140f,
-  -0.784080788509869950f,
-  0.620057211763289210f, -0.784556597155575240f, 0.619455282066924020f,
-  -0.785031944266848080f,
-  0.618852987960976320f, -0.785506829564053930f, 0.618250329799760250f,
-  -0.785981252767830150f,
-  0.617647307937803980f, -0.786455213599085770f, 0.617043922729849760f,
-  -0.786928711779001700f,
-  0.616440174530853650f, -0.787401747029031320f, 0.615836063695985090f,
-  -0.787874319070900110f,
-  0.615231590580626820f, -0.788346427626606230f, 0.614626755540375050f,
-  -0.788818072418420170f,
-  0.614021558931038490f, -0.789289253168885650f, 0.613416001108638590f,
-  -0.789759969600819070f,
-  0.612810082429409710f, -0.790230221437310030f, 0.612203803249798060f,
-  -0.790700008401721610f,
-  0.611597163926462020f, -0.791169330217690090f, 0.610990164816271770f,
-  -0.791638186609125770f,
-  0.610382806276309480f, -0.792106577300212390f, 0.609775088663868430f,
-  -0.792574502015407580f,
-  0.609167012336453210f, -0.793041960479443640f, 0.608558577651779450f,
-  -0.793508952417326660f,
-  0.607949784967773740f, -0.793975477554337170f, 0.607340634642572930f,
-  -0.794441535616030590f,
-  0.606731127034524480f, -0.794907126328237010f, 0.606121262502186230f,
-  -0.795372249417061190f,
-  0.605511041404325550f, -0.795836904608883460f, 0.604900464099919930f,
-  -0.796301091630359110f,
-  0.604289530948156070f, -0.796764810208418720f, 0.603678242308430370f,
-  -0.797228060070268700f,
-  0.603066598540348280f, -0.797690840943391040f, 0.602454600003723860f,
-  -0.798153152555543750f,
-  0.601842247058580030f, -0.798614994634760820f, 0.601229540065148620f,
-  -0.799076366909352350f,
-  0.600616479383868970f, -0.799537269107905010f, 0.600003065375389060f,
-  -0.799997700959281910f,
-  0.599389298400564540f, -0.800457662192622710f, 0.598775178820458720f,
-  -0.800917152537344300f,
-  0.598160706996342380f, -0.801376171723140130f, 0.597545883289693270f,
-  -0.801834719479981310f,
-  0.596930708062196500f, -0.802292795538115720f, 0.596315181675743820f,
-  -0.802750399628069160f,
-  0.595699304492433470f, -0.803207531480644830f, 0.595083076874569960f,
-  -0.803664190826924090f,
-  0.594466499184664540f, -0.804120377398265700f, 0.593849571785433630f,
-  -0.804576090926307000f,
-  0.593232295039799800f, -0.805031331142963660f, 0.592614669310891130f,
-  -0.805486097780429120f,
-  0.591996694962040990f, -0.805940390571176280f, 0.591378372356787580f,
-  -0.806394209247956240f,
-  0.590759701858874280f, -0.806847553543799220f, 0.590140683832248940f,
-  -0.807300423192014450f,
-  0.589521318641063940f, -0.807752817926190360f, 0.588901606649675840f,
-  -0.808204737480194720f,
-  0.588281548222645330f, -0.808656181588174980f, 0.587661143724736770f,
-  -0.809107149984558130f,
-  0.587040393520918080f, -0.809557642404051260f, 0.586419297976360500f,
-  -0.810007658581641140f,
-  0.585797857456438860f, -0.810457198252594770f, 0.585176072326730410f,
-  -0.810906261152459670f,
-  0.584553942953015330f, -0.811354847017063730f, 0.583931469701276300f,
-  -0.811802955582515360f,
-  0.583308652937698290f, -0.812250586585203880f, 0.582685493028668460f,
-  -0.812697739761799490f,
-  0.582061990340775550f, -0.813144414849253590f, 0.581438145240810280f,
-  -0.813590611584798510f,
-  0.580813958095764530f, -0.814036329705948300f, 0.580189429272831680f,
-  -0.814481568950498610f,
-  0.579564559139405740f, -0.814926329056526620f, 0.578939348063081890f,
-  -0.815370609762391290f,
-  0.578313796411655590f, -0.815814410806733780f, 0.577687904553122800f,
-  -0.816257731928477390f,
-  0.577061672855679550f, -0.816700572866827850f, 0.576435101687721830f,
-  -0.817142933361272970f,
-  0.575808191417845340f, -0.817584813151583710f, 0.575180942414845190f,
-  -0.818026211977813440f,
-  0.574553355047715760f, -0.818467129580298660f, 0.573925429685650750f,
-  -0.818907565699658950f,
-  0.573297166698042320f, -0.819347520076796900f, 0.572668566454481160f,
-  -0.819786992452898990f,
-  0.572039629324757050f, -0.820225982569434690f, 0.571410355678857340f,
-  -0.820664490168157460f,
-  0.570780745886967370f, -0.821102514991104650f, 0.570150800319470300f,
-  -0.821540056780597610f,
-  0.569520519346947250f, -0.821977115279241550f, 0.568889903340175970f,
-  -0.822413690229926390f,
-  0.568258952670131490f, -0.822849781375826320f, 0.567627667707986230f,
-  -0.823285388460400110f,
-  0.566996048825108680f, -0.823720511227391320f, 0.566364096393063950f,
-  -0.824155149420828570f,
-  0.565731810783613230f, -0.824589302785025290f, 0.565099192368714090f,
-  -0.825022971064580220f,
-  0.564466241520519500f, -0.825456154004377440f, 0.563832958611378170f,
-  -0.825888851349586780f,
-  0.563199344013834090f, -0.826321062845663420f, 0.562565398100626560f,
-  -0.826752788238348520f,
-  0.561931121244689470f, -0.827184027273669020f, 0.561296513819151470f,
-  -0.827614779697938400f,
-  0.560661576197336030f, -0.828045045257755800f, 0.560026308752760380f,
-  -0.828474823700007130f,
-  0.559390711859136140f, -0.828904114771864870f, 0.558754785890368310f,
-  -0.829332918220788250f,
-  0.558118531220556100f, -0.829761233794523050f, 0.557481948223991660f,
-  -0.830189061241102370f,
-  0.556845037275160100f, -0.830616400308846200f, 0.556207798748739930f,
-  -0.831043250746362320f,
-  0.555570233019602290f, -0.831469612302545240f, 0.554932340462810370f,
-  -0.831895484726577590f,
-  0.554294121453620110f, -0.832320867767929680f, 0.553655576367479310f,
-  -0.832745761176359460f,
-  0.553016705580027580f, -0.833170164701913190f, 0.552377509467096070f,
-  -0.833594078094925140f,
-  0.551737988404707450f, -0.834017501106018130f, 0.551098142769075430f,
-  -0.834440433486103190f,
-  0.550457972936604810f, -0.834862874986380010f, 0.549817479283891020f,
-  -0.835284825358337370f,
-  0.549176662187719770f, -0.835706284353752600f, 0.548535522025067390f,
-  -0.836127251724692160f,
-  0.547894059173100190f, -0.836547727223511890f, 0.547252274009174090f,
-  -0.836967710602857020f,
-  0.546610166910834860f, -0.837387201615661940f, 0.545967738255817680f,
-  -0.837806200015150940f,
-  0.545324988422046460f, -0.838224705554837970f, 0.544681917787634530f,
-  -0.838642717988527300f,
-  0.544038526730883930f, -0.839060237070312630f, 0.543394815630284800f,
-  -0.839477262554578550f,
-  0.542750784864516000f, -0.839893794195999410f, 0.542106434812444030f,
-  -0.840309831749540770f,
-  0.541461765853123560f, -0.840725374970458070f, 0.540816778365796670f,
-  -0.841140423614298080f,
-  0.540171472729892970f, -0.841554977436898330f, 0.539525849325029010f,
-  -0.841969036194387680f,
-  0.538879908531008420f, -0.842382599643185960f, 0.538233650727821700f,
-  -0.842795667540004120f,
-  0.537587076295645510f, -0.843208239641845440f, 0.536940185614843020f,
-  -0.843620315706004040f,
-  0.536292979065963180f, -0.844031895490066410f, 0.535645457029741090f,
-  -0.844442978751910660f,
-  0.534997619887097260f, -0.844853565249707010f, 0.534349468019137520f,
-  -0.845263654741918220f,
-  0.533701001807152960f, -0.845673246987299070f, 0.533052221632619670f,
-  -0.846082341744896940f,
-  0.532403127877198010f, -0.846490938774052020f, 0.531753720922733320f,
-  -0.846899037834397350f,
-  0.531104001151255000f, -0.847306638685858320f, 0.530453968944976320f,
-  -0.847713741088654270f,
-  0.529803624686294830f, -0.848120344803297120f, 0.529152968757790720f,
-  -0.848526449590592650f,
-  0.528502001542228480f, -0.848932055211639610f, 0.527850723422555460f,
-  -0.849337161427830670f,
-  0.527199134781901390f, -0.849741768000852440f, 0.526547236003579330f,
-  -0.850145874692685210f,
-  0.525895027471084740f, -0.850549481265603370f, 0.525242509568094710f,
-  -0.850952587482175730f,
-  0.524589682678468840f, -0.851355193105265200f, 0.523936547186248600f,
-  -0.851757297898029120f,
-  0.523283103475656430f, -0.852158901623919830f, 0.522629351931096720f,
-  -0.852560004046683970f,
-  0.521975292937154390f, -0.852960604930363630f, 0.521320926878595550f,
-  -0.853360704039295430f,
-  0.520666254140367270f, -0.853760301138111300f, 0.520011275107596040f,
-  -0.854159395991738730f,
-  0.519355990165589530f, -0.854557988365400530f, 0.518700399699835170f,
-  -0.854956078024614820f,
-  0.518044504095999340f, -0.855353664735196030f, 0.517388303739929060f,
-  -0.855750748263253920f,
-  0.516731799017649980f, -0.856147328375194470f, 0.516074990315366630f,
-  -0.856543404837719960f,
-  0.515417878019463150f, -0.856938977417828650f, 0.514760462516501200f,
-  -0.857334045882815590f,
-  0.514102744193221660f, -0.857728610000272120f, 0.513444723436543570f,
-  -0.858122669538086020f,
-  0.512786400633563070f, -0.858516224264442740f, 0.512127776171554690f,
-  -0.858909273947823900f,
-  0.511468850437970520f, -0.859301818357008360f, 0.510809623820439040f,
-  -0.859693857261072610f,
-  0.510150096706766700f, -0.860085390429390140f, 0.509490269484936360f,
-  -0.860476417631632070f,
-  0.508830142543106990f, -0.860866938637767310f, 0.508169716269614710f,
-  -0.861256953218062060f,
-  0.507508991052970870f, -0.861646461143081300f, 0.506847967281863320f,
-  -0.862035462183687210f,
-  0.506186645345155450f, -0.862423956111040500f, 0.505525025631885510f,
-  -0.862811942696600330f,
-  0.504863108531267480f, -0.863199421712124160f, 0.504200894432690560f,
-  -0.863586392929667990f,
-  0.503538383725717580f, -0.863972856121586700f, 0.502875576800086880f,
-  -0.864358811060534030f,
-  0.502212474045710900f, -0.864744257519462380f, 0.501549075852675390f,
-  -0.865129195271623690f,
-  0.500885382611240940f, -0.865513624090568980f, 0.500221394711840680f,
-  -0.865897543750148820f,
-  0.499557112545081890f, -0.866280954024512990f, 0.498892536501744750f,
-  -0.866663854688111020f,
-  0.498227666972781870f, -0.867046245515692650f, 0.497562504349319090f,
-  -0.867428126282306920f,
-  0.496897049022654640f, -0.867809496763303210f, 0.496231301384258310f,
-  -0.868190356734331310f,
-  0.495565261825772490f, -0.868570705971340900f, 0.494898930739011310f,
-  -0.868950544250582380f,
-  0.494232308515959730f, -0.869329871348606730f, 0.493565395548774880f,
-  -0.869708687042265560f,
-  0.492898192229784090f, -0.870086991108711350f, 0.492230698951486080f,
-  -0.870464783325397670f,
-  0.491562916106550060f, -0.870842063470078860f, 0.490894844087815140f,
-  -0.871218831320810900f,
-  0.490226483288291100f, -0.871595086655951090f, 0.489557834101157550f,
-  -0.871970829254157700f,
-  0.488888896919763230f, -0.872346058894391540f, 0.488219672137626740f,
-  -0.872720775355914300f,
-  0.487550160148436050f, -0.873094978418290090f, 0.486880361346047400f,
-  -0.873468667861384880f,
-  0.486210276124486530f, -0.873841843465366750f, 0.485539904877947020f,
-  -0.874214505010706300f,
-  0.484869248000791120f, -0.874586652278176110f, 0.484198305887549140f,
-  -0.874958285048851540f,
-  0.483527078932918740f, -0.875329403104110780f, 0.482855567531765670f,
-  -0.875700006225634600f,
-  0.482183772079122830f, -0.876070094195406600f, 0.481511692970189920f,
-  -0.876439666795713610f,
-  0.480839330600333900f, -0.876808723809145760f, 0.480166685365088440f,
-  -0.877177265018595940f,
-  0.479493757660153010f, -0.877545290207261240f, 0.478820547881394050f,
-  -0.877912799158641730f,
-  0.478147056424843120f, -0.878279791656541460f, 0.477473283686698060f,
-  -0.878646267485068130f,
-  0.476799230063322250f, -0.879012226428633410f, 0.476124895951243630f,
-  -0.879377668271953180f,
-  0.475450281747155870f, -0.879742592800047410f, 0.474775387847917230f,
-  -0.880106999798240360f,
-  0.474100214650550020f, -0.880470889052160750f, 0.473424762552241530f,
-  -0.880834260347742040f,
-  0.472749031950342900f, -0.881197113471221980f, 0.472073023242368660f,
-  -0.881559448209143780f,
-  0.471396736825997810f, -0.881921264348354940f, 0.470720173099071710f,
-  -0.882282561676008600f,
-  0.470043332459595620f, -0.882643339979562790f, 0.469366215305737630f,
-  -0.883003599046780720f,
-  0.468688822035827960f, -0.883363338665731580f, 0.468011153048359830f,
-  -0.883722558624789660f,
-  0.467333208741988530f, -0.884081258712634990f, 0.466654989515530970f,
-  -0.884439438718253700f,
-  0.465976495767966130f, -0.884797098430937790f, 0.465297727898434650f,
-  -0.885154237640285110f,
-  0.464618686306237820f, -0.885510856136199950f, 0.463939371390838460f,
-  -0.885866953708892790f,
-  0.463259783551860260f, -0.886222530148880640f, 0.462579923189086810f,
-  -0.886577585246987040f,
-  0.461899790702462840f, -0.886932118794342080f, 0.461219386492092430f,
-  -0.887286130582383150f,
-  0.460538710958240010f, -0.887639620402853930f, 0.459857764501329650f,
-  -0.887992588047805560f,
-  0.459176547521944150f, -0.888345033309596240f, 0.458495060420826220f,
-  -0.888696955980891710f,
-  0.457813303598877290f, -0.889048355854664570f, 0.457131277457156980f,
-  -0.889399232724195520f,
-  0.456448982396883860f, -0.889749586383072890f, 0.455766418819434750f,
-  -0.890099416625192210f,
-  0.455083587126343840f, -0.890448723244757880f, 0.454400487719303750f,
-  -0.890797506036281490f,
-  0.453717121000163930f, -0.891145764794583180f, 0.453033487370931580f,
-  -0.891493499314791380f,
-  0.452349587233771000f, -0.891840709392342720f, 0.451665420991002540f,
-  -0.892187394822982480f,
-  0.450980989045103810f, -0.892533555402764690f, 0.450296291798708730f,
-  -0.892879190928051680f,
-  0.449611329654606600f, -0.893224301195515320f, 0.448926103015743260f,
-  -0.893568886002136020f,
-  0.448240612285220000f, -0.893912945145203250f, 0.447554857866293010f,
-  -0.894256478422316040f,
-  0.446868840162374330f, -0.894599485631382580f, 0.446182559577030120f,
-  -0.894941966570620750f,
-  0.445496016513981740f, -0.895283921038557580f, 0.444809211377105000f,
-  -0.895625348834030000f,
-  0.444122144570429260f, -0.895966249756185110f, 0.443434816498138430f,
-  -0.896306623604479660f,
-  0.442747227564570130f, -0.896646470178680150f, 0.442059378174214760f,
-  -0.896985789278863970f,
-  0.441371268731716620f, -0.897324580705418320f, 0.440682899641873020f,
-  -0.897662844259040750f,
-  0.439994271309633260f, -0.898000579740739880f, 0.439305384140100060f,
-  -0.898337786951834190f,
-  0.438616238538527710f, -0.898674465693953820f, 0.437926834910322860f,
-  -0.899010615769039070f,
-  0.437237173661044200f, -0.899346236979341460f, 0.436547255196401250f,
-  -0.899681329127423930f,
-  0.435857079922255470f, -0.900015892016160280f, 0.435166648244619370f,
-  -0.900349925448735600f,
-  0.434475960569655710f, -0.900683429228646860f, 0.433785017303678520f,
-  -0.901016403159702330f,
-  0.433093818853152010f, -0.901348847046022030f, 0.432402365624690140f,
-  -0.901680760692037730f,
-  0.431710658025057370f, -0.902012143902493070f, 0.431018696461167080f,
-  -0.902342996482444200f,
-  0.430326481340082610f, -0.902673318237258830f, 0.429634013069016500f,
-  -0.903003108972617040f,
-  0.428941292055329550f, -0.903332368494511820f, 0.428248318706531910f,
-  -0.903661096609247980f,
-  0.427555093430282200f, -0.903989293123443340f, 0.426861616634386490f,
-  -0.904316957844028320f,
-  0.426167888726799620f, -0.904644090578246240f, 0.425473910115623910f,
-  -0.904970691133653250f,
-  0.424779681209108810f, -0.905296759318118820f, 0.424085202415651670f,
-  -0.905622294939825160f,
-  0.423390474143796100f, -0.905947297807268460f, 0.422695496802232950f,
-  -0.906271767729257660f,
-  0.422000270799799790f, -0.906595704514915330f, 0.421304796545479700f,
-  -0.906919107973678030f,
-  0.420609074448402510f, -0.907241977915295930f, 0.419913104917843730f,
-  -0.907564314149832520f,
-  0.419216888363223960f, -0.907886116487666150f, 0.418520425194109700f,
-  -0.908207384739488700f,
-  0.417823715820212380f, -0.908528118716306120f, 0.417126760651387870f,
-  -0.908848318229439120f,
-  0.416429560097637320f, -0.909167983090522270f, 0.415732114569105420f,
-  -0.909487113111505430f,
-  0.415034424476081630f, -0.909805708104652220f, 0.414336490228999210f,
-  -0.910123767882541570f,
-  0.413638312238434560f, -0.910441292258067140f, 0.412939890915108020f,
-  -0.910758281044437570f,
-  0.412241226669883000f, -0.911074734055176250f, 0.411542319913765280f,
-  -0.911390651104122320f,
-  0.410843171057903910f, -0.911706032005429880f, 0.410143780513590350f,
-  -0.912020876573568230f,
-  0.409444148692257590f, -0.912335184623322750f, 0.408744276005481520f,
-  -0.912648955969793900f,
-  0.408044162864978740f, -0.912962190428398100f, 0.407343809682607970f,
-  -0.913274887814867760f,
-  0.406643216870369140f, -0.913587047945250810f, 0.405942384840402570f,
-  -0.913898670635911680f,
-  0.405241314004989860f, -0.914209755703530690f, 0.404540004776553110f,
-  -0.914520302965104450f,
-  0.403838457567654130f, -0.914830312237946090f, 0.403136672790995240f,
-  -0.915139783339685260f,
-  0.402434650859418540f, -0.915448716088267830f, 0.401732392185905010f,
-  -0.915757110301956720f,
-  0.401029897183575790f, -0.916064965799331610f, 0.400327166265690150f,
-  -0.916372282399289140f,
-  0.399624199845646790f, -0.916679059921042700f, 0.398920998336983020f,
-  -0.916985298184122890f,
-  0.398217562153373620f, -0.917290997008377910f, 0.397513891708632330f,
-  -0.917596156213972950f,
-  0.396809987416710420f, -0.917900775621390390f, 0.396105849691696320f,
-  -0.918204855051430900f,
-  0.395401478947816300f, -0.918508394325212250f, 0.394696875599433670f,
-  -0.918811393264169940f,
-  0.393992040061048100f, -0.919113851690057770f, 0.393286972747296570f,
-  -0.919415769424946960f,
-  0.392581674072951530f, -0.919717146291227360f, 0.391876144452922350f,
-  -0.920017982111606570f,
-  0.391170384302253980f, -0.920318276709110480f, 0.390464394036126650f,
-  -0.920618029907083860f,
-  0.389758174069856410f, -0.920917241529189520f, 0.389051724818894500f,
-  -0.921215911399408730f,
-  0.388345046698826300f, -0.921514039342041900f, 0.387638140125372680f,
-  -0.921811625181708120f,
-  0.386931005514388690f, -0.922108668743345070f, 0.386223643281862980f,
-  -0.922405169852209880f,
-  0.385516053843919020f, -0.922701128333878520f, 0.384808237616812930f,
-  -0.922996544014246250f,
-  0.384100195016935040f, -0.923291416719527640f, 0.383391926460808770f,
-  -0.923585746276256560f,
-  0.382683432365089840f, -0.923879532511286740f, 0.381974713146567220f,
-  -0.924172775251791200f,
-  0.381265769222162490f, -0.924465474325262600f, 0.380556601008928570f,
-  -0.924757629559513910f,
-  0.379847208924051110f, -0.925049240782677580f, 0.379137593384847430f,
-  -0.925340307823206200f,
-  0.378427754808765620f, -0.925630830509872720f, 0.377717693613385810f,
-  -0.925920808671769960f,
-  0.377007410216418310f, -0.926210242138311270f, 0.376296905035704790f,
-  -0.926499130739230510f,
-  0.375586178489217330f, -0.926787474304581750f, 0.374875230995057600f,
-  -0.927075272664740100f,
-  0.374164062971457990f, -0.927362525650401110f, 0.373452674836780410f,
-  -0.927649233092581180f,
-  0.372741067009515810f, -0.927935394822617890f, 0.372029239908284960f,
-  -0.928221010672169440f,
-  0.371317193951837600f, -0.928506080473215480f, 0.370604929559051670f,
-  -0.928790604058057020f,
-  0.369892447148934270f, -0.929074581259315750f, 0.369179747140620070f,
-  -0.929358011909935500f,
-  0.368466829953372320f, -0.929640895843181330f, 0.367753696006582090f,
-  -0.929923232892639560f,
-  0.367040345719767240f, -0.930205022892219070f, 0.366326779512573590f,
-  -0.930486265676149780f,
-  0.365612997804773960f, -0.930766961078983710f, 0.364899001016267380f,
-  -0.931047108935595170f,
-  0.364184789567079840f, -0.931326709081180430f, 0.363470363877363870f,
-  -0.931605761351257830f,
-  0.362755724367397230f, -0.931884265581668150f, 0.362040871457584350f,
-  -0.932162221608574320f,
-  0.361325805568454340f, -0.932439629268462360f, 0.360610527120662270f,
-  -0.932716488398140250f,
-  0.359895036534988280f, -0.932992798834738850f, 0.359179334232336560f,
-  -0.933268560415712050f,
-  0.358463420633736540f, -0.933543772978836170f, 0.357747296160342010f,
-  -0.933818436362210960f,
-  0.357030961233430030f, -0.934092550404258870f, 0.356314416274402360f,
-  -0.934366114943725900f,
-  0.355597661704783960f, -0.934639129819680780f, 0.354880697946222790f,
-  -0.934911594871516090f,
-  0.354163525420490510f, -0.935183509938947500f, 0.353446144549480870f,
-  -0.935454874862014620f,
-  0.352728555755210730f, -0.935725689481080370f, 0.352010759459819240f,
-  -0.935995953636831300f,
-  0.351292756085567150f, -0.936265667170278260f, 0.350574546054837570f,
-  -0.936534829922755500f,
-  0.349856129790135030f, -0.936803441735921560f, 0.349137507714085030f,
-  -0.937071502451759190f,
-  0.348418680249434510f, -0.937339011912574960f, 0.347699647819051490f,
-  -0.937605969960999990f,
-  0.346980410845923680f, -0.937872376439989890f, 0.346260969753160170f,
-  -0.938138231192824360f,
-  0.345541324963989150f, -0.938403534063108060f, 0.344821476901759290f,
-  -0.938668284894770170f,
-  0.344101425989938980f, -0.938932483532064490f, 0.343381172652115100f,
-  -0.939196129819569900f,
-  0.342660717311994380f, -0.939459223602189920f, 0.341940060393402300f,
-  -0.939721764725153340f,
-  0.341219202320282410f, -0.939983753034013940f, 0.340498143516697100f,
-  -0.940245188374650880f,
-  0.339776884406826960f, -0.940506070593268300f, 0.339055425414969640f,
-  -0.940766399536396070f,
-  0.338333766965541290f, -0.941026175050889260f, 0.337611909483074680f,
-  -0.941285396983928660f,
-  0.336889853392220050f, -0.941544065183020810f, 0.336167599117744690f,
-  -0.941802179495997650f,
-  0.335445147084531660f, -0.942059739771017310f, 0.334722497717581220f,
-  -0.942316745856563780f,
-  0.333999651442009490f, -0.942573197601446870f, 0.333276608683047980f,
-  -0.942829094854802710f,
-  0.332553369866044220f, -0.943084437466093490f, 0.331829935416461220f,
-  -0.943339225285107720f,
-  0.331106305759876430f, -0.943593458161960390f, 0.330382481321982950f,
-  -0.943847135947092690f,
-  0.329658462528587550f, -0.944100258491272660f, 0.328934249805612200f,
-  -0.944352825645594750f,
-  0.328209843579092660f, -0.944604837261480260f, 0.327485244275178060f,
-  -0.944856293190677210f,
-  0.326760452320131790f, -0.945107193285260610f, 0.326035468140330350f,
-  -0.945357537397632290f,
-  0.325310292162262980f, -0.945607325380521280f, 0.324584924812532150f,
-  -0.945856557086983910f,
-  0.323859366517852960f, -0.946105232370403340f, 0.323133617705052330f,
-  -0.946353351084490590f,
-  0.322407678801070020f, -0.946600913083283530f, 0.321681550232956640f,
-  -0.946847918221148000f,
-  0.320955232427875210f, -0.947094366352777220f, 0.320228725813100020f,
-  -0.947340257333191940f,
-  0.319502030816015750f, -0.947585591017741090f, 0.318775147864118480f,
-  -0.947830367262101010f,
-  0.318048077385015060f, -0.948074585922276230f, 0.317320819806421790f,
-  -0.948318246854599090f,
-  0.316593375556165850f, -0.948561349915730270f, 0.315865745062184070f,
-  -0.948803894962658380f,
-  0.315137928752522440f, -0.949045881852700560f, 0.314409927055336820f,
-  -0.949287310443502010f,
-  0.313681740398891570f, -0.949528180593036670f, 0.312953369211560200f,
-  -0.949768492159606680f,
-  0.312224813921825050f, -0.950008245001843000f, 0.311496074958275970f,
-  -0.950247438978705230f,
-  0.310767152749611470f, -0.950486073949481700f, 0.310038047724638000f,
-  -0.950724149773789610f,
-  0.309308760312268780f, -0.950961666311575080f, 0.308579290941525030f,
-  -0.951198623423113230f,
-  0.307849640041534980f, -0.951435020969008340f, 0.307119808041533100f,
-  -0.951670858810193860f,
-  0.306389795370861080f, -0.951906136807932230f, 0.305659602458966230f,
-  -0.952140854823815830f,
-  0.304929229735402430f, -0.952375012719765880f, 0.304198677629829270f,
-  -0.952608610358033240f,
-  0.303467946572011370f, -0.952841647601198720f, 0.302737036991819140f,
-  -0.953074124312172200f,
-  0.302005949319228200f, -0.953306040354193750f, 0.301274683984318000f,
-  -0.953537395590833280f,
-  0.300543241417273400f, -0.953768189885990330f, 0.299811622048383460f,
-  -0.953998423103894490f,
-  0.299079826308040480f, -0.954228095109105670f, 0.298347854626741570f,
-  -0.954457205766513490f,
-  0.297615707435086310f, -0.954685754941338340f, 0.296883385163778270f,
-  -0.954913742499130520f,
-  0.296150888243623960f, -0.955141168305770670f, 0.295418217105532070f,
-  -0.955368032227470240f,
-  0.294685372180514330f, -0.955594334130771110f, 0.293952353899684770f,
-  -0.955820073882545420f,
-  0.293219162694258680f, -0.956045251349996410f, 0.292485798995553830f,
-  -0.956269866400658140f,
-  0.291752263234989370f, -0.956493918902394990f, 0.291018555844085090f,
-  -0.956717408723403050f,
-  0.290284677254462330f, -0.956940335732208940f, 0.289550627897843140f,
-  -0.957162699797670100f,
-  0.288816408206049480f, -0.957384500788975860f, 0.288082018611004300f,
-  -0.957605738575646240f,
-  0.287347459544729570f, -0.957826413027532910f, 0.286612731439347790f,
-  -0.958046524014818600f,
-  0.285877834727080730f, -0.958266071408017670f, 0.285142769840248720f,
-  -0.958485055077976100f,
-  0.284407537211271820f, -0.958703474895871600f, 0.283672137272668550f,
-  -0.958921330733213060f,
-  0.282936570457055390f, -0.959138622461841890f, 0.282200837197147500f,
-  -0.959355349953930790f,
-  0.281464937925758050f, -0.959571513081984520f, 0.280728873075797190f,
-  -0.959787111718839900f,
-  0.279992643080273380f, -0.960002145737665850f, 0.279256248372291240f,
-  -0.960216615011963430f,
-  0.278519689385053060f, -0.960430519415565790f, 0.277782966551857800f,
-  -0.960643858822638470f,
-  0.277046080306099950f, -0.960856633107679660f, 0.276309031081271030f,
-  -0.961068842145519350f,
-  0.275571819310958250f, -0.961280485811320640f, 0.274834445428843940f,
-  -0.961491563980579000f,
-  0.274096909868706330f, -0.961702076529122540f, 0.273359213064418790f,
-  -0.961912023333112100f,
-  0.272621355449948980f, -0.962121404269041580f, 0.271883337459359890f,
-  -0.962330219213737400f,
-  0.271145159526808070f, -0.962538468044359160f, 0.270406822086544820f,
-  -0.962746150638399410f,
-  0.269668325572915200f, -0.962953266873683880f, 0.268929670420357310f,
-  -0.963159816628371360f,
-  0.268190857063403180f, -0.963365799780954050f, 0.267451885936677740f,
-  -0.963571216210257210f,
-  0.266712757474898420f, -0.963776065795439840f, 0.265973472112875530f,
-  -0.963980348415994110f,
-  0.265234030285511900f, -0.964184063951745720f, 0.264494432427801630f,
-  -0.964387212282854290f,
-  0.263754678974831510f, -0.964589793289812650f, 0.263014770361779060f,
-  -0.964791806853447900f,
-  0.262274707023913590f, -0.964993252854920320f, 0.261534489396595630f,
-  -0.965194131175724720f,
-  0.260794117915275570f, -0.965394441697689400f, 0.260053593015495130f,
-  -0.965594184302976830f,
-  0.259312915132886350f, -0.965793358874083570f, 0.258572084703170390f,
-  -0.965991965293840570f,
-  0.257831102162158930f, -0.966190003445412620f, 0.257089967945753230f,
-  -0.966387473212298790f,
-  0.256348682489942910f, -0.966584374478333120f, 0.255607246230807550f,
-  -0.966780707127683270f,
-  0.254865659604514630f, -0.966976471044852070f, 0.254123923047320620f,
-  -0.967171666114676640f,
-  0.253382036995570270f, -0.967366292222328510f, 0.252640001885695580f,
-  -0.967560349253314360f,
-  0.251897818154216910f, -0.967753837093475510f, 0.251155486237742030f,
-  -0.967946755628987800f,
-  0.250413006572965280f, -0.968139104746362330f, 0.249670379596668520f,
-  -0.968330884332445300f,
-  0.248927605745720260f, -0.968522094274417270f, 0.248184685457074780f,
-  -0.968712734459794780f,
-  0.247441619167773440f, -0.968902804776428870f, 0.246698407314942500f,
-  -0.969092305112506100f,
-  0.245955050335794590f, -0.969281235356548530f, 0.245211548667627680f,
-  -0.969469595397412950f,
-  0.244467902747824210f, -0.969657385124292450f, 0.243724113013852130f,
-  -0.969844604426714830f,
-  0.242980179903263980f, -0.970031253194543970f, 0.242236103853696070f,
-  -0.970217331317979160f,
-  0.241491885302869300f, -0.970402838687555500f, 0.240747524688588540f,
-  -0.970587775194143630f,
-  0.240003022448741500f, -0.970772140728950350f, 0.239258379021300120f,
-  -0.970955935183517970f,
-  0.238513594844318500f, -0.971139158449725090f, 0.237768670355934210f,
-  -0.971321810419786160f,
-  0.237023605994367340f, -0.971503890986251780f, 0.236278402197919620f,
-  -0.971685400042008540f,
-  0.235533059404975460f, -0.971866337480279400f, 0.234787578054001080f,
-  -0.972046703194623500f,
-  0.234041958583543460f, -0.972226497078936270f, 0.233296201432231560f,
-  -0.972405719027449770f,
-  0.232550307038775330f, -0.972584368934732210f, 0.231804275841964780f,
-  -0.972762446695688570f,
-  0.231058108280671280f, -0.972939952205560070f, 0.230311804793845530f,
-  -0.973116885359925130f,
-  0.229565365820518870f, -0.973293246054698250f, 0.228818791799802360f,
-  -0.973469034186130950f,
-  0.228072083170885790f, -0.973644249650811870f, 0.227325240373038830f,
-  -0.973818892345666100f,
-  0.226578263845610110f, -0.973992962167955830f, 0.225831154028026200f,
-  -0.974166459015280320f,
-  0.225083911359792780f, -0.974339382785575860f, 0.224336536280493690f,
-  -0.974511733377115720f,
-  0.223589029229790020f, -0.974683510688510670f, 0.222841390647421280f,
-  -0.974854714618708430f,
-  0.222093620973203590f, -0.975025345066994120f, 0.221345720647030810f,
-  -0.975195401932990370f,
-  0.220597690108873650f, -0.975364885116656870f, 0.219849529798778750f,
-  -0.975533794518291360f,
-  0.219101240156869770f, -0.975702130038528570f, 0.218352821623346430f,
-  -0.975869891578341030f,
-  0.217604274638483670f, -0.976037079039039020f, 0.216855599642632570f,
-  -0.976203692322270560f,
-  0.216106797076219600f, -0.976369731330021140f, 0.215357867379745550f,
-  -0.976535195964614470f,
-  0.214608810993786920f, -0.976700086128711840f, 0.213859628358993830f,
-  -0.976864401725312640f,
-  0.213110319916091360f, -0.977028142657754390f, 0.212360886105878580f,
-  -0.977191308829712280f,
-  0.211611327369227610f, -0.977353900145199960f, 0.210861644147084830f,
-  -0.977515916508569280f,
-  0.210111836880469720f, -0.977677357824509930f, 0.209361906010474190f,
-  -0.977838223998050430f,
-  0.208611851978263460f, -0.977998514934557140f, 0.207861675225075150f,
-  -0.978158230539735050f,
-  0.207111376192218560f, -0.978317370719627650f, 0.206360955321075680f,
-  -0.978475935380616830f,
-  0.205610413053099320f, -0.978633924429423100f, 0.204859749829814420f,
-  -0.978791337773105670f,
-  0.204108966092817010f, -0.978948175319062200f, 0.203358062283773370f,
-  -0.979104436975029250f,
-  0.202607038844421110f, -0.979260122649082020f, 0.201855896216568160f,
-  -0.979415232249634780f,
-  0.201104634842091960f, -0.979569765685440520f, 0.200353255162940420f,
-  -0.979723722865591170f,
-  0.199601757621131050f, -0.979877103699517640f, 0.198850142658750120f,
-  -0.980029908096989980f,
-  0.198098410717953730f, -0.980182135968117320f, 0.197346562240966000f,
-  -0.980333787223347960f,
-  0.196594597670080220f, -0.980484861773469380f, 0.195842517447657990f,
-  -0.980635359529608120f,
-  0.195090322016128330f, -0.980785280403230430f, 0.194338011817988600f,
-  -0.980934624306141640f,
-  0.193585587295803750f, -0.981083391150486590f, 0.192833048892205290f,
-  -0.981231580848749730f,
-  0.192080397049892380f, -0.981379193313754560f, 0.191327632211630990f,
-  -0.981526228458664660f,
-  0.190574754820252800f, -0.981672686196983110f, 0.189821765318656580f,
-  -0.981818566442552500f,
-  0.189068664149806280f, -0.981963869109555240f, 0.188315451756732120f,
-  -0.982108594112513610f,
-  0.187562128582529740f, -0.982252741366289370f, 0.186808695070359330f,
-  -0.982396310786084690f,
-  0.186055151663446630f, -0.982539302287441240f, 0.185301498805082040f,
-  -0.982681715786240860f,
-  0.184547736938619640f, -0.982823551198705240f, 0.183793866507478390f,
-  -0.982964808441396440f,
-  0.183039887955141060f, -0.983105487431216290f, 0.182285801725153320f,
-  -0.983245588085407070f,
-  0.181531608261125130f, -0.983385110321551180f, 0.180777308006728670f,
-  -0.983524054057571260f,
-  0.180022901405699510f, -0.983662419211730250f, 0.179268388901835880f,
-  -0.983800205702631490f,
-  0.178513770938997590f, -0.983937413449218920f, 0.177759047961107140f,
-  -0.984074042370776450f,
-  0.177004220412148860f, -0.984210092386929030f, 0.176249288736167940f,
-  -0.984345563417641900f,
-  0.175494253377271400f, -0.984480455383220930f, 0.174739114779627310f,
-  -0.984614768204312600f,
-  0.173983873387463850f, -0.984748501801904210f, 0.173228529645070490f,
-  -0.984881656097323700f,
-  0.172473083996796030f, -0.985014231012239840f, 0.171717536887049970f,
-  -0.985146226468662230f,
-  0.170961888760301360f, -0.985277642388941220f, 0.170206140061078120f,
-  -0.985408478695768420f,
-  0.169450291233967930f, -0.985538735312176060f, 0.168694342723617440f,
-  -0.985668412161537550f,
-  0.167938294974731230f, -0.985797509167567370f, 0.167182148432072880f,
-  -0.985926026254321130f,
-  0.166425903540464220f, -0.986053963346195440f, 0.165669560744784140f,
-  -0.986181320367928270f,
-  0.164913120489970090f, -0.986308097244598670f, 0.164156583221015890f,
-  -0.986434293901627070f,
-  0.163399949382973230f, -0.986559910264775410f, 0.162643219420950450f,
-  -0.986684946260146690f,
-  0.161886393780111910f, -0.986809401814185420f, 0.161129472905678780f,
-  -0.986933276853677710f,
-  0.160372457242928400f, -0.987056571305750970f, 0.159615347237193090f,
-  -0.987179285097874340f,
-  0.158858143333861390f, -0.987301418157858430f, 0.158100845978377090f,
-  -0.987422970413855410f,
-  0.157343455616238280f, -0.987543941794359230f, 0.156585972692998590f,
-  -0.987664332228205710f,
-  0.155828397654265320f, -0.987784141644572180f, 0.155070730945700510f,
-  -0.987903369972977790f,
-  0.154312973013020240f, -0.988022017143283530f, 0.153555124301993500f,
-  -0.988140083085692570f,
-  0.152797185258443410f, -0.988257567730749460f, 0.152039156328246160f,
-  -0.988374471009341280f,
-  0.151281037957330250f, -0.988490792852696590f, 0.150522830591677370f,
-  -0.988606533192386450f,
-  0.149764534677321620f, -0.988721691960323780f, 0.149006150660348470f,
-  -0.988836269088763540f,
-  0.148247678986896200f, -0.988950264510302990f, 0.147489120103153680f,
-  -0.989063678157881540f,
-  0.146730474455361750f, -0.989176509964781010f, 0.145971742489812370f,
-  -0.989288759864625170f,
-  0.145212924652847520f, -0.989400427791380380f, 0.144454021390860440f,
-  -0.989511513679355190f,
-  0.143695033150294580f, -0.989622017463200780f, 0.142935960377642700f,
-  -0.989731939077910570f,
-  0.142176803519448000f, -0.989841278458820530f, 0.141417563022303130f,
-  -0.989950035541608990f,
-  0.140658239332849240f, -0.990058210262297120f, 0.139898832897777380f,
-  -0.990165802557248400f,
-  0.139139344163826280f, -0.990272812363169110f, 0.138379773577783890f,
-  -0.990379239617108160f,
-  0.137620121586486180f, -0.990485084256456980f, 0.136860388636816430f,
-  -0.990590346218950150f,
-  0.136100575175706200f, -0.990695025442664630f, 0.135340681650134330f,
-  -0.990799121866020370f,
-  0.134580708507126220f, -0.990902635427780010f, 0.133820656193754690f,
-  -0.991005566067049370f,
-  0.133060525157139180f, -0.991107913723276780f, 0.132300315844444680f,
-  -0.991209678336254060f,
-  0.131540028702883280f, -0.991310859846115440f, 0.130779664179711790f,
-  -0.991411458193338540f,
-  0.130019222722233350f, -0.991511473318743900f, 0.129258704777796270f,
-  -0.991610905163495370f,
-  0.128498110793793220f, -0.991709753669099530f, 0.127737441217662280f,
-  -0.991808018777406430f,
-  0.126976696496885980f, -0.991905700430609330f, 0.126215877078990400f,
-  -0.992002798571244520f,
-  0.125454983411546210f, -0.992099313142191800f, 0.124694015942167770f,
-  -0.992195244086673920f,
-  0.123932975118512200f, -0.992290591348257370f, 0.123171861388280650f,
-  -0.992385354870851670f,
-  0.122410675199216280f, -0.992479534598709970f, 0.121649416999105540f,
-  -0.992573130476428810f,
-  0.120888087235777220f, -0.992666142448948020f, 0.120126686357101580f,
-  -0.992758570461551140f,
-  0.119365214810991350f, -0.992850414459865100f, 0.118603673045400840f,
-  -0.992941674389860470f,
-  0.117842061508325020f, -0.993032350197851410f, 0.117080380647800550f,
-  -0.993122441830495580f,
-  0.116318630911904880f, -0.993211949234794500f, 0.115556812748755290f,
-  -0.993300872358093280f,
-  0.114794926606510250f, -0.993389211148080650f, 0.114032972933367300f,
-  -0.993476965552789190f,
-  0.113270952177564360f, -0.993564135520595300f, 0.112508864787378830f,
-  -0.993650721000219120f,
-  0.111746711211126660f, -0.993736721940724600f, 0.110984491897163380f,
-  -0.993822138291519660f,
-  0.110222207293883180f, -0.993906970002356060f, 0.109459857849718030f,
-  -0.993991217023329380f,
-  0.108697444013138670f, -0.994074879304879370f, 0.107934966232653760f,
-  -0.994157956797789730f,
-  0.107172424956808870f, -0.994240449453187900f, 0.106409820634187840f,
-  -0.994322357222545810f,
-  0.105647153713410700f, -0.994403680057679100f, 0.104884424643134970f,
-  -0.994484417910747600f,
-  0.104121633872054730f, -0.994564570734255420f, 0.103358781848899700f,
-  -0.994644138481050710f,
-  0.102595869022436280f, -0.994723121104325700f, 0.101832895841466670f,
-  -0.994801518557617110f,
-  0.101069862754827880f, -0.994879330794805620f, 0.100306770211392820f,
-  -0.994956557770116380f,
-  0.099543618660069444f, -0.995033199438118630f, 0.098780408549799664f,
-  -0.995109255753726110f,
-  0.098017140329560770f, -0.995184726672196820f, 0.097253814448363354f,
-  -0.995259612149133390f,
-  0.096490431355252607f, -0.995333912140482280f, 0.095726991499307315f,
-  -0.995407626602534900f,
-  0.094963495329639061f, -0.995480755491926940f, 0.094199943295393190f,
-  -0.995553298765638470f,
-  0.093436335845747912f, -0.995625256380994310f, 0.092672673429913366f,
-  -0.995696628295663520f,
-  0.091908956497132696f, -0.995767414467659820f, 0.091145185496681130f,
-  -0.995837614855341610f,
-  0.090381360877865011f, -0.995907229417411720f, 0.089617483090022917f,
-  -0.995976258112917790f,
-  0.088853552582524684f, -0.996044700901251970f, 0.088089569804770507f,
-  -0.996112557742151130f,
-  0.087325535206192226f, -0.996179828595696870f, 0.086561449236251239f,
-  -0.996246513422315520f,
-  0.085797312344439880f, -0.996312612182778000f, 0.085033124980280414f,
-  -0.996378124838200210f,
-  0.084268887593324127f, -0.996443051350042630f, 0.083504600633152404f,
-  -0.996507391680110820f,
-  0.082740264549375803f, -0.996571145790554840f, 0.081975879791633108f,
-  -0.996634313643869900f,
-  0.081211446809592386f, -0.996696895202896060f, 0.080446966052950097f,
-  -0.996758890430818000f,
-  0.079682437971430126f, -0.996820299291165670f, 0.078917863014785095f,
-  -0.996881121747813850f,
-  0.078153241632794315f, -0.996941357764982160f, 0.077388574275265049f,
-  -0.997001007307235290f,
-  0.076623861392031617f, -0.997060070339482960f, 0.075859103432954503f,
-  -0.997118546826979980f,
-  0.075094300847921291f, -0.997176436735326190f, 0.074329454086845867f,
-  -0.997233740030466160f,
-  0.073564563599667454f, -0.997290456678690210f, 0.072799629836351618f,
-  -0.997346586646633230f,
-  0.072034653246889416f, -0.997402129901275300f, 0.071269634281296415f,
-  -0.997457086409941910f,
-  0.070504573389614009f, -0.997511456140303450f, 0.069739471021907376f,
-  -0.997565239060375750f,
-  0.068974327628266732f, -0.997618435138519550f, 0.068209143658806454f,
-  -0.997671044343441000f,
-  0.067443919563664106f, -0.997723066644191640f, 0.066678655793001543f,
-  -0.997774502010167820f,
-  0.065913352797003930f, -0.997825350411111640f, 0.065148011025878860f,
-  -0.997875611817110150f,
-  0.064382630929857410f, -0.997925286198596000f, 0.063617212959193190f,
-  -0.997974373526346990f,
-  0.062851757564161420f, -0.998022873771486240f, 0.062086265195060247f,
-  -0.998070786905482340f,
-  0.061320736302208648f, -0.998118112900149180f, 0.060555171335947781f,
-  -0.998164851727646240f,
-  0.059789570746640007f, -0.998211003360478190f, 0.059023934984667986f,
-  -0.998256567771495180f,
-  0.058258264500435732f, -0.998301544933892890f, 0.057492559744367684f,
-  -0.998345934821212370f,
-  0.056726821166907783f, -0.998389737407340160f, 0.055961049218520520f,
-  -0.998432952666508440f,
-  0.055195244349690031f, -0.998475580573294770f, 0.054429407010919147f,
-  -0.998517621102622210f,
-  0.053663537652730679f, -0.998559074229759310f, 0.052897636725665401f,
-  -0.998599939930320370f,
-  0.052131704680283317f, -0.998640218180265270f, 0.051365741967162731f,
-  -0.998679908955899090f,
-  0.050599749036899337f, -0.998719012233872940f, 0.049833726340107257f,
-  -0.998757527991183340f,
-  0.049067674327418126f, -0.998795456205172410f, 0.048301593449480172f,
-  -0.998832796853527990f,
-  0.047535484156959261f, -0.998869549914283560f, 0.046769346900537960f,
-  -0.998905715365818290f,
-  0.046003182130914644f, -0.998941293186856870f, 0.045236990298804750f,
-  -0.998976283356469820f,
-  0.044470771854938744f, -0.999010685854073380f, 0.043704527250063421f,
-  -0.999044500659429290f,
-  0.042938256934940959f, -0.999077727752645360f, 0.042171961360348002f,
-  -0.999110367114174890f,
-  0.041405640977076712f, -0.999142418724816910f, 0.040639296235933854f,
-  -0.999173882565716380f,
-  0.039872927587739845f, -0.999204758618363890f, 0.039106535483329839f,
-  -0.999235046864595850f,
-  0.038340120373552791f, -0.999264747286594420f, 0.037573682709270514f,
-  -0.999293859866887790f,
-  0.036807222941358991f, -0.999322384588349540f, 0.036040741520706299f,
-  -0.999350321434199440f,
-  0.035274238898213947f, -0.999377670388002850f, 0.034507715524795889f,
-  -0.999404431433671300f,
-  0.033741171851377642f, -0.999430604555461730f, 0.032974608328897315f,
-  -0.999456189737977340f,
-  0.032208025408304704f, -0.999481186966166950f, 0.031441423540560343f,
-  -0.999505596225325310f,
-  0.030674803176636581f, -0.999529417501093140f, 0.029908164767516655f,
-  -0.999552650779456990f,
-  0.029141508764193740f, -0.999575296046749220f, 0.028374835617672258f,
-  -0.999597353289648380f,
-  0.027608145778965820f, -0.999618822495178640f, 0.026841439699098527f,
-  -0.999639703650710200f,
-  0.026074717829104040f, -0.999659996743959220f, 0.025307980620024630f,
-  -0.999679701762987930f,
-  0.024541228522912264f, -0.999698818696204250f, 0.023774461988827676f,
-  -0.999717347532362190f,
-  0.023007681468839410f, -0.999735288260561680f, 0.022240887414024919f,
-  -0.999752640870248840f,
-  0.021474080275469605f, -0.999769405351215280f, 0.020707260504265912f,
-  -0.999785581693599210f,
-  0.019940428551514598f, -0.999801169887884260f, 0.019173584868322699f,
-  -0.999816169924900410f,
-  0.018406729905804820f, -0.999830581795823400f, 0.017639864115082195f,
-  -0.999844405492175240f,
-  0.016872987947281773f, -0.999857641005823860f, 0.016106101853537263f,
-  -0.999870288328982950f,
-  0.015339206284988220f, -0.999882347454212560f, 0.014572301692779104f,
-  -0.999893818374418490f,
-  0.013805388528060349f, -0.999904701082852900f, 0.013038467241987433f,
-  -0.999914995573113470f,
-  0.012271538285719944f, -0.999924701839144500f, 0.011504602110422875f,
-  -0.999933819875236000f,
-  0.010737659167264572f, -0.999942349676023910f, 0.009970709907418029f,
-  -0.999950291236490480f,
-  0.009203754782059960f, -0.999957644551963900f, 0.008436794242369860f,
-  -0.999964409618118280f,
-  0.007669828739531077f, -0.999970586430974140f, 0.006902858724729877f,
-  -0.999976174986897610f,
-  0.006135884649154515f, -0.999981175282601110f, 0.005368906963996303f,
-  -0.999985587315143200f,
-  0.004601926120448672f, -0.999989411081928400f, 0.003834942569706248f,
-  -0.999992646580707190f,
-  0.003067956762966138f, -0.999995293809576190f, 0.002300969151425887f,
-  -0.999997352766978210f,
-  0.001533980186284766f, -0.999998823451701880f, 0.000766990318742846f,
-  -0.999999705862882230f
-};
-    const float32_t cos_factors_2048[2048] = {
-  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
-  0.999996396822294350f,
-  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
-  0.999983454831937730f,
-  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
-  0.999961100616462820f,
-  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
-  0.999929334386276070f,
-  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
-  0.999888156440373320f,
-  0.999876391416790410f, 0.999864038191687680f, 0.999851096772332190f,
-  0.999837567166337090f,
-  0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,
-  0.999777567040332940f,
-  0.999761096627446610f, 0.999744038080865430f, 0.999726391410624470f,
-  0.999708156627104880f,
-  0.999689333741033640f, 0.999669922763483760f, 0.999649923705874240f,
-  0.999629336579970110f,
-  0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,
-  0.999541107640812940f,
-  0.999517580362016990f, 0.999493465092780590f, 0.999468761847290050f,
-  0.999443470640077770f,
-  0.999417591486021720f, 0.999391124400346050f, 0.999364069398620550f,
-  0.999336426496761240f,
-  0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,
-  0.999219976218403530f,
-  0.999189394066714920f, 0.999158224117649430f, 0.999126466389543390f,
-  0.999094120901079070f,
-  0.999061187671284600f, 0.999027666719533690f, 0.998993558065545680f,
-  0.998958861729386080f,
-  0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,
-  0.998814199976435390f,
-  0.998776565542495610f, 0.998738343554035230f, 0.998699534033539280f,
-  0.998660137003838490f,
-  0.998620152488108870f, 0.998579580509872500f, 0.998538421092996730f,
-  0.998496674261694640f,
-  0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,
-  0.998323813288577560f,
-  0.998279129760433200f, 0.998233858970396850f, 0.998188000945100300f,
-  0.998141555711520520f,
-  0.998094523296980010f, 0.998046903729146840f, 0.997998697036034390f,
-  0.997949903246001190f,
-  0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,
-  0.997748857695925690f,
-  0.997697128858758500f, 0.997644813102075420f, 0.997591910456652630f,
-  0.997538420953611340f,
-  0.997484344624417930f, 0.997429681500884180f, 0.997374431615167150f,
-  0.997318594999768600f,
-  0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,
-  0.997089381903483400f,
-  0.997030612139289450f, 0.996971255847674320f, 0.996911313063555740f,
-  0.996850783822196610f,
-  0.996789668159204560f, 0.996727966110532490f, 0.996665677712478160f,
-  0.996602803001684130f,
-  0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,
-  0.996345441776035900f,
-  0.996279636063254650f, 0.996213244264832040f, 0.996146266419824620f,
-  0.996078702567633980f,
-  0.996010552748005870f, 0.995941817001031350f, 0.995872495367145730f,
-  0.995802587887129160f,
-  0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,
-  0.995517100333418110f,
-  0.995444264246510340f, 0.995370842565388990f, 0.995296835333246090f,
-  0.995222242593618360f,
-  0.995147064390386470f, 0.995071300767776170f, 0.994994951770357020f,
-  0.994918017443043200f,
-  0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,
-  0.994604427745175660f,
-  0.994524567454151740f, 0.994444122109948040f, 0.994363091759888570f,
-  0.994281476451641550f,
-  0.994199276233218910f, 0.994116491152977070f, 0.994033121259616400f,
-  0.993949166602181130f,
-  0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,
-  0.993607501324621610f,
-  0.993520623594518090f, 0.993433161401829360f, 0.993345114798006910f,
-  0.993256483834846440f,
-  0.993167268564487230f, 0.993077469039412300f, 0.992987085312448390f,
-  0.992896117436765980f,
-  0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,
-  0.992526405522286100f,
-  0.992432517712593660f, 0.992338046080420420f, 0.992242990681341700f,
-  0.992147351571276090f,
-  0.992051128806485720f, 0.991954322443575950f, 0.991856932539495470f,
-  0.991758959151536110f,
-  0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,
-  0.991361231918763460f,
-  0.991260341982802440f, 0.991158868913921350f, 0.991056812771814340f,
-  0.990954173616518500f,
-  0.990850951508413620f, 0.990747146508222710f, 0.990642758677011570f,
-  0.990537788076188750f,
-  0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,
-  0.990112079216953770f,
-  0.990004195701200910f, 0.989895729791486660f, 0.989786681551618640f,
-  0.989677051045747210f,
-  0.989566838338365120f, 0.989456043494307710f, 0.989344666578752640f,
-  0.989232707657220050f,
-  0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,
-  0.988779053233701520f,
-  0.988664185277066230f, 0.988548735714763200f, 0.988432704614708340f,
-  0.988316092045159690f,
-  0.988198898074717610f, 0.988081122772324070f, 0.987962766207263420f,
-  0.987843828449161740f,
-  0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,
-  0.987362266890832400f,
-  0.987240424223882250f, 0.987118000788826280f, 0.986994996657682980f,
-  0.986871411902812470f,
-  0.986747246596916590f, 0.986622500813038480f, 0.986497174624562880f,
-  0.986371268105216030f,
-  0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,
-  0.985861840205586980f,
-  0.985733033149723490f, 0.985603646212513400f, 0.985473679470071810f,
-  0.985343132998854790f,
-  0.985212006875659350f, 0.985080301177623800f, 0.984948015982227030f,
-  0.984815151367289140f,
-  0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,
-  0.984277900280454370f,
-  0.984142139747038570f, 0.984005800268157870f, 0.983868881924017220f,
-  0.983731384795162090f,
-  0.983593308962478650f, 0.983454654507193270f, 0.983315421510872810f,
-  0.983175610055424420f,
-  0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,
-  0.982610581292404750f,
-  0.982467878781833170f, 0.982324598310721280f, 0.982180739963357090f,
-  0.982036303824369020f,
-  0.981891289978725100f, 0.981745698511732990f, 0.981599529509040720f,
-  0.981452783056635520f,
-  0.981305459240844670f, 0.981157558148334830f, 0.981009079866112630f,
-  0.980860024481523870f,
-  0.980710392082253970f, 0.980560182756327840f, 0.980409396592109910f,
-  0.980258033678303550f,
-  0.980106094103951770f, 0.979953577958436740f, 0.979800485331479790f,
-  0.979646816313141210f,
-  0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,
-  0.979026378139047580f,
-  0.978869828526574120f, 0.978712703070200420f, 0.978555001862359550f,
-  0.978396724995823090f,
-  0.978237872563701090f, 0.978078444659442380f, 0.977918441376834370f,
-  0.977757862810002760f,
-  0.977596709053411890f, 0.977434980201864260f, 0.977272676350500860f,
-  0.977109797594800880f,
-  0.976946344030581670f, 0.976782315753998650f, 0.976617712861545640f,
-  0.976452535450054060f,
-  0.976286783616693630f, 0.976120457458971910f, 0.975953557074734300f,
-  0.975786082562163930f,
-  0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,
-  0.975110445204038890f,
-  0.974940101534371830f, 0.974769184332561770f, 0.974597693699155050f,
-  0.974425629735034990f,
-  0.974252992541422500f, 0.974079782219875680f, 0.973905998872289570f,
-  0.973731642600896400f,
-  0.973556713508265560f, 0.973381211697303290f, 0.973205137271252800f,
-  0.973028490333694210f,
-  0.972851270988544180f, 0.972673479340056430f, 0.972495115492821190f,
-  0.972316179551765300f,
-  0.972136671622152230f, 0.971956591809581720f, 0.971775940219990140f,
-  0.971594716959650160f,
-  0.971412922135170940f, 0.971230555853497380f, 0.971047618221911100f,
-  0.970864109348029470f,
-  0.970680029339806130f, 0.970495378305530560f, 0.970310156353828110f,
-  0.970124363593660280f,
-  0.969938000134323960f, 0.969751066085452140f, 0.969563561557013180f,
-  0.969375486659311280f,
-  0.969186841502985950f, 0.968997626199012420f, 0.968807840858700970f,
-  0.968617485593697540f,
-  0.968426560515983190f, 0.968235065737874320f, 0.968043001372022260f,
-  0.967850367531413620f,
-  0.967657164329369880f, 0.967463391879547550f, 0.967269050295937790f,
-  0.967074139692867040f,
-  0.966878660184995910f, 0.966682611887320080f, 0.966485994915169840f,
-  0.966288809384209690f,
-  0.966091055410438830f, 0.965892733110190860f, 0.965693842600133690f,
-  0.965494383997269500f,
-  0.965294357418934660f, 0.965093762982799590f, 0.964892600806868890f,
-  0.964690871009481030f,
-  0.964488573709308410f, 0.964285709025357480f, 0.964082277076968140f,
-  0.963878277983814200f,
-  0.963673711865903230f, 0.963468578843575950f, 0.963262879037507070f,
-  0.963056612568704340f,
-  0.962849779558509030f, 0.962642380128595710f, 0.962434414400972100f,
-  0.962225882497979020f,
-  0.962016784542290560f, 0.961807120656913540f, 0.961596890965187860f,
-  0.961386095590786250f,
-  0.961174734657714080f, 0.960962808290309780f, 0.960750316613243950f,
-  0.960537259751520050f,
-  0.960323637830473920f, 0.960109450975773940f, 0.959894699313420530f,
-  0.959679382969746750f,
-  0.959463502071417510f, 0.959247056745430090f, 0.959030047119113660f,
-  0.958812473320129310f,
-  0.958594335476470220f, 0.958375633716461170f, 0.958156368168758820f,
-  0.957936538962351420f,
-  0.957716146226558870f, 0.957495190091032570f, 0.957273670685755200f,
-  0.957051588141040970f,
-  0.956828942587535370f, 0.956605734156215080f, 0.956381962978387730f,
-  0.956157629185692140f,
-  0.955932732910098280f, 0.955707274283906560f, 0.955481253439748770f,
-  0.955254670510586990f,
-  0.955027525629714160f, 0.954799818930753720f, 0.954571550547659630f,
-  0.954342720614716480f,
-  0.954113329266538800f, 0.953883376638071770f, 0.953652862864590500f,
-  0.953421788081700310f,
-  0.953190152425336670f, 0.952957956031764700f, 0.952725199037579570f,
-  0.952491881579706320f,
-  0.952258003795399600f, 0.952023565822243570f, 0.951788567798152130f,
-  0.951553009861368590f,
-  0.951316892150465550f, 0.951080214804345010f, 0.950842977962238160f,
-  0.950605181763705340f,
-  0.950366826348635780f, 0.950127911857248100f, 0.949888438430089300f,
-  0.949648406208035480f,
-  0.949407815332291570f, 0.949166665944390700f, 0.948924958186195160f,
-  0.948682692199895090f,
-  0.948439868128009620f, 0.948196486113385580f, 0.947952546299198670f,
-  0.947708048828952100f,
-  0.947462993846477700f, 0.947217381495934820f, 0.946971211921810880f,
-  0.946724485268921170f,
-  0.946477201682408680f, 0.946229361307743820f, 0.945980964290724760f,
-  0.945732010777477150f,
-  0.945482500914453740f, 0.945232434848435000f, 0.944981812726528150f,
-  0.944730634696167800f,
-  0.944478900905115550f, 0.944226611501459810f, 0.943973766633615980f,
-  0.943720366450326200f,
-  0.943466411100659320f, 0.943211900734010620f, 0.942956835500102120f,
-  0.942701215548981900f,
-  0.942445041031024890f, 0.942188312096931770f, 0.941931028897729620f,
-  0.941673191584771360f,
-  0.941414800309736340f, 0.941155855224629190f, 0.940896356481780830f,
-  0.940636304233847590f,
-  0.940375698633811540f, 0.940114539834980280f, 0.939852827990986680f,
-  0.939590563255789270f,
-  0.939327745783671400f, 0.939064375729241950f, 0.938800453247434770f,
-  0.938535978493508560f,
-  0.938270951623047190f, 0.938005372791958840f, 0.937739242156476970f,
-  0.937472559873159250f,
-  0.937205326098887960f, 0.936937540990869900f, 0.936669204706636170f,
-  0.936400317404042060f,
-  0.936130879241267030f, 0.935860890376814640f, 0.935590350969512370f,
-  0.935319261178511610f,
-  0.935047621163287430f, 0.934775431083638700f, 0.934502691099687870f,
-  0.934229401371880820f,
-  0.933955562060986730f, 0.933681173328098410f, 0.933406235334631520f,
-  0.933130748242325230f,
-  0.932854712213241120f, 0.932578127409764420f, 0.932300993994602760f,
-  0.932023312130786490f,
-  0.931745081981668720f, 0.931466303710925090f, 0.931186977482553750f,
-  0.930907103460875130f,
-  0.930626681810531760f, 0.930345712696488470f, 0.930064196284032360f,
-  0.929782132738772190f,
-  0.929499522226638560f, 0.929216364913884040f, 0.928932660967082820f,
-  0.928648410553130520f,
-  0.928363613839244370f, 0.928078270992963140f, 0.927792382182146320f,
-  0.927505947574975180f,
-  0.927218967339951790f, 0.926931441645899130f, 0.926643370661961230f,
-  0.926354754557602860f,
-  0.926065593502609310f, 0.925775887667086740f, 0.925485637221461490f,
-  0.925194842336480530f,
-  0.924903503183210910f, 0.924611619933039970f, 0.924319192757675160f,
-  0.924026221829143850f,
-  0.923732707319793290f, 0.923438649402290370f, 0.923144048249621930f,
-  0.922848904035094120f,
-  0.922553216932332830f, 0.922256987115283030f, 0.921960214758209220f,
-  0.921662900035694730f,
-  0.921365043122642340f, 0.921066644194273640f, 0.920767703426128790f,
-  0.920468220994067110f,
-  0.920168197074266340f, 0.919867631843222950f, 0.919566525477751530f,
-  0.919264878154985370f,
-  0.918962690052375630f, 0.918659961347691900f, 0.918356692219021720f,
-  0.918052882844770380f,
-  0.917748533403661250f, 0.917443644074735220f, 0.917138215037350710f,
-  0.916832246471183890f,
-  0.916525738556228210f, 0.916218691472794220f, 0.915911105401509880f,
-  0.915602980523320230f,
-  0.915294317019487050f, 0.914985115071589310f, 0.914675374861522390f,
-  0.914365096571498560f,
-  0.914054280384046570f, 0.913742926482011390f, 0.913431035048554720f,
-  0.913118606267154240f,
-  0.912805640321603500f, 0.912492137396012650f, 0.912178097674807180f,
-  0.911863521342728520f,
-  0.911548408584833990f, 0.911232759586496190f, 0.910916574533403360f,
-  0.910599853611558930f,
-  0.910282597007281760f, 0.909964804907205660f, 0.909646477498279540f,
-  0.909327614967767260f,
-  0.909008217503247450f, 0.908688285292613360f, 0.908367818524072890f,
-  0.908046817386148340f,
-  0.907725282067676440f, 0.907403212757808110f, 0.907080609646008450f,
-  0.906757472922056550f,
-  0.906433802776045460f, 0.906109599398381980f, 0.905784862979786550f,
-  0.905459593711293250f,
-  0.905133791784249690f, 0.904807457390316540f, 0.904480590721468250f,
-  0.904153191969991780f,
-  0.903825261328487510f, 0.903496798989868450f, 0.903167805147360720f,
-  0.902838279994502830f,
-  0.902508223725145940f, 0.902177636533453620f, 0.901846518613901750f,
-  0.901514870161278740f,
-  0.901182691370684520f, 0.900849982437531450f, 0.900516743557543520f,
-  0.900182974926756810f,
-  0.899848676741518580f, 0.899513849198487980f, 0.899178492494635330f,
-  0.898842606827242370f,
-  0.898506192393901950f, 0.898169249392518080f, 0.897831778021305650f,
-  0.897493778478790310f,
-  0.897155250963808550f, 0.896816195675507300f, 0.896476612813344120f,
-  0.896136502577086770f,
-  0.895795865166813530f, 0.895454700782912450f, 0.895113009626081760f,
-  0.894770791897329550f,
-  0.894428047797973800f, 0.894084777529641990f, 0.893740981294271040f,
-  0.893396659294107720f,
-  0.893051811731707450f, 0.892706438809935390f, 0.892360540731965360f,
-  0.892014117701280470f,
-  0.891667169921672280f, 0.891319697597241390f, 0.890971700932396860f,
-  0.890623180131855930f,
-  0.890274135400644600f, 0.889924566944096720f, 0.889574474967854580f,
-  0.889223859677868210f,
-  0.888872721280395630f, 0.888521059982002260f, 0.888168875989561730f,
-  0.887816169510254440f,
-  0.887462940751568840f, 0.887109189921300170f, 0.886754917227550840f,
-  0.886400122878730600f,
-  0.886044807083555600f, 0.885688970051048960f, 0.885332611990540590f,
-  0.884975733111666660f,
-  0.884618333624369920f, 0.884260413738899190f, 0.883901973665809470f,
-  0.883543013615961880f,
-  0.883183533800523390f, 0.882823534430966620f, 0.882463015719070150f,
-  0.882101977876917580f,
-  0.881740421116898320f, 0.881378345651706920f, 0.881015751694342870f,
-  0.880652639458111010f,
-  0.880289009156621010f, 0.879924861003786860f, 0.879560195213827890f,
-  0.879195012001267480f,
-  0.878829311580933360f, 0.878463094167957870f, 0.878096359977777130f,
-  0.877729109226131570f,
-  0.877361342129065140f, 0.876993058902925890f, 0.876624259764365310f,
-  0.876254944930338510f,
-  0.875885114618103810f, 0.875514769045222850f, 0.875143908429560360f,
-  0.874772532989284150f,
-  0.874400642942864790f, 0.874028238509075740f, 0.873655319906992630f,
-  0.873281887355994210f,
-  0.872907941075761080f, 0.872533481286276170f, 0.872158508207824480f,
-  0.871783022060993120f,
-  0.871407023066670950f, 0.871030511446048260f, 0.870653487420617430f,
-  0.870275951212171940f,
-  0.869897903042806340f, 0.869519343134916860f, 0.869140271711200560f,
-  0.868760688994655310f,
-  0.868380595208579800f, 0.867999990576573510f, 0.867618875322536230f,
-  0.867237249670668400f,
-  0.866855113845470430f, 0.866472468071743050f, 0.866089312574586770f,
-  0.865705647579402380f,
-  0.865321473311889800f, 0.864936789998049020f, 0.864551597864179340f,
-  0.864165897136879300f,
-  0.863779688043046720f, 0.863392970809878420f, 0.863005745664870320f,
-  0.862618012835816740f,
-  0.862229772550811240f, 0.861841025038245330f, 0.861451770526809320f,
-  0.861062009245491480f,
-  0.860671741423578380f, 0.860280967290654510f, 0.859889687076602290f,
-  0.859497901011601730f,
-  0.859105609326130450f, 0.858712812250963520f, 0.858319510017173440f,
-  0.857925702856129790f,
-  0.857531390999499150f, 0.857136574679244980f, 0.856741254127627470f,
-  0.856345429577203610f,
-  0.855949101260826910f, 0.855552269411646860f, 0.855154934263109620f,
-  0.854757096048957220f,
-  0.854358755003227440f, 0.853959911360254180f, 0.853560565354666840f,
-  0.853160717221390420f,
-  0.852760367195645300f, 0.852359515512947090f, 0.851958162409106380f,
-  0.851556308120228980f,
-  0.851153952882715340f, 0.850751096933260790f, 0.850347740508854980f,
-  0.849943883846782210f,
-  0.849539527184620890f, 0.849134670760243630f, 0.848729314811817130f,
-  0.848323459577801640f,
-  0.847917105296951410f, 0.847510252208314330f, 0.847102900551231500f,
-  0.846695050565337450f,
-  0.846286702490559710f, 0.845877856567119000f, 0.845468513035528830f,
-  0.845058672136595470f,
-  0.844648334111417820f, 0.844237499201387020f, 0.843826167648186740f,
-  0.843414339693792760f,
-  0.843002015580472940f, 0.842589195550786710f, 0.842175879847585570f,
-  0.841762068714012490f,
-  0.841347762393501950f, 0.840932961129779780f, 0.840517665166862550f,
-  0.840101874749058400f,
-  0.839685590120966110f, 0.839268811527475230f, 0.838851539213765760f,
-  0.838433773425308340f,
-  0.838015514407863820f, 0.837596762407483040f, 0.837177517670507300f,
-  0.836757780443567190f,
-  0.836337550973583530f, 0.835916829507766360f, 0.835495616293615350f,
-  0.835073911578919410f,
-  0.834651715611756440f, 0.834229028640493420f, 0.833805850913786340f,
-  0.833382182680579730f,
-  0.832958024190106670f, 0.832533375691888680f, 0.832108237435735590f,
-  0.831682609671745120f,
-  0.831256492650303210f, 0.830829886622083570f, 0.830402791838047550f,
-  0.829975208549443950f,
-  0.829547137007808910f, 0.829118577464965980f, 0.828689530173025820f,
-  0.828259995384385660f,
-  0.827829973351729920f, 0.827399464328029470f, 0.826968468566541600f,
-  0.826536986320809960f,
-  0.826105017844664610f, 0.825672563392221390f, 0.825239623217882250f,
-  0.824806197576334330f,
-  0.824372286722551250f, 0.823937890911791370f, 0.823503010399598500f,
-  0.823067645441801670f,
-  0.822631796294514990f, 0.822195463214137170f, 0.821758646457351750f,
-  0.821321346281126740f,
-  0.820883562942714580f, 0.820445296699652050f, 0.820006547809759680f,
-  0.819567316531142230f,
-  0.819127603122188240f, 0.818687407841569680f, 0.818246730948242070f,
-  0.817805572701444270f,
-  0.817363933360698460f, 0.816921813185809480f, 0.816479212436865390f,
-  0.816036131374236810f,
-  0.815592570258576790f, 0.815148529350820830f, 0.814704008912187080f,
-  0.814259009204175270f,
-  0.813813530488567190f, 0.813367573027426570f, 0.812921137083098770f,
-  0.812474222918210480f,
-  0.812026830795669730f, 0.811578960978665890f, 0.811130613730669190f,
-  0.810681789315430780f,
-  0.810232487996982330f, 0.809782710039636530f, 0.809332455707985950f,
-  0.808881725266903610f,
-  0.808430518981542720f, 0.807978837117336310f, 0.807526679939997160f,
-  0.807074047715517610f,
-  0.806620940710169650f, 0.806167359190504420f, 0.805713303423352230f,
-  0.805258773675822210f,
-  0.804803770215302920f, 0.804348293309460780f, 0.803892343226241260f,
-  0.803435920233868120f,
-  0.802979024600843250f, 0.802521656595946430f, 0.802063816488235440f,
-  0.801605504547046150f,
-  0.801146721041991360f, 0.800687466242961610f, 0.800227740420124790f,
-  0.799767543843925680f,
-  0.799306876785086160f, 0.798845739514604580f, 0.798384132303756380f,
-  0.797922055424093000f,
-  0.797459509147442460f, 0.796996493745908750f, 0.796533009491872000f,
-  0.796069056657987990f,
-  0.795604635517188070f, 0.795139746342679590f, 0.794674389407944550f,
-  0.794208564986740640f,
-  0.793742273353100210f, 0.793275514781330630f, 0.792808289546014120f,
-  0.792340597922007170f,
-  0.791872440184440470f, 0.791403816608719500f, 0.790934727470523290f,
-  0.790465173045804880f,
-  0.789995153610791090f, 0.789524669441982190f, 0.789053720816151880f,
-  0.788582308010347120f,
-  0.788110431301888070f, 0.787638090968367450f, 0.787165287287651010f,
-  0.786692020537876790f,
-  0.786218290997455660f, 0.785744098945070360f, 0.785269444659675850f,
-  0.784794328420499230f,
-  0.784318750507038920f, 0.783842711199065230f, 0.783366210776619720f,
-  0.782889249520015480f,
-  0.782411827709836530f, 0.781933945626937630f, 0.781455603552444590f,
-  0.780976801767753750f,
-  0.780497540554531910f, 0.780017820194715990f, 0.779537640970513260f,
-  0.779057003164400630f,
-  0.778575907059125050f, 0.778094352937702790f, 0.777612341083420030f,
-  0.777129871779831620f,
-  0.776646945310762060f, 0.776163561960304340f, 0.775679722012820650f,
-  0.775195425752941420f,
-  0.774710673465565550f, 0.774225465435860680f, 0.773739801949261840f,
-  0.773253683291472590f,
-  0.772767109748463850f, 0.772280081606474320f, 0.771792599152010150f,
-  0.771304662671844830f,
-  0.770816272453018540f, 0.770327428782838890f, 0.769838131948879840f,
-  0.769348382238982280f,
-  0.768858179941253270f, 0.768367525344066270f, 0.767876418736060610f,
-  0.767384860406141730f,
-  0.766892850643480670f, 0.766400389737514230f, 0.765907477977944340f,
-  0.765414115654738270f,
-  0.764920303058128410f, 0.764426040478612070f, 0.763931328206951090f,
-  0.763436166534172010f,
-  0.762940555751565720f, 0.762444496150687210f, 0.761947988023355390f,
-  0.761451031661653620f,
-  0.760953627357928150f, 0.760455775404789260f, 0.759957476095110330f,
-  0.759458729722028210f,
-  0.758959536578942440f, 0.758459896959515430f, 0.757959811157672300f,
-  0.757459279467600720f,
-  0.756958302183750490f, 0.756456879600833740f, 0.755955012013824420f,
-  0.755452699717958250f,
-  0.754949943008732640f, 0.754446742181906440f, 0.753943097533499640f,
-  0.753439009359793580f,
-  0.752934477957330150f, 0.752429503622912390f, 0.751924086653603550f,
-  0.751418227346727470f,
-  0.750911925999867890f, 0.750405182910869330f, 0.749897998377835330f,
-  0.749390372699129560f,
-  0.748882306173375150f, 0.748373799099454560f, 0.747864851776509410f,
-  0.747355464503940190f,
-  0.746845637581406540f, 0.746335371308826320f, 0.745824665986376090f,
-  0.745313521914490520f,
-  0.744801939393862630f, 0.744289918725443260f, 0.743777460210440890f,
-  0.743264564150321600f,
-  0.742751230846809050f, 0.742237460601884000f, 0.741723253717784140f,
-  0.741208610497004260f,
-  0.740693531242295760f, 0.740178016256666240f, 0.739662065843380010f,
-  0.739145680305957510f,
-  0.738628859948174840f, 0.738111605074064260f, 0.737593915987913570f,
-  0.737075792994265730f,
-  0.736557236397919150f, 0.736038246503927350f, 0.735518823617598900f,
-  0.734998968044496710f,
-  0.734478680090438370f, 0.733957960061495940f, 0.733436808263995710f,
-  0.732915225004517780f,
-  0.732393210589896040f, 0.731870765327218290f, 0.731347889523825570f,
-  0.730824583487312160f,
-  0.730300847525525490f, 0.729776681946566090f, 0.729252087058786970f,
-  0.728727063170793830f,
-  0.728201610591444610f, 0.727675729629849610f, 0.727149420595371020f,
-  0.726622683797622850f,
-  0.726095519546471000f, 0.725567928152032300f, 0.725039909924675370f,
-  0.724511465175019630f,
-  0.723982594213935520f, 0.723453297352544380f, 0.722923574902217700f,
-  0.722393427174577550f,
-  0.721862854481496340f, 0.721331857135096290f, 0.720800435447749190f,
-  0.720268589732077190f,
-  0.719736320300951030f, 0.719203627467491220f, 0.718670511545067230f,
-  0.718136972847297490f,
-  0.717603011688049080f, 0.717068628381437480f, 0.716533823241826680f,
-  0.715998596583828690f,
-  0.715462948722303760f, 0.714926879972359490f, 0.714390390649351390f,
-  0.713853481068882470f,
-  0.713316151546802610f, 0.712778402399208980f, 0.712240233942445510f,
-  0.711701646493102970f,
-  0.711162640368018350f, 0.710623215884275020f, 0.710083373359202800f,
-  0.709543113110376770f,
-  0.709002435455618250f, 0.708461340712994160f, 0.707919829200816310f,
-  0.707377901237642100f,
-  0.706835557142273860f, 0.706292797233758480f, 0.705749621831387790f,
-  0.705206031254697830f,
-  0.704662025823468930f, 0.704117605857725430f, 0.703572771677735580f,
-  0.703027523604011220f,
-  0.702481861957308000f, 0.701935787058624360f, 0.701389299229202230f,
-  0.700842398790526230f,
-  0.700295086064323780f, 0.699747361372564990f, 0.699199225037462120f,
-  0.698650677381469580f,
-  0.698101718727283880f, 0.697552349397843270f, 0.697002569716327460f,
-  0.696452380006157830f,
-  0.695901780590996830f, 0.695350771794747800f, 0.694799353941554900f,
-  0.694247527355803310f,
-  0.693695292362118350f, 0.693142649285365510f, 0.692589598450650380f,
-  0.692036140183318830f,
-  0.691482274808955850f, 0.690928002653386280f, 0.690373324042674040f,
-  0.689818239303122470f,
-  0.689262748761273470f, 0.688706852743907750f, 0.688150551578044830f,
-  0.687593845590942170f,
-  0.687036735110095660f, 0.686479220463238950f, 0.685921301978343670f,
-  0.685362979983618730f,
-  0.684804254807510620f, 0.684245126778703080f, 0.683685596226116690f,
-  0.683125663478908800f,
-  0.682565328866473250f, 0.682004592718440830f, 0.681443455364677990f,
-  0.680881917135287340f,
-  0.680319978360607200f, 0.679757639371212030f, 0.679194900497911200f,
-  0.678631762071749470f,
-  0.678068224424006600f, 0.677504287886197430f, 0.676939952790071240f,
-  0.676375219467611700f,
-  0.675810088251037060f, 0.675244559472799270f, 0.674678633465584540f,
-  0.674112310562312360f,
-  0.673545591096136100f, 0.672978475400442090f, 0.672410963808849900f,
-  0.671843056655211930f,
-  0.671274754273613490f, 0.670706056998372160f, 0.670136965164037760f,
-  0.669567479105392490f,
-  0.668997599157450270f, 0.668427325655456820f, 0.667856658934889440f,
-  0.667285599331456480f,
-  0.666714147181097670f, 0.666142302819983540f, 0.665570066584515560f,
-  0.664997438811325340f,
-  0.664424419837275180f, 0.663851009999457340f, 0.663277209635194100f,
-  0.662703019082037440f,
-  0.662128438677768720f, 0.661553468760399000f, 0.660978109668168060f,
-  0.660402361739545030f,
-  0.659826225313227430f, 0.659249700728141490f, 0.658672788323441890f,
-  0.658095488438511290f,
-  0.657517801412960120f, 0.656939727586627110f, 0.656361267299578000f,
-  0.655782420892106030f,
-  0.655203188704731930f, 0.654623571078202680f, 0.654043568353492640f,
-  0.653463180871802330f,
-  0.652882408974558960f, 0.652301253003415460f, 0.651719713300251020f,
-  0.651137790207170330f,
-  0.650555484066503990f, 0.649972795220807530f, 0.649389724012861770f,
-  0.648806270785672550f,
-  0.648222435882470420f, 0.647638219646710420f, 0.647053622422071650f,
-  0.646468644552457890f,
-  0.645883286381996440f, 0.645297548255038380f, 0.644711430516158420f,
-  0.644124933510154540f,
-  0.643538057582047850f, 0.642950803077082080f, 0.642363170340724320f,
-  0.641775159718663500f,
-  0.641186771556811250f, 0.640598006201301030f, 0.640008863998488440f,
-  0.639419345294950700f,
-  0.638829450437486400f, 0.638239179773115390f, 0.637648533649078810f,
-  0.637057512412838590f,
-  0.636466116412077180f, 0.635874345994697720f, 0.635282201508823530f,
-  0.634689683302797850f,
-  0.634096791725183740f, 0.633503527124764320f, 0.632909889850541860f,
-  0.632315880251737680f,
-  0.631721498677792370f, 0.631126745478365340f, 0.630531621003334600f,
-  0.629936125602796550f,
-  0.629340259627065750f, 0.628744023426674790f, 0.628147417352374120f,
-  0.627550441755131530f,
-  0.626953096986132770f, 0.626355383396779990f, 0.625757301338692900f,
-  0.625158851163707730f,
-  0.624560033223877320f, 0.623960847871470770f, 0.623361295458973340f,
-  0.622761376339086460f,
-  0.622161090864726930f, 0.621560439389027270f, 0.620959422265335180f,
-  0.620358039847213830f,
-  0.619756292488440660f, 0.619154180543008410f, 0.618551704365123860f,
-  0.617948864309208260f,
-  0.617345660729896940f, 0.616742093982038830f, 0.616138164420696910f,
-  0.615533872401147430f,
-  0.614929218278879590f, 0.614324202409595950f, 0.613718825149211830f,
-  0.613113086853854910f,
-  0.612506987879865570f, 0.611900528583796070f, 0.611293709322411010f,
-  0.610686530452686280f,
-  0.610078992331809620f, 0.609471095317180240f, 0.608862839766408200f,
-  0.608254226037314490f,
-  0.607645254487930830f, 0.607035925476499760f, 0.606426239361473550f,
-  0.605816196501515080f,
-  0.605205797255496500f, 0.604595041982500360f, 0.603983931041818020f,
-  0.603372464792950370f,
-  0.602760643595607220f, 0.602148467809707320f, 0.601535937795377730f,
-  0.600923053912954090f,
-  0.600309816522980430f, 0.599696225986208310f, 0.599082282663597310f,
-  0.598467986916314310f,
-  0.597853339105733910f, 0.597238339593437530f, 0.596622988741213330f,
-  0.596007286911056530f,
-  0.595391234465168730f, 0.594774831765957580f, 0.594158079176036800f,
-  0.593540977058226390f,
-  0.592923525775551410f, 0.592305725691242400f, 0.591687577168735550f,
-  0.591069080571671510f,
-  0.590450236263895920f, 0.589831044609458900f, 0.589211505972615070f,
-  0.588591620717822890f,
-  0.587971389209745120f, 0.587350811813247660f, 0.586729888893400500f,
-  0.586108620815476430f,
-  0.585487007944951450f, 0.584865050647504490f, 0.584242749289016980f,
-  0.583620104235572760f,
-  0.582997115853457700f, 0.582373784509160220f, 0.581750110569369760f,
-  0.581126094400977620f,
-  0.580501736371076600f, 0.579877036846960350f, 0.579251996196123550f,
-  0.578626614786261430f,
-  0.578000892985269910f, 0.577374831161244880f, 0.576748429682482520f,
-  0.576121688917478390f,
-  0.575494609234928230f, 0.574867191003726740f, 0.574239434592967890f,
-  0.573611340371944610f,
-  0.572982908710148680f, 0.572354139977270030f, 0.571725034543197120f,
-  0.571095592778016690f,
-  0.570465815052012990f, 0.569835701735668110f, 0.569205253199661200f,
-  0.568574469814869250f,
-  0.567943351952365670f, 0.567311899983420800f, 0.566680114279501710f,
-  0.566047995212271560f,
-  0.565415543153589770f, 0.564782758475511400f, 0.564149641550287680f,
-  0.563516192750364910f,
-  0.562882412448384550f, 0.562248301017183150f, 0.561613858829792420f,
-  0.560979086259438260f,
-  0.560343983679540860f, 0.559708551463714790f, 0.559072789985768480f,
-  0.558436699619704100f,
-  0.557800280739717100f, 0.557163533720196340f, 0.556526458935723720f,
-  0.555889056761073920f,
-  0.555251327571214090f, 0.554613271741304040f, 0.553974889646695610f,
-  0.553336181662932410f,
-  0.552697148165749770f, 0.552057789531074980f, 0.551418106135026060f,
-  0.550778098353912230f,
-  0.550137766564233630f, 0.549497111142680960f, 0.548856132466135290f,
-  0.548214830911667780f,
-  0.547573206856539870f, 0.546931260678202190f, 0.546288992754295210f,
-  0.545646403462648590f,
-  0.545003493181281160f, 0.544360262288400400f, 0.543716711162402390f,
-  0.543072840181871850f,
-  0.542428649725581360f, 0.541784140172491660f, 0.541139311901750910f,
-  0.540494165292695230f,
-  0.539848700724847700f, 0.539202918577918240f, 0.538556819231804210f,
-  0.537910403066588990f,
-  0.537263670462542530f, 0.536616621800121150f, 0.535969257459966710f,
-  0.535321577822907010f,
-  0.534673583269955510f, 0.534025274182310380f, 0.533376650941355560f,
-  0.532727713928658810f,
-  0.532078463525973540f, 0.531428900115236910f, 0.530779024078570250f,
-  0.530128835798278850f,
-  0.529478335656852090f, 0.528827524036961980f, 0.528176401321464370f,
-  0.527524967893398200f,
-  0.526873224135984700f, 0.526221170432628170f, 0.525568807166914680f,
-  0.524916134722612890f,
-  0.524263153483673470f, 0.523609863834228030f, 0.522956266158590140f,
-  0.522302360841254700f,
-  0.521648148266897090f, 0.520993628820373810f, 0.520338802886721960f,
-  0.519683670851158520f,
-  0.519028233099080970f, 0.518372490016066220f, 0.517716441987871150f,
-  0.517060089400432130f,
-  0.516403432639863990f, 0.515746472092461380f, 0.515089208144697270f,
-  0.514431641183222930f,
-  0.513773771594868030f, 0.513115599766640560f, 0.512457126085725800f,
-  0.511798350939487000f,
-  0.511139274715464390f, 0.510479897801375700f, 0.509820220585115560f,
-  0.509160243454754750f,
-  0.508499966798540810f, 0.507839391004897940f, 0.507178516462425290f,
-  0.506517343559898530f,
-  0.505855872686268860f, 0.505194104230662240f, 0.504532038582380380f,
-  0.503869676130898950f,
-  0.503207017265869030f, 0.502544062377115800f, 0.501880811854638400f,
-  0.501217266088609950f,
-  0.500553425469377640f, 0.499889290387461380f, 0.499224861233555030f,
-  0.498560138398525200f,
-  0.497895122273410930f, 0.497229813249424340f, 0.496564211717949340f,
-  0.495898318070542240f,
-  0.495232132698931350f, 0.494565655995016010f, 0.493898888350867430f,
-  0.493231830158728070f,
-  0.492564481811010650f, 0.491896843700299240f, 0.491228916219348330f,
-  0.490560699761082080f,
-  0.489892194718595300f, 0.489223401485152030f, 0.488554320454186230f,
-  0.487884952019301210f,
-  0.487215296574268820f, 0.486545354513030270f, 0.485875126229695420f,
-  0.485204612118541880f,
-  0.484533812574016120f, 0.483862727990732320f, 0.483191358763471910f,
-  0.482519705287184520f,
-  0.481847767956986080f, 0.481175547168160360f, 0.480503043316157670f,
-  0.479830256796594250f,
-  0.479157188005253310f, 0.478483837338084080f, 0.477810205191201040f,
-  0.477136291960884750f,
-  0.476462098043581310f, 0.475787623835901120f, 0.475112869734620470f,
-  0.474437836136679340f,
-  0.473762523439182850f, 0.473086932039400220f, 0.472411062334764100f,
-  0.471734914722871430f,
-  0.471058489601482610f, 0.470381787368520710f, 0.469704808422072460f,
-  0.469027553160387240f,
-  0.468350021981876530f, 0.467672215285114710f, 0.466994133468838110f,
-  0.466315776931944480f,
-  0.465637146073493770f, 0.464958241292706740f, 0.464279062988965760f,
-  0.463599611561814120f,
-  0.462919887410955130f, 0.462239890936253280f, 0.461559622537733190f,
-  0.460879082615578690f,
-  0.460198271570134270f, 0.459517189801903590f, 0.458835837711549120f,
-  0.458154215699893230f,
-  0.457472324167916110f, 0.456790163516757220f, 0.456107734147714220f,
-  0.455425036462242420f,
-  0.454742070861955450f, 0.454058837748624540f, 0.453375337524177750f,
-  0.452691570590700860f,
-  0.452007537350436530f, 0.451323238205783520f, 0.450638673559297760f,
-  0.449953843813690580f,
-  0.449268749371829920f, 0.448583390636739300f, 0.447897768011597360f,
-  0.447211881899738260f,
-  0.446525732704651400f, 0.445839320829980350f, 0.445152646679523590f,
-  0.444465710657234110f,
-  0.443778513167218280f, 0.443091054613736990f, 0.442403335401204130f,
-  0.441715355934187310f,
-  0.441027116617407340f, 0.440338617855737300f, 0.439649860054203420f,
-  0.438960843617984430f,
-  0.438271568952410480f, 0.437582036462964340f, 0.436892246555280470f,
-  0.436202199635143950f,
-  0.435511896108492170f, 0.434821336381412350f, 0.434130520860143310f,
-  0.433439449951074200f,
-  0.432748124060743760f, 0.432056543595841450f, 0.431364708963206440f,
-  0.430672620569826860f,
-  0.429980278822840570f, 0.429287684129534720f, 0.428594836897344400f,
-  0.427901737533854240f,
-  0.427208386446796370f, 0.426514784044051520f, 0.425820930733648350f,
-  0.425126826923762410f,
-  0.424432473022717420f, 0.423737869438983950f, 0.423043016581179100f,
-  0.422347914858067000f,
-  0.421652564678558380f, 0.420956966451709440f, 0.420261120586723050f,
-  0.419565027492946940f,
-  0.418868687579875110f, 0.418172101257146430f, 0.417475268934544340f,
-  0.416778191021997590f,
-  0.416080867929579320f, 0.415383300067506290f, 0.414685487846140010f,
-  0.413987431675985510f,
-  0.413289131967690960f, 0.412590589132048380f, 0.411891803579992220f,
-  0.411192775722600160f,
-  0.410493505971092520f, 0.409793994736831200f, 0.409094242431320920f,
-  0.408394249466208110f,
-  0.407694016253280170f, 0.406993543204466460f, 0.406292830731837470f,
-  0.405591879247603870f,
-  0.404890689164117750f, 0.404189260893870750f, 0.403487594849495310f,
-  0.402785691443763640f,
-  0.402083551089587040f, 0.401381174200016790f, 0.400678561188243350f,
-  0.399975712467595390f,
-  0.399272628451540930f, 0.398569309553686360f, 0.397865756187775750f,
-  0.397161968767691720f,
-  0.396457947707453960f, 0.395753693421220080f, 0.395049206323284880f,
-  0.394344486828079650f,
-  0.393639535350172880f, 0.392934352304269600f, 0.392228938105210370f,
-  0.391523293167972350f,
-  0.390817417907668610f, 0.390111312739546910f, 0.389404978078991100f,
-  0.388698414341519250f,
-  0.387991621942784910f, 0.387284601298575890f, 0.386577352824813980f,
-  0.385869876937555310f,
-  0.385162174052989970f, 0.384454244587440870f, 0.383746088957365010f,
-  0.383037707579352130f,
-  0.382329100870124510f, 0.381620269246537520f, 0.380911213125578130f,
-  0.380201932924366050f,
-  0.379492429060152740f, 0.378782701950320600f, 0.378072752012383990f,
-  0.377362579663988450f,
-  0.376652185322909620f, 0.375941569407054420f, 0.375230732334460030f,
-  0.374519674523293210f,
-  0.373808396391851370f, 0.373096898358560690f, 0.372385180841977360f,
-  0.371673244260786630f,
-  0.370961089033802040f, 0.370248715579966360f, 0.369536124318350760f,
-  0.368823315668153960f,
-  0.368110290048703050f, 0.367397047879452820f, 0.366683589579984930f,
-  0.365969915570008910f,
-  0.365256026269360380f, 0.364541922098002180f, 0.363827603476023610f,
-  0.363113070823639530f,
-  0.362398324561191310f, 0.361683365109145950f, 0.360968192888095290f,
-  0.360252808318756830f,
-  0.359537211821973180f, 0.358821403818710860f, 0.358105384730061760f,
-  0.357389154977241000f,
-  0.356672714981588260f, 0.355956065164567010f, 0.355239205947763370f,
-  0.354522137752887430f,
-  0.353804861001772160f, 0.353087376116372530f, 0.352369683518766630f,
-  0.351651783631154680f,
-  0.350933676875858360f, 0.350215363675321740f, 0.349496844452109600f,
-  0.348778119628908420f,
-  0.348059189628525780f, 0.347340054873889190f, 0.346620715788047320f,
-  0.345901172794169100f,
-  0.345181426315542610f, 0.344461476775576480f, 0.343741324597798600f,
-  0.343020970205855540f,
-  0.342300414023513690f, 0.341579656474657210f, 0.340858697983289440f,
-  0.340137538973531880f,
-  0.339416179869623410f, 0.338694621095921190f, 0.337972863076899830f,
-  0.337250906237150650f,
-  0.336528751001382350f, 0.335806397794420560f, 0.335083847041206580f,
-  0.334361099166798900f,
-  0.333638154596370920f, 0.332915013755212650f, 0.332191677068729320f,
-  0.331468144962440920f,
-  0.330744417861982890f, 0.330020496193105530f, 0.329296380381672800f,
-  0.328572070853663690f,
-  0.327847568035170960f, 0.327122872352400510f, 0.326397984231672660f,
-  0.325672904099419900f,
-  0.324947632382188430f, 0.324222169506637130f, 0.323496515899536760f,
-  0.322770671987770710f,
-  0.322044638198334620f, 0.321318414958334910f, 0.320592002694990330f,
-  0.319865401835630610f,
-  0.319138612807695900f, 0.318411636038737960f, 0.317684471956418020f,
-  0.316957120988508150f,
-  0.316229583562890490f, 0.315501860107556040f, 0.314773951050606070f,
-  0.314045856820250820f,
-  0.313317577844809070f, 0.312589114552708660f, 0.311860467372486130f,
-  0.311131636732785270f,
-  0.310402623062358880f, 0.309673426790066490f, 0.308944048344875710f,
-  0.308214488155861220f,
-  0.307484746652204160f, 0.306754824263192780f, 0.306024721418221900f,
-  0.305294438546791720f,
-  0.304563976078509050f, 0.303833334443086470f, 0.303102514070341060f,
-  0.302371515390196130f,
-  0.301640338832678880f, 0.300908984827921890f, 0.300177453806162120f,
-  0.299445746197739950f,
-  0.298713862433100390f, 0.297981802942791920f, 0.297249568157465890f,
-  0.296517158507877410f,
-  0.295784574424884370f, 0.295051816339446720f, 0.294318884682627570f,
-  0.293585779885591310f,
-  0.292852502379604810f, 0.292119052596036540f, 0.291385430966355720f,
-  0.290651637922133220f,
-  0.289917673895040860f, 0.289183539316850310f, 0.288449234619434170f,
-  0.287714760234765280f,
-  0.286980116594915570f, 0.286245304132057120f, 0.285510323278461380f,
-  0.284775174466498300f,
-  0.284039858128637360f, 0.283304374697445790f, 0.282568724605589740f,
-  0.281832908285833460f,
-  0.281096926171038320f, 0.280360778694163810f, 0.279624466288266700f,
-  0.278887989386500280f,
-  0.278151348422115090f, 0.277414543828458200f, 0.276677576038972420f,
-  0.275940445487197320f,
-  0.275203152606767370f, 0.274465697831413220f, 0.273728081594960650f,
-  0.272990304331329980f,
-  0.272252366474536660f, 0.271514268458690810f, 0.270776010717996010f,
-  0.270037593686750510f,
-  0.269299017799346230f, 0.268560283490267890f, 0.267821391194094320f,
-  0.267082341345496350f,
-  0.266343134379238180f, 0.265603770730176440f, 0.264864250833259320f,
-  0.264124575123527490f,
-  0.263384744036113390f, 0.262644758006240100f, 0.261904617469222560f,
-  0.261164322860466590f,
-  0.260423874615468010f, 0.259683273169813930f, 0.258942518959180580f,
-  0.258201612419334870f,
-  0.257460553986133210f, 0.256719344095520720f, 0.255977983183532380f,
-  0.255236471686291820f,
-  0.254494810040010790f, 0.253752998680989940f, 0.253011038045617980f,
-  0.252268928570370810f,
-  0.251526670691812780f, 0.250784264846594550f, 0.250041711471454650f,
-  0.249299011003218300f,
-  0.248556163878796620f, 0.247813170535187620f, 0.247070031409475370f,
-  0.246326746938829060f,
-  0.245583317560504000f, 0.244839743711840750f, 0.244096025830264210f,
-  0.243352164353284880f,
-  0.242608159718496890f, 0.241864012363579210f, 0.241119722726294730f,
-  0.240375291244489500f,
-  0.239630718356093560f, 0.238886004499120170f, 0.238141150111664870f,
-  0.237396155631906550f,
-  0.236651021498106460f, 0.235905748148607370f, 0.235160336021834860f,
-  0.234414785556295250f,
-  0.233669097190576820f, 0.232923271363349120f, 0.232177308513361770f,
-  0.231431209079445730f,
-  0.230684973500512310f, 0.229938602215552260f, 0.229192095663636740f,
-  0.228445454283916550f,
-  0.227698678515621170f, 0.226951768798059980f, 0.226204725570620270f,
-  0.225457549272768540f,
-  0.224710240344049570f, 0.223962799224085520f, 0.223215226352576960f,
-  0.222467522169301990f,
-  0.221719687114115240f, 0.220971721626949060f, 0.220223626147812460f,
-  0.219475401116790340f,
-  0.218727046974044600f, 0.217978564159812290f, 0.217229953114406790f,
-  0.216481214278216900f,
-  0.215732348091705940f, 0.214983354995412820f, 0.214234235429951100f,
-  0.213484989836008080f,
-  0.212735618654345870f, 0.211986122325800410f, 0.211236501291280710f,
-  0.210486755991769890f,
-  0.209736886868323370f, 0.208986894362070070f, 0.208236778914211470f,
-  0.207486540966020700f,
-  0.206736180958843660f, 0.205985699334098050f, 0.205235096533272380f,
-  0.204484372997927180f,
-  0.203733529169694010f, 0.202982565490274460f, 0.202231482401441620f,
-  0.201480280345037820f,
-  0.200728959762976140f, 0.199977521097239290f, 0.199225964789878890f,
-  0.198474291283016360f,
-  0.197722501018842030f, 0.196970594439614370f, 0.196218571987660850f,
-  0.195466434105377090f,
-  0.194714181235225990f, 0.193961813819739010f, 0.193209332301514080f,
-  0.192456737123216840f,
-  0.191704028727579940f, 0.190951207557401860f, 0.190198274055548120f,
-  0.189445228664950340f,
-  0.188692071828605260f, 0.187938803989575850f, 0.187185425590990440f,
-  0.186431937076041640f,
-  0.185678338887987790f, 0.184924631470150870f, 0.184170815265917720f,
-  0.183416890718739230f,
-  0.182662858272129360f, 0.181908718369666160f, 0.181154471454990920f,
-  0.180400117971807270f,
-  0.179645658363882100f, 0.178891093075044830f, 0.178136422549186320f,
-  0.177381647230260200f,
-  0.176626767562280960f, 0.175871783989325040f, 0.175116696955530060f,
-  0.174361506905093830f,
-  0.173606214282275410f, 0.172850819531394200f, 0.172095323096829040f,
-  0.171339725423019260f,
-  0.170584026954463700f, 0.169828228135719880f, 0.169072329411405180f,
-  0.168316331226194910f,
-  0.167560234024823590f, 0.166804038252083870f, 0.166047744352825850f,
-  0.165291352771957970f,
-  0.164534863954446110f, 0.163778278345312690f, 0.163021596389637810f,
-  0.162264818532558110f,
-  0.161507945219266150f, 0.160750976895011390f, 0.159993914005098350f,
-  0.159236756994887850f,
-  0.158479506309796100f, 0.157722162395293690f, 0.156964725696906750f,
-  0.156207196660216040f,
-  0.155449575730855880f, 0.154691863354515400f, 0.153934059976937460f,
-  0.153176166043917870f,
-  0.152418182001306500f, 0.151660108295005400f, 0.150901945370970040f,
-  0.150143693675208330f,
-  0.149385353653779810f, 0.148626925752796540f, 0.147868410418422360f,
-  0.147109808096871850f,
-  0.146351119234411440f, 0.145592344277358450f, 0.144833483672080240f,
-  0.144074537864995330f,
-  0.143315507302571590f, 0.142556392431327340f, 0.141797193697830530f,
-  0.141037911548697770f,
-  0.140278546430595420f, 0.139519098790238600f, 0.138759569074390380f,
-  0.137999957729862760f,
-  0.137240265203515700f, 0.136480491942256310f, 0.135720638393040080f,
-  0.134960705002868830f,
-  0.134200692218792020f, 0.133440600487905820f, 0.132680430257352130f,
-  0.131920181974319760f,
-  0.131159856086043410f, 0.130399453039802740f, 0.129638973282923540f,
-  0.128878417262776660f,
-  0.128117785426777150f, 0.127357078222385570f, 0.126596296097105960f,
-  0.125835439498487020f,
-  0.125074508874121300f, 0.124313504671644300f, 0.123552427338735370f,
-  0.122791277323116900f,
-  0.122030055072553410f, 0.121268761034852550f, 0.120507395657864240f,
-  0.119745959389479630f,
-  0.118984452677632520f, 0.118222875970297250f, 0.117461229715489990f,
-  0.116699514361267840f,
-  0.115937730355727850f, 0.115175878147008180f, 0.114413958183287050f,
-  0.113651970912781920f,
-  0.112889916783750470f, 0.112127796244489750f, 0.111365609743335190f,
-  0.110603357728661910f,
-  0.109841040648882680f, 0.109078658952449240f, 0.108316213087851300f,
-  0.107553703503615710f,
-  0.106791130648307380f, 0.106028494970528530f, 0.105265796918917650f,
-  0.104503036942150550f,
-  0.103740215488939480f, 0.102977333008032250f, 0.102214389948213370f,
-  0.101451386758302160f,
-  0.100688323887153970f, 0.099925201783659226f, 0.099162020896742573f,
-  0.098398781675363881f,
-  0.097635484568517339f, 0.096872130025230527f, 0.096108718494565468f,
-  0.095345250425617742f,
-  0.094581726267515473f, 0.093818146469420494f, 0.093054511480527333f,
-  0.092290821750062355f,
-  0.091527077727284981f, 0.090763279861485704f, 0.089999428601987341f,
-  0.089235524398144139f,
-  0.088471567699340822f, 0.087707558954993645f, 0.086943498614549489f,
-  0.086179387127484922f,
-  0.085415224943307277f, 0.084651012511553700f, 0.083886750281790226f,
-  0.083122438703613077f,
-  0.082358078226646619f, 0.081593669300544638f, 0.080829212374989468f,
-  0.080064707899690932f,
-  0.079300156324387569f, 0.078535558098845590f, 0.077770913672857989f,
-  0.077006223496245585f,
-  0.076241488018856149f, 0.075476707690563416f, 0.074711882961268378f,
-  0.073947014280897269f,
-  0.073182102099402888f, 0.072417146866763538f, 0.071652149032982254f,
-  0.070887109048087787f,
-  0.070122027362133646f, 0.069356904425197236f, 0.068591740687380900f,
-  0.067826536598810966f,
-  0.067061292609636836f, 0.066296009170032283f, 0.065530686730193397f,
-  0.064765325740339871f,
-  0.063999926650714078f, 0.063234489911580136f, 0.062469015973224969f,
-  0.061703505285957416f,
-  0.060937958300107238f, 0.060172375466026218f, 0.059406757234087247f,
-  0.058641104054683348f,
-  0.057875416378229017f, 0.057109694655158132f, 0.056343939335925283f,
-  0.055578150871004817f,
-  0.054812329710889909f, 0.054046476306093640f, 0.053280591107148056f,
-  0.052514674564603257f,
-  0.051748727129028414f, 0.050982749251010900f, 0.050216741381155325f,
-  0.049450703970084824f,
-  0.048684637468439020f, 0.047918542326875327f, 0.047152418996068000f,
-  0.046386267926707213f,
-  0.045620089569500123f, 0.044853884375169933f, 0.044087652794454979f,
-  0.043321395278109784f,
-  0.042555112276904117f, 0.041788804241622082f, 0.041022471623063397f,
-  0.040256114872041358f,
-  0.039489734439384118f, 0.038723330775933762f, 0.037956904332545366f,
-  0.037190455560088091f,
-  0.036423984909444228f, 0.035657492831508264f, 0.034890979777187955f,
-  0.034124446197403423f,
-  0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,
-  0.031058115642434700f,
-  0.030291486199539423f, 0.029524838936943035f, 0.028758174305644590f,
-  0.027991492756653365f,
-  0.027224794740987910f, 0.026458080709677145f, 0.025691351113759395f,
-  0.024924606404281485f,
-  0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,
-  0.021857485452021874f,
-  0.021090671940755180f, 0.020323846022389572f, 0.019557008148029204f,
-  0.018790158768784596f,
-  0.018023298335773701f, 0.017256427300120978f, 0.016489546112956454f,
-  0.015722655225417017f,
-  0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,
-  0.012655003694430301f,
-  0.011888071072252072f, 0.011121131456628141f, 0.010354185298728884f,
-  0.009587233049729183f,
-  0.008820275160807512f, 0.008053312083144991f, 0.007286344267926684f,
-  0.006519372166339549f,
-  0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,
-  0.003451449920135975f,
-  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
-  0.000383495187571497f
-};
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
-    const float32_t Weights_8192[16384] = {
-  1.000000000000000000f, -0.000000000000000000f, 0.999999981616429330f,
-    -0.000191747597310703f,
-  0.999999926465717890f, -0.000383495187571396f, 0.999999834547867670f,
-    -0.000575242763732066f,
-  0.999999705862882230f, -0.000766990318742704f, 0.999999540410766110f,
-    -0.000958737845553301f,
-  0.999999338191525530f, -0.001150485337113849f, 0.999999099205167830f,
-    -0.001342232786374338f,
-  0.999998823451701880f, -0.001533980186284766f, 0.999998510931137790f,
-    -0.001725727529795126f,
-  0.999998161643486980f, -0.001917474809855419f, 0.999997775588762350f,
-    -0.002109222019415644f,
-  0.999997352766978210f, -0.002300969151425805f, 0.999996893178149880f,
-    -0.002492716198835908f,
-  0.999996396822294350f, -0.002684463154595962f, 0.999995863699429940f,
-    -0.002876210011655979f,
-  0.999995293809576190f, -0.003067956762965976f, 0.999994687152754080f,
-    -0.003259703401475973f,
-  0.999994043728985820f, -0.003451449920135994f, 0.999993363538295150f,
-    -0.003643196311896068f,
-  0.999992646580707190f, -0.003834942569706228f, 0.999991892856248010f,
-    -0.004026688686516512f,
-  0.999991102364945590f, -0.004218434655276963f, 0.999990275106828920f,
-    -0.004410180468937631f,
-  0.999989411081928400f, -0.004601926120448571f, 0.999988510290275690f,
-    -0.004793671602759841f,
-  0.999987572731904080f, -0.004985416908821511f, 0.999986598406848000f,
-    -0.005177162031583651f,
-  0.999985587315143200f, -0.005368906963996343f, 0.999984539456826970f,
-    -0.005560651699009674f,
-  0.999983454831937730f, -0.005752396229573736f, 0.999982333440515350f,
-    -0.005944140548638633f,
-  0.999981175282601110f, -0.006135884649154475f, 0.999979980358237650f,
-    -0.006327628524071378f,
-  0.999978748667468830f, -0.006519372166339468f, 0.999977480210339940f,
-    -0.006711115568908879f,
-  0.999976174986897610f, -0.006902858724729756f, 0.999974832997189810f,
-    -0.007094601626752250f,
-  0.999973454241265940f, -0.007286344267926521f, 0.999972038719176730f,
-    -0.007478086641202744f,
-  0.999970586430974140f, -0.007669828739531097f, 0.999969097376711580f,
-    -0.007861570555861772f,
-  0.999967571556443780f, -0.008053312083144972f, 0.999966008970226920f,
-    -0.008245053314330906f,
-  0.999964409618118280f, -0.008436794242369799f, 0.999962773500176930f,
-    -0.008628534860211886f,
-  0.999961100616462820f, -0.008820275160807412f, 0.999959390967037450f,
-    -0.009012015137106633f,
-  0.999957644551963900f, -0.009203754782059819f, 0.999955861371306100f,
-    -0.009395494088617252f,
-  0.999954041425129780f, -0.009587233049729225f, 0.999952184713501780f,
-    -0.009778971658346044f,
-  0.999950291236490480f, -0.009970709907418031f, 0.999948360994165400f,
-    -0.010162447789895513f,
-  0.999946393986597460f, -0.010354185298728842f, 0.999944390213859060f,
-    -0.010545922426868378f,
-  0.999942349676023910f, -0.010737659167264491f, 0.999940272373166960f,
-    -0.010929395512867571f,
-  0.999938158305364590f, -0.011121131456628021f, 0.999936007472694620f,
-    -0.011312866991496258f,
-  0.999933819875236000f, -0.011504602110422714f, 0.999931595513069200f,
-    -0.011696336806357838f,
-  0.999929334386276070f, -0.011888071072252092f, 0.999927036494939640f,
-    -0.012079804901055957f,
-  0.999924701839144500f, -0.012271538285719925f, 0.999922330418976490f,
-    -0.012463271219194511f,
-  0.999919922234522750f, -0.012655003694430242f, 0.999917477285871770f,
-    -0.012846735704377662f,
-  0.999914995573113470f, -0.013038467241987334f, 0.999912477096339240f,
-    -0.013230198300209835f,
-  0.999909921855641540f, -0.013421928871995765f, 0.999907329851114300f,
-    -0.013613658950295740f,
-  0.999904701082852900f, -0.013805388528060391f, 0.999902035550953920f,
-    -0.013997117598240367f,
-  0.999899333255515390f, -0.014188846153786345f, 0.999896594196636680f,
-    -0.014380574187649006f,
-  0.999893818374418490f, -0.014572301692779064f, 0.999891005788962950f,
-    -0.014764028662127246f,
-  0.999888156440373320f, -0.014955755088644296f, 0.999885270328754520f,
-    -0.015147480965280987f,
-  0.999882347454212560f, -0.015339206284988100f, 0.999879387816854930f,
-    -0.015530931040716447f,
-  0.999876391416790410f, -0.015722655225416857f, 0.999873358254129260f,
-    -0.015914378832040183f,
-  0.999870288328982950f, -0.016106101853537287f, 0.999867181641464380f,
-    -0.016297824282859065f,
-  0.999864038191687680f, -0.016489546112956437f, 0.999860857979768540f,
-    -0.016681267336780332f,
-  0.999857641005823860f, -0.016872987947281710f, 0.999854387269971890f,
-    -0.017064707937411563f,
-  0.999851096772332190f, -0.017256427300120877f, 0.999847769513025900f,
-    -0.017448146028360693f,
-  0.999844405492175240f, -0.017639864115082053f, 0.999841004709904000f,
-    -0.017831581553236039f,
-  0.999837567166337090f, -0.018023298335773746f, 0.999834092861600960f,
-    -0.018215014455646290f,
-  0.999830581795823400f, -0.018406729905804820f, 0.999827033969133420f,
-    -0.018598444679200511f,
-  0.999823449381661570f, -0.018790158768784555f, 0.999819828033539420f,
-    -0.018981872167508178f,
-  0.999816169924900410f, -0.019173584868322623f, 0.999812475055878780f,
-    -0.019365296864179156f,
-  0.999808743426610520f, -0.019557008148029083f, 0.999804975037232870f,
-    -0.019748718712823729f,
-  0.999801169887884260f, -0.019940428551514441f, 0.999797327978704690f,
-    -0.020132137657052594f,
-  0.999793449309835270f, -0.020323846022389593f, 0.999789533881418780f,
-    -0.020515553640476875f,
-  0.999785581693599210f, -0.020707260504265895f, 0.999781592746521670f,
-    -0.020898966606708137f,
-  0.999777567040332940f, -0.021090671940755121f, 0.999773504575180990f,
-    -0.021282376499358387f,
-  0.999769405351215280f, -0.021474080275469508f, 0.999765269368586450f,
-    -0.021665783262040078f,
-  0.999761096627446610f, -0.021857485452021735f, 0.999756887127949080f,
-    -0.022049186838366135f,
-  0.999752640870248840f, -0.022240887414024961f, 0.999748357854501780f,
-    -0.022432587171949934f,
-  0.999744038080865430f, -0.022624286105092803f, 0.999739681549498660f,
-    -0.022815984206405345f,
-  0.999735288260561680f, -0.023007681468839369f, 0.999730858214216030f,
-    -0.023199377885346720f,
-  0.999726391410624470f, -0.023391073448879258f, 0.999721887849951310f,
-    -0.023582768152388894f,
-  0.999717347532362190f, -0.023774461988827555f, 0.999712770458023870f,
-    -0.023966154951147210f,
-  0.999708156627104880f, -0.024157847032299864f, 0.999703506039774650f,
-    -0.024349538225237534f,
-  0.999698818696204250f, -0.024541228522912288f, 0.999694094596566000f,
-    -0.024732917918276223f,
-  0.999689333741033640f, -0.024924606404281468f, 0.999684536129782140f,
-    -0.025116293973880186f,
-  0.999679701762987930f, -0.025307980620024571f, 0.999674830640828740f,
-    -0.025499666335666853f,
-  0.999669922763483760f, -0.025691351113759295f, 0.999664978131133310f,
-    -0.025883034947254198f,
-  0.999659996743959220f, -0.026074717829103901f, 0.999654978602144690f,
-    -0.026266399752260760f,
-  0.999649923705874240f, -0.026458080709677187f, 0.999644832055333610f,
-    -0.026649760694305618f,
-  0.999639703650710200f, -0.026841439699098531f, 0.999634538492192300f,
-    -0.027033117717008431f,
-  0.999629336579970110f, -0.027224794740987875f, 0.999624097914234570f,
-    -0.027416470763989436f,
-  0.999618822495178640f, -0.027608145778965740f, 0.999613510322995950f,
-    -0.027799819778869445f,
-  0.999608161397882110f, -0.027991492756653243f, 0.999602775720033530f,
-    -0.028183164705269874f,
-  0.999597353289648380f, -0.028374835617672099f, 0.999591894106925950f,
-    -0.028566505486812728f,
-  0.999586398172067070f, -0.028758174305644615f, 0.999580865485273700f,
-    -0.028949842067120635f,
-  0.999575296046749220f, -0.029141508764193722f, 0.999569689856698580f,
-    -0.029333174389816835f,
-  0.999564046915327740f, -0.029524838936942976f, 0.999558367222844300f,
-    -0.029716502398525191f,
-  0.999552650779456990f, -0.029908164767516555f, 0.999546897585375960f,
-    -0.030099826036870198f,
-  0.999541107640812940f, -0.030291486199539284f, 0.999535280945980540f,
-    -0.030483145248477009f,
-  0.999529417501093140f, -0.030674803176636626f, 0.999523517306366350f,
-    -0.030866459976971412f,
-  0.999517580362016990f, -0.031058115642434700f, 0.999511606668263440f,
-    -0.031249770165979861f,
-  0.999505596225325310f, -0.031441423540560301f, 0.999499549033423640f,
-    -0.031633075759129478f,
-  0.999493465092780590f, -0.031824726814640887f, 0.999487344403620080f,
-    -0.032016376700048060f,
-  0.999481186966166950f, -0.032208025408304586f, 0.999474992780647780f,
-    -0.032399672932364086f,
-  0.999468761847290050f, -0.032591319265180226f, 0.999462494166323160f,
-    -0.032782964399706724f,
-  0.999456189737977340f, -0.032974608328897335f, 0.999449848562484530f,
-    -0.033166251045705857f,
-  0.999443470640077770f, -0.033357892543086139f, 0.999437055970991530f,
-    -0.033549532813992068f,
-  0.999430604555461730f, -0.033741171851377580f, 0.999424116393725640f,
-    -0.033932809648196664f,
-  0.999417591486021720f, -0.034124446197403326f, 0.999411029832589780f,
-    -0.034316081491951651f,
-  0.999404431433671300f, -0.034507715524795750f, 0.999397796289508640f,
-    -0.034699348288889799f,
-  0.999391124400346050f, -0.034890979777188004f, 0.999384415766428560f,
-    -0.035082609982644619f,
-  0.999377670388002850f, -0.035274238898213947f, 0.999370888265317170f,
-    -0.035465866516850353f,
-  0.999364069398620550f, -0.035657492831508222f, 0.999357213788164000f,
-    -0.035849117835142018f,
-  0.999350321434199440f, -0.036040741520706229f, 0.999343392336980220f,
-    -0.036232363881155395f,
-  0.999336426496761240f, -0.036423984909444110f, 0.999329423913798420f,
-    -0.036615604598527030f,
-  0.999322384588349540f, -0.036807222941358832f, 0.999315308520673070f,
-    -0.036998839930894263f,
-  0.999308195711029470f, -0.037190455560088119f, 0.999301046159680070f,
-    -0.037382069821895229f,
-  0.999293859866887790f, -0.037573682709270494f, 0.999286636832916740f,
-    -0.037765294215168860f,
-  0.999279377058032710f, -0.037956904332545310f, 0.999272080542502610f,
-    -0.038148513054354891f,
-  0.999264747286594420f, -0.038340120373552694f, 0.999257377290578060f,
-    -0.038531726283093870f,
-  0.999249970554724420f, -0.038723330775933623f, 0.999242527079305830f,
-    -0.038914933845027193f,
-  0.999235046864595850f, -0.039106535483329888f, 0.999227529910869610f,
-    -0.039298135683797059f,
-  0.999219976218403530f, -0.039489734439384118f, 0.999212385787475290f,
-    -0.039681331743046527f,
-  0.999204758618363890f, -0.039872927587739811f, 0.999197094711349880f,
-    -0.040064521966419520f,
-  0.999189394066714920f, -0.040256114872041282f, 0.999181656684742350f,
-    -0.040447706297560782f,
-  0.999173882565716380f, -0.040639296235933736f, 0.999166071709923000f,
-    -0.040830884680115948f,
-  0.999158224117649430f, -0.041022471623063238f, 0.999150339789184110f,
-    -0.041214057057731519f,
-  0.999142418724816910f, -0.041405640977076739f, 0.999134460924839150f,
-    -0.041597223374054894f,
-  0.999126466389543390f, -0.041788804241622061f, 0.999118435119223490f,
-    -0.041980383572734356f,
-  0.999110367114174890f, -0.042171961360347947f, 0.999102262374694130f,
-    -0.042363537597419072f,
-  0.999094120901079070f, -0.042555112276904020f, 0.999085942693629270f,
-    -0.042746685391759132f,
-  0.999077727752645360f, -0.042938256934940820f, 0.999069476078429330f,
-    -0.043129826899405546f,
-  0.999061187671284600f, -0.043321395278109825f, 0.999052862531515930f,
-    -0.043512962064010237f,
-  0.999044500659429290f, -0.043704527250063421f, 0.999036102055332330f,
-    -0.043896090829226068f,
-  0.999027666719533690f, -0.044087652794454944f, 0.999019194652343460f,
-    -0.044279213138706849f,
-  0.999010685854073380f, -0.044470771854938668f, 0.999002140325035980f,
-    -0.044662328936107325f,
-  0.998993558065545680f, -0.044853884375169815f, 0.998984939075918010f,
-    -0.045045438165083197f,
-  0.998976283356469820f, -0.045236990298804590f, 0.998967590907519300f,
-    -0.045428540769291155f,
-  0.998958861729386080f, -0.045620089569500144f, 0.998950095822391250f,
-    -0.045811636692388844f,
-  0.998941293186856870f, -0.046003182130914623f, 0.998932453823106690f,
-    -0.046194725878034908f,
-  0.998923577731465780f, -0.046386267926707157f, 0.998914664912260440f,
-    -0.046577808269888943f,
-  0.998905715365818290f, -0.046769346900537863f, 0.998896729092468410f,
-    -0.046960883811611592f,
-  0.998887706092541290f, -0.047152418996067869f, 0.998878646366368690f,
-    -0.047343952446864478f,
-  0.998869549914283560f, -0.047535484156959303f, 0.998860416736620520f,
-    -0.047727014119310254f,
-  0.998851246833715180f, -0.047918542326875327f, 0.998842040205904840f,
-    -0.048110068772612591f,
-  0.998832796853527990f, -0.048301593449480144f, 0.998823516776924490f,
-    -0.048493116350436176f,
-  0.998814199976435390f, -0.048684637468438943f, 0.998804846452403420f,
-    -0.048876156796446760f,
-  0.998795456205172410f, -0.049067674327418015f, 0.998786029235087640f,
-    -0.049259190054311140f,
-  0.998776565542495610f, -0.049450703970084664f, 0.998767065127744380f,
-    -0.049642216067697156f,
-  0.998757527991183340f, -0.049833726340107277f, 0.998747954133162860f,
-    -0.050025234780273729f,
-  0.998738343554035230f, -0.050216741381155311f, 0.998728696254153720f,
-    -0.050408246135710856f,
-  0.998719012233872940f, -0.050599749036899282f, 0.998709291493549030f,
-    -0.050791250077679581f,
-  0.998699534033539280f, -0.050982749251010803f, 0.998689739854202620f,
-    -0.051174246549852080f,
-  0.998679908955899090f, -0.051365741967162593f, 0.998670041338990070f,
-    -0.051557235495901611f,
-  0.998660137003838490f, -0.051748727129028456f, 0.998650195950808280f,
-    -0.051940216859502536f,
-  0.998640218180265270f, -0.052131704680283324f, 0.998630203692576050f,
-    -0.052323190584330347f,
-  0.998620152488108870f, -0.052514674564603223f, 0.998610064567233340f,
-    -0.052706156614061632f,
-  0.998599939930320370f, -0.052897636725665324f, 0.998589778577742230f,
-    -0.053089114892374133f,
-  0.998579580509872500f, -0.053280591107147945f, 0.998569345727086110f,
-    -0.053472065362946727f,
-  0.998559074229759310f, -0.053663537652730520f, 0.998548766018269920f,
-    -0.053855007969459440f,
-  0.998538421092996730f, -0.054046476306093660f, 0.998528039454320230f,
-    -0.054237942655593452f,
-  0.998517621102622210f, -0.054429407010919133f, 0.998507166038285490f,
-    -0.054620869365031105f,
-  0.998496674261694640f, -0.054812329710889854f, 0.998486145773235360f,
-    -0.055003788041455920f,
-  0.998475580573294770f, -0.055195244349689934f, 0.998464978662261250f,
-    -0.055386698628552597f,
-  0.998454340040524800f, -0.055578150871004678f, 0.998443664708476340f,
-    -0.055769601070007030f,
-  0.998432952666508440f, -0.055961049218520569f, 0.998422203915015020f,
-    -0.056152495309506292f,
-  0.998411418454391300f, -0.056343939335925290f, 0.998400596285033640f,
-    -0.056535381290738700f,
-  0.998389737407340160f, -0.056726821166907748f, 0.998378841821709990f,
-    -0.056918258957393740f,
-  0.998367909528543820f, -0.057109694655158062f, 0.998356940528243420f,
-    -0.057301128253162158f,
-  0.998345934821212370f, -0.057492559744367566f, 0.998334892407855000f,
-    -0.057683989121735904f,
-  0.998323813288577560f, -0.057875416378228857f, 0.998312697463787260f,
-    -0.058066841506808194f,
-  0.998301544933892890f, -0.058258264500435752f, 0.998290355699304350f,
-    -0.058449685352073476f,
-  0.998279129760433200f, -0.058641104054683341f, 0.998267867117692110f,
-    -0.058832520601227435f,
-  0.998256567771495180f, -0.059023934984667931f, 0.998245231722257880f,
-    -0.059215347197967061f,
-  0.998233858970396850f, -0.059406757234087150f, 0.998222449516330550f,
-    -0.059598165085990591f,
-  0.998211003360478190f, -0.059789570746639868f, 0.998199520503260660f,
-    -0.059980974208997548f,
-  0.998188000945100300f, -0.060172375466026259f, 0.998176444686420530f,
-    -0.060363774510688743f,
-  0.998164851727646240f, -0.060555171335947788f, 0.998153222069203760f,
-    -0.060746565934766288f,
-  0.998141555711520520f, -0.060937958300107203f, 0.998129852655025630f,
-    -0.061129348424933588f,
-  0.998118112900149180f, -0.061320736302208578f, 0.998106336447323050f,
-    -0.061512121924895378f,
-  0.998094523296980010f, -0.061703505285957298f, 0.998082673449554590f,
-    -0.061894886378357716f,
-  0.998070786905482340f, -0.062086265195060088f, 0.998058863665200250f,
-    -0.062277641729027972f,
-  0.998046903729146840f, -0.062469015973224996f, 0.998034907097761770f,
-    -0.062660387920614874f,
-  0.998022873771486240f, -0.062851757564161406f, 0.998010803750762450f,
-    -0.063043124896828492f,
-  0.997998697036034390f, -0.063234489911580066f, 0.997986553627747020f,
-    -0.063425852601380228f,
-  0.997974373526346990f, -0.063617212959193106f, 0.997962156732281950f,
-    -0.063808570977982898f,
-  0.997949903246001190f, -0.063999926650713940f, 0.997937613067955250f,
-    -0.064191279970350637f,
-  0.997925286198596000f, -0.064382630929857465f, 0.997912922638376610f,
-    -0.064573979522198982f,
-  0.997900522387751620f, -0.064765325740339885f, 0.997888085447177110f,
-    -0.064956669577244872f,
-  0.997875611817110150f, -0.065148011025878833f, 0.997863101498009500f,
-    -0.065339350079206632f,
-  0.997850554490335110f, -0.065530686730193327f, 0.997837970794548280f,
-    -0.065722020971803990f,
-  0.997825350411111640f, -0.065913352797003805f, 0.997812693340489280f,
-    -0.066104682198758077f,
-  0.997799999583146470f, -0.066296009170032130f, 0.997787269139549960f,
-    -0.066487333703791451f,
-  0.997774502010167820f, -0.066678655793001557f, 0.997761698195469560f,
-    -0.066869975430628115f,
-  0.997748857695925690f, -0.067061292609636822f, 0.997735980512008620f,
-    -0.067252607322993499f,
-  0.997723066644191640f, -0.067443919563664051f, 0.997710116092949570f,
-    -0.067635229324614479f,
-  0.997697128858758500f, -0.067826536598810869f, 0.997684104942096030f,
-    -0.068017841379219388f,
-  0.997671044343441000f, -0.068209143658806329f, 0.997657947063273710f,
-    -0.068400443430538013f,
-  0.997644813102075420f, -0.068591740687380942f, 0.997631642460329320f,
-    -0.068783035422301630f,
-  0.997618435138519550f, -0.068974327628266746f, 0.997605191137131640f,
-    -0.069165617298242985f,
-  0.997591910456652630f, -0.069356904425197208f, 0.997578593097570800f,
-    -0.069548189002096306f,
-  0.997565239060375750f, -0.069739471021907307f, 0.997551848345558430f,
-    -0.069930750477597309f,
-  0.997538420953611340f, -0.070122027362133521f, 0.997524956885027960f,
-    -0.070313301668483250f,
-  0.997511456140303450f, -0.070504573389613856f, 0.997497918719934210f,
-    -0.070695842518492855f,
-  0.997484344624417930f, -0.070887109048087801f, 0.997470733854253670f,
-    -0.071078372971366405f,
-  0.997457086409941910f, -0.071269634281296401f, 0.997443402291984360f,
-    -0.071460892970845680f,
-  0.997429681500884180f, -0.071652149032982212f, 0.997415924037145960f,
-    -0.071843402460674027f,
-  0.997402129901275300f, -0.072034653246889332f, 0.997388299093779460f,
-    -0.072225901384596322f,
-  0.997374431615167150f, -0.072417146866763413f, 0.997360527465947940f,
-    -0.072608389686358993f,
-  0.997346586646633230f, -0.072799629836351673f, 0.997332609157735470f,
-    -0.072990867309710036f,
-  0.997318594999768600f, -0.073182102099402888f, 0.997304544173247990f,
-    -0.073373334198399032f,
-  0.997290456678690210f, -0.073564563599667426f, 0.997276332516613180f,
-    -0.073755790296177098f,
-  0.997262171687536170f, -0.073947014280897200f, 0.997247974191979860f,
-    -0.074138235546796979f,
-  0.997233740030466280f, -0.074329454086845756f, 0.997219469203518670f,
-    -0.074520669894013000f,
-  0.997205161711661850f, -0.074711882961268211f, 0.997190817555421940f,
-    -0.074903093281581082f,
-  0.997176436735326190f, -0.075094300847921305f, 0.997162019251903290f,
-    -0.075285505653258769f,
-  0.997147565105683480f, -0.075476707690563388f, 0.997133074297198110f,
-    -0.075667906952805231f,
-  0.997118546826979980f, -0.075859103432954447f, 0.997103982695563330f,
-    -0.076050297123981259f,
-  0.997089381903483400f, -0.076241488018856066f, 0.997074744451277310f,
-    -0.076432676110549283f,
-  0.997060070339482960f, -0.076623861392031492f, 0.997045359568640040f,
-    -0.076815043856273343f,
-  0.997030612139289450f, -0.077006223496245640f, 0.997015828051973310f,
-    -0.077197400304919200f,
-  0.997001007307235290f, -0.077388574275265049f, 0.996986149905620180f,
-    -0.077579745400254224f,
-  0.996971255847674320f, -0.077770913672857947f, 0.996956325133945280f,
-    -0.077962079086047492f,
-  0.996941357764982160f, -0.078153241632794232f, 0.996926353741335090f,
-    -0.078344401306069705f,
-  0.996911313063555740f, -0.078535558098845479f, 0.996896235732197210f,
-    -0.078726712004093299f,
-  0.996881121747813850f, -0.078917863014784942f, 0.996865971110961310f,
-    -0.079109011123892375f,
-  0.996850783822196610f, -0.079300156324387597f, 0.996835559882078170f,
-    -0.079491298609242769f,
-  0.996820299291165670f, -0.079682437971430126f, 0.996805002050020430f,
-    -0.079873574403921996f,
-  0.996789668159204560f, -0.080064707899690890f, 0.996774297619282050f,
-    -0.080255838451709319f,
-  0.996758890430818000f, -0.080446966052950014f, 0.996743446594378860f,
-    -0.080638090696385709f,
-  0.996727966110532490f, -0.080829212374989329f, 0.996712448979848010f,
-    -0.081020331081733857f,
-  0.996696895202896060f, -0.081211446809592441f, 0.996681304780248300f,
-    -0.081402559551538245f,
-  0.996665677712478160f, -0.081593669300544652f, 0.996650014000160070f,
-    -0.081784776049585076f,
-  0.996634313643869900f, -0.081975879791633066f, 0.996618576644185070f,
-    -0.082166980519662314f,
-  0.996602803001684130f, -0.082358078226646536f, 0.996586992716946950f,
-    -0.082549172905559673f,
-  0.996571145790554840f, -0.082740264549375692f, 0.996555262223090540f,
-    -0.082931353151068699f,
-  0.996539342015137940f, -0.083122438703612911f, 0.996523385167282450f,
-    -0.083313521199982685f,
-  0.996507391680110820f, -0.083504600633152432f, 0.996491361554210920f,
-    -0.083695676996096716f,
-  0.996475294790172160f, -0.083886750281790226f, 0.996459191388585410f,
-    -0.084077820483207694f,
-  0.996443051350042630f, -0.084268887593324071f, 0.996426874675137240f,
-    -0.084459951605114325f,
-  0.996410661364464100f, -0.084651012511553617f, 0.996394411418619290f,
-    -0.084842070305617134f,
-  0.996378124838200210f, -0.085033124980280275f, 0.996361801623805720f,
-    -0.085224176528518478f,
-  0.996345441776035900f, -0.085415224943307333f, 0.996329045295492380f,
-    -0.085606270217622529f,
-  0.996312612182778000f, -0.085797312344439894f, 0.996296142438496850f,
-    -0.085988351316735337f,
-  0.996279636063254650f, -0.086179387127484894f, 0.996263093057658140f,
-    -0.086370419769664752f,
-  0.996246513422315520f, -0.086561449236251170f, 0.996229897157836500f,
-    -0.086752475520220543f,
-  0.996213244264832040f, -0.086943498614549378f, 0.996196554743914220f,
-    -0.087134518512214307f,
-  0.996179828595696980f, -0.087325535206192059f, 0.996163065820794950f,
-    -0.087516548689459531f,
-  0.996146266419824620f, -0.087707558954993659f, 0.996129430393403740f,
-    -0.087898565995771588f,
-  0.996112557742151130f, -0.088089569804770507f, 0.996095648466687300f,
-    -0.088280570374967740f,
-  0.996078702567633980f, -0.088471567699340767f, 0.996061720045614000f,
-    -0.088662561770867149f,
-  0.996044700901251970f, -0.088853552582524600f, 0.996027645135173610f,
-    -0.089044540127290892f,
-  0.996010552748005870f, -0.089235524398144014f, 0.995993423740377360f,
-    -0.089426505388061961f,
-  0.995976258112917790f, -0.089617483090022959f, 0.995959055866258320f,
-    -0.089808457497005278f,
-  0.995941817001031350f, -0.089999428601987341f, 0.995924541517870800f,
-    -0.090190396397947695f,
-  0.995907229417411720f, -0.090381360877864983f, 0.995889880700290720f,
-    -0.090572322034717989f,
-  0.995872495367145730f, -0.090763279861485621f, 0.995855073418615790f,
-    -0.090954234351146926f,
-  0.995837614855341610f, -0.091145185496681005f, 0.995820119677964910f,
-    -0.091336133291067184f,
-  0.995802587887129160f, -0.091527077727284828f, 0.995785019483478750f,
-    -0.091718018798313455f,
-  0.995767414467659820f, -0.091908956497132724f, 0.995749772840319510f,
-    -0.092099890816722388f,
-  0.995732094602106430f, -0.092290821750062355f, 0.995714379753670610f,
-    -0.092481749290132600f,
-  0.995696628295663520f, -0.092672673429913310f, 0.995678840228737540f,
-    -0.092863594162384724f,
-  0.995661015553546910f, -0.093054511480527249f, 0.995643154270746900f,
-    -0.093245425377321375f,
-  0.995625256380994310f, -0.093436335845747787f, 0.995607321884947050f,
-    -0.093627242878787195f,
-  0.995589350783264600f, -0.093818146469420549f, 0.995571343076607770f,
-    -0.094009046610628838f,
-  0.995553298765638470f, -0.094199943295393204f, 0.995535217851020390f,
-    -0.094390836516694943f,
-  0.995517100333418110f, -0.094581726267515445f, 0.995498946213497770f,
-    -0.094772612540836243f,
-  0.995480755491926940f, -0.094963495329638992f, 0.995462528169374420f,
-    -0.095154374626905486f,
-  0.995444264246510340f, -0.095345250425617617f, 0.995425963724006160f,
-    -0.095536122718757471f,
-  0.995407626602534900f, -0.095726991499307162f, 0.995389252882770690f,
-    -0.095917856760249040f,
-  0.995370842565388990f, -0.096108718494565509f, 0.995352395651066810f,
-    -0.096299576695239128f,
-  0.995333912140482280f, -0.096490431355252593f, 0.995315392034315070f,
-    -0.096681282467588725f,
-  0.995296835333246090f, -0.096872130025230471f, 0.995278242037957670f,
-    -0.097062974021160917f,
-  0.995259612149133390f, -0.097253814448363271f, 0.995240945667458130f,
-    -0.097444651299820870f,
-  0.995222242593618360f, -0.097635484568517200f, 0.995203502928301510f,
-    -0.097826314247435861f,
-  0.995184726672196930f, -0.098017140329560604f, 0.995165913825994620f,
-    -0.098207962807875276f,
-  0.995147064390386470f, -0.098398781675363881f, 0.995128178366065490f,
-    -0.098589596925010584f,
-  0.995109255753726110f, -0.098780408549799623f, 0.995090296554064000f,
-    -0.098971216542715429f,
-  0.995071300767776170f, -0.099162020896742503f, 0.995052268395561050f,
-    -0.099352821604865540f,
-  0.995033199438118630f, -0.099543618660069319f, 0.995014093896149700f,
-    -0.099734412055338825f,
-  0.994994951770357020f, -0.099925201783659073f, 0.994975773061444140f,
-    -0.100115987838015310f,
-  0.994956557770116380f, -0.100306770211392860f, 0.994937305897080070f,
-    -0.100497548896777200f,
-  0.994918017443043200f, -0.100688323887153960f, 0.994898692408714870f,
-    -0.100879095175508860f,
-  0.994879330794805620f, -0.101069862754827820f, 0.994859932602027320f,
-    -0.101260626618096830f,
-  0.994840497831093180f, -0.101451386758302080f, 0.994821026482717860f,
-    -0.101642143168429830f,
-  0.994801518557617110f, -0.101832895841466530f, 0.994781974056508260f,
-    -0.102023644770398740f,
-  0.994762392980109930f, -0.102214389948213210f, 0.994742775329142010f,
-    -0.102405131367896720f,
-  0.994723121104325700f, -0.102595869022436280f, 0.994703430306383860f,
-    -0.102786602904819040f,
-  0.994683702936040250f, -0.102977333008032220f, 0.994663938994020390f,
-    -0.103168059325063230f,
-  0.994644138481050710f, -0.103358781848899610f, 0.994624301397859400f,
-    -0.103549500572529070f,
-  0.994604427745175660f, -0.103740215488939370f, 0.994584517523730340f,
-    -0.103930926591118510f,
-  0.994564570734255420f, -0.104121633872054590f, 0.994544587377484300f,
-    -0.104312337324735800f,
-  0.994524567454151740f, -0.104503036942150570f, 0.994504510964993700f,
-    -0.104693732717287390f,
-  0.994484417910747600f, -0.104884424643134970f, 0.994464288292152390f,
-    -0.105075112712682040f,
-  0.994444122109948040f, -0.105265796918917600f, 0.994423919364875950f,
-    -0.105456477254830710f,
-  0.994403680057679100f, -0.105647153713410620f, 0.994383404189101430f,
-    -0.105837826287646670f,
-  0.994363091759888570f, -0.106028494970528410f, 0.994342742770787270f,
-    -0.106219159755045480f,
-  0.994322357222545810f, -0.106409820634187680f, 0.994301935115913580f,
-    -0.106600477600944960f,
-  0.994281476451641550f, -0.106791130648307390f, 0.994260981230481790f,
-    -0.106981779769265230f,
-  0.994240449453187900f, -0.107172424956808840f, 0.994219881120514960f,
-    -0.107363066203928760f,
-  0.994199276233218910f, -0.107553703503615620f, 0.994178634792057590f,
-    -0.107744336848860280f,
-  0.994157956797789730f, -0.107934966232653650f, 0.994137242251175720f,
-    -0.108125591647986870f,
-  0.994116491152977070f, -0.108316213087851170f, 0.994095703503956930f,
-    -0.108506830545237920f,
-  0.994074879304879370f, -0.108697444013138720f, 0.994054018556510210f,
-    -0.108888053484545190f,
-  0.994033121259616400f, -0.109078658952449240f, 0.994012187414966220f,
-    -0.109269260409842780f,
-  0.993991217023329380f, -0.109459857849717980f, 0.993970210085476920f,
-    -0.109650451265067100f,
-  0.993949166602181130f, -0.109841040648882600f, 0.993928086574215830f,
-    -0.110031625994157000f,
-  0.993906970002356060f, -0.110222207293883060f, 0.993885816887378090f,
-    -0.110412784541053630f,
-  0.993864627230059750f, -0.110603357728661730f, 0.993843401031180180f,
-    -0.110793926849700560f,
-  0.993822138291519660f, -0.110984491897163390f, 0.993800839011860120f,
-    -0.111175052864043720f,
-  0.993779503192984580f, -0.111365609743335160f, 0.993758130835677430f,
-    -0.111556162528031480f,
-  0.993736721940724600f, -0.111746711211126590f, 0.993715276508913230f,
-    -0.111937255785614570f,
-  0.993693794541031790f, -0.112127796244489640f, 0.993672276037870010f,
-    -0.112318332580746170f,
-  0.993650721000219120f, -0.112508864787378690f, 0.993629129428871720f,
-    -0.112699392857381860f,
-  0.993607501324621610f, -0.112889916783750520f, 0.993585836688263950f,
-    -0.113080436559479620f,
-  0.993564135520595300f, -0.113270952177564350f, 0.993542397822413600f,
-    -0.113461463630999950f,
-  0.993520623594518090f, -0.113651970912781870f, 0.993498812837709360f,
-    -0.113842474015905710f,
-  0.993476965552789190f, -0.114032972933367200f, 0.993455081740560960f,
-    -0.114223467658162260f,
-  0.993433161401829360f, -0.114413958183286920f, 0.993411204537400060f,
-    -0.114604444501737420f,
-  0.993389211148080650f, -0.114794926606510080f, 0.993367181234679600f,
-    -0.114985404490601460f,
-  0.993345114798006910f, -0.115175878147008190f, 0.993323011838873950f,
-    -0.115366347568727140f,
-  0.993300872358093280f, -0.115556812748755260f, 0.993278696356479030f,
-    -0.115747273680089720f,
-  0.993256483834846440f, -0.115937730355727780f, 0.993234234794012290f,
-    -0.116128182768666930f,
-  0.993211949234794500f, -0.116318630911904750f, 0.993189627158012620f,
-    -0.116509074778439040f,
-  0.993167268564487230f, -0.116699514361267690f, 0.993144873455040430f,
-    -0.116889949653388780f,
-  0.993122441830495580f, -0.117080380647800590f, 0.993099973691677570f,
-    -0.117270807337501460f,
-  0.993077469039412300f, -0.117461229715489990f, 0.993054927874527320f,
-    -0.117651647774764860f,
-  0.993032350197851410f, -0.117842061508324980f, 0.993009736010214580f,
-    -0.118032470909169340f,
-  0.992987085312448390f, -0.118222875970297170f, 0.992964398105385610f,
-    -0.118413276684707790f,
-  0.992941674389860470f, -0.118603673045400720f, 0.992918914166708300f,
-    -0.118794065045375640f,
-  0.992896117436765980f, -0.118984452677632340f, 0.992873284200871730f,
-    -0.119174835935170880f,
-  0.992850414459865100f, -0.119365214810991350f, 0.992827508214586760f,
-    -0.119555589298094110f,
-  0.992804565465879140f, -0.119745959389479600f, 0.992781586214585570f,
-    -0.119936325078148470f,
-  0.992758570461551140f, -0.120126686357101500f, 0.992735518207621850f,
-    -0.120317043219339680f,
-  0.992712429453645460f, -0.120507395657864130f, 0.992689304200470750f,
-    -0.120697743665676110f,
-  0.992666142448948020f, -0.120888087235777080f, 0.992642944199928820f,
-    -0.121078426361168640f,
-  0.992619709454266140f, -0.121268761034852600f, 0.992596438212814290f,
-    -0.121459091249830840f,
-  0.992573130476428810f, -0.121649416999105530f, 0.992549786245966680f,
-    -0.121839738275678890f,
-  0.992526405522286100f, -0.122030055072553360f, 0.992502988306246950f,
-    -0.122220367382731540f,
-  0.992479534598709970f, -0.122410675199216200f, 0.992456044400537700f,
-    -0.122600978515010240f,
-  0.992432517712593660f, -0.122791277323116770f, 0.992408954535742850f,
-    -0.122981571616539050f,
-  0.992385354870851670f, -0.123171861388280480f, 0.992361718718787870f,
-    -0.123362146631344680f,
-  0.992338046080420420f, -0.123552427338735370f, 0.992314336956619640f,
-    -0.123742703503456510f,
-  0.992290591348257370f, -0.123932975118512160f, 0.992266809256206580f,
-    -0.124123242176906600f,
-  0.992242990681341700f, -0.124313504671644230f, 0.992219135624538450f,
-    -0.124503762595729660f,
-  0.992195244086673920f, -0.124694015942167640f, 0.992171316068626520f,
-    -0.124884264703963130f,
-  0.992147351571276090f, -0.125074508874121170f, 0.992123350595503720f,
-    -0.125264748445647060f,
-  0.992099313142191800f, -0.125454983411546230f, 0.992075239212224070f,
-    -0.125645213764824290f,
-  0.992051128806485720f, -0.125835439498487000f, 0.992026981925863360f,
-    -0.126025660605540320f,
-  0.992002798571244520f, -0.126215877078990350f, 0.991978578743518580f,
-    -0.126406088911843380f,
-  0.991954322443575950f, -0.126596296097105850f, 0.991930029672308480f,
-    -0.126786498627784410f,
-  0.991905700430609330f, -0.126976696496885870f, 0.991881334719373010f,
-    -0.127166889697417160f,
-  0.991856932539495470f, -0.127357078222385400f, 0.991832493891873780f,
-    -0.127547262064797970f,
-  0.991808018777406430f, -0.127737441217662310f, 0.991783507196993490f,
-    -0.127927615673986080f,
-  0.991758959151536110f, -0.128117785426777130f, 0.991734374641936810f,
-    -0.128307950469043420f,
-  0.991709753669099530f, -0.128498110793793170f, 0.991685096233929420f,
-    -0.128688266394034690f,
-  0.991660402337333210f, -0.128878417262776550f, 0.991635671980218740f,
-    -0.129068563393027410f,
-  0.991610905163495370f, -0.129258704777796140f, 0.991586101888073500f,
-    -0.129448841410091780f,
-  0.991561262154865290f, -0.129638973282923560f, 0.991536385964783880f,
-    -0.129829100389300930f,
-  0.991511473318743900f, -0.130019222722233350f, 0.991486524217661480f,
-    -0.130209340274730630f,
-  0.991461538662453790f, -0.130399453039802690f, 0.991436516654039420f,
-    -0.130589561010459650f,
-  0.991411458193338540f, -0.130779664179711710f, 0.991386363281272280f,
-    -0.130969762540569380f,
-  0.991361231918763460f, -0.131159856086043270f, 0.991336064106736140f,
-    -0.131349944809144190f,
-  0.991310859846115440f, -0.131540028702883120f, 0.991285619137828200f,
-    -0.131730107760271160f,
-  0.991260341982802440f, -0.131920181974319790f, 0.991235028381967420f,
-    -0.132110251338040360f,
-  0.991209678336254060f, -0.132300315844444650f, 0.991184291846594180f,
-    -0.132490375486544550f,
-  0.991158868913921350f, -0.132680430257352070f, 0.991133409539170170f,
-    -0.132870480149879430f,
-  0.991107913723276890f, -0.133060525157139060f, 0.991082381467178640f,
-    -0.133250565272143570f,
-  0.991056812771814340f, -0.133440600487905680f, 0.991031207638124130f,
-    -0.133630630797438340f,
-  0.991005566067049370f, -0.133820656193754720f, 0.990979888059532740f,
-    -0.134010676669868130f,
-  0.990954173616518500f, -0.134200692218792020f, 0.990928422738951990f,
-    -0.134390702833540070f,
-  0.990902635427780010f, -0.134580708507126170f, 0.990876811683950700f,
-    -0.134770709232564350f,
-  0.990850951508413620f, -0.134960705002868750f, 0.990825054902119470f,
-    -0.135150695811053850f,
-  0.990799121866020370f, -0.135340681650134210f, 0.990773152401069780f,
-    -0.135530662513124590f,
-  0.990747146508222710f, -0.135720638393039910f, 0.990721104188435180f,
-    -0.135910609282895330f,
-  0.990695025442664630f, -0.136100575175706200f, 0.990668910271870100f,
-    -0.136290536064487960f,
-  0.990642758677011570f, -0.136480491942256280f, 0.990616570659050620f,
-    -0.136670442802027090f,
-  0.990590346218950150f, -0.136860388636816380f, 0.990564085357674370f,
-    -0.137050329439640410f,
-  0.990537788076188750f, -0.137240265203515590f, 0.990511454375460290f,
-    -0.137430195921458550f,
-  0.990485084256457090f, -0.137620121586486040f, 0.990458677720148620f,
-    -0.137810042191615080f,
-  0.990432234767505970f, -0.137999957729862790f, 0.990405755399501260f,
-    -0.138189868194246560f,
-  0.990379239617108160f, -0.138379773577783890f, 0.990352687421301450f,
-    -0.138569673873492500f,
-  0.990326098813057330f, -0.138759569074390350f, 0.990299473793353590f,
-    -0.138949459173495490f,
-  0.990272812363169110f, -0.139139344163826200f, 0.990246114523483990f,
-    -0.139329224038400980f,
-  0.990219380275280000f, -0.139519098790238490f, 0.990192609619540030f,
-    -0.139708968412357550f,
-  0.990165802557248400f, -0.139898832897777210f, 0.990138959089390650f,
-    -0.140088692239516670f,
-  0.990112079216953770f, -0.140278546430595420f, 0.990085162940925970f,
-    -0.140468395464033000f,
-  0.990058210262297120f, -0.140658239332849210f, 0.990031221182058000f,
-    -0.140848078030064080f,
-  0.990004195701200910f, -0.141037911548697710f, 0.989977133820719610f,
-    -0.141227739881770510f,
-  0.989950035541608990f, -0.141417563022303020f, 0.989922900864865450f,
-    -0.141607380963316020f,
-  0.989895729791486660f, -0.141797193697830390f, 0.989868522322471580f,
-    -0.141987001218867290f,
-  0.989841278458820530f, -0.142176803519448030f, 0.989813998201535260f,
-    -0.142366600592594180f,
-  0.989786681551618640f, -0.142556392431327340f, 0.989759328510075200f,
-    -0.142746179028669460f,
-  0.989731939077910570f, -0.142935960377642670f, 0.989704513256131850f,
-    -0.143125736471269190f,
-  0.989677051045747210f, -0.143315507302571500f, 0.989649552447766530f,
-    -0.143505272864572290f,
-  0.989622017463200890f, -0.143695033150294470f, 0.989594446093062460f,
-    -0.143884788152760980f,
-  0.989566838338365120f, -0.144074537864995160f, 0.989539194200123930f,
-    -0.144264282280020440f,
-  0.989511513679355190f, -0.144454021390860470f, 0.989483796777076760f,
-    -0.144643755190539040f,
-  0.989456043494307710f, -0.144833483672080210f, 0.989428253832068230f,
-    -0.145023206828508220f,
-  0.989400427791380380f, -0.145212924652847460f, 0.989372565373267010f,
-    -0.145402637138122570f,
-  0.989344666578752640f, -0.145592344277358340f, 0.989316731408863000f,
-    -0.145782046063579860f,
-  0.989288759864625170f, -0.145971742489812210f, 0.989260751947067640f,
-    -0.146161433549080900f,
-  0.989232707657220050f, -0.146351119234411460f, 0.989204626996113780f,
-    -0.146540799538829760f,
-  0.989176509964781010f, -0.146730474455361750f, 0.989148356564255590f,
-    -0.146920143977033620f,
-  0.989120166795572690f, -0.147109808096871820f, 0.989091940659768800f,
-    -0.147299466807902850f,
-  0.989063678157881540f, -0.147489120103153570f, 0.989035379290950310f,
-    -0.147678767975650970f,
-  0.989007044060015270f, -0.147868410418422220f, 0.988978672466118480f,
-    -0.148058047424494720f,
-  0.988950264510302990f, -0.148247678986896030f, 0.988921820193613190f,
-    -0.148437305098653970f,
-  0.988893339517095130f, -0.148626925752796540f, 0.988864822481795640f,
-    -0.148816540942351920f,
-  0.988836269088763540f, -0.149006150660348450f, 0.988807679339048450f,
-    -0.149195754899814820f,
-  0.988779053233701520f, -0.149385353653779720f, 0.988750390773775360f,
-    -0.149574946915272230f,
-  0.988721691960323780f, -0.149764534677321510f, 0.988692956794401940f,
-    -0.149954116932956960f,
-  0.988664185277066230f, -0.150143693675208190f, 0.988635377409374790f,
-    -0.150333264897105000f,
-  0.988606533192386450f, -0.150522830591677400f, 0.988577652627162020f,
-    -0.150712390751955610f,
-  0.988548735714763200f, -0.150901945370970040f, 0.988519782456253270f,
-    -0.151091494441751300f,
-  0.988490792852696590f, -0.151281037957330220f, 0.988461766905159300f,
-    -0.151470575910737810f,
-  0.988432704614708340f, -0.151660108295005310f, 0.988403605982412390f,
-    -0.151849635103164180f,
-  0.988374471009341280f, -0.152039156328246050f, 0.988345299696566150f,
-    -0.152228671963282740f,
-  0.988316092045159690f, -0.152418182001306330f, 0.988286848056195820f,
-    -0.152607686435349050f,
-  0.988257567730749460f, -0.152797185258443440f, 0.988228251069897420f,
-    -0.152986678463622040f,
-  0.988198898074717610f, -0.153176166043917840f, 0.988169508746289060f,
-    -0.153365647992363880f,
-  0.988140083085692570f, -0.153555124301993450f, 0.988110621094009820f,
-    -0.153744594965840030f,
-  0.988081122772324070f, -0.153934059976937350f, 0.988051588121720110f,
-    -0.154123519328319360f,
-  0.988022017143283530f, -0.154312973013020100f, 0.987992409838101880f,
-    -0.154502421024073940f,
-  0.987962766207263420f, -0.154691863354515430f, 0.987933086251858380f,
-    -0.154881299997379320f,
-  0.987903369972977790f, -0.155070730945700510f, 0.987873617371714200f,
-    -0.155260156192514240f,
-  0.987843828449161740f, -0.155449575730855850f, 0.987814003206415550f,
-    -0.155638989553760900f,
-  0.987784141644572180f, -0.155828397654265230f, 0.987754243764729530f,
-    -0.156017800025404800f,
-  0.987724309567986960f, -0.156207196660215900f, 0.987694339055445130f,
-    -0.156396587551734880f,
-  0.987664332228205710f, -0.156585972692998430f, 0.987634289087372160f,
-    -0.156775352077043350f,
-  0.987604209634049160f, -0.156964725696906780f, 0.987574093869342360f,
-    -0.157154093545625900f,
-  0.987543941794359230f, -0.157343455616238250f, 0.987513753410208420f,
-    -0.157532811901781530f,
-  0.987483528717999710f, -0.157722162395293630f, 0.987453267718844560f,
-    -0.157911507089812660f,
-  0.987422970413855410f, -0.158100845978376980f, 0.987392636804146240f,
-    -0.158290179054025180f,
-  0.987362266890832400f, -0.158479506309795960f, 0.987331860675030430f,
-    -0.158668827738728310f,
-  0.987301418157858430f, -0.158858143333861450f, 0.987270939340435420f,
-    -0.159047453088234760f,
-  0.987240424223882250f, -0.159236756994887850f, 0.987209872809320820f,
-    -0.159426055046860580f,
-  0.987179285097874340f, -0.159615347237193060f, 0.987148661090667570f,
-    -0.159804633558925440f,
-  0.987118000788826280f, -0.159993914005098270f, 0.987087304193477900f,
-    -0.160183188568752220f,
-  0.987056571305750970f, -0.160372457242928280f, 0.987025802126775600f,
-    -0.160561720020667490f,
-  0.986994996657682980f, -0.160750976895011220f, 0.986964154899605650f,
-    -0.160940227859001080f,
-  0.986933276853677710f, -0.161129472905678810f, 0.986902362521034470f,
-    -0.161318712028086400f,
-  0.986871411902812470f, -0.161507945219266120f, 0.986840425000149680f,
-    -0.161697172472260400f,
-  0.986809401814185530f, -0.161886393780111830f, 0.986778342346060430f,
-    -0.162075609135863330f,
-  0.986747246596916590f, -0.162264818532558000f, 0.986716114567897100f,
-    -0.162454021963239190f,
-  0.986684946260146690f, -0.162643219420950310f, 0.986653741674811350f,
-    -0.162832410898735210f,
-  0.986622500813038480f, -0.163021596389637840f, 0.986591223675976400f,
-    -0.163210775886702380f,
-  0.986559910264775410f, -0.163399949382973230f, 0.986528560580586690f,
-    -0.163589116871495020f,
-  0.986497174624562880f, -0.163778278345312670f, 0.986465752397857940f,
-    -0.163967433797471170f,
-  0.986434293901627180f, -0.164156583221015810f, 0.986402799137027220f,
-    -0.164345726608992190f,
-  0.986371268105216030f, -0.164534863954446000f, 0.986339700807353000f,
-    -0.164723995250423170f,
-  0.986308097244598670f, -0.164913120489969890f, 0.986276457418115090f,
-    -0.165102239666132660f,
-  0.986244781329065460f, -0.165291352771958000f, 0.986213068978614490f,
-    -0.165480459800492780f,
-  0.986181320367928270f, -0.165669560744784120f, 0.986149535498173860f,
-    -0.165858655597879300f,
-  0.986117714370520090f, -0.166047744352825790f, 0.986085856986136820f,
-    -0.166236827002671420f,
-  0.986053963346195440f, -0.166425903540464100f, 0.986022033451868560f,
-    -0.166614973959252090f,
-  0.985990067304330140f, -0.166804038252083730f, 0.985958064904755460f,
-    -0.166993096412007710f,
-  0.985926026254321130f, -0.167182148432072940f, 0.985893951354205210f,
-    -0.167371194305328430f,
-  0.985861840205586980f, -0.167560234024823560f, 0.985829692809647050f,
-    -0.167749267583607890f,
-  0.985797509167567480f, -0.167938294974731170f, 0.985765289280531310f,
-    -0.168127316191243410f,
-  0.985733033149723490f, -0.168316331226194830f, 0.985700740776329850f,
-    -0.168505340072635900f,
-  0.985668412161537550f, -0.168694342723617330f, 0.985636047306535420f,
-    -0.168883339172189980f,
-  0.985603646212513400f, -0.169072329411405010f, 0.985571208880662740f,
-    -0.169261313434313830f,
-  0.985538735312176060f, -0.169450291233967960f, 0.985506225508247290f,
-    -0.169639262803419290f,
-  0.985473679470071810f, -0.169828228135719850f, 0.985441097198846210f,
-    -0.170017187223921950f,
-  0.985408478695768420f, -0.170206140061078070f, 0.985375823962037710f,
-    -0.170395086640240940f,
-  0.985343132998854790f, -0.170584026954463590f, 0.985310405807421570f,
-    -0.170772960996799230f,
-  0.985277642388941220f, -0.170961888760301220f, 0.985244842744618540f,
-    -0.171150810238023280f,
-  0.985212006875659350f, -0.171339725423019310f, 0.985179134783271130f,
-    -0.171528634308343420f,
-  0.985146226468662230f, -0.171717536887049970f, 0.985113281933042710f,
-    -0.171906433152193530f,
-  0.985080301177623800f, -0.172095323096829010f, 0.985047284203618200f,
-    -0.172284206714011370f,
-  0.985014231012239840f, -0.172473083996795950f, 0.984981141604703960f,
-    -0.172661954938238270f,
-  0.984948015982227030f, -0.172850819531394080f, 0.984914854146027200f,
-    -0.173039677769319360f,
-  0.984881656097323700f, -0.173228529645070320f, 0.984848421837337010f,
-    -0.173417375151703470f,
-  0.984815151367289140f, -0.173606214282275410f, 0.984781844688403350f,
-    -0.173795047029843160f,
-  0.984748501801904210f, -0.173983873387463820f, 0.984715122709017620f,
-    -0.174172693348194820f,
-  0.984681707410970940f, -0.174361506905093750f, 0.984648255908992630f,
-    -0.174550314051218510f,
-  0.984614768204312600f, -0.174739114779627200f, 0.984581244298162180f,
-    -0.174927909083378160f,
-  0.984547684191773960f, -0.175116696955529920f, 0.984514087886381840f,
-    -0.175305478389141320f,
-  0.984480455383220930f, -0.175494253377271430f, 0.984446786683527920f,
-    -0.175683021912979490f,
-  0.984413081788540700f, -0.175871783989325040f, 0.984379340699498510f,
-    -0.176060539599367820f,
-  0.984345563417641900f, -0.176249288736167880f, 0.984311749944212780f,
-    -0.176438031392785410f,
-  0.984277900280454370f, -0.176626767562280880f, 0.984244014427611110f,
-    -0.176815497237715000f,
-  0.984210092386929030f, -0.177004220412148750f, 0.984176134159655320f,
-    -0.177192937078643280f,
-  0.984142139747038570f, -0.177381647230260040f, 0.984108109150328540f,
-    -0.177570350860060710f,
-  0.984074042370776450f, -0.177759047961107170f, 0.984039939409634970f,
-    -0.177947738526461560f,
-  0.984005800268157870f, -0.178136422549186300f, 0.983971624947600270f,
-    -0.178325100022344000f,
-  0.983937413449218920f, -0.178513770938997510f, 0.983903165774271500f,
-    -0.178702435292209970f,
-  0.983868881924017220f, -0.178891093075044720f, 0.983834561899716630f,
-    -0.179079744280565390f,
-  0.983800205702631600f, -0.179268388901835750f, 0.983765813334025240f,
-    -0.179457026931919890f,
-  0.983731384795162090f, -0.179645658363882160f, 0.983696920087308140f,
-    -0.179834283190787090f,
-  0.983662419211730250f, -0.180022901405699510f, 0.983627882169697210f,
-    -0.180211513001684450f,
-  0.983593308962478650f, -0.180400117971807240f, 0.983558699591345900f,
-    -0.180588716309133340f,
-  0.983524054057571260f, -0.180777308006728590f, 0.983489372362428730f,
-    -0.180965893057658980f,
-  0.983454654507193270f, -0.181154471454990810f, 0.983419900493141540f,
-    -0.181343043191790540f,
-  0.983385110321551180f, -0.181531608261124970f, 0.983350283993701500f,
-    -0.181720166656061110f,
-  0.983315421510872810f, -0.181908718369666160f, 0.983280522874346970f,
-    -0.182097263395007650f,
-  0.983245588085407070f, -0.182285801725153300f, 0.983210617145337640f,
-    -0.182474333353171120f,
-  0.983175610055424420f, -0.182662858272129270f, 0.983140566816954500f,
-    -0.182851376475096330f,
-  0.983105487431216290f, -0.183039887955140950f, 0.983070371899499640f,
-    -0.183228392705332140f,
-  0.983035220223095640f, -0.183416890718739100f, 0.983000032403296590f,
-    -0.183605381988431270f,
-  0.982964808441396440f, -0.183793866507478450f, 0.982929548338690170f,
-    -0.183982344268950520f,
-  0.982894252096474070f, -0.184170815265917720f, 0.982858919716046110f,
-    -0.184359279491450510f,
-  0.982823551198705240f, -0.184547736938619620f, 0.982788146545751970f,
-    -0.184736187600495950f,
-  0.982752705758487830f, -0.184924631470150790f, 0.982717228838215990f,
-    -0.185113068540655540f,
-  0.982681715786240860f, -0.185301498805081900f, 0.982646166603868050f,
-    -0.185489922256501880f,
-  0.982610581292404750f, -0.185678338887987630f, 0.982574959853159240f,
-    -0.185866748692611660f,
-  0.982539302287441240f, -0.186055151663446630f, 0.982503608596561830f,
-    -0.186243547793565560f,
-  0.982467878781833170f, -0.186431937076041610f, 0.982432112844569110f,
-    -0.186620319503948280f,
-  0.982396310786084690f, -0.186808695070359270f, 0.982360472607696210f,
-    -0.186997063768348540f,
-  0.982324598310721280f, -0.187185425590990330f, 0.982288687896478830f,
-    -0.187373780531359110f,
-  0.982252741366289370f, -0.187562128582529600f, 0.982216758721474510f,
-    -0.187750469737576780f,
-  0.982180739963357090f, -0.187938803989575910f, 0.982144685093261580f,
-    -0.188127131331602420f,
-  0.982108594112513610f, -0.188315451756732120f, 0.982072467022440000f,
-    -0.188503765258040940f,
-  0.982036303824369020f, -0.188692071828605230f, 0.982000104519630490f,
-    -0.188880371461501380f,
-  0.981963869109555240f, -0.189068664149806190f, 0.981927597595475540f,
-    -0.189256949886596750f,
-  0.981891289978725100f, -0.189445228664950230f, 0.981854946260638630f,
-    -0.189633500477944190f,
-  0.981818566442552500f, -0.189821765318656410f, 0.981782150525804310f,
-    -0.190010023180164990f,
-  0.981745698511732990f, -0.190198274055548150f, 0.981709210401678800f,
-    -0.190386517937884470f,
-  0.981672686196983110f, -0.190574754820252740f, 0.981636125898989080f,
-    -0.190762984695732110f,
-  0.981599529509040720f, -0.190951207557401800f, 0.981562897028483650f,
-    -0.191139423398341450f,
-  0.981526228458664770f, -0.191327632211630900f, 0.981489523800932130f,
-    -0.191515833990350210f,
-  0.981452783056635520f, -0.191704028727579800f, 0.981416006227125550f,
-    -0.191892216416400220f,
-  0.981379193313754560f, -0.192080397049892440f, 0.981342344317876040f,
-    -0.192268570621137500f,
-  0.981305459240844670f, -0.192456737123216840f, 0.981268538084016710f,
-    -0.192644896549212100f,
-  0.981231580848749730f, -0.192833048892205230f, 0.981194587536402320f,
-    -0.193021194145278380f,
-  0.981157558148334830f, -0.193209332301513960f, 0.981120492685908730f,
-    -0.193397463353994740f,
-  0.981083391150486710f, -0.193585587295803610f, 0.981046253543432780f,
-    -0.193773704120023820f,
-  0.981009079866112630f, -0.193961813819738840f, 0.980971870119892840f,
-    -0.194149916388032450f,
-  0.980934624306141640f, -0.194338011817988600f, 0.980897342426228390f,
-    -0.194526100102691610f,
-  0.980860024481523870f, -0.194714181235225960f, 0.980822670473400100f,
-    -0.194902255208676520f,
-  0.980785280403230430f, -0.195090322016128250f, 0.980747854272389750f,
-    -0.195278381650666550f,
-  0.980710392082253970f, -0.195466434105376980f, 0.980672893834200530f,
-    -0.195654479373345370f,
-  0.980635359529608120f, -0.195842517447657850f, 0.980597789169856850f,
-    -0.196030548321400790f,
-  0.980560182756327840f, -0.196218571987660880f, 0.980522540290404090f,
-    -0.196406588439524970f,
-  0.980484861773469380f, -0.196594597670080220f, 0.980447147206909060f,
-    -0.196782599672414100f,
-  0.980409396592109910f, -0.196970594439614340f, 0.980371609930459800f,
-    -0.197158581964768880f,
-  0.980333787223347960f, -0.197346562240965920f, 0.980295928472165290f,
-    -0.197534535261294030f,
-  0.980258033678303550f, -0.197722501018841920f, 0.980220102843156080f,
-    -0.197910459506698670f,
-  0.980182135968117430f, -0.198098410717953560f, 0.980144133054583590f,
-    -0.198286354645696220f,
-  0.980106094103951770f, -0.198474291283016390f, 0.980068019117620650f,
-    -0.198662220623004200f,
-  0.980029908096990090f, -0.198850142658750090f, 0.979991761043461200f,
-    -0.199038057383344680f,
-  0.979953577958436740f, -0.199225964789878830f, 0.979915358843320480f,
-    -0.199413864871443770f,
-  0.979877103699517640f, -0.199601757621130970f, 0.979838812528434740f,
-    -0.199789643032032090f,
-  0.979800485331479790f, -0.199977521097239150f, 0.979762122110061750f,
-    -0.200165391809844440f,
-  0.979723722865591170f, -0.200353255162940450f, 0.979685287599479930f,
-    -0.200541111149619980f,
-  0.979646816313141210f, -0.200728959762976140f, 0.979608309007989450f,
-    -0.200916800996102230f,
-  0.979569765685440520f, -0.201104634842091900f, 0.979531186346911500f,
-    -0.201292461294039020f,
-  0.979492570993820810f, -0.201480280345037730f, 0.979453919627588210f,
-    -0.201668091988182530f,
-  0.979415232249634780f, -0.201855896216568050f, 0.979376508861383170f,
-    -0.202043693023289260f,
-  0.979337749464256780f, -0.202231482401441450f, 0.979298954059681040f,
-    -0.202419264344120160f,
-  0.979260122649082020f, -0.202607038844421130f, 0.979221255233887700f,
-    -0.202794805895440440f,
-  0.979182351815526930f, -0.202982565490274440f, 0.979143412395430230f,
-    -0.203170317622019790f,
-  0.979104436975029250f, -0.203358062283773320f, 0.979065425555756930f,
-    -0.203545799468632190f,
-  0.979026378139047580f, -0.203733529169693920f, 0.978987294726337050f,
-    -0.203921251380056120f,
-  0.978948175319062200f, -0.204108966092816870f, 0.978909019918661310f,
-    -0.204296673301074370f,
-  0.978869828526574120f, -0.204484372997927240f, 0.978830601144241470f,
-    -0.204672065176474210f,
-  0.978791337773105670f, -0.204859749829814420f, 0.978752038414610340f,
-    -0.205047426951047250f,
-  0.978712703070200420f, -0.205235096533272350f, 0.978673331741322210f,
-    -0.205422758569589610f,
-  0.978633924429423210f, -0.205610413053099240f, 0.978594481135952270f,
-    -0.205798059976901790f,
-  0.978555001862359550f, -0.205985699334097910f, 0.978515486610096910f,
-    -0.206173331117788710f,
-  0.978475935380616830f, -0.206360955321075510f, 0.978436348175373730f,
-    -0.206548571937059890f,
-  0.978396724995823090f, -0.206736180958843690f, 0.978357065843421640f,
-    -0.206923782379529100f,
-  0.978317370719627650f, -0.207111376192218560f, 0.978277639625900530f,
-    -0.207298962390014750f,
-  0.978237872563701090f, -0.207486540966020650f, 0.978198069534491400f,
-    -0.207674111913339570f,
-  0.978158230539735050f, -0.207861675225075070f, 0.978118355580896660f,
-    -0.208049230894330940f,
-  0.978078444659442380f, -0.208236778914211330f, 0.978038497776839600f,
-    -0.208424319277820600f,
-  0.977998514934557140f, -0.208611851978263490f, 0.977958496134064830f,
-    -0.208799377008644900f,
-  0.977918441376834370f, -0.208986894362070070f, 0.977878350664338150f,
-    -0.209174404031644580f,
-  0.977838223998050430f, -0.209361906010474160f, 0.977798061379446360f,
-    -0.209549400291664940f,
-  0.977757862810002760f, -0.209736886868323290f, 0.977717628291197460f,
-    -0.209924365733555880f,
-  0.977677357824509930f, -0.210111836880469610f, 0.977637051411420770f,
-    -0.210299300302171730f,
-  0.977596709053411890f, -0.210486755991769720f, 0.977556330751966460f,
-    -0.210674203942371440f,
-  0.977515916508569280f, -0.210861644147084860f, 0.977475466324706170f,
-    -0.211049076599018390f,
-  0.977434980201864260f, -0.211236501291280710f, 0.977394458141532250f,
-    -0.211423918216980670f,
-  0.977353900145199960f, -0.211611327369227550f, 0.977313306214358750f,
-    -0.211798728741130840f,
-  0.977272676350500860f, -0.211986122325800330f, 0.977232010555120320f,
-    -0.212173508116346080f,
-  0.977191308829712280f, -0.212360886105878420f, 0.977150571175773200f,
-    -0.212548256287508060f,
-  0.977109797594800880f, -0.212735618654345930f, 0.977068988088294450f,
-    -0.212922973199503180f,
-  0.977028142657754390f, -0.213110319916091360f, 0.976987261304682390f,
-    -0.213297658797222320f,
-  0.976946344030581670f, -0.213484989836008050f, 0.976905390836956490f,
-    -0.213672313025560970f,
-  0.976864401725312640f, -0.213859628358993750f, 0.976823376697157240f,
-    -0.214046935829419360f,
-  0.976782315753998650f, -0.214234235429950990f, 0.976741218897346550f,
-    -0.214421527153702160f,
-  0.976700086128711840f, -0.214608810993786760f, 0.976658917449606980f,
-    -0.214796086943318860f,
-  0.976617712861545640f, -0.214983354995412820f, 0.976576472366042610f,
-    -0.215170615143183390f,
-  0.976535195964614470f, -0.215357867379745550f, 0.976493883658778650f,
-    -0.215545111698214500f,
-  0.976452535450054060f, -0.215732348091705880f, 0.976411151339961040f,
-    -0.215919576553335490f,
-  0.976369731330021140f, -0.216106797076219520f, 0.976328275421757260f,
-    -0.216294009653474340f,
-  0.976286783616693630f, -0.216481214278216730f, 0.976245255916355800f,
-    -0.216668410943563730f,
-  0.976203692322270560f, -0.216855599642632620f, 0.976162092835966110f,
-    -0.217042780368540990f,
-  0.976120457458971910f, -0.217229953114406790f, 0.976078786192818850f,
-    -0.217417117873348190f,
-  0.976037079039039020f, -0.217604274638483640f, 0.975995335999165990f,
-    -0.217791423402931950f,
-  0.975953557074734300f, -0.217978564159812200f, 0.975911742267280170f,
-    -0.218165696902243800f,
-  0.975869891578341030f, -0.218352821623346320f, 0.975828005009455660f,
-    -0.218539938316239770f,
-  0.975786082562163930f, -0.218727046974044440f, 0.975744124238007270f,
-    -0.218914147589880840f,
-  0.975702130038528570f, -0.219101240156869800f, 0.975660099965271590f,
-    -0.219288324668132470f,
-  0.975618034019781750f, -0.219475401116790310f, 0.975575932203605720f,
-    -0.219662469495965050f,
-  0.975533794518291360f, -0.219849529798778700f, 0.975491620965388110f,
-    -0.220036582018353580f,
-  0.975449411546446380f, -0.220223626147812380f, 0.975407166263018270f,
-    -0.220410662180277940f,
-  0.975364885116656980f, -0.220597690108873510f, 0.975322568108916930f,
-    -0.220784709926722610f,
-  0.975280215241354220f, -0.220971721626949110f, 0.975237826515525820f,
-    -0.221158725202677010f,
-  0.975195401932990370f, -0.221345720647030810f, 0.975152941495307620f,
-    -0.221532707953135230f,
-  0.975110445204038890f, -0.221719687114115220f, 0.975067913060746470f,
-    -0.221906658123096100f,
-  0.975025345066994120f, -0.222093620973203510f, 0.974982741224347140f,
-    -0.222280575657563370f,
-  0.974940101534371830f, -0.222467522169301880f, 0.974897425998635820f,
-    -0.222654460501545500f,
-  0.974854714618708430f, -0.222841390647421120f, 0.974811967396159830f,
-    -0.223028312600055820f,
-  0.974769184332561770f, -0.223215226352576980f, 0.974726365429487320f,
-    -0.223402131898112370f,
-  0.974683510688510670f, -0.223589029229789990f, 0.974640620111207560f,
-    -0.223775918340738150f,
-  0.974597693699155050f, -0.223962799224085460f, 0.974554731453931230f,
-    -0.224149671872960870f,
-  0.974511733377115720f, -0.224336536280493600f, 0.974468699470289580f,
-    -0.224523392439813170f,
-  0.974425629735034990f, -0.224710240344049430f, 0.974382524172935470f,
-    -0.224897079986332490f,
-  0.974339382785575860f, -0.225083911359792830f, 0.974296205574542440f,
-    -0.225270734457561160f,
-  0.974252992541422500f, -0.225457549272768540f, 0.974209743687805220f,
-    -0.225644355798546330f,
-  0.974166459015280320f, -0.225831154028026170f, 0.974123138525439640f,
-    -0.226017943954340020f,
-  0.974079782219875680f, -0.226204725570620190f, 0.974036390100182610f,
-    -0.226391498869999240f,
-  0.973992962167955830f, -0.226578263845610000f, 0.973949498424792170f,
-    -0.226765020490585690f,
-  0.973905998872289570f, -0.226951768798059810f, 0.973862463512047300f,
-    -0.227138508761166170f,
-  0.973818892345666100f, -0.227325240373038860f, 0.973775285374748110f,
-    -0.227511963626812280f,
-  0.973731642600896400f, -0.227698678515621170f, 0.973687964025715670f,
-    -0.227885385032600530f,
-  0.973644249650811980f, -0.228072083170885730f, 0.973600499477792370f,
-    -0.228258772923612380f,
-  0.973556713508265560f, -0.228445454283916470f, 0.973512891743841370f,
-    -0.228632127244934230f,
-  0.973469034186131070f, -0.228818791799802220f, 0.973425140836747030f,
-    -0.229005447941657340f,
-  0.973381211697303290f, -0.229192095663636770f, 0.973337246769414910f,
-    -0.229378734958878010f,
-  0.973293246054698250f, -0.229565365820518870f, 0.973249209554771230f,
-    -0.229751988241697490f,
-  0.973205137271252800f, -0.229938602215552210f, 0.973161029205763530f,
-    -0.230125207735221850f,
-  0.973116885359925130f, -0.230311804793845440f, 0.973072705735360530f,
-    -0.230498393384562350f,
-  0.973028490333694210f, -0.230684973500512200f, 0.972984239156551740f,
-    -0.230871545134835020f,
-  0.972939952205560180f, -0.231058108280671110f, 0.972895629482347760f,
-    -0.231244662931161050f,
-  0.972851270988544180f, -0.231431209079445750f, 0.972806876725780370f,
-    -0.231617746718666470f,
-  0.972762446695688570f, -0.231804275841964780f, 0.972717980899902250f,
-    -0.231990796442482440f,
-  0.972673479340056430f, -0.232177308513361710f, 0.972628942017787270f,
-    -0.232363812047745030f,
-  0.972584368934732210f, -0.232550307038775240f, 0.972539760092530180f,
-    -0.232736793479595390f,
-  0.972495115492821190f, -0.232923271363348980f, 0.972450435137246830f,
-    -0.233109740683179690f,
-  0.972405719027449770f, -0.233296201432231590f, 0.972360967165074140f,
-    -0.233482653603649090f,
-  0.972316179551765300f, -0.233669097190576820f, 0.972271356189170040f,
-    -0.233855532186159840f,
-  0.972226497078936270f, -0.234041958583543430f, 0.972181602222713440f,
-    -0.234228376375873210f,
-  0.972136671622152230f, -0.234414785556295160f, 0.972091705278904430f,
-    -0.234601186117955550f,
-  0.972046703194623500f, -0.234787578054000970f, 0.972001665370963890f,
-    -0.234973961357578250f,
-  0.971956591809581720f, -0.235160336021834730f, 0.971911482512134000f,
-    -0.235346702039917840f,
-  0.971866337480279400f, -0.235533059404975490f, 0.971821156715677700f,
-    -0.235719408110155820f,
-  0.971775940219990140f, -0.235905748148607370f, 0.971730687994879160f,
-    -0.236092079513478910f,
-  0.971685400042008540f, -0.236278402197919570f, 0.971640076363043390f,
-    -0.236464716195078780f,
-  0.971594716959650160f, -0.236651021498106380f, 0.971549321833496630f,
-    -0.236837318100152380f,
-  0.971503890986251780f, -0.237023605994367200f, 0.971458424419585960f,
-    -0.237209885173901600f,
-  0.971412922135170940f, -0.237396155631906610f, 0.971367384134679490f,
-    -0.237582417361533570f,
-  0.971321810419786160f, -0.237768670355934190f, 0.971276200992166490f,
-    -0.237954914608260540f,
-  0.971230555853497380f, -0.238141150111664840f, 0.971184875005457030f,
-    -0.238327376859299810f,
-  0.971139158449725090f, -0.238513594844318420f, 0.971093406187982460f,
-    -0.238699804059873980f,
-  0.971047618221911100f, -0.238886004499120040f, 0.971001794553194690f,
-    -0.239072196155210610f,
-  0.970955935183517970f, -0.239258379021299980f, 0.970910040114567050f,
-    -0.239444553090542630f,
-  0.970864109348029470f, -0.239630718356093560f, 0.970818142885593870f,
-    -0.239816874811108000f,
-  0.970772140728950350f, -0.240003022448741500f, 0.970726102879790110f,
-    -0.240189161262149900f,
-  0.970680029339806130f, -0.240375291244489450f, 0.970633920110692160f,
-    -0.240561412388916650f,
-  0.970587775194143630f, -0.240747524688588430f, 0.970541594591857070f,
-    -0.240933628136661910f,
-  0.970495378305530560f, -0.241119722726294590f, 0.970449126336863090f,
-    -0.241305808450644370f,
-  0.970402838687555500f, -0.241491885302869330f, 0.970356515359309450f,
-    -0.241677953276128010f,
-  0.970310156353828110f, -0.241864012363579180f, 0.970263761672816140f,
-    -0.242050062558382070f,
-  0.970217331317979160f, -0.242236103853696010f, 0.970170865291024480f,
-    -0.242422136242680890f,
-  0.970124363593660280f, -0.242608159718496810f, 0.970077826227596420f,
-    -0.242794174274304220f,
-  0.970031253194543970f, -0.242980179903263870f, 0.969984644496215240f,
-    -0.243166176598536900f,
-  0.969938000134323960f, -0.243352164353284740f, 0.969891320110585100f,
-    -0.243538143160669130f,
-  0.969844604426714830f, -0.243724113013852160f, 0.969797853084430890f,
-    -0.243910073905996260f,
-  0.969751066085452140f, -0.244096025830264210f, 0.969704243431498860f,
-    -0.244281968779819030f,
-  0.969657385124292450f, -0.244467902747824150f, 0.969610491165555870f,
-    -0.244653827727443320f,
-  0.969563561557013180f, -0.244839743711840670f, 0.969516596300390000f,
-    -0.245025650694180470f,
-  0.969469595397413060f, -0.245211548667627540f, 0.969422558849810320f,
-    -0.245397437625346960f,
-  0.969375486659311280f, -0.245583317560504060f, 0.969328378827646660f,
-    -0.245769188466264580f,
-  0.969281235356548530f, -0.245955050335794590f, 0.969234056247750050f,
-    -0.246140903162260530f,
-  0.969186841502985950f, -0.246326746938829030f, 0.969139591123992280f,
-    -0.246512581658667210f,
-  0.969092305112506210f, -0.246698407314942410f, 0.969044983470266240f,
-    -0.246884223900822430f,
-  0.968997626199012420f, -0.247070031409475250f, 0.968950233300485800f,
-    -0.247255829834069300f,
-  0.968902804776428870f, -0.247441619167773270f, 0.968855340628585580f,
-    -0.247627399403756280f,
-  0.968807840858700970f, -0.247813170535187670f, 0.968760305468521430f,
-    -0.247998932555237110f,
-  0.968712734459794780f, -0.248184685457074780f, 0.968665127834270060f,
-    -0.248370429233870980f,
-  0.968617485593697540f, -0.248556163878796560f, 0.968569807739828930f,
-    -0.248741889385022480f,
-  0.968522094274417380f, -0.248927605745720150f, 0.968474345199216820f,
-    -0.249113312954061360f,
-  0.968426560515983190f, -0.249299011003218190f, 0.968378740226473300f,
-    -0.249484699886362960f,
-  0.968330884332445190f, -0.249670379596668550f, 0.968282992835658660f,
-    -0.249856050127307990f,
-  0.968235065737874320f, -0.250041711471454650f, 0.968187103040854420f,
-    -0.250227363622282370f,
-  0.968139104746362440f, -0.250413006572965220f, 0.968091070856162970f,
-    -0.250598640316677670f,
-  0.968043001372022260f, -0.250784264846594500f, 0.967994896295707670f,
-    -0.250969880155890720f,
-  0.967946755628987800f, -0.251155486237741920f, 0.967898579373632660f,
-    -0.251341083085323880f,
-  0.967850367531413620f, -0.251526670691812610f, 0.967802120104103270f,
-    -0.251712249050384700f,
-  0.967753837093475510f, -0.251897818154216970f, 0.967705518501305480f,
-    -0.252083377996486450f,
-  0.967657164329369880f, -0.252268928570370810f, 0.967608774579446500f,
-    -0.252454469869047740f,
-  0.967560349253314360f, -0.252640001885695520f, 0.967511888352754150f,
-    -0.252825524613492610f,
-  0.967463391879547550f, -0.253011038045617860f, 0.967414859835477480f,
-    -0.253196542175250560f,
-  0.967366292222328510f, -0.253382036995570160f, 0.967317689041886310f,
-    -0.253567522499756560f,
-  0.967269050295937790f, -0.253752998680989990f, 0.967220375986271420f,
-    -0.253938465532451090f,
-  0.967171666114676640f, -0.254123923047320620f, 0.967122920682944360f,
-    -0.254309371218780000f,
-  0.967074139692867040f, -0.254494810040010730f, 0.967025323146238010f,
-    -0.254680239504194830f,
-  0.966976471044852070f, -0.254865659604514570f, 0.966927583390505660f,
-    -0.255051070334152470f,
-  0.966878660184995910f, -0.255236471686291710f, 0.966829701430121810f,
-    -0.255421863654115460f,
-  0.966780707127683270f, -0.255607246230807380f, 0.966731677279481840f,
-    -0.255792619409551610f,
-  0.966682611887320080f, -0.255977983183532430f, 0.966633510953002100f,
-    -0.256163337545934460f,
-  0.966584374478333120f, -0.256348682489942910f, 0.966535202465119700f,
-    -0.256534018008743040f,
-  0.966485994915169840f, -0.256719344095520660f, 0.966436751830292650f,
-    -0.256904660743461910f,
-  0.966387473212298900f, -0.257089967945753120f, 0.966338159063000130f,
-    -0.257275265695581120f,
-  0.966288809384209690f, -0.257460553986133100f, 0.966239424177741890f,
-    -0.257645832810596390f,
-  0.966190003445412500f, -0.257831102162158990f, 0.966140547189038750f,
-    -0.258016362034009020f,
-  0.966091055410438830f, -0.258201612419334870f, 0.966041528111432400f,
-    -0.258386853311325600f,
-  0.965991965293840570f, -0.258572084703170340f, 0.965942366959485540f,
-    -0.258757306588058680f,
-  0.965892733110190860f, -0.258942518959180520f, 0.965843063747781510f,
-    -0.259127721809726150f,
-  0.965793358874083680f, -0.259312915132886230f, 0.965743618490924830f,
-    -0.259498098921851660f,
-  0.965693842600133690f, -0.259683273169813770f, 0.965644031203540590f,
-    -0.259868437869964270f,
-  0.965594184302976830f, -0.260053593015495190f, 0.965544301900275180f,
-    -0.260238738599598840f,
-  0.965494383997269500f, -0.260423874615468010f, 0.965444430595795430f,
-    -0.260609001056295750f,
-  0.965394441697689400f, -0.260794117915275510f, 0.965344417304789370f,
-    -0.260979225185601070f,
-  0.965294357418934660f, -0.261164322860466480f, 0.965244262041965780f,
-    -0.261349410933066350f,
-  0.965194131175724720f, -0.261534489396595520f, 0.965143964822054450f,
-    -0.261719558244249030f,
-  0.965093762982799590f, -0.261904617469222610f, 0.965043525659805890f,
-    -0.262089667064712040f,
-  0.964993252854920320f, -0.262274707023913590f, 0.964942944569991410f,
-    -0.262459737340023980f,
-  0.964892600806868890f, -0.262644758006240040f, 0.964842221567403620f,
-    -0.262829769015759160f,
-  0.964791806853447900f, -0.263014770361779000f, 0.964741356666855340f,
-    -0.263199762037497560f,
-  0.964690871009481030f, -0.263384744036113280f, 0.964640349883180930f,
-    -0.263569716350824880f,
-  0.964589793289812760f, -0.263754678974831350f, 0.964539201231235150f,
-    -0.263939631901332350f,
-  0.964488573709308410f, -0.264124575123527550f, 0.964437910725893910f,
-    -0.264309508634617110f,
-  0.964387212282854290f, -0.264494432427801630f, 0.964336478382053720f,
-    -0.264679346496281890f,
-  0.964285709025357480f, -0.264864250833259260f, 0.964234904214632200f,
-    -0.265049145431935250f,
-  0.964184063951745830f, -0.265234030285511790f, 0.964133188238567640f,
-    -0.265418905387191260f,
-  0.964082277076968140f, -0.265603770730176330f, 0.964031330468819280f,
-    -0.265788626307669920f,
-  0.963980348415994110f, -0.265973472112875590f, 0.963929330920367140f,
-    -0.266158308138996990f,
-  0.963878277983814200f, -0.266343134379238180f, 0.963827189608212340f,
-    -0.266527950826803690f,
-  0.963776065795439840f, -0.266712757474898370f, 0.963724906547376530f,
-    -0.266897554316727350f,
-  0.963673711865903230f, -0.267082341345496300f, 0.963622481752902220f,
-    -0.267267118554410930f,
-  0.963571216210257320f, -0.267451885936677620f, 0.963519915239853140f,
-    -0.267636643485503090f,
-  0.963468578843575950f, -0.267821391194094150f, 0.963417207023313350f,
-    -0.268006129055658290f,
-  0.963365799780954050f, -0.268190857063403180f, 0.963314357118388200f,
-    -0.268375575210536900f,
-  0.963262879037507070f, -0.268560283490267890f, 0.963211365540203480f,
-    -0.268744981895804980f,
-  0.963159816628371360f, -0.268929670420357260f, 0.963108232303906190f,
-    -0.269114349057134380f,
-  0.963056612568704340f, -0.269299017799346120f, 0.963004957424663850f,
-    -0.269483676640202840f,
-  0.962953266873683880f, -0.269668325572915090f, 0.962901540917665000f,
-    -0.269852964590693860f,
-  0.962849779558509030f, -0.270037593686750570f, 0.962797982798119010f,
-    -0.270222212854296870f,
-  0.962746150638399410f, -0.270406822086544820f, 0.962694283081255930f,
-    -0.270591421376706940f,
-  0.962642380128595710f, -0.270776010717996010f, 0.962590441782326890f,
-    -0.270960590103625170f,
-  0.962538468044359160f, -0.271145159526808010f, 0.962486458916603450f,
-    -0.271329718980758420f,
-  0.962434414400972100f, -0.271514268458690700f, 0.962382334499378380f,
-    -0.271698807953819510f,
-  0.962330219213737400f, -0.271883337459359720f, 0.962278068545965090f,
-    -0.272067856968526920f,
-  0.962225882497979020f, -0.272252366474536710f, 0.962173661071697880f,
-    -0.272436865970605240f,
-  0.962121404269041580f, -0.272621355449948980f, 0.962069112091931580f,
-    -0.272805834905784810f,
-  0.962016784542290560f, -0.272990304331329920f, 0.961964421622042320f,
-    -0.273174763719801930f,
-  0.961912023333112210f, -0.273359213064418680f, 0.961859589677426570f,
-    -0.273543652358398730f,
-  0.961807120656913540f, -0.273728081594960540f, 0.961754616273502010f,
-    -0.273912500767323260f,
-  0.961702076529122540f, -0.274096909868706380f, 0.961649501425706820f,
-    -0.274281308892329660f,
-  0.961596890965187860f, -0.274465697831413220f, 0.961544245149499990f,
-    -0.274650076679177680f,
-  0.961491563980579000f, -0.274834445428843940f, 0.961438847460361680f,
-    -0.275018804073633220f,
-  0.961386095590786250f, -0.275203152606767310f, 0.961333308373792270f,
-    -0.275387491021468140f,
-  0.961280485811320640f, -0.275571819310958140f, 0.961227627905313460f,
-    -0.275756137468460120f,
-  0.961174734657714080f, -0.275940445487197150f, 0.961121806070467380f,
-    -0.276124743360392830f,
-  0.961068842145519350f, -0.276309031081271080f, 0.961015842884817230f,
-    -0.276493308643055990f,
-  0.960962808290309780f, -0.276677576038972420f, 0.960909738363946770f,
-    -0.276861833262245280f,
-  0.960856633107679660f, -0.277046080306099900f, 0.960803492523460760f,
-    -0.277230317163762170f,
-  0.960750316613243950f, -0.277414543828458090f, 0.960697105378984450f,
-    -0.277598760293414290f,
-  0.960643858822638590f, -0.277782966551857690f, 0.960590576946164120f,
-    -0.277967162597015370f,
-  0.960537259751520050f, -0.278151348422115090f, 0.960483907240666790f,
-    -0.278335524020384920f,
-  0.960430519415565790f, -0.278519689385053060f, 0.960377096278180130f,
-    -0.278703844509348490f,
-  0.960323637830473920f, -0.278887989386500280f, 0.960270144074412800f,
-    -0.279072124009737800f,
-  0.960216615011963430f, -0.279256248372291180f, 0.960163050645094000f,
-    -0.279440362467390510f,
-  0.960109450975773940f, -0.279624466288266590f, 0.960055816005973890f,
-    -0.279808559828150390f,
-  0.960002145737665960f, -0.279992643080273220f, 0.959948440172823210f,
-    -0.280176716037866980f,
-  0.959894699313420530f, -0.280360778694163810f, 0.959840923161433770f,
-    -0.280544831042396250f,
-  0.959787111718839900f, -0.280728873075797190f, 0.959733264987617680f,
-    -0.280912904787600000f,
-  0.959679382969746750f, -0.281096926171038260f, 0.959625465667208190f,
-    -0.281280937219346110f,
-  0.959571513081984520f, -0.281464937925757940f, 0.959517525216059260f,
-    -0.281648928283508630f,
-  0.959463502071417510f, -0.281832908285833350f, 0.959409443650045550f,
-    -0.282016877925967640f,
-  0.959355349953930790f, -0.282200837197147560f, 0.959301220985062210f,
-    -0.282384786092609360f,
-  0.959247056745430090f, -0.282568724605589740f, 0.959192857237025740f,
-    -0.282752652729325930f,
-  0.959138622461841890f, -0.282936570457055390f, 0.959084352421872730f,
-    -0.283120477782015820f,
-  0.959030047119113660f, -0.283304374697445740f, 0.958975706555561080f,
-    -0.283488261196583550f,
-  0.958921330733213170f, -0.283672137272668430f, 0.958866919654069010f,
-    -0.283856002918939750f,
-  0.958812473320129310f, -0.284039858128637190f, 0.958757991733395710f,
-    -0.284223702895001040f,
-  0.958703474895871600f, -0.284407537211271880f, 0.958648922809561150f,
-    -0.284591361070690440f,
-  0.958594335476470220f, -0.284775174466498300f, 0.958539712898605730f,
-    -0.284958977391937040f,
-  0.958485055077976100f, -0.285142769840248670f, 0.958430362016590930f,
-    -0.285326551804675870f,
-  0.958375633716461170f, -0.285510323278461260f, 0.958320870179598880f,
-    -0.285694084254848320f,
-  0.958266071408017670f, -0.285877834727080620f, 0.958211237403732260f,
-    -0.286061574688402040f,
-  0.958156368168758820f, -0.286245304132057120f, 0.958101463705114730f,
-    -0.286429023051290700f,
-  0.958046524014818600f, -0.286612731439347790f, 0.957991549099890370f,
-    -0.286796429289474080f,
-  0.957936538962351420f, -0.286980116594915570f, 0.957881493604224370f,
-    -0.287163793348918390f,
-  0.957826413027532910f, -0.287347459544729510f, 0.957771297234302320f,
-    -0.287531115175595930f,
-  0.957716146226558870f, -0.287714760234765170f, 0.957660960006330610f,
-    -0.287898394715485170f,
-  0.957605738575646350f, -0.288082018611004130f, 0.957550481936536470f,
-    -0.288265631914570770f,
-  0.957495190091032570f, -0.288449234619434220f, 0.957439863041167680f,
-    -0.288632826718843830f,
-  0.957384500788975860f, -0.288816408206049480f, 0.957329103336492790f,
-    -0.288999979074301420f,
-  0.957273670685755200f, -0.289183539316850200f, 0.957218202838801210f,
-    -0.289367088926947010f,
-  0.957162699797670210f, -0.289550627897843030f, 0.957107161564402790f,
-    -0.289734156222790250f,
-  0.957051588141040970f, -0.289917673895040750f, 0.956995979529628230f,
-    -0.290101180907847090f,
-  0.956940335732208820f, -0.290284677254462330f, 0.956884656750828900f,
-    -0.290468162928139820f,
-  0.956828942587535370f, -0.290651637922133220f, 0.956773193244376930f,
-    -0.290835102229696830f,
-  0.956717408723403050f, -0.291018555844085090f, 0.956661589026665090f,
-    -0.291201998758552900f,
-  0.956605734156215080f, -0.291385430966355660f, 0.956549844114106820f,
-    -0.291568852460749040f,
-  0.956493918902395100f, -0.291752263234989260f, 0.956437958523136180f,
-    -0.291935663282332780f,
-  0.956381962978387730f, -0.292119052596036380f, 0.956325932270208230f,
-    -0.292302431169357560f,
-  0.956269866400658030f, -0.292485798995553880f, 0.956213765371798470f,
-    -0.292669156067883460f,
-  0.956157629185692140f, -0.292852502379604810f, 0.956101457844403040f,
-    -0.293035837923976810f,
-  0.956045251349996410f, -0.293219162694258630f, 0.955989009704538930f,
-    -0.293402476683710110f,
-  0.955932732910098280f, -0.293585779885591200f, 0.955876420968743590f,
-    -0.293769072293162400f,
-  0.955820073882545420f, -0.293952353899684660f, 0.955763691653575440f,
-    -0.294135624698419030f,
-  0.955707274283906560f, -0.294318884682627400f, 0.955650821775613330f,
-    -0.294502133845571670f,
-  0.955594334130771110f, -0.294685372180514330f, 0.955537811351456880f,
-    -0.294868599680718270f,
-  0.955481253439748770f, -0.295051816339446720f, 0.955424660397726330f,
-    -0.295235022149963220f,
-  0.955368032227470350f, -0.295418217105532010f, 0.955311368931062720f,
-    -0.295601401199417360f,
-  0.955254670510586990f, -0.295784574424884260f, 0.955197936968127710f,
-    -0.295967736775197890f,
-  0.955141168305770780f, -0.296150888243623790f, 0.955084364525603410f,
-    -0.296334028823428190f,
-  0.955027525629714160f, -0.296517158507877470f, 0.954970651620192790f,
-    -0.296700277290238350f,
-  0.954913742499130520f, -0.296883385163778270f, 0.954856798268619580f,
-    -0.297066482121764730f,
-  0.954799818930753720f, -0.297249568157465840f, 0.954742804487627940f,
-    -0.297432643264150030f,
-  0.954685754941338340f, -0.297615707435086200f, 0.954628670293982680f,
-    -0.297798760663543550f,
-  0.954571550547659630f, -0.297981802942791810f, 0.954514395704469500f,
-    -0.298164834266100850f,
-  0.954457205766513490f, -0.298347854626741400f, 0.954399980735894490f,
-    -0.298530864017984120f,
-  0.954342720614716480f, -0.298713862433100330f, 0.954285425405084650f,
-    -0.298896849865361800f,
-  0.954228095109105670f, -0.299079826308040480f, 0.954170729728887280f,
-    -0.299262791754408840f,
-  0.954113329266538800f, -0.299445746197739890f, 0.954055893724170660f,
-    -0.299628689631306790f,
-  0.953998423103894490f, -0.299811622048383350f, 0.953940917407823500f,
-    -0.299994543442243580f,
-  0.953883376638071770f, -0.300177453806161950f, 0.953825800796755050f,
-    -0.300360353133413530f,
-  0.953768189885990330f, -0.300543241417273450f, 0.953710543907895670f,
-    -0.300726118651017500f,
-  0.953652862864590500f, -0.300908984827921890f, 0.953595146758195680f,
-    -0.301091839941263100f,
-  0.953537395590833280f, -0.301274683984317950f, 0.953479609364626610f,
-    -0.301457516950363940f,
-  0.953421788081700310f, -0.301640338832678770f, 0.953363931744180330f,
-    -0.301823149624540650f,
-  0.953306040354193860f, -0.302005949319228080f, 0.953248113913869320f,
-    -0.302188737910019990f,
-  0.953190152425336670f, -0.302371515390195970f, 0.953132155890726750f,
-    -0.302554281753035610f,
-  0.953074124312172200f, -0.302737036991819140f, 0.953016057691806530f,
-    -0.302919781099827310f,
-  0.952957956031764700f, -0.303102514070341060f, 0.952899819334182880f,
-    -0.303285235896641750f,
-  0.952841647601198720f, -0.303467946572011320f, 0.952783440834950920f,
-    -0.303650646089731910f,
-  0.952725199037579570f, -0.303833334443086360f, 0.952666922211226170f,
-    -0.304016011625357570f,
-  0.952608610358033350f, -0.304198677629829110f, 0.952550263480144930f,
-    -0.304381332449784880f,
-  0.952491881579706320f, -0.304563976078509100f, 0.952433464658864030f,
-    -0.304746608509286530f,
-  0.952375012719765880f, -0.304929229735402370f, 0.952316525764560940f,
-    -0.305111839750142110f,
-  0.952258003795399600f, -0.305294438546791670f, 0.952199446814433580f,
-    -0.305477026118637420f,
-  0.952140854823815830f, -0.305659602458966120f, 0.952082227825700620f,
-    -0.305842167561065080f,
-  0.952023565822243570f, -0.306024721418221790f, 0.951964868815601380f,
-    -0.306207264023724220f,
-  0.951906136807932350f, -0.306389795370860920f, 0.951847369801395620f,
-    -0.306572315452920740f,
-  0.951788567798152130f, -0.306754824263192780f, 0.951729730800363830f,
-    -0.306937321794966910f,
-  0.951670858810193860f, -0.307119808041533100f, 0.951611951829806850f,
-    -0.307302282996181790f,
-  0.951553009861368590f, -0.307484746652204100f, 0.951494032907046370f,
-    -0.307667199002891190f,
-  0.951435020969008340f, -0.307849640041534870f, 0.951375974049424420f,
-    -0.308032069761427330f,
-  0.951316892150465550f, -0.308214488155861050f, 0.951257775274304000f,
-    -0.308396895218129190f,
-  0.951198623423113230f, -0.308579290941525090f, 0.951139436599068190f,
-    -0.308761675319342450f,
-  0.951080214804345010f, -0.308944048344875710f, 0.951020958041121080f,
-    -0.309126410011419440f,
-  0.950961666311575080f, -0.309308760312268730f, 0.950902339617887060f,
-    -0.309491099240719100f,
-  0.950842977962238160f, -0.309673426790066380f, 0.950783581346811070f,
-    -0.309855742953607070f,
-  0.950724149773789610f, -0.310038047724637890f, 0.950664683245358910f,
-    -0.310220341096455850f,
-  0.950605181763705340f, -0.310402623062358720f, 0.950545645331016600f,
-    -0.310584893615644450f,
-  0.950486073949481700f, -0.310767152749611470f, 0.950426467621290900f,
-    -0.310949400457558640f,
-  0.950366826348635780f, -0.311131636732785270f, 0.950307150133709260f,
-    -0.311313861568590920f,
-  0.950247438978705230f, -0.311496074958275910f, 0.950187692885819280f,
-    -0.311678276895140550f,
-  0.950127911857248100f, -0.311860467372486020f, 0.950068095895189590f,
-    -0.312042646383613510f,
-  0.950008245001843000f, -0.312224813921824880f, 0.949948359179409010f,
-    -0.312406969980422440f,
-  0.949888438430089300f, -0.312589114552708710f, 0.949828482756087110f,
-    -0.312771247631986770f,
-  0.949768492159606680f, -0.312953369211560200f, 0.949708466642853800f,
-    -0.313135479284732840f,
-  0.949648406208035480f, -0.313317577844809010f, 0.949588310857359950f,
-    -0.313499664885093510f,
-  0.949528180593036670f, -0.313681740398891520f, 0.949468015417276550f,
-    -0.313863804379508500f,
-  0.949407815332291570f, -0.314045856820250710f, 0.949347580340295210f,
-    -0.314227897714424440f,
-  0.949287310443502120f, -0.314409927055336660f, 0.949227005644128210f,
-    -0.314591944836294660f,
-  0.949166665944390700f, -0.314773951050606070f, 0.949106291346508260f,
-    -0.314955945691579140f,
-  0.949045881852700560f, -0.315137928752522440f, 0.948985437465188710f,
-    -0.315319900226744890f,
-  0.948924958186195160f, -0.315501860107555990f, 0.948864444017943340f,
-    -0.315683808388265650f,
-  0.948803894962658490f, -0.315865745062183960f, 0.948743311022566480f,
-    -0.316047670122621860f,
-  0.948682692199895090f, -0.316229583562890330f, 0.948622038496872990f,
-    -0.316411485376300980f,
-  0.948561349915730270f, -0.316593375556165850f, 0.948500626458698260f,
-    -0.316775254095797270f,
-  0.948439868128009620f, -0.316957120988508150f, 0.948379074925898120f,
-    -0.317138976227611780f,
-  0.948318246854599090f, -0.317320819806421740f, 0.948257383916349060f,
-    -0.317502651718252260f,
-  0.948196486113385580f, -0.317684471956417970f, 0.948135553447947980f,
-    -0.317866280514233660f,
-  0.948074585922276230f, -0.318048077385014950f, 0.948013583538612200f,
-    -0.318229862562077530f,
-  0.947952546299198670f, -0.318411636038737790f, 0.947891474206279840f,
-    -0.318593397808312420f,
-  0.947830367262101010f, -0.318775147864118480f, 0.947769225468909180f,
-    -0.318956886199473650f,
-  0.947708048828952100f, -0.319138612807695900f, 0.947646837344479300f,
-    -0.319320327682103610f,
-  0.947585591017741090f, -0.319502030816015690f, 0.947524309850989570f,
-    -0.319683722202751430f,
-  0.947462993846477700f, -0.319865401835630500f, 0.947401643006459900f,
-    -0.320047069707973140f,
-  0.947340257333192050f, -0.320228725813099860f, 0.947278836828930880f,
-    -0.320410370144331820f,
-  0.947217381495934820f, -0.320592002694990330f, 0.947155891336463270f,
-    -0.320773623458397330f,
-  0.947094366352777220f, -0.320955232427875210f, 0.947032806547138620f,
-    -0.321136829596746660f,
-  0.946971211921810880f, -0.321318414958334850f, 0.946909582479058760f,
-    -0.321499988505963510f,
-  0.946847918221148000f, -0.321681550232956580f, 0.946786219150346000f,
-    -0.321863100132638580f,
-  0.946724485268921170f, -0.322044638198334510f, 0.946662716579143360f,
-    -0.322226164423369600f,
-  0.946600913083283530f, -0.322407678801069850f, 0.946539074783614100f,
-    -0.322589181324761330f,
-  0.946477201682408680f, -0.322770671987770710f, 0.946415293781942110f,
-    -0.322952150783425260f,
-  0.946353351084490590f, -0.323133617705052330f, 0.946291373592331620f,
-    -0.323315072745979980f,
-  0.946229361307743820f, -0.323496515899536710f, 0.946167314233007370f,
-    -0.323677947159051240f,
-  0.946105232370403450f, -0.323859366517852850f, 0.946043115722214560f,
-    -0.324040773969271450f,
-  0.945980964290724760f, -0.324222169506636960f, 0.945918778078219110f,
-    -0.324403553123280230f,
-  0.945856557086983910f, -0.324584924812532150f, 0.945794301319306970f,
-    -0.324766284567724220f,
-  0.945732010777477150f, -0.324947632382188430f, 0.945669685463784710f,
-    -0.325128968249257080f,
-  0.945607325380521280f, -0.325310292162262930f, 0.945544930529979680f,
-    -0.325491604114539310f,
-  0.945482500914453740f, -0.325672904099419850f, 0.945420036536239070f,
-    -0.325854192110238580f,
-  0.945357537397632290f, -0.326035468140330240f, 0.945295003500931210f,
-    -0.326216732183029710f,
-  0.945232434848435000f, -0.326397984231672490f, 0.945169831442444150f,
-    -0.326579224279594400f,
-  0.945107193285260610f, -0.326760452320131730f, 0.945044520379187070f,
-    -0.326941668346621420f,
-  0.944981812726528150f, -0.327122872352400510f, 0.944919070329589220f,
-    -0.327304064330806670f,
-  0.944856293190677210f, -0.327485244275178000f, 0.944793481312100280f,
-    -0.327666412178853120f,
-  0.944730634696167800f, -0.327847568035170840f, 0.944667753345190490f,
-    -0.328028711837470680f,
-  0.944604837261480260f, -0.328209843579092500f, 0.944541886447350490f,
-    -0.328390963253376580f,
-  0.944478900905115550f, -0.328572070853663740f, 0.944415880637091250f,
-    -0.328753166373294990f,
-  0.944352825645594750f, -0.328934249805612200f, 0.944289735932944410f,
-    -0.329115321143957250f,
-  0.944226611501459810f, -0.329296380381672750f, 0.944163452353461770f,
-    -0.329477427512101740f,
-  0.944100258491272660f, -0.329658462528587490f, 0.944037029917215830f,
-    -0.329839485424473940f,
-  0.943973766633615980f, -0.330020496193105420f, 0.943910468642799150f,
-    -0.330201494827826570f,
-  0.943847135947092690f, -0.330382481321982780f, 0.943783768548825060f,
-    -0.330563455668919540f,
-  0.943720366450326200f, -0.330744417861982890f, 0.943656929653927220f,
-    -0.330925367894519540f,
-  0.943593458161960390f, -0.331106305759876430f, 0.943529951976759480f,
-    -0.331287231451400820f,
-  0.943466411100659320f, -0.331468144962440870f, 0.943402835535996240f,
-    -0.331649046286344670f,
-  0.943339225285107720f, -0.331829935416461110f, 0.943275580350332540f,
-    -0.332010812346139380f,
-  0.943211900734010620f, -0.332191677068729150f, 0.943148186438483420f,
-    -0.332372529577580620f,
-  0.943084437466093490f, -0.332553369866044220f, 0.943020653819184650f,
-    -0.332734197927471050f,
-  0.942956835500102120f, -0.332915013755212650f, 0.942892982511192250f,
-    -0.333095817342620780f,
-  0.942829094854802710f, -0.333276608683047930f, 0.942765172533282510f,
-    -0.333457387769846850f,
-  0.942701215548981900f, -0.333638154596370860f, 0.942637223904252530f,
-    -0.333818909155973620f,
-  0.942573197601446870f, -0.333999651442009380f, 0.942509136642919240f,
-    -0.334180381447832690f,
-  0.942445041031024890f, -0.334361099166798740f, 0.942380910768120470f,
-    -0.334541804592262900f,
-  0.942316745856563780f, -0.334722497717581220f, 0.942252546298714020f,
-    -0.334903178536110180f,
-  0.942188312096931770f, -0.335083847041206580f, 0.942124043253578570f,
-    -0.335264503226227810f,
-  0.942059739771017310f, -0.335445147084531600f, 0.941995401651612550f,
-    -0.335625778609476290f,
-  0.941931028897729620f, -0.335806397794420450f, 0.941866621511735280f,
-    -0.335987004632723350f,
-  0.941802179495997650f, -0.336167599117744520f, 0.941737702852886160f,
-    -0.336348181242844050f,
-  0.941673191584771360f, -0.336528751001382410f, 0.941608645694025250f,
-    -0.336709308386720580f,
-  0.941544065183020810f, -0.336889853392220050f, 0.941479450054132580f,
-    -0.337070386011242620f,
-  0.941414800309736340f, -0.337250906237150590f, 0.941350115952208970f,
-    -0.337431414063306840f,
-  0.941285396983928660f, -0.337611909483074620f, 0.941220643407275180f,
-    -0.337792392489817460f,
-  0.941155855224629190f, -0.337972863076899720f, 0.941091032438372780f,
-    -0.338153321237685930f,
-  0.941026175050889260f, -0.338333766965541130f, 0.940961283064563280f,
-    -0.338514200253830940f,
-  0.940896356481780830f, -0.338694621095921190f, 0.940831395304928870f,
-    -0.338875029485178450f,
-  0.940766399536396070f, -0.339055425414969640f, 0.940701369178571940f,
-    -0.339235808878661950f,
-  0.940636304233847590f, -0.339416179869623360f, 0.940571204704615190f,
-    -0.339596538381222110f,
-  0.940506070593268300f, -0.339776884406826850f, 0.940440901902201750f,
-    -0.339957217939806880f,
-  0.940375698633811540f, -0.340137538973531720f, 0.940310460790495070f,
-    -0.340317847501371670f,
-  0.940245188374650880f, -0.340498143516697160f, 0.940179881388678920f,
-    -0.340678427012879200f,
-  0.940114539834980280f, -0.340858697983289440f, 0.940049163715957370f,
-    -0.341038956421299720f,
-  0.939983753034014050f, -0.341219202320282360f, 0.939918307791555050f,
-    -0.341399435673610420f,
-  0.939852827990986680f, -0.341579656474657160f, 0.939787313634716570f,
-    -0.341759864716796310f,
-  0.939721764725153340f, -0.341940060393402190f, 0.939656181264707180f,
-    -0.342120243497849530f,
-  0.939590563255789270f, -0.342300414023513520f, 0.939524910700812230f,
-    -0.342480571963769800f,
-  0.939459223602189920f, -0.342660717311994380f, 0.939393501962337510f,
-    -0.342840850061563950f,
-  0.939327745783671400f, -0.343020970205855540f, 0.939261955068609210f,
-    -0.343201077738246540f,
-  0.939196129819569900f, -0.343381172652115040f, 0.939130270038973650f,
-    -0.343561254940839390f,
-  0.939064375729241950f, -0.343741324597798490f, 0.938998446892797540f,
-    -0.343921381616371700f,
-  0.938932483532064600f, -0.344101425989938810f, 0.938866485649468060f,
-    -0.344281457711880180f,
-  0.938800453247434770f, -0.344461476775576540f, 0.938734386328392460f,
-    -0.344641483174408960f,
-  0.938668284894770170f, -0.344821476901759290f, 0.938602148948998400f,
-    -0.345001457951009670f,
-  0.938535978493508560f, -0.345181426315542550f, 0.938469773530733800f,
-    -0.345361381988741220f,
-  0.938403534063108060f, -0.345541324963989090f, 0.938337260093066950f,
-    -0.345721255234670120f,
-  0.938270951623047190f, -0.345901172794168990f, 0.938204608655486490f,
-    -0.346081077635870430f,
-  0.938138231192824360f, -0.346260969753160010f, 0.938071819237501270f,
-    -0.346440849139423520f,
-  0.938005372791958840f, -0.346620715788047320f, 0.937938891858640320f,
-    -0.346800569692418290f,
-  0.937872376439989890f, -0.346980410845923680f, 0.937805826538453120f,
-    -0.347160239241951160f,
-  0.937739242156476970f, -0.347340054873889140f, 0.937672623296509470f,
-    -0.347519857735126110f,
-  0.937605969960999990f, -0.347699647819051380f, 0.937539282152399230f,
-    -0.347879425119054510f,
-  0.937472559873159250f, -0.348059189628525610f, 0.937405803125732960f,
-    -0.348238941340855260f,
-  0.937339011912574960f, -0.348418680249434560f, 0.937272186236140950f,
-    -0.348598406347654930f,
-  0.937205326098887960f, -0.348778119628908420f, 0.937138431503274140f,
-    -0.348957820086587490f,
-  0.937071502451759190f, -0.349137507714084970f, 0.937004538946803690f,
-    -0.349317182504794380f,
-  0.936937540990869900f, -0.349496844452109550f, 0.936870508586420960f,
-    -0.349676493549424760f,
-  0.936803441735921560f, -0.349856129790134920f, 0.936736340441837620f,
-    -0.350035753167635240f,
-  0.936669204706636170f, -0.350215363675321580f, 0.936602034532785570f,
-    -0.350394961306590150f,
-  0.936534829922755500f, -0.350574546054837510f, 0.936467590879016990f,
-    -0.350754117913461060f,
-  0.936400317404042060f, -0.350933676875858360f, 0.936333009500304180f,
-    -0.351113222935427460f,
-  0.936265667170278260f, -0.351292756085567090f, 0.936198290416440090f,
-    -0.351472276319676310f,
-  0.936130879241267030f, -0.351651783631154570f, 0.936063433647237540f,
-    -0.351831278013402030f,
-  0.935995953636831410f, -0.352010759459819080f, 0.935928439212529660f,
-    -0.352190227963806830f,
-  0.935860890376814640f, -0.352369683518766630f, 0.935793307132169900f,
-    -0.352549126118100460f,
-  0.935725689481080370f, -0.352728555755210730f, 0.935658037426032040f,
-    -0.352907972423500250f,
-  0.935590350969512370f, -0.353087376116372480f, 0.935522630114009930f,
-    -0.353266766827231240f,
-  0.935454874862014620f, -0.353446144549480810f, 0.935387085216017770f,
-    -0.353625509276525970f,
-  0.935319261178511610f, -0.353804861001772050f, 0.935251402751989920f,
-    -0.353984199718624770f,
-  0.935183509938947610f, -0.354163525420490340f, 0.935115582741880890f,
-    -0.354342838100775550f,
-  0.935047621163287430f, -0.354522137752887430f, 0.934979625205665800f,
-    -0.354701424370233830f,
-  0.934911594871516090f, -0.354880697946222790f, 0.934843530163339540f,
-    -0.355059958474262860f,
-  0.934775431083638700f, -0.355239205947763310f, 0.934707297634917440f,
-    -0.355418440360133650f,
-  0.934639129819680780f, -0.355597661704783850f, 0.934570927640435030f,
-    -0.355776869975124640f,
-  0.934502691099687870f, -0.355956065164566850f, 0.934434420199948050f,
-    -0.356135247266522130f,
-  0.934366114943725790f, -0.356314416274402410f, 0.934297775333532530f,
-    -0.356493572181620090f,
-  0.934229401371880820f, -0.356672714981588260f, 0.934160993061284530f,
-    -0.356851844667720300f,
-  0.934092550404258980f, -0.357030961233429980f, 0.934024073403320390f,
-    -0.357210064672131960f,
-  0.933955562060986730f, -0.357389154977240940f, 0.933887016379776890f,
-    -0.357568232142172260f,
-  0.933818436362210960f, -0.357747296160341900f, 0.933749822010810580f,
-    -0.357926347025166010f,
-  0.933681173328098410f, -0.358105384730061590f, 0.933612490316598540f,
-    -0.358284409268445850f,
-  0.933543772978836170f, -0.358463420633736540f, 0.933475021317337950f,
-    -0.358642418819351990f,
-  0.933406235334631520f, -0.358821403818710860f, 0.933337415033246190f,
-    -0.359000375625232460f,
-  0.933268560415712050f, -0.359179334232336500f, 0.933199671484560730f,
-    -0.359358279633443130f,
-  0.933130748242325230f, -0.359537211821973070f, 0.933061790691539380f,
-    -0.359716130791347570f,
-  0.932992798834738960f, -0.359895036534988110f, 0.932923772674460140f,
-    -0.360073929046317020f,
-  0.932854712213241120f, -0.360252808318756890f, 0.932785617453621100f,
-    -0.360431674345730700f,
-  0.932716488398140250f, -0.360610527120662270f, 0.932647325049340450f,
-    -0.360789366636975580f,
-  0.932578127409764420f, -0.360968192888095230f, 0.932508895481956590f,
-    -0.361147005867446250f,
-  0.932439629268462360f, -0.361325805568454280f, 0.932370328771828460f,
-    -0.361504591984545260f,
-  0.932300993994602760f, -0.361683365109145840f, 0.932231624939334540f,
-    -0.361862124935682980f,
-  0.932162221608574430f, -0.362040871457584180f, 0.932092784004874050f,
-    -0.362219604668277460f,
-  0.932023312130786490f, -0.362398324561191310f, 0.931953805988866010f,
-    -0.362577031129754760f,
-  0.931884265581668150f, -0.362755724367397230f, 0.931814690911749730f,
-    -0.362934404267548640f,
-  0.931745081981668720f, -0.363113070823639470f, 0.931675438793984620f,
-    -0.363291724029100760f,
-  0.931605761351257830f, -0.363470363877363760f, 0.931536049656050300f,
-    -0.363648990361860550f,
-  0.931466303710925090f, -0.363827603476023500f, 0.931396523518446600f,
-    -0.364006203213285470f,
-  0.931326709081180430f, -0.364184789567079890f, 0.931256860401693420f,
-    -0.364363362530840620f,
-  0.931186977482553750f, -0.364541922098002120f, 0.931117060326330790f,
-    -0.364720468261999280f,
-  0.931047108935595280f, -0.364899001016267320f, 0.930977123312918930f,
-    -0.365077520354242180f,
-  0.930907103460875130f, -0.365256026269360320f, 0.930837049382038150f,
-    -0.365434518755058390f,
-  0.930766961078983710f, -0.365612997804773850f, 0.930696838554288860f,
-    -0.365791463411944570f,
-  0.930626681810531760f, -0.365969915570008740f, 0.930556490850291800f,
-    -0.366148354272405330f,
-  0.930486265676149780f, -0.366326779512573590f, 0.930416006290687550f,
-    -0.366505191283953370f,
-  0.930345712696488470f, -0.366683589579984930f, 0.930275384896137150f,
-    -0.366861974394109060f,
-  0.930205022892219070f, -0.367040345719767180f, 0.930134626687321390f,
-    -0.367218703550400980f,
-  0.930064196284032360f, -0.367397047879452710f, 0.929993731684941480f,
-    -0.367575378700365330f,
-  0.929923232892639670f, -0.367753696006581980f, 0.929852699909718750f,
-    -0.367931999791546450f,
-  0.929782132738772190f, -0.368110290048703050f, 0.929711531382394370f,
-    -0.368288566771496570f,
-  0.929640895843181330f, -0.368466829953372320f, 0.929570226123729860f,
-    -0.368645079587776040f,
-  0.929499522226638560f, -0.368823315668153910f, 0.929428784154506800f,
-    -0.369001538187952780f,
-  0.929358011909935500f, -0.369179747140620020f, 0.929287205495526790f,
-    -0.369357942519603130f,
-  0.929216364913884040f, -0.369536124318350650f, 0.929145490167611720f,
-    -0.369714292530311240f,
-  0.929074581259315860f, -0.369892447148934100f, 0.929003638191603360f,
-    -0.370070588167669080f,
-  0.928932660967082820f, -0.370248715579966360f, 0.928861649588363700f,
-    -0.370426829379276790f,
-  0.928790604058057020f, -0.370604929559051670f, 0.928719524378774810f,
-    -0.370783016112742560f,
-  0.928648410553130520f, -0.370961089033801980f, 0.928577262583738850f,
-    -0.371139148315682570f,
-  0.928506080473215590f, -0.371317193951837540f, 0.928434864224177980f,
-    -0.371495225935720760f,
-  0.928363613839244370f, -0.371673244260786520f, 0.928292329321034670f,
-    -0.371851248920489490f,
-  0.928221010672169440f, -0.372029239908285010f, 0.928149657895271150f,
-    -0.372207217217628840f,
-  0.928078270992963140f, -0.372385180841977360f, 0.928006849967869970f,
-    -0.372563130774787250f,
-  0.927935394822617890f, -0.372741067009515760f, 0.927863905559833780f,
-    -0.372918989539620830f,
-  0.927792382182146320f, -0.373096898358560640f, 0.927720824692185200f,
-    -0.373274793459793970f,
-  0.927649233092581180f, -0.373452674836780300f, 0.927577607385966730f,
-    -0.373630542482979280f,
-  0.927505947574975180f, -0.373808396391851210f, 0.927434253662241300f,
-    -0.373986236556857030f,
-  0.927362525650401110f, -0.374164062971457930f, 0.927290763542091720f,
-    -0.374341875629115920f,
-  0.927218967339951790f, -0.374519674523293210f, 0.927147137046620880f,
-    -0.374697459647452600f,
-  0.927075272664740100f, -0.374875230995057540f, 0.927003374196951670f,
-    -0.375052988559571920f,
-  0.926931441645899130f, -0.375230732334459920f, 0.926859475014227160f,
-    -0.375408462313186590f,
-  0.926787474304581750f, -0.375586178489217220f, 0.926715439519610330f,
-    -0.375763880856017700f,
-  0.926643370661961230f, -0.375941569407054420f, 0.926571267734284330f,
-    -0.376119244135794340f,
-  0.926499130739230510f, -0.376296905035704790f, 0.926426959679452210f,
-    -0.376474552100253770f,
-  0.926354754557602860f, -0.376652185322909560f, 0.926282515376337210f,
-    -0.376829804697141280f,
-  0.926210242138311380f, -0.377007410216418260f, 0.926137934846182560f,
-    -0.377185001874210450f,
-  0.926065593502609310f, -0.377362579663988340f, 0.925993218110251480f,
-    -0.377540143579222940f,
-  0.925920808671770070f, -0.377717693613385640f, 0.925848365189827270f,
-    -0.377895229759948490f,
-  0.925775887667086740f, -0.378072752012383990f, 0.925703376106213230f,
-    -0.378250260364165200f,
-  0.925630830509872720f, -0.378427754808765560f, 0.925558250880732740f,
-    -0.378605235339659120f,
-  0.925485637221461490f, -0.378782701950320540f, 0.925412989534729060f,
-    -0.378960154634224720f,
-  0.925340307823206310f, -0.379137593384847320f, 0.925267592089565660f,
-    -0.379315018195664430f,
-  0.925194842336480530f, -0.379492429060152630f, 0.925122058566625880f,
-    -0.379669825971788940f,
-  0.925049240782677580f, -0.379847208924051160f, 0.924976388987313160f,
-    -0.380024577910417270f,
-  0.924903503183210910f, -0.380201932924366050f, 0.924830583373050800f,
-    -0.380379273959376600f,
-  0.924757629559513910f, -0.380556601008928520f, 0.924684641745282420f,
-    -0.380733914066502140f,
-  0.924611619933039970f, -0.380911213125578070f, 0.924538564125471420f,
-    -0.381088498179637520f,
-  0.924465474325262600f, -0.381265769222162380f, 0.924392350535101050f,
-    -0.381443026246634730f,
-  0.924319192757675160f, -0.381620269246537360f, 0.924246000995674890f,
-    -0.381797498215353640f,
-  0.924172775251791200f, -0.381974713146567220f, 0.924099515528716280f,
-    -0.382151914033662610f,
-  0.924026221829143850f, -0.382329100870124510f, 0.923952894155768640f,
-    -0.382506273649438230f,
-  0.923879532511286740f, -0.382683432365089780f, 0.923806136898395410f,
-    -0.382860577010565420f,
-  0.923732707319793290f, -0.383037707579352020f, 0.923659243778179980f,
-    -0.383214824064937180f,
-  0.923585746276256670f, -0.383391926460808660f, 0.923512214816725630f,
-    -0.383569014760454910f,
-  0.923438649402290370f, -0.383746088957365010f, 0.923365050035655720f,
-    -0.383923149045028390f,
-  0.923291416719527640f, -0.384100195016935040f, 0.923217749456613500f,
-    -0.384277226866575510f,
-  0.923144048249621930f, -0.384454244587440820f, 0.923070313101262420f,
-    -0.384631248173022580f,
-  0.922996544014246250f, -0.384808237616812880f, 0.922922740991285680f,
-    -0.384985212912304200f,
-  0.922848904035094120f, -0.385162174052989860f, 0.922775033148386380f,
-    -0.385339121032363340f,
-  0.922701128333878630f, -0.385516053843918850f, 0.922627189594287910f,
-    -0.385692972481151140f,
-  0.922553216932332830f, -0.385869876937555310f, 0.922479210350733210f,
-    -0.386046767206627170f,
-  0.922405169852209880f, -0.386223643281862980f, 0.922331095439485440f,
-    -0.386400505156759440f,
-  0.922256987115283030f, -0.386577352824813920f, 0.922182844882327600f,
-    -0.386754186279524180f,
-  0.922108668743345180f, -0.386931005514388580f, 0.922034458701062820f,
-    -0.387107810522905990f,
-  0.921960214758209220f, -0.387284601298575840f, 0.921885936917513970f,
-    -0.387461377834897870f,
-  0.921811625181708120f, -0.387638140125372730f, 0.921737279553523910f,
-    -0.387814888163501180f,
-  0.921662900035694730f, -0.387991621942784860f, 0.921588486630955490f,
-    -0.388168341456725740f,
-  0.921514039342042010f, -0.388345046698826250f, 0.921439558171691430f,
-    -0.388521737662589570f,
-  0.921365043122642340f, -0.388698414341519190f, 0.921290494197634540f,
-    -0.388875076729119250f,
-  0.921215911399408730f, -0.389051724818894380f, 0.921141294730707270f,
-    -0.389228358604349730f,
-  0.921066644194273640f, -0.389404978078990940f, 0.920991959792852310f,
-    -0.389581583236324300f,
-  0.920917241529189520f, -0.389758174069856410f, 0.920842489406032190f,
-    -0.389934750573094730f,
-  0.920767703426128790f, -0.390111312739546910f, 0.920692883592229120f,
-    -0.390287860562721190f,
-  0.920618029907083970f, -0.390464394036126590f, 0.920543142373445480f,
-    -0.390640913153272430f,
-  0.920468220994067110f, -0.390817417907668500f, 0.920393265771703550f,
-    -0.390993908292825380f,
-  0.920318276709110590f, -0.391170384302253870f, 0.920243253809045370f,
-    -0.391346845929465560f,
-  0.920168197074266340f, -0.391523293167972410f, 0.920093106507533180f,
-    -0.391699726011286940f,
-  0.920017982111606570f, -0.391876144452922350f, 0.919942823889248640f,
-    -0.392052548486392090f,
-  0.919867631843222950f, -0.392228938105210310f, 0.919792405976293860f,
-    -0.392405313302891690f,
-  0.919717146291227360f, -0.392581674072951470f, 0.919641852790790470f,
-    -0.392758020408905280f,
-  0.919566525477751530f, -0.392934352304269490f, 0.919491164354880100f,
-    -0.393110669752560760f,
-  0.919415769424947070f, -0.393286972747296400f, 0.919340340690724340f,
-    -0.393463261281994330f,
-  0.919264878154985370f, -0.393639535350172880f, 0.919189381820504470f,
-    -0.393815794945351020f,
-  0.919113851690057770f, -0.393992040061048100f, 0.919038287766422050f,
-    -0.394168270690784080f,
-  0.918962690052375630f, -0.394344486828079600f, 0.918887058550697970f,
-    -0.394520688466455600f,
-  0.918811393264170050f, -0.394696875599433560f, 0.918735694195573550f,
-    -0.394873048220535760f,
-  0.918659961347691900f, -0.395049206323284770f, 0.918584194723309540f,
-    -0.395225349901203670f,
-  0.918508394325212250f, -0.395401478947816350f, 0.918432560156186910f,
-    -0.395577593456646840f,
-  0.918356692219021720f, -0.395753693421220080f, 0.918280790516506130f,
-    -0.395929778835061250f,
-  0.918204855051430900f, -0.396105849691696270f, 0.918128885826588030f,
-    -0.396281905984651520f,
-  0.918052882844770380f, -0.396457947707453910f, 0.917976846108772730f,
-    -0.396633974853630830f,
-  0.917900775621390500f, -0.396809987416710310f, 0.917824671385420570f,
-    -0.396985985390220900f,
-  0.917748533403661250f, -0.397161968767691610f, 0.917672361678911860f,
-    -0.397337937542652060f,
-  0.917596156213972950f, -0.397513891708632330f, 0.917519917011646260f,
-    -0.397689831259163180f,
-  0.917443644074735220f, -0.397865756187775750f, 0.917367337406043930f,
-    -0.398041666488001770f,
-  0.917290997008377910f, -0.398217562153373560f, 0.917214622884544250f,
-    -0.398393443177423980f,
-  0.917138215037350710f, -0.398569309553686300f, 0.917061773469606820f,
-    -0.398745161275694430f,
-  0.916985298184123000f, -0.398920998336982910f, 0.916908789183710990f,
-    -0.399096820731086540f,
-  0.916832246471183890f, -0.399272628451540990f, 0.916755670049355990f,
-    -0.399448421491882140f,
-  0.916679059921042700f, -0.399624199845646790f, 0.916602416089060790f,
-    -0.399799963506371980f,
-  0.916525738556228210f, -0.399975712467595330f, 0.916449027325364150f,
-    -0.400151446722855130f,
-  0.916372282399289140f, -0.400327166265690090f, 0.916295503780824800f,
-    -0.400502871089639500f,
-  0.916218691472794220f, -0.400678561188243240f, 0.916141845478021350f,
-    -0.400854236555041650f,
-  0.916064965799331720f, -0.401029897183575620f, 0.915988052439551950f,
-    -0.401205543067386710f,
-  0.915911105401509880f, -0.401381174200016790f, 0.915834124688034710f,
-    -0.401556790575008540f,
-  0.915757110301956720f, -0.401732392185905010f, 0.915680062246107650f,
-    -0.401907979026249700f,
-  0.915602980523320230f, -0.402083551089586990f, 0.915525865136428530f,
-    -0.402259108369461490f,
-  0.915448716088267830f, -0.402434650859418430f, 0.915371533381674760f,
-    -0.402610178553003680f,
-  0.915294317019487050f, -0.402785691443763530f, 0.915217067004543860f,
-    -0.402961189525244900f,
-  0.915139783339685260f, -0.403136672790995300f, 0.915062466027752760f,
-    -0.403312141234562550f,
-  0.914985115071589310f, -0.403487594849495310f, 0.914907730474038730f,
-    -0.403663033629342640f,
-  0.914830312237946200f, -0.403838457567654070f, 0.914752860366158220f,
-    -0.404013866657979890f,
-  0.914675374861522390f, -0.404189260893870690f, 0.914597855726887790f,
-    -0.404364640268877810f,
-  0.914520302965104450f, -0.404540004776553000f, 0.914442716579023870f,
-    -0.404715354410448650f,
-  0.914365096571498560f, -0.404890689164117580f, 0.914287442945382440f,
-    -0.405066009031113340f,
-  0.914209755703530690f, -0.405241314004989860f, 0.914132034848799460f,
-    -0.405416604079301630f,
-  0.914054280384046570f, -0.405591879247603870f, 0.913976492312130630f,
-    -0.405767139503452060f,
-  0.913898670635911680f, -0.405942384840402510f, 0.913820815358251100f,
-    -0.406117615252011840f,
-  0.913742926482011390f, -0.406292830731837360f, 0.913665004010056350f,
-    -0.406468031273437000f,
-  0.913587047945250810f, -0.406643216870369030f, 0.913509058290461140f,
-    -0.406818387516192310f,
-  0.913431035048554720f, -0.406993543204466510f, 0.913352978222400250f,
-    -0.407168683928751550f,
-  0.913274887814867760f, -0.407343809682607970f, 0.913196763828828200f,
-    -0.407518920459596920f,
-  0.913118606267154240f, -0.407694016253280110f, 0.913040415132719160f,
-    -0.407869097057219800f,
-  0.912962190428398210f, -0.408044162864978690f, 0.912883932157067200f,
-    -0.408219213670120100f,
-  0.912805640321603500f, -0.408394249466208000f, 0.912727314924885900f,
-    -0.408569270246806780f,
-  0.912648955969793900f, -0.408744276005481360f, 0.912570563459208730f,
-    -0.408919266735797430f,
-  0.912492137396012650f, -0.409094242431320980f, 0.912413677783089020f,
-    -0.409269203085618590f,
-  0.912335184623322750f, -0.409444148692257590f, 0.912256657919599760f,
-    -0.409619079244805670f,
-  0.912178097674807180f, -0.409793994736831150f, 0.912099503891833470f,
-    -0.409968895161902880f,
-  0.912020876573568340f, -0.410143780513590240f, 0.911942215722902570f,
-    -0.410318650785463260f,
-  0.911863521342728520f, -0.410493505971092410f, 0.911784793435939430f,
-    -0.410668346064048730f,
-  0.911706032005429880f, -0.410843171057903910f, 0.911627237054095650f,
-    -0.411017980946230210f,
-  0.911548408584833990f, -0.411192775722600160f, 0.911469546600543020f,
-    -0.411367555380587220f,
-  0.911390651104122430f, -0.411542319913765220f, 0.911311722098472780f,
-    -0.411717069315708560f,
-  0.911232759586496190f, -0.411891803579992170f, 0.911153763571095900f,
-    -0.412066522700191560f,
-  0.911074734055176360f, -0.412241226669882890f, 0.910995671041643140f,
-    -0.412415915482642730f,
-  0.910916574533403360f, -0.412590589132048210f, 0.910837444533365010f,
-    -0.412765247611677270f,
-  0.910758281044437570f, -0.412939890915108080f, 0.910679084069531570f,
-    -0.413114519035919450f,
-  0.910599853611558930f, -0.413289131967690960f, 0.910520589673432750f,
-    -0.413463729704002410f,
-  0.910441292258067250f, -0.413638312238434500f, 0.910361961368377990f,
-    -0.413812879564568300f,
-  0.910282597007281760f, -0.413987431675985400f, 0.910203199177696540f,
-    -0.414161968566268080f,
-  0.910123767882541680f, -0.414336490228999100f, 0.910044303124737500f,
-    -0.414510996657761750f,
-  0.909964804907205660f, -0.414685487846140010f, 0.909885273232869160f,
-    -0.414859963787718330f,
-  0.909805708104652220f, -0.415034424476081630f, 0.909726109525480160f,
-    -0.415208869904815590f,
-  0.909646477498279540f, -0.415383300067506230f, 0.909566812025978330f,
-    -0.415557714957740410f,
-  0.909487113111505430f, -0.415732114569105360f, 0.909407380757791260f,
-    -0.415906498895188770f,
-  0.909327614967767260f, -0.416080867929579210f, 0.909247815744366310f,
-    -0.416255221665865480f,
-  0.909167983090522380f, -0.416429560097637150f, 0.909088117009170580f,
-    -0.416603883218484350f,
-  0.909008217503247450f, -0.416778191021997650f, 0.908928284575690640f,
-    -0.416952483501768170f,
-  0.908848318229439120f, -0.417126760651387870f, 0.908768318467432890f,
-    -0.417301022464448890f,
-  0.908688285292613360f, -0.417475268934544290f, 0.908608218707923190f,
-    -0.417649500055267410f,
-  0.908528118716306120f, -0.417823715820212270f, 0.908447985320707250f,
-    -0.417997916222973550f,
-  0.908367818524072890f, -0.418172101257146320f, 0.908287618329350450f,
-    -0.418346270916326260f,
-  0.908207384739488700f, -0.418520425194109700f, 0.908127117757437600f,
-    -0.418694564084093560f,
-  0.908046817386148340f, -0.418868687579875050f, 0.907966483628573350f,
-    -0.419042795675052370f,
-  0.907886116487666260f, -0.419216888363223910f, 0.907805715966381930f,
-    -0.419390965637988890f,
-  0.907725282067676440f, -0.419565027492946880f, 0.907644814794507200f,
-    -0.419739073921698180f,
-  0.907564314149832630f, -0.419913104917843620f, 0.907483780136612570f,
-    -0.420087120474984530f,
-  0.907403212757808110f, -0.420261120586722880f, 0.907322612016381420f,
-    -0.420435105246661170f,
-  0.907241977915295820f, -0.420609074448402510f, 0.907161310457516250f,
-    -0.420783028185550520f,
-  0.907080609646008450f, -0.420956966451709440f, 0.906999875483739610f,
-    -0.421130889240483970f,
-  0.906919107973678140f, -0.421304796545479640f, 0.906838307118793430f,
-    -0.421478688360302280f,
-  0.906757472922056550f, -0.421652564678558330f, 0.906676605386439460f,
-    -0.421826425493854910f,
-  0.906595704514915330f, -0.422000270799799680f, 0.906514770310458800f,
-    -0.422174100590000770f,
-  0.906433802776045460f, -0.422347914858067050f, 0.906352801914652400f,
-    -0.422521713597607820f,
-  0.906271767729257660f, -0.422695496802232950f, 0.906190700222840650f,
-    -0.422869264465553060f,
-  0.906109599398381980f, -0.423043016581179040f, 0.906028465258863600f,
-    -0.423216753142722610f,
-  0.905947297807268460f, -0.423390474143796050f, 0.905866097046580940f,
-    -0.423564179578011960f,
-  0.905784862979786550f, -0.423737869438983840f, 0.905703595609872010f,
-    -0.423911543720325580f,
-  0.905622294939825270f, -0.424085202415651560f, 0.905540960972635590f,
-    -0.424258845518576950f,
-  0.905459593711293250f, -0.424432473022717420f, 0.905378193158790090f,
-    -0.424606084921689110f,
-  0.905296759318118820f, -0.424779681209108810f, 0.905215292192273590f,
-    -0.424953261878593890f,
-  0.905133791784249690f, -0.425126826923762360f, 0.905052258097043590f,
-    -0.425300376338232640f,
-  0.904970691133653250f, -0.425473910115623800f, 0.904889090897077470f,
-    -0.425647428249555590f,
-  0.904807457390316540f, -0.425820930733648240f, 0.904725790616371930f,
-    -0.425994417561522400f,
-  0.904644090578246240f, -0.426167888726799620f, 0.904562357278943300f,
-    -0.426341344223101830f,
-  0.904480590721468250f, -0.426514784044051520f, 0.904398790908827350f,
-    -0.426688208183271860f,
-  0.904316957844028320f, -0.426861616634386430f, 0.904235091530079750f,
-    -0.427035009391019680f,
-  0.904153191969991780f, -0.427208386446796320f, 0.904071259166775440f,
-    -0.427381747795341770f,
-  0.903989293123443340f, -0.427555093430282080f, 0.903907293843009050f,
-    -0.427728423345243800f,
-  0.903825261328487510f, -0.427901737533854080f, 0.903743195582894620f,
-    -0.428075035989740730f,
-  0.903661096609247980f, -0.428248318706531960f, 0.903578964410566070f,
-    -0.428421585677856650f,
-  0.903496798989868450f, -0.428594836897344400f, 0.903414600350176290f,
-    -0.428768072358625070f,
-  0.903332368494511820f, -0.428941292055329490f, 0.903250103425898400f,
-    -0.429114495981088750f,
-  0.903167805147360720f, -0.429287684129534610f, 0.903085473661924600f,
-    -0.429460856494299490f,
-  0.903003108972617150f, -0.429634013069016380f, 0.902920711082466740f,
-    -0.429807153847318710f,
-  0.902838279994502830f, -0.429980278822840620f, 0.902755815711756120f,
-    -0.430153387989216870f,
-  0.902673318237258830f, -0.430326481340082610f, 0.902590787574043870f,
-    -0.430499558869073820f,
-  0.902508223725145940f, -0.430672620569826800f, 0.902425626693600380f,
-    -0.430845666435978660f,
-  0.902342996482444200f, -0.431018696461167030f, 0.902260333094715540f,
-    -0.431191710639029950f,
-  0.902177636533453620f, -0.431364708963206330f, 0.902094906801698900f,
-    -0.431537691427335500f,
-  0.902012143902493180f, -0.431710658025057260f, 0.901929347838879460f,
-    -0.431883608750012250f,
-  0.901846518613901750f, -0.432056543595841500f, 0.901763656230605730f,
-    -0.432229462556186720f,
-  0.901680760692037730f, -0.432402365624690140f, 0.901597832001245660f,
-    -0.432575252794994650f,
-  0.901514870161278740f, -0.432748124060743700f, 0.901431875175186970f,
-    -0.432920979415581280f,
-  0.901348847046022030f, -0.433093818853151960f, 0.901265785776836580f,
-    -0.433266642367100940f,
-  0.901182691370684520f, -0.433439449951074090f, 0.901099563830620950f,
-    -0.433612241598717580f,
-  0.901016403159702330f, -0.433785017303678520f, 0.900933209360986200f,
-    -0.433957777059604420f,
-  0.900849982437531450f, -0.434130520860143310f, 0.900766722392397860f,
-    -0.434303248698943990f,
-  0.900683429228646970f, -0.434475960569655650f, 0.900600102949340900f,
-    -0.434648656465928320f,
-  0.900516743557543520f, -0.434821336381412290f, 0.900433351056319830f,
-    -0.434994000309758710f,
-  0.900349925448735600f, -0.435166648244619260f, 0.900266466737858480f,
-    -0.435339280179646070f,
-  0.900182974926756810f, -0.435511896108492000f, 0.900099450018500450f,
-    -0.435684496024810460f,
-  0.900015892016160280f, -0.435857079922255470f, 0.899932300922808510f,
-    -0.436029647794481560f,
-  0.899848676741518580f, -0.436202199635143950f, 0.899765019475365140f,
-    -0.436374735437898340f,
-  0.899681329127423930f, -0.436547255196401200f, 0.899597605700772180f,
-    -0.436719758904309360f,
-  0.899513849198487980f, -0.436892246555280360f, 0.899430059623650860f,
-    -0.437064718142972370f,
-  0.899346236979341570f, -0.437237173661044090f, 0.899262381268642000f,
-    -0.437409613103154790f,
-  0.899178492494635330f, -0.437582036462964400f, 0.899094570660405770f,
-    -0.437754443734133410f,
-  0.899010615769039070f, -0.437926834910322860f, 0.898926627823621870f,
-    -0.438099209985194470f,
-  0.898842606827242370f, -0.438271568952410430f, 0.898758552782989440f,
-    -0.438443911805633690f,
-  0.898674465693953820f, -0.438616238538527660f, 0.898590345563227030f,
-    -0.438788549144756290f,
-  0.898506192393901950f, -0.438960843617984320f, 0.898422006189072530f,
-    -0.439133121951876930f,
-  0.898337786951834310f, -0.439305384140099950f, 0.898253534685283570f,
-    -0.439477630176319800f,
-  0.898169249392518080f, -0.439649860054203480f, 0.898084931076636780f,
-    -0.439822073767418500f,
-  0.898000579740739880f, -0.439994271309633260f, 0.897916195387928660f,
-    -0.440166452674516320f,
-  0.897831778021305650f, -0.440338617855737250f, 0.897747327643974690f,
-    -0.440510766846965940f,
-  0.897662844259040860f, -0.440682899641872900f, 0.897578327869610230f,
-    -0.440855016234129430f,
-  0.897493778478790310f, -0.441027116617407230f, 0.897409196089689720f,
-    -0.441199200785378660f,
-  0.897324580705418320f, -0.441371268731716670f, 0.897239932329087160f,
-    -0.441543320450094870f,
-  0.897155250963808550f, -0.441715355934187310f, 0.897070536612695870f,
-    -0.441887375177668850f,
-  0.896985789278863970f, -0.442059378174214700f, 0.896901008965428790f,
-    -0.442231364917500980f,
-  0.896816195675507300f, -0.442403335401204080f, 0.896731349412217880f,
-    -0.442575289619001170f,
-  0.896646470178680150f, -0.442747227564570020f, 0.896561557978014960f,
-    -0.442919149231588980f,
-  0.896476612813344120f, -0.443091054613736880f, 0.896391634687790820f,
-    -0.443262943704693320f,
-  0.896306623604479550f, -0.443434816498138480f, 0.896221579566536030f,
-    -0.443606672987752970f,
-  0.896136502577086770f, -0.443778513167218220f, 0.896051392639260150f,
-    -0.443950337030216140f,
-  0.895966249756185220f, -0.444122144570429200f, 0.895881073930992370f,
-    -0.444293935781540580f,
-  0.895795865166813530f, -0.444465710657234000f, 0.895710623466781320f,
-    -0.444637469191193790f,
-  0.895625348834030110f, -0.444809211377104880f, 0.895540041271694950f,
-    -0.444980937208652730f,
-  0.895454700782912450f, -0.445152646679523640f, 0.895369327370820310f,
-    -0.445324339783404190f,
-  0.895283921038557580f, -0.445496016513981740f, 0.895198481789264200f,
-    -0.445667676864944300f,
-  0.895113009626081760f, -0.445839320829980290f, 0.895027504552152630f,
-    -0.446010948402778940f,
-  0.894941966570620750f, -0.446182559577030070f, 0.894856395684631050f,
-    -0.446354154346423840f,
-  0.894770791897329550f, -0.446525732704651350f, 0.894685155211863980f,
-    -0.446697294645404090f,
-  0.894599485631382700f, -0.446868840162374160f, 0.894513783159035620f,
-    -0.447040369249254440f,
-  0.894428047797973800f, -0.447211881899738320f, 0.894342279551349480f,
-    -0.447383378107519600f,
-  0.894256478422316040f, -0.447554857866293010f, 0.894170644414028270f,
-    -0.447726321169753580f,
-  0.894084777529641990f, -0.447897768011597310f, 0.893998877772314240f,
-    -0.448069198385520400f,
-  0.893912945145203250f, -0.448240612285219890f, 0.893826979651468620f,
-    -0.448412009704393430f,
-  0.893740981294271040f, -0.448583390636739240f, 0.893654950076772540f,
-    -0.448754755075955970f,
-  0.893568886002135910f, -0.448926103015743260f, 0.893482789073525850f,
-    -0.449097434449801050f,
-  0.893396659294107720f, -0.449268749371829920f, 0.893310496667048200f,
-    -0.449440047775531150f,
-  0.893224301195515320f, -0.449611329654606540f, 0.893138072882678320f,
-    -0.449782595002758690f,
-  0.893051811731707450f, -0.449953843813690520f, 0.892965517745774370f,
-    -0.450125076081105690f,
-  0.892879190928051680f, -0.450296291798708610f, 0.892792831281713610f,
-    -0.450467490960204110f,
-  0.892706438809935390f, -0.450638673559297600f, 0.892620013515893150f,
-    -0.450809839589695280f,
-  0.892533555402764580f, -0.450980989045103860f, 0.892447064473728680f,
-    -0.451152121919230600f,
-  0.892360540731965360f, -0.451323238205783520f, 0.892273984180655840f,
-    -0.451494337898471100f,
-  0.892187394822982480f, -0.451665420991002490f, 0.892100772662129060f,
-    -0.451836487477087490f,
-  0.892014117701280470f, -0.452007537350436420f, 0.891927429943622510f,
-    -0.452178570604760350f,
-  0.891840709392342720f, -0.452349587233770890f, 0.891753956050629460f,
-    -0.452520587231180050f,
-  0.891667169921672280f, -0.452691570590700920f, 0.891580351008662290f,
-    -0.452862537306046750f,
-  0.891493499314791380f, -0.453033487370931580f, 0.891406614843252900f,
-    -0.453204420779070190f,
-  0.891319697597241390f, -0.453375337524177750f, 0.891232747579952520f,
-    -0.453546237599970090f,
-  0.891145764794583180f, -0.453717121000163870f, 0.891058749244331590f,
-    -0.453887987718476050f,
-  0.890971700932396860f, -0.454058837748624430f, 0.890884619861979530f,
-    -0.454229671084327320f,
-  0.890797506036281490f, -0.454400487719303580f, 0.890710359458505630f,
-    -0.454571287647272950f,
-  0.890623180131855930f, -0.454742070861955450f, 0.890535968059537830f,
-    -0.454912837357071940f,
-  0.890448723244757880f, -0.455083587126343840f, 0.890361445690723840f,
-    -0.455254320163493100f,
-  0.890274135400644600f, -0.455425036462242360f, 0.890186792377730240f,
-    -0.455595736016314980f,
-  0.890099416625192320f, -0.455766418819434640f, 0.890012008146243260f,
-    -0.455937084865326030f,
-  0.889924566944096720f, -0.456107734147714110f, 0.889837093021967900f,
-    -0.456278366660324620f,
-  0.889749586383072780f, -0.456448982396883920f, 0.889662047030628900f,
-    -0.456619581351118910f,
-  0.889574474967854580f, -0.456790163516757160f, 0.889486870197969900f,
-    -0.456960728887526980f,
-  0.889399232724195520f, -0.457131277457156980f, 0.889311562549753850f,
-    -0.457301809219376630f,
-  0.889223859677868210f, -0.457472324167916060f, 0.889136124111763240f,
-    -0.457642822296505770f,
-  0.889048355854664570f, -0.457813303598877170f, 0.888960554909799310f,
-    -0.457983768068762120f,
-  0.888872721280395630f, -0.458154215699893060f, 0.888784854969682850f,
-    -0.458324646486003240f,
-  0.888696955980891600f, -0.458495060420826270f, 0.888609024317253860f,
-    -0.458665457498096560f,
-  0.888521059982002260f, -0.458835837711549120f, 0.888433062978371320f,
-    -0.459006201054919630f,
-  0.888345033309596350f, -0.459176547521944090f, 0.888256970978913870f,
-    -0.459346877106359630f,
-  0.888168875989561730f, -0.459517189801903480f, 0.888080748344778900f,
-    -0.459687485602313870f,
-  0.887992588047805560f, -0.459857764501329540f, 0.887904395101883240f,
-    -0.460028026492689650f,
-  0.887816169510254440f, -0.460198271570134320f, 0.887727911276163020f,
-    -0.460368499727404010f,
-  0.887639620402853930f, -0.460538710958240010f, 0.887551296893573370f,
-    -0.460708905256384080f,
-  0.887462940751568840f, -0.460879082615578690f, 0.887374551980088850f,
-    -0.461049243029566900f,
-  0.887286130582383150f, -0.461219386492092380f, 0.887197676561702900f,
-    -0.461389512996899450f,
-  0.887109189921300170f, -0.461559622537733080f, 0.887020670664428360f,
-    -0.461729715108338770f,
-  0.886932118794342190f, -0.461899790702462730f, 0.886843534314297410f,
-    -0.462069849313851750f,
-  0.886754917227550840f, -0.462239890936253340f, 0.886666267537361000f,
-    -0.462409915563415430f,
-  0.886577585246987040f, -0.462579923189086810f, 0.886488870359689600f,
-    -0.462749913807016740f,
-  0.886400122878730600f, -0.462919887410955080f, 0.886311342807372780f,
-    -0.463089843994652530f,
-  0.886222530148880640f, -0.463259783551860150f, 0.886133684906519340f,
-    -0.463429706076329830f,
-  0.886044807083555600f, -0.463599611561814010f, 0.885955896683257030f,
-    -0.463769500002065630f,
-  0.885866953708892790f, -0.463939371390838520f, 0.885777978163732940f,
-    -0.464109225721886950f,
-  0.885688970051048960f, -0.464279062988965760f, 0.885599929374113360f,
-    -0.464448883185830660f,
-  0.885510856136199950f, -0.464618686306237820f, 0.885421750340583680f,
-    -0.464788472343943990f,
-  0.885332611990540590f, -0.464958241292706690f, 0.885243441089348270f,
-    -0.465127993146283950f,
-  0.885154237640285110f, -0.465297727898434600f, 0.885065001646630930f,
-    -0.465467445542917800f,
-  0.884975733111666660f, -0.465637146073493660f, 0.884886432038674560f,
-    -0.465806829483922710f,
-  0.884797098430937790f, -0.465976495767966180f, 0.884707732291741040f,
-    -0.466146144919385890f,
-  0.884618333624369920f, -0.466315776931944430f, 0.884528902432111460f,
-    -0.466485391799404900f,
-  0.884439438718253810f, -0.466654989515530920f, 0.884349942486086120f,
-    -0.466824570074086950f,
-  0.884260413738899190f, -0.466994133468838000f, 0.884170852479984500f,
-    -0.467163679693549770f,
-  0.884081258712634990f, -0.467333208741988420f, 0.883991632440144890f,
-    -0.467502720607920920f,
-  0.883901973665809470f, -0.467672215285114770f, 0.883812282392925090f,
-    -0.467841692767338170f,
-  0.883722558624789660f, -0.468011153048359830f, 0.883632802364701870f,
-    -0.468180596121949290f,
-  0.883543013615961880f, -0.468350021981876530f, 0.883453192381870920f,
-    -0.468519430621912310f,
-  0.883363338665731580f, -0.468688822035827900f, 0.883273452470847430f,
-    -0.468858196217395330f,
-  0.883183533800523390f, -0.469027553160387130f, 0.883093582658065370f,
-    -0.469196892858576580f,
-  0.883003599046780830f, -0.469366215305737520f, 0.882913582969978020f,
-    -0.469535520495644450f,
-  0.882823534430966620f, -0.469704808422072460f, 0.882733453433057650f,
-    -0.469874079078797360f,
-  0.882643339979562790f, -0.470043332459595620f, 0.882553194073795510f,
-    -0.470212568558244170f,
-  0.882463015719070150f, -0.470381787368520650f, 0.882372804918702290f,
-    -0.470550988884203550f,
-  0.882282561676008710f, -0.470720173099071600f, 0.882192285994307430f,
-    -0.470889340006904520f,
-  0.882101977876917580f, -0.471058489601482500f, 0.882011637327159590f,
-    -0.471227621876586340f,
-  0.881921264348355050f, -0.471396736825997640f, 0.881830858943826620f,
-    -0.471565834443498420f,
-  0.881740421116898320f, -0.471734914722871430f, 0.881649950870895260f,
-    -0.471903977657900210f,
-  0.881559448209143780f, -0.472073023242368660f, 0.881468913134971440f,
-    -0.472242051470061490f,
-  0.881378345651706920f, -0.472411062334764040f, 0.881287745762680100f,
-    -0.472580055830262250f,
-  0.881197113471222090f, -0.472749031950342790f, 0.881106448780665130f,
-    -0.472917990688792760f,
-  0.881015751694342870f, -0.473086932039400050f, 0.880925022215589880f,
-    -0.473255855995953320f,
-  0.880834260347742040f, -0.473424762552241530f, 0.880743466094136340f,
-    -0.473593651702054530f,
-  0.880652639458111010f, -0.473762523439182850f, 0.880561780443005700f,
-    -0.473931377757417450f,
-  0.880470889052160750f, -0.474100214650549970f, 0.880379965288918150f,
-    -0.474269034112372980f,
-  0.880289009156621010f, -0.474437836136679230f, 0.880198020658613190f,
-    -0.474606620717262560f,
-  0.880106999798240360f, -0.474775387847917120f, 0.880015946578849070f,
-    -0.474944137522437800f,
-  0.879924861003786860f, -0.475112869734620300f, 0.879833743076402940f,
-    -0.475281584478260740f,
-  0.879742592800047410f, -0.475450281747155870f, 0.879651410178071580f,
-    -0.475618961535103300f,
-  0.879560195213827890f, -0.475787623835901120f, 0.879468947910670210f,
-    -0.475956268643348060f,
-  0.879377668271953290f, -0.476124895951243580f, 0.879286356301033250f,
-    -0.476293505753387690f,
-  0.879195012001267480f, -0.476462098043581190f, 0.879103635376014330f,
-    -0.476630672815625320f,
-  0.879012226428633530f, -0.476799230063322090f, 0.878920785162485840f,
-    -0.476967769780474170f,
-  0.878829311580933360f, -0.477136291960884810f, 0.878737805687339390f,
-    -0.477304796598357890f,
-  0.878646267485068130f, -0.477473283686698060f, 0.878554696977485450f,
-    -0.477641753219710470f,
-  0.878463094167957870f, -0.477810205191200990f, 0.878371459059853480f,
-    -0.477978639594976160f,
-  0.878279791656541580f, -0.478147056424843010f, 0.878188091961392250f,
-    -0.478315455674609480f,
-  0.878096359977777130f, -0.478483837338083970f, 0.878004595709069080f,
-    -0.478652201409075500f,
-  0.877912799158641840f, -0.478820547881393890f, 0.877820970329870500f,
-    -0.478988876748849490f,
-  0.877729109226131570f, -0.479157188005253310f, 0.877637215850802230f,
-    -0.479325481644417070f,
-  0.877545290207261350f, -0.479493757660153010f, 0.877453332298888560f,
-    -0.479662016046274180f,
-  0.877361342129065140f, -0.479830256796594190f, 0.877269319701173170f,
-    -0.479998479904927280f,
-  0.877177265018595940f, -0.480166685365088390f, 0.877085178084718420f,
-    -0.480334873170893020f,
-  0.876993058902925890f, -0.480503043316157510f, 0.876900907476605650f,
-    -0.480671195794698640f,
-  0.876808723809145650f, -0.480839330600333960f, 0.876716507903935400f,
-    -0.481007447726881590f,
-  0.876624259764365310f, -0.481175547168160300f, 0.876531979393827100f,
-    -0.481343628917989710f,
-  0.876439666795713610f, -0.481511692970189860f, 0.876347321973419020f,
-    -0.481679739318581490f,
-  0.876254944930338510f, -0.481847767956986030f, 0.876162535669868460f,
-    -0.482015778879225590f,
-  0.876070094195406600f, -0.482183772079122720f, 0.875977620510351770f,
-    -0.482351747550500980f,
-  0.875885114618103810f, -0.482519705287184350f, 0.875792576522063880f,
-    -0.482687645282997460f,
-  0.875700006225634600f, -0.482855567531765670f, 0.875607403732219350f,
-    -0.483023472027314880f,
-  0.875514769045222850f, -0.483191358763471860f, 0.875422102168050940f,
-    -0.483359227734063810f,
-  0.875329403104110890f, -0.483527078932918740f, 0.875236671856810870f,
-    -0.483694912353865140f,
-  0.875143908429560360f, -0.483862727990732270f, 0.875051112825769970f,
-    -0.484030525837350010f,
-  0.874958285048851650f, -0.484198305887549030f, 0.874865425102218320f,
-    -0.484366068135160420f,
-  0.874772532989284150f, -0.484533812574016180f, 0.874679608713464510f,
-    -0.484701539197948670f,
-  0.874586652278176110f, -0.484869248000791060f, 0.874493663686836560f,
-    -0.485036938976377290f,
-  0.874400642942864790f, -0.485204612118541820f, 0.874307590049680950f,
-    -0.485372267421119770f,
-  0.874214505010706300f, -0.485539904877946960f, 0.874121387829363330f,
-    -0.485707524482859750f,
-  0.874028238509075740f, -0.485875126229695250f, 0.873935057053268240f,
-    -0.486042710112291330f,
-  0.873841843465366860f, -0.486210276124486420f, 0.873748597748798870f,
-    -0.486377824260119440f,
-  0.873655319906992630f, -0.486545354513030270f, 0.873562009943377850f,
-    -0.486712866877059170f,
-  0.873468667861384880f, -0.486880361346047340f, 0.873375293664446000f,
-    -0.487047837913836380f,
-  0.873281887355994210f, -0.487215296574268760f, 0.873188448939463790f,
-    -0.487382737321187360f,
-  0.873094978418290090f, -0.487550160148436000f, 0.873001475795909920f,
-    -0.487717565049858800f,
-  0.872907941075761080f, -0.487884952019301040f, 0.872814374261282390f,
-    -0.488052321050608250f,
-  0.872720775355914300f, -0.488219672137626790f, 0.872627144363097960f,
-    -0.488387005274203530f,
-  0.872533481286276170f, -0.488554320454186180f, 0.872439786128892280f,
-    -0.488721617671423080f,
-  0.872346058894391540f, -0.488888896919763170f, 0.872252299586219860f,
-    -0.489056158193056030f,
-  0.872158508207824480f, -0.489223401485151980f, 0.872064684762653860f,
-    -0.489390626789901920f,
-  0.871970829254157810f, -0.489557834101157440f, 0.871876941685786890f,
-    -0.489725023412770910f,
-  0.871783022060993120f, -0.489892194718595190f, 0.871689070383229740f,
-    -0.490059348012483850f,
-  0.871595086655950980f, -0.490226483288291160f, 0.871501070882612530f,
-    -0.490393600539871970f,
-  0.871407023066670950f, -0.490560699761082020f, 0.871312943211584030f,
-    -0.490727780945777400f,
-  0.871218831320811020f, -0.490894844087815090f, 0.871124687397811900f,
-    -0.491061889181052650f,
-  0.871030511446048260f, -0.491228916219348280f, 0.870936303468982760f,
-    -0.491395925196560780f,
-  0.870842063470078980f, -0.491562916106549900f, 0.870747791452801790f,
-    -0.491729888943175760f,
-  0.870653487420617430f, -0.491896843700299290f, 0.870559151376993250f,
-    -0.492063780371782000f,
-  0.870464783325397670f, -0.492230698951486020f, 0.870370383269300270f,
-    -0.492397599433274380f,
-  0.870275951212171940f, -0.492564481811010590f, 0.870181487157484560f,
-    -0.492731346078558840f,
-  0.870086991108711460f, -0.492898192229784040f, 0.869992463069326870f,
-    -0.493065020258551700f,
-  0.869897903042806340f, -0.493231830158727900f, 0.869803311032626650f,
-    -0.493398621924179770f,
-  0.869708687042265670f, -0.493565395548774770f, 0.869614031075202300f,
-    -0.493732151026381020f,
-  0.869519343134916860f, -0.493898888350867480f, 0.869424623224890890f,
-    -0.494065607516103570f,
-  0.869329871348606840f, -0.494232308515959670f, 0.869235087509548370f,
-    -0.494398991344306650f,
-  0.869140271711200560f, -0.494565655995015950f, 0.869045423957049530f,
-    -0.494732302461959870f,
-  0.868950544250582380f, -0.494898930739011260f, 0.868855632595287860f,
-    -0.495065540820043560f,
-  0.868760688994655310f, -0.495232132698931180f, 0.868665713452175690f,
-    -0.495398706369549020f,
-  0.868570705971340900f, -0.495565261825772540f, 0.868475666555644120f,
-    -0.495731799061477960f,
-  0.868380595208579800f, -0.495898318070542190f, 0.868285491933643350f,
-    -0.496064818846842890f,
-  0.868190356734331310f, -0.496231301384258250f, 0.868095189614141670f,
-    -0.496397765676667160f,
-  0.867999990576573510f, -0.496564211717949290f, 0.867904759625126920f,
-    -0.496730639501984760f,
-  0.867809496763303320f, -0.496897049022654470f, 0.867714201994605140f,
-    -0.497063440273840250f,
-  0.867618875322536230f, -0.497229813249424220f, 0.867523516750601460f,
-    -0.497396167943289280f,
-  0.867428126282306920f, -0.497562504349319150f, 0.867332703921159800f,
-    -0.497728822461397940f,
-  0.867237249670668400f, -0.497895122273410870f, 0.867141763534342470f,
-    -0.498061403779243410f,
-  0.867046245515692650f, -0.498227666972781870f, 0.866950695618230900f,
-    -0.498393911847913210f,
-  0.866855113845470430f, -0.498560138398525140f, 0.866759500200925400f,
-    -0.498726346618505900f,
-  0.866663854688111130f, -0.498892536501744590f, 0.866568177310544470f,
-    -0.499058708042130870f,
-  0.866472468071743050f, -0.499224861233555080f, 0.866376726975225830f,
-    -0.499390996069908170f,
-  0.866280954024512990f, -0.499557112545081840f, 0.866185149223125840f,
-    -0.499723210652968540f,
-  0.866089312574586770f, -0.499889290387461330f, 0.865993444082419520f,
-    -0.500055351742453860f,
-  0.865897543750148820f, -0.500221394711840680f, 0.865801611581300760f,
-    -0.500387419289516580f,
-  0.865705647579402380f, -0.500553425469377420f, 0.865609651747981990f,
-    -0.500719413245319880f,
-  0.865513624090569090f, -0.500885382611240710f, 0.865417564610694410f,
-    -0.501051333561038040f,
-  0.865321473311889800f, -0.501217266088609950f, 0.865225350197688200f,
-    -0.501383180187855770f,
-  0.865129195271623800f, -0.501549075852675390f, 0.865033008537231860f,
-    -0.501714953076969120f,
-  0.864936789998049020f, -0.501880811854638290f, 0.864840539657612870f,
-    -0.502046652179584660f,
-  0.864744257519462380f, -0.502212474045710790f, 0.864647943587137480f,
-    -0.502378277446919760f,
-  0.864551597864179340f, -0.502544062377115690f, 0.864455220354130360f,
-    -0.502709828830202990f,
-  0.864358811060534030f, -0.502875576800086990f, 0.864262369986934950f,
-    -0.503041306280673450f,
-  0.864165897136879300f, -0.503207017265868920f, 0.864069392513913790f,
-    -0.503372709749581040f,
-  0.863972856121586810f, -0.503538383725717580f, 0.863876287963447510f,
-    -0.503704039188187070f,
-  0.863779688043046720f, -0.503869676130898950f, 0.863683056363935830f,
-    -0.504035294547763190f,
-  0.863586392929668100f, -0.504200894432690340f, 0.863489697743797140f,
-    -0.504366475779592040f,
-  0.863392970809878420f, -0.504532038582380270f, 0.863296212131468230f,
-    -0.504697582834967570f,
-  0.863199421712124160f, -0.504863108531267590f, 0.863102599555404910f,
-    -0.505028615665194080f,
-  0.863005745664870320f, -0.505194104230662240f, 0.862908860044081400f,
-    -0.505359574221587280f,
-  0.862811942696600330f, -0.505525025631885390f, 0.862714993625990690f,
-    -0.505690458455473450f,
-  0.862618012835816740f, -0.505855872686268860f, 0.862521000329644520f,
-    -0.506021268318189720f,
-  0.862423956111040610f, -0.506186645345155230f, 0.862326880183573060f,
-    -0.506352003761084800f,
-  0.862229772550811240f, -0.506517343559898530f, 0.862132633216325380f,
-    -0.506682664735517600f,
-  0.862035462183687210f, -0.506847967281863210f, 0.861938259456469290f,
-    -0.507013251192858230f,
-  0.861841025038245330f, -0.507178516462425180f, 0.861743758932590700f,
-    -0.507343763084487920f,
-  0.861646461143081300f, -0.507508991052970870f, 0.861549131673294720f,
-    -0.507674200361798890f,
-  0.861451770526809320f, -0.507839391004897720f, 0.861354377707204910f,
-    -0.508004562976194010f,
-  0.861256953218062170f, -0.508169716269614600f, 0.861159497062963350f,
-    -0.508334850879087360f,
-  0.861062009245491480f, -0.508499966798540930f, 0.860964489769231010f,
-    -0.508665064021904030f,
-  0.860866938637767310f, -0.508830142543106990f, 0.860769355854687170f,
-    -0.508995202356080090f,
-  0.860671741423578380f, -0.509160243454754640f, 0.860574095348029980f,
-    -0.509325265833062480f,
-  0.860476417631632070f, -0.509490269484936360f, 0.860378708277976130f,
-    -0.509655254404309250f,
-  0.860280967290654510f, -0.509820220585115450f, 0.860183194673260990f,
-    -0.509985168021289460f,
-  0.860085390429390140f, -0.510150096706766810f, 0.859987554562638200f,
-    -0.510315006635483240f,
-  0.859889687076602290f, -0.510479897801375700f, 0.859791787974880650f,
-    -0.510644770198381610f,
-  0.859693857261072610f, -0.510809623820439040f, 0.859595894938779080f,
-    -0.510974458661486830f,
-  0.859497901011601730f, -0.511139274715464390f, 0.859399875483143450f,
-    -0.511304071976312000f,
-  0.859301818357008470f, -0.511468850437970300f, 0.859203729636801920f,
-    -0.511633610094381240f,
-  0.859105609326130450f, -0.511798350939486890f, 0.859007457428601520f,
-    -0.511963072967230200f,
-  0.858909273947823900f, -0.512127776171554690f, 0.858811058887407610f,
-    -0.512292460546404870f,
-  0.858712812250963520f, -0.512457126085725690f, 0.858614534042104190f,
-    -0.512621772783462990f,
-  0.858516224264442740f, -0.512786400633562960f, 0.858417882921593930f,
-    -0.512951009629972980f,
-  0.858319510017173440f, -0.513115599766640560f, 0.858221105554798250f,
-    -0.513280171037514220f,
-  0.858122669538086140f, -0.513444723436543460f, 0.858024201970656540f,
-    -0.513609256957677780f,
-  0.857925702856129790f, -0.513773771594868030f, 0.857827172198127430f,
-    -0.513938267342065380f,
-  0.857728610000272120f, -0.514102744193221660f, 0.857630016266187620f,
-    -0.514267202142289710f,
-  0.857531390999499150f, -0.514431641183222820f, 0.857432734203832700f,
-    -0.514596061309975040f,
-  0.857334045882815590f, -0.514760462516501200f, 0.857235326040076460f,
-    -0.514924844796756490f,
-  0.857136574679244980f, -0.515089208144697160f, 0.857037791803951680f,
-    -0.515253552554280180f,
-  0.856938977417828760f, -0.515417878019462930f, 0.856840131524509220f,
-    -0.515582184534203790f,
-  0.856741254127627470f, -0.515746472092461380f, 0.856642345230818840f,
-    -0.515910740688195650f,
-  0.856543404837719960f, -0.516074990315366630f, 0.856444432951968590f,
-    -0.516239220967935510f,
-  0.856345429577203610f, -0.516403432639863990f, 0.856246394717065210f,
-    -0.516567625325114350f,
-  0.856147328375194470f, -0.516731799017649870f, 0.856048230555233940f,
-    -0.516895953711434150f,
-  0.855949101260826910f, -0.517060089400431910f, 0.855849940495618240f,
-    -0.517224206078608310f,
-  0.855750748263253920f, -0.517388303739929060f, 0.855651524567380690f,
-    -0.517552382378360880f,
-  0.855552269411646860f, -0.517716441987871150f, 0.855452982799701830f,
-    -0.517880482562427690f,
-  0.855353664735196030f, -0.518044504095999340f, 0.855254315221780970f,
-    -0.518208506582555460f,
-  0.855154934263109620f, -0.518372490016066110f, 0.855055521862835950f,
-    -0.518536454390502220f,
-  0.854956078024614930f, -0.518700399699834950f, 0.854856602752102850f,
-    -0.518864325938036890f,
-  0.854757096048957220f, -0.519028233099080860f, 0.854657557918836460f,
-    -0.519192121176940250f,
-  0.854557988365400530f, -0.519355990165589640f, 0.854458387392310170f,
-    -0.519519840059003760f,
-  0.854358755003227440f, -0.519683670851158410f, 0.854259091201815530f,
-    -0.519847482536030190f,
-  0.854159395991738850f, -0.520011275107596040f, 0.854059669376662780f,
-    -0.520175048559833760f,
-  0.853959911360254180f, -0.520338802886721960f, 0.853860121946180770f,
-    -0.520502538082239670f,
-  0.853760301138111410f, -0.520666254140367160f, 0.853660448939716380f,
-    -0.520829951055084670f,
-  0.853560565354666840f, -0.520993628820373920f, 0.853460650386635320f,
-    -0.521157287430216610f,
-  0.853360704039295430f, -0.521320926878595660f, 0.853260726316321880f,
-    -0.521484547159494330f,
-  0.853160717221390420f, -0.521648148266897090f, 0.853060676758178320f,
-    -0.521811730194788550f,
-  0.852960604930363630f, -0.521975292937154390f, 0.852860501741625750f,
-    -0.522138836487980760f,
-  0.852760367195645300f, -0.522302360841254590f, 0.852660201296103760f,
-    -0.522465865990963780f,
-  0.852560004046684080f, -0.522629351931096610f, 0.852459775451070100f,
-    -0.522792818655642090f,
-  0.852359515512947090f, -0.522956266158590140f, 0.852259224236001090f,
-    -0.523119694433931250f,
-  0.852158901623919830f, -0.523283103475656430f, 0.852058547680391690f,
-    -0.523446493277757830f,
-  0.851958162409106380f, -0.523609863834227920f, 0.851857745813754840f,
-    -0.523773215139060170f,
-  0.851757297898029120f, -0.523936547186248600f, 0.851656818665622370f,
-    -0.524099859969787700f,
-  0.851556308120228980f, -0.524263153483673360f, 0.851455766265544310f,
-    -0.524426427721901400f,
-  0.851355193105265200f, -0.524589682678468950f, 0.851254588643089120f,
-    -0.524752918347373360f,
-  0.851153952882715340f, -0.524916134722613000f, 0.851053285827843790f,
-    -0.525079331798186780f,
-  0.850952587482175730f, -0.525242509568094710f, 0.850851857849413530f,
-    -0.525405668026336930f,
-  0.850751096933260790f, -0.525568807166914680f, 0.850650304737422090f,
-    -0.525731926983829760f,
-  0.850549481265603480f, -0.525895027471084630f, 0.850448626521511760f,
-    -0.526058108622682760f,
-  0.850347740508854980f, -0.526221170432628060f, 0.850246823231342710f,
-    -0.526384212894925100f,
-  0.850145874692685210f, -0.526547236003579440f, 0.850044894896594180f,
-    -0.526710239752597010f,
-  0.849943883846782210f, -0.526873224135984590f, 0.849842841546963320f,
-    -0.527036189147750080f,
-  0.849741768000852550f, -0.527199134781901280f, 0.849640663212165910f,
-    -0.527362061032447540f,
-  0.849539527184620890f, -0.527524967893398200f, 0.849438359921936060f,
-    -0.527687855358763720f,
-  0.849337161427830780f, -0.527850723422555230f, 0.849235931706025960f,
-    -0.528013572078784630f,
-  0.849134670760243630f, -0.528176401321464370f, 0.849033378594206800f,
-    -0.528339211144607690f,
-  0.848932055211639610f, -0.528502001542228480f, 0.848830700616267530f,
-    -0.528664772508341320f,
-  0.848729314811817130f, -0.528827524036961870f, 0.848627897802015860f,
-    -0.528990256122106040f,
-  0.848526449590592650f, -0.529152968757790610f, 0.848424970181277600f,
-    -0.529315661938033260f,
-  0.848323459577801640f, -0.529478335656851980f, 0.848221917783896990f,
-    -0.529640989908265910f,
-  0.848120344803297230f, -0.529803624686294610f, 0.848018740639736810f,
-    -0.529966239984958620f,
-  0.847917105296951410f, -0.530128835798278960f, 0.847815438778677930f,
-    -0.530291412120277310f,
-  0.847713741088654380f, -0.530453968944976320f, 0.847612012230619660f,
-    -0.530616506266399330f,
-  0.847510252208314330f, -0.530779024078570140f, 0.847408461025479730f,
-    -0.530941522375513620f,
-  0.847306638685858320f, -0.531104001151255000f, 0.847204785193194090f,
-    -0.531266460399820390f,
-  0.847102900551231500f, -0.531428900115236800f, 0.847000984763716880f,
-    -0.531591320291531670f,
-  0.846899037834397240f, -0.531753720922733320f, 0.846797059767020910f,
-    -0.531916102002870650f,
-  0.846695050565337450f, -0.532078463525973540f, 0.846593010233097190f,
-    -0.532240805486072220f,
-  0.846490938774052130f, -0.532403127877197900f, 0.846388836191954930f,
-    -0.532565430693382580f,
-  0.846286702490559710f, -0.532727713928658810f, 0.846184537673621560f,
-    -0.532889977577059800f,
-  0.846082341744897050f, -0.533052221632619450f, 0.845980114708143270f,
-    -0.533214446089372960f,
-  0.845877856567119000f, -0.533376650941355330f, 0.845775567325584010f,
-    -0.533538836182603120f,
-  0.845673246987299070f, -0.533701001807152960f, 0.845570895556026270f,
-    -0.533863147809042650f,
-  0.845468513035528830f, -0.534025274182310380f, 0.845366099429570970f,
-    -0.534187380920995380f,
-  0.845263654741918220f, -0.534349468019137520f, 0.845161178976337140f,
-    -0.534511535470777120f,
-  0.845058672136595470f, -0.534673583269955510f, 0.844956134226462210f,
-    -0.534835611410714560f,
-  0.844853565249707120f, -0.534997619887097150f, 0.844750965210101510f,
-    -0.535159608693146600f,
-  0.844648334111417820f, -0.535321577822907120f, 0.844545671957429240f,
-    -0.535483527270423370f,
-  0.844442978751910660f, -0.535645457029741090f, 0.844340254498637590f,
-    -0.535807367094906390f,
-  0.844237499201387020f, -0.535969257459966710f, 0.844134712863936930f,
-    -0.536131128118969460f,
-  0.844031895490066410f, -0.536292979065963180f, 0.843929047083555870f,
-    -0.536454810294997090f,
-  0.843826167648186740f, -0.536616621800121040f, 0.843723257187741660f,
-    -0.536778413575385920f,
-  0.843620315706004150f, -0.536940185614842910f, 0.843517343206759200f,
-    -0.537101937912544130f,
-  0.843414339693792760f, -0.537263670462542530f, 0.843311305170892140f,
-    -0.537425383258891550f,
-  0.843208239641845440f, -0.537587076295645390f, 0.843105143110442160f,
-    -0.537748749566859360f,
-  0.843002015580472940f, -0.537910403066588880f, 0.842898857055729310f,
-    -0.538072036788890600f,
-  0.842795667540004120f, -0.538233650727821700f, 0.842692447037091670f,
-    -0.538395244877439950f,
-  0.842589195550786710f, -0.538556819231804100f, 0.842485913084885630f,
-    -0.538718373784973560f,
-  0.842382599643185850f, -0.538879908531008420f, 0.842279255229485990f,
-    -0.539041423463969440f,
-  0.842175879847585570f, -0.539202918577918240f, 0.842072473501285560f,
-    -0.539364393866917040f,
-  0.841969036194387680f, -0.539525849325028890f, 0.841865567930695340f,
-    -0.539687284946317570f,
-  0.841762068714012490f, -0.539848700724847590f, 0.841658538548144760f,
-    -0.540010096654684020f,
-  0.841554977436898440f, -0.540171472729892850f, 0.841451385384081260f,
-    -0.540332828944540710f,
-  0.841347762393501950f, -0.540494165292695230f, 0.841244108468970580f,
-    -0.540655481768424150f,
-  0.841140423614298080f, -0.540816778365796670f, 0.841036707833296650f,
-    -0.540978055078882080f,
-  0.840932961129779780f, -0.541139311901750800f, 0.840829183507561640f,
-    -0.541300548828474120f,
-  0.840725374970458070f, -0.541461765853123440f, 0.840621535522285690f,
-    -0.541622962969771530f,
-  0.840517665166862550f, -0.541784140172491550f, 0.840413763908007480f,
-    -0.541945297455357360f,
-  0.840309831749540770f, -0.542106434812443920f, 0.840205868695283580f,
-    -0.542267552237826520f,
-  0.840101874749058400f, -0.542428649725581250f, 0.839997849914688840f,
-    -0.542589727269785270f,
-  0.839893794195999520f, -0.542750784864515890f, 0.839789707596816370f,
-    -0.542911822503851730f,
-  0.839685590120966110f, -0.543072840181871740f, 0.839581441772277120f,
-    -0.543233837892655890f,
-  0.839477262554578550f, -0.543394815630284800f, 0.839373052471700690f,
-    -0.543555773388839540f,
-  0.839268811527475230f, -0.543716711162402280f, 0.839164539725734680f,
-    -0.543877628945055980f,
-  0.839060237070312740f, -0.544038526730883820f, 0.838955903565044460f,
-    -0.544199404513970310f,
-  0.838851539213765760f, -0.544360262288400400f, 0.838747144020313920f,
-    -0.544521100048259600f,
-  0.838642717988527300f, -0.544681917787634530f, 0.838538261122245280f,
-    -0.544842715500612360f,
-  0.838433773425308340f, -0.545003493181281160f, 0.838329254901558300f,
-    -0.545164250823729320f,
-  0.838224705554838080f, -0.545324988422046460f, 0.838120125388991500f,
-    -0.545485705970322530f,
-  0.838015514407863820f, -0.545646403462648590f, 0.837910872615301170f,
-    -0.545807080893116140f,
-  0.837806200015150940f, -0.545967738255817570f, 0.837701496611261700f,
-    -0.546128375544845950f,
-  0.837596762407483040f, -0.546288992754295210f, 0.837491997407665890f,
-    -0.546449589878259650f,
-  0.837387201615661940f, -0.546610166910834860f, 0.837282375035324320f,
-    -0.546770723846116800f,
-  0.837177517670507300f, -0.546931260678202190f, 0.837072629525066000f,
-    -0.547091777401188530f,
-  0.836967710602857020f, -0.547252274009174090f, 0.836862760907737920f,
-    -0.547412750496257930f,
-  0.836757780443567190f, -0.547573206856539760f, 0.836652769214204950f,
-    -0.547733643084120090f,
-  0.836547727223512010f, -0.547894059173100190f, 0.836442654475350380f,
-    -0.548054455117581880f,
-  0.836337550973583530f, -0.548214830911667780f, 0.836232416722075600f,
-    -0.548375186549461600f,
-  0.836127251724692270f, -0.548535522025067390f, 0.836022055985299880f,
-    -0.548695837332590090f,
-  0.835916829507766360f, -0.548856132466135290f, 0.835811572295960700f,
-    -0.549016407419809390f,
-  0.835706284353752600f, -0.549176662187719660f, 0.835600965685013410f,
-    -0.549336896763974010f,
-  0.835495616293615350f, -0.549497111142680960f, 0.835390236183431890f,
-    -0.549657305317949870f,
-  0.835284825358337370f, -0.549817479283890910f, 0.835179383822207690f,
-    -0.549977633034614890f,
-  0.835073911578919410f, -0.550137766564233630f, 0.834968408632350450f,
-    -0.550297879866859190f,
-  0.834862874986380010f, -0.550457972936604810f, 0.834757310644888230f,
-    -0.550618045767584330f,
-  0.834651715611756440f, -0.550778098353912120f, 0.834546089890866870f,
-    -0.550938130689703880f,
-  0.834440433486103190f, -0.551098142769075430f, 0.834334746401350080f,
-    -0.551258134586143590f,
-  0.834229028640493420f, -0.551418106135026060f, 0.834123280207420100f,
-    -0.551578057409841000f,
-  0.834017501106018130f, -0.551737988404707340f, 0.833911691340176840f,
-    -0.551897899113745210f,
-  0.833805850913786340f, -0.552057789531074980f, 0.833699979830738290f,
-    -0.552217659650817930f,
-  0.833594078094925140f, -0.552377509467096070f, 0.833488145710240770f,
-    -0.552537338974032120f,
-  0.833382182680579730f, -0.552697148165749770f, 0.833276189009838240f,
-    -0.552856937036373290f,
-  0.833170164701913190f, -0.553016705580027470f, 0.833064109760702890f,
-    -0.553176453790838350f,
-  0.832958024190106670f, -0.553336181662932300f, 0.832851907994025090f,
-    -0.553495889190436570f,
-  0.832745761176359460f, -0.553655576367479310f, 0.832639583741012770f,
-    -0.553815243188189090f,
-  0.832533375691888680f, -0.553974889646695500f, 0.832427137032892280f,
-    -0.554134515737128910f,
-  0.832320867767929680f, -0.554294121453620000f, 0.832214567900907980f,
-    -0.554453706790300930f,
-  0.832108237435735590f, -0.554613271741304040f, 0.832001876376321950f,
-    -0.554772816300762470f,
-  0.831895484726577590f, -0.554932340462810370f, 0.831789062490414400f,
-    -0.555091844221582420f,
-  0.831682609671745120f, -0.555251327571213980f, 0.831576126274483740f,
-    -0.555410790505841630f,
-  0.831469612302545240f, -0.555570233019602180f, 0.831363067759845920f,
-    -0.555729655106633410f,
-  0.831256492650303210f, -0.555889056761073810f, 0.831149886977835540f,
-    -0.556048437977062600f,
-  0.831043250746362320f, -0.556207798748739930f, 0.830936583959804410f,
-    -0.556367139070246370f,
-  0.830829886622083570f, -0.556526458935723610f, 0.830723158737122880f,
-    -0.556685758339313890f,
-  0.830616400308846310f, -0.556845037275160100f, 0.830509611341179070f,
-    -0.557004295737405950f,
-  0.830402791838047550f, -0.557163533720196220f, 0.830295941803379070f,
-    -0.557322751217676160f,
-  0.830189061241102370f, -0.557481948223991550f, 0.830082150155146970f,
-    -0.557641124733289420f,
-  0.829975208549443950f, -0.557800280739716990f, 0.829868236427924840f,
-    -0.557959416237422960f,
-  0.829761233794523050f, -0.558118531220556100f, 0.829654200653172640f,
-    -0.558277625683266330f,
-  0.829547137007808910f, -0.558436699619704100f, 0.829440042862368170f,
-    -0.558595753024020760f,
-  0.829332918220788250f, -0.558754785890368310f, 0.829225763087007570f,
-    -0.558913798212899770f,
-  0.829118577464965980f, -0.559072789985768480f, 0.829011361358604430f,
-    -0.559231761203128900f,
-  0.828904114771864870f, -0.559390711859136140f, 0.828796837708690610f,
-    -0.559549641947945760f,
-  0.828689530173025820f, -0.559708551463714680f, 0.828582192168815790f,
-    -0.559867440400600210f,
-  0.828474823700007130f, -0.560026308752760380f, 0.828367424770547480f,
-    -0.560185156514354080f,
-  0.828259995384385660f, -0.560343983679540860f, 0.828152535545471410f,
-    -0.560502790242481060f,
-  0.828045045257755800f, -0.560661576197336030f, 0.827937524525190870f,
-    -0.560820341538267430f,
-  0.827829973351729920f, -0.560979086259438150f, 0.827722391741327220f,
-    -0.561137810355011420f,
-  0.827614779697938400f, -0.561296513819151470f, 0.827507137225519830f,
-    -0.561455196646023280f,
-  0.827399464328029470f, -0.561613858829792420f, 0.827291761009425810f,
-    -0.561772500364625340f,
-  0.827184027273669130f, -0.561931121244689470f, 0.827076263124720270f,
-    -0.562089721464152480f,
-  0.826968468566541600f, -0.562248301017183150f, 0.826860643603096190f,
-    -0.562406859897951140f,
-  0.826752788238348520f, -0.562565398100626560f, 0.826644902476264320f,
-    -0.562723915619380400f,
-  0.826536986320809960f, -0.562882412448384440f, 0.826429039775953500f,
-    -0.563040888581811230f,
-  0.826321062845663530f, -0.563199344013834090f, 0.826213055533910220f,
-    -0.563357778738627020f,
-  0.826105017844664610f, -0.563516192750364800f, 0.825996949781899080f,
-    -0.563674586043223070f,
-  0.825888851349586780f, -0.563832958611378170f, 0.825780722551702430f,
-    -0.563991310449006970f,
-  0.825672563392221390f, -0.564149641550287680f, 0.825564373875120490f,
-    -0.564307951909398640f,
-  0.825456154004377550f, -0.564466241520519500f, 0.825347903783971380f,
-    -0.564624510377830120f,
-  0.825239623217882250f, -0.564782758475511400f, 0.825131312310091070f,
-    -0.564940985807745210f,
-  0.825022971064580220f, -0.565099192368713980f, 0.824914599485333190f,
-    -0.565257378152600800f,
-  0.824806197576334330f, -0.565415543153589660f, 0.824697765341569470f,
-    -0.565573687365865330f,
-  0.824589302785025290f, -0.565731810783613120f, 0.824480809910689500f,
-    -0.565889913401019570f,
-  0.824372286722551250f, -0.566047995212271450f, 0.824263733224600560f,
-    -0.566206056211556730f,
-  0.824155149420828570f, -0.566364096393063840f, 0.824046535315227760f,
-    -0.566522115750982100f,
-  0.823937890911791370f, -0.566680114279501600f, 0.823829216214513990f,
-    -0.566838091972813320f,
-  0.823720511227391430f, -0.566996048825108680f, 0.823611775954420260f,
-    -0.567153984830580100f,
-  0.823503010399598500f, -0.567311899983420800f, 0.823394214566925080f,
-    -0.567469794277824510f,
-  0.823285388460400110f, -0.567627667707986230f, 0.823176532084024860f,
-    -0.567785520268101140f,
-  0.823067645441801670f, -0.567943351952365560f, 0.822958728537734000f,
-    -0.568101162754976460f,
-  0.822849781375826430f, -0.568258952670131490f, 0.822740803960084420f,
-    -0.568416721692029280f,
-  0.822631796294514990f, -0.568574469814869140f, 0.822522758383125940f,
-    -0.568732197032851050f,
-  0.822413690229926390f, -0.568889903340175860f, 0.822304591838926350f,
-    -0.569047588731045110f,
-  0.822195463214137170f, -0.569205253199661200f, 0.822086304359571090f,
-    -0.569362896740227220f,
-  0.821977115279241550f, -0.569520519346947140f, 0.821867895977163250f,
-    -0.569678121014025600f,
-  0.821758646457351750f, -0.569835701735668000f, 0.821649366723823940f,
-    -0.569993261506080540f,
-  0.821540056780597610f, -0.570150800319470300f, 0.821430716631691870f,
-    -0.570308318170044900f,
-  0.821321346281126740f, -0.570465815052012990f, 0.821211945732923550f,
-    -0.570623290959583750f,
-  0.821102514991104650f, -0.570780745886967260f, 0.820993054059693580f,
-    -0.570938179828374360f,
-  0.820883562942714580f, -0.571095592778016690f, 0.820774041644193650f,
-    -0.571252984730106660f,
-  0.820664490168157460f, -0.571410355678857230f, 0.820554908518633890f,
-    -0.571567705618482580f,
-  0.820445296699652050f, -0.571725034543197120f, 0.820335654715241840f,
-    -0.571882342447216590f,
-  0.820225982569434690f, -0.572039629324757050f, 0.820116280266262820f,
-    -0.572196895170035580f,
-  0.820006547809759680f, -0.572354139977269920f, 0.819896785203959810f,
-    -0.572511363740678790f,
-  0.819786992452898990f, -0.572668566454481160f, 0.819677169560613870f,
-    -0.572825748112897550f,
-  0.819567316531142230f, -0.572982908710148560f, 0.819457433368523280f,
-    -0.573140048240455950f,
-  0.819347520076796900f, -0.573297166698042200f, 0.819237576660004520f,
-    -0.573454264077130400f,
-  0.819127603122188240f, -0.573611340371944610f, 0.819017599467391500f,
-    -0.573768395576709560f,
-  0.818907565699658950f, -0.573925429685650750f, 0.818797501823036010f,
-    -0.574082442692994470f,
-  0.818687407841569680f, -0.574239434592967890f, 0.818577283759307610f,
-    -0.574396405379798750f,
-  0.818467129580298660f, -0.574553355047715760f, 0.818356945308593150f,
-    -0.574710283590948330f,
-  0.818246730948242070f, -0.574867191003726740f, 0.818136486503297730f,
-    -0.575024077280281710f,
-  0.818026211977813440f, -0.575180942414845080f, 0.817915907375843850f,
-    -0.575337786401649450f,
-  0.817805572701444270f, -0.575494609234928120f, 0.817695207958671680f,
-    -0.575651410908915140f,
-  0.817584813151583710f, -0.575808191417845340f, 0.817474388284239240f,
-    -0.575964950755954220f,
-  0.817363933360698460f, -0.576121688917478280f, 0.817253448385022340f,
-    -0.576278405896654910f,
-  0.817142933361272970f, -0.576435101687721830f, 0.817032388293513880f,
-    -0.576591776284917760f,
-  0.816921813185809480f, -0.576748429682482410f, 0.816811208042225290f,
-    -0.576905061874655960f,
-  0.816700572866827850f, -0.577061672855679440f, 0.816589907663684890f,
-    -0.577218262619794920f,
-  0.816479212436865390f, -0.577374831161244880f, 0.816368487190439200f,
-    -0.577531378474272720f,
-  0.816257731928477390f, -0.577687904553122800f, 0.816146946655052270f,
-    -0.577844409392039850f,
-  0.816036131374236810f, -0.578000892985269910f, 0.815925286090105510f,
-    -0.578157355327059360f,
-  0.815814410806733780f, -0.578313796411655590f, 0.815703505528198260f,
-    -0.578470216233306630f,
-  0.815592570258576790f, -0.578626614786261430f, 0.815481605001947770f,
-    -0.578782992064769690f,
-  0.815370609762391290f, -0.578939348063081780f, 0.815259584543988280f,
-    -0.579095682775449090f,
-  0.815148529350820830f, -0.579251996196123550f, 0.815037444186972220f,
-    -0.579408288319357870f,
-  0.814926329056526620f, -0.579564559139405630f, 0.814815183963569440f,
-    -0.579720808650521450f,
-  0.814704008912187080f, -0.579877036846960350f, 0.814592803906467270f,
-    -0.580033243722978150f,
-  0.814481568950498610f, -0.580189429272831680f, 0.814370304048371070f,
-    -0.580345593490778300f,
-  0.814259009204175270f, -0.580501736371076490f, 0.814147684422003360f,
-    -0.580657857907985300f,
-  0.814036329705948410f, -0.580813958095764530f, 0.813924945060104600f,
-    -0.580970036928674770f,
-  0.813813530488567190f, -0.581126094400977620f, 0.813702085995432700f,
-    -0.581282130506935000f,
-  0.813590611584798510f, -0.581438145240810170f, 0.813479107260763220f,
-    -0.581594138596866930f,
-  0.813367573027426570f, -0.581750110569369650f, 0.813256008888889380f,
-    -0.581906061152583810f,
-  0.813144414849253590f, -0.582061990340775440f, 0.813032790912622040f,
-    -0.582217898128211670f,
-  0.812921137083098770f, -0.582373784509160110f, 0.812809453364789270f,
-    -0.582529649477889320f,
-  0.812697739761799490f, -0.582685493028668460f, 0.812585996278237130f,
-    -0.582841315155767650f,
-  0.812474222918210480f, -0.582997115853457700f, 0.812362419685829230f,
-    -0.583152895116010430f,
-  0.812250586585203880f, -0.583308652937698290f, 0.812138723620446480f,
-    -0.583464389312794320f,
-  0.812026830795669730f, -0.583620104235572760f, 0.811914908114987790f,
-    -0.583775797700308070f,
-  0.811802955582515470f, -0.583931469701276180f, 0.811690973202369050f,
-    -0.584087120232753440f,
-  0.811578960978665890f, -0.584242749289016980f, 0.811466918915524250f,
-    -0.584398356864344600f,
-  0.811354847017063730f, -0.584553942953015330f, 0.811242745287404810f,
-    -0.584709507549308390f,
-  0.811130613730669190f, -0.584865050647504490f, 0.811018452350979470f,
-    -0.585020572241884530f,
-  0.810906261152459670f, -0.585176072326730410f, 0.810794040139234730f,
-    -0.585331550896324940f,
-  0.810681789315430780f, -0.585487007944951340f, 0.810569508685174630f,
-    -0.585642443466894420f,
-  0.810457198252594770f, -0.585797857456438860f, 0.810344858021820550f,
-    -0.585953249907870570f,
-  0.810232487996982330f, -0.586108620815476430f, 0.810120088182211600f,
-    -0.586263970173543590f,
-  0.810007658581641140f, -0.586419297976360500f, 0.809895199199404450f,
-    -0.586574604218216170f,
-  0.809782710039636530f, -0.586729888893400390f, 0.809670191106473090f,
-    -0.586885151996203950f,
-  0.809557642404051260f, -0.587040393520917970f, 0.809445063936509170f,
-    -0.587195613461834800f,
-  0.809332455707985950f, -0.587350811813247660f, 0.809219817722621750f,
-    -0.587505988569450020f,
-  0.809107149984558240f, -0.587661143724736660f, 0.808994452497937670f,
-    -0.587816277273402910f,
-  0.808881725266903610f, -0.587971389209745010f, 0.808768968295600850f,
-    -0.588126479528059850f,
-  0.808656181588174980f, -0.588281548222645220f, 0.808543365148773010f,
-    -0.588436595287799790f,
-  0.808430518981542720f, -0.588591620717822890f, 0.808317643090633250f,
-    -0.588746624507014540f,
-  0.808204737480194720f, -0.588901606649675720f, 0.808091802154378370f,
-    -0.589056567140108460f,
-  0.807978837117336310f, -0.589211505972614960f, 0.807865842373222120f,
-    -0.589366423141498790f,
-  0.807752817926190360f, -0.589521318641063940f, 0.807639763780396480f,
-    -0.589676192465615420f,
-  0.807526679939997160f, -0.589831044609458790f, 0.807413566409150190f,
-    -0.589985875066900920f,
-  0.807300423192014450f, -0.590140683832248820f, 0.807187250292749960f,
-    -0.590295470899810830f,
-  0.807074047715517610f, -0.590450236263895810f, 0.806960815464479730f,
-    -0.590604979918813330f,
-  0.806847553543799330f, -0.590759701858874160f, 0.806734261957640860f,
-    -0.590914402078389520f,
-  0.806620940710169650f, -0.591069080571671400f, 0.806507589805552260f,
-    -0.591223737333032910f,
-  0.806394209247956240f, -0.591378372356787580f, 0.806280799041550480f,
-    -0.591532985637249990f,
-  0.806167359190504420f, -0.591687577168735430f, 0.806053889698989060f,
-    -0.591842146945560140f,
-  0.805940390571176280f, -0.591996694962040990f, 0.805826861811239300f,
-    -0.592151221212495530f,
-  0.805713303423352230f, -0.592305725691242290f, 0.805599715411690060f,
-    -0.592460208392600830f,
-  0.805486097780429230f, -0.592614669310891130f, 0.805372450533747060f,
-    -0.592769108440434070f,
-  0.805258773675822210f, -0.592923525775551300f, 0.805145067210834230f,
-    -0.593077921310565470f,
-  0.805031331142963660f, -0.593232295039799800f, 0.804917565476392260f,
-    -0.593386646957578480f,
-  0.804803770215302920f, -0.593540977058226390f, 0.804689945363879500f,
-    -0.593695285336069190f,
-  0.804576090926307110f, -0.593849571785433630f, 0.804462206906771840f,
-    -0.594003836400646690f,
-  0.804348293309460780f, -0.594158079176036800f, 0.804234350138562260f,
-    -0.594312300105932830f,
-  0.804120377398265810f, -0.594466499184664430f, 0.804006375092761520f,
-    -0.594620676406562240f,
-  0.803892343226241260f, -0.594774831765957580f, 0.803778281802897570f,
-    -0.594928965257182420f,
-  0.803664190826924090f, -0.595083076874569960f, 0.803550070302515680f,
-    -0.595237166612453850f,
-  0.803435920233868120f, -0.595391234465168730f, 0.803321740625178580f,
-    -0.595545280427049790f,
-  0.803207531480644940f, -0.595699304492433360f, 0.803093292804466400f,
-    -0.595853306655656280f,
-  0.802979024600843250f, -0.596007286911056530f, 0.802864726873976700f,
-    -0.596161245252972540f,
-  0.802750399628069160f, -0.596315181675743710f, 0.802636042867324150f,
-    -0.596469096173710360f,
-  0.802521656595946430f, -0.596622988741213220f, 0.802407240818141300f,
-    -0.596776859372594390f,
-  0.802292795538115720f, -0.596930708062196500f, 0.802178320760077450f,
-    -0.597084534804362740f,
-  0.802063816488235440f, -0.597238339593437420f, 0.801949282726799770f,
-    -0.597392122423765710f,
-  0.801834719479981310f, -0.597545883289693160f, 0.801720126751992330f,
-    -0.597699622185566830f,
-  0.801605504547046150f, -0.597853339105733910f, 0.801490852869356950f,
-    -0.598007034044542700f,
-  0.801376171723140240f, -0.598160706996342270f, 0.801261461112612540f,
-    -0.598314357955482600f,
-  0.801146721041991360f, -0.598467986916314310f, 0.801031951515495330f,
-    -0.598621593873188920f,
-  0.800917152537344300f, -0.598775178820458720f, 0.800802324111759110f,
-    -0.598928741752476900f,
-  0.800687466242961610f, -0.599082282663597310f, 0.800572578935174860f,
-    -0.599235801548174570f,
-  0.800457662192622820f, -0.599389298400564540f, 0.800342716019530660f,
-    -0.599542773215123390f,
-  0.800227740420124790f, -0.599696225986208310f, 0.800112735398632370f,
-    -0.599849656708177250f,
-  0.799997700959281910f, -0.600003065375388940f, 0.799882637106302810f,
-    -0.600156451982203240f,
-  0.799767543843925680f, -0.600309816522980430f, 0.799652421176382240f,
-    -0.600463158992081580f,
-  0.799537269107905010f, -0.600616479383868970f, 0.799422087642728040f,
-    -0.600769777692705230f,
-  0.799306876785086160f, -0.600923053912954090f, 0.799191636539215210f,
-    -0.601076308038980160f,
-  0.799076366909352350f, -0.601229540065148500f, 0.798961067899735760f,
-    -0.601382749985825420f,
-  0.798845739514604580f, -0.601535937795377730f, 0.798730381758199210f,
-    -0.601689103488172950f,
-  0.798614994634760820f, -0.601842247058580030f, 0.798499578148532120f,
-    -0.601995368500968020f,
-  0.798384132303756380f, -0.602148467809707210f, 0.798268657104678430f,
-    -0.602301544979168550f,
-  0.798153152555543750f, -0.602454600003723750f, 0.798037618660599410f,
-    -0.602607632877745440f,
-  0.797922055424093000f, -0.602760643595607220f, 0.797806462850273570f,
-    -0.602913632151683030f,
-  0.797690840943391160f, -0.603066598540348160f, 0.797575189707696700f,
-    -0.603219542755978440f,
-  0.797459509147442460f, -0.603372464792950260f, 0.797343799266881700f,
-    -0.603525364645641550f,
-  0.797228060070268700f, -0.603678242308430370f, 0.797112291561858920f,
-    -0.603831097775695880f,
-  0.796996493745908750f, -0.603983931041818020f, 0.796880666626675780f,
-    -0.604136742101177520f,
-  0.796764810208418830f, -0.604289530948155960f, 0.796648924495397260f,
-    -0.604442297577135860f,
-  0.796533009491872000f, -0.604595041982500360f, 0.796417065202104980f,
-    -0.604747764158633410f,
-  0.796301091630359110f, -0.604900464099919820f, 0.796185088780898440f,
-    -0.605053141800745320f,
-  0.796069056657987990f, -0.605205797255496500f, 0.795952995265893910f,
-    -0.605358430458560530f,
-  0.795836904608883570f, -0.605511041404325550f, 0.795720784691225090f,
-    -0.605663630087180380f,
-  0.795604635517188070f, -0.605816196501514970f, 0.795488457091042990f,
-    -0.605968740641719680f,
-  0.795372249417061310f, -0.606121262502186120f, 0.795256012499515610f,
-    -0.606273762077306430f,
-  0.795139746342679590f, -0.606426239361473550f, 0.795023450950828050f,
-    -0.606578694349081290f,
-  0.794907126328237010f, -0.606731127034524480f, 0.794790772479183170f,
-    -0.606883537412198470f,
-  0.794674389407944550f, -0.607035925476499650f, 0.794557977118800380f,
-    -0.607188291221825160f,
-  0.794441535616030590f, -0.607340634642572930f, 0.794325064903916520f,
-    -0.607492955733141550f,
-  0.794208564986740640f, -0.607645254487930830f, 0.794092035868785960f,
-    -0.607797530901341140f,
-  0.793975477554337170f, -0.607949784967773630f, 0.793858890047679730f,
-    -0.608102016681630440f,
-  0.793742273353100210f, -0.608254226037314490f, 0.793625627474886300f,
-    -0.608406413029229150f,
-  0.793508952417326660f, -0.608558577651779450f, 0.793392248184711100f,
-    -0.608710719899370310f,
-  0.793275514781330630f, -0.608862839766408200f, 0.793158752211477140f,
-    -0.609014937247299830f,
-  0.793041960479443640f, -0.609167012336453210f, 0.792925139589524260f,
-    -0.609319065028276820f,
-  0.792808289546014120f, -0.609471095317180240f, 0.792691410353209450f,
-    -0.609623103197573730f,
-  0.792574502015407690f, -0.609775088663868430f, 0.792457564536907080f,
-    -0.609927051710476120f,
-  0.792340597922007170f, -0.610078992331809620f, 0.792223602175008310f,
-    -0.610230910522282620f,
-  0.792106577300212390f, -0.610382806276309480f, 0.791989523301921850f,
-    -0.610534679588305320f,
-  0.791872440184440470f, -0.610686530452686280f, 0.791755327952073150f,
-    -0.610838358863869170f,
-  0.791638186609125880f, -0.610990164816271660f, 0.791521016159905220f,
-    -0.611141948304312570f,
-  0.791403816608719500f, -0.611293709322410890f, 0.791286587959877830f,
-    -0.611445447864987000f,
-  0.791169330217690200f, -0.611597163926461910f, 0.791052043386467950f,
-    -0.611748857501257290f,
-  0.790934727470523290f, -0.611900528583796070f, 0.790817382474169770f,
-    -0.612052177168501470f,
-  0.790700008401721610f, -0.612203803249797950f, 0.790582605257494460f,
-    -0.612355406822110650f,
-  0.790465173045804880f, -0.612506987879865570f, 0.790347711770970520f,
-    -0.612658546417489290f,
-  0.790230221437310030f, -0.612810082429409710f, 0.790112702049143300f,
-    -0.612961595910055170f,
-  0.789995153610791090f, -0.613113086853854910f, 0.789877576126575280f,
-    -0.613264555255239040f,
-  0.789759969600819070f, -0.613416001108638590f, 0.789642334037846340f,
-    -0.613567424408485330f,
-  0.789524669441982190f, -0.613718825149211720f, 0.789406975817552930f,
-    -0.613870203325251330f,
-  0.789289253168885650f, -0.614021558931038380f, 0.789171501500308900f,
-    -0.614172891961007990f,
-  0.789053720816151880f, -0.614324202409595950f, 0.788935911120745240f,
-    -0.614475490271239040f,
-  0.788818072418420280f, -0.614626755540375050f, 0.788700204713509660f,
-    -0.614777998211442080f,
-  0.788582308010347120f, -0.614929218278879590f, 0.788464382313267540f,
-    -0.615080415737127460f,
-  0.788346427626606340f, -0.615231590580626820f, 0.788228443954700490f,
-    -0.615382742803819220f,
-  0.788110431301888070f, -0.615533872401147320f, 0.787992389672507950f,
-    -0.615684979367054570f,
-  0.787874319070900220f, -0.615836063695985090f, 0.787756219501406060f,
-    -0.615987125382383760f,
-  0.787638090968367450f, -0.616138164420696910f, 0.787519933476127810f,
-    -0.616289180805370980f,
-  0.787401747029031430f, -0.616440174530853650f, 0.787283531631423620f,
-    -0.616591145591593110f,
-  0.787165287287651010f, -0.616742093982038720f, 0.787047014002060790f,
-    -0.616893019696640680f,
-  0.786928711779001810f, -0.617043922729849760f, 0.786810380622823490f,
-    -0.617194803076117630f,
-  0.786692020537876790f, -0.617345660729896830f, 0.786573631528513230f,
-    -0.617496495685640910f,
-  0.786455213599085770f, -0.617647307937803870f, 0.786336766753948260f,
-    -0.617798097480841020f,
-  0.786218290997455660f, -0.617948864309208150f, 0.786099786333963930f,
-    -0.618099608417362000f,
-  0.785981252767830150f, -0.618250329799760250f, 0.785862690303412600f,
-    -0.618401028450860980f,
-  0.785744098945070360f, -0.618551704365123740f, 0.785625478697163700f,
-    -0.618702357537008530f,
-  0.785506829564053930f, -0.618852987960976320f, 0.785388151550103550f,
-    -0.619003595631488660f,
-  0.785269444659675850f, -0.619154180543008410f, 0.785150708897135560f,
-    -0.619304742689998690f,
-  0.785031944266848080f, -0.619455282066924020f, 0.784913150773180020f,
-    -0.619605798668249270f,
-  0.784794328420499230f, -0.619756292488440660f, 0.784675477213174320f,
-    -0.619906763521964720f,
-  0.784556597155575240f, -0.620057211763289100f, 0.784437688252072830f,
-    -0.620207637206882430f,
-  0.784318750507038920f, -0.620358039847213720f, 0.784199783924846570f,
-    -0.620508419678753360f,
-  0.784080788509869950f, -0.620658776695972140f, 0.783961764266484120f,
-    -0.620809110893341900f,
-  0.783842711199065230f, -0.620959422265335180f, 0.783723629311990470f,
-    -0.621109710806425630f,
-  0.783604518609638200f, -0.621259976511087550f, 0.783485379096387820f,
-    -0.621410219373796150f,
-  0.783366210776619720f, -0.621560439389027160f, 0.783247013654715380f,
-    -0.621710636551257690f,
-  0.783127787735057310f, -0.621860810854965360f, 0.783008533022029110f,
-    -0.622010962294628600f,
-  0.782889249520015480f, -0.622161090864726820f, 0.782769937233402050f,
-    -0.622311196559740320f,
-  0.782650596166575730f, -0.622461279374149970f, 0.782531226323924240f,
-    -0.622611339302437730f,
-  0.782411827709836530f, -0.622761376339086350f, 0.782292400328702400f,
-    -0.622911390478579460f,
-  0.782172944184913010f, -0.623061381715401260f, 0.782053459282860300f,
-    -0.623211350044037270f,
-  0.781933945626937630f, -0.623361295458973230f, 0.781814403221538830f,
-    -0.623511217954696440f,
-  0.781694832071059390f, -0.623661117525694530f, 0.781575232179895550f,
-    -0.623810994166456130f,
-  0.781455603552444590f, -0.623960847871470660f, 0.781335946193104870f,
-    -0.624110678635228510f,
-  0.781216260106276090f, -0.624260486452220650f, 0.781096545296358520f,
-    -0.624410271316939270f,
-  0.780976801767753750f, -0.624560033223877210f, 0.780857029524864580f,
-    -0.624709772167528100f,
-  0.780737228572094490f, -0.624859488142386340f, 0.780617398913848400f,
-    -0.625009181142947460f,
-  0.780497540554531910f, -0.625158851163707620f, 0.780377653498552040f,
-    -0.625308498199164010f,
-  0.780257737750316590f, -0.625458122243814360f, 0.780137793314234610f,
-    -0.625607723292157410f,
-  0.780017820194715990f, -0.625757301338692900f, 0.779897818396172000f,
-    -0.625906856377921090f,
-  0.779777787923014550f, -0.626056388404343520f, 0.779657728779656890f,
-    -0.626205897412462130f,
-  0.779537640970513260f, -0.626355383396779990f, 0.779417524499998900f,
-    -0.626504846351800810f,
-  0.779297379372530300f, -0.626654286272029350f, 0.779177205592524680f,
-    -0.626803703151971200f,
-  0.779057003164400630f, -0.626953096986132660f, 0.778936772092577500f,
-    -0.627102467769020900f,
-  0.778816512381475980f, -0.627251815495144080f, 0.778696224035517530f,
-    -0.627401140159011050f,
-  0.778575907059125050f, -0.627550441755131530f, 0.778455561456721900f,
-    -0.627699720278016240f,
-  0.778335187232733210f, -0.627848975722176460f, 0.778214784391584540f,
-    -0.627998208082124700f,
-  0.778094352937702790f, -0.628147417352374000f, 0.777973892875516100f,
-    -0.628296603527438320f,
-  0.777853404209453150f, -0.628445766601832710f, 0.777732886943944050f,
-    -0.628594906570072550f,
-  0.777612341083420030f, -0.628744023426674680f, 0.777491766632313010f,
-    -0.628893117166156480f,
-  0.777371163595056310f, -0.629042187783036000f, 0.777250531976084070f,
-    -0.629191235271832290f,
-  0.777129871779831620f, -0.629340259627065630f, 0.777009183010735290f,
-    -0.629489260843256630f,
-  0.776888465673232440f, -0.629638238914926980f, 0.776767719771761510f,
-    -0.629787193836599200f,
-  0.776646945310762060f, -0.629936125602796440f, 0.776526142294674430f,
-    -0.630085034208043180f,
-  0.776405310727940390f, -0.630233919646864370f, 0.776284450615002510f,
-    -0.630382781913785940f,
-  0.776163561960304340f, -0.630531621003334600f, 0.776042644768290770f,
-    -0.630680436910037940f,
-  0.775921699043407690f, -0.630829229628424470f, 0.775800724790101650f,
-    -0.630977999153023550f,
-  0.775679722012820650f, -0.631126745478365340f, 0.775558690716013580f,
-    -0.631275468598980760f,
-  0.775437630904130540f, -0.631424168509401860f, 0.775316542581622530f,
-    -0.631572845204161020f,
-  0.775195425752941420f, -0.631721498677792260f, 0.775074280422540450f,
-    -0.631870128924829850f,
-  0.774953106594873930f, -0.632018735939809060f, 0.774831904274396850f,
-    -0.632167319717265920f,
-  0.774710673465565550f, -0.632315880251737570f, 0.774589414172837550f,
-    -0.632464417537761840f,
-  0.774468126400670860f, -0.632612931569877410f, 0.774346810153525130f,
-    -0.632761422342624000f,
-  0.774225465435860680f, -0.632909889850541750f, 0.774104092252139050f,
-    -0.633058334088172140f,
-  0.773982690606822900f, -0.633206755050057190f, 0.773861260504375540f,
-    -0.633355152730739950f,
-  0.773739801949261840f, -0.633503527124764320f, 0.773618314945947460f,
-    -0.633651878226674900f,
-  0.773496799498899050f, -0.633800206031017280f, 0.773375255612584470f,
-    -0.633948510532337810f,
-  0.773253683291472590f, -0.634096791725183740f, 0.773132082540033070f,
-    -0.634245049604103330f,
-  0.773010453362736990f, -0.634393284163645490f, 0.772888795764056220f,
-    -0.634541495398360020f,
-  0.772767109748463850f, -0.634689683302797740f, 0.772645395320433860f,
-    -0.634837847871509990f,
-  0.772523652484441330f, -0.634985989099049460f, 0.772401881244962450f,
-    -0.635134106979969190f,
-  0.772280081606474320f, -0.635282201508823420f, 0.772158253573455240f,
-    -0.635430272680167160f,
-  0.772036397150384520f, -0.635578320488556110f, 0.771914512341742350f,
-    -0.635726344928547070f,
-  0.771792599152010150f, -0.635874345994697720f, 0.771670657585670330f,
-    -0.636022323681566300f,
-  0.771548687647206300f, -0.636170277983712170f, 0.771426689341102590f,
-    -0.636318208895695460f,
-  0.771304662671844830f, -0.636466116412077180f, 0.771182607643919330f,
-    -0.636614000527419120f,
-  0.771060524261813820f, -0.636761861236284200f, 0.770938412530016940f,
-    -0.636909698533235870f,
-  0.770816272453018540f, -0.637057512412838590f, 0.770694104035309140f,
-    -0.637205302869657600f,
-  0.770571907281380810f, -0.637353069898259130f, 0.770449682195725960f,
-    -0.637500813493210190f,
-  0.770327428782838890f, -0.637648533649078810f, 0.770205147047214210f,
-    -0.637796230360433540f,
-  0.770082836993347900f, -0.637943903621844060f, 0.769960498625737230f,
-    -0.638091553427880820f,
-  0.769838131948879840f, -0.638239179773115280f, 0.769715736967275130f,
-    -0.638386782652119570f,
-  0.769593313685422940f, -0.638534362059466790f, 0.769470862107824670f,
-    -0.638681917989730730f,
-  0.769348382238982280f, -0.638829450437486290f, 0.769225874083399260f,
-    -0.638976959397309140f,
-  0.769103337645579700f, -0.639124444863775730f, 0.768980772930028870f,
-    -0.639271906831463510f,
-  0.768858179941253270f, -0.639419345294950700f, 0.768735558683760310f,
-    -0.639566760248816310f,
-  0.768612909162058380f, -0.639714151687640450f, 0.768490231380656860f,
-    -0.639861519606003900f,
-  0.768367525344066270f, -0.640008863998488440f, 0.768244791056798330f,
-    -0.640156184859676510f,
-  0.768122028523365420f, -0.640303482184151670f, 0.767999237748281270f,
-    -0.640450755966498140f,
-  0.767876418736060610f, -0.640598006201301030f, 0.767753571491219030f,
-    -0.640745232883146440f,
-  0.767630696018273380f, -0.640892436006621380f, 0.767507792321741270f,
-    -0.641039615566313390f,
-  0.767384860406141730f, -0.641186771556811250f, 0.767261900275994500f,
-    -0.641333903972704290f,
-  0.767138911935820400f, -0.641481012808583160f, 0.767015895390141480f,
-    -0.641628098059038750f,
-  0.766892850643480670f, -0.641775159718663500f, 0.766769777700361920f,
-    -0.641922197782050170f,
-  0.766646676565310380f, -0.642069212243792540f, 0.766523547242852210f,
-    -0.642216203098485370f,
-  0.766400389737514230f, -0.642363170340724320f, 0.766277204053824710f,
-    -0.642510113965105710f,
-  0.766153990196312920f, -0.642657033966226860f, 0.766030748169509000f,
-    -0.642803930338685990f,
-  0.765907477977944340f, -0.642950803077082080f, 0.765784179626150970f,
-    -0.643097652176015110f,
-  0.765660853118662500f, -0.643244477630085850f, 0.765537498460013070f,
-    -0.643391279433895850f,
-  0.765414115654738270f, -0.643538057582047740f, 0.765290704707374370f,
-    -0.643684812069144850f,
-  0.765167265622458960f, -0.643831542889791390f, 0.765043798404530520f,
-    -0.643978250038592660f,
-  0.764920303058128410f, -0.644124933510154540f, 0.764796779587793460f,
-    -0.644271593299083790f,
-  0.764673227998067140f, -0.644418229399988380f, 0.764549648293492150f,
-    -0.644564841807476640f,
-  0.764426040478612070f, -0.644711430516158310f, 0.764302404557971720f,
-    -0.644857995520643710f,
-  0.764178740536116670f, -0.645004536815543930f, 0.764055048417593970f,
-    -0.645151054395471160f,
-  0.763931328206951090f, -0.645297548255038380f, 0.763807579908737160f,
-    -0.645444018388859230f,
-  0.763683803527501870f, -0.645590464791548690f, 0.763559999067796150f,
-    -0.645736887457722290f,
-  0.763436166534172010f, -0.645883286381996320f, 0.763312305931182380f,
-    -0.646029661558988330f,
-  0.763188417263381270f, -0.646176012983316280f, 0.763064500535323710f,
-    -0.646322340649599480f,
-  0.762940555751565720f, -0.646468644552457780f, 0.762816582916664430f,
-    -0.646614924686512050f,
-  0.762692582035177980f, -0.646761181046383920f, 0.762568553111665380f,
-    -0.646907413626696020f,
-  0.762444496150687210f, -0.647053622422071540f, 0.762320411156804270f,
-    -0.647199807427135230f,
-  0.762196298134578900f, -0.647345968636512060f, 0.762072157088574560f,
-    -0.647492106044828100f,
-  0.761947988023355390f, -0.647638219646710310f, 0.761823790943486960f,
-    -0.647784309436786440f,
-  0.761699565853535380f, -0.647930375409685340f, 0.761575312758068000f,
-    -0.648076417560036530f,
-  0.761451031661653620f, -0.648222435882470420f, 0.761326722568861360f,
-    -0.648368430371618290f,
-  0.761202385484261780f, -0.648514401022112440f, 0.761078020412426560f,
-    -0.648660347828585840f,
-  0.760953627357928150f, -0.648806270785672550f, 0.760829206325340010f,
-    -0.648952169888007300f,
-  0.760704757319236920f, -0.649098045130225950f, 0.760580280344194450f,
-    -0.649243896506964900f,
-  0.760455775404789260f, -0.649389724012861660f, 0.760331242505599030f,
-    -0.649535527642554730f,
-  0.760206681651202420f, -0.649681307390683190f, 0.760082092846179340f,
-    -0.649827063251887100f,
-  0.759957476095110330f, -0.649972795220807530f, 0.759832831402577400f,
-    -0.650118503292086200f,
-  0.759708158773163440f, -0.650264187460365850f, 0.759583458211452010f,
-    -0.650409847720290310f,
-  0.759458729722028210f, -0.650555484066503880f, 0.759333973309477940f,
-    -0.650701096493652040f,
-  0.759209188978388070f, -0.650846684996380880f, 0.759084376733346610f,
-    -0.650992249569337660f,
-  0.758959536578942440f, -0.651137790207170330f, 0.758834668519765660f,
-    -0.651283306904527740f,
-  0.758709772560407390f, -0.651428799656059820f, 0.758584848705459610f,
-    -0.651574268456416970f,
-  0.758459896959515430f, -0.651719713300250910f, 0.758334917327168960f,
-    -0.651865134182213920f,
-  0.758209909813015280f, -0.652010531096959500f, 0.758084874421650730f,
-    -0.652155904039141590f,
-  0.757959811157672300f, -0.652301253003415460f, 0.757834720025678310f,
-    -0.652446577984436730f,
-  0.757709601030268080f, -0.652591878976862440f, 0.757584454176041810f,
-    -0.652737155975350310f,
-  0.757459279467600720f, -0.652882408974558850f, 0.757334076909547130f,
-    -0.653027637969147530f,
-  0.757208846506484570f, -0.653172842953776760f, 0.757083588263017140f,
-    -0.653318023923107670f,
-  0.756958302183750490f, -0.653463180871802330f, 0.756832988273290820f,
-    -0.653608313794523890f,
-  0.756707646536245670f, -0.653753422685936060f, 0.756582276977223470f,
-    -0.653898507540703780f,
-  0.756456879600833740f, -0.654043568353492640f, 0.756331454411686920f,
-    -0.654188605118969040f,
-  0.756206001414394540f, -0.654333617831800440f, 0.756080520613569120f,
-    -0.654478606486655350f,
-  0.755955012013824420f, -0.654623571078202680f, 0.755829475619774760f,
-    -0.654768511601112600f,
-  0.755703911436035880f, -0.654913428050056030f, 0.755578319467224540f,
-    -0.655058320419704910f,
-  0.755452699717958250f, -0.655203188704731820f, 0.755327052192855670f,
-    -0.655348032899810470f,
-  0.755201376896536550f, -0.655492852999615350f, 0.755075673833621620f,
-    -0.655637648998821820f,
-  0.754949943008732640f, -0.655782420892106030f, 0.754824184426492350f,
-    -0.655927168674145360f,
-  0.754698398091524500f, -0.656071892339617600f, 0.754572584008453840f,
-    -0.656216591883201920f,
-  0.754446742181906440f, -0.656361267299578000f, 0.754320872616508820f,
-    -0.656505918583426550f,
-  0.754194975316889170f, -0.656650545729428940f, 0.754069050287676120f,
-    -0.656795148732268070f,
-  0.753943097533499640f, -0.656939727586627110f, 0.753817117058990790f,
-    -0.657084282287190180f,
-  0.753691108868781210f, -0.657228812828642540f, 0.753565072967504300f,
-    -0.657373319205670210f,
-  0.753439009359793580f, -0.657517801412960120f, 0.753312918050284330f,
-    -0.657662259445200070f,
-  0.753186799043612520f, -0.657806693297078640f, 0.753060652344415100f,
-    -0.657951102963285520f,
-  0.752934477957330150f, -0.658095488438511180f, 0.752808275886996950f,
-    -0.658239849717446870f,
-  0.752682046138055340f, -0.658384186794785050f, 0.752555788715146390f,
-    -0.658528499665218650f,
-  0.752429503622912390f, -0.658672788323441890f, 0.752303190865996400f,
-    -0.658817052764149480f,
-  0.752176850449042810f, -0.658961292982037320f, 0.752050482376696360f,
-    -0.659105508971802090f,
-  0.751924086653603550f, -0.659249700728141490f, 0.751797663284411550f,
-    -0.659393868245753860f,
-  0.751671212273768430f, -0.659538011519338660f, 0.751544733626323680f,
-    -0.659682130543596150f,
-  0.751418227346727470f, -0.659826225313227320f, 0.751291693439630870f,
-    -0.659970295822934540f,
-  0.751165131909686480f, -0.660114342067420480f, 0.751038542761547360f,
-    -0.660258364041389050f,
-  0.750911925999867890f, -0.660402361739545030f, 0.750785281629303690f,
-    -0.660546335156593890f,
-  0.750658609654510700f, -0.660690284287242300f, 0.750531910080146410f,
-    -0.660834209126197610f,
-  0.750405182910869330f, -0.660978109668168060f, 0.750278428151338720f,
-    -0.661121985907862860f,
-  0.750151645806215070f, -0.661265837839992270f, 0.750024835880159780f,
-    -0.661409665459266940f,
-  0.749897998377835330f, -0.661553468760398890f, 0.749771133303905100f,
-    -0.661697247738101010f,
-  0.749644240663033480f, -0.661841002387086870f, 0.749517320459886170f,
-    -0.661984732702070920f,
-  0.749390372699129560f, -0.662128438677768720f, 0.749263397385431130f,
-    -0.662272120308896590f,
-  0.749136394523459370f, -0.662415777590171780f, 0.749009364117883880f,
-    -0.662559410516312290f,
-  0.748882306173375150f, -0.662703019082037440f, 0.748755220694604760f,
-    -0.662846603282066900f,
-  0.748628107686245440f, -0.662990163111121470f, 0.748500967152970430f,
-    -0.663133698563923010f,
-  0.748373799099454560f, -0.663277209635194100f, 0.748246603530373420f,
-    -0.663420696319658280f,
-  0.748119380450403600f, -0.663564158612039770f, 0.747992129864222700f,
-    -0.663707596507064010f,
-  0.747864851776509410f, -0.663851009999457340f, 0.747737546191943330f,
-    -0.663994399083946640f,
-  0.747610213115205150f, -0.664137763755260010f, 0.747482852550976570f,
-    -0.664281104008126230f,
-  0.747355464503940190f, -0.664424419837275180f, 0.747228048978779920f,
-    -0.664567711237437520f,
-  0.747100605980180130f, -0.664710978203344790f, 0.746973135512826850f,
-    -0.664854220729729660f,
-  0.746845637581406540f, -0.664997438811325340f, 0.746718112190607130f,
-    -0.665140632442866140f,
-  0.746590559345117310f, -0.665283801619087180f, 0.746462979049626770f,
-    -0.665426946334724660f,
-  0.746335371308826320f, -0.665570066584515450f, 0.746207736127407760f,
-    -0.665713162363197550f,
-  0.746080073510063780f, -0.665856233665509720f, 0.745952383461488290f,
-    -0.665999280486191500f,
-  0.745824665986376090f, -0.666142302819983540f, 0.745696921089422760f,
-    -0.666285300661627280f,
-  0.745569148775325430f, -0.666428274005865240f, 0.745441349048781680f,
-    -0.666571222847440640f,
-  0.745313521914490520f, -0.666714147181097670f, 0.745185667377151640f,
-    -0.666857047001581220f,
-  0.745057785441466060f, -0.666999922303637470f, 0.744929876112135350f,
-    -0.667142773082013310f,
-  0.744801939393862630f, -0.667285599331456370f, 0.744673975291351710f,
-    -0.667428401046715520f,
-  0.744545983809307370f, -0.667571178222540310f, 0.744417964952435620f,
-    -0.667713930853681030f,
-  0.744289918725443260f, -0.667856658934889320f, 0.744161845133038180f,
-    -0.667999362460917400f,
-  0.744033744179929290f, -0.668142041426518450f, 0.743905615870826490f,
-    -0.668284695826446670f,
-  0.743777460210440890f, -0.668427325655456820f, 0.743649277203484060f,
-    -0.668569930908304970f,
-  0.743521066854669120f, -0.668712511579747980f, 0.743392829168709970f,
-    -0.668855067664543610f,
-  0.743264564150321600f, -0.668997599157450270f, 0.743136271804219820f,
-    -0.669140106053227600f,
-  0.743007952135121720f, -0.669282588346636010f, 0.742879605147745200f,
-    -0.669425046032436910f,
-  0.742751230846809050f, -0.669567479105392490f, 0.742622829237033490f,
-    -0.669709887560265840f,
-  0.742494400323139180f, -0.669852271391821020f, 0.742365944109848460f,
-    -0.669994630594823000f,
-  0.742237460601884000f, -0.670136965164037650f, 0.742108949803969910f,
-    -0.670279275094231800f,
-  0.741980411720831070f, -0.670421560380173090f, 0.741851846357193480f,
-    -0.670563821016630040f,
-  0.741723253717784140f, -0.670706056998372160f, 0.741594633807331150f,
-    -0.670848268320169640f,
-  0.741465986630563290f, -0.670990454976794220f, 0.741337312192210660f,
-    -0.671132616963017740f,
-  0.741208610497004260f, -0.671274754273613490f, 0.741079881549676080f,
-    -0.671416866903355450f,
-  0.740951125354959110f, -0.671558954847018330f, 0.740822341917587330f,
-    -0.671701018099378320f,
-  0.740693531242295760f, -0.671843056655211930f, 0.740564693333820250f,
-    -0.671985070509296900f,
-  0.740435828196898020f, -0.672127059656411730f, 0.740306935836266940f,
-    -0.672269024091335930f,
-  0.740178016256666240f, -0.672410963808849790f, 0.740049069462835550f,
-    -0.672552878803734710f,
-  0.739920095459516200f, -0.672694769070772860f, 0.739791094251449950f,
-    -0.672836634604747300f,
-  0.739662065843380010f, -0.672978475400442090f, 0.739533010240050250f,
-    -0.673120291452642070f,
-  0.739403927446205760f, -0.673262082756132970f, 0.739274817466592520f,
-    -0.673403849305701740f,
-  0.739145680305957510f, -0.673545591096136100f, 0.739016515969048720f,
-    -0.673687308122224330f,
-  0.738887324460615110f, -0.673829000378756040f, 0.738758105785406900f,
-    -0.673970667860521620f,
-  0.738628859948174840f, -0.674112310562312360f, 0.738499586953671130f,
-    -0.674253928478920410f,
-  0.738370286806648620f, -0.674395521605139050f, 0.738240959511861310f,
-    -0.674537089935762000f,
-  0.738111605074064260f, -0.674678633465584540f, 0.737982223498013570f,
-    -0.674820152189402170f,
-  0.737852814788465980f, -0.674961646102011930f, 0.737723378950179700f,
-    -0.675103115198211420f,
-  0.737593915987913570f, -0.675244559472799270f, 0.737464425906427580f,
-    -0.675385978920574840f,
-  0.737334908710482910f, -0.675527373536338520f, 0.737205364404841190f,
-    -0.675668743314891910f,
-  0.737075792994265730f, -0.675810088251036940f, 0.736946194483520280f,
-    -0.675951408339577010f,
-  0.736816568877369900f, -0.676092703575315920f, 0.736686916180580460f,
-    -0.676233973953058950f,
-  0.736557236397919150f, -0.676375219467611590f, 0.736427529534153690f,
-    -0.676516440113781090f,
-  0.736297795594053170f, -0.676657635886374950f, 0.736168034582387330f,
-    -0.676798806780201770f,
-  0.736038246503927350f, -0.676939952790071130f, 0.735908431363445190f,
-    -0.677081073910793530f,
-  0.735778589165713590f, -0.677222170137180330f, 0.735648719915506510f,
-    -0.677363241464043920f,
-  0.735518823617598900f, -0.677504287886197430f, 0.735388900276766730f,
-    -0.677645309398454910f,
-  0.735258949897786840f, -0.677786305995631500f, 0.735128972485437180f,
-    -0.677927277672543020f,
-  0.734998968044496710f, -0.678068224424006600f, 0.734868936579745170f,
-    -0.678209146244839860f,
-  0.734738878095963500f, -0.678350043129861470f, 0.734608792597933550f,
-    -0.678490915073891140f,
-  0.734478680090438370f, -0.678631762071749360f, 0.734348540578261600f,
-    -0.678772584118257690f,
-  0.734218374066188280f, -0.678913381208238410f, 0.734088180559004040f,
-    -0.679054153336514870f,
-  0.733957960061495940f, -0.679194900497911200f, 0.733827712578451700f,
-    -0.679335622687252560f,
-  0.733697438114660370f, -0.679476319899364970f, 0.733567136674911360f,
-    -0.679616992129075560f,
-  0.733436808263995710f, -0.679757639371212030f, 0.733306452886705260f,
-    -0.679898261620603290f,
-  0.733176070547832740f, -0.680038858872078930f, 0.733045661252172080f,
-    -0.680179431120469750f,
-  0.732915225004517780f, -0.680319978360607200f, 0.732784761809665790f,
-    -0.680460500587323880f,
-  0.732654271672412820f, -0.680600997795453020f, 0.732523754597556700f,
-    -0.680741469979829090f,
-  0.732393210589896040f, -0.680881917135287230f, 0.732262639654230770f,
-    -0.681022339256663670f,
-  0.732132041795361290f, -0.681162736338795430f, 0.732001417018089630f,
-    -0.681303108376520530f,
-  0.731870765327218290f, -0.681443455364677870f, 0.731740086727550980f,
-    -0.681583777298107480f,
-  0.731609381223892630f, -0.681724074171649710f, 0.731478648821048520f,
-    -0.681864345980146670f,
-  0.731347889523825570f, -0.682004592718440830f, 0.731217103337031270f,
-    -0.682144814381375640f,
-  0.731086290265474340f, -0.682285010963795570f, 0.730955450313964360f,
-    -0.682425182460546060f,
-  0.730824583487312160f, -0.682565328866473250f, 0.730693689790329000f,
-    -0.682705450176424590f,
-  0.730562769227827590f, -0.682845546385248080f, 0.730431821804621520f,
-    -0.682985617487792740f,
-  0.730300847525525490f, -0.683125663478908680f, 0.730169846395354870f,
-    -0.683265684353446700f,
-  0.730038818418926260f, -0.683405680106258680f, 0.729907763601057140f,
-    -0.683545650732197530f,
-  0.729776681946566090f, -0.683685596226116580f, 0.729645573460272480f,
-    -0.683825516582870720f,
-  0.729514438146997010f, -0.683965411797315400f, 0.729383276011561050f,
-    -0.684105281864307080f,
-  0.729252087058786970f, -0.684245126778703080f, 0.729120871293498230f,
-    -0.684384946535361750f,
-  0.728989628720519420f, -0.684524741129142300f, 0.728858359344675800f,
-    -0.684664510554904960f,
-  0.728727063170793830f, -0.684804254807510620f, 0.728595740203700770f,
-    -0.684943973881821490f,
-  0.728464390448225200f, -0.685083667772700360f, 0.728333013909196360f,
-    -0.685223336475011210f,
-  0.728201610591444610f, -0.685362979983618730f, 0.728070180499801210f,
-    -0.685502598293388550f,
-  0.727938723639098620f, -0.685642191399187470f, 0.727807240014169960f,
-    -0.685781759295883030f,
-  0.727675729629849610f, -0.685921301978343560f, 0.727544192490972800f,
-    -0.686060819441438710f,
-  0.727412628602375770f, -0.686200311680038590f, 0.727281037968895870f,
-    -0.686339778689014520f,
-  0.727149420595371020f, -0.686479220463238950f, 0.727017776486640680f,
-    -0.686618636997584630f,
-  0.726886105647544970f, -0.686758028286925890f, 0.726754408082925020f,
-    -0.686897394326137610f,
-  0.726622683797622850f, -0.687036735110095660f, 0.726490932796481910f,
-    -0.687176050633676820f,
-  0.726359155084346010f, -0.687315340891759050f, 0.726227350666060370f,
-    -0.687454605879221030f,
-  0.726095519546471000f, -0.687593845590942170f, 0.725963661730424930f,
-    -0.687733060021803230f,
-  0.725831777222770370f, -0.687872249166685550f, 0.725699866028356120f,
-    -0.688011413020471640f,
-  0.725567928152032300f, -0.688150551578044830f, 0.725435963598649810f,
-    -0.688289664834289330f,
-  0.725303972373060770f, -0.688428752784090440f, 0.725171954480117950f,
-    -0.688567815422334250f,
-  0.725039909924675370f, -0.688706852743907750f, 0.724907838711587820f,
-    -0.688845864743699020f,
-  0.724775740845711280f, -0.688984851416597040f, 0.724643616331902550f,
-    -0.689123812757491570f,
-  0.724511465175019630f, -0.689262748761273470f, 0.724379287379921190f,
-    -0.689401659422834270f,
-  0.724247082951467000f, -0.689540544737066830f, 0.724114851894517850f,
-    -0.689679404698864800f,
-  0.723982594213935520f, -0.689818239303122470f, 0.723850309914582880f,
-    -0.689957048544735390f,
-  0.723717999001323500f, -0.690095832418599950f, 0.723585661479022150f,
-    -0.690234590919613370f,
-  0.723453297352544380f, -0.690373324042674040f, 0.723320906626756970f,
-    -0.690512031782681060f,
-  0.723188489306527460f, -0.690650714134534600f, 0.723056045396724410f,
-    -0.690789371093135650f,
-  0.722923574902217700f, -0.690928002653386160f, 0.722791077827877550f,
-    -0.691066608810189220f,
-  0.722658554178575610f, -0.691205189558448450f, 0.722526003959184540f,
-    -0.691343744893068710f,
-  0.722393427174577550f, -0.691482274808955850f, 0.722260823829629310f,
-    -0.691620779301016290f,
-  0.722128193929215350f, -0.691759258364157750f, 0.721995537478211880f,
-    -0.691897711993288760f,
-  0.721862854481496340f, -0.692036140183318720f, 0.721730144943947160f,
-    -0.692174542929158140f,
-  0.721597408870443770f, -0.692312920225718220f, 0.721464646265866370f,
-    -0.692451272067911130f,
-  0.721331857135096290f, -0.692589598450650380f, 0.721199041483015720f,
-    -0.692727899368849820f,
-  0.721066199314508110f, -0.692866174817424630f, 0.720933330634457530f,
-    -0.693004424791290870f,
-  0.720800435447749190f, -0.693142649285365400f, 0.720667513759269520f,
-    -0.693280848294566040f,
-  0.720534565573905270f, -0.693419021813811760f, 0.720401590896544760f,
-    -0.693557169838022290f,
-  0.720268589732077190f, -0.693695292362118240f, 0.720135562085392420f,
-    -0.693833389381021350f,
-  0.720002507961381650f, -0.693971460889654000f, 0.719869427364936860f,
-    -0.694109506882939820f,
-  0.719736320300951030f, -0.694247527355803310f, 0.719603186774318120f,
-    -0.694385522303169740f,
-  0.719470026789932990f, -0.694523491719965520f, 0.719336840352691740f,
-    -0.694661435601117820f,
-  0.719203627467491220f, -0.694799353941554900f, 0.719070388139229190f,
-    -0.694937246736205830f,
-  0.718937122372804490f, -0.695075113980000880f, 0.718803830173116890f,
-    -0.695212955667870780f,
-  0.718670511545067230f, -0.695350771794747690f, 0.718537166493557370f,
-    -0.695488562355564440f,
-  0.718403795023489830f, -0.695626327345254870f, 0.718270397139768260f,
-    -0.695764066758753690f,
-  0.718136972847297490f, -0.695901780590996830f, 0.718003522150983180f,
-    -0.696039468836920690f,
-  0.717870045055731710f, -0.696177131491462990f, 0.717736541566450950f,
-    -0.696314768549562090f,
-  0.717603011688049080f, -0.696452380006157830f, 0.717469455425435830f,
-    -0.696589965856190370f,
-  0.717335872783521730f, -0.696727526094601200f, 0.717202263767218070f,
-    -0.696865060716332470f,
-  0.717068628381437480f, -0.697002569716327460f, 0.716934966631093130f,
-    -0.697140053089530420f,
-  0.716801278521099540f, -0.697277510830886520f, 0.716667564056371890f,
-    -0.697414942935341790f,
-  0.716533823241826680f, -0.697552349397843160f, 0.716400056082381000f,
-    -0.697689730213338800f,
-  0.716266262582953120f, -0.697827085376777290f, 0.716132442748462330f,
-    -0.697964414883108670f,
-  0.715998596583828690f, -0.698101718727283770f, 0.715864724093973500f,
-    -0.698238996904254280f,
-  0.715730825283818590f, -0.698376249408972920f, 0.715596900158287470f,
-    -0.698513476236393040f,
-  0.715462948722303760f, -0.698650677381469460f, 0.715328970980792620f,
-    -0.698787852839157670f,
-  0.715194966938680120f, -0.698925002604414150f, 0.715060936600893090f,
-    -0.699062126672196140f,
-  0.714926879972359490f, -0.699199225037462120f, 0.714792797058008240f,
-    -0.699336297695171140f,
-  0.714658687862769090f, -0.699473344640283770f, 0.714524552391572860f,
-    -0.699610365867761040f,
-  0.714390390649351390f, -0.699747361372564990f, 0.714256202641037510f,
-    -0.699884331149658760f,
-  0.714121988371564820f, -0.700021275194006250f, 0.713987747845867830f,
-    -0.700158193500572730f,
-  0.713853481068882470f, -0.700295086064323780f, 0.713719188045545240f,
-    -0.700431952880226420f,
-  0.713584868780793640f, -0.700568793943248340f, 0.713450523279566260f,
-    -0.700705609248358450f,
-  0.713316151546802610f, -0.700842398790526120f, 0.713181753587443180f,
-    -0.700979162564722370f,
-  0.713047329406429340f, -0.701115900565918660f, 0.712912879008703480f,
-    -0.701252612789087460f,
-  0.712778402399208980f, -0.701389299229202230f, 0.712643899582890210f,
-    -0.701525959881237340f,
-  0.712509370564692320f, -0.701662594740168450f, 0.712374815349561710f,
-    -0.701799203800971720f,
-  0.712240233942445510f, -0.701935787058624360f, 0.712105626348291890f,
-    -0.702072344508104630f,
-  0.711970992572050100f, -0.702208876144391870f, 0.711836332618670080f,
-    -0.702345381962465880f,
-  0.711701646493102970f, -0.702481861957308000f, 0.711566934200300700f,
-    -0.702618316123900130f,
-  0.711432195745216430f, -0.702754744457225300f, 0.711297431132803970f,
-    -0.702891146952267400f,
-  0.711162640368018350f, -0.703027523604011220f, 0.711027823455815280f,
-    -0.703163874407442770f,
-  0.710892980401151680f, -0.703300199357548730f, 0.710758111208985350f,
-    -0.703436498449316660f,
-  0.710623215884275020f, -0.703572771677735580f, 0.710488294431980470f,
-    -0.703709019037794810f,
-  0.710353346857062420f, -0.703845240524484940f, 0.710218373164482220f,
-    -0.703981436132797620f,
-  0.710083373359202800f, -0.704117605857725310f, 0.709948347446187400f,
-    -0.704253749694261470f,
-  0.709813295430400840f, -0.704389867637400410f, 0.709678217316808580f,
-    -0.704525959682137380f,
-  0.709543113110376770f, -0.704662025823468820f, 0.709407982816072980f,
-    -0.704798066056391950f,
-  0.709272826438865690f, -0.704934080375904880f, 0.709137643983724030f,
-    -0.705070068777006840f,
-  0.709002435455618250f, -0.705206031254697830f, 0.708867200859519820f,
-    -0.705341967803978840f,
-  0.708731940200400650f, -0.705477878419852100f, 0.708596653483234080f,
-    -0.705613763097320490f,
-  0.708461340712994160f, -0.705749621831387790f, 0.708326001894655890f,
-    -0.705885454617058980f,
-  0.708190637033195400f, -0.706021261449339740f, 0.708055246133589500f,
-    -0.706157042323237060f,
-  0.707919829200816310f, -0.706292797233758480f, 0.707784386239854620f,
-    -0.706428526175912790f,
-  0.707648917255684350f, -0.706564229144709510f, 0.707513422253286280f,
-    -0.706699906135159430f,
-  0.707377901237642100f, -0.706835557142273750f, 0.707242354213734710f,
-    -0.706971182161065360f,
-  0.707106781186547570f, -0.707106781186547460f, 0.706971182161065360f,
-    -0.707242354213734600f,
-  0.706835557142273860f, -0.707377901237642100f, 0.706699906135159430f,
-    -0.707513422253286170f,
-  0.706564229144709620f, -0.707648917255684350f, 0.706428526175912790f,
-    -0.707784386239854620f,
-  0.706292797233758480f, -0.707919829200816310f, 0.706157042323237060f,
-    -0.708055246133589500f,
-  0.706021261449339740f, -0.708190637033195290f, 0.705885454617058980f,
-    -0.708326001894655780f,
-  0.705749621831387790f, -0.708461340712994050f, 0.705613763097320490f,
-    -0.708596653483234080f,
-  0.705477878419852210f, -0.708731940200400650f, 0.705341967803978950f,
-    -0.708867200859519820f,
-  0.705206031254697830f, -0.709002435455618250f, 0.705070068777006840f,
-    -0.709137643983723920f,
-  0.704934080375904990f, -0.709272826438865580f, 0.704798066056391950f,
-    -0.709407982816072980f,
-  0.704662025823468930f, -0.709543113110376770f, 0.704525959682137380f,
-    -0.709678217316808470f,
-  0.704389867637400410f, -0.709813295430400840f, 0.704253749694261580f,
-    -0.709948347446187400f,
-  0.704117605857725430f, -0.710083373359202690f, 0.703981436132797730f,
-    -0.710218373164482220f,
-  0.703845240524484940f, -0.710353346857062310f, 0.703709019037794810f,
-    -0.710488294431980470f,
-  0.703572771677735580f, -0.710623215884275020f, 0.703436498449316770f,
-    -0.710758111208985350f,
-  0.703300199357548730f, -0.710892980401151680f, 0.703163874407442770f,
-    -0.711027823455815280f,
-  0.703027523604011220f, -0.711162640368018350f, 0.702891146952267400f,
-    -0.711297431132803970f,
-  0.702754744457225300f, -0.711432195745216430f, 0.702618316123900130f,
-    -0.711566934200300700f,
-  0.702481861957308000f, -0.711701646493102970f, 0.702345381962465880f,
-    -0.711836332618670080f,
-  0.702208876144391870f, -0.711970992572049990f, 0.702072344508104740f,
-    -0.712105626348291890f,
-  0.701935787058624360f, -0.712240233942445510f, 0.701799203800971720f,
-    -0.712374815349561710f,
-  0.701662594740168570f, -0.712509370564692320f, 0.701525959881237450f,
-    -0.712643899582890210f,
-  0.701389299229202230f, -0.712778402399208870f, 0.701252612789087460f,
-    -0.712912879008703370f,
-  0.701115900565918660f, -0.713047329406429230f, 0.700979162564722480f,
-    -0.713181753587443070f,
-  0.700842398790526230f, -0.713316151546802610f, 0.700705609248358450f,
-    -0.713450523279566150f,
-  0.700568793943248450f, -0.713584868780793520f, 0.700431952880226420f,
-    -0.713719188045545130f,
-  0.700295086064323780f, -0.713853481068882470f, 0.700158193500572730f,
-    -0.713987747845867830f,
-  0.700021275194006360f, -0.714121988371564710f, 0.699884331149658760f,
-    -0.714256202641037400f,
-  0.699747361372564990f, -0.714390390649351390f, 0.699610365867761040f,
-    -0.714524552391572860f,
-  0.699473344640283770f, -0.714658687862768980f, 0.699336297695171250f,
-    -0.714792797058008130f,
-  0.699199225037462120f, -0.714926879972359370f, 0.699062126672196140f,
-    -0.715060936600892980f,
-  0.698925002604414150f, -0.715194966938680010f, 0.698787852839157790f,
-    -0.715328970980792620f,
-  0.698650677381469580f, -0.715462948722303650f, 0.698513476236393040f,
-    -0.715596900158287360f,
-  0.698376249408972920f, -0.715730825283818590f, 0.698238996904254390f,
-    -0.715864724093973390f,
-  0.698101718727283880f, -0.715998596583828690f, 0.697964414883108790f,
-    -0.716132442748462330f,
-  0.697827085376777290f, -0.716266262582953120f, 0.697689730213338800f,
-    -0.716400056082380890f,
-  0.697552349397843270f, -0.716533823241826570f, 0.697414942935341790f,
-    -0.716667564056371890f,
-  0.697277510830886630f, -0.716801278521099540f, 0.697140053089530530f,
-    -0.716934966631093130f,
-  0.697002569716327460f, -0.717068628381437480f, 0.696865060716332470f,
-    -0.717202263767218070f,
-  0.696727526094601200f, -0.717335872783521730f, 0.696589965856190370f,
-    -0.717469455425435830f,
-  0.696452380006157830f, -0.717603011688049080f, 0.696314768549562200f,
-    -0.717736541566450840f,
-  0.696177131491462990f, -0.717870045055731710f, 0.696039468836920690f,
-    -0.718003522150983060f,
-  0.695901780590996830f, -0.718136972847297490f, 0.695764066758753800f,
-    -0.718270397139768260f,
-  0.695626327345254870f, -0.718403795023489720f, 0.695488562355564440f,
-    -0.718537166493557370f,
-  0.695350771794747800f, -0.718670511545067230f, 0.695212955667870890f,
-    -0.718803830173116890f,
-  0.695075113980000880f, -0.718937122372804380f, 0.694937246736205940f,
-    -0.719070388139229190f,
-  0.694799353941554900f, -0.719203627467491220f, 0.694661435601117930f,
-    -0.719336840352691740f,
-  0.694523491719965520f, -0.719470026789932990f, 0.694385522303169860f,
-    -0.719603186774318000f,
-  0.694247527355803310f, -0.719736320300951030f, 0.694109506882939820f,
-    -0.719869427364936860f,
-  0.693971460889654000f, -0.720002507961381650f, 0.693833389381021350f,
-    -0.720135562085392310f,
-  0.693695292362118350f, -0.720268589732077080f, 0.693557169838022400f,
-    -0.720401590896544760f,
-  0.693419021813811880f, -0.720534565573905270f, 0.693280848294566150f,
-    -0.720667513759269410f,
-  0.693142649285365510f, -0.720800435447749190f, 0.693004424791290870f,
-    -0.720933330634457530f,
-  0.692866174817424740f, -0.721066199314508110f, 0.692727899368849820f,
-    -0.721199041483015720f,
-  0.692589598450650380f, -0.721331857135096180f, 0.692451272067911240f,
-    -0.721464646265866370f,
-  0.692312920225718220f, -0.721597408870443660f, 0.692174542929158140f,
-    -0.721730144943947160f,
-  0.692036140183318830f, -0.721862854481496340f, 0.691897711993288760f,
-    -0.721995537478211880f,
-  0.691759258364157750f, -0.722128193929215350f, 0.691620779301016400f,
-    -0.722260823829629310f,
-  0.691482274808955850f, -0.722393427174577550f, 0.691343744893068820f,
-    -0.722526003959184430f,
-  0.691205189558448450f, -0.722658554178575610f, 0.691066608810189220f,
-    -0.722791077827877550f,
-  0.690928002653386280f, -0.722923574902217700f, 0.690789371093135760f,
-    -0.723056045396724410f,
-  0.690650714134534720f, -0.723188489306527350f, 0.690512031782681170f,
-    -0.723320906626756850f,
-  0.690373324042674040f, -0.723453297352544380f, 0.690234590919613370f,
-    -0.723585661479022040f,
-  0.690095832418599950f, -0.723717999001323390f, 0.689957048544735390f,
-    -0.723850309914582880f,
-  0.689818239303122470f, -0.723982594213935520f, 0.689679404698864800f,
-    -0.724114851894517850f,
-  0.689540544737066940f, -0.724247082951466890f, 0.689401659422834380f,
-    -0.724379287379921080f,
-  0.689262748761273470f, -0.724511465175019520f, 0.689123812757491680f,
-    -0.724643616331902550f,
-  0.688984851416597150f, -0.724775740845711280f, 0.688845864743699130f,
-    -0.724907838711587820f,
-  0.688706852743907750f, -0.725039909924675370f, 0.688567815422334360f,
-    -0.725171954480117840f,
-  0.688428752784090550f, -0.725303972373060660f, 0.688289664834289440f,
-    -0.725435963598649810f,
-  0.688150551578044830f, -0.725567928152032300f, 0.688011413020471640f,
-    -0.725699866028356120f,
-  0.687872249166685550f, -0.725831777222770370f, 0.687733060021803230f,
-    -0.725963661730424930f,
-  0.687593845590942170f, -0.726095519546470890f, 0.687454605879221030f,
-    -0.726227350666060260f,
-  0.687315340891759160f, -0.726359155084346010f, 0.687176050633676930f,
-    -0.726490932796481910f,
-  0.687036735110095660f, -0.726622683797622850f, 0.686897394326137610f,
-    -0.726754408082924910f,
-  0.686758028286925890f, -0.726886105647544970f, 0.686618636997584740f,
-    -0.727017776486640680f,
-  0.686479220463238950f, -0.727149420595371020f, 0.686339778689014630f,
-    -0.727281037968895760f,
-  0.686200311680038700f, -0.727412628602375770f, 0.686060819441438710f,
-    -0.727544192490972800f,
-  0.685921301978343670f, -0.727675729629849610f, 0.685781759295883030f,
-    -0.727807240014169960f,
-  0.685642191399187470f, -0.727938723639098620f, 0.685502598293388670f,
-    -0.728070180499801210f,
-  0.685362979983618730f, -0.728201610591444500f, 0.685223336475011210f,
-    -0.728333013909196360f,
-  0.685083667772700360f, -0.728464390448225200f, 0.684943973881821490f,
-    -0.728595740203700770f,
-  0.684804254807510620f, -0.728727063170793720f, 0.684664510554904960f,
-    -0.728858359344675690f,
-  0.684524741129142300f, -0.728989628720519310f, 0.684384946535361750f,
-    -0.729120871293498230f,
-  0.684245126778703080f, -0.729252087058786970f, 0.684105281864307080f,
-    -0.729383276011561050f,
-  0.683965411797315510f, -0.729514438146996900f, 0.683825516582870830f,
-    -0.729645573460272480f,
-  0.683685596226116690f, -0.729776681946565970f, 0.683545650732197530f,
-    -0.729907763601057140f,
-  0.683405680106258790f, -0.730038818418926150f, 0.683265684353446700f,
-    -0.730169846395354870f,
-  0.683125663478908800f, -0.730300847525525380f, 0.682985617487792850f,
-    -0.730431821804621520f,
-  0.682845546385248080f, -0.730562769227827590f, 0.682705450176424590f,
-    -0.730693689790328890f,
-  0.682565328866473250f, -0.730824583487312050f, 0.682425182460546060f,
-    -0.730955450313964360f,
-  0.682285010963795570f, -0.731086290265474230f, 0.682144814381375640f,
-    -0.731217103337031160f,
-  0.682004592718440830f, -0.731347889523825460f, 0.681864345980146780f,
-    -0.731478648821048520f,
-  0.681724074171649820f, -0.731609381223892520f, 0.681583777298107480f,
-    -0.731740086727550980f,
-  0.681443455364677990f, -0.731870765327218290f, 0.681303108376520530f,
-    -0.732001417018089520f,
-  0.681162736338795430f, -0.732132041795361290f, 0.681022339256663670f,
-    -0.732262639654230660f,
-  0.680881917135287340f, -0.732393210589896040f, 0.680741469979829090f,
-    -0.732523754597556590f,
-  0.680600997795453130f, -0.732654271672412820f, 0.680460500587323880f,
-    -0.732784761809665790f,
-  0.680319978360607200f, -0.732915225004517780f, 0.680179431120469750f,
-    -0.733045661252171970f,
-  0.680038858872079040f, -0.733176070547832740f, 0.679898261620603290f,
-    -0.733306452886705260f,
-  0.679757639371212030f, -0.733436808263995710f, 0.679616992129075560f,
-    -0.733567136674911360f,
-  0.679476319899365080f, -0.733697438114660260f, 0.679335622687252670f,
-    -0.733827712578451700f,
-  0.679194900497911200f, -0.733957960061495940f, 0.679054153336514870f,
-    -0.734088180559004040f,
-  0.678913381208238410f, -0.734218374066188170f, 0.678772584118257690f,
-    -0.734348540578261600f,
-  0.678631762071749470f, -0.734478680090438370f, 0.678490915073891250f,
-    -0.734608792597933550f,
-  0.678350043129861580f, -0.734738878095963390f, 0.678209146244839860f,
-    -0.734868936579745060f,
-  0.678068224424006600f, -0.734998968044496600f, 0.677927277672543130f,
-    -0.735128972485437180f,
-  0.677786305995631500f, -0.735258949897786730f, 0.677645309398454910f,
-    -0.735388900276766620f,
-  0.677504287886197430f, -0.735518823617598900f, 0.677363241464044030f,
-    -0.735648719915506400f,
-  0.677222170137180450f, -0.735778589165713480f, 0.677081073910793530f,
-    -0.735908431363445190f,
-  0.676939952790071240f, -0.736038246503927350f, 0.676798806780201770f,
-    -0.736168034582387330f,
-  0.676657635886374950f, -0.736297795594053060f, 0.676516440113781090f,
-    -0.736427529534153690f,
-  0.676375219467611700f, -0.736557236397919150f, 0.676233973953058950f,
-    -0.736686916180580460f,
-  0.676092703575316030f, -0.736816568877369790f, 0.675951408339577010f,
-    -0.736946194483520170f,
-  0.675810088251037060f, -0.737075792994265620f, 0.675668743314891910f,
-    -0.737205364404841190f,
-  0.675527373536338630f, -0.737334908710482790f, 0.675385978920574950f,
-    -0.737464425906427580f,
-  0.675244559472799270f, -0.737593915987913460f, 0.675103115198211530f,
-    -0.737723378950179590f,
-  0.674961646102012040f, -0.737852814788465980f, 0.674820152189402280f,
-    -0.737982223498013570f,
-  0.674678633465584540f, -0.738111605074064260f, 0.674537089935762110f,
-    -0.738240959511861310f,
-  0.674395521605139050f, -0.738370286806648510f, 0.674253928478920520f,
-    -0.738499586953671130f,
-  0.674112310562312360f, -0.738628859948174840f, 0.673970667860521620f,
-    -0.738758105785406900f,
-  0.673829000378756150f, -0.738887324460615110f, 0.673687308122224330f,
-    -0.739016515969048600f,
-  0.673545591096136100f, -0.739145680305957400f, 0.673403849305701850f,
-    -0.739274817466592520f,
-  0.673262082756132970f, -0.739403927446205760f, 0.673120291452642070f,
-    -0.739533010240050250f,
-  0.672978475400442090f, -0.739662065843379900f, 0.672836634604747410f,
-    -0.739791094251449950f,
-  0.672694769070772970f, -0.739920095459516090f, 0.672552878803734820f,
-    -0.740049069462835550f,
-  0.672410963808849900f, -0.740178016256666240f, 0.672269024091336040f,
-    -0.740306935836266940f,
-  0.672127059656411840f, -0.740435828196898020f, 0.671985070509296900f,
-    -0.740564693333820250f,
-  0.671843056655211930f, -0.740693531242295640f, 0.671701018099378320f,
-    -0.740822341917587330f,
-  0.671558954847018330f, -0.740951125354959110f, 0.671416866903355450f,
-    -0.741079881549676080f,
-  0.671274754273613490f, -0.741208610497004260f, 0.671132616963017850f,
-    -0.741337312192210660f,
-  0.670990454976794220f, -0.741465986630563290f, 0.670848268320169750f,
-    -0.741594633807331150f,
-  0.670706056998372160f, -0.741723253717784140f, 0.670563821016630040f,
-    -0.741851846357193480f,
-  0.670421560380173090f, -0.741980411720830960f, 0.670279275094231910f,
-    -0.742108949803969800f,
-  0.670136965164037760f, -0.742237460601884000f, 0.669994630594823000f,
-    -0.742365944109848460f,
-  0.669852271391821130f, -0.742494400323139180f, 0.669709887560265840f,
-    -0.742622829237033380f,
-  0.669567479105392490f, -0.742751230846809050f, 0.669425046032436910f,
-    -0.742879605147745090f,
-  0.669282588346636010f, -0.743007952135121720f, 0.669140106053227710f,
-    -0.743136271804219820f,
-  0.668997599157450270f, -0.743264564150321490f, 0.668855067664543610f,
-    -0.743392829168709970f,
-  0.668712511579748090f, -0.743521066854669120f, 0.668569930908305080f,
-    -0.743649277203484060f,
-  0.668427325655456820f, -0.743777460210440780f, 0.668284695826446670f,
-    -0.743905615870826490f,
-  0.668142041426518560f, -0.744033744179929180f, 0.667999362460917510f,
-    -0.744161845133038070f,
-  0.667856658934889440f, -0.744289918725443140f, 0.667713930853681140f,
-    -0.744417964952435620f,
-  0.667571178222540310f, -0.744545983809307250f, 0.667428401046715640f,
-    -0.744673975291351600f,
-  0.667285599331456480f, -0.744801939393862630f, 0.667142773082013310f,
-    -0.744929876112135350f,
-  0.666999922303637470f, -0.745057785441465950f, 0.666857047001581220f,
-    -0.745185667377151640f,
-  0.666714147181097670f, -0.745313521914490410f, 0.666571222847440750f,
-    -0.745441349048781680f,
-  0.666428274005865350f, -0.745569148775325430f, 0.666285300661627390f,
-    -0.745696921089422760f,
-  0.666142302819983540f, -0.745824665986375980f, 0.665999280486191500f,
-    -0.745952383461488180f,
-  0.665856233665509720f, -0.746080073510063780f, 0.665713162363197660f,
-    -0.746207736127407650f,
-  0.665570066584515560f, -0.746335371308826320f, 0.665426946334724660f,
-    -0.746462979049626770f,
-  0.665283801619087180f, -0.746590559345117310f, 0.665140632442866140f,
-    -0.746718112190607020f,
-  0.664997438811325340f, -0.746845637581406540f, 0.664854220729729660f,
-    -0.746973135512826740f,
-  0.664710978203344900f, -0.747100605980180130f, 0.664567711237437520f,
-    -0.747228048978779920f,
-  0.664424419837275180f, -0.747355464503940190f, 0.664281104008126230f,
-    -0.747482852550976570f,
-  0.664137763755260010f, -0.747610213115205150f, 0.663994399083946640f,
-    -0.747737546191943330f,
-  0.663851009999457340f, -0.747864851776509410f, 0.663707596507064120f,
-    -0.747992129864222700f,
-  0.663564158612039880f, -0.748119380450403490f, 0.663420696319658280f,
-    -0.748246603530373420f,
-  0.663277209635194100f, -0.748373799099454560f, 0.663133698563923010f,
-    -0.748500967152970430f,
-  0.662990163111121470f, -0.748628107686245330f, 0.662846603282066900f,
-    -0.748755220694604760f,
-  0.662703019082037440f, -0.748882306173375030f, 0.662559410516312400f,
-    -0.749009364117883770f,
-  0.662415777590171780f, -0.749136394523459260f, 0.662272120308896590f,
-    -0.749263397385431020f,
-  0.662128438677768720f, -0.749390372699129560f, 0.661984732702071030f,
-    -0.749517320459886170f,
-  0.661841002387086870f, -0.749644240663033480f, 0.661697247738101120f,
-    -0.749771133303904990f,
-  0.661553468760399000f, -0.749897998377835220f, 0.661409665459266940f,
-    -0.750024835880159780f,
-  0.661265837839992270f, -0.750151645806214960f, 0.661121985907862970f,
-    -0.750278428151338610f,
-  0.660978109668168060f, -0.750405182910869220f, 0.660834209126197610f,
-    -0.750531910080146410f,
-  0.660690284287242300f, -0.750658609654510590f, 0.660546335156593890f,
-    -0.750785281629303580f,
-  0.660402361739545030f, -0.750911925999867890f, 0.660258364041389050f,
-    -0.751038542761547250f,
-  0.660114342067420480f, -0.751165131909686370f, 0.659970295822934540f,
-    -0.751291693439630870f,
-  0.659826225313227430f, -0.751418227346727360f, 0.659682130543596150f,
-    -0.751544733626323570f,
-  0.659538011519338770f, -0.751671212273768430f, 0.659393868245753970f,
-    -0.751797663284411440f,
-  0.659249700728141490f, -0.751924086653603550f, 0.659105508971802200f,
-    -0.752050482376696360f,
-  0.658961292982037320f, -0.752176850449042700f, 0.658817052764149480f,
-    -0.752303190865996400f,
-  0.658672788323441890f, -0.752429503622912390f, 0.658528499665218760f,
-    -0.752555788715146390f,
-  0.658384186794785050f, -0.752682046138055230f, 0.658239849717446980f,
-    -0.752808275886996950f,
-  0.658095488438511290f, -0.752934477957330150f, 0.657951102963285630f,
-    -0.753060652344415100f,
-  0.657806693297078640f, -0.753186799043612410f, 0.657662259445200070f,
-    -0.753312918050284330f,
-  0.657517801412960120f, -0.753439009359793580f, 0.657373319205670210f,
-    -0.753565072967504190f,
-  0.657228812828642650f, -0.753691108868781210f, 0.657084282287190180f,
-    -0.753817117058990680f,
-  0.656939727586627110f, -0.753943097533499640f, 0.656795148732268070f,
-    -0.754069050287676120f,
-  0.656650545729429050f, -0.754194975316889170f, 0.656505918583426550f,
-    -0.754320872616508820f,
-  0.656361267299578000f, -0.754446742181906330f, 0.656216591883202030f,
-    -0.754572584008453840f,
-  0.656071892339617710f, -0.754698398091524390f, 0.655927168674145360f,
-    -0.754824184426492240f,
-  0.655782420892106030f, -0.754949943008732640f, 0.655637648998821820f,
-    -0.755075673833621510f,
-  0.655492852999615460f, -0.755201376896536550f, 0.655348032899810580f,
-    -0.755327052192855560f,
-  0.655203188704731930f, -0.755452699717958140f, 0.655058320419704910f,
-    -0.755578319467224540f,
-  0.654913428050056150f, -0.755703911436035880f, 0.654768511601112600f,
-    -0.755829475619774760f,
-  0.654623571078202680f, -0.755955012013824310f, 0.654478606486655350f,
-    -0.756080520613569120f,
-  0.654333617831800550f, -0.756206001414394540f, 0.654188605118969040f,
-    -0.756331454411686920f,
-  0.654043568353492640f, -0.756456879600833630f, 0.653898507540703890f,
-    -0.756582276977223470f,
-  0.653753422685936170f, -0.756707646536245670f, 0.653608313794523890f,
-    -0.756832988273290820f,
-  0.653463180871802330f, -0.756958302183750490f, 0.653318023923107670f,
-    -0.757083588263017140f,
-  0.653172842953776760f, -0.757208846506484460f, 0.653027637969147650f,
-    -0.757334076909547130f,
-  0.652882408974558960f, -0.757459279467600720f, 0.652737155975350420f,
-    -0.757584454176041810f,
-  0.652591878976862550f, -0.757709601030268080f, 0.652446577984436840f,
-    -0.757834720025678310f,
-  0.652301253003415460f, -0.757959811157672300f, 0.652155904039141700f,
-    -0.758084874421650620f,
-  0.652010531096959500f, -0.758209909813015280f, 0.651865134182214030f,
-    -0.758334917327168960f,
-  0.651719713300251020f, -0.758459896959515320f, 0.651574268456417080f,
-    -0.758584848705459500f,
-  0.651428799656059820f, -0.758709772560407390f, 0.651283306904527850f,
-    -0.758834668519765660f,
-  0.651137790207170330f, -0.758959536578942440f, 0.650992249569337660f,
-    -0.759084376733346500f,
-  0.650846684996380990f, -0.759209188978387960f, 0.650701096493652040f,
-    -0.759333973309477940f,
-  0.650555484066503990f, -0.759458729722028210f, 0.650409847720290420f,
-    -0.759583458211452010f,
-  0.650264187460365960f, -0.759708158773163440f, 0.650118503292086200f,
-    -0.759832831402577400f,
-  0.649972795220807530f, -0.759957476095110330f, 0.649827063251887100f,
-    -0.760082092846179220f,
-  0.649681307390683190f, -0.760206681651202420f, 0.649535527642554730f,
-    -0.760331242505599030f,
-  0.649389724012861770f, -0.760455775404789260f, 0.649243896506965010f,
-    -0.760580280344194340f,
-  0.649098045130226060f, -0.760704757319236920f, 0.648952169888007410f,
-    -0.760829206325340010f,
-  0.648806270785672550f, -0.760953627357928040f, 0.648660347828585840f,
-    -0.761078020412426560f,
-  0.648514401022112550f, -0.761202385484261780f, 0.648368430371618400f,
-    -0.761326722568861250f,
-  0.648222435882470420f, -0.761451031661653510f, 0.648076417560036530f,
-    -0.761575312758068000f,
-  0.647930375409685460f, -0.761699565853535270f, 0.647784309436786550f,
-    -0.761823790943486840f,
-  0.647638219646710420f, -0.761947988023355390f, 0.647492106044828100f,
-    -0.762072157088574560f,
-  0.647345968636512060f, -0.762196298134578900f, 0.647199807427135230f,
-    -0.762320411156804160f,
-  0.647053622422071650f, -0.762444496150687100f, 0.646907413626696020f,
-    -0.762568553111665380f,
-  0.646761181046383920f, -0.762692582035177870f, 0.646614924686512050f,
-    -0.762816582916664320f,
-  0.646468644552457890f, -0.762940555751565720f, 0.646322340649599590f,
-    -0.763064500535323710f,
-  0.646176012983316390f, -0.763188417263381270f, 0.646029661558988330f,
-    -0.763312305931182380f,
-  0.645883286381996440f, -0.763436166534172010f, 0.645736887457722290f,
-    -0.763559999067796150f,
-  0.645590464791548800f, -0.763683803527501870f, 0.645444018388859230f,
-    -0.763807579908737160f,
-  0.645297548255038380f, -0.763931328206951090f, 0.645151054395471270f,
-    -0.764055048417593860f,
-  0.645004536815544040f, -0.764178740536116670f, 0.644857995520643710f,
-    -0.764302404557971720f,
-  0.644711430516158420f, -0.764426040478612070f, 0.644564841807476750f,
-    -0.764549648293492150f,
-  0.644418229399988380f, -0.764673227998067140f, 0.644271593299083900f,
-    -0.764796779587793460f,
-  0.644124933510154540f, -0.764920303058128410f, 0.643978250038592660f,
-    -0.765043798404530410f,
-  0.643831542889791500f, -0.765167265622458960f, 0.643684812069144960f,
-    -0.765290704707374260f,
-  0.643538057582047850f, -0.765414115654738160f, 0.643391279433895960f,
-    -0.765537498460013070f,
-  0.643244477630085850f, -0.765660853118662390f, 0.643097652176015110f,
-    -0.765784179626150970f,
-  0.642950803077082080f, -0.765907477977944230f, 0.642803930338686100f,
-    -0.766030748169509000f,
-  0.642657033966226860f, -0.766153990196312810f, 0.642510113965105710f,
-    -0.766277204053824710f,
-  0.642363170340724320f, -0.766400389737514120f, 0.642216203098485370f,
-    -0.766523547242852100f,
-  0.642069212243792540f, -0.766646676565310380f, 0.641922197782050170f,
-    -0.766769777700361920f,
-  0.641775159718663500f, -0.766892850643480670f, 0.641628098059038860f,
-    -0.767015895390141480f,
-  0.641481012808583160f, -0.767138911935820400f, 0.641333903972704290f,
-    -0.767261900275994390f,
-  0.641186771556811250f, -0.767384860406141620f, 0.641039615566313390f,
-    -0.767507792321741270f,
-  0.640892436006621380f, -0.767630696018273270f, 0.640745232883146440f,
-    -0.767753571491219030f,
-  0.640598006201301030f, -0.767876418736060610f, 0.640450755966498140f,
-    -0.767999237748281270f,
-  0.640303482184151670f, -0.768122028523365310f, 0.640156184859676620f,
-    -0.768244791056798220f,
-  0.640008863998488440f, -0.768367525344066270f, 0.639861519606004010f,
-    -0.768490231380656750f,
-  0.639714151687640450f, -0.768612909162058270f, 0.639566760248816420f,
-    -0.768735558683760310f,
-  0.639419345294950700f, -0.768858179941253270f, 0.639271906831463510f,
-    -0.768980772930028870f,
-  0.639124444863775730f, -0.769103337645579590f, 0.638976959397309140f,
-    -0.769225874083399260f,
-  0.638829450437486400f, -0.769348382238982280f, 0.638681917989730840f,
-    -0.769470862107824560f,
-  0.638534362059466790f, -0.769593313685422940f, 0.638386782652119680f,
-    -0.769715736967275020f,
-  0.638239179773115390f, -0.769838131948879840f, 0.638091553427880930f,
-    -0.769960498625737230f,
-  0.637943903621844170f, -0.770082836993347900f, 0.637796230360433540f,
-    -0.770205147047214100f,
-  0.637648533649078810f, -0.770327428782838770f, 0.637500813493210310f,
-    -0.770449682195725960f,
-  0.637353069898259130f, -0.770571907281380700f, 0.637205302869657600f,
-    -0.770694104035309140f,
-  0.637057512412838590f, -0.770816272453018430f, 0.636909698533235870f,
-    -0.770938412530016940f,
-  0.636761861236284200f, -0.771060524261813710f, 0.636614000527419230f,
-    -0.771182607643919220f,
-  0.636466116412077180f, -0.771304662671844720f, 0.636318208895695570f,
-    -0.771426689341102590f,
-  0.636170277983712170f, -0.771548687647206300f, 0.636022323681566300f,
-    -0.771670657585670330f,
-  0.635874345994697720f, -0.771792599152010150f, 0.635726344928547180f,
-    -0.771914512341742350f,
-  0.635578320488556230f, -0.772036397150384410f, 0.635430272680167160f,
-    -0.772158253573455240f,
-  0.635282201508823530f, -0.772280081606474320f, 0.635134106979969300f,
-    -0.772401881244962340f,
-  0.634985989099049460f, -0.772523652484441330f, 0.634837847871510100f,
-    -0.772645395320433860f,
-  0.634689683302797850f, -0.772767109748463740f, 0.634541495398360130f,
-    -0.772888795764056220f,
-  0.634393284163645490f, -0.773010453362736990f, 0.634245049604103330f,
-    -0.773132082540033070f,
-  0.634096791725183740f, -0.773253683291472590f, 0.633948510532337810f,
-    -0.773375255612584470f,
-  0.633800206031017280f, -0.773496799498899050f, 0.633651878226674900f,
-    -0.773618314945947460f,
-  0.633503527124764320f, -0.773739801949261840f, 0.633355152730740060f,
-    -0.773861260504375540f,
-  0.633206755050057190f, -0.773982690606822790f, 0.633058334088172250f,
-    -0.774104092252138940f,
-  0.632909889850541860f, -0.774225465435860570f, 0.632761422342624000f,
-    -0.774346810153525020f,
-  0.632612931569877520f, -0.774468126400670860f, 0.632464417537761840f,
-    -0.774589414172837550f,
-  0.632315880251737680f, -0.774710673465565550f, 0.632167319717266030f,
-    -0.774831904274396850f,
-  0.632018735939809060f, -0.774953106594873820f, 0.631870128924829850f,
-    -0.775074280422540450f,
-  0.631721498677792370f, -0.775195425752941310f, 0.631572845204161130f,
-    -0.775316542581622410f,
-  0.631424168509401860f, -0.775437630904130430f, 0.631275468598980870f,
-    -0.775558690716013580f,
-  0.631126745478365340f, -0.775679722012820540f, 0.630977999153023660f,
-    -0.775800724790101540f,
-  0.630829229628424470f, -0.775921699043407580f, 0.630680436910038060f,
-    -0.776042644768290770f,
-  0.630531621003334600f, -0.776163561960304340f, 0.630382781913785940f,
-    -0.776284450615002400f,
-  0.630233919646864480f, -0.776405310727940390f, 0.630085034208043290f,
-    -0.776526142294674430f,
-  0.629936125602796550f, -0.776646945310762060f, 0.629787193836599200f,
-    -0.776767719771761510f,
-  0.629638238914927100f, -0.776888465673232440f, 0.629489260843256740f,
-    -0.777009183010735290f,
-  0.629340259627065750f, -0.777129871779831620f, 0.629191235271832410f,
-    -0.777250531976084070f,
-  0.629042187783036000f, -0.777371163595056200f, 0.628893117166156480f,
-    -0.777491766632312900f,
-  0.628744023426674790f, -0.777612341083419920f, 0.628594906570072660f,
-    -0.777732886943944050f,
-  0.628445766601832710f, -0.777853404209453040f, 0.628296603527438440f,
-    -0.777973892875515990f,
-  0.628147417352374120f, -0.778094352937702790f, 0.627998208082124810f,
-    -0.778214784391584420f,
-  0.627848975722176570f, -0.778335187232733090f, 0.627699720278016240f,
-    -0.778455561456721900f,
-  0.627550441755131530f, -0.778575907059124940f, 0.627401140159011160f,
-    -0.778696224035517530f,
-  0.627251815495144190f, -0.778816512381475870f, 0.627102467769021010f,
-    -0.778936772092577500f,
-  0.626953096986132770f, -0.779057003164400630f, 0.626803703151971310f,
-    -0.779177205592524680f,
-  0.626654286272029460f, -0.779297379372530300f, 0.626504846351800930f,
-    -0.779417524499998900f,
-  0.626355383396779990f, -0.779537640970513150f, 0.626205897412462130f,
-    -0.779657728779656780f,
-  0.626056388404343520f, -0.779777787923014440f, 0.625906856377921210f,
-    -0.779897818396171890f,
-  0.625757301338692900f, -0.780017820194715990f, 0.625607723292157410f,
-    -0.780137793314234500f,
-  0.625458122243814360f, -0.780257737750316590f, 0.625308498199164010f,
-    -0.780377653498552040f,
-  0.625158851163707730f, -0.780497540554531910f, 0.625009181142947460f,
-    -0.780617398913848290f,
-  0.624859488142386450f, -0.780737228572094380f, 0.624709772167528100f,
-    -0.780857029524864470f,
-  0.624560033223877320f, -0.780976801767753750f, 0.624410271316939380f,
-    -0.781096545296358410f,
-  0.624260486452220650f, -0.781216260106276090f, 0.624110678635228510f,
-    -0.781335946193104870f,
-  0.623960847871470770f, -0.781455603552444480f, 0.623810994166456130f,
-    -0.781575232179895550f,
-  0.623661117525694640f, -0.781694832071059390f, 0.623511217954696550f,
-    -0.781814403221538830f,
-  0.623361295458973340f, -0.781933945626937630f, 0.623211350044037270f,
-    -0.782053459282860300f,
-  0.623061381715401370f, -0.782172944184912900f, 0.622911390478579460f,
-    -0.782292400328702400f,
-  0.622761376339086460f, -0.782411827709836420f, 0.622611339302437730f,
-    -0.782531226323924240f,
-  0.622461279374150080f, -0.782650596166575730f, 0.622311196559740320f,
-    -0.782769937233402050f,
-  0.622161090864726930f, -0.782889249520015480f, 0.622010962294628600f,
-    -0.783008533022029110f,
-  0.621860810854965360f, -0.783127787735057310f, 0.621710636551257690f,
-    -0.783247013654715380f,
-  0.621560439389027270f, -0.783366210776619720f, 0.621410219373796150f,
-    -0.783485379096387820f,
-  0.621259976511087660f, -0.783604518609638200f, 0.621109710806425740f,
-    -0.783723629311990470f,
-  0.620959422265335180f, -0.783842711199065230f, 0.620809110893341900f,
-    -0.783961764266484010f,
-  0.620658776695972140f, -0.784080788509869950f, 0.620508419678753360f,
-    -0.784199783924846570f,
-  0.620358039847213830f, -0.784318750507038920f, 0.620207637206882430f,
-    -0.784437688252072720f,
-  0.620057211763289210f, -0.784556597155575240f, 0.619906763521964830f,
-    -0.784675477213174320f,
-  0.619756292488440660f, -0.784794328420499230f, 0.619605798668249390f,
-    -0.784913150773180020f,
-  0.619455282066924020f, -0.785031944266848080f, 0.619304742689998690f,
-    -0.785150708897135560f,
-  0.619154180543008410f, -0.785269444659675850f, 0.619003595631488770f,
-    -0.785388151550103550f,
-  0.618852987960976320f, -0.785506829564053930f, 0.618702357537008640f,
-    -0.785625478697163700f,
-  0.618551704365123860f, -0.785744098945070360f, 0.618401028450860980f,
-    -0.785862690303412600f,
-  0.618250329799760250f, -0.785981252767830150f, 0.618099608417362110f,
-    -0.786099786333963820f,
-  0.617948864309208260f, -0.786218290997455550f, 0.617798097480841140f,
-    -0.786336766753948260f,
-  0.617647307937803980f, -0.786455213599085770f, 0.617496495685640910f,
-    -0.786573631528513230f,
-  0.617345660729896940f, -0.786692020537876680f, 0.617194803076117630f,
-    -0.786810380622823490f,
-  0.617043922729849760f, -0.786928711779001700f, 0.616893019696640790f,
-    -0.787047014002060790f,
-  0.616742093982038830f, -0.787165287287650890f, 0.616591145591593230f,
-    -0.787283531631423620f,
-  0.616440174530853650f, -0.787401747029031320f, 0.616289180805370980f,
-    -0.787519933476127810f,
-  0.616138164420696910f, -0.787638090968367450f, 0.615987125382383870f,
-    -0.787756219501405950f,
-  0.615836063695985090f, -0.787874319070900110f, 0.615684979367054570f,
-    -0.787992389672507950f,
-  0.615533872401147430f, -0.788110431301888070f, 0.615382742803819330f,
-    -0.788228443954700490f,
-  0.615231590580626820f, -0.788346427626606230f, 0.615080415737127460f,
-    -0.788464382313267430f,
-  0.614929218278879590f, -0.788582308010347120f, 0.614777998211442190f,
-    -0.788700204713509660f,
-  0.614626755540375050f, -0.788818072418420170f, 0.614475490271239160f,
-    -0.788935911120745130f,
-  0.614324202409595950f, -0.789053720816151880f, 0.614172891961007990f,
-    -0.789171501500308790f,
-  0.614021558931038490f, -0.789289253168885650f, 0.613870203325251440f,
-    -0.789406975817552810f,
-  0.613718825149211830f, -0.789524669441982190f, 0.613567424408485330f,
-    -0.789642334037846340f,
-  0.613416001108638590f, -0.789759969600819070f, 0.613264555255239150f,
-    -0.789877576126575280f,
-  0.613113086853854910f, -0.789995153610791090f, 0.612961595910055170f,
-    -0.790112702049143300f,
-  0.612810082429409710f, -0.790230221437310030f, 0.612658546417489290f,
-    -0.790347711770970520f,
-  0.612506987879865570f, -0.790465173045804880f, 0.612355406822110760f,
-    -0.790582605257494460f,
-  0.612203803249798060f, -0.790700008401721610f, 0.612052177168501580f,
-    -0.790817382474169660f,
-  0.611900528583796070f, -0.790934727470523290f, 0.611748857501257400f,
-    -0.791052043386467950f,
-  0.611597163926462020f, -0.791169330217690090f, 0.611445447864987110f,
-    -0.791286587959877720f,
-  0.611293709322411010f, -0.791403816608719500f, 0.611141948304312570f,
-    -0.791521016159905220f,
-  0.610990164816271770f, -0.791638186609125770f, 0.610838358863869280f,
-    -0.791755327952073150f,
-  0.610686530452686280f, -0.791872440184440470f, 0.610534679588305320f,
-    -0.791989523301921850f,
-  0.610382806276309480f, -0.792106577300212390f, 0.610230910522282620f,
-    -0.792223602175008310f,
-  0.610078992331809620f, -0.792340597922007060f, 0.609927051710476230f,
-    -0.792457564536906970f,
-  0.609775088663868430f, -0.792574502015407580f, 0.609623103197573730f,
-    -0.792691410353209450f,
-  0.609471095317180240f, -0.792808289546014120f, 0.609319065028276820f,
-    -0.792925139589524260f,
-  0.609167012336453210f, -0.793041960479443640f, 0.609014937247299940f,
-    -0.793158752211477140f,
-  0.608862839766408200f, -0.793275514781330630f, 0.608710719899370420f,
-    -0.793392248184711100f,
-  0.608558577651779450f, -0.793508952417326660f, 0.608406413029229260f,
-    -0.793625627474886190f,
-  0.608254226037314490f, -0.793742273353100100f, 0.608102016681630550f,
-    -0.793858890047679620f,
-  0.607949784967773740f, -0.793975477554337170f, 0.607797530901341140f,
-    -0.794092035868785960f,
-  0.607645254487930830f, -0.794208564986740640f, 0.607492955733141660f,
-    -0.794325064903916520f,
-  0.607340634642572930f, -0.794441535616030590f, 0.607188291221825160f,
-    -0.794557977118800270f,
-  0.607035925476499760f, -0.794674389407944550f, 0.606883537412198580f,
-    -0.794790772479183170f,
-  0.606731127034524480f, -0.794907126328237010f, 0.606578694349081400f,
-    -0.795023450950828050f,
-  0.606426239361473550f, -0.795139746342679590f, 0.606273762077306430f,
-    -0.795256012499515500f,
-  0.606121262502186230f, -0.795372249417061190f, 0.605968740641719790f,
-    -0.795488457091042990f,
-  0.605816196501515080f, -0.795604635517188070f, 0.605663630087180490f,
-    -0.795720784691225090f,
-  0.605511041404325550f, -0.795836904608883460f, 0.605358430458560530f,
-    -0.795952995265893910f,
-  0.605205797255496500f, -0.796069056657987990f, 0.605053141800745430f,
-    -0.796185088780898440f,
-  0.604900464099919930f, -0.796301091630359110f, 0.604747764158633410f,
-    -0.796417065202104980f,
-  0.604595041982500360f, -0.796533009491872000f, 0.604442297577135970f,
-    -0.796648924495397150f,
-  0.604289530948156070f, -0.796764810208418720f, 0.604136742101177630f,
-    -0.796880666626675780f,
-  0.603983931041818020f, -0.796996493745908750f, 0.603831097775695880f,
-    -0.797112291561858920f,
-  0.603678242308430370f, -0.797228060070268700f, 0.603525364645641550f,
-    -0.797343799266881700f,
-  0.603372464792950370f, -0.797459509147442460f, 0.603219542755978440f,
-    -0.797575189707696590f,
-  0.603066598540348280f, -0.797690840943391040f, 0.602913632151683140f,
-    -0.797806462850273570f,
-  0.602760643595607220f, -0.797922055424093000f, 0.602607632877745550f,
-    -0.798037618660599410f,
-  0.602454600003723860f, -0.798153152555543750f, 0.602301544979168550f,
-    -0.798268657104678310f,
-  0.602148467809707320f, -0.798384132303756380f, 0.601995368500968130f,
-    -0.798499578148532010f,
-  0.601842247058580030f, -0.798614994634760820f, 0.601689103488173060f,
-    -0.798730381758199210f,
-  0.601535937795377730f, -0.798845739514604580f, 0.601382749985825420f,
-    -0.798961067899735760f,
-  0.601229540065148620f, -0.799076366909352350f, 0.601076308038980160f,
-    -0.799191636539215210f,
-  0.600923053912954090f, -0.799306876785086160f, 0.600769777692705230f,
-    -0.799422087642728040f,
-  0.600616479383868970f, -0.799537269107905010f, 0.600463158992081690f,
-    -0.799652421176382130f,
-  0.600309816522980430f, -0.799767543843925680f, 0.600156451982203350f,
-    -0.799882637106302810f,
-  0.600003065375389060f, -0.799997700959281910f, 0.599849656708177360f,
-    -0.800112735398632370f,
-  0.599696225986208310f, -0.800227740420124790f, 0.599542773215123390f,
-    -0.800342716019530660f,
-  0.599389298400564540f, -0.800457662192622710f, 0.599235801548174570f,
-    -0.800572578935174750f,
-  0.599082282663597310f, -0.800687466242961500f, 0.598928741752476900f,
-    -0.800802324111759110f,
-  0.598775178820458720f, -0.800917152537344300f, 0.598621593873188920f,
-    -0.801031951515495330f,
-  0.598467986916314310f, -0.801146721041991250f, 0.598314357955482600f,
-    -0.801261461112612540f,
-  0.598160706996342380f, -0.801376171723140130f, 0.598007034044542700f,
-    -0.801490852869356840f,
-  0.597853339105733910f, -0.801605504547046040f, 0.597699622185566830f,
-    -0.801720126751992330f,
-  0.597545883289693270f, -0.801834719479981310f, 0.597392122423765710f,
-    -0.801949282726799660f,
-  0.597238339593437530f, -0.802063816488235440f, 0.597084534804362740f,
-    -0.802178320760077450f,
-  0.596930708062196500f, -0.802292795538115720f, 0.596776859372594500f,
-    -0.802407240818141300f,
-  0.596622988741213330f, -0.802521656595946320f, 0.596469096173710360f,
-    -0.802636042867324150f,
-  0.596315181675743820f, -0.802750399628069160f, 0.596161245252972540f,
-    -0.802864726873976590f,
-  0.596007286911056530f, -0.802979024600843140f, 0.595853306655656390f,
-    -0.803093292804466400f,
-  0.595699304492433470f, -0.803207531480644830f, 0.595545280427049790f,
-    -0.803321740625178470f,
-  0.595391234465168730f, -0.803435920233868120f, 0.595237166612453850f,
-    -0.803550070302515570f,
-  0.595083076874569960f, -0.803664190826924090f, 0.594928965257182420f,
-    -0.803778281802897570f,
-  0.594774831765957580f, -0.803892343226241260f, 0.594620676406562240f,
-    -0.804006375092761520f,
-  0.594466499184664540f, -0.804120377398265700f, 0.594312300105932830f,
-    -0.804234350138562260f,
-  0.594158079176036800f, -0.804348293309460780f, 0.594003836400646690f,
-    -0.804462206906771840f,
-  0.593849571785433630f, -0.804576090926307000f, 0.593695285336069300f,
-    -0.804689945363879500f,
-  0.593540977058226390f, -0.804803770215302810f, 0.593386646957578480f,
-    -0.804917565476392150f,
-  0.593232295039799800f, -0.805031331142963660f, 0.593077921310565580f,
-    -0.805145067210834120f,
-  0.592923525775551410f, -0.805258773675822210f, 0.592769108440434070f,
-    -0.805372450533747060f,
-  0.592614669310891130f, -0.805486097780429120f, 0.592460208392600940f,
-    -0.805599715411689950f,
-  0.592305725691242400f, -0.805713303423352120f, 0.592151221212495640f,
-    -0.805826861811239300f,
-  0.591996694962040990f, -0.805940390571176280f, 0.591842146945560250f,
-    -0.806053889698988950f,
-  0.591687577168735550f, -0.806167359190504310f, 0.591532985637249990f,
-    -0.806280799041550370f,
-  0.591378372356787580f, -0.806394209247956240f, 0.591223737333032910f,
-    -0.806507589805552260f,
-  0.591069080571671510f, -0.806620940710169650f, 0.590914402078389520f,
-    -0.806734261957640750f,
-  0.590759701858874280f, -0.806847553543799220f, 0.590604979918813440f,
-    -0.806960815464479620f,
-  0.590450236263895920f, -0.807074047715517610f, 0.590295470899810940f,
-    -0.807187250292749850f,
-  0.590140683832248940f, -0.807300423192014450f, 0.589985875066900920f,
-    -0.807413566409150190f,
-  0.589831044609458900f, -0.807526679939997160f, 0.589676192465615420f,
-    -0.807639763780396370f,
-  0.589521318641063940f, -0.807752817926190360f, 0.589366423141498790f,
-    -0.807865842373222120f,
-  0.589211505972615070f, -0.807978837117336310f, 0.589056567140108460f,
-    -0.808091802154378260f,
-  0.588901606649675840f, -0.808204737480194720f, 0.588746624507014650f,
-    -0.808317643090633250f,
-  0.588591620717822890f, -0.808430518981542720f, 0.588436595287799900f,
-    -0.808543365148773010f,
-  0.588281548222645330f, -0.808656181588174980f, 0.588126479528059850f,
-    -0.808768968295600850f,
-  0.587971389209745120f, -0.808881725266903610f, 0.587816277273403020f,
-    -0.808994452497937560f,
-  0.587661143724736770f, -0.809107149984558130f, 0.587505988569450020f,
-    -0.809219817722621750f,
-  0.587350811813247660f, -0.809332455707985840f, 0.587195613461834910f,
-    -0.809445063936509170f,
-  0.587040393520918080f, -0.809557642404051260f, 0.586885151996203950f,
-    -0.809670191106473090f,
-  0.586729888893400500f, -0.809782710039636420f, 0.586574604218216280f,
-    -0.809895199199404450f,
-  0.586419297976360500f, -0.810007658581641140f, 0.586263970173543700f,
-    -0.810120088182211600f,
-  0.586108620815476430f, -0.810232487996982330f, 0.585953249907870680f,
-    -0.810344858021820550f,
-  0.585797857456438860f, -0.810457198252594770f, 0.585642443466894420f,
-    -0.810569508685174630f,
-  0.585487007944951450f, -0.810681789315430670f, 0.585331550896324940f,
-    -0.810794040139234730f,
-  0.585176072326730410f, -0.810906261152459670f, 0.585020572241884530f,
-    -0.811018452350979470f,
-  0.584865050647504490f, -0.811130613730669190f, 0.584709507549308500f,
-    -0.811242745287404810f,
-  0.584553942953015330f, -0.811354847017063730f, 0.584398356864344710f,
-    -0.811466918915524250f,
-  0.584242749289016980f, -0.811578960978665890f, 0.584087120232753550f,
-    -0.811690973202369050f,
-  0.583931469701276300f, -0.811802955582515360f, 0.583775797700308070f,
-    -0.811914908114987680f,
-  0.583620104235572760f, -0.812026830795669730f, 0.583464389312794430f,
-    -0.812138723620446480f,
-  0.583308652937698290f, -0.812250586585203880f, 0.583152895116010540f,
-    -0.812362419685829120f,
-  0.582997115853457700f, -0.812474222918210480f, 0.582841315155767650f,
-    -0.812585996278237020f,
-  0.582685493028668460f, -0.812697739761799490f, 0.582529649477889320f,
-    -0.812809453364789160f,
-  0.582373784509160220f, -0.812921137083098770f, 0.582217898128211790f,
-    -0.813032790912621930f,
-  0.582061990340775550f, -0.813144414849253590f, 0.581906061152583920f,
-    -0.813256008888889380f,
-  0.581750110569369760f, -0.813367573027426570f, 0.581594138596866930f,
-    -0.813479107260763220f,
-  0.581438145240810280f, -0.813590611584798510f, 0.581282130506935110f,
-    -0.813702085995432700f,
-  0.581126094400977620f, -0.813813530488567190f, 0.580970036928674880f,
-    -0.813924945060104490f,
-  0.580813958095764530f, -0.814036329705948300f, 0.580657857907985410f,
-    -0.814147684422003360f,
-  0.580501736371076600f, -0.814259009204175270f, 0.580345593490778300f,
-    -0.814370304048371070f,
-  0.580189429272831680f, -0.814481568950498610f, 0.580033243722978150f,
-    -0.814592803906467270f,
-  0.579877036846960350f, -0.814704008912187080f, 0.579720808650521560f,
-    -0.814815183963569330f,
-  0.579564559139405740f, -0.814926329056526620f, 0.579408288319357980f,
-    -0.815037444186972220f,
-  0.579251996196123550f, -0.815148529350820830f, 0.579095682775449210f,
-    -0.815259584543988280f,
-  0.578939348063081890f, -0.815370609762391290f, 0.578782992064769690f,
-    -0.815481605001947770f,
-  0.578626614786261430f, -0.815592570258576680f, 0.578470216233306740f,
-    -0.815703505528198260f,
-  0.578313796411655590f, -0.815814410806733780f, 0.578157355327059360f,
-    -0.815925286090105390f,
-  0.578000892985269910f, -0.816036131374236700f, 0.577844409392039850f,
-    -0.816146946655052160f,
-  0.577687904553122800f, -0.816257731928477390f, 0.577531378474272830f,
-    -0.816368487190439200f,
-  0.577374831161244880f, -0.816479212436865390f, 0.577218262619794920f,
-    -0.816589907663684890f,
-  0.577061672855679550f, -0.816700572866827850f, 0.576905061874655960f,
-    -0.816811208042225290f,
-  0.576748429682482520f, -0.816921813185809480f, 0.576591776284917870f,
-    -0.817032388293513880f,
-  0.576435101687721830f, -0.817142933361272970f, 0.576278405896654910f,
-    -0.817253448385022230f,
-  0.576121688917478390f, -0.817363933360698460f, 0.575964950755954330f,
-    -0.817474388284239240f,
-  0.575808191417845340f, -0.817584813151583710f, 0.575651410908915250f,
-    -0.817695207958671680f,
-  0.575494609234928230f, -0.817805572701444270f, 0.575337786401649560f,
-    -0.817915907375843740f,
-  0.575180942414845190f, -0.818026211977813440f, 0.575024077280281820f,
-    -0.818136486503297620f,
-  0.574867191003726740f, -0.818246730948241960f, 0.574710283590948450f,
-    -0.818356945308593150f,
-  0.574553355047715760f, -0.818467129580298660f, 0.574396405379798750f,
-    -0.818577283759307490f,
-  0.574239434592967890f, -0.818687407841569570f, 0.574082442692994470f,
-    -0.818797501823036010f,
-  0.573925429685650750f, -0.818907565699658950f, 0.573768395576709560f,
-    -0.819017599467391500f,
-  0.573611340371944610f, -0.819127603122188240f, 0.573454264077130400f,
-    -0.819237576660004520f,
-  0.573297166698042320f, -0.819347520076796900f, 0.573140048240456060f,
-    -0.819457433368523280f,
-  0.572982908710148680f, -0.819567316531142230f, 0.572825748112897550f,
-    -0.819677169560613760f,
-  0.572668566454481160f, -0.819786992452898990f, 0.572511363740678790f,
-    -0.819896785203959810f,
-  0.572354139977270030f, -0.820006547809759680f, 0.572196895170035580f,
-    -0.820116280266262710f,
-  0.572039629324757050f, -0.820225982569434690f, 0.571882342447216590f,
-    -0.820335654715241840f,
-  0.571725034543197120f, -0.820445296699652050f, 0.571567705618482580f,
-    -0.820554908518633890f,
-  0.571410355678857340f, -0.820664490168157460f, 0.571252984730106660f,
-    -0.820774041644193650f,
-  0.571095592778016690f, -0.820883562942714580f, 0.570938179828374360f,
-    -0.820993054059693470f,
-  0.570780745886967370f, -0.821102514991104650f, 0.570623290959583860f,
-    -0.821211945732923550f,
-  0.570465815052012990f, -0.821321346281126740f, 0.570308318170045010f,
-    -0.821430716631691760f,
-  0.570150800319470300f, -0.821540056780597610f, 0.569993261506080650f,
-    -0.821649366723823830f,
-  0.569835701735668110f, -0.821758646457351640f, 0.569678121014025710f,
-    -0.821867895977163140f,
-  0.569520519346947250f, -0.821977115279241550f, 0.569362896740227330f,
-    -0.822086304359571090f,
-  0.569205253199661200f, -0.822195463214137170f, 0.569047588731045220f,
-    -0.822304591838926350f,
-  0.568889903340175970f, -0.822413690229926390f, 0.568732197032851160f,
-    -0.822522758383125940f,
-  0.568574469814869250f, -0.822631796294514990f, 0.568416721692029390f,
-    -0.822740803960084420f,
-  0.568258952670131490f, -0.822849781375826320f, 0.568101162754976570f,
-    -0.822958728537734000f,
-  0.567943351952365670f, -0.823067645441801670f, 0.567785520268101250f,
-    -0.823176532084024860f,
-  0.567627667707986230f, -0.823285388460400110f, 0.567469794277824620f,
-    -0.823394214566925080f,
-  0.567311899983420800f, -0.823503010399598390f, 0.567153984830580100f,
-    -0.823611775954420260f,
-  0.566996048825108680f, -0.823720511227391320f, 0.566838091972813320f,
-    -0.823829216214513990f,
-  0.566680114279501710f, -0.823937890911791370f, 0.566522115750982100f,
-    -0.824046535315227760f,
-  0.566364096393063950f, -0.824155149420828570f, 0.566206056211556840f,
-    -0.824263733224600450f,
-  0.566047995212271560f, -0.824372286722551250f, 0.565889913401019570f,
-    -0.824480809910689500f,
-  0.565731810783613230f, -0.824589302785025290f, 0.565573687365865440f,
-    -0.824697765341569470f,
-  0.565415543153589770f, -0.824806197576334330f, 0.565257378152600910f,
-    -0.824914599485333080f,
-  0.565099192368714090f, -0.825022971064580220f, 0.564940985807745320f,
-    -0.825131312310090960f,
-  0.564782758475511400f, -0.825239623217882130f, 0.564624510377830120f,
-    -0.825347903783971380f,
-  0.564466241520519500f, -0.825456154004377440f, 0.564307951909398750f,
-    -0.825564373875120490f,
-  0.564149641550287680f, -0.825672563392221390f, 0.563991310449007080f,
-    -0.825780722551702430f,
-  0.563832958611378170f, -0.825888851349586780f, 0.563674586043223180f,
-    -0.825996949781898970f,
-  0.563516192750364910f, -0.826105017844664610f, 0.563357778738627020f,
-    -0.826213055533910110f,
-  0.563199344013834090f, -0.826321062845663420f, 0.563040888581811230f,
-    -0.826429039775953390f,
-  0.562882412448384550f, -0.826536986320809960f, 0.562723915619380400f,
-    -0.826644902476264210f,
-  0.562565398100626560f, -0.826752788238348520f, 0.562406859897951140f,
-    -0.826860643603096080f,
-  0.562248301017183150f, -0.826968468566541490f, 0.562089721464152480f,
-    -0.827076263124720270f,
-  0.561931121244689470f, -0.827184027273669020f, 0.561772500364625450f,
-    -0.827291761009425810f,
-  0.561613858829792420f, -0.827399464328029350f, 0.561455196646023280f,
-    -0.827507137225519830f,
-  0.561296513819151470f, -0.827614779697938400f, 0.561137810355011530f,
-    -0.827722391741327220f,
-  0.560979086259438260f, -0.827829973351729810f, 0.560820341538267540f,
-    -0.827937524525190870f,
-  0.560661576197336030f, -0.828045045257755800f, 0.560502790242481060f,
-    -0.828152535545471410f,
-  0.560343983679540860f, -0.828259995384385550f, 0.560185156514354080f,
-    -0.828367424770547480f,
-  0.560026308752760380f, -0.828474823700007130f, 0.559867440400600320f,
-    -0.828582192168815790f,
-  0.559708551463714790f, -0.828689530173025710f, 0.559549641947945870f,
-    -0.828796837708690610f,
-  0.559390711859136140f, -0.828904114771864870f, 0.559231761203129010f,
-    -0.829011361358604430f,
-  0.559072789985768480f, -0.829118577464965980f, 0.558913798212899770f,
-    -0.829225763087007570f,
-  0.558754785890368310f, -0.829332918220788250f, 0.558595753024020760f,
-    -0.829440042862368170f,
-  0.558436699619704100f, -0.829547137007808800f, 0.558277625683266330f,
-    -0.829654200653172640f,
-  0.558118531220556100f, -0.829761233794523050f, 0.557959416237422960f,
-    -0.829868236427924840f,
-  0.557800280739717100f, -0.829975208549443840f, 0.557641124733289420f,
-    -0.830082150155146970f,
-  0.557481948223991660f, -0.830189061241102370f, 0.557322751217676160f,
-    -0.830295941803379070f,
-  0.557163533720196340f, -0.830402791838047550f, 0.557004295737406060f,
-    -0.830509611341179070f,
-  0.556845037275160100f, -0.830616400308846200f, 0.556685758339313890f,
-    -0.830723158737122880f,
-  0.556526458935723720f, -0.830829886622083570f, 0.556367139070246490f,
-    -0.830936583959804410f,
-  0.556207798748739930f, -0.831043250746362320f, 0.556048437977062720f,
-    -0.831149886977835430f,
-  0.555889056761073920f, -0.831256492650303210f, 0.555729655106633520f,
-    -0.831363067759845920f,
-  0.555570233019602290f, -0.831469612302545240f, 0.555410790505841740f,
-    -0.831576126274483630f,
-  0.555251327571214090f, -0.831682609671745120f, 0.555091844221582420f,
-    -0.831789062490414400f,
-  0.554932340462810370f, -0.831895484726577590f, 0.554772816300762580f,
-    -0.832001876376321840f,
-  0.554613271741304040f, -0.832108237435735480f, 0.554453706790301040f,
-    -0.832214567900907980f,
-  0.554294121453620110f, -0.832320867767929680f, 0.554134515737128910f,
-    -0.832427137032892280f,
-  0.553974889646695610f, -0.832533375691888680f, 0.553815243188189090f,
-    -0.832639583741012770f,
-  0.553655576367479310f, -0.832745761176359460f, 0.553495889190436570f,
-    -0.832851907994024980f,
-  0.553336181662932410f, -0.832958024190106670f, 0.553176453790838460f,
-    -0.833064109760702890f,
-  0.553016705580027580f, -0.833170164701913190f, 0.552856937036373290f,
-    -0.833276189009838240f,
-  0.552697148165749770f, -0.833382182680579730f, 0.552537338974032120f,
-    -0.833488145710240770f,
-  0.552377509467096070f, -0.833594078094925140f, 0.552217659650817930f,
-    -0.833699979830738290f,
-  0.552057789531074980f, -0.833805850913786340f, 0.551897899113745320f,
-    -0.833911691340176730f,
-  0.551737988404707450f, -0.834017501106018130f, 0.551578057409841000f,
-    -0.834123280207419990f,
-  0.551418106135026060f, -0.834229028640493420f, 0.551258134586143700f,
-    -0.834334746401350080f,
-  0.551098142769075430f, -0.834440433486103190f, 0.550938130689703880f,
-    -0.834546089890866760f,
-  0.550778098353912230f, -0.834651715611756330f, 0.550618045767584330f,
-    -0.834757310644888230f,
-  0.550457972936604810f, -0.834862874986380010f, 0.550297879866859190f,
-    -0.834968408632350450f,
-  0.550137766564233630f, -0.835073911578919300f, 0.549977633034615000f,
-    -0.835179383822207580f,
-  0.549817479283891020f, -0.835284825358337370f, 0.549657305317949980f,
-    -0.835390236183431780f,
-  0.549497111142680960f, -0.835495616293615350f, 0.549336896763974010f,
-    -0.835600965685013410f,
-  0.549176662187719770f, -0.835706284353752600f, 0.549016407419809390f,
-    -0.835811572295960590f,
-  0.548856132466135290f, -0.835916829507766360f, 0.548695837332590090f,
-    -0.836022055985299880f,
-  0.548535522025067390f, -0.836127251724692160f, 0.548375186549461600f,
-    -0.836232416722075600f,
-  0.548214830911667780f, -0.836337550973583530f, 0.548054455117581880f,
-    -0.836442654475350380f,
-  0.547894059173100190f, -0.836547727223511890f, 0.547733643084120200f,
-    -0.836652769214204950f,
-  0.547573206856539870f, -0.836757780443567190f, 0.547412750496257930f,
-    -0.836862760907737810f,
-  0.547252274009174090f, -0.836967710602857020f, 0.547091777401188530f,
-    -0.837072629525066000f,
-  0.546931260678202190f, -0.837177517670507190f, 0.546770723846116800f,
-    -0.837282375035324320f,
-  0.546610166910834860f, -0.837387201615661940f, 0.546449589878259760f,
-    -0.837491997407665890f,
-  0.546288992754295210f, -0.837596762407483040f, 0.546128375544846060f,
-    -0.837701496611261700f,
-  0.545967738255817680f, -0.837806200015150940f, 0.545807080893116140f,
-    -0.837910872615301060f,
-  0.545646403462648590f, -0.838015514407863700f, 0.545485705970322530f,
-    -0.838120125388991500f,
-  0.545324988422046460f, -0.838224705554837970f, 0.545164250823729320f,
-    -0.838329254901558300f,
-  0.545003493181281160f, -0.838433773425308340f, 0.544842715500612470f,
-    -0.838538261122245170f,
-  0.544681917787634530f, -0.838642717988527300f, 0.544521100048259710f,
-    -0.838747144020313920f,
-  0.544360262288400400f, -0.838851539213765760f, 0.544199404513970420f,
-    -0.838955903565044350f,
-  0.544038526730883930f, -0.839060237070312630f, 0.543877628945055980f,
-    -0.839164539725734570f,
-  0.543716711162402390f, -0.839268811527475230f, 0.543555773388839650f,
-    -0.839373052471700690f,
-  0.543394815630284800f, -0.839477262554578550f, 0.543233837892656000f,
-    -0.839581441772277120f,
-  0.543072840181871850f, -0.839685590120966110f, 0.542911822503851730f,
-    -0.839789707596816260f,
-  0.542750784864516000f, -0.839893794195999410f, 0.542589727269785270f,
-    -0.839997849914688730f,
-  0.542428649725581360f, -0.840101874749058400f, 0.542267552237826520f,
-    -0.840205868695283580f,
-  0.542106434812444030f, -0.840309831749540770f, 0.541945297455357470f,
-    -0.840413763908007480f,
-  0.541784140172491660f, -0.840517665166862440f, 0.541622962969771640f,
-    -0.840621535522285690f,
-  0.541461765853123560f, -0.840725374970458070f, 0.541300548828474120f,
-    -0.840829183507561640f,
-  0.541139311901750910f, -0.840932961129779670f, 0.540978055078882190f,
-    -0.841036707833296650f,
-  0.540816778365796670f, -0.841140423614298080f, 0.540655481768424260f,
-    -0.841244108468970580f,
-  0.540494165292695230f, -0.841347762393501950f, 0.540332828944540820f,
-    -0.841451385384081260f,
-  0.540171472729892970f, -0.841554977436898330f, 0.540010096654684020f,
-    -0.841658538548144760f,
-  0.539848700724847700f, -0.841762068714012490f, 0.539687284946317570f,
-    -0.841865567930695340f,
-  0.539525849325029010f, -0.841969036194387680f, 0.539364393866917150f,
-    -0.842072473501285450f,
-  0.539202918577918240f, -0.842175879847585570f, 0.539041423463969550f,
-    -0.842279255229485880f,
-  0.538879908531008420f, -0.842382599643185960f, 0.538718373784973670f,
-    -0.842485913084885630f,
-  0.538556819231804210f, -0.842589195550786600f, 0.538395244877439950f,
-    -0.842692447037091560f,
-  0.538233650727821700f, -0.842795667540004120f, 0.538072036788890600f,
-    -0.842898857055729310f,
-  0.537910403066588990f, -0.843002015580472830f, 0.537748749566859470f,
-    -0.843105143110442050f,
-  0.537587076295645510f, -0.843208239641845440f, 0.537425383258891660f,
-    -0.843311305170892030f,
-  0.537263670462542530f, -0.843414339693792760f, 0.537101937912544240f,
-    -0.843517343206759080f,
-  0.536940185614843020f, -0.843620315706004040f, 0.536778413575385920f,
-    -0.843723257187741550f,
-  0.536616621800121150f, -0.843826167648186740f, 0.536454810294997090f,
-    -0.843929047083555870f,
-  0.536292979065963180f, -0.844031895490066410f, 0.536131128118969350f,
-    -0.844134712863936930f,
-  0.535969257459966710f, -0.844237499201387020f, 0.535807367094906620f,
-    -0.844340254498637590f,
-  0.535645457029741090f, -0.844442978751910660f, 0.535483527270423370f,
-    -0.844545671957429240f,
-  0.535321577822907010f, -0.844648334111417820f, 0.535159608693146720f,
-    -0.844750965210101510f,
-  0.534997619887097260f, -0.844853565249707010f, 0.534835611410714670f,
-    -0.844956134226462100f,
-  0.534673583269955510f, -0.845058672136595470f, 0.534511535470777010f,
-    -0.845161178976337140f,
-  0.534349468019137520f, -0.845263654741918220f, 0.534187380920995600f,
-    -0.845366099429570970f,
-  0.534025274182310380f, -0.845468513035528830f, 0.533863147809042650f,
-    -0.845570895556026270f,
-  0.533701001807152960f, -0.845673246987299070f, 0.533538836182603120f,
-    -0.845775567325583900f,
-  0.533376650941355560f, -0.845877856567118890f, 0.533214446089372960f,
-    -0.845980114708143270f,
-  0.533052221632619670f, -0.846082341744896940f, 0.532889977577059690f,
-    -0.846184537673621670f,
-  0.532727713928658810f, -0.846286702490559710f, 0.532565430693382580f,
-    -0.846388836191954930f,
-  0.532403127877198010f, -0.846490938774052020f, 0.532240805486072330f,
-    -0.846593010233097190f,
-  0.532078463525973540f, -0.846695050565337450f, 0.531916102002870760f,
-    -0.846797059767020910f,
-  0.531753720922733320f, -0.846899037834397350f, 0.531591320291531780f,
-    -0.847000984763716880f,
-  0.531428900115236910f, -0.847102900551231500f, 0.531266460399820390f,
-    -0.847204785193193980f,
-  0.531104001151255000f, -0.847306638685858320f, 0.530941522375513510f,
-    -0.847408461025479730f,
-  0.530779024078570250f, -0.847510252208314330f, 0.530616506266399450f,
-    -0.847612012230619660f,
-  0.530453968944976320f, -0.847713741088654270f, 0.530291412120277420f,
-    -0.847815438778677930f,
-  0.530128835798278850f, -0.847917105296951410f, 0.529966239984958620f,
-    -0.848018740639736810f,
-  0.529803624686294830f, -0.848120344803297120f, 0.529640989908265910f,
-    -0.848221917783896990f,
-  0.529478335656852090f, -0.848323459577801530f, 0.529315661938033140f,
-    -0.848424970181277600f,
-  0.529152968757790720f, -0.848526449590592650f, 0.528990256122106040f,
-    -0.848627897802015860f,
-  0.528827524036961980f, -0.848729314811817010f, 0.528664772508341540f,
-    -0.848830700616267530f,
-  0.528502001542228480f, -0.848932055211639610f, 0.528339211144607690f,
-    -0.849033378594206690f,
-  0.528176401321464370f, -0.849134670760243630f, 0.528013572078784740f,
-    -0.849235931706025960f,
-  0.527850723422555460f, -0.849337161427830670f, 0.527687855358763720f,
-    -0.849438359921935950f,
-  0.527524967893398200f, -0.849539527184620890f, 0.527362061032447430f,
-    -0.849640663212165910f,
-  0.527199134781901390f, -0.849741768000852440f, 0.527036189147750190f,
-    -0.849842841546963210f,
-  0.526873224135984700f, -0.849943883846782210f, 0.526710239752597010f,
-    -0.850044894896594070f,
-  0.526547236003579330f, -0.850145874692685210f, 0.526384212894925210f,
-    -0.850246823231342710f,
-  0.526221170432628170f, -0.850347740508854980f, 0.526058108622682760f,
-    -0.850448626521511650f,
-  0.525895027471084740f, -0.850549481265603370f, 0.525731926983829640f,
-    -0.850650304737422200f,
-  0.525568807166914680f, -0.850751096933260790f, 0.525405668026336810f,
-    -0.850851857849413640f,
-  0.525242509568094710f, -0.850952587482175730f, 0.525079331798186890f,
-    -0.851053285827843790f,
-  0.524916134722612890f, -0.851153952882715340f, 0.524752918347373360f,
-    -0.851254588643089120f,
-  0.524589682678468840f, -0.851355193105265200f, 0.524426427721901510f,
-    -0.851455766265544310f,
-  0.524263153483673470f, -0.851556308120228870f, 0.524099859969787810f,
-    -0.851656818665622370f,
-  0.523936547186248600f, -0.851757297898029120f, 0.523773215139060170f,
-    -0.851857745813754840f,
-  0.523609863834228030f, -0.851958162409106380f, 0.523446493277757940f,
-    -0.852058547680391580f,
-  0.523283103475656430f, -0.852158901623919830f, 0.523119694433931250f,
-    -0.852259224236001090f,
-  0.522956266158590140f, -0.852359515512947090f, 0.522792818655642200f,
-    -0.852459775451070100f,
-  0.522629351931096720f, -0.852560004046683970f, 0.522465865990963900f,
-    -0.852660201296103760f,
-  0.522302360841254700f, -0.852760367195645300f, 0.522138836487980650f,
-    -0.852860501741625860f,
-  0.521975292937154390f, -0.852960604930363630f, 0.521811730194788550f,
-    -0.853060676758178320f,
-  0.521648148266897090f, -0.853160717221390420f, 0.521484547159494550f,
-    -0.853260726316321770f,
-  0.521320926878595550f, -0.853360704039295430f, 0.521157287430216610f,
-    -0.853460650386635320f,
-  0.520993628820373810f, -0.853560565354666840f, 0.520829951055084780f,
-    -0.853660448939716270f,
-  0.520666254140367270f, -0.853760301138111300f, 0.520502538082239790f,
-    -0.853860121946180660f,
-  0.520338802886721960f, -0.853959911360254060f, 0.520175048559833760f,
-    -0.854059669376662780f,
-  0.520011275107596040f, -0.854159395991738730f, 0.519847482536030300f,
-    -0.854259091201815420f,
-  0.519683670851158520f, -0.854358755003227440f, 0.519519840059003870f,
-    -0.854458387392310060f,
-  0.519355990165589530f, -0.854557988365400530f, 0.519192121176940360f,
-    -0.854657557918836460f,
-  0.519028233099080970f, -0.854757096048957110f, 0.518864325938037000f,
-    -0.854856602752102850f,
-  0.518700399699835170f, -0.854956078024614820f, 0.518536454390502110f,
-    -0.855055521862835950f,
-  0.518372490016066220f, -0.855154934263109620f, 0.518208506582555460f,
-    -0.855254315221781080f,
-  0.518044504095999340f, -0.855353664735196030f, 0.517880482562427800f,
-    -0.855452982799701830f,
-  0.517716441987871150f, -0.855552269411646970f, 0.517552382378360990f,
-    -0.855651524567380690f,
-  0.517388303739929060f, -0.855750748263253920f, 0.517224206078608310f,
-    -0.855849940495618240f,
-  0.517060089400432130f, -0.855949101260826790f, 0.516895953711434260f,
-    -0.856048230555233820f,
-  0.516731799017649980f, -0.856147328375194470f, 0.516567625325114350f,
-    -0.856246394717065210f,
-  0.516403432639863990f, -0.856345429577203610f, 0.516239220967935620f,
-    -0.856444432951968480f,
-  0.516074990315366630f, -0.856543404837719960f, 0.515910740688195650f,
-    -0.856642345230818720f,
-  0.515746472092461380f, -0.856741254127627470f, 0.515582184534203790f,
-    -0.856840131524509220f,
-  0.515417878019463150f, -0.856938977417828650f, 0.515253552554280290f,
-    -0.857037791803951680f,
-  0.515089208144697270f, -0.857136574679244870f, 0.514924844796756490f,
-    -0.857235326040076460f,
-  0.514760462516501200f, -0.857334045882815590f, 0.514596061309975040f,
-    -0.857432734203832700f,
-  0.514431641183222930f, -0.857531390999499040f, 0.514267202142289830f,
-    -0.857630016266187620f,
-  0.514102744193221660f, -0.857728610000272120f, 0.513938267342065490f,
-    -0.857827172198127320f,
-  0.513773771594868030f, -0.857925702856129790f, 0.513609256957677900f,
-    -0.858024201970656540f,
-  0.513444723436543570f, -0.858122669538086020f, 0.513280171037514330f,
-    -0.858221105554798250f,
-  0.513115599766640560f, -0.858319510017173440f, 0.512951009629972860f,
-    -0.858417882921594040f,
-  0.512786400633563070f, -0.858516224264442740f, 0.512621772783463100f,
-    -0.858614534042104080f,
-  0.512457126085725800f, -0.858712812250963520f, 0.512292460546404980f,
-    -0.858811058887407500f,
-  0.512127776171554690f, -0.858909273947823900f, 0.511963072967230200f,
-    -0.859007457428601410f,
-  0.511798350939487000f, -0.859105609326130340f, 0.511633610094381350f,
-    -0.859203729636801920f,
-  0.511468850437970520f, -0.859301818357008360f, 0.511304071976311890f,
-    -0.859399875483143450f,
-  0.511139274715464390f, -0.859497901011601620f, 0.510974458661486720f,
-    -0.859595894938779080f,
-  0.510809623820439040f, -0.859693857261072610f, 0.510644770198381730f,
-    -0.859791787974880540f,
-  0.510479897801375700f, -0.859889687076602290f, 0.510315006635483350f,
-    -0.859987554562638200f,
-  0.510150096706766700f, -0.860085390429390140f, 0.509985168021289570f,
-    -0.860183194673260880f,
-  0.509820220585115560f, -0.860280967290654510f, 0.509655254404309250f,
-    -0.860378708277976130f,
-  0.509490269484936360f, -0.860476417631632070f, 0.509325265833062480f,
-    -0.860574095348029980f,
-  0.509160243454754750f, -0.860671741423578380f, 0.508995202356080310f,
-    -0.860769355854687060f,
-  0.508830142543106990f, -0.860866938637767310f, 0.508665064021904260f,
-    -0.860964489769230900f,
-  0.508499966798540810f, -0.861062009245491480f, 0.508334850879087470f,
-    -0.861159497062963350f,
-  0.508169716269614710f, -0.861256953218062060f, 0.508004562976194010f,
-    -0.861354377707204800f,
-  0.507839391004897940f, -0.861451770526809210f, 0.507674200361798890f,
-    -0.861549131673294720f,
-  0.507508991052970870f, -0.861646461143081300f, 0.507343763084487920f,
-    -0.861743758932590700f,
-  0.507178516462425290f, -0.861841025038245330f, 0.507013251192858340f,
-    -0.861938259456469180f,
-  0.506847967281863320f, -0.862035462183687210f, 0.506682664735517600f,
-    -0.862132633216325380f,
-  0.506517343559898530f, -0.862229772550811240f, 0.506352003761084800f,
-    -0.862326880183573060f,
-  0.506186645345155450f, -0.862423956111040500f, 0.506021268318189830f,
-    -0.862521000329644520f,
-  0.505855872686268860f, -0.862618012835816740f, 0.505690458455473340f,
-    -0.862714993625990690f,
-  0.505525025631885510f, -0.862811942696600330f, 0.505359574221587390f,
-    -0.862908860044081290f,
-  0.505194104230662240f, -0.863005745664870210f, 0.505028615665194300f,
-    -0.863102599555404800f,
-  0.504863108531267480f, -0.863199421712124160f, 0.504697582834967680f,
-    -0.863296212131468230f,
-  0.504532038582380380f, -0.863392970809878310f, 0.504366475779592150f,
-    -0.863489697743797140f,
-  0.504200894432690560f, -0.863586392929667990f, 0.504035294547763080f,
-    -0.863683056363935940f,
-  0.503869676130898950f, -0.863779688043046610f, 0.503704039188186960f,
-    -0.863876287963447510f,
-  0.503538383725717580f, -0.863972856121586700f, 0.503372709749581150f,
-    -0.864069392513913680f,
-  0.503207017265869030f, -0.864165897136879300f, 0.503041306280673450f,
-    -0.864262369986934950f,
-  0.502875576800086880f, -0.864358811060534030f, 0.502709828830203100f,
-    -0.864455220354130250f,
-  0.502544062377115800f, -0.864551597864179230f, 0.502378277446919870f,
-    -0.864647943587137480f,
-  0.502212474045710900f, -0.864744257519462380f, 0.502046652179584660f,
-    -0.864840539657612980f,
-  0.501880811854638400f, -0.864936789998049020f, 0.501714953076969230f,
-    -0.865033008537231750f,
-  0.501549075852675390f, -0.865129195271623690f, 0.501383180187855880f,
-    -0.865225350197688090f,
-  0.501217266088609950f, -0.865321473311889800f, 0.501051333561038040f,
-    -0.865417564610694410f,
-  0.500885382611240940f, -0.865513624090568980f, 0.500719413245319880f,
-    -0.865609651747981880f,
-  0.500553425469377640f, -0.865705647579402270f, 0.500387419289516580f,
-    -0.865801611581300760f,
-  0.500221394711840680f, -0.865897543750148820f, 0.500055351742453860f,
-    -0.865993444082419520f,
-  0.499889290387461380f, -0.866089312574586770f, 0.499723210652968710f,
-    -0.866185149223125730f,
-  0.499557112545081890f, -0.866280954024512990f, 0.499390996069908220f,
-    -0.866376726975225830f,
-  0.499224861233555030f, -0.866472468071743050f, 0.499058708042130930f,
-    -0.866568177310544360f,
-  0.498892536501744750f, -0.866663854688111020f, 0.498726346618505960f,
-    -0.866759500200925290f,
-  0.498560138398525200f, -0.866855113845470320f, 0.498393911847913150f,
-    -0.866950695618231020f,
-  0.498227666972781870f, -0.867046245515692650f, 0.498061403779243520f,
-    -0.867141763534342360f,
-  0.497895122273410930f, -0.867237249670668400f, 0.497728822461398100f,
-    -0.867332703921159690f,
-  0.497562504349319090f, -0.867428126282306920f, 0.497396167943289340f,
-    -0.867523516750601460f,
-  0.497229813249424340f, -0.867618875322536230f, 0.497063440273840310f,
-    -0.867714201994605140f,
-  0.496897049022654640f, -0.867809496763303210f, 0.496730639501984710f,
-    -0.867904759625126920f,
-  0.496564211717949340f, -0.867999990576573400f, 0.496397765676667160f,
-    -0.868095189614141670f,
-  0.496231301384258310f, -0.868190356734331310f, 0.496064818846843060f,
-    -0.868285491933643240f,
-  0.495898318070542240f, -0.868380595208579800f, 0.495731799061478020f,
-    -0.868475666555644120f,
-  0.495565261825772490f, -0.868570705971340900f, 0.495398706369549080f,
-    -0.868665713452175580f,
-  0.495232132698931350f, -0.868760688994655190f, 0.495065540820043610f,
-    -0.868855632595287750f,
-  0.494898930739011310f, -0.868950544250582380f, 0.494732302461959820f,
-    -0.869045423957049530f,
-  0.494565655995016010f, -0.869140271711200560f, 0.494398991344306760f,
-    -0.869235087509548250f,
-  0.494232308515959730f, -0.869329871348606730f, 0.494065607516103730f,
-    -0.869424623224890780f,
-  0.493898888350867430f, -0.869519343134916970f, 0.493732151026381070f,
-    -0.869614031075202300f,
-  0.493565395548774880f, -0.869708687042265560f, 0.493398621924179830f,
-    -0.869803311032626650f,
-  0.493231830158728070f, -0.869897903042806340f, 0.493065020258551650f,
-    -0.869992463069326870f,
-  0.492898192229784090f, -0.870086991108711350f, 0.492731346078558840f,
-    -0.870181487157484560f,
-  0.492564481811010650f, -0.870275951212171830f, 0.492397599433274550f,
-    -0.870370383269300160f,
-  0.492230698951486080f, -0.870464783325397670f, 0.492063780371782060f,
-    -0.870559151376993250f,
-  0.491896843700299240f, -0.870653487420617540f, 0.491729888943175820f,
-    -0.870747791452801790f,
-  0.491562916106550060f, -0.870842063470078860f, 0.491395925196560830f,
-    -0.870936303468982760f,
-  0.491228916219348330f, -0.871030511446048260f, 0.491061889181052590f,
-    -0.871124687397811900f,
-  0.490894844087815140f, -0.871218831320810900f, 0.490727780945777570f,
-    -0.871312943211583920f,
-  0.490560699761082080f, -0.871407023066670950f, 0.490393600539872130f,
-    -0.871501070882612530f,
-  0.490226483288291100f, -0.871595086655951090f, 0.490059348012483910f,
-    -0.871689070383229740f,
-  0.489892194718595300f, -0.871783022060993010f, 0.489725023412770970f,
-    -0.871876941685786890f,
-  0.489557834101157550f, -0.871970829254157700f, 0.489390626789901920f,
-    -0.872064684762653970f,
-  0.489223401485152030f, -0.872158508207824480f, 0.489056158193055980f,
-    -0.872252299586219860f,
-  0.488888896919763230f, -0.872346058894391540f, 0.488721617671423250f,
-    -0.872439786128892280f,
-  0.488554320454186230f, -0.872533481286276060f, 0.488387005274203590f,
-    -0.872627144363097960f,
-  0.488219672137626740f, -0.872720775355914300f, 0.488052321050608310f,
-    -0.872814374261282390f,
-  0.487884952019301210f, -0.872907941075760970f, 0.487717565049858860f,
-    -0.873001475795909920f,
-  0.487550160148436050f, -0.873094978418290090f, 0.487382737321187310f,
-    -0.873188448939463790f,
-  0.487215296574268820f, -0.873281887355994210f, 0.487047837913836550f,
-    -0.873375293664446000f,
-  0.486880361346047400f, -0.873468667861384880f, 0.486712866877059340f,
-    -0.873562009943377740f,
-  0.486545354513030270f, -0.873655319906992630f, 0.486377824260119500f,
-    -0.873748597748798870f,
-  0.486210276124486530f, -0.873841843465366750f, 0.486042710112291390f,
-    -0.873935057053268130f,
-  0.485875126229695420f, -0.874028238509075630f, 0.485707524482859750f,
-    -0.874121387829363330f,
-  0.485539904877947020f, -0.874214505010706300f, 0.485372267421119770f,
-    -0.874307590049680950f,
-  0.485204612118541880f, -0.874400642942864790f, 0.485036938976377450f,
-    -0.874493663686836450f,
-  0.484869248000791120f, -0.874586652278176110f, 0.484701539197948730f,
-    -0.874679608713464510f,
-  0.484533812574016120f, -0.874772532989284150f, 0.484366068135160480f,
-    -0.874865425102218210f,
-  0.484198305887549140f, -0.874958285048851540f, 0.484030525837350010f,
-    -0.875051112825769970f,
-  0.483862727990732320f, -0.875143908429560250f, 0.483694912353865080f,
-    -0.875236671856810870f,
-  0.483527078932918740f, -0.875329403104110780f, 0.483359227734063980f,
-    -0.875422102168050830f,
-  0.483191358763471910f, -0.875514769045222740f, 0.483023472027315050f,
-    -0.875607403732219240f,
-  0.482855567531765670f, -0.875700006225634600f, 0.482687645282997510f,
-    -0.875792576522063880f,
-  0.482519705287184520f, -0.875885114618103700f, 0.482351747550501030f,
-    -0.875977620510351660f,
-  0.482183772079122830f, -0.876070094195406600f, 0.482015778879225530f,
-    -0.876162535669868460f,
-  0.481847767956986080f, -0.876254944930338400f, 0.481679739318581490f,
-    -0.876347321973419020f,
-  0.481511692970189920f, -0.876439666795713610f, 0.481343628917989870f,
-    -0.876531979393827100f,
-  0.481175547168160360f, -0.876624259764365310f, 0.481007447726881640f,
-    -0.876716507903935400f,
-  0.480839330600333900f, -0.876808723809145760f, 0.480671195794698690f,
-    -0.876900907476605650f,
-  0.480503043316157670f, -0.876993058902925780f, 0.480334873170893070f,
-    -0.877085178084718310f,
-  0.480166685365088440f, -0.877177265018595940f, 0.479998479904927220f,
-    -0.877269319701173170f,
-  0.479830256796594250f, -0.877361342129065140f, 0.479662016046274340f,
-    -0.877453332298888560f,
-  0.479493757660153060f, -0.877545290207261240f, 0.479325481644417130f,
-    -0.877637215850802120f,
-  0.479157188005253310f, -0.877729109226131570f, 0.478988876748849550f,
-    -0.877820970329870500f,
-  0.478820547881394050f, -0.877912799158641730f, 0.478652201409075550f,
-    -0.878004595709069080f,
-  0.478483837338084080f, -0.878096359977777130f, 0.478315455674609480f,
-    -0.878188091961392250f,
-  0.478147056424843120f, -0.878279791656541460f, 0.477978639594976110f,
-    -0.878371459059853590f,
-  0.477810205191201040f, -0.878463094167957870f, 0.477641753219710590f,
-    -0.878554696977485340f,
-  0.477473283686698060f, -0.878646267485068130f, 0.477304796598358010f,
-    -0.878737805687339280f,
-  0.477136291960884750f, -0.878829311580933360f, 0.476967769780474230f,
-    -0.878920785162485840f,
-  0.476799230063322250f, -0.879012226428633410f, 0.476630672815625380f,
-    -0.879103635376014330f,
-  0.476462098043581310f, -0.879195012001267370f, 0.476293505753387750f,
-    -0.879286356301033250f,
-  0.476124895951243630f, -0.879377668271953180f, 0.475956268643348220f,
-    -0.879468947910670100f,
-  0.475787623835901120f, -0.879560195213827890f, 0.475618961535103410f,
-    -0.879651410178071470f,
-  0.475450281747155870f, -0.879742592800047410f, 0.475281584478260800f,
-    -0.879833743076402940f,
-  0.475112869734620470f, -0.879924861003786860f, 0.474944137522437860f,
-    -0.880015946578848960f,
-  0.474775387847917230f, -0.880106999798240360f, 0.474606620717262560f,
-    -0.880198020658613190f,
-  0.474437836136679340f, -0.880289009156620890f, 0.474269034112372920f,
-    -0.880379965288918260f,
-  0.474100214650550020f, -0.880470889052160750f, 0.473931377757417560f,
-    -0.880561780443005590f,
-  0.473762523439182850f, -0.880652639458111010f, 0.473593651702054640f,
-    -0.880743466094136230f,
-  0.473424762552241530f, -0.880834260347742040f, 0.473255855995953380f,
-    -0.880925022215589880f,
-  0.473086932039400220f, -0.881015751694342760f, 0.472917990688792760f,
-    -0.881106448780665130f,
-  0.472749031950342900f, -0.881197113471221980f, 0.472580055830262250f,
-    -0.881287745762680100f,
-  0.472411062334764100f, -0.881378345651706810f, 0.472242051470061650f,
-    -0.881468913134971330f,
-  0.472073023242368660f, -0.881559448209143780f, 0.471903977657900320f,
-    -0.881649950870895260f,
-  0.471734914722871430f, -0.881740421116898320f, 0.471565834443498480f,
-    -0.881830858943826620f,
-  0.471396736825997810f, -0.881921264348354940f, 0.471227621876586400f,
-    -0.882011637327159590f,
-  0.471058489601482610f, -0.882101977876917580f, 0.470889340006904520f,
-    -0.882192285994307430f,
-  0.470720173099071710f, -0.882282561676008600f, 0.470550988884203490f,
-    -0.882372804918702290f,
-  0.470381787368520710f, -0.882463015719070040f, 0.470212568558244280f,
-    -0.882553194073795400f,
-  0.470043332459595620f, -0.882643339979562790f, 0.469874079078797470f,
-    -0.882733453433057540f,
-  0.469704808422072460f, -0.882823534430966730f, 0.469535520495644510f,
-    -0.882913582969978020f,
-  0.469366215305737630f, -0.883003599046780720f, 0.469196892858576630f,
-    -0.883093582658065370f,
-  0.469027553160387240f, -0.883183533800523280f, 0.468858196217395330f,
-    -0.883273452470847430f,
-  0.468688822035827960f, -0.883363338665731580f, 0.468519430621912420f,
-    -0.883453192381870920f,
-  0.468350021981876530f, -0.883543013615961880f, 0.468180596121949400f,
-    -0.883632802364701760f,
-  0.468011153048359830f, -0.883722558624789660f, 0.467841692767338220f,
-    -0.883812282392925090f,
-  0.467672215285114710f, -0.883901973665809470f, 0.467502720607920920f,
-    -0.883991632440144890f,
-  0.467333208741988530f, -0.884081258712634990f, 0.467163679693549770f,
-    -0.884170852479984500f,
-  0.466994133468838110f, -0.884260413738899080f, 0.466824570074086950f,
-    -0.884349942486086120f,
-  0.466654989515530970f, -0.884439438718253700f, 0.466485391799405010f,
-    -0.884528902432111350f,
-  0.466315776931944480f, -0.884618333624369920f, 0.466146144919386000f,
-    -0.884707732291740930f,
-  0.465976495767966130f, -0.884797098430937790f, 0.465806829483922770f,
-    -0.884886432038674560f,
-  0.465637146073493770f, -0.884975733111666660f, 0.465467445542917800f,
-    -0.885065001646630930f,
-  0.465297727898434650f, -0.885154237640285110f, 0.465127993146283950f,
-    -0.885243441089348270f,
-  0.464958241292706740f, -0.885332611990540590f, 0.464788472343944160f,
-    -0.885421750340583570f,
-  0.464618686306237820f, -0.885510856136199950f, 0.464448883185830770f,
-    -0.885599929374113360f,
-  0.464279062988965760f, -0.885688970051048960f, 0.464109225721887010f,
-    -0.885777978163732940f,
-  0.463939371390838460f, -0.885866953708892790f, 0.463769500002065680f,
-    -0.885955896683257030f,
-  0.463599611561814120f, -0.886044807083555490f, 0.463429706076329880f,
-    -0.886133684906519340f,
-  0.463259783551860260f, -0.886222530148880640f, 0.463089843994652470f,
-    -0.886311342807372890f,
-  0.462919887410955130f, -0.886400122878730490f, 0.462749913807016850f,
-    -0.886488870359689600f,
-  0.462579923189086810f, -0.886577585246987040f, 0.462409915563415540f,
-    -0.886666267537360890f,
-  0.462239890936253280f, -0.886754917227550950f, 0.462069849313851810f,
-    -0.886843534314297300f,
-  0.461899790702462840f, -0.886932118794342080f, 0.461729715108338770f,
-    -0.887020670664428360f,
-  0.461559622537733190f, -0.887109189921300060f, 0.461389512996899450f,
-    -0.887197676561702900f,
-  0.461219386492092430f, -0.887286130582383150f, 0.461049243029567010f,
-    -0.887374551980088740f,
-  0.460879082615578690f, -0.887462940751568840f, 0.460708905256384190f,
-    -0.887551296893573370f,
-  0.460538710958240010f, -0.887639620402853930f, 0.460368499727404070f,
-    -0.887727911276163020f,
-  0.460198271570134270f, -0.887816169510254550f, 0.460028026492689700f,
-    -0.887904395101883240f,
-  0.459857764501329650f, -0.887992588047805560f, 0.459687485602313870f,
-    -0.888080748344778900f,
-  0.459517189801903590f, -0.888168875989561620f, 0.459346877106359570f,
-    -0.888256970978913870f,
-  0.459176547521944150f, -0.888345033309596240f, 0.459006201054919680f,
-    -0.888433062978371320f,
-  0.458835837711549120f, -0.888521059982002260f, 0.458665457498096670f,
-    -0.888609024317253750f,
-  0.458495060420826220f, -0.888696955980891710f, 0.458324646486003300f,
-    -0.888784854969682850f,
-  0.458154215699893230f, -0.888872721280395520f, 0.457983768068762180f,
-    -0.888960554909799310f,
-  0.457813303598877290f, -0.889048355854664570f, 0.457642822296505770f,
-    -0.889136124111763240f,
-  0.457472324167916110f, -0.889223859677868210f, 0.457301809219376800f,
-    -0.889311562549753850f,
-  0.457131277457156980f, -0.889399232724195520f, 0.456960728887527030f,
-    -0.889486870197969790f,
-  0.456790163516757220f, -0.889574474967854580f, 0.456619581351118960f,
-    -0.889662047030628790f,
-  0.456448982396883860f, -0.889749586383072890f, 0.456278366660324670f,
-    -0.889837093021967900f,
-  0.456107734147714220f, -0.889924566944096720f, 0.455937084865326030f,
-    -0.890012008146243260f,
-  0.455766418819434750f, -0.890099416625192210f, 0.455595736016314920f,
-    -0.890186792377730240f,
-  0.455425036462242420f, -0.890274135400644480f, 0.455254320163493210f,
-    -0.890361445690723730f,
-  0.455083587126343840f, -0.890448723244757880f, 0.454912837357072050f,
-    -0.890535968059537830f,
-  0.454742070861955450f, -0.890623180131855930f, 0.454571287647273000f,
-    -0.890710359458505520f,
-  0.454400487719303750f, -0.890797506036281490f, 0.454229671084327320f,
-    -0.890884619861979530f,
-  0.454058837748624540f, -0.890971700932396750f, 0.453887987718476050f,
-    -0.891058749244331590f,
-  0.453717121000163930f, -0.891145764794583180f, 0.453546237599970260f,
-    -0.891232747579952520f,
-  0.453375337524177750f, -0.891319697597241390f, 0.453204420779070300f,
-    -0.891406614843252900f,
-  0.453033487370931580f, -0.891493499314791380f, 0.452862537306046810f,
-    -0.891580351008662290f,
-  0.452691570590700860f, -0.891667169921672390f, 0.452520587231180100f,
-    -0.891753956050629460f,
-  0.452349587233771000f, -0.891840709392342720f, 0.452178570604760410f,
-    -0.891927429943622510f,
-  0.452007537350436530f, -0.892014117701280360f, 0.451836487477087430f,
-    -0.892100772662129170f,
-  0.451665420991002540f, -0.892187394822982480f, 0.451494337898471210f,
-    -0.892273984180655730f,
-  0.451323238205783520f, -0.892360540731965360f, 0.451152121919230710f,
-    -0.892447064473728680f,
-  0.450980989045103810f, -0.892533555402764690f, 0.450809839589695340f,
-    -0.892620013515893040f,
-  0.450638673559297760f, -0.892706438809935280f, 0.450467490960204110f,
-    -0.892792831281713610f,
-  0.450296291798708730f, -0.892879190928051680f, 0.450125076081105750f,
-    -0.892965517745774260f,
-  0.449953843813690580f, -0.893051811731707450f, 0.449782595002758860f,
-    -0.893138072882678210f,
-  0.449611329654606600f, -0.893224301195515320f, 0.449440047775531260f,
-    -0.893310496667048090f,
-  0.449268749371829920f, -0.893396659294107610f, 0.449097434449801100f,
-    -0.893482789073525850f,
-  0.448926103015743260f, -0.893568886002136020f, 0.448754755075956020f,
-    -0.893654950076772430f,
-  0.448583390636739300f, -0.893740981294271040f, 0.448412009704393430f,
-    -0.893826979651468620f,
-  0.448240612285220000f, -0.893912945145203250f, 0.448069198385520340f,
-    -0.893998877772314240f,
-  0.447897768011597310f, -0.894084777529641990f, 0.447726321169753750f,
-    -0.894170644414028270f,
-  0.447554857866293010f, -0.894256478422316040f, 0.447383378107519710f,
-    -0.894342279551349480f,
-  0.447211881899738260f, -0.894428047797973800f, 0.447040369249254500f,
-    -0.894513783159035620f,
-  0.446868840162374330f, -0.894599485631382580f, 0.446697294645404090f,
-    -0.894685155211863980f,
-  0.446525732704651400f, -0.894770791897329550f, 0.446354154346423840f,
-    -0.894856395684630930f,
-  0.446182559577030120f, -0.894941966570620750f, 0.446010948402779110f,
-    -0.895027504552152630f,
-  0.445839320829980350f, -0.895113009626081760f, 0.445667676864944350f,
-    -0.895198481789264200f,
-  0.445496016513981740f, -0.895283921038557580f, 0.445324339783404240f,
-    -0.895369327370820310f,
-  0.445152646679523590f, -0.895454700782912450f, 0.444980937208652780f,
-    -0.895540041271694840f,
-  0.444809211377105000f, -0.895625348834030000f, 0.444637469191193790f,
-    -0.895710623466781320f,
-  0.444465710657234110f, -0.895795865166813420f, 0.444293935781540580f,
-    -0.895881073930992370f,
-  0.444122144570429260f, -0.895966249756185110f, 0.443950337030216250f,
-    -0.896051392639260040f,
-  0.443778513167218220f, -0.896136502577086770f, 0.443606672987753080f,
-    -0.896221579566535920f,
-  0.443434816498138430f, -0.896306623604479660f, 0.443262943704693380f,
-    -0.896391634687790820f,
-  0.443091054613736990f, -0.896476612813344010f, 0.442919149231588980f,
-    -0.896561557978014960f,
-  0.442747227564570130f, -0.896646470178680150f, 0.442575289619001170f,
-    -0.896731349412217880f,
-  0.442403335401204130f, -0.896816195675507190f, 0.442231364917501090f,
-    -0.896901008965428680f,
-  0.442059378174214760f, -0.896985789278863970f, 0.441887375177668960f,
-    -0.897070536612695870f,
-  0.441715355934187310f, -0.897155250963808550f, 0.441543320450094920f,
-    -0.897239932329087050f,
-  0.441371268731716620f, -0.897324580705418320f, 0.441199200785378660f,
-    -0.897409196089689720f,
-  0.441027116617407340f, -0.897493778478790190f, 0.440855016234129430f,
-    -0.897578327869610230f,
-  0.440682899641873020f, -0.897662844259040750f, 0.440510766846965880f,
-    -0.897747327643974690f,
-  0.440338617855737300f, -0.897831778021305650f, 0.440166452674516480f,
-    -0.897916195387928550f,
-  0.439994271309633260f, -0.898000579740739880f, 0.439822073767418610f,
-    -0.898084931076636780f,
-  0.439649860054203420f, -0.898169249392518080f, 0.439477630176319860f,
-    -0.898253534685283570f,
-  0.439305384140100060f, -0.898337786951834190f, 0.439133121951876930f,
-    -0.898422006189072530f,
-  0.438960843617984430f, -0.898506192393901840f, 0.438788549144756290f,
-    -0.898590345563227030f,
-  0.438616238538527710f, -0.898674465693953820f, 0.438443911805633860f,
-    -0.898758552782989440f,
-  0.438271568952410480f, -0.898842606827242260f, 0.438099209985194580f,
-    -0.898926627823621870f,
-  0.437926834910322860f, -0.899010615769039070f, 0.437754443734133470f,
-    -0.899094570660405770f,
-  0.437582036462964340f, -0.899178492494635330f, 0.437409613103154850f,
-    -0.899262381268642000f,
-  0.437237173661044200f, -0.899346236979341460f, 0.437064718142972370f,
-    -0.899430059623650860f,
-  0.436892246555280470f, -0.899513849198487870f, 0.436719758904309310f,
-    -0.899597605700772180f,
-  0.436547255196401250f, -0.899681329127423930f, 0.436374735437898510f,
-    -0.899765019475365020f,
-  0.436202199635143950f, -0.899848676741518580f, 0.436029647794481670f,
-    -0.899932300922808400f,
-  0.435857079922255470f, -0.900015892016160280f, 0.435684496024810520f,
-    -0.900099450018500340f,
-  0.435511896108492170f, -0.900182974926756700f, 0.435339280179646070f,
-    -0.900266466737858480f,
-  0.435166648244619370f, -0.900349925448735600f, 0.434994000309758710f,
-    -0.900433351056319830f,
-  0.434821336381412350f, -0.900516743557543520f, 0.434648656465928430f,
-    -0.900600102949340790f,
-  0.434475960569655710f, -0.900683429228646860f, 0.434303248698944100f,
-    -0.900766722392397860f,
-  0.434130520860143310f, -0.900849982437531450f, 0.433957777059604480f,
-    -0.900933209360986200f,
-  0.433785017303678520f, -0.901016403159702330f, 0.433612241598717640f,
-    -0.901099563830620950f,
-  0.433439449951074200f, -0.901182691370684410f, 0.433266642367100940f,
-    -0.901265785776836580f,
-  0.433093818853152010f, -0.901348847046022030f, 0.432920979415581220f,
-    -0.901431875175186970f,
-  0.432748124060743760f, -0.901514870161278630f, 0.432575252794994810f,
-    -0.901597832001245660f,
-  0.432402365624690140f, -0.901680760692037730f, 0.432229462556186770f,
-    -0.901763656230605610f,
-  0.432056543595841450f, -0.901846518613901860f, 0.431883608750012300f,
-    -0.901929347838879350f,
-  0.431710658025057370f, -0.902012143902493070f, 0.431537691427335500f,
-    -0.902094906801698900f,
-  0.431364708963206440f, -0.902177636533453510f, 0.431191710639030000f,
-    -0.902260333094715540f,
-  0.431018696461167080f, -0.902342996482444200f, 0.430845666435978820f,
-    -0.902425626693600270f,
-  0.430672620569826860f, -0.902508223725145830f, 0.430499558869073930f,
-    -0.902590787574043870f,
-  0.430326481340082610f, -0.902673318237258830f, 0.430153387989216930f,
-    -0.902755815711756120f,
-  0.429980278822840570f, -0.902838279994502830f, 0.429807153847318770f,
-    -0.902920711082466630f,
-  0.429634013069016500f, -0.903003108972617040f, 0.429460856494299490f,
-    -0.903085473661924600f,
-  0.429287684129534720f, -0.903167805147360610f, 0.429114495981088690f,
-    -0.903250103425898400f,
-  0.428941292055329550f, -0.903332368494511820f, 0.428768072358625240f,
-    -0.903414600350176290f,
-  0.428594836897344400f, -0.903496798989868450f, 0.428421585677856760f,
-    -0.903578964410565950f,
-  0.428248318706531910f, -0.903661096609247980f, 0.428075035989740780f,
-    -0.903743195582894620f,
-  0.427901737533854240f, -0.903825261328487390f, 0.427728423345243860f,
-    -0.903907293843009050f,
-  0.427555093430282200f, -0.903989293123443340f, 0.427381747795341770f,
-    -0.904071259166775440f,
-  0.427208386446796370f, -0.904153191969991670f, 0.427035009391019790f,
-    -0.904235091530079750f,
-  0.426861616634386490f, -0.904316957844028320f, 0.426688208183271970f,
-    -0.904398790908827350f,
-  0.426514784044051520f, -0.904480590721468250f, 0.426341344223101880f,
-    -0.904562357278943190f,
-  0.426167888726799620f, -0.904644090578246240f, 0.425994417561522450f,
-    -0.904725790616371930f,
-  0.425820930733648300f, -0.904807457390316540f, 0.425647428249555590f,
-    -0.904889090897077470f,
-  0.425473910115623910f, -0.904970691133653250f, 0.425300376338232590f,
-    -0.905052258097043590f,
-  0.425126826923762410f, -0.905133791784249580f, 0.424953261878594060f,
-    -0.905215292192273480f,
-  0.424779681209108810f, -0.905296759318118820f, 0.424606084921689220f,
-    -0.905378193158789980f,
-  0.424432473022717420f, -0.905459593711293250f, 0.424258845518577010f,
-    -0.905540960972635480f,
-  0.424085202415651670f, -0.905622294939825160f, 0.423911543720325580f,
-    -0.905703595609872010f,
-  0.423737869438983950f, -0.905784862979786440f, 0.423564179578011960f,
-    -0.905866097046580940f,
-  0.423390474143796100f, -0.905947297807268460f, 0.423216753142722780f,
-    -0.906028465258863490f,
-  0.423043016581179100f, -0.906109599398381980f, 0.422869264465553170f,
-    -0.906190700222840540f,
-  0.422695496802232950f, -0.906271767729257660f, 0.422521713597607870f,
-    -0.906352801914652280f,
-  0.422347914858067000f, -0.906433802776045460f, 0.422174100590000820f,
-    -0.906514770310458800f,
-  0.422000270799799790f, -0.906595704514915330f, 0.421826425493854910f,
-    -0.906676605386439460f,
-  0.421652564678558380f, -0.906757472922056550f, 0.421478688360302220f,
-    -0.906838307118793540f,
-  0.421304796545479700f, -0.906919107973678030f, 0.421130889240484140f,
-    -0.906999875483739610f,
-  0.420956966451709440f, -0.907080609646008450f, 0.420783028185550630f,
-    -0.907161310457516250f,
-  0.420609074448402510f, -0.907241977915295930f, 0.420435105246661220f,
-    -0.907322612016381310f,
-  0.420261120586723050f, -0.907403212757808000f, 0.420087120474984590f,
-    -0.907483780136612570f,
-  0.419913104917843730f, -0.907564314149832520f, 0.419739073921698180f,
-    -0.907644814794507090f,
-  0.419565027492946940f, -0.907725282067676330f, 0.419390965637989050f,
-    -0.907805715966381820f,
-  0.419216888363223960f, -0.907886116487666150f, 0.419042795675052480f,
-    -0.907966483628573240f,
-  0.418868687579875110f, -0.908046817386148340f, 0.418694564084093610f,
-    -0.908127117757437600f,
-  0.418520425194109700f, -0.908207384739488700f, 0.418346270916326310f,
-    -0.908287618329350450f,
-  0.418172101257146430f, -0.908367818524072780f, 0.417997916222973550f,
-    -0.908447985320707250f,
-  0.417823715820212380f, -0.908528118716306120f, 0.417649500055267410f,
-    -0.908608218707923190f,
-  0.417475268934544340f, -0.908688285292613360f, 0.417301022464449060f,
-    -0.908768318467432780f,
-  0.417126760651387870f, -0.908848318229439120f, 0.416952483501768280f,
-    -0.908928284575690640f,
-  0.416778191021997590f, -0.909008217503247450f, 0.416603883218484410f,
-    -0.909088117009170580f,
-  0.416429560097637320f, -0.909167983090522270f, 0.416255221665865480f,
-    -0.909247815744366310f,
-  0.416080867929579320f, -0.909327614967767260f, 0.415906498895188770f,
-    -0.909407380757791260f,
-  0.415732114569105420f, -0.909487113111505430f, 0.415557714957740580f,
-    -0.909566812025978220f,
-  0.415383300067506290f, -0.909646477498279540f, 0.415208869904815650f,
-    -0.909726109525480160f,
-  0.415034424476081630f, -0.909805708104652220f, 0.414859963787718390f,
-    -0.909885273232869160f,
-  0.414685487846140010f, -0.909964804907205660f, 0.414510996657761810f,
-    -0.910044303124737390f,
-  0.414336490228999210f, -0.910123767882541570f, 0.414161968566268080f,
-    -0.910203199177696540f,
-  0.413987431675985510f, -0.910282597007281760f, 0.413812879564568300f,
-    -0.910361961368377990f,
-  0.413638312238434560f, -0.910441292258067140f, 0.413463729704002580f,
-    -0.910520589673432630f,
-  0.413289131967690960f, -0.910599853611558930f, 0.413114519035919560f,
-    -0.910679084069531570f,
-  0.412939890915108020f, -0.910758281044437570f, 0.412765247611677320f,
-    -0.910837444533365010f,
-  0.412590589132048380f, -0.910916574533403240f, 0.412415915482642730f,
-    -0.910995671041643140f,
-  0.412241226669883000f, -0.911074734055176250f, 0.412066522700191560f,
-    -0.911153763571095900f,
-  0.411891803579992220f, -0.911232759586496190f, 0.411717069315708670f,
-    -0.911311722098472670f,
-  0.411542319913765280f, -0.911390651104122320f, 0.411367555380587340f,
-    -0.911469546600543020f,
-  0.411192775722600160f, -0.911548408584833990f, 0.411017980946230270f,
-    -0.911627237054095650f,
-  0.410843171057903910f, -0.911706032005429880f, 0.410668346064048780f,
-    -0.911784793435939430f,
-  0.410493505971092520f, -0.911863521342728520f, 0.410318650785463260f,
-    -0.911942215722902570f,
-  0.410143780513590350f, -0.912020876573568230f, 0.409968895161902820f,
-    -0.912099503891833470f,
-  0.409793994736831200f, -0.912178097674807060f, 0.409619079244805840f,
-    -0.912256657919599650f,
-  0.409444148692257590f, -0.912335184623322750f, 0.409269203085618700f,
-    -0.912413677783089020f,
-  0.409094242431320920f, -0.912492137396012650f, 0.408919266735797480f,
-    -0.912570563459208730f,
-  0.408744276005481520f, -0.912648955969793900f, 0.408569270246806780f,
-    -0.912727314924885900f,
-  0.408394249466208110f, -0.912805640321603500f, 0.408219213670120100f,
-    -0.912883932157067200f,
-  0.408044162864978740f, -0.912962190428398100f, 0.407869097057219960f,
-    -0.913040415132719160f,
-  0.407694016253280170f, -0.913118606267154130f, 0.407518920459597030f,
-    -0.913196763828828200f,
-  0.407343809682607970f, -0.913274887814867760f, 0.407168683928751610f,
-    -0.913352978222400250f,
-  0.406993543204466460f, -0.913431035048554720f, 0.406818387516192370f,
-    -0.913509058290461140f,
-  0.406643216870369140f, -0.913587047945250810f, 0.406468031273437000f,
-    -0.913665004010056350f,
-  0.406292830731837470f, -0.913742926482011390f, 0.406117615252011790f,
-    -0.913820815358251100f,
-  0.405942384840402570f, -0.913898670635911680f, 0.405767139503452220f,
-    -0.913976492312130520f,
-  0.405591879247603870f, -0.914054280384046460f, 0.405416604079301750f,
-    -0.914132034848799460f,
-  0.405241314004989860f, -0.914209755703530690f, 0.405066009031113390f,
-    -0.914287442945382440f,
-  0.404890689164117750f, -0.914365096571498450f, 0.404715354410448650f,
-    -0.914442716579023870f,
-  0.404540004776553110f, -0.914520302965104450f, 0.404364640268877810f,
-    -0.914597855726887790f,
-  0.404189260893870750f, -0.914675374861522390f, 0.404013866657980060f,
-    -0.914752860366158100f,
-  0.403838457567654130f, -0.914830312237946090f, 0.403663033629342750f,
-    -0.914907730474038620f,
-  0.403487594849495310f, -0.914985115071589310f, 0.403312141234562660f,
-    -0.915062466027752760f,
-  0.403136672790995240f, -0.915139783339685260f, 0.402961189525244960f,
-    -0.915217067004543750f,
-  0.402785691443763640f, -0.915294317019487050f, 0.402610178553003680f,
-    -0.915371533381674760f,
-  0.402434650859418540f, -0.915448716088267830f, 0.402259108369461440f,
-    -0.915525865136428530f,
-  0.402083551089587040f, -0.915602980523320230f, 0.401907979026249860f,
-    -0.915680062246107650f,
-  0.401732392185905010f, -0.915757110301956720f, 0.401556790575008650f,
-    -0.915834124688034710f,
-  0.401381174200016790f, -0.915911105401509880f, 0.401205543067386760f,
-    -0.915988052439551840f,
-  0.401029897183575790f, -0.916064965799331610f, 0.400854236555041650f,
-    -0.916141845478021350f,
-  0.400678561188243350f, -0.916218691472794110f, 0.400502871089639500f,
-    -0.916295503780824800f,
-  0.400327166265690150f, -0.916372282399289140f, 0.400151446722855300f,
-    -0.916449027325364040f,
-  0.399975712467595390f, -0.916525738556228100f, 0.399799963506372090f,
-    -0.916602416089060680f,
-  0.399624199845646790f, -0.916679059921042700f, 0.399448421491882260f,
-    -0.916755670049355990f,
-  0.399272628451540930f, -0.916832246471183890f, 0.399096820731086600f,
-    -0.916908789183710990f,
-  0.398920998336983020f, -0.916985298184122890f, 0.398745161275694480f,
-    -0.917061773469606820f,
-  0.398569309553686360f, -0.917138215037350710f, 0.398393443177423920f,
-    -0.917214622884544250f,
-  0.398217562153373620f, -0.917290997008377910f, 0.398041666488001930f,
-    -0.917367337406043810f,
-  0.397865756187775750f, -0.917443644074735220f, 0.397689831259163240f,
-    -0.917519917011646260f,
-  0.397513891708632330f, -0.917596156213972950f, 0.397337937542652120f,
-    -0.917672361678911750f,
-  0.397161968767691720f, -0.917748533403661250f, 0.396985985390220900f,
-    -0.917824671385420570f,
-  0.396809987416710420f, -0.917900775621390390f, 0.396633974853630830f,
-    -0.917976846108772730f,
-  0.396457947707453960f, -0.918052882844770380f, 0.396281905984651680f,
-    -0.918128885826587910f,
-  0.396105849691696320f, -0.918204855051430900f, 0.395929778835061360f,
-    -0.918280790516506130f,
-  0.395753693421220080f, -0.918356692219021720f, 0.395577593456646950f,
-    -0.918432560156186790f,
-  0.395401478947816300f, -0.918508394325212250f, 0.395225349901203730f,
-    -0.918584194723309540f,
-  0.395049206323284880f, -0.918659961347691900f, 0.394873048220535760f,
-    -0.918735694195573550f,
-  0.394696875599433670f, -0.918811393264169940f, 0.394520688466455550f,
-    -0.918887058550697970f,
-  0.394344486828079650f, -0.918962690052375630f, 0.394168270690784250f,
-    -0.919038287766421940f,
-  0.393992040061048100f, -0.919113851690057770f, 0.393815794945351130f,
-    -0.919189381820504470f,
-  0.393639535350172880f, -0.919264878154985250f, 0.393463261281994380f,
-    -0.919340340690724230f,
-  0.393286972747296570f, -0.919415769424946960f, 0.393110669752560760f,
-    -0.919491164354880100f,
-  0.392934352304269600f, -0.919566525477751530f, 0.392758020408905280f,
-    -0.919641852790790470f,
-  0.392581674072951530f, -0.919717146291227360f, 0.392405313302891860f,
-    -0.919792405976293750f,
-  0.392228938105210370f, -0.919867631843222950f, 0.392052548486392200f,
-    -0.919942823889248640f,
-  0.391876144452922350f, -0.920017982111606570f, 0.391699726011287050f,
-    -0.920093106507533070f,
-  0.391523293167972350f, -0.920168197074266450f, 0.391346845929465610f,
-    -0.920243253809045370f,
-  0.391170384302253980f, -0.920318276709110480f, 0.390993908292825380f,
-    -0.920393265771703550f,
-  0.390817417907668610f, -0.920468220994067110f, 0.390640913153272370f,
-    -0.920543142373445480f,
-  0.390464394036126650f, -0.920618029907083860f, 0.390287860562721360f,
-    -0.920692883592229010f,
-  0.390111312739546910f, -0.920767703426128790f, 0.389934750573094790f,
-    -0.920842489406032080f,
-  0.389758174069856410f, -0.920917241529189520f, 0.389581583236324360f,
-    -0.920991959792852310f,
-  0.389404978078991100f, -0.921066644194273530f, 0.389228358604349730f,
-    -0.921141294730707270f,
-  0.389051724818894500f, -0.921215911399408730f, 0.388875076729119250f,
-    -0.921290494197634540f,
-  0.388698414341519250f, -0.921365043122642340f, 0.388521737662589740f,
-    -0.921439558171691320f,
-  0.388345046698826300f, -0.921514039342041900f, 0.388168341456725850f,
-    -0.921588486630955380f,
-  0.387991621942784910f, -0.921662900035694730f, 0.387814888163501290f,
-    -0.921737279553523800f,
-  0.387638140125372680f, -0.921811625181708120f, 0.387461377834897920f,
-    -0.921885936917513970f,
-  0.387284601298575890f, -0.921960214758209110f, 0.387107810522905990f,
-    -0.922034458701062820f,
-  0.386931005514388690f, -0.922108668743345070f, 0.386754186279524130f,
-    -0.922182844882327600f,
-  0.386577352824813980f, -0.922256987115283030f, 0.386400505156759610f,
-    -0.922331095439485330f,
-  0.386223643281862980f, -0.922405169852209880f, 0.386046767206627280f,
-    -0.922479210350733100f,
-  0.385869876937555310f, -0.922553216932332830f, 0.385692972481151200f,
-    -0.922627189594287800f,
-  0.385516053843919020f, -0.922701128333878520f, 0.385339121032363340f,
-    -0.922775033148386380f,
-  0.385162174052989970f, -0.922848904035094120f, 0.384985212912304200f,
-    -0.922922740991285680f,
-  0.384808237616812930f, -0.922996544014246250f, 0.384631248173022740f,
-    -0.923070313101262420f,
-  0.384454244587440870f, -0.923144048249621820f, 0.384277226866575620f,
-    -0.923217749456613500f,
-  0.384100195016935040f, -0.923291416719527640f, 0.383923149045028500f,
-    -0.923365050035655610f,
-  0.383746088957365010f, -0.923438649402290370f, 0.383569014760454960f,
-    -0.923512214816725520f,
-  0.383391926460808770f, -0.923585746276256560f, 0.383214824064937180f,
-    -0.923659243778179980f,
-  0.383037707579352130f, -0.923732707319793180f, 0.382860577010565360f,
-    -0.923806136898395410f,
-  0.382683432365089840f, -0.923879532511286740f, 0.382506273649438400f,
-    -0.923952894155768640f,
-  0.382329100870124510f, -0.924026221829143850f, 0.382151914033662720f,
-    -0.924099515528716280f,
-  0.381974713146567220f, -0.924172775251791200f, 0.381797498215353690f,
-    -0.924246000995674890f,
-  0.381620269246537520f, -0.924319192757675160f, 0.381443026246634730f,
-    -0.924392350535101050f,
-  0.381265769222162490f, -0.924465474325262600f, 0.381088498179637520f,
-    -0.924538564125471420f,
-  0.380911213125578130f, -0.924611619933039970f, 0.380733914066502090f,
-    -0.924684641745282530f,
-  0.380556601008928570f, -0.924757629559513910f, 0.380379273959376710f,
-    -0.924830583373050800f,
-  0.380201932924366050f, -0.924903503183210910f, 0.380024577910417380f,
-    -0.924976388987313050f,
-  0.379847208924051110f, -0.925049240782677580f, 0.379669825971789000f,
-    -0.925122058566625770f,
-  0.379492429060152740f, -0.925194842336480420f, 0.379315018195664430f,
-    -0.925267592089565550f,
-  0.379137593384847430f, -0.925340307823206200f, 0.378960154634224720f,
-    -0.925412989534729060f,
-  0.378782701950320600f, -0.925485637221461490f, 0.378605235339659290f,
-    -0.925558250880732620f,
-  0.378427754808765620f, -0.925630830509872720f, 0.378250260364165310f,
-    -0.925703376106213120f,
-  0.378072752012383990f, -0.925775887667086740f, 0.377895229759948550f,
-    -0.925848365189827270f,
-  0.377717693613385810f, -0.925920808671769960f, 0.377540143579222940f,
-    -0.925993218110251480f,
-  0.377362579663988450f, -0.926065593502609310f, 0.377185001874210450f,
-    -0.926137934846182560f,
-  0.377007410216418310f, -0.926210242138311270f, 0.376829804697141220f,
-    -0.926282515376337210f,
-  0.376652185322909620f, -0.926354754557602860f, 0.376474552100253880f,
-    -0.926426959679452100f,
-  0.376296905035704790f, -0.926499130739230510f, 0.376119244135794390f,
-    -0.926571267734284220f,
-  0.375941569407054420f, -0.926643370661961230f, 0.375763880856017750f,
-    -0.926715439519610330f,
-  0.375586178489217330f, -0.926787474304581750f, 0.375408462313186590f,
-    -0.926859475014227160f,
-  0.375230732334460030f, -0.926931441645899130f, 0.375052988559571860f,
-    -0.927003374196951670f,
-  0.374875230995057600f, -0.927075272664740100f, 0.374697459647452770f,
-    -0.927147137046620880f,
-  0.374519674523293210f, -0.927218967339951790f, 0.374341875629116030f,
-    -0.927290763542091720f,
-  0.374164062971457990f, -0.927362525650401110f, 0.373986236556857090f,
-    -0.927434253662241300f,
-  0.373808396391851370f, -0.927505947574975180f, 0.373630542482979280f,
-    -0.927577607385966730f,
-  0.373452674836780410f, -0.927649233092581180f, 0.373274793459794030f,
-    -0.927720824692185200f,
-  0.373096898358560690f, -0.927792382182146320f, 0.372918989539620770f,
-    -0.927863905559833780f,
-  0.372741067009515810f, -0.927935394822617890f, 0.372563130774787370f,
-    -0.928006849967869970f,
-  0.372385180841977360f, -0.928078270992963140f, 0.372207217217628950f,
-    -0.928149657895271150f,
-  0.372029239908284960f, -0.928221010672169440f, 0.371851248920489540f,
-    -0.928292329321034560f,
-  0.371673244260786630f, -0.928363613839244370f, 0.371495225935720760f,
-    -0.928434864224177980f,
-  0.371317193951837600f, -0.928506080473215480f, 0.371139148315682510f,
-    -0.928577262583738850f,
-  0.370961089033802040f, -0.928648410553130520f, 0.370783016112742720f,
-    -0.928719524378774700f,
-  0.370604929559051670f, -0.928790604058057020f, 0.370426829379276900f,
-    -0.928861649588363700f,
-  0.370248715579966360f, -0.928932660967082820f, 0.370070588167669130f,
-    -0.929003638191603360f,
-  0.369892447148934270f, -0.929074581259315750f, 0.369714292530311240f,
-    -0.929145490167611720f,
-  0.369536124318350760f, -0.929216364913883930f, 0.369357942519603190f,
-    -0.929287205495526790f,
-  0.369179747140620070f, -0.929358011909935500f, 0.369001538187952780f,
-    -0.929428784154506800f,
-  0.368823315668153960f, -0.929499522226638560f, 0.368645079587776150f,
-    -0.929570226123729860f,
-  0.368466829953372320f, -0.929640895843181330f, 0.368288566771496680f,
-    -0.929711531382394370f,
-  0.368110290048703050f, -0.929782132738772190f, 0.367931999791546500f,
-    -0.929852699909718750f,
-  0.367753696006582090f, -0.929923232892639560f, 0.367575378700365330f,
-    -0.929993731684941480f,
-  0.367397047879452820f, -0.930064196284032360f, 0.367218703550400930f,
-    -0.930134626687321390f,
-  0.367040345719767240f, -0.930205022892219070f, 0.366861974394109220f,
-    -0.930275384896137040f,
-  0.366683589579984930f, -0.930345712696488470f, 0.366505191283953480f,
-    -0.930416006290687550f,
-  0.366326779512573590f, -0.930486265676149780f, 0.366148354272405390f,
-    -0.930556490850291800f,
-  0.365969915570008910f, -0.930626681810531650f, 0.365791463411944570f,
-    -0.930696838554288860f,
-  0.365612997804773960f, -0.930766961078983710f, 0.365434518755058390f,
-    -0.930837049382038150f,
-  0.365256026269360380f, -0.930907103460875020f, 0.365077520354242180f,
-    -0.930977123312918930f,
-  0.364899001016267380f, -0.931047108935595170f, 0.364720468261999390f,
-    -0.931117060326330790f,
-  0.364541922098002180f, -0.931186977482553750f, 0.364363362530840730f,
-    -0.931256860401693420f,
-  0.364184789567079840f, -0.931326709081180430f, 0.364006203213285530f,
-    -0.931396523518446600f,
-  0.363827603476023610f, -0.931466303710925090f, 0.363648990361860550f,
-    -0.931536049656050300f,
-  0.363470363877363870f, -0.931605761351257830f, 0.363291724029100700f,
-    -0.931675438793984620f,
-  0.363113070823639530f, -0.931745081981668720f, 0.362934404267548750f,
-    -0.931814690911749620f,
-  0.362755724367397230f, -0.931884265581668150f, 0.362577031129754870f,
-    -0.931953805988865900f,
-  0.362398324561191310f, -0.932023312130786490f, 0.362219604668277570f,
-    -0.932092784004874050f,
-  0.362040871457584350f, -0.932162221608574320f, 0.361862124935682980f,
-    -0.932231624939334540f,
-  0.361683365109145950f, -0.932300993994602640f, 0.361504591984545260f,
-    -0.932370328771828460f,
-  0.361325805568454340f, -0.932439629268462360f, 0.361147005867446190f,
-    -0.932508895481956700f,
-  0.360968192888095290f, -0.932578127409764420f, 0.360789366636975690f,
-    -0.932647325049340340f,
-  0.360610527120662270f, -0.932716488398140250f, 0.360431674345730810f,
-    -0.932785617453620990f,
-  0.360252808318756830f, -0.932854712213241230f, 0.360073929046317080f,
-    -0.932923772674460140f,
-  0.359895036534988280f, -0.932992798834738850f, 0.359716130791347570f,
-    -0.933061790691539380f,
-  0.359537211821973180f, -0.933130748242325110f, 0.359358279633443080f,
-    -0.933199671484560730f,
-  0.359179334232336560f, -0.933268560415712050f, 0.359000375625232630f,
-    -0.933337415033246080f,
-  0.358821403818710920f, -0.933406235334631520f, 0.358642418819352100f,
-    -0.933475021317337950f,
-  0.358463420633736540f, -0.933543772978836170f, 0.358284409268445900f,
-    -0.933612490316598540f,
-  0.358105384730061760f, -0.933681173328098300f, 0.357926347025166070f,
-    -0.933749822010810580f,
-  0.357747296160342010f, -0.933818436362210960f, 0.357568232142172260f,
-    -0.933887016379776890f,
-  0.357389154977241000f, -0.933955562060986730f, 0.357210064672131900f,
-    -0.934024073403320500f,
-  0.357030961233430030f, -0.934092550404258870f, 0.356851844667720410f,
-    -0.934160993061284420f,
-  0.356672714981588260f, -0.934229401371880820f, 0.356493572181620200f,
-    -0.934297775333532530f,
-  0.356314416274402360f, -0.934366114943725900f, 0.356135247266522180f,
-    -0.934434420199948050f,
-  0.355956065164567010f, -0.934502691099687870f, 0.355776869975124640f,
-    -0.934570927640435030f,
-  0.355597661704783960f, -0.934639129819680780f, 0.355418440360133590f,
-    -0.934707297634917440f,
-  0.355239205947763370f, -0.934775431083638700f, 0.355059958474263030f,
-    -0.934843530163339430f,
-  0.354880697946222790f, -0.934911594871516090f, 0.354701424370233940f,
-    -0.934979625205665800f,
-  0.354522137752887430f, -0.935047621163287430f, 0.354342838100775600f,
-    -0.935115582741880890f,
-  0.354163525420490510f, -0.935183509938947500f, 0.353984199718624830f,
-    -0.935251402751989810f,
-  0.353804861001772160f, -0.935319261178511500f, 0.353625509276525970f,
-    -0.935387085216017770f,
-  0.353446144549480870f, -0.935454874862014620f, 0.353266766827231180f,
-    -0.935522630114009930f,
-  0.353087376116372530f, -0.935590350969512370f, 0.352907972423500360f,
-    -0.935658037426032040f,
-  0.352728555755210730f, -0.935725689481080370f, 0.352549126118100580f,
-    -0.935793307132169900f,
-  0.352369683518766630f, -0.935860890376814640f, 0.352190227963806890f,
-    -0.935928439212529660f,
-  0.352010759459819240f, -0.935995953636831300f, 0.351831278013402030f,
-    -0.936063433647237540f,
-  0.351651783631154680f, -0.936130879241266920f, 0.351472276319676260f,
-    -0.936198290416440090f,
-  0.351292756085567150f, -0.936265667170278260f, 0.351113222935427630f,
-    -0.936333009500304180f,
-  0.350933676875858360f, -0.936400317404042060f, 0.350754117913461170f,
-    -0.936467590879016880f,
-  0.350574546054837570f, -0.936534829922755500f, 0.350394961306590200f,
-    -0.936602034532785570f,
-  0.350215363675321740f, -0.936669204706636060f, 0.350035753167635300f,
-    -0.936736340441837620f,
-  0.349856129790135030f, -0.936803441735921560f, 0.349676493549424760f,
-    -0.936870508586420960f,
-  0.349496844452109600f, -0.936937540990869900f, 0.349317182504794320f,
-    -0.937004538946803690f,
-  0.349137507714085030f, -0.937071502451759190f, 0.348957820086587600f,
-    -0.937138431503274140f,
-  0.348778119628908420f, -0.937205326098887960f, 0.348598406347655040f,
-    -0.937272186236140950f,
-  0.348418680249434510f, -0.937339011912574960f, 0.348238941340855310f,
-    -0.937405803125732850f,
-  0.348059189628525780f, -0.937472559873159140f, 0.347879425119054510f,
-    -0.937539282152399230f,
-  0.347699647819051490f, -0.937605969960999990f, 0.347519857735126110f,
-    -0.937672623296509470f,
-  0.347340054873889190f, -0.937739242156476970f, 0.347160239241951330f,
-    -0.937805826538453010f,
-  0.346980410845923680f, -0.937872376439989890f, 0.346800569692418400f,
-    -0.937938891858640210f,
-  0.346620715788047320f, -0.938005372791958840f, 0.346440849139423580f,
-    -0.938071819237501160f,
-  0.346260969753160170f, -0.938138231192824360f, 0.346081077635870480f,
-    -0.938204608655486490f,
-  0.345901172794169100f, -0.938270951623047080f, 0.345721255234670120f,
-    -0.938337260093066950f,
-  0.345541324963989150f, -0.938403534063108060f, 0.345361381988741170f,
-    -0.938469773530733800f,
-  0.345181426315542610f, -0.938535978493508560f, 0.345001457951009780f,
-    -0.938602148948998290f,
-  0.344821476901759290f, -0.938668284894770170f, 0.344641483174409070f,
-    -0.938734386328392460f,
-  0.344461476775576480f, -0.938800453247434770f, 0.344281457711880230f,
-    -0.938866485649468060f,
-  0.344101425989938980f, -0.938932483532064490f, 0.343921381616371700f,
-    -0.938998446892797540f,
-  0.343741324597798600f, -0.939064375729241950f, 0.343561254940839330f,
-    -0.939130270038973650f,
-  0.343381172652115100f, -0.939196129819569900f, 0.343201077738246710f,
-    -0.939261955068609100f,
-  0.343020970205855540f, -0.939327745783671400f, 0.342840850061564060f,
-    -0.939393501962337510f,
-  0.342660717311994380f, -0.939459223602189920f, 0.342480571963769850f,
-    -0.939524910700812120f,
-  0.342300414023513690f, -0.939590563255789160f, 0.342120243497849590f,
-    -0.939656181264707070f,
-  0.341940060393402300f, -0.939721764725153340f, 0.341759864716796310f,
-    -0.939787313634716570f,
-  0.341579656474657210f, -0.939852827990986680f, 0.341399435673610360f,
-    -0.939918307791555050f,
-  0.341219202320282410f, -0.939983753034013940f, 0.341038956421299830f,
-    -0.940049163715957370f,
-  0.340858697983289440f, -0.940114539834980280f, 0.340678427012879310f,
-    -0.940179881388678810f,
-  0.340498143516697100f, -0.940245188374650880f, 0.340317847501371730f,
-    -0.940310460790495070f,
-  0.340137538973531880f, -0.940375698633811540f, 0.339957217939806880f,
-    -0.940440901902201750f,
-  0.339776884406826960f, -0.940506070593268300f, 0.339596538381222060f,
-    -0.940571204704615190f,
-  0.339416179869623410f, -0.940636304233847590f, 0.339235808878662120f,
-    -0.940701369178571940f,
-  0.339055425414969640f, -0.940766399536396070f, 0.338875029485178560f,
-    -0.940831395304928870f,
-  0.338694621095921190f, -0.940896356481780830f, 0.338514200253831000f,
-    -0.940961283064563280f,
-  0.338333766965541290f, -0.941026175050889260f, 0.338153321237685990f,
-    -0.941091032438372780f,
-  0.337972863076899830f, -0.941155855224629190f, 0.337792392489817460f,
-    -0.941220643407275180f,
-  0.337611909483074680f, -0.941285396983928660f, 0.337431414063306790f,
-    -0.941350115952208970f,
-  0.337250906237150650f, -0.941414800309736230f, 0.337070386011242730f,
-    -0.941479450054132580f,
-  0.336889853392220050f, -0.941544065183020810f, 0.336709308386720700f,
-    -0.941608645694025140f,
-  0.336528751001382350f, -0.941673191584771360f, 0.336348181242844100f,
-    -0.941737702852886160f,
-  0.336167599117744690f, -0.941802179495997650f, 0.335987004632723350f,
-    -0.941866621511735280f,
-  0.335806397794420560f, -0.941931028897729510f, 0.335625778609476230f,
-    -0.941995401651612550f,
-  0.335445147084531660f, -0.942059739771017310f, 0.335264503226227970f,
-    -0.942124043253578460f,
-  0.335083847041206580f, -0.942188312096931770f, 0.334903178536110290f,
-    -0.942252546298714020f,
-  0.334722497717581220f, -0.942316745856563780f, 0.334541804592262960f,
-    -0.942380910768120470f,
-  0.334361099166798900f, -0.942445041031024890f, 0.334180381447832740f,
-    -0.942509136642919240f,
-  0.333999651442009490f, -0.942573197601446870f, 0.333818909155973620f,
-    -0.942637223904252530f,
-  0.333638154596370920f, -0.942701215548981900f, 0.333457387769846790f,
-    -0.942765172533282510f,
-  0.333276608683047980f, -0.942829094854802710f, 0.333095817342620890f,
-    -0.942892982511192130f,
-  0.332915013755212650f, -0.942956835500102120f, 0.332734197927471160f,
-    -0.943020653819184650f,
-  0.332553369866044220f, -0.943084437466093490f, 0.332372529577580680f,
-    -0.943148186438483420f,
-  0.332191677068729320f, -0.943211900734010620f, 0.332010812346139380f,
-    -0.943275580350332540f,
-  0.331829935416461220f, -0.943339225285107720f, 0.331649046286344620f,
-    -0.943402835535996240f,
-  0.331468144962440920f, -0.943466411100659320f, 0.331287231451400990f,
-    -0.943529951976759370f,
-  0.331106305759876430f, -0.943593458161960390f, 0.330925367894519650f,
-    -0.943656929653927110f,
-  0.330744417861982890f, -0.943720366450326200f, 0.330563455668919590f,
-    -0.943783768548825060f,
-  0.330382481321982950f, -0.943847135947092690f, 0.330201494827826620f,
-    -0.943910468642799150f,
-  0.330020496193105530f, -0.943973766633615980f, 0.329839485424473940f,
-    -0.944037029917215830f,
-  0.329658462528587550f, -0.944100258491272660f, 0.329477427512101680f,
-    -0.944163452353461770f,
-  0.329296380381672800f, -0.944226611501459810f, 0.329115321143957360f,
-    -0.944289735932944410f,
-  0.328934249805612200f, -0.944352825645594750f, 0.328753166373295100f,
-    -0.944415880637091250f,
-  0.328572070853663690f, -0.944478900905115550f, 0.328390963253376630f,
-    -0.944541886447350380f,
-  0.328209843579092660f, -0.944604837261480260f, 0.328028711837470730f,
-    -0.944667753345190490f,
-  0.327847568035170960f, -0.944730634696167800f, 0.327666412178853060f,
-    -0.944793481312100280f,
-  0.327485244275178060f, -0.944856293190677210f, 0.327304064330806830f,
-    -0.944919070329589220f,
-  0.327122872352400510f, -0.944981812726528150f, 0.326941668346621530f,
-    -0.945044520379187070f,
-  0.326760452320131790f, -0.945107193285260610f, 0.326579224279594460f,
-    -0.945169831442444150f,
-  0.326397984231672660f, -0.945232434848434890f, 0.326216732183029770f,
-    -0.945295003500931100f,
-  0.326035468140330350f, -0.945357537397632290f, 0.325854192110238580f,
-    -0.945420036536239070f,
-  0.325672904099419900f, -0.945482500914453740f, 0.325491604114539260f,
-    -0.945544930529979680f,
-  0.325310292162262980f, -0.945607325380521280f, 0.325128968249257190f,
-    -0.945669685463784710f,
-  0.324947632382188430f, -0.945732010777477150f, 0.324766284567724330f,
-    -0.945794301319306860f,
-  0.324584924812532150f, -0.945856557086983910f, 0.324403553123280290f,
-    -0.945918778078219110f,
-  0.324222169506637130f, -0.945980964290724760f, 0.324040773969271450f,
-    -0.946043115722214560f,
-  0.323859366517852960f, -0.946105232370403340f, 0.323677947159051180f,
-    -0.946167314233007370f,
-  0.323496515899536760f, -0.946229361307743820f, 0.323315072745980150f,
-    -0.946291373592331510f,
-  0.323133617705052330f, -0.946353351084490590f, 0.322952150783425370f,
-    -0.946415293781942110f,
-  0.322770671987770710f, -0.946477201682408680f, 0.322589181324761390f,
-    -0.946539074783614100f,
-  0.322407678801070020f, -0.946600913083283530f, 0.322226164423369650f,
-    -0.946662716579143360f,
-  0.322044638198334620f, -0.946724485268921170f, 0.321863100132638580f,
-    -0.946786219150346000f,
-  0.321681550232956640f, -0.946847918221148000f, 0.321499988505963450f,
-    -0.946909582479058760f,
-  0.321318414958334910f, -0.946971211921810880f, 0.321136829596746780f,
-    -0.947032806547138620f,
-  0.320955232427875210f, -0.947094366352777220f, 0.320773623458397440f,
-    -0.947155891336463270f,
-  0.320592002694990330f, -0.947217381495934820f, 0.320410370144331880f,
-    -0.947278836828930880f,
-  0.320228725813100020f, -0.947340257333191940f, 0.320047069707973140f,
-    -0.947401643006459900f,
-  0.319865401835630610f, -0.947462993846477700f, 0.319683722202751370f,
-    -0.947524309850989570f,
-  0.319502030816015750f, -0.947585591017741090f, 0.319320327682103720f,
-    -0.947646837344479190f,
-  0.319138612807695900f, -0.947708048828952100f, 0.318956886199473770f,
-    -0.947769225468909180f,
-  0.318775147864118480f, -0.947830367262101010f, 0.318593397808312470f,
-    -0.947891474206279730f,
-  0.318411636038737960f, -0.947952546299198560f, 0.318229862562077580f,
-    -0.948013583538612200f,
-  0.318048077385015060f, -0.948074585922276230f, 0.317866280514233660f,
-    -0.948135553447947980f,
-  0.317684471956418020f, -0.948196486113385580f, 0.317502651718252260f,
-    -0.948257383916349060f,
-  0.317320819806421790f, -0.948318246854599090f, 0.317138976227611890f,
-    -0.948379074925898120f,
-  0.316957120988508150f, -0.948439868128009620f, 0.316775254095797380f,
-    -0.948500626458698260f,
-  0.316593375556165850f, -0.948561349915730270f, 0.316411485376301090f,
-    -0.948622038496872990f,
-  0.316229583562890490f, -0.948682692199895090f, 0.316047670122621860f,
-    -0.948743311022566480f,
-  0.315865745062184070f, -0.948803894962658380f, 0.315683808388265600f,
-    -0.948864444017943340f,
-  0.315501860107556040f, -0.948924958186195160f, 0.315319900226745050f,
-    -0.948985437465188710f,
-  0.315137928752522440f, -0.949045881852700560f, 0.314955945691579250f,
-    -0.949106291346508260f,
-  0.314773951050606070f, -0.949166665944390700f, 0.314591944836294710f,
-    -0.949227005644128210f,
-  0.314409927055336820f, -0.949287310443502010f, 0.314227897714424500f,
-    -0.949347580340295210f,
-  0.314045856820250820f, -0.949407815332291460f, 0.313863804379508500f,
-    -0.949468015417276550f,
-  0.313681740398891570f, -0.949528180593036670f, 0.313499664885093450f,
-    -0.949588310857359950f,
-  0.313317577844809070f, -0.949648406208035480f, 0.313135479284732950f,
-    -0.949708466642853800f,
-  0.312953369211560200f, -0.949768492159606680f, 0.312771247631986880f,
-    -0.949828482756087000f,
-  0.312589114552708660f, -0.949888438430089300f, 0.312406969980422500f,
-    -0.949948359179409010f,
-  0.312224813921825050f, -0.950008245001843000f, 0.312042646383613510f,
-    -0.950068095895189590f,
-  0.311860467372486130f, -0.950127911857248100f, 0.311678276895140550f,
-    -0.950187692885819280f,
-  0.311496074958275970f, -0.950247438978705230f, 0.311313861568591090f,
-    -0.950307150133709140f,
-  0.311131636732785270f, -0.950366826348635780f, 0.310949400457558760f,
-    -0.950426467621290900f,
-  0.310767152749611470f, -0.950486073949481700f, 0.310584893615644560f,
-    -0.950545645331016600f,
-  0.310402623062358880f, -0.950605181763705230f, 0.310220341096455910f,
-    -0.950664683245358910f,
-  0.310038047724638000f, -0.950724149773789610f, 0.309855742953607130f,
-    -0.950783581346811070f,
-  0.309673426790066490f, -0.950842977962238160f, 0.309491099240719050f,
-    -0.950902339617887060f,
-  0.309308760312268780f, -0.950961666311575080f, 0.309126410011419550f,
-    -0.951020958041121080f,
-  0.308944048344875710f, -0.951080214804345010f, 0.308761675319342570f,
-    -0.951139436599068190f,
-  0.308579290941525030f, -0.951198623423113230f, 0.308396895218129240f,
-    -0.951257775274304000f,
-  0.308214488155861220f, -0.951316892150465550f, 0.308032069761427330f,
-    -0.951375974049424420f,
-  0.307849640041534980f, -0.951435020969008340f, 0.307667199002891190f,
-    -0.951494032907046370f,
-  0.307484746652204160f, -0.951553009861368590f, 0.307302282996181950f,
-    -0.951611951829806730f,
-  0.307119808041533100f, -0.951670858810193860f, 0.306937321794967020f,
-    -0.951729730800363720f,
-  0.306754824263192780f, -0.951788567798152130f, 0.306572315452920800f,
-    -0.951847369801395620f,
-  0.306389795370861080f, -0.951906136807932230f, 0.306207264023724280f,
-    -0.951964868815601380f,
-  0.306024721418221900f, -0.952023565822243570f, 0.305842167561065080f,
-    -0.952082227825700620f,
-  0.305659602458966230f, -0.952140854823815830f, 0.305477026118637360f,
-    -0.952199446814433580f,
-  0.305294438546791720f, -0.952258003795399600f, 0.305111839750142220f,
-    -0.952316525764560830f,
-  0.304929229735402430f, -0.952375012719765880f, 0.304746608509286640f,
-    -0.952433464658864030f,
-  0.304563976078509050f, -0.952491881579706320f, 0.304381332449784940f,
-    -0.952550263480144930f,
-  0.304198677629829270f, -0.952608610358033240f, 0.304016011625357570f,
-    -0.952666922211226170f,
-  0.303833334443086470f, -0.952725199037579570f, 0.303650646089731910f,
-    -0.952783440834950920f,
-  0.303467946572011370f, -0.952841647601198720f, 0.303285235896641910f,
-    -0.952899819334182880f,
-  0.303102514070341060f, -0.952957956031764700f, 0.302919781099827420f,
-    -0.953016057691806530f,
-  0.302737036991819140f, -0.953074124312172200f, 0.302554281753035670f,
-    -0.953132155890726750f,
-  0.302371515390196130f, -0.953190152425336560f, 0.302188737910020040f,
-    -0.953248113913869320f,
-  0.302005949319228200f, -0.953306040354193750f, 0.301823149624540650f,
-    -0.953363931744180330f,
-  0.301640338832678880f, -0.953421788081700310f, 0.301457516950363940f,
-    -0.953479609364626610f,
-  0.301274683984318000f, -0.953537395590833280f, 0.301091839941263210f,
-    -0.953595146758195680f,
-  0.300908984827921890f, -0.953652862864590500f, 0.300726118651017620f,
-    -0.953710543907895560f,
-  0.300543241417273400f, -0.953768189885990330f, 0.300360353133413580f,
-    -0.953825800796755050f,
-  0.300177453806162120f, -0.953883376638071770f, 0.299994543442243580f,
-    -0.953940917407823500f,
-  0.299811622048383460f, -0.953998423103894490f, 0.299628689631306790f,
-    -0.954055893724170660f,
-  0.299445746197739950f, -0.954113329266538800f, 0.299262791754409010f,
-    -0.954170729728887280f,
-  0.299079826308040480f, -0.954228095109105670f, 0.298896849865361910f,
-    -0.954285425405084650f,
-  0.298713862433100390f, -0.954342720614716480f, 0.298530864017984230f,
-    -0.954399980735894490f,
-  0.298347854626741570f, -0.954457205766513490f, 0.298164834266100910f,
-    -0.954514395704469500f,
-  0.297981802942791920f, -0.954571550547659630f, 0.297798760663543550f,
-    -0.954628670293982680f,
-  0.297615707435086310f, -0.954685754941338340f, 0.297432643264150030f,
-    -0.954742804487627940f,
-  0.297249568157465890f, -0.954799818930753720f, 0.297066482121764840f,
-    -0.954856798268619580f,
-  0.296883385163778270f, -0.954913742499130520f, 0.296700277290238460f,
-    -0.954970651620192790f,
-  0.296517158507877410f, -0.955027525629714160f, 0.296334028823428240f,
-    -0.955084364525603410f,
-  0.296150888243623960f, -0.955141168305770670f, 0.295967736775197890f,
-    -0.955197936968127710f,
-  0.295784574424884370f, -0.955254670510586990f, 0.295601401199417360f,
-    -0.955311368931062720f,
-  0.295418217105532070f, -0.955368032227470240f, 0.295235022149963390f,
-    -0.955424660397726330f,
-  0.295051816339446720f, -0.955481253439748770f, 0.294868599680718380f,
-    -0.955537811351456770f,
-  0.294685372180514330f, -0.955594334130771110f, 0.294502133845571720f,
-    -0.955650821775613220f,
-  0.294318884682627570f, -0.955707274283906560f, 0.294135624698419080f,
-    -0.955763691653575440f,
-  0.293952353899684770f, -0.955820073882545420f, 0.293769072293162400f,
-    -0.955876420968743590f,
-  0.293585779885591310f, -0.955932732910098170f, 0.293402476683710060f,
-    -0.955989009704538930f,
-  0.293219162694258680f, -0.956045251349996410f, 0.293035837923976920f,
-    -0.956101457844403040f,
-  0.292852502379604810f, -0.956157629185692140f, 0.292669156067883570f,
-    -0.956213765371798470f,
-  0.292485798995553830f, -0.956269866400658140f, 0.292302431169357610f,
-    -0.956325932270208230f,
-  0.292119052596036540f, -0.956381962978387620f, 0.291935663282332780f,
-    -0.956437958523136180f,
-  0.291752263234989370f, -0.956493918902394990f, 0.291568852460749040f,
-    -0.956549844114106820f,
-  0.291385430966355720f, -0.956605734156215080f, 0.291201998758553020f,
-    -0.956661589026664980f,
-  0.291018555844085090f, -0.956717408723403050f, 0.290835102229696940f,
-    -0.956773193244376930f,
-  0.290651637922133220f, -0.956828942587535370f, 0.290468162928139870f,
-    -0.956884656750828900f,
-  0.290284677254462330f, -0.956940335732208940f, 0.290101180907847140f,
-    -0.956995979529628230f,
-  0.289917673895040860f, -0.957051588141040970f, 0.289734156222790250f,
-    -0.957107161564402790f,
-  0.289550627897843140f, -0.957162699797670100f, 0.289367088926946960f,
-    -0.957218202838801210f,
-  0.289183539316850310f, -0.957273670685755200f, 0.288999979074301530f,
-    -0.957329103336492790f,
-  0.288816408206049480f, -0.957384500788975860f, 0.288632826718843940f,
-    -0.957439863041167570f,
-  0.288449234619434170f, -0.957495190091032570f, 0.288265631914570830f,
-    -0.957550481936536470f,
-  0.288082018611004300f, -0.957605738575646240f, 0.287898394715485170f,
-    -0.957660960006330610f,
-  0.287714760234765280f, -0.957716146226558870f, 0.287531115175595930f,
-    -0.957771297234302320f,
-  0.287347459544729570f, -0.957826413027532910f, 0.287163793348918560f,
-    -0.957881493604224250f,
-  0.286980116594915570f, -0.957936538962351420f, 0.286796429289474190f,
-    -0.957991549099890370f,
-  0.286612731439347790f, -0.958046524014818600f, 0.286429023051290750f,
-    -0.958101463705114620f,
-  0.286245304132057120f, -0.958156368168758820f, 0.286061574688402100f,
-    -0.958211237403732260f,
-  0.285877834727080730f, -0.958266071408017670f, 0.285694084254848320f,
-    -0.958320870179598880f,
-  0.285510323278461380f, -0.958375633716461170f, 0.285326551804675810f,
-    -0.958430362016591040f,
-  0.285142769840248720f, -0.958485055077976100f, 0.284958977391937150f,
-    -0.958539712898605730f,
-  0.284775174466498300f, -0.958594335476470220f, 0.284591361070690550f,
-    -0.958648922809561040f,
-  0.284407537211271820f, -0.958703474895871600f, 0.284223702895001100f,
-    -0.958757991733395710f,
-  0.284039858128637360f, -0.958812473320129200f, 0.283856002918939750f,
-    -0.958866919654069010f,
-  0.283672137272668550f, -0.958921330733213060f, 0.283488261196583550f,
-    -0.958975706555561080f,
-  0.283304374697445790f, -0.959030047119113550f, 0.283120477782015990f,
-    -0.959084352421872730f,
-  0.282936570457055390f, -0.959138622461841890f, 0.282752652729326040f,
-    -0.959192857237025740f,
-  0.282568724605589740f, -0.959247056745430090f, 0.282384786092609420f,
-    -0.959301220985062210f,
-  0.282200837197147500f, -0.959355349953930790f, 0.282016877925967690f,
-    -0.959409443650045550f,
-  0.281832908285833460f, -0.959463502071417510f, 0.281648928283508680f,
-    -0.959517525216059260f,
-  0.281464937925758050f, -0.959571513081984520f, 0.281280937219346110f,
-    -0.959625465667208300f,
-  0.281096926171038320f, -0.959679382969746750f, 0.280912904787600120f,
-    -0.959733264987617680f,
-  0.280728873075797190f, -0.959787111718839900f, 0.280544831042396360f,
-    -0.959840923161433660f,
-  0.280360778694163810f, -0.959894699313420530f, 0.280176716037867040f,
-    -0.959948440172823210f,
-  0.279992643080273380f, -0.960002145737665850f, 0.279808559828150390f,
-    -0.960055816005973890f,
-  0.279624466288266700f, -0.960109450975773940f, 0.279440362467390510f,
-    -0.960163050645094000f,
-  0.279256248372291240f, -0.960216615011963430f, 0.279072124009737970f,
-    -0.960270144074412800f,
-  0.278887989386500280f, -0.960323637830473920f, 0.278703844509348600f,
-    -0.960377096278180130f,
-  0.278519689385053060f, -0.960430519415565790f, 0.278335524020384970f,
-    -0.960483907240666790f,
-  0.278151348422115090f, -0.960537259751520050f, 0.277967162597015430f,
-    -0.960590576946164120f,
-  0.277782966551857800f, -0.960643858822638470f, 0.277598760293414290f,
-    -0.960697105378984450f,
-  0.277414543828458200f, -0.960750316613243950f, 0.277230317163762120f,
-    -0.960803492523460760f,
-  0.277046080306099950f, -0.960856633107679660f, 0.276861833262245390f,
-    -0.960909738363946770f,
-  0.276677576038972420f, -0.960962808290309780f, 0.276493308643056100f,
-    -0.961015842884817230f,
-  0.276309031081271030f, -0.961068842145519350f, 0.276124743360392890f,
-    -0.961121806070467380f,
-  0.275940445487197320f, -0.961174734657714080f, 0.275756137468460120f,
-    -0.961227627905313460f,
-  0.275571819310958250f, -0.961280485811320640f, 0.275387491021468140f,
-    -0.961333308373792270f,
-  0.275203152606767370f, -0.961386095590786250f, 0.275018804073633380f,
-    -0.961438847460361570f,
-  0.274834445428843940f, -0.961491563980579000f, 0.274650076679177790f,
-    -0.961544245149499990f,
-  0.274465697831413220f, -0.961596890965187860f, 0.274281308892329710f,
-    -0.961649501425706820f,
-  0.274096909868706330f, -0.961702076529122540f, 0.273912500767323320f,
-    -0.961754616273502010f,
-  0.273728081594960650f, -0.961807120656913540f, 0.273543652358398730f,
-    -0.961859589677426570f,
-  0.273359213064418790f, -0.961912023333112100f, 0.273174763719801870f,
-    -0.961964421622042320f,
-  0.272990304331329980f, -0.962016784542290560f, 0.272805834905784920f,
-    -0.962069112091931580f,
-  0.272621355449948980f, -0.962121404269041580f, 0.272436865970605350f,
-    -0.962173661071697770f,
-  0.272252366474536660f, -0.962225882497979020f, 0.272067856968526980f,
-    -0.962278068545965090f,
-  0.271883337459359890f, -0.962330219213737400f, 0.271698807953819510f,
-    -0.962382334499378380f,
-  0.271514268458690810f, -0.962434414400971990f, 0.271329718980758420f,
-    -0.962486458916603450f,
-  0.271145159526808070f, -0.962538468044359160f, 0.270960590103625330f,
-    -0.962590441782326780f,
-  0.270776010717996010f, -0.962642380128595710f, 0.270591421376707050f,
-    -0.962694283081255930f,
-  0.270406822086544820f, -0.962746150638399410f, 0.270222212854296930f,
-    -0.962797982798119010f,
-  0.270037593686750510f, -0.962849779558509030f, 0.269852964590693910f,
-    -0.962901540917665000f,
-  0.269668325572915200f, -0.962953266873683880f, 0.269483676640202840f,
-    -0.963004957424663850f,
-  0.269299017799346230f, -0.963056612568704340f, 0.269114349057134330f,
-    -0.963108232303906190f,
-  0.268929670420357310f, -0.963159816628371360f, 0.268744981895805090f,
-    -0.963211365540203480f,
-  0.268560283490267890f, -0.963262879037507070f, 0.268375575210537010f,
-    -0.963314357118388090f,
-  0.268190857063403180f, -0.963365799780954050f, 0.268006129055658350f,
-    -0.963417207023313350f,
-  0.267821391194094320f, -0.963468578843575950f, 0.267636643485503090f,
-    -0.963519915239853140f,
-  0.267451885936677740f, -0.963571216210257210f, 0.267267118554410930f,
-    -0.963622481752902220f,
-  0.267082341345496350f, -0.963673711865903230f, 0.266897554316727510f,
-    -0.963724906547376410f,
-  0.266712757474898420f, -0.963776065795439840f, 0.266527950826803810f,
-    -0.963827189608212340f,
-  0.266343134379238180f, -0.963878277983814200f, 0.266158308138997050f,
-    -0.963929330920367140f,
-  0.265973472112875530f, -0.963980348415994110f, 0.265788626307669970f,
-    -0.964031330468819280f,
-  0.265603770730176440f, -0.964082277076968140f, 0.265418905387191260f,
-    -0.964133188238567640f,
-  0.265234030285511900f, -0.964184063951745720f, 0.265049145431935200f,
-    -0.964234904214632200f,
-  0.264864250833259320f, -0.964285709025357370f, 0.264679346496282050f,
-    -0.964336478382053720f,
-  0.264494432427801630f, -0.964387212282854290f, 0.264309508634617220f,
-    -0.964437910725893910f,
-  0.264124575123527490f, -0.964488573709308410f, 0.263939631901332410f,
-    -0.964539201231235150f,
-  0.263754678974831510f, -0.964589793289812650f, 0.263569716350824880f,
-    -0.964640349883180930f,
-  0.263384744036113390f, -0.964690871009480920f, 0.263199762037497560f,
-    -0.964741356666855340f,
-  0.263014770361779060f, -0.964791806853447900f, 0.262829769015759330f,
-    -0.964842221567403510f,
-  0.262644758006240100f, -0.964892600806868890f, 0.262459737340024090f,
-    -0.964942944569991410f,
-  0.262274707023913590f, -0.964993252854920320f, 0.262089667064712100f,
-    -0.965043525659805890f,
-  0.261904617469222560f, -0.965093762982799590f, 0.261719558244249080f,
-    -0.965143964822054450f,
-  0.261534489396595630f, -0.965194131175724720f, 0.261349410933066350f,
-    -0.965244262041965780f,
-  0.261164322860466590f, -0.965294357418934660f, 0.260979225185601020f,
-    -0.965344417304789370f,
-  0.260794117915275570f, -0.965394441697689400f, 0.260609001056295920f,
-    -0.965444430595795430f,
-  0.260423874615468010f, -0.965494383997269500f, 0.260238738599598950f,
-    -0.965544301900275070f,
-  0.260053593015495130f, -0.965594184302976830f, 0.259868437869964330f,
-    -0.965644031203540590f,
-  0.259683273169813930f, -0.965693842600133690f, 0.259498098921851660f,
-    -0.965743618490924830f,
-  0.259312915132886350f, -0.965793358874083570f, 0.259127721809726150f,
-    -0.965843063747781510f,
-  0.258942518959180580f, -0.965892733110190860f, 0.258757306588058840f,
-    -0.965942366959485540f,
-  0.258572084703170390f, -0.965991965293840570f, 0.258386853311325710f,
-    -0.966041528111432400f,
-  0.258201612419334870f, -0.966091055410438830f, 0.258016362034009070f,
-    -0.966140547189038750f,
-  0.257831102162158930f, -0.966190003445412620f, 0.257645832810596440f,
-    -0.966239424177741890f,
-  0.257460553986133210f, -0.966288809384209580f, 0.257275265695581120f,
-    -0.966338159063000130f,
-  0.257089967945753230f, -0.966387473212298790f, 0.256904660743461850f,
-    -0.966436751830292650f,
-  0.256719344095520720f, -0.966485994915169840f, 0.256534018008743200f,
-    -0.966535202465119700f,
-  0.256348682489942910f, -0.966584374478333120f, 0.256163337545934570f,
-    -0.966633510953002100f,
-  0.255977983183532380f, -0.966682611887320190f, 0.255792619409551670f,
-    -0.966731677279481840f,
-  0.255607246230807550f, -0.966780707127683270f, 0.255421863654115460f,
-    -0.966829701430121810f,
-  0.255236471686291820f, -0.966878660184995910f, 0.255051070334152530f,
-    -0.966927583390505660f,
-  0.254865659604514630f, -0.966976471044852070f, 0.254680239504194990f,
-    -0.967025323146237900f,
-  0.254494810040010790f, -0.967074139692867040f, 0.254309371218780110f,
-    -0.967122920682944360f,
-  0.254123923047320620f, -0.967171666114676640f, 0.253938465532451140f,
-    -0.967220375986271310f,
-  0.253752998680989940f, -0.967269050295937790f, 0.253567522499756610f,
-    -0.967317689041886310f,
-  0.253382036995570270f, -0.967366292222328510f, 0.253196542175250560f,
-    -0.967414859835477480f,
-  0.253011038045617980f, -0.967463391879547440f, 0.252825524613492610f,
-    -0.967511888352754150f,
-  0.252640001885695580f, -0.967560349253314360f, 0.252454469869047900f,
-    -0.967608774579446380f,
-  0.252268928570370810f, -0.967657164329369880f, 0.252083377996486560f,
-    -0.967705518501305480f,
-  0.251897818154216910f, -0.967753837093475510f, 0.251712249050384750f,
-    -0.967802120104103270f,
-  0.251526670691812780f, -0.967850367531413620f, 0.251341083085323880f,
-    -0.967898579373632660f,
-  0.251155486237742030f, -0.967946755628987800f, 0.250969880155890720f,
-    -0.967994896295707670f,
-  0.250784264846594550f, -0.968043001372022260f, 0.250598640316677830f,
-    -0.968091070856162970f,
-  0.250413006572965280f, -0.968139104746362330f, 0.250227363622282540f,
-    -0.968187103040854420f,
-  0.250041711471454650f, -0.968235065737874320f, 0.249856050127308050f,
-    -0.968282992835658660f,
-  0.249670379596668520f, -0.968330884332445300f, 0.249484699886363010f,
-    -0.968378740226473300f,
-  0.249299011003218300f, -0.968426560515983190f, 0.249113312954061360f,
-    -0.968474345199216820f,
-  0.248927605745720260f, -0.968522094274417270f, 0.248741889385022420f,
-    -0.968569807739828930f,
-  0.248556163878796620f, -0.968617485593697540f, 0.248370429233871150f,
-    -0.968665127834269950f,
-  0.248184685457074780f, -0.968712734459794780f, 0.247998932555237220f,
-    -0.968760305468521430f,
-  0.247813170535187620f, -0.968807840858700970f, 0.247627399403756330f,
-    -0.968855340628585580f,
-  0.247441619167773440f, -0.968902804776428870f, 0.247255829834069320f,
-    -0.968950233300485800f,
-  0.247070031409475370f, -0.968997626199012310f, 0.246884223900822430f,
-    -0.969044983470266240f,
-  0.246698407314942500f, -0.969092305112506100f, 0.246512581658667380f,
-    -0.969139591123992280f,
-  0.246326746938829060f, -0.969186841502985950f, 0.246140903162260640f,
-    -0.969234056247750050f,
-  0.245955050335794590f, -0.969281235356548530f, 0.245769188466264670f,
-    -0.969328378827646660f,
-  0.245583317560504000f, -0.969375486659311280f, 0.245397437625346990f,
-    -0.969422558849810320f,
-  0.245211548667627680f, -0.969469595397412950f, 0.245025650694180470f,
-    -0.969516596300390000f,
-  0.244839743711840750f, -0.969563561557013180f, 0.244653827727443320f,
-    -0.969610491165555870f,
-  0.244467902747824210f, -0.969657385124292450f, 0.244281968779819170f,
-    -0.969704243431498750f,
-  0.244096025830264210f, -0.969751066085452140f, 0.243910073905996370f,
-    -0.969797853084430890f,
-  0.243724113013852130f, -0.969844604426714830f, 0.243538143160669180f,
-    -0.969891320110585100f,
-  0.243352164353284880f, -0.969938000134323960f, 0.243166176598536930f,
-    -0.969984644496215240f,
-  0.242980179903263980f, -0.970031253194543970f, 0.242794174274304190f,
-    -0.970077826227596420f,
-  0.242608159718496890f, -0.970124363593660280f, 0.242422136242681050f,
-    -0.970170865291024360f,
-  0.242236103853696040f, -0.970217331317979160f, 0.242050062558382180f,
-    -0.970263761672816140f,
-  0.241864012363579210f, -0.970310156353828110f, 0.241677953276128090f,
-    -0.970356515359309450f,
-  0.241491885302869300f, -0.970402838687555500f, 0.241305808450644390f,
-    -0.970449126336863090f,
-  0.241119722726294730f, -0.970495378305530450f, 0.240933628136661910f,
-    -0.970541594591857070f,
-  0.240747524688588540f, -0.970587775194143630f, 0.240561412388916620f,
-    -0.970633920110692160f,
-  0.240375291244489500f, -0.970680029339806130f, 0.240189161262150040f,
-    -0.970726102879790110f,
-  0.240003022448741500f, -0.970772140728950350f, 0.239816874811108110f,
-    -0.970818142885593870f,
-  0.239630718356093560f, -0.970864109348029470f, 0.239444553090542720f,
-    -0.970910040114567050f,
-  0.239258379021300120f, -0.970955935183517970f, 0.239072196155210660f,
-    -0.971001794553194690f,
-  0.238886004499120170f, -0.971047618221911100f, 0.238699804059873950f,
-    -0.971093406187982460f,
-  0.238513594844318500f, -0.971139158449725090f, 0.238327376859299970f,
-    -0.971184875005457030f,
-  0.238141150111664870f, -0.971230555853497380f, 0.237954914608260650f,
-    -0.971276200992166490f,
-  0.237768670355934210f, -0.971321810419786160f, 0.237582417361533650f,
-    -0.971367384134679490f,
-  0.237396155631906550f, -0.971412922135170940f, 0.237209885173901620f,
-    -0.971458424419585960f,
-  0.237023605994367340f, -0.971503890986251780f, 0.236837318100152380f,
-    -0.971549321833496630f,
-  0.236651021498106460f, -0.971594716959650160f, 0.236464716195078750f,
-    -0.971640076363043390f,
-  0.236278402197919620f, -0.971685400042008540f, 0.236092079513479050f,
-    -0.971730687994879160f,
-  0.235905748148607370f, -0.971775940219990140f, 0.235719408110155930f,
-    -0.971821156715677700f,
-  0.235533059404975460f, -0.971866337480279400f, 0.235346702039917920f,
-    -0.971911482512134000f,
-  0.235160336021834860f, -0.971956591809581600f, 0.234973961357578310f,
-    -0.972001665370963890f,
-  0.234787578054001080f, -0.972046703194623380f, 0.234601186117955550f,
-    -0.972091705278904430f,
-  0.234414785556295250f, -0.972136671622152120f, 0.234228376375873380f,
-    -0.972181602222713440f,
-  0.234041958583543460f, -0.972226497078936270f, 0.233855532186159950f,
-    -0.972271356189170040f,
-  0.233669097190576820f, -0.972316179551765300f, 0.233482653603649170f,
-    -0.972360967165074140f,
-  0.233296201432231560f, -0.972405719027449770f, 0.233109740683179740f,
-    -0.972450435137246830f,
-  0.232923271363349120f, -0.972495115492821190f, 0.232736793479595420f,
-    -0.972539760092530180f,
-  0.232550307038775330f, -0.972584368934732210f, 0.232363812047745010f,
-    -0.972628942017787270f,
-  0.232177308513361770f, -0.972673479340056430f, 0.231990796442482580f,
-    -0.972717980899902250f,
-  0.231804275841964780f, -0.972762446695688570f, 0.231617746718666580f,
-    -0.972806876725780370f,
-  0.231431209079445730f, -0.972851270988544180f, 0.231244662931161110f,
-    -0.972895629482347760f,
-  0.231058108280671280f, -0.972939952205560070f, 0.230871545134835070f,
-    -0.972984239156551740f,
-  0.230684973500512310f, -0.973028490333694100f, 0.230498393384562320f,
-    -0.973072705735360530f,
-  0.230311804793845530f, -0.973116885359925130f, 0.230125207735222020f,
-    -0.973161029205763530f,
-  0.229938602215552260f, -0.973205137271252800f, 0.229751988241697600f,
-    -0.973249209554771120f,
-  0.229565365820518870f, -0.973293246054698250f, 0.229378734958878120f,
-    -0.973337246769414800f,
-  0.229192095663636740f, -0.973381211697303290f, 0.229005447941657390f,
-    -0.973425140836747030f,
-  0.228818791799802360f, -0.973469034186130950f, 0.228632127244934230f,
-    -0.973512891743841370f,
-  0.228445454283916550f, -0.973556713508265560f, 0.228258772923612350f,
-    -0.973600499477792370f,
-  0.228072083170885790f, -0.973644249650811870f, 0.227885385032600700f,
-    -0.973687964025715670f,
-  0.227698678515621170f, -0.973731642600896400f, 0.227511963626812390f,
-    -0.973775285374748000f,
-  0.227325240373038830f, -0.973818892345666100f, 0.227138508761166260f,
-    -0.973862463512047300f,
-  0.226951768798059980f, -0.973905998872289460f, 0.226765020490585720f,
-    -0.973949498424792170f,
-  0.226578263845610110f, -0.973992962167955830f, 0.226391498869999210f,
-    -0.974036390100182610f,
-  0.226204725570620270f, -0.974079782219875680f, 0.226017943954340190f,
-    -0.974123138525439520f,
-  0.225831154028026200f, -0.974166459015280320f, 0.225644355798546440f,
-    -0.974209743687805110f,
-  0.225457549272768540f, -0.974252992541422500f, 0.225270734457561240f,
-    -0.974296205574542330f,
-  0.225083911359792780f, -0.974339382785575860f, 0.224897079986332540f,
-    -0.974382524172935470f,
-  0.224710240344049570f, -0.974425629735034990f, 0.224523392439813170f,
-    -0.974468699470289580f,
-  0.224336536280493690f, -0.974511733377115720f, 0.224149671872960840f,
-    -0.974554731453931230f,
-  0.223962799224085520f, -0.974597693699155050f, 0.223775918340738290f,
-    -0.974640620111207560f,
-  0.223589029229790020f, -0.974683510688510670f, 0.223402131898112480f,
-    -0.974726365429487320f,
-  0.223215226352576960f, -0.974769184332561770f, 0.223028312600055870f,
-    -0.974811967396159830f,
-  0.222841390647421280f, -0.974854714618708430f, 0.222654460501545550f,
-    -0.974897425998635820f,
-  0.222467522169301990f, -0.974940101534371720f, 0.222280575657563370f,
-    -0.974982741224347140f,
-  0.222093620973203590f, -0.975025345066994120f, 0.221906658123096260f,
-    -0.975067913060746360f,
-  0.221719687114115240f, -0.975110445204038890f, 0.221532707953135340f,
-    -0.975152941495307620f,
-  0.221345720647030810f, -0.975195401932990370f, 0.221158725202677100f,
-    -0.975237826515525820f,
-  0.220971721626949060f, -0.975280215241354220f, 0.220784709926722670f,
-    -0.975322568108916930f,
-  0.220597690108873650f, -0.975364885116656870f, 0.220410662180277940f,
-    -0.975407166263018270f,
-  0.220223626147812460f, -0.975449411546446380f, 0.220036582018353550f,
-    -0.975491620965388110f,
-  0.219849529798778750f, -0.975533794518291360f, 0.219662469495965180f,
-    -0.975575932203605610f,
-  0.219475401116790340f, -0.975618034019781750f, 0.219288324668132580f,
-    -0.975660099965271590f,
-  0.219101240156869770f, -0.975702130038528570f, 0.218914147589880900f,
-    -0.975744124238007270f,
-  0.218727046974044600f, -0.975786082562163930f, 0.218539938316239830f,
-    -0.975828005009455550f,
-  0.218352821623346430f, -0.975869891578341030f, 0.218165696902243770f,
-    -0.975911742267280170f,
-  0.217978564159812290f, -0.975953557074734300f, 0.217791423402932120f,
-    -0.975995335999165880f,
-  0.217604274638483670f, -0.976037079039039020f, 0.217417117873348300f,
-    -0.976078786192818850f,
-  0.217229953114406790f, -0.976120457458971910f, 0.217042780368541080f,
-    -0.976162092835966110f,
-  0.216855599642632570f, -0.976203692322270560f, 0.216668410943563790f,
-    -0.976245255916355800f,
-  0.216481214278216900f, -0.976286783616693630f, 0.216294009653474370f,
-    -0.976328275421757260f,
-  0.216106797076219600f, -0.976369731330021140f, 0.215919576553335460f,
-    -0.976411151339961040f,
-  0.215732348091705940f, -0.976452535450054060f, 0.215545111698214660f,
-    -0.976493883658778540f,
-  0.215357867379745550f, -0.976535195964614470f, 0.215170615143183500f,
-    -0.976576472366042610f,
-  0.214983354995412820f, -0.976617712861545640f, 0.214796086943318920f,
-    -0.976658917449606980f,
-  0.214608810993786920f, -0.976700086128711840f, 0.214421527153702190f,
-    -0.976741218897346550f,
-  0.214234235429951100f, -0.976782315753998650f, 0.214046935829419330f,
-    -0.976823376697157240f,
-  0.213859628358993830f, -0.976864401725312640f, 0.213672313025561140f,
-    -0.976905390836956490f,
-  0.213484989836008080f, -0.976946344030581560f, 0.213297658797222430f,
-    -0.976987261304682390f,
-  0.213110319916091360f, -0.977028142657754390f, 0.212922973199503260f,
-    -0.977068988088294450f,
-  0.212735618654345870f, -0.977109797594800880f, 0.212548256287508120f,
-    -0.977150571175773200f,
-  0.212360886105878580f, -0.977191308829712280f, 0.212173508116346080f,
-    -0.977232010555120320f,
-  0.211986122325800410f, -0.977272676350500860f, 0.211798728741130820f,
-    -0.977313306214358750f,
-  0.211611327369227610f, -0.977353900145199960f, 0.211423918216980810f,
-    -0.977394458141532250f,
-  0.211236501291280710f, -0.977434980201864260f, 0.211049076599018500f,
-    -0.977475466324706050f,
-  0.210861644147084830f, -0.977515916508569280f, 0.210674203942371490f,
-    -0.977556330751966460f,
-  0.210486755991769890f, -0.977596709053411780f, 0.210299300302171750f,
-    -0.977637051411420770f,
-  0.210111836880469720f, -0.977677357824509930f, 0.209924365733555860f,
-    -0.977717628291197570f,
-  0.209736886868323370f, -0.977757862810002760f, 0.209549400291665110f,
-    -0.977798061379446360f,
-  0.209361906010474190f, -0.977838223998050430f, 0.209174404031644700f,
-    -0.977878350664338150f,
-  0.208986894362070070f, -0.977918441376834370f, 0.208799377008644980f,
-    -0.977958496134064830f,
-  0.208611851978263460f, -0.977998514934557140f, 0.208424319277820650f,
-    -0.978038497776839600f,
-  0.208236778914211470f, -0.978078444659442380f, 0.208049230894330940f,
-    -0.978118355580896660f,
-  0.207861675225075150f, -0.978158230539735050f, 0.207674111913339540f,
-    -0.978198069534491400f,
-  0.207486540966020700f, -0.978237872563701090f, 0.207298962390014880f,
-    -0.978277639625900420f,
-  0.207111376192218560f, -0.978317370719627650f, 0.206923782379529210f,
-    -0.978357065843421640f,
-  0.206736180958843660f, -0.978396724995823090f, 0.206548571937059940f,
-    -0.978436348175373730f,
-  0.206360955321075680f, -0.978475935380616830f, 0.206173331117788770f,
-    -0.978515486610096910f,
-  0.205985699334098050f, -0.978555001862359550f, 0.205798059976901760f,
-    -0.978594481135952270f,
-  0.205610413053099320f, -0.978633924429423100f, 0.205422758569589780f,
-    -0.978673331741322210f,
-  0.205235096533272380f, -0.978712703070200420f, 0.205047426951047380f,
-    -0.978752038414610340f,
-  0.204859749829814420f, -0.978791337773105670f, 0.204672065176474290f,
-    -0.978830601144241470f,
-  0.204484372997927180f, -0.978869828526574120f, 0.204296673301074430f,
-    -0.978909019918661310f,
-  0.204108966092817010f, -0.978948175319062200f, 0.203921251380056150f,
-    -0.978987294726337050f,
-  0.203733529169694010f, -0.979026378139047580f, 0.203545799468632190f,
-    -0.979065425555756930f,
-  0.203358062283773370f, -0.979104436975029250f, 0.203170317622019920f,
-    -0.979143412395430230f,
-  0.202982565490274460f, -0.979182351815526930f, 0.202794805895440550f,
-    -0.979221255233887700f,
-  0.202607038844421110f, -0.979260122649082020f, 0.202419264344120220f,
-    -0.979298954059681040f,
-  0.202231482401441620f, -0.979337749464256780f, 0.202043693023289280f,
-    -0.979376508861383170f,
-  0.201855896216568160f, -0.979415232249634780f, 0.201668091988182500f,
-    -0.979453919627588210f,
-  0.201480280345037820f, -0.979492570993820700f, 0.201292461294039190f,
-    -0.979531186346911390f,
-  0.201104634842091960f, -0.979569765685440520f, 0.200916800996102370f,
-    -0.979608309007989450f,
-  0.200728959762976140f, -0.979646816313141210f, 0.200541111149620090f,
-    -0.979685287599479930f,
-  0.200353255162940420f, -0.979723722865591170f, 0.200165391809844500f,
-    -0.979762122110061640f,
-  0.199977521097239290f, -0.979800485331479680f, 0.199789643032032120f,
-    -0.979838812528434740f,
-  0.199601757621131050f, -0.979877103699517640f, 0.199413864871443750f,
-    -0.979915358843320480f,
-  0.199225964789878890f, -0.979953577958436740f, 0.199038057383344820f,
-    -0.979991761043461200f,
-  0.198850142658750120f, -0.980029908096989980f, 0.198662220623004320f,
-    -0.980068019117620650f,
-  0.198474291283016360f, -0.980106094103951770f, 0.198286354645696270f,
-    -0.980144133054583590f,
-  0.198098410717953730f, -0.980182135968117320f, 0.197910459506698720f,
-    -0.980220102843155970f,
-  0.197722501018842030f, -0.980258033678303550f, 0.197534535261294000f,
-    -0.980295928472165290f,
-  0.197346562240966000f, -0.980333787223347960f, 0.197158581964769040f,
-    -0.980371609930459690f,
-  0.196970594439614370f, -0.980409396592109910f, 0.196782599672414240f,
-    -0.980447147206909060f,
-  0.196594597670080220f, -0.980484861773469380f, 0.196406588439525050f,
-    -0.980522540290404090f,
-  0.196218571987660850f, -0.980560182756327950f, 0.196030548321400880f,
-    -0.980597789169856850f,
-  0.195842517447657990f, -0.980635359529608120f, 0.195654479373345370f,
-    -0.980672893834200530f,
-  0.195466434105377090f, -0.980710392082253970f, 0.195278381650666520f,
-    -0.980747854272389750f,
-  0.195090322016128330f, -0.980785280403230430f, 0.194902255208676660f,
-    -0.980822670473399990f,
-  0.194714181235225990f, -0.980860024481523870f, 0.194526100102691720f,
-    -0.980897342426228390f,
-  0.194338011817988600f, -0.980934624306141640f, 0.194149916388032530f,
-    -0.980971870119892840f,
-  0.193961813819739010f, -0.981009079866112630f, 0.193773704120023840f,
-    -0.981046253543432780f,
-  0.193585587295803750f, -0.981083391150486590f, 0.193397463353994740f,
-    -0.981120492685908730f,
-  0.193209332301514080f, -0.981157558148334830f, 0.193021194145278320f,
-    -0.981194587536402320f,
-  0.192833048892205290f, -0.981231580848749730f, 0.192644896549212240f,
-    -0.981268538084016710f,
-  0.192456737123216840f, -0.981305459240844670f, 0.192268570621137590f,
-    -0.981342344317875930f,
-  0.192080397049892380f, -0.981379193313754560f, 0.191892216416400310f,
-    -0.981416006227125550f,
-  0.191704028727579940f, -0.981452783056635520f, 0.191515833990350240f,
-    -0.981489523800932130f,
-  0.191327632211630990f, -0.981526228458664660f, 0.191139423398341420f,
-    -0.981562897028483650f,
-  0.190951207557401860f, -0.981599529509040720f, 0.190762984695732250f,
-    -0.981636125898989080f,
-  0.190574754820252800f, -0.981672686196983110f, 0.190386517937884580f,
-    -0.981709210401678800f,
-  0.190198274055548120f, -0.981745698511732990f, 0.190010023180165050f,
-    -0.981782150525804310f,
-  0.189821765318656580f, -0.981818566442552500f, 0.189633500477944220f,
-    -0.981854946260638630f,
-  0.189445228664950340f, -0.981891289978724990f, 0.189256949886596720f,
-    -0.981927597595475540f,
-  0.189068664149806280f, -0.981963869109555240f, 0.188880371461501330f,
-    -0.982000104519630490f,
-  0.188692071828605260f, -0.982036303824369020f, 0.188503765258041080f,
-    -0.982072467022439890f,
-  0.188315451756732120f, -0.982108594112513610f, 0.188127131331602530f,
-    -0.982144685093261580f,
-  0.187938803989575850f, -0.982180739963357200f, 0.187750469737576840f,
-    -0.982216758721474510f,
-  0.187562128582529740f, -0.982252741366289370f, 0.187373780531359110f,
-    -0.982288687896478830f,
-  0.187185425590990440f, -0.982324598310721160f, 0.186997063768348510f,
-    -0.982360472607696210f,
-  0.186808695070359330f, -0.982396310786084690f, 0.186620319503948420f,
-    -0.982432112844569110f,
-  0.186431937076041640f, -0.982467878781833170f, 0.186243547793565670f,
-    -0.982503608596561720f,
-  0.186055151663446630f, -0.982539302287441240f, 0.185866748692611720f,
-    -0.982574959853159240f,
-  0.185678338887987790f, -0.982610581292404750f, 0.185489922256501900f,
-    -0.982646166603868050f,
-  0.185301498805082040f, -0.982681715786240860f, 0.185113068540655510f,
-    -0.982717228838215990f,
-  0.184924631470150870f, -0.982752705758487830f, 0.184736187600495930f,
-    -0.982788146545751970f,
-  0.184547736938619640f, -0.982823551198705240f, 0.184359279491450640f,
-    -0.982858919716046110f,
-  0.184170815265917720f, -0.982894252096474070f, 0.183982344268950600f,
-    -0.982929548338690060f,
-  0.183793866507478390f, -0.982964808441396440f, 0.183605381988431350f,
-    -0.983000032403296590f,
-  0.183416890718739230f, -0.983035220223095640f, 0.183228392705332140f,
-    -0.983070371899499640f,
-  0.183039887955141060f, -0.983105487431216290f, 0.182851376475096310f,
-    -0.983140566816954500f,
-  0.182662858272129360f, -0.983175610055424420f, 0.182474333353171260f,
-    -0.983210617145337640f,
-  0.182285801725153320f, -0.983245588085407070f, 0.182097263395007760f,
-    -0.983280522874346970f,
-  0.181908718369666160f, -0.983315421510872810f, 0.181720166656061170f,
-    -0.983350283993701500f,
-  0.181531608261125130f, -0.983385110321551180f, 0.181343043191790590f,
-    -0.983419900493141540f,
-  0.181154471454990920f, -0.983454654507193270f, 0.180965893057658980f,
-    -0.983489372362428730f,
-  0.180777308006728670f, -0.983524054057571260f, 0.180588716309133280f,
-    -0.983558699591345900f,
-  0.180400117971807270f, -0.983593308962478650f, 0.180211513001684590f,
-    -0.983627882169697210f,
-  0.180022901405699510f, -0.983662419211730250f, 0.179834283190787180f,
-    -0.983696920087308020f,
-  0.179645658363882100f, -0.983731384795162090f, 0.179457026931919950f,
-    -0.983765813334025240f,
-  0.179268388901835880f, -0.983800205702631490f, 0.179079744280565390f,
-    -0.983834561899716630f,
-  0.178891093075044830f, -0.983868881924017220f, 0.178702435292209940f,
-    -0.983903165774271500f,
-  0.178513770938997590f, -0.983937413449218920f, 0.178325100022344140f,
-    -0.983971624947600270f,
-  0.178136422549186320f, -0.984005800268157870f, 0.177947738526461670f,
-    -0.984039939409634970f,
-  0.177759047961107140f, -0.984074042370776450f, 0.177570350860060790f,
-    -0.984108109150328540f,
-  0.177381647230260200f, -0.984142139747038570f, 0.177192937078643310f,
-    -0.984176134159655320f,
-  0.177004220412148860f, -0.984210092386929030f, 0.176815497237715000f,
-    -0.984244014427611110f,
-  0.176626767562280960f, -0.984277900280454370f, 0.176438031392785350f,
-    -0.984311749944212780f,
-  0.176249288736167940f, -0.984345563417641900f, 0.176060539599367960f,
-    -0.984379340699498510f,
-  0.175871783989325040f, -0.984413081788540700f, 0.175683021912979580f,
-    -0.984446786683527920f,
-  0.175494253377271400f, -0.984480455383220930f, 0.175305478389141370f,
-    -0.984514087886381840f,
-  0.175116696955530060f, -0.984547684191773960f, 0.174927909083378160f,
-    -0.984581244298162180f,
-  0.174739114779627310f, -0.984614768204312600f, 0.174550314051218490f,
-    -0.984648255908992630f,
-  0.174361506905093830f, -0.984681707410970940f, 0.174172693348194960f,
-    -0.984715122709017620f,
-  0.173983873387463850f, -0.984748501801904210f, 0.173795047029843270f,
-    -0.984781844688403350f,
-  0.173606214282275410f, -0.984815151367289140f, 0.173417375151703520f,
-    -0.984848421837337010f,
-  0.173228529645070490f, -0.984881656097323700f, 0.173039677769319390f,
-    -0.984914854146027200f,
-  0.172850819531394200f, -0.984948015982227030f, 0.172661954938238270f,
-    -0.984981141604703960f,
-  0.172473083996796030f, -0.985014231012239840f, 0.172284206714011350f,
-    -0.985047284203618200f,
-  0.172095323096829040f, -0.985080301177623800f, 0.171906433152193700f,
-    -0.985113281933042590f,
-  0.171717536887049970f, -0.985146226468662230f, 0.171528634308343500f,
-    -0.985179134783271020f,
-  0.171339725423019260f, -0.985212006875659460f, 0.171150810238023340f,
-    -0.985244842744618540f,
-  0.170961888760301360f, -0.985277642388941220f, 0.170772960996799230f,
-    -0.985310405807421570f,
-  0.170584026954463700f, -0.985343132998854790f, 0.170395086640240920f,
-    -0.985375823962037710f,
-  0.170206140061078120f, -0.985408478695768420f, 0.170017187223922090f,
-    -0.985441097198846210f,
-  0.169828228135719880f, -0.985473679470071810f, 0.169639262803419400f,
-    -0.985506225508247290f,
-  0.169450291233967930f, -0.985538735312176060f, 0.169261313434313890f,
-    -0.985571208880662740f,
-  0.169072329411405180f, -0.985603646212513400f, 0.168883339172190010f,
-    -0.985636047306535420f,
-  0.168694342723617440f, -0.985668412161537550f, 0.168505340072635900f,
-    -0.985700740776329850f,
-  0.168316331226194910f, -0.985733033149723490f, 0.168127316191243350f,
-    -0.985765289280531310f,
-  0.167938294974731230f, -0.985797509167567370f, 0.167749267583608030f,
-    -0.985829692809647050f,
-  0.167560234024823590f, -0.985861840205586980f, 0.167371194305328540f,
-    -0.985893951354205210f,
-  0.167182148432072880f, -0.985926026254321130f, 0.166993096412007770f,
-    -0.985958064904755460f,
-  0.166804038252083870f, -0.985990067304330030f, 0.166614973959252090f,
-    -0.986022033451868560f,
-  0.166425903540464220f, -0.986053963346195440f, 0.166236827002671390f,
-    -0.986085856986136820f,
-  0.166047744352825850f, -0.986117714370520090f, 0.165858655597879430f,
-    -0.986149535498173860f,
-  0.165669560744784140f, -0.986181320367928270f, 0.165480459800492890f,
-    -0.986213068978614490f,
-  0.165291352771957970f, -0.986244781329065460f, 0.165102239666132720f,
-    -0.986276457418114980f,
-  0.164913120489970090f, -0.986308097244598670f, 0.164723995250423190f,
-    -0.986339700807353000f,
-  0.164534863954446110f, -0.986371268105216030f, 0.164345726608992190f,
-    -0.986402799137027220f,
-  0.164156583221015890f, -0.986434293901627070f, 0.163967433797471110f,
-    -0.986465752397857940f,
-  0.163778278345312690f, -0.986497174624562880f, 0.163589116871495160f,
-    -0.986528560580586690f,
-  0.163399949382973230f, -0.986559910264775410f, 0.163210775886702460f,
-    -0.986591223675976400f,
-  0.163021596389637810f, -0.986622500813038480f, 0.162832410898735260f,
-    -0.986653741674811350f,
-  0.162643219420950450f, -0.986684946260146690f, 0.162454021963239190f,
-    -0.986716114567897100f,
-  0.162264818532558110f, -0.986747246596916480f, 0.162075609135863330f,
-    -0.986778342346060430f,
-  0.161886393780111910f, -0.986809401814185420f, 0.161697172472260540f,
-    -0.986840425000149680f,
-  0.161507945219266150f, -0.986871411902812470f, 0.161318712028086540f,
-    -0.986902362521034470f,
-  0.161129472905678780f, -0.986933276853677710f, 0.160940227859001140f,
-    -0.986964154899605650f,
-  0.160750976895011390f, -0.986994996657682870f, 0.160561720020667510f,
-    -0.987025802126775600f,
-  0.160372457242928400f, -0.987056571305750970f, 0.160183188568752240f,
-    -0.987087304193477900f,
-  0.159993914005098350f, -0.987118000788826280f, 0.159804633558925380f,
-    -0.987148661090667570f,
-  0.159615347237193090f, -0.987179285097874340f, 0.159426055046860750f,
-    -0.987209872809320820f,
-  0.159236756994887850f, -0.987240424223882250f, 0.159047453088234840f,
-    -0.987270939340435420f,
-  0.158858143333861390f, -0.987301418157858430f, 0.158668827738728370f,
-    -0.987331860675030430f,
-  0.158479506309796100f, -0.987362266890832400f, 0.158290179054025180f,
-    -0.987392636804146240f,
-  0.158100845978377090f, -0.987422970413855410f, 0.157911507089812640f,
-    -0.987453267718844560f,
-  0.157722162395293690f, -0.987483528717999710f, 0.157532811901781670f,
-    -0.987513753410208420f,
-  0.157343455616238280f, -0.987543941794359230f, 0.157154093545626010f,
-    -0.987574093869342360f,
-  0.156964725696906750f, -0.987604209634049160f, 0.156775352077043430f,
-    -0.987634289087372160f,
-  0.156585972692998590f, -0.987664332228205710f, 0.156396587551734940f,
-    -0.987694339055445130f,
-  0.156207196660216040f, -0.987724309567986960f, 0.156017800025404830f,
-    -0.987754243764729530f,
-  0.155828397654265320f, -0.987784141644572180f, 0.155638989553760850f,
-    -0.987814003206415550f,
-  0.155449575730855880f, -0.987843828449161740f, 0.155260156192514380f,
-    -0.987873617371714200f,
-  0.155070730945700510f, -0.987903369972977790f, 0.154881299997379400f,
-    -0.987933086251858380f,
-  0.154691863354515400f, -0.987962766207263420f, 0.154502421024073990f,
-    -0.987992409838101880f,
-  0.154312973013020240f, -0.988022017143283530f, 0.154123519328319360f,
-    -0.988051588121720110f,
-  0.153934059976937460f, -0.988081122772324070f, 0.153744594965840000f,
-    -0.988110621094009820f,
-  0.153555124301993500f, -0.988140083085692570f, 0.153365647992364020f,
-    -0.988169508746289060f,
-  0.153176166043917870f, -0.988198898074717610f, 0.152986678463622160f,
-    -0.988228251069897420f,
-  0.152797185258443410f, -0.988257567730749460f, 0.152607686435349140f,
-    -0.988286848056195710f,
-  0.152418182001306500f, -0.988316092045159690f, 0.152228671963282770f,
-    -0.988345299696566150f,
-  0.152039156328246160f, -0.988374471009341280f, 0.151849635103164180f,
-    -0.988403605982412390f,
-  0.151660108295005400f, -0.988432704614708340f, 0.151470575910737760f,
-    -0.988461766905159300f,
-  0.151281037957330250f, -0.988490792852696590f, 0.151091494441751430f,
-    -0.988519782456253270f,
-  0.150901945370970040f, -0.988548735714763200f, 0.150712390751955720f,
-    -0.988577652627162020f,
-  0.150522830591677370f, -0.988606533192386450f, 0.150333264897105050f,
-    -0.988635377409374790f,
-  0.150143693675208330f, -0.988664185277066230f, 0.149954116932956990f,
-    -0.988692956794401940f,
-  0.149764534677321620f, -0.988721691960323780f, 0.149574946915272210f,
-    -0.988750390773775360f,
-  0.149385353653779810f, -0.988779053233701520f, 0.149195754899814960f,
-    -0.988807679339048340f,
-  0.149006150660348470f, -0.988836269088763540f, 0.148816540942352030f,
-    -0.988864822481795640f,
-  0.148626925752796540f, -0.988893339517095130f, 0.148437305098654050f,
-    -0.988921820193613190f,
-  0.148247678986896200f, -0.988950264510302990f, 0.148058047424494740f,
-    -0.988978672466118480f,
-  0.147868410418422360f, -0.989007044060015270f, 0.147678767975650970f,
-    -0.989035379290950310f,
-  0.147489120103153680f, -0.989063678157881540f, 0.147299466807902820f,
-    -0.989091940659768800f,
-  0.147109808096871850f, -0.989120166795572690f, 0.146920143977033760f,
-    -0.989148356564255590f,
-  0.146730474455361750f, -0.989176509964781010f, 0.146540799538829870f,
-    -0.989204626996113780f,
-  0.146351119234411440f, -0.989232707657220050f, 0.146161433549080950f,
-    -0.989260751947067640f,
-  0.145971742489812370f, -0.989288759864625170f, 0.145782046063579860f,
-    -0.989316731408863000f,
-  0.145592344277358450f, -0.989344666578752640f, 0.145402637138122540f,
-    -0.989372565373267010f,
-  0.145212924652847520f, -0.989400427791380380f, 0.145023206828508360f,
-    -0.989428253832068230f,
-  0.144833483672080240f, -0.989456043494307710f, 0.144643755190539150f,
-    -0.989483796777076760f,
-  0.144454021390860440f, -0.989511513679355190f, 0.144264282280020530f,
-    -0.989539194200123930f,
-  0.144074537864995330f, -0.989566838338365120f, 0.143884788152761010f,
-    -0.989594446093062460f,
-  0.143695033150294580f, -0.989622017463200780f, 0.143505272864572290f,
-    -0.989649552447766530f,
-  0.143315507302571590f, -0.989677051045747210f, 0.143125736471269140f,
-    -0.989704513256131850f,
-  0.142935960377642700f, -0.989731939077910570f, 0.142746179028669620f,
-    -0.989759328510075200f,
-  0.142556392431327340f, -0.989786681551618640f, 0.142366600592594260f,
-    -0.989813998201535260f,
-  0.142176803519448000f, -0.989841278458820530f, 0.141987001218867340f,
-    -0.989868522322471580f,
-  0.141797193697830530f, -0.989895729791486660f, 0.141607380963316020f,
-    -0.989922900864865450f,
-  0.141417563022303130f, -0.989950035541608990f, 0.141227739881770480f,
-    -0.989977133820719610f,
-  0.141037911548697770f, -0.990004195701200910f, 0.140848078030064220f,
-    -0.990031221182058000f,
-  0.140658239332849240f, -0.990058210262297120f, 0.140468395464033110f,
-    -0.990085162940925970f,
-  0.140278546430595420f, -0.990112079216953770f, 0.140088692239516780f,
-    -0.990138959089390650f,
-  0.139898832897777380f, -0.990165802557248400f, 0.139708968412357580f,
-    -0.990192609619540030f,
-  0.139519098790238600f, -0.990219380275280000f, 0.139329224038400980f,
-    -0.990246114523483990f,
-  0.139139344163826280f, -0.990272812363169110f, 0.138949459173495440f,
-    -0.990299473793353590f,
-  0.138759569074390380f, -0.990326098813057330f, 0.138569673873492640f,
-    -0.990352687421301340f,
-  0.138379773577783890f, -0.990379239617108160f, 0.138189868194246640f,
-    -0.990405755399501260f,
-  0.137999957729862760f, -0.990432234767505970f, 0.137810042191615130f,
-    -0.990458677720148620f,
-  0.137620121586486180f, -0.990485084256456980f, 0.137430195921458550f,
-    -0.990511454375460290f,
-  0.137240265203515700f, -0.990537788076188750f, 0.137050329439640380f,
-    -0.990564085357674370f,
-  0.136860388636816430f, -0.990590346218950150f, 0.136670442802027230f,
-    -0.990616570659050620f,
-  0.136480491942256310f, -0.990642758677011570f, 0.136290536064488070f,
-    -0.990668910271869980f,
-  0.136100575175706200f, -0.990695025442664630f, 0.135910609282895440f,
-    -0.990721104188435180f,
-  0.135720638393040080f, -0.990747146508222710f, 0.135530662513124620f,
-    -0.990773152401069780f,
-  0.135340681650134330f, -0.990799121866020370f, 0.135150695811053850f,
-    -0.990825054902119470f,
-  0.134960705002868830f, -0.990850951508413620f, 0.134770709232564290f,
-    -0.990876811683950810f,
-  0.134580708507126220f, -0.990902635427780010f, 0.134390702833540240f,
-    -0.990928422738951990f,
-  0.134200692218792020f, -0.990954173616518500f, 0.134010676669868210f,
-    -0.990979888059532740f,
-  0.133820656193754690f, -0.991005566067049370f, 0.133630630797438390f,
-    -0.991031207638124130f,
-  0.133440600487905820f, -0.991056812771814340f, 0.133250565272143570f,
-    -0.991082381467178640f,
-  0.133060525157139180f, -0.991107913723276780f, 0.132870480149879400f,
-    -0.991133409539170170f,
-  0.132680430257352130f, -0.991158868913921350f, 0.132490375486544710f,
-    -0.991184291846594180f,
-  0.132300315844444680f, -0.991209678336254060f, 0.132110251338040470f,
-    -0.991235028381967420f,
-  0.131920181974319760f, -0.991260341982802440f, 0.131730107760271280f,
-    -0.991285619137828200f,
-  0.131540028702883280f, -0.991310859846115440f, 0.131349944809144220f,
-    -0.991336064106736140f,
-  0.131159856086043410f, -0.991361231918763460f, 0.130969762540569380f,
-    -0.991386363281272280f,
-  0.130779664179711790f, -0.991411458193338540f, 0.130589561010459600f,
-    -0.991436516654039420f,
-  0.130399453039802740f, -0.991461538662453790f, 0.130209340274730770f,
-    -0.991486524217661480f,
-  0.130019222722233350f, -0.991511473318743900f, 0.129829100389301010f,
-    -0.991536385964783880f,
-  0.129638973282923540f, -0.991561262154865290f, 0.129448841410091830f,
-    -0.991586101888073500f,
-  0.129258704777796270f, -0.991610905163495370f, 0.129068563393027410f,
-    -0.991635671980218740f,
-  0.128878417262776660f, -0.991660402337333210f, 0.128688266394034690f,
-    -0.991685096233929530f,
-  0.128498110793793220f, -0.991709753669099530f, 0.128307950469043590f,
-    -0.991734374641936810f,
-  0.128117785426777150f, -0.991758959151536110f, 0.127927615673986190f,
-    -0.991783507196993490f,
-  0.127737441217662280f, -0.991808018777406430f, 0.127547262064798050f,
-    -0.991832493891873780f,
-  0.127357078222385570f, -0.991856932539495360f, 0.127166889697417180f,
-    -0.991881334719373010f,
-  0.126976696496885980f, -0.991905700430609330f, 0.126786498627784430f,
-    -0.991930029672308480f,
-  0.126596296097105960f, -0.991954322443575950f, 0.126406088911843320f,
-    -0.991978578743518580f,
-  0.126215877078990400f, -0.992002798571244520f, 0.126025660605540460f,
-    -0.992026981925863360f,
-  0.125835439498487020f, -0.992051128806485720f, 0.125645213764824380f,
-    -0.992075239212224070f,
-  0.125454983411546210f, -0.992099313142191800f, 0.125264748445647110f,
-    -0.992123350595503720f,
-  0.125074508874121300f, -0.992147351571276090f, 0.124884264703963150f,
-    -0.992171316068626520f,
-  0.124694015942167770f, -0.992195244086673920f, 0.124503762595729650f,
-    -0.992219135624538450f,
-  0.124313504671644300f, -0.992242990681341700f, 0.124123242176906760f,
-    -0.992266809256206580f,
-  0.123932975118512200f, -0.992290591348257370f, 0.123742703503456630f,
-    -0.992314336956619640f,
-  0.123552427338735370f, -0.992338046080420420f, 0.123362146631344750f,
-    -0.992361718718787870f,
-  0.123171861388280650f, -0.992385354870851670f, 0.122981571616539080f,
-    -0.992408954535742850f,
-  0.122791277323116900f, -0.992432517712593550f, 0.122600978515010240f,
-    -0.992456044400537700f,
-  0.122410675199216280f, -0.992479534598709970f, 0.122220367382731500f,
-    -0.992502988306246950f,
-  0.122030055072553410f, -0.992526405522286100f, 0.121839738275679020f,
-    -0.992549786245966570f,
-  0.121649416999105540f, -0.992573130476428810f, 0.121459091249830950f,
-    -0.992596438212814290f,
-  0.121268761034852550f, -0.992619709454266140f, 0.121078426361168710f,
-    -0.992642944199928820f,
-  0.120888087235777220f, -0.992666142448948020f, 0.120697743665676120f,
-    -0.992689304200470750f,
-  0.120507395657864240f, -0.992712429453645460f, 0.120317043219339670f,
-    -0.992735518207621850f,
-  0.120126686357101580f, -0.992758570461551140f, 0.119936325078148620f,
-    -0.992781586214585570f,
-  0.119745959389479630f, -0.992804565465879140f, 0.119555589298094230f,
-    -0.992827508214586760f,
-  0.119365214810991350f, -0.992850414459865100f, 0.119174835935170960f,
-    -0.992873284200871730f,
-  0.118984452677632520f, -0.992896117436765980f, 0.118794065045375670f,
-    -0.992918914166708300f,
-  0.118603673045400840f, -0.992941674389860470f, 0.118413276684707770f,
-    -0.992964398105385610f,
-  0.118222875970297250f, -0.992987085312448390f, 0.118032470909169300f,
-    -0.993009736010214580f,
-  0.117842061508325020f, -0.993032350197851410f, 0.117651647774765000f,
-    -0.993054927874527320f,
-  0.117461229715489990f, -0.993077469039412300f, 0.117270807337501560f,
-    -0.993099973691677570f,
-  0.117080380647800550f, -0.993122441830495580f, 0.116889949653388850f,
-    -0.993144873455040430f,
-  0.116699514361267840f, -0.993167268564487230f, 0.116509074778439050f,
-    -0.993189627158012620f,
-  0.116318630911904880f, -0.993211949234794500f, 0.116128182768666920f,
-    -0.993234234794012290f,
-  0.115937730355727850f, -0.993256483834846440f, 0.115747273680089870f,
-    -0.993278696356479030f,
-  0.115556812748755290f, -0.993300872358093280f, 0.115366347568727250f,
-    -0.993323011838873950f,
-  0.115175878147008180f, -0.993345114798006910f, 0.114985404490601530f,
-    -0.993367181234679600f,
-  0.114794926606510250f, -0.993389211148080650f, 0.114604444501737460f,
-    -0.993411204537400060f,
-  0.114413958183287050f, -0.993433161401829360f, 0.114223467658162260f,
-    -0.993455081740560960f,
-  0.114032972933367300f, -0.993476965552789190f, 0.113842474015905660f,
-    -0.993498812837709360f,
-  0.113651970912781920f, -0.993520623594518090f, 0.113461463631000080f,
-    -0.993542397822413600f,
-  0.113270952177564360f, -0.993564135520595300f, 0.113080436559479720f,
-    -0.993585836688263950f,
-  0.112889916783750470f, -0.993607501324621610f, 0.112699392857381910f,
-    -0.993629129428871720f,
-  0.112508864787378830f, -0.993650721000219120f, 0.112318332580746190f,
-    -0.993672276037870010f,
-  0.112127796244489750f, -0.993693794541031680f, 0.111937255785614560f,
-    -0.993715276508913230f,
-  0.111746711211126660f, -0.993736721940724600f, 0.111556162528031630f,
-    -0.993758130835677430f,
-  0.111365609743335190f, -0.993779503192984580f, 0.111175052864043830f,
-    -0.993800839011860120f,
-  0.110984491897163380f, -0.993822138291519660f, 0.110793926849700630f,
-    -0.993843401031180180f,
-  0.110603357728661910f, -0.993864627230059750f, 0.110412784541053660f,
-    -0.993885816887378090f,
-  0.110222207293883180f, -0.993906970002356060f, 0.110031625994157000f,
-    -0.993928086574215830f,
-  0.109841040648882680f, -0.993949166602181130f, 0.109650451265067080f,
-    -0.993970210085476920f,
-  0.109459857849718030f, -0.993991217023329380f, 0.109269260409842920f,
-    -0.994012187414966220f,
-  0.109078658952449240f, -0.994033121259616400f, 0.108888053484545310f,
-    -0.994054018556510210f,
-  0.108697444013138670f, -0.994074879304879370f, 0.108506830545237980f,
-    -0.994095703503956930f,
-  0.108316213087851300f, -0.994116491152977070f, 0.108125591647986880f,
-    -0.994137242251175720f,
-  0.107934966232653760f, -0.994157956797789730f, 0.107744336848860260f,
-    -0.994178634792057590f,
-  0.107553703503615710f, -0.994199276233218910f, 0.107363066203928920f,
-    -0.994219881120514850f,
-  0.107172424956808870f, -0.994240449453187900f, 0.106981779769265340f,
-    -0.994260981230481790f,
-  0.106791130648307380f, -0.994281476451641550f, 0.106600477600945030f,
-    -0.994301935115913580f,
-  0.106409820634187840f, -0.994322357222545810f, 0.106219159755045520f,
-    -0.994342742770787270f,
-  0.106028494970528530f, -0.994363091759888570f, 0.105837826287646670f,
-    -0.994383404189101430f,
-  0.105647153713410700f, -0.994403680057679100f, 0.105456477254830660f,
-    -0.994423919364875950f,
-  0.105265796918917650f, -0.994444122109948040f, 0.105075112712682180f,
-    -0.994464288292152390f,
-  0.104884424643134970f, -0.994484417910747600f, 0.104693732717287500f,
-    -0.994504510964993590f,
-  0.104503036942150550f, -0.994524567454151740f, 0.104312337324735870f,
-    -0.994544587377484300f,
-  0.104121633872054730f, -0.994564570734255420f, 0.103930926591118540f,
-    -0.994584517523730340f,
-  0.103740215488939480f, -0.994604427745175660f, 0.103549500572529040f,
-    -0.994624301397859400f,
-  0.103358781848899700f, -0.994644138481050710f, 0.103168059325063390f,
-    -0.994663938994020280f,
-  0.102977333008032250f, -0.994683702936040250f, 0.102786602904819150f,
-    -0.994703430306383860f,
-  0.102595869022436280f, -0.994723121104325700f, 0.102405131367896790f,
-    -0.994742775329142010f,
-  0.102214389948213370f, -0.994762392980109930f, 0.102023644770398800f,
-    -0.994781974056508260f,
-  0.101832895841466670f, -0.994801518557617110f, 0.101642143168429830f,
-    -0.994821026482717860f,
-  0.101451386758302160f, -0.994840497831093180f, 0.101260626618096800f,
-    -0.994859932602027320f,
-  0.101069862754827880f, -0.994879330794805620f, 0.100879095175509010f,
-    -0.994898692408714870f,
-  0.100688323887153970f, -0.994918017443043200f, 0.100497548896777310f,
-    -0.994937305897080070f,
-  0.100306770211392820f, -0.994956557770116380f, 0.100115987838015370f,
-    -0.994975773061444140f,
-  0.099925201783659226f, -0.994994951770357020f, 0.099734412055338839f,
-    -0.995014093896149700f,
-  0.099543618660069444f, -0.995033199438118630f, 0.099352821604865513f,
-    -0.995052268395561160f,
-  0.099162020896742573f, -0.995071300767776170f, 0.098971216542715582f,
-    -0.995090296554063890f,
-  0.098780408549799664f, -0.995109255753726110f, 0.098589596925010708f,
-    -0.995128178366065490f,
-  0.098398781675363881f, -0.995147064390386470f, 0.098207962807875346f,
-    -0.995165913825994620f,
-  0.098017140329560770f, -0.995184726672196820f, 0.097826314247435903f,
-    -0.995203502928301510f,
-  0.097635484568517339f, -0.995222242593618240f, 0.097444651299820870f,
-    -0.995240945667458130f,
-  0.097253814448363354f, -0.995259612149133390f, 0.097062974021160875f,
-    -0.995278242037957670f,
-  0.096872130025230527f, -0.995296835333246090f, 0.096681282467588864f,
-    -0.995315392034315070f,
-  0.096490431355252607f, -0.995333912140482280f, 0.096299576695239225f,
-    -0.995352395651066810f,
-  0.096108718494565468f, -0.995370842565388990f, 0.095917856760249096f,
-    -0.995389252882770690f,
-  0.095726991499307315f, -0.995407626602534900f, 0.095536122718757485f,
-    -0.995425963724006160f,
-  0.095345250425617742f, -0.995444264246510340f, 0.095154374626905472f,
-    -0.995462528169374420f,
-  0.094963495329639061f, -0.995480755491926940f, 0.094772612540836410f,
-    -0.995498946213497770f,
-  0.094581726267515473f, -0.995517100333418110f, 0.094390836516695067f,
-    -0.995535217851020390f,
-  0.094199943295393190f, -0.995553298765638470f, 0.094009046610628907f,
-    -0.995571343076607770f,
-  0.093818146469420494f, -0.995589350783264600f, 0.093627242878787237f,
-    -0.995607321884947050f,
-  0.093436335845747912f, -0.995625256380994310f, 0.093245425377321389f,
-    -0.995643154270746900f,
-  0.093054511480527333f, -0.995661015553546910f, 0.092863594162384697f,
-    -0.995678840228737540f,
-  0.092672673429913366f, -0.995696628295663520f, 0.092481749290132753f,
-    -0.995714379753670610f,
-  0.092290821750062355f, -0.995732094602106430f, 0.092099890816722485f,
-    -0.995749772840319400f,
-  0.091908956497132696f, -0.995767414467659820f, 0.091718018798313525f,
-    -0.995785019483478750f,
-  0.091527077727284981f, -0.995802587887129160f, 0.091336133291067212f,
-    -0.995820119677964910f,
-  0.091145185496681130f, -0.995837614855341610f, 0.090954234351146898f,
-    -0.995855073418615790f,
-  0.090763279861485704f, -0.995872495367145730f, 0.090572322034718156f,
-    -0.995889880700290720f,
-  0.090381360877865011f, -0.995907229417411720f, 0.090190396397947820f,
-    -0.995924541517870690f,
-  0.089999428601987341f, -0.995941817001031350f, 0.089808457497005362f,
-    -0.995959055866258320f,
-  0.089617483090022917f, -0.995976258112917790f, 0.089426505388062016f,
-    -0.995993423740377360f,
-  0.089235524398144139f, -0.996010552748005870f, 0.089044540127290905f,
-    -0.996027645135173610f,
-  0.088853552582524684f, -0.996044700901251970f, 0.088662561770867121f,
-    -0.996061720045614000f,
-  0.088471567699340822f, -0.996078702567633980f, 0.088280570374967879f,
-    -0.996095648466687300f,
-  0.088089569804770507f, -0.996112557742151130f, 0.087898565995771685f,
-    -0.996129430393403740f,
-  0.087707558954993645f, -0.996146266419824620f, 0.087516548689459586f,
-    -0.996163065820794950f,
-  0.087325535206192226f, -0.996179828595696870f, 0.087134518512214321f,
-    -0.996196554743914220f,
-  0.086943498614549489f, -0.996213244264832040f, 0.086752475520220515f,
-    -0.996229897157836500f,
-  0.086561449236251239f, -0.996246513422315520f, 0.086370419769664919f,
-    -0.996263093057658030f,
-  0.086179387127484922f, -0.996279636063254650f, 0.085988351316735448f,
-    -0.996296142438496850f,
-  0.085797312344439880f, -0.996312612182778000f, 0.085606270217622613f,
-    -0.996329045295492380f,
-  0.085415224943307277f, -0.996345441776035900f, 0.085224176528518519f,
-    -0.996361801623805720f,
-  0.085033124980280414f, -0.996378124838200210f, 0.084842070305617148f,
-    -0.996394411418619290f,
-  0.084651012511553700f, -0.996410661364464100f, 0.084459951605114297f,
-    -0.996426874675137240f,
-  0.084268887593324127f, -0.996443051350042630f, 0.084077820483207846f,
-    -0.996459191388585410f,
-  0.083886750281790226f, -0.996475294790172160f, 0.083695676996096827f,
-    -0.996491361554210920f,
-  0.083504600633152404f, -0.996507391680110820f, 0.083313521199982740f,
-    -0.996523385167282450f,
-  0.083122438703613077f, -0.996539342015137940f, 0.082931353151068726f,
-    -0.996555262223090540f,
-  0.082740264549375803f, -0.996571145790554840f, 0.082549172905559659f,
-    -0.996586992716946950f,
-  0.082358078226646619f, -0.996602803001684130f, 0.082166980519662466f,
-    -0.996618576644185070f,
-  0.081975879791633108f, -0.996634313643869900f, 0.081784776049585201f,
-    -0.996650014000160070f,
-  0.081593669300544638f, -0.996665677712478160f, 0.081402559551538328f,
-    -0.996681304780248300f,
-  0.081211446809592386f, -0.996696895202896060f, 0.081020331081733912f,
-    -0.996712448979848010f,
-  0.080829212374989468f, -0.996727966110532490f, 0.080638090696385709f,
-    -0.996743446594378860f,
-  0.080446966052950097f, -0.996758890430818000f, 0.080255838451709291f,
-    -0.996774297619282050f,
-  0.080064707899690932f, -0.996789668159204560f, 0.079873574403922148f,
-    -0.996805002050020320f,
-  0.079682437971430126f, -0.996820299291165670f, 0.079491298609242866f,
-    -0.996835559882078170f,
-  0.079300156324387569f, -0.996850783822196610f, 0.079109011123892431f,
-    -0.996865971110961310f,
-  0.078917863014785095f, -0.996881121747813850f, 0.078726712004093313f,
-    -0.996896235732197210f,
-  0.078535558098845590f, -0.996911313063555740f, 0.078344401306069678f,
-    -0.996926353741335090f,
-  0.078153241632794315f, -0.996941357764982160f, 0.077962079086047645f,
-    -0.996956325133945280f,
-  0.077770913672857989f, -0.996971255847674320f, 0.077579745400254363f,
-    -0.996986149905620180f,
-  0.077388574275265049f, -0.997001007307235290f, 0.077197400304919297f,
-    -0.997015828051973310f,
-  0.077006223496245585f, -0.997030612139289450f, 0.076815043856273399f,
-    -0.997045359568640040f,
-  0.076623861392031617f, -0.997060070339482960f, 0.076432676110549283f,
-    -0.997074744451277310f,
-  0.076241488018856149f, -0.997089381903483400f, 0.076050297123981231f,
-    -0.997103982695563330f,
-  0.075859103432954503f, -0.997118546826979980f, 0.075667906952805383f,
-    -0.997133074297198110f,
-  0.075476707690563416f, -0.997147565105683480f, 0.075285505653258880f,
-    -0.997162019251903290f,
-  0.075094300847921291f, -0.997176436735326190f, 0.074903093281581137f,
-    -0.997190817555421940f,
-  0.074711882961268378f, -0.997205161711661850f, 0.074520669894013014f,
-    -0.997219469203518670f,
-  0.074329454086845867f, -0.997233740030466160f, 0.074138235546796952f,
-    -0.997247974191979860f,
-  0.073947014280897269f, -0.997262171687536170f, 0.073755790296177265f,
-    -0.997276332516613180f,
-  0.073564563599667454f, -0.997290456678690210f, 0.073373334198399157f,
-    -0.997304544173247990f,
-  0.073182102099402888f, -0.997318594999768600f, 0.072990867309710133f,
-    -0.997332609157735470f,
-  0.072799629836351618f, -0.997346586646633230f, 0.072608389686359048f,
-    -0.997360527465947940f,
-  0.072417146866763538f, -0.997374431615167030f, 0.072225901384596336f,
-    -0.997388299093779460f,
-  0.072034653246889416f, -0.997402129901275300f, 0.071843402460674000f,
-    -0.997415924037145960f,
-  0.071652149032982254f, -0.997429681500884180f, 0.071460892970845832f,
-    -0.997443402291984360f,
-  0.071269634281296415f, -0.997457086409941910f, 0.071078372971366502f,
-    -0.997470733854253670f,
-  0.070887109048087787f, -0.997484344624417930f, 0.070695842518492924f,
-    -0.997497918719934210f,
-  0.070504573389614009f, -0.997511456140303450f, 0.070313301668483263f,
-    -0.997524956885027960f,
-  0.070122027362133646f, -0.997538420953611230f, 0.069930750477597295f,
-    -0.997551848345558430f,
-  0.069739471021907376f, -0.997565239060375750f, 0.069548189002096472f,
-    -0.997578593097570800f,
-  0.069356904425197236f, -0.997591910456652630f, 0.069165617298243109f,
-    -0.997605191137131640f,
-  0.068974327628266732f, -0.997618435138519550f, 0.068783035422301728f,
-    -0.997631642460329320f,
-  0.068591740687380900f, -0.997644813102075420f, 0.068400443430538069f,
-    -0.997657947063273710f,
-  0.068209143658806454f, -0.997671044343441000f, 0.068017841379219388f,
-    -0.997684104942096030f,
-  0.067826536598810966f, -0.997697128858758500f, 0.067635229324614451f,
-    -0.997710116092949570f,
-  0.067443919563664106f, -0.997723066644191640f, 0.067252607322993652f,
-    -0.997735980512008620f,
-  0.067061292609636836f, -0.997748857695925690f, 0.066869975430628226f,
-    -0.997761698195469560f,
-  0.066678655793001543f, -0.997774502010167820f, 0.066487333703791507f,
-    -0.997787269139549960f,
-  0.066296009170032283f, -0.997799999583146470f, 0.066104682198758091f,
-    -0.997812693340489280f,
-  0.065913352797003930f, -0.997825350411111640f, 0.065722020971803977f,
-    -0.997837970794548280f,
-  0.065530686730193397f, -0.997850554490335110f, 0.065339350079206798f,
-    -0.997863101498009500f,
-  0.065148011025878860f, -0.997875611817110150f, 0.064956669577245010f,
-    -0.997888085447177110f,
-  0.064765325740339871f, -0.997900522387751620f, 0.064573979522199065f,
-    -0.997912922638376610f,
-  0.064382630929857410f, -0.997925286198596000f, 0.064191279970350679f,
-    -0.997937613067955250f,
-  0.063999926650714078f, -0.997949903246001190f, 0.063808570977982898f,
-    -0.997962156732281950f,
-  0.063617212959193190f, -0.997974373526346990f, 0.063425852601380200f,
-    -0.997986553627747020f,
-  0.063234489911580136f, -0.997998697036034390f, 0.063043124896828631f,
-    -0.998010803750762450f,
-  0.062851757564161420f, -0.998022873771486240f, 0.062660387920614985f,
-    -0.998034907097761770f,
-  0.062469015973224969f, -0.998046903729146840f, 0.062277641729028041f,
-    -0.998058863665200250f,
-  0.062086265195060247f, -0.998070786905482340f, 0.061894886378357744f,
-    -0.998082673449554590f,
-  0.061703505285957416f, -0.998094523296980010f, 0.061512121924895365f,
-    -0.998106336447323050f,
-  0.061320736302208648f, -0.998118112900149180f, 0.061129348424933755f,
-    -0.998129852655025520f,
-  0.060937958300107238f, -0.998141555711520520f, 0.060746565934766412f,
-    -0.998153222069203650f,
-  0.060555171335947781f, -0.998164851727646240f, 0.060363774510688827f,
-    -0.998176444686420530f,
-  0.060172375466026218f, -0.998188000945100300f, 0.059980974208997596f,
-    -0.998199520503260660f,
-  0.059789570746640007f, -0.998211003360478190f, 0.059598165085990598f,
-    -0.998222449516330550f,
-  0.059406757234087247f, -0.998233858970396850f, 0.059215347197967026f,
-    -0.998245231722257880f,
-  0.059023934984667986f, -0.998256567771495180f, 0.058832520601227581f,
-    -0.998267867117692110f,
-  0.058641104054683348f, -0.998279129760433200f, 0.058449685352073573f,
-    -0.998290355699304350f,
-  0.058258264500435732f, -0.998301544933892890f, 0.058066841506808263f,
-    -0.998312697463787260f,
-  0.057875416378229017f, -0.998323813288577560f, 0.057683989121735932f,
-    -0.998334892407855000f,
-  0.057492559744367684f, -0.998345934821212370f, 0.057301128253162144f,
-    -0.998356940528243420f,
-  0.057109694655158132f, -0.998367909528543820f, 0.056918258957393907f,
-    -0.998378841821709990f,
-  0.056726821166907783f, -0.998389737407340160f, 0.056535381290738825f,
-    -0.998400596285033640f,
-  0.056343939335925283f, -0.998411418454391300f, 0.056152495309506383f,
-    -0.998422203915015020f,
-  0.055961049218520520f, -0.998432952666508440f, 0.055769601070007072f,
-    -0.998443664708476340f,
-  0.055578150871004817f, -0.998454340040524800f, 0.055386698628552604f,
-    -0.998464978662261250f,
-  0.055195244349690031f, -0.998475580573294770f, 0.055003788041455885f,
-    -0.998486145773235360f,
-  0.054812329710889909f, -0.998496674261694640f, 0.054620869365031251f,
-    -0.998507166038285490f,
-  0.054429407010919147f, -0.998517621102622210f, 0.054237942655593556f,
-    -0.998528039454320230f,
-  0.054046476306093640f, -0.998538421092996730f, 0.053855007969459509f,
-    -0.998548766018269920f,
-  0.053663537652730679f, -0.998559074229759310f, 0.053472065362946755f,
-    -0.998569345727086110f,
-  0.053280591107148056f, -0.998579580509872500f, 0.053089114892374119f,
-    -0.998589778577742230f,
-  0.052897636725665401f, -0.998599939930320370f, 0.052706156614061798f,
-    -0.998610064567233340f,
-  0.052514674564603257f, -0.998620152488108870f, 0.052323190584330471f,
-    -0.998630203692576050f,
-  0.052131704680283317f, -0.998640218180265270f, 0.051940216859502626f,
-    -0.998650195950808280f,
-  0.051748727129028414f, -0.998660137003838490f, 0.051557235495901653f,
-    -0.998670041338990070f,
-  0.051365741967162731f, -0.998679908955899090f, 0.051174246549852087f,
-    -0.998689739854202620f,
-  0.050982749251010900f, -0.998699534033539280f, 0.050791250077679546f,
-    -0.998709291493549030f,
-  0.050599749036899337f, -0.998719012233872940f, 0.050408246135710995f,
-    -0.998728696254153720f,
-  0.050216741381155325f, -0.998738343554035230f, 0.050025234780273840f,
-    -0.998747954133162860f,
-  0.049833726340107257f, -0.998757527991183340f, 0.049642216067697226f,
-    -0.998767065127744380f,
-  0.049450703970084824f, -0.998776565542495610f, 0.049259190054311168f,
-    -0.998786029235087640f,
-  0.049067674327418126f, -0.998795456205172410f, 0.048876156796446746f,
-    -0.998804846452403420f,
-  0.048684637468439020f, -0.998814199976435390f, 0.048493116350436342f,
-    -0.998823516776924380f,
-  0.048301593449480172f, -0.998832796853527990f, 0.048110068772612716f,
-    -0.998842040205904840f,
-  0.047918542326875327f, -0.998851246833715180f, 0.047727014119310344f,
-    -0.998860416736620520f,
-  0.047535484156959261f, -0.998869549914283560f, 0.047343952446864526f,
-    -0.998878646366368690f,
-  0.047152418996068000f, -0.998887706092541290f, 0.046960883811611599f,
-    -0.998896729092468410f,
-  0.046769346900537960f, -0.998905715365818290f, 0.046577808269888908f,
-    -0.998914664912260440f,
-  0.046386267926707213f, -0.998923577731465780f, 0.046194725878035046f,
-    -0.998932453823106690f,
-  0.046003182130914644f, -0.998941293186856870f, 0.045811636692388955f,
-    -0.998950095822391250f,
-  0.045620089569500123f, -0.998958861729386080f, 0.045428540769291224f,
-    -0.998967590907519300f,
-  0.045236990298804750f, -0.998976283356469820f, 0.045045438165083225f,
-    -0.998984939075918010f,
-  0.044853884375169933f, -0.998993558065545680f, 0.044662328936107311f,
-    -0.999002140325035980f,
-  0.044470771854938744f, -0.999010685854073380f, 0.044279213138707016f,
-    -0.999019194652343460f,
-  0.044087652794454979f, -0.999027666719533690f, 0.043896090829226200f,
-    -0.999036102055332330f,
-  0.043704527250063421f, -0.999044500659429290f, 0.043512962064010327f,
-    -0.999052862531515930f,
-  0.043321395278109784f, -0.999061187671284600f, 0.043129826899405595f,
-    -0.999069476078429330f,
-  0.042938256934940959f, -0.999077727752645360f, 0.042746685391759139f,
-    -0.999085942693629270f,
-  0.042555112276904117f, -0.999094120901079070f, 0.042363537597419038f,
-    -0.999102262374694130f,
-  0.042171961360348002f, -0.999110367114174890f, 0.041980383572734502f,
-    -0.999118435119223490f,
-  0.041788804241622082f, -0.999126466389543390f, 0.041597223374055005f,
-    -0.999134460924839150f,
-  0.041405640977076712f, -0.999142418724816910f, 0.041214057057731589f,
-    -0.999150339789184110f,
-  0.041022471623063397f, -0.999158224117649430f, 0.040830884680115968f,
-    -0.999166071709923000f,
-  0.040639296235933854f, -0.999173882565716380f, 0.040447706297560768f,
-    -0.999181656684742350f,
-  0.040256114872041358f, -0.999189394066714920f, 0.040064521966419686f,
-    -0.999197094711349880f,
-  0.039872927587739845f, -0.999204758618363890f, 0.039681331743046659f,
-    -0.999212385787475290f,
-  0.039489734439384118f, -0.999219976218403530f, 0.039298135683797149f,
-    -0.999227529910869610f,
-  0.039106535483329839f, -0.999235046864595850f, 0.038914933845027241f,
-    -0.999242527079305830f,
-  0.038723330775933762f, -0.999249970554724420f, 0.038531726283093877f,
-    -0.999257377290578060f,
-  0.038340120373552791f, -0.999264747286594420f, 0.038148513054354856f,
-    -0.999272080542502610f,
-  0.037956904332545366f, -0.999279377058032710f, 0.037765294215169005f,
-    -0.999286636832916740f,
-  0.037573682709270514f, -0.999293859866887790f, 0.037382069821895340f,
-    -0.999301046159680070f,
-  0.037190455560088091f, -0.999308195711029470f, 0.036998839930894332f,
-    -0.999315308520673070f,
-  0.036807222941358991f, -0.999322384588349540f, 0.036615604598527057f,
-    -0.999329423913798420f,
-  0.036423984909444228f, -0.999336426496761240f, 0.036232363881155374f,
-    -0.999343392336980220f,
-  0.036040741520706299f, -0.999350321434199440f, 0.035849117835142184f,
-    -0.999357213788164000f,
-  0.035657492831508264f, -0.999364069398620550f, 0.035465866516850478f,
-    -0.999370888265317060f,
-  0.035274238898213947f, -0.999377670388002850f, 0.035082609982644702f,
-    -0.999384415766428560f,
-  0.034890979777187955f, -0.999391124400346050f, 0.034699348288889847f,
-    -0.999397796289508640f,
-  0.034507715524795889f, -0.999404431433671300f, 0.034316081491951658f,
-    -0.999411029832589780f,
-  0.034124446197403423f, -0.999417591486021720f, 0.033932809648196623f,
-    -0.999424116393725640f,
-  0.033741171851377642f, -0.999430604555461730f, 0.033549532813992221f,
-    -0.999437055970991530f,
-  0.033357892543086159f, -0.999443470640077770f, 0.033166251045705968f,
-    -0.999449848562484530f,
-  0.032974608328897315f, -0.999456189737977340f, 0.032782964399706793f,
-    -0.999462494166323160f,
-  0.032591319265180385f, -0.999468761847290050f, 0.032399672932364114f,
-    -0.999474992780647780f,
-  0.032208025408304704f, -0.999481186966166950f, 0.032016376700048046f,
-    -0.999487344403620080f,
-  0.031824726814640963f, -0.999493465092780590f, 0.031633075759129645f,
-    -0.999499549033423640f,
-  0.031441423540560343f, -0.999505596225325310f, 0.031249770165979990f,
-    -0.999511606668263440f,
-  0.031058115642434700f, -0.999517580362016990f, 0.030866459976971503f,
-    -0.999523517306366350f,
-  0.030674803176636581f, -0.999529417501093140f, 0.030483145248477058f,
-    -0.999535280945980540f,
-  0.030291486199539423f, -0.999541107640812940f, 0.030099826036870208f,
-    -0.999546897585375960f,
-  0.029908164767516655f, -0.999552650779456990f, 0.029716502398525156f,
-    -0.999558367222844300f,
-  0.029524838936943035f, -0.999564046915327740f, 0.029333174389816984f,
-    -0.999569689856698580f,
-  0.029141508764193740f, -0.999575296046749220f, 0.028949842067120746f,
-    -0.999580865485273700f,
-  0.028758174305644590f, -0.999586398172067070f, 0.028566505486812797f,
-    -0.999591894106925950f,
-  0.028374835617672258f, -0.999597353289648380f, 0.028183164705269902f,
-    -0.999602775720033530f,
-  0.027991492756653365f, -0.999608161397882110f, 0.027799819778869434f,
-    -0.999613510322995950f,
-  0.027608145778965820f, -0.999618822495178640f, 0.027416470763989606f,
-    -0.999624097914234570f,
-  0.027224794740987910f, -0.999629336579970110f, 0.027033117717008563f,
-    -0.999634538492192300f,
-  0.026841439699098527f, -0.999639703650710200f, 0.026649760694305708f,
-    -0.999644832055333610f,
-  0.026458080709677145f, -0.999649923705874240f, 0.026266399752260809f,
-    -0.999654978602144690f,
-  0.026074717829104040f, -0.999659996743959220f, 0.025883034947254208f,
-    -0.999664978131133310f,
-  0.025691351113759395f, -0.999669922763483760f, 0.025499666335666818f,
-    -0.999674830640828740f,
-  0.025307980620024630f, -0.999679701762987930f, 0.025116293973880335f,
-    -0.999684536129782140f,
-  0.024924606404281485f, -0.999689333741033640f, 0.024732917918276334f,
-    -0.999694094596566000f,
-  0.024541228522912264f, -0.999698818696204250f, 0.024349538225237600f,
-    -0.999703506039774650f,
-  0.024157847032300020f, -0.999708156627104880f, 0.023966154951147241f,
-    -0.999712770458023870f,
-  0.023774461988827676f, -0.999717347532362190f, 0.023582768152388880f,
-    -0.999721887849951310f,
-  0.023391073448879338f, -0.999726391410624470f, 0.023199377885346890f,
-    -0.999730858214216030f,
-  0.023007681468839410f, -0.999735288260561680f, 0.022815984206405477f,
-    -0.999739681549498660f,
-  0.022624286105092803f, -0.999744038080865430f, 0.022432587171950024f,
-    -0.999748357854501780f,
-  0.022240887414024919f, -0.999752640870248840f, 0.022049186838366180f,
-    -0.999756887127949080f,
-  0.021857485452021874f, -0.999761096627446610f, 0.021665783262040089f,
-    -0.999765269368586450f,
-  0.021474080275469605f, -0.999769405351215280f, 0.021282376499358355f,
-    -0.999773504575180990f,
-  0.021090671940755180f, -0.999777567040332940f, 0.020898966606708289f,
-    -0.999781592746521670f,
-  0.020707260504265912f, -0.999785581693599210f, 0.020515553640476986f,
-    -0.999789533881418780f,
-  0.020323846022389572f, -0.999793449309835270f, 0.020132137657052664f,
-    -0.999797327978704690f,
-  0.019940428551514598f, -0.999801169887884260f, 0.019748718712823757f,
-    -0.999804975037232870f,
-  0.019557008148029204f, -0.999808743426610520f, 0.019365296864179146f,
-    -0.999812475055878780f,
-  0.019173584868322699f, -0.999816169924900410f, 0.018981872167508348f,
-    -0.999819828033539420f,
-  0.018790158768784596f, -0.999823449381661570f, 0.018598444679200642f,
-    -0.999827033969133420f,
-  0.018406729905804820f, -0.999830581795823400f, 0.018215014455646376f,
-    -0.999834092861600960f,
-  0.018023298335773701f, -0.999837567166337090f, 0.017831581553236088f,
-    -0.999841004709904000f,
-  0.017639864115082195f, -0.999844405492175240f, 0.017448146028360704f,
-    -0.999847769513025900f,
-  0.017256427300120978f, -0.999851096772332190f, 0.017064707937411529f,
-    -0.999854387269971890f,
-  0.016872987947281773f, -0.999857641005823860f, 0.016681267336780482f,
-    -0.999860857979768540f,
-  0.016489546112956454f, -0.999864038191687680f, 0.016297824282859176f,
-    -0.999867181641464380f,
-  0.016106101853537263f, -0.999870288328982950f, 0.015914378832040249f,
-    -0.999873358254129260f,
-  0.015722655225417017f, -0.999876391416790410f, 0.015530931040716478f,
-    -0.999879387816854930f,
-  0.015339206284988220f, -0.999882347454212560f, 0.015147480965280975f,
-    -0.999885270328754520f,
-  0.014955755088644378f, -0.999888156440373320f, 0.014764028662127416f,
-    -0.999891005788962950f,
-  0.014572301692779104f, -0.999893818374418490f, 0.014380574187649138f,
-    -0.999896594196636680f,
-  0.014188846153786343f, -0.999899333255515390f, 0.013997117598240459f,
-    -0.999902035550953920f,
-  0.013805388528060349f, -0.999904701082852900f, 0.013613658950295789f,
-    -0.999907329851114300f,
-  0.013421928871995907f, -0.999909921855641540f, 0.013230198300209845f,
-    -0.999912477096339240f,
-  0.013038467241987433f, -0.999914995573113470f, 0.012846735704377631f,
-    -0.999917477285871770f,
-  0.012655003694430301f, -0.999919922234522750f, 0.012463271219194662f,
-    -0.999922330418976490f,
-  0.012271538285719944f, -0.999924701839144500f, 0.012079804901056066f,
-    -0.999927036494939640f,
-  0.011888071072252072f, -0.999929334386276070f, 0.011696336806357907f,
-    -0.999931595513069200f,
-  0.011504602110422875f, -0.999933819875236000f, 0.011312866991496287f,
-    -0.999936007472694620f,
-  0.011121131456628141f, -0.999938158305364590f, 0.010929395512867561f,
-    -0.999940272373166960f,
-  0.010737659167264572f, -0.999942349676023910f, 0.010545922426868548f,
-    -0.999944390213859060f,
-  0.010354185298728884f, -0.999946393986597460f, 0.010162447789895645f,
-    -0.999948360994165400f,
-  0.009970709907418029f, -0.999950291236490480f, 0.009778971658346134f,
-    -0.999952184713501780f,
-  0.009587233049729183f, -0.999954041425129780f, 0.009395494088617302f,
-    -0.999955861371306100f,
-  0.009203754782059960f, -0.999957644551963900f, 0.009012015137106642f,
-    -0.999959390967037450f,
-  0.008820275160807512f, -0.999961100616462820f, 0.008628534860211857f,
-    -0.999962773500176930f,
-  0.008436794242369860f, -0.999964409618118280f, 0.008245053314331058f,
-    -0.999966008970226920f,
-  0.008053312083144991f, -0.999967571556443780f, 0.007861570555861883f,
-    -0.999969097376711580f,
-  0.007669828739531077f, -0.999970586430974140f, 0.007478086641202815f,
-    -0.999972038719176730f,
-  0.007286344267926684f, -0.999973454241265940f, 0.007094601626752279f,
-    -0.999974832997189810f,
-  0.006902858724729877f, -0.999976174986897610f, 0.006711115568908869f,
-    -0.999977480210339940f,
-  0.006519372166339549f, -0.999978748667468830f, 0.006327628524071549f,
-    -0.999979980358237650f,
-  0.006135884649154515f, -0.999981175282601110f, 0.005944140548638765f,
-    -0.999982333440515350f,
-  0.005752396229573737f, -0.999983454831937730f, 0.005560651699009764f,
-    -0.999984539456826970f,
-  0.005368906963996303f, -0.999985587315143200f, 0.005177162031583702f,
-    -0.999986598406848000f,
-  0.004985416908821652f, -0.999987572731904080f, 0.004793671602759852f,
-    -0.999988510290275690f,
-  0.004601926120448672f, -0.999989411081928400f, 0.004410180468937601f,
-    -0.999990275106828920f,
-  0.004218434655277024f, -0.999991102364945590f, 0.004026688686516664f,
-    -0.999991892856248010f,
-  0.003834942569706248f, -0.999992646580707190f, 0.003643196311896179f,
-    -0.999993363538295150f,
-  0.003451449920135975f, -0.999994043728985820f, 0.003259703401476044f,
-    -0.999994687152754080f,
-  0.003067956762966138f, -0.999995293809576190f, 0.002876210011656010f,
-    -0.999995863699429940f,
-  0.002684463154596083f, -0.999996396822294350f, 0.002492716198835898f,
-    -0.999996893178149880f,
-  0.002300969151425887f, -0.999997352766978210f, 0.002109222019415816f,
-    -0.999997775588762350f,
-  0.001917474809855460f, -0.999998161643486980f, 0.001725727529795258f,
-    -0.999998510931137790f,
-  0.001533980186284766f, -0.999998823451701880f, 0.001342232786374430f,
-    -0.999999099205167830f,
-  0.001150485337113809f, -0.999999338191525530f, 0.000958737845553352f,
-    -0.999999540410766110f,
-  0.000766990318742846f, -0.999999705862882230f, 0.000575242763732077f,
-    -0.999999834547867670f,
-  0.000383495187571497f, -0.999999926465717890f, 0.000191747597310674f,
-    -0.999999981616429330f
-};
-
-    const float32_t cos_factors_8192[8192] = {
-  1.999999990808214700f, 1.999999917273932200f, 1.999999770205369800f,
-    1.999999549602533100f,
-  1.999999255465430200f, 1.999998887794072000f, 1.999998446588471700f,
-    1.999997931848645600f,
-  1.999997343574612800f, 1.999996681766395000f, 1.999995946424016200f,
-    1.999995137547503600f,
-  1.999994255136887000f, 1.999993299192198700f, 1.999992269713474200f,
-    1.999991166700750800f,
-  1.999989990154069600f, 1.999988740073473500f, 1.999987416459008600f,
-    1.999986019310723500f,
-  1.999984548628669600f, 1.999983004412901000f, 1.999981386663474400f,
-    1.999979695380449400f,
-  1.999977930563888100f, 1.999976092213855400f, 1.999974180330418700f,
-    1.999972194913648900f,
-  1.999970135963618400f, 1.999968003480403000f, 1.999965797464081200f,
-    1.999963517914734100f,
-  1.999961164832445800f, 1.999958738217302300f, 1.999956238069392900f,
-    1.999953664388809800f,
-  1.999951017175647600f, 1.999948296430003500f, 1.999945502151977600f,
-    1.999942634341672600f,
-  1.999939692999193900f, 1.999936678124649700f, 1.999933589718150700f,
-    1.999930427779810900f,
-  1.999927192309745900f, 1.999923883308075200f, 1.999920500774920300f,
-    1.999917044710405500f,
-  1.999913515114657900f, 1.999909911987807200f, 1.999906235329986100f,
-    1.999902485141329400f,
-  1.999898661421975400f, 1.999894764172064600f, 1.999890793391740000f,
-    1.999886749081147800f,
-  1.999882631240436700f, 1.999878439869758200f, 1.999874174969266300f,
-    1.999869836539117700f,
-  1.999865424579472000f, 1.999860939090491600f, 1.999856380072341000f,
-    1.999851747525188200f,
-  1.999847041449203300f, 1.999842261844559700f, 1.999837408711432600f,
-    1.999832482050000900f,
-  1.999827481860445300f, 1.999822408142949900f, 1.999817260897701400f,
-    1.999812040124888700f,
-  1.999806745824704000f, 1.999801377997341800f, 1.999795936642999600f,
-    1.999790421761877400f,
-  1.999784833354177900f, 1.999779171420106700f, 1.999773435959872000f,
-    1.999767626973684400f,
-  1.999761744461757700f, 1.999755788424308200f, 1.999749758861554900f,
-    1.999743655773719400f,
-  1.999737479161026100f, 1.999731229023702200f, 1.999724905361977200f,
-    1.999718508176084000f,
-  1.999712037466257600f, 1.999705493232735800f, 1.999698875475759600f,
-    1.999692184195571900f,
-  1.999685419392419000f, 1.999678581066549400f, 1.999671669218214600f,
-    1.999664683847668800f,
-  1.999657624955168700f, 1.999650492540973900f, 1.999643286605346800f,
-    1.999636007148552400f,
-  1.999628654170857900f, 1.999621227672533800f, 1.999613727653853500f,
-    1.999606154115092500f,
-  1.999598507056529000f, 1.999590786478444600f, 1.999582992381123000f,
-    1.999575124764850800f,
-  1.999567183629917100f, 1.999559168976613900f, 1.999551080805236100f,
-    1.999542919116081000f,
-  1.999534683909448600f, 1.999526375185641800f, 1.999517992944965800f,
-    1.999509537187729200f,
-  1.999501007914242600f, 1.999492405124819700f, 1.999483728819776900f,
-    1.999474978999432800f,
-  1.999466155664109600f, 1.999457258814131500f, 1.999448288449825500f,
-    1.999439244571521700f,
-  1.999430127179552500f, 1.999420936274252800f, 1.999411671855960900f,
-    1.999402333925017300f,
-  1.999392922481765500f, 1.999383437526551300f, 1.999373879059723500f,
-    1.999364247081633500f,
-  1.999354541592635500f, 1.999344762593086500f, 1.999334910083345700f,
-    1.999324984063775700f,
-  1.999314984534741100f, 1.999304911496609700f, 1.999294764949752100f,
-    1.999284544894541100f,
-  1.999274251331352400f, 1.999263884260564600f, 1.999253443682558900f,
-    1.999242929597719200f,
-  1.999232342006432000f, 1.999221680909086400f, 1.999210946306074500f,
-    1.999200138197791100f,
-  1.999189256584633600f, 1.999178301467001900f, 1.999167272845298900f,
-    1.999156170719930100f,
-  1.999144995091303600f, 1.999133745959830600f, 1.999122423325924200f,
-    1.999111027190001000f,
-  1.999099557552479900f, 1.999088014413782800f, 1.999076397774334000f,
-    1.999064707634560700f,
-  1.999052943994892300f, 1.999041106855761900f, 1.999029196217604100f,
-    1.999017212080857400f,
-  1.999005154445962200f, 1.998993023313361700f, 1.998980818683502100f,
-    1.998968540556831800f,
-  1.998956188933802800f, 1.998943763814868800f, 1.998931265200486900f,
-    1.998918693091116200f,
-  1.998906047487219600f, 1.998893328389261400f, 1.998880535797709700f,
-    1.998867669713034500f,
-  1.998854730135709400f, 1.998841717066209400f, 1.998828630505013400f,
-    1.998815470452602400f,
-  1.998802236909460500f, 1.998788929876074100f, 1.998775549352932400f,
-    1.998762095340527400f,
-  1.998748567839354000f, 1.998734966849909000f, 1.998721292372693100f,
-    1.998707544408208700f,
-  1.998693722956961500f, 1.998679828019459300f, 1.998665859596213500f,
-    1.998651817687737300f,
-  1.998637702294547000f, 1.998623513417161700f, 1.998609251056103100f,
-    1.998594915211895600f,
-  1.998580505885066100f, 1.998566023076144600f, 1.998551466785663400f,
-    1.998536837014157900f,
-  1.998522133762165900f, 1.998507357030227900f, 1.998492506818887200f,
-    1.998477583128690100f,
-  1.998462585960185000f, 1.998447515313923400f, 1.998432371190459500f,
-    1.998417153590349900f,
-  1.998401862514154200f, 1.998386497962434800f, 1.998371059935756300f,
-    1.998355548434686400f,
-  1.998339963459795400f, 1.998324305011656600f, 1.998308573090845200f,
-    1.998292767697940100f,
-  1.998276888833522300f, 1.998260936498175400f, 1.998244910692486000f,
-    1.998228811417043700f,
-  1.998212638672439900f, 1.998196392459269400f, 1.998180072778129600f,
-    1.998163679629620500f,
-  1.998147213014344900f, 1.998130672932908000f, 1.998114059385918400f,
-    1.998097372373986300f,
-  1.998080611897725700f, 1.998063777957752600f, 1.998046870554686100f,
-    1.998029889689147700f,
-  1.998012835361761900f, 1.997995707573155600f, 1.997978506323958600f,
-    1.997961231614803200f,
-  1.997943883446324800f, 1.997926461819161000f, 1.997908966733952500f,
-    1.997891398191342400f,
-  1.997873756191977000f, 1.997856040736504500f, 1.997838251825576400f,
-    1.997820389459846700f,
-  1.997802453639972300f, 1.997784444366612600f, 1.997766361640429800f,
-    1.997748205462088500f,
-  1.997729975832256600f, 1.997711672751604200f, 1.997693296220804000f,
-    1.997674846240532000f,
-  1.997656322811466500f, 1.997637725934288300f, 1.997619055609681600f,
-    1.997600311838332500f,
-  1.997581494620930300f, 1.997562603958166600f, 1.997543639850736200f,
-    1.997524602299336500f,
-  1.997505491304667000f, 1.997486306867430900f, 1.997467048988333000f,
-    1.997447717668082000f,
-  1.997428312907388200f, 1.997408834706965000f, 1.997389283067528800f,
-    1.997369657989798400f,
-  1.997349959474495200f, 1.997330187522343700f, 1.997310342134070800f,
-    1.997290423310406100f,
-  1.997270431052081900f, 1.997250365359833200f, 1.997230226234397900f,
-    1.997210013676516700f,
-  1.997189727686932400f, 1.997169368266390900f, 1.997148935415640600f,
-    1.997128429135433400f,
-  1.997107849426522600f, 1.997087196289665000f, 1.997066469725620200f,
-    1.997045669735150000f,
-  1.997024796319019300f, 1.997003849477995600f, 1.996982829212848900f,
-    1.996961735524351900f,
-  1.996940568413280600f, 1.996919327880412900f, 1.996898013926530000f,
-    1.996876626552415400f,
-  1.996855165758855600f, 1.996833631546639300f, 1.996812023916558800f,
-    1.996790342869408000f,
-  1.996768588405984300f, 1.996746760527087700f, 1.996724859233520500f,
-    1.996702884526087900f,
-  1.996680836405598100f, 1.996658714872861800f, 1.996636519928692000f,
-    1.996614251573904900f,
-  1.996591909809319400f, 1.996569494635756600f, 1.996547006054041100f,
-    1.996524444064999400f,
-  1.996501808669461000f, 1.996479099868258400f, 1.996456317662226300f,
-    1.996433462052202600f,
-  1.996410533039027400f, 1.996387530623543900f, 1.996364454806597500f,
-    1.996341305589037100f,
-  1.996318082971713500f, 1.996294786955480800f, 1.996271417541195300f,
-    1.996247974729716200f,
-  1.996224458521905600f, 1.996200868918628100f, 1.996177205920750800f,
-    1.996153469529144100f,
-  1.996129659744680300f, 1.996105776568235100f, 1.996081820000686500f,
-    1.996057790042915500f,
-  1.996033686695805300f, 1.996009509960242400f, 1.995985259837115500f,
-    1.995960936327316300f,
-  1.995936539431739000f, 1.995912069151280800f, 1.995887525486841300f,
-    1.995862908439323100f,
-  1.995838218009630800f, 1.995813454198672700f, 1.995788617007359100f,
-    1.995763706436603200f,
-  1.995738722487320600f, 1.995713665160430600f, 1.995688534456853800f,
-    1.995663330377514400f,
-  1.995638052923339300f, 1.995612702095257400f, 1.995587277894201400f,
-    1.995561780321105600f,
-  1.995536209376907600f, 1.995510565062547800f, 1.995484847378968600f,
-    1.995459056327116000f,
-  1.995433191907938000f, 1.995407254122385700f, 1.995381242971412600f,
-    1.995355158455975200f,
-  1.995329000577032800f, 1.995302769335546500f, 1.995276464732481200f,
-    1.995250086768804100f,
-  1.995223635445484900f, 1.995197110763496000f, 1.995170512723813100f,
-    1.995143841327413400f,
-  1.995117096575278200f, 1.995090278468390600f, 1.995063387007736600f,
-    1.995036422194304700f,
-  1.995009384029086800f, 1.994982272513076600f, 1.994955087647271000f,
-    1.994927829432669800f,
-  1.994900497870274900f, 1.994873092961091200f, 1.994845614706126400f,
-    1.994818063106391000f,
-  1.994790438162897600f, 1.994762739876662100f, 1.994734968248702800f,
-    1.994707123280041100f,
-  1.994679204971700100f, 1.994651213324707000f, 1.994623148340090700f,
-    1.994595010018883000f,
-  1.994566798362118300f, 1.994538513370834200f, 1.994510155046070700f,
-    1.994481723388870100f,
-  1.994453218400277900f, 1.994424640081342100f, 1.994395988433113700f,
-    1.994367263456646100f,
-  1.994338465152995000f, 1.994309593523219600f, 1.994280648568381500f,
-    1.994251630289544600f,
-  1.994222538687776100f, 1.994193373764145500f, 1.994164135519725000f,
-    1.994134823955589800f,
-  1.994105439072817700f, 1.994075980872488800f, 1.994046449355686200f,
-    1.994016844523496000f,
-  1.993987166377006600f, 1.993957414917308700f, 1.993927590145496900f,
-    1.993897692062667200f,
-  1.993867720669919400f, 1.993837675968354700f, 1.993807557959078600f,
-    1.993777366643197900f,
-  1.993747102021822900f, 1.993716764096066200f, 1.993686352867043200f,
-    1.993655868335872300f,
-  1.993625310503674100f, 1.993594679371572200f, 1.993563974940692800f,
-    1.993533197212164800f,
-  1.993502346187119700f, 1.993471421866692200f, 1.993440424252018900f,
-    1.993409353344239600f,
-  1.993378209144496700f, 1.993346991653935300f, 1.993315700873703200f,
-    1.993284336804950900f,
-  1.993252899448831400f, 1.993221388806500900f, 1.993189804879117500f,
-    1.993158147667842800f,
-  1.993126417173840500f, 1.993094613398277400f, 1.993062736342323000f,
-    1.993030786007148800f,
-  1.992998762393930000f, 1.992966665503844000f, 1.992934495338070800f,
-    1.992902251897793000f,
-  1.992869935184196300f, 1.992837545198469000f, 1.992805081941801700f,
-    1.992772545415388200f,
-  1.992739935620424700f, 1.992707252558110200f, 1.992674496229646500f,
-    1.992641666636237700f,
-  1.992608763779091000f, 1.992575787659416100f, 1.992542738278425300f,
-    1.992509615637334100f,
-  1.992476419737359900f, 1.992443150579723500f, 1.992409808165648100f,
-    1.992376392496359300f,
-  1.992342903573086000f, 1.992309341397059600f, 1.992275705969513800f,
-    1.992241997291685400f,
-  1.992208215364813700f, 1.992174360190140900f, 1.992140431768911500f,
-    1.992106430102373400f,
-  1.992072355191776300f, 1.992038207038373300f, 1.992003985643419700f,
-    1.991969691008174100f,
-  1.991935323133897000f, 1.991900882021852200f, 1.991866367673306200f,
-    1.991831780089527500f,
-  1.991797119271788300f, 1.991762385221362600f, 1.991727577939527600f,
-    1.991692697427563300f,
-  1.991657743686751700f, 1.991622716718378400f, 1.991587616523731000f,
-    1.991552443104099800f,
-  1.991517196460778500f, 1.991481876595062800f, 1.991446483508251500f,
-    1.991411017201645500f,
-  1.991375477676549100f, 1.991339864934268800f, 1.991304178976114100f,
-    1.991268419803397200f,
-  1.991232587417432600f, 1.991196681819537900f, 1.991160703011033200f,
-    1.991124650993241400f,
-  1.991088525767488200f, 1.991052327335101300f, 1.991016055697411900f,
-    1.990979710855753900f,
-  1.990943292811463000f, 1.990906801565878600f, 1.990870237120342400f,
-    1.990833599476198800f,
-  1.990796888634794400f, 1.990760104597479400f, 1.990723247365606200f,
-    1.990686316940529800f,
-  1.990649313323608100f, 1.990612236516201300f, 1.990575086519673200f,
-    1.990537863335389400f,
-  1.990500566964718400f, 1.990463197409031700f, 1.990425754669703100f,
-    1.990388238748109100f,
-  1.990350649645629600f, 1.990312987363646000f, 1.990275251903543600f,
-    1.990237443266709400f,
-  1.990199561454533600f, 1.990161606468409300f, 1.990123578309731700f,
-    1.990085476979899000f,
-  1.990047302480312300f, 1.990009054812374800f, 1.989970733977493000f,
-    1.989932339977075900f,
-  1.989893872812535000f, 1.989855332485284800f, 1.989816718996742200f,
-    1.989778032348326700f,
-  1.989739272541461100f, 1.989700439577570400f, 1.989661533458082100f,
-    1.989622554184426800f,
-  1.989583501758037700f, 1.989544376180350600f, 1.989505177452804100f,
-    1.989465905576839600f,
-  1.989426560553900500f, 1.989387142385433900f, 1.989347651072888900f,
-    1.989308086617717500f,
-  1.989268449021374300f, 1.989228738285316900f, 1.989188954411005100f,
-    1.989149097399901500f,
-  1.989109167253472000f, 1.989069163973184300f, 1.989029087560509700f,
-    1.988988938016921000f,
-  1.988948715343894900f, 1.988908419542910100f, 1.988868050615448100f,
-    1.988827608562993200f,
-  1.988787093387032600f, 1.988746505089055600f, 1.988705843670554500f,
-    1.988665109133024500f,
-  1.988624301477963200f, 1.988583420706871100f, 1.988542466821251000f,
-    1.988501439822608900f,
-  1.988460339712453200f, 1.988419166492295000f, 1.988377920163648000f,
-    1.988336600728029000f,
-  1.988295208186956700f, 1.988253742541953800f, 1.988212203794544000f,
-    1.988170591946255100f,
-  1.988128906998616800f, 1.988087148953161700f, 1.988045317811425700f,
-    1.988003413574946000f,
-  1.987961436245263800f, 1.987919385823922400f, 1.987877262312467600f,
-    1.987835065712448600f,
-  1.987792796025416500f, 1.987750453252925500f, 1.987708037396532800f,
-    1.987665548457797400f,
-  1.987622986438281700f, 1.987580351339550700f, 1.987537643163171700f,
-    1.987494861910715100f,
-  1.987452007583754100f, 1.987409080183863800f, 1.987366079712622900f,
-    1.987323006171612500f,
-  1.987279859562415900f, 1.987236639886619700f, 1.987193347145813000f,
-    1.987149981341587400f,
-  1.987106542475537400f, 1.987063030549260300f, 1.987019445564355700f,
-    1.986975787522426100f,
-  1.986932056425076800f, 1.986888252273915500f, 1.986844375070552900f,
-    1.986800424816602200f,
-  1.986756401513679400f, 1.986712305163403000f, 1.986668135767394300f,
-    1.986623893327277500f,
-  1.986579577844678900f, 1.986535189321228000f, 1.986490727758556800f,
-    1.986446193158300400f,
-  1.986401585522095600f, 1.986356904851583000f, 1.986312151148405200f,
-    1.986267324414207500f,
-  1.986222424650638400f, 1.986177451859348200f, 1.986132406041990900f,
-    1.986087287200222700f,
-  1.986042095335702300f, 1.985996830450091200f, 1.985951492545054100f,
-    1.985906081622257300f,
-  1.985860597683371000f, 1.985815040730067200f, 1.985769410764020900f,
-    1.985723707786909900f,
-  1.985677931800414500f, 1.985632082806217900f, 1.985586160806005700f,
-    1.985540165801466200f,
-  1.985494097794290800f, 1.985447956786173100f, 1.985401742778809500f,
-    1.985355455773899500f,
-  1.985309095773144500f, 1.985262662778249300f, 1.985216156790921000f,
-    1.985169577812869500f,
-  1.985122925845807400f, 1.985076200891450000f, 1.985029402951515200f,
-    1.984982532027723700f,
-  1.984935588121798700f, 1.984888571235466200f, 1.984841481370454900f,
-    1.984794318528496200f,
-  1.984747082711324100f, 1.984699773920675300f, 1.984652392158289500f,
-    1.984604937425908300f,
-  1.984557409725276700f, 1.984509809058142300f, 1.984462135426255000f,
-    1.984414388831367900f,
-  1.984366569275236400f, 1.984318676759618400f, 1.984270711286275200f,
-    1.984222672856969800f,
-  1.984174561473469200f, 1.984126377137541700f, 1.984078119850959200f,
-    1.984029789615495900f,
-  1.983981386432928800f, 1.983932910305037400f, 1.983884361233604100f,
-    1.983835739220414000f,
-  1.983787044267254700f, 1.983738276375916800f, 1.983689435548192900f,
-    1.983640521785879200f,
-  1.983591535090773800f, 1.983542475464678000f, 1.983493342909395500f,
-    1.983444137426732600f,
-  1.983394859018498900f, 1.983345507686505900f, 1.983296083432567900f,
-    1.983246586258502700f,
-  1.983197016166129400f, 1.983147373157271300f, 1.983097657233753100f,
-    1.983047868397403100f,
-  1.982998006650051400f, 1.982948071993531700f, 1.982898064429679900f,
-    1.982847983960334600f,
-  1.982797830587336800f, 1.982747604312531200f, 1.982697305137763700f,
-    1.982646933064884200f,
-  1.982596488095744300f, 1.982545970232199000f, 1.982495379476105800f,
-    1.982444715829324600f,
-  1.982393979293718200f, 1.982343169871152000f, 1.982292287563494300f,
-    1.982241332372615600f,
-  1.982190304300389400f, 1.982139203348692200f, 1.982088029519402300f,
-    1.982036782814401900f,
-  1.981985463235574700f, 1.981934070784807400f, 1.981882605463990200f,
-    1.981831067275015000f,
-  1.981779456219776600f, 1.981727772300172500f, 1.981676015518103500f,
-    1.981624185875472000f,
-  1.981572283374183800f, 1.981520308016147200f, 1.981468259803273300f,
-    1.981416138737475800f,
-  1.981363944820670800f, 1.981311678054777500f, 1.981259338441717400f,
-    1.981206925983415300f,
-  1.981154440681797800f, 1.981101882538794900f, 1.981049251556338900f,
-    1.980996547736364900f,
-  1.980943771080810700f, 1.980890921591616600f, 1.980837999270726100f,
-    1.980785004120084700f,
-  1.980731936141640900f, 1.980678795337345900f, 1.980625581709153600f,
-    1.980572295259020600f,
-  1.980518935988905700f, 1.980465503900771000f, 1.980411998996581200f,
-    1.980358421278303200f,
-  1.980304770747907300f, 1.980251047407365600f, 1.980197251258653900f,
-    1.980143382303749500f,
-  1.980089440544633600f, 1.980035425983289300f, 1.979981338621702200f,
-    1.979927178461861500f,
-  1.979872945505758000f, 1.979818639755386100f, 1.979764261212742400f,
-    1.979709809879825800f,
-  1.979655285758638900f, 1.979600688851186100f, 1.979546019159474900f,
-    1.979491276685515300f,
-  1.979436461431320000f, 1.979381573398904400f, 1.979326612590286400f,
-    1.979271579007487100f,
-  1.979216472652529900f, 1.979161293527440500f, 1.979106041634248100f,
-    1.979050716974983800f,
-  1.978995319551682100f, 1.978939849366379700f, 1.978884306421115900f,
-    1.978828690717932900f,
-  1.978773002258875600f, 1.978717241045991700f, 1.978661407081331100f,
-    1.978605500366946700f,
-  1.978549520904894000f, 1.978493468697231300f, 1.978437343746019600f,
-    1.978381146053322000f,
-  1.978324875621205300f, 1.978268532451738200f, 1.978212116546992100f,
-    1.978155627909041300f,
-  1.978099066539962900f, 1.978042432441836400f, 1.977985725616743900f,
-    1.977928946066770600f,
-  1.977872093794004200f, 1.977815168800534500f, 1.977758171088455100f,
-    1.977701100659861300f,
-  1.977643957516851400f, 1.977586741661526500f, 1.977529453095990200f,
-    1.977472091822348700f,
-  1.977414657842711200f, 1.977357151159189400f, 1.977299571773897700f,
-    1.977241919688953000f,
-  1.977184194906475000f, 1.977126397428586000f, 1.977068527257411300f,
-    1.977010584395078300f,
-  1.976952568843717700f, 1.976894480605462500f, 1.976836319682448300f,
-    1.976778086076813600f,
-  1.976719779790699500f, 1.976661400826249500f, 1.976602949185610500f,
-    1.976544424870931400f,
-  1.976485827884363800f, 1.976427158228062100f, 1.976368415904183900f,
-    1.976309600914888400f,
-  1.976250713262338600f, 1.976191752948699200f, 1.976132719976138000f,
-    1.976073614346825800f,
-  1.976014436062935700f, 1.975955185126643300f, 1.975895861540127200f,
-    1.975836465305568400f,
-  1.975776996425151000f, 1.975717454901061400f, 1.975657840735488800f,
-    1.975598153930624900f,
-  1.975538394488664200f, 1.975478562411804100f, 1.975418657702244300f,
-    1.975358680362187400f,
-  1.975298630393838500f, 1.975238507799405500f, 1.975178312581099100f,
-    1.975118044741132300f,
-  1.975057704281721000f, 1.974997291205083700f, 1.974936805513442000f,
-    1.974876247209019100f,
-  1.974815616294042200f, 1.974754912770740200f, 1.974694136641345300f,
-    1.974633287908091500f,
-  1.974572366573216400f, 1.974511372638960000f, 1.974450306107564900f,
-    1.974389166981275900f,
-  1.974327955262341400f, 1.974266670953011400f, 1.974205314055540000f,
-    1.974143884572182400f,
-  1.974082382505197400f, 1.974020807856846400f, 1.973959160629393100f,
-    1.973897440825104200f,
-  1.973835648446248900f, 1.973773783495099500f, 1.973711845973930000f,
-    1.973649835885018100f,
-  1.973587753230643400f, 1.973525598013088800f, 1.973463370234639600f,
-    1.973401069897583200f,
-  1.973338697004211100f, 1.973276251556815600f, 1.973213733557693400f,
-    1.973151143009142800f,
-  1.973088479913465100f, 1.973025744272964200f, 1.972962936089946800f,
-    1.972900055366722000f,
-  1.972837102105601900f, 1.972774076308901200f, 1.972710977978936900f,
-    1.972647807118029300f,
-  1.972584563728500700f, 1.972521247812676600f, 1.972457859372884500f,
-    1.972394398411455800f,
-  1.972330864930723200f, 1.972267258933022600f, 1.972203580420693000f,
-    1.972139829396075200f,
-  1.972076005861513700f, 1.972012109819354600f, 1.971948141271947500f,
-    1.971884100221644300f,
-  1.971819986670799500f, 1.971755800621770400f, 1.971691542076916800f,
-    1.971627211038601500f,
-  1.971562807509189800f, 1.971498331491049700f, 1.971433782986551400f,
-    1.971369161998068400f,
-  1.971304468527976800f, 1.971239702578655000f, 1.971174864152484400f,
-    1.971109953251848600f,
-  1.971044969879134600f, 1.970979914036731500f, 1.970914785727030800f,
-    1.970849584952427900f,
-  1.970784311715319400f, 1.970718966018105500f, 1.970653547863188600f,
-    1.970588057252973900f,
-  1.970522494189869800f, 1.970456858676286300f, 1.970391150714636800f,
-    1.970325370307337100f,
-  1.970259517456806100f, 1.970193592165464700f, 1.970127594435737000f,
-    1.970061524270049400f,
-  1.969995381670831100f, 1.969929166640514100f, 1.969862879181532700f,
-    1.969796519296324300f,
-  1.969730086987328900f, 1.969663582256988600f, 1.969597005107748900f,
-    1.969530355542057800f,
-  1.969463633562365400f, 1.969396839171125200f, 1.969329972370792700f,
-    1.969263033163826800f,
-  1.969196021552688500f, 1.969128937539841500f, 1.969061781127752400f,
-    1.968994552318890300f,
-  1.968927251115727200f, 1.968859877520737300f, 1.968792431536398000f,
-    1.968724913165188900f,
-  1.968657322409592500f, 1.968589659272094000f, 1.968521923755181000f,
-    1.968454115861344000f,
-  1.968386235593076300f, 1.968318282952873600f, 1.968250257943234200f,
-    1.968182160566659000f,
-  1.968113990825652200f, 1.968045748722719900f, 1.967977434260371300f,
-    1.967909047441118100f,
-  1.967840588267474500f, 1.967772056741957900f, 1.967703452867087800f,
-    1.967634776645386600f,
-  1.967566028079379200f, 1.967497207171593500f, 1.967428313924559600f,
-    1.967359348340810700f,
-  1.967290310422882700f, 1.967221200173313400f, 1.967152017594644200f,
-    1.967082762689418500f,
-  1.967013435460182700f, 1.966944035909485600f, 1.966874564039879300f,
-    1.966805019853917500f,
-  1.966735403354157500f, 1.966665714543159000f, 1.966595953423483800f,
-    1.966526119997697100f,
-  1.966456214268366600f, 1.966386236238062200f, 1.966316185909357200f,
-    1.966246063284826700f,
-  1.966175868367049400f, 1.966105601158605600f, 1.966035261662079300f,
-    1.965964849880056600f,
-  1.965894365815126000f, 1.965823809469879400f, 1.965753180846910900f,
-    1.965682479948817100f,
-  1.965611706778197700f, 1.965540861337654600f, 1.965469943629792700f,
-    1.965398953657219600f,
-  1.965327891422544900f, 1.965256756928382100f, 1.965185550177345900f,
-    1.965114271172054800f,
-  1.965042919915129400f, 1.964971496409193100f, 1.964900000656872000f,
-    1.964828432660794500f,
-  1.964756792423592200f, 1.964685079947899200f, 1.964613295236352000f,
-    1.964541438291590000f,
-  1.964469509116255000f, 1.964397507712991800f, 1.964325434084447600f,
-    1.964253288233272400f,
-  1.964181070162119000f, 1.964108779873642100f, 1.964036417370500300f,
-    1.963963982655353400f,
-  1.963891475730865400f, 1.963818896599701400f, 1.963746245264530700f,
-    1.963673521728023900f,
-  1.963600725992855200f, 1.963527858061700600f, 1.963454917937239800f,
-    1.963381905622154400f,
-  1.963308821119128700f, 1.963235664430850200f, 1.963162435560008100f,
-    1.963089134509295300f,
-  1.963015761281406800f, 1.962942315879040000f, 1.962868798304895400f,
-    1.962795208561676200f,
-  1.962721546652088200f, 1.962647812578839400f, 1.962574006344640900f,
-    1.962500127952206300f,
-  1.962426177404252200f, 1.962352154703497200f, 1.962278059852663000f,
-    1.962203892854473800f,
-  1.962129653711656800f, 1.962055342426941400f, 1.961980959003059500f,
-    1.961906503442746300f,
-  1.961831975748739200f, 1.961757375923778700f, 1.961682703970607100f,
-    1.961607959891970200f,
-  1.961533143690616000f, 1.961458255369295400f, 1.961383294930761700f,
-    1.961308262377770900f,
-  1.961233157713082200f, 1.961157980939456400f, 1.961082732059657800f,
-    1.961007411076453000f,
-  1.960932017992611500f, 1.960856552810905200f, 1.960781015534108800f,
-    1.960705406164999300f,
-  1.960629724706357100f, 1.960553971160964500f, 1.960478145531606700f,
-    1.960402247821071900f,
-  1.960326278032150200f, 1.960250236167635100f, 1.960174122230322400f,
-    1.960097936223010400f,
-  1.960021678148500500f, 1.959945348009596500f, 1.959868945809104500f,
-    1.959792471549834000f,
-  1.959715925234596600f, 1.959639306866206600f, 1.959562616447480900f,
-    1.959485853981239600f,
-  1.959409019470304700f, 1.959332112917501400f, 1.959255134325657000f,
-    1.959178083697602300f,
-  1.959100961036169800f, 1.959023766344195200f, 1.958946499624516700f,
-    1.958869160879975500f,
-  1.958791750113414700f, 1.958714267327680500f, 1.958636712525621900f,
-    1.958559085710090500f,
-  1.958481386883940100f, 1.958403616050027600f, 1.958325773211212300f,
-    1.958247858370356400f,
-  1.958169871530324600f, 1.958091812693984400f, 1.958013681864205500f,
-    1.957935479043860600f,
-  1.957857204235825100f, 1.957778857442976900f, 1.957700438668196700f,
-    1.957621947914367500f,
-  1.957543385184375300f, 1.957464750481108700f, 1.957386043807458800f,
-    1.957307265166319500f,
-  1.957228414560587200f, 1.957149491993160900f, 1.957070497466942400f,
-    1.956991430984836400f,
-  1.956912292549749500f, 1.956833082164591600f, 1.956753799832275300f,
-    1.956674445555715000f,
-  1.956595019337829000f, 1.956515521181537000f, 1.956435951089762200f,
-    1.956356309065430100f,
-  1.956276595111468900f, 1.956196809230809500f, 1.956116951426385600f,
-    1.956037021701132900f,
-  1.955957020057990500f, 1.955876946499899700f, 1.955796801029804800f,
-    1.955716583650652000f,
-  1.955636294365391300f, 1.955555933176974300f, 1.955475500088355900f,
-    1.955394995102493100f,
-  1.955314418222346100f, 1.955233769450877200f, 1.955153048791052000f,
-    1.955072256245838000f,
-  1.954991391818206000f, 1.954910455511129000f, 1.954829447327582900f,
-    1.954748367270545900f,
-  1.954667215342999600f, 1.954585991547927100f, 1.954504695888315000f,
-    1.954423328367152600f,
-  1.954341888987431100f, 1.954260377752145000f, 1.954178794664291200f,
-    1.954097139726869600f,
-  1.954015412942881900f, 1.953933614315333200f, 1.953851743847231100f,
-    1.953769801541585400f,
-  1.953687787401409400f, 1.953605701429718100f, 1.953523543629529700f,
-    1.953441314003864900f,
-  1.953359012555747200f, 1.953276639288202400f, 1.953194194204259200f,
-    1.953111677306948800f,
-  1.953029088599305100f, 1.952946428084364900f, 1.952863695765167100f,
-    1.952780891644753500f,
-  1.952698015726169100f, 1.952615068012460300f, 1.952532048506677300f,
-    1.952448957211872200f,
-  1.952365794131100300f, 1.952282559267419100f, 1.952199252623889200f,
-    1.952115874203572900f,
-  1.952032424009536600f, 1.951948902044847900f, 1.951865308312577900f,
-    1.951781642815800100f,
-  1.951697905557590700f, 1.951614096541028500f, 1.951530215769194700f,
-    1.951446263245173500f,
-  1.951362238972051500f, 1.951278142952918200f, 1.951193975190865600f,
-    1.951109735688987900f,
-  1.951025424450382900f, 1.950941041478150100f, 1.950856586775392200f,
-    1.950772060345214300f,
-  1.950687462190724200f, 1.950602792315032200f, 1.950518050721251600f,
-    1.950433237412498000f,
-  1.950348352391889600f, 1.950263395662547700f, 1.950178367227595900f,
-    1.950093267090159800f,
-  1.950008095253369200f, 1.949922851720355100f, 1.949837536494251700f,
-    1.949752149578196000f,
-  1.949666690975327100f, 1.949581160688787400f, 1.949495558721721500f,
-    1.949409885077276500f,
-  1.949324139758602700f, 1.949238322768852800f, 1.949152434111181700f,
-    1.949066473788747300f,
-  1.948980441804710300f, 1.948894338162233900f, 1.948808162864483600f,
-    1.948721915914628100f,
-  1.948635597315838200f, 1.948549207071288000f, 1.948462745184153400f,
-    1.948376211657613500f,
-  1.948289606494849800f, 1.948202929699046800f, 1.948116181273391100f,
-    1.948029361221072400f,
-  1.947942469545282500f, 1.947855506249216700f, 1.947768471336071700f,
-    1.947681364809048100f,
-  1.947594186671348000f, 1.947506936926177300f, 1.947419615576743600f,
-    1.947332222626257500f,
-  1.947244758077932200f, 1.947157221934983500f, 1.947069614200629900f,
-    1.946981934878092300f,
-  1.946894183970594900f, 1.946806361481363500f, 1.946718467413627300f,
-    1.946630501770618000f,
-  1.946542464555569800f, 1.946454355771719300f, 1.946366175422306500f,
-    1.946277923510573200f,
-  1.946189600039764300f, 1.946101205013127000f, 1.946012738433911600f,
-    1.945924200305370700f,
-  1.945835590630759400f, 1.945746909413335900f, 1.945658156656360700f,
-    1.945569332363096700f,
-  1.945480436536810100f, 1.945391469180769200f, 1.945302430298244900f,
-    1.945213319892511200f,
-  1.945124137966844200f, 1.945034884524523100f, 1.944945559568829200f,
-    1.944856163103046800f,
-  1.944766695130463000f, 1.944677155654366900f, 1.944587544678050900f,
-    1.944497862204809900f,
-  1.944408108237940700f, 1.944318282780743900f, 1.944228385836521700f,
-    1.944138417408579400f,
-  1.944048377500225100f, 1.943958266114769200f, 1.943868083255524800f,
-    1.943777828925807600f,
-  1.943687503128936200f, 1.943597105868231500f, 1.943506637147017300f,
-    1.943416096968619400f,
-  1.943325485336367300f, 1.943234802253592400f, 1.943144047723628400f,
-    1.943053221749812400f,
-  1.942962324335484100f, 1.942871355483985200f, 1.942780315198660200f,
-    1.942689203482856900f,
-  1.942598020339924700f, 1.942506765773216500f, 1.942415439786087300f,
-    1.942324042381895000f,
-  1.942232573564000000f, 1.942141033335765400f, 1.942049421700556600f,
-    1.941957738661741900f,
-  1.941865984222692900f, 1.941774158386782200f, 1.941682261157386700f,
-    1.941590292537884700f,
-  1.941498252531658200f, 1.941406141142090600f, 1.941313958372568900f,
-    1.941221704226482500f,
-  1.941129378707223000f, 1.941036981818185400f, 1.940944513562766300f,
-    1.940851973944365900f,
-  1.940759362966386600f, 1.940666680632233200f, 1.940573926945313700f,
-    1.940481101909038200f,
-  1.940388205526819600f, 1.940295237802073500f, 1.940202198738217900f,
-    1.940109088338673600f,
-  1.940015906606864300f, 1.939922653546215500f, 1.939829329160156500f,
-    1.939735933452118000f,
-  1.939642466425534300f, 1.939548928083841800f, 1.939455318430479500f,
-    1.939361637468889100f,
-  1.939267885202515400f, 1.939174061634805000f, 1.939080166769207700f,
-    1.938986200609175600f,
-  1.938892163158163700f, 1.938798054419629500f, 1.938703874397032800f,
-    1.938609623093837000f,
-  1.938515300513506700f, 1.938420906659510600f, 1.938326441535318500f,
-    1.938231905144404400f,
-  1.938137297490243500f, 1.938042618576314400f, 1.937947868406098500f,
-    1.937853046983079300f,
-  1.937758154310742900f, 1.937663190392578500f, 1.937568155232077600f,
-    1.937473048832734500f,
-  1.937377871198045600f, 1.937282622331510500f, 1.937187302236631500f,
-    1.937091910916912900f,
-  1.936996448375861900f, 1.936900914616988900f, 1.936805309643805800f,
-    1.936709633459828200f,
-  1.936613886068573500f, 1.936518067473562300f, 1.936422177678317300f,
-    1.936326216686364400f,
-  1.936230184501231500f, 1.936134081126449800f, 1.936037906565552400f,
-    1.935941660822075600f,
-  1.935845343899558000f, 1.935748955801540800f, 1.935652496531568000f,
-    1.935555966093186300f,
-  1.935459364489944500f, 1.935362691725394500f, 1.935265947803090900f,
-    1.935169132726590500f,
-  1.935072246499453000f, 1.934975289125240500f, 1.934878260607517900f,
-    1.934781160949852600f,
-  1.934683990155814800f, 1.934586748228977100f, 1.934489435172914900f,
-    1.934392050991206300f,
-  1.934294595687431300f, 1.934197069265173500f, 1.934099471728018700f,
-    1.934001803079554700f,
-  1.933904063323373300f, 1.933806252463067500f, 1.933708370502233800f,
-    1.933610417444471000f,
-  1.933512393293380600f, 1.933414298052566600f, 1.933316131725635800f,
-    1.933217894316197300f,
-  1.933119585827862900f, 1.933021206264247600f, 1.932922755628968100f,
-    1.932824233925644300f,
-  1.932725641157898600f, 1.932626977329356100f, 1.932528242443643900f,
-    1.932429436504392800f,
-  1.932330559515235100f, 1.932231611479806800f, 1.932132592401745400f,
-    1.932033502284691700f,
-  1.931934341132289100f, 1.931835108948183300f, 1.931735805736022800f,
-    1.931636431499459000f,
-  1.931536986242145200f, 1.931437469967737900f, 1.931337882679895900f,
-    1.931238224382281000f,
-  1.931138495078557300f, 1.931038694772391200f, 1.930938823467452500f,
-    1.930838881167413100f,
-  1.930738867875947400f, 1.930638783596732700f, 1.930538628333448900f,
-    1.930438402089778200f,
-  1.930338104869405900f, 1.930237736676019500f, 1.930137297513309300f,
-    1.930036787384968200f,
-  1.929936206294691400f, 1.929835554246177400f, 1.929734831243126600f,
-    1.929634037289242400f,
-  1.929533172388230700f, 1.929432236543799900f, 1.929331229759661200f,
-    1.929230152039528500f,
-  1.929129003387117800f, 1.929027783806148300f, 1.928926493300341400f,
-    1.928825131873421500f,
-  1.928723699529115000f, 1.928622196271151800f, 1.928520622103263400f,
-    1.928418977029184600f,
-  1.928317261052652700f, 1.928215474177407100f, 1.928113616407190600f,
-    1.928011687745748300f,
-  1.927909688196827400f, 1.927807617764178300f, 1.927705476451554000f,
-    1.927603264262709900f,
-  1.927500981201404100f, 1.927398627271397000f, 1.927296202476451900f,
-    1.927193706820335100f,
-  1.927091140306814500f, 1.926988502939661400f, 1.926885794722649600f,
-    1.926783015659555300f,
-  1.926680165754157500f, 1.926577245010237400f, 1.926474253431579500f,
-    1.926371191021970100f,
-  1.926268057785198700f, 1.926164853725057300f, 1.926061578845340600f,
-    1.925958233149845000f,
-  1.925854816642371000f, 1.925751329326720600f, 1.925647771206698600f,
-    1.925544142286112800f,
-  1.925440442568773000f, 1.925336672058492300f, 1.925232830759086000f,
-    1.925128918674371900f,
-  1.925024935808170600f, 1.924920882164305300f, 1.924816757746601800f,
-    1.924712562558888100f,
-  1.924608296604995800f, 1.924503959888757900f, 1.924399552414010700f,
-    1.924295074184593000f,
-  1.924190525204346300f, 1.924085905477114400f, 1.923981215006744100f,
-    1.923876453797084300f,
-  1.923771621851986700f, 1.923666719175306100f, 1.923561745770898900f,
-    1.923456701642625200f,
-  1.923351586794346900f, 1.923246401229928600f, 1.923141144953238300f,
-    1.923035817968145300f,
-  1.922930420278522500f, 1.922824951888245000f, 1.922719412801190600f,
-    1.922613803021239600f,
-  1.922508122552275100f, 1.922402371398182600f, 1.922296549562850100f,
-    1.922190657050168800f,
-  1.922084693864031700f, 1.921978660008334600f, 1.921872555486976700f,
-    1.921766380303858500f,
-  1.921660134462884100f, 1.921553817967959900f, 1.921447430822994500f,
-    1.921340973031900000f,
-  1.921234444598590100f, 1.921127845526981600f, 1.921021175820994100f,
-    1.920914435484549100f,
-  1.920807624521571700f, 1.920700742935988600f, 1.920593790731729600f,
-    1.920486767912727300f,
-  1.920379674482916500f, 1.920272510446234400f, 1.920165275806621400f,
-    1.920057970568020100f,
-  1.919950594734376000f, 1.919843148309637000f, 1.919735631297753400f,
-    1.919628043702678300f,
-  1.919520385528367300f, 1.919412656778779000f, 1.919304857457874200f,
-    1.919196987569616200f,
-  1.919089047117971100f, 1.918981036106907700f, 1.918872954540397300f,
-    1.918764802422413500f,
-  1.918656579756932800f, 1.918548286547934400f, 1.918439922799399800f,
-    1.918331488515313300f,
-  1.918222983699661600f, 1.918114408356434300f, 1.918005762489623400f,
-    1.917897046103223200f,
-  1.917788259201231200f, 1.917679401787647100f, 1.917570473866473200f,
-    1.917461475441714500f,
-  1.917352406517378600f, 1.917243267097475700f, 1.917134057186018300f,
-    1.917024776787022100f,
-  1.916915425904504700f, 1.916806004542486800f, 1.916696512704991500f,
-    1.916586950396044400f,
-  1.916477317619674100f, 1.916367614379911100f, 1.916257840680788900f,
-    1.916147996526343700f,
-  1.916038081920614400f, 1.915928096867641800f, 1.915818041371470000f,
-    1.915707915436145200f,
-  1.915597719065716700f, 1.915487452264236000f, 1.915377115035757200f,
-    1.915266707384337200f,
-  1.915156229314035200f, 1.915045680828913400f, 1.914935061933036300f,
-    1.914824372630470800f,
-  1.914713612925287100f, 1.914602782821557000f, 1.914491882323355700f,
-    1.914380911434760500f,
-  1.914269870159851700f, 1.914158758502712000f, 1.914047576467426500f,
-    1.913936324058083100f,
-  1.913825001278772100f, 1.913713608133586600f, 1.913602144626622500f,
-    1.913490610761977600f,
-  1.913379006543752800f, 1.913267331976051400f, 1.913155587062979500f,
-    1.913043771808645700f,
-  1.912931886217160900f, 1.912819930292639000f, 1.912707904039196300f,
-    1.912595807460951500f,
-  1.912483640562026200f, 1.912371403346544400f, 1.912259095818632700f,
-    1.912146717982420500f,
-  1.912034269842039600f, 1.911921751401624200f, 1.911809162665311500f,
-    1.911696503637241100f,
-  1.911583774321554700f, 1.911470974722397500f, 1.911358104843916500f,
-    1.911245164690262000f,
-  1.911132154265586100f, 1.911019073574044200f, 1.910905922619793800f,
-    1.910792701406995000f,
-  1.910679409939810600f, 1.910566048222406300f, 1.910452616258949900f,
-    1.910339114053611900f,
-  1.910225541610565800f, 1.910111898933986900f, 1.909998186028053700f,
-    1.909884402896947100f,
-  1.909770549544850500f, 1.909656625975950200f, 1.909542632194434700f,
-    1.909428568204495100f,
-  1.909314434010325400f, 1.909200229616121700f, 1.909085955026083200f,
-    1.908971610244411600f,
-  1.908857195275310800f, 1.908742710122987700f, 1.908628154791651300f,
-    1.908513529285513500f,
-  1.908398833608789100f, 1.908284067765694900f, 1.908169231760450400f,
-    1.908054325597278200f,
-  1.907939349280402400f, 1.907824302814050900f, 1.907709186202453600f,
-    1.907593999449842800f,
-  1.907478742560453600f, 1.907363415538523700f, 1.907248018388293400f,
-    1.907132551114005600f,
-  1.907017013719905600f, 1.906901406210241200f, 1.906785728589263300f,
-    1.906669980861224900f,
-  1.906554163030381500f, 1.906438275100991600f, 1.906322317077316300f,
-    1.906206288963618700f,
-  1.906090190764164700f, 1.905974022483223300f, 1.905857784125065500f,
-    1.905741475693964800f,
-  1.905625097194197900f, 1.905508648630043700f, 1.905392130005783400f,
-    1.905275541325701400f,
-  1.905158882594083900f, 1.905042153815220700f, 1.904925354993402900f,
-    1.904808486132925300f,
-  1.904691547238084800f, 1.904574538313180700f, 1.904457459362515200f,
-    1.904340310390393100f,
-  1.904223091401121600f, 1.904105802399010300f, 1.903988443388371600f,
-    1.903871014373520700f,
-  1.903753515358774800f, 1.903635946348454500f, 1.903518307346881800f,
-    1.903400598358382600f,
-  1.903282819387284200f, 1.903164970437917400f, 1.903047051514615000f,
-    1.902929062621712600f,
-  1.902811003763547900f, 1.902692874944462300f, 1.902574676168798700f,
-    1.902456407440902700f,
-  1.902338068765123200f, 1.902219660145810800f, 1.902101181587319000f,
-    1.901982633094004200f,
-  1.901864014670225000f, 1.901745326320342500f, 1.901626568048721000f,
-    1.901507739859726200f,
-  1.901388841757727600f, 1.901269873747096600f, 1.901150835832207100f,
-    1.901031728017436300f,
-  1.900912550307162700f, 1.900793302705768900f, 1.900673985217638900f,
-    1.900554597847159400f,
-  1.900435140598720500f, 1.900315613476714100f, 1.900196016485534700f,
-    1.900076349629579600f,
-  1.899956612913248800f, 1.899836806340944300f, 1.899716929917071500f,
-    1.899596983646037600f,
-  1.899476967532252900f, 1.899356881580129800f, 1.899236725794083600f,
-    1.899116500178532200f,
-  1.898996204737895900f, 1.898875839476597700f, 1.898755404399062900f,
-    1.898634899509719500f,
-  1.898514324812998300f, 1.898393680313332600f, 1.898272966015157800f,
-    1.898152181922912600f,
-  1.898031328041037700f, 1.897910404373976500f, 1.897789410926175000f,
-    1.897668347702081900f,
-  1.897547214706148300f, 1.897426011942827900f, 1.897304739416577200f,
-    1.897183397131854600f,
-  1.897061985093121800f, 1.896940503304842800f, 1.896818951771484000f,
-    1.896697330497514800f,
-  1.896575639487406300f, 1.896453878745633100f, 1.896332048276672100f,
-    1.896210148085002400f,
-  1.896088178175106200f, 1.895966138551467700f, 1.895844029218574100f,
-    1.895721850180915000f,
-  1.895599601442982600f, 1.895477283009271400f, 1.895354894884279100f,
-    1.895232437072505300f,
-  1.895109909578452500f, 1.894987312406625700f, 1.894864645561532100f,
-    1.894741909047682500f,
-  1.894619102869589100f, 1.894496227031767100f, 1.894373281538734400f,
-    1.894250266395011600f,
-  1.894127181605121100f, 1.894004027173588700f, 1.893880803104942600f,
-    1.893757509403713100f,
-  1.893634146074433500f, 1.893510713121639300f, 1.893387210549869000f,
-    1.893263638363663400f,
-  1.893139996567565900f, 1.893016285166122500f, 1.892892504163881600f,
-    1.892768653565394300f,
-  1.892644733375214300f, 1.892520743597897700f, 1.892396684238003300f,
-    1.892272555300092300f,
-  1.892148356788728700f, 1.892024088708479200f, 1.891899751063912200f,
-    1.891775343859599400f,
-  1.891650867100115300f, 1.891526320790036100f, 1.891401704933941100f,
-    1.891277019536412400f,
-  1.891152264602033800f, 1.891027440135392600f, 1.890902546141078000f,
-    1.890777582623682300f,
-  1.890652549587799700f, 1.890527447038027300f, 1.890402274978965100f,
-    1.890277033415215200f,
-  1.890151722351382200f, 1.890026341792073500f, 1.889900891741899100f,
-    1.889775372205471300f,
-  1.889649783187405100f, 1.889524124692318200f, 1.889398396724830500f,
-    1.889272599289564900f,
-  1.889146732391146400f, 1.889020796034202700f, 1.888894790223364600f,
-    1.888768714963264400f,
-  1.888642570258537700f, 1.888516356113822700f, 1.888390072533759700f,
-    1.888263719522991900f,
-  1.888137297086165000f, 1.888010805227927000f, 1.887884243952928600f,
-    1.887757613265823400f,
-  1.887630913171267000f, 1.887504143673917700f, 1.887377304778437000f,
-    1.887250396489487800f,
-  1.887123418811736500f, 1.886996371749851700f, 1.886869255308504200f,
-    1.886742069492368000f,
-  1.886614814306119400f, 1.886487489754437300f, 1.886360095842002600f,
-    1.886232632573499700f,
-  1.886105099953614900f, 1.885977497987037000f, 1.885849826678457800f,
-    1.885722086032571200f,
-  1.885594276054074300f, 1.885466396747665700f, 1.885338448118047700f,
-    1.885210430169924200f,
-  1.885082342908002400f, 1.884954186336991400f, 1.884825960461603100f,
-    1.884697665286552400f,
-  1.884569300816556000f, 1.884440867056333700f, 1.884312364010607600f,
-    1.884183791684102400f,
-  1.884055150081545200f, 1.883926439207665800f, 1.883797659067196800f,
-    1.883668809664872600f,
-  1.883539891005431100f, 1.883410903093611900f, 1.883281845934157800f,
-    1.883152719531813800f,
-  1.883023523891327300f, 1.882894259017448900f, 1.882764924914930700f,
-    1.882635521588528400f,
-  1.882506049042999700f, 1.882376507283104900f, 1.882246896313606800f,
-    1.882117216139270700f,
-  1.881987466764865100f, 1.881857648195159900f, 1.881727760434928500f,
-    1.881597803488946500f,
-  1.881467777361992100f, 1.881337682058845700f, 1.881207517584290600f,
-    1.881077283943112900f,
-  1.880946981140100500f, 1.880816609180044700f, 1.880686168067738500f,
-    1.880555657807977800f,
-  1.880425078405561600f, 1.880294429865290600f, 1.880163712191968300f,
-    1.880032925390400900f,
-  1.879902069465397200f, 1.879771144421768200f, 1.879640150264327600f,
-    1.879509086997891900f,
-  1.879377954627279700f, 1.879246753157312700f, 1.879115482592814500f,
-    1.878984142938611600f,
-  1.878852734199532900f, 1.878721256380410100f, 1.878589709486077300f,
-    1.878458093521370800f,
-  1.878326408491130200f, 1.878194654400196600f, 1.878062831253414900f,
-    1.877930939055631100f,
-  1.877798977811695200f, 1.877666947526458700f, 1.877534848204775800f,
-    1.877402679851504000f,
-  1.877270442471502100f, 1.877138136069632400f, 1.877005760650759500f,
-    1.876873316219750200f,
-  1.876740802781474500f, 1.876608220340804100f, 1.876475568902614000f,
-    1.876342848471781200f,
-  1.876210059053185600f, 1.876077200651709500f, 1.875944273272237800f,
-    1.875811276919657500f,
-  1.875678211598858800f, 1.875545077314734000f, 1.875411874072178100f,
-    1.875278601876088700f,
-  1.875145260731365700f, 1.875011850642911600f, 1.874878371615631900f,
-    1.874744823654434000f,
-  1.874611206764227800f, 1.874477520949926500f, 1.874343766216444800f,
-    1.874209942568701100f,
-  1.874076050011615400f, 1.873942088550110400f, 1.873808058189111700f,
-    1.873673958933546900f,
-  1.873539790788347100f, 1.873405553758444600f, 1.873271247848775400f,
-    1.873136873064277000f,
-  1.873002429409890600f, 1.872867916890558900f, 1.872733335511227700f,
-    1.872598685276845000f,
-  1.872463966192361900f, 1.872329178262731200f, 1.872194321492908700f,
-    1.872059395887852900f,
-  1.871924401452524700f, 1.871789338191887100f, 1.871654206110906500f,
-    1.871519005214550700f,
-  1.871383735507791100f, 1.871248396995601300f, 1.871112989682956800f,
-    1.870977513574836500f,
-  1.870841968676221400f, 1.870706354992095000f, 1.870570672527443600f,
-    1.870434921287255700f,
-  1.870299101276522400f, 1.870163212500237900f, 1.870027254963397800f,
-    1.869891228671001200f,
-  1.869755133628049600f, 1.869618969839546500f, 1.869482737310498100f,
-    1.869346436045913800f,
-  1.869210066050804600f, 1.869073627330184700f, 1.868937119889070300f,
-    1.868800543732480600f,
-  1.868663898865437200f, 1.868527185292963700f, 1.868390403020087100f,
-    1.868253552051836200f,
-  1.868116632393243000f, 1.867979644049341200f, 1.867842587025167800f,
-    1.867705461325761800f,
-  1.867568266956164800f, 1.867431003921421500f, 1.867293672226578300f,
-    1.867156271876684500f,
-  1.867018802876792200f, 1.866881265231955500f, 1.866743658947231300f,
-    1.866605984027679000f,
-  1.866468240478360600f, 1.866330428304340300f, 1.866192547510685300f,
-    1.866054598102465000f,
-  1.865916580084751500f, 1.865778493462619100f, 1.865640338241145100f,
-    1.865502114425408900f,
-  1.865363822020492700f, 1.865225461031480900f, 1.865087031463460900f,
-    1.864948533321522300f,
-  1.864809966610757400f, 1.864671331336260600f, 1.864532627503129100f,
-    1.864393855116463200f,
-  1.864255014181364500f, 1.864116104702938000f, 1.863977126686291200f,
-    1.863838080136534000f,
-  1.863698965058778300f, 1.863559781458139300f, 1.863420529339734100f,
-    1.863281208708683000f,
-  1.863141819570107900f, 1.863002361929134500f, 1.862862835790889400f,
-    1.862723241160503300f,
-  1.862583578043108100f, 1.862443846443839300f, 1.862304046367834200f,
-    1.862164177820232700f,
-  1.862024240806177800f, 1.861884235330814300f, 1.861744161399289600f,
-    1.861604019016754200f,
-  1.861463808188360500f, 1.861323528919263800f, 1.861183181214621600f,
-    1.861042765079594200f,
-  1.860902280519344500f, 1.860761727539037300f, 1.860621106143840500f,
-    1.860480416338924600f,
-  1.860339658129461800f, 1.860198831520627900f, 1.860057936517600700f,
-    1.859916973125560000f,
-  1.859775941349689000f, 1.859634841195173100f, 1.859493672667199800f,
-    1.859352435770959900f,
-  1.859211130511645900f, 1.859069756894453400f, 1.858928314924580300f,
-    1.858786804607227100f,
-  1.858645225947596300f, 1.858503578950893900f, 1.858361863622327400f,
-    1.858220079967107600f,
-  1.858078227990447300f, 1.857936307697561900f, 1.857794319093669900f,
-    1.857652262183991000f,
-  1.857510136973749000f, 1.857367943468169100f, 1.857225681672479300f,
-    1.857083351591910300f,
-  1.856940953231694900f, 1.856798486597069000f, 1.856655951693270600f,
-    1.856513348525540300f,
-  1.856370677099121100f, 1.856227937419258700f, 1.856085129491201100f,
-    1.855942253320199200f,
-  1.855799308911506100f, 1.855656296270377300f, 1.855513215402071000f,
-    1.855370066311848000f,
-  1.855226849004971500f, 1.855083563486706900f, 1.854940209762322700f,
-    1.854796787837089500f,
-  1.854653297716280400f, 1.854509739405171300f, 1.854366112909040300f,
-    1.854222418233168400f,
-  1.854078655382838300f, 1.853934824363336200f, 1.853790925179950500f,
-    1.853646957837971500f,
-  1.853502922342692600f, 1.853358818699409900f, 1.853214646913421200f,
-    1.853070406990027500f,
-  1.852926098934532200f, 1.852781722752241000f, 1.852637278448462200f,
-    1.852492766028506400f,
-  1.852348185497687300f, 1.852203536861320600f, 1.852058820124724300f,
-    1.851914035293219700f,
-  1.851769182372129600f, 1.851624261366780400f, 1.851479272282500000f,
-    1.851334215124619300f,
-  1.851189089898471800f, 1.851043896609393400f, 1.850898635262721900f,
-    1.850753305863798800f,
-  1.850607908417967200f, 1.850462442930572900f, 1.850316909406964200f,
-    1.850171307852492200f,
-  1.850025638272510000f, 1.849879900672373600f, 1.849734095057441200f,
-    1.849588221433073700f,
-  1.849442279804634600f, 1.849296270177489800f, 1.849150192557007300f,
-    1.849004046948558200f,
-  1.848857833357515900f, 1.848711551789256300f, 1.848565202249157400f,
-    1.848418784742600400f,
-  1.848272299274968500f, 1.848125745851647800f, 1.847979124478026100f,
-    1.847832435159495000f,
-  1.847685677901447200f, 1.847538852709279100f, 1.847391959588388300f,
-    1.847244998544176300f,
-  1.847097969582046200f, 1.846950872707404000f, 1.846803707925657600f,
-    1.846656475242218300f,
-  1.846509174662499300f, 1.846361806191916000f, 1.846214369835887500f,
-    1.846066865599834000f,
-  1.845919293489179000f, 1.845771653509348200f, 1.845623945665770100f,
-    1.845476169963875500f,
-  1.845328326409097400f, 1.845180415006871800f, 1.845032435762637100f,
-    1.844884388681833800f,
-  1.844736273769905300f, 1.844588091032297400f, 1.844439840474458200f,
-    1.844291522101838800f,
-  1.844143135919891900f, 1.843994681934073600f, 1.843846160149842200f,
-    1.843697570572658200f,
-  1.843548913207985000f, 1.843400188061288000f, 1.843251395138035800f,
-    1.843102534443698900f,
-  1.842953605983750400f, 1.842804609763666100f, 1.842655545788924000f,
-    1.842506414065004900f,
-  1.842357214597392100f, 1.842207947391570900f, 1.842058612453029600f,
-    1.841909209787258900f,
-  1.841759739399751800f, 1.841610201296003800f, 1.841460595481513100f,
-    1.841310921961780500f,
-  1.841161180742308500f, 1.841011371828603200f, 1.840861495226172600f,
-    1.840711550940526700f,
-  1.840561538977179200f, 1.840411459341645400f, 1.840261312039443100f,
-    1.840111097076092800f,
-  1.839960814457117600f, 1.839810464188043100f, 1.839660046274397100f,
-    1.839509560721709800f,
-  1.839359007535514400f, 1.839208386721346500f, 1.839057698284743500f,
-    1.838906942231246100f,
-  1.838756118566397200f, 1.838605227295741800f, 1.838454268424828400f,
-    1.838303241959206700f,
-  1.838152147904429800f, 1.838000986266052900f, 1.837849757049633900f,
-    1.837698460260732900f,
-  1.837547095904912700f, 1.837395663987738700f, 1.837244164514778600f,
-    1.837092597491602100f,
-  1.836940962923782700f, 1.836789260816895000f, 1.836637491176516600f,
-    1.836485654008228200f,
-  1.836333749317611700f, 1.836181777110252900f, 1.836029737391738700f,
-    1.835877630167659800f,
-  1.835725455443608200f, 1.835573213225179400f, 1.835420903517970500f,
-    1.835268526327581900f,
-  1.835116081659615700f, 1.834963569519677100f, 1.834810989913373500f,
-    1.834658342846314800f,
-  1.834505628324113200f, 1.834352846352383700f, 1.834199996936744000f,
-    1.834047080082813300f,
-  1.833894095796214400f, 1.833741044082571900f, 1.833587924947513100f,
-    1.833434738396668000f,
-  1.833281484435668400f, 1.833128163070149300f, 1.832974774305747600f,
-    1.832821318148103500f,
-  1.832667794602858400f, 1.832514203675657600f, 1.832360545372147900f,
-    1.832206819697979000f,
-  1.832053026658802700f, 1.831899166260273700f, 1.831745238508049300f,
-    1.831591243407788300f,
-  1.831437180965153100f, 1.831283051185808300f, 1.831128854075420500f,
-    1.830974589639659000f,
-  1.830820257884196100f, 1.830665858814705600f, 1.830511392436864800f,
-    1.830356858756352800f,
-  1.830202257778851300f, 1.830047589510044500f, 1.829892853955619200f,
-    1.829738051121264600f,
-  1.829583181012672400f, 1.829428243635536500f, 1.829273238995553700f,
-    1.829118167098423100f,
-  1.828963027949846100f, 1.828807821555527000f, 1.828652547921171900f,
-    1.828497207052490100f,
-  1.828341798955192900f, 1.828186323634994200f, 1.828030781097610400f,
-    1.827875171348760400f,
-  1.827719494394165500f, 1.827563750239549400f, 1.827407938890638600f,
-    1.827252060353161500f,
-  1.827096114632849700f, 1.826940101735436500f, 1.826784021666658400f,
-    1.826627874432253700f,
-  1.826471660037963800f, 1.826315378489531800f, 1.826159029792704400f,
-    1.826002613953229500f,
-  1.825846130976858100f, 1.825689580869344100f, 1.825532963636443000f,
-    1.825376279283913200f,
-  1.825219527817515800f, 1.825062709243013800f, 1.824905823566173000f,
-    1.824748870792761900f,
-  1.824591850928550800f, 1.824434763979313300f, 1.824277609950824700f,
-    1.824120388848863300f,
-  1.823963100679209600f, 1.823805745447646600f, 1.823648323159960100f,
-    1.823490833821937600f,
-  1.823333277439369600f, 1.823175654018049300f, 1.823017963563772000f,
-    1.822860206082335300f,
-  1.822702381579539800f, 1.822544490061187800f, 1.822386531533084900f,
-    1.822228506001038800f,
-  1.822070413470859600f, 1.821912253948359700f, 1.821754027439354400f,
-    1.821595733949661100f,
-  1.821437373485099900f, 1.821278946051493100f, 1.821120451654665700f,
-    1.820961890300445400f,
-  1.820803261994661500f, 1.820644566743146800f, 1.820485804551735800f,
-    1.820326975426265600f,
-  1.820168079372576300f, 1.820009116396509800f, 1.819850086503910700f,
-    1.819690989700625900f,
-  1.819531825992505500f, 1.819372595385401000f, 1.819213297885166900f,
-    1.819053933497660300f,
-  1.818894502228740600f, 1.818735004084269600f, 1.818575439070111200f,
-    1.818415807192132600f,
-  1.818256108456203000f, 1.818096342868193800f, 1.817936510433979300f,
-    1.817776611159436000f,
-  1.817616645050443000f, 1.817456612112881900f, 1.817296512352636300f,
-    1.817136345775592900f,
-  1.816976112387640700f, 1.816815812194670700f, 1.816655445202576700f,
-    1.816495011417255300f,
-  1.816334510844604700f, 1.816173943490526400f, 1.816013309360923900f,
-    1.815852608461703300f,
-  1.815691840798773000f, 1.815531006378043900f, 1.815370105205429600f,
-    1.815209137286846200f,
-  1.815048102628211500f, 1.814887001235446600f, 1.814725833114474700f,
-    1.814564598271221300f,
-  1.814403296711615000f, 1.814241928441585800f, 1.814080493467067300f,
-    1.813918991793994900f,
-  1.813757423428306000f, 1.813595788375941700f, 1.813434086642844400f,
-    1.813272318234959700f,
-  1.813110483158235400f, 1.812948581418621500f, 1.812786613022070700f,
-    1.812624577974538000f,
-  1.812462476281981200f, 1.812300307950360300f, 1.812138072985637800f,
-    1.811975771393778300f,
-  1.811813403180749300f, 1.811650968352521000f, 1.811488466915065000f,
-    1.811325898874356800f,
-  1.811163264236372900f, 1.811000563007093100f, 1.810837795192499400f,
-    1.810674960798576600f,
-  1.810512059831311400f, 1.810349092296693400f, 1.810186058200714100f,
-    1.810022957549368000f,
-  1.809859790348652200f, 1.809696556604565300f, 1.809533256323109200f,
-    1.809369889510288100f,
-  1.809206456172108200f, 1.809042956314578900f, 1.808879389943711200f,
-    1.808715757065519200f,
-  1.808552057686019200f, 1.808388291811230000f, 1.808224459447172800f,
-    1.808060560599871200f,
-  1.807896595275351200f, 1.807732563479641300f, 1.807568465218772900f,
-    1.807404300498778800f,
-  1.807240069325695400f, 1.807075771705560800f, 1.806911407644415700f,
-    1.806746977148303300f,
-  1.806582480223269500f, 1.806417916875362000f, 1.806253287110631600f,
-    1.806088590935131000f,
-  1.805923828354915900f, 1.805758999376044100f, 1.805594104004575800f,
-    1.805429142246573600f,
-  1.805264114108102900f, 1.805099019595231200f, 1.804933858714028700f,
-    1.804768631470567500f,
-  1.804603337870923000f, 1.804437977921172300f, 1.804272551627395400f,
-    1.804107058995674500f,
-  1.803941500032094200f, 1.803775874742741500f, 1.803610183133706400f,
-    1.803444425211080400f,
-  1.803278600980958300f, 1.803112710449436900f, 1.802946753622615400f,
-    1.802780730506595700f,
-  1.802614641107481900f, 1.802448485431380900f, 1.802282263484401300f,
-    1.802115975272655000f,
-  1.801949620802255600f, 1.801783200079319900f, 1.801616713109966300f,
-    1.801450159900316300f,
-  1.801283540456493700f, 1.801116854784624400f, 1.800950102890836800f,
-    1.800783284781262200f,
-  1.800616400462033800f, 1.800449449939287800f, 1.800282433219162000f,
-    1.800115350307797600f,
-  1.799948201211337500f, 1.799780985935927300f, 1.799613704487715200f,
-    1.799446356872851400f,
-  1.799278943097489100f, 1.799111463167783400f, 1.798943917089892000f,
-    1.798776304869975200f,
-  1.798608626514195800f, 1.798440882028718500f, 1.798273071419711000f,
-    1.798105194693343500f,
-  1.797937251855787700f, 1.797769242913218800f, 1.797601167871813800f,
-    1.797433026737752700f,
-  1.797264819517217200f, 1.797096546216391900f, 1.796928206841463800f,
-    1.796759801398622100f,
-  1.796591329894058800f, 1.796422792333968000f, 1.796254188724546500f,
-    1.796085519071992900f,
-  1.795916783382509200f, 1.795747981662299200f, 1.795579113917569200f,
-    1.795410180154527900f,
-  1.795241180379386800f, 1.795072114598359200f, 1.794902982817661500f,
-    1.794733785043511900f,
-  1.794564521282131300f, 1.794395191539743400f, 1.794225795822573600f,
-    1.794056334136850300f,
-  1.793886806488804100f, 1.793717212884667900f, 1.793547553330677300f,
-    1.793377827833070100f,
-  1.793208036398086900f, 1.793038179031970000f, 1.792868255740965000f,
-    1.792698266531319400f,
-  1.792528211409282900f, 1.792358090381108300f, 1.792187903453050100f,
-    1.792017650631366100f,
-  1.791847331922315600f, 1.791676947332161000f, 1.791506496867166600f,
-    1.791335980533599300f,
-  1.791165398337728900f, 1.790994750285827000f, 1.790824036384167900f,
-    1.790653256639028100f,
-  1.790482411056686800f, 1.790311499643425500f, 1.790140522405528200f,
-    1.789969479349281100f,
-  1.789798370480973000f, 1.789627195806895200f, 1.789455955333341100f,
-    1.789284649066606800f,
-  1.789113277012990900f, 1.788941839178794100f, 1.788770335570319700f,
-    1.788598766193873600f,
-  1.788427131055763600f, 1.788255430162300400f, 1.788083663519796800f,
-    1.787911831134568300f,
-  1.787739933012932900f, 1.787567969161210300f, 1.787395939585723500f,
-    1.787223844292797500f,
-  1.787051683288759500f, 1.786879456579939700f, 1.786707164172670200f,
-    1.786534806073285700f,
-  1.786362382288123400f, 1.786189892823522700f, 1.786017337685825700f,
-    1.785844716881376700f,
-  1.785672030416522300f, 1.785499278297612000f, 1.785326460530997300f,
-    1.785153577123032000f,
-  1.784980628080072900f, 1.784807613408478300f, 1.784634533114609800f,
-    1.784461387204831400f,
-  1.784288175685508700f, 1.784114898563010200f, 1.783941555843707100f,
-    1.783768147533972200f,
-  1.783594673640181800f, 1.783421134168713800f, 1.783247529125948900f,
-    1.783073858518269700f,
-  1.782900122352062000f, 1.782726320633713200f, 1.782552453369613800f,
-    1.782378520566156200f,
-  1.782204522229735600f, 1.782030458366749200f, 1.781856328983596900f,
-    1.781682134086680900f,
-  1.781507873682406200f, 1.781333547777179200f, 1.781159156377410100f,
-    1.780984699489510200f,
-  1.780810177119894100f, 1.780635589274978600f, 1.780460935961182300f,
-    1.780286217184927000f,
-  1.780111432952636600f, 1.779936583270737400f, 1.779761668145658300f,
-    1.779586687583830200f,
-  1.779411641591686500f, 1.779236530175663600f, 1.779061353342199500f,
-    1.778886111097735000f,
-  1.778710803448713400f, 1.778535430401580100f, 1.778359991962783000f,
-    1.778184488138772900f,
-  1.778008918936002000f, 1.777833284360925900f, 1.777657584420002000f,
-    1.777481819119690200f,
-  1.777305988466453000f, 1.777130092466755200f, 1.776954131127064200f,
-    1.776778104453849100f,
-  1.776602012453582400f, 1.776425855132738100f, 1.776249632497793200f,
-    1.776073344555227000f,
-  1.775896991311520800f, 1.775720572773158900f, 1.775544088946627600f,
-    1.775367539838415700f,
-  1.775190925455014400f, 1.775014245802917200f, 1.774837500888620400f,
-    1.774660690718622000f,
-  1.774483815299423100f, 1.774306874637527000f, 1.774129868739439100f,
-    1.773952797611667100f,
-  1.773775661260722100f, 1.773598459693116500f, 1.773421192915365400f,
-    1.773243860933986400f,
-  1.773066463755499800f, 1.772889001386427800f, 1.772711473833295200f,
-    1.772533881102629000f,
-  1.772356223200959100f, 1.772178500134817100f, 1.772000711910737700f,
-    1.771822858535257600f,
-  1.771644940014915700f, 1.771466956356254000f, 1.771288907565816000f,
-    1.771110793650148500f,
-  1.770932614615799800f, 1.770754370469321400f, 1.770576061217266500f,
-    1.770397686866191300f,
-  1.770219247422653700f, 1.770040742893215000f, 1.769862173284438000f,
-    1.769683538602888000f,
-  1.769504838855133100f, 1.769326074047743700f, 1.769147244187292200f,
-    1.768968349280353800f,
-  1.768789389333506000f, 1.768610364353328600f, 1.768431274346403900f,
-    1.768252119319316400f,
-  1.768072899278653200f, 1.767893614231003800f, 1.767714264182959500f,
-    1.767534849141115100f,
-  1.767355369112067100f, 1.767175824102414000f, 1.766996214118757800f,
-    1.766816539167701800f,
-  1.766636799255852300f, 1.766456994389817600f, 1.766277124576209000f,
-    1.766097189821639300f,
-  1.765917190132724600f, 1.765737125516083000f, 1.765556995978334800f,
-    1.765376801526102700f,
-  1.765196542166012100f, 1.765016217904690900f, 1.764835828748768400f,
-    1.764655374704877700f,
-  1.764474855779653200f, 1.764294271979732100f, 1.764113623311754000f,
-    1.763932909782361100f,
-  1.763752131398197200f, 1.763571288165909400f, 1.763390380092146400f,
-    1.763209407183560200f,
-  1.763028369446804500f, 1.762847266888535100f, 1.762666099515411100f,
-    1.762484867334093400f,
-  1.762303570351245300f, 1.762122208573532600f, 1.761940782007623600f,
-    1.761759290660188400f,
-  1.761577734537900500f, 1.761396113647435000f, 1.761214427995469100f,
-    1.761032677588683800f,
-  1.760850862433760700f, 1.760668982537384900f, 1.760487037906243600f,
-    1.760305028547026500f,
-  1.760122954466425600f, 1.759940815671135100f, 1.759758612167851700f,
-    1.759576343963274600f,
-  1.759394011064105100f, 1.759211613477047200f, 1.759029151208807400f,
-    1.758846624266093800f,
-  1.758664032655617500f, 1.758481376384092500f, 1.758298655458233600f,
-    1.758115869884759700f,
-  1.757933019670390800f, 1.757750104821850000f, 1.757567125345862700f,
-    1.757384081249156100f,
-  1.757200972538460700f, 1.757017799220508500f, 1.756834561302034400f,
-    1.756651258789775800f,
-  1.756467891690471700f, 1.756284460010864200f, 1.756100963757697900f,
-    1.755917402937718900f,
-  1.755733777557676500f, 1.755550087624322000f, 1.755366333144409200f,
-    1.755182514124693900f,
-  1.754998630571935200f, 1.754814682492893600f, 1.754630669894332600f,
-    1.754446592783017500f,
-  1.754262451165716300f, 1.754078245049199600f, 1.753893974440240000f,
-    1.753709639345612600f,
-  1.753525239772095100f, 1.753340775726466700f, 1.753156247215510400f,
-    1.752971654246010300f,
-  1.752786996824753600f, 1.752602274958529500f, 1.752417488654129700f,
-    1.752232637918348200f,
-  1.752047722757981600f, 1.751862743179828600f, 1.751677699190690400f,
-    1.751492590797370600f,
-  1.751307418006674800f, 1.751122180825411800f, 1.750936879260391700f,
-    1.750751513318427700f,
-  1.750566083006335600f, 1.750380588330932500f, 1.750195029299038900f,
-    1.750009405917477100f,
-  1.749823718193071800f, 1.749637966132650900f, 1.749452149743043100f,
-    1.749266269031080700f,
-  1.749080324003598100f, 1.748894314667431800f, 1.748708241029421000f,
-    1.748522103096407300f,
-  1.748335900875233900f, 1.748149634372747200f, 1.747963303595795500f,
-    1.747776908551230000f,
-  1.747590449245904000f, 1.747403925686672500f, 1.747217337880393900f,
-    1.747030685833928200f,
-  1.746843969554138200f, 1.746657189047889200f, 1.746470344322048200f,
-    1.746283435383485100f,
-  1.746096462239072000f, 1.745909424895683200f, 1.745722323360195900f,
-    1.745535157639489100f,
-  1.745347927740444200f, 1.745160633669945200f, 1.744973275434878300f,
-    1.744785853042132300f,
-  1.744598366498598200f, 1.744410815811169300f, 1.744223200986741100f,
-    1.744035522032211900f,
-  1.743847778954482000f, 1.743659971760454200f, 1.743472100457033700f,
-    1.743284165051127700f,
-  1.743096165549646400f, 1.742908101959502100f, 1.742719974287608900f,
-    1.742531782540884100f,
-  1.742343526726246800f, 1.742155206850618800f, 1.741966822920923800f,
-    1.741778374944088000f,
-  1.741589862927040800f, 1.741401286876712800f, 1.741212646800037300f,
-    1.741023942703950200f,
-  1.740835174595389600f, 1.740646342481295900f, 1.740457446368612000f,
-    1.740268486264283200f,
-  1.740079462175256900f, 1.739890374108482600f, 1.739701222070913200f,
-    1.739512006069502800f,
-  1.739322726111208500f, 1.739133382202989500f, 1.738943974351807600f,
-    1.738754502564626700f,
-  1.738564966848413100f, 1.738375367210135400f, 1.738185703656765200f,
-    1.737995976195275000f,
-  1.737806184832640900f, 1.737616329575841300f, 1.737426410431856200f,
-    1.737236427407668800f,
-  1.737046380510263800f, 1.736856269746629000f, 1.736666095123754000f,
-    1.736475856648631400f,
-  1.736285554328254900f, 1.736095188169622500f, 1.735904758179732400f,
-    1.735714264365586700f,
-  1.735523706734189100f, 1.735333085292545900f, 1.735142400047666100f,
-    1.734951651006560100f,
-  1.734760838176241400f, 1.734569961563725600f, 1.734379021176030600f,
-    1.734188017020177100f,
-  1.733996949103187500f, 1.733805817432086900f, 1.733614622013902600f,
-    1.733423362855664100f,
-  1.733232039964403900f, 1.733040653347156300f, 1.732849203010957900f,
-    1.732657688962847600f,
-  1.732466111209867200f, 1.732274469759060200f, 1.732082764617472800f,
-    1.731890995792153600f,
-  1.731699163290153100f, 1.731507267118524500f, 1.731315307284323700f,
-    1.731123283794607800f,
-  1.730931196656437600f, 1.730739045876875200f, 1.730546831462985500f,
-    1.730354553421835600f,
-  1.730162211760495300f, 1.729969806486036500f, 1.729777337605533000f,
-    1.729584805126061400f,
-  1.729392209054700900f, 1.729199549398532400f, 1.729006826164639400f,
-    1.728814039360108100f,
-  1.728621188992026400f, 1.728428275067485100f, 1.728235297593577100f,
-    1.728042256577397200f,
-  1.727849152026043500f, 1.727655983946615700f, 1.727462752346216000f,
-    1.727269457231948900f,
-  1.727076098610921500f, 1.726882676490243000f, 1.726689190877025000f,
-    1.726495641778381200f,
-  1.726302029201427900f, 1.726108353153283900f, 1.725914613641069900f,
-    1.725720810671909300f,
-  1.725526944252927700f, 1.725333014391252900f, 1.725139021094015200f,
-    1.724944964368347000f,
-  1.724750844221383500f, 1.724556660660261800f, 1.724362413692121400f,
-    1.724168103324104300f,
-  1.723973729563354600f, 1.723779292417019200f, 1.723584791892246700f,
-    1.723390227996188600f,
-  1.723195600735998100f, 1.723000910118831300f, 1.722806156151846400f,
-    1.722611338842204000f,
-  1.722416458197066900f, 1.722221514223600100f, 1.722026506928971500f,
-    1.721831436320350800f,
-  1.721636302404910200f, 1.721441105189824000f, 1.721245844682269600f,
-    1.721050520889425600f,
-  1.720855133818473900f, 1.720659683476597900f, 1.720464169870984200f,
-    1.720268593008821100f,
-  1.720072952897299100f, 1.719877249543611900f, 1.719681482954954500f,
-    1.719485653138524800f,
-  1.719289760101522900f, 1.719093803851151400f, 1.718897784394614900f,
-    1.718701701739120400f,
-  1.718505555891877400f, 1.718309346860097600f, 1.718113074650995200f,
-    1.717916739271786500f,
-  1.717720340729689700f, 1.717523879031926500f, 1.717327354185719900f,
-    1.717130766198295700f,
-  1.716934115076881800f, 1.716737400828708400f, 1.716540623461008100f,
-    1.716343782981016200f,
-  1.716146879395969500f, 1.715949912713108100f, 1.715752882939673300f,
-    1.715555790082909900f,
-  1.715358634150064000f, 1.715161415148384500f, 1.714964133085122900f,
-    1.714766787967532600f,
-  1.714569379802868900f, 1.714371908598390800f, 1.714174374361358000f,
-    1.713976777099033700f,
-  1.713779116818682900f, 1.713581393527573000f, 1.713383607232973600f,
-    1.713185757942156800f,
-  1.712987845662396800f, 1.712789870400970700f, 1.712591832165157200f,
-    1.712393730962237500f,
-  1.712195566799495500f, 1.711997339684216700f, 1.711799049623689900f,
-    1.711600696625205300f,
-  1.711402280696055800f, 1.711203801843536700f, 1.711005260074945200f,
-    1.710806655397581600f,
-  1.710607987818747700f, 1.710409257345748100f, 1.710210463985889500f,
-    1.710011607746480600f,
-  1.709812688634833300f, 1.709613706658261100f, 1.709414661824080000f,
-    1.709215554139608400f,
-  1.709016383612166600f, 1.708817150249077900f, 1.708617854057667300f,
-    1.708418495045262300f,
-  1.708219073219193300f, 1.708019588586791700f, 1.707820041155392500f,
-    1.707620430932332400f,
-  1.707420757924950300f, 1.707221022140587900f, 1.707021223586588700f,
-    1.706821362270298600f,
-  1.706621438199066300f, 1.706421451380242000f, 1.706221401821179200f,
-    1.706021289529232800f,
-  1.705821114511760300f, 1.705620876776121600f, 1.705420576329679000f,
-    1.705220213179796900f,
-  1.705019787333842200f, 1.704819298799183700f, 1.704618747583193100f,
-    1.704418133693243800f,
-  1.704217457136711900f, 1.704016717920976000f, 1.703815916053416300f,
-    1.703615051541415900f,
-  1.703414124392360000f, 1.703213134613636100f, 1.703012082212634000f,
-    1.702810967196746000f,
-  1.702609789573366300f, 1.702408549349891500f, 1.702207246533721000f,
-    1.702005881132255800f,
-  1.701804453152900000f, 1.701602962603059100f, 1.701401409490141300f,
-    1.701199793821557300f,
-  1.700998115604720000f, 1.700796374847044300f, 1.700594571555948100f,
-    1.700392705738850400f,
-  1.700190777403173700f, 1.699988786556342300f, 1.699786733205783000f,
-    1.699584617358924400f,
-  1.699382439023197700f, 1.699180198206036600f, 1.698977894914877100f,
-    1.698775529157156700f,
-  1.698573100940316400f, 1.698370610271798800f, 1.698168057159048700f,
-    1.697965441609513300f,
-  1.697762763630642700f, 1.697560023229888200f, 1.697357220414704500f,
-    1.697154355192547900f,
-  1.696951427570877000f, 1.696748437557152900f, 1.696545385158839200f,
-    1.696342270383401200f,
-  1.696139093238307400f, 1.695935853731027600f, 1.695732551869034300f,
-    1.695529187659802400f,
-  1.695325761110809200f, 1.695122272229534000f, 1.694918721023458600f,
-    1.694715107500066800f,
-  1.694511431666845000f, 1.694307693531282000f, 1.694103893100868100f,
-    1.693900030383096900f,
-  1.693696105385463800f, 1.693492118115466500f, 1.693288068580604900f,
-    1.693083956788381500f,
-  1.692879782746300700f, 1.692675546461869900f, 1.692471247942597600f,
-    1.692266887195995600f,
-  1.692062464229577600f, 1.691857979050859900f, 1.691653431667360600f,
-    1.691448822086600400f,
-  1.691244150316102000f, 1.691039416363390800f, 1.690834620235994300f,
-    1.690629761941442100f,
-  1.690424841487266700f, 1.690219858881001800f, 1.690014814130184300f,
-    1.689809707242353200f,
-  1.689604538225049700f, 1.689399307085817300f, 1.689194013832201500f,
-    1.688988658471750600f,
-  1.688783241012014700f, 1.688577761460546800f, 1.688372219824901400f,
-    1.688166616112636100f,
-  1.687960950331309800f, 1.687755222488484600f, 1.687549432591724400f,
-    1.687343580648595700f,
-  1.687137666666667100f, 1.686931690653509000f, 1.686725652616694900f,
-    1.686519552563800400f,
-  1.686313390502403000f, 1.686107166440082600f, 1.685900880384421800f,
-    1.685694532343004600f,
-  1.685488122323418400f, 1.685281650333251900f, 1.685075116380096800f,
-    1.684868520471546600f,
-  1.684661862615197000f, 1.684455142818646700f, 1.684248361089495800f,
-    1.684041517435347400f,
-  1.683834611863806100f, 1.683627644382479800f, 1.683420614998977900f,
-    1.683213523720911800f,
-  1.683006370555896400f, 1.682799155511547600f, 1.682591878595484300f,
-    1.682384539815327400f,
-  1.682177139178700400f, 1.681969676693228600f, 1.681762152366539600f,
-    1.681554566206263900f,
-  1.681346918220033800f, 1.681139208415483700f, 1.680931436800250600f,
-    1.680723603381973500f,
-  1.680515708168294200f, 1.680307751166856300f, 1.680099732385305300f,
-    1.679891651831290100f,
-  1.679683509512460900f, 1.679475305436470600f, 1.679267039610974300f,
-    1.679058712043629300f,
-  1.678850322742095200f, 1.678641871714033900f, 1.678433358967109400f,
-    1.678224784508988400f,
-  1.678016148347339300f, 1.677807450489833300f, 1.677598690944143400f,
-    1.677389869717945000f,
-  1.677180986818916300f, 1.676972042254736900f, 1.676763036033089600f,
-    1.676553968161658600f,
-  1.676344838648130600f, 1.676135647500194700f, 1.675926394725542700f,
-    1.675717080331867900f,
-  1.675507704326866200f, 1.675298266718235900f, 1.675088767513677200f,
-    1.674879206720892900f,
-  1.674669584347587800f, 1.674459900401469700f, 1.674250154890247300f,
-    1.674040347821632800f,
-  1.673830479203340000f, 1.673620549043085500f, 1.673410557348587600f,
-    1.673200504127567000f,
-  1.672990389387746700f, 1.672780213136852300f, 1.672569975382611300f,
-    1.672359676132753500f,
-  1.672149315395010900f, 1.671938893177118000f, 1.671728409486811500f,
-    1.671517864331830000f,
-  1.671307257719914800f, 1.671096589658809500f, 1.670885860156259300f,
-    1.670675069220012500f,
-  1.670464216857819200f, 1.670253303077431800f, 1.670042327886605200f,
-    1.669831291293095900f,
-  1.669620193304663500f, 1.669409033929069500f, 1.669197813174077200f,
-    1.668986531047453000f,
-  1.668775187556965000f, 1.668563782710383600f, 1.668352316515481700f,
-    1.668140788980034400f,
-  1.667929200111818400f, 1.667717549918614100f, 1.667505838408202700f,
-    1.667294065588368100f,
-  1.667082231466896900f, 1.666870336051577800f, 1.666658379350201000f,
-    1.666446361370560000f,
-  1.666234282120450100f, 1.666022141607668600f, 1.665809939840015500f,
-    1.665597676825292700f,
-  1.665385352571304500f, 1.665172967085857700f, 1.664960520376761000f,
-    1.664748012451825200f,
-  1.664535443318863900f, 1.664322812985692600f, 1.664110121460129000f,
-    1.663897368749993400f,
-  1.663684554863107800f, 1.663471679807296800f, 1.663258743590387400f,
-    1.663045746220208600f,
-  1.662832687704591800f, 1.662619568051370500f, 1.662406387268380100f,
-    1.662193145363459100f,
-  1.661979842344447600f, 1.661766478219188300f, 1.661553052995526000f,
-    1.661339566681307600f,
-  1.661126019284382200f, 1.660912410812601900f, 1.660698741273819700f,
-    1.660485010675892400f,
-  1.660271219026677700f, 1.660057366334036300f, 1.659843452605831200f,
-    1.659629477849926800f,
-  1.659415442074190900f, 1.659201345286492900f, 1.658987187494704200f,
-    1.658772968706699000f,
-  1.658558688930353400f, 1.658344348173546300f, 1.658129946444157700f,
-    1.657915483750071100f,
-  1.657700960099171200f, 1.657486375499345900f, 1.657271729958484500f,
-    1.657057023484479000f,
-  1.656842256085223800f, 1.656627427768615000f, 1.656412538542551200f,
-    1.656197588414933600f,
-  1.655982577393664700f, 1.655767505486650500f, 1.655552372701798200f,
-    1.655337179047017700f,
-  1.655121924530220900f, 1.654906609159322500f, 1.654691232942238500f,
-    1.654475795886888300f,
-  1.654260298001192200f, 1.654044739293073900f, 1.653829119770458900f,
-    1.653613439441274500f,
-  1.653397698313451300f, 1.653181896394921000f, 1.652966033693617800f,
-    1.652750110217479100f,
-  1.652534125974443000f, 1.652318080972451400f, 1.652101975219447200f,
-    1.651885808723375900f,
-  1.651669581492185300f, 1.651453293533826000f, 1.651236944856249600f,
-    1.651020535467411200f,
-  1.650804065375267400f, 1.650587534587776700f, 1.650370943112901000f,
-    1.650154290958603300f,
-  1.649937578132849400f, 1.649720804643607400f, 1.649503970498847200f,
-    1.649287075706541200f,
-  1.649070120274664000f, 1.648853104211192700f, 1.648636027524106100f,
-    1.648418890221385400f,
-  1.648201692311014300f, 1.647984433800978600f, 1.647767114699266100f,
-    1.647549735013867000f,
-  1.647332294752774200f, 1.647114793923981600f, 1.646897232535486500f,
-    1.646679610595287900f,
-  1.646461928111387300f, 1.646244185091788400f, 1.646026381544496400f,
-    1.645808517477519700f,
-  1.645590592898868600f, 1.645372607816555400f, 1.645154562238594800f,
-    1.644936456173004000f,
-  1.644718289627801600f, 1.644500062611009300f, 1.644281775130650900f,
-    1.644063427194751600f,
-  1.643845018811340300f, 1.643626549988446200f, 1.643408020734102600f,
-    1.643189431056343700f,
-  1.642970780963206800f, 1.642752070462730800f, 1.642533299562957100f,
-    1.642314468271929300f,
-  1.642095576597693200f, 1.641876624548297000f, 1.641657612131790500f,
-    1.641438539356226500f,
-  1.641219406229659700f, 1.641000212760146800f, 1.640780958955747200f,
-    1.640561644824521700f,
-  1.640342270374534500f, 1.640122835613851100f, 1.639903340550539200f,
-    1.639683785192669600f,
-  1.639464169548314100f, 1.639244493625547900f, 1.639024757432447500f,
-    1.638804960977092100f,
-  1.638585104267562800f, 1.638365187311943400f, 1.638145210118319400f,
-    1.637925172694778800f,
-  1.637705075049411800f, 1.637484917190310800f, 1.637264699125570200f,
-    1.637044420863286600f,
-  1.636824082411559600f, 1.636603683778490100f, 1.636383224972181500f,
-    1.636162706000739300f,
-  1.635942126872271800f, 1.635721487594888400f, 1.635500788176702100f,
-    1.635280028625826900f,
-  1.635059208950379700f, 1.634838329158479200f, 1.634617389258246700f,
-    1.634396389257805700f,
-  1.634175329165281400f, 1.633954208988801700f, 1.633733028736496400f,
-    1.633511788416498000f,
-  1.633290488036940500f, 1.633069127605960800f, 1.632847707131697600f,
-    1.632626226622291700f,
-  1.632404686085886300f, 1.632183085530627200f, 1.631961424964661700f,
-    1.631739704396139900f,
-  1.631517923833213400f, 1.631296083284036900f, 1.631074182756766300f,
-    1.630852222259560700f,
-  1.630630201800580900f, 1.630408121387990000f, 1.630185981029953000f,
-    1.629963780734637400f,
-  1.629741520510213000f, 1.629519200364851800f, 1.629296820306727700f,
-    1.629074380344017100f,
-  1.628851880484898200f, 1.628629320737551700f, 1.628406701110161100f,
-    1.628184021610910700f,
-  1.627961282247988300f, 1.627738483029583100f, 1.627515623963887000f,
-    1.627292705059093700f,
-  1.627069726323399500f, 1.626846687765002700f, 1.626623589392103500f,
-    1.626400431212904800f,
-  1.626177213235611400f, 1.625953935468430500f, 1.625730597919571300f,
-    1.625507200597245500f,
-  1.625283743509666300f, 1.625060226665050000f, 1.624836650071614500f,
-    1.624613013737580000f,
-  1.624389317671169500f, 1.624165561880607000f, 1.623941746374119500f,
-    1.623717871159936300f,
-  1.623493936246288300f, 1.623269941641409400f, 1.623045887353534900f,
-    1.622821773390902700f,
-  1.622597599761753000f, 1.622373366474327800f, 1.622149073536871800f,
-    1.621924720957631300f,
-  1.621700308744855200f, 1.621475836906794500f, 1.621251305451702400f,
-    1.621026714387834300f,
-  1.620802063723447700f, 1.620577353466802700f, 1.620352583626160500f,
-    1.620127754209786100f,
-  1.619902865225945300f, 1.619677916682906700f, 1.619452908588941300f,
-    1.619227840952321800f,
-  1.619002713781323200f, 1.618777527084222800f, 1.618552280869300300f,
-    1.618326975144837000f,
-  1.618101609919117200f, 1.617876185200426600f, 1.617650700997053500f,
-    1.617425157317288200f,
-  1.617199554169423500f, 1.616973891561754200f, 1.616748169502577200f,
-    1.616522388000191500f,
-  1.616296547062898500f, 1.616070646699001800f, 1.615844686916807300f,
-    1.615618667724622700f,
-  1.615392589130757900f, 1.615166451143525300f, 1.614940253771239400f,
-    1.614713997022216900f,
-  1.614487680904776600f, 1.614261305427239200f, 1.614034870597928400f,
-    1.613808376425168900f,
-  1.613581822917288900f, 1.613355210082617800f, 1.613128537929487500f,
-    1.612901806466232200f,
-  1.612675015701188000f, 1.612448165642693400f, 1.612221256299089200f,
-    1.611994287678718100f,
-  1.611767259789925100f, 1.611540172641057200f, 1.611313026240463800f,
-    1.611085820596496600f,
-  1.610858555717509200f, 1.610631231611857800f, 1.610403848287899700f,
-    1.610176405753995800f,
-  1.609948904018508200f, 1.609721343089801600f, 1.609493722976242900f,
-    1.609266043686200700f,
-  1.609038305228046400f, 1.608810507610153100f, 1.608582650840896200f,
-    1.608354734928653800f,
-  1.608126759881805400f, 1.607898725708732900f, 1.607670632417820500f,
-    1.607442480017454700f,
-  1.607214268516024000f, 1.606985997921919000f, 1.606757668243532500f,
-    1.606529279489259600f,
-  1.606300831667497600f, 1.606072324786645500f, 1.605843758855105300f,
-    1.605615133881280700f,
-  1.605386449873577300f, 1.605157706840403300f, 1.604928904790168700f,
-    1.604700043731286200f,
-  1.604471123672170500f, 1.604242144621237800f, 1.604013106586907400f,
-    1.603784009577600100f,
-  1.603554853601739700f, 1.603325638667751000f, 1.603096364784061900f,
-    1.602867031959102100f,
-  1.602637640201303400f, 1.602408189519099800f, 1.602178679920927900f,
-    1.601949111415226000f,
-  1.601719484010434300f, 1.601489797714996000f, 1.601260052537355700f,
-    1.601030248485960900f,
-  1.600800385569260300f, 1.600570463795705700f, 1.600340483173750400f,
-    1.600110443711850300f,
-  1.599880345418463100f, 1.599650188302049100f, 1.599419972371070500f,
-    1.599189697633991400f,
-  1.598959364099278700f, 1.598728971775401000f, 1.598498520670828900f,
-    1.598268010794035900f,
-  1.598037442153496900f, 1.597806814757689200f, 1.597576128615092200f,
-    1.597345383734188000f,
-  1.597114580123460100f, 1.596883717791394800f, 1.596652796746479600f,
-    1.596421816997205500f,
-  1.596190778552064800f, 1.595959681419551800f, 1.595728525608163700f,
-    1.595497311126399300f,
-  1.595266037982759500f, 1.595034706185747500f, 1.594803315743869000f,
-    1.594571866665631700f,
-  1.594340358959544800f, 1.594108792634120600f, 1.593877167697873100f,
-    1.593645484159318200f,
-  1.593413742026974500f, 1.593181941309362400f, 1.592950082015004700f,
-    1.592718164152426000f,
-  1.592486187730153300f, 1.592254152756715600f, 1.592022059240644400f,
-    1.591789907190473100f,
-  1.591557696614737100f, 1.591325427521974100f, 1.591093099920724200f,
-    1.590860713819529400f,
-  1.590628269226933600f, 1.590395766151483400f, 1.590163204601727100f,
-    1.589930584586215500f,
-  1.589697906113501000f, 1.589465169192139100f, 1.589232373830686400f,
-    1.588999520037702300f,
-  1.588766607821748200f, 1.588533637191387400f, 1.588300608155185600f,
-    1.588067520721711000f,
-  1.587834374899533400f, 1.587601170697224600f, 1.587367908123358900f,
-    1.587134587186513000f,
-  1.586901207895265300f, 1.586667770258196600f, 1.586434274283889500f,
-    1.586200719980929200f,
-  1.585967107357902700f, 1.585733436423399000f, 1.585499707186010200f,
-    1.585265919654329300f,
-  1.585032073836952100f, 1.584798169742476400f, 1.584564207379502500f,
-    1.584330186756632200f,
-  1.584096107882470000f, 1.583861970765622100f, 1.583627775414697000f,
-    1.583393521838305700f,
-  1.583159210045060900f, 1.582924840043577400f, 1.582690411842472700f,
-    1.582455925450365600f,
-  1.582221380875877800f, 1.581986778127632700f, 1.581752117214255900f,
-    1.581517398144375800f,
-  1.581282620926621300f, 1.581047785569625400f, 1.580812892082021900f,
-    1.580577940472447200f,
-  1.580342930749539800f, 1.580107862921940700f, 1.579872736998292100f,
-    1.579637552987239100f,
-  1.579402310897428900f, 1.579167010737510600f, 1.578931652516135700f,
-    1.578696236241957200f,
-  1.578460761923630800f, 1.578225229569814700f, 1.577989639189168100f,
-    1.577753990790353500f,
-  1.577518284382034800f, 1.577282519972878200f, 1.577046697571552000f,
-    1.576810817186727000f,
-  1.576574878827075700f, 1.576338882501273000f, 1.576102828217995600f,
-    1.575866715985922500f,
-  1.575630545813735200f, 1.575394317710116600f, 1.575158031683752300f,
-    1.574921687743330300f,
-  1.574685285897539800f, 1.574448826155072400f, 1.574212308524622500f,
-    1.573975733014886000f,
-  1.573739099634561500f, 1.573502408392348600f, 1.573265659296950300f,
-    1.573028852357070800f,
-  1.572791987581417100f, 1.572555064978698100f, 1.572318084557624800f,
-    1.572081046326909900f,
-  1.571843950295269000f, 1.571606796471419100f, 1.571369584864080100f,
-    1.571132315481973200f,
-  1.570894988333822400f, 1.570657603428353300f, 1.570420160774294000f,
-    1.570182660380374600f,
-  1.569945102255327200f, 1.569707486407886600f, 1.569469812846788500f,
-    1.569232081580771900f,
-  1.568994292618577400f, 1.568756445968948000f, 1.568518541640628400f,
-    1.568280579642366000f,
-  1.568042559982909500f, 1.567804482671010500f, 1.567566347715422500f,
-    1.567328155124900800f,
-  1.567089904908203200f, 1.566851597074089500f, 1.566613231631321500f,
-    1.566374808588663300f,
-  1.566136327954881000f, 1.565897789738742900f, 1.565659193949019400f,
-    1.565420540594482800f,
-  1.565181829683907700f, 1.564943061226071100f, 1.564704235229751500f,
-    1.564465351703730400f,
-  1.564226410656790000f, 1.563987412097716200f, 1.563748356035296000f,
-    1.563509242478319000f,
-  1.563270071435576500f, 1.563030842915862100f, 1.562791556927971800f,
-    1.562552213480703300f,
-  1.562312812582856500f, 1.562073354243233700f, 1.561833838470639200f,
-    1.561594265273878800f,
-  1.561354634661761300f, 1.561114946643096900f, 1.560875201226698900f,
-    1.560635398421381400f,
-  1.560395538235961800f, 1.560155620679258400f, 1.559915645760092900f,
-    1.559675613487288200f,
-  1.559435523869669500f, 1.559195376916064700f, 1.558955172635302800f,
-    1.558714911036215700f,
-  1.558474592127637100f, 1.558234215918402600f, 1.557993782417350400f,
-    1.557753291633320500f,
-  1.557512743575155000f, 1.557272138251698300f, 1.557031475671796400f,
-    1.556790755844298400f,
-  1.556549978778054300f, 1.556309144481917300f, 1.556068252964741600f,
-    1.555827304235384500f,
-  1.555586298302704900f, 1.555345235175563900f, 1.555104114862824600f,
-    1.554862937373352500f,
-  1.554621702716015000f, 1.554380410899681300f, 1.554139061933223200f,
-    1.553897655825514600f,
-  1.553656192585431100f, 1.553414672221850700f, 1.553173094743653300f,
-    1.552931460159721100f,
-  1.552689768478938500f, 1.552448019710191300f, 1.552206213862368500f,
-    1.551964350944360100f,
-  1.551722430965059000f, 1.551480453933359800f, 1.551238419858159700f,
-    1.550996328748356800f,
-  1.550754180612852900f, 1.550511975460550500f, 1.550269713300355100f,
-    1.550027394141174000f,
-  1.549785017991916400f, 1.549542584861493900f, 1.549300094758820000f,
-    1.549057547692810600f,
-  1.548814943672383300f, 1.548572282706457900f, 1.548329564803956300f,
-    1.548086789973802700f,
-  1.547843958224923000f, 1.547601069566245900f, 1.547358124006701400f,
-    1.547115121555221700f,
-  1.546872062220741700f, 1.546628946012197800f, 1.546385772938528600f,
-    1.546142543008675300f,
-  1.545899256231580300f, 1.545655912616188800f, 1.545412512171447700f,
-    1.545169054906306200f,
-  1.544925540829715600f, 1.544681969950629300f, 1.544438342278002600f,
-    1.544194657820792800f,
-  1.543950916587959700f, 1.543707118588464800f, 1.543463263831272000f,
-    1.543219352325347200f,
-  1.542975384079658300f, 1.542731359103175300f, 1.542487277404870100f,
-    1.542243138993717000f,
-  1.541998943878692300f, 1.541754692068774600f, 1.541510383572944000f,
-    1.541266018400183200f,
-  1.541021596559476700f, 1.540777118059811100f, 1.540532582910175500f,
-    1.540287991119560600f,
-  1.540043342696959100f, 1.539798637651366400f, 1.539553875991779300f,
-    1.539309057727197300f,
-  1.539064182866621400f, 1.538819251419055100f, 1.538574263393503800f,
-    1.538329218798974800f,
-  1.538084117644477900f, 1.537838959939025200f, 1.537593745691629500f,
-    1.537348474911307300f,
-  1.537103147607076200f, 1.536857763787956400f, 1.536612323462969800f,
-    1.536366826641140800f,
-  1.536121273331495300f, 1.535875663543061700f, 1.535629997284870400f,
-    1.535384274565953600f,
-  1.535138495395346400f, 1.534892659782085100f, 1.534646767735208000f,
-    1.534400819263756400f,
-  1.534154814376772700f, 1.533908753083302200f, 1.533662635392391700f,
-    1.533416461313090100f,
-  1.533170230854448400f, 1.532923944025520200f, 1.532677600835360600f,
-    1.532431201293027000f,
-  1.532184745407578500f, 1.531938233188077100f, 1.531691664643585900f,
-    1.531445039783170500f,
-  1.531198358615898800f, 1.530951621150840700f, 1.530704827397067800f,
-    1.530457977363654000f,
-  1.530211071059675200f, 1.529964108494209700f, 1.529717089676337500f,
-    1.529470014615140800f,
-  1.529222883319703700f, 1.528975695799112500f, 1.528728452062455600f,
-    1.528481152118823700f,
-  1.528233795977309400f, 1.527986383647006500f, 1.527738915137012400f,
-    1.527491390456425600f,
-  1.527243809614346600f, 1.526996172619878900f, 1.526748479482126700f,
-    1.526500730210197200f,
-  1.526252924813199500f, 1.526005063300244900f, 1.525757145680446200f,
-    1.525509171962918800f,
-  1.525261142156779900f, 1.525013056271149000f, 1.524764914315147200f,
-    1.524516716297898300f,
-  1.524268462228527900f, 1.524020152116163200f, 1.523771785969934000f,
-    1.523523363798972000f,
-  1.523274885612411200f, 1.523026351419387100f, 1.522777761229038100f,
-    1.522529115050503600f,
-  1.522280412892925900f, 1.522031654765448900f, 1.521782840677218700f,
-    1.521533970637383800f,
-  1.521285044655094300f, 1.521036062739502300f, 1.520787024899762100f,
-    1.520537931145030400f,
-  1.520288781484465700f, 1.520039575927228500f, 1.519790314482481100f,
-    1.519540997159388300f,
-  1.519291623967116600f, 1.519042194914835200f, 1.518792710011714500f,
-    1.518543169266927600f,
-  1.518293572689648900f, 1.518043920289055900f, 1.517794212074327500f,
-    1.517544448054644500f,
-  1.517294628239190400f, 1.517044752637150000f, 1.516794821257710500f,
-    1.516544834110061600f,
-  1.516294791203394200f, 1.516044692546901800f, 1.515794538149779700f,
-    1.515544328021225500f,
-  1.515294062170438700f, 1.515043740606620800f, 1.514793363338975600f,
-    1.514542930376708600f,
-  1.514292441729027300f, 1.514041897405141700f, 1.513791297414263800f,
-    1.513540641765606800f,
-  1.513289930468387300f, 1.513039163531823000f, 1.512788340965133500f,
-    1.512537462777541200f,
-  1.512286528978270300f, 1.512035539576546600f, 1.511784494581598600f,
-    1.511533394002656100f,
-  1.511282237848951400f, 1.511031026129719100f, 1.510779758854195400f,
-    1.510528436031618900f,
-  1.510277057671229400f, 1.510025623782270000f, 1.509774134373984800f,
-    1.509522589455620600f,
-  1.509270989036425800f, 1.509019333125651200f, 1.508767621732549400f,
-    1.508515854866375100f,
-  1.508264032536385000f, 1.508012154751837700f, 1.507760221521994700f,
-    1.507508232856118200f,
-  1.507256188763473200f, 1.507004089253327000f, 1.506751934334948000f,
-    1.506499724017607900f,
-  1.506247458310579400f, 1.505995137223137500f, 1.505742760764559300f,
-    1.505490328944124200f,
-  1.505237841771113200f, 1.504985299254809800f, 1.504732701404498900f,
-    1.504480048229468000f,
-  1.504227339739006500f, 1.503974575942405700f, 1.503721756848958700f,
-    1.503468882467961600f,
-  1.503215952808711500f, 1.502962967880507600f, 1.502709927692651900f,
-    1.502456832254447600f,
-  1.502203681575200700f, 1.501950475664218600f, 1.501697214530810700f,
-    1.501443898184289200f,
-  1.501190526633967600f, 1.500937099889161600f, 1.500683617959188900f,
-    1.500430080853369500f,
-  1.500176488581024900f, 1.499922841151479600f, 1.499669138574058800f,
-    1.499415380858090800f,
-  1.499161568012905300f, 1.498907700047834600f, 1.498653776972212600f,
-    1.498399798795375000f,
-  1.498145765526660300f, 1.497891677175408500f, 1.497637533750961300f,
-    1.497383335262663300f,
-  1.497129081719860400f, 1.496874773131900800f, 1.496620409508134800f,
-    1.496365990857914600f,
-  1.496111517190594300f, 1.495856988515530400f, 1.495602404842080800f,
-    1.495347766179606400f,
-  1.495093072537469100f, 1.494838323925033400f, 1.494583520351665500f,
-    1.494328661826734200f,
-  1.494073748359609600f, 1.493818779959664300f, 1.493563756636272500f,
-    1.493308678398810800f,
-  1.493053545256657800f, 1.492798357219194100f, 1.492543114295801900f,
-    1.492287816495866200f,
-  1.492032463828773200f, 1.491777056303911700f, 1.491521593930672100f,
-    1.491266076718446900f,
-  1.491010504676631500f, 1.490754877814621800f, 1.490499196141816600f,
-    1.490243459667616600f,
-  1.489987668401424800f, 1.489731822352645500f, 1.489475921530685900f,
-    1.489219965944954300f,
-  1.488963955604861500f, 1.488707890519820600f, 1.488451770699245900f,
-    1.488195596152554800f,
-  1.487939366889165600f, 1.487683082918499300f, 1.487426744249978400f,
-    1.487170350893028500f,
-  1.486913902857075700f, 1.486657400151549600f, 1.486400842785880100f,
-    1.486144230769501000f,
-  1.485887564111846500f, 1.485630842822354100f, 1.485374066910462500f,
-    1.485117236385612200f,
-  1.484860351257246500f, 1.484603411534810300f, 1.484346417227750700f,
-    1.484089368345516300f,
-  1.483832264897558400f, 1.483575106893329600f, 1.483317894342285100f,
-    1.483060627253882000f,
-  1.482803305637578900f, 1.482545929502837100f, 1.482288498859119400f,
-    1.482031013715890700f,
-  1.481773474082618300f, 1.481515879968770900f, 1.481258231383819800f,
-    1.481000528337237800f,
-  1.480742770838499900f, 1.480484958897083200f, 1.480227092522466500f,
-    1.479969171724131200f,
-  1.479711196511560100f, 1.479453166894238100f, 1.479195082881652200f,
-    1.478936944483291600f,
-  1.478678751708647000f, 1.478420504567211900f, 1.478162203068481100f,
-    1.477903847221951400f,
-  1.477645437037121900f, 1.477386972523493800f, 1.477128453690569800f,
-    1.476869880547855300f,
-  1.476611253104856700f, 1.476352571371083700f, 1.476093835356046700f,
-    1.475835045069259000f,
-  1.475576200520235500f, 1.475317301718493300f, 1.475058348673551100f,
-    1.474799341394929900f,
-  1.474540279892153000f, 1.474281164174744900f, 1.474021994252233000f,
-    1.473762770134145800f,
-  1.473503491830014300f, 1.473244159349371700f, 1.472984772701752900f,
-    1.472725331896694400f,
-  1.472465836943735600f, 1.472206287852416900f, 1.471946684632281500f,
-    1.471687027292874400f,
-  1.471427315843742100f, 1.471167550294433700f, 1.470907730654499800f,
-    1.470647856933493300f,
-  1.470387929140969200f, 1.470127947286484100f, 1.469867911379596900f,
-    1.469607821429868500f,
-  1.469347677446861500f, 1.469087479440140300f, 1.468827227419272200f,
-    1.468566921393825700f,
-  1.468306561373371900f, 1.468046147367482600f, 1.467785679385733300f,
-    1.467525157437700200f,
-  1.467264581532962100f, 1.467003951681099800f, 1.466743267891695800f,
-    1.466482530174334500f,
-  1.466221738538602500f, 1.465960892994088800f, 1.465699993550383400f,
-    1.465439040217079400f,
-  1.465178033003770700f, 1.464916971920054100f, 1.464655856975527900f,
-    1.464394688179792900f,
-  1.464133465542451200f, 1.463872189073107500f, 1.463610858781367900f,
-    1.463349474676840700f,
-  1.463088036769136600f, 1.462826545067867700f, 1.462564999582648600f,
-    1.462303400323095000f,
-  1.462041747298825900f, 1.461780040519460800f, 1.461518279994622200f,
-    1.461256465733934400f,
-  1.460994597747023600f, 1.460732676043517800f, 1.460470700633046800f,
-    1.460208671525243400f,
-  1.459946588729741100f, 1.459684452256176300f, 1.459422262114186800f,
-    1.459160018313412400f,
-  1.458897720863495500f, 1.458635369774079500f, 1.458372965054810700f,
-    1.458110506715337000f,
-  1.457847994765308200f, 1.457585429214375700f, 1.457322810072193800f,
-    1.457060137348418000f,
-  1.456797411052706200f, 1.456534631194717800f, 1.456271797784114900f,
-    1.456008910830560500f,
-  1.455745970343720800f, 1.455482976333263100f, 1.455219928808857200f,
-    1.454956827780174100f,
-  1.454693673256887600f, 1.454430465248673300f, 1.454167203765208000f,
-    1.453903888816171900f,
-  1.453640520411245900f, 1.453377098560113100f, 1.453113623272459100f,
-    1.452850094557971000f,
-  1.452586512426338000f, 1.452322876887251400f, 1.452059187950404100f,
-    1.451795445625491300f,
-  1.451531649922210200f, 1.451267800850259500f, 1.451003898419340500f,
-    1.450739942639155800f,
-  1.450475933519410400f, 1.450211871069811300f, 1.449947755300067500f,
-    1.449683586219889400f,
-  1.449419363838989800f, 1.449155088167083600f, 1.448890759213887100f,
-    1.448626376989119400f,
-  1.448361941502500900f, 1.448097452763754000f, 1.447832910782603100f,
-    1.447568315568775100f,
-  1.447303667131997900f, 1.447038965482002200f, 1.446774210628520200f,
-    1.446509402581286400f,
-  1.446244541350036700f, 1.445979626944509300f, 1.445714659374444500f,
-    1.445449638649584500f,
-  1.445184564779673500f, 1.444919437774456700f, 1.444654257643682900f,
-    1.444389024397101600f,
-  1.444123738044464900f, 1.443858398595526400f, 1.443593006060042100f,
-    1.443327560447769600f,
-  1.443062061768468400f, 1.442796510031900500f, 1.442530905247829200f,
-    1.442265247426020200f,
-  1.441999536576240800f, 1.441733772708260600f, 1.441467955831850800f,
-    1.441202085956784900f,
-  1.440936163092837900f, 1.440670187249787600f, 1.440404158437412500f,
-    1.440138076665494100f,
-  1.439871941943815300f, 1.439605754282161400f, 1.439339513690319100f,
-    1.439073220178077400f,
-  1.438806873755226900f, 1.438540474431560600f, 1.438274022216873500f,
-    1.438007517120961900f,
-  1.437740959153624500f, 1.437474348324662100f, 1.437207684643876800f,
-    1.436940968121073600f,
-  1.436674198766058500f, 1.436407376588640000f, 1.436140501598628400f,
-    1.435873573805835900f,
-  1.435606593220076600f, 1.435339559851166500f, 1.435072473708924000f,
-    1.434805334803169100f,
-  1.434538143143723200f, 1.434270898740410700f, 1.434003601603057300f,
-    1.433736251741490700f,
-  1.433468849165540500f, 1.433201393885038500f, 1.432933885909818000f,
-    1.432666325249714700f,
-  1.432398711914566200f, 1.432131045914211600f, 1.431863327258492400f,
-    1.431595555957251700f,
-  1.431327732020334800f, 1.431059855457588600f, 1.430791926278862400f,
-    1.430523944494007400f,
-  1.430255910112876000f, 1.429987823145323100f, 1.429719683601205800f,
-    1.429451491490382900f,
-  1.429183246822714800f, 1.428914949608064200f, 1.428646599856295400f,
-    1.428378197577275100f,
-  1.428109742780871800f, 1.427841235476955400f, 1.427572675675398600f,
-    1.427304063386075200f,
-  1.427035398618861500f, 1.426766681383635500f, 1.426497911690277000f,
-    1.426229089548668200f,
-  1.425960214968693000f, 1.425691287960236600f, 1.425422308533187200f,
-    1.425153276697434000f,
-  1.424884192462868800f, 1.424615055839385300f, 1.424345866836878200f,
-    1.424076625465245500f,
-  1.423807331734385800f, 1.423537985654200800f, 1.423268587234593400f,
-    1.422999136485468600f,
-  1.422729633416733200f, 1.422460078038296300f, 1.422190470360068300f,
-    1.421920810391962500f,
-  1.421651098143893000f, 1.421381333625776600f, 1.421111516847531700f,
-    1.420841647819078600f,
-  1.420571726550339700f, 1.420301753051239400f, 1.420031727331703800f,
-    1.419761649401660500f,
-  1.419491519271040000f, 1.419221336949774100f, 1.418951102447796800f,
-    1.418680815775043500f,
-  1.418410476941452100f, 1.418140085956961900f, 1.417869642831514700f,
-    1.417599147575054000f,
-  1.417328600197524900f, 1.417058000708874700f, 1.416787349119052600f,
-    1.416516645438009600f,
-  1.416245889675698900f, 1.415975081842075300f, 1.415704221947095700f,
-    1.415433310000718600f,
-  1.415162346012905000f, 1.414891329993617200f, 1.414620261952819600f,
-    1.414349141900479000f,
-  1.414077969846563500f, 1.413806745801043500f, 1.413535469773890700f,
-    1.413264141775079300f,
-  1.412992761814585400f, 1.412721329902386900f, 1.412449846048463600f,
-    1.412178310262796900f,
-  1.411906722555370500f, 1.411635082936170100f, 1.411363391415182900f,
-    1.411091648002398500f,
-  1.410819852707807700f, 1.410548005541404100f, 1.410276106513182400f,
-    1.410004155633139500f,
-  1.409732152911274500f, 1.409460098357588200f, 1.409187991982083100f,
-    1.408915833794763800f,
-  1.408643623805636800f, 1.408371362024710500f, 1.408099048461995300f,
-    1.407826683127503000f,
-  1.407554266031248100f, 1.407281797183246500f, 1.407009276593515800f,
-    1.406736704272076400f,
-  1.406464080228949600f, 1.406191404474159000f, 1.405918677017730100f,
-    1.405645897869690400f,
-  1.405373067040069300f, 1.405100184538898000f, 1.404827250376209400f,
-    1.404554264562038400f,
-  1.404281227106422400f, 1.404008138019399800f, 1.403734997311011600f,
-    1.403461804991300100f,
-  1.403188561070310100f, 1.402915265558087700f, 1.402641918464681400f,
-    1.402368519800141200f,
-  1.402095069574519800f, 1.401821567797870300f, 1.401548014480249000f,
-    1.401274409631713600f,
-  1.401000753262323900f, 1.400727045382141400f, 1.400453286001229800f,
-    1.400179475129653700f,
-  1.399905612777481200f, 1.399631698954780800f, 1.399357733671623900f,
-    1.399083716938083600f,
-  1.398809648764234100f, 1.398535529160152400f, 1.398261358135917300f,
-    1.397987135701609200f,
-  1.397712861867310300f, 1.397438536643105000f, 1.397164160039079200f,
-    1.396889732065321300f,
-  1.396615252731921100f, 1.396340722048970300f, 1.396066140026562800f,
-    1.395791506674794100f,
-  1.395516822003761700f, 1.395242086023564800f, 1.394967298744304900f,
-    1.394692460176085300f,
-  1.394417570329010700f, 1.394142629213188000f, 1.393867636838725900f,
-    1.393592593215735600f,
-  1.393317498354329300f, 1.393042352264621600f, 1.392767154956728400f,
-    1.392491906440768600f,
-  1.392216606726861800f, 1.391941255825130100f, 1.391665853745697400f,
-    1.391390400498689700f,
-  1.391114896094234100f, 1.390839340542460600f, 1.390563733853500200f,
-    1.390288076037486500f,
-  1.390012367104554600f, 1.389736607064841100f, 1.389460795928485500f,
-    1.389184933705628300f,
-  1.388909020406412100f, 1.388633056040981600f, 1.388357040619483200f,
-    1.388080974152065200f,
-  1.387804856648877600f, 1.387528688120072600f, 1.387252468575804100f,
-    1.386976198026228100f,
-  1.386699876481501900f, 1.386423503951785200f, 1.386147080447239600f,
-    1.385870605978028100f,
-  1.385594080554316100f, 1.385317504186270900f, 1.385040876884061000f,
-    1.384764198657857200f,
-  1.384487469517832200f, 1.384210689474160600f, 1.383933858537019100f,
-    1.383656976716585600f,
-  1.383380044023040400f, 1.383103060466565300f, 1.382826026057344600f,
-    1.382548940805563800f,
-  1.382271804721410600f, 1.381994617815074400f, 1.381717380096746800f,
-    1.381440091576620700f,
-  1.381162752264891500f, 1.380885362171756300f, 1.380607921307413400f,
-    1.380330429682064000f,
-  1.380052887305910400f, 1.379775294189157000f, 1.379497650342010400f,
-    1.379219955774678700f,
-  1.378942210497371600f, 1.378664414520301500f, 1.378386567853681700f,
-    1.378108670507728300f,
-  1.377830722492658500f, 1.377552723818691500f, 1.377274674496048700f,
-    1.376996574534953300f,
-  1.376718423945630000f, 1.376440222738305700f, 1.376161970923209400f,
-    1.375883668510570900f,
-  1.375605315510623200f, 1.375326911933600200f, 1.375048457789738400f,
-    1.374769953089275400f,
-  1.374491397842451100f, 1.374212792059507100f, 1.373934135750687100f,
-    1.373655428926236400f,
-  1.373376671596402400f, 1.373097863771434200f, 1.372819005461582500f,
-    1.372540096677100200f,
-  1.372261137428242300f, 1.371982127725264800f, 1.371703067578426700f,
-    1.371423956997988000f,
-  1.371144795994210500f, 1.370865584577358300f, 1.370586322757697500f,
-    1.370307010545495500f,
-  1.370027647951022100f, 1.369748234984548000f, 1.369468771656347200f,
-    1.369189257976694200f,
-  1.368909693955866000f, 1.368630079604142000f, 1.368350414931802000f,
-    1.368070699949128800f,
-  1.367790934666406600f, 1.367511119093921800f, 1.367231253241962200f,
-    1.366951337120818000f,
-  1.366671370740780500f, 1.366391354112143500f, 1.366111287245202400f,
-    1.365831170150254300f,
-  1.365551002837598600f, 1.365270785317536100f, 1.364990517600369400f,
-    1.364710199696403300f,
-  1.364429831615944200f, 1.364149413369300600f, 1.363868944966782900f,
-    1.363588426418702600f,
-  1.363307857735373900f, 1.363027238927112300f, 1.362746570004235400f,
-    1.362465850977062900f,
-  1.362185081855915600f, 1.361904262651116900f, 1.361623393372991300f,
-    1.361342474031866000f,
-  1.361061504638069400f, 1.360780485201932300f, 1.360499415733786400f,
-    1.360218296243966200f,
-  1.359937126742807300f, 1.359655907240648000f, 1.359374637747827700f,
-    1.359093318274687800f,
-  1.358811948831571500f, 1.358530529428824400f, 1.358249060076792900f,
-    1.357967540785826300f,
-  1.357685971566275200f, 1.357404352428492000f, 1.357122683382830900f,
-    1.356840964439648200f,
-  1.356559195609301700f, 1.356277376902151900f, 1.355995508328559500f,
-    1.355713589898888800f,
-  1.355431621623504700f, 1.355149603512774400f, 1.354867535577067200f,
-    1.354585417826753800f,
-  1.354303250272206500f, 1.354021032923800300f, 1.353738765791911100f,
-    1.353456448886917200f,
-  1.353174082219199100f, 1.352891665799137900f, 1.352609199637117500f,
-    1.352326683743523300f,
-  1.352044118128742600f, 1.351761502803164900f, 1.351478837777180700f,
-    1.351196123061183100f,
-  1.350913358665566400f, 1.350630544600727200f, 1.350347680877063800f,
-    1.350064767504976400f,
-  1.349781804494866600f, 1.349498791857138400f, 1.349215729602197400f,
-    1.348932617740450600f,
-  1.348649456282307700f, 1.348366245238179500f, 1.348082984618478800f,
-    1.347799674433620500f,
-  1.347516314694020800f, 1.347232905410098200f, 1.346949446592273100f,
-    1.346665938250967100f,
-  1.346382380396604000f, 1.346098773039609700f, 1.345815116190411300f,
-    1.345531409859438200f,
-  1.345247654057121700f, 1.344963848793894200f, 1.344679994080190800f,
-    1.344396089926448000f,
-  1.344112136343103900f, 1.343828133340598800f, 1.343544080929374800f,
-    1.343259979119875600f,
-  1.342975827922546600f, 1.342691627347835500f, 1.342407377406191500f,
-    1.342123078108065700f,
-  1.341838729463910900f, 1.341554331484181600f, 1.341269884179334700f,
-    1.340985387559828100f,
-  1.340700841636122400f, 1.340416246418678800f, 1.340131601917961900f,
-    1.339846908144436600f,
-  1.339562165108570700f, 1.339277372820833400f, 1.338992531291695500f,
-    1.338707640531629800f,
-  1.338422700551110900f, 1.338137711360615200f, 1.337852672970621300f,
-    1.337567585391608900f,
-  1.337282448634059800f, 1.336997262708457900f, 1.336712027625288600f,
-    1.336426743395039000f,
-  1.336141410028198500f, 1.335856027535258000f, 1.335570595926709700f,
-    1.335285115213048500f,
-  1.334999585404770700f, 1.334714006512374400f, 1.334428378546359500f,
-    1.334142701517227600f,
-  1.333856975435482300f, 1.333571200311629100f, 1.333285376156174700f,
-    1.332999502979628700f,
-  1.332713580792501500f, 1.332427609605305400f, 1.332141589428554900f,
-    1.331855520272766200f,
-  1.331569402148457400f, 1.331283235066148100f, 1.330997019036359800f,
-    1.330710754069615700f,
-  1.330424440176441300f, 1.330138077367363200f, 1.329851665652910500f,
-    1.329565205043613800f,
-  1.329278695550004700f, 1.328992137182618100f, 1.328705529951989400f,
-    1.328418873868656900f,
-  1.328132168943159800f, 1.327845415186039000f, 1.327558612607838500f,
-    1.327271761219102500f,
-  1.326984861030378000f, 1.326697912052213500f, 1.326410914295159400f,
-    1.326123867769767500f,
-  1.325836772486591800f, 1.325549628456188100f, 1.325262435689113600f,
-    1.324975194195928000f,
-  1.324687903987191900f, 1.324400565073468300f, 1.324113177465321900f,
-    1.323825741173318700f,
-  1.323538256208027800f, 1.323250722580018500f, 1.322963140299862500f,
-    1.322675509378133900f,
-  1.322387829825407700f, 1.322100101652261100f, 1.321812324869273500f,
-    1.321524499487024800f,
-  1.321236625516098100f, 1.320948702967077400f, 1.320660731850549000f,
-    1.320372712177100700f,
-  1.320084643957322400f, 1.319796527201805300f, 1.319508361921142500f,
-    1.319220148125929100f,
-  1.318931885826762000f, 1.318643575034239800f, 1.318355215758962900f,
-    1.318066808011533200f,
-  1.317778351802554800f, 1.317489847142633300f, 1.317201294042376300f,
-    1.316912692512393300f,
-  1.316624042563294900f, 1.316335344205694200f, 1.316046597450205800f,
-    1.315757802307445900f,
-  1.315468958788033000f, 1.315180066902586800f, 1.314891126661728900f,
-    1.314602138076083300f,
-  1.314313101156274800f, 1.314024015912930600f, 1.313734882356679900f,
-    1.313445700498152800f,
-  1.313156470347981900f, 1.312867191916801100f, 1.312577865215246900f,
-    1.312288490253956900f,
-  1.311999067043570200f, 1.311709595594728000f, 1.311420075918073900f,
-    1.311130508024252400f,
-  1.310840891923910100f, 1.310551227627695400f, 1.310261515146258200f,
-    1.309971754490250700f,
-  1.309681945670326400f, 1.309392088697140900f, 1.309102183581351200f,
-    1.308812230333616500f,
-  1.308522228964597500f, 1.308232179484956500f, 1.307942081905358000f,
-    1.307651936236467800f,
-  1.307361742488954300f, 1.307071500673486800f, 1.306781210800736200f,
-    1.306490872881376200f,
-  1.306200486926081700f, 1.305910052945529200f, 1.305619570950396800f,
-    1.305329040951365100f,
-  1.305038462959116100f, 1.304747836984333300f, 1.304457163037702200f,
-    1.304166441129910300f,
-  1.303875671271646400f, 1.303584853473601200f, 1.303293987746467300f,
-    1.303003074100939100f,
-  1.302712112547712800f, 1.302421103097485900f, 1.302130045760958100f,
-    1.301838940548830600f,
-  1.301547787471806900f, 1.301256586540591600f, 1.300965337765891600f,
-    1.300674041158414800f,
-  1.300382696728871400f, 1.300091304487973800f, 1.299799864446435200f,
-    1.299508376614971500f,
-  1.299216841004299200f, 1.298925257625137800f, 1.298633626488207500f,
-    1.298341947604231300f,
-  1.298050220983932900f, 1.297758446638038700f, 1.297466624577275900f,
-    1.297174754812374400f,
-  1.296882837354065100f, 1.296590872213081200f, 1.296298859400157700f,
-    1.296006798926030200f,
-  1.295714690801437600f, 1.295422535037119800f, 1.295130331643818500f,
-    1.294838080632277000f,
-  1.294545782013240900f, 1.294253435797456900f, 1.293961041995673700f,
-    1.293668600618642000f,
-  1.293376111677113900f, 1.293083575181843500f, 1.292790991143586200f,
-    1.292498359573099700f,
-  1.292205680481143500f, 1.291912953878477900f, 1.291620179775866400f,
-    1.291327358184073200f,
-  1.291034489113864100f, 1.290741572576007400f, 1.290448608581273000f,
-    1.290155597140431700f,
-  1.289862538264257700f, 1.289569431963524900f, 1.289276278249010600f,
-    1.288983077131493000f,
-  1.288689828621752300f, 1.288396532730570400f, 1.288103189468731400f,
-    1.287809798847019800f,
-  1.287516360876223500f, 1.287222875567130900f, 1.286929342930532800f,
-    1.286635762977221800f,
-  1.286342135717991600f, 1.286048461163638000f, 1.285754739324958900f,
-    1.285460970212753500f,
-  1.285167153837822900f, 1.284873290210969900f, 1.284579379342998700f,
-    1.284285421244715900f,
-  1.283991415926929400f, 1.283697363400448900f, 1.283403263676086100f,
-    1.283109116764654000f,
-  1.282814922676967400f, 1.282520681423843000f, 1.282226393016099500f,
-    1.281932057464557000f,
-  1.281637674780037100f, 1.281343244973363700f, 1.281048768055361900f,
-    1.280754244036858900f,
-  1.280459672928683500f, 1.280165054741666300f, 1.279870389486639400f,
-    1.279575677174437100f,
-  1.279280917815894600f, 1.278986111421849900f, 1.278691258003142000f,
-    1.278396357570611900f,
-  1.278101410135101800f, 1.277806415707456700f, 1.277511374298522200f,
-    1.277216285919146500f,
-  1.276921150580179200f, 1.276625968292471000f, 1.276330739066875400f,
-    1.276035462914247000f,
-  1.275740139845442400f, 1.275444769871319600f, 1.275149353002738700f,
-    1.274853889250561200f,
-  1.274558378625650200f, 1.274262821138871300f, 1.273967216801090900f,
-    1.273671565623178100f,
-  1.273375867616002300f, 1.273080122790436000f, 1.272784331157352800f,
-    1.272488492727628100f,
-  1.272192607512139300f, 1.271896675521764900f, 1.271600696767385400f,
-    1.271304671259883200f,
-  1.271008599010142500f, 1.270712480029048800f, 1.270416314327489800f,
-    1.270120101916354600f,
-  1.269823842806533800f, 1.269527537008920300f, 1.269231184534408200f,
-    1.268934785393893700f,
-  1.268638339598274500f, 1.268341847158450200f, 1.268045308085321800f,
-    1.267748722389792100f,
-  1.267452090082765900f, 1.267155411175149500f, 1.266858685677851000f,
-    1.266561913601780100f,
-  1.266265094957848000f, 1.265968229756968100f, 1.265671318010055400f,
-    1.265374359728026500f,
-  1.265077354921799300f, 1.264780303602294200f, 1.264483205780432700f,
-    1.264186061467138500f,
-  1.263888870673336400f, 1.263591633409954000f, 1.263294349687918800f,
-    1.262997019518161700f,
-  1.262699642911614600f, 1.262402219879211300f, 1.262104750431887000f,
-    1.261807234580578900f,
-  1.261509672336225600f, 1.261212063709767900f, 1.260914408712147800f,
-    1.260616707354309500f,
-  1.260318959647198400f, 1.260021165601761900f, 1.259723325228949000f,
-    1.259425438539710300f,
-  1.259127505544998600f, 1.258829526255768000f, 1.258531500682973800f,
-    1.258233428837574300f,
-  1.257935310730528000f, 1.257637146372796400f, 1.257338935775342200f,
-    1.257040678949129500f,
-  1.256742375905124400f, 1.256444026654294400f, 1.256145631207609400f,
-    1.255847189576040100f,
-  1.255548701770560000f, 1.255250167802143000f, 1.254951587681765600f,
-    1.254652961420405600f,
-  1.254354289029042900f, 1.254055570518658500f, 1.253756805900235700f,
-    1.253457995184759300f,
-  1.253159138383215200f, 1.252860235506592100f, 1.252561286565879300f,
-    1.252262291572068900f,
-  1.251963250536153500f, 1.251664163469128300f, 1.251365030381989700f,
-    1.251065851285736200f,
-  1.250766626191367500f, 1.250467355109885500f, 1.250168038052293500f,
-    1.249868675029596200f,
-  1.249569266052800800f, 1.249269811132915200f, 1.248970310280950200f,
-    1.248670763507917100f,
-  1.248371170824829300f, 1.248071532242702100f, 1.247771847772552300f,
-    1.247472117425398700f,
-  1.247172341212261500f, 1.246872519144162300f, 1.246572651232124700f,
-    1.246272737487174300f,
-  1.245972777920338000f, 1.245672772542644400f, 1.245372721365123600f,
-    1.245072624398807900f,
-  1.244772481654731000f, 1.244472293143928300f, 1.244172058877436800f,
-    1.243871778866295400f,
-  1.243571453121544000f, 1.243271081654225400f, 1.242970664475383100f,
-    1.242670201596062700f,
-  1.242369693027311200f, 1.242069138780177400f, 1.241768538865712000f,
-    1.241467893294967200f,
-  1.241167202078996800f, 1.240866465228856100f, 1.240565682755603100f,
-    1.240264854670295900f,
-  1.239963980983995300f, 1.239663061707763700f, 1.239362096852665300f,
-    1.239061086429765300f,
-  1.238760030450130900f, 1.238458928924831600f, 1.238157781864937400f,
-    1.237856589281521000f,
-  1.237555351185656500f, 1.237254067588419400f, 1.236952738500886900f,
-    1.236651363934138300f,
-  1.236349943899254000f, 1.236048478407316500f, 1.235746967469409900f,
-    1.235445411096619500f,
-  1.235143809300033300f, 1.234842162090739700f, 1.234540469479829900f,
-    1.234238731478396000f,
-  1.233936948097532400f, 1.233635119348334400f, 1.233333245241899200f,
-    1.233031325789326400f,
-  1.232729361001716500f, 1.232427350890172000f, 1.232125295465796600f,
-    1.231823194739696300f,
-  1.231521048722978200f, 1.231218857426751700f, 1.230916620862127400f,
-    1.230614339040217800f,
-  1.230312011972136500f, 1.230009639668999500f, 1.229707222141924100f,
-    1.229404759402029400f,
-  1.229102251460436400f, 1.228799698328266700f, 1.228497100016644900f,
-    1.228194456536696500f,
-  1.227891767899548700f, 1.227589034116330700f, 1.227286255198173100f,
-    1.226983431156208200f,
-  1.226680562001569900f, 1.226377647745394000f, 1.226074688398817600f,
-    1.225771683972980200f,
-  1.225468634479021500f, 1.225165539928084300f, 1.224862400331312400f,
-    1.224559215699851500f,
-  1.224255986044848500f, 1.223952711377453100f, 1.223649391708814700f,
-    1.223346027050086400f,
-  1.223042617412421600f, 1.222739162806975900f, 1.222435663244906700f,
-    1.222132118737372400f,
-  1.221828529295533800f, 1.221524894930552800f, 1.221221215653593100f,
-    1.220917491475820500f,
-  1.220613722408401900f, 1.220309908462505800f, 1.220006049649302800f,
-    1.219702145979964600f,
-  1.219398197465665400f, 1.219094204117580300f, 1.218790165946886100f,
-    1.218486082964761500f,
-  1.218181955182386500f, 1.217877782610943700f, 1.217573565261616000f,
-    1.217269303145589000f,
-  1.216964996274049400f, 1.216660644658185600f, 1.216356248309187600f,
-    1.216051807238247800f,
-  1.215747321456559300f, 1.215442790975316700f, 1.215138215805717300f,
-    1.214833595958959300f,
-  1.214528931446242600f, 1.214224222278769100f, 1.213919468467741900f,
-    1.213614670024366000f,
-  1.213309826959847700f, 1.213004939285395400f, 1.212700007012219100f,
-    1.212395030151530300f,
-  1.212090008714541600f, 1.211784942712468300f, 1.211479832156526800f,
-    1.211174677057934800f,
-  1.210869477427912300f, 1.210564233277680500f, 1.210258944618462200f,
-    1.209953611461482200f,
-  1.209648233817966600f, 1.209342811699143600f, 1.209037345116242400f,
-    1.208731834080493800f,
-  1.208426278603131200f, 1.208120678695388600f, 1.207815034368502100f,
-    1.207509345633709600f,
-  1.207203612502250300f, 1.206897834985365000f, 1.206592013094296200f,
-    1.206286146840288300f,
-  1.205980236234587100f, 1.205674281288440000f, 1.205368282013096200f,
-    1.205062238419806200f,
-  1.204756150519822300f, 1.204450018324398900f, 1.204143841844791200f,
-    1.203837621092256800f,
-  1.203531356078054100f, 1.203225046813444000f, 1.202918693309688300f,
-    1.202612295578050900f,
-  1.202305853629797500f, 1.201999367476194400f, 1.201692837128510700f,
-    1.201386262598016500f,
-  1.201079643895983700f, 1.200772981033685800f, 1.200466274022397900f,
-    1.200159522873396800f,
-  1.199852727597960700f, 1.199545888207369700f, 1.199239004712905300f,
-    1.198932077125851100f,
-  1.198625105457491700f, 1.198318089719113200f, 1.198011029922004400f,
-    1.197703926077454200f,
-  1.197396778196754700f, 1.197089586291198500f, 1.196782350372080300f,
-    1.196475070450696100f,
-  1.196167746538343600f, 1.195860378646322700f, 1.195552966785933900f,
-    1.195245510968480300f,
-  1.194938011205265900f, 1.194630467507596500f, 1.194322879886780000f,
-    1.194015248354125100f,
-  1.193707572920943000f, 1.193399853598545500f, 1.193092090398246900f,
-    1.192784283331362700f,
-  1.192476432409210100f, 1.192168537643107900f, 1.191860599044376500f,
-    1.191552616624337800f,
-  1.191244590394315400f, 1.190936520365635000f, 1.190628406549622900f,
-    1.190320248957608100f,
-  1.190012047600920200f, 1.189703802490891000f, 1.189395513638853900f,
-    1.189087181056143900f,
-  1.188778804754097300f, 1.188470384744052100f, 1.188161921037348400f,
-    1.187853413645327100f,
-  1.187544862579331500f, 1.187236267850706000f, 1.186927629470796900f,
-    1.186618947450951600f,
-  1.186310221802519900f, 1.186001452536852300f, 1.185692639665301600f,
-    1.185383783199222000f,
-  1.185074883149969100f, 1.184765939528900500f, 1.184456952347374900f,
-    1.184147921616753200f,
-  1.183838847348397400f, 1.183529729553671500f, 1.183220568243940300f,
-    1.182911363430571200f,
-  1.182602115124932900f, 1.182292823338395100f, 1.181983488082330300f,
-    1.181674109368111300f,
-  1.181364687207113100f, 1.181055221610712400f, 1.180745712590287400f,
-    1.180436160157217800f,
-  1.180126564322885100f, 1.179816925098671900f, 1.179507242495962900f,
-    1.179197516526144600f,
-  1.178887747200604300f, 1.178577934530731700f, 1.178268078527917200f,
-    1.177958179203553800f,
-  1.177648236569035300f, 1.177338250635757700f, 1.177028221415118200f,
-    1.176718148918515700f,
-  1.176408033157350300f, 1.176097874143024600f, 1.175787671886942000f,
-    1.175477426400507700f,
-  1.175167137695128900f, 1.174856805782213500f, 1.174546430673171900f,
-    1.174236012379415600f,
-  1.173925550912357800f, 1.173615046283413200f, 1.173304498503998400f,
-    1.172993907585530900f,
-  1.172683273539430800f, 1.172372596377118800f, 1.172061876110017700f,
-    1.171751112749551900f,
-  1.171440306307147200f, 1.171129456794231200f, 1.170818564222232800f,
-    1.170507628602582800f,
-  1.170196649946713100f, 1.169885628266057900f, 1.169574563572052300f,
-    1.169263455876133200f,
-  1.168952305189739200f, 1.168641111524310700f, 1.168329874891289400f,
-    1.168018595302118000f,
-  1.167707272768241800f, 1.167395907301107100f, 1.167084498912162300f,
-    1.166773047612856400f,
-  1.166461553414641000f, 1.166150016328968600f, 1.165838436367293800f,
-    1.165526813541072100f,
-  1.165215147861761400f, 1.164903439340820900f, 1.164591687989710500f,
-    1.164279893819892800f,
-  1.163968056842831700f, 1.163656177069992500f, 1.163344254512841800f,
-    1.163032289182848800f,
-  1.162720281091483000f, 1.162408230250216100f, 1.162096136670521600f,
-    1.161784000363874000f,
-  1.161471821341749900f, 1.161159599615627000f, 1.160847335196984800f,
-    1.160535028097304600f,
-  1.160222678328068700f, 1.159910285900761700f, 1.159597850826869200f,
-    1.159285373117878500f,
-  1.158972852785278500f, 1.158660289840559800f, 1.158347684295214300f,
-    1.158035036160735900f,
-  1.157722345448619400f, 1.157409612170361600f, 1.157096836337461000f,
-    1.156784017961417500f,
-  1.156471157053732300f, 1.156158253625908700f, 1.155845307689450800f,
-    1.155532319255865300f,
-  1.155219288336659400f, 1.154906214943342700f, 1.154593099087426000f,
-    1.154279940780421400f,
-  1.153966740033842900f, 1.153653496859206000f, 1.153340211268028000f,
-    1.153026883271827300f,
-  1.152713512882124400f, 1.152400100110440700f, 1.152086644968299400f,
-    1.151773147467225300f,
-  1.151459607618745300f, 1.151146025434387000f, 1.150832400925680100f,
-    1.150518734104155400f,
-  1.150205024981345800f, 1.149891273568785400f, 1.149577479878009800f,
-    1.149263643920556800f,
-  1.148949765707964600f, 1.148635845251773800f, 1.148321882563526400f,
-    1.148007877654766200f,
-  1.147693830537038100f, 1.147379741221888500f, 1.147065609720865600f,
-    1.146751436045519300f,
-  1.146437220207400700f, 1.146122962218062600f, 1.145808662089060000f,
-    1.145494319831947800f,
-  1.145179935458284100f, 1.144865508979627800f, 1.144551040407539400f,
-    1.144236529753581000f,
-  1.143921977029316500f, 1.143607382246310600f, 1.143292745416130600f,
-    1.142978066550344400f,
-  1.142663345660522000f, 1.142348582758234900f, 1.142033777855056000f,
-    1.141718930962559500f,
-  1.141404042092321500f, 1.141089111255919800f, 1.140774138464933700f,
-    1.140459123730943200f,
-  1.140144067065530700f, 1.139828968480280300f, 1.139513827986776900f,
-    1.139198645596607400f,
-  1.138883421321360600f, 1.138568155172625700f, 1.138252847161994400f,
-    1.137937497301059600f,
-  1.137622105601416000f, 1.137306672074659900f, 1.136991196732388200f,
-    1.136675679586200500f,
-  1.136360120647697200f, 1.136044519928480800f, 1.135728877440154800f,
-    1.135413193194324800f,
-  1.135097467202597100f, 1.134781699476580300f, 1.134465890027884300f,
-    1.134150038868120500f,
-  1.133834146008902100f, 1.133518211461843200f, 1.133202235238559800f,
-    1.132886217350669500f,
-  1.132570157809791500f, 1.132254056627546300f, 1.131937913815556300f,
-    1.131621729385444900f,
-  1.131305503348837300f, 1.130989235717360100f, 1.130672926502642100f,
-    1.130356575716312500f,
-  1.130040183370002900f, 1.129723749475346000f, 1.129407274043976200f,
-    1.129090757087529500f,
-  1.128774198617643200f, 1.128457598645956600f, 1.128140957184109700f,
-    1.127824274243744500f,
-  1.127507549836505000f, 1.127190783974035800f, 1.126873976667983800f,
-    1.126557127929996800f,
-  1.126240237771724700f, 1.125923306204818400f, 1.125606333240930700f,
-    1.125289318891715900f,
-  1.124972263168829500f, 1.124655166083928800f, 1.124338027648672500f,
-    1.124020847874721100f,
-  1.123703626773736100f, 1.123386364357381200f, 1.123069060637320600f,
-    1.122751715625221400f,
-  1.122434329332750800f, 1.122116901771578400f, 1.121799432953375600f,
-    1.121481922889814300f,
-  1.121164371592568300f, 1.120846779073313400f, 1.120529145343726500f,
-    1.120211470415486200f,
-  1.119893754300272300f, 1.119575997009766300f, 1.119258198555651300f,
-    1.118940358949611900f,
-  1.118622478203333800f, 1.118304556328505200f, 1.117986593336814700f,
-    1.117668589239953200f,
-  1.117350544049612300f, 1.117032457777486200f, 1.116714330435269600f,
-    1.116396162034659600f,
-  1.116077952587353600f, 1.115759702105052000f, 1.115441410599455500f,
-    1.115123078082267000f,
-  1.114804704565190500f, 1.114486290059931900f, 1.114167834578198200f,
-    1.113849338131698300f,
-  1.113530800732142100f, 1.113212222391241500f, 1.112893603120710000f,
-    1.112574942932261600f,
-  1.112256241837613000f, 1.111937499848481900f, 1.111618716976587700f,
-    1.111299893233650600f,
-  1.110981028631393700f, 1.110662123181539900f, 1.110343176895814500f,
-    1.110024189785944900f,
-  1.109705161863658600f, 1.109386093140686000f, 1.109066983628758100f,
-    1.108747833339607200f,
-  1.108428642284968100f, 1.108109410476576300f, 1.107790137926169200f,
-    1.107470824645485600f,
-  1.107151470646265300f, 1.106832075940250600f, 1.106512640539184100f,
-    1.106193164454811100f,
-  1.105873647698877300f, 1.105554090283131100f, 1.105234492219321100f,
-    1.104914853519198400f,
-  1.104595174194514800f, 1.104275454257024300f, 1.103955693718482200f,
-    1.103635892590644900f,
-  1.103316050885270600f, 1.102996168614119000f, 1.102676245788951400f,
-    1.102356282421530300f,
-  1.102036278523620000f, 1.101716234106985700f, 1.101396149183395000f,
-    1.101076023764616400f,
-  1.100755857862419700f, 1.100435651488577100f, 1.100115404654861100f,
-    1.099795117373046200f,
-  1.099474789654909100f, 1.099154421512226600f, 1.098834012956778200f,
-    1.098513564000344300f,
-  1.098193074654706800f, 1.097872544931649100f, 1.097551974842956500f,
-    1.097231364400415000f,
-  1.096910713615813200f, 1.096590022500939700f, 1.096269291067585700f,
-    1.095948519327543800f,
-  1.095627707292607700f, 1.095306854974572800f, 1.094985962385235800f,
-    1.094665029536395100f,
-  1.094344056439850600f, 1.094023043107403200f, 1.093701989550856000f,
-    1.093380895782013000f,
-  1.093059761812680100f, 1.092738587654664300f, 1.092417373319774200f,
-    1.092096118819820200f,
-  1.091774824166613600f, 1.091453489371968100f, 1.091132114447697300f,
-    1.090810699405617900f,
-  1.090489244257547300f, 1.090167749015304300f, 1.089846213690709900f,
-    1.089524638295585400f,
-  1.089203022841754400f, 1.088881367341041800f, 1.088559671805274100f,
-    1.088237936246279100f,
-  1.087916160675885800f, 1.087594345105925300f, 1.087272489548229700f,
-    1.086950594014632700f,
-  1.086628658516969500f, 1.086306683067076900f, 1.085984667676792600f,
-    1.085662612357956500f,
-  1.085340517122409800f, 1.085018381981994500f, 1.084696206948555300f,
-    1.084373992033937000f,
-  1.084051737249986900f, 1.083729442608553300f, 1.083407108121486000f,
-    1.083084733800636200f,
-  1.082762319657857100f, 1.082439865705002500f, 1.082117371953928300f,
-    1.081794838416491700f,
-  1.081472265104551200f, 1.081149652029967000f, 1.080826999204601100f,
-    1.080504306640315500f,
-  1.080181574348975500f, 1.079858802342446900f, 1.079535990632596800f,
-    1.079213139231294500f,
-  1.078890248150409700f, 1.078567317401815100f, 1.078244346997383300f,
-    1.077921336948988600f,
-  1.077598287268508400f, 1.077275197967819000f, 1.076952069058800400f,
-    1.076628900553332700f,
-  1.076305692463297900f, 1.075982444800579700f, 1.075659157577062200f,
-    1.075335830804633000f,
-  1.075012464495178800f, 1.074689058660589700f, 1.074365613312755900f,
-    1.074042128463569500f,
-  1.073718604124924500f, 1.073395040308715400f, 1.073071437026839500f,
-    1.072747794291194300f,
-  1.072424112113678600f, 1.072100390506194500f, 1.071776629480643500f,
-    1.071452829048929800f,
-  1.071128989222958500f, 1.070805110014635900f, 1.070481191435870500f,
-    1.070157233498571600f,
-  1.069833236214650800f, 1.069509199596019800f, 1.069185123654592600f,
-    1.068861008402285200f,
-  1.068536853851013600f, 1.068212660012696700f, 1.067888426899253500f,
-    1.067564154522606000f,
-  1.067239842894676100f, 1.066915492027387600f, 1.066591101932666800f,
-    1.066266672622439700f,
-  1.065942204108635300f, 1.065617696403183400f, 1.065293149518014500f,
-    1.064968563465062100f,
-  1.064643938256259400f, 1.064319273903543000f, 1.063994570418849400f,
-    1.063669827814116300f,
-  1.063345046101285000f, 1.063020225292295300f, 1.062695365399091200f,
-    1.062370466433616400f,
-  1.062045528407815900f, 1.061720551333637600f, 1.061395535223029500f,
-    1.061070480087941800f,
-  1.060745385940325500f, 1.060420252792134000f, 1.060095080655320900f,
-    1.059769869541841800f,
-  1.059444619463654400f, 1.059119330432716700f, 1.058794002460989000f,
-    1.058468635560432500f,
-  1.058143229743009600f, 1.057817785020685100f, 1.057492301405424500f,
-    1.057166778909195000f,
-  1.056841217543965200f, 1.056515617321704500f, 1.056189978254385100f,
-    1.055864300353978900f,
-  1.055538583632461100f, 1.055212828101807200f, 1.054887033773993300f,
-    1.054561200660999200f,
-  1.054235328774803900f, 1.053909418127389400f, 1.053583468730738200f,
-    1.053257480596834700f,
-  1.052931453737664600f, 1.052605388165214700f, 1.052279283891473600f,
-    1.051953140928431100f,
-  1.051626959288079100f, 1.051300738982409800f, 1.050974480023417500f,
-    1.050648182423098000f,
-  1.050321846193448000f, 1.049995471346466300f, 1.049669057894152800f,
-    1.049342605848508200f,
-  1.049016115221536000f, 1.048689586025239700f, 1.048363018271625300f,
-    1.048036411972699500f,
-  1.047709767140470500f, 1.047383083786948700f, 1.047056361924144400f,
-    1.046729601564071200f,
-  1.046402802718742400f, 1.046075965400174300f, 1.045749089620383200f,
-    1.045422175391386800f,
-  1.045095222725206200f, 1.044768231633861100f, 1.044441202129375200f,
-    1.044114134223771900f,
-  1.043787027929076000f, 1.043459883257315400f, 1.043132700220517300f,
-    1.042805478830712200f,
-  1.042478219099930400f, 1.042150921040204200f, 1.041823584663568200f,
-    1.041496209982056600f,
-  1.041168797007707000f, 1.040841345752557200f, 1.040513856228645800f,
-    1.040186328448014800f,
-  1.039858762422705600f, 1.039531158164762400f, 1.039203515686230000f,
-    1.038875834999155100f,
-  1.038548116115585800f, 1.038220359047570500f, 1.037892563807160800f,
-    1.037564730406408200f,
-  1.037236858857366600f, 1.036908949172090900f, 1.036581001362636600f,
-    1.036253015441062700f,
-  1.035924991419427100f, 1.035596929309791300f, 1.035268829124216700f,
-    1.034940690874766300f,
-  1.034612514573505700f, 1.034284300232500000f, 1.033956047863817500f,
-    1.033627757479526700f,
-  1.033299429091697700f, 1.032971062712402700f, 1.032642658353714300f,
-    1.032314216027707700f,
-  1.031985735746457900f, 1.031657217522042900f, 1.031328661366541300f,
-    1.031000067292032300f,
-  1.030671435310598600f, 1.030342765434322200f, 1.030014057675287900f,
-    1.029685312045581100f,
-  1.029356528557288300f, 1.029027707222499100f, 1.028698848053302100f,
-    1.028369951061789600f,
-  1.028041016260053500f, 1.027712043660187600f, 1.027383033274288400f,
-    1.027053985114451100f,
-  1.026724899192775300f, 1.026395775521359500f, 1.026066614112305600f,
-    1.025737414977715200f,
-  1.025408178129692000f, 1.025078903580341600f, 1.024749591341769700f,
-    1.024420241426085200f,
-  1.024090853845396800f, 1.023761428611814600f, 1.023431965737451800f,
-    1.023102465234420700f,
-  1.022772927114837100f, 1.022443351390816400f, 1.022113738074476300f,
-    1.021784087177936000f,
-  1.021454398713315600f, 1.021124672692737000f, 1.020794909128323000f,
-    1.020465108032198300f,
-  1.020135269416488700f, 1.019805393293321100f, 1.019475479674824900f,
-    1.019145528573129000f,
-  1.018815540000365800f, 1.018485513968667500f, 1.018155450490168000f,
-    1.017825349577003300f,
-  1.017495211241309800f, 1.017165035495226400f, 1.016834822350892300f,
-    1.016504571820448000f,
-  1.016174283916036800f, 1.015843958649801600f, 1.015513596033888400f,
-    1.015183196080442900f,
-  1.014852758801613200f, 1.014522284209548900f, 1.014191772316400000f,
-    1.013861223134318900f,
-  1.013530636675459100f, 1.013200012951974700f, 1.012869351976022300f,
-    1.012538653759758900f,
-  1.012207918315344300f, 1.011877145654937400f, 1.011546335790700600f,
-    1.011215488734796800f,
-  1.010884604499389800f, 1.010553683096645900f, 1.010222724538731600f,
-    1.009891728837815700f,
-  1.009560696006067900f, 1.009229626055658800f, 1.008898518998761800f,
-    1.008567374847549900f,
-  1.008236193614199000f, 1.007904975310885300f, 1.007573719949786700f,
-    1.007242427543082900f,
-  1.006911098102953900f, 1.006579731641582500f, 1.006248328171152100f,
-    1.005916887703846500f,
-  1.005585410251852700f, 1.005253895827357800f, 1.004922344442551000f,
-    1.004590756109621900f,
-  1.004259130840762700f, 1.003927468648166100f, 1.003595769544025900f,
-    1.003264033540538500f,
-  1.002932260649900000f, 1.002600450884309800f, 1.002268604255967200f,
-    1.001936720777072400f,
-  1.001604800459829000f, 1.001272843316440000f, 1.000940849359111000f,
-    1.000608818600048100f,
-  1.000276751051459200f, 0.999944646725553720f, 0.999612505634541740f,
-    0.999280327790635690f,
-  0.998948113206048590f, 0.998615861892994560f, 0.998283573863690270f,
-    0.997951249130352380f,
-  0.997618887705200020f, 0.997286489600452630f, 0.996954054828332210f,
-    0.996621583401061110f,
-  0.996289075330862860f, 0.995956530629963810f, 0.995623949310589620f,
-    0.995291331384969390f,
-  0.994958676865332010f, 0.994625985763907820f, 0.994293258092929790f,
-    0.993960493864630480f,
-  0.993627693091245660f, 0.993294855785010760f, 0.992961981958163210f,
-    0.992629071622942340f,
-  0.992296124791587690f, 0.991963141476341460f, 0.991630121689446090f,
-    0.991297065443145440f,
-  0.990963972749685840f, 0.990630843621313260f, 0.990297678070276800f,
-    0.989964476108825210f,
-  0.989631237749210020f, 0.989297963003683330f, 0.988964651884498000f,
-    0.988631304403909890f,
-  0.988297920574174430f, 0.987964500407549910f, 0.987631043916294970f,
-    0.987297551112669370f,
-  0.986964022008935520f, 0.986630456617355380f, 0.986296854950194260f,
-    0.985963217019717120f,
-  0.985629542838190490f, 0.985295832417883540f, 0.984962085771065030f,
-    0.984628302910006580f,
-  0.984294483846980150f, 0.983960628594258810f, 0.983626737164118190f,
-    0.983292809568833910f,
-  0.982958845820684270f, 0.982624845931947320f, 0.982290809914904140f,
-    0.981956737781835790f,
-  0.981622629545024770f, 0.981288485216756160f, 0.980954304809314670f,
-    0.980620088334987930f,
-  0.980285835806063770f, 0.979951547234831130f, 0.979617222633581860f,
-    0.979282862014607240f,
-  0.978948465390201530f, 0.978614032772659240f, 0.978279564174275860f,
-    0.977945059607349900f,
-  0.977610519084179290f, 0.977275942617064740f, 0.976941330218307540f,
-    0.976606681900209830f,
-  0.976271997675076550f, 0.975937277555212310f, 0.975602521552924600f,
-    0.975267729680520560f,
-  0.974932901950310350f, 0.974598038374604350f, 0.974263138965714040f,
-    0.973928203735953460f,
-  0.973593232697636530f, 0.973258225863079970f, 0.972923183244600480f,
-    0.972588104854516410f,
-  0.972252990705148370f, 0.971917840808816710f, 0.971582655177844700f,
-    0.971247433824555920f,
-  0.970912176761274950f, 0.970576884000329040f, 0.970241555554045230f,
-    0.969906191434753320f,
-  0.969570791654783330f, 0.969235356226466500f, 0.968899885162136650f,
-    0.968564378474127350f,
-  0.968228836174775060f, 0.967893258276415700f, 0.967557644791388500f,
-    0.967221995732032490f,
-  0.966886311110688230f, 0.966550590939698640f, 0.966214835231406500f,
-    0.965879043998157160f,
-  0.965543217252296420f, 0.965207355006171270f, 0.964871457272131190f,
-    0.964535524062525410f,
-  0.964199555389706030f, 0.963863551266025300f, 0.963527511703836660f,
-    0.963191436715496120f,
-  0.962855326313359350f, 0.962519180509785130f, 0.962182999317132030f,
-    0.961846782747760140f,
-  0.961510530814032040f, 0.961174243528309820f, 0.960837920902958720f,
-    0.960501562950343390f,
-  0.960165169682831830f, 0.959828741112791590f, 0.959492277252591900f,
-    0.959155778114604400f,
-  0.958819243711200310f, 0.958482674054753960f, 0.958146069157639560f,
-    0.957809429032232760f,
-  0.957472753690911670f, 0.957136043146054050f, 0.956799297410040440f,
-    0.956462516495251940f,
-  0.956125700414070300f, 0.955788849178880300f, 0.955451962802066120f,
-    0.955115041296014880f,
-  0.954778084673113870f, 0.954441092945751630f, 0.954104066126319150f,
-    0.953767004227207060f,
-  0.953429907260809120f, 0.953092775239518630f, 0.952755608175731570f,
-    0.952418406081844360f,
-  0.952081168970254520f, 0.951743896853362140f, 0.951406589743566950f,
-    0.951069247653271500f,
-  0.950731870594878510f, 0.950394458580791970f, 0.950057011623418380f,
-    0.949719529735163940f,
-  0.949382012928437600f, 0.949044461215648560f, 0.948706874609207220f,
-    0.948369253121526420f,
-  0.948031596765018910f, 0.947693905552099870f, 0.947356179495185020f,
-    0.947018418606691230f,
-  0.946680622899037650f, 0.946342792384643360f, 0.946004927075930090f,
-    0.945667026985319680f,
-  0.945329092125236190f, 0.944991122508104350f, 0.944653118146349890f,
-    0.944315079052401090f,
-  0.943977005238685770f, 0.943638896717634900f, 0.943300753501679190f,
-    0.942962575603250920f,
-  0.942624363034784580f, 0.942286115808714690f, 0.941947833937478270f,
-    0.941609517433512730f,
-  0.941271166309256450f, 0.940932780577150460f, 0.940594360249635500f,
-    0.940255905339155150f,
-  0.939917415858152920f, 0.939578891819073720f, 0.939240333234364950f,
-    0.938901740116473540f,
-  0.938563112477849630f, 0.938224450330942590f, 0.937885753688204820f,
-    0.937547022562088990f,
-  0.937208256965048840f, 0.936869456909540490f, 0.936530622408019990f,
-    0.936191753472946030f,
-  0.935852850116777430f, 0.935513912351974450f, 0.935174940190999560f,
-    0.934835933646314900f,
-  0.934496892730385720f, 0.934157817455677160f, 0.933818707834655590f,
-    0.933479563879790030f,
-  0.933140385603548840f, 0.932801173018403480f, 0.932461926136825660f,
-    0.932122644971287830f,
-  0.931783329534265240f, 0.931443979838232900f, 0.931104595895668410f,
-    0.930765177719049210f,
-  0.930425725320855430f, 0.930086238713567440f, 0.929746717909666790f,
-    0.929407162921637610f,
-  0.929067573761963250f, 0.928727950443130500f, 0.928388292977625930f,
-    0.928048601377937210f,
-  0.927708875656554800f, 0.927369115825968480f, 0.927029321898671270f,
-    0.926689493887155820f,
-  0.926349631803916270f, 0.926009735661449170f, 0.925669805472250860f,
-    0.925329841248820340f,
-  0.924989843003656610f, 0.924649810749260110f, 0.924309744498133750f,
-    0.923969644262779830f,
-  0.923629510055703820f, 0.923289341889410480f, 0.922949139776407800f,
-    0.922608903729203570f,
-  0.922268633760306990f, 0.921928329882229390f, 0.921587992107482210f,
-    0.921247620448579440f,
-  0.920907214918035070f, 0.920566775528364410f, 0.920226302292085460f,
-    0.919885795221715540f,
-  0.919545254329774850f, 0.919204679628783720f, 0.918864071131263780f,
-    0.918523428849739030f,
-  0.918182752796733110f, 0.917842042984772340f, 0.917501299426383480f,
-    0.917160522134094160f,
-  0.916819711120434700f, 0.916478866397934850f, 0.916137987979127270f,
-    0.915797075876544350f,
-  0.915456130102721200f, 0.915115150670193110f, 0.914774137591496510f,
-    0.914433090879170130f,
-  0.914092010545752620f, 0.913750896603785280f, 0.913409749065809520f,
-    0.913068567944367970f,
-  0.912727353252005710f, 0.912386105001267270f, 0.912044823204700370f,
-    0.911703507874852440f,
-  0.911362159024272310f, 0.911020776665511290f, 0.910679360811120000f,
-    0.910337911473652390f,
-  0.909996428665661990f, 0.909654912399703860f, 0.909313362688335290f,
-    0.908971779544113350f,
-  0.908630162979597760f, 0.908288513007348140f, 0.907946829639926790f,
-    0.907605112889895870f,
-  0.907263362769819000f, 0.906921579292262250f, 0.906579762469791110f,
-    0.906237912314974080f,
-  0.905896028840379560f, 0.905554112058577170f, 0.905212161982139160f,
-    0.904870178623637170f,
-  0.904528161995645670f, 0.904186112110739510f, 0.903844028981494190f,
-    0.903501912620488070f,
-  0.903159763040298880f, 0.902817580253507450f, 0.902475364272694370f,
-    0.902133115110441470f,
-  0.901790832779333250f, 0.901448517291953520f, 0.901106168660889110f,
-    0.900763786898726380f,
-  0.900421372018054500f, 0.900078924031462610f, 0.899736442951541320f,
-    0.899393928790883420f,
-  0.899051381562081310f, 0.898708801277730340f, 0.898366187950425780f,
-    0.898023541592764210f,
-  0.897680862217344440f, 0.897338149836764960f, 0.896995404463627350f,
-    0.896652626110532870f,
-  0.896309814790084090f, 0.895966970514885940f, 0.895624093297543110f,
-    0.895281183150662960f,
-  0.894938240086852970f, 0.894595264118721810f, 0.894252255258880410f,
-    0.893909213519939460f,
-  0.893566138914512420f, 0.893223031455212530f, 0.892879891154655380f,
-    0.892536718025457090f,
-  0.892193512080234670f, 0.891850273331607600f, 0.891507001792195000f,
-    0.891163697474618880f,
-  0.890820360391500920f, 0.890476990555464480f, 0.890133587979135000f,
-    0.889790152675137610f,
-  0.889446684656100330f, 0.889103183934650930f, 0.888759650523418650f,
-    0.888416084435035060f,
-  0.888072485682131150f, 0.887728854277341050f, 0.887385190233298650f,
-    0.887041493562639060f,
-  0.886697764277999840f, 0.886354002392018110f, 0.886010207917333760f,
-    0.885666380866586560f,
-  0.885322521252418610f, 0.884978629087472270f, 0.884634704384391180f,
-    0.884290747155821230f,
-  0.883946757414407980f, 0.883602735172799640f, 0.883258680443644530f,
-    0.882914593239592320f,
-  0.882570473573294660f, 0.882226321457403320f, 0.881882136904572400f,
-    0.881537919927456340f,
-  0.881193670538710450f, 0.880849388750992610f, 0.880505074576960370f,
-    0.880160728029273920f,
-  0.879816349120593590f, 0.879471937863580690f, 0.879127494270899090f,
-    0.878783018355212220f,
-  0.878438510129186170f, 0.878093969605486800f, 0.877749396796782770f,
-    0.877404791715742370f,
-  0.877060154375035710f, 0.876715484787334630f, 0.876370782965310900f,
-    0.876026048921639160f,
-  0.875681282668993700f, 0.875336484220050390f, 0.874991653587487090f,
-    0.874646790783981660f,
-  0.874301895822214290f, 0.873956968714865500f, 0.873612009474616810f,
-    0.873267018114152300f,
-  0.872921994646155390f, 0.872576939083312460f, 0.872231851438309840f,
-    0.871886731723835020f,
-  0.871541579952577750f, 0.871196396137227660f, 0.870851180290476810f,
-    0.870505932425017060f,
-  0.870160652553543020f, 0.869815340688749220f, 0.869469996843331370f,
-    0.869124621029987670f,
-  0.868779213261415610f, 0.868433773550315810f, 0.868088301909388680f,
-    0.867742798351335720f,
-  0.867397262888861100f, 0.867051695534668210f, 0.866706096301463340f,
-    0.866360465201952980f,
-  0.866014802248844420f, 0.865669107454847490f, 0.865323380832671800f,
-    0.864977622395029290f,
-  0.864631832154632240f, 0.864286010124194040f, 0.863940156316430170f,
-    0.863594270744056040f,
-  0.863248353419789670f, 0.862902404356348570f, 0.862556423566453230f,
-    0.862210411062823810f,
-  0.861864366858181910f, 0.861518290965251340f, 0.861172183396755500f,
-    0.860826044165420630f,
-  0.860479873283972910f, 0.860133670765139580f, 0.859787436621650360f,
-    0.859441170866234390f,
-  0.859094873511623840f, 0.858748544570550610f, 0.858402184055747750f,
-    0.858055791979950740f,
-  0.857709368355894840f, 0.857362913196317630f, 0.857016426513956930f,
-    0.856669908321551650f,
-  0.856323358631843170f, 0.855976777457572280f, 0.855630164811482460f,
-    0.855283520706317080f,
-  0.854936845154821930f, 0.854590138169742830f, 0.854243399763827020f,
-    0.853896629949823630f,
-  0.853549828740481690f, 0.853202996148552880f, 0.852856132186788910f,
-    0.852509236867942440f,
-  0.852162310204768740f, 0.851815352210022470f, 0.851468362896461110f,
-    0.851121342276842110f,
-  0.850774290363923820f, 0.850427207170467380f, 0.850080092709233130f,
-    0.849732946992984290f,
-  0.849385770034483680f, 0.849038561846496730f, 0.848691322441788910f,
-    0.848344051833126780f,
-  0.847996750033279350f, 0.847649417055015060f, 0.847302052911105160f,
-    0.846954657614320980f,
-  0.846607231177434640f, 0.846259773613221020f, 0.845912284934454140f,
-    0.845564765153910990f,
-  0.845217214284368690f, 0.844869632338605130f, 0.844522019329400630f,
-    0.844174375269535320f,
-  0.843826700171791620f, 0.843478994048952440f, 0.843131256913801420f,
-    0.842783488779124570f,
-  0.842435689657707650f, 0.842087859562339000f, 0.841739998505806610f,
-    0.841392106500900900f,
-  0.841044183560412770f, 0.840696229697133760f, 0.840348244923857960f,
-    0.840000229253379030f,
-  0.839652182698493290f, 0.839304105271996950f, 0.838955996986687550f,
-    0.838607857855364740f,
-  0.838259687890827830f, 0.837911487105878820f, 0.837563255513319780f,
-    0.837214993125953600f,
-  0.836866699956585690f, 0.836518376018021260f, 0.836170021323067610f,
-    0.835821635884532730f,
-  0.835473219715225040f, 0.835124772827955830f, 0.834776295235535540f,
-    0.834427786950777460f,
-  0.834079247986494690f, 0.833730678355502630f, 0.833382078070616820f,
-    0.833033447144653880f,
-  0.832684785590432690f, 0.832336093420771970f, 0.831987370648492710f,
-    0.831638617286416190f,
-  0.831289833347364620f, 0.830941018844162600f, 0.830592173789634240f,
-    0.830243298196606360f,
-  0.829894392077905720f, 0.829545455446360270f, 0.829196488314800080f,
-    0.828847490696055010f,
-  0.828498462602957340f, 0.828149404048339590f, 0.827800315045035150f,
-    0.827451195605879990f,
-  0.827102045743709160f, 0.826752865471360950f, 0.826403654801672770f,
-    0.826054413747485010f,
-  0.825705142321637720f, 0.825355840536972420f, 0.825006508406332490f,
-    0.824657145942561230f,
-  0.824307753158504460f, 0.823958330067008030f, 0.823608876680918760f,
-    0.823259393013085820f,
-  0.822909879076357930f, 0.822560334883586490f, 0.822210760447622980f,
-    0.821861155781319800f,
-  0.821511520897531660f, 0.821161855809112830f, 0.820812160528920360f,
-    0.820462435069811090f,
-  0.820112679444643060f, 0.819762893666276530f, 0.819413077747571440f,
-    0.819063231701390170f,
-  0.818713355540594880f, 0.818363449278050270f, 0.818013512926620940f,
-    0.817663546499172720f,
-  0.817313550008573640f, 0.816963523467691410f, 0.816613466889396070f,
-    0.816263380286557980f,
-  0.815913263672048310f, 0.815563117058740630f, 0.815212940459508210f,
-    0.814862733887226740f,
-  0.814512497354771830f, 0.814162230875020380f, 0.813811934460851430f,
-    0.813461608125143560f,
-  0.813111251880778150f, 0.812760865740636440f, 0.812410449717600570f,
-    0.812060003824555230f,
-  0.811709528074384460f, 0.811359022479975040f, 0.811008487054213360f,
-    0.810657921809988410f,
-  0.810307326760189020f, 0.809956701917705080f, 0.809606047295428950f,
-    0.809255362906252440f,
-  0.808904648763069890f, 0.808553904878775760f, 0.808203131266265420f,
-    0.807852327938436750f,
-  0.807501494908186900f, 0.807150632188415760f, 0.806799739792023240f,
-    0.806448817731910130f,
-  0.806097866020979660f, 0.805746884672134620f, 0.805395873698280360f,
-    0.805044833112322000f,
-  0.804693762927166100f, 0.804342663155721230f, 0.803991533810895500f,
-    0.803640374905599810f,
-  0.803289186452744390f, 0.802937968465242240f, 0.802586720956006250f,
-    0.802235443937950320f,
-  0.801884137423990890f, 0.801532801427043530f, 0.801181435960026780f,
-    0.800830041035858750f,
-  0.800478616667459010f, 0.800127162867749210f, 0.799775679649650460f,
-    0.799424167026086540f,
-  0.799072625009981330f, 0.798721053614259490f, 0.798369452851848020f,
-    0.798017822735673680f,
-  0.797666163278665570f, 0.797314474493752810f, 0.796962756393865600f,
-    0.796611008991936490f,
-  0.796259232300897350f, 0.795907426333682830f, 0.795555591103226930f,
-    0.795203726622466520f,
-  0.794851832904338360f, 0.794499909961779990f, 0.794147957807731400f,
-    0.793795976455132220f,
-  0.793443965916924570f, 0.793091926206050400f, 0.792739857335452710f,
-    0.792387759318077150f,
-  0.792035632166868230f, 0.791683475894773720f, 0.791331290514740830f,
-    0.790979076039718180f,
-  0.790626832482656310f, 0.790274559856505520f, 0.789922258174218570f,
-    0.789569927448748320f,
-  0.789217567693048520f, 0.788865178920075130f, 0.788512761142783790f,
-    0.788160314374132590f,
-  0.787807838627079260f, 0.787455333914584220f, 0.787102800249607550f,
-    0.786750237645110430f,
-  0.786397646114056490f, 0.786045025669408700f, 0.785692376324132690f,
-    0.785339698091194080f,
-  0.784986990983559170f, 0.784634255014197040f, 0.784281490196075850f,
-    0.783928696542166680f,
-  0.783575874065440270f, 0.783223022778868350f, 0.782870142695425320f,
-    0.782517233828084580f,
-  0.782164296189822530f, 0.781811329793615120f, 0.781458334652439630f,
-    0.781105310779275470f,
-  0.780752258187101480f, 0.780399176888899150f, 0.780046066897649550f,
-    0.779692928226336290f,
-  0.779339760887942880f, 0.778986564895453810f, 0.778633340261856040f,
-    0.778280087000135730f,
-  0.777926805123281830f, 0.777573494644283050f, 0.777220155576129220f,
-    0.776866787931812410f,
-  0.776513391724324210f, 0.776159966966658680f, 0.775806513671809860f,
-    0.775453031852772920f,
-  0.775099521522545020f, 0.774745982694123090f, 0.774392415380506400f,
-    0.774038819594694230f,
-  0.773685195349686940f, 0.773331542658487140f, 0.772977861534096640f,
-    0.772624151989520280f,
-  0.772270414037761980f, 0.771916647691828660f, 0.771562852964726710f,
-    0.771209029869463940f,
-  0.770855178419050050f, 0.770501298626494410f, 0.770147390504808960f,
-    0.769793454067005500f,
-  0.769439489326096850f, 0.769085496295098040f, 0.768731474987023660f,
-    0.768377425414890850f,
-  0.768023347591716640f, 0.767669241530518850f, 0.767315107244318060f,
-    0.766960944746133740f,
-  0.766606754048988260f, 0.766252535165903970f, 0.765898288109903900f,
-    0.765544012894013530f,
-  0.765189709531257760f, 0.764835378034664170f, 0.764481018417259680f,
-    0.764126630692073870f,
-  0.763772214872136200f, 0.763417770970477140f, 0.763063299000129260f,
-    0.762708798974124800f,
-  0.762354270905498450f, 0.761999714807284790f, 0.761645130692519490f,
-    0.761290518574240350f,
-  0.760935878465484720f, 0.760581210379292380f, 0.760226514328703140f,
-    0.759871790326757670f,
-  0.759517038386499090f, 0.759162258520969860f, 0.758807450743214760f,
-    0.758452615066278920f,
-  0.758097751503208020f, 0.757742860067050380f, 0.757387940770853360f,
-    0.757032993627667290f,
-  0.756678018650541630f, 0.756323015852528700f, 0.755967985246680520f,
-    0.755612926846050080f,
-  0.755257840663692730f, 0.754902726712663120f, 0.754547585006018600f,
-    0.754192415556816380f,
-  0.753837218378114460f, 0.753481993482973400f, 0.753126740884452970f,
-    0.752771460595615500f,
-  0.752416152629523330f, 0.752060816999239660f, 0.751705453717829930f,
-    0.751350062798359140f,
-  0.750994644253894730f, 0.750639198097504010f, 0.750283724342255320f,
-    0.749928223001219310f,
-  0.749572694087465850f, 0.749217137614067500f, 0.748861553594096340f,
-    0.748505942040627040f,
-  0.748150302966733790f, 0.747794636385492150f, 0.747438942309979870f,
-    0.747083220753273820f,
-  0.746727471728453770f, 0.746371695248599140f, 0.746015891326790470f,
-    0.745660059976110400f,
-  0.745304201209641030f, 0.744948315040467210f, 0.744592401481673270f,
-    0.744236460546344850f,
-  0.743880492247569580f, 0.743524496598434670f, 0.743168473612029980f,
-    0.742812423301444810f,
-  0.742456345679769810f, 0.742100240760097840f, 0.741744108555520860f,
-    0.741387949079133860f,
-  0.741031762344030790f, 0.740675548363308620f, 0.740319307150063780f,
-    0.739963038717393880f,
-  0.739606743078398690f, 0.739250420246177380f, 0.738894070233831800f,
-    0.738537693054463370f,
-  0.738181288721174830f, 0.737824857247070810f, 0.737468398645255490f,
-    0.737111912928835710f,
-  0.736755400110918000f, 0.736398860204609870f, 0.736042293223021060f,
-    0.735685699179260850f,
-  0.735329078086440880f, 0.734972429957672760f, 0.734615754806068890f,
-    0.734259052644744230f,
-  0.733902323486812610f, 0.733545567345390890f, 0.733188784233595240f,
-    0.732831974164544150f,
-  0.732475137151356370f, 0.732118273207151170f, 0.731761382345050280f,
-    0.731404464578174760f,
-  0.731047519919648340f, 0.730690548382594280f, 0.730333549980137110f,
-    0.729976524725403530f,
-  0.729619472631519270f, 0.729262393711613280f, 0.728905287978813600f,
-    0.728548155446249730f,
-  0.728190996127053180f, 0.727833810034354990f, 0.727476597181288540f,
-    0.727119357580987220f,
-  0.726762091246585200f, 0.726404798191218950f, 0.726047478428024420f,
-    0.725690131970139980f,
-  0.725332758830703360f, 0.724975359022855150f, 0.724617932559735390f,
-    0.724260479454485130f,
-  0.723902999720247850f, 0.723545493370166160f, 0.723187960417385530f,
-    0.722830400875050790f,
-  0.722472814756308090f, 0.722115202074305680f, 0.721757562842191060f,
-    0.721399897073114470f,
-  0.721042204780225960f, 0.720684485976676230f, 0.720326740675618530f,
-    0.719968968890205230f,
-  0.719611170633591480f, 0.719253345918932090f, 0.718895494759382860f,
-    0.718537617168101610f,
-  0.718179713158245800f, 0.717821782742975370f, 0.717463825935449550f,
-    0.717105842748830160f,
-  0.716747833196278770f, 0.716389797290958090f, 0.716031735046032900f,
-    0.715673646474667140f,
-  0.715315531590027700f, 0.714957390405280950f, 0.714599222933594240f,
-    0.714241029188137260f,
-  0.713882809182079030f, 0.713524562928591010f, 0.713166290440844450f,
-    0.712807991732011590f,
-  0.712449666815266890f, 0.712091315703784260f, 0.711732938410739810f,
-    0.711374534949309800f,
-  0.711016105332671340f, 0.710657649574003460f, 0.710299167686484930f,
-    0.709940659683296890f,
-  0.709582125577619790f, 0.709223565382636760f, 0.708864979111530680f,
-    0.708506366777485130f,
-  0.708147728393686340f, 0.707789063973319310f, 0.707430373529572170f,
-    0.707071657075632460f,
-  0.706712914624688770f, 0.706354146189931750f, 0.705995351784551530f,
-    0.705636531421740880f,
-  0.705277685114692020f, 0.704918812876598410f, 0.704559914720655490f,
-    0.704200990660058150f,
-  0.703842040708003820f, 0.703483064877689630f, 0.703124063182313690f,
-    0.702765035635076310f,
-  0.702405982249177160f, 0.702046903037818250f, 0.701687798014201110f,
-    0.701328667191529980f,
-  0.700969510583008600f, 0.700610328201841660f, 0.700251120061236020f,
-    0.699891886174398130f,
-  0.699532626554536630f, 0.699173341214860190f, 0.698814030168578240f,
-    0.698454693428902320f,
-  0.698095331009043640f, 0.697735942922215520f, 0.697376529181631400f,
-    0.697017089800505250f,
-  0.696657624792053730f, 0.696298134169492380f, 0.695938617946039510f,
-    0.695579076134912990f,
-  0.695219508749331800f, 0.694859915802517050f, 0.694500297307689140f,
-    0.694140653278070950f,
-  0.693780983726884790f, 0.693421288667355530f, 0.693061568112707690f,
-    0.692701822076166820f,
-  0.692342050570960430f, 0.691982253610315510f, 0.691622431207461700f,
-    0.691262583375628180f,
-  0.690902710128045050f, 0.690542811477944610f, 0.690182887438558710f,
-    0.689822938023121220f,
-  0.689462963244866330f, 0.689102963117028790f, 0.688742937652845550f,
-    0.688382886865552930f,
-  0.688022810768389670f, 0.687662709374594510f, 0.687302582697406850f,
-    0.686942430750068330f,
-  0.686582253545819920f, 0.686222051097905130f, 0.685861823419566700f,
-    0.685501570524050140f,
-  0.685141292424600310f, 0.684780989134463280f, 0.684420660666887120f,
-    0.684060307035119440f,
-  0.683699928252410110f, 0.683339524332008840f, 0.682979095287166160f,
-    0.682618641131135020f,
-  0.682258161877167370f, 0.681897657538517720f, 0.681537128128440470f,
-    0.681176573660190910f,
-  0.680815994147026320f, 0.680455389602203310f, 0.680094760038981280f,
-    0.679734105470619080f,
-  0.679373425910376310f, 0.679012721371515250f, 0.678651991867297080f,
-    0.678291237410985510f,
-  0.677930458015843620f, 0.677569653695137220f, 0.677208824462131490f,
-    0.676847970330092700f,
-  0.676487091312289350f, 0.676126187421989040f, 0.675765258672461950f,
-    0.675404305076978020f,
-  0.675043326648808170f, 0.674682323401225250f, 0.674321295347501510f,
-    0.673960242500911690f,
-  0.673599164874730370f, 0.673238062482232950f, 0.672876935336696900f,
-    0.672515783451398950f,
-  0.672154606839618470f, 0.671793405514634180f, 0.671432179489727110f,
-    0.671070928778178090f,
-  0.670709653393269050f, 0.670348353348283690f, 0.669987028656505170f,
-    0.669625679331219300f,
-  0.669264305385711360f, 0.668902906833267590f, 0.668541483687176590f,
-    0.668180035960725840f,
-  0.667818563667205600f, 0.667457066819905800f, 0.667095545432117240f,
-    0.666733999517132860f,
-  0.666372429088244790f, 0.666010834158747840f, 0.665649214741936390f,
-    0.665287570851105680f,
-  0.664925902499553190f, 0.664564209700575500f, 0.664202492467472090f,
-    0.663840750813541210f,
-  0.663478984752084110f, 0.663117194296401260f, 0.662755379459794350f,
-    0.662393540255567070f,
-  0.662031676697022450f, 0.661669788797465960f, 0.661307876570202740f,
-    0.660945940028538900f,
-  0.660583979185782600f, 0.660221994055241400f, 0.659859984650225110f,
-    0.659497950984043510f,
-  0.659135893070007080f, 0.658773810921428500f, 0.658411704551619570f,
-    0.658049573973894850f,
-  0.657687419201568260f, 0.657325240247955020f, 0.656963037126372160f,
-    0.656600809850135910f,
-  0.656238558432565400f, 0.655876282886978410f, 0.655513983226695960f,
-    0.655151659465038060f,
-  0.654789311615326050f, 0.654426939690883280f, 0.654064543705032310f,
-    0.653702123671098150f,
-  0.653339679602405470f, 0.652977211512280050f, 0.652614719414049580f,
-    0.652252203321041060f,
-  0.651889663246583930f, 0.651527099204007310f, 0.651164511206641320f,
-    0.650801899267818060f,
-  0.650439263400868990f, 0.650076603619127890f, 0.649713919935928420f,
-    0.649351212364604910f,
-  0.648988480918494040f, 0.648625725610931460f, 0.648262946455255510f,
-    0.647900143464803730f,
-  0.647537316652916140f, 0.647174466032932490f, 0.646811591618193350f,
-    0.646448693422041360f,
-  0.646085771457818310f, 0.645722825738868860f, 0.645359856278536980f,
-    0.644996863090167570f,
-  0.644633846187107620f, 0.644270805582703550f, 0.643907741290304040f,
-    0.643544653323257610f,
-  0.643181541694913480f, 0.642818406418622980f, 0.642455247507736860f,
-    0.642092064975608220f,
-  0.641728858835589830f, 0.641365629101035340f, 0.641002375785300500f,
-    0.640639098901740200f,
-  0.640275798463712080f, 0.639912474484572560f, 0.639549126977681070f,
-    0.639185755956396480f,
-  0.638822361434078330f, 0.638458943424088490f, 0.638095501939787920f,
-    0.637732036994540290f,
-  0.637368548601708660f, 0.637005036774657030f, 0.636641501526751590f,
-    0.636277942871357530f,
-  0.635914360821842830f, 0.635550755391574910f, 0.635187126593922070f,
-    0.634823474442254840f,
-  0.634459798949942640f, 0.634096100130357660f, 0.633732377996871770f,
-    0.633368632562857470f,
-  0.633004863841689520f, 0.632641071846741790f, 0.632277256591390780f,
-    0.631913418089012020f,
-  0.631549556352983710f, 0.631185671396683470f, 0.630821763233490040f,
-    0.630457831876783950f,
-  0.630093877339945260f, 0.629729899636356280f, 0.629365898779399080f,
-    0.629001874782456500f,
-  0.628637827658913300f, 0.628273757422153860f, 0.627909664085564810f,
-    0.627545547662532230f,
-  0.627181408166443410f, 0.626817245610687520f, 0.626453060008652860f,
-    0.626088851373730380f,
-  0.625724619719310480f, 0.625360365058784670f, 0.624996087405546350f,
-    0.624631786772988030f,
-  0.624267463174504880f, 0.623903116623491180f, 0.623538747133343780f,
-    0.623174354717459190f,
-  0.622809939389234460f, 0.622445501162069090f, 0.622081040049361490f,
-    0.621716556064512820f,
-  0.621352049220923570f, 0.620987519531995270f, 0.620622967011131400f,
-    0.620258391671734690f,
-  0.619893793527210410f, 0.619529172590963410f, 0.619164528876399280f,
-    0.618799862396925750f,
-  0.618435173165949760f, 0.618070461196880800f, 0.617705726503127720f,
-    0.617340969098100430f,
-  0.616976188995210780f, 0.616611386207870040f, 0.616246560749491690f,
-    0.615881712633488340f,
-  0.615516841873275490f, 0.615151948482267840f, 0.614787032473881110f,
-    0.614422093861533010f,
-  0.614057132658640590f, 0.613692148878623000f, 0.613327142534899510f,
-    0.612962113640889710f,
-  0.612597062210015750f, 0.612231988255698470f, 0.611866891791361560f,
-    0.611501772830428060f,
-  0.611136631386322020f, 0.610771467472469460f, 0.610406281102295440f,
-    0.610041072289227990f,
-  0.609675841046694030f, 0.609310587388121830f, 0.608945311326941520f,
-    0.608580012876582370f,
-  0.608214692050476290f, 0.607849348862054220f, 0.607483983324749510f,
-    0.607118595451995420f,
-  0.606753185257225550f, 0.606387752753876020f, 0.606022297955381760f,
-    0.605656820875180360f,
-  0.605291321526709060f, 0.604925799923405670f, 0.604560256078710220f,
-    0.604194690006061960f,
-  0.603829101718902580f, 0.603463491230673220f, 0.603097858554815790f,
-    0.602732203704774650f,
-  0.602366526693992930f, 0.602000827535916330f, 0.601635106243990190f,
-    0.601269362831660550f,
-  0.600903597312375640f, 0.600537809699582810f, 0.600172000006731770f,
-    0.599806168247271620f,
-  0.599440314434653620f, 0.599074438582328780f, 0.598708540703749010f,
-    0.598342620812368000f,
-  0.597976678921638860f, 0.597610715045016950f, 0.597244729195957500f,
-    0.596878721387916090f,
-  0.596512691634350830f, 0.596146639948718640f, 0.595780566344478960f,
-    0.595414470835091030f,
-  0.595048353434014630f, 0.594682214154711790f, 0.594316053010643270f,
-    0.593949870015273000f,
-  0.593583665182063740f, 0.593217438524479500f, 0.592851190055986300f,
-    0.592484919790049140f,
-  0.592118627740135460f, 0.591752313919712170f, 0.591385978342248260f,
-    0.591019621021212420f,
-  0.590653241970074180f, 0.590286841202305120f, 0.589920418731375800f,
-    0.589553974570759530f,
-  0.589187508733928890f, 0.588821021234357310f, 0.588454512085520460f,
-    0.588087981300892900f,
-  0.587721428893951850f, 0.587354854878173850f, 0.586988259267036350f,
-    0.586621642074019120f,
-  0.586255003312600500f, 0.585888342996261690f, 0.585521661138483250f,
-    0.585154957752746730f,
-  0.584788232852535560f, 0.584421486451332410f, 0.584054718562622140f,
-    0.583687929199888990f,
-  0.583321118376619710f, 0.582954286106300290f, 0.582587432402417840f,
-    0.582220557278461340f,
-  0.581853660747918780f, 0.581486742824280810f, 0.581119803521037650f,
-    0.580752842851679940f,
-  0.580385860829700780f, 0.580018857468592270f, 0.579651832781848730f,
-    0.579284786782964360f,
-  0.578917719485433800f, 0.578550630902754050f, 0.578183521048421080f,
-    0.577816389935933090f,
-  0.577449237578788300f, 0.577082063990485340f, 0.576714869184524860f,
-    0.576347653174406840f,
-  0.575980415973633590f, 0.575613157595706530f, 0.575245878054129520f,
-    0.574878577362406000f,
-  0.574511255534040030f, 0.574143912582537940f, 0.573776548521405030f,
-    0.573409163364148930f,
-  0.573041757124277180f, 0.572674329815297640f, 0.572306881450720390f,
-    0.571939412044054740f,
-  0.571571921608812320f, 0.571204410158504090f, 0.570836877706642270f,
-    0.570469324266740570f,
-  0.570101749852312100f, 0.569734154476872480f, 0.569366538153936560f,
-    0.568998900897020210f,
-  0.568631242719641270f, 0.568263563635316600f, 0.567895863657565500f,
-    0.567528142799906490f,
-  0.567160401075860410f, 0.566792638498947680f, 0.566424855082689470f,
-    0.566057050840608870f,
-  0.565689225786228160f, 0.565321379933072190f, 0.564953513294665140f,
-    0.564585625884531870f,
-  0.564217717716199550f, 0.563849788803194140f, 0.563481839159044150f,
-    0.563113868797277870f,
-  0.562745877731423820f, 0.562377865975012940f, 0.562009833541575080f,
-    0.561641780444642640f,
-  0.561273706697747450f, 0.560905612314422150f, 0.560537497308201240f,
-    0.560169361692618440f,
-  0.559801205481210040f, 0.559433028687510990f, 0.559064831325059240f,
-    0.558696613407391630f,
-  0.558328374948046320f, 0.557960115960563050f, 0.557591836458480870f,
-    0.557223536455341280f,
-  0.556855215964685120f, 0.556486875000054000f, 0.556118513574991650f,
-    0.555750131703040880f,
-  0.555381729397746880f, 0.555013306672654360f, 0.554644863541308600f,
-    0.554276400017257090f,
-  0.553907916114046440f, 0.553539411845225590f, 0.553170887224342820f,
-    0.552802342264947400f,
-  0.552433776980590490f, 0.552065191384822350f, 0.551696585491195710f,
-    0.551327959313262280f,
-  0.550959312864576220f, 0.550590646158691240f, 0.550221959209161620f,
-    0.549853252029543830f,
-  0.549484524633393480f, 0.549115777034268170f, 0.548747009245725500f,
-    0.548378221281323520f,
-  0.548009413154622370f, 0.547640584879181100f, 0.547271736468561530f,
-    0.546902867936324590f,
-  0.546533979296032200f, 0.546165070561248080f, 0.545796141745535150f,
-    0.545427192862458780f,
-  0.545058223925583670f, 0.544689234948475210f, 0.544320225944701200f,
-    0.543951196927828010f,
-  0.543582147911424560f, 0.543213078909059120f, 0.542843989934301940f,
-    0.542474881000723050f,
-  0.542105752121893050f, 0.541736603311384620f, 0.541367434582769480f,
-    0.540998245949621760f,
-  0.540629037425515050f, 0.540259809024023600f, 0.539890560758723770f,
-    0.539521292643190930f,
-  0.539152004691002770f, 0.538782696915736770f, 0.538413369330970610f,
-    0.538044021950284450f,
-  0.537674654787257180f, 0.537305267855470390f, 0.536935861168504670f,
-    0.536566434739941920f,
-  0.536196988583365510f, 0.535827522712358230f, 0.535458037140505110f,
-    0.535088531881390050f,
-  0.534719006948599860f, 0.534349462355720230f, 0.533979898116337950f,
-    0.533610314244041710f,
-  0.533240710752419080f, 0.532871087655060300f, 0.532501444965554960f,
-    0.532131782697493170f,
-  0.531762100864467290f, 0.531392399480068670f, 0.531022678557890980f,
-    0.530652938111527360f,
-  0.530283178154571710f, 0.529913398700619820f, 0.529543599763266700f,
-    0.529173781356109600f,
-  0.528803943492745180f, 0.528434086186771010f, 0.528064209451786560f,
-    0.527694313301390160f,
-  0.527324397749182720f, 0.526954462808764120f, 0.526584508493736840f,
-    0.526214534817702310f,
-  0.525844541794263210f, 0.525474529437023890f, 0.525104497759587900f,
-    0.524734446775560910f,
-  0.524364376498548390f, 0.523994286942156220f, 0.523624178119992400f,
-    0.523254050045663940f,
-  0.522883902732780290f, 0.522513736194950230f, 0.522143550445783310f,
-    0.521773345498891090f,
-  0.521403121367884030f, 0.521032878066375100f, 0.520662615607976660f,
-    0.520292334006301820f,
-  0.519922033274965560f, 0.519551713427582000f, 0.519181374477767470f,
-    0.518811016439137520f,
-  0.518440639325310040f, 0.518070243149902240f, 0.517699827926532130f,
-    0.517329393668819580f,
-  0.516958940390383700f, 0.516588468104845820f, 0.516217976825826600f,
-    0.515847466566947580f,
-  0.515476937341832310f, 0.515106389164103120f, 0.514735822047384990f,
-    0.514365236005302040f,
-  0.513994631051479240f, 0.513624007199543600f, 0.513253364463121090f,
-    0.512882702855839920f,
-  0.512512022391327980f, 0.512141323083213470f, 0.511770604945127050f,
-    0.511399867990697920f,
-  0.511029112233557960f, 0.510658337687338040f, 0.510287544365671140f,
-    0.509916732282189920f,
-  0.509545901450527690f, 0.509175051884319660f, 0.508804183597200140f,
-    0.508433296602805670f,
-  0.508062390914772230f, 0.507691466546736580f, 0.507320523512337470f,
-    0.506949561825212450f,
-  0.506578581499001590f, 0.506207582547344550f, 0.505836564983881190f,
-    0.505465528822253710f,
-  0.505094474076103310f, 0.504723400759073290f, 0.504352308884806750f,
-    0.503981198466947000f,
-  0.503610069519139780f, 0.503238922055029400f, 0.502867756088262840f,
-    0.502496571632486070f,
-  0.502125368701347050f, 0.501754147308493770f, 0.501382907467574190f,
-    0.501011649192238950f,
-  0.500640372496137020f, 0.500269077392920150f, 0.499897763896239410f,
-    0.499526432019746450f,
-  0.499155081777094940f, 0.498783713181937540f, 0.498412326247929250f,
-    0.498040920988724490f,
-  0.497669497417978280f, 0.497298055549347750f, 0.496926595396488870f,
-    0.496555116973059980f,
-  0.496183620292718900f, 0.495812105369124070f, 0.495440572215935850f,
-    0.495069020846813650f,
-  0.494697451275419140f, 0.494325863515413130f, 0.493954257580458580f,
-    0.493582633484217940f,
-  0.493210991240354450f, 0.492839330862533120f, 0.492467652364417970f,
-    0.492095955759675460f,
-  0.491724241061971320f, 0.491352508284972070f, 0.490980757442346090f,
-    0.490608988547760690f,
-  0.490237201614885710f, 0.489865396657390210f, 0.489493573688943970f,
-    0.489121732723218740f,
-  0.488749873773885120f, 0.488377996854616250f, 0.488006101979084450f,
-    0.487634189160962910f,
-  0.487262258413926560f, 0.486890309751649490f, 0.486518343187807900f,
-    0.486146358736077200f,
-  0.485774356410135000f, 0.485402336223658360f, 0.485030298190324950f,
-    0.484658242323814380f,
-  0.484286168637805270f, 0.483914077145978560f, 0.483541967862014480f,
-    0.483169840799594130f,
-  0.482797695972400300f, 0.482425533394114920f, 0.482053353078422120f,
-    0.481681155039005550f,
-  0.481308939289549380f, 0.480936705843739820f, 0.480564454715261990f,
-    0.480192185917803270f,
-  0.479819899465050160f, 0.479447595370691370f, 0.479075273648415010f,
-    0.478702934311909910f,
-  0.478330577374866780f, 0.477958202850975230f, 0.477585810753927250f,
-    0.477213401097414220f,
-  0.476840973895128200f, 0.476468529160763100f, 0.476096066908011760f,
-    0.475723587150569390f,
-  0.475351089902130650f, 0.474978575176390750f, 0.474606042987046840f,
-    0.474233493347795020f,
-  0.473860926272333670f, 0.473488341774360670f, 0.473115739867574380f,
-    0.472743120565675250f,
-  0.472370483882362520f, 0.471997829831337810f, 0.471625158426301700f,
-    0.471252469680957190f,
-  0.470879763609006460f, 0.470507040224152460f, 0.470134299540099940f,
-    0.469761541570552780f,
-  0.469388766329217000f, 0.469015973829798090f, 0.468643164086002100f,
-    0.468270337111537040f,
-  0.467897492920109850f, 0.467524631525429830f, 0.467151752941205530f,
-    0.466778857181146260f,
-  0.466405944258963200f, 0.466033014188366350f, 0.465660066983068220f,
-    0.465287102656780530f,
-  0.464914121223215740f, 0.464541122696088100f, 0.464168107089110940f,
-    0.463795074415999760f,
-  0.463422024690469060f, 0.463048957926235630f, 0.462675874137015720f,
-    0.462302773336526080f,
-  0.461929655538485470f, 0.461556520756611410f, 0.461183369004623920f,
-    0.460810200296242310f,
-  0.460437014645186440f, 0.460063812065178160f, 0.459690592569938270f,
-    0.459317356173189750f,
-  0.458944102888655060f, 0.458570832730057170f, 0.458197545711121090f,
-    0.457824241845570630f,
-  0.457450921147131930f, 0.457077583629530550f, 0.456704229306492570f,
-    0.456330858191746010f,
-  0.455957470299017840f, 0.455584065642037350f, 0.455210644234532610f,
-    0.454837206090234200f,
-  0.454463751222871910f, 0.454090279646176210f, 0.453716791373879380f,
-    0.453343286419712720f,
-  0.452969764797409750f, 0.452596226520703360f, 0.452222671603327130f,
-    0.451849100059016350f,
-  0.451475511901505420f, 0.451101907144530910f, 0.450728285801828830f,
-    0.450354647887135640f,
-  0.449980993414189900f, 0.449607322396728900f, 0.449233634848492320f,
-    0.448859930783219170f,
-  0.448486210214649020f, 0.448112473156523420f, 0.447738719622582710f,
-    0.447364949626569590f,
-  0.446991163182225700f, 0.446617360303294910f, 0.446243541003520480f,
-    0.445869705296646270f,
-  0.445495853196417930f, 0.445121984716580210f, 0.444748099870879880f,
-    0.444374198673063330f,
-  0.444000281136877280f, 0.443626347276070590f, 0.443252397104390790f,
-    0.442878430635587910f,
-  0.442504447883411090f, 0.442130448861610240f, 0.441756433583937120f,
-    0.441382402064142250f,
-  0.441008354315978680f, 0.440634290353198510f, 0.440260210189554690f,
-    0.439886113838801880f,
-  0.439512001314693700f, 0.439137872630986080f, 0.438763727801433690f,
-    0.438389566839793740f,
-  0.438015389759822630f, 0.437641196575277220f, 0.437266987299916590f,
-    0.436892761947498260f,
-  0.436518520531782470f, 0.436144263066528480f, 0.435769989565496290f,
-    0.435395700042447710f,
-  0.435021394511143410f, 0.434647072985346380f, 0.434272735478819010f,
-    0.433898382005324050f,
-  0.433524012578626440f, 0.433149627212489670f, 0.432775225920679740f,
-    0.432400808716961900f,
-  0.432026375615101930f, 0.431651926628867530f, 0.431277461772025310f,
-    0.430902981058344070f,
-  0.430528484501591540f, 0.430153972115537800f, 0.429779443913952170f,
-    0.429404899910604490f,
-  0.429030340119266550f, 0.428655764553708960f, 0.428281173227704760f,
-    0.427906566155026040f,
-  0.427531943349445720f, 0.427157304824738350f, 0.426782650594677570f,
-    0.426407980673039090f,
-  0.426033295073598160f, 0.425658593810130330f, 0.425283876896413280f,
-    0.424909144346223290f,
-  0.424534396173339160f, 0.424159632391538870f, 0.423784853014600950f,
-    0.423410058056305830f,
-  0.423035247530432810f, 0.422660421450763490f, 0.422285579831078230f,
-    0.421910722685159720f,
-  0.421535850026790060f, 0.421160961869751720f, 0.420786058227829220f,
-    0.420411139114805770f,
-  0.420036204544466940f, 0.419661254530597550f, 0.419286289086983070f,
-    0.418911308227410740f,
-  0.418536311965666650f, 0.418161300315539220f, 0.417786273290816130f,
-    0.417411230905285650f,
-  0.417036173172737830f, 0.416661100106961610f, 0.416286011721748230f,
-    0.415910908030888200f,
-  0.415535789048172620f, 0.415160654787394280f, 0.414785505262345030f,
-    0.414410340486818910f,
-  0.414035160474608700f, 0.413659965239509710f, 0.413284754795316230f,
-    0.412909529155823300f,
-  0.412534288334827750f, 0.412159032346125280f, 0.411783761203513790f,
-    0.411408474920790520f,
-  0.411033173511753220f, 0.410657856990201580f, 0.410282525369933980f,
-    0.409907178664751180f,
-  0.409531816888453190f, 0.409156440054840590f, 0.408781048177715660f,
-    0.408405641270879690f,
-  0.408030219348136270f, 0.407654782423288010f, 0.407279330510138260f,
-    0.406903863622492260f,
-  0.406528381774153900f, 0.406152884978929480f, 0.405777373250624070f,
-    0.405401846603045010f,
-  0.405026305049998980f, 0.404650748605293040f, 0.404275177282736260f,
-    0.403899591096136380f,
-  0.403523990059303620f, 0.403148374186047210f, 0.402772743490177110f,
-    0.402397097985504990f,
-  0.402021437685841480f, 0.401645762604999350f, 0.401270072756790610f,
-    0.400894368155027990f,
-  0.400518648813525830f, 0.400142914746097480f, 0.399767165966558420f,
-    0.399391402488723400f,
-  0.399015624326407800f, 0.398639831493428740f, 0.398264024003602220f,
-    0.397888201870746420f,
-  0.397512365108678430f, 0.397136513731217500f, 0.396760647752182230f,
-    0.396384767185391620f,
-  0.396008872044666730f, 0.395632962343827170f, 0.395257038096694990f,
-    0.394881099317091370f,
-  0.394505146018838130f, 0.394129178215758820f, 0.393753195921675850f,
-    0.393377199150413860f,
-  0.393001187915796750f, 0.392625162231649010f, 0.392249122111796800f,
-    0.391873067570065240f,
-  0.391496998620281590f, 0.391120915276272410f, 0.390744817551864850f,
-    0.390368705460887750f,
-  0.389992579017168830f, 0.389616438234538010f, 0.389240283126824070f,
-    0.388864113707858060f,
-  0.388487929991470140f, 0.388111731991491180f, 0.387735519721753690f,
-    0.387359293196089140f,
-  0.386983052428331030f, 0.386606797432312350f, 0.386230528221866430f,
-    0.385854244810828530f,
-  0.385477947213032580f, 0.385101635442314900f, 0.384725309512510880f,
-    0.384348969437456610f,
-  0.383972615230989860f, 0.383596246906947210f, 0.383219864479167560f,
-    0.382843467961488940f,
-  0.382467057367749940f, 0.382090632711791060f, 0.381714194007451380f,
-    0.381337741268572390f,
-  0.380961274508994250f, 0.380584793742559550f, 0.380208298983109930f,
-    0.379831790244487540f,
-  0.379455267540536490f, 0.379078730885099520f, 0.378702180292021630f,
-    0.378325615775147170f,
-  0.377949037348320800f, 0.377572445025389230f, 0.377195838820197690f,
-    0.376819218746593910f,
-  0.376442584818424570f, 0.376065937049537060f, 0.375689275453780500f,
-    0.375312600045002780f,
-  0.374935910837054080f, 0.374559207843783660f, 0.374182491079041500f,
-    0.373805760556679190f,
-  0.373429016290547200f, 0.373052258294498230f, 0.372675486582383640f,
-    0.372298701168057190f,
-  0.371921902065371730f, 0.371545089288180640f, 0.371168262850339210f,
-    0.370791422765701320f,
-  0.370414569048123140f, 0.370037701711460170f, 0.369660820769568240f,
-    0.369283926236305070f,
-  0.368907018125527120f, 0.368530096451093140f, 0.368153161226860980f,
-    0.367776212466689010f,
-  0.367399250184437480f, 0.367022274393965340f, 0.366645285109133750f,
-    0.366268282343803150f,
-  0.365891266111834370f, 0.365514236427090080f, 0.365137193303431750f,
-    0.364760136754723020f,
-  0.364383066794826350f, 0.364005983437606320f, 0.363628886696926890f,
-    0.363251776586652310f,
-  0.362874653120648700f, 0.362497516312780990f, 0.362120366176916230f,
-    0.361743202726920790f,
-  0.361366025976661450f, 0.360988835940006750f, 0.360611632630824020f,
-    0.360234416062982840f,
-  0.359857186250351960f, 0.359479943206800550f, 0.359102686946199680f,
-    0.358725417482419150f,
-  0.358348134829330870f, 0.357970839000806010f, 0.357593530010716310f,
-    0.357216207872935120f,
-  0.356838872601334680f, 0.356461524209789380f, 0.356084162712172360f,
-    0.355706788122359060f,
-  0.355329400454223950f, 0.354951999721642100f, 0.354574585938490280f,
-    0.354197159118644080f,
-  0.353819719275981330f, 0.353442266424378930f, 0.353064800577714280f,
-    0.352687321749866610f,
-  0.352309829954713830f, 0.351932325206136210f, 0.351554807518012990f,
-    0.351177276904224070f,
-  0.350799733378650890f, 0.350422176955173910f, 0.350044607647675640f,
-    0.349667025470037810f,
-  0.349289430436142520f, 0.348911822559873850f, 0.348534201855114360f,
-    0.348156568335749040f,
-  0.347778922015661520f, 0.347401262908737570f, 0.347023591028862320f,
-    0.346645906389921150f,
-  0.346268209005801410f, 0.345890498890388980f, 0.345512776057572080f,
-    0.345135040521238170f,
-  0.344757292295274910f, 0.344379531393571970f, 0.344001757830017680f,
-    0.343623971618502560f,
-  0.343246172772916250f, 0.342868361307148980f, 0.342490537235092600f,
-    0.342112700570637750f,
-  0.341734851327677280f, 0.341356989520103240f, 0.340979115161808070f,
-    0.340601228266685980f,
-  0.340223328848629880f, 0.339845416921535030f, 0.339467492499295200f,
-    0.339089555595806560f,
-  0.338711606224964210f, 0.338333644400663940f, 0.337955670136803170f,
-    0.337577683447278010f,
-  0.337199684345986910f, 0.336821672846827290f, 0.336443648963697160f,
-    0.336065612710496290f,
-  0.335687564101123050f, 0.335309503149478110f, 0.334931429869461230f,
-    0.334553344274972690f,
-  0.334175246379914470f, 0.333797136198187240f, 0.333419013743693980f,
-    0.333040879030336690f,
-  0.332662732072017800f, 0.332284572882641680f, 0.331906401476111280f,
-    0.331528217866331690f,
-  0.331150022067206780f, 0.330771814092642610f, 0.330393593956544440f,
-    0.330015361672817750f,
-  0.329637117255370090f, 0.329258860718107450f, 0.328880592074938190f,
-    0.328502311339769700f,
-  0.328124018526509800f, 0.327745713649068180f, 0.327367396721353070f,
-    0.326989067757275040f,
-  0.326610726770743760f, 0.326232373775669270f, 0.325854008785963320f,
-    0.325475631815536570f,
-  0.325097242878301660f, 0.324718841988170470f, 0.324340429159055250f,
-    0.323962004404870050f,
-  0.323583567739527570f, 0.323205119176942720f, 0.322826658731029110f,
-    0.322448186415702550f,
-  0.322069702244877910f, 0.321691206232470550f, 0.321312698392397570f,
-    0.320934178738574720f,
-  0.320555647284919980f, 0.320177104045350440f, 0.319798549033783570f,
-    0.319419982264138650f,
-  0.319041403750333630f, 0.318662813506288670f, 0.318284211545923010f,
-    0.317905597883156250f,
-  0.317526972531909870f, 0.317148335506103940f, 0.316769686819660780f,
-    0.316391026486501690f,
-  0.316012354520548600f, 0.315633670935725030f, 0.315254975745953180f,
-    0.314876268965157470f,
-  0.314497550607261090f, 0.314118820686189180f, 0.313740079215866160f,
-    0.313361326210216840f,
-  0.312982561683167790f, 0.312603785648644220f, 0.312224998120573420f,
-    0.311846199112882030f,
-  0.311467388639496860f, 0.311088566714346650f, 0.310709733351358600f,
-    0.310330888564462340f,
-  0.309952032367586390f, 0.309573164774659850f, 0.309194285799613390f,
-    0.308815395456376430f,
-  0.308436493758880660f, 0.308057580721056660f, 0.307678656356835560f,
-    0.307299720680150270f,
-  0.306920773704932260f, 0.306541815445115160f, 0.306162845914631390f,
-    0.305783865127415400f,
-  0.305404873097400780f, 0.305025869838521590f, 0.304646855364713530f,
-    0.304267829689911010f,
-  0.303888792828050650f, 0.303509744793068030f, 0.303130685598899270f,
-    0.302751615259482190f,
-  0.302372533788753170f, 0.301993441200650910f, 0.301614337509113100f,
-    0.301235222728077840f,
-  0.300856096871485010f, 0.300476959953273060f, 0.300097811987382670f,
-    0.299718652987753580f,
-  0.299339482968325970f, 0.298960301943041680f, 0.298581109925841300f,
-    0.298201906930667390f,
-  0.297822692971461410f, 0.297443468062166820f, 0.297064232216726120f,
-    0.296684985449082390f,
-  0.296305727773180260f, 0.295926459202963120f, 0.295547179752376430f,
-    0.295167889435364820f,
-  0.294788588265873170f, 0.294409276257848300f, 0.294029953425235520f,
-    0.293650619781982260f,
-  0.293271275342035120f, 0.292891920119341120f, 0.292512554127848930f,
-    0.292133177381505850f,
-  0.291753789894261320f, 0.291374391680063520f, 0.290994982752862730f,
-    0.290615563126608250f,
-  0.290236132815249790f, 0.289856691832738880f, 0.289477240193025510f,
-    0.289097777910061970f,
-  0.288718304997799550f, 0.288338821470189910f, 0.287959327341186510f,
-    0.287579822624741350f,
-  0.287200307334808670f, 0.286820781485341620f, 0.286441245090293950f,
-    0.286061698163620930f,
-  0.285682140719276560f, 0.285302572771216960f, 0.284922994333397350f,
-    0.284543405419773240f,
-  0.284163806044301910f, 0.283784196220939370f, 0.283404575963643550f,
-    0.283024945286371230f,
-  0.282645304203081090f, 0.282265652727731130f, 0.281885990874279570f,
-    0.281506318656686290f,
-  0.281126636088910030f, 0.280746943184911340f, 0.280367239958650150f,
-    0.279987526424086530f,
-  0.279607802595182420f, 0.279228068485898210f, 0.278848324110196550f,
-    0.278468569482039130f,
-  0.278088804615388040f, 0.277709029524206950f, 0.277329244222458250f,
-    0.276949448724106480f,
-  0.276569643043115150f, 0.276189827193448200f, 0.275810001189071290f,
-    0.275430165043948570f,
-  0.275050318772046500f, 0.274670462387330010f, 0.274290595903766200f,
-    0.273910719335321300f,
-  0.273530832695961790f, 0.273150935999655950f, 0.272771029260370560f,
-    0.272391112492074590f,
-  0.272011185708736060f, 0.271631248924323390f, 0.271251302152806570f,
-    0.270871345408154380f,
-  0.270491378704337540f, 0.270111402055325910f, 0.269731415475089780f,
-    0.269351418977600950f,
-  0.268971412576829990f, 0.268591396286749500f, 0.268211370121331170f,
-    0.267831334094547010f,
-  0.267451288220370730f, 0.267071232512774700f, 0.266691166985733360f,
-    0.266311091653219700f,
-  0.265931006529208920f, 0.265550911627675250f, 0.265170806962593210f,
-    0.264790692547939020f,
-  0.264410568397687560f, 0.264030434525815760f, 0.263650290946299660f,
-    0.263270137673115630f,
-  0.262889974720241610f, 0.262509802101654310f, 0.262129619831332370f,
-    0.261749427923253670f,
-  0.261369226391396310f, 0.260989015249740050f, 0.260608794512263380f,
-    0.260228564192946710f,
-  0.259848324305769600f, 0.259468074864711960f, 0.259087815883755400f,
-    0.258707547376880010f,
-  0.258327269358068100f, 0.257946981841300490f, 0.257566684840560170f,
-    0.257186378369829110f,
-  0.256806062443089680f, 0.256425737074325920f, 0.256045402277520320f,
-    0.255665058066657680f,
-  0.255284704455721660f, 0.254904341458696390f, 0.254523969089567590f,
-    0.254143587362319620f,
-  0.253763196290938850f, 0.253382795889410710f, 0.253002386171721110f,
-    0.252621967151857420f,
-  0.252241538843805680f, 0.251861101261554090f, 0.251480654419089730f,
-    0.251100198330400150f,
-  0.250719733009474530f, 0.250339258470300590f, 0.249958774726868170f,
-    0.249578281793165680f,
-  0.249197779683183660f, 0.248817268410911650f, 0.248436747990339490f,
-    0.248056218435458720f,
-  0.247675679760259450f, 0.247295131978733870f, 0.246914575104873220f,
-    0.246534009152669040f,
-  0.246153434136114490f, 0.245772850069201410f, 0.245392256965923620f,
-    0.245011654840274010f,
-  0.244631043706245800f, 0.244250423577833860f, 0.243869794469031620f,
-    0.243489156393834590f,
-  0.243108509366237320f, 0.242727853400234670f, 0.242347188509823150f,
-    0.241966514708997830f,
-  0.241585832011755900f, 0.241205140432093070f, 0.240824439984007180f,
-    0.240443730681495050f,
-  0.240063012538553830f, 0.239682285569182310f, 0.239301549787377890f,
-    0.238920805207139960f,
-  0.238540051842467020f, 0.238159289707357810f, 0.237778518815812740f,
-    0.237397739181830820f,
-  0.237016950819413100f, 0.236636153742559610f, 0.236255347965270780f,
-    0.235874533501548580f,
-  0.235493710365393630f, 0.235112878570808560f, 0.234732038131795020f,
-    0.234351189062355030f,
-  0.233970331376492150f, 0.233589465088208580f, 0.233208590211508550f,
-    0.232827706760394850f,
-  0.232446814748872410f, 0.232065914190945020f, 0.231685005100616930f,
-    0.231304087491893930f,
-  0.230923161378780380f, 0.230542226775282770f, 0.230161283695406500f,
-    0.229780332153157300f,
-  0.229399372162542610f, 0.229018403737568290f, 0.228637426892242400f,
-    0.228256441640571880f,
-  0.227875447996564060f, 0.227494445974227850f, 0.227113435587570770f,
-    0.226732416850602300f,
-  0.226351389777330990f, 0.225970354381765690f, 0.225589310677916880f,
-    0.225208258679793520f,
-  0.224827198401406690f, 0.224446129856766040f, 0.224065053059883250f,
-    0.223683968024768950f,
-  0.223302874765434120f, 0.222921773295891380f, 0.222540663630151820f,
-    0.222159545782228660f,
-  0.221778419766134050f, 0.221397285595880480f, 0.221016143285482050f,
-    0.220634992848951380f,
-  0.220253834300303180f, 0.219872667653551100f, 0.219491492922709110f,
-    0.219110310121792800f,
-  0.218729119264816280f, 0.218347920365795780f, 0.217966713438746380f,
-    0.217585498497683580f,
-  0.217204275556624420f, 0.216823044629584520f, 0.216441805730581500f,
-    0.216060558873631570f,
-  0.215679304072752960f, 0.215298041341962870f, 0.214916770695278810f,
-    0.214535492146719880f,
-  0.214154205710303750f, 0.213772911400050090f, 0.213391609229977570f,
-    0.213010299214105140f,
-  0.212628981366453330f, 0.212247655701041290f, 0.211866322231890090f,
-    0.211484980973019880f,
-  0.211103631938451000f, 0.210722275142205480f, 0.210340910598303870f,
-    0.209959538320768660f,
-  0.209578158323621420f, 0.209196770620883960f, 0.208815375226579670f,
-    0.208433972154730530f,
-  0.208052561419360520f, 0.207671143034492080f, 0.207289717014149830f,
-    0.206908283372357230f,
-  0.206526842123138070f, 0.206145393280517730f, 0.205763936858520150f,
-    0.205382472871171230f,
-  0.205001001332495910f, 0.204619522256519300f, 0.204238035657268250f,
-    0.203856541548768030f,
-  0.203475039945045950f, 0.203093530860128300f, 0.202712014308041620f,
-    0.202330490302814110f,
-  0.201948958858472420f, 0.201567419989045200f, 0.201185873708560170f,
-    0.200804320031045230f,
-  0.200422758970529910f, 0.200041190541042220f, 0.199659614756612230f,
-    0.199278031631268500f,
-  0.198896441179041650f, 0.198514843413961220f, 0.198133238350057030f,
-    0.197751626001360480f,
-  0.197370006381901520f, 0.196988379505712050f, 0.196606745386822960f,
-    0.196225104039265410f,
-  0.195843455477072190f, 0.195461799714274460f, 0.195080136764905570f,
-    0.194698466642997730f,
-  0.194316789362583340f, 0.193935104937696560f, 0.193553413382369890f,
-    0.193171714710637930f,
-  0.192790008936534220f, 0.192408296074092570f, 0.192026576137348330f,
-    0.191644849140335360f,
-  0.191263115097089540f, 0.190881374021645320f, 0.190499625928039040f,
-    0.190117870830306100f,
-  0.189736108742482030f, 0.189354339678604100f, 0.188972563652707950f,
-    0.188590780678831250f,
-  0.188208990771010640f, 0.187827193943283040f, 0.187445390209686870f,
-    0.187063579584259070f,
-  0.186681762081038650f, 0.186299937714063470f, 0.185918106497371700f,
-    0.185536268445003070f,
-  0.185154423570995760f, 0.184772571889390000f, 0.184390713414225000f,
-    0.184008848159540110f,
-  0.183626976139376310f, 0.183245097367773090f, 0.182863211858771880f,
-    0.182481319626412670f,
-  0.182099420684737420f, 0.181717515047787020f, 0.181335602729602590f,
-    0.180953683744226880f,
-  0.180571758105701030f, 0.180189825828068250f, 0.179807886925370670f,
-    0.179425941411650660f,
-  0.179043989300952110f, 0.178662030607317450f, 0.178280065344791100f,
-    0.177898093527416370f,
-  0.177516115169236820f, 0.177134130284297610f, 0.176752138886642350f,
-    0.176370140990316640f,
-  0.175988136609365020f, 0.175606125757832240f, 0.175224108449764660f,
-    0.174842084699207030f,
-  0.174460054520206240f, 0.174078017926807490f, 0.173695974933058080f,
-    0.173313925553004180f,
-  0.172931869800692250f, 0.172549807690170230f, 0.172167739235484620f,
-    0.171785664450683800f,
-  0.171403583349815180f, 0.171021495946926340f, 0.170639402256066410f,
-    0.170257302291283000f,
-  0.169875196066625710f, 0.169493083596143100f, 0.169110964893883830f,
-    0.168728839973898290f,
-  0.168346708850235140f, 0.167964571536945220f, 0.167582428048078130f,
-    0.167200278397683750f,
-  0.166818122599813570f, 0.166435960668517400f, 0.166053792617847200f,
-    0.165671618461853270f,
-  0.165289438214587970f, 0.164907251890102520f, 0.164525059502448390f,
-    0.164142861065678550f,
-  0.163760656593844480f, 0.163378446100999640f, 0.162996229601196390f,
-    0.162614007108487250f,
-  0.162231778636926370f, 0.161849544200566300f, 0.161467303813461580f,
-    0.161085057489665670f,
-  0.160702805243232240f, 0.160320547088216470f, 0.159938283038672050f,
-    0.159556013108654580f,
-  0.159173737312218650f, 0.158791455663418930f, 0.158409168176311760f,
-    0.158026874864951870f,
-  0.157644575743395960f, 0.157262270825699210f, 0.156879960125918730f,
-    0.156497643658110590f,
-  0.156115321436331000f, 0.155732993474637760f, 0.155350659787087090f,
-    0.154968320387737170f,
-  0.154585975290645110f, 0.154203624509868190f, 0.153821268059465250f,
-    0.153438905953493550f,
-  0.153056538206012340f, 0.152674164831079730f, 0.152291785842754070f,
-    0.151909401255095250f,
-  0.151527011082161540f, 0.151144615338013210f, 0.150762214036709470f,
-    0.150379807192309620f,
-  0.149997394818874590f, 0.149614976930463660f, 0.149232553541138180f,
-    0.148850124664957870f,
-  0.148467690315984390f, 0.148085250508278370f, 0.147702805255900570f,
-    0.147320354572913260f,
-  0.146937898473377210f, 0.146555436971355090f, 0.146172970080908520f,
-    0.145790497816099230f,
-  0.145408020190990560f, 0.145025537219644170f, 0.144643048916123810f,
-    0.144260555294492000f,
-  0.143878056368811510f, 0.143495552153146630f, 0.143113042661560050f,
-    0.142730527908116440f,
-  0.142348007906879320f, 0.141965482671912420f, 0.141582952217280980f,
-    0.141200416557048680f,
-  0.140817875705281120f, 0.140435329676042390f, 0.140052778483398480f,
-    0.139670222141414250f,
-  0.139287660664154770f, 0.138905094065686600f, 0.138522522360074780f,
-    0.138139945561386200f,
-  0.137757363683686740f, 0.137374776741042340f, 0.136992184747520560f,
-    0.136609587717187310f,
-  0.136226985664110460f, 0.135844378602356760f, 0.135461766545993150f,
-    0.135079149509088060f,
-  0.134696527505708320f, 0.134313900549922760f, 0.133931268655799020f,
-    0.133548631837404950f,
-  0.133165990108809860f, 0.132783343484081580f, 0.132400691977289760f,
-    0.132018035602502530f,
-  0.131635374373789940f, 0.131252708305220960f, 0.130870037410864640f,
-    0.130487361704791580f,
-  0.130104681201070800f, 0.129721995913773260f, 0.129339305856968730f,
-    0.128956611044727220f,
-  0.128573911491120210f, 0.128191207210217570f, 0.127808498216091110f,
-    0.127425784522811530f,
-  0.127043066144449680f, 0.126660343095077900f, 0.126277615388766920f,
-    0.125894883039589430f,
-  0.125512146061616980f, 0.125129404468921260f, 0.124746658275575490f,
-    0.124363907495651240f,
-  0.123981152143222060f, 0.123598392232359880f, 0.123215627777138580f,
-    0.122832858791630880f,
-  0.122450085289909640f, 0.122067307286049230f, 0.121684524794122440f,
-    0.121301737828203960f,
-  0.120918946402367330f, 0.120536150530686250f, 0.120153350227235940f,
-    0.119770545506089950f,
-  0.119387736381323830f, 0.119004922867011920f, 0.118622104977228730f,
-    0.118239282726050290f,
-  0.117856456127550970f, 0.117473625195807100f, 0.117090789944893860f,
-    0.116707950388886520f,
-  0.116325106541861910f, 0.115942258417895240f, 0.115559406031063570f,
-    0.115176549395442460f,
-  0.114793688525109290f, 0.114410823434140360f, 0.114027954136612060f,
-    0.113645080646602280f,
-  0.113262202978187320f, 0.112879321145445350f, 0.112496435162453430f,
-    0.112113545043288730f,
-  0.111730650802029900f, 0.111347752452754000f, 0.110964850009539970f,
-    0.110581943486465610f,
-  0.110199032897608850f, 0.109816118257049110f, 0.109433199578864170f,
-    0.109050276877133770f,
-  0.108667350165936400f, 0.108284419459350770f, 0.107901484771457020f,
-    0.107518546116333660f,
-  0.107135603508061170f, 0.106752656960718350f, 0.106369706488385940f,
-    0.105986752105143480f,
-  0.105603793825070680f, 0.105220831662248700f, 0.104837865630757090f,
-    0.104454895744677270f,
-  0.104071922018089540f, 0.103688944465074300f, 0.103305963099713400f,
-    0.102922977936087120f,
-  0.102539988988277600f, 0.102156996270365800f, 0.101773999796432830f,
-    0.101390999580561250f,
-  0.101007995636832020f, 0.100624987979327970f, 0.100241976622130760f,
-    0.099858961579322170f,
-  0.099475942864985456f, 0.099092920493202258f, 0.098709894478056073f,
-    0.098326864833628791f,
-  0.097943831574004214f, 0.097560794713264939f, 0.097177754265493674f,
-    0.096794710244774623f,
-  0.096411662665190329f, 0.096028611540825232f, 0.095645556885762609f,
-    0.095262498714085819f,
-  0.094879437039879722f, 0.094496371877227495f, 0.094113303240214247f,
-    0.093730231142923864f,
-  0.093347155599440373f, 0.092964076623849271f, 0.092580994230234359f,
-    0.092197908432681386f,
-  0.091814819245274432f, 0.091431726682099479f, 0.091048630757241303f,
-    0.090665531484784803f,
-  0.090282428878816323f, 0.089899322953420582f, 0.089516213722684160f,
-    0.089133101200692441f,
-  0.088749985401530951f, 0.088366866339286629f, 0.087983744028044805f,
-    0.087600618481892656f,
-  0.087217489714916191f, 0.086834357741201490f, 0.086451222574836131f,
-    0.086068084229906014f,
-  0.085684942720498897f, 0.085301798060701386f, 0.084918650264600160f,
-    0.084535499346283349f,
-  0.084152345319837438f, 0.083769188199350780f, 0.083386027998910095f,
-    0.083002864732603973f,
-  0.082619698414519799f, 0.082236529058745025f, 0.081853356679368619f,
-    0.081470181290477811f,
-  0.081087002906161790f, 0.080703821540508452f, 0.080320637207605849f,
-    0.079937449921543474f,
-  0.079554259696409127f, 0.079171066546292510f, 0.078787870485282088f,
-    0.078404671527466441f,
-  0.078021469686935602f, 0.077638264977777913f, 0.077255057414083589f,
-    0.076871847009941652f,
-  0.076488633779441206f, 0.076105417736672773f, 0.075722198895725248f,
-    0.075338977270689375f,
-  0.074955752875654230f, 0.074572525724710764f, 0.074189295831948693f,
-    0.073806063211457842f,
-  0.073422827877329483f, 0.073039589843653177f, 0.072656349124520389f,
-    0.072273105734021334f,
-  0.071889859686246352f, 0.071506610995287156f, 0.071123359675233852f,
-    0.070740105740178361f,
-  0.070356849204211397f, 0.069973590081423773f, 0.069590328385907715f,
-    0.069207064131753759f,
-  0.068823797333054326f, 0.068440528003900616f, 0.068057256158383886f,
-    0.067673981810596848f,
-  0.067290704974630494f, 0.066907425664577733f, 0.066524143894529736f,
-    0.066140859678579578f,
-  0.065757573030819083f, 0.065374283965340146f, 0.064990992496236119f,
-    0.064607698637598646f,
-  0.064224402403521202f, 0.063841103808096086f, 0.063457802865415636f,
-    0.063074499589573618f,
-  0.062691193994662109f, 0.062307886094775049f, 0.061924575904005130f,
-    0.061541263436445129f,
-  0.061157948706189229f, 0.060774631727329942f, 0.060391312513961619f,
-    0.060007991080177375f,
-  0.059624667440070382f, 0.059241341607735261f, 0.058858013597264912f,
-    0.058474683422754095f,
-  0.058091351098295878f, 0.057708016637985186f, 0.057324680055915692f,
-    0.056941341366181127f,
-  0.056558000582876661f, 0.056174657720095743f, 0.055791312791933681f,
-    0.055407965812484541f,
-  0.055024616795842439f, 0.054641265756102911f, 0.054257912707359794f,
-    0.053874557663708772f,
-  0.053491200639244271f, 0.053107841648060788f, 0.052724480704254229f,
-    0.052341117821918783f,
-  0.051957753015150501f, 0.051574386298044173f, 0.051191017684694640f,
-    0.050807647189198162f,
-  0.050424274825649297f, 0.050040900608144430f, 0.049657524550778251f,
-    0.049274146667647289f,
-  0.048890766972846805f, 0.048507385480472134f, 0.048124002204620014f,
-    0.047740617159385448f,
-  0.047357230358865306f, 0.046973841817155179f, 0.046590451548350717f,
-    0.046207059566548990f,
-  0.045823665885845313f, 0.045440270520336883f, 0.045056873484119603f,
-    0.044673474791289434f,
-  0.044290074455943754f, 0.043906672492178188f, 0.043523268914090238f,
-    0.043139863735776100f,
-  0.042756456971332048f, 0.042373048634855741f, 0.041989638740443119f,
-    0.041606227302191955f,
-  0.041222814334198304f, 0.040839399850560058f, 0.040455983865373815f,
-    0.040072566392736257f,
-  0.039689147446745419f, 0.039305727041497644f, 0.038922305191091085f,
-    0.038538881909622631f,
-  0.038155457211189216f, 0.037772031109889144f, 0.037388603619819022f,
-    0.037005174755077273f,
-  0.036621744529761024f, 0.036238312957967478f, 0.035854880053795196f,
-    0.035471445831341021f,
-  0.035088010304703626f, 0.034704573487980395f, 0.034321135395268765f,
-    0.033937696040667535f,
-  0.033554255438273790f, 0.033170813602186440f, 0.032787370546502645f,
-    0.032403926285321405f,
-  0.032020480832740429f, 0.031637034202857461f, 0.031253586409771626f,
-    0.030870137467580314f,
-  0.030486687390382738f, 0.030103236192276818f, 0.029719783887360508f,
-    0.029336330489733147f,
-  0.028952876013492331f, 0.028569420472737472f, 0.028185963881566689f,
-    0.027802506254078142f,
-  0.027419047604371360f, 0.027035587946544135f, 0.026652127294696067f,
-    0.026268665662925468f,
-  0.025885203065330677f, 0.025501739516011413f, 0.025118275029065638f,
-    0.024734809618593138f,
-  0.024351343298691951f, 0.023967876083461924f, 0.023584407987001611f,
-    0.023200939023409587f,
-  0.022817469206785804f, 0.022433998551228459f, 0.022050527070837558f,
-    0.021667054779711814f,
-  0.021283581691949955f, 0.020900107821652084f, 0.020516633182916549f,
-    0.020133157789843505f,
-  0.019749681656531803f, 0.019366204797080316f, 0.018982727225589285f,
-    0.018599248956157190f,
-  0.018215770002884327f, 0.017832290379869671f, 0.017448810101212228f,
-    0.017065329181012358f,
-  0.016681847633368677f, 0.016298365472381587f, 0.015914882712149747f,
-    0.015531399366773606f,
-  0.015147915450352307f, 0.014764430976985016f, 0.014380945960772247f,
-    0.013997460415812761f,
-  0.013613974356207112f, 0.013230487796054543f, 0.012847000749454314f,
-    0.012463513230507034f,
-  0.012080025253311559f, 0.011696536831968529f, 0.011313047980577277f,
-    0.010929558713237145f,
-  0.010546069044048827f, 0.010162578987111254f, 0.009779088556525145f,
-    0.009395597766389905f,
-  0.009012106630804949f, 0.008628615163871038f, 0.008245123379687167f,
-    0.007861631292354124f,
-  0.007478138915970929f, 0.007094646264638386f, 0.006711153352455981f,
-    0.006327660193523208f,
-  0.005944166801940901f, 0.005560673191808128f, 0.005177179377225743f,
-    0.004793685372293270f,
-  0.004410191191110246f, 0.004026696847777542f, 0.003643202356394263f,
-    0.003259707731061291f,
-  0.002876212985878184f, 0.002492718134944503f, 0.002109223192361147f,
-    0.001725728172227238f,
-  0.001342233088643682f, 0.000958737955710053f, 0.000575242787525925f,
-    0.000191747598192208f
-};
-  #endif
-
-/**
-  @brief  Weights Table
- */
-
-/**
-  @par
-  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
-  @par
-  C command to generate the table
-  <pre>
-  for(i = 0; i< N; i++)
-  { 
-    weights[(2*i)]   =  cos(i*c);
-    weights[(2*i)+1] = -sin(i*c);
-  } </pre>
-  @par
-  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
-  @par
-  Converted the output to q15 format by multiplying with 2^31 and saturated if required.
-  @par
-  In the tables below the real and imaginary values are placed alternatively, hence the
-  array length is <code>2*N</code>.
- */
-
-/**
-  @par
-  cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre>
-  @par
-  C command to generate the table
-  <pre>
-  for (i = 0; i< N; i++)
-  {
-    cos_factors[i] = 2 * cos((2*i+1)*c/2);
-  } </pre>
-  @par
-  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-  @par
-  Then converted to q15 format by multiplying with 2^31 and saturated if required.
-*/
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
-    const q15_t __ALIGNED(4) WeightsQ15_128[256] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87, (q15_t)0xf505,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7,
-  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7dd6, (q15_t)0xe893,
-  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7c89, (q15_t)0xe26d,
-  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7aef, (q15_t)0xdc5a,
-  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7909, (q15_t)0xd65d,
-  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x76d9, (q15_t)0xd079,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x745f, (q15_t)0xcab3,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x719e, (q15_t)0xc50e,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6e96, (q15_t)0xbf8d,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6b4a, (q15_t)0xba33,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x67bd, (q15_t)0xb505,
-  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x63ef, (q15_t)0xb005,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x5fe3, (q15_t)0xab36,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5b9d, (q15_t)0xa69c,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x571d, (q15_t)0xa239,
-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5269, (q15_t)0x9e0f,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4d81, (q15_t)0x9a23,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4869, (q15_t)0x9674,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4325, (q15_t)0x9307,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3db8, (q15_t)0x8fdd,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3824, (q15_t)0x8cf9,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x326e, (q15_t)0x8a5b,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2c98, (q15_t)0x8806,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x26a8, (q15_t)0x85fb,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x209f, (q15_t)0x843b,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1a82, (q15_t)0x82c7,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x1455, (q15_t)0x81a1,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xe1b, (q15_t)0x80c8,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xafb, (q15_t)0x8079, (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x7d9, (q15_t)0x803e,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x324, (q15_t)0x800a, (q15_t)0x192, (q15_t)0x8003
-};
-    const q15_t __ALIGNED(4) cos_factorsQ15_128[128] = {
-  (q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce, (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75,
-  (q15_t)0x7f4d, (q15_t)0x7f21, (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa, (q15_t)0x7db0,
-  (q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a, (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6,
-  (q15_t)0x7a42, (q15_t)0x79c8, (q15_t)0x794a, (q15_t)0x78c7, (q15_t)0x7840, (q15_t)0x77b4, (q15_t)0x7723, (q15_t)0x768e,
-  (q15_t)0x75f4, (q15_t)0x7555, (q15_t)0x74b2, (q15_t)0x740b, (q15_t)0x735f, (q15_t)0x72af, (q15_t)0x71fa, (q15_t)0x7141,
-  (q15_t)0x7083, (q15_t)0x6fc1, (q15_t)0x6efb, (q15_t)0x6e30, (q15_t)0x6d62, (q15_t)0x6c8f, (q15_t)0x6bb8, (q15_t)0x6adc,
-  (q15_t)0x69fd, (q15_t)0x6919, (q15_t)0x6832, (q15_t)0x6746, (q15_t)0x6657, (q15_t)0x6563, (q15_t)0x646c, (q15_t)0x6371,
-  (q15_t)0x6271, (q15_t)0x616f, (q15_t)0x6068, (q15_t)0x5f5e, (q15_t)0x5e50, (q15_t)0x5d3e, (q15_t)0x5c29, (q15_t)0x5b10,
-  (q15_t)0x59f3, (q15_t)0x58d4, (q15_t)0x57b0, (q15_t)0x568a, (q15_t)0x5560, (q15_t)0x5433, (q15_t)0x5302, (q15_t)0x51ce,
-  (q15_t)0x5097, (q15_t)0x4f5e, (q15_t)0x4e21, (q15_t)0x4ce1, (q15_t)0x4b9e, (q15_t)0x4a58, (q15_t)0x490f, (q15_t)0x47c3,
-  (q15_t)0x4675, (q15_t)0x4524, (q15_t)0x43d0, (q15_t)0x427a, (q15_t)0x4121, (q15_t)0x3fc5, (q15_t)0x3e68, (q15_t)0x3d07,
-  (q15_t)0x3ba5, (q15_t)0x3a40, (q15_t)0x38d8, (q15_t)0x376f, (q15_t)0x3604, (q15_t)0x3496, (q15_t)0x3326, (q15_t)0x31b5,
-  (q15_t)0x3041, (q15_t)0x2ecc, (q15_t)0x2d55, (q15_t)0x2bdc, (q15_t)0x2a61, (q15_t)0x28e5, (q15_t)0x2767, (q15_t)0x25e8,
-  (q15_t)0x2467, (q15_t)0x22e5, (q15_t)0x2161, (q15_t)0x1fdc, (q15_t)0x1e56, (q15_t)0x1ccf, (q15_t)0x1b47, (q15_t)0x19bd,
-  (q15_t)0x1833, (q15_t)0x16a8, (q15_t)0x151b, (q15_t)0x138e, (q15_t)0x1201, (q15_t)0x1072, (q15_t)0xee3, (q15_t)0xd53,
-  (q15_t)0xbc3, (q15_t)0xa33, (q15_t)0x8a2, (q15_t)0x710, (q15_t)0x57f, (q15_t)0x3ed, (q15_t)0x25b, (q15_t)0xc9
-};
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
-    const q15_t __ALIGNED(4) WeightsQ15_512[1024] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3,
-  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8, (q15_t)0xfd41,
-  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf,
-  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fdd, (q15_t)0xfa1d,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fc8, (q15_t)0xf88b,
-  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fae, (q15_t)0xf6fa,
-  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f8f, (q15_t)0xf569,
-  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f6b, (q15_t)0xf3d9,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f43, (q15_t)0xf249,
-  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f15, (q15_t)0xf0b9,
-  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7ee3, (q15_t)0xef2a,
-  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eab, (q15_t)0xed9c,
-  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e6f, (q15_t)0xec0e,
-  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e2e, (q15_t)0xea81,
-  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7de8, (q15_t)0xe8f6,
-  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7d9d, (q15_t)0xe76a,
-  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d4e, (q15_t)0xe5e0,
-  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7cf9, (q15_t)0xe457,
-  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7ca0, (q15_t)0xe2cf,
-  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c42, (q15_t)0xe148,
-  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bdf, (q15_t)0xdfc2,
-  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b77, (q15_t)0xde3e,
-  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b0b, (q15_t)0xdcbb,
-  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7a9a, (q15_t)0xdb39,
-  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a24, (q15_t)0xd9b8,
-  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79a9, (q15_t)0xd839,
-  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x792a, (q15_t)0xd6bc,
-  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78a6, (q15_t)0xd540,
-  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x781d, (q15_t)0xd3c6,
-  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x7790, (q15_t)0xd24d,
-  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x76fe, (q15_t)0xd0d7,
-  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7668, (q15_t)0xcf62,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75cc, (q15_t)0xcdef,
-  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x752d, (q15_t)0xcc7e,
-  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x7489, (q15_t)0xcb0e,
-  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x73e0, (q15_t)0xc9a1,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7333, (q15_t)0xc836,
-  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x7282, (q15_t)0xc6ce,
-  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71cc, (q15_t)0xc567,
-  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7112, (q15_t)0xc403,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7053, (q15_t)0xc2a0,
-  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6f90, (q15_t)0xc141,
-  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ec9, (q15_t)0xbfe3,
-  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6dfd, (q15_t)0xbe89,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d2d, (q15_t)0xbd30,
-  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c59, (q15_t)0xbbdb,
-  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6b81, (q15_t)0xba88,
-  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6aa5, (q15_t)0xb937,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69c4, (q15_t)0xb7ea,
-  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x68e0, (q15_t)0xb69f,
-  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x67f7, (q15_t)0xb557,
-  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x670b, (q15_t)0xb411,
-  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x661a, (q15_t)0xb2cf,
-  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6526, (q15_t)0xb190,
-  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x642d, (q15_t)0xb054,
-  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6331, (q15_t)0xaf1b,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6231, (q15_t)0xade4,
-  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x612d, (q15_t)0xacb2,
-  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6026, (q15_t)0xab82,
-  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f1a, (q15_t)0xaa55,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e0b, (q15_t)0xa92c,
-  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5cf9, (q15_t)0xa807,
-  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5be3, (q15_t)0xa6e4,
-  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5ac9, (q15_t)0xa5c5,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ac, (q15_t)0xa4aa,
-  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x588b, (q15_t)0xa392,
-  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x5767, (q15_t)0xa27d,
-  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5640, (q15_t)0xa16d,
-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x5515, (q15_t)0xa060,
-  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x53e7, (q15_t)0x9f56,
-  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52b5, (q15_t)0x9e50,
-  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x5181, (q15_t)0x9d4e,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5049, (q15_t)0x9c50,
-  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f0f, (q15_t)0x9b56,
-  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4dd1, (q15_t)0x9a60,
-  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4c90, (q15_t)0x996d,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b4c, (q15_t)0x987e,
-  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a06, (q15_t)0x9794,
-  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48bc, (q15_t)0x96ad,
-  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x4770, (q15_t)0x95cb,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4621, (q15_t)0x94ed,
-  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x44cf, (q15_t)0x9412,
-  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x437b, (q15_t)0x933c,
-  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4224, (q15_t)0x926a,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x40ca, (q15_t)0x919d,
-  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3f6e, (q15_t)0x90d3,
-  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e10, (q15_t)0x900e,
-  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3caf, (q15_t)0x8f4d,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b4c, (q15_t)0x8e91,
-  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x39e6, (q15_t)0x8dd9,
-  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x387e, (q15_t)0x8d25,
-  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3714, (q15_t)0x8c76,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35a8, (q15_t)0x8bcb,
-  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x343a, (q15_t)0x8b25,
-  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x32ca, (q15_t)0x8a83,
-  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x3158, (q15_t)0x89e5,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x2fe4, (q15_t)0x894d,
-  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2e6e, (q15_t)0x88b9,
-  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2cf7, (q15_t)0x8829,
-  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2b7d, (q15_t)0x879e,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a02, (q15_t)0x8718,
-  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x2886, (q15_t)0x8696,
-  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2707, (q15_t)0x8619,
-  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x2588, (q15_t)0x85a1,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2407, (q15_t)0x852d,
-  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x2284, (q15_t)0x84be,
-  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2100, (q15_t)0x8454,
-  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1f7b, (q15_t)0x83ef,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1df5, (q15_t)0x838f,
-  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1c6d, (q15_t)0x8333,
-  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1ae4, (q15_t)0x82dc,
-  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x195b, (q15_t)0x828a,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x17d0, (q15_t)0x823d,
-  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x1645, (q15_t)0x81f4,
-  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x14b8, (q15_t)0x81b1,
-  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x132b, (q15_t)0x8172,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x119d, (q15_t)0x8138,
-  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x100e, (q15_t)0x8103,
-  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xe7f, (q15_t)0x80d3,
-  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xcef, (q15_t)0x80a8,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xb5f, (q15_t)0x8082,
-  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa33, (q15_t)0x8069, (q15_t)0x9ce, (q15_t)0x8061,
-  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x83d, (q15_t)0x8044,
-  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x775, (q15_t)0x8038, (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6ac, (q15_t)0x802d,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x51a, (q15_t)0x801b,
-  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x451, (q15_t)0x8013, (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x388, (q15_t)0x800d,
-  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x1f6, (q15_t)0x8004,
-  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x12d, (q15_t)0x8002, (q15_t)0xc9, (q15_t)0x8001, (q15_t)0x64, (q15_t)0x8001
-};
-
-    const q15_t __ALIGNED(4) cos_factorsQ15_512[512] = {
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7,
-  (q15_t)0x7ff4, (q15_t)0x7ff2, (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf, (q15_t)0x7fda,
-  (q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5, (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa,
-  (q15_t)0x7fa3, (q15_t)0x7f9b, (q15_t)0x7f93, (q15_t)0x7f8b, (q15_t)0x7f82, (q15_t)0x7f79, (q15_t)0x7f70, (q15_t)0x7f67,
-  (q15_t)0x7f5d, (q15_t)0x7f53, (q15_t)0x7f48, (q15_t)0x7f3d, (q15_t)0x7f32, (q15_t)0x7f27, (q15_t)0x7f1b, (q15_t)0x7f0f,
-  (q15_t)0x7f03, (q15_t)0x7ef6, (q15_t)0x7ee9, (q15_t)0x7edc, (q15_t)0x7ecf, (q15_t)0x7ec1, (q15_t)0x7eb3, (q15_t)0x7ea4,
-  (q15_t)0x7e95, (q15_t)0x7e86, (q15_t)0x7e77, (q15_t)0x7e67, (q15_t)0x7e57, (q15_t)0x7e47, (q15_t)0x7e37, (q15_t)0x7e26,
-  (q15_t)0x7e14, (q15_t)0x7e03, (q15_t)0x7df1, (q15_t)0x7ddf, (q15_t)0x7dcd, (q15_t)0x7dba, (q15_t)0x7da7, (q15_t)0x7d94,
-  (q15_t)0x7d80, (q15_t)0x7d6c, (q15_t)0x7d58, (q15_t)0x7d43, (q15_t)0x7d2f, (q15_t)0x7d19, (q15_t)0x7d04, (q15_t)0x7cee,
-  (q15_t)0x7cd8, (q15_t)0x7cc2, (q15_t)0x7cab, (q15_t)0x7c94, (q15_t)0x7c7d, (q15_t)0x7c66, (q15_t)0x7c4e, (q15_t)0x7c36,
-  (q15_t)0x7c1d, (q15_t)0x7c05, (q15_t)0x7beb, (q15_t)0x7bd2, (q15_t)0x7bb9, (q15_t)0x7b9f, (q15_t)0x7b84, (q15_t)0x7b6a,
-  (q15_t)0x7b4f, (q15_t)0x7b34, (q15_t)0x7b19, (q15_t)0x7afd, (q15_t)0x7ae1, (q15_t)0x7ac5, (q15_t)0x7aa8, (q15_t)0x7a8b,
-  (q15_t)0x7a6e, (q15_t)0x7a50, (q15_t)0x7a33, (q15_t)0x7a15, (q15_t)0x79f6, (q15_t)0x79d8, (q15_t)0x79b9, (q15_t)0x7999,
-  (q15_t)0x797a, (q15_t)0x795a, (q15_t)0x793a, (q15_t)0x7919, (q15_t)0x78f9, (q15_t)0x78d8, (q15_t)0x78b6, (q15_t)0x7895,
-  (q15_t)0x7873, (q15_t)0x7851, (q15_t)0x782e, (q15_t)0x780c, (q15_t)0x77e9, (q15_t)0x77c5, (q15_t)0x77a2, (q15_t)0x777e,
-  (q15_t)0x775a, (q15_t)0x7735, (q15_t)0x7710, (q15_t)0x76eb, (q15_t)0x76c6, (q15_t)0x76a0, (q15_t)0x767b, (q15_t)0x7654,
-  (q15_t)0x762e, (q15_t)0x7607, (q15_t)0x75e0, (q15_t)0x75b9, (q15_t)0x7591, (q15_t)0x7569, (q15_t)0x7541, (q15_t)0x7519,
-  (q15_t)0x74f0, (q15_t)0x74c7, (q15_t)0x749e, (q15_t)0x7474, (q15_t)0x744a, (q15_t)0x7420, (q15_t)0x73f6, (q15_t)0x73cb,
-  (q15_t)0x73a0, (q15_t)0x7375, (q15_t)0x7349, (q15_t)0x731d, (q15_t)0x72f1, (q15_t)0x72c5, (q15_t)0x7298, (q15_t)0x726b,
-  (q15_t)0x723e, (q15_t)0x7211, (q15_t)0x71e3, (q15_t)0x71b5, (q15_t)0x7186, (q15_t)0x7158, (q15_t)0x7129, (q15_t)0x70fa,
-  (q15_t)0x70cb, (q15_t)0x709b, (q15_t)0x706b, (q15_t)0x703b, (q15_t)0x700a, (q15_t)0x6fda, (q15_t)0x6fa9, (q15_t)0x6f77,
-  (q15_t)0x6f46, (q15_t)0x6f14, (q15_t)0x6ee2, (q15_t)0x6eaf, (q15_t)0x6e7d, (q15_t)0x6e4a, (q15_t)0x6e17, (q15_t)0x6de3,
-  (q15_t)0x6db0, (q15_t)0x6d7c, (q15_t)0x6d48, (q15_t)0x6d13, (q15_t)0x6cde, (q15_t)0x6ca9, (q15_t)0x6c74, (q15_t)0x6c3f,
-  (q15_t)0x6c09, (q15_t)0x6bd3, (q15_t)0x6b9c, (q15_t)0x6b66, (q15_t)0x6b2f, (q15_t)0x6af8, (q15_t)0x6ac1, (q15_t)0x6a89,
-  (q15_t)0x6a51, (q15_t)0x6a19, (q15_t)0x69e1, (q15_t)0x69a8, (q15_t)0x696f, (q15_t)0x6936, (q15_t)0x68fd, (q15_t)0x68c3,
-  (q15_t)0x6889, (q15_t)0x684f, (q15_t)0x6815, (q15_t)0x67da, (q15_t)0x679f, (q15_t)0x6764, (q15_t)0x6729, (q15_t)0x66ed,
-  (q15_t)0x66b1, (q15_t)0x6675, (q15_t)0x6639, (q15_t)0x65fc, (q15_t)0x65bf, (q15_t)0x6582, (q15_t)0x6545, (q15_t)0x6507,
-  (q15_t)0x64c9, (q15_t)0x648b, (q15_t)0x644d, (q15_t)0x640e, (q15_t)0x63cf, (q15_t)0x6390, (q15_t)0x6351, (q15_t)0x6311,
-  (q15_t)0x62d2, (q15_t)0x6292, (q15_t)0x6251, (q15_t)0x6211, (q15_t)0x61d0, (q15_t)0x618f, (q15_t)0x614e, (q15_t)0x610d,
-  (q15_t)0x60cb, (q15_t)0x6089, (q15_t)0x6047, (q15_t)0x6004, (q15_t)0x5fc2, (q15_t)0x5f7f, (q15_t)0x5f3c, (q15_t)0x5ef9,
-  (q15_t)0x5eb5, (q15_t)0x5e71, (q15_t)0x5e2d, (q15_t)0x5de9, (q15_t)0x5da5, (q15_t)0x5d60, (q15_t)0x5d1b, (q15_t)0x5cd6,
-  (q15_t)0x5c91, (q15_t)0x5c4b, (q15_t)0x5c06, (q15_t)0x5bc0, (q15_t)0x5b79, (q15_t)0x5b33, (q15_t)0x5aec, (q15_t)0x5aa5,
-  (q15_t)0x5a5e, (q15_t)0x5a17, (q15_t)0x59d0, (q15_t)0x5988, (q15_t)0x5940, (q15_t)0x58f8, (q15_t)0x58af, (q15_t)0x5867,
-  (q15_t)0x581e, (q15_t)0x57d5, (q15_t)0x578c, (q15_t)0x5742, (q15_t)0x56f9, (q15_t)0x56af, (q15_t)0x5665, (q15_t)0x561a,
-  (q15_t)0x55d0, (q15_t)0x5585, (q15_t)0x553a, (q15_t)0x54ef, (q15_t)0x54a4, (q15_t)0x5458, (q15_t)0x540d, (q15_t)0x53c1,
-  (q15_t)0x5375, (q15_t)0x5328, (q15_t)0x52dc, (q15_t)0x528f, (q15_t)0x5242, (q15_t)0x51f5, (q15_t)0x51a8, (q15_t)0x515a,
-  (q15_t)0x510c, (q15_t)0x50bf, (q15_t)0x5070, (q15_t)0x5022, (q15_t)0x4fd4, (q15_t)0x4f85, (q15_t)0x4f36, (q15_t)0x4ee7,
-  (q15_t)0x4e98, (q15_t)0x4e48, (q15_t)0x4df9, (q15_t)0x4da9, (q15_t)0x4d59, (q15_t)0x4d09, (q15_t)0x4cb8, (q15_t)0x4c68,
-  (q15_t)0x4c17, (q15_t)0x4bc6, (q15_t)0x4b75, (q15_t)0x4b24, (q15_t)0x4ad2, (q15_t)0x4a81, (q15_t)0x4a2f, (q15_t)0x49dd,
-  (q15_t)0x498a, (q15_t)0x4938, (q15_t)0x48e6, (q15_t)0x4893, (q15_t)0x4840, (q15_t)0x47ed, (q15_t)0x479a, (q15_t)0x4746,
-  (q15_t)0x46f3, (q15_t)0x469f, (q15_t)0x464b, (q15_t)0x45f7, (q15_t)0x45a3, (q15_t)0x454e, (q15_t)0x44fa, (q15_t)0x44a5,
-  (q15_t)0x4450, (q15_t)0x43fb, (q15_t)0x43a5, (q15_t)0x4350, (q15_t)0x42fa, (q15_t)0x42a5, (q15_t)0x424f, (q15_t)0x41f9,
-  (q15_t)0x41a2, (q15_t)0x414c, (q15_t)0x40f6, (q15_t)0x409f, (q15_t)0x4048, (q15_t)0x3ff1, (q15_t)0x3f9a, (q15_t)0x3f43,
-  (q15_t)0x3eeb, (q15_t)0x3e93, (q15_t)0x3e3c, (q15_t)0x3de4, (q15_t)0x3d8c, (q15_t)0x3d33, (q15_t)0x3cdb, (q15_t)0x3c83,
-  (q15_t)0x3c2a, (q15_t)0x3bd1, (q15_t)0x3b78, (q15_t)0x3b1f, (q15_t)0x3ac6, (q15_t)0x3a6c, (q15_t)0x3a13, (q15_t)0x39b9,
-  (q15_t)0x395f, (q15_t)0x3906, (q15_t)0x38ab, (q15_t)0x3851, (q15_t)0x37f7, (q15_t)0x379c, (q15_t)0x3742, (q15_t)0x36e7,
-  (q15_t)0x368c, (q15_t)0x3631, (q15_t)0x35d6, (q15_t)0x357b, (q15_t)0x351f, (q15_t)0x34c4, (q15_t)0x3468, (q15_t)0x340c,
-  (q15_t)0x33b0, (q15_t)0x3354, (q15_t)0x32f8, (q15_t)0x329c, (q15_t)0x3240, (q15_t)0x31e3, (q15_t)0x3186, (q15_t)0x312a,
-  (q15_t)0x30cd, (q15_t)0x3070, (q15_t)0x3013, (q15_t)0x2fb5, (q15_t)0x2f58, (q15_t)0x2efb, (q15_t)0x2e9d, (q15_t)0x2e3f,
-  (q15_t)0x2de2, (q15_t)0x2d84, (q15_t)0x2d26, (q15_t)0x2cc8, (q15_t)0x2c69, (q15_t)0x2c0b, (q15_t)0x2bad, (q15_t)0x2b4e,
-  (q15_t)0x2aef, (q15_t)0x2a91, (q15_t)0x2a32, (q15_t)0x29d3, (q15_t)0x2974, (q15_t)0x2915, (q15_t)0x28b5, (q15_t)0x2856,
-  (q15_t)0x27f6, (q15_t)0x2797, (q15_t)0x2737, (q15_t)0x26d8, (q15_t)0x2678, (q15_t)0x2618, (q15_t)0x25b8, (q15_t)0x2558,
-  (q15_t)0x24f7, (q15_t)0x2497, (q15_t)0x2437, (q15_t)0x23d6, (q15_t)0x2376, (q15_t)0x2315, (q15_t)0x22b4, (q15_t)0x2254,
-  (q15_t)0x21f3, (q15_t)0x2192, (q15_t)0x2131, (q15_t)0x20d0, (q15_t)0x206e, (q15_t)0x200d, (q15_t)0x1fac, (q15_t)0x1f4a,
-  (q15_t)0x1ee9, (q15_t)0x1e87, (q15_t)0x1e25, (q15_t)0x1dc4, (q15_t)0x1d62, (q15_t)0x1d00, (q15_t)0x1c9e, (q15_t)0x1c3c,
-  (q15_t)0x1bda, (q15_t)0x1b78, (q15_t)0x1b16, (q15_t)0x1ab3, (q15_t)0x1a51, (q15_t)0x19ef, (q15_t)0x198c, (q15_t)0x192a,
-  (q15_t)0x18c7, (q15_t)0x1864, (q15_t)0x1802, (q15_t)0x179f, (q15_t)0x173c, (q15_t)0x16d9, (q15_t)0x1676, (q15_t)0x1613,
-  (q15_t)0x15b0, (q15_t)0x154d, (q15_t)0x14ea, (q15_t)0x1487, (q15_t)0x1423, (q15_t)0x13c0, (q15_t)0x135d, (q15_t)0x12f9,
-  (q15_t)0x1296, (q15_t)0x1232, (q15_t)0x11cf, (q15_t)0x116b, (q15_t)0x1108, (q15_t)0x10a4, (q15_t)0x1040, (q15_t)0xfdd,
-  (q15_t)0xf79, (q15_t)0xf15, (q15_t)0xeb1, (q15_t)0xe4d, (q15_t)0xde9, (q15_t)0xd85, (q15_t)0xd21, (q15_t)0xcbd,
-  (q15_t)0xc59, (q15_t)0xbf5, (q15_t)0xb91, (q15_t)0xb2d, (q15_t)0xac9, (q15_t)0xa65, (q15_t)0xa00, (q15_t)0x99c,
-  (q15_t)0x938, (q15_t)0x8d4, (q15_t)0x86f, (q15_t)0x80b, (q15_t)0x7a7, (q15_t)0x742, (q15_t)0x6de, (q15_t)0x67a,
-  (q15_t)0x615, (q15_t)0x5b1, (q15_t)0x54c, (q15_t)0x4e8, (q15_t)0x483, (q15_t)0x41f, (q15_t)0x3ba, (q15_t)0x356,
-  (q15_t)0x2f1, (q15_t)0x28d, (q15_t)0x228, (q15_t)0x1c4, (q15_t)0x15f, (q15_t)0xfb, (q15_t)0x96, (q15_t)0x32
-};
-
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
-    const q15_t __ALIGNED(4) WeightsQ15_2048[4096] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5,
-  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff51,
-  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec,
-  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffd, (q15_t)0xfe88,
-  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe23,
-  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffa, (q15_t)0xfdbe,
-  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff8, (q15_t)0xfd5a,
-  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff6, (q15_t)0xfcf5,
-  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfc91,
-  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc2c,
-  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbc8,
-  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7fea, (q15_t)0xfb64,
-  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe6, (q15_t)0xfaff,
-  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe2, (q15_t)0xfa9b,
-  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fde, (q15_t)0xfa36,
-  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fd9, (q15_t)0xf9d2,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd4, (q15_t)0xf96d,
-  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fcf, (q15_t)0xf909,
-  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fc9, (q15_t)0xf8a5,
-  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc3, (q15_t)0xf840,
-  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbd, (q15_t)0xf7dc,
-  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb7, (q15_t)0xf778,
-  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb0, (q15_t)0xf713,
-  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7fa9, (q15_t)0xf6af,
-  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa1, (q15_t)0xf64b,
-  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f99, (q15_t)0xf5e7,
-  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f91, (q15_t)0xf582,
-  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f89, (q15_t)0xf51e,
-  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f80, (q15_t)0xf4ba,
-  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f77, (q15_t)0xf456,
-  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f6e, (q15_t)0xf3f2,
-  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f64, (q15_t)0xf38e,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5a, (q15_t)0xf32a,
-  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f50, (q15_t)0xf2c6,
-  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f45, (q15_t)0xf262,
-  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3b, (q15_t)0xf1fe,
-  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f2f, (q15_t)0xf19a,
-  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f24, (q15_t)0xf136,
-  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f18, (q15_t)0xf0d2,
-  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0c, (q15_t)0xf06e,
-  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f00, (q15_t)0xf00b,
-  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef3, (q15_t)0xefa7,
-  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee6, (q15_t)0xef43,
-  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7ed9, (q15_t)0xeedf,
-  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ecb, (q15_t)0xee7c,
-  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ebd, (q15_t)0xee18,
-  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eaf, (q15_t)0xedb5,
-  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea1, (q15_t)0xed51,
-  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e92, (q15_t)0xecee,
-  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e83, (q15_t)0xec8a,
-  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e73, (q15_t)0xec27,
-  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e63, (q15_t)0xebc4,
-  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e53, (q15_t)0xeb61,
-  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e43, (q15_t)0xeafd,
-  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e32, (q15_t)0xea9a,
-  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e21, (q15_t)0xea37,
-  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e10, (q15_t)0xe9d4,
-  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7dff, (q15_t)0xe971,
-  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7ded, (q15_t)0xe90e,
-  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dda, (q15_t)0xe8ab,
-  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dc8, (q15_t)0xe849,
-  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db5, (q15_t)0xe7e6,
-  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da2, (q15_t)0xe783,
-  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d8f, (q15_t)0xe720,
-  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7b, (q15_t)0xe6be,
-  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d67, (q15_t)0xe65b,
-  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d53, (q15_t)0xe5f9,
-  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d3e, (q15_t)0xe596,
-  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d29, (q15_t)0xe534,
-  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d14, (q15_t)0xe4d2,
-  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7cff, (q15_t)0xe470,
-  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ce9, (q15_t)0xe40e,
-  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd3, (q15_t)0xe3ab,
-  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cbc, (q15_t)0xe349,
-  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7ca6, (q15_t)0xe2e8,
-  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c8f, (q15_t)0xe286,
-  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c77, (q15_t)0xe224,
-  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c60, (q15_t)0xe1c2,
-  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c48, (q15_t)0xe160,
-  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c30, (q15_t)0xe0ff,
-  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c17, (q15_t)0xe09d,
-  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7bfe, (q15_t)0xe03c,
-  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7be5, (q15_t)0xdfdb,
-  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bcc, (q15_t)0xdf79,
-  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb2, (q15_t)0xdf18,
-  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b98, (q15_t)0xdeb7,
-  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b7e, (q15_t)0xde56,
-  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b63, (q15_t)0xddf5,
-  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b48, (q15_t)0xdd94,
-  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b2d, (q15_t)0xdd33,
-  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b12, (q15_t)0xdcd3,
-  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7af6, (q15_t)0xdc72,
-  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7ada, (q15_t)0xdc12,
-  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7abd, (q15_t)0xdbb1,
-  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa1, (q15_t)0xdb51,
-  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a84, (q15_t)0xdaf1,
-  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a67, (q15_t)0xda90,
-  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a49, (q15_t)0xda30,
-  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a2b, (q15_t)0xd9d0,
-  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a0d, (q15_t)0xd970,
-  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79ef, (q15_t)0xd911,
-  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d0, (q15_t)0xd8b1,
-  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b1, (q15_t)0xd851,
-  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7992, (q15_t)0xd7f2,
-  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7972, (q15_t)0xd792,
-  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7952, (q15_t)0xd733,
-  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7932, (q15_t)0xd6d4,
-  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7911, (q15_t)0xd675,
-  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f1, (q15_t)0xd615,
-  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78cf, (q15_t)0xd5b7,
-  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78ae, (q15_t)0xd558,
-  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x788c, (q15_t)0xd4f9,
-  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x786b, (q15_t)0xd49a,
-  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x7848, (q15_t)0xd43c,
-  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x7826, (q15_t)0xd3dd,
-  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x7803, (q15_t)0xd37f,
-  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e0, (q15_t)0xd321,
-  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77bc, (q15_t)0xd2c3,
-  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x7799, (q15_t)0xd265,
-  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x7775, (q15_t)0xd207,
-  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7751, (q15_t)0xd1a9,
-  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x772c, (q15_t)0xd14b,
-  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x7707, (q15_t)0xd0ee,
-  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e2, (q15_t)0xd091,
-  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76bd, (q15_t)0xd033,
-  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x7697, (q15_t)0xcfd6,
-  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7671, (q15_t)0xcf79,
-  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x764b, (q15_t)0xcf1c,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x7624, (q15_t)0xcebf,
-  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x75fd, (q15_t)0xce62,
-  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75d6, (q15_t)0xce06,
-  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75af, (q15_t)0xcda9,
-  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x7587, (q15_t)0xcd4d,
-  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x755f, (q15_t)0xccf1,
-  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x7537, (q15_t)0xcc95,
-  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x750f, (q15_t)0xcc39,
-  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74e6, (q15_t)0xcbdd,
-  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74bd, (q15_t)0xcb81,
-  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x7493, (q15_t)0xcb25,
-  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x746a, (q15_t)0xcaca,
-  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7440, (q15_t)0xca6e,
-  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x7415, (q15_t)0xca13,
-  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73eb, (q15_t)0xc9b8,
-  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c0, (q15_t)0xc95d,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x7395, (q15_t)0xc902,
-  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x736a, (q15_t)0xc8a8,
-  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x733e, (q15_t)0xc84d,
-  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x7312, (q15_t)0xc7f3,
-  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72e6, (q15_t)0xc798,
-  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72ba, (q15_t)0xc73e,
-  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x728d, (q15_t)0xc6e4,
-  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7260, (q15_t)0xc68a,
-  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x7233, (q15_t)0xc630,
-  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x7205, (q15_t)0xc5d7,
-  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71d7, (q15_t)0xc57d,
-  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71a9, (q15_t)0xc524,
-  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x717b, (q15_t)0xc4cb,
-  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x714c, (q15_t)0xc472,
-  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x711d, (q15_t)0xc419,
-  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70ee, (q15_t)0xc3c0,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70bf, (q15_t)0xc367,
-  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x708f, (q15_t)0xc30f,
-  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x705f, (q15_t)0xc2b7,
-  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x702f, (q15_t)0xc25e,
-  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x6ffe, (q15_t)0xc206,
-  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fcd, (q15_t)0xc1ae,
-  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6f9c, (q15_t)0xc157,
-  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f6b, (q15_t)0xc0ff,
-  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f39, (q15_t)0xc0a8,
-  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f07, (q15_t)0xc050,
-  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6ed5, (q15_t)0xbff9,
-  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6ea3, (q15_t)0xbfa2,
-  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e70, (q15_t)0xbf4b,
-  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e3d, (q15_t)0xbef5,
-  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e0a, (q15_t)0xbe9e,
-  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6dd6, (q15_t)0xbe48,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6da3, (q15_t)0xbdf2,
-  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d6f, (q15_t)0xbd9c,
-  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d3a, (q15_t)0xbd46,
-  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d06, (q15_t)0xbcf0,
-  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cd1, (q15_t)0xbc9b,
-  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6c9c, (q15_t)0xbc45,
-  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c67, (q15_t)0xbbf0,
-  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c31, (q15_t)0xbb9b,
-  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6bfb, (q15_t)0xbb46,
-  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bc5, (q15_t)0xbaf1,
-  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b8f, (q15_t)0xba9d,
-  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b58, (q15_t)0xba48,
-  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b21, (q15_t)0xb9f4,
-  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6aea, (q15_t)0xb9a0,
-  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6ab3, (q15_t)0xb94c,
-  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a7b, (q15_t)0xb8f8,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a43, (q15_t)0xb8a5,
-  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a0b, (q15_t)0xb852,
-  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69d3, (q15_t)0xb7fe,
-  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x699a, (q15_t)0xb7ab,
-  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x6961, (q15_t)0xb758,
-  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6928, (q15_t)0xb706,
-  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68ee, (q15_t)0xb6b3,
-  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68b5, (q15_t)0xb661,
-  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x687b, (q15_t)0xb60f,
-  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x6840, (q15_t)0xb5bd,
-  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6806, (q15_t)0xb56b,
-  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67cb, (q15_t)0xb519,
-  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x6790, (q15_t)0xb4c8,
-  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6755, (q15_t)0xb477,
-  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x671a, (q15_t)0xb426,
-  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66de, (q15_t)0xb3d5,
-  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66a2, (q15_t)0xb384,
-  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6666, (q15_t)0xb334,
-  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6629, (q15_t)0xb2e3,
-  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65ed, (q15_t)0xb293,
-  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65b0, (q15_t)0xb243,
-  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x6573, (q15_t)0xb1f3,
-  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6535, (q15_t)0xb1a4,
-  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x64f7, (q15_t)0xb154,
-  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64ba, (q15_t)0xb105,
-  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x647b, (q15_t)0xb0b6,
-  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x643d, (q15_t)0xb067,
-  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x63fe, (q15_t)0xb019,
-  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63c0, (q15_t)0xafca,
-  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x6380, (q15_t)0xaf7c,
-  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x6341, (q15_t)0xaf2e,
-  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x6301, (q15_t)0xaee0,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62c2, (q15_t)0xae92,
-  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x6282, (q15_t)0xae45,
-  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x6241, (q15_t)0xadf8,
-  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x6201, (q15_t)0xadab,
-  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61c0, (q15_t)0xad5e,
-  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x617f, (q15_t)0xad11,
-  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x613e, (q15_t)0xacc5,
-  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x60fc, (q15_t)0xac78,
-  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60ba, (q15_t)0xac2c,
-  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6078, (q15_t)0xabe0,
-  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6036, (q15_t)0xab95,
-  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x5ff4, (q15_t)0xab49,
-  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fb1, (q15_t)0xaafe,
-  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f6e, (q15_t)0xaab3,
-  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f2b, (q15_t)0xaa68,
-  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ee8, (q15_t)0xaa1d,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5ea4, (q15_t)0xa9d3,
-  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e60, (q15_t)0xa989,
-  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e1c, (q15_t)0xa93f,
-  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5dd8, (q15_t)0xa8f5,
-  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5d94, (q15_t)0xa8ab,
-  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d4f, (q15_t)0xa862,
-  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d0a, (q15_t)0xa819,
-  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cc5, (q15_t)0xa7d0,
-  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c80, (q15_t)0xa787,
-  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c3a, (q15_t)0xa73f,
-  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5bf4, (q15_t)0xa6f6,
-  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bae, (q15_t)0xa6ae,
-  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b68, (q15_t)0xa666,
-  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b21, (q15_t)0xa61f,
-  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5adb, (q15_t)0xa5d7,
-  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5a94, (q15_t)0xa590,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a4d, (q15_t)0xa549,
-  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a05, (q15_t)0xa502,
-  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59be, (q15_t)0xa4bb,
-  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5976, (q15_t)0xa475,
-  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x592e, (q15_t)0xa42f,
-  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58e6, (q15_t)0xa3e9,
-  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x589d, (q15_t)0xa3a3,
-  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5855, (q15_t)0xa35e,
-  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x580c, (q15_t)0xa318,
-  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57c3, (q15_t)0xa2d3,
-  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5779, (q15_t)0xa28f,
-  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x5730, (q15_t)0xa24a,
-  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56e6, (q15_t)0xa206,
-  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x569c, (q15_t)0xa1c1,
-  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5652, (q15_t)0xa17e,
-  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5608, (q15_t)0xa13a,
-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55bd, (q15_t)0xa0f6,
-  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5572, (q15_t)0xa0b3,
-  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5528, (q15_t)0xa070,
-  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54dc, (q15_t)0xa02d,
-  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x5491, (q15_t)0x9feb,
-  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5445, (q15_t)0x9fa9,
-  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x53fa, (q15_t)0x9f67,
-  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53ae, (q15_t)0x9f25,
-  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5362, (q15_t)0x9ee3,
-  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5315, (q15_t)0x9ea2,
-  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52c9, (q15_t)0x9e61,
-  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x527c, (q15_t)0x9e20,
-  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x522f, (q15_t)0x9ddf,
-  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51e2, (q15_t)0x9d9f,
-  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x5194, (q15_t)0x9d5e,
-  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5147, (q15_t)0x9d1e,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x50f9, (q15_t)0x9cdf,
-  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ab, (q15_t)0x9c9f,
-  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x505d, (q15_t)0x9c60,
-  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x500f, (q15_t)0x9c21,
-  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fc0, (q15_t)0x9be2,
-  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f71, (q15_t)0x9ba4,
-  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f22, (q15_t)0x9b65,
-  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ed3, (q15_t)0x9b27,
-  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e84, (q15_t)0x9aea,
-  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e34, (q15_t)0x9aac,
-  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4de5, (q15_t)0x9a6f,
-  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4d95, (q15_t)0x9a32,
-  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d45, (q15_t)0x99f5,
-  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4cf5, (q15_t)0x99b8,
-  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4ca4, (q15_t)0x997c,
-  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c54, (q15_t)0x9940,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c03, (q15_t)0x9904,
-  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bb2, (q15_t)0x98c9,
-  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b61, (q15_t)0x988d,
-  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b0f, (q15_t)0x9852,
-  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4abe, (q15_t)0x9817,
-  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a6c, (q15_t)0x97dd,
-  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a1a, (q15_t)0x97a2,
-  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49c8, (q15_t)0x9768,
-  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4976, (q15_t)0x972f,
-  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4923, (q15_t)0x96f5,
-  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48d1, (q15_t)0x96bc,
-  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x487e, (q15_t)0x9683,
-  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x482b, (q15_t)0x964a,
-  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47d8, (q15_t)0x9611,
-  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4785, (q15_t)0x95d9,
-  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4731, (q15_t)0x95a1,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46de, (q15_t)0x9569,
-  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x468a, (q15_t)0x9532,
-  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4636, (q15_t)0x94fa,
-  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45e2, (q15_t)0x94c3,
-  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x458d, (q15_t)0x948d,
-  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4539, (q15_t)0x9456,
-  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44e4, (q15_t)0x9420,
-  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x4490, (q15_t)0x93ea,
-  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x443b, (q15_t)0x93b4,
-  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43e5, (q15_t)0x937f,
-  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x4390, (q15_t)0x9349,
-  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x433b, (q15_t)0x9314,
-  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42e5, (q15_t)0x92e0,
-  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x428f, (q15_t)0x92ab,
-  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4239, (q15_t)0x9277,
-  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41e3, (q15_t)0x9243,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x418d, (q15_t)0x9210,
-  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4136, (q15_t)0x91dc,
-  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40e0, (q15_t)0x91a9,
-  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4089, (q15_t)0x9177,
-  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4032, (q15_t)0x9144,
-  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fdb, (q15_t)0x9112,
-  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f84, (q15_t)0x90e0,
-  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f2d, (q15_t)0x90ae,
-  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ed5, (q15_t)0x907c,
-  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e7d, (q15_t)0x904b,
-  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e26, (q15_t)0x901a,
-  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dce, (q15_t)0x8fea,
-  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d76, (q15_t)0x8fb9,
-  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d1d, (q15_t)0x8f89,
-  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cc5, (q15_t)0x8f59,
-  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c6c, (q15_t)0x8f2a,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c14, (q15_t)0x8efa,
-  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bbb, (q15_t)0x8ecb,
-  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b62, (q15_t)0x8e9c,
-  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b09, (q15_t)0x8e6e,
-  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3aaf, (q15_t)0x8e40,
-  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a56, (q15_t)0x8e12,
-  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x39fd, (q15_t)0x8de4,
-  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39a3, (q15_t)0x8db7,
-  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x3949, (q15_t)0x8d8a,
-  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x38ef, (q15_t)0x8d5d,
-  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x3895, (q15_t)0x8d30,
-  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x383b, (q15_t)0x8d04,
-  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37e0, (q15_t)0x8cd8,
-  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3786, (q15_t)0x8cac,
-  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x372b, (q15_t)0x8c81,
-  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36d0, (q15_t)0x8c55,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3675, (q15_t)0x8c2a,
-  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x361a, (q15_t)0x8c00,
-  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35bf, (q15_t)0x8bd5,
-  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3564, (q15_t)0x8bab,
-  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x3508, (q15_t)0x8b82,
-  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34ad, (q15_t)0x8b58,
-  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3451, (q15_t)0x8b2f,
-  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x33f5, (q15_t)0x8b06,
-  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x3399, (q15_t)0x8add,
-  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x333d, (q15_t)0x8ab5,
-  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32e1, (q15_t)0x8a8d,
-  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3285, (q15_t)0x8a65,
-  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x3228, (q15_t)0x8a3d,
-  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31cc, (q15_t)0x8a16,
-  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x316f, (q15_t)0x89ef,
-  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3112, (q15_t)0x89c8,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30b6, (q15_t)0x89a2,
-  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x3059, (q15_t)0x897c,
-  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x2ffb, (q15_t)0x8956,
-  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2f9e, (q15_t)0x8931,
-  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f41, (q15_t)0x890b,
-  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ee3, (q15_t)0x88e6,
-  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e86, (q15_t)0x88c2,
-  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e28, (q15_t)0x889d,
-  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2dca, (q15_t)0x8879,
-  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d6c, (q15_t)0x8855,
-  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d0e, (q15_t)0x8832,
-  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cb0, (q15_t)0x880f,
-  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c52, (q15_t)0x87ec,
-  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2bf3, (q15_t)0x87c9,
-  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2b95, (q15_t)0x87a7,
-  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b36, (q15_t)0x8784,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ad8, (q15_t)0x8763,
-  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a79, (q15_t)0x8741,
-  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a1a, (q15_t)0x8720,
-  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29bb, (q15_t)0x86ff,
-  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x295c, (q15_t)0x86de,
-  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x28fd, (q15_t)0x86be,
-  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x289d, (q15_t)0x869e,
-  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x283e, (q15_t)0x867e,
-  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27df, (q15_t)0x865f,
-  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x277f, (q15_t)0x8640,
-  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x271f, (q15_t)0x8621,
-  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26c0, (q15_t)0x8602,
-  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2660, (q15_t)0x85e4,
-  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2600, (q15_t)0x85c6,
-  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25a0, (q15_t)0x85a8,
-  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2540, (q15_t)0x858b,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24df, (q15_t)0x856e,
-  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x247f, (q15_t)0x8551,
-  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x241f, (q15_t)0x8534,
-  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23be, (q15_t)0x8518,
-  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x235e, (q15_t)0x84fc,
-  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x22fd, (q15_t)0x84e1,
-  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x229c, (q15_t)0x84c5,
-  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x223b, (q15_t)0x84aa,
-  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21da, (q15_t)0x848f,
-  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x2179, (q15_t)0x8475,
-  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x2118, (q15_t)0x845b,
-  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20b7, (q15_t)0x8441,
-  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2056, (q15_t)0x8427,
-  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x1ff5, (q15_t)0x840e,
-  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1f93, (q15_t)0x83f5,
-  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f32, (q15_t)0x83dd,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ed0, (q15_t)0x83c4,
-  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e6f, (q15_t)0x83ac,
-  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e0d, (q15_t)0x8394,
-  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dab, (q15_t)0x837d,
-  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d49, (q15_t)0x8366,
-  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1ce8, (q15_t)0x834f,
-  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c86, (q15_t)0x8338,
-  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c24, (q15_t)0x8322,
-  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bc1, (q15_t)0x830c,
-  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b5f, (q15_t)0x82f7,
-  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1afd, (q15_t)0x82e1,
-  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1a9b, (q15_t)0x82cc,
-  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a38, (q15_t)0x82b7,
-  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19d6, (q15_t)0x82a3,
-  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1973, (q15_t)0x828f,
-  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1911, (q15_t)0x827b,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18ae, (q15_t)0x8268,
-  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x184c, (q15_t)0x8254,
-  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17e9, (q15_t)0x8241,
-  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1786, (q15_t)0x822f,
-  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1723, (q15_t)0x821c,
-  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16c0, (q15_t)0x820a,
-  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x165d, (q15_t)0x81f9,
-  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x15fa, (q15_t)0x81e7,
-  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x1597, (q15_t)0x81d6,
-  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1534, (q15_t)0x81c5,
-  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14d1, (q15_t)0x81b5,
-  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x146e, (q15_t)0x81a5,
-  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x140b, (q15_t)0x8195,
-  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13a7, (q15_t)0x8185,
-  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1344, (q15_t)0x8176,
-  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12e0, (q15_t)0x8167,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x127d, (q15_t)0x8158,
-  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x1219, (q15_t)0x814a,
-  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11b6, (q15_t)0x813c,
-  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1152, (q15_t)0x812e,
-  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x10ef, (q15_t)0x8121,
-  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x108b, (q15_t)0x8113,
-  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x1027, (q15_t)0x8107,
-  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfc4, (q15_t)0x80fa,
-  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf60, (q15_t)0x80ee,
-  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xefc, (q15_t)0x80e2,
-  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xe98, (q15_t)0x80d6,
-  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe34, (q15_t)0x80cb,
-  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xdd0, (q15_t)0x80c0,
-  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd6c, (q15_t)0x80b5,
-  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd08, (q15_t)0x80ab,
-  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xca4, (q15_t)0x80a1,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc40, (q15_t)0x8097,
-  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbdc, (q15_t)0x808e,
-  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb78, (q15_t)0x8084,
-  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb14, (q15_t)0x807b,
-  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xab0, (q15_t)0x8073,
-  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa4c, (q15_t)0x806b,
-  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9e7, (q15_t)0x8063,
-  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x983, (q15_t)0x805b,
-  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x951, (q15_t)0x8057, (q15_t)0x938, (q15_t)0x8056, (q15_t)0x91f, (q15_t)0x8054,
-  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8bb, (q15_t)0x804d,
-  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x888, (q15_t)0x8049, (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x856, (q15_t)0x8046,
-  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x824, (q15_t)0x8043, (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x7f2, (q15_t)0x8040,
-  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x78e, (q15_t)0x803a,
-  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x742, (q15_t)0x8035, (q15_t)0x729, (q15_t)0x8034,
-  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6c5, (q15_t)0x802e,
-  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x693, (q15_t)0x802c, (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x660, (q15_t)0x8029,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x615, (q15_t)0x8026, (q15_t)0x5fc, (q15_t)0x8024,
-  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x598, (q15_t)0x8020,
-  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x565, (q15_t)0x801e, (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x533, (q15_t)0x801c,
-  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4cf, (q15_t)0x8018,
-  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x483, (q15_t)0x8015, (q15_t)0x46a, (q15_t)0x8014,
-  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x438, (q15_t)0x8012, (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x406, (q15_t)0x8011,
-  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3a1, (q15_t)0x800e,
-  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x356, (q15_t)0x800c, (q15_t)0x33d, (q15_t)0x800b,
-  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2d8, (q15_t)0x8009,
-  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x274, (q15_t)0x8007,
-  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x242, (q15_t)0x8006, (q15_t)0x228, (q15_t)0x8005, (q15_t)0x20f, (q15_t)0x8005,
-  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1ab, (q15_t)0x8003,
-  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x178, (q15_t)0x8003, (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x146, (q15_t)0x8002,
-  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x114, (q15_t)0x8002, (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xe2, (q15_t)0x8001,
-  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xaf, (q15_t)0x8001, (q15_t)0x96, (q15_t)0x8001, (q15_t)0x7d, (q15_t)0x8001,
-  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x32, (q15_t)0x8001, (q15_t)0x19, (q15_t)0x8001
-};
-    const q15_t __ALIGNED(4) cos_factorsQ15_2048[2048] = {
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd,
-  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa,
-  (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6,
-  (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff1, (q15_t)0x7ff0,
-  (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7fea,
-  (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe3, (q15_t)0x7fe2,
-  (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fda, (q15_t)0x7fd9,
-  (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd0, (q15_t)0x7fce,
-  (q15_t)0x7fcd, (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc4, (q15_t)0x7fc3,
-  (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fbe, (q15_t)0x7fbc, (q15_t)0x7fbb, (q15_t)0x7fb9, (q15_t)0x7fb7, (q15_t)0x7fb6,
-  (q15_t)0x7fb4, (q15_t)0x7fb2, (q15_t)0x7fb1, (q15_t)0x7faf, (q15_t)0x7fad, (q15_t)0x7fab, (q15_t)0x7fa9, (q15_t)0x7fa8,
-  (q15_t)0x7fa6, (q15_t)0x7fa4, (q15_t)0x7fa2, (q15_t)0x7fa0, (q15_t)0x7f9e, (q15_t)0x7f9c, (q15_t)0x7f9a, (q15_t)0x7f98,
-  (q15_t)0x7f96, (q15_t)0x7f94, (q15_t)0x7f92, (q15_t)0x7f90, (q15_t)0x7f8e, (q15_t)0x7f8c, (q15_t)0x7f8a, (q15_t)0x7f88,
-  (q15_t)0x7f86, (q15_t)0x7f83, (q15_t)0x7f81, (q15_t)0x7f7f, (q15_t)0x7f7d, (q15_t)0x7f7b, (q15_t)0x7f78, (q15_t)0x7f76,
-  (q15_t)0x7f74, (q15_t)0x7f71, (q15_t)0x7f6f, (q15_t)0x7f6d, (q15_t)0x7f6a, (q15_t)0x7f68, (q15_t)0x7f65, (q15_t)0x7f63,
-  (q15_t)0x7f60, (q15_t)0x7f5e, (q15_t)0x7f5b, (q15_t)0x7f59, (q15_t)0x7f56, (q15_t)0x7f54, (q15_t)0x7f51, (q15_t)0x7f4f,
-  (q15_t)0x7f4c, (q15_t)0x7f49, (q15_t)0x7f47, (q15_t)0x7f44, (q15_t)0x7f41, (q15_t)0x7f3f, (q15_t)0x7f3c, (q15_t)0x7f39,
-  (q15_t)0x7f36, (q15_t)0x7f34, (q15_t)0x7f31, (q15_t)0x7f2e, (q15_t)0x7f2b, (q15_t)0x7f28, (q15_t)0x7f25, (q15_t)0x7f23,
-  (q15_t)0x7f20, (q15_t)0x7f1d, (q15_t)0x7f1a, (q15_t)0x7f17, (q15_t)0x7f14, (q15_t)0x7f11, (q15_t)0x7f0e, (q15_t)0x7f0b,
-  (q15_t)0x7f08, (q15_t)0x7f04, (q15_t)0x7f01, (q15_t)0x7efe, (q15_t)0x7efb, (q15_t)0x7ef8, (q15_t)0x7ef5, (q15_t)0x7ef1,
-  (q15_t)0x7eee, (q15_t)0x7eeb, (q15_t)0x7ee8, (q15_t)0x7ee4, (q15_t)0x7ee1, (q15_t)0x7ede, (q15_t)0x7eda, (q15_t)0x7ed7,
-  (q15_t)0x7ed4, (q15_t)0x7ed0, (q15_t)0x7ecd, (q15_t)0x7ec9, (q15_t)0x7ec6, (q15_t)0x7ec3, (q15_t)0x7ebf, (q15_t)0x7ebb,
-  (q15_t)0x7eb8, (q15_t)0x7eb4, (q15_t)0x7eb1, (q15_t)0x7ead, (q15_t)0x7eaa, (q15_t)0x7ea6, (q15_t)0x7ea2, (q15_t)0x7e9f,
-  (q15_t)0x7e9b, (q15_t)0x7e97, (q15_t)0x7e94, (q15_t)0x7e90, (q15_t)0x7e8c, (q15_t)0x7e88, (q15_t)0x7e84, (q15_t)0x7e81,
-  (q15_t)0x7e7d, (q15_t)0x7e79, (q15_t)0x7e75, (q15_t)0x7e71, (q15_t)0x7e6d, (q15_t)0x7e69, (q15_t)0x7e65, (q15_t)0x7e61,
-  (q15_t)0x7e5d, (q15_t)0x7e59, (q15_t)0x7e55, (q15_t)0x7e51, (q15_t)0x7e4d, (q15_t)0x7e49, (q15_t)0x7e45, (q15_t)0x7e41,
-  (q15_t)0x7e3d, (q15_t)0x7e39, (q15_t)0x7e34, (q15_t)0x7e30, (q15_t)0x7e2c, (q15_t)0x7e28, (q15_t)0x7e24, (q15_t)0x7e1f,
-  (q15_t)0x7e1b, (q15_t)0x7e17, (q15_t)0x7e12, (q15_t)0x7e0e, (q15_t)0x7e0a, (q15_t)0x7e05, (q15_t)0x7e01, (q15_t)0x7dfc,
-  (q15_t)0x7df8, (q15_t)0x7df3, (q15_t)0x7def, (q15_t)0x7dea, (q15_t)0x7de6, (q15_t)0x7de1, (q15_t)0x7ddd, (q15_t)0x7dd8,
-  (q15_t)0x7dd4, (q15_t)0x7dcf, (q15_t)0x7dca, (q15_t)0x7dc6, (q15_t)0x7dc1, (q15_t)0x7dbc, (q15_t)0x7db8, (q15_t)0x7db3,
-  (q15_t)0x7dae, (q15_t)0x7da9, (q15_t)0x7da5, (q15_t)0x7da0, (q15_t)0x7d9b, (q15_t)0x7d96, (q15_t)0x7d91, (q15_t)0x7d8c,
-  (q15_t)0x7d87, (q15_t)0x7d82, (q15_t)0x7d7e, (q15_t)0x7d79, (q15_t)0x7d74, (q15_t)0x7d6f, (q15_t)0x7d6a, (q15_t)0x7d65,
-  (q15_t)0x7d60, (q15_t)0x7d5a, (q15_t)0x7d55, (q15_t)0x7d50, (q15_t)0x7d4b, (q15_t)0x7d46, (q15_t)0x7d41, (q15_t)0x7d3c,
-  (q15_t)0x7d36, (q15_t)0x7d31, (q15_t)0x7d2c, (q15_t)0x7d27, (q15_t)0x7d21, (q15_t)0x7d1c, (q15_t)0x7d17, (q15_t)0x7d11,
-  (q15_t)0x7d0c, (q15_t)0x7d07, (q15_t)0x7d01, (q15_t)0x7cfc, (q15_t)0x7cf6, (q15_t)0x7cf1, (q15_t)0x7cec, (q15_t)0x7ce6,
-  (q15_t)0x7ce1, (q15_t)0x7cdb, (q15_t)0x7cd5, (q15_t)0x7cd0, (q15_t)0x7cca, (q15_t)0x7cc5, (q15_t)0x7cbf, (q15_t)0x7cb9,
-  (q15_t)0x7cb4, (q15_t)0x7cae, (q15_t)0x7ca8, (q15_t)0x7ca3, (q15_t)0x7c9d, (q15_t)0x7c97, (q15_t)0x7c91, (q15_t)0x7c8c,
-  (q15_t)0x7c86, (q15_t)0x7c80, (q15_t)0x7c7a, (q15_t)0x7c74, (q15_t)0x7c6e, (q15_t)0x7c69, (q15_t)0x7c63, (q15_t)0x7c5d,
-  (q15_t)0x7c57, (q15_t)0x7c51, (q15_t)0x7c4b, (q15_t)0x7c45, (q15_t)0x7c3f, (q15_t)0x7c39, (q15_t)0x7c33, (q15_t)0x7c2d,
-  (q15_t)0x7c26, (q15_t)0x7c20, (q15_t)0x7c1a, (q15_t)0x7c14, (q15_t)0x7c0e, (q15_t)0x7c08, (q15_t)0x7c01, (q15_t)0x7bfb,
-  (q15_t)0x7bf5, (q15_t)0x7bef, (q15_t)0x7be8, (q15_t)0x7be2, (q15_t)0x7bdc, (q15_t)0x7bd5, (q15_t)0x7bcf, (q15_t)0x7bc9,
-  (q15_t)0x7bc2, (q15_t)0x7bbc, (q15_t)0x7bb5, (q15_t)0x7baf, (q15_t)0x7ba8, (q15_t)0x7ba2, (q15_t)0x7b9b, (q15_t)0x7b95,
-  (q15_t)0x7b8e, (q15_t)0x7b88, (q15_t)0x7b81, (q15_t)0x7b7a, (q15_t)0x7b74, (q15_t)0x7b6d, (q15_t)0x7b67, (q15_t)0x7b60,
-  (q15_t)0x7b59, (q15_t)0x7b52, (q15_t)0x7b4c, (q15_t)0x7b45, (q15_t)0x7b3e, (q15_t)0x7b37, (q15_t)0x7b31, (q15_t)0x7b2a,
-  (q15_t)0x7b23, (q15_t)0x7b1c, (q15_t)0x7b15, (q15_t)0x7b0e, (q15_t)0x7b07, (q15_t)0x7b00, (q15_t)0x7af9, (q15_t)0x7af2,
-  (q15_t)0x7aeb, (q15_t)0x7ae4, (q15_t)0x7add, (q15_t)0x7ad6, (q15_t)0x7acf, (q15_t)0x7ac8, (q15_t)0x7ac1, (q15_t)0x7aba,
-  (q15_t)0x7ab3, (q15_t)0x7aac, (q15_t)0x7aa4, (q15_t)0x7a9d, (q15_t)0x7a96, (q15_t)0x7a8f, (q15_t)0x7a87, (q15_t)0x7a80,
-  (q15_t)0x7a79, (q15_t)0x7a72, (q15_t)0x7a6a, (q15_t)0x7a63, (q15_t)0x7a5c, (q15_t)0x7a54, (q15_t)0x7a4d, (q15_t)0x7a45,
-  (q15_t)0x7a3e, (q15_t)0x7a36, (q15_t)0x7a2f, (q15_t)0x7a27, (q15_t)0x7a20, (q15_t)0x7a18, (q15_t)0x7a11, (q15_t)0x7a09,
-  (q15_t)0x7a02, (q15_t)0x79fa, (q15_t)0x79f2, (q15_t)0x79eb, (q15_t)0x79e3, (q15_t)0x79db, (q15_t)0x79d4, (q15_t)0x79cc,
-  (q15_t)0x79c4, (q15_t)0x79bc, (q15_t)0x79b5, (q15_t)0x79ad, (q15_t)0x79a5, (q15_t)0x799d, (q15_t)0x7995, (q15_t)0x798e,
-  (q15_t)0x7986, (q15_t)0x797e, (q15_t)0x7976, (q15_t)0x796e, (q15_t)0x7966, (q15_t)0x795e, (q15_t)0x7956, (q15_t)0x794e,
-  (q15_t)0x7946, (q15_t)0x793e, (q15_t)0x7936, (q15_t)0x792e, (q15_t)0x7926, (q15_t)0x791e, (q15_t)0x7915, (q15_t)0x790d,
-  (q15_t)0x7905, (q15_t)0x78fd, (q15_t)0x78f5, (q15_t)0x78ec, (q15_t)0x78e4, (q15_t)0x78dc, (q15_t)0x78d4, (q15_t)0x78cb,
-  (q15_t)0x78c3, (q15_t)0x78bb, (q15_t)0x78b2, (q15_t)0x78aa, (q15_t)0x78a2, (q15_t)0x7899, (q15_t)0x7891, (q15_t)0x7888,
-  (q15_t)0x7880, (q15_t)0x7877, (q15_t)0x786f, (q15_t)0x7866, (q15_t)0x785e, (q15_t)0x7855, (q15_t)0x784d, (q15_t)0x7844,
-  (q15_t)0x783b, (q15_t)0x7833, (q15_t)0x782a, (q15_t)0x7821, (q15_t)0x7819, (q15_t)0x7810, (q15_t)0x7807, (q15_t)0x77ff,
-  (q15_t)0x77f6, (q15_t)0x77ed, (q15_t)0x77e4, (q15_t)0x77db, (q15_t)0x77d3, (q15_t)0x77ca, (q15_t)0x77c1, (q15_t)0x77b8,
-  (q15_t)0x77af, (q15_t)0x77a6, (q15_t)0x779d, (q15_t)0x7794, (q15_t)0x778b, (q15_t)0x7782, (q15_t)0x7779, (q15_t)0x7770,
-  (q15_t)0x7767, (q15_t)0x775e, (q15_t)0x7755, (q15_t)0x774c, (q15_t)0x7743, (q15_t)0x773a, (q15_t)0x7731, (q15_t)0x7727,
-  (q15_t)0x771e, (q15_t)0x7715, (q15_t)0x770c, (q15_t)0x7703, (q15_t)0x76f9, (q15_t)0x76f0, (q15_t)0x76e7, (q15_t)0x76dd,
-  (q15_t)0x76d4, (q15_t)0x76cb, (q15_t)0x76c1, (q15_t)0x76b8, (q15_t)0x76af, (q15_t)0x76a5, (q15_t)0x769c, (q15_t)0x7692,
-  (q15_t)0x7689, (q15_t)0x767f, (q15_t)0x7676, (q15_t)0x766c, (q15_t)0x7663, (q15_t)0x7659, (q15_t)0x7650, (q15_t)0x7646,
-  (q15_t)0x763c, (q15_t)0x7633, (q15_t)0x7629, (q15_t)0x761f, (q15_t)0x7616, (q15_t)0x760c, (q15_t)0x7602, (q15_t)0x75f9,
-  (q15_t)0x75ef, (q15_t)0x75e5, (q15_t)0x75db, (q15_t)0x75d1, (q15_t)0x75c8, (q15_t)0x75be, (q15_t)0x75b4, (q15_t)0x75aa,
-  (q15_t)0x75a0, (q15_t)0x7596, (q15_t)0x758c, (q15_t)0x7582, (q15_t)0x7578, (q15_t)0x756e, (q15_t)0x7564, (q15_t)0x755a,
-  (q15_t)0x7550, (q15_t)0x7546, (q15_t)0x753c, (q15_t)0x7532, (q15_t)0x7528, (q15_t)0x751e, (q15_t)0x7514, (q15_t)0x7509,
-  (q15_t)0x74ff, (q15_t)0x74f5, (q15_t)0x74eb, (q15_t)0x74e1, (q15_t)0x74d6, (q15_t)0x74cc, (q15_t)0x74c2, (q15_t)0x74b7,
-  (q15_t)0x74ad, (q15_t)0x74a3, (q15_t)0x7498, (q15_t)0x748e, (q15_t)0x7484, (q15_t)0x7479, (q15_t)0x746f, (q15_t)0x7464,
-  (q15_t)0x745a, (q15_t)0x744f, (q15_t)0x7445, (q15_t)0x743a, (q15_t)0x7430, (q15_t)0x7425, (q15_t)0x741b, (q15_t)0x7410,
-  (q15_t)0x7406, (q15_t)0x73fb, (q15_t)0x73f0, (q15_t)0x73e6, (q15_t)0x73db, (q15_t)0x73d0, (q15_t)0x73c6, (q15_t)0x73bb,
-  (q15_t)0x73b0, (q15_t)0x73a5, (q15_t)0x739b, (q15_t)0x7390, (q15_t)0x7385, (q15_t)0x737a, (q15_t)0x736f, (q15_t)0x7364,
-  (q15_t)0x7359, (q15_t)0x734f, (q15_t)0x7344, (q15_t)0x7339, (q15_t)0x732e, (q15_t)0x7323, (q15_t)0x7318, (q15_t)0x730d,
-  (q15_t)0x7302, (q15_t)0x72f7, (q15_t)0x72ec, (q15_t)0x72e1, (q15_t)0x72d5, (q15_t)0x72ca, (q15_t)0x72bf, (q15_t)0x72b4,
-  (q15_t)0x72a9, (q15_t)0x729e, (q15_t)0x7293, (q15_t)0x7287, (q15_t)0x727c, (q15_t)0x7271, (q15_t)0x7266, (q15_t)0x725a,
-  (q15_t)0x724f, (q15_t)0x7244, (q15_t)0x7238, (q15_t)0x722d, (q15_t)0x7222, (q15_t)0x7216, (q15_t)0x720b, (q15_t)0x71ff,
-  (q15_t)0x71f4, (q15_t)0x71e9, (q15_t)0x71dd, (q15_t)0x71d2, (q15_t)0x71c6, (q15_t)0x71bb, (q15_t)0x71af, (q15_t)0x71a3,
-  (q15_t)0x7198, (q15_t)0x718c, (q15_t)0x7181, (q15_t)0x7175, (q15_t)0x7169, (q15_t)0x715e, (q15_t)0x7152, (q15_t)0x7146,
-  (q15_t)0x713b, (q15_t)0x712f, (q15_t)0x7123, (q15_t)0x7117, (q15_t)0x710c, (q15_t)0x7100, (q15_t)0x70f4, (q15_t)0x70e8,
-  (q15_t)0x70dc, (q15_t)0x70d1, (q15_t)0x70c5, (q15_t)0x70b9, (q15_t)0x70ad, (q15_t)0x70a1, (q15_t)0x7095, (q15_t)0x7089,
-  (q15_t)0x707d, (q15_t)0x7071, (q15_t)0x7065, (q15_t)0x7059, (q15_t)0x704d, (q15_t)0x7041, (q15_t)0x7035, (q15_t)0x7029,
-  (q15_t)0x701d, (q15_t)0x7010, (q15_t)0x7004, (q15_t)0x6ff8, (q15_t)0x6fec, (q15_t)0x6fe0, (q15_t)0x6fd3, (q15_t)0x6fc7,
-  (q15_t)0x6fbb, (q15_t)0x6faf, (q15_t)0x6fa2, (q15_t)0x6f96, (q15_t)0x6f8a, (q15_t)0x6f7d, (q15_t)0x6f71, (q15_t)0x6f65,
-  (q15_t)0x6f58, (q15_t)0x6f4c, (q15_t)0x6f3f, (q15_t)0x6f33, (q15_t)0x6f27, (q15_t)0x6f1a, (q15_t)0x6f0e, (q15_t)0x6f01,
-  (q15_t)0x6ef5, (q15_t)0x6ee8, (q15_t)0x6edc, (q15_t)0x6ecf, (q15_t)0x6ec2, (q15_t)0x6eb6, (q15_t)0x6ea9, (q15_t)0x6e9c,
-  (q15_t)0x6e90, (q15_t)0x6e83, (q15_t)0x6e76, (q15_t)0x6e6a, (q15_t)0x6e5d, (q15_t)0x6e50, (q15_t)0x6e44, (q15_t)0x6e37,
-  (q15_t)0x6e2a, (q15_t)0x6e1d, (q15_t)0x6e10, (q15_t)0x6e04, (q15_t)0x6df7, (q15_t)0x6dea, (q15_t)0x6ddd, (q15_t)0x6dd0,
-  (q15_t)0x6dc3, (q15_t)0x6db6, (q15_t)0x6da9, (q15_t)0x6d9c, (q15_t)0x6d8f, (q15_t)0x6d82, (q15_t)0x6d75, (q15_t)0x6d68,
-  (q15_t)0x6d5b, (q15_t)0x6d4e, (q15_t)0x6d41, (q15_t)0x6d34, (q15_t)0x6d27, (q15_t)0x6d1a, (q15_t)0x6d0c, (q15_t)0x6cff,
-  (q15_t)0x6cf2, (q15_t)0x6ce5, (q15_t)0x6cd8, (q15_t)0x6cca, (q15_t)0x6cbd, (q15_t)0x6cb0, (q15_t)0x6ca3, (q15_t)0x6c95,
-  (q15_t)0x6c88, (q15_t)0x6c7b, (q15_t)0x6c6d, (q15_t)0x6c60, (q15_t)0x6c53, (q15_t)0x6c45, (q15_t)0x6c38, (q15_t)0x6c2a,
-  (q15_t)0x6c1d, (q15_t)0x6c0f, (q15_t)0x6c02, (q15_t)0x6bf5, (q15_t)0x6be7, (q15_t)0x6bd9, (q15_t)0x6bcc, (q15_t)0x6bbe,
-  (q15_t)0x6bb1, (q15_t)0x6ba3, (q15_t)0x6b96, (q15_t)0x6b88, (q15_t)0x6b7a, (q15_t)0x6b6d, (q15_t)0x6b5f, (q15_t)0x6b51,
-  (q15_t)0x6b44, (q15_t)0x6b36, (q15_t)0x6b28, (q15_t)0x6b1a, (q15_t)0x6b0d, (q15_t)0x6aff, (q15_t)0x6af1, (q15_t)0x6ae3,
-  (q15_t)0x6ad5, (q15_t)0x6ac8, (q15_t)0x6aba, (q15_t)0x6aac, (q15_t)0x6a9e, (q15_t)0x6a90, (q15_t)0x6a82, (q15_t)0x6a74,
-  (q15_t)0x6a66, (q15_t)0x6a58, (q15_t)0x6a4a, (q15_t)0x6a3c, (q15_t)0x6a2e, (q15_t)0x6a20, (q15_t)0x6a12, (q15_t)0x6a04,
-  (q15_t)0x69f6, (q15_t)0x69e8, (q15_t)0x69da, (q15_t)0x69cb, (q15_t)0x69bd, (q15_t)0x69af, (q15_t)0x69a1, (q15_t)0x6993,
-  (q15_t)0x6985, (q15_t)0x6976, (q15_t)0x6968, (q15_t)0x695a, (q15_t)0x694b, (q15_t)0x693d, (q15_t)0x692f, (q15_t)0x6921,
-  (q15_t)0x6912, (q15_t)0x6904, (q15_t)0x68f5, (q15_t)0x68e7, (q15_t)0x68d9, (q15_t)0x68ca, (q15_t)0x68bc, (q15_t)0x68ad,
-  (q15_t)0x689f, (q15_t)0x6890, (q15_t)0x6882, (q15_t)0x6873, (q15_t)0x6865, (q15_t)0x6856, (q15_t)0x6848, (q15_t)0x6839,
-  (q15_t)0x682b, (q15_t)0x681c, (q15_t)0x680d, (q15_t)0x67ff, (q15_t)0x67f0, (q15_t)0x67e1, (q15_t)0x67d3, (q15_t)0x67c4,
-  (q15_t)0x67b5, (q15_t)0x67a6, (q15_t)0x6798, (q15_t)0x6789, (q15_t)0x677a, (q15_t)0x676b, (q15_t)0x675d, (q15_t)0x674e,
-  (q15_t)0x673f, (q15_t)0x6730, (q15_t)0x6721, (q15_t)0x6712, (q15_t)0x6703, (q15_t)0x66f4, (q15_t)0x66e5, (q15_t)0x66d6,
-  (q15_t)0x66c8, (q15_t)0x66b9, (q15_t)0x66aa, (q15_t)0x669b, (q15_t)0x668b, (q15_t)0x667c, (q15_t)0x666d, (q15_t)0x665e,
-  (q15_t)0x664f, (q15_t)0x6640, (q15_t)0x6631, (q15_t)0x6622, (q15_t)0x6613, (q15_t)0x6603, (q15_t)0x65f4, (q15_t)0x65e5,
-  (q15_t)0x65d6, (q15_t)0x65c7, (q15_t)0x65b7, (q15_t)0x65a8, (q15_t)0x6599, (q15_t)0x658a, (q15_t)0x657a, (q15_t)0x656b,
-  (q15_t)0x655c, (q15_t)0x654c, (q15_t)0x653d, (q15_t)0x652d, (q15_t)0x651e, (q15_t)0x650f, (q15_t)0x64ff, (q15_t)0x64f0,
-  (q15_t)0x64e0, (q15_t)0x64d1, (q15_t)0x64c1, (q15_t)0x64b2, (q15_t)0x64a2, (q15_t)0x6493, (q15_t)0x6483, (q15_t)0x6474,
-  (q15_t)0x6464, (q15_t)0x6454, (q15_t)0x6445, (q15_t)0x6435, (q15_t)0x6426, (q15_t)0x6416, (q15_t)0x6406, (q15_t)0x63f7,
-  (q15_t)0x63e7, (q15_t)0x63d7, (q15_t)0x63c7, (q15_t)0x63b8, (q15_t)0x63a8, (q15_t)0x6398, (q15_t)0x6388, (q15_t)0x6378,
-  (q15_t)0x6369, (q15_t)0x6359, (q15_t)0x6349, (q15_t)0x6339, (q15_t)0x6329, (q15_t)0x6319, (q15_t)0x6309, (q15_t)0x62f9,
-  (q15_t)0x62ea, (q15_t)0x62da, (q15_t)0x62ca, (q15_t)0x62ba, (q15_t)0x62aa, (q15_t)0x629a, (q15_t)0x628a, (q15_t)0x627a,
-  (q15_t)0x6269, (q15_t)0x6259, (q15_t)0x6249, (q15_t)0x6239, (q15_t)0x6229, (q15_t)0x6219, (q15_t)0x6209, (q15_t)0x61f9,
-  (q15_t)0x61e8, (q15_t)0x61d8, (q15_t)0x61c8, (q15_t)0x61b8, (q15_t)0x61a8, (q15_t)0x6197, (q15_t)0x6187, (q15_t)0x6177,
-  (q15_t)0x6166, (q15_t)0x6156, (q15_t)0x6146, (q15_t)0x6135, (q15_t)0x6125, (q15_t)0x6115, (q15_t)0x6104, (q15_t)0x60f4,
-  (q15_t)0x60e4, (q15_t)0x60d3, (q15_t)0x60c3, (q15_t)0x60b2, (q15_t)0x60a2, (q15_t)0x6091, (q15_t)0x6081, (q15_t)0x6070,
-  (q15_t)0x6060, (q15_t)0x604f, (q15_t)0x603f, (q15_t)0x602e, (q15_t)0x601d, (q15_t)0x600d, (q15_t)0x5ffc, (q15_t)0x5fec,
-  (q15_t)0x5fdb, (q15_t)0x5fca, (q15_t)0x5fba, (q15_t)0x5fa9, (q15_t)0x5f98, (q15_t)0x5f87, (q15_t)0x5f77, (q15_t)0x5f66,
-  (q15_t)0x5f55, (q15_t)0x5f44, (q15_t)0x5f34, (q15_t)0x5f23, (q15_t)0x5f12, (q15_t)0x5f01, (q15_t)0x5ef0, (q15_t)0x5edf,
-  (q15_t)0x5ecf, (q15_t)0x5ebe, (q15_t)0x5ead, (q15_t)0x5e9c, (q15_t)0x5e8b, (q15_t)0x5e7a, (q15_t)0x5e69, (q15_t)0x5e58,
-  (q15_t)0x5e47, (q15_t)0x5e36, (q15_t)0x5e25, (q15_t)0x5e14, (q15_t)0x5e03, (q15_t)0x5df2, (q15_t)0x5de1, (q15_t)0x5dd0,
-  (q15_t)0x5dbf, (q15_t)0x5dad, (q15_t)0x5d9c, (q15_t)0x5d8b, (q15_t)0x5d7a, (q15_t)0x5d69, (q15_t)0x5d58, (q15_t)0x5d46,
-  (q15_t)0x5d35, (q15_t)0x5d24, (q15_t)0x5d13, (q15_t)0x5d01, (q15_t)0x5cf0, (q15_t)0x5cdf, (q15_t)0x5cce, (q15_t)0x5cbc,
-  (q15_t)0x5cab, (q15_t)0x5c9a, (q15_t)0x5c88, (q15_t)0x5c77, (q15_t)0x5c66, (q15_t)0x5c54, (q15_t)0x5c43, (q15_t)0x5c31,
-  (q15_t)0x5c20, (q15_t)0x5c0e, (q15_t)0x5bfd, (q15_t)0x5beb, (q15_t)0x5bda, (q15_t)0x5bc8, (q15_t)0x5bb7, (q15_t)0x5ba5,
-  (q15_t)0x5b94, (q15_t)0x5b82, (q15_t)0x5b71, (q15_t)0x5b5f, (q15_t)0x5b4d, (q15_t)0x5b3c, (q15_t)0x5b2a, (q15_t)0x5b19,
-  (q15_t)0x5b07, (q15_t)0x5af5, (q15_t)0x5ae4, (q15_t)0x5ad2, (q15_t)0x5ac0, (q15_t)0x5aae, (q15_t)0x5a9d, (q15_t)0x5a8b,
-  (q15_t)0x5a79, (q15_t)0x5a67, (q15_t)0x5a56, (q15_t)0x5a44, (q15_t)0x5a32, (q15_t)0x5a20, (q15_t)0x5a0e, (q15_t)0x59fc,
-  (q15_t)0x59ea, (q15_t)0x59d9, (q15_t)0x59c7, (q15_t)0x59b5, (q15_t)0x59a3, (q15_t)0x5991, (q15_t)0x597f, (q15_t)0x596d,
-  (q15_t)0x595b, (q15_t)0x5949, (q15_t)0x5937, (q15_t)0x5925, (q15_t)0x5913, (q15_t)0x5901, (q15_t)0x58ef, (q15_t)0x58dd,
-  (q15_t)0x58cb, (q15_t)0x58b8, (q15_t)0x58a6, (q15_t)0x5894, (q15_t)0x5882, (q15_t)0x5870, (q15_t)0x585e, (q15_t)0x584b,
-  (q15_t)0x5839, (q15_t)0x5827, (q15_t)0x5815, (q15_t)0x5803, (q15_t)0x57f0, (q15_t)0x57de, (q15_t)0x57cc, (q15_t)0x57b9,
-  (q15_t)0x57a7, (q15_t)0x5795, (q15_t)0x5783, (q15_t)0x5770, (q15_t)0x575e, (q15_t)0x574b, (q15_t)0x5739, (q15_t)0x5727,
-  (q15_t)0x5714, (q15_t)0x5702, (q15_t)0x56ef, (q15_t)0x56dd, (q15_t)0x56ca, (q15_t)0x56b8, (q15_t)0x56a5, (q15_t)0x5693,
-  (q15_t)0x5680, (q15_t)0x566e, (q15_t)0x565b, (q15_t)0x5649, (q15_t)0x5636, (q15_t)0x5624, (q15_t)0x5611, (q15_t)0x55fe,
-  (q15_t)0x55ec, (q15_t)0x55d9, (q15_t)0x55c7, (q15_t)0x55b4, (q15_t)0x55a1, (q15_t)0x558f, (q15_t)0x557c, (q15_t)0x5569,
-  (q15_t)0x5556, (q15_t)0x5544, (q15_t)0x5531, (q15_t)0x551e, (q15_t)0x550b, (q15_t)0x54f9, (q15_t)0x54e6, (q15_t)0x54d3,
-  (q15_t)0x54c0, (q15_t)0x54ad, (q15_t)0x549a, (q15_t)0x5488, (q15_t)0x5475, (q15_t)0x5462, (q15_t)0x544f, (q15_t)0x543c,
-  (q15_t)0x5429, (q15_t)0x5416, (q15_t)0x5403, (q15_t)0x53f0, (q15_t)0x53dd, (q15_t)0x53ca, (q15_t)0x53b7, (q15_t)0x53a4,
-  (q15_t)0x5391, (q15_t)0x537e, (q15_t)0x536b, (q15_t)0x5358, (q15_t)0x5345, (q15_t)0x5332, (q15_t)0x531f, (q15_t)0x530c,
-  (q15_t)0x52f8, (q15_t)0x52e5, (q15_t)0x52d2, (q15_t)0x52bf, (q15_t)0x52ac, (q15_t)0x5299, (q15_t)0x5285, (q15_t)0x5272,
-  (q15_t)0x525f, (q15_t)0x524c, (q15_t)0x5238, (q15_t)0x5225, (q15_t)0x5212, (q15_t)0x51ff, (q15_t)0x51eb, (q15_t)0x51d8,
-  (q15_t)0x51c5, (q15_t)0x51b1, (q15_t)0x519e, (q15_t)0x518b, (q15_t)0x5177, (q15_t)0x5164, (q15_t)0x5150, (q15_t)0x513d,
-  (q15_t)0x512a, (q15_t)0x5116, (q15_t)0x5103, (q15_t)0x50ef, (q15_t)0x50dc, (q15_t)0x50c8, (q15_t)0x50b5, (q15_t)0x50a1,
-  (q15_t)0x508e, (q15_t)0x507a, (q15_t)0x5067, (q15_t)0x5053, (q15_t)0x503f, (q15_t)0x502c, (q15_t)0x5018, (q15_t)0x5005,
-  (q15_t)0x4ff1, (q15_t)0x4fdd, (q15_t)0x4fca, (q15_t)0x4fb6, (q15_t)0x4fa2, (q15_t)0x4f8f, (q15_t)0x4f7b, (q15_t)0x4f67,
-  (q15_t)0x4f54, (q15_t)0x4f40, (q15_t)0x4f2c, (q15_t)0x4f18, (q15_t)0x4f05, (q15_t)0x4ef1, (q15_t)0x4edd, (q15_t)0x4ec9,
-  (q15_t)0x4eb6, (q15_t)0x4ea2, (q15_t)0x4e8e, (q15_t)0x4e7a, (q15_t)0x4e66, (q15_t)0x4e52, (q15_t)0x4e3e, (q15_t)0x4e2a,
-  (q15_t)0x4e17, (q15_t)0x4e03, (q15_t)0x4def, (q15_t)0x4ddb, (q15_t)0x4dc7, (q15_t)0x4db3, (q15_t)0x4d9f, (q15_t)0x4d8b,
-  (q15_t)0x4d77, (q15_t)0x4d63, (q15_t)0x4d4f, (q15_t)0x4d3b, (q15_t)0x4d27, (q15_t)0x4d13, (q15_t)0x4cff, (q15_t)0x4ceb,
-  (q15_t)0x4cd6, (q15_t)0x4cc2, (q15_t)0x4cae, (q15_t)0x4c9a, (q15_t)0x4c86, (q15_t)0x4c72, (q15_t)0x4c5e, (q15_t)0x4c49,
-  (q15_t)0x4c35, (q15_t)0x4c21, (q15_t)0x4c0d, (q15_t)0x4bf9, (q15_t)0x4be4, (q15_t)0x4bd0, (q15_t)0x4bbc, (q15_t)0x4ba8,
-  (q15_t)0x4b93, (q15_t)0x4b7f, (q15_t)0x4b6b, (q15_t)0x4b56, (q15_t)0x4b42, (q15_t)0x4b2e, (q15_t)0x4b19, (q15_t)0x4b05,
-  (q15_t)0x4af1, (q15_t)0x4adc, (q15_t)0x4ac8, (q15_t)0x4ab4, (q15_t)0x4a9f, (q15_t)0x4a8b, (q15_t)0x4a76, (q15_t)0x4a62,
-  (q15_t)0x4a4d, (q15_t)0x4a39, (q15_t)0x4a24, (q15_t)0x4a10, (q15_t)0x49fb, (q15_t)0x49e7, (q15_t)0x49d2, (q15_t)0x49be,
-  (q15_t)0x49a9, (q15_t)0x4995, (q15_t)0x4980, (q15_t)0x496c, (q15_t)0x4957, (q15_t)0x4942, (q15_t)0x492e, (q15_t)0x4919,
-  (q15_t)0x4905, (q15_t)0x48f0, (q15_t)0x48db, (q15_t)0x48c7, (q15_t)0x48b2, (q15_t)0x489d, (q15_t)0x4888, (q15_t)0x4874,
-  (q15_t)0x485f, (q15_t)0x484a, (q15_t)0x4836, (q15_t)0x4821, (q15_t)0x480c, (q15_t)0x47f7, (q15_t)0x47e2, (q15_t)0x47ce,
-  (q15_t)0x47b9, (q15_t)0x47a4, (q15_t)0x478f, (q15_t)0x477a, (q15_t)0x4765, (q15_t)0x4751, (q15_t)0x473c, (q15_t)0x4727,
-  (q15_t)0x4712, (q15_t)0x46fd, (q15_t)0x46e8, (q15_t)0x46d3, (q15_t)0x46be, (q15_t)0x46a9, (q15_t)0x4694, (q15_t)0x467f,
-  (q15_t)0x466a, (q15_t)0x4655, (q15_t)0x4640, (q15_t)0x462b, (q15_t)0x4616, (q15_t)0x4601, (q15_t)0x45ec, (q15_t)0x45d7,
-  (q15_t)0x45c2, (q15_t)0x45ad, (q15_t)0x4598, (q15_t)0x4583, (q15_t)0x456e, (q15_t)0x4559, (q15_t)0x4544, (q15_t)0x452e,
-  (q15_t)0x4519, (q15_t)0x4504, (q15_t)0x44ef, (q15_t)0x44da, (q15_t)0x44c5, (q15_t)0x44af, (q15_t)0x449a, (q15_t)0x4485,
-  (q15_t)0x4470, (q15_t)0x445a, (q15_t)0x4445, (q15_t)0x4430, (q15_t)0x441b, (q15_t)0x4405, (q15_t)0x43f0, (q15_t)0x43db,
-  (q15_t)0x43c5, (q15_t)0x43b0, (q15_t)0x439b, (q15_t)0x4385, (q15_t)0x4370, (q15_t)0x435b, (q15_t)0x4345, (q15_t)0x4330,
-  (q15_t)0x431b, (q15_t)0x4305, (q15_t)0x42f0, (q15_t)0x42da, (q15_t)0x42c5, (q15_t)0x42af, (q15_t)0x429a, (q15_t)0x4284,
-  (q15_t)0x426f, (q15_t)0x425a, (q15_t)0x4244, (q15_t)0x422f, (q15_t)0x4219, (q15_t)0x4203, (q15_t)0x41ee, (q15_t)0x41d8,
-  (q15_t)0x41c3, (q15_t)0x41ad, (q15_t)0x4198, (q15_t)0x4182, (q15_t)0x416d, (q15_t)0x4157, (q15_t)0x4141, (q15_t)0x412c,
-  (q15_t)0x4116, (q15_t)0x4100, (q15_t)0x40eb, (q15_t)0x40d5, (q15_t)0x40bf, (q15_t)0x40aa, (q15_t)0x4094, (q15_t)0x407e,
-  (q15_t)0x4069, (q15_t)0x4053, (q15_t)0x403d, (q15_t)0x4027, (q15_t)0x4012, (q15_t)0x3ffc, (q15_t)0x3fe6, (q15_t)0x3fd0,
-  (q15_t)0x3fbb, (q15_t)0x3fa5, (q15_t)0x3f8f, (q15_t)0x3f79, (q15_t)0x3f63, (q15_t)0x3f4d, (q15_t)0x3f38, (q15_t)0x3f22,
-  (q15_t)0x3f0c, (q15_t)0x3ef6, (q15_t)0x3ee0, (q15_t)0x3eca, (q15_t)0x3eb4, (q15_t)0x3e9e, (q15_t)0x3e88, (q15_t)0x3e73,
-  (q15_t)0x3e5d, (q15_t)0x3e47, (q15_t)0x3e31, (q15_t)0x3e1b, (q15_t)0x3e05, (q15_t)0x3def, (q15_t)0x3dd9, (q15_t)0x3dc3,
-  (q15_t)0x3dad, (q15_t)0x3d97, (q15_t)0x3d81, (q15_t)0x3d6b, (q15_t)0x3d55, (q15_t)0x3d3e, (q15_t)0x3d28, (q15_t)0x3d12,
-  (q15_t)0x3cfc, (q15_t)0x3ce6, (q15_t)0x3cd0, (q15_t)0x3cba, (q15_t)0x3ca4, (q15_t)0x3c8e, (q15_t)0x3c77, (q15_t)0x3c61,
-  (q15_t)0x3c4b, (q15_t)0x3c35, (q15_t)0x3c1f, (q15_t)0x3c09, (q15_t)0x3bf2, (q15_t)0x3bdc, (q15_t)0x3bc6, (q15_t)0x3bb0,
-  (q15_t)0x3b99, (q15_t)0x3b83, (q15_t)0x3b6d, (q15_t)0x3b57, (q15_t)0x3b40, (q15_t)0x3b2a, (q15_t)0x3b14, (q15_t)0x3afe,
-  (q15_t)0x3ae7, (q15_t)0x3ad1, (q15_t)0x3abb, (q15_t)0x3aa4, (q15_t)0x3a8e, (q15_t)0x3a78, (q15_t)0x3a61, (q15_t)0x3a4b,
-  (q15_t)0x3a34, (q15_t)0x3a1e, (q15_t)0x3a08, (q15_t)0x39f1, (q15_t)0x39db, (q15_t)0x39c4, (q15_t)0x39ae, (q15_t)0x3998,
-  (q15_t)0x3981, (q15_t)0x396b, (q15_t)0x3954, (q15_t)0x393e, (q15_t)0x3927, (q15_t)0x3911, (q15_t)0x38fa, (q15_t)0x38e4,
-  (q15_t)0x38cd, (q15_t)0x38b7, (q15_t)0x38a0, (q15_t)0x388a, (q15_t)0x3873, (q15_t)0x385d, (q15_t)0x3846, (q15_t)0x382f,
-  (q15_t)0x3819, (q15_t)0x3802, (q15_t)0x37ec, (q15_t)0x37d5, (q15_t)0x37be, (q15_t)0x37a8, (q15_t)0x3791, (q15_t)0x377a,
-  (q15_t)0x3764, (q15_t)0x374d, (q15_t)0x3736, (q15_t)0x3720, (q15_t)0x3709, (q15_t)0x36f2, (q15_t)0x36dc, (q15_t)0x36c5,
-  (q15_t)0x36ae, (q15_t)0x3698, (q15_t)0x3681, (q15_t)0x366a, (q15_t)0x3653, (q15_t)0x363d, (q15_t)0x3626, (q15_t)0x360f,
-  (q15_t)0x35f8, (q15_t)0x35e1, (q15_t)0x35cb, (q15_t)0x35b4, (q15_t)0x359d, (q15_t)0x3586, (q15_t)0x356f, (q15_t)0x3558,
-  (q15_t)0x3542, (q15_t)0x352b, (q15_t)0x3514, (q15_t)0x34fd, (q15_t)0x34e6, (q15_t)0x34cf, (q15_t)0x34b8, (q15_t)0x34a1,
-  (q15_t)0x348b, (q15_t)0x3474, (q15_t)0x345d, (q15_t)0x3446, (q15_t)0x342f, (q15_t)0x3418, (q15_t)0x3401, (q15_t)0x33ea,
-  (q15_t)0x33d3, (q15_t)0x33bc, (q15_t)0x33a5, (q15_t)0x338e, (q15_t)0x3377, (q15_t)0x3360, (q15_t)0x3349, (q15_t)0x3332,
-  (q15_t)0x331b, (q15_t)0x3304, (q15_t)0x32ed, (q15_t)0x32d6, (q15_t)0x32bf, (q15_t)0x32a8, (q15_t)0x3290, (q15_t)0x3279,
-  (q15_t)0x3262, (q15_t)0x324b, (q15_t)0x3234, (q15_t)0x321d, (q15_t)0x3206, (q15_t)0x31ef, (q15_t)0x31d8, (q15_t)0x31c0,
-  (q15_t)0x31a9, (q15_t)0x3192, (q15_t)0x317b, (q15_t)0x3164, (q15_t)0x314c, (q15_t)0x3135, (q15_t)0x311e, (q15_t)0x3107,
-  (q15_t)0x30f0, (q15_t)0x30d8, (q15_t)0x30c1, (q15_t)0x30aa, (q15_t)0x3093, (q15_t)0x307b, (q15_t)0x3064, (q15_t)0x304d,
-  (q15_t)0x3036, (q15_t)0x301e, (q15_t)0x3007, (q15_t)0x2ff0, (q15_t)0x2fd8, (q15_t)0x2fc1, (q15_t)0x2faa, (q15_t)0x2f92,
-  (q15_t)0x2f7b, (q15_t)0x2f64, (q15_t)0x2f4c, (q15_t)0x2f35, (q15_t)0x2f1e, (q15_t)0x2f06, (q15_t)0x2eef, (q15_t)0x2ed8,
-  (q15_t)0x2ec0, (q15_t)0x2ea9, (q15_t)0x2e91, (q15_t)0x2e7a, (q15_t)0x2e63, (q15_t)0x2e4b, (q15_t)0x2e34, (q15_t)0x2e1c,
-  (q15_t)0x2e05, (q15_t)0x2ded, (q15_t)0x2dd6, (q15_t)0x2dbe, (q15_t)0x2da7, (q15_t)0x2d8f, (q15_t)0x2d78, (q15_t)0x2d60,
-  (q15_t)0x2d49, (q15_t)0x2d31, (q15_t)0x2d1a, (q15_t)0x2d02, (q15_t)0x2ceb, (q15_t)0x2cd3, (q15_t)0x2cbc, (q15_t)0x2ca4,
-  (q15_t)0x2c8d, (q15_t)0x2c75, (q15_t)0x2c5e, (q15_t)0x2c46, (q15_t)0x2c2e, (q15_t)0x2c17, (q15_t)0x2bff, (q15_t)0x2be8,
-  (q15_t)0x2bd0, (q15_t)0x2bb8, (q15_t)0x2ba1, (q15_t)0x2b89, (q15_t)0x2b71, (q15_t)0x2b5a, (q15_t)0x2b42, (q15_t)0x2b2b,
-  (q15_t)0x2b13, (q15_t)0x2afb, (q15_t)0x2ae4, (q15_t)0x2acc, (q15_t)0x2ab4, (q15_t)0x2a9c, (q15_t)0x2a85, (q15_t)0x2a6d,
-  (q15_t)0x2a55, (q15_t)0x2a3e, (q15_t)0x2a26, (q15_t)0x2a0e, (q15_t)0x29f6, (q15_t)0x29df, (q15_t)0x29c7, (q15_t)0x29af,
-  (q15_t)0x2997, (q15_t)0x2980, (q15_t)0x2968, (q15_t)0x2950, (q15_t)0x2938, (q15_t)0x2920, (q15_t)0x2909, (q15_t)0x28f1,
-  (q15_t)0x28d9, (q15_t)0x28c1, (q15_t)0x28a9, (q15_t)0x2892, (q15_t)0x287a, (q15_t)0x2862, (q15_t)0x284a, (q15_t)0x2832,
-  (q15_t)0x281a, (q15_t)0x2802, (q15_t)0x27eb, (q15_t)0x27d3, (q15_t)0x27bb, (q15_t)0x27a3, (q15_t)0x278b, (q15_t)0x2773,
-  (q15_t)0x275b, (q15_t)0x2743, (q15_t)0x272b, (q15_t)0x2713, (q15_t)0x26fb, (q15_t)0x26e4, (q15_t)0x26cc, (q15_t)0x26b4,
-  (q15_t)0x269c, (q15_t)0x2684, (q15_t)0x266c, (q15_t)0x2654, (q15_t)0x263c, (q15_t)0x2624, (q15_t)0x260c, (q15_t)0x25f4,
-  (q15_t)0x25dc, (q15_t)0x25c4, (q15_t)0x25ac, (q15_t)0x2594, (q15_t)0x257c, (q15_t)0x2564, (q15_t)0x254c, (q15_t)0x2534,
-  (q15_t)0x251c, (q15_t)0x2503, (q15_t)0x24eb, (q15_t)0x24d3, (q15_t)0x24bb, (q15_t)0x24a3, (q15_t)0x248b, (q15_t)0x2473,
-  (q15_t)0x245b, (q15_t)0x2443, (q15_t)0x242b, (q15_t)0x2413, (q15_t)0x23fa, (q15_t)0x23e2, (q15_t)0x23ca, (q15_t)0x23b2,
-  (q15_t)0x239a, (q15_t)0x2382, (q15_t)0x236a, (q15_t)0x2352, (q15_t)0x2339, (q15_t)0x2321, (q15_t)0x2309, (q15_t)0x22f1,
-  (q15_t)0x22d9, (q15_t)0x22c0, (q15_t)0x22a8, (q15_t)0x2290, (q15_t)0x2278, (q15_t)0x2260, (q15_t)0x2247, (q15_t)0x222f,
-  (q15_t)0x2217, (q15_t)0x21ff, (q15_t)0x21e7, (q15_t)0x21ce, (q15_t)0x21b6, (q15_t)0x219e, (q15_t)0x2186, (q15_t)0x216d,
-  (q15_t)0x2155, (q15_t)0x213d, (q15_t)0x2125, (q15_t)0x210c, (q15_t)0x20f4, (q15_t)0x20dc, (q15_t)0x20c3, (q15_t)0x20ab,
-  (q15_t)0x2093, (q15_t)0x207a, (q15_t)0x2062, (q15_t)0x204a, (q15_t)0x2032, (q15_t)0x2019, (q15_t)0x2001, (q15_t)0x1fe9,
-  (q15_t)0x1fd0, (q15_t)0x1fb8, (q15_t)0x1f9f, (q15_t)0x1f87, (q15_t)0x1f6f, (q15_t)0x1f56, (q15_t)0x1f3e, (q15_t)0x1f26,
-  (q15_t)0x1f0d, (q15_t)0x1ef5, (q15_t)0x1edd, (q15_t)0x1ec4, (q15_t)0x1eac, (q15_t)0x1e93, (q15_t)0x1e7b, (q15_t)0x1e62,
-  (q15_t)0x1e4a, (q15_t)0x1e32, (q15_t)0x1e19, (q15_t)0x1e01, (q15_t)0x1de8, (q15_t)0x1dd0, (q15_t)0x1db7, (q15_t)0x1d9f,
-  (q15_t)0x1d87, (q15_t)0x1d6e, (q15_t)0x1d56, (q15_t)0x1d3d, (q15_t)0x1d25, (q15_t)0x1d0c, (q15_t)0x1cf4, (q15_t)0x1cdb,
-  (q15_t)0x1cc3, (q15_t)0x1caa, (q15_t)0x1c92, (q15_t)0x1c79, (q15_t)0x1c61, (q15_t)0x1c48, (q15_t)0x1c30, (q15_t)0x1c17,
-  (q15_t)0x1bff, (q15_t)0x1be6, (q15_t)0x1bce, (q15_t)0x1bb5, (q15_t)0x1b9d, (q15_t)0x1b84, (q15_t)0x1b6c, (q15_t)0x1b53,
-  (q15_t)0x1b3a, (q15_t)0x1b22, (q15_t)0x1b09, (q15_t)0x1af1, (q15_t)0x1ad8, (q15_t)0x1ac0, (q15_t)0x1aa7, (q15_t)0x1a8e,
-  (q15_t)0x1a76, (q15_t)0x1a5d, (q15_t)0x1a45, (q15_t)0x1a2c, (q15_t)0x1a13, (q15_t)0x19fb, (q15_t)0x19e2, (q15_t)0x19ca,
-  (q15_t)0x19b1, (q15_t)0x1998, (q15_t)0x1980, (q15_t)0x1967, (q15_t)0x194e, (q15_t)0x1936, (q15_t)0x191d, (q15_t)0x1905,
-  (q15_t)0x18ec, (q15_t)0x18d3, (q15_t)0x18bb, (q15_t)0x18a2, (q15_t)0x1889, (q15_t)0x1871, (q15_t)0x1858, (q15_t)0x183f,
-  (q15_t)0x1827, (q15_t)0x180e, (q15_t)0x17f5, (q15_t)0x17dd, (q15_t)0x17c4, (q15_t)0x17ab, (q15_t)0x1792, (q15_t)0x177a,
-  (q15_t)0x1761, (q15_t)0x1748, (q15_t)0x1730, (q15_t)0x1717, (q15_t)0x16fe, (q15_t)0x16e5, (q15_t)0x16cd, (q15_t)0x16b4,
-  (q15_t)0x169b, (q15_t)0x1682, (q15_t)0x166a, (q15_t)0x1651, (q15_t)0x1638, (q15_t)0x161f, (q15_t)0x1607, (q15_t)0x15ee,
-  (q15_t)0x15d5, (q15_t)0x15bc, (q15_t)0x15a4, (q15_t)0x158b, (q15_t)0x1572, (q15_t)0x1559, (q15_t)0x1541, (q15_t)0x1528,
-  (q15_t)0x150f, (q15_t)0x14f6, (q15_t)0x14dd, (q15_t)0x14c5, (q15_t)0x14ac, (q15_t)0x1493, (q15_t)0x147a, (q15_t)0x1461,
-  (q15_t)0x1449, (q15_t)0x1430, (q15_t)0x1417, (q15_t)0x13fe, (q15_t)0x13e5, (q15_t)0x13cc, (q15_t)0x13b4, (q15_t)0x139b,
-  (q15_t)0x1382, (q15_t)0x1369, (q15_t)0x1350, (q15_t)0x1337, (q15_t)0x131f, (q15_t)0x1306, (q15_t)0x12ed, (q15_t)0x12d4,
-  (q15_t)0x12bb, (q15_t)0x12a2, (q15_t)0x1289, (q15_t)0x1271, (q15_t)0x1258, (q15_t)0x123f, (q15_t)0x1226, (q15_t)0x120d,
-  (q15_t)0x11f4, (q15_t)0x11db, (q15_t)0x11c2, (q15_t)0x11a9, (q15_t)0x1191, (q15_t)0x1178, (q15_t)0x115f, (q15_t)0x1146,
-  (q15_t)0x112d, (q15_t)0x1114, (q15_t)0x10fb, (q15_t)0x10e2, (q15_t)0x10c9, (q15_t)0x10b0, (q15_t)0x1098, (q15_t)0x107f,
-  (q15_t)0x1066, (q15_t)0x104d, (q15_t)0x1034, (q15_t)0x101b, (q15_t)0x1002, (q15_t)0xfe9, (q15_t)0xfd0, (q15_t)0xfb7,
-  (q15_t)0xf9e, (q15_t)0xf85, (q15_t)0xf6c, (q15_t)0xf53, (q15_t)0xf3a, (q15_t)0xf21, (q15_t)0xf08, (q15_t)0xef0,
-  (q15_t)0xed7, (q15_t)0xebe, (q15_t)0xea5, (q15_t)0xe8c, (q15_t)0xe73, (q15_t)0xe5a, (q15_t)0xe41, (q15_t)0xe28,
-  (q15_t)0xe0f, (q15_t)0xdf6, (q15_t)0xddd, (q15_t)0xdc4, (q15_t)0xdab, (q15_t)0xd92, (q15_t)0xd79, (q15_t)0xd60,
-  (q15_t)0xd47, (q15_t)0xd2e, (q15_t)0xd15, (q15_t)0xcfc, (q15_t)0xce3, (q15_t)0xcca, (q15_t)0xcb1, (q15_t)0xc98,
-  (q15_t)0xc7f, (q15_t)0xc66, (q15_t)0xc4d, (q15_t)0xc34, (q15_t)0xc1b, (q15_t)0xc02, (q15_t)0xbe9, (q15_t)0xbd0,
-  (q15_t)0xbb7, (q15_t)0xb9e, (q15_t)0xb85, (q15_t)0xb6c, (q15_t)0xb53, (q15_t)0xb3a, (q15_t)0xb20, (q15_t)0xb07,
-  (q15_t)0xaee, (q15_t)0xad5, (q15_t)0xabc, (q15_t)0xaa3, (q15_t)0xa8a, (q15_t)0xa71, (q15_t)0xa58, (q15_t)0xa3f,
-  (q15_t)0xa26, (q15_t)0xa0d, (q15_t)0x9f4, (q15_t)0x9db, (q15_t)0x9c2, (q15_t)0x9a9, (q15_t)0x990, (q15_t)0x977,
-  (q15_t)0x95e, (q15_t)0x944, (q15_t)0x92b, (q15_t)0x912, (q15_t)0x8f9, (q15_t)0x8e0, (q15_t)0x8c7, (q15_t)0x8ae,
-  (q15_t)0x895, (q15_t)0x87c, (q15_t)0x863, (q15_t)0x84a, (q15_t)0x831, (q15_t)0x818, (q15_t)0x7fe, (q15_t)0x7e5,
-  (q15_t)0x7cc, (q15_t)0x7b3, (q15_t)0x79a, (q15_t)0x781, (q15_t)0x768, (q15_t)0x74f, (q15_t)0x736, (q15_t)0x71d,
-  (q15_t)0x704, (q15_t)0x6ea, (q15_t)0x6d1, (q15_t)0x6b8, (q15_t)0x69f, (q15_t)0x686, (q15_t)0x66d, (q15_t)0x654,
-  (q15_t)0x63b, (q15_t)0x622, (q15_t)0x609, (q15_t)0x5ef, (q15_t)0x5d6, (q15_t)0x5bd, (q15_t)0x5a4, (q15_t)0x58b,
-  (q15_t)0x572, (q15_t)0x559, (q15_t)0x540, (q15_t)0x527, (q15_t)0x50d, (q15_t)0x4f4, (q15_t)0x4db, (q15_t)0x4c2,
-  (q15_t)0x4a9, (q15_t)0x490, (q15_t)0x477, (q15_t)0x45e, (q15_t)0x445, (q15_t)0x42b, (q15_t)0x412, (q15_t)0x3f9,
-  (q15_t)0x3e0, (q15_t)0x3c7, (q15_t)0x3ae, (q15_t)0x395, (q15_t)0x37c, (q15_t)0x362, (q15_t)0x349, (q15_t)0x330,
-  (q15_t)0x317, (q15_t)0x2fe, (q15_t)0x2e5, (q15_t)0x2cc, (q15_t)0x2b3, (q15_t)0x299, (q15_t)0x280, (q15_t)0x267,
-  (q15_t)0x24e, (q15_t)0x235, (q15_t)0x21c, (q15_t)0x203, (q15_t)0x1ea, (q15_t)0x1d0, (q15_t)0x1b7, (q15_t)0x19e,
-  (q15_t)0x185, (q15_t)0x16c, (q15_t)0x153, (q15_t)0x13a, (q15_t)0x121, (q15_t)0x107, (q15_t)0xee, (q15_t)0xd5,
-  (q15_t)0xbc, (q15_t)0xa3, (q15_t)0x8a, (q15_t)0x71, (q15_t)0x57, (q15_t)0x3e, (q15_t)0x25, (q15_t)0xc
-
-};
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
-    const q15_t __ALIGNED(4) WeightsQ15_8192[16384] = {
-  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff, (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee,
-  (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff, (q15_t)0xffd5,
-  (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8, (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb,
-  (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffaf, (q15_t)0x7fff, (q15_t)0xffa9, (q15_t)0x7fff, (q15_t)0xffa2,
-  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff96, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff89,
-  (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff7d, (q15_t)0x7fff, (q15_t)0xff76, (q15_t)0x7fff, (q15_t)0xff70,
-  (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff63, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff57,
-  (q15_t)0x7fff, (q15_t)0xff51, (q15_t)0x7fff, (q15_t)0xff4a, (q15_t)0x7fff, (q15_t)0xff44, (q15_t)0x7fff, (q15_t)0xff3e,
-  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff31, (q15_t)0x7fff, (q15_t)0xff2b, (q15_t)0x7fff, (q15_t)0xff25,
-  (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff18, (q15_t)0x7fff, (q15_t)0xff12, (q15_t)0x7fff, (q15_t)0xff0b,
-  (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeff, (q15_t)0x7ffe, (q15_t)0xfef9, (q15_t)0x7ffe, (q15_t)0xfef2,
-  (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffe, (q15_t)0xfee6, (q15_t)0x7ffe, (q15_t)0xfedf, (q15_t)0x7ffe, (q15_t)0xfed9,
-  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfecd, (q15_t)0x7ffe, (q15_t)0xfec6, (q15_t)0x7ffe, (q15_t)0xfec0,
-  (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfeb3, (q15_t)0x7ffe, (q15_t)0xfead, (q15_t)0x7ffe, (q15_t)0xfea7,
-  (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffe, (q15_t)0xfe9a, (q15_t)0x7ffd, (q15_t)0xfe94, (q15_t)0x7ffd, (q15_t)0xfe8e,
-  (q15_t)0x7ffd, (q15_t)0xfe88, (q15_t)0x7ffd, (q15_t)0xfe81, (q15_t)0x7ffd, (q15_t)0xfe7b, (q15_t)0x7ffd, (q15_t)0xfe75,
-  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe68, (q15_t)0x7ffd, (q15_t)0xfe62, (q15_t)0x7ffd, (q15_t)0xfe5c,
-  (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffd, (q15_t)0xfe4f, (q15_t)0x7ffd, (q15_t)0xfe49, (q15_t)0x7ffc, (q15_t)0xfe42,
-  (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe36, (q15_t)0x7ffc, (q15_t)0xfe30, (q15_t)0x7ffc, (q15_t)0xfe29,
-  (q15_t)0x7ffc, (q15_t)0xfe23, (q15_t)0x7ffc, (q15_t)0xfe1d, (q15_t)0x7ffc, (q15_t)0xfe16, (q15_t)0x7ffc, (q15_t)0xfe10,
-  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffc, (q15_t)0xfe04, (q15_t)0x7ffb, (q15_t)0xfdfd, (q15_t)0x7ffb, (q15_t)0xfdf7,
-  (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdea, (q15_t)0x7ffb, (q15_t)0xfde4, (q15_t)0x7ffb, (q15_t)0xfdde,
-  (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffb, (q15_t)0xfdd1, (q15_t)0x7ffb, (q15_t)0xfdcb, (q15_t)0x7ffb, (q15_t)0xfdc5,
-  (q15_t)0x7ffa, (q15_t)0xfdbe, (q15_t)0x7ffa, (q15_t)0xfdb8, (q15_t)0x7ffa, (q15_t)0xfdb2, (q15_t)0x7ffa, (q15_t)0xfdac,
-  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ffa, (q15_t)0xfd9f, (q15_t)0x7ffa, (q15_t)0xfd99, (q15_t)0x7ffa, (q15_t)0xfd93,
-  (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd86, (q15_t)0x7ff9, (q15_t)0xfd80, (q15_t)0x7ff9, (q15_t)0xfd79,
-  (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff9, (q15_t)0xfd6d, (q15_t)0x7ff9, (q15_t)0xfd67, (q15_t)0x7ff9, (q15_t)0xfd60,
-  (q15_t)0x7ff8, (q15_t)0xfd5a, (q15_t)0x7ff8, (q15_t)0xfd54, (q15_t)0x7ff8, (q15_t)0xfd4d, (q15_t)0x7ff8, (q15_t)0xfd47,
-  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff8, (q15_t)0xfd3b, (q15_t)0x7ff8, (q15_t)0xfd34, (q15_t)0x7ff8, (q15_t)0xfd2e,
-  (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd21, (q15_t)0x7ff7, (q15_t)0xfd1b, (q15_t)0x7ff7, (q15_t)0xfd15,
-  (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff7, (q15_t)0xfd08, (q15_t)0x7ff7, (q15_t)0xfd02, (q15_t)0x7ff6, (q15_t)0xfcfc,
-  (q15_t)0x7ff6, (q15_t)0xfcf5, (q15_t)0x7ff6, (q15_t)0xfcef, (q15_t)0x7ff6, (q15_t)0xfce9, (q15_t)0x7ff6, (q15_t)0xfce3,
-  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcd6, (q15_t)0x7ff5, (q15_t)0xfcd0, (q15_t)0x7ff5, (q15_t)0xfcc9,
-  (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff5, (q15_t)0xfcbd, (q15_t)0x7ff5, (q15_t)0xfcb7, (q15_t)0x7ff5, (q15_t)0xfcb0,
-  (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfca4, (q15_t)0x7ff4, (q15_t)0xfc9e, (q15_t)0x7ff4, (q15_t)0xfc97,
-  (q15_t)0x7ff4, (q15_t)0xfc91, (q15_t)0x7ff4, (q15_t)0xfc8b, (q15_t)0x7ff3, (q15_t)0xfc84, (q15_t)0x7ff3, (q15_t)0xfc7e,
-  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff3, (q15_t)0xfc72, (q15_t)0x7ff3, (q15_t)0xfc6b, (q15_t)0x7ff2, (q15_t)0xfc65,
-  (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc58, (q15_t)0x7ff2, (q15_t)0xfc52, (q15_t)0x7ff2, (q15_t)0xfc4c,
-  (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc3f, (q15_t)0x7ff1, (q15_t)0xfc39, (q15_t)0x7ff1, (q15_t)0xfc33,
-  (q15_t)0x7ff1, (q15_t)0xfc2c, (q15_t)0x7ff1, (q15_t)0xfc26, (q15_t)0x7ff0, (q15_t)0xfc20, (q15_t)0x7ff0, (q15_t)0xfc1a,
-  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7ff0, (q15_t)0xfc0d, (q15_t)0x7ff0, (q15_t)0xfc07, (q15_t)0x7fef, (q15_t)0xfc01,
-  (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fef, (q15_t)0xfbf4, (q15_t)0x7fef, (q15_t)0xfbee, (q15_t)0x7fef, (q15_t)0xfbe7,
-  (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbdb, (q15_t)0x7fee, (q15_t)0xfbd5, (q15_t)0x7fee, (q15_t)0xfbce,
-  (q15_t)0x7fee, (q15_t)0xfbc8, (q15_t)0x7fed, (q15_t)0xfbc2, (q15_t)0x7fed, (q15_t)0xfbbb, (q15_t)0x7fed, (q15_t)0xfbb5,
-  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fed, (q15_t)0xfba9, (q15_t)0x7fec, (q15_t)0xfba2, (q15_t)0x7fec, (q15_t)0xfb9c,
-  (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7fec, (q15_t)0xfb8f, (q15_t)0x7fec, (q15_t)0xfb89, (q15_t)0x7feb, (q15_t)0xfb83,
-  (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7feb, (q15_t)0xfb76, (q15_t)0x7feb, (q15_t)0xfb70, (q15_t)0x7fea, (q15_t)0xfb6a,
-  (q15_t)0x7fea, (q15_t)0xfb64, (q15_t)0x7fea, (q15_t)0xfb5d, (q15_t)0x7fea, (q15_t)0xfb57, (q15_t)0x7fea, (q15_t)0xfb51,
-  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe9, (q15_t)0xfb44, (q15_t)0x7fe9, (q15_t)0xfb3e, (q15_t)0x7fe9, (q15_t)0xfb38,
-  (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe8, (q15_t)0xfb2b, (q15_t)0x7fe8, (q15_t)0xfb25, (q15_t)0x7fe8, (q15_t)0xfb1e,
-  (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe7, (q15_t)0xfb12, (q15_t)0x7fe7, (q15_t)0xfb0c, (q15_t)0x7fe7, (q15_t)0xfb05,
-  (q15_t)0x7fe6, (q15_t)0xfaff, (q15_t)0x7fe6, (q15_t)0xfaf9, (q15_t)0x7fe6, (q15_t)0xfaf3, (q15_t)0x7fe6, (q15_t)0xfaec,
-  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe5, (q15_t)0xfae0, (q15_t)0x7fe5, (q15_t)0xfad9, (q15_t)0x7fe5, (q15_t)0xfad3,
-  (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe4, (q15_t)0xfac7, (q15_t)0x7fe4, (q15_t)0xfac0, (q15_t)0x7fe4, (q15_t)0xfaba,
-  (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe3, (q15_t)0xfaad, (q15_t)0x7fe3, (q15_t)0xfaa7, (q15_t)0x7fe3, (q15_t)0xfaa1,
-  (q15_t)0x7fe2, (q15_t)0xfa9b, (q15_t)0x7fe2, (q15_t)0xfa94, (q15_t)0x7fe2, (q15_t)0xfa8e, (q15_t)0x7fe2, (q15_t)0xfa88,
-  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe1, (q15_t)0xfa7b, (q15_t)0x7fe1, (q15_t)0xfa75, (q15_t)0x7fe0, (q15_t)0xfa6f,
-  (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fe0, (q15_t)0xfa62, (q15_t)0x7fe0, (q15_t)0xfa5c, (q15_t)0x7fdf, (q15_t)0xfa56,
-  (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fdf, (q15_t)0xfa49, (q15_t)0x7fdf, (q15_t)0xfa43, (q15_t)0x7fde, (q15_t)0xfa3c,
-  (q15_t)0x7fde, (q15_t)0xfa36, (q15_t)0x7fde, (q15_t)0xfa30, (q15_t)0x7fdd, (q15_t)0xfa2a, (q15_t)0x7fdd, (q15_t)0xfa23,
-  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdd, (q15_t)0xfa17, (q15_t)0x7fdc, (q15_t)0xfa11, (q15_t)0x7fdc, (q15_t)0xfa0a,
-  (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fdb, (q15_t)0xf9fe, (q15_t)0x7fdb, (q15_t)0xf9f7, (q15_t)0x7fdb, (q15_t)0xf9f1,
-  (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fda, (q15_t)0xf9e5, (q15_t)0x7fda, (q15_t)0xf9de, (q15_t)0x7fda, (q15_t)0xf9d8,
-  (q15_t)0x7fd9, (q15_t)0xf9d2, (q15_t)0x7fd9, (q15_t)0xf9cb, (q15_t)0x7fd9, (q15_t)0xf9c5, (q15_t)0x7fd8, (q15_t)0xf9bf,
-  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd8, (q15_t)0xf9b2, (q15_t)0x7fd7, (q15_t)0xf9ac, (q15_t)0x7fd7, (q15_t)0xf9a6,
-  (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf999, (q15_t)0x7fd6, (q15_t)0xf993, (q15_t)0x7fd6, (q15_t)0xf98d,
-  (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd5, (q15_t)0xf980, (q15_t)0x7fd5, (q15_t)0xf97a, (q15_t)0x7fd5, (q15_t)0xf974,
-  (q15_t)0x7fd4, (q15_t)0xf96d, (q15_t)0x7fd4, (q15_t)0xf967, (q15_t)0x7fd4, (q15_t)0xf961, (q15_t)0x7fd3, (q15_t)0xf95b,
-  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd3, (q15_t)0xf94e, (q15_t)0x7fd2, (q15_t)0xf948, (q15_t)0x7fd2, (q15_t)0xf941,
-  (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd1, (q15_t)0xf935, (q15_t)0x7fd1, (q15_t)0xf92f, (q15_t)0x7fd1, (q15_t)0xf928,
-  (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fd0, (q15_t)0xf91c, (q15_t)0x7fd0, (q15_t)0xf916, (q15_t)0x7fcf, (q15_t)0xf90f,
-  (q15_t)0x7fcf, (q15_t)0xf909, (q15_t)0x7fcf, (q15_t)0xf903, (q15_t)0x7fce, (q15_t)0xf8fc, (q15_t)0x7fce, (q15_t)0xf8f6,
-  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcd, (q15_t)0xf8ea, (q15_t)0x7fcd, (q15_t)0xf8e3, (q15_t)0x7fcd, (q15_t)0xf8dd,
-  (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcc, (q15_t)0xf8d0, (q15_t)0x7fcb, (q15_t)0xf8ca, (q15_t)0x7fcb, (q15_t)0xf8c4,
-  (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fca, (q15_t)0xf8b7, (q15_t)0x7fca, (q15_t)0xf8b1, (q15_t)0x7fca, (q15_t)0xf8ab,
-  (q15_t)0x7fc9, (q15_t)0xf8a5, (q15_t)0x7fc9, (q15_t)0xf89e, (q15_t)0x7fc9, (q15_t)0xf898, (q15_t)0x7fc8, (q15_t)0xf892,
-  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc7, (q15_t)0xf885, (q15_t)0x7fc7, (q15_t)0xf87f, (q15_t)0x7fc7, (q15_t)0xf879,
-  (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc6, (q15_t)0xf86c, (q15_t)0x7fc6, (q15_t)0xf866, (q15_t)0x7fc5, (q15_t)0xf860,
-  (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc5, (q15_t)0xf853, (q15_t)0x7fc4, (q15_t)0xf84d, (q15_t)0x7fc4, (q15_t)0xf846,
-  (q15_t)0x7fc3, (q15_t)0xf840, (q15_t)0x7fc3, (q15_t)0xf83a, (q15_t)0x7fc3, (q15_t)0xf834, (q15_t)0x7fc2, (q15_t)0xf82d,
-  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc1, (q15_t)0xf821, (q15_t)0x7fc1, (q15_t)0xf81b, (q15_t)0x7fc1, (q15_t)0xf814,
-  (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fc0, (q15_t)0xf808, (q15_t)0x7fc0, (q15_t)0xf802, (q15_t)0x7fbf, (q15_t)0xf7fb,
-  (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbe, (q15_t)0xf7ef, (q15_t)0x7fbe, (q15_t)0xf7e8, (q15_t)0x7fbe, (q15_t)0xf7e2,
-  (q15_t)0x7fbd, (q15_t)0xf7dc, (q15_t)0x7fbd, (q15_t)0xf7d6, (q15_t)0x7fbc, (q15_t)0xf7cf, (q15_t)0x7fbc, (q15_t)0xf7c9,
-  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fbb, (q15_t)0xf7bd, (q15_t)0x7fbb, (q15_t)0xf7b6, (q15_t)0x7fba, (q15_t)0xf7b0,
-  (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb9, (q15_t)0xf7a3, (q15_t)0x7fb9, (q15_t)0xf79d, (q15_t)0x7fb9, (q15_t)0xf797,
-  (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb8, (q15_t)0xf78a, (q15_t)0x7fb7, (q15_t)0xf784, (q15_t)0x7fb7, (q15_t)0xf77e,
-  (q15_t)0x7fb7, (q15_t)0xf778, (q15_t)0x7fb6, (q15_t)0xf771, (q15_t)0x7fb6, (q15_t)0xf76b, (q15_t)0x7fb5, (q15_t)0xf765,
-  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb4, (q15_t)0xf758, (q15_t)0x7fb4, (q15_t)0xf752, (q15_t)0x7fb4, (q15_t)0xf74c,
-  (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb3, (q15_t)0xf73f, (q15_t)0x7fb2, (q15_t)0xf739, (q15_t)0x7fb2, (q15_t)0xf733,
-  (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb1, (q15_t)0xf726, (q15_t)0x7fb1, (q15_t)0xf720, (q15_t)0x7fb0, (q15_t)0xf71a,
-  (q15_t)0x7fb0, (q15_t)0xf713, (q15_t)0x7faf, (q15_t)0xf70d, (q15_t)0x7faf, (q15_t)0xf707, (q15_t)0x7fae, (q15_t)0xf700,
-  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fae, (q15_t)0xf6f4, (q15_t)0x7fad, (q15_t)0xf6ee, (q15_t)0x7fad, (q15_t)0xf6e7,
-  (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7fac, (q15_t)0xf6db, (q15_t)0x7fab, (q15_t)0xf6d5, (q15_t)0x7fab, (q15_t)0xf6ce,
-  (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7faa, (q15_t)0xf6c2, (q15_t)0x7fa9, (q15_t)0xf6bc, (q15_t)0x7fa9, (q15_t)0xf6b5,
-  (q15_t)0x7fa9, (q15_t)0xf6af, (q15_t)0x7fa8, (q15_t)0xf6a9, (q15_t)0x7fa8, (q15_t)0xf6a2, (q15_t)0x7fa7, (q15_t)0xf69c,
-  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa6, (q15_t)0xf690, (q15_t)0x7fa6, (q15_t)0xf689, (q15_t)0x7fa5, (q15_t)0xf683,
-  (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa4, (q15_t)0xf677, (q15_t)0x7fa4, (q15_t)0xf670, (q15_t)0x7fa3, (q15_t)0xf66a,
-  (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa3, (q15_t)0xf65e, (q15_t)0x7fa2, (q15_t)0xf657, (q15_t)0x7fa2, (q15_t)0xf651,
-  (q15_t)0x7fa1, (q15_t)0xf64b, (q15_t)0x7fa1, (q15_t)0xf644, (q15_t)0x7fa0, (q15_t)0xf63e, (q15_t)0x7fa0, (q15_t)0xf638,
-  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9f, (q15_t)0xf62b, (q15_t)0x7f9e, (q15_t)0xf625, (q15_t)0x7f9e, (q15_t)0xf61f,
-  (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9d, (q15_t)0xf612, (q15_t)0x7f9c, (q15_t)0xf60c, (q15_t)0x7f9c, (q15_t)0xf606,
-  (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f9b, (q15_t)0xf5f9, (q15_t)0x7f9a, (q15_t)0xf5f3, (q15_t)0x7f9a, (q15_t)0xf5ed,
-  (q15_t)0x7f99, (q15_t)0xf5e7, (q15_t)0x7f99, (q15_t)0xf5e0, (q15_t)0x7f98, (q15_t)0xf5da, (q15_t)0x7f98, (q15_t)0xf5d4,
-  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f97, (q15_t)0xf5c7, (q15_t)0x7f96, (q15_t)0xf5c1, (q15_t)0x7f96, (q15_t)0xf5bb,
-  (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f95, (q15_t)0xf5ae, (q15_t)0x7f94, (q15_t)0xf5a8, (q15_t)0x7f94, (q15_t)0xf5a2,
-  (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f93, (q15_t)0xf595, (q15_t)0x7f92, (q15_t)0xf58f, (q15_t)0x7f92, (q15_t)0xf589,
-  (q15_t)0x7f91, (q15_t)0xf582, (q15_t)0x7f91, (q15_t)0xf57c, (q15_t)0x7f90, (q15_t)0xf576, (q15_t)0x7f90, (q15_t)0xf570,
-  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8f, (q15_t)0xf563, (q15_t)0x7f8e, (q15_t)0xf55d, (q15_t)0x7f8e, (q15_t)0xf556,
-  (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8d, (q15_t)0xf54a, (q15_t)0x7f8c, (q15_t)0xf544, (q15_t)0x7f8b, (q15_t)0xf53d,
-  (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f8a, (q15_t)0xf531, (q15_t)0x7f8a, (q15_t)0xf52b, (q15_t)0x7f89, (q15_t)0xf524,
-  (q15_t)0x7f89, (q15_t)0xf51e, (q15_t)0x7f88, (q15_t)0xf518, (q15_t)0x7f88, (q15_t)0xf512, (q15_t)0x7f87, (q15_t)0xf50b,
-  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f86, (q15_t)0xf4ff, (q15_t)0x7f86, (q15_t)0xf4f9, (q15_t)0x7f85, (q15_t)0xf4f2,
-  (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f84, (q15_t)0xf4e6, (q15_t)0x7f83, (q15_t)0xf4e0, (q15_t)0x7f83, (q15_t)0xf4d9,
-  (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f82, (q15_t)0xf4cd, (q15_t)0x7f81, (q15_t)0xf4c6, (q15_t)0x7f81, (q15_t)0xf4c0,
-  (q15_t)0x7f80, (q15_t)0xf4ba, (q15_t)0x7f80, (q15_t)0xf4b4, (q15_t)0x7f7f, (q15_t)0xf4ad, (q15_t)0x7f7e, (q15_t)0xf4a7,
-  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7d, (q15_t)0xf49b, (q15_t)0x7f7d, (q15_t)0xf494, (q15_t)0x7f7c, (q15_t)0xf48e,
-  (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f7b, (q15_t)0xf482, (q15_t)0x7f7b, (q15_t)0xf47b, (q15_t)0x7f7a, (q15_t)0xf475,
-  (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f79, (q15_t)0xf469, (q15_t)0x7f78, (q15_t)0xf462, (q15_t)0x7f78, (q15_t)0xf45c,
-  (q15_t)0x7f77, (q15_t)0xf456, (q15_t)0x7f77, (q15_t)0xf450, (q15_t)0x7f76, (q15_t)0xf449, (q15_t)0x7f75, (q15_t)0xf443,
-  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f74, (q15_t)0xf437, (q15_t)0x7f74, (q15_t)0xf430, (q15_t)0x7f73, (q15_t)0xf42a,
-  (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f72, (q15_t)0xf41e, (q15_t)0x7f71, (q15_t)0xf417, (q15_t)0x7f71, (q15_t)0xf411,
-  (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f70, (q15_t)0xf405, (q15_t)0x7f6f, (q15_t)0xf3fe, (q15_t)0x7f6e, (q15_t)0xf3f8,
-  (q15_t)0x7f6e, (q15_t)0xf3f2, (q15_t)0x7f6d, (q15_t)0xf3ec, (q15_t)0x7f6d, (q15_t)0xf3e5, (q15_t)0x7f6c, (q15_t)0xf3df,
-  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f6b, (q15_t)0xf3d2, (q15_t)0x7f6a, (q15_t)0xf3cc, (q15_t)0x7f6a, (q15_t)0xf3c6,
-  (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f68, (q15_t)0xf3b9, (q15_t)0x7f68, (q15_t)0xf3b3, (q15_t)0x7f67, (q15_t)0xf3ad,
-  (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f66, (q15_t)0xf3a0, (q15_t)0x7f65, (q15_t)0xf39a, (q15_t)0x7f65, (q15_t)0xf394,
-  (q15_t)0x7f64, (q15_t)0xf38e, (q15_t)0x7f64, (q15_t)0xf387, (q15_t)0x7f63, (q15_t)0xf381, (q15_t)0x7f62, (q15_t)0xf37b,
-  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f61, (q15_t)0xf36e, (q15_t)0x7f60, (q15_t)0xf368, (q15_t)0x7f60, (q15_t)0xf362,
-  (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5f, (q15_t)0xf355, (q15_t)0x7f5e, (q15_t)0xf34f, (q15_t)0x7f5d, (q15_t)0xf349,
-  (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5c, (q15_t)0xf33c, (q15_t)0x7f5b, (q15_t)0xf336, (q15_t)0x7f5b, (q15_t)0xf330,
-  (q15_t)0x7f5a, (q15_t)0xf32a, (q15_t)0x7f5a, (q15_t)0xf323, (q15_t)0x7f59, (q15_t)0xf31d, (q15_t)0x7f58, (q15_t)0xf317,
-  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f57, (q15_t)0xf30a, (q15_t)0x7f56, (q15_t)0xf304, (q15_t)0x7f56, (q15_t)0xf2fe,
-  (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f55, (q15_t)0xf2f1, (q15_t)0x7f54, (q15_t)0xf2eb, (q15_t)0x7f53, (q15_t)0xf2e5,
-  (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f52, (q15_t)0xf2d8, (q15_t)0x7f51, (q15_t)0xf2d2, (q15_t)0x7f51, (q15_t)0xf2cc,
-  (q15_t)0x7f50, (q15_t)0xf2c6, (q15_t)0x7f4f, (q15_t)0xf2bf, (q15_t)0x7f4f, (q15_t)0xf2b9, (q15_t)0x7f4e, (q15_t)0xf2b3,
-  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4d, (q15_t)0xf2a6, (q15_t)0x7f4c, (q15_t)0xf2a0, (q15_t)0x7f4b, (q15_t)0xf29a,
-  (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f4a, (q15_t)0xf28d, (q15_t)0x7f49, (q15_t)0xf287, (q15_t)0x7f49, (q15_t)0xf281,
-  (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f47, (q15_t)0xf274, (q15_t)0x7f47, (q15_t)0xf26e, (q15_t)0x7f46, (q15_t)0xf268,
-  (q15_t)0x7f45, (q15_t)0xf262, (q15_t)0x7f45, (q15_t)0xf25b, (q15_t)0x7f44, (q15_t)0xf255, (q15_t)0x7f43, (q15_t)0xf24f,
-  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f42, (q15_t)0xf242, (q15_t)0x7f41, (q15_t)0xf23c, (q15_t)0x7f41, (q15_t)0xf236,
-  (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3f, (q15_t)0xf229, (q15_t)0x7f3f, (q15_t)0xf223, (q15_t)0x7f3e, (q15_t)0xf21d,
-  (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3d, (q15_t)0xf210, (q15_t)0x7f3c, (q15_t)0xf20a, (q15_t)0x7f3b, (q15_t)0xf204,
-  (q15_t)0x7f3b, (q15_t)0xf1fe, (q15_t)0x7f3a, (q15_t)0xf1f7, (q15_t)0x7f39, (q15_t)0xf1f1, (q15_t)0x7f39, (q15_t)0xf1eb,
-  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f37, (q15_t)0xf1de, (q15_t)0x7f36, (q15_t)0xf1d8, (q15_t)0x7f36, (q15_t)0xf1d2,
-  (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f34, (q15_t)0xf1c6, (q15_t)0x7f34, (q15_t)0xf1bf, (q15_t)0x7f33, (q15_t)0xf1b9,
-  (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f32, (q15_t)0xf1ad, (q15_t)0x7f31, (q15_t)0xf1a6, (q15_t)0x7f30, (q15_t)0xf1a0,
-  (q15_t)0x7f2f, (q15_t)0xf19a, (q15_t)0x7f2f, (q15_t)0xf194, (q15_t)0x7f2e, (q15_t)0xf18d, (q15_t)0x7f2d, (q15_t)0xf187,
-  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2c, (q15_t)0xf17b, (q15_t)0x7f2b, (q15_t)0xf174, (q15_t)0x7f2a, (q15_t)0xf16e,
-  (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f29, (q15_t)0xf162, (q15_t)0x7f28, (q15_t)0xf15b, (q15_t)0x7f28, (q15_t)0xf155,
-  (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f26, (q15_t)0xf149, (q15_t)0x7f25, (q15_t)0xf142, (q15_t)0x7f25, (q15_t)0xf13c,
-  (q15_t)0x7f24, (q15_t)0xf136, (q15_t)0x7f23, (q15_t)0xf130, (q15_t)0x7f23, (q15_t)0xf129, (q15_t)0x7f22, (q15_t)0xf123,
-  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f20, (q15_t)0xf117, (q15_t)0x7f20, (q15_t)0xf110, (q15_t)0x7f1f, (q15_t)0xf10a,
-  (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1d, (q15_t)0xf0fe, (q15_t)0x7f1d, (q15_t)0xf0f8, (q15_t)0x7f1c, (q15_t)0xf0f1,
-  (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f1a, (q15_t)0xf0e5, (q15_t)0x7f1a, (q15_t)0xf0df, (q15_t)0x7f19, (q15_t)0xf0d8,
-  (q15_t)0x7f18, (q15_t)0xf0d2, (q15_t)0x7f17, (q15_t)0xf0cc, (q15_t)0x7f17, (q15_t)0xf0c6, (q15_t)0x7f16, (q15_t)0xf0bf,
-  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f14, (q15_t)0xf0b3, (q15_t)0x7f14, (q15_t)0xf0ad, (q15_t)0x7f13, (q15_t)0xf0a6,
-  (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f11, (q15_t)0xf09a, (q15_t)0x7f11, (q15_t)0xf094, (q15_t)0x7f10, (q15_t)0xf08d,
-  (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0e, (q15_t)0xf081, (q15_t)0x7f0e, (q15_t)0xf07b, (q15_t)0x7f0d, (q15_t)0xf075,
-  (q15_t)0x7f0c, (q15_t)0xf06e, (q15_t)0x7f0b, (q15_t)0xf068, (q15_t)0x7f0b, (q15_t)0xf062, (q15_t)0x7f0a, (q15_t)0xf05c,
-  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f08, (q15_t)0xf04f, (q15_t)0x7f08, (q15_t)0xf049, (q15_t)0x7f07, (q15_t)0xf043,
-  (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f05, (q15_t)0xf036, (q15_t)0x7f04, (q15_t)0xf030, (q15_t)0x7f04, (q15_t)0xf02a,
-  (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f02, (q15_t)0xf01d, (q15_t)0x7f01, (q15_t)0xf017, (q15_t)0x7f01, (q15_t)0xf011,
-  (q15_t)0x7f00, (q15_t)0xf00b, (q15_t)0x7eff, (q15_t)0xf004, (q15_t)0x7efe, (q15_t)0xeffe, (q15_t)0x7efd, (q15_t)0xeff8,
-  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7efc, (q15_t)0xefeb, (q15_t)0x7efb, (q15_t)0xefe5, (q15_t)0x7efa, (q15_t)0xefdf,
-  (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef9, (q15_t)0xefd2, (q15_t)0x7ef8, (q15_t)0xefcc, (q15_t)0x7ef7, (q15_t)0xefc6,
-  (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef5, (q15_t)0xefb9, (q15_t)0x7ef5, (q15_t)0xefb3, (q15_t)0x7ef4, (q15_t)0xefad,
-  (q15_t)0x7ef3, (q15_t)0xefa7, (q15_t)0x7ef2, (q15_t)0xefa1, (q15_t)0x7ef1, (q15_t)0xef9a, (q15_t)0x7ef1, (q15_t)0xef94,
-  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eef, (q15_t)0xef88, (q15_t)0x7eee, (q15_t)0xef81, (q15_t)0x7eed, (q15_t)0xef7b,
-  (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7eec, (q15_t)0xef6f, (q15_t)0x7eeb, (q15_t)0xef68, (q15_t)0x7eea, (q15_t)0xef62,
-  (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee9, (q15_t)0xef56, (q15_t)0x7ee8, (q15_t)0xef50, (q15_t)0x7ee7, (q15_t)0xef49,
-  (q15_t)0x7ee6, (q15_t)0xef43, (q15_t)0x7ee5, (q15_t)0xef3d, (q15_t)0x7ee4, (q15_t)0xef37, (q15_t)0x7ee4, (q15_t)0xef30,
-  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7ee2, (q15_t)0xef24, (q15_t)0x7ee1, (q15_t)0xef1e, (q15_t)0x7ee0, (q15_t)0xef18,
-  (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edf, (q15_t)0xef0b, (q15_t)0x7ede, (q15_t)0xef05, (q15_t)0x7edd, (q15_t)0xeeff,
-  (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7edb, (q15_t)0xeef2, (q15_t)0x7eda, (q15_t)0xeeec, (q15_t)0x7eda, (q15_t)0xeee6,
-  (q15_t)0x7ed9, (q15_t)0xeedf, (q15_t)0x7ed8, (q15_t)0xeed9, (q15_t)0x7ed7, (q15_t)0xeed3, (q15_t)0x7ed6, (q15_t)0xeecd,
-  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed5, (q15_t)0xeec0, (q15_t)0x7ed4, (q15_t)0xeeba, (q15_t)0x7ed3, (q15_t)0xeeb4,
-  (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ed1, (q15_t)0xeea7, (q15_t)0x7ed0, (q15_t)0xeea1, (q15_t)0x7ecf, (q15_t)0xee9b,
-  (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ece, (q15_t)0xee8f, (q15_t)0x7ecd, (q15_t)0xee88, (q15_t)0x7ecc, (q15_t)0xee82,
-  (q15_t)0x7ecb, (q15_t)0xee7c, (q15_t)0x7eca, (q15_t)0xee76, (q15_t)0x7ec9, (q15_t)0xee6f, (q15_t)0x7ec9, (q15_t)0xee69,
-  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec7, (q15_t)0xee5d, (q15_t)0x7ec6, (q15_t)0xee57, (q15_t)0x7ec5, (q15_t)0xee50,
-  (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec3, (q15_t)0xee44, (q15_t)0x7ec3, (q15_t)0xee3e, (q15_t)0x7ec2, (q15_t)0xee37,
-  (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ec0, (q15_t)0xee2b, (q15_t)0x7ebf, (q15_t)0xee25, (q15_t)0x7ebe, (q15_t)0xee1f,
-  (q15_t)0x7ebd, (q15_t)0xee18, (q15_t)0x7ebc, (q15_t)0xee12, (q15_t)0x7ebb, (q15_t)0xee0c, (q15_t)0x7ebb, (q15_t)0xee06,
-  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb9, (q15_t)0xedf9, (q15_t)0x7eb8, (q15_t)0xedf3, (q15_t)0x7eb7, (q15_t)0xeded,
-  (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb5, (q15_t)0xede0, (q15_t)0x7eb4, (q15_t)0xedda, (q15_t)0x7eb4, (q15_t)0xedd4,
-  (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eb2, (q15_t)0xedc7, (q15_t)0x7eb1, (q15_t)0xedc1, (q15_t)0x7eb0, (q15_t)0xedbb,
-  (q15_t)0x7eaf, (q15_t)0xedb5, (q15_t)0x7eae, (q15_t)0xedaf, (q15_t)0x7ead, (q15_t)0xeda8, (q15_t)0x7eac, (q15_t)0xeda2,
-  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7eab, (q15_t)0xed96, (q15_t)0x7eaa, (q15_t)0xed8f, (q15_t)0x7ea9, (q15_t)0xed89,
-  (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea7, (q15_t)0xed7d, (q15_t)0x7ea6, (q15_t)0xed77, (q15_t)0x7ea5, (q15_t)0xed70,
-  (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea3, (q15_t)0xed64, (q15_t)0x7ea2, (q15_t)0xed5e, (q15_t)0x7ea1, (q15_t)0xed58,
-  (q15_t)0x7ea1, (q15_t)0xed51, (q15_t)0x7ea0, (q15_t)0xed4b, (q15_t)0x7e9f, (q15_t)0xed45, (q15_t)0x7e9e, (q15_t)0xed3f,
-  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e9c, (q15_t)0xed32, (q15_t)0x7e9b, (q15_t)0xed2c, (q15_t)0x7e9a, (q15_t)0xed26,
-  (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e98, (q15_t)0xed19, (q15_t)0x7e97, (q15_t)0xed13, (q15_t)0x7e96, (q15_t)0xed0d,
-  (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e94, (q15_t)0xed01, (q15_t)0x7e94, (q15_t)0xecfa, (q15_t)0x7e93, (q15_t)0xecf4,
-  (q15_t)0x7e92, (q15_t)0xecee, (q15_t)0x7e91, (q15_t)0xece8, (q15_t)0x7e90, (q15_t)0xece1, (q15_t)0x7e8f, (q15_t)0xecdb,
-  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8d, (q15_t)0xeccf, (q15_t)0x7e8c, (q15_t)0xecc9, (q15_t)0x7e8b, (q15_t)0xecc2,
-  (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e89, (q15_t)0xecb6, (q15_t)0x7e88, (q15_t)0xecb0, (q15_t)0x7e87, (q15_t)0xecaa,
-  (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e85, (q15_t)0xec9d, (q15_t)0x7e84, (q15_t)0xec97, (q15_t)0x7e84, (q15_t)0xec91,
-  (q15_t)0x7e83, (q15_t)0xec8a, (q15_t)0x7e82, (q15_t)0xec84, (q15_t)0x7e81, (q15_t)0xec7e, (q15_t)0x7e80, (q15_t)0xec78,
-  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7e, (q15_t)0xec6b, (q15_t)0x7e7d, (q15_t)0xec65, (q15_t)0x7e7c, (q15_t)0xec5f,
-  (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e7a, (q15_t)0xec53, (q15_t)0x7e79, (q15_t)0xec4c, (q15_t)0x7e78, (q15_t)0xec46,
-  (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e76, (q15_t)0xec3a, (q15_t)0x7e75, (q15_t)0xec34, (q15_t)0x7e74, (q15_t)0xec2d,
-  (q15_t)0x7e73, (q15_t)0xec27, (q15_t)0x7e72, (q15_t)0xec21, (q15_t)0x7e71, (q15_t)0xec1b, (q15_t)0x7e70, (q15_t)0xec15,
-  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6e, (q15_t)0xec08, (q15_t)0x7e6d, (q15_t)0xec02, (q15_t)0x7e6c, (q15_t)0xebfc,
-  (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e6a, (q15_t)0xebef, (q15_t)0x7e69, (q15_t)0xebe9, (q15_t)0x7e68, (q15_t)0xebe3,
-  (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e66, (q15_t)0xebd6, (q15_t)0x7e65, (q15_t)0xebd0, (q15_t)0x7e64, (q15_t)0xebca,
-  (q15_t)0x7e63, (q15_t)0xebc4, (q15_t)0x7e62, (q15_t)0xebbe, (q15_t)0x7e61, (q15_t)0xebb7, (q15_t)0x7e60, (q15_t)0xebb1,
-  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5e, (q15_t)0xeba5, (q15_t)0x7e5d, (q15_t)0xeb9f, (q15_t)0x7e5c, (q15_t)0xeb98,
-  (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e5a, (q15_t)0xeb8c, (q15_t)0x7e59, (q15_t)0xeb86, (q15_t)0x7e58, (q15_t)0xeb80,
-  (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e56, (q15_t)0xeb73, (q15_t)0x7e55, (q15_t)0xeb6d, (q15_t)0x7e54, (q15_t)0xeb67,
-  (q15_t)0x7e53, (q15_t)0xeb61, (q15_t)0x7e52, (q15_t)0xeb5a, (q15_t)0x7e51, (q15_t)0xeb54, (q15_t)0x7e50, (q15_t)0xeb4e,
-  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4e, (q15_t)0xeb42, (q15_t)0x7e4d, (q15_t)0xeb3b, (q15_t)0x7e4c, (q15_t)0xeb35,
-  (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e4a, (q15_t)0xeb29, (q15_t)0x7e49, (q15_t)0xeb23, (q15_t)0x7e48, (q15_t)0xeb1c,
-  (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e46, (q15_t)0xeb10, (q15_t)0x7e45, (q15_t)0xeb0a, (q15_t)0x7e44, (q15_t)0xeb04,
-  (q15_t)0x7e43, (q15_t)0xeafd, (q15_t)0x7e42, (q15_t)0xeaf7, (q15_t)0x7e41, (q15_t)0xeaf1, (q15_t)0x7e40, (q15_t)0xeaeb,
-  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3e, (q15_t)0xeade, (q15_t)0x7e3d, (q15_t)0xead8, (q15_t)0x7e3c, (q15_t)0xead2,
-  (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e3a, (q15_t)0xeac6, (q15_t)0x7e39, (q15_t)0xeabf, (q15_t)0x7e38, (q15_t)0xeab9,
-  (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e35, (q15_t)0xeaad, (q15_t)0x7e34, (q15_t)0xeaa7, (q15_t)0x7e33, (q15_t)0xeaa0,
-  (q15_t)0x7e32, (q15_t)0xea9a, (q15_t)0x7e31, (q15_t)0xea94, (q15_t)0x7e30, (q15_t)0xea8e, (q15_t)0x7e2f, (q15_t)0xea88,
-  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2d, (q15_t)0xea7b, (q15_t)0x7e2c, (q15_t)0xea75, (q15_t)0x7e2b, (q15_t)0xea6f,
-  (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e29, (q15_t)0xea63, (q15_t)0x7e28, (q15_t)0xea5c, (q15_t)0x7e27, (q15_t)0xea56,
-  (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e25, (q15_t)0xea4a, (q15_t)0x7e24, (q15_t)0xea44, (q15_t)0x7e22, (q15_t)0xea3d,
-  (q15_t)0x7e21, (q15_t)0xea37, (q15_t)0x7e20, (q15_t)0xea31, (q15_t)0x7e1f, (q15_t)0xea2b, (q15_t)0x7e1e, (q15_t)0xea25,
-  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e1c, (q15_t)0xea18, (q15_t)0x7e1b, (q15_t)0xea12, (q15_t)0x7e1a, (q15_t)0xea0c,
-  (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e18, (q15_t)0xe9ff, (q15_t)0x7e17, (q15_t)0xe9f9, (q15_t)0x7e16, (q15_t)0xe9f3,
-  (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e13, (q15_t)0xe9e7, (q15_t)0x7e12, (q15_t)0xe9e1, (q15_t)0x7e11, (q15_t)0xe9da,
-  (q15_t)0x7e10, (q15_t)0xe9d4, (q15_t)0x7e0f, (q15_t)0xe9ce, (q15_t)0x7e0e, (q15_t)0xe9c8, (q15_t)0x7e0d, (q15_t)0xe9c2,
-  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e0b, (q15_t)0xe9b5, (q15_t)0x7e0a, (q15_t)0xe9af, (q15_t)0x7e08, (q15_t)0xe9a9,
-  (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e06, (q15_t)0xe99c, (q15_t)0x7e05, (q15_t)0xe996, (q15_t)0x7e04, (q15_t)0xe990,
-  (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7e02, (q15_t)0xe984, (q15_t)0x7e01, (q15_t)0xe97e, (q15_t)0x7e00, (q15_t)0xe977,
-  (q15_t)0x7dff, (q15_t)0xe971, (q15_t)0x7dfd, (q15_t)0xe96b, (q15_t)0x7dfc, (q15_t)0xe965, (q15_t)0x7dfb, (q15_t)0xe95f,
-  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df9, (q15_t)0xe952, (q15_t)0x7df8, (q15_t)0xe94c, (q15_t)0x7df7, (q15_t)0xe946,
-  (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df5, (q15_t)0xe93a, (q15_t)0x7df3, (q15_t)0xe933, (q15_t)0x7df2, (q15_t)0xe92d,
-  (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7df0, (q15_t)0xe921, (q15_t)0x7def, (q15_t)0xe91b, (q15_t)0x7dee, (q15_t)0xe914,
-  (q15_t)0x7ded, (q15_t)0xe90e, (q15_t)0x7dec, (q15_t)0xe908, (q15_t)0x7dea, (q15_t)0xe902, (q15_t)0x7de9, (q15_t)0xe8fc,
-  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de7, (q15_t)0xe8ef, (q15_t)0x7de6, (q15_t)0xe8e9, (q15_t)0x7de5, (q15_t)0xe8e3,
-  (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7de2, (q15_t)0xe8d7, (q15_t)0x7de1, (q15_t)0xe8d0, (q15_t)0x7de0, (q15_t)0xe8ca,
-  (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dde, (q15_t)0xe8be, (q15_t)0x7ddd, (q15_t)0xe8b8, (q15_t)0x7ddc, (q15_t)0xe8b2,
-  (q15_t)0x7dda, (q15_t)0xe8ab, (q15_t)0x7dd9, (q15_t)0xe8a5, (q15_t)0x7dd8, (q15_t)0xe89f, (q15_t)0x7dd7, (q15_t)0xe899,
-  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd5, (q15_t)0xe88c, (q15_t)0x7dd4, (q15_t)0xe886, (q15_t)0x7dd2, (q15_t)0xe880,
-  (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dd0, (q15_t)0xe874, (q15_t)0x7dcf, (q15_t)0xe86e, (q15_t)0x7dce, (q15_t)0xe867,
-  (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dcc, (q15_t)0xe85b, (q15_t)0x7dca, (q15_t)0xe855, (q15_t)0x7dc9, (q15_t)0xe84f,
-  (q15_t)0x7dc8, (q15_t)0xe849, (q15_t)0x7dc7, (q15_t)0xe842, (q15_t)0x7dc6, (q15_t)0xe83c, (q15_t)0x7dc5, (q15_t)0xe836,
-  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dc2, (q15_t)0xe82a, (q15_t)0x7dc1, (q15_t)0xe823, (q15_t)0x7dc0, (q15_t)0xe81d,
-  (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dbd, (q15_t)0xe811, (q15_t)0x7dbc, (q15_t)0xe80b, (q15_t)0x7dbb, (q15_t)0xe805,
-  (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db9, (q15_t)0xe7f8, (q15_t)0x7db8, (q15_t)0xe7f2, (q15_t)0x7db6, (q15_t)0xe7ec,
-  (q15_t)0x7db5, (q15_t)0xe7e6, (q15_t)0x7db4, (q15_t)0xe7e0, (q15_t)0x7db3, (q15_t)0xe7d9, (q15_t)0x7db2, (q15_t)0xe7d3,
-  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7daf, (q15_t)0xe7c7, (q15_t)0x7dae, (q15_t)0xe7c1, (q15_t)0x7dad, (q15_t)0xe7bb,
-  (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7dab, (q15_t)0xe7ae, (q15_t)0x7da9, (q15_t)0xe7a8, (q15_t)0x7da8, (q15_t)0xe7a2,
-  (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da6, (q15_t)0xe796, (q15_t)0x7da5, (q15_t)0xe78f, (q15_t)0x7da3, (q15_t)0xe789,
-  (q15_t)0x7da2, (q15_t)0xe783, (q15_t)0x7da1, (q15_t)0xe77d, (q15_t)0x7da0, (q15_t)0xe777, (q15_t)0x7d9f, (q15_t)0xe771,
-  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d9c, (q15_t)0xe764, (q15_t)0x7d9b, (q15_t)0xe75e, (q15_t)0x7d9a, (q15_t)0xe758,
-  (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d97, (q15_t)0xe74c, (q15_t)0x7d96, (q15_t)0xe745, (q15_t)0x7d95, (q15_t)0xe73f,
-  (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d92, (q15_t)0xe733, (q15_t)0x7d91, (q15_t)0xe72d, (q15_t)0x7d90, (q15_t)0xe727,
-  (q15_t)0x7d8f, (q15_t)0xe720, (q15_t)0x7d8e, (q15_t)0xe71a, (q15_t)0x7d8c, (q15_t)0xe714, (q15_t)0x7d8b, (q15_t)0xe70e,
-  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d89, (q15_t)0xe702, (q15_t)0x7d87, (q15_t)0xe6fb, (q15_t)0x7d86, (q15_t)0xe6f5,
-  (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d84, (q15_t)0xe6e9, (q15_t)0x7d82, (q15_t)0xe6e3, (q15_t)0x7d81, (q15_t)0xe6dd,
-  (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7f, (q15_t)0xe6d0, (q15_t)0x7d7e, (q15_t)0xe6ca, (q15_t)0x7d7c, (q15_t)0xe6c4,
-  (q15_t)0x7d7b, (q15_t)0xe6be, (q15_t)0x7d7a, (q15_t)0xe6b8, (q15_t)0x7d79, (q15_t)0xe6b2, (q15_t)0x7d77, (q15_t)0xe6ab,
-  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d75, (q15_t)0xe69f, (q15_t)0x7d74, (q15_t)0xe699, (q15_t)0x7d72, (q15_t)0xe693,
-  (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d70, (q15_t)0xe686, (q15_t)0x7d6f, (q15_t)0xe680, (q15_t)0x7d6d, (q15_t)0xe67a,
-  (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d6b, (q15_t)0xe66e, (q15_t)0x7d6a, (q15_t)0xe668, (q15_t)0x7d68, (q15_t)0xe661,
-  (q15_t)0x7d67, (q15_t)0xe65b, (q15_t)0x7d66, (q15_t)0xe655, (q15_t)0x7d65, (q15_t)0xe64f, (q15_t)0x7d63, (q15_t)0xe649,
-  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d61, (q15_t)0xe63d, (q15_t)0x7d60, (q15_t)0xe636, (q15_t)0x7d5e, (q15_t)0xe630,
-  (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d5c, (q15_t)0xe624, (q15_t)0x7d5a, (q15_t)0xe61e, (q15_t)0x7d59, (q15_t)0xe618,
-  (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d57, (q15_t)0xe60b, (q15_t)0x7d55, (q15_t)0xe605, (q15_t)0x7d54, (q15_t)0xe5ff,
-  (q15_t)0x7d53, (q15_t)0xe5f9, (q15_t)0x7d52, (q15_t)0xe5f3, (q15_t)0x7d50, (q15_t)0xe5ed, (q15_t)0x7d4f, (q15_t)0xe5e6,
-  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d4c, (q15_t)0xe5da, (q15_t)0x7d4b, (q15_t)0xe5d4, (q15_t)0x7d4a, (q15_t)0xe5ce,
-  (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d47, (q15_t)0xe5c2, (q15_t)0x7d46, (q15_t)0xe5bb, (q15_t)0x7d45, (q15_t)0xe5b5,
-  (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d42, (q15_t)0xe5a9, (q15_t)0x7d41, (q15_t)0xe5a3, (q15_t)0x7d3f, (q15_t)0xe59d,
-  (q15_t)0x7d3e, (q15_t)0xe596, (q15_t)0x7d3d, (q15_t)0xe590, (q15_t)0x7d3c, (q15_t)0xe58a, (q15_t)0x7d3a, (q15_t)0xe584,
-  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d38, (q15_t)0xe578, (q15_t)0x7d36, (q15_t)0xe572, (q15_t)0x7d35, (q15_t)0xe56b,
-  (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d32, (q15_t)0xe55f, (q15_t)0x7d31, (q15_t)0xe559, (q15_t)0x7d30, (q15_t)0xe553,
-  (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d2d, (q15_t)0xe547, (q15_t)0x7d2c, (q15_t)0xe540, (q15_t)0x7d2b, (q15_t)0xe53a,
-  (q15_t)0x7d29, (q15_t)0xe534, (q15_t)0x7d28, (q15_t)0xe52e, (q15_t)0x7d27, (q15_t)0xe528, (q15_t)0x7d25, (q15_t)0xe522,
-  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d23, (q15_t)0xe515, (q15_t)0x7d21, (q15_t)0xe50f, (q15_t)0x7d20, (q15_t)0xe509,
-  (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d1d, (q15_t)0xe4fd, (q15_t)0x7d1c, (q15_t)0xe4f7, (q15_t)0x7d1b, (q15_t)0xe4f1,
-  (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d18, (q15_t)0xe4e4, (q15_t)0x7d17, (q15_t)0xe4de, (q15_t)0x7d15, (q15_t)0xe4d8,
-  (q15_t)0x7d14, (q15_t)0xe4d2, (q15_t)0x7d13, (q15_t)0xe4cc, (q15_t)0x7d11, (q15_t)0xe4c6, (q15_t)0x7d10, (q15_t)0xe4bf,
-  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d0d, (q15_t)0xe4b3, (q15_t)0x7d0c, (q15_t)0xe4ad, (q15_t)0x7d0b, (q15_t)0xe4a7,
-  (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d08, (q15_t)0xe49b, (q15_t)0x7d07, (q15_t)0xe494, (q15_t)0x7d05, (q15_t)0xe48e,
-  (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7d03, (q15_t)0xe482, (q15_t)0x7d01, (q15_t)0xe47c, (q15_t)0x7d00, (q15_t)0xe476,
-  (q15_t)0x7cff, (q15_t)0xe470, (q15_t)0x7cfd, (q15_t)0xe46a, (q15_t)0x7cfc, (q15_t)0xe463, (q15_t)0x7cfb, (q15_t)0xe45d,
-  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf8, (q15_t)0xe451, (q15_t)0x7cf6, (q15_t)0xe44b, (q15_t)0x7cf5, (q15_t)0xe445,
-  (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cf2, (q15_t)0xe438, (q15_t)0x7cf1, (q15_t)0xe432, (q15_t)0x7cf0, (q15_t)0xe42c,
-  (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ced, (q15_t)0xe420, (q15_t)0x7cec, (q15_t)0xe41a, (q15_t)0x7cea, (q15_t)0xe414,
-  (q15_t)0x7ce9, (q15_t)0xe40e, (q15_t)0x7ce7, (q15_t)0xe407, (q15_t)0x7ce6, (q15_t)0xe401, (q15_t)0x7ce5, (q15_t)0xe3fb,
-  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ce2, (q15_t)0xe3ef, (q15_t)0x7ce1, (q15_t)0xe3e9, (q15_t)0x7cdf, (q15_t)0xe3e3,
-  (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cdc, (q15_t)0xe3d6, (q15_t)0x7cdb, (q15_t)0xe3d0, (q15_t)0x7cda, (q15_t)0xe3ca,
-  (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd7, (q15_t)0xe3be, (q15_t)0x7cd5, (q15_t)0xe3b8, (q15_t)0x7cd4, (q15_t)0xe3b2,
-  (q15_t)0x7cd3, (q15_t)0xe3ab, (q15_t)0x7cd1, (q15_t)0xe3a5, (q15_t)0x7cd0, (q15_t)0xe39f, (q15_t)0x7ccf, (q15_t)0xe399,
-  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7ccc, (q15_t)0xe38d, (q15_t)0x7cca, (q15_t)0xe387, (q15_t)0x7cc9, (q15_t)0xe381,
-  (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc6, (q15_t)0xe374, (q15_t)0x7cc5, (q15_t)0xe36e, (q15_t)0x7cc3, (q15_t)0xe368,
-  (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cc1, (q15_t)0xe35c, (q15_t)0x7cbf, (q15_t)0xe356, (q15_t)0x7cbe, (q15_t)0xe350,
-  (q15_t)0x7cbc, (q15_t)0xe349, (q15_t)0x7cbb, (q15_t)0xe343, (q15_t)0x7cb9, (q15_t)0xe33d, (q15_t)0x7cb8, (q15_t)0xe337,
-  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb5, (q15_t)0xe32b, (q15_t)0x7cb4, (q15_t)0xe325, (q15_t)0x7cb2, (q15_t)0xe31f,
-  (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cb0, (q15_t)0xe312, (q15_t)0x7cae, (q15_t)0xe30c, (q15_t)0x7cad, (q15_t)0xe306,
-  (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7caa, (q15_t)0xe2fa, (q15_t)0x7ca8, (q15_t)0xe2f4, (q15_t)0x7ca7, (q15_t)0xe2ee,
-  (q15_t)0x7ca6, (q15_t)0xe2e8, (q15_t)0x7ca4, (q15_t)0xe2e1, (q15_t)0x7ca3, (q15_t)0xe2db, (q15_t)0x7ca1, (q15_t)0xe2d5,
-  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9e, (q15_t)0xe2c9, (q15_t)0x7c9d, (q15_t)0xe2c3, (q15_t)0x7c9c, (q15_t)0xe2bd,
-  (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c99, (q15_t)0xe2b0, (q15_t)0x7c97, (q15_t)0xe2aa, (q15_t)0x7c96, (q15_t)0xe2a4,
-  (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c93, (q15_t)0xe298, (q15_t)0x7c91, (q15_t)0xe292, (q15_t)0x7c90, (q15_t)0xe28c,
-  (q15_t)0x7c8f, (q15_t)0xe286, (q15_t)0x7c8d, (q15_t)0xe280, (q15_t)0x7c8c, (q15_t)0xe279, (q15_t)0x7c8a, (q15_t)0xe273,
-  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c87, (q15_t)0xe267, (q15_t)0x7c86, (q15_t)0xe261, (q15_t)0x7c84, (q15_t)0xe25b,
-  (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c82, (q15_t)0xe24f, (q15_t)0x7c80, (q15_t)0xe249, (q15_t)0x7c7f, (q15_t)0xe242,
-  (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c7c, (q15_t)0xe236, (q15_t)0x7c7a, (q15_t)0xe230, (q15_t)0x7c79, (q15_t)0xe22a,
-  (q15_t)0x7c77, (q15_t)0xe224, (q15_t)0x7c76, (q15_t)0xe21e, (q15_t)0x7c74, (q15_t)0xe218, (q15_t)0x7c73, (q15_t)0xe212,
-  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c70, (q15_t)0xe205, (q15_t)0x7c6e, (q15_t)0xe1ff, (q15_t)0x7c6d, (q15_t)0xe1f9,
-  (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c6a, (q15_t)0xe1ed, (q15_t)0x7c69, (q15_t)0xe1e7, (q15_t)0x7c67, (q15_t)0xe1e1,
-  (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c64, (q15_t)0xe1d4, (q15_t)0x7c63, (q15_t)0xe1ce, (q15_t)0x7c61, (q15_t)0xe1c8,
-  (q15_t)0x7c60, (q15_t)0xe1c2, (q15_t)0x7c5e, (q15_t)0xe1bc, (q15_t)0x7c5d, (q15_t)0xe1b6, (q15_t)0x7c5b, (q15_t)0xe1b0,
-  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c58, (q15_t)0xe1a4, (q15_t)0x7c57, (q15_t)0xe19e, (q15_t)0x7c55, (q15_t)0xe197,
-  (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c52, (q15_t)0xe18b, (q15_t)0x7c51, (q15_t)0xe185, (q15_t)0x7c4f, (q15_t)0xe17f,
-  (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c4c, (q15_t)0xe173, (q15_t)0x7c4b, (q15_t)0xe16d, (q15_t)0x7c49, (q15_t)0xe167,
-  (q15_t)0x7c48, (q15_t)0xe160, (q15_t)0x7c46, (q15_t)0xe15a, (q15_t)0x7c45, (q15_t)0xe154, (q15_t)0x7c43, (q15_t)0xe14e,
-  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c40, (q15_t)0xe142, (q15_t)0x7c3f, (q15_t)0xe13c, (q15_t)0x7c3d, (q15_t)0xe136,
-  (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c3a, (q15_t)0xe12a, (q15_t)0x7c39, (q15_t)0xe123, (q15_t)0x7c37, (q15_t)0xe11d,
-  (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c34, (q15_t)0xe111, (q15_t)0x7c33, (q15_t)0xe10b, (q15_t)0x7c31, (q15_t)0xe105,
-  (q15_t)0x7c30, (q15_t)0xe0ff, (q15_t)0x7c2e, (q15_t)0xe0f9, (q15_t)0x7c2d, (q15_t)0xe0f3, (q15_t)0x7c2b, (q15_t)0xe0ed,
-  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c28, (q15_t)0xe0e0, (q15_t)0x7c26, (q15_t)0xe0da, (q15_t)0x7c25, (q15_t)0xe0d4,
-  (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c22, (q15_t)0xe0c8, (q15_t)0x7c20, (q15_t)0xe0c2, (q15_t)0x7c1f, (q15_t)0xe0bc,
-  (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c1c, (q15_t)0xe0b0, (q15_t)0x7c1a, (q15_t)0xe0aa, (q15_t)0x7c19, (q15_t)0xe0a3,
-  (q15_t)0x7c17, (q15_t)0xe09d, (q15_t)0x7c16, (q15_t)0xe097, (q15_t)0x7c14, (q15_t)0xe091, (q15_t)0x7c12, (q15_t)0xe08b,
-  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0f, (q15_t)0xe07f, (q15_t)0x7c0e, (q15_t)0xe079, (q15_t)0x7c0c, (q15_t)0xe073,
-  (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c09, (q15_t)0xe067, (q15_t)0x7c08, (q15_t)0xe061, (q15_t)0x7c06, (q15_t)0xe05a,
-  (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7c03, (q15_t)0xe04e, (q15_t)0x7c01, (q15_t)0xe048, (q15_t)0x7c00, (q15_t)0xe042,
-  (q15_t)0x7bfe, (q15_t)0xe03c, (q15_t)0x7bfd, (q15_t)0xe036, (q15_t)0x7bfb, (q15_t)0xe030, (q15_t)0x7bfa, (q15_t)0xe02a,
-  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf6, (q15_t)0xe01e, (q15_t)0x7bf5, (q15_t)0xe017, (q15_t)0x7bf3, (q15_t)0xe011,
-  (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7bf0, (q15_t)0xe005, (q15_t)0x7bef, (q15_t)0xdfff, (q15_t)0x7bed, (q15_t)0xdff9,
-  (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7bea, (q15_t)0xdfed, (q15_t)0x7be8, (q15_t)0xdfe7, (q15_t)0x7be7, (q15_t)0xdfe1,
-  (q15_t)0x7be5, (q15_t)0xdfdb, (q15_t)0x7be4, (q15_t)0xdfd5, (q15_t)0x7be2, (q15_t)0xdfce, (q15_t)0x7be0, (q15_t)0xdfc8,
-  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bdd, (q15_t)0xdfbc, (q15_t)0x7bdc, (q15_t)0xdfb6, (q15_t)0x7bda, (q15_t)0xdfb0,
-  (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd7, (q15_t)0xdfa4, (q15_t)0x7bd5, (q15_t)0xdf9e, (q15_t)0x7bd4, (q15_t)0xdf98,
-  (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bd1, (q15_t)0xdf8c, (q15_t)0x7bcf, (q15_t)0xdf86, (q15_t)0x7bcd, (q15_t)0xdf7f,
-  (q15_t)0x7bcc, (q15_t)0xdf79, (q15_t)0x7bca, (q15_t)0xdf73, (q15_t)0x7bc9, (q15_t)0xdf6d, (q15_t)0x7bc7, (q15_t)0xdf67,
-  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bc4, (q15_t)0xdf5b, (q15_t)0x7bc2, (q15_t)0xdf55, (q15_t)0x7bc1, (q15_t)0xdf4f,
-  (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bbd, (q15_t)0xdf43, (q15_t)0x7bbc, (q15_t)0xdf3d, (q15_t)0x7bba, (q15_t)0xdf37,
-  (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb7, (q15_t)0xdf2a, (q15_t)0x7bb5, (q15_t)0xdf24, (q15_t)0x7bb4, (q15_t)0xdf1e,
-  (q15_t)0x7bb2, (q15_t)0xdf18, (q15_t)0x7bb0, (q15_t)0xdf12, (q15_t)0x7baf, (q15_t)0xdf0c, (q15_t)0x7bad, (q15_t)0xdf06,
-  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7baa, (q15_t)0xdefa, (q15_t)0x7ba8, (q15_t)0xdef4, (q15_t)0x7ba7, (q15_t)0xdeee,
-  (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7ba3, (q15_t)0xdee2, (q15_t)0x7ba2, (q15_t)0xdedb, (q15_t)0x7ba0, (q15_t)0xded5,
-  (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b9d, (q15_t)0xdec9, (q15_t)0x7b9b, (q15_t)0xdec3, (q15_t)0x7b9a, (q15_t)0xdebd,
-  (q15_t)0x7b98, (q15_t)0xdeb7, (q15_t)0x7b96, (q15_t)0xdeb1, (q15_t)0x7b95, (q15_t)0xdeab, (q15_t)0x7b93, (q15_t)0xdea5,
-  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b90, (q15_t)0xde99, (q15_t)0x7b8e, (q15_t)0xde93, (q15_t)0x7b8d, (q15_t)0xde8d,
-  (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b89, (q15_t)0xde80, (q15_t)0x7b88, (q15_t)0xde7a, (q15_t)0x7b86, (q15_t)0xde74,
-  (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b83, (q15_t)0xde68, (q15_t)0x7b81, (q15_t)0xde62, (q15_t)0x7b7f, (q15_t)0xde5c,
-  (q15_t)0x7b7e, (q15_t)0xde56, (q15_t)0x7b7c, (q15_t)0xde50, (q15_t)0x7b7a, (q15_t)0xde4a, (q15_t)0x7b79, (q15_t)0xde44,
-  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b76, (q15_t)0xde38, (q15_t)0x7b74, (q15_t)0xde32, (q15_t)0x7b72, (q15_t)0xde2c,
-  (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6f, (q15_t)0xde1f, (q15_t)0x7b6d, (q15_t)0xde19, (q15_t)0x7b6c, (q15_t)0xde13,
-  (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b68, (q15_t)0xde07, (q15_t)0x7b67, (q15_t)0xde01, (q15_t)0x7b65, (q15_t)0xddfb,
-  (q15_t)0x7b63, (q15_t)0xddf5, (q15_t)0x7b62, (q15_t)0xddef, (q15_t)0x7b60, (q15_t)0xdde9, (q15_t)0x7b5e, (q15_t)0xdde3,
-  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b5b, (q15_t)0xddd7, (q15_t)0x7b59, (q15_t)0xddd1, (q15_t)0x7b57, (q15_t)0xddcb,
-  (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b54, (q15_t)0xddbf, (q15_t)0x7b52, (q15_t)0xddb9, (q15_t)0x7b51, (q15_t)0xddb2,
-  (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b4d, (q15_t)0xdda6, (q15_t)0x7b4c, (q15_t)0xdda0, (q15_t)0x7b4a, (q15_t)0xdd9a,
-  (q15_t)0x7b48, (q15_t)0xdd94, (q15_t)0x7b47, (q15_t)0xdd8e, (q15_t)0x7b45, (q15_t)0xdd88, (q15_t)0x7b43, (q15_t)0xdd82,
-  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b40, (q15_t)0xdd76, (q15_t)0x7b3e, (q15_t)0xdd70, (q15_t)0x7b3c, (q15_t)0xdd6a,
-  (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b39, (q15_t)0xdd5e, (q15_t)0x7b37, (q15_t)0xdd58, (q15_t)0x7b36, (q15_t)0xdd52,
-  (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b32, (q15_t)0xdd46, (q15_t)0x7b31, (q15_t)0xdd40, (q15_t)0x7b2f, (q15_t)0xdd39,
-  (q15_t)0x7b2d, (q15_t)0xdd33, (q15_t)0x7b2b, (q15_t)0xdd2d, (q15_t)0x7b2a, (q15_t)0xdd27, (q15_t)0x7b28, (q15_t)0xdd21,
-  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b25, (q15_t)0xdd15, (q15_t)0x7b23, (q15_t)0xdd0f, (q15_t)0x7b21, (q15_t)0xdd09,
-  (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b1e, (q15_t)0xdcfd, (q15_t)0x7b1c, (q15_t)0xdcf7, (q15_t)0x7b1a, (q15_t)0xdcf1,
-  (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b17, (q15_t)0xdce5, (q15_t)0x7b15, (q15_t)0xdcdf, (q15_t)0x7b13, (q15_t)0xdcd9,
-  (q15_t)0x7b12, (q15_t)0xdcd3, (q15_t)0x7b10, (q15_t)0xdccd, (q15_t)0x7b0e, (q15_t)0xdcc7, (q15_t)0x7b0c, (q15_t)0xdcc1,
-  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b09, (q15_t)0xdcb5, (q15_t)0x7b07, (q15_t)0xdcae, (q15_t)0x7b06, (q15_t)0xdca8,
-  (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7b02, (q15_t)0xdc9c, (q15_t)0x7b00, (q15_t)0xdc96, (q15_t)0x7aff, (q15_t)0xdc90,
-  (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7afb, (q15_t)0xdc84, (q15_t)0x7af9, (q15_t)0xdc7e, (q15_t)0x7af8, (q15_t)0xdc78,
-  (q15_t)0x7af6, (q15_t)0xdc72, (q15_t)0x7af4, (q15_t)0xdc6c, (q15_t)0x7af2, (q15_t)0xdc66, (q15_t)0x7af1, (q15_t)0xdc60,
-  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7aed, (q15_t)0xdc54, (q15_t)0x7aeb, (q15_t)0xdc4e, (q15_t)0x7aea, (q15_t)0xdc48,
-  (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae6, (q15_t)0xdc3c, (q15_t)0x7ae4, (q15_t)0xdc36, (q15_t)0x7ae3, (q15_t)0xdc30,
-  (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7adf, (q15_t)0xdc24, (q15_t)0x7add, (q15_t)0xdc1e, (q15_t)0x7adc, (q15_t)0xdc18,
-  (q15_t)0x7ada, (q15_t)0xdc12, (q15_t)0x7ad8, (q15_t)0xdc0c, (q15_t)0x7ad6, (q15_t)0xdc06, (q15_t)0x7ad5, (q15_t)0xdbff,
-  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ad1, (q15_t)0xdbf3, (q15_t)0x7acf, (q15_t)0xdbed, (q15_t)0x7acd, (q15_t)0xdbe7,
-  (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7aca, (q15_t)0xdbdb, (q15_t)0x7ac8, (q15_t)0xdbd5, (q15_t)0x7ac6, (q15_t)0xdbcf,
-  (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7ac3, (q15_t)0xdbc3, (q15_t)0x7ac1, (q15_t)0xdbbd, (q15_t)0x7abf, (q15_t)0xdbb7,
-  (q15_t)0x7abd, (q15_t)0xdbb1, (q15_t)0x7abc, (q15_t)0xdbab, (q15_t)0x7aba, (q15_t)0xdba5, (q15_t)0x7ab8, (q15_t)0xdb9f,
-  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7ab5, (q15_t)0xdb93, (q15_t)0x7ab3, (q15_t)0xdb8d, (q15_t)0x7ab1, (q15_t)0xdb87,
-  (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aad, (q15_t)0xdb7b, (q15_t)0x7aac, (q15_t)0xdb75, (q15_t)0x7aaa, (q15_t)0xdb6f,
-  (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa6, (q15_t)0xdb63, (q15_t)0x7aa4, (q15_t)0xdb5d, (q15_t)0x7aa3, (q15_t)0xdb57,
-  (q15_t)0x7aa1, (q15_t)0xdb51, (q15_t)0x7a9f, (q15_t)0xdb4b, (q15_t)0x7a9d, (q15_t)0xdb45, (q15_t)0x7a9b, (q15_t)0xdb3f,
-  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a98, (q15_t)0xdb33, (q15_t)0x7a96, (q15_t)0xdb2d, (q15_t)0x7a94, (q15_t)0xdb27,
-  (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a91, (q15_t)0xdb1b, (q15_t)0x7a8f, (q15_t)0xdb15, (q15_t)0x7a8d, (q15_t)0xdb0f,
-  (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a89, (q15_t)0xdb03, (q15_t)0x7a87, (q15_t)0xdafd, (q15_t)0x7a86, (q15_t)0xdaf7,
-  (q15_t)0x7a84, (q15_t)0xdaf1, (q15_t)0x7a82, (q15_t)0xdaea, (q15_t)0x7a80, (q15_t)0xdae4, (q15_t)0x7a7e, (q15_t)0xdade,
-  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a7b, (q15_t)0xdad2, (q15_t)0x7a79, (q15_t)0xdacc, (q15_t)0x7a77, (q15_t)0xdac6,
-  (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a73, (q15_t)0xdaba, (q15_t)0x7a72, (q15_t)0xdab4, (q15_t)0x7a70, (q15_t)0xdaae,
-  (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a6c, (q15_t)0xdaa2, (q15_t)0x7a6a, (q15_t)0xda9c, (q15_t)0x7a68, (q15_t)0xda96,
-  (q15_t)0x7a67, (q15_t)0xda90, (q15_t)0x7a65, (q15_t)0xda8a, (q15_t)0x7a63, (q15_t)0xda84, (q15_t)0x7a61, (q15_t)0xda7e,
-  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a5d, (q15_t)0xda72, (q15_t)0x7a5c, (q15_t)0xda6c, (q15_t)0x7a5a, (q15_t)0xda66,
-  (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a56, (q15_t)0xda5a, (q15_t)0x7a54, (q15_t)0xda54, (q15_t)0x7a52, (q15_t)0xda4e,
-  (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a4f, (q15_t)0xda42, (q15_t)0x7a4d, (q15_t)0xda3c, (q15_t)0x7a4b, (q15_t)0xda36,
-  (q15_t)0x7a49, (q15_t)0xda30, (q15_t)0x7a47, (q15_t)0xda2a, (q15_t)0x7a45, (q15_t)0xda24, (q15_t)0x7a43, (q15_t)0xda1e,
-  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a40, (q15_t)0xda12, (q15_t)0x7a3e, (q15_t)0xda0c, (q15_t)0x7a3c, (q15_t)0xda06,
-  (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a38, (q15_t)0xd9fa, (q15_t)0x7a36, (q15_t)0xd9f4, (q15_t)0x7a35, (q15_t)0xd9ee,
-  (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a31, (q15_t)0xd9e2, (q15_t)0x7a2f, (q15_t)0xd9dc, (q15_t)0x7a2d, (q15_t)0xd9d6,
-  (q15_t)0x7a2b, (q15_t)0xd9d0, (q15_t)0x7a29, (q15_t)0xd9ca, (q15_t)0x7a27, (q15_t)0xd9c4, (q15_t)0x7a26, (q15_t)0xd9be,
-  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a22, (q15_t)0xd9b2, (q15_t)0x7a20, (q15_t)0xd9ac, (q15_t)0x7a1e, (q15_t)0xd9a6,
-  (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a1a, (q15_t)0xd99a, (q15_t)0x7a18, (q15_t)0xd994, (q15_t)0x7a16, (q15_t)0xd98e,
-  (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a13, (q15_t)0xd982, (q15_t)0x7a11, (q15_t)0xd97c, (q15_t)0x7a0f, (q15_t)0xd976,
-  (q15_t)0x7a0d, (q15_t)0xd970, (q15_t)0x7a0b, (q15_t)0xd96a, (q15_t)0x7a09, (q15_t)0xd964, (q15_t)0x7a07, (q15_t)0xd95e,
-  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x7a04, (q15_t)0xd952, (q15_t)0x7a02, (q15_t)0xd94c, (q15_t)0x7a00, (q15_t)0xd946,
-  (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79fc, (q15_t)0xd93a, (q15_t)0x79fa, (q15_t)0xd934, (q15_t)0x79f8, (q15_t)0xd92e,
-  (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79f4, (q15_t)0xd922, (q15_t)0x79f2, (q15_t)0xd91c, (q15_t)0x79f0, (q15_t)0xd917,
-  (q15_t)0x79ef, (q15_t)0xd911, (q15_t)0x79ed, (q15_t)0xd90b, (q15_t)0x79eb, (q15_t)0xd905, (q15_t)0x79e9, (q15_t)0xd8ff,
-  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79e5, (q15_t)0xd8f3, (q15_t)0x79e3, (q15_t)0xd8ed, (q15_t)0x79e1, (q15_t)0xd8e7,
-  (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79dd, (q15_t)0xd8db, (q15_t)0x79db, (q15_t)0xd8d5, (q15_t)0x79d9, (q15_t)0xd8cf,
-  (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d6, (q15_t)0xd8c3, (q15_t)0x79d4, (q15_t)0xd8bd, (q15_t)0x79d2, (q15_t)0xd8b7,
-  (q15_t)0x79d0, (q15_t)0xd8b1, (q15_t)0x79ce, (q15_t)0xd8ab, (q15_t)0x79cc, (q15_t)0xd8a5, (q15_t)0x79ca, (q15_t)0xd89f,
-  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c6, (q15_t)0xd893, (q15_t)0x79c4, (q15_t)0xd88d, (q15_t)0x79c2, (q15_t)0xd887,
-  (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79be, (q15_t)0xd87b, (q15_t)0x79bc, (q15_t)0xd875, (q15_t)0x79bb, (q15_t)0xd86f,
-  (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b7, (q15_t)0xd863, (q15_t)0x79b5, (q15_t)0xd85d, (q15_t)0x79b3, (q15_t)0xd857,
-  (q15_t)0x79b1, (q15_t)0xd851, (q15_t)0x79af, (q15_t)0xd84b, (q15_t)0x79ad, (q15_t)0xd845, (q15_t)0x79ab, (q15_t)0xd83f,
-  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a7, (q15_t)0xd833, (q15_t)0x79a5, (q15_t)0xd82d, (q15_t)0x79a3, (q15_t)0xd827,
-  (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x799f, (q15_t)0xd81b, (q15_t)0x799d, (q15_t)0xd815, (q15_t)0x799b, (q15_t)0xd80f,
-  (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7997, (q15_t)0xd804, (q15_t)0x7995, (q15_t)0xd7fe, (q15_t)0x7993, (q15_t)0xd7f8,
-  (q15_t)0x7992, (q15_t)0xd7f2, (q15_t)0x7990, (q15_t)0xd7ec, (q15_t)0x798e, (q15_t)0xd7e6, (q15_t)0x798c, (q15_t)0xd7e0,
-  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7988, (q15_t)0xd7d4, (q15_t)0x7986, (q15_t)0xd7ce, (q15_t)0x7984, (q15_t)0xd7c8,
-  (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x7980, (q15_t)0xd7bc, (q15_t)0x797e, (q15_t)0xd7b6, (q15_t)0x797c, (q15_t)0xd7b0,
-  (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7978, (q15_t)0xd7a4, (q15_t)0x7976, (q15_t)0xd79e, (q15_t)0x7974, (q15_t)0xd798,
-  (q15_t)0x7972, (q15_t)0xd792, (q15_t)0x7970, (q15_t)0xd78c, (q15_t)0x796e, (q15_t)0xd786, (q15_t)0x796c, (q15_t)0xd780,
-  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7968, (q15_t)0xd774, (q15_t)0x7966, (q15_t)0xd76e, (q15_t)0x7964, (q15_t)0xd768,
-  (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x7960, (q15_t)0xd75d, (q15_t)0x795e, (q15_t)0xd757, (q15_t)0x795c, (q15_t)0xd751,
-  (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7958, (q15_t)0xd745, (q15_t)0x7956, (q15_t)0xd73f, (q15_t)0x7954, (q15_t)0xd739,
-  (q15_t)0x7952, (q15_t)0xd733, (q15_t)0x7950, (q15_t)0xd72d, (q15_t)0x794e, (q15_t)0xd727, (q15_t)0x794c, (q15_t)0xd721,
-  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7948, (q15_t)0xd715, (q15_t)0x7946, (q15_t)0xd70f, (q15_t)0x7944, (q15_t)0xd709,
-  (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x7940, (q15_t)0xd6fd, (q15_t)0x793e, (q15_t)0xd6f7, (q15_t)0x793c, (q15_t)0xd6f1,
-  (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7938, (q15_t)0xd6e5, (q15_t)0x7936, (q15_t)0xd6e0, (q15_t)0x7934, (q15_t)0xd6da,
-  (q15_t)0x7932, (q15_t)0xd6d4, (q15_t)0x7930, (q15_t)0xd6ce, (q15_t)0x792e, (q15_t)0xd6c8, (q15_t)0x792c, (q15_t)0xd6c2,
-  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7928, (q15_t)0xd6b6, (q15_t)0x7926, (q15_t)0xd6b0, (q15_t)0x7924, (q15_t)0xd6aa,
-  (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7920, (q15_t)0xd69e, (q15_t)0x791e, (q15_t)0xd698, (q15_t)0x791c, (q15_t)0xd692,
-  (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7917, (q15_t)0xd686, (q15_t)0x7915, (q15_t)0xd680, (q15_t)0x7913, (q15_t)0xd67a,
-  (q15_t)0x7911, (q15_t)0xd675, (q15_t)0x790f, (q15_t)0xd66f, (q15_t)0x790d, (q15_t)0xd669, (q15_t)0x790b, (q15_t)0xd663,
-  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7907, (q15_t)0xd657, (q15_t)0x7905, (q15_t)0xd651, (q15_t)0x7903, (q15_t)0xd64b,
-  (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78ff, (q15_t)0xd63f, (q15_t)0x78fd, (q15_t)0xd639, (q15_t)0x78fb, (q15_t)0xd633,
-  (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f7, (q15_t)0xd627, (q15_t)0x78f5, (q15_t)0xd621, (q15_t)0x78f3, (q15_t)0xd61b,
-  (q15_t)0x78f1, (q15_t)0xd615, (q15_t)0x78ee, (q15_t)0xd610, (q15_t)0x78ec, (q15_t)0xd60a, (q15_t)0x78ea, (q15_t)0xd604,
-  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e6, (q15_t)0xd5f8, (q15_t)0x78e4, (q15_t)0xd5f2, (q15_t)0x78e2, (q15_t)0xd5ec,
-  (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78de, (q15_t)0xd5e0, (q15_t)0x78dc, (q15_t)0xd5da, (q15_t)0x78da, (q15_t)0xd5d4,
-  (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78d6, (q15_t)0xd5c8, (q15_t)0x78d4, (q15_t)0xd5c2, (q15_t)0x78d2, (q15_t)0xd5bc,
-  (q15_t)0x78cf, (q15_t)0xd5b7, (q15_t)0x78cd, (q15_t)0xd5b1, (q15_t)0x78cb, (q15_t)0xd5ab, (q15_t)0x78c9, (q15_t)0xd5a5,
-  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78c5, (q15_t)0xd599, (q15_t)0x78c3, (q15_t)0xd593, (q15_t)0x78c1, (q15_t)0xd58d,
-  (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78bd, (q15_t)0xd581, (q15_t)0x78bb, (q15_t)0xd57b, (q15_t)0x78b9, (q15_t)0xd575,
-  (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78b4, (q15_t)0xd569, (q15_t)0x78b2, (q15_t)0xd564, (q15_t)0x78b0, (q15_t)0xd55e,
-  (q15_t)0x78ae, (q15_t)0xd558, (q15_t)0x78ac, (q15_t)0xd552, (q15_t)0x78aa, (q15_t)0xd54c, (q15_t)0x78a8, (q15_t)0xd546,
-  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x78a4, (q15_t)0xd53a, (q15_t)0x78a2, (q15_t)0xd534, (q15_t)0x789f, (q15_t)0xd52e,
-  (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x789b, (q15_t)0xd522, (q15_t)0x7899, (q15_t)0xd51c, (q15_t)0x7897, (q15_t)0xd517,
-  (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x7893, (q15_t)0xd50b, (q15_t)0x7891, (q15_t)0xd505, (q15_t)0x788f, (q15_t)0xd4ff,
-  (q15_t)0x788c, (q15_t)0xd4f9, (q15_t)0x788a, (q15_t)0xd4f3, (q15_t)0x7888, (q15_t)0xd4ed, (q15_t)0x7886, (q15_t)0xd4e7,
-  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7882, (q15_t)0xd4db, (q15_t)0x7880, (q15_t)0xd4d5, (q15_t)0x787e, (q15_t)0xd4d0,
-  (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7879, (q15_t)0xd4c4, (q15_t)0x7877, (q15_t)0xd4be, (q15_t)0x7875, (q15_t)0xd4b8,
-  (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x7871, (q15_t)0xd4ac, (q15_t)0x786f, (q15_t)0xd4a6, (q15_t)0x786d, (q15_t)0xd4a0,
-  (q15_t)0x786b, (q15_t)0xd49a, (q15_t)0x7868, (q15_t)0xd494, (q15_t)0x7866, (q15_t)0xd48f, (q15_t)0x7864, (q15_t)0xd489,
-  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7860, (q15_t)0xd47d, (q15_t)0x785e, (q15_t)0xd477, (q15_t)0x785c, (q15_t)0xd471,
-  (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7857, (q15_t)0xd465, (q15_t)0x7855, (q15_t)0xd45f, (q15_t)0x7853, (q15_t)0xd459,
-  (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x784f, (q15_t)0xd44e, (q15_t)0x784d, (q15_t)0xd448, (q15_t)0x784a, (q15_t)0xd442,
-  (q15_t)0x7848, (q15_t)0xd43c, (q15_t)0x7846, (q15_t)0xd436, (q15_t)0x7844, (q15_t)0xd430, (q15_t)0x7842, (q15_t)0xd42a,
-  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x783e, (q15_t)0xd41e, (q15_t)0x783b, (q15_t)0xd418, (q15_t)0x7839, (q15_t)0xd412,
-  (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x7835, (q15_t)0xd407, (q15_t)0x7833, (q15_t)0xd401, (q15_t)0x7831, (q15_t)0xd3fb,
-  (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x782c, (q15_t)0xd3ef, (q15_t)0x782a, (q15_t)0xd3e9, (q15_t)0x7828, (q15_t)0xd3e3,
-  (q15_t)0x7826, (q15_t)0xd3dd, (q15_t)0x7824, (q15_t)0xd3d7, (q15_t)0x7821, (q15_t)0xd3d2, (q15_t)0x781f, (q15_t)0xd3cc,
-  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x781b, (q15_t)0xd3c0, (q15_t)0x7819, (q15_t)0xd3ba, (q15_t)0x7817, (q15_t)0xd3b4,
-  (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x7812, (q15_t)0xd3a8, (q15_t)0x7810, (q15_t)0xd3a2, (q15_t)0x780e, (q15_t)0xd39d,
-  (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x780a, (q15_t)0xd391, (q15_t)0x7807, (q15_t)0xd38b, (q15_t)0x7805, (q15_t)0xd385,
-  (q15_t)0x7803, (q15_t)0xd37f, (q15_t)0x7801, (q15_t)0xd379, (q15_t)0x77ff, (q15_t)0xd373, (q15_t)0x77fc, (q15_t)0xd36d,
-  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f8, (q15_t)0xd362, (q15_t)0x77f6, (q15_t)0xd35c, (q15_t)0x77f4, (q15_t)0xd356,
-  (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77ef, (q15_t)0xd34a, (q15_t)0x77ed, (q15_t)0xd344, (q15_t)0x77eb, (q15_t)0xd33e,
-  (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e6, (q15_t)0xd333, (q15_t)0x77e4, (q15_t)0xd32d, (q15_t)0x77e2, (q15_t)0xd327,
-  (q15_t)0x77e0, (q15_t)0xd321, (q15_t)0x77de, (q15_t)0xd31b, (q15_t)0x77db, (q15_t)0xd315, (q15_t)0x77d9, (q15_t)0xd30f,
-  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77d5, (q15_t)0xd303, (q15_t)0x77d3, (q15_t)0xd2fe, (q15_t)0x77d0, (q15_t)0xd2f8,
-  (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77cc, (q15_t)0xd2ec, (q15_t)0x77ca, (q15_t)0xd2e6, (q15_t)0x77c8, (q15_t)0xd2e0,
-  (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77c3, (q15_t)0xd2d4, (q15_t)0x77c1, (q15_t)0xd2cf, (q15_t)0x77bf, (q15_t)0xd2c9,
-  (q15_t)0x77bc, (q15_t)0xd2c3, (q15_t)0x77ba, (q15_t)0xd2bd, (q15_t)0x77b8, (q15_t)0xd2b7, (q15_t)0x77b6, (q15_t)0xd2b1,
-  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77b1, (q15_t)0xd2a5, (q15_t)0x77af, (q15_t)0xd2a0, (q15_t)0x77ad, (q15_t)0xd29a,
-  (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a8, (q15_t)0xd28e, (q15_t)0x77a6, (q15_t)0xd288, (q15_t)0x77a4, (q15_t)0xd282,
-  (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x77a0, (q15_t)0xd276, (q15_t)0x779d, (q15_t)0xd271, (q15_t)0x779b, (q15_t)0xd26b,
-  (q15_t)0x7799, (q15_t)0xd265, (q15_t)0x7797, (q15_t)0xd25f, (q15_t)0x7794, (q15_t)0xd259, (q15_t)0x7792, (q15_t)0xd253,
-  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x778e, (q15_t)0xd247, (q15_t)0x778b, (q15_t)0xd242, (q15_t)0x7789, (q15_t)0xd23c,
-  (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x7785, (q15_t)0xd230, (q15_t)0x7782, (q15_t)0xd22a, (q15_t)0x7780, (q15_t)0xd224,
-  (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x777c, (q15_t)0xd219, (q15_t)0x7779, (q15_t)0xd213, (q15_t)0x7777, (q15_t)0xd20d,
-  (q15_t)0x7775, (q15_t)0xd207, (q15_t)0x7773, (q15_t)0xd201, (q15_t)0x7770, (q15_t)0xd1fb, (q15_t)0x776e, (q15_t)0xd1f5,
-  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x776a, (q15_t)0xd1ea, (q15_t)0x7767, (q15_t)0xd1e4, (q15_t)0x7765, (q15_t)0xd1de,
-  (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x7760, (q15_t)0xd1d2, (q15_t)0x775e, (q15_t)0xd1cc, (q15_t)0x775c, (q15_t)0xd1c6,
-  (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7757, (q15_t)0xd1bb, (q15_t)0x7755, (q15_t)0xd1b5, (q15_t)0x7753, (q15_t)0xd1af,
-  (q15_t)0x7751, (q15_t)0xd1a9, (q15_t)0x774e, (q15_t)0xd1a3, (q15_t)0x774c, (q15_t)0xd19d, (q15_t)0x774a, (q15_t)0xd198,
-  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7745, (q15_t)0xd18c, (q15_t)0x7743, (q15_t)0xd186, (q15_t)0x7741, (q15_t)0xd180,
-  (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x773c, (q15_t)0xd174, (q15_t)0x773a, (q15_t)0xd16f, (q15_t)0x7738, (q15_t)0xd169,
-  (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x7733, (q15_t)0xd15d, (q15_t)0x7731, (q15_t)0xd157, (q15_t)0x772e, (q15_t)0xd151,
-  (q15_t)0x772c, (q15_t)0xd14b, (q15_t)0x772a, (q15_t)0xd146, (q15_t)0x7727, (q15_t)0xd140, (q15_t)0x7725, (q15_t)0xd13a,
-  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x7721, (q15_t)0xd12e, (q15_t)0x771e, (q15_t)0xd128, (q15_t)0x771c, (q15_t)0xd123,
-  (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7717, (q15_t)0xd117, (q15_t)0x7715, (q15_t)0xd111, (q15_t)0x7713, (q15_t)0xd10b,
-  (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x770e, (q15_t)0xd0ff, (q15_t)0x770c, (q15_t)0xd0fa, (q15_t)0x770a, (q15_t)0xd0f4,
-  (q15_t)0x7707, (q15_t)0xd0ee, (q15_t)0x7705, (q15_t)0xd0e8, (q15_t)0x7703, (q15_t)0xd0e2, (q15_t)0x7700, (q15_t)0xd0dc,
-  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76fc, (q15_t)0xd0d1, (q15_t)0x76f9, (q15_t)0xd0cb, (q15_t)0x76f7, (q15_t)0xd0c5,
-  (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76f2, (q15_t)0xd0b9, (q15_t)0x76f0, (q15_t)0xd0b4, (q15_t)0x76ee, (q15_t)0xd0ae,
-  (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e9, (q15_t)0xd0a2, (q15_t)0x76e7, (q15_t)0xd09c, (q15_t)0x76e4, (q15_t)0xd096,
-  (q15_t)0x76e2, (q15_t)0xd091, (q15_t)0x76e0, (q15_t)0xd08b, (q15_t)0x76dd, (q15_t)0xd085, (q15_t)0x76db, (q15_t)0xd07f,
-  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76d6, (q15_t)0xd073, (q15_t)0x76d4, (q15_t)0xd06e, (q15_t)0x76d2, (q15_t)0xd068,
-  (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76cd, (q15_t)0xd05c, (q15_t)0x76cb, (q15_t)0xd056, (q15_t)0x76c8, (q15_t)0xd050,
-  (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76c4, (q15_t)0xd045, (q15_t)0x76c1, (q15_t)0xd03f, (q15_t)0x76bf, (q15_t)0xd039,
-  (q15_t)0x76bd, (q15_t)0xd033, (q15_t)0x76ba, (q15_t)0xd02d, (q15_t)0x76b8, (q15_t)0xd028, (q15_t)0x76b6, (q15_t)0xd022,
-  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76b1, (q15_t)0xd016, (q15_t)0x76af, (q15_t)0xd010, (q15_t)0x76ac, (q15_t)0xd00a,
-  (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a8, (q15_t)0xcfff, (q15_t)0x76a5, (q15_t)0xcff9, (q15_t)0x76a3, (q15_t)0xcff3,
-  (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x769e, (q15_t)0xcfe7, (q15_t)0x769c, (q15_t)0xcfe2, (q15_t)0x7699, (q15_t)0xcfdc,
-  (q15_t)0x7697, (q15_t)0xcfd6, (q15_t)0x7695, (q15_t)0xcfd0, (q15_t)0x7692, (q15_t)0xcfca, (q15_t)0x7690, (q15_t)0xcfc5,
-  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x768b, (q15_t)0xcfb9, (q15_t)0x7689, (q15_t)0xcfb3, (q15_t)0x7686, (q15_t)0xcfad,
-  (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x7682, (q15_t)0xcfa2, (q15_t)0x767f, (q15_t)0xcf9c, (q15_t)0x767d, (q15_t)0xcf96,
-  (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7678, (q15_t)0xcf8a, (q15_t)0x7676, (q15_t)0xcf85, (q15_t)0x7673, (q15_t)0xcf7f,
-  (q15_t)0x7671, (q15_t)0xcf79, (q15_t)0x766f, (q15_t)0xcf73, (q15_t)0x766c, (q15_t)0xcf6d, (q15_t)0x766a, (q15_t)0xcf67,
-  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x7665, (q15_t)0xcf5c, (q15_t)0x7663, (q15_t)0xcf56, (q15_t)0x7660, (q15_t)0xcf50,
-  (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x765c, (q15_t)0xcf45, (q15_t)0x7659, (q15_t)0xcf3f, (q15_t)0x7657, (q15_t)0xcf39,
-  (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x7652, (q15_t)0xcf2d, (q15_t)0x7650, (q15_t)0xcf28, (q15_t)0x764d, (q15_t)0xcf22,
-  (q15_t)0x764b, (q15_t)0xcf1c, (q15_t)0x7648, (q15_t)0xcf16, (q15_t)0x7646, (q15_t)0xcf10, (q15_t)0x7644, (q15_t)0xcf0b,
-  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x763f, (q15_t)0xceff, (q15_t)0x763c, (q15_t)0xcef9, (q15_t)0x763a, (q15_t)0xcef3,
-  (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x7635, (q15_t)0xcee8, (q15_t)0x7633, (q15_t)0xcee2, (q15_t)0x7630, (q15_t)0xcedc,
-  (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x762b, (q15_t)0xced1, (q15_t)0x7629, (q15_t)0xcecb, (q15_t)0x7627, (q15_t)0xcec5,
-  (q15_t)0x7624, (q15_t)0xcebf, (q15_t)0x7622, (q15_t)0xceb9, (q15_t)0x761f, (q15_t)0xceb4, (q15_t)0x761d, (q15_t)0xceae,
-  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7618, (q15_t)0xcea2, (q15_t)0x7616, (q15_t)0xce9c, (q15_t)0x7613, (q15_t)0xce97,
-  (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x760e, (q15_t)0xce8b, (q15_t)0x760c, (q15_t)0xce85, (q15_t)0x760a, (q15_t)0xce7f,
-  (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x7605, (q15_t)0xce74, (q15_t)0x7602, (q15_t)0xce6e, (q15_t)0x7600, (q15_t)0xce68,
-  (q15_t)0x75fd, (q15_t)0xce62, (q15_t)0x75fb, (q15_t)0xce5d, (q15_t)0x75f9, (q15_t)0xce57, (q15_t)0x75f6, (q15_t)0xce51,
-  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75f1, (q15_t)0xce45, (q15_t)0x75ef, (q15_t)0xce40, (q15_t)0x75ec, (q15_t)0xce3a,
-  (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e7, (q15_t)0xce2e, (q15_t)0x75e5, (q15_t)0xce28, (q15_t)0x75e3, (q15_t)0xce23,
-  (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75de, (q15_t)0xce17, (q15_t)0x75db, (q15_t)0xce11, (q15_t)0x75d9, (q15_t)0xce0c,
-  (q15_t)0x75d6, (q15_t)0xce06, (q15_t)0x75d4, (q15_t)0xce00, (q15_t)0x75d1, (q15_t)0xcdfa, (q15_t)0x75cf, (q15_t)0xcdf4,
-  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75ca, (q15_t)0xcde9, (q15_t)0x75c8, (q15_t)0xcde3, (q15_t)0x75c5, (q15_t)0xcddd,
-  (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75c0, (q15_t)0xcdd2, (q15_t)0x75be, (q15_t)0xcdcc, (q15_t)0x75bb, (q15_t)0xcdc6,
-  (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75b6, (q15_t)0xcdbb, (q15_t)0x75b4, (q15_t)0xcdb5, (q15_t)0x75b1, (q15_t)0xcdaf,
-  (q15_t)0x75af, (q15_t)0xcda9, (q15_t)0x75ac, (q15_t)0xcda3, (q15_t)0x75aa, (q15_t)0xcd9e, (q15_t)0x75a7, (q15_t)0xcd98,
-  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x75a3, (q15_t)0xcd8c, (q15_t)0x75a0, (q15_t)0xcd87, (q15_t)0x759e, (q15_t)0xcd81,
-  (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7599, (q15_t)0xcd75, (q15_t)0x7596, (q15_t)0xcd70, (q15_t)0x7594, (q15_t)0xcd6a,
-  (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x758f, (q15_t)0xcd5e, (q15_t)0x758c, (q15_t)0xcd58, (q15_t)0x758a, (q15_t)0xcd53,
-  (q15_t)0x7587, (q15_t)0xcd4d, (q15_t)0x7585, (q15_t)0xcd47, (q15_t)0x7582, (q15_t)0xcd41, (q15_t)0x7580, (q15_t)0xcd3c,
-  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x757b, (q15_t)0xcd30, (q15_t)0x7578, (q15_t)0xcd2a, (q15_t)0x7576, (q15_t)0xcd25,
-  (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7571, (q15_t)0xcd19, (q15_t)0x756e, (q15_t)0xcd13, (q15_t)0x756c, (q15_t)0xcd0d,
-  (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x7567, (q15_t)0xcd02, (q15_t)0x7564, (q15_t)0xccfc, (q15_t)0x7562, (q15_t)0xccf6,
-  (q15_t)0x755f, (q15_t)0xccf1, (q15_t)0x755d, (q15_t)0xcceb, (q15_t)0x755a, (q15_t)0xcce5, (q15_t)0x7558, (q15_t)0xccdf,
-  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x7553, (q15_t)0xccd4, (q15_t)0x7550, (q15_t)0xccce, (q15_t)0x754e, (q15_t)0xccc8,
-  (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7549, (q15_t)0xccbd, (q15_t)0x7546, (q15_t)0xccb7, (q15_t)0x7544, (q15_t)0xccb1,
-  (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x753f, (q15_t)0xcca6, (q15_t)0x753c, (q15_t)0xcca0, (q15_t)0x753a, (q15_t)0xcc9a,
-  (q15_t)0x7537, (q15_t)0xcc95, (q15_t)0x7535, (q15_t)0xcc8f, (q15_t)0x7532, (q15_t)0xcc89, (q15_t)0x752f, (q15_t)0xcc83,
-  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x752a, (q15_t)0xcc78, (q15_t)0x7528, (q15_t)0xcc72, (q15_t)0x7525, (q15_t)0xcc6c,
-  (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7520, (q15_t)0xcc61, (q15_t)0x751e, (q15_t)0xcc5b, (q15_t)0x751b, (q15_t)0xcc55,
-  (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x7516, (q15_t)0xcc4a, (q15_t)0x7514, (q15_t)0xcc44, (q15_t)0x7511, (q15_t)0xcc3e,
-  (q15_t)0x750f, (q15_t)0xcc39, (q15_t)0x750c, (q15_t)0xcc33, (q15_t)0x7509, (q15_t)0xcc2d, (q15_t)0x7507, (q15_t)0xcc27,
-  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x7502, (q15_t)0xcc1c, (q15_t)0x74ff, (q15_t)0xcc16, (q15_t)0x74fd, (q15_t)0xcc10,
-  (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f8, (q15_t)0xcc05, (q15_t)0x74f5, (q15_t)0xcbff, (q15_t)0x74f2, (q15_t)0xcbf9,
-  (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74ed, (q15_t)0xcbee, (q15_t)0x74eb, (q15_t)0xcbe8, (q15_t)0x74e8, (q15_t)0xcbe2,
-  (q15_t)0x74e6, (q15_t)0xcbdd, (q15_t)0x74e3, (q15_t)0xcbd7, (q15_t)0x74e1, (q15_t)0xcbd1, (q15_t)0x74de, (q15_t)0xcbcb,
-  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d9, (q15_t)0xcbc0, (q15_t)0x74d6, (q15_t)0xcbba, (q15_t)0x74d4, (q15_t)0xcbb5,
-  (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74cf, (q15_t)0xcba9, (q15_t)0x74cc, (q15_t)0xcba3, (q15_t)0x74c9, (q15_t)0xcb9e,
-  (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74c4, (q15_t)0xcb92, (q15_t)0x74c2, (q15_t)0xcb8c, (q15_t)0x74bf, (q15_t)0xcb87,
-  (q15_t)0x74bd, (q15_t)0xcb81, (q15_t)0x74ba, (q15_t)0xcb7b, (q15_t)0x74b7, (q15_t)0xcb75, (q15_t)0x74b5, (q15_t)0xcb70,
-  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74b0, (q15_t)0xcb64, (q15_t)0x74ad, (q15_t)0xcb5f, (q15_t)0x74ab, (q15_t)0xcb59,
-  (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x74a5, (q15_t)0xcb4d, (q15_t)0x74a3, (q15_t)0xcb48, (q15_t)0x74a0, (q15_t)0xcb42,
-  (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x749b, (q15_t)0xcb36, (q15_t)0x7498, (q15_t)0xcb31, (q15_t)0x7496, (q15_t)0xcb2b,
-  (q15_t)0x7493, (q15_t)0xcb25, (q15_t)0x7491, (q15_t)0xcb20, (q15_t)0x748e, (q15_t)0xcb1a, (q15_t)0x748b, (q15_t)0xcb14,
-  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x7486, (q15_t)0xcb09, (q15_t)0x7484, (q15_t)0xcb03, (q15_t)0x7481, (q15_t)0xcafd,
-  (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x747c, (q15_t)0xcaf2, (q15_t)0x7479, (q15_t)0xcaec, (q15_t)0x7477, (q15_t)0xcae6,
-  (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x7471, (q15_t)0xcadb, (q15_t)0x746f, (q15_t)0xcad5, (q15_t)0x746c, (q15_t)0xcad0,
-  (q15_t)0x746a, (q15_t)0xcaca, (q15_t)0x7467, (q15_t)0xcac4, (q15_t)0x7464, (q15_t)0xcabe, (q15_t)0x7462, (q15_t)0xcab9,
-  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x745c, (q15_t)0xcaad, (q15_t)0x745a, (q15_t)0xcaa8, (q15_t)0x7457, (q15_t)0xcaa2,
-  (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x7452, (q15_t)0xca96, (q15_t)0x744f, (q15_t)0xca91, (q15_t)0x744d, (q15_t)0xca8b,
-  (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7448, (q15_t)0xca80, (q15_t)0x7445, (q15_t)0xca7a, (q15_t)0x7442, (q15_t)0xca74,
-  (q15_t)0x7440, (q15_t)0xca6e, (q15_t)0x743d, (q15_t)0xca69, (q15_t)0x743a, (q15_t)0xca63, (q15_t)0x7438, (q15_t)0xca5d,
-  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x7432, (q15_t)0xca52, (q15_t)0x7430, (q15_t)0xca4c, (q15_t)0x742d, (q15_t)0xca46,
-  (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7428, (q15_t)0xca3b, (q15_t)0x7425, (q15_t)0xca35, (q15_t)0x7423, (q15_t)0xca30,
-  (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x741d, (q15_t)0xca24, (q15_t)0x741b, (q15_t)0xca1f, (q15_t)0x7418, (q15_t)0xca19,
-  (q15_t)0x7415, (q15_t)0xca13, (q15_t)0x7413, (q15_t)0xca0d, (q15_t)0x7410, (q15_t)0xca08, (q15_t)0x740d, (q15_t)0xca02,
-  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7408, (q15_t)0xc9f7, (q15_t)0x7406, (q15_t)0xc9f1, (q15_t)0x7403, (q15_t)0xc9eb,
-  (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73fe, (q15_t)0xc9e0, (q15_t)0x73fb, (q15_t)0xc9da, (q15_t)0x73f8, (q15_t)0xc9d5,
-  (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73f3, (q15_t)0xc9c9, (q15_t)0x73f0, (q15_t)0xc9c3, (q15_t)0x73ee, (q15_t)0xc9be,
-  (q15_t)0x73eb, (q15_t)0xc9b8, (q15_t)0x73e8, (q15_t)0xc9b2, (q15_t)0x73e6, (q15_t)0xc9ad, (q15_t)0x73e3, (q15_t)0xc9a7,
-  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73de, (q15_t)0xc99c, (q15_t)0x73db, (q15_t)0xc996, (q15_t)0x73d8, (q15_t)0xc990,
-  (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73d3, (q15_t)0xc985, (q15_t)0x73d0, (q15_t)0xc97f, (q15_t)0x73ce, (q15_t)0xc97a,
-  (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c8, (q15_t)0xc96e, (q15_t)0x73c6, (q15_t)0xc968, (q15_t)0x73c3, (q15_t)0xc963,
-  (q15_t)0x73c0, (q15_t)0xc95d, (q15_t)0x73bd, (q15_t)0xc957, (q15_t)0x73bb, (q15_t)0xc952, (q15_t)0x73b8, (q15_t)0xc94c,
-  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73b3, (q15_t)0xc941, (q15_t)0x73b0, (q15_t)0xc93b, (q15_t)0x73ad, (q15_t)0xc935,
-  (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a8, (q15_t)0xc92a, (q15_t)0x73a5, (q15_t)0xc924, (q15_t)0x73a3, (q15_t)0xc91f,
-  (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x739d, (q15_t)0xc913, (q15_t)0x739b, (q15_t)0xc90e, (q15_t)0x7398, (q15_t)0xc908,
-  (q15_t)0x7395, (q15_t)0xc902, (q15_t)0x7392, (q15_t)0xc8fd, (q15_t)0x7390, (q15_t)0xc8f7, (q15_t)0x738d, (q15_t)0xc8f1,
-  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x7388, (q15_t)0xc8e6, (q15_t)0x7385, (q15_t)0xc8e0, (q15_t)0x7382, (q15_t)0xc8db,
-  (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x737d, (q15_t)0xc8cf, (q15_t)0x737a, (q15_t)0xc8ca, (q15_t)0x7377, (q15_t)0xc8c4,
-  (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x7372, (q15_t)0xc8b9, (q15_t)0x736f, (q15_t)0xc8b3, (q15_t)0x736c, (q15_t)0xc8ad,
-  (q15_t)0x736a, (q15_t)0xc8a8, (q15_t)0x7367, (q15_t)0xc8a2, (q15_t)0x7364, (q15_t)0xc89c, (q15_t)0x7362, (q15_t)0xc897,
-  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x735c, (q15_t)0xc88b, (q15_t)0x7359, (q15_t)0xc886, (q15_t)0x7357, (q15_t)0xc880,
-  (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7351, (q15_t)0xc875, (q15_t)0x734f, (q15_t)0xc86f, (q15_t)0x734c, (q15_t)0xc869,
-  (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x7346, (q15_t)0xc85e, (q15_t)0x7344, (q15_t)0xc858, (q15_t)0x7341, (q15_t)0xc853,
-  (q15_t)0x733e, (q15_t)0xc84d, (q15_t)0x733b, (q15_t)0xc847, (q15_t)0x7339, (q15_t)0xc842, (q15_t)0x7336, (q15_t)0xc83c,
-  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7330, (q15_t)0xc831, (q15_t)0x732e, (q15_t)0xc82b, (q15_t)0x732b, (q15_t)0xc825,
-  (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x7326, (q15_t)0xc81a, (q15_t)0x7323, (q15_t)0xc814, (q15_t)0x7320, (q15_t)0xc80f,
-  (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x731b, (q15_t)0xc803, (q15_t)0x7318, (q15_t)0xc7fe, (q15_t)0x7315, (q15_t)0xc7f8,
-  (q15_t)0x7312, (q15_t)0xc7f3, (q15_t)0x7310, (q15_t)0xc7ed, (q15_t)0x730d, (q15_t)0xc7e7, (q15_t)0x730a, (q15_t)0xc7e2,
-  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7305, (q15_t)0xc7d6, (q15_t)0x7302, (q15_t)0xc7d1, (q15_t)0x72ff, (q15_t)0xc7cb,
-  (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f9, (q15_t)0xc7c0, (q15_t)0x72f7, (q15_t)0xc7ba, (q15_t)0x72f4, (q15_t)0xc7b4,
-  (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72ee, (q15_t)0xc7a9, (q15_t)0x72ec, (q15_t)0xc7a3, (q15_t)0x72e9, (q15_t)0xc79e,
-  (q15_t)0x72e6, (q15_t)0xc798, (q15_t)0x72e3, (q15_t)0xc793, (q15_t)0x72e1, (q15_t)0xc78d, (q15_t)0x72de, (q15_t)0xc787,
-  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d8, (q15_t)0xc77c, (q15_t)0x72d5, (q15_t)0xc776, (q15_t)0x72d3, (q15_t)0xc771,
-  (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72cd, (q15_t)0xc765, (q15_t)0x72ca, (q15_t)0xc760, (q15_t)0x72c8, (q15_t)0xc75a,
-  (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72c2, (q15_t)0xc74f, (q15_t)0x72bf, (q15_t)0xc749, (q15_t)0x72bc, (q15_t)0xc744,
-  (q15_t)0x72ba, (q15_t)0xc73e, (q15_t)0x72b7, (q15_t)0xc738, (q15_t)0x72b4, (q15_t)0xc733, (q15_t)0x72b1, (q15_t)0xc72d,
-  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72ac, (q15_t)0xc722, (q15_t)0x72a9, (q15_t)0xc71c, (q15_t)0x72a6, (q15_t)0xc717,
-  (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x72a1, (q15_t)0xc70b, (q15_t)0x729e, (q15_t)0xc706, (q15_t)0x729b, (q15_t)0xc700,
-  (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x7295, (q15_t)0xc6f5, (q15_t)0x7293, (q15_t)0xc6ef, (q15_t)0x7290, (q15_t)0xc6ea,
-  (q15_t)0x728d, (q15_t)0xc6e4, (q15_t)0x728a, (q15_t)0xc6de, (q15_t)0x7287, (q15_t)0xc6d9, (q15_t)0x7285, (q15_t)0xc6d3,
-  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x727f, (q15_t)0xc6c8, (q15_t)0x727c, (q15_t)0xc6c2, (q15_t)0x7279, (q15_t)0xc6bd,
-  (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x7274, (q15_t)0xc6b1, (q15_t)0x7271, (q15_t)0xc6ac, (q15_t)0x726e, (q15_t)0xc6a6,
-  (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7268, (q15_t)0xc69b, (q15_t)0x7266, (q15_t)0xc695, (q15_t)0x7263, (q15_t)0xc690,
-  (q15_t)0x7260, (q15_t)0xc68a, (q15_t)0x725d, (q15_t)0xc684, (q15_t)0x725a, (q15_t)0xc67f, (q15_t)0x7257, (q15_t)0xc679,
-  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7252, (q15_t)0xc66e, (q15_t)0x724f, (q15_t)0xc668, (q15_t)0x724c, (q15_t)0xc663,
-  (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x7247, (q15_t)0xc658, (q15_t)0x7244, (q15_t)0xc652, (q15_t)0x7241, (q15_t)0xc64c,
-  (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x723b, (q15_t)0xc641, (q15_t)0x7238, (q15_t)0xc63c, (q15_t)0x7236, (q15_t)0xc636,
-  (q15_t)0x7233, (q15_t)0xc630, (q15_t)0x7230, (q15_t)0xc62b, (q15_t)0x722d, (q15_t)0xc625, (q15_t)0x722a, (q15_t)0xc620,
-  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x7224, (q15_t)0xc614, (q15_t)0x7222, (q15_t)0xc60f, (q15_t)0x721f, (q15_t)0xc609,
-  (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7219, (q15_t)0xc5fe, (q15_t)0x7216, (q15_t)0xc5f8, (q15_t)0x7213, (q15_t)0xc5f3,
-  (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x720e, (q15_t)0xc5e7, (q15_t)0x720b, (q15_t)0xc5e2, (q15_t)0x7208, (q15_t)0xc5dc,
-  (q15_t)0x7205, (q15_t)0xc5d7, (q15_t)0x7202, (q15_t)0xc5d1, (q15_t)0x71ff, (q15_t)0xc5cc, (q15_t)0x71fd, (q15_t)0xc5c6,
-  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71f7, (q15_t)0xc5bb, (q15_t)0x71f4, (q15_t)0xc5b5, (q15_t)0x71f1, (q15_t)0xc5b0,
-  (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71eb, (q15_t)0xc5a4, (q15_t)0x71e9, (q15_t)0xc59f, (q15_t)0x71e6, (q15_t)0xc599,
-  (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71e0, (q15_t)0xc58e, (q15_t)0x71dd, (q15_t)0xc588, (q15_t)0x71da, (q15_t)0xc583,
-  (q15_t)0x71d7, (q15_t)0xc57d, (q15_t)0x71d4, (q15_t)0xc578, (q15_t)0x71d2, (q15_t)0xc572, (q15_t)0x71cf, (q15_t)0xc56c,
-  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c9, (q15_t)0xc561, (q15_t)0x71c6, (q15_t)0xc55c, (q15_t)0x71c3, (q15_t)0xc556,
-  (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71bd, (q15_t)0xc54b, (q15_t)0x71bb, (q15_t)0xc545, (q15_t)0x71b8, (q15_t)0xc540,
-  (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71b2, (q15_t)0xc535, (q15_t)0x71af, (q15_t)0xc52f, (q15_t)0x71ac, (q15_t)0xc529,
-  (q15_t)0x71a9, (q15_t)0xc524, (q15_t)0x71a6, (q15_t)0xc51e, (q15_t)0x71a3, (q15_t)0xc519, (q15_t)0x71a1, (q15_t)0xc513,
-  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x719b, (q15_t)0xc508, (q15_t)0x7198, (q15_t)0xc502, (q15_t)0x7195, (q15_t)0xc4fd,
-  (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x718f, (q15_t)0xc4f2, (q15_t)0x718c, (q15_t)0xc4ec, (q15_t)0x7189, (q15_t)0xc4e7,
-  (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x7184, (q15_t)0xc4db, (q15_t)0x7181, (q15_t)0xc4d6, (q15_t)0x717e, (q15_t)0xc4d0,
-  (q15_t)0x717b, (q15_t)0xc4cb, (q15_t)0x7178, (q15_t)0xc4c5, (q15_t)0x7175, (q15_t)0xc4c0, (q15_t)0x7172, (q15_t)0xc4ba,
-  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x716c, (q15_t)0xc4af, (q15_t)0x7169, (q15_t)0xc4a9, (q15_t)0x7167, (q15_t)0xc4a4,
-  (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7161, (q15_t)0xc499, (q15_t)0x715e, (q15_t)0xc493, (q15_t)0x715b, (q15_t)0xc48d,
-  (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x7155, (q15_t)0xc482, (q15_t)0x7152, (q15_t)0xc47d, (q15_t)0x714f, (q15_t)0xc477,
-  (q15_t)0x714c, (q15_t)0xc472, (q15_t)0x7149, (q15_t)0xc46c, (q15_t)0x7146, (q15_t)0xc467, (q15_t)0x7143, (q15_t)0xc461,
-  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x713e, (q15_t)0xc456, (q15_t)0x713b, (q15_t)0xc450, (q15_t)0x7138, (q15_t)0xc44b,
-  (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7132, (q15_t)0xc440, (q15_t)0x712f, (q15_t)0xc43a, (q15_t)0x712c, (q15_t)0xc434,
-  (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x7126, (q15_t)0xc429, (q15_t)0x7123, (q15_t)0xc424, (q15_t)0x7120, (q15_t)0xc41e,
-  (q15_t)0x711d, (q15_t)0xc419, (q15_t)0x711a, (q15_t)0xc413, (q15_t)0x7117, (q15_t)0xc40e, (q15_t)0x7114, (q15_t)0xc408,
-  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x710f, (q15_t)0xc3fd, (q15_t)0x710c, (q15_t)0xc3f7, (q15_t)0x7109, (q15_t)0xc3f2,
-  (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x7103, (q15_t)0xc3e7, (q15_t)0x7100, (q15_t)0xc3e1, (q15_t)0x70fd, (q15_t)0xc3dc,
-  (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70f7, (q15_t)0xc3d1, (q15_t)0x70f4, (q15_t)0xc3cb, (q15_t)0x70f1, (q15_t)0xc3c5,
-  (q15_t)0x70ee, (q15_t)0xc3c0, (q15_t)0x70eb, (q15_t)0xc3ba, (q15_t)0x70e8, (q15_t)0xc3b5, (q15_t)0x70e5, (q15_t)0xc3af,
-  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70df, (q15_t)0xc3a4, (q15_t)0x70dc, (q15_t)0xc39f, (q15_t)0x70d9, (q15_t)0xc399,
-  (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70d3, (q15_t)0xc38e, (q15_t)0x70d1, (q15_t)0xc389, (q15_t)0x70ce, (q15_t)0xc383,
-  (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70c8, (q15_t)0xc378, (q15_t)0x70c5, (q15_t)0xc372, (q15_t)0x70c2, (q15_t)0xc36d,
-  (q15_t)0x70bf, (q15_t)0xc367, (q15_t)0x70bc, (q15_t)0xc362, (q15_t)0x70b9, (q15_t)0xc35c, (q15_t)0x70b6, (q15_t)0xc357,
-  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70b0, (q15_t)0xc34c, (q15_t)0x70ad, (q15_t)0xc346, (q15_t)0x70aa, (q15_t)0xc341,
-  (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x70a4, (q15_t)0xc336, (q15_t)0x70a1, (q15_t)0xc330, (q15_t)0x709e, (q15_t)0xc32a,
-  (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x7098, (q15_t)0xc31f, (q15_t)0x7095, (q15_t)0xc31a, (q15_t)0x7092, (q15_t)0xc314,
-  (q15_t)0x708f, (q15_t)0xc30f, (q15_t)0x708c, (q15_t)0xc309, (q15_t)0x7089, (q15_t)0xc304, (q15_t)0x7086, (q15_t)0xc2fe,
-  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7080, (q15_t)0xc2f3, (q15_t)0x707d, (q15_t)0xc2ee, (q15_t)0x707a, (q15_t)0xc2e8,
-  (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x7074, (q15_t)0xc2dd, (q15_t)0x7071, (q15_t)0xc2d8, (q15_t)0x706e, (q15_t)0xc2d2,
-  (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x7068, (q15_t)0xc2c7, (q15_t)0x7065, (q15_t)0xc2c2, (q15_t)0x7062, (q15_t)0xc2bc,
-  (q15_t)0x705f, (q15_t)0xc2b7, (q15_t)0x705c, (q15_t)0xc2b1, (q15_t)0x7059, (q15_t)0xc2ab, (q15_t)0x7056, (q15_t)0xc2a6,
-  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7050, (q15_t)0xc29b, (q15_t)0x704d, (q15_t)0xc295, (q15_t)0x704a, (q15_t)0xc290,
-  (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x7044, (q15_t)0xc285, (q15_t)0x7041, (q15_t)0xc27f, (q15_t)0x703e, (q15_t)0xc27a,
-  (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x7038, (q15_t)0xc26f, (q15_t)0x7035, (q15_t)0xc269, (q15_t)0x7032, (q15_t)0xc264,
-  (q15_t)0x702f, (q15_t)0xc25e, (q15_t)0x702c, (q15_t)0xc259, (q15_t)0x7029, (q15_t)0xc253, (q15_t)0x7026, (q15_t)0xc24e,
-  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7020, (q15_t)0xc243, (q15_t)0x701d, (q15_t)0xc23d, (q15_t)0x7019, (q15_t)0xc238,
-  (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x7013, (q15_t)0xc22d, (q15_t)0x7010, (q15_t)0xc227, (q15_t)0x700d, (q15_t)0xc222,
-  (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x7007, (q15_t)0xc217, (q15_t)0x7004, (q15_t)0xc211, (q15_t)0x7001, (q15_t)0xc20c,
-  (q15_t)0x6ffe, (q15_t)0xc206, (q15_t)0x6ffb, (q15_t)0xc201, (q15_t)0x6ff8, (q15_t)0xc1fb, (q15_t)0x6ff5, (q15_t)0xc1f6,
-  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fef, (q15_t)0xc1eb, (q15_t)0x6fec, (q15_t)0xc1e5, (q15_t)0x6fe9, (q15_t)0xc1e0,
-  (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fe3, (q15_t)0xc1d5, (q15_t)0x6fe0, (q15_t)0xc1cf, (q15_t)0x6fdd, (q15_t)0xc1ca,
-  (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fd6, (q15_t)0xc1bf, (q15_t)0x6fd3, (q15_t)0xc1b9, (q15_t)0x6fd0, (q15_t)0xc1b4,
-  (q15_t)0x6fcd, (q15_t)0xc1ae, (q15_t)0x6fca, (q15_t)0xc1a9, (q15_t)0x6fc7, (q15_t)0xc1a3, (q15_t)0x6fc4, (q15_t)0xc19e,
-  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fbe, (q15_t)0xc193, (q15_t)0x6fbb, (q15_t)0xc18d, (q15_t)0x6fb8, (q15_t)0xc188,
-  (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fb2, (q15_t)0xc17d, (q15_t)0x6faf, (q15_t)0xc178, (q15_t)0x6fac, (q15_t)0xc172,
-  (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6fa5, (q15_t)0xc167, (q15_t)0x6fa2, (q15_t)0xc162, (q15_t)0x6f9f, (q15_t)0xc15c,
-  (q15_t)0x6f9c, (q15_t)0xc157, (q15_t)0x6f99, (q15_t)0xc151, (q15_t)0x6f96, (q15_t)0xc14c, (q15_t)0x6f93, (q15_t)0xc146,
-  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f8d, (q15_t)0xc13b, (q15_t)0x6f8a, (q15_t)0xc136, (q15_t)0x6f87, (q15_t)0xc130,
-  (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f81, (q15_t)0xc125, (q15_t)0x6f7d, (q15_t)0xc120, (q15_t)0x6f7a, (q15_t)0xc11a,
-  (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f74, (q15_t)0xc10f, (q15_t)0x6f71, (q15_t)0xc10a, (q15_t)0x6f6e, (q15_t)0xc105,
-  (q15_t)0x6f6b, (q15_t)0xc0ff, (q15_t)0x6f68, (q15_t)0xc0fa, (q15_t)0x6f65, (q15_t)0xc0f4, (q15_t)0x6f62, (q15_t)0xc0ef,
-  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f5b, (q15_t)0xc0e4, (q15_t)0x6f58, (q15_t)0xc0de, (q15_t)0x6f55, (q15_t)0xc0d9,
-  (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f4f, (q15_t)0xc0ce, (q15_t)0x6f4c, (q15_t)0xc0c8, (q15_t)0x6f49, (q15_t)0xc0c3,
-  (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f43, (q15_t)0xc0b8, (q15_t)0x6f3f, (q15_t)0xc0b3, (q15_t)0x6f3c, (q15_t)0xc0ad,
-  (q15_t)0x6f39, (q15_t)0xc0a8, (q15_t)0x6f36, (q15_t)0xc0a2, (q15_t)0x6f33, (q15_t)0xc09d, (q15_t)0x6f30, (q15_t)0xc097,
-  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f2a, (q15_t)0xc08c, (q15_t)0x6f27, (q15_t)0xc087, (q15_t)0x6f23, (q15_t)0xc081,
-  (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f1d, (q15_t)0xc077, (q15_t)0x6f1a, (q15_t)0xc071, (q15_t)0x6f17, (q15_t)0xc06c,
-  (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f11, (q15_t)0xc061, (q15_t)0x6f0e, (q15_t)0xc05b, (q15_t)0x6f0b, (q15_t)0xc056,
-  (q15_t)0x6f07, (q15_t)0xc050, (q15_t)0x6f04, (q15_t)0xc04b, (q15_t)0x6f01, (q15_t)0xc045, (q15_t)0x6efe, (q15_t)0xc040,
-  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ef8, (q15_t)0xc035, (q15_t)0x6ef5, (q15_t)0xc030, (q15_t)0x6ef1, (q15_t)0xc02a,
-  (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6eeb, (q15_t)0xc01f, (q15_t)0x6ee8, (q15_t)0xc01a, (q15_t)0x6ee5, (q15_t)0xc014,
-  (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6edf, (q15_t)0xc00a, (q15_t)0x6edc, (q15_t)0xc004, (q15_t)0x6ed8, (q15_t)0xbfff,
-  (q15_t)0x6ed5, (q15_t)0xbff9, (q15_t)0x6ed2, (q15_t)0xbff4, (q15_t)0x6ecf, (q15_t)0xbfee, (q15_t)0x6ecc, (q15_t)0xbfe9,
-  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ec6, (q15_t)0xbfde, (q15_t)0x6ec2, (q15_t)0xbfd9, (q15_t)0x6ebf, (q15_t)0xbfd3,
-  (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eb9, (q15_t)0xbfc8, (q15_t)0x6eb6, (q15_t)0xbfc3, (q15_t)0x6eb3, (q15_t)0xbfbd,
-  (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6eac, (q15_t)0xbfb3, (q15_t)0x6ea9, (q15_t)0xbfad, (q15_t)0x6ea6, (q15_t)0xbfa8,
-  (q15_t)0x6ea3, (q15_t)0xbfa2, (q15_t)0x6ea0, (q15_t)0xbf9d, (q15_t)0x6e9c, (q15_t)0xbf97, (q15_t)0x6e99, (q15_t)0xbf92,
-  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e93, (q15_t)0xbf87, (q15_t)0x6e90, (q15_t)0xbf82, (q15_t)0x6e8d, (q15_t)0xbf7c,
-  (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e86, (q15_t)0xbf71, (q15_t)0x6e83, (q15_t)0xbf6c, (q15_t)0x6e80, (q15_t)0xbf67,
-  (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e7a, (q15_t)0xbf5c, (q15_t)0x6e76, (q15_t)0xbf56, (q15_t)0x6e73, (q15_t)0xbf51,
-  (q15_t)0x6e70, (q15_t)0xbf4b, (q15_t)0x6e6d, (q15_t)0xbf46, (q15_t)0x6e6a, (q15_t)0xbf41, (q15_t)0x6e67, (q15_t)0xbf3b,
-  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e60, (q15_t)0xbf30, (q15_t)0x6e5d, (q15_t)0xbf2b, (q15_t)0x6e5a, (q15_t)0xbf26,
-  (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e53, (q15_t)0xbf1b, (q15_t)0x6e50, (q15_t)0xbf15, (q15_t)0x6e4d, (q15_t)0xbf10,
-  (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e47, (q15_t)0xbf05, (q15_t)0x6e44, (q15_t)0xbf00, (q15_t)0x6e40, (q15_t)0xbefa,
-  (q15_t)0x6e3d, (q15_t)0xbef5, (q15_t)0x6e3a, (q15_t)0xbeef, (q15_t)0x6e37, (q15_t)0xbeea, (q15_t)0x6e34, (q15_t)0xbee5,
-  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e2d, (q15_t)0xbeda, (q15_t)0x6e2a, (q15_t)0xbed4, (q15_t)0x6e27, (q15_t)0xbecf,
-  (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e20, (q15_t)0xbec4, (q15_t)0x6e1d, (q15_t)0xbebf, (q15_t)0x6e1a, (q15_t)0xbeb9,
-  (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e14, (q15_t)0xbeae, (q15_t)0x6e10, (q15_t)0xbea9, (q15_t)0x6e0d, (q15_t)0xbea4,
-  (q15_t)0x6e0a, (q15_t)0xbe9e, (q15_t)0x6e07, (q15_t)0xbe99, (q15_t)0x6e04, (q15_t)0xbe93, (q15_t)0x6e00, (q15_t)0xbe8e,
-  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6dfa, (q15_t)0xbe83, (q15_t)0x6df7, (q15_t)0xbe7e, (q15_t)0x6df3, (q15_t)0xbe78,
-  (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6ded, (q15_t)0xbe6e, (q15_t)0x6dea, (q15_t)0xbe68, (q15_t)0x6de7, (q15_t)0xbe63,
-  (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6de0, (q15_t)0xbe58, (q15_t)0x6ddd, (q15_t)0xbe53, (q15_t)0x6dda, (q15_t)0xbe4d,
-  (q15_t)0x6dd6, (q15_t)0xbe48, (q15_t)0x6dd3, (q15_t)0xbe43, (q15_t)0x6dd0, (q15_t)0xbe3d, (q15_t)0x6dcd, (q15_t)0xbe38,
-  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dc6, (q15_t)0xbe2d, (q15_t)0x6dc3, (q15_t)0xbe28, (q15_t)0x6dc0, (q15_t)0xbe22,
-  (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db9, (q15_t)0xbe17, (q15_t)0x6db6, (q15_t)0xbe12, (q15_t)0x6db3, (q15_t)0xbe0d,
-  (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6dac, (q15_t)0xbe02, (q15_t)0x6da9, (q15_t)0xbdfd, (q15_t)0x6da6, (q15_t)0xbdf7,
-  (q15_t)0x6da3, (q15_t)0xbdf2, (q15_t)0x6d9f, (q15_t)0xbdec, (q15_t)0x6d9c, (q15_t)0xbde7, (q15_t)0x6d99, (q15_t)0xbde2,
-  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d92, (q15_t)0xbdd7, (q15_t)0x6d8f, (q15_t)0xbdd1, (q15_t)0x6d8c, (q15_t)0xbdcc,
-  (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d85, (q15_t)0xbdc1, (q15_t)0x6d82, (q15_t)0xbdbc, (q15_t)0x6d7f, (q15_t)0xbdb7,
-  (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d78, (q15_t)0xbdac, (q15_t)0x6d75, (q15_t)0xbda6, (q15_t)0x6d72, (q15_t)0xbda1,
-  (q15_t)0x6d6f, (q15_t)0xbd9c, (q15_t)0x6d6b, (q15_t)0xbd96, (q15_t)0x6d68, (q15_t)0xbd91, (q15_t)0x6d65, (q15_t)0xbd8c,
-  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d5e, (q15_t)0xbd81, (q15_t)0x6d5b, (q15_t)0xbd7c, (q15_t)0x6d58, (q15_t)0xbd76,
-  (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d51, (q15_t)0xbd6b, (q15_t)0x6d4e, (q15_t)0xbd66, (q15_t)0x6d4b, (q15_t)0xbd61,
-  (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d44, (q15_t)0xbd56, (q15_t)0x6d41, (q15_t)0xbd51, (q15_t)0x6d3e, (q15_t)0xbd4b,
-  (q15_t)0x6d3a, (q15_t)0xbd46, (q15_t)0x6d37, (q15_t)0xbd40, (q15_t)0x6d34, (q15_t)0xbd3b, (q15_t)0x6d31, (q15_t)0xbd36,
-  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d2a, (q15_t)0xbd2b, (q15_t)0x6d27, (q15_t)0xbd26, (q15_t)0x6d23, (q15_t)0xbd20,
-  (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d1d, (q15_t)0xbd16, (q15_t)0x6d1a, (q15_t)0xbd10, (q15_t)0x6d16, (q15_t)0xbd0b,
-  (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d10, (q15_t)0xbd00, (q15_t)0x6d0c, (q15_t)0xbcfb, (q15_t)0x6d09, (q15_t)0xbcf5,
-  (q15_t)0x6d06, (q15_t)0xbcf0, (q15_t)0x6d03, (q15_t)0xbceb, (q15_t)0x6cff, (q15_t)0xbce5, (q15_t)0x6cfc, (q15_t)0xbce0,
-  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cf5, (q15_t)0xbcd5, (q15_t)0x6cf2, (q15_t)0xbcd0, (q15_t)0x6cef, (q15_t)0xbccb,
-  (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6ce8, (q15_t)0xbcc0, (q15_t)0x6ce5, (q15_t)0xbcbb, (q15_t)0x6ce2, (q15_t)0xbcb5,
-  (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cdb, (q15_t)0xbcab, (q15_t)0x6cd8, (q15_t)0xbca5, (q15_t)0x6cd4, (q15_t)0xbca0,
-  (q15_t)0x6cd1, (q15_t)0xbc9b, (q15_t)0x6cce, (q15_t)0xbc95, (q15_t)0x6cca, (q15_t)0xbc90, (q15_t)0x6cc7, (q15_t)0xbc8b,
-  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cc1, (q15_t)0xbc80, (q15_t)0x6cbd, (q15_t)0xbc7b, (q15_t)0x6cba, (q15_t)0xbc75,
-  (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6cb3, (q15_t)0xbc6b, (q15_t)0x6cb0, (q15_t)0xbc65, (q15_t)0x6cad, (q15_t)0xbc60,
-  (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6ca6, (q15_t)0xbc55, (q15_t)0x6ca3, (q15_t)0xbc50, (q15_t)0x6c9f, (q15_t)0xbc4b,
-  (q15_t)0x6c9c, (q15_t)0xbc45, (q15_t)0x6c99, (q15_t)0xbc40, (q15_t)0x6c95, (q15_t)0xbc3b, (q15_t)0x6c92, (q15_t)0xbc35,
-  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c8b, (q15_t)0xbc2b, (q15_t)0x6c88, (q15_t)0xbc25, (q15_t)0x6c85, (q15_t)0xbc20,
-  (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c7e, (q15_t)0xbc15, (q15_t)0x6c7b, (q15_t)0xbc10, (q15_t)0x6c77, (q15_t)0xbc0b,
-  (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c71, (q15_t)0xbc00, (q15_t)0x6c6d, (q15_t)0xbbfb, (q15_t)0x6c6a, (q15_t)0xbbf5,
-  (q15_t)0x6c67, (q15_t)0xbbf0, (q15_t)0x6c63, (q15_t)0xbbeb, (q15_t)0x6c60, (q15_t)0xbbe5, (q15_t)0x6c5d, (q15_t)0xbbe0,
-  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c56, (q15_t)0xbbd5, (q15_t)0x6c53, (q15_t)0xbbd0, (q15_t)0x6c4f, (q15_t)0xbbcb,
-  (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c49, (q15_t)0xbbc0, (q15_t)0x6c45, (q15_t)0xbbbb, (q15_t)0x6c42, (q15_t)0xbbb5,
-  (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c3b, (q15_t)0xbbab, (q15_t)0x6c38, (q15_t)0xbba6, (q15_t)0x6c34, (q15_t)0xbba0,
-  (q15_t)0x6c31, (q15_t)0xbb9b, (q15_t)0x6c2e, (q15_t)0xbb96, (q15_t)0x6c2a, (q15_t)0xbb90, (q15_t)0x6c27, (q15_t)0xbb8b,
-  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c20, (q15_t)0xbb80, (q15_t)0x6c1d, (q15_t)0xbb7b, (q15_t)0x6c1a, (q15_t)0xbb76,
-  (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c13, (q15_t)0xbb6b, (q15_t)0x6c0f, (q15_t)0xbb66, (q15_t)0x6c0c, (q15_t)0xbb61,
-  (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6c05, (q15_t)0xbb56, (q15_t)0x6c02, (q15_t)0xbb51, (q15_t)0x6bff, (q15_t)0xbb4b,
-  (q15_t)0x6bfb, (q15_t)0xbb46, (q15_t)0x6bf8, (q15_t)0xbb41, (q15_t)0x6bf5, (q15_t)0xbb3b, (q15_t)0x6bf1, (q15_t)0xbb36,
-  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bea, (q15_t)0xbb2c, (q15_t)0x6be7, (q15_t)0xbb26, (q15_t)0x6be4, (q15_t)0xbb21,
-  (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bdd, (q15_t)0xbb16, (q15_t)0x6bd9, (q15_t)0xbb11, (q15_t)0x6bd6, (q15_t)0xbb0c,
-  (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bcf, (q15_t)0xbb01, (q15_t)0x6bcc, (q15_t)0xbafc, (q15_t)0x6bc9, (q15_t)0xbaf7,
-  (q15_t)0x6bc5, (q15_t)0xbaf1, (q15_t)0x6bc2, (q15_t)0xbaec, (q15_t)0x6bbe, (q15_t)0xbae7, (q15_t)0x6bbb, (q15_t)0xbae1,
-  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6bb4, (q15_t)0xbad7, (q15_t)0x6bb1, (q15_t)0xbad2, (q15_t)0x6bad, (q15_t)0xbacc,
-  (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6ba7, (q15_t)0xbac2, (q15_t)0x6ba3, (q15_t)0xbabc, (q15_t)0x6ba0, (q15_t)0xbab7,
-  (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b99, (q15_t)0xbaad, (q15_t)0x6b96, (q15_t)0xbaa7, (q15_t)0x6b92, (q15_t)0xbaa2,
-  (q15_t)0x6b8f, (q15_t)0xba9d, (q15_t)0x6b8b, (q15_t)0xba97, (q15_t)0x6b88, (q15_t)0xba92, (q15_t)0x6b85, (q15_t)0xba8d,
-  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b7e, (q15_t)0xba82, (q15_t)0x6b7a, (q15_t)0xba7d, (q15_t)0x6b77, (q15_t)0xba78,
-  (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b70, (q15_t)0xba6d, (q15_t)0x6b6d, (q15_t)0xba68, (q15_t)0x6b69, (q15_t)0xba63,
-  (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b62, (q15_t)0xba58, (q15_t)0x6b5f, (q15_t)0xba53, (q15_t)0x6b5c, (q15_t)0xba4e,
-  (q15_t)0x6b58, (q15_t)0xba48, (q15_t)0x6b55, (q15_t)0xba43, (q15_t)0x6b51, (q15_t)0xba3e, (q15_t)0x6b4e, (q15_t)0xba39,
-  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b47, (q15_t)0xba2e, (q15_t)0x6b44, (q15_t)0xba29, (q15_t)0x6b40, (q15_t)0xba23,
-  (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b39, (q15_t)0xba19, (q15_t)0x6b36, (q15_t)0xba14, (q15_t)0x6b32, (q15_t)0xba0e,
-  (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b2c, (q15_t)0xba04, (q15_t)0x6b28, (q15_t)0xb9ff, (q15_t)0x6b25, (q15_t)0xb9f9,
-  (q15_t)0x6b21, (q15_t)0xb9f4, (q15_t)0x6b1e, (q15_t)0xb9ef, (q15_t)0x6b1a, (q15_t)0xb9ea, (q15_t)0x6b17, (q15_t)0xb9e4,
-  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b10, (q15_t)0xb9da, (q15_t)0x6b0d, (q15_t)0xb9d5, (q15_t)0x6b09, (q15_t)0xb9cf,
-  (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6b02, (q15_t)0xb9c5, (q15_t)0x6aff, (q15_t)0xb9c0, (q15_t)0x6afb, (q15_t)0xb9ba,
-  (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6af4, (q15_t)0xb9b0, (q15_t)0x6af1, (q15_t)0xb9ab, (q15_t)0x6aee, (q15_t)0xb9a5,
-  (q15_t)0x6aea, (q15_t)0xb9a0, (q15_t)0x6ae7, (q15_t)0xb99b, (q15_t)0x6ae3, (q15_t)0xb996, (q15_t)0x6ae0, (q15_t)0xb990,
-  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ad9, (q15_t)0xb986, (q15_t)0x6ad5, (q15_t)0xb981, (q15_t)0x6ad2, (q15_t)0xb97b,
-  (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6acb, (q15_t)0xb971, (q15_t)0x6ac8, (q15_t)0xb96c, (q15_t)0x6ac4, (q15_t)0xb966,
-  (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6abd, (q15_t)0xb95c, (q15_t)0x6aba, (q15_t)0xb957, (q15_t)0x6ab6, (q15_t)0xb951,
-  (q15_t)0x6ab3, (q15_t)0xb94c, (q15_t)0x6aaf, (q15_t)0xb947, (q15_t)0x6aac, (q15_t)0xb942, (q15_t)0x6aa8, (q15_t)0xb93c,
-  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6aa1, (q15_t)0xb932, (q15_t)0x6a9e, (q15_t)0xb92d, (q15_t)0x6a9a, (q15_t)0xb928,
-  (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a93, (q15_t)0xb91d, (q15_t)0x6a90, (q15_t)0xb918, (q15_t)0x6a8c, (q15_t)0xb913,
-  (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a86, (q15_t)0xb908, (q15_t)0x6a82, (q15_t)0xb903, (q15_t)0x6a7f, (q15_t)0xb8fe,
-  (q15_t)0x6a7b, (q15_t)0xb8f8, (q15_t)0x6a78, (q15_t)0xb8f3, (q15_t)0x6a74, (q15_t)0xb8ee, (q15_t)0x6a71, (q15_t)0xb8e9,
-  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a6a, (q15_t)0xb8de, (q15_t)0x6a66, (q15_t)0xb8d9, (q15_t)0x6a63, (q15_t)0xb8d4,
-  (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a5c, (q15_t)0xb8c9, (q15_t)0x6a58, (q15_t)0xb8c4, (q15_t)0x6a55, (q15_t)0xb8bf,
-  (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a4e, (q15_t)0xb8b5, (q15_t)0x6a4a, (q15_t)0xb8af, (q15_t)0x6a47, (q15_t)0xb8aa,
-  (q15_t)0x6a43, (q15_t)0xb8a5, (q15_t)0x6a40, (q15_t)0xb8a0, (q15_t)0x6a3c, (q15_t)0xb89b, (q15_t)0x6a39, (q15_t)0xb895,
-  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a32, (q15_t)0xb88b, (q15_t)0x6a2e, (q15_t)0xb886, (q15_t)0x6a2b, (q15_t)0xb880,
-  (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a24, (q15_t)0xb876, (q15_t)0x6a20, (q15_t)0xb871, (q15_t)0x6a1d, (q15_t)0xb86c,
-  (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a16, (q15_t)0xb861, (q15_t)0x6a12, (q15_t)0xb85c, (q15_t)0x6a0e, (q15_t)0xb857,
-  (q15_t)0x6a0b, (q15_t)0xb852, (q15_t)0x6a07, (q15_t)0xb84c, (q15_t)0x6a04, (q15_t)0xb847, (q15_t)0x6a00, (q15_t)0xb842,
-  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69f9, (q15_t)0xb838, (q15_t)0x69f6, (q15_t)0xb832, (q15_t)0x69f2, (q15_t)0xb82d,
-  (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69eb, (q15_t)0xb823, (q15_t)0x69e8, (q15_t)0xb81e, (q15_t)0x69e4, (q15_t)0xb818,
-  (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69dd, (q15_t)0xb80e, (q15_t)0x69da, (q15_t)0xb809, (q15_t)0x69d6, (q15_t)0xb804,
-  (q15_t)0x69d3, (q15_t)0xb7fe, (q15_t)0x69cf, (q15_t)0xb7f9, (q15_t)0x69cb, (q15_t)0xb7f4, (q15_t)0x69c8, (q15_t)0xb7ef,
-  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69c1, (q15_t)0xb7e4, (q15_t)0x69bd, (q15_t)0xb7df, (q15_t)0x69ba, (q15_t)0xb7da,
-  (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69b3, (q15_t)0xb7d0, (q15_t)0x69af, (q15_t)0xb7ca, (q15_t)0x69ac, (q15_t)0xb7c5,
-  (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x69a5, (q15_t)0xb7bb, (q15_t)0x69a1, (q15_t)0xb7b6, (q15_t)0x699d, (q15_t)0xb7b1,
-  (q15_t)0x699a, (q15_t)0xb7ab, (q15_t)0x6996, (q15_t)0xb7a6, (q15_t)0x6993, (q15_t)0xb7a1, (q15_t)0x698f, (q15_t)0xb79c,
-  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6988, (q15_t)0xb791, (q15_t)0x6985, (q15_t)0xb78c, (q15_t)0x6981, (q15_t)0xb787,
-  (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x697a, (q15_t)0xb77d, (q15_t)0x6976, (q15_t)0xb778, (q15_t)0x6973, (q15_t)0xb772,
-  (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x696c, (q15_t)0xb768, (q15_t)0x6968, (q15_t)0xb763, (q15_t)0x6964, (q15_t)0xb75e,
-  (q15_t)0x6961, (q15_t)0xb758, (q15_t)0x695d, (q15_t)0xb753, (q15_t)0x695a, (q15_t)0xb74e, (q15_t)0x6956, (q15_t)0xb749,
-  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x694f, (q15_t)0xb73f, (q15_t)0x694b, (q15_t)0xb739, (q15_t)0x6948, (q15_t)0xb734,
-  (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6941, (q15_t)0xb72a, (q15_t)0x693d, (q15_t)0xb725, (q15_t)0x693a, (q15_t)0xb720,
-  (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6932, (q15_t)0xb715, (q15_t)0x692f, (q15_t)0xb710, (q15_t)0x692b, (q15_t)0xb70b,
-  (q15_t)0x6928, (q15_t)0xb706, (q15_t)0x6924, (q15_t)0xb701, (q15_t)0x6921, (q15_t)0xb6fb, (q15_t)0x691d, (q15_t)0xb6f6,
-  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x6916, (q15_t)0xb6ec, (q15_t)0x6912, (q15_t)0xb6e7, (q15_t)0x690f, (q15_t)0xb6e2,
-  (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x6907, (q15_t)0xb6d7, (q15_t)0x6904, (q15_t)0xb6d2, (q15_t)0x6900, (q15_t)0xb6cd,
-  (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68f9, (q15_t)0xb6c3, (q15_t)0x68f5, (q15_t)0xb6be, (q15_t)0x68f2, (q15_t)0xb6b8,
-  (q15_t)0x68ee, (q15_t)0xb6b3, (q15_t)0x68eb, (q15_t)0xb6ae, (q15_t)0x68e7, (q15_t)0xb6a9, (q15_t)0x68e3, (q15_t)0xb6a4,
-  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68dc, (q15_t)0xb69a, (q15_t)0x68d9, (q15_t)0xb694, (q15_t)0x68d5, (q15_t)0xb68f,
-  (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68ce, (q15_t)0xb685, (q15_t)0x68ca, (q15_t)0xb680, (q15_t)0x68c7, (q15_t)0xb67b,
-  (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68bf, (q15_t)0xb670, (q15_t)0x68bc, (q15_t)0xb66b, (q15_t)0x68b8, (q15_t)0xb666,
-  (q15_t)0x68b5, (q15_t)0xb661, (q15_t)0x68b1, (q15_t)0xb65c, (q15_t)0x68ad, (q15_t)0xb657, (q15_t)0x68aa, (q15_t)0xb652,
-  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x68a3, (q15_t)0xb647, (q15_t)0x689f, (q15_t)0xb642, (q15_t)0x689b, (q15_t)0xb63d,
-  (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6894, (q15_t)0xb633, (q15_t)0x6890, (q15_t)0xb62e, (q15_t)0x688d, (q15_t)0xb628,
-  (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x6886, (q15_t)0xb61e, (q15_t)0x6882, (q15_t)0xb619, (q15_t)0x687e, (q15_t)0xb614,
-  (q15_t)0x687b, (q15_t)0xb60f, (q15_t)0x6877, (q15_t)0xb60a, (q15_t)0x6873, (q15_t)0xb605, (q15_t)0x6870, (q15_t)0xb5ff,
-  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6868, (q15_t)0xb5f5, (q15_t)0x6865, (q15_t)0xb5f0, (q15_t)0x6861, (q15_t)0xb5eb,
-  (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x685a, (q15_t)0xb5e1, (q15_t)0x6856, (q15_t)0xb5dc, (q15_t)0x6853, (q15_t)0xb5d6,
-  (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x684b, (q15_t)0xb5cc, (q15_t)0x6848, (q15_t)0xb5c7, (q15_t)0x6844, (q15_t)0xb5c2,
-  (q15_t)0x6840, (q15_t)0xb5bd, (q15_t)0x683d, (q15_t)0xb5b8, (q15_t)0x6839, (q15_t)0xb5b3, (q15_t)0x6835, (q15_t)0xb5ae,
-  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x682e, (q15_t)0xb5a3, (q15_t)0x682b, (q15_t)0xb59e, (q15_t)0x6827, (q15_t)0xb599,
-  (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6820, (q15_t)0xb58f, (q15_t)0x681c, (q15_t)0xb58a, (q15_t)0x6818, (q15_t)0xb585,
-  (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6811, (q15_t)0xb57a, (q15_t)0x680d, (q15_t)0xb575, (q15_t)0x680a, (q15_t)0xb570,
-  (q15_t)0x6806, (q15_t)0xb56b, (q15_t)0x6802, (q15_t)0xb566, (q15_t)0x67ff, (q15_t)0xb561, (q15_t)0x67fb, (q15_t)0xb55c,
-  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67f4, (q15_t)0xb552, (q15_t)0x67f0, (q15_t)0xb54c, (q15_t)0x67ec, (q15_t)0xb547,
-  (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67e5, (q15_t)0xb53d, (q15_t)0x67e1, (q15_t)0xb538, (q15_t)0x67de, (q15_t)0xb533,
-  (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67d6, (q15_t)0xb529, (q15_t)0x67d3, (q15_t)0xb524, (q15_t)0x67cf, (q15_t)0xb51f,
-  (q15_t)0x67cb, (q15_t)0xb519, (q15_t)0x67c8, (q15_t)0xb514, (q15_t)0x67c4, (q15_t)0xb50f, (q15_t)0x67c0, (q15_t)0xb50a,
-  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67b9, (q15_t)0xb500, (q15_t)0x67b5, (q15_t)0xb4fb, (q15_t)0x67b2, (q15_t)0xb4f6,
-  (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x67aa, (q15_t)0xb4ec, (q15_t)0x67a6, (q15_t)0xb4e7, (q15_t)0x67a3, (q15_t)0xb4e1,
-  (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x679b, (q15_t)0xb4d7, (q15_t)0x6798, (q15_t)0xb4d2, (q15_t)0x6794, (q15_t)0xb4cd,
-  (q15_t)0x6790, (q15_t)0xb4c8, (q15_t)0x678d, (q15_t)0xb4c3, (q15_t)0x6789, (q15_t)0xb4be, (q15_t)0x6785, (q15_t)0xb4b9,
-  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x677e, (q15_t)0xb4af, (q15_t)0x677a, (q15_t)0xb4aa, (q15_t)0x6776, (q15_t)0xb4a4,
-  (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x676f, (q15_t)0xb49a, (q15_t)0x676b, (q15_t)0xb495, (q15_t)0x6768, (q15_t)0xb490,
-  (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6760, (q15_t)0xb486, (q15_t)0x675d, (q15_t)0xb481, (q15_t)0x6759, (q15_t)0xb47c,
-  (q15_t)0x6755, (q15_t)0xb477, (q15_t)0x6751, (q15_t)0xb472, (q15_t)0x674e, (q15_t)0xb46d, (q15_t)0x674a, (q15_t)0xb468,
-  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6743, (q15_t)0xb45d, (q15_t)0x673f, (q15_t)0xb458, (q15_t)0x673b, (q15_t)0xb453,
-  (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6734, (q15_t)0xb449, (q15_t)0x6730, (q15_t)0xb444, (q15_t)0x672c, (q15_t)0xb43f,
-  (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x6725, (q15_t)0xb435, (q15_t)0x6721, (q15_t)0xb430, (q15_t)0x671d, (q15_t)0xb42b,
-  (q15_t)0x671a, (q15_t)0xb426, (q15_t)0x6716, (q15_t)0xb421, (q15_t)0x6712, (q15_t)0xb41c, (q15_t)0x670e, (q15_t)0xb417,
-  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x6707, (q15_t)0xb40c, (q15_t)0x6703, (q15_t)0xb407, (q15_t)0x6700, (q15_t)0xb402,
-  (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66f8, (q15_t)0xb3f8, (q15_t)0x66f4, (q15_t)0xb3f3, (q15_t)0x66f1, (q15_t)0xb3ee,
-  (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66e9, (q15_t)0xb3e4, (q15_t)0x66e5, (q15_t)0xb3df, (q15_t)0x66e2, (q15_t)0xb3da,
-  (q15_t)0x66de, (q15_t)0xb3d5, (q15_t)0x66da, (q15_t)0xb3d0, (q15_t)0x66d6, (q15_t)0xb3cb, (q15_t)0x66d3, (q15_t)0xb3c6,
-  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66cb, (q15_t)0xb3bc, (q15_t)0x66c8, (q15_t)0xb3b7, (q15_t)0x66c4, (q15_t)0xb3b1,
-  (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66bc, (q15_t)0xb3a7, (q15_t)0x66b9, (q15_t)0xb3a2, (q15_t)0x66b5, (q15_t)0xb39d,
-  (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66ad, (q15_t)0xb393, (q15_t)0x66aa, (q15_t)0xb38e, (q15_t)0x66a6, (q15_t)0xb389,
-  (q15_t)0x66a2, (q15_t)0xb384, (q15_t)0x669e, (q15_t)0xb37f, (q15_t)0x669b, (q15_t)0xb37a, (q15_t)0x6697, (q15_t)0xb375,
-  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x668f, (q15_t)0xb36b, (q15_t)0x668b, (q15_t)0xb366, (q15_t)0x6688, (q15_t)0xb361,
-  (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6680, (q15_t)0xb357, (q15_t)0x667c, (q15_t)0xb352, (q15_t)0x6679, (q15_t)0xb34d,
-  (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6671, (q15_t)0xb343, (q15_t)0x666d, (q15_t)0xb33e, (q15_t)0x666a, (q15_t)0xb339,
-  (q15_t)0x6666, (q15_t)0xb334, (q15_t)0x6662, (q15_t)0xb32f, (q15_t)0x665e, (q15_t)0xb32a, (q15_t)0x665b, (q15_t)0xb325,
-  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6653, (q15_t)0xb31a, (q15_t)0x664f, (q15_t)0xb315, (q15_t)0x664b, (q15_t)0xb310,
-  (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6644, (q15_t)0xb306, (q15_t)0x6640, (q15_t)0xb301, (q15_t)0x663c, (q15_t)0xb2fc,
-  (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6635, (q15_t)0xb2f2, (q15_t)0x6631, (q15_t)0xb2ed, (q15_t)0x662d, (q15_t)0xb2e8,
-  (q15_t)0x6629, (q15_t)0xb2e3, (q15_t)0x6626, (q15_t)0xb2de, (q15_t)0x6622, (q15_t)0xb2d9, (q15_t)0x661e, (q15_t)0xb2d4,
-  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x6616, (q15_t)0xb2ca, (q15_t)0x6613, (q15_t)0xb2c5, (q15_t)0x660f, (q15_t)0xb2c0,
-  (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x6607, (q15_t)0xb2b6, (q15_t)0x6603, (q15_t)0xb2b1, (q15_t)0x6600, (q15_t)0xb2ac,
-  (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65f8, (q15_t)0xb2a2, (q15_t)0x65f4, (q15_t)0xb29d, (q15_t)0x65f0, (q15_t)0xb298,
-  (q15_t)0x65ed, (q15_t)0xb293, (q15_t)0x65e9, (q15_t)0xb28e, (q15_t)0x65e5, (q15_t)0xb289, (q15_t)0x65e1, (q15_t)0xb284,
-  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65da, (q15_t)0xb27a, (q15_t)0x65d6, (q15_t)0xb275, (q15_t)0x65d2, (q15_t)0xb270,
-  (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65ca, (q15_t)0xb266, (q15_t)0x65c7, (q15_t)0xb261, (q15_t)0x65c3, (q15_t)0xb25c,
-  (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65bb, (q15_t)0xb252, (q15_t)0x65b7, (q15_t)0xb24d, (q15_t)0x65b4, (q15_t)0xb248,
-  (q15_t)0x65b0, (q15_t)0xb243, (q15_t)0x65ac, (q15_t)0xb23e, (q15_t)0x65a8, (q15_t)0xb239, (q15_t)0x65a4, (q15_t)0xb234,
-  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x659d, (q15_t)0xb22a, (q15_t)0x6599, (q15_t)0xb225, (q15_t)0x6595, (q15_t)0xb220,
-  (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x658d, (q15_t)0xb216, (q15_t)0x658a, (q15_t)0xb211, (q15_t)0x6586, (q15_t)0xb20c,
-  (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x657e, (q15_t)0xb202, (q15_t)0x657a, (q15_t)0xb1fd, (q15_t)0x6576, (q15_t)0xb1f8,
-  (q15_t)0x6573, (q15_t)0xb1f3, (q15_t)0x656f, (q15_t)0xb1ee, (q15_t)0x656b, (q15_t)0xb1e9, (q15_t)0x6567, (q15_t)0xb1e4,
-  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x655f, (q15_t)0xb1da, (q15_t)0x655c, (q15_t)0xb1d6, (q15_t)0x6558, (q15_t)0xb1d1,
-  (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6550, (q15_t)0xb1c7, (q15_t)0x654c, (q15_t)0xb1c2, (q15_t)0x6548, (q15_t)0xb1bd,
-  (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6541, (q15_t)0xb1b3, (q15_t)0x653d, (q15_t)0xb1ae, (q15_t)0x6539, (q15_t)0xb1a9,
-  (q15_t)0x6535, (q15_t)0xb1a4, (q15_t)0x6531, (q15_t)0xb19f, (q15_t)0x652d, (q15_t)0xb19a, (q15_t)0x652a, (q15_t)0xb195,
-  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6522, (q15_t)0xb18b, (q15_t)0x651e, (q15_t)0xb186, (q15_t)0x651a, (q15_t)0xb181,
-  (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6513, (q15_t)0xb177, (q15_t)0x650f, (q15_t)0xb172, (q15_t)0x650b, (q15_t)0xb16d,
-  (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x6503, (q15_t)0xb163, (q15_t)0x64ff, (q15_t)0xb15e, (q15_t)0x64fb, (q15_t)0xb159,
-  (q15_t)0x64f7, (q15_t)0xb154, (q15_t)0x64f4, (q15_t)0xb14f, (q15_t)0x64f0, (q15_t)0xb14a, (q15_t)0x64ec, (q15_t)0xb146,
-  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64e4, (q15_t)0xb13c, (q15_t)0x64e0, (q15_t)0xb137, (q15_t)0x64dc, (q15_t)0xb132,
-  (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64d5, (q15_t)0xb128, (q15_t)0x64d1, (q15_t)0xb123, (q15_t)0x64cd, (q15_t)0xb11e,
-  (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64c5, (q15_t)0xb114, (q15_t)0x64c1, (q15_t)0xb10f, (q15_t)0x64bd, (q15_t)0xb10a,
-  (q15_t)0x64ba, (q15_t)0xb105, (q15_t)0x64b6, (q15_t)0xb100, (q15_t)0x64b2, (q15_t)0xb0fb, (q15_t)0x64ae, (q15_t)0xb0f6,
-  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x64a6, (q15_t)0xb0ec, (q15_t)0x64a2, (q15_t)0xb0e8, (q15_t)0x649e, (q15_t)0xb0e3,
-  (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x6497, (q15_t)0xb0d9, (q15_t)0x6493, (q15_t)0xb0d4, (q15_t)0x648f, (q15_t)0xb0cf,
-  (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x6487, (q15_t)0xb0c5, (q15_t)0x6483, (q15_t)0xb0c0, (q15_t)0x647f, (q15_t)0xb0bb,
-  (q15_t)0x647b, (q15_t)0xb0b6, (q15_t)0x6478, (q15_t)0xb0b1, (q15_t)0x6474, (q15_t)0xb0ac, (q15_t)0x6470, (q15_t)0xb0a7,
-  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x6468, (q15_t)0xb09e, (q15_t)0x6464, (q15_t)0xb099, (q15_t)0x6460, (q15_t)0xb094,
-  (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x6458, (q15_t)0xb08a, (q15_t)0x6454, (q15_t)0xb085, (q15_t)0x6451, (q15_t)0xb080,
-  (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x6449, (q15_t)0xb076, (q15_t)0x6445, (q15_t)0xb071, (q15_t)0x6441, (q15_t)0xb06c,
-  (q15_t)0x643d, (q15_t)0xb067, (q15_t)0x6439, (q15_t)0xb062, (q15_t)0x6435, (q15_t)0xb05e, (q15_t)0x6431, (q15_t)0xb059,
-  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x6429, (q15_t)0xb04f, (q15_t)0x6426, (q15_t)0xb04a, (q15_t)0x6422, (q15_t)0xb045,
-  (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x641a, (q15_t)0xb03b, (q15_t)0x6416, (q15_t)0xb036, (q15_t)0x6412, (q15_t)0xb031,
-  (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x640a, (q15_t)0xb027, (q15_t)0x6406, (q15_t)0xb023, (q15_t)0x6402, (q15_t)0xb01e,
-  (q15_t)0x63fe, (q15_t)0xb019, (q15_t)0x63fa, (q15_t)0xb014, (q15_t)0x63f7, (q15_t)0xb00f, (q15_t)0x63f3, (q15_t)0xb00a,
-  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63eb, (q15_t)0xb000, (q15_t)0x63e7, (q15_t)0xaffb, (q15_t)0x63e3, (q15_t)0xaff6,
-  (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63db, (q15_t)0xafed, (q15_t)0x63d7, (q15_t)0xafe8, (q15_t)0x63d3, (q15_t)0xafe3,
-  (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63cb, (q15_t)0xafd9, (q15_t)0x63c7, (q15_t)0xafd4, (q15_t)0x63c3, (q15_t)0xafcf,
-  (q15_t)0x63c0, (q15_t)0xafca, (q15_t)0x63bc, (q15_t)0xafc5, (q15_t)0x63b8, (q15_t)0xafc1, (q15_t)0x63b4, (q15_t)0xafbc,
-  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63ac, (q15_t)0xafb2, (q15_t)0x63a8, (q15_t)0xafad, (q15_t)0x63a4, (q15_t)0xafa8,
-  (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x639c, (q15_t)0xaf9e, (q15_t)0x6398, (q15_t)0xaf99, (q15_t)0x6394, (q15_t)0xaf94,
-  (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x638c, (q15_t)0xaf8b, (q15_t)0x6388, (q15_t)0xaf86, (q15_t)0x6384, (q15_t)0xaf81,
-  (q15_t)0x6380, (q15_t)0xaf7c, (q15_t)0x637c, (q15_t)0xaf77, (q15_t)0x6378, (q15_t)0xaf72, (q15_t)0x6375, (q15_t)0xaf6d,
-  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x636d, (q15_t)0xaf64, (q15_t)0x6369, (q15_t)0xaf5f, (q15_t)0x6365, (q15_t)0xaf5a,
-  (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x635d, (q15_t)0xaf50, (q15_t)0x6359, (q15_t)0xaf4b, (q15_t)0x6355, (q15_t)0xaf46,
-  (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x634d, (q15_t)0xaf3d, (q15_t)0x6349, (q15_t)0xaf38, (q15_t)0x6345, (q15_t)0xaf33,
-  (q15_t)0x6341, (q15_t)0xaf2e, (q15_t)0x633d, (q15_t)0xaf29, (q15_t)0x6339, (q15_t)0xaf24, (q15_t)0x6335, (q15_t)0xaf1f,
-  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x632d, (q15_t)0xaf16, (q15_t)0x6329, (q15_t)0xaf11, (q15_t)0x6325, (q15_t)0xaf0c,
-  (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x631d, (q15_t)0xaf02, (q15_t)0x6319, (q15_t)0xaefd, (q15_t)0x6315, (q15_t)0xaef8,
-  (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x630d, (q15_t)0xaeef, (q15_t)0x6309, (q15_t)0xaeea, (q15_t)0x6305, (q15_t)0xaee5,
-  (q15_t)0x6301, (q15_t)0xaee0, (q15_t)0x62fd, (q15_t)0xaedb, (q15_t)0x62f9, (q15_t)0xaed6, (q15_t)0x62f5, (q15_t)0xaed2,
-  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62ee, (q15_t)0xaec8, (q15_t)0x62ea, (q15_t)0xaec3, (q15_t)0x62e6, (q15_t)0xaebe,
-  (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62de, (q15_t)0xaeb4, (q15_t)0x62da, (q15_t)0xaeb0, (q15_t)0x62d6, (q15_t)0xaeab,
-  (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62ce, (q15_t)0xaea1, (q15_t)0x62ca, (q15_t)0xae9c, (q15_t)0x62c6, (q15_t)0xae97,
-  (q15_t)0x62c2, (q15_t)0xae92, (q15_t)0x62be, (q15_t)0xae8e, (q15_t)0x62ba, (q15_t)0xae89, (q15_t)0x62b6, (q15_t)0xae84,
-  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62ae, (q15_t)0xae7a, (q15_t)0x62aa, (q15_t)0xae75, (q15_t)0x62a6, (q15_t)0xae71,
-  (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x629e, (q15_t)0xae67, (q15_t)0x629a, (q15_t)0xae62, (q15_t)0x6296, (q15_t)0xae5d,
-  (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x628e, (q15_t)0xae54, (q15_t)0x628a, (q15_t)0xae4f, (q15_t)0x6286, (q15_t)0xae4a,
-  (q15_t)0x6282, (q15_t)0xae45, (q15_t)0x627e, (q15_t)0xae40, (q15_t)0x627a, (q15_t)0xae3b, (q15_t)0x6275, (q15_t)0xae37,
-  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x626d, (q15_t)0xae2d, (q15_t)0x6269, (q15_t)0xae28, (q15_t)0x6265, (q15_t)0xae23,
-  (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x625d, (q15_t)0xae1a, (q15_t)0x6259, (q15_t)0xae15, (q15_t)0x6255, (q15_t)0xae10,
-  (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x624d, (q15_t)0xae06, (q15_t)0x6249, (q15_t)0xae01, (q15_t)0x6245, (q15_t)0xadfd,
-  (q15_t)0x6241, (q15_t)0xadf8, (q15_t)0x623d, (q15_t)0xadf3, (q15_t)0x6239, (q15_t)0xadee, (q15_t)0x6235, (q15_t)0xade9,
-  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x622d, (q15_t)0xade0, (q15_t)0x6229, (q15_t)0xaddb, (q15_t)0x6225, (q15_t)0xadd6,
-  (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x621d, (q15_t)0xadcc, (q15_t)0x6219, (q15_t)0xadc8, (q15_t)0x6215, (q15_t)0xadc3,
-  (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x620d, (q15_t)0xadb9, (q15_t)0x6209, (q15_t)0xadb4, (q15_t)0x6205, (q15_t)0xadaf,
-  (q15_t)0x6201, (q15_t)0xadab, (q15_t)0x61fd, (q15_t)0xada6, (q15_t)0x61f9, (q15_t)0xada1, (q15_t)0x61f5, (q15_t)0xad9c,
-  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61ec, (q15_t)0xad93, (q15_t)0x61e8, (q15_t)0xad8e, (q15_t)0x61e4, (q15_t)0xad89,
-  (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61dc, (q15_t)0xad7f, (q15_t)0x61d8, (q15_t)0xad7b, (q15_t)0x61d4, (q15_t)0xad76,
-  (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61cc, (q15_t)0xad6c, (q15_t)0x61c8, (q15_t)0xad67, (q15_t)0x61c4, (q15_t)0xad63,
-  (q15_t)0x61c0, (q15_t)0xad5e, (q15_t)0x61bc, (q15_t)0xad59, (q15_t)0x61b8, (q15_t)0xad54, (q15_t)0x61b4, (q15_t)0xad4f,
-  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x61ac, (q15_t)0xad46, (q15_t)0x61a8, (q15_t)0xad41, (q15_t)0x61a3, (q15_t)0xad3c,
-  (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x619b, (q15_t)0xad33, (q15_t)0x6197, (q15_t)0xad2e, (q15_t)0x6193, (q15_t)0xad29,
-  (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x618b, (q15_t)0xad1f, (q15_t)0x6187, (q15_t)0xad1b, (q15_t)0x6183, (q15_t)0xad16,
-  (q15_t)0x617f, (q15_t)0xad11, (q15_t)0x617b, (q15_t)0xad0c, (q15_t)0x6177, (q15_t)0xad08, (q15_t)0x6173, (q15_t)0xad03,
-  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x616b, (q15_t)0xacf9, (q15_t)0x6166, (q15_t)0xacf4, (q15_t)0x6162, (q15_t)0xacf0,
-  (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x615a, (q15_t)0xace6, (q15_t)0x6156, (q15_t)0xace1, (q15_t)0x6152, (q15_t)0xacdd,
-  (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x614a, (q15_t)0xacd3, (q15_t)0x6146, (q15_t)0xacce, (q15_t)0x6142, (q15_t)0xacc9,
-  (q15_t)0x613e, (q15_t)0xacc5, (q15_t)0x613a, (q15_t)0xacc0, (q15_t)0x6135, (q15_t)0xacbb, (q15_t)0x6131, (q15_t)0xacb6,
-  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x6129, (q15_t)0xacad, (q15_t)0x6125, (q15_t)0xaca8, (q15_t)0x6121, (q15_t)0xaca3,
-  (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x6119, (q15_t)0xac9a, (q15_t)0x6115, (q15_t)0xac95, (q15_t)0x6111, (q15_t)0xac90,
-  (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x6108, (q15_t)0xac87, (q15_t)0x6104, (q15_t)0xac82, (q15_t)0x6100, (q15_t)0xac7d,
-  (q15_t)0x60fc, (q15_t)0xac78, (q15_t)0x60f8, (q15_t)0xac74, (q15_t)0x60f4, (q15_t)0xac6f, (q15_t)0x60f0, (q15_t)0xac6a,
-  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60e8, (q15_t)0xac61, (q15_t)0x60e4, (q15_t)0xac5c, (q15_t)0x60df, (q15_t)0xac57,
-  (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60d7, (q15_t)0xac4e, (q15_t)0x60d3, (q15_t)0xac49, (q15_t)0x60cf, (q15_t)0xac44,
-  (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60c7, (q15_t)0xac3b, (q15_t)0x60c3, (q15_t)0xac36, (q15_t)0x60bf, (q15_t)0xac31,
-  (q15_t)0x60ba, (q15_t)0xac2c, (q15_t)0x60b6, (q15_t)0xac28, (q15_t)0x60b2, (q15_t)0xac23, (q15_t)0x60ae, (q15_t)0xac1e,
-  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x60a6, (q15_t)0xac15, (q15_t)0x60a2, (q15_t)0xac10, (q15_t)0x609e, (q15_t)0xac0b,
-  (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6095, (q15_t)0xac02, (q15_t)0x6091, (q15_t)0xabfd, (q15_t)0x608d, (q15_t)0xabf8,
-  (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6085, (q15_t)0xabef, (q15_t)0x6081, (q15_t)0xabea, (q15_t)0x607d, (q15_t)0xabe5,
-  (q15_t)0x6078, (q15_t)0xabe0, (q15_t)0x6074, (q15_t)0xabdc, (q15_t)0x6070, (q15_t)0xabd7, (q15_t)0x606c, (q15_t)0xabd2,
-  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6064, (q15_t)0xabc9, (q15_t)0x6060, (q15_t)0xabc4, (q15_t)0x605c, (q15_t)0xabbf,
-  (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6053, (q15_t)0xabb6, (q15_t)0x604f, (q15_t)0xabb1, (q15_t)0x604b, (q15_t)0xabac,
-  (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6043, (q15_t)0xaba3, (q15_t)0x603f, (q15_t)0xab9e, (q15_t)0x603a, (q15_t)0xab99,
-  (q15_t)0x6036, (q15_t)0xab95, (q15_t)0x6032, (q15_t)0xab90, (q15_t)0x602e, (q15_t)0xab8b, (q15_t)0x602a, (q15_t)0xab87,
-  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6022, (q15_t)0xab7d, (q15_t)0x601d, (q15_t)0xab78, (q15_t)0x6019, (q15_t)0xab74,
-  (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6011, (q15_t)0xab6a, (q15_t)0x600d, (q15_t)0xab66, (q15_t)0x6009, (q15_t)0xab61,
-  (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x6000, (q15_t)0xab57, (q15_t)0x5ffc, (q15_t)0xab53, (q15_t)0x5ff8, (q15_t)0xab4e,
-  (q15_t)0x5ff4, (q15_t)0xab49, (q15_t)0x5ff0, (q15_t)0xab45, (q15_t)0x5fec, (q15_t)0xab40, (q15_t)0x5fe7, (q15_t)0xab3b,
-  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fdf, (q15_t)0xab32, (q15_t)0x5fdb, (q15_t)0xab2d, (q15_t)0x5fd7, (q15_t)0xab28,
-  (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fce, (q15_t)0xab1f, (q15_t)0x5fca, (q15_t)0xab1a, (q15_t)0x5fc6, (q15_t)0xab16,
-  (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fbe, (q15_t)0xab0c, (q15_t)0x5fba, (q15_t)0xab07, (q15_t)0x5fb5, (q15_t)0xab03,
-  (q15_t)0x5fb1, (q15_t)0xaafe, (q15_t)0x5fad, (q15_t)0xaaf9, (q15_t)0x5fa9, (q15_t)0xaaf5, (q15_t)0x5fa5, (q15_t)0xaaf0,
-  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f9c, (q15_t)0xaae7, (q15_t)0x5f98, (q15_t)0xaae2, (q15_t)0x5f94, (q15_t)0xaadd,
-  (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f8c, (q15_t)0xaad4, (q15_t)0x5f87, (q15_t)0xaacf, (q15_t)0x5f83, (q15_t)0xaaca,
-  (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f7b, (q15_t)0xaac1, (q15_t)0x5f77, (q15_t)0xaabc, (q15_t)0x5f72, (q15_t)0xaab8,
-  (q15_t)0x5f6e, (q15_t)0xaab3, (q15_t)0x5f6a, (q15_t)0xaaae, (q15_t)0x5f66, (q15_t)0xaaaa, (q15_t)0x5f62, (q15_t)0xaaa5,
-  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f59, (q15_t)0xaa9c, (q15_t)0x5f55, (q15_t)0xaa97, (q15_t)0x5f51, (q15_t)0xaa92,
-  (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f49, (q15_t)0xaa89, (q15_t)0x5f44, (q15_t)0xaa84, (q15_t)0x5f40, (q15_t)0xaa7f,
-  (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f38, (q15_t)0xaa76, (q15_t)0x5f34, (q15_t)0xaa71, (q15_t)0x5f2f, (q15_t)0xaa6d,
-  (q15_t)0x5f2b, (q15_t)0xaa68, (q15_t)0x5f27, (q15_t)0xaa63, (q15_t)0x5f23, (q15_t)0xaa5f, (q15_t)0x5f1f, (q15_t)0xaa5a,
-  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f16, (q15_t)0xaa51, (q15_t)0x5f12, (q15_t)0xaa4c, (q15_t)0x5f0e, (q15_t)0xaa47,
-  (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5f05, (q15_t)0xaa3e, (q15_t)0x5f01, (q15_t)0xaa39, (q15_t)0x5efd, (q15_t)0xaa35,
-  (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ef5, (q15_t)0xaa2b, (q15_t)0x5ef0, (q15_t)0xaa27, (q15_t)0x5eec, (q15_t)0xaa22,
-  (q15_t)0x5ee8, (q15_t)0xaa1d, (q15_t)0x5ee4, (q15_t)0xaa19, (q15_t)0x5edf, (q15_t)0xaa14, (q15_t)0x5edb, (q15_t)0xaa10,
-  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ed3, (q15_t)0xaa06, (q15_t)0x5ecf, (q15_t)0xaa02, (q15_t)0x5eca, (q15_t)0xa9fd,
-  (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5ec2, (q15_t)0xa9f4, (q15_t)0x5ebe, (q15_t)0xa9ef, (q15_t)0x5eb9, (q15_t)0xa9ea,
-  (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5eb1, (q15_t)0xa9e1, (q15_t)0x5ead, (q15_t)0xa9dc, (q15_t)0x5ea9, (q15_t)0xa9d8,
-  (q15_t)0x5ea4, (q15_t)0xa9d3, (q15_t)0x5ea0, (q15_t)0xa9ce, (q15_t)0x5e9c, (q15_t)0xa9ca, (q15_t)0x5e98, (q15_t)0xa9c5,
-  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e8f, (q15_t)0xa9bc, (q15_t)0x5e8b, (q15_t)0xa9b7, (q15_t)0x5e87, (q15_t)0xa9b3,
-  (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e7e, (q15_t)0xa9a9, (q15_t)0x5e7a, (q15_t)0xa9a5, (q15_t)0x5e76, (q15_t)0xa9a0,
-  (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e6d, (q15_t)0xa997, (q15_t)0x5e69, (q15_t)0xa992, (q15_t)0x5e65, (q15_t)0xa98d,
-  (q15_t)0x5e60, (q15_t)0xa989, (q15_t)0x5e5c, (q15_t)0xa984, (q15_t)0x5e58, (q15_t)0xa980, (q15_t)0x5e54, (q15_t)0xa97b,
-  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e4b, (q15_t)0xa972, (q15_t)0x5e47, (q15_t)0xa96d, (q15_t)0x5e43, (q15_t)0xa968,
-  (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e3a, (q15_t)0xa95f, (q15_t)0x5e36, (q15_t)0xa95b, (q15_t)0x5e32, (q15_t)0xa956,
-  (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e29, (q15_t)0xa94d, (q15_t)0x5e25, (q15_t)0xa948, (q15_t)0x5e21, (q15_t)0xa943,
-  (q15_t)0x5e1c, (q15_t)0xa93f, (q15_t)0x5e18, (q15_t)0xa93a, (q15_t)0x5e14, (q15_t)0xa936, (q15_t)0x5e10, (q15_t)0xa931,
-  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5e07, (q15_t)0xa928, (q15_t)0x5e03, (q15_t)0xa923, (q15_t)0x5dff, (q15_t)0xa91e,
-  (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5df6, (q15_t)0xa915, (q15_t)0x5df2, (q15_t)0xa911, (q15_t)0x5dee, (q15_t)0xa90c,
-  (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5de5, (q15_t)0xa903, (q15_t)0x5de1, (q15_t)0xa8fe, (q15_t)0x5ddc, (q15_t)0xa8fa,
-  (q15_t)0x5dd8, (q15_t)0xa8f5, (q15_t)0x5dd4, (q15_t)0xa8f0, (q15_t)0x5dd0, (q15_t)0xa8ec, (q15_t)0x5dcb, (q15_t)0xa8e7,
-  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5dc3, (q15_t)0xa8de, (q15_t)0x5dbf, (q15_t)0xa8d9, (q15_t)0x5dba, (q15_t)0xa8d5,
-  (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5db2, (q15_t)0xa8cc, (q15_t)0x5dad, (q15_t)0xa8c7, (q15_t)0x5da9, (q15_t)0xa8c2,
-  (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5da1, (q15_t)0xa8b9, (q15_t)0x5d9c, (q15_t)0xa8b5, (q15_t)0x5d98, (q15_t)0xa8b0,
-  (q15_t)0x5d94, (q15_t)0xa8ab, (q15_t)0x5d8f, (q15_t)0xa8a7, (q15_t)0x5d8b, (q15_t)0xa8a2, (q15_t)0x5d87, (q15_t)0xa89e,
-  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d7e, (q15_t)0xa894, (q15_t)0x5d7a, (q15_t)0xa890, (q15_t)0x5d76, (q15_t)0xa88b,
-  (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d6d, (q15_t)0xa882, (q15_t)0x5d69, (q15_t)0xa87d, (q15_t)0x5d65, (q15_t)0xa879,
-  (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d5c, (q15_t)0xa870, (q15_t)0x5d58, (q15_t)0xa86b, (q15_t)0x5d53, (q15_t)0xa867,
-  (q15_t)0x5d4f, (q15_t)0xa862, (q15_t)0x5d4b, (q15_t)0xa85d, (q15_t)0x5d46, (q15_t)0xa859, (q15_t)0x5d42, (q15_t)0xa854,
-  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d3a, (q15_t)0xa84b, (q15_t)0x5d35, (q15_t)0xa847, (q15_t)0x5d31, (q15_t)0xa842,
-  (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d28, (q15_t)0xa839, (q15_t)0x5d24, (q15_t)0xa834, (q15_t)0x5d20, (q15_t)0xa830,
-  (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d17, (q15_t)0xa827, (q15_t)0x5d13, (q15_t)0xa822, (q15_t)0x5d0e, (q15_t)0xa81d,
-  (q15_t)0x5d0a, (q15_t)0xa819, (q15_t)0x5d06, (q15_t)0xa814, (q15_t)0x5d01, (q15_t)0xa810, (q15_t)0x5cfd, (q15_t)0xa80b,
-  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5cf5, (q15_t)0xa802, (q15_t)0x5cf0, (q15_t)0xa7fd, (q15_t)0x5cec, (q15_t)0xa7f9,
-  (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5ce3, (q15_t)0xa7f0, (q15_t)0x5cdf, (q15_t)0xa7eb, (q15_t)0x5cdb, (q15_t)0xa7e7,
-  (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cd2, (q15_t)0xa7de, (q15_t)0x5cce, (q15_t)0xa7d9, (q15_t)0x5cc9, (q15_t)0xa7d4,
-  (q15_t)0x5cc5, (q15_t)0xa7d0, (q15_t)0x5cc1, (q15_t)0xa7cb, (q15_t)0x5cbc, (q15_t)0xa7c7, (q15_t)0x5cb8, (q15_t)0xa7c2,
-  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5caf, (q15_t)0xa7b9, (q15_t)0x5cab, (q15_t)0xa7b5, (q15_t)0x5ca7, (q15_t)0xa7b0,
-  (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c9e, (q15_t)0xa7a7, (q15_t)0x5c9a, (q15_t)0xa7a2, (q15_t)0x5c95, (q15_t)0xa79e,
-  (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c8d, (q15_t)0xa795, (q15_t)0x5c88, (q15_t)0xa790, (q15_t)0x5c84, (q15_t)0xa78c,
-  (q15_t)0x5c80, (q15_t)0xa787, (q15_t)0x5c7b, (q15_t)0xa783, (q15_t)0x5c77, (q15_t)0xa77e, (q15_t)0x5c73, (q15_t)0xa779,
-  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c6a, (q15_t)0xa770, (q15_t)0x5c66, (q15_t)0xa76c, (q15_t)0x5c61, (q15_t)0xa767,
-  (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c58, (q15_t)0xa75e, (q15_t)0x5c54, (q15_t)0xa75a, (q15_t)0x5c50, (q15_t)0xa755,
-  (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c47, (q15_t)0xa74c, (q15_t)0x5c43, (q15_t)0xa748, (q15_t)0x5c3e, (q15_t)0xa743,
-  (q15_t)0x5c3a, (q15_t)0xa73f, (q15_t)0x5c36, (q15_t)0xa73a, (q15_t)0x5c31, (q15_t)0xa735, (q15_t)0x5c2d, (q15_t)0xa731,
-  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c24, (q15_t)0xa728, (q15_t)0x5c20, (q15_t)0xa723, (q15_t)0x5c1b, (q15_t)0xa71f,
-  (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c13, (q15_t)0xa716, (q15_t)0x5c0e, (q15_t)0xa711, (q15_t)0x5c0a, (q15_t)0xa70d,
-  (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5c01, (q15_t)0xa704, (q15_t)0x5bfd, (q15_t)0xa6ff, (q15_t)0x5bf9, (q15_t)0xa6fb,
-  (q15_t)0x5bf4, (q15_t)0xa6f6, (q15_t)0x5bf0, (q15_t)0xa6f2, (q15_t)0x5beb, (q15_t)0xa6ed, (q15_t)0x5be7, (q15_t)0xa6e9,
-  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bde, (q15_t)0xa6e0, (q15_t)0x5bda, (q15_t)0xa6db, (q15_t)0x5bd6, (q15_t)0xa6d7,
-  (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bcd, (q15_t)0xa6ce, (q15_t)0x5bc8, (q15_t)0xa6c9, (q15_t)0x5bc4, (q15_t)0xa6c5,
-  (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bbb, (q15_t)0xa6bc, (q15_t)0x5bb7, (q15_t)0xa6b7, (q15_t)0x5bb2, (q15_t)0xa6b3,
-  (q15_t)0x5bae, (q15_t)0xa6ae, (q15_t)0x5baa, (q15_t)0xa6aa, (q15_t)0x5ba5, (q15_t)0xa6a5, (q15_t)0x5ba1, (q15_t)0xa6a1,
-  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b98, (q15_t)0xa698, (q15_t)0x5b94, (q15_t)0xa693, (q15_t)0x5b8f, (q15_t)0xa68f,
-  (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b87, (q15_t)0xa686, (q15_t)0x5b82, (q15_t)0xa681, (q15_t)0x5b7e, (q15_t)0xa67d,
-  (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b75, (q15_t)0xa674, (q15_t)0x5b71, (q15_t)0xa66f, (q15_t)0x5b6c, (q15_t)0xa66b,
-  (q15_t)0x5b68, (q15_t)0xa666, (q15_t)0x5b63, (q15_t)0xa662, (q15_t)0x5b5f, (q15_t)0xa65d, (q15_t)0x5b5b, (q15_t)0xa659,
-  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b52, (q15_t)0xa650, (q15_t)0x5b4d, (q15_t)0xa64b, (q15_t)0x5b49, (q15_t)0xa647,
-  (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b40, (q15_t)0xa63e, (q15_t)0x5b3c, (q15_t)0xa639, (q15_t)0x5b37, (q15_t)0xa635,
-  (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b2f, (q15_t)0xa62c, (q15_t)0x5b2a, (q15_t)0xa627, (q15_t)0x5b26, (q15_t)0xa623,
-  (q15_t)0x5b21, (q15_t)0xa61f, (q15_t)0x5b1d, (q15_t)0xa61a, (q15_t)0x5b19, (q15_t)0xa616, (q15_t)0x5b14, (q15_t)0xa611,
-  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5b0b, (q15_t)0xa608, (q15_t)0x5b07, (q15_t)0xa604, (q15_t)0x5b02, (q15_t)0xa5ff,
-  (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5afa, (q15_t)0xa5f6, (q15_t)0x5af5, (q15_t)0xa5f2, (q15_t)0x5af1, (q15_t)0xa5ed,
-  (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5ae8, (q15_t)0xa5e4, (q15_t)0x5ae4, (q15_t)0xa5e0, (q15_t)0x5adf, (q15_t)0xa5dc,
-  (q15_t)0x5adb, (q15_t)0xa5d7, (q15_t)0x5ad6, (q15_t)0xa5d3, (q15_t)0x5ad2, (q15_t)0xa5ce, (q15_t)0x5acd, (q15_t)0xa5ca,
-  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ac5, (q15_t)0xa5c1, (q15_t)0x5ac0, (q15_t)0xa5bc, (q15_t)0x5abc, (q15_t)0xa5b8,
-  (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5ab3, (q15_t)0xa5af, (q15_t)0x5aae, (q15_t)0xa5aa, (q15_t)0x5aaa, (q15_t)0xa5a6,
-  (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5aa1, (q15_t)0xa59d, (q15_t)0x5a9d, (q15_t)0xa599, (q15_t)0x5a98, (q15_t)0xa594,
-  (q15_t)0x5a94, (q15_t)0xa590, (q15_t)0x5a8f, (q15_t)0xa58b, (q15_t)0x5a8b, (q15_t)0xa587, (q15_t)0x5a86, (q15_t)0xa582,
-  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a7e, (q15_t)0xa57a, (q15_t)0x5a79, (q15_t)0xa575, (q15_t)0x5a75, (q15_t)0xa571,
-  (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a6c, (q15_t)0xa568, (q15_t)0x5a67, (q15_t)0xa563, (q15_t)0x5a63, (q15_t)0xa55f,
-  (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a5a, (q15_t)0xa556, (q15_t)0x5a56, (q15_t)0xa552, (q15_t)0x5a51, (q15_t)0xa54d,
-  (q15_t)0x5a4d, (q15_t)0xa549, (q15_t)0x5a48, (q15_t)0xa544, (q15_t)0x5a44, (q15_t)0xa540, (q15_t)0x5a3f, (q15_t)0xa53b,
-  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a36, (q15_t)0xa533, (q15_t)0x5a32, (q15_t)0xa52e, (q15_t)0x5a2d, (q15_t)0xa52a,
-  (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a24, (q15_t)0xa521, (q15_t)0x5a20, (q15_t)0xa51c, (q15_t)0x5a1c, (q15_t)0xa518,
-  (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a13, (q15_t)0xa50f, (q15_t)0x5a0e, (q15_t)0xa50b, (q15_t)0x5a0a, (q15_t)0xa506,
-  (q15_t)0x5a05, (q15_t)0xa502, (q15_t)0x5a01, (q15_t)0xa4fe, (q15_t)0x59fc, (q15_t)0xa4f9, (q15_t)0x59f8, (q15_t)0xa4f5,
-  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ef, (q15_t)0xa4ec, (q15_t)0x59ea, (q15_t)0xa4e7, (q15_t)0x59e6, (q15_t)0xa4e3,
-  (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59dd, (q15_t)0xa4da, (q15_t)0x59d9, (q15_t)0xa4d6, (q15_t)0x59d4, (q15_t)0xa4d1,
-  (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59cb, (q15_t)0xa4c9, (q15_t)0x59c7, (q15_t)0xa4c4, (q15_t)0x59c2, (q15_t)0xa4c0,
-  (q15_t)0x59be, (q15_t)0xa4bb, (q15_t)0x59b9, (q15_t)0xa4b7, (q15_t)0x59b5, (q15_t)0xa4b3, (q15_t)0x59b0, (q15_t)0xa4ae,
-  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x59a7, (q15_t)0xa4a5, (q15_t)0x59a3, (q15_t)0xa4a1, (q15_t)0x599e, (q15_t)0xa49d,
-  (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5995, (q15_t)0xa494, (q15_t)0x5991, (q15_t)0xa48f, (q15_t)0x598c, (q15_t)0xa48b,
-  (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5983, (q15_t)0xa482, (q15_t)0x597f, (q15_t)0xa47e, (q15_t)0x597a, (q15_t)0xa479,
-  (q15_t)0x5976, (q15_t)0xa475, (q15_t)0x5971, (q15_t)0xa471, (q15_t)0x596d, (q15_t)0xa46c, (q15_t)0x5968, (q15_t)0xa468,
-  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x595f, (q15_t)0xa45f, (q15_t)0x595b, (q15_t)0xa45b, (q15_t)0x5956, (q15_t)0xa456,
-  (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x594d, (q15_t)0xa44e, (q15_t)0x5949, (q15_t)0xa449, (q15_t)0x5944, (q15_t)0xa445,
-  (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x593b, (q15_t)0xa43c, (q15_t)0x5937, (q15_t)0xa438, (q15_t)0x5932, (q15_t)0xa433,
-  (q15_t)0x592e, (q15_t)0xa42f, (q15_t)0x5929, (q15_t)0xa42a, (q15_t)0x5925, (q15_t)0xa426, (q15_t)0x5920, (q15_t)0xa422,
-  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x5917, (q15_t)0xa419, (q15_t)0x5913, (q15_t)0xa415, (q15_t)0x590e, (q15_t)0xa410,
-  (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x5905, (q15_t)0xa407, (q15_t)0x5901, (q15_t)0xa403, (q15_t)0x58fc, (q15_t)0xa3ff,
-  (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58f3, (q15_t)0xa3f6, (q15_t)0x58ef, (q15_t)0xa3f2, (q15_t)0x58ea, (q15_t)0xa3ed,
-  (q15_t)0x58e6, (q15_t)0xa3e9, (q15_t)0x58e1, (q15_t)0xa3e5, (q15_t)0x58dd, (q15_t)0xa3e0, (q15_t)0x58d8, (q15_t)0xa3dc,
-  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58cf, (q15_t)0xa3d3, (q15_t)0x58cb, (q15_t)0xa3cf, (q15_t)0x58c6, (q15_t)0xa3ca,
-  (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58bd, (q15_t)0xa3c2, (q15_t)0x58b8, (q15_t)0xa3bd, (q15_t)0x58b4, (q15_t)0xa3b9,
-  (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x58ab, (q15_t)0xa3b0, (q15_t)0x58a6, (q15_t)0xa3ac, (q15_t)0x58a2, (q15_t)0xa3a8,
-  (q15_t)0x589d, (q15_t)0xa3a3, (q15_t)0x5899, (q15_t)0xa39f, (q15_t)0x5894, (q15_t)0xa39a, (q15_t)0x5890, (q15_t)0xa396,
-  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5887, (q15_t)0xa38d, (q15_t)0x5882, (q15_t)0xa389, (q15_t)0x587d, (q15_t)0xa385,
-  (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5874, (q15_t)0xa37c, (q15_t)0x5870, (q15_t)0xa378, (q15_t)0x586b, (q15_t)0xa373,
-  (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5862, (q15_t)0xa36b, (q15_t)0x585e, (q15_t)0xa366, (q15_t)0x5859, (q15_t)0xa362,
-  (q15_t)0x5855, (q15_t)0xa35e, (q15_t)0x5850, (q15_t)0xa359, (q15_t)0x584b, (q15_t)0xa355, (q15_t)0x5847, (q15_t)0xa351,
-  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x583e, (q15_t)0xa348, (q15_t)0x5839, (q15_t)0xa344, (q15_t)0x5835, (q15_t)0xa33f,
-  (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x582c, (q15_t)0xa337, (q15_t)0x5827, (q15_t)0xa332, (q15_t)0x5822, (q15_t)0xa32e,
-  (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x5819, (q15_t)0xa325, (q15_t)0x5815, (q15_t)0xa321, (q15_t)0x5810, (q15_t)0xa31d,
-  (q15_t)0x580c, (q15_t)0xa318, (q15_t)0x5807, (q15_t)0xa314, (q15_t)0x5803, (q15_t)0xa310, (q15_t)0x57fe, (q15_t)0xa30b,
-  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57f5, (q15_t)0xa303, (q15_t)0x57f0, (q15_t)0xa2ff, (q15_t)0x57ec, (q15_t)0xa2fa,
-  (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57e3, (q15_t)0xa2f2, (q15_t)0x57de, (q15_t)0xa2ed, (q15_t)0x57d9, (q15_t)0xa2e9,
-  (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57d0, (q15_t)0xa2e0, (q15_t)0x57cc, (q15_t)0xa2dc, (q15_t)0x57c7, (q15_t)0xa2d8,
-  (q15_t)0x57c3, (q15_t)0xa2d3, (q15_t)0x57be, (q15_t)0xa2cf, (q15_t)0x57b9, (q15_t)0xa2cb, (q15_t)0x57b5, (q15_t)0xa2c6,
-  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x57ac, (q15_t)0xa2be, (q15_t)0x57a7, (q15_t)0xa2ba, (q15_t)0x57a3, (q15_t)0xa2b5,
-  (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x5799, (q15_t)0xa2ad, (q15_t)0x5795, (q15_t)0xa2a8, (q15_t)0x5790, (q15_t)0xa2a4,
-  (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5787, (q15_t)0xa29b, (q15_t)0x5783, (q15_t)0xa297, (q15_t)0x577e, (q15_t)0xa293,
-  (q15_t)0x5779, (q15_t)0xa28f, (q15_t)0x5775, (q15_t)0xa28a, (q15_t)0x5770, (q15_t)0xa286, (q15_t)0x576c, (q15_t)0xa282,
-  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5762, (q15_t)0xa279, (q15_t)0x575e, (q15_t)0xa275, (q15_t)0x5759, (q15_t)0xa271,
-  (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5750, (q15_t)0xa268, (q15_t)0x574b, (q15_t)0xa264, (q15_t)0x5747, (q15_t)0xa25f,
-  (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x573e, (q15_t)0xa257, (q15_t)0x5739, (q15_t)0xa253, (q15_t)0x5734, (q15_t)0xa24e,
-  (q15_t)0x5730, (q15_t)0xa24a, (q15_t)0x572b, (q15_t)0xa246, (q15_t)0x5727, (q15_t)0xa241, (q15_t)0x5722, (q15_t)0xa23d,
-  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x5719, (q15_t)0xa235, (q15_t)0x5714, (q15_t)0xa230, (q15_t)0x5710, (q15_t)0xa22c,
-  (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x5706, (q15_t)0xa224, (q15_t)0x5702, (q15_t)0xa21f, (q15_t)0x56fd, (q15_t)0xa21b,
-  (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56f4, (q15_t)0xa212, (q15_t)0x56ef, (q15_t)0xa20e, (q15_t)0x56eb, (q15_t)0xa20a,
-  (q15_t)0x56e6, (q15_t)0xa206, (q15_t)0x56e2, (q15_t)0xa201, (q15_t)0x56dd, (q15_t)0xa1fd, (q15_t)0x56d8, (q15_t)0xa1f9,
-  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56cf, (q15_t)0xa1f0, (q15_t)0x56ca, (q15_t)0xa1ec, (q15_t)0x56c6, (q15_t)0xa1e8,
-  (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56bd, (q15_t)0xa1df, (q15_t)0x56b8, (q15_t)0xa1db, (q15_t)0x56b3, (q15_t)0xa1d7,
-  (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x56aa, (q15_t)0xa1ce, (q15_t)0x56a5, (q15_t)0xa1ca, (q15_t)0x56a1, (q15_t)0xa1c6,
-  (q15_t)0x569c, (q15_t)0xa1c1, (q15_t)0x5698, (q15_t)0xa1bd, (q15_t)0x5693, (q15_t)0xa1b9, (q15_t)0x568e, (q15_t)0xa1b5,
-  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5685, (q15_t)0xa1ac, (q15_t)0x5680, (q15_t)0xa1a8, (q15_t)0x567c, (q15_t)0xa1a4,
-  (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5673, (q15_t)0xa19b, (q15_t)0x566e, (q15_t)0xa197, (q15_t)0x5669, (q15_t)0xa193,
-  (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5660, (q15_t)0xa18a, (q15_t)0x565b, (q15_t)0xa186, (q15_t)0x5657, (q15_t)0xa182,
-  (q15_t)0x5652, (q15_t)0xa17e, (q15_t)0x564d, (q15_t)0xa179, (q15_t)0x5649, (q15_t)0xa175, (q15_t)0x5644, (q15_t)0xa171,
-  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x563b, (q15_t)0xa168, (q15_t)0x5636, (q15_t)0xa164, (q15_t)0x5632, (q15_t)0xa160,
-  (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x5628, (q15_t)0xa157, (q15_t)0x5624, (q15_t)0xa153, (q15_t)0x561f, (q15_t)0xa14f,
-  (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5616, (q15_t)0xa147, (q15_t)0x5611, (q15_t)0xa142, (q15_t)0x560c, (q15_t)0xa13e,
-  (q15_t)0x5608, (q15_t)0xa13a, (q15_t)0x5603, (q15_t)0xa136, (q15_t)0x55fe, (q15_t)0xa131, (q15_t)0x55fa, (q15_t)0xa12d,
-  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55f0, (q15_t)0xa125, (q15_t)0x55ec, (q15_t)0xa121, (q15_t)0x55e7, (q15_t)0xa11c,
-  (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55de, (q15_t)0xa114, (q15_t)0x55d9, (q15_t)0xa110, (q15_t)0x55d5, (q15_t)0xa10b,
-  (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55cb, (q15_t)0xa103, (q15_t)0x55c7, (q15_t)0xa0ff, (q15_t)0x55c2, (q15_t)0xa0fb,
-  (q15_t)0x55bd, (q15_t)0xa0f6, (q15_t)0x55b9, (q15_t)0xa0f2, (q15_t)0x55b4, (q15_t)0xa0ee, (q15_t)0x55af, (q15_t)0xa0ea,
-  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x55a6, (q15_t)0xa0e1, (q15_t)0x55a1, (q15_t)0xa0dd, (q15_t)0x559d, (q15_t)0xa0d9,
-  (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5593, (q15_t)0xa0d1, (q15_t)0x558f, (q15_t)0xa0cc, (q15_t)0x558a, (q15_t)0xa0c8,
-  (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5581, (q15_t)0xa0c0, (q15_t)0x557c, (q15_t)0xa0bc, (q15_t)0x5577, (q15_t)0xa0b7,
-  (q15_t)0x5572, (q15_t)0xa0b3, (q15_t)0x556e, (q15_t)0xa0af, (q15_t)0x5569, (q15_t)0xa0ab, (q15_t)0x5564, (q15_t)0xa0a7,
-  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x555b, (q15_t)0xa09e, (q15_t)0x5556, (q15_t)0xa09a, (q15_t)0x5552, (q15_t)0xa096,
-  (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x5548, (q15_t)0xa08e, (q15_t)0x5544, (q15_t)0xa089, (q15_t)0x553f, (q15_t)0xa085,
-  (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5536, (q15_t)0xa07d, (q15_t)0x5531, (q15_t)0xa079, (q15_t)0x552c, (q15_t)0xa074,
-  (q15_t)0x5528, (q15_t)0xa070, (q15_t)0x5523, (q15_t)0xa06c, (q15_t)0x551e, (q15_t)0xa068, (q15_t)0x5519, (q15_t)0xa064,
-  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5510, (q15_t)0xa05b, (q15_t)0x550b, (q15_t)0xa057, (q15_t)0x5507, (q15_t)0xa053,
-  (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54fd, (q15_t)0xa04b, (q15_t)0x54f9, (q15_t)0xa046, (q15_t)0x54f4, (q15_t)0xa042,
-  (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54ea, (q15_t)0xa03a, (q15_t)0x54e6, (q15_t)0xa036, (q15_t)0x54e1, (q15_t)0xa032,
-  (q15_t)0x54dc, (q15_t)0xa02d, (q15_t)0x54d8, (q15_t)0xa029, (q15_t)0x54d3, (q15_t)0xa025, (q15_t)0x54ce, (q15_t)0xa021,
-  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54c5, (q15_t)0xa019, (q15_t)0x54c0, (q15_t)0xa014, (q15_t)0x54bb, (q15_t)0xa010,
-  (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54b2, (q15_t)0xa008, (q15_t)0x54ad, (q15_t)0xa004, (q15_t)0x54a9, (q15_t)0xa000,
-  (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x549f, (q15_t)0x9ff7, (q15_t)0x549a, (q15_t)0x9ff3, (q15_t)0x5496, (q15_t)0x9fef,
-  (q15_t)0x5491, (q15_t)0x9feb, (q15_t)0x548c, (q15_t)0x9fe7, (q15_t)0x5488, (q15_t)0x9fe3, (q15_t)0x5483, (q15_t)0x9fde,
-  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5479, (q15_t)0x9fd6, (q15_t)0x5475, (q15_t)0x9fd2, (q15_t)0x5470, (q15_t)0x9fce,
-  (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5467, (q15_t)0x9fc6, (q15_t)0x5462, (q15_t)0x9fc1, (q15_t)0x545d, (q15_t)0x9fbd,
-  (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5454, (q15_t)0x9fb5, (q15_t)0x544f, (q15_t)0x9fb1, (q15_t)0x544a, (q15_t)0x9fad,
-  (q15_t)0x5445, (q15_t)0x9fa9, (q15_t)0x5441, (q15_t)0x9fa4, (q15_t)0x543c, (q15_t)0x9fa0, (q15_t)0x5437, (q15_t)0x9f9c,
-  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x542e, (q15_t)0x9f94, (q15_t)0x5429, (q15_t)0x9f90, (q15_t)0x5424, (q15_t)0x9f8c,
-  (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x541b, (q15_t)0x9f83, (q15_t)0x5416, (q15_t)0x9f7f, (q15_t)0x5411, (q15_t)0x9f7b,
-  (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x5408, (q15_t)0x9f73, (q15_t)0x5403, (q15_t)0x9f6f, (q15_t)0x53fe, (q15_t)0x9f6b,
-  (q15_t)0x53fa, (q15_t)0x9f67, (q15_t)0x53f5, (q15_t)0x9f62, (q15_t)0x53f0, (q15_t)0x9f5e, (q15_t)0x53eb, (q15_t)0x9f5a,
-  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53e2, (q15_t)0x9f52, (q15_t)0x53dd, (q15_t)0x9f4e, (q15_t)0x53d8, (q15_t)0x9f4a,
-  (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53cf, (q15_t)0x9f41, (q15_t)0x53ca, (q15_t)0x9f3d, (q15_t)0x53c5, (q15_t)0x9f39,
-  (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53bc, (q15_t)0x9f31, (q15_t)0x53b7, (q15_t)0x9f2d, (q15_t)0x53b2, (q15_t)0x9f29,
-  (q15_t)0x53ae, (q15_t)0x9f25, (q15_t)0x53a9, (q15_t)0x9f21, (q15_t)0x53a4, (q15_t)0x9f1c, (q15_t)0x539f, (q15_t)0x9f18,
-  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5396, (q15_t)0x9f10, (q15_t)0x5391, (q15_t)0x9f0c, (q15_t)0x538c, (q15_t)0x9f08,
-  (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5383, (q15_t)0x9f00, (q15_t)0x537e, (q15_t)0x9efc, (q15_t)0x5379, (q15_t)0x9ef8,
-  (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5370, (q15_t)0x9eef, (q15_t)0x536b, (q15_t)0x9eeb, (q15_t)0x5366, (q15_t)0x9ee7,
-  (q15_t)0x5362, (q15_t)0x9ee3, (q15_t)0x535d, (q15_t)0x9edf, (q15_t)0x5358, (q15_t)0x9edb, (q15_t)0x5353, (q15_t)0x9ed7,
-  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x534a, (q15_t)0x9ecf, (q15_t)0x5345, (q15_t)0x9ecb, (q15_t)0x5340, (q15_t)0x9ec6,
-  (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5337, (q15_t)0x9ebe, (q15_t)0x5332, (q15_t)0x9eba, (q15_t)0x532d, (q15_t)0x9eb6,
-  (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5323, (q15_t)0x9eae, (q15_t)0x531f, (q15_t)0x9eaa, (q15_t)0x531a, (q15_t)0x9ea6,
-  (q15_t)0x5315, (q15_t)0x9ea2, (q15_t)0x5310, (q15_t)0x9e9e, (q15_t)0x530c, (q15_t)0x9e9a, (q15_t)0x5307, (q15_t)0x9e95,
-  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52fd, (q15_t)0x9e8d, (q15_t)0x52f8, (q15_t)0x9e89, (q15_t)0x52f4, (q15_t)0x9e85,
-  (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52ea, (q15_t)0x9e7d, (q15_t)0x52e5, (q15_t)0x9e79, (q15_t)0x52e1, (q15_t)0x9e75,
-  (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52d7, (q15_t)0x9e6d, (q15_t)0x52d2, (q15_t)0x9e69, (q15_t)0x52cd, (q15_t)0x9e65,
-  (q15_t)0x52c9, (q15_t)0x9e61, (q15_t)0x52c4, (q15_t)0x9e5d, (q15_t)0x52bf, (q15_t)0x9e58, (q15_t)0x52ba, (q15_t)0x9e54,
-  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52b1, (q15_t)0x9e4c, (q15_t)0x52ac, (q15_t)0x9e48, (q15_t)0x52a7, (q15_t)0x9e44,
-  (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x529d, (q15_t)0x9e3c, (q15_t)0x5299, (q15_t)0x9e38, (q15_t)0x5294, (q15_t)0x9e34,
-  (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x528a, (q15_t)0x9e2c, (q15_t)0x5285, (q15_t)0x9e28, (q15_t)0x5281, (q15_t)0x9e24,
-  (q15_t)0x527c, (q15_t)0x9e20, (q15_t)0x5277, (q15_t)0x9e1c, (q15_t)0x5272, (q15_t)0x9e18, (q15_t)0x526d, (q15_t)0x9e14,
-  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5264, (q15_t)0x9e0b, (q15_t)0x525f, (q15_t)0x9e07, (q15_t)0x525a, (q15_t)0x9e03,
-  (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5251, (q15_t)0x9dfb, (q15_t)0x524c, (q15_t)0x9df7, (q15_t)0x5247, (q15_t)0x9df3,
-  (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x523d, (q15_t)0x9deb, (q15_t)0x5238, (q15_t)0x9de7, (q15_t)0x5234, (q15_t)0x9de3,
-  (q15_t)0x522f, (q15_t)0x9ddf, (q15_t)0x522a, (q15_t)0x9ddb, (q15_t)0x5225, (q15_t)0x9dd7, (q15_t)0x5220, (q15_t)0x9dd3,
-  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5217, (q15_t)0x9dcb, (q15_t)0x5212, (q15_t)0x9dc7, (q15_t)0x520d, (q15_t)0x9dc3,
-  (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x5203, (q15_t)0x9dbb, (q15_t)0x51ff, (q15_t)0x9db7, (q15_t)0x51fa, (q15_t)0x9db3,
-  (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51f0, (q15_t)0x9dab, (q15_t)0x51eb, (q15_t)0x9da7, (q15_t)0x51e6, (q15_t)0x9da3,
-  (q15_t)0x51e2, (q15_t)0x9d9f, (q15_t)0x51dd, (q15_t)0x9d9b, (q15_t)0x51d8, (q15_t)0x9d97, (q15_t)0x51d3, (q15_t)0x9d93,
-  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51c9, (q15_t)0x9d8b, (q15_t)0x51c5, (q15_t)0x9d86, (q15_t)0x51c0, (q15_t)0x9d82,
-  (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51b6, (q15_t)0x9d7a, (q15_t)0x51b1, (q15_t)0x9d76, (q15_t)0x51ac, (q15_t)0x9d72,
-  (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x51a3, (q15_t)0x9d6a, (q15_t)0x519e, (q15_t)0x9d66, (q15_t)0x5199, (q15_t)0x9d62,
-  (q15_t)0x5194, (q15_t)0x9d5e, (q15_t)0x518f, (q15_t)0x9d5a, (q15_t)0x518b, (q15_t)0x9d56, (q15_t)0x5186, (q15_t)0x9d52,
-  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x517c, (q15_t)0x9d4a, (q15_t)0x5177, (q15_t)0x9d46, (q15_t)0x5172, (q15_t)0x9d42,
-  (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x5169, (q15_t)0x9d3a, (q15_t)0x5164, (q15_t)0x9d36, (q15_t)0x515f, (q15_t)0x9d32,
-  (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5155, (q15_t)0x9d2a, (q15_t)0x5150, (q15_t)0x9d26, (q15_t)0x514c, (q15_t)0x9d22,
-  (q15_t)0x5147, (q15_t)0x9d1e, (q15_t)0x5142, (q15_t)0x9d1a, (q15_t)0x513d, (q15_t)0x9d16, (q15_t)0x5138, (q15_t)0x9d12,
-  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x512e, (q15_t)0x9d0b, (q15_t)0x512a, (q15_t)0x9d07, (q15_t)0x5125, (q15_t)0x9d03,
-  (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x511b, (q15_t)0x9cfb, (q15_t)0x5116, (q15_t)0x9cf7, (q15_t)0x5111, (q15_t)0x9cf3,
-  (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x5108, (q15_t)0x9ceb, (q15_t)0x5103, (q15_t)0x9ce7, (q15_t)0x50fe, (q15_t)0x9ce3,
-  (q15_t)0x50f9, (q15_t)0x9cdf, (q15_t)0x50f4, (q15_t)0x9cdb, (q15_t)0x50ef, (q15_t)0x9cd7, (q15_t)0x50ea, (q15_t)0x9cd3,
-  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50e1, (q15_t)0x9ccb, (q15_t)0x50dc, (q15_t)0x9cc7, (q15_t)0x50d7, (q15_t)0x9cc3,
-  (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50cd, (q15_t)0x9cbb, (q15_t)0x50c8, (q15_t)0x9cb7, (q15_t)0x50c3, (q15_t)0x9cb3,
-  (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ba, (q15_t)0x9cab, (q15_t)0x50b5, (q15_t)0x9ca7, (q15_t)0x50b0, (q15_t)0x9ca3,
-  (q15_t)0x50ab, (q15_t)0x9c9f, (q15_t)0x50a6, (q15_t)0x9c9b, (q15_t)0x50a1, (q15_t)0x9c97, (q15_t)0x509c, (q15_t)0x9c93,
-  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5093, (q15_t)0x9c8b, (q15_t)0x508e, (q15_t)0x9c88, (q15_t)0x5089, (q15_t)0x9c84,
-  (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x507f, (q15_t)0x9c7c, (q15_t)0x507a, (q15_t)0x9c78, (q15_t)0x5075, (q15_t)0x9c74,
-  (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x506c, (q15_t)0x9c6c, (q15_t)0x5067, (q15_t)0x9c68, (q15_t)0x5062, (q15_t)0x9c64,
-  (q15_t)0x505d, (q15_t)0x9c60, (q15_t)0x5058, (q15_t)0x9c5c, (q15_t)0x5053, (q15_t)0x9c58, (q15_t)0x504e, (q15_t)0x9c54,
-  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5044, (q15_t)0x9c4c, (q15_t)0x503f, (q15_t)0x9c48, (q15_t)0x503b, (q15_t)0x9c44,
-  (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5031, (q15_t)0x9c3d, (q15_t)0x502c, (q15_t)0x9c39, (q15_t)0x5027, (q15_t)0x9c35,
-  (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x501d, (q15_t)0x9c2d, (q15_t)0x5018, (q15_t)0x9c29, (q15_t)0x5013, (q15_t)0x9c25,
-  (q15_t)0x500f, (q15_t)0x9c21, (q15_t)0x500a, (q15_t)0x9c1d, (q15_t)0x5005, (q15_t)0x9c19, (q15_t)0x5000, (q15_t)0x9c15,
-  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ff6, (q15_t)0x9c0d, (q15_t)0x4ff1, (q15_t)0x9c09, (q15_t)0x4fec, (q15_t)0x9c06,
-  (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fe2, (q15_t)0x9bfe, (q15_t)0x4fdd, (q15_t)0x9bfa, (q15_t)0x4fd9, (q15_t)0x9bf6,
-  (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fcf, (q15_t)0x9bee, (q15_t)0x4fca, (q15_t)0x9bea, (q15_t)0x4fc5, (q15_t)0x9be6,
-  (q15_t)0x4fc0, (q15_t)0x9be2, (q15_t)0x4fbb, (q15_t)0x9bde, (q15_t)0x4fb6, (q15_t)0x9bda, (q15_t)0x4fb1, (q15_t)0x9bd7,
-  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4fa7, (q15_t)0x9bcf, (q15_t)0x4fa2, (q15_t)0x9bcb, (q15_t)0x4f9e, (q15_t)0x9bc7,
-  (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f94, (q15_t)0x9bbf, (q15_t)0x4f8f, (q15_t)0x9bbb, (q15_t)0x4f8a, (q15_t)0x9bb7,
-  (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f80, (q15_t)0x9baf, (q15_t)0x4f7b, (q15_t)0x9bac, (q15_t)0x4f76, (q15_t)0x9ba8,
-  (q15_t)0x4f71, (q15_t)0x9ba4, (q15_t)0x4f6c, (q15_t)0x9ba0, (q15_t)0x4f67, (q15_t)0x9b9c, (q15_t)0x4f62, (q15_t)0x9b98,
-  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f59, (q15_t)0x9b90, (q15_t)0x4f54, (q15_t)0x9b8c, (q15_t)0x4f4f, (q15_t)0x9b88,
-  (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f45, (q15_t)0x9b81, (q15_t)0x4f40, (q15_t)0x9b7d, (q15_t)0x4f3b, (q15_t)0x9b79,
-  (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f31, (q15_t)0x9b71, (q15_t)0x4f2c, (q15_t)0x9b6d, (q15_t)0x4f27, (q15_t)0x9b69,
-  (q15_t)0x4f22, (q15_t)0x9b65, (q15_t)0x4f1d, (q15_t)0x9b62, (q15_t)0x4f18, (q15_t)0x9b5e, (q15_t)0x4f14, (q15_t)0x9b5a,
-  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4f0a, (q15_t)0x9b52, (q15_t)0x4f05, (q15_t)0x9b4e, (q15_t)0x4f00, (q15_t)0x9b4a,
-  (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ef6, (q15_t)0x9b43, (q15_t)0x4ef1, (q15_t)0x9b3f, (q15_t)0x4eec, (q15_t)0x9b3b,
-  (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ee2, (q15_t)0x9b33, (q15_t)0x4edd, (q15_t)0x9b2f, (q15_t)0x4ed8, (q15_t)0x9b2b,
-  (q15_t)0x4ed3, (q15_t)0x9b27, (q15_t)0x4ece, (q15_t)0x9b24, (q15_t)0x4ec9, (q15_t)0x9b20, (q15_t)0x4ec4, (q15_t)0x9b1c,
-  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eba, (q15_t)0x9b14, (q15_t)0x4eb6, (q15_t)0x9b10, (q15_t)0x4eb1, (q15_t)0x9b0c,
-  (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4ea7, (q15_t)0x9b05, (q15_t)0x4ea2, (q15_t)0x9b01, (q15_t)0x4e9d, (q15_t)0x9afd,
-  (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e93, (q15_t)0x9af5, (q15_t)0x4e8e, (q15_t)0x9af1, (q15_t)0x4e89, (q15_t)0x9aed,
-  (q15_t)0x4e84, (q15_t)0x9aea, (q15_t)0x4e7f, (q15_t)0x9ae6, (q15_t)0x4e7a, (q15_t)0x9ae2, (q15_t)0x4e75, (q15_t)0x9ade,
-  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e6b, (q15_t)0x9ad6, (q15_t)0x4e66, (q15_t)0x9ad3, (q15_t)0x4e61, (q15_t)0x9acf,
-  (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e57, (q15_t)0x9ac7, (q15_t)0x4e52, (q15_t)0x9ac3, (q15_t)0x4e4d, (q15_t)0x9abf,
-  (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e43, (q15_t)0x9ab8, (q15_t)0x4e3e, (q15_t)0x9ab4, (q15_t)0x4e39, (q15_t)0x9ab0,
-  (q15_t)0x4e34, (q15_t)0x9aac, (q15_t)0x4e2f, (q15_t)0x9aa8, (q15_t)0x4e2a, (q15_t)0x9aa4, (q15_t)0x4e26, (q15_t)0x9aa1,
-  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e1c, (q15_t)0x9a99, (q15_t)0x4e17, (q15_t)0x9a95, (q15_t)0x4e12, (q15_t)0x9a91,
-  (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4e08, (q15_t)0x9a8a, (q15_t)0x4e03, (q15_t)0x9a86, (q15_t)0x4dfe, (q15_t)0x9a82,
-  (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4df4, (q15_t)0x9a7a, (q15_t)0x4def, (q15_t)0x9a76, (q15_t)0x4dea, (q15_t)0x9a73,
-  (q15_t)0x4de5, (q15_t)0x9a6f, (q15_t)0x4de0, (q15_t)0x9a6b, (q15_t)0x4ddb, (q15_t)0x9a67, (q15_t)0x4dd6, (q15_t)0x9a63,
-  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dcc, (q15_t)0x9a5c, (q15_t)0x4dc7, (q15_t)0x9a58, (q15_t)0x4dc2, (q15_t)0x9a54,
-  (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4db8, (q15_t)0x9a4c, (q15_t)0x4db3, (q15_t)0x9a49, (q15_t)0x4dae, (q15_t)0x9a45,
-  (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4da4, (q15_t)0x9a3d, (q15_t)0x4d9f, (q15_t)0x9a39, (q15_t)0x4d9a, (q15_t)0x9a36,
-  (q15_t)0x4d95, (q15_t)0x9a32, (q15_t)0x4d90, (q15_t)0x9a2e, (q15_t)0x4d8b, (q15_t)0x9a2a, (q15_t)0x4d86, (q15_t)0x9a26,
-  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d7c, (q15_t)0x9a1f, (q15_t)0x4d77, (q15_t)0x9a1b, (q15_t)0x4d72, (q15_t)0x9a17,
-  (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d68, (q15_t)0x9a10, (q15_t)0x4d63, (q15_t)0x9a0c, (q15_t)0x4d5e, (q15_t)0x9a08,
-  (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d54, (q15_t)0x9a00, (q15_t)0x4d4f, (q15_t)0x99fd, (q15_t)0x4d4a, (q15_t)0x99f9,
-  (q15_t)0x4d45, (q15_t)0x99f5, (q15_t)0x4d40, (q15_t)0x99f1, (q15_t)0x4d3b, (q15_t)0x99ed, (q15_t)0x4d36, (q15_t)0x99ea,
-  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d2c, (q15_t)0x99e2, (q15_t)0x4d27, (q15_t)0x99de, (q15_t)0x4d22, (q15_t)0x99da,
-  (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d18, (q15_t)0x99d3, (q15_t)0x4d13, (q15_t)0x99cf, (q15_t)0x4d0e, (q15_t)0x99cb,
-  (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4d04, (q15_t)0x99c4, (q15_t)0x4cff, (q15_t)0x99c0, (q15_t)0x4cfa, (q15_t)0x99bc,
-  (q15_t)0x4cf5, (q15_t)0x99b8, (q15_t)0x4cf0, (q15_t)0x99b5, (q15_t)0x4ceb, (q15_t)0x99b1, (q15_t)0x4ce6, (q15_t)0x99ad,
-  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4cdb, (q15_t)0x99a5, (q15_t)0x4cd6, (q15_t)0x99a2, (q15_t)0x4cd1, (q15_t)0x999e,
-  (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cc7, (q15_t)0x9996, (q15_t)0x4cc2, (q15_t)0x9993, (q15_t)0x4cbd, (q15_t)0x998f,
-  (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4cb3, (q15_t)0x9987, (q15_t)0x4cae, (q15_t)0x9984, (q15_t)0x4ca9, (q15_t)0x9980,
-  (q15_t)0x4ca4, (q15_t)0x997c, (q15_t)0x4c9f, (q15_t)0x9978, (q15_t)0x4c9a, (q15_t)0x9975, (q15_t)0x4c95, (q15_t)0x9971,
-  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c8b, (q15_t)0x9969, (q15_t)0x4c86, (q15_t)0x9965, (q15_t)0x4c81, (q15_t)0x9962,
-  (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c77, (q15_t)0x995a, (q15_t)0x4c72, (q15_t)0x9956, (q15_t)0x4c6d, (q15_t)0x9953,
-  (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c63, (q15_t)0x994b, (q15_t)0x4c5e, (q15_t)0x9947, (q15_t)0x4c59, (q15_t)0x9944,
-  (q15_t)0x4c54, (q15_t)0x9940, (q15_t)0x4c4f, (q15_t)0x993c, (q15_t)0x4c49, (q15_t)0x9938, (q15_t)0x4c44, (q15_t)0x9935,
-  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c3a, (q15_t)0x992d, (q15_t)0x4c35, (q15_t)0x992a, (q15_t)0x4c30, (q15_t)0x9926,
-  (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c26, (q15_t)0x991e, (q15_t)0x4c21, (q15_t)0x991b, (q15_t)0x4c1c, (q15_t)0x9917,
-  (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c12, (q15_t)0x990f, (q15_t)0x4c0d, (q15_t)0x990c, (q15_t)0x4c08, (q15_t)0x9908,
-  (q15_t)0x4c03, (q15_t)0x9904, (q15_t)0x4bfe, (q15_t)0x9900, (q15_t)0x4bf9, (q15_t)0x98fd, (q15_t)0x4bf4, (q15_t)0x98f9,
-  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4be9, (q15_t)0x98f2, (q15_t)0x4be4, (q15_t)0x98ee, (q15_t)0x4bdf, (q15_t)0x98ea,
-  (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bd5, (q15_t)0x98e3, (q15_t)0x4bd0, (q15_t)0x98df, (q15_t)0x4bcb, (q15_t)0x98db,
-  (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bc1, (q15_t)0x98d4, (q15_t)0x4bbc, (q15_t)0x98d0, (q15_t)0x4bb7, (q15_t)0x98cc,
-  (q15_t)0x4bb2, (q15_t)0x98c9, (q15_t)0x4bad, (q15_t)0x98c5, (q15_t)0x4ba8, (q15_t)0x98c1, (q15_t)0x4ba3, (q15_t)0x98bd,
-  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b98, (q15_t)0x98b6, (q15_t)0x4b93, (q15_t)0x98b2, (q15_t)0x4b8e, (q15_t)0x98af,
-  (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b84, (q15_t)0x98a7, (q15_t)0x4b7f, (q15_t)0x98a3, (q15_t)0x4b7a, (q15_t)0x98a0,
-  (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b70, (q15_t)0x9898, (q15_t)0x4b6b, (q15_t)0x9895, (q15_t)0x4b66, (q15_t)0x9891,
-  (q15_t)0x4b61, (q15_t)0x988d, (q15_t)0x4b5c, (q15_t)0x988a, (q15_t)0x4b56, (q15_t)0x9886, (q15_t)0x4b51, (q15_t)0x9882,
-  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b47, (q15_t)0x987b, (q15_t)0x4b42, (q15_t)0x9877, (q15_t)0x4b3d, (q15_t)0x9873,
-  (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b33, (q15_t)0x986c, (q15_t)0x4b2e, (q15_t)0x9868, (q15_t)0x4b29, (q15_t)0x9865,
-  (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b1f, (q15_t)0x985d, (q15_t)0x4b19, (q15_t)0x985a, (q15_t)0x4b14, (q15_t)0x9856,
-  (q15_t)0x4b0f, (q15_t)0x9852, (q15_t)0x4b0a, (q15_t)0x984e, (q15_t)0x4b05, (q15_t)0x984b, (q15_t)0x4b00, (q15_t)0x9847,
-  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4af6, (q15_t)0x9840, (q15_t)0x4af1, (q15_t)0x983c, (q15_t)0x4aec, (q15_t)0x9838,
-  (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ae1, (q15_t)0x9831, (q15_t)0x4adc, (q15_t)0x982d, (q15_t)0x4ad7, (q15_t)0x982a,
-  (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4acd, (q15_t)0x9822, (q15_t)0x4ac8, (q15_t)0x981f, (q15_t)0x4ac3, (q15_t)0x981b,
-  (q15_t)0x4abe, (q15_t)0x9817, (q15_t)0x4ab9, (q15_t)0x9814, (q15_t)0x4ab4, (q15_t)0x9810, (q15_t)0x4aae, (q15_t)0x980c,
-  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4aa4, (q15_t)0x9805, (q15_t)0x4a9f, (q15_t)0x9801, (q15_t)0x4a9a, (q15_t)0x97fe,
-  (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a90, (q15_t)0x97f6, (q15_t)0x4a8b, (q15_t)0x97f3, (q15_t)0x4a86, (q15_t)0x97ef,
-  (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a7b, (q15_t)0x97e8, (q15_t)0x4a76, (q15_t)0x97e4, (q15_t)0x4a71, (q15_t)0x97e0,
-  (q15_t)0x4a6c, (q15_t)0x97dd, (q15_t)0x4a67, (q15_t)0x97d9, (q15_t)0x4a62, (q15_t)0x97d5, (q15_t)0x4a5d, (q15_t)0x97d2,
-  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a52, (q15_t)0x97cb, (q15_t)0x4a4d, (q15_t)0x97c7, (q15_t)0x4a48, (q15_t)0x97c3,
-  (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a3e, (q15_t)0x97bc, (q15_t)0x4a39, (q15_t)0x97b8, (q15_t)0x4a34, (q15_t)0x97b5,
-  (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a2a, (q15_t)0x97ad, (q15_t)0x4a24, (q15_t)0x97aa, (q15_t)0x4a1f, (q15_t)0x97a6,
-  (q15_t)0x4a1a, (q15_t)0x97a2, (q15_t)0x4a15, (q15_t)0x979f, (q15_t)0x4a10, (q15_t)0x979b, (q15_t)0x4a0b, (q15_t)0x9798,
-  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x4a01, (q15_t)0x9790, (q15_t)0x49fb, (q15_t)0x978d, (q15_t)0x49f6, (q15_t)0x9789,
-  (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49ec, (q15_t)0x9782, (q15_t)0x49e7, (q15_t)0x977e, (q15_t)0x49e2, (q15_t)0x977a,
-  (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49d8, (q15_t)0x9773, (q15_t)0x49d2, (q15_t)0x9770, (q15_t)0x49cd, (q15_t)0x976c,
-  (q15_t)0x49c8, (q15_t)0x9768, (q15_t)0x49c3, (q15_t)0x9765, (q15_t)0x49be, (q15_t)0x9761, (q15_t)0x49b9, (q15_t)0x975d,
-  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x49ae, (q15_t)0x9756, (q15_t)0x49a9, (q15_t)0x9753, (q15_t)0x49a4, (q15_t)0x974f,
-  (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x499a, (q15_t)0x9748, (q15_t)0x4995, (q15_t)0x9744, (q15_t)0x4990, (q15_t)0x9741,
-  (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4985, (q15_t)0x9739, (q15_t)0x4980, (q15_t)0x9736, (q15_t)0x497b, (q15_t)0x9732,
-  (q15_t)0x4976, (q15_t)0x972f, (q15_t)0x4971, (q15_t)0x972b, (q15_t)0x496c, (q15_t)0x9727, (q15_t)0x4966, (q15_t)0x9724,
-  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x495c, (q15_t)0x971d, (q15_t)0x4957, (q15_t)0x9719, (q15_t)0x4952, (q15_t)0x9715,
-  (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4948, (q15_t)0x970e, (q15_t)0x4942, (q15_t)0x970b, (q15_t)0x493d, (q15_t)0x9707,
-  (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4933, (q15_t)0x9700, (q15_t)0x492e, (q15_t)0x96fc, (q15_t)0x4929, (q15_t)0x96f9,
-  (q15_t)0x4923, (q15_t)0x96f5, (q15_t)0x491e, (q15_t)0x96f1, (q15_t)0x4919, (q15_t)0x96ee, (q15_t)0x4914, (q15_t)0x96ea,
-  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x490a, (q15_t)0x96e3, (q15_t)0x4905, (q15_t)0x96df, (q15_t)0x48ff, (q15_t)0x96dc,
-  (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48f5, (q15_t)0x96d5, (q15_t)0x48f0, (q15_t)0x96d1, (q15_t)0x48eb, (q15_t)0x96ce,
-  (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48e0, (q15_t)0x96c6, (q15_t)0x48db, (q15_t)0x96c3, (q15_t)0x48d6, (q15_t)0x96bf,
-  (q15_t)0x48d1, (q15_t)0x96bc, (q15_t)0x48cc, (q15_t)0x96b8, (q15_t)0x48c7, (q15_t)0x96b5, (q15_t)0x48c1, (q15_t)0x96b1,
-  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48b7, (q15_t)0x96aa, (q15_t)0x48b2, (q15_t)0x96a6, (q15_t)0x48ad, (q15_t)0x96a3,
-  (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x48a2, (q15_t)0x969c, (q15_t)0x489d, (q15_t)0x9698, (q15_t)0x4898, (q15_t)0x9694,
-  (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x488e, (q15_t)0x968d, (q15_t)0x4888, (q15_t)0x968a, (q15_t)0x4883, (q15_t)0x9686,
-  (q15_t)0x487e, (q15_t)0x9683, (q15_t)0x4879, (q15_t)0x967f, (q15_t)0x4874, (q15_t)0x967b, (q15_t)0x486f, (q15_t)0x9678,
-  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4864, (q15_t)0x9671, (q15_t)0x485f, (q15_t)0x966d, (q15_t)0x485a, (q15_t)0x966a,
-  (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x484f, (q15_t)0x9663, (q15_t)0x484a, (q15_t)0x965f, (q15_t)0x4845, (q15_t)0x965b,
-  (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x483b, (q15_t)0x9654, (q15_t)0x4836, (q15_t)0x9651, (q15_t)0x4830, (q15_t)0x964d,
-  (q15_t)0x482b, (q15_t)0x964a, (q15_t)0x4826, (q15_t)0x9646, (q15_t)0x4821, (q15_t)0x9643, (q15_t)0x481c, (q15_t)0x963f,
-  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4811, (q15_t)0x9638, (q15_t)0x480c, (q15_t)0x9635, (q15_t)0x4807, (q15_t)0x9631,
-  (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47fc, (q15_t)0x962a, (q15_t)0x47f7, (q15_t)0x9626, (q15_t)0x47f2, (q15_t)0x9623,
-  (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47e8, (q15_t)0x961c, (q15_t)0x47e2, (q15_t)0x9618, (q15_t)0x47dd, (q15_t)0x9615,
-  (q15_t)0x47d8, (q15_t)0x9611, (q15_t)0x47d3, (q15_t)0x960e, (q15_t)0x47ce, (q15_t)0x960a, (q15_t)0x47c8, (q15_t)0x9607,
-  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47be, (q15_t)0x9600, (q15_t)0x47b9, (q15_t)0x95fc, (q15_t)0x47b4, (q15_t)0x95f9,
-  (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x47a9, (q15_t)0x95f2, (q15_t)0x47a4, (q15_t)0x95ee, (q15_t)0x479f, (q15_t)0x95ea,
-  (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4794, (q15_t)0x95e3, (q15_t)0x478f, (q15_t)0x95e0, (q15_t)0x478a, (q15_t)0x95dc,
-  (q15_t)0x4785, (q15_t)0x95d9, (q15_t)0x4780, (q15_t)0x95d5, (q15_t)0x477a, (q15_t)0x95d2, (q15_t)0x4775, (q15_t)0x95ce,
-  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x476b, (q15_t)0x95c7, (q15_t)0x4765, (q15_t)0x95c4, (q15_t)0x4760, (q15_t)0x95c0,
-  (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4756, (q15_t)0x95b9, (q15_t)0x4751, (q15_t)0x95b6, (q15_t)0x474b, (q15_t)0x95b2,
-  (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4741, (q15_t)0x95ab, (q15_t)0x473c, (q15_t)0x95a8, (q15_t)0x4737, (q15_t)0x95a4,
-  (q15_t)0x4731, (q15_t)0x95a1, (q15_t)0x472c, (q15_t)0x959d, (q15_t)0x4727, (q15_t)0x959a, (q15_t)0x4722, (q15_t)0x9596,
-  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4717, (q15_t)0x958f, (q15_t)0x4712, (q15_t)0x958c, (q15_t)0x470d, (q15_t)0x9588,
-  (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x4702, (q15_t)0x9581, (q15_t)0x46fd, (q15_t)0x957e, (q15_t)0x46f8, (q15_t)0x957a,
-  (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46ed, (q15_t)0x9574, (q15_t)0x46e8, (q15_t)0x9570, (q15_t)0x46e3, (q15_t)0x956d,
-  (q15_t)0x46de, (q15_t)0x9569, (q15_t)0x46d8, (q15_t)0x9566, (q15_t)0x46d3, (q15_t)0x9562, (q15_t)0x46ce, (q15_t)0x955f,
-  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46c4, (q15_t)0x9558, (q15_t)0x46be, (q15_t)0x9554, (q15_t)0x46b9, (q15_t)0x9551,
-  (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x46af, (q15_t)0x954a, (q15_t)0x46a9, (q15_t)0x9546, (q15_t)0x46a4, (q15_t)0x9543,
-  (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x469a, (q15_t)0x953c, (q15_t)0x4694, (q15_t)0x9538, (q15_t)0x468f, (q15_t)0x9535,
-  (q15_t)0x468a, (q15_t)0x9532, (q15_t)0x4685, (q15_t)0x952e, (q15_t)0x467f, (q15_t)0x952b, (q15_t)0x467a, (q15_t)0x9527,
-  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4670, (q15_t)0x9520, (q15_t)0x466a, (q15_t)0x951d, (q15_t)0x4665, (q15_t)0x9519,
-  (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x465b, (q15_t)0x9512, (q15_t)0x4655, (q15_t)0x950f, (q15_t)0x4650, (q15_t)0x950c,
-  (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4646, (q15_t)0x9505, (q15_t)0x4640, (q15_t)0x9501, (q15_t)0x463b, (q15_t)0x94fe,
-  (q15_t)0x4636, (q15_t)0x94fa, (q15_t)0x4631, (q15_t)0x94f7, (q15_t)0x462b, (q15_t)0x94f3, (q15_t)0x4626, (q15_t)0x94f0,
-  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x461c, (q15_t)0x94e9, (q15_t)0x4616, (q15_t)0x94e6, (q15_t)0x4611, (q15_t)0x94e2,
-  (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x4607, (q15_t)0x94db, (q15_t)0x4601, (q15_t)0x94d8, (q15_t)0x45fc, (q15_t)0x94d4,
-  (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45f2, (q15_t)0x94ce, (q15_t)0x45ec, (q15_t)0x94ca, (q15_t)0x45e7, (q15_t)0x94c7,
-  (q15_t)0x45e2, (q15_t)0x94c3, (q15_t)0x45dd, (q15_t)0x94c0, (q15_t)0x45d7, (q15_t)0x94bc, (q15_t)0x45d2, (q15_t)0x94b9,
-  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45c7, (q15_t)0x94b2, (q15_t)0x45c2, (q15_t)0x94af, (q15_t)0x45bd, (q15_t)0x94ab,
-  (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45b2, (q15_t)0x94a4, (q15_t)0x45ad, (q15_t)0x94a1, (q15_t)0x45a8, (q15_t)0x949e,
-  (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x459d, (q15_t)0x9497, (q15_t)0x4598, (q15_t)0x9493, (q15_t)0x4593, (q15_t)0x9490,
-  (q15_t)0x458d, (q15_t)0x948d, (q15_t)0x4588, (q15_t)0x9489, (q15_t)0x4583, (q15_t)0x9486, (q15_t)0x457e, (q15_t)0x9482,
-  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4573, (q15_t)0x947b, (q15_t)0x456e, (q15_t)0x9478, (q15_t)0x4569, (q15_t)0x9475,
-  (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x455e, (q15_t)0x946e, (q15_t)0x4559, (q15_t)0x946a, (q15_t)0x4553, (q15_t)0x9467,
-  (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4549, (q15_t)0x9460, (q15_t)0x4544, (q15_t)0x945d, (q15_t)0x453e, (q15_t)0x9459,
-  (q15_t)0x4539, (q15_t)0x9456, (q15_t)0x4534, (q15_t)0x9453, (q15_t)0x452e, (q15_t)0x944f, (q15_t)0x4529, (q15_t)0x944c,
-  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x451f, (q15_t)0x9445, (q15_t)0x4519, (q15_t)0x9442, (q15_t)0x4514, (q15_t)0x943e,
-  (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x4509, (q15_t)0x9437, (q15_t)0x4504, (q15_t)0x9434, (q15_t)0x44ff, (q15_t)0x9431,
-  (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44f4, (q15_t)0x942a, (q15_t)0x44ef, (q15_t)0x9427, (q15_t)0x44ea, (q15_t)0x9423,
-  (q15_t)0x44e4, (q15_t)0x9420, (q15_t)0x44df, (q15_t)0x941c, (q15_t)0x44da, (q15_t)0x9419, (q15_t)0x44d4, (q15_t)0x9416,
-  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ca, (q15_t)0x940f, (q15_t)0x44c5, (q15_t)0x940b, (q15_t)0x44bf, (q15_t)0x9408,
-  (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44b5, (q15_t)0x9401, (q15_t)0x44af, (q15_t)0x93fe, (q15_t)0x44aa, (q15_t)0x93fb,
-  (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x449f, (q15_t)0x93f4, (q15_t)0x449a, (q15_t)0x93f1, (q15_t)0x4495, (q15_t)0x93ed,
-  (q15_t)0x4490, (q15_t)0x93ea, (q15_t)0x448a, (q15_t)0x93e6, (q15_t)0x4485, (q15_t)0x93e3, (q15_t)0x4480, (q15_t)0x93e0,
-  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4475, (q15_t)0x93d9, (q15_t)0x4470, (q15_t)0x93d6, (q15_t)0x446a, (q15_t)0x93d2,
-  (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4460, (q15_t)0x93cc, (q15_t)0x445a, (q15_t)0x93c8, (q15_t)0x4455, (q15_t)0x93c5,
-  (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x444b, (q15_t)0x93be, (q15_t)0x4445, (q15_t)0x93bb, (q15_t)0x4440, (q15_t)0x93b7,
-  (q15_t)0x443b, (q15_t)0x93b4, (q15_t)0x4435, (q15_t)0x93b1, (q15_t)0x4430, (q15_t)0x93ad, (q15_t)0x442b, (q15_t)0x93aa,
-  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4420, (q15_t)0x93a3, (q15_t)0x441b, (q15_t)0x93a0, (q15_t)0x4415, (q15_t)0x939d,
-  (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x440b, (q15_t)0x9396, (q15_t)0x4405, (q15_t)0x9393, (q15_t)0x4400, (q15_t)0x938f,
-  (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43f5, (q15_t)0x9389, (q15_t)0x43f0, (q15_t)0x9385, (q15_t)0x43eb, (q15_t)0x9382,
-  (q15_t)0x43e5, (q15_t)0x937f, (q15_t)0x43e0, (q15_t)0x937b, (q15_t)0x43db, (q15_t)0x9378, (q15_t)0x43d5, (q15_t)0x9375,
-  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43cb, (q15_t)0x936e, (q15_t)0x43c5, (q15_t)0x936b, (q15_t)0x43c0, (q15_t)0x9367,
-  (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43b5, (q15_t)0x9361, (q15_t)0x43b0, (q15_t)0x935d, (q15_t)0x43ab, (q15_t)0x935a,
-  (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x43a0, (q15_t)0x9353, (q15_t)0x439b, (q15_t)0x9350, (q15_t)0x4395, (q15_t)0x934d,
-  (q15_t)0x4390, (q15_t)0x9349, (q15_t)0x438b, (q15_t)0x9346, (q15_t)0x4385, (q15_t)0x9343, (q15_t)0x4380, (q15_t)0x933f,
-  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4375, (q15_t)0x9339, (q15_t)0x4370, (q15_t)0x9336, (q15_t)0x436b, (q15_t)0x9332,
-  (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4360, (q15_t)0x932c, (q15_t)0x435b, (q15_t)0x9328, (q15_t)0x4355, (q15_t)0x9325,
-  (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x434b, (q15_t)0x931e, (q15_t)0x4345, (q15_t)0x931b, (q15_t)0x4340, (q15_t)0x9318,
-  (q15_t)0x433b, (q15_t)0x9314, (q15_t)0x4335, (q15_t)0x9311, (q15_t)0x4330, (q15_t)0x930e, (q15_t)0x432b, (q15_t)0x930b,
-  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4320, (q15_t)0x9304, (q15_t)0x431b, (q15_t)0x9301, (q15_t)0x4315, (q15_t)0x92fd,
-  (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x430b, (q15_t)0x92f7, (q15_t)0x4305, (q15_t)0x92f4, (q15_t)0x4300, (q15_t)0x92f0,
-  (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42f5, (q15_t)0x92ea, (q15_t)0x42f0, (q15_t)0x92e6, (q15_t)0x42ea, (q15_t)0x92e3,
-  (q15_t)0x42e5, (q15_t)0x92e0, (q15_t)0x42e0, (q15_t)0x92dd, (q15_t)0x42da, (q15_t)0x92d9, (q15_t)0x42d5, (q15_t)0x92d6,
-  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ca, (q15_t)0x92cf, (q15_t)0x42c5, (q15_t)0x92cc, (q15_t)0x42c0, (q15_t)0x92c9,
-  (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42b5, (q15_t)0x92c2, (q15_t)0x42af, (q15_t)0x92bf, (q15_t)0x42aa, (q15_t)0x92bc,
-  (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x429f, (q15_t)0x92b5, (q15_t)0x429a, (q15_t)0x92b2, (q15_t)0x4295, (q15_t)0x92af,
-  (q15_t)0x428f, (q15_t)0x92ab, (q15_t)0x428a, (q15_t)0x92a8, (q15_t)0x4284, (q15_t)0x92a5, (q15_t)0x427f, (q15_t)0x92a2,
-  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4274, (q15_t)0x929b, (q15_t)0x426f, (q15_t)0x9298, (q15_t)0x426a, (q15_t)0x9295,
-  (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x425f, (q15_t)0x928e, (q15_t)0x425a, (q15_t)0x928b, (q15_t)0x4254, (q15_t)0x9288,
-  (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4249, (q15_t)0x9281, (q15_t)0x4244, (q15_t)0x927e, (q15_t)0x423f, (q15_t)0x927b,
-  (q15_t)0x4239, (q15_t)0x9277, (q15_t)0x4234, (q15_t)0x9274, (q15_t)0x422f, (q15_t)0x9271, (q15_t)0x4229, (q15_t)0x926e,
-  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x421e, (q15_t)0x9267, (q15_t)0x4219, (q15_t)0x9264, (q15_t)0x4214, (q15_t)0x9261,
-  (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x4209, (q15_t)0x925a, (q15_t)0x4203, (q15_t)0x9257, (q15_t)0x41fe, (q15_t)0x9254,
-  (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41f3, (q15_t)0x924d, (q15_t)0x41ee, (q15_t)0x924a, (q15_t)0x41e9, (q15_t)0x9247,
-  (q15_t)0x41e3, (q15_t)0x9243, (q15_t)0x41de, (q15_t)0x9240, (q15_t)0x41d8, (q15_t)0x923d, (q15_t)0x41d3, (q15_t)0x923a,
-  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41c8, (q15_t)0x9233, (q15_t)0x41c3, (q15_t)0x9230, (q15_t)0x41bd, (q15_t)0x922d,
-  (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41b3, (q15_t)0x9226, (q15_t)0x41ad, (q15_t)0x9223, (q15_t)0x41a8, (q15_t)0x9220,
-  (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x419d, (q15_t)0x9219, (q15_t)0x4198, (q15_t)0x9216, (q15_t)0x4192, (q15_t)0x9213,
-  (q15_t)0x418d, (q15_t)0x9210, (q15_t)0x4188, (q15_t)0x920d, (q15_t)0x4182, (q15_t)0x9209, (q15_t)0x417d, (q15_t)0x9206,
-  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4172, (q15_t)0x9200, (q15_t)0x416d, (q15_t)0x91fc, (q15_t)0x4167, (q15_t)0x91f9,
-  (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x415c, (q15_t)0x91f3, (q15_t)0x4157, (q15_t)0x91f0, (q15_t)0x4152, (q15_t)0x91ec,
-  (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4147, (q15_t)0x91e6, (q15_t)0x4141, (q15_t)0x91e3, (q15_t)0x413c, (q15_t)0x91e0,
-  (q15_t)0x4136, (q15_t)0x91dc, (q15_t)0x4131, (q15_t)0x91d9, (q15_t)0x412c, (q15_t)0x91d6, (q15_t)0x4126, (q15_t)0x91d3,
-  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x411b, (q15_t)0x91cc, (q15_t)0x4116, (q15_t)0x91c9, (q15_t)0x4111, (q15_t)0x91c6,
-  (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x4106, (q15_t)0x91c0, (q15_t)0x4100, (q15_t)0x91bc, (q15_t)0x40fb, (q15_t)0x91b9,
-  (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40f0, (q15_t)0x91b3, (q15_t)0x40eb, (q15_t)0x91b0, (q15_t)0x40e5, (q15_t)0x91ad,
-  (q15_t)0x40e0, (q15_t)0x91a9, (q15_t)0x40da, (q15_t)0x91a6, (q15_t)0x40d5, (q15_t)0x91a3, (q15_t)0x40d0, (q15_t)0x91a0,
-  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40c5, (q15_t)0x9199, (q15_t)0x40bf, (q15_t)0x9196, (q15_t)0x40ba, (q15_t)0x9193,
-  (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x40af, (q15_t)0x918d, (q15_t)0x40aa, (q15_t)0x918a, (q15_t)0x40a4, (q15_t)0x9186,
-  (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4099, (q15_t)0x9180, (q15_t)0x4094, (q15_t)0x917d, (q15_t)0x408f, (q15_t)0x917a,
-  (q15_t)0x4089, (q15_t)0x9177, (q15_t)0x4084, (q15_t)0x9173, (q15_t)0x407e, (q15_t)0x9170, (q15_t)0x4079, (q15_t)0x916d,
-  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x406e, (q15_t)0x9167, (q15_t)0x4069, (q15_t)0x9164, (q15_t)0x4063, (q15_t)0x9160,
-  (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4058, (q15_t)0x915a, (q15_t)0x4053, (q15_t)0x9157, (q15_t)0x404d, (q15_t)0x9154,
-  (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4043, (q15_t)0x914d, (q15_t)0x403d, (q15_t)0x914a, (q15_t)0x4038, (q15_t)0x9147,
-  (q15_t)0x4032, (q15_t)0x9144, (q15_t)0x402d, (q15_t)0x9141, (q15_t)0x4027, (q15_t)0x913e, (q15_t)0x4022, (q15_t)0x913a,
-  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4017, (q15_t)0x9134, (q15_t)0x4012, (q15_t)0x9131, (q15_t)0x400c, (q15_t)0x912e,
-  (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x4001, (q15_t)0x9128, (q15_t)0x3ffc, (q15_t)0x9124, (q15_t)0x3ff6, (q15_t)0x9121,
-  (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fec, (q15_t)0x911b, (q15_t)0x3fe6, (q15_t)0x9118, (q15_t)0x3fe1, (q15_t)0x9115,
-  (q15_t)0x3fdb, (q15_t)0x9112, (q15_t)0x3fd6, (q15_t)0x910f, (q15_t)0x3fd0, (q15_t)0x910b, (q15_t)0x3fcb, (q15_t)0x9108,
-  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fc0, (q15_t)0x9102, (q15_t)0x3fbb, (q15_t)0x90ff, (q15_t)0x3fb5, (q15_t)0x90fc,
-  (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3faa, (q15_t)0x90f5, (q15_t)0x3fa5, (q15_t)0x90f2, (q15_t)0x3f9f, (q15_t)0x90ef,
-  (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f94, (q15_t)0x90e9, (q15_t)0x3f8f, (q15_t)0x90e6, (q15_t)0x3f89, (q15_t)0x90e3,
-  (q15_t)0x3f84, (q15_t)0x90e0, (q15_t)0x3f7f, (q15_t)0x90dd, (q15_t)0x3f79, (q15_t)0x90d9, (q15_t)0x3f74, (q15_t)0x90d6,
-  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f69, (q15_t)0x90d0, (q15_t)0x3f63, (q15_t)0x90cd, (q15_t)0x3f5e, (q15_t)0x90ca,
-  (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f53, (q15_t)0x90c4, (q15_t)0x3f4d, (q15_t)0x90c1, (q15_t)0x3f48, (q15_t)0x90bd,
-  (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f3d, (q15_t)0x90b7, (q15_t)0x3f38, (q15_t)0x90b4, (q15_t)0x3f32, (q15_t)0x90b1,
-  (q15_t)0x3f2d, (q15_t)0x90ae, (q15_t)0x3f27, (q15_t)0x90ab, (q15_t)0x3f22, (q15_t)0x90a8, (q15_t)0x3f1c, (q15_t)0x90a5,
-  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f11, (q15_t)0x909e, (q15_t)0x3f0c, (q15_t)0x909b, (q15_t)0x3f06, (q15_t)0x9098,
-  (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3efb, (q15_t)0x9092, (q15_t)0x3ef6, (q15_t)0x908f, (q15_t)0x3ef1, (q15_t)0x908c,
-  (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ee6, (q15_t)0x9086, (q15_t)0x3ee0, (q15_t)0x9083, (q15_t)0x3edb, (q15_t)0x907f,
-  (q15_t)0x3ed5, (q15_t)0x907c, (q15_t)0x3ed0, (q15_t)0x9079, (q15_t)0x3eca, (q15_t)0x9076, (q15_t)0x3ec5, (q15_t)0x9073,
-  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3eba, (q15_t)0x906d, (q15_t)0x3eb4, (q15_t)0x906a, (q15_t)0x3eaf, (q15_t)0x9067,
-  (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3ea4, (q15_t)0x9061, (q15_t)0x3e9e, (q15_t)0x905e, (q15_t)0x3e99, (q15_t)0x905b,
-  (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e8e, (q15_t)0x9054, (q15_t)0x3e88, (q15_t)0x9051, (q15_t)0x3e83, (q15_t)0x904e,
-  (q15_t)0x3e7d, (q15_t)0x904b, (q15_t)0x3e78, (q15_t)0x9048, (q15_t)0x3e73, (q15_t)0x9045, (q15_t)0x3e6d, (q15_t)0x9042,
-  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e62, (q15_t)0x903c, (q15_t)0x3e5d, (q15_t)0x9039, (q15_t)0x3e57, (q15_t)0x9036,
-  (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e4c, (q15_t)0x9030, (q15_t)0x3e47, (q15_t)0x902d, (q15_t)0x3e41, (q15_t)0x902a,
-  (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e36, (q15_t)0x9023, (q15_t)0x3e31, (q15_t)0x9020, (q15_t)0x3e2b, (q15_t)0x901d,
-  (q15_t)0x3e26, (q15_t)0x901a, (q15_t)0x3e20, (q15_t)0x9017, (q15_t)0x3e1b, (q15_t)0x9014, (q15_t)0x3e15, (q15_t)0x9011,
-  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3e0a, (q15_t)0x900b, (q15_t)0x3e05, (q15_t)0x9008, (q15_t)0x3dff, (q15_t)0x9005,
-  (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3df4, (q15_t)0x8fff, (q15_t)0x3def, (q15_t)0x8ffc, (q15_t)0x3de9, (q15_t)0x8ff9,
-  (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dde, (q15_t)0x8ff3, (q15_t)0x3dd9, (q15_t)0x8ff0, (q15_t)0x3dd3, (q15_t)0x8fed,
-  (q15_t)0x3dce, (q15_t)0x8fea, (q15_t)0x3dc8, (q15_t)0x8fe7, (q15_t)0x3dc3, (q15_t)0x8fe3, (q15_t)0x3dbd, (q15_t)0x8fe0,
-  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3db2, (q15_t)0x8fda, (q15_t)0x3dad, (q15_t)0x8fd7, (q15_t)0x3da7, (q15_t)0x8fd4,
-  (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d9c, (q15_t)0x8fce, (q15_t)0x3d97, (q15_t)0x8fcb, (q15_t)0x3d91, (q15_t)0x8fc8,
-  (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d86, (q15_t)0x8fc2, (q15_t)0x3d81, (q15_t)0x8fbf, (q15_t)0x3d7b, (q15_t)0x8fbc,
-  (q15_t)0x3d76, (q15_t)0x8fb9, (q15_t)0x3d70, (q15_t)0x8fb6, (q15_t)0x3d6b, (q15_t)0x8fb3, (q15_t)0x3d65, (q15_t)0x8fb0,
-  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d5a, (q15_t)0x8faa, (q15_t)0x3d55, (q15_t)0x8fa7, (q15_t)0x3d4f, (q15_t)0x8fa4,
-  (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d44, (q15_t)0x8f9e, (q15_t)0x3d3e, (q15_t)0x8f9b, (q15_t)0x3d39, (q15_t)0x8f98,
-  (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d2e, (q15_t)0x8f92, (q15_t)0x3d28, (q15_t)0x8f8f, (q15_t)0x3d23, (q15_t)0x8f8c,
-  (q15_t)0x3d1d, (q15_t)0x8f89, (q15_t)0x3d18, (q15_t)0x8f86, (q15_t)0x3d12, (q15_t)0x8f83, (q15_t)0x3d0d, (q15_t)0x8f80,
-  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3d02, (q15_t)0x8f7a, (q15_t)0x3cfc, (q15_t)0x8f77, (q15_t)0x3cf7, (q15_t)0x8f74,
-  (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cec, (q15_t)0x8f6e, (q15_t)0x3ce6, (q15_t)0x8f6b, (q15_t)0x3ce1, (q15_t)0x8f68,
-  (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cd6, (q15_t)0x8f62, (q15_t)0x3cd0, (q15_t)0x8f5f, (q15_t)0x3cca, (q15_t)0x8f5c,
-  (q15_t)0x3cc5, (q15_t)0x8f59, (q15_t)0x3cbf, (q15_t)0x8f56, (q15_t)0x3cba, (q15_t)0x8f53, (q15_t)0x3cb4, (q15_t)0x8f50,
-  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3ca9, (q15_t)0x8f4a, (q15_t)0x3ca4, (q15_t)0x8f47, (q15_t)0x3c9e, (q15_t)0x8f44,
-  (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c93, (q15_t)0x8f3e, (q15_t)0x3c8e, (q15_t)0x8f3b, (q15_t)0x3c88, (q15_t)0x8f38,
-  (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c7d, (q15_t)0x8f32, (q15_t)0x3c77, (q15_t)0x8f2f, (q15_t)0x3c72, (q15_t)0x8f2d,
-  (q15_t)0x3c6c, (q15_t)0x8f2a, (q15_t)0x3c67, (q15_t)0x8f27, (q15_t)0x3c61, (q15_t)0x8f24, (q15_t)0x3c5c, (q15_t)0x8f21,
-  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c51, (q15_t)0x8f1b, (q15_t)0x3c4b, (q15_t)0x8f18, (q15_t)0x3c46, (q15_t)0x8f15,
-  (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c3b, (q15_t)0x8f0f, (q15_t)0x3c35, (q15_t)0x8f0c, (q15_t)0x3c2f, (q15_t)0x8f09,
-  (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c24, (q15_t)0x8f03, (q15_t)0x3c1f, (q15_t)0x8f00, (q15_t)0x3c19, (q15_t)0x8efd,
-  (q15_t)0x3c14, (q15_t)0x8efa, (q15_t)0x3c0e, (q15_t)0x8ef7, (q15_t)0x3c09, (q15_t)0x8ef4, (q15_t)0x3c03, (q15_t)0x8ef1,
-  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3bf8, (q15_t)0x8eec, (q15_t)0x3bf2, (q15_t)0x8ee9, (q15_t)0x3bed, (q15_t)0x8ee6,
-  (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3be2, (q15_t)0x8ee0, (q15_t)0x3bdc, (q15_t)0x8edd, (q15_t)0x3bd7, (q15_t)0x8eda,
-  (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bcc, (q15_t)0x8ed4, (q15_t)0x3bc6, (q15_t)0x8ed1, (q15_t)0x3bc0, (q15_t)0x8ece,
-  (q15_t)0x3bbb, (q15_t)0x8ecb, (q15_t)0x3bb5, (q15_t)0x8ec8, (q15_t)0x3bb0, (q15_t)0x8ec5, (q15_t)0x3baa, (q15_t)0x8ec2,
-  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b9f, (q15_t)0x8ebd, (q15_t)0x3b99, (q15_t)0x8eba, (q15_t)0x3b94, (q15_t)0x8eb7,
-  (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b89, (q15_t)0x8eb1, (q15_t)0x3b83, (q15_t)0x8eae, (q15_t)0x3b7e, (q15_t)0x8eab,
-  (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b73, (q15_t)0x8ea5, (q15_t)0x3b6d, (q15_t)0x8ea2, (q15_t)0x3b67, (q15_t)0x8e9f,
-  (q15_t)0x3b62, (q15_t)0x8e9c, (q15_t)0x3b5c, (q15_t)0x8e99, (q15_t)0x3b57, (q15_t)0x8e97, (q15_t)0x3b51, (q15_t)0x8e94,
-  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b46, (q15_t)0x8e8e, (q15_t)0x3b40, (q15_t)0x8e8b, (q15_t)0x3b3b, (q15_t)0x8e88,
-  (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b30, (q15_t)0x8e82, (q15_t)0x3b2a, (q15_t)0x8e7f, (q15_t)0x3b25, (q15_t)0x8e7c,
-  (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b19, (q15_t)0x8e77, (q15_t)0x3b14, (q15_t)0x8e74, (q15_t)0x3b0e, (q15_t)0x8e71,
-  (q15_t)0x3b09, (q15_t)0x8e6e, (q15_t)0x3b03, (q15_t)0x8e6b, (q15_t)0x3afe, (q15_t)0x8e68, (q15_t)0x3af8, (q15_t)0x8e65,
-  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3aed, (q15_t)0x8e5f, (q15_t)0x3ae7, (q15_t)0x8e5d, (q15_t)0x3ae2, (q15_t)0x8e5a,
-  (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ad7, (q15_t)0x8e54, (q15_t)0x3ad1, (q15_t)0x8e51, (q15_t)0x3acb, (q15_t)0x8e4e,
-  (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3ac0, (q15_t)0x8e48, (q15_t)0x3abb, (q15_t)0x8e45, (q15_t)0x3ab5, (q15_t)0x8e43,
-  (q15_t)0x3aaf, (q15_t)0x8e40, (q15_t)0x3aaa, (q15_t)0x8e3d, (q15_t)0x3aa4, (q15_t)0x8e3a, (q15_t)0x3a9f, (q15_t)0x8e37,
-  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a94, (q15_t)0x8e31, (q15_t)0x3a8e, (q15_t)0x8e2e, (q15_t)0x3a88, (q15_t)0x8e2c,
-  (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a7d, (q15_t)0x8e26, (q15_t)0x3a78, (q15_t)0x8e23, (q15_t)0x3a72, (q15_t)0x8e20,
-  (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a67, (q15_t)0x8e1a, (q15_t)0x3a61, (q15_t)0x8e17, (q15_t)0x3a5c, (q15_t)0x8e15,
-  (q15_t)0x3a56, (q15_t)0x8e12, (q15_t)0x3a50, (q15_t)0x8e0f, (q15_t)0x3a4b, (q15_t)0x8e0c, (q15_t)0x3a45, (q15_t)0x8e09,
-  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a3a, (q15_t)0x8e03, (q15_t)0x3a34, (q15_t)0x8e01, (q15_t)0x3a2f, (q15_t)0x8dfe,
-  (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a24, (q15_t)0x8df8, (q15_t)0x3a1e, (q15_t)0x8df5, (q15_t)0x3a19, (q15_t)0x8df2,
-  (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x3a0d, (q15_t)0x8ded, (q15_t)0x3a08, (q15_t)0x8dea, (q15_t)0x3a02, (q15_t)0x8de7,
-  (q15_t)0x39fd, (q15_t)0x8de4, (q15_t)0x39f7, (q15_t)0x8de1, (q15_t)0x39f1, (q15_t)0x8dde, (q15_t)0x39ec, (q15_t)0x8ddc,
-  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39e0, (q15_t)0x8dd6, (q15_t)0x39db, (q15_t)0x8dd3, (q15_t)0x39d5, (q15_t)0x8dd0,
-  (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39ca, (q15_t)0x8dca, (q15_t)0x39c4, (q15_t)0x8dc8, (q15_t)0x39bf, (q15_t)0x8dc5,
-  (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39b4, (q15_t)0x8dbf, (q15_t)0x39ae, (q15_t)0x8dbc, (q15_t)0x39a8, (q15_t)0x8db9,
-  (q15_t)0x39a3, (q15_t)0x8db7, (q15_t)0x399d, (q15_t)0x8db4, (q15_t)0x3998, (q15_t)0x8db1, (q15_t)0x3992, (q15_t)0x8dae,
-  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3987, (q15_t)0x8da9, (q15_t)0x3981, (q15_t)0x8da6, (q15_t)0x397c, (q15_t)0x8da3,
-  (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x3970, (q15_t)0x8d9d, (q15_t)0x396b, (q15_t)0x8d9a, (q15_t)0x3965, (q15_t)0x8d98,
-  (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x395a, (q15_t)0x8d92, (q15_t)0x3954, (q15_t)0x8d8f, (q15_t)0x394f, (q15_t)0x8d8c,
-  (q15_t)0x3949, (q15_t)0x8d8a, (q15_t)0x3943, (q15_t)0x8d87, (q15_t)0x393e, (q15_t)0x8d84, (q15_t)0x3938, (q15_t)0x8d81,
-  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x392d, (q15_t)0x8d7b, (q15_t)0x3927, (q15_t)0x8d79, (q15_t)0x3922, (q15_t)0x8d76,
-  (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3916, (q15_t)0x8d70, (q15_t)0x3911, (q15_t)0x8d6d, (q15_t)0x390b, (q15_t)0x8d6b,
-  (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x3900, (q15_t)0x8d65, (q15_t)0x38fa, (q15_t)0x8d62, (q15_t)0x38f5, (q15_t)0x8d5f,
-  (q15_t)0x38ef, (q15_t)0x8d5d, (q15_t)0x38e9, (q15_t)0x8d5a, (q15_t)0x38e4, (q15_t)0x8d57, (q15_t)0x38de, (q15_t)0x8d54,
-  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38d3, (q15_t)0x8d4f, (q15_t)0x38cd, (q15_t)0x8d4c, (q15_t)0x38c8, (q15_t)0x8d49,
-  (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38bc, (q15_t)0x8d44, (q15_t)0x38b7, (q15_t)0x8d41, (q15_t)0x38b1, (q15_t)0x8d3e,
-  (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x38a6, (q15_t)0x8d38, (q15_t)0x38a0, (q15_t)0x8d36, (q15_t)0x389b, (q15_t)0x8d33,
-  (q15_t)0x3895, (q15_t)0x8d30, (q15_t)0x388f, (q15_t)0x8d2d, (q15_t)0x388a, (q15_t)0x8d2b, (q15_t)0x3884, (q15_t)0x8d28,
-  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3879, (q15_t)0x8d22, (q15_t)0x3873, (q15_t)0x8d1f, (q15_t)0x386d, (q15_t)0x8d1d,
-  (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3862, (q15_t)0x8d17, (q15_t)0x385d, (q15_t)0x8d14, (q15_t)0x3857, (q15_t)0x8d12,
-  (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x384c, (q15_t)0x8d0c, (q15_t)0x3846, (q15_t)0x8d09, (q15_t)0x3840, (q15_t)0x8d07,
-  (q15_t)0x383b, (q15_t)0x8d04, (q15_t)0x3835, (q15_t)0x8d01, (q15_t)0x382f, (q15_t)0x8cfe, (q15_t)0x382a, (q15_t)0x8cfb,
-  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x381e, (q15_t)0x8cf6, (q15_t)0x3819, (q15_t)0x8cf3, (q15_t)0x3813, (q15_t)0x8cf0,
-  (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x3808, (q15_t)0x8ceb, (q15_t)0x3802, (q15_t)0x8ce8, (q15_t)0x37fd, (q15_t)0x8ce5,
-  (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37f1, (q15_t)0x8ce0, (q15_t)0x37ec, (q15_t)0x8cdd, (q15_t)0x37e6, (q15_t)0x8cda,
-  (q15_t)0x37e0, (q15_t)0x8cd8, (q15_t)0x37db, (q15_t)0x8cd5, (q15_t)0x37d5, (q15_t)0x8cd2, (q15_t)0x37cf, (q15_t)0x8cd0,
-  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37c4, (q15_t)0x8cca, (q15_t)0x37be, (q15_t)0x8cc7, (q15_t)0x37b9, (q15_t)0x8cc5,
-  (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x37ad, (q15_t)0x8cbf, (q15_t)0x37a8, (q15_t)0x8cbc, (q15_t)0x37a2, (q15_t)0x8cba,
-  (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3797, (q15_t)0x8cb4, (q15_t)0x3791, (q15_t)0x8cb1, (q15_t)0x378b, (q15_t)0x8caf,
-  (q15_t)0x3786, (q15_t)0x8cac, (q15_t)0x3780, (q15_t)0x8ca9, (q15_t)0x377a, (q15_t)0x8ca7, (q15_t)0x3775, (q15_t)0x8ca4,
-  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3769, (q15_t)0x8c9e, (q15_t)0x3764, (q15_t)0x8c9c, (q15_t)0x375e, (q15_t)0x8c99,
-  (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3753, (q15_t)0x8c94, (q15_t)0x374d, (q15_t)0x8c91, (q15_t)0x3747, (q15_t)0x8c8e,
-  (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x373c, (q15_t)0x8c89, (q15_t)0x3736, (q15_t)0x8c86, (q15_t)0x3731, (q15_t)0x8c83,
-  (q15_t)0x372b, (q15_t)0x8c81, (q15_t)0x3725, (q15_t)0x8c7e, (q15_t)0x3720, (q15_t)0x8c7b, (q15_t)0x371a, (q15_t)0x8c78,
-  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x370f, (q15_t)0x8c73, (q15_t)0x3709, (q15_t)0x8c70, (q15_t)0x3703, (q15_t)0x8c6e,
-  (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36f8, (q15_t)0x8c68, (q15_t)0x36f2, (q15_t)0x8c65, (q15_t)0x36ed, (q15_t)0x8c63,
-  (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36e1, (q15_t)0x8c5d, (q15_t)0x36dc, (q15_t)0x8c5b, (q15_t)0x36d6, (q15_t)0x8c58,
-  (q15_t)0x36d0, (q15_t)0x8c55, (q15_t)0x36cb, (q15_t)0x8c53, (q15_t)0x36c5, (q15_t)0x8c50, (q15_t)0x36bf, (q15_t)0x8c4d,
-  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36b4, (q15_t)0x8c48, (q15_t)0x36ae, (q15_t)0x8c45, (q15_t)0x36a9, (q15_t)0x8c43,
-  (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x369d, (q15_t)0x8c3d, (q15_t)0x3698, (q15_t)0x8c3a, (q15_t)0x3692, (q15_t)0x8c38,
-  (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3686, (q15_t)0x8c32, (q15_t)0x3681, (q15_t)0x8c30, (q15_t)0x367b, (q15_t)0x8c2d,
-  (q15_t)0x3675, (q15_t)0x8c2a, (q15_t)0x3670, (q15_t)0x8c28, (q15_t)0x366a, (q15_t)0x8c25, (q15_t)0x3664, (q15_t)0x8c22,
-  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3659, (q15_t)0x8c1d, (q15_t)0x3653, (q15_t)0x8c1a, (q15_t)0x364e, (q15_t)0x8c18,
-  (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3642, (q15_t)0x8c12, (q15_t)0x363d, (q15_t)0x8c10, (q15_t)0x3637, (q15_t)0x8c0d,
-  (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x362b, (q15_t)0x8c08, (q15_t)0x3626, (q15_t)0x8c05, (q15_t)0x3620, (q15_t)0x8c02,
-  (q15_t)0x361a, (q15_t)0x8c00, (q15_t)0x3615, (q15_t)0x8bfd, (q15_t)0x360f, (q15_t)0x8bfa, (q15_t)0x3609, (q15_t)0x8bf8,
-  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35fe, (q15_t)0x8bf3, (q15_t)0x35f8, (q15_t)0x8bf0, (q15_t)0x35f3, (q15_t)0x8bed,
-  (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35e7, (q15_t)0x8be8, (q15_t)0x35e1, (q15_t)0x8be5, (q15_t)0x35dc, (q15_t)0x8be3,
-  (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35d0, (q15_t)0x8bdd, (q15_t)0x35cb, (q15_t)0x8bdb, (q15_t)0x35c5, (q15_t)0x8bd8,
-  (q15_t)0x35bf, (q15_t)0x8bd5, (q15_t)0x35ba, (q15_t)0x8bd3, (q15_t)0x35b4, (q15_t)0x8bd0, (q15_t)0x35ae, (q15_t)0x8bce,
-  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x35a3, (q15_t)0x8bc8, (q15_t)0x359d, (q15_t)0x8bc6, (q15_t)0x3597, (q15_t)0x8bc3,
-  (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x358c, (q15_t)0x8bbe, (q15_t)0x3586, (q15_t)0x8bbb, (q15_t)0x3580, (q15_t)0x8bb8,
-  (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3575, (q15_t)0x8bb3, (q15_t)0x356f, (q15_t)0x8bb1, (q15_t)0x356a, (q15_t)0x8bae,
-  (q15_t)0x3564, (q15_t)0x8bab, (q15_t)0x355e, (q15_t)0x8ba9, (q15_t)0x3558, (q15_t)0x8ba6, (q15_t)0x3553, (q15_t)0x8ba4,
-  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3547, (q15_t)0x8b9e, (q15_t)0x3542, (q15_t)0x8b9c, (q15_t)0x353c, (q15_t)0x8b99,
-  (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x3530, (q15_t)0x8b94, (q15_t)0x352b, (q15_t)0x8b91, (q15_t)0x3525, (q15_t)0x8b8f,
-  (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x351a, (q15_t)0x8b89, (q15_t)0x3514, (q15_t)0x8b87, (q15_t)0x350e, (q15_t)0x8b84,
-  (q15_t)0x3508, (q15_t)0x8b82, (q15_t)0x3503, (q15_t)0x8b7f, (q15_t)0x34fd, (q15_t)0x8b7c, (q15_t)0x34f7, (q15_t)0x8b7a,
-  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34ec, (q15_t)0x8b75, (q15_t)0x34e6, (q15_t)0x8b72, (q15_t)0x34e0, (q15_t)0x8b6f,
-  (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34d5, (q15_t)0x8b6a, (q15_t)0x34cf, (q15_t)0x8b68, (q15_t)0x34ca, (q15_t)0x8b65,
-  (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34be, (q15_t)0x8b60, (q15_t)0x34b8, (q15_t)0x8b5d, (q15_t)0x34b3, (q15_t)0x8b5b,
-  (q15_t)0x34ad, (q15_t)0x8b58, (q15_t)0x34a7, (q15_t)0x8b55, (q15_t)0x34a1, (q15_t)0x8b53, (q15_t)0x349c, (q15_t)0x8b50,
-  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x3490, (q15_t)0x8b4b, (q15_t)0x348b, (q15_t)0x8b49, (q15_t)0x3485, (q15_t)0x8b46,
-  (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3479, (q15_t)0x8b41, (q15_t)0x3474, (q15_t)0x8b3e, (q15_t)0x346e, (q15_t)0x8b3c,
-  (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3462, (q15_t)0x8b37, (q15_t)0x345d, (q15_t)0x8b34, (q15_t)0x3457, (q15_t)0x8b31,
-  (q15_t)0x3451, (q15_t)0x8b2f, (q15_t)0x344b, (q15_t)0x8b2c, (q15_t)0x3446, (q15_t)0x8b2a, (q15_t)0x3440, (q15_t)0x8b27,
-  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3435, (q15_t)0x8b22, (q15_t)0x342f, (q15_t)0x8b1f, (q15_t)0x3429, (q15_t)0x8b1d,
-  (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x341e, (q15_t)0x8b18, (q15_t)0x3418, (q15_t)0x8b15, (q15_t)0x3412, (q15_t)0x8b13,
-  (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x3407, (q15_t)0x8b0e, (q15_t)0x3401, (q15_t)0x8b0b, (q15_t)0x33fb, (q15_t)0x8b08,
-  (q15_t)0x33f5, (q15_t)0x8b06, (q15_t)0x33f0, (q15_t)0x8b03, (q15_t)0x33ea, (q15_t)0x8b01, (q15_t)0x33e4, (q15_t)0x8afe,
-  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33d9, (q15_t)0x8af9, (q15_t)0x33d3, (q15_t)0x8af7, (q15_t)0x33cd, (q15_t)0x8af4,
-  (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33c2, (q15_t)0x8aef, (q15_t)0x33bc, (q15_t)0x8aec, (q15_t)0x33b6, (q15_t)0x8aea,
-  (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x33ab, (q15_t)0x8ae5, (q15_t)0x33a5, (q15_t)0x8ae2, (q15_t)0x339f, (q15_t)0x8ae0,
-  (q15_t)0x3399, (q15_t)0x8add, (q15_t)0x3394, (q15_t)0x8adb, (q15_t)0x338e, (q15_t)0x8ad8, (q15_t)0x3388, (q15_t)0x8ad6,
-  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x337d, (q15_t)0x8ad1, (q15_t)0x3377, (q15_t)0x8ace, (q15_t)0x3371, (q15_t)0x8acb,
-  (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3366, (q15_t)0x8ac6, (q15_t)0x3360, (q15_t)0x8ac4, (q15_t)0x335a, (q15_t)0x8ac1,
-  (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x334f, (q15_t)0x8abc, (q15_t)0x3349, (q15_t)0x8aba, (q15_t)0x3343, (q15_t)0x8ab7,
-  (q15_t)0x333d, (q15_t)0x8ab5, (q15_t)0x3338, (q15_t)0x8ab2, (q15_t)0x3332, (q15_t)0x8ab0, (q15_t)0x332c, (q15_t)0x8aad,
-  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x3321, (q15_t)0x8aa8, (q15_t)0x331b, (q15_t)0x8aa6, (q15_t)0x3315, (q15_t)0x8aa3,
-  (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x330a, (q15_t)0x8a9e, (q15_t)0x3304, (q15_t)0x8a9c, (q15_t)0x32fe, (q15_t)0x8a99,
-  (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32f3, (q15_t)0x8a94, (q15_t)0x32ed, (q15_t)0x8a92, (q15_t)0x32e7, (q15_t)0x8a8f,
-  (q15_t)0x32e1, (q15_t)0x8a8d, (q15_t)0x32db, (q15_t)0x8a8a, (q15_t)0x32d6, (q15_t)0x8a88, (q15_t)0x32d0, (q15_t)0x8a85,
-  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32c4, (q15_t)0x8a80, (q15_t)0x32bf, (q15_t)0x8a7e, (q15_t)0x32b9, (q15_t)0x8a7b,
-  (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x32ad, (q15_t)0x8a76, (q15_t)0x32a8, (q15_t)0x8a74, (q15_t)0x32a2, (q15_t)0x8a71,
-  (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3296, (q15_t)0x8a6c, (q15_t)0x3290, (q15_t)0x8a6a, (q15_t)0x328b, (q15_t)0x8a67,
-  (q15_t)0x3285, (q15_t)0x8a65, (q15_t)0x327f, (q15_t)0x8a62, (q15_t)0x3279, (q15_t)0x8a60, (q15_t)0x3274, (q15_t)0x8a5d,
-  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3268, (q15_t)0x8a59, (q15_t)0x3262, (q15_t)0x8a56, (q15_t)0x325d, (q15_t)0x8a54,
-  (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3251, (q15_t)0x8a4f, (q15_t)0x324b, (q15_t)0x8a4c, (q15_t)0x3245, (q15_t)0x8a4a,
-  (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x323a, (q15_t)0x8a45, (q15_t)0x3234, (q15_t)0x8a42, (q15_t)0x322e, (q15_t)0x8a40,
-  (q15_t)0x3228, (q15_t)0x8a3d, (q15_t)0x3223, (q15_t)0x8a3b, (q15_t)0x321d, (q15_t)0x8a38, (q15_t)0x3217, (q15_t)0x8a36,
-  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x320c, (q15_t)0x8a31, (q15_t)0x3206, (q15_t)0x8a2f, (q15_t)0x3200, (q15_t)0x8a2c,
-  (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31f4, (q15_t)0x8a27, (q15_t)0x31ef, (q15_t)0x8a25, (q15_t)0x31e9, (q15_t)0x8a22,
-  (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31dd, (q15_t)0x8a1d, (q15_t)0x31d8, (q15_t)0x8a1b, (q15_t)0x31d2, (q15_t)0x8a19,
-  (q15_t)0x31cc, (q15_t)0x8a16, (q15_t)0x31c6, (q15_t)0x8a14, (q15_t)0x31c0, (q15_t)0x8a11, (q15_t)0x31bb, (q15_t)0x8a0f,
-  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x31af, (q15_t)0x8a0a, (q15_t)0x31a9, (q15_t)0x8a07, (q15_t)0x31a3, (q15_t)0x8a05,
-  (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3198, (q15_t)0x8a00, (q15_t)0x3192, (q15_t)0x89fe, (q15_t)0x318c, (q15_t)0x89fb,
-  (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x3181, (q15_t)0x89f6, (q15_t)0x317b, (q15_t)0x89f4, (q15_t)0x3175, (q15_t)0x89f2,
-  (q15_t)0x316f, (q15_t)0x89ef, (q15_t)0x3169, (q15_t)0x89ed, (q15_t)0x3164, (q15_t)0x89ea, (q15_t)0x315e, (q15_t)0x89e8,
-  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3152, (q15_t)0x89e3, (q15_t)0x314c, (q15_t)0x89e1, (q15_t)0x3147, (q15_t)0x89de,
-  (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x313b, (q15_t)0x89d9, (q15_t)0x3135, (q15_t)0x89d7, (q15_t)0x312f, (q15_t)0x89d5,
-  (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3124, (q15_t)0x89d0, (q15_t)0x311e, (q15_t)0x89cd, (q15_t)0x3118, (q15_t)0x89cb,
-  (q15_t)0x3112, (q15_t)0x89c8, (q15_t)0x310d, (q15_t)0x89c6, (q15_t)0x3107, (q15_t)0x89c4, (q15_t)0x3101, (q15_t)0x89c1,
-  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30f5, (q15_t)0x89bc, (q15_t)0x30f0, (q15_t)0x89ba, (q15_t)0x30ea, (q15_t)0x89b8,
-  (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30de, (q15_t)0x89b3, (q15_t)0x30d8, (q15_t)0x89b0, (q15_t)0x30d3, (q15_t)0x89ae,
-  (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30c7, (q15_t)0x89a9, (q15_t)0x30c1, (q15_t)0x89a7, (q15_t)0x30bb, (q15_t)0x89a4,
-  (q15_t)0x30b6, (q15_t)0x89a2, (q15_t)0x30b0, (q15_t)0x89a0, (q15_t)0x30aa, (q15_t)0x899d, (q15_t)0x30a4, (q15_t)0x899b,
-  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3099, (q15_t)0x8996, (q15_t)0x3093, (q15_t)0x8994, (q15_t)0x308d, (q15_t)0x8991,
-  (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3081, (q15_t)0x898d, (q15_t)0x307b, (q15_t)0x898a, (q15_t)0x3076, (q15_t)0x8988,
-  (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x306a, (q15_t)0x8983, (q15_t)0x3064, (q15_t)0x8981, (q15_t)0x305e, (q15_t)0x897e,
-  (q15_t)0x3059, (q15_t)0x897c, (q15_t)0x3053, (q15_t)0x897a, (q15_t)0x304d, (q15_t)0x8977, (q15_t)0x3047, (q15_t)0x8975,
-  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x303b, (q15_t)0x8970, (q15_t)0x3036, (q15_t)0x896e, (q15_t)0x3030, (q15_t)0x896b,
-  (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3024, (q15_t)0x8967, (q15_t)0x301e, (q15_t)0x8964, (q15_t)0x3019, (q15_t)0x8962,
-  (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x300d, (q15_t)0x895d, (q15_t)0x3007, (q15_t)0x895b, (q15_t)0x3001, (q15_t)0x8958,
-  (q15_t)0x2ffb, (q15_t)0x8956, (q15_t)0x2ff6, (q15_t)0x8954, (q15_t)0x2ff0, (q15_t)0x8951, (q15_t)0x2fea, (q15_t)0x894f,
-  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fde, (q15_t)0x894a, (q15_t)0x2fd8, (q15_t)0x8948, (q15_t)0x2fd3, (q15_t)0x8946,
-  (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fc7, (q15_t)0x8941, (q15_t)0x2fc1, (q15_t)0x893f, (q15_t)0x2fbb, (q15_t)0x893c,
-  (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2fb0, (q15_t)0x8938, (q15_t)0x2faa, (q15_t)0x8935, (q15_t)0x2fa4, (q15_t)0x8933,
-  (q15_t)0x2f9e, (q15_t)0x8931, (q15_t)0x2f98, (q15_t)0x892e, (q15_t)0x2f92, (q15_t)0x892c, (q15_t)0x2f8d, (q15_t)0x892a,
-  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f81, (q15_t)0x8925, (q15_t)0x2f7b, (q15_t)0x8923, (q15_t)0x2f75, (q15_t)0x8920,
-  (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f6a, (q15_t)0x891c, (q15_t)0x2f64, (q15_t)0x8919, (q15_t)0x2f5e, (q15_t)0x8917,
-  (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f52, (q15_t)0x8912, (q15_t)0x2f4c, (q15_t)0x8910, (q15_t)0x2f47, (q15_t)0x890e,
-  (q15_t)0x2f41, (q15_t)0x890b, (q15_t)0x2f3b, (q15_t)0x8909, (q15_t)0x2f35, (q15_t)0x8907, (q15_t)0x2f2f, (q15_t)0x8904,
-  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f24, (q15_t)0x8900, (q15_t)0x2f1e, (q15_t)0x88fd, (q15_t)0x2f18, (q15_t)0x88fb,
-  (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2f0c, (q15_t)0x88f6, (q15_t)0x2f06, (q15_t)0x88f4, (q15_t)0x2f01, (q15_t)0x88f2,
-  (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ef5, (q15_t)0x88ed, (q15_t)0x2eef, (q15_t)0x88eb, (q15_t)0x2ee9, (q15_t)0x88e9,
-  (q15_t)0x2ee3, (q15_t)0x88e6, (q15_t)0x2edd, (q15_t)0x88e4, (q15_t)0x2ed8, (q15_t)0x88e2, (q15_t)0x2ed2, (q15_t)0x88df,
-  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2ec6, (q15_t)0x88db, (q15_t)0x2ec0, (q15_t)0x88d9, (q15_t)0x2eba, (q15_t)0x88d6,
-  (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2eaf, (q15_t)0x88d2, (q15_t)0x2ea9, (q15_t)0x88cf, (q15_t)0x2ea3, (q15_t)0x88cd,
-  (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e97, (q15_t)0x88c8, (q15_t)0x2e91, (q15_t)0x88c6, (q15_t)0x2e8c, (q15_t)0x88c4,
-  (q15_t)0x2e86, (q15_t)0x88c2, (q15_t)0x2e80, (q15_t)0x88bf, (q15_t)0x2e7a, (q15_t)0x88bd, (q15_t)0x2e74, (q15_t)0x88bb,
-  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e68, (q15_t)0x88b6, (q15_t)0x2e63, (q15_t)0x88b4, (q15_t)0x2e5d, (q15_t)0x88b2,
-  (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e51, (q15_t)0x88ad, (q15_t)0x2e4b, (q15_t)0x88ab, (q15_t)0x2e45, (q15_t)0x88a9,
-  (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e3a, (q15_t)0x88a4, (q15_t)0x2e34, (q15_t)0x88a2, (q15_t)0x2e2e, (q15_t)0x88a0,
-  (q15_t)0x2e28, (q15_t)0x889d, (q15_t)0x2e22, (q15_t)0x889b, (q15_t)0x2e1c, (q15_t)0x8899, (q15_t)0x2e16, (q15_t)0x8896,
-  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2e0b, (q15_t)0x8892, (q15_t)0x2e05, (q15_t)0x8890, (q15_t)0x2dff, (q15_t)0x888d,
-  (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2df3, (q15_t)0x8889, (q15_t)0x2ded, (q15_t)0x8887, (q15_t)0x2de7, (q15_t)0x8884,
-  (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2ddc, (q15_t)0x8880, (q15_t)0x2dd6, (q15_t)0x887e, (q15_t)0x2dd0, (q15_t)0x887b,
-  (q15_t)0x2dca, (q15_t)0x8879, (q15_t)0x2dc4, (q15_t)0x8877, (q15_t)0x2dbe, (q15_t)0x8875, (q15_t)0x2db9, (q15_t)0x8872,
-  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2dad, (q15_t)0x886e, (q15_t)0x2da7, (q15_t)0x886c, (q15_t)0x2da1, (q15_t)0x8869,
-  (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d95, (q15_t)0x8865, (q15_t)0x2d8f, (q15_t)0x8863, (q15_t)0x2d8a, (q15_t)0x8860,
-  (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d7e, (q15_t)0x885c, (q15_t)0x2d78, (q15_t)0x885a, (q15_t)0x2d72, (q15_t)0x8858,
-  (q15_t)0x2d6c, (q15_t)0x8855, (q15_t)0x2d66, (q15_t)0x8853, (q15_t)0x2d60, (q15_t)0x8851, (q15_t)0x2d5b, (q15_t)0x884f,
-  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d4f, (q15_t)0x884a, (q15_t)0x2d49, (q15_t)0x8848, (q15_t)0x2d43, (q15_t)0x8846,
-  (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d37, (q15_t)0x8841, (q15_t)0x2d31, (q15_t)0x883f, (q15_t)0x2d2c, (q15_t)0x883d,
-  (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d20, (q15_t)0x8838, (q15_t)0x2d1a, (q15_t)0x8836, (q15_t)0x2d14, (q15_t)0x8834,
-  (q15_t)0x2d0e, (q15_t)0x8832, (q15_t)0x2d08, (q15_t)0x8830, (q15_t)0x2d02, (q15_t)0x882d, (q15_t)0x2cfd, (q15_t)0x882b,
-  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cf1, (q15_t)0x8827, (q15_t)0x2ceb, (q15_t)0x8825, (q15_t)0x2ce5, (q15_t)0x8822,
-  (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cd9, (q15_t)0x881e, (q15_t)0x2cd3, (q15_t)0x881c, (q15_t)0x2ccd, (q15_t)0x881a,
-  (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cc2, (q15_t)0x8815, (q15_t)0x2cbc, (q15_t)0x8813, (q15_t)0x2cb6, (q15_t)0x8811,
-  (q15_t)0x2cb0, (q15_t)0x880f, (q15_t)0x2caa, (q15_t)0x880c, (q15_t)0x2ca4, (q15_t)0x880a, (q15_t)0x2c9e, (q15_t)0x8808,
-  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c93, (q15_t)0x8804, (q15_t)0x2c8d, (q15_t)0x8801, (q15_t)0x2c87, (q15_t)0x87ff,
-  (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c7b, (q15_t)0x87fb, (q15_t)0x2c75, (q15_t)0x87f9, (q15_t)0x2c6f, (q15_t)0x87f6,
-  (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c63, (q15_t)0x87f2, (q15_t)0x2c5e, (q15_t)0x87f0, (q15_t)0x2c58, (q15_t)0x87ee,
-  (q15_t)0x2c52, (q15_t)0x87ec, (q15_t)0x2c4c, (q15_t)0x87e9, (q15_t)0x2c46, (q15_t)0x87e7, (q15_t)0x2c40, (q15_t)0x87e5,
-  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c34, (q15_t)0x87e1, (q15_t)0x2c2e, (q15_t)0x87df, (q15_t)0x2c29, (q15_t)0x87dc,
-  (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c1d, (q15_t)0x87d8, (q15_t)0x2c17, (q15_t)0x87d6, (q15_t)0x2c11, (q15_t)0x87d4,
-  (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2c05, (q15_t)0x87cf, (q15_t)0x2bff, (q15_t)0x87cd, (q15_t)0x2bf9, (q15_t)0x87cb,
-  (q15_t)0x2bf3, (q15_t)0x87c9, (q15_t)0x2bee, (q15_t)0x87c7, (q15_t)0x2be8, (q15_t)0x87c5, (q15_t)0x2be2, (q15_t)0x87c2,
-  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bd6, (q15_t)0x87be, (q15_t)0x2bd0, (q15_t)0x87bc, (q15_t)0x2bca, (q15_t)0x87ba,
-  (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bbe, (q15_t)0x87b6, (q15_t)0x2bb8, (q15_t)0x87b3, (q15_t)0x2bb2, (q15_t)0x87b1,
-  (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2ba7, (q15_t)0x87ad, (q15_t)0x2ba1, (q15_t)0x87ab, (q15_t)0x2b9b, (q15_t)0x87a9,
-  (q15_t)0x2b95, (q15_t)0x87a7, (q15_t)0x2b8f, (q15_t)0x87a4, (q15_t)0x2b89, (q15_t)0x87a2, (q15_t)0x2b83, (q15_t)0x87a0,
-  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b77, (q15_t)0x879c, (q15_t)0x2b71, (q15_t)0x879a, (q15_t)0x2b6c, (q15_t)0x8798,
-  (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b60, (q15_t)0x8793, (q15_t)0x2b5a, (q15_t)0x8791, (q15_t)0x2b54, (q15_t)0x878f,
-  (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b48, (q15_t)0x878b, (q15_t)0x2b42, (q15_t)0x8789, (q15_t)0x2b3c, (q15_t)0x8787,
-  (q15_t)0x2b36, (q15_t)0x8784, (q15_t)0x2b30, (q15_t)0x8782, (q15_t)0x2b2b, (q15_t)0x8780, (q15_t)0x2b25, (q15_t)0x877e,
-  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b19, (q15_t)0x877a, (q15_t)0x2b13, (q15_t)0x8778, (q15_t)0x2b0d, (q15_t)0x8776,
-  (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2b01, (q15_t)0x8771, (q15_t)0x2afb, (q15_t)0x876f, (q15_t)0x2af5, (q15_t)0x876d,
-  (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ae9, (q15_t)0x8769, (q15_t)0x2ae4, (q15_t)0x8767, (q15_t)0x2ade, (q15_t)0x8765,
-  (q15_t)0x2ad8, (q15_t)0x8763, (q15_t)0x2ad2, (q15_t)0x8761, (q15_t)0x2acc, (q15_t)0x875e, (q15_t)0x2ac6, (q15_t)0x875c,
-  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aba, (q15_t)0x8758, (q15_t)0x2ab4, (q15_t)0x8756, (q15_t)0x2aae, (q15_t)0x8754,
-  (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2aa2, (q15_t)0x8750, (q15_t)0x2a9c, (q15_t)0x874e, (q15_t)0x2a97, (q15_t)0x874c,
-  (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a8b, (q15_t)0x8747, (q15_t)0x2a85, (q15_t)0x8745, (q15_t)0x2a7f, (q15_t)0x8743,
-  (q15_t)0x2a79, (q15_t)0x8741, (q15_t)0x2a73, (q15_t)0x873f, (q15_t)0x2a6d, (q15_t)0x873d, (q15_t)0x2a67, (q15_t)0x873b,
-  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a5b, (q15_t)0x8737, (q15_t)0x2a55, (q15_t)0x8735, (q15_t)0x2a4f, (q15_t)0x8733,
-  (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a44, (q15_t)0x872e, (q15_t)0x2a3e, (q15_t)0x872c, (q15_t)0x2a38, (q15_t)0x872a,
-  (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a2c, (q15_t)0x8726, (q15_t)0x2a26, (q15_t)0x8724, (q15_t)0x2a20, (q15_t)0x8722,
-  (q15_t)0x2a1a, (q15_t)0x8720, (q15_t)0x2a14, (q15_t)0x871e, (q15_t)0x2a0e, (q15_t)0x871c, (q15_t)0x2a08, (q15_t)0x871a,
-  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29fc, (q15_t)0x8716, (q15_t)0x29f6, (q15_t)0x8714, (q15_t)0x29f0, (q15_t)0x8712,
-  (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29e5, (q15_t)0x870d, (q15_t)0x29df, (q15_t)0x870b, (q15_t)0x29d9, (q15_t)0x8709,
-  (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29cd, (q15_t)0x8705, (q15_t)0x29c7, (q15_t)0x8703, (q15_t)0x29c1, (q15_t)0x8701,
-  (q15_t)0x29bb, (q15_t)0x86ff, (q15_t)0x29b5, (q15_t)0x86fd, (q15_t)0x29af, (q15_t)0x86fb, (q15_t)0x29a9, (q15_t)0x86f9,
-  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x299d, (q15_t)0x86f5, (q15_t)0x2997, (q15_t)0x86f3, (q15_t)0x2991, (q15_t)0x86f1,
-  (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2986, (q15_t)0x86ed, (q15_t)0x2980, (q15_t)0x86eb, (q15_t)0x297a, (q15_t)0x86e9,
-  (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x296e, (q15_t)0x86e4, (q15_t)0x2968, (q15_t)0x86e2, (q15_t)0x2962, (q15_t)0x86e0,
-  (q15_t)0x295c, (q15_t)0x86de, (q15_t)0x2956, (q15_t)0x86dc, (q15_t)0x2950, (q15_t)0x86da, (q15_t)0x294a, (q15_t)0x86d8,
-  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x293e, (q15_t)0x86d4, (q15_t)0x2938, (q15_t)0x86d2, (q15_t)0x2932, (q15_t)0x86d0,
-  (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2926, (q15_t)0x86cc, (q15_t)0x2920, (q15_t)0x86ca, (q15_t)0x291b, (q15_t)0x86c8,
-  (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x290f, (q15_t)0x86c4, (q15_t)0x2909, (q15_t)0x86c2, (q15_t)0x2903, (q15_t)0x86c0,
-  (q15_t)0x28fd, (q15_t)0x86be, (q15_t)0x28f7, (q15_t)0x86bc, (q15_t)0x28f1, (q15_t)0x86ba, (q15_t)0x28eb, (q15_t)0x86b8,
-  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28df, (q15_t)0x86b4, (q15_t)0x28d9, (q15_t)0x86b2, (q15_t)0x28d3, (q15_t)0x86b0,
-  (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28c7, (q15_t)0x86ac, (q15_t)0x28c1, (q15_t)0x86aa, (q15_t)0x28bb, (q15_t)0x86a8,
-  (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x28af, (q15_t)0x86a4, (q15_t)0x28a9, (q15_t)0x86a2, (q15_t)0x28a3, (q15_t)0x86a0,
-  (q15_t)0x289d, (q15_t)0x869e, (q15_t)0x2898, (q15_t)0x869c, (q15_t)0x2892, (q15_t)0x869a, (q15_t)0x288c, (q15_t)0x8698,
-  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x2880, (q15_t)0x8694, (q15_t)0x287a, (q15_t)0x8692, (q15_t)0x2874, (q15_t)0x8690,
-  (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2868, (q15_t)0x868c, (q15_t)0x2862, (q15_t)0x868a, (q15_t)0x285c, (q15_t)0x8688,
-  (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x2850, (q15_t)0x8684, (q15_t)0x284a, (q15_t)0x8682, (q15_t)0x2844, (q15_t)0x8680,
-  (q15_t)0x283e, (q15_t)0x867e, (q15_t)0x2838, (q15_t)0x867c, (q15_t)0x2832, (q15_t)0x867a, (q15_t)0x282c, (q15_t)0x8678,
-  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x2820, (q15_t)0x8674, (q15_t)0x281a, (q15_t)0x8672, (q15_t)0x2814, (q15_t)0x8670,
-  (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x2808, (q15_t)0x866d, (q15_t)0x2802, (q15_t)0x866b, (q15_t)0x27fc, (q15_t)0x8669,
-  (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27f1, (q15_t)0x8665, (q15_t)0x27eb, (q15_t)0x8663, (q15_t)0x27e5, (q15_t)0x8661,
-  (q15_t)0x27df, (q15_t)0x865f, (q15_t)0x27d9, (q15_t)0x865d, (q15_t)0x27d3, (q15_t)0x865b, (q15_t)0x27cd, (q15_t)0x8659,
-  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27c1, (q15_t)0x8655, (q15_t)0x27bb, (q15_t)0x8653, (q15_t)0x27b5, (q15_t)0x8651,
-  (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x27a9, (q15_t)0x864d, (q15_t)0x27a3, (q15_t)0x864b, (q15_t)0x279d, (q15_t)0x8649,
-  (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x2791, (q15_t)0x8645, (q15_t)0x278b, (q15_t)0x8644, (q15_t)0x2785, (q15_t)0x8642,
-  (q15_t)0x277f, (q15_t)0x8640, (q15_t)0x2779, (q15_t)0x863e, (q15_t)0x2773, (q15_t)0x863c, (q15_t)0x276d, (q15_t)0x863a,
-  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2761, (q15_t)0x8636, (q15_t)0x275b, (q15_t)0x8634, (q15_t)0x2755, (q15_t)0x8632,
-  (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2749, (q15_t)0x862e, (q15_t)0x2743, (q15_t)0x862c, (q15_t)0x273d, (q15_t)0x862a,
-  (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x2731, (q15_t)0x8627, (q15_t)0x272b, (q15_t)0x8625, (q15_t)0x2725, (q15_t)0x8623,
-  (q15_t)0x271f, (q15_t)0x8621, (q15_t)0x2719, (q15_t)0x861f, (q15_t)0x2713, (q15_t)0x861d, (q15_t)0x270d, (q15_t)0x861b,
-  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x2701, (q15_t)0x8617, (q15_t)0x26fb, (q15_t)0x8615, (q15_t)0x26f5, (q15_t)0x8613,
-  (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26e9, (q15_t)0x8610, (q15_t)0x26e4, (q15_t)0x860e, (q15_t)0x26de, (q15_t)0x860c,
-  (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26d2, (q15_t)0x8608, (q15_t)0x26cc, (q15_t)0x8606, (q15_t)0x26c6, (q15_t)0x8604,
-  (q15_t)0x26c0, (q15_t)0x8602, (q15_t)0x26ba, (q15_t)0x8600, (q15_t)0x26b4, (q15_t)0x85fe, (q15_t)0x26ae, (q15_t)0x85fc,
-  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x26a2, (q15_t)0x85f9, (q15_t)0x269c, (q15_t)0x85f7, (q15_t)0x2696, (q15_t)0x85f5,
-  (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x268a, (q15_t)0x85f1, (q15_t)0x2684, (q15_t)0x85ef, (q15_t)0x267e, (q15_t)0x85ed,
-  (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2672, (q15_t)0x85ea, (q15_t)0x266c, (q15_t)0x85e8, (q15_t)0x2666, (q15_t)0x85e6,
-  (q15_t)0x2660, (q15_t)0x85e4, (q15_t)0x265a, (q15_t)0x85e2, (q15_t)0x2654, (q15_t)0x85e0, (q15_t)0x264e, (q15_t)0x85de,
-  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2642, (q15_t)0x85da, (q15_t)0x263c, (q15_t)0x85d9, (q15_t)0x2636, (q15_t)0x85d7,
-  (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x262a, (q15_t)0x85d3, (q15_t)0x2624, (q15_t)0x85d1, (q15_t)0x261e, (q15_t)0x85cf,
-  (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2612, (q15_t)0x85cb, (q15_t)0x260c, (q15_t)0x85ca, (q15_t)0x2606, (q15_t)0x85c8,
-  (q15_t)0x2600, (q15_t)0x85c6, (q15_t)0x25fa, (q15_t)0x85c4, (q15_t)0x25f4, (q15_t)0x85c2, (q15_t)0x25ee, (q15_t)0x85c0,
-  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25e2, (q15_t)0x85bd, (q15_t)0x25dc, (q15_t)0x85bb, (q15_t)0x25d6, (q15_t)0x85b9,
-  (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25ca, (q15_t)0x85b5, (q15_t)0x25c4, (q15_t)0x85b3, (q15_t)0x25be, (q15_t)0x85b1,
-  (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25b2, (q15_t)0x85ae, (q15_t)0x25ac, (q15_t)0x85ac, (q15_t)0x25a6, (q15_t)0x85aa,
-  (q15_t)0x25a0, (q15_t)0x85a8, (q15_t)0x259a, (q15_t)0x85a6, (q15_t)0x2594, (q15_t)0x85a4, (q15_t)0x258e, (q15_t)0x85a3,
-  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2582, (q15_t)0x859f, (q15_t)0x257c, (q15_t)0x859d, (q15_t)0x2576, (q15_t)0x859b,
-  (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x256a, (q15_t)0x8598, (q15_t)0x2564, (q15_t)0x8596, (q15_t)0x255e, (q15_t)0x8594,
-  (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2552, (q15_t)0x8590, (q15_t)0x254c, (q15_t)0x858e, (q15_t)0x2546, (q15_t)0x858d,
-  (q15_t)0x2540, (q15_t)0x858b, (q15_t)0x253a, (q15_t)0x8589, (q15_t)0x2534, (q15_t)0x8587, (q15_t)0x252e, (q15_t)0x8585,
-  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x2522, (q15_t)0x8582, (q15_t)0x251c, (q15_t)0x8580, (q15_t)0x2516, (q15_t)0x857e,
-  (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x2509, (q15_t)0x857a, (q15_t)0x2503, (q15_t)0x8579, (q15_t)0x24fd, (q15_t)0x8577,
-  (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24f1, (q15_t)0x8573, (q15_t)0x24eb, (q15_t)0x8571, (q15_t)0x24e5, (q15_t)0x856f,
-  (q15_t)0x24df, (q15_t)0x856e, (q15_t)0x24d9, (q15_t)0x856c, (q15_t)0x24d3, (q15_t)0x856a, (q15_t)0x24cd, (q15_t)0x8568,
-  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24c1, (q15_t)0x8565, (q15_t)0x24bb, (q15_t)0x8563, (q15_t)0x24b5, (q15_t)0x8561,
-  (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x24a9, (q15_t)0x855d, (q15_t)0x24a3, (q15_t)0x855c, (q15_t)0x249d, (q15_t)0x855a,
-  (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x2491, (q15_t)0x8556, (q15_t)0x248b, (q15_t)0x8554, (q15_t)0x2485, (q15_t)0x8553,
-  (q15_t)0x247f, (q15_t)0x8551, (q15_t)0x2479, (q15_t)0x854f, (q15_t)0x2473, (q15_t)0x854d, (q15_t)0x246d, (q15_t)0x854b,
-  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2461, (q15_t)0x8548, (q15_t)0x245b, (q15_t)0x8546, (q15_t)0x2455, (q15_t)0x8544,
-  (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2449, (q15_t)0x8541, (q15_t)0x2443, (q15_t)0x853f, (q15_t)0x243d, (q15_t)0x853d,
-  (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x2431, (q15_t)0x853a, (q15_t)0x242b, (q15_t)0x8538, (q15_t)0x2425, (q15_t)0x8536,
-  (q15_t)0x241f, (q15_t)0x8534, (q15_t)0x2419, (q15_t)0x8533, (q15_t)0x2413, (q15_t)0x8531, (q15_t)0x240d, (q15_t)0x852f,
-  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x2401, (q15_t)0x852b, (q15_t)0x23fa, (q15_t)0x852a, (q15_t)0x23f4, (q15_t)0x8528,
-  (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23e8, (q15_t)0x8524, (q15_t)0x23e2, (q15_t)0x8523, (q15_t)0x23dc, (q15_t)0x8521,
-  (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23d0, (q15_t)0x851d, (q15_t)0x23ca, (q15_t)0x851c, (q15_t)0x23c4, (q15_t)0x851a,
-  (q15_t)0x23be, (q15_t)0x8518, (q15_t)0x23b8, (q15_t)0x8516, (q15_t)0x23b2, (q15_t)0x8515, (q15_t)0x23ac, (q15_t)0x8513,
-  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x23a0, (q15_t)0x850f, (q15_t)0x239a, (q15_t)0x850e, (q15_t)0x2394, (q15_t)0x850c,
-  (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2388, (q15_t)0x8508, (q15_t)0x2382, (q15_t)0x8507, (q15_t)0x237c, (q15_t)0x8505,
-  (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x2370, (q15_t)0x8501, (q15_t)0x236a, (q15_t)0x8500, (q15_t)0x2364, (q15_t)0x84fe,
-  (q15_t)0x235e, (q15_t)0x84fc, (q15_t)0x2358, (q15_t)0x84fa, (q15_t)0x2352, (q15_t)0x84f9, (q15_t)0x234b, (q15_t)0x84f7,
-  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x233f, (q15_t)0x84f4, (q15_t)0x2339, (q15_t)0x84f2, (q15_t)0x2333, (q15_t)0x84f0,
-  (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2327, (q15_t)0x84ed, (q15_t)0x2321, (q15_t)0x84eb, (q15_t)0x231b, (q15_t)0x84e9,
-  (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x230f, (q15_t)0x84e6, (q15_t)0x2309, (q15_t)0x84e4, (q15_t)0x2303, (q15_t)0x84e2,
-  (q15_t)0x22fd, (q15_t)0x84e1, (q15_t)0x22f7, (q15_t)0x84df, (q15_t)0x22f1, (q15_t)0x84dd, (q15_t)0x22eb, (q15_t)0x84db,
-  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22df, (q15_t)0x84d8, (q15_t)0x22d9, (q15_t)0x84d6, (q15_t)0x22d3, (q15_t)0x84d5,
-  (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22c7, (q15_t)0x84d1, (q15_t)0x22c0, (q15_t)0x84cf, (q15_t)0x22ba, (q15_t)0x84ce,
-  (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x22ae, (q15_t)0x84ca, (q15_t)0x22a8, (q15_t)0x84c9, (q15_t)0x22a2, (q15_t)0x84c7,
-  (q15_t)0x229c, (q15_t)0x84c5, (q15_t)0x2296, (q15_t)0x84c4, (q15_t)0x2290, (q15_t)0x84c2, (q15_t)0x228a, (q15_t)0x84c0,
-  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x227e, (q15_t)0x84bd, (q15_t)0x2278, (q15_t)0x84bb, (q15_t)0x2272, (q15_t)0x84b9,
-  (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2266, (q15_t)0x84b6, (q15_t)0x2260, (q15_t)0x84b4, (q15_t)0x225a, (q15_t)0x84b3,
-  (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x224e, (q15_t)0x84af, (q15_t)0x2247, (q15_t)0x84ae, (q15_t)0x2241, (q15_t)0x84ac,
-  (q15_t)0x223b, (q15_t)0x84aa, (q15_t)0x2235, (q15_t)0x84a9, (q15_t)0x222f, (q15_t)0x84a7, (q15_t)0x2229, (q15_t)0x84a5,
-  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x221d, (q15_t)0x84a2, (q15_t)0x2217, (q15_t)0x84a0, (q15_t)0x2211, (q15_t)0x849e,
-  (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x2205, (q15_t)0x849b, (q15_t)0x21ff, (q15_t)0x8499, (q15_t)0x21f9, (q15_t)0x8498,
-  (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21ed, (q15_t)0x8494, (q15_t)0x21e7, (q15_t)0x8493, (q15_t)0x21e1, (q15_t)0x8491,
-  (q15_t)0x21da, (q15_t)0x848f, (q15_t)0x21d4, (q15_t)0x848e, (q15_t)0x21ce, (q15_t)0x848c, (q15_t)0x21c8, (q15_t)0x848a,
-  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21bc, (q15_t)0x8487, (q15_t)0x21b6, (q15_t)0x8486, (q15_t)0x21b0, (q15_t)0x8484,
-  (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x21a4, (q15_t)0x8481, (q15_t)0x219e, (q15_t)0x847f, (q15_t)0x2198, (q15_t)0x847d,
-  (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x218c, (q15_t)0x847a, (q15_t)0x2186, (q15_t)0x8478, (q15_t)0x2180, (q15_t)0x8477,
-  (q15_t)0x2179, (q15_t)0x8475, (q15_t)0x2173, (q15_t)0x8473, (q15_t)0x216d, (q15_t)0x8472, (q15_t)0x2167, (q15_t)0x8470,
-  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x215b, (q15_t)0x846d, (q15_t)0x2155, (q15_t)0x846b, (q15_t)0x214f, (q15_t)0x846a,
-  (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2143, (q15_t)0x8466, (q15_t)0x213d, (q15_t)0x8465, (q15_t)0x2137, (q15_t)0x8463,
-  (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x212b, (q15_t)0x8460, (q15_t)0x2125, (q15_t)0x845e, (q15_t)0x211e, (q15_t)0x845d,
-  (q15_t)0x2118, (q15_t)0x845b, (q15_t)0x2112, (q15_t)0x8459, (q15_t)0x210c, (q15_t)0x8458, (q15_t)0x2106, (q15_t)0x8456,
-  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20fa, (q15_t)0x8453, (q15_t)0x20f4, (q15_t)0x8451, (q15_t)0x20ee, (q15_t)0x8450,
-  (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20e2, (q15_t)0x844c, (q15_t)0x20dc, (q15_t)0x844b, (q15_t)0x20d6, (q15_t)0x8449,
-  (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20c9, (q15_t)0x8446, (q15_t)0x20c3, (q15_t)0x8444, (q15_t)0x20bd, (q15_t)0x8443,
-  (q15_t)0x20b7, (q15_t)0x8441, (q15_t)0x20b1, (q15_t)0x843f, (q15_t)0x20ab, (q15_t)0x843e, (q15_t)0x20a5, (q15_t)0x843c,
-  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2099, (q15_t)0x8439, (q15_t)0x2093, (q15_t)0x8437, (q15_t)0x208d, (q15_t)0x8436,
-  (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x2081, (q15_t)0x8433, (q15_t)0x207a, (q15_t)0x8431, (q15_t)0x2074, (q15_t)0x842f,
-  (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2068, (q15_t)0x842c, (q15_t)0x2062, (q15_t)0x842b, (q15_t)0x205c, (q15_t)0x8429,
-  (q15_t)0x2056, (q15_t)0x8427, (q15_t)0x2050, (q15_t)0x8426, (q15_t)0x204a, (q15_t)0x8424, (q15_t)0x2044, (q15_t)0x8423,
-  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2038, (q15_t)0x8420, (q15_t)0x2032, (q15_t)0x841e, (q15_t)0x202b, (q15_t)0x841c,
-  (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x201f, (q15_t)0x8419, (q15_t)0x2019, (q15_t)0x8418, (q15_t)0x2013, (q15_t)0x8416,
-  (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x2007, (q15_t)0x8413, (q15_t)0x2001, (q15_t)0x8411, (q15_t)0x1ffb, (q15_t)0x8410,
-  (q15_t)0x1ff5, (q15_t)0x840e, (q15_t)0x1fef, (q15_t)0x840d, (q15_t)0x1fe9, (q15_t)0x840b, (q15_t)0x1fe2, (q15_t)0x840a,
-  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fd6, (q15_t)0x8406, (q15_t)0x1fd0, (q15_t)0x8405, (q15_t)0x1fca, (q15_t)0x8403,
-  (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fbe, (q15_t)0x8400, (q15_t)0x1fb8, (q15_t)0x83ff, (q15_t)0x1fb2, (q15_t)0x83fd,
-  (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1fa6, (q15_t)0x83fa, (q15_t)0x1f9f, (q15_t)0x83f8, (q15_t)0x1f99, (q15_t)0x83f7,
-  (q15_t)0x1f93, (q15_t)0x83f5, (q15_t)0x1f8d, (q15_t)0x83f4, (q15_t)0x1f87, (q15_t)0x83f2, (q15_t)0x1f81, (q15_t)0x83f1,
-  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f75, (q15_t)0x83ee, (q15_t)0x1f6f, (q15_t)0x83ec, (q15_t)0x1f69, (q15_t)0x83ea,
-  (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f5d, (q15_t)0x83e7, (q15_t)0x1f56, (q15_t)0x83e6, (q15_t)0x1f50, (q15_t)0x83e4,
-  (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f44, (q15_t)0x83e1, (q15_t)0x1f3e, (q15_t)0x83e0, (q15_t)0x1f38, (q15_t)0x83de,
-  (q15_t)0x1f32, (q15_t)0x83dd, (q15_t)0x1f2c, (q15_t)0x83db, (q15_t)0x1f26, (q15_t)0x83da, (q15_t)0x1f20, (q15_t)0x83d8,
-  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f13, (q15_t)0x83d5, (q15_t)0x1f0d, (q15_t)0x83d3, (q15_t)0x1f07, (q15_t)0x83d2,
-  (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1efb, (q15_t)0x83cf, (q15_t)0x1ef5, (q15_t)0x83cd, (q15_t)0x1eef, (q15_t)0x83cc,
-  (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ee3, (q15_t)0x83c9, (q15_t)0x1edd, (q15_t)0x83c7, (q15_t)0x1ed6, (q15_t)0x83c6,
-  (q15_t)0x1ed0, (q15_t)0x83c4, (q15_t)0x1eca, (q15_t)0x83c3, (q15_t)0x1ec4, (q15_t)0x83c1, (q15_t)0x1ebe, (q15_t)0x83c0,
-  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1eb2, (q15_t)0x83bd, (q15_t)0x1eac, (q15_t)0x83bb, (q15_t)0x1ea6, (q15_t)0x83ba,
-  (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e99, (q15_t)0x83b7, (q15_t)0x1e93, (q15_t)0x83b5, (q15_t)0x1e8d, (q15_t)0x83b4,
-  (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e81, (q15_t)0x83b1, (q15_t)0x1e7b, (q15_t)0x83af, (q15_t)0x1e75, (q15_t)0x83ae,
-  (q15_t)0x1e6f, (q15_t)0x83ac, (q15_t)0x1e69, (q15_t)0x83ab, (q15_t)0x1e62, (q15_t)0x83a9, (q15_t)0x1e5c, (q15_t)0x83a8,
-  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e50, (q15_t)0x83a5, (q15_t)0x1e4a, (q15_t)0x83a3, (q15_t)0x1e44, (q15_t)0x83a2,
-  (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e38, (q15_t)0x839f, (q15_t)0x1e32, (q15_t)0x839d, (q15_t)0x1e2c, (q15_t)0x839c,
-  (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e1f, (q15_t)0x8399, (q15_t)0x1e19, (q15_t)0x8397, (q15_t)0x1e13, (q15_t)0x8396,
-  (q15_t)0x1e0d, (q15_t)0x8394, (q15_t)0x1e07, (q15_t)0x8393, (q15_t)0x1e01, (q15_t)0x8392, (q15_t)0x1dfb, (q15_t)0x8390,
-  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1dee, (q15_t)0x838d, (q15_t)0x1de8, (q15_t)0x838c, (q15_t)0x1de2, (q15_t)0x838a,
-  (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dd6, (q15_t)0x8387, (q15_t)0x1dd0, (q15_t)0x8386, (q15_t)0x1dca, (q15_t)0x8384,
-  (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dbe, (q15_t)0x8381, (q15_t)0x1db7, (q15_t)0x8380, (q15_t)0x1db1, (q15_t)0x837e,
-  (q15_t)0x1dab, (q15_t)0x837d, (q15_t)0x1da5, (q15_t)0x837c, (q15_t)0x1d9f, (q15_t)0x837a, (q15_t)0x1d99, (q15_t)0x8379,
-  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d8d, (q15_t)0x8376, (q15_t)0x1d87, (q15_t)0x8374, (q15_t)0x1d80, (q15_t)0x8373,
-  (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d74, (q15_t)0x8370, (q15_t)0x1d6e, (q15_t)0x836f, (q15_t)0x1d68, (q15_t)0x836d,
-  (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d5c, (q15_t)0x836a, (q15_t)0x1d56, (q15_t)0x8369, (q15_t)0x1d50, (q15_t)0x8367,
-  (q15_t)0x1d49, (q15_t)0x8366, (q15_t)0x1d43, (q15_t)0x8364, (q15_t)0x1d3d, (q15_t)0x8363, (q15_t)0x1d37, (q15_t)0x8362,
-  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d2b, (q15_t)0x835f, (q15_t)0x1d25, (q15_t)0x835d, (q15_t)0x1d1f, (q15_t)0x835c,
-  (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d12, (q15_t)0x8359, (q15_t)0x1d0c, (q15_t)0x8358, (q15_t)0x1d06, (q15_t)0x8356,
-  (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1cfa, (q15_t)0x8353, (q15_t)0x1cf4, (q15_t)0x8352, (q15_t)0x1cee, (q15_t)0x8350,
-  (q15_t)0x1ce8, (q15_t)0x834f, (q15_t)0x1ce1, (q15_t)0x834e, (q15_t)0x1cdb, (q15_t)0x834c, (q15_t)0x1cd5, (q15_t)0x834b,
-  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cc9, (q15_t)0x8348, (q15_t)0x1cc3, (q15_t)0x8347, (q15_t)0x1cbd, (q15_t)0x8345,
-  (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1cb0, (q15_t)0x8342, (q15_t)0x1caa, (q15_t)0x8341, (q15_t)0x1ca4, (q15_t)0x833f,
-  (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c98, (q15_t)0x833d, (q15_t)0x1c92, (q15_t)0x833b, (q15_t)0x1c8c, (q15_t)0x833a,
-  (q15_t)0x1c86, (q15_t)0x8338, (q15_t)0x1c7f, (q15_t)0x8337, (q15_t)0x1c79, (q15_t)0x8336, (q15_t)0x1c73, (q15_t)0x8334,
-  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c67, (q15_t)0x8331, (q15_t)0x1c61, (q15_t)0x8330, (q15_t)0x1c5b, (q15_t)0x832f,
-  (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c4e, (q15_t)0x832c, (q15_t)0x1c48, (q15_t)0x832b, (q15_t)0x1c42, (q15_t)0x8329,
-  (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c36, (q15_t)0x8326, (q15_t)0x1c30, (q15_t)0x8325, (q15_t)0x1c2a, (q15_t)0x8324,
-  (q15_t)0x1c24, (q15_t)0x8322, (q15_t)0x1c1d, (q15_t)0x8321, (q15_t)0x1c17, (q15_t)0x831f, (q15_t)0x1c11, (q15_t)0x831e,
-  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1c05, (q15_t)0x831b, (q15_t)0x1bff, (q15_t)0x831a, (q15_t)0x1bf9, (q15_t)0x8319,
-  (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bec, (q15_t)0x8316, (q15_t)0x1be6, (q15_t)0x8314, (q15_t)0x1be0, (q15_t)0x8313,
-  (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bd4, (q15_t)0x8310, (q15_t)0x1bce, (q15_t)0x830f, (q15_t)0x1bc8, (q15_t)0x830e,
-  (q15_t)0x1bc1, (q15_t)0x830c, (q15_t)0x1bbb, (q15_t)0x830b, (q15_t)0x1bb5, (q15_t)0x830a, (q15_t)0x1baf, (q15_t)0x8308,
-  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1ba3, (q15_t)0x8305, (q15_t)0x1b9d, (q15_t)0x8304, (q15_t)0x1b96, (q15_t)0x8303,
-  (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b8a, (q15_t)0x8300, (q15_t)0x1b84, (q15_t)0x82ff, (q15_t)0x1b7e, (q15_t)0x82fd,
-  (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b72, (q15_t)0x82fb, (q15_t)0x1b6c, (q15_t)0x82f9, (q15_t)0x1b65, (q15_t)0x82f8,
-  (q15_t)0x1b5f, (q15_t)0x82f7, (q15_t)0x1b59, (q15_t)0x82f5, (q15_t)0x1b53, (q15_t)0x82f4, (q15_t)0x1b4d, (q15_t)0x82f3,
-  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b41, (q15_t)0x82f0, (q15_t)0x1b3a, (q15_t)0x82ef, (q15_t)0x1b34, (q15_t)0x82ed,
-  (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b28, (q15_t)0x82eb, (q15_t)0x1b22, (q15_t)0x82e9, (q15_t)0x1b1c, (q15_t)0x82e8,
-  (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1b0f, (q15_t)0x82e5, (q15_t)0x1b09, (q15_t)0x82e4, (q15_t)0x1b03, (q15_t)0x82e3,
-  (q15_t)0x1afd, (q15_t)0x82e1, (q15_t)0x1af7, (q15_t)0x82e0, (q15_t)0x1af1, (q15_t)0x82df, (q15_t)0x1aeb, (q15_t)0x82dd,
-  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1ade, (q15_t)0x82db, (q15_t)0x1ad8, (q15_t)0x82d9, (q15_t)0x1ad2, (q15_t)0x82d8,
-  (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ac6, (q15_t)0x82d5, (q15_t)0x1ac0, (q15_t)0x82d4, (q15_t)0x1ab9, (q15_t)0x82d3,
-  (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1aad, (q15_t)0x82d0, (q15_t)0x1aa7, (q15_t)0x82cf, (q15_t)0x1aa1, (q15_t)0x82ce,
-  (q15_t)0x1a9b, (q15_t)0x82cc, (q15_t)0x1a95, (q15_t)0x82cb, (q15_t)0x1a8e, (q15_t)0x82ca, (q15_t)0x1a88, (q15_t)0x82c8,
-  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a7c, (q15_t)0x82c6, (q15_t)0x1a76, (q15_t)0x82c4, (q15_t)0x1a70, (q15_t)0x82c3,
-  (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a63, (q15_t)0x82c1, (q15_t)0x1a5d, (q15_t)0x82bf, (q15_t)0x1a57, (q15_t)0x82be,
-  (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a4b, (q15_t)0x82bb, (q15_t)0x1a45, (q15_t)0x82ba, (q15_t)0x1a3e, (q15_t)0x82b9,
-  (q15_t)0x1a38, (q15_t)0x82b7, (q15_t)0x1a32, (q15_t)0x82b6, (q15_t)0x1a2c, (q15_t)0x82b5, (q15_t)0x1a26, (q15_t)0x82b4,
-  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a1a, (q15_t)0x82b1, (q15_t)0x1a13, (q15_t)0x82b0, (q15_t)0x1a0d, (q15_t)0x82ae,
-  (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x1a01, (q15_t)0x82ac, (q15_t)0x19fb, (q15_t)0x82ab, (q15_t)0x19f5, (q15_t)0x82a9,
-  (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19e8, (q15_t)0x82a7, (q15_t)0x19e2, (q15_t)0x82a6, (q15_t)0x19dc, (q15_t)0x82a4,
-  (q15_t)0x19d6, (q15_t)0x82a3, (q15_t)0x19d0, (q15_t)0x82a2, (q15_t)0x19ca, (q15_t)0x82a0, (q15_t)0x19c3, (q15_t)0x829f,
-  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19b7, (q15_t)0x829d, (q15_t)0x19b1, (q15_t)0x829b, (q15_t)0x19ab, (q15_t)0x829a,
-  (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x199f, (q15_t)0x8298, (q15_t)0x1998, (q15_t)0x8296, (q15_t)0x1992, (q15_t)0x8295,
-  (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1986, (q15_t)0x8293, (q15_t)0x1980, (q15_t)0x8291, (q15_t)0x197a, (q15_t)0x8290,
-  (q15_t)0x1973, (q15_t)0x828f, (q15_t)0x196d, (q15_t)0x828e, (q15_t)0x1967, (q15_t)0x828c, (q15_t)0x1961, (q15_t)0x828b,
-  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1955, (q15_t)0x8289, (q15_t)0x194e, (q15_t)0x8287, (q15_t)0x1948, (q15_t)0x8286,
-  (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x193c, (q15_t)0x8284, (q15_t)0x1936, (q15_t)0x8282, (q15_t)0x1930, (q15_t)0x8281,
-  (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1923, (q15_t)0x827f, (q15_t)0x191d, (q15_t)0x827e, (q15_t)0x1917, (q15_t)0x827c,
-  (q15_t)0x1911, (q15_t)0x827b, (q15_t)0x190b, (q15_t)0x827a, (q15_t)0x1905, (q15_t)0x8279, (q15_t)0x18fe, (q15_t)0x8277,
-  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18f2, (q15_t)0x8275, (q15_t)0x18ec, (q15_t)0x8274, (q15_t)0x18e6, (q15_t)0x8272,
-  (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18d9, (q15_t)0x8270, (q15_t)0x18d3, (q15_t)0x826f, (q15_t)0x18cd, (q15_t)0x826e,
-  (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18c1, (q15_t)0x826b, (q15_t)0x18bb, (q15_t)0x826a, (q15_t)0x18b4, (q15_t)0x8269,
-  (q15_t)0x18ae, (q15_t)0x8268, (q15_t)0x18a8, (q15_t)0x8266, (q15_t)0x18a2, (q15_t)0x8265, (q15_t)0x189c, (q15_t)0x8264,
-  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x188f, (q15_t)0x8261, (q15_t)0x1889, (q15_t)0x8260, (q15_t)0x1883, (q15_t)0x825f,
-  (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1877, (q15_t)0x825d, (q15_t)0x1871, (q15_t)0x825b, (q15_t)0x186a, (q15_t)0x825a,
-  (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x185e, (q15_t)0x8258, (q15_t)0x1858, (q15_t)0x8257, (q15_t)0x1852, (q15_t)0x8255,
-  (q15_t)0x184c, (q15_t)0x8254, (q15_t)0x1845, (q15_t)0x8253, (q15_t)0x183f, (q15_t)0x8252, (q15_t)0x1839, (q15_t)0x8251,
-  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x182d, (q15_t)0x824e, (q15_t)0x1827, (q15_t)0x824d, (q15_t)0x1820, (q15_t)0x824c,
-  (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1814, (q15_t)0x824a, (q15_t)0x180e, (q15_t)0x8248, (q15_t)0x1808, (q15_t)0x8247,
-  (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17fb, (q15_t)0x8245, (q15_t)0x17f5, (q15_t)0x8244, (q15_t)0x17ef, (q15_t)0x8243,
-  (q15_t)0x17e9, (q15_t)0x8241, (q15_t)0x17e3, (q15_t)0x8240, (q15_t)0x17dd, (q15_t)0x823f, (q15_t)0x17d6, (q15_t)0x823e,
-  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17ca, (q15_t)0x823b, (q15_t)0x17c4, (q15_t)0x823a, (q15_t)0x17be, (q15_t)0x8239,
-  (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x17b1, (q15_t)0x8237, (q15_t)0x17ab, (q15_t)0x8236, (q15_t)0x17a5, (q15_t)0x8234,
-  (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1799, (q15_t)0x8232, (q15_t)0x1792, (q15_t)0x8231, (q15_t)0x178c, (q15_t)0x8230,
-  (q15_t)0x1786, (q15_t)0x822f, (q15_t)0x1780, (q15_t)0x822e, (q15_t)0x177a, (q15_t)0x822c, (q15_t)0x1774, (q15_t)0x822b,
-  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1767, (q15_t)0x8229, (q15_t)0x1761, (q15_t)0x8228, (q15_t)0x175b, (q15_t)0x8227,
-  (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x174e, (q15_t)0x8224, (q15_t)0x1748, (q15_t)0x8223, (q15_t)0x1742, (q15_t)0x8222,
-  (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1736, (q15_t)0x8220, (q15_t)0x1730, (q15_t)0x821f, (q15_t)0x1729, (q15_t)0x821e,
-  (q15_t)0x1723, (q15_t)0x821c, (q15_t)0x171d, (q15_t)0x821b, (q15_t)0x1717, (q15_t)0x821a, (q15_t)0x1711, (q15_t)0x8219,
-  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x1704, (q15_t)0x8217, (q15_t)0x16fe, (q15_t)0x8216, (q15_t)0x16f8, (q15_t)0x8214,
-  (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16ec, (q15_t)0x8212, (q15_t)0x16e5, (q15_t)0x8211, (q15_t)0x16df, (q15_t)0x8210,
-  (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16d3, (q15_t)0x820e, (q15_t)0x16cd, (q15_t)0x820d, (q15_t)0x16c6, (q15_t)0x820b,
-  (q15_t)0x16c0, (q15_t)0x820a, (q15_t)0x16ba, (q15_t)0x8209, (q15_t)0x16b4, (q15_t)0x8208, (q15_t)0x16ae, (q15_t)0x8207,
-  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x16a1, (q15_t)0x8205, (q15_t)0x169b, (q15_t)0x8204, (q15_t)0x1695, (q15_t)0x8203,
-  (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1689, (q15_t)0x8200, (q15_t)0x1682, (q15_t)0x81ff, (q15_t)0x167c, (q15_t)0x81fe,
-  (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x1670, (q15_t)0x81fc, (q15_t)0x166a, (q15_t)0x81fb, (q15_t)0x1664, (q15_t)0x81fa,
-  (q15_t)0x165d, (q15_t)0x81f9, (q15_t)0x1657, (q15_t)0x81f8, (q15_t)0x1651, (q15_t)0x81f6, (q15_t)0x164b, (q15_t)0x81f5,
-  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x163e, (q15_t)0x81f3, (q15_t)0x1638, (q15_t)0x81f2, (q15_t)0x1632, (q15_t)0x81f1,
-  (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1626, (q15_t)0x81ef, (q15_t)0x161f, (q15_t)0x81ee, (q15_t)0x1619, (q15_t)0x81ed,
-  (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x160d, (q15_t)0x81ea, (q15_t)0x1607, (q15_t)0x81e9, (q15_t)0x1601, (q15_t)0x81e8,
-  (q15_t)0x15fa, (q15_t)0x81e7, (q15_t)0x15f4, (q15_t)0x81e6, (q15_t)0x15ee, (q15_t)0x81e5, (q15_t)0x15e8, (q15_t)0x81e4,
-  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15db, (q15_t)0x81e2, (q15_t)0x15d5, (q15_t)0x81e1, (q15_t)0x15cf, (q15_t)0x81e0,
-  (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15c3, (q15_t)0x81de, (q15_t)0x15bc, (q15_t)0x81dc, (q15_t)0x15b6, (q15_t)0x81db,
-  (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x15aa, (q15_t)0x81d9, (q15_t)0x15a4, (q15_t)0x81d8, (q15_t)0x159d, (q15_t)0x81d7,
-  (q15_t)0x1597, (q15_t)0x81d6, (q15_t)0x1591, (q15_t)0x81d5, (q15_t)0x158b, (q15_t)0x81d4, (q15_t)0x1585, (q15_t)0x81d3,
-  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1578, (q15_t)0x81d1, (q15_t)0x1572, (q15_t)0x81d0, (q15_t)0x156c, (q15_t)0x81cf,
-  (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x1560, (q15_t)0x81cd, (q15_t)0x1559, (q15_t)0x81cc, (q15_t)0x1553, (q15_t)0x81cb,
-  (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1547, (q15_t)0x81c8, (q15_t)0x1541, (q15_t)0x81c7, (q15_t)0x153a, (q15_t)0x81c6,
-  (q15_t)0x1534, (q15_t)0x81c5, (q15_t)0x152e, (q15_t)0x81c4, (q15_t)0x1528, (q15_t)0x81c3, (q15_t)0x1522, (q15_t)0x81c2,
-  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1515, (q15_t)0x81c0, (q15_t)0x150f, (q15_t)0x81bf, (q15_t)0x1509, (q15_t)0x81be,
-  (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14fc, (q15_t)0x81bc, (q15_t)0x14f6, (q15_t)0x81bb, (q15_t)0x14f0, (q15_t)0x81ba,
-  (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14e4, (q15_t)0x81b8, (q15_t)0x14dd, (q15_t)0x81b7, (q15_t)0x14d7, (q15_t)0x81b6,
-  (q15_t)0x14d1, (q15_t)0x81b5, (q15_t)0x14cb, (q15_t)0x81b4, (q15_t)0x14c5, (q15_t)0x81b3, (q15_t)0x14be, (q15_t)0x81b2,
-  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x14b2, (q15_t)0x81b0, (q15_t)0x14ac, (q15_t)0x81af, (q15_t)0x14a6, (q15_t)0x81ae,
-  (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1499, (q15_t)0x81ac, (q15_t)0x1493, (q15_t)0x81ab, (q15_t)0x148d, (q15_t)0x81aa,
-  (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x1480, (q15_t)0x81a8, (q15_t)0x147a, (q15_t)0x81a7, (q15_t)0x1474, (q15_t)0x81a6,
-  (q15_t)0x146e, (q15_t)0x81a5, (q15_t)0x1468, (q15_t)0x81a4, (q15_t)0x1461, (q15_t)0x81a3, (q15_t)0x145b, (q15_t)0x81a2,
-  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x144f, (q15_t)0x81a0, (q15_t)0x1449, (q15_t)0x819f, (q15_t)0x1442, (q15_t)0x819e,
-  (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1436, (q15_t)0x819c, (q15_t)0x1430, (q15_t)0x819b, (q15_t)0x142a, (q15_t)0x819a,
-  (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x141d, (q15_t)0x8198, (q15_t)0x1417, (q15_t)0x8197, (q15_t)0x1411, (q15_t)0x8196,
-  (q15_t)0x140b, (q15_t)0x8195, (q15_t)0x1404, (q15_t)0x8194, (q15_t)0x13fe, (q15_t)0x8193, (q15_t)0x13f8, (q15_t)0x8192,
-  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13eb, (q15_t)0x8190, (q15_t)0x13e5, (q15_t)0x818f, (q15_t)0x13df, (q15_t)0x818e,
-  (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13d3, (q15_t)0x818c, (q15_t)0x13cc, (q15_t)0x818b, (q15_t)0x13c6, (q15_t)0x818a,
-  (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13ba, (q15_t)0x8188, (q15_t)0x13b4, (q15_t)0x8187, (q15_t)0x13ad, (q15_t)0x8186,
-  (q15_t)0x13a7, (q15_t)0x8185, (q15_t)0x13a1, (q15_t)0x8184, (q15_t)0x139b, (q15_t)0x8183, (q15_t)0x1395, (q15_t)0x8182,
-  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1388, (q15_t)0x8180, (q15_t)0x1382, (q15_t)0x817f, (q15_t)0x137c, (q15_t)0x817e,
-  (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x136f, (q15_t)0x817c, (q15_t)0x1369, (q15_t)0x817c, (q15_t)0x1363, (q15_t)0x817b,
-  (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1356, (q15_t)0x8179, (q15_t)0x1350, (q15_t)0x8178, (q15_t)0x134a, (q15_t)0x8177,
-  (q15_t)0x1344, (q15_t)0x8176, (q15_t)0x133e, (q15_t)0x8175, (q15_t)0x1337, (q15_t)0x8174, (q15_t)0x1331, (q15_t)0x8173,
-  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1325, (q15_t)0x8171, (q15_t)0x131f, (q15_t)0x8170, (q15_t)0x1318, (q15_t)0x816f,
-  (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x130c, (q15_t)0x816d, (q15_t)0x1306, (q15_t)0x816c, (q15_t)0x12ff, (q15_t)0x816c,
-  (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12f3, (q15_t)0x816a, (q15_t)0x12ed, (q15_t)0x8169, (q15_t)0x12e7, (q15_t)0x8168,
-  (q15_t)0x12e0, (q15_t)0x8167, (q15_t)0x12da, (q15_t)0x8166, (q15_t)0x12d4, (q15_t)0x8165, (q15_t)0x12ce, (q15_t)0x8164,
-  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12c1, (q15_t)0x8162, (q15_t)0x12bb, (q15_t)0x8161, (q15_t)0x12b5, (q15_t)0x8160,
-  (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x12a8, (q15_t)0x815f, (q15_t)0x12a2, (q15_t)0x815e, (q15_t)0x129c, (q15_t)0x815d,
-  (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x1290, (q15_t)0x815b, (q15_t)0x1289, (q15_t)0x815a, (q15_t)0x1283, (q15_t)0x8159,
-  (q15_t)0x127d, (q15_t)0x8158, (q15_t)0x1277, (q15_t)0x8157, (q15_t)0x1271, (q15_t)0x8156, (q15_t)0x126a, (q15_t)0x8155,
-  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x125e, (q15_t)0x8154, (q15_t)0x1258, (q15_t)0x8153, (q15_t)0x1251, (q15_t)0x8152,
-  (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1245, (q15_t)0x8150, (q15_t)0x123f, (q15_t)0x814f, (q15_t)0x1239, (q15_t)0x814e,
-  (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x122c, (q15_t)0x814c, (q15_t)0x1226, (q15_t)0x814c, (q15_t)0x1220, (q15_t)0x814b,
-  (q15_t)0x1219, (q15_t)0x814a, (q15_t)0x1213, (q15_t)0x8149, (q15_t)0x120d, (q15_t)0x8148, (q15_t)0x1207, (q15_t)0x8147,
-  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11fa, (q15_t)0x8145, (q15_t)0x11f4, (q15_t)0x8145, (q15_t)0x11ee, (q15_t)0x8144,
-  (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11e1, (q15_t)0x8142, (q15_t)0x11db, (q15_t)0x8141, (q15_t)0x11d5, (q15_t)0x8140,
-  (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11c9, (q15_t)0x813e, (q15_t)0x11c2, (q15_t)0x813d, (q15_t)0x11bc, (q15_t)0x813d,
-  (q15_t)0x11b6, (q15_t)0x813c, (q15_t)0x11b0, (q15_t)0x813b, (q15_t)0x11a9, (q15_t)0x813a, (q15_t)0x11a3, (q15_t)0x8139,
-  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1197, (q15_t)0x8137, (q15_t)0x1191, (q15_t)0x8137, (q15_t)0x118a, (q15_t)0x8136,
-  (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x117e, (q15_t)0x8134, (q15_t)0x1178, (q15_t)0x8133, (q15_t)0x1171, (q15_t)0x8132,
-  (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1165, (q15_t)0x8131, (q15_t)0x115f, (q15_t)0x8130, (q15_t)0x1159, (q15_t)0x812f,
-  (q15_t)0x1152, (q15_t)0x812e, (q15_t)0x114c, (q15_t)0x812d, (q15_t)0x1146, (q15_t)0x812c, (q15_t)0x1140, (q15_t)0x812b,
-  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1133, (q15_t)0x812a, (q15_t)0x112d, (q15_t)0x8129, (q15_t)0x1127, (q15_t)0x8128,
-  (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x111a, (q15_t)0x8126, (q15_t)0x1114, (q15_t)0x8126, (q15_t)0x110e, (q15_t)0x8125,
-  (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x1101, (q15_t)0x8123, (q15_t)0x10fb, (q15_t)0x8122, (q15_t)0x10f5, (q15_t)0x8121,
-  (q15_t)0x10ef, (q15_t)0x8121, (q15_t)0x10e8, (q15_t)0x8120, (q15_t)0x10e2, (q15_t)0x811f, (q15_t)0x10dc, (q15_t)0x811e,
-  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10d0, (q15_t)0x811c, (q15_t)0x10c9, (q15_t)0x811c, (q15_t)0x10c3, (q15_t)0x811b,
-  (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10b7, (q15_t)0x8119, (q15_t)0x10b0, (q15_t)0x8118, (q15_t)0x10aa, (q15_t)0x8117,
-  (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x109e, (q15_t)0x8116, (q15_t)0x1098, (q15_t)0x8115, (q15_t)0x1091, (q15_t)0x8114,
-  (q15_t)0x108b, (q15_t)0x8113, (q15_t)0x1085, (q15_t)0x8113, (q15_t)0x107f, (q15_t)0x8112, (q15_t)0x1078, (q15_t)0x8111,
-  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x106c, (q15_t)0x810f, (q15_t)0x1066, (q15_t)0x810f, (q15_t)0x105f, (q15_t)0x810e,
-  (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1053, (q15_t)0x810c, (q15_t)0x104d, (q15_t)0x810b, (q15_t)0x1047, (q15_t)0x810b,
-  (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x103a, (q15_t)0x8109, (q15_t)0x1034, (q15_t)0x8108, (q15_t)0x102e, (q15_t)0x8107,
-  (q15_t)0x1027, (q15_t)0x8107, (q15_t)0x1021, (q15_t)0x8106, (q15_t)0x101b, (q15_t)0x8105, (q15_t)0x1015, (q15_t)0x8104,
-  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0x1008, (q15_t)0x8103, (q15_t)0x1002, (q15_t)0x8102, (q15_t)0xffc, (q15_t)0x8101,
-  (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfef, (q15_t)0x80ff, (q15_t)0xfe9, (q15_t)0x80ff, (q15_t)0xfe3, (q15_t)0x80fe,
-  (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfd6, (q15_t)0x80fc, (q15_t)0xfd0, (q15_t)0x80fc, (q15_t)0xfca, (q15_t)0x80fb,
-  (q15_t)0xfc4, (q15_t)0x80fa, (q15_t)0xfbd, (q15_t)0x80f9, (q15_t)0xfb7, (q15_t)0x80f8, (q15_t)0xfb1, (q15_t)0x80f8,
-  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xfa4, (q15_t)0x80f6, (q15_t)0xf9e, (q15_t)0x80f5, (q15_t)0xf98, (q15_t)0x80f5,
-  (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf8b, (q15_t)0x80f3, (q15_t)0xf85, (q15_t)0x80f2, (q15_t)0xf7f, (q15_t)0x80f2,
-  (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf73, (q15_t)0x80f0, (q15_t)0xf6c, (q15_t)0x80ef, (q15_t)0xf66, (q15_t)0x80ef,
-  (q15_t)0xf60, (q15_t)0x80ee, (q15_t)0xf5a, (q15_t)0x80ed, (q15_t)0xf53, (q15_t)0x80ec, (q15_t)0xf4d, (q15_t)0x80ec,
-  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf41, (q15_t)0x80ea, (q15_t)0xf3a, (q15_t)0x80e9, (q15_t)0xf34, (q15_t)0x80e9,
-  (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf28, (q15_t)0x80e7, (q15_t)0xf21, (q15_t)0x80e6, (q15_t)0xf1b, (q15_t)0x80e6,
-  (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xf0f, (q15_t)0x80e4, (q15_t)0xf08, (q15_t)0x80e3, (q15_t)0xf02, (q15_t)0x80e3,
-  (q15_t)0xefc, (q15_t)0x80e2, (q15_t)0xef6, (q15_t)0x80e1, (q15_t)0xef0, (q15_t)0x80e0, (q15_t)0xee9, (q15_t)0x80e0,
-  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xedd, (q15_t)0x80de, (q15_t)0xed7, (q15_t)0x80dd, (q15_t)0xed0, (q15_t)0x80dd,
-  (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xec4, (q15_t)0x80db, (q15_t)0xebe, (q15_t)0x80db, (q15_t)0xeb7, (q15_t)0x80da,
-  (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xeab, (q15_t)0x80d8, (q15_t)0xea5, (q15_t)0x80d8, (q15_t)0xe9e, (q15_t)0x80d7,
-  (q15_t)0xe98, (q15_t)0x80d6, (q15_t)0xe92, (q15_t)0x80d6, (q15_t)0xe8c, (q15_t)0x80d5, (q15_t)0xe85, (q15_t)0x80d4,
-  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe79, (q15_t)0x80d3, (q15_t)0xe73, (q15_t)0x80d2, (q15_t)0xe6c, (q15_t)0x80d1,
-  (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe60, (q15_t)0x80d0, (q15_t)0xe5a, (q15_t)0x80cf, (q15_t)0xe53, (q15_t)0x80ce,
-  (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe47, (q15_t)0x80cd, (q15_t)0xe41, (q15_t)0x80cc, (q15_t)0xe3a, (q15_t)0x80cc,
-  (q15_t)0xe34, (q15_t)0x80cb, (q15_t)0xe2e, (q15_t)0x80ca, (q15_t)0xe28, (q15_t)0x80ca, (q15_t)0xe22, (q15_t)0x80c9,
-  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe15, (q15_t)0x80c7, (q15_t)0xe0f, (q15_t)0x80c7, (q15_t)0xe09, (q15_t)0x80c6,
-  (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xdfc, (q15_t)0x80c5, (q15_t)0xdf6, (q15_t)0x80c4, (q15_t)0xdf0, (q15_t)0x80c3,
-  (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xde3, (q15_t)0x80c2, (q15_t)0xddd, (q15_t)0x80c1, (q15_t)0xdd7, (q15_t)0x80c1,
-  (q15_t)0xdd0, (q15_t)0x80c0, (q15_t)0xdca, (q15_t)0x80bf, (q15_t)0xdc4, (q15_t)0x80bf, (q15_t)0xdbe, (q15_t)0x80be,
-  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xdb1, (q15_t)0x80bd, (q15_t)0xdab, (q15_t)0x80bc, (q15_t)0xda5, (q15_t)0x80bb,
-  (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd98, (q15_t)0x80ba, (q15_t)0xd92, (q15_t)0x80b9, (q15_t)0xd8c, (q15_t)0x80b9,
-  (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd7f, (q15_t)0x80b7, (q15_t)0xd79, (q15_t)0x80b7, (q15_t)0xd73, (q15_t)0x80b6,
-  (q15_t)0xd6c, (q15_t)0x80b5, (q15_t)0xd66, (q15_t)0x80b5, (q15_t)0xd60, (q15_t)0x80b4, (q15_t)0xd5a, (q15_t)0x80b3,
-  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd4d, (q15_t)0x80b2, (q15_t)0xd47, (q15_t)0x80b1, (q15_t)0xd41, (q15_t)0x80b1,
-  (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd34, (q15_t)0x80af, (q15_t)0xd2e, (q15_t)0x80af, (q15_t)0xd28, (q15_t)0x80ae,
-  (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd1b, (q15_t)0x80ad, (q15_t)0xd15, (q15_t)0x80ac, (q15_t)0xd0f, (q15_t)0x80ab,
-  (q15_t)0xd08, (q15_t)0x80ab, (q15_t)0xd02, (q15_t)0x80aa, (q15_t)0xcfc, (q15_t)0x80aa, (q15_t)0xcf6, (q15_t)0x80a9,
-  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xce9, (q15_t)0x80a8, (q15_t)0xce3, (q15_t)0x80a7, (q15_t)0xcdd, (q15_t)0x80a6,
-  (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcd0, (q15_t)0x80a5, (q15_t)0xcca, (q15_t)0x80a5, (q15_t)0xcc4, (q15_t)0x80a4,
-  (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xcb7, (q15_t)0x80a3, (q15_t)0xcb1, (q15_t)0x80a2, (q15_t)0xcab, (q15_t)0x80a1,
-  (q15_t)0xca4, (q15_t)0x80a1, (q15_t)0xc9e, (q15_t)0x80a0, (q15_t)0xc98, (q15_t)0x80a0, (q15_t)0xc92, (q15_t)0x809f,
-  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc85, (q15_t)0x809e, (q15_t)0xc7f, (q15_t)0x809d, (q15_t)0xc79, (q15_t)0x809c,
-  (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc6c, (q15_t)0x809b, (q15_t)0xc66, (q15_t)0x809b, (q15_t)0xc60, (q15_t)0x809a,
-  (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc53, (q15_t)0x8099, (q15_t)0xc4d, (q15_t)0x8098, (q15_t)0xc47, (q15_t)0x8098,
-  (q15_t)0xc40, (q15_t)0x8097, (q15_t)0xc3a, (q15_t)0x8096, (q15_t)0xc34, (q15_t)0x8096, (q15_t)0xc2e, (q15_t)0x8095,
-  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc21, (q15_t)0x8094, (q15_t)0xc1b, (q15_t)0x8093, (q15_t)0xc14, (q15_t)0x8093,
-  (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xc08, (q15_t)0x8092, (q15_t)0xc02, (q15_t)0x8091, (q15_t)0xbfb, (q15_t)0x8090,
-  (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbef, (q15_t)0x808f, (q15_t)0xbe9, (q15_t)0x808f, (q15_t)0xbe2, (q15_t)0x808e,
-  (q15_t)0xbdc, (q15_t)0x808e, (q15_t)0xbd6, (q15_t)0x808d, (q15_t)0xbd0, (q15_t)0x808c, (q15_t)0xbc9, (q15_t)0x808c,
-  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbbd, (q15_t)0x808b, (q15_t)0xbb7, (q15_t)0x808a, (q15_t)0xbb0, (q15_t)0x8089,
-  (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xba4, (q15_t)0x8088, (q15_t)0xb9e, (q15_t)0x8088, (q15_t)0xb97, (q15_t)0x8087,
-  (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb8b, (q15_t)0x8086, (q15_t)0xb85, (q15_t)0x8085, (q15_t)0xb7e, (q15_t)0x8085,
-  (q15_t)0xb78, (q15_t)0x8084, (q15_t)0xb72, (q15_t)0x8084, (q15_t)0xb6c, (q15_t)0x8083, (q15_t)0xb65, (q15_t)0x8083,
-  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb59, (q15_t)0x8082, (q15_t)0xb53, (q15_t)0x8081, (q15_t)0xb4c, (q15_t)0x8080,
-  (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb40, (q15_t)0x807f, (q15_t)0xb3a, (q15_t)0x807f, (q15_t)0xb33, (q15_t)0x807e,
-  (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb27, (q15_t)0x807d, (q15_t)0xb20, (q15_t)0x807d, (q15_t)0xb1a, (q15_t)0x807c,
-  (q15_t)0xb14, (q15_t)0x807b, (q15_t)0xb0e, (q15_t)0x807b, (q15_t)0xb07, (q15_t)0x807a, (q15_t)0xb01, (q15_t)0x807a,
-  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xaf5, (q15_t)0x8079, (q15_t)0xaee, (q15_t)0x8078, (q15_t)0xae8, (q15_t)0x8078,
-  (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xadc, (q15_t)0x8077, (q15_t)0xad5, (q15_t)0x8076, (q15_t)0xacf, (q15_t)0x8076,
-  (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xac3, (q15_t)0x8075, (q15_t)0xabc, (q15_t)0x8074, (q15_t)0xab6, (q15_t)0x8073,
-  (q15_t)0xab0, (q15_t)0x8073, (q15_t)0xaaa, (q15_t)0x8072, (q15_t)0xaa3, (q15_t)0x8072, (q15_t)0xa9d, (q15_t)0x8071,
-  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa90, (q15_t)0x8070, (q15_t)0xa8a, (q15_t)0x8070, (q15_t)0xa84, (q15_t)0x806f,
-  (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa77, (q15_t)0x806e, (q15_t)0xa71, (q15_t)0x806e, (q15_t)0xa6b, (q15_t)0x806d,
-  (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa5e, (q15_t)0x806c, (q15_t)0xa58, (q15_t)0x806c, (q15_t)0xa52, (q15_t)0x806b,
-  (q15_t)0xa4c, (q15_t)0x806b, (q15_t)0xa45, (q15_t)0x806a, (q15_t)0xa3f, (q15_t)0x806a, (q15_t)0xa39, (q15_t)0x8069,
-  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa2c, (q15_t)0x8068, (q15_t)0xa26, (q15_t)0x8068, (q15_t)0xa20, (q15_t)0x8067,
-  (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa13, (q15_t)0x8066, (q15_t)0xa0d, (q15_t)0x8066, (q15_t)0xa07, (q15_t)0x8065,
-  (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9fa, (q15_t)0x8064, (q15_t)0x9f4, (q15_t)0x8064, (q15_t)0x9ee, (q15_t)0x8063,
-  (q15_t)0x9e7, (q15_t)0x8063, (q15_t)0x9e1, (q15_t)0x8062, (q15_t)0x9db, (q15_t)0x8062, (q15_t)0x9d5, (q15_t)0x8061,
-  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9c8, (q15_t)0x8060, (q15_t)0x9c2, (q15_t)0x8060, (q15_t)0x9bc, (q15_t)0x805f,
-  (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x9af, (q15_t)0x805e, (q15_t)0x9a9, (q15_t)0x805e, (q15_t)0x9a2, (q15_t)0x805d,
-  (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x996, (q15_t)0x805d, (q15_t)0x990, (q15_t)0x805c, (q15_t)0x989, (q15_t)0x805c,
-  (q15_t)0x983, (q15_t)0x805b, (q15_t)0x97d, (q15_t)0x805b, (q15_t)0x977, (q15_t)0x805a, (q15_t)0x970, (q15_t)0x805a,
-  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x964, (q15_t)0x8059, (q15_t)0x95e, (q15_t)0x8058, (q15_t)0x957, (q15_t)0x8058,
-  (q15_t)0x951, (q15_t)0x8057, (q15_t)0x94b, (q15_t)0x8057, (q15_t)0x944, (q15_t)0x8057, (q15_t)0x93e, (q15_t)0x8056,
-  (q15_t)0x938, (q15_t)0x8056, (q15_t)0x932, (q15_t)0x8055, (q15_t)0x92b, (q15_t)0x8055, (q15_t)0x925, (q15_t)0x8054,
-  (q15_t)0x91f, (q15_t)0x8054, (q15_t)0x919, (q15_t)0x8053, (q15_t)0x912, (q15_t)0x8053, (q15_t)0x90c, (q15_t)0x8052,
-  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x900, (q15_t)0x8052, (q15_t)0x8f9, (q15_t)0x8051, (q15_t)0x8f3, (q15_t)0x8051,
-  (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8e6, (q15_t)0x8050, (q15_t)0x8e0, (q15_t)0x804f, (q15_t)0x8da, (q15_t)0x804f,
-  (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8cd, (q15_t)0x804e, (q15_t)0x8c7, (q15_t)0x804e, (q15_t)0x8c1, (q15_t)0x804d,
-  (q15_t)0x8bb, (q15_t)0x804d, (q15_t)0x8b4, (q15_t)0x804c, (q15_t)0x8ae, (q15_t)0x804c, (q15_t)0x8a8, (q15_t)0x804c,
-  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x89b, (q15_t)0x804b, (q15_t)0x895, (q15_t)0x804a, (q15_t)0x88f, (q15_t)0x804a,
-  (q15_t)0x888, (q15_t)0x8049, (q15_t)0x882, (q15_t)0x8049, (q15_t)0x87c, (q15_t)0x8049, (q15_t)0x876, (q15_t)0x8048,
-  (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x869, (q15_t)0x8047, (q15_t)0x863, (q15_t)0x8047, (q15_t)0x85d, (q15_t)0x8047,
-  (q15_t)0x856, (q15_t)0x8046, (q15_t)0x850, (q15_t)0x8046, (q15_t)0x84a, (q15_t)0x8045, (q15_t)0x843, (q15_t)0x8045,
-  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x837, (q15_t)0x8044, (q15_t)0x831, (q15_t)0x8044, (q15_t)0x82a, (q15_t)0x8043,
-  (q15_t)0x824, (q15_t)0x8043, (q15_t)0x81e, (q15_t)0x8042, (q15_t)0x818, (q15_t)0x8042, (q15_t)0x811, (q15_t)0x8042,
-  (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x805, (q15_t)0x8041, (q15_t)0x7fe, (q15_t)0x8040, (q15_t)0x7f8, (q15_t)0x8040,
-  (q15_t)0x7f2, (q15_t)0x8040, (q15_t)0x7ec, (q15_t)0x803f, (q15_t)0x7e5, (q15_t)0x803f, (q15_t)0x7df, (q15_t)0x803f,
-  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7d3, (q15_t)0x803e, (q15_t)0x7cc, (q15_t)0x803d, (q15_t)0x7c6, (q15_t)0x803d,
-  (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7ba, (q15_t)0x803c, (q15_t)0x7b3, (q15_t)0x803c, (q15_t)0x7ad, (q15_t)0x803b,
-  (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x7a0, (q15_t)0x803b, (q15_t)0x79a, (q15_t)0x803a, (q15_t)0x794, (q15_t)0x803a,
-  (q15_t)0x78e, (q15_t)0x803a, (q15_t)0x787, (q15_t)0x8039, (q15_t)0x781, (q15_t)0x8039, (q15_t)0x77b, (q15_t)0x8039,
-  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x76e, (q15_t)0x8038, (q15_t)0x768, (q15_t)0x8037, (q15_t)0x762, (q15_t)0x8037,
-  (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x755, (q15_t)0x8036, (q15_t)0x74f, (q15_t)0x8036, (q15_t)0x749, (q15_t)0x8036,
-  (q15_t)0x742, (q15_t)0x8035, (q15_t)0x73c, (q15_t)0x8035, (q15_t)0x736, (q15_t)0x8035, (q15_t)0x730, (q15_t)0x8034,
-  (q15_t)0x729, (q15_t)0x8034, (q15_t)0x723, (q15_t)0x8033, (q15_t)0x71d, (q15_t)0x8033, (q15_t)0x716, (q15_t)0x8033,
-  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x70a, (q15_t)0x8032, (q15_t)0x704, (q15_t)0x8032, (q15_t)0x6fd, (q15_t)0x8031,
-  (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6f1, (q15_t)0x8031, (q15_t)0x6ea, (q15_t)0x8030, (q15_t)0x6e4, (q15_t)0x8030,
-  (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6d8, (q15_t)0x802f, (q15_t)0x6d1, (q15_t)0x802f, (q15_t)0x6cb, (q15_t)0x802f,
-  (q15_t)0x6c5, (q15_t)0x802e, (q15_t)0x6bf, (q15_t)0x802e, (q15_t)0x6b8, (q15_t)0x802e, (q15_t)0x6b2, (q15_t)0x802d,
-  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x6a5, (q15_t)0x802d, (q15_t)0x69f, (q15_t)0x802c, (q15_t)0x699, (q15_t)0x802c,
-  (q15_t)0x693, (q15_t)0x802c, (q15_t)0x68c, (q15_t)0x802b, (q15_t)0x686, (q15_t)0x802b, (q15_t)0x680, (q15_t)0x802b,
-  (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x673, (q15_t)0x802a, (q15_t)0x66d, (q15_t)0x802a, (q15_t)0x667, (q15_t)0x802a,
-  (q15_t)0x660, (q15_t)0x8029, (q15_t)0x65a, (q15_t)0x8029, (q15_t)0x654, (q15_t)0x8029, (q15_t)0x64e, (q15_t)0x8028,
-  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x641, (q15_t)0x8028, (q15_t)0x63b, (q15_t)0x8027, (q15_t)0x635, (q15_t)0x8027,
-  (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x628, (q15_t)0x8026, (q15_t)0x622, (q15_t)0x8026, (q15_t)0x61b, (q15_t)0x8026,
-  (q15_t)0x615, (q15_t)0x8026, (q15_t)0x60f, (q15_t)0x8025, (q15_t)0x609, (q15_t)0x8025, (q15_t)0x602, (q15_t)0x8025,
-  (q15_t)0x5fc, (q15_t)0x8024, (q15_t)0x5f6, (q15_t)0x8024, (q15_t)0x5ef, (q15_t)0x8024, (q15_t)0x5e9, (q15_t)0x8023,
-  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5dd, (q15_t)0x8023, (q15_t)0x5d6, (q15_t)0x8023, (q15_t)0x5d0, (q15_t)0x8022,
-  (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5c4, (q15_t)0x8022, (q15_t)0x5bd, (q15_t)0x8021, (q15_t)0x5b7, (q15_t)0x8021,
-  (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x5aa, (q15_t)0x8021, (q15_t)0x5a4, (q15_t)0x8020, (q15_t)0x59e, (q15_t)0x8020,
-  (q15_t)0x598, (q15_t)0x8020, (q15_t)0x591, (q15_t)0x8020, (q15_t)0x58b, (q15_t)0x801f, (q15_t)0x585, (q15_t)0x801f,
-  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x578, (q15_t)0x801e, (q15_t)0x572, (q15_t)0x801e, (q15_t)0x56c, (q15_t)0x801e,
-  (q15_t)0x565, (q15_t)0x801e, (q15_t)0x55f, (q15_t)0x801d, (q15_t)0x559, (q15_t)0x801d, (q15_t)0x553, (q15_t)0x801d,
-  (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x546, (q15_t)0x801c, (q15_t)0x540, (q15_t)0x801c, (q15_t)0x539, (q15_t)0x801c,
-  (q15_t)0x533, (q15_t)0x801c, (q15_t)0x52d, (q15_t)0x801b, (q15_t)0x527, (q15_t)0x801b, (q15_t)0x520, (q15_t)0x801b,
-  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x514, (q15_t)0x801a, (q15_t)0x50d, (q15_t)0x801a, (q15_t)0x507, (q15_t)0x801a,
-  (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4fb, (q15_t)0x8019, (q15_t)0x4f4, (q15_t)0x8019, (q15_t)0x4ee, (q15_t)0x8019,
-  (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4e2, (q15_t)0x8018, (q15_t)0x4db, (q15_t)0x8018, (q15_t)0x4d5, (q15_t)0x8018,
-  (q15_t)0x4cf, (q15_t)0x8018, (q15_t)0x4c8, (q15_t)0x8017, (q15_t)0x4c2, (q15_t)0x8017, (q15_t)0x4bc, (q15_t)0x8017,
-  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x4af, (q15_t)0x8016, (q15_t)0x4a9, (q15_t)0x8016, (q15_t)0x4a3, (q15_t)0x8016,
-  (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x496, (q15_t)0x8016, (q15_t)0x490, (q15_t)0x8015, (q15_t)0x48a, (q15_t)0x8015,
-  (q15_t)0x483, (q15_t)0x8015, (q15_t)0x47d, (q15_t)0x8015, (q15_t)0x477, (q15_t)0x8014, (q15_t)0x471, (q15_t)0x8014,
-  (q15_t)0x46a, (q15_t)0x8014, (q15_t)0x464, (q15_t)0x8014, (q15_t)0x45e, (q15_t)0x8014, (q15_t)0x457, (q15_t)0x8013,
-  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x44b, (q15_t)0x8013, (q15_t)0x445, (q15_t)0x8013, (q15_t)0x43e, (q15_t)0x8013,
-  (q15_t)0x438, (q15_t)0x8012, (q15_t)0x432, (q15_t)0x8012, (q15_t)0x42b, (q15_t)0x8012, (q15_t)0x425, (q15_t)0x8012,
-  (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x419, (q15_t)0x8011, (q15_t)0x412, (q15_t)0x8011, (q15_t)0x40c, (q15_t)0x8011,
-  (q15_t)0x406, (q15_t)0x8011, (q15_t)0x3ff, (q15_t)0x8011, (q15_t)0x3f9, (q15_t)0x8010, (q15_t)0x3f3, (q15_t)0x8010,
-  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3e6, (q15_t)0x8010, (q15_t)0x3e0, (q15_t)0x8010, (q15_t)0x3da, (q15_t)0x800f,
-  (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3cd, (q15_t)0x800f, (q15_t)0x3c7, (q15_t)0x800f, (q15_t)0x3c1, (q15_t)0x800f,
-  (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3b4, (q15_t)0x800e, (q15_t)0x3ae, (q15_t)0x800e, (q15_t)0x3a8, (q15_t)0x800e,
-  (q15_t)0x3a1, (q15_t)0x800e, (q15_t)0x39b, (q15_t)0x800e, (q15_t)0x395, (q15_t)0x800d, (q15_t)0x38e, (q15_t)0x800d,
-  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x382, (q15_t)0x800d, (q15_t)0x37c, (q15_t)0x800d, (q15_t)0x375, (q15_t)0x800c,
-  (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x369, (q15_t)0x800c, (q15_t)0x362, (q15_t)0x800c, (q15_t)0x35c, (q15_t)0x800c,
-  (q15_t)0x356, (q15_t)0x800c, (q15_t)0x350, (q15_t)0x800b, (q15_t)0x349, (q15_t)0x800b, (q15_t)0x343, (q15_t)0x800b,
-  (q15_t)0x33d, (q15_t)0x800b, (q15_t)0x337, (q15_t)0x800b, (q15_t)0x330, (q15_t)0x800b, (q15_t)0x32a, (q15_t)0x800b,
-  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x31d, (q15_t)0x800a, (q15_t)0x317, (q15_t)0x800a, (q15_t)0x311, (q15_t)0x800a,
-  (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x304, (q15_t)0x800a, (q15_t)0x2fe, (q15_t)0x8009, (q15_t)0x2f8, (q15_t)0x8009,
-  (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2eb, (q15_t)0x8009, (q15_t)0x2e5, (q15_t)0x8009, (q15_t)0x2df, (q15_t)0x8009,
-  (q15_t)0x2d8, (q15_t)0x8009, (q15_t)0x2d2, (q15_t)0x8008, (q15_t)0x2cc, (q15_t)0x8008, (q15_t)0x2c5, (q15_t)0x8008,
-  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2b9, (q15_t)0x8008, (q15_t)0x2b3, (q15_t)0x8008, (q15_t)0x2ac, (q15_t)0x8008,
-  (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x2a0, (q15_t)0x8007, (q15_t)0x299, (q15_t)0x8007, (q15_t)0x293, (q15_t)0x8007,
-  (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x287, (q15_t)0x8007, (q15_t)0x280, (q15_t)0x8007, (q15_t)0x27a, (q15_t)0x8007,
-  (q15_t)0x274, (q15_t)0x8007, (q15_t)0x26d, (q15_t)0x8006, (q15_t)0x267, (q15_t)0x8006, (q15_t)0x261, (q15_t)0x8006,
-  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x254, (q15_t)0x8006, (q15_t)0x24e, (q15_t)0x8006, (q15_t)0x248, (q15_t)0x8006,
-  (q15_t)0x242, (q15_t)0x8006, (q15_t)0x23b, (q15_t)0x8005, (q15_t)0x235, (q15_t)0x8005, (q15_t)0x22f, (q15_t)0x8005,
-  (q15_t)0x228, (q15_t)0x8005, (q15_t)0x222, (q15_t)0x8005, (q15_t)0x21c, (q15_t)0x8005, (q15_t)0x216, (q15_t)0x8005,
-  (q15_t)0x20f, (q15_t)0x8005, (q15_t)0x209, (q15_t)0x8005, (q15_t)0x203, (q15_t)0x8005, (q15_t)0x1fc, (q15_t)0x8004,
-  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1f0, (q15_t)0x8004, (q15_t)0x1ea, (q15_t)0x8004, (q15_t)0x1e3, (q15_t)0x8004,
-  (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1d7, (q15_t)0x8004, (q15_t)0x1d0, (q15_t)0x8004, (q15_t)0x1ca, (q15_t)0x8004,
-  (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1be, (q15_t)0x8004, (q15_t)0x1b7, (q15_t)0x8003, (q15_t)0x1b1, (q15_t)0x8003,
-  (q15_t)0x1ab, (q15_t)0x8003, (q15_t)0x1a4, (q15_t)0x8003, (q15_t)0x19e, (q15_t)0x8003, (q15_t)0x198, (q15_t)0x8003,
-  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x18b, (q15_t)0x8003, (q15_t)0x185, (q15_t)0x8003, (q15_t)0x17f, (q15_t)0x8003,
-  (q15_t)0x178, (q15_t)0x8003, (q15_t)0x172, (q15_t)0x8003, (q15_t)0x16c, (q15_t)0x8003, (q15_t)0x166, (q15_t)0x8002,
-  (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x159, (q15_t)0x8002, (q15_t)0x153, (q15_t)0x8002, (q15_t)0x14d, (q15_t)0x8002,
-  (q15_t)0x146, (q15_t)0x8002, (q15_t)0x140, (q15_t)0x8002, (q15_t)0x13a, (q15_t)0x8002, (q15_t)0x133, (q15_t)0x8002,
-  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x127, (q15_t)0x8002, (q15_t)0x121, (q15_t)0x8002, (q15_t)0x11a, (q15_t)0x8002,
-  (q15_t)0x114, (q15_t)0x8002, (q15_t)0x10e, (q15_t)0x8002, (q15_t)0x107, (q15_t)0x8002, (q15_t)0x101, (q15_t)0x8002,
-  (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xf5, (q15_t)0x8001, (q15_t)0xee, (q15_t)0x8001, (q15_t)0xe8, (q15_t)0x8001,
-  (q15_t)0xe2, (q15_t)0x8001, (q15_t)0xdb, (q15_t)0x8001, (q15_t)0xd5, (q15_t)0x8001, (q15_t)0xcf, (q15_t)0x8001,
-  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xc2, (q15_t)0x8001, (q15_t)0xbc, (q15_t)0x8001, (q15_t)0xb6, (q15_t)0x8001,
-  (q15_t)0xaf, (q15_t)0x8001, (q15_t)0xa9, (q15_t)0x8001, (q15_t)0xa3, (q15_t)0x8001, (q15_t)0x9d, (q15_t)0x8001,
-  (q15_t)0x96, (q15_t)0x8001, (q15_t)0x90, (q15_t)0x8001, (q15_t)0x8a, (q15_t)0x8001, (q15_t)0x83, (q15_t)0x8001,
-  (q15_t)0x7d, (q15_t)0x8001, (q15_t)0x77, (q15_t)0x8001, (q15_t)0x71, (q15_t)0x8001, (q15_t)0x6a, (q15_t)0x8001,
-  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x5e, (q15_t)0x8001, (q15_t)0x57, (q15_t)0x8001, (q15_t)0x51, (q15_t)0x8001,
-  (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x45, (q15_t)0x8001, (q15_t)0x3e, (q15_t)0x8001, (q15_t)0x38, (q15_t)0x8001,
-  (q15_t)0x32, (q15_t)0x8001, (q15_t)0x2b, (q15_t)0x8001, (q15_t)0x25, (q15_t)0x8001, (q15_t)0x1f, (q15_t)0x8001,
-  (q15_t)0x19, (q15_t)0x8001, (q15_t)0x12, (q15_t)0x8001, (q15_t)0xc, (q15_t)0x8001, (q15_t)0x6, (q15_t)0x8001
-};
-
-    const q15_t __ALIGNED(4) cos_factorsQ15_8192[8192] = {
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
-  (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
-  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
-  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd,
-  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc,
-  (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc,
-  (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb,
-  (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa,
-  (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9,
-  (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8,
-  (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7,
-  (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6,
-  (q15_t)0x7ff6, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4,
-  (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3,
-  (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2,
-  (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff0, (q15_t)0x7ff0,
-  (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef,
-  (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fed,
-  (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7feb,
-  (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fe9,
-  (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8,
-  (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6,
-  (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4,
-  (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe1,
-  (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdf,
-  (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fdd, (q15_t)0x7fdd,
-  (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb,
-  (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd8, (q15_t)0x7fd8,
-  (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd6,
-  (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd3, (q15_t)0x7fd3,
-  (q15_t)0x7fd3, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd0,
-  (q15_t)0x7fd0, (q15_t)0x7fd0, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fce,
-  (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcb, (q15_t)0x7fcb,
-  (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc8, (q15_t)0x7fc8,
-  (q15_t)0x7fc8, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc6, (q15_t)0x7fc5, (q15_t)0x7fc5,
-  (q15_t)0x7fc5, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc3, (q15_t)0x7fc3, (q15_t)0x7fc2, (q15_t)0x7fc2,
-  (q15_t)0x7fc2, (q15_t)0x7fc1, (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fbf, (q15_t)0x7fbf,
-  (q15_t)0x7fbf, (q15_t)0x7fbe, (q15_t)0x7fbe, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbc, (q15_t)0x7fbc,
-  (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fba, (q15_t)0x7fba, (q15_t)0x7fb9, (q15_t)0x7fb9, (q15_t)0x7fb8,
-  (q15_t)0x7fb8, (q15_t)0x7fb8, (q15_t)0x7fb7, (q15_t)0x7fb7, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb5,
-  (q15_t)0x7fb5, (q15_t)0x7fb4, (q15_t)0x7fb4, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb2, (q15_t)0x7fb2,
-  (q15_t)0x7fb1, (q15_t)0x7fb1, (q15_t)0x7fb0, (q15_t)0x7fb0, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7fae,
-  (q15_t)0x7fae, (q15_t)0x7fad, (q15_t)0x7fad, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fab, (q15_t)0x7fab,
-  (q15_t)0x7faa, (q15_t)0x7faa, (q15_t)0x7fa9, (q15_t)0x7fa9, (q15_t)0x7fa8, (q15_t)0x7fa8, (q15_t)0x7fa7, (q15_t)0x7fa7,
-  (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa5, (q15_t)0x7fa5, (q15_t)0x7fa4, (q15_t)0x7fa4, (q15_t)0x7fa3,
-  (q15_t)0x7fa3, (q15_t)0x7fa2, (q15_t)0x7fa2, (q15_t)0x7fa1, (q15_t)0x7fa1, (q15_t)0x7fa0, (q15_t)0x7fa0, (q15_t)0x7f9f,
-  (q15_t)0x7f9f, (q15_t)0x7f9e, (q15_t)0x7f9e, (q15_t)0x7f9d, (q15_t)0x7f9d, (q15_t)0x7f9c, (q15_t)0x7f9c, (q15_t)0x7f9c,
-  (q15_t)0x7f9b, (q15_t)0x7f9b, (q15_t)0x7f9a, (q15_t)0x7f9a, (q15_t)0x7f99, (q15_t)0x7f99, (q15_t)0x7f98, (q15_t)0x7f98,
-  (q15_t)0x7f97, (q15_t)0x7f97, (q15_t)0x7f96, (q15_t)0x7f96, (q15_t)0x7f95, (q15_t)0x7f95, (q15_t)0x7f94, (q15_t)0x7f94,
-  (q15_t)0x7f93, (q15_t)0x7f92, (q15_t)0x7f92, (q15_t)0x7f91, (q15_t)0x7f91, (q15_t)0x7f90, (q15_t)0x7f90, (q15_t)0x7f8f,
-  (q15_t)0x7f8f, (q15_t)0x7f8e, (q15_t)0x7f8e, (q15_t)0x7f8d, (q15_t)0x7f8d, (q15_t)0x7f8c, (q15_t)0x7f8c, (q15_t)0x7f8b,
-  (q15_t)0x7f8b, (q15_t)0x7f8a, (q15_t)0x7f8a, (q15_t)0x7f89, (q15_t)0x7f89, (q15_t)0x7f88, (q15_t)0x7f87, (q15_t)0x7f87,
-  (q15_t)0x7f86, (q15_t)0x7f86, (q15_t)0x7f85, (q15_t)0x7f85, (q15_t)0x7f84, (q15_t)0x7f84, (q15_t)0x7f83, (q15_t)0x7f83,
-  (q15_t)0x7f82, (q15_t)0x7f81, (q15_t)0x7f81, (q15_t)0x7f80, (q15_t)0x7f80, (q15_t)0x7f7f, (q15_t)0x7f7f, (q15_t)0x7f7e,
-  (q15_t)0x7f7e, (q15_t)0x7f7d, (q15_t)0x7f7c, (q15_t)0x7f7c, (q15_t)0x7f7b, (q15_t)0x7f7b, (q15_t)0x7f7a, (q15_t)0x7f7a,
-  (q15_t)0x7f79, (q15_t)0x7f79, (q15_t)0x7f78, (q15_t)0x7f77, (q15_t)0x7f77, (q15_t)0x7f76, (q15_t)0x7f76, (q15_t)0x7f75,
-  (q15_t)0x7f75, (q15_t)0x7f74, (q15_t)0x7f73, (q15_t)0x7f73, (q15_t)0x7f72, (q15_t)0x7f72, (q15_t)0x7f71, (q15_t)0x7f70,
-  (q15_t)0x7f70, (q15_t)0x7f6f, (q15_t)0x7f6f, (q15_t)0x7f6e, (q15_t)0x7f6d, (q15_t)0x7f6d, (q15_t)0x7f6c, (q15_t)0x7f6c,
-  (q15_t)0x7f6b, (q15_t)0x7f6b, (q15_t)0x7f6a, (q15_t)0x7f69, (q15_t)0x7f69, (q15_t)0x7f68, (q15_t)0x7f68, (q15_t)0x7f67,
-  (q15_t)0x7f66, (q15_t)0x7f66, (q15_t)0x7f65, (q15_t)0x7f64, (q15_t)0x7f64, (q15_t)0x7f63, (q15_t)0x7f63, (q15_t)0x7f62,
-  (q15_t)0x7f61, (q15_t)0x7f61, (q15_t)0x7f60, (q15_t)0x7f60, (q15_t)0x7f5f, (q15_t)0x7f5e, (q15_t)0x7f5e, (q15_t)0x7f5d,
-  (q15_t)0x7f5c, (q15_t)0x7f5c, (q15_t)0x7f5b, (q15_t)0x7f5b, (q15_t)0x7f5a, (q15_t)0x7f59, (q15_t)0x7f59, (q15_t)0x7f58,
-  (q15_t)0x7f57, (q15_t)0x7f57, (q15_t)0x7f56, (q15_t)0x7f55, (q15_t)0x7f55, (q15_t)0x7f54, (q15_t)0x7f54, (q15_t)0x7f53,
-  (q15_t)0x7f52, (q15_t)0x7f52, (q15_t)0x7f51, (q15_t)0x7f50, (q15_t)0x7f50, (q15_t)0x7f4f, (q15_t)0x7f4e, (q15_t)0x7f4e,
-  (q15_t)0x7f4d, (q15_t)0x7f4c, (q15_t)0x7f4c, (q15_t)0x7f4b, (q15_t)0x7f4a, (q15_t)0x7f4a, (q15_t)0x7f49, (q15_t)0x7f48,
-  (q15_t)0x7f48, (q15_t)0x7f47, (q15_t)0x7f46, (q15_t)0x7f46, (q15_t)0x7f45, (q15_t)0x7f44, (q15_t)0x7f44, (q15_t)0x7f43,
-  (q15_t)0x7f42, (q15_t)0x7f42, (q15_t)0x7f41, (q15_t)0x7f40, (q15_t)0x7f40, (q15_t)0x7f3f, (q15_t)0x7f3e, (q15_t)0x7f3e,
-  (q15_t)0x7f3d, (q15_t)0x7f3c, (q15_t)0x7f3c, (q15_t)0x7f3b, (q15_t)0x7f3a, (q15_t)0x7f3a, (q15_t)0x7f39, (q15_t)0x7f38,
-  (q15_t)0x7f37, (q15_t)0x7f37, (q15_t)0x7f36, (q15_t)0x7f35, (q15_t)0x7f35, (q15_t)0x7f34, (q15_t)0x7f33, (q15_t)0x7f33,
-  (q15_t)0x7f32, (q15_t)0x7f31, (q15_t)0x7f31, (q15_t)0x7f30, (q15_t)0x7f2f, (q15_t)0x7f2e, (q15_t)0x7f2e, (q15_t)0x7f2d,
-  (q15_t)0x7f2c, (q15_t)0x7f2c, (q15_t)0x7f2b, (q15_t)0x7f2a, (q15_t)0x7f29, (q15_t)0x7f29, (q15_t)0x7f28, (q15_t)0x7f27,
-  (q15_t)0x7f27, (q15_t)0x7f26, (q15_t)0x7f25, (q15_t)0x7f24, (q15_t)0x7f24, (q15_t)0x7f23, (q15_t)0x7f22, (q15_t)0x7f21,
-  (q15_t)0x7f21, (q15_t)0x7f20, (q15_t)0x7f1f, (q15_t)0x7f1f, (q15_t)0x7f1e, (q15_t)0x7f1d, (q15_t)0x7f1c, (q15_t)0x7f1c,
-  (q15_t)0x7f1b, (q15_t)0x7f1a, (q15_t)0x7f19, (q15_t)0x7f19, (q15_t)0x7f18, (q15_t)0x7f17, (q15_t)0x7f16, (q15_t)0x7f16,
-  (q15_t)0x7f15, (q15_t)0x7f14, (q15_t)0x7f13, (q15_t)0x7f13, (q15_t)0x7f12, (q15_t)0x7f11, (q15_t)0x7f10, (q15_t)0x7f10,
-  (q15_t)0x7f0f, (q15_t)0x7f0e, (q15_t)0x7f0d, (q15_t)0x7f0d, (q15_t)0x7f0c, (q15_t)0x7f0b, (q15_t)0x7f0a, (q15_t)0x7f09,
-  (q15_t)0x7f09, (q15_t)0x7f08, (q15_t)0x7f07, (q15_t)0x7f06, (q15_t)0x7f06, (q15_t)0x7f05, (q15_t)0x7f04, (q15_t)0x7f03,
-  (q15_t)0x7f02, (q15_t)0x7f02, (q15_t)0x7f01, (q15_t)0x7f00, (q15_t)0x7eff, (q15_t)0x7eff, (q15_t)0x7efe, (q15_t)0x7efd,
-  (q15_t)0x7efc, (q15_t)0x7efb, (q15_t)0x7efb, (q15_t)0x7efa, (q15_t)0x7ef9, (q15_t)0x7ef8, (q15_t)0x7ef7, (q15_t)0x7ef7,
-  (q15_t)0x7ef6, (q15_t)0x7ef5, (q15_t)0x7ef4, (q15_t)0x7ef3, (q15_t)0x7ef3, (q15_t)0x7ef2, (q15_t)0x7ef1, (q15_t)0x7ef0,
-  (q15_t)0x7eef, (q15_t)0x7eef, (q15_t)0x7eee, (q15_t)0x7eed, (q15_t)0x7eec, (q15_t)0x7eeb, (q15_t)0x7eeb, (q15_t)0x7eea,
-  (q15_t)0x7ee9, (q15_t)0x7ee8, (q15_t)0x7ee7, (q15_t)0x7ee6, (q15_t)0x7ee6, (q15_t)0x7ee5, (q15_t)0x7ee4, (q15_t)0x7ee3,
-  (q15_t)0x7ee2, (q15_t)0x7ee2, (q15_t)0x7ee1, (q15_t)0x7ee0, (q15_t)0x7edf, (q15_t)0x7ede, (q15_t)0x7edd, (q15_t)0x7edd,
-  (q15_t)0x7edc, (q15_t)0x7edb, (q15_t)0x7eda, (q15_t)0x7ed9, (q15_t)0x7ed8, (q15_t)0x7ed8, (q15_t)0x7ed7, (q15_t)0x7ed6,
-  (q15_t)0x7ed5, (q15_t)0x7ed4, (q15_t)0x7ed3, (q15_t)0x7ed2, (q15_t)0x7ed2, (q15_t)0x7ed1, (q15_t)0x7ed0, (q15_t)0x7ecf,
-  (q15_t)0x7ece, (q15_t)0x7ecd, (q15_t)0x7ecc, (q15_t)0x7ecc, (q15_t)0x7ecb, (q15_t)0x7eca, (q15_t)0x7ec9, (q15_t)0x7ec8,
-  (q15_t)0x7ec7, (q15_t)0x7ec6, (q15_t)0x7ec6, (q15_t)0x7ec5, (q15_t)0x7ec4, (q15_t)0x7ec3, (q15_t)0x7ec2, (q15_t)0x7ec1,
-  (q15_t)0x7ec0, (q15_t)0x7ebf, (q15_t)0x7ebf, (q15_t)0x7ebe, (q15_t)0x7ebd, (q15_t)0x7ebc, (q15_t)0x7ebb, (q15_t)0x7eba,
-  (q15_t)0x7eb9, (q15_t)0x7eb8, (q15_t)0x7eb8, (q15_t)0x7eb7, (q15_t)0x7eb6, (q15_t)0x7eb5, (q15_t)0x7eb4, (q15_t)0x7eb3,
-  (q15_t)0x7eb2, (q15_t)0x7eb1, (q15_t)0x7eb0, (q15_t)0x7eaf, (q15_t)0x7eaf, (q15_t)0x7eae, (q15_t)0x7ead, (q15_t)0x7eac,
-  (q15_t)0x7eab, (q15_t)0x7eaa, (q15_t)0x7ea9, (q15_t)0x7ea8, (q15_t)0x7ea7, (q15_t)0x7ea6, (q15_t)0x7ea6, (q15_t)0x7ea5,
-  (q15_t)0x7ea4, (q15_t)0x7ea3, (q15_t)0x7ea2, (q15_t)0x7ea1, (q15_t)0x7ea0, (q15_t)0x7e9f, (q15_t)0x7e9e, (q15_t)0x7e9d,
-  (q15_t)0x7e9c, (q15_t)0x7e9b, (q15_t)0x7e9b, (q15_t)0x7e9a, (q15_t)0x7e99, (q15_t)0x7e98, (q15_t)0x7e97, (q15_t)0x7e96,
-  (q15_t)0x7e95, (q15_t)0x7e94, (q15_t)0x7e93, (q15_t)0x7e92, (q15_t)0x7e91, (q15_t)0x7e90, (q15_t)0x7e8f, (q15_t)0x7e8e,
-  (q15_t)0x7e8d, (q15_t)0x7e8d, (q15_t)0x7e8c, (q15_t)0x7e8b, (q15_t)0x7e8a, (q15_t)0x7e89, (q15_t)0x7e88, (q15_t)0x7e87,
-  (q15_t)0x7e86, (q15_t)0x7e85, (q15_t)0x7e84, (q15_t)0x7e83, (q15_t)0x7e82, (q15_t)0x7e81, (q15_t)0x7e80, (q15_t)0x7e7f,
-  (q15_t)0x7e7e, (q15_t)0x7e7d, (q15_t)0x7e7c, (q15_t)0x7e7b, (q15_t)0x7e7a, (q15_t)0x7e79, (q15_t)0x7e78, (q15_t)0x7e77,
-  (q15_t)0x7e77, (q15_t)0x7e76, (q15_t)0x7e75, (q15_t)0x7e74, (q15_t)0x7e73, (q15_t)0x7e72, (q15_t)0x7e71, (q15_t)0x7e70,
-  (q15_t)0x7e6f, (q15_t)0x7e6e, (q15_t)0x7e6d, (q15_t)0x7e6c, (q15_t)0x7e6b, (q15_t)0x7e6a, (q15_t)0x7e69, (q15_t)0x7e68,
-  (q15_t)0x7e67, (q15_t)0x7e66, (q15_t)0x7e65, (q15_t)0x7e64, (q15_t)0x7e63, (q15_t)0x7e62, (q15_t)0x7e61, (q15_t)0x7e60,
-  (q15_t)0x7e5f, (q15_t)0x7e5e, (q15_t)0x7e5d, (q15_t)0x7e5c, (q15_t)0x7e5b, (q15_t)0x7e5a, (q15_t)0x7e59, (q15_t)0x7e58,
-  (q15_t)0x7e57, (q15_t)0x7e56, (q15_t)0x7e55, (q15_t)0x7e54, (q15_t)0x7e53, (q15_t)0x7e52, (q15_t)0x7e51, (q15_t)0x7e50,
-  (q15_t)0x7e4f, (q15_t)0x7e4e, (q15_t)0x7e4d, (q15_t)0x7e4c, (q15_t)0x7e4b, (q15_t)0x7e4a, (q15_t)0x7e49, (q15_t)0x7e48,
-  (q15_t)0x7e47, (q15_t)0x7e46, (q15_t)0x7e45, (q15_t)0x7e43, (q15_t)0x7e42, (q15_t)0x7e41, (q15_t)0x7e40, (q15_t)0x7e3f,
-  (q15_t)0x7e3e, (q15_t)0x7e3d, (q15_t)0x7e3c, (q15_t)0x7e3b, (q15_t)0x7e3a, (q15_t)0x7e39, (q15_t)0x7e38, (q15_t)0x7e37,
-  (q15_t)0x7e36, (q15_t)0x7e35, (q15_t)0x7e34, (q15_t)0x7e33, (q15_t)0x7e32, (q15_t)0x7e31, (q15_t)0x7e30, (q15_t)0x7e2f,
-  (q15_t)0x7e2e, (q15_t)0x7e2d, (q15_t)0x7e2b, (q15_t)0x7e2a, (q15_t)0x7e29, (q15_t)0x7e28, (q15_t)0x7e27, (q15_t)0x7e26,
-  (q15_t)0x7e25, (q15_t)0x7e24, (q15_t)0x7e23, (q15_t)0x7e22, (q15_t)0x7e21, (q15_t)0x7e20, (q15_t)0x7e1f, (q15_t)0x7e1e,
-  (q15_t)0x7e1d, (q15_t)0x7e1b, (q15_t)0x7e1a, (q15_t)0x7e19, (q15_t)0x7e18, (q15_t)0x7e17, (q15_t)0x7e16, (q15_t)0x7e15,
-  (q15_t)0x7e14, (q15_t)0x7e13, (q15_t)0x7e12, (q15_t)0x7e11, (q15_t)0x7e10, (q15_t)0x7e0e, (q15_t)0x7e0d, (q15_t)0x7e0c,
-  (q15_t)0x7e0b, (q15_t)0x7e0a, (q15_t)0x7e09, (q15_t)0x7e08, (q15_t)0x7e07, (q15_t)0x7e06, (q15_t)0x7e05, (q15_t)0x7e04,
-  (q15_t)0x7e02, (q15_t)0x7e01, (q15_t)0x7e00, (q15_t)0x7dff, (q15_t)0x7dfe, (q15_t)0x7dfd, (q15_t)0x7dfc, (q15_t)0x7dfb,
-  (q15_t)0x7dfa, (q15_t)0x7df8, (q15_t)0x7df7, (q15_t)0x7df6, (q15_t)0x7df5, (q15_t)0x7df4, (q15_t)0x7df3, (q15_t)0x7df2,
-  (q15_t)0x7df1, (q15_t)0x7def, (q15_t)0x7dee, (q15_t)0x7ded, (q15_t)0x7dec, (q15_t)0x7deb, (q15_t)0x7dea, (q15_t)0x7de9,
-  (q15_t)0x7de8, (q15_t)0x7de6, (q15_t)0x7de5, (q15_t)0x7de4, (q15_t)0x7de3, (q15_t)0x7de2, (q15_t)0x7de1, (q15_t)0x7de0,
-  (q15_t)0x7dde, (q15_t)0x7ddd, (q15_t)0x7ddc, (q15_t)0x7ddb, (q15_t)0x7dda, (q15_t)0x7dd9, (q15_t)0x7dd8, (q15_t)0x7dd6,
-  (q15_t)0x7dd5, (q15_t)0x7dd4, (q15_t)0x7dd3, (q15_t)0x7dd2, (q15_t)0x7dd1, (q15_t)0x7dd0, (q15_t)0x7dce, (q15_t)0x7dcd,
-  (q15_t)0x7dcc, (q15_t)0x7dcb, (q15_t)0x7dca, (q15_t)0x7dc9, (q15_t)0x7dc7, (q15_t)0x7dc6, (q15_t)0x7dc5, (q15_t)0x7dc4,
-  (q15_t)0x7dc3, (q15_t)0x7dc2, (q15_t)0x7dc0, (q15_t)0x7dbf, (q15_t)0x7dbe, (q15_t)0x7dbd, (q15_t)0x7dbc, (q15_t)0x7dbb,
-  (q15_t)0x7db9, (q15_t)0x7db8, (q15_t)0x7db7, (q15_t)0x7db6, (q15_t)0x7db5, (q15_t)0x7db3, (q15_t)0x7db2, (q15_t)0x7db1,
-  (q15_t)0x7db0, (q15_t)0x7daf, (q15_t)0x7dae, (q15_t)0x7dac, (q15_t)0x7dab, (q15_t)0x7daa, (q15_t)0x7da9, (q15_t)0x7da8,
-  (q15_t)0x7da6, (q15_t)0x7da5, (q15_t)0x7da4, (q15_t)0x7da3, (q15_t)0x7da2, (q15_t)0x7da0, (q15_t)0x7d9f, (q15_t)0x7d9e,
-  (q15_t)0x7d9d, (q15_t)0x7d9c, (q15_t)0x7d9a, (q15_t)0x7d99, (q15_t)0x7d98, (q15_t)0x7d97, (q15_t)0x7d95, (q15_t)0x7d94,
-  (q15_t)0x7d93, (q15_t)0x7d92, (q15_t)0x7d91, (q15_t)0x7d8f, (q15_t)0x7d8e, (q15_t)0x7d8d, (q15_t)0x7d8c, (q15_t)0x7d8a,
-  (q15_t)0x7d89, (q15_t)0x7d88, (q15_t)0x7d87, (q15_t)0x7d86, (q15_t)0x7d84, (q15_t)0x7d83, (q15_t)0x7d82, (q15_t)0x7d81,
-  (q15_t)0x7d7f, (q15_t)0x7d7e, (q15_t)0x7d7d, (q15_t)0x7d7c, (q15_t)0x7d7a, (q15_t)0x7d79, (q15_t)0x7d78, (q15_t)0x7d77,
-  (q15_t)0x7d75, (q15_t)0x7d74, (q15_t)0x7d73, (q15_t)0x7d72, (q15_t)0x7d70, (q15_t)0x7d6f, (q15_t)0x7d6e, (q15_t)0x7d6d,
-  (q15_t)0x7d6b, (q15_t)0x7d6a, (q15_t)0x7d69, (q15_t)0x7d68, (q15_t)0x7d66, (q15_t)0x7d65, (q15_t)0x7d64, (q15_t)0x7d63,
-  (q15_t)0x7d61, (q15_t)0x7d60, (q15_t)0x7d5f, (q15_t)0x7d5e, (q15_t)0x7d5c, (q15_t)0x7d5b, (q15_t)0x7d5a, (q15_t)0x7d59,
-  (q15_t)0x7d57, (q15_t)0x7d56, (q15_t)0x7d55, (q15_t)0x7d53, (q15_t)0x7d52, (q15_t)0x7d51, (q15_t)0x7d50, (q15_t)0x7d4e,
-  (q15_t)0x7d4d, (q15_t)0x7d4c, (q15_t)0x7d4a, (q15_t)0x7d49, (q15_t)0x7d48, (q15_t)0x7d47, (q15_t)0x7d45, (q15_t)0x7d44,
-  (q15_t)0x7d43, (q15_t)0x7d41, (q15_t)0x7d40, (q15_t)0x7d3f, (q15_t)0x7d3e, (q15_t)0x7d3c, (q15_t)0x7d3b, (q15_t)0x7d3a,
-  (q15_t)0x7d38, (q15_t)0x7d37, (q15_t)0x7d36, (q15_t)0x7d34, (q15_t)0x7d33, (q15_t)0x7d32, (q15_t)0x7d31, (q15_t)0x7d2f,
-  (q15_t)0x7d2e, (q15_t)0x7d2d, (q15_t)0x7d2b, (q15_t)0x7d2a, (q15_t)0x7d29, (q15_t)0x7d27, (q15_t)0x7d26, (q15_t)0x7d25,
-  (q15_t)0x7d23, (q15_t)0x7d22, (q15_t)0x7d21, (q15_t)0x7d1f, (q15_t)0x7d1e, (q15_t)0x7d1d, (q15_t)0x7d1b, (q15_t)0x7d1a,
-  (q15_t)0x7d19, (q15_t)0x7d17, (q15_t)0x7d16, (q15_t)0x7d15, (q15_t)0x7d13, (q15_t)0x7d12, (q15_t)0x7d11, (q15_t)0x7d0f,
-  (q15_t)0x7d0e, (q15_t)0x7d0d, (q15_t)0x7d0b, (q15_t)0x7d0a, (q15_t)0x7d09, (q15_t)0x7d07, (q15_t)0x7d06, (q15_t)0x7d05,
-  (q15_t)0x7d03, (q15_t)0x7d02, (q15_t)0x7d01, (q15_t)0x7cff, (q15_t)0x7cfe, (q15_t)0x7cfd, (q15_t)0x7cfb, (q15_t)0x7cfa,
-  (q15_t)0x7cf9, (q15_t)0x7cf7, (q15_t)0x7cf6, (q15_t)0x7cf4, (q15_t)0x7cf3, (q15_t)0x7cf2, (q15_t)0x7cf0, (q15_t)0x7cef,
-  (q15_t)0x7cee, (q15_t)0x7cec, (q15_t)0x7ceb, (q15_t)0x7ce9, (q15_t)0x7ce8, (q15_t)0x7ce7, (q15_t)0x7ce5, (q15_t)0x7ce4,
-  (q15_t)0x7ce3, (q15_t)0x7ce1, (q15_t)0x7ce0, (q15_t)0x7cde, (q15_t)0x7cdd, (q15_t)0x7cdc, (q15_t)0x7cda, (q15_t)0x7cd9,
-  (q15_t)0x7cd8, (q15_t)0x7cd6, (q15_t)0x7cd5, (q15_t)0x7cd3, (q15_t)0x7cd2, (q15_t)0x7cd1, (q15_t)0x7ccf, (q15_t)0x7cce,
-  (q15_t)0x7ccc, (q15_t)0x7ccb, (q15_t)0x7cca, (q15_t)0x7cc8, (q15_t)0x7cc7, (q15_t)0x7cc5, (q15_t)0x7cc4, (q15_t)0x7cc3,
-  (q15_t)0x7cc1, (q15_t)0x7cc0, (q15_t)0x7cbe, (q15_t)0x7cbd, (q15_t)0x7cbc, (q15_t)0x7cba, (q15_t)0x7cb9, (q15_t)0x7cb7,
-  (q15_t)0x7cb6, (q15_t)0x7cb5, (q15_t)0x7cb3, (q15_t)0x7cb2, (q15_t)0x7cb0, (q15_t)0x7caf, (q15_t)0x7cad, (q15_t)0x7cac,
-  (q15_t)0x7cab, (q15_t)0x7ca9, (q15_t)0x7ca8, (q15_t)0x7ca6, (q15_t)0x7ca5, (q15_t)0x7ca3, (q15_t)0x7ca2, (q15_t)0x7ca1,
-  (q15_t)0x7c9f, (q15_t)0x7c9e, (q15_t)0x7c9c, (q15_t)0x7c9b, (q15_t)0x7c99, (q15_t)0x7c98, (q15_t)0x7c97, (q15_t)0x7c95,
-  (q15_t)0x7c94, (q15_t)0x7c92, (q15_t)0x7c91, (q15_t)0x7c8f, (q15_t)0x7c8e, (q15_t)0x7c8c, (q15_t)0x7c8b, (q15_t)0x7c8a,
-  (q15_t)0x7c88, (q15_t)0x7c87, (q15_t)0x7c85, (q15_t)0x7c84, (q15_t)0x7c82, (q15_t)0x7c81, (q15_t)0x7c7f, (q15_t)0x7c7e,
-  (q15_t)0x7c7c, (q15_t)0x7c7b, (q15_t)0x7c79, (q15_t)0x7c78, (q15_t)0x7c77, (q15_t)0x7c75, (q15_t)0x7c74, (q15_t)0x7c72,
-  (q15_t)0x7c71, (q15_t)0x7c6f, (q15_t)0x7c6e, (q15_t)0x7c6c, (q15_t)0x7c6b, (q15_t)0x7c69, (q15_t)0x7c68, (q15_t)0x7c66,
-  (q15_t)0x7c65, (q15_t)0x7c63, (q15_t)0x7c62, (q15_t)0x7c60, (q15_t)0x7c5f, (q15_t)0x7c5d, (q15_t)0x7c5c, (q15_t)0x7c5a,
-  (q15_t)0x7c59, (q15_t)0x7c58, (q15_t)0x7c56, (q15_t)0x7c55, (q15_t)0x7c53, (q15_t)0x7c52, (q15_t)0x7c50, (q15_t)0x7c4f,
-  (q15_t)0x7c4d, (q15_t)0x7c4c, (q15_t)0x7c4a, (q15_t)0x7c49, (q15_t)0x7c47, (q15_t)0x7c46, (q15_t)0x7c44, (q15_t)0x7c43,
-  (q15_t)0x7c41, (q15_t)0x7c3f, (q15_t)0x7c3e, (q15_t)0x7c3c, (q15_t)0x7c3b, (q15_t)0x7c39, (q15_t)0x7c38, (q15_t)0x7c36,
-  (q15_t)0x7c35, (q15_t)0x7c33, (q15_t)0x7c32, (q15_t)0x7c30, (q15_t)0x7c2f, (q15_t)0x7c2d, (q15_t)0x7c2c, (q15_t)0x7c2a,
-  (q15_t)0x7c29, (q15_t)0x7c27, (q15_t)0x7c26, (q15_t)0x7c24, (q15_t)0x7c23, (q15_t)0x7c21, (q15_t)0x7c20, (q15_t)0x7c1e,
-  (q15_t)0x7c1c, (q15_t)0x7c1b, (q15_t)0x7c19, (q15_t)0x7c18, (q15_t)0x7c16, (q15_t)0x7c15, (q15_t)0x7c13, (q15_t)0x7c12,
-  (q15_t)0x7c10, (q15_t)0x7c0f, (q15_t)0x7c0d, (q15_t)0x7c0b, (q15_t)0x7c0a, (q15_t)0x7c08, (q15_t)0x7c07, (q15_t)0x7c05,
-  (q15_t)0x7c04, (q15_t)0x7c02, (q15_t)0x7c01, (q15_t)0x7bff, (q15_t)0x7bfd, (q15_t)0x7bfc, (q15_t)0x7bfa, (q15_t)0x7bf9,
-  (q15_t)0x7bf7, (q15_t)0x7bf6, (q15_t)0x7bf4, (q15_t)0x7bf3, (q15_t)0x7bf1, (q15_t)0x7bef, (q15_t)0x7bee, (q15_t)0x7bec,
-  (q15_t)0x7beb, (q15_t)0x7be9, (q15_t)0x7be8, (q15_t)0x7be6, (q15_t)0x7be4, (q15_t)0x7be3, (q15_t)0x7be1, (q15_t)0x7be0,
-  (q15_t)0x7bde, (q15_t)0x7bdc, (q15_t)0x7bdb, (q15_t)0x7bd9, (q15_t)0x7bd8, (q15_t)0x7bd6, (q15_t)0x7bd5, (q15_t)0x7bd3,
-  (q15_t)0x7bd1, (q15_t)0x7bd0, (q15_t)0x7bce, (q15_t)0x7bcd, (q15_t)0x7bcb, (q15_t)0x7bc9, (q15_t)0x7bc8, (q15_t)0x7bc6,
-  (q15_t)0x7bc5, (q15_t)0x7bc3, (q15_t)0x7bc1, (q15_t)0x7bc0, (q15_t)0x7bbe, (q15_t)0x7bbd, (q15_t)0x7bbb, (q15_t)0x7bb9,
-  (q15_t)0x7bb8, (q15_t)0x7bb6, (q15_t)0x7bb5, (q15_t)0x7bb3, (q15_t)0x7bb1, (q15_t)0x7bb0, (q15_t)0x7bae, (q15_t)0x7bac,
-  (q15_t)0x7bab, (q15_t)0x7ba9, (q15_t)0x7ba8, (q15_t)0x7ba6, (q15_t)0x7ba4, (q15_t)0x7ba3, (q15_t)0x7ba1, (q15_t)0x7b9f,
-  (q15_t)0x7b9e, (q15_t)0x7b9c, (q15_t)0x7b9b, (q15_t)0x7b99, (q15_t)0x7b97, (q15_t)0x7b96, (q15_t)0x7b94, (q15_t)0x7b92,
-  (q15_t)0x7b91, (q15_t)0x7b8f, (q15_t)0x7b8d, (q15_t)0x7b8c, (q15_t)0x7b8a, (q15_t)0x7b89, (q15_t)0x7b87, (q15_t)0x7b85,
-  (q15_t)0x7b84, (q15_t)0x7b82, (q15_t)0x7b80, (q15_t)0x7b7f, (q15_t)0x7b7d, (q15_t)0x7b7b, (q15_t)0x7b7a, (q15_t)0x7b78,
-  (q15_t)0x7b76, (q15_t)0x7b75, (q15_t)0x7b73, (q15_t)0x7b71, (q15_t)0x7b70, (q15_t)0x7b6e, (q15_t)0x7b6c, (q15_t)0x7b6b,
-  (q15_t)0x7b69, (q15_t)0x7b67, (q15_t)0x7b66, (q15_t)0x7b64, (q15_t)0x7b62, (q15_t)0x7b61, (q15_t)0x7b5f, (q15_t)0x7b5d,
-  (q15_t)0x7b5c, (q15_t)0x7b5a, (q15_t)0x7b58, (q15_t)0x7b57, (q15_t)0x7b55, (q15_t)0x7b53, (q15_t)0x7b52, (q15_t)0x7b50,
-  (q15_t)0x7b4e, (q15_t)0x7b4d, (q15_t)0x7b4b, (q15_t)0x7b49, (q15_t)0x7b47, (q15_t)0x7b46, (q15_t)0x7b44, (q15_t)0x7b42,
-  (q15_t)0x7b41, (q15_t)0x7b3f, (q15_t)0x7b3d, (q15_t)0x7b3c, (q15_t)0x7b3a, (q15_t)0x7b38, (q15_t)0x7b37, (q15_t)0x7b35,
-  (q15_t)0x7b33, (q15_t)0x7b31, (q15_t)0x7b30, (q15_t)0x7b2e, (q15_t)0x7b2c, (q15_t)0x7b2b, (q15_t)0x7b29, (q15_t)0x7b27,
-  (q15_t)0x7b25, (q15_t)0x7b24, (q15_t)0x7b22, (q15_t)0x7b20, (q15_t)0x7b1f, (q15_t)0x7b1d, (q15_t)0x7b1b, (q15_t)0x7b19,
-  (q15_t)0x7b18, (q15_t)0x7b16, (q15_t)0x7b14, (q15_t)0x7b13, (q15_t)0x7b11, (q15_t)0x7b0f, (q15_t)0x7b0d, (q15_t)0x7b0c,
-  (q15_t)0x7b0a, (q15_t)0x7b08, (q15_t)0x7b06, (q15_t)0x7b05, (q15_t)0x7b03, (q15_t)0x7b01, (q15_t)0x7aff, (q15_t)0x7afe,
-  (q15_t)0x7afc, (q15_t)0x7afa, (q15_t)0x7af8, (q15_t)0x7af7, (q15_t)0x7af5, (q15_t)0x7af3, (q15_t)0x7af2, (q15_t)0x7af0,
-  (q15_t)0x7aee, (q15_t)0x7aec, (q15_t)0x7aeb, (q15_t)0x7ae9, (q15_t)0x7ae7, (q15_t)0x7ae5, (q15_t)0x7ae3, (q15_t)0x7ae2,
-  (q15_t)0x7ae0, (q15_t)0x7ade, (q15_t)0x7adc, (q15_t)0x7adb, (q15_t)0x7ad9, (q15_t)0x7ad7, (q15_t)0x7ad5, (q15_t)0x7ad4,
-  (q15_t)0x7ad2, (q15_t)0x7ad0, (q15_t)0x7ace, (q15_t)0x7acd, (q15_t)0x7acb, (q15_t)0x7ac9, (q15_t)0x7ac7, (q15_t)0x7ac5,
-  (q15_t)0x7ac4, (q15_t)0x7ac2, (q15_t)0x7ac0, (q15_t)0x7abe, (q15_t)0x7abd, (q15_t)0x7abb, (q15_t)0x7ab9, (q15_t)0x7ab7,
-  (q15_t)0x7ab5, (q15_t)0x7ab4, (q15_t)0x7ab2, (q15_t)0x7ab0, (q15_t)0x7aae, (q15_t)0x7aac, (q15_t)0x7aab, (q15_t)0x7aa9,
-  (q15_t)0x7aa7, (q15_t)0x7aa5, (q15_t)0x7aa3, (q15_t)0x7aa2, (q15_t)0x7aa0, (q15_t)0x7a9e, (q15_t)0x7a9c, (q15_t)0x7a9a,
-  (q15_t)0x7a99, (q15_t)0x7a97, (q15_t)0x7a95, (q15_t)0x7a93, (q15_t)0x7a91, (q15_t)0x7a90, (q15_t)0x7a8e, (q15_t)0x7a8c,
-  (q15_t)0x7a8a, (q15_t)0x7a88, (q15_t)0x7a87, (q15_t)0x7a85, (q15_t)0x7a83, (q15_t)0x7a81, (q15_t)0x7a7f, (q15_t)0x7a7d,
-  (q15_t)0x7a7c, (q15_t)0x7a7a, (q15_t)0x7a78, (q15_t)0x7a76, (q15_t)0x7a74, (q15_t)0x7a72, (q15_t)0x7a71, (q15_t)0x7a6f,
-  (q15_t)0x7a6d, (q15_t)0x7a6b, (q15_t)0x7a69, (q15_t)0x7a67, (q15_t)0x7a66, (q15_t)0x7a64, (q15_t)0x7a62, (q15_t)0x7a60,
-  (q15_t)0x7a5e, (q15_t)0x7a5c, (q15_t)0x7a5b, (q15_t)0x7a59, (q15_t)0x7a57, (q15_t)0x7a55, (q15_t)0x7a53, (q15_t)0x7a51,
-  (q15_t)0x7a4f, (q15_t)0x7a4e, (q15_t)0x7a4c, (q15_t)0x7a4a, (q15_t)0x7a48, (q15_t)0x7a46, (q15_t)0x7a44, (q15_t)0x7a42,
-  (q15_t)0x7a41, (q15_t)0x7a3f, (q15_t)0x7a3d, (q15_t)0x7a3b, (q15_t)0x7a39, (q15_t)0x7a37, (q15_t)0x7a35, (q15_t)0x7a34,
-  (q15_t)0x7a32, (q15_t)0x7a30, (q15_t)0x7a2e, (q15_t)0x7a2c, (q15_t)0x7a2a, (q15_t)0x7a28, (q15_t)0x7a26, (q15_t)0x7a25,
-  (q15_t)0x7a23, (q15_t)0x7a21, (q15_t)0x7a1f, (q15_t)0x7a1d, (q15_t)0x7a1b, (q15_t)0x7a19, (q15_t)0x7a17, (q15_t)0x7a16,
-  (q15_t)0x7a14, (q15_t)0x7a12, (q15_t)0x7a10, (q15_t)0x7a0e, (q15_t)0x7a0c, (q15_t)0x7a0a, (q15_t)0x7a08, (q15_t)0x7a06,
-  (q15_t)0x7a04, (q15_t)0x7a03, (q15_t)0x7a01, (q15_t)0x79ff, (q15_t)0x79fd, (q15_t)0x79fb, (q15_t)0x79f9, (q15_t)0x79f7,
-  (q15_t)0x79f5, (q15_t)0x79f3, (q15_t)0x79f1, (q15_t)0x79f0, (q15_t)0x79ee, (q15_t)0x79ec, (q15_t)0x79ea, (q15_t)0x79e8,
-  (q15_t)0x79e6, (q15_t)0x79e4, (q15_t)0x79e2, (q15_t)0x79e0, (q15_t)0x79de, (q15_t)0x79dc, (q15_t)0x79da, (q15_t)0x79d9,
-  (q15_t)0x79d7, (q15_t)0x79d5, (q15_t)0x79d3, (q15_t)0x79d1, (q15_t)0x79cf, (q15_t)0x79cd, (q15_t)0x79cb, (q15_t)0x79c9,
-  (q15_t)0x79c7, (q15_t)0x79c5, (q15_t)0x79c3, (q15_t)0x79c1, (q15_t)0x79bf, (q15_t)0x79bd, (q15_t)0x79bc, (q15_t)0x79ba,
-  (q15_t)0x79b8, (q15_t)0x79b6, (q15_t)0x79b4, (q15_t)0x79b2, (q15_t)0x79b0, (q15_t)0x79ae, (q15_t)0x79ac, (q15_t)0x79aa,
-  (q15_t)0x79a8, (q15_t)0x79a6, (q15_t)0x79a4, (q15_t)0x79a2, (q15_t)0x79a0, (q15_t)0x799e, (q15_t)0x799c, (q15_t)0x799a,
-  (q15_t)0x7998, (q15_t)0x7996, (q15_t)0x7994, (q15_t)0x7992, (q15_t)0x7991, (q15_t)0x798f, (q15_t)0x798d, (q15_t)0x798b,
-  (q15_t)0x7989, (q15_t)0x7987, (q15_t)0x7985, (q15_t)0x7983, (q15_t)0x7981, (q15_t)0x797f, (q15_t)0x797d, (q15_t)0x797b,
-  (q15_t)0x7979, (q15_t)0x7977, (q15_t)0x7975, (q15_t)0x7973, (q15_t)0x7971, (q15_t)0x796f, (q15_t)0x796d, (q15_t)0x796b,
-  (q15_t)0x7969, (q15_t)0x7967, (q15_t)0x7965, (q15_t)0x7963, (q15_t)0x7961, (q15_t)0x795f, (q15_t)0x795d, (q15_t)0x795b,
-  (q15_t)0x7959, (q15_t)0x7957, (q15_t)0x7955, (q15_t)0x7953, (q15_t)0x7951, (q15_t)0x794f, (q15_t)0x794d, (q15_t)0x794b,
-  (q15_t)0x7949, (q15_t)0x7947, (q15_t)0x7945, (q15_t)0x7943, (q15_t)0x7941, (q15_t)0x793f, (q15_t)0x793d, (q15_t)0x793b,
-  (q15_t)0x7939, (q15_t)0x7937, (q15_t)0x7935, (q15_t)0x7933, (q15_t)0x7931, (q15_t)0x792f, (q15_t)0x792d, (q15_t)0x792b,
-  (q15_t)0x7929, (q15_t)0x7927, (q15_t)0x7925, (q15_t)0x7923, (q15_t)0x7921, (q15_t)0x791f, (q15_t)0x791d, (q15_t)0x791a,
-  (q15_t)0x7918, (q15_t)0x7916, (q15_t)0x7914, (q15_t)0x7912, (q15_t)0x7910, (q15_t)0x790e, (q15_t)0x790c, (q15_t)0x790a,
-  (q15_t)0x7908, (q15_t)0x7906, (q15_t)0x7904, (q15_t)0x7902, (q15_t)0x7900, (q15_t)0x78fe, (q15_t)0x78fc, (q15_t)0x78fa,
-  (q15_t)0x78f8, (q15_t)0x78f6, (q15_t)0x78f4, (q15_t)0x78f2, (q15_t)0x78f0, (q15_t)0x78ed, (q15_t)0x78eb, (q15_t)0x78e9,
-  (q15_t)0x78e7, (q15_t)0x78e5, (q15_t)0x78e3, (q15_t)0x78e1, (q15_t)0x78df, (q15_t)0x78dd, (q15_t)0x78db, (q15_t)0x78d9,
-  (q15_t)0x78d7, (q15_t)0x78d5, (q15_t)0x78d3, (q15_t)0x78d1, (q15_t)0x78ce, (q15_t)0x78cc, (q15_t)0x78ca, (q15_t)0x78c8,
-  (q15_t)0x78c6, (q15_t)0x78c4, (q15_t)0x78c2, (q15_t)0x78c0, (q15_t)0x78be, (q15_t)0x78bc, (q15_t)0x78ba, (q15_t)0x78b8,
-  (q15_t)0x78b5, (q15_t)0x78b3, (q15_t)0x78b1, (q15_t)0x78af, (q15_t)0x78ad, (q15_t)0x78ab, (q15_t)0x78a9, (q15_t)0x78a7,
-  (q15_t)0x78a5, (q15_t)0x78a3, (q15_t)0x78a0, (q15_t)0x789e, (q15_t)0x789c, (q15_t)0x789a, (q15_t)0x7898, (q15_t)0x7896,
-  (q15_t)0x7894, (q15_t)0x7892, (q15_t)0x7890, (q15_t)0x788e, (q15_t)0x788b, (q15_t)0x7889, (q15_t)0x7887, (q15_t)0x7885,
-  (q15_t)0x7883, (q15_t)0x7881, (q15_t)0x787f, (q15_t)0x787d, (q15_t)0x787a, (q15_t)0x7878, (q15_t)0x7876, (q15_t)0x7874,
-  (q15_t)0x7872, (q15_t)0x7870, (q15_t)0x786e, (q15_t)0x786c, (q15_t)0x7869, (q15_t)0x7867, (q15_t)0x7865, (q15_t)0x7863,
-  (q15_t)0x7861, (q15_t)0x785f, (q15_t)0x785d, (q15_t)0x785b, (q15_t)0x7858, (q15_t)0x7856, (q15_t)0x7854, (q15_t)0x7852,
-  (q15_t)0x7850, (q15_t)0x784e, (q15_t)0x784c, (q15_t)0x7849, (q15_t)0x7847, (q15_t)0x7845, (q15_t)0x7843, (q15_t)0x7841,
-  (q15_t)0x783f, (q15_t)0x783c, (q15_t)0x783a, (q15_t)0x7838, (q15_t)0x7836, (q15_t)0x7834, (q15_t)0x7832, (q15_t)0x7830,
-  (q15_t)0x782d, (q15_t)0x782b, (q15_t)0x7829, (q15_t)0x7827, (q15_t)0x7825, (q15_t)0x7823, (q15_t)0x7820, (q15_t)0x781e,
-  (q15_t)0x781c, (q15_t)0x781a, (q15_t)0x7818, (q15_t)0x7816, (q15_t)0x7813, (q15_t)0x7811, (q15_t)0x780f, (q15_t)0x780d,
-  (q15_t)0x780b, (q15_t)0x7808, (q15_t)0x7806, (q15_t)0x7804, (q15_t)0x7802, (q15_t)0x7800, (q15_t)0x77fe, (q15_t)0x77fb,
-  (q15_t)0x77f9, (q15_t)0x77f7, (q15_t)0x77f5, (q15_t)0x77f3, (q15_t)0x77f0, (q15_t)0x77ee, (q15_t)0x77ec, (q15_t)0x77ea,
-  (q15_t)0x77e8, (q15_t)0x77e5, (q15_t)0x77e3, (q15_t)0x77e1, (q15_t)0x77df, (q15_t)0x77dd, (q15_t)0x77da, (q15_t)0x77d8,
-  (q15_t)0x77d6, (q15_t)0x77d4, (q15_t)0x77d2, (q15_t)0x77cf, (q15_t)0x77cd, (q15_t)0x77cb, (q15_t)0x77c9, (q15_t)0x77c6,
-  (q15_t)0x77c4, (q15_t)0x77c2, (q15_t)0x77c0, (q15_t)0x77be, (q15_t)0x77bb, (q15_t)0x77b9, (q15_t)0x77b7, (q15_t)0x77b5,
-  (q15_t)0x77b2, (q15_t)0x77b0, (q15_t)0x77ae, (q15_t)0x77ac, (q15_t)0x77aa, (q15_t)0x77a7, (q15_t)0x77a5, (q15_t)0x77a3,
-  (q15_t)0x77a1, (q15_t)0x779e, (q15_t)0x779c, (q15_t)0x779a, (q15_t)0x7798, (q15_t)0x7795, (q15_t)0x7793, (q15_t)0x7791,
-  (q15_t)0x778f, (q15_t)0x778c, (q15_t)0x778a, (q15_t)0x7788, (q15_t)0x7786, (q15_t)0x7783, (q15_t)0x7781, (q15_t)0x777f,
-  (q15_t)0x777d, (q15_t)0x777a, (q15_t)0x7778, (q15_t)0x7776, (q15_t)0x7774, (q15_t)0x7771, (q15_t)0x776f, (q15_t)0x776d,
-  (q15_t)0x776b, (q15_t)0x7768, (q15_t)0x7766, (q15_t)0x7764, (q15_t)0x7762, (q15_t)0x775f, (q15_t)0x775d, (q15_t)0x775b,
-  (q15_t)0x7759, (q15_t)0x7756, (q15_t)0x7754, (q15_t)0x7752, (q15_t)0x774f, (q15_t)0x774d, (q15_t)0x774b, (q15_t)0x7749,
-  (q15_t)0x7746, (q15_t)0x7744, (q15_t)0x7742, (q15_t)0x773f, (q15_t)0x773d, (q15_t)0x773b, (q15_t)0x7739, (q15_t)0x7736,
-  (q15_t)0x7734, (q15_t)0x7732, (q15_t)0x772f, (q15_t)0x772d, (q15_t)0x772b, (q15_t)0x7729, (q15_t)0x7726, (q15_t)0x7724,
-  (q15_t)0x7722, (q15_t)0x771f, (q15_t)0x771d, (q15_t)0x771b, (q15_t)0x7719, (q15_t)0x7716, (q15_t)0x7714, (q15_t)0x7712,
-  (q15_t)0x770f, (q15_t)0x770d, (q15_t)0x770b, (q15_t)0x7708, (q15_t)0x7706, (q15_t)0x7704, (q15_t)0x7701, (q15_t)0x76ff,
-  (q15_t)0x76fd, (q15_t)0x76fa, (q15_t)0x76f8, (q15_t)0x76f6, (q15_t)0x76f4, (q15_t)0x76f1, (q15_t)0x76ef, (q15_t)0x76ed,
-  (q15_t)0x76ea, (q15_t)0x76e8, (q15_t)0x76e6, (q15_t)0x76e3, (q15_t)0x76e1, (q15_t)0x76df, (q15_t)0x76dc, (q15_t)0x76da,
-  (q15_t)0x76d8, (q15_t)0x76d5, (q15_t)0x76d3, (q15_t)0x76d1, (q15_t)0x76ce, (q15_t)0x76cc, (q15_t)0x76ca, (q15_t)0x76c7,
-  (q15_t)0x76c5, (q15_t)0x76c3, (q15_t)0x76c0, (q15_t)0x76be, (q15_t)0x76bc, (q15_t)0x76b9, (q15_t)0x76b7, (q15_t)0x76b4,
-  (q15_t)0x76b2, (q15_t)0x76b0, (q15_t)0x76ad, (q15_t)0x76ab, (q15_t)0x76a9, (q15_t)0x76a6, (q15_t)0x76a4, (q15_t)0x76a2,
-  (q15_t)0x769f, (q15_t)0x769d, (q15_t)0x769b, (q15_t)0x7698, (q15_t)0x7696, (q15_t)0x7693, (q15_t)0x7691, (q15_t)0x768f,
-  (q15_t)0x768c, (q15_t)0x768a, (q15_t)0x7688, (q15_t)0x7685, (q15_t)0x7683, (q15_t)0x7681, (q15_t)0x767e, (q15_t)0x767c,
-  (q15_t)0x7679, (q15_t)0x7677, (q15_t)0x7675, (q15_t)0x7672, (q15_t)0x7670, (q15_t)0x766d, (q15_t)0x766b, (q15_t)0x7669,
-  (q15_t)0x7666, (q15_t)0x7664, (q15_t)0x7662, (q15_t)0x765f, (q15_t)0x765d, (q15_t)0x765a, (q15_t)0x7658, (q15_t)0x7656,
-  (q15_t)0x7653, (q15_t)0x7651, (q15_t)0x764e, (q15_t)0x764c, (q15_t)0x764a, (q15_t)0x7647, (q15_t)0x7645, (q15_t)0x7642,
-  (q15_t)0x7640, (q15_t)0x763e, (q15_t)0x763b, (q15_t)0x7639, (q15_t)0x7636, (q15_t)0x7634, (q15_t)0x7632, (q15_t)0x762f,
-  (q15_t)0x762d, (q15_t)0x762a, (q15_t)0x7628, (q15_t)0x7625, (q15_t)0x7623, (q15_t)0x7621, (q15_t)0x761e, (q15_t)0x761c,
-  (q15_t)0x7619, (q15_t)0x7617, (q15_t)0x7615, (q15_t)0x7612, (q15_t)0x7610, (q15_t)0x760d, (q15_t)0x760b, (q15_t)0x7608,
-  (q15_t)0x7606, (q15_t)0x7604, (q15_t)0x7601, (q15_t)0x75ff, (q15_t)0x75fc, (q15_t)0x75fa, (q15_t)0x75f7, (q15_t)0x75f5,
-  (q15_t)0x75f2, (q15_t)0x75f0, (q15_t)0x75ee, (q15_t)0x75eb, (q15_t)0x75e9, (q15_t)0x75e6, (q15_t)0x75e4, (q15_t)0x75e1,
-  (q15_t)0x75df, (q15_t)0x75dc, (q15_t)0x75da, (q15_t)0x75d8, (q15_t)0x75d5, (q15_t)0x75d3, (q15_t)0x75d0, (q15_t)0x75ce,
-  (q15_t)0x75cb, (q15_t)0x75c9, (q15_t)0x75c6, (q15_t)0x75c4, (q15_t)0x75c1, (q15_t)0x75bf, (q15_t)0x75bc, (q15_t)0x75ba,
-  (q15_t)0x75b8, (q15_t)0x75b5, (q15_t)0x75b3, (q15_t)0x75b0, (q15_t)0x75ae, (q15_t)0x75ab, (q15_t)0x75a9, (q15_t)0x75a6,
-  (q15_t)0x75a4, (q15_t)0x75a1, (q15_t)0x759f, (q15_t)0x759c, (q15_t)0x759a, (q15_t)0x7597, (q15_t)0x7595, (q15_t)0x7592,
-  (q15_t)0x7590, (q15_t)0x758d, (q15_t)0x758b, (q15_t)0x7588, (q15_t)0x7586, (q15_t)0x7584, (q15_t)0x7581, (q15_t)0x757f,
-  (q15_t)0x757c, (q15_t)0x757a, (q15_t)0x7577, (q15_t)0x7575, (q15_t)0x7572, (q15_t)0x7570, (q15_t)0x756d, (q15_t)0x756b,
-  (q15_t)0x7568, (q15_t)0x7566, (q15_t)0x7563, (q15_t)0x7561, (q15_t)0x755e, (q15_t)0x755c, (q15_t)0x7559, (q15_t)0x7556,
-  (q15_t)0x7554, (q15_t)0x7551, (q15_t)0x754f, (q15_t)0x754c, (q15_t)0x754a, (q15_t)0x7547, (q15_t)0x7545, (q15_t)0x7542,
-  (q15_t)0x7540, (q15_t)0x753d, (q15_t)0x753b, (q15_t)0x7538, (q15_t)0x7536, (q15_t)0x7533, (q15_t)0x7531, (q15_t)0x752e,
-  (q15_t)0x752c, (q15_t)0x7529, (q15_t)0x7527, (q15_t)0x7524, (q15_t)0x7522, (q15_t)0x751f, (q15_t)0x751c, (q15_t)0x751a,
-  (q15_t)0x7517, (q15_t)0x7515, (q15_t)0x7512, (q15_t)0x7510, (q15_t)0x750d, (q15_t)0x750b, (q15_t)0x7508, (q15_t)0x7506,
-  (q15_t)0x7503, (q15_t)0x7501, (q15_t)0x74fe, (q15_t)0x74fb, (q15_t)0x74f9, (q15_t)0x74f6, (q15_t)0x74f4, (q15_t)0x74f1,
-  (q15_t)0x74ef, (q15_t)0x74ec, (q15_t)0x74ea, (q15_t)0x74e7, (q15_t)0x74e4, (q15_t)0x74e2, (q15_t)0x74df, (q15_t)0x74dd,
-  (q15_t)0x74da, (q15_t)0x74d8, (q15_t)0x74d5, (q15_t)0x74d2, (q15_t)0x74d0, (q15_t)0x74cd, (q15_t)0x74cb, (q15_t)0x74c8,
-  (q15_t)0x74c6, (q15_t)0x74c3, (q15_t)0x74c0, (q15_t)0x74be, (q15_t)0x74bb, (q15_t)0x74b9, (q15_t)0x74b6, (q15_t)0x74b4,
-  (q15_t)0x74b1, (q15_t)0x74ae, (q15_t)0x74ac, (q15_t)0x74a9, (q15_t)0x74a7, (q15_t)0x74a4, (q15_t)0x74a1, (q15_t)0x749f,
-  (q15_t)0x749c, (q15_t)0x749a, (q15_t)0x7497, (q15_t)0x7495, (q15_t)0x7492, (q15_t)0x748f, (q15_t)0x748d, (q15_t)0x748a,
-  (q15_t)0x7488, (q15_t)0x7485, (q15_t)0x7482, (q15_t)0x7480, (q15_t)0x747d, (q15_t)0x747b, (q15_t)0x7478, (q15_t)0x7475,
-  (q15_t)0x7473, (q15_t)0x7470, (q15_t)0x746d, (q15_t)0x746b, (q15_t)0x7468, (q15_t)0x7466, (q15_t)0x7463, (q15_t)0x7460,
-  (q15_t)0x745e, (q15_t)0x745b, (q15_t)0x7459, (q15_t)0x7456, (q15_t)0x7453, (q15_t)0x7451, (q15_t)0x744e, (q15_t)0x744b,
-  (q15_t)0x7449, (q15_t)0x7446, (q15_t)0x7444, (q15_t)0x7441, (q15_t)0x743e, (q15_t)0x743c, (q15_t)0x7439, (q15_t)0x7436,
-  (q15_t)0x7434, (q15_t)0x7431, (q15_t)0x742f, (q15_t)0x742c, (q15_t)0x7429, (q15_t)0x7427, (q15_t)0x7424, (q15_t)0x7421,
-  (q15_t)0x741f, (q15_t)0x741c, (q15_t)0x7419, (q15_t)0x7417, (q15_t)0x7414, (q15_t)0x7411, (q15_t)0x740f, (q15_t)0x740c,
-  (q15_t)0x740a, (q15_t)0x7407, (q15_t)0x7404, (q15_t)0x7402, (q15_t)0x73ff, (q15_t)0x73fc, (q15_t)0x73fa, (q15_t)0x73f7,
-  (q15_t)0x73f4, (q15_t)0x73f2, (q15_t)0x73ef, (q15_t)0x73ec, (q15_t)0x73ea, (q15_t)0x73e7, (q15_t)0x73e4, (q15_t)0x73e2,
-  (q15_t)0x73df, (q15_t)0x73dc, (q15_t)0x73da, (q15_t)0x73d7, (q15_t)0x73d4, (q15_t)0x73d2, (q15_t)0x73cf, (q15_t)0x73cc,
-  (q15_t)0x73ca, (q15_t)0x73c7, (q15_t)0x73c4, (q15_t)0x73c1, (q15_t)0x73bf, (q15_t)0x73bc, (q15_t)0x73b9, (q15_t)0x73b7,
-  (q15_t)0x73b4, (q15_t)0x73b1, (q15_t)0x73af, (q15_t)0x73ac, (q15_t)0x73a9, (q15_t)0x73a7, (q15_t)0x73a4, (q15_t)0x73a1,
-  (q15_t)0x739f, (q15_t)0x739c, (q15_t)0x7399, (q15_t)0x7396, (q15_t)0x7394, (q15_t)0x7391, (q15_t)0x738e, (q15_t)0x738c,
-  (q15_t)0x7389, (q15_t)0x7386, (q15_t)0x7384, (q15_t)0x7381, (q15_t)0x737e, (q15_t)0x737b, (q15_t)0x7379, (q15_t)0x7376,
-  (q15_t)0x7373, (q15_t)0x7371, (q15_t)0x736e, (q15_t)0x736b, (q15_t)0x7368, (q15_t)0x7366, (q15_t)0x7363, (q15_t)0x7360,
-  (q15_t)0x735e, (q15_t)0x735b, (q15_t)0x7358, (q15_t)0x7355, (q15_t)0x7353, (q15_t)0x7350, (q15_t)0x734d, (q15_t)0x734a,
-  (q15_t)0x7348, (q15_t)0x7345, (q15_t)0x7342, (q15_t)0x7340, (q15_t)0x733d, (q15_t)0x733a, (q15_t)0x7337, (q15_t)0x7335,
-  (q15_t)0x7332, (q15_t)0x732f, (q15_t)0x732c, (q15_t)0x732a, (q15_t)0x7327, (q15_t)0x7324, (q15_t)0x7321, (q15_t)0x731f,
-  (q15_t)0x731c, (q15_t)0x7319, (q15_t)0x7316, (q15_t)0x7314, (q15_t)0x7311, (q15_t)0x730e, (q15_t)0x730b, (q15_t)0x7309,
-  (q15_t)0x7306, (q15_t)0x7303, (q15_t)0x7300, (q15_t)0x72fe, (q15_t)0x72fb, (q15_t)0x72f8, (q15_t)0x72f5, (q15_t)0x72f3,
-  (q15_t)0x72f0, (q15_t)0x72ed, (q15_t)0x72ea, (q15_t)0x72e8, (q15_t)0x72e5, (q15_t)0x72e2, (q15_t)0x72df, (q15_t)0x72dc,
-  (q15_t)0x72da, (q15_t)0x72d7, (q15_t)0x72d4, (q15_t)0x72d1, (q15_t)0x72cf, (q15_t)0x72cc, (q15_t)0x72c9, (q15_t)0x72c6,
-  (q15_t)0x72c3, (q15_t)0x72c1, (q15_t)0x72be, (q15_t)0x72bb, (q15_t)0x72b8, (q15_t)0x72b5, (q15_t)0x72b3, (q15_t)0x72b0,
-  (q15_t)0x72ad, (q15_t)0x72aa, (q15_t)0x72a8, (q15_t)0x72a5, (q15_t)0x72a2, (q15_t)0x729f, (q15_t)0x729c, (q15_t)0x729a,
-  (q15_t)0x7297, (q15_t)0x7294, (q15_t)0x7291, (q15_t)0x728e, (q15_t)0x728c, (q15_t)0x7289, (q15_t)0x7286, (q15_t)0x7283,
-  (q15_t)0x7280, (q15_t)0x727e, (q15_t)0x727b, (q15_t)0x7278, (q15_t)0x7275, (q15_t)0x7272, (q15_t)0x726f, (q15_t)0x726d,
-  (q15_t)0x726a, (q15_t)0x7267, (q15_t)0x7264, (q15_t)0x7261, (q15_t)0x725f, (q15_t)0x725c, (q15_t)0x7259, (q15_t)0x7256,
-  (q15_t)0x7253, (q15_t)0x7250, (q15_t)0x724e, (q15_t)0x724b, (q15_t)0x7248, (q15_t)0x7245, (q15_t)0x7242, (q15_t)0x723f,
-  (q15_t)0x723d, (q15_t)0x723a, (q15_t)0x7237, (q15_t)0x7234, (q15_t)0x7231, (q15_t)0x722e, (q15_t)0x722c, (q15_t)0x7229,
-  (q15_t)0x7226, (q15_t)0x7223, (q15_t)0x7220, (q15_t)0x721d, (q15_t)0x721b, (q15_t)0x7218, (q15_t)0x7215, (q15_t)0x7212,
-  (q15_t)0x720f, (q15_t)0x720c, (q15_t)0x7209, (q15_t)0x7207, (q15_t)0x7204, (q15_t)0x7201, (q15_t)0x71fe, (q15_t)0x71fb,
-  (q15_t)0x71f8, (q15_t)0x71f5, (q15_t)0x71f3, (q15_t)0x71f0, (q15_t)0x71ed, (q15_t)0x71ea, (q15_t)0x71e7, (q15_t)0x71e4,
-  (q15_t)0x71e1, (q15_t)0x71df, (q15_t)0x71dc, (q15_t)0x71d9, (q15_t)0x71d6, (q15_t)0x71d3, (q15_t)0x71d0, (q15_t)0x71cd,
-  (q15_t)0x71ca, (q15_t)0x71c8, (q15_t)0x71c5, (q15_t)0x71c2, (q15_t)0x71bf, (q15_t)0x71bc, (q15_t)0x71b9, (q15_t)0x71b6,
-  (q15_t)0x71b3, (q15_t)0x71b0, (q15_t)0x71ae, (q15_t)0x71ab, (q15_t)0x71a8, (q15_t)0x71a5, (q15_t)0x71a2, (q15_t)0x719f,
-  (q15_t)0x719c, (q15_t)0x7199, (q15_t)0x7196, (q15_t)0x7194, (q15_t)0x7191, (q15_t)0x718e, (q15_t)0x718b, (q15_t)0x7188,
-  (q15_t)0x7185, (q15_t)0x7182, (q15_t)0x717f, (q15_t)0x717c, (q15_t)0x7179, (q15_t)0x7177, (q15_t)0x7174, (q15_t)0x7171,
-  (q15_t)0x716e, (q15_t)0x716b, (q15_t)0x7168, (q15_t)0x7165, (q15_t)0x7162, (q15_t)0x715f, (q15_t)0x715c, (q15_t)0x7159,
-  (q15_t)0x7156, (q15_t)0x7154, (q15_t)0x7151, (q15_t)0x714e, (q15_t)0x714b, (q15_t)0x7148, (q15_t)0x7145, (q15_t)0x7142,
-  (q15_t)0x713f, (q15_t)0x713c, (q15_t)0x7139, (q15_t)0x7136, (q15_t)0x7133, (q15_t)0x7130, (q15_t)0x712d, (q15_t)0x712b,
-  (q15_t)0x7128, (q15_t)0x7125, (q15_t)0x7122, (q15_t)0x711f, (q15_t)0x711c, (q15_t)0x7119, (q15_t)0x7116, (q15_t)0x7113,
-  (q15_t)0x7110, (q15_t)0x710d, (q15_t)0x710a, (q15_t)0x7107, (q15_t)0x7104, (q15_t)0x7101, (q15_t)0x70fe, (q15_t)0x70fb,
-  (q15_t)0x70f8, (q15_t)0x70f6, (q15_t)0x70f3, (q15_t)0x70f0, (q15_t)0x70ed, (q15_t)0x70ea, (q15_t)0x70e7, (q15_t)0x70e4,
-  (q15_t)0x70e1, (q15_t)0x70de, (q15_t)0x70db, (q15_t)0x70d8, (q15_t)0x70d5, (q15_t)0x70d2, (q15_t)0x70cf, (q15_t)0x70cc,
-  (q15_t)0x70c9, (q15_t)0x70c6, (q15_t)0x70c3, (q15_t)0x70c0, (q15_t)0x70bd, (q15_t)0x70ba, (q15_t)0x70b7, (q15_t)0x70b4,
-  (q15_t)0x70b1, (q15_t)0x70ae, (q15_t)0x70ab, (q15_t)0x70a8, (q15_t)0x70a5, (q15_t)0x70a2, (q15_t)0x709f, (q15_t)0x709c,
-  (q15_t)0x7099, (q15_t)0x7096, (q15_t)0x7093, (q15_t)0x7090, (q15_t)0x708d, (q15_t)0x708a, (q15_t)0x7087, (q15_t)0x7084,
-  (q15_t)0x7081, (q15_t)0x707e, (q15_t)0x707b, (q15_t)0x7078, (q15_t)0x7075, (q15_t)0x7072, (q15_t)0x706f, (q15_t)0x706c,
-  (q15_t)0x7069, (q15_t)0x7066, (q15_t)0x7063, (q15_t)0x7060, (q15_t)0x705d, (q15_t)0x705a, (q15_t)0x7057, (q15_t)0x7054,
-  (q15_t)0x7051, (q15_t)0x704e, (q15_t)0x704b, (q15_t)0x7048, (q15_t)0x7045, (q15_t)0x7042, (q15_t)0x703f, (q15_t)0x703c,
-  (q15_t)0x7039, (q15_t)0x7036, (q15_t)0x7033, (q15_t)0x7030, (q15_t)0x702d, (q15_t)0x702a, (q15_t)0x7027, (q15_t)0x7024,
-  (q15_t)0x7021, (q15_t)0x701e, (q15_t)0x701b, (q15_t)0x7018, (q15_t)0x7015, (q15_t)0x7012, (q15_t)0x700f, (q15_t)0x700c,
-  (q15_t)0x7009, (q15_t)0x7006, (q15_t)0x7003, (q15_t)0x7000, (q15_t)0x6ffd, (q15_t)0x6ffa, (q15_t)0x6ff7, (q15_t)0x6ff3,
-  (q15_t)0x6ff0, (q15_t)0x6fed, (q15_t)0x6fea, (q15_t)0x6fe7, (q15_t)0x6fe4, (q15_t)0x6fe1, (q15_t)0x6fde, (q15_t)0x6fdb,
-  (q15_t)0x6fd8, (q15_t)0x6fd5, (q15_t)0x6fd2, (q15_t)0x6fcf, (q15_t)0x6fcc, (q15_t)0x6fc9, (q15_t)0x6fc6, (q15_t)0x6fc3,
-  (q15_t)0x6fc0, (q15_t)0x6fbc, (q15_t)0x6fb9, (q15_t)0x6fb6, (q15_t)0x6fb3, (q15_t)0x6fb0, (q15_t)0x6fad, (q15_t)0x6faa,
-  (q15_t)0x6fa7, (q15_t)0x6fa4, (q15_t)0x6fa1, (q15_t)0x6f9e, (q15_t)0x6f9b, (q15_t)0x6f98, (q15_t)0x6f95, (q15_t)0x6f91,
-  (q15_t)0x6f8e, (q15_t)0x6f8b, (q15_t)0x6f88, (q15_t)0x6f85, (q15_t)0x6f82, (q15_t)0x6f7f, (q15_t)0x6f7c, (q15_t)0x6f79,
-  (q15_t)0x6f76, (q15_t)0x6f73, (q15_t)0x6f70, (q15_t)0x6f6c, (q15_t)0x6f69, (q15_t)0x6f66, (q15_t)0x6f63, (q15_t)0x6f60,
-  (q15_t)0x6f5d, (q15_t)0x6f5a, (q15_t)0x6f57, (q15_t)0x6f54, (q15_t)0x6f51, (q15_t)0x6f4d, (q15_t)0x6f4a, (q15_t)0x6f47,
-  (q15_t)0x6f44, (q15_t)0x6f41, (q15_t)0x6f3e, (q15_t)0x6f3b, (q15_t)0x6f38, (q15_t)0x6f35, (q15_t)0x6f31, (q15_t)0x6f2e,
-  (q15_t)0x6f2b, (q15_t)0x6f28, (q15_t)0x6f25, (q15_t)0x6f22, (q15_t)0x6f1f, (q15_t)0x6f1c, (q15_t)0x6f19, (q15_t)0x6f15,
-  (q15_t)0x6f12, (q15_t)0x6f0f, (q15_t)0x6f0c, (q15_t)0x6f09, (q15_t)0x6f06, (q15_t)0x6f03, (q15_t)0x6f00, (q15_t)0x6efc,
-  (q15_t)0x6ef9, (q15_t)0x6ef6, (q15_t)0x6ef3, (q15_t)0x6ef0, (q15_t)0x6eed, (q15_t)0x6eea, (q15_t)0x6ee7, (q15_t)0x6ee3,
-  (q15_t)0x6ee0, (q15_t)0x6edd, (q15_t)0x6eda, (q15_t)0x6ed7, (q15_t)0x6ed4, (q15_t)0x6ed1, (q15_t)0x6ecd, (q15_t)0x6eca,
-  (q15_t)0x6ec7, (q15_t)0x6ec4, (q15_t)0x6ec1, (q15_t)0x6ebe, (q15_t)0x6eba, (q15_t)0x6eb7, (q15_t)0x6eb4, (q15_t)0x6eb1,
-  (q15_t)0x6eae, (q15_t)0x6eab, (q15_t)0x6ea8, (q15_t)0x6ea4, (q15_t)0x6ea1, (q15_t)0x6e9e, (q15_t)0x6e9b, (q15_t)0x6e98,
-  (q15_t)0x6e95, (q15_t)0x6e91, (q15_t)0x6e8e, (q15_t)0x6e8b, (q15_t)0x6e88, (q15_t)0x6e85, (q15_t)0x6e82, (q15_t)0x6e7e,
-  (q15_t)0x6e7b, (q15_t)0x6e78, (q15_t)0x6e75, (q15_t)0x6e72, (q15_t)0x6e6f, (q15_t)0x6e6b, (q15_t)0x6e68, (q15_t)0x6e65,
-  (q15_t)0x6e62, (q15_t)0x6e5f, (q15_t)0x6e5b, (q15_t)0x6e58, (q15_t)0x6e55, (q15_t)0x6e52, (q15_t)0x6e4f, (q15_t)0x6e4c,
-  (q15_t)0x6e48, (q15_t)0x6e45, (q15_t)0x6e42, (q15_t)0x6e3f, (q15_t)0x6e3c, (q15_t)0x6e38, (q15_t)0x6e35, (q15_t)0x6e32,
-  (q15_t)0x6e2f, (q15_t)0x6e2c, (q15_t)0x6e28, (q15_t)0x6e25, (q15_t)0x6e22, (q15_t)0x6e1f, (q15_t)0x6e1c, (q15_t)0x6e18,
-  (q15_t)0x6e15, (q15_t)0x6e12, (q15_t)0x6e0f, (q15_t)0x6e0c, (q15_t)0x6e08, (q15_t)0x6e05, (q15_t)0x6e02, (q15_t)0x6dff,
-  (q15_t)0x6dfb, (q15_t)0x6df8, (q15_t)0x6df5, (q15_t)0x6df2, (q15_t)0x6def, (q15_t)0x6deb, (q15_t)0x6de8, (q15_t)0x6de5,
-  (q15_t)0x6de2, (q15_t)0x6ddf, (q15_t)0x6ddb, (q15_t)0x6dd8, (q15_t)0x6dd5, (q15_t)0x6dd2, (q15_t)0x6dce, (q15_t)0x6dcb,
-  (q15_t)0x6dc8, (q15_t)0x6dc5, (q15_t)0x6dc1, (q15_t)0x6dbe, (q15_t)0x6dbb, (q15_t)0x6db8, (q15_t)0x6db5, (q15_t)0x6db1,
-  (q15_t)0x6dae, (q15_t)0x6dab, (q15_t)0x6da8, (q15_t)0x6da4, (q15_t)0x6da1, (q15_t)0x6d9e, (q15_t)0x6d9b, (q15_t)0x6d97,
-  (q15_t)0x6d94, (q15_t)0x6d91, (q15_t)0x6d8e, (q15_t)0x6d8a, (q15_t)0x6d87, (q15_t)0x6d84, (q15_t)0x6d81, (q15_t)0x6d7d,
-  (q15_t)0x6d7a, (q15_t)0x6d77, (q15_t)0x6d74, (q15_t)0x6d70, (q15_t)0x6d6d, (q15_t)0x6d6a, (q15_t)0x6d67, (q15_t)0x6d63,
-  (q15_t)0x6d60, (q15_t)0x6d5d, (q15_t)0x6d59, (q15_t)0x6d56, (q15_t)0x6d53, (q15_t)0x6d50, (q15_t)0x6d4c, (q15_t)0x6d49,
-  (q15_t)0x6d46, (q15_t)0x6d43, (q15_t)0x6d3f, (q15_t)0x6d3c, (q15_t)0x6d39, (q15_t)0x6d36, (q15_t)0x6d32, (q15_t)0x6d2f,
-  (q15_t)0x6d2c, (q15_t)0x6d28, (q15_t)0x6d25, (q15_t)0x6d22, (q15_t)0x6d1f, (q15_t)0x6d1b, (q15_t)0x6d18, (q15_t)0x6d15,
-  (q15_t)0x6d11, (q15_t)0x6d0e, (q15_t)0x6d0b, (q15_t)0x6d08, (q15_t)0x6d04, (q15_t)0x6d01, (q15_t)0x6cfe, (q15_t)0x6cfa,
-  (q15_t)0x6cf7, (q15_t)0x6cf4, (q15_t)0x6cf0, (q15_t)0x6ced, (q15_t)0x6cea, (q15_t)0x6ce7, (q15_t)0x6ce3, (q15_t)0x6ce0,
-  (q15_t)0x6cdd, (q15_t)0x6cd9, (q15_t)0x6cd6, (q15_t)0x6cd3, (q15_t)0x6ccf, (q15_t)0x6ccc, (q15_t)0x6cc9, (q15_t)0x6cc5,
-  (q15_t)0x6cc2, (q15_t)0x6cbf, (q15_t)0x6cbc, (q15_t)0x6cb8, (q15_t)0x6cb5, (q15_t)0x6cb2, (q15_t)0x6cae, (q15_t)0x6cab,
-  (q15_t)0x6ca8, (q15_t)0x6ca4, (q15_t)0x6ca1, (q15_t)0x6c9e, (q15_t)0x6c9a, (q15_t)0x6c97, (q15_t)0x6c94, (q15_t)0x6c90,
-  (q15_t)0x6c8d, (q15_t)0x6c8a, (q15_t)0x6c86, (q15_t)0x6c83, (q15_t)0x6c80, (q15_t)0x6c7c, (q15_t)0x6c79, (q15_t)0x6c76,
-  (q15_t)0x6c72, (q15_t)0x6c6f, (q15_t)0x6c6c, (q15_t)0x6c68, (q15_t)0x6c65, (q15_t)0x6c62, (q15_t)0x6c5e, (q15_t)0x6c5b,
-  (q15_t)0x6c58, (q15_t)0x6c54, (q15_t)0x6c51, (q15_t)0x6c4e, (q15_t)0x6c4a, (q15_t)0x6c47, (q15_t)0x6c44, (q15_t)0x6c40,
-  (q15_t)0x6c3d, (q15_t)0x6c39, (q15_t)0x6c36, (q15_t)0x6c33, (q15_t)0x6c2f, (q15_t)0x6c2c, (q15_t)0x6c29, (q15_t)0x6c25,
-  (q15_t)0x6c22, (q15_t)0x6c1f, (q15_t)0x6c1b, (q15_t)0x6c18, (q15_t)0x6c15, (q15_t)0x6c11, (q15_t)0x6c0e, (q15_t)0x6c0a,
-  (q15_t)0x6c07, (q15_t)0x6c04, (q15_t)0x6c00, (q15_t)0x6bfd, (q15_t)0x6bfa, (q15_t)0x6bf6, (q15_t)0x6bf3, (q15_t)0x6bef,
-  (q15_t)0x6bec, (q15_t)0x6be9, (q15_t)0x6be5, (q15_t)0x6be2, (q15_t)0x6bdf, (q15_t)0x6bdb, (q15_t)0x6bd8, (q15_t)0x6bd4,
-  (q15_t)0x6bd1, (q15_t)0x6bce, (q15_t)0x6bca, (q15_t)0x6bc7, (q15_t)0x6bc3, (q15_t)0x6bc0, (q15_t)0x6bbd, (q15_t)0x6bb9,
-  (q15_t)0x6bb6, (q15_t)0x6bb2, (q15_t)0x6baf, (q15_t)0x6bac, (q15_t)0x6ba8, (q15_t)0x6ba5, (q15_t)0x6ba1, (q15_t)0x6b9e,
-  (q15_t)0x6b9b, (q15_t)0x6b97, (q15_t)0x6b94, (q15_t)0x6b90, (q15_t)0x6b8d, (q15_t)0x6b8a, (q15_t)0x6b86, (q15_t)0x6b83,
-  (q15_t)0x6b7f, (q15_t)0x6b7c, (q15_t)0x6b79, (q15_t)0x6b75, (q15_t)0x6b72, (q15_t)0x6b6e, (q15_t)0x6b6b, (q15_t)0x6b68,
-  (q15_t)0x6b64, (q15_t)0x6b61, (q15_t)0x6b5d, (q15_t)0x6b5a, (q15_t)0x6b56, (q15_t)0x6b53, (q15_t)0x6b50, (q15_t)0x6b4c,
-  (q15_t)0x6b49, (q15_t)0x6b45, (q15_t)0x6b42, (q15_t)0x6b3e, (q15_t)0x6b3b, (q15_t)0x6b38, (q15_t)0x6b34, (q15_t)0x6b31,
-  (q15_t)0x6b2d, (q15_t)0x6b2a, (q15_t)0x6b26, (q15_t)0x6b23, (q15_t)0x6b20, (q15_t)0x6b1c, (q15_t)0x6b19, (q15_t)0x6b15,
-  (q15_t)0x6b12, (q15_t)0x6b0e, (q15_t)0x6b0b, (q15_t)0x6b07, (q15_t)0x6b04, (q15_t)0x6b01, (q15_t)0x6afd, (q15_t)0x6afa,
-  (q15_t)0x6af6, (q15_t)0x6af3, (q15_t)0x6aef, (q15_t)0x6aec, (q15_t)0x6ae8, (q15_t)0x6ae5, (q15_t)0x6ae1, (q15_t)0x6ade,
-  (q15_t)0x6adb, (q15_t)0x6ad7, (q15_t)0x6ad4, (q15_t)0x6ad0, (q15_t)0x6acd, (q15_t)0x6ac9, (q15_t)0x6ac6, (q15_t)0x6ac2,
-  (q15_t)0x6abf, (q15_t)0x6abb, (q15_t)0x6ab8, (q15_t)0x6ab4, (q15_t)0x6ab1, (q15_t)0x6aae, (q15_t)0x6aaa, (q15_t)0x6aa7,
-  (q15_t)0x6aa3, (q15_t)0x6aa0, (q15_t)0x6a9c, (q15_t)0x6a99, (q15_t)0x6a95, (q15_t)0x6a92, (q15_t)0x6a8e, (q15_t)0x6a8b,
-  (q15_t)0x6a87, (q15_t)0x6a84, (q15_t)0x6a80, (q15_t)0x6a7d, (q15_t)0x6a79, (q15_t)0x6a76, (q15_t)0x6a72, (q15_t)0x6a6f,
-  (q15_t)0x6a6b, (q15_t)0x6a68, (q15_t)0x6a64, (q15_t)0x6a61, (q15_t)0x6a5d, (q15_t)0x6a5a, (q15_t)0x6a56, (q15_t)0x6a53,
-  (q15_t)0x6a4f, (q15_t)0x6a4c, (q15_t)0x6a48, (q15_t)0x6a45, (q15_t)0x6a41, (q15_t)0x6a3e, (q15_t)0x6a3a, (q15_t)0x6a37,
-  (q15_t)0x6a33, (q15_t)0x6a30, (q15_t)0x6a2c, (q15_t)0x6a29, (q15_t)0x6a25, (q15_t)0x6a22, (q15_t)0x6a1e, (q15_t)0x6a1b,
-  (q15_t)0x6a17, (q15_t)0x6a14, (q15_t)0x6a10, (q15_t)0x6a0d, (q15_t)0x6a09, (q15_t)0x6a06, (q15_t)0x6a02, (q15_t)0x69ff,
-  (q15_t)0x69fb, (q15_t)0x69f8, (q15_t)0x69f4, (q15_t)0x69f1, (q15_t)0x69ed, (q15_t)0x69e9, (q15_t)0x69e6, (q15_t)0x69e2,
-  (q15_t)0x69df, (q15_t)0x69db, (q15_t)0x69d8, (q15_t)0x69d4, (q15_t)0x69d1, (q15_t)0x69cd, (q15_t)0x69ca, (q15_t)0x69c6,
-  (q15_t)0x69c3, (q15_t)0x69bf, (q15_t)0x69bc, (q15_t)0x69b8, (q15_t)0x69b4, (q15_t)0x69b1, (q15_t)0x69ad, (q15_t)0x69aa,
-  (q15_t)0x69a6, (q15_t)0x69a3, (q15_t)0x699f, (q15_t)0x699c, (q15_t)0x6998, (q15_t)0x6995, (q15_t)0x6991, (q15_t)0x698d,
-  (q15_t)0x698a, (q15_t)0x6986, (q15_t)0x6983, (q15_t)0x697f, (q15_t)0x697c, (q15_t)0x6978, (q15_t)0x6975, (q15_t)0x6971,
-  (q15_t)0x696d, (q15_t)0x696a, (q15_t)0x6966, (q15_t)0x6963, (q15_t)0x695f, (q15_t)0x695c, (q15_t)0x6958, (q15_t)0x6954,
-  (q15_t)0x6951, (q15_t)0x694d, (q15_t)0x694a, (q15_t)0x6946, (q15_t)0x6943, (q15_t)0x693f, (q15_t)0x693b, (q15_t)0x6938,
-  (q15_t)0x6934, (q15_t)0x6931, (q15_t)0x692d, (q15_t)0x692a, (q15_t)0x6926, (q15_t)0x6922, (q15_t)0x691f, (q15_t)0x691b,
-  (q15_t)0x6918, (q15_t)0x6914, (q15_t)0x6910, (q15_t)0x690d, (q15_t)0x6909, (q15_t)0x6906, (q15_t)0x6902, (q15_t)0x68fe,
-  (q15_t)0x68fb, (q15_t)0x68f7, (q15_t)0x68f4, (q15_t)0x68f0, (q15_t)0x68ec, (q15_t)0x68e9, (q15_t)0x68e5, (q15_t)0x68e2,
-  (q15_t)0x68de, (q15_t)0x68da, (q15_t)0x68d7, (q15_t)0x68d3, (q15_t)0x68d0, (q15_t)0x68cc, (q15_t)0x68c8, (q15_t)0x68c5,
-  (q15_t)0x68c1, (q15_t)0x68be, (q15_t)0x68ba, (q15_t)0x68b6, (q15_t)0x68b3, (q15_t)0x68af, (q15_t)0x68ac, (q15_t)0x68a8,
-  (q15_t)0x68a4, (q15_t)0x68a1, (q15_t)0x689d, (q15_t)0x6899, (q15_t)0x6896, (q15_t)0x6892, (q15_t)0x688f, (q15_t)0x688b,
-  (q15_t)0x6887, (q15_t)0x6884, (q15_t)0x6880, (q15_t)0x687c, (q15_t)0x6879, (q15_t)0x6875, (q15_t)0x6872, (q15_t)0x686e,
-  (q15_t)0x686a, (q15_t)0x6867, (q15_t)0x6863, (q15_t)0x685f, (q15_t)0x685c, (q15_t)0x6858, (q15_t)0x6854, (q15_t)0x6851,
-  (q15_t)0x684d, (q15_t)0x684a, (q15_t)0x6846, (q15_t)0x6842, (q15_t)0x683f, (q15_t)0x683b, (q15_t)0x6837, (q15_t)0x6834,
-  (q15_t)0x6830, (q15_t)0x682c, (q15_t)0x6829, (q15_t)0x6825, (q15_t)0x6821, (q15_t)0x681e, (q15_t)0x681a, (q15_t)0x6816,
-  (q15_t)0x6813, (q15_t)0x680f, (q15_t)0x680b, (q15_t)0x6808, (q15_t)0x6804, (q15_t)0x6800, (q15_t)0x67fd, (q15_t)0x67f9,
-  (q15_t)0x67f5, (q15_t)0x67f2, (q15_t)0x67ee, (q15_t)0x67ea, (q15_t)0x67e7, (q15_t)0x67e3, (q15_t)0x67df, (q15_t)0x67dc,
-  (q15_t)0x67d8, (q15_t)0x67d4, (q15_t)0x67d1, (q15_t)0x67cd, (q15_t)0x67c9, (q15_t)0x67c6, (q15_t)0x67c2, (q15_t)0x67be,
-  (q15_t)0x67bb, (q15_t)0x67b7, (q15_t)0x67b3, (q15_t)0x67b0, (q15_t)0x67ac, (q15_t)0x67a8, (q15_t)0x67a5, (q15_t)0x67a1,
-  (q15_t)0x679d, (q15_t)0x679a, (q15_t)0x6796, (q15_t)0x6792, (q15_t)0x678e, (q15_t)0x678b, (q15_t)0x6787, (q15_t)0x6783,
-  (q15_t)0x6780, (q15_t)0x677c, (q15_t)0x6778, (q15_t)0x6775, (q15_t)0x6771, (q15_t)0x676d, (q15_t)0x6769, (q15_t)0x6766,
-  (q15_t)0x6762, (q15_t)0x675e, (q15_t)0x675b, (q15_t)0x6757, (q15_t)0x6753, (q15_t)0x6750, (q15_t)0x674c, (q15_t)0x6748,
-  (q15_t)0x6744, (q15_t)0x6741, (q15_t)0x673d, (q15_t)0x6739, (q15_t)0x6736, (q15_t)0x6732, (q15_t)0x672e, (q15_t)0x672a,
-  (q15_t)0x6727, (q15_t)0x6723, (q15_t)0x671f, (q15_t)0x671c, (q15_t)0x6718, (q15_t)0x6714, (q15_t)0x6710, (q15_t)0x670d,
-  (q15_t)0x6709, (q15_t)0x6705, (q15_t)0x6701, (q15_t)0x66fe, (q15_t)0x66fa, (q15_t)0x66f6, (q15_t)0x66f3, (q15_t)0x66ef,
-  (q15_t)0x66eb, (q15_t)0x66e7, (q15_t)0x66e4, (q15_t)0x66e0, (q15_t)0x66dc, (q15_t)0x66d8, (q15_t)0x66d5, (q15_t)0x66d1,
-  (q15_t)0x66cd, (q15_t)0x66c9, (q15_t)0x66c6, (q15_t)0x66c2, (q15_t)0x66be, (q15_t)0x66ba, (q15_t)0x66b7, (q15_t)0x66b3,
-  (q15_t)0x66af, (q15_t)0x66ab, (q15_t)0x66a8, (q15_t)0x66a4, (q15_t)0x66a0, (q15_t)0x669c, (q15_t)0x6699, (q15_t)0x6695,
-  (q15_t)0x6691, (q15_t)0x668d, (q15_t)0x668a, (q15_t)0x6686, (q15_t)0x6682, (q15_t)0x667e, (q15_t)0x667b, (q15_t)0x6677,
-  (q15_t)0x6673, (q15_t)0x666f, (q15_t)0x666b, (q15_t)0x6668, (q15_t)0x6664, (q15_t)0x6660, (q15_t)0x665c, (q15_t)0x6659,
-  (q15_t)0x6655, (q15_t)0x6651, (q15_t)0x664d, (q15_t)0x664a, (q15_t)0x6646, (q15_t)0x6642, (q15_t)0x663e, (q15_t)0x663a,
-  (q15_t)0x6637, (q15_t)0x6633, (q15_t)0x662f, (q15_t)0x662b, (q15_t)0x6627, (q15_t)0x6624, (q15_t)0x6620, (q15_t)0x661c,
-  (q15_t)0x6618, (q15_t)0x6615, (q15_t)0x6611, (q15_t)0x660d, (q15_t)0x6609, (q15_t)0x6605, (q15_t)0x6602, (q15_t)0x65fe,
-  (q15_t)0x65fa, (q15_t)0x65f6, (q15_t)0x65f2, (q15_t)0x65ef, (q15_t)0x65eb, (q15_t)0x65e7, (q15_t)0x65e3, (q15_t)0x65df,
-  (q15_t)0x65dc, (q15_t)0x65d8, (q15_t)0x65d4, (q15_t)0x65d0, (q15_t)0x65cc, (q15_t)0x65c9, (q15_t)0x65c5, (q15_t)0x65c1,
-  (q15_t)0x65bd, (q15_t)0x65b9, (q15_t)0x65b5, (q15_t)0x65b2, (q15_t)0x65ae, (q15_t)0x65aa, (q15_t)0x65a6, (q15_t)0x65a2,
-  (q15_t)0x659f, (q15_t)0x659b, (q15_t)0x6597, (q15_t)0x6593, (q15_t)0x658f, (q15_t)0x658b, (q15_t)0x6588, (q15_t)0x6584,
-  (q15_t)0x6580, (q15_t)0x657c, (q15_t)0x6578, (q15_t)0x6574, (q15_t)0x6571, (q15_t)0x656d, (q15_t)0x6569, (q15_t)0x6565,
-  (q15_t)0x6561, (q15_t)0x655d, (q15_t)0x655a, (q15_t)0x6556, (q15_t)0x6552, (q15_t)0x654e, (q15_t)0x654a, (q15_t)0x6546,
-  (q15_t)0x6543, (q15_t)0x653f, (q15_t)0x653b, (q15_t)0x6537, (q15_t)0x6533, (q15_t)0x652f, (q15_t)0x652c, (q15_t)0x6528,
-  (q15_t)0x6524, (q15_t)0x6520, (q15_t)0x651c, (q15_t)0x6518, (q15_t)0x6514, (q15_t)0x6511, (q15_t)0x650d, (q15_t)0x6509,
-  (q15_t)0x6505, (q15_t)0x6501, (q15_t)0x64fd, (q15_t)0x64f9, (q15_t)0x64f6, (q15_t)0x64f2, (q15_t)0x64ee, (q15_t)0x64ea,
-  (q15_t)0x64e6, (q15_t)0x64e2, (q15_t)0x64de, (q15_t)0x64db, (q15_t)0x64d7, (q15_t)0x64d3, (q15_t)0x64cf, (q15_t)0x64cb,
-  (q15_t)0x64c7, (q15_t)0x64c3, (q15_t)0x64bf, (q15_t)0x64bc, (q15_t)0x64b8, (q15_t)0x64b4, (q15_t)0x64b0, (q15_t)0x64ac,
-  (q15_t)0x64a8, (q15_t)0x64a4, (q15_t)0x64a0, (q15_t)0x649c, (q15_t)0x6499, (q15_t)0x6495, (q15_t)0x6491, (q15_t)0x648d,
-  (q15_t)0x6489, (q15_t)0x6485, (q15_t)0x6481, (q15_t)0x647d, (q15_t)0x6479, (q15_t)0x6476, (q15_t)0x6472, (q15_t)0x646e,
-  (q15_t)0x646a, (q15_t)0x6466, (q15_t)0x6462, (q15_t)0x645e, (q15_t)0x645a, (q15_t)0x6456, (q15_t)0x6453, (q15_t)0x644f,
-  (q15_t)0x644b, (q15_t)0x6447, (q15_t)0x6443, (q15_t)0x643f, (q15_t)0x643b, (q15_t)0x6437, (q15_t)0x6433, (q15_t)0x642f,
-  (q15_t)0x642b, (q15_t)0x6428, (q15_t)0x6424, (q15_t)0x6420, (q15_t)0x641c, (q15_t)0x6418, (q15_t)0x6414, (q15_t)0x6410,
-  (q15_t)0x640c, (q15_t)0x6408, (q15_t)0x6404, (q15_t)0x6400, (q15_t)0x63fc, (q15_t)0x63f9, (q15_t)0x63f5, (q15_t)0x63f1,
-  (q15_t)0x63ed, (q15_t)0x63e9, (q15_t)0x63e5, (q15_t)0x63e1, (q15_t)0x63dd, (q15_t)0x63d9, (q15_t)0x63d5, (q15_t)0x63d1,
-  (q15_t)0x63cd, (q15_t)0x63c9, (q15_t)0x63c5, (q15_t)0x63c1, (q15_t)0x63be, (q15_t)0x63ba, (q15_t)0x63b6, (q15_t)0x63b2,
-  (q15_t)0x63ae, (q15_t)0x63aa, (q15_t)0x63a6, (q15_t)0x63a2, (q15_t)0x639e, (q15_t)0x639a, (q15_t)0x6396, (q15_t)0x6392,
-  (q15_t)0x638e, (q15_t)0x638a, (q15_t)0x6386, (q15_t)0x6382, (q15_t)0x637e, (q15_t)0x637a, (q15_t)0x6377, (q15_t)0x6373,
-  (q15_t)0x636f, (q15_t)0x636b, (q15_t)0x6367, (q15_t)0x6363, (q15_t)0x635f, (q15_t)0x635b, (q15_t)0x6357, (q15_t)0x6353,
-  (q15_t)0x634f, (q15_t)0x634b, (q15_t)0x6347, (q15_t)0x6343, (q15_t)0x633f, (q15_t)0x633b, (q15_t)0x6337, (q15_t)0x6333,
-  (q15_t)0x632f, (q15_t)0x632b, (q15_t)0x6327, (q15_t)0x6323, (q15_t)0x631f, (q15_t)0x631b, (q15_t)0x6317, (q15_t)0x6313,
-  (q15_t)0x630f, (q15_t)0x630b, (q15_t)0x6307, (q15_t)0x6303, (q15_t)0x62ff, (q15_t)0x62fb, (q15_t)0x62f7, (q15_t)0x62f3,
-  (q15_t)0x62f0, (q15_t)0x62ec, (q15_t)0x62e8, (q15_t)0x62e4, (q15_t)0x62e0, (q15_t)0x62dc, (q15_t)0x62d8, (q15_t)0x62d4,
-  (q15_t)0x62d0, (q15_t)0x62cc, (q15_t)0x62c8, (q15_t)0x62c4, (q15_t)0x62c0, (q15_t)0x62bc, (q15_t)0x62b8, (q15_t)0x62b4,
-  (q15_t)0x62b0, (q15_t)0x62ac, (q15_t)0x62a8, (q15_t)0x62a4, (q15_t)0x62a0, (q15_t)0x629c, (q15_t)0x6298, (q15_t)0x6294,
-  (q15_t)0x6290, (q15_t)0x628c, (q15_t)0x6288, (q15_t)0x6284, (q15_t)0x6280, (q15_t)0x627c, (q15_t)0x6278, (q15_t)0x6273,
-  (q15_t)0x626f, (q15_t)0x626b, (q15_t)0x6267, (q15_t)0x6263, (q15_t)0x625f, (q15_t)0x625b, (q15_t)0x6257, (q15_t)0x6253,
-  (q15_t)0x624f, (q15_t)0x624b, (q15_t)0x6247, (q15_t)0x6243, (q15_t)0x623f, (q15_t)0x623b, (q15_t)0x6237, (q15_t)0x6233,
-  (q15_t)0x622f, (q15_t)0x622b, (q15_t)0x6227, (q15_t)0x6223, (q15_t)0x621f, (q15_t)0x621b, (q15_t)0x6217, (q15_t)0x6213,
-  (q15_t)0x620f, (q15_t)0x620b, (q15_t)0x6207, (q15_t)0x6203, (q15_t)0x61ff, (q15_t)0x61fb, (q15_t)0x61f7, (q15_t)0x61f3,
-  (q15_t)0x61ee, (q15_t)0x61ea, (q15_t)0x61e6, (q15_t)0x61e2, (q15_t)0x61de, (q15_t)0x61da, (q15_t)0x61d6, (q15_t)0x61d2,
-  (q15_t)0x61ce, (q15_t)0x61ca, (q15_t)0x61c6, (q15_t)0x61c2, (q15_t)0x61be, (q15_t)0x61ba, (q15_t)0x61b6, (q15_t)0x61b2,
-  (q15_t)0x61ae, (q15_t)0x61aa, (q15_t)0x61a6, (q15_t)0x61a1, (q15_t)0x619d, (q15_t)0x6199, (q15_t)0x6195, (q15_t)0x6191,
-  (q15_t)0x618d, (q15_t)0x6189, (q15_t)0x6185, (q15_t)0x6181, (q15_t)0x617d, (q15_t)0x6179, (q15_t)0x6175, (q15_t)0x6171,
-  (q15_t)0x616d, (q15_t)0x6168, (q15_t)0x6164, (q15_t)0x6160, (q15_t)0x615c, (q15_t)0x6158, (q15_t)0x6154, (q15_t)0x6150,
-  (q15_t)0x614c, (q15_t)0x6148, (q15_t)0x6144, (q15_t)0x6140, (q15_t)0x613c, (q15_t)0x6137, (q15_t)0x6133, (q15_t)0x612f,
-  (q15_t)0x612b, (q15_t)0x6127, (q15_t)0x6123, (q15_t)0x611f, (q15_t)0x611b, (q15_t)0x6117, (q15_t)0x6113, (q15_t)0x610f,
-  (q15_t)0x610a, (q15_t)0x6106, (q15_t)0x6102, (q15_t)0x60fe, (q15_t)0x60fa, (q15_t)0x60f6, (q15_t)0x60f2, (q15_t)0x60ee,
-  (q15_t)0x60ea, (q15_t)0x60e6, (q15_t)0x60e1, (q15_t)0x60dd, (q15_t)0x60d9, (q15_t)0x60d5, (q15_t)0x60d1, (q15_t)0x60cd,
-  (q15_t)0x60c9, (q15_t)0x60c5, (q15_t)0x60c1, (q15_t)0x60bc, (q15_t)0x60b8, (q15_t)0x60b4, (q15_t)0x60b0, (q15_t)0x60ac,
-  (q15_t)0x60a8, (q15_t)0x60a4, (q15_t)0x60a0, (q15_t)0x609c, (q15_t)0x6097, (q15_t)0x6093, (q15_t)0x608f, (q15_t)0x608b,
-  (q15_t)0x6087, (q15_t)0x6083, (q15_t)0x607f, (q15_t)0x607b, (q15_t)0x6076, (q15_t)0x6072, (q15_t)0x606e, (q15_t)0x606a,
-  (q15_t)0x6066, (q15_t)0x6062, (q15_t)0x605e, (q15_t)0x6059, (q15_t)0x6055, (q15_t)0x6051, (q15_t)0x604d, (q15_t)0x6049,
-  (q15_t)0x6045, (q15_t)0x6041, (q15_t)0x603c, (q15_t)0x6038, (q15_t)0x6034, (q15_t)0x6030, (q15_t)0x602c, (q15_t)0x6028,
-  (q15_t)0x6024, (q15_t)0x601f, (q15_t)0x601b, (q15_t)0x6017, (q15_t)0x6013, (q15_t)0x600f, (q15_t)0x600b, (q15_t)0x6007,
-  (q15_t)0x6002, (q15_t)0x5ffe, (q15_t)0x5ffa, (q15_t)0x5ff6, (q15_t)0x5ff2, (q15_t)0x5fee, (q15_t)0x5fe9, (q15_t)0x5fe5,
-  (q15_t)0x5fe1, (q15_t)0x5fdd, (q15_t)0x5fd9, (q15_t)0x5fd5, (q15_t)0x5fd0, (q15_t)0x5fcc, (q15_t)0x5fc8, (q15_t)0x5fc4,
-  (q15_t)0x5fc0, (q15_t)0x5fbc, (q15_t)0x5fb7, (q15_t)0x5fb3, (q15_t)0x5faf, (q15_t)0x5fab, (q15_t)0x5fa7, (q15_t)0x5fa3,
-  (q15_t)0x5f9e, (q15_t)0x5f9a, (q15_t)0x5f96, (q15_t)0x5f92, (q15_t)0x5f8e, (q15_t)0x5f8a, (q15_t)0x5f85, (q15_t)0x5f81,
-  (q15_t)0x5f7d, (q15_t)0x5f79, (q15_t)0x5f75, (q15_t)0x5f70, (q15_t)0x5f6c, (q15_t)0x5f68, (q15_t)0x5f64, (q15_t)0x5f60,
-  (q15_t)0x5f5b, (q15_t)0x5f57, (q15_t)0x5f53, (q15_t)0x5f4f, (q15_t)0x5f4b, (q15_t)0x5f46, (q15_t)0x5f42, (q15_t)0x5f3e,
-  (q15_t)0x5f3a, (q15_t)0x5f36, (q15_t)0x5f31, (q15_t)0x5f2d, (q15_t)0x5f29, (q15_t)0x5f25, (q15_t)0x5f21, (q15_t)0x5f1c,
-  (q15_t)0x5f18, (q15_t)0x5f14, (q15_t)0x5f10, (q15_t)0x5f0c, (q15_t)0x5f07, (q15_t)0x5f03, (q15_t)0x5eff, (q15_t)0x5efb,
-  (q15_t)0x5ef7, (q15_t)0x5ef2, (q15_t)0x5eee, (q15_t)0x5eea, (q15_t)0x5ee6, (q15_t)0x5ee2, (q15_t)0x5edd, (q15_t)0x5ed9,
-  (q15_t)0x5ed5, (q15_t)0x5ed1, (q15_t)0x5ecc, (q15_t)0x5ec8, (q15_t)0x5ec4, (q15_t)0x5ec0, (q15_t)0x5ebc, (q15_t)0x5eb7,
-  (q15_t)0x5eb3, (q15_t)0x5eaf, (q15_t)0x5eab, (q15_t)0x5ea6, (q15_t)0x5ea2, (q15_t)0x5e9e, (q15_t)0x5e9a, (q15_t)0x5e95,
-  (q15_t)0x5e91, (q15_t)0x5e8d, (q15_t)0x5e89, (q15_t)0x5e85, (q15_t)0x5e80, (q15_t)0x5e7c, (q15_t)0x5e78, (q15_t)0x5e74,
-  (q15_t)0x5e6f, (q15_t)0x5e6b, (q15_t)0x5e67, (q15_t)0x5e63, (q15_t)0x5e5e, (q15_t)0x5e5a, (q15_t)0x5e56, (q15_t)0x5e52,
-  (q15_t)0x5e4d, (q15_t)0x5e49, (q15_t)0x5e45, (q15_t)0x5e41, (q15_t)0x5e3c, (q15_t)0x5e38, (q15_t)0x5e34, (q15_t)0x5e30,
-  (q15_t)0x5e2b, (q15_t)0x5e27, (q15_t)0x5e23, (q15_t)0x5e1f, (q15_t)0x5e1a, (q15_t)0x5e16, (q15_t)0x5e12, (q15_t)0x5e0e,
-  (q15_t)0x5e09, (q15_t)0x5e05, (q15_t)0x5e01, (q15_t)0x5dfd, (q15_t)0x5df8, (q15_t)0x5df4, (q15_t)0x5df0, (q15_t)0x5deb,
-  (q15_t)0x5de7, (q15_t)0x5de3, (q15_t)0x5ddf, (q15_t)0x5dda, (q15_t)0x5dd6, (q15_t)0x5dd2, (q15_t)0x5dce, (q15_t)0x5dc9,
-  (q15_t)0x5dc5, (q15_t)0x5dc1, (q15_t)0x5dbc, (q15_t)0x5db8, (q15_t)0x5db4, (q15_t)0x5db0, (q15_t)0x5dab, (q15_t)0x5da7,
-  (q15_t)0x5da3, (q15_t)0x5d9e, (q15_t)0x5d9a, (q15_t)0x5d96, (q15_t)0x5d92, (q15_t)0x5d8d, (q15_t)0x5d89, (q15_t)0x5d85,
-  (q15_t)0x5d80, (q15_t)0x5d7c, (q15_t)0x5d78, (q15_t)0x5d74, (q15_t)0x5d6f, (q15_t)0x5d6b, (q15_t)0x5d67, (q15_t)0x5d62,
-  (q15_t)0x5d5e, (q15_t)0x5d5a, (q15_t)0x5d55, (q15_t)0x5d51, (q15_t)0x5d4d, (q15_t)0x5d49, (q15_t)0x5d44, (q15_t)0x5d40,
-  (q15_t)0x5d3c, (q15_t)0x5d37, (q15_t)0x5d33, (q15_t)0x5d2f, (q15_t)0x5d2a, (q15_t)0x5d26, (q15_t)0x5d22, (q15_t)0x5d1e,
-  (q15_t)0x5d19, (q15_t)0x5d15, (q15_t)0x5d11, (q15_t)0x5d0c, (q15_t)0x5d08, (q15_t)0x5d04, (q15_t)0x5cff, (q15_t)0x5cfb,
-  (q15_t)0x5cf7, (q15_t)0x5cf2, (q15_t)0x5cee, (q15_t)0x5cea, (q15_t)0x5ce5, (q15_t)0x5ce1, (q15_t)0x5cdd, (q15_t)0x5cd8,
-  (q15_t)0x5cd4, (q15_t)0x5cd0, (q15_t)0x5ccb, (q15_t)0x5cc7, (q15_t)0x5cc3, (q15_t)0x5cbe, (q15_t)0x5cba, (q15_t)0x5cb6,
-  (q15_t)0x5cb1, (q15_t)0x5cad, (q15_t)0x5ca9, (q15_t)0x5ca4, (q15_t)0x5ca0, (q15_t)0x5c9c, (q15_t)0x5c97, (q15_t)0x5c93,
-  (q15_t)0x5c8f, (q15_t)0x5c8a, (q15_t)0x5c86, (q15_t)0x5c82, (q15_t)0x5c7d, (q15_t)0x5c79, (q15_t)0x5c75, (q15_t)0x5c70,
-  (q15_t)0x5c6c, (q15_t)0x5c68, (q15_t)0x5c63, (q15_t)0x5c5f, (q15_t)0x5c5b, (q15_t)0x5c56, (q15_t)0x5c52, (q15_t)0x5c4e,
-  (q15_t)0x5c49, (q15_t)0x5c45, (q15_t)0x5c41, (q15_t)0x5c3c, (q15_t)0x5c38, (q15_t)0x5c33, (q15_t)0x5c2f, (q15_t)0x5c2b,
-  (q15_t)0x5c26, (q15_t)0x5c22, (q15_t)0x5c1e, (q15_t)0x5c19, (q15_t)0x5c15, (q15_t)0x5c11, (q15_t)0x5c0c, (q15_t)0x5c08,
-  (q15_t)0x5c03, (q15_t)0x5bff, (q15_t)0x5bfb, (q15_t)0x5bf6, (q15_t)0x5bf2, (q15_t)0x5bee, (q15_t)0x5be9, (q15_t)0x5be5,
-  (q15_t)0x5be0, (q15_t)0x5bdc, (q15_t)0x5bd8, (q15_t)0x5bd3, (q15_t)0x5bcf, (q15_t)0x5bcb, (q15_t)0x5bc6, (q15_t)0x5bc2,
-  (q15_t)0x5bbd, (q15_t)0x5bb9, (q15_t)0x5bb5, (q15_t)0x5bb0, (q15_t)0x5bac, (q15_t)0x5ba8, (q15_t)0x5ba3, (q15_t)0x5b9f,
-  (q15_t)0x5b9a, (q15_t)0x5b96, (q15_t)0x5b92, (q15_t)0x5b8d, (q15_t)0x5b89, (q15_t)0x5b84, (q15_t)0x5b80, (q15_t)0x5b7c,
-  (q15_t)0x5b77, (q15_t)0x5b73, (q15_t)0x5b6e, (q15_t)0x5b6a, (q15_t)0x5b66, (q15_t)0x5b61, (q15_t)0x5b5d, (q15_t)0x5b58,
-  (q15_t)0x5b54, (q15_t)0x5b50, (q15_t)0x5b4b, (q15_t)0x5b47, (q15_t)0x5b42, (q15_t)0x5b3e, (q15_t)0x5b3a, (q15_t)0x5b35,
-  (q15_t)0x5b31, (q15_t)0x5b2c, (q15_t)0x5b28, (q15_t)0x5b24, (q15_t)0x5b1f, (q15_t)0x5b1b, (q15_t)0x5b16, (q15_t)0x5b12,
-  (q15_t)0x5b0e, (q15_t)0x5b09, (q15_t)0x5b05, (q15_t)0x5b00, (q15_t)0x5afc, (q15_t)0x5af7, (q15_t)0x5af3, (q15_t)0x5aef,
-  (q15_t)0x5aea, (q15_t)0x5ae6, (q15_t)0x5ae1, (q15_t)0x5add, (q15_t)0x5ad8, (q15_t)0x5ad4, (q15_t)0x5ad0, (q15_t)0x5acb,
-  (q15_t)0x5ac7, (q15_t)0x5ac2, (q15_t)0x5abe, (q15_t)0x5ab9, (q15_t)0x5ab5, (q15_t)0x5ab1, (q15_t)0x5aac, (q15_t)0x5aa8,
-  (q15_t)0x5aa3, (q15_t)0x5a9f, (q15_t)0x5a9a, (q15_t)0x5a96, (q15_t)0x5a92, (q15_t)0x5a8d, (q15_t)0x5a89, (q15_t)0x5a84,
-  (q15_t)0x5a80, (q15_t)0x5a7b, (q15_t)0x5a77, (q15_t)0x5a72, (q15_t)0x5a6e, (q15_t)0x5a6a, (q15_t)0x5a65, (q15_t)0x5a61,
-  (q15_t)0x5a5c, (q15_t)0x5a58, (q15_t)0x5a53, (q15_t)0x5a4f, (q15_t)0x5a4a, (q15_t)0x5a46, (q15_t)0x5a41, (q15_t)0x5a3d,
-  (q15_t)0x5a39, (q15_t)0x5a34, (q15_t)0x5a30, (q15_t)0x5a2b, (q15_t)0x5a27, (q15_t)0x5a22, (q15_t)0x5a1e, (q15_t)0x5a19,
-  (q15_t)0x5a15, (q15_t)0x5a10, (q15_t)0x5a0c, (q15_t)0x5a07, (q15_t)0x5a03, (q15_t)0x59ff, (q15_t)0x59fa, (q15_t)0x59f6,
-  (q15_t)0x59f1, (q15_t)0x59ed, (q15_t)0x59e8, (q15_t)0x59e4, (q15_t)0x59df, (q15_t)0x59db, (q15_t)0x59d6, (q15_t)0x59d2,
-  (q15_t)0x59cd, (q15_t)0x59c9, (q15_t)0x59c4, (q15_t)0x59c0, (q15_t)0x59bb, (q15_t)0x59b7, (q15_t)0x59b2, (q15_t)0x59ae,
-  (q15_t)0x59a9, (q15_t)0x59a5, (q15_t)0x59a1, (q15_t)0x599c, (q15_t)0x5998, (q15_t)0x5993, (q15_t)0x598f, (q15_t)0x598a,
-  (q15_t)0x5986, (q15_t)0x5981, (q15_t)0x597d, (q15_t)0x5978, (q15_t)0x5974, (q15_t)0x596f, (q15_t)0x596b, (q15_t)0x5966,
-  (q15_t)0x5962, (q15_t)0x595d, (q15_t)0x5959, (q15_t)0x5954, (q15_t)0x5950, (q15_t)0x594b, (q15_t)0x5947, (q15_t)0x5942,
-  (q15_t)0x593e, (q15_t)0x5939, (q15_t)0x5935, (q15_t)0x5930, (q15_t)0x592c, (q15_t)0x5927, (q15_t)0x5923, (q15_t)0x591e,
-  (q15_t)0x591a, (q15_t)0x5915, (q15_t)0x5911, (q15_t)0x590c, (q15_t)0x5908, (q15_t)0x5903, (q15_t)0x58fe, (q15_t)0x58fa,
-  (q15_t)0x58f5, (q15_t)0x58f1, (q15_t)0x58ec, (q15_t)0x58e8, (q15_t)0x58e3, (q15_t)0x58df, (q15_t)0x58da, (q15_t)0x58d6,
-  (q15_t)0x58d1, (q15_t)0x58cd, (q15_t)0x58c8, (q15_t)0x58c4, (q15_t)0x58bf, (q15_t)0x58bb, (q15_t)0x58b6, (q15_t)0x58b2,
-  (q15_t)0x58ad, (q15_t)0x58a9, (q15_t)0x58a4, (q15_t)0x589f, (q15_t)0x589b, (q15_t)0x5896, (q15_t)0x5892, (q15_t)0x588d,
-  (q15_t)0x5889, (q15_t)0x5884, (q15_t)0x5880, (q15_t)0x587b, (q15_t)0x5877, (q15_t)0x5872, (q15_t)0x586e, (q15_t)0x5869,
-  (q15_t)0x5864, (q15_t)0x5860, (q15_t)0x585b, (q15_t)0x5857, (q15_t)0x5852, (q15_t)0x584e, (q15_t)0x5849, (q15_t)0x5845,
-  (q15_t)0x5840, (q15_t)0x583c, (q15_t)0x5837, (q15_t)0x5832, (q15_t)0x582e, (q15_t)0x5829, (q15_t)0x5825, (q15_t)0x5820,
-  (q15_t)0x581c, (q15_t)0x5817, (q15_t)0x5813, (q15_t)0x580e, (q15_t)0x5809, (q15_t)0x5805, (q15_t)0x5800, (q15_t)0x57fc,
-  (q15_t)0x57f7, (q15_t)0x57f3, (q15_t)0x57ee, (q15_t)0x57e9, (q15_t)0x57e5, (q15_t)0x57e0, (q15_t)0x57dc, (q15_t)0x57d7,
-  (q15_t)0x57d3, (q15_t)0x57ce, (q15_t)0x57c9, (q15_t)0x57c5, (q15_t)0x57c0, (q15_t)0x57bc, (q15_t)0x57b7, (q15_t)0x57b3,
-  (q15_t)0x57ae, (q15_t)0x57a9, (q15_t)0x57a5, (q15_t)0x57a0, (q15_t)0x579c, (q15_t)0x5797, (q15_t)0x5793, (q15_t)0x578e,
-  (q15_t)0x5789, (q15_t)0x5785, (q15_t)0x5780, (q15_t)0x577c, (q15_t)0x5777, (q15_t)0x5772, (q15_t)0x576e, (q15_t)0x5769,
-  (q15_t)0x5765, (q15_t)0x5760, (q15_t)0x575c, (q15_t)0x5757, (q15_t)0x5752, (q15_t)0x574e, (q15_t)0x5749, (q15_t)0x5745,
-  (q15_t)0x5740, (q15_t)0x573b, (q15_t)0x5737, (q15_t)0x5732, (q15_t)0x572e, (q15_t)0x5729, (q15_t)0x5724, (q15_t)0x5720,
-  (q15_t)0x571b, (q15_t)0x5717, (q15_t)0x5712, (q15_t)0x570d, (q15_t)0x5709, (q15_t)0x5704, (q15_t)0x56ff, (q15_t)0x56fb,
-  (q15_t)0x56f6, (q15_t)0x56f2, (q15_t)0x56ed, (q15_t)0x56e8, (q15_t)0x56e4, (q15_t)0x56df, (q15_t)0x56db, (q15_t)0x56d6,
-  (q15_t)0x56d1, (q15_t)0x56cd, (q15_t)0x56c8, (q15_t)0x56c4, (q15_t)0x56bf, (q15_t)0x56ba, (q15_t)0x56b6, (q15_t)0x56b1,
-  (q15_t)0x56ac, (q15_t)0x56a8, (q15_t)0x56a3, (q15_t)0x569f, (q15_t)0x569a, (q15_t)0x5695, (q15_t)0x5691, (q15_t)0x568c,
-  (q15_t)0x5687, (q15_t)0x5683, (q15_t)0x567e, (q15_t)0x5679, (q15_t)0x5675, (q15_t)0x5670, (q15_t)0x566c, (q15_t)0x5667,
-  (q15_t)0x5662, (q15_t)0x565e, (q15_t)0x5659, (q15_t)0x5654, (q15_t)0x5650, (q15_t)0x564b, (q15_t)0x5646, (q15_t)0x5642,
-  (q15_t)0x563d, (q15_t)0x5639, (q15_t)0x5634, (q15_t)0x562f, (q15_t)0x562b, (q15_t)0x5626, (q15_t)0x5621, (q15_t)0x561d,
-  (q15_t)0x5618, (q15_t)0x5613, (q15_t)0x560f, (q15_t)0x560a, (q15_t)0x5605, (q15_t)0x5601, (q15_t)0x55fc, (q15_t)0x55f7,
-  (q15_t)0x55f3, (q15_t)0x55ee, (q15_t)0x55ea, (q15_t)0x55e5, (q15_t)0x55e0, (q15_t)0x55dc, (q15_t)0x55d7, (q15_t)0x55d2,
-  (q15_t)0x55ce, (q15_t)0x55c9, (q15_t)0x55c4, (q15_t)0x55c0, (q15_t)0x55bb, (q15_t)0x55b6, (q15_t)0x55b2, (q15_t)0x55ad,
-  (q15_t)0x55a8, (q15_t)0x55a4, (q15_t)0x559f, (q15_t)0x559a, (q15_t)0x5596, (q15_t)0x5591, (q15_t)0x558c, (q15_t)0x5588,
-  (q15_t)0x5583, (q15_t)0x557e, (q15_t)0x5579, (q15_t)0x5575, (q15_t)0x5570, (q15_t)0x556b, (q15_t)0x5567, (q15_t)0x5562,
-  (q15_t)0x555d, (q15_t)0x5559, (q15_t)0x5554, (q15_t)0x554f, (q15_t)0x554b, (q15_t)0x5546, (q15_t)0x5541, (q15_t)0x553d,
-  (q15_t)0x5538, (q15_t)0x5533, (q15_t)0x552f, (q15_t)0x552a, (q15_t)0x5525, (q15_t)0x5520, (q15_t)0x551c, (q15_t)0x5517,
-  (q15_t)0x5512, (q15_t)0x550e, (q15_t)0x5509, (q15_t)0x5504, (q15_t)0x5500, (q15_t)0x54fb, (q15_t)0x54f6, (q15_t)0x54f2,
-  (q15_t)0x54ed, (q15_t)0x54e8, (q15_t)0x54e3, (q15_t)0x54df, (q15_t)0x54da, (q15_t)0x54d5, (q15_t)0x54d1, (q15_t)0x54cc,
-  (q15_t)0x54c7, (q15_t)0x54c2, (q15_t)0x54be, (q15_t)0x54b9, (q15_t)0x54b4, (q15_t)0x54b0, (q15_t)0x54ab, (q15_t)0x54a6,
-  (q15_t)0x54a2, (q15_t)0x549d, (q15_t)0x5498, (q15_t)0x5493, (q15_t)0x548f, (q15_t)0x548a, (q15_t)0x5485, (q15_t)0x5480,
-  (q15_t)0x547c, (q15_t)0x5477, (q15_t)0x5472, (q15_t)0x546e, (q15_t)0x5469, (q15_t)0x5464, (q15_t)0x545f, (q15_t)0x545b,
-  (q15_t)0x5456, (q15_t)0x5451, (q15_t)0x544d, (q15_t)0x5448, (q15_t)0x5443, (q15_t)0x543e, (q15_t)0x543a, (q15_t)0x5435,
-  (q15_t)0x5430, (q15_t)0x542b, (q15_t)0x5427, (q15_t)0x5422, (q15_t)0x541d, (q15_t)0x5418, (q15_t)0x5414, (q15_t)0x540f,
-  (q15_t)0x540a, (q15_t)0x5406, (q15_t)0x5401, (q15_t)0x53fc, (q15_t)0x53f7, (q15_t)0x53f3, (q15_t)0x53ee, (q15_t)0x53e9,
-  (q15_t)0x53e4, (q15_t)0x53e0, (q15_t)0x53db, (q15_t)0x53d6, (q15_t)0x53d1, (q15_t)0x53cd, (q15_t)0x53c8, (q15_t)0x53c3,
-  (q15_t)0x53be, (q15_t)0x53ba, (q15_t)0x53b5, (q15_t)0x53b0, (q15_t)0x53ab, (q15_t)0x53a7, (q15_t)0x53a2, (q15_t)0x539d,
-  (q15_t)0x5398, (q15_t)0x5394, (q15_t)0x538f, (q15_t)0x538a, (q15_t)0x5385, (q15_t)0x5380, (q15_t)0x537c, (q15_t)0x5377,
-  (q15_t)0x5372, (q15_t)0x536d, (q15_t)0x5369, (q15_t)0x5364, (q15_t)0x535f, (q15_t)0x535a, (q15_t)0x5356, (q15_t)0x5351,
-  (q15_t)0x534c, (q15_t)0x5347, (q15_t)0x5343, (q15_t)0x533e, (q15_t)0x5339, (q15_t)0x5334, (q15_t)0x532f, (q15_t)0x532b,
-  (q15_t)0x5326, (q15_t)0x5321, (q15_t)0x531c, (q15_t)0x5318, (q15_t)0x5313, (q15_t)0x530e, (q15_t)0x5309, (q15_t)0x5304,
-  (q15_t)0x5300, (q15_t)0x52fb, (q15_t)0x52f6, (q15_t)0x52f1, (q15_t)0x52ec, (q15_t)0x52e8, (q15_t)0x52e3, (q15_t)0x52de,
-  (q15_t)0x52d9, (q15_t)0x52d5, (q15_t)0x52d0, (q15_t)0x52cb, (q15_t)0x52c6, (q15_t)0x52c1, (q15_t)0x52bd, (q15_t)0x52b8,
-  (q15_t)0x52b3, (q15_t)0x52ae, (q15_t)0x52a9, (q15_t)0x52a5, (q15_t)0x52a0, (q15_t)0x529b, (q15_t)0x5296, (q15_t)0x5291,
-  (q15_t)0x528d, (q15_t)0x5288, (q15_t)0x5283, (q15_t)0x527e, (q15_t)0x5279, (q15_t)0x5275, (q15_t)0x5270, (q15_t)0x526b,
-  (q15_t)0x5266, (q15_t)0x5261, (q15_t)0x525d, (q15_t)0x5258, (q15_t)0x5253, (q15_t)0x524e, (q15_t)0x5249, (q15_t)0x5244,
-  (q15_t)0x5240, (q15_t)0x523b, (q15_t)0x5236, (q15_t)0x5231, (q15_t)0x522c, (q15_t)0x5228, (q15_t)0x5223, (q15_t)0x521e,
-  (q15_t)0x5219, (q15_t)0x5214, (q15_t)0x520f, (q15_t)0x520b, (q15_t)0x5206, (q15_t)0x5201, (q15_t)0x51fc, (q15_t)0x51f7,
-  (q15_t)0x51f3, (q15_t)0x51ee, (q15_t)0x51e9, (q15_t)0x51e4, (q15_t)0x51df, (q15_t)0x51da, (q15_t)0x51d6, (q15_t)0x51d1,
-  (q15_t)0x51cc, (q15_t)0x51c7, (q15_t)0x51c2, (q15_t)0x51bd, (q15_t)0x51b9, (q15_t)0x51b4, (q15_t)0x51af, (q15_t)0x51aa,
-  (q15_t)0x51a5, (q15_t)0x51a0, (q15_t)0x519c, (q15_t)0x5197, (q15_t)0x5192, (q15_t)0x518d, (q15_t)0x5188, (q15_t)0x5183,
-  (q15_t)0x517e, (q15_t)0x517a, (q15_t)0x5175, (q15_t)0x5170, (q15_t)0x516b, (q15_t)0x5166, (q15_t)0x5161, (q15_t)0x515d,
-  (q15_t)0x5158, (q15_t)0x5153, (q15_t)0x514e, (q15_t)0x5149, (q15_t)0x5144, (q15_t)0x513f, (q15_t)0x513b, (q15_t)0x5136,
-  (q15_t)0x5131, (q15_t)0x512c, (q15_t)0x5127, (q15_t)0x5122, (q15_t)0x511d, (q15_t)0x5119, (q15_t)0x5114, (q15_t)0x510f,
-  (q15_t)0x510a, (q15_t)0x5105, (q15_t)0x5100, (q15_t)0x50fb, (q15_t)0x50f7, (q15_t)0x50f2, (q15_t)0x50ed, (q15_t)0x50e8,
-  (q15_t)0x50e3, (q15_t)0x50de, (q15_t)0x50d9, (q15_t)0x50d4, (q15_t)0x50d0, (q15_t)0x50cb, (q15_t)0x50c6, (q15_t)0x50c1,
-  (q15_t)0x50bc, (q15_t)0x50b7, (q15_t)0x50b2, (q15_t)0x50ad, (q15_t)0x50a9, (q15_t)0x50a4, (q15_t)0x509f, (q15_t)0x509a,
-  (q15_t)0x5095, (q15_t)0x5090, (q15_t)0x508b, (q15_t)0x5086, (q15_t)0x5082, (q15_t)0x507d, (q15_t)0x5078, (q15_t)0x5073,
-  (q15_t)0x506e, (q15_t)0x5069, (q15_t)0x5064, (q15_t)0x505f, (q15_t)0x505a, (q15_t)0x5056, (q15_t)0x5051, (q15_t)0x504c,
-  (q15_t)0x5047, (q15_t)0x5042, (q15_t)0x503d, (q15_t)0x5038, (q15_t)0x5033, (q15_t)0x502e, (q15_t)0x5029, (q15_t)0x5025,
-  (q15_t)0x5020, (q15_t)0x501b, (q15_t)0x5016, (q15_t)0x5011, (q15_t)0x500c, (q15_t)0x5007, (q15_t)0x5002, (q15_t)0x4ffd,
-  (q15_t)0x4ff8, (q15_t)0x4ff4, (q15_t)0x4fef, (q15_t)0x4fea, (q15_t)0x4fe5, (q15_t)0x4fe0, (q15_t)0x4fdb, (q15_t)0x4fd6,
-  (q15_t)0x4fd1, (q15_t)0x4fcc, (q15_t)0x4fc7, (q15_t)0x4fc2, (q15_t)0x4fbe, (q15_t)0x4fb9, (q15_t)0x4fb4, (q15_t)0x4faf,
-  (q15_t)0x4faa, (q15_t)0x4fa5, (q15_t)0x4fa0, (q15_t)0x4f9b, (q15_t)0x4f96, (q15_t)0x4f91, (q15_t)0x4f8c, (q15_t)0x4f87,
-  (q15_t)0x4f82, (q15_t)0x4f7e, (q15_t)0x4f79, (q15_t)0x4f74, (q15_t)0x4f6f, (q15_t)0x4f6a, (q15_t)0x4f65, (q15_t)0x4f60,
-  (q15_t)0x4f5b, (q15_t)0x4f56, (q15_t)0x4f51, (q15_t)0x4f4c, (q15_t)0x4f47, (q15_t)0x4f42, (q15_t)0x4f3d, (q15_t)0x4f39,
-  (q15_t)0x4f34, (q15_t)0x4f2f, (q15_t)0x4f2a, (q15_t)0x4f25, (q15_t)0x4f20, (q15_t)0x4f1b, (q15_t)0x4f16, (q15_t)0x4f11,
-  (q15_t)0x4f0c, (q15_t)0x4f07, (q15_t)0x4f02, (q15_t)0x4efd, (q15_t)0x4ef8, (q15_t)0x4ef3, (q15_t)0x4eee, (q15_t)0x4ee9,
-  (q15_t)0x4ee5, (q15_t)0x4ee0, (q15_t)0x4edb, (q15_t)0x4ed6, (q15_t)0x4ed1, (q15_t)0x4ecc, (q15_t)0x4ec7, (q15_t)0x4ec2,
-  (q15_t)0x4ebd, (q15_t)0x4eb8, (q15_t)0x4eb3, (q15_t)0x4eae, (q15_t)0x4ea9, (q15_t)0x4ea4, (q15_t)0x4e9f, (q15_t)0x4e9a,
-  (q15_t)0x4e95, (q15_t)0x4e90, (q15_t)0x4e8b, (q15_t)0x4e86, (q15_t)0x4e81, (q15_t)0x4e7c, (q15_t)0x4e78, (q15_t)0x4e73,
-  (q15_t)0x4e6e, (q15_t)0x4e69, (q15_t)0x4e64, (q15_t)0x4e5f, (q15_t)0x4e5a, (q15_t)0x4e55, (q15_t)0x4e50, (q15_t)0x4e4b,
-  (q15_t)0x4e46, (q15_t)0x4e41, (q15_t)0x4e3c, (q15_t)0x4e37, (q15_t)0x4e32, (q15_t)0x4e2d, (q15_t)0x4e28, (q15_t)0x4e23,
-  (q15_t)0x4e1e, (q15_t)0x4e19, (q15_t)0x4e14, (q15_t)0x4e0f, (q15_t)0x4e0a, (q15_t)0x4e05, (q15_t)0x4e00, (q15_t)0x4dfb,
-  (q15_t)0x4df6, (q15_t)0x4df1, (q15_t)0x4dec, (q15_t)0x4de7, (q15_t)0x4de2, (q15_t)0x4ddd, (q15_t)0x4dd8, (q15_t)0x4dd3,
-  (q15_t)0x4dce, (q15_t)0x4dc9, (q15_t)0x4dc4, (q15_t)0x4dbf, (q15_t)0x4dba, (q15_t)0x4db5, (q15_t)0x4db0, (q15_t)0x4dab,
-  (q15_t)0x4da6, (q15_t)0x4da1, (q15_t)0x4d9c, (q15_t)0x4d97, (q15_t)0x4d92, (q15_t)0x4d8d, (q15_t)0x4d88, (q15_t)0x4d83,
-  (q15_t)0x4d7e, (q15_t)0x4d79, (q15_t)0x4d74, (q15_t)0x4d6f, (q15_t)0x4d6a, (q15_t)0x4d65, (q15_t)0x4d60, (q15_t)0x4d5b,
-  (q15_t)0x4d56, (q15_t)0x4d51, (q15_t)0x4d4c, (q15_t)0x4d47, (q15_t)0x4d42, (q15_t)0x4d3d, (q15_t)0x4d38, (q15_t)0x4d33,
-  (q15_t)0x4d2e, (q15_t)0x4d29, (q15_t)0x4d24, (q15_t)0x4d1f, (q15_t)0x4d1a, (q15_t)0x4d15, (q15_t)0x4d10, (q15_t)0x4d0b,
-  (q15_t)0x4d06, (q15_t)0x4d01, (q15_t)0x4cfc, (q15_t)0x4cf7, (q15_t)0x4cf2, (q15_t)0x4ced, (q15_t)0x4ce8, (q15_t)0x4ce3,
-  (q15_t)0x4cde, (q15_t)0x4cd9, (q15_t)0x4cd4, (q15_t)0x4ccf, (q15_t)0x4cca, (q15_t)0x4cc5, (q15_t)0x4cc0, (q15_t)0x4cbb,
-  (q15_t)0x4cb6, (q15_t)0x4cb1, (q15_t)0x4cac, (q15_t)0x4ca7, (q15_t)0x4ca2, (q15_t)0x4c9d, (q15_t)0x4c98, (q15_t)0x4c93,
-  (q15_t)0x4c8e, (q15_t)0x4c88, (q15_t)0x4c83, (q15_t)0x4c7e, (q15_t)0x4c79, (q15_t)0x4c74, (q15_t)0x4c6f, (q15_t)0x4c6a,
-  (q15_t)0x4c65, (q15_t)0x4c60, (q15_t)0x4c5b, (q15_t)0x4c56, (q15_t)0x4c51, (q15_t)0x4c4c, (q15_t)0x4c47, (q15_t)0x4c42,
-  (q15_t)0x4c3d, (q15_t)0x4c38, (q15_t)0x4c33, (q15_t)0x4c2e, (q15_t)0x4c29, (q15_t)0x4c24, (q15_t)0x4c1f, (q15_t)0x4c1a,
-  (q15_t)0x4c14, (q15_t)0x4c0f, (q15_t)0x4c0a, (q15_t)0x4c05, (q15_t)0x4c00, (q15_t)0x4bfb, (q15_t)0x4bf6, (q15_t)0x4bf1,
-  (q15_t)0x4bec, (q15_t)0x4be7, (q15_t)0x4be2, (q15_t)0x4bdd, (q15_t)0x4bd8, (q15_t)0x4bd3, (q15_t)0x4bce, (q15_t)0x4bc9,
-  (q15_t)0x4bc4, (q15_t)0x4bbe, (q15_t)0x4bb9, (q15_t)0x4bb4, (q15_t)0x4baf, (q15_t)0x4baa, (q15_t)0x4ba5, (q15_t)0x4ba0,
-  (q15_t)0x4b9b, (q15_t)0x4b96, (q15_t)0x4b91, (q15_t)0x4b8c, (q15_t)0x4b87, (q15_t)0x4b82, (q15_t)0x4b7d, (q15_t)0x4b77,
-  (q15_t)0x4b72, (q15_t)0x4b6d, (q15_t)0x4b68, (q15_t)0x4b63, (q15_t)0x4b5e, (q15_t)0x4b59, (q15_t)0x4b54, (q15_t)0x4b4f,
-  (q15_t)0x4b4a, (q15_t)0x4b45, (q15_t)0x4b40, (q15_t)0x4b3b, (q15_t)0x4b35, (q15_t)0x4b30, (q15_t)0x4b2b, (q15_t)0x4b26,
-  (q15_t)0x4b21, (q15_t)0x4b1c, (q15_t)0x4b17, (q15_t)0x4b12, (q15_t)0x4b0d, (q15_t)0x4b08, (q15_t)0x4b03, (q15_t)0x4afd,
-  (q15_t)0x4af8, (q15_t)0x4af3, (q15_t)0x4aee, (q15_t)0x4ae9, (q15_t)0x4ae4, (q15_t)0x4adf, (q15_t)0x4ada, (q15_t)0x4ad5,
-  (q15_t)0x4ad0, (q15_t)0x4acb, (q15_t)0x4ac5, (q15_t)0x4ac0, (q15_t)0x4abb, (q15_t)0x4ab6, (q15_t)0x4ab1, (q15_t)0x4aac,
-  (q15_t)0x4aa7, (q15_t)0x4aa2, (q15_t)0x4a9d, (q15_t)0x4a97, (q15_t)0x4a92, (q15_t)0x4a8d, (q15_t)0x4a88, (q15_t)0x4a83,
-  (q15_t)0x4a7e, (q15_t)0x4a79, (q15_t)0x4a74, (q15_t)0x4a6f, (q15_t)0x4a6a, (q15_t)0x4a64, (q15_t)0x4a5f, (q15_t)0x4a5a,
-  (q15_t)0x4a55, (q15_t)0x4a50, (q15_t)0x4a4b, (q15_t)0x4a46, (q15_t)0x4a41, (q15_t)0x4a3b, (q15_t)0x4a36, (q15_t)0x4a31,
-  (q15_t)0x4a2c, (q15_t)0x4a27, (q15_t)0x4a22, (q15_t)0x4a1d, (q15_t)0x4a18, (q15_t)0x4a12, (q15_t)0x4a0d, (q15_t)0x4a08,
-  (q15_t)0x4a03, (q15_t)0x49fe, (q15_t)0x49f9, (q15_t)0x49f4, (q15_t)0x49ef, (q15_t)0x49e9, (q15_t)0x49e4, (q15_t)0x49df,
-  (q15_t)0x49da, (q15_t)0x49d5, (q15_t)0x49d0, (q15_t)0x49cb, (q15_t)0x49c6, (q15_t)0x49c0, (q15_t)0x49bb, (q15_t)0x49b6,
-  (q15_t)0x49b1, (q15_t)0x49ac, (q15_t)0x49a7, (q15_t)0x49a2, (q15_t)0x499c, (q15_t)0x4997, (q15_t)0x4992, (q15_t)0x498d,
-  (q15_t)0x4988, (q15_t)0x4983, (q15_t)0x497e, (q15_t)0x4978, (q15_t)0x4973, (q15_t)0x496e, (q15_t)0x4969, (q15_t)0x4964,
-  (q15_t)0x495f, (q15_t)0x495a, (q15_t)0x4954, (q15_t)0x494f, (q15_t)0x494a, (q15_t)0x4945, (q15_t)0x4940, (q15_t)0x493b,
-  (q15_t)0x4936, (q15_t)0x4930, (q15_t)0x492b, (q15_t)0x4926, (q15_t)0x4921, (q15_t)0x491c, (q15_t)0x4917, (q15_t)0x4911,
-  (q15_t)0x490c, (q15_t)0x4907, (q15_t)0x4902, (q15_t)0x48fd, (q15_t)0x48f8, (q15_t)0x48f2, (q15_t)0x48ed, (q15_t)0x48e8,
-  (q15_t)0x48e3, (q15_t)0x48de, (q15_t)0x48d9, (q15_t)0x48d3, (q15_t)0x48ce, (q15_t)0x48c9, (q15_t)0x48c4, (q15_t)0x48bf,
-  (q15_t)0x48ba, (q15_t)0x48b4, (q15_t)0x48af, (q15_t)0x48aa, (q15_t)0x48a5, (q15_t)0x48a0, (q15_t)0x489b, (q15_t)0x4895,
-  (q15_t)0x4890, (q15_t)0x488b, (q15_t)0x4886, (q15_t)0x4881, (q15_t)0x487c, (q15_t)0x4876, (q15_t)0x4871, (q15_t)0x486c,
-  (q15_t)0x4867, (q15_t)0x4862, (q15_t)0x485c, (q15_t)0x4857, (q15_t)0x4852, (q15_t)0x484d, (q15_t)0x4848, (q15_t)0x4843,
-  (q15_t)0x483d, (q15_t)0x4838, (q15_t)0x4833, (q15_t)0x482e, (q15_t)0x4829, (q15_t)0x4823, (q15_t)0x481e, (q15_t)0x4819,
-  (q15_t)0x4814, (q15_t)0x480f, (q15_t)0x4809, (q15_t)0x4804, (q15_t)0x47ff, (q15_t)0x47fa, (q15_t)0x47f5, (q15_t)0x47ef,
-  (q15_t)0x47ea, (q15_t)0x47e5, (q15_t)0x47e0, (q15_t)0x47db, (q15_t)0x47d5, (q15_t)0x47d0, (q15_t)0x47cb, (q15_t)0x47c6,
-  (q15_t)0x47c1, (q15_t)0x47bb, (q15_t)0x47b6, (q15_t)0x47b1, (q15_t)0x47ac, (q15_t)0x47a7, (q15_t)0x47a1, (q15_t)0x479c,
-  (q15_t)0x4797, (q15_t)0x4792, (q15_t)0x478d, (q15_t)0x4787, (q15_t)0x4782, (q15_t)0x477d, (q15_t)0x4778, (q15_t)0x4773,
-  (q15_t)0x476d, (q15_t)0x4768, (q15_t)0x4763, (q15_t)0x475e, (q15_t)0x4758, (q15_t)0x4753, (q15_t)0x474e, (q15_t)0x4749,
-  (q15_t)0x4744, (q15_t)0x473e, (q15_t)0x4739, (q15_t)0x4734, (q15_t)0x472f, (q15_t)0x4729, (q15_t)0x4724, (q15_t)0x471f,
-  (q15_t)0x471a, (q15_t)0x4715, (q15_t)0x470f, (q15_t)0x470a, (q15_t)0x4705, (q15_t)0x4700, (q15_t)0x46fa, (q15_t)0x46f5,
-  (q15_t)0x46f0, (q15_t)0x46eb, (q15_t)0x46e6, (q15_t)0x46e0, (q15_t)0x46db, (q15_t)0x46d6, (q15_t)0x46d1, (q15_t)0x46cb,
-  (q15_t)0x46c6, (q15_t)0x46c1, (q15_t)0x46bc, (q15_t)0x46b6, (q15_t)0x46b1, (q15_t)0x46ac, (q15_t)0x46a7, (q15_t)0x46a1,
-  (q15_t)0x469c, (q15_t)0x4697, (q15_t)0x4692, (q15_t)0x468d, (q15_t)0x4687, (q15_t)0x4682, (q15_t)0x467d, (q15_t)0x4678,
-  (q15_t)0x4672, (q15_t)0x466d, (q15_t)0x4668, (q15_t)0x4663, (q15_t)0x465d, (q15_t)0x4658, (q15_t)0x4653, (q15_t)0x464e,
-  (q15_t)0x4648, (q15_t)0x4643, (q15_t)0x463e, (q15_t)0x4639, (q15_t)0x4633, (q15_t)0x462e, (q15_t)0x4629, (q15_t)0x4624,
-  (q15_t)0x461e, (q15_t)0x4619, (q15_t)0x4614, (q15_t)0x460e, (q15_t)0x4609, (q15_t)0x4604, (q15_t)0x45ff, (q15_t)0x45f9,
-  (q15_t)0x45f4, (q15_t)0x45ef, (q15_t)0x45ea, (q15_t)0x45e4, (q15_t)0x45df, (q15_t)0x45da, (q15_t)0x45d5, (q15_t)0x45cf,
-  (q15_t)0x45ca, (q15_t)0x45c5, (q15_t)0x45c0, (q15_t)0x45ba, (q15_t)0x45b5, (q15_t)0x45b0, (q15_t)0x45aa, (q15_t)0x45a5,
-  (q15_t)0x45a0, (q15_t)0x459b, (q15_t)0x4595, (q15_t)0x4590, (q15_t)0x458b, (q15_t)0x4586, (q15_t)0x4580, (q15_t)0x457b,
-  (q15_t)0x4576, (q15_t)0x4570, (q15_t)0x456b, (q15_t)0x4566, (q15_t)0x4561, (q15_t)0x455b, (q15_t)0x4556, (q15_t)0x4551,
-  (q15_t)0x454b, (q15_t)0x4546, (q15_t)0x4541, (q15_t)0x453c, (q15_t)0x4536, (q15_t)0x4531, (q15_t)0x452c, (q15_t)0x4526,
-  (q15_t)0x4521, (q15_t)0x451c, (q15_t)0x4517, (q15_t)0x4511, (q15_t)0x450c, (q15_t)0x4507, (q15_t)0x4501, (q15_t)0x44fc,
-  (q15_t)0x44f7, (q15_t)0x44f2, (q15_t)0x44ec, (q15_t)0x44e7, (q15_t)0x44e2, (q15_t)0x44dc, (q15_t)0x44d7, (q15_t)0x44d2,
-  (q15_t)0x44cd, (q15_t)0x44c7, (q15_t)0x44c2, (q15_t)0x44bd, (q15_t)0x44b7, (q15_t)0x44b2, (q15_t)0x44ad, (q15_t)0x44a7,
-  (q15_t)0x44a2, (q15_t)0x449d, (q15_t)0x4497, (q15_t)0x4492, (q15_t)0x448d, (q15_t)0x4488, (q15_t)0x4482, (q15_t)0x447d,
-  (q15_t)0x4478, (q15_t)0x4472, (q15_t)0x446d, (q15_t)0x4468, (q15_t)0x4462, (q15_t)0x445d, (q15_t)0x4458, (q15_t)0x4452,
-  (q15_t)0x444d, (q15_t)0x4448, (q15_t)0x4443, (q15_t)0x443d, (q15_t)0x4438, (q15_t)0x4433, (q15_t)0x442d, (q15_t)0x4428,
-  (q15_t)0x4423, (q15_t)0x441d, (q15_t)0x4418, (q15_t)0x4413, (q15_t)0x440d, (q15_t)0x4408, (q15_t)0x4403, (q15_t)0x43fd,
-  (q15_t)0x43f8, (q15_t)0x43f3, (q15_t)0x43ed, (q15_t)0x43e8, (q15_t)0x43e3, (q15_t)0x43dd, (q15_t)0x43d8, (q15_t)0x43d3,
-  (q15_t)0x43cd, (q15_t)0x43c8, (q15_t)0x43c3, (q15_t)0x43bd, (q15_t)0x43b8, (q15_t)0x43b3, (q15_t)0x43ad, (q15_t)0x43a8,
-  (q15_t)0x43a3, (q15_t)0x439d, (q15_t)0x4398, (q15_t)0x4393, (q15_t)0x438d, (q15_t)0x4388, (q15_t)0x4383, (q15_t)0x437d,
-  (q15_t)0x4378, (q15_t)0x4373, (q15_t)0x436d, (q15_t)0x4368, (q15_t)0x4363, (q15_t)0x435d, (q15_t)0x4358, (q15_t)0x4353,
-  (q15_t)0x434d, (q15_t)0x4348, (q15_t)0x4343, (q15_t)0x433d, (q15_t)0x4338, (q15_t)0x4333, (q15_t)0x432d, (q15_t)0x4328,
-  (q15_t)0x4323, (q15_t)0x431d, (q15_t)0x4318, (q15_t)0x4313, (q15_t)0x430d, (q15_t)0x4308, (q15_t)0x4302, (q15_t)0x42fd,
-  (q15_t)0x42f8, (q15_t)0x42f2, (q15_t)0x42ed, (q15_t)0x42e8, (q15_t)0x42e2, (q15_t)0x42dd, (q15_t)0x42d8, (q15_t)0x42d2,
-  (q15_t)0x42cd, (q15_t)0x42c8, (q15_t)0x42c2, (q15_t)0x42bd, (q15_t)0x42b7, (q15_t)0x42b2, (q15_t)0x42ad, (q15_t)0x42a7,
-  (q15_t)0x42a2, (q15_t)0x429d, (q15_t)0x4297, (q15_t)0x4292, (q15_t)0x428d, (q15_t)0x4287, (q15_t)0x4282, (q15_t)0x427c,
-  (q15_t)0x4277, (q15_t)0x4272, (q15_t)0x426c, (q15_t)0x4267, (q15_t)0x4262, (q15_t)0x425c, (q15_t)0x4257, (q15_t)0x4251,
-  (q15_t)0x424c, (q15_t)0x4247, (q15_t)0x4241, (q15_t)0x423c, (q15_t)0x4237, (q15_t)0x4231, (q15_t)0x422c, (q15_t)0x4226,
-  (q15_t)0x4221, (q15_t)0x421c, (q15_t)0x4216, (q15_t)0x4211, (q15_t)0x420c, (q15_t)0x4206, (q15_t)0x4201, (q15_t)0x41fb,
-  (q15_t)0x41f6, (q15_t)0x41f1, (q15_t)0x41eb, (q15_t)0x41e6, (q15_t)0x41e0, (q15_t)0x41db, (q15_t)0x41d6, (q15_t)0x41d0,
-  (q15_t)0x41cb, (q15_t)0x41c6, (q15_t)0x41c0, (q15_t)0x41bb, (q15_t)0x41b5, (q15_t)0x41b0, (q15_t)0x41ab, (q15_t)0x41a5,
-  (q15_t)0x41a0, (q15_t)0x419a, (q15_t)0x4195, (q15_t)0x4190, (q15_t)0x418a, (q15_t)0x4185, (q15_t)0x417f, (q15_t)0x417a,
-  (q15_t)0x4175, (q15_t)0x416f, (q15_t)0x416a, (q15_t)0x4164, (q15_t)0x415f, (q15_t)0x415a, (q15_t)0x4154, (q15_t)0x414f,
-  (q15_t)0x4149, (q15_t)0x4144, (q15_t)0x413f, (q15_t)0x4139, (q15_t)0x4134, (q15_t)0x412e, (q15_t)0x4129, (q15_t)0x4124,
-  (q15_t)0x411e, (q15_t)0x4119, (q15_t)0x4113, (q15_t)0x410e, (q15_t)0x4108, (q15_t)0x4103, (q15_t)0x40fe, (q15_t)0x40f8,
-  (q15_t)0x40f3, (q15_t)0x40ed, (q15_t)0x40e8, (q15_t)0x40e3, (q15_t)0x40dd, (q15_t)0x40d8, (q15_t)0x40d2, (q15_t)0x40cd,
-  (q15_t)0x40c8, (q15_t)0x40c2, (q15_t)0x40bd, (q15_t)0x40b7, (q15_t)0x40b2, (q15_t)0x40ac, (q15_t)0x40a7, (q15_t)0x40a2,
-  (q15_t)0x409c, (q15_t)0x4097, (q15_t)0x4091, (q15_t)0x408c, (q15_t)0x4086, (q15_t)0x4081, (q15_t)0x407c, (q15_t)0x4076,
-  (q15_t)0x4071, (q15_t)0x406b, (q15_t)0x4066, (q15_t)0x4060, (q15_t)0x405b, (q15_t)0x4056, (q15_t)0x4050, (q15_t)0x404b,
-  (q15_t)0x4045, (q15_t)0x4040, (q15_t)0x403a, (q15_t)0x4035, (q15_t)0x4030, (q15_t)0x402a, (q15_t)0x4025, (q15_t)0x401f,
-  (q15_t)0x401a, (q15_t)0x4014, (q15_t)0x400f, (q15_t)0x4009, (q15_t)0x4004, (q15_t)0x3fff, (q15_t)0x3ff9, (q15_t)0x3ff4,
-  (q15_t)0x3fee, (q15_t)0x3fe9, (q15_t)0x3fe3, (q15_t)0x3fde, (q15_t)0x3fd8, (q15_t)0x3fd3, (q15_t)0x3fce, (q15_t)0x3fc8,
-  (q15_t)0x3fc3, (q15_t)0x3fbd, (q15_t)0x3fb8, (q15_t)0x3fb2, (q15_t)0x3fad, (q15_t)0x3fa7, (q15_t)0x3fa2, (q15_t)0x3f9d,
-  (q15_t)0x3f97, (q15_t)0x3f92, (q15_t)0x3f8c, (q15_t)0x3f87, (q15_t)0x3f81, (q15_t)0x3f7c, (q15_t)0x3f76, (q15_t)0x3f71,
-  (q15_t)0x3f6b, (q15_t)0x3f66, (q15_t)0x3f61, (q15_t)0x3f5b, (q15_t)0x3f56, (q15_t)0x3f50, (q15_t)0x3f4b, (q15_t)0x3f45,
-  (q15_t)0x3f40, (q15_t)0x3f3a, (q15_t)0x3f35, (q15_t)0x3f2f, (q15_t)0x3f2a, (q15_t)0x3f24, (q15_t)0x3f1f, (q15_t)0x3f1a,
-  (q15_t)0x3f14, (q15_t)0x3f0f, (q15_t)0x3f09, (q15_t)0x3f04, (q15_t)0x3efe, (q15_t)0x3ef9, (q15_t)0x3ef3, (q15_t)0x3eee,
-  (q15_t)0x3ee8, (q15_t)0x3ee3, (q15_t)0x3edd, (q15_t)0x3ed8, (q15_t)0x3ed2, (q15_t)0x3ecd, (q15_t)0x3ec7, (q15_t)0x3ec2,
-  (q15_t)0x3ebd, (q15_t)0x3eb7, (q15_t)0x3eb2, (q15_t)0x3eac, (q15_t)0x3ea7, (q15_t)0x3ea1, (q15_t)0x3e9c, (q15_t)0x3e96,
-  (q15_t)0x3e91, (q15_t)0x3e8b, (q15_t)0x3e86, (q15_t)0x3e80, (q15_t)0x3e7b, (q15_t)0x3e75, (q15_t)0x3e70, (q15_t)0x3e6a,
-  (q15_t)0x3e65, (q15_t)0x3e5f, (q15_t)0x3e5a, (q15_t)0x3e54, (q15_t)0x3e4f, (q15_t)0x3e49, (q15_t)0x3e44, (q15_t)0x3e3e,
-  (q15_t)0x3e39, (q15_t)0x3e33, (q15_t)0x3e2e, (q15_t)0x3e28, (q15_t)0x3e23, (q15_t)0x3e1d, (q15_t)0x3e18, (q15_t)0x3e12,
-  (q15_t)0x3e0d, (q15_t)0x3e07, (q15_t)0x3e02, (q15_t)0x3dfc, (q15_t)0x3df7, (q15_t)0x3df1, (q15_t)0x3dec, (q15_t)0x3de6,
-  (q15_t)0x3de1, (q15_t)0x3ddb, (q15_t)0x3dd6, (q15_t)0x3dd0, (q15_t)0x3dcb, (q15_t)0x3dc5, (q15_t)0x3dc0, (q15_t)0x3dba,
-  (q15_t)0x3db5, (q15_t)0x3daf, (q15_t)0x3daa, (q15_t)0x3da4, (q15_t)0x3d9f, (q15_t)0x3d99, (q15_t)0x3d94, (q15_t)0x3d8e,
-  (q15_t)0x3d89, (q15_t)0x3d83, (q15_t)0x3d7e, (q15_t)0x3d78, (q15_t)0x3d73, (q15_t)0x3d6d, (q15_t)0x3d68, (q15_t)0x3d62,
-  (q15_t)0x3d5d, (q15_t)0x3d57, (q15_t)0x3d52, (q15_t)0x3d4c, (q15_t)0x3d47, (q15_t)0x3d41, (q15_t)0x3d3c, (q15_t)0x3d36,
-  (q15_t)0x3d31, (q15_t)0x3d2b, (q15_t)0x3d26, (q15_t)0x3d20, (q15_t)0x3d1b, (q15_t)0x3d15, (q15_t)0x3d10, (q15_t)0x3d0a,
-  (q15_t)0x3d04, (q15_t)0x3cff, (q15_t)0x3cf9, (q15_t)0x3cf4, (q15_t)0x3cee, (q15_t)0x3ce9, (q15_t)0x3ce3, (q15_t)0x3cde,
-  (q15_t)0x3cd8, (q15_t)0x3cd3, (q15_t)0x3ccd, (q15_t)0x3cc8, (q15_t)0x3cc2, (q15_t)0x3cbd, (q15_t)0x3cb7, (q15_t)0x3cb2,
-  (q15_t)0x3cac, (q15_t)0x3ca7, (q15_t)0x3ca1, (q15_t)0x3c9b, (q15_t)0x3c96, (q15_t)0x3c90, (q15_t)0x3c8b, (q15_t)0x3c85,
-  (q15_t)0x3c80, (q15_t)0x3c7a, (q15_t)0x3c75, (q15_t)0x3c6f, (q15_t)0x3c6a, (q15_t)0x3c64, (q15_t)0x3c5f, (q15_t)0x3c59,
-  (q15_t)0x3c53, (q15_t)0x3c4e, (q15_t)0x3c48, (q15_t)0x3c43, (q15_t)0x3c3d, (q15_t)0x3c38, (q15_t)0x3c32, (q15_t)0x3c2d,
-  (q15_t)0x3c27, (q15_t)0x3c22, (q15_t)0x3c1c, (q15_t)0x3c16, (q15_t)0x3c11, (q15_t)0x3c0b, (q15_t)0x3c06, (q15_t)0x3c00,
-  (q15_t)0x3bfb, (q15_t)0x3bf5, (q15_t)0x3bf0, (q15_t)0x3bea, (q15_t)0x3be5, (q15_t)0x3bdf, (q15_t)0x3bd9, (q15_t)0x3bd4,
-  (q15_t)0x3bce, (q15_t)0x3bc9, (q15_t)0x3bc3, (q15_t)0x3bbe, (q15_t)0x3bb8, (q15_t)0x3bb3, (q15_t)0x3bad, (q15_t)0x3ba7,
-  (q15_t)0x3ba2, (q15_t)0x3b9c, (q15_t)0x3b97, (q15_t)0x3b91, (q15_t)0x3b8c, (q15_t)0x3b86, (q15_t)0x3b80, (q15_t)0x3b7b,
-  (q15_t)0x3b75, (q15_t)0x3b70, (q15_t)0x3b6a, (q15_t)0x3b65, (q15_t)0x3b5f, (q15_t)0x3b5a, (q15_t)0x3b54, (q15_t)0x3b4e,
-  (q15_t)0x3b49, (q15_t)0x3b43, (q15_t)0x3b3e, (q15_t)0x3b38, (q15_t)0x3b33, (q15_t)0x3b2d, (q15_t)0x3b27, (q15_t)0x3b22,
-  (q15_t)0x3b1c, (q15_t)0x3b17, (q15_t)0x3b11, (q15_t)0x3b0c, (q15_t)0x3b06, (q15_t)0x3b00, (q15_t)0x3afb, (q15_t)0x3af5,
-  (q15_t)0x3af0, (q15_t)0x3aea, (q15_t)0x3ae4, (q15_t)0x3adf, (q15_t)0x3ad9, (q15_t)0x3ad4, (q15_t)0x3ace, (q15_t)0x3ac9,
-  (q15_t)0x3ac3, (q15_t)0x3abd, (q15_t)0x3ab8, (q15_t)0x3ab2, (q15_t)0x3aad, (q15_t)0x3aa7, (q15_t)0x3aa2, (q15_t)0x3a9c,
-  (q15_t)0x3a96, (q15_t)0x3a91, (q15_t)0x3a8b, (q15_t)0x3a86, (q15_t)0x3a80, (q15_t)0x3a7a, (q15_t)0x3a75, (q15_t)0x3a6f,
-  (q15_t)0x3a6a, (q15_t)0x3a64, (q15_t)0x3a5e, (q15_t)0x3a59, (q15_t)0x3a53, (q15_t)0x3a4e, (q15_t)0x3a48, (q15_t)0x3a42,
-  (q15_t)0x3a3d, (q15_t)0x3a37, (q15_t)0x3a32, (q15_t)0x3a2c, (q15_t)0x3a26, (q15_t)0x3a21, (q15_t)0x3a1b, (q15_t)0x3a16,
-  (q15_t)0x3a10, (q15_t)0x3a0b, (q15_t)0x3a05, (q15_t)0x39ff, (q15_t)0x39fa, (q15_t)0x39f4, (q15_t)0x39ee, (q15_t)0x39e9,
-  (q15_t)0x39e3, (q15_t)0x39de, (q15_t)0x39d8, (q15_t)0x39d2, (q15_t)0x39cd, (q15_t)0x39c7, (q15_t)0x39c2, (q15_t)0x39bc,
-  (q15_t)0x39b6, (q15_t)0x39b1, (q15_t)0x39ab, (q15_t)0x39a6, (q15_t)0x39a0, (q15_t)0x399a, (q15_t)0x3995, (q15_t)0x398f,
-  (q15_t)0x398a, (q15_t)0x3984, (q15_t)0x397e, (q15_t)0x3979, (q15_t)0x3973, (q15_t)0x396d, (q15_t)0x3968, (q15_t)0x3962,
-  (q15_t)0x395d, (q15_t)0x3957, (q15_t)0x3951, (q15_t)0x394c, (q15_t)0x3946, (q15_t)0x3941, (q15_t)0x393b, (q15_t)0x3935,
-  (q15_t)0x3930, (q15_t)0x392a, (q15_t)0x3924, (q15_t)0x391f, (q15_t)0x3919, (q15_t)0x3914, (q15_t)0x390e, (q15_t)0x3908,
-  (q15_t)0x3903, (q15_t)0x38fd, (q15_t)0x38f7, (q15_t)0x38f2, (q15_t)0x38ec, (q15_t)0x38e7, (q15_t)0x38e1, (q15_t)0x38db,
-  (q15_t)0x38d6, (q15_t)0x38d0, (q15_t)0x38ca, (q15_t)0x38c5, (q15_t)0x38bf, (q15_t)0x38ba, (q15_t)0x38b4, (q15_t)0x38ae,
-  (q15_t)0x38a9, (q15_t)0x38a3, (q15_t)0x389d, (q15_t)0x3898, (q15_t)0x3892, (q15_t)0x388c, (q15_t)0x3887, (q15_t)0x3881,
-  (q15_t)0x387c, (q15_t)0x3876, (q15_t)0x3870, (q15_t)0x386b, (q15_t)0x3865, (q15_t)0x385f, (q15_t)0x385a, (q15_t)0x3854,
-  (q15_t)0x384e, (q15_t)0x3849, (q15_t)0x3843, (q15_t)0x383d, (q15_t)0x3838, (q15_t)0x3832, (q15_t)0x382d, (q15_t)0x3827,
-  (q15_t)0x3821, (q15_t)0x381c, (q15_t)0x3816, (q15_t)0x3810, (q15_t)0x380b, (q15_t)0x3805, (q15_t)0x37ff, (q15_t)0x37fa,
-  (q15_t)0x37f4, (q15_t)0x37ee, (q15_t)0x37e9, (q15_t)0x37e3, (q15_t)0x37dd, (q15_t)0x37d8, (q15_t)0x37d2, (q15_t)0x37cc,
-  (q15_t)0x37c7, (q15_t)0x37c1, (q15_t)0x37bc, (q15_t)0x37b6, (q15_t)0x37b0, (q15_t)0x37ab, (q15_t)0x37a5, (q15_t)0x379f,
-  (q15_t)0x379a, (q15_t)0x3794, (q15_t)0x378e, (q15_t)0x3789, (q15_t)0x3783, (q15_t)0x377d, (q15_t)0x3778, (q15_t)0x3772,
-  (q15_t)0x376c, (q15_t)0x3767, (q15_t)0x3761, (q15_t)0x375b, (q15_t)0x3756, (q15_t)0x3750, (q15_t)0x374a, (q15_t)0x3745,
-  (q15_t)0x373f, (q15_t)0x3739, (q15_t)0x3734, (q15_t)0x372e, (q15_t)0x3728, (q15_t)0x3723, (q15_t)0x371d, (q15_t)0x3717,
-  (q15_t)0x3712, (q15_t)0x370c, (q15_t)0x3706, (q15_t)0x3701, (q15_t)0x36fb, (q15_t)0x36f5, (q15_t)0x36f0, (q15_t)0x36ea,
-  (q15_t)0x36e4, (q15_t)0x36df, (q15_t)0x36d9, (q15_t)0x36d3, (q15_t)0x36ce, (q15_t)0x36c8, (q15_t)0x36c2, (q15_t)0x36bc,
-  (q15_t)0x36b7, (q15_t)0x36b1, (q15_t)0x36ab, (q15_t)0x36a6, (q15_t)0x36a0, (q15_t)0x369a, (q15_t)0x3695, (q15_t)0x368f,
-  (q15_t)0x3689, (q15_t)0x3684, (q15_t)0x367e, (q15_t)0x3678, (q15_t)0x3673, (q15_t)0x366d, (q15_t)0x3667, (q15_t)0x3662,
-  (q15_t)0x365c, (q15_t)0x3656, (q15_t)0x3650, (q15_t)0x364b, (q15_t)0x3645, (q15_t)0x363f, (q15_t)0x363a, (q15_t)0x3634,
-  (q15_t)0x362e, (q15_t)0x3629, (q15_t)0x3623, (q15_t)0x361d, (q15_t)0x3618, (q15_t)0x3612, (q15_t)0x360c, (q15_t)0x3606,
-  (q15_t)0x3601, (q15_t)0x35fb, (q15_t)0x35f5, (q15_t)0x35f0, (q15_t)0x35ea, (q15_t)0x35e4, (q15_t)0x35df, (q15_t)0x35d9,
-  (q15_t)0x35d3, (q15_t)0x35cd, (q15_t)0x35c8, (q15_t)0x35c2, (q15_t)0x35bc, (q15_t)0x35b7, (q15_t)0x35b1, (q15_t)0x35ab,
-  (q15_t)0x35a6, (q15_t)0x35a0, (q15_t)0x359a, (q15_t)0x3594, (q15_t)0x358f, (q15_t)0x3589, (q15_t)0x3583, (q15_t)0x357e,
-  (q15_t)0x3578, (q15_t)0x3572, (q15_t)0x356c, (q15_t)0x3567, (q15_t)0x3561, (q15_t)0x355b, (q15_t)0x3556, (q15_t)0x3550,
-  (q15_t)0x354a, (q15_t)0x3544, (q15_t)0x353f, (q15_t)0x3539, (q15_t)0x3533, (q15_t)0x352e, (q15_t)0x3528, (q15_t)0x3522,
-  (q15_t)0x351c, (q15_t)0x3517, (q15_t)0x3511, (q15_t)0x350b, (q15_t)0x3506, (q15_t)0x3500, (q15_t)0x34fa, (q15_t)0x34f4,
-  (q15_t)0x34ef, (q15_t)0x34e9, (q15_t)0x34e3, (q15_t)0x34de, (q15_t)0x34d8, (q15_t)0x34d2, (q15_t)0x34cc, (q15_t)0x34c7,
-  (q15_t)0x34c1, (q15_t)0x34bb, (q15_t)0x34b6, (q15_t)0x34b0, (q15_t)0x34aa, (q15_t)0x34a4, (q15_t)0x349f, (q15_t)0x3499,
-  (q15_t)0x3493, (q15_t)0x348d, (q15_t)0x3488, (q15_t)0x3482, (q15_t)0x347c, (q15_t)0x3476, (q15_t)0x3471, (q15_t)0x346b,
-  (q15_t)0x3465, (q15_t)0x3460, (q15_t)0x345a, (q15_t)0x3454, (q15_t)0x344e, (q15_t)0x3449, (q15_t)0x3443, (q15_t)0x343d,
-  (q15_t)0x3437, (q15_t)0x3432, (q15_t)0x342c, (q15_t)0x3426, (q15_t)0x3420, (q15_t)0x341b, (q15_t)0x3415, (q15_t)0x340f,
-  (q15_t)0x340a, (q15_t)0x3404, (q15_t)0x33fe, (q15_t)0x33f8, (q15_t)0x33f3, (q15_t)0x33ed, (q15_t)0x33e7, (q15_t)0x33e1,
-  (q15_t)0x33dc, (q15_t)0x33d6, (q15_t)0x33d0, (q15_t)0x33ca, (q15_t)0x33c5, (q15_t)0x33bf, (q15_t)0x33b9, (q15_t)0x33b3,
-  (q15_t)0x33ae, (q15_t)0x33a8, (q15_t)0x33a2, (q15_t)0x339c, (q15_t)0x3397, (q15_t)0x3391, (q15_t)0x338b, (q15_t)0x3385,
-  (q15_t)0x3380, (q15_t)0x337a, (q15_t)0x3374, (q15_t)0x336e, (q15_t)0x3369, (q15_t)0x3363, (q15_t)0x335d, (q15_t)0x3357,
-  (q15_t)0x3352, (q15_t)0x334c, (q15_t)0x3346, (q15_t)0x3340, (q15_t)0x333b, (q15_t)0x3335, (q15_t)0x332f, (q15_t)0x3329,
-  (q15_t)0x3324, (q15_t)0x331e, (q15_t)0x3318, (q15_t)0x3312, (q15_t)0x330c, (q15_t)0x3307, (q15_t)0x3301, (q15_t)0x32fb,
-  (q15_t)0x32f5, (q15_t)0x32f0, (q15_t)0x32ea, (q15_t)0x32e4, (q15_t)0x32de, (q15_t)0x32d9, (q15_t)0x32d3, (q15_t)0x32cd,
-  (q15_t)0x32c7, (q15_t)0x32c2, (q15_t)0x32bc, (q15_t)0x32b6, (q15_t)0x32b0, (q15_t)0x32aa, (q15_t)0x32a5, (q15_t)0x329f,
-  (q15_t)0x3299, (q15_t)0x3293, (q15_t)0x328e, (q15_t)0x3288, (q15_t)0x3282, (q15_t)0x327c, (q15_t)0x3276, (q15_t)0x3271,
-  (q15_t)0x326b, (q15_t)0x3265, (q15_t)0x325f, (q15_t)0x325a, (q15_t)0x3254, (q15_t)0x324e, (q15_t)0x3248, (q15_t)0x3243,
-  (q15_t)0x323d, (q15_t)0x3237, (q15_t)0x3231, (q15_t)0x322b, (q15_t)0x3226, (q15_t)0x3220, (q15_t)0x321a, (q15_t)0x3214,
-  (q15_t)0x320e, (q15_t)0x3209, (q15_t)0x3203, (q15_t)0x31fd, (q15_t)0x31f7, (q15_t)0x31f2, (q15_t)0x31ec, (q15_t)0x31e6,
-  (q15_t)0x31e0, (q15_t)0x31da, (q15_t)0x31d5, (q15_t)0x31cf, (q15_t)0x31c9, (q15_t)0x31c3, (q15_t)0x31bd, (q15_t)0x31b8,
-  (q15_t)0x31b2, (q15_t)0x31ac, (q15_t)0x31a6, (q15_t)0x31a1, (q15_t)0x319b, (q15_t)0x3195, (q15_t)0x318f, (q15_t)0x3189,
-  (q15_t)0x3184, (q15_t)0x317e, (q15_t)0x3178, (q15_t)0x3172, (q15_t)0x316c, (q15_t)0x3167, (q15_t)0x3161, (q15_t)0x315b,
-  (q15_t)0x3155, (q15_t)0x314f, (q15_t)0x314a, (q15_t)0x3144, (q15_t)0x313e, (q15_t)0x3138, (q15_t)0x3132, (q15_t)0x312d,
-  (q15_t)0x3127, (q15_t)0x3121, (q15_t)0x311b, (q15_t)0x3115, (q15_t)0x3110, (q15_t)0x310a, (q15_t)0x3104, (q15_t)0x30fe,
-  (q15_t)0x30f8, (q15_t)0x30f3, (q15_t)0x30ed, (q15_t)0x30e7, (q15_t)0x30e1, (q15_t)0x30db, (q15_t)0x30d6, (q15_t)0x30d0,
-  (q15_t)0x30ca, (q15_t)0x30c4, (q15_t)0x30be, (q15_t)0x30b8, (q15_t)0x30b3, (q15_t)0x30ad, (q15_t)0x30a7, (q15_t)0x30a1,
-  (q15_t)0x309b, (q15_t)0x3096, (q15_t)0x3090, (q15_t)0x308a, (q15_t)0x3084, (q15_t)0x307e, (q15_t)0x3079, (q15_t)0x3073,
-  (q15_t)0x306d, (q15_t)0x3067, (q15_t)0x3061, (q15_t)0x305b, (q15_t)0x3056, (q15_t)0x3050, (q15_t)0x304a, (q15_t)0x3044,
-  (q15_t)0x303e, (q15_t)0x3039, (q15_t)0x3033, (q15_t)0x302d, (q15_t)0x3027, (q15_t)0x3021, (q15_t)0x301b, (q15_t)0x3016,
-  (q15_t)0x3010, (q15_t)0x300a, (q15_t)0x3004, (q15_t)0x2ffe, (q15_t)0x2ff8, (q15_t)0x2ff3, (q15_t)0x2fed, (q15_t)0x2fe7,
-  (q15_t)0x2fe1, (q15_t)0x2fdb, (q15_t)0x2fd6, (q15_t)0x2fd0, (q15_t)0x2fca, (q15_t)0x2fc4, (q15_t)0x2fbe, (q15_t)0x2fb8,
-  (q15_t)0x2fb3, (q15_t)0x2fad, (q15_t)0x2fa7, (q15_t)0x2fa1, (q15_t)0x2f9b, (q15_t)0x2f95, (q15_t)0x2f90, (q15_t)0x2f8a,
-  (q15_t)0x2f84, (q15_t)0x2f7e, (q15_t)0x2f78, (q15_t)0x2f72, (q15_t)0x2f6d, (q15_t)0x2f67, (q15_t)0x2f61, (q15_t)0x2f5b,
-  (q15_t)0x2f55, (q15_t)0x2f4f, (q15_t)0x2f4a, (q15_t)0x2f44, (q15_t)0x2f3e, (q15_t)0x2f38, (q15_t)0x2f32, (q15_t)0x2f2c,
-  (q15_t)0x2f27, (q15_t)0x2f21, (q15_t)0x2f1b, (q15_t)0x2f15, (q15_t)0x2f0f, (q15_t)0x2f09, (q15_t)0x2f03, (q15_t)0x2efe,
-  (q15_t)0x2ef8, (q15_t)0x2ef2, (q15_t)0x2eec, (q15_t)0x2ee6, (q15_t)0x2ee0, (q15_t)0x2edb, (q15_t)0x2ed5, (q15_t)0x2ecf,
-  (q15_t)0x2ec9, (q15_t)0x2ec3, (q15_t)0x2ebd, (q15_t)0x2eb7, (q15_t)0x2eb2, (q15_t)0x2eac, (q15_t)0x2ea6, (q15_t)0x2ea0,
-  (q15_t)0x2e9a, (q15_t)0x2e94, (q15_t)0x2e8e, (q15_t)0x2e89, (q15_t)0x2e83, (q15_t)0x2e7d, (q15_t)0x2e77, (q15_t)0x2e71,
-  (q15_t)0x2e6b, (q15_t)0x2e65, (q15_t)0x2e60, (q15_t)0x2e5a, (q15_t)0x2e54, (q15_t)0x2e4e, (q15_t)0x2e48, (q15_t)0x2e42,
-  (q15_t)0x2e3c, (q15_t)0x2e37, (q15_t)0x2e31, (q15_t)0x2e2b, (q15_t)0x2e25, (q15_t)0x2e1f, (q15_t)0x2e19, (q15_t)0x2e13,
-  (q15_t)0x2e0e, (q15_t)0x2e08, (q15_t)0x2e02, (q15_t)0x2dfc, (q15_t)0x2df6, (q15_t)0x2df0, (q15_t)0x2dea, (q15_t)0x2de5,
-  (q15_t)0x2ddf, (q15_t)0x2dd9, (q15_t)0x2dd3, (q15_t)0x2dcd, (q15_t)0x2dc7, (q15_t)0x2dc1, (q15_t)0x2dbb, (q15_t)0x2db6,
-  (q15_t)0x2db0, (q15_t)0x2daa, (q15_t)0x2da4, (q15_t)0x2d9e, (q15_t)0x2d98, (q15_t)0x2d92, (q15_t)0x2d8d, (q15_t)0x2d87,
-  (q15_t)0x2d81, (q15_t)0x2d7b, (q15_t)0x2d75, (q15_t)0x2d6f, (q15_t)0x2d69, (q15_t)0x2d63, (q15_t)0x2d5e, (q15_t)0x2d58,
-  (q15_t)0x2d52, (q15_t)0x2d4c, (q15_t)0x2d46, (q15_t)0x2d40, (q15_t)0x2d3a, (q15_t)0x2d34, (q15_t)0x2d2f, (q15_t)0x2d29,
-  (q15_t)0x2d23, (q15_t)0x2d1d, (q15_t)0x2d17, (q15_t)0x2d11, (q15_t)0x2d0b, (q15_t)0x2d05, (q15_t)0x2cff, (q15_t)0x2cfa,
-  (q15_t)0x2cf4, (q15_t)0x2cee, (q15_t)0x2ce8, (q15_t)0x2ce2, (q15_t)0x2cdc, (q15_t)0x2cd6, (q15_t)0x2cd0, (q15_t)0x2ccb,
-  (q15_t)0x2cc5, (q15_t)0x2cbf, (q15_t)0x2cb9, (q15_t)0x2cb3, (q15_t)0x2cad, (q15_t)0x2ca7, (q15_t)0x2ca1, (q15_t)0x2c9b,
-  (q15_t)0x2c96, (q15_t)0x2c90, (q15_t)0x2c8a, (q15_t)0x2c84, (q15_t)0x2c7e, (q15_t)0x2c78, (q15_t)0x2c72, (q15_t)0x2c6c,
-  (q15_t)0x2c66, (q15_t)0x2c61, (q15_t)0x2c5b, (q15_t)0x2c55, (q15_t)0x2c4f, (q15_t)0x2c49, (q15_t)0x2c43, (q15_t)0x2c3d,
-  (q15_t)0x2c37, (q15_t)0x2c31, (q15_t)0x2c2b, (q15_t)0x2c26, (q15_t)0x2c20, (q15_t)0x2c1a, (q15_t)0x2c14, (q15_t)0x2c0e,
-  (q15_t)0x2c08, (q15_t)0x2c02, (q15_t)0x2bfc, (q15_t)0x2bf6, (q15_t)0x2bf0, (q15_t)0x2beb, (q15_t)0x2be5, (q15_t)0x2bdf,
-  (q15_t)0x2bd9, (q15_t)0x2bd3, (q15_t)0x2bcd, (q15_t)0x2bc7, (q15_t)0x2bc1, (q15_t)0x2bbb, (q15_t)0x2bb5, (q15_t)0x2bb0,
-  (q15_t)0x2baa, (q15_t)0x2ba4, (q15_t)0x2b9e, (q15_t)0x2b98, (q15_t)0x2b92, (q15_t)0x2b8c, (q15_t)0x2b86, (q15_t)0x2b80,
-  (q15_t)0x2b7a, (q15_t)0x2b74, (q15_t)0x2b6f, (q15_t)0x2b69, (q15_t)0x2b63, (q15_t)0x2b5d, (q15_t)0x2b57, (q15_t)0x2b51,
-  (q15_t)0x2b4b, (q15_t)0x2b45, (q15_t)0x2b3f, (q15_t)0x2b39, (q15_t)0x2b33, (q15_t)0x2b2d, (q15_t)0x2b28, (q15_t)0x2b22,
-  (q15_t)0x2b1c, (q15_t)0x2b16, (q15_t)0x2b10, (q15_t)0x2b0a, (q15_t)0x2b04, (q15_t)0x2afe, (q15_t)0x2af8, (q15_t)0x2af2,
-  (q15_t)0x2aec, (q15_t)0x2ae6, (q15_t)0x2ae1, (q15_t)0x2adb, (q15_t)0x2ad5, (q15_t)0x2acf, (q15_t)0x2ac9, (q15_t)0x2ac3,
-  (q15_t)0x2abd, (q15_t)0x2ab7, (q15_t)0x2ab1, (q15_t)0x2aab, (q15_t)0x2aa5, (q15_t)0x2a9f, (q15_t)0x2a99, (q15_t)0x2a94,
-  (q15_t)0x2a8e, (q15_t)0x2a88, (q15_t)0x2a82, (q15_t)0x2a7c, (q15_t)0x2a76, (q15_t)0x2a70, (q15_t)0x2a6a, (q15_t)0x2a64,
-  (q15_t)0x2a5e, (q15_t)0x2a58, (q15_t)0x2a52, (q15_t)0x2a4c, (q15_t)0x2a47, (q15_t)0x2a41, (q15_t)0x2a3b, (q15_t)0x2a35,
-  (q15_t)0x2a2f, (q15_t)0x2a29, (q15_t)0x2a23, (q15_t)0x2a1d, (q15_t)0x2a17, (q15_t)0x2a11, (q15_t)0x2a0b, (q15_t)0x2a05,
-  (q15_t)0x29ff, (q15_t)0x29f9, (q15_t)0x29f3, (q15_t)0x29ee, (q15_t)0x29e8, (q15_t)0x29e2, (q15_t)0x29dc, (q15_t)0x29d6,
-  (q15_t)0x29d0, (q15_t)0x29ca, (q15_t)0x29c4, (q15_t)0x29be, (q15_t)0x29b8, (q15_t)0x29b2, (q15_t)0x29ac, (q15_t)0x29a6,
-  (q15_t)0x29a0, (q15_t)0x299a, (q15_t)0x2994, (q15_t)0x298e, (q15_t)0x2989, (q15_t)0x2983, (q15_t)0x297d, (q15_t)0x2977,
-  (q15_t)0x2971, (q15_t)0x296b, (q15_t)0x2965, (q15_t)0x295f, (q15_t)0x2959, (q15_t)0x2953, (q15_t)0x294d, (q15_t)0x2947,
-  (q15_t)0x2941, (q15_t)0x293b, (q15_t)0x2935, (q15_t)0x292f, (q15_t)0x2929, (q15_t)0x2923, (q15_t)0x291d, (q15_t)0x2918,
-  (q15_t)0x2912, (q15_t)0x290c, (q15_t)0x2906, (q15_t)0x2900, (q15_t)0x28fa, (q15_t)0x28f4, (q15_t)0x28ee, (q15_t)0x28e8,
-  (q15_t)0x28e2, (q15_t)0x28dc, (q15_t)0x28d6, (q15_t)0x28d0, (q15_t)0x28ca, (q15_t)0x28c4, (q15_t)0x28be, (q15_t)0x28b8,
-  (q15_t)0x28b2, (q15_t)0x28ac, (q15_t)0x28a6, (q15_t)0x28a0, (q15_t)0x289a, (q15_t)0x2895, (q15_t)0x288f, (q15_t)0x2889,
-  (q15_t)0x2883, (q15_t)0x287d, (q15_t)0x2877, (q15_t)0x2871, (q15_t)0x286b, (q15_t)0x2865, (q15_t)0x285f, (q15_t)0x2859,
-  (q15_t)0x2853, (q15_t)0x284d, (q15_t)0x2847, (q15_t)0x2841, (q15_t)0x283b, (q15_t)0x2835, (q15_t)0x282f, (q15_t)0x2829,
-  (q15_t)0x2823, (q15_t)0x281d, (q15_t)0x2817, (q15_t)0x2811, (q15_t)0x280b, (q15_t)0x2805, (q15_t)0x27ff, (q15_t)0x27f9,
-  (q15_t)0x27f3, (q15_t)0x27ee, (q15_t)0x27e8, (q15_t)0x27e2, (q15_t)0x27dc, (q15_t)0x27d6, (q15_t)0x27d0, (q15_t)0x27ca,
-  (q15_t)0x27c4, (q15_t)0x27be, (q15_t)0x27b8, (q15_t)0x27b2, (q15_t)0x27ac, (q15_t)0x27a6, (q15_t)0x27a0, (q15_t)0x279a,
-  (q15_t)0x2794, (q15_t)0x278e, (q15_t)0x2788, (q15_t)0x2782, (q15_t)0x277c, (q15_t)0x2776, (q15_t)0x2770, (q15_t)0x276a,
-  (q15_t)0x2764, (q15_t)0x275e, (q15_t)0x2758, (q15_t)0x2752, (q15_t)0x274c, (q15_t)0x2746, (q15_t)0x2740, (q15_t)0x273a,
-  (q15_t)0x2734, (q15_t)0x272e, (q15_t)0x2728, (q15_t)0x2722, (q15_t)0x271c, (q15_t)0x2716, (q15_t)0x2710, (q15_t)0x270a,
-  (q15_t)0x2704, (q15_t)0x26fe, (q15_t)0x26f8, (q15_t)0x26f2, (q15_t)0x26ec, (q15_t)0x26e7, (q15_t)0x26e1, (q15_t)0x26db,
-  (q15_t)0x26d5, (q15_t)0x26cf, (q15_t)0x26c9, (q15_t)0x26c3, (q15_t)0x26bd, (q15_t)0x26b7, (q15_t)0x26b1, (q15_t)0x26ab,
-  (q15_t)0x26a5, (q15_t)0x269f, (q15_t)0x2699, (q15_t)0x2693, (q15_t)0x268d, (q15_t)0x2687, (q15_t)0x2681, (q15_t)0x267b,
-  (q15_t)0x2675, (q15_t)0x266f, (q15_t)0x2669, (q15_t)0x2663, (q15_t)0x265d, (q15_t)0x2657, (q15_t)0x2651, (q15_t)0x264b,
-  (q15_t)0x2645, (q15_t)0x263f, (q15_t)0x2639, (q15_t)0x2633, (q15_t)0x262d, (q15_t)0x2627, (q15_t)0x2621, (q15_t)0x261b,
-  (q15_t)0x2615, (q15_t)0x260f, (q15_t)0x2609, (q15_t)0x2603, (q15_t)0x25fd, (q15_t)0x25f7, (q15_t)0x25f1, (q15_t)0x25eb,
-  (q15_t)0x25e5, (q15_t)0x25df, (q15_t)0x25d9, (q15_t)0x25d3, (q15_t)0x25cd, (q15_t)0x25c7, (q15_t)0x25c1, (q15_t)0x25bb,
-  (q15_t)0x25b5, (q15_t)0x25af, (q15_t)0x25a9, (q15_t)0x25a3, (q15_t)0x259d, (q15_t)0x2597, (q15_t)0x2591, (q15_t)0x258b,
-  (q15_t)0x2585, (q15_t)0x257f, (q15_t)0x2579, (q15_t)0x2573, (q15_t)0x256d, (q15_t)0x2567, (q15_t)0x2561, (q15_t)0x255b,
-  (q15_t)0x2555, (q15_t)0x254f, (q15_t)0x2549, (q15_t)0x2543, (q15_t)0x253d, (q15_t)0x2537, (q15_t)0x2531, (q15_t)0x252b,
-  (q15_t)0x2525, (q15_t)0x251f, (q15_t)0x2519, (q15_t)0x2513, (q15_t)0x250c, (q15_t)0x2506, (q15_t)0x2500, (q15_t)0x24fa,
-  (q15_t)0x24f4, (q15_t)0x24ee, (q15_t)0x24e8, (q15_t)0x24e2, (q15_t)0x24dc, (q15_t)0x24d6, (q15_t)0x24d0, (q15_t)0x24ca,
-  (q15_t)0x24c4, (q15_t)0x24be, (q15_t)0x24b8, (q15_t)0x24b2, (q15_t)0x24ac, (q15_t)0x24a6, (q15_t)0x24a0, (q15_t)0x249a,
-  (q15_t)0x2494, (q15_t)0x248e, (q15_t)0x2488, (q15_t)0x2482, (q15_t)0x247c, (q15_t)0x2476, (q15_t)0x2470, (q15_t)0x246a,
-  (q15_t)0x2464, (q15_t)0x245e, (q15_t)0x2458, (q15_t)0x2452, (q15_t)0x244c, (q15_t)0x2446, (q15_t)0x2440, (q15_t)0x243a,
-  (q15_t)0x2434, (q15_t)0x242e, (q15_t)0x2428, (q15_t)0x2422, (q15_t)0x241c, (q15_t)0x2416, (q15_t)0x2410, (q15_t)0x240a,
-  (q15_t)0x2404, (q15_t)0x23fd, (q15_t)0x23f7, (q15_t)0x23f1, (q15_t)0x23eb, (q15_t)0x23e5, (q15_t)0x23df, (q15_t)0x23d9,
-  (q15_t)0x23d3, (q15_t)0x23cd, (q15_t)0x23c7, (q15_t)0x23c1, (q15_t)0x23bb, (q15_t)0x23b5, (q15_t)0x23af, (q15_t)0x23a9,
-  (q15_t)0x23a3, (q15_t)0x239d, (q15_t)0x2397, (q15_t)0x2391, (q15_t)0x238b, (q15_t)0x2385, (q15_t)0x237f, (q15_t)0x2379,
-  (q15_t)0x2373, (q15_t)0x236d, (q15_t)0x2367, (q15_t)0x2361, (q15_t)0x235b, (q15_t)0x2355, (q15_t)0x234e, (q15_t)0x2348,
-  (q15_t)0x2342, (q15_t)0x233c, (q15_t)0x2336, (q15_t)0x2330, (q15_t)0x232a, (q15_t)0x2324, (q15_t)0x231e, (q15_t)0x2318,
-  (q15_t)0x2312, (q15_t)0x230c, (q15_t)0x2306, (q15_t)0x2300, (q15_t)0x22fa, (q15_t)0x22f4, (q15_t)0x22ee, (q15_t)0x22e8,
-  (q15_t)0x22e2, (q15_t)0x22dc, (q15_t)0x22d6, (q15_t)0x22d0, (q15_t)0x22ca, (q15_t)0x22c4, (q15_t)0x22bd, (q15_t)0x22b7,
-  (q15_t)0x22b1, (q15_t)0x22ab, (q15_t)0x22a5, (q15_t)0x229f, (q15_t)0x2299, (q15_t)0x2293, (q15_t)0x228d, (q15_t)0x2287,
-  (q15_t)0x2281, (q15_t)0x227b, (q15_t)0x2275, (q15_t)0x226f, (q15_t)0x2269, (q15_t)0x2263, (q15_t)0x225d, (q15_t)0x2257,
-  (q15_t)0x2251, (q15_t)0x224a, (q15_t)0x2244, (q15_t)0x223e, (q15_t)0x2238, (q15_t)0x2232, (q15_t)0x222c, (q15_t)0x2226,
-  (q15_t)0x2220, (q15_t)0x221a, (q15_t)0x2214, (q15_t)0x220e, (q15_t)0x2208, (q15_t)0x2202, (q15_t)0x21fc, (q15_t)0x21f6,
-  (q15_t)0x21f0, (q15_t)0x21ea, (q15_t)0x21e4, (q15_t)0x21dd, (q15_t)0x21d7, (q15_t)0x21d1, (q15_t)0x21cb, (q15_t)0x21c5,
-  (q15_t)0x21bf, (q15_t)0x21b9, (q15_t)0x21b3, (q15_t)0x21ad, (q15_t)0x21a7, (q15_t)0x21a1, (q15_t)0x219b, (q15_t)0x2195,
-  (q15_t)0x218f, (q15_t)0x2189, (q15_t)0x2183, (q15_t)0x217c, (q15_t)0x2176, (q15_t)0x2170, (q15_t)0x216a, (q15_t)0x2164,
-  (q15_t)0x215e, (q15_t)0x2158, (q15_t)0x2152, (q15_t)0x214c, (q15_t)0x2146, (q15_t)0x2140, (q15_t)0x213a, (q15_t)0x2134,
-  (q15_t)0x212e, (q15_t)0x2128, (q15_t)0x2121, (q15_t)0x211b, (q15_t)0x2115, (q15_t)0x210f, (q15_t)0x2109, (q15_t)0x2103,
-  (q15_t)0x20fd, (q15_t)0x20f7, (q15_t)0x20f1, (q15_t)0x20eb, (q15_t)0x20e5, (q15_t)0x20df, (q15_t)0x20d9, (q15_t)0x20d3,
-  (q15_t)0x20cc, (q15_t)0x20c6, (q15_t)0x20c0, (q15_t)0x20ba, (q15_t)0x20b4, (q15_t)0x20ae, (q15_t)0x20a8, (q15_t)0x20a2,
-  (q15_t)0x209c, (q15_t)0x2096, (q15_t)0x2090, (q15_t)0x208a, (q15_t)0x2084, (q15_t)0x207e, (q15_t)0x2077, (q15_t)0x2071,
-  (q15_t)0x206b, (q15_t)0x2065, (q15_t)0x205f, (q15_t)0x2059, (q15_t)0x2053, (q15_t)0x204d, (q15_t)0x2047, (q15_t)0x2041,
-  (q15_t)0x203b, (q15_t)0x2035, (q15_t)0x202e, (q15_t)0x2028, (q15_t)0x2022, (q15_t)0x201c, (q15_t)0x2016, (q15_t)0x2010,
-  (q15_t)0x200a, (q15_t)0x2004, (q15_t)0x1ffe, (q15_t)0x1ff8, (q15_t)0x1ff2, (q15_t)0x1fec, (q15_t)0x1fe5, (q15_t)0x1fdf,
-  (q15_t)0x1fd9, (q15_t)0x1fd3, (q15_t)0x1fcd, (q15_t)0x1fc7, (q15_t)0x1fc1, (q15_t)0x1fbb, (q15_t)0x1fb5, (q15_t)0x1faf,
-  (q15_t)0x1fa9, (q15_t)0x1fa3, (q15_t)0x1f9c, (q15_t)0x1f96, (q15_t)0x1f90, (q15_t)0x1f8a, (q15_t)0x1f84, (q15_t)0x1f7e,
-  (q15_t)0x1f78, (q15_t)0x1f72, (q15_t)0x1f6c, (q15_t)0x1f66, (q15_t)0x1f60, (q15_t)0x1f59, (q15_t)0x1f53, (q15_t)0x1f4d,
-  (q15_t)0x1f47, (q15_t)0x1f41, (q15_t)0x1f3b, (q15_t)0x1f35, (q15_t)0x1f2f, (q15_t)0x1f29, (q15_t)0x1f23, (q15_t)0x1f1d,
-  (q15_t)0x1f16, (q15_t)0x1f10, (q15_t)0x1f0a, (q15_t)0x1f04, (q15_t)0x1efe, (q15_t)0x1ef8, (q15_t)0x1ef2, (q15_t)0x1eec,
-  (q15_t)0x1ee6, (q15_t)0x1ee0, (q15_t)0x1ed9, (q15_t)0x1ed3, (q15_t)0x1ecd, (q15_t)0x1ec7, (q15_t)0x1ec1, (q15_t)0x1ebb,
-  (q15_t)0x1eb5, (q15_t)0x1eaf, (q15_t)0x1ea9, (q15_t)0x1ea3, (q15_t)0x1e9c, (q15_t)0x1e96, (q15_t)0x1e90, (q15_t)0x1e8a,
-  (q15_t)0x1e84, (q15_t)0x1e7e, (q15_t)0x1e78, (q15_t)0x1e72, (q15_t)0x1e6c, (q15_t)0x1e66, (q15_t)0x1e5f, (q15_t)0x1e59,
-  (q15_t)0x1e53, (q15_t)0x1e4d, (q15_t)0x1e47, (q15_t)0x1e41, (q15_t)0x1e3b, (q15_t)0x1e35, (q15_t)0x1e2f, (q15_t)0x1e29,
-  (q15_t)0x1e22, (q15_t)0x1e1c, (q15_t)0x1e16, (q15_t)0x1e10, (q15_t)0x1e0a, (q15_t)0x1e04, (q15_t)0x1dfe, (q15_t)0x1df8,
-  (q15_t)0x1df2, (q15_t)0x1deb, (q15_t)0x1de5, (q15_t)0x1ddf, (q15_t)0x1dd9, (q15_t)0x1dd3, (q15_t)0x1dcd, (q15_t)0x1dc7,
-  (q15_t)0x1dc1, (q15_t)0x1dbb, (q15_t)0x1db4, (q15_t)0x1dae, (q15_t)0x1da8, (q15_t)0x1da2, (q15_t)0x1d9c, (q15_t)0x1d96,
-  (q15_t)0x1d90, (q15_t)0x1d8a, (q15_t)0x1d84, (q15_t)0x1d7d, (q15_t)0x1d77, (q15_t)0x1d71, (q15_t)0x1d6b, (q15_t)0x1d65,
-  (q15_t)0x1d5f, (q15_t)0x1d59, (q15_t)0x1d53, (q15_t)0x1d4c, (q15_t)0x1d46, (q15_t)0x1d40, (q15_t)0x1d3a, (q15_t)0x1d34,
-  (q15_t)0x1d2e, (q15_t)0x1d28, (q15_t)0x1d22, (q15_t)0x1d1c, (q15_t)0x1d15, (q15_t)0x1d0f, (q15_t)0x1d09, (q15_t)0x1d03,
-  (q15_t)0x1cfd, (q15_t)0x1cf7, (q15_t)0x1cf1, (q15_t)0x1ceb, (q15_t)0x1ce4, (q15_t)0x1cde, (q15_t)0x1cd8, (q15_t)0x1cd2,
-  (q15_t)0x1ccc, (q15_t)0x1cc6, (q15_t)0x1cc0, (q15_t)0x1cba, (q15_t)0x1cb3, (q15_t)0x1cad, (q15_t)0x1ca7, (q15_t)0x1ca1,
-  (q15_t)0x1c9b, (q15_t)0x1c95, (q15_t)0x1c8f, (q15_t)0x1c89, (q15_t)0x1c83, (q15_t)0x1c7c, (q15_t)0x1c76, (q15_t)0x1c70,
-  (q15_t)0x1c6a, (q15_t)0x1c64, (q15_t)0x1c5e, (q15_t)0x1c58, (q15_t)0x1c51, (q15_t)0x1c4b, (q15_t)0x1c45, (q15_t)0x1c3f,
-  (q15_t)0x1c39, (q15_t)0x1c33, (q15_t)0x1c2d, (q15_t)0x1c27, (q15_t)0x1c20, (q15_t)0x1c1a, (q15_t)0x1c14, (q15_t)0x1c0e,
-  (q15_t)0x1c08, (q15_t)0x1c02, (q15_t)0x1bfc, (q15_t)0x1bf6, (q15_t)0x1bef, (q15_t)0x1be9, (q15_t)0x1be3, (q15_t)0x1bdd,
-  (q15_t)0x1bd7, (q15_t)0x1bd1, (q15_t)0x1bcb, (q15_t)0x1bc4, (q15_t)0x1bbe, (q15_t)0x1bb8, (q15_t)0x1bb2, (q15_t)0x1bac,
-  (q15_t)0x1ba6, (q15_t)0x1ba0, (q15_t)0x1b9a, (q15_t)0x1b93, (q15_t)0x1b8d, (q15_t)0x1b87, (q15_t)0x1b81, (q15_t)0x1b7b,
-  (q15_t)0x1b75, (q15_t)0x1b6f, (q15_t)0x1b68, (q15_t)0x1b62, (q15_t)0x1b5c, (q15_t)0x1b56, (q15_t)0x1b50, (q15_t)0x1b4a,
-  (q15_t)0x1b44, (q15_t)0x1b3d, (q15_t)0x1b37, (q15_t)0x1b31, (q15_t)0x1b2b, (q15_t)0x1b25, (q15_t)0x1b1f, (q15_t)0x1b19,
-  (q15_t)0x1b13, (q15_t)0x1b0c, (q15_t)0x1b06, (q15_t)0x1b00, (q15_t)0x1afa, (q15_t)0x1af4, (q15_t)0x1aee, (q15_t)0x1ae8,
-  (q15_t)0x1ae1, (q15_t)0x1adb, (q15_t)0x1ad5, (q15_t)0x1acf, (q15_t)0x1ac9, (q15_t)0x1ac3, (q15_t)0x1abd, (q15_t)0x1ab6,
-  (q15_t)0x1ab0, (q15_t)0x1aaa, (q15_t)0x1aa4, (q15_t)0x1a9e, (q15_t)0x1a98, (q15_t)0x1a91, (q15_t)0x1a8b, (q15_t)0x1a85,
-  (q15_t)0x1a7f, (q15_t)0x1a79, (q15_t)0x1a73, (q15_t)0x1a6d, (q15_t)0x1a66, (q15_t)0x1a60, (q15_t)0x1a5a, (q15_t)0x1a54,
-  (q15_t)0x1a4e, (q15_t)0x1a48, (q15_t)0x1a42, (q15_t)0x1a3b, (q15_t)0x1a35, (q15_t)0x1a2f, (q15_t)0x1a29, (q15_t)0x1a23,
-  (q15_t)0x1a1d, (q15_t)0x1a17, (q15_t)0x1a10, (q15_t)0x1a0a, (q15_t)0x1a04, (q15_t)0x19fe, (q15_t)0x19f8, (q15_t)0x19f2,
-  (q15_t)0x19eb, (q15_t)0x19e5, (q15_t)0x19df, (q15_t)0x19d9, (q15_t)0x19d3, (q15_t)0x19cd, (q15_t)0x19c7, (q15_t)0x19c0,
-  (q15_t)0x19ba, (q15_t)0x19b4, (q15_t)0x19ae, (q15_t)0x19a8, (q15_t)0x19a2, (q15_t)0x199b, (q15_t)0x1995, (q15_t)0x198f,
-  (q15_t)0x1989, (q15_t)0x1983, (q15_t)0x197d, (q15_t)0x1977, (q15_t)0x1970, (q15_t)0x196a, (q15_t)0x1964, (q15_t)0x195e,
-  (q15_t)0x1958, (q15_t)0x1952, (q15_t)0x194b, (q15_t)0x1945, (q15_t)0x193f, (q15_t)0x1939, (q15_t)0x1933, (q15_t)0x192d,
-  (q15_t)0x1926, (q15_t)0x1920, (q15_t)0x191a, (q15_t)0x1914, (q15_t)0x190e, (q15_t)0x1908, (q15_t)0x1901, (q15_t)0x18fb,
-  (q15_t)0x18f5, (q15_t)0x18ef, (q15_t)0x18e9, (q15_t)0x18e3, (q15_t)0x18dc, (q15_t)0x18d6, (q15_t)0x18d0, (q15_t)0x18ca,
-  (q15_t)0x18c4, (q15_t)0x18be, (q15_t)0x18b8, (q15_t)0x18b1, (q15_t)0x18ab, (q15_t)0x18a5, (q15_t)0x189f, (q15_t)0x1899,
-  (q15_t)0x1893, (q15_t)0x188c, (q15_t)0x1886, (q15_t)0x1880, (q15_t)0x187a, (q15_t)0x1874, (q15_t)0x186e, (q15_t)0x1867,
-  (q15_t)0x1861, (q15_t)0x185b, (q15_t)0x1855, (q15_t)0x184f, (q15_t)0x1848, (q15_t)0x1842, (q15_t)0x183c, (q15_t)0x1836,
-  (q15_t)0x1830, (q15_t)0x182a, (q15_t)0x1823, (q15_t)0x181d, (q15_t)0x1817, (q15_t)0x1811, (q15_t)0x180b, (q15_t)0x1805,
-  (q15_t)0x17fe, (q15_t)0x17f8, (q15_t)0x17f2, (q15_t)0x17ec, (q15_t)0x17e6, (q15_t)0x17e0, (q15_t)0x17d9, (q15_t)0x17d3,
-  (q15_t)0x17cd, (q15_t)0x17c7, (q15_t)0x17c1, (q15_t)0x17bb, (q15_t)0x17b4, (q15_t)0x17ae, (q15_t)0x17a8, (q15_t)0x17a2,
-  (q15_t)0x179c, (q15_t)0x1795, (q15_t)0x178f, (q15_t)0x1789, (q15_t)0x1783, (q15_t)0x177d, (q15_t)0x1777, (q15_t)0x1770,
-  (q15_t)0x176a, (q15_t)0x1764, (q15_t)0x175e, (q15_t)0x1758, (q15_t)0x1752, (q15_t)0x174b, (q15_t)0x1745, (q15_t)0x173f,
-  (q15_t)0x1739, (q15_t)0x1733, (q15_t)0x172c, (q15_t)0x1726, (q15_t)0x1720, (q15_t)0x171a, (q15_t)0x1714, (q15_t)0x170e,
-  (q15_t)0x1707, (q15_t)0x1701, (q15_t)0x16fb, (q15_t)0x16f5, (q15_t)0x16ef, (q15_t)0x16e8, (q15_t)0x16e2, (q15_t)0x16dc,
-  (q15_t)0x16d6, (q15_t)0x16d0, (q15_t)0x16ca, (q15_t)0x16c3, (q15_t)0x16bd, (q15_t)0x16b7, (q15_t)0x16b1, (q15_t)0x16ab,
-  (q15_t)0x16a4, (q15_t)0x169e, (q15_t)0x1698, (q15_t)0x1692, (q15_t)0x168c, (q15_t)0x1686, (q15_t)0x167f, (q15_t)0x1679,
-  (q15_t)0x1673, (q15_t)0x166d, (q15_t)0x1667, (q15_t)0x1660, (q15_t)0x165a, (q15_t)0x1654, (q15_t)0x164e, (q15_t)0x1648,
-  (q15_t)0x1642, (q15_t)0x163b, (q15_t)0x1635, (q15_t)0x162f, (q15_t)0x1629, (q15_t)0x1623, (q15_t)0x161c, (q15_t)0x1616,
-  (q15_t)0x1610, (q15_t)0x160a, (q15_t)0x1604, (q15_t)0x15fd, (q15_t)0x15f7, (q15_t)0x15f1, (q15_t)0x15eb, (q15_t)0x15e5,
-  (q15_t)0x15de, (q15_t)0x15d8, (q15_t)0x15d2, (q15_t)0x15cc, (q15_t)0x15c6, (q15_t)0x15c0, (q15_t)0x15b9, (q15_t)0x15b3,
-  (q15_t)0x15ad, (q15_t)0x15a7, (q15_t)0x15a1, (q15_t)0x159a, (q15_t)0x1594, (q15_t)0x158e, (q15_t)0x1588, (q15_t)0x1582,
-  (q15_t)0x157b, (q15_t)0x1575, (q15_t)0x156f, (q15_t)0x1569, (q15_t)0x1563, (q15_t)0x155c, (q15_t)0x1556, (q15_t)0x1550,
-  (q15_t)0x154a, (q15_t)0x1544, (q15_t)0x153d, (q15_t)0x1537, (q15_t)0x1531, (q15_t)0x152b, (q15_t)0x1525, (q15_t)0x151e,
-  (q15_t)0x1518, (q15_t)0x1512, (q15_t)0x150c, (q15_t)0x1506, (q15_t)0x14ff, (q15_t)0x14f9, (q15_t)0x14f3, (q15_t)0x14ed,
-  (q15_t)0x14e7, (q15_t)0x14e0, (q15_t)0x14da, (q15_t)0x14d4, (q15_t)0x14ce, (q15_t)0x14c8, (q15_t)0x14c1, (q15_t)0x14bb,
-  (q15_t)0x14b5, (q15_t)0x14af, (q15_t)0x14a9, (q15_t)0x14a2, (q15_t)0x149c, (q15_t)0x1496, (q15_t)0x1490, (q15_t)0x148a,
-  (q15_t)0x1483, (q15_t)0x147d, (q15_t)0x1477, (q15_t)0x1471, (q15_t)0x146b, (q15_t)0x1464, (q15_t)0x145e, (q15_t)0x1458,
-  (q15_t)0x1452, (q15_t)0x144c, (q15_t)0x1445, (q15_t)0x143f, (q15_t)0x1439, (q15_t)0x1433, (q15_t)0x142d, (q15_t)0x1426,
-  (q15_t)0x1420, (q15_t)0x141a, (q15_t)0x1414, (q15_t)0x140e, (q15_t)0x1407, (q15_t)0x1401, (q15_t)0x13fb, (q15_t)0x13f5,
-  (q15_t)0x13ef, (q15_t)0x13e8, (q15_t)0x13e2, (q15_t)0x13dc, (q15_t)0x13d6, (q15_t)0x13d0, (q15_t)0x13c9, (q15_t)0x13c3,
-  (q15_t)0x13bd, (q15_t)0x13b7, (q15_t)0x13b1, (q15_t)0x13aa, (q15_t)0x13a4, (q15_t)0x139e, (q15_t)0x1398, (q15_t)0x1391,
-  (q15_t)0x138b, (q15_t)0x1385, (q15_t)0x137f, (q15_t)0x1379, (q15_t)0x1372, (q15_t)0x136c, (q15_t)0x1366, (q15_t)0x1360,
-  (q15_t)0x135a, (q15_t)0x1353, (q15_t)0x134d, (q15_t)0x1347, (q15_t)0x1341, (q15_t)0x133b, (q15_t)0x1334, (q15_t)0x132e,
-  (q15_t)0x1328, (q15_t)0x1322, (q15_t)0x131b, (q15_t)0x1315, (q15_t)0x130f, (q15_t)0x1309, (q15_t)0x1303, (q15_t)0x12fc,
-  (q15_t)0x12f6, (q15_t)0x12f0, (q15_t)0x12ea, (q15_t)0x12e4, (q15_t)0x12dd, (q15_t)0x12d7, (q15_t)0x12d1, (q15_t)0x12cb,
-  (q15_t)0x12c4, (q15_t)0x12be, (q15_t)0x12b8, (q15_t)0x12b2, (q15_t)0x12ac, (q15_t)0x12a5, (q15_t)0x129f, (q15_t)0x1299,
-  (q15_t)0x1293, (q15_t)0x128d, (q15_t)0x1286, (q15_t)0x1280, (q15_t)0x127a, (q15_t)0x1274, (q15_t)0x126d, (q15_t)0x1267,
-  (q15_t)0x1261, (q15_t)0x125b, (q15_t)0x1255, (q15_t)0x124e, (q15_t)0x1248, (q15_t)0x1242, (q15_t)0x123c, (q15_t)0x1235,
-  (q15_t)0x122f, (q15_t)0x1229, (q15_t)0x1223, (q15_t)0x121d, (q15_t)0x1216, (q15_t)0x1210, (q15_t)0x120a, (q15_t)0x1204,
-  (q15_t)0x11fd, (q15_t)0x11f7, (q15_t)0x11f1, (q15_t)0x11eb, (q15_t)0x11e5, (q15_t)0x11de, (q15_t)0x11d8, (q15_t)0x11d2,
-  (q15_t)0x11cc, (q15_t)0x11c5, (q15_t)0x11bf, (q15_t)0x11b9, (q15_t)0x11b3, (q15_t)0x11ad, (q15_t)0x11a6, (q15_t)0x11a0,
-  (q15_t)0x119a, (q15_t)0x1194, (q15_t)0x118d, (q15_t)0x1187, (q15_t)0x1181, (q15_t)0x117b, (q15_t)0x1175, (q15_t)0x116e,
-  (q15_t)0x1168, (q15_t)0x1162, (q15_t)0x115c, (q15_t)0x1155, (q15_t)0x114f, (q15_t)0x1149, (q15_t)0x1143, (q15_t)0x113d,
-  (q15_t)0x1136, (q15_t)0x1130, (q15_t)0x112a, (q15_t)0x1124, (q15_t)0x111d, (q15_t)0x1117, (q15_t)0x1111, (q15_t)0x110b,
-  (q15_t)0x1105, (q15_t)0x10fe, (q15_t)0x10f8, (q15_t)0x10f2, (q15_t)0x10ec, (q15_t)0x10e5, (q15_t)0x10df, (q15_t)0x10d9,
-  (q15_t)0x10d3, (q15_t)0x10cc, (q15_t)0x10c6, (q15_t)0x10c0, (q15_t)0x10ba, (q15_t)0x10b4, (q15_t)0x10ad, (q15_t)0x10a7,
-  (q15_t)0x10a1, (q15_t)0x109b, (q15_t)0x1094, (q15_t)0x108e, (q15_t)0x1088, (q15_t)0x1082, (q15_t)0x107b, (q15_t)0x1075,
-  (q15_t)0x106f, (q15_t)0x1069, (q15_t)0x1063, (q15_t)0x105c, (q15_t)0x1056, (q15_t)0x1050, (q15_t)0x104a, (q15_t)0x1043,
-  (q15_t)0x103d, (q15_t)0x1037, (q15_t)0x1031, (q15_t)0x102a, (q15_t)0x1024, (q15_t)0x101e, (q15_t)0x1018, (q15_t)0x1012,
-  (q15_t)0x100b, (q15_t)0x1005, (q15_t)0xfff, (q15_t)0xff9, (q15_t)0xff2, (q15_t)0xfec, (q15_t)0xfe6, (q15_t)0xfe0,
-  (q15_t)0xfd9, (q15_t)0xfd3, (q15_t)0xfcd, (q15_t)0xfc7, (q15_t)0xfc0, (q15_t)0xfba, (q15_t)0xfb4, (q15_t)0xfae,
-  (q15_t)0xfa8, (q15_t)0xfa1, (q15_t)0xf9b, (q15_t)0xf95, (q15_t)0xf8f, (q15_t)0xf88, (q15_t)0xf82, (q15_t)0xf7c,
-  (q15_t)0xf76, (q15_t)0xf6f, (q15_t)0xf69, (q15_t)0xf63, (q15_t)0xf5d, (q15_t)0xf56, (q15_t)0xf50, (q15_t)0xf4a,
-  (q15_t)0xf44, (q15_t)0xf3e, (q15_t)0xf37, (q15_t)0xf31, (q15_t)0xf2b, (q15_t)0xf25, (q15_t)0xf1e, (q15_t)0xf18,
-  (q15_t)0xf12, (q15_t)0xf0c, (q15_t)0xf05, (q15_t)0xeff, (q15_t)0xef9, (q15_t)0xef3, (q15_t)0xeec, (q15_t)0xee6,
-  (q15_t)0xee0, (q15_t)0xeda, (q15_t)0xed3, (q15_t)0xecd, (q15_t)0xec7, (q15_t)0xec1, (q15_t)0xeba, (q15_t)0xeb4,
-  (q15_t)0xeae, (q15_t)0xea8, (q15_t)0xea1, (q15_t)0xe9b, (q15_t)0xe95, (q15_t)0xe8f, (q15_t)0xe89, (q15_t)0xe82,
-  (q15_t)0xe7c, (q15_t)0xe76, (q15_t)0xe70, (q15_t)0xe69, (q15_t)0xe63, (q15_t)0xe5d, (q15_t)0xe57, (q15_t)0xe50,
-  (q15_t)0xe4a, (q15_t)0xe44, (q15_t)0xe3e, (q15_t)0xe37, (q15_t)0xe31, (q15_t)0xe2b, (q15_t)0xe25, (q15_t)0xe1e,
-  (q15_t)0xe18, (q15_t)0xe12, (q15_t)0xe0c, (q15_t)0xe05, (q15_t)0xdff, (q15_t)0xdf9, (q15_t)0xdf3, (q15_t)0xdec,
-  (q15_t)0xde6, (q15_t)0xde0, (q15_t)0xdda, (q15_t)0xdd3, (q15_t)0xdcd, (q15_t)0xdc7, (q15_t)0xdc1, (q15_t)0xdba,
-  (q15_t)0xdb4, (q15_t)0xdae, (q15_t)0xda8, (q15_t)0xda1, (q15_t)0xd9b, (q15_t)0xd95, (q15_t)0xd8f, (q15_t)0xd88,
-  (q15_t)0xd82, (q15_t)0xd7c, (q15_t)0xd76, (q15_t)0xd6f, (q15_t)0xd69, (q15_t)0xd63, (q15_t)0xd5d, (q15_t)0xd56,
-  (q15_t)0xd50, (q15_t)0xd4a, (q15_t)0xd44, (q15_t)0xd3d, (q15_t)0xd37, (q15_t)0xd31, (q15_t)0xd2b, (q15_t)0xd24,
-  (q15_t)0xd1e, (q15_t)0xd18, (q15_t)0xd12, (q15_t)0xd0b, (q15_t)0xd05, (q15_t)0xcff, (q15_t)0xcf9, (q15_t)0xcf2,
-  (q15_t)0xcec, (q15_t)0xce6, (q15_t)0xce0, (q15_t)0xcd9, (q15_t)0xcd3, (q15_t)0xccd, (q15_t)0xcc7, (q15_t)0xcc0,
-  (q15_t)0xcba, (q15_t)0xcb4, (q15_t)0xcae, (q15_t)0xca7, (q15_t)0xca1, (q15_t)0xc9b, (q15_t)0xc95, (q15_t)0xc8e,
-  (q15_t)0xc88, (q15_t)0xc82, (q15_t)0xc7c, (q15_t)0xc75, (q15_t)0xc6f, (q15_t)0xc69, (q15_t)0xc63, (q15_t)0xc5c,
-  (q15_t)0xc56, (q15_t)0xc50, (q15_t)0xc4a, (q15_t)0xc43, (q15_t)0xc3d, (q15_t)0xc37, (q15_t)0xc31, (q15_t)0xc2a,
-  (q15_t)0xc24, (q15_t)0xc1e, (q15_t)0xc18, (q15_t)0xc11, (q15_t)0xc0b, (q15_t)0xc05, (q15_t)0xbff, (q15_t)0xbf8,
-  (q15_t)0xbf2, (q15_t)0xbec, (q15_t)0xbe6, (q15_t)0xbdf, (q15_t)0xbd9, (q15_t)0xbd3, (q15_t)0xbcd, (q15_t)0xbc6,
-  (q15_t)0xbc0, (q15_t)0xbba, (q15_t)0xbb4, (q15_t)0xbad, (q15_t)0xba7, (q15_t)0xba1, (q15_t)0xb9b, (q15_t)0xb94,
-  (q15_t)0xb8e, (q15_t)0xb88, (q15_t)0xb81, (q15_t)0xb7b, (q15_t)0xb75, (q15_t)0xb6f, (q15_t)0xb68, (q15_t)0xb62,
-  (q15_t)0xb5c, (q15_t)0xb56, (q15_t)0xb4f, (q15_t)0xb49, (q15_t)0xb43, (q15_t)0xb3d, (q15_t)0xb36, (q15_t)0xb30,
-  (q15_t)0xb2a, (q15_t)0xb24, (q15_t)0xb1d, (q15_t)0xb17, (q15_t)0xb11, (q15_t)0xb0b, (q15_t)0xb04, (q15_t)0xafe,
-  (q15_t)0xaf8, (q15_t)0xaf2, (q15_t)0xaeb, (q15_t)0xae5, (q15_t)0xadf, (q15_t)0xad8, (q15_t)0xad2, (q15_t)0xacc,
-  (q15_t)0xac6, (q15_t)0xabf, (q15_t)0xab9, (q15_t)0xab3, (q15_t)0xaad, (q15_t)0xaa6, (q15_t)0xaa0, (q15_t)0xa9a,
-  (q15_t)0xa94, (q15_t)0xa8d, (q15_t)0xa87, (q15_t)0xa81, (q15_t)0xa7b, (q15_t)0xa74, (q15_t)0xa6e, (q15_t)0xa68,
-  (q15_t)0xa62, (q15_t)0xa5b, (q15_t)0xa55, (q15_t)0xa4f, (q15_t)0xa48, (q15_t)0xa42, (q15_t)0xa3c, (q15_t)0xa36,
-  (q15_t)0xa2f, (q15_t)0xa29, (q15_t)0xa23, (q15_t)0xa1d, (q15_t)0xa16, (q15_t)0xa10, (q15_t)0xa0a, (q15_t)0xa04,
-  (q15_t)0x9fd, (q15_t)0x9f7, (q15_t)0x9f1, (q15_t)0x9eb, (q15_t)0x9e4, (q15_t)0x9de, (q15_t)0x9d8, (q15_t)0x9d1,
-  (q15_t)0x9cb, (q15_t)0x9c5, (q15_t)0x9bf, (q15_t)0x9b8, (q15_t)0x9b2, (q15_t)0x9ac, (q15_t)0x9a6, (q15_t)0x99f,
-  (q15_t)0x999, (q15_t)0x993, (q15_t)0x98d, (q15_t)0x986, (q15_t)0x980, (q15_t)0x97a, (q15_t)0x973, (q15_t)0x96d,
-  (q15_t)0x967, (q15_t)0x961, (q15_t)0x95a, (q15_t)0x954, (q15_t)0x94e, (q15_t)0x948, (q15_t)0x941, (q15_t)0x93b,
-  (q15_t)0x935, (q15_t)0x92f, (q15_t)0x928, (q15_t)0x922, (q15_t)0x91c, (q15_t)0x915, (q15_t)0x90f, (q15_t)0x909,
-  (q15_t)0x903, (q15_t)0x8fc, (q15_t)0x8f6, (q15_t)0x8f0, (q15_t)0x8ea, (q15_t)0x8e3, (q15_t)0x8dd, (q15_t)0x8d7,
-  (q15_t)0x8d1, (q15_t)0x8ca, (q15_t)0x8c4, (q15_t)0x8be, (q15_t)0x8b7, (q15_t)0x8b1, (q15_t)0x8ab, (q15_t)0x8a5,
-  (q15_t)0x89e, (q15_t)0x898, (q15_t)0x892, (q15_t)0x88c, (q15_t)0x885, (q15_t)0x87f, (q15_t)0x879, (q15_t)0x872,
-  (q15_t)0x86c, (q15_t)0x866, (q15_t)0x860, (q15_t)0x859, (q15_t)0x853, (q15_t)0x84d, (q15_t)0x847, (q15_t)0x840,
-  (q15_t)0x83a, (q15_t)0x834, (q15_t)0x82e, (q15_t)0x827, (q15_t)0x821, (q15_t)0x81b, (q15_t)0x814, (q15_t)0x80e,
-  (q15_t)0x808, (q15_t)0x802, (q15_t)0x7fb, (q15_t)0x7f5, (q15_t)0x7ef, (q15_t)0x7e9, (q15_t)0x7e2, (q15_t)0x7dc,
-  (q15_t)0x7d6, (q15_t)0x7cf, (q15_t)0x7c9, (q15_t)0x7c3, (q15_t)0x7bd, (q15_t)0x7b6, (q15_t)0x7b0, (q15_t)0x7aa,
-  (q15_t)0x7a4, (q15_t)0x79d, (q15_t)0x797, (q15_t)0x791, (q15_t)0x78a, (q15_t)0x784, (q15_t)0x77e, (q15_t)0x778,
-  (q15_t)0x771, (q15_t)0x76b, (q15_t)0x765, (q15_t)0x75f, (q15_t)0x758, (q15_t)0x752, (q15_t)0x74c, (q15_t)0x745,
-  (q15_t)0x73f, (q15_t)0x739, (q15_t)0x733, (q15_t)0x72c, (q15_t)0x726, (q15_t)0x720, (q15_t)0x71a, (q15_t)0x713,
-  (q15_t)0x70d, (q15_t)0x707, (q15_t)0x700, (q15_t)0x6fa, (q15_t)0x6f4, (q15_t)0x6ee, (q15_t)0x6e7, (q15_t)0x6e1,
-  (q15_t)0x6db, (q15_t)0x6d5, (q15_t)0x6ce, (q15_t)0x6c8, (q15_t)0x6c2, (q15_t)0x6bb, (q15_t)0x6b5, (q15_t)0x6af,
-  (q15_t)0x6a9, (q15_t)0x6a2, (q15_t)0x69c, (q15_t)0x696, (q15_t)0x690, (q15_t)0x689, (q15_t)0x683, (q15_t)0x67d,
-  (q15_t)0x676, (q15_t)0x670, (q15_t)0x66a, (q15_t)0x664, (q15_t)0x65d, (q15_t)0x657, (q15_t)0x651, (q15_t)0x64a,
-  (q15_t)0x644, (q15_t)0x63e, (q15_t)0x638, (q15_t)0x631, (q15_t)0x62b, (q15_t)0x625, (q15_t)0x61f, (q15_t)0x618,
-  (q15_t)0x612, (q15_t)0x60c, (q15_t)0x605, (q15_t)0x5ff, (q15_t)0x5f9, (q15_t)0x5f3, (q15_t)0x5ec, (q15_t)0x5e6,
-  (q15_t)0x5e0, (q15_t)0x5da, (q15_t)0x5d3, (q15_t)0x5cd, (q15_t)0x5c7, (q15_t)0x5c0, (q15_t)0x5ba, (q15_t)0x5b4,
-  (q15_t)0x5ae, (q15_t)0x5a7, (q15_t)0x5a1, (q15_t)0x59b, (q15_t)0x594, (q15_t)0x58e, (q15_t)0x588, (q15_t)0x582,
-  (q15_t)0x57b, (q15_t)0x575, (q15_t)0x56f, (q15_t)0x569, (q15_t)0x562, (q15_t)0x55c, (q15_t)0x556, (q15_t)0x54f,
-  (q15_t)0x549, (q15_t)0x543, (q15_t)0x53d, (q15_t)0x536, (q15_t)0x530, (q15_t)0x52a, (q15_t)0x523, (q15_t)0x51d,
-  (q15_t)0x517, (q15_t)0x511, (q15_t)0x50a, (q15_t)0x504, (q15_t)0x4fe, (q15_t)0x4f8, (q15_t)0x4f1, (q15_t)0x4eb,
-  (q15_t)0x4e5, (q15_t)0x4de, (q15_t)0x4d8, (q15_t)0x4d2, (q15_t)0x4cc, (q15_t)0x4c5, (q15_t)0x4bf, (q15_t)0x4b9,
-  (q15_t)0x4b2, (q15_t)0x4ac, (q15_t)0x4a6, (q15_t)0x4a0, (q15_t)0x499, (q15_t)0x493, (q15_t)0x48d, (q15_t)0x487,
-  (q15_t)0x480, (q15_t)0x47a, (q15_t)0x474, (q15_t)0x46d, (q15_t)0x467, (q15_t)0x461, (q15_t)0x45b, (q15_t)0x454,
-  (q15_t)0x44e, (q15_t)0x448, (q15_t)0x441, (q15_t)0x43b, (q15_t)0x435, (q15_t)0x42f, (q15_t)0x428, (q15_t)0x422,
-  (q15_t)0x41c, (q15_t)0x415, (q15_t)0x40f, (q15_t)0x409, (q15_t)0x403, (q15_t)0x3fc, (q15_t)0x3f6, (q15_t)0x3f0,
-  (q15_t)0x3ea, (q15_t)0x3e3, (q15_t)0x3dd, (q15_t)0x3d7, (q15_t)0x3d0, (q15_t)0x3ca, (q15_t)0x3c4, (q15_t)0x3be,
-  (q15_t)0x3b7, (q15_t)0x3b1, (q15_t)0x3ab, (q15_t)0x3a4, (q15_t)0x39e, (q15_t)0x398, (q15_t)0x392, (q15_t)0x38b,
-  (q15_t)0x385, (q15_t)0x37f, (q15_t)0x378, (q15_t)0x372, (q15_t)0x36c, (q15_t)0x366, (q15_t)0x35f, (q15_t)0x359,
-  (q15_t)0x353, (q15_t)0x34c, (q15_t)0x346, (q15_t)0x340, (q15_t)0x33a, (q15_t)0x333, (q15_t)0x32d, (q15_t)0x327,
-  (q15_t)0x321, (q15_t)0x31a, (q15_t)0x314, (q15_t)0x30e, (q15_t)0x307, (q15_t)0x301, (q15_t)0x2fb, (q15_t)0x2f5,
-  (q15_t)0x2ee, (q15_t)0x2e8, (q15_t)0x2e2, (q15_t)0x2db, (q15_t)0x2d5, (q15_t)0x2cf, (q15_t)0x2c9, (q15_t)0x2c2,
-  (q15_t)0x2bc, (q15_t)0x2b6, (q15_t)0x2af, (q15_t)0x2a9, (q15_t)0x2a3, (q15_t)0x29d, (q15_t)0x296, (q15_t)0x290,
-  (q15_t)0x28a, (q15_t)0x283, (q15_t)0x27d, (q15_t)0x277, (q15_t)0x271, (q15_t)0x26a, (q15_t)0x264, (q15_t)0x25e,
-  (q15_t)0x258, (q15_t)0x251, (q15_t)0x24b, (q15_t)0x245, (q15_t)0x23e, (q15_t)0x238, (q15_t)0x232, (q15_t)0x22c,
-  (q15_t)0x225, (q15_t)0x21f, (q15_t)0x219, (q15_t)0x212, (q15_t)0x20c, (q15_t)0x206, (q15_t)0x200, (q15_t)0x1f9,
-  (q15_t)0x1f3, (q15_t)0x1ed, (q15_t)0x1e6, (q15_t)0x1e0, (q15_t)0x1da, (q15_t)0x1d4, (q15_t)0x1cd, (q15_t)0x1c7,
-  (q15_t)0x1c1, (q15_t)0x1ba, (q15_t)0x1b4, (q15_t)0x1ae, (q15_t)0x1a8, (q15_t)0x1a1, (q15_t)0x19b, (q15_t)0x195,
-  (q15_t)0x18e, (q15_t)0x188, (q15_t)0x182, (q15_t)0x17c, (q15_t)0x175, (q15_t)0x16f, (q15_t)0x169, (q15_t)0x162,
-  (q15_t)0x15c, (q15_t)0x156, (q15_t)0x150, (q15_t)0x149, (q15_t)0x143, (q15_t)0x13d, (q15_t)0x137, (q15_t)0x130,
-  (q15_t)0x12a, (q15_t)0x124, (q15_t)0x11d, (q15_t)0x117, (q15_t)0x111, (q15_t)0x10b, (q15_t)0x104, (q15_t)0xfe,
-  (q15_t)0xf8, (q15_t)0xf1, (q15_t)0xeb, (q15_t)0xe5, (q15_t)0xdf, (q15_t)0xd8, (q15_t)0xd2, (q15_t)0xcc,
-  (q15_t)0xc5, (q15_t)0xbf, (q15_t)0xb9, (q15_t)0xb3, (q15_t)0xac, (q15_t)0xa6, (q15_t)0xa0, (q15_t)0x99,
-  (q15_t)0x93, (q15_t)0x8d, (q15_t)0x87, (q15_t)0x80, (q15_t)0x7a, (q15_t)0x74, (q15_t)0x6d, (q15_t)0x67,
-  (q15_t)0x61, (q15_t)0x5b, (q15_t)0x54, (q15_t)0x4e, (q15_t)0x48, (q15_t)0x41, (q15_t)0x3b, (q15_t)0x35,
-  (q15_t)0x2f, (q15_t)0x28, (q15_t)0x22, (q15_t)0x1c, (q15_t)0x15, (q15_t)0xf, (q15_t)0x9, (q15_t)0x3
-};
-  #endif
-
-/**
-  @par
-  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
-  @par
-  C command to generate the table
-  <pre>
-  for (i = 0; i< N; i++)
-  {
-    weights[(2*i)]   =  cos(i*c);
-    weights[(2*i)+1] = -sin(i*c);
-  } </pre>
-  @par
-  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
-  @par
-  Convert the output to q31 format by multiplying with 2^31 and saturated if required.
-  @par
-  In the tables below the real and imaginary values are placed alternatively, hence the
-  array length is <code>2*N</code>.
- */
-
-/**
-  @par
-  cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
-  @par
-  C command to generate the table
-  <pre>
-  for (i = 0; i< N; i++)
-  {
-    cos_factors[i] = 2 * cos((2*i+1)*c/2);
-  } </pre>
-  @par
-  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
-  @par
-  Then converted to q31 format by multiplying with 2^31 and saturated if required.
-*/
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)  
-    const q31_t WeightsQ31_128[256] = {
-  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f872bf3, (q31_t)0xf50497fb,
-  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31,
-  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7dd6668f, (q31_t)0xe8922622,
-  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7c894bde, (q31_t)0xe26cb01b,
-  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7aef6323, (q31_t)0xdc597781,
-  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x7909a92d, (q31_t)0xd65c3b7b,
-  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x76d94989, (q31_t)0xd078ad9e,
-  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x745f9dd1, (q31_t)0xcab26fa9,
-  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x719e2cd2, (q31_t)0xc50d1149,
-  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3,
-  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6b4af279, (q31_t)0xba32ca71,
-  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x67bd0fbd, (q31_t)0xb5049368,
-  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x63ef3290, (q31_t)0xb0049ab3,
-  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5,
-  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5b9d1154, (q31_t)0xa69b9b68,
-  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x571deefa, (q31_t)0xa2386284,
-  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x5269126e, (q31_t)0x9e0effc1,
-  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4d8162c4, (q31_t)0x9a22042d,
-  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4869e665, (q31_t)0x9673db94,
-  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4325c135, (q31_t)0x9306cb04,
-  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3db832a6, (q31_t)0x8fdcef66,
-  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x382493b0, (q31_t)0x8cf83c30,
-  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x326e54c7, (q31_t)0x8a5a7a31,
-  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2c98fbba, (q31_t)0x88054677,
-  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x26a82186, (q31_t)0x85fa1153,
-  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70,
-  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14,
-  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d,
-  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a,
-  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x07d95b9e, (q31_t)0x803daa6a,
-  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x01921d20, (q31_t)0x800277a6
-};
-    const q31_t cos_factorsQ31_128[128] = {
-  (q31_t)0x7fff6216, (q31_t)0x7ffa72d1, (q31_t)0x7ff09478, (q31_t)0x7fe1c76b, (q31_t)0x7fce0c3e, (q31_t)0x7fb563b3,
-  (q31_t)0x7f97cebd, (q31_t)0x7f754e80,
-  (q31_t)0x7f4de451, (q31_t)0x7f2191b4, (q31_t)0x7ef05860, (q31_t)0x7eba3a39, (q31_t)0x7e7f3957, (q31_t)0x7e3f57ff,
-  (q31_t)0x7dfa98a8, (q31_t)0x7db0fdf8,
-  (q31_t)0x7d628ac6, (q31_t)0x7d0f4218, (q31_t)0x7cb72724, (q31_t)0x7c5a3d50, (q31_t)0x7bf88830, (q31_t)0x7b920b89,
-  (q31_t)0x7b26cb4f, (q31_t)0x7ab6cba4,
-  (q31_t)0x7a4210d8, (q31_t)0x79c89f6e, (q31_t)0x794a7c12, (q31_t)0x78c7aba2, (q31_t)0x78403329, (q31_t)0x77b417df,
-  (q31_t)0x77235f2d, (q31_t)0x768e0ea6,
-  (q31_t)0x75f42c0b, (q31_t)0x7555bd4c, (q31_t)0x74b2c884, (q31_t)0x740b53fb, (q31_t)0x735f6626, (q31_t)0x72af05a7,
-  (q31_t)0x71fa3949, (q31_t)0x71410805,
-  (q31_t)0x708378ff, (q31_t)0x6fc19385, (q31_t)0x6efb5f12, (q31_t)0x6e30e34a, (q31_t)0x6d6227fa, (q31_t)0x6c8f351c,
-  (q31_t)0x6bb812d1, (q31_t)0x6adcc964,
-  (q31_t)0x69fd614a, (q31_t)0x6919e320, (q31_t)0x683257ab, (q31_t)0x6746c7d8, (q31_t)0x66573cbb, (q31_t)0x6563bf92,
-  (q31_t)0x646c59bf, (q31_t)0x637114cc,
-  (q31_t)0x6271fa69, (q31_t)0x616f146c, (q31_t)0x60686ccf, (q31_t)0x5f5e0db3, (q31_t)0x5e50015d, (q31_t)0x5d3e5237,
-  (q31_t)0x5c290acc, (q31_t)0x5b1035cf,
-  (q31_t)0x59f3de12, (q31_t)0x58d40e8c, (q31_t)0x57b0d256, (q31_t)0x568a34a9, (q31_t)0x556040e2, (q31_t)0x5433027d,
-  (q31_t)0x53028518, (q31_t)0x51ced46e,
-  (q31_t)0x5097fc5e, (q31_t)0x4f5e08e3, (q31_t)0x4e210617, (q31_t)0x4ce10034, (q31_t)0x4b9e0390, (q31_t)0x4a581c9e,
-  (q31_t)0x490f57ee, (q31_t)0x47c3c22f,
-  (q31_t)0x46756828, (q31_t)0x452456bd, (q31_t)0x43d09aed, (q31_t)0x427a41d0, (q31_t)0x4121589b, (q31_t)0x3fc5ec98,
-  (q31_t)0x3e680b2c, (q31_t)0x3d07c1d6,
-  (q31_t)0x3ba51e29, (q31_t)0x3a402dd2, (q31_t)0x38d8fe93, (q31_t)0x376f9e46, (q31_t)0x36041ad9, (q31_t)0x34968250,
-  (q31_t)0x3326e2c3, (q31_t)0x31b54a5e,
-  (q31_t)0x3041c761, (q31_t)0x2ecc681e, (q31_t)0x2d553afc, (q31_t)0x2bdc4e6f, (q31_t)0x2a61b101, (q31_t)0x28e5714b,
-  (q31_t)0x27679df4, (q31_t)0x25e845b6,
-  (q31_t)0x24677758, (q31_t)0x22e541af, (q31_t)0x2161b3a0, (q31_t)0x1fdcdc1b, (q31_t)0x1e56ca1e, (q31_t)0x1ccf8cb3,
-  (q31_t)0x1b4732ef, (q31_t)0x19bdcbf3,
-  (q31_t)0x183366e9, (q31_t)0x16a81305, (q31_t)0x151bdf86, (q31_t)0x138edbb1, (q31_t)0x120116d5, (q31_t)0x1072a048,
-  (q31_t)0xee38766, (q31_t)0xd53db92,
-  (q31_t)0xbc3ac35, (q31_t)0xa3308bd, (q31_t)0x8a2009a, (q31_t)0x710a345, (q31_t)0x57f0035, (q31_t)0x3ed26e6, (q31_t)0x25b26d7,
-  (q31_t)0xc90f88
-};
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) 
-    const q31_t WeightsQ31_512[1024] = {
-  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f,
-  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff871a2, (q31_t)0xfd40565c,
-  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fed5791, (q31_t)0xfbae5e89,
-  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fc85854, (q31_t)0xf88afe42,
-  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6,
-  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b,
-  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77,
-  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f434563, (q31_t)0xf2482c8a,
-  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401,
-  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7ee34636, (q31_t)0xef29b243,
-  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eabef2c, (q31_t)0xed9b66b2,
-  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8,
-  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a,
-  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7de8a670, (q31_t)0xe8f50273,
-  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8,
-  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5,
-  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb,
-  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3,
-  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c4242f2, (q31_t)0xe14794ba,
-  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3,
-  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b77ada8, (q31_t)0xde3d4964,
-  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008,
-  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd,
-  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a24256f, (q31_t)0xd9b7c094,
-  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79a98715, (q31_t)0xd838c82d,
-  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x792a37fe, (q31_t)0xd6bb585e,
-  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78a63d11, (q31_t)0xd53f7fda,
-  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x781d9b65, (q31_t)0xd3c54d47,
-  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x7790583e, (q31_t)0xd24ccf39,
-  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x76fe790e, (q31_t)0xd0d61434,
-  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x76680376, (q31_t)0xcf612aaa,
-  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ccfd42, (q31_t)0xcdee20fc,
-  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x752d6c6c, (q31_t)0xcc7d0578,
-  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x7489571c, (q31_t)0xcb0de658,
-  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5,
-  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x7333b883, (q31_t)0xc835d5d0,
-  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72823c67, (q31_t)0xc6cd0079,
-  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71cc5626, (q31_t)0xc5665fa9,
-  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71120cc5, (q31_t)0xc4020133,
-  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70536771, (q31_t)0xc29ff2d4,
-  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6f906d84, (q31_t)0xc1404233,
-  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf,
-  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f,
-  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2,
-  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd,
-  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6b81a3cd, (q31_t)0xba87246d,
-  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6aa551e9, (q31_t)0xb936bfa4,
-  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69c4e37a, (q31_t)0xb7e9157a,
-  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x68e06129, (q31_t)0xb69e32cd,
-  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x67f7d3c5, (q31_t)0xb556245e,
-  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x670b4444, (q31_t)0xb410f6d3,
-  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5,
-  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x6526438f, (q31_t)0xb18f7071,
-  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x642de50d, (q31_t)0xb0533055,
-  (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x6331a9d4, (q31_t)0xaf1a0293,
-  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x62319b9d, (q31_t)0xade3f33e,
-  (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x612dc447, (q31_t)0xacb10e4b,
-  (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x60262dd6, (q31_t)0xab815f8d,
-  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba,
-  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e0bec6e, (q31_t)0xa92bd367,
-  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5cf95638, (q31_t)0xa8060d08,
-  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2,
-  (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5ac973b5, (q31_t)0xa5c4b855,
-  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59ac3cfd, (q31_t)0xa4a94043,
-  (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x588b9140, (q31_t)0xa3914da8,
-  (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x57677b9d, (q31_t)0xa27ceb4f,
-  (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x56400758, (q31_t)0xa16c23e1,
-  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x55153fd4, (q31_t)0xa05f01e1,
-  (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x53e73097, (q31_t)0x9f558fb0,
-  (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52b5e546, (q31_t)0x9e4fd78a,
-  (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x518169a5, (q31_t)0x9d4de385,
-  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x5049c999, (q31_t)0x9c4fbd93,
-  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f0f1126, (q31_t)0x9b556f81,
-  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5,
-  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4c9087b1, (q31_t)0x996c816f,
-  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b4ccf4d, (q31_t)0x987df449,
-  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a062fbd, (q31_t)0x979364b5,
-  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48bcb599, (q31_t)0x96acdbbe,
-  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47706d93, (q31_t)0x95ca6247,
-  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x4621647d, (q31_t)0x94ec010b,
-  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x44cfa740, (q31_t)0x9411c09e,
-  (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x437b42e1, (q31_t)0x933ba968,
-  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x42244481, (q31_t)0x9269c3ac,
-  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x40cab958, (q31_t)0x919c1781,
-  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4,
-  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e10320d, (q31_t)0x900d8b69,
-  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3caf50da, (q31_t)0x8f4cbadb,
-  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b4c18ba, (q31_t)0x8e904298,
-  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x39e6975e, (q31_t)0x8dd829e4,
-  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x387eda8e, (q31_t)0x8d2477d8,
-  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3714f02a, (q31_t)0x8c753362,
-  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35a8e625, (q31_t)0x8bca6343,
-  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x343aca87, (q31_t)0x8b240e11,
-  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x32caab6f, (q31_t)0x8a823a36,
-  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x3158970e, (q31_t)0x89e4edef,
-  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c,
-  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2e6ec792, (q31_t)0x88b80432,
-  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2cf72939, (q31_t)0x88287256,
-  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2b7dcf17, (q31_t)0x879d7f41,
-  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a02c7b8, (q31_t)0x8717304e,
-  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x288621b9, (q31_t)0x86958aac,
-  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2707ebc7, (q31_t)0x86189359,
-  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x2588349d, (q31_t)0x85a04f28,
-  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x24070b08, (q31_t)0x852cc2bb,
-  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22847de0, (q31_t)0x84bdf286,
-  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21009c0c, (q31_t)0x8453e2cf,
-  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1f7b7481, (q31_t)0x83ee97ad,
-  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1df5163f, (q31_t)0x838e1507,
-  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1c6d9053, (q31_t)0x83325e97,
-  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5,
-  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x195b49ea, (q31_t)0x8289644b,
-  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x17d0a7bc, (q31_t)0x823c26f3,
-  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16451a83, (q31_t)0x81f3c2d7,
-  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x14b8b17f, (q31_t)0x81b03ac2,
-  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e,
-  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6,
-  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4,
-  (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0f475bff, (q31_t)0x80ea4712, (q31_t)0x0ee38766, (q31_t)0x80de6e4c, (q31_t)0x0e7fa99e, (q31_t)0x80d2e3f2,
-  (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, (q31_t)0x0db7d376, (q31_t)0x80bcba9d, (q31_t)0x0d53db92, (q31_t)0x80b21baf, (q31_t)0x0cefdb76, (q31_t)0x80a7cb49,
-  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0c27c389, (q31_t)0x8094162c, (q31_t)0x0bc3ac35, (q31_t)0x808ab180, (q31_t)0x0b5f8d9f, (q31_t)0x80819b74,
-  (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x0a973ba5, (q31_t)0x80705b50, (q31_t)0x0a3308bd, (q31_t)0x80683143, (q31_t)0x09cecf89, (q31_t)0x806055eb,
-  (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x09064b3a, (q31_t)0x80518b6b, (q31_t)0x08a2009a, (q31_t)0x804a9c4d, (q31_t)0x083db0a7, (q31_t)0x8043fbf6,
-  (q31_t)0x07d95b9e, (q31_t)0x803daa6a, (q31_t)0x077501be, (q31_t)0x8037a7ac, (q31_t)0x0710a345, (q31_t)0x8031f3c2, (q31_t)0x06ac406f, (q31_t)0x802c8ead,
-  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x05e36ea9, (q31_t)0x8022b114, (q31_t)0x057f0035, (q31_t)0x801e3895, (q31_t)0x051a8e5c, (q31_t)0x801a0ef8,
-  (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x0451a177, (q31_t)0x8012a86f, (q31_t)0x03ed26e6, (q31_t)0x800f6b88, (q31_t)0x0388a9ea, (q31_t)0x800c7d8c,
-  (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x02bfa9a4, (q31_t)0x80078e5e, (q31_t)0x025b26d7, (q31_t)0x80058d2f, (q31_t)0x01f6a297, (q31_t)0x8003daf1,
-  (q31_t)0x01921d20, (q31_t)0x800277a6, (q31_t)0x012d96b1, (q31_t)0x8001634e, (q31_t)0x00c90f88, (q31_t)0x80009dea, (q31_t)0x006487e3, (q31_t)0x8000277a
-};
-    const q31_t cos_factorsQ31_512[512] = {
-  (q31_t)0x7ffff621, (q31_t)0x7fffa72c, (q31_t)0x7fff0943, (q31_t)0x7ffe1c65, (q31_t)0x7ffce093, (q31_t)0x7ffb55ce,
-  (q31_t)0x7ff97c18, (q31_t)0x7ff75370,
-  (q31_t)0x7ff4dbd9, (q31_t)0x7ff21553, (q31_t)0x7feeffe1, (q31_t)0x7feb9b85, (q31_t)0x7fe7e841, (q31_t)0x7fe3e616,
-  (q31_t)0x7fdf9508, (q31_t)0x7fdaf519,
-  (q31_t)0x7fd6064c, (q31_t)0x7fd0c8a3, (q31_t)0x7fcb3c23, (q31_t)0x7fc560cf, (q31_t)0x7fbf36aa, (q31_t)0x7fb8bdb8,
-  (q31_t)0x7fb1f5fc, (q31_t)0x7faadf7c,
-  (q31_t)0x7fa37a3c, (q31_t)0x7f9bc640, (q31_t)0x7f93c38c, (q31_t)0x7f8b7227, (q31_t)0x7f82d214, (q31_t)0x7f79e35a,
-  (q31_t)0x7f70a5fe, (q31_t)0x7f671a05,
-  (q31_t)0x7f5d3f75, (q31_t)0x7f531655, (q31_t)0x7f489eaa, (q31_t)0x7f3dd87c, (q31_t)0x7f32c3d1, (q31_t)0x7f2760af,
-  (q31_t)0x7f1baf1e, (q31_t)0x7f0faf25,
-  (q31_t)0x7f0360cb, (q31_t)0x7ef6c418, (q31_t)0x7ee9d914, (q31_t)0x7edc9fc6, (q31_t)0x7ecf1837, (q31_t)0x7ec14270,
-  (q31_t)0x7eb31e78, (q31_t)0x7ea4ac58,
-  (q31_t)0x7e95ec1a, (q31_t)0x7e86ddc6, (q31_t)0x7e778166, (q31_t)0x7e67d703, (q31_t)0x7e57dea7, (q31_t)0x7e47985b,
-  (q31_t)0x7e37042a, (q31_t)0x7e26221f,
-  (q31_t)0x7e14f242, (q31_t)0x7e0374a0, (q31_t)0x7df1a942, (q31_t)0x7ddf9034, (q31_t)0x7dcd2981, (q31_t)0x7dba7534,
-  (q31_t)0x7da77359, (q31_t)0x7d9423fc,
-  (q31_t)0x7d808728, (q31_t)0x7d6c9ce9, (q31_t)0x7d58654d, (q31_t)0x7d43e05e, (q31_t)0x7d2f0e2b, (q31_t)0x7d19eebf,
-  (q31_t)0x7d048228, (q31_t)0x7ceec873,
-  (q31_t)0x7cd8c1ae, (q31_t)0x7cc26de5, (q31_t)0x7cabcd28, (q31_t)0x7c94df83, (q31_t)0x7c7da505, (q31_t)0x7c661dbc,
-  (q31_t)0x7c4e49b7, (q31_t)0x7c362904,
-  (q31_t)0x7c1dbbb3, (q31_t)0x7c0501d2, (q31_t)0x7bebfb70, (q31_t)0x7bd2a89e, (q31_t)0x7bb9096b, (q31_t)0x7b9f1de6,
-  (q31_t)0x7b84e61f, (q31_t)0x7b6a6227,
-  (q31_t)0x7b4f920e, (q31_t)0x7b3475e5, (q31_t)0x7b190dbc, (q31_t)0x7afd59a4, (q31_t)0x7ae159ae, (q31_t)0x7ac50dec,
-  (q31_t)0x7aa8766f, (q31_t)0x7a8b9348,
-  (q31_t)0x7a6e648a, (q31_t)0x7a50ea47, (q31_t)0x7a332490, (q31_t)0x7a151378, (q31_t)0x79f6b711, (q31_t)0x79d80f6f,
-  (q31_t)0x79b91ca4, (q31_t)0x7999dec4,
-  (q31_t)0x797a55e0, (q31_t)0x795a820e, (q31_t)0x793a6361, (q31_t)0x7919f9ec, (q31_t)0x78f945c3, (q31_t)0x78d846fb,
-  (q31_t)0x78b6fda8, (q31_t)0x789569df,
-  (q31_t)0x78738bb3, (q31_t)0x7851633b, (q31_t)0x782ef08b, (q31_t)0x780c33b8, (q31_t)0x77e92cd9, (q31_t)0x77c5dc01,
-  (q31_t)0x77a24148, (q31_t)0x777e5cc3,
-  (q31_t)0x775a2e89, (q31_t)0x7735b6af, (q31_t)0x7710f54c, (q31_t)0x76ebea77, (q31_t)0x76c69647, (q31_t)0x76a0f8d2,
-  (q31_t)0x767b1231, (q31_t)0x7654e279,
-  (q31_t)0x762e69c4, (q31_t)0x7607a828, (q31_t)0x75e09dbd, (q31_t)0x75b94a9c, (q31_t)0x7591aedd, (q31_t)0x7569ca99,
-  (q31_t)0x75419de7, (q31_t)0x751928e0,
-  (q31_t)0x74f06b9e, (q31_t)0x74c7663a, (q31_t)0x749e18cd, (q31_t)0x74748371, (q31_t)0x744aa63f, (q31_t)0x74208150,
-  (q31_t)0x73f614c0, (q31_t)0x73cb60a8,
-  (q31_t)0x73a06522, (q31_t)0x73752249, (q31_t)0x73499838, (q31_t)0x731dc70a, (q31_t)0x72f1aed9, (q31_t)0x72c54fc1,
-  (q31_t)0x7298a9dd, (q31_t)0x726bbd48,
-  (q31_t)0x723e8a20, (q31_t)0x7211107e, (q31_t)0x71e35080, (q31_t)0x71b54a41, (q31_t)0x7186fdde, (q31_t)0x71586b74,
-  (q31_t)0x7129931f, (q31_t)0x70fa74fc,
-  (q31_t)0x70cb1128, (q31_t)0x709b67c0, (q31_t)0x706b78e3, (q31_t)0x703b44ad, (q31_t)0x700acb3c, (q31_t)0x6fda0cae,
-  (q31_t)0x6fa90921, (q31_t)0x6f77c0b3,
-  (q31_t)0x6f463383, (q31_t)0x6f1461b0, (q31_t)0x6ee24b57, (q31_t)0x6eaff099, (q31_t)0x6e7d5193, (q31_t)0x6e4a6e66,
-  (q31_t)0x6e174730, (q31_t)0x6de3dc11,
-  (q31_t)0x6db02d29, (q31_t)0x6d7c3a98, (q31_t)0x6d48047e, (q31_t)0x6d138afb, (q31_t)0x6cdece2f, (q31_t)0x6ca9ce3b,
-  (q31_t)0x6c748b3f, (q31_t)0x6c3f055d,
-  (q31_t)0x6c093cb6, (q31_t)0x6bd3316a, (q31_t)0x6b9ce39b, (q31_t)0x6b66536b, (q31_t)0x6b2f80fb, (q31_t)0x6af86c6c,
-  (q31_t)0x6ac115e2, (q31_t)0x6a897d7d,
-  (q31_t)0x6a51a361, (q31_t)0x6a1987b0, (q31_t)0x69e12a8c, (q31_t)0x69a88c19, (q31_t)0x696fac78, (q31_t)0x69368bce,
-  (q31_t)0x68fd2a3d, (q31_t)0x68c387e9,
-  (q31_t)0x6889a4f6, (q31_t)0x684f8186, (q31_t)0x68151dbe, (q31_t)0x67da79c3, (q31_t)0x679f95b7, (q31_t)0x676471c0,
-  (q31_t)0x67290e02, (q31_t)0x66ed6aa1,
-  (q31_t)0x66b187c3, (q31_t)0x6675658c, (q31_t)0x66390422, (q31_t)0x65fc63a9, (q31_t)0x65bf8447, (q31_t)0x65826622,
-  (q31_t)0x6545095f, (q31_t)0x65076e25,
-  (q31_t)0x64c99498, (q31_t)0x648b7ce0, (q31_t)0x644d2722, (q31_t)0x640e9386, (q31_t)0x63cfc231, (q31_t)0x6390b34a,
-  (q31_t)0x635166f9, (q31_t)0x6311dd64,
-  (q31_t)0x62d216b3, (q31_t)0x6292130c, (q31_t)0x6251d298, (q31_t)0x6211557e, (q31_t)0x61d09be5, (q31_t)0x618fa5f7,
-  (q31_t)0x614e73da, (q31_t)0x610d05b7,
-  (q31_t)0x60cb5bb7, (q31_t)0x60897601, (q31_t)0x604754bf, (q31_t)0x6004f819, (q31_t)0x5fc26038, (q31_t)0x5f7f8d46,
-  (q31_t)0x5f3c7f6b, (q31_t)0x5ef936d1,
-  (q31_t)0x5eb5b3a2, (q31_t)0x5e71f606, (q31_t)0x5e2dfe29, (q31_t)0x5de9cc33, (q31_t)0x5da5604f, (q31_t)0x5d60baa7,
-  (q31_t)0x5d1bdb65, (q31_t)0x5cd6c2b5,
-  (q31_t)0x5c9170bf, (q31_t)0x5c4be5b0, (q31_t)0x5c0621b2, (q31_t)0x5bc024f0, (q31_t)0x5b79ef96, (q31_t)0x5b3381ce,
-  (q31_t)0x5aecdbc5, (q31_t)0x5aa5fda5,
-  (q31_t)0x5a5ee79a, (q31_t)0x5a1799d1, (q31_t)0x59d01475, (q31_t)0x598857b2, (q31_t)0x594063b5, (q31_t)0x58f838a9,
-  (q31_t)0x58afd6bd, (q31_t)0x58673e1b,
-  (q31_t)0x581e6ef1, (q31_t)0x57d5696d, (q31_t)0x578c2dba, (q31_t)0x5742bc06, (q31_t)0x56f9147e, (q31_t)0x56af3750,
-  (q31_t)0x566524aa, (q31_t)0x561adcb9,
-  (q31_t)0x55d05faa, (q31_t)0x5585adad, (q31_t)0x553ac6ee, (q31_t)0x54efab9c, (q31_t)0x54a45be6, (q31_t)0x5458d7f9,
-  (q31_t)0x540d2005, (q31_t)0x53c13439,
-  (q31_t)0x537514c2, (q31_t)0x5328c1d0, (q31_t)0x52dc3b92, (q31_t)0x528f8238, (q31_t)0x524295f0, (q31_t)0x51f576ea,
-  (q31_t)0x51a82555, (q31_t)0x515aa162,
-  (q31_t)0x510ceb40, (q31_t)0x50bf031f, (q31_t)0x5070e92f, (q31_t)0x50229da1, (q31_t)0x4fd420a4, (q31_t)0x4f857269,
-  (q31_t)0x4f369320, (q31_t)0x4ee782fb,
-  (q31_t)0x4e984229, (q31_t)0x4e48d0dd, (q31_t)0x4df92f46, (q31_t)0x4da95d96, (q31_t)0x4d595bfe, (q31_t)0x4d092ab0,
-  (q31_t)0x4cb8c9dd, (q31_t)0x4c6839b7,
-  (q31_t)0x4c177a6e, (q31_t)0x4bc68c36, (q31_t)0x4b756f40, (q31_t)0x4b2423be, (q31_t)0x4ad2a9e2, (q31_t)0x4a8101de,
-  (q31_t)0x4a2f2be6, (q31_t)0x49dd282a,
-  (q31_t)0x498af6df, (q31_t)0x49389836, (q31_t)0x48e60c62, (q31_t)0x48935397, (q31_t)0x48406e08, (q31_t)0x47ed5be6,
-  (q31_t)0x479a1d67, (q31_t)0x4746b2bc,
-  (q31_t)0x46f31c1a, (q31_t)0x469f59b4, (q31_t)0x464b6bbe, (q31_t)0x45f7526b, (q31_t)0x45a30df0, (q31_t)0x454e9e80,
-  (q31_t)0x44fa0450, (q31_t)0x44a53f93,
-  (q31_t)0x4450507e, (q31_t)0x43fb3746, (q31_t)0x43a5f41e, (q31_t)0x4350873c, (q31_t)0x42faf0d4, (q31_t)0x42a5311b,
-  (q31_t)0x424f4845, (q31_t)0x41f93689,
-  (q31_t)0x41a2fc1a, (q31_t)0x414c992f, (q31_t)0x40f60dfb, (q31_t)0x409f5ab6, (q31_t)0x40487f94, (q31_t)0x3ff17cca,
-  (q31_t)0x3f9a5290, (q31_t)0x3f430119,
-  (q31_t)0x3eeb889c, (q31_t)0x3e93e950, (q31_t)0x3e3c2369, (q31_t)0x3de4371f, (q31_t)0x3d8c24a8, (q31_t)0x3d33ec39,
-  (q31_t)0x3cdb8e09, (q31_t)0x3c830a50,
-  (q31_t)0x3c2a6142, (q31_t)0x3bd19318, (q31_t)0x3b78a007, (q31_t)0x3b1f8848, (q31_t)0x3ac64c0f, (q31_t)0x3a6ceb96,
-  (q31_t)0x3a136712, (q31_t)0x39b9bebc,
-  (q31_t)0x395ff2c9, (q31_t)0x39060373, (q31_t)0x38abf0ef, (q31_t)0x3851bb77, (q31_t)0x37f76341, (q31_t)0x379ce885,
-  (q31_t)0x37424b7b, (q31_t)0x36e78c5b,
-  (q31_t)0x368cab5c, (q31_t)0x3631a8b8, (q31_t)0x35d684a6, (q31_t)0x357b3f5d, (q31_t)0x351fd918, (q31_t)0x34c4520d,
-  (q31_t)0x3468aa76, (q31_t)0x340ce28b,
-  (q31_t)0x33b0fa84, (q31_t)0x3354f29b, (q31_t)0x32f8cb07, (q31_t)0x329c8402, (q31_t)0x32401dc6, (q31_t)0x31e39889,
-  (q31_t)0x3186f487, (q31_t)0x312a31f8,
-  (q31_t)0x30cd5115, (q31_t)0x30705217, (q31_t)0x30133539, (q31_t)0x2fb5fab2, (q31_t)0x2f58a2be, (q31_t)0x2efb2d95,
-  (q31_t)0x2e9d9b70, (q31_t)0x2e3fec8b,
-  (q31_t)0x2de2211e, (q31_t)0x2d843964, (q31_t)0x2d263596, (q31_t)0x2cc815ee, (q31_t)0x2c69daa6, (q31_t)0x2c0b83fa,
-  (q31_t)0x2bad1221, (q31_t)0x2b4e8558,
-  (q31_t)0x2aefddd8, (q31_t)0x2a911bdc, (q31_t)0x2a323f9e, (q31_t)0x29d34958, (q31_t)0x29743946, (q31_t)0x29150fa1,
-  (q31_t)0x28b5cca5, (q31_t)0x2856708d,
-  (q31_t)0x27f6fb92, (q31_t)0x27976df1, (q31_t)0x2737c7e3, (q31_t)0x26d809a5, (q31_t)0x26783370, (q31_t)0x26184581,
-  (q31_t)0x25b84012, (q31_t)0x2558235f,
-  (q31_t)0x24f7efa2, (q31_t)0x2497a517, (q31_t)0x243743fa, (q31_t)0x23d6cc87, (q31_t)0x23763ef7, (q31_t)0x23159b88,
-  (q31_t)0x22b4e274, (q31_t)0x225413f8,
-  (q31_t)0x21f3304f, (q31_t)0x219237b5, (q31_t)0x21312a65, (q31_t)0x20d0089c, (q31_t)0x206ed295, (q31_t)0x200d888d,
-  (q31_t)0x1fac2abf, (q31_t)0x1f4ab968,
-  (q31_t)0x1ee934c3, (q31_t)0x1e879d0d, (q31_t)0x1e25f282, (q31_t)0x1dc4355e, (q31_t)0x1d6265dd, (q31_t)0x1d00843d,
-  (q31_t)0x1c9e90b8, (q31_t)0x1c3c8b8c,
-  (q31_t)0x1bda74f6, (q31_t)0x1b784d30, (q31_t)0x1b161479, (q31_t)0x1ab3cb0d, (q31_t)0x1a517128, (q31_t)0x19ef0707,
-  (q31_t)0x198c8ce7, (q31_t)0x192a0304,
-  (q31_t)0x18c7699b, (q31_t)0x1864c0ea, (q31_t)0x1802092c, (q31_t)0x179f429f, (q31_t)0x173c6d80, (q31_t)0x16d98a0c,
-  (q31_t)0x1676987f, (q31_t)0x16139918,
-  (q31_t)0x15b08c12, (q31_t)0x154d71aa, (q31_t)0x14ea4a1f, (q31_t)0x148715ae, (q31_t)0x1423d492, (q31_t)0x13c0870a,
-  (q31_t)0x135d2d53, (q31_t)0x12f9c7aa,
-  (q31_t)0x1296564d, (q31_t)0x1232d979, (q31_t)0x11cf516a, (q31_t)0x116bbe60, (q31_t)0x11082096, (q31_t)0x10a4784b,
-  (q31_t)0x1040c5bb, (q31_t)0xfdd0926,
-  (q31_t)0xf7942c7, (q31_t)0xf1572dc, (q31_t)0xeb199a4, (q31_t)0xe4db75b, (q31_t)0xde9cc40, (q31_t)0xd85d88f, (q31_t)0xd21dc87,
-  (q31_t)0xcbdd865,
-  (q31_t)0xc59cc68, (q31_t)0xbf5b8cb, (q31_t)0xb919dcf, (q31_t)0xb2d7baf, (q31_t)0xac952aa, (q31_t)0xa6522fe, (q31_t)0xa00ece8,
-  (q31_t)0x99cb0a7,
-  (q31_t)0x9386e78, (q31_t)0x8d42699, (q31_t)0x86fd947, (q31_t)0x80b86c2, (q31_t)0x7a72f45, (q31_t)0x742d311, (q31_t)0x6de7262,
-  (q31_t)0x67a0d76,
-  (q31_t)0x615a48b, (q31_t)0x5b137df, (q31_t)0x54cc7b1, (q31_t)0x4e8543e, (q31_t)0x483ddc3, (q31_t)0x41f6480, (q31_t)0x3bae8b2,
-  (q31_t)0x3566a96,
-  (q31_t)0x2f1ea6c, (q31_t)0x28d6870, (q31_t)0x228e4e2, (q31_t)0x1c45ffe, (q31_t)0x15fda03, (q31_t)0xfb5330, (q31_t)0x96cbc1,
-  (q31_t)0x3243f5
-};
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) 
-    const q31_t WeightsQ31_2048[4096] = {
-  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7fffe9cb, (q31_t)0xffb49a12,
-  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff8719, (q31_t)0xff501258,
-  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a,
-  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffdd4d7, (q31_t)0xfe870467,
-  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffc8549, (q31_t)0xfe227eac,
-  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18,
-  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff8f954, (q31_t)0xfd5976e9,
-  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c,
-  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4319d, (q31_t)0xfc9075af,
-  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1575d, (q31_t)0xfc2bf821,
-  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0,
-  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feab61a, (q31_t)0xfb630459,
-  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b,
-  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3,
-  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fde7471, (q31_t)0xfa35ac9f,
-  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed,
-  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fcf6ce8, (q31_t)0xf908750a,
-  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574,
-  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc3dda9, (q31_t)0xf83fba68,
-  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423,
-  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb7132b, (q31_t)0xf77712e5,
-  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb037bf, (q31_t)0xf712c6ea,
-  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071,
-  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8,
-  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc,
-  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f91b694, (q31_t)0xf581d07b,
-  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f895182, (q31_t)0xf51da273,
-  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f809dc5, (q31_t)0xf4b97b21,
-  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f779b62, (q31_t)0xf4555ac5,
-  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a,
-  (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0,
-  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5abc8a, (q31_t)0xf32925d3,
-  (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1, (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f507fc7, (q31_t)0xf2c523b2,
-  (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f45f47b, (q31_t)0xf26129ba,
-  (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f409164, (q31_t)0xf22f2fe1, (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829,
-  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f2ff263, (q31_t)0xf1994f3d,
-  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f247ba5, (q31_t)0xf1356f32,
-  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f18b679, (q31_t)0xf0d19848,
-  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba,
-  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f0040f6, (q31_t)0xf00a06c8,
-  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef390ae, (q31_t)0xefa64cae,
-  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee69217, (q31_t)0xef429caa,
-  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7ed94538, (q31_t)0xeedef6f9,
-  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9,
-  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88,
-  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eaf8943, (q31_t)0xedb44642,
-  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea1039b, (q31_t)0xed50cc46,
-  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e922fd6, (q31_t)0xeced5dd0,
-  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e830dff, (q31_t)0xec89fb1e,
-  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e739e1d, (q31_t)0xec26a46d,
-  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e63e03b, (q31_t)0xebc359fb,
-  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e53d462, (q31_t)0xeb601c04,
-  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e437a9c, (q31_t)0xeafceac6,
-  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e32d2f4, (q31_t)0xea99c67e,
-  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e21dd73, (q31_t)0xea36af69,
-  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5,
-  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7dff0911, (q31_t)0xe970a9ce,
-  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2,
-  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7ddafdce, (q31_t)0xe8aadbde,
-  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dc883b4, (q31_t)0xe8480a5d,
-  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db5bc02, (q31_t)0xe7e5477f,
-  (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da2a6c6, (q31_t)0xe782937e,
-  (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d8f4409, (q31_t)0xe71fee99,
-  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7b93da, (q31_t)0xe6bd590d,
-  (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d679642, (q31_t)0xe65ad315,
-  (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d534b50, (q31_t)0xe5f85cef,
-  (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7,
-  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d29cd8c, (q31_t)0xe533a10a,
-  (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6,
-  (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7cff1af5, (q31_t)0xe46f2745,
-  (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6,
-  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd333f3, (q31_t)0xe3aaf184,
-  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cbcccec, (q31_t)0xe348f0bd,
-  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7ca618f3, (q31_t)0xe2e701ac,
-  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c8f1817, (q31_t)0xe285248d,
-  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c77ca65, (q31_t)0xe223599e,
-  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c602fec, (q31_t)0xe1c1a11b,
-  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f,
-  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c3014de, (q31_t)0xe0fe6848,
-  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c179467, (q31_t)0xe09ce871,
-  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7bfec765, (q31_t)0xe03b7bf6,
-  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7be5ade6, (q31_t)0xdfda2314,
-  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bcc47fa, (q31_t)0xdf78de07,
-  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a,
-  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b989719, (q31_t)0xdeb69059,
-  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b7e4c45, (q31_t)0xde558831,
-  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b63b543, (q31_t)0xddf494ce,
-  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b48d225, (q31_t)0xdd93b66a,
-  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43,
-  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1227d3, (q31_t)0xdcd23993,
-  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7af660c2, (q31_t)0xdc719b96,
-  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7ada4dd8, (q31_t)0xdc111388,
-  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4,
-  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa144bc, (q31_t)0xdb504626,
-  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a844eae, (q31_t)0xdaf00149,
-  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a670d0d, (q31_t)0xda8fd349,
-  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a497feb, (q31_t)0xda2fbc61,
-  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd,
-  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7,
-  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79ef1436, (q31_t)0xd910048a,
-  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d059c8, (q31_t)0xd8b04c52,
-  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b15435, (q31_t)0xd850ac5a,
-  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x79920392, (q31_t)0xd7f124dd,
-  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x797267f2, (q31_t)0xd791b616,
-  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79528167, (q31_t)0xd732603f,
-  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79325006, (q31_t)0xd6d32393,
-  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7911d3e2, (q31_t)0xd674004e,
-  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f10d0f, (q31_t)0xd614f6a9,
-  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78cffba3, (q31_t)0xd5b606e0,
-  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78ae9fb0, (q31_t)0xd557312d,
-  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x788cf94c, (q31_t)0xd4f875ca,
-  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x786b088c, (q31_t)0xd499d4f2,
-  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x7848cd83, (q31_t)0xd43b4ee0,
-  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x78264849, (q31_t)0xd3dce3cd,
-  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780378f1, (q31_t)0xd37e93f4,
-  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e05f91, (q31_t)0xd3205f8f,
-  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8,
-  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77994f11, (q31_t)0xd2644a0a,
-  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x7775581d, (q31_t)0xd206695d,
-  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x77511778, (q31_t)0xd1a8a50d,
-  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x772c8d3a, (q31_t)0xd14afd52,
-  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x7707b979, (q31_t)0xd0ed7267,
-  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e29c4b, (q31_t)0xd0900486,
-  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76bd35c7, (q31_t)0xd032b3e7,
-  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x76978605, (q31_t)0xcfd580c6,
-  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x76718d1c, (q31_t)0xcf786b5a,
-  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x764b4b23, (q31_t)0xcf1b73de,
-  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x7624c031, (q31_t)0xcebe9a8a,
-  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x75fdec60, (q31_t)0xce61df99,
-  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75d6cfc5, (q31_t)0xce054343,
-  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1,
-  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x7587bc98, (q31_t)0xcd4c674d,
-  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x755fc635, (q31_t)0xccf0281f,
-  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x7537876c, (q31_t)0xcc940871,
-  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x750f0054, (q31_t)0xcc38087b,
-  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74e63108, (q31_t)0xcbdc2876,
-  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74bd199f, (q31_t)0xcb80689a,
-  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x7493ba34, (q31_t)0xcb24c921,
-  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x746a12df, (q31_t)0xcac94a42,
-  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x744023bc, (q31_t)0xca6dec37,
-  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x7415ece2, (q31_t)0xca12af37,
-  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a,
-  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c0a878, (q31_t)0xc95c993a,
-  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x73959b1b, (q31_t)0xc901c0ae,
-  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x736a4671, (q31_t)0xc8a70a0e,
-  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x733eaa96, (q31_t)0xc84c7593,
-  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x7312c7a5, (q31_t)0xc7f20373,
-  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72e69db7, (q31_t)0xc797b3e7,
-  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72ba2cea, (q31_t)0xc73d8727,
-  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x728d7557, (q31_t)0xc6e37d69,
-  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7260771b, (q31_t)0xc68996e7,
-  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x72333251, (q31_t)0xc62fd3d6,
-  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x7205a716, (q31_t)0xc5d6346f,
-  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71d7d585, (q31_t)0xc57cb8e9,
-  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71a9bdba, (q31_t)0xc523617a,
-  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b,
-  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x714cbbeb, (q31_t)0xc4711fc2,
-  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x711dd220, (q31_t)0xc41835e6,
-  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70eea28e, (q31_t)0xc3bf70fd,
-  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70bf2d53, (q31_t)0xc366d140,
-  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x708f728b, (q31_t)0xc30e56e4,
-  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x705f7255, (q31_t)0xc2b6021f,
-  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x702f2ccd, (q31_t)0xc25dd329,
-  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x6ffea212, (q31_t)0xc205ca38,
-  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fcdd241, (q31_t)0xc1ade781,
-  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d,
-  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f,
-  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f39c57d, (q31_t)0xc0a726df,
-  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f07e285, (q31_t)0xc04fdf32,
-  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6ed5bb10, (q31_t)0xbff8bece,
-  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea,
-  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba,
-  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e3daaf8, (q31_t)0xbef44b74,
-  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e,
-  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c,
-  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6da336dc, (q31_t)0xbdf14135,
-  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad,
-  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a,
-  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d066215, (q31_t)0xbcefa5b0,
-  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5,
-  (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c,
-  (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c67300b, (q31_t)0xbbef7e7c,
-  (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c319975, (q31_t)0xbb9a6fc7,
-  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6bfbc021, (q31_t)0xbb458b43,
-  (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bc5a431, (q31_t)0xbaf0d125,
-  (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0,
-  (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b58a503, (q31_t)0xba47dce8,
-  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b21c208, (q31_t)0xb9f3a332,
-  (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2,
-  (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6ab335f4, (q31_t)0xb94bb19b,
-  (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21,
-  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a43a29a, (q31_t)0xb8a46e78,
-  (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a2794c1, (q31_t)0xb87ab922, (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a0b7689, (q31_t)0xb8510ed4,
-  (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69ef47f6, (q31_t)0xb8276f93, (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69d3090e, (q31_t)0xb7fddb67,
-  (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69b6b9d3, (q31_t)0xb7d45255, (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x699a5a4c, (q31_t)0xb7aad465,
-  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x697dea7b, (q31_t)0xb781619c, (q31_t)0x696fac78, (q31_t)0xb76cac69, (q31_t)0x69616a65, (q31_t)0xb757fa01,
-  (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x6944da10, (q31_t)0xb72e9d9b, (q31_t)0x69368bce, (q31_t)0xb719f39e, (q31_t)0x6928397e, (q31_t)0xb7054c6f,
-  (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x690b88b5, (q31_t)0xb6dc0685, (q31_t)0x68fd2a3d, (q31_t)0xb6c767ca, (q31_t)0x68eec7b9, (q31_t)0xb6b2cbe2,
-  (q31_t)0x68e06129, (q31_t)0xb69e32cd, (q31_t)0x68d1f68f, (q31_t)0xb6899c8d, (q31_t)0x68c387e9, (q31_t)0xb6750921, (q31_t)0x68b5153a, (q31_t)0xb660788c,
-  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x689823bf, (q31_t)0xb6375fe5, (q31_t)0x6889a4f6, (q31_t)0xb622d7d6, (q31_t)0x687b2224, (q31_t)0xb60e529f,
-  (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x685e106c, (q31_t)0xb5e550c1, (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x6840ee9b, (q31_t)0xb5bc5a50,
-  (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x6823bcb7, (q31_t)0xb5936f53, (q31_t)0x68151dbe, (q31_t)0xb57efe22, (q31_t)0x68067ac3, (q31_t)0xb56a8fd0,
-  (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67e928c5, (q31_t)0xb541bbcd, (q31_t)0x67da79c3, (q31_t)0xb52d561e, (q31_t)0x67cbc6c0, (q31_t)0xb518f351,
-  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67ae54ba, (q31_t)0xb4f03663, (q31_t)0x679f95b7, (q31_t)0xb4dbdc42, (q31_t)0x6790d2b6, (q31_t)0xb4c78507,
-  (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x677340ba, (q31_t)0xb49edf45, (q31_t)0x676471c0, (q31_t)0xb48a90c0, (q31_t)0x67559eca, (q31_t)0xb4764523,
-  (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x6737ecea, (q31_t)0xb44db6a8, (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x671a2b20, (q31_t)0xb42533d8,
-  (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x66fc596f, (q31_t)0xb3fcbcbb, (q31_t)0x66ed6aa1, (q31_t)0xb3e88592, (q31_t)0x66de77dc, (q31_t)0xb3d45157,
-  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66c0866d, (q31_t)0xb3abf1b2, (q31_t)0x66b187c3, (q31_t)0xb397c649, (q31_t)0x66a28524, (q31_t)0xb3839dd3,
-  (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x66847408, (q31_t)0xb35b55bf, (q31_t)0x6675658c, (q31_t)0xb3473623, (q31_t)0x6666531d, (q31_t)0xb333197c,
-  (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x66482267, (q31_t)0xb30ae912, (q31_t)0x66390422, (q31_t)0xb2f6d550, (q31_t)0x6629e1ec, (q31_t)0xb2e2c486,
-  (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5, (q31_t)0x660b91af, (q31_t)0xb2baabde, (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65ed31b5, (q31_t)0xb2929f21,
-  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65cec204, (q31_t)0xb26a9e54, (q31_t)0x65bf8447, (q31_t)0xb256a26a, (q31_t)0x65b0429f, (q31_t)0xb242a97e,
-  (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x6591b38c, (q31_t)0xb21ac0a6, (q31_t)0x65826622, (q31_t)0xb206d0ba, (q31_t)0x657314cf, (q31_t)0xb1f2e3d0,
-  (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x6554666d, (q31_t)0xb1cb1304, (q31_t)0x6545095f, (q31_t)0xb1b72f23, (q31_t)0x6535a86b, (q31_t)0xb1a34e47,
-  (q31_t)0x6526438f, (q31_t)0xb18f7071, (q31_t)0x6516dacd, (q31_t)0xb17b95a0, (q31_t)0x65076e25, (q31_t)0xb167bdd7, (q31_t)0x64f7fd98, (q31_t)0xb153e915,
-  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64d910d1, (q31_t)0xb12c48ab, (q31_t)0x64c99498, (q31_t)0xb1187d05, (q31_t)0x64ba147d, (q31_t)0xb104b46a,
-  (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x649b08a0, (q31_t)0xb0dd2c56, (q31_t)0x648b7ce0, (q31_t)0xb0c96ce0, (q31_t)0x647bed3f, (q31_t)0xb0b5b077,
-  (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x645cc260, (q31_t)0xb08e40d2, (q31_t)0x644d2722, (q31_t)0xb07a8d97, (q31_t)0x643d8806, (q31_t)0xb066dd6d,
-  (q31_t)0x642de50d, (q31_t)0xb0533055, (q31_t)0x641e3e38, (q31_t)0xb03f864f, (q31_t)0x640e9386, (q31_t)0xb02bdf5c, (q31_t)0x63fee4f8, (q31_t)0xb0183b7d,
-  (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63df7c4d, (q31_t)0xaff0fcfe, (q31_t)0x63cfc231, (q31_t)0xafdd625f, (q31_t)0x63c0043b, (q31_t)0xafc9cad7,
-  (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x63a07cc7, (q31_t)0xafa2a50f, (q31_t)0x6390b34a, (q31_t)0xaf8f16d1, (q31_t)0x6380e5f6, (q31_t)0xaf7b8bac,
-  (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x63613fcd, (q31_t)0xaf547eb3, (q31_t)0x635166f9, (q31_t)0xaf40fce1, (q31_t)0x63418a50, (q31_t)0xaf2d7e2b,
-  (q31_t)0x6331a9d4, (q31_t)0xaf1a0293, (q31_t)0x6321c585, (q31_t)0xaf068a1a, (q31_t)0x6311dd64, (q31_t)0xaef314c0, (q31_t)0x6301f171, (q31_t)0xaedfa285,
-  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62e20e17, (q31_t)0xaeb8c774, (q31_t)0x62d216b3, (q31_t)0xaea55e9e, (q31_t)0x62c21b7e, (q31_t)0xae91f8eb,
-  (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x62a219aa, (q31_t)0xae6b36f0, (q31_t)0x6292130c, (q31_t)0xae57daab, (q31_t)0x628208a1, (q31_t)0xae44818b,
-  (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x6261e866, (q31_t)0xae1dd8c0, (q31_t)0x6251d298, (q31_t)0xae0a8916, (q31_t)0x6241b8ff, (q31_t)0xadf73c96,
-  (q31_t)0x62319b9d, (q31_t)0xade3f33e, (q31_t)0x62217a72, (q31_t)0xadd0ad12, (q31_t)0x6211557e, (q31_t)0xadbd6a10, (q31_t)0x62012cc2, (q31_t)0xadaa2a3b,
-  (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61e0cff5, (q31_t)0xad83b416, (q31_t)0x61d09be5, (q31_t)0xad707dc8, (q31_t)0x61c06410, (q31_t)0xad5d4aaa,
-  (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x619fe918, (q31_t)0xad36edfc, (q31_t)0x618fa5f7, (q31_t)0xad23c46e, (q31_t)0x617f5f12, (q31_t)0xad109e12,
-  (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x615ec603, (q31_t)0xacea5af2, (q31_t)0x614e73da, (q31_t)0xacd73e30, (q31_t)0x613e1df0, (q31_t)0xacc424a3,
-  (q31_t)0x612dc447, (q31_t)0xacb10e4b, (q31_t)0x611d66de, (q31_t)0xac9dfb29, (q31_t)0x610d05b7, (q31_t)0xac8aeb3e, (q31_t)0x60fca0d2, (q31_t)0xac77de8b,
-  (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60dbcbd1, (q31_t)0xac51cecf, (q31_t)0x60cb5bb7, (q31_t)0xac3ecbc7, (q31_t)0x60bae7e1, (q31_t)0xac2bcbfa,
-  (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x6099f505, (q31_t)0xac05d613, (q31_t)0x60897601, (q31_t)0xabf2dffb, (q31_t)0x6078f344, (q31_t)0xabdfed1f,
-  (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x6057e2a2, (q31_t)0xabba1125, (q31_t)0x604754bf, (q31_t)0xaba72807, (q31_t)0x6036c325, (q31_t)0xab944229,
-  (q31_t)0x60262dd6, (q31_t)0xab815f8d, (q31_t)0x601594d1, (q31_t)0xab6e8032, (q31_t)0x6004f819, (q31_t)0xab5ba41a, (q31_t)0x5ff457ad, (q31_t)0xab48cb46,
-  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fd30bbc, (q31_t)0xab23236a, (q31_t)0x5fc26038, (q31_t)0xab105464, (q31_t)0x5fb1b104, (q31_t)0xaafd88a4,
-  (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f90478a, (q31_t)0xaad7fafb, (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f6ecf53, (q31_t)0xaab27a73,
-  (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f4d4865, (q31_t)0xaa8d0713, (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0,
-  (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f0a0e77, (q31_t)0xaa4247e1, (q31_t)0x5ef936d1, (q31_t)0xaa2fa056, (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a,
-  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92, (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e,
-  (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e82eae5, (q31_t)0xa9ad6855, (q31_t)0x5e71f606, (q31_t)0xa99adb56, (q31_t)0x5e60fd84, (q31_t)0xa98851ac,
-  (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e3f0194, (q31_t)0xa9634858, (q31_t)0x5e2dfe29, (q31_t)0xa950c8b0, (q31_t)0x5e1cf71c, (q31_t)0xa93e4c5f,
-  (q31_t)0x5e0bec6e, (q31_t)0xa92bd367, (q31_t)0x5dfade20, (q31_t)0xa9195dc7, (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97,
-  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2, (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5d943c4e, (q31_t)0xa8aae280,
-  (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d71e979, (q31_t)0xa88629a5, (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d4f883b, (q31_t)0xa8617e48,
-  (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d2d189a, (q31_t)0xa83ce06e, (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d0a9a9a, (q31_t)0xa818501c,
-  (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59, (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cc57394, (q31_t)0xa7cf582a,
-  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5ca2ca99, (q31_t)0xa7aaf094, (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c801354, (q31_t)0xa786969e,
-  (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c5d4dcc, (q31_t)0xa7624a4d, (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c3a7a05, (q31_t)0xa73e0ba5,
-  (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5c179806, (q31_t)0xa719daae, (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5bf4a7d2, (q31_t)0xa6f5b76d,
-  (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2, (q31_t)0x5bd1a971, (q31_t)0xa6d1a1e7, (q31_t)0x5bc024f0, (q31_t)0xa6bf9c4b, (q31_t)0x5bae9ce7, (q31_t)0xa6ad9a21,
-  (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b8b8239, (q31_t)0xa689a022, (q31_t)0x5b79ef96, (q31_t)0xa677a84e, (q31_t)0x5b68596d, (q31_t)0xa665b3ee,
-  (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b452288, (q31_t)0xa641d58c, (q31_t)0x5b3381ce, (q31_t)0xa62feb8b, (q31_t)0x5b21dd90, (q31_t)0xa61e0501,
-  (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5afe8a8b, (q31_t)0xa5fa4252, (q31_t)0x5aecdbc5, (q31_t)0xa5e8662f, (q31_t)0x5adb297d, (q31_t)0xa5d68d85,
-  (q31_t)0x5ac973b5, (q31_t)0xa5c4b855, (q31_t)0x5ab7ba6c, (q31_t)0xa5b2e6a0, (q31_t)0x5aa5fda5, (q31_t)0xa5a11866, (q31_t)0x5a943d5e, (q31_t)0xa58f4da8,
-  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a70b258, (q31_t)0xa56bc2a2, (q31_t)0x5a5ee79a, (q31_t)0xa55a025b, (q31_t)0x5a4d1960, (q31_t)0xa5484594,
-  (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x5a29727b, (q31_t)0xa524d683, (q31_t)0x5a1799d1, (q31_t)0xa513243b, (q31_t)0x5a05bdae, (q31_t)0xa5017575,
-  (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59e1faff, (q31_t)0xa4de2270, (q31_t)0x59d01475, (q31_t)0xa4cc7e32, (q31_t)0x59be2a74, (q31_t)0xa4badd78,
-  (q31_t)0x59ac3cfd, (q31_t)0xa4a94043, (q31_t)0x599a4c12, (q31_t)0xa497a693, (q31_t)0x598857b2, (q31_t)0xa486106a, (q31_t)0x59765fde, (q31_t)0xa4747dc7,
-  (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x595265df, (q31_t)0xa4516319, (q31_t)0x594063b5, (q31_t)0xa43fdb10, (q31_t)0x592e5e19, (q31_t)0xa42e568f,
-  (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x590a4893, (q31_t)0xa40b582e, (q31_t)0x58f838a9, (q31_t)0xa3f9de4e, (q31_t)0x58e62552, (q31_t)0xa3e867fa,
-  (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x58c1f45b, (q31_t)0xa3c585fb, (q31_t)0x58afd6bd, (q31_t)0xa3b41a50, (q31_t)0x589db5b3, (q31_t)0xa3a2b234,
-  (q31_t)0x588b9140, (q31_t)0xa3914da8, (q31_t)0x58796962, (q31_t)0xa37fecac, (q31_t)0x58673e1b, (q31_t)0xa36e8f41, (q31_t)0x58550f6c, (q31_t)0xa35d3567,
-  (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x5830a7d6, (q31_t)0xa33a8c6c, (q31_t)0x581e6ef1, (q31_t)0xa3293d4b, (q31_t)0x580c32a7, (q31_t)0xa317f1bf,
-  (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57e7afe4, (q31_t)0xa2f56566, (q31_t)0x57d5696d, (q31_t)0xa2e4249b, (q31_t)0x57c31f92, (q31_t)0xa2d2e766,
-  (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x579e81b8, (q31_t)0xa2b077c5, (q31_t)0x578c2dba, (q31_t)0xa29f4559, (q31_t)0x5779d65b, (q31_t)0xa28e1687,
-  (q31_t)0x57677b9d, (q31_t)0xa27ceb4f, (q31_t)0x57551d80, (q31_t)0xa26bc3b2, (q31_t)0x5742bc06, (q31_t)0xa25a9fb1, (q31_t)0x5730572e, (q31_t)0xa2497f4c,
-  (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x570b8369, (q31_t)0xa2274959, (q31_t)0x56f9147e, (q31_t)0xa21633cd, (q31_t)0x56e6a239, (q31_t)0xa20521e0,
-  (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x56c1b3a1, (q31_t)0xa1e308e4, (q31_t)0x56af3750, (q31_t)0xa1d201d7, (q31_t)0x569cb7a8, (q31_t)0xa1c0fe6c,
-  (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x5677ae54, (q31_t)0xa19f027c, (q31_t)0x566524aa, (q31_t)0xa18e09fa, (q31_t)0x565297ab, (q31_t)0xa17d151b,
-  (q31_t)0x56400758, (q31_t)0xa16c23e1, (q31_t)0x562d73b2, (q31_t)0xa15b364d, (q31_t)0x561adcb9, (q31_t)0xa14a4c5e, (q31_t)0x5608426e, (q31_t)0xa1396617,
-  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55e303e6, (q31_t)0xa117a47e, (q31_t)0x55d05faa, (q31_t)0xa106c92f, (q31_t)0x55bdb81f, (q31_t)0xa0f5f189,
-  (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x55985f20, (q31_t)0xa0d44d3b, (q31_t)0x5585adad, (q31_t)0xa0c38095, (q31_t)0x5572f8ed, (q31_t)0xa0b2b79b,
-  (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x554d858d, (q31_t)0xa09130ad, (q31_t)0x553ac6ee, (q31_t)0xa08072ba, (q31_t)0x55280505, (q31_t)0xa06fb876,
-  (q31_t)0x55153fd4, (q31_t)0xa05f01e1, (q31_t)0x5502775c, (q31_t)0xa04e4efc, (q31_t)0x54efab9c, (q31_t)0xa03d9fc8, (q31_t)0x54dcdc96, (q31_t)0xa02cf444,
-  (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x54b734ba, (q31_t)0xa00ba853, (q31_t)0x54a45be6, (q31_t)0x9ffb07e7, (q31_t)0x54917fce, (q31_t)0x9fea6b2f,
-  (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x546bbdd7, (q31_t)0x9fc93cdb, (q31_t)0x5458d7f9, (q31_t)0x9fb8ab41, (q31_t)0x5445eedb, (q31_t)0x9fa81d5e,
-  (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x542012e1, (q31_t)0x9f870cbc, (q31_t)0x540d2005, (q31_t)0x9f7689ff, (q31_t)0x53fa29ed, (q31_t)0x9f660afb,
-  (q31_t)0x53e73097, (q31_t)0x9f558fb0, (q31_t)0x53d43406, (q31_t)0x9f45181f, (q31_t)0x53c13439, (q31_t)0x9f34a449, (q31_t)0x53ae3131, (q31_t)0x9f24342f,
-  (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x53882175, (q31_t)0x9f035f2e, (q31_t)0x537514c2, (q31_t)0x9ef2fa49, (q31_t)0x536204d7, (q31_t)0x9ee29922,
-  (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x533bdb5d, (q31_t)0x9ec1e210, (q31_t)0x5328c1d0, (q31_t)0x9eb18c26, (q31_t)0x5315a50e, (q31_t)0x9ea139fd,
-  (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52ef61ee, (q31_t)0x9e80a0ee, (q31_t)0x52dc3b92, (q31_t)0x9e705a09, (q31_t)0x52c91204, (q31_t)0x9e6016e8,
-  (q31_t)0x52b5e546, (q31_t)0x9e4fd78a, (q31_t)0x52a2b556, (q31_t)0x9e3f9bf0, (q31_t)0x528f8238, (q31_t)0x9e2f641b, (q31_t)0x527c4bea, (q31_t)0x9e1f300b,
-  (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x5255d5c5, (q31_t)0x9dfed33e, (q31_t)0x524295f0, (q31_t)0x9deeaa82, (q31_t)0x522f52ee, (q31_t)0x9dde858e,
-  (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x5208c36a, (q31_t)0x9dbe4701, (q31_t)0x51f576ea, (q31_t)0x9dae2d68, (q31_t)0x51e22740, (q31_t)0x9d9e179a,
-  (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x51bb7e75, (q31_t)0x9d7df75f, (q31_t)0x51a82555, (q31_t)0x9d6decf4, (q31_t)0x5194c910, (q31_t)0x9d5de656,
-  (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x516e0715, (q31_t)0x9d3de482, (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5147388c, (q31_t)0x9d1df1e9,
-  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f, (q31_t)0x510ceb40, (q31_t)0x9cee229c, (q31_t)0x50f975e6, (q31_t)0x9cde3a7b,
-  (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x50d281d5, (q31_t)0x9cbe75b0, (q31_t)0x50bf031f, (q31_t)0x9cae9907, (q31_t)0x50ab814d, (q31_t)0x9c9ec033,
-  (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x50847454, (q31_t)0x9c7f1a0a, (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x505d5af1, (q31_t)0x9c5f8339,
-  (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x50363529, (q31_t)0x9c3ffbc5, (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x500f0302, (q31_t)0x9c2083b3,
-  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4fe7c483, (q31_t)0x9c011b08, (q31_t)0x4fd420a4, (q31_t)0x9bf16c7a, (q31_t)0x4fc079b1, (q31_t)0x9be1c1c8,
-  (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4f992293, (q31_t)0x9bc277fa, (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f71bf2e, (q31_t)0x9ba33da0,
-  (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1, (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f22d3aa, (q31_t)0x9b64f760,
-  (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f,
-  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4eac16eb, (q31_t)0x9b080268, (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e846a60, (q31_t)0x9ae92533,
-  (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795, (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e34ecfc, (q31_t)0x9aab9993,
-  (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74,
-  (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4d9561ac, (q31_t)0x9a313dfc,
-  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d455422, (q31_t)0x99f46e51,
-  (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4cf516ee, (q31_t)0x99b7dd99,
-  (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8,
-  (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c540e4e, (q31_t)0x993f7993,
-  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c034345, (q31_t)0x9903a691,
-  (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bb24958, (q31_t)0x98c81316,
-  (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b6120bb, (q31_t)0x988cbf46,
-  (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b0fc99d, (q31_t)0x9851ab46,
-  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4abe4433, (q31_t)0x9816d73b,
-  (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a6c90ad, (q31_t)0x97dc4349,
-  (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94,
-  (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49c8a01b, (q31_t)0x9767dc41,
-  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x49766373, (q31_t)0x972e0971,
-  (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x4923f97b, (q31_t)0x96f4774b,
-  (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48d16265, (q31_t)0x96bb25f0,
-  (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x487e9e64, (q31_t)0x96821585,
-  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x48552b9b, (q31_t)0x9665a5b4, (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x482badab, (q31_t)0x9649462d,
-  (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x48022499, (q31_t)0x962cf6f2, (q31_t)0x47ed5be6, (q31_t)0x961ed574, (q31_t)0x47d8906d, (q31_t)0x9610b80a,
-  (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47aef12c, (q31_t)0x95f48977, (q31_t)0x479a1d67, (q31_t)0x95e67850, (q31_t)0x478546de, (q31_t)0x95d86b3f,
-  (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x475b9188, (q31_t)0x95bc5d66, (q31_t)0x4746b2bc, (q31_t)0x95ae5c9f, (q31_t)0x4731d131, (q31_t)0x95a05ff0,
-  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x470805df, (q31_t)0x958472e2, (q31_t)0x46f31c1a, (q31_t)0x95768283, (q31_t)0x46de2f99, (q31_t)0x9568963f,
-  (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46b44e65, (q31_t)0x954cca0c, (q31_t)0x469f59b4, (q31_t)0x953eea1e, (q31_t)0x468a624a, (q31_t)0x95310e4e,
-  (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x46606b4e, (q31_t)0x95156308, (q31_t)0x464b6bbe, (q31_t)0x95079394, (q31_t)0x46366978, (q31_t)0x94f9c83f,
-  (q31_t)0x4621647d, (q31_t)0x94ec010b, (q31_t)0x460c5cce, (q31_t)0x94de3df8, (q31_t)0x45f7526b, (q31_t)0x94d07f05, (q31_t)0x45e24556, (q31_t)0x94c2c435,
-  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x45b82318, (q31_t)0x94a75afd, (q31_t)0x45a30df0, (q31_t)0x9499ac95, (q31_t)0x458df619, (q31_t)0x948c0252,
-  (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x4563be60, (q31_t)0x9470ba39, (q31_t)0x454e9e80, (q31_t)0x94631c65, (q31_t)0x45397bf4, (q31_t)0x945582b7,
-  (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x450f2edb, (q31_t)0x943a5bcf, (q31_t)0x44fa0450, (q31_t)0x942cce96, (q31_t)0x44e4d71c, (q31_t)0x941f4585,
-  (q31_t)0x44cfa740, (q31_t)0x9411c09e, (q31_t)0x44ba74bd, (q31_t)0x94043fdf, (q31_t)0x44a53f93, (q31_t)0x93f6c34a, (q31_t)0x449007c4, (q31_t)0x93e94adf,
-  (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x44659039, (q31_t)0x93ce668b, (q31_t)0x4450507e, (q31_t)0x93c0faa3, (q31_t)0x443b0e21, (q31_t)0x93b392e6,
-  (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x44108184, (q31_t)0x9398cff5, (q31_t)0x43fb3746, (q31_t)0x938b74c1, (q31_t)0x43e5ea68, (q31_t)0x937e1dbb,
-  (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x43bb48d4, (q31_t)0x93637c3d, (q31_t)0x43a5f41e, (q31_t)0x935631c5, (q31_t)0x43909ccd, (q31_t)0x9348eb7e,
-  (q31_t)0x437b42e1, (q31_t)0x933ba968, (q31_t)0x4365e65b, (q31_t)0x932e6b84, (q31_t)0x4350873c, (q31_t)0x932131d1, (q31_t)0x433b2585, (q31_t)0x9313fc51,
-  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x43105a50, (q31_t)0x92f99deb, (q31_t)0x42faf0d4, (q31_t)0x92ec7505, (q31_t)0x42e584c3, (q31_t)0x92df5054,
-  (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x42baa4e6, (q31_t)0x92c51392, (q31_t)0x42a5311b, (q31_t)0x92b7fb82, (q31_t)0x428fbabe, (q31_t)0x92aae7a8,
-  (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x4264c653, (q31_t)0x9290cc9b, (q31_t)0x424f4845, (q31_t)0x9283c568, (q31_t)0x4239c7aa, (q31_t)0x9276c26d,
-  (q31_t)0x42244481, (q31_t)0x9269c3ac, (q31_t)0x420ebecb, (q31_t)0x925cc924, (q31_t)0x41f93689, (q31_t)0x924fd2d7, (q31_t)0x41e3abbc, (q31_t)0x9242e0c4,
-  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x41b88e84, (q31_t)0x9229094f, (q31_t)0x41a2fc1a, (q31_t)0x921c23ef, (q31_t)0x418d6729, (q31_t)0x920f42cb,
-  (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x416235b2, (q31_t)0x91f58d3b, (q31_t)0x414c992f, (q31_t)0x91e8b8d0, (q31_t)0x4136fa27, (q31_t)0x91dbe8a4,
-  (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x410bb48c, (q31_t)0x91c25508, (q31_t)0x40f60dfb, (q31_t)0x91b5919a, (q31_t)0x40e064ea, (q31_t)0x91a8d26d,
-  (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40b50b46, (q31_t)0x918f60d6, (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4089a7a8, (q31_t)0x91760047,
-  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x405e3a16, (q31_t)0x915cb0c3, (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x4032c297, (q31_t)0x91437250,
-  (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fdbb5ec, (q31_t)0x911128a8,
-  (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fb020ce, (q31_t)0x90f81d7b, (q31_t)0x3f9a5290, (q31_t)0x90eb9e50, (q31_t)0x3f8481dd, (q31_t)0x90df236e,
-  (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4, (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f430119, (q31_t)0x90b9cc7d, (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0,
-  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ed5a46b, (q31_t)0x907be6be,
-  (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e7dfb73, (q31_t)0x904aaf86,
-  (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e52187f, (q31_t)0x90322dbf, (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e262bee, (q31_t)0x9019bd36,
-  (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3dce3614, (q31_t)0x8fe90fec,
-  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7,
-  (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d1dd835, (q31_t)0x8f8884e4,
-  (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cc5709e, (q31_t)0x8f58a761,
-  (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c,
-  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c143130, (q31_t)0x8ef9bcf2,
-  (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bbb59c7, (q31_t)0x8ecab040,
-  (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b625d86, (q31_t)0x8e9be963,
-  (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b093ca3, (q31_t)0x8e6d6877,
-  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b,
-  (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a568dd4, (q31_t)0x8e1138ea,
-  (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x39fd0056, (q31_t)0x8de38a80,
-  (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39a34f13, (q31_t)0x8db6227a,
-  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x39497a43, (q31_t)0x8d8900f3,
-  (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x38ef821c, (q31_t)0x8d5c2609,
-  (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x389566d6, (q31_t)0x8d2f91d5,
-  (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x383b28a9, (q31_t)0x8d034474,
-  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01,
-  (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37864477, (q31_t)0x8cab7e98,
-  (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x372b9ee3, (q31_t)0x8c800652,
-  (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5, (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36d0d746, (q31_t)0x8c54d54c,
-  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36a366c6, (q31_t)0x8c3f5788, (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3675edd9, (q31_t)0x8c29eb9f,
-  (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36486c86, (q31_t)0x8c149192, (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x361ae2d3, (q31_t)0x8bff4966,
-  (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35ed50c9, (q31_t)0x8bea131e, (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc,
-  (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x359213c9, (q31_t)0x8bbfdc44, (q31_t)0x357b3f5d, (q31_t)0x8bb559c1, (q31_t)0x356468e2, (q31_t)0x8baadbba,
-  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x3536b5be, (q31_t)0x8b95ed21, (q31_t)0x351fd918, (q31_t)0x8b8b7c8f, (q31_t)0x3508fa66, (q31_t)0x8b81107b,
-  (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34db36df, (q31_t)0x8b6c45cc, (q31_t)0x34c4520d, (q31_t)0x8b61e733, (q31_t)0x34ad6b32, (q31_t)0x8b578d18,
-  (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x347f9766, (q31_t)0x8b42e661, (q31_t)0x3468aa76, (q31_t)0x8b3899c6, (q31_t)0x3451bb81, (q31_t)0x8b2e51ab,
-  (q31_t)0x343aca87, (q31_t)0x8b240e11, (q31_t)0x3423d78a, (q31_t)0x8b19cef8, (q31_t)0x340ce28b, (q31_t)0x8b0f9462, (q31_t)0x33f5eb89, (q31_t)0x8b055e4d,
-  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x33c7f785, (q31_t)0x8af0ffac, (q31_t)0x33b0fa84, (q31_t)0x8ae6d720, (q31_t)0x3399fb85, (q31_t)0x8adcb318,
-  (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x336bf78f, (q31_t)0x8ac87894, (q31_t)0x3354f29b, (q31_t)0x8abe6219, (q31_t)0x333debab, (q31_t)0x8ab45024,
-  (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x330fd7e1, (q31_t)0x8aa039cb, (q31_t)0x32f8cb07, (q31_t)0x8a963567, (q31_t)0x32e1bc36, (q31_t)0x8a8c358b,
-  (q31_t)0x32caab6f, (q31_t)0x8a823a36, (q31_t)0x32b398b3, (q31_t)0x8a784368, (q31_t)0x329c8402, (q31_t)0x8a6e5123, (q31_t)0x32856d5e, (q31_t)0x8a646365,
-  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x32573a3f, (q31_t)0x8a509585, (q31_t)0x32401dc6, (q31_t)0x8a46b564, (q31_t)0x3228ff5c, (q31_t)0x8a3cd9cc,
-  (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31fabcbd, (q31_t)0x8a29303b, (q31_t)0x31e39889, (q31_t)0x8a1f6243, (q31_t)0x31cc7269, (q31_t)0x8a1598d6,
-  (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x319e2067, (q31_t)0x8a0213a0, (q31_t)0x3186f487, (q31_t)0x89f857d8, (q31_t)0x316fc6be, (q31_t)0x89eea09d,
-  (q31_t)0x3158970e, (q31_t)0x89e4edef, (q31_t)0x31416576, (q31_t)0x89db3fcf, (q31_t)0x312a31f8, (q31_t)0x89d1963c, (q31_t)0x3112fc95, (q31_t)0x89c7f138,
-  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30e48c22, (q31_t)0x89b4b4dd, (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30b61426, (q31_t)0x89a18ac0,
-  (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x30590dab, (q31_t)0x897b6d4c,
-  (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x2ffbe95d, (q31_t)0x895598f3,
-  (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2f9ea775, (q31_t)0x89300dce,
-  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f41482e, (q31_t)0x890acbf2,
-  (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378,
-  (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e863267, (q31_t)0x88c12475,
-  (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e287c5a, (q31_t)0x889cbf01,
-  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2dcaa9d5, (q31_t)0x8878a332,
-  (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d6cbb10, (q31_t)0x8854d11e,
-  (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d0eb046, (q31_t)0x883148db,
-  (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cb089b1, (q31_t)0x880e0a7f,
-  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c52478a, (q31_t)0x87eb1621,
-  (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5,
-  (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2b957173, (q31_t)0x87a60bb1,
-  (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca,
-  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ad82fd2, (q31_t)0x87622a35,
-  (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a796740, (q31_t)0x8740a907,
-  (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a1a847b, (q31_t)0x871f7255,
-  (q31_t)0x2a02c7b8, (q31_t)0x8717304e, (q31_t)0x29eb0957, (q31_t)0x870ef2f1, (q31_t)0x29d34958, (q31_t)0x8706ba3d, (q31_t)0x29bb87bc, (q31_t)0x86fe8633,
-  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x298bffb2, (q31_t)0x86ee2c1e, (q31_t)0x29743946, (q31_t)0x86e60614, (q31_t)0x295c7140, (q31_t)0x86dde4b5,
-  (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x292cdc6d, (q31_t)0x86cdaffa, (q31_t)0x29150fa1, (q31_t)0x86c59c9f, (q31_t)0x28fd4140, (q31_t)0x86bd8df0,
-  (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x28cd9fc1, (q31_t)0x86ad7e99, (q31_t)0x28b5cca5, (q31_t)0x86a57df2, (q31_t)0x289df7f8, (q31_t)0x869d81f8,
-  (q31_t)0x288621b9, (q31_t)0x86958aac, (q31_t)0x286e49ea, (q31_t)0x868d980e, (q31_t)0x2856708d, (q31_t)0x8685aa20, (q31_t)0x283e95a1, (q31_t)0x867dc0e0,
-  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x280edb23, (q31_t)0x866dfc6e, (q31_t)0x27f6fb92, (q31_t)0x8666213c, (q31_t)0x27df1a77, (q31_t)0x865e4abb,
-  (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27af53a6, (q31_t)0x864eabcb, (q31_t)0x27976df1, (q31_t)0x8646e35c, (q31_t)0x277f86b5, (q31_t)0x863f1f9e,
-  (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x274fb3ae, (q31_t)0x862fa638, (q31_t)0x2737c7e3, (q31_t)0x8627f091, (q31_t)0x271fda96, (q31_t)0x86203f9c,
-  (q31_t)0x2707ebc7, (q31_t)0x86189359, (q31_t)0x26effb76, (q31_t)0x8610ebca, (q31_t)0x26d809a5, (q31_t)0x860948ef, (q31_t)0x26c01655, (q31_t)0x8601aac7,
-  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26902b39, (q31_t)0x85f27c93, (q31_t)0x26783370, (q31_t)0x85eaec88, (q31_t)0x26603a2c, (q31_t)0x85e36132,
-  (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x26304333, (q31_t)0x85d458a6, (q31_t)0x26184581, (q31_t)0x85ccdb70, (q31_t)0x26004657, (q31_t)0x85c562f1,
-  (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x25d0439f, (q31_t)0x85b68015, (q31_t)0x25b84012, (q31_t)0x85af15b9, (q31_t)0x25a03b11, (q31_t)0x85a7b015,
-  (q31_t)0x2588349d, (q31_t)0x85a04f28, (q31_t)0x25702cb7, (q31_t)0x8598f2f3, (q31_t)0x2558235f, (q31_t)0x85919b76, (q31_t)0x25401896, (q31_t)0x858a48b1,
-  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x250ffeb7, (q31_t)0x857bb152, (q31_t)0x24f7efa2, (q31_t)0x85746cb8, (q31_t)0x24dfdf20, (q31_t)0x856d2cd7,
-  (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24afb9da, (q31_t)0x855ebb44, (q31_t)0x2497a517, (q31_t)0x85578991, (q31_t)0x247f8eec, (q31_t)0x85505c99,
-  (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x244f5e5c, (q31_t)0x854210db, (q31_t)0x243743fa, (q31_t)0x853af214, (q31_t)0x241f2833, (q31_t)0x8533d809,
-  (q31_t)0x24070b08, (q31_t)0x852cc2bb, (q31_t)0x23eeec78, (q31_t)0x8525b228, (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23beab33, (q31_t)0x85179f39,
-  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x238e646a, (q31_t)0x85099f3e, (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x235e1826, (q31_t)0x84fbb239,
-  (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x232dc66d, (q31_t)0x84edd82d, (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x22fd6f48, (q31_t)0x84e0111b,
-  (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22cd12bd, (q31_t)0x84d25d06, (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0,
-  (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x226c4996, (q31_t)0x84b72ddb, (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x223bdd08, (q31_t)0x84a9b2ca,
-  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21daf41d, (q31_t)0x848ef5b7,
-  (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x2179f64f, (q31_t)0x847484ca,
-  (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x2118e3dc, (q31_t)0x845a6012,
-  (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20b7bcfe, (q31_t)0x844087a0,
-  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x205681f1, (q31_t)0x8426fb84,
-  (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x1ff532f2, (q31_t)0x840dbbcc,
-  (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1f93d03c, (q31_t)0x83f4c889,
-  (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f325a0b, (q31_t)0x83dc21cb,
-  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0,
-  (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e6f342c, (q31_t)0x83abba17,
-  (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e0d84f5, (q31_t)0x8393f940,
-  (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dabc334, (q31_t)0x837c8528,
-  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d49ef26, (q31_t)0x83655ddf,
-  (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1ce80906, (q31_t)0x834e8373,
-  (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c861113, (q31_t)0x8337f5f1,
-  (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c240786, (q31_t)0x8321b568,
-  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6,
-  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b5fc097, (q31_t)0x82f61b77,
-  (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1afd83ad, (q31_t)0x82e0c22a,
-  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1a9b361d, (q31_t)0x82cbb60b,
-  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a38d823, (q31_t)0x82b6f727,
-  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19d669fc, (q31_t)0x82a2858c,
-  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x1973ebe6, (q31_t)0x828e6146,
-  (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x19115e1c, (q31_t)0x827a8a61,
-  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18aec0db, (q31_t)0x826700e9,
-  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x184c1461, (q31_t)0x8253c4eb,
-  (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17e958ea, (q31_t)0x8240d673,
-  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x17868eb3, (q31_t)0x822e358b,
-  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x1723b5f9, (q31_t)0x821be240,
-  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16c0cef9, (q31_t)0x8209dc9e,
-  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x165dd9f0, (q31_t)0x81f824ae,
-  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x15fad71b, (q31_t)0x81e6ba7c,
-  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x1597c6b7, (q31_t)0x81d59e13,
-  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x1534a901, (q31_t)0x81c4cf7d,
-  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14d17e36, (q31_t)0x81b44ec4,
-  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x146e4694, (q31_t)0x81a41bf4,
-  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x140b0258, (q31_t)0x81943715,
-  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13a7b1bf, (q31_t)0x8184a032,
-  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x13445505, (q31_t)0x81755754,
-  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12e0ec6a, (q31_t)0x81665c84,
-  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x127d7829, (q31_t)0x8157afcd,
-  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x1219f880, (q31_t)0x81495136,
-  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11b66dad, (q31_t)0x813b40ca,
-  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x1152d7ed, (q31_t)0x812d7e8f,
-  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x10ef377d, (q31_t)0x81200a90,
-  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x108b8c9b, (q31_t)0x8112e4d4,
-  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x1027d784, (q31_t)0x81060d63,
-  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfc41876, (q31_t)0x80f98446,
-  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf604faf, (q31_t)0x80ed4984,
-  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xefc7d6b, (q31_t)0x80e15d24,
-  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e,
-  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe34bd66, (q31_t)0x80ca6fa9,
-  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c,
-  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd6cda53, (q31_t)0x80b4bc0e,
-  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd08dc3f, (q31_t)0x80aa5806,
-  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xca4d620, (q31_t)0x80a04289,
-  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc40c835, (q31_t)0x80967b9f,
-  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbdcb2bb, (q31_t)0x808d034c,
-  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb7895f0, (q31_t)0x8083d998,
-  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb147211, (q31_t)0x807afe87,
-  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xab0475c, (q31_t)0x8072721f,
-  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa4c1610, (q31_t)0x806a3466,
-  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9e7de6a, (q31_t)0x80624560,
-  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x983a0a7, (q31_t)0x805aa512,
-  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x91f5d06, (q31_t)0x80535381,
-  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8bb13c5, (q31_t)0x804c50b2,
-  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x856c520, (q31_t)0x80459ca9,
-  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x7f27157, (q31_t)0x803f376a,
-  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x78e18a7, (q31_t)0x803920f8,
-  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x729bb4e, (q31_t)0x80335959,
-  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6c5598a, (q31_t)0x802de08e,
-  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x660f398, (q31_t)0x8028b69c,
-  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x5fc89b8, (q31_t)0x8023db86,
-  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5981c26, (q31_t)0x801f4f4f,
-  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x533ab20, (q31_t)0x801b11fa,
-  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4cf36e5, (q31_t)0x80172388,
-  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x46abfb3, (q31_t)0x801383fe,
-  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x40645c7, (q31_t)0x8010335c,
-  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3a1c960, (q31_t)0x800d31a5,
-  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x33d4abb, (q31_t)0x800a7edb,
-  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2d8ca16, (q31_t)0x80081b00,
-  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x27447b0, (q31_t)0x80060614,
-  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x20fc3c6, (q31_t)0x8004401a,
-  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1ab3e97, (q31_t)0x8002c912,
-  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x146b860, (q31_t)0x8001a0fd,
-  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc,
-  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf,
-  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278
-};
-     const q31_t cos_factorsQ31_2048[2048] = {
-  (q31_t)0x7fffff62, (q31_t)0x7ffffa73, (q31_t)0x7ffff094, (q31_t)0x7fffe1c6, (q31_t)0x7fffce09, (q31_t)0x7fffb55c,
-  (q31_t)0x7fff97c1, (q31_t)0x7fff7536,
-  (q31_t)0x7fff4dbb, (q31_t)0x7fff2151, (q31_t)0x7ffeeff8, (q31_t)0x7ffeb9b0, (q31_t)0x7ffe7e79, (q31_t)0x7ffe3e52,
-  (q31_t)0x7ffdf93c, (q31_t)0x7ffdaf37,
-  (q31_t)0x7ffd6042, (q31_t)0x7ffd0c5f, (q31_t)0x7ffcb38c, (q31_t)0x7ffc55ca, (q31_t)0x7ffbf319, (q31_t)0x7ffb8b78,
-  (q31_t)0x7ffb1ee9, (q31_t)0x7ffaad6a,
-  (q31_t)0x7ffa36fc, (q31_t)0x7ff9bba0, (q31_t)0x7ff93b54, (q31_t)0x7ff8b619, (q31_t)0x7ff82bef, (q31_t)0x7ff79cd6,
-  (q31_t)0x7ff708ce, (q31_t)0x7ff66fd7,
-  (q31_t)0x7ff5d1f1, (q31_t)0x7ff52f1d, (q31_t)0x7ff48759, (q31_t)0x7ff3daa6, (q31_t)0x7ff32905, (q31_t)0x7ff27275,
-  (q31_t)0x7ff1b6f6, (q31_t)0x7ff0f688,
-  (q31_t)0x7ff0312c, (q31_t)0x7fef66e1, (q31_t)0x7fee97a7, (q31_t)0x7fedc37e, (q31_t)0x7fecea67, (q31_t)0x7fec0c62,
-  (q31_t)0x7feb296d, (q31_t)0x7fea418b,
-  (q31_t)0x7fe954ba, (q31_t)0x7fe862fa, (q31_t)0x7fe76c4c, (q31_t)0x7fe670b0, (q31_t)0x7fe57025, (q31_t)0x7fe46aac,
-  (q31_t)0x7fe36045, (q31_t)0x7fe250ef,
-  (q31_t)0x7fe13cac, (q31_t)0x7fe0237a, (q31_t)0x7fdf055a, (q31_t)0x7fdde24d, (q31_t)0x7fdcba51, (q31_t)0x7fdb8d67,
-  (q31_t)0x7fda5b8f, (q31_t)0x7fd924ca,
-  (q31_t)0x7fd7e917, (q31_t)0x7fd6a875, (q31_t)0x7fd562e7, (q31_t)0x7fd4186a, (q31_t)0x7fd2c900, (q31_t)0x7fd174a8,
-  (q31_t)0x7fd01b63, (q31_t)0x7fcebd31,
-  (q31_t)0x7fcd5a11, (q31_t)0x7fcbf203, (q31_t)0x7fca8508, (q31_t)0x7fc91320, (q31_t)0x7fc79c4b, (q31_t)0x7fc62089,
-  (q31_t)0x7fc49fda, (q31_t)0x7fc31a3d,
-  (q31_t)0x7fc18fb4, (q31_t)0x7fc0003e, (q31_t)0x7fbe6bdb, (q31_t)0x7fbcd28b, (q31_t)0x7fbb344e, (q31_t)0x7fb99125,
-  (q31_t)0x7fb7e90f, (q31_t)0x7fb63c0d,
-  (q31_t)0x7fb48a1e, (q31_t)0x7fb2d343, (q31_t)0x7fb1177b, (q31_t)0x7faf56c7, (q31_t)0x7fad9127, (q31_t)0x7fabc69b,
-  (q31_t)0x7fa9f723, (q31_t)0x7fa822bf,
-  (q31_t)0x7fa6496e, (q31_t)0x7fa46b32, (q31_t)0x7fa2880b, (q31_t)0x7fa09ff7, (q31_t)0x7f9eb2f8, (q31_t)0x7f9cc10d,
-  (q31_t)0x7f9aca37, (q31_t)0x7f98ce76,
-  (q31_t)0x7f96cdc9, (q31_t)0x7f94c831, (q31_t)0x7f92bdad, (q31_t)0x7f90ae3f, (q31_t)0x7f8e99e6, (q31_t)0x7f8c80a1,
-  (q31_t)0x7f8a6272, (q31_t)0x7f883f58,
-  (q31_t)0x7f861753, (q31_t)0x7f83ea64, (q31_t)0x7f81b88a, (q31_t)0x7f7f81c6, (q31_t)0x7f7d4617, (q31_t)0x7f7b057e,
-  (q31_t)0x7f78bffb, (q31_t)0x7f76758e,
-  (q31_t)0x7f742637, (q31_t)0x7f71d1f6, (q31_t)0x7f6f78cb, (q31_t)0x7f6d1ab6, (q31_t)0x7f6ab7b8, (q31_t)0x7f684fd0,
-  (q31_t)0x7f65e2ff, (q31_t)0x7f637144,
-  (q31_t)0x7f60faa0, (q31_t)0x7f5e7f13, (q31_t)0x7f5bfe9d, (q31_t)0x7f59793e, (q31_t)0x7f56eef5, (q31_t)0x7f545fc5,
-  (q31_t)0x7f51cbab, (q31_t)0x7f4f32a9,
-  (q31_t)0x7f4c94be, (q31_t)0x7f49f1eb, (q31_t)0x7f474a30, (q31_t)0x7f449d8c, (q31_t)0x7f41ec01, (q31_t)0x7f3f358d,
-  (q31_t)0x7f3c7a31, (q31_t)0x7f39b9ee,
-  (q31_t)0x7f36f4c3, (q31_t)0x7f342ab1, (q31_t)0x7f315bb7, (q31_t)0x7f2e87d6, (q31_t)0x7f2baf0d, (q31_t)0x7f28d15d,
-  (q31_t)0x7f25eec7, (q31_t)0x7f230749,
-  (q31_t)0x7f201ae5, (q31_t)0x7f1d299a, (q31_t)0x7f1a3368, (q31_t)0x7f173850, (q31_t)0x7f143852, (q31_t)0x7f11336d,
-  (q31_t)0x7f0e29a3, (q31_t)0x7f0b1af2,
-  (q31_t)0x7f08075c, (q31_t)0x7f04eedf, (q31_t)0x7f01d17d, (q31_t)0x7efeaf36, (q31_t)0x7efb8809, (q31_t)0x7ef85bf7,
-  (q31_t)0x7ef52b00, (q31_t)0x7ef1f524,
-  (q31_t)0x7eeeba62, (q31_t)0x7eeb7abc, (q31_t)0x7ee83632, (q31_t)0x7ee4ecc3, (q31_t)0x7ee19e6f, (q31_t)0x7ede4b38,
-  (q31_t)0x7edaf31c, (q31_t)0x7ed7961c,
-  (q31_t)0x7ed43438, (q31_t)0x7ed0cd70, (q31_t)0x7ecd61c5, (q31_t)0x7ec9f137, (q31_t)0x7ec67bc5, (q31_t)0x7ec3016f,
-  (q31_t)0x7ebf8237, (q31_t)0x7ebbfe1c,
-  (q31_t)0x7eb8751e, (q31_t)0x7eb4e73d, (q31_t)0x7eb1547a, (q31_t)0x7eadbcd4, (q31_t)0x7eaa204c, (q31_t)0x7ea67ee2,
-  (q31_t)0x7ea2d896, (q31_t)0x7e9f2d68,
-  (q31_t)0x7e9b7d58, (q31_t)0x7e97c867, (q31_t)0x7e940e94, (q31_t)0x7e904fe0, (q31_t)0x7e8c8c4b, (q31_t)0x7e88c3d5,
-  (q31_t)0x7e84f67e, (q31_t)0x7e812447,
-  (q31_t)0x7e7d4d2f, (q31_t)0x7e797136, (q31_t)0x7e75905d, (q31_t)0x7e71aaa4, (q31_t)0x7e6dc00c, (q31_t)0x7e69d093,
-  (q31_t)0x7e65dc3b, (q31_t)0x7e61e303,
-  (q31_t)0x7e5de4ec, (q31_t)0x7e59e1f5, (q31_t)0x7e55da20, (q31_t)0x7e51cd6c, (q31_t)0x7e4dbbd9, (q31_t)0x7e49a567,
-  (q31_t)0x7e458a17, (q31_t)0x7e4169e9,
-  (q31_t)0x7e3d44dd, (q31_t)0x7e391af3, (q31_t)0x7e34ec2b, (q31_t)0x7e30b885, (q31_t)0x7e2c8002, (q31_t)0x7e2842a2,
-  (q31_t)0x7e240064, (q31_t)0x7e1fb94a,
-  (q31_t)0x7e1b6d53, (q31_t)0x7e171c7f, (q31_t)0x7e12c6ce, (q31_t)0x7e0e6c42, (q31_t)0x7e0a0cd9, (q31_t)0x7e05a894,
-  (q31_t)0x7e013f74, (q31_t)0x7dfcd178,
-  (q31_t)0x7df85ea0, (q31_t)0x7df3e6ee, (q31_t)0x7def6a60, (q31_t)0x7deae8f7, (q31_t)0x7de662b3, (q31_t)0x7de1d795,
-  (q31_t)0x7ddd479d, (q31_t)0x7dd8b2ca,
-  (q31_t)0x7dd4191d, (q31_t)0x7dcf7a96, (q31_t)0x7dcad736, (q31_t)0x7dc62efc, (q31_t)0x7dc181e8, (q31_t)0x7dbccffc,
-  (q31_t)0x7db81936, (q31_t)0x7db35d98,
-  (q31_t)0x7dae9d21, (q31_t)0x7da9d7d2, (q31_t)0x7da50dab, (q31_t)0x7da03eab, (q31_t)0x7d9b6ad3, (q31_t)0x7d969224,
-  (q31_t)0x7d91b49e, (q31_t)0x7d8cd240,
-  (q31_t)0x7d87eb0a, (q31_t)0x7d82fefe, (q31_t)0x7d7e0e1c, (q31_t)0x7d791862, (q31_t)0x7d741dd2, (q31_t)0x7d6f1e6c,
-  (q31_t)0x7d6a1a31, (q31_t)0x7d65111f,
-  (q31_t)0x7d600338, (q31_t)0x7d5af07b, (q31_t)0x7d55d8e9, (q31_t)0x7d50bc82, (q31_t)0x7d4b9b46, (q31_t)0x7d467536,
-  (q31_t)0x7d414a51, (q31_t)0x7d3c1a98,
-  (q31_t)0x7d36e60b, (q31_t)0x7d31acaa, (q31_t)0x7d2c6e76, (q31_t)0x7d272b6e, (q31_t)0x7d21e393, (q31_t)0x7d1c96e5,
-  (q31_t)0x7d174564, (q31_t)0x7d11ef11,
-  (q31_t)0x7d0c93eb, (q31_t)0x7d0733f3, (q31_t)0x7d01cf29, (q31_t)0x7cfc658d, (q31_t)0x7cf6f720, (q31_t)0x7cf183e1,
-  (q31_t)0x7cec0bd1, (q31_t)0x7ce68ef0,
-  (q31_t)0x7ce10d3f, (q31_t)0x7cdb86bd, (q31_t)0x7cd5fb6a, (q31_t)0x7cd06b48, (q31_t)0x7ccad656, (q31_t)0x7cc53c94,
-  (q31_t)0x7cbf9e03, (q31_t)0x7cb9faa2,
-  (q31_t)0x7cb45272, (q31_t)0x7caea574, (q31_t)0x7ca8f3a7, (q31_t)0x7ca33d0c, (q31_t)0x7c9d81a3, (q31_t)0x7c97c16b,
-  (q31_t)0x7c91fc66, (q31_t)0x7c8c3294,
-  (q31_t)0x7c8663f4, (q31_t)0x7c809088, (q31_t)0x7c7ab84e, (q31_t)0x7c74db48, (q31_t)0x7c6ef976, (q31_t)0x7c6912d7,
-  (q31_t)0x7c63276d, (q31_t)0x7c5d3737,
-  (q31_t)0x7c574236, (q31_t)0x7c514869, (q31_t)0x7c4b49d2, (q31_t)0x7c45466f, (q31_t)0x7c3f3e42, (q31_t)0x7c39314b,
-  (q31_t)0x7c331f8a, (q31_t)0x7c2d08ff,
-  (q31_t)0x7c26edab, (q31_t)0x7c20cd8d, (q31_t)0x7c1aa8a6, (q31_t)0x7c147ef6, (q31_t)0x7c0e507e, (q31_t)0x7c081d3d,
-  (q31_t)0x7c01e534, (q31_t)0x7bfba863,
-  (q31_t)0x7bf566cb, (q31_t)0x7bef206b, (q31_t)0x7be8d544, (q31_t)0x7be28556, (q31_t)0x7bdc30a1, (q31_t)0x7bd5d726,
-  (q31_t)0x7bcf78e5, (q31_t)0x7bc915dd,
-  (q31_t)0x7bc2ae10, (q31_t)0x7bbc417e, (q31_t)0x7bb5d026, (q31_t)0x7baf5a09, (q31_t)0x7ba8df28, (q31_t)0x7ba25f82,
-  (q31_t)0x7b9bdb18, (q31_t)0x7b9551ea,
-  (q31_t)0x7b8ec3f8, (q31_t)0x7b883143, (q31_t)0x7b8199ca, (q31_t)0x7b7afd8f, (q31_t)0x7b745c91, (q31_t)0x7b6db6d0,
-  (q31_t)0x7b670c4d, (q31_t)0x7b605d09,
-  (q31_t)0x7b59a902, (q31_t)0x7b52f03a, (q31_t)0x7b4c32b1, (q31_t)0x7b457068, (q31_t)0x7b3ea95d, (q31_t)0x7b37dd92,
-  (q31_t)0x7b310d07, (q31_t)0x7b2a37bc,
-  (q31_t)0x7b235db2, (q31_t)0x7b1c7ee8, (q31_t)0x7b159b5f, (q31_t)0x7b0eb318, (q31_t)0x7b07c612, (q31_t)0x7b00d44d,
-  (q31_t)0x7af9ddcb, (q31_t)0x7af2e28b,
-  (q31_t)0x7aebe28d, (q31_t)0x7ae4ddd2, (q31_t)0x7addd45b, (q31_t)0x7ad6c626, (q31_t)0x7acfb336, (q31_t)0x7ac89b89,
-  (q31_t)0x7ac17f20, (q31_t)0x7aba5dfc,
-  (q31_t)0x7ab3381d, (q31_t)0x7aac0d82, (q31_t)0x7aa4de2d, (q31_t)0x7a9daa1d, (q31_t)0x7a967153, (q31_t)0x7a8f33d0,
-  (q31_t)0x7a87f192, (q31_t)0x7a80aa9c,
-  (q31_t)0x7a795eec, (q31_t)0x7a720e84, (q31_t)0x7a6ab963, (q31_t)0x7a635f8a, (q31_t)0x7a5c00f9, (q31_t)0x7a549db0,
-  (q31_t)0x7a4d35b0, (q31_t)0x7a45c8f9,
-  (q31_t)0x7a3e578b, (q31_t)0x7a36e166, (q31_t)0x7a2f668c, (q31_t)0x7a27e6fb, (q31_t)0x7a2062b5, (q31_t)0x7a18d9b9,
-  (q31_t)0x7a114c09, (q31_t)0x7a09b9a4,
-  (q31_t)0x7a02228a, (q31_t)0x79fa86bc, (q31_t)0x79f2e63a, (q31_t)0x79eb4105, (q31_t)0x79e3971c, (q31_t)0x79dbe880,
-  (q31_t)0x79d43532, (q31_t)0x79cc7d31,
-  (q31_t)0x79c4c07e, (q31_t)0x79bcff19, (q31_t)0x79b53903, (q31_t)0x79ad6e3c, (q31_t)0x79a59ec3, (q31_t)0x799dca9a,
-  (q31_t)0x7995f1c1, (q31_t)0x798e1438,
-  (q31_t)0x798631ff, (q31_t)0x797e4b16, (q31_t)0x79765f7f, (q31_t)0x796e6f39, (q31_t)0x79667a44, (q31_t)0x795e80a1,
-  (q31_t)0x79568250, (q31_t)0x794e7f52,
-  (q31_t)0x794677a6, (q31_t)0x793e6b4e, (q31_t)0x79365a49, (q31_t)0x792e4497, (q31_t)0x79262a3a, (q31_t)0x791e0b31,
-  (q31_t)0x7915e77c, (q31_t)0x790dbf1d,
-  (q31_t)0x79059212, (q31_t)0x78fd605d, (q31_t)0x78f529fe, (q31_t)0x78eceef6, (q31_t)0x78e4af44, (q31_t)0x78dc6ae8,
-  (q31_t)0x78d421e4, (q31_t)0x78cbd437,
-  (q31_t)0x78c381e2, (q31_t)0x78bb2ae5, (q31_t)0x78b2cf41, (q31_t)0x78aa6ef5, (q31_t)0x78a20a03, (q31_t)0x7899a06a,
-  (q31_t)0x7891322a, (q31_t)0x7888bf45,
-  (q31_t)0x788047ba, (q31_t)0x7877cb89, (q31_t)0x786f4ab4, (q31_t)0x7866c53a, (q31_t)0x785e3b1c, (q31_t)0x7855ac5a,
-  (q31_t)0x784d18f4, (q31_t)0x784480ea,
-  (q31_t)0x783be43e, (q31_t)0x783342ef, (q31_t)0x782a9cfe, (q31_t)0x7821f26b, (q31_t)0x78194336, (q31_t)0x78108f60,
-  (q31_t)0x7807d6e9, (q31_t)0x77ff19d1,
-  (q31_t)0x77f65819, (q31_t)0x77ed91c0, (q31_t)0x77e4c6c9, (q31_t)0x77dbf732, (q31_t)0x77d322fc, (q31_t)0x77ca4a27,
-  (q31_t)0x77c16cb4, (q31_t)0x77b88aa3,
-  (q31_t)0x77afa3f5, (q31_t)0x77a6b8a9, (q31_t)0x779dc8c0, (q31_t)0x7794d43b, (q31_t)0x778bdb19, (q31_t)0x7782dd5c,
-  (q31_t)0x7779db03, (q31_t)0x7770d40f,
-  (q31_t)0x7767c880, (q31_t)0x775eb857, (q31_t)0x7755a394, (q31_t)0x774c8a36, (q31_t)0x77436c40, (q31_t)0x773a49b0,
-  (q31_t)0x77312287, (q31_t)0x7727f6c6,
-  (q31_t)0x771ec66e, (q31_t)0x7715917d, (q31_t)0x770c57f5, (q31_t)0x770319d6, (q31_t)0x76f9d721, (q31_t)0x76f08fd5,
-  (q31_t)0x76e743f4, (q31_t)0x76ddf37c,
-  (q31_t)0x76d49e70, (q31_t)0x76cb44cf, (q31_t)0x76c1e699, (q31_t)0x76b883d0, (q31_t)0x76af1c72, (q31_t)0x76a5b082,
-  (q31_t)0x769c3ffe, (q31_t)0x7692cae8,
-  (q31_t)0x7689513f, (q31_t)0x767fd304, (q31_t)0x76765038, (q31_t)0x766cc8db, (q31_t)0x76633ced, (q31_t)0x7659ac6f,
-  (q31_t)0x76501760, (q31_t)0x76467dc2,
-  (q31_t)0x763cdf94, (q31_t)0x76333cd8, (q31_t)0x7629958c, (q31_t)0x761fe9b3, (q31_t)0x7616394c, (q31_t)0x760c8457,
-  (q31_t)0x7602cad5, (q31_t)0x75f90cc7,
-  (q31_t)0x75ef4a2c, (q31_t)0x75e58305, (q31_t)0x75dbb753, (q31_t)0x75d1e715, (q31_t)0x75c8124d, (q31_t)0x75be38fa,
-  (q31_t)0x75b45b1d, (q31_t)0x75aa78b6,
-  (q31_t)0x75a091c6, (q31_t)0x7596a64d, (q31_t)0x758cb64c, (q31_t)0x7582c1c2, (q31_t)0x7578c8b0, (q31_t)0x756ecb18,
-  (q31_t)0x7564c8f8, (q31_t)0x755ac251,
-  (q31_t)0x7550b725, (q31_t)0x7546a772, (q31_t)0x753c933a, (q31_t)0x75327a7d, (q31_t)0x75285d3b, (q31_t)0x751e3b75,
-  (q31_t)0x7514152b, (q31_t)0x7509ea5d,
-  (q31_t)0x74ffbb0d, (q31_t)0x74f58739, (q31_t)0x74eb4ee3, (q31_t)0x74e1120c, (q31_t)0x74d6d0b2, (q31_t)0x74cc8ad8,
-  (q31_t)0x74c2407d, (q31_t)0x74b7f1a1,
-  (q31_t)0x74ad9e46, (q31_t)0x74a3466b, (q31_t)0x7498ea11, (q31_t)0x748e8938, (q31_t)0x748423e0, (q31_t)0x7479ba0b,
-  (q31_t)0x746f4bb8, (q31_t)0x7464d8e8,
-  (q31_t)0x745a619b, (q31_t)0x744fe5d2, (q31_t)0x7445658d, (q31_t)0x743ae0cc, (q31_t)0x74305790, (q31_t)0x7425c9da,
-  (q31_t)0x741b37a9, (q31_t)0x7410a0fe,
-  (q31_t)0x740605d9, (q31_t)0x73fb663c, (q31_t)0x73f0c226, (q31_t)0x73e61997, (q31_t)0x73db6c91, (q31_t)0x73d0bb13,
-  (q31_t)0x73c6051f, (q31_t)0x73bb4ab3,
-  (q31_t)0x73b08bd1, (q31_t)0x73a5c87a, (q31_t)0x739b00ad, (q31_t)0x7390346b, (q31_t)0x738563b5, (q31_t)0x737a8e8a,
-  (q31_t)0x736fb4ec, (q31_t)0x7364d6da,
-  (q31_t)0x7359f456, (q31_t)0x734f0d5f, (q31_t)0x734421f6, (q31_t)0x7339321b, (q31_t)0x732e3dcf, (q31_t)0x73234512,
-  (q31_t)0x731847e5, (q31_t)0x730d4648,
-  (q31_t)0x7302403c, (q31_t)0x72f735c0, (q31_t)0x72ec26d6, (q31_t)0x72e1137d, (q31_t)0x72d5fbb7, (q31_t)0x72cadf83,
-  (q31_t)0x72bfbee3, (q31_t)0x72b499d6,
-  (q31_t)0x72a9705c, (q31_t)0x729e4277, (q31_t)0x72931027, (q31_t)0x7287d96c, (q31_t)0x727c9e47, (q31_t)0x72715eb8,
-  (q31_t)0x72661abf, (q31_t)0x725ad25d,
-  (q31_t)0x724f8593, (q31_t)0x72443460, (q31_t)0x7238dec5, (q31_t)0x722d84c4, (q31_t)0x7222265b, (q31_t)0x7216c38c,
-  (q31_t)0x720b5c57, (q31_t)0x71fff0bc,
-  (q31_t)0x71f480bc, (q31_t)0x71e90c57, (q31_t)0x71dd938f, (q31_t)0x71d21662, (q31_t)0x71c694d2, (q31_t)0x71bb0edf,
-  (q31_t)0x71af848a, (q31_t)0x71a3f5d2,
-  (q31_t)0x719862b9, (q31_t)0x718ccb3f, (q31_t)0x71812f65, (q31_t)0x71758f29, (q31_t)0x7169ea8f, (q31_t)0x715e4194,
-  (q31_t)0x7152943b, (q31_t)0x7146e284,
-  (q31_t)0x713b2c6e, (q31_t)0x712f71fb, (q31_t)0x7123b32b, (q31_t)0x7117effe, (q31_t)0x710c2875, (q31_t)0x71005c90,
-  (q31_t)0x70f48c50, (q31_t)0x70e8b7b5,
-  (q31_t)0x70dcdec0, (q31_t)0x70d10171, (q31_t)0x70c51fc8, (q31_t)0x70b939c7, (q31_t)0x70ad4f6d, (q31_t)0x70a160ba,
-  (q31_t)0x70956db1, (q31_t)0x70897650,
-  (q31_t)0x707d7a98, (q31_t)0x70717a8a, (q31_t)0x70657626, (q31_t)0x70596d6d, (q31_t)0x704d6060, (q31_t)0x70414efd,
-  (q31_t)0x70353947, (q31_t)0x70291f3e,
-  (q31_t)0x701d00e1, (q31_t)0x7010de32, (q31_t)0x7004b731, (q31_t)0x6ff88bde, (q31_t)0x6fec5c3b, (q31_t)0x6fe02846,
-  (q31_t)0x6fd3f001, (q31_t)0x6fc7b36d,
-  (q31_t)0x6fbb728a, (q31_t)0x6faf2d57, (q31_t)0x6fa2e3d7, (q31_t)0x6f969608, (q31_t)0x6f8a43ed, (q31_t)0x6f7ded84,
-  (q31_t)0x6f7192cf, (q31_t)0x6f6533ce,
-  (q31_t)0x6f58d082, (q31_t)0x6f4c68eb, (q31_t)0x6f3ffd09, (q31_t)0x6f338cde, (q31_t)0x6f271868, (q31_t)0x6f1a9faa,
-  (q31_t)0x6f0e22a3, (q31_t)0x6f01a155,
-  (q31_t)0x6ef51bbe, (q31_t)0x6ee891e1, (q31_t)0x6edc03bc, (q31_t)0x6ecf7152, (q31_t)0x6ec2daa2, (q31_t)0x6eb63fad,
-  (q31_t)0x6ea9a073, (q31_t)0x6e9cfcf5,
-  (q31_t)0x6e905534, (q31_t)0x6e83a92f, (q31_t)0x6e76f8e7, (q31_t)0x6e6a445d, (q31_t)0x6e5d8b91, (q31_t)0x6e50ce84,
-  (q31_t)0x6e440d37, (q31_t)0x6e3747a9,
-  (q31_t)0x6e2a7ddb, (q31_t)0x6e1dafce, (q31_t)0x6e10dd82, (q31_t)0x6e0406f8, (q31_t)0x6df72c30, (q31_t)0x6dea4d2b,
-  (q31_t)0x6ddd69e9, (q31_t)0x6dd0826a,
-  (q31_t)0x6dc396b0, (q31_t)0x6db6a6ba, (q31_t)0x6da9b28a, (q31_t)0x6d9cba1f, (q31_t)0x6d8fbd7a, (q31_t)0x6d82bc9d,
-  (q31_t)0x6d75b786, (q31_t)0x6d68ae37,
-  (q31_t)0x6d5ba0b0, (q31_t)0x6d4e8ef2, (q31_t)0x6d4178fd, (q31_t)0x6d345ed1, (q31_t)0x6d274070, (q31_t)0x6d1a1dda,
-  (q31_t)0x6d0cf70f, (q31_t)0x6cffcc0f,
-  (q31_t)0x6cf29cdc, (q31_t)0x6ce56975, (q31_t)0x6cd831dc, (q31_t)0x6ccaf610, (q31_t)0x6cbdb613, (q31_t)0x6cb071e4,
-  (q31_t)0x6ca32985, (q31_t)0x6c95dcf6,
-  (q31_t)0x6c888c36, (q31_t)0x6c7b3748, (q31_t)0x6c6dde2b, (q31_t)0x6c6080e0, (q31_t)0x6c531f67, (q31_t)0x6c45b9c1,
-  (q31_t)0x6c384fef, (q31_t)0x6c2ae1f0,
-  (q31_t)0x6c1d6fc6, (q31_t)0x6c0ff971, (q31_t)0x6c027ef1, (q31_t)0x6bf50047, (q31_t)0x6be77d74, (q31_t)0x6bd9f677,
-  (q31_t)0x6bcc6b53, (q31_t)0x6bbedc06,
-  (q31_t)0x6bb14892, (q31_t)0x6ba3b0f7, (q31_t)0x6b961536, (q31_t)0x6b88754f, (q31_t)0x6b7ad142, (q31_t)0x6b6d2911,
-  (q31_t)0x6b5f7cbc, (q31_t)0x6b51cc42,
-  (q31_t)0x6b4417a6, (q31_t)0x6b365ee7, (q31_t)0x6b28a206, (q31_t)0x6b1ae103, (q31_t)0x6b0d1bdf, (q31_t)0x6aff529a,
-  (q31_t)0x6af18536, (q31_t)0x6ae3b3b2,
-  (q31_t)0x6ad5de0f, (q31_t)0x6ac8044e, (q31_t)0x6aba266e, (q31_t)0x6aac4472, (q31_t)0x6a9e5e58, (q31_t)0x6a907423,
-  (q31_t)0x6a8285d1, (q31_t)0x6a749365,
-  (q31_t)0x6a669cdd, (q31_t)0x6a58a23c, (q31_t)0x6a4aa381, (q31_t)0x6a3ca0ad, (q31_t)0x6a2e99c0, (q31_t)0x6a208ebb,
-  (q31_t)0x6a127f9f, (q31_t)0x6a046c6c,
-  (q31_t)0x69f65523, (q31_t)0x69e839c4, (q31_t)0x69da1a50, (q31_t)0x69cbf6c7, (q31_t)0x69bdcf29, (q31_t)0x69afa378,
-  (q31_t)0x69a173b5, (q31_t)0x69933fde,
-  (q31_t)0x698507f6, (q31_t)0x6976cbfc, (q31_t)0x69688bf1, (q31_t)0x695a47d6, (q31_t)0x694bffab, (q31_t)0x693db371,
-  (q31_t)0x692f6328, (q31_t)0x69210ed1,
-  (q31_t)0x6912b66c, (q31_t)0x690459fb, (q31_t)0x68f5f97d, (q31_t)0x68e794f3, (q31_t)0x68d92c5d, (q31_t)0x68cabfbd,
-  (q31_t)0x68bc4f13, (q31_t)0x68adda5f,
-  (q31_t)0x689f61a1, (q31_t)0x6890e4dc, (q31_t)0x6882640e, (q31_t)0x6873df38, (q31_t)0x6865565c, (q31_t)0x6856c979,
-  (q31_t)0x68483891, (q31_t)0x6839a3a4,
-  (q31_t)0x682b0ab1, (q31_t)0x681c6dbb, (q31_t)0x680dccc1, (q31_t)0x67ff27c4, (q31_t)0x67f07ec5, (q31_t)0x67e1d1c4,
-  (q31_t)0x67d320c1, (q31_t)0x67c46bbe,
-  (q31_t)0x67b5b2bb, (q31_t)0x67a6f5b8, (q31_t)0x679834b6, (q31_t)0x67896fb6, (q31_t)0x677aa6b8, (q31_t)0x676bd9bd,
-  (q31_t)0x675d08c4, (q31_t)0x674e33d0,
-  (q31_t)0x673f5ae0, (q31_t)0x67307df5, (q31_t)0x67219d10, (q31_t)0x6712b831, (q31_t)0x6703cf58, (q31_t)0x66f4e287,
-  (q31_t)0x66e5f1be, (q31_t)0x66d6fcfd,
-  (q31_t)0x66c80445, (q31_t)0x66b90797, (q31_t)0x66aa06f3, (q31_t)0x669b0259, (q31_t)0x668bf9cb, (q31_t)0x667ced49,
-  (q31_t)0x666ddcd3, (q31_t)0x665ec86b,
-  (q31_t)0x664fb010, (q31_t)0x664093c3, (q31_t)0x66317385, (q31_t)0x66224f56, (q31_t)0x66132738, (q31_t)0x6603fb2a,
-  (q31_t)0x65f4cb2d, (q31_t)0x65e59742,
-  (q31_t)0x65d65f69, (q31_t)0x65c723a3, (q31_t)0x65b7e3f1, (q31_t)0x65a8a052, (q31_t)0x659958c9, (q31_t)0x658a0d54,
-  (q31_t)0x657abdf6, (q31_t)0x656b6aae,
-  (q31_t)0x655c137d, (q31_t)0x654cb863, (q31_t)0x653d5962, (q31_t)0x652df679, (q31_t)0x651e8faa, (q31_t)0x650f24f5,
-  (q31_t)0x64ffb65b, (q31_t)0x64f043dc,
-  (q31_t)0x64e0cd78, (q31_t)0x64d15331, (q31_t)0x64c1d507, (q31_t)0x64b252fa, (q31_t)0x64a2cd0c, (q31_t)0x6493433c,
-  (q31_t)0x6483b58c, (q31_t)0x647423fb,
-  (q31_t)0x64648e8c, (q31_t)0x6454f53d, (q31_t)0x64455810, (q31_t)0x6435b706, (q31_t)0x6426121e, (q31_t)0x6416695a,
-  (q31_t)0x6406bcba, (q31_t)0x63f70c3f,
-  (q31_t)0x63e757ea, (q31_t)0x63d79fba, (q31_t)0x63c7e3b1, (q31_t)0x63b823cf, (q31_t)0x63a86015, (q31_t)0x63989884,
-  (q31_t)0x6388cd1b, (q31_t)0x6378fddc,
-  (q31_t)0x63692ac7, (q31_t)0x635953dd, (q31_t)0x6349791f, (q31_t)0x63399a8d, (q31_t)0x6329b827, (q31_t)0x6319d1ef,
-  (q31_t)0x6309e7e4, (q31_t)0x62f9fa09,
-  (q31_t)0x62ea085c, (q31_t)0x62da12df, (q31_t)0x62ca1992, (q31_t)0x62ba1c77, (q31_t)0x62aa1b8d, (q31_t)0x629a16d5,
-  (q31_t)0x628a0e50, (q31_t)0x627a01fe,
-  (q31_t)0x6269f1e1, (q31_t)0x6259ddf8, (q31_t)0x6249c645, (q31_t)0x6239aac7, (q31_t)0x62298b81, (q31_t)0x62196871,
-  (q31_t)0x62094199, (q31_t)0x61f916f9,
-  (q31_t)0x61e8e893, (q31_t)0x61d8b666, (q31_t)0x61c88074, (q31_t)0x61b846bc, (q31_t)0x61a80940, (q31_t)0x6197c800,
-  (q31_t)0x618782fd, (q31_t)0x61773a37,
-  (q31_t)0x6166edb0, (q31_t)0x61569d67, (q31_t)0x6146495d, (q31_t)0x6135f193, (q31_t)0x6125960a, (q31_t)0x611536c2,
-  (q31_t)0x6104d3bc, (q31_t)0x60f46cf9,
-  (q31_t)0x60e40278, (q31_t)0x60d3943b, (q31_t)0x60c32243, (q31_t)0x60b2ac8f, (q31_t)0x60a23322, (q31_t)0x6091b5fa,
-  (q31_t)0x60813519, (q31_t)0x6070b080,
-  (q31_t)0x6060282f, (q31_t)0x604f9c27, (q31_t)0x603f0c69, (q31_t)0x602e78f4, (q31_t)0x601de1ca, (q31_t)0x600d46ec,
-  (q31_t)0x5ffca859, (q31_t)0x5fec0613,
-  (q31_t)0x5fdb601b, (q31_t)0x5fcab670, (q31_t)0x5fba0914, (q31_t)0x5fa95807, (q31_t)0x5f98a34a, (q31_t)0x5f87eade,
-  (q31_t)0x5f772ec2, (q31_t)0x5f666ef9,
-  (q31_t)0x5f55ab82, (q31_t)0x5f44e45e, (q31_t)0x5f34198e, (q31_t)0x5f234b12, (q31_t)0x5f1278eb, (q31_t)0x5f01a31a,
-  (q31_t)0x5ef0c99f, (q31_t)0x5edfec7b,
-  (q31_t)0x5ecf0baf, (q31_t)0x5ebe273b, (q31_t)0x5ead3f1f, (q31_t)0x5e9c535e, (q31_t)0x5e8b63f7, (q31_t)0x5e7a70ea,
-  (q31_t)0x5e697a39, (q31_t)0x5e587fe5,
-  (q31_t)0x5e4781ed, (q31_t)0x5e368053, (q31_t)0x5e257b17, (q31_t)0x5e147239, (q31_t)0x5e0365bb, (q31_t)0x5df2559e,
-  (q31_t)0x5de141e1, (q31_t)0x5dd02a85,
-  (q31_t)0x5dbf0f8c, (q31_t)0x5dadf0f5, (q31_t)0x5d9ccec2, (q31_t)0x5d8ba8f3, (q31_t)0x5d7a7f88, (q31_t)0x5d695283,
-  (q31_t)0x5d5821e4, (q31_t)0x5d46edac,
-  (q31_t)0x5d35b5db, (q31_t)0x5d247a72, (q31_t)0x5d133b72, (q31_t)0x5d01f8dc, (q31_t)0x5cf0b2af, (q31_t)0x5cdf68ed,
-  (q31_t)0x5cce1b97, (q31_t)0x5cbccaac,
-  (q31_t)0x5cab762f, (q31_t)0x5c9a1e1e, (q31_t)0x5c88c27c, (q31_t)0x5c776348, (q31_t)0x5c660084, (q31_t)0x5c549a30,
-  (q31_t)0x5c43304d, (q31_t)0x5c31c2db,
-  (q31_t)0x5c2051db, (q31_t)0x5c0edd4e, (q31_t)0x5bfd6534, (q31_t)0x5bebe98e, (q31_t)0x5bda6a5d, (q31_t)0x5bc8e7a2,
-  (q31_t)0x5bb7615d, (q31_t)0x5ba5d78e,
-  (q31_t)0x5b944a37, (q31_t)0x5b82b958, (q31_t)0x5b7124f2, (q31_t)0x5b5f8d06, (q31_t)0x5b4df193, (q31_t)0x5b3c529c,
-  (q31_t)0x5b2ab020, (q31_t)0x5b190a20,
-  (q31_t)0x5b07609d, (q31_t)0x5af5b398, (q31_t)0x5ae40311, (q31_t)0x5ad24f09, (q31_t)0x5ac09781, (q31_t)0x5aaedc78,
-  (q31_t)0x5a9d1df1, (q31_t)0x5a8b5bec,
-  (q31_t)0x5a799669, (q31_t)0x5a67cd69, (q31_t)0x5a5600ec, (q31_t)0x5a4430f5, (q31_t)0x5a325d82, (q31_t)0x5a208695,
-  (q31_t)0x5a0eac2e, (q31_t)0x59fcce4f,
-  (q31_t)0x59eaecf8, (q31_t)0x59d90829, (q31_t)0x59c71fe3, (q31_t)0x59b53427, (q31_t)0x59a344f6, (q31_t)0x59915250,
-  (q31_t)0x597f5c36, (q31_t)0x596d62a9,
-  (q31_t)0x595b65aa, (q31_t)0x59496538, (q31_t)0x59376155, (q31_t)0x59255a02, (q31_t)0x59134f3e, (q31_t)0x5901410c,
-  (q31_t)0x58ef2f6b, (q31_t)0x58dd1a5d,
-  (q31_t)0x58cb01e1, (q31_t)0x58b8e5f9, (q31_t)0x58a6c6a5, (q31_t)0x5894a3e7, (q31_t)0x58827dbe, (q31_t)0x5870542c,
-  (q31_t)0x585e2730, (q31_t)0x584bf6cd,
-  (q31_t)0x5839c302, (q31_t)0x58278bd1, (q31_t)0x58155139, (q31_t)0x5803133c, (q31_t)0x57f0d1da, (q31_t)0x57de8d15,
-  (q31_t)0x57cc44ec, (q31_t)0x57b9f960,
-  (q31_t)0x57a7aa73, (q31_t)0x57955825, (q31_t)0x57830276, (q31_t)0x5770a968, (q31_t)0x575e4cfa, (q31_t)0x574bed2f,
-  (q31_t)0x57398a05, (q31_t)0x5727237f,
-  (q31_t)0x5714b99d, (q31_t)0x57024c5f, (q31_t)0x56efdbc7, (q31_t)0x56dd67d4, (q31_t)0x56caf088, (q31_t)0x56b875e4,
-  (q31_t)0x56a5f7e7, (q31_t)0x56937694,
-  (q31_t)0x5680f1ea, (q31_t)0x566e69ea, (q31_t)0x565bde95, (q31_t)0x56494fec, (q31_t)0x5636bdef, (q31_t)0x5624289f,
-  (q31_t)0x56118ffe, (q31_t)0x55fef40a,
-  (q31_t)0x55ec54c6, (q31_t)0x55d9b232, (q31_t)0x55c70c4f, (q31_t)0x55b4631d, (q31_t)0x55a1b69d, (q31_t)0x558f06d0,
-  (q31_t)0x557c53b6, (q31_t)0x55699d51,
-  (q31_t)0x5556e3a1, (q31_t)0x554426a7, (q31_t)0x55316663, (q31_t)0x551ea2d6, (q31_t)0x550bdc01, (q31_t)0x54f911e5,
-  (q31_t)0x54e64482, (q31_t)0x54d373d9,
-  (q31_t)0x54c09feb, (q31_t)0x54adc8b8, (q31_t)0x549aee42, (q31_t)0x54881089, (q31_t)0x54752f8d, (q31_t)0x54624b50,
-  (q31_t)0x544f63d2, (q31_t)0x543c7914,
-  (q31_t)0x54298b17, (q31_t)0x541699db, (q31_t)0x5403a561, (q31_t)0x53f0adaa, (q31_t)0x53ddb2b6, (q31_t)0x53cab486,
-  (q31_t)0x53b7b31c, (q31_t)0x53a4ae77,
-  (q31_t)0x5391a699, (q31_t)0x537e9b82, (q31_t)0x536b8d33, (q31_t)0x53587bad, (q31_t)0x534566f0, (q31_t)0x53324efd,
-  (q31_t)0x531f33d5, (q31_t)0x530c1579,
-  (q31_t)0x52f8f3e9, (q31_t)0x52e5cf27, (q31_t)0x52d2a732, (q31_t)0x52bf7c0b, (q31_t)0x52ac4db4, (q31_t)0x52991c2d,
-  (q31_t)0x5285e777, (q31_t)0x5272af92,
-  (q31_t)0x525f7480, (q31_t)0x524c3640, (q31_t)0x5238f4d4, (q31_t)0x5225b03d, (q31_t)0x5212687b, (q31_t)0x51ff1d8f,
-  (q31_t)0x51ebcf7a, (q31_t)0x51d87e3c,
-  (q31_t)0x51c529d7, (q31_t)0x51b1d24a, (q31_t)0x519e7797, (q31_t)0x518b19bf, (q31_t)0x5177b8c2, (q31_t)0x516454a0,
-  (q31_t)0x5150ed5c, (q31_t)0x513d82f4,
-  (q31_t)0x512a156b, (q31_t)0x5116a4c1, (q31_t)0x510330f7, (q31_t)0x50efba0d, (q31_t)0x50dc4005, (q31_t)0x50c8c2de,
-  (q31_t)0x50b5429a, (q31_t)0x50a1bf39,
-  (q31_t)0x508e38bd, (q31_t)0x507aaf25, (q31_t)0x50672273, (q31_t)0x505392a8, (q31_t)0x503fffc4, (q31_t)0x502c69c8,
-  (q31_t)0x5018d0b4, (q31_t)0x5005348a,
-  (q31_t)0x4ff1954b, (q31_t)0x4fddf2f6, (q31_t)0x4fca4d8d, (q31_t)0x4fb6a510, (q31_t)0x4fa2f981, (q31_t)0x4f8f4ae0,
-  (q31_t)0x4f7b992d, (q31_t)0x4f67e46a,
-  (q31_t)0x4f542c98, (q31_t)0x4f4071b6, (q31_t)0x4f2cb3c7, (q31_t)0x4f18f2c9, (q31_t)0x4f052ec0, (q31_t)0x4ef167aa,
-  (q31_t)0x4edd9d89, (q31_t)0x4ec9d05e,
-  (q31_t)0x4eb60029, (q31_t)0x4ea22ceb, (q31_t)0x4e8e56a5, (q31_t)0x4e7a7d58, (q31_t)0x4e66a105, (q31_t)0x4e52c1ab,
-  (q31_t)0x4e3edf4d, (q31_t)0x4e2af9ea,
-  (q31_t)0x4e171184, (q31_t)0x4e03261b, (q31_t)0x4def37b0, (q31_t)0x4ddb4644, (q31_t)0x4dc751d8, (q31_t)0x4db35a6c,
-  (q31_t)0x4d9f6001, (q31_t)0x4d8b6298,
-  (q31_t)0x4d776231, (q31_t)0x4d635ece, (q31_t)0x4d4f5870, (q31_t)0x4d3b4f16, (q31_t)0x4d2742c2, (q31_t)0x4d133374,
-  (q31_t)0x4cff212e, (q31_t)0x4ceb0bf0,
-  (q31_t)0x4cd6f3bb, (q31_t)0x4cc2d88f, (q31_t)0x4caeba6e, (q31_t)0x4c9a9958, (q31_t)0x4c86754e, (q31_t)0x4c724e50,
-  (q31_t)0x4c5e2460, (q31_t)0x4c49f77f,
-  (q31_t)0x4c35c7ac, (q31_t)0x4c2194e9, (q31_t)0x4c0d5f37, (q31_t)0x4bf92697, (q31_t)0x4be4eb08, (q31_t)0x4bd0ac8d,
-  (q31_t)0x4bbc6b25, (q31_t)0x4ba826d1,
-  (q31_t)0x4b93df93, (q31_t)0x4b7f956b, (q31_t)0x4b6b485a, (q31_t)0x4b56f861, (q31_t)0x4b42a580, (q31_t)0x4b2e4fb8,
-  (q31_t)0x4b19f70a, (q31_t)0x4b059b77,
-  (q31_t)0x4af13d00, (q31_t)0x4adcdba5, (q31_t)0x4ac87767, (q31_t)0x4ab41046, (q31_t)0x4a9fa645, (q31_t)0x4a8b3963,
-  (q31_t)0x4a76c9a2, (q31_t)0x4a625701,
-  (q31_t)0x4a4de182, (q31_t)0x4a396926, (q31_t)0x4a24edee, (q31_t)0x4a106fda, (q31_t)0x49fbeeea, (q31_t)0x49e76b21,
-  (q31_t)0x49d2e47e, (q31_t)0x49be5b02,
-  (q31_t)0x49a9ceaf, (q31_t)0x49953f84, (q31_t)0x4980ad84, (q31_t)0x496c18ae, (q31_t)0x49578103, (q31_t)0x4942e684,
-  (q31_t)0x492e4933, (q31_t)0x4919a90f,
-  (q31_t)0x4905061a, (q31_t)0x48f06054, (q31_t)0x48dbb7be, (q31_t)0x48c70c59, (q31_t)0x48b25e25, (q31_t)0x489dad25,
-  (q31_t)0x4888f957, (q31_t)0x487442be,
-  (q31_t)0x485f8959, (q31_t)0x484acd2a, (q31_t)0x48360e32, (q31_t)0x48214c71, (q31_t)0x480c87e8, (q31_t)0x47f7c099,
-  (q31_t)0x47e2f682, (q31_t)0x47ce29a7,
-  (q31_t)0x47b95a06, (q31_t)0x47a487a2, (q31_t)0x478fb27b, (q31_t)0x477ada91, (q31_t)0x4765ffe6, (q31_t)0x4751227a,
-  (q31_t)0x473c424e, (q31_t)0x47275f63,
-  (q31_t)0x471279ba, (q31_t)0x46fd9154, (q31_t)0x46e8a631, (q31_t)0x46d3b852, (q31_t)0x46bec7b8, (q31_t)0x46a9d464,
-  (q31_t)0x4694de56, (q31_t)0x467fe590,
-  (q31_t)0x466aea12, (q31_t)0x4655ebdd, (q31_t)0x4640eaf2, (q31_t)0x462be751, (q31_t)0x4616e0fc, (q31_t)0x4601d7f3,
-  (q31_t)0x45eccc37, (q31_t)0x45d7bdc9,
-  (q31_t)0x45c2acaa, (q31_t)0x45ad98da, (q31_t)0x4598825a, (q31_t)0x4583692c, (q31_t)0x456e4d4f, (q31_t)0x45592ec6,
-  (q31_t)0x45440d90, (q31_t)0x452ee9ae,
-  (q31_t)0x4519c321, (q31_t)0x450499eb, (q31_t)0x44ef6e0b, (q31_t)0x44da3f83, (q31_t)0x44c50e53, (q31_t)0x44afda7d,
-  (q31_t)0x449aa400, (q31_t)0x44856adf,
-  (q31_t)0x44702f19, (q31_t)0x445af0b0, (q31_t)0x4445afa4, (q31_t)0x44306bf6, (q31_t)0x441b25a8, (q31_t)0x4405dcb9,
-  (q31_t)0x43f0912b, (q31_t)0x43db42fe,
-  (q31_t)0x43c5f234, (q31_t)0x43b09ecc, (q31_t)0x439b48c9, (q31_t)0x4385f02a, (q31_t)0x437094f1, (q31_t)0x435b371f,
-  (q31_t)0x4345d6b3, (q31_t)0x433073b0,
-  (q31_t)0x431b0e15, (q31_t)0x4305a5e5, (q31_t)0x42f03b1e, (q31_t)0x42dacdc3, (q31_t)0x42c55dd4, (q31_t)0x42afeb53,
-  (q31_t)0x429a763f, (q31_t)0x4284fe99,
-  (q31_t)0x426f8463, (q31_t)0x425a079e, (q31_t)0x42448849, (q31_t)0x422f0667, (q31_t)0x421981f7, (q31_t)0x4203fafb,
-  (q31_t)0x41ee7174, (q31_t)0x41d8e561,
-  (q31_t)0x41c356c5, (q31_t)0x41adc5a0, (q31_t)0x419831f3, (q31_t)0x41829bbe, (q31_t)0x416d0302, (q31_t)0x415767c1,
-  (q31_t)0x4141c9fb, (q31_t)0x412c29b1,
-  (q31_t)0x411686e4, (q31_t)0x4100e194, (q31_t)0x40eb39c3, (q31_t)0x40d58f71, (q31_t)0x40bfe29f, (q31_t)0x40aa334e,
-  (q31_t)0x4094817f, (q31_t)0x407ecd32,
-  (q31_t)0x40691669, (q31_t)0x40535d24, (q31_t)0x403da165, (q31_t)0x4027e32b, (q31_t)0x40122278, (q31_t)0x3ffc5f4d,
-  (q31_t)0x3fe699aa, (q31_t)0x3fd0d191,
-  (q31_t)0x3fbb0702, (q31_t)0x3fa539fd, (q31_t)0x3f8f6a85, (q31_t)0x3f799899, (q31_t)0x3f63c43b, (q31_t)0x3f4ded6b,
-  (q31_t)0x3f38142a, (q31_t)0x3f22387a,
-  (q31_t)0x3f0c5a5a, (q31_t)0x3ef679cc, (q31_t)0x3ee096d1, (q31_t)0x3ecab169, (q31_t)0x3eb4c995, (q31_t)0x3e9edf57,
-  (q31_t)0x3e88f2ae, (q31_t)0x3e73039d,
-  (q31_t)0x3e5d1222, (q31_t)0x3e471e41, (q31_t)0x3e3127f9, (q31_t)0x3e1b2f4a, (q31_t)0x3e053437, (q31_t)0x3def36c0,
-  (q31_t)0x3dd936e6, (q31_t)0x3dc334a9,
-  (q31_t)0x3dad300b, (q31_t)0x3d97290b, (q31_t)0x3d811fac, (q31_t)0x3d6b13ee, (q31_t)0x3d5505d2, (q31_t)0x3d3ef559,
-  (q31_t)0x3d28e282, (q31_t)0x3d12cd51,
-  (q31_t)0x3cfcb5c4, (q31_t)0x3ce69bde, (q31_t)0x3cd07f9f, (q31_t)0x3cba6107, (q31_t)0x3ca44018, (q31_t)0x3c8e1cd3,
-  (q31_t)0x3c77f737, (q31_t)0x3c61cf48,
-  (q31_t)0x3c4ba504, (q31_t)0x3c35786d, (q31_t)0x3c1f4983, (q31_t)0x3c091849, (q31_t)0x3bf2e4be, (q31_t)0x3bdcaee3,
-  (q31_t)0x3bc676b9, (q31_t)0x3bb03c42,
-  (q31_t)0x3b99ff7d, (q31_t)0x3b83c06c, (q31_t)0x3b6d7f10, (q31_t)0x3b573b69, (q31_t)0x3b40f579, (q31_t)0x3b2aad3f,
-  (q31_t)0x3b1462be, (q31_t)0x3afe15f6,
-  (q31_t)0x3ae7c6e7, (q31_t)0x3ad17593, (q31_t)0x3abb21fb, (q31_t)0x3aa4cc1e, (q31_t)0x3a8e7400, (q31_t)0x3a78199f,
-  (q31_t)0x3a61bcfd, (q31_t)0x3a4b5e1b,
-  (q31_t)0x3a34fcf9, (q31_t)0x3a1e9999, (q31_t)0x3a0833fc, (q31_t)0x39f1cc21, (q31_t)0x39db620b, (q31_t)0x39c4f5ba,
-  (q31_t)0x39ae872f, (q31_t)0x3998166a,
-  (q31_t)0x3981a36d, (q31_t)0x396b2e38, (q31_t)0x3954b6cd, (q31_t)0x393e3d2c, (q31_t)0x3927c155, (q31_t)0x3911434b,
-  (q31_t)0x38fac30e, (q31_t)0x38e4409e,
-  (q31_t)0x38cdbbfc, (q31_t)0x38b7352a, (q31_t)0x38a0ac29, (q31_t)0x388a20f8, (q31_t)0x38739399, (q31_t)0x385d040d,
-  (q31_t)0x38467255, (q31_t)0x382fde72,
-  (q31_t)0x38194864, (q31_t)0x3802b02c, (q31_t)0x37ec15cb, (q31_t)0x37d57943, (q31_t)0x37beda93, (q31_t)0x37a839be,
-  (q31_t)0x379196c3, (q31_t)0x377af1a3,
-  (q31_t)0x37644a60, (q31_t)0x374da0fa, (q31_t)0x3736f573, (q31_t)0x372047ca, (q31_t)0x37099802, (q31_t)0x36f2e61a,
-  (q31_t)0x36dc3214, (q31_t)0x36c57bf0,
-  (q31_t)0x36aec3b0, (q31_t)0x36980954, (q31_t)0x36814cde, (q31_t)0x366a8e4d, (q31_t)0x3653cda3, (q31_t)0x363d0ae2,
-  (q31_t)0x36264609, (q31_t)0x360f7f19,
-  (q31_t)0x35f8b614, (q31_t)0x35e1eafa, (q31_t)0x35cb1dcc, (q31_t)0x35b44e8c, (q31_t)0x359d7d39, (q31_t)0x3586a9d5,
-  (q31_t)0x356fd461, (q31_t)0x3558fcde,
-  (q31_t)0x3542234c, (q31_t)0x352b47ad, (q31_t)0x35146a00, (q31_t)0x34fd8a48, (q31_t)0x34e6a885, (q31_t)0x34cfc4b7,
-  (q31_t)0x34b8dee1, (q31_t)0x34a1f702,
-  (q31_t)0x348b0d1c, (q31_t)0x3474212f, (q31_t)0x345d333c, (q31_t)0x34464345, (q31_t)0x342f5149, (q31_t)0x34185d4b,
-  (q31_t)0x3401674a, (q31_t)0x33ea6f48,
-  (q31_t)0x33d37546, (q31_t)0x33bc7944, (q31_t)0x33a57b44, (q31_t)0x338e7b46, (q31_t)0x3377794b, (q31_t)0x33607554,
-  (q31_t)0x33496f62, (q31_t)0x33326776,
-  (q31_t)0x331b5d91, (q31_t)0x330451b3, (q31_t)0x32ed43de, (q31_t)0x32d63412, (q31_t)0x32bf2250, (q31_t)0x32a80e99,
-  (q31_t)0x3290f8ef, (q31_t)0x3279e151,
-  (q31_t)0x3262c7c1, (q31_t)0x324bac40, (q31_t)0x32348ecf, (q31_t)0x321d6f6e, (q31_t)0x32064e1e, (q31_t)0x31ef2ae1,
-  (q31_t)0x31d805b7, (q31_t)0x31c0dea1,
-  (q31_t)0x31a9b5a0, (q31_t)0x31928ab4, (q31_t)0x317b5de0, (q31_t)0x31642f23, (q31_t)0x314cfe7f, (q31_t)0x3135cbf4,
-  (q31_t)0x311e9783, (q31_t)0x3107612e,
-  (q31_t)0x30f028f4, (q31_t)0x30d8eed8, (q31_t)0x30c1b2da, (q31_t)0x30aa74fa, (q31_t)0x3093353a, (q31_t)0x307bf39b,
-  (q31_t)0x3064b01d, (q31_t)0x304d6ac1,
-  (q31_t)0x30362389, (q31_t)0x301eda75, (q31_t)0x30078f86, (q31_t)0x2ff042bd, (q31_t)0x2fd8f41b, (q31_t)0x2fc1a3a0,
-  (q31_t)0x2faa514f, (q31_t)0x2f92fd26,
-  (q31_t)0x2f7ba729, (q31_t)0x2f644f56, (q31_t)0x2f4cf5b0, (q31_t)0x2f359a37, (q31_t)0x2f1e3ced, (q31_t)0x2f06ddd1,
-  (q31_t)0x2eef7ce5, (q31_t)0x2ed81a29,
-  (q31_t)0x2ec0b5a0, (q31_t)0x2ea94f49, (q31_t)0x2e91e725, (q31_t)0x2e7a7d36, (q31_t)0x2e63117c, (q31_t)0x2e4ba3f8,
-  (q31_t)0x2e3434ac, (q31_t)0x2e1cc397,
-  (q31_t)0x2e0550bb, (q31_t)0x2deddc19, (q31_t)0x2dd665b2, (q31_t)0x2dbeed86, (q31_t)0x2da77397, (q31_t)0x2d8ff7e5,
-  (q31_t)0x2d787a72, (q31_t)0x2d60fb3e,
-  (q31_t)0x2d497a4a, (q31_t)0x2d31f797, (q31_t)0x2d1a7325, (q31_t)0x2d02ecf7, (q31_t)0x2ceb650d, (q31_t)0x2cd3db67,
-  (q31_t)0x2cbc5006, (q31_t)0x2ca4c2ed,
-  (q31_t)0x2c8d341a, (q31_t)0x2c75a390, (q31_t)0x2c5e114f, (q31_t)0x2c467d58, (q31_t)0x2c2ee7ad, (q31_t)0x2c17504d,
-  (q31_t)0x2bffb73a, (q31_t)0x2be81c74,
-  (q31_t)0x2bd07ffe, (q31_t)0x2bb8e1d7, (q31_t)0x2ba14200, (q31_t)0x2b89a07b, (q31_t)0x2b71fd48, (q31_t)0x2b5a5868,
-  (q31_t)0x2b42b1dd, (q31_t)0x2b2b09a6,
-  (q31_t)0x2b135fc6, (q31_t)0x2afbb43c, (q31_t)0x2ae4070a, (q31_t)0x2acc5831, (q31_t)0x2ab4a7b1, (q31_t)0x2a9cf58c,
-  (q31_t)0x2a8541c3, (q31_t)0x2a6d8c55,
-  (q31_t)0x2a55d545, (q31_t)0x2a3e1c93, (q31_t)0x2a266240, (q31_t)0x2a0ea64d, (q31_t)0x29f6e8bb, (q31_t)0x29df298b,
-  (q31_t)0x29c768be, (q31_t)0x29afa654,
-  (q31_t)0x2997e24f, (q31_t)0x29801caf, (q31_t)0x29685576, (q31_t)0x29508ca4, (q31_t)0x2938c23a, (q31_t)0x2920f63a,
-  (q31_t)0x290928a3, (q31_t)0x28f15978,
-  (q31_t)0x28d988b8, (q31_t)0x28c1b666, (q31_t)0x28a9e281, (q31_t)0x28920d0a, (q31_t)0x287a3604, (q31_t)0x28625d6d,
-  (q31_t)0x284a8349, (q31_t)0x2832a796,
-  (q31_t)0x281aca57, (q31_t)0x2802eb8c, (q31_t)0x27eb0b36, (q31_t)0x27d32956, (q31_t)0x27bb45ed, (q31_t)0x27a360fc,
-  (q31_t)0x278b7a84, (q31_t)0x27739285,
-  (q31_t)0x275ba901, (q31_t)0x2743bdf9, (q31_t)0x272bd16d, (q31_t)0x2713e35f, (q31_t)0x26fbf3ce, (q31_t)0x26e402bd,
-  (q31_t)0x26cc102d, (q31_t)0x26b41c1d,
-  (q31_t)0x269c268f, (q31_t)0x26842f84, (q31_t)0x266c36fe, (q31_t)0x26543cfb, (q31_t)0x263c417f, (q31_t)0x26244489,
-  (q31_t)0x260c461b, (q31_t)0x25f44635,
-  (q31_t)0x25dc44d9, (q31_t)0x25c44207, (q31_t)0x25ac3dc0, (q31_t)0x25943806, (q31_t)0x257c30d8, (q31_t)0x25642839,
-  (q31_t)0x254c1e28, (q31_t)0x253412a8,
-  (q31_t)0x251c05b8, (q31_t)0x2503f75a, (q31_t)0x24ebe78f, (q31_t)0x24d3d657, (q31_t)0x24bbc3b4, (q31_t)0x24a3afa6,
-  (q31_t)0x248b9a2f, (q31_t)0x2473834f,
-  (q31_t)0x245b6b07, (q31_t)0x24435158, (q31_t)0x242b3644, (q31_t)0x241319ca, (q31_t)0x23fafbec, (q31_t)0x23e2dcac,
-  (q31_t)0x23cabc09, (q31_t)0x23b29a05,
-  (q31_t)0x239a76a0, (q31_t)0x238251dd, (q31_t)0x236a2bba, (q31_t)0x2352043b, (q31_t)0x2339db5e, (q31_t)0x2321b126,
-  (q31_t)0x23098593, (q31_t)0x22f158a7,
-  (q31_t)0x22d92a61, (q31_t)0x22c0fac4, (q31_t)0x22a8c9cf, (q31_t)0x22909785, (q31_t)0x227863e5, (q31_t)0x22602ef1,
-  (q31_t)0x2247f8aa, (q31_t)0x222fc111,
-  (q31_t)0x22178826, (q31_t)0x21ff4dea, (q31_t)0x21e71260, (q31_t)0x21ced586, (q31_t)0x21b6975f, (q31_t)0x219e57eb,
-  (q31_t)0x2186172b, (q31_t)0x216dd521,
-  (q31_t)0x215591cc, (q31_t)0x213d4d2f, (q31_t)0x21250749, (q31_t)0x210cc01d, (q31_t)0x20f477aa, (q31_t)0x20dc2df2,
-  (q31_t)0x20c3e2f5, (q31_t)0x20ab96b5,
-  (q31_t)0x20934933, (q31_t)0x207afa6f, (q31_t)0x2062aa6b, (q31_t)0x204a5927, (q31_t)0x203206a4, (q31_t)0x2019b2e4,
-  (q31_t)0x20015de7, (q31_t)0x1fe907ae,
-  (q31_t)0x1fd0b03a, (q31_t)0x1fb8578b, (q31_t)0x1f9ffda4, (q31_t)0x1f87a285, (q31_t)0x1f6f462f, (q31_t)0x1f56e8a2,
-  (q31_t)0x1f3e89e0, (q31_t)0x1f2629ea,
-  (q31_t)0x1f0dc8c0, (q31_t)0x1ef56664, (q31_t)0x1edd02d6, (q31_t)0x1ec49e17, (q31_t)0x1eac3829, (q31_t)0x1e93d10c,
-  (q31_t)0x1e7b68c2, (q31_t)0x1e62ff4a,
-  (q31_t)0x1e4a94a7, (q31_t)0x1e3228d9, (q31_t)0x1e19bbe0, (q31_t)0x1e014dbf, (q31_t)0x1de8de75, (q31_t)0x1dd06e04,
-  (q31_t)0x1db7fc6d, (q31_t)0x1d9f89b1,
-  (q31_t)0x1d8715d0, (q31_t)0x1d6ea0cc, (q31_t)0x1d562aa6, (q31_t)0x1d3db35e, (q31_t)0x1d253af5, (q31_t)0x1d0cc16c,
-  (q31_t)0x1cf446c5, (q31_t)0x1cdbcb00,
-  (q31_t)0x1cc34e1f, (q31_t)0x1caad021, (q31_t)0x1c925109, (q31_t)0x1c79d0d6, (q31_t)0x1c614f8b, (q31_t)0x1c48cd27,
-  (q31_t)0x1c3049ac, (q31_t)0x1c17c51b,
-  (q31_t)0x1bff3f75, (q31_t)0x1be6b8ba, (q31_t)0x1bce30ec, (q31_t)0x1bb5a80c, (q31_t)0x1b9d1e1a, (q31_t)0x1b849317,
-  (q31_t)0x1b6c0705, (q31_t)0x1b5379e5,
-  (q31_t)0x1b3aebb6, (q31_t)0x1b225c7b, (q31_t)0x1b09cc34, (q31_t)0x1af13ae3, (q31_t)0x1ad8a887, (q31_t)0x1ac01522,
-  (q31_t)0x1aa780b6, (q31_t)0x1a8eeb42,
-  (q31_t)0x1a7654c8, (q31_t)0x1a5dbd49, (q31_t)0x1a4524c6, (q31_t)0x1a2c8b3f, (q31_t)0x1a13f0b6, (q31_t)0x19fb552c,
-  (q31_t)0x19e2b8a2, (q31_t)0x19ca1b17,
-  (q31_t)0x19b17c8f, (q31_t)0x1998dd09, (q31_t)0x19803c86, (q31_t)0x19679b07, (q31_t)0x194ef88e, (q31_t)0x1936551b,
-  (q31_t)0x191db0af, (q31_t)0x19050b4b,
-  (q31_t)0x18ec64f0, (q31_t)0x18d3bda0, (q31_t)0x18bb155a, (q31_t)0x18a26c20, (q31_t)0x1889c1f3, (q31_t)0x187116d4,
-  (q31_t)0x18586ac3, (q31_t)0x183fbdc3,
-  (q31_t)0x18270fd3, (q31_t)0x180e60f4, (q31_t)0x17f5b129, (q31_t)0x17dd0070, (q31_t)0x17c44ecd, (q31_t)0x17ab9c3e,
-  (q31_t)0x1792e8c6, (q31_t)0x177a3466,
-  (q31_t)0x17617f1d, (q31_t)0x1748c8ee, (q31_t)0x173011d9, (q31_t)0x171759df, (q31_t)0x16fea102, (q31_t)0x16e5e741,
-  (q31_t)0x16cd2c9f, (q31_t)0x16b4711b,
-  (q31_t)0x169bb4b7, (q31_t)0x1682f774, (q31_t)0x166a3953, (q31_t)0x16517a55, (q31_t)0x1638ba7a, (q31_t)0x161ff9c4,
-  (q31_t)0x16073834, (q31_t)0x15ee75cb,
-  (q31_t)0x15d5b288, (q31_t)0x15bcee6f, (q31_t)0x15a4297f, (q31_t)0x158b63b9, (q31_t)0x15729d1f, (q31_t)0x1559d5b1,
-  (q31_t)0x15410d70, (q31_t)0x1528445d,
-  (q31_t)0x150f7a7a, (q31_t)0x14f6afc7, (q31_t)0x14dde445, (q31_t)0x14c517f4, (q31_t)0x14ac4ad7, (q31_t)0x14937cee,
-  (q31_t)0x147aae3a, (q31_t)0x1461debc,
-  (q31_t)0x14490e74, (q31_t)0x14303d65, (q31_t)0x14176b8e, (q31_t)0x13fe98f1, (q31_t)0x13e5c58e, (q31_t)0x13ccf167,
-  (q31_t)0x13b41c7d, (q31_t)0x139b46d0,
-  (q31_t)0x13827062, (q31_t)0x13699933, (q31_t)0x1350c144, (q31_t)0x1337e897, (q31_t)0x131f0f2c, (q31_t)0x13063505,
-  (q31_t)0x12ed5a21, (q31_t)0x12d47e83,
-  (q31_t)0x12bba22b, (q31_t)0x12a2c51b, (q31_t)0x1289e752, (q31_t)0x127108d2, (q31_t)0x1258299c, (q31_t)0x123f49b2,
-  (q31_t)0x12266913, (q31_t)0x120d87c1,
-  (q31_t)0x11f4a5bd, (q31_t)0x11dbc307, (q31_t)0x11c2dfa2, (q31_t)0x11a9fb8d, (q31_t)0x119116c9, (q31_t)0x11783159,
-  (q31_t)0x115f4b3c, (q31_t)0x11466473,
-  (q31_t)0x112d7d00, (q31_t)0x111494e4, (q31_t)0x10fbac1e, (q31_t)0x10e2c2b2, (q31_t)0x10c9d89e, (q31_t)0x10b0ede5,
-  (q31_t)0x10980287, (q31_t)0x107f1686,
-  (q31_t)0x106629e1, (q31_t)0x104d3c9b, (q31_t)0x10344eb4, (q31_t)0x101b602d, (q31_t)0x10027107, (q31_t)0xfe98143,
-  (q31_t)0xfd090e1, (q31_t)0xfb79fe4,
-  (q31_t)0xf9eae4c, (q31_t)0xf85bc19, (q31_t)0xf6cc94e, (q31_t)0xf53d5ea, (q31_t)0xf3ae1ee, (q31_t)0xf21ed5d, (q31_t)0xf08f836,
-  (q31_t)0xef0027b,
-  (q31_t)0xed70c2c, (q31_t)0xebe154b, (q31_t)0xea51dd8, (q31_t)0xe8c25d5, (q31_t)0xe732d42, (q31_t)0xe5a3421, (q31_t)0xe413a72,
-  (q31_t)0xe284036,
-  (q31_t)0xe0f456f, (q31_t)0xdf64a1c, (q31_t)0xddd4e40, (q31_t)0xdc451dc, (q31_t)0xdab54ef, (q31_t)0xd92577b, (q31_t)0xd795982,
-  (q31_t)0xd605b03,
-  (q31_t)0xd475c00, (q31_t)0xd2e5c7b, (q31_t)0xd155c73, (q31_t)0xcfc5bea, (q31_t)0xce35ae1, (q31_t)0xcca5959, (q31_t)0xcb15752,
-  (q31_t)0xc9854cf,
-  (q31_t)0xc7f51cf, (q31_t)0xc664e53, (q31_t)0xc4d4a5d, (q31_t)0xc3445ee, (q31_t)0xc1b4107, (q31_t)0xc023ba7, (q31_t)0xbe935d2,
-  (q31_t)0xbd02f87,
-  (q31_t)0xbb728c7, (q31_t)0xb9e2193, (q31_t)0xb8519ed, (q31_t)0xb6c11d5, (q31_t)0xb53094d, (q31_t)0xb3a0055, (q31_t)0xb20f6ee,
-  (q31_t)0xb07ed19,
-  (q31_t)0xaeee2d7, (q31_t)0xad5d829, (q31_t)0xabccd11, (q31_t)0xaa3c18e, (q31_t)0xa8ab5a2, (q31_t)0xa71a94f, (q31_t)0xa589c94,
-  (q31_t)0xa3f8f73,
-  (q31_t)0xa2681ed, (q31_t)0xa0d7403, (q31_t)0x9f465b5, (q31_t)0x9db5706, (q31_t)0x9c247f5, (q31_t)0x9a93884, (q31_t)0x99028b3,
-  (q31_t)0x9771884,
-  (q31_t)0x95e07f8, (q31_t)0x944f70f, (q31_t)0x92be5ca, (q31_t)0x912d42c, (q31_t)0x8f9c233, (q31_t)0x8e0afe2, (q31_t)0x8c79d3a,
-  (q31_t)0x8ae8a3a,
-  (q31_t)0x89576e5, (q31_t)0x87c633c, (q31_t)0x8634f3e, (q31_t)0x84a3aee, (q31_t)0x831264c, (q31_t)0x8181159, (q31_t)0x7fefc16,
-  (q31_t)0x7e5e685,
-  (q31_t)0x7ccd0a5, (q31_t)0x7b3ba78, (q31_t)0x79aa400, (q31_t)0x7818d3c, (q31_t)0x768762e, (q31_t)0x74f5ed7, (q31_t)0x7364738,
-  (q31_t)0x71d2f52,
-  (q31_t)0x7041726, (q31_t)0x6eafeb4, (q31_t)0x6d1e5fe, (q31_t)0x6b8cd05, (q31_t)0x69fb3c9, (q31_t)0x6869a4c, (q31_t)0x66d808f,
-  (q31_t)0x6546692,
-  (q31_t)0x63b4c57, (q31_t)0x62231de, (q31_t)0x6091729, (q31_t)0x5effc38, (q31_t)0x5d6e10c, (q31_t)0x5bdc5a7, (q31_t)0x5a4aa09,
-  (q31_t)0x58b8e34,
-  (q31_t)0x5727228, (q31_t)0x55955e6, (q31_t)0x540396f, (q31_t)0x5271cc4, (q31_t)0x50dffe7, (q31_t)0x4f4e2d8, (q31_t)0x4dbc597,
-  (q31_t)0x4c2a827,
-  (q31_t)0x4a98a88, (q31_t)0x4906cbb, (q31_t)0x4774ec1, (q31_t)0x45e309a, (q31_t)0x4451249, (q31_t)0x42bf3cd, (q31_t)0x412d528,
-  (q31_t)0x3f9b65b,
-  (q31_t)0x3e09767, (q31_t)0x3c7784d, (q31_t)0x3ae590d, (q31_t)0x39539a9, (q31_t)0x37c1a22, (q31_t)0x362fa78, (q31_t)0x349daac,
-  (q31_t)0x330bac1,
-  (q31_t)0x3179ab5, (q31_t)0x2fe7a8c, (q31_t)0x2e55a44, (q31_t)0x2cc39e1, (q31_t)0x2b31961, (q31_t)0x299f8c7, (q31_t)0x280d813,
-  (q31_t)0x267b747,
-  (q31_t)0x24e9662, (q31_t)0x2357567, (q31_t)0x21c5457, (q31_t)0x2033331, (q31_t)0x1ea11f7, (q31_t)0x1d0f0ab, (q31_t)0x1b7cf4d,
-  (q31_t)0x19eaddd,
-  (q31_t)0x1858c5e, (q31_t)0x16c6ad0, (q31_t)0x1534934, (q31_t)0x13a278a, (q31_t)0x12105d5, (q31_t)0x107e414, (q31_t)0xeec249,
-  (q31_t)0xd5a075,
-  (q31_t)0xbc7e99, (q31_t)0xa35cb5, (q31_t)0x8a3acb, (q31_t)0x7118dc, (q31_t)0x57f6e9, (q31_t)0x3ed4f2, (q31_t)0x25b2f8,
-  (q31_t)0xc90fe
-};
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) 
-    const q31_t WeightsQ31_8192[16384] = {
-  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d, (q31_t)0xffed2684,
-  (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08, (q31_t)0x7ffff872, (q31_t)0xffd40489,
-  (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e, (q31_t)0x7fffed57, (q31_t)0xffbae290,
-  (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917, (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,
-  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724, (q31_t)0x7fffc854, (q31_t)0xff889ea7,
-  (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535, (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,
-  (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b, (q31_t)0x7fff8f94, (q31_t)0xff565ad1,
-  (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167, (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,
-  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b, (q31_t)0x7fff4317, (q31_t)0xff241715,
-  (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7, (q31_t)0x7fff1572, (q31_t)0xff0af543,
-  (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec, (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,
-  (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b, (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,
-  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876, (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,
-  (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc, (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,
-  (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530, (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,
-  (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2, (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,
-  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223, (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,
-  (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3, (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,
-  (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55, (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,
-  (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09, (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,
-  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf, (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,
-  (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9, (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,
-  (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99, (q31_t)0x7ffb0300, (q31_t)0xfdc44258,
-  (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da, (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e, (q31_t)0x7ffa9045, (q31_t)0xfdab2162,
-  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0, (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9, (q31_t)0x7ffa189c, (q31_t)0xfd920084,
-  (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e, (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed, (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,
-  (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64, (q31_t)0x7ff93b54, (q31_t)0xfd660739, (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,
-  (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3, (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f, (q31_t)0x7ff89405, (q31_t)0xfd469e7c,
-  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d, (q31_t)0x7ff82bef, (q31_t)0xfd33c61f, (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,
-  (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2, (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc, (q31_t)0x7ff7784a, (q31_t)0xfd145da7,
-  (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83, (q31_t)0x7ff708ce, (q31_t)0xfd018574, (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,
-  (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52, (q31_t)0x7ff66fd7, (q31_t)0xfce8654b, (q31_t)0x7ff648d4, (q31_t)0xfce21d45,
-  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f, (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f, (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,
-  (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c, (q31_t)0x7ff52f1d, (q31_t)0xfcb62554, (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,
-  (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78, (q31_t)0x7ff48759, (q31_t)0xfc9d0588, (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,
-  (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6, (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de, (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,
-  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36, (q31_t)0x7ff32905, (q31_t)0xfc6ac657, (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,
-  (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9, (q31_t)0x7ff27275, (q31_t)0xfc51a6f3, (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,
-  (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80, (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3, (q31_t)0x7ff18751, (q31_t)0xfc323fe9,
-  (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c, (q31_t)0x7ff0f688, (q31_t)0xfc1f6899, (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,
-  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e, (q31_t)0x7ff0312c, (q31_t)0xfc0649a5, (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,
-  (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287, (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8, (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,
-  (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7feecbec, (q31_t)0xfbda53d8, (q31_t)0x7fee97a7, (q31_t)0xfbd40c33, (q31_t)0x7fee6313, (q31_t)0xfbcdc490,
-  (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0, (q31_t)0x7fedf8ff, (q31_t)0xfbc13552, (q31_t)0x7fedc37e, (q31_t)0xfbbaedb7, (q31_t)0x7fed8daf, (q31_t)0xfbb4a61f,
-  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fed2123, (q31_t)0xfba816f6, (q31_t)0x7fecea67, (q31_t)0xfba1cf66, (q31_t)0x7fecb35c, (q31_t)0xfb9b87d8,
-  (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7fec4459, (q31_t)0xfb8ef8c5, (q31_t)0x7fec0c62, (q31_t)0xfb88b13f, (q31_t)0x7febd41b, (q31_t)0xfb8269bd,
-  (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0, (q31_t)0x7feb296d, (q31_t)0xfb6f9345, (q31_t)0x7feaefeb, (q31_t)0xfb694bce,
-  (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7, (q31_t)0x7fea418b, (q31_t)0xfb567578, (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,
-  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe99064, (q31_t)0xfb439f3c, (q31_t)0x7fe954ba, (q31_t)0xfb3d57d9, (q31_t)0x7fe918c0, (q31_t)0xfb371078,
-  (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe89fe0, (q31_t)0xfb2a81c0, (q31_t)0x7fe862fa, (q31_t)0xfb243a69, (q31_t)0x7fe825c5, (q31_t)0xfb1df314,
-  (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474, (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28, (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,
-  (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758, (q31_t)0x7fe670b0, (q31_t)0xfaf20019, (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,
-  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe5b0be, (q31_t)0xfadf2a6e, (q31_t)0x7fe57025, (q31_t)0xfad8e33c, (q31_t)0x7fe52f3d, (q31_t)0xfad29c0c,
-  (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe4ac81, (q31_t)0xfac60db7, (q31_t)0x7fe46aac, (q31_t)0xfabfc691, (q31_t)0x7fe42889, (q31_t)0xfab97f6e,
-  (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe3a355, (q31_t)0xfaacf133, (q31_t)0x7fe36045, (q31_t)0xfaa6aa1a, (q31_t)0x7fe31ce6, (q31_t)0xfaa06305,
-  (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3, (q31_t)0x7fe2953b, (q31_t)0xfa93d4e4, (q31_t)0x7fe250ef, (q31_t)0xfa8d8dd8, (q31_t)0x7fe20c55, (q31_t)0xfa8746d0,
-  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe18233, (q31_t)0xfa7ab8ca, (q31_t)0x7fe13cac, (q31_t)0xfa7471cc, (q31_t)0x7fe0f6d6, (q31_t)0xfa6e2ad1,
-  (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fe06a3d, (q31_t)0xfa619ce7, (q31_t)0x7fe0237a, (q31_t)0xfa5b55f7, (q31_t)0x7fdfdc69, (q31_t)0xfa550f0a,
-  (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fdf4d59, (q31_t)0xfa48813b, (q31_t)0x7fdf055a, (q31_t)0xfa423a59, (q31_t)0x7fdebd0d, (q31_t)0xfa3bf37a,
-  (q31_t)0x7fde7471, (q31_t)0xfa35ac9f, (q31_t)0x7fde2b86, (q31_t)0xfa2f65c8, (q31_t)0x7fdde24d, (q31_t)0xfa291ef4, (q31_t)0x7fdd98c4, (q31_t)0xfa22d823,
-  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdd04c6, (q31_t)0xfa164a8e, (q31_t)0x7fdcba51, (q31_t)0xfa1003c8, (q31_t)0x7fdc6f8d, (q31_t)0xfa09bd06,
-  (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdbd918, (q31_t)0xf9fd2f8e, (q31_t)0x7fdb8d67, (q31_t)0xf9f6e8d7, (q31_t)0x7fdb4167, (q31_t)0xf9f0a224,
-  (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fdaa87c, (q31_t)0xf9e414ca, (q31_t)0x7fda5b8f, (q31_t)0xf9ddce22, (q31_t)0x7fda0e54, (q31_t)0xf9d7877e,
-  (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de, (q31_t)0x7fd972f2, (q31_t)0xf9cafa42, (q31_t)0x7fd924ca, (q31_t)0xf9c4b3a9, (q31_t)0x7fd8d653, (q31_t)0xf9be6d15,
-  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd8387a, (q31_t)0xf9b1dff7, (q31_t)0x7fd7e917, (q31_t)0xf9ab996e, (q31_t)0x7fd79965, (q31_t)0xf9a552e9,
-  (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6f914, (q31_t)0xf998c5ea, (q31_t)0x7fd6a875, (q31_t)0xf9927f71, (q31_t)0x7fd65788, (q31_t)0xf98c38fc,
-  (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd5b4c1, (q31_t)0xf97fac1d, (q31_t)0x7fd562e7, (q31_t)0xf97965b4, (q31_t)0x7fd510be, (q31_t)0xf9731f4e,
-  (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed, (q31_t)0x7fd46b80, (q31_t)0xf9669290, (q31_t)0x7fd4186a, (q31_t)0xf9604c37, (q31_t)0x7fd3c506, (q31_t)0xf95a05e2,
-  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd31d51, (q31_t)0xf94d7944, (q31_t)0x7fd2c900, (q31_t)0xf94732fb, (q31_t)0x7fd27460, (q31_t)0xf940ecb7,
-  (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd1ca35, (q31_t)0xf934603a, (q31_t)0x7fd174a8, (q31_t)0xf92e1a02, (q31_t)0x7fd11ecd, (q31_t)0xf927d3ce,
-  (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fd0722b, (q31_t)0xf91b4773, (q31_t)0x7fd01b63, (q31_t)0xf915014c, (q31_t)0x7fcfc44d, (q31_t)0xf90ebb29,
-  (q31_t)0x7fcf6ce8, (q31_t)0xf908750a, (q31_t)0x7fcf1533, (q31_t)0xf9022ef0, (q31_t)0x7fcebd31, (q31_t)0xf8fbe8da, (q31_t)0x7fce64df, (q31_t)0xf8f5a2c9,
-  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcdb34f, (q31_t)0xf8e916b2, (q31_t)0x7fcd5a11, (q31_t)0xf8e2d0ae, (q31_t)0x7fcd0083, (q31_t)0xf8dc8aae,
-  (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcc4c7d, (q31_t)0xf8cffebb, (q31_t)0x7fcbf203, (q31_t)0xf8c9b8c8, (q31_t)0x7fcb973b, (q31_t)0xf8c372d9,
-  (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fcae0bd, (q31_t)0xf8b6e70a, (q31_t)0x7fca8508, (q31_t)0xf8b0a129, (q31_t)0x7fca2905, (q31_t)0xf8aa5b4c,
-  (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574, (q31_t)0x7fc97011, (q31_t)0xf89dcfa1, (q31_t)0x7fc91320, (q31_t)0xf89789d2, (q31_t)0x7fc8b5e1, (q31_t)0xf8914407,
-  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc7fa77, (q31_t)0xf884b880, (q31_t)0x7fc79c4b, (q31_t)0xf87e72c4, (q31_t)0x7fc73dd1, (q31_t)0xf8782d0c,
-  (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc67ff0, (q31_t)0xf86ba1aa, (q31_t)0x7fc62089, (q31_t)0xf8655c00, (q31_t)0x7fc5c0d3, (q31_t)0xf85f165b,
-  (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc5007c, (q31_t)0xf8528b1f, (q31_t)0x7fc49fda, (q31_t)0xf84c4588, (q31_t)0x7fc43ee9, (q31_t)0xf845fff5,
-  (q31_t)0x7fc3dda9, (q31_t)0xf83fba68, (q31_t)0x7fc37c1b, (q31_t)0xf83974df, (q31_t)0x7fc31a3d, (q31_t)0xf8332f5b, (q31_t)0x7fc2b811, (q31_t)0xf82ce9dc,
-  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc1f2cc, (q31_t)0xf8205eec, (q31_t)0x7fc18fb4, (q31_t)0xf81a197b, (q31_t)0x7fc12c4d, (q31_t)0xf813d410,
-  (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fc06491, (q31_t)0xf8074947, (q31_t)0x7fc0003e, (q31_t)0xf80103ea, (q31_t)0x7fbf9b9b, (q31_t)0xf7fabe92,
-  (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbed16a, (q31_t)0xf7ee33f0, (q31_t)0x7fbe6bdb, (q31_t)0xf7e7eea7, (q31_t)0x7fbe05fd, (q31_t)0xf7e1a963,
-  (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423, (q31_t)0x7fbd3955, (q31_t)0xf7d51ee9, (q31_t)0x7fbcd28b, (q31_t)0xf7ced9b4, (q31_t)0x7fbc6b72, (q31_t)0xf7c89484,
-  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fbb9c53, (q31_t)0xf7bc0a33, (q31_t)0x7fbb344e, (q31_t)0xf7b5c512, (q31_t)0x7fbacbfa, (q31_t)0xf7af7ff6,
-  (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb9fa65, (q31_t)0xf7a2f5ce, (q31_t)0x7fb99125, (q31_t)0xf79cb0c2, (q31_t)0x7fb92796, (q31_t)0xf7966bbb,
-  (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb8538b, (q31_t)0xf789e1bc, (q31_t)0x7fb7e90f, (q31_t)0xf7839cc4, (q31_t)0x7fb77e45, (q31_t)0xf77d57d2,
-  (q31_t)0x7fb7132b, (q31_t)0xf77712e5, (q31_t)0x7fb6a7c3, (q31_t)0xf770cdfd, (q31_t)0x7fb63c0d, (q31_t)0xf76a891b, (q31_t)0x7fb5d007, (q31_t)0xf764443d,
-  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb4f710, (q31_t)0xf757ba93, (q31_t)0x7fb48a1e, (q31_t)0xf75175c6, (q31_t)0x7fb41cdd, (q31_t)0xf74b30fe,
-  (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb34170, (q31_t)0xf73ea77e, (q31_t)0x7fb2d343, (q31_t)0xf73862c6, (q31_t)0x7fb264c7, (q31_t)0xf7321e14,
-  (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb186e3, (q31_t)0xf72594c0, (q31_t)0x7fb1177b, (q31_t)0xf71f501e, (q31_t)0x7fb0a7c4, (q31_t)0xf7190b81,
-  (q31_t)0x7fb037bf, (q31_t)0xf712c6ea, (q31_t)0x7fafc76a, (q31_t)0xf70c8259, (q31_t)0x7faf56c7, (q31_t)0xf7063dcd, (q31_t)0x7faee5d5, (q31_t)0xf6fff946,
-  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7fae0305, (q31_t)0xf6f3704a, (q31_t)0x7fad9127, (q31_t)0xf6ed2bd4, (q31_t)0x7fad1efa, (q31_t)0xf6e6e764,
-  (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7fac39b4, (q31_t)0xf6da5e95, (q31_t)0x7fabc69b, (q31_t)0xf6d41a36, (q31_t)0x7fab5333, (q31_t)0xf6cdd5dc,
-  (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7faa6b77, (q31_t)0xf6c14d3a, (q31_t)0x7fa9f723, (q31_t)0xf6bb08f1, (q31_t)0x7fa98280, (q31_t)0xf6b4c4ae,
-  (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071, (q31_t)0x7fa8984e, (q31_t)0xf6a83c3a, (q31_t)0x7fa822bf, (q31_t)0xf6a1f808, (q31_t)0x7fa7ace1, (q31_t)0xf69bb3dd,
-  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa6c039, (q31_t)0xf68f2b96, (q31_t)0x7fa6496e, (q31_t)0xf688e77c, (q31_t)0x7fa5d256, (q31_t)0xf682a367,
-  (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa4e338, (q31_t)0xf6761b50, (q31_t)0x7fa46b32, (q31_t)0xf66fd74d, (q31_t)0x7fa3f2df, (q31_t)0xf6699350,
-  (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa3014b, (q31_t)0xf65d0b68, (q31_t)0x7fa2880b, (q31_t)0xf656c77c, (q31_t)0x7fa20e7c, (q31_t)0xf6508397,
-  (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8, (q31_t)0x7fa11a72, (q31_t)0xf643fbdf, (q31_t)0x7fa09ff7, (q31_t)0xf63db80b, (q31_t)0x7fa0252e, (q31_t)0xf637743e,
-  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9f2eae, (q31_t)0xf62aecb5, (q31_t)0x7f9eb2f8, (q31_t)0xf624a8fa, (q31_t)0x7f9e36f4, (q31_t)0xf61e6545,
-  (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9d3dfe, (q31_t)0xf611dded, (q31_t)0x7f9cc10d, (q31_t)0xf60b9a4b, (q31_t)0x7f9c43ce, (q31_t)0xf60556ae,
-  (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f9b4863, (q31_t)0xf5f8cf87, (q31_t)0x7f9aca37, (q31_t)0xf5f28bfd, (q31_t)0x7f9a4bbd, (q31_t)0xf5ec4879,
-  (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc, (q31_t)0x7f994ddc, (q31_t)0xf5dfc184, (q31_t)0x7f98ce76, (q31_t)0xf5d97e13, (q31_t)0x7f984ec1, (q31_t)0xf5d33aa8,
-  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f974e6a, (q31_t)0xf5c6b3e5, (q31_t)0x7f96cdc9, (q31_t)0xf5c0708d, (q31_t)0x7f964cd9, (q31_t)0xf5ba2d3b,
-  (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f954a0d, (q31_t)0xf5ada6ab, (q31_t)0x7f94c831, (q31_t)0xf5a7636c, (q31_t)0x7f944606, (q31_t)0xf5a12034,
-  (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f9340c4, (q31_t)0xf59499d6, (q31_t)0x7f92bdad, (q31_t)0xf58e56b1, (q31_t)0x7f923a48, (q31_t)0xf5881393,
-  (q31_t)0x7f91b694, (q31_t)0xf581d07b, (q31_t)0x7f913291, (q31_t)0xf57b8d69, (q31_t)0x7f90ae3f, (q31_t)0xf5754a5e, (q31_t)0x7f90299f, (q31_t)0xf56f0759,
-  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8f1f72, (q31_t)0xf5628163, (q31_t)0x7f8e99e6, (q31_t)0xf55c3e72, (q31_t)0x7f8e140a, (q31_t)0xf555fb88,
-  (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8d0768, (q31_t)0xf54975c6, (q31_t)0x7f8c80a1, (q31_t)0xf54332ef, (q31_t)0x7f8bf98b, (q31_t)0xf53cf01f,
-  (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f8aea74, (q31_t)0xf5306a93, (q31_t)0x7f8a6272, (q31_t)0xf52a27d7, (q31_t)0x7f89da21, (q31_t)0xf523e521,
-  (q31_t)0x7f895182, (q31_t)0xf51da273, (q31_t)0x7f88c894, (q31_t)0xf5175fca, (q31_t)0x7f883f58, (q31_t)0xf5111d29, (q31_t)0x7f87b5cd, (q31_t)0xf50ada8f,
-  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f86a1ca, (q31_t)0xf4fe556e, (q31_t)0x7f861753, (q31_t)0xf4f812e7, (q31_t)0x7f858c8d, (q31_t)0xf4f1d068,
-  (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f847616, (q31_t)0xf4e54b7d, (q31_t)0x7f83ea64, (q31_t)0xf4df0912, (q31_t)0x7f835e64, (q31_t)0xf4d8c6ae,
-  (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f824577, (q31_t)0xf4cc41fb, (q31_t)0x7f81b88a, (q31_t)0xf4c5ffab, (q31_t)0x7f812b4f, (q31_t)0xf4bfbd63,
-  (q31_t)0x7f809dc5, (q31_t)0xf4b97b21, (q31_t)0x7f800fed, (q31_t)0xf4b338e7, (q31_t)0x7f7f81c6, (q31_t)0xf4acf6b3, (q31_t)0x7f7ef350, (q31_t)0xf4a6b486,
-  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7dd579, (q31_t)0xf49a3042, (q31_t)0x7f7d4617, (q31_t)0xf493ee2b, (q31_t)0x7f7cb667, (q31_t)0xf48dac1a,
-  (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f7b961b, (q31_t)0xf481280e, (q31_t)0x7f7b057e, (q31_t)0xf47ae613, (q31_t)0x7f7a7494, (q31_t)0xf474a41f,
-  (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f7951d2, (q31_t)0xf468204b, (q31_t)0x7f78bffb, (q31_t)0xf461de6d, (q31_t)0x7f782dd6, (q31_t)0xf45b9c95,
-  (q31_t)0x7f779b62, (q31_t)0xf4555ac5, (q31_t)0x7f77089f, (q31_t)0xf44f18fb, (q31_t)0x7f76758e, (q31_t)0xf448d739, (q31_t)0x7f75e22e, (q31_t)0xf442957e,
-  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f74ba83, (q31_t)0xf436121e, (q31_t)0x7f742637, (q31_t)0xf42fd079, (q31_t)0x7f73919d, (q31_t)0xf4298edc,
-  (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f72677c, (q31_t)0xf41d0bb6, (q31_t)0x7f71d1f6, (q31_t)0xf416ca2e, (q31_t)0x7f713c21, (q31_t)0xf41088ae,
-  (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f700f8c, (q31_t)0xf40405c3, (q31_t)0x7f6f78cb, (q31_t)0xf3fdc459, (q31_t)0x7f6ee1bc, (q31_t)0xf3f782f6,
-  (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a, (q31_t)0x7f6db2b1, (q31_t)0xf3eb0046, (q31_t)0x7f6d1ab6, (q31_t)0xf3e4bef9, (q31_t)0x7f6c826d, (q31_t)0xf3de7db4,
-  (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f6b50ed, (q31_t)0xf3d1fb40, (q31_t)0x7f6ab7b8, (q31_t)0xf3cbba12, (q31_t)0x7f6a1e34, (q31_t)0xf3c578eb,
-  (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f68ea40, (q31_t)0xf3b8f6b3, (q31_t)0x7f684fd0, (q31_t)0xf3b2b5a3, (q31_t)0x7f67b512, (q31_t)0xf3ac749a,
-  (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f667ea9, (q31_t)0xf39ff29f, (q31_t)0x7f65e2ff, (q31_t)0xf399b1ad, (q31_t)0x7f654706, (q31_t)0xf39370c2,
-  (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0, (q31_t)0x7f640e29, (q31_t)0xf386ef05, (q31_t)0x7f637144, (q31_t)0xf380ae31, (q31_t)0x7f62d411, (q31_t)0xf37a6d66,
-  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f6198bf, (q31_t)0xf36debe6, (q31_t)0x7f60faa0, (q31_t)0xf367ab31, (q31_t)0x7f605c33, (q31_t)0xf3616a85,
-  (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5f1e6c, (q31_t)0xf354e943, (q31_t)0x7f5e7f13, (q31_t)0xf34ea8ae, (q31_t)0x7f5ddf6b, (q31_t)0xf3486820,
-  (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5c9f30, (q31_t)0xf33be71d, (q31_t)0x7f5bfe9d, (q31_t)0xf335a6a7, (q31_t)0x7f5b5dbb, (q31_t)0xf32f6639,
-  (q31_t)0x7f5abc8a, (q31_t)0xf32925d3, (q31_t)0x7f5a1b0b, (q31_t)0xf322e575, (q31_t)0x7f59793e, (q31_t)0xf31ca51f, (q31_t)0x7f58d721, (q31_t)0xf31664d1,
-  (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f5791fd, (q31_t)0xf309e44c, (q31_t)0x7f56eef5, (q31_t)0xf303a416, (q31_t)0x7f564b9f, (q31_t)0xf2fd63e8,
-  (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1, (q31_t)0x7f550407, (q31_t)0xf2f0e3a3, (q31_t)0x7f545fc5, (q31_t)0xf2eaa38d, (q31_t)0x7f53bb34, (q31_t)0xf2e4637f,
-  (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f527127, (q31_t)0xf2d7e37b, (q31_t)0x7f51cbab, (q31_t)0xf2d1a385, (q31_t)0x7f5125e0, (q31_t)0xf2cb6398,
-  (q31_t)0x7f507fc7, (q31_t)0xf2c523b2, (q31_t)0x7f4fd95f, (q31_t)0xf2bee3d5, (q31_t)0x7f4f32a9, (q31_t)0xf2b8a400, (q31_t)0x7f4e8ba4, (q31_t)0xf2b26433,
-  (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4d3caf, (q31_t)0xf2a5e4b1, (q31_t)0x7f4c94be, (q31_t)0xf29fa4fd, (q31_t)0x7f4bec7f, (q31_t)0xf2996551,
-  (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f4a9b16, (q31_t)0xf28ce612, (q31_t)0x7f49f1eb, (q31_t)0xf286a67e, (q31_t)0x7f494872, (q31_t)0xf28066f4,
-  (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f47f494, (q31_t)0xf273e7f7, (q31_t)0x7f474a30, (q31_t)0xf26da885, (q31_t)0x7f469f7d, (q31_t)0xf267691b,
-  (q31_t)0x7f45f47b, (q31_t)0xf26129ba, (q31_t)0x7f45492b, (q31_t)0xf25aea61, (q31_t)0x7f449d8c, (q31_t)0xf254ab11, (q31_t)0x7f43f19f, (q31_t)0xf24e6bc9,
-  (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f4298d9, (q31_t)0xf241ed53, (q31_t)0x7f41ec01, (q31_t)0xf23bae24, (q31_t)0x7f413ed9, (q31_t)0xf2356efe,
-  (q31_t)0x7f409164, (q31_t)0xf22f2fe1, (q31_t)0x7f3fe3a0, (q31_t)0xf228f0cc, (q31_t)0x7f3f358d, (q31_t)0xf222b1c0, (q31_t)0x7f3e872c, (q31_t)0xf21c72bc,
-  (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3d297e, (q31_t)0xf20ff4ce, (q31_t)0x7f3c7a31, (q31_t)0xf209b5e4, (q31_t)0x7f3bca96, (q31_t)0xf2037702,
-  (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829, (q31_t)0x7f3a6a75, (q31_t)0xf1f6f959, (q31_t)0x7f39b9ee, (q31_t)0xf1f0ba91, (q31_t)0x7f390919, (q31_t)0xf1ea7bd2,
-  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f37a684, (q31_t)0xf1ddfe6f, (q31_t)0x7f36f4c3, (q31_t)0xf1d7bfca, (q31_t)0x7f3642b4, (q31_t)0xf1d1812e,
-  (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f34ddab, (q31_t)0xf1c50410, (q31_t)0x7f342ab1, (q31_t)0xf1bec58e, (q31_t)0x7f337768, (q31_t)0xf1b88715,
-  (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f320feb, (q31_t)0xf1ac0a3e, (q31_t)0x7f315bb7, (q31_t)0xf1a5cbdf, (q31_t)0x7f30a734, (q31_t)0xf19f8d89,
-  (q31_t)0x7f2ff263, (q31_t)0xf1994f3d, (q31_t)0x7f2f3d44, (q31_t)0xf19310f9, (q31_t)0x7f2e87d6, (q31_t)0xf18cd2be, (q31_t)0x7f2dd219, (q31_t)0xf186948c,
-  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2c65b5, (q31_t)0xf17a1842, (q31_t)0x7f2baf0d, (q31_t)0xf173da2b, (q31_t)0x7f2af817, (q31_t)0xf16d9c1d,
-  (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f29893f, (q31_t)0xf161201b, (q31_t)0x7f28d15d, (q31_t)0xf15ae228, (q31_t)0x7f28192d, (q31_t)0xf154a43d,
-  (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f26a7e2, (q31_t)0xf1482884, (q31_t)0x7f25eec7, (q31_t)0xf141eab5, (q31_t)0x7f25355d, (q31_t)0xf13bacef,
-  (q31_t)0x7f247ba5, (q31_t)0xf1356f32, (q31_t)0x7f23c19e, (q31_t)0xf12f317e, (q31_t)0x7f230749, (q31_t)0xf128f3d4, (q31_t)0x7f224ca6, (q31_t)0xf122b632,
-  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f20d674, (q31_t)0xf1163b0b, (q31_t)0x7f201ae5, (q31_t)0xf10ffd85, (q31_t)0x7f1f5f08, (q31_t)0xf109c009,
-  (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1de662, (q31_t)0xf0fd452b, (q31_t)0x7f1d299a, (q31_t)0xf0f707ca, (q31_t)0x7f1c6c83, (q31_t)0xf0f0ca72,
-  (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f1af16a, (q31_t)0xf0e44fdf, (q31_t)0x7f1a3368, (q31_t)0xf0de12a3, (q31_t)0x7f197518, (q31_t)0xf0d7d571,
-  (q31_t)0x7f18b679, (q31_t)0xf0d19848, (q31_t)0x7f17f78c, (q31_t)0xf0cb5b28, (q31_t)0x7f173850, (q31_t)0xf0c51e12, (q31_t)0x7f1678c6, (q31_t)0xf0bee105,
-  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f14f8c7, (q31_t)0xf0b26707, (q31_t)0x7f143852, (q31_t)0xf0ac2a16, (q31_t)0x7f13778e, (q31_t)0xf0a5ed2f,
-  (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f11f51c, (q31_t)0xf099737d, (q31_t)0x7f11336d, (q31_t)0xf09336b2, (q31_t)0x7f107170, (q31_t)0xf08cf9f1,
-  (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0eec8b, (q31_t)0xf080808b, (q31_t)0x7f0e29a3, (q31_t)0xf07a43e7, (q31_t)0x7f0d666c, (q31_t)0xf074074c,
-  (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba, (q31_t)0x7f0bdf14, (q31_t)0xf0678e32, (q31_t)0x7f0b1af2, (q31_t)0xf06151b4, (q31_t)0x7f0a5682, (q31_t)0xf05b1540,
-  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f08ccb7, (q31_t)0xf04e9c73, (q31_t)0x7f08075c, (q31_t)0xf048601c, (q31_t)0x7f0741b2, (q31_t)0xf04223ce,
-  (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f05b574, (q31_t)0xf035ab4f, (q31_t)0x7f04eedf, (q31_t)0xf02f6f1f, (q31_t)0x7f0427fc, (q31_t)0xf02932f8,
-  (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f02994b, (q31_t)0xf01cbac7, (q31_t)0x7f01d17d, (q31_t)0xf0167ebd, (q31_t)0x7f010961, (q31_t)0xf01042be,
-  (q31_t)0x7f0040f6, (q31_t)0xf00a06c8, (q31_t)0x7eff783d, (q31_t)0xf003cadc, (q31_t)0x7efeaf36, (q31_t)0xeffd8ef9, (q31_t)0x7efde5e0, (q31_t)0xeff75321,
-  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7efc524a, (q31_t)0xefeadb8e, (q31_t)0x7efb8809, (q31_t)0xefe49fd3, (q31_t)0x7efabd7a, (q31_t)0xefde6423,
-  (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef92771, (q31_t)0xefd1ecdf, (q31_t)0x7ef85bf7, (q31_t)0xefcbb14c, (q31_t)0x7ef7902f, (q31_t)0xefc575c3,
-  (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef5f7b3, (q31_t)0xefb8fed0, (q31_t)0x7ef52b00, (q31_t)0xefb2c365, (q31_t)0x7ef45dfe, (q31_t)0xefac8804,
-  (q31_t)0x7ef390ae, (q31_t)0xefa64cae, (q31_t)0x7ef2c310, (q31_t)0xefa01161, (q31_t)0x7ef1f524, (q31_t)0xef99d61f, (q31_t)0x7ef126e9, (q31_t)0xef939ae6,
-  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eef8988, (q31_t)0xef872494, (q31_t)0x7eeeba62, (q31_t)0xef80e97a, (q31_t)0x7eedeaee, (q31_t)0xef7aae6b,
-  (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7eec4b1b, (q31_t)0xef6e386a, (q31_t)0x7eeb7abc, (q31_t)0xef67fd79, (q31_t)0x7eeaaa0f, (q31_t)0xef61c292,
-  (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee907ca, (q31_t)0xef554ce3, (q31_t)0x7ee83632, (q31_t)0xef4f121b, (q31_t)0x7ee7644c, (q31_t)0xef48d75d,
-  (q31_t)0x7ee69217, (q31_t)0xef429caa, (q31_t)0x7ee5bf94, (q31_t)0xef3c6201, (q31_t)0x7ee4ecc3, (q31_t)0xef362762, (q31_t)0x7ee419a3, (q31_t)0xef2feccd,
-  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7ee2727a, (q31_t)0xef2377c4, (q31_t)0x7ee19e6f, (q31_t)0xef1d3d4e, (q31_t)0x7ee0ca17, (q31_t)0xef1702e4,
-  (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edf207b, (q31_t)0xef0a8e2d, (q31_t)0x7ede4b38, (q31_t)0xef0453e2, (q31_t)0x7edd75a6, (q31_t)0xeefe19a1,
-  (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7edbc998, (q31_t)0xeef1a53e, (q31_t)0x7edaf31c, (q31_t)0xeeeb6b1c, (q31_t)0x7eda1c51, (q31_t)0xeee53105,
-  (q31_t)0x7ed94538, (q31_t)0xeedef6f9, (q31_t)0x7ed86dd1, (q31_t)0xeed8bcf7, (q31_t)0x7ed7961c, (q31_t)0xeed28300, (q31_t)0x7ed6be18, (q31_t)0xeecc4913,
-  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed50d26, (q31_t)0xeebfd55a, (q31_t)0x7ed43438, (q31_t)0xeeb99b8d, (q31_t)0x7ed35afb, (q31_t)0xeeb361cb,
-  (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ed1a798, (q31_t)0xeea6ee66, (q31_t)0x7ed0cd70, (q31_t)0xeea0b4c4, (q31_t)0x7ecff2fb, (q31_t)0xee9a7b2d,
-  (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ece3d25, (q31_t)0xee8e081e, (q31_t)0x7ecd61c5, (q31_t)0xee87cea7, (q31_t)0x7ecc8617, (q31_t)0xee81953b,
-  (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9, (q31_t)0x7ecacdd0, (q31_t)0xee752283, (q31_t)0x7ec9f137, (q31_t)0xee6ee937, (q31_t)0x7ec9144f, (q31_t)0xee68aff6,
-  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec75996, (q31_t)0xee5c3d94, (q31_t)0x7ec67bc5, (q31_t)0xee560473, (q31_t)0x7ec59da5, (q31_t)0xee4fcb5e,
-  (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec3e07a, (q31_t)0xee435953, (q31_t)0x7ec3016f, (q31_t)0xee3d205e, (q31_t)0x7ec22217, (q31_t)0xee36e775,
-  (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ec0627a, (q31_t)0xee2a75c2, (q31_t)0x7ebf8237, (q31_t)0xee243cf9, (q31_t)0x7ebea1a6, (q31_t)0xee1e043b,
-  (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88, (q31_t)0x7ebcdf98, (q31_t)0xee1192e0, (q31_t)0x7ebbfe1c, (q31_t)0xee0b5a43, (q31_t)0x7ebb1c52, (q31_t)0xee0521b2,
-  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb957d2, (q31_t)0xedf8b0b0, (q31_t)0x7eb8751e, (q31_t)0xedf2783f, (q31_t)0x7eb7921b, (q31_t)0xedec3fda,
-  (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb5cb2a, (q31_t)0xeddfcf31, (q31_t)0x7eb4e73d, (q31_t)0xedd996ed, (q31_t)0x7eb40301, (q31_t)0xedd35eb5,
-  (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eb239a0, (q31_t)0xedc6ee65, (q31_t)0x7eb1547a, (q31_t)0xedc0b64e, (q31_t)0x7eb06f05, (q31_t)0xedba7e43,
-  (q31_t)0x7eaf8943, (q31_t)0xedb44642, (q31_t)0x7eaea333, (q31_t)0xedae0e4d, (q31_t)0x7eadbcd4, (q31_t)0xeda7d664, (q31_t)0x7eacd627, (q31_t)0xeda19e85,
-  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7eab07e3, (q31_t)0xed952eea, (q31_t)0x7eaa204c, (q31_t)0xed8ef72e, (q31_t)0x7ea93867, (q31_t)0xed88bf7d,
-  (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea767b2, (q31_t)0xed7c503d, (q31_t)0x7ea67ee2, (q31_t)0xed7618ae, (q31_t)0x7ea595c4, (q31_t)0xed6fe12b,
-  (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea3c29e, (q31_t)0xed637246, (q31_t)0x7ea2d896, (q31_t)0xed5d3ae5, (q31_t)0x7ea1ee3f, (q31_t)0xed570390,
-  (q31_t)0x7ea1039b, (q31_t)0xed50cc46, (q31_t)0x7ea018a8, (q31_t)0xed4a9507, (q31_t)0x7e9f2d68, (q31_t)0xed445dd5, (q31_t)0x7e9e41d9, (q31_t)0xed3e26ad,
-  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e9c69d1, (q31_t)0xed31b881, (q31_t)0x7e9b7d58, (q31_t)0xed2b817d, (q31_t)0x7e9a9091, (q31_t)0xed254a84,
-  (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e98b618, (q31_t)0xed18dcb5, (q31_t)0x7e97c867, (q31_t)0xed12a5df, (q31_t)0x7e96da67, (q31_t)0xed0c6f14,
-  (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e94fd7e, (q31_t)0xed0001a3, (q31_t)0x7e940e94, (q31_t)0xecf9cafb, (q31_t)0x7e931f5c, (q31_t)0xecf39460,
-  (q31_t)0x7e922fd6, (q31_t)0xeced5dd0, (q31_t)0x7e914002, (q31_t)0xece7274c, (q31_t)0x7e904fe0, (q31_t)0xece0f0d4, (q31_t)0x7e8f5f70, (q31_t)0xecdaba67,
-  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8d7da6, (q31_t)0xecce4db2, (q31_t)0x7e8c8c4b, (q31_t)0xecc81769, (q31_t)0x7e8b9aa3, (q31_t)0xecc1e12c,
-  (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e89b668, (q31_t)0xecb574d5, (q31_t)0x7e88c3d5, (q31_t)0xecaf3ebc, (q31_t)0x7e87d0f5, (q31_t)0xeca908ae,
-  (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e85ea49, (q31_t)0xec9c9cb7, (q31_t)0x7e84f67e, (q31_t)0xec9666cd, (q31_t)0x7e840265, (q31_t)0xec9030f0,
-  (q31_t)0x7e830dff, (q31_t)0xec89fb1e, (q31_t)0x7e82194a, (q31_t)0xec83c558, (q31_t)0x7e812447, (q31_t)0xec7d8f9e, (q31_t)0x7e802ef6, (q31_t)0xec7759f1,
-  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7e436a, (q31_t)0xec6aeeba, (q31_t)0x7e7d4d2f, (q31_t)0xec64b930, (q31_t)0x7e7c56a5, (q31_t)0xec5e83b3,
-  (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e7a68a9, (q31_t)0xec5218dc, (q31_t)0x7e797136, (q31_t)0xec4be383, (q31_t)0x7e787975, (q31_t)0xec45ae36,
-  (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e768908, (q31_t)0xec3943c1, (q31_t)0x7e75905d, (q31_t)0xec330e99, (q31_t)0x7e749764, (q31_t)0xec2cd97d,
-  (q31_t)0x7e739e1d, (q31_t)0xec26a46d, (q31_t)0x7e72a488, (q31_t)0xec206f69, (q31_t)0x7e71aaa4, (q31_t)0xec1a3a72, (q31_t)0x7e70b073, (q31_t)0xec140587,
-  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6ebb27, (q31_t)0xec079bd6, (q31_t)0x7e6dc00c, (q31_t)0xec01670f, (q31_t)0x7e6cc4a2, (q31_t)0xebfb3256,
-  (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e6acce6, (q31_t)0xebeec907, (q31_t)0x7e69d093, (q31_t)0xebe89472, (q31_t)0x7e68d3f2, (q31_t)0xebe25fea,
-  (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e66d9c6, (q31_t)0xebd5f6fe, (q31_t)0x7e65dc3b, (q31_t)0xebcfc29b, (q31_t)0x7e64de62, (q31_t)0xebc98e45,
-  (q31_t)0x7e63e03b, (q31_t)0xebc359fb, (q31_t)0x7e62e1c6, (q31_t)0xebbd25bd, (q31_t)0x7e61e303, (q31_t)0xebb6f18c, (q31_t)0x7e60e3f2, (q31_t)0xebb0bd67,
-  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5ee4e6, (q31_t)0xeba45543, (q31_t)0x7e5de4ec, (q31_t)0xeb9e2144, (q31_t)0x7e5ce4a3, (q31_t)0xeb97ed52,
-  (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e5ae328, (q31_t)0xeb8b8593, (q31_t)0x7e59e1f5, (q31_t)0xeb8551c6, (q31_t)0x7e58e075, (q31_t)0xeb7f1e06,
-  (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e56dc8a, (q31_t)0xeb72b6ac, (q31_t)0x7e55da20, (q31_t)0xeb6c8312, (q31_t)0x7e54d768, (q31_t)0xeb664f84,
-  (q31_t)0x7e53d462, (q31_t)0xeb601c04, (q31_t)0x7e52d10e, (q31_t)0xeb59e890, (q31_t)0x7e51cd6c, (q31_t)0xeb53b529, (q31_t)0x7e50c97c, (q31_t)0xeb4d81ce,
-  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4ec0b2, (q31_t)0xeb411b40, (q31_t)0x7e4dbbd9, (q31_t)0xeb3ae80c, (q31_t)0x7e4cb6b1, (q31_t)0xeb34b4e4,
-  (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e4aab78, (q31_t)0xeb284ebc, (q31_t)0x7e49a567, (q31_t)0xeb221bbb, (q31_t)0x7e489f08, (q31_t)0xeb1be8c8,
-  (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e469160, (q31_t)0xeb0f8307, (q31_t)0x7e458a17, (q31_t)0xeb095039, (q31_t)0x7e448281, (q31_t)0xeb031d79,
-  (q31_t)0x7e437a9c, (q31_t)0xeafceac6, (q31_t)0x7e427269, (q31_t)0xeaf6b81f, (q31_t)0x7e4169e9, (q31_t)0xeaf08586, (q31_t)0x7e40611b, (q31_t)0xeaea52fa,
-  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3e4e95, (q31_t)0xeaddee08, (q31_t)0x7e3d44dd, (q31_t)0xead7bba3, (q31_t)0x7e3c3ad7, (q31_t)0xead1894b,
-  (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e3a25e2, (q31_t)0xeac524c1, (q31_t)0x7e391af3, (q31_t)0xeabef290, (q31_t)0x7e380fb5, (q31_t)0xeab8c06c,
-  (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e35f851, (q31_t)0xeaac5c4c, (q31_t)0x7e34ec2b, (q31_t)0xeaa62a4f, (q31_t)0x7e33dfb6, (q31_t)0xea9ff860,
-  (q31_t)0x7e32d2f4, (q31_t)0xea99c67e, (q31_t)0x7e31c5e3, (q31_t)0xea9394a9, (q31_t)0x7e30b885, (q31_t)0xea8d62e1, (q31_t)0x7e2faad9, (q31_t)0xea873127,
-  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2d8e97, (q31_t)0xea7acdda, (q31_t)0x7e2c8002, (q31_t)0xea749c47, (q31_t)0x7e2b711f, (q31_t)0xea6e6ac2,
-  (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e29526e, (q31_t)0xea6207df, (q31_t)0x7e2842a2, (q31_t)0xea5bd681, (q31_t)0x7e273287, (q31_t)0xea55a531,
-  (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e251168, (q31_t)0xea4942b9, (q31_t)0x7e240064, (q31_t)0xea431191, (q31_t)0x7e22ef12, (q31_t)0xea3ce077,
-  (q31_t)0x7e21dd73, (q31_t)0xea36af69, (q31_t)0x7e20cb85, (q31_t)0xea307e6a, (q31_t)0x7e1fb94a, (q31_t)0xea2a4d78, (q31_t)0x7e1ea6c1, (q31_t)0xea241c93,
-  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e1c80c5, (q31_t)0xea17baf2, (q31_t)0x7e1b6d53, (q31_t)0xea118a35, (q31_t)0x7e1a5992, (q31_t)0xea0b5987,
-  (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e183128, (q31_t)0xe9fef852, (q31_t)0x7e171c7f, (q31_t)0xe9f8c7cc, (q31_t)0x7e160787, (q31_t)0xe9f29753,
-  (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e13dcaf, (q31_t)0xe9e6368b, (q31_t)0x7e12c6ce, (q31_t)0xe9e0063c, (q31_t)0x7e11b0a0, (q31_t)0xe9d9d5fa,
-  (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5, (q31_t)0x7e0f835a, (q31_t)0xe9cd759f, (q31_t)0x7e0e6c42, (q31_t)0xe9c74586, (q31_t)0x7e0d54dc, (q31_t)0xe9c1157a,
-  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e0b2528, (q31_t)0xe9b4b58d, (q31_t)0x7e0a0cd9, (q31_t)0xe9ae85ab, (q31_t)0x7e08f43d, (q31_t)0xe9a855d7,
-  (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e06c21a, (q31_t)0xe99bf658, (q31_t)0x7e05a894, (q31_t)0xe995c6ad, (q31_t)0x7e048ec1, (q31_t)0xe98f9710,
-  (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7e025a31, (q31_t)0xe98337ff, (q31_t)0x7e013f74, (q31_t)0xe97d088c, (q31_t)0x7e00246a, (q31_t)0xe976d926,
-  (q31_t)0x7dff0911, (q31_t)0xe970a9ce, (q31_t)0x7dfded6c, (q31_t)0xe96a7a85, (q31_t)0x7dfcd178, (q31_t)0xe9644b49, (q31_t)0x7dfbb537, (q31_t)0xe95e1c1b,
-  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df97bcb, (q31_t)0xe951bde9, (q31_t)0x7df85ea0, (q31_t)0xe94b8ee5, (q31_t)0x7df74128, (q31_t)0xe9455fef,
-  (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df5054f, (q31_t)0xe939022d, (q31_t)0x7df3e6ee, (q31_t)0xe932d361, (q31_t)0x7df2c83f, (q31_t)0xe92ca4a4,
-  (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7df089f8, (q31_t)0xe9204752, (q31_t)0x7def6a60, (q31_t)0xe91a18bf, (q31_t)0x7dee4a7a, (q31_t)0xe913ea39,
-  (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2, (q31_t)0x7dec09c6, (q31_t)0xe9078d59, (q31_t)0x7deae8f7, (q31_t)0xe9015efe, (q31_t)0x7de9c7da, (q31_t)0xe8fb30b1,
-  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de784b9, (q31_t)0xe8eed443, (q31_t)0x7de662b3, (q31_t)0xe8e8a621, (q31_t)0x7de54060, (q31_t)0xe8e2780d,
-  (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7de2fad1, (q31_t)0xe8d61c10, (q31_t)0x7de1d795, (q31_t)0xe8cfee27, (q31_t)0x7de0b40b, (q31_t)0xe8c9c04c,
-  (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7dde6c0f, (q31_t)0xe8bd64c2, (q31_t)0x7ddd479d, (q31_t)0xe8b73712, (q31_t)0x7ddc22dc, (q31_t)0xe8b10971,
-  (q31_t)0x7ddafdce, (q31_t)0xe8aadbde, (q31_t)0x7dd9d873, (q31_t)0xe8a4ae59, (q31_t)0x7dd8b2ca, (q31_t)0xe89e80e3, (q31_t)0x7dd78cd3, (q31_t)0xe898537b,
-  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd53ffc, (q31_t)0xe88bf8d7, (q31_t)0x7dd4191d, (q31_t)0xe885cb9a, (q31_t)0x7dd2f1f0, (q31_t)0xe87f9e6c,
-  (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dd0a2ac, (q31_t)0xe873443c, (q31_t)0x7dcf7a96, (q31_t)0xe86d173a, (q31_t)0x7dce5232, (q31_t)0xe866ea46,
-  (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dcc0082, (q31_t)0xe85a908a, (q31_t)0x7dcad736, (q31_t)0xe85463c2, (q31_t)0x7dc9ad9c, (q31_t)0xe84e3708,
-  (q31_t)0x7dc883b4, (q31_t)0xe8480a5d, (q31_t)0x7dc7597f, (q31_t)0xe841ddc1, (q31_t)0x7dc62efc, (q31_t)0xe83bb133, (q31_t)0x7dc5042b, (q31_t)0xe83584b4,
-  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dc2ada2, (q31_t)0xe8292be3, (q31_t)0x7dc181e8, (q31_t)0xe822ff90, (q31_t)0x7dc055e2, (q31_t)0xe81cd34b,
-  (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dbdfceb, (q31_t)0xe8107aef, (q31_t)0x7dbccffc, (q31_t)0xe80a4ed7, (q31_t)0x7dbba2bf, (q31_t)0xe80422ce,
-  (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db9475c, (q31_t)0xe7f7cae8, (q31_t)0x7db81936, (q31_t)0xe7f19f0c, (q31_t)0x7db6eac3, (q31_t)0xe7eb733e,
-  (q31_t)0x7db5bc02, (q31_t)0xe7e5477f, (q31_t)0x7db48cf4, (q31_t)0xe7df1bcf, (q31_t)0x7db35d98, (q31_t)0xe7d8f02d, (q31_t)0x7db22def, (q31_t)0xe7d2c49b,
-  (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dafcdb3, (q31_t)0xe7c66da3, (q31_t)0x7dae9d21, (q31_t)0xe7c0423d, (q31_t)0x7dad6c42, (q31_t)0xe7ba16e7,
-  (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7dab099a, (q31_t)0xe7adc066, (q31_t)0x7da9d7d2, (q31_t)0xe7a7953d, (q31_t)0x7da8a5bc, (q31_t)0xe7a16a22,
-  (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da640a9, (q31_t)0xe795141a, (q31_t)0x7da50dab, (q31_t)0xe78ee92c, (q31_t)0x7da3da5f, (q31_t)0xe788be4e,
-  (q31_t)0x7da2a6c6, (q31_t)0xe782937e, (q31_t)0x7da172df, (q31_t)0xe77c68be, (q31_t)0x7da03eab, (q31_t)0xe7763e0d, (q31_t)0x7d9f0a29, (q31_t)0xe770136b,
-  (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d9ca03e, (q31_t)0xe763be55, (q31_t)0x7d9b6ad3, (q31_t)0xe75d93e0, (q31_t)0x7d9a351c, (q31_t)0xe757697b,
-  (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d97c8c4, (q31_t)0xe74b14de, (q31_t)0x7d969224, (q31_t)0xe744eaa6, (q31_t)0x7d955b37, (q31_t)0xe73ec07e,
-  (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d92ec73, (q31_t)0xe7326c5b, (q31_t)0x7d91b49e, (q31_t)0xe72c4260, (q31_t)0x7d907c7a, (q31_t)0xe7261875,
-  (q31_t)0x7d8f4409, (q31_t)0xe71fee99, (q31_t)0x7d8e0b4b, (q31_t)0xe719c4cd, (q31_t)0x7d8cd240, (q31_t)0xe7139b10, (q31_t)0x7d8b98e6, (q31_t)0xe70d7162,
-  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d89254c, (q31_t)0xe7011e35, (q31_t)0x7d87eb0a, (q31_t)0xe6faf4b5, (q31_t)0x7d86b07c, (q31_t)0xe6f4cb45,
-  (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d843a76, (q31_t)0xe6e87893, (q31_t)0x7d82fefe, (q31_t)0xe6e24f51, (q31_t)0x7d81c33a, (q31_t)0xe6dc261f,
-  (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7f4ac8, (q31_t)0xe6cfd3e9, (q31_t)0x7d7e0e1c, (q31_t)0xe6c9aae5, (q31_t)0x7d7cd121, (q31_t)0xe6c381f1,
-  (q31_t)0x7d7b93da, (q31_t)0xe6bd590d, (q31_t)0x7d7a5645, (q31_t)0xe6b73038, (q31_t)0x7d791862, (q31_t)0xe6b10772, (q31_t)0x7d77da32, (q31_t)0xe6aadebc,
-  (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d755cea, (q31_t)0xe69e8d80, (q31_t)0x7d741dd2, (q31_t)0xe69864f9, (q31_t)0x7d72de6d, (q31_t)0xe6923c82,
-  (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d705eba, (q31_t)0xe685ebc2, (q31_t)0x7d6f1e6c, (q31_t)0xe67fc37a, (q31_t)0x7d6dddd2, (q31_t)0xe6799b42,
-  (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d6b5bb4, (q31_t)0xe66d4b01, (q31_t)0x7d6a1a31, (q31_t)0xe66722f7, (q31_t)0x7d68d860, (q31_t)0xe660fafe,
-  (q31_t)0x7d679642, (q31_t)0xe65ad315, (q31_t)0x7d6653d7, (q31_t)0xe654ab3b, (q31_t)0x7d65111f, (q31_t)0xe64e8371, (q31_t)0x7d63ce19, (q31_t)0xe6485bb7,
-  (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d614725, (q31_t)0xe63c0c73, (q31_t)0x7d600338, (q31_t)0xe635e4e9, (q31_t)0x7d5ebefc, (q31_t)0xe62fbd6e,
-  (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d5c359e, (q31_t)0xe6236ea9, (q31_t)0x7d5af07b, (q31_t)0xe61d475e, (q31_t)0x7d59ab0a, (q31_t)0xe6172024,
-  (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d571f41, (q31_t)0xe60ad1de, (q31_t)0x7d55d8e9, (q31_t)0xe604aad4, (q31_t)0x7d549243, (q31_t)0xe5fe83d9,
-  (q31_t)0x7d534b50, (q31_t)0xe5f85cef, (q31_t)0x7d520410, (q31_t)0xe5f23614, (q31_t)0x7d50bc82, (q31_t)0xe5ec0f4a, (q31_t)0x7d4f74a7, (q31_t)0xe5e5e88f,
-  (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4ce409, (q31_t)0xe5d99b4b, (q31_t)0x7d4b9b46, (q31_t)0xe5d374c1, (q31_t)0x7d4a5236, (q31_t)0xe5cd4e47,
-  (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d47bf2e, (q31_t)0xe5c10184, (q31_t)0x7d467536, (q31_t)0xe5badb3a, (q31_t)0x7d452af1, (q31_t)0xe5b4b501,
-  (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d42957e, (q31_t)0xe5a868bf, (q31_t)0x7d414a51, (q31_t)0xe5a242b7, (q31_t)0x7d3ffed7, (q31_t)0xe59c1cbf,
-  (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7, (q31_t)0x7d3d66fa, (q31_t)0xe58fd0ff, (q31_t)0x7d3c1a98, (q31_t)0xe589ab38, (q31_t)0x7d3acde9, (q31_t)0xe5838581,
-  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3833a2, (q31_t)0xe5773a44, (q31_t)0x7d36e60b, (q31_t)0xe57114be, (q31_t)0x7d359827, (q31_t)0xe56aef49,
-  (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d32fb76, (q31_t)0xe55ea48f, (q31_t)0x7d31acaa, (q31_t)0xe5587f4a, (q31_t)0x7d305d91, (q31_t)0xe5525a17,
-  (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d2dbe77, (q31_t)0xe5460fe0, (q31_t)0x7d2c6e76, (q31_t)0xe53feade, (q31_t)0x7d2b1e28, (q31_t)0xe539c5ec,
-  (q31_t)0x7d29cd8c, (q31_t)0xe533a10a, (q31_t)0x7d287ca4, (q31_t)0xe52d7c39, (q31_t)0x7d272b6e, (q31_t)0xe5275779, (q31_t)0x7d25d9eb, (q31_t)0xe52132c9,
-  (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d2335fe, (q31_t)0xe514e99b, (q31_t)0x7d21e393, (q31_t)0xe50ec51d, (q31_t)0x7d2090db, (q31_t)0xe508a0b0,
-  (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d1dea84, (q31_t)0xe4fc5807, (q31_t)0x7d1c96e5, (q31_t)0xe4f633cc, (q31_t)0x7d1b42f9, (q31_t)0xe4f00fa1,
-  (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d189a38, (q31_t)0xe4e3c77d, (q31_t)0x7d174564, (q31_t)0xe4dda385, (q31_t)0x7d15f043, (q31_t)0xe4d77f9d,
-  (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6, (q31_t)0x7d134519, (q31_t)0xe4cb37ff, (q31_t)0x7d11ef11, (q31_t)0xe4c5144a, (q31_t)0x7d1098bb, (q31_t)0xe4bef0a5,
-  (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d0deb28, (q31_t)0xe4b2a98e, (q31_t)0x7d0c93eb, (q31_t)0xe4ac861b, (q31_t)0x7d0b3c60, (q31_t)0xe4a662ba,
-  (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d088c64, (q31_t)0xe49a1c29, (q31_t)0x7d0733f3, (q31_t)0xe493f8fb, (q31_t)0x7d05db34, (q31_t)0xe48dd5dd,
-  (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7d0328cf, (q31_t)0xe4818fd4, (q31_t)0x7d01cf29, (q31_t)0xe47b6ce9, (q31_t)0x7d007535, (q31_t)0xe4754a0e,
-  (q31_t)0x7cff1af5, (q31_t)0xe46f2745, (q31_t)0x7cfdc068, (q31_t)0xe469048d, (q31_t)0x7cfc658d, (q31_t)0xe462e1e6, (q31_t)0x7cfb0a65, (q31_t)0xe45cbf50,
-  (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf8532f, (q31_t)0xe4507a57, (q31_t)0x7cf6f720, (q31_t)0xe44a57f4, (q31_t)0x7cf59ac4, (q31_t)0xe44435a2,
-  (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7cf2e124, (q31_t)0xe437f132, (q31_t)0x7cf183e1, (q31_t)0xe431cf14, (q31_t)0x7cf02651, (q31_t)0xe42bad07,
-  (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ced6a49, (q31_t)0xe41f6920, (q31_t)0x7cec0bd1, (q31_t)0xe4194746, (q31_t)0x7ceaad0c, (q31_t)0xe413257d,
-  (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6, (q31_t)0x7ce7ee9c, (q31_t)0xe406e220, (q31_t)0x7ce68ef0, (q31_t)0xe400c08b, (q31_t)0x7ce52ef7, (q31_t)0xe3fa9f08,
-  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ce26e1f, (q31_t)0xe3ee5c35, (q31_t)0x7ce10d3f, (q31_t)0xe3e83ae5, (q31_t)0x7cdfac12, (q31_t)0xe3e219a7,
-  (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cdce8d1, (q31_t)0xe3d5d75e, (q31_t)0x7cdb86bd, (q31_t)0xe3cfb654, (q31_t)0x7cda245c, (q31_t)0xe3c9955b,
-  (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd75eb3, (q31_t)0xe3bd539e, (q31_t)0x7cd5fb6a, (q31_t)0xe3b732d9, (q31_t)0x7cd497d5, (q31_t)0xe3b11226,
-  (q31_t)0x7cd333f3, (q31_t)0xe3aaf184, (q31_t)0x7cd1cfc4, (q31_t)0xe3a4d0f4, (q31_t)0x7cd06b48, (q31_t)0xe39eb075, (q31_t)0x7ccf067f, (q31_t)0xe3989008,
-  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7ccc3c06, (q31_t)0xe38c4f63, (q31_t)0x7ccad656, (q31_t)0xe3862f2a, (q31_t)0x7cc97059, (q31_t)0xe3800f03,
-  (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc6a378, (q31_t)0xe373ceea, (q31_t)0x7cc53c94, (q31_t)0xe36daef7, (q31_t)0x7cc3d563, (q31_t)0xe3678f17,
-  (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cc1061a, (q31_t)0xe35b4f8b, (q31_t)0x7cbf9e03, (q31_t)0xe3552fdf, (q31_t)0x7cbe359e, (q31_t)0xe34f1045,
-  (q31_t)0x7cbcccec, (q31_t)0xe348f0bd, (q31_t)0x7cbb63ee, (q31_t)0xe342d146, (q31_t)0x7cb9faa2, (q31_t)0xe33cb1e1, (q31_t)0x7cb8910a, (q31_t)0xe336928e,
-  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb5bcf2, (q31_t)0xe32a541d, (q31_t)0x7cb45272, (q31_t)0xe3243500, (q31_t)0x7cb2e7a6, (q31_t)0xe31e15f4,
-  (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cb01127, (q31_t)0xe311d811, (q31_t)0x7caea574, (q31_t)0xe30bb93b, (q31_t)0x7cad3974, (q31_t)0xe3059a76,
-  (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7caa608e, (q31_t)0xe2f95d23, (q31_t)0x7ca8f3a7, (q31_t)0xe2f33e94, (q31_t)0x7ca78674, (q31_t)0xe2ed2017,
-  (q31_t)0x7ca618f3, (q31_t)0xe2e701ac, (q31_t)0x7ca4ab26, (q31_t)0xe2e0e352, (q31_t)0x7ca33d0c, (q31_t)0xe2dac50b, (q31_t)0x7ca1cea5, (q31_t)0xe2d4a6d6,
-  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9ef0f0, (q31_t)0xe2c86aa2, (q31_t)0x7c9d81a3, (q31_t)0xe2c24ca2, (q31_t)0x7c9c1208, (q31_t)0xe2bc2eb5,
-  (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c9931ec, (q31_t)0xe2aff311, (q31_t)0x7c97c16b, (q31_t)0xe2a9d55a, (q31_t)0x7c96509d, (q31_t)0xe2a3b7b5,
-  (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c936e1b, (q31_t)0xe2977ca2, (q31_t)0x7c91fc66, (q31_t)0xe2915f34, (q31_t)0x7c908a65, (q31_t)0xe28b41d7,
-  (q31_t)0x7c8f1817, (q31_t)0xe285248d, (q31_t)0x7c8da57c, (q31_t)0xe27f0755, (q31_t)0x7c8c3294, (q31_t)0xe278ea30, (q31_t)0x7c8abf5f, (q31_t)0xe272cd1c,
-  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c87d810, (q31_t)0xe266932c, (q31_t)0x7c8663f4, (q31_t)0xe260764f, (q31_t)0x7c84ef8c, (q31_t)0xe25a5984,
-  (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c8205d6, (q31_t)0xe24e2026, (q31_t)0x7c809088, (q31_t)0xe2480393, (q31_t)0x7c7f1aed, (q31_t)0xe241e711,
-  (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c7c2ed0, (q31_t)0xe235ae46, (q31_t)0x7c7ab84e, (q31_t)0xe22f91fc, (q31_t)0x7c794180, (q31_t)0xe22975c4,
-  (q31_t)0x7c77ca65, (q31_t)0xe223599e, (q31_t)0x7c7652fd, (q31_t)0xe21d3d8b, (q31_t)0x7c74db48, (q31_t)0xe217218b, (q31_t)0x7c736347, (q31_t)0xe211059d,
-  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c70725e, (q31_t)0xe204cdf8, (q31_t)0x7c6ef976, (q31_t)0xe1feb241, (q31_t)0x7c6d8041, (q31_t)0xe1f8969d,
-  (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c6a8cf2, (q31_t)0xe1ec5f8c, (q31_t)0x7c6912d7, (q31_t)0xe1e64420, (q31_t)0x7c679870, (q31_t)0xe1e028c6,
-  (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c64a2bb, (q31_t)0xe1d3f24a, (q31_t)0x7c63276d, (q31_t)0xe1cdd727, (q31_t)0x7c61abd3, (q31_t)0xe1c7bc18,
-  (q31_t)0x7c602fec, (q31_t)0xe1c1a11b, (q31_t)0x7c5eb3b8, (q31_t)0xe1bb8631, (q31_t)0x7c5d3737, (q31_t)0xe1b56b59, (q31_t)0x7c5bba6a, (q31_t)0xe1af5094,
-  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c58bfe9, (q31_t)0xe1a31b42, (q31_t)0x7c574236, (q31_t)0xe19d00b6, (q31_t)0x7c55c436, (q31_t)0xe196e63c,
-  (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c52c74f, (q31_t)0xe18ab180, (q31_t)0x7c514869, (q31_t)0xe184973e, (q31_t)0x7c4fc936, (q31_t)0xe17e7d0f,
-  (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4cc9ea, (q31_t)0xe17248ea, (q31_t)0x7c4b49d2, (q31_t)0xe16c2ef4, (q31_t)0x7c49c96c, (q31_t)0xe1661510,
-  (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f, (q31_t)0x7c46c7bb, (q31_t)0xe159e182, (q31_t)0x7c45466f, (q31_t)0xe153c7d7, (q31_t)0x7c43c4d7, (q31_t)0xe14dae3f,
-  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c40c0c1, (q31_t)0xe1417b48, (q31_t)0x7c3f3e42, (q31_t)0xe13b61e9, (q31_t)0x7c3dbb78, (q31_t)0xe135489d,
-  (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c3ab4fc, (q31_t)0xe129163d, (q31_t)0x7c39314b, (q31_t)0xe122fd2a, (q31_t)0x7c37ad4e, (q31_t)0xe11ce42a,
-  (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c34a46d, (q31_t)0xe110b263, (q31_t)0x7c331f8a, (q31_t)0xe10a999c, (q31_t)0x7c319a5a, (q31_t)0xe10480e9,
-  (q31_t)0x7c3014de, (q31_t)0xe0fe6848, (q31_t)0x7c2e8f15, (q31_t)0xe0f84fbb, (q31_t)0x7c2d08ff, (q31_t)0xe0f23740, (q31_t)0x7c2b829d, (q31_t)0xe0ec1ed9,
-  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c2874f3, (q31_t)0xe0dfee44, (q31_t)0x7c26edab, (q31_t)0xe0d9d616, (q31_t)0x7c256616, (q31_t)0xe0d3bdfc,
-  (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c225607, (q31_t)0xe0c78e01, (q31_t)0x7c20cd8d, (q31_t)0xe0c17620, (q31_t)0x7c1f44c6, (q31_t)0xe0bb5e53,
-  (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c1c3253, (q31_t)0xe0af2ef2, (q31_t)0x7c1aa8a6, (q31_t)0xe0a9175e, (q31_t)0x7c191ead, (q31_t)0xe0a2ffde,
-  (q31_t)0x7c179467, (q31_t)0xe09ce871, (q31_t)0x7c1609d5, (q31_t)0xe096d117, (q31_t)0x7c147ef6, (q31_t)0xe090b9d1, (q31_t)0x7c12f3cb, (q31_t)0xe08aa29f,
-  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0fdc8f, (q31_t)0xe07e7473, (q31_t)0x7c0e507e, (q31_t)0xe0785d7b, (q31_t)0x7c0cc421, (q31_t)0xe0724696,
-  (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c09aa80, (q31_t)0xe0661906, (q31_t)0x7c081d3d, (q31_t)0xe060025c, (q31_t)0x7c068fae, (q31_t)0xe059ebc5,
-  (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7c0373a9, (q31_t)0xe04dbed1, (q31_t)0x7c01e534, (q31_t)0xe047a875, (q31_t)0x7c005673, (q31_t)0xe041922c,
-  (q31_t)0x7bfec765, (q31_t)0xe03b7bf6, (q31_t)0x7bfd380a, (q31_t)0xe03565d5, (q31_t)0x7bfba863, (q31_t)0xe02f4fc6, (q31_t)0x7bfa1870, (q31_t)0xe02939cc,
-  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf6f7a4, (q31_t)0xe01d0e12, (q31_t)0x7bf566cb, (q31_t)0xe016f852, (q31_t)0x7bf3d5a6, (q31_t)0xe010e2a7,
-  (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bf0b276, (q31_t)0xe004b78a, (q31_t)0x7bef206b, (q31_t)0xdffea219, (q31_t)0x7bed8e14, (q31_t)0xdff88cbc,
-  (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7bea6880, (q31_t)0xdfec623e, (q31_t)0x7be8d544, (q31_t)0xdfe64d1c, (q31_t)0x7be741bb, (q31_t)0xdfe0380e,
-  (q31_t)0x7be5ade6, (q31_t)0xdfda2314, (q31_t)0x7be419c4, (q31_t)0xdfd40e2e, (q31_t)0x7be28556, (q31_t)0xdfcdf95c, (q31_t)0x7be0f09b, (q31_t)0xdfc7e49d,
-  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bddc641, (q31_t)0xdfbbbb5c, (q31_t)0x7bdc30a1, (q31_t)0xdfb5a6d9, (q31_t)0x7bda9ab5, (q31_t)0xdfaf926a,
-  (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd76df7, (q31_t)0xdfa369c8, (q31_t)0x7bd5d726, (q31_t)0xdf9d5595, (q31_t)0x7bd44008, (q31_t)0xdf974176,
-  (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bd110e8, (q31_t)0xdf8b1974, (q31_t)0x7bcf78e5, (q31_t)0xdf850591, (q31_t)0x7bcde095, (q31_t)0xdf7ef1c2,
-  (q31_t)0x7bcc47fa, (q31_t)0xdf78de07, (q31_t)0x7bcaaf12, (q31_t)0xdf72ca60, (q31_t)0x7bc915dd, (q31_t)0xdf6cb6cd, (q31_t)0x7bc77c5d, (q31_t)0xdf66a34e,
-  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bc44876, (q31_t)0xdf5a7c8d, (q31_t)0x7bc2ae10, (q31_t)0xdf54694b, (q31_t)0x7bc1135e, (q31_t)0xdf4e561c,
-  (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bbddd15, (q31_t)0xdf422ffd, (q31_t)0x7bbc417e, (q31_t)0xdf3c1d0b, (q31_t)0x7bbaa59a, (q31_t)0xdf360a2d,
-  (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb76cef, (q31_t)0xdf29e4af, (q31_t)0x7bb5d026, (q31_t)0xdf23d20e, (q31_t)0x7bb43311, (q31_t)0xdf1dbf82,
-  (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a, (q31_t)0x7bb0f803, (q31_t)0xdf119aa6, (q31_t)0x7baf5a09, (q31_t)0xdf0b8856, (q31_t)0x7badbbc3, (q31_t)0xdf05761b,
-  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7baa7e53, (q31_t)0xdef951e2, (q31_t)0x7ba8df28, (q31_t)0xdef33fe3, (q31_t)0x7ba73fb1, (q31_t)0xdeed2dfa,
-  (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7ba3ffde, (q31_t)0xdee10a63, (q31_t)0x7ba25f82, (q31_t)0xdedaf8b7, (q31_t)0x7ba0beda, (q31_t)0xded4e71f,
-  (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b9d7ca5, (q31_t)0xdec8c42c, (q31_t)0x7b9bdb18, (q31_t)0xdec2b2d1, (q31_t)0x7b9a393f, (q31_t)0xdebca18b,
-  (q31_t)0x7b989719, (q31_t)0xdeb69059, (q31_t)0x7b96f4a8, (q31_t)0xdeb07f3c, (q31_t)0x7b9551ea, (q31_t)0xdeaa6e34, (q31_t)0x7b93aee0, (q31_t)0xdea45d40,
-  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b9067e7, (q31_t)0xde983b95, (q31_t)0x7b8ec3f8, (q31_t)0xde922adf, (q31_t)0x7b8d1fbd, (q31_t)0xde8c1a3e,
-  (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b89d662, (q31_t)0xde7ff938, (q31_t)0x7b883143, (q31_t)0xde79e8d5, (q31_t)0x7b868bd7, (q31_t)0xde73d886,
-  (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b83401b, (q31_t)0xde67b826, (q31_t)0x7b8199ca, (q31_t)0xde61a815, (q31_t)0x7b7ff32e, (q31_t)0xde5b9819,
-  (q31_t)0x7b7e4c45, (q31_t)0xde558831, (q31_t)0x7b7ca510, (q31_t)0xde4f785f, (q31_t)0x7b7afd8f, (q31_t)0xde4968a1, (q31_t)0x7b7955c2, (q31_t)0xde4358f8,
-  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b760542, (q31_t)0xde3739e4, (q31_t)0x7b745c91, (q31_t)0xde312a7a, (q31_t)0x7b72b393, (q31_t)0xde2b1b24,
-  (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6f60b2, (q31_t)0xde1efcb7, (q31_t)0x7b6db6d0, (q31_t)0xde18eda0, (q31_t)0x7b6c0ca2, (q31_t)0xde12de9e,
-  (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b68b760, (q31_t)0xde06c0d9, (q31_t)0x7b670c4d, (q31_t)0xde00b216, (q31_t)0x7b6560ee, (q31_t)0xddfaa367,
-  (q31_t)0x7b63b543, (q31_t)0xddf494ce, (q31_t)0x7b62094c, (q31_t)0xddee8649, (q31_t)0x7b605d09, (q31_t)0xdde877da, (q31_t)0x7b5eb079, (q31_t)0xdde26980,
-  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b5b5676, (q31_t)0xddd64d0a, (q31_t)0x7b59a902, (q31_t)0xddd03eef, (q31_t)0x7b57fb42, (q31_t)0xddca30e9,
-  (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b549ede, (q31_t)0xddbe151d, (q31_t)0x7b52f03a, (q31_t)0xddb80756, (q31_t)0x7b51414a, (q31_t)0xddb1f9a4,
-  (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b4de286, (q31_t)0xdda5de81, (q31_t)0x7b4c32b1, (q31_t)0xdd9fd10f, (q31_t)0x7b4a8291, (q31_t)0xdd99c3b2,
-  (q31_t)0x7b48d225, (q31_t)0xdd93b66a, (q31_t)0x7b47216c, (q31_t)0xdd8da938, (q31_t)0x7b457068, (q31_t)0xdd879c1b, (q31_t)0x7b43bf17, (q31_t)0xdd818f13,
-  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b405b92, (q31_t)0xdd757543, (q31_t)0x7b3ea95d, (q31_t)0xdd6f687b, (q31_t)0x7b3cf6dc, (q31_t)0xdd695bc9,
-  (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3990f7, (q31_t)0xdd5d42a3, (q31_t)0x7b37dd92, (q31_t)0xdd573631, (q31_t)0x7b3629e1, (q31_t)0xdd5129d4,
-  (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b32c19c, (q31_t)0xdd451159, (q31_t)0x7b310d07, (q31_t)0xdd3f053c, (q31_t)0x7b2f5826, (q31_t)0xdd38f935,
-  (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43, (q31_t)0x7b2bed81, (q31_t)0xdd2ce166, (q31_t)0x7b2a37bc, (q31_t)0xdd26d59f, (q31_t)0x7b2881ac, (q31_t)0xdd20c9ed,
-  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b2514a6, (q31_t)0xdd14b2ca, (q31_t)0x7b235db2, (q31_t)0xdd0ea759, (q31_t)0x7b21a671, (q31_t)0xdd089bfe,
-  (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b1e370d, (q31_t)0xdcfc8588, (q31_t)0x7b1c7ee8, (q31_t)0xdcf67a6d, (q31_t)0x7b1ac678, (q31_t)0xdcf06f68,
-  (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1754b3, (q31_t)0xdce4599e, (q31_t)0x7b159b5f, (q31_t)0xdcde4eda, (q31_t)0x7b13e1bf, (q31_t)0xdcd8442b,
-  (q31_t)0x7b1227d3, (q31_t)0xdcd23993, (q31_t)0x7b106d9b, (q31_t)0xdccc2f0f, (q31_t)0x7b0eb318, (q31_t)0xdcc624a2, (q31_t)0x7b0cf848, (q31_t)0xdcc01a4a,
-  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b0981c5, (q31_t)0xdcb405dc, (q31_t)0x7b07c612, (q31_t)0xdcadfbc5, (q31_t)0x7b060a12, (q31_t)0xdca7f1c5,
-  (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7b029130, (q31_t)0xdc9bde05, (q31_t)0x7b00d44d, (q31_t)0xdc95d446, (q31_t)0x7aff171e, (q31_t)0xdc8fca9c,
-  (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7afb9bdd, (q31_t)0xdc83b78b, (q31_t)0x7af9ddcb, (q31_t)0xdc7dae23, (q31_t)0x7af81f6c, (q31_t)0xdc77a4d2,
-  (q31_t)0x7af660c2, (q31_t)0xdc719b96, (q31_t)0x7af4a1cc, (q31_t)0xdc6b9270, (q31_t)0x7af2e28b, (q31_t)0xdc658960, (q31_t)0x7af122fd, (q31_t)0xdc5f8066,
-  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7aeda2fe, (q31_t)0xdc536eb3, (q31_t)0x7aebe28d, (q31_t)0xdc4d65fb, (q31_t)0x7aea21d0, (q31_t)0xdc475d59,
-  (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae69f73, (q31_t)0xdc3b4c57, (q31_t)0x7ae4ddd2, (q31_t)0xdc3543f7, (q31_t)0x7ae31be6, (q31_t)0xdc2f3bad,
-  (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7adf972a, (q31_t)0xdc232b5c, (q31_t)0x7addd45b, (q31_t)0xdc1d2354, (q31_t)0x7adc113f, (q31_t)0xdc171b63,
-  (q31_t)0x7ada4dd8, (q31_t)0xdc111388, (q31_t)0x7ad88a25, (q31_t)0xdc0b0bc2, (q31_t)0x7ad6c626, (q31_t)0xdc050414, (q31_t)0x7ad501dc, (q31_t)0xdbfefc7b,
-  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ad17863, (q31_t)0xdbf2ed8c, (q31_t)0x7acfb336, (q31_t)0xdbece636, (q31_t)0x7acdedbc, (q31_t)0xdbe6def6,
-  (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7aca61e6, (q31_t)0xdbdad0b9, (q31_t)0x7ac89b89, (q31_t)0xdbd4c9bc, (q31_t)0x7ac6d4e0, (q31_t)0xdbcec2d6,
-  (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7ac346ac, (q31_t)0xdbc2b54c, (q31_t)0x7ac17f20, (q31_t)0xdbbcaea8, (q31_t)0x7abfb749, (q31_t)0xdbb6a81b,
-  (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4, (q31_t)0x7abc26b7, (q31_t)0xdbaa9b43, (q31_t)0x7aba5dfc, (q31_t)0xdba494f9, (q31_t)0x7ab894f6, (q31_t)0xdb9e8ec6,
-  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7ab50206, (q31_t)0xdb9282a2, (q31_t)0x7ab3381d, (q31_t)0xdb8c7cb1, (q31_t)0x7ab16de7, (q31_t)0xdb8676d8,
-  (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aadd89a, (q31_t)0xdb7a6b68, (q31_t)0x7aac0d82, (q31_t)0xdb7465d1, (q31_t)0x7aaa421e, (q31_t)0xdb6e6052,
-  (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa6aa74, (q31_t)0xdb625596, (q31_t)0x7aa4de2d, (q31_t)0xdb5c505a, (q31_t)0x7aa3119a, (q31_t)0xdb564b35,
-  (q31_t)0x7aa144bc, (q31_t)0xdb504626, (q31_t)0x7a9f7793, (q31_t)0xdb4a412e, (q31_t)0x7a9daa1d, (q31_t)0xdb443c4c, (q31_t)0x7a9bdc5c, (q31_t)0xdb3e3781,
-  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a983ff7, (q31_t)0xdb322e30, (q31_t)0x7a967153, (q31_t)0xdb2c29a9, (q31_t)0x7a94a264, (q31_t)0xdb262539,
-  (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a9103a2, (q31_t)0xdb1a1c9d, (q31_t)0x7a8f33d0, (q31_t)0xdb141871, (q31_t)0x7a8d63b2, (q31_t)0xdb0e145c,
-  (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a89c293, (q31_t)0xdb020c77, (q31_t)0x7a87f192, (q31_t)0xdafc08a6, (q31_t)0x7a862046, (q31_t)0xdaf604ec,
-  (q31_t)0x7a844eae, (q31_t)0xdaf00149, (q31_t)0x7a827ccb, (q31_t)0xdae9fdbd, (q31_t)0x7a80aa9c, (q31_t)0xdae3fa48, (q31_t)0x7a7ed821, (q31_t)0xdaddf6ea,
-  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a7b3249, (q31_t)0xdad1f072, (q31_t)0x7a795eec, (q31_t)0xdacbed58, (q31_t)0x7a778b43, (q31_t)0xdac5ea56,
-  (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a73e30f, (q31_t)0xdab9e495, (q31_t)0x7a720e84, (q31_t)0xdab3e1d8, (q31_t)0x7a7039ad, (q31_t)0xdaaddf31,
-  (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a6c8f1c, (q31_t)0xdaa1da29, (q31_t)0x7a6ab963, (q31_t)0xda9bd7c7, (q31_t)0x7a68e35e, (q31_t)0xda95d57d,
-  (q31_t)0x7a670d0d, (q31_t)0xda8fd349, (q31_t)0x7a653671, (q31_t)0xda89d12d, (q31_t)0x7a635f8a, (q31_t)0xda83cf28, (q31_t)0x7a618857, (q31_t)0xda7dcd3a,
-  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a5dd90e, (q31_t)0xda71c9a3, (q31_t)0x7a5c00f9, (q31_t)0xda6bc7fa, (q31_t)0x7a5a2898, (q31_t)0xda65c669,
-  (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a5676f3, (q31_t)0xda59c38c, (q31_t)0x7a549db0, (q31_t)0xda53c240, (q31_t)0x7a52c421, (q31_t)0xda4dc10b,
-  (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a4f1021, (q31_t)0xda41bee8, (q31_t)0x7a4d35b0, (q31_t)0xda3bbdf9, (q31_t)0x7a4b5af3, (q31_t)0xda35bd22,
-  (q31_t)0x7a497feb, (q31_t)0xda2fbc61, (q31_t)0x7a47a498, (q31_t)0xda29bbb9, (q31_t)0x7a45c8f9, (q31_t)0xda23bb27, (q31_t)0x7a43ed0e, (q31_t)0xda1dbaad,
-  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a403457, (q31_t)0xda11b9ff, (q31_t)0x7a3e578b, (q31_t)0xda0bb9cb, (q31_t)0x7a3c7a73, (q31_t)0xda05b9ae,
-  (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a38bf60, (q31_t)0xd9f9b9bb, (q31_t)0x7a36e166, (q31_t)0xd9f3b9e5, (q31_t)0x7a350321, (q31_t)0xd9edba26,
-  (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a3145b3, (q31_t)0xd9e1baef, (q31_t)0x7a2f668c, (q31_t)0xd9dbbb77, (q31_t)0x7a2d8719, (q31_t)0xd9d5bc16,
-  (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd, (q31_t)0x7a29c750, (q31_t)0xd9c9bd9b, (q31_t)0x7a27e6fb, (q31_t)0xd9c3be81, (q31_t)0x7a26065b, (q31_t)0xd9bdbf7e,
-  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a224437, (q31_t)0xd9b1c1c0, (q31_t)0x7a2062b5, (q31_t)0xd9abc305, (q31_t)0x7a1e80e7, (q31_t)0xd9a5c461,
-  (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a1abc69, (q31_t)0xd999c75f, (q31_t)0x7a18d9b9, (q31_t)0xd993c902, (q31_t)0x7a16f6be, (q31_t)0xd98dcabd,
-  (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a132fe6, (q31_t)0xd981ce7a, (q31_t)0x7a114c09, (q31_t)0xd97bd07c, (q31_t)0x7a0f67e0, (q31_t)0xd975d295,
-  (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7, (q31_t)0x7a0b9eae, (q31_t)0xd969d710, (q31_t)0x7a09b9a4, (q31_t)0xd963d971, (q31_t)0x7a07d44e, (q31_t)0xd95ddbea,
-  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x7a0408c1, (q31_t)0xd951e123, (q31_t)0x7a02228a, (q31_t)0xd94be3e3, (q31_t)0x7a003c07, (q31_t)0xd945e6bb,
-  (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79fc6e20, (q31_t)0xd939ecb3, (q31_t)0x79fa86bc, (q31_t)0xd933efd3, (q31_t)0x79f89f0c, (q31_t)0xd92df30b,
-  (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79f4cecb, (q31_t)0xd921f9c3, (q31_t)0x79f2e63a, (q31_t)0xd91bfd43, (q31_t)0x79f0fd5d, (q31_t)0xd91600da,
-  (q31_t)0x79ef1436, (q31_t)0xd910048a, (q31_t)0x79ed2ac3, (q31_t)0xd90a0852, (q31_t)0x79eb4105, (q31_t)0xd9040c32, (q31_t)0x79e956fb, (q31_t)0xd8fe1029,
-  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79e58207, (q31_t)0xd8f21861, (q31_t)0x79e3971c, (q31_t)0xd8ec1ca1, (q31_t)0x79e1abe6, (q31_t)0xd8e620fa,
-  (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79ddd498, (q31_t)0xd8da29f2, (q31_t)0x79dbe880, (q31_t)0xd8d42e93, (q31_t)0x79d9fc1d, (q31_t)0xd8ce334c,
-  (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d62276, (q31_t)0xd8c23d06, (q31_t)0x79d43532, (q31_t)0xd8bc4207, (q31_t)0x79d247a2, (q31_t)0xd8b64720,
-  (q31_t)0x79d059c8, (q31_t)0xd8b04c52, (q31_t)0x79ce6ba2, (q31_t)0xd8aa519c, (q31_t)0x79cc7d31, (q31_t)0xd8a456ff, (q31_t)0x79ca8e75, (q31_t)0xd89e5c79,
-  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c6b01b, (q31_t)0xd89267b7, (q31_t)0x79c4c07e, (q31_t)0xd88c6d7b, (q31_t)0x79c2d095, (q31_t)0xd8867356,
-  (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79beefe3, (q31_t)0xd87a7f57, (q31_t)0x79bcff19, (q31_t)0xd874857c, (q31_t)0x79bb0e04, (q31_t)0xd86e8bb9,
-  (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b72af9, (q31_t)0xd862987d, (q31_t)0x79b53903, (q31_t)0xd85c9f04, (q31_t)0x79b346c2, (q31_t)0xd856a5a3,
-  (q31_t)0x79b15435, (q31_t)0xd850ac5a, (q31_t)0x79af615e, (q31_t)0xd84ab32a, (q31_t)0x79ad6e3c, (q31_t)0xd844ba13, (q31_t)0x79ab7ace, (q31_t)0xd83ec114,
-  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a79312, (q31_t)0xd832cf5f, (q31_t)0x79a59ec3, (q31_t)0xd82cd6aa, (q31_t)0x79a3aa29, (q31_t)0xd826de0d,
-  (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x799fc015, (q31_t)0xd81aed1d, (q31_t)0x799dca9a, (q31_t)0xd814f4ca, (q31_t)0x799bd4d4, (q31_t)0xd80efc8f,
-  (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x7997e868, (q31_t)0xd8030c64, (q31_t)0x7995f1c1, (q31_t)0xd7fd1474, (q31_t)0x7993facf, (q31_t)0xd7f71c9c,
-  (q31_t)0x79920392, (q31_t)0xd7f124dd, (q31_t)0x79900c0a, (q31_t)0xd7eb2d37, (q31_t)0x798e1438, (q31_t)0xd7e535a9, (q31_t)0x798c1c1a, (q31_t)0xd7df3e34,
-  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79882afd, (q31_t)0xd7d34f94, (q31_t)0x798631ff, (q31_t)0xd7cd586a, (q31_t)0x798438b5, (q31_t)0xd7c76158,
-  (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x79804541, (q31_t)0xd7bb737f, (q31_t)0x797e4b16, (q31_t)0xd7b57cb7, (q31_t)0x797c50a1, (q31_t)0xd7af8609,
-  (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x79785ad5, (q31_t)0xd7a398f6, (q31_t)0x79765f7f, (q31_t)0xd79da293, (q31_t)0x797463de, (q31_t)0xd797ac48,
-  (q31_t)0x797267f2, (q31_t)0xd791b616, (q31_t)0x79706bbb, (q31_t)0xd78bbffc, (q31_t)0x796e6f39, (q31_t)0xd785c9fc, (q31_t)0x796c726c, (q31_t)0xd77fd415,
-  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x796877f1, (q31_t)0xd773e892, (q31_t)0x79667a44, (q31_t)0xd76df2f6, (q31_t)0x79647c4c, (q31_t)0xd767fd72,
-  (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x79607f7a, (q31_t)0xd75c12b7, (q31_t)0x795e80a1, (q31_t)0xd7561d7f, (q31_t)0x795c817d, (q31_t)0xd7502860,
-  (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79588255, (q31_t)0xd7443e6e, (q31_t)0x79568250, (q31_t)0xd73e499a, (q31_t)0x79548201, (q31_t)0xd73854e0,
-  (q31_t)0x79528167, (q31_t)0xd732603f, (q31_t)0x79508082, (q31_t)0xd72c6bb6, (q31_t)0x794e7f52, (q31_t)0xd7267748, (q31_t)0x794c7dd7, (q31_t)0xd72082f2,
-  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79487a01, (q31_t)0xd7149a92, (q31_t)0x794677a6, (q31_t)0xd70ea688, (q31_t)0x79447500, (q31_t)0xd708b297,
-  (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x79406ed4, (q31_t)0xd6fccb01, (q31_t)0x793e6b4e, (q31_t)0xd6f6d75d, (q31_t)0x793c677d, (q31_t)0xd6f0e3d1,
-  (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79385efa, (q31_t)0xd6e4fd06, (q31_t)0x79365a49, (q31_t)0xd6df09c6, (q31_t)0x7934554d, (q31_t)0xd6d916a0,
-  (q31_t)0x79325006, (q31_t)0xd6d32393, (q31_t)0x79304a74, (q31_t)0xd6cd30a0, (q31_t)0x792e4497, (q31_t)0xd6c73dc6, (q31_t)0x792c3e70, (q31_t)0xd6c14b05,
-  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79283141, (q31_t)0xd6b565d0, (q31_t)0x79262a3a, (q31_t)0xd6af735c, (q31_t)0x792422e8, (q31_t)0xd6a98101,
-  (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x79201363, (q31_t)0xd69d9c98, (q31_t)0x791e0b31, (q31_t)0xd697aa8a, (q31_t)0x791c02b4, (q31_t)0xd691b895,
-  (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7917f0d9, (q31_t)0xd685d4f9, (q31_t)0x7915e77c, (q31_t)0xd67fe351, (q31_t)0x7913ddd4, (q31_t)0xd679f1c2,
-  (q31_t)0x7911d3e2, (q31_t)0xd674004e, (q31_t)0x790fc9a4, (q31_t)0xd66e0ef2, (q31_t)0x790dbf1d, (q31_t)0xd6681db1, (q31_t)0x790bb44a, (q31_t)0xd6622c89,
-  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x79079dc5, (q31_t)0xd6564a87, (q31_t)0x79059212, (q31_t)0xd65059ac, (q31_t)0x79038615, (q31_t)0xd64a68eb,
-  (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78ff6d3b, (q31_t)0xd63e87b6, (q31_t)0x78fd605d, (q31_t)0xd6389742, (q31_t)0x78fb5336, (q31_t)0xd632a6e8,
-  (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f73806, (q31_t)0xd626c681, (q31_t)0x78f529fe, (q31_t)0xd620d675, (q31_t)0x78f31bac, (q31_t)0xd61ae682,
-  (q31_t)0x78f10d0f, (q31_t)0xd614f6a9, (q31_t)0x78eefe28, (q31_t)0xd60f06ea, (q31_t)0x78eceef6, (q31_t)0xd6091745, (q31_t)0x78eadf79, (q31_t)0xd60327b9,
-  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e6bfa0, (q31_t)0xd5f748f0, (q31_t)0x78e4af44, (q31_t)0xd5f159b3, (q31_t)0x78e29e9d, (q31_t)0xd5eb6a8f,
-  (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78de7c6f, (q31_t)0xd5df8c96, (q31_t)0x78dc6ae8, (q31_t)0xd5d99dc0, (q31_t)0x78da5917, (q31_t)0xd5d3af04,
-  (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78d63495, (q31_t)0xd5c7d1db, (q31_t)0x78d421e4, (q31_t)0xd5c1e36d, (q31_t)0x78d20ee9, (q31_t)0xd5bbf519,
-  (q31_t)0x78cffba3, (q31_t)0xd5b606e0, (q31_t)0x78cde812, (q31_t)0xd5b018c0, (q31_t)0x78cbd437, (q31_t)0xd5aa2abb, (q31_t)0x78c9c012, (q31_t)0xd5a43cd0,
-  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78c596e7, (q31_t)0xd5986148, (q31_t)0x78c381e2, (q31_t)0xd59273ab, (q31_t)0x78c16c93, (q31_t)0xd58c8628,
-  (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78bd4114, (q31_t)0xd580ab72, (q31_t)0x78bb2ae5, (q31_t)0xd57abe3d, (q31_t)0x78b9146c, (q31_t)0xd574d124,
-  (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78b4e69a, (q31_t)0xd568f73f, (q31_t)0x78b2cf41, (q31_t)0xd5630a74, (q31_t)0x78b0b79e, (q31_t)0xd55d1dc3,
-  (q31_t)0x78ae9fb0, (q31_t)0xd557312d, (q31_t)0x78ac8778, (q31_t)0xd55144b0, (q31_t)0x78aa6ef5, (q31_t)0xd54b584f, (q31_t)0x78a85628, (q31_t)0xd5456c07,
-  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x78a423af, (q31_t)0xd53993c7, (q31_t)0x78a20a03, (q31_t)0xd533a7cf, (q31_t)0x789ff00c, (q31_t)0xd52dbbf1,
-  (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789bbb3f, (q31_t)0xd521e484, (q31_t)0x7899a06a, (q31_t)0xd51bf8f6, (q31_t)0x78978549, (q31_t)0xd5160d82,
-  (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x78934e2a, (q31_t)0xd50a36e9, (q31_t)0x7891322a, (q31_t)0xd5044bc4, (q31_t)0x788f15e0, (q31_t)0xd4fe60ba,
-  (q31_t)0x788cf94c, (q31_t)0xd4f875ca, (q31_t)0x788adc6e, (q31_t)0xd4f28af5, (q31_t)0x7888bf45, (q31_t)0xd4eca03a, (q31_t)0x7886a1d1, (q31_t)0xd4e6b59a,
-  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x7882660c, (q31_t)0xd4dae0aa, (q31_t)0x788047ba, (q31_t)0xd4d4f65a, (q31_t)0x787e291d, (q31_t)0xd4cf0c24,
-  (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x7879eb05, (q31_t)0xd4c33809, (q31_t)0x7877cb89, (q31_t)0xd4bd4e23, (q31_t)0x7875abc3, (q31_t)0xd4b76458,
-  (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x78716b59, (q31_t)0xd4ab9112, (q31_t)0x786f4ab4, (q31_t)0xd4a5a798, (q31_t)0x786d29c5, (q31_t)0xd49fbe37,
-  (q31_t)0x786b088c, (q31_t)0xd499d4f2, (q31_t)0x7868e708, (q31_t)0xd493ebc8, (q31_t)0x7866c53a, (q31_t)0xd48e02b8, (q31_t)0x7864a322, (q31_t)0xd48819c3,
-  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78605e13, (q31_t)0xd47c4829, (q31_t)0x785e3b1c, (q31_t)0xd4765f85, (q31_t)0x785c17db, (q31_t)0xd47076fb,
-  (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7857d079, (q31_t)0xd464a639, (q31_t)0x7855ac5a, (q31_t)0xd45ebe00, (q31_t)0x785387ef, (q31_t)0xd458d5e2,
-  (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x784f3e3c, (q31_t)0xd44d05f6, (q31_t)0x784d18f4, (q31_t)0xd4471e29, (q31_t)0x784af361, (q31_t)0xd4413677,
-  (q31_t)0x7848cd83, (q31_t)0xd43b4ee0, (q31_t)0x7846a75c, (q31_t)0xd4356763, (q31_t)0x784480ea, (q31_t)0xd42f8002, (q31_t)0x78425a2f, (q31_t)0xd42998bc,
-  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x783e0bd9, (q31_t)0xd41dca81, (q31_t)0x783be43e, (q31_t)0xd417e38c, (q31_t)0x7839bc5a, (q31_t)0xd411fcb2,
-  (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x78356bb2, (q31_t)0xd4062f4f, (q31_t)0x783342ef, (q31_t)0xd40048c6, (q31_t)0x783119e2, (q31_t)0xd3fa6259,
-  (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x782cc6ea, (q31_t)0xd3ee95cf, (q31_t)0x782a9cfe, (q31_t)0xd3e8afb3, (q31_t)0x782872c8, (q31_t)0xd3e2c9b2,
-  (q31_t)0x78264849, (q31_t)0xd3dce3cd, (q31_t)0x78241d7f, (q31_t)0xd3d6fe03, (q31_t)0x7821f26b, (q31_t)0xd3d11853, (q31_t)0x781fc70d, (q31_t)0xd3cb32c0,
-  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x781b6f72, (q31_t)0xd3bf67ea, (q31_t)0x78194336, (q31_t)0xd3b982a8, (q31_t)0x781716b0, (q31_t)0xd3b39d81,
-  (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x7812bcc4, (q31_t)0xd3a7d385, (q31_t)0x78108f60, (q31_t)0xd3a1eeb1, (q31_t)0x780e61b1, (q31_t)0xd39c09f7,
-  (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780a0575, (q31_t)0xd39040d7, (q31_t)0x7807d6e9, (q31_t)0xd38a5c70, (q31_t)0x7805a812, (q31_t)0xd3847824,
-  (q31_t)0x780378f1, (q31_t)0xd37e93f4, (q31_t)0x78014986, (q31_t)0xd378afdf, (q31_t)0x77ff19d1, (q31_t)0xd372cbe6, (q31_t)0x77fce9d2, (q31_t)0xd36ce808,
-  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f888f6, (q31_t)0xd361209f, (q31_t)0x77f65819, (q31_t)0xd35b3d13, (q31_t)0x77f426f2, (q31_t)0xd35559a4,
-  (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77efc3c5, (q31_t)0xd3499317, (q31_t)0x77ed91c0, (q31_t)0xd343affa, (q31_t)0x77eb5f71, (q31_t)0xd33dccf8,
-  (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e6f9f6, (q31_t)0xd3320748, (q31_t)0x77e4c6c9, (q31_t)0xd32c2499, (q31_t)0x77e29352, (q31_t)0xd3264206,
-  (q31_t)0x77e05f91, (q31_t)0xd3205f8f, (q31_t)0x77de2b86, (q31_t)0xd31a7d33, (q31_t)0x77dbf732, (q31_t)0xd3149af3, (q31_t)0x77d9c293, (q31_t)0xd30eb8cf,
-  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77d55878, (q31_t)0xd302f4da, (q31_t)0x77d322fc, (q31_t)0xd2fd1309, (q31_t)0x77d0ed35, (q31_t)0xd2f73154,
-  (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77cc80cb, (q31_t)0xd2eb6e3c, (q31_t)0x77ca4a27, (q31_t)0xd2e58cdb, (q31_t)0x77c81339, (q31_t)0xd2dfab95,
-  (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77c3a47f, (q31_t)0xd2d3e95c, (q31_t)0x77c16cb4, (q31_t)0xd2ce0869, (q31_t)0x77bf349f, (q31_t)0xd2c82793,
-  (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8, (q31_t)0x77bac396, (q31_t)0xd2bc6639, (q31_t)0x77b88aa3, (q31_t)0xd2b685b6, (q31_t)0x77b65166, (q31_t)0xd2b0a54f,
-  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77b1de0f, (q31_t)0xd2a4e4d5, (q31_t)0x77afa3f5, (q31_t)0xd29f04c2, (q31_t)0x77ad6990, (q31_t)0xd29924cb,
-  (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a8f3ea, (q31_t)0xd28d6531, (q31_t)0x77a6b8a9, (q31_t)0xd287858e, (q31_t)0x77a47d1d, (q31_t)0xd281a607,
-  (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77a00529, (q31_t)0xd275e74d, (q31_t)0x779dc8c0, (q31_t)0xd270081b, (q31_t)0x779b8c0e, (q31_t)0xd26a2904,
-  (q31_t)0x77994f11, (q31_t)0xd2644a0a, (q31_t)0x779711cb, (q31_t)0xd25e6b2b, (q31_t)0x7794d43b, (q31_t)0xd2588c69, (q31_t)0x77929661, (q31_t)0xd252adc3,
-  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x778e19d0, (q31_t)0xd246f0cb, (q31_t)0x778bdb19, (q31_t)0xd241127a, (q31_t)0x77899c19, (q31_t)0xd23b3444,
-  (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x77851d3a, (q31_t)0xd22f782f, (q31_t)0x7782dd5c, (q31_t)0xd2299a4e, (q31_t)0x77809d35, (q31_t)0xd223bc8a,
-  (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x777c1c08, (q31_t)0xd2180156, (q31_t)0x7779db03, (q31_t)0xd21223e7, (q31_t)0x777799b5, (q31_t)0xd20c4694,
-  (q31_t)0x7775581d, (q31_t)0xd206695d, (q31_t)0x7773163b, (q31_t)0xd2008c43, (q31_t)0x7770d40f, (q31_t)0xd1faaf45, (q31_t)0x776e919a, (q31_t)0xd1f4d263,
-  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776a0bd3, (q31_t)0xd1e918f5, (q31_t)0x7767c880, (q31_t)0xd1e33c69, (q31_t)0x776584e5, (q31_t)0xd1dd5ff9,
-  (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x7760fcd0, (q31_t)0xd1d1a76f, (q31_t)0x775eb857, (q31_t)0xd1cbcb54, (q31_t)0x775c7395, (q31_t)0xd1c5ef56,
-  (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x7757e933, (q31_t)0xd1ba37b0, (q31_t)0x7755a394, (q31_t)0xd1b45c08, (q31_t)0x77535dab, (q31_t)0xd1ae807c,
-  (q31_t)0x77511778, (q31_t)0xd1a8a50d, (q31_t)0x774ed0fc, (q31_t)0xd1a2c9ba, (q31_t)0x774c8a36, (q31_t)0xd19cee84, (q31_t)0x774a4327, (q31_t)0xd197136b,
-  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x7745b42c, (q31_t)0xd18b5d8e, (q31_t)0x77436c40, (q31_t)0xd18582ca, (q31_t)0x7741240a, (q31_t)0xd17fa823,
-  (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x773c92c2, (q31_t)0xd173f32c, (q31_t)0x773a49b0, (q31_t)0xd16e18db, (q31_t)0x77380054, (q31_t)0xd1683ea7,
-  (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x77336cc0, (q31_t)0xd15c8a95, (q31_t)0x77312287, (q31_t)0xd156b0b7, (q31_t)0x772ed805, (q31_t)0xd150d6f6,
-  (q31_t)0x772c8d3a, (q31_t)0xd14afd52, (q31_t)0x772a4225, (q31_t)0xd14523cb, (q31_t)0x7727f6c6, (q31_t)0xd13f4a60, (q31_t)0x7725ab1f, (q31_t)0xd1397113,
-  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x772112f2, (q31_t)0xd12dbece, (q31_t)0x771ec66e, (q31_t)0xd127e5d7, (q31_t)0x771c79a0, (q31_t)0xd1220cfc,
-  (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7717df27, (q31_t)0xd1165b9f, (q31_t)0x7715917d, (q31_t)0xd110831b, (q31_t)0x77134389, (q31_t)0xd10aaab5,
-  (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x770ea6c5, (q31_t)0xd0fefa3f, (q31_t)0x770c57f5, (q31_t)0xd0f9222f, (q31_t)0x770a08dc, (q31_t)0xd0f34a3d,
-  (q31_t)0x7707b979, (q31_t)0xd0ed7267, (q31_t)0x770569cc, (q31_t)0xd0e79aaf, (q31_t)0x770319d6, (q31_t)0xd0e1c313, (q31_t)0x7700c997, (q31_t)0xd0dbeb95,
-  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76fc283c, (q31_t)0xd0d03cf0, (q31_t)0x76f9d721, (q31_t)0xd0ca65c9, (q31_t)0x76f785bc, (q31_t)0xd0c48ebf,
-  (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76f2e216, (q31_t)0xd0b8e102, (q31_t)0x76f08fd5, (q31_t)0xd0b30a50, (q31_t)0x76ee3d4b, (q31_t)0xd0ad33ba,
-  (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e9975a, (q31_t)0xd0a186e7, (q31_t)0x76e743f4, (q31_t)0xd09bb0aa, (q31_t)0x76e4f044, (q31_t)0xd095da89,
-  (q31_t)0x76e29c4b, (q31_t)0xd0900486, (q31_t)0x76e04808, (q31_t)0xd08a2ea0, (q31_t)0x76ddf37c, (q31_t)0xd08458d7, (q31_t)0x76db9ea7, (q31_t)0xd07e832c,
-  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76d6f421, (q31_t)0xd072d82d, (q31_t)0x76d49e70, (q31_t)0xd06d02da, (q31_t)0x76d24876, (q31_t)0xd0672da3,
-  (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76cd9ba5, (q31_t)0xd05b838f, (q31_t)0x76cb44cf, (q31_t)0xd055aeb1, (q31_t)0x76c8edb0, (q31_t)0xd04fd9f1,
-  (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76c43e95, (q31_t)0xd04430c8, (q31_t)0x76c1e699, (q31_t)0xd03e5c60, (q31_t)0x76bf8e55, (q31_t)0xd0388815,
-  (q31_t)0x76bd35c7, (q31_t)0xd032b3e7, (q31_t)0x76badcf0, (q31_t)0xd02cdfd8, (q31_t)0x76b883d0, (q31_t)0xd0270be5, (q31_t)0x76b62a66, (q31_t)0xd0213810,
-  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76b176b8, (q31_t)0xd01590bf, (q31_t)0x76af1c72, (q31_t)0xd00fbd43, (q31_t)0x76acc1e4, (q31_t)0xd009e9e4,
-  (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a80bec, (q31_t)0xcffe4380, (q31_t)0x76a5b082, (q31_t)0xcff8707a, (q31_t)0x76a354cf, (q31_t)0xcff29d92,
-  (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x769e9c8d, (q31_t)0xcfe6f81a, (q31_t)0x769c3ffe, (q31_t)0xcfe1258b, (q31_t)0x7699e326, (q31_t)0xcfdb531a,
-  (q31_t)0x76978605, (q31_t)0xcfd580c6, (q31_t)0x7695289b, (q31_t)0xcfcfae8f, (q31_t)0x7692cae8, (q31_t)0xcfc9dc77, (q31_t)0x76906ceb, (q31_t)0xcfc40a7c,
-  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768bb017, (q31_t)0xcfb866e0, (q31_t)0x7689513f, (q31_t)0xcfb2953f, (q31_t)0x7686f21e, (q31_t)0xcfacc3bb,
-  (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x76823301, (q31_t)0xcfa1210d, (q31_t)0x767fd304, (q31_t)0xcf9b4fe3, (q31_t)0x767d72bf, (q31_t)0xcf957ed7,
-  (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x7678b159, (q31_t)0xcf89dd18, (q31_t)0x76765038, (q31_t)0xcf840c65, (q31_t)0x7673eecf, (q31_t)0xcf7e3bd1,
-  (q31_t)0x76718d1c, (q31_t)0xcf786b5a, (q31_t)0x766f2b20, (q31_t)0xcf729b01, (q31_t)0x766cc8db, (q31_t)0xcf6ccac6, (q31_t)0x766a664d, (q31_t)0xcf66faa9,
-  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x7665a056, (q31_t)0xcf5b5ac9, (q31_t)0x76633ced, (q31_t)0xcf558b06, (q31_t)0x7660d93b, (q31_t)0xcf4fbb61,
-  (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x765c10fc, (q31_t)0xcf441c71, (q31_t)0x7659ac6f, (q31_t)0xcf3e4d26, (q31_t)0x76574798, (q31_t)0xcf387dfa,
-  (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x76527d11, (q31_t)0xcf2cdffa, (q31_t)0x76501760, (q31_t)0xcf271128, (q31_t)0x764db166, (q31_t)0xcf214274,
-  (q31_t)0x764b4b23, (q31_t)0xcf1b73de, (q31_t)0x7648e497, (q31_t)0xcf15a566, (q31_t)0x76467dc2, (q31_t)0xcf0fd70c, (q31_t)0x764416a4, (q31_t)0xcf0a08d0,
-  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x763f478d, (q31_t)0xcefe6cb3, (q31_t)0x763cdf94, (q31_t)0xcef89ed2, (q31_t)0x763a7752, (q31_t)0xcef2d110,
-  (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x7635a5f4, (q31_t)0xcee735e5, (q31_t)0x76333cd8, (q31_t)0xcee1687d, (q31_t)0x7630d372, (q31_t)0xcedb9b33,
-  (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x762bffcd, (q31_t)0xced000fb, (q31_t)0x7629958c, (q31_t)0xceca340c, (q31_t)0x76272b03, (q31_t)0xcec4673c,
-  (q31_t)0x7624c031, (q31_t)0xcebe9a8a, (q31_t)0x76225517, (q31_t)0xceb8cdf7, (q31_t)0x761fe9b3, (q31_t)0xceb30181, (q31_t)0x761d7e06, (q31_t)0xcead352b,
-  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x7618a5d3, (q31_t)0xcea19cd8, (q31_t)0x7616394c, (q31_t)0xce9bd0dd, (q31_t)0x7613cc7c, (q31_t)0xce960500,
-  (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x760ef201, (q31_t)0xce8a6da2, (q31_t)0x760c8457, (q31_t)0xce84a220, (q31_t)0x760a1664, (q31_t)0xce7ed6bd,
-  (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x760539a3, (q31_t)0xce734053, (q31_t)0x7602cad5, (q31_t)0xce6d754c, (q31_t)0x76005bbf, (q31_t)0xce67aa63,
-  (q31_t)0x75fdec60, (q31_t)0xce61df99, (q31_t)0x75fb7cb8, (q31_t)0xce5c14ed, (q31_t)0x75f90cc7, (q31_t)0xce564a60, (q31_t)0x75f69c8d, (q31_t)0xce507ff2,
-  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75f1bb40, (q31_t)0xce44eb71, (q31_t)0x75ef4a2c, (q31_t)0xce3f215f, (q31_t)0x75ecd8cf, (q31_t)0xce39576c,
-  (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e7f53c, (q31_t)0xce2dc3e1, (q31_t)0x75e58305, (q31_t)0xce27fa49, (q31_t)0x75e31086, (q31_t)0xce2230d0,
-  (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75de2aac, (q31_t)0xce169e3b, (q31_t)0x75dbb753, (q31_t)0xce10d51f, (q31_t)0x75d943b0, (q31_t)0xce0b0c21,
-  (q31_t)0x75d6cfc5, (q31_t)0xce054343, (q31_t)0x75d45b92, (q31_t)0xcdff7a83, (q31_t)0x75d1e715, (q31_t)0xcdf9b1e2, (q31_t)0x75cf7250, (q31_t)0xcdf3e95f,
-  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75ca87ec, (q31_t)0xcde858b8, (q31_t)0x75c8124d, (q31_t)0xcde29092, (q31_t)0x75c59c65, (q31_t)0xcddcc88b,
-  (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75c0afbb, (q31_t)0xcdd138db, (q31_t)0x75be38fa, (q31_t)0xcdcb7131, (q31_t)0x75bbc1ef, (q31_t)0xcdc5a9a6,
-  (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75b6d301, (q31_t)0xcdba1aee, (q31_t)0x75b45b1d, (q31_t)0xcdb453c0, (q31_t)0x75b1e2f0, (q31_t)0xcdae8cb1,
-  (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1, (q31_t)0x75acf1bd, (q31_t)0xcda2fef0, (q31_t)0x75aa78b6, (q31_t)0xcd9d383f, (q31_t)0x75a7ff67, (q31_t)0xcd9771ac,
-  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x75a30bef, (q31_t)0xcd8be4e4, (q31_t)0x75a091c6, (q31_t)0xcd861eaf, (q31_t)0x759e1755, (q31_t)0xcd805899,
-  (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x75992198, (q31_t)0xcd74ccca, (q31_t)0x7596a64d, (q31_t)0xcd6f0711, (q31_t)0x75942ab9, (q31_t)0xcd694178,
-  (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x758f32b9, (q31_t)0xcd5db6a3, (q31_t)0x758cb64c, (q31_t)0xcd57f167, (q31_t)0x758a3996, (q31_t)0xcd522c4a,
-  (q31_t)0x7587bc98, (q31_t)0xcd4c674d, (q31_t)0x75853f51, (q31_t)0xcd46a26f, (q31_t)0x7582c1c2, (q31_t)0xcd40ddb0, (q31_t)0x758043ea, (q31_t)0xcd3b1911,
-  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x757b4762, (q31_t)0xcd2f9030, (q31_t)0x7578c8b0, (q31_t)0xcd29cbee, (q31_t)0x757649b7, (q31_t)0xcd2407cc,
-  (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x75714aea, (q31_t)0xcd187fe6, (q31_t)0x756ecb18, (q31_t)0xcd12bc22, (q31_t)0x756c4afc, (q31_t)0xcd0cf87e,
-  (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x756749ec, (q31_t)0xcd017193, (q31_t)0x7564c8f8, (q31_t)0xccfbae4d, (q31_t)0x756247bb, (q31_t)0xccf5eb26,
-  (q31_t)0x755fc635, (q31_t)0xccf0281f, (q31_t)0x755d4467, (q31_t)0xccea6538, (q31_t)0x755ac251, (q31_t)0xcce4a26f, (q31_t)0x75583ff3, (q31_t)0xccdedfc7,
-  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x75533a5c, (q31_t)0xccd35ad4, (q31_t)0x7550b725, (q31_t)0xcccd988a, (q31_t)0x754e33a4, (q31_t)0xccc7d65f,
-  (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75492bcb, (q31_t)0xccbc5269, (q31_t)0x7546a772, (q31_t)0xccb6909e, (q31_t)0x754422d0, (q31_t)0xccb0cef2,
-  (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x753f18b4, (q31_t)0xcca54bf9, (q31_t)0x753c933a, (q31_t)0xcc9f8aac, (q31_t)0x753a0d77, (q31_t)0xcc99c97e,
-  (q31_t)0x7537876c, (q31_t)0xcc940871, (q31_t)0x75350118, (q31_t)0xcc8e4783, (q31_t)0x75327a7d, (q31_t)0xcc8886b5, (q31_t)0x752ff399, (q31_t)0xcc82c607,
-  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x752ae4f8, (q31_t)0xcc774509, (q31_t)0x75285d3b, (q31_t)0xcc7184ba, (q31_t)0x7525d536, (q31_t)0xcc6bc48b,
-  (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x7520c453, (q31_t)0xcc60448c, (q31_t)0x751e3b75, (q31_t)0xcc5a84bc, (q31_t)0x751bb24f, (q31_t)0xcc54c50c,
-  (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x75169f2a, (q31_t)0xcc49460c, (q31_t)0x7514152b, (q31_t)0xcc4386bc, (q31_t)0x75118ae4, (q31_t)0xcc3dc78b,
-  (q31_t)0x750f0054, (q31_t)0xcc38087b, (q31_t)0x750c757d, (q31_t)0xcc32498a, (q31_t)0x7509ea5d, (q31_t)0xcc2c8aba, (q31_t)0x75075ef5, (q31_t)0xcc26cc09,
-  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x7502474d, (q31_t)0xcc1b4f08, (q31_t)0x74ffbb0d, (q31_t)0xcc1590b8, (q31_t)0x74fd2e84, (q31_t)0xcc0fd287,
-  (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f8149a, (q31_t)0xcc045686, (q31_t)0x74f58739, (q31_t)0xcbfe98b6, (q31_t)0x74f2f990, (q31_t)0xcbf8db05,
-  (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74eddd65, (q31_t)0xcbed6005, (q31_t)0x74eb4ee3, (q31_t)0xcbe7a2b5, (q31_t)0x74e8c01a, (q31_t)0xcbe1e585,
-  (q31_t)0x74e63108, (q31_t)0xcbdc2876, (q31_t)0x74e3a1ae, (q31_t)0xcbd66b86, (q31_t)0x74e1120c, (q31_t)0xcbd0aeb7, (q31_t)0x74de8221, (q31_t)0xcbcaf208,
-  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d96175, (q31_t)0xcbbf790a, (q31_t)0x74d6d0b2, (q31_t)0xcbb9bcbb, (q31_t)0x74d43fa8, (q31_t)0xcbb4008d,
-  (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74cf1cbb, (q31_t)0xcba88891, (q31_t)0x74cc8ad8, (q31_t)0xcba2ccc4, (q31_t)0x74c9f8ad, (q31_t)0xcb9d1117,
-  (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74c4d380, (q31_t)0xcb919a1d, (q31_t)0x74c2407d, (q31_t)0xcb8bded1, (q31_t)0x74bfad32, (q31_t)0xcb8623a5,
-  (q31_t)0x74bd199f, (q31_t)0xcb80689a, (q31_t)0x74ba85c4, (q31_t)0xcb7aadaf, (q31_t)0x74b7f1a1, (q31_t)0xcb74f2e4, (q31_t)0x74b55d36, (q31_t)0xcb6f383a,
-  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74b03389, (q31_t)0xcb63c347, (q31_t)0x74ad9e46, (q31_t)0xcb5e08fe, (q31_t)0x74ab08bb, (q31_t)0xcb584ed6,
-  (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x74a5dccd, (q31_t)0xcb4cdae6, (q31_t)0x74a3466b, (q31_t)0xcb47211f, (q31_t)0x74a0afc0, (q31_t)0xcb416779,
-  (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x749b8193, (q31_t)0xcb35f48d, (q31_t)0x7498ea11, (q31_t)0xcb303b49, (q31_t)0x74965246, (q31_t)0xcb2a8224,
-  (q31_t)0x7493ba34, (q31_t)0xcb24c921, (q31_t)0x749121da, (q31_t)0xcb1f103e, (q31_t)0x748e8938, (q31_t)0xcb19577b, (q31_t)0x748bf04d, (q31_t)0xcb139ed9,
-  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x7486bda2, (q31_t)0xcb082df8, (q31_t)0x748423e0, (q31_t)0xcb0275b8, (q31_t)0x748189d7, (q31_t)0xcafcbd99,
-  (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x747c54ec, (q31_t)0xcaf14dbd, (q31_t)0x7479ba0b, (q31_t)0xcaeb9600, (q31_t)0x74771ee2, (q31_t)0xcae5de64,
-  (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x7471e7b8, (q31_t)0xcada6f8d, (q31_t)0x746f4bb8, (q31_t)0xcad4b853, (q31_t)0x746caf70, (q31_t)0xcacf013a,
-  (q31_t)0x746a12df, (q31_t)0xcac94a42, (q31_t)0x74677608, (q31_t)0xcac3936b, (q31_t)0x7464d8e8, (q31_t)0xcabddcb4, (q31_t)0x74623b80, (q31_t)0xcab8261e,
-  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x745cffda, (q31_t)0xcaacb955, (q31_t)0x745a619b, (q31_t)0xcaa70322, (q31_t)0x7457c314, (q31_t)0xcaa14d10,
-  (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x74528530, (q31_t)0xca95e14e, (q31_t)0x744fe5d2, (q31_t)0xca902b9f, (q31_t)0x744d462c, (q31_t)0xca8a7610,
-  (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x7448060a, (q31_t)0xca7f0b56, (q31_t)0x7445658d, (q31_t)0xca79562b, (q31_t)0x7442c4c8, (q31_t)0xca73a120,
-  (q31_t)0x744023bc, (q31_t)0xca6dec37, (q31_t)0x743d8268, (q31_t)0xca68376e, (q31_t)0x743ae0cc, (q31_t)0xca6282c7, (q31_t)0x74383ee9, (q31_t)0xca5cce40,
-  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x7432fa4b, (q31_t)0xca516597, (q31_t)0x74305790, (q31_t)0xca4bb174, (q31_t)0x742db48e, (q31_t)0xca45fd72,
-  (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74286db3, (q31_t)0xca3a95d2, (q31_t)0x7425c9da, (q31_t)0xca34e234, (q31_t)0x742325b9, (q31_t)0xca2f2eb6,
-  (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x741ddca0, (q31_t)0xca23c820, (q31_t)0x741b37a9, (q31_t)0xca1e1506, (q31_t)0x74189269, (q31_t)0xca18620e,
-  (q31_t)0x7415ece2, (q31_t)0xca12af37, (q31_t)0x74134714, (q31_t)0xca0cfc81, (q31_t)0x7410a0fe, (q31_t)0xca0749ec, (q31_t)0x740dfaa0, (q31_t)0xca019779,
-  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7408ad0e, (q31_t)0xc9f632f6, (q31_t)0x740605d9, (q31_t)0xc9f080e7, (q31_t)0x74035e5d, (q31_t)0xc9eacef9,
-  (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73fe0e8f, (q31_t)0xc9df6b81, (q31_t)0x73fb663c, (q31_t)0xc9d9b9f7, (q31_t)0x73f8bda2, (q31_t)0xc9d4088f,
-  (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73f36b97, (q31_t)0xc9c8a622, (q31_t)0x73f0c226, (q31_t)0xc9c2f51e, (q31_t)0x73ee186e, (q31_t)0xc9bd443c,
-  (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a, (q31_t)0x73e8c426, (q31_t)0xc9b1e2db, (q31_t)0x73e61997, (q31_t)0xc9ac325d, (q31_t)0x73e36ec1, (q31_t)0xc9a68200,
-  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73de183e, (q31_t)0xc99b21ab, (q31_t)0x73db6c91, (q31_t)0xc99571b3, (q31_t)0x73d8c09d, (q31_t)0xc98fc1dc,
-  (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73d367de, (q31_t)0xc9846294, (q31_t)0x73d0bb13, (q31_t)0xc97eb322, (q31_t)0x73ce0e01, (q31_t)0xc97903d2,
-  (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c8b307, (q31_t)0xc96da597, (q31_t)0x73c6051f, (q31_t)0xc967f6ac, (q31_t)0x73c356ef, (q31_t)0xc96247e2,
-  (q31_t)0x73c0a878, (q31_t)0xc95c993a, (q31_t)0x73bdf9b9, (q31_t)0xc956eab4, (q31_t)0x73bb4ab3, (q31_t)0xc9513c50, (q31_t)0x73b89b66, (q31_t)0xc94b8e0d,
-  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73b33bf5, (q31_t)0xc94031ed, (q31_t)0x73b08bd1, (q31_t)0xc93a8410, (q31_t)0x73addb67, (q31_t)0xc934d654,
-  (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a879bb, (q31_t)0xc9297b42, (q31_t)0x73a5c87a, (q31_t)0xc923cdec, (q31_t)0x73a316f2, (q31_t)0xc91e20b8,
-  (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x739db30b, (q31_t)0xc912c6b5, (q31_t)0x739b00ad, (q31_t)0xc90d19e6, (q31_t)0x73984e07, (q31_t)0xc9076d39,
-  (q31_t)0x73959b1b, (q31_t)0xc901c0ae, (q31_t)0x7392e7e6, (q31_t)0xc8fc1445, (q31_t)0x7390346b, (q31_t)0xc8f667fe, (q31_t)0x738d80a8, (q31_t)0xc8f0bbd9,
-  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x7388184d, (q31_t)0xc8e563f5, (q31_t)0x738563b5, (q31_t)0xc8dfb836, (q31_t)0x7382aed5, (q31_t)0xc8da0c99,
-  (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x737d4440, (q31_t)0xc8ceb5c4, (q31_t)0x737a8e8a, (q31_t)0xc8c90a8d, (q31_t)0x7377d88d, (q31_t)0xc8c35f78,
-  (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x73726bbe, (q31_t)0xc8b809b4, (q31_t)0x736fb4ec, (q31_t)0xc8b25f06, (q31_t)0x736cfdd2, (q31_t)0xc8acb479,
-  (q31_t)0x736a4671, (q31_t)0xc8a70a0e, (q31_t)0x73678ec9, (q31_t)0xc8a15fc6, (q31_t)0x7364d6da, (q31_t)0xc89bb5a0, (q31_t)0x73621ea4, (q31_t)0xc8960b9c,
-  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x735cad61, (q31_t)0xc88ab7fa, (q31_t)0x7359f456, (q31_t)0xc8850e5d, (q31_t)0x73573b03, (q31_t)0xc87f64e2,
-  (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x7351c787, (q31_t)0xc8741252, (q31_t)0x734f0d5f, (q31_t)0xc86e693d, (q31_t)0x734c52ef, (q31_t)0xc868c04b,
-  (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x7346dd3a, (q31_t)0xc85d6ece, (q31_t)0x734421f6, (q31_t)0xc857c642, (q31_t)0x7341666a, (q31_t)0xc8521dd9,
-  (q31_t)0x733eaa96, (q31_t)0xc84c7593, (q31_t)0x733bee7c, (q31_t)0xc846cd6e, (q31_t)0x7339321b, (q31_t)0xc841256d, (q31_t)0x73367572, (q31_t)0xc83b7d8d,
-  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7330fb4d, (q31_t)0xc8302e35, (q31_t)0x732e3dcf, (q31_t)0xc82a86bd, (q31_t)0x732b800a, (q31_t)0xc824df67,
-  (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x732603ac, (q31_t)0xc8199123, (q31_t)0x73234512, (q31_t)0xc813ea35, (q31_t)0x73208632, (q31_t)0xc80e4369,
-  (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x731b079b, (q31_t)0xc802f638, (q31_t)0x731847e5, (q31_t)0xc7fd4fd4, (q31_t)0x731587e8, (q31_t)0xc7f7a992,
-  (q31_t)0x7312c7a5, (q31_t)0xc7f20373, (q31_t)0x7310071a, (q31_t)0xc7ec5d76, (q31_t)0x730d4648, (q31_t)0xc7e6b79c, (q31_t)0x730a8530, (q31_t)0xc7e111e5,
-  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x73050229, (q31_t)0xc7d5c6de, (q31_t)0x7302403c, (q31_t)0xc7d0218e, (q31_t)0x72ff7e07, (q31_t)0xc7ca7c61,
-  (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f9f8c9, (q31_t)0xc7bf3270, (q31_t)0x72f735c0, (q31_t)0xc7b98dab, (q31_t)0x72f47270, (q31_t)0xc7b3e909,
-  (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72eeeafb, (q31_t)0xc7a8a02c, (q31_t)0x72ec26d6, (q31_t)0xc7a2fbf3, (q31_t)0x72e9626a, (q31_t)0xc79d57db,
-  (q31_t)0x72e69db7, (q31_t)0xc797b3e7, (q31_t)0x72e3d8be, (q31_t)0xc7921015, (q31_t)0x72e1137d, (q31_t)0xc78c6c67, (q31_t)0x72de4df6, (q31_t)0xc786c8db,
-  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d8c213, (q31_t)0xc77b822b, (q31_t)0x72d5fbb7, (q31_t)0xc775df08, (q31_t)0x72d33514, (q31_t)0xc7703c08,
-  (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72cda6fb, (q31_t)0xc764f66f, (q31_t)0x72cadf83, (q31_t)0xc75f53d7, (q31_t)0x72c817c6, (q31_t)0xc759b163,
-  (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72c28775, (q31_t)0xc74e6ce2, (q31_t)0x72bfbee3, (q31_t)0xc748cad6, (q31_t)0x72bcf60a, (q31_t)0xc74328ed,
-  (q31_t)0x72ba2cea, (q31_t)0xc73d8727, (q31_t)0x72b76383, (q31_t)0xc737e584, (q31_t)0x72b499d6, (q31_t)0xc7324404, (q31_t)0x72b1cfe1, (q31_t)0xc72ca2a7,
-  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72ac3b25, (q31_t)0xc7216056, (q31_t)0x72a9705c, (q31_t)0xc71bbf62, (q31_t)0x72a6a54d, (q31_t)0xc7161e92,
-  (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x72a10e5b, (q31_t)0xc70add5a, (q31_t)0x729e4277, (q31_t)0xc7053cf2, (q31_t)0x729b764d, (q31_t)0xc6ff9cae,
-  (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x7295dd25, (q31_t)0xc6f45c8f, (q31_t)0x72931027, (q31_t)0xc6eebcb5, (q31_t)0x729042e3, (q31_t)0xc6e91cfd,
-  (q31_t)0x728d7557, (q31_t)0xc6e37d69, (q31_t)0x728aa785, (q31_t)0xc6ddddf8, (q31_t)0x7287d96c, (q31_t)0xc6d83eab, (q31_t)0x72850b0d, (q31_t)0xc6d29f80,
-  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x727f6d7a, (q31_t)0xc6c76195, (q31_t)0x727c9e47, (q31_t)0xc6c1c2d4, (q31_t)0x7279cecd, (q31_t)0xc6bc2437,
-  (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x72742f05, (q31_t)0xc6b0e767, (q31_t)0x72715eb8, (q31_t)0xc6ab4933, (q31_t)0x726e8e23, (q31_t)0xc6a5ab23,
-  (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7268ec27, (q31_t)0xc69a6f6e, (q31_t)0x72661abf, (q31_t)0xc694d1c8, (q31_t)0x72634910, (q31_t)0xc68f3446,
-  (q31_t)0x7260771b, (q31_t)0xc68996e7, (q31_t)0x725da4df, (q31_t)0xc683f9ab, (q31_t)0x725ad25d, (q31_t)0xc67e5c93, (q31_t)0x7257ff94, (q31_t)0xc678bf9f,
-  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7252592f, (q31_t)0xc66d8620, (q31_t)0x724f8593, (q31_t)0xc667e996, (q31_t)0x724cb1b0, (q31_t)0xc6624d30,
-  (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x72470916, (q31_t)0xc65714cd, (q31_t)0x72443460, (q31_t)0xc65178d1, (q31_t)0x72415f63, (q31_t)0xc64bdcf9,
-  (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x723bb496, (q31_t)0xc640a5b3, (q31_t)0x7238dec5, (q31_t)0xc63b0a46, (q31_t)0x723608af, (q31_t)0xc6356efc,
-  (q31_t)0x72333251, (q31_t)0xc62fd3d6, (q31_t)0x72305bae, (q31_t)0xc62a38d4, (q31_t)0x722d84c4, (q31_t)0xc6249df5, (q31_t)0x722aad93, (q31_t)0xc61f033a,
-  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x7224fe5f, (q31_t)0xc613ce2f, (q31_t)0x7222265b, (q31_t)0xc60e33df, (q31_t)0x721f4e11, (q31_t)0xc60899b2,
-  (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x72199ca9, (q31_t)0xc5fd65c5, (q31_t)0x7216c38c, (q31_t)0xc5f7cc04, (q31_t)0x7213ea28, (q31_t)0xc5f23267,
-  (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x720e368d, (q31_t)0xc5e6ff98, (q31_t)0x720b5c57, (q31_t)0xc5e16667, (q31_t)0x720881d9, (q31_t)0xc5dbcd59,
-  (q31_t)0x7205a716, (q31_t)0xc5d6346f, (q31_t)0x7202cc0c, (q31_t)0xc5d09ba9, (q31_t)0x71fff0bc, (q31_t)0xc5cb0307, (q31_t)0x71fd1525, (q31_t)0xc5c56a89,
-  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71f75d25, (q31_t)0xc5ba39f8, (q31_t)0x71f480bc, (q31_t)0xc5b4a1e5, (q31_t)0x71f1a40c, (q31_t)0xc5af09f7,
-  (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71ebe9da, (q31_t)0xc5a3da86, (q31_t)0x71e90c57, (q31_t)0xc59e4303, (q31_t)0x71e62e8f, (q31_t)0xc598aba5,
-  (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71e0722a, (q31_t)0xc58d7d54, (q31_t)0x71dd938f, (q31_t)0xc587e661, (q31_t)0x71dab4ad, (q31_t)0xc5824f93,
-  (q31_t)0x71d7d585, (q31_t)0xc57cb8e9, (q31_t)0x71d4f617, (q31_t)0xc5772263, (q31_t)0x71d21662, (q31_t)0xc5718c00, (q31_t)0x71cf3667, (q31_t)0xc56bf5c2,
-  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c9759f, (q31_t)0xc560c9b3, (q31_t)0x71c694d2, (q31_t)0xc55b33e2, (q31_t)0x71c3b3bf, (q31_t)0xc5559e34,
-  (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71bdf0c5, (q31_t)0xc54a7346, (q31_t)0x71bb0edf, (q31_t)0xc544de05, (q31_t)0x71b82cb3, (q31_t)0xc53f48e9,
-  (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71b26788, (q31_t)0xc5341f1d, (q31_t)0x71af848a, (q31_t)0xc52e8a6d, (q31_t)0x71aca145, (q31_t)0xc528f5e1,
-  (q31_t)0x71a9bdba, (q31_t)0xc523617a, (q31_t)0x71a6d9e9, (q31_t)0xc51dcd37, (q31_t)0x71a3f5d2, (q31_t)0xc5183919, (q31_t)0x71a11175, (q31_t)0xc512a51f,
-  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x719b47e9, (q31_t)0xc5077d97, (q31_t)0x719862b9, (q31_t)0xc501ea0a, (q31_t)0x71957d44, (q31_t)0xc4fc56a2,
-  (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x718fb187, (q31_t)0xc4f1303d, (q31_t)0x718ccb3f, (q31_t)0xc4eb9d42, (q31_t)0x7189e4b2, (q31_t)0xc4e60a6b,
-  (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x718416c4, (q31_t)0xc4dae52a, (q31_t)0x71812f65, (q31_t)0xc4d552c1, (q31_t)0x717e47bf, (q31_t)0xc4cfc07c,
-  (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b, (q31_t)0x717877a1, (q31_t)0xc4c49c5f, (q31_t)0x71758f29, (q31_t)0xc4bf0a87, (q31_t)0x7172a66c, (q31_t)0xc4b978d4,
-  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x716cd41e, (q31_t)0xc4ae55dc, (q31_t)0x7169ea8f, (q31_t)0xc4a8c497, (q31_t)0x716700b9, (q31_t)0xc4a33376,
-  (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71612c3c, (q31_t)0xc49811a3, (q31_t)0x715e4194, (q31_t)0xc49280f0, (q31_t)0x715b56a7, (q31_t)0xc48cf062,
-  (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x71557ffa, (q31_t)0xc481cfb4, (q31_t)0x7152943b, (q31_t)0xc47c3f94, (q31_t)0x714fa836, (q31_t)0xc476af98,
-  (q31_t)0x714cbbeb, (q31_t)0xc4711fc2, (q31_t)0x7149cf5a, (q31_t)0xc46b9010, (q31_t)0x7146e284, (q31_t)0xc4660083, (q31_t)0x7143f567, (q31_t)0xc460711b,
-  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x713e1a5c, (q31_t)0xc45552b8, (q31_t)0x713b2c6e, (q31_t)0xc44fc3be, (q31_t)0x71383e3a, (q31_t)0xc44a34e9,
-  (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x71326101, (q31_t)0xc43f17ad, (q31_t)0x712f71fb, (q31_t)0xc4398947, (q31_t)0x712c82b0, (q31_t)0xc433fb05,
-  (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x7126a348, (q31_t)0xc428def0, (q31_t)0x7123b32b, (q31_t)0xc423511d, (q31_t)0x7120c2c8, (q31_t)0xc41dc36f,
-  (q31_t)0x711dd220, (q31_t)0xc41835e6, (q31_t)0x711ae132, (q31_t)0xc412a882, (q31_t)0x7117effe, (q31_t)0xc40d1b42, (q31_t)0x7114fe84, (q31_t)0xc4078e28,
-  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x710f1ac0, (q31_t)0xc3fc7462, (q31_t)0x710c2875, (q31_t)0xc3f6e7b7, (q31_t)0x710935e4, (q31_t)0xc3f15b31,
-  (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x71034ff2, (q31_t)0xc3e64294, (q31_t)0x71005c90, (q31_t)0xc3e0b67d, (q31_t)0x70fd68e9, (q31_t)0xc3db2a8b,
-  (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70f780c9, (q31_t)0xc3d01316, (q31_t)0x70f48c50, (q31_t)0xc3ca8793, (q31_t)0x70f19792, (q31_t)0xc3c4fc36,
-  (q31_t)0x70eea28e, (q31_t)0xc3bf70fd, (q31_t)0x70ebad45, (q31_t)0xc3b9e5ea, (q31_t)0x70e8b7b5, (q31_t)0xc3b45afc, (q31_t)0x70e5c1e1, (q31_t)0xc3aed034,
-  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70dfd566, (q31_t)0xc3a3bb12, (q31_t)0x70dcdec0, (q31_t)0xc39e30b8, (q31_t)0x70d9e7d5, (q31_t)0xc398a685,
-  (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70d3f92d, (q31_t)0xc38d928d, (q31_t)0x70d10171, (q31_t)0xc38808c9, (q31_t)0x70ce096f, (q31_t)0xc3827f2a,
-  (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70c8189b, (q31_t)0xc3776c5c, (q31_t)0x70c51fc8, (q31_t)0xc371e32d, (q31_t)0x70c226b0, (q31_t)0xc36c5a24,
-  (q31_t)0x70bf2d53, (q31_t)0xc366d140, (q31_t)0x70bc33b0, (q31_t)0xc3614881, (q31_t)0x70b939c7, (q31_t)0xc35bbfe8, (q31_t)0x70b63f99, (q31_t)0xc3563774,
-  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70b04a6b, (q31_t)0xc34b26fc, (q31_t)0x70ad4f6d, (q31_t)0xc3459ef9, (q31_t)0x70aa5428, (q31_t)0xc340171b,
-  (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x70a45ccf, (q31_t)0xc33507cf, (q31_t)0x70a160ba, (q31_t)0xc32f8061, (q31_t)0x709e6460, (q31_t)0xc329f919,
-  (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x70986adb, (q31_t)0xc31eeaf9, (q31_t)0x70956db1, (q31_t)0xc3196422, (q31_t)0x70927041, (q31_t)0xc313dd70,
-  (q31_t)0x708f728b, (q31_t)0xc30e56e4, (q31_t)0x708c7490, (q31_t)0xc308d07d, (q31_t)0x70897650, (q31_t)0xc3034a3c, (q31_t)0x708677ca, (q31_t)0xc2fdc420,
-  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x708079ee, (q31_t)0xc2f2b85a, (q31_t)0x707d7a98, (q31_t)0xc2ed32af, (q31_t)0x707a7afd, (q31_t)0xc2e7ad2a,
-  (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x70747af6, (q31_t)0xc2dca291, (q31_t)0x70717a8a, (q31_t)0xc2d71d7e, (q31_t)0x706e79d9, (q31_t)0xc2d1988f,
-  (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x706877a7, (q31_t)0xc2c68f24, (q31_t)0x70657626, (q31_t)0xc2c10aa7, (q31_t)0x70627460, (q31_t)0xc2bb8650,
-  (q31_t)0x705f7255, (q31_t)0xc2b6021f, (q31_t)0x705c7004, (q31_t)0xc2b07e14, (q31_t)0x70596d6d, (q31_t)0xc2aafa2e, (q31_t)0x70566a92, (q31_t)0xc2a5766e,
-  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x7050640b, (q31_t)0xc29a6f60, (q31_t)0x704d6060, (q31_t)0xc294ec12, (q31_t)0x704a5c6f, (q31_t)0xc28f68e9,
-  (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x704453be, (q31_t)0xc284630a, (q31_t)0x70414efd, (q31_t)0xc27ee054, (q31_t)0x703e49f8, (q31_t)0xc2795dc3,
-  (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x70383f1d, (q31_t)0xc26e5913, (q31_t)0x70353947, (q31_t)0xc268d6f5, (q31_t)0x7032332d, (q31_t)0xc26354fc,
-  (q31_t)0x702f2ccd, (q31_t)0xc25dd329, (q31_t)0x702c2628, (q31_t)0xc258517c, (q31_t)0x70291f3e, (q31_t)0xc252cff5, (q31_t)0x7026180e, (q31_t)0xc24d4e95,
-  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x702008e0, (q31_t)0xc2424c46, (q31_t)0x701d00e1, (q31_t)0xc23ccb57, (q31_t)0x7019f89d, (q31_t)0xc2374a8f,
-  (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x7013e746, (q31_t)0xc22c4970, (q31_t)0x7010de32, (q31_t)0xc226c91a, (q31_t)0x700dd4da, (q31_t)0xc22148ea,
-  (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x7007c159, (q31_t)0xc21648fd, (q31_t)0x7004b731, (q31_t)0xc210c940, (q31_t)0x7001acc4, (q31_t)0xc20b49a9,
-  (q31_t)0x6ffea212, (q31_t)0xc205ca38, (q31_t)0x6ffb971b, (q31_t)0xc2004aed, (q31_t)0x6ff88bde, (q31_t)0xc1facbc9, (q31_t)0x6ff5805d, (q31_t)0xc1f54cca,
-  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fef688b, (q31_t)0xc1ea4f41, (q31_t)0x6fec5c3b, (q31_t)0xc1e4d0b6, (q31_t)0x6fe94fa5, (q31_t)0xc1df5251,
-  (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fe335ab, (q31_t)0xc1d455f9, (q31_t)0x6fe02846, (q31_t)0xc1ced807, (q31_t)0x6fdd1a9c, (q31_t)0xc1c95a3c,
-  (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fd6fe7a, (q31_t)0xc1be5f18, (q31_t)0x6fd3f001, (q31_t)0xc1b8e1bf, (q31_t)0x6fd0e144, (q31_t)0xc1b3648d,
-  (q31_t)0x6fcdd241, (q31_t)0xc1ade781, (q31_t)0x6fcac2fa, (q31_t)0xc1a86a9c, (q31_t)0x6fc7b36d, (q31_t)0xc1a2edde, (q31_t)0x6fc4a39c, (q31_t)0xc19d7145,
-  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fbe832a, (q31_t)0xc1927888, (q31_t)0x6fbb728a, (q31_t)0xc18cfc63, (q31_t)0x6fb861a4, (q31_t)0xc1878065,
-  (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fb23f0b, (q31_t)0xc17c88dc, (q31_t)0x6faf2d57, (q31_t)0xc1770d52, (q31_t)0x6fac1b5f, (q31_t)0xc17191ee,
-  (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6fa5f69e, (q31_t)0xc1669b99, (q31_t)0x6fa2e3d7, (q31_t)0xc16120a9, (q31_t)0x6f9fd0cb, (q31_t)0xc15ba5df,
-  (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d, (q31_t)0x6f99a9e3, (q31_t)0xc150b0c0, (q31_t)0x6f969608, (q31_t)0xc14b366b, (q31_t)0x6f9381e9, (q31_t)0xc145bc3c,
-  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f8d58db, (q31_t)0xc13ac852, (q31_t)0x6f8a43ed, (q31_t)0xc1354e97, (q31_t)0x6f872eba, (q31_t)0xc12fd503,
-  (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f810386, (q31_t)0xc124e24f, (q31_t)0x6f7ded84, (q31_t)0xc11f692f, (q31_t)0x6f7ad73e, (q31_t)0xc119f036,
-  (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f74a9e4, (q31_t)0xc10efeb8, (q31_t)0x6f7192cf, (q31_t)0xc1098634, (q31_t)0x6f6e7b76, (q31_t)0xc1040dd6,
-  (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f, (q31_t)0x6f684bf6, (q31_t)0xc0f91d8f, (q31_t)0x6f6533ce, (q31_t)0xc0f3a5a6, (q31_t)0x6f621b62, (q31_t)0xc0ee2de3,
-  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f5be9bc, (q31_t)0xc0e33ed4, (q31_t)0x6f58d082, (q31_t)0xc0ddc786, (q31_t)0x6f55b703, (q31_t)0xc0d8505f,
-  (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f4f8338, (q31_t)0xc0cd6287, (q31_t)0x6f4c68eb, (q31_t)0xc0c7ebd6, (q31_t)0x6f494e5a, (q31_t)0xc0c2754b,
-  (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f431869, (q31_t)0xc0b788ab, (q31_t)0x6f3ffd09, (q31_t)0xc0b21295, (q31_t)0x6f3ce165, (q31_t)0xc0ac9ca6,
-  (q31_t)0x6f39c57d, (q31_t)0xc0a726df, (q31_t)0x6f36a94f, (q31_t)0xc0a1b13e, (q31_t)0x6f338cde, (q31_t)0xc09c3bc5, (q31_t)0x6f307027, (q31_t)0xc096c673,
-  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f2a35ed, (q31_t)0xc08bdc44, (q31_t)0x6f271868, (q31_t)0xc0866767, (q31_t)0x6f23faa0, (q31_t)0xc080f2b1,
-  (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1dbe41, (q31_t)0xc07609bb, (q31_t)0x6f1a9faa, (q31_t)0xc070957b, (q31_t)0x6f1780cf, (q31_t)0xc06b2162,
-  (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f11424c, (q31_t)0xc06039a6, (q31_t)0x6f0e22a3, (q31_t)0xc05ac603, (q31_t)0x6f0b02b6, (q31_t)0xc0555287,
-  (q31_t)0x6f07e285, (q31_t)0xc04fdf32, (q31_t)0x6f04c20f, (q31_t)0xc04a6c05, (q31_t)0x6f01a155, (q31_t)0xc044f8fe, (q31_t)0x6efe8056, (q31_t)0xc03f8620,
-  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ef83d8a, (q31_t)0xc034a0d8, (q31_t)0x6ef51bbe, (q31_t)0xc02f2e6f, (q31_t)0x6ef1f9ad, (q31_t)0xc029bc2e,
-  (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6eebb4bf, (q31_t)0xc01ed821, (q31_t)0x6ee891e1, (q31_t)0xc0196656, (q31_t)0x6ee56ebe, (q31_t)0xc013f4b2,
-  (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6edf27ac, (q31_t)0xc00911e1, (q31_t)0x6edc03bc, (q31_t)0xc003a0b3, (q31_t)0x6ed8df88, (q31_t)0xbffe2fad,
-  (q31_t)0x6ed5bb10, (q31_t)0xbff8bece, (q31_t)0x6ed29653, (q31_t)0xbff34e17, (q31_t)0x6ecf7152, (q31_t)0xbfeddd88, (q31_t)0x6ecc4c0d, (q31_t)0xbfe86d20,
-  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ec600b5, (q31_t)0xbfdd8cc6, (q31_t)0x6ec2daa2, (q31_t)0xbfd81cd5, (q31_t)0x6ebfb44b, (q31_t)0xbfd2ad0b,
-  (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eb966d1, (q31_t)0xbfc7cdee, (q31_t)0x6eb63fad, (q31_t)0xbfc25e9b, (q31_t)0x6eb31845, (q31_t)0xbfbcef70,
-  (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6eacc8a8, (q31_t)0xbfb21190, (q31_t)0x6ea9a073, (q31_t)0xbfaca2dc, (q31_t)0x6ea677fa, (q31_t)0xbfa7344f,
-  (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea, (q31_t)0x6ea0263b, (q31_t)0xbf9c57ac, (q31_t)0x6e9cfcf5, (q31_t)0xbf96e997, (q31_t)0x6e99d36b, (q31_t)0xbf917ba9,
-  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e937f8a, (q31_t)0xbf86a044, (q31_t)0x6e905534, (q31_t)0xbf8132ce, (q31_t)0x6e8d2a99, (q31_t)0xbf7bc57f,
-  (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e86d496, (q31_t)0xbf70eb59, (q31_t)0x6e83a92f, (q31_t)0xbf6b7e81, (q31_t)0x6e807d83, (q31_t)0xbf6611d2,
-  (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e7a255f, (q31_t)0xbf5b38ea, (q31_t)0x6e76f8e7, (q31_t)0xbf55ccb2, (q31_t)0x6e73cc2b, (q31_t)0xbf5060a2,
-  (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba, (q31_t)0x6e6d71e6, (q31_t)0xbf4588fa, (q31_t)0x6e6a445d, (q31_t)0xbf401d61, (q31_t)0x6e671690, (q31_t)0xbf3ab1f1,
-  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e60ba2a, (q31_t)0xbf2fdb88, (q31_t)0x6e5d8b91, (q31_t)0xbf2a708f, (q31_t)0x6e5a5cb4, (q31_t)0xbf2505bf,
-  (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e53fe2e, (q31_t)0xbf1a3096, (q31_t)0x6e50ce84, (q31_t)0xbf14c63d, (q31_t)0x6e4d9e97, (q31_t)0xbf0f5c0d,
-  (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e473df0, (q31_t)0xbf048824, (q31_t)0x6e440d37, (q31_t)0xbeff1e6c, (q31_t)0x6e40dc39, (q31_t)0xbef9b4dc,
-  (q31_t)0x6e3daaf8, (q31_t)0xbef44b74, (q31_t)0x6e3a7972, (q31_t)0xbeeee234, (q31_t)0x6e3747a9, (q31_t)0xbee9791c, (q31_t)0x6e34159b, (q31_t)0xbee4102d,
-  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e2db0b4, (q31_t)0xbed93ec6, (q31_t)0x6e2a7ddb, (q31_t)0xbed3d64f, (q31_t)0x6e274abe, (q31_t)0xbece6e00,
-  (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e20e3b7, (q31_t)0xbec39ddb, (q31_t)0x6e1dafce, (q31_t)0xbebe3605, (q31_t)0x6e1a7ba1, (q31_t)0xbeb8ce57,
-  (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e14127b, (q31_t)0xbeadff74, (q31_t)0x6e10dd82, (q31_t)0xbea8983f, (q31_t)0x6e0da845, (q31_t)0xbea33132,
-  (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e, (q31_t)0x6e073d00, (q31_t)0xbe986391, (q31_t)0x6e0406f8, (q31_t)0xbe92fcfe, (q31_t)0x6e00d0ac, (q31_t)0xbe8d9692,
-  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6dfa6348, (q31_t)0xbe82ca35, (q31_t)0x6df72c30, (q31_t)0xbe7d6442, (q31_t)0x6df3f4d4, (q31_t)0xbe77fe78,
-  (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6ded8552, (q31_t)0xbe6d335e, (q31_t)0x6dea4d2b, (q31_t)0xbe67ce0d, (q31_t)0x6de714c0, (q31_t)0xbe6268e5,
-  (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6de0a31f, (q31_t)0xbe579f0f, (q31_t)0x6ddd69e9, (q31_t)0xbe523a60, (q31_t)0x6dda306f, (q31_t)0xbe4cd5da,
-  (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c, (q31_t)0x6dd3bcaf, (q31_t)0xbe420d47, (q31_t)0x6dd0826a, (q31_t)0xbe3ca93b, (q31_t)0x6dcd47e1, (q31_t)0xbe374557,
-  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dc6d204, (q31_t)0xbe2c7e09, (q31_t)0x6dc396b0, (q31_t)0xbe271a9f, (q31_t)0x6dc05b18, (q31_t)0xbe21b75d,
-  (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db9e31d, (q31_t)0xbe16f154, (q31_t)0x6db6a6ba, (q31_t)0xbe118e8c, (q31_t)0x6db36a14, (q31_t)0xbe0c2bed,
-  (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6daceffb, (q31_t)0xbe01672a, (q31_t)0x6da9b28a, (q31_t)0xbdfc0505, (q31_t)0x6da674d5, (q31_t)0xbdf6a309,
-  (q31_t)0x6da336dc, (q31_t)0xbdf14135, (q31_t)0x6d9ff89f, (q31_t)0xbdebdf8b, (q31_t)0x6d9cba1f, (q31_t)0xbde67e09, (q31_t)0x6d997b5b, (q31_t)0xbde11cb0,
-  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d92fd09, (q31_t)0xbdd65a78, (q31_t)0x6d8fbd7a, (q31_t)0xbdd0f999, (q31_t)0x6d8c7da8, (q31_t)0xbdcb98e3,
-  (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d85fd39, (q31_t)0xbdc0d7f2, (q31_t)0x6d82bc9d, (q31_t)0xbdbb77b7, (q31_t)0x6d7f7bbc, (q31_t)0xbdb617a4,
-  (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d78f931, (q31_t)0xbdab57fa, (q31_t)0x6d75b786, (q31_t)0xbda5f862, (q31_t)0x6d727597, (q31_t)0xbda098f3,
-  (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad, (q31_t)0x6d6bf0f0, (q31_t)0xbd95da91, (q31_t)0x6d68ae37, (q31_t)0xbd907b9d, (q31_t)0x6d656b3a, (q31_t)0xbd8b1cd2,
-  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d5ee477, (q31_t)0xbd805fb7, (q31_t)0x6d5ba0b0, (q31_t)0xbd7b0167, (q31_t)0x6d585ca6, (q31_t)0xbd75a340,
-  (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d51d3c6, (q31_t)0xbd6ae76d, (q31_t)0x6d4e8ef2, (q31_t)0xbd6589c1, (q31_t)0x6d4b49da, (q31_t)0xbd602c3f,
-  (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d44bedf, (q31_t)0xbd5571b5, (q31_t)0x6d4178fd, (q31_t)0xbd5014ad, (q31_t)0x6d3e32d7, (q31_t)0xbd4ab7cf,
-  (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a, (q31_t)0x6d37a5c1, (q31_t)0xbd3ffe8e, (q31_t)0x6d345ed1, (q31_t)0xbd3aa22c, (q31_t)0x6d31179e, (q31_t)0xbd3545f2,
-  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d2a886e, (q31_t)0xbd2a8dfb, (q31_t)0x6d274070, (q31_t)0xbd25323d, (q31_t)0x6d23f830, (q31_t)0xbd1fd6a8,
-  (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d1d66e4, (q31_t)0xbd151ffb, (q31_t)0x6d1a1dda, (q31_t)0xbd0fc4e2, (q31_t)0x6d16d48c, (q31_t)0xbd0a69f2,
-  (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d104126, (q31_t)0xbcffb48f, (q31_t)0x6d0cf70f, (q31_t)0xbcfa5a1b, (q31_t)0x6d09acb4, (q31_t)0xbcf4ffd1,
-  (q31_t)0x6d066215, (q31_t)0xbcefa5b0, (q31_t)0x6d031734, (q31_t)0xbcea4bb9, (q31_t)0x6cffcc0f, (q31_t)0xbce4f1eb, (q31_t)0x6cfc80a7, (q31_t)0xbcdf9846,
-  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cf5e90d, (q31_t)0xbcd4e579, (q31_t)0x6cf29cdc, (q31_t)0xbccf8c50, (q31_t)0x6cef5067, (q31_t)0xbcca3351,
-  (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6ce8b6b4, (q31_t)0xbcbf81cf, (q31_t)0x6ce56975, (q31_t)0xbcba294d, (q31_t)0x6ce21bf4, (q31_t)0xbcb4d0f4,
-  (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cdb8027, (q31_t)0xbcaa20be, (q31_t)0x6cd831dc, (q31_t)0xbca4c8e1, (q31_t)0x6cd4e34e, (q31_t)0xbc9f712e,
-  (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5, (q31_t)0x6cce4568, (q31_t)0xbc94c245, (q31_t)0x6ccaf610, (q31_t)0xbc8f6b0f, (q31_t)0x6cc7a676, (q31_t)0xbc8a1402,
-  (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cc10677, (q31_t)0xbc7f6665, (q31_t)0x6cbdb613, (q31_t)0xbc7a0fd6, (q31_t)0x6cba656c, (q31_t)0xbc74b96f,
-  (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6cb3c355, (q31_t)0xbc6a0d20, (q31_t)0x6cb071e4, (q31_t)0xbc64b737, (q31_t)0x6cad2031, (q31_t)0xbc5f6177,
-  (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6ca67c01, (q31_t)0xbc54b676, (q31_t)0x6ca32985, (q31_t)0xbc4f6134, (q31_t)0x6c9fd6c6, (q31_t)0xbc4a0c1b,
-  (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c, (q31_t)0x6c99307e, (q31_t)0xbc3f6267, (q31_t)0x6c95dcf6, (q31_t)0xbc3a0dcc, (q31_t)0x6c92892a, (q31_t)0xbc34b95b,
-  (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c8be0cb, (q31_t)0xbc2a10f6, (q31_t)0x6c888c36, (q31_t)0xbc24bd02, (q31_t)0x6c85375f, (q31_t)0xbc1f6938,
-  (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c7e8ce8, (q31_t)0xbc14c221, (q31_t)0x6c7b3748, (q31_t)0xbc0f6ed5, (q31_t)0x6c77e165, (q31_t)0xbc0a1bb3,
-  (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c7134d7, (q31_t)0xbbff75ec, (q31_t)0x6c6dde2b, (q31_t)0xbbfa2347, (q31_t)0x6c6a873d, (q31_t)0xbbf4d0cc,
-  (q31_t)0x6c67300b, (q31_t)0xbbef7e7c, (q31_t)0x6c63d897, (q31_t)0xbbea2c55, (q31_t)0x6c6080e0, (q31_t)0xbbe4da58, (q31_t)0x6c5d28e6, (q31_t)0xbbdf8885,
-  (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c56782a, (q31_t)0xbbd4e55e, (q31_t)0x6c531f67, (q31_t)0xbbcf940a, (q31_t)0x6c4fc662, (q31_t)0xbbca42df,
-  (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c49138f, (q31_t)0xbbbfa108, (q31_t)0x6c45b9c1, (q31_t)0xbbba505c, (q31_t)0x6c425fb1, (q31_t)0xbbb4ffda,
-  (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c3baac7, (q31_t)0xbbaa5f54, (q31_t)0x6c384fef, (q31_t)0xbba50f50, (q31_t)0x6c34f4d3, (q31_t)0xbb9fbf77,
-  (q31_t)0x6c319975, (q31_t)0xbb9a6fc7, (q31_t)0x6c2e3dd4, (q31_t)0xbb952042, (q31_t)0x6c2ae1f0, (q31_t)0xbb8fd0e7, (q31_t)0x6c2785ca, (q31_t)0xbb8a81b6,
-  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c20ccb4, (q31_t)0xbb7fe3d3, (q31_t)0x6c1d6fc6, (q31_t)0xbb7a9521, (q31_t)0x6c1a1295, (q31_t)0xbb754699,
-  (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c13576a, (q31_t)0xbb6aaa09, (q31_t)0x6c0ff971, (q31_t)0xbb655c00, (q31_t)0x6c0c9b35, (q31_t)0xbb600e21,
-  (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6c05ddf5, (q31_t)0xbb5572e3, (q31_t)0x6c027ef1, (q31_t)0xbb502583, (q31_t)0x6bff1faa, (q31_t)0xbb4ad84e,
-  (q31_t)0x6bfbc021, (q31_t)0xbb458b43, (q31_t)0x6bf86055, (q31_t)0xbb403e63, (q31_t)0x6bf50047, (q31_t)0xbb3af1ad, (q31_t)0x6bf19ff6, (q31_t)0xbb35a521,
-  (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6beade8c, (q31_t)0xbb2b0c8a, (q31_t)0x6be77d74, (q31_t)0xbb25c07d, (q31_t)0x6be41c18, (q31_t)0xbb20749c,
-  (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bdd589a, (q31_t)0xbb15dd57, (q31_t)0x6bd9f677, (q31_t)0xbb1091f5, (q31_t)0x6bd69412, (q31_t)0xbb0b46bd,
-  (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bcfce80, (q31_t)0xbb00b0ce, (q31_t)0x6bcc6b53, (q31_t)0xbafb6615, (q31_t)0x6bc907e3, (q31_t)0xbaf61b88,
-  (q31_t)0x6bc5a431, (q31_t)0xbaf0d125, (q31_t)0x6bc2403d, (q31_t)0xbaeb86ed, (q31_t)0x6bbedc06, (q31_t)0xbae63cdf, (q31_t)0x6bbb778d, (q31_t)0xbae0f2fc,
-  (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6bb4add3, (q31_t)0xbad65fb5, (q31_t)0x6bb14892, (q31_t)0xbad11652, (q31_t)0x6bade30f, (q31_t)0xbacbcd1a,
-  (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6ba71741, (q31_t)0xbac13b29, (q31_t)0x6ba3b0f7, (q31_t)0xbabbf270, (q31_t)0x6ba04a6a, (q31_t)0xbab6a9e3,
-  (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b997c8a, (q31_t)0xbaac1948, (q31_t)0x6b961536, (q31_t)0xbaa6d13a, (q31_t)0x6b92ada0, (q31_t)0xbaa18958,
-  (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0, (q31_t)0x6b8bddac, (q31_t)0xba96fa13, (q31_t)0x6b88754f, (q31_t)0xba91b2b1, (q31_t)0x6b850caf, (q31_t)0xba8c6b79,
-  (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b7e3aa9, (q31_t)0xba81dd8b, (q31_t)0x6b7ad142, (q31_t)0xba7c96d4, (q31_t)0x6b776799, (q31_t)0xba775048,
-  (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b709381, (q31_t)0xba6cc3b1, (q31_t)0x6b6d2911, (q31_t)0xba677da6, (q31_t)0x6b69be5f, (q31_t)0xba6237c5,
-  (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b62e834, (q31_t)0xba57ac86, (q31_t)0x6b5f7cbc, (q31_t)0xba526726, (q31_t)0x6b5c1101, (q31_t)0xba4d21f2,
-  (q31_t)0x6b58a503, (q31_t)0xba47dce8, (q31_t)0x6b5538c4, (q31_t)0xba42980a, (q31_t)0x6b51cc42, (q31_t)0xba3d5356, (q31_t)0x6b4e5f7f, (q31_t)0xba380ece,
-  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b478530, (q31_t)0xba2d863e, (q31_t)0x6b4417a6, (q31_t)0xba284237, (q31_t)0x6b40a9d9, (q31_t)0xba22fe5b,
-  (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b39cd7a, (q31_t)0xba187724, (q31_t)0x6b365ee7, (q31_t)0xba1333c9, (q31_t)0x6b32f012, (q31_t)0xba0df099,
-  (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b2c11a1, (q31_t)0xba036abb, (q31_t)0x6b28a206, (q31_t)0xb9fe280d, (q31_t)0x6b253228, (q31_t)0xb9f8e58a,
-  (q31_t)0x6b21c208, (q31_t)0xb9f3a332, (q31_t)0x6b1e51a7, (q31_t)0xb9ee6106, (q31_t)0x6b1ae103, (q31_t)0xb9e91f04, (q31_t)0x6b17701d, (q31_t)0xb9e3dd2e,
-  (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b108d8b, (q31_t)0xb9d95a03, (q31_t)0x6b0d1bdf, (q31_t)0xb9d418af, (q31_t)0x6b09a9f1, (q31_t)0xb9ced786,
-  (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6b02c54f, (q31_t)0xb9c455b6, (q31_t)0x6aff529a, (q31_t)0xb9bf150e, (q31_t)0x6afbdfa4, (q31_t)0xb9b9d493,
-  (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6af4f8f2, (q31_t)0xb9af541d, (q31_t)0x6af18536, (q31_t)0xb9aa1423, (q31_t)0x6aee1138, (q31_t)0xb9a4d455,
-  (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2, (q31_t)0x6ae72876, (q31_t)0xb99a553a, (q31_t)0x6ae3b3b2, (q31_t)0xb99515ee, (q31_t)0x6ae03eac, (q31_t)0xb98fd6cd,
-  (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6ad953db, (q31_t)0xb985590e, (q31_t)0x6ad5de0f, (q31_t)0xb9801a70, (q31_t)0x6ad26802, (q31_t)0xb97adbfd,
-  (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6acb7b21, (q31_t)0xb9705f9a, (q31_t)0x6ac8044e, (q31_t)0xb96b21aa, (q31_t)0x6ac48d39, (q31_t)0xb965e3e5,
-  (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6abd9e49, (q31_t)0xb95b68de, (q31_t)0x6aba266e, (q31_t)0xb9562b9c, (q31_t)0x6ab6ae52, (q31_t)0xb950ee86,
-  (q31_t)0x6ab335f4, (q31_t)0xb94bb19b, (q31_t)0x6aafbd54, (q31_t)0xb94674dc, (q31_t)0x6aac4472, (q31_t)0xb9413848, (q31_t)0x6aa8cb4e, (q31_t)0xb93bfbe0,
-  (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6aa1d841, (q31_t)0xb9318393, (q31_t)0x6a9e5e58, (q31_t)0xb92c47ae, (q31_t)0x6a9ae42e, (q31_t)0xb9270bf5,
-  (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a93ef13, (q31_t)0xb91c9505, (q31_t)0x6a907423, (q31_t)0xb91759cf, (q31_t)0x6a8cf8f1, (q31_t)0xb9121ec5,
-  (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a8601c8, (q31_t)0xb907a933, (q31_t)0x6a8285d1, (q31_t)0xb9026eac, (q31_t)0x6a7f0999, (q31_t)0xb8fd3451,
-  (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21, (q31_t)0x6a781062, (q31_t)0xb8f2c01d, (q31_t)0x6a749365, (q31_t)0xb8ed8646, (q31_t)0x6a711625, (q31_t)0xb8e84c99,
-  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a6a1ae2, (q31_t)0xb8ddd9c5, (q31_t)0x6a669cdd, (q31_t)0xb8d8a09d, (q31_t)0x6a631e97, (q31_t)0xb8d367a0,
-  (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a5c2147, (q31_t)0xb8c8f62b, (q31_t)0x6a58a23c, (q31_t)0xb8c3bdb2, (q31_t)0x6a5522ef, (q31_t)0xb8be8565,
-  (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a4e2392, (q31_t)0xb8b4154f, (q31_t)0x6a4aa381, (q31_t)0xb8aedd86, (q31_t)0x6a47232e, (q31_t)0xb8a9a5e9,
-  (q31_t)0x6a43a29a, (q31_t)0xb8a46e78, (q31_t)0x6a4021c4, (q31_t)0xb89f3733, (q31_t)0x6a3ca0ad, (q31_t)0xb89a001a, (q31_t)0x6a391f54, (q31_t)0xb894c92d,
-  (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a321bdd, (q31_t)0xb88a5bd8, (q31_t)0x6a2e99c0, (q31_t)0xb885256f, (q31_t)0x6a2b1761, (q31_t)0xb87fef33,
-  (q31_t)0x6a2794c1, (q31_t)0xb87ab922, (q31_t)0x6a2411df, (q31_t)0xb875833e, (q31_t)0x6a208ebb, (q31_t)0xb8704d85, (q31_t)0x6a1d0b57, (q31_t)0xb86b17f9,
-  (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a1603c8, (q31_t)0xb860ad66, (q31_t)0x6a127f9f, (q31_t)0xb85b785e, (q31_t)0x6a0efb35, (q31_t)0xb8564383,
-  (q31_t)0x6a0b7689, (q31_t)0xb8510ed4, (q31_t)0x6a07f19b, (q31_t)0xb84bda51, (q31_t)0x6a046c6c, (q31_t)0xb846a5fa, (q31_t)0x6a00e6fc, (q31_t)0xb84171cf,
-  (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69f9db57, (q31_t)0xb83709ff, (q31_t)0x69f65523, (q31_t)0xb831d659, (q31_t)0x69f2cead, (q31_t)0xb82ca2e0,
-  (q31_t)0x69ef47f6, (q31_t)0xb8276f93, (q31_t)0x69ebc0fe, (q31_t)0xb8223c72, (q31_t)0x69e839c4, (q31_t)0xb81d097e, (q31_t)0x69e4b249, (q31_t)0xb817d6b6,
-  (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69dda28f, (q31_t)0xb80d71aa, (q31_t)0x69da1a50, (q31_t)0xb8083f67, (q31_t)0x69d691cf, (q31_t)0xb8030d51,
-  (q31_t)0x69d3090e, (q31_t)0xb7fddb67, (q31_t)0x69cf800b, (q31_t)0xb7f8a9a9, (q31_t)0x69cbf6c7, (q31_t)0xb7f37818, (q31_t)0x69c86d41, (q31_t)0xb7ee46b3,
-  (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69c15973, (q31_t)0xb7e3e46e, (q31_t)0x69bdcf29, (q31_t)0xb7deb38f, (q31_t)0x69ba449f, (q31_t)0xb7d982dc,
-  (q31_t)0x69b6b9d3, (q31_t)0xb7d45255, (q31_t)0x69b32ec7, (q31_t)0xb7cf21fb, (q31_t)0x69afa378, (q31_t)0xb7c9f1ce, (q31_t)0x69ac17e9, (q31_t)0xb7c4c1cd,
-  (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x69a50007, (q31_t)0xb7ba6251, (q31_t)0x69a173b5, (q31_t)0xb7b532d6, (q31_t)0x699de721, (q31_t)0xb7b00387,
-  (q31_t)0x699a5a4c, (q31_t)0xb7aad465, (q31_t)0x6996cd35, (q31_t)0xb7a5a570, (q31_t)0x69933fde, (q31_t)0xb7a076a7, (q31_t)0x698fb246, (q31_t)0xb79b480b,
-  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69889651, (q31_t)0xb790eb58, (q31_t)0x698507f6, (q31_t)0xb78bbd42, (q31_t)0x69817959, (q31_t)0xb7868f59,
-  (q31_t)0x697dea7b, (q31_t)0xb781619c, (q31_t)0x697a5b5c, (q31_t)0xb77c340c, (q31_t)0x6976cbfc, (q31_t)0xb77706a9, (q31_t)0x69733c5b, (q31_t)0xb771d972,
-  (q31_t)0x696fac78, (q31_t)0xb76cac69, (q31_t)0x696c1c55, (q31_t)0xb7677f8c, (q31_t)0x69688bf1, (q31_t)0xb76252db, (q31_t)0x6964fb4c, (q31_t)0xb75d2658,
-  (q31_t)0x69616a65, (q31_t)0xb757fa01, (q31_t)0x695dd93e, (q31_t)0xb752cdd8, (q31_t)0x695a47d6, (q31_t)0xb74da1db, (q31_t)0x6956b62d, (q31_t)0xb748760b,
-  (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x694f9217, (q31_t)0xb73e1ef1, (q31_t)0x694bffab, (q31_t)0xb738f3a7, (q31_t)0x69486cfe, (q31_t)0xb733c88b,
-  (q31_t)0x6944da10, (q31_t)0xb72e9d9b, (q31_t)0x694146e1, (q31_t)0xb72972d8, (q31_t)0x693db371, (q31_t)0xb7244842, (q31_t)0x693a1fc0, (q31_t)0xb71f1dd9,
-  (q31_t)0x69368bce, (q31_t)0xb719f39e, (q31_t)0x6932f79b, (q31_t)0xb714c98e, (q31_t)0x692f6328, (q31_t)0xb70f9fac, (q31_t)0x692bce73, (q31_t)0xb70a75f7,
-  (q31_t)0x6928397e, (q31_t)0xb7054c6f, (q31_t)0x6924a448, (q31_t)0xb7002314, (q31_t)0x69210ed1, (q31_t)0xb6faf9e6, (q31_t)0x691d7919, (q31_t)0xb6f5d0e5,
-  (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x69164ce7, (q31_t)0xb6eb7f6b, (q31_t)0x6912b66c, (q31_t)0xb6e656f1, (q31_t)0x690f1fb1, (q31_t)0xb6e12ea4,
-  (q31_t)0x690b88b5, (q31_t)0xb6dc0685, (q31_t)0x6907f178, (q31_t)0xb6d6de92, (q31_t)0x690459fb, (q31_t)0xb6d1b6cd, (q31_t)0x6900c23c, (q31_t)0xb6cc8f35,
-  (q31_t)0x68fd2a3d, (q31_t)0xb6c767ca, (q31_t)0x68f991fd, (q31_t)0xb6c2408c, (q31_t)0x68f5f97d, (q31_t)0xb6bd197c, (q31_t)0x68f260bb, (q31_t)0xb6b7f298,
-  (q31_t)0x68eec7b9, (q31_t)0xb6b2cbe2, (q31_t)0x68eb2e76, (q31_t)0xb6ada559, (q31_t)0x68e794f3, (q31_t)0xb6a87efd, (q31_t)0x68e3fb2e, (q31_t)0xb6a358ce,
-  (q31_t)0x68e06129, (q31_t)0xb69e32cd, (q31_t)0x68dcc6e4, (q31_t)0xb6990cf9, (q31_t)0x68d92c5d, (q31_t)0xb693e752, (q31_t)0x68d59196, (q31_t)0xb68ec1d9,
-  (q31_t)0x68d1f68f, (q31_t)0xb6899c8d, (q31_t)0x68ce5b46, (q31_t)0xb684776e, (q31_t)0x68cabfbd, (q31_t)0xb67f527c, (q31_t)0x68c723f3, (q31_t)0xb67a2db8,
-  (q31_t)0x68c387e9, (q31_t)0xb6750921, (q31_t)0x68bfeb9e, (q31_t)0xb66fe4b8, (q31_t)0x68bc4f13, (q31_t)0xb66ac07c, (q31_t)0x68b8b247, (q31_t)0xb6659c6d,
-  (q31_t)0x68b5153a, (q31_t)0xb660788c, (q31_t)0x68b177ed, (q31_t)0xb65b54d8, (q31_t)0x68adda5f, (q31_t)0xb6563151, (q31_t)0x68aa3c90, (q31_t)0xb6510df8,
-  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x68a30031, (q31_t)0xb646c7ce, (q31_t)0x689f61a1, (q31_t)0xb641a4fe, (q31_t)0x689bc2d1, (q31_t)0xb63c825b,
-  (q31_t)0x689823bf, (q31_t)0xb6375fe5, (q31_t)0x6894846e, (q31_t)0xb6323d9d, (q31_t)0x6890e4dc, (q31_t)0xb62d1b82, (q31_t)0x688d4509, (q31_t)0xb627f995,
-  (q31_t)0x6889a4f6, (q31_t)0xb622d7d6, (q31_t)0x688604a2, (q31_t)0xb61db644, (q31_t)0x6882640e, (q31_t)0xb61894df, (q31_t)0x687ec339, (q31_t)0xb61373a9,
-  (q31_t)0x687b2224, (q31_t)0xb60e529f, (q31_t)0x687780ce, (q31_t)0xb60931c4, (q31_t)0x6873df38, (q31_t)0xb6041116, (q31_t)0x68703d62, (q31_t)0xb5fef095,
-  (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x6868f8f4, (q31_t)0xb5f4b01e, (q31_t)0x6865565c, (q31_t)0xb5ef9026, (q31_t)0x6861b384, (q31_t)0xb5ea705d,
-  (q31_t)0x685e106c, (q31_t)0xb5e550c1, (q31_t)0x685a6d13, (q31_t)0xb5e03153, (q31_t)0x6856c979, (q31_t)0xb5db1212, (q31_t)0x685325a0, (q31_t)0xb5d5f2ff,
-  (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x684bdd2c, (q31_t)0xb5cbb563, (q31_t)0x68483891, (q31_t)0xb5c696da, (q31_t)0x684493b6, (q31_t)0xb5c1787e,
-  (q31_t)0x6840ee9b, (q31_t)0xb5bc5a50, (q31_t)0x683d493f, (q31_t)0xb5b73c50, (q31_t)0x6839a3a4, (q31_t)0xb5b21e7e, (q31_t)0x6835fdc7, (q31_t)0xb5ad00d9,
-  (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x682eb14e, (q31_t)0xb5a2c61a, (q31_t)0x682b0ab1, (q31_t)0xb59da8ff, (q31_t)0x682763d4, (q31_t)0xb5988c12,
-  (q31_t)0x6823bcb7, (q31_t)0xb5936f53, (q31_t)0x68201559, (q31_t)0xb58e52c2, (q31_t)0x681c6dbb, (q31_t)0xb589365e, (q31_t)0x6818c5dd, (q31_t)0xb5841a29,
-  (q31_t)0x68151dbe, (q31_t)0xb57efe22, (q31_t)0x68117560, (q31_t)0xb579e248, (q31_t)0x680dccc1, (q31_t)0xb574c69d, (q31_t)0x680a23e2, (q31_t)0xb56fab1f,
-  (q31_t)0x68067ac3, (q31_t)0xb56a8fd0, (q31_t)0x6802d164, (q31_t)0xb56574ae, (q31_t)0x67ff27c4, (q31_t)0xb56059bb, (q31_t)0x67fb7de5, (q31_t)0xb55b3ef5,
-  (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67f42965, (q31_t)0xb55109f5, (q31_t)0x67f07ec5, (q31_t)0xb54befba, (q31_t)0x67ecd3e5, (q31_t)0xb546d5ac,
-  (q31_t)0x67e928c5, (q31_t)0xb541bbcd, (q31_t)0x67e57d64, (q31_t)0xb53ca21c, (q31_t)0x67e1d1c4, (q31_t)0xb5378899, (q31_t)0x67de25e3, (q31_t)0xb5326f45,
-  (q31_t)0x67da79c3, (q31_t)0xb52d561e, (q31_t)0x67d6cd62, (q31_t)0xb5283d26, (q31_t)0x67d320c1, (q31_t)0xb523245b, (q31_t)0x67cf73e1, (q31_t)0xb51e0bbf,
-  (q31_t)0x67cbc6c0, (q31_t)0xb518f351, (q31_t)0x67c8195f, (q31_t)0xb513db12, (q31_t)0x67c46bbe, (q31_t)0xb50ec300, (q31_t)0x67c0bddd, (q31_t)0xb509ab1d,
-  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67b9615c, (q31_t)0xb4ff7be1, (q31_t)0x67b5b2bb, (q31_t)0xb4fa6489, (q31_t)0x67b203da, (q31_t)0xb4f54d5f,
-  (q31_t)0x67ae54ba, (q31_t)0xb4f03663, (q31_t)0x67aaa559, (q31_t)0xb4eb1f95, (q31_t)0x67a6f5b8, (q31_t)0xb4e608f6, (q31_t)0x67a345d8, (q31_t)0xb4e0f285,
-  (q31_t)0x679f95b7, (q31_t)0xb4dbdc42, (q31_t)0x679be557, (q31_t)0xb4d6c62e, (q31_t)0x679834b6, (q31_t)0xb4d1b048, (q31_t)0x679483d6, (q31_t)0xb4cc9a90,
-  (q31_t)0x6790d2b6, (q31_t)0xb4c78507, (q31_t)0x678d2156, (q31_t)0xb4c26fad, (q31_t)0x67896fb6, (q31_t)0xb4bd5a80, (q31_t)0x6785bdd6, (q31_t)0xb4b84582,
-  (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x677e5957, (q31_t)0xb4ae1c12, (q31_t)0x677aa6b8, (q31_t)0xb4a9079f, (q31_t)0x6776f3d9, (q31_t)0xb4a3f35b,
-  (q31_t)0x677340ba, (q31_t)0xb49edf45, (q31_t)0x676f8d5b, (q31_t)0xb499cb5e, (q31_t)0x676bd9bd, (q31_t)0xb494b7a6, (q31_t)0x676825de, (q31_t)0xb48fa41c,
-  (q31_t)0x676471c0, (q31_t)0xb48a90c0, (q31_t)0x6760bd62, (q31_t)0xb4857d93, (q31_t)0x675d08c4, (q31_t)0xb4806a95, (q31_t)0x675953e7, (q31_t)0xb47b57c5,
-  (q31_t)0x67559eca, (q31_t)0xb4764523, (q31_t)0x6751e96d, (q31_t)0xb47132b1, (q31_t)0x674e33d0, (q31_t)0xb46c206d, (q31_t)0x674a7df4, (q31_t)0xb4670e57,
-  (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x6743117c, (q31_t)0xb45ceab8, (q31_t)0x673f5ae0, (q31_t)0xb457d92f, (q31_t)0x673ba405, (q31_t)0xb452c7d4,
-  (q31_t)0x6737ecea, (q31_t)0xb44db6a8, (q31_t)0x67343590, (q31_t)0xb448a5aa, (q31_t)0x67307df5, (q31_t)0xb44394db, (q31_t)0x672cc61c, (q31_t)0xb43e843b,
-  (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x672555a9, (q31_t)0xb4346387, (q31_t)0x67219d10, (q31_t)0xb42f5373, (q31_t)0x671de438, (q31_t)0xb42a438e,
-  (q31_t)0x671a2b20, (q31_t)0xb42533d8, (q31_t)0x671671c8, (q31_t)0xb4202451, (q31_t)0x6712b831, (q31_t)0xb41b14f8, (q31_t)0x670efe5a, (q31_t)0xb41605ce,
-  (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x670789ee, (q31_t)0xb40be807, (q31_t)0x6703cf58, (q31_t)0xb406d969, (q31_t)0x67001483, (q31_t)0xb401cafb,
-  (q31_t)0x66fc596f, (q31_t)0xb3fcbcbb, (q31_t)0x66f89e1b, (q31_t)0xb3f7aeaa, (q31_t)0x66f4e287, (q31_t)0xb3f2a0c9, (q31_t)0x66f126b4, (q31_t)0xb3ed9316,
-  (q31_t)0x66ed6aa1, (q31_t)0xb3e88592, (q31_t)0x66e9ae4f, (q31_t)0xb3e3783d, (q31_t)0x66e5f1be, (q31_t)0xb3de6b17, (q31_t)0x66e234ed, (q31_t)0xb3d95e1f,
-  (q31_t)0x66de77dc, (q31_t)0xb3d45157, (q31_t)0x66daba8c, (q31_t)0xb3cf44be, (q31_t)0x66d6fcfd, (q31_t)0xb3ca3854, (q31_t)0x66d33f2e, (q31_t)0xb3c52c19,
-  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66cbc2d2, (q31_t)0xb3bb142f, (q31_t)0x66c80445, (q31_t)0xb3b60881, (q31_t)0x66c44579, (q31_t)0xb3b0fd02,
-  (q31_t)0x66c0866d, (q31_t)0xb3abf1b2, (q31_t)0x66bcc721, (q31_t)0xb3a6e691, (q31_t)0x66b90797, (q31_t)0xb3a1dba0, (q31_t)0x66b547cd, (q31_t)0xb39cd0dd,
-  (q31_t)0x66b187c3, (q31_t)0xb397c649, (q31_t)0x66adc77b, (q31_t)0xb392bbe5, (q31_t)0x66aa06f3, (q31_t)0xb38db1b0, (q31_t)0x66a6462b, (q31_t)0xb388a7aa,
-  (q31_t)0x66a28524, (q31_t)0xb3839dd3, (q31_t)0x669ec3de, (q31_t)0xb37e942b, (q31_t)0x669b0259, (q31_t)0xb3798ab2, (q31_t)0x66974095, (q31_t)0xb3748169,
-  (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x668fbc4e, (q31_t)0xb36a6f64, (q31_t)0x668bf9cb, (q31_t)0xb36566a8, (q31_t)0x66883709, (q31_t)0xb3605e1c,
-  (q31_t)0x66847408, (q31_t)0xb35b55bf, (q31_t)0x6680b0c8, (q31_t)0xb3564d91, (q31_t)0x667ced49, (q31_t)0xb3514592, (q31_t)0x6679298a, (q31_t)0xb34c3dc3,
-  (q31_t)0x6675658c, (q31_t)0xb3473623, (q31_t)0x6671a14f, (q31_t)0xb3422eb2, (q31_t)0x666ddcd3, (q31_t)0xb33d2771, (q31_t)0x666a1818, (q31_t)0xb338205f,
-  (q31_t)0x6666531d, (q31_t)0xb333197c, (q31_t)0x66628de4, (q31_t)0xb32e12c9, (q31_t)0x665ec86b, (q31_t)0xb3290c45, (q31_t)0x665b02b3, (q31_t)0xb32405f1,
-  (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x66537685, (q31_t)0xb319f9d6, (q31_t)0x664fb010, (q31_t)0xb314f410, (q31_t)0x664be95b, (q31_t)0xb30fee79,
-  (q31_t)0x66482267, (q31_t)0xb30ae912, (q31_t)0x66445b35, (q31_t)0xb305e3da, (q31_t)0x664093c3, (q31_t)0xb300ded2, (q31_t)0x663ccc12, (q31_t)0xb2fbd9f9,
-  (q31_t)0x66390422, (q31_t)0xb2f6d550, (q31_t)0x66353bf3, (q31_t)0xb2f1d0d6, (q31_t)0x66317385, (q31_t)0xb2eccc8c, (q31_t)0x662daad8, (q31_t)0xb2e7c871,
-  (q31_t)0x6629e1ec, (q31_t)0xb2e2c486, (q31_t)0x662618c1, (q31_t)0xb2ddc0ca, (q31_t)0x66224f56, (q31_t)0xb2d8bd3e, (q31_t)0x661e85ad, (q31_t)0xb2d3b9e2,
-  (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5, (q31_t)0x6616f19e, (q31_t)0xb2c9b3b8, (q31_t)0x66132738, (q31_t)0xb2c4b0ea, (q31_t)0x660f5c93, (q31_t)0xb2bfae4c,
-  (q31_t)0x660b91af, (q31_t)0xb2baabde, (q31_t)0x6607c68c, (q31_t)0xb2b5a99f, (q31_t)0x6603fb2a, (q31_t)0xb2b0a790, (q31_t)0x66002f89, (q31_t)0xb2aba5b1,
-  (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65f8978b, (q31_t)0xb2a1a282, (q31_t)0x65f4cb2d, (q31_t)0xb29ca132, (q31_t)0x65f0fe91, (q31_t)0xb297a011,
-  (q31_t)0x65ed31b5, (q31_t)0xb2929f21, (q31_t)0x65e9649b, (q31_t)0xb28d9e60, (q31_t)0x65e59742, (q31_t)0xb2889dcf, (q31_t)0x65e1c9aa, (q31_t)0xb2839d6d,
-  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65da2dbd, (q31_t)0xb2799d3a, (q31_t)0x65d65f69, (q31_t)0xb2749d68, (q31_t)0x65d290d6, (q31_t)0xb26f9dc6,
-  (q31_t)0x65cec204, (q31_t)0xb26a9e54, (q31_t)0x65caf2f3, (q31_t)0xb2659f12, (q31_t)0x65c723a3, (q31_t)0xb2609fff, (q31_t)0x65c35415, (q31_t)0xb25ba11d,
-  (q31_t)0x65bf8447, (q31_t)0xb256a26a, (q31_t)0x65bbb43b, (q31_t)0xb251a3e7, (q31_t)0x65b7e3f1, (q31_t)0xb24ca594, (q31_t)0x65b41367, (q31_t)0xb247a771,
-  (q31_t)0x65b0429f, (q31_t)0xb242a97e, (q31_t)0x65ac7198, (q31_t)0xb23dabbb, (q31_t)0x65a8a052, (q31_t)0xb238ae28, (q31_t)0x65a4cece, (q31_t)0xb233b0c5,
-  (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x659d2b09, (q31_t)0xb229b68f, (q31_t)0x659958c9, (q31_t)0xb224b9bc, (q31_t)0x6595864a, (q31_t)0xb21fbd19,
-  (q31_t)0x6591b38c, (q31_t)0xb21ac0a6, (q31_t)0x658de08f, (q31_t)0xb215c463, (q31_t)0x658a0d54, (q31_t)0xb210c850, (q31_t)0x658639db, (q31_t)0xb20bcc6d,
-  (q31_t)0x65826622, (q31_t)0xb206d0ba, (q31_t)0x657e922b, (q31_t)0xb201d537, (q31_t)0x657abdf6, (q31_t)0xb1fcd9e5, (q31_t)0x6576e982, (q31_t)0xb1f7dec2,
-  (q31_t)0x657314cf, (q31_t)0xb1f2e3d0, (q31_t)0x656f3fde, (q31_t)0xb1ede90e, (q31_t)0x656b6aae, (q31_t)0xb1e8ee7c, (q31_t)0x6567953f, (q31_t)0xb1e3f41a,
-  (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x655fe9a7, (q31_t)0xb1d9ffe7, (q31_t)0x655c137d, (q31_t)0xb1d50616, (q31_t)0x65583d14, (q31_t)0xb1d00c75,
-  (q31_t)0x6554666d, (q31_t)0xb1cb1304, (q31_t)0x65508f87, (q31_t)0xb1c619c3, (q31_t)0x654cb863, (q31_t)0xb1c120b3, (q31_t)0x6548e101, (q31_t)0xb1bc27d3,
-  (q31_t)0x6545095f, (q31_t)0xb1b72f23, (q31_t)0x65413180, (q31_t)0xb1b236a4, (q31_t)0x653d5962, (q31_t)0xb1ad3e55, (q31_t)0x65398105, (q31_t)0xb1a84636,
-  (q31_t)0x6535a86b, (q31_t)0xb1a34e47, (q31_t)0x6531cf91, (q31_t)0xb19e5689, (q31_t)0x652df679, (q31_t)0xb1995efb, (q31_t)0x652a1d23, (q31_t)0xb194679e,
-  (q31_t)0x6526438f, (q31_t)0xb18f7071, (q31_t)0x652269bc, (q31_t)0xb18a7974, (q31_t)0x651e8faa, (q31_t)0xb18582a8, (q31_t)0x651ab55b, (q31_t)0xb1808c0c,
-  (q31_t)0x6516dacd, (q31_t)0xb17b95a0, (q31_t)0x65130000, (q31_t)0xb1769f65, (q31_t)0x650f24f5, (q31_t)0xb171a95b, (q31_t)0x650b49ac, (q31_t)0xb16cb380,
-  (q31_t)0x65076e25, (q31_t)0xb167bdd7, (q31_t)0x6503925f, (q31_t)0xb162c85d, (q31_t)0x64ffb65b, (q31_t)0xb15dd315, (q31_t)0x64fbda18, (q31_t)0xb158ddfd,
-  (q31_t)0x64f7fd98, (q31_t)0xb153e915, (q31_t)0x64f420d9, (q31_t)0xb14ef45e, (q31_t)0x64f043dc, (q31_t)0xb149ffd7, (q31_t)0x64ec66a0, (q31_t)0xb1450b81,
-  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64e4ab6e, (q31_t)0xb13b2367, (q31_t)0x64e0cd78, (q31_t)0xb1362fa2, (q31_t)0x64dcef44, (q31_t)0xb1313c0e,
-  (q31_t)0x64d910d1, (q31_t)0xb12c48ab, (q31_t)0x64d53220, (q31_t)0xb1275579, (q31_t)0x64d15331, (q31_t)0xb1226277, (q31_t)0x64cd7404, (q31_t)0xb11d6fa6,
-  (q31_t)0x64c99498, (q31_t)0xb1187d05, (q31_t)0x64c5b4ef, (q31_t)0xb1138a95, (q31_t)0x64c1d507, (q31_t)0xb10e9856, (q31_t)0x64bdf4e1, (q31_t)0xb109a648,
-  (q31_t)0x64ba147d, (q31_t)0xb104b46a, (q31_t)0x64b633da, (q31_t)0xb0ffc2bd, (q31_t)0x64b252fa, (q31_t)0xb0fad140, (q31_t)0x64ae71dc, (q31_t)0xb0f5dff5,
-  (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x64a6aee4, (q31_t)0xb0ebfdf0, (q31_t)0x64a2cd0c, (q31_t)0xb0e70d37, (q31_t)0x649eeaf5, (q31_t)0xb0e21cae,
-  (q31_t)0x649b08a0, (q31_t)0xb0dd2c56, (q31_t)0x6497260d, (q31_t)0xb0d83c2f, (q31_t)0x6493433c, (q31_t)0xb0d34c39, (q31_t)0x648f602d, (q31_t)0xb0ce5c74,
-  (q31_t)0x648b7ce0, (q31_t)0xb0c96ce0, (q31_t)0x64879955, (q31_t)0xb0c47d7c, (q31_t)0x6483b58c, (q31_t)0xb0bf8e4a, (q31_t)0x647fd185, (q31_t)0xb0ba9f48,
-  (q31_t)0x647bed3f, (q31_t)0xb0b5b077, (q31_t)0x647808bc, (q31_t)0xb0b0c1d7, (q31_t)0x647423fb, (q31_t)0xb0abd368, (q31_t)0x64703efc, (q31_t)0xb0a6e52a,
-  (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x64687444, (q31_t)0xb09d0941, (q31_t)0x64648e8c, (q31_t)0xb0981b96, (q31_t)0x6460a895, (q31_t)0xb0932e1b,
-  (q31_t)0x645cc260, (q31_t)0xb08e40d2, (q31_t)0x6458dbed, (q31_t)0xb08953ba, (q31_t)0x6454f53d, (q31_t)0xb08466d3, (q31_t)0x64510e4e, (q31_t)0xb07f7a1c,
-  (q31_t)0x644d2722, (q31_t)0xb07a8d97, (q31_t)0x64493fb8, (q31_t)0xb075a143, (q31_t)0x64455810, (q31_t)0xb070b520, (q31_t)0x6441702a, (q31_t)0xb06bc92e,
-  (q31_t)0x643d8806, (q31_t)0xb066dd6d, (q31_t)0x64399fa5, (q31_t)0xb061f1de, (q31_t)0x6435b706, (q31_t)0xb05d067f, (q31_t)0x6431ce28, (q31_t)0xb0581b51,
-  (q31_t)0x642de50d, (q31_t)0xb0533055, (q31_t)0x6429fbb5, (q31_t)0xb04e458a, (q31_t)0x6426121e, (q31_t)0xb0495af0, (q31_t)0x6422284a, (q31_t)0xb0447087,
-  (q31_t)0x641e3e38, (q31_t)0xb03f864f, (q31_t)0x641a53e8, (q31_t)0xb03a9c49, (q31_t)0x6416695a, (q31_t)0xb035b273, (q31_t)0x64127e8f, (q31_t)0xb030c8cf,
-  (q31_t)0x640e9386, (q31_t)0xb02bdf5c, (q31_t)0x640aa83f, (q31_t)0xb026f61b, (q31_t)0x6406bcba, (q31_t)0xb0220d0a, (q31_t)0x6402d0f8, (q31_t)0xb01d242b,
-  (q31_t)0x63fee4f8, (q31_t)0xb0183b7d, (q31_t)0x63faf8bb, (q31_t)0xb0135301, (q31_t)0x63f70c3f, (q31_t)0xb00e6ab5, (q31_t)0x63f31f86, (q31_t)0xb009829c,
-  (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63eb455c, (q31_t)0xafffb2fc, (q31_t)0x63e757ea, (q31_t)0xaffacb76, (q31_t)0x63e36a3a, (q31_t)0xaff5e421,
-  (q31_t)0x63df7c4d, (q31_t)0xaff0fcfe, (q31_t)0x63db8e22, (q31_t)0xafec160c, (q31_t)0x63d79fba, (q31_t)0xafe72f4c, (q31_t)0x63d3b114, (q31_t)0xafe248bd,
-  (q31_t)0x63cfc231, (q31_t)0xafdd625f, (q31_t)0x63cbd310, (q31_t)0xafd87c33, (q31_t)0x63c7e3b1, (q31_t)0xafd39638, (q31_t)0x63c3f415, (q31_t)0xafceb06f,
-  (q31_t)0x63c0043b, (q31_t)0xafc9cad7, (q31_t)0x63bc1424, (q31_t)0xafc4e571, (q31_t)0x63b823cf, (q31_t)0xafc0003c, (q31_t)0x63b4333d, (q31_t)0xafbb1b39,
-  (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x63ac5160, (q31_t)0xafb151c7, (q31_t)0x63a86015, (q31_t)0xafac6d58, (q31_t)0x63a46e8d, (q31_t)0xafa7891b,
-  (q31_t)0x63a07cc7, (q31_t)0xafa2a50f, (q31_t)0x639c8ac4, (q31_t)0xaf9dc135, (q31_t)0x63989884, (q31_t)0xaf98dd8d, (q31_t)0x6394a606, (q31_t)0xaf93fa16,
-  (q31_t)0x6390b34a, (q31_t)0xaf8f16d1, (q31_t)0x638cc051, (q31_t)0xaf8a33bd, (q31_t)0x6388cd1b, (q31_t)0xaf8550db, (q31_t)0x6384d9a7, (q31_t)0xaf806e2b,
-  (q31_t)0x6380e5f6, (q31_t)0xaf7b8bac, (q31_t)0x637cf208, (q31_t)0xaf76a95f, (q31_t)0x6378fddc, (q31_t)0xaf71c743, (q31_t)0x63750973, (q31_t)0xaf6ce55a,
-  (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x636d1fe9, (q31_t)0xaf63221c, (q31_t)0x63692ac7, (q31_t)0xaf5e40c7, (q31_t)0x63653569, (q31_t)0xaf595fa4,
-  (q31_t)0x63613fcd, (q31_t)0xaf547eb3, (q31_t)0x635d49f4, (q31_t)0xaf4f9df4, (q31_t)0x635953dd, (q31_t)0xaf4abd66, (q31_t)0x63555d8a, (q31_t)0xaf45dd0b,
-  (q31_t)0x635166f9, (q31_t)0xaf40fce1, (q31_t)0x634d702b, (q31_t)0xaf3c1ce9, (q31_t)0x6349791f, (q31_t)0xaf373d22, (q31_t)0x634581d6, (q31_t)0xaf325d8e,
-  (q31_t)0x63418a50, (q31_t)0xaf2d7e2b, (q31_t)0x633d928d, (q31_t)0xaf289efa, (q31_t)0x63399a8d, (q31_t)0xaf23bffb, (q31_t)0x6335a24f, (q31_t)0xaf1ee12e,
-  (q31_t)0x6331a9d4, (q31_t)0xaf1a0293, (q31_t)0x632db11c, (q31_t)0xaf15242a, (q31_t)0x6329b827, (q31_t)0xaf1045f3, (q31_t)0x6325bef5, (q31_t)0xaf0b67ed,
-  (q31_t)0x6321c585, (q31_t)0xaf068a1a, (q31_t)0x631dcbd9, (q31_t)0xaf01ac78, (q31_t)0x6319d1ef, (q31_t)0xaefccf09, (q31_t)0x6315d7c8, (q31_t)0xaef7f1cb,
-  (q31_t)0x6311dd64, (q31_t)0xaef314c0, (q31_t)0x630de2c3, (q31_t)0xaeee37e6, (q31_t)0x6309e7e4, (q31_t)0xaee95b3f, (q31_t)0x6305ecc9, (q31_t)0xaee47ec9,
-  (q31_t)0x6301f171, (q31_t)0xaedfa285, (q31_t)0x62fdf5db, (q31_t)0xaedac674, (q31_t)0x62f9fa09, (q31_t)0xaed5ea95, (q31_t)0x62f5fdf9, (q31_t)0xaed10ee7,
-  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62ee0523, (q31_t)0xaec75823, (q31_t)0x62ea085c, (q31_t)0xaec27d0c, (q31_t)0x62e60b58, (q31_t)0xaebda227,
-  (q31_t)0x62e20e17, (q31_t)0xaeb8c774, (q31_t)0x62de109a, (q31_t)0xaeb3ecf3, (q31_t)0x62da12df, (q31_t)0xaeaf12a4, (q31_t)0x62d614e7, (q31_t)0xaeaa3888,
-  (q31_t)0x62d216b3, (q31_t)0xaea55e9e, (q31_t)0x62ce1841, (q31_t)0xaea084e6, (q31_t)0x62ca1992, (q31_t)0xae9bab60, (q31_t)0x62c61aa7, (q31_t)0xae96d20c,
-  (q31_t)0x62c21b7e, (q31_t)0xae91f8eb, (q31_t)0x62be1c19, (q31_t)0xae8d1ffb, (q31_t)0x62ba1c77, (q31_t)0xae88473e, (q31_t)0x62b61c98, (q31_t)0xae836eb4,
-  (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x62ae1c23, (q31_t)0xae79be35, (q31_t)0x62aa1b8d, (q31_t)0xae74e641, (q31_t)0x62a61aba, (q31_t)0xae700e80,
-  (q31_t)0x62a219aa, (q31_t)0xae6b36f0, (q31_t)0x629e185e, (q31_t)0xae665f93, (q31_t)0x629a16d5, (q31_t)0xae618869, (q31_t)0x6296150f, (q31_t)0xae5cb171,
-  (q31_t)0x6292130c, (q31_t)0xae57daab, (q31_t)0x628e10cc, (q31_t)0xae530417, (q31_t)0x628a0e50, (q31_t)0xae4e2db6, (q31_t)0x62860b97, (q31_t)0xae495787,
-  (q31_t)0x628208a1, (q31_t)0xae44818b, (q31_t)0x627e056e, (q31_t)0xae3fabc1, (q31_t)0x627a01fe, (q31_t)0xae3ad629, (q31_t)0x6275fe52, (q31_t)0xae3600c4,
-  (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x626df643, (q31_t)0xae2c5691, (q31_t)0x6269f1e1, (q31_t)0xae2781c4, (q31_t)0x6265ed42, (q31_t)0xae22ad29,
-  (q31_t)0x6261e866, (q31_t)0xae1dd8c0, (q31_t)0x625de34e, (q31_t)0xae19048a, (q31_t)0x6259ddf8, (q31_t)0xae143086, (q31_t)0x6255d866, (q31_t)0xae0f5cb5,
-  (q31_t)0x6251d298, (q31_t)0xae0a8916, (q31_t)0x624dcc8d, (q31_t)0xae05b5aa, (q31_t)0x6249c645, (q31_t)0xae00e271, (q31_t)0x6245bfc0, (q31_t)0xadfc0f6a,
-  (q31_t)0x6241b8ff, (q31_t)0xadf73c96, (q31_t)0x623db202, (q31_t)0xadf269f4, (q31_t)0x6239aac7, (q31_t)0xaded9785, (q31_t)0x6235a351, (q31_t)0xade8c548,
-  (q31_t)0x62319b9d, (q31_t)0xade3f33e, (q31_t)0x622d93ad, (q31_t)0xaddf2167, (q31_t)0x62298b81, (q31_t)0xadda4fc3, (q31_t)0x62258317, (q31_t)0xadd57e51,
-  (q31_t)0x62217a72, (q31_t)0xadd0ad12, (q31_t)0x621d7190, (q31_t)0xadcbdc05, (q31_t)0x62196871, (q31_t)0xadc70b2c, (q31_t)0x62155f16, (q31_t)0xadc23a85,
-  (q31_t)0x6211557e, (q31_t)0xadbd6a10, (q31_t)0x620d4baa, (q31_t)0xadb899cf, (q31_t)0x62094199, (q31_t)0xadb3c9c0, (q31_t)0x6205374c, (q31_t)0xadaef9e4,
-  (q31_t)0x62012cc2, (q31_t)0xadaa2a3b, (q31_t)0x61fd21fc, (q31_t)0xada55ac4, (q31_t)0x61f916f9, (q31_t)0xada08b80, (q31_t)0x61f50bba, (q31_t)0xad9bbc70,
-  (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61ecf487, (q31_t)0xad921ee6, (q31_t)0x61e8e893, (q31_t)0xad8d506e, (q31_t)0x61e4dc62, (q31_t)0xad888229,
-  (q31_t)0x61e0cff5, (q31_t)0xad83b416, (q31_t)0x61dcc34c, (q31_t)0xad7ee636, (q31_t)0x61d8b666, (q31_t)0xad7a1889, (q31_t)0x61d4a944, (q31_t)0xad754b0f,
-  (q31_t)0x61d09be5, (q31_t)0xad707dc8, (q31_t)0x61cc8e4b, (q31_t)0xad6bb0b4, (q31_t)0x61c88074, (q31_t)0xad66e3d3, (q31_t)0x61c47260, (q31_t)0xad621725,
-  (q31_t)0x61c06410, (q31_t)0xad5d4aaa, (q31_t)0x61bc5584, (q31_t)0xad587e61, (q31_t)0x61b846bc, (q31_t)0xad53b24c, (q31_t)0x61b437b7, (q31_t)0xad4ee66a,
-  (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x61ac18f9, (q31_t)0xad454f3e, (q31_t)0x61a80940, (q31_t)0xad4083f5, (q31_t)0x61a3f94a, (q31_t)0xad3bb8df,
-  (q31_t)0x619fe918, (q31_t)0xad36edfc, (q31_t)0x619bd8aa, (q31_t)0xad32234b, (q31_t)0x6197c800, (q31_t)0xad2d58ce, (q31_t)0x6193b719, (q31_t)0xad288e85,
-  (q31_t)0x618fa5f7, (q31_t)0xad23c46e, (q31_t)0x618b9498, (q31_t)0xad1efa8a, (q31_t)0x618782fd, (q31_t)0xad1a30d9, (q31_t)0x61837126, (q31_t)0xad15675c,
-  (q31_t)0x617f5f12, (q31_t)0xad109e12, (q31_t)0x617b4cc3, (q31_t)0xad0bd4fb, (q31_t)0x61773a37, (q31_t)0xad070c17, (q31_t)0x61732770, (q31_t)0xad024366,
-  (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x616b012c, (q31_t)0xacf8b29e, (q31_t)0x6166edb0, (q31_t)0xacf3ea87, (q31_t)0x6162d9f8, (q31_t)0xacef22a3,
-  (q31_t)0x615ec603, (q31_t)0xacea5af2, (q31_t)0x615ab1d3, (q31_t)0xace59375, (q31_t)0x61569d67, (q31_t)0xace0cc2b, (q31_t)0x615288be, (q31_t)0xacdc0514,
-  (q31_t)0x614e73da, (q31_t)0xacd73e30, (q31_t)0x614a5eba, (q31_t)0xacd27780, (q31_t)0x6146495d, (q31_t)0xaccdb103, (q31_t)0x614233c5, (q31_t)0xacc8eab9,
-  (q31_t)0x613e1df0, (q31_t)0xacc424a3, (q31_t)0x613a07e0, (q31_t)0xacbf5ec0, (q31_t)0x6135f193, (q31_t)0xacba9910, (q31_t)0x6131db0b, (q31_t)0xacb5d394,
-  (q31_t)0x612dc447, (q31_t)0xacb10e4b, (q31_t)0x6129ad46, (q31_t)0xacac4935, (q31_t)0x6125960a, (q31_t)0xaca78453, (q31_t)0x61217e92, (q31_t)0xaca2bfa4,
-  (q31_t)0x611d66de, (q31_t)0xac9dfb29, (q31_t)0x61194eee, (q31_t)0xac9936e1, (q31_t)0x611536c2, (q31_t)0xac9472cd, (q31_t)0x61111e5b, (q31_t)0xac8faeec,
-  (q31_t)0x610d05b7, (q31_t)0xac8aeb3e, (q31_t)0x6108ecd8, (q31_t)0xac8627c4, (q31_t)0x6104d3bc, (q31_t)0xac81647e, (q31_t)0x6100ba65, (q31_t)0xac7ca16b,
-  (q31_t)0x60fca0d2, (q31_t)0xac77de8b, (q31_t)0x60f88703, (q31_t)0xac731bdf, (q31_t)0x60f46cf9, (q31_t)0xac6e5967, (q31_t)0x60f052b2, (q31_t)0xac699722,
-  (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60e81d72, (q31_t)0xac601333, (q31_t)0x60e40278, (q31_t)0xac5b5189, (q31_t)0x60dfe743, (q31_t)0xac569012,
-  (q31_t)0x60dbcbd1, (q31_t)0xac51cecf, (q31_t)0x60d7b024, (q31_t)0xac4d0dc0, (q31_t)0x60d3943b, (q31_t)0xac484ce4, (q31_t)0x60cf7817, (q31_t)0xac438c3c,
-  (q31_t)0x60cb5bb7, (q31_t)0xac3ecbc7, (q31_t)0x60c73f1b, (q31_t)0xac3a0b87, (q31_t)0x60c32243, (q31_t)0xac354b7a, (q31_t)0x60bf0530, (q31_t)0xac308ba0,
-  (q31_t)0x60bae7e1, (q31_t)0xac2bcbfa, (q31_t)0x60b6ca56, (q31_t)0xac270c88, (q31_t)0x60b2ac8f, (q31_t)0xac224d4a, (q31_t)0x60ae8e8d, (q31_t)0xac1d8e40,
-  (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x60a651d7, (q31_t)0xac1410c6, (q31_t)0x60a23322, (q31_t)0xac0f5256, (q31_t)0x609e1431, (q31_t)0xac0a941b,
-  (q31_t)0x6099f505, (q31_t)0xac05d613, (q31_t)0x6095d59d, (q31_t)0xac01183f, (q31_t)0x6091b5fa, (q31_t)0xabfc5a9f, (q31_t)0x608d961b, (q31_t)0xabf79d33,
-  (q31_t)0x60897601, (q31_t)0xabf2dffb, (q31_t)0x608555ab, (q31_t)0xabee22f6, (q31_t)0x60813519, (q31_t)0xabe96625, (q31_t)0x607d144c, (q31_t)0xabe4a988,
-  (q31_t)0x6078f344, (q31_t)0xabdfed1f, (q31_t)0x6074d200, (q31_t)0xabdb30ea, (q31_t)0x6070b080, (q31_t)0xabd674e9, (q31_t)0x606c8ec5, (q31_t)0xabd1b91c,
-  (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x60644a9d, (q31_t)0xabc8421d, (q31_t)0x6060282f, (q31_t)0xabc386ec, (q31_t)0x605c0587, (q31_t)0xabbecbee,
-  (q31_t)0x6057e2a2, (q31_t)0xabba1125, (q31_t)0x6053bf82, (q31_t)0xabb5568f, (q31_t)0x604f9c27, (q31_t)0xabb09c2e, (q31_t)0x604b7891, (q31_t)0xababe200,
-  (q31_t)0x604754bf, (q31_t)0xaba72807, (q31_t)0x604330b1, (q31_t)0xaba26e41, (q31_t)0x603f0c69, (q31_t)0xab9db4b0, (q31_t)0x603ae7e5, (q31_t)0xab98fb52,
-  (q31_t)0x6036c325, (q31_t)0xab944229, (q31_t)0x60329e2a, (q31_t)0xab8f8934, (q31_t)0x602e78f4, (q31_t)0xab8ad073, (q31_t)0x602a5383, (q31_t)0xab8617e6,
-  (q31_t)0x60262dd6, (q31_t)0xab815f8d, (q31_t)0x602207ee, (q31_t)0xab7ca768, (q31_t)0x601de1ca, (q31_t)0xab77ef77, (q31_t)0x6019bb6b, (q31_t)0xab7337bb,
-  (q31_t)0x601594d1, (q31_t)0xab6e8032, (q31_t)0x60116dfc, (q31_t)0xab69c8de, (q31_t)0x600d46ec, (q31_t)0xab6511be, (q31_t)0x60091fa0, (q31_t)0xab605ad2,
-  (q31_t)0x6004f819, (q31_t)0xab5ba41a, (q31_t)0x6000d057, (q31_t)0xab56ed97, (q31_t)0x5ffca859, (q31_t)0xab523748, (q31_t)0x5ff88021, (q31_t)0xab4d812d,
-  (q31_t)0x5ff457ad, (q31_t)0xab48cb46, (q31_t)0x5ff02efe, (q31_t)0xab441593, (q31_t)0x5fec0613, (q31_t)0xab3f6015, (q31_t)0x5fe7dcee, (q31_t)0xab3aaacb,
-  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fdf89f2, (q31_t)0xab3140d4, (q31_t)0x5fdb601b, (q31_t)0xab2c8c27, (q31_t)0x5fd73609, (q31_t)0xab27d7ae,
-  (q31_t)0x5fd30bbc, (q31_t)0xab23236a, (q31_t)0x5fcee133, (q31_t)0xab1e6f5a, (q31_t)0x5fcab670, (q31_t)0xab19bb7e, (q31_t)0x5fc68b72, (q31_t)0xab1507d7,
-  (q31_t)0x5fc26038, (q31_t)0xab105464, (q31_t)0x5fbe34c4, (q31_t)0xab0ba125, (q31_t)0x5fba0914, (q31_t)0xab06ee1b, (q31_t)0x5fb5dd29, (q31_t)0xab023b46,
-  (q31_t)0x5fb1b104, (q31_t)0xaafd88a4, (q31_t)0x5fad84a3, (q31_t)0xaaf8d637, (q31_t)0x5fa95807, (q31_t)0xaaf423ff, (q31_t)0x5fa52b31, (q31_t)0xaaef71fb,
-  (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f9cd0d2, (q31_t)0xaae60e91, (q31_t)0x5f98a34a, (q31_t)0xaae15d2a, (q31_t)0x5f947588, (q31_t)0xaadcabf8,
-  (q31_t)0x5f90478a, (q31_t)0xaad7fafb, (q31_t)0x5f8c1951, (q31_t)0xaad34a32, (q31_t)0x5f87eade, (q31_t)0xaace999d, (q31_t)0x5f83bc2f, (q31_t)0xaac9e93e,
-  (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f7b5e22, (q31_t)0xaac0891c, (q31_t)0x5f772ec2, (q31_t)0xaabbd959, (q31_t)0x5f72ff28, (q31_t)0xaab729cc,
-  (q31_t)0x5f6ecf53, (q31_t)0xaab27a73, (q31_t)0x5f6a9f44, (q31_t)0xaaadcb4f, (q31_t)0x5f666ef9, (q31_t)0xaaa91c5f, (q31_t)0x5f623e73, (q31_t)0xaaa46da4,
-  (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f59dcb8, (q31_t)0xaa9b10cc, (q31_t)0x5f55ab82, (q31_t)0xaa9662af, (q31_t)0x5f517a11, (q31_t)0xaa91b4c7,
-  (q31_t)0x5f4d4865, (q31_t)0xaa8d0713, (q31_t)0x5f49167f, (q31_t)0xaa885994, (q31_t)0x5f44e45e, (q31_t)0xaa83ac4a, (q31_t)0x5f40b202, (q31_t)0xaa7eff34,
-  (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f384c9a, (q31_t)0xaa75a5a8, (q31_t)0x5f34198e, (q31_t)0xaa70f930, (q31_t)0x5f2fe647, (q31_t)0xaa6c4cee,
-  (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0, (q31_t)0x5f277f09, (q31_t)0xaa62f507, (q31_t)0x5f234b12, (q31_t)0xaa5e4963, (q31_t)0x5f1f16e0, (q31_t)0xaa599df4,
-  (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f16adcc, (q31_t)0xaa5047b4, (q31_t)0x5f1278eb, (q31_t)0xaa4b9ce3, (q31_t)0x5f0e43ce, (q31_t)0xaa46f248,
-  (q31_t)0x5f0a0e77, (q31_t)0xaa4247e1, (q31_t)0x5f05d8e6, (q31_t)0xaa3d9daf, (q31_t)0x5f01a31a, (q31_t)0xaa38f3b1, (q31_t)0x5efd6d13, (q31_t)0xaa3449e9,
-  (q31_t)0x5ef936d1, (q31_t)0xaa2fa056, (q31_t)0x5ef50055, (q31_t)0xaa2af6f7, (q31_t)0x5ef0c99f, (q31_t)0xaa264dce, (q31_t)0x5eec92ae, (q31_t)0xaa21a4d9,
-  (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a, (q31_t)0x5ee4241c, (q31_t)0xaa18538f, (q31_t)0x5edfec7b, (q31_t)0xaa13ab3a, (q31_t)0x5edbb49f, (q31_t)0xaa0f0319,
-  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ed34439, (q31_t)0xaa05b377, (q31_t)0x5ecf0baf, (q31_t)0xaa010bf6, (q31_t)0x5ecad2e9, (q31_t)0xa9fc64a9,
-  (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92, (q31_t)0x5ec260af, (q31_t)0xa9f316b0, (q31_t)0x5ebe273b, (q31_t)0xa9ee7002, (q31_t)0x5eb9ed8b, (q31_t)0xa9e9c98a,
-  (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5eb1797e, (q31_t)0xa9e07d39, (q31_t)0x5ead3f1f, (q31_t)0xa9dbd761, (q31_t)0x5ea90487, (q31_t)0xa9d731bd,
-  (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e, (q31_t)0x5ea08ea6, (q31_t)0xa9cde715, (q31_t)0x5e9c535e, (q31_t)0xa9c94211, (q31_t)0x5e9817dc, (q31_t)0xa9c49d42,
-  (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e8fa028, (q31_t)0xa9bb5444, (q31_t)0x5e8b63f7, (q31_t)0xa9b6b014, (q31_t)0x5e87278b, (q31_t)0xa9b20c1a,
-  (q31_t)0x5e82eae5, (q31_t)0xa9ad6855, (q31_t)0x5e7eae05, (q31_t)0xa9a8c4c5, (q31_t)0x5e7a70ea, (q31_t)0xa9a4216b, (q31_t)0x5e763395, (q31_t)0xa99f7e46,
-  (q31_t)0x5e71f606, (q31_t)0xa99adb56, (q31_t)0x5e6db83d, (q31_t)0xa996389b, (q31_t)0x5e697a39, (q31_t)0xa9919616, (q31_t)0x5e653bfc, (q31_t)0xa98cf3c6,
-  (q31_t)0x5e60fd84, (q31_t)0xa98851ac, (q31_t)0x5e5cbed1, (q31_t)0xa983afc6, (q31_t)0x5e587fe5, (q31_t)0xa97f0e16, (q31_t)0x5e5440be, (q31_t)0xa97a6c9c,
-  (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e4bc1c2, (q31_t)0xa9712a47, (q31_t)0x5e4781ed, (q31_t)0xa96c896c, (q31_t)0x5e4341de, (q31_t)0xa967e8c7,
-  (q31_t)0x5e3f0194, (q31_t)0xa9634858, (q31_t)0x5e3ac110, (q31_t)0xa95ea81d, (q31_t)0x5e368053, (q31_t)0xa95a0819, (q31_t)0x5e323f5b, (q31_t)0xa9556849,
-  (q31_t)0x5e2dfe29, (q31_t)0xa950c8b0, (q31_t)0x5e29bcbd, (q31_t)0xa94c294b, (q31_t)0x5e257b17, (q31_t)0xa9478a1c, (q31_t)0x5e213936, (q31_t)0xa942eb23,
-  (q31_t)0x5e1cf71c, (q31_t)0xa93e4c5f, (q31_t)0x5e18b4c8, (q31_t)0xa939add1, (q31_t)0x5e147239, (q31_t)0xa9350f78, (q31_t)0x5e102f71, (q31_t)0xa9307155,
-  (q31_t)0x5e0bec6e, (q31_t)0xa92bd367, (q31_t)0x5e07a932, (q31_t)0xa92735af, (q31_t)0x5e0365bb, (q31_t)0xa922982c, (q31_t)0x5dff220b, (q31_t)0xa91dfadf,
-  (q31_t)0x5dfade20, (q31_t)0xa9195dc7, (q31_t)0x5df699fc, (q31_t)0xa914c0e6, (q31_t)0x5df2559e, (q31_t)0xa9102439, (q31_t)0x5dee1105, (q31_t)0xa90b87c3,
-  (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5de58727, (q31_t)0xa9024f76, (q31_t)0x5de141e1, (q31_t)0xa8fdb3a1, (q31_t)0x5ddcfc61, (q31_t)0xa8f91801,
-  (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97, (q31_t)0x5dd470b3, (q31_t)0xa8efe162, (q31_t)0x5dd02a85, (q31_t)0xa8eb4663, (q31_t)0x5dcbe41d, (q31_t)0xa8e6ab9a,
-  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5dc356a1, (q31_t)0xa8dd76a9, (q31_t)0x5dbf0f8c, (q31_t)0xa8d8dc81, (q31_t)0x5dbac83d, (q31_t)0xa8d4428f,
-  (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2, (q31_t)0x5db238f1, (q31_t)0xa8cb0f4b, (q31_t)0x5dadf0f5, (q31_t)0xa8c675fb, (q31_t)0x5da9a8bf, (q31_t)0xa8c1dce0,
-  (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5da117a5, (q31_t)0xa8b8ab4b, (q31_t)0x5d9ccec2, (q31_t)0xa8b412d1, (q31_t)0x5d9885a5, (q31_t)0xa8af7a8e,
-  (q31_t)0x5d943c4e, (q31_t)0xa8aae280, (q31_t)0x5d8ff2bd, (q31_t)0xa8a64aa8, (q31_t)0x5d8ba8f3, (q31_t)0xa8a1b306, (q31_t)0x5d875eef, (q31_t)0xa89d1b99,
-  (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d7eca39, (q31_t)0xa893ed63, (q31_t)0x5d7a7f88, (q31_t)0xa88f5698, (q31_t)0x5d76349d, (q31_t)0xa88ac004,
-  (q31_t)0x5d71e979, (q31_t)0xa88629a5, (q31_t)0x5d6d9e1b, (q31_t)0xa881937c, (q31_t)0x5d695283, (q31_t)0xa87cfd8a, (q31_t)0x5d6506b2, (q31_t)0xa87867cd,
-  (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d5c6e62, (q31_t)0xa86f3cf6, (q31_t)0x5d5821e4, (q31_t)0xa86aa7db, (q31_t)0x5d53d52d, (q31_t)0xa86612f6,
-  (q31_t)0x5d4f883b, (q31_t)0xa8617e48, (q31_t)0x5d4b3b10, (q31_t)0xa85ce9cf, (q31_t)0x5d46edac, (q31_t)0xa858558d, (q31_t)0x5d42a00e, (q31_t)0xa853c180,
-  (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d3a0426, (q31_t)0xa84a9a0a, (q31_t)0x5d35b5db, (q31_t)0xa84606a0, (q31_t)0x5d316757, (q31_t)0xa841736c,
-  (q31_t)0x5d2d189a, (q31_t)0xa83ce06e, (q31_t)0x5d28c9a3, (q31_t)0xa8384da6, (q31_t)0x5d247a72, (q31_t)0xa833bb14, (q31_t)0x5d202b09, (q31_t)0xa82f28b9,
-  (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d178b89, (q31_t)0xa82604a4, (q31_t)0x5d133b72, (q31_t)0xa82172eb, (q31_t)0x5d0eeb23, (q31_t)0xa81ce169,
-  (q31_t)0x5d0a9a9a, (q31_t)0xa818501c, (q31_t)0x5d0649d7, (q31_t)0xa813bf06, (q31_t)0x5d01f8dc, (q31_t)0xa80f2e26, (q31_t)0x5cfda7a7, (q31_t)0xa80a9d7c,
-  (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5cf50490, (q31_t)0xa8017ccb, (q31_t)0x5cf0b2af, (q31_t)0xa7fcecc4, (q31_t)0x5cec6095, (q31_t)0xa7f85cf3,
-  (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59, (q31_t)0x5ce3bbb4, (q31_t)0xa7ef3df5, (q31_t)0x5cdf68ed, (q31_t)0xa7eaaec7, (q31_t)0x5cdb15ed, (q31_t)0xa7e61fd0,
-  (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cd26f42, (q31_t)0xa7dd0284, (q31_t)0x5cce1b97, (q31_t)0xa7d8742f, (q31_t)0x5cc9c7b2, (q31_t)0xa7d3e611,
-  (q31_t)0x5cc57394, (q31_t)0xa7cf582a, (q31_t)0x5cc11f3d, (q31_t)0xa7caca79, (q31_t)0x5cbccaac, (q31_t)0xa7c63cfe, (q31_t)0x5cb875e3, (q31_t)0xa7c1afb9,
-  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5cafcba4, (q31_t)0xa7b895d4, (q31_t)0x5cab762f, (q31_t)0xa7b40933, (q31_t)0x5ca72080, (q31_t)0xa7af7cc8,
-  (q31_t)0x5ca2ca99, (q31_t)0xa7aaf094, (q31_t)0x5c9e7478, (q31_t)0xa7a66497, (q31_t)0x5c9a1e1e, (q31_t)0xa7a1d8d0, (q31_t)0x5c95c78b, (q31_t)0xa79d4d3f,
-  (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c8d19ba, (q31_t)0xa79436c1, (q31_t)0x5c88c27c, (q31_t)0xa78fabd4, (q31_t)0x5c846b05, (q31_t)0xa78b211e,
-  (q31_t)0x5c801354, (q31_t)0xa786969e, (q31_t)0x5c7bbb6b, (q31_t)0xa7820c55, (q31_t)0x5c776348, (q31_t)0xa77d8242, (q31_t)0x5c730aed, (q31_t)0xa778f866,
-  (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c6a598b, (q31_t)0xa76fe551, (q31_t)0x5c660084, (q31_t)0xa76b5c19, (q31_t)0x5c61a745, (q31_t)0xa766d317,
-  (q31_t)0x5c5d4dcc, (q31_t)0xa7624a4d, (q31_t)0x5c58f41a, (q31_t)0xa75dc1b8, (q31_t)0x5c549a30, (q31_t)0xa759395b, (q31_t)0x5c50400d, (q31_t)0xa754b134,
-  (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c478b1b, (q31_t)0xa74ba18a, (q31_t)0x5c43304d, (q31_t)0xa7471a07, (q31_t)0x5c3ed545, (q31_t)0xa74292bb,
-  (q31_t)0x5c3a7a05, (q31_t)0xa73e0ba5, (q31_t)0x5c361e8c, (q31_t)0xa73984c7, (q31_t)0x5c31c2db, (q31_t)0xa734fe1f, (q31_t)0x5c2d66f0, (q31_t)0xa73077ae,
-  (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5c24ae70, (q31_t)0xa7276b70, (q31_t)0x5c2051db, (q31_t)0xa722e5a3, (q31_t)0x5c1bf50d, (q31_t)0xa71e600d,
-  (q31_t)0x5c179806, (q31_t)0xa719daae, (q31_t)0x5c133ac6, (q31_t)0xa7155586, (q31_t)0x5c0edd4e, (q31_t)0xa710d095, (q31_t)0x5c0a7f9c, (q31_t)0xa70c4bda,
-  (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5c01c38f, (q31_t)0xa703430a, (q31_t)0x5bfd6534, (q31_t)0xa6febef4, (q31_t)0x5bf906a0, (q31_t)0xa6fa3b15,
-  (q31_t)0x5bf4a7d2, (q31_t)0xa6f5b76d, (q31_t)0x5bf048cd, (q31_t)0xa6f133fc, (q31_t)0x5bebe98e, (q31_t)0xa6ecb0c2, (q31_t)0x5be78a17, (q31_t)0xa6e82dbe,
-  (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2, (q31_t)0x5bdeca7f, (q31_t)0xa6df285d, (q31_t)0x5bda6a5d, (q31_t)0xa6daa5fe, (q31_t)0x5bd60a03, (q31_t)0xa6d623d7,
-  (q31_t)0x5bd1a971, (q31_t)0xa6d1a1e7, (q31_t)0x5bcd48a6, (q31_t)0xa6cd202d, (q31_t)0x5bc8e7a2, (q31_t)0xa6c89eab, (q31_t)0x5bc48666, (q31_t)0xa6c41d60,
-  (q31_t)0x5bc024f0, (q31_t)0xa6bf9c4b, (q31_t)0x5bbbc343, (q31_t)0xa6bb1b6e, (q31_t)0x5bb7615d, (q31_t)0xa6b69ac8, (q31_t)0x5bb2ff3e, (q31_t)0xa6b21a59,
-  (q31_t)0x5bae9ce7, (q31_t)0xa6ad9a21, (q31_t)0x5baa3a57, (q31_t)0xa6a91a20, (q31_t)0x5ba5d78e, (q31_t)0xa6a49a56, (q31_t)0x5ba1748d, (q31_t)0xa6a01ac4,
-  (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b98ade2, (q31_t)0xa6971c44, (q31_t)0x5b944a37, (q31_t)0xa6929d57, (q31_t)0x5b8fe654, (q31_t)0xa68e1ea1,
-  (q31_t)0x5b8b8239, (q31_t)0xa689a022, (q31_t)0x5b871de5, (q31_t)0xa68521da, (q31_t)0x5b82b958, (q31_t)0xa680a3ca, (q31_t)0x5b7e5493, (q31_t)0xa67c25f0,
-  (q31_t)0x5b79ef96, (q31_t)0xa677a84e, (q31_t)0x5b758a60, (q31_t)0xa6732ae3, (q31_t)0x5b7124f2, (q31_t)0xa66eadb0, (q31_t)0x5b6cbf4c, (q31_t)0xa66a30b3,
-  (q31_t)0x5b68596d, (q31_t)0xa665b3ee, (q31_t)0x5b63f355, (q31_t)0xa6613760, (q31_t)0x5b5f8d06, (q31_t)0xa65cbb0a, (q31_t)0x5b5b267e, (q31_t)0xa6583eeb,
-  (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b5258c4, (q31_t)0xa64f4752, (q31_t)0x5b4df193, (q31_t)0xa64acbd9, (q31_t)0x5b498a2a, (q31_t)0xa6465097,
-  (q31_t)0x5b452288, (q31_t)0xa641d58c, (q31_t)0x5b40baae, (q31_t)0xa63d5ab9, (q31_t)0x5b3c529c, (q31_t)0xa638e01d, (q31_t)0x5b37ea51, (q31_t)0xa63465b9,
-  (q31_t)0x5b3381ce, (q31_t)0xa62feb8b, (q31_t)0x5b2f1913, (q31_t)0xa62b7196, (q31_t)0x5b2ab020, (q31_t)0xa626f7d7, (q31_t)0x5b2646f4, (q31_t)0xa6227e50,
-  (q31_t)0x5b21dd90, (q31_t)0xa61e0501, (q31_t)0x5b1d73f4, (q31_t)0xa6198be9, (q31_t)0x5b190a20, (q31_t)0xa6151308, (q31_t)0x5b14a014, (q31_t)0xa6109a5f,
-  (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5b0bcb52, (q31_t)0xa607a9b4, (q31_t)0x5b07609d, (q31_t)0xa60331b1, (q31_t)0x5b02f5b0, (q31_t)0xa5feb9e6,
-  (q31_t)0x5afe8a8b, (q31_t)0xa5fa4252, (q31_t)0x5afa1f2e, (q31_t)0xa5f5caf6, (q31_t)0x5af5b398, (q31_t)0xa5f153d2, (q31_t)0x5af147ca, (q31_t)0xa5ecdce5,
-  (q31_t)0x5aecdbc5, (q31_t)0xa5e8662f, (q31_t)0x5ae86f87, (q31_t)0xa5e3efb1, (q31_t)0x5ae40311, (q31_t)0xa5df796b, (q31_t)0x5adf9663, (q31_t)0xa5db035c,
-  (q31_t)0x5adb297d, (q31_t)0xa5d68d85, (q31_t)0x5ad6bc5f, (q31_t)0xa5d217e6, (q31_t)0x5ad24f09, (q31_t)0xa5cda27e, (q31_t)0x5acde17b, (q31_t)0xa5c92d4e,
-  (q31_t)0x5ac973b5, (q31_t)0xa5c4b855, (q31_t)0x5ac505b7, (q31_t)0xa5c04395, (q31_t)0x5ac09781, (q31_t)0xa5bbcf0b, (q31_t)0x5abc2912, (q31_t)0xa5b75aba,
-  (q31_t)0x5ab7ba6c, (q31_t)0xa5b2e6a0, (q31_t)0x5ab34b8e, (q31_t)0xa5ae72be, (q31_t)0x5aaedc78, (q31_t)0xa5a9ff14, (q31_t)0x5aaa6d2b, (q31_t)0xa5a58ba1,
-  (q31_t)0x5aa5fda5, (q31_t)0xa5a11866, (q31_t)0x5aa18de7, (q31_t)0xa59ca563, (q31_t)0x5a9d1df1, (q31_t)0xa5983297, (q31_t)0x5a98adc4, (q31_t)0xa593c004,
-  (q31_t)0x5a943d5e, (q31_t)0xa58f4da8, (q31_t)0x5a8fccc1, (q31_t)0xa58adb84, (q31_t)0x5a8b5bec, (q31_t)0xa5866997, (q31_t)0x5a86eadf, (q31_t)0xa581f7e3,
-  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a7e081d, (q31_t)0xa5791521, (q31_t)0x5a799669, (q31_t)0xa574a414, (q31_t)0x5a75247c, (q31_t)0xa570333f,
-  (q31_t)0x5a70b258, (q31_t)0xa56bc2a2, (q31_t)0x5a6c3ffc, (q31_t)0xa567523c, (q31_t)0x5a67cd69, (q31_t)0xa562e20f, (q31_t)0x5a635a9d, (q31_t)0xa55e7219,
-  (q31_t)0x5a5ee79a, (q31_t)0xa55a025b, (q31_t)0x5a5a745f, (q31_t)0xa55592d5, (q31_t)0x5a5600ec, (q31_t)0xa5512388, (q31_t)0x5a518d42, (q31_t)0xa54cb472,
-  (q31_t)0x5a4d1960, (q31_t)0xa5484594, (q31_t)0x5a48a546, (q31_t)0xa543d6ee, (q31_t)0x5a4430f5, (q31_t)0xa53f687f, (q31_t)0x5a3fbc6b, (q31_t)0xa53afa49,
-  (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x5a36d2b2, (q31_t)0xa5321e85, (q31_t)0x5a325d82, (q31_t)0xa52db0f7, (q31_t)0x5a2de81a, (q31_t)0xa52943a1,
-  (q31_t)0x5a29727b, (q31_t)0xa524d683, (q31_t)0x5a24fca4, (q31_t)0xa520699d, (q31_t)0x5a208695, (q31_t)0xa51bfcef, (q31_t)0x5a1c104f, (q31_t)0xa5179079,
-  (q31_t)0x5a1799d1, (q31_t)0xa513243b, (q31_t)0x5a13231b, (q31_t)0xa50eb836, (q31_t)0x5a0eac2e, (q31_t)0xa50a4c68, (q31_t)0x5a0a350a, (q31_t)0xa505e0d2,
-  (q31_t)0x5a05bdae, (q31_t)0xa5017575, (q31_t)0x5a01461a, (q31_t)0xa4fd0a50, (q31_t)0x59fcce4f, (q31_t)0xa4f89f63, (q31_t)0x59f8564c, (q31_t)0xa4f434ae,
-  (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59ef65a1, (q31_t)0xa4eb5fec, (q31_t)0x59eaecf8, (q31_t)0xa4e6f5e0, (q31_t)0x59e67417, (q31_t)0xa4e28c0c,
-  (q31_t)0x59e1faff, (q31_t)0xa4de2270, (q31_t)0x59dd81b0, (q31_t)0xa4d9b90c, (q31_t)0x59d90829, (q31_t)0xa4d54fe0, (q31_t)0x59d48e6a, (q31_t)0xa4d0e6ed,
-  (q31_t)0x59d01475, (q31_t)0xa4cc7e32, (q31_t)0x59cb9a47, (q31_t)0xa4c815af, (q31_t)0x59c71fe3, (q31_t)0xa4c3ad64, (q31_t)0x59c2a547, (q31_t)0xa4bf4552,
-  (q31_t)0x59be2a74, (q31_t)0xa4badd78, (q31_t)0x59b9af69, (q31_t)0xa4b675d6, (q31_t)0x59b53427, (q31_t)0xa4b20e6d, (q31_t)0x59b0b8ae, (q31_t)0xa4ada73c,
-  (q31_t)0x59ac3cfd, (q31_t)0xa4a94043, (q31_t)0x59a7c115, (q31_t)0xa4a4d982, (q31_t)0x59a344f6, (q31_t)0xa4a072fa, (q31_t)0x599ec8a0, (q31_t)0xa49c0cab,
-  (q31_t)0x599a4c12, (q31_t)0xa497a693, (q31_t)0x5995cf4d, (q31_t)0xa49340b4, (q31_t)0x59915250, (q31_t)0xa48edb0e, (q31_t)0x598cd51d, (q31_t)0xa48a75a0,
-  (q31_t)0x598857b2, (q31_t)0xa486106a, (q31_t)0x5983da10, (q31_t)0xa481ab6d, (q31_t)0x597f5c36, (q31_t)0xa47d46a8, (q31_t)0x597ade26, (q31_t)0xa478e21b,
-  (q31_t)0x59765fde, (q31_t)0xa4747dc7, (q31_t)0x5971e15f, (q31_t)0xa47019ac, (q31_t)0x596d62a9, (q31_t)0xa46bb5c9, (q31_t)0x5968e3bc, (q31_t)0xa467521e,
-  (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x595fe53c, (q31_t)0xa45e8b73, (q31_t)0x595b65aa, (q31_t)0xa45a2872, (q31_t)0x5956e5e0, (q31_t)0xa455c5a9,
-  (q31_t)0x595265df, (q31_t)0xa4516319, (q31_t)0x594de5a7, (q31_t)0xa44d00c2, (q31_t)0x59496538, (q31_t)0xa4489ea3, (q31_t)0x5944e492, (q31_t)0xa4443cbd,
-  (q31_t)0x594063b5, (q31_t)0xa43fdb10, (q31_t)0x593be2a0, (q31_t)0xa43b799a, (q31_t)0x59376155, (q31_t)0xa437185e, (q31_t)0x5932dfd3, (q31_t)0xa432b75a,
-  (q31_t)0x592e5e19, (q31_t)0xa42e568f, (q31_t)0x5929dc29, (q31_t)0xa429f5fd, (q31_t)0x59255a02, (q31_t)0xa42595a3, (q31_t)0x5920d7a3, (q31_t)0xa4213581,
-  (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x5917d242, (q31_t)0xa41875e9, (q31_t)0x59134f3e, (q31_t)0xa4141672, (q31_t)0x590ecc04, (q31_t)0xa40fb733,
-  (q31_t)0x590a4893, (q31_t)0xa40b582e, (q31_t)0x5905c4eb, (q31_t)0xa406f960, (q31_t)0x5901410c, (q31_t)0xa4029acc, (q31_t)0x58fcbcf6, (q31_t)0xa3fe3c71,
-  (q31_t)0x58f838a9, (q31_t)0xa3f9de4e, (q31_t)0x58f3b426, (q31_t)0xa3f58064, (q31_t)0x58ef2f6b, (q31_t)0xa3f122b2, (q31_t)0x58eaaa7a, (q31_t)0xa3ecc53a,
-  (q31_t)0x58e62552, (q31_t)0xa3e867fa, (q31_t)0x58e19ff3, (q31_t)0xa3e40af3, (q31_t)0x58dd1a5d, (q31_t)0xa3dfae25, (q31_t)0x58d89490, (q31_t)0xa3db5190,
-  (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x58cf8852, (q31_t)0xa3d29910, (q31_t)0x58cb01e1, (q31_t)0xa3ce3d25, (q31_t)0x58c67b39, (q31_t)0xa3c9e174,
-  (q31_t)0x58c1f45b, (q31_t)0xa3c585fb, (q31_t)0x58bd6d45, (q31_t)0xa3c12abb, (q31_t)0x58b8e5f9, (q31_t)0xa3bccfb3, (q31_t)0x58b45e76, (q31_t)0xa3b874e5,
-  (q31_t)0x58afd6bd, (q31_t)0xa3b41a50, (q31_t)0x58ab4ecc, (q31_t)0xa3afbff3, (q31_t)0x58a6c6a5, (q31_t)0xa3ab65d0, (q31_t)0x58a23e48, (q31_t)0xa3a70be6,
-  (q31_t)0x589db5b3, (q31_t)0xa3a2b234, (q31_t)0x58992ce9, (q31_t)0xa39e58bb, (q31_t)0x5894a3e7, (q31_t)0xa399ff7c, (q31_t)0x58901aaf, (q31_t)0xa395a675,
-  (q31_t)0x588b9140, (q31_t)0xa3914da8, (q31_t)0x5887079a, (q31_t)0xa38cf513, (q31_t)0x58827dbe, (q31_t)0xa3889cb8, (q31_t)0x587df3ab, (q31_t)0xa3844495,
-  (q31_t)0x58796962, (q31_t)0xa37fecac, (q31_t)0x5874dee2, (q31_t)0xa37b94fb, (q31_t)0x5870542c, (q31_t)0xa3773d84, (q31_t)0x586bc93f, (q31_t)0xa372e646,
-  (q31_t)0x58673e1b, (q31_t)0xa36e8f41, (q31_t)0x5862b2c1, (q31_t)0xa36a3875, (q31_t)0x585e2730, (q31_t)0xa365e1e2, (q31_t)0x58599b69, (q31_t)0xa3618b88,
-  (q31_t)0x58550f6c, (q31_t)0xa35d3567, (q31_t)0x58508338, (q31_t)0xa358df80, (q31_t)0x584bf6cd, (q31_t)0xa35489d1, (q31_t)0x58476a2c, (q31_t)0xa350345c,
-  (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x583e5047, (q31_t)0xa3478a1d, (q31_t)0x5839c302, (q31_t)0xa3433554, (q31_t)0x58353587, (q31_t)0xa33ee0c3,
-  (q31_t)0x5830a7d6, (q31_t)0xa33a8c6c, (q31_t)0x582c19ef, (q31_t)0xa336384e, (q31_t)0x58278bd1, (q31_t)0xa331e469, (q31_t)0x5822fd7c, (q31_t)0xa32d90be,
-  (q31_t)0x581e6ef1, (q31_t)0xa3293d4b, (q31_t)0x5819e030, (q31_t)0xa324ea13, (q31_t)0x58155139, (q31_t)0xa3209713, (q31_t)0x5810c20b, (q31_t)0xa31c444c,
-  (q31_t)0x580c32a7, (q31_t)0xa317f1bf, (q31_t)0x5807a30d, (q31_t)0xa3139f6b, (q31_t)0x5803133c, (q31_t)0xa30f4d51, (q31_t)0x57fe8335, (q31_t)0xa30afb70,
-  (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57f56284, (q31_t)0xa3025859, (q31_t)0x57f0d1da, (q31_t)0xa2fe0724, (q31_t)0x57ec40fa, (q31_t)0xa2f9b629,
-  (q31_t)0x57e7afe4, (q31_t)0xa2f56566, (q31_t)0x57e31e97, (q31_t)0xa2f114dd, (q31_t)0x57de8d15, (q31_t)0xa2ecc48e, (q31_t)0x57d9fb5c, (q31_t)0xa2e87477,
-  (q31_t)0x57d5696d, (q31_t)0xa2e4249b, (q31_t)0x57d0d747, (q31_t)0xa2dfd4f7, (q31_t)0x57cc44ec, (q31_t)0xa2db858e, (q31_t)0x57c7b25a, (q31_t)0xa2d7365d,
-  (q31_t)0x57c31f92, (q31_t)0xa2d2e766, (q31_t)0x57be8c94, (q31_t)0xa2ce98a9, (q31_t)0x57b9f960, (q31_t)0xa2ca4a25, (q31_t)0x57b565f6, (q31_t)0xa2c5fbda,
-  (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x57ac3e80, (q31_t)0xa2bd5ff2, (q31_t)0x57a7aa73, (q31_t)0xa2b91254, (q31_t)0x57a31631, (q31_t)0xa2b4c4f0,
-  (q31_t)0x579e81b8, (q31_t)0xa2b077c5, (q31_t)0x5799ed0a, (q31_t)0xa2ac2ad3, (q31_t)0x57955825, (q31_t)0xa2a7de1c, (q31_t)0x5790c30a, (q31_t)0xa2a3919e,
-  (q31_t)0x578c2dba, (q31_t)0xa29f4559, (q31_t)0x57879833, (q31_t)0xa29af94e, (q31_t)0x57830276, (q31_t)0xa296ad7d, (q31_t)0x577e6c84, (q31_t)0xa29261e5,
-  (q31_t)0x5779d65b, (q31_t)0xa28e1687, (q31_t)0x57753ffc, (q31_t)0xa289cb63, (q31_t)0x5770a968, (q31_t)0xa2858078, (q31_t)0x576c129d, (q31_t)0xa28135c7,
-  (q31_t)0x57677b9d, (q31_t)0xa27ceb4f, (q31_t)0x5762e467, (q31_t)0xa278a111, (q31_t)0x575e4cfa, (q31_t)0xa274570d, (q31_t)0x5759b558, (q31_t)0xa2700d43,
-  (q31_t)0x57551d80, (q31_t)0xa26bc3b2, (q31_t)0x57508572, (q31_t)0xa2677a5b, (q31_t)0x574bed2f, (q31_t)0xa263313e, (q31_t)0x574754b5, (q31_t)0xa25ee85b,
-  (q31_t)0x5742bc06, (q31_t)0xa25a9fb1, (q31_t)0x573e2320, (q31_t)0xa2565741, (q31_t)0x57398a05, (q31_t)0xa2520f0b, (q31_t)0x5734f0b5, (q31_t)0xa24dc70f,
-  (q31_t)0x5730572e, (q31_t)0xa2497f4c, (q31_t)0x572bbd71, (q31_t)0xa24537c3, (q31_t)0x5727237f, (q31_t)0xa240f074, (q31_t)0x57228957, (q31_t)0xa23ca95f,
-  (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x57195466, (q31_t)0xa2341be3, (q31_t)0x5714b99d, (q31_t)0xa22fd57b, (q31_t)0x57101e9e, (q31_t)0xa22b8f4d,
-  (q31_t)0x570b8369, (q31_t)0xa2274959, (q31_t)0x5706e7ff, (q31_t)0xa223039f, (q31_t)0x57024c5f, (q31_t)0xa21ebe1f, (q31_t)0x56fdb08a, (q31_t)0xa21a78d9,
-  (q31_t)0x56f9147e, (q31_t)0xa21633cd, (q31_t)0x56f4783d, (q31_t)0xa211eefb, (q31_t)0x56efdbc7, (q31_t)0xa20daa62, (q31_t)0x56eb3f1a, (q31_t)0xa2096604,
-  (q31_t)0x56e6a239, (q31_t)0xa20521e0, (q31_t)0x56e20521, (q31_t)0xa200ddf5, (q31_t)0x56dd67d4, (q31_t)0xa1fc9a45, (q31_t)0x56d8ca51, (q31_t)0xa1f856ce,
-  (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x56cf8eab, (q31_t)0xa1efd08f, (q31_t)0x56caf088, (q31_t)0xa1eb8dc7, (q31_t)0x56c6522f, (q31_t)0xa1e74b38,
-  (q31_t)0x56c1b3a1, (q31_t)0xa1e308e4, (q31_t)0x56bd14dd, (q31_t)0xa1dec6ca, (q31_t)0x56b875e4, (q31_t)0xa1da84e9, (q31_t)0x56b3d6b5, (q31_t)0xa1d64343,
-  (q31_t)0x56af3750, (q31_t)0xa1d201d7, (q31_t)0x56aa97b7, (q31_t)0xa1cdc0a5, (q31_t)0x56a5f7e7, (q31_t)0xa1c97fad, (q31_t)0x56a157e3, (q31_t)0xa1c53ef0,
-  (q31_t)0x569cb7a8, (q31_t)0xa1c0fe6c, (q31_t)0x56981739, (q31_t)0xa1bcbe22, (q31_t)0x56937694, (q31_t)0xa1b87e13, (q31_t)0x568ed5b9, (q31_t)0xa1b43e3e,
-  (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x56859364, (q31_t)0xa1abbf42, (q31_t)0x5680f1ea, (q31_t)0xa1a7801b, (q31_t)0x567c503a, (q31_t)0xa1a3412f,
-  (q31_t)0x5677ae54, (q31_t)0xa19f027c, (q31_t)0x56730c3a, (q31_t)0xa19ac404, (q31_t)0x566e69ea, (q31_t)0xa19685c7, (q31_t)0x5669c765, (q31_t)0xa19247c3,
-  (q31_t)0x566524aa, (q31_t)0xa18e09fa, (q31_t)0x566081ba, (q31_t)0xa189cc6b, (q31_t)0x565bde95, (q31_t)0xa1858f16, (q31_t)0x56573b3b, (q31_t)0xa18151fb,
-  (q31_t)0x565297ab, (q31_t)0xa17d151b, (q31_t)0x564df3e6, (q31_t)0xa178d875, (q31_t)0x56494fec, (q31_t)0xa1749c09, (q31_t)0x5644abbc, (q31_t)0xa1705fd8,
-  (q31_t)0x56400758, (q31_t)0xa16c23e1, (q31_t)0x563b62be, (q31_t)0xa167e824, (q31_t)0x5636bdef, (q31_t)0xa163aca2, (q31_t)0x563218eb, (q31_t)0xa15f715a,
-  (q31_t)0x562d73b2, (q31_t)0xa15b364d, (q31_t)0x5628ce43, (q31_t)0xa156fb79, (q31_t)0x5624289f, (q31_t)0xa152c0e1, (q31_t)0x561f82c7, (q31_t)0xa14e8682,
-  (q31_t)0x561adcb9, (q31_t)0xa14a4c5e, (q31_t)0x56163676, (q31_t)0xa1461275, (q31_t)0x56118ffe, (q31_t)0xa141d8c5, (q31_t)0x560ce950, (q31_t)0xa13d9f51,
-  (q31_t)0x5608426e, (q31_t)0xa1396617, (q31_t)0x56039b57, (q31_t)0xa1352d17, (q31_t)0x55fef40a, (q31_t)0xa130f451, (q31_t)0x55fa4c89, (q31_t)0xa12cbbc7,
-  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55f0fce7, (q31_t)0xa1244b61, (q31_t)0x55ec54c6, (q31_t)0xa1201385, (q31_t)0x55e7ac71, (q31_t)0xa11bdbe4,
-  (q31_t)0x55e303e6, (q31_t)0xa117a47e, (q31_t)0x55de5b27, (q31_t)0xa1136d52, (q31_t)0x55d9b232, (q31_t)0xa10f3661, (q31_t)0x55d50909, (q31_t)0xa10affab,
-  (q31_t)0x55d05faa, (q31_t)0xa106c92f, (q31_t)0x55cbb617, (q31_t)0xa10292ed, (q31_t)0x55c70c4f, (q31_t)0xa0fe5ce6, (q31_t)0x55c26251, (q31_t)0xa0fa271a,
-  (q31_t)0x55bdb81f, (q31_t)0xa0f5f189, (q31_t)0x55b90db8, (q31_t)0xa0f1bc32, (q31_t)0x55b4631d, (q31_t)0xa0ed8715, (q31_t)0x55afb84c, (q31_t)0xa0e95234,
-  (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x55a6620c, (q31_t)0xa0e0e920, (q31_t)0x55a1b69d, (q31_t)0xa0dcb4ee, (q31_t)0x559d0af9, (q31_t)0xa0d880f7,
-  (q31_t)0x55985f20, (q31_t)0xa0d44d3b, (q31_t)0x5593b312, (q31_t)0xa0d019b9, (q31_t)0x558f06d0, (q31_t)0xa0cbe672, (q31_t)0x558a5a58, (q31_t)0xa0c7b366,
-  (q31_t)0x5585adad, (q31_t)0xa0c38095, (q31_t)0x558100cc, (q31_t)0xa0bf4dfe, (q31_t)0x557c53b6, (q31_t)0xa0bb1ba2, (q31_t)0x5577a66c, (q31_t)0xa0b6e981,
-  (q31_t)0x5572f8ed, (q31_t)0xa0b2b79b, (q31_t)0x556e4b39, (q31_t)0xa0ae85ef, (q31_t)0x55699d51, (q31_t)0xa0aa547e, (q31_t)0x5564ef34, (q31_t)0xa0a62348,
-  (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x555b925c, (q31_t)0xa09dc18d, (q31_t)0x5556e3a1, (q31_t)0xa0999107, (q31_t)0x555234b1, (q31_t)0xa09560bc,
-  (q31_t)0x554d858d, (q31_t)0xa09130ad, (q31_t)0x5548d634, (q31_t)0xa08d00d8, (q31_t)0x554426a7, (q31_t)0xa088d13e, (q31_t)0x553f76e4, (q31_t)0xa084a1de,
-  (q31_t)0x553ac6ee, (q31_t)0xa08072ba, (q31_t)0x553616c2, (q31_t)0xa07c43d1, (q31_t)0x55316663, (q31_t)0xa0781522, (q31_t)0x552cb5ce, (q31_t)0xa073e6af,
-  (q31_t)0x55280505, (q31_t)0xa06fb876, (q31_t)0x55235408, (q31_t)0xa06b8a78, (q31_t)0x551ea2d6, (q31_t)0xa0675cb6, (q31_t)0x5519f16f, (q31_t)0xa0632f2e,
-  (q31_t)0x55153fd4, (q31_t)0xa05f01e1, (q31_t)0x55108e05, (q31_t)0xa05ad4cf, (q31_t)0x550bdc01, (q31_t)0xa056a7f9, (q31_t)0x550729c9, (q31_t)0xa0527b5d,
-  (q31_t)0x5502775c, (q31_t)0xa04e4efc, (q31_t)0x54fdc4ba, (q31_t)0xa04a22d7, (q31_t)0x54f911e5, (q31_t)0xa045f6ec, (q31_t)0x54f45edb, (q31_t)0xa041cb3c,
-  (q31_t)0x54efab9c, (q31_t)0xa03d9fc8, (q31_t)0x54eaf829, (q31_t)0xa039748e, (q31_t)0x54e64482, (q31_t)0xa0354990, (q31_t)0x54e190a6, (q31_t)0xa0311ecd,
-  (q31_t)0x54dcdc96, (q31_t)0xa02cf444, (q31_t)0x54d82852, (q31_t)0xa028c9f7, (q31_t)0x54d373d9, (q31_t)0xa0249fe5, (q31_t)0x54cebf2c, (q31_t)0xa020760e,
-  (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x54c55535, (q31_t)0xa0182312, (q31_t)0x54c09feb, (q31_t)0xa013f9ed, (q31_t)0x54bbea6d, (q31_t)0xa00fd102,
-  (q31_t)0x54b734ba, (q31_t)0xa00ba853, (q31_t)0x54b27ed3, (q31_t)0xa0077fdf, (q31_t)0x54adc8b8, (q31_t)0xa00357a7, (q31_t)0x54a91269, (q31_t)0x9fff2fa9,
-  (q31_t)0x54a45be6, (q31_t)0x9ffb07e7, (q31_t)0x549fa52e, (q31_t)0x9ff6e060, (q31_t)0x549aee42, (q31_t)0x9ff2b914, (q31_t)0x54963722, (q31_t)0x9fee9204,
-  (q31_t)0x54917fce, (q31_t)0x9fea6b2f, (q31_t)0x548cc845, (q31_t)0x9fe64495, (q31_t)0x54881089, (q31_t)0x9fe21e36, (q31_t)0x54835898, (q31_t)0x9fddf812,
-  (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x5479e81a, (q31_t)0x9fd5ac7d, (q31_t)0x54752f8d, (q31_t)0x9fd1870c, (q31_t)0x547076cc, (q31_t)0x9fcd61d6,
-  (q31_t)0x546bbdd7, (q31_t)0x9fc93cdb, (q31_t)0x546704ae, (q31_t)0x9fc5181b, (q31_t)0x54624b50, (q31_t)0x9fc0f397, (q31_t)0x545d91bf, (q31_t)0x9fbccf4f,
-  (q31_t)0x5458d7f9, (q31_t)0x9fb8ab41, (q31_t)0x54541e00, (q31_t)0x9fb4876f, (q31_t)0x544f63d2, (q31_t)0x9fb063d9, (q31_t)0x544aa971, (q31_t)0x9fac407e,
-  (q31_t)0x5445eedb, (q31_t)0x9fa81d5e, (q31_t)0x54413412, (q31_t)0x9fa3fa79, (q31_t)0x543c7914, (q31_t)0x9f9fd7d1, (q31_t)0x5437bde3, (q31_t)0x9f9bb563,
-  (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x542e46e4, (q31_t)0x9f93713b, (q31_t)0x54298b17, (q31_t)0x9f8f4f80, (q31_t)0x5424cf16, (q31_t)0x9f8b2e00,
-  (q31_t)0x542012e1, (q31_t)0x9f870cbc, (q31_t)0x541b5678, (q31_t)0x9f82ebb4, (q31_t)0x541699db, (q31_t)0x9f7ecae7, (q31_t)0x5411dd0a, (q31_t)0x9f7aaa55,
-  (q31_t)0x540d2005, (q31_t)0x9f7689ff, (q31_t)0x540862cd, (q31_t)0x9f7269e5, (q31_t)0x5403a561, (q31_t)0x9f6e4a06, (q31_t)0x53fee7c1, (q31_t)0x9f6a2a63,
-  (q31_t)0x53fa29ed, (q31_t)0x9f660afb, (q31_t)0x53f56be5, (q31_t)0x9f61ebcf, (q31_t)0x53f0adaa, (q31_t)0x9f5dccde, (q31_t)0x53ebef3a, (q31_t)0x9f59ae29,
-  (q31_t)0x53e73097, (q31_t)0x9f558fb0, (q31_t)0x53e271c0, (q31_t)0x9f517173, (q31_t)0x53ddb2b6, (q31_t)0x9f4d5371, (q31_t)0x53d8f378, (q31_t)0x9f4935aa,
-  (q31_t)0x53d43406, (q31_t)0x9f45181f, (q31_t)0x53cf7460, (q31_t)0x9f40fad0, (q31_t)0x53cab486, (q31_t)0x9f3cddbd, (q31_t)0x53c5f479, (q31_t)0x9f38c0e5,
-  (q31_t)0x53c13439, (q31_t)0x9f34a449, (q31_t)0x53bc73c4, (q31_t)0x9f3087e9, (q31_t)0x53b7b31c, (q31_t)0x9f2c6bc5, (q31_t)0x53b2f240, (q31_t)0x9f284fdc,
-  (q31_t)0x53ae3131, (q31_t)0x9f24342f, (q31_t)0x53a96fee, (q31_t)0x9f2018bd, (q31_t)0x53a4ae77, (q31_t)0x9f1bfd88, (q31_t)0x539feccd, (q31_t)0x9f17e28e,
-  (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x539668de, (q31_t)0x9f0fad4e, (q31_t)0x5391a699, (q31_t)0x9f0b9307, (q31_t)0x538ce421, (q31_t)0x9f0778fd,
-  (q31_t)0x53882175, (q31_t)0x9f035f2e, (q31_t)0x53835e95, (q31_t)0x9eff459b, (q31_t)0x537e9b82, (q31_t)0x9efb2c44, (q31_t)0x5379d83c, (q31_t)0x9ef71328,
-  (q31_t)0x537514c2, (q31_t)0x9ef2fa49, (q31_t)0x53705114, (q31_t)0x9eeee1a5, (q31_t)0x536b8d33, (q31_t)0x9eeac93e, (q31_t)0x5366c91f, (q31_t)0x9ee6b112,
-  (q31_t)0x536204d7, (q31_t)0x9ee29922, (q31_t)0x535d405c, (q31_t)0x9ede816e, (q31_t)0x53587bad, (q31_t)0x9eda69f6, (q31_t)0x5353b6cb, (q31_t)0x9ed652ba,
-  (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x534a2c6c, (q31_t)0x9ece24f5, (q31_t)0x534566f0, (q31_t)0x9eca0e6d, (q31_t)0x5340a140, (q31_t)0x9ec5f820,
-  (q31_t)0x533bdb5d, (q31_t)0x9ec1e210, (q31_t)0x53371547, (q31_t)0x9ebdcc3b, (q31_t)0x53324efd, (q31_t)0x9eb9b6a3, (q31_t)0x532d8880, (q31_t)0x9eb5a146,
-  (q31_t)0x5328c1d0, (q31_t)0x9eb18c26, (q31_t)0x5323faec, (q31_t)0x9ead7742, (q31_t)0x531f33d5, (q31_t)0x9ea96299, (q31_t)0x531a6c8b, (q31_t)0x9ea54e2d,
-  (q31_t)0x5315a50e, (q31_t)0x9ea139fd, (q31_t)0x5310dd5d, (q31_t)0x9e9d2608, (q31_t)0x530c1579, (q31_t)0x9e991250, (q31_t)0x53074d62, (q31_t)0x9e94fed4,
-  (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52fdbc9a, (q31_t)0x9e8cd890, (q31_t)0x52f8f3e9, (q31_t)0x9e88c5c9, (q31_t)0x52f42b05, (q31_t)0x9e84b33d,
-  (q31_t)0x52ef61ee, (q31_t)0x9e80a0ee, (q31_t)0x52ea98a4, (q31_t)0x9e7c8eda, (q31_t)0x52e5cf27, (q31_t)0x9e787d03, (q31_t)0x52e10576, (q31_t)0x9e746b68,
-  (q31_t)0x52dc3b92, (q31_t)0x9e705a09, (q31_t)0x52d7717b, (q31_t)0x9e6c48e7, (q31_t)0x52d2a732, (q31_t)0x9e683800, (q31_t)0x52cddcb5, (q31_t)0x9e642756,
-  (q31_t)0x52c91204, (q31_t)0x9e6016e8, (q31_t)0x52c44721, (q31_t)0x9e5c06b6, (q31_t)0x52bf7c0b, (q31_t)0x9e57f6c0, (q31_t)0x52bab0c2, (q31_t)0x9e53e707,
-  (q31_t)0x52b5e546, (q31_t)0x9e4fd78a, (q31_t)0x52b11996, (q31_t)0x9e4bc849, (q31_t)0x52ac4db4, (q31_t)0x9e47b944, (q31_t)0x52a7819f, (q31_t)0x9e43aa7c,
-  (q31_t)0x52a2b556, (q31_t)0x9e3f9bf0, (q31_t)0x529de8db, (q31_t)0x9e3b8da0, (q31_t)0x52991c2d, (q31_t)0x9e377f8c, (q31_t)0x52944f4c, (q31_t)0x9e3371b5,
-  (q31_t)0x528f8238, (q31_t)0x9e2f641b, (q31_t)0x528ab4f1, (q31_t)0x9e2b56bc, (q31_t)0x5285e777, (q31_t)0x9e27499a, (q31_t)0x528119ca, (q31_t)0x9e233cb4,
-  (q31_t)0x527c4bea, (q31_t)0x9e1f300b, (q31_t)0x52777dd7, (q31_t)0x9e1b239e, (q31_t)0x5272af92, (q31_t)0x9e17176d, (q31_t)0x526de11a, (q31_t)0x9e130b79,
-  (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x52644390, (q31_t)0x9e0af446, (q31_t)0x525f7480, (q31_t)0x9e06e907, (q31_t)0x525aa53c, (q31_t)0x9e02de04,
-  (q31_t)0x5255d5c5, (q31_t)0x9dfed33e, (q31_t)0x5251061c, (q31_t)0x9dfac8b4, (q31_t)0x524c3640, (q31_t)0x9df6be67, (q31_t)0x52476631, (q31_t)0x9df2b456,
-  (q31_t)0x524295f0, (q31_t)0x9deeaa82, (q31_t)0x523dc57b, (q31_t)0x9deaa0ea, (q31_t)0x5238f4d4, (q31_t)0x9de6978f, (q31_t)0x523423fb, (q31_t)0x9de28e70,
-  (q31_t)0x522f52ee, (q31_t)0x9dde858e, (q31_t)0x522a81af, (q31_t)0x9dda7ce9, (q31_t)0x5225b03d, (q31_t)0x9dd6747f, (q31_t)0x5220de99, (q31_t)0x9dd26c53,
-  (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x52173ab8, (q31_t)0x9dca5caf, (q31_t)0x5212687b, (q31_t)0x9dc65539, (q31_t)0x520d960c, (q31_t)0x9dc24dfe,
-  (q31_t)0x5208c36a, (q31_t)0x9dbe4701, (q31_t)0x5203f096, (q31_t)0x9dba4040, (q31_t)0x51ff1d8f, (q31_t)0x9db639bb, (q31_t)0x51fa4a56, (q31_t)0x9db23373,
-  (q31_t)0x51f576ea, (q31_t)0x9dae2d68, (q31_t)0x51f0a34b, (q31_t)0x9daa279a, (q31_t)0x51ebcf7a, (q31_t)0x9da62208, (q31_t)0x51e6fb76, (q31_t)0x9da21cb2,
-  (q31_t)0x51e22740, (q31_t)0x9d9e179a, (q31_t)0x51dd52d7, (q31_t)0x9d9a12be, (q31_t)0x51d87e3c, (q31_t)0x9d960e1f, (q31_t)0x51d3a96f, (q31_t)0x9d9209bd,
-  (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x51c9ff3c, (q31_t)0x9d8a01ae, (q31_t)0x51c529d7, (q31_t)0x9d85fe02, (q31_t)0x51c0543f, (q31_t)0x9d81fa92,
-  (q31_t)0x51bb7e75, (q31_t)0x9d7df75f, (q31_t)0x51b6a879, (q31_t)0x9d79f469, (q31_t)0x51b1d24a, (q31_t)0x9d75f1b0, (q31_t)0x51acfbe9, (q31_t)0x9d71ef34,
-  (q31_t)0x51a82555, (q31_t)0x9d6decf4, (q31_t)0x51a34e8f, (q31_t)0x9d69eaf1, (q31_t)0x519e7797, (q31_t)0x9d65e92b, (q31_t)0x5199a06d, (q31_t)0x9d61e7a2,
-  (q31_t)0x5194c910, (q31_t)0x9d5de656, (q31_t)0x518ff180, (q31_t)0x9d59e546, (q31_t)0x518b19bf, (q31_t)0x9d55e473, (q31_t)0x518641cb, (q31_t)0x9d51e3dd,
-  (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x517c914c, (q31_t)0x9d49e368, (q31_t)0x5177b8c2, (q31_t)0x9d45e389, (q31_t)0x5172e005, (q31_t)0x9d41e3e7,
-  (q31_t)0x516e0715, (q31_t)0x9d3de482, (q31_t)0x51692df4, (q31_t)0x9d39e559, (q31_t)0x516454a0, (q31_t)0x9d35e66e, (q31_t)0x515f7b1a, (q31_t)0x9d31e7bf,
-  (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5155c778, (q31_t)0x9d29eb19, (q31_t)0x5150ed5c, (q31_t)0x9d25ed21, (q31_t)0x514c130d, (q31_t)0x9d21ef66,
-  (q31_t)0x5147388c, (q31_t)0x9d1df1e9, (q31_t)0x51425dd9, (q31_t)0x9d19f4a8, (q31_t)0x513d82f4, (q31_t)0x9d15f7a4, (q31_t)0x5138a7dd, (q31_t)0x9d11fadd,
-  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x512ef119, (q31_t)0x9d0a0207, (q31_t)0x512a156b, (q31_t)0x9d0605f7, (q31_t)0x5125398c, (q31_t)0x9d020a25,
-  (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f, (q31_t)0x511b8137, (q31_t)0x9cfa1337, (q31_t)0x5116a4c1, (q31_t)0x9cf6181c, (q31_t)0x5111c81a, (q31_t)0x9cf21d3d,
-  (q31_t)0x510ceb40, (q31_t)0x9cee229c, (q31_t)0x51080e35, (q31_t)0x9cea2838, (q31_t)0x510330f7, (q31_t)0x9ce62e11, (q31_t)0x50fe5388, (q31_t)0x9ce23427,
-  (q31_t)0x50f975e6, (q31_t)0x9cde3a7b, (q31_t)0x50f49813, (q31_t)0x9cda410b, (q31_t)0x50efba0d, (q31_t)0x9cd647d9, (q31_t)0x50eadbd6, (q31_t)0x9cd24ee4,
-  (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x50e11ed2, (q31_t)0x9cca5db1, (q31_t)0x50dc4005, (q31_t)0x9cc66573, (q31_t)0x50d76106, (q31_t)0x9cc26d73,
-  (q31_t)0x50d281d5, (q31_t)0x9cbe75b0, (q31_t)0x50cda272, (q31_t)0x9cba7e2a, (q31_t)0x50c8c2de, (q31_t)0x9cb686e1, (q31_t)0x50c3e317, (q31_t)0x9cb28fd5,
-  (q31_t)0x50bf031f, (q31_t)0x9cae9907, (q31_t)0x50ba22f5, (q31_t)0x9caaa276, (q31_t)0x50b5429a, (q31_t)0x9ca6ac23, (q31_t)0x50b0620c, (q31_t)0x9ca2b60c,
-  (q31_t)0x50ab814d, (q31_t)0x9c9ec033, (q31_t)0x50a6a05c, (q31_t)0x9c9aca97, (q31_t)0x50a1bf39, (q31_t)0x9c96d539, (q31_t)0x509cdde4, (q31_t)0x9c92e017,
-  (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x50931aa6, (q31_t)0x9c8af68d, (q31_t)0x508e38bd, (q31_t)0x9c870224, (q31_t)0x508956a1, (q31_t)0x9c830df8,
-  (q31_t)0x50847454, (q31_t)0x9c7f1a0a, (q31_t)0x507f91d5, (q31_t)0x9c7b2659, (q31_t)0x507aaf25, (q31_t)0x9c7732e5, (q31_t)0x5075cc43, (q31_t)0x9c733faf,
-  (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x506c05ea, (q31_t)0x9c6b59fa, (q31_t)0x50672273, (q31_t)0x9c67677c, (q31_t)0x50623ecb, (q31_t)0x9c63753c,
-  (q31_t)0x505d5af1, (q31_t)0x9c5f8339, (q31_t)0x505876e5, (q31_t)0x9c5b9173, (q31_t)0x505392a8, (q31_t)0x9c579feb, (q31_t)0x504eae39, (q31_t)0x9c53aea0,
-  (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x5044e4c7, (q31_t)0x9c4bccc3, (q31_t)0x503fffc4, (q31_t)0x9c47dc31, (q31_t)0x503b1a8f, (q31_t)0x9c43ebdc,
-  (q31_t)0x50363529, (q31_t)0x9c3ffbc5, (q31_t)0x50314f91, (q31_t)0x9c3c0beb, (q31_t)0x502c69c8, (q31_t)0x9c381c4f, (q31_t)0x502783cd, (q31_t)0x9c342cf0,
-  (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x501db743, (q31_t)0x9c2c4eec, (q31_t)0x5018d0b4, (q31_t)0x9c286046, (q31_t)0x5013e9f4, (q31_t)0x9c2471de,
-  (q31_t)0x500f0302, (q31_t)0x9c2083b3, (q31_t)0x500a1bdf, (q31_t)0x9c1c95c6, (q31_t)0x5005348a, (q31_t)0x9c18a816, (q31_t)0x50004d04, (q31_t)0x9c14baa4,
-  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ff67d64, (q31_t)0x9c0ce07a, (q31_t)0x4ff1954b, (q31_t)0x9c08f3c1, (q31_t)0x4fecacff, (q31_t)0x9c050745,
-  (q31_t)0x4fe7c483, (q31_t)0x9c011b08, (q31_t)0x4fe2dbd5, (q31_t)0x9bfd2f08, (q31_t)0x4fddf2f6, (q31_t)0x9bf94346, (q31_t)0x4fd909e5, (q31_t)0x9bf557c1,
-  (q31_t)0x4fd420a4, (q31_t)0x9bf16c7a, (q31_t)0x4fcf3731, (q31_t)0x9bed8171, (q31_t)0x4fca4d8d, (q31_t)0x9be996a6, (q31_t)0x4fc563b7, (q31_t)0x9be5ac18,
-  (q31_t)0x4fc079b1, (q31_t)0x9be1c1c8, (q31_t)0x4fbb8f79, (q31_t)0x9bddd7b6, (q31_t)0x4fb6a510, (q31_t)0x9bd9ede2, (q31_t)0x4fb1ba76, (q31_t)0x9bd6044b,
-  (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4fa7e4af, (q31_t)0x9bce31d8, (q31_t)0x4fa2f981, (q31_t)0x9bca48fa, (q31_t)0x4f9e0e22, (q31_t)0x9bc6605b,
-  (q31_t)0x4f992293, (q31_t)0x9bc277fa, (q31_t)0x4f9436d2, (q31_t)0x9bbe8fd6, (q31_t)0x4f8f4ae0, (q31_t)0x9bbaa7f0, (q31_t)0x4f8a5ebd, (q31_t)0x9bb6c048,
-  (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f8085e4, (q31_t)0x9baef1b2, (q31_t)0x4f7b992d, (q31_t)0x9bab0ac3, (q31_t)0x4f76ac46, (q31_t)0x9ba72413,
-  (q31_t)0x4f71bf2e, (q31_t)0x9ba33da0, (q31_t)0x4f6cd1e5, (q31_t)0x9b9f576b, (q31_t)0x4f67e46a, (q31_t)0x9b9b7174, (q31_t)0x4f62f6bf, (q31_t)0x9b978bbc,
-  (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f591ad6, (q31_t)0x9b8fc104, (q31_t)0x4f542c98, (q31_t)0x9b8bdc05, (q31_t)0x4f4f3e29, (q31_t)0x9b87f744,
-  (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1, (q31_t)0x4f4560b8, (q31_t)0x9b802e7b, (q31_t)0x4f4071b6, (q31_t)0x9b7c4a74, (q31_t)0x4f3b8284, (q31_t)0x9b7866ab,
-  (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f31a38c, (q31_t)0x9b709fd3, (q31_t)0x4f2cb3c7, (q31_t)0x9b6cbcc4, (q31_t)0x4f27c3d1, (q31_t)0x9b68d9f3,
-  (q31_t)0x4f22d3aa, (q31_t)0x9b64f760, (q31_t)0x4f1de352, (q31_t)0x9b61150b, (q31_t)0x4f18f2c9, (q31_t)0x9b5d32f4, (q31_t)0x4f140210, (q31_t)0x9b59511c,
-  (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4f0a200b, (q31_t)0x9b518e24, (q31_t)0x4f052ec0, (q31_t)0x9b4dad06, (q31_t)0x4f003d43, (q31_t)0x9b49cc26,
-  (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ef659b8, (q31_t)0x9b420b1f, (q31_t)0x4ef167aa, (q31_t)0x9b3e2af9, (q31_t)0x4eec756b, (q31_t)0x9b3a4b11,
-  (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ee2905a, (q31_t)0x9b328bfc, (q31_t)0x4edd9d89, (q31_t)0x9b2eaccf, (q31_t)0x4ed8aa87, (q31_t)0x9b2acde0,
-  (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f, (q31_t)0x4ecec3f2, (q31_t)0x9b2310bc, (q31_t)0x4ec9d05e, (q31_t)0x9b1f3288, (q31_t)0x4ec4dc99, (q31_t)0x9b1b5492,
-  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4ebaf47f, (q31_t)0x9b139960, (q31_t)0x4eb60029, (q31_t)0x9b0fbc24, (q31_t)0x4eb10ba2, (q31_t)0x9b0bdf27,
-  (q31_t)0x4eac16eb, (q31_t)0x9b080268, (q31_t)0x4ea72203, (q31_t)0x9b0425e8, (q31_t)0x4ea22ceb, (q31_t)0x9b0049a5, (q31_t)0x4e9d37a3, (q31_t)0x9afc6da1,
-  (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e934c80, (q31_t)0x9af4b654, (q31_t)0x4e8e56a5, (q31_t)0x9af0db0b, (q31_t)0x4e89609b, (q31_t)0x9aed0000,
-  (q31_t)0x4e846a60, (q31_t)0x9ae92533, (q31_t)0x4e7f73f4, (q31_t)0x9ae54aa5, (q31_t)0x4e7a7d58, (q31_t)0x9ae17056, (q31_t)0x4e75868c, (q31_t)0x9add9644,
-  (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e6b9862, (q31_t)0x9ad5e2dd, (q31_t)0x4e66a105, (q31_t)0x9ad20987, (q31_t)0x4e61a977, (q31_t)0x9ace306f,
-  (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795, (q31_t)0x4e57b9ca, (q31_t)0x9ac67efb, (q31_t)0x4e52c1ab, (q31_t)0x9ac2a69e, (q31_t)0x4e4dc95c, (q31_t)0x9abece80,
-  (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e43d82d, (q31_t)0x9ab71eff, (q31_t)0x4e3edf4d, (q31_t)0x9ab3479d, (q31_t)0x4e39e63d, (q31_t)0x9aaf7079,
-  (q31_t)0x4e34ecfc, (q31_t)0x9aab9993, (q31_t)0x4e2ff38b, (q31_t)0x9aa7c2ec, (q31_t)0x4e2af9ea, (q31_t)0x9aa3ec83, (q31_t)0x4e260019, (q31_t)0x9aa01659,
-  (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e1c0be6, (q31_t)0x9a986ac1, (q31_t)0x4e171184, (q31_t)0x9a949552, (q31_t)0x4e1216f2, (q31_t)0x9a90c022,
-  (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4e08213e, (q31_t)0x9a89167e, (q31_t)0x4e03261b, (q31_t)0x9a85420a, (q31_t)0x4dfe2ac9, (q31_t)0x9a816dd5,
-  (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4df43393, (q31_t)0x9a79c625, (q31_t)0x4def37b0, (q31_t)0x9a75f2ac, (q31_t)0x4dea3b9d, (q31_t)0x9a721f71,
-  (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74, (q31_t)0x4de042e7, (q31_t)0x9a6a79b6, (q31_t)0x4ddb4644, (q31_t)0x9a66a737, (q31_t)0x4dd64971, (q31_t)0x9a62d4f7,
-  (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dcc4f3b, (q31_t)0x9a5b3132, (q31_t)0x4dc751d8, (q31_t)0x9a575fae, (q31_t)0x4dc25445, (q31_t)0x9a538e68,
-  (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4db8588f, (q31_t)0x9a4bec99, (q31_t)0x4db35a6c, (q31_t)0x9a481c0f, (q31_t)0x4dae5c19, (q31_t)0x9a444bc5,
-  (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4da45ee3, (q31_t)0x9a3cabeb, (q31_t)0x4d9f6001, (q31_t)0x9a38dc5d, (q31_t)0x4d9a60ee, (q31_t)0x9a350d0d,
-  (q31_t)0x4d9561ac, (q31_t)0x9a313dfc, (q31_t)0x4d90623a, (q31_t)0x9a2d6f2a, (q31_t)0x4d8b6298, (q31_t)0x9a29a097, (q31_t)0x4d8662c6, (q31_t)0x9a25d243,
-  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d7c6293, (q31_t)0x9a1e3656, (q31_t)0x4d776231, (q31_t)0x9a1a68be, (q31_t)0x4d7261a0, (q31_t)0x9a169b65,
-  (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d685fef, (q31_t)0x9a0f016f, (q31_t)0x4d635ece, (q31_t)0x9a0b34d3, (q31_t)0x4d5e5d7e, (q31_t)0x9a076875,
-  (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d545a4f, (q31_t)0x99ffd077, (q31_t)0x4d4f5870, (q31_t)0x99fc04d6, (q31_t)0x4d4a5661, (q31_t)0x99f83974,
-  (q31_t)0x4d455422, (q31_t)0x99f46e51, (q31_t)0x4d4051b4, (q31_t)0x99f0a36d, (q31_t)0x4d3b4f16, (q31_t)0x99ecd8c8, (q31_t)0x4d364c48, (q31_t)0x99e90e62,
-  (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d2c461e, (q31_t)0x99e17a53, (q31_t)0x4d2742c2, (q31_t)0x99ddb0aa, (q31_t)0x4d223f36, (q31_t)0x99d9e73f,
-  (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d18378f, (q31_t)0x99d25528, (q31_t)0x4d133374, (q31_t)0x99ce8c7b, (q31_t)0x4d0e2f2a, (q31_t)0x99cac40d,
-  (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4d042607, (q31_t)0x99c333ee, (q31_t)0x4cff212e, (q31_t)0x99bf6c3d, (q31_t)0x4cfa1c26, (q31_t)0x99bba4cb,
-  (q31_t)0x4cf516ee, (q31_t)0x99b7dd99, (q31_t)0x4cf01187, (q31_t)0x99b416a5, (q31_t)0x4ceb0bf0, (q31_t)0x99b04ff0, (q31_t)0x4ce6062a, (q31_t)0x99ac897b,
-  (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4cdbfa0f, (q31_t)0x99a4fd4d, (q31_t)0x4cd6f3bb, (q31_t)0x99a13795, (q31_t)0x4cd1ed37, (q31_t)0x999d721c,
-  (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cc7dfa1, (q31_t)0x9995e7e8, (q31_t)0x4cc2d88f, (q31_t)0x9992232d, (q31_t)0x4cbdd14e, (q31_t)0x998e5eb1,
-  (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4cb3c23d, (q31_t)0x9986d676, (q31_t)0x4caeba6e, (q31_t)0x998312b7, (q31_t)0x4ca9b26f, (q31_t)0x997f4f38,
-  (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8, (q31_t)0x4c9fa1e4, (q31_t)0x9977c8f7, (q31_t)0x4c9a9958, (q31_t)0x99740635, (q31_t)0x4c95909c, (q31_t)0x997043b2,
-  (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c8b7e97, (q31_t)0x9968bf6b, (q31_t)0x4c86754e, (q31_t)0x9964fda7, (q31_t)0x4c816bd5, (q31_t)0x99613c22,
-  (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c775856, (q31_t)0x9959b9d5, (q31_t)0x4c724e50, (q31_t)0x9955f90d, (q31_t)0x4c6d441b, (q31_t)0x99523885,
-  (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c632f23, (q31_t)0x994ab833, (q31_t)0x4c5e2460, (q31_t)0x9946f869, (q31_t)0x4c59196f, (q31_t)0x994338df,
-  (q31_t)0x4c540e4e, (q31_t)0x993f7993, (q31_t)0x4c4f02fe, (q31_t)0x993bba87, (q31_t)0x4c49f77f, (q31_t)0x9937fbbb, (q31_t)0x4c44ebd1, (q31_t)0x99343d2e,
-  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c3ad3e7, (q31_t)0x992cc0d2, (q31_t)0x4c35c7ac, (q31_t)0x99290303, (q31_t)0x4c30bb42, (q31_t)0x99254574,
-  (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c26a1e1, (q31_t)0x991dcb13, (q31_t)0x4c2194e9, (q31_t)0x991a0e42, (q31_t)0x4c1c87c3, (q31_t)0x991651b1,
-  (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c126cea, (q31_t)0x990ed94c, (q31_t)0x4c0d5f37, (q31_t)0x990b1d79, (q31_t)0x4c085156, (q31_t)0x990761e5,
-  (q31_t)0x4c034345, (q31_t)0x9903a691, (q31_t)0x4bfe3505, (q31_t)0x98ffeb7d, (q31_t)0x4bf92697, (q31_t)0x98fc30a8, (q31_t)0x4bf417f9, (q31_t)0x98f87612,
-  (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4be9fa32, (q31_t)0x98f101a6, (q31_t)0x4be4eb08, (q31_t)0x98ed47cf, (q31_t)0x4bdfdbaf, (q31_t)0x98e98e38,
-  (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bd5bc72, (q31_t)0x98e21bc8, (q31_t)0x4bd0ac8d, (q31_t)0x98de62f0, (q31_t)0x4bcb9c79, (q31_t)0x98daaa57,
-  (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bc17bc5, (q31_t)0x98d339e4, (q31_t)0x4bbc6b25, (q31_t)0x98cf820b, (q31_t)0x4bb75a56, (q31_t)0x98cbca70,
-  (q31_t)0x4bb24958, (q31_t)0x98c81316, (q31_t)0x4bad382c, (q31_t)0x98c45bfb, (q31_t)0x4ba826d1, (q31_t)0x98c0a520, (q31_t)0x4ba31548, (q31_t)0x98bcee84,
-  (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b98f1a9, (q31_t)0x98b5820c, (q31_t)0x4b93df93, (q31_t)0x98b1cc30, (q31_t)0x4b8ecd4f, (q31_t)0x98ae1693,
-  (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b84a83b, (q31_t)0x98a6ac19, (q31_t)0x4b7f956b, (q31_t)0x98a2f73c, (q31_t)0x4b7a826d, (q31_t)0x989f429e,
-  (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b705be4, (q31_t)0x9897da22, (q31_t)0x4b6b485a, (q31_t)0x98942643, (q31_t)0x4b6634a2, (q31_t)0x989072a5,
-  (q31_t)0x4b6120bb, (q31_t)0x988cbf46, (q31_t)0x4b5c0ca5, (q31_t)0x98890c27, (q31_t)0x4b56f861, (q31_t)0x98855948, (q31_t)0x4b51e3ee, (q31_t)0x9881a6a9,
-  (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b47ba7e, (q31_t)0x987a422a, (q31_t)0x4b42a580, (q31_t)0x9876904a, (q31_t)0x4b3d9053, (q31_t)0x9872deaa,
-  (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b336570, (q31_t)0x986b7c2a, (q31_t)0x4b2e4fb8, (q31_t)0x9867cb4a, (q31_t)0x4b2939d2, (q31_t)0x98641aa9,
-  (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b1f0d7b, (q31_t)0x985cba28, (q31_t)0x4b19f70a, (q31_t)0x98590a48, (q31_t)0x4b14e06b, (q31_t)0x98555aa7,
-  (q31_t)0x4b0fc99d, (q31_t)0x9851ab46, (q31_t)0x4b0ab2a1, (q31_t)0x984dfc26, (q31_t)0x4b059b77, (q31_t)0x984a4d45, (q31_t)0x4b00841f, (q31_t)0x98469ea4,
-  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4af654e3, (q31_t)0x983f4223, (q31_t)0x4af13d00, (q31_t)0x983b9442, (q31_t)0x4aec24ee, (q31_t)0x9837e6a1,
-  (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ae1f441, (q31_t)0x98308c1f, (q31_t)0x4adcdba5, (q31_t)0x982cdf3f, (q31_t)0x4ad7c2da, (q31_t)0x9829329e,
-  (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4acd90bb, (q31_t)0x9821da1d, (q31_t)0x4ac87767, (q31_t)0x981e2e3c, (q31_t)0x4ac35de4, (q31_t)0x981a829c,
-  (q31_t)0x4abe4433, (q31_t)0x9816d73b, (q31_t)0x4ab92a54, (q31_t)0x98132c1b, (q31_t)0x4ab41046, (q31_t)0x980f813b, (q31_t)0x4aaef60b, (q31_t)0x980bd69b,
-  (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4aa4c10b, (q31_t)0x9804821b, (q31_t)0x4a9fa645, (q31_t)0x9800d83c, (q31_t)0x4a9a8b52, (q31_t)0x97fd2e9c,
-  (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a9054e1, (q31_t)0x97f5dc1e, (q31_t)0x4a8b3963, (q31_t)0x97f2333f, (q31_t)0x4a861db8, (q31_t)0x97ee8aa0,
-  (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a7be5d7, (q31_t)0x97e73a23, (q31_t)0x4a76c9a2, (q31_t)0x97e39245, (q31_t)0x4a71ad3e, (q31_t)0x97dfeaa7,
-  (q31_t)0x4a6c90ad, (q31_t)0x97dc4349, (q31_t)0x4a6773ee, (q31_t)0x97d89c2c, (q31_t)0x4a625701, (q31_t)0x97d4f54f, (q31_t)0x4a5d39e6, (q31_t)0x97d14eb2,
-  (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a52ff27, (q31_t)0x97ca0239, (q31_t)0x4a4de182, (q31_t)0x97c65c5c, (q31_t)0x4a48c3b0, (q31_t)0x97c2b6c1,
-  (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a3e8782, (q31_t)0x97bb6c4a, (q31_t)0x4a396926, (q31_t)0x97b7c76f, (q31_t)0x4a344a9d, (q31_t)0x97b422d4,
-  (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a2a0d01, (q31_t)0x97acda60, (q31_t)0x4a24edee, (q31_t)0x97a93687, (q31_t)0x4a1fcead, (q31_t)0x97a592ed,
-  (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94, (q31_t)0x4a158fa3, (q31_t)0x979e4c7c, (q31_t)0x4a106fda, (q31_t)0x979aa9a4, (q31_t)0x4a0b4fe2, (q31_t)0x9797070c,
-  (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x4a010f6b, (q31_t)0x978fc29e, (q31_t)0x49fbeeea, (q31_t)0x978c20c8, (q31_t)0x49f6ce3c, (q31_t)0x97887f32,
-  (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49ec8c57, (q31_t)0x97813cc7, (q31_t)0x49e76b21, (q31_t)0x977d9bf2, (q31_t)0x49e249bc, (q31_t)0x9779fb5e,
-  (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49d8066b, (q31_t)0x9772baf7, (q31_t)0x49d2e47e, (q31_t)0x976f1b24, (q31_t)0x49cdc263, (q31_t)0x976b7b92,
-  (q31_t)0x49c8a01b, (q31_t)0x9767dc41, (q31_t)0x49c37da5, (q31_t)0x97643d2f, (q31_t)0x49be5b02, (q31_t)0x97609e5f, (q31_t)0x49b93832, (q31_t)0x975cffcf,
-  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x49aef208, (q31_t)0x9755c370, (q31_t)0x49a9ceaf, (q31_t)0x975225a1, (q31_t)0x49a4ab28, (q31_t)0x974e8813,
-  (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x499a6393, (q31_t)0x97474db9, (q31_t)0x49953f84, (q31_t)0x9743b0ed, (q31_t)0x49901b48, (q31_t)0x97401462,
-  (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x4985d248, (q31_t)0x9738dc0d, (q31_t)0x4980ad84, (q31_t)0x97354043, (q31_t)0x497b8892, (q31_t)0x9731a4ba,
-  (q31_t)0x49766373, (q31_t)0x972e0971, (q31_t)0x49713e27, (q31_t)0x972a6e6a, (q31_t)0x496c18ae, (q31_t)0x9726d3a3, (q31_t)0x4966f307, (q31_t)0x9723391c,
-  (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x495ca732, (q31_t)0x971c04d2, (q31_t)0x49578103, (q31_t)0x97186b0d, (q31_t)0x49525aa7, (q31_t)0x9714d18a,
-  (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49480d68, (q31_t)0x970d9f45, (q31_t)0x4942e684, (q31_t)0x970a0683, (q31_t)0x493dbf74, (q31_t)0x97066e03,
-  (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x493370cb, (q31_t)0x96ff3dc4, (q31_t)0x492e4933, (q31_t)0x96fba605, (q31_t)0x4929216e, (q31_t)0x96f80e88,
-  (q31_t)0x4923f97b, (q31_t)0x96f4774b, (q31_t)0x491ed15c, (q31_t)0x96f0e04f, (q31_t)0x4919a90f, (q31_t)0x96ed4994, (q31_t)0x49148095, (q31_t)0x96e9b319,
-  (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x490a2f1b, (q31_t)0x96e286e7, (q31_t)0x4905061a, (q31_t)0x96def12f, (q31_t)0x48ffdcec, (q31_t)0x96db5bb8,
-  (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48f58a09, (q31_t)0x96d4318d, (q31_t)0x48f06054, (q31_t)0x96d09cd8, (q31_t)0x48eb3672, (q31_t)0x96cd0865,
-  (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48e0e227, (q31_t)0x96c5e040, (q31_t)0x48dbb7be, (q31_t)0x96c24c8f, (q31_t)0x48d68d28, (q31_t)0x96beb91f,
-  (q31_t)0x48d16265, (q31_t)0x96bb25f0, (q31_t)0x48cc3775, (q31_t)0x96b79302, (q31_t)0x48c70c59, (q31_t)0x96b40055, (q31_t)0x48c1e10f, (q31_t)0x96b06de9,
-  (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48b789f5, (q31_t)0x96a949d3, (q31_t)0x48b25e25, (q31_t)0x96a5b82a, (q31_t)0x48ad3228, (q31_t)0x96a226c2,
-  (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48a2d9a8, (q31_t)0x969b04b4, (q31_t)0x489dad25, (q31_t)0x9697740f, (q31_t)0x48988074, (q31_t)0x9693e3ab,
-  (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x488e268e, (q31_t)0x968cc3a5, (q31_t)0x4888f957, (q31_t)0x96893404, (q31_t)0x4883cbf4, (q31_t)0x9685a4a4,
-  (q31_t)0x487e9e64, (q31_t)0x96821585, (q31_t)0x487970a7, (q31_t)0x967e86a7, (q31_t)0x487442be, (q31_t)0x967af80a, (q31_t)0x486f14a8, (q31_t)0x967769af,
-  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4864b7f5, (q31_t)0x96704dba, (q31_t)0x485f8959, (q31_t)0x966cc022, (q31_t)0x485a5a90, (q31_t)0x966932cb,
-  (q31_t)0x48552b9b, (q31_t)0x9665a5b4, (q31_t)0x484ffc79, (q31_t)0x966218df, (q31_t)0x484acd2a, (q31_t)0x965e8c4b, (q31_t)0x48459daf, (q31_t)0x965afff9,
-  (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x483b3e33, (q31_t)0x9653e817, (q31_t)0x48360e32, (q31_t)0x96505c88, (q31_t)0x4830de05, (q31_t)0x964cd139,
-  (q31_t)0x482badab, (q31_t)0x9649462d, (q31_t)0x48267d24, (q31_t)0x9645bb61, (q31_t)0x48214c71, (q31_t)0x964230d7, (q31_t)0x481c1b92, (q31_t)0x963ea68d,
-  (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x4811b94d, (q31_t)0x963792bf, (q31_t)0x480c87e8, (q31_t)0x96340939, (q31_t)0x48075657, (q31_t)0x96307ff5,
-  (q31_t)0x48022499, (q31_t)0x962cf6f2, (q31_t)0x47fcf2af, (q31_t)0x96296e31, (q31_t)0x47f7c099, (q31_t)0x9625e5b0, (q31_t)0x47f28e56, (q31_t)0x96225d71,
-  (q31_t)0x47ed5be6, (q31_t)0x961ed574, (q31_t)0x47e8294a, (q31_t)0x961b4db7, (q31_t)0x47e2f682, (q31_t)0x9617c63c, (q31_t)0x47ddc38e, (q31_t)0x96143f02,
-  (q31_t)0x47d8906d, (q31_t)0x9610b80a, (q31_t)0x47d35d20, (q31_t)0x960d3153, (q31_t)0x47ce29a7, (q31_t)0x9609aadd, (q31_t)0x47c8f601, (q31_t)0x960624a9,
-  (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47be8e31, (q31_t)0x95ff1904, (q31_t)0x47b95a06, (q31_t)0x95fb9394, (q31_t)0x47b425af, (q31_t)0x95f80e65,
-  (q31_t)0x47aef12c, (q31_t)0x95f48977, (q31_t)0x47a9bc7d, (q31_t)0x95f104cb, (q31_t)0x47a487a2, (q31_t)0x95ed8061, (q31_t)0x479f529a, (q31_t)0x95e9fc38,
-  (q31_t)0x479a1d67, (q31_t)0x95e67850, (q31_t)0x4794e807, (q31_t)0x95e2f4a9, (q31_t)0x478fb27b, (q31_t)0x95df7145, (q31_t)0x478a7cc2, (q31_t)0x95dbee21,
-  (q31_t)0x478546de, (q31_t)0x95d86b3f, (q31_t)0x478010cd, (q31_t)0x95d4e89f, (q31_t)0x477ada91, (q31_t)0x95d16640, (q31_t)0x4775a428, (q31_t)0x95cde423,
-  (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x476b36d3, (q31_t)0x95c6e0ac, (q31_t)0x4765ffe6, (q31_t)0x95c35f53, (q31_t)0x4760c8cd, (q31_t)0x95bfde3c,
-  (q31_t)0x475b9188, (q31_t)0x95bc5d66, (q31_t)0x47565a17, (q31_t)0x95b8dcd2, (q31_t)0x4751227a, (q31_t)0x95b55c7f, (q31_t)0x474beab1, (q31_t)0x95b1dc6e,
-  (q31_t)0x4746b2bc, (q31_t)0x95ae5c9f, (q31_t)0x47417a9b, (q31_t)0x95aadd11, (q31_t)0x473c424e, (q31_t)0x95a75dc4, (q31_t)0x473709d5, (q31_t)0x95a3deb9,
-  (q31_t)0x4731d131, (q31_t)0x95a05ff0, (q31_t)0x472c9860, (q31_t)0x959ce169, (q31_t)0x47275f63, (q31_t)0x95996323, (q31_t)0x4722263b, (q31_t)0x9595e51e,
-  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x4717b367, (q31_t)0x958ee9db, (q31_t)0x471279ba, (q31_t)0x958b6c9b, (q31_t)0x470d3fe3, (q31_t)0x9587ef9e,
-  (q31_t)0x470805df, (q31_t)0x958472e2, (q31_t)0x4702cbaf, (q31_t)0x9580f667, (q31_t)0x46fd9154, (q31_t)0x957d7a2f, (q31_t)0x46f856cd, (q31_t)0x9579fe38,
-  (q31_t)0x46f31c1a, (q31_t)0x95768283, (q31_t)0x46ede13b, (q31_t)0x9573070f, (q31_t)0x46e8a631, (q31_t)0x956f8bdd, (q31_t)0x46e36afb, (q31_t)0x956c10ed,
-  (q31_t)0x46de2f99, (q31_t)0x9568963f, (q31_t)0x46d8f40b, (q31_t)0x95651bd2, (q31_t)0x46d3b852, (q31_t)0x9561a1a8, (q31_t)0x46ce7c6d, (q31_t)0x955e27bf,
-  (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46c40420, (q31_t)0x955734b2, (q31_t)0x46bec7b8, (q31_t)0x9553bb8e, (q31_t)0x46b98b24, (q31_t)0x955042ac,
-  (q31_t)0x46b44e65, (q31_t)0x954cca0c, (q31_t)0x46af117a, (q31_t)0x954951ae, (q31_t)0x46a9d464, (q31_t)0x9545d992, (q31_t)0x46a49722, (q31_t)0x954261b7,
-  (q31_t)0x469f59b4, (q31_t)0x953eea1e, (q31_t)0x469a1c1b, (q31_t)0x953b72c7, (q31_t)0x4694de56, (q31_t)0x9537fbb2, (q31_t)0x468fa066, (q31_t)0x953484df,
-  (q31_t)0x468a624a, (q31_t)0x95310e4e, (q31_t)0x46852403, (q31_t)0x952d97fe, (q31_t)0x467fe590, (q31_t)0x952a21f1, (q31_t)0x467aa6f2, (q31_t)0x9526ac25,
-  (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x46702933, (q31_t)0x951fc154, (q31_t)0x466aea12, (q31_t)0x951c4c4e, (q31_t)0x4665aac6, (q31_t)0x9518d78a,
-  (q31_t)0x46606b4e, (q31_t)0x95156308, (q31_t)0x465b2bab, (q31_t)0x9511eec8, (q31_t)0x4655ebdd, (q31_t)0x950e7aca, (q31_t)0x4650abe3, (q31_t)0x950b070e,
-  (q31_t)0x464b6bbe, (q31_t)0x95079394, (q31_t)0x46462b6d, (q31_t)0x9504205c, (q31_t)0x4640eaf2, (q31_t)0x9500ad66, (q31_t)0x463baa4a, (q31_t)0x94fd3ab1,
-  (q31_t)0x46366978, (q31_t)0x94f9c83f, (q31_t)0x4631287a, (q31_t)0x94f6560f, (q31_t)0x462be751, (q31_t)0x94f2e421, (q31_t)0x4626a5fd, (q31_t)0x94ef7275,
-  (q31_t)0x4621647d, (q31_t)0x94ec010b, (q31_t)0x461c22d2, (q31_t)0x94e88fe3, (q31_t)0x4616e0fc, (q31_t)0x94e51efd, (q31_t)0x46119efa, (q31_t)0x94e1ae59,
-  (q31_t)0x460c5cce, (q31_t)0x94de3df8, (q31_t)0x46071a76, (q31_t)0x94dacdd8, (q31_t)0x4601d7f3, (q31_t)0x94d75dfa, (q31_t)0x45fc9545, (q31_t)0x94d3ee5f,
-  (q31_t)0x45f7526b, (q31_t)0x94d07f05, (q31_t)0x45f20f67, (q31_t)0x94cd0fee, (q31_t)0x45eccc37, (q31_t)0x94c9a119, (q31_t)0x45e788dc, (q31_t)0x94c63286,
-  (q31_t)0x45e24556, (q31_t)0x94c2c435, (q31_t)0x45dd01a5, (q31_t)0x94bf5627, (q31_t)0x45d7bdc9, (q31_t)0x94bbe85a, (q31_t)0x45d279c2, (q31_t)0x94b87ad0,
-  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x45c7f132, (q31_t)0x94b1a081, (q31_t)0x45c2acaa, (q31_t)0x94ae33be, (q31_t)0x45bd67f6, (q31_t)0x94aac73c,
-  (q31_t)0x45b82318, (q31_t)0x94a75afd, (q31_t)0x45b2de0e, (q31_t)0x94a3eeff, (q31_t)0x45ad98da, (q31_t)0x94a08344, (q31_t)0x45a8537a, (q31_t)0x949d17cc,
-  (q31_t)0x45a30df0, (q31_t)0x9499ac95, (q31_t)0x459dc83b, (q31_t)0x949641a1, (q31_t)0x4598825a, (q31_t)0x9492d6ef, (q31_t)0x45933c4f, (q31_t)0x948f6c7f,
-  (q31_t)0x458df619, (q31_t)0x948c0252, (q31_t)0x4588afb8, (q31_t)0x94889867, (q31_t)0x4583692c, (q31_t)0x94852ebe, (q31_t)0x457e2275, (q31_t)0x9481c557,
-  (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x45739487, (q31_t)0x947af351, (q31_t)0x456e4d4f, (q31_t)0x94778ab1, (q31_t)0x456905ed, (q31_t)0x94742254,
-  (q31_t)0x4563be60, (q31_t)0x9470ba39, (q31_t)0x455e76a8, (q31_t)0x946d5260, (q31_t)0x45592ec6, (q31_t)0x9469eaca, (q31_t)0x4553e6b8, (q31_t)0x94668376,
-  (q31_t)0x454e9e80, (q31_t)0x94631c65, (q31_t)0x4549561d, (q31_t)0x945fb596, (q31_t)0x45440d90, (q31_t)0x945c4f09, (q31_t)0x453ec4d7, (q31_t)0x9458e8bf,
-  (q31_t)0x45397bf4, (q31_t)0x945582b7, (q31_t)0x453432e6, (q31_t)0x94521cf1, (q31_t)0x452ee9ae, (q31_t)0x944eb76e, (q31_t)0x4529a04b, (q31_t)0x944b522d,
-  (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x451f0d04, (q31_t)0x94448873, (q31_t)0x4519c321, (q31_t)0x944123fa, (q31_t)0x45147913, (q31_t)0x943dbfc3,
-  (q31_t)0x450f2edb, (q31_t)0x943a5bcf, (q31_t)0x4509e478, (q31_t)0x9436f81d, (q31_t)0x450499eb, (q31_t)0x943394ad, (q31_t)0x44ff4f32, (q31_t)0x94303180,
-  (q31_t)0x44fa0450, (q31_t)0x942cce96, (q31_t)0x44f4b943, (q31_t)0x94296bee, (q31_t)0x44ef6e0b, (q31_t)0x94260989, (q31_t)0x44ea22a9, (q31_t)0x9422a766,
-  (q31_t)0x44e4d71c, (q31_t)0x941f4585, (q31_t)0x44df8b64, (q31_t)0x941be3e8, (q31_t)0x44da3f83, (q31_t)0x9418828c, (q31_t)0x44d4f376, (q31_t)0x94152174,
-  (q31_t)0x44cfa740, (q31_t)0x9411c09e, (q31_t)0x44ca5adf, (q31_t)0x940e600a, (q31_t)0x44c50e53, (q31_t)0x940affb9, (q31_t)0x44bfc19d, (q31_t)0x94079fab,
-  (q31_t)0x44ba74bd, (q31_t)0x94043fdf, (q31_t)0x44b527b2, (q31_t)0x9400e056, (q31_t)0x44afda7d, (q31_t)0x93fd810f, (q31_t)0x44aa8d1d, (q31_t)0x93fa220b,
-  (q31_t)0x44a53f93, (q31_t)0x93f6c34a, (q31_t)0x449ff1df, (q31_t)0x93f364cb, (q31_t)0x449aa400, (q31_t)0x93f0068f, (q31_t)0x449555f7, (q31_t)0x93eca896,
-  (q31_t)0x449007c4, (q31_t)0x93e94adf, (q31_t)0x448ab967, (q31_t)0x93e5ed6b, (q31_t)0x44856adf, (q31_t)0x93e2903a, (q31_t)0x44801c2d, (q31_t)0x93df334c,
-  (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x44757e4a, (q31_t)0x93d87a36, (q31_t)0x44702f19, (q31_t)0x93d51e10, (q31_t)0x446adfbe, (q31_t)0x93d1c22c,
-  (q31_t)0x44659039, (q31_t)0x93ce668b, (q31_t)0x44604089, (q31_t)0x93cb0b2d, (q31_t)0x445af0b0, (q31_t)0x93c7b011, (q31_t)0x4455a0ac, (q31_t)0x93c45539,
-  (q31_t)0x4450507e, (q31_t)0x93c0faa3, (q31_t)0x444b0026, (q31_t)0x93bda04f, (q31_t)0x4445afa4, (q31_t)0x93ba463f, (q31_t)0x44405ef8, (q31_t)0x93b6ec71,
-  (q31_t)0x443b0e21, (q31_t)0x93b392e6, (q31_t)0x4435bd21, (q31_t)0x93b0399e, (q31_t)0x44306bf6, (q31_t)0x93ace099, (q31_t)0x442b1aa2, (q31_t)0x93a987d6,
-  (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x4420777b, (q31_t)0x93a2d71a, (q31_t)0x441b25a8, (q31_t)0x939f7f20, (q31_t)0x4415d3ab, (q31_t)0x939c2769,
-  (q31_t)0x44108184, (q31_t)0x9398cff5, (q31_t)0x440b2f34, (q31_t)0x939578c3, (q31_t)0x4405dcb9, (q31_t)0x939221d5, (q31_t)0x44008a14, (q31_t)0x938ecb29,
-  (q31_t)0x43fb3746, (q31_t)0x938b74c1, (q31_t)0x43f5e44d, (q31_t)0x93881e9b, (q31_t)0x43f0912b, (q31_t)0x9384c8b8, (q31_t)0x43eb3ddf, (q31_t)0x93817318,
-  (q31_t)0x43e5ea68, (q31_t)0x937e1dbb, (q31_t)0x43e096c8, (q31_t)0x937ac8a1, (q31_t)0x43db42fe, (q31_t)0x937773ca, (q31_t)0x43d5ef0a, (q31_t)0x93741f35,
-  (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x43cb46a5, (q31_t)0x936d76d6, (q31_t)0x43c5f234, (q31_t)0x936a230a, (q31_t)0x43c09d99, (q31_t)0x9366cf82,
-  (q31_t)0x43bb48d4, (q31_t)0x93637c3d, (q31_t)0x43b5f3e5, (q31_t)0x9360293a, (q31_t)0x43b09ecc, (q31_t)0x935cd67b, (q31_t)0x43ab498a, (q31_t)0x935983ff,
-  (q31_t)0x43a5f41e, (q31_t)0x935631c5, (q31_t)0x43a09e89, (q31_t)0x9352dfcf, (q31_t)0x439b48c9, (q31_t)0x934f8e1c, (q31_t)0x4395f2e0, (q31_t)0x934c3cab,
-  (q31_t)0x43909ccd, (q31_t)0x9348eb7e, (q31_t)0x438b4691, (q31_t)0x93459a94, (q31_t)0x4385f02a, (q31_t)0x934249ed, (q31_t)0x4380999b, (q31_t)0x933ef989,
-  (q31_t)0x437b42e1, (q31_t)0x933ba968, (q31_t)0x4375ebfe, (q31_t)0x9338598a, (q31_t)0x437094f1, (q31_t)0x933509f0, (q31_t)0x436b3dbb, (q31_t)0x9331ba98,
-  (q31_t)0x4365e65b, (q31_t)0x932e6b84, (q31_t)0x43608ed2, (q31_t)0x932b1cb2, (q31_t)0x435b371f, (q31_t)0x9327ce24, (q31_t)0x4355df42, (q31_t)0x93247fd9,
-  (q31_t)0x4350873c, (q31_t)0x932131d1, (q31_t)0x434b2f0c, (q31_t)0x931de40c, (q31_t)0x4345d6b3, (q31_t)0x931a968b, (q31_t)0x43407e31, (q31_t)0x9317494c,
-  (q31_t)0x433b2585, (q31_t)0x9313fc51, (q31_t)0x4335ccaf, (q31_t)0x9310af99, (q31_t)0x433073b0, (q31_t)0x930d6324, (q31_t)0x432b1a87, (q31_t)0x930a16f3,
-  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x432067ba, (q31_t)0x93037f59, (q31_t)0x431b0e15, (q31_t)0x930033f1, (q31_t)0x4315b447, (q31_t)0x92fce8cc,
-  (q31_t)0x43105a50, (q31_t)0x92f99deb, (q31_t)0x430b002f, (q31_t)0x92f6534c, (q31_t)0x4305a5e5, (q31_t)0x92f308f1, (q31_t)0x43004b71, (q31_t)0x92efbeda,
-  (q31_t)0x42faf0d4, (q31_t)0x92ec7505, (q31_t)0x42f5960e, (q31_t)0x92e92b74, (q31_t)0x42f03b1e, (q31_t)0x92e5e226, (q31_t)0x42eae005, (q31_t)0x92e2991c,
-  (q31_t)0x42e584c3, (q31_t)0x92df5054, (q31_t)0x42e02958, (q31_t)0x92dc07d0, (q31_t)0x42dacdc3, (q31_t)0x92d8bf90, (q31_t)0x42d57205, (q31_t)0x92d57792,
-  (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x42caba0e, (q31_t)0x92cee862, (q31_t)0x42c55dd4, (q31_t)0x92cba12f, (q31_t)0x42c00172, (q31_t)0x92c85a3f,
-  (q31_t)0x42baa4e6, (q31_t)0x92c51392, (q31_t)0x42b54831, (q31_t)0x92c1cd29, (q31_t)0x42afeb53, (q31_t)0x92be8703, (q31_t)0x42aa8e4b, (q31_t)0x92bb4121,
-  (q31_t)0x42a5311b, (q31_t)0x92b7fb82, (q31_t)0x429fd3c1, (q31_t)0x92b4b626, (q31_t)0x429a763f, (q31_t)0x92b1710e, (q31_t)0x42951893, (q31_t)0x92ae2c3a,
-  (q31_t)0x428fbabe, (q31_t)0x92aae7a8, (q31_t)0x428a5cc0, (q31_t)0x92a7a35a, (q31_t)0x4284fe99, (q31_t)0x92a45f50, (q31_t)0x427fa049, (q31_t)0x92a11b89,
-  (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x4274e32e, (q31_t)0x929a94c6, (q31_t)0x426f8463, (q31_t)0x929751c9, (q31_t)0x426a256f, (q31_t)0x92940f10,
-  (q31_t)0x4264c653, (q31_t)0x9290cc9b, (q31_t)0x425f670d, (q31_t)0x928d8a69, (q31_t)0x425a079e, (q31_t)0x928a487a, (q31_t)0x4254a806, (q31_t)0x928706cf,
-  (q31_t)0x424f4845, (q31_t)0x9283c568, (q31_t)0x4249e85c, (q31_t)0x92808444, (q31_t)0x42448849, (q31_t)0x927d4363, (q31_t)0x423f280e, (q31_t)0x927a02c7,
-  (q31_t)0x4239c7aa, (q31_t)0x9276c26d, (q31_t)0x4234671d, (q31_t)0x92738258, (q31_t)0x422f0667, (q31_t)0x92704286, (q31_t)0x4229a588, (q31_t)0x926d02f7,
-  (q31_t)0x42244481, (q31_t)0x9269c3ac, (q31_t)0x421ee350, (q31_t)0x926684a5, (q31_t)0x421981f7, (q31_t)0x926345e1, (q31_t)0x42142075, (q31_t)0x92600761,
-  (q31_t)0x420ebecb, (q31_t)0x925cc924, (q31_t)0x42095cf7, (q31_t)0x92598b2b, (q31_t)0x4203fafb, (q31_t)0x92564d76, (q31_t)0x41fe98d6, (q31_t)0x92531005,
-  (q31_t)0x41f93689, (q31_t)0x924fd2d7, (q31_t)0x41f3d413, (q31_t)0x924c95ec, (q31_t)0x41ee7174, (q31_t)0x92495946, (q31_t)0x41e90eac, (q31_t)0x92461ce3,
-  (q31_t)0x41e3abbc, (q31_t)0x9242e0c4, (q31_t)0x41de48a3, (q31_t)0x923fa4e8, (q31_t)0x41d8e561, (q31_t)0x923c6950, (q31_t)0x41d381f7, (q31_t)0x92392dfc,
-  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x41c8baa9, (q31_t)0x9232b81f, (q31_t)0x41c356c5, (q31_t)0x922f7d96, (q31_t)0x41bdf2b9, (q31_t)0x922c4351,
-  (q31_t)0x41b88e84, (q31_t)0x9229094f, (q31_t)0x41b32a26, (q31_t)0x9225cf91, (q31_t)0x41adc5a0, (q31_t)0x92229617, (q31_t)0x41a860f1, (q31_t)0x921f5ce1,
-  (q31_t)0x41a2fc1a, (q31_t)0x921c23ef, (q31_t)0x419d971b, (q31_t)0x9218eb40, (q31_t)0x419831f3, (q31_t)0x9215b2d5, (q31_t)0x4192cca2, (q31_t)0x92127aae,
-  (q31_t)0x418d6729, (q31_t)0x920f42cb, (q31_t)0x41880188, (q31_t)0x920c0b2c, (q31_t)0x41829bbe, (q31_t)0x9208d3d0, (q31_t)0x417d35cb, (q31_t)0x92059cb8,
-  (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x4172696e, (q31_t)0x91ff2f54, (q31_t)0x416d0302, (q31_t)0x91fbf908, (q31_t)0x41679c6f, (q31_t)0x91f8c300,
-  (q31_t)0x416235b2, (q31_t)0x91f58d3b, (q31_t)0x415ccece, (q31_t)0x91f257bb, (q31_t)0x415767c1, (q31_t)0x91ef227e, (q31_t)0x4152008c, (q31_t)0x91ebed85,
-  (q31_t)0x414c992f, (q31_t)0x91e8b8d0, (q31_t)0x414731a9, (q31_t)0x91e5845f, (q31_t)0x4141c9fb, (q31_t)0x91e25032, (q31_t)0x413c6225, (q31_t)0x91df1c49,
-  (q31_t)0x4136fa27, (q31_t)0x91dbe8a4, (q31_t)0x41319200, (q31_t)0x91d8b542, (q31_t)0x412c29b1, (q31_t)0x91d58225, (q31_t)0x4126c13a, (q31_t)0x91d24f4c,
-  (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x411befd3, (q31_t)0x91cbea65, (q31_t)0x411686e4, (q31_t)0x91c8b857, (q31_t)0x41111dcc, (q31_t)0x91c5868e,
-  (q31_t)0x410bb48c, (q31_t)0x91c25508, (q31_t)0x41064b24, (q31_t)0x91bf23c7, (q31_t)0x4100e194, (q31_t)0x91bbf2c9, (q31_t)0x40fb77dc, (q31_t)0x91b8c210,
-  (q31_t)0x40f60dfb, (q31_t)0x91b5919a, (q31_t)0x40f0a3f3, (q31_t)0x91b26169, (q31_t)0x40eb39c3, (q31_t)0x91af317c, (q31_t)0x40e5cf6a, (q31_t)0x91ac01d2,
-  (q31_t)0x40e064ea, (q31_t)0x91a8d26d, (q31_t)0x40dafa41, (q31_t)0x91a5a34c, (q31_t)0x40d58f71, (q31_t)0x91a2746f, (q31_t)0x40d02478, (q31_t)0x919f45d6,
-  (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40c54e0f, (q31_t)0x9198e970, (q31_t)0x40bfe29f, (q31_t)0x9195bba3, (q31_t)0x40ba7706, (q31_t)0x91928e1a,
-  (q31_t)0x40b50b46, (q31_t)0x918f60d6, (q31_t)0x40af9f5e, (q31_t)0x918c33d5, (q31_t)0x40aa334e, (q31_t)0x91890719, (q31_t)0x40a4c716, (q31_t)0x9185daa1,
-  (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4099ee2e, (q31_t)0x917f827d, (q31_t)0x4094817f, (q31_t)0x917c56d1, (q31_t)0x408f14a7, (q31_t)0x91792b6a,
-  (q31_t)0x4089a7a8, (q31_t)0x91760047, (q31_t)0x40843a81, (q31_t)0x9172d567, (q31_t)0x407ecd32, (q31_t)0x916faacc, (q31_t)0x40795fbc, (q31_t)0x916c8076,
-  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x406e8457, (q31_t)0x91662c95, (q31_t)0x40691669, (q31_t)0x9163030b, (q31_t)0x4063a854, (q31_t)0x915fd9c5,
-  (q31_t)0x405e3a16, (q31_t)0x915cb0c3, (q31_t)0x4058cbb1, (q31_t)0x91598806, (q31_t)0x40535d24, (q31_t)0x91565f8d, (q31_t)0x404dee70, (q31_t)0x91533758,
-  (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x40431090, (q31_t)0x914ce7bb, (q31_t)0x403da165, (q31_t)0x9149c053, (q31_t)0x40383212, (q31_t)0x9146992f,
-  (q31_t)0x4032c297, (q31_t)0x91437250, (q31_t)0x402d52f5, (q31_t)0x91404bb5, (q31_t)0x4027e32b, (q31_t)0x913d255e, (q31_t)0x4022733a, (q31_t)0x9139ff4b,
-  (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x401792e0, (q31_t)0x9133b3f3, (q31_t)0x40122278, (q31_t)0x91308eae, (q31_t)0x400cb1e9, (q31_t)0x912d69ad,
-  (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x4001d053, (q31_t)0x91272078, (q31_t)0x3ffc5f4d, (q31_t)0x9123fc44, (q31_t)0x3ff6ee1f, (q31_t)0x9120d854,
-  (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fec0b4e, (q31_t)0x911a9142, (q31_t)0x3fe699aa, (q31_t)0x91176e1f, (q31_t)0x3fe127df, (q31_t)0x91144b41,
-  (q31_t)0x3fdbb5ec, (q31_t)0x911128a8, (q31_t)0x3fd643d2, (q31_t)0x910e0653, (q31_t)0x3fd0d191, (q31_t)0x910ae442, (q31_t)0x3fcb5f28, (q31_t)0x9107c276,
-  (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fc079e0, (q31_t)0x91017faa, (q31_t)0x3fbb0702, (q31_t)0x90fe5eab, (q31_t)0x3fb593fb, (q31_t)0x90fb3df1,
-  (q31_t)0x3fb020ce, (q31_t)0x90f81d7b, (q31_t)0x3faaad79, (q31_t)0x90f4fd4a, (q31_t)0x3fa539fd, (q31_t)0x90f1dd5d, (q31_t)0x3f9fc65a, (q31_t)0x90eebdb4,
-  (q31_t)0x3f9a5290, (q31_t)0x90eb9e50, (q31_t)0x3f94de9e, (q31_t)0x90e87f31, (q31_t)0x3f8f6a85, (q31_t)0x90e56056, (q31_t)0x3f89f645, (q31_t)0x90e241bf,
-  (q31_t)0x3f8481dd, (q31_t)0x90df236e, (q31_t)0x3f7f0d4f, (q31_t)0x90dc0560, (q31_t)0x3f799899, (q31_t)0x90d8e798, (q31_t)0x3f7423bc, (q31_t)0x90d5ca13,
-  (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4, (q31_t)0x3f69398d, (q31_t)0x90cf8fd9, (q31_t)0x3f63c43b, (q31_t)0x90cc7322, (q31_t)0x3f5e4ec2, (q31_t)0x90c956b1,
-  (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f53635a, (q31_t)0x90c31e9b, (q31_t)0x3f4ded6b, (q31_t)0x90c002f7, (q31_t)0x3f487755, (q31_t)0x90bce797,
-  (q31_t)0x3f430119, (q31_t)0x90b9cc7d, (q31_t)0x3f3d8ab5, (q31_t)0x90b6b1a6, (q31_t)0x3f38142a, (q31_t)0x90b39715, (q31_t)0x3f329d79, (q31_t)0x90b07cc8,
-  (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0, (q31_t)0x3f27afa1, (q31_t)0x90aa48fd, (q31_t)0x3f22387a, (q31_t)0x90a72f7e, (q31_t)0x3f1cc12c, (q31_t)0x90a41644,
-  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f11d21d, (q31_t)0x909de49e, (q31_t)0x3f0c5a5a, (q31_t)0x909acc32, (q31_t)0x3f06e271, (q31_t)0x9097b40a,
-  (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3efbf22a, (q31_t)0x9091848a, (q31_t)0x3ef679cc, (q31_t)0x908e6d31, (q31_t)0x3ef10148, (q31_t)0x908b561c,
-  (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ee60fca, (q31_t)0x908528c2, (q31_t)0x3ee096d1, (q31_t)0x9082127c, (q31_t)0x3edb1db1, (q31_t)0x907efc7a,
-  (q31_t)0x3ed5a46b, (q31_t)0x907be6be, (q31_t)0x3ed02afd, (q31_t)0x9078d146, (q31_t)0x3ecab169, (q31_t)0x9075bc13, (q31_t)0x3ec537ae, (q31_t)0x9072a725,
-  (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3eba43c4, (q31_t)0x906c7e17, (q31_t)0x3eb4c995, (q31_t)0x906969f8, (q31_t)0x3eaf4f40, (q31_t)0x9066561d,
-  (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3ea45a21, (q31_t)0x90602f35, (q31_t)0x3e9edf57, (q31_t)0x905d1c29, (q31_t)0x3e996467, (q31_t)0x905a0962,
-  (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e8e6e12, (q31_t)0x9053e4a1, (q31_t)0x3e88f2ae, (q31_t)0x9050d2a9, (q31_t)0x3e837724, (q31_t)0x904dc0f5,
-  (q31_t)0x3e7dfb73, (q31_t)0x904aaf86, (q31_t)0x3e787f9b, (q31_t)0x90479e5c, (q31_t)0x3e73039d, (q31_t)0x90448d76, (q31_t)0x3e6d8778, (q31_t)0x90417cd6,
-  (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e628ebb, (q31_t)0x903b5c64, (q31_t)0x3e5d1222, (q31_t)0x90384c93, (q31_t)0x3e579564, (q31_t)0x90353d06,
-  (q31_t)0x3e52187f, (q31_t)0x90322dbf, (q31_t)0x3e4c9b73, (q31_t)0x902f1ebc, (q31_t)0x3e471e41, (q31_t)0x902c0fff, (q31_t)0x3e41a0e8, (q31_t)0x90290186,
-  (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e36a5c4, (q31_t)0x9022e564, (q31_t)0x3e3127f9, (q31_t)0x901fd7ba, (q31_t)0x3e2baa07, (q31_t)0x901cca55,
-  (q31_t)0x3e262bee, (q31_t)0x9019bd36, (q31_t)0x3e20adaf, (q31_t)0x9016b05b, (q31_t)0x3e1b2f4a, (q31_t)0x9013a3c5, (q31_t)0x3e15b0bf, (q31_t)0x90109775,
-  (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3e0ab336, (q31_t)0x900a7fa3, (q31_t)0x3e053437, (q31_t)0x90077422, (q31_t)0x3dffb513, (q31_t)0x900468e5,
-  (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3df4b657, (q31_t)0x8ffe533c, (q31_t)0x3def36c0, (q31_t)0x8ffb48cf, (q31_t)0x3de9b703, (q31_t)0x8ff83ea7,
-  (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3ddeb716, (q31_t)0x8ff22b26, (q31_t)0x3dd936e6, (q31_t)0x8fef21ce, (q31_t)0x3dd3b690, (q31_t)0x8fec18ba,
-  (q31_t)0x3dce3614, (q31_t)0x8fe90fec, (q31_t)0x3dc8b571, (q31_t)0x8fe60763, (q31_t)0x3dc334a9, (q31_t)0x8fe2ff1f, (q31_t)0x3dbdb3ba, (q31_t)0x8fdff720,
-  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3db2b16b, (q31_t)0x8fd9e7f2, (q31_t)0x3dad300b, (q31_t)0x8fd6e0c2, (q31_t)0x3da7ae84, (q31_t)0x8fd3d9d8,
-  (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d9cab04, (q31_t)0x8fcdccd3, (q31_t)0x3d97290b, (q31_t)0x8fcac6b9, (q31_t)0x3d91a6ed, (q31_t)0x8fc7c0e3,
-  (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d86a23d, (q31_t)0x8fc1b608, (q31_t)0x3d811fac, (q31_t)0x8fbeb103, (q31_t)0x3d7b9cf6, (q31_t)0x8fbbac42,
-  (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7, (q31_t)0x3d709717, (q31_t)0x8fb5a391, (q31_t)0x3d6b13ee, (q31_t)0x8fb29fa0, (q31_t)0x3d6590a0, (q31_t)0x8faf9bf5,
-  (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d5a8992, (q31_t)0x8fa9956e, (q31_t)0x3d5505d2, (q31_t)0x8fa69293, (q31_t)0x3d4f81ec, (q31_t)0x8fa38ffc,
-  (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d4479b0, (q31_t)0x8f9d8ba0, (q31_t)0x3d3ef559, (q31_t)0x8f9a89da, (q31_t)0x3d3970dc, (q31_t)0x8f978859,
-  (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d2e6771, (q31_t)0x8f918627, (q31_t)0x3d28e282, (q31_t)0x8f8e8576, (q31_t)0x3d235d6f, (q31_t)0x8f8b850a,
-  (q31_t)0x3d1dd835, (q31_t)0x8f8884e4, (q31_t)0x3d1852d6, (q31_t)0x8f858503, (q31_t)0x3d12cd51, (q31_t)0x8f828568, (q31_t)0x3d0d47a6, (q31_t)0x8f7f8612,
-  (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3d023be0, (q31_t)0x8f798836, (q31_t)0x3cfcb5c4, (q31_t)0x8f7689b0, (q31_t)0x3cf72f83, (q31_t)0x8f738b70,
-  (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cec2290, (q31_t)0x8f6d8fbf, (q31_t)0x3ce69bde, (q31_t)0x8f6a924f, (q31_t)0x3ce11507, (q31_t)0x8f679525,
-  (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cd606e7, (q31_t)0x8f619ba0, (q31_t)0x3cd07f9f, (q31_t)0x8f5e9f46, (q31_t)0x3ccaf831, (q31_t)0x8f5ba331,
-  (q31_t)0x3cc5709e, (q31_t)0x8f58a761, (q31_t)0x3cbfe8e5, (q31_t)0x8f55abd8, (q31_t)0x3cba6107, (q31_t)0x8f52b093, (q31_t)0x3cb4d904, (q31_t)0x8f4fb595,
-  (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3ca9c88c, (q31_t)0x8f49c067, (q31_t)0x3ca44018, (q31_t)0x8f46c639, (q31_t)0x3c9eb77f, (q31_t)0x8f43cc50,
-  (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c93a5dc, (q31_t)0x8f3dd950, (q31_t)0x3c8e1cd3, (q31_t)0x8f3ae038, (q31_t)0x3c8893a4, (q31_t)0x8f37e765,
-  (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c7d80d6, (q31_t)0x8f31f691, (q31_t)0x3c77f737, (q31_t)0x8f2efe8f, (q31_t)0x3c726d73, (q31_t)0x8f2c06d3,
-  (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c, (q31_t)0x3c67597b, (q31_t)0x8f26182b, (q31_t)0x3c61cf48, (q31_t)0x8f232140, (q31_t)0x3c5c44ee, (q31_t)0x8f202a9a,
-  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c512fcc, (q31_t)0x8f1a3e1f, (q31_t)0x3c4ba504, (q31_t)0x8f17484b, (q31_t)0x3c461a16, (q31_t)0x8f1452bb,
-  (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c3b03ca, (q31_t)0x8f0e686e, (q31_t)0x3c35786d, (q31_t)0x8f0b73b0, (q31_t)0x3c2fecea, (q31_t)0x8f087f37,
-  (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c24d575, (q31_t)0x8f029717, (q31_t)0x3c1f4983, (q31_t)0x8effa370, (q31_t)0x3c19bd6c, (q31_t)0x8efcb00e,
-  (q31_t)0x3c143130, (q31_t)0x8ef9bcf2, (q31_t)0x3c0ea4cf, (q31_t)0x8ef6ca1c, (q31_t)0x3c091849, (q31_t)0x8ef3d78b, (q31_t)0x3c038b9e, (q31_t)0x8ef0e540,
-  (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3bf871d8, (q31_t)0x8eeb017c, (q31_t)0x3bf2e4be, (q31_t)0x8ee81002, (q31_t)0x3bed577e, (q31_t)0x8ee51ece,
-  (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3be23c91, (q31_t)0x8edf3d38, (q31_t)0x3bdcaee3, (q31_t)0x8edc4cd5, (q31_t)0x3bd72110, (q31_t)0x8ed95cb8,
-  (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bcc04fb, (q31_t)0x8ed37d50, (q31_t)0x3bc676b9, (q31_t)0x8ed08e05, (q31_t)0x3bc0e853, (q31_t)0x8ecd9eff,
-  (q31_t)0x3bbb59c7, (q31_t)0x8ecab040, (q31_t)0x3bb5cb17, (q31_t)0x8ec7c1c6, (q31_t)0x3bb03c42, (q31_t)0x8ec4d392, (q31_t)0x3baaad48, (q31_t)0x8ec1e5a4,
-  (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b9f8ee5, (q31_t)0x8ebc0a99, (q31_t)0x3b99ff7d, (q31_t)0x8eb91d7c, (q31_t)0x3b946ff0, (q31_t)0x8eb630a6,
-  (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b895068, (q31_t)0x8eb057ca, (q31_t)0x3b83c06c, (q31_t)0x8ead6bc5, (q31_t)0x3b7e304c, (q31_t)0x8eaa8006,
-  (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b730f9e, (q31_t)0x8ea4a959, (q31_t)0x3b6d7f10, (q31_t)0x8ea1be6c, (q31_t)0x3b67ee5d, (q31_t)0x8e9ed3c4,
-  (q31_t)0x3b625d86, (q31_t)0x8e9be963, (q31_t)0x3b5ccc8a, (q31_t)0x8e98ff47, (q31_t)0x3b573b69, (q31_t)0x8e961571, (q31_t)0x3b51aa24, (q31_t)0x8e932be2,
-  (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b46872c, (q31_t)0x8e8d5994, (q31_t)0x3b40f579, (q31_t)0x8e8a70d7, (q31_t)0x3b3b63a1, (q31_t)0x8e87885f,
-  (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b303f84, (q31_t)0x8e81b841, (q31_t)0x3b2aad3f, (q31_t)0x8e7ed09b, (q31_t)0x3b251ad6, (q31_t)0x8e7be93c,
-  (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b19f595, (q31_t)0x8e761b4e, (q31_t)0x3b1462be, (q31_t)0x8e7334c1, (q31_t)0x3b0ecfc3, (q31_t)0x8e704e79,
-  (q31_t)0x3b093ca3, (q31_t)0x8e6d6877, (q31_t)0x3b03a95e, (q31_t)0x8e6a82bc, (q31_t)0x3afe15f6, (q31_t)0x8e679d47, (q31_t)0x3af88269, (q31_t)0x8e64b817,
-  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3aed5ae1, (q31_t)0x8e5eee8b, (q31_t)0x3ae7c6e7, (q31_t)0x8e5c0a2e, (q31_t)0x3ae232c9, (q31_t)0x8e592617,
-  (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ad70a1f, (q31_t)0x8e535ebb, (q31_t)0x3ad17593, (q31_t)0x8e507b76, (q31_t)0x3acbe0e3, (q31_t)0x8e4d9878,
-  (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3ac0b717, (q31_t)0x8e47d34d, (q31_t)0x3abb21fb, (q31_t)0x8e44f121, (q31_t)0x3ab58cba, (q31_t)0x8e420f3b,
-  (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b, (q31_t)0x3aaa61cc, (q31_t)0x8e3c4c41, (q31_t)0x3aa4cc1e, (q31_t)0x8e396b2e, (q31_t)0x3a9f364d, (q31_t)0x8e368a61,
-  (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a940a3e, (q31_t)0x8e30c999, (q31_t)0x3a8e7400, (q31_t)0x8e2de99e, (q31_t)0x3a88dd9d, (q31_t)0x8e2b09e9,
-  (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a7db06d, (q31_t)0x8e254b53, (q31_t)0x3a78199f, (q31_t)0x8e226c71, (q31_t)0x3a7282ac, (q31_t)0x8e1f8dd6,
-  (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a67545b, (q31_t)0x8e19d171, (q31_t)0x3a61bcfd, (q31_t)0x8e16f3a9, (q31_t)0x3a5c257a, (q31_t)0x8e141626,
-  (q31_t)0x3a568dd4, (q31_t)0x8e1138ea, (q31_t)0x3a50f609, (q31_t)0x8e0e5bf4, (q31_t)0x3a4b5e1b, (q31_t)0x8e0b7f44, (q31_t)0x3a45c608, (q31_t)0x8e08a2db,
-  (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a3a9577, (q31_t)0x8e02eadb, (q31_t)0x3a34fcf9, (q31_t)0x8e000f44, (q31_t)0x3a2f6457, (q31_t)0x8dfd33f4,
-  (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a2432a7, (q31_t)0x8df77e27, (q31_t)0x3a1e9999, (q31_t)0x8df4a3a9, (q31_t)0x3a190068, (q31_t)0x8df1c973,
-  (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x3a0dcd99, (q31_t)0x8dec15d8, (q31_t)0x3a0833fc, (q31_t)0x8de93c74, (q31_t)0x3a029a3b, (q31_t)0x8de66357,
-  (q31_t)0x39fd0056, (q31_t)0x8de38a80, (q31_t)0x39f7664e, (q31_t)0x8de0b1ef, (q31_t)0x39f1cc21, (q31_t)0x8dddd9a5, (q31_t)0x39ec31d1, (q31_t)0x8ddb01a1,
-  (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39e0fcc6, (q31_t)0x8dd5526d, (q31_t)0x39db620b, (q31_t)0x8dd27b3c, (q31_t)0x39d5c72c, (q31_t)0x8dcfa452,
-  (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39ca9104, (q31_t)0x8dc9f751, (q31_t)0x39c4f5ba, (q31_t)0x8dc7213b, (q31_t)0x39bf5a4d, (q31_t)0x8dc44b6a,
-  (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39b42307, (q31_t)0x8dbea09d, (q31_t)0x39ae872f, (q31_t)0x8dbbcba0, (q31_t)0x39a8eb33, (q31_t)0x8db8f6ea,
-  (q31_t)0x39a34f13, (q31_t)0x8db6227a, (q31_t)0x399db2d0, (q31_t)0x8db34e50, (q31_t)0x3998166a, (q31_t)0x8db07a6d, (q31_t)0x399279e0, (q31_t)0x8dada6d1,
-  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39874061, (q31_t)0x8da8006c, (q31_t)0x3981a36d, (q31_t)0x8da52da3, (q31_t)0x397c0655, (q31_t)0x8da25b21,
-  (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x3970cbba, (q31_t)0x8d9cb6f0, (q31_t)0x396b2e38, (q31_t)0x8d99e541, (q31_t)0x39659092, (q31_t)0x8d9713d9,
-  (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x395a54dd, (q31_t)0x8d9171dd, (q31_t)0x3954b6cd, (q31_t)0x8d8ea148, (q31_t)0x394f1899, (q31_t)0x8d8bd0fb,
-  (q31_t)0x39497a43, (q31_t)0x8d8900f3, (q31_t)0x3943dbc9, (q31_t)0x8d863133, (q31_t)0x393e3d2c, (q31_t)0x8d8361b9, (q31_t)0x39389e6b, (q31_t)0x8d809286,
-  (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x392d6080, (q31_t)0x8d7af4f3, (q31_t)0x3927c155, (q31_t)0x8d782694, (q31_t)0x39222208, (q31_t)0x8d75587b,
-  (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x3916e303, (q31_t)0x8d6fbd1d, (q31_t)0x3911434b, (q31_t)0x8d6cefd9, (q31_t)0x390ba371, (q31_t)0x8d6a22db,
-  (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x39006352, (q31_t)0x8d6489b3, (q31_t)0x38fac30e, (q31_t)0x8d61bd89, (q31_t)0x38f522a6, (q31_t)0x8d5ef1a5,
-  (q31_t)0x38ef821c, (q31_t)0x8d5c2609, (q31_t)0x38e9e16e, (q31_t)0x8d595ab3, (q31_t)0x38e4409e, (q31_t)0x8d568fa4, (q31_t)0x38de9faa, (q31_t)0x8d53c4db,
-  (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38d35d59, (q31_t)0x8d4e301f, (q31_t)0x38cdbbfc, (q31_t)0x8d4b662a, (q31_t)0x38c81a7c, (q31_t)0x8d489c7d,
-  (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38bcd713, (q31_t)0x8d4309f6, (q31_t)0x38b7352a, (q31_t)0x8d40411d, (q31_t)0x38b1931e, (q31_t)0x8d3d788b,
-  (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x38a64e9d, (q31_t)0x8d37e83a, (q31_t)0x38a0ac29, (q31_t)0x8d35207d, (q31_t)0x389b0991, (q31_t)0x8d325905,
-  (q31_t)0x389566d6, (q31_t)0x8d2f91d5, (q31_t)0x388fc3f8, (q31_t)0x8d2ccaec, (q31_t)0x388a20f8, (q31_t)0x8d2a0449, (q31_t)0x38847dd5, (q31_t)0x8d273ded,
-  (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38793725, (q31_t)0x8d21b20a, (q31_t)0x38739399, (q31_t)0x8d1eec83, (q31_t)0x386defeb, (q31_t)0x8d1c2742,
-  (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3862a825, (q31_t)0x8d169d96, (q31_t)0x385d040d, (q31_t)0x8d13d92a, (q31_t)0x38575fd4, (q31_t)0x8d111505,
-  (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x384c16f7, (q31_t)0x8d0b8d90, (q31_t)0x38467255, (q31_t)0x8d08ca40, (q31_t)0x3840cd90, (q31_t)0x8d060737,
-  (q31_t)0x383b28a9, (q31_t)0x8d034474, (q31_t)0x3835839f, (q31_t)0x8d0081f9, (q31_t)0x382fde72, (q31_t)0x8cfdbfc4, (q31_t)0x382a3922, (q31_t)0x8cfafdd7,
-  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x381eee1b, (q31_t)0x8cf57ad0, (q31_t)0x38194864, (q31_t)0x8cf2b9b8, (q31_t)0x3813a28a, (q31_t)0x8ceff8e6,
-  (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x3808566e, (q31_t)0x8cea7818, (q31_t)0x3802b02c, (q31_t)0x8ce7b81b, (q31_t)0x37fd09c8, (q31_t)0x8ce4f865,
-  (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37f1bc97, (q31_t)0x8cdf79ce, (q31_t)0x37ec15cb, (q31_t)0x8cdcbaee, (q31_t)0x37e66edd, (q31_t)0x8cd9fc54,
-  (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01, (q31_t)0x37db2099, (q31_t)0x8cd47ff6, (q31_t)0x37d57943, (q31_t)0x8cd1c231, (q31_t)0x37cfd1cb, (q31_t)0x8ccf04b3,
-  (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37c48273, (q31_t)0x8cc98a8e, (q31_t)0x37beda93, (q31_t)0x8cc6cde5, (q31_t)0x37b93292, (q31_t)0x8cc41184,
-  (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x37ade227, (q31_t)0x8cbe9996, (q31_t)0x37a839be, (q31_t)0x8cbbde0a, (q31_t)0x37a29132, (q31_t)0x8cb922c6,
-  (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37973fb5, (q31_t)0x8cb3ad11, (q31_t)0x379196c3, (q31_t)0x8cb0f2a1, (q31_t)0x378bedae, (q31_t)0x8cae3879,
-  (q31_t)0x37864477, (q31_t)0x8cab7e98, (q31_t)0x37809b1e, (q31_t)0x8ca8c4fd, (q31_t)0x377af1a3, (q31_t)0x8ca60baa, (q31_t)0x37754806, (q31_t)0x8ca3529f,
-  (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3769f464, (q31_t)0x8c9de15c, (q31_t)0x37644a60, (q31_t)0x8c9b2926, (q31_t)0x375ea03a, (q31_t)0x8c987137,
-  (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37534b87, (q31_t)0x8c93022e, (q31_t)0x374da0fa, (q31_t)0x8c904b14, (q31_t)0x3747f64c, (q31_t)0x8c8d9442,
-  (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x373ca088, (q31_t)0x8c882773, (q31_t)0x3736f573, (q31_t)0x8c857176, (q31_t)0x37314a3c, (q31_t)0x8c82bbc0,
-  (q31_t)0x372b9ee3, (q31_t)0x8c800652, (q31_t)0x3725f367, (q31_t)0x8c7d512b, (q31_t)0x372047ca, (q31_t)0x8c7a9c4b, (q31_t)0x371a9c0b, (q31_t)0x8c77e7b3,
-  (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x370f4427, (q31_t)0x8c727f58, (q31_t)0x37099802, (q31_t)0x8c6fcb95, (q31_t)0x3703ebbb, (q31_t)0x8c6d181a,
-  (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5, (q31_t)0x36f892c7, (q31_t)0x8c67b1f9, (q31_t)0x36f2e61a, (q31_t)0x8c64ff53, (q31_t)0x36ed394b, (q31_t)0x8c624cf5,
-  (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36e1df48, (q31_t)0x8c5ce90e, (q31_t)0x36dc3214, (q31_t)0x8c5a3786, (q31_t)0x36d684be, (q31_t)0x8c578645,
-  (q31_t)0x36d0d746, (q31_t)0x8c54d54c, (q31_t)0x36cb29ac, (q31_t)0x8c522499, (q31_t)0x36c57bf0, (q31_t)0x8c4f742f, (q31_t)0x36bfce13, (q31_t)0x8c4cc40b,
-  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36b471f3, (q31_t)0x8c47649a, (q31_t)0x36aec3b0, (q31_t)0x8c44b54d, (q31_t)0x36a9154c, (q31_t)0x8c420647,
-  (q31_t)0x36a366c6, (q31_t)0x8c3f5788, (q31_t)0x369db81e, (q31_t)0x8c3ca911, (q31_t)0x36980954, (q31_t)0x8c39fae1, (q31_t)0x36925a69, (q31_t)0x8c374cf9,
-  (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3686fc2e, (q31_t)0x8c31f1ff, (q31_t)0x36814cde, (q31_t)0x8c2f44ed, (q31_t)0x367b9d6c, (q31_t)0x8c2c9822,
-  (q31_t)0x3675edd9, (q31_t)0x8c29eb9f, (q31_t)0x36703e24, (q31_t)0x8c273f63, (q31_t)0x366a8e4d, (q31_t)0x8c24936f, (q31_t)0x3664de55, (q31_t)0x8c21e7c2,
-  (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36597e00, (q31_t)0x8c1c913f, (q31_t)0x3653cda3, (q31_t)0x8c19e669, (q31_t)0x364e1d25, (q31_t)0x8c173bda,
-  (q31_t)0x36486c86, (q31_t)0x8c149192, (q31_t)0x3642bbc4, (q31_t)0x8c11e792, (q31_t)0x363d0ae2, (q31_t)0x8c0f3dda, (q31_t)0x363759de, (q31_t)0x8c0c9469,
-  (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x362bf771, (q31_t)0x8c07425e, (q31_t)0x36264609, (q31_t)0x8c0499c4, (q31_t)0x3620947f, (q31_t)0x8c01f171,
-  (q31_t)0x361ae2d3, (q31_t)0x8bff4966, (q31_t)0x36153107, (q31_t)0x8bfca1a3, (q31_t)0x360f7f19, (q31_t)0x8bf9fa27, (q31_t)0x3609cd0a, (q31_t)0x8bf752f2,
-  (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35fe6887, (q31_t)0x8bf20560, (q31_t)0x35f8b614, (q31_t)0x8bef5f02, (q31_t)0x35f3037f, (q31_t)0x8becb8ec,
-  (q31_t)0x35ed50c9, (q31_t)0x8bea131e, (q31_t)0x35e79df2, (q31_t)0x8be76d97, (q31_t)0x35e1eafa, (q31_t)0x8be4c857, (q31_t)0x35dc37e0, (q31_t)0x8be22360,
-  (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35d0d14a, (q31_t)0x8bdcda47, (q31_t)0x35cb1dcc, (q31_t)0x8bda3626, (q31_t)0x35c56a2e, (q31_t)0x8bd7924d,
-  (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc, (q31_t)0x35ba028e, (q31_t)0x8bd24b72, (q31_t)0x35b44e8c, (q31_t)0x8bcfa870, (q31_t)0x35ae9a69, (q31_t)0x8bcd05b5,
-  (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x35a331c0, (q31_t)0x8bc7c117, (q31_t)0x359d7d39, (q31_t)0x8bc51f34, (q31_t)0x3597c892, (q31_t)0x8bc27d98,
-  (q31_t)0x359213c9, (q31_t)0x8bbfdc44, (q31_t)0x358c5ee0, (q31_t)0x8bbd3b38, (q31_t)0x3586a9d5, (q31_t)0x8bba9a73, (q31_t)0x3580f4aa, (q31_t)0x8bb7f9f6,
-  (q31_t)0x357b3f5d, (q31_t)0x8bb559c1, (q31_t)0x357589f0, (q31_t)0x8bb2b9d4, (q31_t)0x356fd461, (q31_t)0x8bb01a2e, (q31_t)0x356a1eb2, (q31_t)0x8bad7ad0,
-  (q31_t)0x356468e2, (q31_t)0x8baadbba, (q31_t)0x355eb2f0, (q31_t)0x8ba83cec, (q31_t)0x3558fcde, (q31_t)0x8ba59e65, (q31_t)0x355346ab, (q31_t)0x8ba30026,
-  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x3547d9e2, (q31_t)0x8b9dc480, (q31_t)0x3542234c, (q31_t)0x8b9b2718, (q31_t)0x353c6c95, (q31_t)0x8b9889f8,
-  (q31_t)0x3536b5be, (q31_t)0x8b95ed21, (q31_t)0x3530fec6, (q31_t)0x8b935090, (q31_t)0x352b47ad, (q31_t)0x8b90b448, (q31_t)0x35259073, (q31_t)0x8b8e1848,
-  (q31_t)0x351fd918, (q31_t)0x8b8b7c8f, (q31_t)0x351a219c, (q31_t)0x8b88e11e, (q31_t)0x35146a00, (q31_t)0x8b8645f5, (q31_t)0x350eb243, (q31_t)0x8b83ab14,
-  (q31_t)0x3508fa66, (q31_t)0x8b81107b, (q31_t)0x35034267, (q31_t)0x8b7e7629, (q31_t)0x34fd8a48, (q31_t)0x8b7bdc20, (q31_t)0x34f7d208, (q31_t)0x8b79425e,
-  (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34ec6127, (q31_t)0x8b740fb3, (q31_t)0x34e6a885, (q31_t)0x8b7176c8, (q31_t)0x34e0efc2, (q31_t)0x8b6ede26,
-  (q31_t)0x34db36df, (q31_t)0x8b6c45cc, (q31_t)0x34d57ddc, (q31_t)0x8b69adba, (q31_t)0x34cfc4b7, (q31_t)0x8b6715ef, (q31_t)0x34ca0b73, (q31_t)0x8b647e6d,
-  (q31_t)0x34c4520d, (q31_t)0x8b61e733, (q31_t)0x34be9887, (q31_t)0x8b5f5040, (q31_t)0x34b8dee1, (q31_t)0x8b5cb995, (q31_t)0x34b3251a, (q31_t)0x8b5a2333,
-  (q31_t)0x34ad6b32, (q31_t)0x8b578d18, (q31_t)0x34a7b12a, (q31_t)0x8b54f745, (q31_t)0x34a1f702, (q31_t)0x8b5261ba, (q31_t)0x349c3cb9, (q31_t)0x8b4fcc77,
-  (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x3490c7c6, (q31_t)0x8b4aa2ca, (q31_t)0x348b0d1c, (q31_t)0x8b480e5f, (q31_t)0x34855251, (q31_t)0x8b457a3c,
-  (q31_t)0x347f9766, (q31_t)0x8b42e661, (q31_t)0x3479dc5b, (q31_t)0x8b4052ce, (q31_t)0x3474212f, (q31_t)0x8b3dbf83, (q31_t)0x346e65e3, (q31_t)0x8b3b2c80,
-  (q31_t)0x3468aa76, (q31_t)0x8b3899c6, (q31_t)0x3462eee9, (q31_t)0x8b360753, (q31_t)0x345d333c, (q31_t)0x8b337528, (q31_t)0x3457776f, (q31_t)0x8b30e345,
-  (q31_t)0x3451bb81, (q31_t)0x8b2e51ab, (q31_t)0x344bff73, (q31_t)0x8b2bc058, (q31_t)0x34464345, (q31_t)0x8b292f4e, (q31_t)0x344086f6, (q31_t)0x8b269e8b,
-  (q31_t)0x343aca87, (q31_t)0x8b240e11, (q31_t)0x34350df8, (q31_t)0x8b217ddf, (q31_t)0x342f5149, (q31_t)0x8b1eedf4, (q31_t)0x3429947a, (q31_t)0x8b1c5e52,
-  (q31_t)0x3423d78a, (q31_t)0x8b19cef8, (q31_t)0x341e1a7b, (q31_t)0x8b173fe6, (q31_t)0x34185d4b, (q31_t)0x8b14b11d, (q31_t)0x34129ffb, (q31_t)0x8b12229b,
-  (q31_t)0x340ce28b, (q31_t)0x8b0f9462, (q31_t)0x340724fb, (q31_t)0x8b0d0670, (q31_t)0x3401674a, (q31_t)0x8b0a78c7, (q31_t)0x33fba97a, (q31_t)0x8b07eb66,
-  (q31_t)0x33f5eb89, (q31_t)0x8b055e4d, (q31_t)0x33f02d79, (q31_t)0x8b02d17c, (q31_t)0x33ea6f48, (q31_t)0x8b0044f3, (q31_t)0x33e4b0f8, (q31_t)0x8afdb8b3,
-  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x33d933f7, (q31_t)0x8af8a10b, (q31_t)0x33d37546, (q31_t)0x8af615a3, (q31_t)0x33cdb676, (q31_t)0x8af38a83,
-  (q31_t)0x33c7f785, (q31_t)0x8af0ffac, (q31_t)0x33c23875, (q31_t)0x8aee751c, (q31_t)0x33bc7944, (q31_t)0x8aebead5, (q31_t)0x33b6b9f4, (q31_t)0x8ae960d6,
-  (q31_t)0x33b0fa84, (q31_t)0x8ae6d720, (q31_t)0x33ab3af4, (q31_t)0x8ae44db1, (q31_t)0x33a57b44, (q31_t)0x8ae1c48b, (q31_t)0x339fbb74, (q31_t)0x8adf3bad,
-  (q31_t)0x3399fb85, (q31_t)0x8adcb318, (q31_t)0x33943b75, (q31_t)0x8ada2aca, (q31_t)0x338e7b46, (q31_t)0x8ad7a2c5, (q31_t)0x3388baf7, (q31_t)0x8ad51b08,
-  (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x337d39f9, (q31_t)0x8ad00c67, (q31_t)0x3377794b, (q31_t)0x8acd8583, (q31_t)0x3371b87d, (q31_t)0x8acafee8,
-  (q31_t)0x336bf78f, (q31_t)0x8ac87894, (q31_t)0x33663682, (q31_t)0x8ac5f289, (q31_t)0x33607554, (q31_t)0x8ac36cc6, (q31_t)0x335ab407, (q31_t)0x8ac0e74c,
-  (q31_t)0x3354f29b, (q31_t)0x8abe6219, (q31_t)0x334f310e, (q31_t)0x8abbdd30, (q31_t)0x33496f62, (q31_t)0x8ab9588e, (q31_t)0x3343ad97, (q31_t)0x8ab6d435,
-  (q31_t)0x333debab, (q31_t)0x8ab45024, (q31_t)0x333829a1, (q31_t)0x8ab1cc5c, (q31_t)0x33326776, (q31_t)0x8aaf48db, (q31_t)0x332ca52c, (q31_t)0x8aacc5a4,
-  (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x33212039, (q31_t)0x8aa7c00d, (q31_t)0x331b5d91, (q31_t)0x8aa53daf, (q31_t)0x33159ac8, (q31_t)0x8aa2bb99,
-  (q31_t)0x330fd7e1, (q31_t)0x8aa039cb, (q31_t)0x330a14da, (q31_t)0x8a9db845, (q31_t)0x330451b3, (q31_t)0x8a9b3708, (q31_t)0x32fe8e6d, (q31_t)0x8a98b614,
-  (q31_t)0x32f8cb07, (q31_t)0x8a963567, (q31_t)0x32f30782, (q31_t)0x8a93b504, (q31_t)0x32ed43de, (q31_t)0x8a9134e8, (q31_t)0x32e7801a, (q31_t)0x8a8eb516,
-  (q31_t)0x32e1bc36, (q31_t)0x8a8c358b, (q31_t)0x32dbf834, (q31_t)0x8a89b649, (q31_t)0x32d63412, (q31_t)0x8a873750, (q31_t)0x32d06fd0, (q31_t)0x8a84b89e,
-  (q31_t)0x32caab6f, (q31_t)0x8a823a36, (q31_t)0x32c4e6ef, (q31_t)0x8a7fbc16, (q31_t)0x32bf2250, (q31_t)0x8a7d3e3e, (q31_t)0x32b95d91, (q31_t)0x8a7ac0af,
-  (q31_t)0x32b398b3, (q31_t)0x8a784368, (q31_t)0x32add3b6, (q31_t)0x8a75c66a, (q31_t)0x32a80e99, (q31_t)0x8a7349b4, (q31_t)0x32a2495d, (q31_t)0x8a70cd47,
-  (q31_t)0x329c8402, (q31_t)0x8a6e5123, (q31_t)0x3296be88, (q31_t)0x8a6bd547, (q31_t)0x3290f8ef, (q31_t)0x8a6959b3, (q31_t)0x328b3336, (q31_t)0x8a66de68,
-  (q31_t)0x32856d5e, (q31_t)0x8a646365, (q31_t)0x327fa767, (q31_t)0x8a61e8ab, (q31_t)0x3279e151, (q31_t)0x8a5f6e3a, (q31_t)0x32741b1c, (q31_t)0x8a5cf411,
-  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x32688e54, (q31_t)0x8a580099, (q31_t)0x3262c7c1, (q31_t)0x8a55874a, (q31_t)0x325d0110, (q31_t)0x8a530e43,
-  (q31_t)0x32573a3f, (q31_t)0x8a509585, (q31_t)0x3251734f, (q31_t)0x8a4e1d10, (q31_t)0x324bac40, (q31_t)0x8a4ba4e3, (q31_t)0x3245e512, (q31_t)0x8a492cff,
-  (q31_t)0x32401dc6, (q31_t)0x8a46b564, (q31_t)0x323a565a, (q31_t)0x8a443e11, (q31_t)0x32348ecf, (q31_t)0x8a41c706, (q31_t)0x322ec725, (q31_t)0x8a3f5045,
-  (q31_t)0x3228ff5c, (q31_t)0x8a3cd9cc, (q31_t)0x32233775, (q31_t)0x8a3a639b, (q31_t)0x321d6f6e, (q31_t)0x8a37edb3, (q31_t)0x3217a748, (q31_t)0x8a357814,
-  (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x320c16a1, (q31_t)0x8a308db0, (q31_t)0x32064e1e, (q31_t)0x8a2e18eb, (q31_t)0x3200857d, (q31_t)0x8a2ba46e,
-  (q31_t)0x31fabcbd, (q31_t)0x8a29303b, (q31_t)0x31f4f3df, (q31_t)0x8a26bc50, (q31_t)0x31ef2ae1, (q31_t)0x8a2448ad, (q31_t)0x31e961c5, (q31_t)0x8a21d554,
-  (q31_t)0x31e39889, (q31_t)0x8a1f6243, (q31_t)0x31ddcf30, (q31_t)0x8a1cef7a, (q31_t)0x31d805b7, (q31_t)0x8a1a7cfb, (q31_t)0x31d23c1f, (q31_t)0x8a180ac4,
-  (q31_t)0x31cc7269, (q31_t)0x8a1598d6, (q31_t)0x31c6a894, (q31_t)0x8a132731, (q31_t)0x31c0dea1, (q31_t)0x8a10b5d4, (q31_t)0x31bb148f, (q31_t)0x8a0e44c0,
-  (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x31af800e, (q31_t)0x8a096373, (q31_t)0x31a9b5a0, (q31_t)0x8a06f339, (q31_t)0x31a3eb13, (q31_t)0x8a048348,
-  (q31_t)0x319e2067, (q31_t)0x8a0213a0, (q31_t)0x3198559d, (q31_t)0x89ffa441, (q31_t)0x31928ab4, (q31_t)0x89fd352b, (q31_t)0x318cbfad, (q31_t)0x89fac65d,
-  (q31_t)0x3186f487, (q31_t)0x89f857d8, (q31_t)0x31812943, (q31_t)0x89f5e99c, (q31_t)0x317b5de0, (q31_t)0x89f37ba9, (q31_t)0x3175925e, (q31_t)0x89f10dff,
-  (q31_t)0x316fc6be, (q31_t)0x89eea09d, (q31_t)0x3169fb00, (q31_t)0x89ec3384, (q31_t)0x31642f23, (q31_t)0x89e9c6b4, (q31_t)0x315e6328, (q31_t)0x89e75a2d,
-  (q31_t)0x3158970e, (q31_t)0x89e4edef, (q31_t)0x3152cad5, (q31_t)0x89e281fa, (q31_t)0x314cfe7f, (q31_t)0x89e0164d, (q31_t)0x31473209, (q31_t)0x89ddaae9,
-  (q31_t)0x31416576, (q31_t)0x89db3fcf, (q31_t)0x313b98c4, (q31_t)0x89d8d4fd, (q31_t)0x3135cbf4, (q31_t)0x89d66a74, (q31_t)0x312fff05, (q31_t)0x89d40033,
-  (q31_t)0x312a31f8, (q31_t)0x89d1963c, (q31_t)0x312464cd, (q31_t)0x89cf2c8e, (q31_t)0x311e9783, (q31_t)0x89ccc328, (q31_t)0x3118ca1b, (q31_t)0x89ca5a0c,
-  (q31_t)0x3112fc95, (q31_t)0x89c7f138, (q31_t)0x310d2ef0, (q31_t)0x89c588ae, (q31_t)0x3107612e, (q31_t)0x89c3206c, (q31_t)0x3101934d, (q31_t)0x89c0b873,
-  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30f5f730, (q31_t)0x89bbe95c, (q31_t)0x30f028f4, (q31_t)0x89b9823e, (q31_t)0x30ea5a9a, (q31_t)0x89b71b69,
-  (q31_t)0x30e48c22, (q31_t)0x89b4b4dd, (q31_t)0x30debd8c, (q31_t)0x89b24e9a, (q31_t)0x30d8eed8, (q31_t)0x89afe8a0, (q31_t)0x30d32006, (q31_t)0x89ad82ef,
-  (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30c78206, (q31_t)0x89a8b868, (q31_t)0x30c1b2da, (q31_t)0x89a65391, (q31_t)0x30bbe38f, (q31_t)0x89a3ef04,
-  (q31_t)0x30b61426, (q31_t)0x89a18ac0, (q31_t)0x30b0449f, (q31_t)0x899f26c5, (q31_t)0x30aa74fa, (q31_t)0x899cc313, (q31_t)0x30a4a537, (q31_t)0x899a5faa,
-  (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x30990557, (q31_t)0x899599b3, (q31_t)0x3093353a, (q31_t)0x89933725, (q31_t)0x308d64ff, (q31_t)0x8990d4e0,
-  (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x3081c42f, (q31_t)0x898c1131, (q31_t)0x307bf39b, (q31_t)0x8989afc8, (q31_t)0x307622e8, (q31_t)0x89874ea7,
-  (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x306a8129, (q31_t)0x89828d41, (q31_t)0x3064b01d, (q31_t)0x89802cfc, (q31_t)0x305edef3, (q31_t)0x897dccff,
-  (q31_t)0x30590dab, (q31_t)0x897b6d4c, (q31_t)0x30533c45, (q31_t)0x89790de2, (q31_t)0x304d6ac1, (q31_t)0x8976aec1, (q31_t)0x30479920, (q31_t)0x89744fe9,
-  (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x303bf584, (q31_t)0x896f9315, (q31_t)0x30362389, (q31_t)0x896d3518, (q31_t)0x30305171, (q31_t)0x896ad765,
-  (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x3024ace6, (q31_t)0x89661cda, (q31_t)0x301eda75, (q31_t)0x8963c002, (q31_t)0x301907e6, (q31_t)0x89616373,
-  (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x300d626e, (q31_t)0x895cab31, (q31_t)0x30078f86, (q31_t)0x895a4f7e, (q31_t)0x3001bc80, (q31_t)0x8957f414,
-  (q31_t)0x2ffbe95d, (q31_t)0x895598f3, (q31_t)0x2ff6161c, (q31_t)0x89533e1c, (q31_t)0x2ff042bd, (q31_t)0x8950e38e, (q31_t)0x2fea6f41, (q31_t)0x894e8948,
-  (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fdec7f0, (q31_t)0x8949d59a, (q31_t)0x2fd8f41b, (q31_t)0x89477c30, (q31_t)0x2fd32028, (q31_t)0x89452310,
-  (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fc777eb, (q31_t)0x894071ab, (q31_t)0x2fc1a3a0, (q31_t)0x893e1967, (q31_t)0x2fbbcf38, (q31_t)0x893bc16b,
-  (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2fb0260f, (q31_t)0x89371250, (q31_t)0x2faa514f, (q31_t)0x8934bb31, (q31_t)0x2fa47c71, (q31_t)0x8932645b,
-  (q31_t)0x2f9ea775, (q31_t)0x89300dce, (q31_t)0x2f98d25d, (q31_t)0x892db78a, (q31_t)0x2f92fd26, (q31_t)0x892b6190, (q31_t)0x2f8d27d3, (q31_t)0x89290bdf,
-  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f817cd4, (q31_t)0x89246159, (q31_t)0x2f7ba729, (q31_t)0x89220c84, (q31_t)0x2f75d160, (q31_t)0x891fb7f8,
-  (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f6a2577, (q31_t)0x891b0fbc, (q31_t)0x2f644f56, (q31_t)0x8918bc0c, (q31_t)0x2f5e7919, (q31_t)0x891668a6,
-  (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f52cc46, (q31_t)0x8911c2b5, (q31_t)0x2f4cf5b0, (q31_t)0x890f702b, (q31_t)0x2f471efe, (q31_t)0x890d1dea,
-  (q31_t)0x2f41482e, (q31_t)0x890acbf2, (q31_t)0x2f3b7141, (q31_t)0x89087a44, (q31_t)0x2f359a37, (q31_t)0x890628df, (q31_t)0x2f2fc310, (q31_t)0x8903d7c4,
-  (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f24146b, (q31_t)0x88ff3669, (q31_t)0x2f1e3ced, (q31_t)0x88fce62a, (q31_t)0x2f186551, (q31_t)0x88fa9634,
-  (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2f0cb5c3, (q31_t)0x88f5f724, (q31_t)0x2f06ddd1, (q31_t)0x88f3a80b, (q31_t)0x2f0105c1, (q31_t)0x88f1593b,
-  (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ef5554b, (q31_t)0x88ecbc77, (q31_t)0x2eef7ce5, (q31_t)0x88ea6e83, (q31_t)0x2ee9a461, (q31_t)0x88e820d9,
-  (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378, (q31_t)0x2eddf304, (q31_t)0x88e38660, (q31_t)0x2ed81a29, (q31_t)0x88e13992, (q31_t)0x2ed24132, (q31_t)0x88deed0e,
-  (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2ec68eed, (q31_t)0x88da54e1, (q31_t)0x2ec0b5a0, (q31_t)0x88d8093a, (q31_t)0x2ebadc35, (q31_t)0x88d5bddb,
-  (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2eaf290a, (q31_t)0x88d127fb, (q31_t)0x2ea94f49, (q31_t)0x88cedd79, (q31_t)0x2ea3756b, (q31_t)0x88cc9340,
-  (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e97c159, (q31_t)0x88c7ffac, (q31_t)0x2e91e725, (q31_t)0x88c5b650, (q31_t)0x2e8c0cd4, (q31_t)0x88c36d3e,
-  (q31_t)0x2e863267, (q31_t)0x88c12475, (q31_t)0x2e8057dd, (q31_t)0x88bedbf6, (q31_t)0x2e7a7d36, (q31_t)0x88bc93c0, (q31_t)0x2e74a272, (q31_t)0x88ba4bd4,
-  (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e68ec95, (q31_t)0x88b5bcd9, (q31_t)0x2e63117c, (q31_t)0x88b375ca, (q31_t)0x2e5d3646, (q31_t)0x88b12f04,
-  (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e517f84, (q31_t)0x88aca255, (q31_t)0x2e4ba3f8, (q31_t)0x88aa5c6c, (q31_t)0x2e45c850, (q31_t)0x88a816cd,
-  (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e3a10aa, (q31_t)0x88a38c6b, (q31_t)0x2e3434ac, (q31_t)0x88a147a9, (q31_t)0x2e2e5891, (q31_t)0x889f0330,
-  (q31_t)0x2e287c5a, (q31_t)0x889cbf01, (q31_t)0x2e22a007, (q31_t)0x889a7b1b, (q31_t)0x2e1cc397, (q31_t)0x88983780, (q31_t)0x2e16e70b, (q31_t)0x8895f42d,
-  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2e0b2d9d, (q31_t)0x88916e66, (q31_t)0x2e0550bb, (q31_t)0x888f2bf1, (q31_t)0x2dff73bd, (q31_t)0x888ce9c5,
-  (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2df3b96c, (q31_t)0x8888664b, (q31_t)0x2deddc19, (q31_t)0x888624fd, (q31_t)0x2de7feaa, (q31_t)0x8883e3f8,
-  (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2ddc4376, (q31_t)0x887f62cb, (q31_t)0x2dd665b2, (q31_t)0x887d22a4, (q31_t)0x2dd087d1, (q31_t)0x887ae2c6,
-  (q31_t)0x2dcaa9d5, (q31_t)0x8878a332, (q31_t)0x2dc4cbbc, (q31_t)0x887663e7, (q31_t)0x2dbeed86, (q31_t)0x887424e7, (q31_t)0x2db90f35, (q31_t)0x8871e630,
-  (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2dad523d, (q31_t)0x886d699f, (q31_t)0x2da77397, (q31_t)0x886b2bc5, (q31_t)0x2da194d5, (q31_t)0x8868ee35,
-  (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d95d6fc, (q31_t)0x886473f2, (q31_t)0x2d8ff7e5, (q31_t)0x88623740, (q31_t)0x2d8a18b3, (q31_t)0x885ffad7,
-  (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d7e59f9, (q31_t)0x885b82e3, (q31_t)0x2d787a72, (q31_t)0x88594757, (q31_t)0x2d729acf, (q31_t)0x88570c16,
-  (q31_t)0x2d6cbb10, (q31_t)0x8854d11e, (q31_t)0x2d66db35, (q31_t)0x88529670, (q31_t)0x2d60fb3e, (q31_t)0x88505c0b, (q31_t)0x2d5b1b2b, (q31_t)0x884e21f1,
-  (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d4f5ab1, (q31_t)0x8849ae9a, (q31_t)0x2d497a4a, (q31_t)0x8847755d, (q31_t)0x2d4399c7, (q31_t)0x88453c6a,
-  (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d37d86d, (q31_t)0x8840cb61, (q31_t)0x2d31f797, (q31_t)0x883e934c, (q31_t)0x2d2c16a4, (q31_t)0x883c5b81,
-  (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d20546b, (q31_t)0x8837ecc7, (q31_t)0x2d1a7325, (q31_t)0x8835b5d9, (q31_t)0x2d1491c4, (q31_t)0x88337f35,
-  (q31_t)0x2d0eb046, (q31_t)0x883148db, (q31_t)0x2d08ceac, (q31_t)0x882f12cb, (q31_t)0x2d02ecf7, (q31_t)0x882cdd04, (q31_t)0x2cfd0b26, (q31_t)0x882aa788,
-  (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cf14731, (q31_t)0x88263d6d, (q31_t)0x2ceb650d, (q31_t)0x882408ce, (q31_t)0x2ce582cd, (q31_t)0x8821d47a,
-  (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cd9bdfa, (q31_t)0x881d6cae, (q31_t)0x2cd3db67, (q31_t)0x881b3937, (q31_t)0x2ccdf8b8, (q31_t)0x8819060a,
-  (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cc23308, (q31_t)0x8814a08f, (q31_t)0x2cbc5006, (q31_t)0x88126e40, (q31_t)0x2cb66ce9, (q31_t)0x88103c3b,
-  (q31_t)0x2cb089b1, (q31_t)0x880e0a7f, (q31_t)0x2caaa65c, (q31_t)0x880bd90e, (q31_t)0x2ca4c2ed, (q31_t)0x8809a7e7, (q31_t)0x2c9edf61, (q31_t)0x8807770a,
-  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c9317f8, (q31_t)0x8803162e, (q31_t)0x2c8d341a, (q31_t)0x8800e62f, (q31_t)0x2c875021, (q31_t)0x87feb67a,
-  (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c7b87dc, (q31_t)0x87fa57ee, (q31_t)0x2c75a390, (q31_t)0x87f82917, (q31_t)0x2c6fbf29, (q31_t)0x87f5fa8b,
-  (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c63f609, (q31_t)0x87f19e4f, (q31_t)0x2c5e114f, (q31_t)0x87ef70a0, (q31_t)0x2c582c7b, (q31_t)0x87ed433c,
-  (q31_t)0x2c52478a, (q31_t)0x87eb1621, (q31_t)0x2c4c627f, (q31_t)0x87e8e950, (q31_t)0x2c467d58, (q31_t)0x87e6bcca, (q31_t)0x2c409816, (q31_t)0x87e4908e,
-  (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c34cd40, (q31_t)0x87e038f3, (q31_t)0x2c2ee7ad, (q31_t)0x87de0d95, (q31_t)0x2c2901fd, (q31_t)0x87dbe281,
-  (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c1d364e, (q31_t)0x87d78d38, (q31_t)0x2c17504d, (q31_t)0x87d56302, (q31_t)0x2c116a31, (q31_t)0x87d33916,
-  (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2c059da7, (q31_t)0x87cee61e, (q31_t)0x2bffb73a, (q31_t)0x87ccbd11, (q31_t)0x2bf9d0b1, (q31_t)0x87ca944e,
-  (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5, (q31_t)0x2bee034e, (q31_t)0x87c643a6, (q31_t)0x2be81c74, (q31_t)0x87c41bc2, (q31_t)0x2be2357f, (q31_t)0x87c1f427,
-  (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bd66744, (q31_t)0x87bda5d1, (q31_t)0x2bd07ffe, (q31_t)0x87bb7f16, (q31_t)0x2bca989d, (q31_t)0x87b958a4,
-  (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bbec989, (q31_t)0x87b50c9f, (q31_t)0x2bb8e1d7, (q31_t)0x87b2e70c, (q31_t)0x2bb2fa0a, (q31_t)0x87b0c1c4,
-  (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2ba72a1e, (q31_t)0x87ac7811, (q31_t)0x2ba14200, (q31_t)0x87aa53a6, (q31_t)0x2b9b59c7, (q31_t)0x87a82f87,
-  (q31_t)0x2b957173, (q31_t)0x87a60bb1, (q31_t)0x2b8f8905, (q31_t)0x87a3e825, (q31_t)0x2b89a07b, (q31_t)0x87a1c4e4, (q31_t)0x2b83b7d7, (q31_t)0x879fa1ed,
-  (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b77e63d, (q31_t)0x879b5cde, (q31_t)0x2b71fd48, (q31_t)0x87993ac6, (q31_t)0x2b6c1438, (q31_t)0x879718f8,
-  (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b6041c9, (q31_t)0x8792d63b, (q31_t)0x2b5a5868, (q31_t)0x8790b54c, (q31_t)0x2b546eee, (q31_t)0x878e94a7,
-  (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b489ba8, (q31_t)0x878a543d, (q31_t)0x2b42b1dd, (q31_t)0x87883477, (q31_t)0x2b3cc7f7, (q31_t)0x878614fb,
-  (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca, (q31_t)0x2b30f3dc, (q31_t)0x8781d6e3, (q31_t)0x2b2b09a6, (q31_t)0x877fb846, (q31_t)0x2b251f56, (q31_t)0x877d99f4,
-  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b194a66, (q31_t)0x87795e2f, (q31_t)0x2b135fc6, (q31_t)0x877740bb, (q31_t)0x2b0d750b, (q31_t)0x87752392,
-  (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2b019f46, (q31_t)0x8770ea20, (q31_t)0x2afbb43c, (q31_t)0x876ecdd6, (q31_t)0x2af5c917, (q31_t)0x876cb1d6,
-  (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ae9f27e, (q31_t)0x87687ab7, (q31_t)0x2ae4070a, (q31_t)0x87665f96, (q31_t)0x2ade1b7c, (q31_t)0x876444c1,
-  (q31_t)0x2ad82fd2, (q31_t)0x87622a35, (q31_t)0x2ad2440f, (q31_t)0x87600ff4, (q31_t)0x2acc5831, (q31_t)0x875df5fd, (q31_t)0x2ac66c39, (q31_t)0x875bdc51,
-  (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aba93f9, (q31_t)0x8757a9d8, (q31_t)0x2ab4a7b1, (q31_t)0x8755910b, (q31_t)0x2aaebb50, (q31_t)0x87537888,
-  (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2aa2e23d, (q31_t)0x874f4862, (q31_t)0x2a9cf58c, (q31_t)0x874d30bf, (q31_t)0x2a9708c1, (q31_t)0x874b1966,
-  (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a8b2edc, (q31_t)0x8746eb94, (q31_t)0x2a8541c3, (q31_t)0x8744d51b, (q31_t)0x2a7f548e, (q31_t)0x8742beec,
-  (q31_t)0x2a796740, (q31_t)0x8740a907, (q31_t)0x2a7379d8, (q31_t)0x873e936d, (q31_t)0x2a6d8c55, (q31_t)0x873c7e1e, (q31_t)0x2a679eb8, (q31_t)0x873a6919,
-  (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a5bc330, (q31_t)0x87363fee, (q31_t)0x2a55d545, (q31_t)0x87342bc9, (q31_t)0x2a4fe740, (q31_t)0x873217ee,
-  (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a440ae7, (q31_t)0x872df117, (q31_t)0x2a3e1c93, (q31_t)0x872bde1c, (q31_t)0x2a382e25, (q31_t)0x8729cb6b,
-  (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a2c50fc, (q31_t)0x8725a6e9, (q31_t)0x2a266240, (q31_t)0x87239518, (q31_t)0x2a20736a, (q31_t)0x87218391,
-  (q31_t)0x2a1a847b, (q31_t)0x871f7255, (q31_t)0x2a149571, (q31_t)0x871d6163, (q31_t)0x2a0ea64d, (q31_t)0x871b50bc, (q31_t)0x2a08b710, (q31_t)0x87194060,
-  (q31_t)0x2a02c7b8, (q31_t)0x8717304e, (q31_t)0x29fcd847, (q31_t)0x87152087, (q31_t)0x29f6e8bb, (q31_t)0x8713110a, (q31_t)0x29f0f916, (q31_t)0x871101d8,
-  (q31_t)0x29eb0957, (q31_t)0x870ef2f1, (q31_t)0x29e5197e, (q31_t)0x870ce454, (q31_t)0x29df298b, (q31_t)0x870ad602, (q31_t)0x29d9397f, (q31_t)0x8708c7fa,
-  (q31_t)0x29d34958, (q31_t)0x8706ba3d, (q31_t)0x29cd5918, (q31_t)0x8704acca, (q31_t)0x29c768be, (q31_t)0x87029fa3, (q31_t)0x29c1784a, (q31_t)0x870092c5,
-  (q31_t)0x29bb87bc, (q31_t)0x86fe8633, (q31_t)0x29b59715, (q31_t)0x86fc79eb, (q31_t)0x29afa654, (q31_t)0x86fa6dee, (q31_t)0x29a9b579, (q31_t)0x86f8623b,
-  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x299dd377, (q31_t)0x86f44bb6, (q31_t)0x2997e24f, (q31_t)0x86f240e3, (q31_t)0x2991f10e, (q31_t)0x86f0365c,
-  (q31_t)0x298bffb2, (q31_t)0x86ee2c1e, (q31_t)0x29860e3e, (q31_t)0x86ec222c, (q31_t)0x29801caf, (q31_t)0x86ea1884, (q31_t)0x297a2b07, (q31_t)0x86e80f27,
-  (q31_t)0x29743946, (q31_t)0x86e60614, (q31_t)0x296e476b, (q31_t)0x86e3fd4c, (q31_t)0x29685576, (q31_t)0x86e1f4cf, (q31_t)0x29626368, (q31_t)0x86dfec9d,
-  (q31_t)0x295c7140, (q31_t)0x86dde4b5, (q31_t)0x29567eff, (q31_t)0x86dbdd18, (q31_t)0x29508ca4, (q31_t)0x86d9d5c6, (q31_t)0x294a9a30, (q31_t)0x86d7cebf,
-  (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x293eb4fb, (q31_t)0x86d3c190, (q31_t)0x2938c23a, (q31_t)0x86d1bb69, (q31_t)0x2932cf60, (q31_t)0x86cfb58c,
-  (q31_t)0x292cdc6d, (q31_t)0x86cdaffa, (q31_t)0x2926e960, (q31_t)0x86cbaab3, (q31_t)0x2920f63a, (q31_t)0x86c9a5b7, (q31_t)0x291b02fa, (q31_t)0x86c7a106,
-  (q31_t)0x29150fa1, (q31_t)0x86c59c9f, (q31_t)0x290f1c2f, (q31_t)0x86c39883, (q31_t)0x290928a3, (q31_t)0x86c194b2, (q31_t)0x290334ff, (q31_t)0x86bf912c,
-  (q31_t)0x28fd4140, (q31_t)0x86bd8df0, (q31_t)0x28f74d69, (q31_t)0x86bb8b00, (q31_t)0x28f15978, (q31_t)0x86b9885a, (q31_t)0x28eb656e, (q31_t)0x86b785ff,
-  (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x28df7d0e, (q31_t)0x86b38229, (q31_t)0x28d988b8, (q31_t)0x86b180ae, (q31_t)0x28d3944a, (q31_t)0x86af7f7e,
-  (q31_t)0x28cd9fc1, (q31_t)0x86ad7e99, (q31_t)0x28c7ab20, (q31_t)0x86ab7dff, (q31_t)0x28c1b666, (q31_t)0x86a97db0, (q31_t)0x28bbc192, (q31_t)0x86a77dab,
-  (q31_t)0x28b5cca5, (q31_t)0x86a57df2, (q31_t)0x28afd7a0, (q31_t)0x86a37e83, (q31_t)0x28a9e281, (q31_t)0x86a17f5f, (q31_t)0x28a3ed49, (q31_t)0x869f8086,
-  (q31_t)0x289df7f8, (q31_t)0x869d81f8, (q31_t)0x2898028e, (q31_t)0x869b83b4, (q31_t)0x28920d0a, (q31_t)0x869985bc, (q31_t)0x288c176e, (q31_t)0x8697880f,
-  (q31_t)0x288621b9, (q31_t)0x86958aac, (q31_t)0x28802beb, (q31_t)0x86938d94, (q31_t)0x287a3604, (q31_t)0x869190c7, (q31_t)0x28744004, (q31_t)0x868f9445,
-  (q31_t)0x286e49ea, (q31_t)0x868d980e, (q31_t)0x286853b8, (q31_t)0x868b9c22, (q31_t)0x28625d6d, (q31_t)0x8689a081, (q31_t)0x285c670a, (q31_t)0x8687a52b,
-  (q31_t)0x2856708d, (q31_t)0x8685aa20, (q31_t)0x285079f7, (q31_t)0x8683af5f, (q31_t)0x284a8349, (q31_t)0x8681b4ea, (q31_t)0x28448c81, (q31_t)0x867fbabf,
-  (q31_t)0x283e95a1, (q31_t)0x867dc0e0, (q31_t)0x28389ea8, (q31_t)0x867bc74b, (q31_t)0x2832a796, (q31_t)0x8679ce01, (q31_t)0x282cb06c, (q31_t)0x8677d503,
-  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x2820c1cc, (q31_t)0x8673e3e6, (q31_t)0x281aca57, (q31_t)0x8671ebc8, (q31_t)0x2814d2c9, (q31_t)0x866ff3f6,
-  (q31_t)0x280edb23, (q31_t)0x866dfc6e, (q31_t)0x2808e364, (q31_t)0x866c0531, (q31_t)0x2802eb8c, (q31_t)0x866a0e3f, (q31_t)0x27fcf39c, (q31_t)0x86681798,
-  (q31_t)0x27f6fb92, (q31_t)0x8666213c, (q31_t)0x27f10371, (q31_t)0x86642b2c, (q31_t)0x27eb0b36, (q31_t)0x86623566, (q31_t)0x27e512e3, (q31_t)0x86603feb,
-  (q31_t)0x27df1a77, (q31_t)0x865e4abb, (q31_t)0x27d921f3, (q31_t)0x865c55d7, (q31_t)0x27d32956, (q31_t)0x865a613d, (q31_t)0x27cd30a1, (q31_t)0x86586cee,
-  (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27c13eec, (q31_t)0x86548532, (q31_t)0x27bb45ed, (q31_t)0x865291c4, (q31_t)0x27b54cd6, (q31_t)0x86509ea2,
-  (q31_t)0x27af53a6, (q31_t)0x864eabcb, (q31_t)0x27a95a5d, (q31_t)0x864cb93e, (q31_t)0x27a360fc, (q31_t)0x864ac6fd, (q31_t)0x279d6783, (q31_t)0x8648d507,
-  (q31_t)0x27976df1, (q31_t)0x8646e35c, (q31_t)0x27917447, (q31_t)0x8644f1fc, (q31_t)0x278b7a84, (q31_t)0x864300e7, (q31_t)0x278580a9, (q31_t)0x8641101d,
-  (q31_t)0x277f86b5, (q31_t)0x863f1f9e, (q31_t)0x27798caa, (q31_t)0x863d2f6b, (q31_t)0x27739285, (q31_t)0x863b3f82, (q31_t)0x276d9849, (q31_t)0x86394fe5,
-  (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2761a387, (q31_t)0x8635718b, (q31_t)0x275ba901, (q31_t)0x863382cf, (q31_t)0x2755ae64, (q31_t)0x8631945e,
-  (q31_t)0x274fb3ae, (q31_t)0x862fa638, (q31_t)0x2749b8e0, (q31_t)0x862db85e, (q31_t)0x2743bdf9, (q31_t)0x862bcace, (q31_t)0x273dc2fa, (q31_t)0x8629dd8a,
-  (q31_t)0x2737c7e3, (q31_t)0x8627f091, (q31_t)0x2731ccb4, (q31_t)0x862603e3, (q31_t)0x272bd16d, (q31_t)0x86241780, (q31_t)0x2725d60e, (q31_t)0x86222b68,
-  (q31_t)0x271fda96, (q31_t)0x86203f9c, (q31_t)0x2719df06, (q31_t)0x861e541a, (q31_t)0x2713e35f, (q31_t)0x861c68e4, (q31_t)0x270de79f, (q31_t)0x861a7df9,
-  (q31_t)0x2707ebc7, (q31_t)0x86189359, (q31_t)0x2701efd7, (q31_t)0x8616a905, (q31_t)0x26fbf3ce, (q31_t)0x8614befb, (q31_t)0x26f5f7ae, (q31_t)0x8612d53d,
-  (q31_t)0x26effb76, (q31_t)0x8610ebca, (q31_t)0x26e9ff26, (q31_t)0x860f02a3, (q31_t)0x26e402bd, (q31_t)0x860d19c6, (q31_t)0x26de063d, (q31_t)0x860b3135,
-  (q31_t)0x26d809a5, (q31_t)0x860948ef, (q31_t)0x26d20cf5, (q31_t)0x860760f4, (q31_t)0x26cc102d, (q31_t)0x86057944, (q31_t)0x26c6134d, (q31_t)0x860391e0,
-  (q31_t)0x26c01655, (q31_t)0x8601aac7, (q31_t)0x26ba1945, (q31_t)0x85ffc3f9, (q31_t)0x26b41c1d, (q31_t)0x85fddd76, (q31_t)0x26ae1edd, (q31_t)0x85fbf73f,
-  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26a22416, (q31_t)0x85f82bb2, (q31_t)0x269c268f, (q31_t)0x85f6465c, (q31_t)0x269628f0, (q31_t)0x85f46152,
-  (q31_t)0x26902b39, (q31_t)0x85f27c93, (q31_t)0x268a2d6b, (q31_t)0x85f09820, (q31_t)0x26842f84, (q31_t)0x85eeb3f7, (q31_t)0x267e3186, (q31_t)0x85ecd01a,
-  (q31_t)0x26783370, (q31_t)0x85eaec88, (q31_t)0x26723543, (q31_t)0x85e90942, (q31_t)0x266c36fe, (q31_t)0x85e72647, (q31_t)0x266638a1, (q31_t)0x85e54397,
-  (q31_t)0x26603a2c, (q31_t)0x85e36132, (q31_t)0x265a3b9f, (q31_t)0x85e17f19, (q31_t)0x26543cfb, (q31_t)0x85df9d4b, (q31_t)0x264e3e40, (q31_t)0x85ddbbc9,
-  (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x26424082, (q31_t)0x85d9f9a5, (q31_t)0x263c417f, (q31_t)0x85d81905, (q31_t)0x26364265, (q31_t)0x85d638b0,
-  (q31_t)0x26304333, (q31_t)0x85d458a6, (q31_t)0x262a43ea, (q31_t)0x85d278e7, (q31_t)0x26244489, (q31_t)0x85d09974, (q31_t)0x261e4511, (q31_t)0x85ceba4d,
-  (q31_t)0x26184581, (q31_t)0x85ccdb70, (q31_t)0x261245da, (q31_t)0x85cafcdf, (q31_t)0x260c461b, (q31_t)0x85c91e9a, (q31_t)0x26064645, (q31_t)0x85c740a0,
-  (q31_t)0x26004657, (q31_t)0x85c562f1, (q31_t)0x25fa4652, (q31_t)0x85c3858d, (q31_t)0x25f44635, (q31_t)0x85c1a875, (q31_t)0x25ee4601, (q31_t)0x85bfcba9,
-  (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x25e24553, (q31_t)0x85bc12f2, (q31_t)0x25dc44d9, (q31_t)0x85ba3707, (q31_t)0x25d64447, (q31_t)0x85b85b68,
-  (q31_t)0x25d0439f, (q31_t)0x85b68015, (q31_t)0x25ca42de, (q31_t)0x85b4a50d, (q31_t)0x25c44207, (q31_t)0x85b2ca50, (q31_t)0x25be4118, (q31_t)0x85b0efdf,
-  (q31_t)0x25b84012, (q31_t)0x85af15b9, (q31_t)0x25b23ef5, (q31_t)0x85ad3bdf, (q31_t)0x25ac3dc0, (q31_t)0x85ab6250, (q31_t)0x25a63c74, (q31_t)0x85a9890d,
-  (q31_t)0x25a03b11, (q31_t)0x85a7b015, (q31_t)0x259a3997, (q31_t)0x85a5d768, (q31_t)0x25943806, (q31_t)0x85a3ff07, (q31_t)0x258e365d, (q31_t)0x85a226f2,
-  (q31_t)0x2588349d, (q31_t)0x85a04f28, (q31_t)0x258232c6, (q31_t)0x859e77a9, (q31_t)0x257c30d8, (q31_t)0x859ca076, (q31_t)0x25762ed3, (q31_t)0x859ac98f,
-  (q31_t)0x25702cb7, (q31_t)0x8598f2f3, (q31_t)0x256a2a83, (q31_t)0x85971ca2, (q31_t)0x25642839, (q31_t)0x8595469d, (q31_t)0x255e25d7, (q31_t)0x859370e4,
-  (q31_t)0x2558235f, (q31_t)0x85919b76, (q31_t)0x255220cf, (q31_t)0x858fc653, (q31_t)0x254c1e28, (q31_t)0x858df17c, (q31_t)0x25461b6b, (q31_t)0x858c1cf1,
-  (q31_t)0x25401896, (q31_t)0x858a48b1, (q31_t)0x253a15aa, (q31_t)0x858874bd, (q31_t)0x253412a8, (q31_t)0x8586a114, (q31_t)0x252e0f8e, (q31_t)0x8584cdb7,
-  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x25220916, (q31_t)0x858127df, (q31_t)0x251c05b8, (q31_t)0x857f5564, (q31_t)0x25160243, (q31_t)0x857d8335,
-  (q31_t)0x250ffeb7, (q31_t)0x857bb152, (q31_t)0x2509fb14, (q31_t)0x8579dfba, (q31_t)0x2503f75a, (q31_t)0x85780e6e, (q31_t)0x24fdf389, (q31_t)0x85763d6d,
-  (q31_t)0x24f7efa2, (q31_t)0x85746cb8, (q31_t)0x24f1eba4, (q31_t)0x85729c4e, (q31_t)0x24ebe78f, (q31_t)0x8570cc30, (q31_t)0x24e5e363, (q31_t)0x856efc5e,
-  (q31_t)0x24dfdf20, (q31_t)0x856d2cd7, (q31_t)0x24d9dac7, (q31_t)0x856b5d9c, (q31_t)0x24d3d657, (q31_t)0x85698ead, (q31_t)0x24cdd1d0, (q31_t)0x8567c009,
-  (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24c1c87f, (q31_t)0x856423a4, (q31_t)0x24bbc3b4, (q31_t)0x856255e3, (q31_t)0x24b5bed2, (q31_t)0x8560886d,
-  (q31_t)0x24afb9da, (q31_t)0x855ebb44, (q31_t)0x24a9b4cb, (q31_t)0x855cee66, (q31_t)0x24a3afa6, (q31_t)0x855b21d3, (q31_t)0x249daa6a, (q31_t)0x8559558c,
-  (q31_t)0x2497a517, (q31_t)0x85578991, (q31_t)0x24919fae, (q31_t)0x8555bde2, (q31_t)0x248b9a2f, (q31_t)0x8553f27e, (q31_t)0x24859498, (q31_t)0x85522766,
-  (q31_t)0x247f8eec, (q31_t)0x85505c99, (q31_t)0x24798928, (q31_t)0x854e9219, (q31_t)0x2473834f, (q31_t)0x854cc7e3, (q31_t)0x246d7d5e, (q31_t)0x854afdfa,
-  (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x2461713a, (q31_t)0x85476b0a, (q31_t)0x245b6b07, (q31_t)0x8545a204, (q31_t)0x245564bd, (q31_t)0x8543d949,
-  (q31_t)0x244f5e5c, (q31_t)0x854210db, (q31_t)0x244957e5, (q31_t)0x854048b7, (q31_t)0x24435158, (q31_t)0x853e80e0, (q31_t)0x243d4ab4, (q31_t)0x853cb954,
-  (q31_t)0x243743fa, (q31_t)0x853af214, (q31_t)0x24313d2a, (q31_t)0x85392b20, (q31_t)0x242b3644, (q31_t)0x85376477, (q31_t)0x24252f47, (q31_t)0x85359e1a,
-  (q31_t)0x241f2833, (q31_t)0x8533d809, (q31_t)0x2419210a, (q31_t)0x85321244, (q31_t)0x241319ca, (q31_t)0x85304cca, (q31_t)0x240d1274, (q31_t)0x852e879d,
-  (q31_t)0x24070b08, (q31_t)0x852cc2bb, (q31_t)0x24010385, (q31_t)0x852afe24, (q31_t)0x23fafbec, (q31_t)0x852939da, (q31_t)0x23f4f43e, (q31_t)0x852775db,
-  (q31_t)0x23eeec78, (q31_t)0x8525b228, (q31_t)0x23e8e49d, (q31_t)0x8523eec1, (q31_t)0x23e2dcac, (q31_t)0x85222ba5, (q31_t)0x23dcd4a4, (q31_t)0x852068d6,
-  (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23d0c453, (q31_t)0x851ce41a, (q31_t)0x23cabc09, (q31_t)0x851b222e, (q31_t)0x23c4b3a9, (q31_t)0x8519608d,
-  (q31_t)0x23beab33, (q31_t)0x85179f39, (q31_t)0x23b8a2a7, (q31_t)0x8515de30, (q31_t)0x23b29a05, (q31_t)0x85141d73, (q31_t)0x23ac914d, (q31_t)0x85125d02,
-  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x23a07f9a, (q31_t)0x850edd03, (q31_t)0x239a76a0, (q31_t)0x850d1d75, (q31_t)0x23946d90, (q31_t)0x850b5e34,
-  (q31_t)0x238e646a, (q31_t)0x85099f3e, (q31_t)0x23885b2e, (q31_t)0x8507e094, (q31_t)0x238251dd, (q31_t)0x85062235, (q31_t)0x237c4875, (q31_t)0x85046423,
-  (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x23703564, (q31_t)0x8500e8e2, (q31_t)0x236a2bba, (q31_t)0x84ff2bb3, (q31_t)0x236421fb, (q31_t)0x84fd6ed0,
-  (q31_t)0x235e1826, (q31_t)0x84fbb239, (q31_t)0x23580e3b, (q31_t)0x84f9f5ee, (q31_t)0x2352043b, (q31_t)0x84f839ee, (q31_t)0x234bfa24, (q31_t)0x84f67e3b,
-  (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x233fe5b6, (q31_t)0x84f307b8, (q31_t)0x2339db5e, (q31_t)0x84f14ce8, (q31_t)0x2333d0f1, (q31_t)0x84ef9265,
-  (q31_t)0x232dc66d, (q31_t)0x84edd82d, (q31_t)0x2327bbd5, (q31_t)0x84ec1e41, (q31_t)0x2321b126, (q31_t)0x84ea64a1, (q31_t)0x231ba662, (q31_t)0x84e8ab4d,
-  (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x230f9098, (q31_t)0x84e53988, (q31_t)0x23098593, (q31_t)0x84e38118, (q31_t)0x23037a78, (q31_t)0x84e1c8f3,
-  (q31_t)0x22fd6f48, (q31_t)0x84e0111b, (q31_t)0x22f76402, (q31_t)0x84de598f, (q31_t)0x22f158a7, (q31_t)0x84dca24e, (q31_t)0x22eb4d36, (q31_t)0x84daeb5a,
-  (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22df3613, (q31_t)0x84d77e54, (q31_t)0x22d92a61, (q31_t)0x84d5c844, (q31_t)0x22d31e9a, (q31_t)0x84d4127f,
-  (q31_t)0x22cd12bd, (q31_t)0x84d25d06, (q31_t)0x22c706cb, (q31_t)0x84d0a7da, (q31_t)0x22c0fac4, (q31_t)0x84cef2f9, (q31_t)0x22baeea7, (q31_t)0x84cd3e64,
-  (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x22aed62c, (q31_t)0x84c9d61f, (q31_t)0x22a8c9cf, (q31_t)0x84c8226e, (q31_t)0x22a2bd5d, (q31_t)0x84c66f09,
-  (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0, (q31_t)0x2296a437, (q31_t)0x84c30924, (q31_t)0x22909785, (q31_t)0x84c156a3, (q31_t)0x228a8abd, (q31_t)0x84bfa46e,
-  (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x227e70ed, (q31_t)0x84bc40e9, (q31_t)0x227863e5, (q31_t)0x84ba8f98, (q31_t)0x227256c8, (q31_t)0x84b8de94,
-  (q31_t)0x226c4996, (q31_t)0x84b72ddb, (q31_t)0x22663c4e, (q31_t)0x84b57d6f, (q31_t)0x22602ef1, (q31_t)0x84b3cd4f, (q31_t)0x225a217f, (q31_t)0x84b21d7a,
-  (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x224e065c, (q31_t)0x84aebeb6, (q31_t)0x2247f8aa, (q31_t)0x84ad0fc6, (q31_t)0x2241eae3, (q31_t)0x84ab6122,
-  (q31_t)0x223bdd08, (q31_t)0x84a9b2ca, (q31_t)0x2235cf17, (q31_t)0x84a804be, (q31_t)0x222fc111, (q31_t)0x84a656fe, (q31_t)0x2229b2f6, (q31_t)0x84a4a98a,
-  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x221d9680, (q31_t)0x84a14f87, (q31_t)0x22178826, (q31_t)0x849fa2f7, (q31_t)0x221179b7, (q31_t)0x849df6b4,
-  (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x22055c99, (q31_t)0x849a9f12, (q31_t)0x21ff4dea, (q31_t)0x8498f3b3, (q31_t)0x21f93f27, (q31_t)0x849748a0,
-  (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21ed2162, (q31_t)0x8493f35e, (q31_t)0x21e71260, (q31_t)0x84924930, (q31_t)0x21e10349, (q31_t)0x84909f4e,
-  (q31_t)0x21daf41d, (q31_t)0x848ef5b7, (q31_t)0x21d4e4dc, (q31_t)0x848d4c6d, (q31_t)0x21ced586, (q31_t)0x848ba36f, (q31_t)0x21c8c61c, (q31_t)0x8489fabe,
-  (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21bca708, (q31_t)0x8486aa3e, (q31_t)0x21b6975f, (q31_t)0x84850271, (q31_t)0x21b087a1, (q31_t)0x84835af0,
-  (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x21a467e7, (q31_t)0x84800cd2, (q31_t)0x219e57eb, (q31_t)0x847e6636, (q31_t)0x219847da, (q31_t)0x847cbfe5,
-  (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x218c277a, (q31_t)0x84797429, (q31_t)0x2186172b, (q31_t)0x8477cebd, (q31_t)0x218006c8, (q31_t)0x8476299e,
-  (q31_t)0x2179f64f, (q31_t)0x847484ca, (q31_t)0x2173e5c2, (q31_t)0x8472e043, (q31_t)0x216dd521, (q31_t)0x84713c08, (q31_t)0x2167c46b, (q31_t)0x846f9819,
-  (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x215ba2c0, (q31_t)0x846c5120, (q31_t)0x215591cc, (q31_t)0x846aae16, (q31_t)0x214f80c4, (q31_t)0x84690b58,
-  (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21435e75, (q31_t)0x8465c6c1, (q31_t)0x213d4d2f, (q31_t)0x846424e8, (q31_t)0x21373bd4, (q31_t)0x8462835b,
-  (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x212b18e1, (q31_t)0x845f4126, (q31_t)0x21250749, (q31_t)0x845da07e, (q31_t)0x211ef59d, (q31_t)0x845c0022,
-  (q31_t)0x2118e3dc, (q31_t)0x845a6012, (q31_t)0x2112d206, (q31_t)0x8458c04f, (q31_t)0x210cc01d, (q31_t)0x845720d8, (q31_t)0x2106ae1e, (q31_t)0x845581ad,
-  (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20fa89e5, (q31_t)0x8452443d, (q31_t)0x20f477aa, (q31_t)0x8450a5f7, (q31_t)0x20ee655a, (q31_t)0x844f07fd,
-  (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20e2407e, (q31_t)0x844bccef, (q31_t)0x20dc2df2, (q31_t)0x844a2fda, (q31_t)0x20d61b51, (q31_t)0x84489311,
-  (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20c9f5d3, (q31_t)0x84455a66, (q31_t)0x20c3e2f5, (q31_t)0x8443be82, (q31_t)0x20bdd003, (q31_t)0x844222eb,
-  (q31_t)0x20b7bcfe, (q31_t)0x844087a0, (q31_t)0x20b1a9e4, (q31_t)0x843eeca2, (q31_t)0x20ab96b5, (q31_t)0x843d51f0, (q31_t)0x20a58373, (q31_t)0x843bb78a,
-  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x20995cb2, (q31_t)0x843883a3, (q31_t)0x20934933, (q31_t)0x8436ea23, (q31_t)0x208d35a0, (q31_t)0x843550ee,
-  (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x20810e3e, (q31_t)0x84321f6b, (q31_t)0x207afa6f, (q31_t)0x8430871b, (q31_t)0x2074e68c, (q31_t)0x842eef18,
-  (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x2068be8a, (q31_t)0x842bbff8, (q31_t)0x2062aa6b, (q31_t)0x842a28da, (q31_t)0x205c9638, (q31_t)0x84289209,
-  (q31_t)0x205681f1, (q31_t)0x8426fb84, (q31_t)0x20506d96, (q31_t)0x8425654b, (q31_t)0x204a5927, (q31_t)0x8423cf5f, (q31_t)0x204444a4, (q31_t)0x842239bf,
-  (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x20381b63, (q31_t)0x841f0f65, (q31_t)0x203206a4, (q31_t)0x841d7aaa, (q31_t)0x202bf1d2, (q31_t)0x841be63c,
-  (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x201fc7f2, (q31_t)0x8418be45, (q31_t)0x2019b2e4, (q31_t)0x84172abc, (q31_t)0x20139dc2, (q31_t)0x84159780,
-  (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x20077344, (q31_t)0x841271ec, (q31_t)0x20015de7, (q31_t)0x8410df95, (q31_t)0x1ffb4876, (q31_t)0x840f4d8a,
-  (q31_t)0x1ff532f2, (q31_t)0x840dbbcc, (q31_t)0x1fef1d59, (q31_t)0x840c2a5a, (q31_t)0x1fe907ae, (q31_t)0x840a9935, (q31_t)0x1fe2f1ee, (q31_t)0x8409085c,
-  (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fd6c634, (q31_t)0x8405e790, (q31_t)0x1fd0b03a, (q31_t)0x8404579d, (q31_t)0x1fca9a2b, (q31_t)0x8402c7f6,
-  (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fbe6dd4, (q31_t)0x83ffa98d, (q31_t)0x1fb8578b, (q31_t)0x83fe1acc, (q31_t)0x1fb2412f, (q31_t)0x83fc8c57,
-  (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1fa6143b, (q31_t)0x83f97052, (q31_t)0x1f9ffda4, (q31_t)0x83f7e2c3, (q31_t)0x1f99e6fa, (q31_t)0x83f65580,
-  (q31_t)0x1f93d03c, (q31_t)0x83f4c889, (q31_t)0x1f8db96a, (q31_t)0x83f33bdf, (q31_t)0x1f87a285, (q31_t)0x83f1af82, (q31_t)0x1f818b8d, (q31_t)0x83f02371,
-  (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f755d61, (q31_t)0x83ed0c35, (q31_t)0x1f6f462f, (q31_t)0x83eb810a, (q31_t)0x1f692ee9, (q31_t)0x83e9f62b,
-  (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f5d0022, (q31_t)0x83e6e153, (q31_t)0x1f56e8a2, (q31_t)0x83e5575a, (q31_t)0x1f50d10e, (q31_t)0x83e3cdad,
-  (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f44a1ad, (q31_t)0x83e0bb3a, (q31_t)0x1f3e89e0, (q31_t)0x83df3273, (q31_t)0x1f3871ff, (q31_t)0x83dda9f9,
-  (q31_t)0x1f325a0b, (q31_t)0x83dc21cb, (q31_t)0x1f2c4204, (q31_t)0x83da99ea, (q31_t)0x1f2629ea, (q31_t)0x83d91255, (q31_t)0x1f2011bc, (q31_t)0x83d78b0d,
-  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f13e127, (q31_t)0x83d47d63, (q31_t)0x1f0dc8c0, (q31_t)0x83d2f701, (q31_t)0x1f07b045, (q31_t)0x83d170eb,
-  (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1efb7f17, (q31_t)0x83ce65a6, (q31_t)0x1ef56664, (q31_t)0x83cce076, (q31_t)0x1eef4d9d, (q31_t)0x83cb5b93,
-  (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ee31bd6, (q31_t)0x83c852b2, (q31_t)0x1edd02d6, (q31_t)0x83c6ceb5, (q31_t)0x1ed6e9c3, (q31_t)0x83c54b04,
-  (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0, (q31_t)0x1ecab763, (q31_t)0x83c24488, (q31_t)0x1ec49e17, (q31_t)0x83c0c1be, (q31_t)0x1ebe84b8, (q31_t)0x83bf3f3f,
-  (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1eb251c1, (q31_t)0x83bc3b29, (q31_t)0x1eac3829, (q31_t)0x83bab991, (q31_t)0x1ea61e7e, (q31_t)0x83b93845,
-  (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e99eaf0, (q31_t)0x83b63694, (q31_t)0x1e93d10c, (q31_t)0x83b4b62e, (q31_t)0x1e8db716, (q31_t)0x83b33616,
-  (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e8182f1, (q31_t)0x83b036ca, (q31_t)0x1e7b68c2, (q31_t)0x83aeb797, (q31_t)0x1e754e80, (q31_t)0x83ad38b1,
-  (q31_t)0x1e6f342c, (q31_t)0x83abba17, (q31_t)0x1e6919c4, (q31_t)0x83aa3bca, (q31_t)0x1e62ff4a, (q31_t)0x83a8bdca, (q31_t)0x1e5ce4be, (q31_t)0x83a74017,
-  (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e50af6c, (q31_t)0x83a44596, (q31_t)0x1e4a94a7, (q31_t)0x83a2c8c9, (q31_t)0x1e4479cf, (q31_t)0x83a14c48,
-  (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e3843e8, (q31_t)0x839e542d, (q31_t)0x1e3228d9, (q31_t)0x839cd893, (q31_t)0x1e2c0db6, (q31_t)0x839b5d45,
-  (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e1fd73a, (q31_t)0x83986790, (q31_t)0x1e19bbe0, (q31_t)0x8396ed29, (q31_t)0x1e13a074, (q31_t)0x8395730e,
-  (q31_t)0x1e0d84f5, (q31_t)0x8393f940, (q31_t)0x1e076963, (q31_t)0x83927fbf, (q31_t)0x1e014dbf, (q31_t)0x8391068a, (q31_t)0x1dfb3208, (q31_t)0x838f8da2,
-  (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1deefa63, (q31_t)0x838c9cb9, (q31_t)0x1de8de75, (q31_t)0x838b24b8, (q31_t)0x1de2c275, (q31_t)0x8389ad03,
-  (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dd68a3c, (q31_t)0x8386be80, (q31_t)0x1dd06e04, (q31_t)0x838547b2, (q31_t)0x1dca51ba, (q31_t)0x8383d130,
-  (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dbe18ef, (q31_t)0x8380e513, (q31_t)0x1db7fc6d, (q31_t)0x837f6f78, (q31_t)0x1db1dfda, (q31_t)0x837dfa2a,
-  (q31_t)0x1dabc334, (q31_t)0x837c8528, (q31_t)0x1da5a67c, (q31_t)0x837b1074, (q31_t)0x1d9f89b1, (q31_t)0x83799c0c, (q31_t)0x1d996cd4, (q31_t)0x837827f0,
-  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d8d32e4, (q31_t)0x837540a1, (q31_t)0x1d8715d0, (q31_t)0x8373cd6c, (q31_t)0x1d80f8ab, (q31_t)0x83725a84,
-  (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d74be29, (q31_t)0x836f759b, (q31_t)0x1d6ea0cc, (q31_t)0x836e039a, (q31_t)0x1d68835e, (q31_t)0x836c91e5,
-  (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d5c484b, (q31_t)0x8369af63, (q31_t)0x1d562aa6, (q31_t)0x83683e95, (q31_t)0x1d500cef, (q31_t)0x8366ce14,
-  (q31_t)0x1d49ef26, (q31_t)0x83655ddf, (q31_t)0x1d43d14b, (q31_t)0x8363edf8, (q31_t)0x1d3db35e, (q31_t)0x83627e5d, (q31_t)0x1d37955e, (q31_t)0x83610f10,
-  (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d2b592a, (q31_t)0x835e315b, (q31_t)0x1d253af5, (q31_t)0x835cc2f4, (q31_t)0x1d1f1cae, (q31_t)0x835b54da,
-  (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d12dfe9, (q31_t)0x8358798c, (q31_t)0x1d0cc16c, (q31_t)0x83570c59, (q31_t)0x1d06a2dd, (q31_t)0x83559f72,
-  (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1cfa658a, (q31_t)0x8352c68c, (q31_t)0x1cf446c5, (q31_t)0x83515a8c, (q31_t)0x1cee27ef, (q31_t)0x834feed9,
-  (q31_t)0x1ce80906, (q31_t)0x834e8373, (q31_t)0x1ce1ea0c, (q31_t)0x834d185a, (q31_t)0x1cdbcb00, (q31_t)0x834bad8e, (q31_t)0x1cd5abe3, (q31_t)0x834a430e,
-  (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cc96d72, (q31_t)0x83476ef6, (q31_t)0x1cc34e1f, (q31_t)0x8346055e, (q31_t)0x1cbd2eba, (q31_t)0x83449c12,
-  (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1cb0efbb, (q31_t)0x8341ca62, (q31_t)0x1caad021, (q31_t)0x834061fd, (q31_t)0x1ca4b075, (q31_t)0x833ef9e6,
-  (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c9870e9, (q31_t)0x833c2a9d, (q31_t)0x1c925109, (q31_t)0x833ac36c, (q31_t)0x1c8c3116, (q31_t)0x83395c88,
-  (q31_t)0x1c861113, (q31_t)0x8337f5f1, (q31_t)0x1c7ff0fd, (q31_t)0x83368fa7, (q31_t)0x1c79d0d6, (q31_t)0x833529aa, (q31_t)0x1c73b09d, (q31_t)0x8333c3fa,
-  (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c676ff8, (q31_t)0x8330f981, (q31_t)0x1c614f8b, (q31_t)0x832f94b8, (q31_t)0x1c5b2f0c, (q31_t)0x832e303c,
-  (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c4eedda, (q31_t)0x832b682b, (q31_t)0x1c48cd27, (q31_t)0x832a0496, (q31_t)0x1c42ac62, (q31_t)0x8328a14d,
-  (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c366aa5, (q31_t)0x8325dba4, (q31_t)0x1c3049ac, (q31_t)0x83247943, (q31_t)0x1c2a28a2, (q31_t)0x8323172f,
-  (q31_t)0x1c240786, (q31_t)0x8321b568, (q31_t)0x1c1de659, (q31_t)0x832053ee, (q31_t)0x1c17c51b, (q31_t)0x831ef2c1, (q31_t)0x1c11a3cb, (q31_t)0x831d91e1,
-  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1c0560f8, (q31_t)0x831ad109, (q31_t)0x1bff3f75, (q31_t)0x83197110, (q31_t)0x1bf91de0, (q31_t)0x83181164,
-  (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1becda83, (q31_t)0x831552f4, (q31_t)0x1be6b8ba, (q31_t)0x8313f42f, (q31_t)0x1be096e0, (q31_t)0x831295b7,
-  (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bd452f9, (q31_t)0x830fd9af, (q31_t)0x1bce30ec, (q31_t)0x830e7c1f, (q31_t)0x1bc80ece, (q31_t)0x830d1edc,
-  (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6, (q31_t)0x1bbbca5e, (q31_t)0x830a653c, (q31_t)0x1bb5a80c, (q31_t)0x830908e0, (q31_t)0x1baf85a9, (q31_t)0x8307acd1,
-  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1ba340b0, (q31_t)0x8304f59b, (q31_t)0x1b9d1e1a, (q31_t)0x83039a73, (q31_t)0x1b96fb73, (q31_t)0x83023f98,
-  (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b8ab5f2, (q31_t)0x82ff8acb, (q31_t)0x1b849317, (q31_t)0x82fe30d7, (q31_t)0x1b7e702c, (q31_t)0x82fcd731,
-  (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b722a23, (q31_t)0x82fa24cc, (q31_t)0x1b6c0705, (q31_t)0x82f8cc0d, (q31_t)0x1b65e3d7, (q31_t)0x82f7739c,
-  (q31_t)0x1b5fc097, (q31_t)0x82f61b77, (q31_t)0x1b599d46, (q31_t)0x82f4c3a0, (q31_t)0x1b5379e5, (q31_t)0x82f36c15, (q31_t)0x1b4d5672, (q31_t)0x82f214d8,
-  (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b410f5b, (q31_t)0x82ef6745, (q31_t)0x1b3aebb6, (q31_t)0x82ee10ef, (q31_t)0x1b34c801, (q31_t)0x82ecbae7,
-  (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b288063, (q31_t)0x82ea0fbd, (q31_t)0x1b225c7b, (q31_t)0x82e8ba9c, (q31_t)0x1b1c3883, (q31_t)0x82e765c8,
-  (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1b0ff05f, (q31_t)0x82e4bd07, (q31_t)0x1b09cc34, (q31_t)0x82e3691b, (q31_t)0x1b03a7f9, (q31_t)0x82e2157c,
-  (q31_t)0x1afd83ad, (q31_t)0x82e0c22a, (q31_t)0x1af75f50, (q31_t)0x82df6f25, (q31_t)0x1af13ae3, (q31_t)0x82de1c6d, (q31_t)0x1aeb1665, (q31_t)0x82dcca02,
-  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1adecd37, (q31_t)0x82da2615, (q31_t)0x1ad8a887, (q31_t)0x82d8d492, (q31_t)0x1ad283c7, (q31_t)0x82d7835c,
-  (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ac63a14, (q31_t)0x82d4e1d8, (q31_t)0x1ac01522, (q31_t)0x82d3918a, (q31_t)0x1ab9f020, (q31_t)0x82d24189,
-  (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1aada5e9, (q31_t)0x82cfa26f, (q31_t)0x1aa780b6, (q31_t)0x82ce5356, (q31_t)0x1aa15b71, (q31_t)0x82cd048a,
-  (q31_t)0x1a9b361d, (q31_t)0x82cbb60b, (q31_t)0x1a9510b7, (q31_t)0x82ca67d9, (q31_t)0x1a8eeb42, (q31_t)0x82c919f5, (q31_t)0x1a88c5bc, (q31_t)0x82c7cc5e,
-  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a7c7a7f, (q31_t)0x82c53217, (q31_t)0x1a7654c8, (q31_t)0x82c3e568, (q31_t)0x1a702f01, (q31_t)0x82c29906,
-  (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a63e341, (q31_t)0x82c00129, (q31_t)0x1a5dbd49, (q31_t)0x82beb5af, (q31_t)0x1a579741, (q31_t)0x82bd6a82,
-  (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a4b4aff, (q31_t)0x82bad50f, (q31_t)0x1a4524c6, (q31_t)0x82b98aca, (q31_t)0x1a3efe7c, (q31_t)0x82b840d2,
-  (q31_t)0x1a38d823, (q31_t)0x82b6f727, (q31_t)0x1a32b1b9, (q31_t)0x82b5adca, (q31_t)0x1a2c8b3f, (q31_t)0x82b464ba, (q31_t)0x1a2664b5, (q31_t)0x82b31bf7,
-  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a1a1771, (q31_t)0x82b08b59, (q31_t)0x1a13f0b6, (q31_t)0x82af437e, (q31_t)0x1a0dc9ec, (q31_t)0x82adfbf0,
-  (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x1a017c27, (q31_t)0x82ab6dbd, (q31_t)0x19fb552c, (q31_t)0x82aa2717, (q31_t)0x19f52e22, (q31_t)0x82a8e0bf,
-  (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19e8dfdc, (q31_t)0x82a654f6, (q31_t)0x19e2b8a2, (q31_t)0x82a50f85, (q31_t)0x19dc9157, (q31_t)0x82a3ca62,
-  (q31_t)0x19d669fc, (q31_t)0x82a2858c, (q31_t)0x19d04292, (q31_t)0x82a14104, (q31_t)0x19ca1b17, (q31_t)0x829ffcc8, (q31_t)0x19c3f38d, (q31_t)0x829eb8db,
-  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19b7a449, (q31_t)0x829c31e7, (q31_t)0x19b17c8f, (q31_t)0x829aeee1, (q31_t)0x19ab54c5, (q31_t)0x8299ac29,
-  (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x199f0502, (q31_t)0x829727a0, (q31_t)0x1998dd09, (q31_t)0x8295e5cf, (q31_t)0x1992b4ff, (q31_t)0x8294a44c,
-  (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x198664be, (q31_t)0x8292222e, (q31_t)0x19803c86, (q31_t)0x8290e194, (q31_t)0x197a143e, (q31_t)0x828fa146,
-  (q31_t)0x1973ebe6, (q31_t)0x828e6146, (q31_t)0x196dc37e, (q31_t)0x828d2193, (q31_t)0x19679b07, (q31_t)0x828be22e, (q31_t)0x19617280, (q31_t)0x828aa316,
-  (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x19552144, (q31_t)0x828825ce, (q31_t)0x194ef88e, (q31_t)0x8286e79e, (q31_t)0x1948cfc8, (q31_t)0x8285a9bb,
-  (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x193c7e0f, (q31_t)0x82832edf, (q31_t)0x1936551b, (q31_t)0x8281f1e4, (q31_t)0x19302c17, (q31_t)0x8280b538,
-  (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x1923d9e1, (q31_t)0x827e3cc6, (q31_t)0x191db0af, (q31_t)0x827d0102, (q31_t)0x1917876d, (q31_t)0x827bc58a,
-  (q31_t)0x19115e1c, (q31_t)0x827a8a61, (q31_t)0x190b34bb, (q31_t)0x82794f84, (q31_t)0x19050b4b, (q31_t)0x827814f6, (q31_t)0x18fee1cb, (q31_t)0x8276dab4,
-  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18f28e9e, (q31_t)0x8274671a, (q31_t)0x18ec64f0, (q31_t)0x82732dc0, (q31_t)0x18e63b33, (q31_t)0x8271f4b5,
-  (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18d9e78b, (q31_t)0x826f8386, (q31_t)0x18d3bda0, (q31_t)0x826e4b62, (q31_t)0x18cd93a5, (q31_t)0x826d138d,
-  (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18c13f82, (q31_t)0x826aa4c9, (q31_t)0x18bb155a, (q31_t)0x82696ddc, (q31_t)0x18b4eb22, (q31_t)0x8268373c,
-  (q31_t)0x18aec0db, (q31_t)0x826700e9, (q31_t)0x18a89685, (q31_t)0x8265cae4, (q31_t)0x18a26c20, (q31_t)0x8264952d, (q31_t)0x189c41ab, (q31_t)0x82635fc2,
-  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x188fec95, (q31_t)0x8260f5d7, (q31_t)0x1889c1f3, (q31_t)0x825fc155, (q31_t)0x18839742, (q31_t)0x825e8d21,
-  (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x187741b2, (q31_t)0x825c25a1, (q31_t)0x187116d4, (q31_t)0x825af255, (q31_t)0x186aebe6, (q31_t)0x8259bf57,
-  (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x185e95de, (q31_t)0x82575a44, (q31_t)0x18586ac3, (q31_t)0x8256282e, (q31_t)0x18523f9a, (q31_t)0x8254f666,
-  (q31_t)0x184c1461, (q31_t)0x8253c4eb, (q31_t)0x1845e919, (q31_t)0x825293be, (q31_t)0x183fbdc3, (q31_t)0x825162df, (q31_t)0x1839925d, (q31_t)0x8250324d,
-  (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x182d3b65, (q31_t)0x824dd211, (q31_t)0x18270fd3, (q31_t)0x824ca268, (q31_t)0x1820e431, (q31_t)0x824b730c,
-  (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x18148cc2, (q31_t)0x8249153d, (q31_t)0x180e60f4, (q31_t)0x8247e6ca, (q31_t)0x18083518, (q31_t)0x8246b8a4,
-  (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17fbdd32, (q31_t)0x82445d41, (q31_t)0x17f5b129, (q31_t)0x82433004, (q31_t)0x17ef8511, (q31_t)0x82420315,
-  (q31_t)0x17e958ea, (q31_t)0x8240d673, (q31_t)0x17e32cb5, (q31_t)0x823faa1e, (q31_t)0x17dd0070, (q31_t)0x823e7e18, (q31_t)0x17d6d41d, (q31_t)0x823d525e,
-  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17ca7b4c, (q31_t)0x823afbd5, (q31_t)0x17c44ecd, (q31_t)0x8239d104, (q31_t)0x17be223f, (q31_t)0x8238a681,
-  (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x17b1c8f8, (q31_t)0x82365264, (q31_t)0x17ab9c3e, (q31_t)0x823528ca, (q31_t)0x17a56f76, (q31_t)0x8233ff7e,
-  (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x179915ba, (q31_t)0x8231adce, (q31_t)0x1792e8c6, (q31_t)0x8230856a, (q31_t)0x178cbbc4, (q31_t)0x822f5d54,
-  (q31_t)0x17868eb3, (q31_t)0x822e358b, (q31_t)0x17806194, (q31_t)0x822d0e10, (q31_t)0x177a3466, (q31_t)0x822be6e3, (q31_t)0x17740729, (q31_t)0x822ac004,
-  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x1767ac85, (q31_t)0x8228732d, (q31_t)0x17617f1d, (q31_t)0x82274d36, (q31_t)0x175b51a7, (q31_t)0x8226278d,
-  (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x174ef68f, (q31_t)0x8223dd24, (q31_t)0x1748c8ee, (q31_t)0x8222b863, (q31_t)0x17429b3e, (q31_t)0x822193f1,
-  (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x17363fb4, (q31_t)0x821f4bf5, (q31_t)0x173011d9, (q31_t)0x821e286b, (q31_t)0x1729e3f0, (q31_t)0x821d052f,
-  (q31_t)0x1723b5f9, (q31_t)0x821be240, (q31_t)0x171d87f3, (q31_t)0x821abfa0, (q31_t)0x171759df, (q31_t)0x82199d4d, (q31_t)0x17112bbd, (q31_t)0x82187b47,
-  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x1704cf4f, (q31_t)0x82163826, (q31_t)0x16fea102, (q31_t)0x82151709, (q31_t)0x16f872a7, (q31_t)0x8213f63a,
-  (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16ec15c7, (q31_t)0x8211b586, (q31_t)0x16e5e741, (q31_t)0x821095a0, (q31_t)0x16dfb8ae, (q31_t)0x820f7608,
-  (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16d35b5c, (q31_t)0x820d37c1, (q31_t)0x16cd2c9f, (q31_t)0x820c1912, (q31_t)0x16c6fdd3, (q31_t)0x820afab1,
-  (q31_t)0x16c0cef9, (q31_t)0x8209dc9e, (q31_t)0x16baa011, (q31_t)0x8208bed8, (q31_t)0x16b4711b, (q31_t)0x8207a160, (q31_t)0x16ae4217, (q31_t)0x82068435,
-  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16a1e3e5, (q31_t)0x82044ac9, (q31_t)0x169bb4b7, (q31_t)0x82032e88, (q31_t)0x1695857b, (q31_t)0x82021294,
-  (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x168926da, (q31_t)0x81ffdb96, (q31_t)0x1682f774, (q31_t)0x81fec08c, (q31_t)0x167cc801, (q31_t)0x81fda5cf,
-  (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x167068f0, (q31_t)0x81fb713f, (q31_t)0x166a3953, (q31_t)0x81fa576c, (q31_t)0x166409a8, (q31_t)0x81f93de6,
-  (q31_t)0x165dd9f0, (q31_t)0x81f824ae, (q31_t)0x1657aa29, (q31_t)0x81f70bc3, (q31_t)0x16517a55, (q31_t)0x81f5f327, (q31_t)0x164b4a73, (q31_t)0x81f4dad8,
-  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x163eea86, (q31_t)0x81f2ab24, (q31_t)0x1638ba7a, (q31_t)0x81f193be, (q31_t)0x16328a61, (q31_t)0x81f07ca6,
-  (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16262a06, (q31_t)0x81ee4f60, (q31_t)0x161ff9c4, (q31_t)0x81ed3932, (q31_t)0x1619c975, (q31_t)0x81ec2351,
-  (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x160d68ad, (q31_t)0x81e9f879, (q31_t)0x16073834, (q31_t)0x81e8e381, (q31_t)0x160107ae, (q31_t)0x81e7ced8,
-  (q31_t)0x15fad71b, (q31_t)0x81e6ba7c, (q31_t)0x15f4a679, (q31_t)0x81e5a66e, (q31_t)0x15ee75cb, (q31_t)0x81e492ad, (q31_t)0x15e8450e, (q31_t)0x81e37f3b,
-  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15dbe36d, (q31_t)0x81e1593f, (q31_t)0x15d5b288, (q31_t)0x81e046b6, (q31_t)0x15cf8196, (q31_t)0x81df347b,
-  (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15c31f89, (q31_t)0x81dd10ee, (q31_t)0x15bcee6f, (q31_t)0x81dbff9c, (q31_t)0x15b6bd47, (q31_t)0x81daee98,
-  (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x15aa5acf, (q31_t)0x81d8cd79, (q31_t)0x15a4297f, (q31_t)0x81d7bd5e, (q31_t)0x159df821, (q31_t)0x81d6ad92,
-  (q31_t)0x1597c6b7, (q31_t)0x81d59e13, (q31_t)0x1591953e, (q31_t)0x81d48ee1, (q31_t)0x158b63b9, (q31_t)0x81d37ffe, (q31_t)0x15853226, (q31_t)0x81d27169,
-  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x1578ced9, (q31_t)0x81d05527, (q31_t)0x15729d1f, (q31_t)0x81cf477b, (q31_t)0x156c6b57, (q31_t)0x81ce3a1d,
-  (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x156007a0, (q31_t)0x81cc204a, (q31_t)0x1559d5b1, (q31_t)0x81cb13d5, (q31_t)0x1553a3b4, (q31_t)0x81ca07af,
-  (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x15473f94, (q31_t)0x81c7f04b, (q31_t)0x15410d70, (q31_t)0x81c6e50d, (q31_t)0x153adb3f, (q31_t)0x81c5da1e,
-  (q31_t)0x1534a901, (q31_t)0x81c4cf7d, (q31_t)0x152e76b5, (q31_t)0x81c3c529, (q31_t)0x1528445d, (q31_t)0x81c2bb23, (q31_t)0x152211f8, (q31_t)0x81c1b16b,
-  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1515ad06, (q31_t)0x81bf9ee5, (q31_t)0x150f7a7a, (q31_t)0x81be9617, (q31_t)0x150947e1, (q31_t)0x81bd8d97,
-  (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14fce287, (q31_t)0x81bb7d7f, (q31_t)0x14f6afc7, (q31_t)0x81ba75e9, (q31_t)0x14f07cf9, (q31_t)0x81b96ea0,
-  (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14e41738, (q31_t)0x81b760f8, (q31_t)0x14dde445, (q31_t)0x81b65a99, (q31_t)0x14d7b144, (q31_t)0x81b55488,
-  (q31_t)0x14d17e36, (q31_t)0x81b44ec4, (q31_t)0x14cb4b1c, (q31_t)0x81b3494f, (q31_t)0x14c517f4, (q31_t)0x81b24427, (q31_t)0x14bee4c0, (q31_t)0x81b13f4e,
-  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x14b27e32, (q31_t)0x81af3684, (q31_t)0x14ac4ad7, (q31_t)0x81ae3294, (q31_t)0x14a61770, (q31_t)0x81ad2ef2,
-  (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x1499b07c, (q31_t)0x81ab2898, (q31_t)0x14937cee, (q31_t)0x81aa25e0, (q31_t)0x148d4954, (q31_t)0x81a92376,
-  (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x1480e1fa, (q31_t)0x81a71f8b, (q31_t)0x147aae3a, (q31_t)0x81a61e0b, (q31_t)0x14747a6d, (q31_t)0x81a51cd8,
-  (q31_t)0x146e4694, (q31_t)0x81a41bf4, (q31_t)0x146812ae, (q31_t)0x81a31b5d, (q31_t)0x1461debc, (q31_t)0x81a21b14, (q31_t)0x145baabd, (q31_t)0x81a11b1a,
-  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x144f4299, (q31_t)0x819f1c0e, (q31_t)0x14490e74, (q31_t)0x819e1cfd, (q31_t)0x1442da43, (q31_t)0x819d1e3a,
-  (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x143671bb, (q31_t)0x819b219e, (q31_t)0x14303d65, (q31_t)0x819a23c5, (q31_t)0x142a0902, (q31_t)0x8199263a,
-  (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x141da016, (q31_t)0x81972c0e, (q31_t)0x14176b8e, (q31_t)0x81962f6d, (q31_t)0x141136f9, (q31_t)0x8195331a,
-  (q31_t)0x140b0258, (q31_t)0x81943715, (q31_t)0x1404cdaa, (q31_t)0x81933b5e, (q31_t)0x13fe98f1, (q31_t)0x81923ff4, (q31_t)0x13f8642a, (q31_t)0x819144d9,
-  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13ebfa79, (q31_t)0x818f4f8d, (q31_t)0x13e5c58e, (q31_t)0x818e555c, (q31_t)0x13df9097, (q31_t)0x818d5b78,
-  (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13d32683, (q31_t)0x818b689c, (q31_t)0x13ccf167, (q31_t)0x818a6fa3, (q31_t)0x13c6bc3f, (q31_t)0x818976f8,
-  (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13ba51ca, (q31_t)0x8187868b, (q31_t)0x13b41c7d, (q31_t)0x81868eca, (q31_t)0x13ade724, (q31_t)0x81859757,
-  (q31_t)0x13a7b1bf, (q31_t)0x8184a032, (q31_t)0x13a17c4d, (q31_t)0x8183a95b, (q31_t)0x139b46d0, (q31_t)0x8182b2d1, (q31_t)0x13951146, (q31_t)0x8181bc96,
-  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x1388a60f, (q31_t)0x817fd10a, (q31_t)0x13827062, (q31_t)0x817edbb9, (q31_t)0x137c3aa8, (q31_t)0x817de6b6,
-  (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x136fcf10, (q31_t)0x817bfd9b, (q31_t)0x13699933, (q31_t)0x817b0982, (q31_t)0x13636349, (q31_t)0x817a15b7,
-  (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x1356f752, (q31_t)0x81782f0b, (q31_t)0x1350c144, (q31_t)0x81773c2b, (q31_t)0x134a8b2b, (q31_t)0x81764998,
-  (q31_t)0x13445505, (q31_t)0x81755754, (q31_t)0x133e1ed4, (q31_t)0x8174655d, (q31_t)0x1337e897, (q31_t)0x817373b5, (q31_t)0x1331b24e, (q31_t)0x8172825a,
-  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x13254599, (q31_t)0x8170a090, (q31_t)0x131f0f2c, (q31_t)0x816fb020, (q31_t)0x1318d8b4, (q31_t)0x816ebffe,
-  (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x130c6ba0, (q31_t)0x816ce0a4, (q31_t)0x13063505, (q31_t)0x816bf16c, (q31_t)0x12fffe5d, (q31_t)0x816b0282,
-  (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12f390ec, (q31_t)0x81692599, (q31_t)0x12ed5a21, (q31_t)0x81683799, (q31_t)0x12e7234b, (q31_t)0x816749e8,
-  (q31_t)0x12e0ec6a, (q31_t)0x81665c84, (q31_t)0x12dab57c, (q31_t)0x81656f6f, (q31_t)0x12d47e83, (q31_t)0x816482a8, (q31_t)0x12ce477f, (q31_t)0x8163962f,
-  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12c1d953, (q31_t)0x8161be27, (q31_t)0x12bba22b, (q31_t)0x8160d298, (q31_t)0x12b56af9, (q31_t)0x815fe758,
-  (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x12a8fc70, (q31_t)0x815e11c1, (q31_t)0x12a2c51b, (q31_t)0x815d276a, (q31_t)0x129c8dba, (q31_t)0x815c3d62,
-  (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x12901ed5, (q31_t)0x815a6a3c, (q31_t)0x1289e752, (q31_t)0x8159811e, (q31_t)0x1283afc3, (q31_t)0x8158984e,
-  (q31_t)0x127d7829, (q31_t)0x8157afcd, (q31_t)0x12774083, (q31_t)0x8156c799, (q31_t)0x127108d2, (q31_t)0x8155dfb4, (q31_t)0x126ad116, (q31_t)0x8154f81d,
-  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x125e617b, (q31_t)0x815329d9, (q31_t)0x1258299c, (q31_t)0x8152432c, (q31_t)0x1251f1b3, (q31_t)0x81515ccd,
-  (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x124581bd, (q31_t)0x814f90fb, (q31_t)0x123f49b2, (q31_t)0x814eab86, (q31_t)0x1239119b, (q31_t)0x814dc660,
-  (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x122ca14b, (q31_t)0x814bfcff, (q31_t)0x12266913, (q31_t)0x814b18c3, (q31_t)0x122030cf, (q31_t)0x814a34d6,
-  (q31_t)0x1219f880, (q31_t)0x81495136, (q31_t)0x1213c026, (q31_t)0x81486de5, (q31_t)0x120d87c1, (q31_t)0x81478ae2, (q31_t)0x12074f50, (q31_t)0x8146a82e,
-  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11fade4e, (q31_t)0x8144e3ae, (q31_t)0x11f4a5bd, (q31_t)0x814401e4, (q31_t)0x11ee6d20, (q31_t)0x81432068,
-  (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11e1fbc5, (q31_t)0x81415e5a, (q31_t)0x11dbc307, (q31_t)0x81407dc9, (q31_t)0x11d58a3e, (q31_t)0x813f9d86,
-  (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11c9188b, (q31_t)0x813ddde9, (q31_t)0x11c2dfa2, (q31_t)0x813cfe91, (q31_t)0x11bca6ad, (q31_t)0x813c1f86,
-  (q31_t)0x11b66dad, (q31_t)0x813b40ca, (q31_t)0x11b034a2, (q31_t)0x813a625b, (q31_t)0x11a9fb8d, (q31_t)0x8139843b, (q31_t)0x11a3c26c, (q31_t)0x8138a66a,
-  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1197500a, (q31_t)0x8136ebb1, (q31_t)0x119116c9, (q31_t)0x81360ec9, (q31_t)0x118add7d, (q31_t)0x81353230,
-  (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x117e6ac5, (q31_t)0x813379e9, (q31_t)0x11783159, (q31_t)0x81329e3b, (q31_t)0x1171f7e2, (q31_t)0x8131c2db,
-  (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x116584d3, (q31_t)0x81300d05, (q31_t)0x115f4b3c, (q31_t)0x812f3290, (q31_t)0x1159119a, (q31_t)0x812e5868,
-  (q31_t)0x1152d7ed, (q31_t)0x812d7e8f, (q31_t)0x114c9e35, (q31_t)0x812ca505, (q31_t)0x11466473, (q31_t)0x812bcbc8, (q31_t)0x11402aa6, (q31_t)0x812af2da,
-  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x1133b6ed, (q31_t)0x812941e8, (q31_t)0x112d7d00, (q31_t)0x812869e4, (q31_t)0x11274309, (q31_t)0x8127922f,
-  (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x111acefb, (q31_t)0x8125e3af, (q31_t)0x111494e4, (q31_t)0x81250ce4, (q31_t)0x110e5ac2, (q31_t)0x81243668,
-  (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x1101e65f, (q31_t)0x81228a5a, (q31_t)0x10fbac1e, (q31_t)0x8121b4c8, (q31_t)0x10f571d3, (q31_t)0x8120df85,
-  (q31_t)0x10ef377d, (q31_t)0x81200a90, (q31_t)0x10e8fd1c, (q31_t)0x811f35e9, (q31_t)0x10e2c2b2, (q31_t)0x811e6191, (q31_t)0x10dc883c, (q31_t)0x811d8d86,
-  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10d01333, (q31_t)0x811be65d, (q31_t)0x10c9d89e, (q31_t)0x811b133d, (q31_t)0x10c39dff, (q31_t)0x811a406c,
-  (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10b728a3, (q31_t)0x81189bb4, (q31_t)0x10b0ede5, (q31_t)0x8117c9ce, (q31_t)0x10aab31d, (q31_t)0x8116f836,
-  (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x109e3d6e, (q31_t)0x811555f1, (q31_t)0x10980287, (q31_t)0x81148544, (q31_t)0x1091c796, (q31_t)0x8113b4e5,
-  (q31_t)0x108b8c9b, (q31_t)0x8112e4d4, (q31_t)0x10855195, (q31_t)0x81121512, (q31_t)0x107f1686, (q31_t)0x8111459e, (q31_t)0x1078db6c, (q31_t)0x81107678,
-  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x106c651a, (q31_t)0x810ed917, (q31_t)0x106629e1, (q31_t)0x810e0adc, (q31_t)0x105fee9f, (q31_t)0x810d3cf0,
-  (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x105377fc, (q31_t)0x810ba202, (q31_t)0x104d3c9b, (q31_t)0x810ad500, (q31_t)0x10470130, (q31_t)0x810a084d,
-  (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x103a8a3d, (q31_t)0x81086fd1, (q31_t)0x10344eb4, (q31_t)0x8107a409, (q31_t)0x102e1321, (q31_t)0x8106d88f,
-  (q31_t)0x1027d784, (q31_t)0x81060d63, (q31_t)0x10219bdd, (q31_t)0x81054286, (q31_t)0x101b602d, (q31_t)0x810477f7, (q31_t)0x10152472, (q31_t)0x8103adb6,
-  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0x1008acdf, (q31_t)0x81021a20, (q31_t)0x10027107, (q31_t)0x810150ca, (q31_t)0xffc3524, (q31_t)0x810087c3,
-  (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfefbd42, (q31_t)0x80fef69f, (q31_t)0xfe98143, (q31_t)0x80fe2e83, (q31_t)0xfe34539, (q31_t)0x80fd66b5,
-  (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfd6cd08, (q31_t)0x80fbd804, (q31_t)0xfd090e1, (q31_t)0x80fb1121, (q31_t)0xfca54b1, (q31_t)0x80fa4a8c,
-  (q31_t)0xfc41876, (q31_t)0x80f98446, (q31_t)0xfbddc32, (q31_t)0x80f8be4e, (q31_t)0xfb79fe4, (q31_t)0x80f7f8a4, (q31_t)0xfb1638d, (q31_t)0x80f73349,
-  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xfa4eac0, (q31_t)0x80f5a97e, (q31_t)0xf9eae4c, (q31_t)0x80f4e50e, (q31_t)0xf9871ce, (q31_t)0x80f420ec,
-  (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf8bf8b4, (q31_t)0x80f29994, (q31_t)0xf85bc19, (q31_t)0x80f1d65d, (q31_t)0xf7f7f75, (q31_t)0x80f11375,
-  (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf73060f, (q31_t)0x80ef8e90, (q31_t)0xf6cc94e, (q31_t)0x80eecc93, (q31_t)0xf668c83, (q31_t)0x80ee0ae4,
-  (q31_t)0xf604faf, (q31_t)0x80ed4984, (q31_t)0xf5a12d1, (q31_t)0x80ec8872, (q31_t)0xf53d5ea, (q31_t)0x80ebc7ae, (q31_t)0xf4d98f9, (q31_t)0x80eb0739,
-  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf411efb, (q31_t)0x80e9873a, (q31_t)0xf3ae1ee, (q31_t)0x80e8c7b0, (q31_t)0xf34a4d8, (q31_t)0x80e80874,
-  (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf282a8f, (q31_t)0x80e68ae8, (q31_t)0xf21ed5d, (q31_t)0x80e5cc98, (q31_t)0xf1bb021, (q31_t)0x80e50e96,
-  (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xf0f358e, (q31_t)0x80e3937d, (q31_t)0xf08f836, (q31_t)0x80e2d666, (q31_t)0xf02bad5, (q31_t)0x80e2199e,
-  (q31_t)0xefc7d6b, (q31_t)0x80e15d24, (q31_t)0xef63ff7, (q31_t)0x80e0a0f8, (q31_t)0xef0027b, (q31_t)0x80dfe51b, (q31_t)0xee9c4f5, (q31_t)0x80df298c,
-  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xedd49ce, (q31_t)0x80ddb35a, (q31_t)0xed70c2c, (q31_t)0x80dcf8b7, (q31_t)0xed0ce82, (q31_t)0x80dc3e62,
-  (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xec45311, (q31_t)0x80dacaa3, (q31_t)0xebe154b, (q31_t)0x80da1139, (q31_t)0xeb7d77c, (q31_t)0x80d9581e,
-  (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xeab5bc3, (q31_t)0x80d7e6d3, (q31_t)0xea51dd8, (q31_t)0x80d72ea3, (q31_t)0xe9edfe5, (q31_t)0x80d676c1,
-  (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e, (q31_t)0xe9263e3, (q31_t)0x80d507e9, (q31_t)0xe8c25d5, (q31_t)0x80d450f3, (q31_t)0xe85e7be, (q31_t)0x80d39a4b,
-  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe796b74, (q31_t)0x80d22de7, (q31_t)0xe732d42, (q31_t)0x80d1782a, (q31_t)0xe6cef07, (q31_t)0x80d0c2bc,
-  (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe607277, (q31_t)0x80cf58cc, (q31_t)0xe5a3421, (q31_t)0x80cea449, (q31_t)0xe53f5c2, (q31_t)0x80cdf015,
-  (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe4778eb, (q31_t)0x80cc8898, (q31_t)0xe413a72, (q31_t)0x80cbd54f, (q31_t)0xe3afbf0, (q31_t)0x80cb2255,
-  (q31_t)0xe34bd66, (q31_t)0x80ca6fa9, (q31_t)0xe2e7ed2, (q31_t)0x80c9bd4c, (q31_t)0xe284036, (q31_t)0x80c90b3d, (q31_t)0xe220191, (q31_t)0x80c8597c,
-  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe15842e, (q31_t)0x80c6f6e7, (q31_t)0xe0f456f, (q31_t)0x80c64612, (q31_t)0xe0906a7, (q31_t)0x80c5958b,
-  (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xdfc88fe, (q31_t)0x80c4356a, (q31_t)0xdf64a1c, (q31_t)0x80c385cf, (q31_t)0xdf00b32, (q31_t)0x80c2d682,
-  (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xde38d44, (q31_t)0x80c178d4, (q31_t)0xddd4e40, (q31_t)0x80c0ca73, (q31_t)0xdd70f34, (q31_t)0x80c01c60,
-  (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c, (q31_t)0xdca9102, (q31_t)0x80bec127, (q31_t)0xdc451dc, (q31_t)0x80be13ff, (q31_t)0xdbe12ad, (q31_t)0x80bd6727,
-  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xdb19437, (q31_t)0x80bc0e61, (q31_t)0xdab54ef, (q31_t)0x80bb6274, (q31_t)0xda5159f, (q31_t)0x80bab6d5,
-  (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd9896e5, (q31_t)0x80b96083, (q31_t)0xd92577b, (q31_t)0x80b8b5d0, (q31_t)0xd8c1809, (q31_t)0x80b80b6c,
-  (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd7f990c, (q31_t)0x80b6b78e, (q31_t)0xd795982, (q31_t)0x80b60e15, (q31_t)0xd7319ee, (q31_t)0x80b564ea,
-  (q31_t)0xd6cda53, (q31_t)0x80b4bc0e, (q31_t)0xd669aaf, (q31_t)0x80b41381, (q31_t)0xd605b03, (q31_t)0x80b36b42, (q31_t)0xd5a1b4f, (q31_t)0x80b2c351,
-  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd4d9bcd, (q31_t)0x80b1745c, (q31_t)0xd475c00, (q31_t)0x80b0cd57, (q31_t)0xd411c2b, (q31_t)0x80b026a1,
-  (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd349c68, (q31_t)0x80aeda20, (q31_t)0xd2e5c7b, (q31_t)0x80ae3455, (q31_t)0xd281c85, (q31_t)0x80ad8ed9,
-  (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd1b9c81, (q31_t)0x80ac44cc, (q31_t)0xd155c73, (q31_t)0x80aba03b, (q31_t)0xd0f1c5d, (q31_t)0x80aafbf9,
-  (q31_t)0xd08dc3f, (q31_t)0x80aa5806, (q31_t)0xd029c18, (q31_t)0x80a9b461, (q31_t)0xcfc5bea, (q31_t)0x80a9110b, (q31_t)0xcf61bb4, (q31_t)0x80a86e03,
-  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xce99b2f, (q31_t)0x80a728df, (q31_t)0xce35ae1, (q31_t)0x80a686c2, (q31_t)0xcdd1a8b, (q31_t)0x80a5e4f5,
-  (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcd099c7, (q31_t)0x80a4a245, (q31_t)0xcca5959, (q31_t)0x80a40163, (q31_t)0xcc418e3, (q31_t)0x80a360d0,
-  (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xcb797e0, (q31_t)0x80a22095, (q31_t)0xcb15752, (q31_t)0x80a180ed, (q31_t)0xcab16bd, (q31_t)0x80a0e194,
-  (q31_t)0xca4d620, (q31_t)0x80a04289, (q31_t)0xc9e957b, (q31_t)0x809fa3cd, (q31_t)0xc9854cf, (q31_t)0x809f0560, (q31_t)0xc92141a, (q31_t)0x809e6741,
-  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc85929a, (q31_t)0x809d2bef, (q31_t)0xc7f51cf, (q31_t)0x809c8ebc, (q31_t)0xc7910fb, (q31_t)0x809bf1d7,
-  (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc6c8f3e, (q31_t)0x809ab8fa, (q31_t)0xc664e53, (q31_t)0x809a1d01, (q31_t)0xc600d61, (q31_t)0x80998157,
-  (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc538b66, (q31_t)0x80984aee, (q31_t)0xc4d4a5d, (q31_t)0x8097b030, (q31_t)0xc47094d, (q31_t)0x809715c0,
-  (q31_t)0xc40c835, (q31_t)0x80967b9f, (q31_t)0xc3a8715, (q31_t)0x8095e1cc, (q31_t)0xc3445ee, (q31_t)0x80954848, (q31_t)0xc2e04c0, (q31_t)0x8094af13,
-  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc21824c, (q31_t)0x80937d93, (q31_t)0xc1b4107, (q31_t)0x8092e54a, (q31_t)0xc14ffba, (q31_t)0x80924d4f,
-  (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xc087d0a, (q31_t)0x80911e44, (q31_t)0xc023ba7, (q31_t)0x80908735, (q31_t)0xbfbfa3d, (q31_t)0x808ff074,
-  (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbef7752, (q31_t)0x808ec3df, (q31_t)0xbe935d2, (q31_t)0x808e2e0a, (q31_t)0xbe2f44a, (q31_t)0x808d9884,
-  (q31_t)0xbdcb2bb, (q31_t)0x808d034c, (q31_t)0xbd67124, (q31_t)0x808c6e63, (q31_t)0xbd02f87, (q31_t)0x808bd9c9, (q31_t)0xbc9ede2, (q31_t)0x808b457d,
-  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbbd6a82, (q31_t)0x808a1dd2, (q31_t)0xbb728c7, (q31_t)0x80898a72, (q31_t)0xbb0e705, (q31_t)0x8088f761,
-  (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xba4636b, (q31_t)0x8087d22a, (q31_t)0xb9e2193, (q31_t)0x80874005, (q31_t)0xb97dfb5, (q31_t)0x8086ae2e,
-  (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb8b5be1, (q31_t)0x80858b6c, (q31_t)0xb8519ed, (q31_t)0x8084fa82, (q31_t)0xb7ed7f2, (q31_t)0x808469e5,
-  (q31_t)0xb7895f0, (q31_t)0x8083d998, (q31_t)0xb7253e6, (q31_t)0x80834999, (q31_t)0xb6c11d5, (q31_t)0x8082b9e9, (q31_t)0xb65cfbe, (q31_t)0x80822a87,
-  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb594b7a, (q31_t)0x80810cb0, (q31_t)0xb53094d, (q31_t)0x80807e3a, (q31_t)0xb4cc719, (q31_t)0x807ff013,
-  (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb40429d, (q31_t)0x807ed4b1, (q31_t)0xb3a0055, (q31_t)0x807e4776, (q31_t)0xb33be05, (q31_t)0x807dba89,
-  (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb273952, (q31_t)0x807ca19c, (q31_t)0xb20f6ee, (q31_t)0x807c159c, (q31_t)0xb1ab483, (q31_t)0x807b89ea,
-  (q31_t)0xb147211, (q31_t)0x807afe87, (q31_t)0xb0e2f98, (q31_t)0x807a7373, (q31_t)0xb07ed19, (q31_t)0x8079e8ad, (q31_t)0xb01aa92, (q31_t)0x80795e36,
-  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xaf52571, (q31_t)0x80784a33, (q31_t)0xaeee2d7, (q31_t)0x8077c0a8, (q31_t)0xae8a036, (q31_t)0x8077376c,
-  (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xadc1adf, (q31_t)0x807625df, (q31_t)0xad5d829, (q31_t)0x80759d8e, (q31_t)0xacf956d, (q31_t)0x8075158c,
-  (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xac30fe1, (q31_t)0x80740675, (q31_t)0xabccd11, (q31_t)0x80737f5f, (q31_t)0xab68a3a, (q31_t)0x8072f898,
-  (q31_t)0xab0475c, (q31_t)0x8072721f, (q31_t)0xaaa0478, (q31_t)0x8071ebf6, (q31_t)0xaa3c18e, (q31_t)0x8071661a, (q31_t)0xa9d7e9d, (q31_t)0x8070e08e,
-  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa90f8a7, (q31_t)0x806fd661, (q31_t)0xa8ab5a2, (q31_t)0x806f51c1, (q31_t)0xa847297, (q31_t)0x806ecd6f,
-  (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa77ec6d, (q31_t)0x806dc5b8, (q31_t)0xa71a94f, (q31_t)0x806d4253, (q31_t)0xa6b662a, (q31_t)0x806cbf3c,
-  (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa5edfcc, (q31_t)0x806bb9fa, (q31_t)0xa589c94, (q31_t)0x806b37cf, (q31_t)0xa525955, (q31_t)0x806ab5f3,
-  (q31_t)0xa4c1610, (q31_t)0x806a3466, (q31_t)0xa45d2c5, (q31_t)0x8069b327, (q31_t)0xa3f8f73, (q31_t)0x80693237, (q31_t)0xa394c1b, (q31_t)0x8068b196,
-  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa2cc558, (q31_t)0x8067b13f, (q31_t)0xa2681ed, (q31_t)0x8067318a, (q31_t)0xa203e7c, (q31_t)0x8066b224,
-  (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa13b787, (q31_t)0x8065b443, (q31_t)0xa0d7403, (q31_t)0x806535c9, (q31_t)0xa073079, (q31_t)0x8064b79d,
-  (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9faa952, (q31_t)0x8063bc32, (q31_t)0x9f465b5, (q31_t)0x80633ef3, (q31_t)0x9ee2213, (q31_t)0x8062c202,
-  (q31_t)0x9e7de6a, (q31_t)0x80624560, (q31_t)0x9e19abb, (q31_t)0x8061c90c, (q31_t)0x9db5706, (q31_t)0x80614d08, (q31_t)0x9d5134b, (q31_t)0x8060d152,
-  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9c88bc2, (q31_t)0x805fdad2, (q31_t)0x9c247f5, (q31_t)0x805f6009, (q31_t)0x9bc0421, (q31_t)0x805ee58e,
-  (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x9af7c69, (q31_t)0x805df184, (q31_t)0x9a93884, (q31_t)0x805d77f5, (q31_t)0x9a2f498, (q31_t)0x805cfeb5,
-  (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x9966cb0, (q31_t)0x805c0d21, (q31_t)0x99028b3, (q31_t)0x805b94ce, (q31_t)0x989e4b0, (q31_t)0x805b1cc8,
-  (q31_t)0x983a0a7, (q31_t)0x805aa512, (q31_t)0x97d5c99, (q31_t)0x805a2daa, (q31_t)0x9771884, (q31_t)0x8059b692, (q31_t)0x970d46a, (q31_t)0x80593fc7,
-  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9644c23, (q31_t)0x8058531f, (q31_t)0x95e07f8, (q31_t)0x8057dd41, (q31_t)0x957c3c6, (q31_t)0x805767b2,
-  (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x94b3b52, (q31_t)0x80567d80, (q31_t)0x944f70f, (q31_t)0x805608dd, (q31_t)0x93eb2c6, (q31_t)0x80559489,
-  (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x9322a24, (q31_t)0x8054accd, (q31_t)0x92be5ca, (q31_t)0x80543965, (q31_t)0x925a16b, (q31_t)0x8053c64c,
-  (q31_t)0x91f5d06, (q31_t)0x80535381, (q31_t)0x919189c, (q31_t)0x8052e106, (q31_t)0x912d42c, (q31_t)0x80526ed9, (q31_t)0x90c8fb6, (q31_t)0x8051fcfb,
-  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x90006ba, (q31_t)0x80511a2b, (q31_t)0x8f9c233, (q31_t)0x8050a939, (q31_t)0x8f37da7, (q31_t)0x80503896,
-  (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8e6f47f, (q31_t)0x804f583c, (q31_t)0x8e0afe2, (q31_t)0x804ee885, (q31_t)0x8da6b40, (q31_t)0x804e791d,
-  (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8cde1ec, (q31_t)0x804d9b39, (q31_t)0x8c79d3a, (q31_t)0x804d2cbd, (q31_t)0x8c15882, (q31_t)0x804cbe90,
-  (q31_t)0x8bb13c5, (q31_t)0x804c50b2, (q31_t)0x8b4cf02, (q31_t)0x804be323, (q31_t)0x8ae8a3a, (q31_t)0x804b75e2, (q31_t)0x8a8456d, (q31_t)0x804b08f0,
-  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x89bbbc3, (q31_t)0x804a2ff9, (q31_t)0x89576e5, (q31_t)0x8049c3f3, (q31_t)0x88f3203, (q31_t)0x8049583d,
-  (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x882a82e, (q31_t)0x804881bb, (q31_t)0x87c633c, (q31_t)0x804816f1, (q31_t)0x8761e44, (q31_t)0x8047ac75,
-  (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x8699445, (q31_t)0x8046d86a, (q31_t)0x8634f3e, (q31_t)0x80466edb, (q31_t)0x85d0a32, (q31_t)0x8046059b,
-  (q31_t)0x856c520, (q31_t)0x80459ca9, (q31_t)0x850800a, (q31_t)0x80453406, (q31_t)0x84a3aee, (q31_t)0x8044cbb2, (q31_t)0x843f5cd, (q31_t)0x804463ad,
-  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8376b7c, (q31_t)0x8043948e, (q31_t)0x831264c, (q31_t)0x80432d75, (q31_t)0x82ae117, (q31_t)0x8042c6ab,
-  (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x81e569d, (q31_t)0x8041fa03, (q31_t)0x8181159, (q31_t)0x80419425, (q31_t)0x811cc10, (q31_t)0x80412e96,
-  (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x805416e, (q31_t)0x80406465, (q31_t)0x7fefc16, (q31_t)0x803fffc2, (q31_t)0x7f8b6b9, (q31_t)0x803f9b6f,
-  (q31_t)0x7f27157, (q31_t)0x803f376a, (q31_t)0x7ec2bf0, (q31_t)0x803ed3b3, (q31_t)0x7e5e685, (q31_t)0x803e704c, (q31_t)0x7dfa114, (q31_t)0x803e0d34,
-  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7d31624, (q31_t)0x803d47ef, (q31_t)0x7ccd0a5, (q31_t)0x803ce5c3, (q31_t)0x7c68b21, (q31_t)0x803c83e5,
-  (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7ba000b, (q31_t)0x803bc117, (q31_t)0x7b3ba78, (q31_t)0x803b6026, (q31_t)0x7ad74e1, (q31_t)0x803aff84,
-  (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x7a0e9a5, (q31_t)0x803a3f2d, (q31_t)0x79aa400, (q31_t)0x8039df77, (q31_t)0x7945e56, (q31_t)0x80398010,
-  (q31_t)0x78e18a7, (q31_t)0x803920f8, (q31_t)0x787d2f4, (q31_t)0x8038c22f, (q31_t)0x7818d3c, (q31_t)0x803863b5, (q31_t)0x77b4780, (q31_t)0x80380589,
-  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x76ebbf9, (q31_t)0x80374a1f, (q31_t)0x768762e, (q31_t)0x8036ece0, (q31_t)0x762305f, (q31_t)0x80368fef,
-  (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x755a4b4, (q31_t)0x8035d6fb, (q31_t)0x74f5ed7, (q31_t)0x80357af8, (q31_t)0x74918f6, (q31_t)0x80351f43,
-  (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x73c8d27, (q31_t)0x803468c5, (q31_t)0x7364738, (q31_t)0x80340dfd, (q31_t)0x7300145, (q31_t)0x8033b383,
-  (q31_t)0x729bb4e, (q31_t)0x80335959, (q31_t)0x7237552, (q31_t)0x8032ff7d, (q31_t)0x71d2f52, (q31_t)0x8032a5ef, (q31_t)0x716e94e, (q31_t)0x80324cb1,
-  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x70a5d37, (q31_t)0x80319b21, (q31_t)0x7041726, (q31_t)0x803142cf, (q31_t)0x6fdd110, (q31_t)0x8030eacd,
-  (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6f144d7, (q31_t)0x80303bb3, (q31_t)0x6eafeb4, (q31_t)0x802fe49d, (q31_t)0x6e4b88d, (q31_t)0x802f8dd5,
-  (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6d82c32, (q31_t)0x802ee133, (q31_t)0x6d1e5fe, (q31_t)0x802e8b58, (q31_t)0x6cb9fc6, (q31_t)0x802e35cb,
-  (q31_t)0x6c5598a, (q31_t)0x802de08e, (q31_t)0x6bf1349, (q31_t)0x802d8ba0, (q31_t)0x6b8cd05, (q31_t)0x802d3700, (q31_t)0x6b286bc, (q31_t)0x802ce2af,
-  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6a5fa1e, (q31_t)0x802c3afa, (q31_t)0x69fb3c9, (q31_t)0x802be796, (q31_t)0x6996d70, (q31_t)0x802b9480,
-  (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x68ce0b2, (q31_t)0x802aef42, (q31_t)0x6869a4c, (q31_t)0x802a9d19, (q31_t)0x68053e3, (q31_t)0x802a4b3f,
-  (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x673c704, (q31_t)0x8029a878, (q31_t)0x66d808f, (q31_t)0x8029578b, (q31_t)0x6673a16, (q31_t)0x802906ec,
-  (q31_t)0x660f398, (q31_t)0x8028b69c, (q31_t)0x65aad17, (q31_t)0x8028669b, (q31_t)0x6546692, (q31_t)0x802816e9, (q31_t)0x64e2009, (q31_t)0x8027c786,
-  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x64192eb, (q31_t)0x802729ad, (q31_t)0x63b4c57, (q31_t)0x8026db36, (q31_t)0x63505be, (q31_t)0x80268d0e,
-  (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x6287882, (q31_t)0x8025f1ac, (q31_t)0x62231de, (q31_t)0x8025a471, (q31_t)0x61beb36, (q31_t)0x80255784,
-  (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x60f5ddc, (q31_t)0x8024be99, (q31_t)0x6091729, (q31_t)0x80247299, (q31_t)0x602d072, (q31_t)0x802426e8,
-  (q31_t)0x5fc89b8, (q31_t)0x8023db86, (q31_t)0x5f642fa, (q31_t)0x80239073, (q31_t)0x5effc38, (q31_t)0x802345af, (q31_t)0x5e9b572, (q31_t)0x8022fb3a,
-  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5dd27dd, (q31_t)0x8022673c, (q31_t)0x5d6e10c, (q31_t)0x80221db3, (q31_t)0x5d09a38, (q31_t)0x8021d47a,
-  (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5c40c86, (q31_t)0x802142f3, (q31_t)0x5bdc5a7, (q31_t)0x8020faa6, (q31_t)0x5b77ec5, (q31_t)0x8020b2a7,
-  (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5aaf0f6, (q31_t)0x80202397, (q31_t)0x5a4aa09, (q31_t)0x801fdc86, (q31_t)0x59e6319, (q31_t)0x801f95c3,
-  (q31_t)0x5981c26, (q31_t)0x801f4f4f, (q31_t)0x591d52f, (q31_t)0x801f092a, (q31_t)0x58b8e34, (q31_t)0x801ec354, (q31_t)0x5854736, (q31_t)0x801e7dcd,
-  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x578b930, (q31_t)0x801df3ab, (q31_t)0x5727228, (q31_t)0x801daf11, (q31_t)0x56c2b1c, (q31_t)0x801d6ac5,
-  (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x55f9cfb, (q31_t)0x801ce31a, (q31_t)0x55955e6, (q31_t)0x801c9fbb, (q31_t)0x5530ecd, (q31_t)0x801c5cab,
-  (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x5468092, (q31_t)0x801bd777, (q31_t)0x540396f, (q31_t)0x801b9554, (q31_t)0x539f249, (q31_t)0x801b537f,
-  (q31_t)0x533ab20, (q31_t)0x801b11fa, (q31_t)0x52d63f4, (q31_t)0x801ad0c3, (q31_t)0x5271cc4, (q31_t)0x801a8fdb, (q31_t)0x520d592, (q31_t)0x801a4f42,
-  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5144723, (q31_t)0x8019cefd, (q31_t)0x50dffe7, (q31_t)0x80198f50, (q31_t)0x507b8a8, (q31_t)0x80194ff3,
-  (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4fb2a20, (q31_t)0x8018d225, (q31_t)0x4f4e2d8, (q31_t)0x801893b4, (q31_t)0x4ee9b8c, (q31_t)0x80185592,
-  (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4e20cec, (q31_t)0x8017da3b, (q31_t)0x4dbc597, (q31_t)0x80179d06, (q31_t)0x4d57e40, (q31_t)0x80176020,
-  (q31_t)0x4cf36e5, (q31_t)0x80172388, (q31_t)0x4c8ef88, (q31_t)0x8016e740, (q31_t)0x4c2a827, (q31_t)0x8016ab46, (q31_t)0x4bc60c4, (q31_t)0x80166f9c,
-  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x4afd1f4, (q31_t)0x8015f933, (q31_t)0x4a98a88, (q31_t)0x8015be75, (q31_t)0x4a34319, (q31_t)0x80158406,
-  (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x496b432, (q31_t)0x80151015, (q31_t)0x4906cbb, (q31_t)0x8014d693, (q31_t)0x48a2540, (q31_t)0x80149d5f,
-  (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x47d9643, (q31_t)0x80142be5, (q31_t)0x4774ec1, (q31_t)0x8013f39e, (q31_t)0x471073b, (q31_t)0x8013bba7,
-  (q31_t)0x46abfb3, (q31_t)0x801383fe, (q31_t)0x4647828, (q31_t)0x80134ca4, (q31_t)0x45e309a, (q31_t)0x80131599, (q31_t)0x457e90a, (q31_t)0x8012dedd,
-  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x44b59e1, (q31_t)0x80127251, (q31_t)0x4451249, (q31_t)0x80123c82, (q31_t)0x43ecaae, (q31_t)0x80120701,
-  (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x4323b70, (q31_t)0x80119ced, (q31_t)0x42bf3cd, (q31_t)0x80116859, (q31_t)0x425ac28, (q31_t)0x80113414,
-  (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x4191cd5, (q31_t)0x8010cc78, (q31_t)0x412d528, (q31_t)0x8010991f, (q31_t)0x40c8d79, (q31_t)0x80106616,
-  (q31_t)0x40645c7, (q31_t)0x8010335c, (q31_t)0x3fffe12, (q31_t)0x801000f1, (q31_t)0x3f9b65b, (q31_t)0x800fced4, (q31_t)0x3f36ea2, (q31_t)0x800f9d07,
-  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3e6df28, (q31_t)0x800f3a59, (q31_t)0x3e09767, (q31_t)0x800f0978, (q31_t)0x3da4fa4, (q31_t)0x800ed8e6,
-  (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3cdc017, (q31_t)0x800e78af, (q31_t)0x3c7784d, (q31_t)0x800e490a, (q31_t)0x3c13080, (q31_t)0x800e19b4,
-  (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3b4a0e0, (q31_t)0x800dbbf5, (q31_t)0x3ae590d, (q31_t)0x800d8d8b, (q31_t)0x3a81137, (q31_t)0x800d5f71,
-  (q31_t)0x3a1c960, (q31_t)0x800d31a5, (q31_t)0x39b8185, (q31_t)0x800d0429, (q31_t)0x39539a9, (q31_t)0x800cd6fb, (q31_t)0x38ef1ca, (q31_t)0x800caa1c,
-  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x3826207, (q31_t)0x800c514c, (q31_t)0x37c1a22, (q31_t)0x800c255a, (q31_t)0x375d23a, (q31_t)0x800bf9b7,
-  (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3694265, (q31_t)0x800ba35d, (q31_t)0x362fa78, (q31_t)0x800b78a7, (q31_t)0x35cb288, (q31_t)0x800b4e40,
-  (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x35022a2, (q31_t)0x800afa5e, (q31_t)0x349daac, (q31_t)0x800ad0e3, (q31_t)0x34392b4, (q31_t)0x800aa7b8,
-  (q31_t)0x33d4abb, (q31_t)0x800a7edb, (q31_t)0x33702bf, (q31_t)0x800a564e, (q31_t)0x330bac1, (q31_t)0x800a2e0f, (q31_t)0x32a72c1, (q31_t)0x800a061f,
-  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x31de2bb, (q31_t)0x8009b72c, (q31_t)0x3179ab5, (q31_t)0x80099029, (q31_t)0x31152ae, (q31_t)0x80096975,
-  (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x304c299, (q31_t)0x80091cf9, (q31_t)0x2fe7a8c, (q31_t)0x8008f732, (q31_t)0x2f8327d, (q31_t)0x8008d1ba,
-  (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2eba259, (q31_t)0x800887b6, (q31_t)0x2e55a44, (q31_t)0x8008632a, (q31_t)0x2df122e, (q31_t)0x80083eed,
-  (q31_t)0x2d8ca16, (q31_t)0x80081b00, (q31_t)0x2d281fc, (q31_t)0x8007f761, (q31_t)0x2cc39e1, (q31_t)0x8007d411, (q31_t)0x2c5f1c3, (q31_t)0x8007b110,
-  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2b96184, (q31_t)0x80076bfb, (q31_t)0x2b31961, (q31_t)0x800749e7, (q31_t)0x2acd13d, (q31_t)0x80072822,
-  (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x2a040f0, (q31_t)0x8006e585, (q31_t)0x299f8c7, (q31_t)0x8006c4ac, (q31_t)0x293b09c, (q31_t)0x8006a423,
-  (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x2872043, (q31_t)0x800663fd, (q31_t)0x280d813, (q31_t)0x80064460, (q31_t)0x27a8fe2, (q31_t)0x80062513,
-  (q31_t)0x27447b0, (q31_t)0x80060614, (q31_t)0x26dff7c, (q31_t)0x8005e764, (q31_t)0x267b747, (q31_t)0x8005c904, (q31_t)0x2616f10, (q31_t)0x8005aaf2,
-  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x254de9e, (q31_t)0x80056fbb, (q31_t)0x24e9662, (q31_t)0x80055296, (q31_t)0x2484e26, (q31_t)0x800535c0,
-  (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x23bbda8, (q31_t)0x8004fd00, (q31_t)0x2357567, (q31_t)0x8004e117, (q31_t)0x22f2d25, (q31_t)0x8004c57d,
-  (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x2229c9d, (q31_t)0x80048f35, (q31_t)0x21c5457, (q31_t)0x80047488, (q31_t)0x2160c0f, (q31_t)0x80045a29,
-  (q31_t)0x20fc3c6, (q31_t)0x8004401a, (q31_t)0x2097b7c, (q31_t)0x80042659, (q31_t)0x2033331, (q31_t)0x80040ce7, (q31_t)0x1fceae4, (q31_t)0x8003f3c5,
-  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1f05a48, (q31_t)0x8003c26c, (q31_t)0x1ea11f7, (q31_t)0x8003aa36, (q31_t)0x1e3c9a6, (q31_t)0x8003924f,
-  (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1d73900, (q31_t)0x8003636e, (q31_t)0x1d0f0ab, (q31_t)0x80034c74, (q31_t)0x1caa855, (q31_t)0x800335c9,
-  (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1be17a6, (q31_t)0x80030960, (q31_t)0x1b7cf4d, (q31_t)0x8002f3a1, (q31_t)0x1b186f3, (q31_t)0x8002de32,
-  (q31_t)0x1ab3e97, (q31_t)0x8002c912, (q31_t)0x1a4f63b, (q31_t)0x8002b440, (q31_t)0x19eaddd, (q31_t)0x80029fbe, (q31_t)0x198657f, (q31_t)0x80028b8a,
-  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x18bd4bf, (q31_t)0x80026410, (q31_t)0x1858c5e, (q31_t)0x800250c9, (q31_t)0x17f43fc, (q31_t)0x80023dd2,
-  (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x172b335, (q31_t)0x800218cf, (q31_t)0x16c6ad0, (q31_t)0x800206c4, (q31_t)0x166226a, (q31_t)0x8001f508,
-  (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x159919c, (q31_t)0x8001d27d, (q31_t)0x1534934, (q31_t)0x8001c1ae, (q31_t)0x14d00ca, (q31_t)0x8001b12e,
-  (q31_t)0x146b860, (q31_t)0x8001a0fd, (q31_t)0x1406ff6, (q31_t)0x8001911b, (q31_t)0x13a278a, (q31_t)0x80018187, (q31_t)0x133df1e, (q31_t)0x80017243,
-  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x1274e43, (q31_t)0x800154a7, (q31_t)0x12105d5, (q31_t)0x80014650, (q31_t)0x11abd66, (q31_t)0x80013847,
-  (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008, (q31_t)0x1019ba2, (q31_t)0x8001033b,
-  (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0x0f50abd, (q31_t)0x8000ea8e, (q31_t)0x0eec249, (q31_t)0x8000deaf, (q31_t)0x0e879d5, (q31_t)0x8000d31e,
-  (q31_t)0x0e23160, (q31_t)0x8000c7dc, (q31_t)0x0dbe8eb, (q31_t)0x8000bce9, (q31_t)0x0d5a075, (q31_t)0x8000b245, (q31_t)0x0cf57ff, (q31_t)0x8000a7f0,
-  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0c2c711, (q31_t)0x80009433, (q31_t)0x0bc7e99, (q31_t)0x80008aca, (q31_t)0x0b63621, (q31_t)0x800081b1,
-  (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x0a9a52f, (q31_t)0x8000706c, (q31_t)0x0a35cb5, (q31_t)0x8000683f, (q31_t)0x09d143b, (q31_t)0x80006062,
-  (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x0908346, (q31_t)0x80005194, (q31_t)0x08a3acb, (q31_t)0x80004aa4, (q31_t)0x083f250, (q31_t)0x80004402,
-  (q31_t)0x07da9d4, (q31_t)0x80003daf, (q31_t)0x0776159, (q31_t)0x800037ac, (q31_t)0x07118dc, (q31_t)0x800031f7, (q31_t)0x06ad060, (q31_t)0x80002c91,
-  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x05e3f66, (q31_t)0x800022b3, (q31_t)0x057f6e9, (q31_t)0x80001e3a, (q31_t)0x051ae6b, (q31_t)0x80001a10,
-  (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x0451d70, (q31_t)0x800012a9, (q31_t)0x03ed4f2, (q31_t)0x80000f6c, (q31_t)0x0388c74, (q31_t)0x80000c7e,
-  (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x02bfb77, (q31_t)0x8000078e, (q31_t)0x025b2f8, (q31_t)0x8000058d, (q31_t)0x01f6a7a, (q31_t)0x800003db,
-  (q31_t)0x01921fb, (q31_t)0x80000278, (q31_t)0x012d97c, (q31_t)0x80000163, (q31_t)0x00c90fe, (q31_t)0x8000009e, (q31_t)0x006487f, (q31_t)0x80000027
-};
-    const q31_t cos_factorsQ31_8192[8192] = {
-  (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56, (q31_t)0x7ffff97c, (q31_t)0x7ffff753,
-  (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5, (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,
-  (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7, (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,
-  (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc, (q31_t)0x7fff708b, (q31_t)0x7fff66fc,
-  (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724, (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,
-  (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be, (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,
-  (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c, (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,
-  (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc, (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,
-  (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720, (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,
-  (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7, (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,
-  (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1, (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,
-  (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf, (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,
-  (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50, (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,
-  (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705, (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,
-  (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe, (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,
-  (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b, (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,
-  (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc, (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,
-  (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082, (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,
-  (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c, (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,
-  (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb, (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,
-  (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f, (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,
-  (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48, (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,
-  (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867, (q31_t)0x7febf048, (q31_t)0x7febb7da,
-  (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc, (q31_t)0x7fea2436, (q31_t)0x7fe9e950,
-  (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177, (q31_t)0x7fe84469, (q31_t)0x7fe8070d,
-  (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068, (q31_t)0x7fe650e3, (q31_t)0x7fe61110,
-  (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0, (q31_t)0x7fe449a4, (q31_t)0x7fe40759,
-  (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f, (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,
-  (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5, (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,
-  (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3, (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,
-  (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349, (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,
-  (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8, (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,
-  (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf, (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,
-  (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff, (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,
-  (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78, (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,
-  (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c, (q31_t)0x7fce9112, (q31_t)0x7fce3898,
-  (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a, (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,
-  (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2, (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,
-  (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046, (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,
-  (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36, (q31_t)0x7fc2e931, (q31_t)0x7fc286de,
-  (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271, (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,
-  (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa, (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,
-  (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf, (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,
-  (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2, (q31_t)0x7fb60614, (q31_t)0x7fb599e7,
-  (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63, (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,
-  (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23, (q31_t)0x7faf1e58, (q31_t)0x7faead3f,
-  (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031, (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,
-  (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811, (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90, (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4,
-  (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac, (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f, (q31_t)0x7fa42f12, (q31_t)0x7fa3b697,
-  (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197, (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f, (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab,
-  (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4, (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90, (q31_t)0x7f9c8278, (q31_t)0x7f9c0511,
-  (q31_t)0x7f9b875b, (q31_t)0x7f9b0957, (q31_t)0x7f9a8b04, (q31_t)0x7f9a0c62, (q31_t)0x7f998d72, (q31_t)0x7f990e33, (q31_t)0x7f988ea5, (q31_t)0x7f980ec8,
-  (q31_t)0x7f978e9d, (q31_t)0x7f970e23, (q31_t)0x7f968d5b, (q31_t)0x7f960c43, (q31_t)0x7f958add, (q31_t)0x7f950929, (q31_t)0x7f948725, (q31_t)0x7f9404d3,
-  (q31_t)0x7f938232, (q31_t)0x7f92ff43, (q31_t)0x7f927c04, (q31_t)0x7f91f878, (q31_t)0x7f91749c, (q31_t)0x7f90f072, (q31_t)0x7f906bf9, (q31_t)0x7f8fe731,
-  (q31_t)0x7f8f621b, (q31_t)0x7f8edcb6, (q31_t)0x7f8e5702, (q31_t)0x7f8dd0ff, (q31_t)0x7f8d4aae, (q31_t)0x7f8cc40f, (q31_t)0x7f8c3d20, (q31_t)0x7f8bb5e3,
-  (q31_t)0x7f8b2e57, (q31_t)0x7f8aa67d, (q31_t)0x7f8a1e54, (q31_t)0x7f8995dc, (q31_t)0x7f890d15, (q31_t)0x7f888400, (q31_t)0x7f87fa9c, (q31_t)0x7f8770ea,
-  (q31_t)0x7f86e6e9, (q31_t)0x7f865c99, (q31_t)0x7f85d1fa, (q31_t)0x7f85470d, (q31_t)0x7f84bbd1, (q31_t)0x7f843047, (q31_t)0x7f83a46e, (q31_t)0x7f831846,
-  (q31_t)0x7f828bcf, (q31_t)0x7f81ff0a, (q31_t)0x7f8171f6, (q31_t)0x7f80e494, (q31_t)0x7f8056e3, (q31_t)0x7f7fc8e3, (q31_t)0x7f7f3a95, (q31_t)0x7f7eabf8,
-  (q31_t)0x7f7e1d0c, (q31_t)0x7f7d8dd2, (q31_t)0x7f7cfe49, (q31_t)0x7f7c6e71, (q31_t)0x7f7bde4b, (q31_t)0x7f7b4dd6, (q31_t)0x7f7abd13, (q31_t)0x7f7a2c01,
-  (q31_t)0x7f799aa0, (q31_t)0x7f7908f0, (q31_t)0x7f7876f2, (q31_t)0x7f77e4a6, (q31_t)0x7f77520a, (q31_t)0x7f76bf21, (q31_t)0x7f762be8, (q31_t)0x7f759861,
-  (q31_t)0x7f75048b, (q31_t)0x7f747067, (q31_t)0x7f73dbf4, (q31_t)0x7f734732, (q31_t)0x7f72b222, (q31_t)0x7f721cc3, (q31_t)0x7f718715, (q31_t)0x7f70f119,
-  (q31_t)0x7f705ace, (q31_t)0x7f6fc435, (q31_t)0x7f6f2d4d, (q31_t)0x7f6e9617, (q31_t)0x7f6dfe91, (q31_t)0x7f6d66be, (q31_t)0x7f6cce9b, (q31_t)0x7f6c362a,
-  (q31_t)0x7f6b9d6b, (q31_t)0x7f6b045d, (q31_t)0x7f6a6b00, (q31_t)0x7f69d154, (q31_t)0x7f69375a, (q31_t)0x7f689d12, (q31_t)0x7f68027b, (q31_t)0x7f676795,
-  (q31_t)0x7f66cc61, (q31_t)0x7f6630de, (q31_t)0x7f65950c, (q31_t)0x7f64f8ec, (q31_t)0x7f645c7d, (q31_t)0x7f63bfc0, (q31_t)0x7f6322b4, (q31_t)0x7f62855a,
-  (q31_t)0x7f61e7b1, (q31_t)0x7f6149b9, (q31_t)0x7f60ab73, (q31_t)0x7f600cdf, (q31_t)0x7f5f6dfb, (q31_t)0x7f5ecec9, (q31_t)0x7f5e2f49, (q31_t)0x7f5d8f7a,
-  (q31_t)0x7f5cef5c, (q31_t)0x7f5c4ef0, (q31_t)0x7f5bae36, (q31_t)0x7f5b0d2c, (q31_t)0x7f5a6bd5, (q31_t)0x7f59ca2e, (q31_t)0x7f592839, (q31_t)0x7f5885f6,
-  (q31_t)0x7f57e364, (q31_t)0x7f574083, (q31_t)0x7f569d54, (q31_t)0x7f55f9d6, (q31_t)0x7f55560a, (q31_t)0x7f54b1ef, (q31_t)0x7f540d86, (q31_t)0x7f5368ce,
-  (q31_t)0x7f52c3c8, (q31_t)0x7f521e73, (q31_t)0x7f5178cf, (q31_t)0x7f50d2dd, (q31_t)0x7f502c9d, (q31_t)0x7f4f860e, (q31_t)0x7f4edf30, (q31_t)0x7f4e3804,
-  (q31_t)0x7f4d9089, (q31_t)0x7f4ce8c0, (q31_t)0x7f4c40a8, (q31_t)0x7f4b9842, (q31_t)0x7f4aef8d, (q31_t)0x7f4a468a, (q31_t)0x7f499d38, (q31_t)0x7f48f398,
-  (q31_t)0x7f4849a9, (q31_t)0x7f479f6c, (q31_t)0x7f46f4e0, (q31_t)0x7f464a06, (q31_t)0x7f459edd, (q31_t)0x7f44f365, (q31_t)0x7f44479f, (q31_t)0x7f439b8b,
-  (q31_t)0x7f42ef28, (q31_t)0x7f424277, (q31_t)0x7f419577, (q31_t)0x7f40e828, (q31_t)0x7f403a8b, (q31_t)0x7f3f8ca0, (q31_t)0x7f3ede66, (q31_t)0x7f3e2fde,
-  (q31_t)0x7f3d8107, (q31_t)0x7f3cd1e2, (q31_t)0x7f3c226e, (q31_t)0x7f3b72ab, (q31_t)0x7f3ac29b, (q31_t)0x7f3a123b, (q31_t)0x7f39618e, (q31_t)0x7f38b091,
-  (q31_t)0x7f37ff47, (q31_t)0x7f374dad, (q31_t)0x7f369bc6, (q31_t)0x7f35e990, (q31_t)0x7f35370b, (q31_t)0x7f348438, (q31_t)0x7f33d116, (q31_t)0x7f331da6,
-  (q31_t)0x7f3269e8, (q31_t)0x7f31b5db, (q31_t)0x7f31017f, (q31_t)0x7f304cd6, (q31_t)0x7f2f97dd, (q31_t)0x7f2ee296, (q31_t)0x7f2e2d01, (q31_t)0x7f2d771e,
-  (q31_t)0x7f2cc0eb, (q31_t)0x7f2c0a6b, (q31_t)0x7f2b539c, (q31_t)0x7f2a9c7e, (q31_t)0x7f29e512, (q31_t)0x7f292d58, (q31_t)0x7f28754f, (q31_t)0x7f27bcf8,
-  (q31_t)0x7f270452, (q31_t)0x7f264b5e, (q31_t)0x7f25921c, (q31_t)0x7f24d88b, (q31_t)0x7f241eab, (q31_t)0x7f23647e, (q31_t)0x7f22aa01, (q31_t)0x7f21ef37,
-  (q31_t)0x7f21341e, (q31_t)0x7f2078b6, (q31_t)0x7f1fbd00, (q31_t)0x7f1f00fc, (q31_t)0x7f1e44a9, (q31_t)0x7f1d8808, (q31_t)0x7f1ccb18, (q31_t)0x7f1c0dda,
-  (q31_t)0x7f1b504e, (q31_t)0x7f1a9273, (q31_t)0x7f19d44a, (q31_t)0x7f1915d2, (q31_t)0x7f18570c, (q31_t)0x7f1797f8, (q31_t)0x7f16d895, (q31_t)0x7f1618e4,
-  (q31_t)0x7f1558e4, (q31_t)0x7f149896, (q31_t)0x7f13d7fa, (q31_t)0x7f13170f, (q31_t)0x7f1255d6, (q31_t)0x7f11944f, (q31_t)0x7f10d279, (q31_t)0x7f101054,
-  (q31_t)0x7f0f4de2, (q31_t)0x7f0e8b21, (q31_t)0x7f0dc811, (q31_t)0x7f0d04b3, (q31_t)0x7f0c4107, (q31_t)0x7f0b7d0d, (q31_t)0x7f0ab8c4, (q31_t)0x7f09f42d,
-  (q31_t)0x7f092f47, (q31_t)0x7f086a13, (q31_t)0x7f07a491, (q31_t)0x7f06dec0, (q31_t)0x7f0618a1, (q31_t)0x7f055233, (q31_t)0x7f048b78, (q31_t)0x7f03c46d,
-  (q31_t)0x7f02fd15, (q31_t)0x7f02356e, (q31_t)0x7f016d79, (q31_t)0x7f00a535, (q31_t)0x7effdca4, (q31_t)0x7eff13c3, (q31_t)0x7efe4a95, (q31_t)0x7efd8118,
-  (q31_t)0x7efcb74d, (q31_t)0x7efbed33, (q31_t)0x7efb22cb, (q31_t)0x7efa5815, (q31_t)0x7ef98d11, (q31_t)0x7ef8c1be, (q31_t)0x7ef7f61d, (q31_t)0x7ef72a2d,
-  (q31_t)0x7ef65def, (q31_t)0x7ef59163, (q31_t)0x7ef4c489, (q31_t)0x7ef3f760, (q31_t)0x7ef329e9, (q31_t)0x7ef25c24, (q31_t)0x7ef18e10, (q31_t)0x7ef0bfae,
-  (q31_t)0x7eeff0fe, (q31_t)0x7eef21ff, (q31_t)0x7eee52b2, (q31_t)0x7eed8317, (q31_t)0x7eecb32d, (q31_t)0x7eebe2f6, (q31_t)0x7eeb1270, (q31_t)0x7eea419b,
-  (q31_t)0x7ee97079, (q31_t)0x7ee89f08, (q31_t)0x7ee7cd49, (q31_t)0x7ee6fb3b, (q31_t)0x7ee628df, (q31_t)0x7ee55635, (q31_t)0x7ee4833d, (q31_t)0x7ee3aff6,
-  (q31_t)0x7ee2dc61, (q31_t)0x7ee2087e, (q31_t)0x7ee1344d, (q31_t)0x7ee05fcd, (q31_t)0x7edf8aff, (q31_t)0x7edeb5e3, (q31_t)0x7edde079, (q31_t)0x7edd0ac0,
-  (q31_t)0x7edc34b9, (q31_t)0x7edb5e64, (q31_t)0x7eda87c0, (q31_t)0x7ed9b0ce, (q31_t)0x7ed8d98e, (q31_t)0x7ed80200, (q31_t)0x7ed72a24, (q31_t)0x7ed651f9,
-  (q31_t)0x7ed57980, (q31_t)0x7ed4a0b9, (q31_t)0x7ed3c7a3, (q31_t)0x7ed2ee40, (q31_t)0x7ed2148e, (q31_t)0x7ed13a8e, (q31_t)0x7ed0603f, (q31_t)0x7ecf85a3,
-  (q31_t)0x7eceaab8, (q31_t)0x7ecdcf7f, (q31_t)0x7eccf3f8, (q31_t)0x7ecc1822, (q31_t)0x7ecb3bff, (q31_t)0x7eca5f8d, (q31_t)0x7ec982cd, (q31_t)0x7ec8a5bf,
-  (q31_t)0x7ec7c862, (q31_t)0x7ec6eab7, (q31_t)0x7ec60cbe, (q31_t)0x7ec52e77, (q31_t)0x7ec44fe2, (q31_t)0x7ec370fe, (q31_t)0x7ec291cd, (q31_t)0x7ec1b24d,
-  (q31_t)0x7ec0d27f, (q31_t)0x7ebff263, (q31_t)0x7ebf11f8, (q31_t)0x7ebe313f, (q31_t)0x7ebd5039, (q31_t)0x7ebc6ee4, (q31_t)0x7ebb8d40, (q31_t)0x7ebaab4f,
-  (q31_t)0x7eb9c910, (q31_t)0x7eb8e682, (q31_t)0x7eb803a6, (q31_t)0x7eb7207c, (q31_t)0x7eb63d04, (q31_t)0x7eb5593d, (q31_t)0x7eb47529, (q31_t)0x7eb390c6,
-  (q31_t)0x7eb2ac15, (q31_t)0x7eb1c716, (q31_t)0x7eb0e1c9, (q31_t)0x7eaffc2e, (q31_t)0x7eaf1645, (q31_t)0x7eae300d, (q31_t)0x7ead4987, (q31_t)0x7eac62b3,
-  (q31_t)0x7eab7b91, (q31_t)0x7eaa9421, (q31_t)0x7ea9ac63, (q31_t)0x7ea8c457, (q31_t)0x7ea7dbfc, (q31_t)0x7ea6f353, (q31_t)0x7ea60a5d, (q31_t)0x7ea52118,
-  (q31_t)0x7ea43785, (q31_t)0x7ea34da4, (q31_t)0x7ea26374, (q31_t)0x7ea178f7, (q31_t)0x7ea08e2b, (q31_t)0x7e9fa312, (q31_t)0x7e9eb7aa, (q31_t)0x7e9dcbf4,
-  (q31_t)0x7e9cdff0, (q31_t)0x7e9bf39e, (q31_t)0x7e9b06fe, (q31_t)0x7e9a1a10, (q31_t)0x7e992cd4, (q31_t)0x7e983f49, (q31_t)0x7e975171, (q31_t)0x7e96634a,
-  (q31_t)0x7e9574d6, (q31_t)0x7e948613, (q31_t)0x7e939702, (q31_t)0x7e92a7a3, (q31_t)0x7e91b7f6, (q31_t)0x7e90c7fb, (q31_t)0x7e8fd7b2, (q31_t)0x7e8ee71b,
-  (q31_t)0x7e8df636, (q31_t)0x7e8d0502, (q31_t)0x7e8c1381, (q31_t)0x7e8b21b1, (q31_t)0x7e8a2f94, (q31_t)0x7e893d28, (q31_t)0x7e884a6f, (q31_t)0x7e875767,
-  (q31_t)0x7e866411, (q31_t)0x7e85706d, (q31_t)0x7e847c7c, (q31_t)0x7e83883c, (q31_t)0x7e8293ae, (q31_t)0x7e819ed2, (q31_t)0x7e80a9a8, (q31_t)0x7e7fb430,
-  (q31_t)0x7e7ebe6a, (q31_t)0x7e7dc856, (q31_t)0x7e7cd1f4, (q31_t)0x7e7bdb44, (q31_t)0x7e7ae446, (q31_t)0x7e79ecf9, (q31_t)0x7e78f55f, (q31_t)0x7e77fd77,
-  (q31_t)0x7e770541, (q31_t)0x7e760cbd, (q31_t)0x7e7513ea, (q31_t)0x7e741aca, (q31_t)0x7e73215c, (q31_t)0x7e7227a0, (q31_t)0x7e712d96, (q31_t)0x7e70333d,
-  (q31_t)0x7e6f3897, (q31_t)0x7e6e3da3, (q31_t)0x7e6d4261, (q31_t)0x7e6c46d1, (q31_t)0x7e6b4af2, (q31_t)0x7e6a4ec6, (q31_t)0x7e69524c, (q31_t)0x7e685584,
-  (q31_t)0x7e67586e, (q31_t)0x7e665b0a, (q31_t)0x7e655d58, (q31_t)0x7e645f58, (q31_t)0x7e63610a, (q31_t)0x7e62626e, (q31_t)0x7e616384, (q31_t)0x7e60644c,
-  (q31_t)0x7e5f64c7, (q31_t)0x7e5e64f3, (q31_t)0x7e5d64d1, (q31_t)0x7e5c6461, (q31_t)0x7e5b63a4, (q31_t)0x7e5a6298, (q31_t)0x7e59613f, (q31_t)0x7e585f97,
-  (q31_t)0x7e575da2, (q31_t)0x7e565b5f, (q31_t)0x7e5558ce, (q31_t)0x7e5455ef, (q31_t)0x7e5352c1, (q31_t)0x7e524f46, (q31_t)0x7e514b7e, (q31_t)0x7e504767,
-  (q31_t)0x7e4f4302, (q31_t)0x7e4e3e4f, (q31_t)0x7e4d394f, (q31_t)0x7e4c3400, (q31_t)0x7e4b2e64, (q31_t)0x7e4a287a, (q31_t)0x7e492241, (q31_t)0x7e481bbb,
-  (q31_t)0x7e4714e7, (q31_t)0x7e460dc5, (q31_t)0x7e450656, (q31_t)0x7e43fe98, (q31_t)0x7e42f68c, (q31_t)0x7e41ee33, (q31_t)0x7e40e58c, (q31_t)0x7e3fdc97,
-  (q31_t)0x7e3ed353, (q31_t)0x7e3dc9c3, (q31_t)0x7e3cbfe4, (q31_t)0x7e3bb5b7, (q31_t)0x7e3aab3c, (q31_t)0x7e39a074, (q31_t)0x7e38955e, (q31_t)0x7e3789fa,
-  (q31_t)0x7e367e48, (q31_t)0x7e357248, (q31_t)0x7e3465fa, (q31_t)0x7e33595e, (q31_t)0x7e324c75, (q31_t)0x7e313f3e, (q31_t)0x7e3031b9, (q31_t)0x7e2f23e6,
-  (q31_t)0x7e2e15c5, (q31_t)0x7e2d0756, (q31_t)0x7e2bf89a, (q31_t)0x7e2ae990, (q31_t)0x7e29da38, (q31_t)0x7e28ca92, (q31_t)0x7e27ba9e, (q31_t)0x7e26aa5d,
-  (q31_t)0x7e2599cd, (q31_t)0x7e2488f0, (q31_t)0x7e2377c5, (q31_t)0x7e22664c, (q31_t)0x7e215486, (q31_t)0x7e204271, (q31_t)0x7e1f300f, (q31_t)0x7e1e1d5f,
-  (q31_t)0x7e1d0a61, (q31_t)0x7e1bf716, (q31_t)0x7e1ae37c, (q31_t)0x7e19cf95, (q31_t)0x7e18bb60, (q31_t)0x7e17a6dd, (q31_t)0x7e16920d, (q31_t)0x7e157cee,
-  (q31_t)0x7e146782, (q31_t)0x7e1351c9, (q31_t)0x7e123bc1, (q31_t)0x7e11256c, (q31_t)0x7e100ec8, (q31_t)0x7e0ef7d7, (q31_t)0x7e0de099, (q31_t)0x7e0cc90c,
-  (q31_t)0x7e0bb132, (q31_t)0x7e0a990a, (q31_t)0x7e098095, (q31_t)0x7e0867d1, (q31_t)0x7e074ec0, (q31_t)0x7e063561, (q31_t)0x7e051bb4, (q31_t)0x7e0401ba,
-  (q31_t)0x7e02e772, (q31_t)0x7e01ccdc, (q31_t)0x7e00b1f9, (q31_t)0x7dff96c7, (q31_t)0x7dfe7b48, (q31_t)0x7dfd5f7b, (q31_t)0x7dfc4361, (q31_t)0x7dfb26f9,
-  (q31_t)0x7dfa0a43, (q31_t)0x7df8ed3f, (q31_t)0x7df7cfee, (q31_t)0x7df6b24f, (q31_t)0x7df59462, (q31_t)0x7df47628, (q31_t)0x7df357a0, (q31_t)0x7df238ca,
-  (q31_t)0x7df119a7, (q31_t)0x7deffa35, (q31_t)0x7deeda77, (q31_t)0x7dedba6a, (q31_t)0x7dec9a10, (q31_t)0x7deb7968, (q31_t)0x7dea5872, (q31_t)0x7de9372f,
-  (q31_t)0x7de8159e, (q31_t)0x7de6f3c0, (q31_t)0x7de5d193, (q31_t)0x7de4af1a, (q31_t)0x7de38c52, (q31_t)0x7de2693d, (q31_t)0x7de145da, (q31_t)0x7de02229,
-  (q31_t)0x7ddefe2b, (q31_t)0x7dddd9e0, (q31_t)0x7ddcb546, (q31_t)0x7ddb905f, (q31_t)0x7dda6b2a, (q31_t)0x7dd945a8, (q31_t)0x7dd81fd8, (q31_t)0x7dd6f9ba,
-  (q31_t)0x7dd5d34f, (q31_t)0x7dd4ac96, (q31_t)0x7dd38590, (q31_t)0x7dd25e3c, (q31_t)0x7dd1369a, (q31_t)0x7dd00eab, (q31_t)0x7dcee66e, (q31_t)0x7dcdbde3,
-  (q31_t)0x7dcc950b, (q31_t)0x7dcb6be6, (q31_t)0x7dca4272, (q31_t)0x7dc918b1, (q31_t)0x7dc7eea3, (q31_t)0x7dc6c447, (q31_t)0x7dc5999d, (q31_t)0x7dc46ea6,
-  (q31_t)0x7dc34361, (q31_t)0x7dc217cf, (q31_t)0x7dc0ebef, (q31_t)0x7dbfbfc1, (q31_t)0x7dbe9346, (q31_t)0x7dbd667d, (q31_t)0x7dbc3967, (q31_t)0x7dbb0c03,
-  (q31_t)0x7db9de52, (q31_t)0x7db8b053, (q31_t)0x7db78207, (q31_t)0x7db6536d, (q31_t)0x7db52485, (q31_t)0x7db3f550, (q31_t)0x7db2c5cd, (q31_t)0x7db195fd,
-  (q31_t)0x7db065df, (q31_t)0x7daf3574, (q31_t)0x7dae04bb, (q31_t)0x7dacd3b5, (q31_t)0x7daba261, (q31_t)0x7daa70c0, (q31_t)0x7da93ed1, (q31_t)0x7da80c95,
-  (q31_t)0x7da6da0b, (q31_t)0x7da5a733, (q31_t)0x7da4740e, (q31_t)0x7da3409c, (q31_t)0x7da20cdc, (q31_t)0x7da0d8cf, (q31_t)0x7d9fa474, (q31_t)0x7d9e6fcb,
-  (q31_t)0x7d9d3ad6, (q31_t)0x7d9c0592, (q31_t)0x7d9ad001, (q31_t)0x7d999a23, (q31_t)0x7d9863f7, (q31_t)0x7d972d7e, (q31_t)0x7d95f6b7, (q31_t)0x7d94bfa3,
-  (q31_t)0x7d938841, (q31_t)0x7d925092, (q31_t)0x7d911896, (q31_t)0x7d8fe04c, (q31_t)0x7d8ea7b4, (q31_t)0x7d8d6ecf, (q31_t)0x7d8c359d, (q31_t)0x7d8afc1d,
-  (q31_t)0x7d89c250, (q31_t)0x7d888835, (q31_t)0x7d874dcd, (q31_t)0x7d861317, (q31_t)0x7d84d814, (q31_t)0x7d839cc4, (q31_t)0x7d826126, (q31_t)0x7d81253a,
-  (q31_t)0x7d7fe902, (q31_t)0x7d7eac7c, (q31_t)0x7d7d6fa8, (q31_t)0x7d7c3287, (q31_t)0x7d7af519, (q31_t)0x7d79b75d, (q31_t)0x7d787954, (q31_t)0x7d773afd,
-  (q31_t)0x7d75fc59, (q31_t)0x7d74bd68, (q31_t)0x7d737e29, (q31_t)0x7d723e9d, (q31_t)0x7d70fec4, (q31_t)0x7d6fbe9d, (q31_t)0x7d6e7e29, (q31_t)0x7d6d3d67,
-  (q31_t)0x7d6bfc58, (q31_t)0x7d6abafc, (q31_t)0x7d697952, (q31_t)0x7d68375b, (q31_t)0x7d66f517, (q31_t)0x7d65b285, (q31_t)0x7d646fa6, (q31_t)0x7d632c79,
-  (q31_t)0x7d61e8ff, (q31_t)0x7d60a538, (q31_t)0x7d5f6124, (q31_t)0x7d5e1cc2, (q31_t)0x7d5cd813, (q31_t)0x7d5b9316, (q31_t)0x7d5a4dcc, (q31_t)0x7d590835,
-  (q31_t)0x7d57c251, (q31_t)0x7d567c1f, (q31_t)0x7d5535a0, (q31_t)0x7d53eed3, (q31_t)0x7d52a7ba, (q31_t)0x7d516053, (q31_t)0x7d50189e, (q31_t)0x7d4ed09d,
-  (q31_t)0x7d4d884e, (q31_t)0x7d4c3fb1, (q31_t)0x7d4af6c8, (q31_t)0x7d49ad91, (q31_t)0x7d48640d, (q31_t)0x7d471a3c, (q31_t)0x7d45d01d, (q31_t)0x7d4485b1,
-  (q31_t)0x7d433af8, (q31_t)0x7d41eff1, (q31_t)0x7d40a49e, (q31_t)0x7d3f58fd, (q31_t)0x7d3e0d0e, (q31_t)0x7d3cc0d3, (q31_t)0x7d3b744a, (q31_t)0x7d3a2774,
-  (q31_t)0x7d38da51, (q31_t)0x7d378ce0, (q31_t)0x7d363f23, (q31_t)0x7d34f118, (q31_t)0x7d33a2bf, (q31_t)0x7d32541a, (q31_t)0x7d310527, (q31_t)0x7d2fb5e7,
-  (q31_t)0x7d2e665a, (q31_t)0x7d2d1680, (q31_t)0x7d2bc659, (q31_t)0x7d2a75e4, (q31_t)0x7d292522, (q31_t)0x7d27d413, (q31_t)0x7d2682b6, (q31_t)0x7d25310d,
-  (q31_t)0x7d23df16, (q31_t)0x7d228cd2, (q31_t)0x7d213a41, (q31_t)0x7d1fe762, (q31_t)0x7d1e9437, (q31_t)0x7d1d40be, (q31_t)0x7d1becf8, (q31_t)0x7d1a98e5,
-  (q31_t)0x7d194485, (q31_t)0x7d17efd8, (q31_t)0x7d169add, (q31_t)0x7d154595, (q31_t)0x7d13f001, (q31_t)0x7d129a1f, (q31_t)0x7d1143ef, (q31_t)0x7d0fed73,
-  (q31_t)0x7d0e96aa, (q31_t)0x7d0d3f93, (q31_t)0x7d0be82f, (q31_t)0x7d0a907e, (q31_t)0x7d093880, (q31_t)0x7d07e035, (q31_t)0x7d06879d, (q31_t)0x7d052eb8,
-  (q31_t)0x7d03d585, (q31_t)0x7d027c05, (q31_t)0x7d012239, (q31_t)0x7cffc81f, (q31_t)0x7cfe6db8, (q31_t)0x7cfd1304, (q31_t)0x7cfbb803, (q31_t)0x7cfa5cb4,
-  (q31_t)0x7cf90119, (q31_t)0x7cf7a531, (q31_t)0x7cf648fb, (q31_t)0x7cf4ec79, (q31_t)0x7cf38fa9, (q31_t)0x7cf2328c, (q31_t)0x7cf0d522, (q31_t)0x7cef776b,
-  (q31_t)0x7cee1967, (q31_t)0x7cecbb16, (q31_t)0x7ceb5c78, (q31_t)0x7ce9fd8d, (q31_t)0x7ce89e55, (q31_t)0x7ce73ed0, (q31_t)0x7ce5defd, (q31_t)0x7ce47ede,
-  (q31_t)0x7ce31e72, (q31_t)0x7ce1bdb8, (q31_t)0x7ce05cb2, (q31_t)0x7cdefb5e, (q31_t)0x7cdd99be, (q31_t)0x7cdc37d0, (q31_t)0x7cdad596, (q31_t)0x7cd9730e,
-  (q31_t)0x7cd8103a, (q31_t)0x7cd6ad18, (q31_t)0x7cd549aa, (q31_t)0x7cd3e5ee, (q31_t)0x7cd281e5, (q31_t)0x7cd11d90, (q31_t)0x7ccfb8ed, (q31_t)0x7cce53fe,
-  (q31_t)0x7ccceec1, (q31_t)0x7ccb8937, (q31_t)0x7cca2361, (q31_t)0x7cc8bd3d, (q31_t)0x7cc756cd, (q31_t)0x7cc5f010, (q31_t)0x7cc48905, (q31_t)0x7cc321ae,
-  (q31_t)0x7cc1ba09, (q31_t)0x7cc05218, (q31_t)0x7cbee9da, (q31_t)0x7cbd814f, (q31_t)0x7cbc1877, (q31_t)0x7cbaaf51, (q31_t)0x7cb945df, (q31_t)0x7cb7dc20,
-  (q31_t)0x7cb67215, (q31_t)0x7cb507bc, (q31_t)0x7cb39d16, (q31_t)0x7cb23223, (q31_t)0x7cb0c6e4, (q31_t)0x7caf5b57, (q31_t)0x7cadef7e, (q31_t)0x7cac8358,
-  (q31_t)0x7cab16e4, (q31_t)0x7ca9aa24, (q31_t)0x7ca83d17, (q31_t)0x7ca6cfbd, (q31_t)0x7ca56216, (q31_t)0x7ca3f423, (q31_t)0x7ca285e2, (q31_t)0x7ca11755,
-  (q31_t)0x7c9fa87a, (q31_t)0x7c9e3953, (q31_t)0x7c9cc9df, (q31_t)0x7c9b5a1e, (q31_t)0x7c99ea10, (q31_t)0x7c9879b6, (q31_t)0x7c97090e, (q31_t)0x7c95981a,
-  (q31_t)0x7c9426d8, (q31_t)0x7c92b54a, (q31_t)0x7c91436f, (q31_t)0x7c8fd148, (q31_t)0x7c8e5ed3, (q31_t)0x7c8cec12, (q31_t)0x7c8b7903, (q31_t)0x7c8a05a8,
-  (q31_t)0x7c889200, (q31_t)0x7c871e0c, (q31_t)0x7c85a9ca, (q31_t)0x7c84353c, (q31_t)0x7c82c060, (q31_t)0x7c814b39, (q31_t)0x7c7fd5c4, (q31_t)0x7c7e6002,
-  (q31_t)0x7c7ce9f4, (q31_t)0x7c7b7399, (q31_t)0x7c79fcf1, (q31_t)0x7c7885fc, (q31_t)0x7c770eba, (q31_t)0x7c75972c, (q31_t)0x7c741f51, (q31_t)0x7c72a729,
-  (q31_t)0x7c712eb5, (q31_t)0x7c6fb5f3, (q31_t)0x7c6e3ce5, (q31_t)0x7c6cc38a, (q31_t)0x7c6b49e3, (q31_t)0x7c69cfee, (q31_t)0x7c6855ad, (q31_t)0x7c66db1f,
-  (q31_t)0x7c656045, (q31_t)0x7c63e51e, (q31_t)0x7c6269aa, (q31_t)0x7c60ede9, (q31_t)0x7c5f71db, (q31_t)0x7c5df581, (q31_t)0x7c5c78da, (q31_t)0x7c5afbe6,
-  (q31_t)0x7c597ea6, (q31_t)0x7c580119, (q31_t)0x7c56833f, (q31_t)0x7c550519, (q31_t)0x7c5386a6, (q31_t)0x7c5207e6, (q31_t)0x7c5088d9, (q31_t)0x7c4f0980,
-  (q31_t)0x7c4d89da, (q31_t)0x7c4c09e8, (q31_t)0x7c4a89a8, (q31_t)0x7c49091c, (q31_t)0x7c478844, (q31_t)0x7c46071f, (q31_t)0x7c4485ad, (q31_t)0x7c4303ee,
-  (q31_t)0x7c4181e3, (q31_t)0x7c3fff8b, (q31_t)0x7c3e7ce7, (q31_t)0x7c3cf9f5, (q31_t)0x7c3b76b8, (q31_t)0x7c39f32d, (q31_t)0x7c386f56, (q31_t)0x7c36eb33,
-  (q31_t)0x7c3566c2, (q31_t)0x7c33e205, (q31_t)0x7c325cfc, (q31_t)0x7c30d7a6, (q31_t)0x7c2f5203, (q31_t)0x7c2dcc14, (q31_t)0x7c2c45d8, (q31_t)0x7c2abf4f,
-  (q31_t)0x7c29387a, (q31_t)0x7c27b158, (q31_t)0x7c2629ea, (q31_t)0x7c24a22f, (q31_t)0x7c231a28, (q31_t)0x7c2191d4, (q31_t)0x7c200933, (q31_t)0x7c1e8046,
-  (q31_t)0x7c1cf70c, (q31_t)0x7c1b6d86, (q31_t)0x7c19e3b3, (q31_t)0x7c185994, (q31_t)0x7c16cf28, (q31_t)0x7c15446f, (q31_t)0x7c13b96a, (q31_t)0x7c122e19,
-  (q31_t)0x7c10a27b, (q31_t)0x7c0f1690, (q31_t)0x7c0d8a59, (q31_t)0x7c0bfdd5, (q31_t)0x7c0a7105, (q31_t)0x7c08e3e8, (q31_t)0x7c07567f, (q31_t)0x7c05c8c9,
-  (q31_t)0x7c043ac7, (q31_t)0x7c02ac78, (q31_t)0x7c011ddd, (q31_t)0x7bff8ef5, (q31_t)0x7bfdffc1, (q31_t)0x7bfc7041, (q31_t)0x7bfae073, (q31_t)0x7bf9505a,
-  (q31_t)0x7bf7bff4, (q31_t)0x7bf62f41, (q31_t)0x7bf49e42, (q31_t)0x7bf30cf6, (q31_t)0x7bf17b5e, (q31_t)0x7befe97a, (q31_t)0x7bee5749, (q31_t)0x7becc4cc,
-  (q31_t)0x7beb3202, (q31_t)0x7be99eec, (q31_t)0x7be80b89, (q31_t)0x7be677da, (q31_t)0x7be4e3df, (q31_t)0x7be34f97, (q31_t)0x7be1bb02, (q31_t)0x7be02621,
-  (q31_t)0x7bde90f4, (q31_t)0x7bdcfb7b, (q31_t)0x7bdb65b5, (q31_t)0x7bd9cfa2, (q31_t)0x7bd83944, (q31_t)0x7bd6a298, (q31_t)0x7bd50ba1, (q31_t)0x7bd3745d,
-  (q31_t)0x7bd1dccc, (q31_t)0x7bd044f0, (q31_t)0x7bceacc7, (q31_t)0x7bcd1451, (q31_t)0x7bcb7b8f, (q31_t)0x7bc9e281, (q31_t)0x7bc84927, (q31_t)0x7bc6af80,
-  (q31_t)0x7bc5158c, (q31_t)0x7bc37b4d, (q31_t)0x7bc1e0c1, (q31_t)0x7bc045e9, (q31_t)0x7bbeaac4, (q31_t)0x7bbd0f53, (q31_t)0x7bbb7396, (q31_t)0x7bb9d78c,
-  (q31_t)0x7bb83b36, (q31_t)0x7bb69e94, (q31_t)0x7bb501a5, (q31_t)0x7bb3646a, (q31_t)0x7bb1c6e3, (q31_t)0x7bb02910, (q31_t)0x7bae8af0, (q31_t)0x7bacec84,
-  (q31_t)0x7bab4dcc, (q31_t)0x7ba9aec7, (q31_t)0x7ba80f76, (q31_t)0x7ba66fd9, (q31_t)0x7ba4cfef, (q31_t)0x7ba32fba, (q31_t)0x7ba18f38, (q31_t)0x7b9fee69,
-  (q31_t)0x7b9e4d4f, (q31_t)0x7b9cabe8, (q31_t)0x7b9b0a35, (q31_t)0x7b996836, (q31_t)0x7b97c5ea, (q31_t)0x7b962352, (q31_t)0x7b94806e, (q31_t)0x7b92dd3e,
-  (q31_t)0x7b9139c2, (q31_t)0x7b8f95f9, (q31_t)0x7b8df1e4, (q31_t)0x7b8c4d83, (q31_t)0x7b8aa8d6, (q31_t)0x7b8903dc, (q31_t)0x7b875e96, (q31_t)0x7b85b904,
-  (q31_t)0x7b841326, (q31_t)0x7b826cfc, (q31_t)0x7b80c686, (q31_t)0x7b7f1fc3, (q31_t)0x7b7d78b4, (q31_t)0x7b7bd159, (q31_t)0x7b7a29b2, (q31_t)0x7b7881be,
-  (q31_t)0x7b76d97f, (q31_t)0x7b7530f3, (q31_t)0x7b73881b, (q31_t)0x7b71def7, (q31_t)0x7b703587, (q31_t)0x7b6e8bcb, (q31_t)0x7b6ce1c2, (q31_t)0x7b6b376e,
-  (q31_t)0x7b698ccd, (q31_t)0x7b67e1e0, (q31_t)0x7b6636a7, (q31_t)0x7b648b22, (q31_t)0x7b62df51, (q31_t)0x7b613334, (q31_t)0x7b5f86ca, (q31_t)0x7b5dda15,
-  (q31_t)0x7b5c2d13, (q31_t)0x7b5a7fc6, (q31_t)0x7b58d22c, (q31_t)0x7b572446, (q31_t)0x7b557614, (q31_t)0x7b53c796, (q31_t)0x7b5218cc, (q31_t)0x7b5069b6,
-  (q31_t)0x7b4eba53, (q31_t)0x7b4d0aa5, (q31_t)0x7b4b5aab, (q31_t)0x7b49aa64, (q31_t)0x7b47f9d2, (q31_t)0x7b4648f3, (q31_t)0x7b4497c9, (q31_t)0x7b42e652,
-  (q31_t)0x7b413490, (q31_t)0x7b3f8281, (q31_t)0x7b3dd026, (q31_t)0x7b3c1d80, (q31_t)0x7b3a6a8d, (q31_t)0x7b38b74e, (q31_t)0x7b3703c3, (q31_t)0x7b354fed,
-  (q31_t)0x7b339bca, (q31_t)0x7b31e75b, (q31_t)0x7b3032a0, (q31_t)0x7b2e7d9a, (q31_t)0x7b2cc847, (q31_t)0x7b2b12a8, (q31_t)0x7b295cbe, (q31_t)0x7b27a687,
-  (q31_t)0x7b25f004, (q31_t)0x7b243936, (q31_t)0x7b22821b, (q31_t)0x7b20cab5, (q31_t)0x7b1f1302, (q31_t)0x7b1d5b04, (q31_t)0x7b1ba2b9, (q31_t)0x7b19ea23,
-  (q31_t)0x7b183141, (q31_t)0x7b167813, (q31_t)0x7b14be99, (q31_t)0x7b1304d3, (q31_t)0x7b114ac1, (q31_t)0x7b0f9063, (q31_t)0x7b0dd5b9, (q31_t)0x7b0c1ac4,
-  (q31_t)0x7b0a5f82, (q31_t)0x7b08a3f5, (q31_t)0x7b06e81b, (q31_t)0x7b052bf6, (q31_t)0x7b036f85, (q31_t)0x7b01b2c8, (q31_t)0x7afff5bf, (q31_t)0x7afe386a,
-  (q31_t)0x7afc7aca, (q31_t)0x7afabcdd, (q31_t)0x7af8fea5, (q31_t)0x7af74021, (q31_t)0x7af58151, (q31_t)0x7af3c235, (q31_t)0x7af202cd, (q31_t)0x7af0431a,
-  (q31_t)0x7aee831a, (q31_t)0x7aecc2cf, (q31_t)0x7aeb0238, (q31_t)0x7ae94155, (q31_t)0x7ae78026, (q31_t)0x7ae5beac, (q31_t)0x7ae3fce6, (q31_t)0x7ae23ad4,
-  (q31_t)0x7ae07876, (q31_t)0x7adeb5cc, (q31_t)0x7adcf2d6, (q31_t)0x7adb2f95, (q31_t)0x7ad96c08, (q31_t)0x7ad7a82f, (q31_t)0x7ad5e40a, (q31_t)0x7ad41f9a,
-  (q31_t)0x7ad25ade, (q31_t)0x7ad095d6, (q31_t)0x7aced082, (q31_t)0x7acd0ae3, (q31_t)0x7acb44f8, (q31_t)0x7ac97ec1, (q31_t)0x7ac7b83e, (q31_t)0x7ac5f170,
-  (q31_t)0x7ac42a55, (q31_t)0x7ac262ef, (q31_t)0x7ac09b3e, (q31_t)0x7abed341, (q31_t)0x7abd0af7, (q31_t)0x7abb4263, (q31_t)0x7ab97982, (q31_t)0x7ab7b056,
-  (q31_t)0x7ab5e6de, (q31_t)0x7ab41d1b, (q31_t)0x7ab2530b, (q31_t)0x7ab088b0, (q31_t)0x7aaebe0a, (q31_t)0x7aacf318, (q31_t)0x7aab27da, (q31_t)0x7aa95c50,
-  (q31_t)0x7aa7907b, (q31_t)0x7aa5c45a, (q31_t)0x7aa3f7ed, (q31_t)0x7aa22b35, (q31_t)0x7aa05e31, (q31_t)0x7a9e90e1, (q31_t)0x7a9cc346, (q31_t)0x7a9af55f,
-  (q31_t)0x7a99272d, (q31_t)0x7a9758af, (q31_t)0x7a9589e5, (q31_t)0x7a93bad0, (q31_t)0x7a91eb6f, (q31_t)0x7a901bc2, (q31_t)0x7a8e4bca, (q31_t)0x7a8c7b87,
-  (q31_t)0x7a8aaaf7, (q31_t)0x7a88da1c, (q31_t)0x7a8708f6, (q31_t)0x7a853784, (q31_t)0x7a8365c6, (q31_t)0x7a8193bd, (q31_t)0x7a7fc168, (q31_t)0x7a7deec8,
-  (q31_t)0x7a7c1bdc, (q31_t)0x7a7a48a4, (q31_t)0x7a787521, (q31_t)0x7a76a153, (q31_t)0x7a74cd38, (q31_t)0x7a72f8d3, (q31_t)0x7a712422, (q31_t)0x7a6f4f25,
-  (q31_t)0x7a6d79dd, (q31_t)0x7a6ba449, (q31_t)0x7a69ce6a, (q31_t)0x7a67f83f, (q31_t)0x7a6621c9, (q31_t)0x7a644b07, (q31_t)0x7a6273fa, (q31_t)0x7a609ca1,
-  (q31_t)0x7a5ec4fc, (q31_t)0x7a5ced0d, (q31_t)0x7a5b14d1, (q31_t)0x7a593c4b, (q31_t)0x7a576379, (q31_t)0x7a558a5b, (q31_t)0x7a53b0f2, (q31_t)0x7a51d73d,
-  (q31_t)0x7a4ffd3d, (q31_t)0x7a4e22f2, (q31_t)0x7a4c485b, (q31_t)0x7a4a6d78, (q31_t)0x7a48924b, (q31_t)0x7a46b6d1, (q31_t)0x7a44db0d, (q31_t)0x7a42fefd,
-  (q31_t)0x7a4122a1, (q31_t)0x7a3f45fa, (q31_t)0x7a3d6908, (q31_t)0x7a3b8bca, (q31_t)0x7a39ae41, (q31_t)0x7a37d06d, (q31_t)0x7a35f24d, (q31_t)0x7a3413e2,
-  (q31_t)0x7a32352b, (q31_t)0x7a305629, (q31_t)0x7a2e76dc, (q31_t)0x7a2c9743, (q31_t)0x7a2ab75f, (q31_t)0x7a28d72f, (q31_t)0x7a26f6b4, (q31_t)0x7a2515ee,
-  (q31_t)0x7a2334dd, (q31_t)0x7a215380, (q31_t)0x7a1f71d7, (q31_t)0x7a1d8fe4, (q31_t)0x7a1bada5, (q31_t)0x7a19cb1b, (q31_t)0x7a17e845, (q31_t)0x7a160524,
-  (q31_t)0x7a1421b8, (q31_t)0x7a123e01, (q31_t)0x7a1059fe, (q31_t)0x7a0e75b0, (q31_t)0x7a0c9117, (q31_t)0x7a0aac32, (q31_t)0x7a08c702, (q31_t)0x7a06e187,
-  (q31_t)0x7a04fbc1, (q31_t)0x7a0315af, (q31_t)0x7a012f52, (q31_t)0x79ff48aa, (q31_t)0x79fd61b6, (q31_t)0x79fb7a77, (q31_t)0x79f992ed, (q31_t)0x79f7ab18,
-  (q31_t)0x79f5c2f8, (q31_t)0x79f3da8c, (q31_t)0x79f1f1d5, (q31_t)0x79f008d3, (q31_t)0x79ee1f86, (q31_t)0x79ec35ed, (q31_t)0x79ea4c09, (q31_t)0x79e861da,
-  (q31_t)0x79e67760, (q31_t)0x79e48c9b, (q31_t)0x79e2a18a, (q31_t)0x79e0b62e, (q31_t)0x79deca87, (q31_t)0x79dcde95, (q31_t)0x79daf258, (q31_t)0x79d905d0,
-  (q31_t)0x79d718fc, (q31_t)0x79d52bdd, (q31_t)0x79d33e73, (q31_t)0x79d150be, (q31_t)0x79cf62be, (q31_t)0x79cd7473, (q31_t)0x79cb85dc, (q31_t)0x79c996fb,
-  (q31_t)0x79c7a7ce, (q31_t)0x79c5b856, (q31_t)0x79c3c893, (q31_t)0x79c1d885, (q31_t)0x79bfe82c, (q31_t)0x79bdf788, (q31_t)0x79bc0698, (q31_t)0x79ba155e,
-  (q31_t)0x79b823d8, (q31_t)0x79b63207, (q31_t)0x79b43fec, (q31_t)0x79b24d85, (q31_t)0x79b05ad3, (q31_t)0x79ae67d6, (q31_t)0x79ac748e, (q31_t)0x79aa80fb,
-  (q31_t)0x79a88d1d, (q31_t)0x79a698f4, (q31_t)0x79a4a480, (q31_t)0x79a2afc1, (q31_t)0x79a0bab6, (q31_t)0x799ec561, (q31_t)0x799ccfc1, (q31_t)0x799ad9d5,
-  (q31_t)0x7998e39f, (q31_t)0x7996ed1e, (q31_t)0x7994f651, (q31_t)0x7992ff3a, (q31_t)0x799107d8, (q31_t)0x798f102a, (q31_t)0x798d1832, (q31_t)0x798b1fef,
-  (q31_t)0x79892761, (q31_t)0x79872e87, (q31_t)0x79853563, (q31_t)0x79833bf4, (q31_t)0x7981423a, (q31_t)0x797f4835, (q31_t)0x797d4de5, (q31_t)0x797b534a,
-  (q31_t)0x79795864, (q31_t)0x79775d33, (q31_t)0x797561b8, (q31_t)0x797365f1, (q31_t)0x797169df, (q31_t)0x796f6d83, (q31_t)0x796d70dc, (q31_t)0x796b73e9,
-  (q31_t)0x796976ac, (q31_t)0x79677924, (q31_t)0x79657b51, (q31_t)0x79637d33, (q31_t)0x79617eca, (q31_t)0x795f8017, (q31_t)0x795d8118, (q31_t)0x795b81cf,
-  (q31_t)0x7959823b, (q31_t)0x7957825c, (q31_t)0x79558232, (q31_t)0x795381bd, (q31_t)0x795180fe, (q31_t)0x794f7ff3, (q31_t)0x794d7e9e, (q31_t)0x794b7cfe,
-  (q31_t)0x79497b13, (q31_t)0x794778dd, (q31_t)0x7945765d, (q31_t)0x79437391, (q31_t)0x7941707b, (q31_t)0x793f6d1a, (q31_t)0x793d696f, (q31_t)0x793b6578,
-  (q31_t)0x79396137, (q31_t)0x79375cab, (q31_t)0x793557d4, (q31_t)0x793352b2, (q31_t)0x79314d46, (q31_t)0x792f478f, (q31_t)0x792d418d, (q31_t)0x792b3b40,
-  (q31_t)0x792934a9, (q31_t)0x79272dc7, (q31_t)0x7925269a, (q31_t)0x79231f22, (q31_t)0x79211760, (q31_t)0x791f0f53, (q31_t)0x791d06fb, (q31_t)0x791afe59,
-  (q31_t)0x7918f56c, (q31_t)0x7916ec34, (q31_t)0x7914e2b2, (q31_t)0x7912d8e4, (q31_t)0x7910cecc, (q31_t)0x790ec46a, (q31_t)0x790cb9bd, (q31_t)0x790aaec5,
-  (q31_t)0x7908a382, (q31_t)0x790697f5, (q31_t)0x79048c1d, (q31_t)0x79027ffa, (q31_t)0x7900738d, (q31_t)0x78fe66d5, (q31_t)0x78fc59d3, (q31_t)0x78fa4c86,
-  (q31_t)0x78f83eee, (q31_t)0x78f6310c, (q31_t)0x78f422df, (q31_t)0x78f21467, (q31_t)0x78f005a5, (q31_t)0x78edf698, (q31_t)0x78ebe741, (q31_t)0x78e9d79f,
-  (q31_t)0x78e7c7b2, (q31_t)0x78e5b77b, (q31_t)0x78e3a6f9, (q31_t)0x78e1962d, (q31_t)0x78df8516, (q31_t)0x78dd73b5, (q31_t)0x78db6209, (q31_t)0x78d95012,
-  (q31_t)0x78d73dd1, (q31_t)0x78d52b46, (q31_t)0x78d31870, (q31_t)0x78d1054f, (q31_t)0x78cef1e4, (q31_t)0x78ccde2e, (q31_t)0x78caca2e, (q31_t)0x78c8b5e3,
-  (q31_t)0x78c6a14e, (q31_t)0x78c48c6e, (q31_t)0x78c27744, (q31_t)0x78c061cf, (q31_t)0x78be4c10, (q31_t)0x78bc3606, (q31_t)0x78ba1fb2, (q31_t)0x78b80913,
-  (q31_t)0x78b5f22a, (q31_t)0x78b3daf7, (q31_t)0x78b1c379, (q31_t)0x78afabb0, (q31_t)0x78ad939d, (q31_t)0x78ab7b40, (q31_t)0x78a96298, (q31_t)0x78a749a6,
-  (q31_t)0x78a53069, (q31_t)0x78a316e2, (q31_t)0x78a0fd11, (q31_t)0x789ee2f5, (q31_t)0x789cc88f, (q31_t)0x789aadde, (q31_t)0x789892e3, (q31_t)0x7896779d,
-  (q31_t)0x78945c0d, (q31_t)0x78924033, (q31_t)0x7890240e, (q31_t)0x788e07a0, (q31_t)0x788beae6, (q31_t)0x7889cde2, (q31_t)0x7887b094, (q31_t)0x788592fc,
-  (q31_t)0x78837519, (q31_t)0x788156ec, (q31_t)0x787f3875, (q31_t)0x787d19b3, (q31_t)0x787afaa7, (q31_t)0x7878db50, (q31_t)0x7876bbb0, (q31_t)0x78749bc5,
-  (q31_t)0x78727b8f, (q31_t)0x78705b10, (q31_t)0x786e3a46, (q31_t)0x786c1932, (q31_t)0x7869f7d3, (q31_t)0x7867d62a, (q31_t)0x7865b437, (q31_t)0x786391fa,
-  (q31_t)0x78616f72, (q31_t)0x785f4ca1, (q31_t)0x785d2984, (q31_t)0x785b061e, (q31_t)0x7858e26e, (q31_t)0x7856be73, (q31_t)0x78549a2e, (q31_t)0x7852759e,
-  (q31_t)0x785050c5, (q31_t)0x784e2ba1, (q31_t)0x784c0633, (q31_t)0x7849e07b, (q31_t)0x7847ba79, (q31_t)0x7845942c, (q31_t)0x78436d96, (q31_t)0x784146b5,
-  (q31_t)0x783f1f8a, (q31_t)0x783cf815, (q31_t)0x783ad055, (q31_t)0x7838a84c, (q31_t)0x78367ff8, (q31_t)0x7834575a, (q31_t)0x78322e72, (q31_t)0x78300540,
-  (q31_t)0x782ddbc4, (q31_t)0x782bb1fd, (q31_t)0x782987ed, (q31_t)0x78275d92, (q31_t)0x782532ed, (q31_t)0x782307fe, (q31_t)0x7820dcc5, (q31_t)0x781eb142,
-  (q31_t)0x781c8575, (q31_t)0x781a595d, (q31_t)0x78182cfc, (q31_t)0x78160051, (q31_t)0x7813d35b, (q31_t)0x7811a61b, (q31_t)0x780f7892, (q31_t)0x780d4abe,
-  (q31_t)0x780b1ca0, (q31_t)0x7808ee38, (q31_t)0x7806bf86, (q31_t)0x7804908a, (q31_t)0x78026145, (q31_t)0x780031b5, (q31_t)0x77fe01db, (q31_t)0x77fbd1b6,
-  (q31_t)0x77f9a148, (q31_t)0x77f77090, (q31_t)0x77f53f8e, (q31_t)0x77f30e42, (q31_t)0x77f0dcac, (q31_t)0x77eeaacc, (q31_t)0x77ec78a2, (q31_t)0x77ea462e,
-  (q31_t)0x77e81370, (q31_t)0x77e5e068, (q31_t)0x77e3ad17, (q31_t)0x77e1797b, (q31_t)0x77df4595, (q31_t)0x77dd1165, (q31_t)0x77dadcec, (q31_t)0x77d8a828,
-  (q31_t)0x77d6731a, (q31_t)0x77d43dc3, (q31_t)0x77d20822, (q31_t)0x77cfd236, (q31_t)0x77cd9c01, (q31_t)0x77cb6582, (q31_t)0x77c92eb9, (q31_t)0x77c6f7a6,
-  (q31_t)0x77c4c04a, (q31_t)0x77c288a3, (q31_t)0x77c050b2, (q31_t)0x77be1878, (q31_t)0x77bbdff4, (q31_t)0x77b9a726, (q31_t)0x77b76e0e, (q31_t)0x77b534ac,
-  (q31_t)0x77b2fb00, (q31_t)0x77b0c10b, (q31_t)0x77ae86cc, (q31_t)0x77ac4c43, (q31_t)0x77aa1170, (q31_t)0x77a7d653, (q31_t)0x77a59aec, (q31_t)0x77a35f3c,
-  (q31_t)0x77a12342, (q31_t)0x779ee6fe, (q31_t)0x779caa70, (q31_t)0x779a6d99, (q31_t)0x77983077, (q31_t)0x7795f30c, (q31_t)0x7793b557, (q31_t)0x77917759,
-  (q31_t)0x778f3910, (q31_t)0x778cfa7e, (q31_t)0x778abba2, (q31_t)0x77887c7d, (q31_t)0x77863d0d, (q31_t)0x7783fd54, (q31_t)0x7781bd52, (q31_t)0x777f7d05,
-  (q31_t)0x777d3c6f, (q31_t)0x777afb8f, (q31_t)0x7778ba65, (q31_t)0x777678f2, (q31_t)0x77743735, (q31_t)0x7771f52e, (q31_t)0x776fb2de, (q31_t)0x776d7044,
-  (q31_t)0x776b2d60, (q31_t)0x7768ea33, (q31_t)0x7766a6bc, (q31_t)0x776462fb, (q31_t)0x77621ef1, (q31_t)0x775fda9d, (q31_t)0x775d95ff, (q31_t)0x775b5118,
-  (q31_t)0x77590be7, (q31_t)0x7756c66c, (q31_t)0x775480a8, (q31_t)0x77523a9b, (q31_t)0x774ff443, (q31_t)0x774dada2, (q31_t)0x774b66b8, (q31_t)0x77491f84,
-  (q31_t)0x7746d806, (q31_t)0x7744903f, (q31_t)0x7742482e, (q31_t)0x773fffd4, (q31_t)0x773db730, (q31_t)0x773b6e42, (q31_t)0x7739250b, (q31_t)0x7736db8b,
-  (q31_t)0x773491c0, (q31_t)0x773247ad, (q31_t)0x772ffd50, (q31_t)0x772db2a9, (q31_t)0x772b67b9, (q31_t)0x77291c7f, (q31_t)0x7726d0fc, (q31_t)0x7724852f,
-  (q31_t)0x77223919, (q31_t)0x771fecb9, (q31_t)0x771da010, (q31_t)0x771b531d, (q31_t)0x771905e1, (q31_t)0x7716b85b, (q31_t)0x77146a8c, (q31_t)0x77121c74,
-  (q31_t)0x770fce12, (q31_t)0x770d7f66, (q31_t)0x770b3072, (q31_t)0x7708e133, (q31_t)0x770691ab, (q31_t)0x770441da, (q31_t)0x7701f1c0, (q31_t)0x76ffa15c,
-  (q31_t)0x76fd50ae, (q31_t)0x76faffb8, (q31_t)0x76f8ae78, (q31_t)0x76f65cee, (q31_t)0x76f40b1b, (q31_t)0x76f1b8ff, (q31_t)0x76ef6699, (q31_t)0x76ed13ea,
-  (q31_t)0x76eac0f2, (q31_t)0x76e86db0, (q31_t)0x76e61a25, (q31_t)0x76e3c650, (q31_t)0x76e17233, (q31_t)0x76df1dcb, (q31_t)0x76dcc91b, (q31_t)0x76da7421,
-  (q31_t)0x76d81ede, (q31_t)0x76d5c952, (q31_t)0x76d3737c, (q31_t)0x76d11d5d, (q31_t)0x76cec6f5, (q31_t)0x76cc7043, (q31_t)0x76ca1948, (q31_t)0x76c7c204,
-  (q31_t)0x76c56a77, (q31_t)0x76c312a0, (q31_t)0x76c0ba80, (q31_t)0x76be6217, (q31_t)0x76bc0965, (q31_t)0x76b9b069, (q31_t)0x76b75724, (q31_t)0x76b4fd96,
-  (q31_t)0x76b2a3bf, (q31_t)0x76b0499e, (q31_t)0x76adef34, (q31_t)0x76ab9481, (q31_t)0x76a93985, (q31_t)0x76a6de40, (q31_t)0x76a482b1, (q31_t)0x76a226da,
-  (q31_t)0x769fcab9, (q31_t)0x769d6e4f, (q31_t)0x769b119b, (q31_t)0x7698b49f, (q31_t)0x76965759, (q31_t)0x7693f9ca, (q31_t)0x76919bf3, (q31_t)0x768f3dd2,
-  (q31_t)0x768cdf67, (q31_t)0x768a80b4, (q31_t)0x768821b8, (q31_t)0x7685c272, (q31_t)0x768362e4, (q31_t)0x7681030c, (q31_t)0x767ea2eb, (q31_t)0x767c4281,
-  (q31_t)0x7679e1ce, (q31_t)0x767780d2, (q31_t)0x76751f8d, (q31_t)0x7672bdfe, (q31_t)0x76705c27, (q31_t)0x766dfa07, (q31_t)0x766b979d, (q31_t)0x766934eb,
-  (q31_t)0x7666d1ef, (q31_t)0x76646eab, (q31_t)0x76620b1d, (q31_t)0x765fa747, (q31_t)0x765d4327, (q31_t)0x765adebe, (q31_t)0x76587a0d, (q31_t)0x76561512,
-  (q31_t)0x7653afce, (q31_t)0x76514a42, (q31_t)0x764ee46c, (q31_t)0x764c7e4d, (q31_t)0x764a17e6, (q31_t)0x7647b135, (q31_t)0x76454a3c, (q31_t)0x7642e2f9,
-  (q31_t)0x76407b6e, (q31_t)0x763e139a, (q31_t)0x763bab7c, (q31_t)0x76394316, (q31_t)0x7636da67, (q31_t)0x7634716f, (q31_t)0x7632082e, (q31_t)0x762f9ea4,
-  (q31_t)0x762d34d1, (q31_t)0x762acab6, (q31_t)0x76286051, (q31_t)0x7625f5a3, (q31_t)0x76238aad, (q31_t)0x76211f6e, (q31_t)0x761eb3e6, (q31_t)0x761c4815,
-  (q31_t)0x7619dbfb, (q31_t)0x76176f98, (q31_t)0x761502ed, (q31_t)0x761295f9, (q31_t)0x761028bb, (q31_t)0x760dbb35, (q31_t)0x760b4d67, (q31_t)0x7608df4f,
-  (q31_t)0x760670ee, (q31_t)0x76040245, (q31_t)0x76019353, (q31_t)0x75ff2418, (q31_t)0x75fcb495, (q31_t)0x75fa44c8, (q31_t)0x75f7d4b3, (q31_t)0x75f56455,
-  (q31_t)0x75f2f3ae, (q31_t)0x75f082bf, (q31_t)0x75ee1187, (q31_t)0x75eba006, (q31_t)0x75e92e3c, (q31_t)0x75e6bc2a, (q31_t)0x75e449ce, (q31_t)0x75e1d72b,
-  (q31_t)0x75df643e, (q31_t)0x75dcf109, (q31_t)0x75da7d8b, (q31_t)0x75d809c4, (q31_t)0x75d595b4, (q31_t)0x75d3215c, (q31_t)0x75d0acbc, (q31_t)0x75ce37d2,
-  (q31_t)0x75cbc2a0, (q31_t)0x75c94d25, (q31_t)0x75c6d762, (q31_t)0x75c46156, (q31_t)0x75c1eb01, (q31_t)0x75bf7464, (q31_t)0x75bcfd7e, (q31_t)0x75ba864f,
-  (q31_t)0x75b80ed8, (q31_t)0x75b59718, (q31_t)0x75b31f0f, (q31_t)0x75b0a6be, (q31_t)0x75ae2e25, (q31_t)0x75abb542, (q31_t)0x75a93c18, (q31_t)0x75a6c2a4,
-  (q31_t)0x75a448e8, (q31_t)0x75a1cee4, (q31_t)0x759f5496, (q31_t)0x759cda01, (q31_t)0x759a5f22, (q31_t)0x7597e3fc, (q31_t)0x7595688c, (q31_t)0x7592ecd4,
-  (q31_t)0x759070d4, (q31_t)0x758df48b, (q31_t)0x758b77fa, (q31_t)0x7588fb20, (q31_t)0x75867dfd, (q31_t)0x75840093, (q31_t)0x758182df, (q31_t)0x757f04e3,
-  (q31_t)0x757c869f, (q31_t)0x757a0812, (q31_t)0x7577893d, (q31_t)0x75750a1f, (q31_t)0x75728ab9, (q31_t)0x75700b0a, (q31_t)0x756d8b13, (q31_t)0x756b0ad3,
-  (q31_t)0x75688a4b, (q31_t)0x7566097b, (q31_t)0x75638862, (q31_t)0x75610701, (q31_t)0x755e8557, (q31_t)0x755c0365, (q31_t)0x7559812b, (q31_t)0x7556fea8,
-  (q31_t)0x75547bdd, (q31_t)0x7551f8c9, (q31_t)0x754f756e, (q31_t)0x754cf1c9, (q31_t)0x754a6ddd, (q31_t)0x7547e9a8, (q31_t)0x7545652a, (q31_t)0x7542e065,
-  (q31_t)0x75405b57, (q31_t)0x753dd600, (q31_t)0x753b5061, (q31_t)0x7538ca7b, (q31_t)0x7536444b, (q31_t)0x7533bdd4, (q31_t)0x75313714, (q31_t)0x752eb00c,
-  (q31_t)0x752c28bb, (q31_t)0x7529a122, (q31_t)0x75271941, (q31_t)0x75249118, (q31_t)0x752208a7, (q31_t)0x751f7fed, (q31_t)0x751cf6eb, (q31_t)0x751a6da0,
-  (q31_t)0x7517e40e, (q31_t)0x75155a33, (q31_t)0x7512d010, (q31_t)0x751045a5, (q31_t)0x750dbaf2, (q31_t)0x750b2ff6, (q31_t)0x7508a4b2, (q31_t)0x75061926,
-  (q31_t)0x75038d52, (q31_t)0x75010136, (q31_t)0x74fe74d1, (q31_t)0x74fbe825, (q31_t)0x74f95b30, (q31_t)0x74f6cdf3, (q31_t)0x74f4406d, (q31_t)0x74f1b2a0,
-  (q31_t)0x74ef248b, (q31_t)0x74ec962d, (q31_t)0x74ea0787, (q31_t)0x74e7789a, (q31_t)0x74e4e964, (q31_t)0x74e259e6, (q31_t)0x74dfca20, (q31_t)0x74dd3a11,
-  (q31_t)0x74daa9bb, (q31_t)0x74d8191d, (q31_t)0x74d58836, (q31_t)0x74d2f708, (q31_t)0x74d06591, (q31_t)0x74cdd3d2, (q31_t)0x74cb41cc, (q31_t)0x74c8af7d,
-  (q31_t)0x74c61ce6, (q31_t)0x74c38a07, (q31_t)0x74c0f6e0, (q31_t)0x74be6372, (q31_t)0x74bbcfbb, (q31_t)0x74b93bbc, (q31_t)0x74b6a775, (q31_t)0x74b412e6,
-  (q31_t)0x74b17e0f, (q31_t)0x74aee8f0, (q31_t)0x74ac5389, (q31_t)0x74a9bddb, (q31_t)0x74a727e4, (q31_t)0x74a491a5, (q31_t)0x74a1fb1e, (q31_t)0x749f6450,
-  (q31_t)0x749ccd39, (q31_t)0x749a35db, (q31_t)0x74979e34, (q31_t)0x74950646, (q31_t)0x74926e10, (q31_t)0x748fd592, (q31_t)0x748d3ccb, (q31_t)0x748aa3be,
-  (q31_t)0x74880a68, (q31_t)0x748570ca, (q31_t)0x7482d6e4, (q31_t)0x74803cb7, (q31_t)0x747da242, (q31_t)0x747b0784, (q31_t)0x74786c7f, (q31_t)0x7475d132,
-  (q31_t)0x7473359e, (q31_t)0x747099c1, (q31_t)0x746dfd9d, (q31_t)0x746b6131, (q31_t)0x7468c47c, (q31_t)0x74662781, (q31_t)0x74638a3d, (q31_t)0x7460ecb2,
-  (q31_t)0x745e4ede, (q31_t)0x745bb0c3, (q31_t)0x74591261, (q31_t)0x745673b6, (q31_t)0x7453d4c4, (q31_t)0x7451358a, (q31_t)0x744e9608, (q31_t)0x744bf63e,
-  (q31_t)0x7449562d, (q31_t)0x7446b5d4, (q31_t)0x74441533, (q31_t)0x7441744b, (q31_t)0x743ed31b, (q31_t)0x743c31a3, (q31_t)0x74398fe3, (q31_t)0x7436eddc,
-  (q31_t)0x74344b8d, (q31_t)0x7431a8f6, (q31_t)0x742f0618, (q31_t)0x742c62f2, (q31_t)0x7429bf84, (q31_t)0x74271bcf, (q31_t)0x742477d2, (q31_t)0x7421d38e,
-  (q31_t)0x741f2f01, (q31_t)0x741c8a2d, (q31_t)0x7419e512, (q31_t)0x74173faf, (q31_t)0x74149a04, (q31_t)0x7411f412, (q31_t)0x740f4dd8, (q31_t)0x740ca756,
-  (q31_t)0x740a008d, (q31_t)0x7407597d, (q31_t)0x7404b224, (q31_t)0x74020a85, (q31_t)0x73ff629d, (q31_t)0x73fcba6e, (q31_t)0x73fa11f8, (q31_t)0x73f7693a,
-  (q31_t)0x73f4c034, (q31_t)0x73f216e7, (q31_t)0x73ef6d53, (q31_t)0x73ecc377, (q31_t)0x73ea1953, (q31_t)0x73e76ee8, (q31_t)0x73e4c435, (q31_t)0x73e2193b,
-  (q31_t)0x73df6df9, (q31_t)0x73dcc270, (q31_t)0x73da16a0, (q31_t)0x73d76a88, (q31_t)0x73d4be28, (q31_t)0x73d21182, (q31_t)0x73cf6493, (q31_t)0x73ccb75d,
-  (q31_t)0x73ca09e0, (q31_t)0x73c75c1c, (q31_t)0x73c4ae10, (q31_t)0x73c1ffbc, (q31_t)0x73bf5121, (q31_t)0x73bca23f, (q31_t)0x73b9f315, (q31_t)0x73b743a4,
-  (q31_t)0x73b493ec, (q31_t)0x73b1e3ec, (q31_t)0x73af33a5, (q31_t)0x73ac8316, (q31_t)0x73a9d240, (q31_t)0x73a72123, (q31_t)0x73a46fbf, (q31_t)0x73a1be13,
-  (q31_t)0x739f0c20, (q31_t)0x739c59e5, (q31_t)0x7399a763, (q31_t)0x7396f49a, (q31_t)0x73944189, (q31_t)0x73918e32, (q31_t)0x738eda93, (q31_t)0x738c26ac,
-  (q31_t)0x7389727f, (q31_t)0x7386be0a, (q31_t)0x7384094e, (q31_t)0x7381544a, (q31_t)0x737e9f00, (q31_t)0x737be96e, (q31_t)0x73793395, (q31_t)0x73767d74,
-  (q31_t)0x7373c70d, (q31_t)0x7371105e, (q31_t)0x736e5968, (q31_t)0x736ba22b, (q31_t)0x7368eaa6, (q31_t)0x736632db, (q31_t)0x73637ac8, (q31_t)0x7360c26e,
-  (q31_t)0x735e09cd, (q31_t)0x735b50e4, (q31_t)0x735897b5, (q31_t)0x7355de3e, (q31_t)0x73532481, (q31_t)0x73506a7c, (q31_t)0x734db030, (q31_t)0x734af59d,
-  (q31_t)0x73483ac2, (q31_t)0x73457fa1, (q31_t)0x7342c438, (q31_t)0x73400889, (q31_t)0x733d4c92, (q31_t)0x733a9054, (q31_t)0x7337d3d0, (q31_t)0x73351704,
-  (q31_t)0x733259f1, (q31_t)0x732f9c97, (q31_t)0x732cdef6, (q31_t)0x732a210d, (q31_t)0x732762de, (q31_t)0x7324a468, (q31_t)0x7321e5ab, (q31_t)0x731f26a7,
-  (q31_t)0x731c675b, (q31_t)0x7319a7c9, (q31_t)0x7316e7f0, (q31_t)0x731427cf, (q31_t)0x73116768, (q31_t)0x730ea6ba, (q31_t)0x730be5c5, (q31_t)0x73092489,
-  (q31_t)0x73066306, (q31_t)0x7303a13b, (q31_t)0x7300df2a, (q31_t)0x72fe1cd2, (q31_t)0x72fb5a34, (q31_t)0x72f8974e, (q31_t)0x72f5d421, (q31_t)0x72f310ad,
-  (q31_t)0x72f04cf3, (q31_t)0x72ed88f1, (q31_t)0x72eac4a9, (q31_t)0x72e8001a, (q31_t)0x72e53b44, (q31_t)0x72e27627, (q31_t)0x72dfb0c3, (q31_t)0x72dceb18,
-  (q31_t)0x72da2526, (q31_t)0x72d75eee, (q31_t)0x72d4986f, (q31_t)0x72d1d1a9, (q31_t)0x72cf0a9c, (q31_t)0x72cc4348, (q31_t)0x72c97bad, (q31_t)0x72c6b3cc,
-  (q31_t)0x72c3eba4, (q31_t)0x72c12335, (q31_t)0x72be5a7f, (q31_t)0x72bb9183, (q31_t)0x72b8c83f, (q31_t)0x72b5feb5, (q31_t)0x72b334e4, (q31_t)0x72b06acd,
-  (q31_t)0x72ada06f, (q31_t)0x72aad5c9, (q31_t)0x72a80ade, (q31_t)0x72a53fab, (q31_t)0x72a27432, (q31_t)0x729fa872, (q31_t)0x729cdc6b, (q31_t)0x729a101e,
-  (q31_t)0x7297438a, (q31_t)0x729476af, (q31_t)0x7291a98e, (q31_t)0x728edc26, (q31_t)0x728c0e77, (q31_t)0x72894082, (q31_t)0x72867245, (q31_t)0x7283a3c3,
-  (q31_t)0x7280d4f9, (q31_t)0x727e05e9, (q31_t)0x727b3693, (q31_t)0x727866f6, (q31_t)0x72759712, (q31_t)0x7272c6e7, (q31_t)0x726ff676, (q31_t)0x726d25bf,
-  (q31_t)0x726a54c1, (q31_t)0x7267837c, (q31_t)0x7264b1f0, (q31_t)0x7261e01e, (q31_t)0x725f0e06, (q31_t)0x725c3ba7, (q31_t)0x72596901, (q31_t)0x72569615,
-  (q31_t)0x7253c2e3, (q31_t)0x7250ef6a, (q31_t)0x724e1baa, (q31_t)0x724b47a4, (q31_t)0x72487357, (q31_t)0x72459ec4, (q31_t)0x7242c9ea, (q31_t)0x723ff4ca,
-  (q31_t)0x723d1f63, (q31_t)0x723a49b6, (q31_t)0x723773c3, (q31_t)0x72349d89, (q31_t)0x7231c708, (q31_t)0x722ef041, (q31_t)0x722c1934, (q31_t)0x722941e0,
-  (q31_t)0x72266a46, (q31_t)0x72239266, (q31_t)0x7220ba3f, (q31_t)0x721de1d1, (q31_t)0x721b091d, (q31_t)0x72183023, (q31_t)0x721556e3, (q31_t)0x72127d5c,
-  (q31_t)0x720fa38e, (q31_t)0x720cc97b, (q31_t)0x7209ef21, (q31_t)0x72071480, (q31_t)0x7204399a, (q31_t)0x72015e6d, (q31_t)0x71fe82f9, (q31_t)0x71fba740,
-  (q31_t)0x71f8cb40, (q31_t)0x71f5eefa, (q31_t)0x71f3126d, (q31_t)0x71f0359a, (q31_t)0x71ed5881, (q31_t)0x71ea7b22, (q31_t)0x71e79d7c, (q31_t)0x71e4bf90,
-  (q31_t)0x71e1e15e, (q31_t)0x71df02e5, (q31_t)0x71dc2427, (q31_t)0x71d94522, (q31_t)0x71d665d6, (q31_t)0x71d38645, (q31_t)0x71d0a66d, (q31_t)0x71cdc650,
-  (q31_t)0x71cae5ec, (q31_t)0x71c80542, (q31_t)0x71c52451, (q31_t)0x71c2431b, (q31_t)0x71bf619e, (q31_t)0x71bc7fdb, (q31_t)0x71b99dd2, (q31_t)0x71b6bb83,
-  (q31_t)0x71b3d8ed, (q31_t)0x71b0f612, (q31_t)0x71ae12f0, (q31_t)0x71ab2f89, (q31_t)0x71a84bdb, (q31_t)0x71a567e7, (q31_t)0x71a283ad, (q31_t)0x719f9f2c,
-  (q31_t)0x719cba66, (q31_t)0x7199d55a, (q31_t)0x7196f008, (q31_t)0x71940a6f, (q31_t)0x71912490, (q31_t)0x718e3e6c, (q31_t)0x718b5801, (q31_t)0x71887151,
-  (q31_t)0x71858a5a, (q31_t)0x7182a31d, (q31_t)0x717fbb9a, (q31_t)0x717cd3d2, (q31_t)0x7179ebc3, (q31_t)0x7177036e, (q31_t)0x71741ad3, (q31_t)0x717131f3,
-  (q31_t)0x716e48cc, (q31_t)0x716b5f5f, (q31_t)0x716875ad, (q31_t)0x71658bb4, (q31_t)0x7162a175, (q31_t)0x715fb6f1, (q31_t)0x715ccc26, (q31_t)0x7159e116,
-  (q31_t)0x7156f5c0, (q31_t)0x71540a24, (q31_t)0x71511e42, (q31_t)0x714e321a, (q31_t)0x714b45ac, (q31_t)0x714858f8, (q31_t)0x71456bfe, (q31_t)0x71427ebf,
-  (q31_t)0x713f9139, (q31_t)0x713ca36e, (q31_t)0x7139b55d, (q31_t)0x7136c706, (q31_t)0x7133d869, (q31_t)0x7130e987, (q31_t)0x712dfa5e, (q31_t)0x712b0af0,
-  (q31_t)0x71281b3c, (q31_t)0x71252b42, (q31_t)0x71223b02, (q31_t)0x711f4a7d, (q31_t)0x711c59b2, (q31_t)0x711968a1, (q31_t)0x7116774a, (q31_t)0x711385ad,
-  (q31_t)0x711093cb, (q31_t)0x710da1a3, (q31_t)0x710aaf35, (q31_t)0x7107bc82, (q31_t)0x7104c989, (q31_t)0x7101d64a, (q31_t)0x70fee2c5, (q31_t)0x70fbeefb,
-  (q31_t)0x70f8faeb, (q31_t)0x70f60695, (q31_t)0x70f311fa, (q31_t)0x70f01d19, (q31_t)0x70ed27f2, (q31_t)0x70ea3286, (q31_t)0x70e73cd4, (q31_t)0x70e446dc,
-  (q31_t)0x70e1509f, (q31_t)0x70de5a1c, (q31_t)0x70db6353, (q31_t)0x70d86c45, (q31_t)0x70d574f1, (q31_t)0x70d27d58, (q31_t)0x70cf8579, (q31_t)0x70cc8d54,
-  (q31_t)0x70c994ea, (q31_t)0x70c69c3a, (q31_t)0x70c3a345, (q31_t)0x70c0aa0a, (q31_t)0x70bdb08a, (q31_t)0x70bab6c4, (q31_t)0x70b7bcb8, (q31_t)0x70b4c267,
-  (q31_t)0x70b1c7d1, (q31_t)0x70aeccf5, (q31_t)0x70abd1d3, (q31_t)0x70a8d66c, (q31_t)0x70a5dac0, (q31_t)0x70a2dece, (q31_t)0x709fe296, (q31_t)0x709ce619,
-  (q31_t)0x7099e957, (q31_t)0x7096ec4f, (q31_t)0x7093ef01, (q31_t)0x7090f16e, (q31_t)0x708df396, (q31_t)0x708af579, (q31_t)0x7087f715, (q31_t)0x7084f86d,
-  (q31_t)0x7081f97f, (q31_t)0x707efa4c, (q31_t)0x707bfad3, (q31_t)0x7078fb15, (q31_t)0x7075fb11, (q31_t)0x7072fac9, (q31_t)0x706ffa3a, (q31_t)0x706cf967,
-  (q31_t)0x7069f84e, (q31_t)0x7066f6f0, (q31_t)0x7063f54c, (q31_t)0x7060f363, (q31_t)0x705df135, (q31_t)0x705aeec1, (q31_t)0x7057ec08, (q31_t)0x7054e90a,
-  (q31_t)0x7051e5c7, (q31_t)0x704ee23e, (q31_t)0x704bde70, (q31_t)0x7048da5d, (q31_t)0x7045d604, (q31_t)0x7042d166, (q31_t)0x703fcc83, (q31_t)0x703cc75b,
-  (q31_t)0x7039c1ed, (q31_t)0x7036bc3b, (q31_t)0x7033b643, (q31_t)0x7030b005, (q31_t)0x702da983, (q31_t)0x702aa2bb, (q31_t)0x70279baf, (q31_t)0x7024945d,
-  (q31_t)0x70218cc6, (q31_t)0x701e84e9, (q31_t)0x701b7cc8, (q31_t)0x70187461, (q31_t)0x70156bb5, (q31_t)0x701262c4, (q31_t)0x700f598e, (q31_t)0x700c5013,
-  (q31_t)0x70094653, (q31_t)0x70063c4e, (q31_t)0x70033203, (q31_t)0x70002774, (q31_t)0x6ffd1c9f, (q31_t)0x6ffa1185, (q31_t)0x6ff70626, (q31_t)0x6ff3fa82,
-  (q31_t)0x6ff0ee99, (q31_t)0x6fede26b, (q31_t)0x6fead5f8, (q31_t)0x6fe7c940, (q31_t)0x6fe4bc43, (q31_t)0x6fe1af01, (q31_t)0x6fdea17a, (q31_t)0x6fdb93ae,
-  (q31_t)0x6fd8859d, (q31_t)0x6fd57746, (q31_t)0x6fd268ab, (q31_t)0x6fcf59cb, (q31_t)0x6fcc4aa6, (q31_t)0x6fc93b3c, (q31_t)0x6fc62b8d, (q31_t)0x6fc31b99,
-  (q31_t)0x6fc00b60, (q31_t)0x6fbcfae2, (q31_t)0x6fb9ea20, (q31_t)0x6fb6d918, (q31_t)0x6fb3c7cb, (q31_t)0x6fb0b63a, (q31_t)0x6fada464, (q31_t)0x6faa9248,
-  (q31_t)0x6fa77fe8, (q31_t)0x6fa46d43, (q31_t)0x6fa15a59, (q31_t)0x6f9e472b, (q31_t)0x6f9b33b7, (q31_t)0x6f981fff, (q31_t)0x6f950c01, (q31_t)0x6f91f7bf,
-  (q31_t)0x6f8ee338, (q31_t)0x6f8bce6c, (q31_t)0x6f88b95c, (q31_t)0x6f85a407, (q31_t)0x6f828e6c, (q31_t)0x6f7f788d, (q31_t)0x6f7c626a, (q31_t)0x6f794c01,
-  (q31_t)0x6f763554, (q31_t)0x6f731e62, (q31_t)0x6f70072b, (q31_t)0x6f6cefb0, (q31_t)0x6f69d7f0, (q31_t)0x6f66bfeb, (q31_t)0x6f63a7a1, (q31_t)0x6f608f13,
-  (q31_t)0x6f5d7640, (q31_t)0x6f5a5d28, (q31_t)0x6f5743cb, (q31_t)0x6f542a2a, (q31_t)0x6f511044, (q31_t)0x6f4df61a, (q31_t)0x6f4adbab, (q31_t)0x6f47c0f7,
-  (q31_t)0x6f44a5ff, (q31_t)0x6f418ac2, (q31_t)0x6f3e6f40, (q31_t)0x6f3b537a, (q31_t)0x6f38376f, (q31_t)0x6f351b1f, (q31_t)0x6f31fe8b, (q31_t)0x6f2ee1b2,
-  (q31_t)0x6f2bc495, (q31_t)0x6f28a733, (q31_t)0x6f25898d, (q31_t)0x6f226ba2, (q31_t)0x6f1f4d72, (q31_t)0x6f1c2efe, (q31_t)0x6f191045, (q31_t)0x6f15f148,
-  (q31_t)0x6f12d206, (q31_t)0x6f0fb280, (q31_t)0x6f0c92b6, (q31_t)0x6f0972a6, (q31_t)0x6f065253, (q31_t)0x6f0331ba, (q31_t)0x6f0010de, (q31_t)0x6efcefbd,
-  (q31_t)0x6ef9ce57, (q31_t)0x6ef6acad, (q31_t)0x6ef38abe, (q31_t)0x6ef0688b, (q31_t)0x6eed4614, (q31_t)0x6eea2358, (q31_t)0x6ee70058, (q31_t)0x6ee3dd13,
-  (q31_t)0x6ee0b98a, (q31_t)0x6edd95bd, (q31_t)0x6eda71ab, (q31_t)0x6ed74d55, (q31_t)0x6ed428ba, (q31_t)0x6ed103db, (q31_t)0x6ecddeb8, (q31_t)0x6ecab950,
-  (q31_t)0x6ec793a4, (q31_t)0x6ec46db4, (q31_t)0x6ec1477f, (q31_t)0x6ebe2106, (q31_t)0x6ebafa49, (q31_t)0x6eb7d347, (q31_t)0x6eb4ac02, (q31_t)0x6eb18477,
-  (q31_t)0x6eae5ca9, (q31_t)0x6eab3496, (q31_t)0x6ea80c3f, (q31_t)0x6ea4e3a4, (q31_t)0x6ea1bac4, (q31_t)0x6e9e91a1, (q31_t)0x6e9b6839, (q31_t)0x6e983e8d,
-  (q31_t)0x6e95149c, (q31_t)0x6e91ea67, (q31_t)0x6e8ebfef, (q31_t)0x6e8b9532, (q31_t)0x6e886a30, (q31_t)0x6e853eeb, (q31_t)0x6e821361, (q31_t)0x6e7ee794,
-  (q31_t)0x6e7bbb82, (q31_t)0x6e788f2c, (q31_t)0x6e756291, (q31_t)0x6e7235b3, (q31_t)0x6e6f0890, (q31_t)0x6e6bdb2a, (q31_t)0x6e68ad7f, (q31_t)0x6e657f90,
-  (q31_t)0x6e62515d, (q31_t)0x6e5f22e6, (q31_t)0x6e5bf42b, (q31_t)0x6e58c52c, (q31_t)0x6e5595e9, (q31_t)0x6e526662, (q31_t)0x6e4f3696, (q31_t)0x6e4c0687,
-  (q31_t)0x6e48d633, (q31_t)0x6e45a59c, (q31_t)0x6e4274c1, (q31_t)0x6e3f43a1, (q31_t)0x6e3c123e, (q31_t)0x6e38e096, (q31_t)0x6e35aeab, (q31_t)0x6e327c7b,
-  (q31_t)0x6e2f4a08, (q31_t)0x6e2c1750, (q31_t)0x6e28e455, (q31_t)0x6e25b115, (q31_t)0x6e227d92, (q31_t)0x6e1f49cb, (q31_t)0x6e1c15c0, (q31_t)0x6e18e171,
-  (q31_t)0x6e15acde, (q31_t)0x6e127807, (q31_t)0x6e0f42ec, (q31_t)0x6e0c0d8e, (q31_t)0x6e08d7eb, (q31_t)0x6e05a205, (q31_t)0x6e026bda, (q31_t)0x6dff356c,
-  (q31_t)0x6dfbfeba, (q31_t)0x6df8c7c4, (q31_t)0x6df5908b, (q31_t)0x6df2590d, (q31_t)0x6def214c, (q31_t)0x6debe947, (q31_t)0x6de8b0fe, (q31_t)0x6de57871,
-  (q31_t)0x6de23fa0, (q31_t)0x6ddf068c, (q31_t)0x6ddbcd34, (q31_t)0x6dd89398, (q31_t)0x6dd559b9, (q31_t)0x6dd21f95, (q31_t)0x6dcee52e, (q31_t)0x6dcbaa83,
-  (q31_t)0x6dc86f95, (q31_t)0x6dc53462, (q31_t)0x6dc1f8ec, (q31_t)0x6dbebd33, (q31_t)0x6dbb8135, (q31_t)0x6db844f4, (q31_t)0x6db5086f, (q31_t)0x6db1cba7,
-  (q31_t)0x6dae8e9b, (q31_t)0x6dab514b, (q31_t)0x6da813b8, (q31_t)0x6da4d5e1, (q31_t)0x6da197c6, (q31_t)0x6d9e5968, (q31_t)0x6d9b1ac6, (q31_t)0x6d97dbe0,
-  (q31_t)0x6d949cb7, (q31_t)0x6d915d4a, (q31_t)0x6d8e1d9a, (q31_t)0x6d8adda6, (q31_t)0x6d879d6e, (q31_t)0x6d845cf3, (q31_t)0x6d811c35, (q31_t)0x6d7ddb33,
-  (q31_t)0x6d7a99ed, (q31_t)0x6d775864, (q31_t)0x6d741697, (q31_t)0x6d70d487, (q31_t)0x6d6d9233, (q31_t)0x6d6a4f9c, (q31_t)0x6d670cc1, (q31_t)0x6d63c9a3,
-  (q31_t)0x6d608641, (q31_t)0x6d5d429c, (q31_t)0x6d59feb3, (q31_t)0x6d56ba87, (q31_t)0x6d537617, (q31_t)0x6d503164, (q31_t)0x6d4cec6e, (q31_t)0x6d49a734,
-  (q31_t)0x6d4661b7, (q31_t)0x6d431bf6, (q31_t)0x6d3fd5f2, (q31_t)0x6d3c8fab, (q31_t)0x6d394920, (q31_t)0x6d360252, (q31_t)0x6d32bb40, (q31_t)0x6d2f73eb,
-  (q31_t)0x6d2c2c53, (q31_t)0x6d28e477, (q31_t)0x6d259c58, (q31_t)0x6d2253f6, (q31_t)0x6d1f0b50, (q31_t)0x6d1bc267, (q31_t)0x6d18793b, (q31_t)0x6d152fcc,
-  (q31_t)0x6d11e619, (q31_t)0x6d0e9c23, (q31_t)0x6d0b51e9, (q31_t)0x6d08076d, (q31_t)0x6d04bcad, (q31_t)0x6d0171aa, (q31_t)0x6cfe2663, (q31_t)0x6cfadada,
-  (q31_t)0x6cf78f0d, (q31_t)0x6cf442fd, (q31_t)0x6cf0f6aa, (q31_t)0x6cedaa13, (q31_t)0x6cea5d3a, (q31_t)0x6ce7101d, (q31_t)0x6ce3c2bd, (q31_t)0x6ce0751a,
-  (q31_t)0x6cdd2733, (q31_t)0x6cd9d90a, (q31_t)0x6cd68a9d, (q31_t)0x6cd33bed, (q31_t)0x6ccfecfa, (q31_t)0x6ccc9dc4, (q31_t)0x6cc94e4b, (q31_t)0x6cc5fe8f,
-  (q31_t)0x6cc2ae90, (q31_t)0x6cbf5e4d, (q31_t)0x6cbc0dc8, (q31_t)0x6cb8bcff, (q31_t)0x6cb56bf4, (q31_t)0x6cb21aa5, (q31_t)0x6caec913, (q31_t)0x6cab773e,
-  (q31_t)0x6ca82527, (q31_t)0x6ca4d2cc, (q31_t)0x6ca1802e, (q31_t)0x6c9e2d4d, (q31_t)0x6c9ada29, (q31_t)0x6c9786c2, (q31_t)0x6c943318, (q31_t)0x6c90df2c,
-  (q31_t)0x6c8d8afc, (q31_t)0x6c8a3689, (q31_t)0x6c86e1d3, (q31_t)0x6c838cdb, (q31_t)0x6c80379f, (q31_t)0x6c7ce220, (q31_t)0x6c798c5f, (q31_t)0x6c76365b,
-  (q31_t)0x6c72e013, (q31_t)0x6c6f8989, (q31_t)0x6c6c32bc, (q31_t)0x6c68dbac, (q31_t)0x6c658459, (q31_t)0x6c622cc4, (q31_t)0x6c5ed4eb, (q31_t)0x6c5b7cd0,
-  (q31_t)0x6c582472, (q31_t)0x6c54cbd1, (q31_t)0x6c5172ed, (q31_t)0x6c4e19c6, (q31_t)0x6c4ac05d, (q31_t)0x6c4766b0, (q31_t)0x6c440cc1, (q31_t)0x6c40b28f,
-  (q31_t)0x6c3d581b, (q31_t)0x6c39fd63, (q31_t)0x6c36a269, (q31_t)0x6c33472c, (q31_t)0x6c2febad, (q31_t)0x6c2c8fea, (q31_t)0x6c2933e5, (q31_t)0x6c25d79d,
-  (q31_t)0x6c227b13, (q31_t)0x6c1f1e45, (q31_t)0x6c1bc136, (q31_t)0x6c1863e3, (q31_t)0x6c15064e, (q31_t)0x6c11a876, (q31_t)0x6c0e4a5b, (q31_t)0x6c0aebfe,
-  (q31_t)0x6c078d5e, (q31_t)0x6c042e7b, (q31_t)0x6c00cf56, (q31_t)0x6bfd6fee, (q31_t)0x6bfa1044, (q31_t)0x6bf6b056, (q31_t)0x6bf35027, (q31_t)0x6befefb5,
-  (q31_t)0x6bec8f00, (q31_t)0x6be92e08, (q31_t)0x6be5ccce, (q31_t)0x6be26b52, (q31_t)0x6bdf0993, (q31_t)0x6bdba791, (q31_t)0x6bd8454d, (q31_t)0x6bd4e2c6,
-  (q31_t)0x6bd17ffd, (q31_t)0x6bce1cf1, (q31_t)0x6bcab9a3, (q31_t)0x6bc75613, (q31_t)0x6bc3f23f, (q31_t)0x6bc08e2a, (q31_t)0x6bbd29d2, (q31_t)0x6bb9c537,
-  (q31_t)0x6bb6605a, (q31_t)0x6bb2fb3b, (q31_t)0x6baf95d9, (q31_t)0x6bac3034, (q31_t)0x6ba8ca4e, (q31_t)0x6ba56425, (q31_t)0x6ba1fdb9, (q31_t)0x6b9e970b,
-  (q31_t)0x6b9b301b, (q31_t)0x6b97c8e8, (q31_t)0x6b946173, (q31_t)0x6b90f9bc, (q31_t)0x6b8d91c2, (q31_t)0x6b8a2986, (q31_t)0x6b86c107, (q31_t)0x6b835846,
-  (q31_t)0x6b7fef43, (q31_t)0x6b7c85fe, (q31_t)0x6b791c76, (q31_t)0x6b75b2ac, (q31_t)0x6b7248a0, (q31_t)0x6b6ede51, (q31_t)0x6b6b73c0, (q31_t)0x6b6808ed,
-  (q31_t)0x6b649dd8, (q31_t)0x6b613280, (q31_t)0x6b5dc6e6, (q31_t)0x6b5a5b0a, (q31_t)0x6b56eeec, (q31_t)0x6b53828b, (q31_t)0x6b5015e9, (q31_t)0x6b4ca904,
-  (q31_t)0x6b493bdd, (q31_t)0x6b45ce73, (q31_t)0x6b4260c8, (q31_t)0x6b3ef2da, (q31_t)0x6b3b84ab, (q31_t)0x6b381639, (q31_t)0x6b34a785, (q31_t)0x6b31388e,
-  (q31_t)0x6b2dc956, (q31_t)0x6b2a59dc, (q31_t)0x6b26ea1f, (q31_t)0x6b237a21, (q31_t)0x6b2009e0, (q31_t)0x6b1c995d, (q31_t)0x6b192898, (q31_t)0x6b15b791,
-  (q31_t)0x6b124648, (q31_t)0x6b0ed4bd, (q31_t)0x6b0b62f0, (q31_t)0x6b07f0e1, (q31_t)0x6b047e90, (q31_t)0x6b010bfd, (q31_t)0x6afd9928, (q31_t)0x6afa2610,
-  (q31_t)0x6af6b2b7, (q31_t)0x6af33f1c, (q31_t)0x6aefcb3f, (q31_t)0x6aec5720, (q31_t)0x6ae8e2bf, (q31_t)0x6ae56e1c, (q31_t)0x6ae1f937, (q31_t)0x6ade8410,
-  (q31_t)0x6adb0ea8, (q31_t)0x6ad798fd, (q31_t)0x6ad42311, (q31_t)0x6ad0ace2, (q31_t)0x6acd3672, (q31_t)0x6ac9bfc0, (q31_t)0x6ac648cb, (q31_t)0x6ac2d195,
-  (q31_t)0x6abf5a1e, (q31_t)0x6abbe264, (q31_t)0x6ab86a68, (q31_t)0x6ab4f22b, (q31_t)0x6ab179ac, (q31_t)0x6aae00eb, (q31_t)0x6aaa87e8, (q31_t)0x6aa70ea4,
-  (q31_t)0x6aa3951d, (q31_t)0x6aa01b55, (q31_t)0x6a9ca14b, (q31_t)0x6a992700, (q31_t)0x6a95ac72, (q31_t)0x6a9231a3, (q31_t)0x6a8eb692, (q31_t)0x6a8b3b3f,
-  (q31_t)0x6a87bfab, (q31_t)0x6a8443d5, (q31_t)0x6a80c7bd, (q31_t)0x6a7d4b64, (q31_t)0x6a79cec8, (q31_t)0x6a7651ec, (q31_t)0x6a72d4cd, (q31_t)0x6a6f576d,
-  (q31_t)0x6a6bd9cb, (q31_t)0x6a685be8, (q31_t)0x6a64ddc2, (q31_t)0x6a615f5c, (q31_t)0x6a5de0b3, (q31_t)0x6a5a61c9, (q31_t)0x6a56e29e, (q31_t)0x6a536331,
-  (q31_t)0x6a4fe382, (q31_t)0x6a4c6391, (q31_t)0x6a48e360, (q31_t)0x6a4562ec, (q31_t)0x6a41e237, (q31_t)0x6a3e6140, (q31_t)0x6a3ae008, (q31_t)0x6a375e8f,
-  (q31_t)0x6a33dcd4, (q31_t)0x6a305ad7, (q31_t)0x6a2cd899, (q31_t)0x6a295619, (q31_t)0x6a25d358, (q31_t)0x6a225055, (q31_t)0x6a1ecd11, (q31_t)0x6a1b498c,
-  (q31_t)0x6a17c5c5, (q31_t)0x6a1441bc, (q31_t)0x6a10bd72, (q31_t)0x6a0d38e7, (q31_t)0x6a09b41a, (q31_t)0x6a062f0c, (q31_t)0x6a02a9bc, (q31_t)0x69ff242b,
-  (q31_t)0x69fb9e59, (q31_t)0x69f81845, (q31_t)0x69f491f0, (q31_t)0x69f10b5a, (q31_t)0x69ed8482, (q31_t)0x69e9fd69, (q31_t)0x69e6760f, (q31_t)0x69e2ee73,
-  (q31_t)0x69df6696, (q31_t)0x69dbde77, (q31_t)0x69d85618, (q31_t)0x69d4cd77, (q31_t)0x69d14494, (q31_t)0x69cdbb71, (q31_t)0x69ca320c, (q31_t)0x69c6a866,
-  (q31_t)0x69c31e7f, (q31_t)0x69bf9456, (q31_t)0x69bc09ec, (q31_t)0x69b87f41, (q31_t)0x69b4f455, (q31_t)0x69b16928, (q31_t)0x69adddb9, (q31_t)0x69aa5209,
-  (q31_t)0x69a6c618, (q31_t)0x69a339e6, (q31_t)0x699fad73, (q31_t)0x699c20be, (q31_t)0x699893c9, (q31_t)0x69950692, (q31_t)0x6991791a, (q31_t)0x698deb61,
-  (q31_t)0x698a5d67, (q31_t)0x6986cf2c, (q31_t)0x698340af, (q31_t)0x697fb1f2, (q31_t)0x697c22f3, (q31_t)0x697893b4, (q31_t)0x69750433, (q31_t)0x69717472,
-  (q31_t)0x696de46f, (q31_t)0x696a542b, (q31_t)0x6966c3a6, (q31_t)0x696332e1, (q31_t)0x695fa1da, (q31_t)0x695c1092, (q31_t)0x69587f09, (q31_t)0x6954ed40,
-  (q31_t)0x69515b35, (q31_t)0x694dc8e9, (q31_t)0x694a365c, (q31_t)0x6946a38f, (q31_t)0x69431080, (q31_t)0x693f7d31, (q31_t)0x693be9a0, (q31_t)0x693855cf,
-  (q31_t)0x6934c1bd, (q31_t)0x69312d6a, (q31_t)0x692d98d6, (q31_t)0x692a0401, (q31_t)0x69266eeb, (q31_t)0x6922d995, (q31_t)0x691f43fd, (q31_t)0x691bae25,
-  (q31_t)0x6918180c, (q31_t)0x691481b2, (q31_t)0x6910eb17, (q31_t)0x690d543b, (q31_t)0x6909bd1f, (q31_t)0x690625c2, (q31_t)0x69028e24, (q31_t)0x68fef645,
-  (q31_t)0x68fb5e25, (q31_t)0x68f7c5c5, (q31_t)0x68f42d24, (q31_t)0x68f09442, (q31_t)0x68ecfb20, (q31_t)0x68e961bd, (q31_t)0x68e5c819, (q31_t)0x68e22e34,
-  (q31_t)0x68de940f, (q31_t)0x68daf9a9, (q31_t)0x68d75f02, (q31_t)0x68d3c41b, (q31_t)0x68d028f2, (q31_t)0x68cc8d8a, (q31_t)0x68c8f1e0, (q31_t)0x68c555f6,
-  (q31_t)0x68c1b9cc, (q31_t)0x68be1d61, (q31_t)0x68ba80b5, (q31_t)0x68b6e3c8, (q31_t)0x68b3469b, (q31_t)0x68afa92e, (q31_t)0x68ac0b7f, (q31_t)0x68a86d91,
-  (q31_t)0x68a4cf61, (q31_t)0x68a130f1, (q31_t)0x689d9241, (q31_t)0x6899f350, (q31_t)0x6896541f, (q31_t)0x6892b4ad, (q31_t)0x688f14fa, (q31_t)0x688b7507,
-  (q31_t)0x6887d4d4, (q31_t)0x68843460, (q31_t)0x688093ab, (q31_t)0x687cf2b6, (q31_t)0x68795181, (q31_t)0x6875b00b, (q31_t)0x68720e55, (q31_t)0x686e6c5e,
-  (q31_t)0x686aca27, (q31_t)0x686727b0, (q31_t)0x686384f8, (q31_t)0x685fe200, (q31_t)0x685c3ec7, (q31_t)0x68589b4e, (q31_t)0x6854f795, (q31_t)0x6851539b,
-  (q31_t)0x684daf61, (q31_t)0x684a0ae6, (q31_t)0x6846662c, (q31_t)0x6842c131, (q31_t)0x683f1bf5, (q31_t)0x683b7679, (q31_t)0x6837d0bd, (q31_t)0x68342ac1,
-  (q31_t)0x68308485, (q31_t)0x682cde08, (q31_t)0x6829374b, (q31_t)0x6825904d, (q31_t)0x6821e910, (q31_t)0x681e4192, (q31_t)0x681a99d4, (q31_t)0x6816f1d6,
-  (q31_t)0x68134997, (q31_t)0x680fa118, (q31_t)0x680bf85a, (q31_t)0x68084f5a, (q31_t)0x6804a61b, (q31_t)0x6800fc9c, (q31_t)0x67fd52dc, (q31_t)0x67f9a8dd,
-  (q31_t)0x67f5fe9d, (q31_t)0x67f2541d, (q31_t)0x67eea95d, (q31_t)0x67eafe5d, (q31_t)0x67e7531c, (q31_t)0x67e3a79c, (q31_t)0x67dffbdc, (q31_t)0x67dc4fdb,
-  (q31_t)0x67d8a39a, (q31_t)0x67d4f71a, (q31_t)0x67d14a59, (q31_t)0x67cd9d58, (q31_t)0x67c9f017, (q31_t)0x67c64297, (q31_t)0x67c294d6, (q31_t)0x67bee6d5,
-  (q31_t)0x67bb3894, (q31_t)0x67b78a13, (q31_t)0x67b3db53, (q31_t)0x67b02c52, (q31_t)0x67ac7d11, (q31_t)0x67a8cd91, (q31_t)0x67a51dd0, (q31_t)0x67a16dcf,
-  (q31_t)0x679dbd8f, (q31_t)0x679a0d0f, (q31_t)0x67965c4e, (q31_t)0x6792ab4e, (q31_t)0x678efa0e, (q31_t)0x678b488e, (q31_t)0x678796ce, (q31_t)0x6783e4cf,
-  (q31_t)0x6780328f, (q31_t)0x677c8010, (q31_t)0x6778cd50, (q31_t)0x67751a51, (q31_t)0x67716713, (q31_t)0x676db394, (q31_t)0x6769ffd5, (q31_t)0x67664bd7,
-  (q31_t)0x67629799, (q31_t)0x675ee31b, (q31_t)0x675b2e5e, (q31_t)0x67577960, (q31_t)0x6753c423, (q31_t)0x67500ea7, (q31_t)0x674c58ea, (q31_t)0x6748a2ee,
-  (q31_t)0x6744ecb2, (q31_t)0x67413636, (q31_t)0x673d7f7b, (q31_t)0x6739c880, (q31_t)0x67361145, (q31_t)0x673259ca, (q31_t)0x672ea210, (q31_t)0x672aea17,
-  (q31_t)0x672731dd, (q31_t)0x67237964, (q31_t)0x671fc0ac, (q31_t)0x671c07b4, (q31_t)0x67184e7c, (q31_t)0x67149504, (q31_t)0x6710db4d, (q31_t)0x670d2157,
-  (q31_t)0x67096721, (q31_t)0x6705acab, (q31_t)0x6701f1f6, (q31_t)0x66fe3701, (q31_t)0x66fa7bcd, (q31_t)0x66f6c059, (q31_t)0x66f304a6, (q31_t)0x66ef48b3,
-  (q31_t)0x66eb8c80, (q31_t)0x66e7d00f, (q31_t)0x66e4135d, (q31_t)0x66e0566c, (q31_t)0x66dc993c, (q31_t)0x66d8dbcd, (q31_t)0x66d51e1d, (q31_t)0x66d1602f,
-  (q31_t)0x66cda201, (q31_t)0x66c9e393, (q31_t)0x66c624e7, (q31_t)0x66c265fa, (q31_t)0x66bea6cf, (q31_t)0x66bae764, (q31_t)0x66b727ba, (q31_t)0x66b367d0,
-  (q31_t)0x66afa7a7, (q31_t)0x66abe73f, (q31_t)0x66a82697, (q31_t)0x66a465b0, (q31_t)0x66a0a489, (q31_t)0x669ce324, (q31_t)0x6699217f, (q31_t)0x66955f9b,
-  (q31_t)0x66919d77, (q31_t)0x668ddb14, (q31_t)0x668a1872, (q31_t)0x66865591, (q31_t)0x66829270, (q31_t)0x667ecf11, (q31_t)0x667b0b72, (q31_t)0x66774793,
-  (q31_t)0x66738376, (q31_t)0x666fbf19, (q31_t)0x666bfa7d, (q31_t)0x666835a2, (q31_t)0x66647088, (q31_t)0x6660ab2f, (q31_t)0x665ce596, (q31_t)0x66591fbf,
-  (q31_t)0x665559a8, (q31_t)0x66519352, (q31_t)0x664dccbd, (q31_t)0x664a05e9, (q31_t)0x66463ed6, (q31_t)0x66427784, (q31_t)0x663eaff2, (q31_t)0x663ae822,
-  (q31_t)0x66372012, (q31_t)0x663357c4, (q31_t)0x662f8f36, (q31_t)0x662bc66a, (q31_t)0x6627fd5e, (q31_t)0x66243413, (q31_t)0x66206a8a, (q31_t)0x661ca0c1,
-  (q31_t)0x6618d6b9, (q31_t)0x66150c73, (q31_t)0x661141ed, (q31_t)0x660d7729, (q31_t)0x6609ac25, (q31_t)0x6605e0e3, (q31_t)0x66021561, (q31_t)0x65fe49a1,
-  (q31_t)0x65fa7da2, (q31_t)0x65f6b164, (q31_t)0x65f2e4e7, (q31_t)0x65ef182b, (q31_t)0x65eb4b30, (q31_t)0x65e77df6, (q31_t)0x65e3b07e, (q31_t)0x65dfe2c6,
-  (q31_t)0x65dc14d0, (q31_t)0x65d8469b, (q31_t)0x65d47827, (q31_t)0x65d0a975, (q31_t)0x65ccda83, (q31_t)0x65c90b53, (q31_t)0x65c53be4, (q31_t)0x65c16c36,
-  (q31_t)0x65bd9c49, (q31_t)0x65b9cc1e, (q31_t)0x65b5fbb4, (q31_t)0x65b22b0b, (q31_t)0x65ae5a23, (q31_t)0x65aa88fd, (q31_t)0x65a6b798, (q31_t)0x65a2e5f4,
-  (q31_t)0x659f1412, (q31_t)0x659b41f1, (q31_t)0x65976f91, (q31_t)0x65939cf3, (q31_t)0x658fca15, (q31_t)0x658bf6fa, (q31_t)0x6588239f, (q31_t)0x65845006,
-  (q31_t)0x65807c2f, (q31_t)0x657ca818, (q31_t)0x6578d3c4, (q31_t)0x6574ff30, (q31_t)0x65712a5e, (q31_t)0x656d554d, (q31_t)0x65697ffe, (q31_t)0x6565aa71,
-  (q31_t)0x6561d4a4, (q31_t)0x655dfe99, (q31_t)0x655a2850, (q31_t)0x655651c8, (q31_t)0x65527b02, (q31_t)0x654ea3fd, (q31_t)0x654accba, (q31_t)0x6546f538,
-  (q31_t)0x65431d77, (q31_t)0x653f4579, (q31_t)0x653b6d3b, (q31_t)0x653794c0, (q31_t)0x6533bc06, (q31_t)0x652fe30d, (q31_t)0x652c09d6, (q31_t)0x65283061,
-  (q31_t)0x652456ad, (q31_t)0x65207cbb, (q31_t)0x651ca28a, (q31_t)0x6518c81b, (q31_t)0x6514ed6e, (q31_t)0x65111283, (q31_t)0x650d3759, (q31_t)0x65095bf0,
-  (q31_t)0x6505804a, (q31_t)0x6501a465, (q31_t)0x64fdc841, (q31_t)0x64f9ebe0, (q31_t)0x64f60f40, (q31_t)0x64f23262, (q31_t)0x64ee5546, (q31_t)0x64ea77eb,
-  (q31_t)0x64e69a52, (q31_t)0x64e2bc7b, (q31_t)0x64dede66, (q31_t)0x64db0012, (q31_t)0x64d72180, (q31_t)0x64d342b0, (q31_t)0x64cf63a2, (q31_t)0x64cb8456,
-  (q31_t)0x64c7a4cb, (q31_t)0x64c3c502, (q31_t)0x64bfe4fc, (q31_t)0x64bc04b6, (q31_t)0x64b82433, (q31_t)0x64b44372, (q31_t)0x64b06273, (q31_t)0x64ac8135,
-  (q31_t)0x64a89fba, (q31_t)0x64a4be00, (q31_t)0x64a0dc08, (q31_t)0x649cf9d2, (q31_t)0x6499175e, (q31_t)0x649534ac, (q31_t)0x649151bc, (q31_t)0x648d6e8e,
-  (q31_t)0x64898b22, (q31_t)0x6485a778, (q31_t)0x6481c390, (q31_t)0x647ddf6a, (q31_t)0x6479fb06, (q31_t)0x64761664, (q31_t)0x64723184, (q31_t)0x646e4c66,
-  (q31_t)0x646a670a, (q31_t)0x64668170, (q31_t)0x64629b98, (q31_t)0x645eb582, (q31_t)0x645acf2e, (q31_t)0x6456e89d, (q31_t)0x645301cd, (q31_t)0x644f1ac0,
-  (q31_t)0x644b3375, (q31_t)0x64474bec, (q31_t)0x64436425, (q31_t)0x643f7c20, (q31_t)0x643b93dd, (q31_t)0x6437ab5d, (q31_t)0x6433c29f, (q31_t)0x642fd9a3,
-  (q31_t)0x642bf069, (q31_t)0x642806f1, (q31_t)0x64241d3c, (q31_t)0x64203348, (q31_t)0x641c4917, (q31_t)0x64185ea9, (q31_t)0x641473fc, (q31_t)0x64108912,
-  (q31_t)0x640c9dea, (q31_t)0x6408b284, (q31_t)0x6404c6e1, (q31_t)0x6400db00, (q31_t)0x63fceee1, (q31_t)0x63f90285, (q31_t)0x63f515eb, (q31_t)0x63f12913,
-  (q31_t)0x63ed3bfd, (q31_t)0x63e94eaa, (q31_t)0x63e5611a, (q31_t)0x63e1734b, (q31_t)0x63dd853f, (q31_t)0x63d996f6, (q31_t)0x63d5a86f, (q31_t)0x63d1b9aa,
-  (q31_t)0x63cdcaa8, (q31_t)0x63c9db68, (q31_t)0x63c5ebeb, (q31_t)0x63c1fc30, (q31_t)0x63be0c37, (q31_t)0x63ba1c01, (q31_t)0x63b62b8e, (q31_t)0x63b23add,
-  (q31_t)0x63ae49ee, (q31_t)0x63aa58c2, (q31_t)0x63a66759, (q31_t)0x63a275b2, (q31_t)0x639e83cd, (q31_t)0x639a91ac, (q31_t)0x63969f4c, (q31_t)0x6392acaf,
-  (q31_t)0x638eb9d5, (q31_t)0x638ac6be, (q31_t)0x6386d369, (q31_t)0x6382dfd6, (q31_t)0x637eec07, (q31_t)0x637af7fa, (q31_t)0x637703af, (q31_t)0x63730f27,
-  (q31_t)0x636f1a62, (q31_t)0x636b2560, (q31_t)0x63673020, (q31_t)0x63633aa3, (q31_t)0x635f44e8, (q31_t)0x635b4ef0, (q31_t)0x635758bb, (q31_t)0x63536249,
-  (q31_t)0x634f6b99, (q31_t)0x634b74ad, (q31_t)0x63477d82, (q31_t)0x6343861b, (q31_t)0x633f8e76, (q31_t)0x633b9695, (q31_t)0x63379e76, (q31_t)0x6333a619,
-  (q31_t)0x632fad80, (q31_t)0x632bb4a9, (q31_t)0x6327bb96, (q31_t)0x6323c245, (q31_t)0x631fc8b7, (q31_t)0x631bceeb, (q31_t)0x6317d4e3, (q31_t)0x6313da9e,
-  (q31_t)0x630fe01b, (q31_t)0x630be55b, (q31_t)0x6307ea5e, (q31_t)0x6303ef25, (q31_t)0x62fff3ae, (q31_t)0x62fbf7fa, (q31_t)0x62f7fc08, (q31_t)0x62f3ffda,
-  (q31_t)0x62f0036f, (q31_t)0x62ec06c7, (q31_t)0x62e809e2, (q31_t)0x62e40cbf, (q31_t)0x62e00f60, (q31_t)0x62dc11c4, (q31_t)0x62d813eb, (q31_t)0x62d415d4,
-  (q31_t)0x62d01781, (q31_t)0x62cc18f1, (q31_t)0x62c81a24, (q31_t)0x62c41b1a, (q31_t)0x62c01bd3, (q31_t)0x62bc1c4f, (q31_t)0x62b81c8f, (q31_t)0x62b41c91,
-  (q31_t)0x62b01c57, (q31_t)0x62ac1bdf, (q31_t)0x62a81b2b, (q31_t)0x62a41a3a, (q31_t)0x62a0190c, (q31_t)0x629c17a1, (q31_t)0x629815fa, (q31_t)0x62941415,
-  (q31_t)0x629011f4, (q31_t)0x628c0f96, (q31_t)0x62880cfb, (q31_t)0x62840a23, (q31_t)0x6280070f, (q31_t)0x627c03be, (q31_t)0x62780030, (q31_t)0x6273fc65,
-  (q31_t)0x626ff85e, (q31_t)0x626bf41a, (q31_t)0x6267ef99, (q31_t)0x6263eadc, (q31_t)0x625fe5e1, (q31_t)0x625be0ab, (q31_t)0x6257db37, (q31_t)0x6253d587,
-  (q31_t)0x624fcf9a, (q31_t)0x624bc970, (q31_t)0x6247c30a, (q31_t)0x6243bc68, (q31_t)0x623fb588, (q31_t)0x623bae6c, (q31_t)0x6237a714, (q31_t)0x62339f7e,
-  (q31_t)0x622f97ad, (q31_t)0x622b8f9e, (q31_t)0x62278754, (q31_t)0x62237ecc, (q31_t)0x621f7608, (q31_t)0x621b6d08, (q31_t)0x621763cb, (q31_t)0x62135a51,
-  (q31_t)0x620f509b, (q31_t)0x620b46a9, (q31_t)0x62073c7a, (q31_t)0x6203320e, (q31_t)0x61ff2766, (q31_t)0x61fb1c82, (q31_t)0x61f71161, (q31_t)0x61f30604,
-  (q31_t)0x61eefa6b, (q31_t)0x61eaee95, (q31_t)0x61e6e282, (q31_t)0x61e2d633, (q31_t)0x61dec9a8, (q31_t)0x61dabce0, (q31_t)0x61d6afdd, (q31_t)0x61d2a29c,
-  (q31_t)0x61ce9520, (q31_t)0x61ca8767, (q31_t)0x61c67971, (q31_t)0x61c26b40, (q31_t)0x61be5cd2, (q31_t)0x61ba4e28, (q31_t)0x61b63f41, (q31_t)0x61b2301e,
-  (q31_t)0x61ae20bf, (q31_t)0x61aa1124, (q31_t)0x61a6014d, (q31_t)0x61a1f139, (q31_t)0x619de0e9, (q31_t)0x6199d05d, (q31_t)0x6195bf94, (q31_t)0x6191ae90,
-  (q31_t)0x618d9d4f, (q31_t)0x61898bd2, (q31_t)0x61857a19, (q31_t)0x61816824, (q31_t)0x617d55f2, (q31_t)0x61794385, (q31_t)0x617530db, (q31_t)0x61711df5,
-  (q31_t)0x616d0ad3, (q31_t)0x6168f775, (q31_t)0x6164e3db, (q31_t)0x6160d005, (q31_t)0x615cbbf3, (q31_t)0x6158a7a4, (q31_t)0x6154931a, (q31_t)0x61507e54,
-  (q31_t)0x614c6951, (q31_t)0x61485413, (q31_t)0x61443e98, (q31_t)0x614028e2, (q31_t)0x613c12f0, (q31_t)0x6137fcc1, (q31_t)0x6133e657, (q31_t)0x612fcfb0,
-  (q31_t)0x612bb8ce, (q31_t)0x6127a1b0, (q31_t)0x61238a56, (q31_t)0x611f72c0, (q31_t)0x611b5aee, (q31_t)0x611742e0, (q31_t)0x61132a96, (q31_t)0x610f1210,
-  (q31_t)0x610af94f, (q31_t)0x6106e051, (q31_t)0x6102c718, (q31_t)0x60feada3, (q31_t)0x60fa93f2, (q31_t)0x60f67a05, (q31_t)0x60f25fdd, (q31_t)0x60ee4579,
-  (q31_t)0x60ea2ad8, (q31_t)0x60e60ffd, (q31_t)0x60e1f4e5, (q31_t)0x60ddd991, (q31_t)0x60d9be02, (q31_t)0x60d5a237, (q31_t)0x60d18631, (q31_t)0x60cd69ee,
-  (q31_t)0x60c94d70, (q31_t)0x60c530b6, (q31_t)0x60c113c1, (q31_t)0x60bcf690, (q31_t)0x60b8d923, (q31_t)0x60b4bb7a, (q31_t)0x60b09d96, (q31_t)0x60ac7f76,
-  (q31_t)0x60a8611b, (q31_t)0x60a44284, (q31_t)0x60a023b1, (q31_t)0x609c04a3, (q31_t)0x6097e559, (q31_t)0x6093c5d3, (q31_t)0x608fa612, (q31_t)0x608b8616,
-  (q31_t)0x608765dd, (q31_t)0x6083456a, (q31_t)0x607f24ba, (q31_t)0x607b03d0, (q31_t)0x6076e2a9, (q31_t)0x6072c148, (q31_t)0x606e9faa, (q31_t)0x606a7dd2,
-  (q31_t)0x60665bbd, (q31_t)0x6062396e, (q31_t)0x605e16e2, (q31_t)0x6059f41c, (q31_t)0x6055d11a, (q31_t)0x6051addc, (q31_t)0x604d8a63, (q31_t)0x604966af,
-  (q31_t)0x604542bf, (q31_t)0x60411e94, (q31_t)0x603cfa2e, (q31_t)0x6038d58c, (q31_t)0x6034b0af, (q31_t)0x60308b97, (q31_t)0x602c6643, (q31_t)0x602840b4,
-  (q31_t)0x60241ae9, (q31_t)0x601ff4e3, (q31_t)0x601bcea2, (q31_t)0x6017a826, (q31_t)0x6013816e, (q31_t)0x600f5a7b, (q31_t)0x600b334d, (q31_t)0x60070be4,
-  (q31_t)0x6002e43f, (q31_t)0x5ffebc5f, (q31_t)0x5ffa9444, (q31_t)0x5ff66bee, (q31_t)0x5ff2435d, (q31_t)0x5fee1a90, (q31_t)0x5fe9f188, (q31_t)0x5fe5c845,
-  (q31_t)0x5fe19ec7, (q31_t)0x5fdd750e, (q31_t)0x5fd94b19, (q31_t)0x5fd520ea, (q31_t)0x5fd0f67f, (q31_t)0x5fcccbd9, (q31_t)0x5fc8a0f8, (q31_t)0x5fc475dc,
-  (q31_t)0x5fc04a85, (q31_t)0x5fbc1ef3, (q31_t)0x5fb7f326, (q31_t)0x5fb3c71e, (q31_t)0x5faf9adb, (q31_t)0x5fab6e5d, (q31_t)0x5fa741a3, (q31_t)0x5fa314af,
-  (q31_t)0x5f9ee780, (q31_t)0x5f9aba16, (q31_t)0x5f968c70, (q31_t)0x5f925e90, (q31_t)0x5f8e3075, (q31_t)0x5f8a021f, (q31_t)0x5f85d38e, (q31_t)0x5f81a4c2,
-  (q31_t)0x5f7d75bb, (q31_t)0x5f794679, (q31_t)0x5f7516fd, (q31_t)0x5f70e745, (q31_t)0x5f6cb753, (q31_t)0x5f688726, (q31_t)0x5f6456be, (q31_t)0x5f60261b,
-  (q31_t)0x5f5bf53d, (q31_t)0x5f57c424, (q31_t)0x5f5392d1, (q31_t)0x5f4f6143, (q31_t)0x5f4b2f7a, (q31_t)0x5f46fd76, (q31_t)0x5f42cb37, (q31_t)0x5f3e98be,
-  (q31_t)0x5f3a660a, (q31_t)0x5f36331b, (q31_t)0x5f31fff1, (q31_t)0x5f2dcc8d, (q31_t)0x5f2998ee, (q31_t)0x5f256515, (q31_t)0x5f213100, (q31_t)0x5f1cfcb1,
-  (q31_t)0x5f18c827, (q31_t)0x5f149363, (q31_t)0x5f105e64, (q31_t)0x5f0c292a, (q31_t)0x5f07f3b6, (q31_t)0x5f03be07, (q31_t)0x5eff881d, (q31_t)0x5efb51f9,
-  (q31_t)0x5ef71b9b, (q31_t)0x5ef2e501, (q31_t)0x5eeeae2d, (q31_t)0x5eea771f, (q31_t)0x5ee63fd6, (q31_t)0x5ee20853, (q31_t)0x5eddd094, (q31_t)0x5ed9989c,
-  (q31_t)0x5ed56069, (q31_t)0x5ed127fb, (q31_t)0x5eccef53, (q31_t)0x5ec8b671, (q31_t)0x5ec47d54, (q31_t)0x5ec043fc, (q31_t)0x5ebc0a6a, (q31_t)0x5eb7d09e,
-  (q31_t)0x5eb39697, (q31_t)0x5eaf5c56, (q31_t)0x5eab21da, (q31_t)0x5ea6e724, (q31_t)0x5ea2ac34, (q31_t)0x5e9e7109, (q31_t)0x5e9a35a4, (q31_t)0x5e95fa05,
-  (q31_t)0x5e91be2b, (q31_t)0x5e8d8217, (q31_t)0x5e8945c8, (q31_t)0x5e85093f, (q31_t)0x5e80cc7c, (q31_t)0x5e7c8f7f, (q31_t)0x5e785247, (q31_t)0x5e7414d5,
-  (q31_t)0x5e6fd729, (q31_t)0x5e6b9943, (q31_t)0x5e675b22, (q31_t)0x5e631cc7, (q31_t)0x5e5ede32, (q31_t)0x5e5a9f62, (q31_t)0x5e566059, (q31_t)0x5e522115,
-  (q31_t)0x5e4de197, (q31_t)0x5e49a1df, (q31_t)0x5e4561ed, (q31_t)0x5e4121c0, (q31_t)0x5e3ce15a, (q31_t)0x5e38a0b9, (q31_t)0x5e345fde, (q31_t)0x5e301ec9,
-  (q31_t)0x5e2bdd7a, (q31_t)0x5e279bf1, (q31_t)0x5e235a2e, (q31_t)0x5e1f1830, (q31_t)0x5e1ad5f9, (q31_t)0x5e169388, (q31_t)0x5e1250dc, (q31_t)0x5e0e0df7,
-  (q31_t)0x5e09cad7, (q31_t)0x5e05877e, (q31_t)0x5e0143ea, (q31_t)0x5dfd001d, (q31_t)0x5df8bc15, (q31_t)0x5df477d4, (q31_t)0x5df03359, (q31_t)0x5debeea3,
-  (q31_t)0x5de7a9b4, (q31_t)0x5de3648b, (q31_t)0x5ddf1f28, (q31_t)0x5ddad98b, (q31_t)0x5dd693b4, (q31_t)0x5dd24da3, (q31_t)0x5dce0759, (q31_t)0x5dc9c0d4,
-  (q31_t)0x5dc57a16, (q31_t)0x5dc1331d, (q31_t)0x5dbcebeb, (q31_t)0x5db8a480, (q31_t)0x5db45cda, (q31_t)0x5db014fa, (q31_t)0x5dabcce1, (q31_t)0x5da7848e,
-  (q31_t)0x5da33c01, (q31_t)0x5d9ef33b, (q31_t)0x5d9aaa3a, (q31_t)0x5d966100, (q31_t)0x5d92178d, (q31_t)0x5d8dcddf, (q31_t)0x5d8983f8, (q31_t)0x5d8539d7,
-  (q31_t)0x5d80ef7c, (q31_t)0x5d7ca4e8, (q31_t)0x5d785a1a, (q31_t)0x5d740f12, (q31_t)0x5d6fc3d1, (q31_t)0x5d6b7856, (q31_t)0x5d672ca2, (q31_t)0x5d62e0b4,
-  (q31_t)0x5d5e948c, (q31_t)0x5d5a482a, (q31_t)0x5d55fb90, (q31_t)0x5d51aebb, (q31_t)0x5d4d61ad, (q31_t)0x5d491465, (q31_t)0x5d44c6e4, (q31_t)0x5d40792a,
-  (q31_t)0x5d3c2b35, (q31_t)0x5d37dd08, (q31_t)0x5d338ea0, (q31_t)0x5d2f4000, (q31_t)0x5d2af125, (q31_t)0x5d26a212, (q31_t)0x5d2252c5, (q31_t)0x5d1e033e,
-  (q31_t)0x5d19b37e, (q31_t)0x5d156385, (q31_t)0x5d111352, (q31_t)0x5d0cc2e5, (q31_t)0x5d087240, (q31_t)0x5d042161, (q31_t)0x5cffd048, (q31_t)0x5cfb7ef7,
-  (q31_t)0x5cf72d6b, (q31_t)0x5cf2dba7, (q31_t)0x5cee89a9, (q31_t)0x5cea3772, (q31_t)0x5ce5e501, (q31_t)0x5ce19258, (q31_t)0x5cdd3f75, (q31_t)0x5cd8ec58,
-  (q31_t)0x5cd49903, (q31_t)0x5cd04574, (q31_t)0x5ccbf1ab, (q31_t)0x5cc79daa, (q31_t)0x5cc3496f, (q31_t)0x5cbef4fc, (q31_t)0x5cbaa04f, (q31_t)0x5cb64b68,
-  (q31_t)0x5cb1f649, (q31_t)0x5cada0f0, (q31_t)0x5ca94b5e, (q31_t)0x5ca4f594, (q31_t)0x5ca09f8f, (q31_t)0x5c9c4952, (q31_t)0x5c97f2dc, (q31_t)0x5c939c2c,
-  (q31_t)0x5c8f4544, (q31_t)0x5c8aee22, (q31_t)0x5c8696c7, (q31_t)0x5c823f34, (q31_t)0x5c7de767, (q31_t)0x5c798f61, (q31_t)0x5c753722, (q31_t)0x5c70deaa,
-  (q31_t)0x5c6c85f9, (q31_t)0x5c682d0f, (q31_t)0x5c63d3eb, (q31_t)0x5c5f7a8f, (q31_t)0x5c5b20fa, (q31_t)0x5c56c72c, (q31_t)0x5c526d25, (q31_t)0x5c4e12e5,
-  (q31_t)0x5c49b86d, (q31_t)0x5c455dbb, (q31_t)0x5c4102d0, (q31_t)0x5c3ca7ad, (q31_t)0x5c384c50, (q31_t)0x5c33f0bb, (q31_t)0x5c2f94ec, (q31_t)0x5c2b38e5,
-  (q31_t)0x5c26dca5, (q31_t)0x5c22802c, (q31_t)0x5c1e237b, (q31_t)0x5c19c690, (q31_t)0x5c15696d, (q31_t)0x5c110c11, (q31_t)0x5c0cae7c, (q31_t)0x5c0850ae,
-  (q31_t)0x5c03f2a8, (q31_t)0x5bff9469, (q31_t)0x5bfb35f1, (q31_t)0x5bf6d740, (q31_t)0x5bf27857, (q31_t)0x5bee1935, (q31_t)0x5be9b9da, (q31_t)0x5be55a46,
-  (q31_t)0x5be0fa7a, (q31_t)0x5bdc9a75, (q31_t)0x5bd83a37, (q31_t)0x5bd3d9c1, (q31_t)0x5bcf7912, (q31_t)0x5bcb182b, (q31_t)0x5bc6b70b, (q31_t)0x5bc255b2,
-  (q31_t)0x5bbdf421, (q31_t)0x5bb99257, (q31_t)0x5bb53054, (q31_t)0x5bb0ce19, (q31_t)0x5bac6ba6, (q31_t)0x5ba808f9, (q31_t)0x5ba3a615, (q31_t)0x5b9f42f7,
-  (q31_t)0x5b9adfa2, (q31_t)0x5b967c13, (q31_t)0x5b92184d, (q31_t)0x5b8db44d, (q31_t)0x5b895016, (q31_t)0x5b84eba6, (q31_t)0x5b8086fd, (q31_t)0x5b7c221c,
-  (q31_t)0x5b77bd02, (q31_t)0x5b7357b0, (q31_t)0x5b6ef226, (q31_t)0x5b6a8c63, (q31_t)0x5b662668, (q31_t)0x5b61c035, (q31_t)0x5b5d59c9, (q31_t)0x5b58f324,
-  (q31_t)0x5b548c48, (q31_t)0x5b502533, (q31_t)0x5b4bbde6, (q31_t)0x5b475660, (q31_t)0x5b42eea2, (q31_t)0x5b3e86ac, (q31_t)0x5b3a1e7e, (q31_t)0x5b35b617,
-  (q31_t)0x5b314d78, (q31_t)0x5b2ce4a1, (q31_t)0x5b287b91, (q31_t)0x5b241249, (q31_t)0x5b1fa8c9, (q31_t)0x5b1b3f11, (q31_t)0x5b16d521, (q31_t)0x5b126af8,
-  (q31_t)0x5b0e0098, (q31_t)0x5b0995ff, (q31_t)0x5b052b2e, (q31_t)0x5b00c025, (q31_t)0x5afc54e3, (q31_t)0x5af7e96a, (q31_t)0x5af37db8, (q31_t)0x5aef11cf,
-  (q31_t)0x5aeaa5ad, (q31_t)0x5ae63953, (q31_t)0x5ae1ccc1, (q31_t)0x5add5ff7, (q31_t)0x5ad8f2f5, (q31_t)0x5ad485bb, (q31_t)0x5ad01849, (q31_t)0x5acbaa9f,
-  (q31_t)0x5ac73cbd, (q31_t)0x5ac2cea3, (q31_t)0x5abe6050, (q31_t)0x5ab9f1c6, (q31_t)0x5ab58304, (q31_t)0x5ab1140a, (q31_t)0x5aaca4d8, (q31_t)0x5aa8356f,
-  (q31_t)0x5aa3c5cd, (q31_t)0x5a9f55f3, (q31_t)0x5a9ae5e2, (q31_t)0x5a967598, (q31_t)0x5a920517, (q31_t)0x5a8d945d, (q31_t)0x5a89236c, (q31_t)0x5a84b243,
-  (q31_t)0x5a8040e3, (q31_t)0x5a7bcf4a, (q31_t)0x5a775d7a, (q31_t)0x5a72eb71, (q31_t)0x5a6e7931, (q31_t)0x5a6a06ba, (q31_t)0x5a65940a, (q31_t)0x5a612123,
-  (q31_t)0x5a5cae04, (q31_t)0x5a583aad, (q31_t)0x5a53c71e, (q31_t)0x5a4f5358, (q31_t)0x5a4adf5a, (q31_t)0x5a466b24, (q31_t)0x5a41f6b7, (q31_t)0x5a3d8212,
-  (q31_t)0x5a390d35, (q31_t)0x5a349821, (q31_t)0x5a3022d5, (q31_t)0x5a2bad51, (q31_t)0x5a273796, (q31_t)0x5a22c1a3, (q31_t)0x5a1e4b79, (q31_t)0x5a19d517,
-  (q31_t)0x5a155e7d, (q31_t)0x5a10e7ac, (q31_t)0x5a0c70a3, (q31_t)0x5a07f963, (q31_t)0x5a0381eb, (q31_t)0x59ff0a3c, (q31_t)0x59fa9255, (q31_t)0x59f61a36,
-  (q31_t)0x59f1a1e0, (q31_t)0x59ed2953, (q31_t)0x59e8b08e, (q31_t)0x59e43792, (q31_t)0x59dfbe5e, (q31_t)0x59db44f3, (q31_t)0x59d6cb50, (q31_t)0x59d25176,
-  (q31_t)0x59cdd765, (q31_t)0x59c95d1c, (q31_t)0x59c4e29c, (q31_t)0x59c067e4, (q31_t)0x59bbecf5, (q31_t)0x59b771cf, (q31_t)0x59b2f671, (q31_t)0x59ae7add,
-  (q31_t)0x59a9ff10, (q31_t)0x59a5830d, (q31_t)0x59a106d2, (q31_t)0x599c8a60, (q31_t)0x59980db6, (q31_t)0x599390d5, (q31_t)0x598f13bd, (q31_t)0x598a966e,
-  (q31_t)0x598618e8, (q31_t)0x59819b2a, (q31_t)0x597d1d35, (q31_t)0x59789f09, (q31_t)0x597420a6, (q31_t)0x596fa20b, (q31_t)0x596b233a, (q31_t)0x5966a431,
-  (q31_t)0x596224f1, (q31_t)0x595da57a, (q31_t)0x595925cc, (q31_t)0x5954a5e6, (q31_t)0x595025ca, (q31_t)0x594ba576, (q31_t)0x594724ec, (q31_t)0x5942a42a,
-  (q31_t)0x593e2331, (q31_t)0x5939a202, (q31_t)0x5935209b, (q31_t)0x59309efd, (q31_t)0x592c1d28, (q31_t)0x59279b1c, (q31_t)0x592318d9, (q31_t)0x591e9660,
-  (q31_t)0x591a13af, (q31_t)0x591590c7, (q31_t)0x59110da8, (q31_t)0x590c8a53, (q31_t)0x590806c6, (q31_t)0x59038302, (q31_t)0x58feff08, (q31_t)0x58fa7ad7,
-  (q31_t)0x58f5f66e, (q31_t)0x58f171cf, (q31_t)0x58ececf9, (q31_t)0x58e867ed, (q31_t)0x58e3e2a9, (q31_t)0x58df5d2e, (q31_t)0x58dad77d, (q31_t)0x58d65195,
-  (q31_t)0x58d1cb76, (q31_t)0x58cd4520, (q31_t)0x58c8be94, (q31_t)0x58c437d1, (q31_t)0x58bfb0d7, (q31_t)0x58bb29a6, (q31_t)0x58b6a23e, (q31_t)0x58b21aa0,
-  (q31_t)0x58ad92cb, (q31_t)0x58a90ac0, (q31_t)0x58a4827d, (q31_t)0x589ffa04, (q31_t)0x589b7155, (q31_t)0x5896e86f, (q31_t)0x58925f52, (q31_t)0x588dd5fe,
-  (q31_t)0x58894c74, (q31_t)0x5884c2b3, (q31_t)0x588038bb, (q31_t)0x587bae8d, (q31_t)0x58772429, (q31_t)0x5872998e, (q31_t)0x586e0ebc, (q31_t)0x586983b4,
-  (q31_t)0x5864f875, (q31_t)0x58606d00, (q31_t)0x585be154, (q31_t)0x58575571, (q31_t)0x5852c958, (q31_t)0x584e3d09, (q31_t)0x5849b083, (q31_t)0x584523c7,
-  (q31_t)0x584096d4, (q31_t)0x583c09ab, (q31_t)0x58377c4c, (q31_t)0x5832eeb6, (q31_t)0x582e60e9, (q31_t)0x5829d2e6, (q31_t)0x582544ad, (q31_t)0x5820b63e,
-  (q31_t)0x581c2798, (q31_t)0x581798bb, (q31_t)0x581309a9, (q31_t)0x580e7a60, (q31_t)0x5809eae1, (q31_t)0x58055b2b, (q31_t)0x5800cb3f, (q31_t)0x57fc3b1d,
-  (q31_t)0x57f7aac5, (q31_t)0x57f31a36, (q31_t)0x57ee8971, (q31_t)0x57e9f876, (q31_t)0x57e56744, (q31_t)0x57e0d5dd, (q31_t)0x57dc443f, (q31_t)0x57d7b26b,
-  (q31_t)0x57d32061, (q31_t)0x57ce8e20, (q31_t)0x57c9fbaa, (q31_t)0x57c568fd, (q31_t)0x57c0d61a, (q31_t)0x57bc4301, (q31_t)0x57b7afb2, (q31_t)0x57b31c2d,
-  (q31_t)0x57ae8872, (q31_t)0x57a9f480, (q31_t)0x57a56059, (q31_t)0x57a0cbfb, (q31_t)0x579c3768, (q31_t)0x5797a29e, (q31_t)0x57930d9e, (q31_t)0x578e7869,
-  (q31_t)0x5789e2fd, (q31_t)0x57854d5b, (q31_t)0x5780b784, (q31_t)0x577c2176, (q31_t)0x57778b32, (q31_t)0x5772f4b9, (q31_t)0x576e5e09, (q31_t)0x5769c724,
-  (q31_t)0x57653009, (q31_t)0x576098b7, (q31_t)0x575c0130, (q31_t)0x57576973, (q31_t)0x5752d180, (q31_t)0x574e3957, (q31_t)0x5749a0f9, (q31_t)0x57450864,
-  (q31_t)0x57406f9a, (q31_t)0x573bd69a, (q31_t)0x57373d64, (q31_t)0x5732a3f8, (q31_t)0x572e0a56, (q31_t)0x5729707f, (q31_t)0x5724d672, (q31_t)0x57203c2f,
-  (q31_t)0x571ba1b7, (q31_t)0x57170708, (q31_t)0x57126c24, (q31_t)0x570dd10a, (q31_t)0x570935bb, (q31_t)0x57049a36, (q31_t)0x56fffe7b, (q31_t)0x56fb628b,
-  (q31_t)0x56f6c664, (q31_t)0x56f22a09, (q31_t)0x56ed8d77, (q31_t)0x56e8f0b0, (q31_t)0x56e453b4, (q31_t)0x56dfb681, (q31_t)0x56db1919, (q31_t)0x56d67b7c,
-  (q31_t)0x56d1dda9, (q31_t)0x56cd3fa1, (q31_t)0x56c8a162, (q31_t)0x56c402ef, (q31_t)0x56bf6446, (q31_t)0x56bac567, (q31_t)0x56b62653, (q31_t)0x56b18709,
-  (q31_t)0x56ace78a, (q31_t)0x56a847d6, (q31_t)0x56a3a7ec, (q31_t)0x569f07cc, (q31_t)0x569a6777, (q31_t)0x5695c6ed, (q31_t)0x5691262d, (q31_t)0x568c8538,
-  (q31_t)0x5687e40e, (q31_t)0x568342ae, (q31_t)0x567ea118, (q31_t)0x5679ff4e, (q31_t)0x56755d4e, (q31_t)0x5670bb19, (q31_t)0x566c18ae, (q31_t)0x5667760e,
-  (q31_t)0x5662d339, (q31_t)0x565e302e, (q31_t)0x56598cee, (q31_t)0x5654e979, (q31_t)0x565045cf, (q31_t)0x564ba1f0, (q31_t)0x5646fddb, (q31_t)0x56425991,
-  (q31_t)0x563db512, (q31_t)0x5639105d, (q31_t)0x56346b74, (q31_t)0x562fc655, (q31_t)0x562b2101, (q31_t)0x56267b78, (q31_t)0x5621d5ba, (q31_t)0x561d2fc6,
-  (q31_t)0x5618899e, (q31_t)0x5613e340, (q31_t)0x560f3cae, (q31_t)0x560a95e6, (q31_t)0x5605eee9, (q31_t)0x560147b7, (q31_t)0x55fca050, (q31_t)0x55f7f8b4,
-  (q31_t)0x55f350e3, (q31_t)0x55eea8dd, (q31_t)0x55ea00a2, (q31_t)0x55e55832, (q31_t)0x55e0af8d, (q31_t)0x55dc06b3, (q31_t)0x55d75da4, (q31_t)0x55d2b460,
-  (q31_t)0x55ce0ae7, (q31_t)0x55c96139, (q31_t)0x55c4b757, (q31_t)0x55c00d3f, (q31_t)0x55bb62f3, (q31_t)0x55b6b871, (q31_t)0x55b20dbb, (q31_t)0x55ad62d0,
-  (q31_t)0x55a8b7b0, (q31_t)0x55a40c5b, (q31_t)0x559f60d1, (q31_t)0x559ab513, (q31_t)0x55960920, (q31_t)0x55915cf8, (q31_t)0x558cb09b, (q31_t)0x55880409,
-  (q31_t)0x55835743, (q31_t)0x557eaa48, (q31_t)0x5579fd18, (q31_t)0x55754fb3, (q31_t)0x5570a21a, (q31_t)0x556bf44c, (q31_t)0x55674649, (q31_t)0x55629812,
-  (q31_t)0x555de9a6, (q31_t)0x55593b05, (q31_t)0x55548c30, (q31_t)0x554fdd26, (q31_t)0x554b2de7, (q31_t)0x55467e74, (q31_t)0x5541cecc, (q31_t)0x553d1ef0,
-  (q31_t)0x55386edf, (q31_t)0x5533be99, (q31_t)0x552f0e1f, (q31_t)0x552a5d70, (q31_t)0x5525ac8d, (q31_t)0x5520fb75, (q31_t)0x551c4a29, (q31_t)0x551798a8,
-  (q31_t)0x5512e6f3, (q31_t)0x550e3509, (q31_t)0x550982eb, (q31_t)0x5504d099, (q31_t)0x55001e12, (q31_t)0x54fb6b56, (q31_t)0x54f6b866, (q31_t)0x54f20542,
-  (q31_t)0x54ed51e9, (q31_t)0x54e89e5c, (q31_t)0x54e3ea9a, (q31_t)0x54df36a5, (q31_t)0x54da827a, (q31_t)0x54d5ce1c, (q31_t)0x54d11989, (q31_t)0x54cc64c2,
-  (q31_t)0x54c7afc6, (q31_t)0x54c2fa96, (q31_t)0x54be4532, (q31_t)0x54b98f9a, (q31_t)0x54b4d9cd, (q31_t)0x54b023cc, (q31_t)0x54ab6d97, (q31_t)0x54a6b72e,
-  (q31_t)0x54a20090, (q31_t)0x549d49bf, (q31_t)0x549892b9, (q31_t)0x5493db7f, (q31_t)0x548f2410, (q31_t)0x548a6c6e, (q31_t)0x5485b497, (q31_t)0x5480fc8c,
-  (q31_t)0x547c444d, (q31_t)0x54778bda, (q31_t)0x5472d333, (q31_t)0x546e1a58, (q31_t)0x54696149, (q31_t)0x5464a805, (q31_t)0x545fee8e, (q31_t)0x545b34e3,
-  (q31_t)0x54567b03, (q31_t)0x5451c0f0, (q31_t)0x544d06a8, (q31_t)0x54484c2d, (q31_t)0x5443917d, (q31_t)0x543ed699, (q31_t)0x543a1b82, (q31_t)0x54356037,
-  (q31_t)0x5430a4b7, (q31_t)0x542be904, (q31_t)0x54272d1d, (q31_t)0x54227102, (q31_t)0x541db4b3, (q31_t)0x5418f830, (q31_t)0x54143b79, (q31_t)0x540f7e8e,
-  (q31_t)0x540ac170, (q31_t)0x5406041d, (q31_t)0x54014697, (q31_t)0x53fc88dd, (q31_t)0x53f7caef, (q31_t)0x53f30cce, (q31_t)0x53ee4e78, (q31_t)0x53e98fef,
-  (q31_t)0x53e4d132, (q31_t)0x53e01242, (q31_t)0x53db531d, (q31_t)0x53d693c5, (q31_t)0x53d1d439, (q31_t)0x53cd147a, (q31_t)0x53c85486, (q31_t)0x53c3945f,
-  (q31_t)0x53bed405, (q31_t)0x53ba1377, (q31_t)0x53b552b5, (q31_t)0x53b091bf, (q31_t)0x53abd096, (q31_t)0x53a70f39, (q31_t)0x53a24da9, (q31_t)0x539d8be5,
-  (q31_t)0x5398c9ed, (q31_t)0x539407c2, (q31_t)0x538f4564, (q31_t)0x538a82d1, (q31_t)0x5385c00c, (q31_t)0x5380fd12, (q31_t)0x537c39e6, (q31_t)0x53777685,
-  (q31_t)0x5372b2f2, (q31_t)0x536def2a, (q31_t)0x53692b30, (q31_t)0x53646701, (q31_t)0x535fa2a0, (q31_t)0x535ade0b, (q31_t)0x53561942, (q31_t)0x53515447,
-  (q31_t)0x534c8f17, (q31_t)0x5347c9b5, (q31_t)0x5343041f, (q31_t)0x533e3e55, (q31_t)0x53397859, (q31_t)0x5334b229, (q31_t)0x532febc5, (q31_t)0x532b252f,
-  (q31_t)0x53265e65, (q31_t)0x53219767, (q31_t)0x531cd037, (q31_t)0x531808d3, (q31_t)0x5313413c, (q31_t)0x530e7972, (q31_t)0x5309b174, (q31_t)0x5304e943,
-  (q31_t)0x530020df, (q31_t)0x52fb5848, (q31_t)0x52f68f7e, (q31_t)0x52f1c680, (q31_t)0x52ecfd4f, (q31_t)0x52e833ec, (q31_t)0x52e36a55, (q31_t)0x52dea08a,
-  (q31_t)0x52d9d68d, (q31_t)0x52d50c5d, (q31_t)0x52d041f9, (q31_t)0x52cb7763, (q31_t)0x52c6ac99, (q31_t)0x52c1e19d, (q31_t)0x52bd166d, (q31_t)0x52b84b0a,
-  (q31_t)0x52b37f74, (q31_t)0x52aeb3ac, (q31_t)0x52a9e7b0, (q31_t)0x52a51b81, (q31_t)0x52a04f1f, (q31_t)0x529b828a, (q31_t)0x5296b5c3, (q31_t)0x5291e8c8,
-  (q31_t)0x528d1b9b, (q31_t)0x52884e3a, (q31_t)0x528380a7, (q31_t)0x527eb2e0, (q31_t)0x5279e4e7, (q31_t)0x527516bb, (q31_t)0x5270485c, (q31_t)0x526b79ca,
-  (q31_t)0x5266ab06, (q31_t)0x5261dc0e, (q31_t)0x525d0ce4, (q31_t)0x52583d87, (q31_t)0x52536df7, (q31_t)0x524e9e34, (q31_t)0x5249ce3f, (q31_t)0x5244fe17,
-  (q31_t)0x52402dbc, (q31_t)0x523b5d2e, (q31_t)0x52368c6e, (q31_t)0x5231bb7b, (q31_t)0x522cea55, (q31_t)0x522818fc, (q31_t)0x52234771, (q31_t)0x521e75b3,
-  (q31_t)0x5219a3c3, (q31_t)0x5214d1a0, (q31_t)0x520fff4a, (q31_t)0x520b2cc2, (q31_t)0x52065a07, (q31_t)0x52018719, (q31_t)0x51fcb3f9, (q31_t)0x51f7e0a6,
-  (q31_t)0x51f30d21, (q31_t)0x51ee3969, (q31_t)0x51e9657e, (q31_t)0x51e49162, (q31_t)0x51dfbd12, (q31_t)0x51dae890, (q31_t)0x51d613dc, (q31_t)0x51d13ef5,
-  (q31_t)0x51cc69db, (q31_t)0x51c79490, (q31_t)0x51c2bf11, (q31_t)0x51bde960, (q31_t)0x51b9137d, (q31_t)0x51b43d68, (q31_t)0x51af6720, (q31_t)0x51aa90a5,
-  (q31_t)0x51a5b9f9, (q31_t)0x51a0e31a, (q31_t)0x519c0c08, (q31_t)0x519734c4, (q31_t)0x51925d4e, (q31_t)0x518d85a6, (q31_t)0x5188adcb, (q31_t)0x5183d5be,
-  (q31_t)0x517efd7f, (q31_t)0x517a250d, (q31_t)0x51754c69, (q31_t)0x51707393, (q31_t)0x516b9a8b, (q31_t)0x5166c150, (q31_t)0x5161e7e4, (q31_t)0x515d0e45,
-  (q31_t)0x51583473, (q31_t)0x51535a70, (q31_t)0x514e803b, (q31_t)0x5149a5d3, (q31_t)0x5144cb39, (q31_t)0x513ff06d, (q31_t)0x513b156f, (q31_t)0x51363a3f,
-  (q31_t)0x51315edd, (q31_t)0x512c8348, (q31_t)0x5127a782, (q31_t)0x5122cb8a, (q31_t)0x511def5f, (q31_t)0x51191302, (q31_t)0x51143674, (q31_t)0x510f59b3,
-  (q31_t)0x510a7cc1, (q31_t)0x51059f9c, (q31_t)0x5100c246, (q31_t)0x50fbe4bd, (q31_t)0x50f70703, (q31_t)0x50f22916, (q31_t)0x50ed4af8, (q31_t)0x50e86ca8,
-  (q31_t)0x50e38e25, (q31_t)0x50deaf71, (q31_t)0x50d9d08b, (q31_t)0x50d4f173, (q31_t)0x50d0122a, (q31_t)0x50cb32ae, (q31_t)0x50c65301, (q31_t)0x50c17322,
-  (q31_t)0x50bc9311, (q31_t)0x50b7b2ce, (q31_t)0x50b2d259, (q31_t)0x50adf1b3, (q31_t)0x50a910db, (q31_t)0x50a42fd1, (q31_t)0x509f4e95, (q31_t)0x509a6d28,
-  (q31_t)0x50958b88, (q31_t)0x5090a9b8, (q31_t)0x508bc7b5, (q31_t)0x5086e581, (q31_t)0x5082031b, (q31_t)0x507d2083, (q31_t)0x50783dba, (q31_t)0x50735abf,
-  (q31_t)0x506e7793, (q31_t)0x50699435, (q31_t)0x5064b0a5, (q31_t)0x505fcce4, (q31_t)0x505ae8f1, (q31_t)0x505604cd, (q31_t)0x50512077, (q31_t)0x504c3bef,
-  (q31_t)0x50475736, (q31_t)0x5042724c, (q31_t)0x503d8d30, (q31_t)0x5038a7e2, (q31_t)0x5033c263, (q31_t)0x502edcb2, (q31_t)0x5029f6d1, (q31_t)0x502510bd,
-  (q31_t)0x50202a78, (q31_t)0x501b4402, (q31_t)0x50165d5a, (q31_t)0x50117681, (q31_t)0x500c8f77, (q31_t)0x5007a83b, (q31_t)0x5002c0cd, (q31_t)0x4ffdd92f,
-  (q31_t)0x4ff8f15f, (q31_t)0x4ff4095e, (q31_t)0x4fef212b, (q31_t)0x4fea38c7, (q31_t)0x4fe55032, (q31_t)0x4fe0676c, (q31_t)0x4fdb7e74, (q31_t)0x4fd6954b,
-  (q31_t)0x4fd1abf0, (q31_t)0x4fccc265, (q31_t)0x4fc7d8a8, (q31_t)0x4fc2eeba, (q31_t)0x4fbe049b, (q31_t)0x4fb91a4b, (q31_t)0x4fb42fc9, (q31_t)0x4faf4517,
-  (q31_t)0x4faa5a33, (q31_t)0x4fa56f1e, (q31_t)0x4fa083d8, (q31_t)0x4f9b9861, (q31_t)0x4f96acb8, (q31_t)0x4f91c0df, (q31_t)0x4f8cd4d4, (q31_t)0x4f87e899,
-  (q31_t)0x4f82fc2c, (q31_t)0x4f7e0f8f, (q31_t)0x4f7922c0, (q31_t)0x4f7435c0, (q31_t)0x4f6f488f, (q31_t)0x4f6a5b2e, (q31_t)0x4f656d9b, (q31_t)0x4f607fd7,
-  (q31_t)0x4f5b91e3, (q31_t)0x4f56a3bd, (q31_t)0x4f51b566, (q31_t)0x4f4cc6df, (q31_t)0x4f47d827, (q31_t)0x4f42e93d, (q31_t)0x4f3dfa23, (q31_t)0x4f390ad8,
-  (q31_t)0x4f341b5c, (q31_t)0x4f2f2baf, (q31_t)0x4f2a3bd2, (q31_t)0x4f254bc3, (q31_t)0x4f205b84, (q31_t)0x4f1b6b14, (q31_t)0x4f167a73, (q31_t)0x4f1189a1,
-  (q31_t)0x4f0c989f, (q31_t)0x4f07a76b, (q31_t)0x4f02b608, (q31_t)0x4efdc473, (q31_t)0x4ef8d2ad, (q31_t)0x4ef3e0b7, (q31_t)0x4eeeee90, (q31_t)0x4ee9fc39,
-  (q31_t)0x4ee509b1, (q31_t)0x4ee016f8, (q31_t)0x4edb240e, (q31_t)0x4ed630f4, (q31_t)0x4ed13da9, (q31_t)0x4ecc4a2e, (q31_t)0x4ec75682, (q31_t)0x4ec262a5,
-  (q31_t)0x4ebd6e98, (q31_t)0x4eb87a5a, (q31_t)0x4eb385ec, (q31_t)0x4eae914d, (q31_t)0x4ea99c7d, (q31_t)0x4ea4a77d, (q31_t)0x4e9fb24d, (q31_t)0x4e9abcec,
-  (q31_t)0x4e95c75b, (q31_t)0x4e90d199, (q31_t)0x4e8bdba6, (q31_t)0x4e86e583, (q31_t)0x4e81ef30, (q31_t)0x4e7cf8ac, (q31_t)0x4e7801f8, (q31_t)0x4e730b14,
-  (q31_t)0x4e6e13ff, (q31_t)0x4e691cba, (q31_t)0x4e642544, (q31_t)0x4e5f2d9e, (q31_t)0x4e5a35c7, (q31_t)0x4e553dc1, (q31_t)0x4e50458a, (q31_t)0x4e4b4d22,
-  (q31_t)0x4e46548b, (q31_t)0x4e415bc3, (q31_t)0x4e3c62cb, (q31_t)0x4e3769a2, (q31_t)0x4e32704a, (q31_t)0x4e2d76c1, (q31_t)0x4e287d08, (q31_t)0x4e23831e,
-  (q31_t)0x4e1e8905, (q31_t)0x4e198ebb, (q31_t)0x4e149441, (q31_t)0x4e0f9997, (q31_t)0x4e0a9ebd, (q31_t)0x4e05a3b2, (q31_t)0x4e00a878, (q31_t)0x4dfbad0d,
-  (q31_t)0x4df6b173, (q31_t)0x4df1b5a8, (q31_t)0x4decb9ad, (q31_t)0x4de7bd82, (q31_t)0x4de2c127, (q31_t)0x4dddc49c, (q31_t)0x4dd8c7e1, (q31_t)0x4dd3caf6,
-  (q31_t)0x4dcecdda, (q31_t)0x4dc9d08f, (q31_t)0x4dc4d314, (q31_t)0x4dbfd569, (q31_t)0x4dbad78e, (q31_t)0x4db5d983, (q31_t)0x4db0db48, (q31_t)0x4dabdcdd,
-  (q31_t)0x4da6de43, (q31_t)0x4da1df78, (q31_t)0x4d9ce07d, (q31_t)0x4d97e153, (q31_t)0x4d92e1f9, (q31_t)0x4d8de26f, (q31_t)0x4d88e2b5, (q31_t)0x4d83e2cb,
-  (q31_t)0x4d7ee2b1, (q31_t)0x4d79e268, (q31_t)0x4d74e1ef, (q31_t)0x4d6fe146, (q31_t)0x4d6ae06d, (q31_t)0x4d65df64, (q31_t)0x4d60de2c, (q31_t)0x4d5bdcc4,
-  (q31_t)0x4d56db2d, (q31_t)0x4d51d965, (q31_t)0x4d4cd76e, (q31_t)0x4d47d547, (q31_t)0x4d42d2f1, (q31_t)0x4d3dd06b, (q31_t)0x4d38cdb5, (q31_t)0x4d33cad0,
-  (q31_t)0x4d2ec7bb, (q31_t)0x4d29c476, (q31_t)0x4d24c102, (q31_t)0x4d1fbd5e, (q31_t)0x4d1ab98b, (q31_t)0x4d15b588, (q31_t)0x4d10b155, (q31_t)0x4d0bacf3,
-  (q31_t)0x4d06a862, (q31_t)0x4d01a3a0, (q31_t)0x4cfc9eb0, (q31_t)0x4cf79990, (q31_t)0x4cf29440, (q31_t)0x4ced8ec1, (q31_t)0x4ce88913, (q31_t)0x4ce38335,
-  (q31_t)0x4cde7d28, (q31_t)0x4cd976eb, (q31_t)0x4cd4707f, (q31_t)0x4ccf69e3, (q31_t)0x4cca6318, (q31_t)0x4cc55c1e, (q31_t)0x4cc054f4, (q31_t)0x4cbb4d9b,
-  (q31_t)0x4cb64613, (q31_t)0x4cb13e5b, (q31_t)0x4cac3674, (q31_t)0x4ca72e5e, (q31_t)0x4ca22619, (q31_t)0x4c9d1da4, (q31_t)0x4c981500, (q31_t)0x4c930c2d,
-  (q31_t)0x4c8e032a, (q31_t)0x4c88f9f8, (q31_t)0x4c83f097, (q31_t)0x4c7ee707, (q31_t)0x4c79dd48, (q31_t)0x4c74d359, (q31_t)0x4c6fc93b, (q31_t)0x4c6abeef,
-  (q31_t)0x4c65b473, (q31_t)0x4c60a9c8, (q31_t)0x4c5b9eed, (q31_t)0x4c5693e4, (q31_t)0x4c5188ac, (q31_t)0x4c4c7d44, (q31_t)0x4c4771ae, (q31_t)0x4c4265e8,
-  (q31_t)0x4c3d59f3, (q31_t)0x4c384dd0, (q31_t)0x4c33417d, (q31_t)0x4c2e34fb, (q31_t)0x4c29284b, (q31_t)0x4c241b6b, (q31_t)0x4c1f0e5c, (q31_t)0x4c1a011f,
-  (q31_t)0x4c14f3b2, (q31_t)0x4c0fe617, (q31_t)0x4c0ad84c, (q31_t)0x4c05ca53, (q31_t)0x4c00bc2b, (q31_t)0x4bfbadd4, (q31_t)0x4bf69f4e, (q31_t)0x4bf19099,
-  (q31_t)0x4bec81b5, (q31_t)0x4be772a3, (q31_t)0x4be26362, (q31_t)0x4bdd53f2, (q31_t)0x4bd84453, (q31_t)0x4bd33485, (q31_t)0x4bce2488, (q31_t)0x4bc9145d,
-  (q31_t)0x4bc40403, (q31_t)0x4bbef37b, (q31_t)0x4bb9e2c3, (q31_t)0x4bb4d1dd, (q31_t)0x4bafc0c8, (q31_t)0x4baaaf85, (q31_t)0x4ba59e12, (q31_t)0x4ba08c72,
-  (q31_t)0x4b9b7aa2, (q31_t)0x4b9668a4, (q31_t)0x4b915677, (q31_t)0x4b8c441c, (q31_t)0x4b873192, (q31_t)0x4b821ed9, (q31_t)0x4b7d0bf2, (q31_t)0x4b77f8dc,
-  (q31_t)0x4b72e598, (q31_t)0x4b6dd225, (q31_t)0x4b68be84, (q31_t)0x4b63aab4, (q31_t)0x4b5e96b6, (q31_t)0x4b598289, (q31_t)0x4b546e2d, (q31_t)0x4b4f59a4,
-  (q31_t)0x4b4a44eb, (q31_t)0x4b453005, (q31_t)0x4b401aef, (q31_t)0x4b3b05ac, (q31_t)0x4b35f03a, (q31_t)0x4b30da9a, (q31_t)0x4b2bc4cb, (q31_t)0x4b26aece,
-  (q31_t)0x4b2198a2, (q31_t)0x4b1c8248, (q31_t)0x4b176bc0, (q31_t)0x4b12550a, (q31_t)0x4b0d3e25, (q31_t)0x4b082712, (q31_t)0x4b030fd1, (q31_t)0x4afdf861,
-  (q31_t)0x4af8e0c3, (q31_t)0x4af3c8f7, (q31_t)0x4aeeb0fd, (q31_t)0x4ae998d4, (q31_t)0x4ae4807d, (q31_t)0x4adf67f8, (q31_t)0x4ada4f45, (q31_t)0x4ad53664,
-  (q31_t)0x4ad01d54, (q31_t)0x4acb0417, (q31_t)0x4ac5eaab, (q31_t)0x4ac0d111, (q31_t)0x4abbb749, (q31_t)0x4ab69d53, (q31_t)0x4ab1832f, (q31_t)0x4aac68dc,
-  (q31_t)0x4aa74e5c, (q31_t)0x4aa233ae, (q31_t)0x4a9d18d1, (q31_t)0x4a97fdc7, (q31_t)0x4a92e28e, (q31_t)0x4a8dc728, (q31_t)0x4a88ab93, (q31_t)0x4a838fd1,
-  (q31_t)0x4a7e73e0, (q31_t)0x4a7957c2, (q31_t)0x4a743b76, (q31_t)0x4a6f1efc, (q31_t)0x4a6a0253, (q31_t)0x4a64e57d, (q31_t)0x4a5fc879, (q31_t)0x4a5aab48,
-  (q31_t)0x4a558de8, (q31_t)0x4a50705a, (q31_t)0x4a4b529f, (q31_t)0x4a4634b6, (q31_t)0x4a41169f, (q31_t)0x4a3bf85a, (q31_t)0x4a36d9e7, (q31_t)0x4a31bb47,
-  (q31_t)0x4a2c9c79, (q31_t)0x4a277d7d, (q31_t)0x4a225e53, (q31_t)0x4a1d3efc, (q31_t)0x4a181f77, (q31_t)0x4a12ffc4, (q31_t)0x4a0ddfe4, (q31_t)0x4a08bfd5,
-  (q31_t)0x4a039f9a, (q31_t)0x49fe7f30, (q31_t)0x49f95e99, (q31_t)0x49f43dd4, (q31_t)0x49ef1ce2, (q31_t)0x49e9fbc2, (q31_t)0x49e4da74, (q31_t)0x49dfb8f9,
-  (q31_t)0x49da9750, (q31_t)0x49d5757a, (q31_t)0x49d05376, (q31_t)0x49cb3145, (q31_t)0x49c60ee6, (q31_t)0x49c0ec59, (q31_t)0x49bbc9a0, (q31_t)0x49b6a6b8,
-  (q31_t)0x49b183a3, (q31_t)0x49ac6061, (q31_t)0x49a73cf1, (q31_t)0x49a21954, (q31_t)0x499cf589, (q31_t)0x4997d191, (q31_t)0x4992ad6c, (q31_t)0x498d8919,
-  (q31_t)0x49886499, (q31_t)0x49833fec, (q31_t)0x497e1b11, (q31_t)0x4978f609, (q31_t)0x4973d0d3, (q31_t)0x496eab70, (q31_t)0x496985e0, (q31_t)0x49646023,
-  (q31_t)0x495f3a38, (q31_t)0x495a1420, (q31_t)0x4954eddb, (q31_t)0x494fc768, (q31_t)0x494aa0c9, (q31_t)0x494579fc, (q31_t)0x49405302, (q31_t)0x493b2bdb,
-  (q31_t)0x49360486, (q31_t)0x4930dd05, (q31_t)0x492bb556, (q31_t)0x49268d7a, (q31_t)0x49216571, (q31_t)0x491c3d3b, (q31_t)0x491714d8, (q31_t)0x4911ec47,
-  (q31_t)0x490cc38a, (q31_t)0x49079aa0, (q31_t)0x49027188, (q31_t)0x48fd4844, (q31_t)0x48f81ed2, (q31_t)0x48f2f534, (q31_t)0x48edcb68, (q31_t)0x48e8a170,
-  (q31_t)0x48e3774a, (q31_t)0x48de4cf8, (q31_t)0x48d92278, (q31_t)0x48d3f7cc, (q31_t)0x48ceccf3, (q31_t)0x48c9a1ed, (q31_t)0x48c476b9, (q31_t)0x48bf4b59,
-  (q31_t)0x48ba1fcd, (q31_t)0x48b4f413, (q31_t)0x48afc82c, (q31_t)0x48aa9c19, (q31_t)0x48a56fd9, (q31_t)0x48a0436c, (q31_t)0x489b16d2, (q31_t)0x4895ea0b,
-  (q31_t)0x4890bd18, (q31_t)0x488b8ff8, (q31_t)0x488662ab, (q31_t)0x48813531, (q31_t)0x487c078b, (q31_t)0x4876d9b8, (q31_t)0x4871abb8, (q31_t)0x486c7d8c,
-  (q31_t)0x48674f33, (q31_t)0x486220ad, (q31_t)0x485cf1fa, (q31_t)0x4857c31b, (q31_t)0x48529410, (q31_t)0x484d64d7, (q31_t)0x48483572, (q31_t)0x484305e1,
-  (q31_t)0x483dd623, (q31_t)0x4838a638, (q31_t)0x48337621, (q31_t)0x482e45dd, (q31_t)0x4829156d, (q31_t)0x4823e4d0, (q31_t)0x481eb407, (q31_t)0x48198311,
-  (q31_t)0x481451ef, (q31_t)0x480f20a0, (q31_t)0x4809ef25, (q31_t)0x4804bd7e, (q31_t)0x47ff8baa, (q31_t)0x47fa59a9, (q31_t)0x47f5277d, (q31_t)0x47eff523,
-  (q31_t)0x47eac29e, (q31_t)0x47e58fec, (q31_t)0x47e05d0e, (q31_t)0x47db2a03, (q31_t)0x47d5f6cc, (q31_t)0x47d0c369, (q31_t)0x47cb8fd9, (q31_t)0x47c65c1d,
-  (q31_t)0x47c12835, (q31_t)0x47bbf421, (q31_t)0x47b6bfe0, (q31_t)0x47b18b74, (q31_t)0x47ac56da, (q31_t)0x47a72215, (q31_t)0x47a1ed24, (q31_t)0x479cb806,
-  (q31_t)0x479782bc, (q31_t)0x47924d46, (q31_t)0x478d17a4, (q31_t)0x4787e1d6, (q31_t)0x4782abdb, (q31_t)0x477d75b5, (q31_t)0x47783f62, (q31_t)0x477308e3,
-  (q31_t)0x476dd239, (q31_t)0x47689b62, (q31_t)0x4763645f, (q31_t)0x475e2d30, (q31_t)0x4758f5d5, (q31_t)0x4753be4e, (q31_t)0x474e869b, (q31_t)0x47494ebc,
-  (q31_t)0x474416b1, (q31_t)0x473ede7a, (q31_t)0x4739a617, (q31_t)0x47346d89, (q31_t)0x472f34ce, (q31_t)0x4729fbe7, (q31_t)0x4724c2d5, (q31_t)0x471f8996,
-  (q31_t)0x471a502c, (q31_t)0x47151696, (q31_t)0x470fdcd4, (q31_t)0x470aa2e6, (q31_t)0x470568cd, (q31_t)0x47002e87, (q31_t)0x46faf416, (q31_t)0x46f5b979,
-  (q31_t)0x46f07eb0, (q31_t)0x46eb43bc, (q31_t)0x46e6089b, (q31_t)0x46e0cd4f, (q31_t)0x46db91d8, (q31_t)0x46d65634, (q31_t)0x46d11a65, (q31_t)0x46cbde6a,
-  (q31_t)0x46c6a244, (q31_t)0x46c165f1, (q31_t)0x46bc2974, (q31_t)0x46b6ecca, (q31_t)0x46b1aff5, (q31_t)0x46ac72f4, (q31_t)0x46a735c8, (q31_t)0x46a1f870,
-  (q31_t)0x469cbaed, (q31_t)0x46977d3e, (q31_t)0x46923f63, (q31_t)0x468d015d, (q31_t)0x4687c32c, (q31_t)0x468284cf, (q31_t)0x467d4646, (q31_t)0x46780792,
-  (q31_t)0x4672c8b3, (q31_t)0x466d89a8, (q31_t)0x46684a71, (q31_t)0x46630b0f, (q31_t)0x465dcb82, (q31_t)0x46588bc9, (q31_t)0x46534be5, (q31_t)0x464e0bd6,
-  (q31_t)0x4648cb9b, (q31_t)0x46438b35, (q31_t)0x463e4aa3, (q31_t)0x463909e7, (q31_t)0x4633c8fe, (q31_t)0x462e87eb, (q31_t)0x462946ac, (q31_t)0x46240542,
-  (q31_t)0x461ec3ad, (q31_t)0x461981ec, (q31_t)0x46144001, (q31_t)0x460efde9, (q31_t)0x4609bba7, (q31_t)0x4604793a, (q31_t)0x45ff36a1, (q31_t)0x45f9f3dd,
-  (q31_t)0x45f4b0ee, (q31_t)0x45ef6dd4, (q31_t)0x45ea2a8f, (q31_t)0x45e4e71f, (q31_t)0x45dfa383, (q31_t)0x45da5fbc, (q31_t)0x45d51bcb, (q31_t)0x45cfd7ae,
-  (q31_t)0x45ca9366, (q31_t)0x45c54ef3, (q31_t)0x45c00a55, (q31_t)0x45bac58c, (q31_t)0x45b58098, (q31_t)0x45b03b79, (q31_t)0x45aaf630, (q31_t)0x45a5b0bb,
-  (q31_t)0x45a06b1b, (q31_t)0x459b2550, (q31_t)0x4595df5a, (q31_t)0x45909939, (q31_t)0x458b52ee, (q31_t)0x45860c77, (q31_t)0x4580c5d6, (q31_t)0x457b7f0a,
-  (q31_t)0x45763813, (q31_t)0x4570f0f1, (q31_t)0x456ba9a4, (q31_t)0x4566622c, (q31_t)0x45611a8a, (q31_t)0x455bd2bc, (q31_t)0x45568ac4, (q31_t)0x455142a2,
-  (q31_t)0x454bfa54, (q31_t)0x4546b1dc, (q31_t)0x45416939, (q31_t)0x453c206b, (q31_t)0x4536d773, (q31_t)0x45318e4f, (q31_t)0x452c4502, (q31_t)0x4526fb89,
-  (q31_t)0x4521b1e6, (q31_t)0x451c6818, (q31_t)0x45171e20, (q31_t)0x4511d3fd, (q31_t)0x450c89af, (q31_t)0x45073f37, (q31_t)0x4501f494, (q31_t)0x44fca9c6,
-  (q31_t)0x44f75ecf, (q31_t)0x44f213ac, (q31_t)0x44ecc85f, (q31_t)0x44e77ce7, (q31_t)0x44e23145, (q31_t)0x44dce579, (q31_t)0x44d79982, (q31_t)0x44d24d60,
-  (q31_t)0x44cd0114, (q31_t)0x44c7b49e, (q31_t)0x44c267fd, (q31_t)0x44bd1b32, (q31_t)0x44b7ce3c, (q31_t)0x44b2811c, (q31_t)0x44ad33d2, (q31_t)0x44a7e65d,
-  (q31_t)0x44a298be, (q31_t)0x449d4af5, (q31_t)0x4497fd01, (q31_t)0x4492aee3, (q31_t)0x448d609b, (q31_t)0x44881228, (q31_t)0x4482c38b, (q31_t)0x447d74c4,
-  (q31_t)0x447825d2, (q31_t)0x4472d6b7, (q31_t)0x446d8771, (q31_t)0x44683801, (q31_t)0x4462e866, (q31_t)0x445d98a2, (q31_t)0x445848b3, (q31_t)0x4452f89b,
-  (q31_t)0x444da858, (q31_t)0x444857ea, (q31_t)0x44430753, (q31_t)0x443db692, (q31_t)0x443865a7, (q31_t)0x44331491, (q31_t)0x442dc351, (q31_t)0x442871e8,
-  (q31_t)0x44232054, (q31_t)0x441dce96, (q31_t)0x44187caf, (q31_t)0x44132a9d, (q31_t)0x440dd861, (q31_t)0x440885fc, (q31_t)0x4403336c, (q31_t)0x43fde0b2,
-  (q31_t)0x43f88dcf, (q31_t)0x43f33ac1, (q31_t)0x43ede78a, (q31_t)0x43e89429, (q31_t)0x43e3409d, (q31_t)0x43ddece8, (q31_t)0x43d8990a, (q31_t)0x43d34501,
-  (q31_t)0x43cdf0ce, (q31_t)0x43c89c72, (q31_t)0x43c347eb, (q31_t)0x43bdf33b, (q31_t)0x43b89e62, (q31_t)0x43b3495e, (q31_t)0x43adf431, (q31_t)0x43a89ed9,
-  (q31_t)0x43a34959, (q31_t)0x439df3ae, (q31_t)0x43989dda, (q31_t)0x439347dc, (q31_t)0x438df1b4, (q31_t)0x43889b63, (q31_t)0x438344e8, (q31_t)0x437dee43,
-  (q31_t)0x43789775, (q31_t)0x4373407d, (q31_t)0x436de95b, (q31_t)0x43689210, (q31_t)0x43633a9c, (q31_t)0x435de2fd, (q31_t)0x43588b36, (q31_t)0x43533344,
-  (q31_t)0x434ddb29, (q31_t)0x434882e5, (q31_t)0x43432a77, (q31_t)0x433dd1e0, (q31_t)0x4338791f, (q31_t)0x43332035, (q31_t)0x432dc721, (q31_t)0x43286de4,
-  (q31_t)0x4323147d, (q31_t)0x431dbaed, (q31_t)0x43186133, (q31_t)0x43130751, (q31_t)0x430dad44, (q31_t)0x4308530f, (q31_t)0x4302f8b0, (q31_t)0x42fd9e28,
-  (q31_t)0x42f84376, (q31_t)0x42f2e89b, (q31_t)0x42ed8d97, (q31_t)0x42e83269, (q31_t)0x42e2d713, (q31_t)0x42dd7b93, (q31_t)0x42d81fe9, (q31_t)0x42d2c417,
-  (q31_t)0x42cd681b, (q31_t)0x42c80bf6, (q31_t)0x42c2afa8, (q31_t)0x42bd5331, (q31_t)0x42b7f690, (q31_t)0x42b299c7, (q31_t)0x42ad3cd4, (q31_t)0x42a7dfb8,
-  (q31_t)0x42a28273, (q31_t)0x429d2505, (q31_t)0x4297c76e, (q31_t)0x429269ae, (q31_t)0x428d0bc4, (q31_t)0x4287adb2, (q31_t)0x42824f76, (q31_t)0x427cf112,
-  (q31_t)0x42779285, (q31_t)0x427233ce, (q31_t)0x426cd4ef, (q31_t)0x426775e6, (q31_t)0x426216b5, (q31_t)0x425cb75a, (q31_t)0x425757d7, (q31_t)0x4251f82b,
-  (q31_t)0x424c9856, (q31_t)0x42473858, (q31_t)0x4241d831, (q31_t)0x423c77e1, (q31_t)0x42371769, (q31_t)0x4231b6c7, (q31_t)0x422c55fd, (q31_t)0x4226f50a,
-  (q31_t)0x422193ee, (q31_t)0x421c32a9, (q31_t)0x4216d13c, (q31_t)0x42116fa5, (q31_t)0x420c0de6, (q31_t)0x4206abfe, (q31_t)0x420149ee, (q31_t)0x41fbe7b5,
-  (q31_t)0x41f68553, (q31_t)0x41f122c8, (q31_t)0x41ebc015, (q31_t)0x41e65d39, (q31_t)0x41e0fa35, (q31_t)0x41db9707, (q31_t)0x41d633b1, (q31_t)0x41d0d033,
-  (q31_t)0x41cb6c8c, (q31_t)0x41c608bc, (q31_t)0x41c0a4c4, (q31_t)0x41bb40a3, (q31_t)0x41b5dc5a, (q31_t)0x41b077e8, (q31_t)0x41ab134e, (q31_t)0x41a5ae8b,
-  (q31_t)0x41a049a0, (q31_t)0x419ae48c, (q31_t)0x41957f4f, (q31_t)0x419019eb, (q31_t)0x418ab45d, (q31_t)0x41854ea8, (q31_t)0x417fe8ca, (q31_t)0x417a82c3,
-  (q31_t)0x41751c94, (q31_t)0x416fb63d, (q31_t)0x416a4fbd, (q31_t)0x4164e916, (q31_t)0x415f8245, (q31_t)0x415a1b4d, (q31_t)0x4154b42c, (q31_t)0x414f4ce2,
-  (q31_t)0x4149e571, (q31_t)0x41447dd7, (q31_t)0x413f1615, (q31_t)0x4139ae2b, (q31_t)0x41344618, (q31_t)0x412edddd, (q31_t)0x4129757b, (q31_t)0x41240cef,
-  (q31_t)0x411ea43c, (q31_t)0x41193b61, (q31_t)0x4113d25d, (q31_t)0x410e6931, (q31_t)0x4108ffdd, (q31_t)0x41039661, (q31_t)0x40fe2cbd, (q31_t)0x40f8c2f1,
-  (q31_t)0x40f358fc, (q31_t)0x40edeee0, (q31_t)0x40e8849b, (q31_t)0x40e31a2f, (q31_t)0x40ddaf9b, (q31_t)0x40d844de, (q31_t)0x40d2d9f9, (q31_t)0x40cd6eed,
-  (q31_t)0x40c803b8, (q31_t)0x40c2985c, (q31_t)0x40bd2cd8, (q31_t)0x40b7c12b, (q31_t)0x40b25557, (q31_t)0x40ace95b, (q31_t)0x40a77d37, (q31_t)0x40a210eb,
-  (q31_t)0x409ca477, (q31_t)0x409737dc, (q31_t)0x4091cb18, (q31_t)0x408c5e2d, (q31_t)0x4086f11a, (q31_t)0x408183df, (q31_t)0x407c167c, (q31_t)0x4076a8f1,
-  (q31_t)0x40713b3f, (q31_t)0x406bcd65, (q31_t)0x40665f63, (q31_t)0x4060f13a, (q31_t)0x405b82e9, (q31_t)0x40561470, (q31_t)0x4050a5cf, (q31_t)0x404b3707,
-  (q31_t)0x4045c817, (q31_t)0x404058ff, (q31_t)0x403ae9c0, (q31_t)0x40357a59, (q31_t)0x40300acb, (q31_t)0x402a9b15, (q31_t)0x40252b37, (q31_t)0x401fbb32,
-  (q31_t)0x401a4b05, (q31_t)0x4014dab1, (q31_t)0x400f6a35, (q31_t)0x4009f992, (q31_t)0x400488c7, (q31_t)0x3fff17d5, (q31_t)0x3ff9a6bb, (q31_t)0x3ff4357a,
-  (q31_t)0x3feec411, (q31_t)0x3fe95281, (q31_t)0x3fe3e0c9, (q31_t)0x3fde6eeb, (q31_t)0x3fd8fce4, (q31_t)0x3fd38ab6, (q31_t)0x3fce1861, (q31_t)0x3fc8a5e5,
-  (q31_t)0x3fc33341, (q31_t)0x3fbdc076, (q31_t)0x3fb84d83, (q31_t)0x3fb2da6a, (q31_t)0x3fad6729, (q31_t)0x3fa7f3c0, (q31_t)0x3fa28031, (q31_t)0x3f9d0c7a,
-  (q31_t)0x3f97989c, (q31_t)0x3f922496, (q31_t)0x3f8cb06a, (q31_t)0x3f873c16, (q31_t)0x3f81c79b, (q31_t)0x3f7c52f9, (q31_t)0x3f76de30, (q31_t)0x3f71693f,
-  (q31_t)0x3f6bf428, (q31_t)0x3f667ee9, (q31_t)0x3f610983, (q31_t)0x3f5b93f6, (q31_t)0x3f561e42, (q31_t)0x3f50a867, (q31_t)0x3f4b3265, (q31_t)0x3f45bc3c,
-  (q31_t)0x3f4045ec, (q31_t)0x3f3acf75, (q31_t)0x3f3558d7, (q31_t)0x3f2fe211, (q31_t)0x3f2a6b25, (q31_t)0x3f24f412, (q31_t)0x3f1f7cd8, (q31_t)0x3f1a0577,
-  (q31_t)0x3f148def, (q31_t)0x3f0f1640, (q31_t)0x3f099e6b, (q31_t)0x3f04266e, (q31_t)0x3efeae4a, (q31_t)0x3ef93600, (q31_t)0x3ef3bd8f, (q31_t)0x3eee44f7,
-  (q31_t)0x3ee8cc38, (q31_t)0x3ee35352, (q31_t)0x3eddda46, (q31_t)0x3ed86113, (q31_t)0x3ed2e7b9, (q31_t)0x3ecd6e38, (q31_t)0x3ec7f491, (q31_t)0x3ec27ac2,
-  (q31_t)0x3ebd00cd, (q31_t)0x3eb786b2, (q31_t)0x3eb20c6f, (q31_t)0x3eac9206, (q31_t)0x3ea71777, (q31_t)0x3ea19cc1, (q31_t)0x3e9c21e4, (q31_t)0x3e96a6e0,
-  (q31_t)0x3e912bb6, (q31_t)0x3e8bb065, (q31_t)0x3e8634ee, (q31_t)0x3e80b950, (q31_t)0x3e7b3d8c, (q31_t)0x3e75c1a1, (q31_t)0x3e70458f, (q31_t)0x3e6ac957,
-  (q31_t)0x3e654cf8, (q31_t)0x3e5fd073, (q31_t)0x3e5a53c8, (q31_t)0x3e54d6f6, (q31_t)0x3e4f59fe, (q31_t)0x3e49dcdf, (q31_t)0x3e445f99, (q31_t)0x3e3ee22e,
-  (q31_t)0x3e39649c, (q31_t)0x3e33e6e3, (q31_t)0x3e2e6904, (q31_t)0x3e28eaff, (q31_t)0x3e236cd4, (q31_t)0x3e1dee82, (q31_t)0x3e18700a, (q31_t)0x3e12f16b,
-  (q31_t)0x3e0d72a6, (q31_t)0x3e07f3bb, (q31_t)0x3e0274aa, (q31_t)0x3dfcf572, (q31_t)0x3df77615, (q31_t)0x3df1f691, (q31_t)0x3dec76e6, (q31_t)0x3de6f716,
-  (q31_t)0x3de1771f, (q31_t)0x3ddbf703, (q31_t)0x3dd676c0, (q31_t)0x3dd0f656, (q31_t)0x3dcb75c7, (q31_t)0x3dc5f512, (q31_t)0x3dc07436, (q31_t)0x3dbaf335,
-  (q31_t)0x3db5720d, (q31_t)0x3daff0c0, (q31_t)0x3daa6f4c, (q31_t)0x3da4edb2, (q31_t)0x3d9f6bf2, (q31_t)0x3d99ea0d, (q31_t)0x3d946801, (q31_t)0x3d8ee5cf,
-  (q31_t)0x3d896377, (q31_t)0x3d83e0f9, (q31_t)0x3d7e5e56, (q31_t)0x3d78db8c, (q31_t)0x3d73589d, (q31_t)0x3d6dd587, (q31_t)0x3d68524c, (q31_t)0x3d62ceeb,
-  (q31_t)0x3d5d4b64, (q31_t)0x3d57c7b7, (q31_t)0x3d5243e4, (q31_t)0x3d4cbfeb, (q31_t)0x3d473bcd, (q31_t)0x3d41b789, (q31_t)0x3d3c331f, (q31_t)0x3d36ae8f,
-  (q31_t)0x3d3129da, (q31_t)0x3d2ba4fe, (q31_t)0x3d261ffd, (q31_t)0x3d209ad7, (q31_t)0x3d1b158a, (q31_t)0x3d159018, (q31_t)0x3d100a80, (q31_t)0x3d0a84c3,
-  (q31_t)0x3d04fee0, (q31_t)0x3cff78d7, (q31_t)0x3cf9f2a9, (q31_t)0x3cf46c55, (q31_t)0x3ceee5db, (q31_t)0x3ce95f3c, (q31_t)0x3ce3d877, (q31_t)0x3cde518d,
-  (q31_t)0x3cd8ca7d, (q31_t)0x3cd34347, (q31_t)0x3ccdbbed, (q31_t)0x3cc8346c, (q31_t)0x3cc2acc6, (q31_t)0x3cbd24fb, (q31_t)0x3cb79d0a, (q31_t)0x3cb214f4,
-  (q31_t)0x3cac8cb8, (q31_t)0x3ca70457, (q31_t)0x3ca17bd0, (q31_t)0x3c9bf324, (q31_t)0x3c966a53, (q31_t)0x3c90e15c, (q31_t)0x3c8b5840, (q31_t)0x3c85cefe,
-  (q31_t)0x3c804598, (q31_t)0x3c7abc0c, (q31_t)0x3c75325a, (q31_t)0x3c6fa883, (q31_t)0x3c6a1e87, (q31_t)0x3c649466, (q31_t)0x3c5f0a20, (q31_t)0x3c597fb4,
-  (q31_t)0x3c53f523, (q31_t)0x3c4e6a6d, (q31_t)0x3c48df91, (q31_t)0x3c435491, (q31_t)0x3c3dc96b, (q31_t)0x3c383e20, (q31_t)0x3c32b2b0, (q31_t)0x3c2d271b,
-  (q31_t)0x3c279b61, (q31_t)0x3c220f81, (q31_t)0x3c1c837d, (q31_t)0x3c16f753, (q31_t)0x3c116b04, (q31_t)0x3c0bde91, (q31_t)0x3c0651f8, (q31_t)0x3c00c53a,
-  (q31_t)0x3bfb3857, (q31_t)0x3bf5ab50, (q31_t)0x3bf01e23, (q31_t)0x3bea90d1, (q31_t)0x3be5035a, (q31_t)0x3bdf75bf, (q31_t)0x3bd9e7fe, (q31_t)0x3bd45a19,
-  (q31_t)0x3bcecc0e, (q31_t)0x3bc93ddf, (q31_t)0x3bc3af8b, (q31_t)0x3bbe2112, (q31_t)0x3bb89274, (q31_t)0x3bb303b1, (q31_t)0x3bad74c9, (q31_t)0x3ba7e5bd,
-  (q31_t)0x3ba2568c, (q31_t)0x3b9cc736, (q31_t)0x3b9737bb, (q31_t)0x3b91a81c, (q31_t)0x3b8c1857, (q31_t)0x3b86886e, (q31_t)0x3b80f861, (q31_t)0x3b7b682e,
-  (q31_t)0x3b75d7d7, (q31_t)0x3b70475c, (q31_t)0x3b6ab6bb, (q31_t)0x3b6525f6, (q31_t)0x3b5f950c, (q31_t)0x3b5a03fe, (q31_t)0x3b5472cb, (q31_t)0x3b4ee173,
-  (q31_t)0x3b494ff7, (q31_t)0x3b43be57, (q31_t)0x3b3e2c91, (q31_t)0x3b389aa8, (q31_t)0x3b330899, (q31_t)0x3b2d7666, (q31_t)0x3b27e40f, (q31_t)0x3b225193,
-  (q31_t)0x3b1cbef3, (q31_t)0x3b172c2e, (q31_t)0x3b119945, (q31_t)0x3b0c0637, (q31_t)0x3b067305, (q31_t)0x3b00dfaf, (q31_t)0x3afb4c34, (q31_t)0x3af5b894,
-  (q31_t)0x3af024d1, (q31_t)0x3aea90e9, (q31_t)0x3ae4fcdc, (q31_t)0x3adf68ac, (q31_t)0x3ad9d457, (q31_t)0x3ad43fdd, (q31_t)0x3aceab40, (q31_t)0x3ac9167e,
-  (q31_t)0x3ac38198, (q31_t)0x3abdec8d, (q31_t)0x3ab8575f, (q31_t)0x3ab2c20c, (q31_t)0x3aad2c95, (q31_t)0x3aa796fa, (q31_t)0x3aa2013a, (q31_t)0x3a9c6b57,
-  (q31_t)0x3a96d54f, (q31_t)0x3a913f23, (q31_t)0x3a8ba8d3, (q31_t)0x3a86125f, (q31_t)0x3a807bc7, (q31_t)0x3a7ae50a, (q31_t)0x3a754e2a, (q31_t)0x3a6fb726,
-  (q31_t)0x3a6a1ffd, (q31_t)0x3a6488b1, (q31_t)0x3a5ef140, (q31_t)0x3a5959ab, (q31_t)0x3a53c1f3, (q31_t)0x3a4e2a16, (q31_t)0x3a489216, (q31_t)0x3a42f9f2,
-  (q31_t)0x3a3d61a9, (q31_t)0x3a37c93d, (q31_t)0x3a3230ad, (q31_t)0x3a2c97f9, (q31_t)0x3a26ff21, (q31_t)0x3a216625, (q31_t)0x3a1bcd05, (q31_t)0x3a1633c1,
-  (q31_t)0x3a109a5a, (q31_t)0x3a0b00cf, (q31_t)0x3a056720, (q31_t)0x39ffcd4d, (q31_t)0x39fa3356, (q31_t)0x39f4993c, (q31_t)0x39eefefe, (q31_t)0x39e9649c,
-  (q31_t)0x39e3ca17, (q31_t)0x39de2f6d, (q31_t)0x39d894a0, (q31_t)0x39d2f9b0, (q31_t)0x39cd5e9b, (q31_t)0x39c7c363, (q31_t)0x39c22808, (q31_t)0x39bc8c89,
-  (q31_t)0x39b6f0e6, (q31_t)0x39b1551f, (q31_t)0x39abb935, (q31_t)0x39a61d28, (q31_t)0x39a080f6, (q31_t)0x399ae4a2, (q31_t)0x39954829, (q31_t)0x398fab8e,
-  (q31_t)0x398a0ece, (q31_t)0x398471ec, (q31_t)0x397ed4e5, (q31_t)0x397937bc, (q31_t)0x39739a6e, (q31_t)0x396dfcfe, (q31_t)0x39685f6a, (q31_t)0x3962c1b2,
-  (q31_t)0x395d23d7, (q31_t)0x395785d9, (q31_t)0x3951e7b8, (q31_t)0x394c4973, (q31_t)0x3946ab0a, (q31_t)0x39410c7f, (q31_t)0x393b6dd0, (q31_t)0x3935cefd,
-  (q31_t)0x39303008, (q31_t)0x392a90ef, (q31_t)0x3924f1b3, (q31_t)0x391f5254, (q31_t)0x3919b2d1, (q31_t)0x3914132b, (q31_t)0x390e7362, (q31_t)0x3908d376,
-  (q31_t)0x39033367, (q31_t)0x38fd9334, (q31_t)0x38f7f2de, (q31_t)0x38f25266, (q31_t)0x38ecb1ca, (q31_t)0x38e7110a, (q31_t)0x38e17028, (q31_t)0x38dbcf23,
-  (q31_t)0x38d62dfb, (q31_t)0x38d08caf, (q31_t)0x38caeb41, (q31_t)0x38c549af, (q31_t)0x38bfa7fb, (q31_t)0x38ba0623, (q31_t)0x38b46429, (q31_t)0x38aec20b,
-  (q31_t)0x38a91fcb, (q31_t)0x38a37d67, (q31_t)0x389ddae1, (q31_t)0x38983838, (q31_t)0x3892956c, (q31_t)0x388cf27d, (q31_t)0x38874f6b, (q31_t)0x3881ac36,
-  (q31_t)0x387c08de, (q31_t)0x38766564, (q31_t)0x3870c1c6, (q31_t)0x386b1e06, (q31_t)0x38657a23, (q31_t)0x385fd61d, (q31_t)0x385a31f5, (q31_t)0x38548daa,
-  (q31_t)0x384ee93b, (q31_t)0x384944ab, (q31_t)0x38439ff7, (q31_t)0x383dfb21, (q31_t)0x38385628, (q31_t)0x3832b10d, (q31_t)0x382d0bce, (q31_t)0x3827666d,
-  (q31_t)0x3821c0ea, (q31_t)0x381c1b44, (q31_t)0x3816757b, (q31_t)0x3810cf90, (q31_t)0x380b2982, (q31_t)0x38058351, (q31_t)0x37ffdcfe, (q31_t)0x37fa3688,
-  (q31_t)0x37f48ff0, (q31_t)0x37eee936, (q31_t)0x37e94259, (q31_t)0x37e39b59, (q31_t)0x37ddf437, (q31_t)0x37d84cf2, (q31_t)0x37d2a58b, (q31_t)0x37ccfe02,
-  (q31_t)0x37c75656, (q31_t)0x37c1ae87, (q31_t)0x37bc0697, (q31_t)0x37b65e84, (q31_t)0x37b0b64e, (q31_t)0x37ab0df6, (q31_t)0x37a5657c, (q31_t)0x379fbce0,
-  (q31_t)0x379a1421, (q31_t)0x37946b40, (q31_t)0x378ec23d, (q31_t)0x37891917, (q31_t)0x37836fcf, (q31_t)0x377dc665, (q31_t)0x37781cd9, (q31_t)0x3772732a,
-  (q31_t)0x376cc959, (q31_t)0x37671f66, (q31_t)0x37617551, (q31_t)0x375bcb1a, (q31_t)0x375620c1, (q31_t)0x37507645, (q31_t)0x374acba7, (q31_t)0x374520e7,
-  (q31_t)0x373f7606, (q31_t)0x3739cb02, (q31_t)0x37341fdc, (q31_t)0x372e7493, (q31_t)0x3728c929, (q31_t)0x37231d9d, (q31_t)0x371d71ef, (q31_t)0x3717c61f,
-  (q31_t)0x37121a2d, (q31_t)0x370c6e19, (q31_t)0x3706c1e2, (q31_t)0x3701158a, (q31_t)0x36fb6910, (q31_t)0x36f5bc75, (q31_t)0x36f00fb7, (q31_t)0x36ea62d7,
-  (q31_t)0x36e4b5d6, (q31_t)0x36df08b2, (q31_t)0x36d95b6d, (q31_t)0x36d3ae06, (q31_t)0x36ce007d, (q31_t)0x36c852d2, (q31_t)0x36c2a506, (q31_t)0x36bcf718,
-  (q31_t)0x36b74908, (q31_t)0x36b19ad6, (q31_t)0x36abec82, (q31_t)0x36a63e0d, (q31_t)0x36a08f76, (q31_t)0x369ae0bd, (q31_t)0x369531e3, (q31_t)0x368f82e7,
-  (q31_t)0x3689d3c9, (q31_t)0x3684248a, (q31_t)0x367e7529, (q31_t)0x3678c5a7, (q31_t)0x36731602, (q31_t)0x366d663d, (q31_t)0x3667b655, (q31_t)0x3662064c,
-  (q31_t)0x365c5622, (q31_t)0x3656a5d6, (q31_t)0x3650f569, (q31_t)0x364b44da, (q31_t)0x36459429, (q31_t)0x363fe357, (q31_t)0x363a3264, (q31_t)0x3634814f,
-  (q31_t)0x362ed019, (q31_t)0x36291ec1, (q31_t)0x36236d48, (q31_t)0x361dbbad, (q31_t)0x361809f1, (q31_t)0x36125814, (q31_t)0x360ca615, (q31_t)0x3606f3f5,
-  (q31_t)0x360141b4, (q31_t)0x35fb8f52, (q31_t)0x35f5dcce, (q31_t)0x35f02a28, (q31_t)0x35ea7762, (q31_t)0x35e4c47a, (q31_t)0x35df1171, (q31_t)0x35d95e47,
-  (q31_t)0x35d3aafc, (q31_t)0x35cdf78f, (q31_t)0x35c84401, (q31_t)0x35c29052, (q31_t)0x35bcdc82, (q31_t)0x35b72891, (q31_t)0x35b1747e, (q31_t)0x35abc04b,
-  (q31_t)0x35a60bf6, (q31_t)0x35a05781, (q31_t)0x359aa2ea, (q31_t)0x3594ee32, (q31_t)0x358f3959, (q31_t)0x3589845f, (q31_t)0x3583cf44, (q31_t)0x357e1a08,
-  (q31_t)0x357864ab, (q31_t)0x3572af2d, (q31_t)0x356cf98e, (q31_t)0x356743ce, (q31_t)0x35618ded, (q31_t)0x355bd7eb, (q31_t)0x355621c9, (q31_t)0x35506b85,
-  (q31_t)0x354ab520, (q31_t)0x3544fe9b, (q31_t)0x353f47f5, (q31_t)0x3539912e, (q31_t)0x3533da46, (q31_t)0x352e233d, (q31_t)0x35286c14, (q31_t)0x3522b4c9,
-  (q31_t)0x351cfd5e, (q31_t)0x351745d2, (q31_t)0x35118e26, (q31_t)0x350bd658, (q31_t)0x35061e6a, (q31_t)0x3500665c, (q31_t)0x34faae2c, (q31_t)0x34f4f5dc,
-  (q31_t)0x34ef3d6b, (q31_t)0x34e984da, (q31_t)0x34e3cc28, (q31_t)0x34de1355, (q31_t)0x34d85a62, (q31_t)0x34d2a14e, (q31_t)0x34cce819, (q31_t)0x34c72ec4,
-  (q31_t)0x34c1754e, (q31_t)0x34bbbbb8, (q31_t)0x34b60202, (q31_t)0x34b0482a, (q31_t)0x34aa8e33, (q31_t)0x34a4d41a, (q31_t)0x349f19e2, (q31_t)0x34995f88,
-  (q31_t)0x3493a50f, (q31_t)0x348dea75, (q31_t)0x34882fba, (q31_t)0x348274e0, (q31_t)0x347cb9e4, (q31_t)0x3476fec9, (q31_t)0x3471438d, (q31_t)0x346b8830,
-  (q31_t)0x3465ccb4, (q31_t)0x34601117, (q31_t)0x345a5559, (q31_t)0x3454997c, (q31_t)0x344edd7e, (q31_t)0x34492160, (q31_t)0x34436521, (q31_t)0x343da8c3,
-  (q31_t)0x3437ec44, (q31_t)0x34322fa5, (q31_t)0x342c72e6, (q31_t)0x3426b606, (q31_t)0x3420f907, (q31_t)0x341b3be7, (q31_t)0x34157ea7, (q31_t)0x340fc147,
-  (q31_t)0x340a03c7, (q31_t)0x34044626, (q31_t)0x33fe8866, (q31_t)0x33f8ca86, (q31_t)0x33f30c85, (q31_t)0x33ed4e65, (q31_t)0x33e79024, (q31_t)0x33e1d1c4,
-  (q31_t)0x33dc1343, (q31_t)0x33d654a2, (q31_t)0x33d095e2, (q31_t)0x33cad701, (q31_t)0x33c51801, (q31_t)0x33bf58e1, (q31_t)0x33b999a0, (q31_t)0x33b3da40,
-  (q31_t)0x33ae1ac0, (q31_t)0x33a85b20, (q31_t)0x33a29b60, (q31_t)0x339cdb81, (q31_t)0x33971b81, (q31_t)0x33915b62, (q31_t)0x338b9b22, (q31_t)0x3385dac4,
-  (q31_t)0x33801a45, (q31_t)0x337a59a6, (q31_t)0x337498e8, (q31_t)0x336ed80a, (q31_t)0x3369170c, (q31_t)0x336355ef, (q31_t)0x335d94b2, (q31_t)0x3357d355,
-  (q31_t)0x335211d8, (q31_t)0x334c503c, (q31_t)0x33468e80, (q31_t)0x3340cca5, (q31_t)0x333b0aaa, (q31_t)0x3335488f, (q31_t)0x332f8655, (q31_t)0x3329c3fb,
-  (q31_t)0x33240182, (q31_t)0x331e3ee9, (q31_t)0x33187c31, (q31_t)0x3312b959, (q31_t)0x330cf661, (q31_t)0x3307334a, (q31_t)0x33017014, (q31_t)0x32fbacbe,
-  (q31_t)0x32f5e948, (q31_t)0x32f025b4, (q31_t)0x32ea61ff, (q31_t)0x32e49e2c, (q31_t)0x32deda39, (q31_t)0x32d91626, (q31_t)0x32d351f5, (q31_t)0x32cd8da4,
-  (q31_t)0x32c7c933, (q31_t)0x32c204a3, (q31_t)0x32bc3ff4, (q31_t)0x32b67b26, (q31_t)0x32b0b638, (q31_t)0x32aaf12b, (q31_t)0x32a52bff, (q31_t)0x329f66b4,
-  (q31_t)0x3299a149, (q31_t)0x3293dbbf, (q31_t)0x328e1616, (q31_t)0x3288504e, (q31_t)0x32828a67, (q31_t)0x327cc460, (q31_t)0x3276fe3a, (q31_t)0x327137f6,
-  (q31_t)0x326b7192, (q31_t)0x3265ab0f, (q31_t)0x325fe46c, (q31_t)0x325a1dab, (q31_t)0x325456cb, (q31_t)0x324e8fcc, (q31_t)0x3248c8ad, (q31_t)0x32430170,
-  (q31_t)0x323d3a14, (q31_t)0x32377298, (q31_t)0x3231aafe, (q31_t)0x322be345, (q31_t)0x32261b6c, (q31_t)0x32205375, (q31_t)0x321a8b5f, (q31_t)0x3214c32a,
-  (q31_t)0x320efad6, (q31_t)0x32093263, (q31_t)0x320369d2, (q31_t)0x31fda121, (q31_t)0x31f7d852, (q31_t)0x31f20f64, (q31_t)0x31ec4657, (q31_t)0x31e67d2b,
-  (q31_t)0x31e0b3e0, (q31_t)0x31daea77, (q31_t)0x31d520ef, (q31_t)0x31cf5748, (q31_t)0x31c98d83, (q31_t)0x31c3c39e, (q31_t)0x31bdf99b, (q31_t)0x31b82f7a,
-  (q31_t)0x31b2653a, (q31_t)0x31ac9adb, (q31_t)0x31a6d05d, (q31_t)0x31a105c1, (q31_t)0x319b3b06, (q31_t)0x3195702d, (q31_t)0x318fa535, (q31_t)0x3189da1e,
-  (q31_t)0x31840ee9, (q31_t)0x317e4395, (q31_t)0x31787823, (q31_t)0x3172ac92, (q31_t)0x316ce0e3, (q31_t)0x31671515, (q31_t)0x31614929, (q31_t)0x315b7d1e,
-  (q31_t)0x3155b0f5, (q31_t)0x314fe4ae, (q31_t)0x314a1848, (q31_t)0x31444bc3, (q31_t)0x313e7f21, (q31_t)0x3138b260, (q31_t)0x3132e580, (q31_t)0x312d1882,
-  (q31_t)0x31274b66, (q31_t)0x31217e2c, (q31_t)0x311bb0d3, (q31_t)0x3115e35c, (q31_t)0x311015c6, (q31_t)0x310a4813, (q31_t)0x31047a41, (q31_t)0x30feac51,
-  (q31_t)0x30f8de42, (q31_t)0x30f31016, (q31_t)0x30ed41cb, (q31_t)0x30e77362, (q31_t)0x30e1a4db, (q31_t)0x30dbd636, (q31_t)0x30d60772, (q31_t)0x30d03891,
-  (q31_t)0x30ca6991, (q31_t)0x30c49a74, (q31_t)0x30becb38, (q31_t)0x30b8fbde, (q31_t)0x30b32c66, (q31_t)0x30ad5cd0, (q31_t)0x30a78d1c, (q31_t)0x30a1bd4a,
-  (q31_t)0x309bed5a, (q31_t)0x30961d4c, (q31_t)0x30904d20, (q31_t)0x308a7cd6, (q31_t)0x3084ac6e, (q31_t)0x307edbe9, (q31_t)0x30790b45, (q31_t)0x30733a83,
-  (q31_t)0x306d69a4, (q31_t)0x306798a7, (q31_t)0x3061c78b, (q31_t)0x305bf652, (q31_t)0x305624fb, (q31_t)0x30505387, (q31_t)0x304a81f4, (q31_t)0x3044b044,
-  (q31_t)0x303ede76, (q31_t)0x30390c8a, (q31_t)0x30333a80, (q31_t)0x302d6859, (q31_t)0x30279614, (q31_t)0x3021c3b1, (q31_t)0x301bf131, (q31_t)0x30161e93,
-  (q31_t)0x30104bd7, (q31_t)0x300a78fe, (q31_t)0x3004a607, (q31_t)0x2ffed2f2, (q31_t)0x2ff8ffc0, (q31_t)0x2ff32c70, (q31_t)0x2fed5902, (q31_t)0x2fe78577,
-  (q31_t)0x2fe1b1cf, (q31_t)0x2fdbde09, (q31_t)0x2fd60a25, (q31_t)0x2fd03624, (q31_t)0x2fca6206, (q31_t)0x2fc48dc9, (q31_t)0x2fbeb970, (q31_t)0x2fb8e4f9,
-  (q31_t)0x2fb31064, (q31_t)0x2fad3bb3, (q31_t)0x2fa766e3, (q31_t)0x2fa191f7, (q31_t)0x2f9bbced, (q31_t)0x2f95e7c5, (q31_t)0x2f901280, (q31_t)0x2f8a3d1e,
-  (q31_t)0x2f84679f, (q31_t)0x2f7e9202, (q31_t)0x2f78bc48, (q31_t)0x2f72e671, (q31_t)0x2f6d107c, (q31_t)0x2f673a6a, (q31_t)0x2f61643b, (q31_t)0x2f5b8def,
-  (q31_t)0x2f55b785, (q31_t)0x2f4fe0ff, (q31_t)0x2f4a0a5b, (q31_t)0x2f44339a, (q31_t)0x2f3e5cbb, (q31_t)0x2f3885c0, (q31_t)0x2f32aea8, (q31_t)0x2f2cd772,
-  (q31_t)0x2f27001f, (q31_t)0x2f2128af, (q31_t)0x2f1b5122, (q31_t)0x2f157979, (q31_t)0x2f0fa1b2, (q31_t)0x2f09c9ce, (q31_t)0x2f03f1cd, (q31_t)0x2efe19ae,
-  (q31_t)0x2ef84173, (q31_t)0x2ef2691b, (q31_t)0x2eec90a7, (q31_t)0x2ee6b815, (q31_t)0x2ee0df66, (q31_t)0x2edb069a, (q31_t)0x2ed52db1, (q31_t)0x2ecf54ac,
-  (q31_t)0x2ec97b89, (q31_t)0x2ec3a24a, (q31_t)0x2ebdc8ee, (q31_t)0x2eb7ef75, (q31_t)0x2eb215df, (q31_t)0x2eac3c2d, (q31_t)0x2ea6625d, (q31_t)0x2ea08871,
-  (q31_t)0x2e9aae68, (q31_t)0x2e94d443, (q31_t)0x2e8efa00, (q31_t)0x2e891fa1, (q31_t)0x2e834525, (q31_t)0x2e7d6a8d, (q31_t)0x2e778fd8, (q31_t)0x2e71b506,
-  (q31_t)0x2e6bda17, (q31_t)0x2e65ff0c, (q31_t)0x2e6023e5, (q31_t)0x2e5a48a0, (q31_t)0x2e546d3f, (q31_t)0x2e4e91c2, (q31_t)0x2e48b628, (q31_t)0x2e42da71,
-  (q31_t)0x2e3cfe9e, (q31_t)0x2e3722ae, (q31_t)0x2e3146a2, (q31_t)0x2e2b6a79, (q31_t)0x2e258e34, (q31_t)0x2e1fb1d3, (q31_t)0x2e19d554, (q31_t)0x2e13f8ba,
-  (q31_t)0x2e0e1c03, (q31_t)0x2e083f30, (q31_t)0x2e026240, (q31_t)0x2dfc8534, (q31_t)0x2df6a80b, (q31_t)0x2df0cac6, (q31_t)0x2deaed65, (q31_t)0x2de50fe8,
-  (q31_t)0x2ddf324e, (q31_t)0x2dd95498, (q31_t)0x2dd376c5, (q31_t)0x2dcd98d7, (q31_t)0x2dc7bacc, (q31_t)0x2dc1dca4, (q31_t)0x2dbbfe61, (q31_t)0x2db62001,
-  (q31_t)0x2db04186, (q31_t)0x2daa62ee, (q31_t)0x2da4843a, (q31_t)0x2d9ea569, (q31_t)0x2d98c67d, (q31_t)0x2d92e774, (q31_t)0x2d8d084f, (q31_t)0x2d87290f,
-  (q31_t)0x2d8149b2, (q31_t)0x2d7b6a39, (q31_t)0x2d758aa4, (q31_t)0x2d6faaf3, (q31_t)0x2d69cb26, (q31_t)0x2d63eb3d, (q31_t)0x2d5e0b38, (q31_t)0x2d582b17,
-  (q31_t)0x2d524ada, (q31_t)0x2d4c6a81, (q31_t)0x2d468a0c, (q31_t)0x2d40a97b, (q31_t)0x2d3ac8ce, (q31_t)0x2d34e805, (q31_t)0x2d2f0721, (q31_t)0x2d292620,
-  (q31_t)0x2d234504, (q31_t)0x2d1d63cc, (q31_t)0x2d178278, (q31_t)0x2d11a108, (q31_t)0x2d0bbf7d, (q31_t)0x2d05ddd5, (q31_t)0x2cfffc12, (q31_t)0x2cfa1a33,
-  (q31_t)0x2cf43839, (q31_t)0x2cee5622, (q31_t)0x2ce873f0, (q31_t)0x2ce291a2, (q31_t)0x2cdcaf39, (q31_t)0x2cd6ccb4, (q31_t)0x2cd0ea13, (q31_t)0x2ccb0756,
-  (q31_t)0x2cc5247e, (q31_t)0x2cbf418b, (q31_t)0x2cb95e7b, (q31_t)0x2cb37b51, (q31_t)0x2cad980a, (q31_t)0x2ca7b4a8, (q31_t)0x2ca1d12a, (q31_t)0x2c9bed91,
-  (q31_t)0x2c9609dd, (q31_t)0x2c90260d, (q31_t)0x2c8a4221, (q31_t)0x2c845e1a, (q31_t)0x2c7e79f7, (q31_t)0x2c7895b9, (q31_t)0x2c72b160, (q31_t)0x2c6ccceb,
-  (q31_t)0x2c66e85b, (q31_t)0x2c6103af, (q31_t)0x2c5b1ee8, (q31_t)0x2c553a06, (q31_t)0x2c4f5508, (q31_t)0x2c496fef, (q31_t)0x2c438abb, (q31_t)0x2c3da56b,
-  (q31_t)0x2c37c000, (q31_t)0x2c31da7a, (q31_t)0x2c2bf4d8, (q31_t)0x2c260f1c, (q31_t)0x2c202944, (q31_t)0x2c1a4351, (q31_t)0x2c145d42, (q31_t)0x2c0e7719,
-  (q31_t)0x2c0890d4, (q31_t)0x2c02aa74, (q31_t)0x2bfcc3f9, (q31_t)0x2bf6dd63, (q31_t)0x2bf0f6b1, (q31_t)0x2beb0fe5, (q31_t)0x2be528fd, (q31_t)0x2bdf41fb,
-  (q31_t)0x2bd95add, (q31_t)0x2bd373a4, (q31_t)0x2bcd8c51, (q31_t)0x2bc7a4e2, (q31_t)0x2bc1bd58, (q31_t)0x2bbbd5b3, (q31_t)0x2bb5edf4, (q31_t)0x2bb00619,
-  (q31_t)0x2baa1e23, (q31_t)0x2ba43613, (q31_t)0x2b9e4de7, (q31_t)0x2b9865a1, (q31_t)0x2b927d3f, (q31_t)0x2b8c94c3, (q31_t)0x2b86ac2c, (q31_t)0x2b80c37a,
-  (q31_t)0x2b7adaae, (q31_t)0x2b74f1c6, (q31_t)0x2b6f08c4, (q31_t)0x2b691fa6, (q31_t)0x2b63366f, (q31_t)0x2b5d4d1c, (q31_t)0x2b5763ae, (q31_t)0x2b517a26,
-  (q31_t)0x2b4b9083, (q31_t)0x2b45a6c6, (q31_t)0x2b3fbced, (q31_t)0x2b39d2fa, (q31_t)0x2b33e8ed, (q31_t)0x2b2dfec5, (q31_t)0x2b281482, (q31_t)0x2b222a24,
-  (q31_t)0x2b1c3fac, (q31_t)0x2b165519, (q31_t)0x2b106a6c, (q31_t)0x2b0a7fa4, (q31_t)0x2b0494c2, (q31_t)0x2afea9c5, (q31_t)0x2af8bead, (q31_t)0x2af2d37b,
-  (q31_t)0x2aece82f, (q31_t)0x2ae6fcc8, (q31_t)0x2ae11146, (q31_t)0x2adb25aa, (q31_t)0x2ad539f4, (q31_t)0x2acf4e23, (q31_t)0x2ac96238, (q31_t)0x2ac37633,
-  (q31_t)0x2abd8a13, (q31_t)0x2ab79dd8, (q31_t)0x2ab1b184, (q31_t)0x2aabc515, (q31_t)0x2aa5d88b, (q31_t)0x2a9febe8, (q31_t)0x2a99ff2a, (q31_t)0x2a941252,
-  (q31_t)0x2a8e255f, (q31_t)0x2a883853, (q31_t)0x2a824b2c, (q31_t)0x2a7c5deb, (q31_t)0x2a76708f, (q31_t)0x2a70831a, (q31_t)0x2a6a958a, (q31_t)0x2a64a7e0,
-  (q31_t)0x2a5eba1c, (q31_t)0x2a58cc3e, (q31_t)0x2a52de46, (q31_t)0x2a4cf033, (q31_t)0x2a470207, (q31_t)0x2a4113c0, (q31_t)0x2a3b2560, (q31_t)0x2a3536e5,
-  (q31_t)0x2a2f4850, (q31_t)0x2a2959a1, (q31_t)0x2a236ad9, (q31_t)0x2a1d7bf6, (q31_t)0x2a178cf9, (q31_t)0x2a119de2, (q31_t)0x2a0baeb2, (q31_t)0x2a05bf67,
-  (q31_t)0x29ffd003, (q31_t)0x29f9e084, (q31_t)0x29f3f0ec, (q31_t)0x29ee013a, (q31_t)0x29e8116e, (q31_t)0x29e22188, (q31_t)0x29dc3188, (q31_t)0x29d6416f,
-  (q31_t)0x29d0513b, (q31_t)0x29ca60ee, (q31_t)0x29c47087, (q31_t)0x29be8007, (q31_t)0x29b88f6c, (q31_t)0x29b29eb8, (q31_t)0x29acadea, (q31_t)0x29a6bd02,
-  (q31_t)0x29a0cc01, (q31_t)0x299adae6, (q31_t)0x2994e9b1, (q31_t)0x298ef863, (q31_t)0x298906fb, (q31_t)0x2983157a, (q31_t)0x297d23df, (q31_t)0x2977322a,
-  (q31_t)0x2971405b, (q31_t)0x296b4e74, (q31_t)0x29655c72, (q31_t)0x295f6a57, (q31_t)0x29597823, (q31_t)0x295385d5, (q31_t)0x294d936d, (q31_t)0x2947a0ec,
-  (q31_t)0x2941ae52, (q31_t)0x293bbb9e, (q31_t)0x2935c8d1, (q31_t)0x292fd5ea, (q31_t)0x2929e2ea, (q31_t)0x2923efd0, (q31_t)0x291dfc9d, (q31_t)0x29180951,
-  (q31_t)0x291215eb, (q31_t)0x290c226c, (q31_t)0x29062ed4, (q31_t)0x29003b23, (q31_t)0x28fa4758, (q31_t)0x28f45374, (q31_t)0x28ee5f76, (q31_t)0x28e86b5f,
-  (q31_t)0x28e27730, (q31_t)0x28dc82e6, (q31_t)0x28d68e84, (q31_t)0x28d09a09, (q31_t)0x28caa574, (q31_t)0x28c4b0c6, (q31_t)0x28bebbff, (q31_t)0x28b8c71f,
-  (q31_t)0x28b2d226, (q31_t)0x28acdd13, (q31_t)0x28a6e7e8, (q31_t)0x28a0f2a3, (q31_t)0x289afd46, (q31_t)0x289507cf, (q31_t)0x288f123f, (q31_t)0x28891c97,
-  (q31_t)0x288326d5, (q31_t)0x287d30fa, (q31_t)0x28773b07, (q31_t)0x287144fa, (q31_t)0x286b4ed5, (q31_t)0x28655896, (q31_t)0x285f623f, (q31_t)0x28596bce,
-  (q31_t)0x28537545, (q31_t)0x284d7ea3, (q31_t)0x284787e8, (q31_t)0x28419114, (q31_t)0x283b9a28, (q31_t)0x2835a322, (q31_t)0x282fac04, (q31_t)0x2829b4cd,
-  (q31_t)0x2823bd7d, (q31_t)0x281dc615, (q31_t)0x2817ce93, (q31_t)0x2811d6f9, (q31_t)0x280bdf46, (q31_t)0x2805e77b, (q31_t)0x27ffef97, (q31_t)0x27f9f79a,
-  (q31_t)0x27f3ff85, (q31_t)0x27ee0756, (q31_t)0x27e80f10, (q31_t)0x27e216b0, (q31_t)0x27dc1e38, (q31_t)0x27d625a8, (q31_t)0x27d02cff, (q31_t)0x27ca343d,
-  (q31_t)0x27c43b63, (q31_t)0x27be4270, (q31_t)0x27b84965, (q31_t)0x27b25041, (q31_t)0x27ac5705, (q31_t)0x27a65db0, (q31_t)0x27a06443, (q31_t)0x279a6abd,
-  (q31_t)0x2794711f, (q31_t)0x278e7768, (q31_t)0x27887d99, (q31_t)0x278283b2, (q31_t)0x277c89b3, (q31_t)0x27768f9b, (q31_t)0x2770956a, (q31_t)0x276a9b21,
-  (q31_t)0x2764a0c0, (q31_t)0x275ea647, (q31_t)0x2758abb6, (q31_t)0x2752b10c, (q31_t)0x274cb64a, (q31_t)0x2746bb6f, (q31_t)0x2740c07d, (q31_t)0x273ac572,
-  (q31_t)0x2734ca4f, (q31_t)0x272ecf14, (q31_t)0x2728d3c0, (q31_t)0x2722d855, (q31_t)0x271cdcd1, (q31_t)0x2716e136, (q31_t)0x2710e582, (q31_t)0x270ae9b6,
-  (q31_t)0x2704edd2, (q31_t)0x26fef1d5, (q31_t)0x26f8f5c1, (q31_t)0x26f2f995, (q31_t)0x26ecfd51, (q31_t)0x26e700f5, (q31_t)0x26e10480, (q31_t)0x26db07f4,
-  (q31_t)0x26d50b50, (q31_t)0x26cf0e94, (q31_t)0x26c911c0, (q31_t)0x26c314d4, (q31_t)0x26bd17d0, (q31_t)0x26b71ab4, (q31_t)0x26b11d80, (q31_t)0x26ab2034,
-  (q31_t)0x26a522d1, (q31_t)0x269f2556, (q31_t)0x269927c3, (q31_t)0x26932a18, (q31_t)0x268d2c55, (q31_t)0x26872e7b, (q31_t)0x26813088, (q31_t)0x267b327e,
-  (q31_t)0x2675345d, (q31_t)0x266f3623, (q31_t)0x266937d2, (q31_t)0x26633969, (q31_t)0x265d3ae9, (q31_t)0x26573c50, (q31_t)0x26513da1, (q31_t)0x264b3ed9,
-  (q31_t)0x26453ffa, (q31_t)0x263f4103, (q31_t)0x263941f5, (q31_t)0x263342cf, (q31_t)0x262d4392, (q31_t)0x2627443d, (q31_t)0x262144d0, (q31_t)0x261b454c,
-  (q31_t)0x261545b0, (q31_t)0x260f45fd, (q31_t)0x26094633, (q31_t)0x26034651, (q31_t)0x25fd4657, (q31_t)0x25f74646, (q31_t)0x25f1461e, (q31_t)0x25eb45de,
-  (q31_t)0x25e54587, (q31_t)0x25df4519, (q31_t)0x25d94493, (q31_t)0x25d343f6, (q31_t)0x25cd4341, (q31_t)0x25c74276, (q31_t)0x25c14192, (q31_t)0x25bb4098,
-  (q31_t)0x25b53f86, (q31_t)0x25af3e5d, (q31_t)0x25a93d1d, (q31_t)0x25a33bc6, (q31_t)0x259d3a57, (q31_t)0x259738d1, (q31_t)0x25913734, (q31_t)0x258b3580,
-  (q31_t)0x258533b5, (q31_t)0x257f31d2, (q31_t)0x25792fd8, (q31_t)0x25732dc8, (q31_t)0x256d2ba0, (q31_t)0x25672961, (q31_t)0x2561270b, (q31_t)0x255b249e,
-  (q31_t)0x2555221a, (q31_t)0x254f1f7e, (q31_t)0x25491ccc, (q31_t)0x25431a03, (q31_t)0x253d1723, (q31_t)0x2537142c, (q31_t)0x2531111e, (q31_t)0x252b0df9,
-  (q31_t)0x25250abd, (q31_t)0x251f076a, (q31_t)0x25190400, (q31_t)0x25130080, (q31_t)0x250cfce8, (q31_t)0x2506f93a, (q31_t)0x2500f574, (q31_t)0x24faf198,
-  (q31_t)0x24f4eda6, (q31_t)0x24eee99c, (q31_t)0x24e8e57c, (q31_t)0x24e2e144, (q31_t)0x24dcdcf6, (q31_t)0x24d6d892, (q31_t)0x24d0d416, (q31_t)0x24cacf84,
-  (q31_t)0x24c4cadb, (q31_t)0x24bec61c, (q31_t)0x24b8c146, (q31_t)0x24b2bc59, (q31_t)0x24acb756, (q31_t)0x24a6b23b, (q31_t)0x24a0ad0b, (q31_t)0x249aa7c4,
-  (q31_t)0x2494a266, (q31_t)0x248e9cf1, (q31_t)0x24889766, (q31_t)0x248291c5, (q31_t)0x247c8c0d, (q31_t)0x2476863e, (q31_t)0x24708059, (q31_t)0x246a7a5e,
-  (q31_t)0x2464744c, (q31_t)0x245e6e23, (q31_t)0x245867e4, (q31_t)0x2452618f, (q31_t)0x244c5b24, (q31_t)0x244654a1, (q31_t)0x24404e09, (q31_t)0x243a475a,
-  (q31_t)0x24344095, (q31_t)0x242e39ba, (q31_t)0x242832c8, (q31_t)0x24222bc0, (q31_t)0x241c24a1, (q31_t)0x24161d6d, (q31_t)0x24101622, (q31_t)0x240a0ec1,
-  (q31_t)0x24040749, (q31_t)0x23fdffbc, (q31_t)0x23f7f818, (q31_t)0x23f1f05e, (q31_t)0x23ebe88e, (q31_t)0x23e5e0a7, (q31_t)0x23dfd8ab, (q31_t)0x23d9d098,
-  (q31_t)0x23d3c86f, (q31_t)0x23cdc031, (q31_t)0x23c7b7dc, (q31_t)0x23c1af71, (q31_t)0x23bba6f0, (q31_t)0x23b59e59, (q31_t)0x23af95ac, (q31_t)0x23a98ce8,
-  (q31_t)0x23a3840f, (q31_t)0x239d7b20, (q31_t)0x2397721b, (q31_t)0x23916900, (q31_t)0x238b5fcf, (q31_t)0x23855688, (q31_t)0x237f4d2b, (q31_t)0x237943b9,
-  (q31_t)0x23733a30, (q31_t)0x236d3092, (q31_t)0x236726dd, (q31_t)0x23611d13, (q31_t)0x235b1333, (q31_t)0x2355093e, (q31_t)0x234eff32, (q31_t)0x2348f511,
-  (q31_t)0x2342eada, (q31_t)0x233ce08d, (q31_t)0x2336d62a, (q31_t)0x2330cbb2, (q31_t)0x232ac124, (q31_t)0x2324b680, (q31_t)0x231eabc7, (q31_t)0x2318a0f8,
-  (q31_t)0x23129613, (q31_t)0x230c8b19, (q31_t)0x23068009, (q31_t)0x230074e3, (q31_t)0x22fa69a8, (q31_t)0x22f45e57, (q31_t)0x22ee52f1, (q31_t)0x22e84775,
-  (q31_t)0x22e23be4, (q31_t)0x22dc303d, (q31_t)0x22d62480, (q31_t)0x22d018ae, (q31_t)0x22ca0cc7, (q31_t)0x22c400ca, (q31_t)0x22bdf4b8, (q31_t)0x22b7e890,
-  (q31_t)0x22b1dc53, (q31_t)0x22abd001, (q31_t)0x22a5c399, (q31_t)0x229fb71b, (q31_t)0x2299aa89, (q31_t)0x22939de1, (q31_t)0x228d9123, (q31_t)0x22878451,
-  (q31_t)0x22817769, (q31_t)0x227b6a6c, (q31_t)0x22755d59, (q31_t)0x226f5032, (q31_t)0x226942f5, (q31_t)0x226335a2, (q31_t)0x225d283b, (q31_t)0x22571abe,
-  (q31_t)0x22510d2d, (q31_t)0x224aff86, (q31_t)0x2244f1c9, (q31_t)0x223ee3f8, (q31_t)0x2238d612, (q31_t)0x2232c816, (q31_t)0x222cba06, (q31_t)0x2226abe0,
-  (q31_t)0x22209da5, (q31_t)0x221a8f56, (q31_t)0x221480f1, (q31_t)0x220e7277, (q31_t)0x220863e8, (q31_t)0x22025544, (q31_t)0x21fc468b, (q31_t)0x21f637be,
-  (q31_t)0x21f028db, (q31_t)0x21ea19e3, (q31_t)0x21e40ad7, (q31_t)0x21ddfbb5, (q31_t)0x21d7ec7f, (q31_t)0x21d1dd34, (q31_t)0x21cbcdd3, (q31_t)0x21c5be5e,
-  (q31_t)0x21bfaed5, (q31_t)0x21b99f36, (q31_t)0x21b38f83, (q31_t)0x21ad7fba, (q31_t)0x21a76fdd, (q31_t)0x21a15fec, (q31_t)0x219b4fe5, (q31_t)0x21953fca,
-  (q31_t)0x218f2f9a, (q31_t)0x21891f55, (q31_t)0x21830efc, (q31_t)0x217cfe8e, (q31_t)0x2176ee0b, (q31_t)0x2170dd74, (q31_t)0x216accc8, (q31_t)0x2164bc08,
-  (q31_t)0x215eab33, (q31_t)0x21589a49, (q31_t)0x2152894b, (q31_t)0x214c7838, (q31_t)0x21466710, (q31_t)0x214055d4, (q31_t)0x213a4484, (q31_t)0x2134331f,
-  (q31_t)0x212e21a6, (q31_t)0x21281018, (q31_t)0x2121fe76, (q31_t)0x211becbf, (q31_t)0x2115daf4, (q31_t)0x210fc914, (q31_t)0x2109b720, (q31_t)0x2103a518,
-  (q31_t)0x20fd92fb, (q31_t)0x20f780ca, (q31_t)0x20f16e84, (q31_t)0x20eb5c2b, (q31_t)0x20e549bd, (q31_t)0x20df373a, (q31_t)0x20d924a4, (q31_t)0x20d311f9,
-  (q31_t)0x20ccff3a, (q31_t)0x20c6ec66, (q31_t)0x20c0d97f, (q31_t)0x20bac683, (q31_t)0x20b4b373, (q31_t)0x20aea04f, (q31_t)0x20a88d17, (q31_t)0x20a279ca,
-  (q31_t)0x209c666a, (q31_t)0x209652f5, (q31_t)0x20903f6c, (q31_t)0x208a2bcf, (q31_t)0x2084181e, (q31_t)0x207e0459, (q31_t)0x2077f080, (q31_t)0x2071dc93,
-  (q31_t)0x206bc892, (q31_t)0x2065b47d, (q31_t)0x205fa054, (q31_t)0x20598c17, (q31_t)0x205377c6, (q31_t)0x204d6361, (q31_t)0x20474ee8, (q31_t)0x20413a5b,
-  (q31_t)0x203b25bb, (q31_t)0x20351106, (q31_t)0x202efc3e, (q31_t)0x2028e761, (q31_t)0x2022d271, (q31_t)0x201cbd6d, (q31_t)0x2016a856, (q31_t)0x2010932a,
-  (q31_t)0x200a7deb, (q31_t)0x20046898, (q31_t)0x1ffe5331, (q31_t)0x1ff83db6, (q31_t)0x1ff22828, (q31_t)0x1fec1286, (q31_t)0x1fe5fcd0, (q31_t)0x1fdfe707,
-  (q31_t)0x1fd9d12a, (q31_t)0x1fd3bb39, (q31_t)0x1fcda535, (q31_t)0x1fc78f1d, (q31_t)0x1fc178f1, (q31_t)0x1fbb62b2, (q31_t)0x1fb54c60, (q31_t)0x1faf35f9,
-  (q31_t)0x1fa91f80, (q31_t)0x1fa308f2, (q31_t)0x1f9cf252, (q31_t)0x1f96db9d, (q31_t)0x1f90c4d5, (q31_t)0x1f8aadfa, (q31_t)0x1f84970b, (q31_t)0x1f7e8009,
-  (q31_t)0x1f7868f4, (q31_t)0x1f7251ca, (q31_t)0x1f6c3a8e, (q31_t)0x1f66233e, (q31_t)0x1f600bdb, (q31_t)0x1f59f465, (q31_t)0x1f53dcdb, (q31_t)0x1f4dc53d,
-  (q31_t)0x1f47ad8d, (q31_t)0x1f4195c9, (q31_t)0x1f3b7df2, (q31_t)0x1f356608, (q31_t)0x1f2f4e0a, (q31_t)0x1f2935f9, (q31_t)0x1f231dd5, (q31_t)0x1f1d059e,
-  (q31_t)0x1f16ed54, (q31_t)0x1f10d4f6, (q31_t)0x1f0abc85, (q31_t)0x1f04a401, (q31_t)0x1efe8b6a, (q31_t)0x1ef872c0, (q31_t)0x1ef25a03, (q31_t)0x1eec4132,
-  (q31_t)0x1ee6284f, (q31_t)0x1ee00f58, (q31_t)0x1ed9f64f, (q31_t)0x1ed3dd32, (q31_t)0x1ecdc402, (q31_t)0x1ec7aac0, (q31_t)0x1ec1916a, (q31_t)0x1ebb7802,
-  (q31_t)0x1eb55e86, (q31_t)0x1eaf44f8, (q31_t)0x1ea92b56, (q31_t)0x1ea311a2, (q31_t)0x1e9cf7db, (q31_t)0x1e96de01, (q31_t)0x1e90c414, (q31_t)0x1e8aaa14,
-  (q31_t)0x1e849001, (q31_t)0x1e7e75dc, (q31_t)0x1e785ba3, (q31_t)0x1e724158, (q31_t)0x1e6c26fa, (q31_t)0x1e660c8a, (q31_t)0x1e5ff206, (q31_t)0x1e59d770,
-  (q31_t)0x1e53bcc7, (q31_t)0x1e4da20c, (q31_t)0x1e47873d, (q31_t)0x1e416c5d, (q31_t)0x1e3b5169, (q31_t)0x1e353663, (q31_t)0x1e2f1b4a, (q31_t)0x1e29001e,
-  (q31_t)0x1e22e4e0, (q31_t)0x1e1cc990, (q31_t)0x1e16ae2c, (q31_t)0x1e1092b6, (q31_t)0x1e0a772e, (q31_t)0x1e045b93, (q31_t)0x1dfe3fe6, (q31_t)0x1df82426,
-  (q31_t)0x1df20853, (q31_t)0x1debec6f, (q31_t)0x1de5d077, (q31_t)0x1ddfb46e, (q31_t)0x1dd99851, (q31_t)0x1dd37c23, (q31_t)0x1dcd5fe2, (q31_t)0x1dc7438e,
-  (q31_t)0x1dc12729, (q31_t)0x1dbb0ab0, (q31_t)0x1db4ee26, (q31_t)0x1daed189, (q31_t)0x1da8b4da, (q31_t)0x1da29819, (q31_t)0x1d9c7b45, (q31_t)0x1d965e5f,
-  (q31_t)0x1d904167, (q31_t)0x1d8a245c, (q31_t)0x1d840740, (q31_t)0x1d7dea11, (q31_t)0x1d77ccd0, (q31_t)0x1d71af7d, (q31_t)0x1d6b9217, (q31_t)0x1d6574a0,
-  (q31_t)0x1d5f5716, (q31_t)0x1d59397a, (q31_t)0x1d531bcc, (q31_t)0x1d4cfe0d, (q31_t)0x1d46e03a, (q31_t)0x1d40c256, (q31_t)0x1d3aa460, (q31_t)0x1d348658,
-  (q31_t)0x1d2e683e, (q31_t)0x1d284a12, (q31_t)0x1d222bd3, (q31_t)0x1d1c0d83, (q31_t)0x1d15ef21, (q31_t)0x1d0fd0ad, (q31_t)0x1d09b227, (q31_t)0x1d03938f,
-  (q31_t)0x1cfd74e5, (q31_t)0x1cf7562a, (q31_t)0x1cf1375c, (q31_t)0x1ceb187d, (q31_t)0x1ce4f98c, (q31_t)0x1cdeda89, (q31_t)0x1cd8bb74, (q31_t)0x1cd29c4d,
-  (q31_t)0x1ccc7d15, (q31_t)0x1cc65dca, (q31_t)0x1cc03e6e, (q31_t)0x1cba1f01, (q31_t)0x1cb3ff81, (q31_t)0x1caddff0, (q31_t)0x1ca7c04d, (q31_t)0x1ca1a099,
-  (q31_t)0x1c9b80d3, (q31_t)0x1c9560fb, (q31_t)0x1c8f4112, (q31_t)0x1c892117, (q31_t)0x1c83010a, (q31_t)0x1c7ce0ec, (q31_t)0x1c76c0bc, (q31_t)0x1c70a07b,
-  (q31_t)0x1c6a8028, (q31_t)0x1c645fc3, (q31_t)0x1c5e3f4d, (q31_t)0x1c581ec6, (q31_t)0x1c51fe2d, (q31_t)0x1c4bdd83, (q31_t)0x1c45bcc7, (q31_t)0x1c3f9bf9,
-  (q31_t)0x1c397b1b, (q31_t)0x1c335a2b, (q31_t)0x1c2d3929, (q31_t)0x1c271816, (q31_t)0x1c20f6f2, (q31_t)0x1c1ad5bc, (q31_t)0x1c14b475, (q31_t)0x1c0e931d,
-  (q31_t)0x1c0871b4, (q31_t)0x1c025039, (q31_t)0x1bfc2ead, (q31_t)0x1bf60d0f, (q31_t)0x1befeb60, (q31_t)0x1be9c9a1, (q31_t)0x1be3a7cf, (q31_t)0x1bdd85ed,
-  (q31_t)0x1bd763fa, (q31_t)0x1bd141f5, (q31_t)0x1bcb1fdf, (q31_t)0x1bc4fdb8, (q31_t)0x1bbedb80, (q31_t)0x1bb8b937, (q31_t)0x1bb296dc, (q31_t)0x1bac7471,
-  (q31_t)0x1ba651f5, (q31_t)0x1ba02f67, (q31_t)0x1b9a0cc8, (q31_t)0x1b93ea19, (q31_t)0x1b8dc758, (q31_t)0x1b87a487, (q31_t)0x1b8181a4, (q31_t)0x1b7b5eb0,
-  (q31_t)0x1b753bac, (q31_t)0x1b6f1897, (q31_t)0x1b68f570, (q31_t)0x1b62d239, (q31_t)0x1b5caef1, (q31_t)0x1b568b98, (q31_t)0x1b50682e, (q31_t)0x1b4a44b3,
-  (q31_t)0x1b442127, (q31_t)0x1b3dfd8b, (q31_t)0x1b37d9de, (q31_t)0x1b31b620, (q31_t)0x1b2b9251, (q31_t)0x1b256e71, (q31_t)0x1b1f4a81, (q31_t)0x1b192680,
-  (q31_t)0x1b13026e, (q31_t)0x1b0cde4c, (q31_t)0x1b06ba19, (q31_t)0x1b0095d5, (q31_t)0x1afa7180, (q31_t)0x1af44d1b, (q31_t)0x1aee28a6, (q31_t)0x1ae8041f,
-  (q31_t)0x1ae1df88, (q31_t)0x1adbbae1, (q31_t)0x1ad59629, (q31_t)0x1acf7160, (q31_t)0x1ac94c87, (q31_t)0x1ac3279d, (q31_t)0x1abd02a3, (q31_t)0x1ab6dd98,
-  (q31_t)0x1ab0b87d, (q31_t)0x1aaa9352, (q31_t)0x1aa46e16, (q31_t)0x1a9e48c9, (q31_t)0x1a98236c, (q31_t)0x1a91fdff, (q31_t)0x1a8bd881, (q31_t)0x1a85b2f3,
-  (q31_t)0x1a7f8d54, (q31_t)0x1a7967a6, (q31_t)0x1a7341e6, (q31_t)0x1a6d1c17, (q31_t)0x1a66f637, (q31_t)0x1a60d047, (q31_t)0x1a5aaa47, (q31_t)0x1a548436,
-  (q31_t)0x1a4e5e15, (q31_t)0x1a4837e4, (q31_t)0x1a4211a3, (q31_t)0x1a3beb52, (q31_t)0x1a35c4f0, (q31_t)0x1a2f9e7e, (q31_t)0x1a2977fc, (q31_t)0x1a23516a,
-  (q31_t)0x1a1d2ac8, (q31_t)0x1a170416, (q31_t)0x1a10dd53, (q31_t)0x1a0ab681, (q31_t)0x1a048f9e, (q31_t)0x19fe68ac, (q31_t)0x19f841a9, (q31_t)0x19f21a96,
-  (q31_t)0x19ebf374, (q31_t)0x19e5cc41, (q31_t)0x19dfa4fe, (q31_t)0x19d97dac, (q31_t)0x19d35649, (q31_t)0x19cd2ed7, (q31_t)0x19c70754, (q31_t)0x19c0dfc2,
-  (q31_t)0x19bab820, (q31_t)0x19b4906e, (q31_t)0x19ae68ac, (q31_t)0x19a840da, (q31_t)0x19a218f9, (q31_t)0x199bf107, (q31_t)0x1995c906, (q31_t)0x198fa0f5,
-  (q31_t)0x198978d4, (q31_t)0x198350a4, (q31_t)0x197d2864, (q31_t)0x19770014, (q31_t)0x1970d7b4, (q31_t)0x196aaf45, (q31_t)0x196486c6, (q31_t)0x195e5e37,
-  (q31_t)0x19583599, (q31_t)0x19520ceb, (q31_t)0x194be42d, (q31_t)0x1945bb60, (q31_t)0x193f9283, (q31_t)0x19396997, (q31_t)0x1933409b, (q31_t)0x192d178f,
-  (q31_t)0x1926ee74, (q31_t)0x1920c54a, (q31_t)0x191a9c10, (q31_t)0x191472c6, (q31_t)0x190e496d, (q31_t)0x19082005, (q31_t)0x1901f68d, (q31_t)0x18fbcd06,
-  (q31_t)0x18f5a36f, (q31_t)0x18ef79c9, (q31_t)0x18e95014, (q31_t)0x18e3264f, (q31_t)0x18dcfc7b, (q31_t)0x18d6d297, (q31_t)0x18d0a8a4, (q31_t)0x18ca7ea2,
-  (q31_t)0x18c45491, (q31_t)0x18be2a70, (q31_t)0x18b80040, (q31_t)0x18b1d601, (q31_t)0x18ababb2, (q31_t)0x18a58154, (q31_t)0x189f56e8, (q31_t)0x18992c6b,
-  (q31_t)0x189301e0, (q31_t)0x188cd746, (q31_t)0x1886ac9c, (q31_t)0x188081e4, (q31_t)0x187a571c, (q31_t)0x18742c45, (q31_t)0x186e015f, (q31_t)0x1867d66a,
-  (q31_t)0x1861ab66, (q31_t)0x185b8053, (q31_t)0x18555530, (q31_t)0x184f29ff, (q31_t)0x1848febf, (q31_t)0x1842d370, (q31_t)0x183ca812, (q31_t)0x18367ca5,
-  (q31_t)0x18305129, (q31_t)0x182a259e, (q31_t)0x1823fa04, (q31_t)0x181dce5b, (q31_t)0x1817a2a4, (q31_t)0x181176dd, (q31_t)0x180b4b08, (q31_t)0x18051f24,
-  (q31_t)0x17fef331, (q31_t)0x17f8c72f, (q31_t)0x17f29b1e, (q31_t)0x17ec6eff, (q31_t)0x17e642d1, (q31_t)0x17e01694, (q31_t)0x17d9ea49, (q31_t)0x17d3bdee,
-  (q31_t)0x17cd9186, (q31_t)0x17c7650e, (q31_t)0x17c13888, (q31_t)0x17bb0bf3, (q31_t)0x17b4df4f, (q31_t)0x17aeb29d, (q31_t)0x17a885dc, (q31_t)0x17a2590d,
-  (q31_t)0x179c2c2f, (q31_t)0x1795ff42, (q31_t)0x178fd247, (q31_t)0x1789a53d, (q31_t)0x17837825, (q31_t)0x177d4afe, (q31_t)0x17771dc9, (q31_t)0x1770f086,
-  (q31_t)0x176ac333, (q31_t)0x176495d3, (q31_t)0x175e6864, (q31_t)0x17583ae7, (q31_t)0x17520d5b, (q31_t)0x174bdfc1, (q31_t)0x1745b218, (q31_t)0x173f8461,
-  (q31_t)0x1739569c, (q31_t)0x173328c8, (q31_t)0x172cfae6, (q31_t)0x1726ccf6, (q31_t)0x17209ef8, (q31_t)0x171a70eb, (q31_t)0x171442d0, (q31_t)0x170e14a7,
-  (q31_t)0x1707e670, (q31_t)0x1701b82a, (q31_t)0x16fb89d6, (q31_t)0x16f55b74, (q31_t)0x16ef2d04, (q31_t)0x16e8fe86, (q31_t)0x16e2cff9, (q31_t)0x16dca15f,
-  (q31_t)0x16d672b6, (q31_t)0x16d043ff, (q31_t)0x16ca153a, (q31_t)0x16c3e667, (q31_t)0x16bdb787, (q31_t)0x16b78898, (q31_t)0x16b1599b, (q31_t)0x16ab2a90,
-  (q31_t)0x16a4fb77, (q31_t)0x169ecc50, (q31_t)0x16989d1b, (q31_t)0x16926dd8, (q31_t)0x168c3e87, (q31_t)0x16860f29, (q31_t)0x167fdfbc, (q31_t)0x1679b042,
-  (q31_t)0x167380ba, (q31_t)0x166d5123, (q31_t)0x1667217f, (q31_t)0x1660f1ce, (q31_t)0x165ac20e, (q31_t)0x16549241, (q31_t)0x164e6266, (q31_t)0x1648327d,
-  (q31_t)0x16420286, (q31_t)0x163bd282, (q31_t)0x1635a270, (q31_t)0x162f7250, (q31_t)0x16294222, (q31_t)0x162311e7, (q31_t)0x161ce19e, (q31_t)0x1616b148,
-  (q31_t)0x161080e4, (q31_t)0x160a5072, (q31_t)0x16041ff3, (q31_t)0x15fdef66, (q31_t)0x15f7becc, (q31_t)0x15f18e24, (q31_t)0x15eb5d6e, (q31_t)0x15e52cab,
-  (q31_t)0x15defbdb, (q31_t)0x15d8cafd, (q31_t)0x15d29a11, (q31_t)0x15cc6918, (q31_t)0x15c63812, (q31_t)0x15c006fe, (q31_t)0x15b9d5dd, (q31_t)0x15b3a4ae,
-  (q31_t)0x15ad7372, (q31_t)0x15a74228, (q31_t)0x15a110d2, (q31_t)0x159adf6e, (q31_t)0x1594adfc, (q31_t)0x158e7c7d, (q31_t)0x15884af1, (q31_t)0x15821958,
-  (q31_t)0x157be7b1, (q31_t)0x1575b5fe, (q31_t)0x156f843c, (q31_t)0x1569526e, (q31_t)0x15632093, (q31_t)0x155ceeaa, (q31_t)0x1556bcb4, (q31_t)0x15508ab1,
-  (q31_t)0x154a58a1, (q31_t)0x15442683, (q31_t)0x153df459, (q31_t)0x1537c221, (q31_t)0x15318fdd, (q31_t)0x152b5d8b, (q31_t)0x15252b2c, (q31_t)0x151ef8c0,
-  (q31_t)0x1518c648, (q31_t)0x151293c2, (q31_t)0x150c612f, (q31_t)0x15062e8f, (q31_t)0x14fffbe2, (q31_t)0x14f9c928, (q31_t)0x14f39662, (q31_t)0x14ed638e,
-  (q31_t)0x14e730ae, (q31_t)0x14e0fdc0, (q31_t)0x14dacac6, (q31_t)0x14d497bf, (q31_t)0x14ce64ab, (q31_t)0x14c8318a, (q31_t)0x14c1fe5c, (q31_t)0x14bbcb22,
-  (q31_t)0x14b597da, (q31_t)0x14af6486, (q31_t)0x14a93125, (q31_t)0x14a2fdb8, (q31_t)0x149cca3e, (q31_t)0x149696b7, (q31_t)0x14906323, (q31_t)0x148a2f82,
-  (q31_t)0x1483fbd5, (q31_t)0x147dc81c, (q31_t)0x14779455, (q31_t)0x14716082, (q31_t)0x146b2ca3, (q31_t)0x1464f8b7, (q31_t)0x145ec4be, (q31_t)0x145890b9,
-  (q31_t)0x14525ca7, (q31_t)0x144c2888, (q31_t)0x1445f45d, (q31_t)0x143fc026, (q31_t)0x14398be2, (q31_t)0x14335792, (q31_t)0x142d2335, (q31_t)0x1426eecb,
-  (q31_t)0x1420ba56, (q31_t)0x141a85d3, (q31_t)0x14145145, (q31_t)0x140e1caa, (q31_t)0x1407e803, (q31_t)0x1401b34f, (q31_t)0x13fb7e8f, (q31_t)0x13f549c3,
-  (q31_t)0x13ef14ea, (q31_t)0x13e8e005, (q31_t)0x13e2ab14, (q31_t)0x13dc7616, (q31_t)0x13d6410d, (q31_t)0x13d00bf7, (q31_t)0x13c9d6d4, (q31_t)0x13c3a1a6,
-  (q31_t)0x13bd6c6b, (q31_t)0x13b73725, (q31_t)0x13b101d2, (q31_t)0x13aacc73, (q31_t)0x13a49707, (q31_t)0x139e6190, (q31_t)0x13982c0d, (q31_t)0x1391f67d,
-  (q31_t)0x138bc0e1, (q31_t)0x13858b3a, (q31_t)0x137f5586, (q31_t)0x13791fc6, (q31_t)0x1372e9fb, (q31_t)0x136cb423, (q31_t)0x13667e3f, (q31_t)0x13604850,
-  (q31_t)0x135a1254, (q31_t)0x1353dc4c, (q31_t)0x134da639, (q31_t)0x1347701a, (q31_t)0x134139ee, (q31_t)0x133b03b7, (q31_t)0x1334cd74, (q31_t)0x132e9725,
-  (q31_t)0x132860ca, (q31_t)0x13222a64, (q31_t)0x131bf3f2, (q31_t)0x1315bd73, (q31_t)0x130f86ea, (q31_t)0x13095054, (q31_t)0x130319b3, (q31_t)0x12fce305,
-  (q31_t)0x12f6ac4d, (q31_t)0x12f07588, (q31_t)0x12ea3eb8, (q31_t)0x12e407dc, (q31_t)0x12ddd0f4, (q31_t)0x12d79a01, (q31_t)0x12d16303, (q31_t)0x12cb2bf8,
-  (q31_t)0x12c4f4e2, (q31_t)0x12bebdc1, (q31_t)0x12b88693, (q31_t)0x12b24f5b, (q31_t)0x12ac1817, (q31_t)0x12a5e0c7, (q31_t)0x129fa96c, (q31_t)0x12997205,
-  (q31_t)0x12933a93, (q31_t)0x128d0315, (q31_t)0x1286cb8c, (q31_t)0x128093f7, (q31_t)0x127a5c57, (q31_t)0x127424ac, (q31_t)0x126decf5, (q31_t)0x1267b533,
-  (q31_t)0x12617d66, (q31_t)0x125b458d, (q31_t)0x12550da9, (q31_t)0x124ed5ba, (q31_t)0x12489dbf, (q31_t)0x124265b9, (q31_t)0x123c2da8, (q31_t)0x1235f58b,
-  (q31_t)0x122fbd63, (q31_t)0x12298530, (q31_t)0x12234cf2, (q31_t)0x121d14a9, (q31_t)0x1216dc54, (q31_t)0x1210a3f5, (q31_t)0x120a6b8a, (q31_t)0x12043314,
-  (q31_t)0x11fdfa93, (q31_t)0x11f7c207, (q31_t)0x11f18970, (q31_t)0x11eb50cd, (q31_t)0x11e51820, (q31_t)0x11dedf68, (q31_t)0x11d8a6a4, (q31_t)0x11d26dd6,
-  (q31_t)0x11cc34fc, (q31_t)0x11c5fc18, (q31_t)0x11bfc329, (q31_t)0x11b98a2e, (q31_t)0x11b35129, (q31_t)0x11ad1819, (q31_t)0x11a6defe, (q31_t)0x11a0a5d8,
-  (q31_t)0x119a6ca7, (q31_t)0x1194336b, (q31_t)0x118dfa25, (q31_t)0x1187c0d3, (q31_t)0x11818777, (q31_t)0x117b4e10, (q31_t)0x1175149e, (q31_t)0x116edb22,
-  (q31_t)0x1168a19b, (q31_t)0x11626809, (q31_t)0x115c2e6c, (q31_t)0x1155f4c4, (q31_t)0x114fbb12, (q31_t)0x11498156, (q31_t)0x1143478e, (q31_t)0x113d0dbc,
-  (q31_t)0x1136d3df, (q31_t)0x113099f8, (q31_t)0x112a6006, (q31_t)0x11242609, (q31_t)0x111dec02, (q31_t)0x1117b1f0, (q31_t)0x111177d4, (q31_t)0x110b3dad,
-  (q31_t)0x1105037c, (q31_t)0x10fec940, (q31_t)0x10f88efa, (q31_t)0x10f254a9, (q31_t)0x10ec1a4e, (q31_t)0x10e5dfe8, (q31_t)0x10dfa578, (q31_t)0x10d96afe,
-  (q31_t)0x10d33079, (q31_t)0x10ccf5ea, (q31_t)0x10c6bb50, (q31_t)0x10c080ac, (q31_t)0x10ba45fe, (q31_t)0x10b40b45, (q31_t)0x10add082, (q31_t)0x10a795b5,
-  (q31_t)0x10a15ade, (q31_t)0x109b1ffc, (q31_t)0x1094e510, (q31_t)0x108eaa1a, (q31_t)0x10886f19, (q31_t)0x1082340f, (q31_t)0x107bf8fa, (q31_t)0x1075bddb,
-  (q31_t)0x106f82b2, (q31_t)0x1069477f, (q31_t)0x10630c41, (q31_t)0x105cd0fa, (q31_t)0x105695a8, (q31_t)0x10505a4d, (q31_t)0x104a1ee7, (q31_t)0x1043e377,
-  (q31_t)0x103da7fd, (q31_t)0x10376c79, (q31_t)0x103130ec, (q31_t)0x102af554, (q31_t)0x1024b9b2, (q31_t)0x101e7e06, (q31_t)0x10184251, (q31_t)0x10120691,
-  (q31_t)0x100bcac7, (q31_t)0x10058ef4, (q31_t)0xfff5317, (q31_t)0xff91730, (q31_t)0xff2db3e, (q31_t)0xfec9f44, (q31_t)0xfe6633f, (q31_t)0xfe02730,
-  (q31_t)0xfd9eb18, (q31_t)0xfd3aef6, (q31_t)0xfcd72ca, (q31_t)0xfc73695, (q31_t)0xfc0fa55, (q31_t)0xfbabe0c, (q31_t)0xfb481ba, (q31_t)0xfae455d,
-  (q31_t)0xfa808f7, (q31_t)0xfa1cc87, (q31_t)0xf9b900e, (q31_t)0xf95538b, (q31_t)0xf8f16fe, (q31_t)0xf88da68, (q31_t)0xf829dc8, (q31_t)0xf7c611f,
-  (q31_t)0xf76246c, (q31_t)0xf6fe7af, (q31_t)0xf69aae9, (q31_t)0xf636e1a, (q31_t)0xf5d3141, (q31_t)0xf56f45e, (q31_t)0xf50b773, (q31_t)0xf4a7a7d,
-  (q31_t)0xf443d7e, (q31_t)0xf3e0076, (q31_t)0xf37c365, (q31_t)0xf318649, (q31_t)0xf2b4925, (q31_t)0xf250bf7, (q31_t)0xf1ecec0, (q31_t)0xf189180,
-  (q31_t)0xf125436, (q31_t)0xf0c16e3, (q31_t)0xf05d987, (q31_t)0xeff9c21, (q31_t)0xef95eb2, (q31_t)0xef3213a, (q31_t)0xeece3b9, (q31_t)0xee6a62f,
-  (q31_t)0xee0689b, (q31_t)0xeda2afe, (q31_t)0xed3ed58, (q31_t)0xecdafa9, (q31_t)0xec771f1, (q31_t)0xec1342f, (q31_t)0xebaf665, (q31_t)0xeb4b891,
-  (q31_t)0xeae7ab4, (q31_t)0xea83ccf, (q31_t)0xea1fee0, (q31_t)0xe9bc0e8, (q31_t)0xe9582e7, (q31_t)0xe8f44dd, (q31_t)0xe8906cb, (q31_t)0xe82c8af,
-  (q31_t)0xe7c8a8a, (q31_t)0xe764c5c, (q31_t)0xe700e26, (q31_t)0xe69cfe6, (q31_t)0xe63919e, (q31_t)0xe5d534d, (q31_t)0xe5714f3, (q31_t)0xe50d690,
-  (q31_t)0xe4a9824, (q31_t)0xe4459af, (q31_t)0xe3e1b32, (q31_t)0xe37dcac, (q31_t)0xe319e1d, (q31_t)0xe2b5f85, (q31_t)0xe2520e5, (q31_t)0xe1ee23c,
-  (q31_t)0xe18a38a, (q31_t)0xe1264cf, (q31_t)0xe0c260c, (q31_t)0xe05e740, (q31_t)0xdffa86b, (q31_t)0xdf9698e, (q31_t)0xdf32aa8, (q31_t)0xdecebba,
-  (q31_t)0xde6acc3, (q31_t)0xde06dc3, (q31_t)0xdda2ebb, (q31_t)0xdd3efab, (q31_t)0xdcdb091, (q31_t)0xdc77170, (q31_t)0xdc13245, (q31_t)0xdbaf313,
-  (q31_t)0xdb4b3d7, (q31_t)0xdae7494, (q31_t)0xda83548, (q31_t)0xda1f5f3, (q31_t)0xd9bb696, (q31_t)0xd957731, (q31_t)0xd8f37c3, (q31_t)0xd88f84d,
-  (q31_t)0xd82b8cf, (q31_t)0xd7c7948, (q31_t)0xd7639b9, (q31_t)0xd6ffa22, (q31_t)0xd69ba82, (q31_t)0xd637ada, (q31_t)0xd5d3b2a, (q31_t)0xd56fb71,
-  (q31_t)0xd50bbb1, (q31_t)0xd4a7be8, (q31_t)0xd443c17, (q31_t)0xd3dfc3e, (q31_t)0xd37bc5c, (q31_t)0xd317c73, (q31_t)0xd2b3c81, (q31_t)0xd24fc87,
-  (q31_t)0xd1ebc85, (q31_t)0xd187c7b, (q31_t)0xd123c69, (q31_t)0xd0bfc4f, (q31_t)0xd05bc2d, (q31_t)0xcff7c02, (q31_t)0xcf93bd0, (q31_t)0xcf2fb96,
-  (q31_t)0xcecbb53, (q31_t)0xce67b09, (q31_t)0xce03ab7, (q31_t)0xcd9fa5d, (q31_t)0xcd3b9fb, (q31_t)0xccd7991, (q31_t)0xcc7391f, (q31_t)0xcc0f8a5,
-  (q31_t)0xcbab824, (q31_t)0xcb4779a, (q31_t)0xcae3709, (q31_t)0xca7f670, (q31_t)0xca1b5cf, (q31_t)0xc9b7526, (q31_t)0xc953475, (q31_t)0xc8ef3bd,
-  (q31_t)0xc88b2fd, (q31_t)0xc827235, (q31_t)0xc7c3166, (q31_t)0xc75f08f, (q31_t)0xc6fafb0, (q31_t)0xc696ec9, (q31_t)0xc632ddb, (q31_t)0xc5cece5,
-  (q31_t)0xc56abe8, (q31_t)0xc506ae3, (q31_t)0xc4a29d6, (q31_t)0xc43e8c2, (q31_t)0xc3da7a6, (q31_t)0xc376683, (q31_t)0xc312558, (q31_t)0xc2ae425,
-  (q31_t)0xc24a2eb, (q31_t)0xc1e61aa, (q31_t)0xc182061, (q31_t)0xc11df11, (q31_t)0xc0b9db9, (q31_t)0xc055c5a, (q31_t)0xbff1af3, (q31_t)0xbf8d985,
-  (q31_t)0xbf29810, (q31_t)0xbec5693, (q31_t)0xbe6150f, (q31_t)0xbdfd383, (q31_t)0xbd991f0, (q31_t)0xbd35056, (q31_t)0xbcd0eb5, (q31_t)0xbc6cd0c,
-  (q31_t)0xbc08b5c, (q31_t)0xbba49a5, (q31_t)0xbb407e7, (q31_t)0xbadc621, (q31_t)0xba78454, (q31_t)0xba14280, (q31_t)0xb9b00a5, (q31_t)0xb94bec2,
-  (q31_t)0xb8e7cd9, (q31_t)0xb883ae8, (q31_t)0xb81f8f0, (q31_t)0xb7bb6f2, (q31_t)0xb7574ec, (q31_t)0xb6f32df, (q31_t)0xb68f0cb, (q31_t)0xb62aeaf,
-  (q31_t)0xb5c6c8d, (q31_t)0xb562a64, (q31_t)0xb4fe834, (q31_t)0xb49a5fd, (q31_t)0xb4363bf, (q31_t)0xb3d217a, (q31_t)0xb36df2e, (q31_t)0xb309cdb,
-  (q31_t)0xb2a5a81, (q31_t)0xb241820, (q31_t)0xb1dd5b9, (q31_t)0xb17934b, (q31_t)0xb1150d5, (q31_t)0xb0b0e59, (q31_t)0xb04cbd6, (q31_t)0xafe894d,
-  (q31_t)0xaf846bc, (q31_t)0xaf20425, (q31_t)0xaebc187, (q31_t)0xae57ee2, (q31_t)0xadf3c37, (q31_t)0xad8f985, (q31_t)0xad2b6cc, (q31_t)0xacc740c,
-  (q31_t)0xac63146, (q31_t)0xabfee79, (q31_t)0xab9aba6, (q31_t)0xab368cc, (q31_t)0xaad25eb, (q31_t)0xaa6e304, (q31_t)0xaa0a016, (q31_t)0xa9a5d22,
-  (q31_t)0xa941a27, (q31_t)0xa8dd725, (q31_t)0xa87941d, (q31_t)0xa81510f, (q31_t)0xa7b0dfa, (q31_t)0xa74cadf, (q31_t)0xa6e87bd, (q31_t)0xa684495,
-  (q31_t)0xa620166, (q31_t)0xa5bbe31, (q31_t)0xa557af5, (q31_t)0xa4f37b3, (q31_t)0xa48f46b, (q31_t)0xa42b11d, (q31_t)0xa3c6dc8, (q31_t)0xa362a6d,
-  (q31_t)0xa2fe70b, (q31_t)0xa29a3a3, (q31_t)0xa236035, (q31_t)0xa1d1cc1, (q31_t)0xa16d946, (q31_t)0xa1095c6, (q31_t)0xa0a523f, (q31_t)0xa040eb1,
-  (q31_t)0x9fdcb1e, (q31_t)0x9f78784, (q31_t)0x9f143e5, (q31_t)0x9eb003f, (q31_t)0x9e4bc93, (q31_t)0x9de78e1, (q31_t)0x9d83529, (q31_t)0x9d1f16b,
-  (q31_t)0x9cbada7, (q31_t)0x9c569dc, (q31_t)0x9bf260c, (q31_t)0x9b8e236, (q31_t)0x9b29e59, (q31_t)0x9ac5a77, (q31_t)0x9a6168f, (q31_t)0x99fd2a0,
-  (q31_t)0x9998eac, (q31_t)0x9934ab2, (q31_t)0x98d06b2, (q31_t)0x986c2ac, (q31_t)0x9807ea1, (q31_t)0x97a3a8f, (q31_t)0x973f678, (q31_t)0x96db25a,
-  (q31_t)0x9676e37, (q31_t)0x9612a0e, (q31_t)0x95ae5e0, (q31_t)0x954a1ab, (q31_t)0x94e5d71, (q31_t)0x9481931, (q31_t)0x941d4eb, (q31_t)0x93b90a0,
-  (q31_t)0x9354c4f, (q31_t)0x92f07f8, (q31_t)0x928c39b, (q31_t)0x9227f39, (q31_t)0x91c3ad2, (q31_t)0x915f664, (q31_t)0x90fb1f1, (q31_t)0x9096d79,
-  (q31_t)0x90328fb, (q31_t)0x8fce477, (q31_t)0x8f69fee, (q31_t)0x8f05b5f, (q31_t)0x8ea16cb, (q31_t)0x8e3d231, (q31_t)0x8dd8d92, (q31_t)0x8d748ed,
-  (q31_t)0x8d10443, (q31_t)0x8cabf93, (q31_t)0x8c47ade, (q31_t)0x8be3624, (q31_t)0x8b7f164, (q31_t)0x8b1ac9f, (q31_t)0x8ab67d4, (q31_t)0x8a52304,
-  (q31_t)0x89ede2f, (q31_t)0x8989955, (q31_t)0x8925475, (q31_t)0x88c0f90, (q31_t)0x885caa5, (q31_t)0x87f85b5, (q31_t)0x87940c1, (q31_t)0x872fbc6,
-  (q31_t)0x86cb6c7, (q31_t)0x86671c2, (q31_t)0x8602cb9, (q31_t)0x859e7aa, (q31_t)0x853a296, (q31_t)0x84d5d7d, (q31_t)0x847185e, (q31_t)0x840d33b,
-  (q31_t)0x83a8e12, (q31_t)0x83448e5, (q31_t)0x82e03b2, (q31_t)0x827be7a, (q31_t)0x821793e, (q31_t)0x81b33fc, (q31_t)0x814eeb5, (q31_t)0x80ea969,
-  (q31_t)0x8086419, (q31_t)0x8021ec3, (q31_t)0x7fbd968, (q31_t)0x7f59409, (q31_t)0x7ef4ea4, (q31_t)0x7e9093b, (q31_t)0x7e2c3cd, (q31_t)0x7dc7e5a,
-  (q31_t)0x7d638e2, (q31_t)0x7cff365, (q31_t)0x7c9ade4, (q31_t)0x7c3685d, (q31_t)0x7bd22d2, (q31_t)0x7b6dd42, (q31_t)0x7b097ad, (q31_t)0x7aa5214,
-  (q31_t)0x7a40c76, (q31_t)0x79dc6d3, (q31_t)0x797812b, (q31_t)0x7913b7f, (q31_t)0x78af5ce, (q31_t)0x784b019, (q31_t)0x77e6a5e, (q31_t)0x77824a0,
-  (q31_t)0x771dedc, (q31_t)0x76b9914, (q31_t)0x7655347, (q31_t)0x75f0d76, (q31_t)0x758c7a1, (q31_t)0x75281c6, (q31_t)0x74c3be7, (q31_t)0x745f604,
-  (q31_t)0x73fb01c, (q31_t)0x7396a30, (q31_t)0x733243f, (q31_t)0x72cde4a, (q31_t)0x7269851, (q31_t)0x7205253, (q31_t)0x71a0c50, (q31_t)0x713c64a,
-  (q31_t)0x70d803f, (q31_t)0x7073a2f, (q31_t)0x700f41b, (q31_t)0x6faae03, (q31_t)0x6f467e7, (q31_t)0x6ee21c6, (q31_t)0x6e7dba1, (q31_t)0x6e19578,
-  (q31_t)0x6db4f4a, (q31_t)0x6d50919, (q31_t)0x6cec2e3, (q31_t)0x6c87ca9, (q31_t)0x6c2366a, (q31_t)0x6bbf028, (q31_t)0x6b5a9e1, (q31_t)0x6af6396,
-  (q31_t)0x6a91d47, (q31_t)0x6a2d6f4, (q31_t)0x69c909d, (q31_t)0x6964a42, (q31_t)0x69003e3, (q31_t)0x689bd80, (q31_t)0x6837718, (q31_t)0x67d30ad,
-  (q31_t)0x676ea3d, (q31_t)0x670a3ca, (q31_t)0x66a5d53, (q31_t)0x66416d8, (q31_t)0x65dd058, (q31_t)0x65789d5, (q31_t)0x651434e, (q31_t)0x64afcc3,
-  (q31_t)0x644b634, (q31_t)0x63e6fa2, (q31_t)0x638290b, (q31_t)0x631e271, (q31_t)0x62b9bd3, (q31_t)0x6255531, (q31_t)0x61f0e8b, (q31_t)0x618c7e1,
-  (q31_t)0x6128134, (q31_t)0x60c3a83, (q31_t)0x605f3ce, (q31_t)0x5ffad15, (q31_t)0x5f96659, (q31_t)0x5f31f99, (q31_t)0x5ecd8d6, (q31_t)0x5e6920e,
-  (q31_t)0x5e04b43, (q31_t)0x5da0475, (q31_t)0x5d3bda3, (q31_t)0x5cd76cd, (q31_t)0x5c72ff4, (q31_t)0x5c0e917, (q31_t)0x5baa237, (q31_t)0x5b45b53,
-  (q31_t)0x5ae146b, (q31_t)0x5a7cd80, (q31_t)0x5a18692, (q31_t)0x59b3fa0, (q31_t)0x594f8aa, (q31_t)0x58eb1b2, (q31_t)0x5886ab5, (q31_t)0x58223b6,
-  (q31_t)0x57bdcb3, (q31_t)0x57595ac, (q31_t)0x56f4ea2, (q31_t)0x5690795, (q31_t)0x562c085, (q31_t)0x55c7971, (q31_t)0x556325a, (q31_t)0x54feb3f,
-  (q31_t)0x549a422, (q31_t)0x5435d01, (q31_t)0x53d15dd, (q31_t)0x536ceb5, (q31_t)0x530878a, (q31_t)0x52a405d, (q31_t)0x523f92c, (q31_t)0x51db1f7,
-  (q31_t)0x5176ac0, (q31_t)0x5112385, (q31_t)0x50adc48, (q31_t)0x5049507, (q31_t)0x4fe4dc3, (q31_t)0x4f8067c, (q31_t)0x4f1bf32, (q31_t)0x4eb77e5,
-  (q31_t)0x4e53095, (q31_t)0x4dee942, (q31_t)0x4d8a1ec, (q31_t)0x4d25a93, (q31_t)0x4cc1337, (q31_t)0x4c5cbd8, (q31_t)0x4bf8476, (q31_t)0x4b93d11,
-  (q31_t)0x4b2f5a9, (q31_t)0x4acae3e, (q31_t)0x4a666d1, (q31_t)0x4a01f60, (q31_t)0x499d7ed, (q31_t)0x4939077, (q31_t)0x48d48fe, (q31_t)0x4870182,
-  (q31_t)0x480ba04, (q31_t)0x47a7282, (q31_t)0x4742afe, (q31_t)0x46de377, (q31_t)0x4679bee, (q31_t)0x4615461, (q31_t)0x45b0cd2, (q31_t)0x454c541,
-  (q31_t)0x44e7dac, (q31_t)0x4483615, (q31_t)0x441ee7c, (q31_t)0x43ba6df, (q31_t)0x4355f40, (q31_t)0x42f179f, (q31_t)0x428cffb, (q31_t)0x4228854,
-  (q31_t)0x41c40ab, (q31_t)0x415f8ff, (q31_t)0x40fb151, (q31_t)0x40969a0, (q31_t)0x40321ed, (q31_t)0x3fcda37, (q31_t)0x3f6927f, (q31_t)0x3f04ac4,
-  (q31_t)0x3ea0307, (q31_t)0x3e3bb48, (q31_t)0x3dd7386, (q31_t)0x3d72bc2, (q31_t)0x3d0e3fb, (q31_t)0x3ca9c32, (q31_t)0x3c45467, (q31_t)0x3be0c99,
-  (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba, (q31_t)0x38bcdda,
-  (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680, (q31_t)0x3598e8f,
-  (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1, (q31_t)0x3274ec0,
-  (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684, (q31_t)0x2f50e74,
-  (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2, (q31_t)0x2c2cdb4,
-  (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2, (q31_t)0x2908c87,
-  (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b, (q31_t)0x25e4af4,
-  (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147, (q31_t)0x22c0904,
-  (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b, (q31_t)0x1f9c6be,
-  (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80, (q31_t)0x1c7842a,
-  (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae, (q31_t)0x1954150,
-  (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d, (q31_t)0x162fe37,
-  (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354, (q31_t)0x130bae7,
-  (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb, (q31_t)0xfe7769,
-  (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a, (q31_t)0xcc33c3,
-  (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878, (q31_t)0x99effe,
-  (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e, (q31_t)0x67ac21,
-  (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3, (q31_t)0x356835,
-  (q31_t)0x2f1fb6, (q31_t)0x28d738, (q31_t)0x228eb9, (q31_t)0x1c463b, (q31_t)0x15fdbc, (q31_t)0xfb53d, (q31_t)0x96cbe, (q31_t)0x3243f
-};
-  #endif
-
-/**
-  @} end of DCT4_IDCT4_Table group
- */
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
-/**
-  @brief  Q15 table for reciprocal
-*/
-const q15_t __ALIGNED(4) armRecipTableQ15[64] = {
- 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
- 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
- 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
- 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
- 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
- 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
- 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
- 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
- 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
- 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
- 0x41CC, 0x4146, 0x40C2, 0x4040
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
-
-/**
-  @brief  Q31 table for reciprocal
-*/
-const q31_t armRecipTableQ31[64] = {
-  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
-  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
-  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
-  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
-  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
-  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
-  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
-  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
-  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
-  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
-  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
-};
-
-#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
-/**
-  @par
-  Example code for the generation of the floating-point sine table:
-  <pre>
-  tableSize = 512;
-  for (n = 0; n < (tableSize + 1); n++)
-  {
- 	sinTable[n] = sin(2*PI*n/tableSize);
-  }</pre>
- @par
-  where PI value is  3.14159265358979
- */
-const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = {
-   0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f,
-   0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f,
-   0.14673047f, 0.15885814f, 0.17096189f, 0.18303989f, 0.19509032f, 0.20711138f,
-   0.21910124f, 0.23105811f, 0.24298018f, 0.25486566f, 0.26671276f, 0.27851969f,
-   0.29028468f, 0.30200595f, 0.31368174f, 0.32531029f, 0.33688985f, 0.34841868f,
-   0.35989504f, 0.37131719f, 0.38268343f, 0.39399204f, 0.40524131f, 0.41642956f,
-   0.42755509f, 0.43861624f, 0.44961133f, 0.46053871f, 0.47139674f, 0.48218377f,
-   0.49289819f, 0.50353838f, 0.51410274f, 0.52458968f, 0.53499762f, 0.54532499f,
-   0.55557023f, 0.56573181f, 0.57580819f, 0.58579786f, 0.59569930f, 0.60551104f,
-   0.61523159f, 0.62485949f, 0.63439328f, 0.64383154f, 0.65317284f, 0.66241578f,
-   0.67155895f, 0.68060100f, 0.68954054f, 0.69837625f, 0.70710678f, 0.71573083f,
-   0.72424708f, 0.73265427f, 0.74095113f, 0.74913639f, 0.75720885f, 0.76516727f,
-   0.77301045f, 0.78073723f, 0.78834643f, 0.79583690f, 0.80320753f, 0.81045720f,
-   0.81758481f, 0.82458930f, 0.83146961f, 0.83822471f, 0.84485357f, 0.85135519f,
-   0.85772861f, 0.86397286f, 0.87008699f, 0.87607009f, 0.88192126f, 0.88763962f,
-   0.89322430f, 0.89867447f, 0.90398929f, 0.90916798f, 0.91420976f, 0.91911385f,
-   0.92387953f, 0.92850608f, 0.93299280f, 0.93733901f, 0.94154407f, 0.94560733f,
-   0.94952818f, 0.95330604f, 0.95694034f, 0.96043052f, 0.96377607f, 0.96697647f,
-   0.97003125f, 0.97293995f, 0.97570213f, 0.97831737f, 0.98078528f, 0.98310549f,
-   0.98527764f, 0.98730142f, 0.98917651f, 0.99090264f, 0.99247953f, 0.99390697f,
-   0.99518473f, 0.99631261f, 0.99729046f, 0.99811811f, 0.99879546f, 0.99932238f,
-   0.99969882f, 0.99992470f, 1.00000000f, 0.99992470f, 0.99969882f, 0.99932238f,
-   0.99879546f, 0.99811811f, 0.99729046f, 0.99631261f, 0.99518473f, 0.99390697f,
-   0.99247953f, 0.99090264f, 0.98917651f, 0.98730142f, 0.98527764f, 0.98310549f,
-   0.98078528f, 0.97831737f, 0.97570213f, 0.97293995f, 0.97003125f, 0.96697647f,
-   0.96377607f, 0.96043052f, 0.95694034f, 0.95330604f, 0.94952818f, 0.94560733f,
-   0.94154407f, 0.93733901f, 0.93299280f, 0.92850608f, 0.92387953f, 0.91911385f,
-   0.91420976f, 0.90916798f, 0.90398929f, 0.89867447f, 0.89322430f, 0.88763962f,
-   0.88192126f, 0.87607009f, 0.87008699f, 0.86397286f, 0.85772861f, 0.85135519f,
-   0.84485357f, 0.83822471f, 0.83146961f, 0.82458930f, 0.81758481f, 0.81045720f,
-   0.80320753f, 0.79583690f, 0.78834643f, 0.78073723f, 0.77301045f, 0.76516727f,
-   0.75720885f, 0.74913639f, 0.74095113f, 0.73265427f, 0.72424708f, 0.71573083f,
-   0.70710678f, 0.69837625f, 0.68954054f, 0.68060100f, 0.67155895f, 0.66241578f,
-   0.65317284f, 0.64383154f, 0.63439328f, 0.62485949f, 0.61523159f, 0.60551104f,
-   0.59569930f, 0.58579786f, 0.57580819f, 0.56573181f, 0.55557023f, 0.54532499f,
-   0.53499762f, 0.52458968f, 0.51410274f, 0.50353838f, 0.49289819f, 0.48218377f,
-   0.47139674f, 0.46053871f, 0.44961133f, 0.43861624f, 0.42755509f, 0.41642956f,
-   0.40524131f, 0.39399204f, 0.38268343f, 0.37131719f, 0.35989504f, 0.34841868f,
-   0.33688985f, 0.32531029f, 0.31368174f, 0.30200595f, 0.29028468f, 0.27851969f,
-   0.26671276f, 0.25486566f, 0.24298018f, 0.23105811f, 0.21910124f, 0.20711138f,
-   0.19509032f, 0.18303989f, 0.17096189f, 0.15885814f, 0.14673047f, 0.13458071f,
-   0.12241068f, 0.11022221f, 0.09801714f, 0.08579731f, 0.07356456f, 0.06132074f,
-   0.04906767f, 0.03680722f, 0.02454123f, 0.01227154f, 0.00000000f, -0.01227154f,
-   -0.02454123f, -0.03680722f, -0.04906767f, -0.06132074f, -0.07356456f,
-   -0.08579731f, -0.09801714f, -0.11022221f, -0.12241068f, -0.13458071f,
-   -0.14673047f, -0.15885814f, -0.17096189f, -0.18303989f, -0.19509032f,
-   -0.20711138f, -0.21910124f, -0.23105811f, -0.24298018f, -0.25486566f,
-   -0.26671276f, -0.27851969f, -0.29028468f, -0.30200595f, -0.31368174f,
-   -0.32531029f, -0.33688985f, -0.34841868f, -0.35989504f, -0.37131719f,
-   -0.38268343f, -0.39399204f, -0.40524131f, -0.41642956f, -0.42755509f,
-   -0.43861624f, -0.44961133f, -0.46053871f, -0.47139674f, -0.48218377f,
-   -0.49289819f, -0.50353838f, -0.51410274f, -0.52458968f, -0.53499762f,
-   -0.54532499f, -0.55557023f, -0.56573181f, -0.57580819f, -0.58579786f,
-   -0.59569930f, -0.60551104f, -0.61523159f, -0.62485949f, -0.63439328f,
-   -0.64383154f, -0.65317284f, -0.66241578f, -0.67155895f, -0.68060100f,
-   -0.68954054f, -0.69837625f, -0.70710678f, -0.71573083f, -0.72424708f,
-   -0.73265427f, -0.74095113f, -0.74913639f, -0.75720885f, -0.76516727f,
-   -0.77301045f, -0.78073723f, -0.78834643f, -0.79583690f, -0.80320753f,
-   -0.81045720f, -0.81758481f, -0.82458930f, -0.83146961f, -0.83822471f,
-   -0.84485357f, -0.85135519f, -0.85772861f, -0.86397286f, -0.87008699f,
-   -0.87607009f, -0.88192126f, -0.88763962f, -0.89322430f, -0.89867447f,
-   -0.90398929f, -0.90916798f, -0.91420976f, -0.91911385f, -0.92387953f,
-   -0.92850608f, -0.93299280f, -0.93733901f, -0.94154407f, -0.94560733f,
-   -0.94952818f, -0.95330604f, -0.95694034f, -0.96043052f, -0.96377607f,
-   -0.96697647f, -0.97003125f, -0.97293995f, -0.97570213f, -0.97831737f,
-   -0.98078528f, -0.98310549f, -0.98527764f, -0.98730142f, -0.98917651f,
-   -0.99090264f, -0.99247953f, -0.99390697f, -0.99518473f, -0.99631261f,
-   -0.99729046f, -0.99811811f, -0.99879546f, -0.99932238f, -0.99969882f,
-   -0.99992470f, -1.00000000f, -0.99992470f, -0.99969882f, -0.99932238f,
-   -0.99879546f, -0.99811811f, -0.99729046f, -0.99631261f, -0.99518473f,
-   -0.99390697f, -0.99247953f, -0.99090264f, -0.98917651f, -0.98730142f,
-   -0.98527764f, -0.98310549f, -0.98078528f, -0.97831737f, -0.97570213f,
-   -0.97293995f, -0.97003125f, -0.96697647f, -0.96377607f, -0.96043052f,
-   -0.95694034f, -0.95330604f, -0.94952818f, -0.94560733f, -0.94154407f,
-   -0.93733901f, -0.93299280f, -0.92850608f, -0.92387953f, -0.91911385f,
-   -0.91420976f, -0.90916798f, -0.90398929f, -0.89867447f, -0.89322430f,
-   -0.88763962f, -0.88192126f, -0.87607009f, -0.87008699f, -0.86397286f,
-   -0.85772861f, -0.85135519f, -0.84485357f, -0.83822471f, -0.83146961f,
-   -0.82458930f, -0.81758481f, -0.81045720f, -0.80320753f, -0.79583690f,
-   -0.78834643f, -0.78073723f, -0.77301045f, -0.76516727f, -0.75720885f,
-   -0.74913639f, -0.74095113f, -0.73265427f, -0.72424708f, -0.71573083f,
-   -0.70710678f, -0.69837625f, -0.68954054f, -0.68060100f, -0.67155895f,
-   -0.66241578f, -0.65317284f, -0.64383154f, -0.63439328f, -0.62485949f,
-   -0.61523159f, -0.60551104f, -0.59569930f, -0.58579786f, -0.57580819f,
-   -0.56573181f, -0.55557023f, -0.54532499f, -0.53499762f, -0.52458968f,
-   -0.51410274f, -0.50353838f, -0.49289819f, -0.48218377f, -0.47139674f,
-   -0.46053871f, -0.44961133f, -0.43861624f, -0.42755509f, -0.41642956f,
-   -0.40524131f, -0.39399204f, -0.38268343f, -0.37131719f, -0.35989504f,
-   -0.34841868f, -0.33688985f, -0.32531029f, -0.31368174f, -0.30200595f,
-   -0.29028468f, -0.27851969f, -0.26671276f, -0.25486566f, -0.24298018f,
-   -0.23105811f, -0.21910124f, -0.20711138f, -0.19509032f, -0.18303989f,
-   -0.17096189f, -0.15885814f, -0.14673047f, -0.13458071f, -0.12241068f,
-   -0.11022221f, -0.09801714f, -0.08579731f, -0.07356456f, -0.06132074f,
-   -0.04906767f, -0.03680722f, -0.02454123f, -0.01227154f, -0.00000000f
-};
-#endif /* defined(ARM_ALL_FAST_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
-/**
-  @par
-  Table values are in Q31 (1.31 fixed-point format) and generation is done in
-  three steps.  First, generate sin values in floating point:
-  <pre>
-  tableSize = 512;
-  for (n = 0; n < (tableSize + 1); n++)
-  {
- 	sinTable[n] = sin(2*PI*n/tableSize);
-  } </pre>
-  where PI value is 3.14159265358979
- @par
-  Second, convert floating-point to Q31 (Fixed point):
- 	(sinTable[i] * pow(2, 31))
- @par
-  Finally, round to the nearest integer value:
-  	sinTable[i] += (sinTable[i] > 0 ? 0.5 : -0.5);
- */
-const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = {
-	0L, 26352928L, 52701887L, 79042909L, 105372028L, 131685278L, 157978697L,
-	184248325L, 210490206L, 236700388L, 262874923L, 289009871L, 315101295L,
-	341145265L, 367137861L, 393075166L, 418953276L, 444768294L, 470516330L,
-	496193509L, 521795963L, 547319836L, 572761285L, 598116479L, 623381598L,
-	648552838L, 673626408L, 698598533L, 723465451L, 748223418L, 772868706L,
-	797397602L, 821806413L, 846091463L, 870249095L, 894275671L, 918167572L,
-	941921200L, 965532978L, 988999351L, 1012316784L, 1035481766L, 1058490808L,
-	1081340445L, 1104027237L, 1126547765L, 1148898640L, 1171076495L, 1193077991L,
-	1214899813L, 1236538675L, 1257991320L, 1279254516L, 1300325060L, 1321199781L,
-	1341875533L, 1362349204L, 1382617710L, 1402678000L, 1422527051L, 1442161874L,
-	1461579514L, 1480777044L, 1499751576L, 1518500250L, 1537020244L, 1555308768L,
-	1573363068L, 1591180426L, 1608758157L, 1626093616L, 1643184191L, 1660027308L,
-	1676620432L, 1692961062L, 1709046739L, 1724875040L, 1740443581L, 1755750017L,
-	1770792044L, 1785567396L, 1800073849L, 1814309216L, 1828271356L, 1841958164L,
-	1855367581L, 1868497586L, 1881346202L, 1893911494L, 1906191570L, 1918184581L,
-	1929888720L, 1941302225L, 1952423377L, 1963250501L, 1973781967L, 1984016189L,
-	1993951625L, 2003586779L, 2012920201L, 2021950484L, 2030676269L, 2039096241L,
-	2047209133L, 2055013723L, 2062508835L, 2069693342L, 2076566160L, 2083126254L,
-	2089372638L, 2095304370L, 2100920556L, 2106220352L, 2111202959L, 2115867626L,
-	2120213651L, 2124240380L, 2127947206L, 2131333572L, 2134398966L, 2137142927L,
-	2139565043L, 2141664948L, 2143442326L, 2144896910L, 2146028480L, 2146836866L,
-	2147321946L, 2147483647L, 2147321946L, 2146836866L, 2146028480L, 2144896910L,
-	2143442326L, 2141664948L, 2139565043L, 2137142927L, 2134398966L, 2131333572L,
-	2127947206L, 2124240380L, 2120213651L, 2115867626L, 2111202959L, 2106220352L,
-	2100920556L, 2095304370L, 2089372638L, 2083126254L, 2076566160L, 2069693342L,
-	2062508835L, 2055013723L, 2047209133L, 2039096241L, 2030676269L, 2021950484L,
-	2012920201L, 2003586779L, 1993951625L, 1984016189L, 1973781967L, 1963250501L,
-	1952423377L, 1941302225L, 1929888720L, 1918184581L, 1906191570L, 1893911494L,
-	1881346202L, 1868497586L, 1855367581L, 1841958164L, 1828271356L, 1814309216L,
-	1800073849L, 1785567396L, 1770792044L, 1755750017L, 1740443581L, 1724875040L,
-	1709046739L, 1692961062L, 1676620432L, 1660027308L, 1643184191L, 1626093616L,
-	1608758157L, 1591180426L, 1573363068L, 1555308768L, 1537020244L, 1518500250L,
-	1499751576L, 1480777044L, 1461579514L, 1442161874L, 1422527051L, 1402678000L,
-	1382617710L, 1362349204L, 1341875533L, 1321199781L, 1300325060L, 1279254516L,
-	1257991320L, 1236538675L, 1214899813L, 1193077991L, 1171076495L, 1148898640L,
-	1126547765L, 1104027237L, 1081340445L, 1058490808L, 1035481766L, 1012316784L,
-	988999351L, 965532978L, 941921200L, 918167572L, 894275671L, 870249095L,
-	846091463L, 821806413L, 797397602L, 772868706L, 748223418L, 723465451L,
-	698598533L, 673626408L, 648552838L, 623381598L, 598116479L, 572761285L,
-	547319836L, 521795963L, 496193509L, 470516330L, 444768294L, 418953276L,
-	393075166L, 367137861L, 341145265L, 315101295L, 289009871L, 262874923L,
-	236700388L, 210490206L, 184248325L, 157978697L, 131685278L, 105372028L,
-	79042909L, 52701887L, 26352928L, 0L, -26352928L, -52701887L, -79042909L,
-	-105372028L, -131685278L, -157978697L, -184248325L, -210490206L, -236700388L,
-	-262874923L, -289009871L, -315101295L, -341145265L, -367137861L, -393075166L,
-	-418953276L, -444768294L, -470516330L, -496193509L, -521795963L, -547319836L,
-	-572761285L, -598116479L, -623381598L, -648552838L, -673626408L, -698598533L,
-	-723465451L, -748223418L, -772868706L, -797397602L, -821806413L, -846091463L,
-	-870249095L, -894275671L, -918167572L, -941921200L, -965532978L, -988999351L,
-	-1012316784L, -1035481766L, -1058490808L, -1081340445L, -1104027237L,
-	-1126547765L, -1148898640L, -1171076495L, -1193077991L, -1214899813L,
-	-1236538675L, -1257991320L, -1279254516L, -1300325060L, -1321199781L,
-	-1341875533L, -1362349204L, -1382617710L, -1402678000L, -1422527051L,
-	-1442161874L, -1461579514L, -1480777044L, -1499751576L, -1518500250L,
-	-1537020244L, -1555308768L, -1573363068L, -1591180426L, -1608758157L,
-	-1626093616L, -1643184191L, -1660027308L, -1676620432L, -1692961062L,
-	-1709046739L, -1724875040L, -1740443581L, -1755750017L, -1770792044L,
-	-1785567396L, -1800073849L, -1814309216L, -1828271356L, -1841958164L,
-	-1855367581L, -1868497586L, -1881346202L, -1893911494L, -1906191570L,
-	-1918184581L, -1929888720L, -1941302225L, -1952423377L, -1963250501L,
-	-1973781967L, -1984016189L, -1993951625L, -2003586779L, -2012920201L,
-	-2021950484L, -2030676269L, -2039096241L, -2047209133L, -2055013723L,
-	-2062508835L, -2069693342L, -2076566160L, -2083126254L, -2089372638L,
-	-2095304370L, -2100920556L, -2106220352L, -2111202959L, -2115867626L,
-	-2120213651L, -2124240380L, -2127947206L, -2131333572L, -2134398966L,
-	-2137142927L, -2139565043L, -2141664948L, -2143442326L, -2144896910L,
-	-2146028480L, -2146836866L, -2147321946L, (q31_t)0x80000000, -2147321946L,
-	-2146836866L, -2146028480L, -2144896910L, -2143442326L, -2141664948L,
-	-2139565043L, -2137142927L, -2134398966L, -2131333572L, -2127947206L,
-	-2124240380L, -2120213651L, -2115867626L, -2111202959L, -2106220352L,
-	-2100920556L, -2095304370L, -2089372638L, -2083126254L, -2076566160L,
-	-2069693342L, -2062508835L, -2055013723L, -2047209133L, -2039096241L,
-	-2030676269L, -2021950484L, -2012920201L, -2003586779L, -1993951625L,
-	-1984016189L, -1973781967L, -1963250501L, -1952423377L, -1941302225L,
-	-1929888720L, -1918184581L, -1906191570L, -1893911494L, -1881346202L,
-	-1868497586L, -1855367581L, -1841958164L, -1828271356L, -1814309216L,
-	-1800073849L, -1785567396L, -1770792044L, -1755750017L, -1740443581L,
-	-1724875040L, -1709046739L, -1692961062L, -1676620432L, -1660027308L,
-	-1643184191L, -1626093616L, -1608758157L, -1591180426L, -1573363068L,
-	-1555308768L, -1537020244L, -1518500250L, -1499751576L, -1480777044L,
-	-1461579514L, -1442161874L, -1422527051L, -1402678000L, -1382617710L,
-	-1362349204L, -1341875533L, -1321199781L, -1300325060L, -1279254516L,
-	-1257991320L, -1236538675L, -1214899813L, -1193077991L, -1171076495L,
-	-1148898640L, -1126547765L, -1104027237L, -1081340445L, -1058490808L,
-	-1035481766L, -1012316784L, -988999351L, -965532978L, -941921200L,
-	-918167572L, -894275671L, -870249095L, -846091463L, -821806413L, -797397602L,
-	-772868706L, -748223418L, -723465451L, -698598533L, -673626408L, -648552838L,
-	-623381598L, -598116479L, -572761285L, -547319836L, -521795963L, -496193509L,
-	-470516330L, -444768294L, -418953276L, -393075166L, -367137861L, -341145265L,
-	-315101295L, -289009871L, -262874923L, -236700388L, -210490206L, -184248325L,
-	-157978697L, -131685278L, -105372028L, -79042909L, -52701887L, -26352928L, 0
-};
-
-#endif /* defined(ARM_ALL_FAST_TABLES) */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
-/**
-  @par
-  Table values are in Q15 (1.15 fixed-point format) and generation is done in
-  three steps.  First,  generate sin values in floating point:
-  <pre>
-  tableSize = 512;
-  for (n = 0; n < (tableSize + 1); n++)
-  {
- 	sinTable[n] = sin(2*PI*n/tableSize);
-  } </pre>
-  where PI value is  3.14159265358979
- @par
-  Second, convert floating-point to Q15 (Fixed point):
- 	(sinTable[i] * pow(2, 15))
- @par
-  Finally, round to the nearest integer value:
-  	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
- */
-const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = {
-	0, 402, 804, 1206, 1608, 2009, 2411, 2811, 3212, 3612, 4011, 4410, 4808,
-	5205, 5602, 5998, 6393, 6787, 7180, 7571, 7962, 8351, 8740, 9127, 9512,
-	9896, 10279, 10660, 11039, 11417, 11793, 12167, 12540, 12910, 13279,
-	13646, 14010, 14373, 14733, 15091, 15447, 15800, 16151, 16500, 16846,
-	17190, 17531, 17869, 18205, 18538, 18868, 19195, 19520, 19841, 20160,
-	20475, 20788, 21097, 21403, 21706, 22006, 22302, 22595, 22884, 23170,
-	23453, 23732, 24008, 24279, 24548, 24812, 25073, 25330, 25583, 25833,
-	26078, 26320, 26557, 26791, 27020, 27246, 27467, 27684, 27897, 28106,
-	28311, 28511, 28707, 28899, 29086, 29269, 29448, 29622, 29792, 29957,
-	30118, 30274, 30425, 30572, 30715, 30853, 30986, 31114, 31238, 31357,
-	31471, 31581, 31686, 31786, 31881, 31972, 32058, 32138, 32214, 32286,
-	32352, 32413, 32470, 32522, 32568, 32610, 32647, 32679, 32706, 32729,
-	32746, 32758, 32766, 32767, 32766, 32758, 32746, 32729, 32706, 32679,
-	32647, 32610, 32568, 32522, 32470, 32413, 32352, 32286, 32214, 32138,
-	32058, 31972, 31881, 31786, 31686, 31581, 31471, 31357, 31238, 31114,
-	30986, 30853, 30715, 30572, 30425, 30274, 30118, 29957, 29792, 29622,
-	29448, 29269, 29086, 28899, 28707, 28511, 28311, 28106, 27897, 27684,
-	27467, 27246, 27020, 26791, 26557, 26320, 26078, 25833, 25583, 25330,
-	25073, 24812, 24548, 24279, 24008, 23732, 23453, 23170, 22884, 22595,
-	22302, 22006, 21706, 21403, 21097, 20788, 20475, 20160, 19841, 19520,
-	19195, 18868, 18538, 18205, 17869, 17531, 17190, 16846, 16500, 16151,
-	15800, 15447, 15091, 14733, 14373, 14010, 13646, 13279, 12910, 12540,
-	12167, 11793, 11417, 11039, 10660, 10279, 9896, 9512, 9127, 8740, 8351,
-	7962, 7571, 7180, 6787, 6393, 5998, 5602, 5205, 4808, 4410, 4011, 3612,
-	3212, 2811, 2411, 2009, 1608, 1206, 804, 402, 0, -402, -804, -1206,
-	-1608, -2009, -2411, -2811, -3212, -3612, -4011, -4410, -4808, -5205,
-	-5602, -5998, -6393, -6787, -7180, -7571, -7962, -8351, -8740, -9127,
-	-9512, -9896, -10279, -10660, -11039, -11417, -11793, -12167, -12540,
-	-12910, -13279, -13646, -14010, -14373, -14733, -15091, -15447, -15800,
-	-16151, -16500, -16846, -17190, -17531, -17869, -18205, -18538, -18868,
-	-19195, -19520, -19841, -20160, -20475, -20788, -21097, -21403, -21706,
-	-22006, -22302, -22595, -22884, -23170, -23453, -23732, -24008, -24279,
-	-24548, -24812, -25073, -25330, -25583, -25833, -26078, -26320, -26557,
-	-26791, -27020, -27246, -27467, -27684, -27897, -28106, -28311, -28511,
-	-28707, -28899, -29086, -29269, -29448, -29622, -29792, -29957, -30118,
-	-30274, -30425, -30572, -30715, -30853, -30986, -31114, -31238, -31357,
-	-31471, -31581, -31686, -31786, -31881, -31972, -32058, -32138, -32214,
-	-32286, -32352, -32413, -32470, -32522, -32568, -32610, -32647, -32679,
-	-32706, -32729, -32746, -32758, -32766, -32768, -32766, -32758, -32746,
-	-32729, -32706, -32679, -32647, -32610, -32568, -32522, -32470, -32413,
-	-32352, -32286, -32214, -32138, -32058, -31972, -31881, -31786, -31686,
-	-31581, -31471, -31357, -31238, -31114, -30986, -30853, -30715, -30572,
-	-30425, -30274, -30118, -29957, -29792, -29622, -29448, -29269, -29086,
-	-28899, -28707, -28511, -28311, -28106, -27897, -27684, -27467, -27246,
-	-27020, -26791, -26557, -26320, -26078, -25833, -25583, -25330, -25073,
-	-24812, -24548, -24279, -24008, -23732, -23453, -23170, -22884, -22595,
-	-22302, -22006, -21706, -21403, -21097, -20788, -20475, -20160, -19841,
-	-19520, -19195, -18868, -18538, -18205, -17869, -17531, -17190, -16846,
-	-16500, -16151, -15800, -15447, -15091, -14733, -14373, -14010, -13646,
-	-13279, -12910, -12540, -12167, -11793, -11417, -11039, -10660, -10279,
-	-9896, -9512, -9127, -8740, -8351, -7962, -7571, -7180, -6787, -6393,
-	-5998, -5602, -5205, -4808, -4410, -4011, -3612, -3212, -2811, -2411,
-	-2009, -1608, -1206, -804, -402, 0
-};
-#endif /* defined(ARM_ALL_FAST_TABLES) */
-
-#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_TABLES) */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables.c
+ * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math_types.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup ComplexFFT
+ */
+
+/**
+  @addtogroup CFFT_CIFFT Complex FFT Tables
+  @{
+ */
+
+/**
+  @par
+  Pseudo code for Generation of Bit reversal Table is
+  @par
+  <pre>for (l = 1; l <= N/4; l++)
+  {
+    for (i = 0; i< logN2; i++)
+    {
+      a[i] = l & (1 << i);
+    }
+    for (j = 0; j < logN2; j++)
+    {
+      if (a[j] != 0)
+      y[l] += (1 << ((logN2 - 1) - j));
+    }
+    y[l] = y[l] >> 1;
+   } </pre>
+  @par
+  where N = 4096, logN2 = 12
+  @par
+  N is the maximum FFT Size supported
+*/
+
+/**
+  @brief  Table for bit reversal process
+*/
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+const uint16_t armBitRevTable[1024] = {
+   0x400, 0x200, 0x600, 0x100, 0x500, 0x300, 0x700, 0x080, 0x480, 0x280,
+   0x680, 0x180, 0x580, 0x380, 0x780, 0x040, 0x440, 0x240, 0x640, 0x140,
+   0x540, 0x340, 0x740, 0x0c0, 0x4c0, 0x2c0, 0x6c0, 0x1c0, 0x5c0, 0x3c0,
+   0x7c0, 0x020, 0x420, 0x220, 0x620, 0x120, 0x520, 0x320, 0x720, 0x0a0,
+   0x4a0, 0x2a0, 0x6a0, 0x1a0, 0x5a0, 0x3a0, 0x7a0, 0x060, 0x460, 0x260,
+   0x660, 0x160, 0x560, 0x360, 0x760, 0x0e0, 0x4e0, 0x2e0, 0x6e0, 0x1e0,
+   0x5e0, 0x3e0, 0x7e0, 0x010, 0x410, 0x210, 0x610, 0x110, 0x510, 0x310,
+   0x710, 0x090, 0x490, 0x290, 0x690, 0x190, 0x590, 0x390, 0x790, 0x050,
+   0x450, 0x250, 0x650, 0x150, 0x550, 0x350, 0x750, 0x0d0, 0x4d0, 0x2d0,
+   0x6d0, 0x1d0, 0x5d0, 0x3d0, 0x7d0, 0x030, 0x430, 0x230, 0x630, 0x130,
+   0x530, 0x330, 0x730, 0x0b0, 0x4b0, 0x2b0, 0x6b0, 0x1b0, 0x5b0, 0x3b0,
+   0x7b0, 0x070, 0x470, 0x270, 0x670, 0x170, 0x570, 0x370, 0x770, 0x0f0,
+   0x4f0, 0x2f0, 0x6f0, 0x1f0, 0x5f0, 0x3f0, 0x7f0, 0x008, 0x408, 0x208,
+   0x608, 0x108, 0x508, 0x308, 0x708, 0x088, 0x488, 0x288, 0x688, 0x188,
+   0x588, 0x388, 0x788, 0x048, 0x448, 0x248, 0x648, 0x148, 0x548, 0x348,
+   0x748, 0x0c8, 0x4c8, 0x2c8, 0x6c8, 0x1c8, 0x5c8, 0x3c8, 0x7c8, 0x028,
+   0x428, 0x228, 0x628, 0x128, 0x528, 0x328, 0x728, 0x0a8, 0x4a8, 0x2a8,
+   0x6a8, 0x1a8, 0x5a8, 0x3a8, 0x7a8, 0x068, 0x468, 0x268, 0x668, 0x168,
+   0x568, 0x368, 0x768, 0x0e8, 0x4e8, 0x2e8, 0x6e8, 0x1e8, 0x5e8, 0x3e8,
+   0x7e8, 0x018, 0x418, 0x218, 0x618, 0x118, 0x518, 0x318, 0x718, 0x098,
+   0x498, 0x298, 0x698, 0x198, 0x598, 0x398, 0x798, 0x058, 0x458, 0x258,
+   0x658, 0x158, 0x558, 0x358, 0x758, 0x0d8, 0x4d8, 0x2d8, 0x6d8, 0x1d8,
+   0x5d8, 0x3d8, 0x7d8, 0x038, 0x438, 0x238, 0x638, 0x138, 0x538, 0x338,
+   0x738, 0x0b8, 0x4b8, 0x2b8, 0x6b8, 0x1b8, 0x5b8, 0x3b8, 0x7b8, 0x078,
+   0x478, 0x278, 0x678, 0x178, 0x578, 0x378, 0x778, 0x0f8, 0x4f8, 0x2f8,
+   0x6f8, 0x1f8, 0x5f8, 0x3f8, 0x7f8, 0x004, 0x404, 0x204, 0x604, 0x104,
+   0x504, 0x304, 0x704, 0x084, 0x484, 0x284, 0x684, 0x184, 0x584, 0x384,
+   0x784, 0x044, 0x444, 0x244, 0x644, 0x144, 0x544, 0x344, 0x744, 0x0c4,
+   0x4c4, 0x2c4, 0x6c4, 0x1c4, 0x5c4, 0x3c4, 0x7c4, 0x024, 0x424, 0x224,
+   0x624, 0x124, 0x524, 0x324, 0x724, 0x0a4, 0x4a4, 0x2a4, 0x6a4, 0x1a4,
+   0x5a4, 0x3a4, 0x7a4, 0x064, 0x464, 0x264, 0x664, 0x164, 0x564, 0x364,
+   0x764, 0x0e4, 0x4e4, 0x2e4, 0x6e4, 0x1e4, 0x5e4, 0x3e4, 0x7e4, 0x014,
+   0x414, 0x214, 0x614, 0x114, 0x514, 0x314, 0x714, 0x094, 0x494, 0x294,
+   0x694, 0x194, 0x594, 0x394, 0x794, 0x054, 0x454, 0x254, 0x654, 0x154,
+   0x554, 0x354, 0x754, 0x0d4, 0x4d4, 0x2d4, 0x6d4, 0x1d4, 0x5d4, 0x3d4,
+   0x7d4, 0x034, 0x434, 0x234, 0x634, 0x134, 0x534, 0x334, 0x734, 0x0b4,
+   0x4b4, 0x2b4, 0x6b4, 0x1b4, 0x5b4, 0x3b4, 0x7b4, 0x074, 0x474, 0x274,
+   0x674, 0x174, 0x574, 0x374, 0x774, 0x0f4, 0x4f4, 0x2f4, 0x6f4, 0x1f4,
+   0x5f4, 0x3f4, 0x7f4, 0x00c, 0x40c, 0x20c, 0x60c, 0x10c, 0x50c, 0x30c,
+   0x70c, 0x08c, 0x48c, 0x28c, 0x68c, 0x18c, 0x58c, 0x38c, 0x78c, 0x04c,
+   0x44c, 0x24c, 0x64c, 0x14c, 0x54c, 0x34c, 0x74c, 0x0cc, 0x4cc, 0x2cc,
+   0x6cc, 0x1cc, 0x5cc, 0x3cc, 0x7cc, 0x02c, 0x42c, 0x22c, 0x62c, 0x12c,
+   0x52c, 0x32c, 0x72c, 0x0ac, 0x4ac, 0x2ac, 0x6ac, 0x1ac, 0x5ac, 0x3ac,
+   0x7ac, 0x06c, 0x46c, 0x26c, 0x66c, 0x16c, 0x56c, 0x36c, 0x76c, 0x0ec,
+   0x4ec, 0x2ec, 0x6ec, 0x1ec, 0x5ec, 0x3ec, 0x7ec, 0x01c, 0x41c, 0x21c,
+   0x61c, 0x11c, 0x51c, 0x31c, 0x71c, 0x09c, 0x49c, 0x29c, 0x69c, 0x19c,
+   0x59c, 0x39c, 0x79c, 0x05c, 0x45c, 0x25c, 0x65c, 0x15c, 0x55c, 0x35c,
+   0x75c, 0x0dc, 0x4dc, 0x2dc, 0x6dc, 0x1dc, 0x5dc, 0x3dc, 0x7dc, 0x03c,
+   0x43c, 0x23c, 0x63c, 0x13c, 0x53c, 0x33c, 0x73c, 0x0bc, 0x4bc, 0x2bc,
+   0x6bc, 0x1bc, 0x5bc, 0x3bc, 0x7bc, 0x07c, 0x47c, 0x27c, 0x67c, 0x17c,
+   0x57c, 0x37c, 0x77c, 0x0fc, 0x4fc, 0x2fc, 0x6fc, 0x1fc, 0x5fc, 0x3fc,
+   0x7fc, 0x002, 0x402, 0x202, 0x602, 0x102, 0x502, 0x302, 0x702, 0x082,
+   0x482, 0x282, 0x682, 0x182, 0x582, 0x382, 0x782, 0x042, 0x442, 0x242,
+   0x642, 0x142, 0x542, 0x342, 0x742, 0x0c2, 0x4c2, 0x2c2, 0x6c2, 0x1c2,
+   0x5c2, 0x3c2, 0x7c2, 0x022, 0x422, 0x222, 0x622, 0x122, 0x522, 0x322,
+   0x722, 0x0a2, 0x4a2, 0x2a2, 0x6a2, 0x1a2, 0x5a2, 0x3a2, 0x7a2, 0x062,
+   0x462, 0x262, 0x662, 0x162, 0x562, 0x362, 0x762, 0x0e2, 0x4e2, 0x2e2,
+   0x6e2, 0x1e2, 0x5e2, 0x3e2, 0x7e2, 0x012, 0x412, 0x212, 0x612, 0x112,
+   0x512, 0x312, 0x712, 0x092, 0x492, 0x292, 0x692, 0x192, 0x592, 0x392,
+   0x792, 0x052, 0x452, 0x252, 0x652, 0x152, 0x552, 0x352, 0x752, 0x0d2,
+   0x4d2, 0x2d2, 0x6d2, 0x1d2, 0x5d2, 0x3d2, 0x7d2, 0x032, 0x432, 0x232,
+   0x632, 0x132, 0x532, 0x332, 0x732, 0x0b2, 0x4b2, 0x2b2, 0x6b2, 0x1b2,
+   0x5b2, 0x3b2, 0x7b2, 0x072, 0x472, 0x272, 0x672, 0x172, 0x572, 0x372,
+   0x772, 0x0f2, 0x4f2, 0x2f2, 0x6f2, 0x1f2, 0x5f2, 0x3f2, 0x7f2, 0x00a,
+   0x40a, 0x20a, 0x60a, 0x10a, 0x50a, 0x30a, 0x70a, 0x08a, 0x48a, 0x28a,
+   0x68a, 0x18a, 0x58a, 0x38a, 0x78a, 0x04a, 0x44a, 0x24a, 0x64a, 0x14a,
+   0x54a, 0x34a, 0x74a, 0x0ca, 0x4ca, 0x2ca, 0x6ca, 0x1ca, 0x5ca, 0x3ca,
+   0x7ca, 0x02a, 0x42a, 0x22a, 0x62a, 0x12a, 0x52a, 0x32a, 0x72a, 0x0aa,
+   0x4aa, 0x2aa, 0x6aa, 0x1aa, 0x5aa, 0x3aa, 0x7aa, 0x06a, 0x46a, 0x26a,
+   0x66a, 0x16a, 0x56a, 0x36a, 0x76a, 0x0ea, 0x4ea, 0x2ea, 0x6ea, 0x1ea,
+   0x5ea, 0x3ea, 0x7ea, 0x01a, 0x41a, 0x21a, 0x61a, 0x11a, 0x51a, 0x31a,
+   0x71a, 0x09a, 0x49a, 0x29a, 0x69a, 0x19a, 0x59a, 0x39a, 0x79a, 0x5a,
+   0x45a, 0x25a, 0x65a, 0x15a, 0x55a, 0x35a, 0x75a, 0x0da, 0x4da, 0x2da,
+   0x6da, 0x1da, 0x5da, 0x3da, 0x7da, 0x03a, 0x43a, 0x23a, 0x63a, 0x13a,
+   0x53a, 0x33a, 0x73a, 0x0ba, 0x4ba, 0x2ba, 0x6ba, 0x1ba, 0x5ba, 0x3ba,
+   0x7ba, 0x07a, 0x47a, 0x27a, 0x67a, 0x17a, 0x57a, 0x37a, 0x77a, 0x0fa,
+   0x4fa, 0x2fa, 0x6fa, 0x1fa, 0x5fa, 0x3fa, 0x7fa, 0x006, 0x406, 0x206,
+   0x606, 0x106, 0x506, 0x306, 0x706, 0x086, 0x486, 0x286, 0x686, 0x186,
+   0x586, 0x386, 0x786, 0x046, 0x446, 0x246, 0x646, 0x146, 0x546, 0x346,
+   0x746, 0x0c6, 0x4c6, 0x2c6, 0x6c6, 0x1c6, 0x5c6, 0x3c6, 0x7c6, 0x026,
+   0x426, 0x226, 0x626, 0x126, 0x526, 0x326, 0x726, 0x0a6, 0x4a6, 0x2a6,
+   0x6a6, 0x1a6, 0x5a6, 0x3a6, 0x7a6, 0x066, 0x466, 0x266, 0x666, 0x166,
+   0x566, 0x366, 0x766, 0x0e6, 0x4e6, 0x2e6, 0x6e6, 0x1e6, 0x5e6, 0x3e6,
+   0x7e6, 0x016, 0x416, 0x216, 0x616, 0x116, 0x516, 0x316, 0x716, 0x096,
+   0x496, 0x296, 0x696, 0x196, 0x596, 0x396, 0x796, 0x056, 0x456, 0x256,
+   0x656, 0x156, 0x556, 0x356, 0x756, 0x0d6, 0x4d6, 0x2d6, 0x6d6, 0x1d6,
+   0x5d6, 0x3d6, 0x7d6, 0x036, 0x436, 0x236, 0x636, 0x136, 0x536, 0x336,
+   0x736, 0x0b6, 0x4b6, 0x2b6, 0x6b6, 0x1b6, 0x5b6, 0x3b6, 0x7b6, 0x076,
+   0x476, 0x276, 0x676, 0x176, 0x576, 0x376, 0x776, 0x0f6, 0x4f6, 0x2f6,
+   0x6f6, 0x1f6, 0x5f6, 0x3f6, 0x7f6, 0x00e, 0x40e, 0x20e, 0x60e, 0x10e,
+   0x50e, 0x30e, 0x70e, 0x08e, 0x48e, 0x28e, 0x68e, 0x18e, 0x58e, 0x38e,
+   0x78e, 0x04e, 0x44e, 0x24e, 0x64e, 0x14e, 0x54e, 0x34e, 0x74e, 0x0ce,
+   0x4ce, 0x2ce, 0x6ce, 0x1ce, 0x5ce, 0x3ce, 0x7ce, 0x02e, 0x42e, 0x22e,
+   0x62e, 0x12e, 0x52e, 0x32e, 0x72e, 0x0ae, 0x4ae, 0x2ae, 0x6ae, 0x1ae,
+   0x5ae, 0x3ae, 0x7ae, 0x06e, 0x46e, 0x26e, 0x66e, 0x16e, 0x56e, 0x36e,
+   0x76e, 0x0ee, 0x4ee, 0x2ee, 0x6ee, 0x1ee, 0x5ee, 0x3ee, 0x7ee, 0x01e,
+   0x41e, 0x21e, 0x61e, 0x11e, 0x51e, 0x31e, 0x71e, 0x09e, 0x49e, 0x29e,
+   0x69e, 0x19e, 0x59e, 0x39e, 0x79e, 0x05e, 0x45e, 0x25e, 0x65e, 0x15e,
+   0x55e, 0x35e, 0x75e, 0x0de, 0x4de, 0x2de, 0x6de, 0x1de, 0x5de, 0x3de,
+   0x7de, 0x03e, 0x43e, 0x23e, 0x63e, 0x13e, 0x53e, 0x33e, 0x73e, 0x0be,
+   0x4be, 0x2be, 0x6be, 0x1be, 0x5be, 0x3be, 0x7be, 0x07e, 0x47e, 0x27e,
+   0x67e, 0x17e, 0x57e, 0x37e, 0x77e, 0x0fe, 0x4fe, 0x2fe, 0x6fe, 0x1fe,
+   0x5fe, 0x3fe, 0x7fe, 0x001
+};
+#endif
+
+/**
+  @brief  Double Precision Floating-point Twiddle factors Table Generation
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_16)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(double)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(double)N);
+  } </pre>
+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_16[32] = {
+    0x3ff0000000000000,    0x0000000000000000,     //       1,       0'
+    0x3fed906bcf328d46,    0x3fd87de2a6aea963,     // 0.92388, 0.38268'
+    0x3fe6a09e667f3bcc,    0x3fe6a09e667f3bcc,     // 0.70711, 0.70711'
+    0x3fd87de2a6aea963,    0x3fed906bcf328d46,     // 0.38268, 0.92388'
+    0x0000000000000000,    0x3ff0000000000000,     //       0,       1'
+    0xbfd87de2a6aea963,    0x3fed906bcf328d46,     //-0.38268, 0.92388'
+    0xbfe6a09e667f3bcc,    0x3fe6a09e667f3bcc,     //-0.70711, 0.70711'
+    0xbfed906bcf328d46,    0x3fd87de2a6aea963,     //-0.92388, 0.38268'
+    0xbff0000000000000,    0x0000000000000000,     //      -1,       0'
+    0xbfed906bcf328d46,    0xbfd87de2a6aea963,     //-0.92388,-0.38268'
+    0xbfe6a09e667f3bcc,    0xbfe6a09e667f3bcc,     //-0.70711,-0.70711'
+    0xbfd87de2a6aea963,    0xbfed906bcf328d46,     //-0.38268,-0.92388'
+    0x0000000000000000,    0xbff0000000000000,     //       0,      -1'
+    0x3fd87de2a6aea963,    0xbfed906bcf328d46,     // 0.38268,-0.92388'
+    0x3fe6a09e667f3bcc,    0xbfe6a09e667f3bcc,     // 0.70711,-0.70711'
+    0x3fed906bcf328d46,    0xbfd87de2a6aea963,     // 0.92388,-0.38268'
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_32)
+
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/N);
+  } </pre>
+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_32[64] = {
+    0x3ff0000000000000,     0x0000000000000000,     //       1,       0'
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     // 0.98079, 0.19509'
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     // 0.92388, 0.38268'
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // 0.83147, 0.55557'
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // 0.70711, 0.70711'
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // 0.55557, 0.83147'
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     // 0.38268, 0.92388'
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     // 0.19509, 0.98079'
+    0x0000000000000000,     0x3ff0000000000000,     //       0,       1'
+    0xbfc8f8b83c69a60a,     0x3fef6297cff75cb0,     //-0.19509, 0.98079'
+    0xbfd87de2a6aea963,     0x3fed906bcf328d46,     //-0.38268, 0.92388'
+    0xbfe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //-0.55557, 0.83147'
+    0xbfe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //-0.70711, 0.70711'
+    0xbfea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //-0.83147, 0.55557'
+    0xbfed906bcf328d46,     0x3fd87de2a6aea963,     //-0.92388, 0.38268'
+    0xbfef6297cff75cb0,     0x3fc8f8b83c69a60a,     //-0.98079, 0.19509'
+    0xbff0000000000000,     0x0000000000000000,     //      -1,       0'
+    0xbfef6297cff75cb0,     0xbfc8f8b83c69a60a,     //-0.98079,-0.19509'
+    0xbfed906bcf328d46,     0xbfd87de2a6aea963,     //-0.92388,-0.38268'
+    0xbfea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //-0.83147,-0.55557'
+    0xbfe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //-0.70711,-0.70711'
+    0xbfe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //-0.55557,-0.83147'
+    0xbfd87de2a6aea963,     0xbfed906bcf328d46,     //-0.38268,-0.92388'
+    0xbfc8f8b83c69a60a,     0xbfef6297cff75cb0,     //-0.19509,-0.98079'
+    0x0000000000000000,     0xbff0000000000000,     //       0,      -1'
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     // 0.19509,-0.98079'
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     // 0.38268,-0.92388'
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // 0.55557,-0.83147'
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // 0.70711,-0.70711'
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // 0.83147,-0.55557'
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     // 0.92388,-0.38268'
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     // 0.98079,-0.19509'
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_64)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for(i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_64[128] = {
+    0x3ff0000000000000,     0x0000000000000000,     //        1,        0'
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //  0.99518, 0.098017'
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  0.98079,  0.19509'
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //  0.95694,  0.29028'
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //  0.92388,  0.38268'
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  0.88192,   0.4714'
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  0.83147,  0.55557'
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //  0.77301,  0.63439'
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  0.70711,  0.70711'
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //  0.63439,  0.77301'
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  0.55557,  0.83147'
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   0.4714,  0.88192'
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //  0.38268,  0.92388'
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //  0.29028,  0.95694'
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  0.19509,  0.98079'
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     // 0.098017,  0.99518'
+    0x0000000000000000,     0x3ff0000000000000,     //        0,        1'
+    0xbfb917a6bc29b42c,     0x3fefd88da3d12526,     //-0.098017,  0.99518'
+    0xbfc8f8b83c69a60a,     0x3fef6297cff75cb0,     // -0.19509,  0.98079'
+    0xbfd294062ed59f05,     0x3fee9f4156c62dda,     // -0.29028,  0.95694'
+    0xbfd87de2a6aea963,     0x3fed906bcf328d46,     // -0.38268,  0.92388'
+    0xbfde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  -0.4714,  0.88192'
+    0xbfe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // -0.55557,  0.83147'
+    0xbfe44cf325091dd6,     0x3fe8bc806b151741,     // -0.63439,  0.77301'
+    0xbfe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // -0.70711,  0.70711'
+    0xbfe8bc806b151741,     0x3fe44cf325091dd6,     // -0.77301,  0.63439'
+    0xbfea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // -0.83147,  0.55557'
+    0xbfec38b2f180bdb1,     0x3fde2b5d3806f63b,     // -0.88192,   0.4714'
+    0xbfed906bcf328d46,     0x3fd87de2a6aea963,     // -0.92388,  0.38268'
+    0xbfee9f4156c62dda,     0x3fd294062ed59f05,     // -0.95694,  0.29028'
+    0xbfef6297cff75cb0,     0x3fc8f8b83c69a60a,     // -0.98079,  0.19509'
+    0xbfefd88da3d12526,     0x3fb917a6bc29b42c,     // -0.99518, 0.098017'
+    0xbff0000000000000,     0x0000000000000000,     //       -1,        0'
+    0xbfefd88da3d12526,     0xbfb917a6bc29b42c,     // -0.99518,-0.098017'
+    0xbfef6297cff75cb0,     0xbfc8f8b83c69a60a,     // -0.98079, -0.19509'
+    0xbfee9f4156c62dda,     0xbfd294062ed59f05,     // -0.95694, -0.29028'
+    0xbfed906bcf328d46,     0xbfd87de2a6aea963,     // -0.92388, -0.38268'
+    0xbfec38b2f180bdb1,     0xbfde2b5d3806f63b,     // -0.88192,  -0.4714'
+    0xbfea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // -0.83147, -0.55557'
+    0xbfe8bc806b151741,     0xbfe44cf325091dd6,     // -0.77301, -0.63439'
+    0xbfe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // -0.70711, -0.70711'
+    0xbfe44cf325091dd6,     0xbfe8bc806b151741,     // -0.63439, -0.77301'
+    0xbfe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // -0.55557, -0.83147'
+    0xbfde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  -0.4714, -0.88192'
+    0xbfd87de2a6aea963,     0xbfed906bcf328d46,     // -0.38268, -0.92388'
+    0xbfd294062ed59f05,     0xbfee9f4156c62dda,     // -0.29028, -0.95694'
+    0xbfc8f8b83c69a60a,     0xbfef6297cff75cb0,     // -0.19509, -0.98079'
+    0xbfb917a6bc29b42c,     0xbfefd88da3d12526,     //-0.098017, -0.99518'
+    0x0000000000000000,     0xbff0000000000000,     //        0,       -1'
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     // 0.098017, -0.99518'
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  0.19509, -0.98079'
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //  0.29028, -0.95694'
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //  0.38268, -0.92388'
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   0.4714, -0.88192'
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  0.55557, -0.83147'
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //  0.63439, -0.77301'
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  0.70711, -0.70711'
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //  0.77301, -0.63439'
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  0.83147, -0.55557'
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  0.88192,  -0.4714'
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //  0.92388, -0.38268'
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //  0.95694, -0.29028'
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  0.98079, -0.19509'
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //  0.99518,-0.098017'
+    };
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_128)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_128[256] = {
+    0x3ff0000000000000,     0x0000000000000000,     //        1,        0'
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //   0.9988, 0.049068'
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //  0.99518, 0.098017'
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //  0.98918,  0.14673'
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  0.98079,  0.19509'
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  0.97003,  0.24298'
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //  0.95694,  0.29028'
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //  0.94154,  0.33689'
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //  0.92388,  0.38268'
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //  0.90399,  0.42756'
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  0.88192,   0.4714'
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //  0.85773,   0.5141'
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  0.83147,  0.55557'
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //  0.80321,   0.5957'
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //  0.77301,  0.63439'
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //  0.74095,  0.67156'
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  0.70711,  0.70711'
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //  0.67156,  0.74095'
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //  0.63439,  0.77301'
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //   0.5957,  0.80321'
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  0.55557,  0.83147'
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //   0.5141,  0.85773'
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   0.4714,  0.88192'
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //  0.42756,  0.90399'
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //  0.38268,  0.92388'
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //  0.33689,  0.94154'
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //  0.29028,  0.95694'
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  0.24298,  0.97003'
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  0.19509,  0.98079'
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //  0.14673,  0.98918'
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     // 0.098017,  0.99518'
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     // 0.049068,   0.9988'
+    0x0000000000000000,     0x3ff0000000000000,     //        0,        1'
+    0xbfa91f65f10dd814,     0x3feff621e3796d7e,     //-0.049068,   0.9988'
+    0xbfb917a6bc29b42c,     0x3fefd88da3d12526,     //-0.098017,  0.99518'
+    0xbfc2c8106e8e613a,     0x3fefa7557f08a517,     // -0.14673,  0.98918'
+    0xbfc8f8b83c69a60a,     0x3fef6297cff75cb0,     // -0.19509,  0.98079'
+    0xbfcf19f97b215f1a,     0x3fef0a7efb9230d7,     // -0.24298,  0.97003'
+    0xbfd294062ed59f05,     0x3fee9f4156c62dda,     // -0.29028,  0.95694'
+    0xbfd58f9a75ab1fdd,     0x3fee212104f686e5,     // -0.33689,  0.94154'
+    0xbfd87de2a6aea963,     0x3fed906bcf328d46,     // -0.38268,  0.92388'
+    0xbfdb5d1009e15cc0,     0x3feced7af43cc773,     // -0.42756,  0.90399'
+    0xbfde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  -0.4714,  0.88192'
+    0xbfe073879922ffed,     0x3feb728345196e3e,     //  -0.5141,  0.85773'
+    0xbfe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // -0.55557,  0.83147'
+    0xbfe30ff7fce17035,     0x3fe9b3e047f38741,     //  -0.5957,  0.80321'
+    0xbfe44cf325091dd6,     0x3fe8bc806b151741,     // -0.63439,  0.77301'
+    0xbfe57d69348cec9f,     0x3fe7b5df226aafb0,     // -0.67156,  0.74095'
+    0xbfe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // -0.70711,  0.70711'
+    0xbfe7b5df226aafb0,     0x3fe57d69348cec9f,     // -0.74095,  0.67156'
+    0xbfe8bc806b151741,     0x3fe44cf325091dd6,     // -0.77301,  0.63439'
+    0xbfe9b3e047f38741,     0x3fe30ff7fce17035,     // -0.80321,   0.5957'
+    0xbfea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // -0.83147,  0.55557'
+    0xbfeb728345196e3e,     0x3fe073879922ffed,     // -0.85773,   0.5141'
+    0xbfec38b2f180bdb1,     0x3fde2b5d3806f63b,     // -0.88192,   0.4714'
+    0xbfeced7af43cc773,     0x3fdb5d1009e15cc0,     // -0.90399,  0.42756'
+    0xbfed906bcf328d46,     0x3fd87de2a6aea963,     // -0.92388,  0.38268'
+    0xbfee212104f686e5,     0x3fd58f9a75ab1fdd,     // -0.94154,  0.33689'
+    0xbfee9f4156c62dda,     0x3fd294062ed59f05,     // -0.95694,  0.29028'
+    0xbfef0a7efb9230d7,     0x3fcf19f97b215f1a,     // -0.97003,  0.24298'
+    0xbfef6297cff75cb0,     0x3fc8f8b83c69a60a,     // -0.98079,  0.19509'
+    0xbfefa7557f08a517,     0x3fc2c8106e8e613a,     // -0.98918,  0.14673'
+    0xbfefd88da3d12526,     0x3fb917a6bc29b42c,     // -0.99518, 0.098017'
+    0xbfeff621e3796d7e,     0x3fa91f65f10dd814,     //  -0.9988, 0.049068'
+    0xbff0000000000000,     0x0000000000000000,     //       -1,        0'
+    0xbfeff621e3796d7e,     0xbfa91f65f10dd814,     //  -0.9988,-0.049068'
+    0xbfefd88da3d12526,     0xbfb917a6bc29b42c,     // -0.99518,-0.098017'
+    0xbfefa7557f08a517,     0xbfc2c8106e8e613a,     // -0.98918, -0.14673'
+    0xbfef6297cff75cb0,     0xbfc8f8b83c69a60a,     // -0.98079, -0.19509'
+    0xbfef0a7efb9230d7,     0xbfcf19f97b215f1a,     // -0.97003, -0.24298'
+    0xbfee9f4156c62dda,     0xbfd294062ed59f05,     // -0.95694, -0.29028'
+    0xbfee212104f686e5,     0xbfd58f9a75ab1fdd,     // -0.94154, -0.33689'
+    0xbfed906bcf328d46,     0xbfd87de2a6aea963,     // -0.92388, -0.38268'
+    0xbfeced7af43cc773,     0xbfdb5d1009e15cc0,     // -0.90399, -0.42756'
+    0xbfec38b2f180bdb1,     0xbfde2b5d3806f63b,     // -0.88192,  -0.4714'
+    0xbfeb728345196e3e,     0xbfe073879922ffed,     // -0.85773,  -0.5141'
+    0xbfea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // -0.83147, -0.55557'
+    0xbfe9b3e047f38741,     0xbfe30ff7fce17035,     // -0.80321,  -0.5957'
+    0xbfe8bc806b151741,     0xbfe44cf325091dd6,     // -0.77301, -0.63439'
+    0xbfe7b5df226aafb0,     0xbfe57d69348cec9f,     // -0.74095, -0.67156'
+    0xbfe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // -0.70711, -0.70711'
+    0xbfe57d69348cec9f,     0xbfe7b5df226aafb0,     // -0.67156, -0.74095'
+    0xbfe44cf325091dd6,     0xbfe8bc806b151741,     // -0.63439, -0.77301'
+    0xbfe30ff7fce17035,     0xbfe9b3e047f38741,     //  -0.5957, -0.80321'
+    0xbfe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // -0.55557, -0.83147'
+    0xbfe073879922ffed,     0xbfeb728345196e3e,     //  -0.5141, -0.85773'
+    0xbfde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  -0.4714, -0.88192'
+    0xbfdb5d1009e15cc0,     0xbfeced7af43cc773,     // -0.42756, -0.90399'
+    0xbfd87de2a6aea963,     0xbfed906bcf328d46,     // -0.38268, -0.92388'
+    0xbfd58f9a75ab1fdd,     0xbfee212104f686e5,     // -0.33689, -0.94154'
+    0xbfd294062ed59f05,     0xbfee9f4156c62dda,     // -0.29028, -0.95694'
+    0xbfcf19f97b215f1a,     0xbfef0a7efb9230d7,     // -0.24298, -0.97003'
+    0xbfc8f8b83c69a60a,     0xbfef6297cff75cb0,     // -0.19509, -0.98079'
+    0xbfc2c8106e8e613a,     0xbfefa7557f08a517,     // -0.14673, -0.98918'
+    0xbfb917a6bc29b42c,     0xbfefd88da3d12526,     //-0.098017, -0.99518'
+    0xbfa91f65f10dd814,     0xbfeff621e3796d7e,     //-0.049068,  -0.9988'
+    0x0000000000000000,     0xbff0000000000000,     //        0,       -1'
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     // 0.049068,  -0.9988'
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     // 0.098017, -0.99518'
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //  0.14673, -0.98918'
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  0.19509, -0.98079'
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  0.24298, -0.97003'
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //  0.29028, -0.95694'
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //  0.33689, -0.94154'
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //  0.38268, -0.92388'
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //  0.42756, -0.90399'
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   0.4714, -0.88192'
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //   0.5141, -0.85773'
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  0.55557, -0.83147'
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //   0.5957, -0.80321'
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //  0.63439, -0.77301'
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //  0.67156, -0.74095'
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  0.70711, -0.70711'
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //  0.74095, -0.67156'
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //  0.77301, -0.63439'
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //  0.80321,  -0.5957'
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  0.83147, -0.55557'
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //  0.85773,  -0.5141'
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  0.88192,  -0.4714'
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //  0.90399, -0.42756'
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //  0.92388, -0.38268'
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //  0.94154, -0.33689'
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //  0.95694, -0.29028'
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  0.97003, -0.24298'
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  0.98079, -0.19509'
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //  0.98918, -0.14673'
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //  0.99518,-0.098017'
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //   0.9988,-0.049068'
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_256)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for(i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_256[512] = {
+    0x3ff0000000000000,     0x0000000000000000,     //        1,        0
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //   0.9997, 0.024541
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //   0.9988, 0.049068
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     //  0.99729, 0.073565
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //  0.99518, 0.098017
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     //  0.99248,  0.12241
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //  0.98918,  0.14673
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     //  0.98528,  0.17096
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  0.98079,  0.19509
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //   0.9757,   0.2191
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  0.97003,  0.24298
+    0x3feed740e7684963,     0x3fd111d262b1f677,     //  0.96378,  0.26671
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //  0.95694,  0.29028
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     //  0.94953,  0.31368
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //  0.94154,  0.33689
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     //  0.93299,   0.3599
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //  0.92388,  0.38268
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //  0.91421,  0.40524
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //  0.90399,  0.42756
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     //  0.89322,  0.44961
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  0.88192,   0.4714
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //  0.87009,   0.4929
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //  0.85773,   0.5141
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     //  0.84485,    0.535
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  0.83147,  0.55557
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     //  0.81758,  0.57581
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //  0.80321,   0.5957
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     //  0.78835,  0.61523
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //  0.77301,  0.63439
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //  0.75721,  0.65317
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //  0.74095,  0.67156
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     //  0.72425,  0.68954
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  0.70711,  0.70711
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     //  0.68954,  0.72425
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //  0.67156,  0.74095
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //  0.65317,  0.75721
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //  0.63439,  0.77301
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     //  0.61523,  0.78835
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //   0.5957,  0.80321
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     //  0.57581,  0.81758
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  0.55557,  0.83147
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //    0.535,  0.84485
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //   0.5141,  0.85773
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //   0.4929,  0.87009
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   0.4714,  0.88192
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     //  0.44961,  0.89322
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //  0.42756,  0.90399
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //  0.40524,  0.91421
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //  0.38268,  0.92388
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //   0.3599,  0.93299
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //  0.33689,  0.94154
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     //  0.31368,  0.94953
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //  0.29028,  0.95694
+    0x3fd111d262b1f677,     0x3feed740e7684963,     //  0.26671,  0.96378
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  0.24298,  0.97003
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //   0.2191,   0.9757
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  0.19509,  0.98079
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     //  0.17096,  0.98528
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //  0.14673,  0.98918
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     //  0.12241,  0.99248
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     // 0.098017,  0.99518
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     // 0.073565,  0.99729
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     // 0.049068,   0.9988
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     // 0.024541,   0.9997
+    0x0000000000000000,     0x3ff0000000000000,     //        0,        1
+    0xbf992155f7a3667e,     0x3feffd886084cd0d,     //-0.024541,   0.9997
+    0xbfa91f65f10dd814,     0x3feff621e3796d7e,     //-0.049068,   0.9988
+    0xbfb2d52092ce19f6,     0x3fefe9cdad01883a,     //-0.073565,  0.99729
+    0xbfb917a6bc29b42c,     0x3fefd88da3d12526,     //-0.098017,  0.99518
+    0xbfbf564e56a9730e,     0x3fefc26470e19fd3,     // -0.12241,  0.99248
+    0xbfc2c8106e8e613a,     0x3fefa7557f08a517,     // -0.14673,  0.98918
+    0xbfc5e214448b3fc6,     0x3fef8764fa714ba9,     // -0.17096,  0.98528
+    0xbfc8f8b83c69a60a,     0x3fef6297cff75cb0,     // -0.19509,  0.98079
+    0xbfcc0b826a7e4f63,     0x3fef38f3ac64e589,     //  -0.2191,   0.9757
+    0xbfcf19f97b215f1a,     0x3fef0a7efb9230d7,     // -0.24298,  0.97003
+    0xbfd111d262b1f677,     0x3feed740e7684963,     // -0.26671,  0.96378
+    0xbfd294062ed59f05,     0x3fee9f4156c62dda,     // -0.29028,  0.95694
+    0xbfd4135c94176602,     0x3fee6288ec48e112,     // -0.31368,  0.94953
+    0xbfd58f9a75ab1fdd,     0x3fee212104f686e5,     // -0.33689,  0.94154
+    0xbfd7088530fa459e,     0x3feddb13b6ccc23d,     //  -0.3599,  0.93299
+    0xbfd87de2a6aea963,     0x3fed906bcf328d46,     // -0.38268,  0.92388
+    0xbfd9ef7943a8ed8a,     0x3fed4134d14dc93a,     // -0.40524,  0.91421
+    0xbfdb5d1009e15cc0,     0x3feced7af43cc773,     // -0.42756,  0.90399
+    0xbfdcc66e9931c45d,     0x3fec954b213411f5,     // -0.44961,  0.89322
+    0xbfde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  -0.4714,  0.88192
+    0xbfdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //  -0.4929,  0.87009
+    0xbfe073879922ffed,     0x3feb728345196e3e,     //  -0.5141,  0.85773
+    0xbfe11eb3541b4b22,     0x3feb090a58150200,     //   -0.535,  0.84485
+    0xbfe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // -0.55557,  0.83147
+    0xbfe26d054cdd12df,     0x3fea29a7a0462782,     // -0.57581,  0.81758
+    0xbfe30ff7fce17035,     0x3fe9b3e047f38741,     //  -0.5957,  0.80321
+    0xbfe3affa292050b9,     0x3fe93a22499263fc,     // -0.61523,  0.78835
+    0xbfe44cf325091dd6,     0x3fe8bc806b151741,     // -0.63439,  0.77301
+    0xbfe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     // -0.65317,  0.75721
+    0xbfe57d69348cec9f,     0x3fe7b5df226aafb0,     // -0.67156,  0.74095
+    0xbfe610b7551d2cde,     0x3fe72d0837efff97,     // -0.68954,  0.72425
+    0xbfe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // -0.70711,  0.70711
+    0xbfe72d0837efff97,     0x3fe610b7551d2cde,     // -0.72425,  0.68954
+    0xbfe7b5df226aafb0,     0x3fe57d69348cec9f,     // -0.74095,  0.67156
+    0xbfe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     // -0.75721,  0.65317
+    0xbfe8bc806b151741,     0x3fe44cf325091dd6,     // -0.77301,  0.63439
+    0xbfe93a22499263fc,     0x3fe3affa292050b9,     // -0.78835,  0.61523
+    0xbfe9b3e047f38741,     0x3fe30ff7fce17035,     // -0.80321,   0.5957
+    0xbfea29a7a0462782,     0x3fe26d054cdd12df,     // -0.81758,  0.57581
+    0xbfea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // -0.83147,  0.55557
+    0xbfeb090a58150200,     0x3fe11eb3541b4b22,     // -0.84485,    0.535
+    0xbfeb728345196e3e,     0x3fe073879922ffed,     // -0.85773,   0.5141
+    0xbfebd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     // -0.87009,   0.4929
+    0xbfec38b2f180bdb1,     0x3fde2b5d3806f63b,     // -0.88192,   0.4714
+    0xbfec954b213411f5,     0x3fdcc66e9931c45d,     // -0.89322,  0.44961
+    0xbfeced7af43cc773,     0x3fdb5d1009e15cc0,     // -0.90399,  0.42756
+    0xbfed4134d14dc93a,     0x3fd9ef7943a8ed8a,     // -0.91421,  0.40524
+    0xbfed906bcf328d46,     0x3fd87de2a6aea963,     // -0.92388,  0.38268
+    0xbfeddb13b6ccc23d,     0x3fd7088530fa459e,     // -0.93299,   0.3599
+    0xbfee212104f686e5,     0x3fd58f9a75ab1fdd,     // -0.94154,  0.33689
+    0xbfee6288ec48e112,     0x3fd4135c94176602,     // -0.94953,  0.31368
+    0xbfee9f4156c62dda,     0x3fd294062ed59f05,     // -0.95694,  0.29028
+    0xbfeed740e7684963,     0x3fd111d262b1f677,     // -0.96378,  0.26671
+    0xbfef0a7efb9230d7,     0x3fcf19f97b215f1a,     // -0.97003,  0.24298
+    0xbfef38f3ac64e589,     0x3fcc0b826a7e4f63,     //  -0.9757,   0.2191
+    0xbfef6297cff75cb0,     0x3fc8f8b83c69a60a,     // -0.98079,  0.19509
+    0xbfef8764fa714ba9,     0x3fc5e214448b3fc6,     // -0.98528,  0.17096
+    0xbfefa7557f08a517,     0x3fc2c8106e8e613a,     // -0.98918,  0.14673
+    0xbfefc26470e19fd3,     0x3fbf564e56a9730e,     // -0.99248,  0.12241
+    0xbfefd88da3d12526,     0x3fb917a6bc29b42c,     // -0.99518, 0.098017
+    0xbfefe9cdad01883a,     0x3fb2d52092ce19f6,     // -0.99729, 0.073565
+    0xbfeff621e3796d7e,     0x3fa91f65f10dd814,     //  -0.9988, 0.049068
+    0xbfeffd886084cd0d,     0x3f992155f7a3667e,     //  -0.9997, 0.024541
+    0xbff0000000000000,     0x0000000000000000,     //       -1,        0
+    0xbfeffd886084cd0d,     0xbf992155f7a3667e,     //  -0.9997,-0.024541
+    0xbfeff621e3796d7e,     0xbfa91f65f10dd814,     //  -0.9988,-0.049068
+    0xbfefe9cdad01883a,     0xbfb2d52092ce19f6,     // -0.99729,-0.073565
+    0xbfefd88da3d12526,     0xbfb917a6bc29b42c,     // -0.99518,-0.098017
+    0xbfefc26470e19fd3,     0xbfbf564e56a9730e,     // -0.99248, -0.12241
+    0xbfefa7557f08a517,     0xbfc2c8106e8e613a,     // -0.98918, -0.14673
+    0xbfef8764fa714ba9,     0xbfc5e214448b3fc6,     // -0.98528, -0.17096
+    0xbfef6297cff75cb0,     0xbfc8f8b83c69a60a,     // -0.98079, -0.19509
+    0xbfef38f3ac64e589,     0xbfcc0b826a7e4f63,     //  -0.9757,  -0.2191
+    0xbfef0a7efb9230d7,     0xbfcf19f97b215f1a,     // -0.97003, -0.24298
+    0xbfeed740e7684963,     0xbfd111d262b1f677,     // -0.96378, -0.26671
+    0xbfee9f4156c62dda,     0xbfd294062ed59f05,     // -0.95694, -0.29028
+    0xbfee6288ec48e112,     0xbfd4135c94176602,     // -0.94953, -0.31368
+    0xbfee212104f686e5,     0xbfd58f9a75ab1fdd,     // -0.94154, -0.33689
+    0xbfeddb13b6ccc23d,     0xbfd7088530fa459e,     // -0.93299,  -0.3599
+    0xbfed906bcf328d46,     0xbfd87de2a6aea963,     // -0.92388, -0.38268
+    0xbfed4134d14dc93a,     0xbfd9ef7943a8ed8a,     // -0.91421, -0.40524
+    0xbfeced7af43cc773,     0xbfdb5d1009e15cc0,     // -0.90399, -0.42756
+    0xbfec954b213411f5,     0xbfdcc66e9931c45d,     // -0.89322, -0.44961
+    0xbfec38b2f180bdb1,     0xbfde2b5d3806f63b,     // -0.88192,  -0.4714
+    0xbfebd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     // -0.87009,  -0.4929
+    0xbfeb728345196e3e,     0xbfe073879922ffed,     // -0.85773,  -0.5141
+    0xbfeb090a58150200,     0xbfe11eb3541b4b22,     // -0.84485,   -0.535
+    0xbfea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // -0.83147, -0.55557
+    0xbfea29a7a0462782,     0xbfe26d054cdd12df,     // -0.81758, -0.57581
+    0xbfe9b3e047f38741,     0xbfe30ff7fce17035,     // -0.80321,  -0.5957
+    0xbfe93a22499263fc,     0xbfe3affa292050b9,     // -0.78835, -0.61523
+    0xbfe8bc806b151741,     0xbfe44cf325091dd6,     // -0.77301, -0.63439
+    0xbfe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     // -0.75721, -0.65317
+    0xbfe7b5df226aafb0,     0xbfe57d69348cec9f,     // -0.74095, -0.67156
+    0xbfe72d0837efff97,     0xbfe610b7551d2cde,     // -0.72425, -0.68954
+    0xbfe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // -0.70711, -0.70711
+    0xbfe610b7551d2cde,     0xbfe72d0837efff97,     // -0.68954, -0.72425
+    0xbfe57d69348cec9f,     0xbfe7b5df226aafb0,     // -0.67156, -0.74095
+    0xbfe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     // -0.65317, -0.75721
+    0xbfe44cf325091dd6,     0xbfe8bc806b151741,     // -0.63439, -0.77301
+    0xbfe3affa292050b9,     0xbfe93a22499263fc,     // -0.61523, -0.78835
+    0xbfe30ff7fce17035,     0xbfe9b3e047f38741,     //  -0.5957, -0.80321
+    0xbfe26d054cdd12df,     0xbfea29a7a0462782,     // -0.57581, -0.81758
+    0xbfe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // -0.55557, -0.83147
+    0xbfe11eb3541b4b22,     0xbfeb090a58150200,     //   -0.535, -0.84485
+    0xbfe073879922ffed,     0xbfeb728345196e3e,     //  -0.5141, -0.85773
+    0xbfdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //  -0.4929, -0.87009
+    0xbfde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  -0.4714, -0.88192
+    0xbfdcc66e9931c45d,     0xbfec954b213411f5,     // -0.44961, -0.89322
+    0xbfdb5d1009e15cc0,     0xbfeced7af43cc773,     // -0.42756, -0.90399
+    0xbfd9ef7943a8ed8a,     0xbfed4134d14dc93a,     // -0.40524, -0.91421
+    0xbfd87de2a6aea963,     0xbfed906bcf328d46,     // -0.38268, -0.92388
+    0xbfd7088530fa459e,     0xbfeddb13b6ccc23d,     //  -0.3599, -0.93299
+    0xbfd58f9a75ab1fdd,     0xbfee212104f686e5,     // -0.33689, -0.94154
+    0xbfd4135c94176602,     0xbfee6288ec48e112,     // -0.31368, -0.94953
+    0xbfd294062ed59f05,     0xbfee9f4156c62dda,     // -0.29028, -0.95694
+    0xbfd111d262b1f677,     0xbfeed740e7684963,     // -0.26671, -0.96378
+    0xbfcf19f97b215f1a,     0xbfef0a7efb9230d7,     // -0.24298, -0.97003
+    0xbfcc0b826a7e4f63,     0xbfef38f3ac64e589,     //  -0.2191,  -0.9757
+    0xbfc8f8b83c69a60a,     0xbfef6297cff75cb0,     // -0.19509, -0.98079
+    0xbfc5e214448b3fc6,     0xbfef8764fa714ba9,     // -0.17096, -0.98528
+    0xbfc2c8106e8e613a,     0xbfefa7557f08a517,     // -0.14673, -0.98918
+    0xbfbf564e56a9730e,     0xbfefc26470e19fd3,     // -0.12241, -0.99248
+    0xbfb917a6bc29b42c,     0xbfefd88da3d12526,     //-0.098017, -0.99518
+    0xbfb2d52092ce19f6,     0xbfefe9cdad01883a,     //-0.073565, -0.99729
+    0xbfa91f65f10dd814,     0xbfeff621e3796d7e,     //-0.049068,  -0.9988
+    0xbf992155f7a3667e,     0xbfeffd886084cd0d,     //-0.024541,  -0.9997
+    0x0000000000000000,     0xbff0000000000000,     //        0,       -1
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     // 0.024541,  -0.9997
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     // 0.049068,  -0.9988
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     // 0.073565, -0.99729
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     // 0.098017, -0.99518
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     //  0.12241, -0.99248
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //  0.14673, -0.98918
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     //  0.17096, -0.98528
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  0.19509, -0.98079
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //   0.2191,  -0.9757
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  0.24298, -0.97003
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     //  0.26671, -0.96378
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //  0.29028, -0.95694
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     //  0.31368, -0.94953
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //  0.33689, -0.94154
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //   0.3599, -0.93299
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //  0.38268, -0.92388
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //  0.40524, -0.91421
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //  0.42756, -0.90399
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     //  0.44961, -0.89322
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   0.4714, -0.88192
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //   0.4929, -0.87009
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //   0.5141, -0.85773
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //    0.535, -0.84485
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  0.55557, -0.83147
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     //  0.57581, -0.81758
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //   0.5957, -0.80321
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     //  0.61523, -0.78835
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //  0.63439, -0.77301
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //  0.65317, -0.75721
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //  0.67156, -0.74095
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     //  0.68954, -0.72425
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  0.70711, -0.70711
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     //  0.72425, -0.68954
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //  0.74095, -0.67156
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //  0.75721, -0.65317
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //  0.77301, -0.63439
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     //  0.78835, -0.61523
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //  0.80321,  -0.5957
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     //  0.81758, -0.57581
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  0.83147, -0.55557
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     //  0.84485,   -0.535
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //  0.85773,  -0.5141
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //  0.87009,  -0.4929
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  0.88192,  -0.4714
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     //  0.89322, -0.44961
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //  0.90399, -0.42756
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //  0.91421, -0.40524
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //  0.92388, -0.38268
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     //  0.93299,  -0.3599
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //  0.94154, -0.33689
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     //  0.94953, -0.31368
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //  0.95694, -0.29028
+    0x3feed740e7684963,     0xbfd111d262b1f677,     //  0.96378, -0.26671
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  0.97003, -0.24298
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //   0.9757,  -0.2191
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  0.98079, -0.19509
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     //  0.98528, -0.17096
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //  0.98918, -0.14673
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     //  0.99248, -0.12241
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //  0.99518,-0.098017
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     //  0.99729,-0.073565
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //   0.9988,-0.049068
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //   0.9997,-0.024541
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_512)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_512[1024] = {
+    0x3ff0000000000000,     0x0000000000000000,     //        1,        0
+    0x3fefff62169b92db,     0x3f8921d1fcdec784,     //  0.99992, 0.012272
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //   0.9997, 0.024541
+    0x3feffa72effef75d,     0x3fa2d865759455cd,     //  0.99932, 0.036807
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //   0.9988, 0.049068
+    0x3feff095658e71ad,     0x3faf656e79f820e0,     //  0.99812, 0.061321
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     //  0.99729, 0.073565
+    0x3fefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //  0.99631, 0.085797
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //  0.99518, 0.098017
+    0x3fefce15fd6da67b,     0x3fbc3785c79ec2d5,     //  0.99391,  0.11022
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     //  0.99248,  0.12241
+    0x3fefb5797195d741,     0x3fc139f0cedaf576,     //   0.9909,  0.13458
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //  0.98918,  0.14673
+    0x3fef97f924c9099b,     0x3fc45576b1293e5a,     //   0.9873,  0.15886
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     //  0.98528,  0.17096
+    0x3fef7599a3a12077,     0x3fc76dd9de50bf31,     //  0.98311,  0.18304
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  0.98079,  0.19509
+    0x3fef4e603b0b2f2d,     0x3fca82a025b00451,     //  0.97832,  0.20711
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //   0.9757,   0.2191
+    0x3fef2252f7763ada,     0x3fcd934fe5454311,     //  0.97294,  0.23106
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  0.97003,  0.24298
+    0x3feef178a3e473c2,     0x3fd04fb80e37fdae,     //  0.96698,  0.25487
+    0x3feed740e7684963,     0x3fd111d262b1f677,     //  0.96378,  0.26671
+    0x3feebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //  0.96043,  0.27852
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //  0.95694,  0.29028
+    0x3fee817bab4cd10d,     0x3fd35410c2e18152,     //  0.95331,  0.30201
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     //  0.94953,  0.31368
+    0x3fee426a4b2bc17e,     0x3fd4d1e24278e76a,     //  0.94561,  0.32531
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //  0.94154,  0.33689
+    0x3fedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //  0.93734,  0.34842
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     //  0.93299,   0.3599
+    0x3fedb6526238a09b,     0x3fd7c3a9311dcce7,     //  0.92851,  0.37132
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //  0.92388,  0.38268
+    0x3fed696173c9e68b,     0x3fd9372a63bc93d7,     //  0.91911,  0.39399
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //  0.91421,  0.40524
+    0x3fed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //  0.90917,  0.41643
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //  0.90399,  0.42756
+    0x3fecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //  0.89867,  0.43862
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     //  0.89322,  0.44961
+    0x3fec678b3488739b,     0x3fdd79775b86e389,     //  0.88764,  0.46054
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  0.88192,   0.4714
+    0x3fec08c426725549,     0x3fdedc1952ef78d5,     //  0.87607,  0.48218
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //  0.87009,   0.4929
+    0x3feba5aa673590d2,     0x3fe01cfc874c3eb7,     //  0.86397,  0.50354
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //  0.85773,   0.5141
+    0x3feb3e4d3ef55712,     0x3fe0c9704d5d898f,     //  0.85136,  0.52459
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     //  0.84485,    0.535
+    0x3fead2bc9e21d511,     0x3fe1734d63dedb49,     //  0.83822,  0.54532
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  0.83147,  0.55557
+    0x3fea63091b02fae2,     0x3fe21a799933eb58,     //  0.82459,  0.56573
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     //  0.81758,  0.57581
+    0x3fe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //  0.81046,   0.5858
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //  0.80321,   0.5957
+    0x3fe9777ef4c7d742,     0x3fe36058b10659f3,     //  0.79584,  0.60551
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     //  0.78835,  0.61523
+    0x3fe8fbcca3ef940d,     0x3fe3fed9534556d4,     //  0.78074,  0.62486
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //  0.77301,  0.63439
+    0x3fe87c400fba2ebf,     0x3fe49a449b9b0938,     //  0.76517,  0.64383
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //  0.75721,  0.65317
+    0x3fe7f8ece3571771,     0x3fe5328292a35596,     //  0.74914,  0.66242
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //  0.74095,  0.67156
+    0x3fe771e75f037261,     0x3fe5c77bbe65018c,     //  0.73265,   0.6806
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     //  0.72425,  0.68954
+    0x3fe6e74454eaa8ae,     0x3fe6591925f0783e,     //  0.71573,  0.69838
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  0.70711,  0.70711
+    0x3fe6591925f0783e,     0x3fe6e74454eaa8ae,     //  0.69838,  0.71573
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     //  0.68954,  0.72425
+    0x3fe5c77bbe65018c,     0x3fe771e75f037261,     //   0.6806,  0.73265
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //  0.67156,  0.74095
+    0x3fe5328292a35596,     0x3fe7f8ece3571771,     //  0.66242,  0.74914
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //  0.65317,  0.75721
+    0x3fe49a449b9b0938,     0x3fe87c400fba2ebf,     //  0.64383,  0.76517
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //  0.63439,  0.77301
+    0x3fe3fed9534556d4,     0x3fe8fbcca3ef940d,     //  0.62486,  0.78074
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     //  0.61523,  0.78835
+    0x3fe36058b10659f3,     0x3fe9777ef4c7d742,     //  0.60551,  0.79584
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //   0.5957,  0.80321
+    0x3fe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //   0.5858,  0.81046
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     //  0.57581,  0.81758
+    0x3fe21a799933eb58,     0x3fea63091b02fae2,     //  0.56573,  0.82459
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  0.55557,  0.83147
+    0x3fe1734d63dedb49,     0x3fead2bc9e21d511,     //  0.54532,  0.83822
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //    0.535,  0.84485
+    0x3fe0c9704d5d898f,     0x3feb3e4d3ef55712,     //  0.52459,  0.85136
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //   0.5141,  0.85773
+    0x3fe01cfc874c3eb7,     0x3feba5aa673590d2,     //  0.50354,  0.86397
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //   0.4929,  0.87009
+    0x3fdedc1952ef78d5,     0x3fec08c426725549,     //  0.48218,  0.87607
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   0.4714,  0.88192
+    0x3fdd79775b86e389,     0x3fec678b3488739b,     //  0.46054,  0.88764
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     //  0.44961,  0.89322
+    0x3fdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //  0.43862,  0.89867
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //  0.42756,  0.90399
+    0x3fdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //  0.41643,  0.90917
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //  0.40524,  0.91421
+    0x3fd9372a63bc93d7,     0x3fed696173c9e68b,     //  0.39399,  0.91911
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //  0.38268,  0.92388
+    0x3fd7c3a9311dcce7,     0x3fedb6526238a09b,     //  0.37132,  0.92851
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //   0.3599,  0.93299
+    0x3fd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //  0.34842,  0.93734
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //  0.33689,  0.94154
+    0x3fd4d1e24278e76a,     0x3fee426a4b2bc17e,     //  0.32531,  0.94561
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     //  0.31368,  0.94953
+    0x3fd35410c2e18152,     0x3fee817bab4cd10d,     //  0.30201,  0.95331
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //  0.29028,  0.95694
+    0x3fd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //  0.27852,  0.96043
+    0x3fd111d262b1f677,     0x3feed740e7684963,     //  0.26671,  0.96378
+    0x3fd04fb80e37fdae,     0x3feef178a3e473c2,     //  0.25487,  0.96698
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  0.24298,  0.97003
+    0x3fcd934fe5454311,     0x3fef2252f7763ada,     //  0.23106,  0.97294
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //   0.2191,   0.9757
+    0x3fca82a025b00451,     0x3fef4e603b0b2f2d,     //  0.20711,  0.97832
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  0.19509,  0.98079
+    0x3fc76dd9de50bf31,     0x3fef7599a3a12077,     //  0.18304,  0.98311
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     //  0.17096,  0.98528
+    0x3fc45576b1293e5a,     0x3fef97f924c9099b,     //  0.15886,   0.9873
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //  0.14673,  0.98918
+    0x3fc139f0cedaf576,     0x3fefb5797195d741,     //  0.13458,   0.9909
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     //  0.12241,  0.99248
+    0x3fbc3785c79ec2d5,     0x3fefce15fd6da67b,     //  0.11022,  0.99391
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     // 0.098017,  0.99518
+    0x3fb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     // 0.085797,  0.99631
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     // 0.073565,  0.99729
+    0x3faf656e79f820e0,     0x3feff095658e71ad,     // 0.061321,  0.99812
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     // 0.049068,   0.9988
+    0x3fa2d865759455cd,     0x3feffa72effef75d,     // 0.036807,  0.99932
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     // 0.024541,   0.9997
+    0x3f8921d1fcdec784,     0x3fefff62169b92db,     // 0.012272,  0.99992
+    0x0000000000000000,     0x3ff0000000000000,     //        0,        1
+    0xbf8921d1fcdec784,     0x3fefff62169b92db,     //-0.012272,  0.99992
+    0xbf992155f7a3667e,     0x3feffd886084cd0d,     //-0.024541,   0.9997
+    0xbfa2d865759455cd,     0x3feffa72effef75d,     //-0.036807,  0.99932
+    0xbfa91f65f10dd814,     0x3feff621e3796d7e,     //-0.049068,   0.9988
+    0xbfaf656e79f820e0,     0x3feff095658e71ad,     //-0.061321,  0.99812
+    0xbfb2d52092ce19f6,     0x3fefe9cdad01883a,     //-0.073565,  0.99729
+    0xbfb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     //-0.085797,  0.99631
+    0xbfb917a6bc29b42c,     0x3fefd88da3d12526,     //-0.098017,  0.99518
+    0xbfbc3785c79ec2d5,     0x3fefce15fd6da67b,     // -0.11022,  0.99391
+    0xbfbf564e56a9730e,     0x3fefc26470e19fd3,     // -0.12241,  0.99248
+    0xbfc139f0cedaf576,     0x3fefb5797195d741,     // -0.13458,   0.9909
+    0xbfc2c8106e8e613a,     0x3fefa7557f08a517,     // -0.14673,  0.98918
+    0xbfc45576b1293e5a,     0x3fef97f924c9099b,     // -0.15886,   0.9873
+    0xbfc5e214448b3fc6,     0x3fef8764fa714ba9,     // -0.17096,  0.98528
+    0xbfc76dd9de50bf31,     0x3fef7599a3a12077,     // -0.18304,  0.98311
+    0xbfc8f8b83c69a60a,     0x3fef6297cff75cb0,     // -0.19509,  0.98079
+    0xbfca82a025b00451,     0x3fef4e603b0b2f2d,     // -0.20711,  0.97832
+    0xbfcc0b826a7e4f63,     0x3fef38f3ac64e589,     //  -0.2191,   0.9757
+    0xbfcd934fe5454311,     0x3fef2252f7763ada,     // -0.23106,  0.97294
+    0xbfcf19f97b215f1a,     0x3fef0a7efb9230d7,     // -0.24298,  0.97003
+    0xbfd04fb80e37fdae,     0x3feef178a3e473c2,     // -0.25487,  0.96698
+    0xbfd111d262b1f677,     0x3feed740e7684963,     // -0.26671,  0.96378
+    0xbfd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     // -0.27852,  0.96043
+    0xbfd294062ed59f05,     0x3fee9f4156c62dda,     // -0.29028,  0.95694
+    0xbfd35410c2e18152,     0x3fee817bab4cd10d,     // -0.30201,  0.95331
+    0xbfd4135c94176602,     0x3fee6288ec48e112,     // -0.31368,  0.94953
+    0xbfd4d1e24278e76a,     0x3fee426a4b2bc17e,     // -0.32531,  0.94561
+    0xbfd58f9a75ab1fdd,     0x3fee212104f686e5,     // -0.33689,  0.94154
+    0xbfd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     // -0.34842,  0.93734
+    0xbfd7088530fa459e,     0x3feddb13b6ccc23d,     //  -0.3599,  0.93299
+    0xbfd7c3a9311dcce7,     0x3fedb6526238a09b,     // -0.37132,  0.92851
+    0xbfd87de2a6aea963,     0x3fed906bcf328d46,     // -0.38268,  0.92388
+    0xbfd9372a63bc93d7,     0x3fed696173c9e68b,     // -0.39399,  0.91911
+    0xbfd9ef7943a8ed8a,     0x3fed4134d14dc93a,     // -0.40524,  0.91421
+    0xbfdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     // -0.41643,  0.90917
+    0xbfdb5d1009e15cc0,     0x3feced7af43cc773,     // -0.42756,  0.90399
+    0xbfdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     // -0.43862,  0.89867
+    0xbfdcc66e9931c45d,     0x3fec954b213411f5,     // -0.44961,  0.89322
+    0xbfdd79775b86e389,     0x3fec678b3488739b,     // -0.46054,  0.88764
+    0xbfde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  -0.4714,  0.88192
+    0xbfdedc1952ef78d5,     0x3fec08c426725549,     // -0.48218,  0.87607
+    0xbfdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //  -0.4929,  0.87009
+    0xbfe01cfc874c3eb7,     0x3feba5aa673590d2,     // -0.50354,  0.86397
+    0xbfe073879922ffed,     0x3feb728345196e3e,     //  -0.5141,  0.85773
+    0xbfe0c9704d5d898f,     0x3feb3e4d3ef55712,     // -0.52459,  0.85136
+    0xbfe11eb3541b4b22,     0x3feb090a58150200,     //   -0.535,  0.84485
+    0xbfe1734d63dedb49,     0x3fead2bc9e21d511,     // -0.54532,  0.83822
+    0xbfe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // -0.55557,  0.83147
+    0xbfe21a799933eb58,     0x3fea63091b02fae2,     // -0.56573,  0.82459
+    0xbfe26d054cdd12df,     0x3fea29a7a0462782,     // -0.57581,  0.81758
+    0xbfe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //  -0.5858,  0.81046
+    0xbfe30ff7fce17035,     0x3fe9b3e047f38741,     //  -0.5957,  0.80321
+    0xbfe36058b10659f3,     0x3fe9777ef4c7d742,     // -0.60551,  0.79584
+    0xbfe3affa292050b9,     0x3fe93a22499263fc,     // -0.61523,  0.78835
+    0xbfe3fed9534556d4,     0x3fe8fbcca3ef940d,     // -0.62486,  0.78074
+    0xbfe44cf325091dd6,     0x3fe8bc806b151741,     // -0.63439,  0.77301
+    0xbfe49a449b9b0938,     0x3fe87c400fba2ebf,     // -0.64383,  0.76517
+    0xbfe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     // -0.65317,  0.75721
+    0xbfe5328292a35596,     0x3fe7f8ece3571771,     // -0.66242,  0.74914
+    0xbfe57d69348cec9f,     0x3fe7b5df226aafb0,     // -0.67156,  0.74095
+    0xbfe5c77bbe65018c,     0x3fe771e75f037261,     //  -0.6806,  0.73265
+    0xbfe610b7551d2cde,     0x3fe72d0837efff97,     // -0.68954,  0.72425
+    0xbfe6591925f0783e,     0x3fe6e74454eaa8ae,     // -0.69838,  0.71573
+    0xbfe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // -0.70711,  0.70711
+    0xbfe6e74454eaa8ae,     0x3fe6591925f0783e,     // -0.71573,  0.69838
+    0xbfe72d0837efff97,     0x3fe610b7551d2cde,     // -0.72425,  0.68954
+    0xbfe771e75f037261,     0x3fe5c77bbe65018c,     // -0.73265,   0.6806
+    0xbfe7b5df226aafb0,     0x3fe57d69348cec9f,     // -0.74095,  0.67156
+    0xbfe7f8ece3571771,     0x3fe5328292a35596,     // -0.74914,  0.66242
+    0xbfe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     // -0.75721,  0.65317
+    0xbfe87c400fba2ebf,     0x3fe49a449b9b0938,     // -0.76517,  0.64383
+    0xbfe8bc806b151741,     0x3fe44cf325091dd6,     // -0.77301,  0.63439
+    0xbfe8fbcca3ef940d,     0x3fe3fed9534556d4,     // -0.78074,  0.62486
+    0xbfe93a22499263fc,     0x3fe3affa292050b9,     // -0.78835,  0.61523
+    0xbfe9777ef4c7d742,     0x3fe36058b10659f3,     // -0.79584,  0.60551
+    0xbfe9b3e047f38741,     0x3fe30ff7fce17035,     // -0.80321,   0.5957
+    0xbfe9ef43ef29af94,     0x3fe2bedb25faf3ea,     // -0.81046,   0.5858
+    0xbfea29a7a0462782,     0x3fe26d054cdd12df,     // -0.81758,  0.57581
+    0xbfea63091b02fae2,     0x3fe21a799933eb58,     // -0.82459,  0.56573
+    0xbfea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // -0.83147,  0.55557
+    0xbfead2bc9e21d511,     0x3fe1734d63dedb49,     // -0.83822,  0.54532
+    0xbfeb090a58150200,     0x3fe11eb3541b4b22,     // -0.84485,    0.535
+    0xbfeb3e4d3ef55712,     0x3fe0c9704d5d898f,     // -0.85136,  0.52459
+    0xbfeb728345196e3e,     0x3fe073879922ffed,     // -0.85773,   0.5141
+    0xbfeba5aa673590d2,     0x3fe01cfc874c3eb7,     // -0.86397,  0.50354
+    0xbfebd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     // -0.87009,   0.4929
+    0xbfec08c426725549,     0x3fdedc1952ef78d5,     // -0.87607,  0.48218
+    0xbfec38b2f180bdb1,     0x3fde2b5d3806f63b,     // -0.88192,   0.4714
+    0xbfec678b3488739b,     0x3fdd79775b86e389,     // -0.88764,  0.46054
+    0xbfec954b213411f5,     0x3fdcc66e9931c45d,     // -0.89322,  0.44961
+    0xbfecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     // -0.89867,  0.43862
+    0xbfeced7af43cc773,     0x3fdb5d1009e15cc0,     // -0.90399,  0.42756
+    0xbfed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     // -0.90917,  0.41643
+    0xbfed4134d14dc93a,     0x3fd9ef7943a8ed8a,     // -0.91421,  0.40524
+    0xbfed696173c9e68b,     0x3fd9372a63bc93d7,     // -0.91911,  0.39399
+    0xbfed906bcf328d46,     0x3fd87de2a6aea963,     // -0.92388,  0.38268
+    0xbfedb6526238a09b,     0x3fd7c3a9311dcce7,     // -0.92851,  0.37132
+    0xbfeddb13b6ccc23d,     0x3fd7088530fa459e,     // -0.93299,   0.3599
+    0xbfedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     // -0.93734,  0.34842
+    0xbfee212104f686e5,     0x3fd58f9a75ab1fdd,     // -0.94154,  0.33689
+    0xbfee426a4b2bc17e,     0x3fd4d1e24278e76a,     // -0.94561,  0.32531
+    0xbfee6288ec48e112,     0x3fd4135c94176602,     // -0.94953,  0.31368
+    0xbfee817bab4cd10d,     0x3fd35410c2e18152,     // -0.95331,  0.30201
+    0xbfee9f4156c62dda,     0x3fd294062ed59f05,     // -0.95694,  0.29028
+    0xbfeebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     // -0.96043,  0.27852
+    0xbfeed740e7684963,     0x3fd111d262b1f677,     // -0.96378,  0.26671
+    0xbfeef178a3e473c2,     0x3fd04fb80e37fdae,     // -0.96698,  0.25487
+    0xbfef0a7efb9230d7,     0x3fcf19f97b215f1a,     // -0.97003,  0.24298
+    0xbfef2252f7763ada,     0x3fcd934fe5454311,     // -0.97294,  0.23106
+    0xbfef38f3ac64e589,     0x3fcc0b826a7e4f63,     //  -0.9757,   0.2191
+    0xbfef4e603b0b2f2d,     0x3fca82a025b00451,     // -0.97832,  0.20711
+    0xbfef6297cff75cb0,     0x3fc8f8b83c69a60a,     // -0.98079,  0.19509
+    0xbfef7599a3a12077,     0x3fc76dd9de50bf31,     // -0.98311,  0.18304
+    0xbfef8764fa714ba9,     0x3fc5e214448b3fc6,     // -0.98528,  0.17096
+    0xbfef97f924c9099b,     0x3fc45576b1293e5a,     //  -0.9873,  0.15886
+    0xbfefa7557f08a517,     0x3fc2c8106e8e613a,     // -0.98918,  0.14673
+    0xbfefb5797195d741,     0x3fc139f0cedaf576,     //  -0.9909,  0.13458
+    0xbfefc26470e19fd3,     0x3fbf564e56a9730e,     // -0.99248,  0.12241
+    0xbfefce15fd6da67b,     0x3fbc3785c79ec2d5,     // -0.99391,  0.11022
+    0xbfefd88da3d12526,     0x3fb917a6bc29b42c,     // -0.99518, 0.098017
+    0xbfefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     // -0.99631, 0.085797
+    0xbfefe9cdad01883a,     0x3fb2d52092ce19f6,     // -0.99729, 0.073565
+    0xbfeff095658e71ad,     0x3faf656e79f820e0,     // -0.99812, 0.061321
+    0xbfeff621e3796d7e,     0x3fa91f65f10dd814,     //  -0.9988, 0.049068
+    0xbfeffa72effef75d,     0x3fa2d865759455cd,     // -0.99932, 0.036807
+    0xbfeffd886084cd0d,     0x3f992155f7a3667e,     //  -0.9997, 0.024541
+    0xbfefff62169b92db,     0x3f8921d1fcdec784,     // -0.99992, 0.012272
+    0xbff0000000000000,     0x0000000000000000,     //       -1,        0
+    0xbfefff62169b92db,     0xbf8921d1fcdec784,     // -0.99992,-0.012272
+    0xbfeffd886084cd0d,     0xbf992155f7a3667e,     //  -0.9997,-0.024541
+    0xbfeffa72effef75d,     0xbfa2d865759455cd,     // -0.99932,-0.036807
+    0xbfeff621e3796d7e,     0xbfa91f65f10dd814,     //  -0.9988,-0.049068
+    0xbfeff095658e71ad,     0xbfaf656e79f820e0,     // -0.99812,-0.061321
+    0xbfefe9cdad01883a,     0xbfb2d52092ce19f6,     // -0.99729,-0.073565
+    0xbfefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     // -0.99631,-0.085797
+    0xbfefd88da3d12526,     0xbfb917a6bc29b42c,     // -0.99518,-0.098017
+    0xbfefce15fd6da67b,     0xbfbc3785c79ec2d5,     // -0.99391, -0.11022
+    0xbfefc26470e19fd3,     0xbfbf564e56a9730e,     // -0.99248, -0.12241
+    0xbfefb5797195d741,     0xbfc139f0cedaf576,     //  -0.9909, -0.13458
+    0xbfefa7557f08a517,     0xbfc2c8106e8e613a,     // -0.98918, -0.14673
+    0xbfef97f924c9099b,     0xbfc45576b1293e5a,     //  -0.9873, -0.15886
+    0xbfef8764fa714ba9,     0xbfc5e214448b3fc6,     // -0.98528, -0.17096
+    0xbfef7599a3a12077,     0xbfc76dd9de50bf31,     // -0.98311, -0.18304
+    0xbfef6297cff75cb0,     0xbfc8f8b83c69a60a,     // -0.98079, -0.19509
+    0xbfef4e603b0b2f2d,     0xbfca82a025b00451,     // -0.97832, -0.20711
+    0xbfef38f3ac64e589,     0xbfcc0b826a7e4f63,     //  -0.9757,  -0.2191
+    0xbfef2252f7763ada,     0xbfcd934fe5454311,     // -0.97294, -0.23106
+    0xbfef0a7efb9230d7,     0xbfcf19f97b215f1a,     // -0.97003, -0.24298
+    0xbfeef178a3e473c2,     0xbfd04fb80e37fdae,     // -0.96698, -0.25487
+    0xbfeed740e7684963,     0xbfd111d262b1f677,     // -0.96378, -0.26671
+    0xbfeebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     // -0.96043, -0.27852
+    0xbfee9f4156c62dda,     0xbfd294062ed59f05,     // -0.95694, -0.29028
+    0xbfee817bab4cd10d,     0xbfd35410c2e18152,     // -0.95331, -0.30201
+    0xbfee6288ec48e112,     0xbfd4135c94176602,     // -0.94953, -0.31368
+    0xbfee426a4b2bc17e,     0xbfd4d1e24278e76a,     // -0.94561, -0.32531
+    0xbfee212104f686e5,     0xbfd58f9a75ab1fdd,     // -0.94154, -0.33689
+    0xbfedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     // -0.93734, -0.34842
+    0xbfeddb13b6ccc23d,     0xbfd7088530fa459e,     // -0.93299,  -0.3599
+    0xbfedb6526238a09b,     0xbfd7c3a9311dcce7,     // -0.92851, -0.37132
+    0xbfed906bcf328d46,     0xbfd87de2a6aea963,     // -0.92388, -0.38268
+    0xbfed696173c9e68b,     0xbfd9372a63bc93d7,     // -0.91911, -0.39399
+    0xbfed4134d14dc93a,     0xbfd9ef7943a8ed8a,     // -0.91421, -0.40524
+    0xbfed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     // -0.90917, -0.41643
+    0xbfeced7af43cc773,     0xbfdb5d1009e15cc0,     // -0.90399, -0.42756
+    0xbfecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     // -0.89867, -0.43862
+    0xbfec954b213411f5,     0xbfdcc66e9931c45d,     // -0.89322, -0.44961
+    0xbfec678b3488739b,     0xbfdd79775b86e389,     // -0.88764, -0.46054
+    0xbfec38b2f180bdb1,     0xbfde2b5d3806f63b,     // -0.88192,  -0.4714
+    0xbfec08c426725549,     0xbfdedc1952ef78d5,     // -0.87607, -0.48218
+    0xbfebd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     // -0.87009,  -0.4929
+    0xbfeba5aa673590d2,     0xbfe01cfc874c3eb7,     // -0.86397, -0.50354
+    0xbfeb728345196e3e,     0xbfe073879922ffed,     // -0.85773,  -0.5141
+    0xbfeb3e4d3ef55712,     0xbfe0c9704d5d898f,     // -0.85136, -0.52459
+    0xbfeb090a58150200,     0xbfe11eb3541b4b22,     // -0.84485,   -0.535
+    0xbfead2bc9e21d511,     0xbfe1734d63dedb49,     // -0.83822, -0.54532
+    0xbfea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // -0.83147, -0.55557
+    0xbfea63091b02fae2,     0xbfe21a799933eb58,     // -0.82459, -0.56573
+    0xbfea29a7a0462782,     0xbfe26d054cdd12df,     // -0.81758, -0.57581
+    0xbfe9ef43ef29af94,     0xbfe2bedb25faf3ea,     // -0.81046,  -0.5858
+    0xbfe9b3e047f38741,     0xbfe30ff7fce17035,     // -0.80321,  -0.5957
+    0xbfe9777ef4c7d742,     0xbfe36058b10659f3,     // -0.79584, -0.60551
+    0xbfe93a22499263fc,     0xbfe3affa292050b9,     // -0.78835, -0.61523
+    0xbfe8fbcca3ef940d,     0xbfe3fed9534556d4,     // -0.78074, -0.62486
+    0xbfe8bc806b151741,     0xbfe44cf325091dd6,     // -0.77301, -0.63439
+    0xbfe87c400fba2ebf,     0xbfe49a449b9b0938,     // -0.76517, -0.64383
+    0xbfe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     // -0.75721, -0.65317
+    0xbfe7f8ece3571771,     0xbfe5328292a35596,     // -0.74914, -0.66242
+    0xbfe7b5df226aafb0,     0xbfe57d69348cec9f,     // -0.74095, -0.67156
+    0xbfe771e75f037261,     0xbfe5c77bbe65018c,     // -0.73265,  -0.6806
+    0xbfe72d0837efff97,     0xbfe610b7551d2cde,     // -0.72425, -0.68954
+    0xbfe6e74454eaa8ae,     0xbfe6591925f0783e,     // -0.71573, -0.69838
+    0xbfe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // -0.70711, -0.70711
+    0xbfe6591925f0783e,     0xbfe6e74454eaa8ae,     // -0.69838, -0.71573
+    0xbfe610b7551d2cde,     0xbfe72d0837efff97,     // -0.68954, -0.72425
+    0xbfe5c77bbe65018c,     0xbfe771e75f037261,     //  -0.6806, -0.73265
+    0xbfe57d69348cec9f,     0xbfe7b5df226aafb0,     // -0.67156, -0.74095
+    0xbfe5328292a35596,     0xbfe7f8ece3571771,     // -0.66242, -0.74914
+    0xbfe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     // -0.65317, -0.75721
+    0xbfe49a449b9b0938,     0xbfe87c400fba2ebf,     // -0.64383, -0.76517
+    0xbfe44cf325091dd6,     0xbfe8bc806b151741,     // -0.63439, -0.77301
+    0xbfe3fed9534556d4,     0xbfe8fbcca3ef940d,     // -0.62486, -0.78074
+    0xbfe3affa292050b9,     0xbfe93a22499263fc,     // -0.61523, -0.78835
+    0xbfe36058b10659f3,     0xbfe9777ef4c7d742,     // -0.60551, -0.79584
+    0xbfe30ff7fce17035,     0xbfe9b3e047f38741,     //  -0.5957, -0.80321
+    0xbfe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //  -0.5858, -0.81046
+    0xbfe26d054cdd12df,     0xbfea29a7a0462782,     // -0.57581, -0.81758
+    0xbfe21a799933eb58,     0xbfea63091b02fae2,     // -0.56573, -0.82459
+    0xbfe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // -0.55557, -0.83147
+    0xbfe1734d63dedb49,     0xbfead2bc9e21d511,     // -0.54532, -0.83822
+    0xbfe11eb3541b4b22,     0xbfeb090a58150200,     //   -0.535, -0.84485
+    0xbfe0c9704d5d898f,     0xbfeb3e4d3ef55712,     // -0.52459, -0.85136
+    0xbfe073879922ffed,     0xbfeb728345196e3e,     //  -0.5141, -0.85773
+    0xbfe01cfc874c3eb7,     0xbfeba5aa673590d2,     // -0.50354, -0.86397
+    0xbfdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //  -0.4929, -0.87009
+    0xbfdedc1952ef78d5,     0xbfec08c426725549,     // -0.48218, -0.87607
+    0xbfde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  -0.4714, -0.88192
+    0xbfdd79775b86e389,     0xbfec678b3488739b,     // -0.46054, -0.88764
+    0xbfdcc66e9931c45d,     0xbfec954b213411f5,     // -0.44961, -0.89322
+    0xbfdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     // -0.43862, -0.89867
+    0xbfdb5d1009e15cc0,     0xbfeced7af43cc773,     // -0.42756, -0.90399
+    0xbfdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     // -0.41643, -0.90917
+    0xbfd9ef7943a8ed8a,     0xbfed4134d14dc93a,     // -0.40524, -0.91421
+    0xbfd9372a63bc93d7,     0xbfed696173c9e68b,     // -0.39399, -0.91911
+    0xbfd87de2a6aea963,     0xbfed906bcf328d46,     // -0.38268, -0.92388
+    0xbfd7c3a9311dcce7,     0xbfedb6526238a09b,     // -0.37132, -0.92851
+    0xbfd7088530fa459e,     0xbfeddb13b6ccc23d,     //  -0.3599, -0.93299
+    0xbfd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     // -0.34842, -0.93734
+    0xbfd58f9a75ab1fdd,     0xbfee212104f686e5,     // -0.33689, -0.94154
+    0xbfd4d1e24278e76a,     0xbfee426a4b2bc17e,     // -0.32531, -0.94561
+    0xbfd4135c94176602,     0xbfee6288ec48e112,     // -0.31368, -0.94953
+    0xbfd35410c2e18152,     0xbfee817bab4cd10d,     // -0.30201, -0.95331
+    0xbfd294062ed59f05,     0xbfee9f4156c62dda,     // -0.29028, -0.95694
+    0xbfd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     // -0.27852, -0.96043
+    0xbfd111d262b1f677,     0xbfeed740e7684963,     // -0.26671, -0.96378
+    0xbfd04fb80e37fdae,     0xbfeef178a3e473c2,     // -0.25487, -0.96698
+    0xbfcf19f97b215f1a,     0xbfef0a7efb9230d7,     // -0.24298, -0.97003
+    0xbfcd934fe5454311,     0xbfef2252f7763ada,     // -0.23106, -0.97294
+    0xbfcc0b826a7e4f63,     0xbfef38f3ac64e589,     //  -0.2191,  -0.9757
+    0xbfca82a025b00451,     0xbfef4e603b0b2f2d,     // -0.20711, -0.97832
+    0xbfc8f8b83c69a60a,     0xbfef6297cff75cb0,     // -0.19509, -0.98079
+    0xbfc76dd9de50bf31,     0xbfef7599a3a12077,     // -0.18304, -0.98311
+    0xbfc5e214448b3fc6,     0xbfef8764fa714ba9,     // -0.17096, -0.98528
+    0xbfc45576b1293e5a,     0xbfef97f924c9099b,     // -0.15886,  -0.9873
+    0xbfc2c8106e8e613a,     0xbfefa7557f08a517,     // -0.14673, -0.98918
+    0xbfc139f0cedaf576,     0xbfefb5797195d741,     // -0.13458,  -0.9909
+    0xbfbf564e56a9730e,     0xbfefc26470e19fd3,     // -0.12241, -0.99248
+    0xbfbc3785c79ec2d5,     0xbfefce15fd6da67b,     // -0.11022, -0.99391
+    0xbfb917a6bc29b42c,     0xbfefd88da3d12526,     //-0.098017, -0.99518
+    0xbfb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     //-0.085797, -0.99631
+    0xbfb2d52092ce19f6,     0xbfefe9cdad01883a,     //-0.073565, -0.99729
+    0xbfaf656e79f820e0,     0xbfeff095658e71ad,     //-0.061321, -0.99812
+    0xbfa91f65f10dd814,     0xbfeff621e3796d7e,     //-0.049068,  -0.9988
+    0xbfa2d865759455cd,     0xbfeffa72effef75d,     //-0.036807, -0.99932
+    0xbf992155f7a3667e,     0xbfeffd886084cd0d,     //-0.024541,  -0.9997
+    0xbf8921d1fcdec784,     0xbfefff62169b92db,     //-0.012272, -0.99992
+    0x0000000000000000,     0xbff0000000000000,     //        0,       -1
+    0x3f8921d1fcdec784,     0xbfefff62169b92db,     // 0.012272, -0.99992
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     // 0.024541,  -0.9997
+    0x3fa2d865759455cd,     0xbfeffa72effef75d,     // 0.036807, -0.99932
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     // 0.049068,  -0.9988
+    0x3faf656e79f820e0,     0xbfeff095658e71ad,     // 0.061321, -0.99812
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     // 0.073565, -0.99729
+    0x3fb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     // 0.085797, -0.99631
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     // 0.098017, -0.99518
+    0x3fbc3785c79ec2d5,     0xbfefce15fd6da67b,     //  0.11022, -0.99391
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     //  0.12241, -0.99248
+    0x3fc139f0cedaf576,     0xbfefb5797195d741,     //  0.13458,  -0.9909
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //  0.14673, -0.98918
+    0x3fc45576b1293e5a,     0xbfef97f924c9099b,     //  0.15886,  -0.9873
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     //  0.17096, -0.98528
+    0x3fc76dd9de50bf31,     0xbfef7599a3a12077,     //  0.18304, -0.98311
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  0.19509, -0.98079
+    0x3fca82a025b00451,     0xbfef4e603b0b2f2d,     //  0.20711, -0.97832
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //   0.2191,  -0.9757
+    0x3fcd934fe5454311,     0xbfef2252f7763ada,     //  0.23106, -0.97294
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  0.24298, -0.97003
+    0x3fd04fb80e37fdae,     0xbfeef178a3e473c2,     //  0.25487, -0.96698
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     //  0.26671, -0.96378
+    0x3fd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //  0.27852, -0.96043
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //  0.29028, -0.95694
+    0x3fd35410c2e18152,     0xbfee817bab4cd10d,     //  0.30201, -0.95331
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     //  0.31368, -0.94953
+    0x3fd4d1e24278e76a,     0xbfee426a4b2bc17e,     //  0.32531, -0.94561
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //  0.33689, -0.94154
+    0x3fd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //  0.34842, -0.93734
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //   0.3599, -0.93299
+    0x3fd7c3a9311dcce7,     0xbfedb6526238a09b,     //  0.37132, -0.92851
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //  0.38268, -0.92388
+    0x3fd9372a63bc93d7,     0xbfed696173c9e68b,     //  0.39399, -0.91911
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //  0.40524, -0.91421
+    0x3fdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //  0.41643, -0.90917
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //  0.42756, -0.90399
+    0x3fdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //  0.43862, -0.89867
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     //  0.44961, -0.89322
+    0x3fdd79775b86e389,     0xbfec678b3488739b,     //  0.46054, -0.88764
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   0.4714, -0.88192
+    0x3fdedc1952ef78d5,     0xbfec08c426725549,     //  0.48218, -0.87607
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //   0.4929, -0.87009
+    0x3fe01cfc874c3eb7,     0xbfeba5aa673590d2,     //  0.50354, -0.86397
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //   0.5141, -0.85773
+    0x3fe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //  0.52459, -0.85136
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //    0.535, -0.84485
+    0x3fe1734d63dedb49,     0xbfead2bc9e21d511,     //  0.54532, -0.83822
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  0.55557, -0.83147
+    0x3fe21a799933eb58,     0xbfea63091b02fae2,     //  0.56573, -0.82459
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     //  0.57581, -0.81758
+    0x3fe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //   0.5858, -0.81046
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //   0.5957, -0.80321
+    0x3fe36058b10659f3,     0xbfe9777ef4c7d742,     //  0.60551, -0.79584
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     //  0.61523, -0.78835
+    0x3fe3fed9534556d4,     0xbfe8fbcca3ef940d,     //  0.62486, -0.78074
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //  0.63439, -0.77301
+    0x3fe49a449b9b0938,     0xbfe87c400fba2ebf,     //  0.64383, -0.76517
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //  0.65317, -0.75721
+    0x3fe5328292a35596,     0xbfe7f8ece3571771,     //  0.66242, -0.74914
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //  0.67156, -0.74095
+    0x3fe5c77bbe65018c,     0xbfe771e75f037261,     //   0.6806, -0.73265
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     //  0.68954, -0.72425
+    0x3fe6591925f0783e,     0xbfe6e74454eaa8ae,     //  0.69838, -0.71573
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  0.70711, -0.70711
+    0x3fe6e74454eaa8ae,     0xbfe6591925f0783e,     //  0.71573, -0.69838
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     //  0.72425, -0.68954
+    0x3fe771e75f037261,     0xbfe5c77bbe65018c,     //  0.73265,  -0.6806
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //  0.74095, -0.67156
+    0x3fe7f8ece3571771,     0xbfe5328292a35596,     //  0.74914, -0.66242
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //  0.75721, -0.65317
+    0x3fe87c400fba2ebf,     0xbfe49a449b9b0938,     //  0.76517, -0.64383
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //  0.77301, -0.63439
+    0x3fe8fbcca3ef940d,     0xbfe3fed9534556d4,     //  0.78074, -0.62486
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     //  0.78835, -0.61523
+    0x3fe9777ef4c7d742,     0xbfe36058b10659f3,     //  0.79584, -0.60551
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //  0.80321,  -0.5957
+    0x3fe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //  0.81046,  -0.5858
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     //  0.81758, -0.57581
+    0x3fea63091b02fae2,     0xbfe21a799933eb58,     //  0.82459, -0.56573
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  0.83147, -0.55557
+    0x3fead2bc9e21d511,     0xbfe1734d63dedb49,     //  0.83822, -0.54532
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     //  0.84485,   -0.535
+    0x3feb3e4d3ef55712,     0xbfe0c9704d5d898f,     //  0.85136, -0.52459
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //  0.85773,  -0.5141
+    0x3feba5aa673590d2,     0xbfe01cfc874c3eb7,     //  0.86397, -0.50354
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //  0.87009,  -0.4929
+    0x3fec08c426725549,     0xbfdedc1952ef78d5,     //  0.87607, -0.48218
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  0.88192,  -0.4714
+    0x3fec678b3488739b,     0xbfdd79775b86e389,     //  0.88764, -0.46054
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     //  0.89322, -0.44961
+    0x3fecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //  0.89867, -0.43862
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //  0.90399, -0.42756
+    0x3fed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //  0.90917, -0.41643
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //  0.91421, -0.40524
+    0x3fed696173c9e68b,     0xbfd9372a63bc93d7,     //  0.91911, -0.39399
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //  0.92388, -0.38268
+    0x3fedb6526238a09b,     0xbfd7c3a9311dcce7,     //  0.92851, -0.37132
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     //  0.93299,  -0.3599
+    0x3fedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //  0.93734, -0.34842
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //  0.94154, -0.33689
+    0x3fee426a4b2bc17e,     0xbfd4d1e24278e76a,     //  0.94561, -0.32531
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     //  0.94953, -0.31368
+    0x3fee817bab4cd10d,     0xbfd35410c2e18152,     //  0.95331, -0.30201
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //  0.95694, -0.29028
+    0x3feebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //  0.96043, -0.27852
+    0x3feed740e7684963,     0xbfd111d262b1f677,     //  0.96378, -0.26671
+    0x3feef178a3e473c2,     0xbfd04fb80e37fdae,     //  0.96698, -0.25487
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  0.97003, -0.24298
+    0x3fef2252f7763ada,     0xbfcd934fe5454311,     //  0.97294, -0.23106
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //   0.9757,  -0.2191
+    0x3fef4e603b0b2f2d,     0xbfca82a025b00451,     //  0.97832, -0.20711
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  0.98079, -0.19509
+    0x3fef7599a3a12077,     0xbfc76dd9de50bf31,     //  0.98311, -0.18304
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     //  0.98528, -0.17096
+    0x3fef97f924c9099b,     0xbfc45576b1293e5a,     //   0.9873, -0.15886
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //  0.98918, -0.14673
+    0x3fefb5797195d741,     0xbfc139f0cedaf576,     //   0.9909, -0.13458
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     //  0.99248, -0.12241
+    0x3fefce15fd6da67b,     0xbfbc3785c79ec2d5,     //  0.99391, -0.11022
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //  0.99518,-0.098017
+    0x3fefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //  0.99631,-0.085797
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     //  0.99729,-0.073565
+    0x3feff095658e71ad,     0xbfaf656e79f820e0,     //  0.99812,-0.061321
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //   0.9988,-0.049068
+    0x3feffa72effef75d,     0xbfa2d865759455cd,     //  0.99932,-0.036807
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //   0.9997,-0.024541
+    0x3fefff62169b92db,     0xbf8921d1fcdec784,     //  0.99992,-0.012272
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_1024)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_1024[2048] = {
+    0x3ff0000000000000,    0x0000000000000000,     //         1,         0
+    0x3fefffd8858e8a92,    0x3f7921f0fe670071,     //   0.99998, 0.0061359
+    0x3fefff62169b92db,    0x3f8921d1fcdec784,     //   0.99992,  0.012272
+    0x3feffe9cb44b51a1,    0x3f92d936bbe30efd,     //   0.99983,  0.018407
+    0x3feffd886084cd0d,    0x3f992155f7a3667e,     //    0.9997,  0.024541
+    0x3feffc251df1d3f8,    0x3f9f693731d1cf01,     //   0.99953,  0.030675
+    0x3feffa72effef75d,    0x3fa2d865759455cd,     //   0.99932,  0.036807
+    0x3feff871dadb81df,    0x3fa5fc00d290cd43,     //   0.99908,  0.042938
+    0x3feff621e3796d7e,    0x3fa91f65f10dd814,     //    0.9988,  0.049068
+    0x3feff3830f8d575c,    0x3fac428d12c0d7e3,     //   0.99848,  0.055195
+    0x3feff095658e71ad,    0x3faf656e79f820e0,     //   0.99812,  0.061321
+    0x3fefed58ecb673c4,    0x3fb1440134d709b2,     //   0.99772,  0.067444
+    0x3fefe9cdad01883a,    0x3fb2d52092ce19f6,     //   0.99729,  0.073565
+    0x3fefe5f3af2e3940,    0x3fb4661179272096,     //   0.99682,  0.079682
+    0x3fefe1cafcbd5b09,    0x3fb5f6d00a9aa419,     //   0.99631,  0.085797
+    0x3fefdd539ff1f456,    0x3fb787586a5d5b21,     //   0.99577,  0.091909
+    0x3fefd88da3d12526,    0x3fb917a6bc29b42c,     //   0.99518,  0.098017
+    0x3fefd37914220b84,    0x3fbaa7b724495c04,     //   0.99456,   0.10412
+    0x3fefce15fd6da67b,    0x3fbc3785c79ec2d5,     //   0.99391,   0.11022
+    0x3fefc8646cfeb721,    0x3fbdc70ecbae9fc8,     //   0.99321,   0.11632
+    0x3fefc26470e19fd3,    0x3fbf564e56a9730e,     //   0.99248,   0.12241
+    0x3fefbc1617e44186,    0x3fc072a047ba831d,     //   0.99171,    0.1285
+    0x3fefb5797195d741,    0x3fc139f0cedaf576,     //    0.9909,   0.13458
+    0x3fefae8e8e46cfbb,    0x3fc20116d4ec7bce,     //   0.99006,   0.14066
+    0x3fefa7557f08a517,    0x3fc2c8106e8e613a,     //   0.98918,   0.14673
+    0x3fef9fce55adb2c8,    0x3fc38edbb0cd8d14,     //   0.98826,    0.1528
+    0x3fef97f924c9099b,    0x3fc45576b1293e5a,     //    0.9873,   0.15886
+    0x3fef8fd5ffae41db,    0x3fc51bdf8597c5f2,     //   0.98631,   0.16491
+    0x3fef8764fa714ba9,    0x3fc5e214448b3fc6,     //   0.98528,   0.17096
+    0x3fef7ea629e63d6e,    0x3fc6a81304f64ab2,     //   0.98421,     0.177
+    0x3fef7599a3a12077,    0x3fc76dd9de50bf31,     //   0.98311,   0.18304
+    0x3fef6c3f7df5bbb7,    0x3fc83366e89c64c5,     //   0.98196,   0.18907
+    0x3fef6297cff75cb0,    0x3fc8f8b83c69a60a,     //   0.98079,   0.19509
+    0x3fef58a2b1789e84,    0x3fc9bdcbf2dc4366,     //   0.97957,    0.2011
+    0x3fef4e603b0b2f2d,    0x3fca82a025b00451,     //   0.97832,   0.20711
+    0x3fef43d085ff92dd,    0x3fcb4732ef3d6722,     //   0.97703,   0.21311
+    0x3fef38f3ac64e589,    0x3fcc0b826a7e4f63,     //    0.9757,    0.2191
+    0x3fef2dc9c9089a9d,    0x3fcccf8cb312b286,     //   0.97434,   0.22508
+    0x3fef2252f7763ada,    0x3fcd934fe5454311,     //   0.97294,   0.23106
+    0x3fef168f53f7205d,    0x3fce56ca1e101a1b,     //    0.9715,   0.23702
+    0x3fef0a7efb9230d7,    0x3fcf19f97b215f1a,     //   0.97003,   0.24298
+    0x3feefe220c0b95ec,    0x3fcfdcdc1adfedf8,     //   0.96852,   0.24893
+    0x3feef178a3e473c2,    0x3fd04fb80e37fdae,     //   0.96698,   0.25487
+    0x3feee482e25a9dbc,    0x3fd0b0d9cfdbdb90,     //   0.96539,   0.26079
+    0x3feed740e7684963,    0x3fd111d262b1f677,     //   0.96378,   0.26671
+    0x3feec9b2d3c3bf84,    0x3fd172a0d7765177,     //   0.96212,   0.27262
+    0x3feebbd8c8df0b74,    0x3fd1d3443f4cdb3d,     //   0.96043,   0.27852
+    0x3feeadb2e8e7a88e,    0x3fd233bbabc3bb72,     //    0.9587,   0.28441
+    0x3fee9f4156c62dda,    0x3fd294062ed59f05,     //   0.95694,   0.29028
+    0x3fee9084361df7f3,    0x3fd2f422daec0386,     //   0.95514,   0.29615
+    0x3fee817bab4cd10d,    0x3fd35410c2e18152,     //   0.95331,   0.30201
+    0x3fee7227db6a9744,    0x3fd3b3cefa0414b7,     //   0.95144,   0.30785
+    0x3fee6288ec48e112,    0x3fd4135c94176602,     //   0.94953,   0.31368
+    0x3fee529f04729ffc,    0x3fd472b8a5571054,     //   0.94759,    0.3195
+    0x3fee426a4b2bc17e,    0x3fd4d1e24278e76a,     //   0.94561,   0.32531
+    0x3fee31eae870ce25,    0x3fd530d880af3c24,     //   0.94359,   0.33111
+    0x3fee212104f686e5,    0x3fd58f9a75ab1fdd,     //   0.94154,   0.33689
+    0x3fee100cca2980ac,    0x3fd5ee27379ea693,     //   0.93946,   0.34266
+    0x3fedfeae622dbe2b,    0x3fd64c7ddd3f27c6,     //   0.93734,   0.34842
+    0x3feded05f7de47da,    0x3fd6aa9d7dc77e16,     //   0.93518,   0.35416
+    0x3feddb13b6ccc23d,    0x3fd7088530fa459e,     //   0.93299,    0.3599
+    0x3fedc8d7cb410260,    0x3fd766340f2418f6,     //   0.93077,   0.36561
+    0x3fedb6526238a09b,    0x3fd7c3a9311dcce7,     //   0.92851,   0.37132
+    0x3feda383a9668988,    0x3fd820e3b04eaac4,     //   0.92621,   0.37701
+    0x3fed906bcf328d46,    0x3fd87de2a6aea963,     //   0.92388,   0.38268
+    0x3fed7d0b02b8ecf9,    0x3fd8daa52ec8a4af,     //   0.92151,   0.38835
+    0x3fed696173c9e68b,    0x3fd9372a63bc93d7,     //   0.91911,   0.39399
+    0x3fed556f52e93eb1,    0x3fd993716141bdfe,     //   0.91668,   0.39962
+    0x3fed4134d14dc93a,    0x3fd9ef7943a8ed8a,     //   0.91421,   0.40524
+    0x3fed2cb220e0ef9f,    0x3fda4b4127dea1e4,     //   0.91171,   0.41084
+    0x3fed17e7743e35dc,    0x3fdaa6c82b6d3fc9,     //   0.90917,   0.41643
+    0x3fed02d4feb2bd92,    0x3fdb020d6c7f4009,     //    0.9066,     0.422
+    0x3feced7af43cc773,    0x3fdb5d1009e15cc0,     //   0.90399,   0.42756
+    0x3fecd7d9898b32f6,    0x3fdbb7cf2304bd01,     //   0.90135,   0.43309
+    0x3fecc1f0f3fcfc5c,    0x3fdc1249d8011ee7,     //   0.89867,   0.43862
+    0x3fecabc169a0b901,    0x3fdc6c7f4997000a,     //   0.89597,   0.44412
+    0x3fec954b213411f5,    0x3fdcc66e9931c45d,     //   0.89322,   0.44961
+    0x3fec7e8e52233cf3,    0x3fdd2016e8e9db5b,     //   0.89045,   0.45508
+    0x3fec678b3488739b,    0x3fdd79775b86e389,     //   0.88764,   0.46054
+    0x3fec5042012b6907,    0x3fddd28f1481cc58,     //    0.8848,   0.46598
+    0x3fec38b2f180bdb1,    0x3fde2b5d3806f63b,     //   0.88192,    0.4714
+    0x3fec20de3fa971b0,    0x3fde83e0eaf85113,     //   0.87901,    0.4768
+    0x3fec08c426725549,    0x3fdedc1952ef78d5,     //   0.87607,   0.48218
+    0x3febf064e15377dd,    0x3fdf3405963fd068,     //   0.87309,   0.48755
+    0x3febd7c0ac6f952a,    0x3fdf8ba4dbf89aba,     //   0.87009,    0.4929
+    0x3febbed7c49380ea,    0x3fdfe2f64be7120f,     //   0.86705,   0.49823
+    0x3feba5aa673590d2,    0x3fe01cfc874c3eb7,     //   0.86397,   0.50354
+    0x3feb8c38d27504e9,    0x3fe0485626ae221a,     //   0.86087,   0.50883
+    0x3feb728345196e3e,    0x3fe073879922ffed,     //   0.85773,    0.5141
+    0x3feb5889fe921405,    0x3fe09e907417c5e1,     //   0.85456,   0.51936
+    0x3feb3e4d3ef55712,    0x3fe0c9704d5d898f,     //   0.85136,   0.52459
+    0x3feb23cd470013b4,    0x3fe0f426bb2a8e7d,     //   0.84812,    0.5298
+    0x3feb090a58150200,    0x3fe11eb3541b4b22,     //   0.84485,     0.535
+    0x3feaee04b43c1474,    0x3fe14915af336ceb,     //   0.84155,   0.54017
+    0x3fead2bc9e21d511,    0x3fe1734d63dedb49,     //   0.83822,   0.54532
+    0x3feab7325916c0d4,    0x3fe19d5a09f2b9b8,     //   0.83486,   0.55046
+    0x3fea9b66290ea1a3,    0x3fe1c73b39ae68c8,     //   0.83147,   0.55557
+    0x3fea7f58529fe69d,    0x3fe1f0f08bbc861b,     //   0.82805,   0.56066
+    0x3fea63091b02fae2,    0x3fe21a799933eb58,     //   0.82459,   0.56573
+    0x3fea4678c8119ac8,    0x3fe243d5fb98ac1f,     //    0.8211,   0.57078
+    0x3fea29a7a0462782,    0x3fe26d054cdd12df,     //   0.81758,   0.57581
+    0x3fea0c95eabaf937,    0x3fe2960727629ca8,     //   0.81404,   0.58081
+    0x3fe9ef43ef29af94,    0x3fe2bedb25faf3ea,     //   0.81046,    0.5858
+    0x3fe9d1b1f5ea80d6,    0x3fe2e780e3e8ea16,     //   0.80685,   0.59076
+    0x3fe9b3e047f38741,    0x3fe30ff7fce17035,     //   0.80321,    0.5957
+    0x3fe995cf2ed80d22,    0x3fe338400d0c8e57,     //   0.79954,   0.60062
+    0x3fe9777ef4c7d742,    0x3fe36058b10659f3,     //   0.79584,   0.60551
+    0x3fe958efe48e6dd7,    0x3fe3884185dfeb22,     //   0.79211,   0.61038
+    0x3fe93a22499263fc,    0x3fe3affa292050b9,     //   0.78835,   0.61523
+    0x3fe91b166fd49da2,    0x3fe3d78238c58343,     //   0.78456,   0.62006
+    0x3fe8fbcca3ef940d,    0x3fe3fed9534556d4,     //   0.78074,   0.62486
+    0x3fe8dc45331698cc,    0x3fe425ff178e6bb1,     //   0.77689,   0.62964
+    0x3fe8bc806b151741,    0x3fe44cf325091dd6,     //   0.77301,   0.63439
+    0x3fe89c7e9a4dd4ab,    0x3fe473b51b987347,     //    0.7691,   0.63912
+    0x3fe87c400fba2ebf,    0x3fe49a449b9b0938,     //   0.76517,   0.64383
+    0x3fe85bc51ae958cc,    0x3fe4c0a145ec0004,     //    0.7612,   0.64851
+    0x3fe83b0e0bff976e,    0x3fe4e6cabbe3e5e9,     //   0.75721,   0.65317
+    0x3fe81a1b33b57acc,    0x3fe50cc09f59a09b,     //   0.75319,   0.65781
+    0x3fe7f8ece3571771,    0x3fe5328292a35596,     //   0.74914,   0.66242
+    0x3fe7d7836cc33db2,    0x3fe5581038975137,     //   0.74506,     0.667
+    0x3fe7b5df226aafb0,    0x3fe57d69348cec9f,     //   0.74095,   0.67156
+    0x3fe79400574f55e4,    0x3fe5a28d2a5d7250,     //   0.73682,   0.67609
+    0x3fe771e75f037261,    0x3fe5c77bbe65018c,     //   0.73265,    0.6806
+    0x3fe74f948da8d28d,    0x3fe5ec3495837074,     //   0.72846,   0.68508
+    0x3fe72d0837efff97,    0x3fe610b7551d2cde,     //   0.72425,   0.68954
+    0x3fe70a42b3176d7a,    0x3fe63503a31c1be8,     //      0.72,   0.69397
+    0x3fe6e74454eaa8ae,    0x3fe6591925f0783e,     //   0.71573,   0.69838
+    0x3fe6c40d73c18275,    0x3fe67cf78491af10,     //   0.71143,   0.70275
+    0x3fe6a09e667f3bcc,    0x3fe6a09e667f3bcc,     //   0.70711,   0.70711
+    0x3fe67cf78491af10,    0x3fe6c40d73c18275,     //   0.70275,   0.71143
+    0x3fe6591925f0783e,    0x3fe6e74454eaa8ae,     //   0.69838,   0.71573
+    0x3fe63503a31c1be8,    0x3fe70a42b3176d7a,     //   0.69397,      0.72
+    0x3fe610b7551d2cde,    0x3fe72d0837efff97,     //   0.68954,   0.72425
+    0x3fe5ec3495837074,    0x3fe74f948da8d28d,     //   0.68508,   0.72846
+    0x3fe5c77bbe65018c,    0x3fe771e75f037261,     //    0.6806,   0.73265
+    0x3fe5a28d2a5d7250,    0x3fe79400574f55e4,     //   0.67609,   0.73682
+    0x3fe57d69348cec9f,    0x3fe7b5df226aafb0,     //   0.67156,   0.74095
+    0x3fe5581038975137,    0x3fe7d7836cc33db2,     //     0.667,   0.74506
+    0x3fe5328292a35596,    0x3fe7f8ece3571771,     //   0.66242,   0.74914
+    0x3fe50cc09f59a09b,    0x3fe81a1b33b57acc,     //   0.65781,   0.75319
+    0x3fe4e6cabbe3e5e9,    0x3fe83b0e0bff976e,     //   0.65317,   0.75721
+    0x3fe4c0a145ec0004,    0x3fe85bc51ae958cc,     //   0.64851,    0.7612
+    0x3fe49a449b9b0938,    0x3fe87c400fba2ebf,     //   0.64383,   0.76517
+    0x3fe473b51b987347,    0x3fe89c7e9a4dd4ab,     //   0.63912,    0.7691
+    0x3fe44cf325091dd6,    0x3fe8bc806b151741,     //   0.63439,   0.77301
+    0x3fe425ff178e6bb1,    0x3fe8dc45331698cc,     //   0.62964,   0.77689
+    0x3fe3fed9534556d4,    0x3fe8fbcca3ef940d,     //   0.62486,   0.78074
+    0x3fe3d78238c58343,    0x3fe91b166fd49da2,     //   0.62006,   0.78456
+    0x3fe3affa292050b9,    0x3fe93a22499263fc,     //   0.61523,   0.78835
+    0x3fe3884185dfeb22,    0x3fe958efe48e6dd7,     //   0.61038,   0.79211
+    0x3fe36058b10659f3,    0x3fe9777ef4c7d742,     //   0.60551,   0.79584
+    0x3fe338400d0c8e57,    0x3fe995cf2ed80d22,     //   0.60062,   0.79954
+    0x3fe30ff7fce17035,    0x3fe9b3e047f38741,     //    0.5957,   0.80321
+    0x3fe2e780e3e8ea16,    0x3fe9d1b1f5ea80d6,     //   0.59076,   0.80685
+    0x3fe2bedb25faf3ea,    0x3fe9ef43ef29af94,     //    0.5858,   0.81046
+    0x3fe2960727629ca8,    0x3fea0c95eabaf937,     //   0.58081,   0.81404
+    0x3fe26d054cdd12df,    0x3fea29a7a0462782,     //   0.57581,   0.81758
+    0x3fe243d5fb98ac1f,    0x3fea4678c8119ac8,     //   0.57078,    0.8211
+    0x3fe21a799933eb58,    0x3fea63091b02fae2,     //   0.56573,   0.82459
+    0x3fe1f0f08bbc861b,    0x3fea7f58529fe69d,     //   0.56066,   0.82805
+    0x3fe1c73b39ae68c8,    0x3fea9b66290ea1a3,     //   0.55557,   0.83147
+    0x3fe19d5a09f2b9b8,    0x3feab7325916c0d4,     //   0.55046,   0.83486
+    0x3fe1734d63dedb49,    0x3fead2bc9e21d511,     //   0.54532,   0.83822
+    0x3fe14915af336ceb,    0x3feaee04b43c1474,     //   0.54017,   0.84155
+    0x3fe11eb3541b4b22,    0x3feb090a58150200,     //     0.535,   0.84485
+    0x3fe0f426bb2a8e7d,    0x3feb23cd470013b4,     //    0.5298,   0.84812
+    0x3fe0c9704d5d898f,    0x3feb3e4d3ef55712,     //   0.52459,   0.85136
+    0x3fe09e907417c5e1,    0x3feb5889fe921405,     //   0.51936,   0.85456
+    0x3fe073879922ffed,    0x3feb728345196e3e,     //    0.5141,   0.85773
+    0x3fe0485626ae221a,    0x3feb8c38d27504e9,     //   0.50883,   0.86087
+    0x3fe01cfc874c3eb7,    0x3feba5aa673590d2,     //   0.50354,   0.86397
+    0x3fdfe2f64be7120f,    0x3febbed7c49380ea,     //   0.49823,   0.86705
+    0x3fdf8ba4dbf89aba,    0x3febd7c0ac6f952a,     //    0.4929,   0.87009
+    0x3fdf3405963fd068,    0x3febf064e15377dd,     //   0.48755,   0.87309
+    0x3fdedc1952ef78d5,    0x3fec08c426725549,     //   0.48218,   0.87607
+    0x3fde83e0eaf85113,    0x3fec20de3fa971b0,     //    0.4768,   0.87901
+    0x3fde2b5d3806f63b,    0x3fec38b2f180bdb1,     //    0.4714,   0.88192
+    0x3fddd28f1481cc58,    0x3fec5042012b6907,     //   0.46598,    0.8848
+    0x3fdd79775b86e389,    0x3fec678b3488739b,     //   0.46054,   0.88764
+    0x3fdd2016e8e9db5b,    0x3fec7e8e52233cf3,     //   0.45508,   0.89045
+    0x3fdcc66e9931c45d,    0x3fec954b213411f5,     //   0.44961,   0.89322
+    0x3fdc6c7f4997000a,    0x3fecabc169a0b901,     //   0.44412,   0.89597
+    0x3fdc1249d8011ee7,    0x3fecc1f0f3fcfc5c,     //   0.43862,   0.89867
+    0x3fdbb7cf2304bd01,    0x3fecd7d9898b32f6,     //   0.43309,   0.90135
+    0x3fdb5d1009e15cc0,    0x3feced7af43cc773,     //   0.42756,   0.90399
+    0x3fdb020d6c7f4009,    0x3fed02d4feb2bd92,     //     0.422,    0.9066
+    0x3fdaa6c82b6d3fc9,    0x3fed17e7743e35dc,     //   0.41643,   0.90917
+    0x3fda4b4127dea1e4,    0x3fed2cb220e0ef9f,     //   0.41084,   0.91171
+    0x3fd9ef7943a8ed8a,    0x3fed4134d14dc93a,     //   0.40524,   0.91421
+    0x3fd993716141bdfe,    0x3fed556f52e93eb1,     //   0.39962,   0.91668
+    0x3fd9372a63bc93d7,    0x3fed696173c9e68b,     //   0.39399,   0.91911
+    0x3fd8daa52ec8a4af,    0x3fed7d0b02b8ecf9,     //   0.38835,   0.92151
+    0x3fd87de2a6aea963,    0x3fed906bcf328d46,     //   0.38268,   0.92388
+    0x3fd820e3b04eaac4,    0x3feda383a9668988,     //   0.37701,   0.92621
+    0x3fd7c3a9311dcce7,    0x3fedb6526238a09b,     //   0.37132,   0.92851
+    0x3fd766340f2418f6,    0x3fedc8d7cb410260,     //   0.36561,   0.93077
+    0x3fd7088530fa459e,    0x3feddb13b6ccc23d,     //    0.3599,   0.93299
+    0x3fd6aa9d7dc77e16,    0x3feded05f7de47da,     //   0.35416,   0.93518
+    0x3fd64c7ddd3f27c6,    0x3fedfeae622dbe2b,     //   0.34842,   0.93734
+    0x3fd5ee27379ea693,    0x3fee100cca2980ac,     //   0.34266,   0.93946
+    0x3fd58f9a75ab1fdd,    0x3fee212104f686e5,     //   0.33689,   0.94154
+    0x3fd530d880af3c24,    0x3fee31eae870ce25,     //   0.33111,   0.94359
+    0x3fd4d1e24278e76a,    0x3fee426a4b2bc17e,     //   0.32531,   0.94561
+    0x3fd472b8a5571054,    0x3fee529f04729ffc,     //    0.3195,   0.94759
+    0x3fd4135c94176602,    0x3fee6288ec48e112,     //   0.31368,   0.94953
+    0x3fd3b3cefa0414b7,    0x3fee7227db6a9744,     //   0.30785,   0.95144
+    0x3fd35410c2e18152,    0x3fee817bab4cd10d,     //   0.30201,   0.95331
+    0x3fd2f422daec0386,    0x3fee9084361df7f3,     //   0.29615,   0.95514
+    0x3fd294062ed59f05,    0x3fee9f4156c62dda,     //   0.29028,   0.95694
+    0x3fd233bbabc3bb72,    0x3feeadb2e8e7a88e,     //   0.28441,    0.9587
+    0x3fd1d3443f4cdb3d,    0x3feebbd8c8df0b74,     //   0.27852,   0.96043
+    0x3fd172a0d7765177,    0x3feec9b2d3c3bf84,     //   0.27262,   0.96212
+    0x3fd111d262b1f677,    0x3feed740e7684963,     //   0.26671,   0.96378
+    0x3fd0b0d9cfdbdb90,    0x3feee482e25a9dbc,     //   0.26079,   0.96539
+    0x3fd04fb80e37fdae,    0x3feef178a3e473c2,     //   0.25487,   0.96698
+    0x3fcfdcdc1adfedf8,    0x3feefe220c0b95ec,     //   0.24893,   0.96852
+    0x3fcf19f97b215f1a,    0x3fef0a7efb9230d7,     //   0.24298,   0.97003
+    0x3fce56ca1e101a1b,    0x3fef168f53f7205d,     //   0.23702,    0.9715
+    0x3fcd934fe5454311,    0x3fef2252f7763ada,     //   0.23106,   0.97294
+    0x3fcccf8cb312b286,    0x3fef2dc9c9089a9d,     //   0.22508,   0.97434
+    0x3fcc0b826a7e4f63,    0x3fef38f3ac64e589,     //    0.2191,    0.9757
+    0x3fcb4732ef3d6722,    0x3fef43d085ff92dd,     //   0.21311,   0.97703
+    0x3fca82a025b00451,    0x3fef4e603b0b2f2d,     //   0.20711,   0.97832
+    0x3fc9bdcbf2dc4366,    0x3fef58a2b1789e84,     //    0.2011,   0.97957
+    0x3fc8f8b83c69a60a,    0x3fef6297cff75cb0,     //   0.19509,   0.98079
+    0x3fc83366e89c64c5,    0x3fef6c3f7df5bbb7,     //   0.18907,   0.98196
+    0x3fc76dd9de50bf31,    0x3fef7599a3a12077,     //   0.18304,   0.98311
+    0x3fc6a81304f64ab2,    0x3fef7ea629e63d6e,     //     0.177,   0.98421
+    0x3fc5e214448b3fc6,    0x3fef8764fa714ba9,     //   0.17096,   0.98528
+    0x3fc51bdf8597c5f2,    0x3fef8fd5ffae41db,     //   0.16491,   0.98631
+    0x3fc45576b1293e5a,    0x3fef97f924c9099b,     //   0.15886,    0.9873
+    0x3fc38edbb0cd8d14,    0x3fef9fce55adb2c8,     //    0.1528,   0.98826
+    0x3fc2c8106e8e613a,    0x3fefa7557f08a517,     //   0.14673,   0.98918
+    0x3fc20116d4ec7bce,    0x3fefae8e8e46cfbb,     //   0.14066,   0.99006
+    0x3fc139f0cedaf576,    0x3fefb5797195d741,     //   0.13458,    0.9909
+    0x3fc072a047ba831d,    0x3fefbc1617e44186,     //    0.1285,   0.99171
+    0x3fbf564e56a9730e,    0x3fefc26470e19fd3,     //   0.12241,   0.99248
+    0x3fbdc70ecbae9fc8,    0x3fefc8646cfeb721,     //   0.11632,   0.99321
+    0x3fbc3785c79ec2d5,    0x3fefce15fd6da67b,     //   0.11022,   0.99391
+    0x3fbaa7b724495c04,    0x3fefd37914220b84,     //   0.10412,   0.99456
+    0x3fb917a6bc29b42c,    0x3fefd88da3d12526,     //  0.098017,   0.99518
+    0x3fb787586a5d5b21,    0x3fefdd539ff1f456,     //  0.091909,   0.99577
+    0x3fb5f6d00a9aa419,    0x3fefe1cafcbd5b09,     //  0.085797,   0.99631
+    0x3fb4661179272096,    0x3fefe5f3af2e3940,     //  0.079682,   0.99682
+    0x3fb2d52092ce19f6,    0x3fefe9cdad01883a,     //  0.073565,   0.99729
+    0x3fb1440134d709b2,    0x3fefed58ecb673c4,     //  0.067444,   0.99772
+    0x3faf656e79f820e0,    0x3feff095658e71ad,     //  0.061321,   0.99812
+    0x3fac428d12c0d7e3,    0x3feff3830f8d575c,     //  0.055195,   0.99848
+    0x3fa91f65f10dd814,    0x3feff621e3796d7e,     //  0.049068,    0.9988
+    0x3fa5fc00d290cd43,    0x3feff871dadb81df,     //  0.042938,   0.99908
+    0x3fa2d865759455cd,    0x3feffa72effef75d,     //  0.036807,   0.99932
+    0x3f9f693731d1cf01,    0x3feffc251df1d3f8,     //  0.030675,   0.99953
+    0x3f992155f7a3667e,    0x3feffd886084cd0d,     //  0.024541,    0.9997
+    0x3f92d936bbe30efd,    0x3feffe9cb44b51a1,     //  0.018407,   0.99983
+    0x3f8921d1fcdec784,    0x3fefff62169b92db,     //  0.012272,   0.99992
+    0x3f7921f0fe670071,    0x3fefffd8858e8a92,     // 0.0061359,   0.99998
+    0x0000000000000000,    0x3ff0000000000000,     //         0,         1
+    0xbf7921f0fe670071,    0x3fefffd8858e8a92,     //-0.0061359,   0.99998
+    0xbf8921d1fcdec784,    0x3fefff62169b92db,     // -0.012272,   0.99992
+    0xbf92d936bbe30efd,    0x3feffe9cb44b51a1,     // -0.018407,   0.99983
+    0xbf992155f7a3667e,    0x3feffd886084cd0d,     // -0.024541,    0.9997
+    0xbf9f693731d1cf01,    0x3feffc251df1d3f8,     // -0.030675,   0.99953
+    0xbfa2d865759455cd,    0x3feffa72effef75d,     // -0.036807,   0.99932
+    0xbfa5fc00d290cd43,    0x3feff871dadb81df,     // -0.042938,   0.99908
+    0xbfa91f65f10dd814,    0x3feff621e3796d7e,     // -0.049068,    0.9988
+    0xbfac428d12c0d7e3,    0x3feff3830f8d575c,     // -0.055195,   0.99848
+    0xbfaf656e79f820e0,    0x3feff095658e71ad,     // -0.061321,   0.99812
+    0xbfb1440134d709b2,    0x3fefed58ecb673c4,     // -0.067444,   0.99772
+    0xbfb2d52092ce19f6,    0x3fefe9cdad01883a,     // -0.073565,   0.99729
+    0xbfb4661179272096,    0x3fefe5f3af2e3940,     // -0.079682,   0.99682
+    0xbfb5f6d00a9aa419,    0x3fefe1cafcbd5b09,     // -0.085797,   0.99631
+    0xbfb787586a5d5b21,    0x3fefdd539ff1f456,     // -0.091909,   0.99577
+    0xbfb917a6bc29b42c,    0x3fefd88da3d12526,     // -0.098017,   0.99518
+    0xbfbaa7b724495c04,    0x3fefd37914220b84,     //  -0.10412,   0.99456
+    0xbfbc3785c79ec2d5,    0x3fefce15fd6da67b,     //  -0.11022,   0.99391
+    0xbfbdc70ecbae9fc8,    0x3fefc8646cfeb721,     //  -0.11632,   0.99321
+    0xbfbf564e56a9730e,    0x3fefc26470e19fd3,     //  -0.12241,   0.99248
+    0xbfc072a047ba831d,    0x3fefbc1617e44186,     //   -0.1285,   0.99171
+    0xbfc139f0cedaf576,    0x3fefb5797195d741,     //  -0.13458,    0.9909
+    0xbfc20116d4ec7bce,    0x3fefae8e8e46cfbb,     //  -0.14066,   0.99006
+    0xbfc2c8106e8e613a,    0x3fefa7557f08a517,     //  -0.14673,   0.98918
+    0xbfc38edbb0cd8d14,    0x3fef9fce55adb2c8,     //   -0.1528,   0.98826
+    0xbfc45576b1293e5a,    0x3fef97f924c9099b,     //  -0.15886,    0.9873
+    0xbfc51bdf8597c5f2,    0x3fef8fd5ffae41db,     //  -0.16491,   0.98631
+    0xbfc5e214448b3fc6,    0x3fef8764fa714ba9,     //  -0.17096,   0.98528
+    0xbfc6a81304f64ab2,    0x3fef7ea629e63d6e,     //    -0.177,   0.98421
+    0xbfc76dd9de50bf31,    0x3fef7599a3a12077,     //  -0.18304,   0.98311
+    0xbfc83366e89c64c5,    0x3fef6c3f7df5bbb7,     //  -0.18907,   0.98196
+    0xbfc8f8b83c69a60a,    0x3fef6297cff75cb0,     //  -0.19509,   0.98079
+    0xbfc9bdcbf2dc4366,    0x3fef58a2b1789e84,     //   -0.2011,   0.97957
+    0xbfca82a025b00451,    0x3fef4e603b0b2f2d,     //  -0.20711,   0.97832
+    0xbfcb4732ef3d6722,    0x3fef43d085ff92dd,     //  -0.21311,   0.97703
+    0xbfcc0b826a7e4f63,    0x3fef38f3ac64e589,     //   -0.2191,    0.9757
+    0xbfcccf8cb312b286,    0x3fef2dc9c9089a9d,     //  -0.22508,   0.97434
+    0xbfcd934fe5454311,    0x3fef2252f7763ada,     //  -0.23106,   0.97294
+    0xbfce56ca1e101a1b,    0x3fef168f53f7205d,     //  -0.23702,    0.9715
+    0xbfcf19f97b215f1a,    0x3fef0a7efb9230d7,     //  -0.24298,   0.97003
+    0xbfcfdcdc1adfedf8,    0x3feefe220c0b95ec,     //  -0.24893,   0.96852
+    0xbfd04fb80e37fdae,    0x3feef178a3e473c2,     //  -0.25487,   0.96698
+    0xbfd0b0d9cfdbdb90,    0x3feee482e25a9dbc,     //  -0.26079,   0.96539
+    0xbfd111d262b1f677,    0x3feed740e7684963,     //  -0.26671,   0.96378
+    0xbfd172a0d7765177,    0x3feec9b2d3c3bf84,     //  -0.27262,   0.96212
+    0xbfd1d3443f4cdb3d,    0x3feebbd8c8df0b74,     //  -0.27852,   0.96043
+    0xbfd233bbabc3bb72,    0x3feeadb2e8e7a88e,     //  -0.28441,    0.9587
+    0xbfd294062ed59f05,    0x3fee9f4156c62dda,     //  -0.29028,   0.95694
+    0xbfd2f422daec0386,    0x3fee9084361df7f3,     //  -0.29615,   0.95514
+    0xbfd35410c2e18152,    0x3fee817bab4cd10d,     //  -0.30201,   0.95331
+    0xbfd3b3cefa0414b7,    0x3fee7227db6a9744,     //  -0.30785,   0.95144
+    0xbfd4135c94176602,    0x3fee6288ec48e112,     //  -0.31368,   0.94953
+    0xbfd472b8a5571054,    0x3fee529f04729ffc,     //   -0.3195,   0.94759
+    0xbfd4d1e24278e76a,    0x3fee426a4b2bc17e,     //  -0.32531,   0.94561
+    0xbfd530d880af3c24,    0x3fee31eae870ce25,     //  -0.33111,   0.94359
+    0xbfd58f9a75ab1fdd,    0x3fee212104f686e5,     //  -0.33689,   0.94154
+    0xbfd5ee27379ea693,    0x3fee100cca2980ac,     //  -0.34266,   0.93946
+    0xbfd64c7ddd3f27c6,    0x3fedfeae622dbe2b,     //  -0.34842,   0.93734
+    0xbfd6aa9d7dc77e16,    0x3feded05f7de47da,     //  -0.35416,   0.93518
+    0xbfd7088530fa459e,    0x3feddb13b6ccc23d,     //   -0.3599,   0.93299
+    0xbfd766340f2418f6,    0x3fedc8d7cb410260,     //  -0.36561,   0.93077
+    0xbfd7c3a9311dcce7,    0x3fedb6526238a09b,     //  -0.37132,   0.92851
+    0xbfd820e3b04eaac4,    0x3feda383a9668988,     //  -0.37701,   0.92621
+    0xbfd87de2a6aea963,    0x3fed906bcf328d46,     //  -0.38268,   0.92388
+    0xbfd8daa52ec8a4af,    0x3fed7d0b02b8ecf9,     //  -0.38835,   0.92151
+    0xbfd9372a63bc93d7,    0x3fed696173c9e68b,     //  -0.39399,   0.91911
+    0xbfd993716141bdfe,    0x3fed556f52e93eb1,     //  -0.39962,   0.91668
+    0xbfd9ef7943a8ed8a,    0x3fed4134d14dc93a,     //  -0.40524,   0.91421
+    0xbfda4b4127dea1e4,    0x3fed2cb220e0ef9f,     //  -0.41084,   0.91171
+    0xbfdaa6c82b6d3fc9,    0x3fed17e7743e35dc,     //  -0.41643,   0.90917
+    0xbfdb020d6c7f4009,    0x3fed02d4feb2bd92,     //    -0.422,    0.9066
+    0xbfdb5d1009e15cc0,    0x3feced7af43cc773,     //  -0.42756,   0.90399
+    0xbfdbb7cf2304bd01,    0x3fecd7d9898b32f6,     //  -0.43309,   0.90135
+    0xbfdc1249d8011ee7,    0x3fecc1f0f3fcfc5c,     //  -0.43862,   0.89867
+    0xbfdc6c7f4997000a,    0x3fecabc169a0b901,     //  -0.44412,   0.89597
+    0xbfdcc66e9931c45d,    0x3fec954b213411f5,     //  -0.44961,   0.89322
+    0xbfdd2016e8e9db5b,    0x3fec7e8e52233cf3,     //  -0.45508,   0.89045
+    0xbfdd79775b86e389,    0x3fec678b3488739b,     //  -0.46054,   0.88764
+    0xbfddd28f1481cc58,    0x3fec5042012b6907,     //  -0.46598,    0.8848
+    0xbfde2b5d3806f63b,    0x3fec38b2f180bdb1,     //   -0.4714,   0.88192
+    0xbfde83e0eaf85113,    0x3fec20de3fa971b0,     //   -0.4768,   0.87901
+    0xbfdedc1952ef78d5,    0x3fec08c426725549,     //  -0.48218,   0.87607
+    0xbfdf3405963fd068,    0x3febf064e15377dd,     //  -0.48755,   0.87309
+    0xbfdf8ba4dbf89aba,    0x3febd7c0ac6f952a,     //   -0.4929,   0.87009
+    0xbfdfe2f64be7120f,    0x3febbed7c49380ea,     //  -0.49823,   0.86705
+    0xbfe01cfc874c3eb7,    0x3feba5aa673590d2,     //  -0.50354,   0.86397
+    0xbfe0485626ae221a,    0x3feb8c38d27504e9,     //  -0.50883,   0.86087
+    0xbfe073879922ffed,    0x3feb728345196e3e,     //   -0.5141,   0.85773
+    0xbfe09e907417c5e1,    0x3feb5889fe921405,     //  -0.51936,   0.85456
+    0xbfe0c9704d5d898f,    0x3feb3e4d3ef55712,     //  -0.52459,   0.85136
+    0xbfe0f426bb2a8e7d,    0x3feb23cd470013b4,     //   -0.5298,   0.84812
+    0xbfe11eb3541b4b22,    0x3feb090a58150200,     //    -0.535,   0.84485
+    0xbfe14915af336ceb,    0x3feaee04b43c1474,     //  -0.54017,   0.84155
+    0xbfe1734d63dedb49,    0x3fead2bc9e21d511,     //  -0.54532,   0.83822
+    0xbfe19d5a09f2b9b8,    0x3feab7325916c0d4,     //  -0.55046,   0.83486
+    0xbfe1c73b39ae68c8,    0x3fea9b66290ea1a3,     //  -0.55557,   0.83147
+    0xbfe1f0f08bbc861b,    0x3fea7f58529fe69d,     //  -0.56066,   0.82805
+    0xbfe21a799933eb58,    0x3fea63091b02fae2,     //  -0.56573,   0.82459
+    0xbfe243d5fb98ac1f,    0x3fea4678c8119ac8,     //  -0.57078,    0.8211
+    0xbfe26d054cdd12df,    0x3fea29a7a0462782,     //  -0.57581,   0.81758
+    0xbfe2960727629ca8,    0x3fea0c95eabaf937,     //  -0.58081,   0.81404
+    0xbfe2bedb25faf3ea,    0x3fe9ef43ef29af94,     //   -0.5858,   0.81046
+    0xbfe2e780e3e8ea16,    0x3fe9d1b1f5ea80d6,     //  -0.59076,   0.80685
+    0xbfe30ff7fce17035,    0x3fe9b3e047f38741,     //   -0.5957,   0.80321
+    0xbfe338400d0c8e57,    0x3fe995cf2ed80d22,     //  -0.60062,   0.79954
+    0xbfe36058b10659f3,    0x3fe9777ef4c7d742,     //  -0.60551,   0.79584
+    0xbfe3884185dfeb22,    0x3fe958efe48e6dd7,     //  -0.61038,   0.79211
+    0xbfe3affa292050b9,    0x3fe93a22499263fc,     //  -0.61523,   0.78835
+    0xbfe3d78238c58343,    0x3fe91b166fd49da2,     //  -0.62006,   0.78456
+    0xbfe3fed9534556d4,    0x3fe8fbcca3ef940d,     //  -0.62486,   0.78074
+    0xbfe425ff178e6bb1,    0x3fe8dc45331698cc,     //  -0.62964,   0.77689
+    0xbfe44cf325091dd6,    0x3fe8bc806b151741,     //  -0.63439,   0.77301
+    0xbfe473b51b987347,    0x3fe89c7e9a4dd4ab,     //  -0.63912,    0.7691
+    0xbfe49a449b9b0938,    0x3fe87c400fba2ebf,     //  -0.64383,   0.76517
+    0xbfe4c0a145ec0004,    0x3fe85bc51ae958cc,     //  -0.64851,    0.7612
+    0xbfe4e6cabbe3e5e9,    0x3fe83b0e0bff976e,     //  -0.65317,   0.75721
+    0xbfe50cc09f59a09b,    0x3fe81a1b33b57acc,     //  -0.65781,   0.75319
+    0xbfe5328292a35596,    0x3fe7f8ece3571771,     //  -0.66242,   0.74914
+    0xbfe5581038975137,    0x3fe7d7836cc33db2,     //    -0.667,   0.74506
+    0xbfe57d69348cec9f,    0x3fe7b5df226aafb0,     //  -0.67156,   0.74095
+    0xbfe5a28d2a5d7250,    0x3fe79400574f55e4,     //  -0.67609,   0.73682
+    0xbfe5c77bbe65018c,    0x3fe771e75f037261,     //   -0.6806,   0.73265
+    0xbfe5ec3495837074,    0x3fe74f948da8d28d,     //  -0.68508,   0.72846
+    0xbfe610b7551d2cde,    0x3fe72d0837efff97,     //  -0.68954,   0.72425
+    0xbfe63503a31c1be8,    0x3fe70a42b3176d7a,     //  -0.69397,      0.72
+    0xbfe6591925f0783e,    0x3fe6e74454eaa8ae,     //  -0.69838,   0.71573
+    0xbfe67cf78491af10,    0x3fe6c40d73c18275,     //  -0.70275,   0.71143
+    0xbfe6a09e667f3bcc,    0x3fe6a09e667f3bcc,     //  -0.70711,   0.70711
+    0xbfe6c40d73c18275,    0x3fe67cf78491af10,     //  -0.71143,   0.70275
+    0xbfe6e74454eaa8ae,    0x3fe6591925f0783e,     //  -0.71573,   0.69838
+    0xbfe70a42b3176d7a,    0x3fe63503a31c1be8,     //     -0.72,   0.69397
+    0xbfe72d0837efff97,    0x3fe610b7551d2cde,     //  -0.72425,   0.68954
+    0xbfe74f948da8d28d,    0x3fe5ec3495837074,     //  -0.72846,   0.68508
+    0xbfe771e75f037261,    0x3fe5c77bbe65018c,     //  -0.73265,    0.6806
+    0xbfe79400574f55e4,    0x3fe5a28d2a5d7250,     //  -0.73682,   0.67609
+    0xbfe7b5df226aafb0,    0x3fe57d69348cec9f,     //  -0.74095,   0.67156
+    0xbfe7d7836cc33db2,    0x3fe5581038975137,     //  -0.74506,     0.667
+    0xbfe7f8ece3571771,    0x3fe5328292a35596,     //  -0.74914,   0.66242
+    0xbfe81a1b33b57acc,    0x3fe50cc09f59a09b,     //  -0.75319,   0.65781
+    0xbfe83b0e0bff976e,    0x3fe4e6cabbe3e5e9,     //  -0.75721,   0.65317
+    0xbfe85bc51ae958cc,    0x3fe4c0a145ec0004,     //   -0.7612,   0.64851
+    0xbfe87c400fba2ebf,    0x3fe49a449b9b0938,     //  -0.76517,   0.64383
+    0xbfe89c7e9a4dd4ab,    0x3fe473b51b987347,     //   -0.7691,   0.63912
+    0xbfe8bc806b151741,    0x3fe44cf325091dd6,     //  -0.77301,   0.63439
+    0xbfe8dc45331698cc,    0x3fe425ff178e6bb1,     //  -0.77689,   0.62964
+    0xbfe8fbcca3ef940d,    0x3fe3fed9534556d4,     //  -0.78074,   0.62486
+    0xbfe91b166fd49da2,    0x3fe3d78238c58343,     //  -0.78456,   0.62006
+    0xbfe93a22499263fc,    0x3fe3affa292050b9,     //  -0.78835,   0.61523
+    0xbfe958efe48e6dd7,    0x3fe3884185dfeb22,     //  -0.79211,   0.61038
+    0xbfe9777ef4c7d742,    0x3fe36058b10659f3,     //  -0.79584,   0.60551
+    0xbfe995cf2ed80d22,    0x3fe338400d0c8e57,     //  -0.79954,   0.60062
+    0xbfe9b3e047f38741,    0x3fe30ff7fce17035,     //  -0.80321,    0.5957
+    0xbfe9d1b1f5ea80d6,    0x3fe2e780e3e8ea16,     //  -0.80685,   0.59076
+    0xbfe9ef43ef29af94,    0x3fe2bedb25faf3ea,     //  -0.81046,    0.5858
+    0xbfea0c95eabaf937,    0x3fe2960727629ca8,     //  -0.81404,   0.58081
+    0xbfea29a7a0462782,    0x3fe26d054cdd12df,     //  -0.81758,   0.57581
+    0xbfea4678c8119ac8,    0x3fe243d5fb98ac1f,     //   -0.8211,   0.57078
+    0xbfea63091b02fae2,    0x3fe21a799933eb58,     //  -0.82459,   0.56573
+    0xbfea7f58529fe69d,    0x3fe1f0f08bbc861b,     //  -0.82805,   0.56066
+    0xbfea9b66290ea1a3,    0x3fe1c73b39ae68c8,     //  -0.83147,   0.55557
+    0xbfeab7325916c0d4,    0x3fe19d5a09f2b9b8,     //  -0.83486,   0.55046
+    0xbfead2bc9e21d511,    0x3fe1734d63dedb49,     //  -0.83822,   0.54532
+    0xbfeaee04b43c1474,    0x3fe14915af336ceb,     //  -0.84155,   0.54017
+    0xbfeb090a58150200,    0x3fe11eb3541b4b22,     //  -0.84485,     0.535
+    0xbfeb23cd470013b4,    0x3fe0f426bb2a8e7d,     //  -0.84812,    0.5298
+    0xbfeb3e4d3ef55712,    0x3fe0c9704d5d898f,     //  -0.85136,   0.52459
+    0xbfeb5889fe921405,    0x3fe09e907417c5e1,     //  -0.85456,   0.51936
+    0xbfeb728345196e3e,    0x3fe073879922ffed,     //  -0.85773,    0.5141
+    0xbfeb8c38d27504e9,    0x3fe0485626ae221a,     //  -0.86087,   0.50883
+    0xbfeba5aa673590d2,    0x3fe01cfc874c3eb7,     //  -0.86397,   0.50354
+    0xbfebbed7c49380ea,    0x3fdfe2f64be7120f,     //  -0.86705,   0.49823
+    0xbfebd7c0ac6f952a,    0x3fdf8ba4dbf89aba,     //  -0.87009,    0.4929
+    0xbfebf064e15377dd,    0x3fdf3405963fd068,     //  -0.87309,   0.48755
+    0xbfec08c426725549,    0x3fdedc1952ef78d5,     //  -0.87607,   0.48218
+    0xbfec20de3fa971b0,    0x3fde83e0eaf85113,     //  -0.87901,    0.4768
+    0xbfec38b2f180bdb1,    0x3fde2b5d3806f63b,     //  -0.88192,    0.4714
+    0xbfec5042012b6907,    0x3fddd28f1481cc58,     //   -0.8848,   0.46598
+    0xbfec678b3488739b,    0x3fdd79775b86e389,     //  -0.88764,   0.46054
+    0xbfec7e8e52233cf3,    0x3fdd2016e8e9db5b,     //  -0.89045,   0.45508
+    0xbfec954b213411f5,    0x3fdcc66e9931c45d,     //  -0.89322,   0.44961
+    0xbfecabc169a0b901,    0x3fdc6c7f4997000a,     //  -0.89597,   0.44412
+    0xbfecc1f0f3fcfc5c,    0x3fdc1249d8011ee7,     //  -0.89867,   0.43862
+    0xbfecd7d9898b32f6,    0x3fdbb7cf2304bd01,     //  -0.90135,   0.43309
+    0xbfeced7af43cc773,    0x3fdb5d1009e15cc0,     //  -0.90399,   0.42756
+    0xbfed02d4feb2bd92,    0x3fdb020d6c7f4009,     //   -0.9066,     0.422
+    0xbfed17e7743e35dc,    0x3fdaa6c82b6d3fc9,     //  -0.90917,   0.41643
+    0xbfed2cb220e0ef9f,    0x3fda4b4127dea1e4,     //  -0.91171,   0.41084
+    0xbfed4134d14dc93a,    0x3fd9ef7943a8ed8a,     //  -0.91421,   0.40524
+    0xbfed556f52e93eb1,    0x3fd993716141bdfe,     //  -0.91668,   0.39962
+    0xbfed696173c9e68b,    0x3fd9372a63bc93d7,     //  -0.91911,   0.39399
+    0xbfed7d0b02b8ecf9,    0x3fd8daa52ec8a4af,     //  -0.92151,   0.38835
+    0xbfed906bcf328d46,    0x3fd87de2a6aea963,     //  -0.92388,   0.38268
+    0xbfeda383a9668988,    0x3fd820e3b04eaac4,     //  -0.92621,   0.37701
+    0xbfedb6526238a09b,    0x3fd7c3a9311dcce7,     //  -0.92851,   0.37132
+    0xbfedc8d7cb410260,    0x3fd766340f2418f6,     //  -0.93077,   0.36561
+    0xbfeddb13b6ccc23d,    0x3fd7088530fa459e,     //  -0.93299,    0.3599
+    0xbfeded05f7de47da,    0x3fd6aa9d7dc77e16,     //  -0.93518,   0.35416
+    0xbfedfeae622dbe2b,    0x3fd64c7ddd3f27c6,     //  -0.93734,   0.34842
+    0xbfee100cca2980ac,    0x3fd5ee27379ea693,     //  -0.93946,   0.34266
+    0xbfee212104f686e5,    0x3fd58f9a75ab1fdd,     //  -0.94154,   0.33689
+    0xbfee31eae870ce25,    0x3fd530d880af3c24,     //  -0.94359,   0.33111
+    0xbfee426a4b2bc17e,    0x3fd4d1e24278e76a,     //  -0.94561,   0.32531
+    0xbfee529f04729ffc,    0x3fd472b8a5571054,     //  -0.94759,    0.3195
+    0xbfee6288ec48e112,    0x3fd4135c94176602,     //  -0.94953,   0.31368
+    0xbfee7227db6a9744,    0x3fd3b3cefa0414b7,     //  -0.95144,   0.30785
+    0xbfee817bab4cd10d,    0x3fd35410c2e18152,     //  -0.95331,   0.30201
+    0xbfee9084361df7f3,    0x3fd2f422daec0386,     //  -0.95514,   0.29615
+    0xbfee9f4156c62dda,    0x3fd294062ed59f05,     //  -0.95694,   0.29028
+    0xbfeeadb2e8e7a88e,    0x3fd233bbabc3bb72,     //   -0.9587,   0.28441
+    0xbfeebbd8c8df0b74,    0x3fd1d3443f4cdb3d,     //  -0.96043,   0.27852
+    0xbfeec9b2d3c3bf84,    0x3fd172a0d7765177,     //  -0.96212,   0.27262
+    0xbfeed740e7684963,    0x3fd111d262b1f677,     //  -0.96378,   0.26671
+    0xbfeee482e25a9dbc,    0x3fd0b0d9cfdbdb90,     //  -0.96539,   0.26079
+    0xbfeef178a3e473c2,    0x3fd04fb80e37fdae,     //  -0.96698,   0.25487
+    0xbfeefe220c0b95ec,    0x3fcfdcdc1adfedf8,     //  -0.96852,   0.24893
+    0xbfef0a7efb9230d7,    0x3fcf19f97b215f1a,     //  -0.97003,   0.24298
+    0xbfef168f53f7205d,    0x3fce56ca1e101a1b,     //   -0.9715,   0.23702
+    0xbfef2252f7763ada,    0x3fcd934fe5454311,     //  -0.97294,   0.23106
+    0xbfef2dc9c9089a9d,    0x3fcccf8cb312b286,     //  -0.97434,   0.22508
+    0xbfef38f3ac64e589,    0x3fcc0b826a7e4f63,     //   -0.9757,    0.2191
+    0xbfef43d085ff92dd,    0x3fcb4732ef3d6722,     //  -0.97703,   0.21311
+    0xbfef4e603b0b2f2d,    0x3fca82a025b00451,     //  -0.97832,   0.20711
+    0xbfef58a2b1789e84,    0x3fc9bdcbf2dc4366,     //  -0.97957,    0.2011
+    0xbfef6297cff75cb0,    0x3fc8f8b83c69a60a,     //  -0.98079,   0.19509
+    0xbfef6c3f7df5bbb7,    0x3fc83366e89c64c5,     //  -0.98196,   0.18907
+    0xbfef7599a3a12077,    0x3fc76dd9de50bf31,     //  -0.98311,   0.18304
+    0xbfef7ea629e63d6e,    0x3fc6a81304f64ab2,     //  -0.98421,     0.177
+    0xbfef8764fa714ba9,    0x3fc5e214448b3fc6,     //  -0.98528,   0.17096
+    0xbfef8fd5ffae41db,    0x3fc51bdf8597c5f2,     //  -0.98631,   0.16491
+    0xbfef97f924c9099b,    0x3fc45576b1293e5a,     //   -0.9873,   0.15886
+    0xbfef9fce55adb2c8,    0x3fc38edbb0cd8d14,     //  -0.98826,    0.1528
+    0xbfefa7557f08a517,    0x3fc2c8106e8e613a,     //  -0.98918,   0.14673
+    0xbfefae8e8e46cfbb,    0x3fc20116d4ec7bce,     //  -0.99006,   0.14066
+    0xbfefb5797195d741,    0x3fc139f0cedaf576,     //   -0.9909,   0.13458
+    0xbfefbc1617e44186,    0x3fc072a047ba831d,     //  -0.99171,    0.1285
+    0xbfefc26470e19fd3,    0x3fbf564e56a9730e,     //  -0.99248,   0.12241
+    0xbfefc8646cfeb721,    0x3fbdc70ecbae9fc8,     //  -0.99321,   0.11632
+    0xbfefce15fd6da67b,    0x3fbc3785c79ec2d5,     //  -0.99391,   0.11022
+    0xbfefd37914220b84,    0x3fbaa7b724495c04,     //  -0.99456,   0.10412
+    0xbfefd88da3d12526,    0x3fb917a6bc29b42c,     //  -0.99518,  0.098017
+    0xbfefdd539ff1f456,    0x3fb787586a5d5b21,     //  -0.99577,  0.091909
+    0xbfefe1cafcbd5b09,    0x3fb5f6d00a9aa419,     //  -0.99631,  0.085797
+    0xbfefe5f3af2e3940,    0x3fb4661179272096,     //  -0.99682,  0.079682
+    0xbfefe9cdad01883a,    0x3fb2d52092ce19f6,     //  -0.99729,  0.073565
+    0xbfefed58ecb673c4,    0x3fb1440134d709b2,     //  -0.99772,  0.067444
+    0xbfeff095658e71ad,    0x3faf656e79f820e0,     //  -0.99812,  0.061321
+    0xbfeff3830f8d575c,    0x3fac428d12c0d7e3,     //  -0.99848,  0.055195
+    0xbfeff621e3796d7e,    0x3fa91f65f10dd814,     //   -0.9988,  0.049068
+    0xbfeff871dadb81df,    0x3fa5fc00d290cd43,     //  -0.99908,  0.042938
+    0xbfeffa72effef75d,    0x3fa2d865759455cd,     //  -0.99932,  0.036807
+    0xbfeffc251df1d3f8,    0x3f9f693731d1cf01,     //  -0.99953,  0.030675
+    0xbfeffd886084cd0d,    0x3f992155f7a3667e,     //   -0.9997,  0.024541
+    0xbfeffe9cb44b51a1,    0x3f92d936bbe30efd,     //  -0.99983,  0.018407
+    0xbfefff62169b92db,    0x3f8921d1fcdec784,     //  -0.99992,  0.012272
+    0xbfefffd8858e8a92,    0x3f7921f0fe670071,     //  -0.99998, 0.0061359
+    0xbff0000000000000,    0x0000000000000000,     //        -1,         0
+    0xbfefffd8858e8a92,    0xbf7921f0fe670071,     //  -0.99998,-0.0061359
+    0xbfefff62169b92db,    0xbf8921d1fcdec784,     //  -0.99992, -0.012272
+    0xbfeffe9cb44b51a1,    0xbf92d936bbe30efd,     //  -0.99983, -0.018407
+    0xbfeffd886084cd0d,    0xbf992155f7a3667e,     //   -0.9997, -0.024541
+    0xbfeffc251df1d3f8,    0xbf9f693731d1cf01,     //  -0.99953, -0.030675
+    0xbfeffa72effef75d,    0xbfa2d865759455cd,     //  -0.99932, -0.036807
+    0xbfeff871dadb81df,    0xbfa5fc00d290cd43,     //  -0.99908, -0.042938
+    0xbfeff621e3796d7e,    0xbfa91f65f10dd814,     //   -0.9988, -0.049068
+    0xbfeff3830f8d575c,    0xbfac428d12c0d7e3,     //  -0.99848, -0.055195
+    0xbfeff095658e71ad,    0xbfaf656e79f820e0,     //  -0.99812, -0.061321
+    0xbfefed58ecb673c4,    0xbfb1440134d709b2,     //  -0.99772, -0.067444
+    0xbfefe9cdad01883a,    0xbfb2d52092ce19f6,     //  -0.99729, -0.073565
+    0xbfefe5f3af2e3940,    0xbfb4661179272096,     //  -0.99682, -0.079682
+    0xbfefe1cafcbd5b09,    0xbfb5f6d00a9aa419,     //  -0.99631, -0.085797
+    0xbfefdd539ff1f456,    0xbfb787586a5d5b21,     //  -0.99577, -0.091909
+    0xbfefd88da3d12526,    0xbfb917a6bc29b42c,     //  -0.99518, -0.098017
+    0xbfefd37914220b84,    0xbfbaa7b724495c04,     //  -0.99456,  -0.10412
+    0xbfefce15fd6da67b,    0xbfbc3785c79ec2d5,     //  -0.99391,  -0.11022
+    0xbfefc8646cfeb721,    0xbfbdc70ecbae9fc8,     //  -0.99321,  -0.11632
+    0xbfefc26470e19fd3,    0xbfbf564e56a9730e,     //  -0.99248,  -0.12241
+    0xbfefbc1617e44186,    0xbfc072a047ba831d,     //  -0.99171,   -0.1285
+    0xbfefb5797195d741,    0xbfc139f0cedaf576,     //   -0.9909,  -0.13458
+    0xbfefae8e8e46cfbb,    0xbfc20116d4ec7bce,     //  -0.99006,  -0.14066
+    0xbfefa7557f08a517,    0xbfc2c8106e8e613a,     //  -0.98918,  -0.14673
+    0xbfef9fce55adb2c8,    0xbfc38edbb0cd8d14,     //  -0.98826,   -0.1528
+    0xbfef97f924c9099b,    0xbfc45576b1293e5a,     //   -0.9873,  -0.15886
+    0xbfef8fd5ffae41db,    0xbfc51bdf8597c5f2,     //  -0.98631,  -0.16491
+    0xbfef8764fa714ba9,    0xbfc5e214448b3fc6,     //  -0.98528,  -0.17096
+    0xbfef7ea629e63d6e,    0xbfc6a81304f64ab2,     //  -0.98421,    -0.177
+    0xbfef7599a3a12077,    0xbfc76dd9de50bf31,     //  -0.98311,  -0.18304
+    0xbfef6c3f7df5bbb7,    0xbfc83366e89c64c5,     //  -0.98196,  -0.18907
+    0xbfef6297cff75cb0,    0xbfc8f8b83c69a60a,     //  -0.98079,  -0.19509
+    0xbfef58a2b1789e84,    0xbfc9bdcbf2dc4366,     //  -0.97957,   -0.2011
+    0xbfef4e603b0b2f2d,    0xbfca82a025b00451,     //  -0.97832,  -0.20711
+    0xbfef43d085ff92dd,    0xbfcb4732ef3d6722,     //  -0.97703,  -0.21311
+    0xbfef38f3ac64e589,    0xbfcc0b826a7e4f63,     //   -0.9757,   -0.2191
+    0xbfef2dc9c9089a9d,    0xbfcccf8cb312b286,     //  -0.97434,  -0.22508
+    0xbfef2252f7763ada,    0xbfcd934fe5454311,     //  -0.97294,  -0.23106
+    0xbfef168f53f7205d,    0xbfce56ca1e101a1b,     //   -0.9715,  -0.23702
+    0xbfef0a7efb9230d7,    0xbfcf19f97b215f1a,     //  -0.97003,  -0.24298
+    0xbfeefe220c0b95ec,    0xbfcfdcdc1adfedf8,     //  -0.96852,  -0.24893
+    0xbfeef178a3e473c2,    0xbfd04fb80e37fdae,     //  -0.96698,  -0.25487
+    0xbfeee482e25a9dbc,    0xbfd0b0d9cfdbdb90,     //  -0.96539,  -0.26079
+    0xbfeed740e7684963,    0xbfd111d262b1f677,     //  -0.96378,  -0.26671
+    0xbfeec9b2d3c3bf84,    0xbfd172a0d7765177,     //  -0.96212,  -0.27262
+    0xbfeebbd8c8df0b74,    0xbfd1d3443f4cdb3d,     //  -0.96043,  -0.27852
+    0xbfeeadb2e8e7a88e,    0xbfd233bbabc3bb72,     //   -0.9587,  -0.28441
+    0xbfee9f4156c62dda,    0xbfd294062ed59f05,     //  -0.95694,  -0.29028
+    0xbfee9084361df7f3,    0xbfd2f422daec0386,     //  -0.95514,  -0.29615
+    0xbfee817bab4cd10d,    0xbfd35410c2e18152,     //  -0.95331,  -0.30201
+    0xbfee7227db6a9744,    0xbfd3b3cefa0414b7,     //  -0.95144,  -0.30785
+    0xbfee6288ec48e112,    0xbfd4135c94176602,     //  -0.94953,  -0.31368
+    0xbfee529f04729ffc,    0xbfd472b8a5571054,     //  -0.94759,   -0.3195
+    0xbfee426a4b2bc17e,    0xbfd4d1e24278e76a,     //  -0.94561,  -0.32531
+    0xbfee31eae870ce25,    0xbfd530d880af3c24,     //  -0.94359,  -0.33111
+    0xbfee212104f686e5,    0xbfd58f9a75ab1fdd,     //  -0.94154,  -0.33689
+    0xbfee100cca2980ac,    0xbfd5ee27379ea693,     //  -0.93946,  -0.34266
+    0xbfedfeae622dbe2b,    0xbfd64c7ddd3f27c6,     //  -0.93734,  -0.34842
+    0xbfeded05f7de47da,    0xbfd6aa9d7dc77e16,     //  -0.93518,  -0.35416
+    0xbfeddb13b6ccc23d,    0xbfd7088530fa459e,     //  -0.93299,   -0.3599
+    0xbfedc8d7cb410260,    0xbfd766340f2418f6,     //  -0.93077,  -0.36561
+    0xbfedb6526238a09b,    0xbfd7c3a9311dcce7,     //  -0.92851,  -0.37132
+    0xbfeda383a9668988,    0xbfd820e3b04eaac4,     //  -0.92621,  -0.37701
+    0xbfed906bcf328d46,    0xbfd87de2a6aea963,     //  -0.92388,  -0.38268
+    0xbfed7d0b02b8ecf9,    0xbfd8daa52ec8a4af,     //  -0.92151,  -0.38835
+    0xbfed696173c9e68b,    0xbfd9372a63bc93d7,     //  -0.91911,  -0.39399
+    0xbfed556f52e93eb1,    0xbfd993716141bdfe,     //  -0.91668,  -0.39962
+    0xbfed4134d14dc93a,    0xbfd9ef7943a8ed8a,     //  -0.91421,  -0.40524
+    0xbfed2cb220e0ef9f,    0xbfda4b4127dea1e4,     //  -0.91171,  -0.41084
+    0xbfed17e7743e35dc,    0xbfdaa6c82b6d3fc9,     //  -0.90917,  -0.41643
+    0xbfed02d4feb2bd92,    0xbfdb020d6c7f4009,     //   -0.9066,    -0.422
+    0xbfeced7af43cc773,    0xbfdb5d1009e15cc0,     //  -0.90399,  -0.42756
+    0xbfecd7d9898b32f6,    0xbfdbb7cf2304bd01,     //  -0.90135,  -0.43309
+    0xbfecc1f0f3fcfc5c,    0xbfdc1249d8011ee7,     //  -0.89867,  -0.43862
+    0xbfecabc169a0b901,    0xbfdc6c7f4997000a,     //  -0.89597,  -0.44412
+    0xbfec954b213411f5,    0xbfdcc66e9931c45d,     //  -0.89322,  -0.44961
+    0xbfec7e8e52233cf3,    0xbfdd2016e8e9db5b,     //  -0.89045,  -0.45508
+    0xbfec678b3488739b,    0xbfdd79775b86e389,     //  -0.88764,  -0.46054
+    0xbfec5042012b6907,    0xbfddd28f1481cc58,     //   -0.8848,  -0.46598
+    0xbfec38b2f180bdb1,    0xbfde2b5d3806f63b,     //  -0.88192,   -0.4714
+    0xbfec20de3fa971b0,    0xbfde83e0eaf85113,     //  -0.87901,   -0.4768
+    0xbfec08c426725549,    0xbfdedc1952ef78d5,     //  -0.87607,  -0.48218
+    0xbfebf064e15377dd,    0xbfdf3405963fd068,     //  -0.87309,  -0.48755
+    0xbfebd7c0ac6f952a,    0xbfdf8ba4dbf89aba,     //  -0.87009,   -0.4929
+    0xbfebbed7c49380ea,    0xbfdfe2f64be7120f,     //  -0.86705,  -0.49823
+    0xbfeba5aa673590d2,    0xbfe01cfc874c3eb7,     //  -0.86397,  -0.50354
+    0xbfeb8c38d27504e9,    0xbfe0485626ae221a,     //  -0.86087,  -0.50883
+    0xbfeb728345196e3e,    0xbfe073879922ffed,     //  -0.85773,   -0.5141
+    0xbfeb5889fe921405,    0xbfe09e907417c5e1,     //  -0.85456,  -0.51936
+    0xbfeb3e4d3ef55712,    0xbfe0c9704d5d898f,     //  -0.85136,  -0.52459
+    0xbfeb23cd470013b4,    0xbfe0f426bb2a8e7d,     //  -0.84812,   -0.5298
+    0xbfeb090a58150200,    0xbfe11eb3541b4b22,     //  -0.84485,    -0.535
+    0xbfeaee04b43c1474,    0xbfe14915af336ceb,     //  -0.84155,  -0.54017
+    0xbfead2bc9e21d511,    0xbfe1734d63dedb49,     //  -0.83822,  -0.54532
+    0xbfeab7325916c0d4,    0xbfe19d5a09f2b9b8,     //  -0.83486,  -0.55046
+    0xbfea9b66290ea1a3,    0xbfe1c73b39ae68c8,     //  -0.83147,  -0.55557
+    0xbfea7f58529fe69d,    0xbfe1f0f08bbc861b,     //  -0.82805,  -0.56066
+    0xbfea63091b02fae2,    0xbfe21a799933eb58,     //  -0.82459,  -0.56573
+    0xbfea4678c8119ac8,    0xbfe243d5fb98ac1f,     //   -0.8211,  -0.57078
+    0xbfea29a7a0462782,    0xbfe26d054cdd12df,     //  -0.81758,  -0.57581
+    0xbfea0c95eabaf937,    0xbfe2960727629ca8,     //  -0.81404,  -0.58081
+    0xbfe9ef43ef29af94,    0xbfe2bedb25faf3ea,     //  -0.81046,   -0.5858
+    0xbfe9d1b1f5ea80d6,    0xbfe2e780e3e8ea16,     //  -0.80685,  -0.59076
+    0xbfe9b3e047f38741,    0xbfe30ff7fce17035,     //  -0.80321,   -0.5957
+    0xbfe995cf2ed80d22,    0xbfe338400d0c8e57,     //  -0.79954,  -0.60062
+    0xbfe9777ef4c7d742,    0xbfe36058b10659f3,     //  -0.79584,  -0.60551
+    0xbfe958efe48e6dd7,    0xbfe3884185dfeb22,     //  -0.79211,  -0.61038
+    0xbfe93a22499263fc,    0xbfe3affa292050b9,     //  -0.78835,  -0.61523
+    0xbfe91b166fd49da2,    0xbfe3d78238c58343,     //  -0.78456,  -0.62006
+    0xbfe8fbcca3ef940d,    0xbfe3fed9534556d4,     //  -0.78074,  -0.62486
+    0xbfe8dc45331698cc,    0xbfe425ff178e6bb1,     //  -0.77689,  -0.62964
+    0xbfe8bc806b151741,    0xbfe44cf325091dd6,     //  -0.77301,  -0.63439
+    0xbfe89c7e9a4dd4ab,    0xbfe473b51b987347,     //   -0.7691,  -0.63912
+    0xbfe87c400fba2ebf,    0xbfe49a449b9b0938,     //  -0.76517,  -0.64383
+    0xbfe85bc51ae958cc,    0xbfe4c0a145ec0004,     //   -0.7612,  -0.64851
+    0xbfe83b0e0bff976e,    0xbfe4e6cabbe3e5e9,     //  -0.75721,  -0.65317
+    0xbfe81a1b33b57acc,    0xbfe50cc09f59a09b,     //  -0.75319,  -0.65781
+    0xbfe7f8ece3571771,    0xbfe5328292a35596,     //  -0.74914,  -0.66242
+    0xbfe7d7836cc33db2,    0xbfe5581038975137,     //  -0.74506,    -0.667
+    0xbfe7b5df226aafb0,    0xbfe57d69348cec9f,     //  -0.74095,  -0.67156
+    0xbfe79400574f55e4,    0xbfe5a28d2a5d7250,     //  -0.73682,  -0.67609
+    0xbfe771e75f037261,    0xbfe5c77bbe65018c,     //  -0.73265,   -0.6806
+    0xbfe74f948da8d28d,    0xbfe5ec3495837074,     //  -0.72846,  -0.68508
+    0xbfe72d0837efff97,    0xbfe610b7551d2cde,     //  -0.72425,  -0.68954
+    0xbfe70a42b3176d7a,    0xbfe63503a31c1be8,     //     -0.72,  -0.69397
+    0xbfe6e74454eaa8ae,    0xbfe6591925f0783e,     //  -0.71573,  -0.69838
+    0xbfe6c40d73c18275,    0xbfe67cf78491af10,     //  -0.71143,  -0.70275
+    0xbfe6a09e667f3bcc,    0xbfe6a09e667f3bcc,     //  -0.70711,  -0.70711
+    0xbfe67cf78491af10,    0xbfe6c40d73c18275,     //  -0.70275,  -0.71143
+    0xbfe6591925f0783e,    0xbfe6e74454eaa8ae,     //  -0.69838,  -0.71573
+    0xbfe63503a31c1be8,    0xbfe70a42b3176d7a,     //  -0.69397,     -0.72
+    0xbfe610b7551d2cde,    0xbfe72d0837efff97,     //  -0.68954,  -0.72425
+    0xbfe5ec3495837074,    0xbfe74f948da8d28d,     //  -0.68508,  -0.72846
+    0xbfe5c77bbe65018c,    0xbfe771e75f037261,     //   -0.6806,  -0.73265
+    0xbfe5a28d2a5d7250,    0xbfe79400574f55e4,     //  -0.67609,  -0.73682
+    0xbfe57d69348cec9f,    0xbfe7b5df226aafb0,     //  -0.67156,  -0.74095
+    0xbfe5581038975137,    0xbfe7d7836cc33db2,     //    -0.667,  -0.74506
+    0xbfe5328292a35596,    0xbfe7f8ece3571771,     //  -0.66242,  -0.74914
+    0xbfe50cc09f59a09b,    0xbfe81a1b33b57acc,     //  -0.65781,  -0.75319
+    0xbfe4e6cabbe3e5e9,    0xbfe83b0e0bff976e,     //  -0.65317,  -0.75721
+    0xbfe4c0a145ec0004,    0xbfe85bc51ae958cc,     //  -0.64851,   -0.7612
+    0xbfe49a449b9b0938,    0xbfe87c400fba2ebf,     //  -0.64383,  -0.76517
+    0xbfe473b51b987347,    0xbfe89c7e9a4dd4ab,     //  -0.63912,   -0.7691
+    0xbfe44cf325091dd6,    0xbfe8bc806b151741,     //  -0.63439,  -0.77301
+    0xbfe425ff178e6bb1,    0xbfe8dc45331698cc,     //  -0.62964,  -0.77689
+    0xbfe3fed9534556d4,    0xbfe8fbcca3ef940d,     //  -0.62486,  -0.78074
+    0xbfe3d78238c58343,    0xbfe91b166fd49da2,     //  -0.62006,  -0.78456
+    0xbfe3affa292050b9,    0xbfe93a22499263fc,     //  -0.61523,  -0.78835
+    0xbfe3884185dfeb22,    0xbfe958efe48e6dd7,     //  -0.61038,  -0.79211
+    0xbfe36058b10659f3,    0xbfe9777ef4c7d742,     //  -0.60551,  -0.79584
+    0xbfe338400d0c8e57,    0xbfe995cf2ed80d22,     //  -0.60062,  -0.79954
+    0xbfe30ff7fce17035,    0xbfe9b3e047f38741,     //   -0.5957,  -0.80321
+    0xbfe2e780e3e8ea16,    0xbfe9d1b1f5ea80d6,     //  -0.59076,  -0.80685
+    0xbfe2bedb25faf3ea,    0xbfe9ef43ef29af94,     //   -0.5858,  -0.81046
+    0xbfe2960727629ca8,    0xbfea0c95eabaf937,     //  -0.58081,  -0.81404
+    0xbfe26d054cdd12df,    0xbfea29a7a0462782,     //  -0.57581,  -0.81758
+    0xbfe243d5fb98ac1f,    0xbfea4678c8119ac8,     //  -0.57078,   -0.8211
+    0xbfe21a799933eb58,    0xbfea63091b02fae2,     //  -0.56573,  -0.82459
+    0xbfe1f0f08bbc861b,    0xbfea7f58529fe69d,     //  -0.56066,  -0.82805
+    0xbfe1c73b39ae68c8,    0xbfea9b66290ea1a3,     //  -0.55557,  -0.83147
+    0xbfe19d5a09f2b9b8,    0xbfeab7325916c0d4,     //  -0.55046,  -0.83486
+    0xbfe1734d63dedb49,    0xbfead2bc9e21d511,     //  -0.54532,  -0.83822
+    0xbfe14915af336ceb,    0xbfeaee04b43c1474,     //  -0.54017,  -0.84155
+    0xbfe11eb3541b4b22,    0xbfeb090a58150200,     //    -0.535,  -0.84485
+    0xbfe0f426bb2a8e7d,    0xbfeb23cd470013b4,     //   -0.5298,  -0.84812
+    0xbfe0c9704d5d898f,    0xbfeb3e4d3ef55712,     //  -0.52459,  -0.85136
+    0xbfe09e907417c5e1,    0xbfeb5889fe921405,     //  -0.51936,  -0.85456
+    0xbfe073879922ffed,    0xbfeb728345196e3e,     //   -0.5141,  -0.85773
+    0xbfe0485626ae221a,    0xbfeb8c38d27504e9,     //  -0.50883,  -0.86087
+    0xbfe01cfc874c3eb7,    0xbfeba5aa673590d2,     //  -0.50354,  -0.86397
+    0xbfdfe2f64be7120f,    0xbfebbed7c49380ea,     //  -0.49823,  -0.86705
+    0xbfdf8ba4dbf89aba,    0xbfebd7c0ac6f952a,     //   -0.4929,  -0.87009
+    0xbfdf3405963fd068,    0xbfebf064e15377dd,     //  -0.48755,  -0.87309
+    0xbfdedc1952ef78d5,    0xbfec08c426725549,     //  -0.48218,  -0.87607
+    0xbfde83e0eaf85113,    0xbfec20de3fa971b0,     //   -0.4768,  -0.87901
+    0xbfde2b5d3806f63b,    0xbfec38b2f180bdb1,     //   -0.4714,  -0.88192
+    0xbfddd28f1481cc58,    0xbfec5042012b6907,     //  -0.46598,   -0.8848
+    0xbfdd79775b86e389,    0xbfec678b3488739b,     //  -0.46054,  -0.88764
+    0xbfdd2016e8e9db5b,    0xbfec7e8e52233cf3,     //  -0.45508,  -0.89045
+    0xbfdcc66e9931c45d,    0xbfec954b213411f5,     //  -0.44961,  -0.89322
+    0xbfdc6c7f4997000a,    0xbfecabc169a0b901,     //  -0.44412,  -0.89597
+    0xbfdc1249d8011ee7,    0xbfecc1f0f3fcfc5c,     //  -0.43862,  -0.89867
+    0xbfdbb7cf2304bd01,    0xbfecd7d9898b32f6,     //  -0.43309,  -0.90135
+    0xbfdb5d1009e15cc0,    0xbfeced7af43cc773,     //  -0.42756,  -0.90399
+    0xbfdb020d6c7f4009,    0xbfed02d4feb2bd92,     //    -0.422,   -0.9066
+    0xbfdaa6c82b6d3fc9,    0xbfed17e7743e35dc,     //  -0.41643,  -0.90917
+    0xbfda4b4127dea1e4,    0xbfed2cb220e0ef9f,     //  -0.41084,  -0.91171
+    0xbfd9ef7943a8ed8a,    0xbfed4134d14dc93a,     //  -0.40524,  -0.91421
+    0xbfd993716141bdfe,    0xbfed556f52e93eb1,     //  -0.39962,  -0.91668
+    0xbfd9372a63bc93d7,    0xbfed696173c9e68b,     //  -0.39399,  -0.91911
+    0xbfd8daa52ec8a4af,    0xbfed7d0b02b8ecf9,     //  -0.38835,  -0.92151
+    0xbfd87de2a6aea963,    0xbfed906bcf328d46,     //  -0.38268,  -0.92388
+    0xbfd820e3b04eaac4,    0xbfeda383a9668988,     //  -0.37701,  -0.92621
+    0xbfd7c3a9311dcce7,    0xbfedb6526238a09b,     //  -0.37132,  -0.92851
+    0xbfd766340f2418f6,    0xbfedc8d7cb410260,     //  -0.36561,  -0.93077
+    0xbfd7088530fa459e,    0xbfeddb13b6ccc23d,     //   -0.3599,  -0.93299
+    0xbfd6aa9d7dc77e16,    0xbfeded05f7de47da,     //  -0.35416,  -0.93518
+    0xbfd64c7ddd3f27c6,    0xbfedfeae622dbe2b,     //  -0.34842,  -0.93734
+    0xbfd5ee27379ea693,    0xbfee100cca2980ac,     //  -0.34266,  -0.93946
+    0xbfd58f9a75ab1fdd,    0xbfee212104f686e5,     //  -0.33689,  -0.94154
+    0xbfd530d880af3c24,    0xbfee31eae870ce25,     //  -0.33111,  -0.94359
+    0xbfd4d1e24278e76a,    0xbfee426a4b2bc17e,     //  -0.32531,  -0.94561
+    0xbfd472b8a5571054,    0xbfee529f04729ffc,     //   -0.3195,  -0.94759
+    0xbfd4135c94176602,    0xbfee6288ec48e112,     //  -0.31368,  -0.94953
+    0xbfd3b3cefa0414b7,    0xbfee7227db6a9744,     //  -0.30785,  -0.95144
+    0xbfd35410c2e18152,    0xbfee817bab4cd10d,     //  -0.30201,  -0.95331
+    0xbfd2f422daec0386,    0xbfee9084361df7f3,     //  -0.29615,  -0.95514
+    0xbfd294062ed59f05,    0xbfee9f4156c62dda,     //  -0.29028,  -0.95694
+    0xbfd233bbabc3bb72,    0xbfeeadb2e8e7a88e,     //  -0.28441,   -0.9587
+    0xbfd1d3443f4cdb3d,    0xbfeebbd8c8df0b74,     //  -0.27852,  -0.96043
+    0xbfd172a0d7765177,    0xbfeec9b2d3c3bf84,     //  -0.27262,  -0.96212
+    0xbfd111d262b1f677,    0xbfeed740e7684963,     //  -0.26671,  -0.96378
+    0xbfd0b0d9cfdbdb90,    0xbfeee482e25a9dbc,     //  -0.26079,  -0.96539
+    0xbfd04fb80e37fdae,    0xbfeef178a3e473c2,     //  -0.25487,  -0.96698
+    0xbfcfdcdc1adfedf8,    0xbfeefe220c0b95ec,     //  -0.24893,  -0.96852
+    0xbfcf19f97b215f1a,    0xbfef0a7efb9230d7,     //  -0.24298,  -0.97003
+    0xbfce56ca1e101a1b,    0xbfef168f53f7205d,     //  -0.23702,   -0.9715
+    0xbfcd934fe5454311,    0xbfef2252f7763ada,     //  -0.23106,  -0.97294
+    0xbfcccf8cb312b286,    0xbfef2dc9c9089a9d,     //  -0.22508,  -0.97434
+    0xbfcc0b826a7e4f63,    0xbfef38f3ac64e589,     //   -0.2191,   -0.9757
+    0xbfcb4732ef3d6722,    0xbfef43d085ff92dd,     //  -0.21311,  -0.97703
+    0xbfca82a025b00451,    0xbfef4e603b0b2f2d,     //  -0.20711,  -0.97832
+    0xbfc9bdcbf2dc4366,    0xbfef58a2b1789e84,     //   -0.2011,  -0.97957
+    0xbfc8f8b83c69a60a,    0xbfef6297cff75cb0,     //  -0.19509,  -0.98079
+    0xbfc83366e89c64c5,    0xbfef6c3f7df5bbb7,     //  -0.18907,  -0.98196
+    0xbfc76dd9de50bf31,    0xbfef7599a3a12077,     //  -0.18304,  -0.98311
+    0xbfc6a81304f64ab2,    0xbfef7ea629e63d6e,     //    -0.177,  -0.98421
+    0xbfc5e214448b3fc6,    0xbfef8764fa714ba9,     //  -0.17096,  -0.98528
+    0xbfc51bdf8597c5f2,    0xbfef8fd5ffae41db,     //  -0.16491,  -0.98631
+    0xbfc45576b1293e5a,    0xbfef97f924c9099b,     //  -0.15886,   -0.9873
+    0xbfc38edbb0cd8d14,    0xbfef9fce55adb2c8,     //   -0.1528,  -0.98826
+    0xbfc2c8106e8e613a,    0xbfefa7557f08a517,     //  -0.14673,  -0.98918
+    0xbfc20116d4ec7bce,    0xbfefae8e8e46cfbb,     //  -0.14066,  -0.99006
+    0xbfc139f0cedaf576,    0xbfefb5797195d741,     //  -0.13458,   -0.9909
+    0xbfc072a047ba831d,    0xbfefbc1617e44186,     //   -0.1285,  -0.99171
+    0xbfbf564e56a9730e,    0xbfefc26470e19fd3,     //  -0.12241,  -0.99248
+    0xbfbdc70ecbae9fc8,    0xbfefc8646cfeb721,     //  -0.11632,  -0.99321
+    0xbfbc3785c79ec2d5,    0xbfefce15fd6da67b,     //  -0.11022,  -0.99391
+    0xbfbaa7b724495c04,    0xbfefd37914220b84,     //  -0.10412,  -0.99456
+    0xbfb917a6bc29b42c,    0xbfefd88da3d12526,     // -0.098017,  -0.99518
+    0xbfb787586a5d5b21,    0xbfefdd539ff1f456,     // -0.091909,  -0.99577
+    0xbfb5f6d00a9aa419,    0xbfefe1cafcbd5b09,     // -0.085797,  -0.99631
+    0xbfb4661179272096,    0xbfefe5f3af2e3940,     // -0.079682,  -0.99682
+    0xbfb2d52092ce19f6,    0xbfefe9cdad01883a,     // -0.073565,  -0.99729
+    0xbfb1440134d709b2,    0xbfefed58ecb673c4,     // -0.067444,  -0.99772
+    0xbfaf656e79f820e0,    0xbfeff095658e71ad,     // -0.061321,  -0.99812
+    0xbfac428d12c0d7e3,    0xbfeff3830f8d575c,     // -0.055195,  -0.99848
+    0xbfa91f65f10dd814,    0xbfeff621e3796d7e,     // -0.049068,   -0.9988
+    0xbfa5fc00d290cd43,    0xbfeff871dadb81df,     // -0.042938,  -0.99908
+    0xbfa2d865759455cd,    0xbfeffa72effef75d,     // -0.036807,  -0.99932
+    0xbf9f693731d1cf01,    0xbfeffc251df1d3f8,     // -0.030675,  -0.99953
+    0xbf992155f7a3667e,    0xbfeffd886084cd0d,     // -0.024541,   -0.9997
+    0xbf92d936bbe30efd,    0xbfeffe9cb44b51a1,     // -0.018407,  -0.99983
+    0xbf8921d1fcdec784,    0xbfefff62169b92db,     // -0.012272,  -0.99992
+    0xbf7921f0fe670071,    0xbfefffd8858e8a92,     //-0.0061359,  -0.99998
+    0x0000000000000000,    0xbff0000000000000,     //         0,        -1
+    0x3f7921f0fe670071,    0xbfefffd8858e8a92,     // 0.0061359,  -0.99998
+    0x3f8921d1fcdec784,    0xbfefff62169b92db,     //  0.012272,  -0.99992
+    0x3f92d936bbe30efd,    0xbfeffe9cb44b51a1,     //  0.018407,  -0.99983
+    0x3f992155f7a3667e,    0xbfeffd886084cd0d,     //  0.024541,   -0.9997
+    0x3f9f693731d1cf01,    0xbfeffc251df1d3f8,     //  0.030675,  -0.99953
+    0x3fa2d865759455cd,    0xbfeffa72effef75d,     //  0.036807,  -0.99932
+    0x3fa5fc00d290cd43,    0xbfeff871dadb81df,     //  0.042938,  -0.99908
+    0x3fa91f65f10dd814,    0xbfeff621e3796d7e,     //  0.049068,   -0.9988
+    0x3fac428d12c0d7e3,    0xbfeff3830f8d575c,     //  0.055195,  -0.99848
+    0x3faf656e79f820e0,    0xbfeff095658e71ad,     //  0.061321,  -0.99812
+    0x3fb1440134d709b2,    0xbfefed58ecb673c4,     //  0.067444,  -0.99772
+    0x3fb2d52092ce19f6,    0xbfefe9cdad01883a,     //  0.073565,  -0.99729
+    0x3fb4661179272096,    0xbfefe5f3af2e3940,     //  0.079682,  -0.99682
+    0x3fb5f6d00a9aa419,    0xbfefe1cafcbd5b09,     //  0.085797,  -0.99631
+    0x3fb787586a5d5b21,    0xbfefdd539ff1f456,     //  0.091909,  -0.99577
+    0x3fb917a6bc29b42c,    0xbfefd88da3d12526,     //  0.098017,  -0.99518
+    0x3fbaa7b724495c04,    0xbfefd37914220b84,     //   0.10412,  -0.99456
+    0x3fbc3785c79ec2d5,    0xbfefce15fd6da67b,     //   0.11022,  -0.99391
+    0x3fbdc70ecbae9fc8,    0xbfefc8646cfeb721,     //   0.11632,  -0.99321
+    0x3fbf564e56a9730e,    0xbfefc26470e19fd3,     //   0.12241,  -0.99248
+    0x3fc072a047ba831d,    0xbfefbc1617e44186,     //    0.1285,  -0.99171
+    0x3fc139f0cedaf576,    0xbfefb5797195d741,     //   0.13458,   -0.9909
+    0x3fc20116d4ec7bce,    0xbfefae8e8e46cfbb,     //   0.14066,  -0.99006
+    0x3fc2c8106e8e613a,    0xbfefa7557f08a517,     //   0.14673,  -0.98918
+    0x3fc38edbb0cd8d14,    0xbfef9fce55adb2c8,     //    0.1528,  -0.98826
+    0x3fc45576b1293e5a,    0xbfef97f924c9099b,     //   0.15886,   -0.9873
+    0x3fc51bdf8597c5f2,    0xbfef8fd5ffae41db,     //   0.16491,  -0.98631
+    0x3fc5e214448b3fc6,    0xbfef8764fa714ba9,     //   0.17096,  -0.98528
+    0x3fc6a81304f64ab2,    0xbfef7ea629e63d6e,     //     0.177,  -0.98421
+    0x3fc76dd9de50bf31,    0xbfef7599a3a12077,     //   0.18304,  -0.98311
+    0x3fc83366e89c64c5,    0xbfef6c3f7df5bbb7,     //   0.18907,  -0.98196
+    0x3fc8f8b83c69a60a,    0xbfef6297cff75cb0,     //   0.19509,  -0.98079
+    0x3fc9bdcbf2dc4366,    0xbfef58a2b1789e84,     //    0.2011,  -0.97957
+    0x3fca82a025b00451,    0xbfef4e603b0b2f2d,     //   0.20711,  -0.97832
+    0x3fcb4732ef3d6722,    0xbfef43d085ff92dd,     //   0.21311,  -0.97703
+    0x3fcc0b826a7e4f63,    0xbfef38f3ac64e589,     //    0.2191,   -0.9757
+    0x3fcccf8cb312b286,    0xbfef2dc9c9089a9d,     //   0.22508,  -0.97434
+    0x3fcd934fe5454311,    0xbfef2252f7763ada,     //   0.23106,  -0.97294
+    0x3fce56ca1e101a1b,    0xbfef168f53f7205d,     //   0.23702,   -0.9715
+    0x3fcf19f97b215f1a,    0xbfef0a7efb9230d7,     //   0.24298,  -0.97003
+    0x3fcfdcdc1adfedf8,    0xbfeefe220c0b95ec,     //   0.24893,  -0.96852
+    0x3fd04fb80e37fdae,    0xbfeef178a3e473c2,     //   0.25487,  -0.96698
+    0x3fd0b0d9cfdbdb90,    0xbfeee482e25a9dbc,     //   0.26079,  -0.96539
+    0x3fd111d262b1f677,    0xbfeed740e7684963,     //   0.26671,  -0.96378
+    0x3fd172a0d7765177,    0xbfeec9b2d3c3bf84,     //   0.27262,  -0.96212
+    0x3fd1d3443f4cdb3d,    0xbfeebbd8c8df0b74,     //   0.27852,  -0.96043
+    0x3fd233bbabc3bb72,    0xbfeeadb2e8e7a88e,     //   0.28441,   -0.9587
+    0x3fd294062ed59f05,    0xbfee9f4156c62dda,     //   0.29028,  -0.95694
+    0x3fd2f422daec0386,    0xbfee9084361df7f3,     //   0.29615,  -0.95514
+    0x3fd35410c2e18152,    0xbfee817bab4cd10d,     //   0.30201,  -0.95331
+    0x3fd3b3cefa0414b7,    0xbfee7227db6a9744,     //   0.30785,  -0.95144
+    0x3fd4135c94176602,    0xbfee6288ec48e112,     //   0.31368,  -0.94953
+    0x3fd472b8a5571054,    0xbfee529f04729ffc,     //    0.3195,  -0.94759
+    0x3fd4d1e24278e76a,    0xbfee426a4b2bc17e,     //   0.32531,  -0.94561
+    0x3fd530d880af3c24,    0xbfee31eae870ce25,     //   0.33111,  -0.94359
+    0x3fd58f9a75ab1fdd,    0xbfee212104f686e5,     //   0.33689,  -0.94154
+    0x3fd5ee27379ea693,    0xbfee100cca2980ac,     //   0.34266,  -0.93946
+    0x3fd64c7ddd3f27c6,    0xbfedfeae622dbe2b,     //   0.34842,  -0.93734
+    0x3fd6aa9d7dc77e16,    0xbfeded05f7de47da,     //   0.35416,  -0.93518
+    0x3fd7088530fa459e,    0xbfeddb13b6ccc23d,     //    0.3599,  -0.93299
+    0x3fd766340f2418f6,    0xbfedc8d7cb410260,     //   0.36561,  -0.93077
+    0x3fd7c3a9311dcce7,    0xbfedb6526238a09b,     //   0.37132,  -0.92851
+    0x3fd820e3b04eaac4,    0xbfeda383a9668988,     //   0.37701,  -0.92621
+    0x3fd87de2a6aea963,    0xbfed906bcf328d46,     //   0.38268,  -0.92388
+    0x3fd8daa52ec8a4af,    0xbfed7d0b02b8ecf9,     //   0.38835,  -0.92151
+    0x3fd9372a63bc93d7,    0xbfed696173c9e68b,     //   0.39399,  -0.91911
+    0x3fd993716141bdfe,    0xbfed556f52e93eb1,     //   0.39962,  -0.91668
+    0x3fd9ef7943a8ed8a,    0xbfed4134d14dc93a,     //   0.40524,  -0.91421
+    0x3fda4b4127dea1e4,    0xbfed2cb220e0ef9f,     //   0.41084,  -0.91171
+    0x3fdaa6c82b6d3fc9,    0xbfed17e7743e35dc,     //   0.41643,  -0.90917
+    0x3fdb020d6c7f4009,    0xbfed02d4feb2bd92,     //     0.422,   -0.9066
+    0x3fdb5d1009e15cc0,    0xbfeced7af43cc773,     //   0.42756,  -0.90399
+    0x3fdbb7cf2304bd01,    0xbfecd7d9898b32f6,     //   0.43309,  -0.90135
+    0x3fdc1249d8011ee7,    0xbfecc1f0f3fcfc5c,     //   0.43862,  -0.89867
+    0x3fdc6c7f4997000a,    0xbfecabc169a0b901,     //   0.44412,  -0.89597
+    0x3fdcc66e9931c45d,    0xbfec954b213411f5,     //   0.44961,  -0.89322
+    0x3fdd2016e8e9db5b,    0xbfec7e8e52233cf3,     //   0.45508,  -0.89045
+    0x3fdd79775b86e389,    0xbfec678b3488739b,     //   0.46054,  -0.88764
+    0x3fddd28f1481cc58,    0xbfec5042012b6907,     //   0.46598,   -0.8848
+    0x3fde2b5d3806f63b,    0xbfec38b2f180bdb1,     //    0.4714,  -0.88192
+    0x3fde83e0eaf85113,    0xbfec20de3fa971b0,     //    0.4768,  -0.87901
+    0x3fdedc1952ef78d5,    0xbfec08c426725549,     //   0.48218,  -0.87607
+    0x3fdf3405963fd068,    0xbfebf064e15377dd,     //   0.48755,  -0.87309
+    0x3fdf8ba4dbf89aba,    0xbfebd7c0ac6f952a,     //    0.4929,  -0.87009
+    0x3fdfe2f64be7120f,    0xbfebbed7c49380ea,     //   0.49823,  -0.86705
+    0x3fe01cfc874c3eb7,    0xbfeba5aa673590d2,     //   0.50354,  -0.86397
+    0x3fe0485626ae221a,    0xbfeb8c38d27504e9,     //   0.50883,  -0.86087
+    0x3fe073879922ffed,    0xbfeb728345196e3e,     //    0.5141,  -0.85773
+    0x3fe09e907417c5e1,    0xbfeb5889fe921405,     //   0.51936,  -0.85456
+    0x3fe0c9704d5d898f,    0xbfeb3e4d3ef55712,     //   0.52459,  -0.85136
+    0x3fe0f426bb2a8e7d,    0xbfeb23cd470013b4,     //    0.5298,  -0.84812
+    0x3fe11eb3541b4b22,    0xbfeb090a58150200,     //     0.535,  -0.84485
+    0x3fe14915af336ceb,    0xbfeaee04b43c1474,     //   0.54017,  -0.84155
+    0x3fe1734d63dedb49,    0xbfead2bc9e21d511,     //   0.54532,  -0.83822
+    0x3fe19d5a09f2b9b8,    0xbfeab7325916c0d4,     //   0.55046,  -0.83486
+    0x3fe1c73b39ae68c8,    0xbfea9b66290ea1a3,     //   0.55557,  -0.83147
+    0x3fe1f0f08bbc861b,    0xbfea7f58529fe69d,     //   0.56066,  -0.82805
+    0x3fe21a799933eb58,    0xbfea63091b02fae2,     //   0.56573,  -0.82459
+    0x3fe243d5fb98ac1f,    0xbfea4678c8119ac8,     //   0.57078,   -0.8211
+    0x3fe26d054cdd12df,    0xbfea29a7a0462782,     //   0.57581,  -0.81758
+    0x3fe2960727629ca8,    0xbfea0c95eabaf937,     //   0.58081,  -0.81404
+    0x3fe2bedb25faf3ea,    0xbfe9ef43ef29af94,     //    0.5858,  -0.81046
+    0x3fe2e780e3e8ea16,    0xbfe9d1b1f5ea80d6,     //   0.59076,  -0.80685
+    0x3fe30ff7fce17035,    0xbfe9b3e047f38741,     //    0.5957,  -0.80321
+    0x3fe338400d0c8e57,    0xbfe995cf2ed80d22,     //   0.60062,  -0.79954
+    0x3fe36058b10659f3,    0xbfe9777ef4c7d742,     //   0.60551,  -0.79584
+    0x3fe3884185dfeb22,    0xbfe958efe48e6dd7,     //   0.61038,  -0.79211
+    0x3fe3affa292050b9,    0xbfe93a22499263fc,     //   0.61523,  -0.78835
+    0x3fe3d78238c58343,    0xbfe91b166fd49da2,     //   0.62006,  -0.78456
+    0x3fe3fed9534556d4,    0xbfe8fbcca3ef940d,     //   0.62486,  -0.78074
+    0x3fe425ff178e6bb1,    0xbfe8dc45331698cc,     //   0.62964,  -0.77689
+    0x3fe44cf325091dd6,    0xbfe8bc806b151741,     //   0.63439,  -0.77301
+    0x3fe473b51b987347,    0xbfe89c7e9a4dd4ab,     //   0.63912,   -0.7691
+    0x3fe49a449b9b0938,    0xbfe87c400fba2ebf,     //   0.64383,  -0.76517
+    0x3fe4c0a145ec0004,    0xbfe85bc51ae958cc,     //   0.64851,   -0.7612
+    0x3fe4e6cabbe3e5e9,    0xbfe83b0e0bff976e,     //   0.65317,  -0.75721
+    0x3fe50cc09f59a09b,    0xbfe81a1b33b57acc,     //   0.65781,  -0.75319
+    0x3fe5328292a35596,    0xbfe7f8ece3571771,     //   0.66242,  -0.74914
+    0x3fe5581038975137,    0xbfe7d7836cc33db2,     //     0.667,  -0.74506
+    0x3fe57d69348cec9f,    0xbfe7b5df226aafb0,     //   0.67156,  -0.74095
+    0x3fe5a28d2a5d7250,    0xbfe79400574f55e4,     //   0.67609,  -0.73682
+    0x3fe5c77bbe65018c,    0xbfe771e75f037261,     //    0.6806,  -0.73265
+    0x3fe5ec3495837074,    0xbfe74f948da8d28d,     //   0.68508,  -0.72846
+    0x3fe610b7551d2cde,    0xbfe72d0837efff97,     //   0.68954,  -0.72425
+    0x3fe63503a31c1be8,    0xbfe70a42b3176d7a,     //   0.69397,     -0.72
+    0x3fe6591925f0783e,    0xbfe6e74454eaa8ae,     //   0.69838,  -0.71573
+    0x3fe67cf78491af10,    0xbfe6c40d73c18275,     //   0.70275,  -0.71143
+    0x3fe6a09e667f3bcc,    0xbfe6a09e667f3bcc,     //   0.70711,  -0.70711
+    0x3fe6c40d73c18275,    0xbfe67cf78491af10,     //   0.71143,  -0.70275
+    0x3fe6e74454eaa8ae,    0xbfe6591925f0783e,     //   0.71573,  -0.69838
+    0x3fe70a42b3176d7a,    0xbfe63503a31c1be8,     //      0.72,  -0.69397
+    0x3fe72d0837efff97,    0xbfe610b7551d2cde,     //   0.72425,  -0.68954
+    0x3fe74f948da8d28d,    0xbfe5ec3495837074,     //   0.72846,  -0.68508
+    0x3fe771e75f037261,    0xbfe5c77bbe65018c,     //   0.73265,   -0.6806
+    0x3fe79400574f55e4,    0xbfe5a28d2a5d7250,     //   0.73682,  -0.67609
+    0x3fe7b5df226aafb0,    0xbfe57d69348cec9f,     //   0.74095,  -0.67156
+    0x3fe7d7836cc33db2,    0xbfe5581038975137,     //   0.74506,    -0.667
+    0x3fe7f8ece3571771,    0xbfe5328292a35596,     //   0.74914,  -0.66242
+    0x3fe81a1b33b57acc,    0xbfe50cc09f59a09b,     //   0.75319,  -0.65781
+    0x3fe83b0e0bff976e,    0xbfe4e6cabbe3e5e9,     //   0.75721,  -0.65317
+    0x3fe85bc51ae958cc,    0xbfe4c0a145ec0004,     //    0.7612,  -0.64851
+    0x3fe87c400fba2ebf,    0xbfe49a449b9b0938,     //   0.76517,  -0.64383
+    0x3fe89c7e9a4dd4ab,    0xbfe473b51b987347,     //    0.7691,  -0.63912
+    0x3fe8bc806b151741,    0xbfe44cf325091dd6,     //   0.77301,  -0.63439
+    0x3fe8dc45331698cc,    0xbfe425ff178e6bb1,     //   0.77689,  -0.62964
+    0x3fe8fbcca3ef940d,    0xbfe3fed9534556d4,     //   0.78074,  -0.62486
+    0x3fe91b166fd49da2,    0xbfe3d78238c58343,     //   0.78456,  -0.62006
+    0x3fe93a22499263fc,    0xbfe3affa292050b9,     //   0.78835,  -0.61523
+    0x3fe958efe48e6dd7,    0xbfe3884185dfeb22,     //   0.79211,  -0.61038
+    0x3fe9777ef4c7d742,    0xbfe36058b10659f3,     //   0.79584,  -0.60551
+    0x3fe995cf2ed80d22,    0xbfe338400d0c8e57,     //   0.79954,  -0.60062
+    0x3fe9b3e047f38741,    0xbfe30ff7fce17035,     //   0.80321,   -0.5957
+    0x3fe9d1b1f5ea80d6,    0xbfe2e780e3e8ea16,     //   0.80685,  -0.59076
+    0x3fe9ef43ef29af94,    0xbfe2bedb25faf3ea,     //   0.81046,   -0.5858
+    0x3fea0c95eabaf937,    0xbfe2960727629ca8,     //   0.81404,  -0.58081
+    0x3fea29a7a0462782,    0xbfe26d054cdd12df,     //   0.81758,  -0.57581
+    0x3fea4678c8119ac8,    0xbfe243d5fb98ac1f,     //    0.8211,  -0.57078
+    0x3fea63091b02fae2,    0xbfe21a799933eb58,     //   0.82459,  -0.56573
+    0x3fea7f58529fe69d,    0xbfe1f0f08bbc861b,     //   0.82805,  -0.56066
+    0x3fea9b66290ea1a3,    0xbfe1c73b39ae68c8,     //   0.83147,  -0.55557
+    0x3feab7325916c0d4,    0xbfe19d5a09f2b9b8,     //   0.83486,  -0.55046
+    0x3fead2bc9e21d511,    0xbfe1734d63dedb49,     //   0.83822,  -0.54532
+    0x3feaee04b43c1474,    0xbfe14915af336ceb,     //   0.84155,  -0.54017
+    0x3feb090a58150200,    0xbfe11eb3541b4b22,     //   0.84485,    -0.535
+    0x3feb23cd470013b4,    0xbfe0f426bb2a8e7d,     //   0.84812,   -0.5298
+    0x3feb3e4d3ef55712,    0xbfe0c9704d5d898f,     //   0.85136,  -0.52459
+    0x3feb5889fe921405,    0xbfe09e907417c5e1,     //   0.85456,  -0.51936
+    0x3feb728345196e3e,    0xbfe073879922ffed,     //   0.85773,   -0.5141
+    0x3feb8c38d27504e9,    0xbfe0485626ae221a,     //   0.86087,  -0.50883
+    0x3feba5aa673590d2,    0xbfe01cfc874c3eb7,     //   0.86397,  -0.50354
+    0x3febbed7c49380ea,    0xbfdfe2f64be7120f,     //   0.86705,  -0.49823
+    0x3febd7c0ac6f952a,    0xbfdf8ba4dbf89aba,     //   0.87009,   -0.4929
+    0x3febf064e15377dd,    0xbfdf3405963fd068,     //   0.87309,  -0.48755
+    0x3fec08c426725549,    0xbfdedc1952ef78d5,     //   0.87607,  -0.48218
+    0x3fec20de3fa971b0,    0xbfde83e0eaf85113,     //   0.87901,   -0.4768
+    0x3fec38b2f180bdb1,    0xbfde2b5d3806f63b,     //   0.88192,   -0.4714
+    0x3fec5042012b6907,    0xbfddd28f1481cc58,     //    0.8848,  -0.46598
+    0x3fec678b3488739b,    0xbfdd79775b86e389,     //   0.88764,  -0.46054
+    0x3fec7e8e52233cf3,    0xbfdd2016e8e9db5b,     //   0.89045,  -0.45508
+    0x3fec954b213411f5,    0xbfdcc66e9931c45d,     //   0.89322,  -0.44961
+    0x3fecabc169a0b901,    0xbfdc6c7f4997000a,     //   0.89597,  -0.44412
+    0x3fecc1f0f3fcfc5c,    0xbfdc1249d8011ee7,     //   0.89867,  -0.43862
+    0x3fecd7d9898b32f6,    0xbfdbb7cf2304bd01,     //   0.90135,  -0.43309
+    0x3feced7af43cc773,    0xbfdb5d1009e15cc0,     //   0.90399,  -0.42756
+    0x3fed02d4feb2bd92,    0xbfdb020d6c7f4009,     //    0.9066,    -0.422
+    0x3fed17e7743e35dc,    0xbfdaa6c82b6d3fc9,     //   0.90917,  -0.41643
+    0x3fed2cb220e0ef9f,    0xbfda4b4127dea1e4,     //   0.91171,  -0.41084
+    0x3fed4134d14dc93a,    0xbfd9ef7943a8ed8a,     //   0.91421,  -0.40524
+    0x3fed556f52e93eb1,    0xbfd993716141bdfe,     //   0.91668,  -0.39962
+    0x3fed696173c9e68b,    0xbfd9372a63bc93d7,     //   0.91911,  -0.39399
+    0x3fed7d0b02b8ecf9,    0xbfd8daa52ec8a4af,     //   0.92151,  -0.38835
+    0x3fed906bcf328d46,    0xbfd87de2a6aea963,     //   0.92388,  -0.38268
+    0x3feda383a9668988,    0xbfd820e3b04eaac4,     //   0.92621,  -0.37701
+    0x3fedb6526238a09b,    0xbfd7c3a9311dcce7,     //   0.92851,  -0.37132
+    0x3fedc8d7cb410260,    0xbfd766340f2418f6,     //   0.93077,  -0.36561
+    0x3feddb13b6ccc23d,    0xbfd7088530fa459e,     //   0.93299,   -0.3599
+    0x3feded05f7de47da,    0xbfd6aa9d7dc77e16,     //   0.93518,  -0.35416
+    0x3fedfeae622dbe2b,    0xbfd64c7ddd3f27c6,     //   0.93734,  -0.34842
+    0x3fee100cca2980ac,    0xbfd5ee27379ea693,     //   0.93946,  -0.34266
+    0x3fee212104f686e5,    0xbfd58f9a75ab1fdd,     //   0.94154,  -0.33689
+    0x3fee31eae870ce25,    0xbfd530d880af3c24,     //   0.94359,  -0.33111
+    0x3fee426a4b2bc17e,    0xbfd4d1e24278e76a,     //   0.94561,  -0.32531
+    0x3fee529f04729ffc,    0xbfd472b8a5571054,     //   0.94759,   -0.3195
+    0x3fee6288ec48e112,    0xbfd4135c94176602,     //   0.94953,  -0.31368
+    0x3fee7227db6a9744,    0xbfd3b3cefa0414b7,     //   0.95144,  -0.30785
+    0x3fee817bab4cd10d,    0xbfd35410c2e18152,     //   0.95331,  -0.30201
+    0x3fee9084361df7f3,    0xbfd2f422daec0386,     //   0.95514,  -0.29615
+    0x3fee9f4156c62dda,    0xbfd294062ed59f05,     //   0.95694,  -0.29028
+    0x3feeadb2e8e7a88e,    0xbfd233bbabc3bb72,     //    0.9587,  -0.28441
+    0x3feebbd8c8df0b74,    0xbfd1d3443f4cdb3d,     //   0.96043,  -0.27852
+    0x3feec9b2d3c3bf84,    0xbfd172a0d7765177,     //   0.96212,  -0.27262
+    0x3feed740e7684963,    0xbfd111d262b1f677,     //   0.96378,  -0.26671
+    0x3feee482e25a9dbc,    0xbfd0b0d9cfdbdb90,     //   0.96539,  -0.26079
+    0x3feef178a3e473c2,    0xbfd04fb80e37fdae,     //   0.96698,  -0.25487
+    0x3feefe220c0b95ec,    0xbfcfdcdc1adfedf8,     //   0.96852,  -0.24893
+    0x3fef0a7efb9230d7,    0xbfcf19f97b215f1a,     //   0.97003,  -0.24298
+    0x3fef168f53f7205d,    0xbfce56ca1e101a1b,     //    0.9715,  -0.23702
+    0x3fef2252f7763ada,    0xbfcd934fe5454311,     //   0.97294,  -0.23106
+    0x3fef2dc9c9089a9d,    0xbfcccf8cb312b286,     //   0.97434,  -0.22508
+    0x3fef38f3ac64e589,    0xbfcc0b826a7e4f63,     //    0.9757,   -0.2191
+    0x3fef43d085ff92dd,    0xbfcb4732ef3d6722,     //   0.97703,  -0.21311
+    0x3fef4e603b0b2f2d,    0xbfca82a025b00451,     //   0.97832,  -0.20711
+    0x3fef58a2b1789e84,    0xbfc9bdcbf2dc4366,     //   0.97957,   -0.2011
+    0x3fef6297cff75cb0,    0xbfc8f8b83c69a60a,     //   0.98079,  -0.19509
+    0x3fef6c3f7df5bbb7,    0xbfc83366e89c64c5,     //   0.98196,  -0.18907
+    0x3fef7599a3a12077,    0xbfc76dd9de50bf31,     //   0.98311,  -0.18304
+    0x3fef7ea629e63d6e,    0xbfc6a81304f64ab2,     //   0.98421,    -0.177
+    0x3fef8764fa714ba9,    0xbfc5e214448b3fc6,     //   0.98528,  -0.17096
+    0x3fef8fd5ffae41db,    0xbfc51bdf8597c5f2,     //   0.98631,  -0.16491
+    0x3fef97f924c9099b,    0xbfc45576b1293e5a,     //    0.9873,  -0.15886
+    0x3fef9fce55adb2c8,    0xbfc38edbb0cd8d14,     //   0.98826,   -0.1528
+    0x3fefa7557f08a517,    0xbfc2c8106e8e613a,     //   0.98918,  -0.14673
+    0x3fefae8e8e46cfbb,    0xbfc20116d4ec7bce,     //   0.99006,  -0.14066
+    0x3fefb5797195d741,    0xbfc139f0cedaf576,     //    0.9909,  -0.13458
+    0x3fefbc1617e44186,    0xbfc072a047ba831d,     //   0.99171,   -0.1285
+    0x3fefc26470e19fd3,    0xbfbf564e56a9730e,     //   0.99248,  -0.12241
+    0x3fefc8646cfeb721,    0xbfbdc70ecbae9fc8,     //   0.99321,  -0.11632
+    0x3fefce15fd6da67b,    0xbfbc3785c79ec2d5,     //   0.99391,  -0.11022
+    0x3fefd37914220b84,    0xbfbaa7b724495c04,     //   0.99456,  -0.10412
+    0x3fefd88da3d12526,    0xbfb917a6bc29b42c,     //   0.99518, -0.098017
+    0x3fefdd539ff1f456,    0xbfb787586a5d5b21,     //   0.99577, -0.091909
+    0x3fefe1cafcbd5b09,    0xbfb5f6d00a9aa419,     //   0.99631, -0.085797
+    0x3fefe5f3af2e3940,    0xbfb4661179272096,     //   0.99682, -0.079682
+    0x3fefe9cdad01883a,    0xbfb2d52092ce19f6,     //   0.99729, -0.073565
+    0x3fefed58ecb673c4,    0xbfb1440134d709b2,     //   0.99772, -0.067444
+    0x3feff095658e71ad,    0xbfaf656e79f820e0,     //   0.99812, -0.061321
+    0x3feff3830f8d575c,    0xbfac428d12c0d7e3,     //   0.99848, -0.055195
+    0x3feff621e3796d7e,    0xbfa91f65f10dd814,     //    0.9988, -0.049068
+    0x3feff871dadb81df,    0xbfa5fc00d290cd43,     //   0.99908, -0.042938
+    0x3feffa72effef75d,    0xbfa2d865759455cd,     //   0.99932, -0.036807
+    0x3feffc251df1d3f8,    0xbf9f693731d1cf01,     //   0.99953, -0.030675
+    0x3feffd886084cd0d,    0xbf992155f7a3667e,     //    0.9997, -0.024541
+    0x3feffe9cb44b51a1,    0xbf92d936bbe30efd,     //   0.99983, -0.018407
+    0x3fefff62169b92db,    0xbf8921d1fcdec784,     //   0.99992, -0.012272
+    0x3fefffd8858e8a92,    0xbf7921f0fe670071,     //   0.99998,-0.0061359
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_2048)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_2048[4096] = {
+    0x3ff0000000000000,     0x0000000000000000,     //         1,         0
+    0x3feffff621621d02,     0x3f6921f8becca4ba,     //         1,  0.003068
+    0x3fefffd8858e8a92,     0x3f7921f0fe670071,     //   0.99998, 0.0061359
+    0x3fefffa72c978c4f,     0x3f82d96b0e509703,     //   0.99996, 0.0092038
+    0x3fefff62169b92db,     0x3f8921d1fcdec784,     //   0.99992,  0.012272
+    0x3fefff0943c53bd1,     0x3f8f6a296ab997ca,     //   0.99988,  0.015339
+    0x3feffe9cb44b51a1,     0x3f92d936bbe30efd,     //   0.99983,  0.018407
+    0x3feffe1c6870cb77,     0x3f95fd4d21fab226,     //   0.99977,  0.021474
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //    0.9997,  0.024541
+    0x3feffce09ce2a679,     0x3f9c454f4ce53b1c,     //   0.99962,  0.027608
+    0x3feffc251df1d3f8,     0x3f9f693731d1cf01,     //   0.99953,  0.030675
+    0x3feffb55e425fdae,     0x3fa14685db42c17e,     //   0.99943,  0.033741
+    0x3feffa72effef75d,     0x3fa2d865759455cd,     //   0.99932,  0.036807
+    0x3feff97c4208c014,     0x3fa46a396ff86179,     //    0.9992,  0.039873
+    0x3feff871dadb81df,     0x3fa5fc00d290cd43,     //   0.99908,  0.042938
+    0x3feff753bb1b9164,     0x3fa78dbaa5874685,     //   0.99894,  0.046003
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //    0.9988,  0.049068
+    0x3feff4dc54b1bed3,     0x3faab101bd5f8317,     //   0.99864,  0.052132
+    0x3feff3830f8d575c,     0x3fac428d12c0d7e3,     //   0.99848,  0.055195
+    0x3feff21614e131ed,     0x3fadd406f9808ec8,     //    0.9983,  0.058258
+    0x3feff095658e71ad,     0x3faf656e79f820e0,     //   0.99812,  0.061321
+    0x3fefef0102826191,     0x3fb07b614e463064,     //   0.99793,  0.064383
+    0x3fefed58ecb673c4,     0x3fb1440134d709b2,     //   0.99772,  0.067444
+    0x3fefeb9d2530410f,     0x3fb20c9674ed444c,     //   0.99751,  0.070505
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     //   0.99729,  0.073565
+    0x3fefe7ea85482d60,     0x3fb39d9f12c5a299,     //   0.99706,  0.076624
+    0x3fefe5f3af2e3940,     0x3fb4661179272096,     //   0.99682,  0.079682
+    0x3fefe3e92be9d886,     0x3fb52e774a4d4d0a,     //   0.99657,   0.08274
+    0x3fefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //   0.99631,  0.085797
+    0x3fefdf9922f73307,     0x3fb6bf1b3e79b129,     //   0.99604,  0.088854
+    0x3fefdd539ff1f456,     0x3fb787586a5d5b21,     //   0.99577,  0.091909
+    0x3fefdafa7514538c,     0x3fb84f8712c130a0,     //   0.99548,  0.094963
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //   0.99518,  0.098017
+    0x3fefd60d2da75c9e,     0x3fb9dfb6eb24a85c,     //   0.99488,   0.10107
+    0x3fefd37914220b84,     0x3fbaa7b724495c04,     //   0.99456,   0.10412
+    0x3fefd0d158d86087,     0x3fbb6fa6ec38f64c,     //   0.99424,   0.10717
+    0x3fefce15fd6da67b,     0x3fbc3785c79ec2d5,     //   0.99391,   0.11022
+    0x3fefcb4703914354,     0x3fbcff533b307dc1,     //   0.99356,   0.11327
+    0x3fefc8646cfeb721,     0x3fbdc70ecbae9fc8,     //   0.99321,   0.11632
+    0x3fefc56e3b7d9af6,     0x3fbe8eb7fde4aa3e,     //   0.99285,   0.11937
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     //   0.99248,   0.12241
+    0x3fefbf470f0a8d88,     0x3fc00ee8ad6fb85b,     //    0.9921,   0.12545
+    0x3fefbc1617e44186,     0x3fc072a047ba831d,     //   0.99171,    0.1285
+    0x3fefb8d18d66adb7,     0x3fc0d64dbcb26786,     //   0.99131,   0.13154
+    0x3fefb5797195d741,     0x3fc139f0cedaf576,     //    0.9909,   0.13458
+    0x3fefb20dc681d54d,     0x3fc19d8940be24e7,     //   0.99049,   0.13762
+    0x3fefae8e8e46cfbb,     0x3fc20116d4ec7bce,     //   0.99006,   0.14066
+    0x3fefaafbcb0cfddc,     0x3fc264994dfd340a,     //   0.98962,    0.1437
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //   0.98918,   0.14673
+    0x3fefa39bac7a1791,     0x3fc32b7bf94516a7,     //   0.98872,   0.14976
+    0x3fef9fce55adb2c8,     0x3fc38edbb0cd8d14,     //   0.98826,    0.1528
+    0x3fef9bed7cfbde29,     0x3fc3f22f57db4893,     //   0.98778,   0.15583
+    0x3fef97f924c9099b,     0x3fc45576b1293e5a,     //    0.9873,   0.15886
+    0x3fef93f14f85ac08,     0x3fc4b8b17f79fa88,     //   0.98681,   0.16189
+    0x3fef8fd5ffae41db,     0x3fc51bdf8597c5f2,     //   0.98631,   0.16491
+    0x3fef8ba737cb4b78,     0x3fc57f008654cbde,     //    0.9858,   0.16794
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     //   0.98528,   0.17096
+    0x3fef830f4a40c60c,     0x3fc6451a831d830d,     //   0.98475,   0.17398
+    0x3fef7ea629e63d6e,     0x3fc6a81304f64ab2,     //   0.98421,     0.177
+    0x3fef7a299c1a322a,     0x3fc70afd8d08c4ff,     //   0.98366,   0.18002
+    0x3fef7599a3a12077,     0x3fc76dd9de50bf31,     //   0.98311,   0.18304
+    0x3fef70f6434b7eb7,     0x3fc7d0a7bbd2cb1b,     //   0.98254,   0.18606
+    0x3fef6c3f7df5bbb7,     0x3fc83366e89c64c5,     //   0.98196,   0.18907
+    0x3fef677556883cee,     0x3fc8961727c41804,     //   0.98138,   0.19208
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //   0.98079,   0.19509
+    0x3fef5da6ed43685d,     0x3fc95b49e9b62af9,     //   0.98018,    0.1981
+    0x3fef58a2b1789e84,     0x3fc9bdcbf2dc4366,     //   0.97957,    0.2011
+    0x3fef538b1faf2d07,     0x3fca203e1b1831da,     //   0.97895,   0.20411
+    0x3fef4e603b0b2f2d,     0x3fca82a025b00451,     //   0.97832,   0.20711
+    0x3fef492206bcabb4,     0x3fcae4f1d5f3b9ab,     //   0.97768,   0.21011
+    0x3fef43d085ff92dd,     0x3fcb4732ef3d6722,     //   0.97703,   0.21311
+    0x3fef3e6bbc1bbc65,     0x3fcba96334f15dad,     //   0.97637,   0.21611
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //    0.9757,    0.2191
+    0x3fef33685a3aaef0,     0x3fcc6d90535d74dc,     //   0.97503,   0.22209
+    0x3fef2dc9c9089a9d,     0x3fcccf8cb312b286,     //   0.97434,   0.22508
+    0x3fef2817fc4609ce,     0x3fcd31774d2cbdee,     //   0.97364,   0.22807
+    0x3fef2252f7763ada,     0x3fcd934fe5454311,     //   0.97294,   0.23106
+    0x3fef1c7abe284708,     0x3fcdf5163f01099a,     //   0.97223,   0.23404
+    0x3fef168f53f7205d,     0x3fce56ca1e101a1b,     //    0.9715,   0.23702
+    0x3fef1090bc898f5f,     0x3fceb86b462de348,     //   0.97077,      0.24
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //   0.97003,   0.24298
+    0x3fef045a14cf738c,     0x3fcf7b7480bd3801,     //   0.96928,   0.24596
+    0x3feefe220c0b95ec,     0x3fcfdcdc1adfedf8,     //   0.96852,   0.24893
+    0x3feef7d6e51ca3c0,     0x3fd01f1806b9fdd2,     //   0.96775,    0.2519
+    0x3feef178a3e473c2,     0x3fd04fb80e37fdae,     //   0.96698,   0.25487
+    0x3feeeb074c50a544,     0x3fd0804e05eb661e,     //   0.96619,   0.25783
+    0x3feee482e25a9dbc,     0x3fd0b0d9cfdbdb90,     //   0.96539,   0.26079
+    0x3feeddeb6a078651,     0x3fd0e15b4e1749cd,     //   0.96459,   0.26375
+    0x3feed740e7684963,     0x3fd111d262b1f677,     //   0.96378,   0.26671
+    0x3feed0835e999009,     0x3fd1423eefc69378,     //   0.96295,   0.26967
+    0x3feec9b2d3c3bf84,     0x3fd172a0d7765177,     //   0.96212,   0.27262
+    0x3feec2cf4b1af6b2,     0x3fd1a2f7fbe8f243,     //   0.96128,   0.27557
+    0x3feebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //   0.96043,   0.27852
+    0x3feeb4cf515b8811,     0x3fd2038583d727bd,     //   0.95957,   0.28146
+    0x3feeadb2e8e7a88e,     0x3fd233bbabc3bb72,     //    0.9587,   0.28441
+    0x3feea68393e65800,     0x3fd263e6995554ba,     //   0.95783,   0.28735
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //   0.95694,   0.29028
+    0x3fee97ec36016b30,     0x3fd2c41a4e954520,     //   0.95605,   0.29322
+    0x3fee9084361df7f3,     0x3fd2f422daec0386,     //   0.95514,   0.29615
+    0x3fee89095bad6025,     0x3fd3241fb638baaf,     //   0.95423,   0.29908
+    0x3fee817bab4cd10d,     0x3fd35410c2e18152,     //   0.95331,   0.30201
+    0x3fee79db29a5165a,     0x3fd383f5e353b6aa,     //   0.95238,   0.30493
+    0x3fee7227db6a9744,     0x3fd3b3cefa0414b7,     //   0.95144,   0.30785
+    0x3fee6a61c55d53a7,     0x3fd3e39be96ec271,     //   0.95049,   0.31077
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     //   0.94953,   0.31368
+    0x3fee5a9d550467d3,     0x3fd44310dc8936f0,     //   0.94856,   0.31659
+    0x3fee529f04729ffc,     0x3fd472b8a5571054,     //   0.94759,    0.3195
+    0x3fee4a8dff81ce5e,     0x3fd4a253d11b82f3,     //    0.9466,   0.32241
+    0x3fee426a4b2bc17e,     0x3fd4d1e24278e76a,     //   0.94561,   0.32531
+    0x3fee3a33ec75ce85,     0x3fd50163dc197047,     //    0.9446,   0.32821
+    0x3fee31eae870ce25,     0x3fd530d880af3c24,     //   0.94359,   0.33111
+    0x3fee298f4439197a,     0x3fd5604012f467b4,     //   0.94257,     0.334
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //   0.94154,   0.33689
+    0x3fee18a02fdc66d9,     0x3fd5bee78b9db3b6,     //   0.94051,   0.33978
+    0x3fee100cca2980ac,     0x3fd5ee27379ea693,     //   0.93946,   0.34266
+    0x3fee0766d9280f54,     0x3fd61d595c88c203,     //    0.9384,   0.34554
+    0x3fedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //   0.93734,   0.34842
+    0x3fedf5e36a9ba59c,     0x3fd67b949cad63ca,     //   0.93627,   0.35129
+    0x3feded05f7de47da,     0x3fd6aa9d7dc77e16,     //   0.93518,   0.35416
+    0x3fede4160f6d8d81,     0x3fd6d998638a0cb5,     //   0.93409,   0.35703
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     //   0.93299,    0.3599
+    0x3fedd1fef38a915a,     0x3fd73763c9261092,     //   0.93188,   0.36276
+    0x3fedc8d7cb410260,     0x3fd766340f2418f6,     //   0.93077,   0.36561
+    0x3fedbf9e4395759a,     0x3fd794f5e613dfae,     //   0.92964,   0.36847
+    0x3fedb6526238a09b,     0x3fd7c3a9311dcce7,     //   0.92851,   0.37132
+    0x3fedacf42ce68ab9,     0x3fd7f24dd37341e3,     //   0.92736,   0.37416
+    0x3feda383a9668988,     0x3fd820e3b04eaac4,     //   0.92621,   0.37701
+    0x3fed9a00dd8b3d46,     0x3fd84f6aaaf3903f,     //   0.92505,   0.37985
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //   0.92388,   0.38268
+    0x3fed86c48445a450,     0x3fd8ac4b86d5ed44,     //    0.9227,   0.38552
+    0x3fed7d0b02b8ecf9,     0x3fd8daa52ec8a4af,     //   0.92151,   0.38835
+    0x3fed733f508c0dff,     0x3fd908ef81ef7bd1,     //   0.92032,   0.39117
+    0x3fed696173c9e68b,     0x3fd9372a63bc93d7,     //   0.91911,   0.39399
+    0x3fed5f7172888a7f,     0x3fd96555b7ab948f,     //    0.9179,   0.39681
+    0x3fed556f52e93eb1,     0x3fd993716141bdfe,     //   0.91668,   0.39962
+    0x3fed4b5b1b187524,     0x3fd9c17d440df9f2,     //   0.91545,   0.40243
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //   0.91421,   0.40524
+    0x3fed36fc7bcbfbdc,     0x3fda1d6543b50ac0,     //   0.91296,   0.40804
+    0x3fed2cb220e0ef9f,     0x3fda4b4127dea1e4,     //   0.91171,   0.41084
+    0x3fed2255c6e5a4e1,     0x3fda790cd3dbf31a,     //   0.91044,   0.41364
+    0x3fed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //   0.90917,   0.41643
+    0x3fed0d672f59d2b9,     0x3fdad473125cdc08,     //   0.90789,   0.41922
+    0x3fed02d4feb2bd92,     0x3fdb020d6c7f4009,     //    0.9066,     0.422
+    0x3fecf830e8ce467b,     0x3fdb2f971db31972,     //    0.9053,   0.42478
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //   0.90399,   0.42756
+    0x3fece2b32799a060,     0x3fdb8a7814fd5693,     //   0.90267,   0.43033
+    0x3fecd7d9898b32f6,     0x3fdbb7cf2304bd01,     //   0.90135,   0.43309
+    0x3fecccee20c2de9f,     0x3fdbe51517ffc0d9,     //   0.90002,   0.43586
+    0x3fecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //   0.89867,   0.43862
+    0x3fecb6e20a00da99,     0x3fdc3f6d47263129,     //   0.89732,   0.44137
+    0x3fecabc169a0b901,     0x3fdc6c7f4997000a,     //   0.89597,   0.44412
+    0x3feca08f19b9c449,     0x3fdc997fc3865388,     //    0.8946,   0.44687
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     //   0.89322,   0.44961
+    0x3fec89f587029c13,     0x3fdcf34baee1cd21,     //   0.89184,   0.45235
+    0x3fec7e8e52233cf3,     0x3fdd2016e8e9db5b,     //   0.89045,   0.45508
+    0x3fec7315899eaad7,     0x3fdd4cd02ba8609c,     //   0.88905,   0.45781
+    0x3fec678b3488739b,     0x3fdd79775b86e389,     //   0.88764,   0.46054
+    0x3fec5bef59fef85a,     0x3fdda60c5cfa10d8,     //   0.88622,   0.46326
+    0x3fec5042012b6907,     0x3fddd28f1481cc58,     //    0.8848,   0.46598
+    0x3fec44833141c004,     0x3fddfeff66a941de,     //   0.88336,   0.46869
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //   0.88192,    0.4714
+    0x3fec2cd14931e3f1,     0x3fde57a86d3cd824,     //   0.88047,    0.4741
+    0x3fec20de3fa971b0,     0x3fde83e0eaf85113,     //   0.87901,    0.4768
+    0x3fec14d9dc465e58,     0x3fdeb00695f25620,     //   0.87755,   0.47949
+    0x3fec08c426725549,     0x3fdedc1952ef78d5,     //   0.87607,   0.48218
+    0x3febfc9d25a1b147,     0x3fdf081906bff7fd,     //   0.87459,   0.48487
+    0x3febf064e15377dd,     0x3fdf3405963fd068,     //   0.87309,   0.48755
+    0x3febe41b611154c1,     0x3fdf5fdee656cda3,     //    0.8716,   0.49023
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //   0.87009,    0.4929
+    0x3febcb54cb0d2327,     0x3fdfb7575c24d2de,     //   0.86857,   0.49557
+    0x3febbed7c49380ea,     0x3fdfe2f64be7120f,     //   0.86705,   0.49823
+    0x3febb249a0b6c40d,     0x3fe00740c82b82e0,     //   0.86551,   0.50089
+    0x3feba5aa673590d2,     0x3fe01cfc874c3eb7,     //   0.86397,   0.50354
+    0x3feb98fa1fd9155e,     0x3fe032ae55edbd95,     //   0.86242,   0.50619
+    0x3feb8c38d27504e9,     0x3fe0485626ae221a,     //   0.86087,   0.50883
+    0x3feb7f6686e792ea,     0x3fe05df3ec31b8b6,     //    0.8593,   0.51147
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //   0.85773,    0.5141
+    0x3feb658f14fdbc47,     0x3fe089112032b08c,     //   0.85615,   0.51673
+    0x3feb5889fe921405,     0x3fe09e907417c5e1,     //   0.85456,   0.51936
+    0x3feb4b7409de7925,     0x3fe0b405878f85ec,     //   0.85296,   0.52198
+    0x3feb3e4d3ef55712,     0x3fe0c9704d5d898f,     //   0.85136,   0.52459
+    0x3feb3115a5f37bf4,     0x3fe0ded0b84bc4b5,     //   0.84974,    0.5272
+    0x3feb23cd470013b4,     0x3fe0f426bb2a8e7d,     //   0.84812,    0.5298
+    0x3feb16742a4ca2f5,     0x3fe1097248d0a956,     //   0.84649,    0.5324
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     //   0.84485,     0.535
+    0x3feafb8fd89f57b6,     0x3fe133e9cfee254e,     //   0.84321,   0.53759
+    0x3feaee04b43c1474,     0x3fe14915af336ceb,     //   0.84155,   0.54017
+    0x3feae068f345ecef,     0x3fe15e36e4dbe2bc,     //   0.83989,   0.54275
+    0x3fead2bc9e21d511,     0x3fe1734d63dedb49,     //   0.83822,   0.54532
+    0x3feac4ffbd3efac8,     0x3fe188591f3a46e5,     //   0.83655,   0.54789
+    0x3feab7325916c0d4,     0x3fe19d5a09f2b9b8,     //   0.83486,   0.55046
+    0x3feaa9547a2cb98e,     0x3fe1b250171373be,     //   0.83317,   0.55302
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //   0.83147,   0.55557
+    0x3fea8d676e545ad2,     0x3fe1dc1b64dc4872,     //   0.82976,   0.55812
+    0x3fea7f58529fe69d,     0x3fe1f0f08bbc861b,     //   0.82805,   0.56066
+    0x3fea7138de9d60f5,     0x3fe205baa17560d6,     //   0.82632,    0.5632
+    0x3fea63091b02fae2,     0x3fe21a799933eb58,     //   0.82459,   0.56573
+    0x3fea54c91090f524,     0x3fe22f2d662c13e1,     //   0.82285,   0.56826
+    0x3fea4678c8119ac8,     0x3fe243d5fb98ac1f,     //    0.8211,   0.57078
+    0x3fea38184a593bc6,     0x3fe258734cbb7110,     //   0.81935,    0.5733
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     //   0.81758,   0.57581
+    0x3fea1b26d2c0a75e,     0x3fe2818bef4d3cba,     //   0.81581,   0.57831
+    0x3fea0c95eabaf937,     0x3fe2960727629ca8,     //   0.81404,   0.58081
+    0x3fe9fdf4f13149de,     0x3fe2aa76e87aeb58,     //   0.81225,   0.58331
+    0x3fe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //   0.81046,    0.5858
+    0x3fe9e082edb42472,     0x3fe2d333d34e9bb7,     //   0.80866,   0.58828
+    0x3fe9d1b1f5ea80d6,     0x3fe2e780e3e8ea16,     //   0.80685,   0.59076
+    0x3fe9c2d110f075c3,     0x3fe2fbc24b441015,     //   0.80503,   0.59323
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //   0.80321,    0.5957
+    0x3fe9a4dfa42b06b2,     0x3fe32421ec49a620,     //   0.80138,   0.59816
+    0x3fe995cf2ed80d22,     0x3fe338400d0c8e57,     //   0.79954,   0.60062
+    0x3fe986aef1457594,     0x3fe34c5252c14de1,     //   0.79769,   0.60307
+    0x3fe9777ef4c7d742,     0x3fe36058b10659f3,     //   0.79584,   0.60551
+    0x3fe9683f42bd7fe1,     0x3fe374531b817f8d,     //   0.79398,   0.60795
+    0x3fe958efe48e6dd7,     0x3fe3884185dfeb22,     //   0.79211,   0.61038
+    0x3fe94990e3ac4a6c,     0x3fe39c23e3d63029,     //   0.79023,   0.61281
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     //   0.78835,   0.61523
+    0x3fe92aa41fc5a815,     0x3fe3c3c44981c517,     //   0.78646,   0.61765
+    0x3fe91b166fd49da2,     0x3fe3d78238c58343,     //   0.78456,   0.62006
+    0x3fe90b7943575efe,     0x3fe3eb33eabe0680,     //   0.78265,   0.62246
+    0x3fe8fbcca3ef940d,     0x3fe3fed9534556d4,     //   0.78074,   0.62486
+    0x3fe8ec109b486c49,     0x3fe41272663d108c,     //   0.77882,   0.62725
+    0x3fe8dc45331698cc,     0x3fe425ff178e6bb1,     //   0.77689,   0.62964
+    0x3fe8cc6a75184655,     0x3fe4397f5b2a4380,     //   0.77495,   0.63202
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //   0.77301,   0.63439
+    0x3fe8ac871ede1d88,     0x3fe4605a692b32a2,     //   0.77106,   0.63676
+    0x3fe89c7e9a4dd4ab,     0x3fe473b51b987347,     //    0.7691,   0.63912
+    0x3fe88c66e7481ba1,     0x3fe48703306091fe,     //   0.76714,   0.64148
+    0x3fe87c400fba2ebf,     0x3fe49a449b9b0938,     //   0.76517,   0.64383
+    0x3fe86c0a1d9aa195,     0x3fe4ad79516722f0,     //   0.76319,   0.64618
+    0x3fe85bc51ae958cc,     0x3fe4c0a145ec0004,     //    0.7612,   0.64851
+    0x3fe84b7111af83f9,     0x3fe4d3bc6d589f80,     //   0.75921,   0.65085
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //   0.75721,   0.65317
+    0x3fe82a9c13f545ff,     0x3fe4f9cc25cca486,     //    0.7552,   0.65549
+    0x3fe81a1b33b57acc,     0x3fe50cc09f59a09b,     //   0.75319,   0.65781
+    0x3fe8098b756e52fa,     0x3fe51fa81cd99aa6,     //   0.75117,   0.66011
+    0x3fe7f8ece3571771,     0x3fe5328292a35596,     //   0.74914,   0.66242
+    0x3fe7e83f87b03686,     0x3fe5454ff5159dfb,     //    0.7471,   0.66471
+    0x3fe7d7836cc33db2,     0x3fe5581038975137,     //   0.74506,     0.667
+    0x3fe7c6b89ce2d333,     0x3fe56ac35197649e,     //   0.74301,   0.66928
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //   0.74095,   0.67156
+    0x3fe7a4f707bf97d2,     0x3fe59001d5f723df,     //   0.73889,   0.67383
+    0x3fe79400574f55e4,     0x3fe5a28d2a5d7250,     //   0.73682,   0.67609
+    0x3fe782fb1b90b35b,     0x3fe5b50b264f7448,     //   0.73474,   0.67835
+    0x3fe771e75f037261,     0x3fe5c77bbe65018c,     //   0.73265,    0.6806
+    0x3fe760c52c304764,     0x3fe5d9dee73e345c,     //   0.73056,   0.68285
+    0x3fe74f948da8d28d,     0x3fe5ec3495837074,     //   0.72846,   0.68508
+    0x3fe73e558e079942,     0x3fe5fe7cbde56a0f,     //   0.72636,   0.68732
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     //   0.72425,   0.68954
+    0x3fe71bac960e41bf,     0x3fe622e44fec22ff,     //   0.72213,   0.69176
+    0x3fe70a42b3176d7a,     0x3fe63503a31c1be8,     //      0.72,   0.69397
+    0x3fe6f8ca99c95b75,     0x3fe64715437f535b,     //   0.71787,   0.69618
+    0x3fe6e74454eaa8ae,     0x3fe6591925f0783e,     //   0.71573,   0.69838
+    0x3fe6d5afef4aafcc,     0x3fe66b0f3f52b386,     //   0.71358,   0.70057
+    0x3fe6c40d73c18275,     0x3fe67cf78491af10,     //   0.71143,   0.70275
+    0x3fe6b25ced2fe29c,     0x3fe68ed1eaa19c71,     //   0.70927,   0.70493
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //   0.70711,   0.70711
+    0x3fe68ed1eaa19c71,     0x3fe6b25ced2fe29c,     //   0.70493,   0.70927
+    0x3fe67cf78491af10,     0x3fe6c40d73c18275,     //   0.70275,   0.71143
+    0x3fe66b0f3f52b386,     0x3fe6d5afef4aafcc,     //   0.70057,   0.71358
+    0x3fe6591925f0783e,     0x3fe6e74454eaa8ae,     //   0.69838,   0.71573
+    0x3fe64715437f535b,     0x3fe6f8ca99c95b75,     //   0.69618,   0.71787
+    0x3fe63503a31c1be8,     0x3fe70a42b3176d7a,     //   0.69397,      0.72
+    0x3fe622e44fec22ff,     0x3fe71bac960e41bf,     //   0.69176,   0.72213
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     //   0.68954,   0.72425
+    0x3fe5fe7cbde56a0f,     0x3fe73e558e079942,     //   0.68732,   0.72636
+    0x3fe5ec3495837074,     0x3fe74f948da8d28d,     //   0.68508,   0.72846
+    0x3fe5d9dee73e345c,     0x3fe760c52c304764,     //   0.68285,   0.73056
+    0x3fe5c77bbe65018c,     0x3fe771e75f037261,     //    0.6806,   0.73265
+    0x3fe5b50b264f7448,     0x3fe782fb1b90b35b,     //   0.67835,   0.73474
+    0x3fe5a28d2a5d7250,     0x3fe79400574f55e4,     //   0.67609,   0.73682
+    0x3fe59001d5f723df,     0x3fe7a4f707bf97d2,     //   0.67383,   0.73889
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //   0.67156,   0.74095
+    0x3fe56ac35197649e,     0x3fe7c6b89ce2d333,     //   0.66928,   0.74301
+    0x3fe5581038975137,     0x3fe7d7836cc33db2,     //     0.667,   0.74506
+    0x3fe5454ff5159dfb,     0x3fe7e83f87b03686,     //   0.66471,    0.7471
+    0x3fe5328292a35596,     0x3fe7f8ece3571771,     //   0.66242,   0.74914
+    0x3fe51fa81cd99aa6,     0x3fe8098b756e52fa,     //   0.66011,   0.75117
+    0x3fe50cc09f59a09b,     0x3fe81a1b33b57acc,     //   0.65781,   0.75319
+    0x3fe4f9cc25cca486,     0x3fe82a9c13f545ff,     //   0.65549,    0.7552
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //   0.65317,   0.75721
+    0x3fe4d3bc6d589f80,     0x3fe84b7111af83f9,     //   0.65085,   0.75921
+    0x3fe4c0a145ec0004,     0x3fe85bc51ae958cc,     //   0.64851,    0.7612
+    0x3fe4ad79516722f0,     0x3fe86c0a1d9aa195,     //   0.64618,   0.76319
+    0x3fe49a449b9b0938,     0x3fe87c400fba2ebf,     //   0.64383,   0.76517
+    0x3fe48703306091fe,     0x3fe88c66e7481ba1,     //   0.64148,   0.76714
+    0x3fe473b51b987347,     0x3fe89c7e9a4dd4ab,     //   0.63912,    0.7691
+    0x3fe4605a692b32a2,     0x3fe8ac871ede1d88,     //   0.63676,   0.77106
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //   0.63439,   0.77301
+    0x3fe4397f5b2a4380,     0x3fe8cc6a75184655,     //   0.63202,   0.77495
+    0x3fe425ff178e6bb1,     0x3fe8dc45331698cc,     //   0.62964,   0.77689
+    0x3fe41272663d108c,     0x3fe8ec109b486c49,     //   0.62725,   0.77882
+    0x3fe3fed9534556d4,     0x3fe8fbcca3ef940d,     //   0.62486,   0.78074
+    0x3fe3eb33eabe0680,     0x3fe90b7943575efe,     //   0.62246,   0.78265
+    0x3fe3d78238c58343,     0x3fe91b166fd49da2,     //   0.62006,   0.78456
+    0x3fe3c3c44981c517,     0x3fe92aa41fc5a815,     //   0.61765,   0.78646
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     //   0.61523,   0.78835
+    0x3fe39c23e3d63029,     0x3fe94990e3ac4a6c,     //   0.61281,   0.79023
+    0x3fe3884185dfeb22,     0x3fe958efe48e6dd7,     //   0.61038,   0.79211
+    0x3fe374531b817f8d,     0x3fe9683f42bd7fe1,     //   0.60795,   0.79398
+    0x3fe36058b10659f3,     0x3fe9777ef4c7d742,     //   0.60551,   0.79584
+    0x3fe34c5252c14de1,     0x3fe986aef1457594,     //   0.60307,   0.79769
+    0x3fe338400d0c8e57,     0x3fe995cf2ed80d22,     //   0.60062,   0.79954
+    0x3fe32421ec49a620,     0x3fe9a4dfa42b06b2,     //   0.59816,   0.80138
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //    0.5957,   0.80321
+    0x3fe2fbc24b441015,     0x3fe9c2d110f075c3,     //   0.59323,   0.80503
+    0x3fe2e780e3e8ea16,     0x3fe9d1b1f5ea80d6,     //   0.59076,   0.80685
+    0x3fe2d333d34e9bb7,     0x3fe9e082edb42472,     //   0.58828,   0.80866
+    0x3fe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //    0.5858,   0.81046
+    0x3fe2aa76e87aeb58,     0x3fe9fdf4f13149de,     //   0.58331,   0.81225
+    0x3fe2960727629ca8,     0x3fea0c95eabaf937,     //   0.58081,   0.81404
+    0x3fe2818bef4d3cba,     0x3fea1b26d2c0a75e,     //   0.57831,   0.81581
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     //   0.57581,   0.81758
+    0x3fe258734cbb7110,     0x3fea38184a593bc6,     //    0.5733,   0.81935
+    0x3fe243d5fb98ac1f,     0x3fea4678c8119ac8,     //   0.57078,    0.8211
+    0x3fe22f2d662c13e1,     0x3fea54c91090f524,     //   0.56826,   0.82285
+    0x3fe21a799933eb58,     0x3fea63091b02fae2,     //   0.56573,   0.82459
+    0x3fe205baa17560d6,     0x3fea7138de9d60f5,     //    0.5632,   0.82632
+    0x3fe1f0f08bbc861b,     0x3fea7f58529fe69d,     //   0.56066,   0.82805
+    0x3fe1dc1b64dc4872,     0x3fea8d676e545ad2,     //   0.55812,   0.82976
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //   0.55557,   0.83147
+    0x3fe1b250171373be,     0x3feaa9547a2cb98e,     //   0.55302,   0.83317
+    0x3fe19d5a09f2b9b8,     0x3feab7325916c0d4,     //   0.55046,   0.83486
+    0x3fe188591f3a46e5,     0x3feac4ffbd3efac8,     //   0.54789,   0.83655
+    0x3fe1734d63dedb49,     0x3fead2bc9e21d511,     //   0.54532,   0.83822
+    0x3fe15e36e4dbe2bc,     0x3feae068f345ecef,     //   0.54275,   0.83989
+    0x3fe14915af336ceb,     0x3feaee04b43c1474,     //   0.54017,   0.84155
+    0x3fe133e9cfee254e,     0x3feafb8fd89f57b6,     //   0.53759,   0.84321
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //     0.535,   0.84485
+    0x3fe1097248d0a956,     0x3feb16742a4ca2f5,     //    0.5324,   0.84649
+    0x3fe0f426bb2a8e7d,     0x3feb23cd470013b4,     //    0.5298,   0.84812
+    0x3fe0ded0b84bc4b5,     0x3feb3115a5f37bf4,     //    0.5272,   0.84974
+    0x3fe0c9704d5d898f,     0x3feb3e4d3ef55712,     //   0.52459,   0.85136
+    0x3fe0b405878f85ec,     0x3feb4b7409de7925,     //   0.52198,   0.85296
+    0x3fe09e907417c5e1,     0x3feb5889fe921405,     //   0.51936,   0.85456
+    0x3fe089112032b08c,     0x3feb658f14fdbc47,     //   0.51673,   0.85615
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //    0.5141,   0.85773
+    0x3fe05df3ec31b8b6,     0x3feb7f6686e792ea,     //   0.51147,    0.8593
+    0x3fe0485626ae221a,     0x3feb8c38d27504e9,     //   0.50883,   0.86087
+    0x3fe032ae55edbd95,     0x3feb98fa1fd9155e,     //   0.50619,   0.86242
+    0x3fe01cfc874c3eb7,     0x3feba5aa673590d2,     //   0.50354,   0.86397
+    0x3fe00740c82b82e0,     0x3febb249a0b6c40d,     //   0.50089,   0.86551
+    0x3fdfe2f64be7120f,     0x3febbed7c49380ea,     //   0.49823,   0.86705
+    0x3fdfb7575c24d2de,     0x3febcb54cb0d2327,     //   0.49557,   0.86857
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //    0.4929,   0.87009
+    0x3fdf5fdee656cda3,     0x3febe41b611154c1,     //   0.49023,    0.8716
+    0x3fdf3405963fd068,     0x3febf064e15377dd,     //   0.48755,   0.87309
+    0x3fdf081906bff7fd,     0x3febfc9d25a1b147,     //   0.48487,   0.87459
+    0x3fdedc1952ef78d5,     0x3fec08c426725549,     //   0.48218,   0.87607
+    0x3fdeb00695f25620,     0x3fec14d9dc465e58,     //   0.47949,   0.87755
+    0x3fde83e0eaf85113,     0x3fec20de3fa971b0,     //    0.4768,   0.87901
+    0x3fde57a86d3cd824,     0x3fec2cd14931e3f1,     //    0.4741,   0.88047
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //    0.4714,   0.88192
+    0x3fddfeff66a941de,     0x3fec44833141c004,     //   0.46869,   0.88336
+    0x3fddd28f1481cc58,     0x3fec5042012b6907,     //   0.46598,    0.8848
+    0x3fdda60c5cfa10d8,     0x3fec5bef59fef85a,     //   0.46326,   0.88622
+    0x3fdd79775b86e389,     0x3fec678b3488739b,     //   0.46054,   0.88764
+    0x3fdd4cd02ba8609c,     0x3fec7315899eaad7,     //   0.45781,   0.88905
+    0x3fdd2016e8e9db5b,     0x3fec7e8e52233cf3,     //   0.45508,   0.89045
+    0x3fdcf34baee1cd21,     0x3fec89f587029c13,     //   0.45235,   0.89184
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     //   0.44961,   0.89322
+    0x3fdc997fc3865388,     0x3feca08f19b9c449,     //   0.44687,    0.8946
+    0x3fdc6c7f4997000a,     0x3fecabc169a0b901,     //   0.44412,   0.89597
+    0x3fdc3f6d47263129,     0x3fecb6e20a00da99,     //   0.44137,   0.89732
+    0x3fdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //   0.43862,   0.89867
+    0x3fdbe51517ffc0d9,     0x3fecccee20c2de9f,     //   0.43586,   0.90002
+    0x3fdbb7cf2304bd01,     0x3fecd7d9898b32f6,     //   0.43309,   0.90135
+    0x3fdb8a7814fd5693,     0x3fece2b32799a060,     //   0.43033,   0.90267
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //   0.42756,   0.90399
+    0x3fdb2f971db31972,     0x3fecf830e8ce467b,     //   0.42478,    0.9053
+    0x3fdb020d6c7f4009,     0x3fed02d4feb2bd92,     //     0.422,    0.9066
+    0x3fdad473125cdc08,     0x3fed0d672f59d2b9,     //   0.41922,   0.90789
+    0x3fdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //   0.41643,   0.90917
+    0x3fda790cd3dbf31a,     0x3fed2255c6e5a4e1,     //   0.41364,   0.91044
+    0x3fda4b4127dea1e4,     0x3fed2cb220e0ef9f,     //   0.41084,   0.91171
+    0x3fda1d6543b50ac0,     0x3fed36fc7bcbfbdc,     //   0.40804,   0.91296
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //   0.40524,   0.91421
+    0x3fd9c17d440df9f2,     0x3fed4b5b1b187524,     //   0.40243,   0.91545
+    0x3fd993716141bdfe,     0x3fed556f52e93eb1,     //   0.39962,   0.91668
+    0x3fd96555b7ab948f,     0x3fed5f7172888a7f,     //   0.39681,    0.9179
+    0x3fd9372a63bc93d7,     0x3fed696173c9e68b,     //   0.39399,   0.91911
+    0x3fd908ef81ef7bd1,     0x3fed733f508c0dff,     //   0.39117,   0.92032
+    0x3fd8daa52ec8a4af,     0x3fed7d0b02b8ecf9,     //   0.38835,   0.92151
+    0x3fd8ac4b86d5ed44,     0x3fed86c48445a450,     //   0.38552,    0.9227
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //   0.38268,   0.92388
+    0x3fd84f6aaaf3903f,     0x3fed9a00dd8b3d46,     //   0.37985,   0.92505
+    0x3fd820e3b04eaac4,     0x3feda383a9668988,     //   0.37701,   0.92621
+    0x3fd7f24dd37341e3,     0x3fedacf42ce68ab9,     //   0.37416,   0.92736
+    0x3fd7c3a9311dcce7,     0x3fedb6526238a09b,     //   0.37132,   0.92851
+    0x3fd794f5e613dfae,     0x3fedbf9e4395759a,     //   0.36847,   0.92964
+    0x3fd766340f2418f6,     0x3fedc8d7cb410260,     //   0.36561,   0.93077
+    0x3fd73763c9261092,     0x3fedd1fef38a915a,     //   0.36276,   0.93188
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //    0.3599,   0.93299
+    0x3fd6d998638a0cb5,     0x3fede4160f6d8d81,     //   0.35703,   0.93409
+    0x3fd6aa9d7dc77e16,     0x3feded05f7de47da,     //   0.35416,   0.93518
+    0x3fd67b949cad63ca,     0x3fedf5e36a9ba59c,     //   0.35129,   0.93627
+    0x3fd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //   0.34842,   0.93734
+    0x3fd61d595c88c203,     0x3fee0766d9280f54,     //   0.34554,    0.9384
+    0x3fd5ee27379ea693,     0x3fee100cca2980ac,     //   0.34266,   0.93946
+    0x3fd5bee78b9db3b6,     0x3fee18a02fdc66d9,     //   0.33978,   0.94051
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //   0.33689,   0.94154
+    0x3fd5604012f467b4,     0x3fee298f4439197a,     //     0.334,   0.94257
+    0x3fd530d880af3c24,     0x3fee31eae870ce25,     //   0.33111,   0.94359
+    0x3fd50163dc197047,     0x3fee3a33ec75ce85,     //   0.32821,    0.9446
+    0x3fd4d1e24278e76a,     0x3fee426a4b2bc17e,     //   0.32531,   0.94561
+    0x3fd4a253d11b82f3,     0x3fee4a8dff81ce5e,     //   0.32241,    0.9466
+    0x3fd472b8a5571054,     0x3fee529f04729ffc,     //    0.3195,   0.94759
+    0x3fd44310dc8936f0,     0x3fee5a9d550467d3,     //   0.31659,   0.94856
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     //   0.31368,   0.94953
+    0x3fd3e39be96ec271,     0x3fee6a61c55d53a7,     //   0.31077,   0.95049
+    0x3fd3b3cefa0414b7,     0x3fee7227db6a9744,     //   0.30785,   0.95144
+    0x3fd383f5e353b6aa,     0x3fee79db29a5165a,     //   0.30493,   0.95238
+    0x3fd35410c2e18152,     0x3fee817bab4cd10d,     //   0.30201,   0.95331
+    0x3fd3241fb638baaf,     0x3fee89095bad6025,     //   0.29908,   0.95423
+    0x3fd2f422daec0386,     0x3fee9084361df7f3,     //   0.29615,   0.95514
+    0x3fd2c41a4e954520,     0x3fee97ec36016b30,     //   0.29322,   0.95605
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //   0.29028,   0.95694
+    0x3fd263e6995554ba,     0x3feea68393e65800,     //   0.28735,   0.95783
+    0x3fd233bbabc3bb72,     0x3feeadb2e8e7a88e,     //   0.28441,    0.9587
+    0x3fd2038583d727bd,     0x3feeb4cf515b8811,     //   0.28146,   0.95957
+    0x3fd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //   0.27852,   0.96043
+    0x3fd1a2f7fbe8f243,     0x3feec2cf4b1af6b2,     //   0.27557,   0.96128
+    0x3fd172a0d7765177,     0x3feec9b2d3c3bf84,     //   0.27262,   0.96212
+    0x3fd1423eefc69378,     0x3feed0835e999009,     //   0.26967,   0.96295
+    0x3fd111d262b1f677,     0x3feed740e7684963,     //   0.26671,   0.96378
+    0x3fd0e15b4e1749cd,     0x3feeddeb6a078651,     //   0.26375,   0.96459
+    0x3fd0b0d9cfdbdb90,     0x3feee482e25a9dbc,     //   0.26079,   0.96539
+    0x3fd0804e05eb661e,     0x3feeeb074c50a544,     //   0.25783,   0.96619
+    0x3fd04fb80e37fdae,     0x3feef178a3e473c2,     //   0.25487,   0.96698
+    0x3fd01f1806b9fdd2,     0x3feef7d6e51ca3c0,     //    0.2519,   0.96775
+    0x3fcfdcdc1adfedf8,     0x3feefe220c0b95ec,     //   0.24893,   0.96852
+    0x3fcf7b7480bd3801,     0x3fef045a14cf738c,     //   0.24596,   0.96928
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //   0.24298,   0.97003
+    0x3fceb86b462de348,     0x3fef1090bc898f5f,     //      0.24,   0.97077
+    0x3fce56ca1e101a1b,     0x3fef168f53f7205d,     //   0.23702,    0.9715
+    0x3fcdf5163f01099a,     0x3fef1c7abe284708,     //   0.23404,   0.97223
+    0x3fcd934fe5454311,     0x3fef2252f7763ada,     //   0.23106,   0.97294
+    0x3fcd31774d2cbdee,     0x3fef2817fc4609ce,     //   0.22807,   0.97364
+    0x3fcccf8cb312b286,     0x3fef2dc9c9089a9d,     //   0.22508,   0.97434
+    0x3fcc6d90535d74dc,     0x3fef33685a3aaef0,     //   0.22209,   0.97503
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //    0.2191,    0.9757
+    0x3fcba96334f15dad,     0x3fef3e6bbc1bbc65,     //   0.21611,   0.97637
+    0x3fcb4732ef3d6722,     0x3fef43d085ff92dd,     //   0.21311,   0.97703
+    0x3fcae4f1d5f3b9ab,     0x3fef492206bcabb4,     //   0.21011,   0.97768
+    0x3fca82a025b00451,     0x3fef4e603b0b2f2d,     //   0.20711,   0.97832
+    0x3fca203e1b1831da,     0x3fef538b1faf2d07,     //   0.20411,   0.97895
+    0x3fc9bdcbf2dc4366,     0x3fef58a2b1789e84,     //    0.2011,   0.97957
+    0x3fc95b49e9b62af9,     0x3fef5da6ed43685d,     //    0.1981,   0.98018
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //   0.19509,   0.98079
+    0x3fc8961727c41804,     0x3fef677556883cee,     //   0.19208,   0.98138
+    0x3fc83366e89c64c5,     0x3fef6c3f7df5bbb7,     //   0.18907,   0.98196
+    0x3fc7d0a7bbd2cb1b,     0x3fef70f6434b7eb7,     //   0.18606,   0.98254
+    0x3fc76dd9de50bf31,     0x3fef7599a3a12077,     //   0.18304,   0.98311
+    0x3fc70afd8d08c4ff,     0x3fef7a299c1a322a,     //   0.18002,   0.98366
+    0x3fc6a81304f64ab2,     0x3fef7ea629e63d6e,     //     0.177,   0.98421
+    0x3fc6451a831d830d,     0x3fef830f4a40c60c,     //   0.17398,   0.98475
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     //   0.17096,   0.98528
+    0x3fc57f008654cbde,     0x3fef8ba737cb4b78,     //   0.16794,    0.9858
+    0x3fc51bdf8597c5f2,     0x3fef8fd5ffae41db,     //   0.16491,   0.98631
+    0x3fc4b8b17f79fa88,     0x3fef93f14f85ac08,     //   0.16189,   0.98681
+    0x3fc45576b1293e5a,     0x3fef97f924c9099b,     //   0.15886,    0.9873
+    0x3fc3f22f57db4893,     0x3fef9bed7cfbde29,     //   0.15583,   0.98778
+    0x3fc38edbb0cd8d14,     0x3fef9fce55adb2c8,     //    0.1528,   0.98826
+    0x3fc32b7bf94516a7,     0x3fefa39bac7a1791,     //   0.14976,   0.98872
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //   0.14673,   0.98918
+    0x3fc264994dfd340a,     0x3fefaafbcb0cfddc,     //    0.1437,   0.98962
+    0x3fc20116d4ec7bce,     0x3fefae8e8e46cfbb,     //   0.14066,   0.99006
+    0x3fc19d8940be24e7,     0x3fefb20dc681d54d,     //   0.13762,   0.99049
+    0x3fc139f0cedaf576,     0x3fefb5797195d741,     //   0.13458,    0.9909
+    0x3fc0d64dbcb26786,     0x3fefb8d18d66adb7,     //   0.13154,   0.99131
+    0x3fc072a047ba831d,     0x3fefbc1617e44186,     //    0.1285,   0.99171
+    0x3fc00ee8ad6fb85b,     0x3fefbf470f0a8d88,     //   0.12545,    0.9921
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     //   0.12241,   0.99248
+    0x3fbe8eb7fde4aa3e,     0x3fefc56e3b7d9af6,     //   0.11937,   0.99285
+    0x3fbdc70ecbae9fc8,     0x3fefc8646cfeb721,     //   0.11632,   0.99321
+    0x3fbcff533b307dc1,     0x3fefcb4703914354,     //   0.11327,   0.99356
+    0x3fbc3785c79ec2d5,     0x3fefce15fd6da67b,     //   0.11022,   0.99391
+    0x3fbb6fa6ec38f64c,     0x3fefd0d158d86087,     //   0.10717,   0.99424
+    0x3fbaa7b724495c04,     0x3fefd37914220b84,     //   0.10412,   0.99456
+    0x3fb9dfb6eb24a85c,     0x3fefd60d2da75c9e,     //   0.10107,   0.99488
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     //  0.098017,   0.99518
+    0x3fb84f8712c130a0,     0x3fefdafa7514538c,     //  0.094963,   0.99548
+    0x3fb787586a5d5b21,     0x3fefdd539ff1f456,     //  0.091909,   0.99577
+    0x3fb6bf1b3e79b129,     0x3fefdf9922f73307,     //  0.088854,   0.99604
+    0x3fb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     //  0.085797,   0.99631
+    0x3fb52e774a4d4d0a,     0x3fefe3e92be9d886,     //   0.08274,   0.99657
+    0x3fb4661179272096,     0x3fefe5f3af2e3940,     //  0.079682,   0.99682
+    0x3fb39d9f12c5a299,     0x3fefe7ea85482d60,     //  0.076624,   0.99706
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     //  0.073565,   0.99729
+    0x3fb20c9674ed444c,     0x3fefeb9d2530410f,     //  0.070505,   0.99751
+    0x3fb1440134d709b2,     0x3fefed58ecb673c4,     //  0.067444,   0.99772
+    0x3fb07b614e463064,     0x3fefef0102826191,     //  0.064383,   0.99793
+    0x3faf656e79f820e0,     0x3feff095658e71ad,     //  0.061321,   0.99812
+    0x3fadd406f9808ec8,     0x3feff21614e131ed,     //  0.058258,    0.9983
+    0x3fac428d12c0d7e3,     0x3feff3830f8d575c,     //  0.055195,   0.99848
+    0x3faab101bd5f8317,     0x3feff4dc54b1bed3,     //  0.052132,   0.99864
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     //  0.049068,    0.9988
+    0x3fa78dbaa5874685,     0x3feff753bb1b9164,     //  0.046003,   0.99894
+    0x3fa5fc00d290cd43,     0x3feff871dadb81df,     //  0.042938,   0.99908
+    0x3fa46a396ff86179,     0x3feff97c4208c014,     //  0.039873,    0.9992
+    0x3fa2d865759455cd,     0x3feffa72effef75d,     //  0.036807,   0.99932
+    0x3fa14685db42c17e,     0x3feffb55e425fdae,     //  0.033741,   0.99943
+    0x3f9f693731d1cf01,     0x3feffc251df1d3f8,     //  0.030675,   0.99953
+    0x3f9c454f4ce53b1c,     0x3feffce09ce2a679,     //  0.027608,   0.99962
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     //  0.024541,    0.9997
+    0x3f95fd4d21fab226,     0x3feffe1c6870cb77,     //  0.021474,   0.99977
+    0x3f92d936bbe30efd,     0x3feffe9cb44b51a1,     //  0.018407,   0.99983
+    0x3f8f6a296ab997ca,     0x3fefff0943c53bd1,     //  0.015339,   0.99988
+    0x3f8921d1fcdec784,     0x3fefff62169b92db,     //  0.012272,   0.99992
+    0x3f82d96b0e509703,     0x3fefffa72c978c4f,     // 0.0092038,   0.99996
+    0x3f7921f0fe670071,     0x3fefffd8858e8a92,     // 0.0061359,   0.99998
+    0x3f6921f8becca4ba,     0x3feffff621621d02,     //  0.003068,         1
+    0x0000000000000000,     0x3ff0000000000000,     //         0,         1
+    0xbf6921f8becca4ba,     0x3feffff621621d02,     // -0.003068,         1
+    0xbf7921f0fe670071,     0x3fefffd8858e8a92,     //-0.0061359,   0.99998
+    0xbf82d96b0e509703,     0x3fefffa72c978c4f,     //-0.0092038,   0.99996
+    0xbf8921d1fcdec784,     0x3fefff62169b92db,     // -0.012272,   0.99992
+    0xbf8f6a296ab997ca,     0x3fefff0943c53bd1,     // -0.015339,   0.99988
+    0xbf92d936bbe30efd,     0x3feffe9cb44b51a1,     // -0.018407,   0.99983
+    0xbf95fd4d21fab226,     0x3feffe1c6870cb77,     // -0.021474,   0.99977
+    0xbf992155f7a3667e,     0x3feffd886084cd0d,     // -0.024541,    0.9997
+    0xbf9c454f4ce53b1c,     0x3feffce09ce2a679,     // -0.027608,   0.99962
+    0xbf9f693731d1cf01,     0x3feffc251df1d3f8,     // -0.030675,   0.99953
+    0xbfa14685db42c17e,     0x3feffb55e425fdae,     // -0.033741,   0.99943
+    0xbfa2d865759455cd,     0x3feffa72effef75d,     // -0.036807,   0.99932
+    0xbfa46a396ff86179,     0x3feff97c4208c014,     // -0.039873,    0.9992
+    0xbfa5fc00d290cd43,     0x3feff871dadb81df,     // -0.042938,   0.99908
+    0xbfa78dbaa5874685,     0x3feff753bb1b9164,     // -0.046003,   0.99894
+    0xbfa91f65f10dd814,     0x3feff621e3796d7e,     // -0.049068,    0.9988
+    0xbfaab101bd5f8317,     0x3feff4dc54b1bed3,     // -0.052132,   0.99864
+    0xbfac428d12c0d7e3,     0x3feff3830f8d575c,     // -0.055195,   0.99848
+    0xbfadd406f9808ec8,     0x3feff21614e131ed,     // -0.058258,    0.9983
+    0xbfaf656e79f820e0,     0x3feff095658e71ad,     // -0.061321,   0.99812
+    0xbfb07b614e463064,     0x3fefef0102826191,     // -0.064383,   0.99793
+    0xbfb1440134d709b2,     0x3fefed58ecb673c4,     // -0.067444,   0.99772
+    0xbfb20c9674ed444c,     0x3fefeb9d2530410f,     // -0.070505,   0.99751
+    0xbfb2d52092ce19f6,     0x3fefe9cdad01883a,     // -0.073565,   0.99729
+    0xbfb39d9f12c5a299,     0x3fefe7ea85482d60,     // -0.076624,   0.99706
+    0xbfb4661179272096,     0x3fefe5f3af2e3940,     // -0.079682,   0.99682
+    0xbfb52e774a4d4d0a,     0x3fefe3e92be9d886,     //  -0.08274,   0.99657
+    0xbfb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     // -0.085797,   0.99631
+    0xbfb6bf1b3e79b129,     0x3fefdf9922f73307,     // -0.088854,   0.99604
+    0xbfb787586a5d5b21,     0x3fefdd539ff1f456,     // -0.091909,   0.99577
+    0xbfb84f8712c130a0,     0x3fefdafa7514538c,     // -0.094963,   0.99548
+    0xbfb917a6bc29b42c,     0x3fefd88da3d12526,     // -0.098017,   0.99518
+    0xbfb9dfb6eb24a85c,     0x3fefd60d2da75c9e,     //  -0.10107,   0.99488
+    0xbfbaa7b724495c04,     0x3fefd37914220b84,     //  -0.10412,   0.99456
+    0xbfbb6fa6ec38f64c,     0x3fefd0d158d86087,     //  -0.10717,   0.99424
+    0xbfbc3785c79ec2d5,     0x3fefce15fd6da67b,     //  -0.11022,   0.99391
+    0xbfbcff533b307dc1,     0x3fefcb4703914354,     //  -0.11327,   0.99356
+    0xbfbdc70ecbae9fc8,     0x3fefc8646cfeb721,     //  -0.11632,   0.99321
+    0xbfbe8eb7fde4aa3e,     0x3fefc56e3b7d9af6,     //  -0.11937,   0.99285
+    0xbfbf564e56a9730e,     0x3fefc26470e19fd3,     //  -0.12241,   0.99248
+    0xbfc00ee8ad6fb85b,     0x3fefbf470f0a8d88,     //  -0.12545,    0.9921
+    0xbfc072a047ba831d,     0x3fefbc1617e44186,     //   -0.1285,   0.99171
+    0xbfc0d64dbcb26786,     0x3fefb8d18d66adb7,     //  -0.13154,   0.99131
+    0xbfc139f0cedaf576,     0x3fefb5797195d741,     //  -0.13458,    0.9909
+    0xbfc19d8940be24e7,     0x3fefb20dc681d54d,     //  -0.13762,   0.99049
+    0xbfc20116d4ec7bce,     0x3fefae8e8e46cfbb,     //  -0.14066,   0.99006
+    0xbfc264994dfd340a,     0x3fefaafbcb0cfddc,     //   -0.1437,   0.98962
+    0xbfc2c8106e8e613a,     0x3fefa7557f08a517,     //  -0.14673,   0.98918
+    0xbfc32b7bf94516a7,     0x3fefa39bac7a1791,     //  -0.14976,   0.98872
+    0xbfc38edbb0cd8d14,     0x3fef9fce55adb2c8,     //   -0.1528,   0.98826
+    0xbfc3f22f57db4893,     0x3fef9bed7cfbde29,     //  -0.15583,   0.98778
+    0xbfc45576b1293e5a,     0x3fef97f924c9099b,     //  -0.15886,    0.9873
+    0xbfc4b8b17f79fa88,     0x3fef93f14f85ac08,     //  -0.16189,   0.98681
+    0xbfc51bdf8597c5f2,     0x3fef8fd5ffae41db,     //  -0.16491,   0.98631
+    0xbfc57f008654cbde,     0x3fef8ba737cb4b78,     //  -0.16794,    0.9858
+    0xbfc5e214448b3fc6,     0x3fef8764fa714ba9,     //  -0.17096,   0.98528
+    0xbfc6451a831d830d,     0x3fef830f4a40c60c,     //  -0.17398,   0.98475
+    0xbfc6a81304f64ab2,     0x3fef7ea629e63d6e,     //    -0.177,   0.98421
+    0xbfc70afd8d08c4ff,     0x3fef7a299c1a322a,     //  -0.18002,   0.98366
+    0xbfc76dd9de50bf31,     0x3fef7599a3a12077,     //  -0.18304,   0.98311
+    0xbfc7d0a7bbd2cb1b,     0x3fef70f6434b7eb7,     //  -0.18606,   0.98254
+    0xbfc83366e89c64c5,     0x3fef6c3f7df5bbb7,     //  -0.18907,   0.98196
+    0xbfc8961727c41804,     0x3fef677556883cee,     //  -0.19208,   0.98138
+    0xbfc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  -0.19509,   0.98079
+    0xbfc95b49e9b62af9,     0x3fef5da6ed43685d,     //   -0.1981,   0.98018
+    0xbfc9bdcbf2dc4366,     0x3fef58a2b1789e84,     //   -0.2011,   0.97957
+    0xbfca203e1b1831da,     0x3fef538b1faf2d07,     //  -0.20411,   0.97895
+    0xbfca82a025b00451,     0x3fef4e603b0b2f2d,     //  -0.20711,   0.97832
+    0xbfcae4f1d5f3b9ab,     0x3fef492206bcabb4,     //  -0.21011,   0.97768
+    0xbfcb4732ef3d6722,     0x3fef43d085ff92dd,     //  -0.21311,   0.97703
+    0xbfcba96334f15dad,     0x3fef3e6bbc1bbc65,     //  -0.21611,   0.97637
+    0xbfcc0b826a7e4f63,     0x3fef38f3ac64e589,     //   -0.2191,    0.9757
+    0xbfcc6d90535d74dc,     0x3fef33685a3aaef0,     //  -0.22209,   0.97503
+    0xbfcccf8cb312b286,     0x3fef2dc9c9089a9d,     //  -0.22508,   0.97434
+    0xbfcd31774d2cbdee,     0x3fef2817fc4609ce,     //  -0.22807,   0.97364
+    0xbfcd934fe5454311,     0x3fef2252f7763ada,     //  -0.23106,   0.97294
+    0xbfcdf5163f01099a,     0x3fef1c7abe284708,     //  -0.23404,   0.97223
+    0xbfce56ca1e101a1b,     0x3fef168f53f7205d,     //  -0.23702,    0.9715
+    0xbfceb86b462de348,     0x3fef1090bc898f5f,     //     -0.24,   0.97077
+    0xbfcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  -0.24298,   0.97003
+    0xbfcf7b7480bd3801,     0x3fef045a14cf738c,     //  -0.24596,   0.96928
+    0xbfcfdcdc1adfedf8,     0x3feefe220c0b95ec,     //  -0.24893,   0.96852
+    0xbfd01f1806b9fdd2,     0x3feef7d6e51ca3c0,     //   -0.2519,   0.96775
+    0xbfd04fb80e37fdae,     0x3feef178a3e473c2,     //  -0.25487,   0.96698
+    0xbfd0804e05eb661e,     0x3feeeb074c50a544,     //  -0.25783,   0.96619
+    0xbfd0b0d9cfdbdb90,     0x3feee482e25a9dbc,     //  -0.26079,   0.96539
+    0xbfd0e15b4e1749cd,     0x3feeddeb6a078651,     //  -0.26375,   0.96459
+    0xbfd111d262b1f677,     0x3feed740e7684963,     //  -0.26671,   0.96378
+    0xbfd1423eefc69378,     0x3feed0835e999009,     //  -0.26967,   0.96295
+    0xbfd172a0d7765177,     0x3feec9b2d3c3bf84,     //  -0.27262,   0.96212
+    0xbfd1a2f7fbe8f243,     0x3feec2cf4b1af6b2,     //  -0.27557,   0.96128
+    0xbfd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //  -0.27852,   0.96043
+    0xbfd2038583d727bd,     0x3feeb4cf515b8811,     //  -0.28146,   0.95957
+    0xbfd233bbabc3bb72,     0x3feeadb2e8e7a88e,     //  -0.28441,    0.9587
+    0xbfd263e6995554ba,     0x3feea68393e65800,     //  -0.28735,   0.95783
+    0xbfd294062ed59f05,     0x3fee9f4156c62dda,     //  -0.29028,   0.95694
+    0xbfd2c41a4e954520,     0x3fee97ec36016b30,     //  -0.29322,   0.95605
+    0xbfd2f422daec0386,     0x3fee9084361df7f3,     //  -0.29615,   0.95514
+    0xbfd3241fb638baaf,     0x3fee89095bad6025,     //  -0.29908,   0.95423
+    0xbfd35410c2e18152,     0x3fee817bab4cd10d,     //  -0.30201,   0.95331
+    0xbfd383f5e353b6aa,     0x3fee79db29a5165a,     //  -0.30493,   0.95238
+    0xbfd3b3cefa0414b7,     0x3fee7227db6a9744,     //  -0.30785,   0.95144
+    0xbfd3e39be96ec271,     0x3fee6a61c55d53a7,     //  -0.31077,   0.95049
+    0xbfd4135c94176602,     0x3fee6288ec48e112,     //  -0.31368,   0.94953
+    0xbfd44310dc8936f0,     0x3fee5a9d550467d3,     //  -0.31659,   0.94856
+    0xbfd472b8a5571054,     0x3fee529f04729ffc,     //   -0.3195,   0.94759
+    0xbfd4a253d11b82f3,     0x3fee4a8dff81ce5e,     //  -0.32241,    0.9466
+    0xbfd4d1e24278e76a,     0x3fee426a4b2bc17e,     //  -0.32531,   0.94561
+    0xbfd50163dc197047,     0x3fee3a33ec75ce85,     //  -0.32821,    0.9446
+    0xbfd530d880af3c24,     0x3fee31eae870ce25,     //  -0.33111,   0.94359
+    0xbfd5604012f467b4,     0x3fee298f4439197a,     //    -0.334,   0.94257
+    0xbfd58f9a75ab1fdd,     0x3fee212104f686e5,     //  -0.33689,   0.94154
+    0xbfd5bee78b9db3b6,     0x3fee18a02fdc66d9,     //  -0.33978,   0.94051
+    0xbfd5ee27379ea693,     0x3fee100cca2980ac,     //  -0.34266,   0.93946
+    0xbfd61d595c88c203,     0x3fee0766d9280f54,     //  -0.34554,    0.9384
+    0xbfd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //  -0.34842,   0.93734
+    0xbfd67b949cad63ca,     0x3fedf5e36a9ba59c,     //  -0.35129,   0.93627
+    0xbfd6aa9d7dc77e16,     0x3feded05f7de47da,     //  -0.35416,   0.93518
+    0xbfd6d998638a0cb5,     0x3fede4160f6d8d81,     //  -0.35703,   0.93409
+    0xbfd7088530fa459e,     0x3feddb13b6ccc23d,     //   -0.3599,   0.93299
+    0xbfd73763c9261092,     0x3fedd1fef38a915a,     //  -0.36276,   0.93188
+    0xbfd766340f2418f6,     0x3fedc8d7cb410260,     //  -0.36561,   0.93077
+    0xbfd794f5e613dfae,     0x3fedbf9e4395759a,     //  -0.36847,   0.92964
+    0xbfd7c3a9311dcce7,     0x3fedb6526238a09b,     //  -0.37132,   0.92851
+    0xbfd7f24dd37341e3,     0x3fedacf42ce68ab9,     //  -0.37416,   0.92736
+    0xbfd820e3b04eaac4,     0x3feda383a9668988,     //  -0.37701,   0.92621
+    0xbfd84f6aaaf3903f,     0x3fed9a00dd8b3d46,     //  -0.37985,   0.92505
+    0xbfd87de2a6aea963,     0x3fed906bcf328d46,     //  -0.38268,   0.92388
+    0xbfd8ac4b86d5ed44,     0x3fed86c48445a450,     //  -0.38552,    0.9227
+    0xbfd8daa52ec8a4af,     0x3fed7d0b02b8ecf9,     //  -0.38835,   0.92151
+    0xbfd908ef81ef7bd1,     0x3fed733f508c0dff,     //  -0.39117,   0.92032
+    0xbfd9372a63bc93d7,     0x3fed696173c9e68b,     //  -0.39399,   0.91911
+    0xbfd96555b7ab948f,     0x3fed5f7172888a7f,     //  -0.39681,    0.9179
+    0xbfd993716141bdfe,     0x3fed556f52e93eb1,     //  -0.39962,   0.91668
+    0xbfd9c17d440df9f2,     0x3fed4b5b1b187524,     //  -0.40243,   0.91545
+    0xbfd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //  -0.40524,   0.91421
+    0xbfda1d6543b50ac0,     0x3fed36fc7bcbfbdc,     //  -0.40804,   0.91296
+    0xbfda4b4127dea1e4,     0x3fed2cb220e0ef9f,     //  -0.41084,   0.91171
+    0xbfda790cd3dbf31a,     0x3fed2255c6e5a4e1,     //  -0.41364,   0.91044
+    0xbfdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //  -0.41643,   0.90917
+    0xbfdad473125cdc08,     0x3fed0d672f59d2b9,     //  -0.41922,   0.90789
+    0xbfdb020d6c7f4009,     0x3fed02d4feb2bd92,     //    -0.422,    0.9066
+    0xbfdb2f971db31972,     0x3fecf830e8ce467b,     //  -0.42478,    0.9053
+    0xbfdb5d1009e15cc0,     0x3feced7af43cc773,     //  -0.42756,   0.90399
+    0xbfdb8a7814fd5693,     0x3fece2b32799a060,     //  -0.43033,   0.90267
+    0xbfdbb7cf2304bd01,     0x3fecd7d9898b32f6,     //  -0.43309,   0.90135
+    0xbfdbe51517ffc0d9,     0x3fecccee20c2de9f,     //  -0.43586,   0.90002
+    0xbfdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //  -0.43862,   0.89867
+    0xbfdc3f6d47263129,     0x3fecb6e20a00da99,     //  -0.44137,   0.89732
+    0xbfdc6c7f4997000a,     0x3fecabc169a0b901,     //  -0.44412,   0.89597
+    0xbfdc997fc3865388,     0x3feca08f19b9c449,     //  -0.44687,    0.8946
+    0xbfdcc66e9931c45d,     0x3fec954b213411f5,     //  -0.44961,   0.89322
+    0xbfdcf34baee1cd21,     0x3fec89f587029c13,     //  -0.45235,   0.89184
+    0xbfdd2016e8e9db5b,     0x3fec7e8e52233cf3,     //  -0.45508,   0.89045
+    0xbfdd4cd02ba8609c,     0x3fec7315899eaad7,     //  -0.45781,   0.88905
+    0xbfdd79775b86e389,     0x3fec678b3488739b,     //  -0.46054,   0.88764
+    0xbfdda60c5cfa10d8,     0x3fec5bef59fef85a,     //  -0.46326,   0.88622
+    0xbfddd28f1481cc58,     0x3fec5042012b6907,     //  -0.46598,    0.8848
+    0xbfddfeff66a941de,     0x3fec44833141c004,     //  -0.46869,   0.88336
+    0xbfde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   -0.4714,   0.88192
+    0xbfde57a86d3cd824,     0x3fec2cd14931e3f1,     //   -0.4741,   0.88047
+    0xbfde83e0eaf85113,     0x3fec20de3fa971b0,     //   -0.4768,   0.87901
+    0xbfdeb00695f25620,     0x3fec14d9dc465e58,     //  -0.47949,   0.87755
+    0xbfdedc1952ef78d5,     0x3fec08c426725549,     //  -0.48218,   0.87607
+    0xbfdf081906bff7fd,     0x3febfc9d25a1b147,     //  -0.48487,   0.87459
+    0xbfdf3405963fd068,     0x3febf064e15377dd,     //  -0.48755,   0.87309
+    0xbfdf5fdee656cda3,     0x3febe41b611154c1,     //  -0.49023,    0.8716
+    0xbfdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //   -0.4929,   0.87009
+    0xbfdfb7575c24d2de,     0x3febcb54cb0d2327,     //  -0.49557,   0.86857
+    0xbfdfe2f64be7120f,     0x3febbed7c49380ea,     //  -0.49823,   0.86705
+    0xbfe00740c82b82e0,     0x3febb249a0b6c40d,     //  -0.50089,   0.86551
+    0xbfe01cfc874c3eb7,     0x3feba5aa673590d2,     //  -0.50354,   0.86397
+    0xbfe032ae55edbd95,     0x3feb98fa1fd9155e,     //  -0.50619,   0.86242
+    0xbfe0485626ae221a,     0x3feb8c38d27504e9,     //  -0.50883,   0.86087
+    0xbfe05df3ec31b8b6,     0x3feb7f6686e792ea,     //  -0.51147,    0.8593
+    0xbfe073879922ffed,     0x3feb728345196e3e,     //   -0.5141,   0.85773
+    0xbfe089112032b08c,     0x3feb658f14fdbc47,     //  -0.51673,   0.85615
+    0xbfe09e907417c5e1,     0x3feb5889fe921405,     //  -0.51936,   0.85456
+    0xbfe0b405878f85ec,     0x3feb4b7409de7925,     //  -0.52198,   0.85296
+    0xbfe0c9704d5d898f,     0x3feb3e4d3ef55712,     //  -0.52459,   0.85136
+    0xbfe0ded0b84bc4b5,     0x3feb3115a5f37bf4,     //   -0.5272,   0.84974
+    0xbfe0f426bb2a8e7d,     0x3feb23cd470013b4,     //   -0.5298,   0.84812
+    0xbfe1097248d0a956,     0x3feb16742a4ca2f5,     //   -0.5324,   0.84649
+    0xbfe11eb3541b4b22,     0x3feb090a58150200,     //    -0.535,   0.84485
+    0xbfe133e9cfee254e,     0x3feafb8fd89f57b6,     //  -0.53759,   0.84321
+    0xbfe14915af336ceb,     0x3feaee04b43c1474,     //  -0.54017,   0.84155
+    0xbfe15e36e4dbe2bc,     0x3feae068f345ecef,     //  -0.54275,   0.83989
+    0xbfe1734d63dedb49,     0x3fead2bc9e21d511,     //  -0.54532,   0.83822
+    0xbfe188591f3a46e5,     0x3feac4ffbd3efac8,     //  -0.54789,   0.83655
+    0xbfe19d5a09f2b9b8,     0x3feab7325916c0d4,     //  -0.55046,   0.83486
+    0xbfe1b250171373be,     0x3feaa9547a2cb98e,     //  -0.55302,   0.83317
+    0xbfe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  -0.55557,   0.83147
+    0xbfe1dc1b64dc4872,     0x3fea8d676e545ad2,     //  -0.55812,   0.82976
+    0xbfe1f0f08bbc861b,     0x3fea7f58529fe69d,     //  -0.56066,   0.82805
+    0xbfe205baa17560d6,     0x3fea7138de9d60f5,     //   -0.5632,   0.82632
+    0xbfe21a799933eb58,     0x3fea63091b02fae2,     //  -0.56573,   0.82459
+    0xbfe22f2d662c13e1,     0x3fea54c91090f524,     //  -0.56826,   0.82285
+    0xbfe243d5fb98ac1f,     0x3fea4678c8119ac8,     //  -0.57078,    0.8211
+    0xbfe258734cbb7110,     0x3fea38184a593bc6,     //   -0.5733,   0.81935
+    0xbfe26d054cdd12df,     0x3fea29a7a0462782,     //  -0.57581,   0.81758
+    0xbfe2818bef4d3cba,     0x3fea1b26d2c0a75e,     //  -0.57831,   0.81581
+    0xbfe2960727629ca8,     0x3fea0c95eabaf937,     //  -0.58081,   0.81404
+    0xbfe2aa76e87aeb58,     0x3fe9fdf4f13149de,     //  -0.58331,   0.81225
+    0xbfe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //   -0.5858,   0.81046
+    0xbfe2d333d34e9bb7,     0x3fe9e082edb42472,     //  -0.58828,   0.80866
+    0xbfe2e780e3e8ea16,     0x3fe9d1b1f5ea80d6,     //  -0.59076,   0.80685
+    0xbfe2fbc24b441015,     0x3fe9c2d110f075c3,     //  -0.59323,   0.80503
+    0xbfe30ff7fce17035,     0x3fe9b3e047f38741,     //   -0.5957,   0.80321
+    0xbfe32421ec49a620,     0x3fe9a4dfa42b06b2,     //  -0.59816,   0.80138
+    0xbfe338400d0c8e57,     0x3fe995cf2ed80d22,     //  -0.60062,   0.79954
+    0xbfe34c5252c14de1,     0x3fe986aef1457594,     //  -0.60307,   0.79769
+    0xbfe36058b10659f3,     0x3fe9777ef4c7d742,     //  -0.60551,   0.79584
+    0xbfe374531b817f8d,     0x3fe9683f42bd7fe1,     //  -0.60795,   0.79398
+    0xbfe3884185dfeb22,     0x3fe958efe48e6dd7,     //  -0.61038,   0.79211
+    0xbfe39c23e3d63029,     0x3fe94990e3ac4a6c,     //  -0.61281,   0.79023
+    0xbfe3affa292050b9,     0x3fe93a22499263fc,     //  -0.61523,   0.78835
+    0xbfe3c3c44981c517,     0x3fe92aa41fc5a815,     //  -0.61765,   0.78646
+    0xbfe3d78238c58343,     0x3fe91b166fd49da2,     //  -0.62006,   0.78456
+    0xbfe3eb33eabe0680,     0x3fe90b7943575efe,     //  -0.62246,   0.78265
+    0xbfe3fed9534556d4,     0x3fe8fbcca3ef940d,     //  -0.62486,   0.78074
+    0xbfe41272663d108c,     0x3fe8ec109b486c49,     //  -0.62725,   0.77882
+    0xbfe425ff178e6bb1,     0x3fe8dc45331698cc,     //  -0.62964,   0.77689
+    0xbfe4397f5b2a4380,     0x3fe8cc6a75184655,     //  -0.63202,   0.77495
+    0xbfe44cf325091dd6,     0x3fe8bc806b151741,     //  -0.63439,   0.77301
+    0xbfe4605a692b32a2,     0x3fe8ac871ede1d88,     //  -0.63676,   0.77106
+    0xbfe473b51b987347,     0x3fe89c7e9a4dd4ab,     //  -0.63912,    0.7691
+    0xbfe48703306091fe,     0x3fe88c66e7481ba1,     //  -0.64148,   0.76714
+    0xbfe49a449b9b0938,     0x3fe87c400fba2ebf,     //  -0.64383,   0.76517
+    0xbfe4ad79516722f0,     0x3fe86c0a1d9aa195,     //  -0.64618,   0.76319
+    0xbfe4c0a145ec0004,     0x3fe85bc51ae958cc,     //  -0.64851,    0.7612
+    0xbfe4d3bc6d589f80,     0x3fe84b7111af83f9,     //  -0.65085,   0.75921
+    0xbfe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //  -0.65317,   0.75721
+    0xbfe4f9cc25cca486,     0x3fe82a9c13f545ff,     //  -0.65549,    0.7552
+    0xbfe50cc09f59a09b,     0x3fe81a1b33b57acc,     //  -0.65781,   0.75319
+    0xbfe51fa81cd99aa6,     0x3fe8098b756e52fa,     //  -0.66011,   0.75117
+    0xbfe5328292a35596,     0x3fe7f8ece3571771,     //  -0.66242,   0.74914
+    0xbfe5454ff5159dfb,     0x3fe7e83f87b03686,     //  -0.66471,    0.7471
+    0xbfe5581038975137,     0x3fe7d7836cc33db2,     //    -0.667,   0.74506
+    0xbfe56ac35197649e,     0x3fe7c6b89ce2d333,     //  -0.66928,   0.74301
+    0xbfe57d69348cec9f,     0x3fe7b5df226aafb0,     //  -0.67156,   0.74095
+    0xbfe59001d5f723df,     0x3fe7a4f707bf97d2,     //  -0.67383,   0.73889
+    0xbfe5a28d2a5d7250,     0x3fe79400574f55e4,     //  -0.67609,   0.73682
+    0xbfe5b50b264f7448,     0x3fe782fb1b90b35b,     //  -0.67835,   0.73474
+    0xbfe5c77bbe65018c,     0x3fe771e75f037261,     //   -0.6806,   0.73265
+    0xbfe5d9dee73e345c,     0x3fe760c52c304764,     //  -0.68285,   0.73056
+    0xbfe5ec3495837074,     0x3fe74f948da8d28d,     //  -0.68508,   0.72846
+    0xbfe5fe7cbde56a0f,     0x3fe73e558e079942,     //  -0.68732,   0.72636
+    0xbfe610b7551d2cde,     0x3fe72d0837efff97,     //  -0.68954,   0.72425
+    0xbfe622e44fec22ff,     0x3fe71bac960e41bf,     //  -0.69176,   0.72213
+    0xbfe63503a31c1be8,     0x3fe70a42b3176d7a,     //  -0.69397,      0.72
+    0xbfe64715437f535b,     0x3fe6f8ca99c95b75,     //  -0.69618,   0.71787
+    0xbfe6591925f0783e,     0x3fe6e74454eaa8ae,     //  -0.69838,   0.71573
+    0xbfe66b0f3f52b386,     0x3fe6d5afef4aafcc,     //  -0.70057,   0.71358
+    0xbfe67cf78491af10,     0x3fe6c40d73c18275,     //  -0.70275,   0.71143
+    0xbfe68ed1eaa19c71,     0x3fe6b25ced2fe29c,     //  -0.70493,   0.70927
+    0xbfe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  -0.70711,   0.70711
+    0xbfe6b25ced2fe29c,     0x3fe68ed1eaa19c71,     //  -0.70927,   0.70493
+    0xbfe6c40d73c18275,     0x3fe67cf78491af10,     //  -0.71143,   0.70275
+    0xbfe6d5afef4aafcc,     0x3fe66b0f3f52b386,     //  -0.71358,   0.70057
+    0xbfe6e74454eaa8ae,     0x3fe6591925f0783e,     //  -0.71573,   0.69838
+    0xbfe6f8ca99c95b75,     0x3fe64715437f535b,     //  -0.71787,   0.69618
+    0xbfe70a42b3176d7a,     0x3fe63503a31c1be8,     //     -0.72,   0.69397
+    0xbfe71bac960e41bf,     0x3fe622e44fec22ff,     //  -0.72213,   0.69176
+    0xbfe72d0837efff97,     0x3fe610b7551d2cde,     //  -0.72425,   0.68954
+    0xbfe73e558e079942,     0x3fe5fe7cbde56a0f,     //  -0.72636,   0.68732
+    0xbfe74f948da8d28d,     0x3fe5ec3495837074,     //  -0.72846,   0.68508
+    0xbfe760c52c304764,     0x3fe5d9dee73e345c,     //  -0.73056,   0.68285
+    0xbfe771e75f037261,     0x3fe5c77bbe65018c,     //  -0.73265,    0.6806
+    0xbfe782fb1b90b35b,     0x3fe5b50b264f7448,     //  -0.73474,   0.67835
+    0xbfe79400574f55e4,     0x3fe5a28d2a5d7250,     //  -0.73682,   0.67609
+    0xbfe7a4f707bf97d2,     0x3fe59001d5f723df,     //  -0.73889,   0.67383
+    0xbfe7b5df226aafb0,     0x3fe57d69348cec9f,     //  -0.74095,   0.67156
+    0xbfe7c6b89ce2d333,     0x3fe56ac35197649e,     //  -0.74301,   0.66928
+    0xbfe7d7836cc33db2,     0x3fe5581038975137,     //  -0.74506,     0.667
+    0xbfe7e83f87b03686,     0x3fe5454ff5159dfb,     //   -0.7471,   0.66471
+    0xbfe7f8ece3571771,     0x3fe5328292a35596,     //  -0.74914,   0.66242
+    0xbfe8098b756e52fa,     0x3fe51fa81cd99aa6,     //  -0.75117,   0.66011
+    0xbfe81a1b33b57acc,     0x3fe50cc09f59a09b,     //  -0.75319,   0.65781
+    0xbfe82a9c13f545ff,     0x3fe4f9cc25cca486,     //   -0.7552,   0.65549
+    0xbfe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //  -0.75721,   0.65317
+    0xbfe84b7111af83f9,     0x3fe4d3bc6d589f80,     //  -0.75921,   0.65085
+    0xbfe85bc51ae958cc,     0x3fe4c0a145ec0004,     //   -0.7612,   0.64851
+    0xbfe86c0a1d9aa195,     0x3fe4ad79516722f0,     //  -0.76319,   0.64618
+    0xbfe87c400fba2ebf,     0x3fe49a449b9b0938,     //  -0.76517,   0.64383
+    0xbfe88c66e7481ba1,     0x3fe48703306091fe,     //  -0.76714,   0.64148
+    0xbfe89c7e9a4dd4ab,     0x3fe473b51b987347,     //   -0.7691,   0.63912
+    0xbfe8ac871ede1d88,     0x3fe4605a692b32a2,     //  -0.77106,   0.63676
+    0xbfe8bc806b151741,     0x3fe44cf325091dd6,     //  -0.77301,   0.63439
+    0xbfe8cc6a75184655,     0x3fe4397f5b2a4380,     //  -0.77495,   0.63202
+    0xbfe8dc45331698cc,     0x3fe425ff178e6bb1,     //  -0.77689,   0.62964
+    0xbfe8ec109b486c49,     0x3fe41272663d108c,     //  -0.77882,   0.62725
+    0xbfe8fbcca3ef940d,     0x3fe3fed9534556d4,     //  -0.78074,   0.62486
+    0xbfe90b7943575efe,     0x3fe3eb33eabe0680,     //  -0.78265,   0.62246
+    0xbfe91b166fd49da2,     0x3fe3d78238c58343,     //  -0.78456,   0.62006
+    0xbfe92aa41fc5a815,     0x3fe3c3c44981c517,     //  -0.78646,   0.61765
+    0xbfe93a22499263fc,     0x3fe3affa292050b9,     //  -0.78835,   0.61523
+    0xbfe94990e3ac4a6c,     0x3fe39c23e3d63029,     //  -0.79023,   0.61281
+    0xbfe958efe48e6dd7,     0x3fe3884185dfeb22,     //  -0.79211,   0.61038
+    0xbfe9683f42bd7fe1,     0x3fe374531b817f8d,     //  -0.79398,   0.60795
+    0xbfe9777ef4c7d742,     0x3fe36058b10659f3,     //  -0.79584,   0.60551
+    0xbfe986aef1457594,     0x3fe34c5252c14de1,     //  -0.79769,   0.60307
+    0xbfe995cf2ed80d22,     0x3fe338400d0c8e57,     //  -0.79954,   0.60062
+    0xbfe9a4dfa42b06b2,     0x3fe32421ec49a620,     //  -0.80138,   0.59816
+    0xbfe9b3e047f38741,     0x3fe30ff7fce17035,     //  -0.80321,    0.5957
+    0xbfe9c2d110f075c3,     0x3fe2fbc24b441015,     //  -0.80503,   0.59323
+    0xbfe9d1b1f5ea80d6,     0x3fe2e780e3e8ea16,     //  -0.80685,   0.59076
+    0xbfe9e082edb42472,     0x3fe2d333d34e9bb7,     //  -0.80866,   0.58828
+    0xbfe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //  -0.81046,    0.5858
+    0xbfe9fdf4f13149de,     0x3fe2aa76e87aeb58,     //  -0.81225,   0.58331
+    0xbfea0c95eabaf937,     0x3fe2960727629ca8,     //  -0.81404,   0.58081
+    0xbfea1b26d2c0a75e,     0x3fe2818bef4d3cba,     //  -0.81581,   0.57831
+    0xbfea29a7a0462782,     0x3fe26d054cdd12df,     //  -0.81758,   0.57581
+    0xbfea38184a593bc6,     0x3fe258734cbb7110,     //  -0.81935,    0.5733
+    0xbfea4678c8119ac8,     0x3fe243d5fb98ac1f,     //   -0.8211,   0.57078
+    0xbfea54c91090f524,     0x3fe22f2d662c13e1,     //  -0.82285,   0.56826
+    0xbfea63091b02fae2,     0x3fe21a799933eb58,     //  -0.82459,   0.56573
+    0xbfea7138de9d60f5,     0x3fe205baa17560d6,     //  -0.82632,    0.5632
+    0xbfea7f58529fe69d,     0x3fe1f0f08bbc861b,     //  -0.82805,   0.56066
+    0xbfea8d676e545ad2,     0x3fe1dc1b64dc4872,     //  -0.82976,   0.55812
+    0xbfea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  -0.83147,   0.55557
+    0xbfeaa9547a2cb98e,     0x3fe1b250171373be,     //  -0.83317,   0.55302
+    0xbfeab7325916c0d4,     0x3fe19d5a09f2b9b8,     //  -0.83486,   0.55046
+    0xbfeac4ffbd3efac8,     0x3fe188591f3a46e5,     //  -0.83655,   0.54789
+    0xbfead2bc9e21d511,     0x3fe1734d63dedb49,     //  -0.83822,   0.54532
+    0xbfeae068f345ecef,     0x3fe15e36e4dbe2bc,     //  -0.83989,   0.54275
+    0xbfeaee04b43c1474,     0x3fe14915af336ceb,     //  -0.84155,   0.54017
+    0xbfeafb8fd89f57b6,     0x3fe133e9cfee254e,     //  -0.84321,   0.53759
+    0xbfeb090a58150200,     0x3fe11eb3541b4b22,     //  -0.84485,     0.535
+    0xbfeb16742a4ca2f5,     0x3fe1097248d0a956,     //  -0.84649,    0.5324
+    0xbfeb23cd470013b4,     0x3fe0f426bb2a8e7d,     //  -0.84812,    0.5298
+    0xbfeb3115a5f37bf4,     0x3fe0ded0b84bc4b5,     //  -0.84974,    0.5272
+    0xbfeb3e4d3ef55712,     0x3fe0c9704d5d898f,     //  -0.85136,   0.52459
+    0xbfeb4b7409de7925,     0x3fe0b405878f85ec,     //  -0.85296,   0.52198
+    0xbfeb5889fe921405,     0x3fe09e907417c5e1,     //  -0.85456,   0.51936
+    0xbfeb658f14fdbc47,     0x3fe089112032b08c,     //  -0.85615,   0.51673
+    0xbfeb728345196e3e,     0x3fe073879922ffed,     //  -0.85773,    0.5141
+    0xbfeb7f6686e792ea,     0x3fe05df3ec31b8b6,     //   -0.8593,   0.51147
+    0xbfeb8c38d27504e9,     0x3fe0485626ae221a,     //  -0.86087,   0.50883
+    0xbfeb98fa1fd9155e,     0x3fe032ae55edbd95,     //  -0.86242,   0.50619
+    0xbfeba5aa673590d2,     0x3fe01cfc874c3eb7,     //  -0.86397,   0.50354
+    0xbfebb249a0b6c40d,     0x3fe00740c82b82e0,     //  -0.86551,   0.50089
+    0xbfebbed7c49380ea,     0x3fdfe2f64be7120f,     //  -0.86705,   0.49823
+    0xbfebcb54cb0d2327,     0x3fdfb7575c24d2de,     //  -0.86857,   0.49557
+    0xbfebd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //  -0.87009,    0.4929
+    0xbfebe41b611154c1,     0x3fdf5fdee656cda3,     //   -0.8716,   0.49023
+    0xbfebf064e15377dd,     0x3fdf3405963fd068,     //  -0.87309,   0.48755
+    0xbfebfc9d25a1b147,     0x3fdf081906bff7fd,     //  -0.87459,   0.48487
+    0xbfec08c426725549,     0x3fdedc1952ef78d5,     //  -0.87607,   0.48218
+    0xbfec14d9dc465e58,     0x3fdeb00695f25620,     //  -0.87755,   0.47949
+    0xbfec20de3fa971b0,     0x3fde83e0eaf85113,     //  -0.87901,    0.4768
+    0xbfec2cd14931e3f1,     0x3fde57a86d3cd824,     //  -0.88047,    0.4741
+    0xbfec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  -0.88192,    0.4714
+    0xbfec44833141c004,     0x3fddfeff66a941de,     //  -0.88336,   0.46869
+    0xbfec5042012b6907,     0x3fddd28f1481cc58,     //   -0.8848,   0.46598
+    0xbfec5bef59fef85a,     0x3fdda60c5cfa10d8,     //  -0.88622,   0.46326
+    0xbfec678b3488739b,     0x3fdd79775b86e389,     //  -0.88764,   0.46054
+    0xbfec7315899eaad7,     0x3fdd4cd02ba8609c,     //  -0.88905,   0.45781
+    0xbfec7e8e52233cf3,     0x3fdd2016e8e9db5b,     //  -0.89045,   0.45508
+    0xbfec89f587029c13,     0x3fdcf34baee1cd21,     //  -0.89184,   0.45235
+    0xbfec954b213411f5,     0x3fdcc66e9931c45d,     //  -0.89322,   0.44961
+    0xbfeca08f19b9c449,     0x3fdc997fc3865388,     //   -0.8946,   0.44687
+    0xbfecabc169a0b901,     0x3fdc6c7f4997000a,     //  -0.89597,   0.44412
+    0xbfecb6e20a00da99,     0x3fdc3f6d47263129,     //  -0.89732,   0.44137
+    0xbfecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //  -0.89867,   0.43862
+    0xbfecccee20c2de9f,     0x3fdbe51517ffc0d9,     //  -0.90002,   0.43586
+    0xbfecd7d9898b32f6,     0x3fdbb7cf2304bd01,     //  -0.90135,   0.43309
+    0xbfece2b32799a060,     0x3fdb8a7814fd5693,     //  -0.90267,   0.43033
+    0xbfeced7af43cc773,     0x3fdb5d1009e15cc0,     //  -0.90399,   0.42756
+    0xbfecf830e8ce467b,     0x3fdb2f971db31972,     //   -0.9053,   0.42478
+    0xbfed02d4feb2bd92,     0x3fdb020d6c7f4009,     //   -0.9066,     0.422
+    0xbfed0d672f59d2b9,     0x3fdad473125cdc08,     //  -0.90789,   0.41922
+    0xbfed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //  -0.90917,   0.41643
+    0xbfed2255c6e5a4e1,     0x3fda790cd3dbf31a,     //  -0.91044,   0.41364
+    0xbfed2cb220e0ef9f,     0x3fda4b4127dea1e4,     //  -0.91171,   0.41084
+    0xbfed36fc7bcbfbdc,     0x3fda1d6543b50ac0,     //  -0.91296,   0.40804
+    0xbfed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //  -0.91421,   0.40524
+    0xbfed4b5b1b187524,     0x3fd9c17d440df9f2,     //  -0.91545,   0.40243
+    0xbfed556f52e93eb1,     0x3fd993716141bdfe,     //  -0.91668,   0.39962
+    0xbfed5f7172888a7f,     0x3fd96555b7ab948f,     //   -0.9179,   0.39681
+    0xbfed696173c9e68b,     0x3fd9372a63bc93d7,     //  -0.91911,   0.39399
+    0xbfed733f508c0dff,     0x3fd908ef81ef7bd1,     //  -0.92032,   0.39117
+    0xbfed7d0b02b8ecf9,     0x3fd8daa52ec8a4af,     //  -0.92151,   0.38835
+    0xbfed86c48445a450,     0x3fd8ac4b86d5ed44,     //   -0.9227,   0.38552
+    0xbfed906bcf328d46,     0x3fd87de2a6aea963,     //  -0.92388,   0.38268
+    0xbfed9a00dd8b3d46,     0x3fd84f6aaaf3903f,     //  -0.92505,   0.37985
+    0xbfeda383a9668988,     0x3fd820e3b04eaac4,     //  -0.92621,   0.37701
+    0xbfedacf42ce68ab9,     0x3fd7f24dd37341e3,     //  -0.92736,   0.37416
+    0xbfedb6526238a09b,     0x3fd7c3a9311dcce7,     //  -0.92851,   0.37132
+    0xbfedbf9e4395759a,     0x3fd794f5e613dfae,     //  -0.92964,   0.36847
+    0xbfedc8d7cb410260,     0x3fd766340f2418f6,     //  -0.93077,   0.36561
+    0xbfedd1fef38a915a,     0x3fd73763c9261092,     //  -0.93188,   0.36276
+    0xbfeddb13b6ccc23d,     0x3fd7088530fa459e,     //  -0.93299,    0.3599
+    0xbfede4160f6d8d81,     0x3fd6d998638a0cb5,     //  -0.93409,   0.35703
+    0xbfeded05f7de47da,     0x3fd6aa9d7dc77e16,     //  -0.93518,   0.35416
+    0xbfedf5e36a9ba59c,     0x3fd67b949cad63ca,     //  -0.93627,   0.35129
+    0xbfedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //  -0.93734,   0.34842
+    0xbfee0766d9280f54,     0x3fd61d595c88c203,     //   -0.9384,   0.34554
+    0xbfee100cca2980ac,     0x3fd5ee27379ea693,     //  -0.93946,   0.34266
+    0xbfee18a02fdc66d9,     0x3fd5bee78b9db3b6,     //  -0.94051,   0.33978
+    0xbfee212104f686e5,     0x3fd58f9a75ab1fdd,     //  -0.94154,   0.33689
+    0xbfee298f4439197a,     0x3fd5604012f467b4,     //  -0.94257,     0.334
+    0xbfee31eae870ce25,     0x3fd530d880af3c24,     //  -0.94359,   0.33111
+    0xbfee3a33ec75ce85,     0x3fd50163dc197047,     //   -0.9446,   0.32821
+    0xbfee426a4b2bc17e,     0x3fd4d1e24278e76a,     //  -0.94561,   0.32531
+    0xbfee4a8dff81ce5e,     0x3fd4a253d11b82f3,     //   -0.9466,   0.32241
+    0xbfee529f04729ffc,     0x3fd472b8a5571054,     //  -0.94759,    0.3195
+    0xbfee5a9d550467d3,     0x3fd44310dc8936f0,     //  -0.94856,   0.31659
+    0xbfee6288ec48e112,     0x3fd4135c94176602,     //  -0.94953,   0.31368
+    0xbfee6a61c55d53a7,     0x3fd3e39be96ec271,     //  -0.95049,   0.31077
+    0xbfee7227db6a9744,     0x3fd3b3cefa0414b7,     //  -0.95144,   0.30785
+    0xbfee79db29a5165a,     0x3fd383f5e353b6aa,     //  -0.95238,   0.30493
+    0xbfee817bab4cd10d,     0x3fd35410c2e18152,     //  -0.95331,   0.30201
+    0xbfee89095bad6025,     0x3fd3241fb638baaf,     //  -0.95423,   0.29908
+    0xbfee9084361df7f3,     0x3fd2f422daec0386,     //  -0.95514,   0.29615
+    0xbfee97ec36016b30,     0x3fd2c41a4e954520,     //  -0.95605,   0.29322
+    0xbfee9f4156c62dda,     0x3fd294062ed59f05,     //  -0.95694,   0.29028
+    0xbfeea68393e65800,     0x3fd263e6995554ba,     //  -0.95783,   0.28735
+    0xbfeeadb2e8e7a88e,     0x3fd233bbabc3bb72,     //   -0.9587,   0.28441
+    0xbfeeb4cf515b8811,     0x3fd2038583d727bd,     //  -0.95957,   0.28146
+    0xbfeebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //  -0.96043,   0.27852
+    0xbfeec2cf4b1af6b2,     0x3fd1a2f7fbe8f243,     //  -0.96128,   0.27557
+    0xbfeec9b2d3c3bf84,     0x3fd172a0d7765177,     //  -0.96212,   0.27262
+    0xbfeed0835e999009,     0x3fd1423eefc69378,     //  -0.96295,   0.26967
+    0xbfeed740e7684963,     0x3fd111d262b1f677,     //  -0.96378,   0.26671
+    0xbfeeddeb6a078651,     0x3fd0e15b4e1749cd,     //  -0.96459,   0.26375
+    0xbfeee482e25a9dbc,     0x3fd0b0d9cfdbdb90,     //  -0.96539,   0.26079
+    0xbfeeeb074c50a544,     0x3fd0804e05eb661e,     //  -0.96619,   0.25783
+    0xbfeef178a3e473c2,     0x3fd04fb80e37fdae,     //  -0.96698,   0.25487
+    0xbfeef7d6e51ca3c0,     0x3fd01f1806b9fdd2,     //  -0.96775,    0.2519
+    0xbfeefe220c0b95ec,     0x3fcfdcdc1adfedf8,     //  -0.96852,   0.24893
+    0xbfef045a14cf738c,     0x3fcf7b7480bd3801,     //  -0.96928,   0.24596
+    0xbfef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  -0.97003,   0.24298
+    0xbfef1090bc898f5f,     0x3fceb86b462de348,     //  -0.97077,      0.24
+    0xbfef168f53f7205d,     0x3fce56ca1e101a1b,     //   -0.9715,   0.23702
+    0xbfef1c7abe284708,     0x3fcdf5163f01099a,     //  -0.97223,   0.23404
+    0xbfef2252f7763ada,     0x3fcd934fe5454311,     //  -0.97294,   0.23106
+    0xbfef2817fc4609ce,     0x3fcd31774d2cbdee,     //  -0.97364,   0.22807
+    0xbfef2dc9c9089a9d,     0x3fcccf8cb312b286,     //  -0.97434,   0.22508
+    0xbfef33685a3aaef0,     0x3fcc6d90535d74dc,     //  -0.97503,   0.22209
+    0xbfef38f3ac64e589,     0x3fcc0b826a7e4f63,     //   -0.9757,    0.2191
+    0xbfef3e6bbc1bbc65,     0x3fcba96334f15dad,     //  -0.97637,   0.21611
+    0xbfef43d085ff92dd,     0x3fcb4732ef3d6722,     //  -0.97703,   0.21311
+    0xbfef492206bcabb4,     0x3fcae4f1d5f3b9ab,     //  -0.97768,   0.21011
+    0xbfef4e603b0b2f2d,     0x3fca82a025b00451,     //  -0.97832,   0.20711
+    0xbfef538b1faf2d07,     0x3fca203e1b1831da,     //  -0.97895,   0.20411
+    0xbfef58a2b1789e84,     0x3fc9bdcbf2dc4366,     //  -0.97957,    0.2011
+    0xbfef5da6ed43685d,     0x3fc95b49e9b62af9,     //  -0.98018,    0.1981
+    0xbfef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  -0.98079,   0.19509
+    0xbfef677556883cee,     0x3fc8961727c41804,     //  -0.98138,   0.19208
+    0xbfef6c3f7df5bbb7,     0x3fc83366e89c64c5,     //  -0.98196,   0.18907
+    0xbfef70f6434b7eb7,     0x3fc7d0a7bbd2cb1b,     //  -0.98254,   0.18606
+    0xbfef7599a3a12077,     0x3fc76dd9de50bf31,     //  -0.98311,   0.18304
+    0xbfef7a299c1a322a,     0x3fc70afd8d08c4ff,     //  -0.98366,   0.18002
+    0xbfef7ea629e63d6e,     0x3fc6a81304f64ab2,     //  -0.98421,     0.177
+    0xbfef830f4a40c60c,     0x3fc6451a831d830d,     //  -0.98475,   0.17398
+    0xbfef8764fa714ba9,     0x3fc5e214448b3fc6,     //  -0.98528,   0.17096
+    0xbfef8ba737cb4b78,     0x3fc57f008654cbde,     //   -0.9858,   0.16794
+    0xbfef8fd5ffae41db,     0x3fc51bdf8597c5f2,     //  -0.98631,   0.16491
+    0xbfef93f14f85ac08,     0x3fc4b8b17f79fa88,     //  -0.98681,   0.16189
+    0xbfef97f924c9099b,     0x3fc45576b1293e5a,     //   -0.9873,   0.15886
+    0xbfef9bed7cfbde29,     0x3fc3f22f57db4893,     //  -0.98778,   0.15583
+    0xbfef9fce55adb2c8,     0x3fc38edbb0cd8d14,     //  -0.98826,    0.1528
+    0xbfefa39bac7a1791,     0x3fc32b7bf94516a7,     //  -0.98872,   0.14976
+    0xbfefa7557f08a517,     0x3fc2c8106e8e613a,     //  -0.98918,   0.14673
+    0xbfefaafbcb0cfddc,     0x3fc264994dfd340a,     //  -0.98962,    0.1437
+    0xbfefae8e8e46cfbb,     0x3fc20116d4ec7bce,     //  -0.99006,   0.14066
+    0xbfefb20dc681d54d,     0x3fc19d8940be24e7,     //  -0.99049,   0.13762
+    0xbfefb5797195d741,     0x3fc139f0cedaf576,     //   -0.9909,   0.13458
+    0xbfefb8d18d66adb7,     0x3fc0d64dbcb26786,     //  -0.99131,   0.13154
+    0xbfefbc1617e44186,     0x3fc072a047ba831d,     //  -0.99171,    0.1285
+    0xbfefbf470f0a8d88,     0x3fc00ee8ad6fb85b,     //   -0.9921,   0.12545
+    0xbfefc26470e19fd3,     0x3fbf564e56a9730e,     //  -0.99248,   0.12241
+    0xbfefc56e3b7d9af6,     0x3fbe8eb7fde4aa3e,     //  -0.99285,   0.11937
+    0xbfefc8646cfeb721,     0x3fbdc70ecbae9fc8,     //  -0.99321,   0.11632
+    0xbfefcb4703914354,     0x3fbcff533b307dc1,     //  -0.99356,   0.11327
+    0xbfefce15fd6da67b,     0x3fbc3785c79ec2d5,     //  -0.99391,   0.11022
+    0xbfefd0d158d86087,     0x3fbb6fa6ec38f64c,     //  -0.99424,   0.10717
+    0xbfefd37914220b84,     0x3fbaa7b724495c04,     //  -0.99456,   0.10412
+    0xbfefd60d2da75c9e,     0x3fb9dfb6eb24a85c,     //  -0.99488,   0.10107
+    0xbfefd88da3d12526,     0x3fb917a6bc29b42c,     //  -0.99518,  0.098017
+    0xbfefdafa7514538c,     0x3fb84f8712c130a0,     //  -0.99548,  0.094963
+    0xbfefdd539ff1f456,     0x3fb787586a5d5b21,     //  -0.99577,  0.091909
+    0xbfefdf9922f73307,     0x3fb6bf1b3e79b129,     //  -0.99604,  0.088854
+    0xbfefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //  -0.99631,  0.085797
+    0xbfefe3e92be9d886,     0x3fb52e774a4d4d0a,     //  -0.99657,   0.08274
+    0xbfefe5f3af2e3940,     0x3fb4661179272096,     //  -0.99682,  0.079682
+    0xbfefe7ea85482d60,     0x3fb39d9f12c5a299,     //  -0.99706,  0.076624
+    0xbfefe9cdad01883a,     0x3fb2d52092ce19f6,     //  -0.99729,  0.073565
+    0xbfefeb9d2530410f,     0x3fb20c9674ed444c,     //  -0.99751,  0.070505
+    0xbfefed58ecb673c4,     0x3fb1440134d709b2,     //  -0.99772,  0.067444
+    0xbfefef0102826191,     0x3fb07b614e463064,     //  -0.99793,  0.064383
+    0xbfeff095658e71ad,     0x3faf656e79f820e0,     //  -0.99812,  0.061321
+    0xbfeff21614e131ed,     0x3fadd406f9808ec8,     //   -0.9983,  0.058258
+    0xbfeff3830f8d575c,     0x3fac428d12c0d7e3,     //  -0.99848,  0.055195
+    0xbfeff4dc54b1bed3,     0x3faab101bd5f8317,     //  -0.99864,  0.052132
+    0xbfeff621e3796d7e,     0x3fa91f65f10dd814,     //   -0.9988,  0.049068
+    0xbfeff753bb1b9164,     0x3fa78dbaa5874685,     //  -0.99894,  0.046003
+    0xbfeff871dadb81df,     0x3fa5fc00d290cd43,     //  -0.99908,  0.042938
+    0xbfeff97c4208c014,     0x3fa46a396ff86179,     //   -0.9992,  0.039873
+    0xbfeffa72effef75d,     0x3fa2d865759455cd,     //  -0.99932,  0.036807
+    0xbfeffb55e425fdae,     0x3fa14685db42c17e,     //  -0.99943,  0.033741
+    0xbfeffc251df1d3f8,     0x3f9f693731d1cf01,     //  -0.99953,  0.030675
+    0xbfeffce09ce2a679,     0x3f9c454f4ce53b1c,     //  -0.99962,  0.027608
+    0xbfeffd886084cd0d,     0x3f992155f7a3667e,     //   -0.9997,  0.024541
+    0xbfeffe1c6870cb77,     0x3f95fd4d21fab226,     //  -0.99977,  0.021474
+    0xbfeffe9cb44b51a1,     0x3f92d936bbe30efd,     //  -0.99983,  0.018407
+    0xbfefff0943c53bd1,     0x3f8f6a296ab997ca,     //  -0.99988,  0.015339
+    0xbfefff62169b92db,     0x3f8921d1fcdec784,     //  -0.99992,  0.012272
+    0xbfefffa72c978c4f,     0x3f82d96b0e509703,     //  -0.99996, 0.0092038
+    0xbfefffd8858e8a92,     0x3f7921f0fe670071,     //  -0.99998, 0.0061359
+    0xbfeffff621621d02,     0x3f6921f8becca4ba,     //        -1,  0.003068
+    0xbff0000000000000,     0x0000000000000000,     //        -1,         0
+    0xbfeffff621621d02,     0xbf6921f8becca4ba,     //        -1, -0.003068
+    0xbfefffd8858e8a92,     0xbf7921f0fe670071,     //  -0.99998,-0.0061359
+    0xbfefffa72c978c4f,     0xbf82d96b0e509703,     //  -0.99996,-0.0092038
+    0xbfefff62169b92db,     0xbf8921d1fcdec784,     //  -0.99992, -0.012272
+    0xbfefff0943c53bd1,     0xbf8f6a296ab997ca,     //  -0.99988, -0.015339
+    0xbfeffe9cb44b51a1,     0xbf92d936bbe30efd,     //  -0.99983, -0.018407
+    0xbfeffe1c6870cb77,     0xbf95fd4d21fab226,     //  -0.99977, -0.021474
+    0xbfeffd886084cd0d,     0xbf992155f7a3667e,     //   -0.9997, -0.024541
+    0xbfeffce09ce2a679,     0xbf9c454f4ce53b1c,     //  -0.99962, -0.027608
+    0xbfeffc251df1d3f8,     0xbf9f693731d1cf01,     //  -0.99953, -0.030675
+    0xbfeffb55e425fdae,     0xbfa14685db42c17e,     //  -0.99943, -0.033741
+    0xbfeffa72effef75d,     0xbfa2d865759455cd,     //  -0.99932, -0.036807
+    0xbfeff97c4208c014,     0xbfa46a396ff86179,     //   -0.9992, -0.039873
+    0xbfeff871dadb81df,     0xbfa5fc00d290cd43,     //  -0.99908, -0.042938
+    0xbfeff753bb1b9164,     0xbfa78dbaa5874685,     //  -0.99894, -0.046003
+    0xbfeff621e3796d7e,     0xbfa91f65f10dd814,     //   -0.9988, -0.049068
+    0xbfeff4dc54b1bed3,     0xbfaab101bd5f8317,     //  -0.99864, -0.052132
+    0xbfeff3830f8d575c,     0xbfac428d12c0d7e3,     //  -0.99848, -0.055195
+    0xbfeff21614e131ed,     0xbfadd406f9808ec8,     //   -0.9983, -0.058258
+    0xbfeff095658e71ad,     0xbfaf656e79f820e0,     //  -0.99812, -0.061321
+    0xbfefef0102826191,     0xbfb07b614e463064,     //  -0.99793, -0.064383
+    0xbfefed58ecb673c4,     0xbfb1440134d709b2,     //  -0.99772, -0.067444
+    0xbfefeb9d2530410f,     0xbfb20c9674ed444c,     //  -0.99751, -0.070505
+    0xbfefe9cdad01883a,     0xbfb2d52092ce19f6,     //  -0.99729, -0.073565
+    0xbfefe7ea85482d60,     0xbfb39d9f12c5a299,     //  -0.99706, -0.076624
+    0xbfefe5f3af2e3940,     0xbfb4661179272096,     //  -0.99682, -0.079682
+    0xbfefe3e92be9d886,     0xbfb52e774a4d4d0a,     //  -0.99657,  -0.08274
+    0xbfefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //  -0.99631, -0.085797
+    0xbfefdf9922f73307,     0xbfb6bf1b3e79b129,     //  -0.99604, -0.088854
+    0xbfefdd539ff1f456,     0xbfb787586a5d5b21,     //  -0.99577, -0.091909
+    0xbfefdafa7514538c,     0xbfb84f8712c130a0,     //  -0.99548, -0.094963
+    0xbfefd88da3d12526,     0xbfb917a6bc29b42c,     //  -0.99518, -0.098017
+    0xbfefd60d2da75c9e,     0xbfb9dfb6eb24a85c,     //  -0.99488,  -0.10107
+    0xbfefd37914220b84,     0xbfbaa7b724495c04,     //  -0.99456,  -0.10412
+    0xbfefd0d158d86087,     0xbfbb6fa6ec38f64c,     //  -0.99424,  -0.10717
+    0xbfefce15fd6da67b,     0xbfbc3785c79ec2d5,     //  -0.99391,  -0.11022
+    0xbfefcb4703914354,     0xbfbcff533b307dc1,     //  -0.99356,  -0.11327
+    0xbfefc8646cfeb721,     0xbfbdc70ecbae9fc8,     //  -0.99321,  -0.11632
+    0xbfefc56e3b7d9af6,     0xbfbe8eb7fde4aa3e,     //  -0.99285,  -0.11937
+    0xbfefc26470e19fd3,     0xbfbf564e56a9730e,     //  -0.99248,  -0.12241
+    0xbfefbf470f0a8d88,     0xbfc00ee8ad6fb85b,     //   -0.9921,  -0.12545
+    0xbfefbc1617e44186,     0xbfc072a047ba831d,     //  -0.99171,   -0.1285
+    0xbfefb8d18d66adb7,     0xbfc0d64dbcb26786,     //  -0.99131,  -0.13154
+    0xbfefb5797195d741,     0xbfc139f0cedaf576,     //   -0.9909,  -0.13458
+    0xbfefb20dc681d54d,     0xbfc19d8940be24e7,     //  -0.99049,  -0.13762
+    0xbfefae8e8e46cfbb,     0xbfc20116d4ec7bce,     //  -0.99006,  -0.14066
+    0xbfefaafbcb0cfddc,     0xbfc264994dfd340a,     //  -0.98962,   -0.1437
+    0xbfefa7557f08a517,     0xbfc2c8106e8e613a,     //  -0.98918,  -0.14673
+    0xbfefa39bac7a1791,     0xbfc32b7bf94516a7,     //  -0.98872,  -0.14976
+    0xbfef9fce55adb2c8,     0xbfc38edbb0cd8d14,     //  -0.98826,   -0.1528
+    0xbfef9bed7cfbde29,     0xbfc3f22f57db4893,     //  -0.98778,  -0.15583
+    0xbfef97f924c9099b,     0xbfc45576b1293e5a,     //   -0.9873,  -0.15886
+    0xbfef93f14f85ac08,     0xbfc4b8b17f79fa88,     //  -0.98681,  -0.16189
+    0xbfef8fd5ffae41db,     0xbfc51bdf8597c5f2,     //  -0.98631,  -0.16491
+    0xbfef8ba737cb4b78,     0xbfc57f008654cbde,     //   -0.9858,  -0.16794
+    0xbfef8764fa714ba9,     0xbfc5e214448b3fc6,     //  -0.98528,  -0.17096
+    0xbfef830f4a40c60c,     0xbfc6451a831d830d,     //  -0.98475,  -0.17398
+    0xbfef7ea629e63d6e,     0xbfc6a81304f64ab2,     //  -0.98421,    -0.177
+    0xbfef7a299c1a322a,     0xbfc70afd8d08c4ff,     //  -0.98366,  -0.18002
+    0xbfef7599a3a12077,     0xbfc76dd9de50bf31,     //  -0.98311,  -0.18304
+    0xbfef70f6434b7eb7,     0xbfc7d0a7bbd2cb1b,     //  -0.98254,  -0.18606
+    0xbfef6c3f7df5bbb7,     0xbfc83366e89c64c5,     //  -0.98196,  -0.18907
+    0xbfef677556883cee,     0xbfc8961727c41804,     //  -0.98138,  -0.19208
+    0xbfef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  -0.98079,  -0.19509
+    0xbfef5da6ed43685d,     0xbfc95b49e9b62af9,     //  -0.98018,   -0.1981
+    0xbfef58a2b1789e84,     0xbfc9bdcbf2dc4366,     //  -0.97957,   -0.2011
+    0xbfef538b1faf2d07,     0xbfca203e1b1831da,     //  -0.97895,  -0.20411
+    0xbfef4e603b0b2f2d,     0xbfca82a025b00451,     //  -0.97832,  -0.20711
+    0xbfef492206bcabb4,     0xbfcae4f1d5f3b9ab,     //  -0.97768,  -0.21011
+    0xbfef43d085ff92dd,     0xbfcb4732ef3d6722,     //  -0.97703,  -0.21311
+    0xbfef3e6bbc1bbc65,     0xbfcba96334f15dad,     //  -0.97637,  -0.21611
+    0xbfef38f3ac64e589,     0xbfcc0b826a7e4f63,     //   -0.9757,   -0.2191
+    0xbfef33685a3aaef0,     0xbfcc6d90535d74dc,     //  -0.97503,  -0.22209
+    0xbfef2dc9c9089a9d,     0xbfcccf8cb312b286,     //  -0.97434,  -0.22508
+    0xbfef2817fc4609ce,     0xbfcd31774d2cbdee,     //  -0.97364,  -0.22807
+    0xbfef2252f7763ada,     0xbfcd934fe5454311,     //  -0.97294,  -0.23106
+    0xbfef1c7abe284708,     0xbfcdf5163f01099a,     //  -0.97223,  -0.23404
+    0xbfef168f53f7205d,     0xbfce56ca1e101a1b,     //   -0.9715,  -0.23702
+    0xbfef1090bc898f5f,     0xbfceb86b462de348,     //  -0.97077,     -0.24
+    0xbfef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  -0.97003,  -0.24298
+    0xbfef045a14cf738c,     0xbfcf7b7480bd3801,     //  -0.96928,  -0.24596
+    0xbfeefe220c0b95ec,     0xbfcfdcdc1adfedf8,     //  -0.96852,  -0.24893
+    0xbfeef7d6e51ca3c0,     0xbfd01f1806b9fdd2,     //  -0.96775,   -0.2519
+    0xbfeef178a3e473c2,     0xbfd04fb80e37fdae,     //  -0.96698,  -0.25487
+    0xbfeeeb074c50a544,     0xbfd0804e05eb661e,     //  -0.96619,  -0.25783
+    0xbfeee482e25a9dbc,     0xbfd0b0d9cfdbdb90,     //  -0.96539,  -0.26079
+    0xbfeeddeb6a078651,     0xbfd0e15b4e1749cd,     //  -0.96459,  -0.26375
+    0xbfeed740e7684963,     0xbfd111d262b1f677,     //  -0.96378,  -0.26671
+    0xbfeed0835e999009,     0xbfd1423eefc69378,     //  -0.96295,  -0.26967
+    0xbfeec9b2d3c3bf84,     0xbfd172a0d7765177,     //  -0.96212,  -0.27262
+    0xbfeec2cf4b1af6b2,     0xbfd1a2f7fbe8f243,     //  -0.96128,  -0.27557
+    0xbfeebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //  -0.96043,  -0.27852
+    0xbfeeb4cf515b8811,     0xbfd2038583d727bd,     //  -0.95957,  -0.28146
+    0xbfeeadb2e8e7a88e,     0xbfd233bbabc3bb72,     //   -0.9587,  -0.28441
+    0xbfeea68393e65800,     0xbfd263e6995554ba,     //  -0.95783,  -0.28735
+    0xbfee9f4156c62dda,     0xbfd294062ed59f05,     //  -0.95694,  -0.29028
+    0xbfee97ec36016b30,     0xbfd2c41a4e954520,     //  -0.95605,  -0.29322
+    0xbfee9084361df7f3,     0xbfd2f422daec0386,     //  -0.95514,  -0.29615
+    0xbfee89095bad6025,     0xbfd3241fb638baaf,     //  -0.95423,  -0.29908
+    0xbfee817bab4cd10d,     0xbfd35410c2e18152,     //  -0.95331,  -0.30201
+    0xbfee79db29a5165a,     0xbfd383f5e353b6aa,     //  -0.95238,  -0.30493
+    0xbfee7227db6a9744,     0xbfd3b3cefa0414b7,     //  -0.95144,  -0.30785
+    0xbfee6a61c55d53a7,     0xbfd3e39be96ec271,     //  -0.95049,  -0.31077
+    0xbfee6288ec48e112,     0xbfd4135c94176602,     //  -0.94953,  -0.31368
+    0xbfee5a9d550467d3,     0xbfd44310dc8936f0,     //  -0.94856,  -0.31659
+    0xbfee529f04729ffc,     0xbfd472b8a5571054,     //  -0.94759,   -0.3195
+    0xbfee4a8dff81ce5e,     0xbfd4a253d11b82f3,     //   -0.9466,  -0.32241
+    0xbfee426a4b2bc17e,     0xbfd4d1e24278e76a,     //  -0.94561,  -0.32531
+    0xbfee3a33ec75ce85,     0xbfd50163dc197047,     //   -0.9446,  -0.32821
+    0xbfee31eae870ce25,     0xbfd530d880af3c24,     //  -0.94359,  -0.33111
+    0xbfee298f4439197a,     0xbfd5604012f467b4,     //  -0.94257,    -0.334
+    0xbfee212104f686e5,     0xbfd58f9a75ab1fdd,     //  -0.94154,  -0.33689
+    0xbfee18a02fdc66d9,     0xbfd5bee78b9db3b6,     //  -0.94051,  -0.33978
+    0xbfee100cca2980ac,     0xbfd5ee27379ea693,     //  -0.93946,  -0.34266
+    0xbfee0766d9280f54,     0xbfd61d595c88c203,     //   -0.9384,  -0.34554
+    0xbfedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //  -0.93734,  -0.34842
+    0xbfedf5e36a9ba59c,     0xbfd67b949cad63ca,     //  -0.93627,  -0.35129
+    0xbfeded05f7de47da,     0xbfd6aa9d7dc77e16,     //  -0.93518,  -0.35416
+    0xbfede4160f6d8d81,     0xbfd6d998638a0cb5,     //  -0.93409,  -0.35703
+    0xbfeddb13b6ccc23d,     0xbfd7088530fa459e,     //  -0.93299,   -0.3599
+    0xbfedd1fef38a915a,     0xbfd73763c9261092,     //  -0.93188,  -0.36276
+    0xbfedc8d7cb410260,     0xbfd766340f2418f6,     //  -0.93077,  -0.36561
+    0xbfedbf9e4395759a,     0xbfd794f5e613dfae,     //  -0.92964,  -0.36847
+    0xbfedb6526238a09b,     0xbfd7c3a9311dcce7,     //  -0.92851,  -0.37132
+    0xbfedacf42ce68ab9,     0xbfd7f24dd37341e3,     //  -0.92736,  -0.37416
+    0xbfeda383a9668988,     0xbfd820e3b04eaac4,     //  -0.92621,  -0.37701
+    0xbfed9a00dd8b3d46,     0xbfd84f6aaaf3903f,     //  -0.92505,  -0.37985
+    0xbfed906bcf328d46,     0xbfd87de2a6aea963,     //  -0.92388,  -0.38268
+    0xbfed86c48445a450,     0xbfd8ac4b86d5ed44,     //   -0.9227,  -0.38552
+    0xbfed7d0b02b8ecf9,     0xbfd8daa52ec8a4af,     //  -0.92151,  -0.38835
+    0xbfed733f508c0dff,     0xbfd908ef81ef7bd1,     //  -0.92032,  -0.39117
+    0xbfed696173c9e68b,     0xbfd9372a63bc93d7,     //  -0.91911,  -0.39399
+    0xbfed5f7172888a7f,     0xbfd96555b7ab948f,     //   -0.9179,  -0.39681
+    0xbfed556f52e93eb1,     0xbfd993716141bdfe,     //  -0.91668,  -0.39962
+    0xbfed4b5b1b187524,     0xbfd9c17d440df9f2,     //  -0.91545,  -0.40243
+    0xbfed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //  -0.91421,  -0.40524
+    0xbfed36fc7bcbfbdc,     0xbfda1d6543b50ac0,     //  -0.91296,  -0.40804
+    0xbfed2cb220e0ef9f,     0xbfda4b4127dea1e4,     //  -0.91171,  -0.41084
+    0xbfed2255c6e5a4e1,     0xbfda790cd3dbf31a,     //  -0.91044,  -0.41364
+    0xbfed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //  -0.90917,  -0.41643
+    0xbfed0d672f59d2b9,     0xbfdad473125cdc08,     //  -0.90789,  -0.41922
+    0xbfed02d4feb2bd92,     0xbfdb020d6c7f4009,     //   -0.9066,    -0.422
+    0xbfecf830e8ce467b,     0xbfdb2f971db31972,     //   -0.9053,  -0.42478
+    0xbfeced7af43cc773,     0xbfdb5d1009e15cc0,     //  -0.90399,  -0.42756
+    0xbfece2b32799a060,     0xbfdb8a7814fd5693,     //  -0.90267,  -0.43033
+    0xbfecd7d9898b32f6,     0xbfdbb7cf2304bd01,     //  -0.90135,  -0.43309
+    0xbfecccee20c2de9f,     0xbfdbe51517ffc0d9,     //  -0.90002,  -0.43586
+    0xbfecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //  -0.89867,  -0.43862
+    0xbfecb6e20a00da99,     0xbfdc3f6d47263129,     //  -0.89732,  -0.44137
+    0xbfecabc169a0b901,     0xbfdc6c7f4997000a,     //  -0.89597,  -0.44412
+    0xbfeca08f19b9c449,     0xbfdc997fc3865388,     //   -0.8946,  -0.44687
+    0xbfec954b213411f5,     0xbfdcc66e9931c45d,     //  -0.89322,  -0.44961
+    0xbfec89f587029c13,     0xbfdcf34baee1cd21,     //  -0.89184,  -0.45235
+    0xbfec7e8e52233cf3,     0xbfdd2016e8e9db5b,     //  -0.89045,  -0.45508
+    0xbfec7315899eaad7,     0xbfdd4cd02ba8609c,     //  -0.88905,  -0.45781
+    0xbfec678b3488739b,     0xbfdd79775b86e389,     //  -0.88764,  -0.46054
+    0xbfec5bef59fef85a,     0xbfdda60c5cfa10d8,     //  -0.88622,  -0.46326
+    0xbfec5042012b6907,     0xbfddd28f1481cc58,     //   -0.8848,  -0.46598
+    0xbfec44833141c004,     0xbfddfeff66a941de,     //  -0.88336,  -0.46869
+    0xbfec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  -0.88192,   -0.4714
+    0xbfec2cd14931e3f1,     0xbfde57a86d3cd824,     //  -0.88047,   -0.4741
+    0xbfec20de3fa971b0,     0xbfde83e0eaf85113,     //  -0.87901,   -0.4768
+    0xbfec14d9dc465e58,     0xbfdeb00695f25620,     //  -0.87755,  -0.47949
+    0xbfec08c426725549,     0xbfdedc1952ef78d5,     //  -0.87607,  -0.48218
+    0xbfebfc9d25a1b147,     0xbfdf081906bff7fd,     //  -0.87459,  -0.48487
+    0xbfebf064e15377dd,     0xbfdf3405963fd068,     //  -0.87309,  -0.48755
+    0xbfebe41b611154c1,     0xbfdf5fdee656cda3,     //   -0.8716,  -0.49023
+    0xbfebd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //  -0.87009,   -0.4929
+    0xbfebcb54cb0d2327,     0xbfdfb7575c24d2de,     //  -0.86857,  -0.49557
+    0xbfebbed7c49380ea,     0xbfdfe2f64be7120f,     //  -0.86705,  -0.49823
+    0xbfebb249a0b6c40d,     0xbfe00740c82b82e0,     //  -0.86551,  -0.50089
+    0xbfeba5aa673590d2,     0xbfe01cfc874c3eb7,     //  -0.86397,  -0.50354
+    0xbfeb98fa1fd9155e,     0xbfe032ae55edbd95,     //  -0.86242,  -0.50619
+    0xbfeb8c38d27504e9,     0xbfe0485626ae221a,     //  -0.86087,  -0.50883
+    0xbfeb7f6686e792ea,     0xbfe05df3ec31b8b6,     //   -0.8593,  -0.51147
+    0xbfeb728345196e3e,     0xbfe073879922ffed,     //  -0.85773,   -0.5141
+    0xbfeb658f14fdbc47,     0xbfe089112032b08c,     //  -0.85615,  -0.51673
+    0xbfeb5889fe921405,     0xbfe09e907417c5e1,     //  -0.85456,  -0.51936
+    0xbfeb4b7409de7925,     0xbfe0b405878f85ec,     //  -0.85296,  -0.52198
+    0xbfeb3e4d3ef55712,     0xbfe0c9704d5d898f,     //  -0.85136,  -0.52459
+    0xbfeb3115a5f37bf4,     0xbfe0ded0b84bc4b5,     //  -0.84974,   -0.5272
+    0xbfeb23cd470013b4,     0xbfe0f426bb2a8e7d,     //  -0.84812,   -0.5298
+    0xbfeb16742a4ca2f5,     0xbfe1097248d0a956,     //  -0.84649,   -0.5324
+    0xbfeb090a58150200,     0xbfe11eb3541b4b22,     //  -0.84485,    -0.535
+    0xbfeafb8fd89f57b6,     0xbfe133e9cfee254e,     //  -0.84321,  -0.53759
+    0xbfeaee04b43c1474,     0xbfe14915af336ceb,     //  -0.84155,  -0.54017
+    0xbfeae068f345ecef,     0xbfe15e36e4dbe2bc,     //  -0.83989,  -0.54275
+    0xbfead2bc9e21d511,     0xbfe1734d63dedb49,     //  -0.83822,  -0.54532
+    0xbfeac4ffbd3efac8,     0xbfe188591f3a46e5,     //  -0.83655,  -0.54789
+    0xbfeab7325916c0d4,     0xbfe19d5a09f2b9b8,     //  -0.83486,  -0.55046
+    0xbfeaa9547a2cb98e,     0xbfe1b250171373be,     //  -0.83317,  -0.55302
+    0xbfea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  -0.83147,  -0.55557
+    0xbfea8d676e545ad2,     0xbfe1dc1b64dc4872,     //  -0.82976,  -0.55812
+    0xbfea7f58529fe69d,     0xbfe1f0f08bbc861b,     //  -0.82805,  -0.56066
+    0xbfea7138de9d60f5,     0xbfe205baa17560d6,     //  -0.82632,   -0.5632
+    0xbfea63091b02fae2,     0xbfe21a799933eb58,     //  -0.82459,  -0.56573
+    0xbfea54c91090f524,     0xbfe22f2d662c13e1,     //  -0.82285,  -0.56826
+    0xbfea4678c8119ac8,     0xbfe243d5fb98ac1f,     //   -0.8211,  -0.57078
+    0xbfea38184a593bc6,     0xbfe258734cbb7110,     //  -0.81935,   -0.5733
+    0xbfea29a7a0462782,     0xbfe26d054cdd12df,     //  -0.81758,  -0.57581
+    0xbfea1b26d2c0a75e,     0xbfe2818bef4d3cba,     //  -0.81581,  -0.57831
+    0xbfea0c95eabaf937,     0xbfe2960727629ca8,     //  -0.81404,  -0.58081
+    0xbfe9fdf4f13149de,     0xbfe2aa76e87aeb58,     //  -0.81225,  -0.58331
+    0xbfe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //  -0.81046,   -0.5858
+    0xbfe9e082edb42472,     0xbfe2d333d34e9bb7,     //  -0.80866,  -0.58828
+    0xbfe9d1b1f5ea80d6,     0xbfe2e780e3e8ea16,     //  -0.80685,  -0.59076
+    0xbfe9c2d110f075c3,     0xbfe2fbc24b441015,     //  -0.80503,  -0.59323
+    0xbfe9b3e047f38741,     0xbfe30ff7fce17035,     //  -0.80321,   -0.5957
+    0xbfe9a4dfa42b06b2,     0xbfe32421ec49a620,     //  -0.80138,  -0.59816
+    0xbfe995cf2ed80d22,     0xbfe338400d0c8e57,     //  -0.79954,  -0.60062
+    0xbfe986aef1457594,     0xbfe34c5252c14de1,     //  -0.79769,  -0.60307
+    0xbfe9777ef4c7d742,     0xbfe36058b10659f3,     //  -0.79584,  -0.60551
+    0xbfe9683f42bd7fe1,     0xbfe374531b817f8d,     //  -0.79398,  -0.60795
+    0xbfe958efe48e6dd7,     0xbfe3884185dfeb22,     //  -0.79211,  -0.61038
+    0xbfe94990e3ac4a6c,     0xbfe39c23e3d63029,     //  -0.79023,  -0.61281
+    0xbfe93a22499263fc,     0xbfe3affa292050b9,     //  -0.78835,  -0.61523
+    0xbfe92aa41fc5a815,     0xbfe3c3c44981c517,     //  -0.78646,  -0.61765
+    0xbfe91b166fd49da2,     0xbfe3d78238c58343,     //  -0.78456,  -0.62006
+    0xbfe90b7943575efe,     0xbfe3eb33eabe0680,     //  -0.78265,  -0.62246
+    0xbfe8fbcca3ef940d,     0xbfe3fed9534556d4,     //  -0.78074,  -0.62486
+    0xbfe8ec109b486c49,     0xbfe41272663d108c,     //  -0.77882,  -0.62725
+    0xbfe8dc45331698cc,     0xbfe425ff178e6bb1,     //  -0.77689,  -0.62964
+    0xbfe8cc6a75184655,     0xbfe4397f5b2a4380,     //  -0.77495,  -0.63202
+    0xbfe8bc806b151741,     0xbfe44cf325091dd6,     //  -0.77301,  -0.63439
+    0xbfe8ac871ede1d88,     0xbfe4605a692b32a2,     //  -0.77106,  -0.63676
+    0xbfe89c7e9a4dd4ab,     0xbfe473b51b987347,     //   -0.7691,  -0.63912
+    0xbfe88c66e7481ba1,     0xbfe48703306091fe,     //  -0.76714,  -0.64148
+    0xbfe87c400fba2ebf,     0xbfe49a449b9b0938,     //  -0.76517,  -0.64383
+    0xbfe86c0a1d9aa195,     0xbfe4ad79516722f0,     //  -0.76319,  -0.64618
+    0xbfe85bc51ae958cc,     0xbfe4c0a145ec0004,     //   -0.7612,  -0.64851
+    0xbfe84b7111af83f9,     0xbfe4d3bc6d589f80,     //  -0.75921,  -0.65085
+    0xbfe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //  -0.75721,  -0.65317
+    0xbfe82a9c13f545ff,     0xbfe4f9cc25cca486,     //   -0.7552,  -0.65549
+    0xbfe81a1b33b57acc,     0xbfe50cc09f59a09b,     //  -0.75319,  -0.65781
+    0xbfe8098b756e52fa,     0xbfe51fa81cd99aa6,     //  -0.75117,  -0.66011
+    0xbfe7f8ece3571771,     0xbfe5328292a35596,     //  -0.74914,  -0.66242
+    0xbfe7e83f87b03686,     0xbfe5454ff5159dfb,     //   -0.7471,  -0.66471
+    0xbfe7d7836cc33db2,     0xbfe5581038975137,     //  -0.74506,    -0.667
+    0xbfe7c6b89ce2d333,     0xbfe56ac35197649e,     //  -0.74301,  -0.66928
+    0xbfe7b5df226aafb0,     0xbfe57d69348cec9f,     //  -0.74095,  -0.67156
+    0xbfe7a4f707bf97d2,     0xbfe59001d5f723df,     //  -0.73889,  -0.67383
+    0xbfe79400574f55e4,     0xbfe5a28d2a5d7250,     //  -0.73682,  -0.67609
+    0xbfe782fb1b90b35b,     0xbfe5b50b264f7448,     //  -0.73474,  -0.67835
+    0xbfe771e75f037261,     0xbfe5c77bbe65018c,     //  -0.73265,   -0.6806
+    0xbfe760c52c304764,     0xbfe5d9dee73e345c,     //  -0.73056,  -0.68285
+    0xbfe74f948da8d28d,     0xbfe5ec3495837074,     //  -0.72846,  -0.68508
+    0xbfe73e558e079942,     0xbfe5fe7cbde56a0f,     //  -0.72636,  -0.68732
+    0xbfe72d0837efff97,     0xbfe610b7551d2cde,     //  -0.72425,  -0.68954
+    0xbfe71bac960e41bf,     0xbfe622e44fec22ff,     //  -0.72213,  -0.69176
+    0xbfe70a42b3176d7a,     0xbfe63503a31c1be8,     //     -0.72,  -0.69397
+    0xbfe6f8ca99c95b75,     0xbfe64715437f535b,     //  -0.71787,  -0.69618
+    0xbfe6e74454eaa8ae,     0xbfe6591925f0783e,     //  -0.71573,  -0.69838
+    0xbfe6d5afef4aafcc,     0xbfe66b0f3f52b386,     //  -0.71358,  -0.70057
+    0xbfe6c40d73c18275,     0xbfe67cf78491af10,     //  -0.71143,  -0.70275
+    0xbfe6b25ced2fe29c,     0xbfe68ed1eaa19c71,     //  -0.70927,  -0.70493
+    0xbfe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  -0.70711,  -0.70711
+    0xbfe68ed1eaa19c71,     0xbfe6b25ced2fe29c,     //  -0.70493,  -0.70927
+    0xbfe67cf78491af10,     0xbfe6c40d73c18275,     //  -0.70275,  -0.71143
+    0xbfe66b0f3f52b386,     0xbfe6d5afef4aafcc,     //  -0.70057,  -0.71358
+    0xbfe6591925f0783e,     0xbfe6e74454eaa8ae,     //  -0.69838,  -0.71573
+    0xbfe64715437f535b,     0xbfe6f8ca99c95b75,     //  -0.69618,  -0.71787
+    0xbfe63503a31c1be8,     0xbfe70a42b3176d7a,     //  -0.69397,     -0.72
+    0xbfe622e44fec22ff,     0xbfe71bac960e41bf,     //  -0.69176,  -0.72213
+    0xbfe610b7551d2cde,     0xbfe72d0837efff97,     //  -0.68954,  -0.72425
+    0xbfe5fe7cbde56a0f,     0xbfe73e558e079942,     //  -0.68732,  -0.72636
+    0xbfe5ec3495837074,     0xbfe74f948da8d28d,     //  -0.68508,  -0.72846
+    0xbfe5d9dee73e345c,     0xbfe760c52c304764,     //  -0.68285,  -0.73056
+    0xbfe5c77bbe65018c,     0xbfe771e75f037261,     //   -0.6806,  -0.73265
+    0xbfe5b50b264f7448,     0xbfe782fb1b90b35b,     //  -0.67835,  -0.73474
+    0xbfe5a28d2a5d7250,     0xbfe79400574f55e4,     //  -0.67609,  -0.73682
+    0xbfe59001d5f723df,     0xbfe7a4f707bf97d2,     //  -0.67383,  -0.73889
+    0xbfe57d69348cec9f,     0xbfe7b5df226aafb0,     //  -0.67156,  -0.74095
+    0xbfe56ac35197649e,     0xbfe7c6b89ce2d333,     //  -0.66928,  -0.74301
+    0xbfe5581038975137,     0xbfe7d7836cc33db2,     //    -0.667,  -0.74506
+    0xbfe5454ff5159dfb,     0xbfe7e83f87b03686,     //  -0.66471,   -0.7471
+    0xbfe5328292a35596,     0xbfe7f8ece3571771,     //  -0.66242,  -0.74914
+    0xbfe51fa81cd99aa6,     0xbfe8098b756e52fa,     //  -0.66011,  -0.75117
+    0xbfe50cc09f59a09b,     0xbfe81a1b33b57acc,     //  -0.65781,  -0.75319
+    0xbfe4f9cc25cca486,     0xbfe82a9c13f545ff,     //  -0.65549,   -0.7552
+    0xbfe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //  -0.65317,  -0.75721
+    0xbfe4d3bc6d589f80,     0xbfe84b7111af83f9,     //  -0.65085,  -0.75921
+    0xbfe4c0a145ec0004,     0xbfe85bc51ae958cc,     //  -0.64851,   -0.7612
+    0xbfe4ad79516722f0,     0xbfe86c0a1d9aa195,     //  -0.64618,  -0.76319
+    0xbfe49a449b9b0938,     0xbfe87c400fba2ebf,     //  -0.64383,  -0.76517
+    0xbfe48703306091fe,     0xbfe88c66e7481ba1,     //  -0.64148,  -0.76714
+    0xbfe473b51b987347,     0xbfe89c7e9a4dd4ab,     //  -0.63912,   -0.7691
+    0xbfe4605a692b32a2,     0xbfe8ac871ede1d88,     //  -0.63676,  -0.77106
+    0xbfe44cf325091dd6,     0xbfe8bc806b151741,     //  -0.63439,  -0.77301
+    0xbfe4397f5b2a4380,     0xbfe8cc6a75184655,     //  -0.63202,  -0.77495
+    0xbfe425ff178e6bb1,     0xbfe8dc45331698cc,     //  -0.62964,  -0.77689
+    0xbfe41272663d108c,     0xbfe8ec109b486c49,     //  -0.62725,  -0.77882
+    0xbfe3fed9534556d4,     0xbfe8fbcca3ef940d,     //  -0.62486,  -0.78074
+    0xbfe3eb33eabe0680,     0xbfe90b7943575efe,     //  -0.62246,  -0.78265
+    0xbfe3d78238c58343,     0xbfe91b166fd49da2,     //  -0.62006,  -0.78456
+    0xbfe3c3c44981c517,     0xbfe92aa41fc5a815,     //  -0.61765,  -0.78646
+    0xbfe3affa292050b9,     0xbfe93a22499263fc,     //  -0.61523,  -0.78835
+    0xbfe39c23e3d63029,     0xbfe94990e3ac4a6c,     //  -0.61281,  -0.79023
+    0xbfe3884185dfeb22,     0xbfe958efe48e6dd7,     //  -0.61038,  -0.79211
+    0xbfe374531b817f8d,     0xbfe9683f42bd7fe1,     //  -0.60795,  -0.79398
+    0xbfe36058b10659f3,     0xbfe9777ef4c7d742,     //  -0.60551,  -0.79584
+    0xbfe34c5252c14de1,     0xbfe986aef1457594,     //  -0.60307,  -0.79769
+    0xbfe338400d0c8e57,     0xbfe995cf2ed80d22,     //  -0.60062,  -0.79954
+    0xbfe32421ec49a620,     0xbfe9a4dfa42b06b2,     //  -0.59816,  -0.80138
+    0xbfe30ff7fce17035,     0xbfe9b3e047f38741,     //   -0.5957,  -0.80321
+    0xbfe2fbc24b441015,     0xbfe9c2d110f075c3,     //  -0.59323,  -0.80503
+    0xbfe2e780e3e8ea16,     0xbfe9d1b1f5ea80d6,     //  -0.59076,  -0.80685
+    0xbfe2d333d34e9bb7,     0xbfe9e082edb42472,     //  -0.58828,  -0.80866
+    0xbfe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //   -0.5858,  -0.81046
+    0xbfe2aa76e87aeb58,     0xbfe9fdf4f13149de,     //  -0.58331,  -0.81225
+    0xbfe2960727629ca8,     0xbfea0c95eabaf937,     //  -0.58081,  -0.81404
+    0xbfe2818bef4d3cba,     0xbfea1b26d2c0a75e,     //  -0.57831,  -0.81581
+    0xbfe26d054cdd12df,     0xbfea29a7a0462782,     //  -0.57581,  -0.81758
+    0xbfe258734cbb7110,     0xbfea38184a593bc6,     //   -0.5733,  -0.81935
+    0xbfe243d5fb98ac1f,     0xbfea4678c8119ac8,     //  -0.57078,   -0.8211
+    0xbfe22f2d662c13e1,     0xbfea54c91090f524,     //  -0.56826,  -0.82285
+    0xbfe21a799933eb58,     0xbfea63091b02fae2,     //  -0.56573,  -0.82459
+    0xbfe205baa17560d6,     0xbfea7138de9d60f5,     //   -0.5632,  -0.82632
+    0xbfe1f0f08bbc861b,     0xbfea7f58529fe69d,     //  -0.56066,  -0.82805
+    0xbfe1dc1b64dc4872,     0xbfea8d676e545ad2,     //  -0.55812,  -0.82976
+    0xbfe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  -0.55557,  -0.83147
+    0xbfe1b250171373be,     0xbfeaa9547a2cb98e,     //  -0.55302,  -0.83317
+    0xbfe19d5a09f2b9b8,     0xbfeab7325916c0d4,     //  -0.55046,  -0.83486
+    0xbfe188591f3a46e5,     0xbfeac4ffbd3efac8,     //  -0.54789,  -0.83655
+    0xbfe1734d63dedb49,     0xbfead2bc9e21d511,     //  -0.54532,  -0.83822
+    0xbfe15e36e4dbe2bc,     0xbfeae068f345ecef,     //  -0.54275,  -0.83989
+    0xbfe14915af336ceb,     0xbfeaee04b43c1474,     //  -0.54017,  -0.84155
+    0xbfe133e9cfee254e,     0xbfeafb8fd89f57b6,     //  -0.53759,  -0.84321
+    0xbfe11eb3541b4b22,     0xbfeb090a58150200,     //    -0.535,  -0.84485
+    0xbfe1097248d0a956,     0xbfeb16742a4ca2f5,     //   -0.5324,  -0.84649
+    0xbfe0f426bb2a8e7d,     0xbfeb23cd470013b4,     //   -0.5298,  -0.84812
+    0xbfe0ded0b84bc4b5,     0xbfeb3115a5f37bf4,     //   -0.5272,  -0.84974
+    0xbfe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //  -0.52459,  -0.85136
+    0xbfe0b405878f85ec,     0xbfeb4b7409de7925,     //  -0.52198,  -0.85296
+    0xbfe09e907417c5e1,     0xbfeb5889fe921405,     //  -0.51936,  -0.85456
+    0xbfe089112032b08c,     0xbfeb658f14fdbc47,     //  -0.51673,  -0.85615
+    0xbfe073879922ffed,     0xbfeb728345196e3e,     //   -0.5141,  -0.85773
+    0xbfe05df3ec31b8b6,     0xbfeb7f6686e792ea,     //  -0.51147,   -0.8593
+    0xbfe0485626ae221a,     0xbfeb8c38d27504e9,     //  -0.50883,  -0.86087
+    0xbfe032ae55edbd95,     0xbfeb98fa1fd9155e,     //  -0.50619,  -0.86242
+    0xbfe01cfc874c3eb7,     0xbfeba5aa673590d2,     //  -0.50354,  -0.86397
+    0xbfe00740c82b82e0,     0xbfebb249a0b6c40d,     //  -0.50089,  -0.86551
+    0xbfdfe2f64be7120f,     0xbfebbed7c49380ea,     //  -0.49823,  -0.86705
+    0xbfdfb7575c24d2de,     0xbfebcb54cb0d2327,     //  -0.49557,  -0.86857
+    0xbfdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //   -0.4929,  -0.87009
+    0xbfdf5fdee656cda3,     0xbfebe41b611154c1,     //  -0.49023,   -0.8716
+    0xbfdf3405963fd068,     0xbfebf064e15377dd,     //  -0.48755,  -0.87309
+    0xbfdf081906bff7fd,     0xbfebfc9d25a1b147,     //  -0.48487,  -0.87459
+    0xbfdedc1952ef78d5,     0xbfec08c426725549,     //  -0.48218,  -0.87607
+    0xbfdeb00695f25620,     0xbfec14d9dc465e58,     //  -0.47949,  -0.87755
+    0xbfde83e0eaf85113,     0xbfec20de3fa971b0,     //   -0.4768,  -0.87901
+    0xbfde57a86d3cd824,     0xbfec2cd14931e3f1,     //   -0.4741,  -0.88047
+    0xbfde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   -0.4714,  -0.88192
+    0xbfddfeff66a941de,     0xbfec44833141c004,     //  -0.46869,  -0.88336
+    0xbfddd28f1481cc58,     0xbfec5042012b6907,     //  -0.46598,   -0.8848
+    0xbfdda60c5cfa10d8,     0xbfec5bef59fef85a,     //  -0.46326,  -0.88622
+    0xbfdd79775b86e389,     0xbfec678b3488739b,     //  -0.46054,  -0.88764
+    0xbfdd4cd02ba8609c,     0xbfec7315899eaad7,     //  -0.45781,  -0.88905
+    0xbfdd2016e8e9db5b,     0xbfec7e8e52233cf3,     //  -0.45508,  -0.89045
+    0xbfdcf34baee1cd21,     0xbfec89f587029c13,     //  -0.45235,  -0.89184
+    0xbfdcc66e9931c45d,     0xbfec954b213411f5,     //  -0.44961,  -0.89322
+    0xbfdc997fc3865388,     0xbfeca08f19b9c449,     //  -0.44687,   -0.8946
+    0xbfdc6c7f4997000a,     0xbfecabc169a0b901,     //  -0.44412,  -0.89597
+    0xbfdc3f6d47263129,     0xbfecb6e20a00da99,     //  -0.44137,  -0.89732
+    0xbfdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //  -0.43862,  -0.89867
+    0xbfdbe51517ffc0d9,     0xbfecccee20c2de9f,     //  -0.43586,  -0.90002
+    0xbfdbb7cf2304bd01,     0xbfecd7d9898b32f6,     //  -0.43309,  -0.90135
+    0xbfdb8a7814fd5693,     0xbfece2b32799a060,     //  -0.43033,  -0.90267
+    0xbfdb5d1009e15cc0,     0xbfeced7af43cc773,     //  -0.42756,  -0.90399
+    0xbfdb2f971db31972,     0xbfecf830e8ce467b,     //  -0.42478,   -0.9053
+    0xbfdb020d6c7f4009,     0xbfed02d4feb2bd92,     //    -0.422,   -0.9066
+    0xbfdad473125cdc08,     0xbfed0d672f59d2b9,     //  -0.41922,  -0.90789
+    0xbfdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //  -0.41643,  -0.90917
+    0xbfda790cd3dbf31a,     0xbfed2255c6e5a4e1,     //  -0.41364,  -0.91044
+    0xbfda4b4127dea1e4,     0xbfed2cb220e0ef9f,     //  -0.41084,  -0.91171
+    0xbfda1d6543b50ac0,     0xbfed36fc7bcbfbdc,     //  -0.40804,  -0.91296
+    0xbfd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //  -0.40524,  -0.91421
+    0xbfd9c17d440df9f2,     0xbfed4b5b1b187524,     //  -0.40243,  -0.91545
+    0xbfd993716141bdfe,     0xbfed556f52e93eb1,     //  -0.39962,  -0.91668
+    0xbfd96555b7ab948f,     0xbfed5f7172888a7f,     //  -0.39681,   -0.9179
+    0xbfd9372a63bc93d7,     0xbfed696173c9e68b,     //  -0.39399,  -0.91911
+    0xbfd908ef81ef7bd1,     0xbfed733f508c0dff,     //  -0.39117,  -0.92032
+    0xbfd8daa52ec8a4af,     0xbfed7d0b02b8ecf9,     //  -0.38835,  -0.92151
+    0xbfd8ac4b86d5ed44,     0xbfed86c48445a450,     //  -0.38552,   -0.9227
+    0xbfd87de2a6aea963,     0xbfed906bcf328d46,     //  -0.38268,  -0.92388
+    0xbfd84f6aaaf3903f,     0xbfed9a00dd8b3d46,     //  -0.37985,  -0.92505
+    0xbfd820e3b04eaac4,     0xbfeda383a9668988,     //  -0.37701,  -0.92621
+    0xbfd7f24dd37341e3,     0xbfedacf42ce68ab9,     //  -0.37416,  -0.92736
+    0xbfd7c3a9311dcce7,     0xbfedb6526238a09b,     //  -0.37132,  -0.92851
+    0xbfd794f5e613dfae,     0xbfedbf9e4395759a,     //  -0.36847,  -0.92964
+    0xbfd766340f2418f6,     0xbfedc8d7cb410260,     //  -0.36561,  -0.93077
+    0xbfd73763c9261092,     0xbfedd1fef38a915a,     //  -0.36276,  -0.93188
+    0xbfd7088530fa459e,     0xbfeddb13b6ccc23d,     //   -0.3599,  -0.93299
+    0xbfd6d998638a0cb5,     0xbfede4160f6d8d81,     //  -0.35703,  -0.93409
+    0xbfd6aa9d7dc77e16,     0xbfeded05f7de47da,     //  -0.35416,  -0.93518
+    0xbfd67b949cad63ca,     0xbfedf5e36a9ba59c,     //  -0.35129,  -0.93627
+    0xbfd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //  -0.34842,  -0.93734
+    0xbfd61d595c88c203,     0xbfee0766d9280f54,     //  -0.34554,   -0.9384
+    0xbfd5ee27379ea693,     0xbfee100cca2980ac,     //  -0.34266,  -0.93946
+    0xbfd5bee78b9db3b6,     0xbfee18a02fdc66d9,     //  -0.33978,  -0.94051
+    0xbfd58f9a75ab1fdd,     0xbfee212104f686e5,     //  -0.33689,  -0.94154
+    0xbfd5604012f467b4,     0xbfee298f4439197a,     //    -0.334,  -0.94257
+    0xbfd530d880af3c24,     0xbfee31eae870ce25,     //  -0.33111,  -0.94359
+    0xbfd50163dc197047,     0xbfee3a33ec75ce85,     //  -0.32821,   -0.9446
+    0xbfd4d1e24278e76a,     0xbfee426a4b2bc17e,     //  -0.32531,  -0.94561
+    0xbfd4a253d11b82f3,     0xbfee4a8dff81ce5e,     //  -0.32241,   -0.9466
+    0xbfd472b8a5571054,     0xbfee529f04729ffc,     //   -0.3195,  -0.94759
+    0xbfd44310dc8936f0,     0xbfee5a9d550467d3,     //  -0.31659,  -0.94856
+    0xbfd4135c94176602,     0xbfee6288ec48e112,     //  -0.31368,  -0.94953
+    0xbfd3e39be96ec271,     0xbfee6a61c55d53a7,     //  -0.31077,  -0.95049
+    0xbfd3b3cefa0414b7,     0xbfee7227db6a9744,     //  -0.30785,  -0.95144
+    0xbfd383f5e353b6aa,     0xbfee79db29a5165a,     //  -0.30493,  -0.95238
+    0xbfd35410c2e18152,     0xbfee817bab4cd10d,     //  -0.30201,  -0.95331
+    0xbfd3241fb638baaf,     0xbfee89095bad6025,     //  -0.29908,  -0.95423
+    0xbfd2f422daec0386,     0xbfee9084361df7f3,     //  -0.29615,  -0.95514
+    0xbfd2c41a4e954520,     0xbfee97ec36016b30,     //  -0.29322,  -0.95605
+    0xbfd294062ed59f05,     0xbfee9f4156c62dda,     //  -0.29028,  -0.95694
+    0xbfd263e6995554ba,     0xbfeea68393e65800,     //  -0.28735,  -0.95783
+    0xbfd233bbabc3bb72,     0xbfeeadb2e8e7a88e,     //  -0.28441,   -0.9587
+    0xbfd2038583d727bd,     0xbfeeb4cf515b8811,     //  -0.28146,  -0.95957
+    0xbfd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //  -0.27852,  -0.96043
+    0xbfd1a2f7fbe8f243,     0xbfeec2cf4b1af6b2,     //  -0.27557,  -0.96128
+    0xbfd172a0d7765177,     0xbfeec9b2d3c3bf84,     //  -0.27262,  -0.96212
+    0xbfd1423eefc69378,     0xbfeed0835e999009,     //  -0.26967,  -0.96295
+    0xbfd111d262b1f677,     0xbfeed740e7684963,     //  -0.26671,  -0.96378
+    0xbfd0e15b4e1749cd,     0xbfeeddeb6a078651,     //  -0.26375,  -0.96459
+    0xbfd0b0d9cfdbdb90,     0xbfeee482e25a9dbc,     //  -0.26079,  -0.96539
+    0xbfd0804e05eb661e,     0xbfeeeb074c50a544,     //  -0.25783,  -0.96619
+    0xbfd04fb80e37fdae,     0xbfeef178a3e473c2,     //  -0.25487,  -0.96698
+    0xbfd01f1806b9fdd2,     0xbfeef7d6e51ca3c0,     //   -0.2519,  -0.96775
+    0xbfcfdcdc1adfedf8,     0xbfeefe220c0b95ec,     //  -0.24893,  -0.96852
+    0xbfcf7b7480bd3801,     0xbfef045a14cf738c,     //  -0.24596,  -0.96928
+    0xbfcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  -0.24298,  -0.97003
+    0xbfceb86b462de348,     0xbfef1090bc898f5f,     //     -0.24,  -0.97077
+    0xbfce56ca1e101a1b,     0xbfef168f53f7205d,     //  -0.23702,   -0.9715
+    0xbfcdf5163f01099a,     0xbfef1c7abe284708,     //  -0.23404,  -0.97223
+    0xbfcd934fe5454311,     0xbfef2252f7763ada,     //  -0.23106,  -0.97294
+    0xbfcd31774d2cbdee,     0xbfef2817fc4609ce,     //  -0.22807,  -0.97364
+    0xbfcccf8cb312b286,     0xbfef2dc9c9089a9d,     //  -0.22508,  -0.97434
+    0xbfcc6d90535d74dc,     0xbfef33685a3aaef0,     //  -0.22209,  -0.97503
+    0xbfcc0b826a7e4f63,     0xbfef38f3ac64e589,     //   -0.2191,   -0.9757
+    0xbfcba96334f15dad,     0xbfef3e6bbc1bbc65,     //  -0.21611,  -0.97637
+    0xbfcb4732ef3d6722,     0xbfef43d085ff92dd,     //  -0.21311,  -0.97703
+    0xbfcae4f1d5f3b9ab,     0xbfef492206bcabb4,     //  -0.21011,  -0.97768
+    0xbfca82a025b00451,     0xbfef4e603b0b2f2d,     //  -0.20711,  -0.97832
+    0xbfca203e1b1831da,     0xbfef538b1faf2d07,     //  -0.20411,  -0.97895
+    0xbfc9bdcbf2dc4366,     0xbfef58a2b1789e84,     //   -0.2011,  -0.97957
+    0xbfc95b49e9b62af9,     0xbfef5da6ed43685d,     //   -0.1981,  -0.98018
+    0xbfc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  -0.19509,  -0.98079
+    0xbfc8961727c41804,     0xbfef677556883cee,     //  -0.19208,  -0.98138
+    0xbfc83366e89c64c5,     0xbfef6c3f7df5bbb7,     //  -0.18907,  -0.98196
+    0xbfc7d0a7bbd2cb1b,     0xbfef70f6434b7eb7,     //  -0.18606,  -0.98254
+    0xbfc76dd9de50bf31,     0xbfef7599a3a12077,     //  -0.18304,  -0.98311
+    0xbfc70afd8d08c4ff,     0xbfef7a299c1a322a,     //  -0.18002,  -0.98366
+    0xbfc6a81304f64ab2,     0xbfef7ea629e63d6e,     //    -0.177,  -0.98421
+    0xbfc6451a831d830d,     0xbfef830f4a40c60c,     //  -0.17398,  -0.98475
+    0xbfc5e214448b3fc6,     0xbfef8764fa714ba9,     //  -0.17096,  -0.98528
+    0xbfc57f008654cbde,     0xbfef8ba737cb4b78,     //  -0.16794,   -0.9858
+    0xbfc51bdf8597c5f2,     0xbfef8fd5ffae41db,     //  -0.16491,  -0.98631
+    0xbfc4b8b17f79fa88,     0xbfef93f14f85ac08,     //  -0.16189,  -0.98681
+    0xbfc45576b1293e5a,     0xbfef97f924c9099b,     //  -0.15886,   -0.9873
+    0xbfc3f22f57db4893,     0xbfef9bed7cfbde29,     //  -0.15583,  -0.98778
+    0xbfc38edbb0cd8d14,     0xbfef9fce55adb2c8,     //   -0.1528,  -0.98826
+    0xbfc32b7bf94516a7,     0xbfefa39bac7a1791,     //  -0.14976,  -0.98872
+    0xbfc2c8106e8e613a,     0xbfefa7557f08a517,     //  -0.14673,  -0.98918
+    0xbfc264994dfd340a,     0xbfefaafbcb0cfddc,     //   -0.1437,  -0.98962
+    0xbfc20116d4ec7bce,     0xbfefae8e8e46cfbb,     //  -0.14066,  -0.99006
+    0xbfc19d8940be24e7,     0xbfefb20dc681d54d,     //  -0.13762,  -0.99049
+    0xbfc139f0cedaf576,     0xbfefb5797195d741,     //  -0.13458,   -0.9909
+    0xbfc0d64dbcb26786,     0xbfefb8d18d66adb7,     //  -0.13154,  -0.99131
+    0xbfc072a047ba831d,     0xbfefbc1617e44186,     //   -0.1285,  -0.99171
+    0xbfc00ee8ad6fb85b,     0xbfefbf470f0a8d88,     //  -0.12545,   -0.9921
+    0xbfbf564e56a9730e,     0xbfefc26470e19fd3,     //  -0.12241,  -0.99248
+    0xbfbe8eb7fde4aa3e,     0xbfefc56e3b7d9af6,     //  -0.11937,  -0.99285
+    0xbfbdc70ecbae9fc8,     0xbfefc8646cfeb721,     //  -0.11632,  -0.99321
+    0xbfbcff533b307dc1,     0xbfefcb4703914354,     //  -0.11327,  -0.99356
+    0xbfbc3785c79ec2d5,     0xbfefce15fd6da67b,     //  -0.11022,  -0.99391
+    0xbfbb6fa6ec38f64c,     0xbfefd0d158d86087,     //  -0.10717,  -0.99424
+    0xbfbaa7b724495c04,     0xbfefd37914220b84,     //  -0.10412,  -0.99456
+    0xbfb9dfb6eb24a85c,     0xbfefd60d2da75c9e,     //  -0.10107,  -0.99488
+    0xbfb917a6bc29b42c,     0xbfefd88da3d12526,     // -0.098017,  -0.99518
+    0xbfb84f8712c130a0,     0xbfefdafa7514538c,     // -0.094963,  -0.99548
+    0xbfb787586a5d5b21,     0xbfefdd539ff1f456,     // -0.091909,  -0.99577
+    0xbfb6bf1b3e79b129,     0xbfefdf9922f73307,     // -0.088854,  -0.99604
+    0xbfb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     // -0.085797,  -0.99631
+    0xbfb52e774a4d4d0a,     0xbfefe3e92be9d886,     //  -0.08274,  -0.99657
+    0xbfb4661179272096,     0xbfefe5f3af2e3940,     // -0.079682,  -0.99682
+    0xbfb39d9f12c5a299,     0xbfefe7ea85482d60,     // -0.076624,  -0.99706
+    0xbfb2d52092ce19f6,     0xbfefe9cdad01883a,     // -0.073565,  -0.99729
+    0xbfb20c9674ed444c,     0xbfefeb9d2530410f,     // -0.070505,  -0.99751
+    0xbfb1440134d709b2,     0xbfefed58ecb673c4,     // -0.067444,  -0.99772
+    0xbfb07b614e463064,     0xbfefef0102826191,     // -0.064383,  -0.99793
+    0xbfaf656e79f820e0,     0xbfeff095658e71ad,     // -0.061321,  -0.99812
+    0xbfadd406f9808ec8,     0xbfeff21614e131ed,     // -0.058258,   -0.9983
+    0xbfac428d12c0d7e3,     0xbfeff3830f8d575c,     // -0.055195,  -0.99848
+    0xbfaab101bd5f8317,     0xbfeff4dc54b1bed3,     // -0.052132,  -0.99864
+    0xbfa91f65f10dd814,     0xbfeff621e3796d7e,     // -0.049068,   -0.9988
+    0xbfa78dbaa5874685,     0xbfeff753bb1b9164,     // -0.046003,  -0.99894
+    0xbfa5fc00d290cd43,     0xbfeff871dadb81df,     // -0.042938,  -0.99908
+    0xbfa46a396ff86179,     0xbfeff97c4208c014,     // -0.039873,   -0.9992
+    0xbfa2d865759455cd,     0xbfeffa72effef75d,     // -0.036807,  -0.99932
+    0xbfa14685db42c17e,     0xbfeffb55e425fdae,     // -0.033741,  -0.99943
+    0xbf9f693731d1cf01,     0xbfeffc251df1d3f8,     // -0.030675,  -0.99953
+    0xbf9c454f4ce53b1c,     0xbfeffce09ce2a679,     // -0.027608,  -0.99962
+    0xbf992155f7a3667e,     0xbfeffd886084cd0d,     // -0.024541,   -0.9997
+    0xbf95fd4d21fab226,     0xbfeffe1c6870cb77,     // -0.021474,  -0.99977
+    0xbf92d936bbe30efd,     0xbfeffe9cb44b51a1,     // -0.018407,  -0.99983
+    0xbf8f6a296ab997ca,     0xbfefff0943c53bd1,     // -0.015339,  -0.99988
+    0xbf8921d1fcdec784,     0xbfefff62169b92db,     // -0.012272,  -0.99992
+    0xbf82d96b0e509703,     0xbfefffa72c978c4f,     //-0.0092038,  -0.99996
+    0xbf7921f0fe670071,     0xbfefffd8858e8a92,     //-0.0061359,  -0.99998
+    0xbf6921f8becca4ba,     0xbfeffff621621d02,     // -0.003068,        -1
+    0x0000000000000000,     0xbff0000000000000,     //         0,        -1
+    0x3f6921f8becca4ba,     0xbfeffff621621d02,     //  0.003068,        -1
+    0x3f7921f0fe670071,     0xbfefffd8858e8a92,     // 0.0061359,  -0.99998
+    0x3f82d96b0e509703,     0xbfefffa72c978c4f,     // 0.0092038,  -0.99996
+    0x3f8921d1fcdec784,     0xbfefff62169b92db,     //  0.012272,  -0.99992
+    0x3f8f6a296ab997ca,     0xbfefff0943c53bd1,     //  0.015339,  -0.99988
+    0x3f92d936bbe30efd,     0xbfeffe9cb44b51a1,     //  0.018407,  -0.99983
+    0x3f95fd4d21fab226,     0xbfeffe1c6870cb77,     //  0.021474,  -0.99977
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     //  0.024541,   -0.9997
+    0x3f9c454f4ce53b1c,     0xbfeffce09ce2a679,     //  0.027608,  -0.99962
+    0x3f9f693731d1cf01,     0xbfeffc251df1d3f8,     //  0.030675,  -0.99953
+    0x3fa14685db42c17e,     0xbfeffb55e425fdae,     //  0.033741,  -0.99943
+    0x3fa2d865759455cd,     0xbfeffa72effef75d,     //  0.036807,  -0.99932
+    0x3fa46a396ff86179,     0xbfeff97c4208c014,     //  0.039873,   -0.9992
+    0x3fa5fc00d290cd43,     0xbfeff871dadb81df,     //  0.042938,  -0.99908
+    0x3fa78dbaa5874685,     0xbfeff753bb1b9164,     //  0.046003,  -0.99894
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     //  0.049068,   -0.9988
+    0x3faab101bd5f8317,     0xbfeff4dc54b1bed3,     //  0.052132,  -0.99864
+    0x3fac428d12c0d7e3,     0xbfeff3830f8d575c,     //  0.055195,  -0.99848
+    0x3fadd406f9808ec8,     0xbfeff21614e131ed,     //  0.058258,   -0.9983
+    0x3faf656e79f820e0,     0xbfeff095658e71ad,     //  0.061321,  -0.99812
+    0x3fb07b614e463064,     0xbfefef0102826191,     //  0.064383,  -0.99793
+    0x3fb1440134d709b2,     0xbfefed58ecb673c4,     //  0.067444,  -0.99772
+    0x3fb20c9674ed444c,     0xbfefeb9d2530410f,     //  0.070505,  -0.99751
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     //  0.073565,  -0.99729
+    0x3fb39d9f12c5a299,     0xbfefe7ea85482d60,     //  0.076624,  -0.99706
+    0x3fb4661179272096,     0xbfefe5f3af2e3940,     //  0.079682,  -0.99682
+    0x3fb52e774a4d4d0a,     0xbfefe3e92be9d886,     //   0.08274,  -0.99657
+    0x3fb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     //  0.085797,  -0.99631
+    0x3fb6bf1b3e79b129,     0xbfefdf9922f73307,     //  0.088854,  -0.99604
+    0x3fb787586a5d5b21,     0xbfefdd539ff1f456,     //  0.091909,  -0.99577
+    0x3fb84f8712c130a0,     0xbfefdafa7514538c,     //  0.094963,  -0.99548
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     //  0.098017,  -0.99518
+    0x3fb9dfb6eb24a85c,     0xbfefd60d2da75c9e,     //   0.10107,  -0.99488
+    0x3fbaa7b724495c04,     0xbfefd37914220b84,     //   0.10412,  -0.99456
+    0x3fbb6fa6ec38f64c,     0xbfefd0d158d86087,     //   0.10717,  -0.99424
+    0x3fbc3785c79ec2d5,     0xbfefce15fd6da67b,     //   0.11022,  -0.99391
+    0x3fbcff533b307dc1,     0xbfefcb4703914354,     //   0.11327,  -0.99356
+    0x3fbdc70ecbae9fc8,     0xbfefc8646cfeb721,     //   0.11632,  -0.99321
+    0x3fbe8eb7fde4aa3e,     0xbfefc56e3b7d9af6,     //   0.11937,  -0.99285
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     //   0.12241,  -0.99248
+    0x3fc00ee8ad6fb85b,     0xbfefbf470f0a8d88,     //   0.12545,   -0.9921
+    0x3fc072a047ba831d,     0xbfefbc1617e44186,     //    0.1285,  -0.99171
+    0x3fc0d64dbcb26786,     0xbfefb8d18d66adb7,     //   0.13154,  -0.99131
+    0x3fc139f0cedaf576,     0xbfefb5797195d741,     //   0.13458,   -0.9909
+    0x3fc19d8940be24e7,     0xbfefb20dc681d54d,     //   0.13762,  -0.99049
+    0x3fc20116d4ec7bce,     0xbfefae8e8e46cfbb,     //   0.14066,  -0.99006
+    0x3fc264994dfd340a,     0xbfefaafbcb0cfddc,     //    0.1437,  -0.98962
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //   0.14673,  -0.98918
+    0x3fc32b7bf94516a7,     0xbfefa39bac7a1791,     //   0.14976,  -0.98872
+    0x3fc38edbb0cd8d14,     0xbfef9fce55adb2c8,     //    0.1528,  -0.98826
+    0x3fc3f22f57db4893,     0xbfef9bed7cfbde29,     //   0.15583,  -0.98778
+    0x3fc45576b1293e5a,     0xbfef97f924c9099b,     //   0.15886,   -0.9873
+    0x3fc4b8b17f79fa88,     0xbfef93f14f85ac08,     //   0.16189,  -0.98681
+    0x3fc51bdf8597c5f2,     0xbfef8fd5ffae41db,     //   0.16491,  -0.98631
+    0x3fc57f008654cbde,     0xbfef8ba737cb4b78,     //   0.16794,   -0.9858
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     //   0.17096,  -0.98528
+    0x3fc6451a831d830d,     0xbfef830f4a40c60c,     //   0.17398,  -0.98475
+    0x3fc6a81304f64ab2,     0xbfef7ea629e63d6e,     //     0.177,  -0.98421
+    0x3fc70afd8d08c4ff,     0xbfef7a299c1a322a,     //   0.18002,  -0.98366
+    0x3fc76dd9de50bf31,     0xbfef7599a3a12077,     //   0.18304,  -0.98311
+    0x3fc7d0a7bbd2cb1b,     0xbfef70f6434b7eb7,     //   0.18606,  -0.98254
+    0x3fc83366e89c64c5,     0xbfef6c3f7df5bbb7,     //   0.18907,  -0.98196
+    0x3fc8961727c41804,     0xbfef677556883cee,     //   0.19208,  -0.98138
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //   0.19509,  -0.98079
+    0x3fc95b49e9b62af9,     0xbfef5da6ed43685d,     //    0.1981,  -0.98018
+    0x3fc9bdcbf2dc4366,     0xbfef58a2b1789e84,     //    0.2011,  -0.97957
+    0x3fca203e1b1831da,     0xbfef538b1faf2d07,     //   0.20411,  -0.97895
+    0x3fca82a025b00451,     0xbfef4e603b0b2f2d,     //   0.20711,  -0.97832
+    0x3fcae4f1d5f3b9ab,     0xbfef492206bcabb4,     //   0.21011,  -0.97768
+    0x3fcb4732ef3d6722,     0xbfef43d085ff92dd,     //   0.21311,  -0.97703
+    0x3fcba96334f15dad,     0xbfef3e6bbc1bbc65,     //   0.21611,  -0.97637
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //    0.2191,   -0.9757
+    0x3fcc6d90535d74dc,     0xbfef33685a3aaef0,     //   0.22209,  -0.97503
+    0x3fcccf8cb312b286,     0xbfef2dc9c9089a9d,     //   0.22508,  -0.97434
+    0x3fcd31774d2cbdee,     0xbfef2817fc4609ce,     //   0.22807,  -0.97364
+    0x3fcd934fe5454311,     0xbfef2252f7763ada,     //   0.23106,  -0.97294
+    0x3fcdf5163f01099a,     0xbfef1c7abe284708,     //   0.23404,  -0.97223
+    0x3fce56ca1e101a1b,     0xbfef168f53f7205d,     //   0.23702,   -0.9715
+    0x3fceb86b462de348,     0xbfef1090bc898f5f,     //      0.24,  -0.97077
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //   0.24298,  -0.97003
+    0x3fcf7b7480bd3801,     0xbfef045a14cf738c,     //   0.24596,  -0.96928
+    0x3fcfdcdc1adfedf8,     0xbfeefe220c0b95ec,     //   0.24893,  -0.96852
+    0x3fd01f1806b9fdd2,     0xbfeef7d6e51ca3c0,     //    0.2519,  -0.96775
+    0x3fd04fb80e37fdae,     0xbfeef178a3e473c2,     //   0.25487,  -0.96698
+    0x3fd0804e05eb661e,     0xbfeeeb074c50a544,     //   0.25783,  -0.96619
+    0x3fd0b0d9cfdbdb90,     0xbfeee482e25a9dbc,     //   0.26079,  -0.96539
+    0x3fd0e15b4e1749cd,     0xbfeeddeb6a078651,     //   0.26375,  -0.96459
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     //   0.26671,  -0.96378
+    0x3fd1423eefc69378,     0xbfeed0835e999009,     //   0.26967,  -0.96295
+    0x3fd172a0d7765177,     0xbfeec9b2d3c3bf84,     //   0.27262,  -0.96212
+    0x3fd1a2f7fbe8f243,     0xbfeec2cf4b1af6b2,     //   0.27557,  -0.96128
+    0x3fd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //   0.27852,  -0.96043
+    0x3fd2038583d727bd,     0xbfeeb4cf515b8811,     //   0.28146,  -0.95957
+    0x3fd233bbabc3bb72,     0xbfeeadb2e8e7a88e,     //   0.28441,   -0.9587
+    0x3fd263e6995554ba,     0xbfeea68393e65800,     //   0.28735,  -0.95783
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //   0.29028,  -0.95694
+    0x3fd2c41a4e954520,     0xbfee97ec36016b30,     //   0.29322,  -0.95605
+    0x3fd2f422daec0386,     0xbfee9084361df7f3,     //   0.29615,  -0.95514
+    0x3fd3241fb638baaf,     0xbfee89095bad6025,     //   0.29908,  -0.95423
+    0x3fd35410c2e18152,     0xbfee817bab4cd10d,     //   0.30201,  -0.95331
+    0x3fd383f5e353b6aa,     0xbfee79db29a5165a,     //   0.30493,  -0.95238
+    0x3fd3b3cefa0414b7,     0xbfee7227db6a9744,     //   0.30785,  -0.95144
+    0x3fd3e39be96ec271,     0xbfee6a61c55d53a7,     //   0.31077,  -0.95049
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     //   0.31368,  -0.94953
+    0x3fd44310dc8936f0,     0xbfee5a9d550467d3,     //   0.31659,  -0.94856
+    0x3fd472b8a5571054,     0xbfee529f04729ffc,     //    0.3195,  -0.94759
+    0x3fd4a253d11b82f3,     0xbfee4a8dff81ce5e,     //   0.32241,   -0.9466
+    0x3fd4d1e24278e76a,     0xbfee426a4b2bc17e,     //   0.32531,  -0.94561
+    0x3fd50163dc197047,     0xbfee3a33ec75ce85,     //   0.32821,   -0.9446
+    0x3fd530d880af3c24,     0xbfee31eae870ce25,     //   0.33111,  -0.94359
+    0x3fd5604012f467b4,     0xbfee298f4439197a,     //     0.334,  -0.94257
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //   0.33689,  -0.94154
+    0x3fd5bee78b9db3b6,     0xbfee18a02fdc66d9,     //   0.33978,  -0.94051
+    0x3fd5ee27379ea693,     0xbfee100cca2980ac,     //   0.34266,  -0.93946
+    0x3fd61d595c88c203,     0xbfee0766d9280f54,     //   0.34554,   -0.9384
+    0x3fd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //   0.34842,  -0.93734
+    0x3fd67b949cad63ca,     0xbfedf5e36a9ba59c,     //   0.35129,  -0.93627
+    0x3fd6aa9d7dc77e16,     0xbfeded05f7de47da,     //   0.35416,  -0.93518
+    0x3fd6d998638a0cb5,     0xbfede4160f6d8d81,     //   0.35703,  -0.93409
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //    0.3599,  -0.93299
+    0x3fd73763c9261092,     0xbfedd1fef38a915a,     //   0.36276,  -0.93188
+    0x3fd766340f2418f6,     0xbfedc8d7cb410260,     //   0.36561,  -0.93077
+    0x3fd794f5e613dfae,     0xbfedbf9e4395759a,     //   0.36847,  -0.92964
+    0x3fd7c3a9311dcce7,     0xbfedb6526238a09b,     //   0.37132,  -0.92851
+    0x3fd7f24dd37341e3,     0xbfedacf42ce68ab9,     //   0.37416,  -0.92736
+    0x3fd820e3b04eaac4,     0xbfeda383a9668988,     //   0.37701,  -0.92621
+    0x3fd84f6aaaf3903f,     0xbfed9a00dd8b3d46,     //   0.37985,  -0.92505
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //   0.38268,  -0.92388
+    0x3fd8ac4b86d5ed44,     0xbfed86c48445a450,     //   0.38552,   -0.9227
+    0x3fd8daa52ec8a4af,     0xbfed7d0b02b8ecf9,     //   0.38835,  -0.92151
+    0x3fd908ef81ef7bd1,     0xbfed733f508c0dff,     //   0.39117,  -0.92032
+    0x3fd9372a63bc93d7,     0xbfed696173c9e68b,     //   0.39399,  -0.91911
+    0x3fd96555b7ab948f,     0xbfed5f7172888a7f,     //   0.39681,   -0.9179
+    0x3fd993716141bdfe,     0xbfed556f52e93eb1,     //   0.39962,  -0.91668
+    0x3fd9c17d440df9f2,     0xbfed4b5b1b187524,     //   0.40243,  -0.91545
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //   0.40524,  -0.91421
+    0x3fda1d6543b50ac0,     0xbfed36fc7bcbfbdc,     //   0.40804,  -0.91296
+    0x3fda4b4127dea1e4,     0xbfed2cb220e0ef9f,     //   0.41084,  -0.91171
+    0x3fda790cd3dbf31a,     0xbfed2255c6e5a4e1,     //   0.41364,  -0.91044
+    0x3fdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //   0.41643,  -0.90917
+    0x3fdad473125cdc08,     0xbfed0d672f59d2b9,     //   0.41922,  -0.90789
+    0x3fdb020d6c7f4009,     0xbfed02d4feb2bd92,     //     0.422,   -0.9066
+    0x3fdb2f971db31972,     0xbfecf830e8ce467b,     //   0.42478,   -0.9053
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //   0.42756,  -0.90399
+    0x3fdb8a7814fd5693,     0xbfece2b32799a060,     //   0.43033,  -0.90267
+    0x3fdbb7cf2304bd01,     0xbfecd7d9898b32f6,     //   0.43309,  -0.90135
+    0x3fdbe51517ffc0d9,     0xbfecccee20c2de9f,     //   0.43586,  -0.90002
+    0x3fdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //   0.43862,  -0.89867
+    0x3fdc3f6d47263129,     0xbfecb6e20a00da99,     //   0.44137,  -0.89732
+    0x3fdc6c7f4997000a,     0xbfecabc169a0b901,     //   0.44412,  -0.89597
+    0x3fdc997fc3865388,     0xbfeca08f19b9c449,     //   0.44687,   -0.8946
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     //   0.44961,  -0.89322
+    0x3fdcf34baee1cd21,     0xbfec89f587029c13,     //   0.45235,  -0.89184
+    0x3fdd2016e8e9db5b,     0xbfec7e8e52233cf3,     //   0.45508,  -0.89045
+    0x3fdd4cd02ba8609c,     0xbfec7315899eaad7,     //   0.45781,  -0.88905
+    0x3fdd79775b86e389,     0xbfec678b3488739b,     //   0.46054,  -0.88764
+    0x3fdda60c5cfa10d8,     0xbfec5bef59fef85a,     //   0.46326,  -0.88622
+    0x3fddd28f1481cc58,     0xbfec5042012b6907,     //   0.46598,   -0.8848
+    0x3fddfeff66a941de,     0xbfec44833141c004,     //   0.46869,  -0.88336
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //    0.4714,  -0.88192
+    0x3fde57a86d3cd824,     0xbfec2cd14931e3f1,     //    0.4741,  -0.88047
+    0x3fde83e0eaf85113,     0xbfec20de3fa971b0,     //    0.4768,  -0.87901
+    0x3fdeb00695f25620,     0xbfec14d9dc465e58,     //   0.47949,  -0.87755
+    0x3fdedc1952ef78d5,     0xbfec08c426725549,     //   0.48218,  -0.87607
+    0x3fdf081906bff7fd,     0xbfebfc9d25a1b147,     //   0.48487,  -0.87459
+    0x3fdf3405963fd068,     0xbfebf064e15377dd,     //   0.48755,  -0.87309
+    0x3fdf5fdee656cda3,     0xbfebe41b611154c1,     //   0.49023,   -0.8716
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //    0.4929,  -0.87009
+    0x3fdfb7575c24d2de,     0xbfebcb54cb0d2327,     //   0.49557,  -0.86857
+    0x3fdfe2f64be7120f,     0xbfebbed7c49380ea,     //   0.49823,  -0.86705
+    0x3fe00740c82b82e0,     0xbfebb249a0b6c40d,     //   0.50089,  -0.86551
+    0x3fe01cfc874c3eb7,     0xbfeba5aa673590d2,     //   0.50354,  -0.86397
+    0x3fe032ae55edbd95,     0xbfeb98fa1fd9155e,     //   0.50619,  -0.86242
+    0x3fe0485626ae221a,     0xbfeb8c38d27504e9,     //   0.50883,  -0.86087
+    0x3fe05df3ec31b8b6,     0xbfeb7f6686e792ea,     //   0.51147,   -0.8593
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //    0.5141,  -0.85773
+    0x3fe089112032b08c,     0xbfeb658f14fdbc47,     //   0.51673,  -0.85615
+    0x3fe09e907417c5e1,     0xbfeb5889fe921405,     //   0.51936,  -0.85456
+    0x3fe0b405878f85ec,     0xbfeb4b7409de7925,     //   0.52198,  -0.85296
+    0x3fe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //   0.52459,  -0.85136
+    0x3fe0ded0b84bc4b5,     0xbfeb3115a5f37bf4,     //    0.5272,  -0.84974
+    0x3fe0f426bb2a8e7d,     0xbfeb23cd470013b4,     //    0.5298,  -0.84812
+    0x3fe1097248d0a956,     0xbfeb16742a4ca2f5,     //    0.5324,  -0.84649
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //     0.535,  -0.84485
+    0x3fe133e9cfee254e,     0xbfeafb8fd89f57b6,     //   0.53759,  -0.84321
+    0x3fe14915af336ceb,     0xbfeaee04b43c1474,     //   0.54017,  -0.84155
+    0x3fe15e36e4dbe2bc,     0xbfeae068f345ecef,     //   0.54275,  -0.83989
+    0x3fe1734d63dedb49,     0xbfead2bc9e21d511,     //   0.54532,  -0.83822
+    0x3fe188591f3a46e5,     0xbfeac4ffbd3efac8,     //   0.54789,  -0.83655
+    0x3fe19d5a09f2b9b8,     0xbfeab7325916c0d4,     //   0.55046,  -0.83486
+    0x3fe1b250171373be,     0xbfeaa9547a2cb98e,     //   0.55302,  -0.83317
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //   0.55557,  -0.83147
+    0x3fe1dc1b64dc4872,     0xbfea8d676e545ad2,     //   0.55812,  -0.82976
+    0x3fe1f0f08bbc861b,     0xbfea7f58529fe69d,     //   0.56066,  -0.82805
+    0x3fe205baa17560d6,     0xbfea7138de9d60f5,     //    0.5632,  -0.82632
+    0x3fe21a799933eb58,     0xbfea63091b02fae2,     //   0.56573,  -0.82459
+    0x3fe22f2d662c13e1,     0xbfea54c91090f524,     //   0.56826,  -0.82285
+    0x3fe243d5fb98ac1f,     0xbfea4678c8119ac8,     //   0.57078,   -0.8211
+    0x3fe258734cbb7110,     0xbfea38184a593bc6,     //    0.5733,  -0.81935
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     //   0.57581,  -0.81758
+    0x3fe2818bef4d3cba,     0xbfea1b26d2c0a75e,     //   0.57831,  -0.81581
+    0x3fe2960727629ca8,     0xbfea0c95eabaf937,     //   0.58081,  -0.81404
+    0x3fe2aa76e87aeb58,     0xbfe9fdf4f13149de,     //   0.58331,  -0.81225
+    0x3fe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //    0.5858,  -0.81046
+    0x3fe2d333d34e9bb7,     0xbfe9e082edb42472,     //   0.58828,  -0.80866
+    0x3fe2e780e3e8ea16,     0xbfe9d1b1f5ea80d6,     //   0.59076,  -0.80685
+    0x3fe2fbc24b441015,     0xbfe9c2d110f075c3,     //   0.59323,  -0.80503
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //    0.5957,  -0.80321
+    0x3fe32421ec49a620,     0xbfe9a4dfa42b06b2,     //   0.59816,  -0.80138
+    0x3fe338400d0c8e57,     0xbfe995cf2ed80d22,     //   0.60062,  -0.79954
+    0x3fe34c5252c14de1,     0xbfe986aef1457594,     //   0.60307,  -0.79769
+    0x3fe36058b10659f3,     0xbfe9777ef4c7d742,     //   0.60551,  -0.79584
+    0x3fe374531b817f8d,     0xbfe9683f42bd7fe1,     //   0.60795,  -0.79398
+    0x3fe3884185dfeb22,     0xbfe958efe48e6dd7,     //   0.61038,  -0.79211
+    0x3fe39c23e3d63029,     0xbfe94990e3ac4a6c,     //   0.61281,  -0.79023
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     //   0.61523,  -0.78835
+    0x3fe3c3c44981c517,     0xbfe92aa41fc5a815,     //   0.61765,  -0.78646
+    0x3fe3d78238c58343,     0xbfe91b166fd49da2,     //   0.62006,  -0.78456
+    0x3fe3eb33eabe0680,     0xbfe90b7943575efe,     //   0.62246,  -0.78265
+    0x3fe3fed9534556d4,     0xbfe8fbcca3ef940d,     //   0.62486,  -0.78074
+    0x3fe41272663d108c,     0xbfe8ec109b486c49,     //   0.62725,  -0.77882
+    0x3fe425ff178e6bb1,     0xbfe8dc45331698cc,     //   0.62964,  -0.77689
+    0x3fe4397f5b2a4380,     0xbfe8cc6a75184655,     //   0.63202,  -0.77495
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //   0.63439,  -0.77301
+    0x3fe4605a692b32a2,     0xbfe8ac871ede1d88,     //   0.63676,  -0.77106
+    0x3fe473b51b987347,     0xbfe89c7e9a4dd4ab,     //   0.63912,   -0.7691
+    0x3fe48703306091fe,     0xbfe88c66e7481ba1,     //   0.64148,  -0.76714
+    0x3fe49a449b9b0938,     0xbfe87c400fba2ebf,     //   0.64383,  -0.76517
+    0x3fe4ad79516722f0,     0xbfe86c0a1d9aa195,     //   0.64618,  -0.76319
+    0x3fe4c0a145ec0004,     0xbfe85bc51ae958cc,     //   0.64851,   -0.7612
+    0x3fe4d3bc6d589f80,     0xbfe84b7111af83f9,     //   0.65085,  -0.75921
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //   0.65317,  -0.75721
+    0x3fe4f9cc25cca486,     0xbfe82a9c13f545ff,     //   0.65549,   -0.7552
+    0x3fe50cc09f59a09b,     0xbfe81a1b33b57acc,     //   0.65781,  -0.75319
+    0x3fe51fa81cd99aa6,     0xbfe8098b756e52fa,     //   0.66011,  -0.75117
+    0x3fe5328292a35596,     0xbfe7f8ece3571771,     //   0.66242,  -0.74914
+    0x3fe5454ff5159dfb,     0xbfe7e83f87b03686,     //   0.66471,   -0.7471
+    0x3fe5581038975137,     0xbfe7d7836cc33db2,     //     0.667,  -0.74506
+    0x3fe56ac35197649e,     0xbfe7c6b89ce2d333,     //   0.66928,  -0.74301
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //   0.67156,  -0.74095
+    0x3fe59001d5f723df,     0xbfe7a4f707bf97d2,     //   0.67383,  -0.73889
+    0x3fe5a28d2a5d7250,     0xbfe79400574f55e4,     //   0.67609,  -0.73682
+    0x3fe5b50b264f7448,     0xbfe782fb1b90b35b,     //   0.67835,  -0.73474
+    0x3fe5c77bbe65018c,     0xbfe771e75f037261,     //    0.6806,  -0.73265
+    0x3fe5d9dee73e345c,     0xbfe760c52c304764,     //   0.68285,  -0.73056
+    0x3fe5ec3495837074,     0xbfe74f948da8d28d,     //   0.68508,  -0.72846
+    0x3fe5fe7cbde56a0f,     0xbfe73e558e079942,     //   0.68732,  -0.72636
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     //   0.68954,  -0.72425
+    0x3fe622e44fec22ff,     0xbfe71bac960e41bf,     //   0.69176,  -0.72213
+    0x3fe63503a31c1be8,     0xbfe70a42b3176d7a,     //   0.69397,     -0.72
+    0x3fe64715437f535b,     0xbfe6f8ca99c95b75,     //   0.69618,  -0.71787
+    0x3fe6591925f0783e,     0xbfe6e74454eaa8ae,     //   0.69838,  -0.71573
+    0x3fe66b0f3f52b386,     0xbfe6d5afef4aafcc,     //   0.70057,  -0.71358
+    0x3fe67cf78491af10,     0xbfe6c40d73c18275,     //   0.70275,  -0.71143
+    0x3fe68ed1eaa19c71,     0xbfe6b25ced2fe29c,     //   0.70493,  -0.70927
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //   0.70711,  -0.70711
+    0x3fe6b25ced2fe29c,     0xbfe68ed1eaa19c71,     //   0.70927,  -0.70493
+    0x3fe6c40d73c18275,     0xbfe67cf78491af10,     //   0.71143,  -0.70275
+    0x3fe6d5afef4aafcc,     0xbfe66b0f3f52b386,     //   0.71358,  -0.70057
+    0x3fe6e74454eaa8ae,     0xbfe6591925f0783e,     //   0.71573,  -0.69838
+    0x3fe6f8ca99c95b75,     0xbfe64715437f535b,     //   0.71787,  -0.69618
+    0x3fe70a42b3176d7a,     0xbfe63503a31c1be8,     //      0.72,  -0.69397
+    0x3fe71bac960e41bf,     0xbfe622e44fec22ff,     //   0.72213,  -0.69176
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     //   0.72425,  -0.68954
+    0x3fe73e558e079942,     0xbfe5fe7cbde56a0f,     //   0.72636,  -0.68732
+    0x3fe74f948da8d28d,     0xbfe5ec3495837074,     //   0.72846,  -0.68508
+    0x3fe760c52c304764,     0xbfe5d9dee73e345c,     //   0.73056,  -0.68285
+    0x3fe771e75f037261,     0xbfe5c77bbe65018c,     //   0.73265,   -0.6806
+    0x3fe782fb1b90b35b,     0xbfe5b50b264f7448,     //   0.73474,  -0.67835
+    0x3fe79400574f55e4,     0xbfe5a28d2a5d7250,     //   0.73682,  -0.67609
+    0x3fe7a4f707bf97d2,     0xbfe59001d5f723df,     //   0.73889,  -0.67383
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //   0.74095,  -0.67156
+    0x3fe7c6b89ce2d333,     0xbfe56ac35197649e,     //   0.74301,  -0.66928
+    0x3fe7d7836cc33db2,     0xbfe5581038975137,     //   0.74506,    -0.667
+    0x3fe7e83f87b03686,     0xbfe5454ff5159dfb,     //    0.7471,  -0.66471
+    0x3fe7f8ece3571771,     0xbfe5328292a35596,     //   0.74914,  -0.66242
+    0x3fe8098b756e52fa,     0xbfe51fa81cd99aa6,     //   0.75117,  -0.66011
+    0x3fe81a1b33b57acc,     0xbfe50cc09f59a09b,     //   0.75319,  -0.65781
+    0x3fe82a9c13f545ff,     0xbfe4f9cc25cca486,     //    0.7552,  -0.65549
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //   0.75721,  -0.65317
+    0x3fe84b7111af83f9,     0xbfe4d3bc6d589f80,     //   0.75921,  -0.65085
+    0x3fe85bc51ae958cc,     0xbfe4c0a145ec0004,     //    0.7612,  -0.64851
+    0x3fe86c0a1d9aa195,     0xbfe4ad79516722f0,     //   0.76319,  -0.64618
+    0x3fe87c400fba2ebf,     0xbfe49a449b9b0938,     //   0.76517,  -0.64383
+    0x3fe88c66e7481ba1,     0xbfe48703306091fe,     //   0.76714,  -0.64148
+    0x3fe89c7e9a4dd4ab,     0xbfe473b51b987347,     //    0.7691,  -0.63912
+    0x3fe8ac871ede1d88,     0xbfe4605a692b32a2,     //   0.77106,  -0.63676
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //   0.77301,  -0.63439
+    0x3fe8cc6a75184655,     0xbfe4397f5b2a4380,     //   0.77495,  -0.63202
+    0x3fe8dc45331698cc,     0xbfe425ff178e6bb1,     //   0.77689,  -0.62964
+    0x3fe8ec109b486c49,     0xbfe41272663d108c,     //   0.77882,  -0.62725
+    0x3fe8fbcca3ef940d,     0xbfe3fed9534556d4,     //   0.78074,  -0.62486
+    0x3fe90b7943575efe,     0xbfe3eb33eabe0680,     //   0.78265,  -0.62246
+    0x3fe91b166fd49da2,     0xbfe3d78238c58343,     //   0.78456,  -0.62006
+    0x3fe92aa41fc5a815,     0xbfe3c3c44981c517,     //   0.78646,  -0.61765
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     //   0.78835,  -0.61523
+    0x3fe94990e3ac4a6c,     0xbfe39c23e3d63029,     //   0.79023,  -0.61281
+    0x3fe958efe48e6dd7,     0xbfe3884185dfeb22,     //   0.79211,  -0.61038
+    0x3fe9683f42bd7fe1,     0xbfe374531b817f8d,     //   0.79398,  -0.60795
+    0x3fe9777ef4c7d742,     0xbfe36058b10659f3,     //   0.79584,  -0.60551
+    0x3fe986aef1457594,     0xbfe34c5252c14de1,     //   0.79769,  -0.60307
+    0x3fe995cf2ed80d22,     0xbfe338400d0c8e57,     //   0.79954,  -0.60062
+    0x3fe9a4dfa42b06b2,     0xbfe32421ec49a620,     //   0.80138,  -0.59816
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //   0.80321,   -0.5957
+    0x3fe9c2d110f075c3,     0xbfe2fbc24b441015,     //   0.80503,  -0.59323
+    0x3fe9d1b1f5ea80d6,     0xbfe2e780e3e8ea16,     //   0.80685,  -0.59076
+    0x3fe9e082edb42472,     0xbfe2d333d34e9bb7,     //   0.80866,  -0.58828
+    0x3fe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //   0.81046,   -0.5858
+    0x3fe9fdf4f13149de,     0xbfe2aa76e87aeb58,     //   0.81225,  -0.58331
+    0x3fea0c95eabaf937,     0xbfe2960727629ca8,     //   0.81404,  -0.58081
+    0x3fea1b26d2c0a75e,     0xbfe2818bef4d3cba,     //   0.81581,  -0.57831
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     //   0.81758,  -0.57581
+    0x3fea38184a593bc6,     0xbfe258734cbb7110,     //   0.81935,   -0.5733
+    0x3fea4678c8119ac8,     0xbfe243d5fb98ac1f,     //    0.8211,  -0.57078
+    0x3fea54c91090f524,     0xbfe22f2d662c13e1,     //   0.82285,  -0.56826
+    0x3fea63091b02fae2,     0xbfe21a799933eb58,     //   0.82459,  -0.56573
+    0x3fea7138de9d60f5,     0xbfe205baa17560d6,     //   0.82632,   -0.5632
+    0x3fea7f58529fe69d,     0xbfe1f0f08bbc861b,     //   0.82805,  -0.56066
+    0x3fea8d676e545ad2,     0xbfe1dc1b64dc4872,     //   0.82976,  -0.55812
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //   0.83147,  -0.55557
+    0x3feaa9547a2cb98e,     0xbfe1b250171373be,     //   0.83317,  -0.55302
+    0x3feab7325916c0d4,     0xbfe19d5a09f2b9b8,     //   0.83486,  -0.55046
+    0x3feac4ffbd3efac8,     0xbfe188591f3a46e5,     //   0.83655,  -0.54789
+    0x3fead2bc9e21d511,     0xbfe1734d63dedb49,     //   0.83822,  -0.54532
+    0x3feae068f345ecef,     0xbfe15e36e4dbe2bc,     //   0.83989,  -0.54275
+    0x3feaee04b43c1474,     0xbfe14915af336ceb,     //   0.84155,  -0.54017
+    0x3feafb8fd89f57b6,     0xbfe133e9cfee254e,     //   0.84321,  -0.53759
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     //   0.84485,    -0.535
+    0x3feb16742a4ca2f5,     0xbfe1097248d0a956,     //   0.84649,   -0.5324
+    0x3feb23cd470013b4,     0xbfe0f426bb2a8e7d,     //   0.84812,   -0.5298
+    0x3feb3115a5f37bf4,     0xbfe0ded0b84bc4b5,     //   0.84974,   -0.5272
+    0x3feb3e4d3ef55712,     0xbfe0c9704d5d898f,     //   0.85136,  -0.52459
+    0x3feb4b7409de7925,     0xbfe0b405878f85ec,     //   0.85296,  -0.52198
+    0x3feb5889fe921405,     0xbfe09e907417c5e1,     //   0.85456,  -0.51936
+    0x3feb658f14fdbc47,     0xbfe089112032b08c,     //   0.85615,  -0.51673
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //   0.85773,   -0.5141
+    0x3feb7f6686e792ea,     0xbfe05df3ec31b8b6,     //    0.8593,  -0.51147
+    0x3feb8c38d27504e9,     0xbfe0485626ae221a,     //   0.86087,  -0.50883
+    0x3feb98fa1fd9155e,     0xbfe032ae55edbd95,     //   0.86242,  -0.50619
+    0x3feba5aa673590d2,     0xbfe01cfc874c3eb7,     //   0.86397,  -0.50354
+    0x3febb249a0b6c40d,     0xbfe00740c82b82e0,     //   0.86551,  -0.50089
+    0x3febbed7c49380ea,     0xbfdfe2f64be7120f,     //   0.86705,  -0.49823
+    0x3febcb54cb0d2327,     0xbfdfb7575c24d2de,     //   0.86857,  -0.49557
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //   0.87009,   -0.4929
+    0x3febe41b611154c1,     0xbfdf5fdee656cda3,     //    0.8716,  -0.49023
+    0x3febf064e15377dd,     0xbfdf3405963fd068,     //   0.87309,  -0.48755
+    0x3febfc9d25a1b147,     0xbfdf081906bff7fd,     //   0.87459,  -0.48487
+    0x3fec08c426725549,     0xbfdedc1952ef78d5,     //   0.87607,  -0.48218
+    0x3fec14d9dc465e58,     0xbfdeb00695f25620,     //   0.87755,  -0.47949
+    0x3fec20de3fa971b0,     0xbfde83e0eaf85113,     //   0.87901,   -0.4768
+    0x3fec2cd14931e3f1,     0xbfde57a86d3cd824,     //   0.88047,   -0.4741
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //   0.88192,   -0.4714
+    0x3fec44833141c004,     0xbfddfeff66a941de,     //   0.88336,  -0.46869
+    0x3fec5042012b6907,     0xbfddd28f1481cc58,     //    0.8848,  -0.46598
+    0x3fec5bef59fef85a,     0xbfdda60c5cfa10d8,     //   0.88622,  -0.46326
+    0x3fec678b3488739b,     0xbfdd79775b86e389,     //   0.88764,  -0.46054
+    0x3fec7315899eaad7,     0xbfdd4cd02ba8609c,     //   0.88905,  -0.45781
+    0x3fec7e8e52233cf3,     0xbfdd2016e8e9db5b,     //   0.89045,  -0.45508
+    0x3fec89f587029c13,     0xbfdcf34baee1cd21,     //   0.89184,  -0.45235
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     //   0.89322,  -0.44961
+    0x3feca08f19b9c449,     0xbfdc997fc3865388,     //    0.8946,  -0.44687
+    0x3fecabc169a0b901,     0xbfdc6c7f4997000a,     //   0.89597,  -0.44412
+    0x3fecb6e20a00da99,     0xbfdc3f6d47263129,     //   0.89732,  -0.44137
+    0x3fecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //   0.89867,  -0.43862
+    0x3fecccee20c2de9f,     0xbfdbe51517ffc0d9,     //   0.90002,  -0.43586
+    0x3fecd7d9898b32f6,     0xbfdbb7cf2304bd01,     //   0.90135,  -0.43309
+    0x3fece2b32799a060,     0xbfdb8a7814fd5693,     //   0.90267,  -0.43033
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //   0.90399,  -0.42756
+    0x3fecf830e8ce467b,     0xbfdb2f971db31972,     //    0.9053,  -0.42478
+    0x3fed02d4feb2bd92,     0xbfdb020d6c7f4009,     //    0.9066,    -0.422
+    0x3fed0d672f59d2b9,     0xbfdad473125cdc08,     //   0.90789,  -0.41922
+    0x3fed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //   0.90917,  -0.41643
+    0x3fed2255c6e5a4e1,     0xbfda790cd3dbf31a,     //   0.91044,  -0.41364
+    0x3fed2cb220e0ef9f,     0xbfda4b4127dea1e4,     //   0.91171,  -0.41084
+    0x3fed36fc7bcbfbdc,     0xbfda1d6543b50ac0,     //   0.91296,  -0.40804
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //   0.91421,  -0.40524
+    0x3fed4b5b1b187524,     0xbfd9c17d440df9f2,     //   0.91545,  -0.40243
+    0x3fed556f52e93eb1,     0xbfd993716141bdfe,     //   0.91668,  -0.39962
+    0x3fed5f7172888a7f,     0xbfd96555b7ab948f,     //    0.9179,  -0.39681
+    0x3fed696173c9e68b,     0xbfd9372a63bc93d7,     //   0.91911,  -0.39399
+    0x3fed733f508c0dff,     0xbfd908ef81ef7bd1,     //   0.92032,  -0.39117
+    0x3fed7d0b02b8ecf9,     0xbfd8daa52ec8a4af,     //   0.92151,  -0.38835
+    0x3fed86c48445a450,     0xbfd8ac4b86d5ed44,     //    0.9227,  -0.38552
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //   0.92388,  -0.38268
+    0x3fed9a00dd8b3d46,     0xbfd84f6aaaf3903f,     //   0.92505,  -0.37985
+    0x3feda383a9668988,     0xbfd820e3b04eaac4,     //   0.92621,  -0.37701
+    0x3fedacf42ce68ab9,     0xbfd7f24dd37341e3,     //   0.92736,  -0.37416
+    0x3fedb6526238a09b,     0xbfd7c3a9311dcce7,     //   0.92851,  -0.37132
+    0x3fedbf9e4395759a,     0xbfd794f5e613dfae,     //   0.92964,  -0.36847
+    0x3fedc8d7cb410260,     0xbfd766340f2418f6,     //   0.93077,  -0.36561
+    0x3fedd1fef38a915a,     0xbfd73763c9261092,     //   0.93188,  -0.36276
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     //   0.93299,   -0.3599
+    0x3fede4160f6d8d81,     0xbfd6d998638a0cb5,     //   0.93409,  -0.35703
+    0x3feded05f7de47da,     0xbfd6aa9d7dc77e16,     //   0.93518,  -0.35416
+    0x3fedf5e36a9ba59c,     0xbfd67b949cad63ca,     //   0.93627,  -0.35129
+    0x3fedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //   0.93734,  -0.34842
+    0x3fee0766d9280f54,     0xbfd61d595c88c203,     //    0.9384,  -0.34554
+    0x3fee100cca2980ac,     0xbfd5ee27379ea693,     //   0.93946,  -0.34266
+    0x3fee18a02fdc66d9,     0xbfd5bee78b9db3b6,     //   0.94051,  -0.33978
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //   0.94154,  -0.33689
+    0x3fee298f4439197a,     0xbfd5604012f467b4,     //   0.94257,    -0.334
+    0x3fee31eae870ce25,     0xbfd530d880af3c24,     //   0.94359,  -0.33111
+    0x3fee3a33ec75ce85,     0xbfd50163dc197047,     //    0.9446,  -0.32821
+    0x3fee426a4b2bc17e,     0xbfd4d1e24278e76a,     //   0.94561,  -0.32531
+    0x3fee4a8dff81ce5e,     0xbfd4a253d11b82f3,     //    0.9466,  -0.32241
+    0x3fee529f04729ffc,     0xbfd472b8a5571054,     //   0.94759,   -0.3195
+    0x3fee5a9d550467d3,     0xbfd44310dc8936f0,     //   0.94856,  -0.31659
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     //   0.94953,  -0.31368
+    0x3fee6a61c55d53a7,     0xbfd3e39be96ec271,     //   0.95049,  -0.31077
+    0x3fee7227db6a9744,     0xbfd3b3cefa0414b7,     //   0.95144,  -0.30785
+    0x3fee79db29a5165a,     0xbfd383f5e353b6aa,     //   0.95238,  -0.30493
+    0x3fee817bab4cd10d,     0xbfd35410c2e18152,     //   0.95331,  -0.30201
+    0x3fee89095bad6025,     0xbfd3241fb638baaf,     //   0.95423,  -0.29908
+    0x3fee9084361df7f3,     0xbfd2f422daec0386,     //   0.95514,  -0.29615
+    0x3fee97ec36016b30,     0xbfd2c41a4e954520,     //   0.95605,  -0.29322
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //   0.95694,  -0.29028
+    0x3feea68393e65800,     0xbfd263e6995554ba,     //   0.95783,  -0.28735
+    0x3feeadb2e8e7a88e,     0xbfd233bbabc3bb72,     //    0.9587,  -0.28441
+    0x3feeb4cf515b8811,     0xbfd2038583d727bd,     //   0.95957,  -0.28146
+    0x3feebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //   0.96043,  -0.27852
+    0x3feec2cf4b1af6b2,     0xbfd1a2f7fbe8f243,     //   0.96128,  -0.27557
+    0x3feec9b2d3c3bf84,     0xbfd172a0d7765177,     //   0.96212,  -0.27262
+    0x3feed0835e999009,     0xbfd1423eefc69378,     //   0.96295,  -0.26967
+    0x3feed740e7684963,     0xbfd111d262b1f677,     //   0.96378,  -0.26671
+    0x3feeddeb6a078651,     0xbfd0e15b4e1749cd,     //   0.96459,  -0.26375
+    0x3feee482e25a9dbc,     0xbfd0b0d9cfdbdb90,     //   0.96539,  -0.26079
+    0x3feeeb074c50a544,     0xbfd0804e05eb661e,     //   0.96619,  -0.25783
+    0x3feef178a3e473c2,     0xbfd04fb80e37fdae,     //   0.96698,  -0.25487
+    0x3feef7d6e51ca3c0,     0xbfd01f1806b9fdd2,     //   0.96775,   -0.2519
+    0x3feefe220c0b95ec,     0xbfcfdcdc1adfedf8,     //   0.96852,  -0.24893
+    0x3fef045a14cf738c,     0xbfcf7b7480bd3801,     //   0.96928,  -0.24596
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //   0.97003,  -0.24298
+    0x3fef1090bc898f5f,     0xbfceb86b462de348,     //   0.97077,     -0.24
+    0x3fef168f53f7205d,     0xbfce56ca1e101a1b,     //    0.9715,  -0.23702
+    0x3fef1c7abe284708,     0xbfcdf5163f01099a,     //   0.97223,  -0.23404
+    0x3fef2252f7763ada,     0xbfcd934fe5454311,     //   0.97294,  -0.23106
+    0x3fef2817fc4609ce,     0xbfcd31774d2cbdee,     //   0.97364,  -0.22807
+    0x3fef2dc9c9089a9d,     0xbfcccf8cb312b286,     //   0.97434,  -0.22508
+    0x3fef33685a3aaef0,     0xbfcc6d90535d74dc,     //   0.97503,  -0.22209
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //    0.9757,   -0.2191
+    0x3fef3e6bbc1bbc65,     0xbfcba96334f15dad,     //   0.97637,  -0.21611
+    0x3fef43d085ff92dd,     0xbfcb4732ef3d6722,     //   0.97703,  -0.21311
+    0x3fef492206bcabb4,     0xbfcae4f1d5f3b9ab,     //   0.97768,  -0.21011
+    0x3fef4e603b0b2f2d,     0xbfca82a025b00451,     //   0.97832,  -0.20711
+    0x3fef538b1faf2d07,     0xbfca203e1b1831da,     //   0.97895,  -0.20411
+    0x3fef58a2b1789e84,     0xbfc9bdcbf2dc4366,     //   0.97957,   -0.2011
+    0x3fef5da6ed43685d,     0xbfc95b49e9b62af9,     //   0.98018,   -0.1981
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //   0.98079,  -0.19509
+    0x3fef677556883cee,     0xbfc8961727c41804,     //   0.98138,  -0.19208
+    0x3fef6c3f7df5bbb7,     0xbfc83366e89c64c5,     //   0.98196,  -0.18907
+    0x3fef70f6434b7eb7,     0xbfc7d0a7bbd2cb1b,     //   0.98254,  -0.18606
+    0x3fef7599a3a12077,     0xbfc76dd9de50bf31,     //   0.98311,  -0.18304
+    0x3fef7a299c1a322a,     0xbfc70afd8d08c4ff,     //   0.98366,  -0.18002
+    0x3fef7ea629e63d6e,     0xbfc6a81304f64ab2,     //   0.98421,    -0.177
+    0x3fef830f4a40c60c,     0xbfc6451a831d830d,     //   0.98475,  -0.17398
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     //   0.98528,  -0.17096
+    0x3fef8ba737cb4b78,     0xbfc57f008654cbde,     //    0.9858,  -0.16794
+    0x3fef8fd5ffae41db,     0xbfc51bdf8597c5f2,     //   0.98631,  -0.16491
+    0x3fef93f14f85ac08,     0xbfc4b8b17f79fa88,     //   0.98681,  -0.16189
+    0x3fef97f924c9099b,     0xbfc45576b1293e5a,     //    0.9873,  -0.15886
+    0x3fef9bed7cfbde29,     0xbfc3f22f57db4893,     //   0.98778,  -0.15583
+    0x3fef9fce55adb2c8,     0xbfc38edbb0cd8d14,     //   0.98826,   -0.1528
+    0x3fefa39bac7a1791,     0xbfc32b7bf94516a7,     //   0.98872,  -0.14976
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //   0.98918,  -0.14673
+    0x3fefaafbcb0cfddc,     0xbfc264994dfd340a,     //   0.98962,   -0.1437
+    0x3fefae8e8e46cfbb,     0xbfc20116d4ec7bce,     //   0.99006,  -0.14066
+    0x3fefb20dc681d54d,     0xbfc19d8940be24e7,     //   0.99049,  -0.13762
+    0x3fefb5797195d741,     0xbfc139f0cedaf576,     //    0.9909,  -0.13458
+    0x3fefb8d18d66adb7,     0xbfc0d64dbcb26786,     //   0.99131,  -0.13154
+    0x3fefbc1617e44186,     0xbfc072a047ba831d,     //   0.99171,   -0.1285
+    0x3fefbf470f0a8d88,     0xbfc00ee8ad6fb85b,     //    0.9921,  -0.12545
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     //   0.99248,  -0.12241
+    0x3fefc56e3b7d9af6,     0xbfbe8eb7fde4aa3e,     //   0.99285,  -0.11937
+    0x3fefc8646cfeb721,     0xbfbdc70ecbae9fc8,     //   0.99321,  -0.11632
+    0x3fefcb4703914354,     0xbfbcff533b307dc1,     //   0.99356,  -0.11327
+    0x3fefce15fd6da67b,     0xbfbc3785c79ec2d5,     //   0.99391,  -0.11022
+    0x3fefd0d158d86087,     0xbfbb6fa6ec38f64c,     //   0.99424,  -0.10717
+    0x3fefd37914220b84,     0xbfbaa7b724495c04,     //   0.99456,  -0.10412
+    0x3fefd60d2da75c9e,     0xbfb9dfb6eb24a85c,     //   0.99488,  -0.10107
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //   0.99518, -0.098017
+    0x3fefdafa7514538c,     0xbfb84f8712c130a0,     //   0.99548, -0.094963
+    0x3fefdd539ff1f456,     0xbfb787586a5d5b21,     //   0.99577, -0.091909
+    0x3fefdf9922f73307,     0xbfb6bf1b3e79b129,     //   0.99604, -0.088854
+    0x3fefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //   0.99631, -0.085797
+    0x3fefe3e92be9d886,     0xbfb52e774a4d4d0a,     //   0.99657,  -0.08274
+    0x3fefe5f3af2e3940,     0xbfb4661179272096,     //   0.99682, -0.079682
+    0x3fefe7ea85482d60,     0xbfb39d9f12c5a299,     //   0.99706, -0.076624
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     //   0.99729, -0.073565
+    0x3fefeb9d2530410f,     0xbfb20c9674ed444c,     //   0.99751, -0.070505
+    0x3fefed58ecb673c4,     0xbfb1440134d709b2,     //   0.99772, -0.067444
+    0x3fefef0102826191,     0xbfb07b614e463064,     //   0.99793, -0.064383
+    0x3feff095658e71ad,     0xbfaf656e79f820e0,     //   0.99812, -0.061321
+    0x3feff21614e131ed,     0xbfadd406f9808ec8,     //    0.9983, -0.058258
+    0x3feff3830f8d575c,     0xbfac428d12c0d7e3,     //   0.99848, -0.055195
+    0x3feff4dc54b1bed3,     0xbfaab101bd5f8317,     //   0.99864, -0.052132
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //    0.9988, -0.049068
+    0x3feff753bb1b9164,     0xbfa78dbaa5874685,     //   0.99894, -0.046003
+    0x3feff871dadb81df,     0xbfa5fc00d290cd43,     //   0.99908, -0.042938
+    0x3feff97c4208c014,     0xbfa46a396ff86179,     //    0.9992, -0.039873
+    0x3feffa72effef75d,     0xbfa2d865759455cd,     //   0.99932, -0.036807
+    0x3feffb55e425fdae,     0xbfa14685db42c17e,     //   0.99943, -0.033741
+    0x3feffc251df1d3f8,     0xbf9f693731d1cf01,     //   0.99953, -0.030675
+    0x3feffce09ce2a679,     0xbf9c454f4ce53b1c,     //   0.99962, -0.027608
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //    0.9997, -0.024541
+    0x3feffe1c6870cb77,     0xbf95fd4d21fab226,     //   0.99977, -0.021474
+    0x3feffe9cb44b51a1,     0xbf92d936bbe30efd,     //   0.99983, -0.018407
+    0x3fefff0943c53bd1,     0xbf8f6a296ab997ca,     //   0.99988, -0.015339
+    0x3fefff62169b92db,     0xbf8921d1fcdec784,     //   0.99992, -0.012272
+    0x3fefffa72c978c4f,     0xbf82d96b0e509703,     //   0.99996,-0.0092038
+    0x3fefffd8858e8a92,     0xbf7921f0fe670071,     //   0.99998,-0.0061359
+    0x3feffff621621d02,     0xbf6921f8becca4ba,     //         1, -0.003068
+
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F64_4096)
+/**
+  @par
+  Example code for Double Precision Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_4096[8192] = {
+    0x3ff0000000000000,     0x0000000000000000,     //         1,         0
+    0x3feffffd88586ee6,     0x3f5921faaee6472d,     //         1,  0.001534
+    0x3feffff621621d02,     0x3f6921f8becca4ba,     //         1,  0.003068
+    0x3fefffe9cb1e2e8d,     0x3f72d97822f996bc,     //   0.99999, 0.0046019
+    0x3fefffd8858e8a92,     0x3f7921f0fe670071,     //   0.99998, 0.0061359
+    0x3fefffc250b5daef,     0x3f7f6a65f9a2a3c5,     //   0.99997, 0.0076698
+    0x3fefffa72c978c4f,     0x3f82d96b0e509703,     //   0.99996, 0.0092038
+    0x3fefff871937ce2f,     0x3f85fda037ac05e0,     //   0.99994,  0.010738
+    0x3fefff62169b92db,     0x3f8921d1fcdec784,     //   0.99992,  0.012272
+    0x3fefff3824c88f6f,     0x3f8c45ffe1e48ad9,     //    0.9999,  0.013805
+    0x3fefff0943c53bd1,     0x3f8f6a296ab997ca,     //   0.99988,  0.015339
+    0x3feffed57398d2b7,     0x3f9147270dad7132,     //   0.99986,  0.016873
+    0x3feffe9cb44b51a1,     0x3f92d936bbe30efd,     //   0.99983,  0.018407
+    0x3feffe5f05e578db,     0x3f946b4381fce81c,     //    0.9998,   0.01994
+    0x3feffe1c6870cb77,     0x3f95fd4d21fab226,     //   0.99977,  0.021474
+    0x3feffdd4dbf78f52,     0x3f978f535ddc9f03,     //   0.99974,  0.023008
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //    0.9997,  0.024541
+    0x3feffd36f624500c,     0x3f9ab354b1504fca,     //   0.99966,  0.026075
+    0x3feffce09ce2a679,     0x3f9c454f4ce53b1c,     //   0.99962,  0.027608
+    0x3feffc8554cd213a,     0x3f9dd7458c64ab39,     //   0.99958,  0.029142
+    0x3feffc251df1d3f8,     0x3f9f693731d1cf01,     //   0.99953,  0.030675
+    0x3feffbbff85f9515,     0x3fa07d91ff984580,     //   0.99948,  0.032208
+    0x3feffb55e425fdae,     0x3fa14685db42c17e,     //   0.99943,  0.033741
+    0x3feffae6e1556998,     0x3fa20f770ceb11c6,     //   0.99938,  0.035274
+    0x3feffa72effef75d,     0x3fa2d865759455cd,     //   0.99932,  0.036807
+    0x3feff9fa10348837,     0x3fa3a150f6421afc,     //   0.99926,   0.03834
+    0x3feff97c4208c014,     0x3fa46a396ff86179,     //    0.9992,  0.039873
+    0x3feff8f9858f058b,     0x3fa5331ec3bba0eb,     //   0.99914,  0.041406
+    0x3feff871dadb81df,     0x3fa5fc00d290cd43,     //   0.99908,  0.042938
+    0x3feff7e5420320f9,     0x3fa6c4df7d7d5b84,     //   0.99901,  0.044471
+    0x3feff753bb1b9164,     0x3fa78dbaa5874685,     //   0.99894,  0.046003
+    0x3feff6bd463b444d,     0x3fa856922bb513c1,     //   0.99887,  0.047535
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //    0.9988,  0.049068
+    0x3feff58192ee0358,     0x3fa9e835d6993c87,     //   0.99872,    0.0506
+    0x3feff4dc54b1bed3,     0x3faab101bd5f8317,     //   0.99864,  0.052132
+    0x3feff43228de1b77,     0x3fab79c986698b78,     //   0.99856,  0.053664
+    0x3feff3830f8d575c,     0x3fac428d12c0d7e3,     //   0.99848,  0.055195
+    0x3feff2cf08da7321,     0x3fad0b4c436f91d0,     //   0.99839,  0.056727
+    0x3feff21614e131ed,     0x3fadd406f9808ec8,     //    0.9983,  0.058258
+    0x3feff15833be1965,     0x3fae9cbd15ff5527,     //   0.99821,   0.05979
+    0x3feff095658e71ad,     0x3faf656e79f820e0,     //   0.99812,  0.061321
+    0x3fefefcdaa704562,     0x3fb0170d833bf421,     //   0.99802,  0.062852
+    0x3fefef0102826191,     0x3fb07b614e463064,     //   0.99793,  0.064383
+    0x3fefee2f6de455ba,     0x3fb0dfb28ea201e6,     //   0.99783,  0.065913
+    0x3fefed58ecb673c4,     0x3fb1440134d709b2,     //   0.99772,  0.067444
+    0x3fefec7d7f19cffc,     0x3fb1a84d316d4f8a,     //   0.99762,  0.068974
+    0x3fefeb9d2530410f,     0x3fb20c9674ed444c,     //   0.99751,  0.070505
+    0x3fefeab7df1c6005,     0x3fb270dcefdfc45b,     //    0.9974,  0.072035
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     //   0.99729,  0.073565
+    0x3fefe8de8f03d75c,     0x3fb339614e41ffa5,     //   0.99718,  0.075094
+    0x3fefe7ea85482d60,     0x3fb39d9f12c5a299,     //   0.99706,  0.076624
+    0x3fefe6f18ff42c84,     0x3fb401d9d0e3a507,     //   0.99694,  0.078153
+    0x3fefe5f3af2e3940,     0x3fb4661179272096,     //   0.99682,  0.079682
+    0x3fefe4f0e31d7a4a,     0x3fb4ca45fc1ba8b6,     //    0.9967,  0.081211
+    0x3fefe3e92be9d886,     0x3fb52e774a4d4d0a,     //   0.99657,   0.08274
+    0x3fefe2dc89bbff08,     0x3fb592a554489bc8,     //   0.99644,  0.084269
+    0x3fefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //   0.99631,  0.085797
+    0x3fefe0b485181be3,     0x3fb65af75dd0f87b,     //   0.99618,  0.087326
+    0x3fefdf9922f73307,     0x3fb6bf1b3e79b129,     //   0.99604,  0.088854
+    0x3fefde78d68653fd,     0x3fb7233b9d236e71,     //   0.99591,  0.090381
+    0x3fefdd539ff1f456,     0x3fb787586a5d5b21,     //   0.99577,  0.091909
+    0x3fefdc297f674ba9,     0x3fb7eb7196b72ee4,     //   0.99563,  0.093436
+    0x3fefdafa7514538c,     0x3fb84f8712c130a0,     //   0.99548,  0.094963
+    0x3fefd9c68127c78c,     0x3fb8b398cf0c38e0,     //   0.99533,   0.09649
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //   0.99518,  0.098017
+    0x3fefd74fdd40abbf,     0x3fb97bb0caaba56f,     //   0.99503,  0.099544
+    0x3fefd60d2da75c9e,     0x3fb9dfb6eb24a85c,     //   0.99488,   0.10107
+    0x3fefd4c59536fae4,     0x3fba43b90e27f3c4,     //   0.99472,    0.1026
+    0x3fefd37914220b84,     0x3fbaa7b724495c04,     //   0.99456,   0.10412
+    0x3fefd227aa9bd53b,     0x3fbb0bb11e1d5559,     //    0.9944,   0.10565
+    0x3fefd0d158d86087,     0x3fbb6fa6ec38f64c,     //   0.99424,   0.10717
+    0x3fefcf761f0c77a3,     0x3fbbd3987f31fa0e,     //   0.99407,    0.1087
+    0x3fefce15fd6da67b,     0x3fbc3785c79ec2d5,     //   0.99391,   0.11022
+    0x3fefccb0f4323aa3,     0x3fbc9b6eb6165c42,     //   0.99374,   0.11175
+    0x3fefcb4703914354,     0x3fbcff533b307dc1,     //   0.99356,   0.11327
+    0x3fefc9d82bc2915e,     0x3fbd633347858ce4,     //   0.99339,   0.11479
+    0x3fefc8646cfeb721,     0x3fbdc70ecbae9fc8,     //   0.99321,   0.11632
+    0x3fefc6ebc77f0887,     0x3fbe2ae5b8457f77,     //   0.99303,   0.11784
+    0x3fefc56e3b7d9af6,     0x3fbe8eb7fde4aa3e,     //   0.99285,   0.11937
+    0x3fefc3ebc935454c,     0x3fbef2858d27561b,     //   0.99267,   0.12089
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     //   0.99248,   0.12241
+    0x3fefc0d832bf043a,     0x3fbfba124b07ad85,     //   0.99229,   0.12393
+    0x3fefbf470f0a8d88,     0x3fc00ee8ad6fb85b,     //    0.9921,   0.12545
+    0x3fefbdb106021816,     0x3fc040c5bb67747e,     //   0.99191,   0.12698
+    0x3fefbc1617e44186,     0x3fc072a047ba831d,     //   0.99171,    0.1285
+    0x3fefba7644f068b5,     0x3fc0a4784ab8bf1d,     //   0.99151,   0.13002
+    0x3fefb8d18d66adb7,     0x3fc0d64dbcb26786,     //   0.99131,   0.13154
+    0x3fefb727f187f1c7,     0x3fc1082095f820b0,     //   0.99111,   0.13306
+    0x3fefb5797195d741,     0x3fc139f0cedaf576,     //    0.9909,   0.13458
+    0x3fefb3c60dd2c199,     0x3fc16bbe5fac5865,     //    0.9907,    0.1361
+    0x3fefb20dc681d54d,     0x3fc19d8940be24e7,     //   0.99049,   0.13762
+    0x3fefb0509be6f7db,     0x3fc1cf516a62a077,     //   0.99027,   0.13914
+    0x3fefae8e8e46cfbb,     0x3fc20116d4ec7bce,     //   0.99006,   0.14066
+    0x3fefacc79de6c44f,     0x3fc232d978aed413,     //   0.98984,   0.14218
+    0x3fefaafbcb0cfddc,     0x3fc264994dfd340a,     //   0.98962,    0.1437
+    0x3fefa92b1600657c,     0x3fc296564d2b953e,     //    0.9894,   0.14521
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //   0.98918,   0.14673
+    0x3fefa57b066e2754,     0x3fc2f9c7aa7a72af,     //   0.98895,   0.14825
+    0x3fefa39bac7a1791,     0x3fc32b7bf94516a7,     //   0.98872,   0.14976
+    0x3fefa1b7717661d5,     0x3fc35d2d53440db2,     //   0.98849,   0.15128
+    0x3fef9fce55adb2c8,     0x3fc38edbb0cd8d14,     //   0.98826,    0.1528
+    0x3fef9de0596b77a3,     0x3fc3c0870a383ff6,     //   0.98802,   0.15431
+    0x3fef9bed7cfbde29,     0x3fc3f22f57db4893,     //   0.98778,   0.15583
+    0x3fef99f5c0abd496,     0x3fc423d4920e4166,     //   0.98754,   0.15734
+    0x3fef97f924c9099b,     0x3fc45576b1293e5a,     //    0.9873,   0.15886
+    0x3fef95f7a9a1ec47,     0x3fc48715ad84cdf5,     //   0.98706,   0.16037
+    0x3fef93f14f85ac08,     0x3fc4b8b17f79fa88,     //   0.98681,   0.16189
+    0x3fef91e616c43891,     0x3fc4ea4a1f624b61,     //   0.98656,    0.1634
+    0x3fef8fd5ffae41db,     0x3fc51bdf8597c5f2,     //   0.98631,   0.16491
+    0x3fef8dc10a95380d,     0x3fc54d71aa74ef02,     //   0.98605,   0.16643
+    0x3fef8ba737cb4b78,     0x3fc57f008654cbde,     //    0.9858,   0.16794
+    0x3fef898887a36c84,     0x3fc5b08c1192e381,     //   0.98554,   0.16945
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     //   0.98528,   0.17096
+    0x3fef853c9089595e,     0x3fc61399179a6e94,     //   0.98501,   0.17247
+    0x3fef830f4a40c60c,     0x3fc6451a831d830d,     //   0.98475,   0.17398
+    0x3fef80dd27ed8204,     0x3fc676987f7216b8,     //   0.98448,   0.17549
+    0x3fef7ea629e63d6e,     0x3fc6a81304f64ab2,     //   0.98421,     0.177
+    0x3fef7c6a50826840,     0x3fc6d98a0c08c8da,     //   0.98394,   0.17851
+    0x3fef7a299c1a322a,     0x3fc70afd8d08c4ff,     //   0.98366,   0.18002
+    0x3fef77e40d068a90,     0x3fc73c6d8055fe0a,     //   0.98339,   0.18153
+    0x3fef7599a3a12077,     0x3fc76dd9de50bf31,     //   0.98311,   0.18304
+    0x3fef734a60446279,     0x3fc79f429f59e11d,     //   0.98282,   0.18455
+    0x3fef70f6434b7eb7,     0x3fc7d0a7bbd2cb1b,     //   0.98254,   0.18606
+    0x3fef6e9d4d1262ca,     0x3fc802092c1d744b,     //   0.98225,   0.18756
+    0x3fef6c3f7df5bbb7,     0x3fc83366e89c64c5,     //   0.98196,   0.18907
+    0x3fef69dcd652f5de,     0x3fc864c0e9b2b6cf,     //   0.98167,   0.19057
+    0x3fef677556883cee,     0x3fc8961727c41804,     //   0.98138,   0.19208
+    0x3fef6508fef47bd5,     0x3fc8c7699b34ca7e,     //   0.98108,   0.19359
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //   0.98079,   0.19509
+    0x3fef6021c9f148c2,     0x3fc92a0303c8194f,     //   0.98048,   0.19659
+    0x3fef5da6ed43685d,     0x3fc95b49e9b62af9,     //   0.98018,    0.1981
+    0x3fef5b273a4fa2d9,     0x3fc98c8ce69a7aec,     //   0.97988,    0.1996
+    0x3fef58a2b1789e84,     0x3fc9bdcbf2dc4366,     //   0.97957,    0.2011
+    0x3fef56195321c090,     0x3fc9ef0706e35a35,     //   0.97926,   0.20261
+    0x3fef538b1faf2d07,     0x3fca203e1b1831da,     //   0.97895,   0.20411
+    0x3fef50f81785c6b9,     0x3fca517127e3dabc,     //   0.97863,   0.20561
+    0x3fef4e603b0b2f2d,     0x3fca82a025b00451,     //   0.97832,   0.20711
+    0x3fef4bc38aa5c694,     0x3fcab3cb0ce6fe44,     //     0.978,   0.20861
+    0x3fef492206bcabb4,     0x3fcae4f1d5f3b9ab,     //   0.97768,   0.21011
+    0x3fef467bafb7bbe0,     0x3fcb16147941ca2a,     //   0.97735,   0.21161
+    0x3fef43d085ff92dd,     0x3fcb4732ef3d6722,     //   0.97703,   0.21311
+    0x3fef412089fd8adc,     0x3fcb784d30536cda,     //    0.9767,   0.21461
+    0x3fef3e6bbc1bbc65,     0x3fcba96334f15dad,     //   0.97637,   0.21611
+    0x3fef3bb21cc4fe47,     0x3fcbda74f5856330,     //   0.97604,    0.2176
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //    0.9757,    0.2191
+    0x3fef36306b67c556,     0x3fcc3c8b8c4b9dd7,     //   0.97536,    0.2206
+    0x3fef33685a3aaef0,     0x3fcc6d90535d74dc,     //   0.97503,   0.22209
+    0x3fef309b794b719f,     0x3fcc9e90b824a6a9,     //   0.97468,   0.22359
+    0x3fef2dc9c9089a9d,     0x3fcccf8cb312b286,     //   0.97434,   0.22508
+    0x3fef2af349e17507,     0x3fcd00843c99c5f9,     //   0.97399,   0.22658
+    0x3fef2817fc4609ce,     0x3fcd31774d2cbdee,     //   0.97364,   0.22807
+    0x3fef2537e0a71f9f,     0x3fcd6265dd3f27e3,     //   0.97329,   0.22957
+    0x3fef2252f7763ada,     0x3fcd934fe5454311,     //   0.97294,   0.23106
+    0x3fef1f6941259d7a,     0x3fcdc4355db40195,     //   0.97258,   0.23255
+    0x3fef1c7abe284708,     0x3fcdf5163f01099a,     //   0.97223,   0.23404
+    0x3fef19876ef1f486,     0x3fce25f281a2b684,     //   0.97187,   0.23553
+    0x3fef168f53f7205d,     0x3fce56ca1e101a1b,     //    0.9715,   0.23702
+    0x3fef13926dad024e,     0x3fce879d0cc0fdaf,     //   0.97114,   0.23851
+    0x3fef1090bc898f5f,     0x3fceb86b462de348,     //   0.97077,      0.24
+    0x3fef0d8a410379c5,     0x3fcee934c2d006c7,     //    0.9704,   0.24149
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //   0.97003,   0.24298
+    0x3fef076eecade0fa,     0x3fcf4ab9679c9f5c,     //   0.96966,   0.24447
+    0x3fef045a14cf738c,     0x3fcf7b7480bd3801,     //   0.96928,   0.24596
+    0x3fef014074708ed3,     0x3fcfac2abeff57ff,     //    0.9689,   0.24744
+    0x3feefe220c0b95ec,     0x3fcfdcdc1adfedf8,     //   0.96852,   0.24893
+    0x3feefafedc1ba8b7,     0x3fd006c4466e54af,     //   0.96814,   0.25041
+    0x3feef7d6e51ca3c0,     0x3fd01f1806b9fdd2,     //   0.96775,    0.2519
+    0x3feef4aa278b2032,     0x3fd037694a928cac,     //   0.96737,   0.25338
+    0x3feef178a3e473c2,     0x3fd04fb80e37fdae,     //   0.96698,   0.25487
+    0x3feeee425aa6b09a,     0x3fd068044deab002,     //   0.96658,   0.25635
+    0x3feeeb074c50a544,     0x3fd0804e05eb661e,     //   0.96619,   0.25783
+    0x3feee7c77961dc9e,     0x3fd09895327b465e,     //   0.96579,   0.25931
+    0x3feee482e25a9dbc,     0x3fd0b0d9cfdbdb90,     //   0.96539,   0.26079
+    0x3feee13987bbebdc,     0x3fd0c91bda4f158d,     //   0.96499,   0.26227
+    0x3feeddeb6a078651,     0x3fd0e15b4e1749cd,     //   0.96459,   0.26375
+    0x3feeda9889bfe86a,     0x3fd0f998277733f7,     //   0.96418,   0.26523
+    0x3feed740e7684963,     0x3fd111d262b1f677,     //   0.96378,   0.26671
+    0x3feed3e483849c51,     0x3fd12a09fc0b1b12,     //   0.96337,   0.26819
+    0x3feed0835e999009,     0x3fd1423eefc69378,     //   0.96295,   0.26967
+    0x3feecd1d792c8f10,     0x3fd15a713a28b9d9,     //   0.96254,   0.27115
+    0x3feec9b2d3c3bf84,     0x3fd172a0d7765177,     //   0.96212,   0.27262
+    0x3feec6436ee60309,     0x3fd18acdc3f4873a,     //    0.9617,    0.2741
+    0x3feec2cf4b1af6b2,     0x3fd1a2f7fbe8f243,     //   0.96128,   0.27557
+    0x3feebf5668eaf2ef,     0x3fd1bb1f7b999480,     //   0.96086,   0.27705
+    0x3feebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //   0.96043,   0.27852
+    0x3feeb8566b810f2a,     0x3fd1eb6643499fbb,     //      0.96,   0.27999
+    0x3feeb4cf515b8811,     0x3fd2038583d727bd,     //   0.95957,   0.28146
+    0x3feeb1437af9bb34,     0x3fd21ba1fd3d2623,     //   0.95914,   0.28294
+    0x3feeadb2e8e7a88e,     0x3fd233bbabc3bb72,     //    0.9587,   0.28441
+    0x3feeaa1d9bb20af3,     0x3fd24bd28bb37672,     //   0.95827,   0.28588
+    0x3feea68393e65800,     0x3fd263e6995554ba,     //   0.95783,   0.28735
+    0x3feea2e4d212c000,     0x3fd27bf7d0f2c346,     //   0.95738,   0.28882
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //   0.95694,   0.29028
+    0x3fee9b99229046f8,     0x3fd2ac11af483572,     //   0.95649,   0.29175
+    0x3fee97ec36016b30,     0x3fd2c41a4e954520,     //   0.95605,   0.29322
+    0x3fee943a91aab4b4,     0x3fd2dc200907fe51,     //   0.95559,   0.29469
+    0x3fee9084361df7f3,     0x3fd2f422daec0386,     //   0.95514,   0.29615
+    0x3fee8cc923edc388,     0x3fd30c22c08d6a13,     //   0.95469,   0.29762
+    0x3fee89095bad6025,     0x3fd3241fb638baaf,     //   0.95423,   0.29908
+    0x3fee8544ddf0d075,     0x3fd33c19b83af207,     //   0.95377,   0.30054
+    0x3fee817bab4cd10d,     0x3fd35410c2e18152,     //   0.95331,   0.30201
+    0x3fee7dadc456d850,     0x3fd36c04d27a4edf,     //   0.95284,   0.30347
+    0x3fee79db29a5165a,     0x3fd383f5e353b6aa,     //   0.95238,   0.30493
+    0x3fee7603dbce74e9,     0x3fd39be3f1bc8aef,     //   0.95191,   0.30639
+    0x3fee7227db6a9744,     0x3fd3b3cefa0414b7,     //   0.95144,   0.30785
+    0x3fee6e472911da27,     0x3fd3cbb6f87a146e,     //   0.95096,   0.30931
+    0x3fee6a61c55d53a7,     0x3fd3e39be96ec271,     //   0.95049,   0.31077
+    0x3fee6677b0e6d31e,     0x3fd3fb7dc932cfa4,     //   0.95001,   0.31222
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     //   0.94953,   0.31368
+    0x3fee5e95781ebf1c,     0x3fd42b38466e2928,     //   0.94905,   0.31514
+    0x3fee5a9d550467d3,     0x3fd44310dc8936f0,     //   0.94856,   0.31659
+    0x3fee56a083968eb1,     0x3fd45ae652bb2800,     //   0.94807,   0.31805
+    0x3fee529f04729ffc,     0x3fd472b8a5571054,     //   0.94759,    0.3195
+    0x3fee4e98d836c0af,     0x3fd48a87d0b07fd7,     //   0.94709,   0.32096
+    0x3fee4a8dff81ce5e,     0x3fd4a253d11b82f3,     //    0.9466,   0.32241
+    0x3fee467e7af35f23,     0x3fd4ba1ca2eca31c,     //   0.94611,   0.32386
+    0x3fee426a4b2bc17e,     0x3fd4d1e24278e76a,     //   0.94561,   0.32531
+    0x3fee3e5170cbfc46,     0x3fd4e9a4ac15d520,     //   0.94511,   0.32676
+    0x3fee3a33ec75ce85,     0x3fd50163dc197047,     //    0.9446,   0.32821
+    0x3fee3611becbaf69,     0x3fd5191fceda3c35,     //    0.9441,   0.32966
+    0x3fee31eae870ce25,     0x3fd530d880af3c24,     //   0.94359,   0.33111
+    0x3fee2dbf6a0911d9,     0x3fd5488dedeff3be,     //   0.94308,   0.33255
+    0x3fee298f4439197a,     0x3fd5604012f467b4,     //   0.94257,     0.334
+    0x3fee255a77a63bb8,     0x3fd577eeec151e47,     //   0.94206,   0.33545
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //   0.94154,   0.33689
+    0x3fee1ce2ecd0c0d8,     0x3fd5a742ac0ff78d,     //   0.94103,   0.33833
+    0x3fee18a02fdc66d9,     0x3fd5bee78b9db3b6,     //   0.94051,   0.33978
+    0x3fee1458cec1ad83,     0x3fd5d68910aee686,     //   0.93998,   0.34122
+    0x3fee100cca2980ac,     0x3fd5ee27379ea693,     //   0.93946,   0.34266
+    0x3fee0bbc22bd8349,     0x3fd605c1fcc88f63,     //   0.93893,    0.3441
+    0x3fee0766d9280f54,     0x3fd61d595c88c203,     //    0.9384,   0.34554
+    0x3fee030cee1435b8,     0x3fd634ed533be58e,     //   0.93787,   0.34698
+    0x3fedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //   0.93734,   0.34842
+    0x3fedfa4b3621271d,     0x3fd6640af6f03d9e,     //    0.9368,   0.34986
+    0x3fedf5e36a9ba59c,     0x3fd67b949cad63ca,     //   0.93627,   0.35129
+    0x3fedf177004b2534,     0x3fd6931acad55f51,     //   0.93573,   0.35273
+    0x3feded05f7de47da,     0x3fd6aa9d7dc77e16,     //   0.93518,   0.35416
+    0x3fede890520465ce,     0x3fd6c21cb1e39771,     //   0.93464,    0.3556
+    0x3fede4160f6d8d81,     0x3fd6d998638a0cb5,     //   0.93409,   0.35703
+    0x3feddf9730ca837b,     0x3fd6f1108f1bc9c5,     //   0.93354,   0.35846
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     //   0.93299,    0.3599
+    0x3fedd68ba2267a25,     0x3fd71ff6458782ec,     //   0.93244,   0.36133
+    0x3fedd1fef38a915a,     0x3fd73763c9261092,     //   0.93188,   0.36276
+    0x3fedcd6dabaca3a5,     0x3fd74ecdb8390a3e,     //   0.93133,   0.36418
+    0x3fedc8d7cb410260,     0x3fd766340f2418f6,     //   0.93077,   0.36561
+    0x3fedc43d52fcb453,     0x3fd77d96ca4b73a6,     //   0.93021,   0.36704
+    0x3fedbf9e4395759a,     0x3fd794f5e613dfae,     //   0.92964,   0.36847
+    0x3fedbafa9dc1b78d,     0x3fd7ac515ee2b172,     //   0.92907,   0.36989
+    0x3fedb6526238a09b,     0x3fd7c3a9311dcce7,     //   0.92851,   0.37132
+    0x3fedb1a591b20c38,     0x3fd7dafd592ba621,     //   0.92794,   0.37274
+    0x3fedacf42ce68ab9,     0x3fd7f24dd37341e3,     //   0.92736,   0.37416
+    0x3feda83e348f613b,     0x3fd8099a9c5c362d,     //   0.92679,   0.37559
+    0x3feda383a9668988,     0x3fd820e3b04eaac4,     //   0.92621,   0.37701
+    0x3fed9ec48c26b1f3,     0x3fd838290bb359c8,     //   0.92563,   0.37843
+    0x3fed9a00dd8b3d46,     0x3fd84f6aaaf3903f,     //   0.92505,   0.37985
+    0x3fed95389e50429b,     0x3fd866a88a792ea0,     //   0.92447,   0.38127
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //   0.92388,   0.38268
+    0x3fed8b9a70ef9cb4,     0x3fd89518fbff098e,     //   0.92329,    0.3841
+    0x3fed86c48445a450,     0x3fd8ac4b86d5ed44,     //    0.9227,   0.38552
+    0x3fed81ea09f38b63,     0x3fd8c37a439f884f,     //   0.92211,   0.38693
+    0x3fed7d0b02b8ecf9,     0x3fd8daa52ec8a4af,     //   0.92151,   0.38835
+    0x3fed78276f5617c6,     0x3fd8f1cc44bea329,     //   0.92092,   0.38976
+    0x3fed733f508c0dff,     0x3fd908ef81ef7bd1,     //   0.92032,   0.39117
+    0x3fed6e52a71c8547,     0x3fd9200ee2c9be97,     //   0.91972,   0.39258
+    0x3fed696173c9e68b,     0x3fd9372a63bc93d7,     //   0.91911,   0.39399
+    0x3fed646bb7574de5,     0x3fd94e420137bce3,     //   0.91851,    0.3954
+    0x3fed5f7172888a7f,     0x3fd96555b7ab948f,     //    0.9179,   0.39681
+    0x3fed5a72a6221e73,     0x3fd97c6583890fc2,     //   0.91729,   0.39822
+    0x3fed556f52e93eb1,     0x3fd993716141bdfe,     //   0.91668,   0.39962
+    0x3fed506779a3d2d9,     0x3fd9aa794d47c9ee,     //   0.91606,   0.40103
+    0x3fed4b5b1b187524,     0x3fd9c17d440df9f2,     //   0.91545,   0.40243
+    0x3fed464a380e7242,     0x3fd9d87d4207b0ab,     //   0.91483,   0.40384
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //   0.91421,   0.40524
+    0x3fed3c1ae79f2b4e,     0x3fda067145664d57,     //   0.91359,   0.40664
+    0x3fed36fc7bcbfbdc,     0x3fda1d6543b50ac0,     //   0.91296,   0.40804
+    0x3fed31d98e9e503a,     0x3fda34553b0afee5,     //   0.91234,   0.40944
+    0x3fed2cb220e0ef9f,     0x3fda4b4127dea1e4,     //   0.91171,   0.41084
+    0x3fed2786335f52fc,     0x3fda622906a70b63,     //   0.91107,   0.41224
+    0x3fed2255c6e5a4e1,     0x3fda790cd3dbf31a,     //   0.91044,   0.41364
+    0x3fed1d20dc40c15c,     0x3fda8fec8bf5b166,     //   0.90981,   0.41503
+    0x3fed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //   0.90917,   0.41643
+    0x3fed12a98fac410c,     0x3fdabd9faebc3980,     //   0.90853,   0.41782
+    0x3fed0d672f59d2b9,     0x3fdad473125cdc08,     //   0.90789,   0.41922
+    0x3fed082054168bac,     0x3fdaeb4252ca07ab,     //   0.90724,   0.42061
+    0x3fed02d4feb2bd92,     0x3fdb020d6c7f4009,     //    0.9066,     0.422
+    0x3fecfd852fff6ad4,     0x3fdb18d45bf8aca6,     //   0.90595,   0.42339
+    0x3fecf830e8ce467b,     0x3fdb2f971db31972,     //    0.9053,   0.42478
+    0x3fecf2d829f1b40e,     0x3fdb4655ae2bf757,     //   0.90464,   0.42617
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //   0.90399,   0.42756
+    0x3fece819488344ce,     0x3fdb73c62d520624,     //   0.90333,   0.42894
+    0x3fece2b32799a060,     0x3fdb8a7814fd5693,     //   0.90267,   0.43033
+    0x3fecdd489254fe65,     0x3fdba125bd63583e,     //   0.90201,   0.43171
+    0x3fecd7d9898b32f6,     0x3fdbb7cf2304bd01,     //   0.90135,   0.43309
+    0x3fecd2660e12c1e6,     0x3fdbce744262deee,     //   0.90068,   0.43448
+    0x3fecccee20c2de9f,     0x3fdbe51517ffc0d9,     //   0.90002,   0.43586
+    0x3fecc771c2736c09,     0x3fdbfbb1a05e0edc,     //   0.89935,   0.43724
+    0x3fecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //   0.89867,   0.43862
+    0x3fecbc6bb638d10b,     0x3fdc28ddbb6cf145,     //     0.898,   0.43999
+    0x3fecb6e20a00da99,     0x3fdc3f6d47263129,     //   0.89732,   0.44137
+    0x3fecb153f02fb87d,     0x3fdc55f877b23537,     //   0.89665,   0.44275
+    0x3fecabc169a0b901,     0x3fdc6c7f4997000a,     //   0.89597,   0.44412
+    0x3feca62a772fd919,     0x3fdc8301b95b40c2,     //   0.89528,    0.4455
+    0x3feca08f19b9c449,     0x3fdc997fc3865388,     //    0.8946,   0.44687
+    0x3fec9aef521bd480,     0x3fdcaff964a0421d,     //   0.89391,   0.44824
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     //   0.89322,   0.44961
+    0x3fec8fa287e13305,     0x3fdcdcdf5dc440ce,     //   0.89253,   0.45098
+    0x3fec89f587029c13,     0x3fdcf34baee1cd21,     //   0.89184,   0.45235
+    0x3fec84441f785f61,     0x3fdd09b389152ec1,     //   0.89115,   0.45372
+    0x3fec7e8e52233cf3,     0x3fdd2016e8e9db5b,     //   0.89045,   0.45508
+    0x3fec78d41fe4a267,     0x3fdd3675caebf962,     //   0.88975,   0.45645
+    0x3fec7315899eaad7,     0x3fdd4cd02ba8609c,     //   0.88905,   0.45781
+    0x3fec6d5290341eb2,     0x3fdd632607ac9aa9,     //   0.88835,   0.45918
+    0x3fec678b3488739b,     0x3fdd79775b86e389,     //   0.88764,   0.46054
+    0x3fec61bf777fcc48,     0x3fdd8fc423c62a25,     //   0.88693,    0.4619
+    0x3fec5bef59fef85a,     0x3fdda60c5cfa10d8,     //   0.88622,   0.46326
+    0x3fec561adceb743e,     0x3fddbc5003b2edf8,     //   0.88551,   0.46462
+    0x3fec5042012b6907,     0x3fddd28f1481cc58,     //    0.8848,   0.46598
+    0x3fec4a64c7a5ac4c,     0x3fdde8c98bf86bd6,     //   0.88408,   0.46733
+    0x3fec44833141c004,     0x3fddfeff66a941de,     //   0.88336,   0.46869
+    0x3fec3e9d3ee7d262,     0x3fde1530a12779f4,     //   0.88264,   0.47004
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //   0.88192,    0.4714
+    0x3fec32c449f60831,     0x3fde418527dc4ffa,     //    0.8812,   0.47275
+    0x3fec2cd14931e3f1,     0x3fde57a86d3cd824,     //   0.88047,    0.4741
+    0x3fec26d9f01f2eaf,     0x3fde6dc704be97e2,     //   0.87974,   0.47545
+    0x3fec20de3fa971b0,     0x3fde83e0eaf85113,     //   0.87901,    0.4768
+    0x3fec1ade38bce19b,     0x3fde99f61c817eda,     //   0.87828,   0.47815
+    0x3fec14d9dc465e58,     0x3fdeb00695f25620,     //   0.87755,   0.47949
+    0x3fec0ed12b3372e9,     0x3fdec61253e3c61b,     //   0.87681,   0.48084
+    0x3fec08c426725549,     0x3fdedc1952ef78d5,     //   0.87607,   0.48218
+    0x3fec02b2cef1e641,     0x3fdef21b8fafd3b5,     //   0.87533,   0.48353
+    0x3febfc9d25a1b147,     0x3fdf081906bff7fd,     //   0.87459,   0.48487
+    0x3febf6832b71ec5b,     0x3fdf1e11b4bbc35c,     //   0.87384,   0.48621
+    0x3febf064e15377dd,     0x3fdf3405963fd068,     //   0.87309,   0.48755
+    0x3febea424837de6d,     0x3fdf49f4a7e97729,     //   0.87235,   0.48889
+    0x3febe41b611154c1,     0x3fdf5fdee656cda3,     //    0.8716,   0.49023
+    0x3febddf02cd2b983,     0x3fdf75c44e26a852,     //   0.87084,   0.49156
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //   0.87009,    0.4929
+    0x3febd18ce0dc19d6,     0x3fdfa1808c6cf7e0,     //   0.86933,   0.49423
+    0x3febcb54cb0d2327,     0x3fdfb7575c24d2de,     //   0.86857,   0.49557
+    0x3febc5186bf8361d,     0x3fdfcd2947c1ff57,     //   0.86781,    0.4969
+    0x3febbed7c49380ea,     0x3fdfe2f64be7120f,     //   0.86705,   0.49823
+    0x3febb892d5d5dad5,     0x3fdff8be6537615e,     //   0.86628,   0.49956
+    0x3febb249a0b6c40d,     0x3fe00740c82b82e0,     //   0.86551,   0.50089
+    0x3febabfc262e6586,     0x3fe0121fe4f56d2c,     //   0.86474,   0.50221
+    0x3feba5aa673590d2,     0x3fe01cfc874c3eb7,     //   0.86397,   0.50354
+    0x3feb9f5464c5bffc,     0x3fe027d6ad83287e,     //    0.8632,   0.50486
+    0x3feb98fa1fd9155e,     0x3fe032ae55edbd95,     //   0.86242,   0.50619
+    0x3feb929b996a5b7f,     0x3fe03d837edff370,     //   0.86165,   0.50751
+    0x3feb8c38d27504e9,     0x3fe0485626ae221a,     //   0.86087,   0.50883
+    0x3feb85d1cbf52c02,     0x3fe053264bad0483,     //   0.86009,   0.51015
+    0x3feb7f6686e792ea,     0x3fe05df3ec31b8b6,     //    0.8593,   0.51147
+    0x3feb78f70449a34b,     0x3fe068bf0691c028,     //   0.85852,   0.51279
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //   0.85773,    0.5141
+    0x3feb6c0b4a55ac17,     0x3fe07e4da23bc102,     //   0.85694,   0.51542
+    0x3feb658f14fdbc47,     0x3fe089112032b08c,     //   0.85615,   0.51673
+    0x3feb5f0ea611a532,     0x3fe093d2115ee018,     //   0.85535,   0.51804
+    0x3feb5889fe921405,     0x3fe09e907417c5e1,     //   0.85456,   0.51936
+    0x3feb52011f805c92,     0x3fe0a94c46b53d0b,     //   0.85376,   0.52067
+    0x3feb4b7409de7925,     0x3fe0b405878f85ec,     //   0.85296,   0.52198
+    0x3feb44e2beaf0a61,     0x3fe0bebc34ff4646,     //   0.85216,   0.52328
+    0x3feb3e4d3ef55712,     0x3fe0c9704d5d898f,     //   0.85136,   0.52459
+    0x3feb37b38bb54c09,     0x3fe0d421cf03c12b,     //   0.85055,    0.5259
+    0x3feb3115a5f37bf4,     0x3fe0ded0b84bc4b5,     //   0.84974,    0.5272
+    0x3feb2a738eb51f33,     0x3fe0e97d078fd23b,     //   0.84893,    0.5285
+    0x3feb23cd470013b4,     0x3fe0f426bb2a8e7d,     //   0.84812,    0.5298
+    0x3feb1d22cfdadcc6,     0x3fe0fecdd1770537,     //   0.84731,    0.5311
+    0x3feb16742a4ca2f5,     0x3fe1097248d0a956,     //   0.84649,    0.5324
+    0x3feb0fc1575d33db,     0x3fe114141f935545,     //   0.84567,    0.5337
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     //   0.84485,     0.535
+    0x3feb024f2d7d24a9,     0x3fe1294fe4c5350a,     //   0.84403,   0.53629
+    0x3feafb8fd89f57b6,     0x3fe133e9cfee254e,     //   0.84321,   0.53759
+    0x3feaf4cc5a85fb73,     0x3fe13e8113f396c1,     //   0.84238,   0.53888
+    0x3feaee04b43c1474,     0x3fe14915af336ceb,     //   0.84155,   0.54017
+    0x3feae738e6cd4b67,     0x3fe153a7a00bf453,     //   0.84073,   0.54146
+    0x3feae068f345ecef,     0x3fe15e36e4dbe2bc,     //   0.83989,   0.54275
+    0x3fead994dab2e979,     0x3fe168c37c025764,     //   0.83906,   0.54404
+    0x3fead2bc9e21d511,     0x3fe1734d63dedb49,     //   0.83822,   0.54532
+    0x3feacbe03ea0e73b,     0x3fe17dd49ad16161,     //   0.83739,   0.54661
+    0x3feac4ffbd3efac8,     0x3fe188591f3a46e5,     //   0.83655,   0.54789
+    0x3feabe1b1b0b8dac,     0x3fe192daef7a5386,     //   0.83571,   0.54918
+    0x3feab7325916c0d4,     0x3fe19d5a09f2b9b8,     //   0.83486,   0.55046
+    0x3feab045787157ff,     0x3fe1a7d66d0516e6,     //   0.83402,   0.55174
+    0x3feaa9547a2cb98e,     0x3fe1b250171373be,     //   0.83317,   0.55302
+    0x3feaa25f5f5aee60,     0x3fe1bcc706804467,     //   0.83232,   0.55429
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //   0.83147,   0.55557
+    0x3fea9468d85b20ae,     0x3fe1d1acaf012cc2,     //   0.83062,   0.55685
+    0x3fea8d676e545ad2,     0x3fe1dc1b64dc4872,     //   0.82976,   0.55812
+    0x3fea8661ec0ee133,     0x3fe1e68759a3e074,     //    0.8289,   0.55939
+    0x3fea7f58529fe69d,     0x3fe1f0f08bbc861b,     //   0.82805,   0.56066
+    0x3fea784aa31d3f55,     0x3fe1fb56f98b37b8,     //   0.82718,   0.56193
+    0x3fea7138de9d60f5,     0x3fe205baa17560d6,     //   0.82632,    0.5632
+    0x3fea6a230637623b,     0x3fe2101b81e0da78,     //   0.82546,   0.56447
+    0x3fea63091b02fae2,     0x3fe21a799933eb58,     //   0.82459,   0.56573
+    0x3fea5beb1e188375,     0x3fe224d4e5d5482e,     //   0.82372,     0.567
+    0x3fea54c91090f524,     0x3fe22f2d662c13e1,     //   0.82285,   0.56826
+    0x3fea4da2f385e997,     0x3fe23983189fdfd5,     //   0.82198,   0.56952
+    0x3fea4678c8119ac8,     0x3fe243d5fb98ac1f,     //    0.8211,   0.57078
+    0x3fea3f4a8f4ee2d2,     0x3fe24e260d7ee7c9,     //   0.82023,   0.57204
+    0x3fea38184a593bc6,     0x3fe258734cbb7110,     //   0.81935,    0.5733
+    0x3fea30e1fa4cbf81,     0x3fe262bdb7b795a2,     //   0.81847,   0.57455
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     //   0.81758,   0.57581
+    0x3fea22693d62ccb9,     0x3fe2774a0a961612,     //    0.8167,   0.57706
+    0x3fea1b26d2c0a75e,     0x3fe2818bef4d3cba,     //   0.81581,   0.57831
+    0x3fea13e0617e4ec7,     0x3fe28bcaf96d94ba,     //   0.81493,   0.57956
+    0x3fea0c95eabaf937,     0x3fe2960727629ca8,     //   0.81404,   0.58081
+    0x3fea05476f967bb5,     0x3fe2a040779843fb,     //   0.81314,   0.58206
+    0x3fe9fdf4f13149de,     0x3fe2aa76e87aeb58,     //   0.81225,   0.58331
+    0x3fe9f69e70ac75bc,     0x3fe2b4aa787764c4,     //   0.81135,   0.58455
+    0x3fe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //   0.81046,    0.5858
+    0x3fe9e7e56dcb45bd,     0x3fe2c908ef734e57,     //   0.80956,   0.58704
+    0x3fe9e082edb42472,     0x3fe2d333d34e9bb7,     //   0.80866,   0.58828
+    0x3fe9d91c7007d5a6,     0x3fe2dd5bcffb7616,     //   0.80775,   0.58952
+    0x3fe9d1b1f5ea80d6,     0x3fe2e780e3e8ea16,     //   0.80685,   0.59076
+    0x3fe9ca438080eadb,     0x3fe2f1a30d86773a,     //   0.80594,     0.592
+    0x3fe9c2d110f075c3,     0x3fe2fbc24b441015,     //   0.80503,   0.59323
+    0x3fe9bb5aa85f2098,     0x3fe305de9b921a94,     //   0.80412,   0.59447
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //   0.80321,    0.5957
+    0x3fe9ac61f0d4e247,     0x3fe31a0e6da35e44,     //   0.80229,   0.59693
+    0x3fe9a4dfa42b06b2,     0x3fe32421ec49a620,     //   0.80138,   0.59816
+    0x3fe99d59631e65d5,     0x3fe32e3277467d6b,     //   0.80046,   0.59939
+    0x3fe995cf2ed80d22,     0x3fe338400d0c8e57,     //   0.79954,   0.60062
+    0x3fe98e410881a600,     0x3fe3424aac0ef7d6,     //   0.79861,   0.60184
+    0x3fe986aef1457594,     0x3fe34c5252c14de1,     //   0.79769,   0.60307
+    0x3fe97f18ea4e5c9e,     0x3fe35656ff9799ae,     //   0.79676,   0.60429
+    0x3fe9777ef4c7d742,     0x3fe36058b10659f3,     //   0.79584,   0.60551
+    0x3fe96fe111ddfce0,     0x3fe36a576582831b,     //   0.79491,   0.60673
+    0x3fe9683f42bd7fe1,     0x3fe374531b817f8d,     //   0.79398,   0.60795
+    0x3fe960998893ad8c,     0x3fe37e4bd1792fe2,     //   0.79304,   0.60917
+    0x3fe958efe48e6dd7,     0x3fe3884185dfeb22,     //   0.79211,   0.61038
+    0x3fe9514257dc4335,     0x3fe39234372c7f04,     //   0.79117,    0.6116
+    0x3fe94990e3ac4a6c,     0x3fe39c23e3d63029,     //   0.79023,   0.61281
+    0x3fe941db892e3a65,     0x3fe3a6108a54ba58,     //   0.78929,   0.61402
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     //   0.78835,   0.61523
+    0x3fe932652609b1cf,     0x3fe3b9e0beb19e18,     //    0.7874,   0.61644
+    0x3fe92aa41fc5a815,     0x3fe3c3c44981c517,     //   0.78646,   0.61765
+    0x3fe922df37f8646a,     0x3fe3cda4c80a6076,     //   0.78551,   0.61885
+    0x3fe91b166fd49da2,     0x3fe3d78238c58343,     //   0.78456,   0.62006
+    0x3fe91349c88da398,     0x3fe3e15c9a2db922,     //    0.7836,   0.62126
+    0x3fe90b7943575efe,     0x3fe3eb33eabe0680,     //   0.78265,   0.62246
+    0x3fe903a4e1665133,     0x3fe3f50828f1e8d2,     //   0.78169,   0.62366
+    0x3fe8fbcca3ef940d,     0x3fe3fed9534556d4,     //   0.78074,   0.62486
+    0x3fe8f3f08c28d9ac,     0x3fe408a76834c0c0,     //   0.77978,   0.62606
+    0x3fe8ec109b486c49,     0x3fe41272663d108c,     //   0.77882,   0.62725
+    0x3fe8e42cd2852e0a,     0x3fe41c3a4bdbaa26,     //   0.77785,   0.62845
+    0x3fe8dc45331698cc,     0x3fe425ff178e6bb1,     //   0.77689,   0.62964
+    0x3fe8d459be34bdfa,     0x3fe42fc0c7d3adbb,     //   0.77592,   0.63083
+    0x3fe8cc6a75184655,     0x3fe4397f5b2a4380,     //   0.77495,   0.63202
+    0x3fe8c47758fa71cb,     0x3fe4433ad0117b1d,     //   0.77398,   0.63321
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //   0.77301,   0.63439
+    0x3fe8b485aca2a468,     0x3fe456a858917046,     //   0.77204,   0.63558
+    0x3fe8ac871ede1d88,     0x3fe4605a692b32a2,     //   0.77106,   0.63676
+    0x3fe8a484c3031d50,     0x3fe46a095557a0f1,     //   0.77008,   0.63794
+    0x3fe89c7e9a4dd4ab,     0x3fe473b51b987347,     //    0.7691,   0.63912
+    0x3fe89474a5fb0a84,     0x3fe47d5dba6fde01,     //   0.76812,    0.6403
+    0x3fe88c66e7481ba1,     0x3fe48703306091fe,     //   0.76714,   0.64148
+    0x3fe884555f72fa6b,     0x3fe490a57bedbcdf,     //   0.76615,   0.64266
+    0x3fe87c400fba2ebf,     0x3fe49a449b9b0938,     //   0.76517,   0.64383
+    0x3fe87426f95cd5bd,     0x3fe4a3e08dec9ed6,     //   0.76418,     0.645
+    0x3fe86c0a1d9aa195,     0x3fe4ad79516722f0,     //   0.76319,   0.64618
+    0x3fe863e97db3d95a,     0x3fe4b70ee48fb869,     //    0.7622,   0.64735
+    0x3fe85bc51ae958cc,     0x3fe4c0a145ec0004,     //    0.7612,   0.64851
+    0x3fe8539cf67c9029,     0x3fe4ca30740218a3,     //   0.76021,   0.64968
+    0x3fe84b7111af83f9,     0x3fe4d3bc6d589f80,     //   0.75921,   0.65085
+    0x3fe843416dc4cce2,     0x3fe4dd453076b064,     //   0.75821,   0.65201
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //   0.75721,   0.65317
+    0x3fe832d6eda3a3e0,     0x3fe4f04d0e2859aa,     //   0.75621,   0.65433
+    0x3fe82a9c13f545ff,     0x3fe4f9cc25cca486,     //    0.7552,   0.65549
+    0x3fe8225d803964e5,     0x3fe503480159ded2,     //   0.75419,   0.65665
+    0x3fe81a1b33b57acc,     0x3fe50cc09f59a09b,     //   0.75319,   0.65781
+    0x3fe811d52faf94dc,     0x3fe51635fe5601d7,     //   0.75218,   0.65896
+    0x3fe8098b756e52fa,     0x3fe51fa81cd99aa6,     //   0.75117,   0.66011
+    0x3fe8013e0638e795,     0x3fe52916f96f8388,     //   0.75015,   0.66127
+    0x3fe7f8ece3571771,     0x3fe5328292a35596,     //   0.74914,   0.66242
+    0x3fe7f0980e113978,     0x3fe53beae7012abe,     //   0.74812,   0.66356
+    0x3fe7e83f87b03686,     0x3fe5454ff5159dfb,     //    0.7471,   0.66471
+    0x3fe7dfe3517d8937,     0x3fe54eb1bb6dcb8f,     //   0.74608,   0.66586
+    0x3fe7d7836cc33db2,     0x3fe5581038975137,     //   0.74506,     0.667
+    0x3fe7cf1fdacbf179,     0x3fe5616b6b204e6e,     //   0.74403,   0.66814
+    0x3fe7c6b89ce2d333,     0x3fe56ac35197649e,     //   0.74301,   0.66928
+    0x3fe7be4db453a27c,     0x3fe57417ea8bb75c,     //   0.74198,   0.67042
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //   0.74095,   0.67156
+    0x3fe7ad6ce874dbb6,     0x3fe586b72e2b2cfd,     //   0.73992,   0.67269
+    0x3fe7a4f707bf97d2,     0x3fe59001d5f723df,     //   0.73889,   0.67383
+    0x3fe79c7d8198e56e,     0x3fe599492a81ffbc,     //   0.73785,   0.67496
+    0x3fe79400574f55e4,     0x3fe5a28d2a5d7250,     //   0.73682,   0.67609
+    0x3fe78b7f8a320a52,     0x3fe5abcdd41bb0d8,     //   0.73578,   0.67722
+    0x3fe782fb1b90b35b,     0x3fe5b50b264f7448,     //   0.73474,   0.67835
+    0x3fe77a730cbb9100,     0x3fe5be451f8bf980,     //    0.7337,   0.67948
+    0x3fe771e75f037261,     0x3fe5c77bbe65018c,     //   0.73265,    0.6806
+    0x3fe7695813b9b594,     0x3fe5d0af016ed1d4,     //   0.73161,   0.68172
+    0x3fe760c52c304764,     0x3fe5d9dee73e345c,     //   0.73056,   0.68285
+    0x3fe7582ea9b9a329,     0x3fe5e30b6e6877f3,     //   0.72951,   0.68397
+    0x3fe74f948da8d28d,     0x3fe5ec3495837074,     //   0.72846,   0.68508
+    0x3fe746f6d9516d59,     0x3fe5f55a5b2576f8,     //   0.72741,    0.6862
+    0x3fe73e558e079942,     0x3fe5fe7cbde56a0f,     //   0.72636,   0.68732
+    0x3fe735b0ad2009b2,     0x3fe6079bbc5aadfa,     //    0.7253,   0.68843
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     //   0.72425,   0.68954
+    0x3fe7245c2fcd492a,     0x3fe619cf86c55702,     //   0.72319,   0.69065
+    0x3fe71bac960e41bf,     0x3fe622e44fec22ff,     //   0.72213,   0.69176
+    0x3fe712f96c09d18d,     0x3fe62bf5af2b0dfd,     //   0.72107,   0.69287
+    0x3fe70a42b3176d7a,     0x3fe63503a31c1be8,     //      0.72,   0.69397
+    0x3fe701886c8f16e6,     0x3fe63e0e2a59d7aa,     //   0.71894,   0.69508
+    0x3fe6f8ca99c95b75,     0x3fe64715437f535b,     //   0.71787,   0.69618
+    0x3fe6f0093c1f54de,     0x3fe65018ed28287f,     //    0.7168,   0.69728
+    0x3fe6e74454eaa8ae,     0x3fe6591925f0783e,     //   0.71573,   0.69838
+    0x3fe6de7be585881d,     0x3fe66215ec74eb91,     //   0.71466,   0.69947
+    0x3fe6d5afef4aafcc,     0x3fe66b0f3f52b386,     //   0.71358,   0.70057
+    0x3fe6cce07395679f,     0x3fe674051d27896c,     //   0.71251,   0.70166
+    0x3fe6c40d73c18275,     0x3fe67cf78491af10,     //   0.71143,   0.70275
+    0x3fe6bb36f12b5e06,     0x3fe685e6742feeef,     //   0.71035,   0.70385
+    0x3fe6b25ced2fe29c,     0x3fe68ed1eaa19c71,     //   0.70927,   0.70493
+    0x3fe6a97f692c82ea,     0x3fe697b9e686941c,     //   0.70819,   0.70602
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //   0.70711,   0.70711
+    0x3fe697b9e686941c,     0x3fe6a97f692c82ea,     //   0.70602,   0.70819
+    0x3fe68ed1eaa19c71,     0x3fe6b25ced2fe29c,     //   0.70493,   0.70927
+    0x3fe685e6742feeef,     0x3fe6bb36f12b5e06,     //   0.70385,   0.71035
+    0x3fe67cf78491af10,     0x3fe6c40d73c18275,     //   0.70275,   0.71143
+    0x3fe674051d27896c,     0x3fe6cce07395679f,     //   0.70166,   0.71251
+    0x3fe66b0f3f52b386,     0x3fe6d5afef4aafcc,     //   0.70057,   0.71358
+    0x3fe66215ec74eb91,     0x3fe6de7be585881d,     //   0.69947,   0.71466
+    0x3fe6591925f0783e,     0x3fe6e74454eaa8ae,     //   0.69838,   0.71573
+    0x3fe65018ed28287f,     0x3fe6f0093c1f54de,     //   0.69728,    0.7168
+    0x3fe64715437f535b,     0x3fe6f8ca99c95b75,     //   0.69618,   0.71787
+    0x3fe63e0e2a59d7aa,     0x3fe701886c8f16e6,     //   0.69508,   0.71894
+    0x3fe63503a31c1be8,     0x3fe70a42b3176d7a,     //   0.69397,      0.72
+    0x3fe62bf5af2b0dfd,     0x3fe712f96c09d18d,     //   0.69287,   0.72107
+    0x3fe622e44fec22ff,     0x3fe71bac960e41bf,     //   0.69176,   0.72213
+    0x3fe619cf86c55702,     0x3fe7245c2fcd492a,     //   0.69065,   0.72319
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     //   0.68954,   0.72425
+    0x3fe6079bbc5aadfa,     0x3fe735b0ad2009b2,     //   0.68843,    0.7253
+    0x3fe5fe7cbde56a0f,     0x3fe73e558e079942,     //   0.68732,   0.72636
+    0x3fe5f55a5b2576f8,     0x3fe746f6d9516d59,     //    0.6862,   0.72741
+    0x3fe5ec3495837074,     0x3fe74f948da8d28d,     //   0.68508,   0.72846
+    0x3fe5e30b6e6877f3,     0x3fe7582ea9b9a329,     //   0.68397,   0.72951
+    0x3fe5d9dee73e345c,     0x3fe760c52c304764,     //   0.68285,   0.73056
+    0x3fe5d0af016ed1d4,     0x3fe7695813b9b594,     //   0.68172,   0.73161
+    0x3fe5c77bbe65018c,     0x3fe771e75f037261,     //    0.6806,   0.73265
+    0x3fe5be451f8bf980,     0x3fe77a730cbb9100,     //   0.67948,    0.7337
+    0x3fe5b50b264f7448,     0x3fe782fb1b90b35b,     //   0.67835,   0.73474
+    0x3fe5abcdd41bb0d8,     0x3fe78b7f8a320a52,     //   0.67722,   0.73578
+    0x3fe5a28d2a5d7250,     0x3fe79400574f55e4,     //   0.67609,   0.73682
+    0x3fe599492a81ffbc,     0x3fe79c7d8198e56e,     //   0.67496,   0.73785
+    0x3fe59001d5f723df,     0x3fe7a4f707bf97d2,     //   0.67383,   0.73889
+    0x3fe586b72e2b2cfd,     0x3fe7ad6ce874dbb6,     //   0.67269,   0.73992
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //   0.67156,   0.74095
+    0x3fe57417ea8bb75c,     0x3fe7be4db453a27c,     //   0.67042,   0.74198
+    0x3fe56ac35197649e,     0x3fe7c6b89ce2d333,     //   0.66928,   0.74301
+    0x3fe5616b6b204e6e,     0x3fe7cf1fdacbf179,     //   0.66814,   0.74403
+    0x3fe5581038975137,     0x3fe7d7836cc33db2,     //     0.667,   0.74506
+    0x3fe54eb1bb6dcb8f,     0x3fe7dfe3517d8937,     //   0.66586,   0.74608
+    0x3fe5454ff5159dfb,     0x3fe7e83f87b03686,     //   0.66471,    0.7471
+    0x3fe53beae7012abe,     0x3fe7f0980e113978,     //   0.66356,   0.74812
+    0x3fe5328292a35596,     0x3fe7f8ece3571771,     //   0.66242,   0.74914
+    0x3fe52916f96f8388,     0x3fe8013e0638e795,     //   0.66127,   0.75015
+    0x3fe51fa81cd99aa6,     0x3fe8098b756e52fa,     //   0.66011,   0.75117
+    0x3fe51635fe5601d7,     0x3fe811d52faf94dc,     //   0.65896,   0.75218
+    0x3fe50cc09f59a09b,     0x3fe81a1b33b57acc,     //   0.65781,   0.75319
+    0x3fe503480159ded2,     0x3fe8225d803964e5,     //   0.65665,   0.75419
+    0x3fe4f9cc25cca486,     0x3fe82a9c13f545ff,     //   0.65549,    0.7552
+    0x3fe4f04d0e2859aa,     0x3fe832d6eda3a3e0,     //   0.65433,   0.75621
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //   0.65317,   0.75721
+    0x3fe4dd453076b064,     0x3fe843416dc4cce2,     //   0.65201,   0.75821
+    0x3fe4d3bc6d589f80,     0x3fe84b7111af83f9,     //   0.65085,   0.75921
+    0x3fe4ca30740218a3,     0x3fe8539cf67c9029,     //   0.64968,   0.76021
+    0x3fe4c0a145ec0004,     0x3fe85bc51ae958cc,     //   0.64851,    0.7612
+    0x3fe4b70ee48fb869,     0x3fe863e97db3d95a,     //   0.64735,    0.7622
+    0x3fe4ad79516722f0,     0x3fe86c0a1d9aa195,     //   0.64618,   0.76319
+    0x3fe4a3e08dec9ed6,     0x3fe87426f95cd5bd,     //     0.645,   0.76418
+    0x3fe49a449b9b0938,     0x3fe87c400fba2ebf,     //   0.64383,   0.76517
+    0x3fe490a57bedbcdf,     0x3fe884555f72fa6b,     //   0.64266,   0.76615
+    0x3fe48703306091fe,     0x3fe88c66e7481ba1,     //   0.64148,   0.76714
+    0x3fe47d5dba6fde01,     0x3fe89474a5fb0a84,     //    0.6403,   0.76812
+    0x3fe473b51b987347,     0x3fe89c7e9a4dd4ab,     //   0.63912,    0.7691
+    0x3fe46a095557a0f1,     0x3fe8a484c3031d50,     //   0.63794,   0.77008
+    0x3fe4605a692b32a2,     0x3fe8ac871ede1d88,     //   0.63676,   0.77106
+    0x3fe456a858917046,     0x3fe8b485aca2a468,     //   0.63558,   0.77204
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //   0.63439,   0.77301
+    0x3fe4433ad0117b1d,     0x3fe8c47758fa71cb,     //   0.63321,   0.77398
+    0x3fe4397f5b2a4380,     0x3fe8cc6a75184655,     //   0.63202,   0.77495
+    0x3fe42fc0c7d3adbb,     0x3fe8d459be34bdfa,     //   0.63083,   0.77592
+    0x3fe425ff178e6bb1,     0x3fe8dc45331698cc,     //   0.62964,   0.77689
+    0x3fe41c3a4bdbaa26,     0x3fe8e42cd2852e0a,     //   0.62845,   0.77785
+    0x3fe41272663d108c,     0x3fe8ec109b486c49,     //   0.62725,   0.77882
+    0x3fe408a76834c0c0,     0x3fe8f3f08c28d9ac,     //   0.62606,   0.77978
+    0x3fe3fed9534556d4,     0x3fe8fbcca3ef940d,     //   0.62486,   0.78074
+    0x3fe3f50828f1e8d2,     0x3fe903a4e1665133,     //   0.62366,   0.78169
+    0x3fe3eb33eabe0680,     0x3fe90b7943575efe,     //   0.62246,   0.78265
+    0x3fe3e15c9a2db922,     0x3fe91349c88da398,     //   0.62126,    0.7836
+    0x3fe3d78238c58343,     0x3fe91b166fd49da2,     //   0.62006,   0.78456
+    0x3fe3cda4c80a6076,     0x3fe922df37f8646a,     //   0.61885,   0.78551
+    0x3fe3c3c44981c517,     0x3fe92aa41fc5a815,     //   0.61765,   0.78646
+    0x3fe3b9e0beb19e18,     0x3fe932652609b1cf,     //   0.61644,    0.7874
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     //   0.61523,   0.78835
+    0x3fe3a6108a54ba58,     0x3fe941db892e3a65,     //   0.61402,   0.78929
+    0x3fe39c23e3d63029,     0x3fe94990e3ac4a6c,     //   0.61281,   0.79023
+    0x3fe39234372c7f04,     0x3fe9514257dc4335,     //    0.6116,   0.79117
+    0x3fe3884185dfeb22,     0x3fe958efe48e6dd7,     //   0.61038,   0.79211
+    0x3fe37e4bd1792fe2,     0x3fe960998893ad8c,     //   0.60917,   0.79304
+    0x3fe374531b817f8d,     0x3fe9683f42bd7fe1,     //   0.60795,   0.79398
+    0x3fe36a576582831b,     0x3fe96fe111ddfce0,     //   0.60673,   0.79491
+    0x3fe36058b10659f3,     0x3fe9777ef4c7d742,     //   0.60551,   0.79584
+    0x3fe35656ff9799ae,     0x3fe97f18ea4e5c9e,     //   0.60429,   0.79676
+    0x3fe34c5252c14de1,     0x3fe986aef1457594,     //   0.60307,   0.79769
+    0x3fe3424aac0ef7d6,     0x3fe98e410881a600,     //   0.60184,   0.79861
+    0x3fe338400d0c8e57,     0x3fe995cf2ed80d22,     //   0.60062,   0.79954
+    0x3fe32e3277467d6b,     0x3fe99d59631e65d5,     //   0.59939,   0.80046
+    0x3fe32421ec49a620,     0x3fe9a4dfa42b06b2,     //   0.59816,   0.80138
+    0x3fe31a0e6da35e44,     0x3fe9ac61f0d4e247,     //   0.59693,   0.80229
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //    0.5957,   0.80321
+    0x3fe305de9b921a94,     0x3fe9bb5aa85f2098,     //   0.59447,   0.80412
+    0x3fe2fbc24b441015,     0x3fe9c2d110f075c3,     //   0.59323,   0.80503
+    0x3fe2f1a30d86773a,     0x3fe9ca438080eadb,     //     0.592,   0.80594
+    0x3fe2e780e3e8ea16,     0x3fe9d1b1f5ea80d6,     //   0.59076,   0.80685
+    0x3fe2dd5bcffb7616,     0x3fe9d91c7007d5a6,     //   0.58952,   0.80775
+    0x3fe2d333d34e9bb7,     0x3fe9e082edb42472,     //   0.58828,   0.80866
+    0x3fe2c908ef734e57,     0x3fe9e7e56dcb45bd,     //   0.58704,   0.80956
+    0x3fe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //    0.5858,   0.81046
+    0x3fe2b4aa787764c4,     0x3fe9f69e70ac75bc,     //   0.58455,   0.81135
+    0x3fe2aa76e87aeb58,     0x3fe9fdf4f13149de,     //   0.58331,   0.81225
+    0x3fe2a040779843fb,     0x3fea05476f967bb5,     //   0.58206,   0.81314
+    0x3fe2960727629ca8,     0x3fea0c95eabaf937,     //   0.58081,   0.81404
+    0x3fe28bcaf96d94ba,     0x3fea13e0617e4ec7,     //   0.57956,   0.81493
+    0x3fe2818bef4d3cba,     0x3fea1b26d2c0a75e,     //   0.57831,   0.81581
+    0x3fe2774a0a961612,     0x3fea22693d62ccb9,     //   0.57706,    0.8167
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     //   0.57581,   0.81758
+    0x3fe262bdb7b795a2,     0x3fea30e1fa4cbf81,     //   0.57455,   0.81847
+    0x3fe258734cbb7110,     0x3fea38184a593bc6,     //    0.5733,   0.81935
+    0x3fe24e260d7ee7c9,     0x3fea3f4a8f4ee2d2,     //   0.57204,   0.82023
+    0x3fe243d5fb98ac1f,     0x3fea4678c8119ac8,     //   0.57078,    0.8211
+    0x3fe23983189fdfd5,     0x3fea4da2f385e997,     //   0.56952,   0.82198
+    0x3fe22f2d662c13e1,     0x3fea54c91090f524,     //   0.56826,   0.82285
+    0x3fe224d4e5d5482e,     0x3fea5beb1e188375,     //     0.567,   0.82372
+    0x3fe21a799933eb58,     0x3fea63091b02fae2,     //   0.56573,   0.82459
+    0x3fe2101b81e0da78,     0x3fea6a230637623b,     //   0.56447,   0.82546
+    0x3fe205baa17560d6,     0x3fea7138de9d60f5,     //    0.5632,   0.82632
+    0x3fe1fb56f98b37b8,     0x3fea784aa31d3f55,     //   0.56193,   0.82718
+    0x3fe1f0f08bbc861b,     0x3fea7f58529fe69d,     //   0.56066,   0.82805
+    0x3fe1e68759a3e074,     0x3fea8661ec0ee133,     //   0.55939,    0.8289
+    0x3fe1dc1b64dc4872,     0x3fea8d676e545ad2,     //   0.55812,   0.82976
+    0x3fe1d1acaf012cc2,     0x3fea9468d85b20ae,     //   0.55685,   0.83062
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //   0.55557,   0.83147
+    0x3fe1bcc706804467,     0x3feaa25f5f5aee60,     //   0.55429,   0.83232
+    0x3fe1b250171373be,     0x3feaa9547a2cb98e,     //   0.55302,   0.83317
+    0x3fe1a7d66d0516e6,     0x3feab045787157ff,     //   0.55174,   0.83402
+    0x3fe19d5a09f2b9b8,     0x3feab7325916c0d4,     //   0.55046,   0.83486
+    0x3fe192daef7a5386,     0x3feabe1b1b0b8dac,     //   0.54918,   0.83571
+    0x3fe188591f3a46e5,     0x3feac4ffbd3efac8,     //   0.54789,   0.83655
+    0x3fe17dd49ad16161,     0x3feacbe03ea0e73b,     //   0.54661,   0.83739
+    0x3fe1734d63dedb49,     0x3fead2bc9e21d511,     //   0.54532,   0.83822
+    0x3fe168c37c025764,     0x3fead994dab2e979,     //   0.54404,   0.83906
+    0x3fe15e36e4dbe2bc,     0x3feae068f345ecef,     //   0.54275,   0.83989
+    0x3fe153a7a00bf453,     0x3feae738e6cd4b67,     //   0.54146,   0.84073
+    0x3fe14915af336ceb,     0x3feaee04b43c1474,     //   0.54017,   0.84155
+    0x3fe13e8113f396c1,     0x3feaf4cc5a85fb73,     //   0.53888,   0.84238
+    0x3fe133e9cfee254e,     0x3feafb8fd89f57b6,     //   0.53759,   0.84321
+    0x3fe1294fe4c5350a,     0x3feb024f2d7d24a9,     //   0.53629,   0.84403
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //     0.535,   0.84485
+    0x3fe114141f935545,     0x3feb0fc1575d33db,     //    0.5337,   0.84567
+    0x3fe1097248d0a956,     0x3feb16742a4ca2f5,     //    0.5324,   0.84649
+    0x3fe0fecdd1770537,     0x3feb1d22cfdadcc6,     //    0.5311,   0.84731
+    0x3fe0f426bb2a8e7d,     0x3feb23cd470013b4,     //    0.5298,   0.84812
+    0x3fe0e97d078fd23b,     0x3feb2a738eb51f33,     //    0.5285,   0.84893
+    0x3fe0ded0b84bc4b5,     0x3feb3115a5f37bf4,     //    0.5272,   0.84974
+    0x3fe0d421cf03c12b,     0x3feb37b38bb54c09,     //    0.5259,   0.85055
+    0x3fe0c9704d5d898f,     0x3feb3e4d3ef55712,     //   0.52459,   0.85136
+    0x3fe0bebc34ff4646,     0x3feb44e2beaf0a61,     //   0.52328,   0.85216
+    0x3fe0b405878f85ec,     0x3feb4b7409de7925,     //   0.52198,   0.85296
+    0x3fe0a94c46b53d0b,     0x3feb52011f805c92,     //   0.52067,   0.85376
+    0x3fe09e907417c5e1,     0x3feb5889fe921405,     //   0.51936,   0.85456
+    0x3fe093d2115ee018,     0x3feb5f0ea611a532,     //   0.51804,   0.85535
+    0x3fe089112032b08c,     0x3feb658f14fdbc47,     //   0.51673,   0.85615
+    0x3fe07e4da23bc102,     0x3feb6c0b4a55ac17,     //   0.51542,   0.85694
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //    0.5141,   0.85773
+    0x3fe068bf0691c028,     0x3feb78f70449a34b,     //   0.51279,   0.85852
+    0x3fe05df3ec31b8b6,     0x3feb7f6686e792ea,     //   0.51147,    0.8593
+    0x3fe053264bad0483,     0x3feb85d1cbf52c02,     //   0.51015,   0.86009
+    0x3fe0485626ae221a,     0x3feb8c38d27504e9,     //   0.50883,   0.86087
+    0x3fe03d837edff370,     0x3feb929b996a5b7f,     //   0.50751,   0.86165
+    0x3fe032ae55edbd95,     0x3feb98fa1fd9155e,     //   0.50619,   0.86242
+    0x3fe027d6ad83287e,     0x3feb9f5464c5bffc,     //   0.50486,    0.8632
+    0x3fe01cfc874c3eb7,     0x3feba5aa673590d2,     //   0.50354,   0.86397
+    0x3fe0121fe4f56d2c,     0x3febabfc262e6586,     //   0.50221,   0.86474
+    0x3fe00740c82b82e0,     0x3febb249a0b6c40d,     //   0.50089,   0.86551
+    0x3fdff8be6537615e,     0x3febb892d5d5dad5,     //   0.49956,   0.86628
+    0x3fdfe2f64be7120f,     0x3febbed7c49380ea,     //   0.49823,   0.86705
+    0x3fdfcd2947c1ff57,     0x3febc5186bf8361d,     //    0.4969,   0.86781
+    0x3fdfb7575c24d2de,     0x3febcb54cb0d2327,     //   0.49557,   0.86857
+    0x3fdfa1808c6cf7e0,     0x3febd18ce0dc19d6,     //   0.49423,   0.86933
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //    0.4929,   0.87009
+    0x3fdf75c44e26a852,     0x3febddf02cd2b983,     //   0.49156,   0.87084
+    0x3fdf5fdee656cda3,     0x3febe41b611154c1,     //   0.49023,    0.8716
+    0x3fdf49f4a7e97729,     0x3febea424837de6d,     //   0.48889,   0.87235
+    0x3fdf3405963fd068,     0x3febf064e15377dd,     //   0.48755,   0.87309
+    0x3fdf1e11b4bbc35c,     0x3febf6832b71ec5b,     //   0.48621,   0.87384
+    0x3fdf081906bff7fd,     0x3febfc9d25a1b147,     //   0.48487,   0.87459
+    0x3fdef21b8fafd3b5,     0x3fec02b2cef1e641,     //   0.48353,   0.87533
+    0x3fdedc1952ef78d5,     0x3fec08c426725549,     //   0.48218,   0.87607
+    0x3fdec61253e3c61b,     0x3fec0ed12b3372e9,     //   0.48084,   0.87681
+    0x3fdeb00695f25620,     0x3fec14d9dc465e58,     //   0.47949,   0.87755
+    0x3fde99f61c817eda,     0x3fec1ade38bce19b,     //   0.47815,   0.87828
+    0x3fde83e0eaf85113,     0x3fec20de3fa971b0,     //    0.4768,   0.87901
+    0x3fde6dc704be97e2,     0x3fec26d9f01f2eaf,     //   0.47545,   0.87974
+    0x3fde57a86d3cd824,     0x3fec2cd14931e3f1,     //    0.4741,   0.88047
+    0x3fde418527dc4ffa,     0x3fec32c449f60831,     //   0.47275,    0.8812
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //    0.4714,   0.88192
+    0x3fde1530a12779f4,     0x3fec3e9d3ee7d262,     //   0.47004,   0.88264
+    0x3fddfeff66a941de,     0x3fec44833141c004,     //   0.46869,   0.88336
+    0x3fdde8c98bf86bd6,     0x3fec4a64c7a5ac4c,     //   0.46733,   0.88408
+    0x3fddd28f1481cc58,     0x3fec5042012b6907,     //   0.46598,    0.8848
+    0x3fddbc5003b2edf8,     0x3fec561adceb743e,     //   0.46462,   0.88551
+    0x3fdda60c5cfa10d8,     0x3fec5bef59fef85a,     //   0.46326,   0.88622
+    0x3fdd8fc423c62a25,     0x3fec61bf777fcc48,     //    0.4619,   0.88693
+    0x3fdd79775b86e389,     0x3fec678b3488739b,     //   0.46054,   0.88764
+    0x3fdd632607ac9aa9,     0x3fec6d5290341eb2,     //   0.45918,   0.88835
+    0x3fdd4cd02ba8609c,     0x3fec7315899eaad7,     //   0.45781,   0.88905
+    0x3fdd3675caebf962,     0x3fec78d41fe4a267,     //   0.45645,   0.88975
+    0x3fdd2016e8e9db5b,     0x3fec7e8e52233cf3,     //   0.45508,   0.89045
+    0x3fdd09b389152ec1,     0x3fec84441f785f61,     //   0.45372,   0.89115
+    0x3fdcf34baee1cd21,     0x3fec89f587029c13,     //   0.45235,   0.89184
+    0x3fdcdcdf5dc440ce,     0x3fec8fa287e13305,     //   0.45098,   0.89253
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     //   0.44961,   0.89322
+    0x3fdcaff964a0421d,     0x3fec9aef521bd480,     //   0.44824,   0.89391
+    0x3fdc997fc3865388,     0x3feca08f19b9c449,     //   0.44687,    0.8946
+    0x3fdc8301b95b40c2,     0x3feca62a772fd919,     //    0.4455,   0.89528
+    0x3fdc6c7f4997000a,     0x3fecabc169a0b901,     //   0.44412,   0.89597
+    0x3fdc55f877b23537,     0x3fecb153f02fb87d,     //   0.44275,   0.89665
+    0x3fdc3f6d47263129,     0x3fecb6e20a00da99,     //   0.44137,   0.89732
+    0x3fdc28ddbb6cf145,     0x3fecbc6bb638d10b,     //   0.43999,     0.898
+    0x3fdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //   0.43862,   0.89867
+    0x3fdbfbb1a05e0edc,     0x3fecc771c2736c09,     //   0.43724,   0.89935
+    0x3fdbe51517ffc0d9,     0x3fecccee20c2de9f,     //   0.43586,   0.90002
+    0x3fdbce744262deee,     0x3fecd2660e12c1e6,     //   0.43448,   0.90068
+    0x3fdbb7cf2304bd01,     0x3fecd7d9898b32f6,     //   0.43309,   0.90135
+    0x3fdba125bd63583e,     0x3fecdd489254fe65,     //   0.43171,   0.90201
+    0x3fdb8a7814fd5693,     0x3fece2b32799a060,     //   0.43033,   0.90267
+    0x3fdb73c62d520624,     0x3fece819488344ce,     //   0.42894,   0.90333
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //   0.42756,   0.90399
+    0x3fdb4655ae2bf757,     0x3fecf2d829f1b40e,     //   0.42617,   0.90464
+    0x3fdb2f971db31972,     0x3fecf830e8ce467b,     //   0.42478,    0.9053
+    0x3fdb18d45bf8aca6,     0x3fecfd852fff6ad4,     //   0.42339,   0.90595
+    0x3fdb020d6c7f4009,     0x3fed02d4feb2bd92,     //     0.422,    0.9066
+    0x3fdaeb4252ca07ab,     0x3fed082054168bac,     //   0.42061,   0.90724
+    0x3fdad473125cdc08,     0x3fed0d672f59d2b9,     //   0.41922,   0.90789
+    0x3fdabd9faebc3980,     0x3fed12a98fac410c,     //   0.41782,   0.90853
+    0x3fdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //   0.41643,   0.90917
+    0x3fda8fec8bf5b166,     0x3fed1d20dc40c15c,     //   0.41503,   0.90981
+    0x3fda790cd3dbf31a,     0x3fed2255c6e5a4e1,     //   0.41364,   0.91044
+    0x3fda622906a70b63,     0x3fed2786335f52fc,     //   0.41224,   0.91107
+    0x3fda4b4127dea1e4,     0x3fed2cb220e0ef9f,     //   0.41084,   0.91171
+    0x3fda34553b0afee5,     0x3fed31d98e9e503a,     //   0.40944,   0.91234
+    0x3fda1d6543b50ac0,     0x3fed36fc7bcbfbdc,     //   0.40804,   0.91296
+    0x3fda067145664d57,     0x3fed3c1ae79f2b4e,     //   0.40664,   0.91359
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //   0.40524,   0.91421
+    0x3fd9d87d4207b0ab,     0x3fed464a380e7242,     //   0.40384,   0.91483
+    0x3fd9c17d440df9f2,     0x3fed4b5b1b187524,     //   0.40243,   0.91545
+    0x3fd9aa794d47c9ee,     0x3fed506779a3d2d9,     //   0.40103,   0.91606
+    0x3fd993716141bdfe,     0x3fed556f52e93eb1,     //   0.39962,   0.91668
+    0x3fd97c6583890fc2,     0x3fed5a72a6221e73,     //   0.39822,   0.91729
+    0x3fd96555b7ab948f,     0x3fed5f7172888a7f,     //   0.39681,    0.9179
+    0x3fd94e420137bce3,     0x3fed646bb7574de5,     //    0.3954,   0.91851
+    0x3fd9372a63bc93d7,     0x3fed696173c9e68b,     //   0.39399,   0.91911
+    0x3fd9200ee2c9be97,     0x3fed6e52a71c8547,     //   0.39258,   0.91972
+    0x3fd908ef81ef7bd1,     0x3fed733f508c0dff,     //   0.39117,   0.92032
+    0x3fd8f1cc44bea329,     0x3fed78276f5617c6,     //   0.38976,   0.92092
+    0x3fd8daa52ec8a4af,     0x3fed7d0b02b8ecf9,     //   0.38835,   0.92151
+    0x3fd8c37a439f884f,     0x3fed81ea09f38b63,     //   0.38693,   0.92211
+    0x3fd8ac4b86d5ed44,     0x3fed86c48445a450,     //   0.38552,    0.9227
+    0x3fd89518fbff098e,     0x3fed8b9a70ef9cb4,     //    0.3841,   0.92329
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //   0.38268,   0.92388
+    0x3fd866a88a792ea0,     0x3fed95389e50429b,     //   0.38127,   0.92447
+    0x3fd84f6aaaf3903f,     0x3fed9a00dd8b3d46,     //   0.37985,   0.92505
+    0x3fd838290bb359c8,     0x3fed9ec48c26b1f3,     //   0.37843,   0.92563
+    0x3fd820e3b04eaac4,     0x3feda383a9668988,     //   0.37701,   0.92621
+    0x3fd8099a9c5c362d,     0x3feda83e348f613b,     //   0.37559,   0.92679
+    0x3fd7f24dd37341e3,     0x3fedacf42ce68ab9,     //   0.37416,   0.92736
+    0x3fd7dafd592ba621,     0x3fedb1a591b20c38,     //   0.37274,   0.92794
+    0x3fd7c3a9311dcce7,     0x3fedb6526238a09b,     //   0.37132,   0.92851
+    0x3fd7ac515ee2b172,     0x3fedbafa9dc1b78d,     //   0.36989,   0.92907
+    0x3fd794f5e613dfae,     0x3fedbf9e4395759a,     //   0.36847,   0.92964
+    0x3fd77d96ca4b73a6,     0x3fedc43d52fcb453,     //   0.36704,   0.93021
+    0x3fd766340f2418f6,     0x3fedc8d7cb410260,     //   0.36561,   0.93077
+    0x3fd74ecdb8390a3e,     0x3fedcd6dabaca3a5,     //   0.36418,   0.93133
+    0x3fd73763c9261092,     0x3fedd1fef38a915a,     //   0.36276,   0.93188
+    0x3fd71ff6458782ec,     0x3fedd68ba2267a25,     //   0.36133,   0.93244
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //    0.3599,   0.93299
+    0x3fd6f1108f1bc9c5,     0x3feddf9730ca837b,     //   0.35846,   0.93354
+    0x3fd6d998638a0cb5,     0x3fede4160f6d8d81,     //   0.35703,   0.93409
+    0x3fd6c21cb1e39771,     0x3fede890520465ce,     //    0.3556,   0.93464
+    0x3fd6aa9d7dc77e16,     0x3feded05f7de47da,     //   0.35416,   0.93518
+    0x3fd6931acad55f51,     0x3fedf177004b2534,     //   0.35273,   0.93573
+    0x3fd67b949cad63ca,     0x3fedf5e36a9ba59c,     //   0.35129,   0.93627
+    0x3fd6640af6f03d9e,     0x3fedfa4b3621271d,     //   0.34986,    0.9368
+    0x3fd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //   0.34842,   0.93734
+    0x3fd634ed533be58e,     0x3fee030cee1435b8,     //   0.34698,   0.93787
+    0x3fd61d595c88c203,     0x3fee0766d9280f54,     //   0.34554,    0.9384
+    0x3fd605c1fcc88f63,     0x3fee0bbc22bd8349,     //    0.3441,   0.93893
+    0x3fd5ee27379ea693,     0x3fee100cca2980ac,     //   0.34266,   0.93946
+    0x3fd5d68910aee686,     0x3fee1458cec1ad83,     //   0.34122,   0.93998
+    0x3fd5bee78b9db3b6,     0x3fee18a02fdc66d9,     //   0.33978,   0.94051
+    0x3fd5a742ac0ff78d,     0x3fee1ce2ecd0c0d8,     //   0.33833,   0.94103
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //   0.33689,   0.94154
+    0x3fd577eeec151e47,     0x3fee255a77a63bb8,     //   0.33545,   0.94206
+    0x3fd5604012f467b4,     0x3fee298f4439197a,     //     0.334,   0.94257
+    0x3fd5488dedeff3be,     0x3fee2dbf6a0911d9,     //   0.33255,   0.94308
+    0x3fd530d880af3c24,     0x3fee31eae870ce25,     //   0.33111,   0.94359
+    0x3fd5191fceda3c35,     0x3fee3611becbaf69,     //   0.32966,    0.9441
+    0x3fd50163dc197047,     0x3fee3a33ec75ce85,     //   0.32821,    0.9446
+    0x3fd4e9a4ac15d520,     0x3fee3e5170cbfc46,     //   0.32676,   0.94511
+    0x3fd4d1e24278e76a,     0x3fee426a4b2bc17e,     //   0.32531,   0.94561
+    0x3fd4ba1ca2eca31c,     0x3fee467e7af35f23,     //   0.32386,   0.94611
+    0x3fd4a253d11b82f3,     0x3fee4a8dff81ce5e,     //   0.32241,    0.9466
+    0x3fd48a87d0b07fd7,     0x3fee4e98d836c0af,     //   0.32096,   0.94709
+    0x3fd472b8a5571054,     0x3fee529f04729ffc,     //    0.3195,   0.94759
+    0x3fd45ae652bb2800,     0x3fee56a083968eb1,     //   0.31805,   0.94807
+    0x3fd44310dc8936f0,     0x3fee5a9d550467d3,     //   0.31659,   0.94856
+    0x3fd42b38466e2928,     0x3fee5e95781ebf1c,     //   0.31514,   0.94905
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     //   0.31368,   0.94953
+    0x3fd3fb7dc932cfa4,     0x3fee6677b0e6d31e,     //   0.31222,   0.95001
+    0x3fd3e39be96ec271,     0x3fee6a61c55d53a7,     //   0.31077,   0.95049
+    0x3fd3cbb6f87a146e,     0x3fee6e472911da27,     //   0.30931,   0.95096
+    0x3fd3b3cefa0414b7,     0x3fee7227db6a9744,     //   0.30785,   0.95144
+    0x3fd39be3f1bc8aef,     0x3fee7603dbce74e9,     //   0.30639,   0.95191
+    0x3fd383f5e353b6aa,     0x3fee79db29a5165a,     //   0.30493,   0.95238
+    0x3fd36c04d27a4edf,     0x3fee7dadc456d850,     //   0.30347,   0.95284
+    0x3fd35410c2e18152,     0x3fee817bab4cd10d,     //   0.30201,   0.95331
+    0x3fd33c19b83af207,     0x3fee8544ddf0d075,     //   0.30054,   0.95377
+    0x3fd3241fb638baaf,     0x3fee89095bad6025,     //   0.29908,   0.95423
+    0x3fd30c22c08d6a13,     0x3fee8cc923edc388,     //   0.29762,   0.95469
+    0x3fd2f422daec0386,     0x3fee9084361df7f3,     //   0.29615,   0.95514
+    0x3fd2dc200907fe51,     0x3fee943a91aab4b4,     //   0.29469,   0.95559
+    0x3fd2c41a4e954520,     0x3fee97ec36016b30,     //   0.29322,   0.95605
+    0x3fd2ac11af483572,     0x3fee9b99229046f8,     //   0.29175,   0.95649
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //   0.29028,   0.95694
+    0x3fd27bf7d0f2c346,     0x3feea2e4d212c000,     //   0.28882,   0.95738
+    0x3fd263e6995554ba,     0x3feea68393e65800,     //   0.28735,   0.95783
+    0x3fd24bd28bb37672,     0x3feeaa1d9bb20af3,     //   0.28588,   0.95827
+    0x3fd233bbabc3bb72,     0x3feeadb2e8e7a88e,     //   0.28441,    0.9587
+    0x3fd21ba1fd3d2623,     0x3feeb1437af9bb34,     //   0.28294,   0.95914
+    0x3fd2038583d727bd,     0x3feeb4cf515b8811,     //   0.28146,   0.95957
+    0x3fd1eb6643499fbb,     0x3feeb8566b810f2a,     //   0.27999,      0.96
+    0x3fd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //   0.27852,   0.96043
+    0x3fd1bb1f7b999480,     0x3feebf5668eaf2ef,     //   0.27705,   0.96086
+    0x3fd1a2f7fbe8f243,     0x3feec2cf4b1af6b2,     //   0.27557,   0.96128
+    0x3fd18acdc3f4873a,     0x3feec6436ee60309,     //    0.2741,    0.9617
+    0x3fd172a0d7765177,     0x3feec9b2d3c3bf84,     //   0.27262,   0.96212
+    0x3fd15a713a28b9d9,     0x3feecd1d792c8f10,     //   0.27115,   0.96254
+    0x3fd1423eefc69378,     0x3feed0835e999009,     //   0.26967,   0.96295
+    0x3fd12a09fc0b1b12,     0x3feed3e483849c51,     //   0.26819,   0.96337
+    0x3fd111d262b1f677,     0x3feed740e7684963,     //   0.26671,   0.96378
+    0x3fd0f998277733f7,     0x3feeda9889bfe86a,     //   0.26523,   0.96418
+    0x3fd0e15b4e1749cd,     0x3feeddeb6a078651,     //   0.26375,   0.96459
+    0x3fd0c91bda4f158d,     0x3feee13987bbebdc,     //   0.26227,   0.96499
+    0x3fd0b0d9cfdbdb90,     0x3feee482e25a9dbc,     //   0.26079,   0.96539
+    0x3fd09895327b465e,     0x3feee7c77961dc9e,     //   0.25931,   0.96579
+    0x3fd0804e05eb661e,     0x3feeeb074c50a544,     //   0.25783,   0.96619
+    0x3fd068044deab002,     0x3feeee425aa6b09a,     //   0.25635,   0.96658
+    0x3fd04fb80e37fdae,     0x3feef178a3e473c2,     //   0.25487,   0.96698
+    0x3fd037694a928cac,     0x3feef4aa278b2032,     //   0.25338,   0.96737
+    0x3fd01f1806b9fdd2,     0x3feef7d6e51ca3c0,     //    0.2519,   0.96775
+    0x3fd006c4466e54af,     0x3feefafedc1ba8b7,     //   0.25041,   0.96814
+    0x3fcfdcdc1adfedf8,     0x3feefe220c0b95ec,     //   0.24893,   0.96852
+    0x3fcfac2abeff57ff,     0x3fef014074708ed3,     //   0.24744,    0.9689
+    0x3fcf7b7480bd3801,     0x3fef045a14cf738c,     //   0.24596,   0.96928
+    0x3fcf4ab9679c9f5c,     0x3fef076eecade0fa,     //   0.24447,   0.96966
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //   0.24298,   0.97003
+    0x3fcee934c2d006c7,     0x3fef0d8a410379c5,     //   0.24149,    0.9704
+    0x3fceb86b462de348,     0x3fef1090bc898f5f,     //      0.24,   0.97077
+    0x3fce879d0cc0fdaf,     0x3fef13926dad024e,     //   0.23851,   0.97114
+    0x3fce56ca1e101a1b,     0x3fef168f53f7205d,     //   0.23702,    0.9715
+    0x3fce25f281a2b684,     0x3fef19876ef1f486,     //   0.23553,   0.97187
+    0x3fcdf5163f01099a,     0x3fef1c7abe284708,     //   0.23404,   0.97223
+    0x3fcdc4355db40195,     0x3fef1f6941259d7a,     //   0.23255,   0.97258
+    0x3fcd934fe5454311,     0x3fef2252f7763ada,     //   0.23106,   0.97294
+    0x3fcd6265dd3f27e3,     0x3fef2537e0a71f9f,     //   0.22957,   0.97329
+    0x3fcd31774d2cbdee,     0x3fef2817fc4609ce,     //   0.22807,   0.97364
+    0x3fcd00843c99c5f9,     0x3fef2af349e17507,     //   0.22658,   0.97399
+    0x3fcccf8cb312b286,     0x3fef2dc9c9089a9d,     //   0.22508,   0.97434
+    0x3fcc9e90b824a6a9,     0x3fef309b794b719f,     //   0.22359,   0.97468
+    0x3fcc6d90535d74dc,     0x3fef33685a3aaef0,     //   0.22209,   0.97503
+    0x3fcc3c8b8c4b9dd7,     0x3fef36306b67c556,     //    0.2206,   0.97536
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //    0.2191,    0.9757
+    0x3fcbda74f5856330,     0x3fef3bb21cc4fe47,     //    0.2176,   0.97604
+    0x3fcba96334f15dad,     0x3fef3e6bbc1bbc65,     //   0.21611,   0.97637
+    0x3fcb784d30536cda,     0x3fef412089fd8adc,     //   0.21461,    0.9767
+    0x3fcb4732ef3d6722,     0x3fef43d085ff92dd,     //   0.21311,   0.97703
+    0x3fcb16147941ca2a,     0x3fef467bafb7bbe0,     //   0.21161,   0.97735
+    0x3fcae4f1d5f3b9ab,     0x3fef492206bcabb4,     //   0.21011,   0.97768
+    0x3fcab3cb0ce6fe44,     0x3fef4bc38aa5c694,     //   0.20861,     0.978
+    0x3fca82a025b00451,     0x3fef4e603b0b2f2d,     //   0.20711,   0.97832
+    0x3fca517127e3dabc,     0x3fef50f81785c6b9,     //   0.20561,   0.97863
+    0x3fca203e1b1831da,     0x3fef538b1faf2d07,     //   0.20411,   0.97895
+    0x3fc9ef0706e35a35,     0x3fef56195321c090,     //   0.20261,   0.97926
+    0x3fc9bdcbf2dc4366,     0x3fef58a2b1789e84,     //    0.2011,   0.97957
+    0x3fc98c8ce69a7aec,     0x3fef5b273a4fa2d9,     //    0.1996,   0.97988
+    0x3fc95b49e9b62af9,     0x3fef5da6ed43685d,     //    0.1981,   0.98018
+    0x3fc92a0303c8194f,     0x3fef6021c9f148c2,     //   0.19659,   0.98048
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //   0.19509,   0.98079
+    0x3fc8c7699b34ca7e,     0x3fef6508fef47bd5,     //   0.19359,   0.98108
+    0x3fc8961727c41804,     0x3fef677556883cee,     //   0.19208,   0.98138
+    0x3fc864c0e9b2b6cf,     0x3fef69dcd652f5de,     //   0.19057,   0.98167
+    0x3fc83366e89c64c5,     0x3fef6c3f7df5bbb7,     //   0.18907,   0.98196
+    0x3fc802092c1d744b,     0x3fef6e9d4d1262ca,     //   0.18756,   0.98225
+    0x3fc7d0a7bbd2cb1b,     0x3fef70f6434b7eb7,     //   0.18606,   0.98254
+    0x3fc79f429f59e11d,     0x3fef734a60446279,     //   0.18455,   0.98282
+    0x3fc76dd9de50bf31,     0x3fef7599a3a12077,     //   0.18304,   0.98311
+    0x3fc73c6d8055fe0a,     0x3fef77e40d068a90,     //   0.18153,   0.98339
+    0x3fc70afd8d08c4ff,     0x3fef7a299c1a322a,     //   0.18002,   0.98366
+    0x3fc6d98a0c08c8da,     0x3fef7c6a50826840,     //   0.17851,   0.98394
+    0x3fc6a81304f64ab2,     0x3fef7ea629e63d6e,     //     0.177,   0.98421
+    0x3fc676987f7216b8,     0x3fef80dd27ed8204,     //   0.17549,   0.98448
+    0x3fc6451a831d830d,     0x3fef830f4a40c60c,     //   0.17398,   0.98475
+    0x3fc61399179a6e94,     0x3fef853c9089595e,     //   0.17247,   0.98501
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     //   0.17096,   0.98528
+    0x3fc5b08c1192e381,     0x3fef898887a36c84,     //   0.16945,   0.98554
+    0x3fc57f008654cbde,     0x3fef8ba737cb4b78,     //   0.16794,    0.9858
+    0x3fc54d71aa74ef02,     0x3fef8dc10a95380d,     //   0.16643,   0.98605
+    0x3fc51bdf8597c5f2,     0x3fef8fd5ffae41db,     //   0.16491,   0.98631
+    0x3fc4ea4a1f624b61,     0x3fef91e616c43891,     //    0.1634,   0.98656
+    0x3fc4b8b17f79fa88,     0x3fef93f14f85ac08,     //   0.16189,   0.98681
+    0x3fc48715ad84cdf5,     0x3fef95f7a9a1ec47,     //   0.16037,   0.98706
+    0x3fc45576b1293e5a,     0x3fef97f924c9099b,     //   0.15886,    0.9873
+    0x3fc423d4920e4166,     0x3fef99f5c0abd496,     //   0.15734,   0.98754
+    0x3fc3f22f57db4893,     0x3fef9bed7cfbde29,     //   0.15583,   0.98778
+    0x3fc3c0870a383ff6,     0x3fef9de0596b77a3,     //   0.15431,   0.98802
+    0x3fc38edbb0cd8d14,     0x3fef9fce55adb2c8,     //    0.1528,   0.98826
+    0x3fc35d2d53440db2,     0x3fefa1b7717661d5,     //   0.15128,   0.98849
+    0x3fc32b7bf94516a7,     0x3fefa39bac7a1791,     //   0.14976,   0.98872
+    0x3fc2f9c7aa7a72af,     0x3fefa57b066e2754,     //   0.14825,   0.98895
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //   0.14673,   0.98918
+    0x3fc296564d2b953e,     0x3fefa92b1600657c,     //   0.14521,    0.9894
+    0x3fc264994dfd340a,     0x3fefaafbcb0cfddc,     //    0.1437,   0.98962
+    0x3fc232d978aed413,     0x3fefacc79de6c44f,     //   0.14218,   0.98984
+    0x3fc20116d4ec7bce,     0x3fefae8e8e46cfbb,     //   0.14066,   0.99006
+    0x3fc1cf516a62a077,     0x3fefb0509be6f7db,     //   0.13914,   0.99027
+    0x3fc19d8940be24e7,     0x3fefb20dc681d54d,     //   0.13762,   0.99049
+    0x3fc16bbe5fac5865,     0x3fefb3c60dd2c199,     //    0.1361,    0.9907
+    0x3fc139f0cedaf576,     0x3fefb5797195d741,     //   0.13458,    0.9909
+    0x3fc1082095f820b0,     0x3fefb727f187f1c7,     //   0.13306,   0.99111
+    0x3fc0d64dbcb26786,     0x3fefb8d18d66adb7,     //   0.13154,   0.99131
+    0x3fc0a4784ab8bf1d,     0x3fefba7644f068b5,     //   0.13002,   0.99151
+    0x3fc072a047ba831d,     0x3fefbc1617e44186,     //    0.1285,   0.99171
+    0x3fc040c5bb67747e,     0x3fefbdb106021816,     //   0.12698,   0.99191
+    0x3fc00ee8ad6fb85b,     0x3fefbf470f0a8d88,     //   0.12545,    0.9921
+    0x3fbfba124b07ad85,     0x3fefc0d832bf043a,     //   0.12393,   0.99229
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     //   0.12241,   0.99248
+    0x3fbef2858d27561b,     0x3fefc3ebc935454c,     //   0.12089,   0.99267
+    0x3fbe8eb7fde4aa3e,     0x3fefc56e3b7d9af6,     //   0.11937,   0.99285
+    0x3fbe2ae5b8457f77,     0x3fefc6ebc77f0887,     //   0.11784,   0.99303
+    0x3fbdc70ecbae9fc8,     0x3fefc8646cfeb721,     //   0.11632,   0.99321
+    0x3fbd633347858ce4,     0x3fefc9d82bc2915e,     //   0.11479,   0.99339
+    0x3fbcff533b307dc1,     0x3fefcb4703914354,     //   0.11327,   0.99356
+    0x3fbc9b6eb6165c42,     0x3fefccb0f4323aa3,     //   0.11175,   0.99374
+    0x3fbc3785c79ec2d5,     0x3fefce15fd6da67b,     //   0.11022,   0.99391
+    0x3fbbd3987f31fa0e,     0x3fefcf761f0c77a3,     //    0.1087,   0.99407
+    0x3fbb6fa6ec38f64c,     0x3fefd0d158d86087,     //   0.10717,   0.99424
+    0x3fbb0bb11e1d5559,     0x3fefd227aa9bd53b,     //   0.10565,    0.9944
+    0x3fbaa7b724495c04,     0x3fefd37914220b84,     //   0.10412,   0.99456
+    0x3fba43b90e27f3c4,     0x3fefd4c59536fae4,     //    0.1026,   0.99472
+    0x3fb9dfb6eb24a85c,     0x3fefd60d2da75c9e,     //   0.10107,   0.99488
+    0x3fb97bb0caaba56f,     0x3fefd74fdd40abbf,     //  0.099544,   0.99503
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     //  0.098017,   0.99518
+    0x3fb8b398cf0c38e0,     0x3fefd9c68127c78c,     //   0.09649,   0.99533
+    0x3fb84f8712c130a0,     0x3fefdafa7514538c,     //  0.094963,   0.99548
+    0x3fb7eb7196b72ee4,     0x3fefdc297f674ba9,     //  0.093436,   0.99563
+    0x3fb787586a5d5b21,     0x3fefdd539ff1f456,     //  0.091909,   0.99577
+    0x3fb7233b9d236e71,     0x3fefde78d68653fd,     //  0.090381,   0.99591
+    0x3fb6bf1b3e79b129,     0x3fefdf9922f73307,     //  0.088854,   0.99604
+    0x3fb65af75dd0f87b,     0x3fefe0b485181be3,     //  0.087326,   0.99618
+    0x3fb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     //  0.085797,   0.99631
+    0x3fb592a554489bc8,     0x3fefe2dc89bbff08,     //  0.084269,   0.99644
+    0x3fb52e774a4d4d0a,     0x3fefe3e92be9d886,     //   0.08274,   0.99657
+    0x3fb4ca45fc1ba8b6,     0x3fefe4f0e31d7a4a,     //  0.081211,    0.9967
+    0x3fb4661179272096,     0x3fefe5f3af2e3940,     //  0.079682,   0.99682
+    0x3fb401d9d0e3a507,     0x3fefe6f18ff42c84,     //  0.078153,   0.99694
+    0x3fb39d9f12c5a299,     0x3fefe7ea85482d60,     //  0.076624,   0.99706
+    0x3fb339614e41ffa5,     0x3fefe8de8f03d75c,     //  0.075094,   0.99718
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     //  0.073565,   0.99729
+    0x3fb270dcefdfc45b,     0x3fefeab7df1c6005,     //  0.072035,    0.9974
+    0x3fb20c9674ed444c,     0x3fefeb9d2530410f,     //  0.070505,   0.99751
+    0x3fb1a84d316d4f8a,     0x3fefec7d7f19cffc,     //  0.068974,   0.99762
+    0x3fb1440134d709b2,     0x3fefed58ecb673c4,     //  0.067444,   0.99772
+    0x3fb0dfb28ea201e6,     0x3fefee2f6de455ba,     //  0.065913,   0.99783
+    0x3fb07b614e463064,     0x3fefef0102826191,     //  0.064383,   0.99793
+    0x3fb0170d833bf421,     0x3fefefcdaa704562,     //  0.062852,   0.99802
+    0x3faf656e79f820e0,     0x3feff095658e71ad,     //  0.061321,   0.99812
+    0x3fae9cbd15ff5527,     0x3feff15833be1965,     //   0.05979,   0.99821
+    0x3fadd406f9808ec8,     0x3feff21614e131ed,     //  0.058258,    0.9983
+    0x3fad0b4c436f91d0,     0x3feff2cf08da7321,     //  0.056727,   0.99839
+    0x3fac428d12c0d7e3,     0x3feff3830f8d575c,     //  0.055195,   0.99848
+    0x3fab79c986698b78,     0x3feff43228de1b77,     //  0.053664,   0.99856
+    0x3faab101bd5f8317,     0x3feff4dc54b1bed3,     //  0.052132,   0.99864
+    0x3fa9e835d6993c87,     0x3feff58192ee0358,     //    0.0506,   0.99872
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     //  0.049068,    0.9988
+    0x3fa856922bb513c1,     0x3feff6bd463b444d,     //  0.047535,   0.99887
+    0x3fa78dbaa5874685,     0x3feff753bb1b9164,     //  0.046003,   0.99894
+    0x3fa6c4df7d7d5b84,     0x3feff7e5420320f9,     //  0.044471,   0.99901
+    0x3fa5fc00d290cd43,     0x3feff871dadb81df,     //  0.042938,   0.99908
+    0x3fa5331ec3bba0eb,     0x3feff8f9858f058b,     //  0.041406,   0.99914
+    0x3fa46a396ff86179,     0x3feff97c4208c014,     //  0.039873,    0.9992
+    0x3fa3a150f6421afc,     0x3feff9fa10348837,     //   0.03834,   0.99926
+    0x3fa2d865759455cd,     0x3feffa72effef75d,     //  0.036807,   0.99932
+    0x3fa20f770ceb11c6,     0x3feffae6e1556998,     //  0.035274,   0.99938
+    0x3fa14685db42c17e,     0x3feffb55e425fdae,     //  0.033741,   0.99943
+    0x3fa07d91ff984580,     0x3feffbbff85f9515,     //  0.032208,   0.99948
+    0x3f9f693731d1cf01,     0x3feffc251df1d3f8,     //  0.030675,   0.99953
+    0x3f9dd7458c64ab39,     0x3feffc8554cd213a,     //  0.029142,   0.99958
+    0x3f9c454f4ce53b1c,     0x3feffce09ce2a679,     //  0.027608,   0.99962
+    0x3f9ab354b1504fca,     0x3feffd36f624500c,     //  0.026075,   0.99966
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     //  0.024541,    0.9997
+    0x3f978f535ddc9f03,     0x3feffdd4dbf78f52,     //  0.023008,   0.99974
+    0x3f95fd4d21fab226,     0x3feffe1c6870cb77,     //  0.021474,   0.99977
+    0x3f946b4381fce81c,     0x3feffe5f05e578db,     //   0.01994,    0.9998
+    0x3f92d936bbe30efd,     0x3feffe9cb44b51a1,     //  0.018407,   0.99983
+    0x3f9147270dad7132,     0x3feffed57398d2b7,     //  0.016873,   0.99986
+    0x3f8f6a296ab997ca,     0x3fefff0943c53bd1,     //  0.015339,   0.99988
+    0x3f8c45ffe1e48ad9,     0x3fefff3824c88f6f,     //  0.013805,    0.9999
+    0x3f8921d1fcdec784,     0x3fefff62169b92db,     //  0.012272,   0.99992
+    0x3f85fda037ac05e0,     0x3fefff871937ce2f,     //  0.010738,   0.99994
+    0x3f82d96b0e509703,     0x3fefffa72c978c4f,     // 0.0092038,   0.99996
+    0x3f7f6a65f9a2a3c5,     0x3fefffc250b5daef,     // 0.0076698,   0.99997
+    0x3f7921f0fe670071,     0x3fefffd8858e8a92,     // 0.0061359,   0.99998
+    0x3f72d97822f996bc,     0x3fefffe9cb1e2e8d,     // 0.0046019,   0.99999
+    0x3f6921f8becca4ba,     0x3feffff621621d02,     //  0.003068,         1
+    0x3f5921faaee6472d,     0x3feffffd88586ee6,     //  0.001534,         1
+    0x0000000000000000,     0x3ff0000000000000,     //         0,         1
+    0xbf5921faaee6472d,     0x3feffffd88586ee6,     // -0.001534,         1
+    0xbf6921f8becca4ba,     0x3feffff621621d02,     // -0.003068,         1
+    0xbf72d97822f996bc,     0x3fefffe9cb1e2e8d,     //-0.0046019,   0.99999
+    0xbf7921f0fe670071,     0x3fefffd8858e8a92,     //-0.0061359,   0.99998
+    0xbf7f6a65f9a2a3c5,     0x3fefffc250b5daef,     //-0.0076698,   0.99997
+    0xbf82d96b0e509703,     0x3fefffa72c978c4f,     //-0.0092038,   0.99996
+    0xbf85fda037ac05e0,     0x3fefff871937ce2f,     // -0.010738,   0.99994
+    0xbf8921d1fcdec784,     0x3fefff62169b92db,     // -0.012272,   0.99992
+    0xbf8c45ffe1e48ad9,     0x3fefff3824c88f6f,     // -0.013805,    0.9999
+    0xbf8f6a296ab997ca,     0x3fefff0943c53bd1,     // -0.015339,   0.99988
+    0xbf9147270dad7132,     0x3feffed57398d2b7,     // -0.016873,   0.99986
+    0xbf92d936bbe30efd,     0x3feffe9cb44b51a1,     // -0.018407,   0.99983
+    0xbf946b4381fce81c,     0x3feffe5f05e578db,     //  -0.01994,    0.9998
+    0xbf95fd4d21fab226,     0x3feffe1c6870cb77,     // -0.021474,   0.99977
+    0xbf978f535ddc9f03,     0x3feffdd4dbf78f52,     // -0.023008,   0.99974
+    0xbf992155f7a3667e,     0x3feffd886084cd0d,     // -0.024541,    0.9997
+    0xbf9ab354b1504fca,     0x3feffd36f624500c,     // -0.026075,   0.99966
+    0xbf9c454f4ce53b1c,     0x3feffce09ce2a679,     // -0.027608,   0.99962
+    0xbf9dd7458c64ab39,     0x3feffc8554cd213a,     // -0.029142,   0.99958
+    0xbf9f693731d1cf01,     0x3feffc251df1d3f8,     // -0.030675,   0.99953
+    0xbfa07d91ff984580,     0x3feffbbff85f9515,     // -0.032208,   0.99948
+    0xbfa14685db42c17e,     0x3feffb55e425fdae,     // -0.033741,   0.99943
+    0xbfa20f770ceb11c6,     0x3feffae6e1556998,     // -0.035274,   0.99938
+    0xbfa2d865759455cd,     0x3feffa72effef75d,     // -0.036807,   0.99932
+    0xbfa3a150f6421afc,     0x3feff9fa10348837,     //  -0.03834,   0.99926
+    0xbfa46a396ff86179,     0x3feff97c4208c014,     // -0.039873,    0.9992
+    0xbfa5331ec3bba0eb,     0x3feff8f9858f058b,     // -0.041406,   0.99914
+    0xbfa5fc00d290cd43,     0x3feff871dadb81df,     // -0.042938,   0.99908
+    0xbfa6c4df7d7d5b84,     0x3feff7e5420320f9,     // -0.044471,   0.99901
+    0xbfa78dbaa5874685,     0x3feff753bb1b9164,     // -0.046003,   0.99894
+    0xbfa856922bb513c1,     0x3feff6bd463b444d,     // -0.047535,   0.99887
+    0xbfa91f65f10dd814,     0x3feff621e3796d7e,     // -0.049068,    0.9988
+    0xbfa9e835d6993c87,     0x3feff58192ee0358,     //   -0.0506,   0.99872
+    0xbfaab101bd5f8317,     0x3feff4dc54b1bed3,     // -0.052132,   0.99864
+    0xbfab79c986698b78,     0x3feff43228de1b77,     // -0.053664,   0.99856
+    0xbfac428d12c0d7e3,     0x3feff3830f8d575c,     // -0.055195,   0.99848
+    0xbfad0b4c436f91d0,     0x3feff2cf08da7321,     // -0.056727,   0.99839
+    0xbfadd406f9808ec8,     0x3feff21614e131ed,     // -0.058258,    0.9983
+    0xbfae9cbd15ff5527,     0x3feff15833be1965,     //  -0.05979,   0.99821
+    0xbfaf656e79f820e0,     0x3feff095658e71ad,     // -0.061321,   0.99812
+    0xbfb0170d833bf421,     0x3fefefcdaa704562,     // -0.062852,   0.99802
+    0xbfb07b614e463064,     0x3fefef0102826191,     // -0.064383,   0.99793
+    0xbfb0dfb28ea201e6,     0x3fefee2f6de455ba,     // -0.065913,   0.99783
+    0xbfb1440134d709b2,     0x3fefed58ecb673c4,     // -0.067444,   0.99772
+    0xbfb1a84d316d4f8a,     0x3fefec7d7f19cffc,     // -0.068974,   0.99762
+    0xbfb20c9674ed444c,     0x3fefeb9d2530410f,     // -0.070505,   0.99751
+    0xbfb270dcefdfc45b,     0x3fefeab7df1c6005,     // -0.072035,    0.9974
+    0xbfb2d52092ce19f6,     0x3fefe9cdad01883a,     // -0.073565,   0.99729
+    0xbfb339614e41ffa5,     0x3fefe8de8f03d75c,     // -0.075094,   0.99718
+    0xbfb39d9f12c5a299,     0x3fefe7ea85482d60,     // -0.076624,   0.99706
+    0xbfb401d9d0e3a507,     0x3fefe6f18ff42c84,     // -0.078153,   0.99694
+    0xbfb4661179272096,     0x3fefe5f3af2e3940,     // -0.079682,   0.99682
+    0xbfb4ca45fc1ba8b6,     0x3fefe4f0e31d7a4a,     // -0.081211,    0.9967
+    0xbfb52e774a4d4d0a,     0x3fefe3e92be9d886,     //  -0.08274,   0.99657
+    0xbfb592a554489bc8,     0x3fefe2dc89bbff08,     // -0.084269,   0.99644
+    0xbfb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     // -0.085797,   0.99631
+    0xbfb65af75dd0f87b,     0x3fefe0b485181be3,     // -0.087326,   0.99618
+    0xbfb6bf1b3e79b129,     0x3fefdf9922f73307,     // -0.088854,   0.99604
+    0xbfb7233b9d236e71,     0x3fefde78d68653fd,     // -0.090381,   0.99591
+    0xbfb787586a5d5b21,     0x3fefdd539ff1f456,     // -0.091909,   0.99577
+    0xbfb7eb7196b72ee4,     0x3fefdc297f674ba9,     // -0.093436,   0.99563
+    0xbfb84f8712c130a0,     0x3fefdafa7514538c,     // -0.094963,   0.99548
+    0xbfb8b398cf0c38e0,     0x3fefd9c68127c78c,     //  -0.09649,   0.99533
+    0xbfb917a6bc29b42c,     0x3fefd88da3d12526,     // -0.098017,   0.99518
+    0xbfb97bb0caaba56f,     0x3fefd74fdd40abbf,     // -0.099544,   0.99503
+    0xbfb9dfb6eb24a85c,     0x3fefd60d2da75c9e,     //  -0.10107,   0.99488
+    0xbfba43b90e27f3c4,     0x3fefd4c59536fae4,     //   -0.1026,   0.99472
+    0xbfbaa7b724495c04,     0x3fefd37914220b84,     //  -0.10412,   0.99456
+    0xbfbb0bb11e1d5559,     0x3fefd227aa9bd53b,     //  -0.10565,    0.9944
+    0xbfbb6fa6ec38f64c,     0x3fefd0d158d86087,     //  -0.10717,   0.99424
+    0xbfbbd3987f31fa0e,     0x3fefcf761f0c77a3,     //   -0.1087,   0.99407
+    0xbfbc3785c79ec2d5,     0x3fefce15fd6da67b,     //  -0.11022,   0.99391
+    0xbfbc9b6eb6165c42,     0x3fefccb0f4323aa3,     //  -0.11175,   0.99374
+    0xbfbcff533b307dc1,     0x3fefcb4703914354,     //  -0.11327,   0.99356
+    0xbfbd633347858ce4,     0x3fefc9d82bc2915e,     //  -0.11479,   0.99339
+    0xbfbdc70ecbae9fc8,     0x3fefc8646cfeb721,     //  -0.11632,   0.99321
+    0xbfbe2ae5b8457f77,     0x3fefc6ebc77f0887,     //  -0.11784,   0.99303
+    0xbfbe8eb7fde4aa3e,     0x3fefc56e3b7d9af6,     //  -0.11937,   0.99285
+    0xbfbef2858d27561b,     0x3fefc3ebc935454c,     //  -0.12089,   0.99267
+    0xbfbf564e56a9730e,     0x3fefc26470e19fd3,     //  -0.12241,   0.99248
+    0xbfbfba124b07ad85,     0x3fefc0d832bf043a,     //  -0.12393,   0.99229
+    0xbfc00ee8ad6fb85b,     0x3fefbf470f0a8d88,     //  -0.12545,    0.9921
+    0xbfc040c5bb67747e,     0x3fefbdb106021816,     //  -0.12698,   0.99191
+    0xbfc072a047ba831d,     0x3fefbc1617e44186,     //   -0.1285,   0.99171
+    0xbfc0a4784ab8bf1d,     0x3fefba7644f068b5,     //  -0.13002,   0.99151
+    0xbfc0d64dbcb26786,     0x3fefb8d18d66adb7,     //  -0.13154,   0.99131
+    0xbfc1082095f820b0,     0x3fefb727f187f1c7,     //  -0.13306,   0.99111
+    0xbfc139f0cedaf576,     0x3fefb5797195d741,     //  -0.13458,    0.9909
+    0xbfc16bbe5fac5865,     0x3fefb3c60dd2c199,     //   -0.1361,    0.9907
+    0xbfc19d8940be24e7,     0x3fefb20dc681d54d,     //  -0.13762,   0.99049
+    0xbfc1cf516a62a077,     0x3fefb0509be6f7db,     //  -0.13914,   0.99027
+    0xbfc20116d4ec7bce,     0x3fefae8e8e46cfbb,     //  -0.14066,   0.99006
+    0xbfc232d978aed413,     0x3fefacc79de6c44f,     //  -0.14218,   0.98984
+    0xbfc264994dfd340a,     0x3fefaafbcb0cfddc,     //   -0.1437,   0.98962
+    0xbfc296564d2b953e,     0x3fefa92b1600657c,     //  -0.14521,    0.9894
+    0xbfc2c8106e8e613a,     0x3fefa7557f08a517,     //  -0.14673,   0.98918
+    0xbfc2f9c7aa7a72af,     0x3fefa57b066e2754,     //  -0.14825,   0.98895
+    0xbfc32b7bf94516a7,     0x3fefa39bac7a1791,     //  -0.14976,   0.98872
+    0xbfc35d2d53440db2,     0x3fefa1b7717661d5,     //  -0.15128,   0.98849
+    0xbfc38edbb0cd8d14,     0x3fef9fce55adb2c8,     //   -0.1528,   0.98826
+    0xbfc3c0870a383ff6,     0x3fef9de0596b77a3,     //  -0.15431,   0.98802
+    0xbfc3f22f57db4893,     0x3fef9bed7cfbde29,     //  -0.15583,   0.98778
+    0xbfc423d4920e4166,     0x3fef99f5c0abd496,     //  -0.15734,   0.98754
+    0xbfc45576b1293e5a,     0x3fef97f924c9099b,     //  -0.15886,    0.9873
+    0xbfc48715ad84cdf5,     0x3fef95f7a9a1ec47,     //  -0.16037,   0.98706
+    0xbfc4b8b17f79fa88,     0x3fef93f14f85ac08,     //  -0.16189,   0.98681
+    0xbfc4ea4a1f624b61,     0x3fef91e616c43891,     //   -0.1634,   0.98656
+    0xbfc51bdf8597c5f2,     0x3fef8fd5ffae41db,     //  -0.16491,   0.98631
+    0xbfc54d71aa74ef02,     0x3fef8dc10a95380d,     //  -0.16643,   0.98605
+    0xbfc57f008654cbde,     0x3fef8ba737cb4b78,     //  -0.16794,    0.9858
+    0xbfc5b08c1192e381,     0x3fef898887a36c84,     //  -0.16945,   0.98554
+    0xbfc5e214448b3fc6,     0x3fef8764fa714ba9,     //  -0.17096,   0.98528
+    0xbfc61399179a6e94,     0x3fef853c9089595e,     //  -0.17247,   0.98501
+    0xbfc6451a831d830d,     0x3fef830f4a40c60c,     //  -0.17398,   0.98475
+    0xbfc676987f7216b8,     0x3fef80dd27ed8204,     //  -0.17549,   0.98448
+    0xbfc6a81304f64ab2,     0x3fef7ea629e63d6e,     //    -0.177,   0.98421
+    0xbfc6d98a0c08c8da,     0x3fef7c6a50826840,     //  -0.17851,   0.98394
+    0xbfc70afd8d08c4ff,     0x3fef7a299c1a322a,     //  -0.18002,   0.98366
+    0xbfc73c6d8055fe0a,     0x3fef77e40d068a90,     //  -0.18153,   0.98339
+    0xbfc76dd9de50bf31,     0x3fef7599a3a12077,     //  -0.18304,   0.98311
+    0xbfc79f429f59e11d,     0x3fef734a60446279,     //  -0.18455,   0.98282
+    0xbfc7d0a7bbd2cb1b,     0x3fef70f6434b7eb7,     //  -0.18606,   0.98254
+    0xbfc802092c1d744b,     0x3fef6e9d4d1262ca,     //  -0.18756,   0.98225
+    0xbfc83366e89c64c5,     0x3fef6c3f7df5bbb7,     //  -0.18907,   0.98196
+    0xbfc864c0e9b2b6cf,     0x3fef69dcd652f5de,     //  -0.19057,   0.98167
+    0xbfc8961727c41804,     0x3fef677556883cee,     //  -0.19208,   0.98138
+    0xbfc8c7699b34ca7e,     0x3fef6508fef47bd5,     //  -0.19359,   0.98108
+    0xbfc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  -0.19509,   0.98079
+    0xbfc92a0303c8194f,     0x3fef6021c9f148c2,     //  -0.19659,   0.98048
+    0xbfc95b49e9b62af9,     0x3fef5da6ed43685d,     //   -0.1981,   0.98018
+    0xbfc98c8ce69a7aec,     0x3fef5b273a4fa2d9,     //   -0.1996,   0.97988
+    0xbfc9bdcbf2dc4366,     0x3fef58a2b1789e84,     //   -0.2011,   0.97957
+    0xbfc9ef0706e35a35,     0x3fef56195321c090,     //  -0.20261,   0.97926
+    0xbfca203e1b1831da,     0x3fef538b1faf2d07,     //  -0.20411,   0.97895
+    0xbfca517127e3dabc,     0x3fef50f81785c6b9,     //  -0.20561,   0.97863
+    0xbfca82a025b00451,     0x3fef4e603b0b2f2d,     //  -0.20711,   0.97832
+    0xbfcab3cb0ce6fe44,     0x3fef4bc38aa5c694,     //  -0.20861,     0.978
+    0xbfcae4f1d5f3b9ab,     0x3fef492206bcabb4,     //  -0.21011,   0.97768
+    0xbfcb16147941ca2a,     0x3fef467bafb7bbe0,     //  -0.21161,   0.97735
+    0xbfcb4732ef3d6722,     0x3fef43d085ff92dd,     //  -0.21311,   0.97703
+    0xbfcb784d30536cda,     0x3fef412089fd8adc,     //  -0.21461,    0.9767
+    0xbfcba96334f15dad,     0x3fef3e6bbc1bbc65,     //  -0.21611,   0.97637
+    0xbfcbda74f5856330,     0x3fef3bb21cc4fe47,     //   -0.2176,   0.97604
+    0xbfcc0b826a7e4f63,     0x3fef38f3ac64e589,     //   -0.2191,    0.9757
+    0xbfcc3c8b8c4b9dd7,     0x3fef36306b67c556,     //   -0.2206,   0.97536
+    0xbfcc6d90535d74dc,     0x3fef33685a3aaef0,     //  -0.22209,   0.97503
+    0xbfcc9e90b824a6a9,     0x3fef309b794b719f,     //  -0.22359,   0.97468
+    0xbfcccf8cb312b286,     0x3fef2dc9c9089a9d,     //  -0.22508,   0.97434
+    0xbfcd00843c99c5f9,     0x3fef2af349e17507,     //  -0.22658,   0.97399
+    0xbfcd31774d2cbdee,     0x3fef2817fc4609ce,     //  -0.22807,   0.97364
+    0xbfcd6265dd3f27e3,     0x3fef2537e0a71f9f,     //  -0.22957,   0.97329
+    0xbfcd934fe5454311,     0x3fef2252f7763ada,     //  -0.23106,   0.97294
+    0xbfcdc4355db40195,     0x3fef1f6941259d7a,     //  -0.23255,   0.97258
+    0xbfcdf5163f01099a,     0x3fef1c7abe284708,     //  -0.23404,   0.97223
+    0xbfce25f281a2b684,     0x3fef19876ef1f486,     //  -0.23553,   0.97187
+    0xbfce56ca1e101a1b,     0x3fef168f53f7205d,     //  -0.23702,    0.9715
+    0xbfce879d0cc0fdaf,     0x3fef13926dad024e,     //  -0.23851,   0.97114
+    0xbfceb86b462de348,     0x3fef1090bc898f5f,     //     -0.24,   0.97077
+    0xbfcee934c2d006c7,     0x3fef0d8a410379c5,     //  -0.24149,    0.9704
+    0xbfcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  -0.24298,   0.97003
+    0xbfcf4ab9679c9f5c,     0x3fef076eecade0fa,     //  -0.24447,   0.96966
+    0xbfcf7b7480bd3801,     0x3fef045a14cf738c,     //  -0.24596,   0.96928
+    0xbfcfac2abeff57ff,     0x3fef014074708ed3,     //  -0.24744,    0.9689
+    0xbfcfdcdc1adfedf8,     0x3feefe220c0b95ec,     //  -0.24893,   0.96852
+    0xbfd006c4466e54af,     0x3feefafedc1ba8b7,     //  -0.25041,   0.96814
+    0xbfd01f1806b9fdd2,     0x3feef7d6e51ca3c0,     //   -0.2519,   0.96775
+    0xbfd037694a928cac,     0x3feef4aa278b2032,     //  -0.25338,   0.96737
+    0xbfd04fb80e37fdae,     0x3feef178a3e473c2,     //  -0.25487,   0.96698
+    0xbfd068044deab002,     0x3feeee425aa6b09a,     //  -0.25635,   0.96658
+    0xbfd0804e05eb661e,     0x3feeeb074c50a544,     //  -0.25783,   0.96619
+    0xbfd09895327b465e,     0x3feee7c77961dc9e,     //  -0.25931,   0.96579
+    0xbfd0b0d9cfdbdb90,     0x3feee482e25a9dbc,     //  -0.26079,   0.96539
+    0xbfd0c91bda4f158d,     0x3feee13987bbebdc,     //  -0.26227,   0.96499
+    0xbfd0e15b4e1749cd,     0x3feeddeb6a078651,     //  -0.26375,   0.96459
+    0xbfd0f998277733f7,     0x3feeda9889bfe86a,     //  -0.26523,   0.96418
+    0xbfd111d262b1f677,     0x3feed740e7684963,     //  -0.26671,   0.96378
+    0xbfd12a09fc0b1b12,     0x3feed3e483849c51,     //  -0.26819,   0.96337
+    0xbfd1423eefc69378,     0x3feed0835e999009,     //  -0.26967,   0.96295
+    0xbfd15a713a28b9d9,     0x3feecd1d792c8f10,     //  -0.27115,   0.96254
+    0xbfd172a0d7765177,     0x3feec9b2d3c3bf84,     //  -0.27262,   0.96212
+    0xbfd18acdc3f4873a,     0x3feec6436ee60309,     //   -0.2741,    0.9617
+    0xbfd1a2f7fbe8f243,     0x3feec2cf4b1af6b2,     //  -0.27557,   0.96128
+    0xbfd1bb1f7b999480,     0x3feebf5668eaf2ef,     //  -0.27705,   0.96086
+    0xbfd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //  -0.27852,   0.96043
+    0xbfd1eb6643499fbb,     0x3feeb8566b810f2a,     //  -0.27999,      0.96
+    0xbfd2038583d727bd,     0x3feeb4cf515b8811,     //  -0.28146,   0.95957
+    0xbfd21ba1fd3d2623,     0x3feeb1437af9bb34,     //  -0.28294,   0.95914
+    0xbfd233bbabc3bb72,     0x3feeadb2e8e7a88e,     //  -0.28441,    0.9587
+    0xbfd24bd28bb37672,     0x3feeaa1d9bb20af3,     //  -0.28588,   0.95827
+    0xbfd263e6995554ba,     0x3feea68393e65800,     //  -0.28735,   0.95783
+    0xbfd27bf7d0f2c346,     0x3feea2e4d212c000,     //  -0.28882,   0.95738
+    0xbfd294062ed59f05,     0x3fee9f4156c62dda,     //  -0.29028,   0.95694
+    0xbfd2ac11af483572,     0x3fee9b99229046f8,     //  -0.29175,   0.95649
+    0xbfd2c41a4e954520,     0x3fee97ec36016b30,     //  -0.29322,   0.95605
+    0xbfd2dc200907fe51,     0x3fee943a91aab4b4,     //  -0.29469,   0.95559
+    0xbfd2f422daec0386,     0x3fee9084361df7f3,     //  -0.29615,   0.95514
+    0xbfd30c22c08d6a13,     0x3fee8cc923edc388,     //  -0.29762,   0.95469
+    0xbfd3241fb638baaf,     0x3fee89095bad6025,     //  -0.29908,   0.95423
+    0xbfd33c19b83af207,     0x3fee8544ddf0d075,     //  -0.30054,   0.95377
+    0xbfd35410c2e18152,     0x3fee817bab4cd10d,     //  -0.30201,   0.95331
+    0xbfd36c04d27a4edf,     0x3fee7dadc456d850,     //  -0.30347,   0.95284
+    0xbfd383f5e353b6aa,     0x3fee79db29a5165a,     //  -0.30493,   0.95238
+    0xbfd39be3f1bc8aef,     0x3fee7603dbce74e9,     //  -0.30639,   0.95191
+    0xbfd3b3cefa0414b7,     0x3fee7227db6a9744,     //  -0.30785,   0.95144
+    0xbfd3cbb6f87a146e,     0x3fee6e472911da27,     //  -0.30931,   0.95096
+    0xbfd3e39be96ec271,     0x3fee6a61c55d53a7,     //  -0.31077,   0.95049
+    0xbfd3fb7dc932cfa4,     0x3fee6677b0e6d31e,     //  -0.31222,   0.95001
+    0xbfd4135c94176602,     0x3fee6288ec48e112,     //  -0.31368,   0.94953
+    0xbfd42b38466e2928,     0x3fee5e95781ebf1c,     //  -0.31514,   0.94905
+    0xbfd44310dc8936f0,     0x3fee5a9d550467d3,     //  -0.31659,   0.94856
+    0xbfd45ae652bb2800,     0x3fee56a083968eb1,     //  -0.31805,   0.94807
+    0xbfd472b8a5571054,     0x3fee529f04729ffc,     //   -0.3195,   0.94759
+    0xbfd48a87d0b07fd7,     0x3fee4e98d836c0af,     //  -0.32096,   0.94709
+    0xbfd4a253d11b82f3,     0x3fee4a8dff81ce5e,     //  -0.32241,    0.9466
+    0xbfd4ba1ca2eca31c,     0x3fee467e7af35f23,     //  -0.32386,   0.94611
+    0xbfd4d1e24278e76a,     0x3fee426a4b2bc17e,     //  -0.32531,   0.94561
+    0xbfd4e9a4ac15d520,     0x3fee3e5170cbfc46,     //  -0.32676,   0.94511
+    0xbfd50163dc197047,     0x3fee3a33ec75ce85,     //  -0.32821,    0.9446
+    0xbfd5191fceda3c35,     0x3fee3611becbaf69,     //  -0.32966,    0.9441
+    0xbfd530d880af3c24,     0x3fee31eae870ce25,     //  -0.33111,   0.94359
+    0xbfd5488dedeff3be,     0x3fee2dbf6a0911d9,     //  -0.33255,   0.94308
+    0xbfd5604012f467b4,     0x3fee298f4439197a,     //    -0.334,   0.94257
+    0xbfd577eeec151e47,     0x3fee255a77a63bb8,     //  -0.33545,   0.94206
+    0xbfd58f9a75ab1fdd,     0x3fee212104f686e5,     //  -0.33689,   0.94154
+    0xbfd5a742ac0ff78d,     0x3fee1ce2ecd0c0d8,     //  -0.33833,   0.94103
+    0xbfd5bee78b9db3b6,     0x3fee18a02fdc66d9,     //  -0.33978,   0.94051
+    0xbfd5d68910aee686,     0x3fee1458cec1ad83,     //  -0.34122,   0.93998
+    0xbfd5ee27379ea693,     0x3fee100cca2980ac,     //  -0.34266,   0.93946
+    0xbfd605c1fcc88f63,     0x3fee0bbc22bd8349,     //   -0.3441,   0.93893
+    0xbfd61d595c88c203,     0x3fee0766d9280f54,     //  -0.34554,    0.9384
+    0xbfd634ed533be58e,     0x3fee030cee1435b8,     //  -0.34698,   0.93787
+    0xbfd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //  -0.34842,   0.93734
+    0xbfd6640af6f03d9e,     0x3fedfa4b3621271d,     //  -0.34986,    0.9368
+    0xbfd67b949cad63ca,     0x3fedf5e36a9ba59c,     //  -0.35129,   0.93627
+    0xbfd6931acad55f51,     0x3fedf177004b2534,     //  -0.35273,   0.93573
+    0xbfd6aa9d7dc77e16,     0x3feded05f7de47da,     //  -0.35416,   0.93518
+    0xbfd6c21cb1e39771,     0x3fede890520465ce,     //   -0.3556,   0.93464
+    0xbfd6d998638a0cb5,     0x3fede4160f6d8d81,     //  -0.35703,   0.93409
+    0xbfd6f1108f1bc9c5,     0x3feddf9730ca837b,     //  -0.35846,   0.93354
+    0xbfd7088530fa459e,     0x3feddb13b6ccc23d,     //   -0.3599,   0.93299
+    0xbfd71ff6458782ec,     0x3fedd68ba2267a25,     //  -0.36133,   0.93244
+    0xbfd73763c9261092,     0x3fedd1fef38a915a,     //  -0.36276,   0.93188
+    0xbfd74ecdb8390a3e,     0x3fedcd6dabaca3a5,     //  -0.36418,   0.93133
+    0xbfd766340f2418f6,     0x3fedc8d7cb410260,     //  -0.36561,   0.93077
+    0xbfd77d96ca4b73a6,     0x3fedc43d52fcb453,     //  -0.36704,   0.93021
+    0xbfd794f5e613dfae,     0x3fedbf9e4395759a,     //  -0.36847,   0.92964
+    0xbfd7ac515ee2b172,     0x3fedbafa9dc1b78d,     //  -0.36989,   0.92907
+    0xbfd7c3a9311dcce7,     0x3fedb6526238a09b,     //  -0.37132,   0.92851
+    0xbfd7dafd592ba621,     0x3fedb1a591b20c38,     //  -0.37274,   0.92794
+    0xbfd7f24dd37341e3,     0x3fedacf42ce68ab9,     //  -0.37416,   0.92736
+    0xbfd8099a9c5c362d,     0x3feda83e348f613b,     //  -0.37559,   0.92679
+    0xbfd820e3b04eaac4,     0x3feda383a9668988,     //  -0.37701,   0.92621
+    0xbfd838290bb359c8,     0x3fed9ec48c26b1f3,     //  -0.37843,   0.92563
+    0xbfd84f6aaaf3903f,     0x3fed9a00dd8b3d46,     //  -0.37985,   0.92505
+    0xbfd866a88a792ea0,     0x3fed95389e50429b,     //  -0.38127,   0.92447
+    0xbfd87de2a6aea963,     0x3fed906bcf328d46,     //  -0.38268,   0.92388
+    0xbfd89518fbff098e,     0x3fed8b9a70ef9cb4,     //   -0.3841,   0.92329
+    0xbfd8ac4b86d5ed44,     0x3fed86c48445a450,     //  -0.38552,    0.9227
+    0xbfd8c37a439f884f,     0x3fed81ea09f38b63,     //  -0.38693,   0.92211
+    0xbfd8daa52ec8a4af,     0x3fed7d0b02b8ecf9,     //  -0.38835,   0.92151
+    0xbfd8f1cc44bea329,     0x3fed78276f5617c6,     //  -0.38976,   0.92092
+    0xbfd908ef81ef7bd1,     0x3fed733f508c0dff,     //  -0.39117,   0.92032
+    0xbfd9200ee2c9be97,     0x3fed6e52a71c8547,     //  -0.39258,   0.91972
+    0xbfd9372a63bc93d7,     0x3fed696173c9e68b,     //  -0.39399,   0.91911
+    0xbfd94e420137bce3,     0x3fed646bb7574de5,     //   -0.3954,   0.91851
+    0xbfd96555b7ab948f,     0x3fed5f7172888a7f,     //  -0.39681,    0.9179
+    0xbfd97c6583890fc2,     0x3fed5a72a6221e73,     //  -0.39822,   0.91729
+    0xbfd993716141bdfe,     0x3fed556f52e93eb1,     //  -0.39962,   0.91668
+    0xbfd9aa794d47c9ee,     0x3fed506779a3d2d9,     //  -0.40103,   0.91606
+    0xbfd9c17d440df9f2,     0x3fed4b5b1b187524,     //  -0.40243,   0.91545
+    0xbfd9d87d4207b0ab,     0x3fed464a380e7242,     //  -0.40384,   0.91483
+    0xbfd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //  -0.40524,   0.91421
+    0xbfda067145664d57,     0x3fed3c1ae79f2b4e,     //  -0.40664,   0.91359
+    0xbfda1d6543b50ac0,     0x3fed36fc7bcbfbdc,     //  -0.40804,   0.91296
+    0xbfda34553b0afee5,     0x3fed31d98e9e503a,     //  -0.40944,   0.91234
+    0xbfda4b4127dea1e4,     0x3fed2cb220e0ef9f,     //  -0.41084,   0.91171
+    0xbfda622906a70b63,     0x3fed2786335f52fc,     //  -0.41224,   0.91107
+    0xbfda790cd3dbf31a,     0x3fed2255c6e5a4e1,     //  -0.41364,   0.91044
+    0xbfda8fec8bf5b166,     0x3fed1d20dc40c15c,     //  -0.41503,   0.90981
+    0xbfdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //  -0.41643,   0.90917
+    0xbfdabd9faebc3980,     0x3fed12a98fac410c,     //  -0.41782,   0.90853
+    0xbfdad473125cdc08,     0x3fed0d672f59d2b9,     //  -0.41922,   0.90789
+    0xbfdaeb4252ca07ab,     0x3fed082054168bac,     //  -0.42061,   0.90724
+    0xbfdb020d6c7f4009,     0x3fed02d4feb2bd92,     //    -0.422,    0.9066
+    0xbfdb18d45bf8aca6,     0x3fecfd852fff6ad4,     //  -0.42339,   0.90595
+    0xbfdb2f971db31972,     0x3fecf830e8ce467b,     //  -0.42478,    0.9053
+    0xbfdb4655ae2bf757,     0x3fecf2d829f1b40e,     //  -0.42617,   0.90464
+    0xbfdb5d1009e15cc0,     0x3feced7af43cc773,     //  -0.42756,   0.90399
+    0xbfdb73c62d520624,     0x3fece819488344ce,     //  -0.42894,   0.90333
+    0xbfdb8a7814fd5693,     0x3fece2b32799a060,     //  -0.43033,   0.90267
+    0xbfdba125bd63583e,     0x3fecdd489254fe65,     //  -0.43171,   0.90201
+    0xbfdbb7cf2304bd01,     0x3fecd7d9898b32f6,     //  -0.43309,   0.90135
+    0xbfdbce744262deee,     0x3fecd2660e12c1e6,     //  -0.43448,   0.90068
+    0xbfdbe51517ffc0d9,     0x3fecccee20c2de9f,     //  -0.43586,   0.90002
+    0xbfdbfbb1a05e0edc,     0x3fecc771c2736c09,     //  -0.43724,   0.89935
+    0xbfdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //  -0.43862,   0.89867
+    0xbfdc28ddbb6cf145,     0x3fecbc6bb638d10b,     //  -0.43999,     0.898
+    0xbfdc3f6d47263129,     0x3fecb6e20a00da99,     //  -0.44137,   0.89732
+    0xbfdc55f877b23537,     0x3fecb153f02fb87d,     //  -0.44275,   0.89665
+    0xbfdc6c7f4997000a,     0x3fecabc169a0b901,     //  -0.44412,   0.89597
+    0xbfdc8301b95b40c2,     0x3feca62a772fd919,     //   -0.4455,   0.89528
+    0xbfdc997fc3865388,     0x3feca08f19b9c449,     //  -0.44687,    0.8946
+    0xbfdcaff964a0421d,     0x3fec9aef521bd480,     //  -0.44824,   0.89391
+    0xbfdcc66e9931c45d,     0x3fec954b213411f5,     //  -0.44961,   0.89322
+    0xbfdcdcdf5dc440ce,     0x3fec8fa287e13305,     //  -0.45098,   0.89253
+    0xbfdcf34baee1cd21,     0x3fec89f587029c13,     //  -0.45235,   0.89184
+    0xbfdd09b389152ec1,     0x3fec84441f785f61,     //  -0.45372,   0.89115
+    0xbfdd2016e8e9db5b,     0x3fec7e8e52233cf3,     //  -0.45508,   0.89045
+    0xbfdd3675caebf962,     0x3fec78d41fe4a267,     //  -0.45645,   0.88975
+    0xbfdd4cd02ba8609c,     0x3fec7315899eaad7,     //  -0.45781,   0.88905
+    0xbfdd632607ac9aa9,     0x3fec6d5290341eb2,     //  -0.45918,   0.88835
+    0xbfdd79775b86e389,     0x3fec678b3488739b,     //  -0.46054,   0.88764
+    0xbfdd8fc423c62a25,     0x3fec61bf777fcc48,     //   -0.4619,   0.88693
+    0xbfdda60c5cfa10d8,     0x3fec5bef59fef85a,     //  -0.46326,   0.88622
+    0xbfddbc5003b2edf8,     0x3fec561adceb743e,     //  -0.46462,   0.88551
+    0xbfddd28f1481cc58,     0x3fec5042012b6907,     //  -0.46598,    0.8848
+    0xbfdde8c98bf86bd6,     0x3fec4a64c7a5ac4c,     //  -0.46733,   0.88408
+    0xbfddfeff66a941de,     0x3fec44833141c004,     //  -0.46869,   0.88336
+    0xbfde1530a12779f4,     0x3fec3e9d3ee7d262,     //  -0.47004,   0.88264
+    0xbfde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   -0.4714,   0.88192
+    0xbfde418527dc4ffa,     0x3fec32c449f60831,     //  -0.47275,    0.8812
+    0xbfde57a86d3cd824,     0x3fec2cd14931e3f1,     //   -0.4741,   0.88047
+    0xbfde6dc704be97e2,     0x3fec26d9f01f2eaf,     //  -0.47545,   0.87974
+    0xbfde83e0eaf85113,     0x3fec20de3fa971b0,     //   -0.4768,   0.87901
+    0xbfde99f61c817eda,     0x3fec1ade38bce19b,     //  -0.47815,   0.87828
+    0xbfdeb00695f25620,     0x3fec14d9dc465e58,     //  -0.47949,   0.87755
+    0xbfdec61253e3c61b,     0x3fec0ed12b3372e9,     //  -0.48084,   0.87681
+    0xbfdedc1952ef78d5,     0x3fec08c426725549,     //  -0.48218,   0.87607
+    0xbfdef21b8fafd3b5,     0x3fec02b2cef1e641,     //  -0.48353,   0.87533
+    0xbfdf081906bff7fd,     0x3febfc9d25a1b147,     //  -0.48487,   0.87459
+    0xbfdf1e11b4bbc35c,     0x3febf6832b71ec5b,     //  -0.48621,   0.87384
+    0xbfdf3405963fd068,     0x3febf064e15377dd,     //  -0.48755,   0.87309
+    0xbfdf49f4a7e97729,     0x3febea424837de6d,     //  -0.48889,   0.87235
+    0xbfdf5fdee656cda3,     0x3febe41b611154c1,     //  -0.49023,    0.8716
+    0xbfdf75c44e26a852,     0x3febddf02cd2b983,     //  -0.49156,   0.87084
+    0xbfdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //   -0.4929,   0.87009
+    0xbfdfa1808c6cf7e0,     0x3febd18ce0dc19d6,     //  -0.49423,   0.86933
+    0xbfdfb7575c24d2de,     0x3febcb54cb0d2327,     //  -0.49557,   0.86857
+    0xbfdfcd2947c1ff57,     0x3febc5186bf8361d,     //   -0.4969,   0.86781
+    0xbfdfe2f64be7120f,     0x3febbed7c49380ea,     //  -0.49823,   0.86705
+    0xbfdff8be6537615e,     0x3febb892d5d5dad5,     //  -0.49956,   0.86628
+    0xbfe00740c82b82e0,     0x3febb249a0b6c40d,     //  -0.50089,   0.86551
+    0xbfe0121fe4f56d2c,     0x3febabfc262e6586,     //  -0.50221,   0.86474
+    0xbfe01cfc874c3eb7,     0x3feba5aa673590d2,     //  -0.50354,   0.86397
+    0xbfe027d6ad83287e,     0x3feb9f5464c5bffc,     //  -0.50486,    0.8632
+    0xbfe032ae55edbd95,     0x3feb98fa1fd9155e,     //  -0.50619,   0.86242
+    0xbfe03d837edff370,     0x3feb929b996a5b7f,     //  -0.50751,   0.86165
+    0xbfe0485626ae221a,     0x3feb8c38d27504e9,     //  -0.50883,   0.86087
+    0xbfe053264bad0483,     0x3feb85d1cbf52c02,     //  -0.51015,   0.86009
+    0xbfe05df3ec31b8b6,     0x3feb7f6686e792ea,     //  -0.51147,    0.8593
+    0xbfe068bf0691c028,     0x3feb78f70449a34b,     //  -0.51279,   0.85852
+    0xbfe073879922ffed,     0x3feb728345196e3e,     //   -0.5141,   0.85773
+    0xbfe07e4da23bc102,     0x3feb6c0b4a55ac17,     //  -0.51542,   0.85694
+    0xbfe089112032b08c,     0x3feb658f14fdbc47,     //  -0.51673,   0.85615
+    0xbfe093d2115ee018,     0x3feb5f0ea611a532,     //  -0.51804,   0.85535
+    0xbfe09e907417c5e1,     0x3feb5889fe921405,     //  -0.51936,   0.85456
+    0xbfe0a94c46b53d0b,     0x3feb52011f805c92,     //  -0.52067,   0.85376
+    0xbfe0b405878f85ec,     0x3feb4b7409de7925,     //  -0.52198,   0.85296
+    0xbfe0bebc34ff4646,     0x3feb44e2beaf0a61,     //  -0.52328,   0.85216
+    0xbfe0c9704d5d898f,     0x3feb3e4d3ef55712,     //  -0.52459,   0.85136
+    0xbfe0d421cf03c12b,     0x3feb37b38bb54c09,     //   -0.5259,   0.85055
+    0xbfe0ded0b84bc4b5,     0x3feb3115a5f37bf4,     //   -0.5272,   0.84974
+    0xbfe0e97d078fd23b,     0x3feb2a738eb51f33,     //   -0.5285,   0.84893
+    0xbfe0f426bb2a8e7d,     0x3feb23cd470013b4,     //   -0.5298,   0.84812
+    0xbfe0fecdd1770537,     0x3feb1d22cfdadcc6,     //   -0.5311,   0.84731
+    0xbfe1097248d0a956,     0x3feb16742a4ca2f5,     //   -0.5324,   0.84649
+    0xbfe114141f935545,     0x3feb0fc1575d33db,     //   -0.5337,   0.84567
+    0xbfe11eb3541b4b22,     0x3feb090a58150200,     //    -0.535,   0.84485
+    0xbfe1294fe4c5350a,     0x3feb024f2d7d24a9,     //  -0.53629,   0.84403
+    0xbfe133e9cfee254e,     0x3feafb8fd89f57b6,     //  -0.53759,   0.84321
+    0xbfe13e8113f396c1,     0x3feaf4cc5a85fb73,     //  -0.53888,   0.84238
+    0xbfe14915af336ceb,     0x3feaee04b43c1474,     //  -0.54017,   0.84155
+    0xbfe153a7a00bf453,     0x3feae738e6cd4b67,     //  -0.54146,   0.84073
+    0xbfe15e36e4dbe2bc,     0x3feae068f345ecef,     //  -0.54275,   0.83989
+    0xbfe168c37c025764,     0x3fead994dab2e979,     //  -0.54404,   0.83906
+    0xbfe1734d63dedb49,     0x3fead2bc9e21d511,     //  -0.54532,   0.83822
+    0xbfe17dd49ad16161,     0x3feacbe03ea0e73b,     //  -0.54661,   0.83739
+    0xbfe188591f3a46e5,     0x3feac4ffbd3efac8,     //  -0.54789,   0.83655
+    0xbfe192daef7a5386,     0x3feabe1b1b0b8dac,     //  -0.54918,   0.83571
+    0xbfe19d5a09f2b9b8,     0x3feab7325916c0d4,     //  -0.55046,   0.83486
+    0xbfe1a7d66d0516e6,     0x3feab045787157ff,     //  -0.55174,   0.83402
+    0xbfe1b250171373be,     0x3feaa9547a2cb98e,     //  -0.55302,   0.83317
+    0xbfe1bcc706804467,     0x3feaa25f5f5aee60,     //  -0.55429,   0.83232
+    0xbfe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  -0.55557,   0.83147
+    0xbfe1d1acaf012cc2,     0x3fea9468d85b20ae,     //  -0.55685,   0.83062
+    0xbfe1dc1b64dc4872,     0x3fea8d676e545ad2,     //  -0.55812,   0.82976
+    0xbfe1e68759a3e074,     0x3fea8661ec0ee133,     //  -0.55939,    0.8289
+    0xbfe1f0f08bbc861b,     0x3fea7f58529fe69d,     //  -0.56066,   0.82805
+    0xbfe1fb56f98b37b8,     0x3fea784aa31d3f55,     //  -0.56193,   0.82718
+    0xbfe205baa17560d6,     0x3fea7138de9d60f5,     //   -0.5632,   0.82632
+    0xbfe2101b81e0da78,     0x3fea6a230637623b,     //  -0.56447,   0.82546
+    0xbfe21a799933eb58,     0x3fea63091b02fae2,     //  -0.56573,   0.82459
+    0xbfe224d4e5d5482e,     0x3fea5beb1e188375,     //    -0.567,   0.82372
+    0xbfe22f2d662c13e1,     0x3fea54c91090f524,     //  -0.56826,   0.82285
+    0xbfe23983189fdfd5,     0x3fea4da2f385e997,     //  -0.56952,   0.82198
+    0xbfe243d5fb98ac1f,     0x3fea4678c8119ac8,     //  -0.57078,    0.8211
+    0xbfe24e260d7ee7c9,     0x3fea3f4a8f4ee2d2,     //  -0.57204,   0.82023
+    0xbfe258734cbb7110,     0x3fea38184a593bc6,     //   -0.5733,   0.81935
+    0xbfe262bdb7b795a2,     0x3fea30e1fa4cbf81,     //  -0.57455,   0.81847
+    0xbfe26d054cdd12df,     0x3fea29a7a0462782,     //  -0.57581,   0.81758
+    0xbfe2774a0a961612,     0x3fea22693d62ccb9,     //  -0.57706,    0.8167
+    0xbfe2818bef4d3cba,     0x3fea1b26d2c0a75e,     //  -0.57831,   0.81581
+    0xbfe28bcaf96d94ba,     0x3fea13e0617e4ec7,     //  -0.57956,   0.81493
+    0xbfe2960727629ca8,     0x3fea0c95eabaf937,     //  -0.58081,   0.81404
+    0xbfe2a040779843fb,     0x3fea05476f967bb5,     //  -0.58206,   0.81314
+    0xbfe2aa76e87aeb58,     0x3fe9fdf4f13149de,     //  -0.58331,   0.81225
+    0xbfe2b4aa787764c4,     0x3fe9f69e70ac75bc,     //  -0.58455,   0.81135
+    0xbfe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //   -0.5858,   0.81046
+    0xbfe2c908ef734e57,     0x3fe9e7e56dcb45bd,     //  -0.58704,   0.80956
+    0xbfe2d333d34e9bb7,     0x3fe9e082edb42472,     //  -0.58828,   0.80866
+    0xbfe2dd5bcffb7616,     0x3fe9d91c7007d5a6,     //  -0.58952,   0.80775
+    0xbfe2e780e3e8ea16,     0x3fe9d1b1f5ea80d6,     //  -0.59076,   0.80685
+    0xbfe2f1a30d86773a,     0x3fe9ca438080eadb,     //    -0.592,   0.80594
+    0xbfe2fbc24b441015,     0x3fe9c2d110f075c3,     //  -0.59323,   0.80503
+    0xbfe305de9b921a94,     0x3fe9bb5aa85f2098,     //  -0.59447,   0.80412
+    0xbfe30ff7fce17035,     0x3fe9b3e047f38741,     //   -0.5957,   0.80321
+    0xbfe31a0e6da35e44,     0x3fe9ac61f0d4e247,     //  -0.59693,   0.80229
+    0xbfe32421ec49a620,     0x3fe9a4dfa42b06b2,     //  -0.59816,   0.80138
+    0xbfe32e3277467d6b,     0x3fe99d59631e65d5,     //  -0.59939,   0.80046
+    0xbfe338400d0c8e57,     0x3fe995cf2ed80d22,     //  -0.60062,   0.79954
+    0xbfe3424aac0ef7d6,     0x3fe98e410881a600,     //  -0.60184,   0.79861
+    0xbfe34c5252c14de1,     0x3fe986aef1457594,     //  -0.60307,   0.79769
+    0xbfe35656ff9799ae,     0x3fe97f18ea4e5c9e,     //  -0.60429,   0.79676
+    0xbfe36058b10659f3,     0x3fe9777ef4c7d742,     //  -0.60551,   0.79584
+    0xbfe36a576582831b,     0x3fe96fe111ddfce0,     //  -0.60673,   0.79491
+    0xbfe374531b817f8d,     0x3fe9683f42bd7fe1,     //  -0.60795,   0.79398
+    0xbfe37e4bd1792fe2,     0x3fe960998893ad8c,     //  -0.60917,   0.79304
+    0xbfe3884185dfeb22,     0x3fe958efe48e6dd7,     //  -0.61038,   0.79211
+    0xbfe39234372c7f04,     0x3fe9514257dc4335,     //   -0.6116,   0.79117
+    0xbfe39c23e3d63029,     0x3fe94990e3ac4a6c,     //  -0.61281,   0.79023
+    0xbfe3a6108a54ba58,     0x3fe941db892e3a65,     //  -0.61402,   0.78929
+    0xbfe3affa292050b9,     0x3fe93a22499263fc,     //  -0.61523,   0.78835
+    0xbfe3b9e0beb19e18,     0x3fe932652609b1cf,     //  -0.61644,    0.7874
+    0xbfe3c3c44981c517,     0x3fe92aa41fc5a815,     //  -0.61765,   0.78646
+    0xbfe3cda4c80a6076,     0x3fe922df37f8646a,     //  -0.61885,   0.78551
+    0xbfe3d78238c58343,     0x3fe91b166fd49da2,     //  -0.62006,   0.78456
+    0xbfe3e15c9a2db922,     0x3fe91349c88da398,     //  -0.62126,    0.7836
+    0xbfe3eb33eabe0680,     0x3fe90b7943575efe,     //  -0.62246,   0.78265
+    0xbfe3f50828f1e8d2,     0x3fe903a4e1665133,     //  -0.62366,   0.78169
+    0xbfe3fed9534556d4,     0x3fe8fbcca3ef940d,     //  -0.62486,   0.78074
+    0xbfe408a76834c0c0,     0x3fe8f3f08c28d9ac,     //  -0.62606,   0.77978
+    0xbfe41272663d108c,     0x3fe8ec109b486c49,     //  -0.62725,   0.77882
+    0xbfe41c3a4bdbaa26,     0x3fe8e42cd2852e0a,     //  -0.62845,   0.77785
+    0xbfe425ff178e6bb1,     0x3fe8dc45331698cc,     //  -0.62964,   0.77689
+    0xbfe42fc0c7d3adbb,     0x3fe8d459be34bdfa,     //  -0.63083,   0.77592
+    0xbfe4397f5b2a4380,     0x3fe8cc6a75184655,     //  -0.63202,   0.77495
+    0xbfe4433ad0117b1d,     0x3fe8c47758fa71cb,     //  -0.63321,   0.77398
+    0xbfe44cf325091dd6,     0x3fe8bc806b151741,     //  -0.63439,   0.77301
+    0xbfe456a858917046,     0x3fe8b485aca2a468,     //  -0.63558,   0.77204
+    0xbfe4605a692b32a2,     0x3fe8ac871ede1d88,     //  -0.63676,   0.77106
+    0xbfe46a095557a0f1,     0x3fe8a484c3031d50,     //  -0.63794,   0.77008
+    0xbfe473b51b987347,     0x3fe89c7e9a4dd4ab,     //  -0.63912,    0.7691
+    0xbfe47d5dba6fde01,     0x3fe89474a5fb0a84,     //   -0.6403,   0.76812
+    0xbfe48703306091fe,     0x3fe88c66e7481ba1,     //  -0.64148,   0.76714
+    0xbfe490a57bedbcdf,     0x3fe884555f72fa6b,     //  -0.64266,   0.76615
+    0xbfe49a449b9b0938,     0x3fe87c400fba2ebf,     //  -0.64383,   0.76517
+    0xbfe4a3e08dec9ed6,     0x3fe87426f95cd5bd,     //    -0.645,   0.76418
+    0xbfe4ad79516722f0,     0x3fe86c0a1d9aa195,     //  -0.64618,   0.76319
+    0xbfe4b70ee48fb869,     0x3fe863e97db3d95a,     //  -0.64735,    0.7622
+    0xbfe4c0a145ec0004,     0x3fe85bc51ae958cc,     //  -0.64851,    0.7612
+    0xbfe4ca30740218a3,     0x3fe8539cf67c9029,     //  -0.64968,   0.76021
+    0xbfe4d3bc6d589f80,     0x3fe84b7111af83f9,     //  -0.65085,   0.75921
+    0xbfe4dd453076b064,     0x3fe843416dc4cce2,     //  -0.65201,   0.75821
+    0xbfe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //  -0.65317,   0.75721
+    0xbfe4f04d0e2859aa,     0x3fe832d6eda3a3e0,     //  -0.65433,   0.75621
+    0xbfe4f9cc25cca486,     0x3fe82a9c13f545ff,     //  -0.65549,    0.7552
+    0xbfe503480159ded2,     0x3fe8225d803964e5,     //  -0.65665,   0.75419
+    0xbfe50cc09f59a09b,     0x3fe81a1b33b57acc,     //  -0.65781,   0.75319
+    0xbfe51635fe5601d7,     0x3fe811d52faf94dc,     //  -0.65896,   0.75218
+    0xbfe51fa81cd99aa6,     0x3fe8098b756e52fa,     //  -0.66011,   0.75117
+    0xbfe52916f96f8388,     0x3fe8013e0638e795,     //  -0.66127,   0.75015
+    0xbfe5328292a35596,     0x3fe7f8ece3571771,     //  -0.66242,   0.74914
+    0xbfe53beae7012abe,     0x3fe7f0980e113978,     //  -0.66356,   0.74812
+    0xbfe5454ff5159dfb,     0x3fe7e83f87b03686,     //  -0.66471,    0.7471
+    0xbfe54eb1bb6dcb8f,     0x3fe7dfe3517d8937,     //  -0.66586,   0.74608
+    0xbfe5581038975137,     0x3fe7d7836cc33db2,     //    -0.667,   0.74506
+    0xbfe5616b6b204e6e,     0x3fe7cf1fdacbf179,     //  -0.66814,   0.74403
+    0xbfe56ac35197649e,     0x3fe7c6b89ce2d333,     //  -0.66928,   0.74301
+    0xbfe57417ea8bb75c,     0x3fe7be4db453a27c,     //  -0.67042,   0.74198
+    0xbfe57d69348cec9f,     0x3fe7b5df226aafb0,     //  -0.67156,   0.74095
+    0xbfe586b72e2b2cfd,     0x3fe7ad6ce874dbb6,     //  -0.67269,   0.73992
+    0xbfe59001d5f723df,     0x3fe7a4f707bf97d2,     //  -0.67383,   0.73889
+    0xbfe599492a81ffbc,     0x3fe79c7d8198e56e,     //  -0.67496,   0.73785
+    0xbfe5a28d2a5d7250,     0x3fe79400574f55e4,     //  -0.67609,   0.73682
+    0xbfe5abcdd41bb0d8,     0x3fe78b7f8a320a52,     //  -0.67722,   0.73578
+    0xbfe5b50b264f7448,     0x3fe782fb1b90b35b,     //  -0.67835,   0.73474
+    0xbfe5be451f8bf980,     0x3fe77a730cbb9100,     //  -0.67948,    0.7337
+    0xbfe5c77bbe65018c,     0x3fe771e75f037261,     //   -0.6806,   0.73265
+    0xbfe5d0af016ed1d4,     0x3fe7695813b9b594,     //  -0.68172,   0.73161
+    0xbfe5d9dee73e345c,     0x3fe760c52c304764,     //  -0.68285,   0.73056
+    0xbfe5e30b6e6877f3,     0x3fe7582ea9b9a329,     //  -0.68397,   0.72951
+    0xbfe5ec3495837074,     0x3fe74f948da8d28d,     //  -0.68508,   0.72846
+    0xbfe5f55a5b2576f8,     0x3fe746f6d9516d59,     //   -0.6862,   0.72741
+    0xbfe5fe7cbde56a0f,     0x3fe73e558e079942,     //  -0.68732,   0.72636
+    0xbfe6079bbc5aadfa,     0x3fe735b0ad2009b2,     //  -0.68843,    0.7253
+    0xbfe610b7551d2cde,     0x3fe72d0837efff97,     //  -0.68954,   0.72425
+    0xbfe619cf86c55702,     0x3fe7245c2fcd492a,     //  -0.69065,   0.72319
+    0xbfe622e44fec22ff,     0x3fe71bac960e41bf,     //  -0.69176,   0.72213
+    0xbfe62bf5af2b0dfd,     0x3fe712f96c09d18d,     //  -0.69287,   0.72107
+    0xbfe63503a31c1be8,     0x3fe70a42b3176d7a,     //  -0.69397,      0.72
+    0xbfe63e0e2a59d7aa,     0x3fe701886c8f16e6,     //  -0.69508,   0.71894
+    0xbfe64715437f535b,     0x3fe6f8ca99c95b75,     //  -0.69618,   0.71787
+    0xbfe65018ed28287f,     0x3fe6f0093c1f54de,     //  -0.69728,    0.7168
+    0xbfe6591925f0783e,     0x3fe6e74454eaa8ae,     //  -0.69838,   0.71573
+    0xbfe66215ec74eb91,     0x3fe6de7be585881d,     //  -0.69947,   0.71466
+    0xbfe66b0f3f52b386,     0x3fe6d5afef4aafcc,     //  -0.70057,   0.71358
+    0xbfe674051d27896c,     0x3fe6cce07395679f,     //  -0.70166,   0.71251
+    0xbfe67cf78491af10,     0x3fe6c40d73c18275,     //  -0.70275,   0.71143
+    0xbfe685e6742feeef,     0x3fe6bb36f12b5e06,     //  -0.70385,   0.71035
+    0xbfe68ed1eaa19c71,     0x3fe6b25ced2fe29c,     //  -0.70493,   0.70927
+    0xbfe697b9e686941c,     0x3fe6a97f692c82ea,     //  -0.70602,   0.70819
+    0xbfe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  -0.70711,   0.70711
+    0xbfe6a97f692c82ea,     0x3fe697b9e686941c,     //  -0.70819,   0.70602
+    0xbfe6b25ced2fe29c,     0x3fe68ed1eaa19c71,     //  -0.70927,   0.70493
+    0xbfe6bb36f12b5e06,     0x3fe685e6742feeef,     //  -0.71035,   0.70385
+    0xbfe6c40d73c18275,     0x3fe67cf78491af10,     //  -0.71143,   0.70275
+    0xbfe6cce07395679f,     0x3fe674051d27896c,     //  -0.71251,   0.70166
+    0xbfe6d5afef4aafcc,     0x3fe66b0f3f52b386,     //  -0.71358,   0.70057
+    0xbfe6de7be585881d,     0x3fe66215ec74eb91,     //  -0.71466,   0.69947
+    0xbfe6e74454eaa8ae,     0x3fe6591925f0783e,     //  -0.71573,   0.69838
+    0xbfe6f0093c1f54de,     0x3fe65018ed28287f,     //   -0.7168,   0.69728
+    0xbfe6f8ca99c95b75,     0x3fe64715437f535b,     //  -0.71787,   0.69618
+    0xbfe701886c8f16e6,     0x3fe63e0e2a59d7aa,     //  -0.71894,   0.69508
+    0xbfe70a42b3176d7a,     0x3fe63503a31c1be8,     //     -0.72,   0.69397
+    0xbfe712f96c09d18d,     0x3fe62bf5af2b0dfd,     //  -0.72107,   0.69287
+    0xbfe71bac960e41bf,     0x3fe622e44fec22ff,     //  -0.72213,   0.69176
+    0xbfe7245c2fcd492a,     0x3fe619cf86c55702,     //  -0.72319,   0.69065
+    0xbfe72d0837efff97,     0x3fe610b7551d2cde,     //  -0.72425,   0.68954
+    0xbfe735b0ad2009b2,     0x3fe6079bbc5aadfa,     //   -0.7253,   0.68843
+    0xbfe73e558e079942,     0x3fe5fe7cbde56a0f,     //  -0.72636,   0.68732
+    0xbfe746f6d9516d59,     0x3fe5f55a5b2576f8,     //  -0.72741,    0.6862
+    0xbfe74f948da8d28d,     0x3fe5ec3495837074,     //  -0.72846,   0.68508
+    0xbfe7582ea9b9a329,     0x3fe5e30b6e6877f3,     //  -0.72951,   0.68397
+    0xbfe760c52c304764,     0x3fe5d9dee73e345c,     //  -0.73056,   0.68285
+    0xbfe7695813b9b594,     0x3fe5d0af016ed1d4,     //  -0.73161,   0.68172
+    0xbfe771e75f037261,     0x3fe5c77bbe65018c,     //  -0.73265,    0.6806
+    0xbfe77a730cbb9100,     0x3fe5be451f8bf980,     //   -0.7337,   0.67948
+    0xbfe782fb1b90b35b,     0x3fe5b50b264f7448,     //  -0.73474,   0.67835
+    0xbfe78b7f8a320a52,     0x3fe5abcdd41bb0d8,     //  -0.73578,   0.67722
+    0xbfe79400574f55e4,     0x3fe5a28d2a5d7250,     //  -0.73682,   0.67609
+    0xbfe79c7d8198e56e,     0x3fe599492a81ffbc,     //  -0.73785,   0.67496
+    0xbfe7a4f707bf97d2,     0x3fe59001d5f723df,     //  -0.73889,   0.67383
+    0xbfe7ad6ce874dbb6,     0x3fe586b72e2b2cfd,     //  -0.73992,   0.67269
+    0xbfe7b5df226aafb0,     0x3fe57d69348cec9f,     //  -0.74095,   0.67156
+    0xbfe7be4db453a27c,     0x3fe57417ea8bb75c,     //  -0.74198,   0.67042
+    0xbfe7c6b89ce2d333,     0x3fe56ac35197649e,     //  -0.74301,   0.66928
+    0xbfe7cf1fdacbf179,     0x3fe5616b6b204e6e,     //  -0.74403,   0.66814
+    0xbfe7d7836cc33db2,     0x3fe5581038975137,     //  -0.74506,     0.667
+    0xbfe7dfe3517d8937,     0x3fe54eb1bb6dcb8f,     //  -0.74608,   0.66586
+    0xbfe7e83f87b03686,     0x3fe5454ff5159dfb,     //   -0.7471,   0.66471
+    0xbfe7f0980e113978,     0x3fe53beae7012abe,     //  -0.74812,   0.66356
+    0xbfe7f8ece3571771,     0x3fe5328292a35596,     //  -0.74914,   0.66242
+    0xbfe8013e0638e795,     0x3fe52916f96f8388,     //  -0.75015,   0.66127
+    0xbfe8098b756e52fa,     0x3fe51fa81cd99aa6,     //  -0.75117,   0.66011
+    0xbfe811d52faf94dc,     0x3fe51635fe5601d7,     //  -0.75218,   0.65896
+    0xbfe81a1b33b57acc,     0x3fe50cc09f59a09b,     //  -0.75319,   0.65781
+    0xbfe8225d803964e5,     0x3fe503480159ded2,     //  -0.75419,   0.65665
+    0xbfe82a9c13f545ff,     0x3fe4f9cc25cca486,     //   -0.7552,   0.65549
+    0xbfe832d6eda3a3e0,     0x3fe4f04d0e2859aa,     //  -0.75621,   0.65433
+    0xbfe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //  -0.75721,   0.65317
+    0xbfe843416dc4cce2,     0x3fe4dd453076b064,     //  -0.75821,   0.65201
+    0xbfe84b7111af83f9,     0x3fe4d3bc6d589f80,     //  -0.75921,   0.65085
+    0xbfe8539cf67c9029,     0x3fe4ca30740218a3,     //  -0.76021,   0.64968
+    0xbfe85bc51ae958cc,     0x3fe4c0a145ec0004,     //   -0.7612,   0.64851
+    0xbfe863e97db3d95a,     0x3fe4b70ee48fb869,     //   -0.7622,   0.64735
+    0xbfe86c0a1d9aa195,     0x3fe4ad79516722f0,     //  -0.76319,   0.64618
+    0xbfe87426f95cd5bd,     0x3fe4a3e08dec9ed6,     //  -0.76418,     0.645
+    0xbfe87c400fba2ebf,     0x3fe49a449b9b0938,     //  -0.76517,   0.64383
+    0xbfe884555f72fa6b,     0x3fe490a57bedbcdf,     //  -0.76615,   0.64266
+    0xbfe88c66e7481ba1,     0x3fe48703306091fe,     //  -0.76714,   0.64148
+    0xbfe89474a5fb0a84,     0x3fe47d5dba6fde01,     //  -0.76812,    0.6403
+    0xbfe89c7e9a4dd4ab,     0x3fe473b51b987347,     //   -0.7691,   0.63912
+    0xbfe8a484c3031d50,     0x3fe46a095557a0f1,     //  -0.77008,   0.63794
+    0xbfe8ac871ede1d88,     0x3fe4605a692b32a2,     //  -0.77106,   0.63676
+    0xbfe8b485aca2a468,     0x3fe456a858917046,     //  -0.77204,   0.63558
+    0xbfe8bc806b151741,     0x3fe44cf325091dd6,     //  -0.77301,   0.63439
+    0xbfe8c47758fa71cb,     0x3fe4433ad0117b1d,     //  -0.77398,   0.63321
+    0xbfe8cc6a75184655,     0x3fe4397f5b2a4380,     //  -0.77495,   0.63202
+    0xbfe8d459be34bdfa,     0x3fe42fc0c7d3adbb,     //  -0.77592,   0.63083
+    0xbfe8dc45331698cc,     0x3fe425ff178e6bb1,     //  -0.77689,   0.62964
+    0xbfe8e42cd2852e0a,     0x3fe41c3a4bdbaa26,     //  -0.77785,   0.62845
+    0xbfe8ec109b486c49,     0x3fe41272663d108c,     //  -0.77882,   0.62725
+    0xbfe8f3f08c28d9ac,     0x3fe408a76834c0c0,     //  -0.77978,   0.62606
+    0xbfe8fbcca3ef940d,     0x3fe3fed9534556d4,     //  -0.78074,   0.62486
+    0xbfe903a4e1665133,     0x3fe3f50828f1e8d2,     //  -0.78169,   0.62366
+    0xbfe90b7943575efe,     0x3fe3eb33eabe0680,     //  -0.78265,   0.62246
+    0xbfe91349c88da398,     0x3fe3e15c9a2db922,     //   -0.7836,   0.62126
+    0xbfe91b166fd49da2,     0x3fe3d78238c58343,     //  -0.78456,   0.62006
+    0xbfe922df37f8646a,     0x3fe3cda4c80a6076,     //  -0.78551,   0.61885
+    0xbfe92aa41fc5a815,     0x3fe3c3c44981c517,     //  -0.78646,   0.61765
+    0xbfe932652609b1cf,     0x3fe3b9e0beb19e18,     //   -0.7874,   0.61644
+    0xbfe93a22499263fc,     0x3fe3affa292050b9,     //  -0.78835,   0.61523
+    0xbfe941db892e3a65,     0x3fe3a6108a54ba58,     //  -0.78929,   0.61402
+    0xbfe94990e3ac4a6c,     0x3fe39c23e3d63029,     //  -0.79023,   0.61281
+    0xbfe9514257dc4335,     0x3fe39234372c7f04,     //  -0.79117,    0.6116
+    0xbfe958efe48e6dd7,     0x3fe3884185dfeb22,     //  -0.79211,   0.61038
+    0xbfe960998893ad8c,     0x3fe37e4bd1792fe2,     //  -0.79304,   0.60917
+    0xbfe9683f42bd7fe1,     0x3fe374531b817f8d,     //  -0.79398,   0.60795
+    0xbfe96fe111ddfce0,     0x3fe36a576582831b,     //  -0.79491,   0.60673
+    0xbfe9777ef4c7d742,     0x3fe36058b10659f3,     //  -0.79584,   0.60551
+    0xbfe97f18ea4e5c9e,     0x3fe35656ff9799ae,     //  -0.79676,   0.60429
+    0xbfe986aef1457594,     0x3fe34c5252c14de1,     //  -0.79769,   0.60307
+    0xbfe98e410881a600,     0x3fe3424aac0ef7d6,     //  -0.79861,   0.60184
+    0xbfe995cf2ed80d22,     0x3fe338400d0c8e57,     //  -0.79954,   0.60062
+    0xbfe99d59631e65d5,     0x3fe32e3277467d6b,     //  -0.80046,   0.59939
+    0xbfe9a4dfa42b06b2,     0x3fe32421ec49a620,     //  -0.80138,   0.59816
+    0xbfe9ac61f0d4e247,     0x3fe31a0e6da35e44,     //  -0.80229,   0.59693
+    0xbfe9b3e047f38741,     0x3fe30ff7fce17035,     //  -0.80321,    0.5957
+    0xbfe9bb5aa85f2098,     0x3fe305de9b921a94,     //  -0.80412,   0.59447
+    0xbfe9c2d110f075c3,     0x3fe2fbc24b441015,     //  -0.80503,   0.59323
+    0xbfe9ca438080eadb,     0x3fe2f1a30d86773a,     //  -0.80594,     0.592
+    0xbfe9d1b1f5ea80d6,     0x3fe2e780e3e8ea16,     //  -0.80685,   0.59076
+    0xbfe9d91c7007d5a6,     0x3fe2dd5bcffb7616,     //  -0.80775,   0.58952
+    0xbfe9e082edb42472,     0x3fe2d333d34e9bb7,     //  -0.80866,   0.58828
+    0xbfe9e7e56dcb45bd,     0x3fe2c908ef734e57,     //  -0.80956,   0.58704
+    0xbfe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //  -0.81046,    0.5858
+    0xbfe9f69e70ac75bc,     0x3fe2b4aa787764c4,     //  -0.81135,   0.58455
+    0xbfe9fdf4f13149de,     0x3fe2aa76e87aeb58,     //  -0.81225,   0.58331
+    0xbfea05476f967bb5,     0x3fe2a040779843fb,     //  -0.81314,   0.58206
+    0xbfea0c95eabaf937,     0x3fe2960727629ca8,     //  -0.81404,   0.58081
+    0xbfea13e0617e4ec7,     0x3fe28bcaf96d94ba,     //  -0.81493,   0.57956
+    0xbfea1b26d2c0a75e,     0x3fe2818bef4d3cba,     //  -0.81581,   0.57831
+    0xbfea22693d62ccb9,     0x3fe2774a0a961612,     //   -0.8167,   0.57706
+    0xbfea29a7a0462782,     0x3fe26d054cdd12df,     //  -0.81758,   0.57581
+    0xbfea30e1fa4cbf81,     0x3fe262bdb7b795a2,     //  -0.81847,   0.57455
+    0xbfea38184a593bc6,     0x3fe258734cbb7110,     //  -0.81935,    0.5733
+    0xbfea3f4a8f4ee2d2,     0x3fe24e260d7ee7c9,     //  -0.82023,   0.57204
+    0xbfea4678c8119ac8,     0x3fe243d5fb98ac1f,     //   -0.8211,   0.57078
+    0xbfea4da2f385e997,     0x3fe23983189fdfd5,     //  -0.82198,   0.56952
+    0xbfea54c91090f524,     0x3fe22f2d662c13e1,     //  -0.82285,   0.56826
+    0xbfea5beb1e188375,     0x3fe224d4e5d5482e,     //  -0.82372,     0.567
+    0xbfea63091b02fae2,     0x3fe21a799933eb58,     //  -0.82459,   0.56573
+    0xbfea6a230637623b,     0x3fe2101b81e0da78,     //  -0.82546,   0.56447
+    0xbfea7138de9d60f5,     0x3fe205baa17560d6,     //  -0.82632,    0.5632
+    0xbfea784aa31d3f55,     0x3fe1fb56f98b37b8,     //  -0.82718,   0.56193
+    0xbfea7f58529fe69d,     0x3fe1f0f08bbc861b,     //  -0.82805,   0.56066
+    0xbfea8661ec0ee133,     0x3fe1e68759a3e074,     //   -0.8289,   0.55939
+    0xbfea8d676e545ad2,     0x3fe1dc1b64dc4872,     //  -0.82976,   0.55812
+    0xbfea9468d85b20ae,     0x3fe1d1acaf012cc2,     //  -0.83062,   0.55685
+    0xbfea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  -0.83147,   0.55557
+    0xbfeaa25f5f5aee60,     0x3fe1bcc706804467,     //  -0.83232,   0.55429
+    0xbfeaa9547a2cb98e,     0x3fe1b250171373be,     //  -0.83317,   0.55302
+    0xbfeab045787157ff,     0x3fe1a7d66d0516e6,     //  -0.83402,   0.55174
+    0xbfeab7325916c0d4,     0x3fe19d5a09f2b9b8,     //  -0.83486,   0.55046
+    0xbfeabe1b1b0b8dac,     0x3fe192daef7a5386,     //  -0.83571,   0.54918
+    0xbfeac4ffbd3efac8,     0x3fe188591f3a46e5,     //  -0.83655,   0.54789
+    0xbfeacbe03ea0e73b,     0x3fe17dd49ad16161,     //  -0.83739,   0.54661
+    0xbfead2bc9e21d511,     0x3fe1734d63dedb49,     //  -0.83822,   0.54532
+    0xbfead994dab2e979,     0x3fe168c37c025764,     //  -0.83906,   0.54404
+    0xbfeae068f345ecef,     0x3fe15e36e4dbe2bc,     //  -0.83989,   0.54275
+    0xbfeae738e6cd4b67,     0x3fe153a7a00bf453,     //  -0.84073,   0.54146
+    0xbfeaee04b43c1474,     0x3fe14915af336ceb,     //  -0.84155,   0.54017
+    0xbfeaf4cc5a85fb73,     0x3fe13e8113f396c1,     //  -0.84238,   0.53888
+    0xbfeafb8fd89f57b6,     0x3fe133e9cfee254e,     //  -0.84321,   0.53759
+    0xbfeb024f2d7d24a9,     0x3fe1294fe4c5350a,     //  -0.84403,   0.53629
+    0xbfeb090a58150200,     0x3fe11eb3541b4b22,     //  -0.84485,     0.535
+    0xbfeb0fc1575d33db,     0x3fe114141f935545,     //  -0.84567,    0.5337
+    0xbfeb16742a4ca2f5,     0x3fe1097248d0a956,     //  -0.84649,    0.5324
+    0xbfeb1d22cfdadcc6,     0x3fe0fecdd1770537,     //  -0.84731,    0.5311
+    0xbfeb23cd470013b4,     0x3fe0f426bb2a8e7d,     //  -0.84812,    0.5298
+    0xbfeb2a738eb51f33,     0x3fe0e97d078fd23b,     //  -0.84893,    0.5285
+    0xbfeb3115a5f37bf4,     0x3fe0ded0b84bc4b5,     //  -0.84974,    0.5272
+    0xbfeb37b38bb54c09,     0x3fe0d421cf03c12b,     //  -0.85055,    0.5259
+    0xbfeb3e4d3ef55712,     0x3fe0c9704d5d898f,     //  -0.85136,   0.52459
+    0xbfeb44e2beaf0a61,     0x3fe0bebc34ff4646,     //  -0.85216,   0.52328
+    0xbfeb4b7409de7925,     0x3fe0b405878f85ec,     //  -0.85296,   0.52198
+    0xbfeb52011f805c92,     0x3fe0a94c46b53d0b,     //  -0.85376,   0.52067
+    0xbfeb5889fe921405,     0x3fe09e907417c5e1,     //  -0.85456,   0.51936
+    0xbfeb5f0ea611a532,     0x3fe093d2115ee018,     //  -0.85535,   0.51804
+    0xbfeb658f14fdbc47,     0x3fe089112032b08c,     //  -0.85615,   0.51673
+    0xbfeb6c0b4a55ac17,     0x3fe07e4da23bc102,     //  -0.85694,   0.51542
+    0xbfeb728345196e3e,     0x3fe073879922ffed,     //  -0.85773,    0.5141
+    0xbfeb78f70449a34b,     0x3fe068bf0691c028,     //  -0.85852,   0.51279
+    0xbfeb7f6686e792ea,     0x3fe05df3ec31b8b6,     //   -0.8593,   0.51147
+    0xbfeb85d1cbf52c02,     0x3fe053264bad0483,     //  -0.86009,   0.51015
+    0xbfeb8c38d27504e9,     0x3fe0485626ae221a,     //  -0.86087,   0.50883
+    0xbfeb929b996a5b7f,     0x3fe03d837edff370,     //  -0.86165,   0.50751
+    0xbfeb98fa1fd9155e,     0x3fe032ae55edbd95,     //  -0.86242,   0.50619
+    0xbfeb9f5464c5bffc,     0x3fe027d6ad83287e,     //   -0.8632,   0.50486
+    0xbfeba5aa673590d2,     0x3fe01cfc874c3eb7,     //  -0.86397,   0.50354
+    0xbfebabfc262e6586,     0x3fe0121fe4f56d2c,     //  -0.86474,   0.50221
+    0xbfebb249a0b6c40d,     0x3fe00740c82b82e0,     //  -0.86551,   0.50089
+    0xbfebb892d5d5dad5,     0x3fdff8be6537615e,     //  -0.86628,   0.49956
+    0xbfebbed7c49380ea,     0x3fdfe2f64be7120f,     //  -0.86705,   0.49823
+    0xbfebc5186bf8361d,     0x3fdfcd2947c1ff57,     //  -0.86781,    0.4969
+    0xbfebcb54cb0d2327,     0x3fdfb7575c24d2de,     //  -0.86857,   0.49557
+    0xbfebd18ce0dc19d6,     0x3fdfa1808c6cf7e0,     //  -0.86933,   0.49423
+    0xbfebd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //  -0.87009,    0.4929
+    0xbfebddf02cd2b983,     0x3fdf75c44e26a852,     //  -0.87084,   0.49156
+    0xbfebe41b611154c1,     0x3fdf5fdee656cda3,     //   -0.8716,   0.49023
+    0xbfebea424837de6d,     0x3fdf49f4a7e97729,     //  -0.87235,   0.48889
+    0xbfebf064e15377dd,     0x3fdf3405963fd068,     //  -0.87309,   0.48755
+    0xbfebf6832b71ec5b,     0x3fdf1e11b4bbc35c,     //  -0.87384,   0.48621
+    0xbfebfc9d25a1b147,     0x3fdf081906bff7fd,     //  -0.87459,   0.48487
+    0xbfec02b2cef1e641,     0x3fdef21b8fafd3b5,     //  -0.87533,   0.48353
+    0xbfec08c426725549,     0x3fdedc1952ef78d5,     //  -0.87607,   0.48218
+    0xbfec0ed12b3372e9,     0x3fdec61253e3c61b,     //  -0.87681,   0.48084
+    0xbfec14d9dc465e58,     0x3fdeb00695f25620,     //  -0.87755,   0.47949
+    0xbfec1ade38bce19b,     0x3fde99f61c817eda,     //  -0.87828,   0.47815
+    0xbfec20de3fa971b0,     0x3fde83e0eaf85113,     //  -0.87901,    0.4768
+    0xbfec26d9f01f2eaf,     0x3fde6dc704be97e2,     //  -0.87974,   0.47545
+    0xbfec2cd14931e3f1,     0x3fde57a86d3cd824,     //  -0.88047,    0.4741
+    0xbfec32c449f60831,     0x3fde418527dc4ffa,     //   -0.8812,   0.47275
+    0xbfec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  -0.88192,    0.4714
+    0xbfec3e9d3ee7d262,     0x3fde1530a12779f4,     //  -0.88264,   0.47004
+    0xbfec44833141c004,     0x3fddfeff66a941de,     //  -0.88336,   0.46869
+    0xbfec4a64c7a5ac4c,     0x3fdde8c98bf86bd6,     //  -0.88408,   0.46733
+    0xbfec5042012b6907,     0x3fddd28f1481cc58,     //   -0.8848,   0.46598
+    0xbfec561adceb743e,     0x3fddbc5003b2edf8,     //  -0.88551,   0.46462
+    0xbfec5bef59fef85a,     0x3fdda60c5cfa10d8,     //  -0.88622,   0.46326
+    0xbfec61bf777fcc48,     0x3fdd8fc423c62a25,     //  -0.88693,    0.4619
+    0xbfec678b3488739b,     0x3fdd79775b86e389,     //  -0.88764,   0.46054
+    0xbfec6d5290341eb2,     0x3fdd632607ac9aa9,     //  -0.88835,   0.45918
+    0xbfec7315899eaad7,     0x3fdd4cd02ba8609c,     //  -0.88905,   0.45781
+    0xbfec78d41fe4a267,     0x3fdd3675caebf962,     //  -0.88975,   0.45645
+    0xbfec7e8e52233cf3,     0x3fdd2016e8e9db5b,     //  -0.89045,   0.45508
+    0xbfec84441f785f61,     0x3fdd09b389152ec1,     //  -0.89115,   0.45372
+    0xbfec89f587029c13,     0x3fdcf34baee1cd21,     //  -0.89184,   0.45235
+    0xbfec8fa287e13305,     0x3fdcdcdf5dc440ce,     //  -0.89253,   0.45098
+    0xbfec954b213411f5,     0x3fdcc66e9931c45d,     //  -0.89322,   0.44961
+    0xbfec9aef521bd480,     0x3fdcaff964a0421d,     //  -0.89391,   0.44824
+    0xbfeca08f19b9c449,     0x3fdc997fc3865388,     //   -0.8946,   0.44687
+    0xbfeca62a772fd919,     0x3fdc8301b95b40c2,     //  -0.89528,    0.4455
+    0xbfecabc169a0b901,     0x3fdc6c7f4997000a,     //  -0.89597,   0.44412
+    0xbfecb153f02fb87d,     0x3fdc55f877b23537,     //  -0.89665,   0.44275
+    0xbfecb6e20a00da99,     0x3fdc3f6d47263129,     //  -0.89732,   0.44137
+    0xbfecbc6bb638d10b,     0x3fdc28ddbb6cf145,     //    -0.898,   0.43999
+    0xbfecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //  -0.89867,   0.43862
+    0xbfecc771c2736c09,     0x3fdbfbb1a05e0edc,     //  -0.89935,   0.43724
+    0xbfecccee20c2de9f,     0x3fdbe51517ffc0d9,     //  -0.90002,   0.43586
+    0xbfecd2660e12c1e6,     0x3fdbce744262deee,     //  -0.90068,   0.43448
+    0xbfecd7d9898b32f6,     0x3fdbb7cf2304bd01,     //  -0.90135,   0.43309
+    0xbfecdd489254fe65,     0x3fdba125bd63583e,     //  -0.90201,   0.43171
+    0xbfece2b32799a060,     0x3fdb8a7814fd5693,     //  -0.90267,   0.43033
+    0xbfece819488344ce,     0x3fdb73c62d520624,     //  -0.90333,   0.42894
+    0xbfeced7af43cc773,     0x3fdb5d1009e15cc0,     //  -0.90399,   0.42756
+    0xbfecf2d829f1b40e,     0x3fdb4655ae2bf757,     //  -0.90464,   0.42617
+    0xbfecf830e8ce467b,     0x3fdb2f971db31972,     //   -0.9053,   0.42478
+    0xbfecfd852fff6ad4,     0x3fdb18d45bf8aca6,     //  -0.90595,   0.42339
+    0xbfed02d4feb2bd92,     0x3fdb020d6c7f4009,     //   -0.9066,     0.422
+    0xbfed082054168bac,     0x3fdaeb4252ca07ab,     //  -0.90724,   0.42061
+    0xbfed0d672f59d2b9,     0x3fdad473125cdc08,     //  -0.90789,   0.41922
+    0xbfed12a98fac410c,     0x3fdabd9faebc3980,     //  -0.90853,   0.41782
+    0xbfed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //  -0.90917,   0.41643
+    0xbfed1d20dc40c15c,     0x3fda8fec8bf5b166,     //  -0.90981,   0.41503
+    0xbfed2255c6e5a4e1,     0x3fda790cd3dbf31a,     //  -0.91044,   0.41364
+    0xbfed2786335f52fc,     0x3fda622906a70b63,     //  -0.91107,   0.41224
+    0xbfed2cb220e0ef9f,     0x3fda4b4127dea1e4,     //  -0.91171,   0.41084
+    0xbfed31d98e9e503a,     0x3fda34553b0afee5,     //  -0.91234,   0.40944
+    0xbfed36fc7bcbfbdc,     0x3fda1d6543b50ac0,     //  -0.91296,   0.40804
+    0xbfed3c1ae79f2b4e,     0x3fda067145664d57,     //  -0.91359,   0.40664
+    0xbfed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //  -0.91421,   0.40524
+    0xbfed464a380e7242,     0x3fd9d87d4207b0ab,     //  -0.91483,   0.40384
+    0xbfed4b5b1b187524,     0x3fd9c17d440df9f2,     //  -0.91545,   0.40243
+    0xbfed506779a3d2d9,     0x3fd9aa794d47c9ee,     //  -0.91606,   0.40103
+    0xbfed556f52e93eb1,     0x3fd993716141bdfe,     //  -0.91668,   0.39962
+    0xbfed5a72a6221e73,     0x3fd97c6583890fc2,     //  -0.91729,   0.39822
+    0xbfed5f7172888a7f,     0x3fd96555b7ab948f,     //   -0.9179,   0.39681
+    0xbfed646bb7574de5,     0x3fd94e420137bce3,     //  -0.91851,    0.3954
+    0xbfed696173c9e68b,     0x3fd9372a63bc93d7,     //  -0.91911,   0.39399
+    0xbfed6e52a71c8547,     0x3fd9200ee2c9be97,     //  -0.91972,   0.39258
+    0xbfed733f508c0dff,     0x3fd908ef81ef7bd1,     //  -0.92032,   0.39117
+    0xbfed78276f5617c6,     0x3fd8f1cc44bea329,     //  -0.92092,   0.38976
+    0xbfed7d0b02b8ecf9,     0x3fd8daa52ec8a4af,     //  -0.92151,   0.38835
+    0xbfed81ea09f38b63,     0x3fd8c37a439f884f,     //  -0.92211,   0.38693
+    0xbfed86c48445a450,     0x3fd8ac4b86d5ed44,     //   -0.9227,   0.38552
+    0xbfed8b9a70ef9cb4,     0x3fd89518fbff098e,     //  -0.92329,    0.3841
+    0xbfed906bcf328d46,     0x3fd87de2a6aea963,     //  -0.92388,   0.38268
+    0xbfed95389e50429b,     0x3fd866a88a792ea0,     //  -0.92447,   0.38127
+    0xbfed9a00dd8b3d46,     0x3fd84f6aaaf3903f,     //  -0.92505,   0.37985
+    0xbfed9ec48c26b1f3,     0x3fd838290bb359c8,     //  -0.92563,   0.37843
+    0xbfeda383a9668988,     0x3fd820e3b04eaac4,     //  -0.92621,   0.37701
+    0xbfeda83e348f613b,     0x3fd8099a9c5c362d,     //  -0.92679,   0.37559
+    0xbfedacf42ce68ab9,     0x3fd7f24dd37341e3,     //  -0.92736,   0.37416
+    0xbfedb1a591b20c38,     0x3fd7dafd592ba621,     //  -0.92794,   0.37274
+    0xbfedb6526238a09b,     0x3fd7c3a9311dcce7,     //  -0.92851,   0.37132
+    0xbfedbafa9dc1b78d,     0x3fd7ac515ee2b172,     //  -0.92907,   0.36989
+    0xbfedbf9e4395759a,     0x3fd794f5e613dfae,     //  -0.92964,   0.36847
+    0xbfedc43d52fcb453,     0x3fd77d96ca4b73a6,     //  -0.93021,   0.36704
+    0xbfedc8d7cb410260,     0x3fd766340f2418f6,     //  -0.93077,   0.36561
+    0xbfedcd6dabaca3a5,     0x3fd74ecdb8390a3e,     //  -0.93133,   0.36418
+    0xbfedd1fef38a915a,     0x3fd73763c9261092,     //  -0.93188,   0.36276
+    0xbfedd68ba2267a25,     0x3fd71ff6458782ec,     //  -0.93244,   0.36133
+    0xbfeddb13b6ccc23d,     0x3fd7088530fa459e,     //  -0.93299,    0.3599
+    0xbfeddf9730ca837b,     0x3fd6f1108f1bc9c5,     //  -0.93354,   0.35846
+    0xbfede4160f6d8d81,     0x3fd6d998638a0cb5,     //  -0.93409,   0.35703
+    0xbfede890520465ce,     0x3fd6c21cb1e39771,     //  -0.93464,    0.3556
+    0xbfeded05f7de47da,     0x3fd6aa9d7dc77e16,     //  -0.93518,   0.35416
+    0xbfedf177004b2534,     0x3fd6931acad55f51,     //  -0.93573,   0.35273
+    0xbfedf5e36a9ba59c,     0x3fd67b949cad63ca,     //  -0.93627,   0.35129
+    0xbfedfa4b3621271d,     0x3fd6640af6f03d9e,     //   -0.9368,   0.34986
+    0xbfedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //  -0.93734,   0.34842
+    0xbfee030cee1435b8,     0x3fd634ed533be58e,     //  -0.93787,   0.34698
+    0xbfee0766d9280f54,     0x3fd61d595c88c203,     //   -0.9384,   0.34554
+    0xbfee0bbc22bd8349,     0x3fd605c1fcc88f63,     //  -0.93893,    0.3441
+    0xbfee100cca2980ac,     0x3fd5ee27379ea693,     //  -0.93946,   0.34266
+    0xbfee1458cec1ad83,     0x3fd5d68910aee686,     //  -0.93998,   0.34122
+    0xbfee18a02fdc66d9,     0x3fd5bee78b9db3b6,     //  -0.94051,   0.33978
+    0xbfee1ce2ecd0c0d8,     0x3fd5a742ac0ff78d,     //  -0.94103,   0.33833
+    0xbfee212104f686e5,     0x3fd58f9a75ab1fdd,     //  -0.94154,   0.33689
+    0xbfee255a77a63bb8,     0x3fd577eeec151e47,     //  -0.94206,   0.33545
+    0xbfee298f4439197a,     0x3fd5604012f467b4,     //  -0.94257,     0.334
+    0xbfee2dbf6a0911d9,     0x3fd5488dedeff3be,     //  -0.94308,   0.33255
+    0xbfee31eae870ce25,     0x3fd530d880af3c24,     //  -0.94359,   0.33111
+    0xbfee3611becbaf69,     0x3fd5191fceda3c35,     //   -0.9441,   0.32966
+    0xbfee3a33ec75ce85,     0x3fd50163dc197047,     //   -0.9446,   0.32821
+    0xbfee3e5170cbfc46,     0x3fd4e9a4ac15d520,     //  -0.94511,   0.32676
+    0xbfee426a4b2bc17e,     0x3fd4d1e24278e76a,     //  -0.94561,   0.32531
+    0xbfee467e7af35f23,     0x3fd4ba1ca2eca31c,     //  -0.94611,   0.32386
+    0xbfee4a8dff81ce5e,     0x3fd4a253d11b82f3,     //   -0.9466,   0.32241
+    0xbfee4e98d836c0af,     0x3fd48a87d0b07fd7,     //  -0.94709,   0.32096
+    0xbfee529f04729ffc,     0x3fd472b8a5571054,     //  -0.94759,    0.3195
+    0xbfee56a083968eb1,     0x3fd45ae652bb2800,     //  -0.94807,   0.31805
+    0xbfee5a9d550467d3,     0x3fd44310dc8936f0,     //  -0.94856,   0.31659
+    0xbfee5e95781ebf1c,     0x3fd42b38466e2928,     //  -0.94905,   0.31514
+    0xbfee6288ec48e112,     0x3fd4135c94176602,     //  -0.94953,   0.31368
+    0xbfee6677b0e6d31e,     0x3fd3fb7dc932cfa4,     //  -0.95001,   0.31222
+    0xbfee6a61c55d53a7,     0x3fd3e39be96ec271,     //  -0.95049,   0.31077
+    0xbfee6e472911da27,     0x3fd3cbb6f87a146e,     //  -0.95096,   0.30931
+    0xbfee7227db6a9744,     0x3fd3b3cefa0414b7,     //  -0.95144,   0.30785
+    0xbfee7603dbce74e9,     0x3fd39be3f1bc8aef,     //  -0.95191,   0.30639
+    0xbfee79db29a5165a,     0x3fd383f5e353b6aa,     //  -0.95238,   0.30493
+    0xbfee7dadc456d850,     0x3fd36c04d27a4edf,     //  -0.95284,   0.30347
+    0xbfee817bab4cd10d,     0x3fd35410c2e18152,     //  -0.95331,   0.30201
+    0xbfee8544ddf0d075,     0x3fd33c19b83af207,     //  -0.95377,   0.30054
+    0xbfee89095bad6025,     0x3fd3241fb638baaf,     //  -0.95423,   0.29908
+    0xbfee8cc923edc388,     0x3fd30c22c08d6a13,     //  -0.95469,   0.29762
+    0xbfee9084361df7f3,     0x3fd2f422daec0386,     //  -0.95514,   0.29615
+    0xbfee943a91aab4b4,     0x3fd2dc200907fe51,     //  -0.95559,   0.29469
+    0xbfee97ec36016b30,     0x3fd2c41a4e954520,     //  -0.95605,   0.29322
+    0xbfee9b99229046f8,     0x3fd2ac11af483572,     //  -0.95649,   0.29175
+    0xbfee9f4156c62dda,     0x3fd294062ed59f05,     //  -0.95694,   0.29028
+    0xbfeea2e4d212c000,     0x3fd27bf7d0f2c346,     //  -0.95738,   0.28882
+    0xbfeea68393e65800,     0x3fd263e6995554ba,     //  -0.95783,   0.28735
+    0xbfeeaa1d9bb20af3,     0x3fd24bd28bb37672,     //  -0.95827,   0.28588
+    0xbfeeadb2e8e7a88e,     0x3fd233bbabc3bb72,     //   -0.9587,   0.28441
+    0xbfeeb1437af9bb34,     0x3fd21ba1fd3d2623,     //  -0.95914,   0.28294
+    0xbfeeb4cf515b8811,     0x3fd2038583d727bd,     //  -0.95957,   0.28146
+    0xbfeeb8566b810f2a,     0x3fd1eb6643499fbb,     //     -0.96,   0.27999
+    0xbfeebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //  -0.96043,   0.27852
+    0xbfeebf5668eaf2ef,     0x3fd1bb1f7b999480,     //  -0.96086,   0.27705
+    0xbfeec2cf4b1af6b2,     0x3fd1a2f7fbe8f243,     //  -0.96128,   0.27557
+    0xbfeec6436ee60309,     0x3fd18acdc3f4873a,     //   -0.9617,    0.2741
+    0xbfeec9b2d3c3bf84,     0x3fd172a0d7765177,     //  -0.96212,   0.27262
+    0xbfeecd1d792c8f10,     0x3fd15a713a28b9d9,     //  -0.96254,   0.27115
+    0xbfeed0835e999009,     0x3fd1423eefc69378,     //  -0.96295,   0.26967
+    0xbfeed3e483849c51,     0x3fd12a09fc0b1b12,     //  -0.96337,   0.26819
+    0xbfeed740e7684963,     0x3fd111d262b1f677,     //  -0.96378,   0.26671
+    0xbfeeda9889bfe86a,     0x3fd0f998277733f7,     //  -0.96418,   0.26523
+    0xbfeeddeb6a078651,     0x3fd0e15b4e1749cd,     //  -0.96459,   0.26375
+    0xbfeee13987bbebdc,     0x3fd0c91bda4f158d,     //  -0.96499,   0.26227
+    0xbfeee482e25a9dbc,     0x3fd0b0d9cfdbdb90,     //  -0.96539,   0.26079
+    0xbfeee7c77961dc9e,     0x3fd09895327b465e,     //  -0.96579,   0.25931
+    0xbfeeeb074c50a544,     0x3fd0804e05eb661e,     //  -0.96619,   0.25783
+    0xbfeeee425aa6b09a,     0x3fd068044deab002,     //  -0.96658,   0.25635
+    0xbfeef178a3e473c2,     0x3fd04fb80e37fdae,     //  -0.96698,   0.25487
+    0xbfeef4aa278b2032,     0x3fd037694a928cac,     //  -0.96737,   0.25338
+    0xbfeef7d6e51ca3c0,     0x3fd01f1806b9fdd2,     //  -0.96775,    0.2519
+    0xbfeefafedc1ba8b7,     0x3fd006c4466e54af,     //  -0.96814,   0.25041
+    0xbfeefe220c0b95ec,     0x3fcfdcdc1adfedf8,     //  -0.96852,   0.24893
+    0xbfef014074708ed3,     0x3fcfac2abeff57ff,     //   -0.9689,   0.24744
+    0xbfef045a14cf738c,     0x3fcf7b7480bd3801,     //  -0.96928,   0.24596
+    0xbfef076eecade0fa,     0x3fcf4ab9679c9f5c,     //  -0.96966,   0.24447
+    0xbfef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  -0.97003,   0.24298
+    0xbfef0d8a410379c5,     0x3fcee934c2d006c7,     //   -0.9704,   0.24149
+    0xbfef1090bc898f5f,     0x3fceb86b462de348,     //  -0.97077,      0.24
+    0xbfef13926dad024e,     0x3fce879d0cc0fdaf,     //  -0.97114,   0.23851
+    0xbfef168f53f7205d,     0x3fce56ca1e101a1b,     //   -0.9715,   0.23702
+    0xbfef19876ef1f486,     0x3fce25f281a2b684,     //  -0.97187,   0.23553
+    0xbfef1c7abe284708,     0x3fcdf5163f01099a,     //  -0.97223,   0.23404
+    0xbfef1f6941259d7a,     0x3fcdc4355db40195,     //  -0.97258,   0.23255
+    0xbfef2252f7763ada,     0x3fcd934fe5454311,     //  -0.97294,   0.23106
+    0xbfef2537e0a71f9f,     0x3fcd6265dd3f27e3,     //  -0.97329,   0.22957
+    0xbfef2817fc4609ce,     0x3fcd31774d2cbdee,     //  -0.97364,   0.22807
+    0xbfef2af349e17507,     0x3fcd00843c99c5f9,     //  -0.97399,   0.22658
+    0xbfef2dc9c9089a9d,     0x3fcccf8cb312b286,     //  -0.97434,   0.22508
+    0xbfef309b794b719f,     0x3fcc9e90b824a6a9,     //  -0.97468,   0.22359
+    0xbfef33685a3aaef0,     0x3fcc6d90535d74dc,     //  -0.97503,   0.22209
+    0xbfef36306b67c556,     0x3fcc3c8b8c4b9dd7,     //  -0.97536,    0.2206
+    0xbfef38f3ac64e589,     0x3fcc0b826a7e4f63,     //   -0.9757,    0.2191
+    0xbfef3bb21cc4fe47,     0x3fcbda74f5856330,     //  -0.97604,    0.2176
+    0xbfef3e6bbc1bbc65,     0x3fcba96334f15dad,     //  -0.97637,   0.21611
+    0xbfef412089fd8adc,     0x3fcb784d30536cda,     //   -0.9767,   0.21461
+    0xbfef43d085ff92dd,     0x3fcb4732ef3d6722,     //  -0.97703,   0.21311
+    0xbfef467bafb7bbe0,     0x3fcb16147941ca2a,     //  -0.97735,   0.21161
+    0xbfef492206bcabb4,     0x3fcae4f1d5f3b9ab,     //  -0.97768,   0.21011
+    0xbfef4bc38aa5c694,     0x3fcab3cb0ce6fe44,     //    -0.978,   0.20861
+    0xbfef4e603b0b2f2d,     0x3fca82a025b00451,     //  -0.97832,   0.20711
+    0xbfef50f81785c6b9,     0x3fca517127e3dabc,     //  -0.97863,   0.20561
+    0xbfef538b1faf2d07,     0x3fca203e1b1831da,     //  -0.97895,   0.20411
+    0xbfef56195321c090,     0x3fc9ef0706e35a35,     //  -0.97926,   0.20261
+    0xbfef58a2b1789e84,     0x3fc9bdcbf2dc4366,     //  -0.97957,    0.2011
+    0xbfef5b273a4fa2d9,     0x3fc98c8ce69a7aec,     //  -0.97988,    0.1996
+    0xbfef5da6ed43685d,     0x3fc95b49e9b62af9,     //  -0.98018,    0.1981
+    0xbfef6021c9f148c2,     0x3fc92a0303c8194f,     //  -0.98048,   0.19659
+    0xbfef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  -0.98079,   0.19509
+    0xbfef6508fef47bd5,     0x3fc8c7699b34ca7e,     //  -0.98108,   0.19359
+    0xbfef677556883cee,     0x3fc8961727c41804,     //  -0.98138,   0.19208
+    0xbfef69dcd652f5de,     0x3fc864c0e9b2b6cf,     //  -0.98167,   0.19057
+    0xbfef6c3f7df5bbb7,     0x3fc83366e89c64c5,     //  -0.98196,   0.18907
+    0xbfef6e9d4d1262ca,     0x3fc802092c1d744b,     //  -0.98225,   0.18756
+    0xbfef70f6434b7eb7,     0x3fc7d0a7bbd2cb1b,     //  -0.98254,   0.18606
+    0xbfef734a60446279,     0x3fc79f429f59e11d,     //  -0.98282,   0.18455
+    0xbfef7599a3a12077,     0x3fc76dd9de50bf31,     //  -0.98311,   0.18304
+    0xbfef77e40d068a90,     0x3fc73c6d8055fe0a,     //  -0.98339,   0.18153
+    0xbfef7a299c1a322a,     0x3fc70afd8d08c4ff,     //  -0.98366,   0.18002
+    0xbfef7c6a50826840,     0x3fc6d98a0c08c8da,     //  -0.98394,   0.17851
+    0xbfef7ea629e63d6e,     0x3fc6a81304f64ab2,     //  -0.98421,     0.177
+    0xbfef80dd27ed8204,     0x3fc676987f7216b8,     //  -0.98448,   0.17549
+    0xbfef830f4a40c60c,     0x3fc6451a831d830d,     //  -0.98475,   0.17398
+    0xbfef853c9089595e,     0x3fc61399179a6e94,     //  -0.98501,   0.17247
+    0xbfef8764fa714ba9,     0x3fc5e214448b3fc6,     //  -0.98528,   0.17096
+    0xbfef898887a36c84,     0x3fc5b08c1192e381,     //  -0.98554,   0.16945
+    0xbfef8ba737cb4b78,     0x3fc57f008654cbde,     //   -0.9858,   0.16794
+    0xbfef8dc10a95380d,     0x3fc54d71aa74ef02,     //  -0.98605,   0.16643
+    0xbfef8fd5ffae41db,     0x3fc51bdf8597c5f2,     //  -0.98631,   0.16491
+    0xbfef91e616c43891,     0x3fc4ea4a1f624b61,     //  -0.98656,    0.1634
+    0xbfef93f14f85ac08,     0x3fc4b8b17f79fa88,     //  -0.98681,   0.16189
+    0xbfef95f7a9a1ec47,     0x3fc48715ad84cdf5,     //  -0.98706,   0.16037
+    0xbfef97f924c9099b,     0x3fc45576b1293e5a,     //   -0.9873,   0.15886
+    0xbfef99f5c0abd496,     0x3fc423d4920e4166,     //  -0.98754,   0.15734
+    0xbfef9bed7cfbde29,     0x3fc3f22f57db4893,     //  -0.98778,   0.15583
+    0xbfef9de0596b77a3,     0x3fc3c0870a383ff6,     //  -0.98802,   0.15431
+    0xbfef9fce55adb2c8,     0x3fc38edbb0cd8d14,     //  -0.98826,    0.1528
+    0xbfefa1b7717661d5,     0x3fc35d2d53440db2,     //  -0.98849,   0.15128
+    0xbfefa39bac7a1791,     0x3fc32b7bf94516a7,     //  -0.98872,   0.14976
+    0xbfefa57b066e2754,     0x3fc2f9c7aa7a72af,     //  -0.98895,   0.14825
+    0xbfefa7557f08a517,     0x3fc2c8106e8e613a,     //  -0.98918,   0.14673
+    0xbfefa92b1600657c,     0x3fc296564d2b953e,     //   -0.9894,   0.14521
+    0xbfefaafbcb0cfddc,     0x3fc264994dfd340a,     //  -0.98962,    0.1437
+    0xbfefacc79de6c44f,     0x3fc232d978aed413,     //  -0.98984,   0.14218
+    0xbfefae8e8e46cfbb,     0x3fc20116d4ec7bce,     //  -0.99006,   0.14066
+    0xbfefb0509be6f7db,     0x3fc1cf516a62a077,     //  -0.99027,   0.13914
+    0xbfefb20dc681d54d,     0x3fc19d8940be24e7,     //  -0.99049,   0.13762
+    0xbfefb3c60dd2c199,     0x3fc16bbe5fac5865,     //   -0.9907,    0.1361
+    0xbfefb5797195d741,     0x3fc139f0cedaf576,     //   -0.9909,   0.13458
+    0xbfefb727f187f1c7,     0x3fc1082095f820b0,     //  -0.99111,   0.13306
+    0xbfefb8d18d66adb7,     0x3fc0d64dbcb26786,     //  -0.99131,   0.13154
+    0xbfefba7644f068b5,     0x3fc0a4784ab8bf1d,     //  -0.99151,   0.13002
+    0xbfefbc1617e44186,     0x3fc072a047ba831d,     //  -0.99171,    0.1285
+    0xbfefbdb106021816,     0x3fc040c5bb67747e,     //  -0.99191,   0.12698
+    0xbfefbf470f0a8d88,     0x3fc00ee8ad6fb85b,     //   -0.9921,   0.12545
+    0xbfefc0d832bf043a,     0x3fbfba124b07ad85,     //  -0.99229,   0.12393
+    0xbfefc26470e19fd3,     0x3fbf564e56a9730e,     //  -0.99248,   0.12241
+    0xbfefc3ebc935454c,     0x3fbef2858d27561b,     //  -0.99267,   0.12089
+    0xbfefc56e3b7d9af6,     0x3fbe8eb7fde4aa3e,     //  -0.99285,   0.11937
+    0xbfefc6ebc77f0887,     0x3fbe2ae5b8457f77,     //  -0.99303,   0.11784
+    0xbfefc8646cfeb721,     0x3fbdc70ecbae9fc8,     //  -0.99321,   0.11632
+    0xbfefc9d82bc2915e,     0x3fbd633347858ce4,     //  -0.99339,   0.11479
+    0xbfefcb4703914354,     0x3fbcff533b307dc1,     //  -0.99356,   0.11327
+    0xbfefccb0f4323aa3,     0x3fbc9b6eb6165c42,     //  -0.99374,   0.11175
+    0xbfefce15fd6da67b,     0x3fbc3785c79ec2d5,     //  -0.99391,   0.11022
+    0xbfefcf761f0c77a3,     0x3fbbd3987f31fa0e,     //  -0.99407,    0.1087
+    0xbfefd0d158d86087,     0x3fbb6fa6ec38f64c,     //  -0.99424,   0.10717
+    0xbfefd227aa9bd53b,     0x3fbb0bb11e1d5559,     //   -0.9944,   0.10565
+    0xbfefd37914220b84,     0x3fbaa7b724495c04,     //  -0.99456,   0.10412
+    0xbfefd4c59536fae4,     0x3fba43b90e27f3c4,     //  -0.99472,    0.1026
+    0xbfefd60d2da75c9e,     0x3fb9dfb6eb24a85c,     //  -0.99488,   0.10107
+    0xbfefd74fdd40abbf,     0x3fb97bb0caaba56f,     //  -0.99503,  0.099544
+    0xbfefd88da3d12526,     0x3fb917a6bc29b42c,     //  -0.99518,  0.098017
+    0xbfefd9c68127c78c,     0x3fb8b398cf0c38e0,     //  -0.99533,   0.09649
+    0xbfefdafa7514538c,     0x3fb84f8712c130a0,     //  -0.99548,  0.094963
+    0xbfefdc297f674ba9,     0x3fb7eb7196b72ee4,     //  -0.99563,  0.093436
+    0xbfefdd539ff1f456,     0x3fb787586a5d5b21,     //  -0.99577,  0.091909
+    0xbfefde78d68653fd,     0x3fb7233b9d236e71,     //  -0.99591,  0.090381
+    0xbfefdf9922f73307,     0x3fb6bf1b3e79b129,     //  -0.99604,  0.088854
+    0xbfefe0b485181be3,     0x3fb65af75dd0f87b,     //  -0.99618,  0.087326
+    0xbfefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //  -0.99631,  0.085797
+    0xbfefe2dc89bbff08,     0x3fb592a554489bc8,     //  -0.99644,  0.084269
+    0xbfefe3e92be9d886,     0x3fb52e774a4d4d0a,     //  -0.99657,   0.08274
+    0xbfefe4f0e31d7a4a,     0x3fb4ca45fc1ba8b6,     //   -0.9967,  0.081211
+    0xbfefe5f3af2e3940,     0x3fb4661179272096,     //  -0.99682,  0.079682
+    0xbfefe6f18ff42c84,     0x3fb401d9d0e3a507,     //  -0.99694,  0.078153
+    0xbfefe7ea85482d60,     0x3fb39d9f12c5a299,     //  -0.99706,  0.076624
+    0xbfefe8de8f03d75c,     0x3fb339614e41ffa5,     //  -0.99718,  0.075094
+    0xbfefe9cdad01883a,     0x3fb2d52092ce19f6,     //  -0.99729,  0.073565
+    0xbfefeab7df1c6005,     0x3fb270dcefdfc45b,     //   -0.9974,  0.072035
+    0xbfefeb9d2530410f,     0x3fb20c9674ed444c,     //  -0.99751,  0.070505
+    0xbfefec7d7f19cffc,     0x3fb1a84d316d4f8a,     //  -0.99762,  0.068974
+    0xbfefed58ecb673c4,     0x3fb1440134d709b2,     //  -0.99772,  0.067444
+    0xbfefee2f6de455ba,     0x3fb0dfb28ea201e6,     //  -0.99783,  0.065913
+    0xbfefef0102826191,     0x3fb07b614e463064,     //  -0.99793,  0.064383
+    0xbfefefcdaa704562,     0x3fb0170d833bf421,     //  -0.99802,  0.062852
+    0xbfeff095658e71ad,     0x3faf656e79f820e0,     //  -0.99812,  0.061321
+    0xbfeff15833be1965,     0x3fae9cbd15ff5527,     //  -0.99821,   0.05979
+    0xbfeff21614e131ed,     0x3fadd406f9808ec8,     //   -0.9983,  0.058258
+    0xbfeff2cf08da7321,     0x3fad0b4c436f91d0,     //  -0.99839,  0.056727
+    0xbfeff3830f8d575c,     0x3fac428d12c0d7e3,     //  -0.99848,  0.055195
+    0xbfeff43228de1b77,     0x3fab79c986698b78,     //  -0.99856,  0.053664
+    0xbfeff4dc54b1bed3,     0x3faab101bd5f8317,     //  -0.99864,  0.052132
+    0xbfeff58192ee0358,     0x3fa9e835d6993c87,     //  -0.99872,    0.0506
+    0xbfeff621e3796d7e,     0x3fa91f65f10dd814,     //   -0.9988,  0.049068
+    0xbfeff6bd463b444d,     0x3fa856922bb513c1,     //  -0.99887,  0.047535
+    0xbfeff753bb1b9164,     0x3fa78dbaa5874685,     //  -0.99894,  0.046003
+    0xbfeff7e5420320f9,     0x3fa6c4df7d7d5b84,     //  -0.99901,  0.044471
+    0xbfeff871dadb81df,     0x3fa5fc00d290cd43,     //  -0.99908,  0.042938
+    0xbfeff8f9858f058b,     0x3fa5331ec3bba0eb,     //  -0.99914,  0.041406
+    0xbfeff97c4208c014,     0x3fa46a396ff86179,     //   -0.9992,  0.039873
+    0xbfeff9fa10348837,     0x3fa3a150f6421afc,     //  -0.99926,   0.03834
+    0xbfeffa72effef75d,     0x3fa2d865759455cd,     //  -0.99932,  0.036807
+    0xbfeffae6e1556998,     0x3fa20f770ceb11c6,     //  -0.99938,  0.035274
+    0xbfeffb55e425fdae,     0x3fa14685db42c17e,     //  -0.99943,  0.033741
+    0xbfeffbbff85f9515,     0x3fa07d91ff984580,     //  -0.99948,  0.032208
+    0xbfeffc251df1d3f8,     0x3f9f693731d1cf01,     //  -0.99953,  0.030675
+    0xbfeffc8554cd213a,     0x3f9dd7458c64ab39,     //  -0.99958,  0.029142
+    0xbfeffce09ce2a679,     0x3f9c454f4ce53b1c,     //  -0.99962,  0.027608
+    0xbfeffd36f624500c,     0x3f9ab354b1504fca,     //  -0.99966,  0.026075
+    0xbfeffd886084cd0d,     0x3f992155f7a3667e,     //   -0.9997,  0.024541
+    0xbfeffdd4dbf78f52,     0x3f978f535ddc9f03,     //  -0.99974,  0.023008
+    0xbfeffe1c6870cb77,     0x3f95fd4d21fab226,     //  -0.99977,  0.021474
+    0xbfeffe5f05e578db,     0x3f946b4381fce81c,     //   -0.9998,   0.01994
+    0xbfeffe9cb44b51a1,     0x3f92d936bbe30efd,     //  -0.99983,  0.018407
+    0xbfeffed57398d2b7,     0x3f9147270dad7132,     //  -0.99986,  0.016873
+    0xbfefff0943c53bd1,     0x3f8f6a296ab997ca,     //  -0.99988,  0.015339
+    0xbfefff3824c88f6f,     0x3f8c45ffe1e48ad9,     //   -0.9999,  0.013805
+    0xbfefff62169b92db,     0x3f8921d1fcdec784,     //  -0.99992,  0.012272
+    0xbfefff871937ce2f,     0x3f85fda037ac05e0,     //  -0.99994,  0.010738
+    0xbfefffa72c978c4f,     0x3f82d96b0e509703,     //  -0.99996, 0.0092038
+    0xbfefffc250b5daef,     0x3f7f6a65f9a2a3c5,     //  -0.99997, 0.0076698
+    0xbfefffd8858e8a92,     0x3f7921f0fe670071,     //  -0.99998, 0.0061359
+    0xbfefffe9cb1e2e8d,     0x3f72d97822f996bc,     //  -0.99999, 0.0046019
+    0xbfeffff621621d02,     0x3f6921f8becca4ba,     //        -1,  0.003068
+    0xbfeffffd88586ee6,     0x3f5921faaee6472d,     //        -1,  0.001534
+    0xbff0000000000000,     0x0000000000000000,     //        -1,         0
+    0xbfeffffd88586ee6,     0xbf5921faaee6472d,     //        -1, -0.001534
+    0xbfeffff621621d02,     0xbf6921f8becca4ba,     //        -1, -0.003068
+    0xbfefffe9cb1e2e8d,     0xbf72d97822f996bc,     //  -0.99999,-0.0046019
+    0xbfefffd8858e8a92,     0xbf7921f0fe670071,     //  -0.99998,-0.0061359
+    0xbfefffc250b5daef,     0xbf7f6a65f9a2a3c5,     //  -0.99997,-0.0076698
+    0xbfefffa72c978c4f,     0xbf82d96b0e509703,     //  -0.99996,-0.0092038
+    0xbfefff871937ce2f,     0xbf85fda037ac05e0,     //  -0.99994, -0.010738
+    0xbfefff62169b92db,     0xbf8921d1fcdec784,     //  -0.99992, -0.012272
+    0xbfefff3824c88f6f,     0xbf8c45ffe1e48ad9,     //   -0.9999, -0.013805
+    0xbfefff0943c53bd1,     0xbf8f6a296ab997ca,     //  -0.99988, -0.015339
+    0xbfeffed57398d2b7,     0xbf9147270dad7132,     //  -0.99986, -0.016873
+    0xbfeffe9cb44b51a1,     0xbf92d936bbe30efd,     //  -0.99983, -0.018407
+    0xbfeffe5f05e578db,     0xbf946b4381fce81c,     //   -0.9998,  -0.01994
+    0xbfeffe1c6870cb77,     0xbf95fd4d21fab226,     //  -0.99977, -0.021474
+    0xbfeffdd4dbf78f52,     0xbf978f535ddc9f03,     //  -0.99974, -0.023008
+    0xbfeffd886084cd0d,     0xbf992155f7a3667e,     //   -0.9997, -0.024541
+    0xbfeffd36f624500c,     0xbf9ab354b1504fca,     //  -0.99966, -0.026075
+    0xbfeffce09ce2a679,     0xbf9c454f4ce53b1c,     //  -0.99962, -0.027608
+    0xbfeffc8554cd213a,     0xbf9dd7458c64ab39,     //  -0.99958, -0.029142
+    0xbfeffc251df1d3f8,     0xbf9f693731d1cf01,     //  -0.99953, -0.030675
+    0xbfeffbbff85f9515,     0xbfa07d91ff984580,     //  -0.99948, -0.032208
+    0xbfeffb55e425fdae,     0xbfa14685db42c17e,     //  -0.99943, -0.033741
+    0xbfeffae6e1556998,     0xbfa20f770ceb11c6,     //  -0.99938, -0.035274
+    0xbfeffa72effef75d,     0xbfa2d865759455cd,     //  -0.99932, -0.036807
+    0xbfeff9fa10348837,     0xbfa3a150f6421afc,     //  -0.99926,  -0.03834
+    0xbfeff97c4208c014,     0xbfa46a396ff86179,     //   -0.9992, -0.039873
+    0xbfeff8f9858f058b,     0xbfa5331ec3bba0eb,     //  -0.99914, -0.041406
+    0xbfeff871dadb81df,     0xbfa5fc00d290cd43,     //  -0.99908, -0.042938
+    0xbfeff7e5420320f9,     0xbfa6c4df7d7d5b84,     //  -0.99901, -0.044471
+    0xbfeff753bb1b9164,     0xbfa78dbaa5874685,     //  -0.99894, -0.046003
+    0xbfeff6bd463b444d,     0xbfa856922bb513c1,     //  -0.99887, -0.047535
+    0xbfeff621e3796d7e,     0xbfa91f65f10dd814,     //   -0.9988, -0.049068
+    0xbfeff58192ee0358,     0xbfa9e835d6993c87,     //  -0.99872,   -0.0506
+    0xbfeff4dc54b1bed3,     0xbfaab101bd5f8317,     //  -0.99864, -0.052132
+    0xbfeff43228de1b77,     0xbfab79c986698b78,     //  -0.99856, -0.053664
+    0xbfeff3830f8d575c,     0xbfac428d12c0d7e3,     //  -0.99848, -0.055195
+    0xbfeff2cf08da7321,     0xbfad0b4c436f91d0,     //  -0.99839, -0.056727
+    0xbfeff21614e131ed,     0xbfadd406f9808ec8,     //   -0.9983, -0.058258
+    0xbfeff15833be1965,     0xbfae9cbd15ff5527,     //  -0.99821,  -0.05979
+    0xbfeff095658e71ad,     0xbfaf656e79f820e0,     //  -0.99812, -0.061321
+    0xbfefefcdaa704562,     0xbfb0170d833bf421,     //  -0.99802, -0.062852
+    0xbfefef0102826191,     0xbfb07b614e463064,     //  -0.99793, -0.064383
+    0xbfefee2f6de455ba,     0xbfb0dfb28ea201e6,     //  -0.99783, -0.065913
+    0xbfefed58ecb673c4,     0xbfb1440134d709b2,     //  -0.99772, -0.067444
+    0xbfefec7d7f19cffc,     0xbfb1a84d316d4f8a,     //  -0.99762, -0.068974
+    0xbfefeb9d2530410f,     0xbfb20c9674ed444c,     //  -0.99751, -0.070505
+    0xbfefeab7df1c6005,     0xbfb270dcefdfc45b,     //   -0.9974, -0.072035
+    0xbfefe9cdad01883a,     0xbfb2d52092ce19f6,     //  -0.99729, -0.073565
+    0xbfefe8de8f03d75c,     0xbfb339614e41ffa5,     //  -0.99718, -0.075094
+    0xbfefe7ea85482d60,     0xbfb39d9f12c5a299,     //  -0.99706, -0.076624
+    0xbfefe6f18ff42c84,     0xbfb401d9d0e3a507,     //  -0.99694, -0.078153
+    0xbfefe5f3af2e3940,     0xbfb4661179272096,     //  -0.99682, -0.079682
+    0xbfefe4f0e31d7a4a,     0xbfb4ca45fc1ba8b6,     //   -0.9967, -0.081211
+    0xbfefe3e92be9d886,     0xbfb52e774a4d4d0a,     //  -0.99657,  -0.08274
+    0xbfefe2dc89bbff08,     0xbfb592a554489bc8,     //  -0.99644, -0.084269
+    0xbfefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //  -0.99631, -0.085797
+    0xbfefe0b485181be3,     0xbfb65af75dd0f87b,     //  -0.99618, -0.087326
+    0xbfefdf9922f73307,     0xbfb6bf1b3e79b129,     //  -0.99604, -0.088854
+    0xbfefde78d68653fd,     0xbfb7233b9d236e71,     //  -0.99591, -0.090381
+    0xbfefdd539ff1f456,     0xbfb787586a5d5b21,     //  -0.99577, -0.091909
+    0xbfefdc297f674ba9,     0xbfb7eb7196b72ee4,     //  -0.99563, -0.093436
+    0xbfefdafa7514538c,     0xbfb84f8712c130a0,     //  -0.99548, -0.094963
+    0xbfefd9c68127c78c,     0xbfb8b398cf0c38e0,     //  -0.99533,  -0.09649
+    0xbfefd88da3d12526,     0xbfb917a6bc29b42c,     //  -0.99518, -0.098017
+    0xbfefd74fdd40abbf,     0xbfb97bb0caaba56f,     //  -0.99503, -0.099544
+    0xbfefd60d2da75c9e,     0xbfb9dfb6eb24a85c,     //  -0.99488,  -0.10107
+    0xbfefd4c59536fae4,     0xbfba43b90e27f3c4,     //  -0.99472,   -0.1026
+    0xbfefd37914220b84,     0xbfbaa7b724495c04,     //  -0.99456,  -0.10412
+    0xbfefd227aa9bd53b,     0xbfbb0bb11e1d5559,     //   -0.9944,  -0.10565
+    0xbfefd0d158d86087,     0xbfbb6fa6ec38f64c,     //  -0.99424,  -0.10717
+    0xbfefcf761f0c77a3,     0xbfbbd3987f31fa0e,     //  -0.99407,   -0.1087
+    0xbfefce15fd6da67b,     0xbfbc3785c79ec2d5,     //  -0.99391,  -0.11022
+    0xbfefccb0f4323aa3,     0xbfbc9b6eb6165c42,     //  -0.99374,  -0.11175
+    0xbfefcb4703914354,     0xbfbcff533b307dc1,     //  -0.99356,  -0.11327
+    0xbfefc9d82bc2915e,     0xbfbd633347858ce4,     //  -0.99339,  -0.11479
+    0xbfefc8646cfeb721,     0xbfbdc70ecbae9fc8,     //  -0.99321,  -0.11632
+    0xbfefc6ebc77f0887,     0xbfbe2ae5b8457f77,     //  -0.99303,  -0.11784
+    0xbfefc56e3b7d9af6,     0xbfbe8eb7fde4aa3e,     //  -0.99285,  -0.11937
+    0xbfefc3ebc935454c,     0xbfbef2858d27561b,     //  -0.99267,  -0.12089
+    0xbfefc26470e19fd3,     0xbfbf564e56a9730e,     //  -0.99248,  -0.12241
+    0xbfefc0d832bf043a,     0xbfbfba124b07ad85,     //  -0.99229,  -0.12393
+    0xbfefbf470f0a8d88,     0xbfc00ee8ad6fb85b,     //   -0.9921,  -0.12545
+    0xbfefbdb106021816,     0xbfc040c5bb67747e,     //  -0.99191,  -0.12698
+    0xbfefbc1617e44186,     0xbfc072a047ba831d,     //  -0.99171,   -0.1285
+    0xbfefba7644f068b5,     0xbfc0a4784ab8bf1d,     //  -0.99151,  -0.13002
+    0xbfefb8d18d66adb7,     0xbfc0d64dbcb26786,     //  -0.99131,  -0.13154
+    0xbfefb727f187f1c7,     0xbfc1082095f820b0,     //  -0.99111,  -0.13306
+    0xbfefb5797195d741,     0xbfc139f0cedaf576,     //   -0.9909,  -0.13458
+    0xbfefb3c60dd2c199,     0xbfc16bbe5fac5865,     //   -0.9907,   -0.1361
+    0xbfefb20dc681d54d,     0xbfc19d8940be24e7,     //  -0.99049,  -0.13762
+    0xbfefb0509be6f7db,     0xbfc1cf516a62a077,     //  -0.99027,  -0.13914
+    0xbfefae8e8e46cfbb,     0xbfc20116d4ec7bce,     //  -0.99006,  -0.14066
+    0xbfefacc79de6c44f,     0xbfc232d978aed413,     //  -0.98984,  -0.14218
+    0xbfefaafbcb0cfddc,     0xbfc264994dfd340a,     //  -0.98962,   -0.1437
+    0xbfefa92b1600657c,     0xbfc296564d2b953e,     //   -0.9894,  -0.14521
+    0xbfefa7557f08a517,     0xbfc2c8106e8e613a,     //  -0.98918,  -0.14673
+    0xbfefa57b066e2754,     0xbfc2f9c7aa7a72af,     //  -0.98895,  -0.14825
+    0xbfefa39bac7a1791,     0xbfc32b7bf94516a7,     //  -0.98872,  -0.14976
+    0xbfefa1b7717661d5,     0xbfc35d2d53440db2,     //  -0.98849,  -0.15128
+    0xbfef9fce55adb2c8,     0xbfc38edbb0cd8d14,     //  -0.98826,   -0.1528
+    0xbfef9de0596b77a3,     0xbfc3c0870a383ff6,     //  -0.98802,  -0.15431
+    0xbfef9bed7cfbde29,     0xbfc3f22f57db4893,     //  -0.98778,  -0.15583
+    0xbfef99f5c0abd496,     0xbfc423d4920e4166,     //  -0.98754,  -0.15734
+    0xbfef97f924c9099b,     0xbfc45576b1293e5a,     //   -0.9873,  -0.15886
+    0xbfef95f7a9a1ec47,     0xbfc48715ad84cdf5,     //  -0.98706,  -0.16037
+    0xbfef93f14f85ac08,     0xbfc4b8b17f79fa88,     //  -0.98681,  -0.16189
+    0xbfef91e616c43891,     0xbfc4ea4a1f624b61,     //  -0.98656,   -0.1634
+    0xbfef8fd5ffae41db,     0xbfc51bdf8597c5f2,     //  -0.98631,  -0.16491
+    0xbfef8dc10a95380d,     0xbfc54d71aa74ef02,     //  -0.98605,  -0.16643
+    0xbfef8ba737cb4b78,     0xbfc57f008654cbde,     //   -0.9858,  -0.16794
+    0xbfef898887a36c84,     0xbfc5b08c1192e381,     //  -0.98554,  -0.16945
+    0xbfef8764fa714ba9,     0xbfc5e214448b3fc6,     //  -0.98528,  -0.17096
+    0xbfef853c9089595e,     0xbfc61399179a6e94,     //  -0.98501,  -0.17247
+    0xbfef830f4a40c60c,     0xbfc6451a831d830d,     //  -0.98475,  -0.17398
+    0xbfef80dd27ed8204,     0xbfc676987f7216b8,     //  -0.98448,  -0.17549
+    0xbfef7ea629e63d6e,     0xbfc6a81304f64ab2,     //  -0.98421,    -0.177
+    0xbfef7c6a50826840,     0xbfc6d98a0c08c8da,     //  -0.98394,  -0.17851
+    0xbfef7a299c1a322a,     0xbfc70afd8d08c4ff,     //  -0.98366,  -0.18002
+    0xbfef77e40d068a90,     0xbfc73c6d8055fe0a,     //  -0.98339,  -0.18153
+    0xbfef7599a3a12077,     0xbfc76dd9de50bf31,     //  -0.98311,  -0.18304
+    0xbfef734a60446279,     0xbfc79f429f59e11d,     //  -0.98282,  -0.18455
+    0xbfef70f6434b7eb7,     0xbfc7d0a7bbd2cb1b,     //  -0.98254,  -0.18606
+    0xbfef6e9d4d1262ca,     0xbfc802092c1d744b,     //  -0.98225,  -0.18756
+    0xbfef6c3f7df5bbb7,     0xbfc83366e89c64c5,     //  -0.98196,  -0.18907
+    0xbfef69dcd652f5de,     0xbfc864c0e9b2b6cf,     //  -0.98167,  -0.19057
+    0xbfef677556883cee,     0xbfc8961727c41804,     //  -0.98138,  -0.19208
+    0xbfef6508fef47bd5,     0xbfc8c7699b34ca7e,     //  -0.98108,  -0.19359
+    0xbfef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  -0.98079,  -0.19509
+    0xbfef6021c9f148c2,     0xbfc92a0303c8194f,     //  -0.98048,  -0.19659
+    0xbfef5da6ed43685d,     0xbfc95b49e9b62af9,     //  -0.98018,   -0.1981
+    0xbfef5b273a4fa2d9,     0xbfc98c8ce69a7aec,     //  -0.97988,   -0.1996
+    0xbfef58a2b1789e84,     0xbfc9bdcbf2dc4366,     //  -0.97957,   -0.2011
+    0xbfef56195321c090,     0xbfc9ef0706e35a35,     //  -0.97926,  -0.20261
+    0xbfef538b1faf2d07,     0xbfca203e1b1831da,     //  -0.97895,  -0.20411
+    0xbfef50f81785c6b9,     0xbfca517127e3dabc,     //  -0.97863,  -0.20561
+    0xbfef4e603b0b2f2d,     0xbfca82a025b00451,     //  -0.97832,  -0.20711
+    0xbfef4bc38aa5c694,     0xbfcab3cb0ce6fe44,     //    -0.978,  -0.20861
+    0xbfef492206bcabb4,     0xbfcae4f1d5f3b9ab,     //  -0.97768,  -0.21011
+    0xbfef467bafb7bbe0,     0xbfcb16147941ca2a,     //  -0.97735,  -0.21161
+    0xbfef43d085ff92dd,     0xbfcb4732ef3d6722,     //  -0.97703,  -0.21311
+    0xbfef412089fd8adc,     0xbfcb784d30536cda,     //   -0.9767,  -0.21461
+    0xbfef3e6bbc1bbc65,     0xbfcba96334f15dad,     //  -0.97637,  -0.21611
+    0xbfef3bb21cc4fe47,     0xbfcbda74f5856330,     //  -0.97604,   -0.2176
+    0xbfef38f3ac64e589,     0xbfcc0b826a7e4f63,     //   -0.9757,   -0.2191
+    0xbfef36306b67c556,     0xbfcc3c8b8c4b9dd7,     //  -0.97536,   -0.2206
+    0xbfef33685a3aaef0,     0xbfcc6d90535d74dc,     //  -0.97503,  -0.22209
+    0xbfef309b794b719f,     0xbfcc9e90b824a6a9,     //  -0.97468,  -0.22359
+    0xbfef2dc9c9089a9d,     0xbfcccf8cb312b286,     //  -0.97434,  -0.22508
+    0xbfef2af349e17507,     0xbfcd00843c99c5f9,     //  -0.97399,  -0.22658
+    0xbfef2817fc4609ce,     0xbfcd31774d2cbdee,     //  -0.97364,  -0.22807
+    0xbfef2537e0a71f9f,     0xbfcd6265dd3f27e3,     //  -0.97329,  -0.22957
+    0xbfef2252f7763ada,     0xbfcd934fe5454311,     //  -0.97294,  -0.23106
+    0xbfef1f6941259d7a,     0xbfcdc4355db40195,     //  -0.97258,  -0.23255
+    0xbfef1c7abe284708,     0xbfcdf5163f01099a,     //  -0.97223,  -0.23404
+    0xbfef19876ef1f486,     0xbfce25f281a2b684,     //  -0.97187,  -0.23553
+    0xbfef168f53f7205d,     0xbfce56ca1e101a1b,     //   -0.9715,  -0.23702
+    0xbfef13926dad024e,     0xbfce879d0cc0fdaf,     //  -0.97114,  -0.23851
+    0xbfef1090bc898f5f,     0xbfceb86b462de348,     //  -0.97077,     -0.24
+    0xbfef0d8a410379c5,     0xbfcee934c2d006c7,     //   -0.9704,  -0.24149
+    0xbfef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  -0.97003,  -0.24298
+    0xbfef076eecade0fa,     0xbfcf4ab9679c9f5c,     //  -0.96966,  -0.24447
+    0xbfef045a14cf738c,     0xbfcf7b7480bd3801,     //  -0.96928,  -0.24596
+    0xbfef014074708ed3,     0xbfcfac2abeff57ff,     //   -0.9689,  -0.24744
+    0xbfeefe220c0b95ec,     0xbfcfdcdc1adfedf8,     //  -0.96852,  -0.24893
+    0xbfeefafedc1ba8b7,     0xbfd006c4466e54af,     //  -0.96814,  -0.25041
+    0xbfeef7d6e51ca3c0,     0xbfd01f1806b9fdd2,     //  -0.96775,   -0.2519
+    0xbfeef4aa278b2032,     0xbfd037694a928cac,     //  -0.96737,  -0.25338
+    0xbfeef178a3e473c2,     0xbfd04fb80e37fdae,     //  -0.96698,  -0.25487
+    0xbfeeee425aa6b09a,     0xbfd068044deab002,     //  -0.96658,  -0.25635
+    0xbfeeeb074c50a544,     0xbfd0804e05eb661e,     //  -0.96619,  -0.25783
+    0xbfeee7c77961dc9e,     0xbfd09895327b465e,     //  -0.96579,  -0.25931
+    0xbfeee482e25a9dbc,     0xbfd0b0d9cfdbdb90,     //  -0.96539,  -0.26079
+    0xbfeee13987bbebdc,     0xbfd0c91bda4f158d,     //  -0.96499,  -0.26227
+    0xbfeeddeb6a078651,     0xbfd0e15b4e1749cd,     //  -0.96459,  -0.26375
+    0xbfeeda9889bfe86a,     0xbfd0f998277733f7,     //  -0.96418,  -0.26523
+    0xbfeed740e7684963,     0xbfd111d262b1f677,     //  -0.96378,  -0.26671
+    0xbfeed3e483849c51,     0xbfd12a09fc0b1b12,     //  -0.96337,  -0.26819
+    0xbfeed0835e999009,     0xbfd1423eefc69378,     //  -0.96295,  -0.26967
+    0xbfeecd1d792c8f10,     0xbfd15a713a28b9d9,     //  -0.96254,  -0.27115
+    0xbfeec9b2d3c3bf84,     0xbfd172a0d7765177,     //  -0.96212,  -0.27262
+    0xbfeec6436ee60309,     0xbfd18acdc3f4873a,     //   -0.9617,   -0.2741
+    0xbfeec2cf4b1af6b2,     0xbfd1a2f7fbe8f243,     //  -0.96128,  -0.27557
+    0xbfeebf5668eaf2ef,     0xbfd1bb1f7b999480,     //  -0.96086,  -0.27705
+    0xbfeebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //  -0.96043,  -0.27852
+    0xbfeeb8566b810f2a,     0xbfd1eb6643499fbb,     //     -0.96,  -0.27999
+    0xbfeeb4cf515b8811,     0xbfd2038583d727bd,     //  -0.95957,  -0.28146
+    0xbfeeb1437af9bb34,     0xbfd21ba1fd3d2623,     //  -0.95914,  -0.28294
+    0xbfeeadb2e8e7a88e,     0xbfd233bbabc3bb72,     //   -0.9587,  -0.28441
+    0xbfeeaa1d9bb20af3,     0xbfd24bd28bb37672,     //  -0.95827,  -0.28588
+    0xbfeea68393e65800,     0xbfd263e6995554ba,     //  -0.95783,  -0.28735
+    0xbfeea2e4d212c000,     0xbfd27bf7d0f2c346,     //  -0.95738,  -0.28882
+    0xbfee9f4156c62dda,     0xbfd294062ed59f05,     //  -0.95694,  -0.29028
+    0xbfee9b99229046f8,     0xbfd2ac11af483572,     //  -0.95649,  -0.29175
+    0xbfee97ec36016b30,     0xbfd2c41a4e954520,     //  -0.95605,  -0.29322
+    0xbfee943a91aab4b4,     0xbfd2dc200907fe51,     //  -0.95559,  -0.29469
+    0xbfee9084361df7f3,     0xbfd2f422daec0386,     //  -0.95514,  -0.29615
+    0xbfee8cc923edc388,     0xbfd30c22c08d6a13,     //  -0.95469,  -0.29762
+    0xbfee89095bad6025,     0xbfd3241fb638baaf,     //  -0.95423,  -0.29908
+    0xbfee8544ddf0d075,     0xbfd33c19b83af207,     //  -0.95377,  -0.30054
+    0xbfee817bab4cd10d,     0xbfd35410c2e18152,     //  -0.95331,  -0.30201
+    0xbfee7dadc456d850,     0xbfd36c04d27a4edf,     //  -0.95284,  -0.30347
+    0xbfee79db29a5165a,     0xbfd383f5e353b6aa,     //  -0.95238,  -0.30493
+    0xbfee7603dbce74e9,     0xbfd39be3f1bc8aef,     //  -0.95191,  -0.30639
+    0xbfee7227db6a9744,     0xbfd3b3cefa0414b7,     //  -0.95144,  -0.30785
+    0xbfee6e472911da27,     0xbfd3cbb6f87a146e,     //  -0.95096,  -0.30931
+    0xbfee6a61c55d53a7,     0xbfd3e39be96ec271,     //  -0.95049,  -0.31077
+    0xbfee6677b0e6d31e,     0xbfd3fb7dc932cfa4,     //  -0.95001,  -0.31222
+    0xbfee6288ec48e112,     0xbfd4135c94176602,     //  -0.94953,  -0.31368
+    0xbfee5e95781ebf1c,     0xbfd42b38466e2928,     //  -0.94905,  -0.31514
+    0xbfee5a9d550467d3,     0xbfd44310dc8936f0,     //  -0.94856,  -0.31659
+    0xbfee56a083968eb1,     0xbfd45ae652bb2800,     //  -0.94807,  -0.31805
+    0xbfee529f04729ffc,     0xbfd472b8a5571054,     //  -0.94759,   -0.3195
+    0xbfee4e98d836c0af,     0xbfd48a87d0b07fd7,     //  -0.94709,  -0.32096
+    0xbfee4a8dff81ce5e,     0xbfd4a253d11b82f3,     //   -0.9466,  -0.32241
+    0xbfee467e7af35f23,     0xbfd4ba1ca2eca31c,     //  -0.94611,  -0.32386
+    0xbfee426a4b2bc17e,     0xbfd4d1e24278e76a,     //  -0.94561,  -0.32531
+    0xbfee3e5170cbfc46,     0xbfd4e9a4ac15d520,     //  -0.94511,  -0.32676
+    0xbfee3a33ec75ce85,     0xbfd50163dc197047,     //   -0.9446,  -0.32821
+    0xbfee3611becbaf69,     0xbfd5191fceda3c35,     //   -0.9441,  -0.32966
+    0xbfee31eae870ce25,     0xbfd530d880af3c24,     //  -0.94359,  -0.33111
+    0xbfee2dbf6a0911d9,     0xbfd5488dedeff3be,     //  -0.94308,  -0.33255
+    0xbfee298f4439197a,     0xbfd5604012f467b4,     //  -0.94257,    -0.334
+    0xbfee255a77a63bb8,     0xbfd577eeec151e47,     //  -0.94206,  -0.33545
+    0xbfee212104f686e5,     0xbfd58f9a75ab1fdd,     //  -0.94154,  -0.33689
+    0xbfee1ce2ecd0c0d8,     0xbfd5a742ac0ff78d,     //  -0.94103,  -0.33833
+    0xbfee18a02fdc66d9,     0xbfd5bee78b9db3b6,     //  -0.94051,  -0.33978
+    0xbfee1458cec1ad83,     0xbfd5d68910aee686,     //  -0.93998,  -0.34122
+    0xbfee100cca2980ac,     0xbfd5ee27379ea693,     //  -0.93946,  -0.34266
+    0xbfee0bbc22bd8349,     0xbfd605c1fcc88f63,     //  -0.93893,   -0.3441
+    0xbfee0766d9280f54,     0xbfd61d595c88c203,     //   -0.9384,  -0.34554
+    0xbfee030cee1435b8,     0xbfd634ed533be58e,     //  -0.93787,  -0.34698
+    0xbfedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //  -0.93734,  -0.34842
+    0xbfedfa4b3621271d,     0xbfd6640af6f03d9e,     //   -0.9368,  -0.34986
+    0xbfedf5e36a9ba59c,     0xbfd67b949cad63ca,     //  -0.93627,  -0.35129
+    0xbfedf177004b2534,     0xbfd6931acad55f51,     //  -0.93573,  -0.35273
+    0xbfeded05f7de47da,     0xbfd6aa9d7dc77e16,     //  -0.93518,  -0.35416
+    0xbfede890520465ce,     0xbfd6c21cb1e39771,     //  -0.93464,   -0.3556
+    0xbfede4160f6d8d81,     0xbfd6d998638a0cb5,     //  -0.93409,  -0.35703
+    0xbfeddf9730ca837b,     0xbfd6f1108f1bc9c5,     //  -0.93354,  -0.35846
+    0xbfeddb13b6ccc23d,     0xbfd7088530fa459e,     //  -0.93299,   -0.3599
+    0xbfedd68ba2267a25,     0xbfd71ff6458782ec,     //  -0.93244,  -0.36133
+    0xbfedd1fef38a915a,     0xbfd73763c9261092,     //  -0.93188,  -0.36276
+    0xbfedcd6dabaca3a5,     0xbfd74ecdb8390a3e,     //  -0.93133,  -0.36418
+    0xbfedc8d7cb410260,     0xbfd766340f2418f6,     //  -0.93077,  -0.36561
+    0xbfedc43d52fcb453,     0xbfd77d96ca4b73a6,     //  -0.93021,  -0.36704
+    0xbfedbf9e4395759a,     0xbfd794f5e613dfae,     //  -0.92964,  -0.36847
+    0xbfedbafa9dc1b78d,     0xbfd7ac515ee2b172,     //  -0.92907,  -0.36989
+    0xbfedb6526238a09b,     0xbfd7c3a9311dcce7,     //  -0.92851,  -0.37132
+    0xbfedb1a591b20c38,     0xbfd7dafd592ba621,     //  -0.92794,  -0.37274
+    0xbfedacf42ce68ab9,     0xbfd7f24dd37341e3,     //  -0.92736,  -0.37416
+    0xbfeda83e348f613b,     0xbfd8099a9c5c362d,     //  -0.92679,  -0.37559
+    0xbfeda383a9668988,     0xbfd820e3b04eaac4,     //  -0.92621,  -0.37701
+    0xbfed9ec48c26b1f3,     0xbfd838290bb359c8,     //  -0.92563,  -0.37843
+    0xbfed9a00dd8b3d46,     0xbfd84f6aaaf3903f,     //  -0.92505,  -0.37985
+    0xbfed95389e50429b,     0xbfd866a88a792ea0,     //  -0.92447,  -0.38127
+    0xbfed906bcf328d46,     0xbfd87de2a6aea963,     //  -0.92388,  -0.38268
+    0xbfed8b9a70ef9cb4,     0xbfd89518fbff098e,     //  -0.92329,   -0.3841
+    0xbfed86c48445a450,     0xbfd8ac4b86d5ed44,     //   -0.9227,  -0.38552
+    0xbfed81ea09f38b63,     0xbfd8c37a439f884f,     //  -0.92211,  -0.38693
+    0xbfed7d0b02b8ecf9,     0xbfd8daa52ec8a4af,     //  -0.92151,  -0.38835
+    0xbfed78276f5617c6,     0xbfd8f1cc44bea329,     //  -0.92092,  -0.38976
+    0xbfed733f508c0dff,     0xbfd908ef81ef7bd1,     //  -0.92032,  -0.39117
+    0xbfed6e52a71c8547,     0xbfd9200ee2c9be97,     //  -0.91972,  -0.39258
+    0xbfed696173c9e68b,     0xbfd9372a63bc93d7,     //  -0.91911,  -0.39399
+    0xbfed646bb7574de5,     0xbfd94e420137bce3,     //  -0.91851,   -0.3954
+    0xbfed5f7172888a7f,     0xbfd96555b7ab948f,     //   -0.9179,  -0.39681
+    0xbfed5a72a6221e73,     0xbfd97c6583890fc2,     //  -0.91729,  -0.39822
+    0xbfed556f52e93eb1,     0xbfd993716141bdfe,     //  -0.91668,  -0.39962
+    0xbfed506779a3d2d9,     0xbfd9aa794d47c9ee,     //  -0.91606,  -0.40103
+    0xbfed4b5b1b187524,     0xbfd9c17d440df9f2,     //  -0.91545,  -0.40243
+    0xbfed464a380e7242,     0xbfd9d87d4207b0ab,     //  -0.91483,  -0.40384
+    0xbfed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //  -0.91421,  -0.40524
+    0xbfed3c1ae79f2b4e,     0xbfda067145664d57,     //  -0.91359,  -0.40664
+    0xbfed36fc7bcbfbdc,     0xbfda1d6543b50ac0,     //  -0.91296,  -0.40804
+    0xbfed31d98e9e503a,     0xbfda34553b0afee5,     //  -0.91234,  -0.40944
+    0xbfed2cb220e0ef9f,     0xbfda4b4127dea1e4,     //  -0.91171,  -0.41084
+    0xbfed2786335f52fc,     0xbfda622906a70b63,     //  -0.91107,  -0.41224
+    0xbfed2255c6e5a4e1,     0xbfda790cd3dbf31a,     //  -0.91044,  -0.41364
+    0xbfed1d20dc40c15c,     0xbfda8fec8bf5b166,     //  -0.90981,  -0.41503
+    0xbfed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //  -0.90917,  -0.41643
+    0xbfed12a98fac410c,     0xbfdabd9faebc3980,     //  -0.90853,  -0.41782
+    0xbfed0d672f59d2b9,     0xbfdad473125cdc08,     //  -0.90789,  -0.41922
+    0xbfed082054168bac,     0xbfdaeb4252ca07ab,     //  -0.90724,  -0.42061
+    0xbfed02d4feb2bd92,     0xbfdb020d6c7f4009,     //   -0.9066,    -0.422
+    0xbfecfd852fff6ad4,     0xbfdb18d45bf8aca6,     //  -0.90595,  -0.42339
+    0xbfecf830e8ce467b,     0xbfdb2f971db31972,     //   -0.9053,  -0.42478
+    0xbfecf2d829f1b40e,     0xbfdb4655ae2bf757,     //  -0.90464,  -0.42617
+    0xbfeced7af43cc773,     0xbfdb5d1009e15cc0,     //  -0.90399,  -0.42756
+    0xbfece819488344ce,     0xbfdb73c62d520624,     //  -0.90333,  -0.42894
+    0xbfece2b32799a060,     0xbfdb8a7814fd5693,     //  -0.90267,  -0.43033
+    0xbfecdd489254fe65,     0xbfdba125bd63583e,     //  -0.90201,  -0.43171
+    0xbfecd7d9898b32f6,     0xbfdbb7cf2304bd01,     //  -0.90135,  -0.43309
+    0xbfecd2660e12c1e6,     0xbfdbce744262deee,     //  -0.90068,  -0.43448
+    0xbfecccee20c2de9f,     0xbfdbe51517ffc0d9,     //  -0.90002,  -0.43586
+    0xbfecc771c2736c09,     0xbfdbfbb1a05e0edc,     //  -0.89935,  -0.43724
+    0xbfecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //  -0.89867,  -0.43862
+    0xbfecbc6bb638d10b,     0xbfdc28ddbb6cf145,     //    -0.898,  -0.43999
+    0xbfecb6e20a00da99,     0xbfdc3f6d47263129,     //  -0.89732,  -0.44137
+    0xbfecb153f02fb87d,     0xbfdc55f877b23537,     //  -0.89665,  -0.44275
+    0xbfecabc169a0b901,     0xbfdc6c7f4997000a,     //  -0.89597,  -0.44412
+    0xbfeca62a772fd919,     0xbfdc8301b95b40c2,     //  -0.89528,   -0.4455
+    0xbfeca08f19b9c449,     0xbfdc997fc3865388,     //   -0.8946,  -0.44687
+    0xbfec9aef521bd480,     0xbfdcaff964a0421d,     //  -0.89391,  -0.44824
+    0xbfec954b213411f5,     0xbfdcc66e9931c45d,     //  -0.89322,  -0.44961
+    0xbfec8fa287e13305,     0xbfdcdcdf5dc440ce,     //  -0.89253,  -0.45098
+    0xbfec89f587029c13,     0xbfdcf34baee1cd21,     //  -0.89184,  -0.45235
+    0xbfec84441f785f61,     0xbfdd09b389152ec1,     //  -0.89115,  -0.45372
+    0xbfec7e8e52233cf3,     0xbfdd2016e8e9db5b,     //  -0.89045,  -0.45508
+    0xbfec78d41fe4a267,     0xbfdd3675caebf962,     //  -0.88975,  -0.45645
+    0xbfec7315899eaad7,     0xbfdd4cd02ba8609c,     //  -0.88905,  -0.45781
+    0xbfec6d5290341eb2,     0xbfdd632607ac9aa9,     //  -0.88835,  -0.45918
+    0xbfec678b3488739b,     0xbfdd79775b86e389,     //  -0.88764,  -0.46054
+    0xbfec61bf777fcc48,     0xbfdd8fc423c62a25,     //  -0.88693,   -0.4619
+    0xbfec5bef59fef85a,     0xbfdda60c5cfa10d8,     //  -0.88622,  -0.46326
+    0xbfec561adceb743e,     0xbfddbc5003b2edf8,     //  -0.88551,  -0.46462
+    0xbfec5042012b6907,     0xbfddd28f1481cc58,     //   -0.8848,  -0.46598
+    0xbfec4a64c7a5ac4c,     0xbfdde8c98bf86bd6,     //  -0.88408,  -0.46733
+    0xbfec44833141c004,     0xbfddfeff66a941de,     //  -0.88336,  -0.46869
+    0xbfec3e9d3ee7d262,     0xbfde1530a12779f4,     //  -0.88264,  -0.47004
+    0xbfec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  -0.88192,   -0.4714
+    0xbfec32c449f60831,     0xbfde418527dc4ffa,     //   -0.8812,  -0.47275
+    0xbfec2cd14931e3f1,     0xbfde57a86d3cd824,     //  -0.88047,   -0.4741
+    0xbfec26d9f01f2eaf,     0xbfde6dc704be97e2,     //  -0.87974,  -0.47545
+    0xbfec20de3fa971b0,     0xbfde83e0eaf85113,     //  -0.87901,   -0.4768
+    0xbfec1ade38bce19b,     0xbfde99f61c817eda,     //  -0.87828,  -0.47815
+    0xbfec14d9dc465e58,     0xbfdeb00695f25620,     //  -0.87755,  -0.47949
+    0xbfec0ed12b3372e9,     0xbfdec61253e3c61b,     //  -0.87681,  -0.48084
+    0xbfec08c426725549,     0xbfdedc1952ef78d5,     //  -0.87607,  -0.48218
+    0xbfec02b2cef1e641,     0xbfdef21b8fafd3b5,     //  -0.87533,  -0.48353
+    0xbfebfc9d25a1b147,     0xbfdf081906bff7fd,     //  -0.87459,  -0.48487
+    0xbfebf6832b71ec5b,     0xbfdf1e11b4bbc35c,     //  -0.87384,  -0.48621
+    0xbfebf064e15377dd,     0xbfdf3405963fd068,     //  -0.87309,  -0.48755
+    0xbfebea424837de6d,     0xbfdf49f4a7e97729,     //  -0.87235,  -0.48889
+    0xbfebe41b611154c1,     0xbfdf5fdee656cda3,     //   -0.8716,  -0.49023
+    0xbfebddf02cd2b983,     0xbfdf75c44e26a852,     //  -0.87084,  -0.49156
+    0xbfebd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //  -0.87009,   -0.4929
+    0xbfebd18ce0dc19d6,     0xbfdfa1808c6cf7e0,     //  -0.86933,  -0.49423
+    0xbfebcb54cb0d2327,     0xbfdfb7575c24d2de,     //  -0.86857,  -0.49557
+    0xbfebc5186bf8361d,     0xbfdfcd2947c1ff57,     //  -0.86781,   -0.4969
+    0xbfebbed7c49380ea,     0xbfdfe2f64be7120f,     //  -0.86705,  -0.49823
+    0xbfebb892d5d5dad5,     0xbfdff8be6537615e,     //  -0.86628,  -0.49956
+    0xbfebb249a0b6c40d,     0xbfe00740c82b82e0,     //  -0.86551,  -0.50089
+    0xbfebabfc262e6586,     0xbfe0121fe4f56d2c,     //  -0.86474,  -0.50221
+    0xbfeba5aa673590d2,     0xbfe01cfc874c3eb7,     //  -0.86397,  -0.50354
+    0xbfeb9f5464c5bffc,     0xbfe027d6ad83287e,     //   -0.8632,  -0.50486
+    0xbfeb98fa1fd9155e,     0xbfe032ae55edbd95,     //  -0.86242,  -0.50619
+    0xbfeb929b996a5b7f,     0xbfe03d837edff370,     //  -0.86165,  -0.50751
+    0xbfeb8c38d27504e9,     0xbfe0485626ae221a,     //  -0.86087,  -0.50883
+    0xbfeb85d1cbf52c02,     0xbfe053264bad0483,     //  -0.86009,  -0.51015
+    0xbfeb7f6686e792ea,     0xbfe05df3ec31b8b6,     //   -0.8593,  -0.51147
+    0xbfeb78f70449a34b,     0xbfe068bf0691c028,     //  -0.85852,  -0.51279
+    0xbfeb728345196e3e,     0xbfe073879922ffed,     //  -0.85773,   -0.5141
+    0xbfeb6c0b4a55ac17,     0xbfe07e4da23bc102,     //  -0.85694,  -0.51542
+    0xbfeb658f14fdbc47,     0xbfe089112032b08c,     //  -0.85615,  -0.51673
+    0xbfeb5f0ea611a532,     0xbfe093d2115ee018,     //  -0.85535,  -0.51804
+    0xbfeb5889fe921405,     0xbfe09e907417c5e1,     //  -0.85456,  -0.51936
+    0xbfeb52011f805c92,     0xbfe0a94c46b53d0b,     //  -0.85376,  -0.52067
+    0xbfeb4b7409de7925,     0xbfe0b405878f85ec,     //  -0.85296,  -0.52198
+    0xbfeb44e2beaf0a61,     0xbfe0bebc34ff4646,     //  -0.85216,  -0.52328
+    0xbfeb3e4d3ef55712,     0xbfe0c9704d5d898f,     //  -0.85136,  -0.52459
+    0xbfeb37b38bb54c09,     0xbfe0d421cf03c12b,     //  -0.85055,   -0.5259
+    0xbfeb3115a5f37bf4,     0xbfe0ded0b84bc4b5,     //  -0.84974,   -0.5272
+    0xbfeb2a738eb51f33,     0xbfe0e97d078fd23b,     //  -0.84893,   -0.5285
+    0xbfeb23cd470013b4,     0xbfe0f426bb2a8e7d,     //  -0.84812,   -0.5298
+    0xbfeb1d22cfdadcc6,     0xbfe0fecdd1770537,     //  -0.84731,   -0.5311
+    0xbfeb16742a4ca2f5,     0xbfe1097248d0a956,     //  -0.84649,   -0.5324
+    0xbfeb0fc1575d33db,     0xbfe114141f935545,     //  -0.84567,   -0.5337
+    0xbfeb090a58150200,     0xbfe11eb3541b4b22,     //  -0.84485,    -0.535
+    0xbfeb024f2d7d24a9,     0xbfe1294fe4c5350a,     //  -0.84403,  -0.53629
+    0xbfeafb8fd89f57b6,     0xbfe133e9cfee254e,     //  -0.84321,  -0.53759
+    0xbfeaf4cc5a85fb73,     0xbfe13e8113f396c1,     //  -0.84238,  -0.53888
+    0xbfeaee04b43c1474,     0xbfe14915af336ceb,     //  -0.84155,  -0.54017
+    0xbfeae738e6cd4b67,     0xbfe153a7a00bf453,     //  -0.84073,  -0.54146
+    0xbfeae068f345ecef,     0xbfe15e36e4dbe2bc,     //  -0.83989,  -0.54275
+    0xbfead994dab2e979,     0xbfe168c37c025764,     //  -0.83906,  -0.54404
+    0xbfead2bc9e21d511,     0xbfe1734d63dedb49,     //  -0.83822,  -0.54532
+    0xbfeacbe03ea0e73b,     0xbfe17dd49ad16161,     //  -0.83739,  -0.54661
+    0xbfeac4ffbd3efac8,     0xbfe188591f3a46e5,     //  -0.83655,  -0.54789
+    0xbfeabe1b1b0b8dac,     0xbfe192daef7a5386,     //  -0.83571,  -0.54918
+    0xbfeab7325916c0d4,     0xbfe19d5a09f2b9b8,     //  -0.83486,  -0.55046
+    0xbfeab045787157ff,     0xbfe1a7d66d0516e6,     //  -0.83402,  -0.55174
+    0xbfeaa9547a2cb98e,     0xbfe1b250171373be,     //  -0.83317,  -0.55302
+    0xbfeaa25f5f5aee60,     0xbfe1bcc706804467,     //  -0.83232,  -0.55429
+    0xbfea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  -0.83147,  -0.55557
+    0xbfea9468d85b20ae,     0xbfe1d1acaf012cc2,     //  -0.83062,  -0.55685
+    0xbfea8d676e545ad2,     0xbfe1dc1b64dc4872,     //  -0.82976,  -0.55812
+    0xbfea8661ec0ee133,     0xbfe1e68759a3e074,     //   -0.8289,  -0.55939
+    0xbfea7f58529fe69d,     0xbfe1f0f08bbc861b,     //  -0.82805,  -0.56066
+    0xbfea784aa31d3f55,     0xbfe1fb56f98b37b8,     //  -0.82718,  -0.56193
+    0xbfea7138de9d60f5,     0xbfe205baa17560d6,     //  -0.82632,   -0.5632
+    0xbfea6a230637623b,     0xbfe2101b81e0da78,     //  -0.82546,  -0.56447
+    0xbfea63091b02fae2,     0xbfe21a799933eb58,     //  -0.82459,  -0.56573
+    0xbfea5beb1e188375,     0xbfe224d4e5d5482e,     //  -0.82372,    -0.567
+    0xbfea54c91090f524,     0xbfe22f2d662c13e1,     //  -0.82285,  -0.56826
+    0xbfea4da2f385e997,     0xbfe23983189fdfd5,     //  -0.82198,  -0.56952
+    0xbfea4678c8119ac8,     0xbfe243d5fb98ac1f,     //   -0.8211,  -0.57078
+    0xbfea3f4a8f4ee2d2,     0xbfe24e260d7ee7c9,     //  -0.82023,  -0.57204
+    0xbfea38184a593bc6,     0xbfe258734cbb7110,     //  -0.81935,   -0.5733
+    0xbfea30e1fa4cbf81,     0xbfe262bdb7b795a2,     //  -0.81847,  -0.57455
+    0xbfea29a7a0462782,     0xbfe26d054cdd12df,     //  -0.81758,  -0.57581
+    0xbfea22693d62ccb9,     0xbfe2774a0a961612,     //   -0.8167,  -0.57706
+    0xbfea1b26d2c0a75e,     0xbfe2818bef4d3cba,     //  -0.81581,  -0.57831
+    0xbfea13e0617e4ec7,     0xbfe28bcaf96d94ba,     //  -0.81493,  -0.57956
+    0xbfea0c95eabaf937,     0xbfe2960727629ca8,     //  -0.81404,  -0.58081
+    0xbfea05476f967bb5,     0xbfe2a040779843fb,     //  -0.81314,  -0.58206
+    0xbfe9fdf4f13149de,     0xbfe2aa76e87aeb58,     //  -0.81225,  -0.58331
+    0xbfe9f69e70ac75bc,     0xbfe2b4aa787764c4,     //  -0.81135,  -0.58455
+    0xbfe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //  -0.81046,   -0.5858
+    0xbfe9e7e56dcb45bd,     0xbfe2c908ef734e57,     //  -0.80956,  -0.58704
+    0xbfe9e082edb42472,     0xbfe2d333d34e9bb7,     //  -0.80866,  -0.58828
+    0xbfe9d91c7007d5a6,     0xbfe2dd5bcffb7616,     //  -0.80775,  -0.58952
+    0xbfe9d1b1f5ea80d6,     0xbfe2e780e3e8ea16,     //  -0.80685,  -0.59076
+    0xbfe9ca438080eadb,     0xbfe2f1a30d86773a,     //  -0.80594,    -0.592
+    0xbfe9c2d110f075c3,     0xbfe2fbc24b441015,     //  -0.80503,  -0.59323
+    0xbfe9bb5aa85f2098,     0xbfe305de9b921a94,     //  -0.80412,  -0.59447
+    0xbfe9b3e047f38741,     0xbfe30ff7fce17035,     //  -0.80321,   -0.5957
+    0xbfe9ac61f0d4e247,     0xbfe31a0e6da35e44,     //  -0.80229,  -0.59693
+    0xbfe9a4dfa42b06b2,     0xbfe32421ec49a620,     //  -0.80138,  -0.59816
+    0xbfe99d59631e65d5,     0xbfe32e3277467d6b,     //  -0.80046,  -0.59939
+    0xbfe995cf2ed80d22,     0xbfe338400d0c8e57,     //  -0.79954,  -0.60062
+    0xbfe98e410881a600,     0xbfe3424aac0ef7d6,     //  -0.79861,  -0.60184
+    0xbfe986aef1457594,     0xbfe34c5252c14de1,     //  -0.79769,  -0.60307
+    0xbfe97f18ea4e5c9e,     0xbfe35656ff9799ae,     //  -0.79676,  -0.60429
+    0xbfe9777ef4c7d742,     0xbfe36058b10659f3,     //  -0.79584,  -0.60551
+    0xbfe96fe111ddfce0,     0xbfe36a576582831b,     //  -0.79491,  -0.60673
+    0xbfe9683f42bd7fe1,     0xbfe374531b817f8d,     //  -0.79398,  -0.60795
+    0xbfe960998893ad8c,     0xbfe37e4bd1792fe2,     //  -0.79304,  -0.60917
+    0xbfe958efe48e6dd7,     0xbfe3884185dfeb22,     //  -0.79211,  -0.61038
+    0xbfe9514257dc4335,     0xbfe39234372c7f04,     //  -0.79117,   -0.6116
+    0xbfe94990e3ac4a6c,     0xbfe39c23e3d63029,     //  -0.79023,  -0.61281
+    0xbfe941db892e3a65,     0xbfe3a6108a54ba58,     //  -0.78929,  -0.61402
+    0xbfe93a22499263fc,     0xbfe3affa292050b9,     //  -0.78835,  -0.61523
+    0xbfe932652609b1cf,     0xbfe3b9e0beb19e18,     //   -0.7874,  -0.61644
+    0xbfe92aa41fc5a815,     0xbfe3c3c44981c517,     //  -0.78646,  -0.61765
+    0xbfe922df37f8646a,     0xbfe3cda4c80a6076,     //  -0.78551,  -0.61885
+    0xbfe91b166fd49da2,     0xbfe3d78238c58343,     //  -0.78456,  -0.62006
+    0xbfe91349c88da398,     0xbfe3e15c9a2db922,     //   -0.7836,  -0.62126
+    0xbfe90b7943575efe,     0xbfe3eb33eabe0680,     //  -0.78265,  -0.62246
+    0xbfe903a4e1665133,     0xbfe3f50828f1e8d2,     //  -0.78169,  -0.62366
+    0xbfe8fbcca3ef940d,     0xbfe3fed9534556d4,     //  -0.78074,  -0.62486
+    0xbfe8f3f08c28d9ac,     0xbfe408a76834c0c0,     //  -0.77978,  -0.62606
+    0xbfe8ec109b486c49,     0xbfe41272663d108c,     //  -0.77882,  -0.62725
+    0xbfe8e42cd2852e0a,     0xbfe41c3a4bdbaa26,     //  -0.77785,  -0.62845
+    0xbfe8dc45331698cc,     0xbfe425ff178e6bb1,     //  -0.77689,  -0.62964
+    0xbfe8d459be34bdfa,     0xbfe42fc0c7d3adbb,     //  -0.77592,  -0.63083
+    0xbfe8cc6a75184655,     0xbfe4397f5b2a4380,     //  -0.77495,  -0.63202
+    0xbfe8c47758fa71cb,     0xbfe4433ad0117b1d,     //  -0.77398,  -0.63321
+    0xbfe8bc806b151741,     0xbfe44cf325091dd6,     //  -0.77301,  -0.63439
+    0xbfe8b485aca2a468,     0xbfe456a858917046,     //  -0.77204,  -0.63558
+    0xbfe8ac871ede1d88,     0xbfe4605a692b32a2,     //  -0.77106,  -0.63676
+    0xbfe8a484c3031d50,     0xbfe46a095557a0f1,     //  -0.77008,  -0.63794
+    0xbfe89c7e9a4dd4ab,     0xbfe473b51b987347,     //   -0.7691,  -0.63912
+    0xbfe89474a5fb0a84,     0xbfe47d5dba6fde01,     //  -0.76812,   -0.6403
+    0xbfe88c66e7481ba1,     0xbfe48703306091fe,     //  -0.76714,  -0.64148
+    0xbfe884555f72fa6b,     0xbfe490a57bedbcdf,     //  -0.76615,  -0.64266
+    0xbfe87c400fba2ebf,     0xbfe49a449b9b0938,     //  -0.76517,  -0.64383
+    0xbfe87426f95cd5bd,     0xbfe4a3e08dec9ed6,     //  -0.76418,    -0.645
+    0xbfe86c0a1d9aa195,     0xbfe4ad79516722f0,     //  -0.76319,  -0.64618
+    0xbfe863e97db3d95a,     0xbfe4b70ee48fb869,     //   -0.7622,  -0.64735
+    0xbfe85bc51ae958cc,     0xbfe4c0a145ec0004,     //   -0.7612,  -0.64851
+    0xbfe8539cf67c9029,     0xbfe4ca30740218a3,     //  -0.76021,  -0.64968
+    0xbfe84b7111af83f9,     0xbfe4d3bc6d589f80,     //  -0.75921,  -0.65085
+    0xbfe843416dc4cce2,     0xbfe4dd453076b064,     //  -0.75821,  -0.65201
+    0xbfe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //  -0.75721,  -0.65317
+    0xbfe832d6eda3a3e0,     0xbfe4f04d0e2859aa,     //  -0.75621,  -0.65433
+    0xbfe82a9c13f545ff,     0xbfe4f9cc25cca486,     //   -0.7552,  -0.65549
+    0xbfe8225d803964e5,     0xbfe503480159ded2,     //  -0.75419,  -0.65665
+    0xbfe81a1b33b57acc,     0xbfe50cc09f59a09b,     //  -0.75319,  -0.65781
+    0xbfe811d52faf94dc,     0xbfe51635fe5601d7,     //  -0.75218,  -0.65896
+    0xbfe8098b756e52fa,     0xbfe51fa81cd99aa6,     //  -0.75117,  -0.66011
+    0xbfe8013e0638e795,     0xbfe52916f96f8388,     //  -0.75015,  -0.66127
+    0xbfe7f8ece3571771,     0xbfe5328292a35596,     //  -0.74914,  -0.66242
+    0xbfe7f0980e113978,     0xbfe53beae7012abe,     //  -0.74812,  -0.66356
+    0xbfe7e83f87b03686,     0xbfe5454ff5159dfb,     //   -0.7471,  -0.66471
+    0xbfe7dfe3517d8937,     0xbfe54eb1bb6dcb8f,     //  -0.74608,  -0.66586
+    0xbfe7d7836cc33db2,     0xbfe5581038975137,     //  -0.74506,    -0.667
+    0xbfe7cf1fdacbf179,     0xbfe5616b6b204e6e,     //  -0.74403,  -0.66814
+    0xbfe7c6b89ce2d333,     0xbfe56ac35197649e,     //  -0.74301,  -0.66928
+    0xbfe7be4db453a27c,     0xbfe57417ea8bb75c,     //  -0.74198,  -0.67042
+    0xbfe7b5df226aafb0,     0xbfe57d69348cec9f,     //  -0.74095,  -0.67156
+    0xbfe7ad6ce874dbb6,     0xbfe586b72e2b2cfd,     //  -0.73992,  -0.67269
+    0xbfe7a4f707bf97d2,     0xbfe59001d5f723df,     //  -0.73889,  -0.67383
+    0xbfe79c7d8198e56e,     0xbfe599492a81ffbc,     //  -0.73785,  -0.67496
+    0xbfe79400574f55e4,     0xbfe5a28d2a5d7250,     //  -0.73682,  -0.67609
+    0xbfe78b7f8a320a52,     0xbfe5abcdd41bb0d8,     //  -0.73578,  -0.67722
+    0xbfe782fb1b90b35b,     0xbfe5b50b264f7448,     //  -0.73474,  -0.67835
+    0xbfe77a730cbb9100,     0xbfe5be451f8bf980,     //   -0.7337,  -0.67948
+    0xbfe771e75f037261,     0xbfe5c77bbe65018c,     //  -0.73265,   -0.6806
+    0xbfe7695813b9b594,     0xbfe5d0af016ed1d4,     //  -0.73161,  -0.68172
+    0xbfe760c52c304764,     0xbfe5d9dee73e345c,     //  -0.73056,  -0.68285
+    0xbfe7582ea9b9a329,     0xbfe5e30b6e6877f3,     //  -0.72951,  -0.68397
+    0xbfe74f948da8d28d,     0xbfe5ec3495837074,     //  -0.72846,  -0.68508
+    0xbfe746f6d9516d59,     0xbfe5f55a5b2576f8,     //  -0.72741,   -0.6862
+    0xbfe73e558e079942,     0xbfe5fe7cbde56a0f,     //  -0.72636,  -0.68732
+    0xbfe735b0ad2009b2,     0xbfe6079bbc5aadfa,     //   -0.7253,  -0.68843
+    0xbfe72d0837efff97,     0xbfe610b7551d2cde,     //  -0.72425,  -0.68954
+    0xbfe7245c2fcd492a,     0xbfe619cf86c55702,     //  -0.72319,  -0.69065
+    0xbfe71bac960e41bf,     0xbfe622e44fec22ff,     //  -0.72213,  -0.69176
+    0xbfe712f96c09d18d,     0xbfe62bf5af2b0dfd,     //  -0.72107,  -0.69287
+    0xbfe70a42b3176d7a,     0xbfe63503a31c1be8,     //     -0.72,  -0.69397
+    0xbfe701886c8f16e6,     0xbfe63e0e2a59d7aa,     //  -0.71894,  -0.69508
+    0xbfe6f8ca99c95b75,     0xbfe64715437f535b,     //  -0.71787,  -0.69618
+    0xbfe6f0093c1f54de,     0xbfe65018ed28287f,     //   -0.7168,  -0.69728
+    0xbfe6e74454eaa8ae,     0xbfe6591925f0783e,     //  -0.71573,  -0.69838
+    0xbfe6de7be585881d,     0xbfe66215ec74eb91,     //  -0.71466,  -0.69947
+    0xbfe6d5afef4aafcc,     0xbfe66b0f3f52b386,     //  -0.71358,  -0.70057
+    0xbfe6cce07395679f,     0xbfe674051d27896c,     //  -0.71251,  -0.70166
+    0xbfe6c40d73c18275,     0xbfe67cf78491af10,     //  -0.71143,  -0.70275
+    0xbfe6bb36f12b5e06,     0xbfe685e6742feeef,     //  -0.71035,  -0.70385
+    0xbfe6b25ced2fe29c,     0xbfe68ed1eaa19c71,     //  -0.70927,  -0.70493
+    0xbfe6a97f692c82ea,     0xbfe697b9e686941c,     //  -0.70819,  -0.70602
+    0xbfe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  -0.70711,  -0.70711
+    0xbfe697b9e686941c,     0xbfe6a97f692c82ea,     //  -0.70602,  -0.70819
+    0xbfe68ed1eaa19c71,     0xbfe6b25ced2fe29c,     //  -0.70493,  -0.70927
+    0xbfe685e6742feeef,     0xbfe6bb36f12b5e06,     //  -0.70385,  -0.71035
+    0xbfe67cf78491af10,     0xbfe6c40d73c18275,     //  -0.70275,  -0.71143
+    0xbfe674051d27896c,     0xbfe6cce07395679f,     //  -0.70166,  -0.71251
+    0xbfe66b0f3f52b386,     0xbfe6d5afef4aafcc,     //  -0.70057,  -0.71358
+    0xbfe66215ec74eb91,     0xbfe6de7be585881d,     //  -0.69947,  -0.71466
+    0xbfe6591925f0783e,     0xbfe6e74454eaa8ae,     //  -0.69838,  -0.71573
+    0xbfe65018ed28287f,     0xbfe6f0093c1f54de,     //  -0.69728,   -0.7168
+    0xbfe64715437f535b,     0xbfe6f8ca99c95b75,     //  -0.69618,  -0.71787
+    0xbfe63e0e2a59d7aa,     0xbfe701886c8f16e6,     //  -0.69508,  -0.71894
+    0xbfe63503a31c1be8,     0xbfe70a42b3176d7a,     //  -0.69397,     -0.72
+    0xbfe62bf5af2b0dfd,     0xbfe712f96c09d18d,     //  -0.69287,  -0.72107
+    0xbfe622e44fec22ff,     0xbfe71bac960e41bf,     //  -0.69176,  -0.72213
+    0xbfe619cf86c55702,     0xbfe7245c2fcd492a,     //  -0.69065,  -0.72319
+    0xbfe610b7551d2cde,     0xbfe72d0837efff97,     //  -0.68954,  -0.72425
+    0xbfe6079bbc5aadfa,     0xbfe735b0ad2009b2,     //  -0.68843,   -0.7253
+    0xbfe5fe7cbde56a0f,     0xbfe73e558e079942,     //  -0.68732,  -0.72636
+    0xbfe5f55a5b2576f8,     0xbfe746f6d9516d59,     //   -0.6862,  -0.72741
+    0xbfe5ec3495837074,     0xbfe74f948da8d28d,     //  -0.68508,  -0.72846
+    0xbfe5e30b6e6877f3,     0xbfe7582ea9b9a329,     //  -0.68397,  -0.72951
+    0xbfe5d9dee73e345c,     0xbfe760c52c304764,     //  -0.68285,  -0.73056
+    0xbfe5d0af016ed1d4,     0xbfe7695813b9b594,     //  -0.68172,  -0.73161
+    0xbfe5c77bbe65018c,     0xbfe771e75f037261,     //   -0.6806,  -0.73265
+    0xbfe5be451f8bf980,     0xbfe77a730cbb9100,     //  -0.67948,   -0.7337
+    0xbfe5b50b264f7448,     0xbfe782fb1b90b35b,     //  -0.67835,  -0.73474
+    0xbfe5abcdd41bb0d8,     0xbfe78b7f8a320a52,     //  -0.67722,  -0.73578
+    0xbfe5a28d2a5d7250,     0xbfe79400574f55e4,     //  -0.67609,  -0.73682
+    0xbfe599492a81ffbc,     0xbfe79c7d8198e56e,     //  -0.67496,  -0.73785
+    0xbfe59001d5f723df,     0xbfe7a4f707bf97d2,     //  -0.67383,  -0.73889
+    0xbfe586b72e2b2cfd,     0xbfe7ad6ce874dbb6,     //  -0.67269,  -0.73992
+    0xbfe57d69348cec9f,     0xbfe7b5df226aafb0,     //  -0.67156,  -0.74095
+    0xbfe57417ea8bb75c,     0xbfe7be4db453a27c,     //  -0.67042,  -0.74198
+    0xbfe56ac35197649e,     0xbfe7c6b89ce2d333,     //  -0.66928,  -0.74301
+    0xbfe5616b6b204e6e,     0xbfe7cf1fdacbf179,     //  -0.66814,  -0.74403
+    0xbfe5581038975137,     0xbfe7d7836cc33db2,     //    -0.667,  -0.74506
+    0xbfe54eb1bb6dcb8f,     0xbfe7dfe3517d8937,     //  -0.66586,  -0.74608
+    0xbfe5454ff5159dfb,     0xbfe7e83f87b03686,     //  -0.66471,   -0.7471
+    0xbfe53beae7012abe,     0xbfe7f0980e113978,     //  -0.66356,  -0.74812
+    0xbfe5328292a35596,     0xbfe7f8ece3571771,     //  -0.66242,  -0.74914
+    0xbfe52916f96f8388,     0xbfe8013e0638e795,     //  -0.66127,  -0.75015
+    0xbfe51fa81cd99aa6,     0xbfe8098b756e52fa,     //  -0.66011,  -0.75117
+    0xbfe51635fe5601d7,     0xbfe811d52faf94dc,     //  -0.65896,  -0.75218
+    0xbfe50cc09f59a09b,     0xbfe81a1b33b57acc,     //  -0.65781,  -0.75319
+    0xbfe503480159ded2,     0xbfe8225d803964e5,     //  -0.65665,  -0.75419
+    0xbfe4f9cc25cca486,     0xbfe82a9c13f545ff,     //  -0.65549,   -0.7552
+    0xbfe4f04d0e2859aa,     0xbfe832d6eda3a3e0,     //  -0.65433,  -0.75621
+    0xbfe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //  -0.65317,  -0.75721
+    0xbfe4dd453076b064,     0xbfe843416dc4cce2,     //  -0.65201,  -0.75821
+    0xbfe4d3bc6d589f80,     0xbfe84b7111af83f9,     //  -0.65085,  -0.75921
+    0xbfe4ca30740218a3,     0xbfe8539cf67c9029,     //  -0.64968,  -0.76021
+    0xbfe4c0a145ec0004,     0xbfe85bc51ae958cc,     //  -0.64851,   -0.7612
+    0xbfe4b70ee48fb869,     0xbfe863e97db3d95a,     //  -0.64735,   -0.7622
+    0xbfe4ad79516722f0,     0xbfe86c0a1d9aa195,     //  -0.64618,  -0.76319
+    0xbfe4a3e08dec9ed6,     0xbfe87426f95cd5bd,     //    -0.645,  -0.76418
+    0xbfe49a449b9b0938,     0xbfe87c400fba2ebf,     //  -0.64383,  -0.76517
+    0xbfe490a57bedbcdf,     0xbfe884555f72fa6b,     //  -0.64266,  -0.76615
+    0xbfe48703306091fe,     0xbfe88c66e7481ba1,     //  -0.64148,  -0.76714
+    0xbfe47d5dba6fde01,     0xbfe89474a5fb0a84,     //   -0.6403,  -0.76812
+    0xbfe473b51b987347,     0xbfe89c7e9a4dd4ab,     //  -0.63912,   -0.7691
+    0xbfe46a095557a0f1,     0xbfe8a484c3031d50,     //  -0.63794,  -0.77008
+    0xbfe4605a692b32a2,     0xbfe8ac871ede1d88,     //  -0.63676,  -0.77106
+    0xbfe456a858917046,     0xbfe8b485aca2a468,     //  -0.63558,  -0.77204
+    0xbfe44cf325091dd6,     0xbfe8bc806b151741,     //  -0.63439,  -0.77301
+    0xbfe4433ad0117b1d,     0xbfe8c47758fa71cb,     //  -0.63321,  -0.77398
+    0xbfe4397f5b2a4380,     0xbfe8cc6a75184655,     //  -0.63202,  -0.77495
+    0xbfe42fc0c7d3adbb,     0xbfe8d459be34bdfa,     //  -0.63083,  -0.77592
+    0xbfe425ff178e6bb1,     0xbfe8dc45331698cc,     //  -0.62964,  -0.77689
+    0xbfe41c3a4bdbaa26,     0xbfe8e42cd2852e0a,     //  -0.62845,  -0.77785
+    0xbfe41272663d108c,     0xbfe8ec109b486c49,     //  -0.62725,  -0.77882
+    0xbfe408a76834c0c0,     0xbfe8f3f08c28d9ac,     //  -0.62606,  -0.77978
+    0xbfe3fed9534556d4,     0xbfe8fbcca3ef940d,     //  -0.62486,  -0.78074
+    0xbfe3f50828f1e8d2,     0xbfe903a4e1665133,     //  -0.62366,  -0.78169
+    0xbfe3eb33eabe0680,     0xbfe90b7943575efe,     //  -0.62246,  -0.78265
+    0xbfe3e15c9a2db922,     0xbfe91349c88da398,     //  -0.62126,   -0.7836
+    0xbfe3d78238c58343,     0xbfe91b166fd49da2,     //  -0.62006,  -0.78456
+    0xbfe3cda4c80a6076,     0xbfe922df37f8646a,     //  -0.61885,  -0.78551
+    0xbfe3c3c44981c517,     0xbfe92aa41fc5a815,     //  -0.61765,  -0.78646
+    0xbfe3b9e0beb19e18,     0xbfe932652609b1cf,     //  -0.61644,   -0.7874
+    0xbfe3affa292050b9,     0xbfe93a22499263fc,     //  -0.61523,  -0.78835
+    0xbfe3a6108a54ba58,     0xbfe941db892e3a65,     //  -0.61402,  -0.78929
+    0xbfe39c23e3d63029,     0xbfe94990e3ac4a6c,     //  -0.61281,  -0.79023
+    0xbfe39234372c7f04,     0xbfe9514257dc4335,     //   -0.6116,  -0.79117
+    0xbfe3884185dfeb22,     0xbfe958efe48e6dd7,     //  -0.61038,  -0.79211
+    0xbfe37e4bd1792fe2,     0xbfe960998893ad8c,     //  -0.60917,  -0.79304
+    0xbfe374531b817f8d,     0xbfe9683f42bd7fe1,     //  -0.60795,  -0.79398
+    0xbfe36a576582831b,     0xbfe96fe111ddfce0,     //  -0.60673,  -0.79491
+    0xbfe36058b10659f3,     0xbfe9777ef4c7d742,     //  -0.60551,  -0.79584
+    0xbfe35656ff9799ae,     0xbfe97f18ea4e5c9e,     //  -0.60429,  -0.79676
+    0xbfe34c5252c14de1,     0xbfe986aef1457594,     //  -0.60307,  -0.79769
+    0xbfe3424aac0ef7d6,     0xbfe98e410881a600,     //  -0.60184,  -0.79861
+    0xbfe338400d0c8e57,     0xbfe995cf2ed80d22,     //  -0.60062,  -0.79954
+    0xbfe32e3277467d6b,     0xbfe99d59631e65d5,     //  -0.59939,  -0.80046
+    0xbfe32421ec49a620,     0xbfe9a4dfa42b06b2,     //  -0.59816,  -0.80138
+    0xbfe31a0e6da35e44,     0xbfe9ac61f0d4e247,     //  -0.59693,  -0.80229
+    0xbfe30ff7fce17035,     0xbfe9b3e047f38741,     //   -0.5957,  -0.80321
+    0xbfe305de9b921a94,     0xbfe9bb5aa85f2098,     //  -0.59447,  -0.80412
+    0xbfe2fbc24b441015,     0xbfe9c2d110f075c3,     //  -0.59323,  -0.80503
+    0xbfe2f1a30d86773a,     0xbfe9ca438080eadb,     //    -0.592,  -0.80594
+    0xbfe2e780e3e8ea16,     0xbfe9d1b1f5ea80d6,     //  -0.59076,  -0.80685
+    0xbfe2dd5bcffb7616,     0xbfe9d91c7007d5a6,     //  -0.58952,  -0.80775
+    0xbfe2d333d34e9bb7,     0xbfe9e082edb42472,     //  -0.58828,  -0.80866
+    0xbfe2c908ef734e57,     0xbfe9e7e56dcb45bd,     //  -0.58704,  -0.80956
+    0xbfe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //   -0.5858,  -0.81046
+    0xbfe2b4aa787764c4,     0xbfe9f69e70ac75bc,     //  -0.58455,  -0.81135
+    0xbfe2aa76e87aeb58,     0xbfe9fdf4f13149de,     //  -0.58331,  -0.81225
+    0xbfe2a040779843fb,     0xbfea05476f967bb5,     //  -0.58206,  -0.81314
+    0xbfe2960727629ca8,     0xbfea0c95eabaf937,     //  -0.58081,  -0.81404
+    0xbfe28bcaf96d94ba,     0xbfea13e0617e4ec7,     //  -0.57956,  -0.81493
+    0xbfe2818bef4d3cba,     0xbfea1b26d2c0a75e,     //  -0.57831,  -0.81581
+    0xbfe2774a0a961612,     0xbfea22693d62ccb9,     //  -0.57706,   -0.8167
+    0xbfe26d054cdd12df,     0xbfea29a7a0462782,     //  -0.57581,  -0.81758
+    0xbfe262bdb7b795a2,     0xbfea30e1fa4cbf81,     //  -0.57455,  -0.81847
+    0xbfe258734cbb7110,     0xbfea38184a593bc6,     //   -0.5733,  -0.81935
+    0xbfe24e260d7ee7c9,     0xbfea3f4a8f4ee2d2,     //  -0.57204,  -0.82023
+    0xbfe243d5fb98ac1f,     0xbfea4678c8119ac8,     //  -0.57078,   -0.8211
+    0xbfe23983189fdfd5,     0xbfea4da2f385e997,     //  -0.56952,  -0.82198
+    0xbfe22f2d662c13e1,     0xbfea54c91090f524,     //  -0.56826,  -0.82285
+    0xbfe224d4e5d5482e,     0xbfea5beb1e188375,     //    -0.567,  -0.82372
+    0xbfe21a799933eb58,     0xbfea63091b02fae2,     //  -0.56573,  -0.82459
+    0xbfe2101b81e0da78,     0xbfea6a230637623b,     //  -0.56447,  -0.82546
+    0xbfe205baa17560d6,     0xbfea7138de9d60f5,     //   -0.5632,  -0.82632
+    0xbfe1fb56f98b37b8,     0xbfea784aa31d3f55,     //  -0.56193,  -0.82718
+    0xbfe1f0f08bbc861b,     0xbfea7f58529fe69d,     //  -0.56066,  -0.82805
+    0xbfe1e68759a3e074,     0xbfea8661ec0ee133,     //  -0.55939,   -0.8289
+    0xbfe1dc1b64dc4872,     0xbfea8d676e545ad2,     //  -0.55812,  -0.82976
+    0xbfe1d1acaf012cc2,     0xbfea9468d85b20ae,     //  -0.55685,  -0.83062
+    0xbfe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  -0.55557,  -0.83147
+    0xbfe1bcc706804467,     0xbfeaa25f5f5aee60,     //  -0.55429,  -0.83232
+    0xbfe1b250171373be,     0xbfeaa9547a2cb98e,     //  -0.55302,  -0.83317
+    0xbfe1a7d66d0516e6,     0xbfeab045787157ff,     //  -0.55174,  -0.83402
+    0xbfe19d5a09f2b9b8,     0xbfeab7325916c0d4,     //  -0.55046,  -0.83486
+    0xbfe192daef7a5386,     0xbfeabe1b1b0b8dac,     //  -0.54918,  -0.83571
+    0xbfe188591f3a46e5,     0xbfeac4ffbd3efac8,     //  -0.54789,  -0.83655
+    0xbfe17dd49ad16161,     0xbfeacbe03ea0e73b,     //  -0.54661,  -0.83739
+    0xbfe1734d63dedb49,     0xbfead2bc9e21d511,     //  -0.54532,  -0.83822
+    0xbfe168c37c025764,     0xbfead994dab2e979,     //  -0.54404,  -0.83906
+    0xbfe15e36e4dbe2bc,     0xbfeae068f345ecef,     //  -0.54275,  -0.83989
+    0xbfe153a7a00bf453,     0xbfeae738e6cd4b67,     //  -0.54146,  -0.84073
+    0xbfe14915af336ceb,     0xbfeaee04b43c1474,     //  -0.54017,  -0.84155
+    0xbfe13e8113f396c1,     0xbfeaf4cc5a85fb73,     //  -0.53888,  -0.84238
+    0xbfe133e9cfee254e,     0xbfeafb8fd89f57b6,     //  -0.53759,  -0.84321
+    0xbfe1294fe4c5350a,     0xbfeb024f2d7d24a9,     //  -0.53629,  -0.84403
+    0xbfe11eb3541b4b22,     0xbfeb090a58150200,     //    -0.535,  -0.84485
+    0xbfe114141f935545,     0xbfeb0fc1575d33db,     //   -0.5337,  -0.84567
+    0xbfe1097248d0a956,     0xbfeb16742a4ca2f5,     //   -0.5324,  -0.84649
+    0xbfe0fecdd1770537,     0xbfeb1d22cfdadcc6,     //   -0.5311,  -0.84731
+    0xbfe0f426bb2a8e7d,     0xbfeb23cd470013b4,     //   -0.5298,  -0.84812
+    0xbfe0e97d078fd23b,     0xbfeb2a738eb51f33,     //   -0.5285,  -0.84893
+    0xbfe0ded0b84bc4b5,     0xbfeb3115a5f37bf4,     //   -0.5272,  -0.84974
+    0xbfe0d421cf03c12b,     0xbfeb37b38bb54c09,     //   -0.5259,  -0.85055
+    0xbfe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //  -0.52459,  -0.85136
+    0xbfe0bebc34ff4646,     0xbfeb44e2beaf0a61,     //  -0.52328,  -0.85216
+    0xbfe0b405878f85ec,     0xbfeb4b7409de7925,     //  -0.52198,  -0.85296
+    0xbfe0a94c46b53d0b,     0xbfeb52011f805c92,     //  -0.52067,  -0.85376
+    0xbfe09e907417c5e1,     0xbfeb5889fe921405,     //  -0.51936,  -0.85456
+    0xbfe093d2115ee018,     0xbfeb5f0ea611a532,     //  -0.51804,  -0.85535
+    0xbfe089112032b08c,     0xbfeb658f14fdbc47,     //  -0.51673,  -0.85615
+    0xbfe07e4da23bc102,     0xbfeb6c0b4a55ac17,     //  -0.51542,  -0.85694
+    0xbfe073879922ffed,     0xbfeb728345196e3e,     //   -0.5141,  -0.85773
+    0xbfe068bf0691c028,     0xbfeb78f70449a34b,     //  -0.51279,  -0.85852
+    0xbfe05df3ec31b8b6,     0xbfeb7f6686e792ea,     //  -0.51147,   -0.8593
+    0xbfe053264bad0483,     0xbfeb85d1cbf52c02,     //  -0.51015,  -0.86009
+    0xbfe0485626ae221a,     0xbfeb8c38d27504e9,     //  -0.50883,  -0.86087
+    0xbfe03d837edff370,     0xbfeb929b996a5b7f,     //  -0.50751,  -0.86165
+    0xbfe032ae55edbd95,     0xbfeb98fa1fd9155e,     //  -0.50619,  -0.86242
+    0xbfe027d6ad83287e,     0xbfeb9f5464c5bffc,     //  -0.50486,   -0.8632
+    0xbfe01cfc874c3eb7,     0xbfeba5aa673590d2,     //  -0.50354,  -0.86397
+    0xbfe0121fe4f56d2c,     0xbfebabfc262e6586,     //  -0.50221,  -0.86474
+    0xbfe00740c82b82e0,     0xbfebb249a0b6c40d,     //  -0.50089,  -0.86551
+    0xbfdff8be6537615e,     0xbfebb892d5d5dad5,     //  -0.49956,  -0.86628
+    0xbfdfe2f64be7120f,     0xbfebbed7c49380ea,     //  -0.49823,  -0.86705
+    0xbfdfcd2947c1ff57,     0xbfebc5186bf8361d,     //   -0.4969,  -0.86781
+    0xbfdfb7575c24d2de,     0xbfebcb54cb0d2327,     //  -0.49557,  -0.86857
+    0xbfdfa1808c6cf7e0,     0xbfebd18ce0dc19d6,     //  -0.49423,  -0.86933
+    0xbfdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //   -0.4929,  -0.87009
+    0xbfdf75c44e26a852,     0xbfebddf02cd2b983,     //  -0.49156,  -0.87084
+    0xbfdf5fdee656cda3,     0xbfebe41b611154c1,     //  -0.49023,   -0.8716
+    0xbfdf49f4a7e97729,     0xbfebea424837de6d,     //  -0.48889,  -0.87235
+    0xbfdf3405963fd068,     0xbfebf064e15377dd,     //  -0.48755,  -0.87309
+    0xbfdf1e11b4bbc35c,     0xbfebf6832b71ec5b,     //  -0.48621,  -0.87384
+    0xbfdf081906bff7fd,     0xbfebfc9d25a1b147,     //  -0.48487,  -0.87459
+    0xbfdef21b8fafd3b5,     0xbfec02b2cef1e641,     //  -0.48353,  -0.87533
+    0xbfdedc1952ef78d5,     0xbfec08c426725549,     //  -0.48218,  -0.87607
+    0xbfdec61253e3c61b,     0xbfec0ed12b3372e9,     //  -0.48084,  -0.87681
+    0xbfdeb00695f25620,     0xbfec14d9dc465e58,     //  -0.47949,  -0.87755
+    0xbfde99f61c817eda,     0xbfec1ade38bce19b,     //  -0.47815,  -0.87828
+    0xbfde83e0eaf85113,     0xbfec20de3fa971b0,     //   -0.4768,  -0.87901
+    0xbfde6dc704be97e2,     0xbfec26d9f01f2eaf,     //  -0.47545,  -0.87974
+    0xbfde57a86d3cd824,     0xbfec2cd14931e3f1,     //   -0.4741,  -0.88047
+    0xbfde418527dc4ffa,     0xbfec32c449f60831,     //  -0.47275,   -0.8812
+    0xbfde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   -0.4714,  -0.88192
+    0xbfde1530a12779f4,     0xbfec3e9d3ee7d262,     //  -0.47004,  -0.88264
+    0xbfddfeff66a941de,     0xbfec44833141c004,     //  -0.46869,  -0.88336
+    0xbfdde8c98bf86bd6,     0xbfec4a64c7a5ac4c,     //  -0.46733,  -0.88408
+    0xbfddd28f1481cc58,     0xbfec5042012b6907,     //  -0.46598,   -0.8848
+    0xbfddbc5003b2edf8,     0xbfec561adceb743e,     //  -0.46462,  -0.88551
+    0xbfdda60c5cfa10d8,     0xbfec5bef59fef85a,     //  -0.46326,  -0.88622
+    0xbfdd8fc423c62a25,     0xbfec61bf777fcc48,     //   -0.4619,  -0.88693
+    0xbfdd79775b86e389,     0xbfec678b3488739b,     //  -0.46054,  -0.88764
+    0xbfdd632607ac9aa9,     0xbfec6d5290341eb2,     //  -0.45918,  -0.88835
+    0xbfdd4cd02ba8609c,     0xbfec7315899eaad7,     //  -0.45781,  -0.88905
+    0xbfdd3675caebf962,     0xbfec78d41fe4a267,     //  -0.45645,  -0.88975
+    0xbfdd2016e8e9db5b,     0xbfec7e8e52233cf3,     //  -0.45508,  -0.89045
+    0xbfdd09b389152ec1,     0xbfec84441f785f61,     //  -0.45372,  -0.89115
+    0xbfdcf34baee1cd21,     0xbfec89f587029c13,     //  -0.45235,  -0.89184
+    0xbfdcdcdf5dc440ce,     0xbfec8fa287e13305,     //  -0.45098,  -0.89253
+    0xbfdcc66e9931c45d,     0xbfec954b213411f5,     //  -0.44961,  -0.89322
+    0xbfdcaff964a0421d,     0xbfec9aef521bd480,     //  -0.44824,  -0.89391
+    0xbfdc997fc3865388,     0xbfeca08f19b9c449,     //  -0.44687,   -0.8946
+    0xbfdc8301b95b40c2,     0xbfeca62a772fd919,     //   -0.4455,  -0.89528
+    0xbfdc6c7f4997000a,     0xbfecabc169a0b901,     //  -0.44412,  -0.89597
+    0xbfdc55f877b23537,     0xbfecb153f02fb87d,     //  -0.44275,  -0.89665
+    0xbfdc3f6d47263129,     0xbfecb6e20a00da99,     //  -0.44137,  -0.89732
+    0xbfdc28ddbb6cf145,     0xbfecbc6bb638d10b,     //  -0.43999,    -0.898
+    0xbfdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //  -0.43862,  -0.89867
+    0xbfdbfbb1a05e0edc,     0xbfecc771c2736c09,     //  -0.43724,  -0.89935
+    0xbfdbe51517ffc0d9,     0xbfecccee20c2de9f,     //  -0.43586,  -0.90002
+    0xbfdbce744262deee,     0xbfecd2660e12c1e6,     //  -0.43448,  -0.90068
+    0xbfdbb7cf2304bd01,     0xbfecd7d9898b32f6,     //  -0.43309,  -0.90135
+    0xbfdba125bd63583e,     0xbfecdd489254fe65,     //  -0.43171,  -0.90201
+    0xbfdb8a7814fd5693,     0xbfece2b32799a060,     //  -0.43033,  -0.90267
+    0xbfdb73c62d520624,     0xbfece819488344ce,     //  -0.42894,  -0.90333
+    0xbfdb5d1009e15cc0,     0xbfeced7af43cc773,     //  -0.42756,  -0.90399
+    0xbfdb4655ae2bf757,     0xbfecf2d829f1b40e,     //  -0.42617,  -0.90464
+    0xbfdb2f971db31972,     0xbfecf830e8ce467b,     //  -0.42478,   -0.9053
+    0xbfdb18d45bf8aca6,     0xbfecfd852fff6ad4,     //  -0.42339,  -0.90595
+    0xbfdb020d6c7f4009,     0xbfed02d4feb2bd92,     //    -0.422,   -0.9066
+    0xbfdaeb4252ca07ab,     0xbfed082054168bac,     //  -0.42061,  -0.90724
+    0xbfdad473125cdc08,     0xbfed0d672f59d2b9,     //  -0.41922,  -0.90789
+    0xbfdabd9faebc3980,     0xbfed12a98fac410c,     //  -0.41782,  -0.90853
+    0xbfdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //  -0.41643,  -0.90917
+    0xbfda8fec8bf5b166,     0xbfed1d20dc40c15c,     //  -0.41503,  -0.90981
+    0xbfda790cd3dbf31a,     0xbfed2255c6e5a4e1,     //  -0.41364,  -0.91044
+    0xbfda622906a70b63,     0xbfed2786335f52fc,     //  -0.41224,  -0.91107
+    0xbfda4b4127dea1e4,     0xbfed2cb220e0ef9f,     //  -0.41084,  -0.91171
+    0xbfda34553b0afee5,     0xbfed31d98e9e503a,     //  -0.40944,  -0.91234
+    0xbfda1d6543b50ac0,     0xbfed36fc7bcbfbdc,     //  -0.40804,  -0.91296
+    0xbfda067145664d57,     0xbfed3c1ae79f2b4e,     //  -0.40664,  -0.91359
+    0xbfd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //  -0.40524,  -0.91421
+    0xbfd9d87d4207b0ab,     0xbfed464a380e7242,     //  -0.40384,  -0.91483
+    0xbfd9c17d440df9f2,     0xbfed4b5b1b187524,     //  -0.40243,  -0.91545
+    0xbfd9aa794d47c9ee,     0xbfed506779a3d2d9,     //  -0.40103,  -0.91606
+    0xbfd993716141bdfe,     0xbfed556f52e93eb1,     //  -0.39962,  -0.91668
+    0xbfd97c6583890fc2,     0xbfed5a72a6221e73,     //  -0.39822,  -0.91729
+    0xbfd96555b7ab948f,     0xbfed5f7172888a7f,     //  -0.39681,   -0.9179
+    0xbfd94e420137bce3,     0xbfed646bb7574de5,     //   -0.3954,  -0.91851
+    0xbfd9372a63bc93d7,     0xbfed696173c9e68b,     //  -0.39399,  -0.91911
+    0xbfd9200ee2c9be97,     0xbfed6e52a71c8547,     //  -0.39258,  -0.91972
+    0xbfd908ef81ef7bd1,     0xbfed733f508c0dff,     //  -0.39117,  -0.92032
+    0xbfd8f1cc44bea329,     0xbfed78276f5617c6,     //  -0.38976,  -0.92092
+    0xbfd8daa52ec8a4af,     0xbfed7d0b02b8ecf9,     //  -0.38835,  -0.92151
+    0xbfd8c37a439f884f,     0xbfed81ea09f38b63,     //  -0.38693,  -0.92211
+    0xbfd8ac4b86d5ed44,     0xbfed86c48445a450,     //  -0.38552,   -0.9227
+    0xbfd89518fbff098e,     0xbfed8b9a70ef9cb4,     //   -0.3841,  -0.92329
+    0xbfd87de2a6aea963,     0xbfed906bcf328d46,     //  -0.38268,  -0.92388
+    0xbfd866a88a792ea0,     0xbfed95389e50429b,     //  -0.38127,  -0.92447
+    0xbfd84f6aaaf3903f,     0xbfed9a00dd8b3d46,     //  -0.37985,  -0.92505
+    0xbfd838290bb359c8,     0xbfed9ec48c26b1f3,     //  -0.37843,  -0.92563
+    0xbfd820e3b04eaac4,     0xbfeda383a9668988,     //  -0.37701,  -0.92621
+    0xbfd8099a9c5c362d,     0xbfeda83e348f613b,     //  -0.37559,  -0.92679
+    0xbfd7f24dd37341e3,     0xbfedacf42ce68ab9,     //  -0.37416,  -0.92736
+    0xbfd7dafd592ba621,     0xbfedb1a591b20c38,     //  -0.37274,  -0.92794
+    0xbfd7c3a9311dcce7,     0xbfedb6526238a09b,     //  -0.37132,  -0.92851
+    0xbfd7ac515ee2b172,     0xbfedbafa9dc1b78d,     //  -0.36989,  -0.92907
+    0xbfd794f5e613dfae,     0xbfedbf9e4395759a,     //  -0.36847,  -0.92964
+    0xbfd77d96ca4b73a6,     0xbfedc43d52fcb453,     //  -0.36704,  -0.93021
+    0xbfd766340f2418f6,     0xbfedc8d7cb410260,     //  -0.36561,  -0.93077
+    0xbfd74ecdb8390a3e,     0xbfedcd6dabaca3a5,     //  -0.36418,  -0.93133
+    0xbfd73763c9261092,     0xbfedd1fef38a915a,     //  -0.36276,  -0.93188
+    0xbfd71ff6458782ec,     0xbfedd68ba2267a25,     //  -0.36133,  -0.93244
+    0xbfd7088530fa459e,     0xbfeddb13b6ccc23d,     //   -0.3599,  -0.93299
+    0xbfd6f1108f1bc9c5,     0xbfeddf9730ca837b,     //  -0.35846,  -0.93354
+    0xbfd6d998638a0cb5,     0xbfede4160f6d8d81,     //  -0.35703,  -0.93409
+    0xbfd6c21cb1e39771,     0xbfede890520465ce,     //   -0.3556,  -0.93464
+    0xbfd6aa9d7dc77e16,     0xbfeded05f7de47da,     //  -0.35416,  -0.93518
+    0xbfd6931acad55f51,     0xbfedf177004b2534,     //  -0.35273,  -0.93573
+    0xbfd67b949cad63ca,     0xbfedf5e36a9ba59c,     //  -0.35129,  -0.93627
+    0xbfd6640af6f03d9e,     0xbfedfa4b3621271d,     //  -0.34986,   -0.9368
+    0xbfd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //  -0.34842,  -0.93734
+    0xbfd634ed533be58e,     0xbfee030cee1435b8,     //  -0.34698,  -0.93787
+    0xbfd61d595c88c203,     0xbfee0766d9280f54,     //  -0.34554,   -0.9384
+    0xbfd605c1fcc88f63,     0xbfee0bbc22bd8349,     //   -0.3441,  -0.93893
+    0xbfd5ee27379ea693,     0xbfee100cca2980ac,     //  -0.34266,  -0.93946
+    0xbfd5d68910aee686,     0xbfee1458cec1ad83,     //  -0.34122,  -0.93998
+    0xbfd5bee78b9db3b6,     0xbfee18a02fdc66d9,     //  -0.33978,  -0.94051
+    0xbfd5a742ac0ff78d,     0xbfee1ce2ecd0c0d8,     //  -0.33833,  -0.94103
+    0xbfd58f9a75ab1fdd,     0xbfee212104f686e5,     //  -0.33689,  -0.94154
+    0xbfd577eeec151e47,     0xbfee255a77a63bb8,     //  -0.33545,  -0.94206
+    0xbfd5604012f467b4,     0xbfee298f4439197a,     //    -0.334,  -0.94257
+    0xbfd5488dedeff3be,     0xbfee2dbf6a0911d9,     //  -0.33255,  -0.94308
+    0xbfd530d880af3c24,     0xbfee31eae870ce25,     //  -0.33111,  -0.94359
+    0xbfd5191fceda3c35,     0xbfee3611becbaf69,     //  -0.32966,   -0.9441
+    0xbfd50163dc197047,     0xbfee3a33ec75ce85,     //  -0.32821,   -0.9446
+    0xbfd4e9a4ac15d520,     0xbfee3e5170cbfc46,     //  -0.32676,  -0.94511
+    0xbfd4d1e24278e76a,     0xbfee426a4b2bc17e,     //  -0.32531,  -0.94561
+    0xbfd4ba1ca2eca31c,     0xbfee467e7af35f23,     //  -0.32386,  -0.94611
+    0xbfd4a253d11b82f3,     0xbfee4a8dff81ce5e,     //  -0.32241,   -0.9466
+    0xbfd48a87d0b07fd7,     0xbfee4e98d836c0af,     //  -0.32096,  -0.94709
+    0xbfd472b8a5571054,     0xbfee529f04729ffc,     //   -0.3195,  -0.94759
+    0xbfd45ae652bb2800,     0xbfee56a083968eb1,     //  -0.31805,  -0.94807
+    0xbfd44310dc8936f0,     0xbfee5a9d550467d3,     //  -0.31659,  -0.94856
+    0xbfd42b38466e2928,     0xbfee5e95781ebf1c,     //  -0.31514,  -0.94905
+    0xbfd4135c94176602,     0xbfee6288ec48e112,     //  -0.31368,  -0.94953
+    0xbfd3fb7dc932cfa4,     0xbfee6677b0e6d31e,     //  -0.31222,  -0.95001
+    0xbfd3e39be96ec271,     0xbfee6a61c55d53a7,     //  -0.31077,  -0.95049
+    0xbfd3cbb6f87a146e,     0xbfee6e472911da27,     //  -0.30931,  -0.95096
+    0xbfd3b3cefa0414b7,     0xbfee7227db6a9744,     //  -0.30785,  -0.95144
+    0xbfd39be3f1bc8aef,     0xbfee7603dbce74e9,     //  -0.30639,  -0.95191
+    0xbfd383f5e353b6aa,     0xbfee79db29a5165a,     //  -0.30493,  -0.95238
+    0xbfd36c04d27a4edf,     0xbfee7dadc456d850,     //  -0.30347,  -0.95284
+    0xbfd35410c2e18152,     0xbfee817bab4cd10d,     //  -0.30201,  -0.95331
+    0xbfd33c19b83af207,     0xbfee8544ddf0d075,     //  -0.30054,  -0.95377
+    0xbfd3241fb638baaf,     0xbfee89095bad6025,     //  -0.29908,  -0.95423
+    0xbfd30c22c08d6a13,     0xbfee8cc923edc388,     //  -0.29762,  -0.95469
+    0xbfd2f422daec0386,     0xbfee9084361df7f3,     //  -0.29615,  -0.95514
+    0xbfd2dc200907fe51,     0xbfee943a91aab4b4,     //  -0.29469,  -0.95559
+    0xbfd2c41a4e954520,     0xbfee97ec36016b30,     //  -0.29322,  -0.95605
+    0xbfd2ac11af483572,     0xbfee9b99229046f8,     //  -0.29175,  -0.95649
+    0xbfd294062ed59f05,     0xbfee9f4156c62dda,     //  -0.29028,  -0.95694
+    0xbfd27bf7d0f2c346,     0xbfeea2e4d212c000,     //  -0.28882,  -0.95738
+    0xbfd263e6995554ba,     0xbfeea68393e65800,     //  -0.28735,  -0.95783
+    0xbfd24bd28bb37672,     0xbfeeaa1d9bb20af3,     //  -0.28588,  -0.95827
+    0xbfd233bbabc3bb72,     0xbfeeadb2e8e7a88e,     //  -0.28441,   -0.9587
+    0xbfd21ba1fd3d2623,     0xbfeeb1437af9bb34,     //  -0.28294,  -0.95914
+    0xbfd2038583d727bd,     0xbfeeb4cf515b8811,     //  -0.28146,  -0.95957
+    0xbfd1eb6643499fbb,     0xbfeeb8566b810f2a,     //  -0.27999,     -0.96
+    0xbfd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //  -0.27852,  -0.96043
+    0xbfd1bb1f7b999480,     0xbfeebf5668eaf2ef,     //  -0.27705,  -0.96086
+    0xbfd1a2f7fbe8f243,     0xbfeec2cf4b1af6b2,     //  -0.27557,  -0.96128
+    0xbfd18acdc3f4873a,     0xbfeec6436ee60309,     //   -0.2741,   -0.9617
+    0xbfd172a0d7765177,     0xbfeec9b2d3c3bf84,     //  -0.27262,  -0.96212
+    0xbfd15a713a28b9d9,     0xbfeecd1d792c8f10,     //  -0.27115,  -0.96254
+    0xbfd1423eefc69378,     0xbfeed0835e999009,     //  -0.26967,  -0.96295
+    0xbfd12a09fc0b1b12,     0xbfeed3e483849c51,     //  -0.26819,  -0.96337
+    0xbfd111d262b1f677,     0xbfeed740e7684963,     //  -0.26671,  -0.96378
+    0xbfd0f998277733f7,     0xbfeeda9889bfe86a,     //  -0.26523,  -0.96418
+    0xbfd0e15b4e1749cd,     0xbfeeddeb6a078651,     //  -0.26375,  -0.96459
+    0xbfd0c91bda4f158d,     0xbfeee13987bbebdc,     //  -0.26227,  -0.96499
+    0xbfd0b0d9cfdbdb90,     0xbfeee482e25a9dbc,     //  -0.26079,  -0.96539
+    0xbfd09895327b465e,     0xbfeee7c77961dc9e,     //  -0.25931,  -0.96579
+    0xbfd0804e05eb661e,     0xbfeeeb074c50a544,     //  -0.25783,  -0.96619
+    0xbfd068044deab002,     0xbfeeee425aa6b09a,     //  -0.25635,  -0.96658
+    0xbfd04fb80e37fdae,     0xbfeef178a3e473c2,     //  -0.25487,  -0.96698
+    0xbfd037694a928cac,     0xbfeef4aa278b2032,     //  -0.25338,  -0.96737
+    0xbfd01f1806b9fdd2,     0xbfeef7d6e51ca3c0,     //   -0.2519,  -0.96775
+    0xbfd006c4466e54af,     0xbfeefafedc1ba8b7,     //  -0.25041,  -0.96814
+    0xbfcfdcdc1adfedf8,     0xbfeefe220c0b95ec,     //  -0.24893,  -0.96852
+    0xbfcfac2abeff57ff,     0xbfef014074708ed3,     //  -0.24744,   -0.9689
+    0xbfcf7b7480bd3801,     0xbfef045a14cf738c,     //  -0.24596,  -0.96928
+    0xbfcf4ab9679c9f5c,     0xbfef076eecade0fa,     //  -0.24447,  -0.96966
+    0xbfcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  -0.24298,  -0.97003
+    0xbfcee934c2d006c7,     0xbfef0d8a410379c5,     //  -0.24149,   -0.9704
+    0xbfceb86b462de348,     0xbfef1090bc898f5f,     //     -0.24,  -0.97077
+    0xbfce879d0cc0fdaf,     0xbfef13926dad024e,     //  -0.23851,  -0.97114
+    0xbfce56ca1e101a1b,     0xbfef168f53f7205d,     //  -0.23702,   -0.9715
+    0xbfce25f281a2b684,     0xbfef19876ef1f486,     //  -0.23553,  -0.97187
+    0xbfcdf5163f01099a,     0xbfef1c7abe284708,     //  -0.23404,  -0.97223
+    0xbfcdc4355db40195,     0xbfef1f6941259d7a,     //  -0.23255,  -0.97258
+    0xbfcd934fe5454311,     0xbfef2252f7763ada,     //  -0.23106,  -0.97294
+    0xbfcd6265dd3f27e3,     0xbfef2537e0a71f9f,     //  -0.22957,  -0.97329
+    0xbfcd31774d2cbdee,     0xbfef2817fc4609ce,     //  -0.22807,  -0.97364
+    0xbfcd00843c99c5f9,     0xbfef2af349e17507,     //  -0.22658,  -0.97399
+    0xbfcccf8cb312b286,     0xbfef2dc9c9089a9d,     //  -0.22508,  -0.97434
+    0xbfcc9e90b824a6a9,     0xbfef309b794b719f,     //  -0.22359,  -0.97468
+    0xbfcc6d90535d74dc,     0xbfef33685a3aaef0,     //  -0.22209,  -0.97503
+    0xbfcc3c8b8c4b9dd7,     0xbfef36306b67c556,     //   -0.2206,  -0.97536
+    0xbfcc0b826a7e4f63,     0xbfef38f3ac64e589,     //   -0.2191,   -0.9757
+    0xbfcbda74f5856330,     0xbfef3bb21cc4fe47,     //   -0.2176,  -0.97604
+    0xbfcba96334f15dad,     0xbfef3e6bbc1bbc65,     //  -0.21611,  -0.97637
+    0xbfcb784d30536cda,     0xbfef412089fd8adc,     //  -0.21461,   -0.9767
+    0xbfcb4732ef3d6722,     0xbfef43d085ff92dd,     //  -0.21311,  -0.97703
+    0xbfcb16147941ca2a,     0xbfef467bafb7bbe0,     //  -0.21161,  -0.97735
+    0xbfcae4f1d5f3b9ab,     0xbfef492206bcabb4,     //  -0.21011,  -0.97768
+    0xbfcab3cb0ce6fe44,     0xbfef4bc38aa5c694,     //  -0.20861,    -0.978
+    0xbfca82a025b00451,     0xbfef4e603b0b2f2d,     //  -0.20711,  -0.97832
+    0xbfca517127e3dabc,     0xbfef50f81785c6b9,     //  -0.20561,  -0.97863
+    0xbfca203e1b1831da,     0xbfef538b1faf2d07,     //  -0.20411,  -0.97895
+    0xbfc9ef0706e35a35,     0xbfef56195321c090,     //  -0.20261,  -0.97926
+    0xbfc9bdcbf2dc4366,     0xbfef58a2b1789e84,     //   -0.2011,  -0.97957
+    0xbfc98c8ce69a7aec,     0xbfef5b273a4fa2d9,     //   -0.1996,  -0.97988
+    0xbfc95b49e9b62af9,     0xbfef5da6ed43685d,     //   -0.1981,  -0.98018
+    0xbfc92a0303c8194f,     0xbfef6021c9f148c2,     //  -0.19659,  -0.98048
+    0xbfc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  -0.19509,  -0.98079
+    0xbfc8c7699b34ca7e,     0xbfef6508fef47bd5,     //  -0.19359,  -0.98108
+    0xbfc8961727c41804,     0xbfef677556883cee,     //  -0.19208,  -0.98138
+    0xbfc864c0e9b2b6cf,     0xbfef69dcd652f5de,     //  -0.19057,  -0.98167
+    0xbfc83366e89c64c5,     0xbfef6c3f7df5bbb7,     //  -0.18907,  -0.98196
+    0xbfc802092c1d744b,     0xbfef6e9d4d1262ca,     //  -0.18756,  -0.98225
+    0xbfc7d0a7bbd2cb1b,     0xbfef70f6434b7eb7,     //  -0.18606,  -0.98254
+    0xbfc79f429f59e11d,     0xbfef734a60446279,     //  -0.18455,  -0.98282
+    0xbfc76dd9de50bf31,     0xbfef7599a3a12077,     //  -0.18304,  -0.98311
+    0xbfc73c6d8055fe0a,     0xbfef77e40d068a90,     //  -0.18153,  -0.98339
+    0xbfc70afd8d08c4ff,     0xbfef7a299c1a322a,     //  -0.18002,  -0.98366
+    0xbfc6d98a0c08c8da,     0xbfef7c6a50826840,     //  -0.17851,  -0.98394
+    0xbfc6a81304f64ab2,     0xbfef7ea629e63d6e,     //    -0.177,  -0.98421
+    0xbfc676987f7216b8,     0xbfef80dd27ed8204,     //  -0.17549,  -0.98448
+    0xbfc6451a831d830d,     0xbfef830f4a40c60c,     //  -0.17398,  -0.98475
+    0xbfc61399179a6e94,     0xbfef853c9089595e,     //  -0.17247,  -0.98501
+    0xbfc5e214448b3fc6,     0xbfef8764fa714ba9,     //  -0.17096,  -0.98528
+    0xbfc5b08c1192e381,     0xbfef898887a36c84,     //  -0.16945,  -0.98554
+    0xbfc57f008654cbde,     0xbfef8ba737cb4b78,     //  -0.16794,   -0.9858
+    0xbfc54d71aa74ef02,     0xbfef8dc10a95380d,     //  -0.16643,  -0.98605
+    0xbfc51bdf8597c5f2,     0xbfef8fd5ffae41db,     //  -0.16491,  -0.98631
+    0xbfc4ea4a1f624b61,     0xbfef91e616c43891,     //   -0.1634,  -0.98656
+    0xbfc4b8b17f79fa88,     0xbfef93f14f85ac08,     //  -0.16189,  -0.98681
+    0xbfc48715ad84cdf5,     0xbfef95f7a9a1ec47,     //  -0.16037,  -0.98706
+    0xbfc45576b1293e5a,     0xbfef97f924c9099b,     //  -0.15886,   -0.9873
+    0xbfc423d4920e4166,     0xbfef99f5c0abd496,     //  -0.15734,  -0.98754
+    0xbfc3f22f57db4893,     0xbfef9bed7cfbde29,     //  -0.15583,  -0.98778
+    0xbfc3c0870a383ff6,     0xbfef9de0596b77a3,     //  -0.15431,  -0.98802
+    0xbfc38edbb0cd8d14,     0xbfef9fce55adb2c8,     //   -0.1528,  -0.98826
+    0xbfc35d2d53440db2,     0xbfefa1b7717661d5,     //  -0.15128,  -0.98849
+    0xbfc32b7bf94516a7,     0xbfefa39bac7a1791,     //  -0.14976,  -0.98872
+    0xbfc2f9c7aa7a72af,     0xbfefa57b066e2754,     //  -0.14825,  -0.98895
+    0xbfc2c8106e8e613a,     0xbfefa7557f08a517,     //  -0.14673,  -0.98918
+    0xbfc296564d2b953e,     0xbfefa92b1600657c,     //  -0.14521,   -0.9894
+    0xbfc264994dfd340a,     0xbfefaafbcb0cfddc,     //   -0.1437,  -0.98962
+    0xbfc232d978aed413,     0xbfefacc79de6c44f,     //  -0.14218,  -0.98984
+    0xbfc20116d4ec7bce,     0xbfefae8e8e46cfbb,     //  -0.14066,  -0.99006
+    0xbfc1cf516a62a077,     0xbfefb0509be6f7db,     //  -0.13914,  -0.99027
+    0xbfc19d8940be24e7,     0xbfefb20dc681d54d,     //  -0.13762,  -0.99049
+    0xbfc16bbe5fac5865,     0xbfefb3c60dd2c199,     //   -0.1361,   -0.9907
+    0xbfc139f0cedaf576,     0xbfefb5797195d741,     //  -0.13458,   -0.9909
+    0xbfc1082095f820b0,     0xbfefb727f187f1c7,     //  -0.13306,  -0.99111
+    0xbfc0d64dbcb26786,     0xbfefb8d18d66adb7,     //  -0.13154,  -0.99131
+    0xbfc0a4784ab8bf1d,     0xbfefba7644f068b5,     //  -0.13002,  -0.99151
+    0xbfc072a047ba831d,     0xbfefbc1617e44186,     //   -0.1285,  -0.99171
+    0xbfc040c5bb67747e,     0xbfefbdb106021816,     //  -0.12698,  -0.99191
+    0xbfc00ee8ad6fb85b,     0xbfefbf470f0a8d88,     //  -0.12545,   -0.9921
+    0xbfbfba124b07ad85,     0xbfefc0d832bf043a,     //  -0.12393,  -0.99229
+    0xbfbf564e56a9730e,     0xbfefc26470e19fd3,     //  -0.12241,  -0.99248
+    0xbfbef2858d27561b,     0xbfefc3ebc935454c,     //  -0.12089,  -0.99267
+    0xbfbe8eb7fde4aa3e,     0xbfefc56e3b7d9af6,     //  -0.11937,  -0.99285
+    0xbfbe2ae5b8457f77,     0xbfefc6ebc77f0887,     //  -0.11784,  -0.99303
+    0xbfbdc70ecbae9fc8,     0xbfefc8646cfeb721,     //  -0.11632,  -0.99321
+    0xbfbd633347858ce4,     0xbfefc9d82bc2915e,     //  -0.11479,  -0.99339
+    0xbfbcff533b307dc1,     0xbfefcb4703914354,     //  -0.11327,  -0.99356
+    0xbfbc9b6eb6165c42,     0xbfefccb0f4323aa3,     //  -0.11175,  -0.99374
+    0xbfbc3785c79ec2d5,     0xbfefce15fd6da67b,     //  -0.11022,  -0.99391
+    0xbfbbd3987f31fa0e,     0xbfefcf761f0c77a3,     //   -0.1087,  -0.99407
+    0xbfbb6fa6ec38f64c,     0xbfefd0d158d86087,     //  -0.10717,  -0.99424
+    0xbfbb0bb11e1d5559,     0xbfefd227aa9bd53b,     //  -0.10565,   -0.9944
+    0xbfbaa7b724495c04,     0xbfefd37914220b84,     //  -0.10412,  -0.99456
+    0xbfba43b90e27f3c4,     0xbfefd4c59536fae4,     //   -0.1026,  -0.99472
+    0xbfb9dfb6eb24a85c,     0xbfefd60d2da75c9e,     //  -0.10107,  -0.99488
+    0xbfb97bb0caaba56f,     0xbfefd74fdd40abbf,     // -0.099544,  -0.99503
+    0xbfb917a6bc29b42c,     0xbfefd88da3d12526,     // -0.098017,  -0.99518
+    0xbfb8b398cf0c38e0,     0xbfefd9c68127c78c,     //  -0.09649,  -0.99533
+    0xbfb84f8712c130a0,     0xbfefdafa7514538c,     // -0.094963,  -0.99548
+    0xbfb7eb7196b72ee4,     0xbfefdc297f674ba9,     // -0.093436,  -0.99563
+    0xbfb787586a5d5b21,     0xbfefdd539ff1f456,     // -0.091909,  -0.99577
+    0xbfb7233b9d236e71,     0xbfefde78d68653fd,     // -0.090381,  -0.99591
+    0xbfb6bf1b3e79b129,     0xbfefdf9922f73307,     // -0.088854,  -0.99604
+    0xbfb65af75dd0f87b,     0xbfefe0b485181be3,     // -0.087326,  -0.99618
+    0xbfb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     // -0.085797,  -0.99631
+    0xbfb592a554489bc8,     0xbfefe2dc89bbff08,     // -0.084269,  -0.99644
+    0xbfb52e774a4d4d0a,     0xbfefe3e92be9d886,     //  -0.08274,  -0.99657
+    0xbfb4ca45fc1ba8b6,     0xbfefe4f0e31d7a4a,     // -0.081211,   -0.9967
+    0xbfb4661179272096,     0xbfefe5f3af2e3940,     // -0.079682,  -0.99682
+    0xbfb401d9d0e3a507,     0xbfefe6f18ff42c84,     // -0.078153,  -0.99694
+    0xbfb39d9f12c5a299,     0xbfefe7ea85482d60,     // -0.076624,  -0.99706
+    0xbfb339614e41ffa5,     0xbfefe8de8f03d75c,     // -0.075094,  -0.99718
+    0xbfb2d52092ce19f6,     0xbfefe9cdad01883a,     // -0.073565,  -0.99729
+    0xbfb270dcefdfc45b,     0xbfefeab7df1c6005,     // -0.072035,   -0.9974
+    0xbfb20c9674ed444c,     0xbfefeb9d2530410f,     // -0.070505,  -0.99751
+    0xbfb1a84d316d4f8a,     0xbfefec7d7f19cffc,     // -0.068974,  -0.99762
+    0xbfb1440134d709b2,     0xbfefed58ecb673c4,     // -0.067444,  -0.99772
+    0xbfb0dfb28ea201e6,     0xbfefee2f6de455ba,     // -0.065913,  -0.99783
+    0xbfb07b614e463064,     0xbfefef0102826191,     // -0.064383,  -0.99793
+    0xbfb0170d833bf421,     0xbfefefcdaa704562,     // -0.062852,  -0.99802
+    0xbfaf656e79f820e0,     0xbfeff095658e71ad,     // -0.061321,  -0.99812
+    0xbfae9cbd15ff5527,     0xbfeff15833be1965,     //  -0.05979,  -0.99821
+    0xbfadd406f9808ec8,     0xbfeff21614e131ed,     // -0.058258,   -0.9983
+    0xbfad0b4c436f91d0,     0xbfeff2cf08da7321,     // -0.056727,  -0.99839
+    0xbfac428d12c0d7e3,     0xbfeff3830f8d575c,     // -0.055195,  -0.99848
+    0xbfab79c986698b78,     0xbfeff43228de1b77,     // -0.053664,  -0.99856
+    0xbfaab101bd5f8317,     0xbfeff4dc54b1bed3,     // -0.052132,  -0.99864
+    0xbfa9e835d6993c87,     0xbfeff58192ee0358,     //   -0.0506,  -0.99872
+    0xbfa91f65f10dd814,     0xbfeff621e3796d7e,     // -0.049068,   -0.9988
+    0xbfa856922bb513c1,     0xbfeff6bd463b444d,     // -0.047535,  -0.99887
+    0xbfa78dbaa5874685,     0xbfeff753bb1b9164,     // -0.046003,  -0.99894
+    0xbfa6c4df7d7d5b84,     0xbfeff7e5420320f9,     // -0.044471,  -0.99901
+    0xbfa5fc00d290cd43,     0xbfeff871dadb81df,     // -0.042938,  -0.99908
+    0xbfa5331ec3bba0eb,     0xbfeff8f9858f058b,     // -0.041406,  -0.99914
+    0xbfa46a396ff86179,     0xbfeff97c4208c014,     // -0.039873,   -0.9992
+    0xbfa3a150f6421afc,     0xbfeff9fa10348837,     //  -0.03834,  -0.99926
+    0xbfa2d865759455cd,     0xbfeffa72effef75d,     // -0.036807,  -0.99932
+    0xbfa20f770ceb11c6,     0xbfeffae6e1556998,     // -0.035274,  -0.99938
+    0xbfa14685db42c17e,     0xbfeffb55e425fdae,     // -0.033741,  -0.99943
+    0xbfa07d91ff984580,     0xbfeffbbff85f9515,     // -0.032208,  -0.99948
+    0xbf9f693731d1cf01,     0xbfeffc251df1d3f8,     // -0.030675,  -0.99953
+    0xbf9dd7458c64ab39,     0xbfeffc8554cd213a,     // -0.029142,  -0.99958
+    0xbf9c454f4ce53b1c,     0xbfeffce09ce2a679,     // -0.027608,  -0.99962
+    0xbf9ab354b1504fca,     0xbfeffd36f624500c,     // -0.026075,  -0.99966
+    0xbf992155f7a3667e,     0xbfeffd886084cd0d,     // -0.024541,   -0.9997
+    0xbf978f535ddc9f03,     0xbfeffdd4dbf78f52,     // -0.023008,  -0.99974
+    0xbf95fd4d21fab226,     0xbfeffe1c6870cb77,     // -0.021474,  -0.99977
+    0xbf946b4381fce81c,     0xbfeffe5f05e578db,     //  -0.01994,   -0.9998
+    0xbf92d936bbe30efd,     0xbfeffe9cb44b51a1,     // -0.018407,  -0.99983
+    0xbf9147270dad7132,     0xbfeffed57398d2b7,     // -0.016873,  -0.99986
+    0xbf8f6a296ab997ca,     0xbfefff0943c53bd1,     // -0.015339,  -0.99988
+    0xbf8c45ffe1e48ad9,     0xbfefff3824c88f6f,     // -0.013805,   -0.9999
+    0xbf8921d1fcdec784,     0xbfefff62169b92db,     // -0.012272,  -0.99992
+    0xbf85fda037ac05e0,     0xbfefff871937ce2f,     // -0.010738,  -0.99994
+    0xbf82d96b0e509703,     0xbfefffa72c978c4f,     //-0.0092038,  -0.99996
+    0xbf7f6a65f9a2a3c5,     0xbfefffc250b5daef,     //-0.0076698,  -0.99997
+    0xbf7921f0fe670071,     0xbfefffd8858e8a92,     //-0.0061359,  -0.99998
+    0xbf72d97822f996bc,     0xbfefffe9cb1e2e8d,     //-0.0046019,  -0.99999
+    0xbf6921f8becca4ba,     0xbfeffff621621d02,     // -0.003068,        -1
+    0xbf5921faaee6472d,     0xbfeffffd88586ee6,     // -0.001534,        -1
+    0x0000000000000000,     0xbff0000000000000,     //         0,        -1
+    0x3f5921faaee6472d,     0xbfeffffd88586ee6,     //  0.001534,        -1
+    0x3f6921f8becca4ba,     0xbfeffff621621d02,     //  0.003068,        -1
+    0x3f72d97822f996bc,     0xbfefffe9cb1e2e8d,     // 0.0046019,  -0.99999
+    0x3f7921f0fe670071,     0xbfefffd8858e8a92,     // 0.0061359,  -0.99998
+    0x3f7f6a65f9a2a3c5,     0xbfefffc250b5daef,     // 0.0076698,  -0.99997
+    0x3f82d96b0e509703,     0xbfefffa72c978c4f,     // 0.0092038,  -0.99996
+    0x3f85fda037ac05e0,     0xbfefff871937ce2f,     //  0.010738,  -0.99994
+    0x3f8921d1fcdec784,     0xbfefff62169b92db,     //  0.012272,  -0.99992
+    0x3f8c45ffe1e48ad9,     0xbfefff3824c88f6f,     //  0.013805,   -0.9999
+    0x3f8f6a296ab997ca,     0xbfefff0943c53bd1,     //  0.015339,  -0.99988
+    0x3f9147270dad7132,     0xbfeffed57398d2b7,     //  0.016873,  -0.99986
+    0x3f92d936bbe30efd,     0xbfeffe9cb44b51a1,     //  0.018407,  -0.99983
+    0x3f946b4381fce81c,     0xbfeffe5f05e578db,     //   0.01994,   -0.9998
+    0x3f95fd4d21fab226,     0xbfeffe1c6870cb77,     //  0.021474,  -0.99977
+    0x3f978f535ddc9f03,     0xbfeffdd4dbf78f52,     //  0.023008,  -0.99974
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     //  0.024541,   -0.9997
+    0x3f9ab354b1504fca,     0xbfeffd36f624500c,     //  0.026075,  -0.99966
+    0x3f9c454f4ce53b1c,     0xbfeffce09ce2a679,     //  0.027608,  -0.99962
+    0x3f9dd7458c64ab39,     0xbfeffc8554cd213a,     //  0.029142,  -0.99958
+    0x3f9f693731d1cf01,     0xbfeffc251df1d3f8,     //  0.030675,  -0.99953
+    0x3fa07d91ff984580,     0xbfeffbbff85f9515,     //  0.032208,  -0.99948
+    0x3fa14685db42c17e,     0xbfeffb55e425fdae,     //  0.033741,  -0.99943
+    0x3fa20f770ceb11c6,     0xbfeffae6e1556998,     //  0.035274,  -0.99938
+    0x3fa2d865759455cd,     0xbfeffa72effef75d,     //  0.036807,  -0.99932
+    0x3fa3a150f6421afc,     0xbfeff9fa10348837,     //   0.03834,  -0.99926
+    0x3fa46a396ff86179,     0xbfeff97c4208c014,     //  0.039873,   -0.9992
+    0x3fa5331ec3bba0eb,     0xbfeff8f9858f058b,     //  0.041406,  -0.99914
+    0x3fa5fc00d290cd43,     0xbfeff871dadb81df,     //  0.042938,  -0.99908
+    0x3fa6c4df7d7d5b84,     0xbfeff7e5420320f9,     //  0.044471,  -0.99901
+    0x3fa78dbaa5874685,     0xbfeff753bb1b9164,     //  0.046003,  -0.99894
+    0x3fa856922bb513c1,     0xbfeff6bd463b444d,     //  0.047535,  -0.99887
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     //  0.049068,   -0.9988
+    0x3fa9e835d6993c87,     0xbfeff58192ee0358,     //    0.0506,  -0.99872
+    0x3faab101bd5f8317,     0xbfeff4dc54b1bed3,     //  0.052132,  -0.99864
+    0x3fab79c986698b78,     0xbfeff43228de1b77,     //  0.053664,  -0.99856
+    0x3fac428d12c0d7e3,     0xbfeff3830f8d575c,     //  0.055195,  -0.99848
+    0x3fad0b4c436f91d0,     0xbfeff2cf08da7321,     //  0.056727,  -0.99839
+    0x3fadd406f9808ec8,     0xbfeff21614e131ed,     //  0.058258,   -0.9983
+    0x3fae9cbd15ff5527,     0xbfeff15833be1965,     //   0.05979,  -0.99821
+    0x3faf656e79f820e0,     0xbfeff095658e71ad,     //  0.061321,  -0.99812
+    0x3fb0170d833bf421,     0xbfefefcdaa704562,     //  0.062852,  -0.99802
+    0x3fb07b614e463064,     0xbfefef0102826191,     //  0.064383,  -0.99793
+    0x3fb0dfb28ea201e6,     0xbfefee2f6de455ba,     //  0.065913,  -0.99783
+    0x3fb1440134d709b2,     0xbfefed58ecb673c4,     //  0.067444,  -0.99772
+    0x3fb1a84d316d4f8a,     0xbfefec7d7f19cffc,     //  0.068974,  -0.99762
+    0x3fb20c9674ed444c,     0xbfefeb9d2530410f,     //  0.070505,  -0.99751
+    0x3fb270dcefdfc45b,     0xbfefeab7df1c6005,     //  0.072035,   -0.9974
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     //  0.073565,  -0.99729
+    0x3fb339614e41ffa5,     0xbfefe8de8f03d75c,     //  0.075094,  -0.99718
+    0x3fb39d9f12c5a299,     0xbfefe7ea85482d60,     //  0.076624,  -0.99706
+    0x3fb401d9d0e3a507,     0xbfefe6f18ff42c84,     //  0.078153,  -0.99694
+    0x3fb4661179272096,     0xbfefe5f3af2e3940,     //  0.079682,  -0.99682
+    0x3fb4ca45fc1ba8b6,     0xbfefe4f0e31d7a4a,     //  0.081211,   -0.9967
+    0x3fb52e774a4d4d0a,     0xbfefe3e92be9d886,     //   0.08274,  -0.99657
+    0x3fb592a554489bc8,     0xbfefe2dc89bbff08,     //  0.084269,  -0.99644
+    0x3fb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     //  0.085797,  -0.99631
+    0x3fb65af75dd0f87b,     0xbfefe0b485181be3,     //  0.087326,  -0.99618
+    0x3fb6bf1b3e79b129,     0xbfefdf9922f73307,     //  0.088854,  -0.99604
+    0x3fb7233b9d236e71,     0xbfefde78d68653fd,     //  0.090381,  -0.99591
+    0x3fb787586a5d5b21,     0xbfefdd539ff1f456,     //  0.091909,  -0.99577
+    0x3fb7eb7196b72ee4,     0xbfefdc297f674ba9,     //  0.093436,  -0.99563
+    0x3fb84f8712c130a0,     0xbfefdafa7514538c,     //  0.094963,  -0.99548
+    0x3fb8b398cf0c38e0,     0xbfefd9c68127c78c,     //   0.09649,  -0.99533
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     //  0.098017,  -0.99518
+    0x3fb97bb0caaba56f,     0xbfefd74fdd40abbf,     //  0.099544,  -0.99503
+    0x3fb9dfb6eb24a85c,     0xbfefd60d2da75c9e,     //   0.10107,  -0.99488
+    0x3fba43b90e27f3c4,     0xbfefd4c59536fae4,     //    0.1026,  -0.99472
+    0x3fbaa7b724495c04,     0xbfefd37914220b84,     //   0.10412,  -0.99456
+    0x3fbb0bb11e1d5559,     0xbfefd227aa9bd53b,     //   0.10565,   -0.9944
+    0x3fbb6fa6ec38f64c,     0xbfefd0d158d86087,     //   0.10717,  -0.99424
+    0x3fbbd3987f31fa0e,     0xbfefcf761f0c77a3,     //    0.1087,  -0.99407
+    0x3fbc3785c79ec2d5,     0xbfefce15fd6da67b,     //   0.11022,  -0.99391
+    0x3fbc9b6eb6165c42,     0xbfefccb0f4323aa3,     //   0.11175,  -0.99374
+    0x3fbcff533b307dc1,     0xbfefcb4703914354,     //   0.11327,  -0.99356
+    0x3fbd633347858ce4,     0xbfefc9d82bc2915e,     //   0.11479,  -0.99339
+    0x3fbdc70ecbae9fc8,     0xbfefc8646cfeb721,     //   0.11632,  -0.99321
+    0x3fbe2ae5b8457f77,     0xbfefc6ebc77f0887,     //   0.11784,  -0.99303
+    0x3fbe8eb7fde4aa3e,     0xbfefc56e3b7d9af6,     //   0.11937,  -0.99285
+    0x3fbef2858d27561b,     0xbfefc3ebc935454c,     //   0.12089,  -0.99267
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     //   0.12241,  -0.99248
+    0x3fbfba124b07ad85,     0xbfefc0d832bf043a,     //   0.12393,  -0.99229
+    0x3fc00ee8ad6fb85b,     0xbfefbf470f0a8d88,     //   0.12545,   -0.9921
+    0x3fc040c5bb67747e,     0xbfefbdb106021816,     //   0.12698,  -0.99191
+    0x3fc072a047ba831d,     0xbfefbc1617e44186,     //    0.1285,  -0.99171
+    0x3fc0a4784ab8bf1d,     0xbfefba7644f068b5,     //   0.13002,  -0.99151
+    0x3fc0d64dbcb26786,     0xbfefb8d18d66adb7,     //   0.13154,  -0.99131
+    0x3fc1082095f820b0,     0xbfefb727f187f1c7,     //   0.13306,  -0.99111
+    0x3fc139f0cedaf576,     0xbfefb5797195d741,     //   0.13458,   -0.9909
+    0x3fc16bbe5fac5865,     0xbfefb3c60dd2c199,     //    0.1361,   -0.9907
+    0x3fc19d8940be24e7,     0xbfefb20dc681d54d,     //   0.13762,  -0.99049
+    0x3fc1cf516a62a077,     0xbfefb0509be6f7db,     //   0.13914,  -0.99027
+    0x3fc20116d4ec7bce,     0xbfefae8e8e46cfbb,     //   0.14066,  -0.99006
+    0x3fc232d978aed413,     0xbfefacc79de6c44f,     //   0.14218,  -0.98984
+    0x3fc264994dfd340a,     0xbfefaafbcb0cfddc,     //    0.1437,  -0.98962
+    0x3fc296564d2b953e,     0xbfefa92b1600657c,     //   0.14521,   -0.9894
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //   0.14673,  -0.98918
+    0x3fc2f9c7aa7a72af,     0xbfefa57b066e2754,     //   0.14825,  -0.98895
+    0x3fc32b7bf94516a7,     0xbfefa39bac7a1791,     //   0.14976,  -0.98872
+    0x3fc35d2d53440db2,     0xbfefa1b7717661d5,     //   0.15128,  -0.98849
+    0x3fc38edbb0cd8d14,     0xbfef9fce55adb2c8,     //    0.1528,  -0.98826
+    0x3fc3c0870a383ff6,     0xbfef9de0596b77a3,     //   0.15431,  -0.98802
+    0x3fc3f22f57db4893,     0xbfef9bed7cfbde29,     //   0.15583,  -0.98778
+    0x3fc423d4920e4166,     0xbfef99f5c0abd496,     //   0.15734,  -0.98754
+    0x3fc45576b1293e5a,     0xbfef97f924c9099b,     //   0.15886,   -0.9873
+    0x3fc48715ad84cdf5,     0xbfef95f7a9a1ec47,     //   0.16037,  -0.98706
+    0x3fc4b8b17f79fa88,     0xbfef93f14f85ac08,     //   0.16189,  -0.98681
+    0x3fc4ea4a1f624b61,     0xbfef91e616c43891,     //    0.1634,  -0.98656
+    0x3fc51bdf8597c5f2,     0xbfef8fd5ffae41db,     //   0.16491,  -0.98631
+    0x3fc54d71aa74ef02,     0xbfef8dc10a95380d,     //   0.16643,  -0.98605
+    0x3fc57f008654cbde,     0xbfef8ba737cb4b78,     //   0.16794,   -0.9858
+    0x3fc5b08c1192e381,     0xbfef898887a36c84,     //   0.16945,  -0.98554
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     //   0.17096,  -0.98528
+    0x3fc61399179a6e94,     0xbfef853c9089595e,     //   0.17247,  -0.98501
+    0x3fc6451a831d830d,     0xbfef830f4a40c60c,     //   0.17398,  -0.98475
+    0x3fc676987f7216b8,     0xbfef80dd27ed8204,     //   0.17549,  -0.98448
+    0x3fc6a81304f64ab2,     0xbfef7ea629e63d6e,     //     0.177,  -0.98421
+    0x3fc6d98a0c08c8da,     0xbfef7c6a50826840,     //   0.17851,  -0.98394
+    0x3fc70afd8d08c4ff,     0xbfef7a299c1a322a,     //   0.18002,  -0.98366
+    0x3fc73c6d8055fe0a,     0xbfef77e40d068a90,     //   0.18153,  -0.98339
+    0x3fc76dd9de50bf31,     0xbfef7599a3a12077,     //   0.18304,  -0.98311
+    0x3fc79f429f59e11d,     0xbfef734a60446279,     //   0.18455,  -0.98282
+    0x3fc7d0a7bbd2cb1b,     0xbfef70f6434b7eb7,     //   0.18606,  -0.98254
+    0x3fc802092c1d744b,     0xbfef6e9d4d1262ca,     //   0.18756,  -0.98225
+    0x3fc83366e89c64c5,     0xbfef6c3f7df5bbb7,     //   0.18907,  -0.98196
+    0x3fc864c0e9b2b6cf,     0xbfef69dcd652f5de,     //   0.19057,  -0.98167
+    0x3fc8961727c41804,     0xbfef677556883cee,     //   0.19208,  -0.98138
+    0x3fc8c7699b34ca7e,     0xbfef6508fef47bd5,     //   0.19359,  -0.98108
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //   0.19509,  -0.98079
+    0x3fc92a0303c8194f,     0xbfef6021c9f148c2,     //   0.19659,  -0.98048
+    0x3fc95b49e9b62af9,     0xbfef5da6ed43685d,     //    0.1981,  -0.98018
+    0x3fc98c8ce69a7aec,     0xbfef5b273a4fa2d9,     //    0.1996,  -0.97988
+    0x3fc9bdcbf2dc4366,     0xbfef58a2b1789e84,     //    0.2011,  -0.97957
+    0x3fc9ef0706e35a35,     0xbfef56195321c090,     //   0.20261,  -0.97926
+    0x3fca203e1b1831da,     0xbfef538b1faf2d07,     //   0.20411,  -0.97895
+    0x3fca517127e3dabc,     0xbfef50f81785c6b9,     //   0.20561,  -0.97863
+    0x3fca82a025b00451,     0xbfef4e603b0b2f2d,     //   0.20711,  -0.97832
+    0x3fcab3cb0ce6fe44,     0xbfef4bc38aa5c694,     //   0.20861,    -0.978
+    0x3fcae4f1d5f3b9ab,     0xbfef492206bcabb4,     //   0.21011,  -0.97768
+    0x3fcb16147941ca2a,     0xbfef467bafb7bbe0,     //   0.21161,  -0.97735
+    0x3fcb4732ef3d6722,     0xbfef43d085ff92dd,     //   0.21311,  -0.97703
+    0x3fcb784d30536cda,     0xbfef412089fd8adc,     //   0.21461,   -0.9767
+    0x3fcba96334f15dad,     0xbfef3e6bbc1bbc65,     //   0.21611,  -0.97637
+    0x3fcbda74f5856330,     0xbfef3bb21cc4fe47,     //    0.2176,  -0.97604
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //    0.2191,   -0.9757
+    0x3fcc3c8b8c4b9dd7,     0xbfef36306b67c556,     //    0.2206,  -0.97536
+    0x3fcc6d90535d74dc,     0xbfef33685a3aaef0,     //   0.22209,  -0.97503
+    0x3fcc9e90b824a6a9,     0xbfef309b794b719f,     //   0.22359,  -0.97468
+    0x3fcccf8cb312b286,     0xbfef2dc9c9089a9d,     //   0.22508,  -0.97434
+    0x3fcd00843c99c5f9,     0xbfef2af349e17507,     //   0.22658,  -0.97399
+    0x3fcd31774d2cbdee,     0xbfef2817fc4609ce,     //   0.22807,  -0.97364
+    0x3fcd6265dd3f27e3,     0xbfef2537e0a71f9f,     //   0.22957,  -0.97329
+    0x3fcd934fe5454311,     0xbfef2252f7763ada,     //   0.23106,  -0.97294
+    0x3fcdc4355db40195,     0xbfef1f6941259d7a,     //   0.23255,  -0.97258
+    0x3fcdf5163f01099a,     0xbfef1c7abe284708,     //   0.23404,  -0.97223
+    0x3fce25f281a2b684,     0xbfef19876ef1f486,     //   0.23553,  -0.97187
+    0x3fce56ca1e101a1b,     0xbfef168f53f7205d,     //   0.23702,   -0.9715
+    0x3fce879d0cc0fdaf,     0xbfef13926dad024e,     //   0.23851,  -0.97114
+    0x3fceb86b462de348,     0xbfef1090bc898f5f,     //      0.24,  -0.97077
+    0x3fcee934c2d006c7,     0xbfef0d8a410379c5,     //   0.24149,   -0.9704
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //   0.24298,  -0.97003
+    0x3fcf4ab9679c9f5c,     0xbfef076eecade0fa,     //   0.24447,  -0.96966
+    0x3fcf7b7480bd3801,     0xbfef045a14cf738c,     //   0.24596,  -0.96928
+    0x3fcfac2abeff57ff,     0xbfef014074708ed3,     //   0.24744,   -0.9689
+    0x3fcfdcdc1adfedf8,     0xbfeefe220c0b95ec,     //   0.24893,  -0.96852
+    0x3fd006c4466e54af,     0xbfeefafedc1ba8b7,     //   0.25041,  -0.96814
+    0x3fd01f1806b9fdd2,     0xbfeef7d6e51ca3c0,     //    0.2519,  -0.96775
+    0x3fd037694a928cac,     0xbfeef4aa278b2032,     //   0.25338,  -0.96737
+    0x3fd04fb80e37fdae,     0xbfeef178a3e473c2,     //   0.25487,  -0.96698
+    0x3fd068044deab002,     0xbfeeee425aa6b09a,     //   0.25635,  -0.96658
+    0x3fd0804e05eb661e,     0xbfeeeb074c50a544,     //   0.25783,  -0.96619
+    0x3fd09895327b465e,     0xbfeee7c77961dc9e,     //   0.25931,  -0.96579
+    0x3fd0b0d9cfdbdb90,     0xbfeee482e25a9dbc,     //   0.26079,  -0.96539
+    0x3fd0c91bda4f158d,     0xbfeee13987bbebdc,     //   0.26227,  -0.96499
+    0x3fd0e15b4e1749cd,     0xbfeeddeb6a078651,     //   0.26375,  -0.96459
+    0x3fd0f998277733f7,     0xbfeeda9889bfe86a,     //   0.26523,  -0.96418
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     //   0.26671,  -0.96378
+    0x3fd12a09fc0b1b12,     0xbfeed3e483849c51,     //   0.26819,  -0.96337
+    0x3fd1423eefc69378,     0xbfeed0835e999009,     //   0.26967,  -0.96295
+    0x3fd15a713a28b9d9,     0xbfeecd1d792c8f10,     //   0.27115,  -0.96254
+    0x3fd172a0d7765177,     0xbfeec9b2d3c3bf84,     //   0.27262,  -0.96212
+    0x3fd18acdc3f4873a,     0xbfeec6436ee60309,     //    0.2741,   -0.9617
+    0x3fd1a2f7fbe8f243,     0xbfeec2cf4b1af6b2,     //   0.27557,  -0.96128
+    0x3fd1bb1f7b999480,     0xbfeebf5668eaf2ef,     //   0.27705,  -0.96086
+    0x3fd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //   0.27852,  -0.96043
+    0x3fd1eb6643499fbb,     0xbfeeb8566b810f2a,     //   0.27999,     -0.96
+    0x3fd2038583d727bd,     0xbfeeb4cf515b8811,     //   0.28146,  -0.95957
+    0x3fd21ba1fd3d2623,     0xbfeeb1437af9bb34,     //   0.28294,  -0.95914
+    0x3fd233bbabc3bb72,     0xbfeeadb2e8e7a88e,     //   0.28441,   -0.9587
+    0x3fd24bd28bb37672,     0xbfeeaa1d9bb20af3,     //   0.28588,  -0.95827
+    0x3fd263e6995554ba,     0xbfeea68393e65800,     //   0.28735,  -0.95783
+    0x3fd27bf7d0f2c346,     0xbfeea2e4d212c000,     //   0.28882,  -0.95738
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //   0.29028,  -0.95694
+    0x3fd2ac11af483572,     0xbfee9b99229046f8,     //   0.29175,  -0.95649
+    0x3fd2c41a4e954520,     0xbfee97ec36016b30,     //   0.29322,  -0.95605
+    0x3fd2dc200907fe51,     0xbfee943a91aab4b4,     //   0.29469,  -0.95559
+    0x3fd2f422daec0386,     0xbfee9084361df7f3,     //   0.29615,  -0.95514
+    0x3fd30c22c08d6a13,     0xbfee8cc923edc388,     //   0.29762,  -0.95469
+    0x3fd3241fb638baaf,     0xbfee89095bad6025,     //   0.29908,  -0.95423
+    0x3fd33c19b83af207,     0xbfee8544ddf0d075,     //   0.30054,  -0.95377
+    0x3fd35410c2e18152,     0xbfee817bab4cd10d,     //   0.30201,  -0.95331
+    0x3fd36c04d27a4edf,     0xbfee7dadc456d850,     //   0.30347,  -0.95284
+    0x3fd383f5e353b6aa,     0xbfee79db29a5165a,     //   0.30493,  -0.95238
+    0x3fd39be3f1bc8aef,     0xbfee7603dbce74e9,     //   0.30639,  -0.95191
+    0x3fd3b3cefa0414b7,     0xbfee7227db6a9744,     //   0.30785,  -0.95144
+    0x3fd3cbb6f87a146e,     0xbfee6e472911da27,     //   0.30931,  -0.95096
+    0x3fd3e39be96ec271,     0xbfee6a61c55d53a7,     //   0.31077,  -0.95049
+    0x3fd3fb7dc932cfa4,     0xbfee6677b0e6d31e,     //   0.31222,  -0.95001
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     //   0.31368,  -0.94953
+    0x3fd42b38466e2928,     0xbfee5e95781ebf1c,     //   0.31514,  -0.94905
+    0x3fd44310dc8936f0,     0xbfee5a9d550467d3,     //   0.31659,  -0.94856
+    0x3fd45ae652bb2800,     0xbfee56a083968eb1,     //   0.31805,  -0.94807
+    0x3fd472b8a5571054,     0xbfee529f04729ffc,     //    0.3195,  -0.94759
+    0x3fd48a87d0b07fd7,     0xbfee4e98d836c0af,     //   0.32096,  -0.94709
+    0x3fd4a253d11b82f3,     0xbfee4a8dff81ce5e,     //   0.32241,   -0.9466
+    0x3fd4ba1ca2eca31c,     0xbfee467e7af35f23,     //   0.32386,  -0.94611
+    0x3fd4d1e24278e76a,     0xbfee426a4b2bc17e,     //   0.32531,  -0.94561
+    0x3fd4e9a4ac15d520,     0xbfee3e5170cbfc46,     //   0.32676,  -0.94511
+    0x3fd50163dc197047,     0xbfee3a33ec75ce85,     //   0.32821,   -0.9446
+    0x3fd5191fceda3c35,     0xbfee3611becbaf69,     //   0.32966,   -0.9441
+    0x3fd530d880af3c24,     0xbfee31eae870ce25,     //   0.33111,  -0.94359
+    0x3fd5488dedeff3be,     0xbfee2dbf6a0911d9,     //   0.33255,  -0.94308
+    0x3fd5604012f467b4,     0xbfee298f4439197a,     //     0.334,  -0.94257
+    0x3fd577eeec151e47,     0xbfee255a77a63bb8,     //   0.33545,  -0.94206
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //   0.33689,  -0.94154
+    0x3fd5a742ac0ff78d,     0xbfee1ce2ecd0c0d8,     //   0.33833,  -0.94103
+    0x3fd5bee78b9db3b6,     0xbfee18a02fdc66d9,     //   0.33978,  -0.94051
+    0x3fd5d68910aee686,     0xbfee1458cec1ad83,     //   0.34122,  -0.93998
+    0x3fd5ee27379ea693,     0xbfee100cca2980ac,     //   0.34266,  -0.93946
+    0x3fd605c1fcc88f63,     0xbfee0bbc22bd8349,     //    0.3441,  -0.93893
+    0x3fd61d595c88c203,     0xbfee0766d9280f54,     //   0.34554,   -0.9384
+    0x3fd634ed533be58e,     0xbfee030cee1435b8,     //   0.34698,  -0.93787
+    0x3fd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //   0.34842,  -0.93734
+    0x3fd6640af6f03d9e,     0xbfedfa4b3621271d,     //   0.34986,   -0.9368
+    0x3fd67b949cad63ca,     0xbfedf5e36a9ba59c,     //   0.35129,  -0.93627
+    0x3fd6931acad55f51,     0xbfedf177004b2534,     //   0.35273,  -0.93573
+    0x3fd6aa9d7dc77e16,     0xbfeded05f7de47da,     //   0.35416,  -0.93518
+    0x3fd6c21cb1e39771,     0xbfede890520465ce,     //    0.3556,  -0.93464
+    0x3fd6d998638a0cb5,     0xbfede4160f6d8d81,     //   0.35703,  -0.93409
+    0x3fd6f1108f1bc9c5,     0xbfeddf9730ca837b,     //   0.35846,  -0.93354
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //    0.3599,  -0.93299
+    0x3fd71ff6458782ec,     0xbfedd68ba2267a25,     //   0.36133,  -0.93244
+    0x3fd73763c9261092,     0xbfedd1fef38a915a,     //   0.36276,  -0.93188
+    0x3fd74ecdb8390a3e,     0xbfedcd6dabaca3a5,     //   0.36418,  -0.93133
+    0x3fd766340f2418f6,     0xbfedc8d7cb410260,     //   0.36561,  -0.93077
+    0x3fd77d96ca4b73a6,     0xbfedc43d52fcb453,     //   0.36704,  -0.93021
+    0x3fd794f5e613dfae,     0xbfedbf9e4395759a,     //   0.36847,  -0.92964
+    0x3fd7ac515ee2b172,     0xbfedbafa9dc1b78d,     //   0.36989,  -0.92907
+    0x3fd7c3a9311dcce7,     0xbfedb6526238a09b,     //   0.37132,  -0.92851
+    0x3fd7dafd592ba621,     0xbfedb1a591b20c38,     //   0.37274,  -0.92794
+    0x3fd7f24dd37341e3,     0xbfedacf42ce68ab9,     //   0.37416,  -0.92736
+    0x3fd8099a9c5c362d,     0xbfeda83e348f613b,     //   0.37559,  -0.92679
+    0x3fd820e3b04eaac4,     0xbfeda383a9668988,     //   0.37701,  -0.92621
+    0x3fd838290bb359c8,     0xbfed9ec48c26b1f3,     //   0.37843,  -0.92563
+    0x3fd84f6aaaf3903f,     0xbfed9a00dd8b3d46,     //   0.37985,  -0.92505
+    0x3fd866a88a792ea0,     0xbfed95389e50429b,     //   0.38127,  -0.92447
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //   0.38268,  -0.92388
+    0x3fd89518fbff098e,     0xbfed8b9a70ef9cb4,     //    0.3841,  -0.92329
+    0x3fd8ac4b86d5ed44,     0xbfed86c48445a450,     //   0.38552,   -0.9227
+    0x3fd8c37a439f884f,     0xbfed81ea09f38b63,     //   0.38693,  -0.92211
+    0x3fd8daa52ec8a4af,     0xbfed7d0b02b8ecf9,     //   0.38835,  -0.92151
+    0x3fd8f1cc44bea329,     0xbfed78276f5617c6,     //   0.38976,  -0.92092
+    0x3fd908ef81ef7bd1,     0xbfed733f508c0dff,     //   0.39117,  -0.92032
+    0x3fd9200ee2c9be97,     0xbfed6e52a71c8547,     //   0.39258,  -0.91972
+    0x3fd9372a63bc93d7,     0xbfed696173c9e68b,     //   0.39399,  -0.91911
+    0x3fd94e420137bce3,     0xbfed646bb7574de5,     //    0.3954,  -0.91851
+    0x3fd96555b7ab948f,     0xbfed5f7172888a7f,     //   0.39681,   -0.9179
+    0x3fd97c6583890fc2,     0xbfed5a72a6221e73,     //   0.39822,  -0.91729
+    0x3fd993716141bdfe,     0xbfed556f52e93eb1,     //   0.39962,  -0.91668
+    0x3fd9aa794d47c9ee,     0xbfed506779a3d2d9,     //   0.40103,  -0.91606
+    0x3fd9c17d440df9f2,     0xbfed4b5b1b187524,     //   0.40243,  -0.91545
+    0x3fd9d87d4207b0ab,     0xbfed464a380e7242,     //   0.40384,  -0.91483
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //   0.40524,  -0.91421
+    0x3fda067145664d57,     0xbfed3c1ae79f2b4e,     //   0.40664,  -0.91359
+    0x3fda1d6543b50ac0,     0xbfed36fc7bcbfbdc,     //   0.40804,  -0.91296
+    0x3fda34553b0afee5,     0xbfed31d98e9e503a,     //   0.40944,  -0.91234
+    0x3fda4b4127dea1e4,     0xbfed2cb220e0ef9f,     //   0.41084,  -0.91171
+    0x3fda622906a70b63,     0xbfed2786335f52fc,     //   0.41224,  -0.91107
+    0x3fda790cd3dbf31a,     0xbfed2255c6e5a4e1,     //   0.41364,  -0.91044
+    0x3fda8fec8bf5b166,     0xbfed1d20dc40c15c,     //   0.41503,  -0.90981
+    0x3fdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //   0.41643,  -0.90917
+    0x3fdabd9faebc3980,     0xbfed12a98fac410c,     //   0.41782,  -0.90853
+    0x3fdad473125cdc08,     0xbfed0d672f59d2b9,     //   0.41922,  -0.90789
+    0x3fdaeb4252ca07ab,     0xbfed082054168bac,     //   0.42061,  -0.90724
+    0x3fdb020d6c7f4009,     0xbfed02d4feb2bd92,     //     0.422,   -0.9066
+    0x3fdb18d45bf8aca6,     0xbfecfd852fff6ad4,     //   0.42339,  -0.90595
+    0x3fdb2f971db31972,     0xbfecf830e8ce467b,     //   0.42478,   -0.9053
+    0x3fdb4655ae2bf757,     0xbfecf2d829f1b40e,     //   0.42617,  -0.90464
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //   0.42756,  -0.90399
+    0x3fdb73c62d520624,     0xbfece819488344ce,     //   0.42894,  -0.90333
+    0x3fdb8a7814fd5693,     0xbfece2b32799a060,     //   0.43033,  -0.90267
+    0x3fdba125bd63583e,     0xbfecdd489254fe65,     //   0.43171,  -0.90201
+    0x3fdbb7cf2304bd01,     0xbfecd7d9898b32f6,     //   0.43309,  -0.90135
+    0x3fdbce744262deee,     0xbfecd2660e12c1e6,     //   0.43448,  -0.90068
+    0x3fdbe51517ffc0d9,     0xbfecccee20c2de9f,     //   0.43586,  -0.90002
+    0x3fdbfbb1a05e0edc,     0xbfecc771c2736c09,     //   0.43724,  -0.89935
+    0x3fdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //   0.43862,  -0.89867
+    0x3fdc28ddbb6cf145,     0xbfecbc6bb638d10b,     //   0.43999,    -0.898
+    0x3fdc3f6d47263129,     0xbfecb6e20a00da99,     //   0.44137,  -0.89732
+    0x3fdc55f877b23537,     0xbfecb153f02fb87d,     //   0.44275,  -0.89665
+    0x3fdc6c7f4997000a,     0xbfecabc169a0b901,     //   0.44412,  -0.89597
+    0x3fdc8301b95b40c2,     0xbfeca62a772fd919,     //    0.4455,  -0.89528
+    0x3fdc997fc3865388,     0xbfeca08f19b9c449,     //   0.44687,   -0.8946
+    0x3fdcaff964a0421d,     0xbfec9aef521bd480,     //   0.44824,  -0.89391
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     //   0.44961,  -0.89322
+    0x3fdcdcdf5dc440ce,     0xbfec8fa287e13305,     //   0.45098,  -0.89253
+    0x3fdcf34baee1cd21,     0xbfec89f587029c13,     //   0.45235,  -0.89184
+    0x3fdd09b389152ec1,     0xbfec84441f785f61,     //   0.45372,  -0.89115
+    0x3fdd2016e8e9db5b,     0xbfec7e8e52233cf3,     //   0.45508,  -0.89045
+    0x3fdd3675caebf962,     0xbfec78d41fe4a267,     //   0.45645,  -0.88975
+    0x3fdd4cd02ba8609c,     0xbfec7315899eaad7,     //   0.45781,  -0.88905
+    0x3fdd632607ac9aa9,     0xbfec6d5290341eb2,     //   0.45918,  -0.88835
+    0x3fdd79775b86e389,     0xbfec678b3488739b,     //   0.46054,  -0.88764
+    0x3fdd8fc423c62a25,     0xbfec61bf777fcc48,     //    0.4619,  -0.88693
+    0x3fdda60c5cfa10d8,     0xbfec5bef59fef85a,     //   0.46326,  -0.88622
+    0x3fddbc5003b2edf8,     0xbfec561adceb743e,     //   0.46462,  -0.88551
+    0x3fddd28f1481cc58,     0xbfec5042012b6907,     //   0.46598,   -0.8848
+    0x3fdde8c98bf86bd6,     0xbfec4a64c7a5ac4c,     //   0.46733,  -0.88408
+    0x3fddfeff66a941de,     0xbfec44833141c004,     //   0.46869,  -0.88336
+    0x3fde1530a12779f4,     0xbfec3e9d3ee7d262,     //   0.47004,  -0.88264
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //    0.4714,  -0.88192
+    0x3fde418527dc4ffa,     0xbfec32c449f60831,     //   0.47275,   -0.8812
+    0x3fde57a86d3cd824,     0xbfec2cd14931e3f1,     //    0.4741,  -0.88047
+    0x3fde6dc704be97e2,     0xbfec26d9f01f2eaf,     //   0.47545,  -0.87974
+    0x3fde83e0eaf85113,     0xbfec20de3fa971b0,     //    0.4768,  -0.87901
+    0x3fde99f61c817eda,     0xbfec1ade38bce19b,     //   0.47815,  -0.87828
+    0x3fdeb00695f25620,     0xbfec14d9dc465e58,     //   0.47949,  -0.87755
+    0x3fdec61253e3c61b,     0xbfec0ed12b3372e9,     //   0.48084,  -0.87681
+    0x3fdedc1952ef78d5,     0xbfec08c426725549,     //   0.48218,  -0.87607
+    0x3fdef21b8fafd3b5,     0xbfec02b2cef1e641,     //   0.48353,  -0.87533
+    0x3fdf081906bff7fd,     0xbfebfc9d25a1b147,     //   0.48487,  -0.87459
+    0x3fdf1e11b4bbc35c,     0xbfebf6832b71ec5b,     //   0.48621,  -0.87384
+    0x3fdf3405963fd068,     0xbfebf064e15377dd,     //   0.48755,  -0.87309
+    0x3fdf49f4a7e97729,     0xbfebea424837de6d,     //   0.48889,  -0.87235
+    0x3fdf5fdee656cda3,     0xbfebe41b611154c1,     //   0.49023,   -0.8716
+    0x3fdf75c44e26a852,     0xbfebddf02cd2b983,     //   0.49156,  -0.87084
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //    0.4929,  -0.87009
+    0x3fdfa1808c6cf7e0,     0xbfebd18ce0dc19d6,     //   0.49423,  -0.86933
+    0x3fdfb7575c24d2de,     0xbfebcb54cb0d2327,     //   0.49557,  -0.86857
+    0x3fdfcd2947c1ff57,     0xbfebc5186bf8361d,     //    0.4969,  -0.86781
+    0x3fdfe2f64be7120f,     0xbfebbed7c49380ea,     //   0.49823,  -0.86705
+    0x3fdff8be6537615e,     0xbfebb892d5d5dad5,     //   0.49956,  -0.86628
+    0x3fe00740c82b82e0,     0xbfebb249a0b6c40d,     //   0.50089,  -0.86551
+    0x3fe0121fe4f56d2c,     0xbfebabfc262e6586,     //   0.50221,  -0.86474
+    0x3fe01cfc874c3eb7,     0xbfeba5aa673590d2,     //   0.50354,  -0.86397
+    0x3fe027d6ad83287e,     0xbfeb9f5464c5bffc,     //   0.50486,   -0.8632
+    0x3fe032ae55edbd95,     0xbfeb98fa1fd9155e,     //   0.50619,  -0.86242
+    0x3fe03d837edff370,     0xbfeb929b996a5b7f,     //   0.50751,  -0.86165
+    0x3fe0485626ae221a,     0xbfeb8c38d27504e9,     //   0.50883,  -0.86087
+    0x3fe053264bad0483,     0xbfeb85d1cbf52c02,     //   0.51015,  -0.86009
+    0x3fe05df3ec31b8b6,     0xbfeb7f6686e792ea,     //   0.51147,   -0.8593
+    0x3fe068bf0691c028,     0xbfeb78f70449a34b,     //   0.51279,  -0.85852
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //    0.5141,  -0.85773
+    0x3fe07e4da23bc102,     0xbfeb6c0b4a55ac17,     //   0.51542,  -0.85694
+    0x3fe089112032b08c,     0xbfeb658f14fdbc47,     //   0.51673,  -0.85615
+    0x3fe093d2115ee018,     0xbfeb5f0ea611a532,     //   0.51804,  -0.85535
+    0x3fe09e907417c5e1,     0xbfeb5889fe921405,     //   0.51936,  -0.85456
+    0x3fe0a94c46b53d0b,     0xbfeb52011f805c92,     //   0.52067,  -0.85376
+    0x3fe0b405878f85ec,     0xbfeb4b7409de7925,     //   0.52198,  -0.85296
+    0x3fe0bebc34ff4646,     0xbfeb44e2beaf0a61,     //   0.52328,  -0.85216
+    0x3fe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //   0.52459,  -0.85136
+    0x3fe0d421cf03c12b,     0xbfeb37b38bb54c09,     //    0.5259,  -0.85055
+    0x3fe0ded0b84bc4b5,     0xbfeb3115a5f37bf4,     //    0.5272,  -0.84974
+    0x3fe0e97d078fd23b,     0xbfeb2a738eb51f33,     //    0.5285,  -0.84893
+    0x3fe0f426bb2a8e7d,     0xbfeb23cd470013b4,     //    0.5298,  -0.84812
+    0x3fe0fecdd1770537,     0xbfeb1d22cfdadcc6,     //    0.5311,  -0.84731
+    0x3fe1097248d0a956,     0xbfeb16742a4ca2f5,     //    0.5324,  -0.84649
+    0x3fe114141f935545,     0xbfeb0fc1575d33db,     //    0.5337,  -0.84567
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //     0.535,  -0.84485
+    0x3fe1294fe4c5350a,     0xbfeb024f2d7d24a9,     //   0.53629,  -0.84403
+    0x3fe133e9cfee254e,     0xbfeafb8fd89f57b6,     //   0.53759,  -0.84321
+    0x3fe13e8113f396c1,     0xbfeaf4cc5a85fb73,     //   0.53888,  -0.84238
+    0x3fe14915af336ceb,     0xbfeaee04b43c1474,     //   0.54017,  -0.84155
+    0x3fe153a7a00bf453,     0xbfeae738e6cd4b67,     //   0.54146,  -0.84073
+    0x3fe15e36e4dbe2bc,     0xbfeae068f345ecef,     //   0.54275,  -0.83989
+    0x3fe168c37c025764,     0xbfead994dab2e979,     //   0.54404,  -0.83906
+    0x3fe1734d63dedb49,     0xbfead2bc9e21d511,     //   0.54532,  -0.83822
+    0x3fe17dd49ad16161,     0xbfeacbe03ea0e73b,     //   0.54661,  -0.83739
+    0x3fe188591f3a46e5,     0xbfeac4ffbd3efac8,     //   0.54789,  -0.83655
+    0x3fe192daef7a5386,     0xbfeabe1b1b0b8dac,     //   0.54918,  -0.83571
+    0x3fe19d5a09f2b9b8,     0xbfeab7325916c0d4,     //   0.55046,  -0.83486
+    0x3fe1a7d66d0516e6,     0xbfeab045787157ff,     //   0.55174,  -0.83402
+    0x3fe1b250171373be,     0xbfeaa9547a2cb98e,     //   0.55302,  -0.83317
+    0x3fe1bcc706804467,     0xbfeaa25f5f5aee60,     //   0.55429,  -0.83232
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //   0.55557,  -0.83147
+    0x3fe1d1acaf012cc2,     0xbfea9468d85b20ae,     //   0.55685,  -0.83062
+    0x3fe1dc1b64dc4872,     0xbfea8d676e545ad2,     //   0.55812,  -0.82976
+    0x3fe1e68759a3e074,     0xbfea8661ec0ee133,     //   0.55939,   -0.8289
+    0x3fe1f0f08bbc861b,     0xbfea7f58529fe69d,     //   0.56066,  -0.82805
+    0x3fe1fb56f98b37b8,     0xbfea784aa31d3f55,     //   0.56193,  -0.82718
+    0x3fe205baa17560d6,     0xbfea7138de9d60f5,     //    0.5632,  -0.82632
+    0x3fe2101b81e0da78,     0xbfea6a230637623b,     //   0.56447,  -0.82546
+    0x3fe21a799933eb58,     0xbfea63091b02fae2,     //   0.56573,  -0.82459
+    0x3fe224d4e5d5482e,     0xbfea5beb1e188375,     //     0.567,  -0.82372
+    0x3fe22f2d662c13e1,     0xbfea54c91090f524,     //   0.56826,  -0.82285
+    0x3fe23983189fdfd5,     0xbfea4da2f385e997,     //   0.56952,  -0.82198
+    0x3fe243d5fb98ac1f,     0xbfea4678c8119ac8,     //   0.57078,   -0.8211
+    0x3fe24e260d7ee7c9,     0xbfea3f4a8f4ee2d2,     //   0.57204,  -0.82023
+    0x3fe258734cbb7110,     0xbfea38184a593bc6,     //    0.5733,  -0.81935
+    0x3fe262bdb7b795a2,     0xbfea30e1fa4cbf81,     //   0.57455,  -0.81847
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     //   0.57581,  -0.81758
+    0x3fe2774a0a961612,     0xbfea22693d62ccb9,     //   0.57706,   -0.8167
+    0x3fe2818bef4d3cba,     0xbfea1b26d2c0a75e,     //   0.57831,  -0.81581
+    0x3fe28bcaf96d94ba,     0xbfea13e0617e4ec7,     //   0.57956,  -0.81493
+    0x3fe2960727629ca8,     0xbfea0c95eabaf937,     //   0.58081,  -0.81404
+    0x3fe2a040779843fb,     0xbfea05476f967bb5,     //   0.58206,  -0.81314
+    0x3fe2aa76e87aeb58,     0xbfe9fdf4f13149de,     //   0.58331,  -0.81225
+    0x3fe2b4aa787764c4,     0xbfe9f69e70ac75bc,     //   0.58455,  -0.81135
+    0x3fe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //    0.5858,  -0.81046
+    0x3fe2c908ef734e57,     0xbfe9e7e56dcb45bd,     //   0.58704,  -0.80956
+    0x3fe2d333d34e9bb7,     0xbfe9e082edb42472,     //   0.58828,  -0.80866
+    0x3fe2dd5bcffb7616,     0xbfe9d91c7007d5a6,     //   0.58952,  -0.80775
+    0x3fe2e780e3e8ea16,     0xbfe9d1b1f5ea80d6,     //   0.59076,  -0.80685
+    0x3fe2f1a30d86773a,     0xbfe9ca438080eadb,     //     0.592,  -0.80594
+    0x3fe2fbc24b441015,     0xbfe9c2d110f075c3,     //   0.59323,  -0.80503
+    0x3fe305de9b921a94,     0xbfe9bb5aa85f2098,     //   0.59447,  -0.80412
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //    0.5957,  -0.80321
+    0x3fe31a0e6da35e44,     0xbfe9ac61f0d4e247,     //   0.59693,  -0.80229
+    0x3fe32421ec49a620,     0xbfe9a4dfa42b06b2,     //   0.59816,  -0.80138
+    0x3fe32e3277467d6b,     0xbfe99d59631e65d5,     //   0.59939,  -0.80046
+    0x3fe338400d0c8e57,     0xbfe995cf2ed80d22,     //   0.60062,  -0.79954
+    0x3fe3424aac0ef7d6,     0xbfe98e410881a600,     //   0.60184,  -0.79861
+    0x3fe34c5252c14de1,     0xbfe986aef1457594,     //   0.60307,  -0.79769
+    0x3fe35656ff9799ae,     0xbfe97f18ea4e5c9e,     //   0.60429,  -0.79676
+    0x3fe36058b10659f3,     0xbfe9777ef4c7d742,     //   0.60551,  -0.79584
+    0x3fe36a576582831b,     0xbfe96fe111ddfce0,     //   0.60673,  -0.79491
+    0x3fe374531b817f8d,     0xbfe9683f42bd7fe1,     //   0.60795,  -0.79398
+    0x3fe37e4bd1792fe2,     0xbfe960998893ad8c,     //   0.60917,  -0.79304
+    0x3fe3884185dfeb22,     0xbfe958efe48e6dd7,     //   0.61038,  -0.79211
+    0x3fe39234372c7f04,     0xbfe9514257dc4335,     //    0.6116,  -0.79117
+    0x3fe39c23e3d63029,     0xbfe94990e3ac4a6c,     //   0.61281,  -0.79023
+    0x3fe3a6108a54ba58,     0xbfe941db892e3a65,     //   0.61402,  -0.78929
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     //   0.61523,  -0.78835
+    0x3fe3b9e0beb19e18,     0xbfe932652609b1cf,     //   0.61644,   -0.7874
+    0x3fe3c3c44981c517,     0xbfe92aa41fc5a815,     //   0.61765,  -0.78646
+    0x3fe3cda4c80a6076,     0xbfe922df37f8646a,     //   0.61885,  -0.78551
+    0x3fe3d78238c58343,     0xbfe91b166fd49da2,     //   0.62006,  -0.78456
+    0x3fe3e15c9a2db922,     0xbfe91349c88da398,     //   0.62126,   -0.7836
+    0x3fe3eb33eabe0680,     0xbfe90b7943575efe,     //   0.62246,  -0.78265
+    0x3fe3f50828f1e8d2,     0xbfe903a4e1665133,     //   0.62366,  -0.78169
+    0x3fe3fed9534556d4,     0xbfe8fbcca3ef940d,     //   0.62486,  -0.78074
+    0x3fe408a76834c0c0,     0xbfe8f3f08c28d9ac,     //   0.62606,  -0.77978
+    0x3fe41272663d108c,     0xbfe8ec109b486c49,     //   0.62725,  -0.77882
+    0x3fe41c3a4bdbaa26,     0xbfe8e42cd2852e0a,     //   0.62845,  -0.77785
+    0x3fe425ff178e6bb1,     0xbfe8dc45331698cc,     //   0.62964,  -0.77689
+    0x3fe42fc0c7d3adbb,     0xbfe8d459be34bdfa,     //   0.63083,  -0.77592
+    0x3fe4397f5b2a4380,     0xbfe8cc6a75184655,     //   0.63202,  -0.77495
+    0x3fe4433ad0117b1d,     0xbfe8c47758fa71cb,     //   0.63321,  -0.77398
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //   0.63439,  -0.77301
+    0x3fe456a858917046,     0xbfe8b485aca2a468,     //   0.63558,  -0.77204
+    0x3fe4605a692b32a2,     0xbfe8ac871ede1d88,     //   0.63676,  -0.77106
+    0x3fe46a095557a0f1,     0xbfe8a484c3031d50,     //   0.63794,  -0.77008
+    0x3fe473b51b987347,     0xbfe89c7e9a4dd4ab,     //   0.63912,   -0.7691
+    0x3fe47d5dba6fde01,     0xbfe89474a5fb0a84,     //    0.6403,  -0.76812
+    0x3fe48703306091fe,     0xbfe88c66e7481ba1,     //   0.64148,  -0.76714
+    0x3fe490a57bedbcdf,     0xbfe884555f72fa6b,     //   0.64266,  -0.76615
+    0x3fe49a449b9b0938,     0xbfe87c400fba2ebf,     //   0.64383,  -0.76517
+    0x3fe4a3e08dec9ed6,     0xbfe87426f95cd5bd,     //     0.645,  -0.76418
+    0x3fe4ad79516722f0,     0xbfe86c0a1d9aa195,     //   0.64618,  -0.76319
+    0x3fe4b70ee48fb869,     0xbfe863e97db3d95a,     //   0.64735,   -0.7622
+    0x3fe4c0a145ec0004,     0xbfe85bc51ae958cc,     //   0.64851,   -0.7612
+    0x3fe4ca30740218a3,     0xbfe8539cf67c9029,     //   0.64968,  -0.76021
+    0x3fe4d3bc6d589f80,     0xbfe84b7111af83f9,     //   0.65085,  -0.75921
+    0x3fe4dd453076b064,     0xbfe843416dc4cce2,     //   0.65201,  -0.75821
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //   0.65317,  -0.75721
+    0x3fe4f04d0e2859aa,     0xbfe832d6eda3a3e0,     //   0.65433,  -0.75621
+    0x3fe4f9cc25cca486,     0xbfe82a9c13f545ff,     //   0.65549,   -0.7552
+    0x3fe503480159ded2,     0xbfe8225d803964e5,     //   0.65665,  -0.75419
+    0x3fe50cc09f59a09b,     0xbfe81a1b33b57acc,     //   0.65781,  -0.75319
+    0x3fe51635fe5601d7,     0xbfe811d52faf94dc,     //   0.65896,  -0.75218
+    0x3fe51fa81cd99aa6,     0xbfe8098b756e52fa,     //   0.66011,  -0.75117
+    0x3fe52916f96f8388,     0xbfe8013e0638e795,     //   0.66127,  -0.75015
+    0x3fe5328292a35596,     0xbfe7f8ece3571771,     //   0.66242,  -0.74914
+    0x3fe53beae7012abe,     0xbfe7f0980e113978,     //   0.66356,  -0.74812
+    0x3fe5454ff5159dfb,     0xbfe7e83f87b03686,     //   0.66471,   -0.7471
+    0x3fe54eb1bb6dcb8f,     0xbfe7dfe3517d8937,     //   0.66586,  -0.74608
+    0x3fe5581038975137,     0xbfe7d7836cc33db2,     //     0.667,  -0.74506
+    0x3fe5616b6b204e6e,     0xbfe7cf1fdacbf179,     //   0.66814,  -0.74403
+    0x3fe56ac35197649e,     0xbfe7c6b89ce2d333,     //   0.66928,  -0.74301
+    0x3fe57417ea8bb75c,     0xbfe7be4db453a27c,     //   0.67042,  -0.74198
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //   0.67156,  -0.74095
+    0x3fe586b72e2b2cfd,     0xbfe7ad6ce874dbb6,     //   0.67269,  -0.73992
+    0x3fe59001d5f723df,     0xbfe7a4f707bf97d2,     //   0.67383,  -0.73889
+    0x3fe599492a81ffbc,     0xbfe79c7d8198e56e,     //   0.67496,  -0.73785
+    0x3fe5a28d2a5d7250,     0xbfe79400574f55e4,     //   0.67609,  -0.73682
+    0x3fe5abcdd41bb0d8,     0xbfe78b7f8a320a52,     //   0.67722,  -0.73578
+    0x3fe5b50b264f7448,     0xbfe782fb1b90b35b,     //   0.67835,  -0.73474
+    0x3fe5be451f8bf980,     0xbfe77a730cbb9100,     //   0.67948,   -0.7337
+    0x3fe5c77bbe65018c,     0xbfe771e75f037261,     //    0.6806,  -0.73265
+    0x3fe5d0af016ed1d4,     0xbfe7695813b9b594,     //   0.68172,  -0.73161
+    0x3fe5d9dee73e345c,     0xbfe760c52c304764,     //   0.68285,  -0.73056
+    0x3fe5e30b6e6877f3,     0xbfe7582ea9b9a329,     //   0.68397,  -0.72951
+    0x3fe5ec3495837074,     0xbfe74f948da8d28d,     //   0.68508,  -0.72846
+    0x3fe5f55a5b2576f8,     0xbfe746f6d9516d59,     //    0.6862,  -0.72741
+    0x3fe5fe7cbde56a0f,     0xbfe73e558e079942,     //   0.68732,  -0.72636
+    0x3fe6079bbc5aadfa,     0xbfe735b0ad2009b2,     //   0.68843,   -0.7253
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     //   0.68954,  -0.72425
+    0x3fe619cf86c55702,     0xbfe7245c2fcd492a,     //   0.69065,  -0.72319
+    0x3fe622e44fec22ff,     0xbfe71bac960e41bf,     //   0.69176,  -0.72213
+    0x3fe62bf5af2b0dfd,     0xbfe712f96c09d18d,     //   0.69287,  -0.72107
+    0x3fe63503a31c1be8,     0xbfe70a42b3176d7a,     //   0.69397,     -0.72
+    0x3fe63e0e2a59d7aa,     0xbfe701886c8f16e6,     //   0.69508,  -0.71894
+    0x3fe64715437f535b,     0xbfe6f8ca99c95b75,     //   0.69618,  -0.71787
+    0x3fe65018ed28287f,     0xbfe6f0093c1f54de,     //   0.69728,   -0.7168
+    0x3fe6591925f0783e,     0xbfe6e74454eaa8ae,     //   0.69838,  -0.71573
+    0x3fe66215ec74eb91,     0xbfe6de7be585881d,     //   0.69947,  -0.71466
+    0x3fe66b0f3f52b386,     0xbfe6d5afef4aafcc,     //   0.70057,  -0.71358
+    0x3fe674051d27896c,     0xbfe6cce07395679f,     //   0.70166,  -0.71251
+    0x3fe67cf78491af10,     0xbfe6c40d73c18275,     //   0.70275,  -0.71143
+    0x3fe685e6742feeef,     0xbfe6bb36f12b5e06,     //   0.70385,  -0.71035
+    0x3fe68ed1eaa19c71,     0xbfe6b25ced2fe29c,     //   0.70493,  -0.70927
+    0x3fe697b9e686941c,     0xbfe6a97f692c82ea,     //   0.70602,  -0.70819
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //   0.70711,  -0.70711
+    0x3fe6a97f692c82ea,     0xbfe697b9e686941c,     //   0.70819,  -0.70602
+    0x3fe6b25ced2fe29c,     0xbfe68ed1eaa19c71,     //   0.70927,  -0.70493
+    0x3fe6bb36f12b5e06,     0xbfe685e6742feeef,     //   0.71035,  -0.70385
+    0x3fe6c40d73c18275,     0xbfe67cf78491af10,     //   0.71143,  -0.70275
+    0x3fe6cce07395679f,     0xbfe674051d27896c,     //   0.71251,  -0.70166
+    0x3fe6d5afef4aafcc,     0xbfe66b0f3f52b386,     //   0.71358,  -0.70057
+    0x3fe6de7be585881d,     0xbfe66215ec74eb91,     //   0.71466,  -0.69947
+    0x3fe6e74454eaa8ae,     0xbfe6591925f0783e,     //   0.71573,  -0.69838
+    0x3fe6f0093c1f54de,     0xbfe65018ed28287f,     //    0.7168,  -0.69728
+    0x3fe6f8ca99c95b75,     0xbfe64715437f535b,     //   0.71787,  -0.69618
+    0x3fe701886c8f16e6,     0xbfe63e0e2a59d7aa,     //   0.71894,  -0.69508
+    0x3fe70a42b3176d7a,     0xbfe63503a31c1be8,     //      0.72,  -0.69397
+    0x3fe712f96c09d18d,     0xbfe62bf5af2b0dfd,     //   0.72107,  -0.69287
+    0x3fe71bac960e41bf,     0xbfe622e44fec22ff,     //   0.72213,  -0.69176
+    0x3fe7245c2fcd492a,     0xbfe619cf86c55702,     //   0.72319,  -0.69065
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     //   0.72425,  -0.68954
+    0x3fe735b0ad2009b2,     0xbfe6079bbc5aadfa,     //    0.7253,  -0.68843
+    0x3fe73e558e079942,     0xbfe5fe7cbde56a0f,     //   0.72636,  -0.68732
+    0x3fe746f6d9516d59,     0xbfe5f55a5b2576f8,     //   0.72741,   -0.6862
+    0x3fe74f948da8d28d,     0xbfe5ec3495837074,     //   0.72846,  -0.68508
+    0x3fe7582ea9b9a329,     0xbfe5e30b6e6877f3,     //   0.72951,  -0.68397
+    0x3fe760c52c304764,     0xbfe5d9dee73e345c,     //   0.73056,  -0.68285
+    0x3fe7695813b9b594,     0xbfe5d0af016ed1d4,     //   0.73161,  -0.68172
+    0x3fe771e75f037261,     0xbfe5c77bbe65018c,     //   0.73265,   -0.6806
+    0x3fe77a730cbb9100,     0xbfe5be451f8bf980,     //    0.7337,  -0.67948
+    0x3fe782fb1b90b35b,     0xbfe5b50b264f7448,     //   0.73474,  -0.67835
+    0x3fe78b7f8a320a52,     0xbfe5abcdd41bb0d8,     //   0.73578,  -0.67722
+    0x3fe79400574f55e4,     0xbfe5a28d2a5d7250,     //   0.73682,  -0.67609
+    0x3fe79c7d8198e56e,     0xbfe599492a81ffbc,     //   0.73785,  -0.67496
+    0x3fe7a4f707bf97d2,     0xbfe59001d5f723df,     //   0.73889,  -0.67383
+    0x3fe7ad6ce874dbb6,     0xbfe586b72e2b2cfd,     //   0.73992,  -0.67269
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //   0.74095,  -0.67156
+    0x3fe7be4db453a27c,     0xbfe57417ea8bb75c,     //   0.74198,  -0.67042
+    0x3fe7c6b89ce2d333,     0xbfe56ac35197649e,     //   0.74301,  -0.66928
+    0x3fe7cf1fdacbf179,     0xbfe5616b6b204e6e,     //   0.74403,  -0.66814
+    0x3fe7d7836cc33db2,     0xbfe5581038975137,     //   0.74506,    -0.667
+    0x3fe7dfe3517d8937,     0xbfe54eb1bb6dcb8f,     //   0.74608,  -0.66586
+    0x3fe7e83f87b03686,     0xbfe5454ff5159dfb,     //    0.7471,  -0.66471
+    0x3fe7f0980e113978,     0xbfe53beae7012abe,     //   0.74812,  -0.66356
+    0x3fe7f8ece3571771,     0xbfe5328292a35596,     //   0.74914,  -0.66242
+    0x3fe8013e0638e795,     0xbfe52916f96f8388,     //   0.75015,  -0.66127
+    0x3fe8098b756e52fa,     0xbfe51fa81cd99aa6,     //   0.75117,  -0.66011
+    0x3fe811d52faf94dc,     0xbfe51635fe5601d7,     //   0.75218,  -0.65896
+    0x3fe81a1b33b57acc,     0xbfe50cc09f59a09b,     //   0.75319,  -0.65781
+    0x3fe8225d803964e5,     0xbfe503480159ded2,     //   0.75419,  -0.65665
+    0x3fe82a9c13f545ff,     0xbfe4f9cc25cca486,     //    0.7552,  -0.65549
+    0x3fe832d6eda3a3e0,     0xbfe4f04d0e2859aa,     //   0.75621,  -0.65433
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //   0.75721,  -0.65317
+    0x3fe843416dc4cce2,     0xbfe4dd453076b064,     //   0.75821,  -0.65201
+    0x3fe84b7111af83f9,     0xbfe4d3bc6d589f80,     //   0.75921,  -0.65085
+    0x3fe8539cf67c9029,     0xbfe4ca30740218a3,     //   0.76021,  -0.64968
+    0x3fe85bc51ae958cc,     0xbfe4c0a145ec0004,     //    0.7612,  -0.64851
+    0x3fe863e97db3d95a,     0xbfe4b70ee48fb869,     //    0.7622,  -0.64735
+    0x3fe86c0a1d9aa195,     0xbfe4ad79516722f0,     //   0.76319,  -0.64618
+    0x3fe87426f95cd5bd,     0xbfe4a3e08dec9ed6,     //   0.76418,    -0.645
+    0x3fe87c400fba2ebf,     0xbfe49a449b9b0938,     //   0.76517,  -0.64383
+    0x3fe884555f72fa6b,     0xbfe490a57bedbcdf,     //   0.76615,  -0.64266
+    0x3fe88c66e7481ba1,     0xbfe48703306091fe,     //   0.76714,  -0.64148
+    0x3fe89474a5fb0a84,     0xbfe47d5dba6fde01,     //   0.76812,   -0.6403
+    0x3fe89c7e9a4dd4ab,     0xbfe473b51b987347,     //    0.7691,  -0.63912
+    0x3fe8a484c3031d50,     0xbfe46a095557a0f1,     //   0.77008,  -0.63794
+    0x3fe8ac871ede1d88,     0xbfe4605a692b32a2,     //   0.77106,  -0.63676
+    0x3fe8b485aca2a468,     0xbfe456a858917046,     //   0.77204,  -0.63558
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //   0.77301,  -0.63439
+    0x3fe8c47758fa71cb,     0xbfe4433ad0117b1d,     //   0.77398,  -0.63321
+    0x3fe8cc6a75184655,     0xbfe4397f5b2a4380,     //   0.77495,  -0.63202
+    0x3fe8d459be34bdfa,     0xbfe42fc0c7d3adbb,     //   0.77592,  -0.63083
+    0x3fe8dc45331698cc,     0xbfe425ff178e6bb1,     //   0.77689,  -0.62964
+    0x3fe8e42cd2852e0a,     0xbfe41c3a4bdbaa26,     //   0.77785,  -0.62845
+    0x3fe8ec109b486c49,     0xbfe41272663d108c,     //   0.77882,  -0.62725
+    0x3fe8f3f08c28d9ac,     0xbfe408a76834c0c0,     //   0.77978,  -0.62606
+    0x3fe8fbcca3ef940d,     0xbfe3fed9534556d4,     //   0.78074,  -0.62486
+    0x3fe903a4e1665133,     0xbfe3f50828f1e8d2,     //   0.78169,  -0.62366
+    0x3fe90b7943575efe,     0xbfe3eb33eabe0680,     //   0.78265,  -0.62246
+    0x3fe91349c88da398,     0xbfe3e15c9a2db922,     //    0.7836,  -0.62126
+    0x3fe91b166fd49da2,     0xbfe3d78238c58343,     //   0.78456,  -0.62006
+    0x3fe922df37f8646a,     0xbfe3cda4c80a6076,     //   0.78551,  -0.61885
+    0x3fe92aa41fc5a815,     0xbfe3c3c44981c517,     //   0.78646,  -0.61765
+    0x3fe932652609b1cf,     0xbfe3b9e0beb19e18,     //    0.7874,  -0.61644
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     //   0.78835,  -0.61523
+    0x3fe941db892e3a65,     0xbfe3a6108a54ba58,     //   0.78929,  -0.61402
+    0x3fe94990e3ac4a6c,     0xbfe39c23e3d63029,     //   0.79023,  -0.61281
+    0x3fe9514257dc4335,     0xbfe39234372c7f04,     //   0.79117,   -0.6116
+    0x3fe958efe48e6dd7,     0xbfe3884185dfeb22,     //   0.79211,  -0.61038
+    0x3fe960998893ad8c,     0xbfe37e4bd1792fe2,     //   0.79304,  -0.60917
+    0x3fe9683f42bd7fe1,     0xbfe374531b817f8d,     //   0.79398,  -0.60795
+    0x3fe96fe111ddfce0,     0xbfe36a576582831b,     //   0.79491,  -0.60673
+    0x3fe9777ef4c7d742,     0xbfe36058b10659f3,     //   0.79584,  -0.60551
+    0x3fe97f18ea4e5c9e,     0xbfe35656ff9799ae,     //   0.79676,  -0.60429
+    0x3fe986aef1457594,     0xbfe34c5252c14de1,     //   0.79769,  -0.60307
+    0x3fe98e410881a600,     0xbfe3424aac0ef7d6,     //   0.79861,  -0.60184
+    0x3fe995cf2ed80d22,     0xbfe338400d0c8e57,     //   0.79954,  -0.60062
+    0x3fe99d59631e65d5,     0xbfe32e3277467d6b,     //   0.80046,  -0.59939
+    0x3fe9a4dfa42b06b2,     0xbfe32421ec49a620,     //   0.80138,  -0.59816
+    0x3fe9ac61f0d4e247,     0xbfe31a0e6da35e44,     //   0.80229,  -0.59693
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //   0.80321,   -0.5957
+    0x3fe9bb5aa85f2098,     0xbfe305de9b921a94,     //   0.80412,  -0.59447
+    0x3fe9c2d110f075c3,     0xbfe2fbc24b441015,     //   0.80503,  -0.59323
+    0x3fe9ca438080eadb,     0xbfe2f1a30d86773a,     //   0.80594,    -0.592
+    0x3fe9d1b1f5ea80d6,     0xbfe2e780e3e8ea16,     //   0.80685,  -0.59076
+    0x3fe9d91c7007d5a6,     0xbfe2dd5bcffb7616,     //   0.80775,  -0.58952
+    0x3fe9e082edb42472,     0xbfe2d333d34e9bb7,     //   0.80866,  -0.58828
+    0x3fe9e7e56dcb45bd,     0xbfe2c908ef734e57,     //   0.80956,  -0.58704
+    0x3fe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //   0.81046,   -0.5858
+    0x3fe9f69e70ac75bc,     0xbfe2b4aa787764c4,     //   0.81135,  -0.58455
+    0x3fe9fdf4f13149de,     0xbfe2aa76e87aeb58,     //   0.81225,  -0.58331
+    0x3fea05476f967bb5,     0xbfe2a040779843fb,     //   0.81314,  -0.58206
+    0x3fea0c95eabaf937,     0xbfe2960727629ca8,     //   0.81404,  -0.58081
+    0x3fea13e0617e4ec7,     0xbfe28bcaf96d94ba,     //   0.81493,  -0.57956
+    0x3fea1b26d2c0a75e,     0xbfe2818bef4d3cba,     //   0.81581,  -0.57831
+    0x3fea22693d62ccb9,     0xbfe2774a0a961612,     //    0.8167,  -0.57706
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     //   0.81758,  -0.57581
+    0x3fea30e1fa4cbf81,     0xbfe262bdb7b795a2,     //   0.81847,  -0.57455
+    0x3fea38184a593bc6,     0xbfe258734cbb7110,     //   0.81935,   -0.5733
+    0x3fea3f4a8f4ee2d2,     0xbfe24e260d7ee7c9,     //   0.82023,  -0.57204
+    0x3fea4678c8119ac8,     0xbfe243d5fb98ac1f,     //    0.8211,  -0.57078
+    0x3fea4da2f385e997,     0xbfe23983189fdfd5,     //   0.82198,  -0.56952
+    0x3fea54c91090f524,     0xbfe22f2d662c13e1,     //   0.82285,  -0.56826
+    0x3fea5beb1e188375,     0xbfe224d4e5d5482e,     //   0.82372,    -0.567
+    0x3fea63091b02fae2,     0xbfe21a799933eb58,     //   0.82459,  -0.56573
+    0x3fea6a230637623b,     0xbfe2101b81e0da78,     //   0.82546,  -0.56447
+    0x3fea7138de9d60f5,     0xbfe205baa17560d6,     //   0.82632,   -0.5632
+    0x3fea784aa31d3f55,     0xbfe1fb56f98b37b8,     //   0.82718,  -0.56193
+    0x3fea7f58529fe69d,     0xbfe1f0f08bbc861b,     //   0.82805,  -0.56066
+    0x3fea8661ec0ee133,     0xbfe1e68759a3e074,     //    0.8289,  -0.55939
+    0x3fea8d676e545ad2,     0xbfe1dc1b64dc4872,     //   0.82976,  -0.55812
+    0x3fea9468d85b20ae,     0xbfe1d1acaf012cc2,     //   0.83062,  -0.55685
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //   0.83147,  -0.55557
+    0x3feaa25f5f5aee60,     0xbfe1bcc706804467,     //   0.83232,  -0.55429
+    0x3feaa9547a2cb98e,     0xbfe1b250171373be,     //   0.83317,  -0.55302
+    0x3feab045787157ff,     0xbfe1a7d66d0516e6,     //   0.83402,  -0.55174
+    0x3feab7325916c0d4,     0xbfe19d5a09f2b9b8,     //   0.83486,  -0.55046
+    0x3feabe1b1b0b8dac,     0xbfe192daef7a5386,     //   0.83571,  -0.54918
+    0x3feac4ffbd3efac8,     0xbfe188591f3a46e5,     //   0.83655,  -0.54789
+    0x3feacbe03ea0e73b,     0xbfe17dd49ad16161,     //   0.83739,  -0.54661
+    0x3fead2bc9e21d511,     0xbfe1734d63dedb49,     //   0.83822,  -0.54532
+    0x3fead994dab2e979,     0xbfe168c37c025764,     //   0.83906,  -0.54404
+    0x3feae068f345ecef,     0xbfe15e36e4dbe2bc,     //   0.83989,  -0.54275
+    0x3feae738e6cd4b67,     0xbfe153a7a00bf453,     //   0.84073,  -0.54146
+    0x3feaee04b43c1474,     0xbfe14915af336ceb,     //   0.84155,  -0.54017
+    0x3feaf4cc5a85fb73,     0xbfe13e8113f396c1,     //   0.84238,  -0.53888
+    0x3feafb8fd89f57b6,     0xbfe133e9cfee254e,     //   0.84321,  -0.53759
+    0x3feb024f2d7d24a9,     0xbfe1294fe4c5350a,     //   0.84403,  -0.53629
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     //   0.84485,    -0.535
+    0x3feb0fc1575d33db,     0xbfe114141f935545,     //   0.84567,   -0.5337
+    0x3feb16742a4ca2f5,     0xbfe1097248d0a956,     //   0.84649,   -0.5324
+    0x3feb1d22cfdadcc6,     0xbfe0fecdd1770537,     //   0.84731,   -0.5311
+    0x3feb23cd470013b4,     0xbfe0f426bb2a8e7d,     //   0.84812,   -0.5298
+    0x3feb2a738eb51f33,     0xbfe0e97d078fd23b,     //   0.84893,   -0.5285
+    0x3feb3115a5f37bf4,     0xbfe0ded0b84bc4b5,     //   0.84974,   -0.5272
+    0x3feb37b38bb54c09,     0xbfe0d421cf03c12b,     //   0.85055,   -0.5259
+    0x3feb3e4d3ef55712,     0xbfe0c9704d5d898f,     //   0.85136,  -0.52459
+    0x3feb44e2beaf0a61,     0xbfe0bebc34ff4646,     //   0.85216,  -0.52328
+    0x3feb4b7409de7925,     0xbfe0b405878f85ec,     //   0.85296,  -0.52198
+    0x3feb52011f805c92,     0xbfe0a94c46b53d0b,     //   0.85376,  -0.52067
+    0x3feb5889fe921405,     0xbfe09e907417c5e1,     //   0.85456,  -0.51936
+    0x3feb5f0ea611a532,     0xbfe093d2115ee018,     //   0.85535,  -0.51804
+    0x3feb658f14fdbc47,     0xbfe089112032b08c,     //   0.85615,  -0.51673
+    0x3feb6c0b4a55ac17,     0xbfe07e4da23bc102,     //   0.85694,  -0.51542
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //   0.85773,   -0.5141
+    0x3feb78f70449a34b,     0xbfe068bf0691c028,     //   0.85852,  -0.51279
+    0x3feb7f6686e792ea,     0xbfe05df3ec31b8b6,     //    0.8593,  -0.51147
+    0x3feb85d1cbf52c02,     0xbfe053264bad0483,     //   0.86009,  -0.51015
+    0x3feb8c38d27504e9,     0xbfe0485626ae221a,     //   0.86087,  -0.50883
+    0x3feb929b996a5b7f,     0xbfe03d837edff370,     //   0.86165,  -0.50751
+    0x3feb98fa1fd9155e,     0xbfe032ae55edbd95,     //   0.86242,  -0.50619
+    0x3feb9f5464c5bffc,     0xbfe027d6ad83287e,     //    0.8632,  -0.50486
+    0x3feba5aa673590d2,     0xbfe01cfc874c3eb7,     //   0.86397,  -0.50354
+    0x3febabfc262e6586,     0xbfe0121fe4f56d2c,     //   0.86474,  -0.50221
+    0x3febb249a0b6c40d,     0xbfe00740c82b82e0,     //   0.86551,  -0.50089
+    0x3febb892d5d5dad5,     0xbfdff8be6537615e,     //   0.86628,  -0.49956
+    0x3febbed7c49380ea,     0xbfdfe2f64be7120f,     //   0.86705,  -0.49823
+    0x3febc5186bf8361d,     0xbfdfcd2947c1ff57,     //   0.86781,   -0.4969
+    0x3febcb54cb0d2327,     0xbfdfb7575c24d2de,     //   0.86857,  -0.49557
+    0x3febd18ce0dc19d6,     0xbfdfa1808c6cf7e0,     //   0.86933,  -0.49423
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //   0.87009,   -0.4929
+    0x3febddf02cd2b983,     0xbfdf75c44e26a852,     //   0.87084,  -0.49156
+    0x3febe41b611154c1,     0xbfdf5fdee656cda3,     //    0.8716,  -0.49023
+    0x3febea424837de6d,     0xbfdf49f4a7e97729,     //   0.87235,  -0.48889
+    0x3febf064e15377dd,     0xbfdf3405963fd068,     //   0.87309,  -0.48755
+    0x3febf6832b71ec5b,     0xbfdf1e11b4bbc35c,     //   0.87384,  -0.48621
+    0x3febfc9d25a1b147,     0xbfdf081906bff7fd,     //   0.87459,  -0.48487
+    0x3fec02b2cef1e641,     0xbfdef21b8fafd3b5,     //   0.87533,  -0.48353
+    0x3fec08c426725549,     0xbfdedc1952ef78d5,     //   0.87607,  -0.48218
+    0x3fec0ed12b3372e9,     0xbfdec61253e3c61b,     //   0.87681,  -0.48084
+    0x3fec14d9dc465e58,     0xbfdeb00695f25620,     //   0.87755,  -0.47949
+    0x3fec1ade38bce19b,     0xbfde99f61c817eda,     //   0.87828,  -0.47815
+    0x3fec20de3fa971b0,     0xbfde83e0eaf85113,     //   0.87901,   -0.4768
+    0x3fec26d9f01f2eaf,     0xbfde6dc704be97e2,     //   0.87974,  -0.47545
+    0x3fec2cd14931e3f1,     0xbfde57a86d3cd824,     //   0.88047,   -0.4741
+    0x3fec32c449f60831,     0xbfde418527dc4ffa,     //    0.8812,  -0.47275
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //   0.88192,   -0.4714
+    0x3fec3e9d3ee7d262,     0xbfde1530a12779f4,     //   0.88264,  -0.47004
+    0x3fec44833141c004,     0xbfddfeff66a941de,     //   0.88336,  -0.46869
+    0x3fec4a64c7a5ac4c,     0xbfdde8c98bf86bd6,     //   0.88408,  -0.46733
+    0x3fec5042012b6907,     0xbfddd28f1481cc58,     //    0.8848,  -0.46598
+    0x3fec561adceb743e,     0xbfddbc5003b2edf8,     //   0.88551,  -0.46462
+    0x3fec5bef59fef85a,     0xbfdda60c5cfa10d8,     //   0.88622,  -0.46326
+    0x3fec61bf777fcc48,     0xbfdd8fc423c62a25,     //   0.88693,   -0.4619
+    0x3fec678b3488739b,     0xbfdd79775b86e389,     //   0.88764,  -0.46054
+    0x3fec6d5290341eb2,     0xbfdd632607ac9aa9,     //   0.88835,  -0.45918
+    0x3fec7315899eaad7,     0xbfdd4cd02ba8609c,     //   0.88905,  -0.45781
+    0x3fec78d41fe4a267,     0xbfdd3675caebf962,     //   0.88975,  -0.45645
+    0x3fec7e8e52233cf3,     0xbfdd2016e8e9db5b,     //   0.89045,  -0.45508
+    0x3fec84441f785f61,     0xbfdd09b389152ec1,     //   0.89115,  -0.45372
+    0x3fec89f587029c13,     0xbfdcf34baee1cd21,     //   0.89184,  -0.45235
+    0x3fec8fa287e13305,     0xbfdcdcdf5dc440ce,     //   0.89253,  -0.45098
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     //   0.89322,  -0.44961
+    0x3fec9aef521bd480,     0xbfdcaff964a0421d,     //   0.89391,  -0.44824
+    0x3feca08f19b9c449,     0xbfdc997fc3865388,     //    0.8946,  -0.44687
+    0x3feca62a772fd919,     0xbfdc8301b95b40c2,     //   0.89528,   -0.4455
+    0x3fecabc169a0b901,     0xbfdc6c7f4997000a,     //   0.89597,  -0.44412
+    0x3fecb153f02fb87d,     0xbfdc55f877b23537,     //   0.89665,  -0.44275
+    0x3fecb6e20a00da99,     0xbfdc3f6d47263129,     //   0.89732,  -0.44137
+    0x3fecbc6bb638d10b,     0xbfdc28ddbb6cf145,     //     0.898,  -0.43999
+    0x3fecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //   0.89867,  -0.43862
+    0x3fecc771c2736c09,     0xbfdbfbb1a05e0edc,     //   0.89935,  -0.43724
+    0x3fecccee20c2de9f,     0xbfdbe51517ffc0d9,     //   0.90002,  -0.43586
+    0x3fecd2660e12c1e6,     0xbfdbce744262deee,     //   0.90068,  -0.43448
+    0x3fecd7d9898b32f6,     0xbfdbb7cf2304bd01,     //   0.90135,  -0.43309
+    0x3fecdd489254fe65,     0xbfdba125bd63583e,     //   0.90201,  -0.43171
+    0x3fece2b32799a060,     0xbfdb8a7814fd5693,     //   0.90267,  -0.43033
+    0x3fece819488344ce,     0xbfdb73c62d520624,     //   0.90333,  -0.42894
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //   0.90399,  -0.42756
+    0x3fecf2d829f1b40e,     0xbfdb4655ae2bf757,     //   0.90464,  -0.42617
+    0x3fecf830e8ce467b,     0xbfdb2f971db31972,     //    0.9053,  -0.42478
+    0x3fecfd852fff6ad4,     0xbfdb18d45bf8aca6,     //   0.90595,  -0.42339
+    0x3fed02d4feb2bd92,     0xbfdb020d6c7f4009,     //    0.9066,    -0.422
+    0x3fed082054168bac,     0xbfdaeb4252ca07ab,     //   0.90724,  -0.42061
+    0x3fed0d672f59d2b9,     0xbfdad473125cdc08,     //   0.90789,  -0.41922
+    0x3fed12a98fac410c,     0xbfdabd9faebc3980,     //   0.90853,  -0.41782
+    0x3fed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //   0.90917,  -0.41643
+    0x3fed1d20dc40c15c,     0xbfda8fec8bf5b166,     //   0.90981,  -0.41503
+    0x3fed2255c6e5a4e1,     0xbfda790cd3dbf31a,     //   0.91044,  -0.41364
+    0x3fed2786335f52fc,     0xbfda622906a70b63,     //   0.91107,  -0.41224
+    0x3fed2cb220e0ef9f,     0xbfda4b4127dea1e4,     //   0.91171,  -0.41084
+    0x3fed31d98e9e503a,     0xbfda34553b0afee5,     //   0.91234,  -0.40944
+    0x3fed36fc7bcbfbdc,     0xbfda1d6543b50ac0,     //   0.91296,  -0.40804
+    0x3fed3c1ae79f2b4e,     0xbfda067145664d57,     //   0.91359,  -0.40664
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //   0.91421,  -0.40524
+    0x3fed464a380e7242,     0xbfd9d87d4207b0ab,     //   0.91483,  -0.40384
+    0x3fed4b5b1b187524,     0xbfd9c17d440df9f2,     //   0.91545,  -0.40243
+    0x3fed506779a3d2d9,     0xbfd9aa794d47c9ee,     //   0.91606,  -0.40103
+    0x3fed556f52e93eb1,     0xbfd993716141bdfe,     //   0.91668,  -0.39962
+    0x3fed5a72a6221e73,     0xbfd97c6583890fc2,     //   0.91729,  -0.39822
+    0x3fed5f7172888a7f,     0xbfd96555b7ab948f,     //    0.9179,  -0.39681
+    0x3fed646bb7574de5,     0xbfd94e420137bce3,     //   0.91851,   -0.3954
+    0x3fed696173c9e68b,     0xbfd9372a63bc93d7,     //   0.91911,  -0.39399
+    0x3fed6e52a71c8547,     0xbfd9200ee2c9be97,     //   0.91972,  -0.39258
+    0x3fed733f508c0dff,     0xbfd908ef81ef7bd1,     //   0.92032,  -0.39117
+    0x3fed78276f5617c6,     0xbfd8f1cc44bea329,     //   0.92092,  -0.38976
+    0x3fed7d0b02b8ecf9,     0xbfd8daa52ec8a4af,     //   0.92151,  -0.38835
+    0x3fed81ea09f38b63,     0xbfd8c37a439f884f,     //   0.92211,  -0.38693
+    0x3fed86c48445a450,     0xbfd8ac4b86d5ed44,     //    0.9227,  -0.38552
+    0x3fed8b9a70ef9cb4,     0xbfd89518fbff098e,     //   0.92329,   -0.3841
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //   0.92388,  -0.38268
+    0x3fed95389e50429b,     0xbfd866a88a792ea0,     //   0.92447,  -0.38127
+    0x3fed9a00dd8b3d46,     0xbfd84f6aaaf3903f,     //   0.92505,  -0.37985
+    0x3fed9ec48c26b1f3,     0xbfd838290bb359c8,     //   0.92563,  -0.37843
+    0x3feda383a9668988,     0xbfd820e3b04eaac4,     //   0.92621,  -0.37701
+    0x3feda83e348f613b,     0xbfd8099a9c5c362d,     //   0.92679,  -0.37559
+    0x3fedacf42ce68ab9,     0xbfd7f24dd37341e3,     //   0.92736,  -0.37416
+    0x3fedb1a591b20c38,     0xbfd7dafd592ba621,     //   0.92794,  -0.37274
+    0x3fedb6526238a09b,     0xbfd7c3a9311dcce7,     //   0.92851,  -0.37132
+    0x3fedbafa9dc1b78d,     0xbfd7ac515ee2b172,     //   0.92907,  -0.36989
+    0x3fedbf9e4395759a,     0xbfd794f5e613dfae,     //   0.92964,  -0.36847
+    0x3fedc43d52fcb453,     0xbfd77d96ca4b73a6,     //   0.93021,  -0.36704
+    0x3fedc8d7cb410260,     0xbfd766340f2418f6,     //   0.93077,  -0.36561
+    0x3fedcd6dabaca3a5,     0xbfd74ecdb8390a3e,     //   0.93133,  -0.36418
+    0x3fedd1fef38a915a,     0xbfd73763c9261092,     //   0.93188,  -0.36276
+    0x3fedd68ba2267a25,     0xbfd71ff6458782ec,     //   0.93244,  -0.36133
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     //   0.93299,   -0.3599
+    0x3feddf9730ca837b,     0xbfd6f1108f1bc9c5,     //   0.93354,  -0.35846
+    0x3fede4160f6d8d81,     0xbfd6d998638a0cb5,     //   0.93409,  -0.35703
+    0x3fede890520465ce,     0xbfd6c21cb1e39771,     //   0.93464,   -0.3556
+    0x3feded05f7de47da,     0xbfd6aa9d7dc77e16,     //   0.93518,  -0.35416
+    0x3fedf177004b2534,     0xbfd6931acad55f51,     //   0.93573,  -0.35273
+    0x3fedf5e36a9ba59c,     0xbfd67b949cad63ca,     //   0.93627,  -0.35129
+    0x3fedfa4b3621271d,     0xbfd6640af6f03d9e,     //    0.9368,  -0.34986
+    0x3fedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //   0.93734,  -0.34842
+    0x3fee030cee1435b8,     0xbfd634ed533be58e,     //   0.93787,  -0.34698
+    0x3fee0766d9280f54,     0xbfd61d595c88c203,     //    0.9384,  -0.34554
+    0x3fee0bbc22bd8349,     0xbfd605c1fcc88f63,     //   0.93893,   -0.3441
+    0x3fee100cca2980ac,     0xbfd5ee27379ea693,     //   0.93946,  -0.34266
+    0x3fee1458cec1ad83,     0xbfd5d68910aee686,     //   0.93998,  -0.34122
+    0x3fee18a02fdc66d9,     0xbfd5bee78b9db3b6,     //   0.94051,  -0.33978
+    0x3fee1ce2ecd0c0d8,     0xbfd5a742ac0ff78d,     //   0.94103,  -0.33833
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //   0.94154,  -0.33689
+    0x3fee255a77a63bb8,     0xbfd577eeec151e47,     //   0.94206,  -0.33545
+    0x3fee298f4439197a,     0xbfd5604012f467b4,     //   0.94257,    -0.334
+    0x3fee2dbf6a0911d9,     0xbfd5488dedeff3be,     //   0.94308,  -0.33255
+    0x3fee31eae870ce25,     0xbfd530d880af3c24,     //   0.94359,  -0.33111
+    0x3fee3611becbaf69,     0xbfd5191fceda3c35,     //    0.9441,  -0.32966
+    0x3fee3a33ec75ce85,     0xbfd50163dc197047,     //    0.9446,  -0.32821
+    0x3fee3e5170cbfc46,     0xbfd4e9a4ac15d520,     //   0.94511,  -0.32676
+    0x3fee426a4b2bc17e,     0xbfd4d1e24278e76a,     //   0.94561,  -0.32531
+    0x3fee467e7af35f23,     0xbfd4ba1ca2eca31c,     //   0.94611,  -0.32386
+    0x3fee4a8dff81ce5e,     0xbfd4a253d11b82f3,     //    0.9466,  -0.32241
+    0x3fee4e98d836c0af,     0xbfd48a87d0b07fd7,     //   0.94709,  -0.32096
+    0x3fee529f04729ffc,     0xbfd472b8a5571054,     //   0.94759,   -0.3195
+    0x3fee56a083968eb1,     0xbfd45ae652bb2800,     //   0.94807,  -0.31805
+    0x3fee5a9d550467d3,     0xbfd44310dc8936f0,     //   0.94856,  -0.31659
+    0x3fee5e95781ebf1c,     0xbfd42b38466e2928,     //   0.94905,  -0.31514
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     //   0.94953,  -0.31368
+    0x3fee6677b0e6d31e,     0xbfd3fb7dc932cfa4,     //   0.95001,  -0.31222
+    0x3fee6a61c55d53a7,     0xbfd3e39be96ec271,     //   0.95049,  -0.31077
+    0x3fee6e472911da27,     0xbfd3cbb6f87a146e,     //   0.95096,  -0.30931
+    0x3fee7227db6a9744,     0xbfd3b3cefa0414b7,     //   0.95144,  -0.30785
+    0x3fee7603dbce74e9,     0xbfd39be3f1bc8aef,     //   0.95191,  -0.30639
+    0x3fee79db29a5165a,     0xbfd383f5e353b6aa,     //   0.95238,  -0.30493
+    0x3fee7dadc456d850,     0xbfd36c04d27a4edf,     //   0.95284,  -0.30347
+    0x3fee817bab4cd10d,     0xbfd35410c2e18152,     //   0.95331,  -0.30201
+    0x3fee8544ddf0d075,     0xbfd33c19b83af207,     //   0.95377,  -0.30054
+    0x3fee89095bad6025,     0xbfd3241fb638baaf,     //   0.95423,  -0.29908
+    0x3fee8cc923edc388,     0xbfd30c22c08d6a13,     //   0.95469,  -0.29762
+    0x3fee9084361df7f3,     0xbfd2f422daec0386,     //   0.95514,  -0.29615
+    0x3fee943a91aab4b4,     0xbfd2dc200907fe51,     //   0.95559,  -0.29469
+    0x3fee97ec36016b30,     0xbfd2c41a4e954520,     //   0.95605,  -0.29322
+    0x3fee9b99229046f8,     0xbfd2ac11af483572,     //   0.95649,  -0.29175
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //   0.95694,  -0.29028
+    0x3feea2e4d212c000,     0xbfd27bf7d0f2c346,     //   0.95738,  -0.28882
+    0x3feea68393e65800,     0xbfd263e6995554ba,     //   0.95783,  -0.28735
+    0x3feeaa1d9bb20af3,     0xbfd24bd28bb37672,     //   0.95827,  -0.28588
+    0x3feeadb2e8e7a88e,     0xbfd233bbabc3bb72,     //    0.9587,  -0.28441
+    0x3feeb1437af9bb34,     0xbfd21ba1fd3d2623,     //   0.95914,  -0.28294
+    0x3feeb4cf515b8811,     0xbfd2038583d727bd,     //   0.95957,  -0.28146
+    0x3feeb8566b810f2a,     0xbfd1eb6643499fbb,     //      0.96,  -0.27999
+    0x3feebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //   0.96043,  -0.27852
+    0x3feebf5668eaf2ef,     0xbfd1bb1f7b999480,     //   0.96086,  -0.27705
+    0x3feec2cf4b1af6b2,     0xbfd1a2f7fbe8f243,     //   0.96128,  -0.27557
+    0x3feec6436ee60309,     0xbfd18acdc3f4873a,     //    0.9617,   -0.2741
+    0x3feec9b2d3c3bf84,     0xbfd172a0d7765177,     //   0.96212,  -0.27262
+    0x3feecd1d792c8f10,     0xbfd15a713a28b9d9,     //   0.96254,  -0.27115
+    0x3feed0835e999009,     0xbfd1423eefc69378,     //   0.96295,  -0.26967
+    0x3feed3e483849c51,     0xbfd12a09fc0b1b12,     //   0.96337,  -0.26819
+    0x3feed740e7684963,     0xbfd111d262b1f677,     //   0.96378,  -0.26671
+    0x3feeda9889bfe86a,     0xbfd0f998277733f7,     //   0.96418,  -0.26523
+    0x3feeddeb6a078651,     0xbfd0e15b4e1749cd,     //   0.96459,  -0.26375
+    0x3feee13987bbebdc,     0xbfd0c91bda4f158d,     //   0.96499,  -0.26227
+    0x3feee482e25a9dbc,     0xbfd0b0d9cfdbdb90,     //   0.96539,  -0.26079
+    0x3feee7c77961dc9e,     0xbfd09895327b465e,     //   0.96579,  -0.25931
+    0x3feeeb074c50a544,     0xbfd0804e05eb661e,     //   0.96619,  -0.25783
+    0x3feeee425aa6b09a,     0xbfd068044deab002,     //   0.96658,  -0.25635
+    0x3feef178a3e473c2,     0xbfd04fb80e37fdae,     //   0.96698,  -0.25487
+    0x3feef4aa278b2032,     0xbfd037694a928cac,     //   0.96737,  -0.25338
+    0x3feef7d6e51ca3c0,     0xbfd01f1806b9fdd2,     //   0.96775,   -0.2519
+    0x3feefafedc1ba8b7,     0xbfd006c4466e54af,     //   0.96814,  -0.25041
+    0x3feefe220c0b95ec,     0xbfcfdcdc1adfedf8,     //   0.96852,  -0.24893
+    0x3fef014074708ed3,     0xbfcfac2abeff57ff,     //    0.9689,  -0.24744
+    0x3fef045a14cf738c,     0xbfcf7b7480bd3801,     //   0.96928,  -0.24596
+    0x3fef076eecade0fa,     0xbfcf4ab9679c9f5c,     //   0.96966,  -0.24447
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //   0.97003,  -0.24298
+    0x3fef0d8a410379c5,     0xbfcee934c2d006c7,     //    0.9704,  -0.24149
+    0x3fef1090bc898f5f,     0xbfceb86b462de348,     //   0.97077,     -0.24
+    0x3fef13926dad024e,     0xbfce879d0cc0fdaf,     //   0.97114,  -0.23851
+    0x3fef168f53f7205d,     0xbfce56ca1e101a1b,     //    0.9715,  -0.23702
+    0x3fef19876ef1f486,     0xbfce25f281a2b684,     //   0.97187,  -0.23553
+    0x3fef1c7abe284708,     0xbfcdf5163f01099a,     //   0.97223,  -0.23404
+    0x3fef1f6941259d7a,     0xbfcdc4355db40195,     //   0.97258,  -0.23255
+    0x3fef2252f7763ada,     0xbfcd934fe5454311,     //   0.97294,  -0.23106
+    0x3fef2537e0a71f9f,     0xbfcd6265dd3f27e3,     //   0.97329,  -0.22957
+    0x3fef2817fc4609ce,     0xbfcd31774d2cbdee,     //   0.97364,  -0.22807
+    0x3fef2af349e17507,     0xbfcd00843c99c5f9,     //   0.97399,  -0.22658
+    0x3fef2dc9c9089a9d,     0xbfcccf8cb312b286,     //   0.97434,  -0.22508
+    0x3fef309b794b719f,     0xbfcc9e90b824a6a9,     //   0.97468,  -0.22359
+    0x3fef33685a3aaef0,     0xbfcc6d90535d74dc,     //   0.97503,  -0.22209
+    0x3fef36306b67c556,     0xbfcc3c8b8c4b9dd7,     //   0.97536,   -0.2206
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //    0.9757,   -0.2191
+    0x3fef3bb21cc4fe47,     0xbfcbda74f5856330,     //   0.97604,   -0.2176
+    0x3fef3e6bbc1bbc65,     0xbfcba96334f15dad,     //   0.97637,  -0.21611
+    0x3fef412089fd8adc,     0xbfcb784d30536cda,     //    0.9767,  -0.21461
+    0x3fef43d085ff92dd,     0xbfcb4732ef3d6722,     //   0.97703,  -0.21311
+    0x3fef467bafb7bbe0,     0xbfcb16147941ca2a,     //   0.97735,  -0.21161
+    0x3fef492206bcabb4,     0xbfcae4f1d5f3b9ab,     //   0.97768,  -0.21011
+    0x3fef4bc38aa5c694,     0xbfcab3cb0ce6fe44,     //     0.978,  -0.20861
+    0x3fef4e603b0b2f2d,     0xbfca82a025b00451,     //   0.97832,  -0.20711
+    0x3fef50f81785c6b9,     0xbfca517127e3dabc,     //   0.97863,  -0.20561
+    0x3fef538b1faf2d07,     0xbfca203e1b1831da,     //   0.97895,  -0.20411
+    0x3fef56195321c090,     0xbfc9ef0706e35a35,     //   0.97926,  -0.20261
+    0x3fef58a2b1789e84,     0xbfc9bdcbf2dc4366,     //   0.97957,   -0.2011
+    0x3fef5b273a4fa2d9,     0xbfc98c8ce69a7aec,     //   0.97988,   -0.1996
+    0x3fef5da6ed43685d,     0xbfc95b49e9b62af9,     //   0.98018,   -0.1981
+    0x3fef6021c9f148c2,     0xbfc92a0303c8194f,     //   0.98048,  -0.19659
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //   0.98079,  -0.19509
+    0x3fef6508fef47bd5,     0xbfc8c7699b34ca7e,     //   0.98108,  -0.19359
+    0x3fef677556883cee,     0xbfc8961727c41804,     //   0.98138,  -0.19208
+    0x3fef69dcd652f5de,     0xbfc864c0e9b2b6cf,     //   0.98167,  -0.19057
+    0x3fef6c3f7df5bbb7,     0xbfc83366e89c64c5,     //   0.98196,  -0.18907
+    0x3fef6e9d4d1262ca,     0xbfc802092c1d744b,     //   0.98225,  -0.18756
+    0x3fef70f6434b7eb7,     0xbfc7d0a7bbd2cb1b,     //   0.98254,  -0.18606
+    0x3fef734a60446279,     0xbfc79f429f59e11d,     //   0.98282,  -0.18455
+    0x3fef7599a3a12077,     0xbfc76dd9de50bf31,     //   0.98311,  -0.18304
+    0x3fef77e40d068a90,     0xbfc73c6d8055fe0a,     //   0.98339,  -0.18153
+    0x3fef7a299c1a322a,     0xbfc70afd8d08c4ff,     //   0.98366,  -0.18002
+    0x3fef7c6a50826840,     0xbfc6d98a0c08c8da,     //   0.98394,  -0.17851
+    0x3fef7ea629e63d6e,     0xbfc6a81304f64ab2,     //   0.98421,    -0.177
+    0x3fef80dd27ed8204,     0xbfc676987f7216b8,     //   0.98448,  -0.17549
+    0x3fef830f4a40c60c,     0xbfc6451a831d830d,     //   0.98475,  -0.17398
+    0x3fef853c9089595e,     0xbfc61399179a6e94,     //   0.98501,  -0.17247
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     //   0.98528,  -0.17096
+    0x3fef898887a36c84,     0xbfc5b08c1192e381,     //   0.98554,  -0.16945
+    0x3fef8ba737cb4b78,     0xbfc57f008654cbde,     //    0.9858,  -0.16794
+    0x3fef8dc10a95380d,     0xbfc54d71aa74ef02,     //   0.98605,  -0.16643
+    0x3fef8fd5ffae41db,     0xbfc51bdf8597c5f2,     //   0.98631,  -0.16491
+    0x3fef91e616c43891,     0xbfc4ea4a1f624b61,     //   0.98656,   -0.1634
+    0x3fef93f14f85ac08,     0xbfc4b8b17f79fa88,     //   0.98681,  -0.16189
+    0x3fef95f7a9a1ec47,     0xbfc48715ad84cdf5,     //   0.98706,  -0.16037
+    0x3fef97f924c9099b,     0xbfc45576b1293e5a,     //    0.9873,  -0.15886
+    0x3fef99f5c0abd496,     0xbfc423d4920e4166,     //   0.98754,  -0.15734
+    0x3fef9bed7cfbde29,     0xbfc3f22f57db4893,     //   0.98778,  -0.15583
+    0x3fef9de0596b77a3,     0xbfc3c0870a383ff6,     //   0.98802,  -0.15431
+    0x3fef9fce55adb2c8,     0xbfc38edbb0cd8d14,     //   0.98826,   -0.1528
+    0x3fefa1b7717661d5,     0xbfc35d2d53440db2,     //   0.98849,  -0.15128
+    0x3fefa39bac7a1791,     0xbfc32b7bf94516a7,     //   0.98872,  -0.14976
+    0x3fefa57b066e2754,     0xbfc2f9c7aa7a72af,     //   0.98895,  -0.14825
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //   0.98918,  -0.14673
+    0x3fefa92b1600657c,     0xbfc296564d2b953e,     //    0.9894,  -0.14521
+    0x3fefaafbcb0cfddc,     0xbfc264994dfd340a,     //   0.98962,   -0.1437
+    0x3fefacc79de6c44f,     0xbfc232d978aed413,     //   0.98984,  -0.14218
+    0x3fefae8e8e46cfbb,     0xbfc20116d4ec7bce,     //   0.99006,  -0.14066
+    0x3fefb0509be6f7db,     0xbfc1cf516a62a077,     //   0.99027,  -0.13914
+    0x3fefb20dc681d54d,     0xbfc19d8940be24e7,     //   0.99049,  -0.13762
+    0x3fefb3c60dd2c199,     0xbfc16bbe5fac5865,     //    0.9907,   -0.1361
+    0x3fefb5797195d741,     0xbfc139f0cedaf576,     //    0.9909,  -0.13458
+    0x3fefb727f187f1c7,     0xbfc1082095f820b0,     //   0.99111,  -0.13306
+    0x3fefb8d18d66adb7,     0xbfc0d64dbcb26786,     //   0.99131,  -0.13154
+    0x3fefba7644f068b5,     0xbfc0a4784ab8bf1d,     //   0.99151,  -0.13002
+    0x3fefbc1617e44186,     0xbfc072a047ba831d,     //   0.99171,   -0.1285
+    0x3fefbdb106021816,     0xbfc040c5bb67747e,     //   0.99191,  -0.12698
+    0x3fefbf470f0a8d88,     0xbfc00ee8ad6fb85b,     //    0.9921,  -0.12545
+    0x3fefc0d832bf043a,     0xbfbfba124b07ad85,     //   0.99229,  -0.12393
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     //   0.99248,  -0.12241
+    0x3fefc3ebc935454c,     0xbfbef2858d27561b,     //   0.99267,  -0.12089
+    0x3fefc56e3b7d9af6,     0xbfbe8eb7fde4aa3e,     //   0.99285,  -0.11937
+    0x3fefc6ebc77f0887,     0xbfbe2ae5b8457f77,     //   0.99303,  -0.11784
+    0x3fefc8646cfeb721,     0xbfbdc70ecbae9fc8,     //   0.99321,  -0.11632
+    0x3fefc9d82bc2915e,     0xbfbd633347858ce4,     //   0.99339,  -0.11479
+    0x3fefcb4703914354,     0xbfbcff533b307dc1,     //   0.99356,  -0.11327
+    0x3fefccb0f4323aa3,     0xbfbc9b6eb6165c42,     //   0.99374,  -0.11175
+    0x3fefce15fd6da67b,     0xbfbc3785c79ec2d5,     //   0.99391,  -0.11022
+    0x3fefcf761f0c77a3,     0xbfbbd3987f31fa0e,     //   0.99407,   -0.1087
+    0x3fefd0d158d86087,     0xbfbb6fa6ec38f64c,     //   0.99424,  -0.10717
+    0x3fefd227aa9bd53b,     0xbfbb0bb11e1d5559,     //    0.9944,  -0.10565
+    0x3fefd37914220b84,     0xbfbaa7b724495c04,     //   0.99456,  -0.10412
+    0x3fefd4c59536fae4,     0xbfba43b90e27f3c4,     //   0.99472,   -0.1026
+    0x3fefd60d2da75c9e,     0xbfb9dfb6eb24a85c,     //   0.99488,  -0.10107
+    0x3fefd74fdd40abbf,     0xbfb97bb0caaba56f,     //   0.99503, -0.099544
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //   0.99518, -0.098017
+    0x3fefd9c68127c78c,     0xbfb8b398cf0c38e0,     //   0.99533,  -0.09649
+    0x3fefdafa7514538c,     0xbfb84f8712c130a0,     //   0.99548, -0.094963
+    0x3fefdc297f674ba9,     0xbfb7eb7196b72ee4,     //   0.99563, -0.093436
+    0x3fefdd539ff1f456,     0xbfb787586a5d5b21,     //   0.99577, -0.091909
+    0x3fefde78d68653fd,     0xbfb7233b9d236e71,     //   0.99591, -0.090381
+    0x3fefdf9922f73307,     0xbfb6bf1b3e79b129,     //   0.99604, -0.088854
+    0x3fefe0b485181be3,     0xbfb65af75dd0f87b,     //   0.99618, -0.087326
+    0x3fefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //   0.99631, -0.085797
+    0x3fefe2dc89bbff08,     0xbfb592a554489bc8,     //   0.99644, -0.084269
+    0x3fefe3e92be9d886,     0xbfb52e774a4d4d0a,     //   0.99657,  -0.08274
+    0x3fefe4f0e31d7a4a,     0xbfb4ca45fc1ba8b6,     //    0.9967, -0.081211
+    0x3fefe5f3af2e3940,     0xbfb4661179272096,     //   0.99682, -0.079682
+    0x3fefe6f18ff42c84,     0xbfb401d9d0e3a507,     //   0.99694, -0.078153
+    0x3fefe7ea85482d60,     0xbfb39d9f12c5a299,     //   0.99706, -0.076624
+    0x3fefe8de8f03d75c,     0xbfb339614e41ffa5,     //   0.99718, -0.075094
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     //   0.99729, -0.073565
+    0x3fefeab7df1c6005,     0xbfb270dcefdfc45b,     //    0.9974, -0.072035
+    0x3fefeb9d2530410f,     0xbfb20c9674ed444c,     //   0.99751, -0.070505
+    0x3fefec7d7f19cffc,     0xbfb1a84d316d4f8a,     //   0.99762, -0.068974
+    0x3fefed58ecb673c4,     0xbfb1440134d709b2,     //   0.99772, -0.067444
+    0x3fefee2f6de455ba,     0xbfb0dfb28ea201e6,     //   0.99783, -0.065913
+    0x3fefef0102826191,     0xbfb07b614e463064,     //   0.99793, -0.064383
+    0x3fefefcdaa704562,     0xbfb0170d833bf421,     //   0.99802, -0.062852
+    0x3feff095658e71ad,     0xbfaf656e79f820e0,     //   0.99812, -0.061321
+    0x3feff15833be1965,     0xbfae9cbd15ff5527,     //   0.99821,  -0.05979
+    0x3feff21614e131ed,     0xbfadd406f9808ec8,     //    0.9983, -0.058258
+    0x3feff2cf08da7321,     0xbfad0b4c436f91d0,     //   0.99839, -0.056727
+    0x3feff3830f8d575c,     0xbfac428d12c0d7e3,     //   0.99848, -0.055195
+    0x3feff43228de1b77,     0xbfab79c986698b78,     //   0.99856, -0.053664
+    0x3feff4dc54b1bed3,     0xbfaab101bd5f8317,     //   0.99864, -0.052132
+    0x3feff58192ee0358,     0xbfa9e835d6993c87,     //   0.99872,   -0.0506
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //    0.9988, -0.049068
+    0x3feff6bd463b444d,     0xbfa856922bb513c1,     //   0.99887, -0.047535
+    0x3feff753bb1b9164,     0xbfa78dbaa5874685,     //   0.99894, -0.046003
+    0x3feff7e5420320f9,     0xbfa6c4df7d7d5b84,     //   0.99901, -0.044471
+    0x3feff871dadb81df,     0xbfa5fc00d290cd43,     //   0.99908, -0.042938
+    0x3feff8f9858f058b,     0xbfa5331ec3bba0eb,     //   0.99914, -0.041406
+    0x3feff97c4208c014,     0xbfa46a396ff86179,     //    0.9992, -0.039873
+    0x3feff9fa10348837,     0xbfa3a150f6421afc,     //   0.99926,  -0.03834
+    0x3feffa72effef75d,     0xbfa2d865759455cd,     //   0.99932, -0.036807
+    0x3feffae6e1556998,     0xbfa20f770ceb11c6,     //   0.99938, -0.035274
+    0x3feffb55e425fdae,     0xbfa14685db42c17e,     //   0.99943, -0.033741
+    0x3feffbbff85f9515,     0xbfa07d91ff984580,     //   0.99948, -0.032208
+    0x3feffc251df1d3f8,     0xbf9f693731d1cf01,     //   0.99953, -0.030675
+    0x3feffc8554cd213a,     0xbf9dd7458c64ab39,     //   0.99958, -0.029142
+    0x3feffce09ce2a679,     0xbf9c454f4ce53b1c,     //   0.99962, -0.027608
+    0x3feffd36f624500c,     0xbf9ab354b1504fca,     //   0.99966, -0.026075
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //    0.9997, -0.024541
+    0x3feffdd4dbf78f52,     0xbf978f535ddc9f03,     //   0.99974, -0.023008
+    0x3feffe1c6870cb77,     0xbf95fd4d21fab226,     //   0.99977, -0.021474
+    0x3feffe5f05e578db,     0xbf946b4381fce81c,     //    0.9998,  -0.01994
+    0x3feffe9cb44b51a1,     0xbf92d936bbe30efd,     //   0.99983, -0.018407
+    0x3feffed57398d2b7,     0xbf9147270dad7132,     //   0.99986, -0.016873
+    0x3fefff0943c53bd1,     0xbf8f6a296ab997ca,     //   0.99988, -0.015339
+    0x3fefff3824c88f6f,     0xbf8c45ffe1e48ad9,     //    0.9999, -0.013805
+    0x3fefff62169b92db,     0xbf8921d1fcdec784,     //   0.99992, -0.012272
+    0x3fefff871937ce2f,     0xbf85fda037ac05e0,     //   0.99994, -0.010738
+    0x3fefffa72c978c4f,     0xbf82d96b0e509703,     //   0.99996,-0.0092038
+    0x3fefffc250b5daef,     0xbf7f6a65f9a2a3c5,     //   0.99997,-0.0076698
+    0x3fefffd8858e8a92,     0xbf7921f0fe670071,     //   0.99998,-0.0061359
+    0x3fefffe9cb1e2e8d,     0xbf72d97822f996bc,     //   0.99999,-0.0046019
+    0x3feffff621621d02,     0xbf6921f8becca4ba,     //         1, -0.003068
+    0x3feffffd88586ee6,     0xbf5921faaee6472d,     //         1, -0.001534
+
+
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_16[32] = {
+    1.000000000f,  0.000000000f,
+    0.923879533f,  0.382683432f,
+    0.707106781f,  0.707106781f,
+    0.382683432f,  0.923879533f,
+    0.000000000f,  1.000000000f,
+   -0.382683432f,  0.923879533f,
+   -0.707106781f,  0.707106781f,
+   -0.923879533f,  0.382683432f,
+   -1.000000000f,  0.000000000f,
+   -0.923879533f, -0.382683432f,
+   -0.707106781f, -0.707106781f,
+   -0.382683432f, -0.923879533f,
+   -0.000000000f, -1.000000000f,
+    0.382683432f, -0.923879533f,
+    0.707106781f, -0.707106781f,
+    0.923879533f, -0.382683432f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_32[64] = {
+    1.000000000f,  0.000000000f,
+    0.980785280f,  0.195090322f,
+    0.923879533f,  0.382683432f,
+    0.831469612f,  0.555570233f,
+    0.707106781f,  0.707106781f,
+    0.555570233f,  0.831469612f,
+    0.382683432f,  0.923879533f,
+    0.195090322f,  0.980785280f,
+    0.000000000f,  1.000000000f,
+   -0.195090322f,  0.980785280f,
+   -0.382683432f,  0.923879533f,
+   -0.555570233f,  0.831469612f,
+   -0.707106781f,  0.707106781f,
+   -0.831469612f,  0.555570233f,
+   -0.923879533f,  0.382683432f,
+   -0.980785280f,  0.195090322f,
+   -1.000000000f,  0.000000000f,
+   -0.980785280f, -0.195090322f,
+   -0.923879533f, -0.382683432f,
+   -0.831469612f, -0.555570233f,
+   -0.707106781f, -0.707106781f,
+   -0.555570233f, -0.831469612f,
+   -0.382683432f, -0.923879533f,
+   -0.195090322f, -0.980785280f,
+   -0.000000000f, -1.000000000f,
+    0.195090322f, -0.980785280f,
+    0.382683432f, -0.923879533f,
+    0.555570233f, -0.831469612f,
+    0.707106781f, -0.707106781f,
+    0.831469612f, -0.555570233f,
+    0.923879533f, -0.382683432f,
+    0.980785280f, -0.195090322f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for(i = 0; i < N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_64[128] = {
+    1.000000000f,  0.000000000f,
+    0.995184727f,  0.098017140f,
+    0.980785280f,  0.195090322f,
+    0.956940336f,  0.290284677f,
+    0.923879533f,  0.382683432f,
+    0.881921264f,  0.471396737f,
+    0.831469612f,  0.555570233f,
+    0.773010453f,  0.634393284f,
+    0.707106781f,  0.707106781f,
+    0.634393284f,  0.773010453f,
+    0.555570233f,  0.831469612f,
+    0.471396737f,  0.881921264f,
+    0.382683432f,  0.923879533f,
+    0.290284677f,  0.956940336f,
+    0.195090322f,  0.980785280f,
+    0.098017140f,  0.995184727f,
+    0.000000000f,  1.000000000f,
+   -0.098017140f,  0.995184727f,
+   -0.195090322f,  0.980785280f,
+   -0.290284677f,  0.956940336f,
+   -0.382683432f,  0.923879533f,
+   -0.471396737f,  0.881921264f,
+   -0.555570233f,  0.831469612f,
+   -0.634393284f,  0.773010453f,
+   -0.707106781f,  0.707106781f,
+   -0.773010453f,  0.634393284f,
+   -0.831469612f,  0.555570233f,
+   -0.881921264f,  0.471396737f,
+   -0.923879533f,  0.382683432f,
+   -0.956940336f,  0.290284677f,
+   -0.980785280f,  0.195090322f,
+   -0.995184727f,  0.098017140f,
+   -1.000000000f,  0.000000000f,
+   -0.995184727f, -0.098017140f,
+   -0.980785280f, -0.195090322f,
+   -0.956940336f, -0.290284677f,
+   -0.923879533f, -0.382683432f,
+   -0.881921264f, -0.471396737f,
+   -0.831469612f, -0.555570233f,
+   -0.773010453f, -0.634393284f,
+   -0.707106781f, -0.707106781f,
+   -0.634393284f, -0.773010453f,
+   -0.555570233f, -0.831469612f,
+   -0.471396737f, -0.881921264f,
+   -0.382683432f, -0.923879533f,
+   -0.290284677f, -0.956940336f,
+   -0.195090322f, -0.980785280f,
+   -0.098017140f, -0.995184727f,
+   -0.000000000f, -1.000000000f,
+    0.098017140f, -0.995184727f,
+    0.195090322f, -0.980785280f,
+    0.290284677f, -0.956940336f,
+    0.382683432f, -0.923879533f,
+    0.471396737f, -0.881921264f,
+    0.555570233f, -0.831469612f,
+    0.634393284f, -0.773010453f,
+    0.707106781f, -0.707106781f,
+    0.773010453f, -0.634393284f,
+    0.831469612f, -0.555570233f,
+    0.881921264f, -0.471396737f,
+    0.923879533f, -0.382683432f,
+    0.956940336f, -0.290284677f,
+    0.980785280f, -0.195090322f,
+    0.995184727f, -0.098017140f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_128[256] = {
+    1.000000000f,  0.000000000f,
+    0.998795456f,  0.049067674f,
+    0.995184727f,  0.098017140f,
+    0.989176510f,  0.146730474f,
+    0.980785280f,  0.195090322f,
+    0.970031253f,  0.242980180f,
+    0.956940336f,  0.290284677f,
+    0.941544065f,  0.336889853f,
+    0.923879533f,  0.382683432f,
+    0.903989293f,  0.427555093f,
+    0.881921264f,  0.471396737f,
+    0.857728610f,  0.514102744f,
+    0.831469612f,  0.555570233f,
+    0.803207531f,  0.595699304f,
+    0.773010453f,  0.634393284f,
+    0.740951125f,  0.671558955f,
+    0.707106781f,  0.707106781f,
+    0.671558955f,  0.740951125f,
+    0.634393284f,  0.773010453f,
+    0.595699304f,  0.803207531f,
+    0.555570233f,  0.831469612f,
+    0.514102744f,  0.857728610f,
+    0.471396737f,  0.881921264f,
+    0.427555093f,  0.903989293f,
+    0.382683432f,  0.923879533f,
+    0.336889853f,  0.941544065f,
+    0.290284677f,  0.956940336f,
+    0.242980180f,  0.970031253f,
+    0.195090322f,  0.980785280f,
+    0.146730474f,  0.989176510f,
+    0.098017140f,  0.995184727f,
+    0.049067674f,  0.998795456f,
+    0.000000000f,  1.000000000f,
+   -0.049067674f,  0.998795456f,
+   -0.098017140f,  0.995184727f,
+   -0.146730474f,  0.989176510f,
+   -0.195090322f,  0.980785280f,
+   -0.242980180f,  0.970031253f,
+   -0.290284677f,  0.956940336f,
+   -0.336889853f,  0.941544065f,
+   -0.382683432f,  0.923879533f,
+   -0.427555093f,  0.903989293f,
+   -0.471396737f,  0.881921264f,
+   -0.514102744f,  0.857728610f,
+   -0.555570233f,  0.831469612f,
+   -0.595699304f,  0.803207531f,
+   -0.634393284f,  0.773010453f,
+   -0.671558955f,  0.740951125f,
+   -0.707106781f,  0.707106781f,
+   -0.740951125f,  0.671558955f,
+   -0.773010453f,  0.634393284f,
+   -0.803207531f,  0.595699304f,
+   -0.831469612f,  0.555570233f,
+   -0.857728610f,  0.514102744f,
+   -0.881921264f,  0.471396737f,
+   -0.903989293f,  0.427555093f,
+   -0.923879533f,  0.382683432f,
+   -0.941544065f,  0.336889853f,
+   -0.956940336f,  0.290284677f,
+   -0.970031253f,  0.242980180f,
+   -0.980785280f,  0.195090322f,
+   -0.989176510f,  0.146730474f,
+   -0.995184727f,  0.098017140f,
+   -0.998795456f,  0.049067674f,
+   -1.000000000f,  0.000000000f,
+   -0.998795456f, -0.049067674f,
+   -0.995184727f, -0.098017140f,
+   -0.989176510f, -0.146730474f,
+   -0.980785280f, -0.195090322f,
+   -0.970031253f, -0.242980180f,
+   -0.956940336f, -0.290284677f,
+   -0.941544065f, -0.336889853f,
+   -0.923879533f, -0.382683432f,
+   -0.903989293f, -0.427555093f,
+   -0.881921264f, -0.471396737f,
+   -0.857728610f, -0.514102744f,
+   -0.831469612f, -0.555570233f,
+   -0.803207531f, -0.595699304f,
+   -0.773010453f, -0.634393284f,
+   -0.740951125f, -0.671558955f,
+   -0.707106781f, -0.707106781f,
+   -0.671558955f, -0.740951125f,
+   -0.634393284f, -0.773010453f,
+   -0.595699304f, -0.803207531f,
+   -0.555570233f, -0.831469612f,
+   -0.514102744f, -0.857728610f,
+   -0.471396737f, -0.881921264f,
+   -0.427555093f, -0.903989293f,
+   -0.382683432f, -0.923879533f,
+   -0.336889853f, -0.941544065f,
+   -0.290284677f, -0.956940336f,
+   -0.242980180f, -0.970031253f,
+   -0.195090322f, -0.980785280f,
+   -0.146730474f, -0.989176510f,
+   -0.098017140f, -0.995184727f,
+   -0.049067674f, -0.998795456f,
+   -0.000000000f, -1.000000000f,
+    0.049067674f, -0.998795456f,
+    0.098017140f, -0.995184727f,
+    0.146730474f, -0.989176510f,
+    0.195090322f, -0.980785280f,
+    0.242980180f, -0.970031253f,
+    0.290284677f, -0.956940336f,
+    0.336889853f, -0.941544065f,
+    0.382683432f, -0.923879533f,
+    0.427555093f, -0.903989293f,
+    0.471396737f, -0.881921264f,
+    0.514102744f, -0.857728610f,
+    0.555570233f, -0.831469612f,
+    0.595699304f, -0.803207531f,
+    0.634393284f, -0.773010453f,
+    0.671558955f, -0.740951125f,
+    0.707106781f, -0.707106781f,
+    0.740951125f, -0.671558955f,
+    0.773010453f, -0.634393284f,
+    0.803207531f, -0.595699304f,
+    0.831469612f, -0.555570233f,
+    0.857728610f, -0.514102744f,
+    0.881921264f, -0.471396737f,
+    0.903989293f, -0.427555093f,
+    0.923879533f, -0.382683432f,
+    0.941544065f, -0.336889853f,
+    0.956940336f, -0.290284677f,
+    0.970031253f, -0.242980180f,
+    0.980785280f, -0.195090322f,
+    0.989176510f, -0.146730474f,
+    0.995184727f, -0.098017140f,
+    0.998795456f, -0.049067674f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for(i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_256[512] = {
+    1.000000000f,  0.000000000f,
+    0.999698819f,  0.024541229f,
+    0.998795456f,  0.049067674f,
+    0.997290457f,  0.073564564f,
+    0.995184727f,  0.098017140f,
+    0.992479535f,  0.122410675f,
+    0.989176510f,  0.146730474f,
+    0.985277642f,  0.170961889f,
+    0.980785280f,  0.195090322f,
+    0.975702130f,  0.219101240f,
+    0.970031253f,  0.242980180f,
+    0.963776066f,  0.266712757f,
+    0.956940336f,  0.290284677f,
+    0.949528181f,  0.313681740f,
+    0.941544065f,  0.336889853f,
+    0.932992799f,  0.359895037f,
+    0.923879533f,  0.382683432f,
+    0.914209756f,  0.405241314f,
+    0.903989293f,  0.427555093f,
+    0.893224301f,  0.449611330f,
+    0.881921264f,  0.471396737f,
+    0.870086991f,  0.492898192f,
+    0.857728610f,  0.514102744f,
+    0.844853565f,  0.534997620f,
+    0.831469612f,  0.555570233f,
+    0.817584813f,  0.575808191f,
+    0.803207531f,  0.595699304f,
+    0.788346428f,  0.615231591f,
+    0.773010453f,  0.634393284f,
+    0.757208847f,  0.653172843f,
+    0.740951125f,  0.671558955f,
+    0.724247083f,  0.689540545f,
+    0.707106781f,  0.707106781f,
+    0.689540545f,  0.724247083f,
+    0.671558955f,  0.740951125f,
+    0.653172843f,  0.757208847f,
+    0.634393284f,  0.773010453f,
+    0.615231591f,  0.788346428f,
+    0.595699304f,  0.803207531f,
+    0.575808191f,  0.817584813f,
+    0.555570233f,  0.831469612f,
+    0.534997620f,  0.844853565f,
+    0.514102744f,  0.857728610f,
+    0.492898192f,  0.870086991f,
+    0.471396737f,  0.881921264f,
+    0.449611330f,  0.893224301f,
+    0.427555093f,  0.903989293f,
+    0.405241314f,  0.914209756f,
+    0.382683432f,  0.923879533f,
+    0.359895037f,  0.932992799f,
+    0.336889853f,  0.941544065f,
+    0.313681740f,  0.949528181f,
+    0.290284677f,  0.956940336f,
+    0.266712757f,  0.963776066f,
+    0.242980180f,  0.970031253f,
+    0.219101240f,  0.975702130f,
+    0.195090322f,  0.980785280f,
+    0.170961889f,  0.985277642f,
+    0.146730474f,  0.989176510f,
+    0.122410675f,  0.992479535f,
+    0.098017140f,  0.995184727f,
+    0.073564564f,  0.997290457f,
+    0.049067674f,  0.998795456f,
+    0.024541229f,  0.999698819f,
+    0.000000000f,  1.000000000f,
+   -0.024541229f,  0.999698819f,
+   -0.049067674f,  0.998795456f,
+   -0.073564564f,  0.997290457f,
+   -0.098017140f,  0.995184727f,
+   -0.122410675f,  0.992479535f,
+   -0.146730474f,  0.989176510f,
+   -0.170961889f,  0.985277642f,
+   -0.195090322f,  0.980785280f,
+   -0.219101240f,  0.975702130f,
+   -0.242980180f,  0.970031253f,
+   -0.266712757f,  0.963776066f,
+   -0.290284677f,  0.956940336f,
+   -0.313681740f,  0.949528181f,
+   -0.336889853f,  0.941544065f,
+   -0.359895037f,  0.932992799f,
+   -0.382683432f,  0.923879533f,
+   -0.405241314f,  0.914209756f,
+   -0.427555093f,  0.903989293f,
+   -0.449611330f,  0.893224301f,
+   -0.471396737f,  0.881921264f,
+   -0.492898192f,  0.870086991f,
+   -0.514102744f,  0.857728610f,
+   -0.534997620f,  0.844853565f,
+   -0.555570233f,  0.831469612f,
+   -0.575808191f,  0.817584813f,
+   -0.595699304f,  0.803207531f,
+   -0.615231591f,  0.788346428f,
+   -0.634393284f,  0.773010453f,
+   -0.653172843f,  0.757208847f,
+   -0.671558955f,  0.740951125f,
+   -0.689540545f,  0.724247083f,
+   -0.707106781f,  0.707106781f,
+   -0.724247083f,  0.689540545f,
+   -0.740951125f,  0.671558955f,
+   -0.757208847f,  0.653172843f,
+   -0.773010453f,  0.634393284f,
+   -0.788346428f,  0.615231591f,
+   -0.803207531f,  0.595699304f,
+   -0.817584813f,  0.575808191f,
+   -0.831469612f,  0.555570233f,
+   -0.844853565f,  0.534997620f,
+   -0.857728610f,  0.514102744f,
+   -0.870086991f,  0.492898192f,
+   -0.881921264f,  0.471396737f,
+   -0.893224301f,  0.449611330f,
+   -0.903989293f,  0.427555093f,
+   -0.914209756f,  0.405241314f,
+   -0.923879533f,  0.382683432f,
+   -0.932992799f,  0.359895037f,
+   -0.941544065f,  0.336889853f,
+   -0.949528181f,  0.313681740f,
+   -0.956940336f,  0.290284677f,
+   -0.963776066f,  0.266712757f,
+   -0.970031253f,  0.242980180f,
+   -0.975702130f,  0.219101240f,
+   -0.980785280f,  0.195090322f,
+   -0.985277642f,  0.170961889f,
+   -0.989176510f,  0.146730474f,
+   -0.992479535f,  0.122410675f,
+   -0.995184727f,  0.098017140f,
+   -0.997290457f,  0.073564564f,
+   -0.998795456f,  0.049067674f,
+   -0.999698819f,  0.024541229f,
+   -1.000000000f,  0.000000000f,
+   -0.999698819f, -0.024541229f,
+   -0.998795456f, -0.049067674f,
+   -0.997290457f, -0.073564564f,
+   -0.995184727f, -0.098017140f,
+   -0.992479535f, -0.122410675f,
+   -0.989176510f, -0.146730474f,
+   -0.985277642f, -0.170961889f,
+   -0.980785280f, -0.195090322f,
+   -0.975702130f, -0.219101240f,
+   -0.970031253f, -0.242980180f,
+   -0.963776066f, -0.266712757f,
+   -0.956940336f, -0.290284677f,
+   -0.949528181f, -0.313681740f,
+   -0.941544065f, -0.336889853f,
+   -0.932992799f, -0.359895037f,
+   -0.923879533f, -0.382683432f,
+   -0.914209756f, -0.405241314f,
+   -0.903989293f, -0.427555093f,
+   -0.893224301f, -0.449611330f,
+   -0.881921264f, -0.471396737f,
+   -0.870086991f, -0.492898192f,
+   -0.857728610f, -0.514102744f,
+   -0.844853565f, -0.534997620f,
+   -0.831469612f, -0.555570233f,
+   -0.817584813f, -0.575808191f,
+   -0.803207531f, -0.595699304f,
+   -0.788346428f, -0.615231591f,
+   -0.773010453f, -0.634393284f,
+   -0.757208847f, -0.653172843f,
+   -0.740951125f, -0.671558955f,
+   -0.724247083f, -0.689540545f,
+   -0.707106781f, -0.707106781f,
+   -0.689540545f, -0.724247083f,
+   -0.671558955f, -0.740951125f,
+   -0.653172843f, -0.757208847f,
+   -0.634393284f, -0.773010453f,
+   -0.615231591f, -0.788346428f,
+   -0.595699304f, -0.803207531f,
+   -0.575808191f, -0.817584813f,
+   -0.555570233f, -0.831469612f,
+   -0.534997620f, -0.844853565f,
+   -0.514102744f, -0.857728610f,
+   -0.492898192f, -0.870086991f,
+   -0.471396737f, -0.881921264f,
+   -0.449611330f, -0.893224301f,
+   -0.427555093f, -0.903989293f,
+   -0.405241314f, -0.914209756f,
+   -0.382683432f, -0.923879533f,
+   -0.359895037f, -0.932992799f,
+   -0.336889853f, -0.941544065f,
+   -0.313681740f, -0.949528181f,
+   -0.290284677f, -0.956940336f,
+   -0.266712757f, -0.963776066f,
+   -0.242980180f, -0.970031253f,
+   -0.219101240f, -0.975702130f,
+   -0.195090322f, -0.980785280f,
+   -0.170961889f, -0.985277642f,
+   -0.146730474f, -0.989176510f,
+   -0.122410675f, -0.992479535f,
+   -0.098017140f, -0.995184727f,
+   -0.073564564f, -0.997290457f,
+   -0.049067674f, -0.998795456f,
+   -0.024541229f, -0.999698819f,
+   -0.000000000f, -1.000000000f,
+    0.024541229f, -0.999698819f,
+    0.049067674f, -0.998795456f,
+    0.073564564f, -0.997290457f,
+    0.098017140f, -0.995184727f,
+    0.122410675f, -0.992479535f,
+    0.146730474f, -0.989176510f,
+    0.170961889f, -0.985277642f,
+    0.195090322f, -0.980785280f,
+    0.219101240f, -0.975702130f,
+    0.242980180f, -0.970031253f,
+    0.266712757f, -0.963776066f,
+    0.290284677f, -0.956940336f,
+    0.313681740f, -0.949528181f,
+    0.336889853f, -0.941544065f,
+    0.359895037f, -0.932992799f,
+    0.382683432f, -0.923879533f,
+    0.405241314f, -0.914209756f,
+    0.427555093f, -0.903989293f,
+    0.449611330f, -0.893224301f,
+    0.471396737f, -0.881921264f,
+    0.492898192f, -0.870086991f,
+    0.514102744f, -0.857728610f,
+    0.534997620f, -0.844853565f,
+    0.555570233f, -0.831469612f,
+    0.575808191f, -0.817584813f,
+    0.595699304f, -0.803207531f,
+    0.615231591f, -0.788346428f,
+    0.634393284f, -0.773010453f,
+    0.653172843f, -0.757208847f,
+    0.671558955f, -0.740951125f,
+    0.689540545f, -0.724247083f,
+    0.707106781f, -0.707106781f,
+    0.724247083f, -0.689540545f,
+    0.740951125f, -0.671558955f,
+    0.757208847f, -0.653172843f,
+    0.773010453f, -0.634393284f,
+    0.788346428f, -0.615231591f,
+    0.803207531f, -0.595699304f,
+    0.817584813f, -0.575808191f,
+    0.831469612f, -0.555570233f,
+    0.844853565f, -0.534997620f,
+    0.857728610f, -0.514102744f,
+    0.870086991f, -0.492898192f,
+    0.881921264f, -0.471396737f,
+    0.893224301f, -0.449611330f,
+    0.903989293f, -0.427555093f,
+    0.914209756f, -0.405241314f,
+    0.923879533f, -0.382683432f,
+    0.932992799f, -0.359895037f,
+    0.941544065f, -0.336889853f,
+    0.949528181f, -0.313681740f,
+    0.956940336f, -0.290284677f,
+    0.963776066f, -0.266712757f,
+    0.970031253f, -0.242980180f,
+    0.975702130f, -0.219101240f,
+    0.980785280f, -0.195090322f,
+    0.985277642f, -0.170961889f,
+    0.989176510f, -0.146730474f,
+    0.992479535f, -0.122410675f,
+    0.995184727f, -0.098017140f,
+    0.997290457f, -0.073564564f,
+    0.998795456f, -0.049067674f,
+    0.999698819f, -0.024541229f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_512[1024] = {
+    1.000000000f,  0.000000000f,
+    0.999924702f,  0.012271538f,
+    0.999698819f,  0.024541229f,
+    0.999322385f,  0.036807223f,
+    0.998795456f,  0.049067674f,
+    0.998118113f,  0.061320736f,
+    0.997290457f,  0.073564564f,
+    0.996312612f,  0.085797312f,
+    0.995184727f,  0.098017140f,
+    0.993906970f,  0.110222207f,
+    0.992479535f,  0.122410675f,
+    0.990902635f,  0.134580709f,
+    0.989176510f,  0.146730474f,
+    0.987301418f,  0.158858143f,
+    0.985277642f,  0.170961889f,
+    0.983105487f,  0.183039888f,
+    0.980785280f,  0.195090322f,
+    0.978317371f,  0.207111376f,
+    0.975702130f,  0.219101240f,
+    0.972939952f,  0.231058108f,
+    0.970031253f,  0.242980180f,
+    0.966976471f,  0.254865660f,
+    0.963776066f,  0.266712757f,
+    0.960430519f,  0.278519689f,
+    0.956940336f,  0.290284677f,
+    0.953306040f,  0.302005949f,
+    0.949528181f,  0.313681740f,
+    0.945607325f,  0.325310292f,
+    0.941544065f,  0.336889853f,
+    0.937339012f,  0.348418680f,
+    0.932992799f,  0.359895037f,
+    0.928506080f,  0.371317194f,
+    0.923879533f,  0.382683432f,
+    0.919113852f,  0.393992040f,
+    0.914209756f,  0.405241314f,
+    0.909167983f,  0.416429560f,
+    0.903989293f,  0.427555093f,
+    0.898674466f,  0.438616239f,
+    0.893224301f,  0.449611330f,
+    0.887639620f,  0.460538711f,
+    0.881921264f,  0.471396737f,
+    0.876070094f,  0.482183772f,
+    0.870086991f,  0.492898192f,
+    0.863972856f,  0.503538384f,
+    0.857728610f,  0.514102744f,
+    0.851355193f,  0.524589683f,
+    0.844853565f,  0.534997620f,
+    0.838224706f,  0.545324988f,
+    0.831469612f,  0.555570233f,
+    0.824589303f,  0.565731811f,
+    0.817584813f,  0.575808191f,
+    0.810457198f,  0.585797857f,
+    0.803207531f,  0.595699304f,
+    0.795836905f,  0.605511041f,
+    0.788346428f,  0.615231591f,
+    0.780737229f,  0.624859488f,
+    0.773010453f,  0.634393284f,
+    0.765167266f,  0.643831543f,
+    0.757208847f,  0.653172843f,
+    0.749136395f,  0.662415778f,
+    0.740951125f,  0.671558955f,
+    0.732654272f,  0.680600998f,
+    0.724247083f,  0.689540545f,
+    0.715730825f,  0.698376249f,
+    0.707106781f,  0.707106781f,
+    0.698376249f,  0.715730825f,
+    0.689540545f,  0.724247083f,
+    0.680600998f,  0.732654272f,
+    0.671558955f,  0.740951125f,
+    0.662415778f,  0.749136395f,
+    0.653172843f,  0.757208847f,
+    0.643831543f,  0.765167266f,
+    0.634393284f,  0.773010453f,
+    0.624859488f,  0.780737229f,
+    0.615231591f,  0.788346428f,
+    0.605511041f,  0.795836905f,
+    0.595699304f,  0.803207531f,
+    0.585797857f,  0.810457198f,
+    0.575808191f,  0.817584813f,
+    0.565731811f,  0.824589303f,
+    0.555570233f,  0.831469612f,
+    0.545324988f,  0.838224706f,
+    0.534997620f,  0.844853565f,
+    0.524589683f,  0.851355193f,
+    0.514102744f,  0.857728610f,
+    0.503538384f,  0.863972856f,
+    0.492898192f,  0.870086991f,
+    0.482183772f,  0.876070094f,
+    0.471396737f,  0.881921264f,
+    0.460538711f,  0.887639620f,
+    0.449611330f,  0.893224301f,
+    0.438616239f,  0.898674466f,
+    0.427555093f,  0.903989293f,
+    0.416429560f,  0.909167983f,
+    0.405241314f,  0.914209756f,
+    0.393992040f,  0.919113852f,
+    0.382683432f,  0.923879533f,
+    0.371317194f,  0.928506080f,
+    0.359895037f,  0.932992799f,
+    0.348418680f,  0.937339012f,
+    0.336889853f,  0.941544065f,
+    0.325310292f,  0.945607325f,
+    0.313681740f,  0.949528181f,
+    0.302005949f,  0.953306040f,
+    0.290284677f,  0.956940336f,
+    0.278519689f,  0.960430519f,
+    0.266712757f,  0.963776066f,
+    0.254865660f,  0.966976471f,
+    0.242980180f,  0.970031253f,
+    0.231058108f,  0.972939952f,
+    0.219101240f,  0.975702130f,
+    0.207111376f,  0.978317371f,
+    0.195090322f,  0.980785280f,
+    0.183039888f,  0.983105487f,
+    0.170961889f,  0.985277642f,
+    0.158858143f,  0.987301418f,
+    0.146730474f,  0.989176510f,
+    0.134580709f,  0.990902635f,
+    0.122410675f,  0.992479535f,
+    0.110222207f,  0.993906970f,
+    0.098017140f,  0.995184727f,
+    0.085797312f,  0.996312612f,
+    0.073564564f,  0.997290457f,
+    0.061320736f,  0.998118113f,
+    0.049067674f,  0.998795456f,
+    0.036807223f,  0.999322385f,
+    0.024541229f,  0.999698819f,
+    0.012271538f,  0.999924702f,
+    0.000000000f,  1.000000000f,
+   -0.012271538f,  0.999924702f,
+   -0.024541229f,  0.999698819f,
+   -0.036807223f,  0.999322385f,
+   -0.049067674f,  0.998795456f,
+   -0.061320736f,  0.998118113f,
+   -0.073564564f,  0.997290457f,
+   -0.085797312f,  0.996312612f,
+   -0.098017140f,  0.995184727f,
+   -0.110222207f,  0.993906970f,
+   -0.122410675f,  0.992479535f,
+   -0.134580709f,  0.990902635f,
+   -0.146730474f,  0.989176510f,
+   -0.158858143f,  0.987301418f,
+   -0.170961889f,  0.985277642f,
+   -0.183039888f,  0.983105487f,
+   -0.195090322f,  0.980785280f,
+   -0.207111376f,  0.978317371f,
+   -0.219101240f,  0.975702130f,
+   -0.231058108f,  0.972939952f,
+   -0.242980180f,  0.970031253f,
+   -0.254865660f,  0.966976471f,
+   -0.266712757f,  0.963776066f,
+   -0.278519689f,  0.960430519f,
+   -0.290284677f,  0.956940336f,
+   -0.302005949f,  0.953306040f,
+   -0.313681740f,  0.949528181f,
+   -0.325310292f,  0.945607325f,
+   -0.336889853f,  0.941544065f,
+   -0.348418680f,  0.937339012f,
+   -0.359895037f,  0.932992799f,
+   -0.371317194f,  0.928506080f,
+   -0.382683432f,  0.923879533f,
+   -0.393992040f,  0.919113852f,
+   -0.405241314f,  0.914209756f,
+   -0.416429560f,  0.909167983f,
+   -0.427555093f,  0.903989293f,
+   -0.438616239f,  0.898674466f,
+   -0.449611330f,  0.893224301f,
+   -0.460538711f,  0.887639620f,
+   -0.471396737f,  0.881921264f,
+   -0.482183772f,  0.876070094f,
+   -0.492898192f,  0.870086991f,
+   -0.503538384f,  0.863972856f,
+   -0.514102744f,  0.857728610f,
+   -0.524589683f,  0.851355193f,
+   -0.534997620f,  0.844853565f,
+   -0.545324988f,  0.838224706f,
+   -0.555570233f,  0.831469612f,
+   -0.565731811f,  0.824589303f,
+   -0.575808191f,  0.817584813f,
+   -0.585797857f,  0.810457198f,
+   -0.595699304f,  0.803207531f,
+   -0.605511041f,  0.795836905f,
+   -0.615231591f,  0.788346428f,
+   -0.624859488f,  0.780737229f,
+   -0.634393284f,  0.773010453f,
+   -0.643831543f,  0.765167266f,
+   -0.653172843f,  0.757208847f,
+   -0.662415778f,  0.749136395f,
+   -0.671558955f,  0.740951125f,
+   -0.680600998f,  0.732654272f,
+   -0.689540545f,  0.724247083f,
+   -0.698376249f,  0.715730825f,
+   -0.707106781f,  0.707106781f,
+   -0.715730825f,  0.698376249f,
+   -0.724247083f,  0.689540545f,
+   -0.732654272f,  0.680600998f,
+   -0.740951125f,  0.671558955f,
+   -0.749136395f,  0.662415778f,
+   -0.757208847f,  0.653172843f,
+   -0.765167266f,  0.643831543f,
+   -0.773010453f,  0.634393284f,
+   -0.780737229f,  0.624859488f,
+   -0.788346428f,  0.615231591f,
+   -0.795836905f,  0.605511041f,
+   -0.803207531f,  0.595699304f,
+   -0.810457198f,  0.585797857f,
+   -0.817584813f,  0.575808191f,
+   -0.824589303f,  0.565731811f,
+   -0.831469612f,  0.555570233f,
+   -0.838224706f,  0.545324988f,
+   -0.844853565f,  0.534997620f,
+   -0.851355193f,  0.524589683f,
+   -0.857728610f,  0.514102744f,
+   -0.863972856f,  0.503538384f,
+   -0.870086991f,  0.492898192f,
+   -0.876070094f,  0.482183772f,
+   -0.881921264f,  0.471396737f,
+   -0.887639620f,  0.460538711f,
+   -0.893224301f,  0.449611330f,
+   -0.898674466f,  0.438616239f,
+   -0.903989293f,  0.427555093f,
+   -0.909167983f,  0.416429560f,
+   -0.914209756f,  0.405241314f,
+   -0.919113852f,  0.393992040f,
+   -0.923879533f,  0.382683432f,
+   -0.928506080f,  0.371317194f,
+   -0.932992799f,  0.359895037f,
+   -0.937339012f,  0.348418680f,
+   -0.941544065f,  0.336889853f,
+   -0.945607325f,  0.325310292f,
+   -0.949528181f,  0.313681740f,
+   -0.953306040f,  0.302005949f,
+   -0.956940336f,  0.290284677f,
+   -0.960430519f,  0.278519689f,
+   -0.963776066f,  0.266712757f,
+   -0.966976471f,  0.254865660f,
+   -0.970031253f,  0.242980180f,
+   -0.972939952f,  0.231058108f,
+   -0.975702130f,  0.219101240f,
+   -0.978317371f,  0.207111376f,
+   -0.980785280f,  0.195090322f,
+   -0.983105487f,  0.183039888f,
+   -0.985277642f,  0.170961889f,
+   -0.987301418f,  0.158858143f,
+   -0.989176510f,  0.146730474f,
+   -0.990902635f,  0.134580709f,
+   -0.992479535f,  0.122410675f,
+   -0.993906970f,  0.110222207f,
+   -0.995184727f,  0.098017140f,
+   -0.996312612f,  0.085797312f,
+   -0.997290457f,  0.073564564f,
+   -0.998118113f,  0.061320736f,
+   -0.998795456f,  0.049067674f,
+   -0.999322385f,  0.036807223f,
+   -0.999698819f,  0.024541229f,
+   -0.999924702f,  0.012271538f,
+   -1.000000000f,  0.000000000f,
+   -0.999924702f, -0.012271538f,
+   -0.999698819f, -0.024541229f,
+   -0.999322385f, -0.036807223f,
+   -0.998795456f, -0.049067674f,
+   -0.998118113f, -0.061320736f,
+   -0.997290457f, -0.073564564f,
+   -0.996312612f, -0.085797312f,
+   -0.995184727f, -0.098017140f,
+   -0.993906970f, -0.110222207f,
+   -0.992479535f, -0.122410675f,
+   -0.990902635f, -0.134580709f,
+   -0.989176510f, -0.146730474f,
+   -0.987301418f, -0.158858143f,
+   -0.985277642f, -0.170961889f,
+   -0.983105487f, -0.183039888f,
+   -0.980785280f, -0.195090322f,
+   -0.978317371f, -0.207111376f,
+   -0.975702130f, -0.219101240f,
+   -0.972939952f, -0.231058108f,
+   -0.970031253f, -0.242980180f,
+   -0.966976471f, -0.254865660f,
+   -0.963776066f, -0.266712757f,
+   -0.960430519f, -0.278519689f,
+   -0.956940336f, -0.290284677f,
+   -0.953306040f, -0.302005949f,
+   -0.949528181f, -0.313681740f,
+   -0.945607325f, -0.325310292f,
+   -0.941544065f, -0.336889853f,
+   -0.937339012f, -0.348418680f,
+   -0.932992799f, -0.359895037f,
+   -0.928506080f, -0.371317194f,
+   -0.923879533f, -0.382683432f,
+   -0.919113852f, -0.393992040f,
+   -0.914209756f, -0.405241314f,
+   -0.909167983f, -0.416429560f,
+   -0.903989293f, -0.427555093f,
+   -0.898674466f, -0.438616239f,
+   -0.893224301f, -0.449611330f,
+   -0.887639620f, -0.460538711f,
+   -0.881921264f, -0.471396737f,
+   -0.876070094f, -0.482183772f,
+   -0.870086991f, -0.492898192f,
+   -0.863972856f, -0.503538384f,
+   -0.857728610f, -0.514102744f,
+   -0.851355193f, -0.524589683f,
+   -0.844853565f, -0.534997620f,
+   -0.838224706f, -0.545324988f,
+   -0.831469612f, -0.555570233f,
+   -0.824589303f, -0.565731811f,
+   -0.817584813f, -0.575808191f,
+   -0.810457198f, -0.585797857f,
+   -0.803207531f, -0.595699304f,
+   -0.795836905f, -0.605511041f,
+   -0.788346428f, -0.615231591f,
+   -0.780737229f, -0.624859488f,
+   -0.773010453f, -0.634393284f,
+   -0.765167266f, -0.643831543f,
+   -0.757208847f, -0.653172843f,
+   -0.749136395f, -0.662415778f,
+   -0.740951125f, -0.671558955f,
+   -0.732654272f, -0.680600998f,
+   -0.724247083f, -0.689540545f,
+   -0.715730825f, -0.698376249f,
+   -0.707106781f, -0.707106781f,
+   -0.698376249f, -0.715730825f,
+   -0.689540545f, -0.724247083f,
+   -0.680600998f, -0.732654272f,
+   -0.671558955f, -0.740951125f,
+   -0.662415778f, -0.749136395f,
+   -0.653172843f, -0.757208847f,
+   -0.643831543f, -0.765167266f,
+   -0.634393284f, -0.773010453f,
+   -0.624859488f, -0.780737229f,
+   -0.615231591f, -0.788346428f,
+   -0.605511041f, -0.795836905f,
+   -0.595699304f, -0.803207531f,
+   -0.585797857f, -0.810457198f,
+   -0.575808191f, -0.817584813f,
+   -0.565731811f, -0.824589303f,
+   -0.555570233f, -0.831469612f,
+   -0.545324988f, -0.838224706f,
+   -0.534997620f, -0.844853565f,
+   -0.524589683f, -0.851355193f,
+   -0.514102744f, -0.857728610f,
+   -0.503538384f, -0.863972856f,
+   -0.492898192f, -0.870086991f,
+   -0.482183772f, -0.876070094f,
+   -0.471396737f, -0.881921264f,
+   -0.460538711f, -0.887639620f,
+   -0.449611330f, -0.893224301f,
+   -0.438616239f, -0.898674466f,
+   -0.427555093f, -0.903989293f,
+   -0.416429560f, -0.909167983f,
+   -0.405241314f, -0.914209756f,
+   -0.393992040f, -0.919113852f,
+   -0.382683432f, -0.923879533f,
+   -0.371317194f, -0.928506080f,
+   -0.359895037f, -0.932992799f,
+   -0.348418680f, -0.937339012f,
+   -0.336889853f, -0.941544065f,
+   -0.325310292f, -0.945607325f,
+   -0.313681740f, -0.949528181f,
+   -0.302005949f, -0.953306040f,
+   -0.290284677f, -0.956940336f,
+   -0.278519689f, -0.960430519f,
+   -0.266712757f, -0.963776066f,
+   -0.254865660f, -0.966976471f,
+   -0.242980180f, -0.970031253f,
+   -0.231058108f, -0.972939952f,
+   -0.219101240f, -0.975702130f,
+   -0.207111376f, -0.978317371f,
+   -0.195090322f, -0.980785280f,
+   -0.183039888f, -0.983105487f,
+   -0.170961889f, -0.985277642f,
+   -0.158858143f, -0.987301418f,
+   -0.146730474f, -0.989176510f,
+   -0.134580709f, -0.990902635f,
+   -0.122410675f, -0.992479535f,
+   -0.110222207f, -0.993906970f,
+   -0.098017140f, -0.995184727f,
+   -0.085797312f, -0.996312612f,
+   -0.073564564f, -0.997290457f,
+   -0.061320736f, -0.998118113f,
+   -0.049067674f, -0.998795456f,
+   -0.036807223f, -0.999322385f,
+   -0.024541229f, -0.999698819f,
+   -0.012271538f, -0.999924702f,
+   -0.000000000f, -1.000000000f,
+    0.012271538f, -0.999924702f,
+    0.024541229f, -0.999698819f,
+    0.036807223f, -0.999322385f,
+    0.049067674f, -0.998795456f,
+    0.061320736f, -0.998118113f,
+    0.073564564f, -0.997290457f,
+    0.085797312f, -0.996312612f,
+    0.098017140f, -0.995184727f,
+    0.110222207f, -0.993906970f,
+    0.122410675f, -0.992479535f,
+    0.134580709f, -0.990902635f,
+    0.146730474f, -0.989176510f,
+    0.158858143f, -0.987301418f,
+    0.170961889f, -0.985277642f,
+    0.183039888f, -0.983105487f,
+    0.195090322f, -0.980785280f,
+    0.207111376f, -0.978317371f,
+    0.219101240f, -0.975702130f,
+    0.231058108f, -0.972939952f,
+    0.242980180f, -0.970031253f,
+    0.254865660f, -0.966976471f,
+    0.266712757f, -0.963776066f,
+    0.278519689f, -0.960430519f,
+    0.290284677f, -0.956940336f,
+    0.302005949f, -0.953306040f,
+    0.313681740f, -0.949528181f,
+    0.325310292f, -0.945607325f,
+    0.336889853f, -0.941544065f,
+    0.348418680f, -0.937339012f,
+    0.359895037f, -0.932992799f,
+    0.371317194f, -0.928506080f,
+    0.382683432f, -0.923879533f,
+    0.393992040f, -0.919113852f,
+    0.405241314f, -0.914209756f,
+    0.416429560f, -0.909167983f,
+    0.427555093f, -0.903989293f,
+    0.438616239f, -0.898674466f,
+    0.449611330f, -0.893224301f,
+    0.460538711f, -0.887639620f,
+    0.471396737f, -0.881921264f,
+    0.482183772f, -0.876070094f,
+    0.492898192f, -0.870086991f,
+    0.503538384f, -0.863972856f,
+    0.514102744f, -0.857728610f,
+    0.524589683f, -0.851355193f,
+    0.534997620f, -0.844853565f,
+    0.545324988f, -0.838224706f,
+    0.555570233f, -0.831469612f,
+    0.565731811f, -0.824589303f,
+    0.575808191f, -0.817584813f,
+    0.585797857f, -0.810457198f,
+    0.595699304f, -0.803207531f,
+    0.605511041f, -0.795836905f,
+    0.615231591f, -0.788346428f,
+    0.624859488f, -0.780737229f,
+    0.634393284f, -0.773010453f,
+    0.643831543f, -0.765167266f,
+    0.653172843f, -0.757208847f,
+    0.662415778f, -0.749136395f,
+    0.671558955f, -0.740951125f,
+    0.680600998f, -0.732654272f,
+    0.689540545f, -0.724247083f,
+    0.698376249f, -0.715730825f,
+    0.707106781f, -0.707106781f,
+    0.715730825f, -0.698376249f,
+    0.724247083f, -0.689540545f,
+    0.732654272f, -0.680600998f,
+    0.740951125f, -0.671558955f,
+    0.749136395f, -0.662415778f,
+    0.757208847f, -0.653172843f,
+    0.765167266f, -0.643831543f,
+    0.773010453f, -0.634393284f,
+    0.780737229f, -0.624859488f,
+    0.788346428f, -0.615231591f,
+    0.795836905f, -0.605511041f,
+    0.803207531f, -0.595699304f,
+    0.810457198f, -0.585797857f,
+    0.817584813f, -0.575808191f,
+    0.824589303f, -0.565731811f,
+    0.831469612f, -0.555570233f,
+    0.838224706f, -0.545324988f,
+    0.844853565f, -0.534997620f,
+    0.851355193f, -0.524589683f,
+    0.857728610f, -0.514102744f,
+    0.863972856f, -0.503538384f,
+    0.870086991f, -0.492898192f,
+    0.876070094f, -0.482183772f,
+    0.881921264f, -0.471396737f,
+    0.887639620f, -0.460538711f,
+    0.893224301f, -0.449611330f,
+    0.898674466f, -0.438616239f,
+    0.903989293f, -0.427555093f,
+    0.909167983f, -0.416429560f,
+    0.914209756f, -0.405241314f,
+    0.919113852f, -0.393992040f,
+    0.923879533f, -0.382683432f,
+    0.928506080f, -0.371317194f,
+    0.932992799f, -0.359895037f,
+    0.937339012f, -0.348418680f,
+    0.941544065f, -0.336889853f,
+    0.945607325f, -0.325310292f,
+    0.949528181f, -0.313681740f,
+    0.953306040f, -0.302005949f,
+    0.956940336f, -0.290284677f,
+    0.960430519f, -0.278519689f,
+    0.963776066f, -0.266712757f,
+    0.966976471f, -0.254865660f,
+    0.970031253f, -0.242980180f,
+    0.972939952f, -0.231058108f,
+    0.975702130f, -0.219101240f,
+    0.978317371f, -0.207111376f,
+    0.980785280f, -0.195090322f,
+    0.983105487f, -0.183039888f,
+    0.985277642f, -0.170961889f,
+    0.987301418f, -0.158858143f,
+    0.989176510f, -0.146730474f,
+    0.990902635f, -0.134580709f,
+    0.992479535f, -0.122410675f,
+    0.993906970f, -0.110222207f,
+    0.995184727f, -0.098017140f,
+    0.996312612f, -0.085797312f,
+    0.997290457f, -0.073564564f,
+    0.998118113f, -0.061320736f,
+    0.998795456f, -0.049067674f,
+    0.999322385f, -0.036807223f,
+    0.999698819f, -0.024541229f,
+    0.999924702f, -0.012271538f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_1024[2048] = {
+    1.000000000f,  0.000000000f,
+    0.999981175f,  0.006135885f,
+    0.999924702f,  0.012271538f,
+    0.999830582f,  0.018406730f,
+    0.999698819f,  0.024541229f,
+    0.999529418f,  0.030674803f,
+    0.999322385f,  0.036807223f,
+    0.999077728f,  0.042938257f,
+    0.998795456f,  0.049067674f,
+    0.998475581f,  0.055195244f,
+    0.998118113f,  0.061320736f,
+    0.997723067f,  0.067443920f,
+    0.997290457f,  0.073564564f,
+    0.996820299f,  0.079682438f,
+    0.996312612f,  0.085797312f,
+    0.995767414f,  0.091908956f,
+    0.995184727f,  0.098017140f,
+    0.994564571f,  0.104121634f,
+    0.993906970f,  0.110222207f,
+    0.993211949f,  0.116318631f,
+    0.992479535f,  0.122410675f,
+    0.991709754f,  0.128498111f,
+    0.990902635f,  0.134580709f,
+    0.990058210f,  0.140658239f,
+    0.989176510f,  0.146730474f,
+    0.988257568f,  0.152797185f,
+    0.987301418f,  0.158858143f,
+    0.986308097f,  0.164913120f,
+    0.985277642f,  0.170961889f,
+    0.984210092f,  0.177004220f,
+    0.983105487f,  0.183039888f,
+    0.981963869f,  0.189068664f,
+    0.980785280f,  0.195090322f,
+    0.979569766f,  0.201104635f,
+    0.978317371f,  0.207111376f,
+    0.977028143f,  0.213110320f,
+    0.975702130f,  0.219101240f,
+    0.974339383f,  0.225083911f,
+    0.972939952f,  0.231058108f,
+    0.971503891f,  0.237023606f,
+    0.970031253f,  0.242980180f,
+    0.968522094f,  0.248927606f,
+    0.966976471f,  0.254865660f,
+    0.965394442f,  0.260794118f,
+    0.963776066f,  0.266712757f,
+    0.962121404f,  0.272621355f,
+    0.960430519f,  0.278519689f,
+    0.958703475f,  0.284407537f,
+    0.956940336f,  0.290284677f,
+    0.955141168f,  0.296150888f,
+    0.953306040f,  0.302005949f,
+    0.951435021f,  0.307849640f,
+    0.949528181f,  0.313681740f,
+    0.947585591f,  0.319502031f,
+    0.945607325f,  0.325310292f,
+    0.943593458f,  0.331106306f,
+    0.941544065f,  0.336889853f,
+    0.939459224f,  0.342660717f,
+    0.937339012f,  0.348418680f,
+    0.935183510f,  0.354163525f,
+    0.932992799f,  0.359895037f,
+    0.930766961f,  0.365612998f,
+    0.928506080f,  0.371317194f,
+    0.926210242f,  0.377007410f,
+    0.923879533f,  0.382683432f,
+    0.921514039f,  0.388345047f,
+    0.919113852f,  0.393992040f,
+    0.916679060f,  0.399624200f,
+    0.914209756f,  0.405241314f,
+    0.911706032f,  0.410843171f,
+    0.909167983f,  0.416429560f,
+    0.906595705f,  0.422000271f,
+    0.903989293f,  0.427555093f,
+    0.901348847f,  0.433093819f,
+    0.898674466f,  0.438616239f,
+    0.895966250f,  0.444122145f,
+    0.893224301f,  0.449611330f,
+    0.890448723f,  0.455083587f,
+    0.887639620f,  0.460538711f,
+    0.884797098f,  0.465976496f,
+    0.881921264f,  0.471396737f,
+    0.879012226f,  0.476799230f,
+    0.876070094f,  0.482183772f,
+    0.873094978f,  0.487550160f,
+    0.870086991f,  0.492898192f,
+    0.867046246f,  0.498227667f,
+    0.863972856f,  0.503538384f,
+    0.860866939f,  0.508830143f,
+    0.857728610f,  0.514102744f,
+    0.854557988f,  0.519355990f,
+    0.851355193f,  0.524589683f,
+    0.848120345f,  0.529803625f,
+    0.844853565f,  0.534997620f,
+    0.841554977f,  0.540171473f,
+    0.838224706f,  0.545324988f,
+    0.834862875f,  0.550457973f,
+    0.831469612f,  0.555570233f,
+    0.828045045f,  0.560661576f,
+    0.824589303f,  0.565731811f,
+    0.821102515f,  0.570780746f,
+    0.817584813f,  0.575808191f,
+    0.814036330f,  0.580813958f,
+    0.810457198f,  0.585797857f,
+    0.806847554f,  0.590759702f,
+    0.803207531f,  0.595699304f,
+    0.799537269f,  0.600616479f,
+    0.795836905f,  0.605511041f,
+    0.792106577f,  0.610382806f,
+    0.788346428f,  0.615231591f,
+    0.784556597f,  0.620057212f,
+    0.780737229f,  0.624859488f,
+    0.776888466f,  0.629638239f,
+    0.773010453f,  0.634393284f,
+    0.769103338f,  0.639124445f,
+    0.765167266f,  0.643831543f,
+    0.761202385f,  0.648514401f,
+    0.757208847f,  0.653172843f,
+    0.753186799f,  0.657806693f,
+    0.749136395f,  0.662415778f,
+    0.745057785f,  0.666999922f,
+    0.740951125f,  0.671558955f,
+    0.736816569f,  0.676092704f,
+    0.732654272f,  0.680600998f,
+    0.728464390f,  0.685083668f,
+    0.724247083f,  0.689540545f,
+    0.720002508f,  0.693971461f,
+    0.715730825f,  0.698376249f,
+    0.711432196f,  0.702754744f,
+    0.707106781f,  0.707106781f,
+    0.702754744f,  0.711432196f,
+    0.698376249f,  0.715730825f,
+    0.693971461f,  0.720002508f,
+    0.689540545f,  0.724247083f,
+    0.685083668f,  0.728464390f,
+    0.680600998f,  0.732654272f,
+    0.676092704f,  0.736816569f,
+    0.671558955f,  0.740951125f,
+    0.666999922f,  0.745057785f,
+    0.662415778f,  0.749136395f,
+    0.657806693f,  0.753186799f,
+    0.653172843f,  0.757208847f,
+    0.648514401f,  0.761202385f,
+    0.643831543f,  0.765167266f,
+    0.639124445f,  0.769103338f,
+    0.634393284f,  0.773010453f,
+    0.629638239f,  0.776888466f,
+    0.624859488f,  0.780737229f,
+    0.620057212f,  0.784556597f,
+    0.615231591f,  0.788346428f,
+    0.610382806f,  0.792106577f,
+    0.605511041f,  0.795836905f,
+    0.600616479f,  0.799537269f,
+    0.595699304f,  0.803207531f,
+    0.590759702f,  0.806847554f,
+    0.585797857f,  0.810457198f,
+    0.580813958f,  0.814036330f,
+    0.575808191f,  0.817584813f,
+    0.570780746f,  0.821102515f,
+    0.565731811f,  0.824589303f,
+    0.560661576f,  0.828045045f,
+    0.555570233f,  0.831469612f,
+    0.550457973f,  0.834862875f,
+    0.545324988f,  0.838224706f,
+    0.540171473f,  0.841554977f,
+    0.534997620f,  0.844853565f,
+    0.529803625f,  0.848120345f,
+    0.524589683f,  0.851355193f,
+    0.519355990f,  0.854557988f,
+    0.514102744f,  0.857728610f,
+    0.508830143f,  0.860866939f,
+    0.503538384f,  0.863972856f,
+    0.498227667f,  0.867046246f,
+    0.492898192f,  0.870086991f,
+    0.487550160f,  0.873094978f,
+    0.482183772f,  0.876070094f,
+    0.476799230f,  0.879012226f,
+    0.471396737f,  0.881921264f,
+    0.465976496f,  0.884797098f,
+    0.460538711f,  0.887639620f,
+    0.455083587f,  0.890448723f,
+    0.449611330f,  0.893224301f,
+    0.444122145f,  0.895966250f,
+    0.438616239f,  0.898674466f,
+    0.433093819f,  0.901348847f,
+    0.427555093f,  0.903989293f,
+    0.422000271f,  0.906595705f,
+    0.416429560f,  0.909167983f,
+    0.410843171f,  0.911706032f,
+    0.405241314f,  0.914209756f,
+    0.399624200f,  0.916679060f,
+    0.393992040f,  0.919113852f,
+    0.388345047f,  0.921514039f,
+    0.382683432f,  0.923879533f,
+    0.377007410f,  0.926210242f,
+    0.371317194f,  0.928506080f,
+    0.365612998f,  0.930766961f,
+    0.359895037f,  0.932992799f,
+    0.354163525f,  0.935183510f,
+    0.348418680f,  0.937339012f,
+    0.342660717f,  0.939459224f,
+    0.336889853f,  0.941544065f,
+    0.331106306f,  0.943593458f,
+    0.325310292f,  0.945607325f,
+    0.319502031f,  0.947585591f,
+    0.313681740f,  0.949528181f,
+    0.307849640f,  0.951435021f,
+    0.302005949f,  0.953306040f,
+    0.296150888f,  0.955141168f,
+    0.290284677f,  0.956940336f,
+    0.284407537f,  0.958703475f,
+    0.278519689f,  0.960430519f,
+    0.272621355f,  0.962121404f,
+    0.266712757f,  0.963776066f,
+    0.260794118f,  0.965394442f,
+    0.254865660f,  0.966976471f,
+    0.248927606f,  0.968522094f,
+    0.242980180f,  0.970031253f,
+    0.237023606f,  0.971503891f,
+    0.231058108f,  0.972939952f,
+    0.225083911f,  0.974339383f,
+    0.219101240f,  0.975702130f,
+    0.213110320f,  0.977028143f,
+    0.207111376f,  0.978317371f,
+    0.201104635f,  0.979569766f,
+    0.195090322f,  0.980785280f,
+    0.189068664f,  0.981963869f,
+    0.183039888f,  0.983105487f,
+    0.177004220f,  0.984210092f,
+    0.170961889f,  0.985277642f,
+    0.164913120f,  0.986308097f,
+    0.158858143f,  0.987301418f,
+    0.152797185f,  0.988257568f,
+    0.146730474f,  0.989176510f,
+    0.140658239f,  0.990058210f,
+    0.134580709f,  0.990902635f,
+    0.128498111f,  0.991709754f,
+    0.122410675f,  0.992479535f,
+    0.116318631f,  0.993211949f,
+    0.110222207f,  0.993906970f,
+    0.104121634f,  0.994564571f,
+    0.098017140f,  0.995184727f,
+    0.091908956f,  0.995767414f,
+    0.085797312f,  0.996312612f,
+    0.079682438f,  0.996820299f,
+    0.073564564f,  0.997290457f,
+    0.067443920f,  0.997723067f,
+    0.061320736f,  0.998118113f,
+    0.055195244f,  0.998475581f,
+    0.049067674f,  0.998795456f,
+    0.042938257f,  0.999077728f,
+    0.036807223f,  0.999322385f,
+    0.030674803f,  0.999529418f,
+    0.024541229f,  0.999698819f,
+    0.018406730f,  0.999830582f,
+    0.012271538f,  0.999924702f,
+    0.006135885f,  0.999981175f,
+    0.000000000f,  1.000000000f,
+   -0.006135885f,  0.999981175f,
+   -0.012271538f,  0.999924702f,
+   -0.018406730f,  0.999830582f,
+   -0.024541229f,  0.999698819f,
+   -0.030674803f,  0.999529418f,
+   -0.036807223f,  0.999322385f,
+   -0.042938257f,  0.999077728f,
+   -0.049067674f,  0.998795456f,
+   -0.055195244f,  0.998475581f,
+   -0.061320736f,  0.998118113f,
+   -0.067443920f,  0.997723067f,
+   -0.073564564f,  0.997290457f,
+   -0.079682438f,  0.996820299f,
+   -0.085797312f,  0.996312612f,
+   -0.091908956f,  0.995767414f,
+   -0.098017140f,  0.995184727f,
+   -0.104121634f,  0.994564571f,
+   -0.110222207f,  0.993906970f,
+   -0.116318631f,  0.993211949f,
+   -0.122410675f,  0.992479535f,
+   -0.128498111f,  0.991709754f,
+   -0.134580709f,  0.990902635f,
+   -0.140658239f,  0.990058210f,
+   -0.146730474f,  0.989176510f,
+   -0.152797185f,  0.988257568f,
+   -0.158858143f,  0.987301418f,
+   -0.164913120f,  0.986308097f,
+   -0.170961889f,  0.985277642f,
+   -0.177004220f,  0.984210092f,
+   -0.183039888f,  0.983105487f,
+   -0.189068664f,  0.981963869f,
+   -0.195090322f,  0.980785280f,
+   -0.201104635f,  0.979569766f,
+   -0.207111376f,  0.978317371f,
+   -0.213110320f,  0.977028143f,
+   -0.219101240f,  0.975702130f,
+   -0.225083911f,  0.974339383f,
+   -0.231058108f,  0.972939952f,
+   -0.237023606f,  0.971503891f,
+   -0.242980180f,  0.970031253f,
+   -0.248927606f,  0.968522094f,
+   -0.254865660f,  0.966976471f,
+   -0.260794118f,  0.965394442f,
+   -0.266712757f,  0.963776066f,
+   -0.272621355f,  0.962121404f,
+   -0.278519689f,  0.960430519f,
+   -0.284407537f,  0.958703475f,
+   -0.290284677f,  0.956940336f,
+   -0.296150888f,  0.955141168f,
+   -0.302005949f,  0.953306040f,
+   -0.307849640f,  0.951435021f,
+   -0.313681740f,  0.949528181f,
+   -0.319502031f,  0.947585591f,
+   -0.325310292f,  0.945607325f,
+   -0.331106306f,  0.943593458f,
+   -0.336889853f,  0.941544065f,
+   -0.342660717f,  0.939459224f,
+   -0.348418680f,  0.937339012f,
+   -0.354163525f,  0.935183510f,
+   -0.359895037f,  0.932992799f,
+   -0.365612998f,  0.930766961f,
+   -0.371317194f,  0.928506080f,
+   -0.377007410f,  0.926210242f,
+   -0.382683432f,  0.923879533f,
+   -0.388345047f,  0.921514039f,
+   -0.393992040f,  0.919113852f,
+   -0.399624200f,  0.916679060f,
+   -0.405241314f,  0.914209756f,
+   -0.410843171f,  0.911706032f,
+   -0.416429560f,  0.909167983f,
+   -0.422000271f,  0.906595705f,
+   -0.427555093f,  0.903989293f,
+   -0.433093819f,  0.901348847f,
+   -0.438616239f,  0.898674466f,
+   -0.444122145f,  0.895966250f,
+   -0.449611330f,  0.893224301f,
+   -0.455083587f,  0.890448723f,
+   -0.460538711f,  0.887639620f,
+   -0.465976496f,  0.884797098f,
+   -0.471396737f,  0.881921264f,
+   -0.476799230f,  0.879012226f,
+   -0.482183772f,  0.876070094f,
+   -0.487550160f,  0.873094978f,
+   -0.492898192f,  0.870086991f,
+   -0.498227667f,  0.867046246f,
+   -0.503538384f,  0.863972856f,
+   -0.508830143f,  0.860866939f,
+   -0.514102744f,  0.857728610f,
+   -0.519355990f,  0.854557988f,
+   -0.524589683f,  0.851355193f,
+   -0.529803625f,  0.848120345f,
+   -0.534997620f,  0.844853565f,
+   -0.540171473f,  0.841554977f,
+   -0.545324988f,  0.838224706f,
+   -0.550457973f,  0.834862875f,
+   -0.555570233f,  0.831469612f,
+   -0.560661576f,  0.828045045f,
+   -0.565731811f,  0.824589303f,
+   -0.570780746f,  0.821102515f,
+   -0.575808191f,  0.817584813f,
+   -0.580813958f,  0.814036330f,
+   -0.585797857f,  0.810457198f,
+   -0.590759702f,  0.806847554f,
+   -0.595699304f,  0.803207531f,
+   -0.600616479f,  0.799537269f,
+   -0.605511041f,  0.795836905f,
+   -0.610382806f,  0.792106577f,
+   -0.615231591f,  0.788346428f,
+   -0.620057212f,  0.784556597f,
+   -0.624859488f,  0.780737229f,
+   -0.629638239f,  0.776888466f,
+   -0.634393284f,  0.773010453f,
+   -0.639124445f,  0.769103338f,
+   -0.643831543f,  0.765167266f,
+   -0.648514401f,  0.761202385f,
+   -0.653172843f,  0.757208847f,
+   -0.657806693f,  0.753186799f,
+   -0.662415778f,  0.749136395f,
+   -0.666999922f,  0.745057785f,
+   -0.671558955f,  0.740951125f,
+   -0.676092704f,  0.736816569f,
+   -0.680600998f,  0.732654272f,
+   -0.685083668f,  0.728464390f,
+   -0.689540545f,  0.724247083f,
+   -0.693971461f,  0.720002508f,
+   -0.698376249f,  0.715730825f,
+   -0.702754744f,  0.711432196f,
+   -0.707106781f,  0.707106781f,
+   -0.711432196f,  0.702754744f,
+   -0.715730825f,  0.698376249f,
+   -0.720002508f,  0.693971461f,
+   -0.724247083f,  0.689540545f,
+   -0.728464390f,  0.685083668f,
+   -0.732654272f,  0.680600998f,
+   -0.736816569f,  0.676092704f,
+   -0.740951125f,  0.671558955f,
+   -0.745057785f,  0.666999922f,
+   -0.749136395f,  0.662415778f,
+   -0.753186799f,  0.657806693f,
+   -0.757208847f,  0.653172843f,
+   -0.761202385f,  0.648514401f,
+   -0.765167266f,  0.643831543f,
+   -0.769103338f,  0.639124445f,
+   -0.773010453f,  0.634393284f,
+   -0.776888466f,  0.629638239f,
+   -0.780737229f,  0.624859488f,
+   -0.784556597f,  0.620057212f,
+   -0.788346428f,  0.615231591f,
+   -0.792106577f,  0.610382806f,
+   -0.795836905f,  0.605511041f,
+   -0.799537269f,  0.600616479f,
+   -0.803207531f,  0.595699304f,
+   -0.806847554f,  0.590759702f,
+   -0.810457198f,  0.585797857f,
+   -0.814036330f,  0.580813958f,
+   -0.817584813f,  0.575808191f,
+   -0.821102515f,  0.570780746f,
+   -0.824589303f,  0.565731811f,
+   -0.828045045f,  0.560661576f,
+   -0.831469612f,  0.555570233f,
+   -0.834862875f,  0.550457973f,
+   -0.838224706f,  0.545324988f,
+   -0.841554977f,  0.540171473f,
+   -0.844853565f,  0.534997620f,
+   -0.848120345f,  0.529803625f,
+   -0.851355193f,  0.524589683f,
+   -0.854557988f,  0.519355990f,
+   -0.857728610f,  0.514102744f,
+   -0.860866939f,  0.508830143f,
+   -0.863972856f,  0.503538384f,
+   -0.867046246f,  0.498227667f,
+   -0.870086991f,  0.492898192f,
+   -0.873094978f,  0.487550160f,
+   -0.876070094f,  0.482183772f,
+   -0.879012226f,  0.476799230f,
+   -0.881921264f,  0.471396737f,
+   -0.884797098f,  0.465976496f,
+   -0.887639620f,  0.460538711f,
+   -0.890448723f,  0.455083587f,
+   -0.893224301f,  0.449611330f,
+   -0.895966250f,  0.444122145f,
+   -0.898674466f,  0.438616239f,
+   -0.901348847f,  0.433093819f,
+   -0.903989293f,  0.427555093f,
+   -0.906595705f,  0.422000271f,
+   -0.909167983f,  0.416429560f,
+   -0.911706032f,  0.410843171f,
+   -0.914209756f,  0.405241314f,
+   -0.916679060f,  0.399624200f,
+   -0.919113852f,  0.393992040f,
+   -0.921514039f,  0.388345047f,
+   -0.923879533f,  0.382683432f,
+   -0.926210242f,  0.377007410f,
+   -0.928506080f,  0.371317194f,
+   -0.930766961f,  0.365612998f,
+   -0.932992799f,  0.359895037f,
+   -0.935183510f,  0.354163525f,
+   -0.937339012f,  0.348418680f,
+   -0.939459224f,  0.342660717f,
+   -0.941544065f,  0.336889853f,
+   -0.943593458f,  0.331106306f,
+   -0.945607325f,  0.325310292f,
+   -0.947585591f,  0.319502031f,
+   -0.949528181f,  0.313681740f,
+   -0.951435021f,  0.307849640f,
+   -0.953306040f,  0.302005949f,
+   -0.955141168f,  0.296150888f,
+   -0.956940336f,  0.290284677f,
+   -0.958703475f,  0.284407537f,
+   -0.960430519f,  0.278519689f,
+   -0.962121404f,  0.272621355f,
+   -0.963776066f,  0.266712757f,
+   -0.965394442f,  0.260794118f,
+   -0.966976471f,  0.254865660f,
+   -0.968522094f,  0.248927606f,
+   -0.970031253f,  0.242980180f,
+   -0.971503891f,  0.237023606f,
+   -0.972939952f,  0.231058108f,
+   -0.974339383f,  0.225083911f,
+   -0.975702130f,  0.219101240f,
+   -0.977028143f,  0.213110320f,
+   -0.978317371f,  0.207111376f,
+   -0.979569766f,  0.201104635f,
+   -0.980785280f,  0.195090322f,
+   -0.981963869f,  0.189068664f,
+   -0.983105487f,  0.183039888f,
+   -0.984210092f,  0.177004220f,
+   -0.985277642f,  0.170961889f,
+   -0.986308097f,  0.164913120f,
+   -0.987301418f,  0.158858143f,
+   -0.988257568f,  0.152797185f,
+   -0.989176510f,  0.146730474f,
+   -0.990058210f,  0.140658239f,
+   -0.990902635f,  0.134580709f,
+   -0.991709754f,  0.128498111f,
+   -0.992479535f,  0.122410675f,
+   -0.993211949f,  0.116318631f,
+   -0.993906970f,  0.110222207f,
+   -0.994564571f,  0.104121634f,
+   -0.995184727f,  0.098017140f,
+   -0.995767414f,  0.091908956f,
+   -0.996312612f,  0.085797312f,
+   -0.996820299f,  0.079682438f,
+   -0.997290457f,  0.073564564f,
+   -0.997723067f,  0.067443920f,
+   -0.998118113f,  0.061320736f,
+   -0.998475581f,  0.055195244f,
+   -0.998795456f,  0.049067674f,
+   -0.999077728f,  0.042938257f,
+   -0.999322385f,  0.036807223f,
+   -0.999529418f,  0.030674803f,
+   -0.999698819f,  0.024541229f,
+   -0.999830582f,  0.018406730f,
+   -0.999924702f,  0.012271538f,
+   -0.999981175f,  0.006135885f,
+   -1.000000000f,  0.000000000f,
+   -0.999981175f, -0.006135885f,
+   -0.999924702f, -0.012271538f,
+   -0.999830582f, -0.018406730f,
+   -0.999698819f, -0.024541229f,
+   -0.999529418f, -0.030674803f,
+   -0.999322385f, -0.036807223f,
+   -0.999077728f, -0.042938257f,
+   -0.998795456f, -0.049067674f,
+   -0.998475581f, -0.055195244f,
+   -0.998118113f, -0.061320736f,
+   -0.997723067f, -0.067443920f,
+   -0.997290457f, -0.073564564f,
+   -0.996820299f, -0.079682438f,
+   -0.996312612f, -0.085797312f,
+   -0.995767414f, -0.091908956f,
+   -0.995184727f, -0.098017140f,
+   -0.994564571f, -0.104121634f,
+   -0.993906970f, -0.110222207f,
+   -0.993211949f, -0.116318631f,
+   -0.992479535f, -0.122410675f,
+   -0.991709754f, -0.128498111f,
+   -0.990902635f, -0.134580709f,
+   -0.990058210f, -0.140658239f,
+   -0.989176510f, -0.146730474f,
+   -0.988257568f, -0.152797185f,
+   -0.987301418f, -0.158858143f,
+   -0.986308097f, -0.164913120f,
+   -0.985277642f, -0.170961889f,
+   -0.984210092f, -0.177004220f,
+   -0.983105487f, -0.183039888f,
+   -0.981963869f, -0.189068664f,
+   -0.980785280f, -0.195090322f,
+   -0.979569766f, -0.201104635f,
+   -0.978317371f, -0.207111376f,
+   -0.977028143f, -0.213110320f,
+   -0.975702130f, -0.219101240f,
+   -0.974339383f, -0.225083911f,
+   -0.972939952f, -0.231058108f,
+   -0.971503891f, -0.237023606f,
+   -0.970031253f, -0.242980180f,
+   -0.968522094f, -0.248927606f,
+   -0.966976471f, -0.254865660f,
+   -0.965394442f, -0.260794118f,
+   -0.963776066f, -0.266712757f,
+   -0.962121404f, -0.272621355f,
+   -0.960430519f, -0.278519689f,
+   -0.958703475f, -0.284407537f,
+   -0.956940336f, -0.290284677f,
+   -0.955141168f, -0.296150888f,
+   -0.953306040f, -0.302005949f,
+   -0.951435021f, -0.307849640f,
+   -0.949528181f, -0.313681740f,
+   -0.947585591f, -0.319502031f,
+   -0.945607325f, -0.325310292f,
+   -0.943593458f, -0.331106306f,
+   -0.941544065f, -0.336889853f,
+   -0.939459224f, -0.342660717f,
+   -0.937339012f, -0.348418680f,
+   -0.935183510f, -0.354163525f,
+   -0.932992799f, -0.359895037f,
+   -0.930766961f, -0.365612998f,
+   -0.928506080f, -0.371317194f,
+   -0.926210242f, -0.377007410f,
+   -0.923879533f, -0.382683432f,
+   -0.921514039f, -0.388345047f,
+   -0.919113852f, -0.393992040f,
+   -0.916679060f, -0.399624200f,
+   -0.914209756f, -0.405241314f,
+   -0.911706032f, -0.410843171f,
+   -0.909167983f, -0.416429560f,
+   -0.906595705f, -0.422000271f,
+   -0.903989293f, -0.427555093f,
+   -0.901348847f, -0.433093819f,
+   -0.898674466f, -0.438616239f,
+   -0.895966250f, -0.444122145f,
+   -0.893224301f, -0.449611330f,
+   -0.890448723f, -0.455083587f,
+   -0.887639620f, -0.460538711f,
+   -0.884797098f, -0.465976496f,
+   -0.881921264f, -0.471396737f,
+   -0.879012226f, -0.476799230f,
+   -0.876070094f, -0.482183772f,
+   -0.873094978f, -0.487550160f,
+   -0.870086991f, -0.492898192f,
+   -0.867046246f, -0.498227667f,
+   -0.863972856f, -0.503538384f,
+   -0.860866939f, -0.508830143f,
+   -0.857728610f, -0.514102744f,
+   -0.854557988f, -0.519355990f,
+   -0.851355193f, -0.524589683f,
+   -0.848120345f, -0.529803625f,
+   -0.844853565f, -0.534997620f,
+   -0.841554977f, -0.540171473f,
+   -0.838224706f, -0.545324988f,
+   -0.834862875f, -0.550457973f,
+   -0.831469612f, -0.555570233f,
+   -0.828045045f, -0.560661576f,
+   -0.824589303f, -0.565731811f,
+   -0.821102515f, -0.570780746f,
+   -0.817584813f, -0.575808191f,
+   -0.814036330f, -0.580813958f,
+   -0.810457198f, -0.585797857f,
+   -0.806847554f, -0.590759702f,
+   -0.803207531f, -0.595699304f,
+   -0.799537269f, -0.600616479f,
+   -0.795836905f, -0.605511041f,
+   -0.792106577f, -0.610382806f,
+   -0.788346428f, -0.615231591f,
+   -0.784556597f, -0.620057212f,
+   -0.780737229f, -0.624859488f,
+   -0.776888466f, -0.629638239f,
+   -0.773010453f, -0.634393284f,
+   -0.769103338f, -0.639124445f,
+   -0.765167266f, -0.643831543f,
+   -0.761202385f, -0.648514401f,
+   -0.757208847f, -0.653172843f,
+   -0.753186799f, -0.657806693f,
+   -0.749136395f, -0.662415778f,
+   -0.745057785f, -0.666999922f,
+   -0.740951125f, -0.671558955f,
+   -0.736816569f, -0.676092704f,
+   -0.732654272f, -0.680600998f,
+   -0.728464390f, -0.685083668f,
+   -0.724247083f, -0.689540545f,
+   -0.720002508f, -0.693971461f,
+   -0.715730825f, -0.698376249f,
+   -0.711432196f, -0.702754744f,
+   -0.707106781f, -0.707106781f,
+   -0.702754744f, -0.711432196f,
+   -0.698376249f, -0.715730825f,
+   -0.693971461f, -0.720002508f,
+   -0.689540545f, -0.724247083f,
+   -0.685083668f, -0.728464390f,
+   -0.680600998f, -0.732654272f,
+   -0.676092704f, -0.736816569f,
+   -0.671558955f, -0.740951125f,
+   -0.666999922f, -0.745057785f,
+   -0.662415778f, -0.749136395f,
+   -0.657806693f, -0.753186799f,
+   -0.653172843f, -0.757208847f,
+   -0.648514401f, -0.761202385f,
+   -0.643831543f, -0.765167266f,
+   -0.639124445f, -0.769103338f,
+   -0.634393284f, -0.773010453f,
+   -0.629638239f, -0.776888466f,
+   -0.624859488f, -0.780737229f,
+   -0.620057212f, -0.784556597f,
+   -0.615231591f, -0.788346428f,
+   -0.610382806f, -0.792106577f,
+   -0.605511041f, -0.795836905f,
+   -0.600616479f, -0.799537269f,
+   -0.595699304f, -0.803207531f,
+   -0.590759702f, -0.806847554f,
+   -0.585797857f, -0.810457198f,
+   -0.580813958f, -0.814036330f,
+   -0.575808191f, -0.817584813f,
+   -0.570780746f, -0.821102515f,
+   -0.565731811f, -0.824589303f,
+   -0.560661576f, -0.828045045f,
+   -0.555570233f, -0.831469612f,
+   -0.550457973f, -0.834862875f,
+   -0.545324988f, -0.838224706f,
+   -0.540171473f, -0.841554977f,
+   -0.534997620f, -0.844853565f,
+   -0.529803625f, -0.848120345f,
+   -0.524589683f, -0.851355193f,
+   -0.519355990f, -0.854557988f,
+   -0.514102744f, -0.857728610f,
+   -0.508830143f, -0.860866939f,
+   -0.503538384f, -0.863972856f,
+   -0.498227667f, -0.867046246f,
+   -0.492898192f, -0.870086991f,
+   -0.487550160f, -0.873094978f,
+   -0.482183772f, -0.876070094f,
+   -0.476799230f, -0.879012226f,
+   -0.471396737f, -0.881921264f,
+   -0.465976496f, -0.884797098f,
+   -0.460538711f, -0.887639620f,
+   -0.455083587f, -0.890448723f,
+   -0.449611330f, -0.893224301f,
+   -0.444122145f, -0.895966250f,
+   -0.438616239f, -0.898674466f,
+   -0.433093819f, -0.901348847f,
+   -0.427555093f, -0.903989293f,
+   -0.422000271f, -0.906595705f,
+   -0.416429560f, -0.909167983f,
+   -0.410843171f, -0.911706032f,
+   -0.405241314f, -0.914209756f,
+   -0.399624200f, -0.916679060f,
+   -0.393992040f, -0.919113852f,
+   -0.388345047f, -0.921514039f,
+   -0.382683432f, -0.923879533f,
+   -0.377007410f, -0.926210242f,
+   -0.371317194f, -0.928506080f,
+   -0.365612998f, -0.930766961f,
+   -0.359895037f, -0.932992799f,
+   -0.354163525f, -0.935183510f,
+   -0.348418680f, -0.937339012f,
+   -0.342660717f, -0.939459224f,
+   -0.336889853f, -0.941544065f,
+   -0.331106306f, -0.943593458f,
+   -0.325310292f, -0.945607325f,
+   -0.319502031f, -0.947585591f,
+   -0.313681740f, -0.949528181f,
+   -0.307849640f, -0.951435021f,
+   -0.302005949f, -0.953306040f,
+   -0.296150888f, -0.955141168f,
+   -0.290284677f, -0.956940336f,
+   -0.284407537f, -0.958703475f,
+   -0.278519689f, -0.960430519f,
+   -0.272621355f, -0.962121404f,
+   -0.266712757f, -0.963776066f,
+   -0.260794118f, -0.965394442f,
+   -0.254865660f, -0.966976471f,
+   -0.248927606f, -0.968522094f,
+   -0.242980180f, -0.970031253f,
+   -0.237023606f, -0.971503891f,
+   -0.231058108f, -0.972939952f,
+   -0.225083911f, -0.974339383f,
+   -0.219101240f, -0.975702130f,
+   -0.213110320f, -0.977028143f,
+   -0.207111376f, -0.978317371f,
+   -0.201104635f, -0.979569766f,
+   -0.195090322f, -0.980785280f,
+   -0.189068664f, -0.981963869f,
+   -0.183039888f, -0.983105487f,
+   -0.177004220f, -0.984210092f,
+   -0.170961889f, -0.985277642f,
+   -0.164913120f, -0.986308097f,
+   -0.158858143f, -0.987301418f,
+   -0.152797185f, -0.988257568f,
+   -0.146730474f, -0.989176510f,
+   -0.140658239f, -0.990058210f,
+   -0.134580709f, -0.990902635f,
+   -0.128498111f, -0.991709754f,
+   -0.122410675f, -0.992479535f,
+   -0.116318631f, -0.993211949f,
+   -0.110222207f, -0.993906970f,
+   -0.104121634f, -0.994564571f,
+   -0.098017140f, -0.995184727f,
+   -0.091908956f, -0.995767414f,
+   -0.085797312f, -0.996312612f,
+   -0.079682438f, -0.996820299f,
+   -0.073564564f, -0.997290457f,
+   -0.067443920f, -0.997723067f,
+   -0.061320736f, -0.998118113f,
+   -0.055195244f, -0.998475581f,
+   -0.049067674f, -0.998795456f,
+   -0.042938257f, -0.999077728f,
+   -0.036807223f, -0.999322385f,
+   -0.030674803f, -0.999529418f,
+   -0.024541229f, -0.999698819f,
+   -0.018406730f, -0.999830582f,
+   -0.012271538f, -0.999924702f,
+   -0.006135885f, -0.999981175f,
+   -0.000000000f, -1.000000000f,
+    0.006135885f, -0.999981175f,
+    0.012271538f, -0.999924702f,
+    0.018406730f, -0.999830582f,
+    0.024541229f, -0.999698819f,
+    0.030674803f, -0.999529418f,
+    0.036807223f, -0.999322385f,
+    0.042938257f, -0.999077728f,
+    0.049067674f, -0.998795456f,
+    0.055195244f, -0.998475581f,
+    0.061320736f, -0.998118113f,
+    0.067443920f, -0.997723067f,
+    0.073564564f, -0.997290457f,
+    0.079682438f, -0.996820299f,
+    0.085797312f, -0.996312612f,
+    0.091908956f, -0.995767414f,
+    0.098017140f, -0.995184727f,
+    0.104121634f, -0.994564571f,
+    0.110222207f, -0.993906970f,
+    0.116318631f, -0.993211949f,
+    0.122410675f, -0.992479535f,
+    0.128498111f, -0.991709754f,
+    0.134580709f, -0.990902635f,
+    0.140658239f, -0.990058210f,
+    0.146730474f, -0.989176510f,
+    0.152797185f, -0.988257568f,
+    0.158858143f, -0.987301418f,
+    0.164913120f, -0.986308097f,
+    0.170961889f, -0.985277642f,
+    0.177004220f, -0.984210092f,
+    0.183039888f, -0.983105487f,
+    0.189068664f, -0.981963869f,
+    0.195090322f, -0.980785280f,
+    0.201104635f, -0.979569766f,
+    0.207111376f, -0.978317371f,
+    0.213110320f, -0.977028143f,
+    0.219101240f, -0.975702130f,
+    0.225083911f, -0.974339383f,
+    0.231058108f, -0.972939952f,
+    0.237023606f, -0.971503891f,
+    0.242980180f, -0.970031253f,
+    0.248927606f, -0.968522094f,
+    0.254865660f, -0.966976471f,
+    0.260794118f, -0.965394442f,
+    0.266712757f, -0.963776066f,
+    0.272621355f, -0.962121404f,
+    0.278519689f, -0.960430519f,
+    0.284407537f, -0.958703475f,
+    0.290284677f, -0.956940336f,
+    0.296150888f, -0.955141168f,
+    0.302005949f, -0.953306040f,
+    0.307849640f, -0.951435021f,
+    0.313681740f, -0.949528181f,
+    0.319502031f, -0.947585591f,
+    0.325310292f, -0.945607325f,
+    0.331106306f, -0.943593458f,
+    0.336889853f, -0.941544065f,
+    0.342660717f, -0.939459224f,
+    0.348418680f, -0.937339012f,
+    0.354163525f, -0.935183510f,
+    0.359895037f, -0.932992799f,
+    0.365612998f, -0.930766961f,
+    0.371317194f, -0.928506080f,
+    0.377007410f, -0.926210242f,
+    0.382683432f, -0.923879533f,
+    0.388345047f, -0.921514039f,
+    0.393992040f, -0.919113852f,
+    0.399624200f, -0.916679060f,
+    0.405241314f, -0.914209756f,
+    0.410843171f, -0.911706032f,
+    0.416429560f, -0.909167983f,
+    0.422000271f, -0.906595705f,
+    0.427555093f, -0.903989293f,
+    0.433093819f, -0.901348847f,
+    0.438616239f, -0.898674466f,
+    0.444122145f, -0.895966250f,
+    0.449611330f, -0.893224301f,
+    0.455083587f, -0.890448723f,
+    0.460538711f, -0.887639620f,
+    0.465976496f, -0.884797098f,
+    0.471396737f, -0.881921264f,
+    0.476799230f, -0.879012226f,
+    0.482183772f, -0.876070094f,
+    0.487550160f, -0.873094978f,
+    0.492898192f, -0.870086991f,
+    0.498227667f, -0.867046246f,
+    0.503538384f, -0.863972856f,
+    0.508830143f, -0.860866939f,
+    0.514102744f, -0.857728610f,
+    0.519355990f, -0.854557988f,
+    0.524589683f, -0.851355193f,
+    0.529803625f, -0.848120345f,
+    0.534997620f, -0.844853565f,
+    0.540171473f, -0.841554977f,
+    0.545324988f, -0.838224706f,
+    0.550457973f, -0.834862875f,
+    0.555570233f, -0.831469612f,
+    0.560661576f, -0.828045045f,
+    0.565731811f, -0.824589303f,
+    0.570780746f, -0.821102515f,
+    0.575808191f, -0.817584813f,
+    0.580813958f, -0.814036330f,
+    0.585797857f, -0.810457198f,
+    0.590759702f, -0.806847554f,
+    0.595699304f, -0.803207531f,
+    0.600616479f, -0.799537269f,
+    0.605511041f, -0.795836905f,
+    0.610382806f, -0.792106577f,
+    0.615231591f, -0.788346428f,
+    0.620057212f, -0.784556597f,
+    0.624859488f, -0.780737229f,
+    0.629638239f, -0.776888466f,
+    0.634393284f, -0.773010453f,
+    0.639124445f, -0.769103338f,
+    0.643831543f, -0.765167266f,
+    0.648514401f, -0.761202385f,
+    0.653172843f, -0.757208847f,
+    0.657806693f, -0.753186799f,
+    0.662415778f, -0.749136395f,
+    0.666999922f, -0.745057785f,
+    0.671558955f, -0.740951125f,
+    0.676092704f, -0.736816569f,
+    0.680600998f, -0.732654272f,
+    0.685083668f, -0.728464390f,
+    0.689540545f, -0.724247083f,
+    0.693971461f, -0.720002508f,
+    0.698376249f, -0.715730825f,
+    0.702754744f, -0.711432196f,
+    0.707106781f, -0.707106781f,
+    0.711432196f, -0.702754744f,
+    0.715730825f, -0.698376249f,
+    0.720002508f, -0.693971461f,
+    0.724247083f, -0.689540545f,
+    0.728464390f, -0.685083668f,
+    0.732654272f, -0.680600998f,
+    0.736816569f, -0.676092704f,
+    0.740951125f, -0.671558955f,
+    0.745057785f, -0.666999922f,
+    0.749136395f, -0.662415778f,
+    0.753186799f, -0.657806693f,
+    0.757208847f, -0.653172843f,
+    0.761202385f, -0.648514401f,
+    0.765167266f, -0.643831543f,
+    0.769103338f, -0.639124445f,
+    0.773010453f, -0.634393284f,
+    0.776888466f, -0.629638239f,
+    0.780737229f, -0.624859488f,
+    0.784556597f, -0.620057212f,
+    0.788346428f, -0.615231591f,
+    0.792106577f, -0.610382806f,
+    0.795836905f, -0.605511041f,
+    0.799537269f, -0.600616479f,
+    0.803207531f, -0.595699304f,
+    0.806847554f, -0.590759702f,
+    0.810457198f, -0.585797857f,
+    0.814036330f, -0.580813958f,
+    0.817584813f, -0.575808191f,
+    0.821102515f, -0.570780746f,
+    0.824589303f, -0.565731811f,
+    0.828045045f, -0.560661576f,
+    0.831469612f, -0.555570233f,
+    0.834862875f, -0.550457973f,
+    0.838224706f, -0.545324988f,
+    0.841554977f, -0.540171473f,
+    0.844853565f, -0.534997620f,
+    0.848120345f, -0.529803625f,
+    0.851355193f, -0.524589683f,
+    0.854557988f, -0.519355990f,
+    0.857728610f, -0.514102744f,
+    0.860866939f, -0.508830143f,
+    0.863972856f, -0.503538384f,
+    0.867046246f, -0.498227667f,
+    0.870086991f, -0.492898192f,
+    0.873094978f, -0.487550160f,
+    0.876070094f, -0.482183772f,
+    0.879012226f, -0.476799230f,
+    0.881921264f, -0.471396737f,
+    0.884797098f, -0.465976496f,
+    0.887639620f, -0.460538711f,
+    0.890448723f, -0.455083587f,
+    0.893224301f, -0.449611330f,
+    0.895966250f, -0.444122145f,
+    0.898674466f, -0.438616239f,
+    0.901348847f, -0.433093819f,
+    0.903989293f, -0.427555093f,
+    0.906595705f, -0.422000271f,
+    0.909167983f, -0.416429560f,
+    0.911706032f, -0.410843171f,
+    0.914209756f, -0.405241314f,
+    0.916679060f, -0.399624200f,
+    0.919113852f, -0.393992040f,
+    0.921514039f, -0.388345047f,
+    0.923879533f, -0.382683432f,
+    0.926210242f, -0.377007410f,
+    0.928506080f, -0.371317194f,
+    0.930766961f, -0.365612998f,
+    0.932992799f, -0.359895037f,
+    0.935183510f, -0.354163525f,
+    0.937339012f, -0.348418680f,
+    0.939459224f, -0.342660717f,
+    0.941544065f, -0.336889853f,
+    0.943593458f, -0.331106306f,
+    0.945607325f, -0.325310292f,
+    0.947585591f, -0.319502031f,
+    0.949528181f, -0.313681740f,
+    0.951435021f, -0.307849640f,
+    0.953306040f, -0.302005949f,
+    0.955141168f, -0.296150888f,
+    0.956940336f, -0.290284677f,
+    0.958703475f, -0.284407537f,
+    0.960430519f, -0.278519689f,
+    0.962121404f, -0.272621355f,
+    0.963776066f, -0.266712757f,
+    0.965394442f, -0.260794118f,
+    0.966976471f, -0.254865660f,
+    0.968522094f, -0.248927606f,
+    0.970031253f, -0.242980180f,
+    0.971503891f, -0.237023606f,
+    0.972939952f, -0.231058108f,
+    0.974339383f, -0.225083911f,
+    0.975702130f, -0.219101240f,
+    0.977028143f, -0.213110320f,
+    0.978317371f, -0.207111376f,
+    0.979569766f, -0.201104635f,
+    0.980785280f, -0.195090322f,
+    0.981963869f, -0.189068664f,
+    0.983105487f, -0.183039888f,
+    0.984210092f, -0.177004220f,
+    0.985277642f, -0.170961889f,
+    0.986308097f, -0.164913120f,
+    0.987301418f, -0.158858143f,
+    0.988257568f, -0.152797185f,
+    0.989176510f, -0.146730474f,
+    0.990058210f, -0.140658239f,
+    0.990902635f, -0.134580709f,
+    0.991709754f, -0.128498111f,
+    0.992479535f, -0.122410675f,
+    0.993211949f, -0.116318631f,
+    0.993906970f, -0.110222207f,
+    0.994564571f, -0.104121634f,
+    0.995184727f, -0.098017140f,
+    0.995767414f, -0.091908956f,
+    0.996312612f, -0.085797312f,
+    0.996820299f, -0.079682438f,
+    0.997290457f, -0.073564564f,
+    0.997723067f, -0.067443920f,
+    0.998118113f, -0.061320736f,
+    0.998475581f, -0.055195244f,
+    0.998795456f, -0.049067674f,
+    0.999077728f, -0.042938257f,
+    0.999322385f, -0.036807223f,
+    0.999529418f, -0.030674803f,
+    0.999698819f, -0.024541229f,
+    0.999830582f, -0.018406730f,
+    0.999924702f, -0.012271538f,
+    0.999981175f, -0.006135885f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_2048[4096] = {
+    1.000000000f,  0.000000000f,
+    0.999995294f,  0.003067957f,
+    0.999981175f,  0.006135885f,
+    0.999957645f,  0.009203755f,
+    0.999924702f,  0.012271538f,
+    0.999882347f,  0.015339206f,
+    0.999830582f,  0.018406730f,
+    0.999769405f,  0.021474080f,
+    0.999698819f,  0.024541229f,
+    0.999618822f,  0.027608146f,
+    0.999529418f,  0.030674803f,
+    0.999430605f,  0.033741172f,
+    0.999322385f,  0.036807223f,
+    0.999204759f,  0.039872928f,
+    0.999077728f,  0.042938257f,
+    0.998941293f,  0.046003182f,
+    0.998795456f,  0.049067674f,
+    0.998640218f,  0.052131705f,
+    0.998475581f,  0.055195244f,
+    0.998301545f,  0.058258265f,
+    0.998118113f,  0.061320736f,
+    0.997925286f,  0.064382631f,
+    0.997723067f,  0.067443920f,
+    0.997511456f,  0.070504573f,
+    0.997290457f,  0.073564564f,
+    0.997060070f,  0.076623861f,
+    0.996820299f,  0.079682438f,
+    0.996571146f,  0.082740265f,
+    0.996312612f,  0.085797312f,
+    0.996044701f,  0.088853553f,
+    0.995767414f,  0.091908956f,
+    0.995480755f,  0.094963495f,
+    0.995184727f,  0.098017140f,
+    0.994879331f,  0.101069863f,
+    0.994564571f,  0.104121634f,
+    0.994240449f,  0.107172425f,
+    0.993906970f,  0.110222207f,
+    0.993564136f,  0.113270952f,
+    0.993211949f,  0.116318631f,
+    0.992850414f,  0.119365215f,
+    0.992479535f,  0.122410675f,
+    0.992099313f,  0.125454983f,
+    0.991709754f,  0.128498111f,
+    0.991310860f,  0.131540029f,
+    0.990902635f,  0.134580709f,
+    0.990485084f,  0.137620122f,
+    0.990058210f,  0.140658239f,
+    0.989622017f,  0.143695033f,
+    0.989176510f,  0.146730474f,
+    0.988721692f,  0.149764535f,
+    0.988257568f,  0.152797185f,
+    0.987784142f,  0.155828398f,
+    0.987301418f,  0.158858143f,
+    0.986809402f,  0.161886394f,
+    0.986308097f,  0.164913120f,
+    0.985797509f,  0.167938295f,
+    0.985277642f,  0.170961889f,
+    0.984748502f,  0.173983873f,
+    0.984210092f,  0.177004220f,
+    0.983662419f,  0.180022901f,
+    0.983105487f,  0.183039888f,
+    0.982539302f,  0.186055152f,
+    0.981963869f,  0.189068664f,
+    0.981379193f,  0.192080397f,
+    0.980785280f,  0.195090322f,
+    0.980182136f,  0.198098411f,
+    0.979569766f,  0.201104635f,
+    0.978948175f,  0.204108966f,
+    0.978317371f,  0.207111376f,
+    0.977677358f,  0.210111837f,
+    0.977028143f,  0.213110320f,
+    0.976369731f,  0.216106797f,
+    0.975702130f,  0.219101240f,
+    0.975025345f,  0.222093621f,
+    0.974339383f,  0.225083911f,
+    0.973644250f,  0.228072083f,
+    0.972939952f,  0.231058108f,
+    0.972226497f,  0.234041959f,
+    0.971503891f,  0.237023606f,
+    0.970772141f,  0.240003022f,
+    0.970031253f,  0.242980180f,
+    0.969281235f,  0.245955050f,
+    0.968522094f,  0.248927606f,
+    0.967753837f,  0.251897818f,
+    0.966976471f,  0.254865660f,
+    0.966190003f,  0.257831102f,
+    0.965394442f,  0.260794118f,
+    0.964589793f,  0.263754679f,
+    0.963776066f,  0.266712757f,
+    0.962953267f,  0.269668326f,
+    0.962121404f,  0.272621355f,
+    0.961280486f,  0.275571819f,
+    0.960430519f,  0.278519689f,
+    0.959571513f,  0.281464938f,
+    0.958703475f,  0.284407537f,
+    0.957826413f,  0.287347460f,
+    0.956940336f,  0.290284677f,
+    0.956045251f,  0.293219163f,
+    0.955141168f,  0.296150888f,
+    0.954228095f,  0.299079826f,
+    0.953306040f,  0.302005949f,
+    0.952375013f,  0.304929230f,
+    0.951435021f,  0.307849640f,
+    0.950486074f,  0.310767153f,
+    0.949528181f,  0.313681740f,
+    0.948561350f,  0.316593376f,
+    0.947585591f,  0.319502031f,
+    0.946600913f,  0.322407679f,
+    0.945607325f,  0.325310292f,
+    0.944604837f,  0.328209844f,
+    0.943593458f,  0.331106306f,
+    0.942573198f,  0.333999651f,
+    0.941544065f,  0.336889853f,
+    0.940506071f,  0.339776884f,
+    0.939459224f,  0.342660717f,
+    0.938403534f,  0.345541325f,
+    0.937339012f,  0.348418680f,
+    0.936265667f,  0.351292756f,
+    0.935183510f,  0.354163525f,
+    0.934092550f,  0.357030961f,
+    0.932992799f,  0.359895037f,
+    0.931884266f,  0.362755724f,
+    0.930766961f,  0.365612998f,
+    0.929640896f,  0.368466830f,
+    0.928506080f,  0.371317194f,
+    0.927362526f,  0.374164063f,
+    0.926210242f,  0.377007410f,
+    0.925049241f,  0.379847209f,
+    0.923879533f,  0.382683432f,
+    0.922701128f,  0.385516054f,
+    0.921514039f,  0.388345047f,
+    0.920318277f,  0.391170384f,
+    0.919113852f,  0.393992040f,
+    0.917900776f,  0.396809987f,
+    0.916679060f,  0.399624200f,
+    0.915448716f,  0.402434651f,
+    0.914209756f,  0.405241314f,
+    0.912962190f,  0.408044163f,
+    0.911706032f,  0.410843171f,
+    0.910441292f,  0.413638312f,
+    0.909167983f,  0.416429560f,
+    0.907886116f,  0.419216888f,
+    0.906595705f,  0.422000271f,
+    0.905296759f,  0.424779681f,
+    0.903989293f,  0.427555093f,
+    0.902673318f,  0.430326481f,
+    0.901348847f,  0.433093819f,
+    0.900015892f,  0.435857080f,
+    0.898674466f,  0.438616239f,
+    0.897324581f,  0.441371269f,
+    0.895966250f,  0.444122145f,
+    0.894599486f,  0.446868840f,
+    0.893224301f,  0.449611330f,
+    0.891840709f,  0.452349587f,
+    0.890448723f,  0.455083587f,
+    0.889048356f,  0.457813304f,
+    0.887639620f,  0.460538711f,
+    0.886222530f,  0.463259784f,
+    0.884797098f,  0.465976496f,
+    0.883363339f,  0.468688822f,
+    0.881921264f,  0.471396737f,
+    0.880470889f,  0.474100215f,
+    0.879012226f,  0.476799230f,
+    0.877545290f,  0.479493758f,
+    0.876070094f,  0.482183772f,
+    0.874586652f,  0.484869248f,
+    0.873094978f,  0.487550160f,
+    0.871595087f,  0.490226483f,
+    0.870086991f,  0.492898192f,
+    0.868570706f,  0.495565262f,
+    0.867046246f,  0.498227667f,
+    0.865513624f,  0.500885383f,
+    0.863972856f,  0.503538384f,
+    0.862423956f,  0.506186645f,
+    0.860866939f,  0.508830143f,
+    0.859301818f,  0.511468850f,
+    0.857728610f,  0.514102744f,
+    0.856147328f,  0.516731799f,
+    0.854557988f,  0.519355990f,
+    0.852960605f,  0.521975293f,
+    0.851355193f,  0.524589683f,
+    0.849741768f,  0.527199135f,
+    0.848120345f,  0.529803625f,
+    0.846490939f,  0.532403128f,
+    0.844853565f,  0.534997620f,
+    0.843208240f,  0.537587076f,
+    0.841554977f,  0.540171473f,
+    0.839893794f,  0.542750785f,
+    0.838224706f,  0.545324988f,
+    0.836547727f,  0.547894059f,
+    0.834862875f,  0.550457973f,
+    0.833170165f,  0.553016706f,
+    0.831469612f,  0.555570233f,
+    0.829761234f,  0.558118531f,
+    0.828045045f,  0.560661576f,
+    0.826321063f,  0.563199344f,
+    0.824589303f,  0.565731811f,
+    0.822849781f,  0.568258953f,
+    0.821102515f,  0.570780746f,
+    0.819347520f,  0.573297167f,
+    0.817584813f,  0.575808191f,
+    0.815814411f,  0.578313796f,
+    0.814036330f,  0.580813958f,
+    0.812250587f,  0.583308653f,
+    0.810457198f,  0.585797857f,
+    0.808656182f,  0.588281548f,
+    0.806847554f,  0.590759702f,
+    0.805031331f,  0.593232295f,
+    0.803207531f,  0.595699304f,
+    0.801376172f,  0.598160707f,
+    0.799537269f,  0.600616479f,
+    0.797690841f,  0.603066599f,
+    0.795836905f,  0.605511041f,
+    0.793975478f,  0.607949785f,
+    0.792106577f,  0.610382806f,
+    0.790230221f,  0.612810082f,
+    0.788346428f,  0.615231591f,
+    0.786455214f,  0.617647308f,
+    0.784556597f,  0.620057212f,
+    0.782650596f,  0.622461279f,
+    0.780737229f,  0.624859488f,
+    0.778816512f,  0.627251815f,
+    0.776888466f,  0.629638239f,
+    0.774953107f,  0.632018736f,
+    0.773010453f,  0.634393284f,
+    0.771060524f,  0.636761861f,
+    0.769103338f,  0.639124445f,
+    0.767138912f,  0.641481013f,
+    0.765167266f,  0.643831543f,
+    0.763188417f,  0.646176013f,
+    0.761202385f,  0.648514401f,
+    0.759209189f,  0.650846685f,
+    0.757208847f,  0.653172843f,
+    0.755201377f,  0.655492853f,
+    0.753186799f,  0.657806693f,
+    0.751165132f,  0.660114342f,
+    0.749136395f,  0.662415778f,
+    0.747100606f,  0.664710978f,
+    0.745057785f,  0.666999922f,
+    0.743007952f,  0.669282588f,
+    0.740951125f,  0.671558955f,
+    0.738887324f,  0.673829000f,
+    0.736816569f,  0.676092704f,
+    0.734738878f,  0.678350043f,
+    0.732654272f,  0.680600998f,
+    0.730562769f,  0.682845546f,
+    0.728464390f,  0.685083668f,
+    0.726359155f,  0.687315341f,
+    0.724247083f,  0.689540545f,
+    0.722128194f,  0.691759258f,
+    0.720002508f,  0.693971461f,
+    0.717870045f,  0.696177131f,
+    0.715730825f,  0.698376249f,
+    0.713584869f,  0.700568794f,
+    0.711432196f,  0.702754744f,
+    0.709272826f,  0.704934080f,
+    0.707106781f,  0.707106781f,
+    0.704934080f,  0.709272826f,
+    0.702754744f,  0.711432196f,
+    0.700568794f,  0.713584869f,
+    0.698376249f,  0.715730825f,
+    0.696177131f,  0.717870045f,
+    0.693971461f,  0.720002508f,
+    0.691759258f,  0.722128194f,
+    0.689540545f,  0.724247083f,
+    0.687315341f,  0.726359155f,
+    0.685083668f,  0.728464390f,
+    0.682845546f,  0.730562769f,
+    0.680600998f,  0.732654272f,
+    0.678350043f,  0.734738878f,
+    0.676092704f,  0.736816569f,
+    0.673829000f,  0.738887324f,
+    0.671558955f,  0.740951125f,
+    0.669282588f,  0.743007952f,
+    0.666999922f,  0.745057785f,
+    0.664710978f,  0.747100606f,
+    0.662415778f,  0.749136395f,
+    0.660114342f,  0.751165132f,
+    0.657806693f,  0.753186799f,
+    0.655492853f,  0.755201377f,
+    0.653172843f,  0.757208847f,
+    0.650846685f,  0.759209189f,
+    0.648514401f,  0.761202385f,
+    0.646176013f,  0.763188417f,
+    0.643831543f,  0.765167266f,
+    0.641481013f,  0.767138912f,
+    0.639124445f,  0.769103338f,
+    0.636761861f,  0.771060524f,
+    0.634393284f,  0.773010453f,
+    0.632018736f,  0.774953107f,
+    0.629638239f,  0.776888466f,
+    0.627251815f,  0.778816512f,
+    0.624859488f,  0.780737229f,
+    0.622461279f,  0.782650596f,
+    0.620057212f,  0.784556597f,
+    0.617647308f,  0.786455214f,
+    0.615231591f,  0.788346428f,
+    0.612810082f,  0.790230221f,
+    0.610382806f,  0.792106577f,
+    0.607949785f,  0.793975478f,
+    0.605511041f,  0.795836905f,
+    0.603066599f,  0.797690841f,
+    0.600616479f,  0.799537269f,
+    0.598160707f,  0.801376172f,
+    0.595699304f,  0.803207531f,
+    0.593232295f,  0.805031331f,
+    0.590759702f,  0.806847554f,
+    0.588281548f,  0.808656182f,
+    0.585797857f,  0.810457198f,
+    0.583308653f,  0.812250587f,
+    0.580813958f,  0.814036330f,
+    0.578313796f,  0.815814411f,
+    0.575808191f,  0.817584813f,
+    0.573297167f,  0.819347520f,
+    0.570780746f,  0.821102515f,
+    0.568258953f,  0.822849781f,
+    0.565731811f,  0.824589303f,
+    0.563199344f,  0.826321063f,
+    0.560661576f,  0.828045045f,
+    0.558118531f,  0.829761234f,
+    0.555570233f,  0.831469612f,
+    0.553016706f,  0.833170165f,
+    0.550457973f,  0.834862875f,
+    0.547894059f,  0.836547727f,
+    0.545324988f,  0.838224706f,
+    0.542750785f,  0.839893794f,
+    0.540171473f,  0.841554977f,
+    0.537587076f,  0.843208240f,
+    0.534997620f,  0.844853565f,
+    0.532403128f,  0.846490939f,
+    0.529803625f,  0.848120345f,
+    0.527199135f,  0.849741768f,
+    0.524589683f,  0.851355193f,
+    0.521975293f,  0.852960605f,
+    0.519355990f,  0.854557988f,
+    0.516731799f,  0.856147328f,
+    0.514102744f,  0.857728610f,
+    0.511468850f,  0.859301818f,
+    0.508830143f,  0.860866939f,
+    0.506186645f,  0.862423956f,
+    0.503538384f,  0.863972856f,
+    0.500885383f,  0.865513624f,
+    0.498227667f,  0.867046246f,
+    0.495565262f,  0.868570706f,
+    0.492898192f,  0.870086991f,
+    0.490226483f,  0.871595087f,
+    0.487550160f,  0.873094978f,
+    0.484869248f,  0.874586652f,
+    0.482183772f,  0.876070094f,
+    0.479493758f,  0.877545290f,
+    0.476799230f,  0.879012226f,
+    0.474100215f,  0.880470889f,
+    0.471396737f,  0.881921264f,
+    0.468688822f,  0.883363339f,
+    0.465976496f,  0.884797098f,
+    0.463259784f,  0.886222530f,
+    0.460538711f,  0.887639620f,
+    0.457813304f,  0.889048356f,
+    0.455083587f,  0.890448723f,
+    0.452349587f,  0.891840709f,
+    0.449611330f,  0.893224301f,
+    0.446868840f,  0.894599486f,
+    0.444122145f,  0.895966250f,
+    0.441371269f,  0.897324581f,
+    0.438616239f,  0.898674466f,
+    0.435857080f,  0.900015892f,
+    0.433093819f,  0.901348847f,
+    0.430326481f,  0.902673318f,
+    0.427555093f,  0.903989293f,
+    0.424779681f,  0.905296759f,
+    0.422000271f,  0.906595705f,
+    0.419216888f,  0.907886116f,
+    0.416429560f,  0.909167983f,
+    0.413638312f,  0.910441292f,
+    0.410843171f,  0.911706032f,
+    0.408044163f,  0.912962190f,
+    0.405241314f,  0.914209756f,
+    0.402434651f,  0.915448716f,
+    0.399624200f,  0.916679060f,
+    0.396809987f,  0.917900776f,
+    0.393992040f,  0.919113852f,
+    0.391170384f,  0.920318277f,
+    0.388345047f,  0.921514039f,
+    0.385516054f,  0.922701128f,
+    0.382683432f,  0.923879533f,
+    0.379847209f,  0.925049241f,
+    0.377007410f,  0.926210242f,
+    0.374164063f,  0.927362526f,
+    0.371317194f,  0.928506080f,
+    0.368466830f,  0.929640896f,
+    0.365612998f,  0.930766961f,
+    0.362755724f,  0.931884266f,
+    0.359895037f,  0.932992799f,
+    0.357030961f,  0.934092550f,
+    0.354163525f,  0.935183510f,
+    0.351292756f,  0.936265667f,
+    0.348418680f,  0.937339012f,
+    0.345541325f,  0.938403534f,
+    0.342660717f,  0.939459224f,
+    0.339776884f,  0.940506071f,
+    0.336889853f,  0.941544065f,
+    0.333999651f,  0.942573198f,
+    0.331106306f,  0.943593458f,
+    0.328209844f,  0.944604837f,
+    0.325310292f,  0.945607325f,
+    0.322407679f,  0.946600913f,
+    0.319502031f,  0.947585591f,
+    0.316593376f,  0.948561350f,
+    0.313681740f,  0.949528181f,
+    0.310767153f,  0.950486074f,
+    0.307849640f,  0.951435021f,
+    0.304929230f,  0.952375013f,
+    0.302005949f,  0.953306040f,
+    0.299079826f,  0.954228095f,
+    0.296150888f,  0.955141168f,
+    0.293219163f,  0.956045251f,
+    0.290284677f,  0.956940336f,
+    0.287347460f,  0.957826413f,
+    0.284407537f,  0.958703475f,
+    0.281464938f,  0.959571513f,
+    0.278519689f,  0.960430519f,
+    0.275571819f,  0.961280486f,
+    0.272621355f,  0.962121404f,
+    0.269668326f,  0.962953267f,
+    0.266712757f,  0.963776066f,
+    0.263754679f,  0.964589793f,
+    0.260794118f,  0.965394442f,
+    0.257831102f,  0.966190003f,
+    0.254865660f,  0.966976471f,
+    0.251897818f,  0.967753837f,
+    0.248927606f,  0.968522094f,
+    0.245955050f,  0.969281235f,
+    0.242980180f,  0.970031253f,
+    0.240003022f,  0.970772141f,
+    0.237023606f,  0.971503891f,
+    0.234041959f,  0.972226497f,
+    0.231058108f,  0.972939952f,
+    0.228072083f,  0.973644250f,
+    0.225083911f,  0.974339383f,
+    0.222093621f,  0.975025345f,
+    0.219101240f,  0.975702130f,
+    0.216106797f,  0.976369731f,
+    0.213110320f,  0.977028143f,
+    0.210111837f,  0.977677358f,
+    0.207111376f,  0.978317371f,
+    0.204108966f,  0.978948175f,
+    0.201104635f,  0.979569766f,
+    0.198098411f,  0.980182136f,
+    0.195090322f,  0.980785280f,
+    0.192080397f,  0.981379193f,
+    0.189068664f,  0.981963869f,
+    0.186055152f,  0.982539302f,
+    0.183039888f,  0.983105487f,
+    0.180022901f,  0.983662419f,
+    0.177004220f,  0.984210092f,
+    0.173983873f,  0.984748502f,
+    0.170961889f,  0.985277642f,
+    0.167938295f,  0.985797509f,
+    0.164913120f,  0.986308097f,
+    0.161886394f,  0.986809402f,
+    0.158858143f,  0.987301418f,
+    0.155828398f,  0.987784142f,
+    0.152797185f,  0.988257568f,
+    0.149764535f,  0.988721692f,
+    0.146730474f,  0.989176510f,
+    0.143695033f,  0.989622017f,
+    0.140658239f,  0.990058210f,
+    0.137620122f,  0.990485084f,
+    0.134580709f,  0.990902635f,
+    0.131540029f,  0.991310860f,
+    0.128498111f,  0.991709754f,
+    0.125454983f,  0.992099313f,
+    0.122410675f,  0.992479535f,
+    0.119365215f,  0.992850414f,
+    0.116318631f,  0.993211949f,
+    0.113270952f,  0.993564136f,
+    0.110222207f,  0.993906970f,
+    0.107172425f,  0.994240449f,
+    0.104121634f,  0.994564571f,
+    0.101069863f,  0.994879331f,
+    0.098017140f,  0.995184727f,
+    0.094963495f,  0.995480755f,
+    0.091908956f,  0.995767414f,
+    0.088853553f,  0.996044701f,
+    0.085797312f,  0.996312612f,
+    0.082740265f,  0.996571146f,
+    0.079682438f,  0.996820299f,
+    0.076623861f,  0.997060070f,
+    0.073564564f,  0.997290457f,
+    0.070504573f,  0.997511456f,
+    0.067443920f,  0.997723067f,
+    0.064382631f,  0.997925286f,
+    0.061320736f,  0.998118113f,
+    0.058258265f,  0.998301545f,
+    0.055195244f,  0.998475581f,
+    0.052131705f,  0.998640218f,
+    0.049067674f,  0.998795456f,
+    0.046003182f,  0.998941293f,
+    0.042938257f,  0.999077728f,
+    0.039872928f,  0.999204759f,
+    0.036807223f,  0.999322385f,
+    0.033741172f,  0.999430605f,
+    0.030674803f,  0.999529418f,
+    0.027608146f,  0.999618822f,
+    0.024541229f,  0.999698819f,
+    0.021474080f,  0.999769405f,
+    0.018406730f,  0.999830582f,
+    0.015339206f,  0.999882347f,
+    0.012271538f,  0.999924702f,
+    0.009203755f,  0.999957645f,
+    0.006135885f,  0.999981175f,
+    0.003067957f,  0.999995294f,
+    0.000000000f,  1.000000000f,
+   -0.003067957f,  0.999995294f,
+   -0.006135885f,  0.999981175f,
+   -0.009203755f,  0.999957645f,
+   -0.012271538f,  0.999924702f,
+   -0.015339206f,  0.999882347f,
+   -0.018406730f,  0.999830582f,
+   -0.021474080f,  0.999769405f,
+   -0.024541229f,  0.999698819f,
+   -0.027608146f,  0.999618822f,
+   -0.030674803f,  0.999529418f,
+   -0.033741172f,  0.999430605f,
+   -0.036807223f,  0.999322385f,
+   -0.039872928f,  0.999204759f,
+   -0.042938257f,  0.999077728f,
+   -0.046003182f,  0.998941293f,
+   -0.049067674f,  0.998795456f,
+   -0.052131705f,  0.998640218f,
+   -0.055195244f,  0.998475581f,
+   -0.058258265f,  0.998301545f,
+   -0.061320736f,  0.998118113f,
+   -0.064382631f,  0.997925286f,
+   -0.067443920f,  0.997723067f,
+   -0.070504573f,  0.997511456f,
+   -0.073564564f,  0.997290457f,
+   -0.076623861f,  0.997060070f,
+   -0.079682438f,  0.996820299f,
+   -0.082740265f,  0.996571146f,
+   -0.085797312f,  0.996312612f,
+   -0.088853553f,  0.996044701f,
+   -0.091908956f,  0.995767414f,
+   -0.094963495f,  0.995480755f,
+   -0.098017140f,  0.995184727f,
+   -0.101069863f,  0.994879331f,
+   -0.104121634f,  0.994564571f,
+   -0.107172425f,  0.994240449f,
+   -0.110222207f,  0.993906970f,
+   -0.113270952f,  0.993564136f,
+   -0.116318631f,  0.993211949f,
+   -0.119365215f,  0.992850414f,
+   -0.122410675f,  0.992479535f,
+   -0.125454983f,  0.992099313f,
+   -0.128498111f,  0.991709754f,
+   -0.131540029f,  0.991310860f,
+   -0.134580709f,  0.990902635f,
+   -0.137620122f,  0.990485084f,
+   -0.140658239f,  0.990058210f,
+   -0.143695033f,  0.989622017f,
+   -0.146730474f,  0.989176510f,
+   -0.149764535f,  0.988721692f,
+   -0.152797185f,  0.988257568f,
+   -0.155828398f,  0.987784142f,
+   -0.158858143f,  0.987301418f,
+   -0.161886394f,  0.986809402f,
+   -0.164913120f,  0.986308097f,
+   -0.167938295f,  0.985797509f,
+   -0.170961889f,  0.985277642f,
+   -0.173983873f,  0.984748502f,
+   -0.177004220f,  0.984210092f,
+   -0.180022901f,  0.983662419f,
+   -0.183039888f,  0.983105487f,
+   -0.186055152f,  0.982539302f,
+   -0.189068664f,  0.981963869f,
+   -0.192080397f,  0.981379193f,
+   -0.195090322f,  0.980785280f,
+   -0.198098411f,  0.980182136f,
+   -0.201104635f,  0.979569766f,
+   -0.204108966f,  0.978948175f,
+   -0.207111376f,  0.978317371f,
+   -0.210111837f,  0.977677358f,
+   -0.213110320f,  0.977028143f,
+   -0.216106797f,  0.976369731f,
+   -0.219101240f,  0.975702130f,
+   -0.222093621f,  0.975025345f,
+   -0.225083911f,  0.974339383f,
+   -0.228072083f,  0.973644250f,
+   -0.231058108f,  0.972939952f,
+   -0.234041959f,  0.972226497f,
+   -0.237023606f,  0.971503891f,
+   -0.240003022f,  0.970772141f,
+   -0.242980180f,  0.970031253f,
+   -0.245955050f,  0.969281235f,
+   -0.248927606f,  0.968522094f,
+   -0.251897818f,  0.967753837f,
+   -0.254865660f,  0.966976471f,
+   -0.257831102f,  0.966190003f,
+   -0.260794118f,  0.965394442f,
+   -0.263754679f,  0.964589793f,
+   -0.266712757f,  0.963776066f,
+   -0.269668326f,  0.962953267f,
+   -0.272621355f,  0.962121404f,
+   -0.275571819f,  0.961280486f,
+   -0.278519689f,  0.960430519f,
+   -0.281464938f,  0.959571513f,
+   -0.284407537f,  0.958703475f,
+   -0.287347460f,  0.957826413f,
+   -0.290284677f,  0.956940336f,
+   -0.293219163f,  0.956045251f,
+   -0.296150888f,  0.955141168f,
+   -0.299079826f,  0.954228095f,
+   -0.302005949f,  0.953306040f,
+   -0.304929230f,  0.952375013f,
+   -0.307849640f,  0.951435021f,
+   -0.310767153f,  0.950486074f,
+   -0.313681740f,  0.949528181f,
+   -0.316593376f,  0.948561350f,
+   -0.319502031f,  0.947585591f,
+   -0.322407679f,  0.946600913f,
+   -0.325310292f,  0.945607325f,
+   -0.328209844f,  0.944604837f,
+   -0.331106306f,  0.943593458f,
+   -0.333999651f,  0.942573198f,
+   -0.336889853f,  0.941544065f,
+   -0.339776884f,  0.940506071f,
+   -0.342660717f,  0.939459224f,
+   -0.345541325f,  0.938403534f,
+   -0.348418680f,  0.937339012f,
+   -0.351292756f,  0.936265667f,
+   -0.354163525f,  0.935183510f,
+   -0.357030961f,  0.934092550f,
+   -0.359895037f,  0.932992799f,
+   -0.362755724f,  0.931884266f,
+   -0.365612998f,  0.930766961f,
+   -0.368466830f,  0.929640896f,
+   -0.371317194f,  0.928506080f,
+   -0.374164063f,  0.927362526f,
+   -0.377007410f,  0.926210242f,
+   -0.379847209f,  0.925049241f,
+   -0.382683432f,  0.923879533f,
+   -0.385516054f,  0.922701128f,
+   -0.388345047f,  0.921514039f,
+   -0.391170384f,  0.920318277f,
+   -0.393992040f,  0.919113852f,
+   -0.396809987f,  0.917900776f,
+   -0.399624200f,  0.916679060f,
+   -0.402434651f,  0.915448716f,
+   -0.405241314f,  0.914209756f,
+   -0.408044163f,  0.912962190f,
+   -0.410843171f,  0.911706032f,
+   -0.413638312f,  0.910441292f,
+   -0.416429560f,  0.909167983f,
+   -0.419216888f,  0.907886116f,
+   -0.422000271f,  0.906595705f,
+   -0.424779681f,  0.905296759f,
+   -0.427555093f,  0.903989293f,
+   -0.430326481f,  0.902673318f,
+   -0.433093819f,  0.901348847f,
+   -0.435857080f,  0.900015892f,
+   -0.438616239f,  0.898674466f,
+   -0.441371269f,  0.897324581f,
+   -0.444122145f,  0.895966250f,
+   -0.446868840f,  0.894599486f,
+   -0.449611330f,  0.893224301f,
+   -0.452349587f,  0.891840709f,
+   -0.455083587f,  0.890448723f,
+   -0.457813304f,  0.889048356f,
+   -0.460538711f,  0.887639620f,
+   -0.463259784f,  0.886222530f,
+   -0.465976496f,  0.884797098f,
+   -0.468688822f,  0.883363339f,
+   -0.471396737f,  0.881921264f,
+   -0.474100215f,  0.880470889f,
+   -0.476799230f,  0.879012226f,
+   -0.479493758f,  0.877545290f,
+   -0.482183772f,  0.876070094f,
+   -0.484869248f,  0.874586652f,
+   -0.487550160f,  0.873094978f,
+   -0.490226483f,  0.871595087f,
+   -0.492898192f,  0.870086991f,
+   -0.495565262f,  0.868570706f,
+   -0.498227667f,  0.867046246f,
+   -0.500885383f,  0.865513624f,
+   -0.503538384f,  0.863972856f,
+   -0.506186645f,  0.862423956f,
+   -0.508830143f,  0.860866939f,
+   -0.511468850f,  0.859301818f,
+   -0.514102744f,  0.857728610f,
+   -0.516731799f,  0.856147328f,
+   -0.519355990f,  0.854557988f,
+   -0.521975293f,  0.852960605f,
+   -0.524589683f,  0.851355193f,
+   -0.527199135f,  0.849741768f,
+   -0.529803625f,  0.848120345f,
+   -0.532403128f,  0.846490939f,
+   -0.534997620f,  0.844853565f,
+   -0.537587076f,  0.843208240f,
+   -0.540171473f,  0.841554977f,
+   -0.542750785f,  0.839893794f,
+   -0.545324988f,  0.838224706f,
+   -0.547894059f,  0.836547727f,
+   -0.550457973f,  0.834862875f,
+   -0.553016706f,  0.833170165f,
+   -0.555570233f,  0.831469612f,
+   -0.558118531f,  0.829761234f,
+   -0.560661576f,  0.828045045f,
+   -0.563199344f,  0.826321063f,
+   -0.565731811f,  0.824589303f,
+   -0.568258953f,  0.822849781f,
+   -0.570780746f,  0.821102515f,
+   -0.573297167f,  0.819347520f,
+   -0.575808191f,  0.817584813f,
+   -0.578313796f,  0.815814411f,
+   -0.580813958f,  0.814036330f,
+   -0.583308653f,  0.812250587f,
+   -0.585797857f,  0.810457198f,
+   -0.588281548f,  0.808656182f,
+   -0.590759702f,  0.806847554f,
+   -0.593232295f,  0.805031331f,
+   -0.595699304f,  0.803207531f,
+   -0.598160707f,  0.801376172f,
+   -0.600616479f,  0.799537269f,
+   -0.603066599f,  0.797690841f,
+   -0.605511041f,  0.795836905f,
+   -0.607949785f,  0.793975478f,
+   -0.610382806f,  0.792106577f,
+   -0.612810082f,  0.790230221f,
+   -0.615231591f,  0.788346428f,
+   -0.617647308f,  0.786455214f,
+   -0.620057212f,  0.784556597f,
+   -0.622461279f,  0.782650596f,
+   -0.624859488f,  0.780737229f,
+   -0.627251815f,  0.778816512f,
+   -0.629638239f,  0.776888466f,
+   -0.632018736f,  0.774953107f,
+   -0.634393284f,  0.773010453f,
+   -0.636761861f,  0.771060524f,
+   -0.639124445f,  0.769103338f,
+   -0.641481013f,  0.767138912f,
+   -0.643831543f,  0.765167266f,
+   -0.646176013f,  0.763188417f,
+   -0.648514401f,  0.761202385f,
+   -0.650846685f,  0.759209189f,
+   -0.653172843f,  0.757208847f,
+   -0.655492853f,  0.755201377f,
+   -0.657806693f,  0.753186799f,
+   -0.660114342f,  0.751165132f,
+   -0.662415778f,  0.749136395f,
+   -0.664710978f,  0.747100606f,
+   -0.666999922f,  0.745057785f,
+   -0.669282588f,  0.743007952f,
+   -0.671558955f,  0.740951125f,
+   -0.673829000f,  0.738887324f,
+   -0.676092704f,  0.736816569f,
+   -0.678350043f,  0.734738878f,
+   -0.680600998f,  0.732654272f,
+   -0.682845546f,  0.730562769f,
+   -0.685083668f,  0.728464390f,
+   -0.687315341f,  0.726359155f,
+   -0.689540545f,  0.724247083f,
+   -0.691759258f,  0.722128194f,
+   -0.693971461f,  0.720002508f,
+   -0.696177131f,  0.717870045f,
+   -0.698376249f,  0.715730825f,
+   -0.700568794f,  0.713584869f,
+   -0.702754744f,  0.711432196f,
+   -0.704934080f,  0.709272826f,
+   -0.707106781f,  0.707106781f,
+   -0.709272826f,  0.704934080f,
+   -0.711432196f,  0.702754744f,
+   -0.713584869f,  0.700568794f,
+   -0.715730825f,  0.698376249f,
+   -0.717870045f,  0.696177131f,
+   -0.720002508f,  0.693971461f,
+   -0.722128194f,  0.691759258f,
+   -0.724247083f,  0.689540545f,
+   -0.726359155f,  0.687315341f,
+   -0.728464390f,  0.685083668f,
+   -0.730562769f,  0.682845546f,
+   -0.732654272f,  0.680600998f,
+   -0.734738878f,  0.678350043f,
+   -0.736816569f,  0.676092704f,
+   -0.738887324f,  0.673829000f,
+   -0.740951125f,  0.671558955f,
+   -0.743007952f,  0.669282588f,
+   -0.745057785f,  0.666999922f,
+   -0.747100606f,  0.664710978f,
+   -0.749136395f,  0.662415778f,
+   -0.751165132f,  0.660114342f,
+   -0.753186799f,  0.657806693f,
+   -0.755201377f,  0.655492853f,
+   -0.757208847f,  0.653172843f,
+   -0.759209189f,  0.650846685f,
+   -0.761202385f,  0.648514401f,
+   -0.763188417f,  0.646176013f,
+   -0.765167266f,  0.643831543f,
+   -0.767138912f,  0.641481013f,
+   -0.769103338f,  0.639124445f,
+   -0.771060524f,  0.636761861f,
+   -0.773010453f,  0.634393284f,
+   -0.774953107f,  0.632018736f,
+   -0.776888466f,  0.629638239f,
+   -0.778816512f,  0.627251815f,
+   -0.780737229f,  0.624859488f,
+   -0.782650596f,  0.622461279f,
+   -0.784556597f,  0.620057212f,
+   -0.786455214f,  0.617647308f,
+   -0.788346428f,  0.615231591f,
+   -0.790230221f,  0.612810082f,
+   -0.792106577f,  0.610382806f,
+   -0.793975478f,  0.607949785f,
+   -0.795836905f,  0.605511041f,
+   -0.797690841f,  0.603066599f,
+   -0.799537269f,  0.600616479f,
+   -0.801376172f,  0.598160707f,
+   -0.803207531f,  0.595699304f,
+   -0.805031331f,  0.593232295f,
+   -0.806847554f,  0.590759702f,
+   -0.808656182f,  0.588281548f,
+   -0.810457198f,  0.585797857f,
+   -0.812250587f,  0.583308653f,
+   -0.814036330f,  0.580813958f,
+   -0.815814411f,  0.578313796f,
+   -0.817584813f,  0.575808191f,
+   -0.819347520f,  0.573297167f,
+   -0.821102515f,  0.570780746f,
+   -0.822849781f,  0.568258953f,
+   -0.824589303f,  0.565731811f,
+   -0.826321063f,  0.563199344f,
+   -0.828045045f,  0.560661576f,
+   -0.829761234f,  0.558118531f,
+   -0.831469612f,  0.555570233f,
+   -0.833170165f,  0.553016706f,
+   -0.834862875f,  0.550457973f,
+   -0.836547727f,  0.547894059f,
+   -0.838224706f,  0.545324988f,
+   -0.839893794f,  0.542750785f,
+   -0.841554977f,  0.540171473f,
+   -0.843208240f,  0.537587076f,
+   -0.844853565f,  0.534997620f,
+   -0.846490939f,  0.532403128f,
+   -0.848120345f,  0.529803625f,
+   -0.849741768f,  0.527199135f,
+   -0.851355193f,  0.524589683f,
+   -0.852960605f,  0.521975293f,
+   -0.854557988f,  0.519355990f,
+   -0.856147328f,  0.516731799f,
+   -0.857728610f,  0.514102744f,
+   -0.859301818f,  0.511468850f,
+   -0.860866939f,  0.508830143f,
+   -0.862423956f,  0.506186645f,
+   -0.863972856f,  0.503538384f,
+   -0.865513624f,  0.500885383f,
+   -0.867046246f,  0.498227667f,
+   -0.868570706f,  0.495565262f,
+   -0.870086991f,  0.492898192f,
+   -0.871595087f,  0.490226483f,
+   -0.873094978f,  0.487550160f,
+   -0.874586652f,  0.484869248f,
+   -0.876070094f,  0.482183772f,
+   -0.877545290f,  0.479493758f,
+   -0.879012226f,  0.476799230f,
+   -0.880470889f,  0.474100215f,
+   -0.881921264f,  0.471396737f,
+   -0.883363339f,  0.468688822f,
+   -0.884797098f,  0.465976496f,
+   -0.886222530f,  0.463259784f,
+   -0.887639620f,  0.460538711f,
+   -0.889048356f,  0.457813304f,
+   -0.890448723f,  0.455083587f,
+   -0.891840709f,  0.452349587f,
+   -0.893224301f,  0.449611330f,
+   -0.894599486f,  0.446868840f,
+   -0.895966250f,  0.444122145f,
+   -0.897324581f,  0.441371269f,
+   -0.898674466f,  0.438616239f,
+   -0.900015892f,  0.435857080f,
+   -0.901348847f,  0.433093819f,
+   -0.902673318f,  0.430326481f,
+   -0.903989293f,  0.427555093f,
+   -0.905296759f,  0.424779681f,
+   -0.906595705f,  0.422000271f,
+   -0.907886116f,  0.419216888f,
+   -0.909167983f,  0.416429560f,
+   -0.910441292f,  0.413638312f,
+   -0.911706032f,  0.410843171f,
+   -0.912962190f,  0.408044163f,
+   -0.914209756f,  0.405241314f,
+   -0.915448716f,  0.402434651f,
+   -0.916679060f,  0.399624200f,
+   -0.917900776f,  0.396809987f,
+   -0.919113852f,  0.393992040f,
+   -0.920318277f,  0.391170384f,
+   -0.921514039f,  0.388345047f,
+   -0.922701128f,  0.385516054f,
+   -0.923879533f,  0.382683432f,
+   -0.925049241f,  0.379847209f,
+   -0.926210242f,  0.377007410f,
+   -0.927362526f,  0.374164063f,
+   -0.928506080f,  0.371317194f,
+   -0.929640896f,  0.368466830f,
+   -0.930766961f,  0.365612998f,
+   -0.931884266f,  0.362755724f,
+   -0.932992799f,  0.359895037f,
+   -0.934092550f,  0.357030961f,
+   -0.935183510f,  0.354163525f,
+   -0.936265667f,  0.351292756f,
+   -0.937339012f,  0.348418680f,
+   -0.938403534f,  0.345541325f,
+   -0.939459224f,  0.342660717f,
+   -0.940506071f,  0.339776884f,
+   -0.941544065f,  0.336889853f,
+   -0.942573198f,  0.333999651f,
+   -0.943593458f,  0.331106306f,
+   -0.944604837f,  0.328209844f,
+   -0.945607325f,  0.325310292f,
+   -0.946600913f,  0.322407679f,
+   -0.947585591f,  0.319502031f,
+   -0.948561350f,  0.316593376f,
+   -0.949528181f,  0.313681740f,
+   -0.950486074f,  0.310767153f,
+   -0.951435021f,  0.307849640f,
+   -0.952375013f,  0.304929230f,
+   -0.953306040f,  0.302005949f,
+   -0.954228095f,  0.299079826f,
+   -0.955141168f,  0.296150888f,
+   -0.956045251f,  0.293219163f,
+   -0.956940336f,  0.290284677f,
+   -0.957826413f,  0.287347460f,
+   -0.958703475f,  0.284407537f,
+   -0.959571513f,  0.281464938f,
+   -0.960430519f,  0.278519689f,
+   -0.961280486f,  0.275571819f,
+   -0.962121404f,  0.272621355f,
+   -0.962953267f,  0.269668326f,
+   -0.963776066f,  0.266712757f,
+   -0.964589793f,  0.263754679f,
+   -0.965394442f,  0.260794118f,
+   -0.966190003f,  0.257831102f,
+   -0.966976471f,  0.254865660f,
+   -0.967753837f,  0.251897818f,
+   -0.968522094f,  0.248927606f,
+   -0.969281235f,  0.245955050f,
+   -0.970031253f,  0.242980180f,
+   -0.970772141f,  0.240003022f,
+   -0.971503891f,  0.237023606f,
+   -0.972226497f,  0.234041959f,
+   -0.972939952f,  0.231058108f,
+   -0.973644250f,  0.228072083f,
+   -0.974339383f,  0.225083911f,
+   -0.975025345f,  0.222093621f,
+   -0.975702130f,  0.219101240f,
+   -0.976369731f,  0.216106797f,
+   -0.977028143f,  0.213110320f,
+   -0.977677358f,  0.210111837f,
+   -0.978317371f,  0.207111376f,
+   -0.978948175f,  0.204108966f,
+   -0.979569766f,  0.201104635f,
+   -0.980182136f,  0.198098411f,
+   -0.980785280f,  0.195090322f,
+   -0.981379193f,  0.192080397f,
+   -0.981963869f,  0.189068664f,
+   -0.982539302f,  0.186055152f,
+   -0.983105487f,  0.183039888f,
+   -0.983662419f,  0.180022901f,
+   -0.984210092f,  0.177004220f,
+   -0.984748502f,  0.173983873f,
+   -0.985277642f,  0.170961889f,
+   -0.985797509f,  0.167938295f,
+   -0.986308097f,  0.164913120f,
+   -0.986809402f,  0.161886394f,
+   -0.987301418f,  0.158858143f,
+   -0.987784142f,  0.155828398f,
+   -0.988257568f,  0.152797185f,
+   -0.988721692f,  0.149764535f,
+   -0.989176510f,  0.146730474f,
+   -0.989622017f,  0.143695033f,
+   -0.990058210f,  0.140658239f,
+   -0.990485084f,  0.137620122f,
+   -0.990902635f,  0.134580709f,
+   -0.991310860f,  0.131540029f,
+   -0.991709754f,  0.128498111f,
+   -0.992099313f,  0.125454983f,
+   -0.992479535f,  0.122410675f,
+   -0.992850414f,  0.119365215f,
+   -0.993211949f,  0.116318631f,
+   -0.993564136f,  0.113270952f,
+   -0.993906970f,  0.110222207f,
+   -0.994240449f,  0.107172425f,
+   -0.994564571f,  0.104121634f,
+   -0.994879331f,  0.101069863f,
+   -0.995184727f,  0.098017140f,
+   -0.995480755f,  0.094963495f,
+   -0.995767414f,  0.091908956f,
+   -0.996044701f,  0.088853553f,
+   -0.996312612f,  0.085797312f,
+   -0.996571146f,  0.082740265f,
+   -0.996820299f,  0.079682438f,
+   -0.997060070f,  0.076623861f,
+   -0.997290457f,  0.073564564f,
+   -0.997511456f,  0.070504573f,
+   -0.997723067f,  0.067443920f,
+   -0.997925286f,  0.064382631f,
+   -0.998118113f,  0.061320736f,
+   -0.998301545f,  0.058258265f,
+   -0.998475581f,  0.055195244f,
+   -0.998640218f,  0.052131705f,
+   -0.998795456f,  0.049067674f,
+   -0.998941293f,  0.046003182f,
+   -0.999077728f,  0.042938257f,
+   -0.999204759f,  0.039872928f,
+   -0.999322385f,  0.036807223f,
+   -0.999430605f,  0.033741172f,
+   -0.999529418f,  0.030674803f,
+   -0.999618822f,  0.027608146f,
+   -0.999698819f,  0.024541229f,
+   -0.999769405f,  0.021474080f,
+   -0.999830582f,  0.018406730f,
+   -0.999882347f,  0.015339206f,
+   -0.999924702f,  0.012271538f,
+   -0.999957645f,  0.009203755f,
+   -0.999981175f,  0.006135885f,
+   -0.999995294f,  0.003067957f,
+   -1.000000000f,  0.000000000f,
+   -0.999995294f, -0.003067957f,
+   -0.999981175f, -0.006135885f,
+   -0.999957645f, -0.009203755f,
+   -0.999924702f, -0.012271538f,
+   -0.999882347f, -0.015339206f,
+   -0.999830582f, -0.018406730f,
+   -0.999769405f, -0.021474080f,
+   -0.999698819f, -0.024541229f,
+   -0.999618822f, -0.027608146f,
+   -0.999529418f, -0.030674803f,
+   -0.999430605f, -0.033741172f,
+   -0.999322385f, -0.036807223f,
+   -0.999204759f, -0.039872928f,
+   -0.999077728f, -0.042938257f,
+   -0.998941293f, -0.046003182f,
+   -0.998795456f, -0.049067674f,
+   -0.998640218f, -0.052131705f,
+   -0.998475581f, -0.055195244f,
+   -0.998301545f, -0.058258265f,
+   -0.998118113f, -0.061320736f,
+   -0.997925286f, -0.064382631f,
+   -0.997723067f, -0.067443920f,
+   -0.997511456f, -0.070504573f,
+   -0.997290457f, -0.073564564f,
+   -0.997060070f, -0.076623861f,
+   -0.996820299f, -0.079682438f,
+   -0.996571146f, -0.082740265f,
+   -0.996312612f, -0.085797312f,
+   -0.996044701f, -0.088853553f,
+   -0.995767414f, -0.091908956f,
+   -0.995480755f, -0.094963495f,
+   -0.995184727f, -0.098017140f,
+   -0.994879331f, -0.101069863f,
+   -0.994564571f, -0.104121634f,
+   -0.994240449f, -0.107172425f,
+   -0.993906970f, -0.110222207f,
+   -0.993564136f, -0.113270952f,
+   -0.993211949f, -0.116318631f,
+   -0.992850414f, -0.119365215f,
+   -0.992479535f, -0.122410675f,
+   -0.992099313f, -0.125454983f,
+   -0.991709754f, -0.128498111f,
+   -0.991310860f, -0.131540029f,
+   -0.990902635f, -0.134580709f,
+   -0.990485084f, -0.137620122f,
+   -0.990058210f, -0.140658239f,
+   -0.989622017f, -0.143695033f,
+   -0.989176510f, -0.146730474f,
+   -0.988721692f, -0.149764535f,
+   -0.988257568f, -0.152797185f,
+   -0.987784142f, -0.155828398f,
+   -0.987301418f, -0.158858143f,
+   -0.986809402f, -0.161886394f,
+   -0.986308097f, -0.164913120f,
+   -0.985797509f, -0.167938295f,
+   -0.985277642f, -0.170961889f,
+   -0.984748502f, -0.173983873f,
+   -0.984210092f, -0.177004220f,
+   -0.983662419f, -0.180022901f,
+   -0.983105487f, -0.183039888f,
+   -0.982539302f, -0.186055152f,
+   -0.981963869f, -0.189068664f,
+   -0.981379193f, -0.192080397f,
+   -0.980785280f, -0.195090322f,
+   -0.980182136f, -0.198098411f,
+   -0.979569766f, -0.201104635f,
+   -0.978948175f, -0.204108966f,
+   -0.978317371f, -0.207111376f,
+   -0.977677358f, -0.210111837f,
+   -0.977028143f, -0.213110320f,
+   -0.976369731f, -0.216106797f,
+   -0.975702130f, -0.219101240f,
+   -0.975025345f, -0.222093621f,
+   -0.974339383f, -0.225083911f,
+   -0.973644250f, -0.228072083f,
+   -0.972939952f, -0.231058108f,
+   -0.972226497f, -0.234041959f,
+   -0.971503891f, -0.237023606f,
+   -0.970772141f, -0.240003022f,
+   -0.970031253f, -0.242980180f,
+   -0.969281235f, -0.245955050f,
+   -0.968522094f, -0.248927606f,
+   -0.967753837f, -0.251897818f,
+   -0.966976471f, -0.254865660f,
+   -0.966190003f, -0.257831102f,
+   -0.965394442f, -0.260794118f,
+   -0.964589793f, -0.263754679f,
+   -0.963776066f, -0.266712757f,
+   -0.962953267f, -0.269668326f,
+   -0.962121404f, -0.272621355f,
+   -0.961280486f, -0.275571819f,
+   -0.960430519f, -0.278519689f,
+   -0.959571513f, -0.281464938f,
+   -0.958703475f, -0.284407537f,
+   -0.957826413f, -0.287347460f,
+   -0.956940336f, -0.290284677f,
+   -0.956045251f, -0.293219163f,
+   -0.955141168f, -0.296150888f,
+   -0.954228095f, -0.299079826f,
+   -0.953306040f, -0.302005949f,
+   -0.952375013f, -0.304929230f,
+   -0.951435021f, -0.307849640f,
+   -0.950486074f, -0.310767153f,
+   -0.949528181f, -0.313681740f,
+   -0.948561350f, -0.316593376f,
+   -0.947585591f, -0.319502031f,
+   -0.946600913f, -0.322407679f,
+   -0.945607325f, -0.325310292f,
+   -0.944604837f, -0.328209844f,
+   -0.943593458f, -0.331106306f,
+   -0.942573198f, -0.333999651f,
+   -0.941544065f, -0.336889853f,
+   -0.940506071f, -0.339776884f,
+   -0.939459224f, -0.342660717f,
+   -0.938403534f, -0.345541325f,
+   -0.937339012f, -0.348418680f,
+   -0.936265667f, -0.351292756f,
+   -0.935183510f, -0.354163525f,
+   -0.934092550f, -0.357030961f,
+   -0.932992799f, -0.359895037f,
+   -0.931884266f, -0.362755724f,
+   -0.930766961f, -0.365612998f,
+   -0.929640896f, -0.368466830f,
+   -0.928506080f, -0.371317194f,
+   -0.927362526f, -0.374164063f,
+   -0.926210242f, -0.377007410f,
+   -0.925049241f, -0.379847209f,
+   -0.923879533f, -0.382683432f,
+   -0.922701128f, -0.385516054f,
+   -0.921514039f, -0.388345047f,
+   -0.920318277f, -0.391170384f,
+   -0.919113852f, -0.393992040f,
+   -0.917900776f, -0.396809987f,
+   -0.916679060f, -0.399624200f,
+   -0.915448716f, -0.402434651f,
+   -0.914209756f, -0.405241314f,
+   -0.912962190f, -0.408044163f,
+   -0.911706032f, -0.410843171f,
+   -0.910441292f, -0.413638312f,
+   -0.909167983f, -0.416429560f,
+   -0.907886116f, -0.419216888f,
+   -0.906595705f, -0.422000271f,
+   -0.905296759f, -0.424779681f,
+   -0.903989293f, -0.427555093f,
+   -0.902673318f, -0.430326481f,
+   -0.901348847f, -0.433093819f,
+   -0.900015892f, -0.435857080f,
+   -0.898674466f, -0.438616239f,
+   -0.897324581f, -0.441371269f,
+   -0.895966250f, -0.444122145f,
+   -0.894599486f, -0.446868840f,
+   -0.893224301f, -0.449611330f,
+   -0.891840709f, -0.452349587f,
+   -0.890448723f, -0.455083587f,
+   -0.889048356f, -0.457813304f,
+   -0.887639620f, -0.460538711f,
+   -0.886222530f, -0.463259784f,
+   -0.884797098f, -0.465976496f,
+   -0.883363339f, -0.468688822f,
+   -0.881921264f, -0.471396737f,
+   -0.880470889f, -0.474100215f,
+   -0.879012226f, -0.476799230f,
+   -0.877545290f, -0.479493758f,
+   -0.876070094f, -0.482183772f,
+   -0.874586652f, -0.484869248f,
+   -0.873094978f, -0.487550160f,
+   -0.871595087f, -0.490226483f,
+   -0.870086991f, -0.492898192f,
+   -0.868570706f, -0.495565262f,
+   -0.867046246f, -0.498227667f,
+   -0.865513624f, -0.500885383f,
+   -0.863972856f, -0.503538384f,
+   -0.862423956f, -0.506186645f,
+   -0.860866939f, -0.508830143f,
+   -0.859301818f, -0.511468850f,
+   -0.857728610f, -0.514102744f,
+   -0.856147328f, -0.516731799f,
+   -0.854557988f, -0.519355990f,
+   -0.852960605f, -0.521975293f,
+   -0.851355193f, -0.524589683f,
+   -0.849741768f, -0.527199135f,
+   -0.848120345f, -0.529803625f,
+   -0.846490939f, -0.532403128f,
+   -0.844853565f, -0.534997620f,
+   -0.843208240f, -0.537587076f,
+   -0.841554977f, -0.540171473f,
+   -0.839893794f, -0.542750785f,
+   -0.838224706f, -0.545324988f,
+   -0.836547727f, -0.547894059f,
+   -0.834862875f, -0.550457973f,
+   -0.833170165f, -0.553016706f,
+   -0.831469612f, -0.555570233f,
+   -0.829761234f, -0.558118531f,
+   -0.828045045f, -0.560661576f,
+   -0.826321063f, -0.563199344f,
+   -0.824589303f, -0.565731811f,
+   -0.822849781f, -0.568258953f,
+   -0.821102515f, -0.570780746f,
+   -0.819347520f, -0.573297167f,
+   -0.817584813f, -0.575808191f,
+   -0.815814411f, -0.578313796f,
+   -0.814036330f, -0.580813958f,
+   -0.812250587f, -0.583308653f,
+   -0.810457198f, -0.585797857f,
+   -0.808656182f, -0.588281548f,
+   -0.806847554f, -0.590759702f,
+   -0.805031331f, -0.593232295f,
+   -0.803207531f, -0.595699304f,
+   -0.801376172f, -0.598160707f,
+   -0.799537269f, -0.600616479f,
+   -0.797690841f, -0.603066599f,
+   -0.795836905f, -0.605511041f,
+   -0.793975478f, -0.607949785f,
+   -0.792106577f, -0.610382806f,
+   -0.790230221f, -0.612810082f,
+   -0.788346428f, -0.615231591f,
+   -0.786455214f, -0.617647308f,
+   -0.784556597f, -0.620057212f,
+   -0.782650596f, -0.622461279f,
+   -0.780737229f, -0.624859488f,
+   -0.778816512f, -0.627251815f,
+   -0.776888466f, -0.629638239f,
+   -0.774953107f, -0.632018736f,
+   -0.773010453f, -0.634393284f,
+   -0.771060524f, -0.636761861f,
+   -0.769103338f, -0.639124445f,
+   -0.767138912f, -0.641481013f,
+   -0.765167266f, -0.643831543f,
+   -0.763188417f, -0.646176013f,
+   -0.761202385f, -0.648514401f,
+   -0.759209189f, -0.650846685f,
+   -0.757208847f, -0.653172843f,
+   -0.755201377f, -0.655492853f,
+   -0.753186799f, -0.657806693f,
+   -0.751165132f, -0.660114342f,
+   -0.749136395f, -0.662415778f,
+   -0.747100606f, -0.664710978f,
+   -0.745057785f, -0.666999922f,
+   -0.743007952f, -0.669282588f,
+   -0.740951125f, -0.671558955f,
+   -0.738887324f, -0.673829000f,
+   -0.736816569f, -0.676092704f,
+   -0.734738878f, -0.678350043f,
+   -0.732654272f, -0.680600998f,
+   -0.730562769f, -0.682845546f,
+   -0.728464390f, -0.685083668f,
+   -0.726359155f, -0.687315341f,
+   -0.724247083f, -0.689540545f,
+   -0.722128194f, -0.691759258f,
+   -0.720002508f, -0.693971461f,
+   -0.717870045f, -0.696177131f,
+   -0.715730825f, -0.698376249f,
+   -0.713584869f, -0.700568794f,
+   -0.711432196f, -0.702754744f,
+   -0.709272826f, -0.704934080f,
+   -0.707106781f, -0.707106781f,
+   -0.704934080f, -0.709272826f,
+   -0.702754744f, -0.711432196f,
+   -0.700568794f, -0.713584869f,
+   -0.698376249f, -0.715730825f,
+   -0.696177131f, -0.717870045f,
+   -0.693971461f, -0.720002508f,
+   -0.691759258f, -0.722128194f,
+   -0.689540545f, -0.724247083f,
+   -0.687315341f, -0.726359155f,
+   -0.685083668f, -0.728464390f,
+   -0.682845546f, -0.730562769f,
+   -0.680600998f, -0.732654272f,
+   -0.678350043f, -0.734738878f,
+   -0.676092704f, -0.736816569f,
+   -0.673829000f, -0.738887324f,
+   -0.671558955f, -0.740951125f,
+   -0.669282588f, -0.743007952f,
+   -0.666999922f, -0.745057785f,
+   -0.664710978f, -0.747100606f,
+   -0.662415778f, -0.749136395f,
+   -0.660114342f, -0.751165132f,
+   -0.657806693f, -0.753186799f,
+   -0.655492853f, -0.755201377f,
+   -0.653172843f, -0.757208847f,
+   -0.650846685f, -0.759209189f,
+   -0.648514401f, -0.761202385f,
+   -0.646176013f, -0.763188417f,
+   -0.643831543f, -0.765167266f,
+   -0.641481013f, -0.767138912f,
+   -0.639124445f, -0.769103338f,
+   -0.636761861f, -0.771060524f,
+   -0.634393284f, -0.773010453f,
+   -0.632018736f, -0.774953107f,
+   -0.629638239f, -0.776888466f,
+   -0.627251815f, -0.778816512f,
+   -0.624859488f, -0.780737229f,
+   -0.622461279f, -0.782650596f,
+   -0.620057212f, -0.784556597f,
+   -0.617647308f, -0.786455214f,
+   -0.615231591f, -0.788346428f,
+   -0.612810082f, -0.790230221f,
+   -0.610382806f, -0.792106577f,
+   -0.607949785f, -0.793975478f,
+   -0.605511041f, -0.795836905f,
+   -0.603066599f, -0.797690841f,
+   -0.600616479f, -0.799537269f,
+   -0.598160707f, -0.801376172f,
+   -0.595699304f, -0.803207531f,
+   -0.593232295f, -0.805031331f,
+   -0.590759702f, -0.806847554f,
+   -0.588281548f, -0.808656182f,
+   -0.585797857f, -0.810457198f,
+   -0.583308653f, -0.812250587f,
+   -0.580813958f, -0.814036330f,
+   -0.578313796f, -0.815814411f,
+   -0.575808191f, -0.817584813f,
+   -0.573297167f, -0.819347520f,
+   -0.570780746f, -0.821102515f,
+   -0.568258953f, -0.822849781f,
+   -0.565731811f, -0.824589303f,
+   -0.563199344f, -0.826321063f,
+   -0.560661576f, -0.828045045f,
+   -0.558118531f, -0.829761234f,
+   -0.555570233f, -0.831469612f,
+   -0.553016706f, -0.833170165f,
+   -0.550457973f, -0.834862875f,
+   -0.547894059f, -0.836547727f,
+   -0.545324988f, -0.838224706f,
+   -0.542750785f, -0.839893794f,
+   -0.540171473f, -0.841554977f,
+   -0.537587076f, -0.843208240f,
+   -0.534997620f, -0.844853565f,
+   -0.532403128f, -0.846490939f,
+   -0.529803625f, -0.848120345f,
+   -0.527199135f, -0.849741768f,
+   -0.524589683f, -0.851355193f,
+   -0.521975293f, -0.852960605f,
+   -0.519355990f, -0.854557988f,
+   -0.516731799f, -0.856147328f,
+   -0.514102744f, -0.857728610f,
+   -0.511468850f, -0.859301818f,
+   -0.508830143f, -0.860866939f,
+   -0.506186645f, -0.862423956f,
+   -0.503538384f, -0.863972856f,
+   -0.500885383f, -0.865513624f,
+   -0.498227667f, -0.867046246f,
+   -0.495565262f, -0.868570706f,
+   -0.492898192f, -0.870086991f,
+   -0.490226483f, -0.871595087f,
+   -0.487550160f, -0.873094978f,
+   -0.484869248f, -0.874586652f,
+   -0.482183772f, -0.876070094f,
+   -0.479493758f, -0.877545290f,
+   -0.476799230f, -0.879012226f,
+   -0.474100215f, -0.880470889f,
+   -0.471396737f, -0.881921264f,
+   -0.468688822f, -0.883363339f,
+   -0.465976496f, -0.884797098f,
+   -0.463259784f, -0.886222530f,
+   -0.460538711f, -0.887639620f,
+   -0.457813304f, -0.889048356f,
+   -0.455083587f, -0.890448723f,
+   -0.452349587f, -0.891840709f,
+   -0.449611330f, -0.893224301f,
+   -0.446868840f, -0.894599486f,
+   -0.444122145f, -0.895966250f,
+   -0.441371269f, -0.897324581f,
+   -0.438616239f, -0.898674466f,
+   -0.435857080f, -0.900015892f,
+   -0.433093819f, -0.901348847f,
+   -0.430326481f, -0.902673318f,
+   -0.427555093f, -0.903989293f,
+   -0.424779681f, -0.905296759f,
+   -0.422000271f, -0.906595705f,
+   -0.419216888f, -0.907886116f,
+   -0.416429560f, -0.909167983f,
+   -0.413638312f, -0.910441292f,
+   -0.410843171f, -0.911706032f,
+   -0.408044163f, -0.912962190f,
+   -0.405241314f, -0.914209756f,
+   -0.402434651f, -0.915448716f,
+   -0.399624200f, -0.916679060f,
+   -0.396809987f, -0.917900776f,
+   -0.393992040f, -0.919113852f,
+   -0.391170384f, -0.920318277f,
+   -0.388345047f, -0.921514039f,
+   -0.385516054f, -0.922701128f,
+   -0.382683432f, -0.923879533f,
+   -0.379847209f, -0.925049241f,
+   -0.377007410f, -0.926210242f,
+   -0.374164063f, -0.927362526f,
+   -0.371317194f, -0.928506080f,
+   -0.368466830f, -0.929640896f,
+   -0.365612998f, -0.930766961f,
+   -0.362755724f, -0.931884266f,
+   -0.359895037f, -0.932992799f,
+   -0.357030961f, -0.934092550f,
+   -0.354163525f, -0.935183510f,
+   -0.351292756f, -0.936265667f,
+   -0.348418680f, -0.937339012f,
+   -0.345541325f, -0.938403534f,
+   -0.342660717f, -0.939459224f,
+   -0.339776884f, -0.940506071f,
+   -0.336889853f, -0.941544065f,
+   -0.333999651f, -0.942573198f,
+   -0.331106306f, -0.943593458f,
+   -0.328209844f, -0.944604837f,
+   -0.325310292f, -0.945607325f,
+   -0.322407679f, -0.946600913f,
+   -0.319502031f, -0.947585591f,
+   -0.316593376f, -0.948561350f,
+   -0.313681740f, -0.949528181f,
+   -0.310767153f, -0.950486074f,
+   -0.307849640f, -0.951435021f,
+   -0.304929230f, -0.952375013f,
+   -0.302005949f, -0.953306040f,
+   -0.299079826f, -0.954228095f,
+   -0.296150888f, -0.955141168f,
+   -0.293219163f, -0.956045251f,
+   -0.290284677f, -0.956940336f,
+   -0.287347460f, -0.957826413f,
+   -0.284407537f, -0.958703475f,
+   -0.281464938f, -0.959571513f,
+   -0.278519689f, -0.960430519f,
+   -0.275571819f, -0.961280486f,
+   -0.272621355f, -0.962121404f,
+   -0.269668326f, -0.962953267f,
+   -0.266712757f, -0.963776066f,
+   -0.263754679f, -0.964589793f,
+   -0.260794118f, -0.965394442f,
+   -0.257831102f, -0.966190003f,
+   -0.254865660f, -0.966976471f,
+   -0.251897818f, -0.967753837f,
+   -0.248927606f, -0.968522094f,
+   -0.245955050f, -0.969281235f,
+   -0.242980180f, -0.970031253f,
+   -0.240003022f, -0.970772141f,
+   -0.237023606f, -0.971503891f,
+   -0.234041959f, -0.972226497f,
+   -0.231058108f, -0.972939952f,
+   -0.228072083f, -0.973644250f,
+   -0.225083911f, -0.974339383f,
+   -0.222093621f, -0.975025345f,
+   -0.219101240f, -0.975702130f,
+   -0.216106797f, -0.976369731f,
+   -0.213110320f, -0.977028143f,
+   -0.210111837f, -0.977677358f,
+   -0.207111376f, -0.978317371f,
+   -0.204108966f, -0.978948175f,
+   -0.201104635f, -0.979569766f,
+   -0.198098411f, -0.980182136f,
+   -0.195090322f, -0.980785280f,
+   -0.192080397f, -0.981379193f,
+   -0.189068664f, -0.981963869f,
+   -0.186055152f, -0.982539302f,
+   -0.183039888f, -0.983105487f,
+   -0.180022901f, -0.983662419f,
+   -0.177004220f, -0.984210092f,
+   -0.173983873f, -0.984748502f,
+   -0.170961889f, -0.985277642f,
+   -0.167938295f, -0.985797509f,
+   -0.164913120f, -0.986308097f,
+   -0.161886394f, -0.986809402f,
+   -0.158858143f, -0.987301418f,
+   -0.155828398f, -0.987784142f,
+   -0.152797185f, -0.988257568f,
+   -0.149764535f, -0.988721692f,
+   -0.146730474f, -0.989176510f,
+   -0.143695033f, -0.989622017f,
+   -0.140658239f, -0.990058210f,
+   -0.137620122f, -0.990485084f,
+   -0.134580709f, -0.990902635f,
+   -0.131540029f, -0.991310860f,
+   -0.128498111f, -0.991709754f,
+   -0.125454983f, -0.992099313f,
+   -0.122410675f, -0.992479535f,
+   -0.119365215f, -0.992850414f,
+   -0.116318631f, -0.993211949f,
+   -0.113270952f, -0.993564136f,
+   -0.110222207f, -0.993906970f,
+   -0.107172425f, -0.994240449f,
+   -0.104121634f, -0.994564571f,
+   -0.101069863f, -0.994879331f,
+   -0.098017140f, -0.995184727f,
+   -0.094963495f, -0.995480755f,
+   -0.091908956f, -0.995767414f,
+   -0.088853553f, -0.996044701f,
+   -0.085797312f, -0.996312612f,
+   -0.082740265f, -0.996571146f,
+   -0.079682438f, -0.996820299f,
+   -0.076623861f, -0.997060070f,
+   -0.073564564f, -0.997290457f,
+   -0.070504573f, -0.997511456f,
+   -0.067443920f, -0.997723067f,
+   -0.064382631f, -0.997925286f,
+   -0.061320736f, -0.998118113f,
+   -0.058258265f, -0.998301545f,
+   -0.055195244f, -0.998475581f,
+   -0.052131705f, -0.998640218f,
+   -0.049067674f, -0.998795456f,
+   -0.046003182f, -0.998941293f,
+   -0.042938257f, -0.999077728f,
+   -0.039872928f, -0.999204759f,
+   -0.036807223f, -0.999322385f,
+   -0.033741172f, -0.999430605f,
+   -0.030674803f, -0.999529418f,
+   -0.027608146f, -0.999618822f,
+   -0.024541229f, -0.999698819f,
+   -0.021474080f, -0.999769405f,
+   -0.018406730f, -0.999830582f,
+   -0.015339206f, -0.999882347f,
+   -0.012271538f, -0.999924702f,
+   -0.009203755f, -0.999957645f,
+   -0.006135885f, -0.999981175f,
+   -0.003067957f, -0.999995294f,
+   -0.000000000f, -1.000000000f,
+    0.003067957f, -0.999995294f,
+    0.006135885f, -0.999981175f,
+    0.009203755f, -0.999957645f,
+    0.012271538f, -0.999924702f,
+    0.015339206f, -0.999882347f,
+    0.018406730f, -0.999830582f,
+    0.021474080f, -0.999769405f,
+    0.024541229f, -0.999698819f,
+    0.027608146f, -0.999618822f,
+    0.030674803f, -0.999529418f,
+    0.033741172f, -0.999430605f,
+    0.036807223f, -0.999322385f,
+    0.039872928f, -0.999204759f,
+    0.042938257f, -0.999077728f,
+    0.046003182f, -0.998941293f,
+    0.049067674f, -0.998795456f,
+    0.052131705f, -0.998640218f,
+    0.055195244f, -0.998475581f,
+    0.058258265f, -0.998301545f,
+    0.061320736f, -0.998118113f,
+    0.064382631f, -0.997925286f,
+    0.067443920f, -0.997723067f,
+    0.070504573f, -0.997511456f,
+    0.073564564f, -0.997290457f,
+    0.076623861f, -0.997060070f,
+    0.079682438f, -0.996820299f,
+    0.082740265f, -0.996571146f,
+    0.085797312f, -0.996312612f,
+    0.088853553f, -0.996044701f,
+    0.091908956f, -0.995767414f,
+    0.094963495f, -0.995480755f,
+    0.098017140f, -0.995184727f,
+    0.101069863f, -0.994879331f,
+    0.104121634f, -0.994564571f,
+    0.107172425f, -0.994240449f,
+    0.110222207f, -0.993906970f,
+    0.113270952f, -0.993564136f,
+    0.116318631f, -0.993211949f,
+    0.119365215f, -0.992850414f,
+    0.122410675f, -0.992479535f,
+    0.125454983f, -0.992099313f,
+    0.128498111f, -0.991709754f,
+    0.131540029f, -0.991310860f,
+    0.134580709f, -0.990902635f,
+    0.137620122f, -0.990485084f,
+    0.140658239f, -0.990058210f,
+    0.143695033f, -0.989622017f,
+    0.146730474f, -0.989176510f,
+    0.149764535f, -0.988721692f,
+    0.152797185f, -0.988257568f,
+    0.155828398f, -0.987784142f,
+    0.158858143f, -0.987301418f,
+    0.161886394f, -0.986809402f,
+    0.164913120f, -0.986308097f,
+    0.167938295f, -0.985797509f,
+    0.170961889f, -0.985277642f,
+    0.173983873f, -0.984748502f,
+    0.177004220f, -0.984210092f,
+    0.180022901f, -0.983662419f,
+    0.183039888f, -0.983105487f,
+    0.186055152f, -0.982539302f,
+    0.189068664f, -0.981963869f,
+    0.192080397f, -0.981379193f,
+    0.195090322f, -0.980785280f,
+    0.198098411f, -0.980182136f,
+    0.201104635f, -0.979569766f,
+    0.204108966f, -0.978948175f,
+    0.207111376f, -0.978317371f,
+    0.210111837f, -0.977677358f,
+    0.213110320f, -0.977028143f,
+    0.216106797f, -0.976369731f,
+    0.219101240f, -0.975702130f,
+    0.222093621f, -0.975025345f,
+    0.225083911f, -0.974339383f,
+    0.228072083f, -0.973644250f,
+    0.231058108f, -0.972939952f,
+    0.234041959f, -0.972226497f,
+    0.237023606f, -0.971503891f,
+    0.240003022f, -0.970772141f,
+    0.242980180f, -0.970031253f,
+    0.245955050f, -0.969281235f,
+    0.248927606f, -0.968522094f,
+    0.251897818f, -0.967753837f,
+    0.254865660f, -0.966976471f,
+    0.257831102f, -0.966190003f,
+    0.260794118f, -0.965394442f,
+    0.263754679f, -0.964589793f,
+    0.266712757f, -0.963776066f,
+    0.269668326f, -0.962953267f,
+    0.272621355f, -0.962121404f,
+    0.275571819f, -0.961280486f,
+    0.278519689f, -0.960430519f,
+    0.281464938f, -0.959571513f,
+    0.284407537f, -0.958703475f,
+    0.287347460f, -0.957826413f,
+    0.290284677f, -0.956940336f,
+    0.293219163f, -0.956045251f,
+    0.296150888f, -0.955141168f,
+    0.299079826f, -0.954228095f,
+    0.302005949f, -0.953306040f,
+    0.304929230f, -0.952375013f,
+    0.307849640f, -0.951435021f,
+    0.310767153f, -0.950486074f,
+    0.313681740f, -0.949528181f,
+    0.316593376f, -0.948561350f,
+    0.319502031f, -0.947585591f,
+    0.322407679f, -0.946600913f,
+    0.325310292f, -0.945607325f,
+    0.328209844f, -0.944604837f,
+    0.331106306f, -0.943593458f,
+    0.333999651f, -0.942573198f,
+    0.336889853f, -0.941544065f,
+    0.339776884f, -0.940506071f,
+    0.342660717f, -0.939459224f,
+    0.345541325f, -0.938403534f,
+    0.348418680f, -0.937339012f,
+    0.351292756f, -0.936265667f,
+    0.354163525f, -0.935183510f,
+    0.357030961f, -0.934092550f,
+    0.359895037f, -0.932992799f,
+    0.362755724f, -0.931884266f,
+    0.365612998f, -0.930766961f,
+    0.368466830f, -0.929640896f,
+    0.371317194f, -0.928506080f,
+    0.374164063f, -0.927362526f,
+    0.377007410f, -0.926210242f,
+    0.379847209f, -0.925049241f,
+    0.382683432f, -0.923879533f,
+    0.385516054f, -0.922701128f,
+    0.388345047f, -0.921514039f,
+    0.391170384f, -0.920318277f,
+    0.393992040f, -0.919113852f,
+    0.396809987f, -0.917900776f,
+    0.399624200f, -0.916679060f,
+    0.402434651f, -0.915448716f,
+    0.405241314f, -0.914209756f,
+    0.408044163f, -0.912962190f,
+    0.410843171f, -0.911706032f,
+    0.413638312f, -0.910441292f,
+    0.416429560f, -0.909167983f,
+    0.419216888f, -0.907886116f,
+    0.422000271f, -0.906595705f,
+    0.424779681f, -0.905296759f,
+    0.427555093f, -0.903989293f,
+    0.430326481f, -0.902673318f,
+    0.433093819f, -0.901348847f,
+    0.435857080f, -0.900015892f,
+    0.438616239f, -0.898674466f,
+    0.441371269f, -0.897324581f,
+    0.444122145f, -0.895966250f,
+    0.446868840f, -0.894599486f,
+    0.449611330f, -0.893224301f,
+    0.452349587f, -0.891840709f,
+    0.455083587f, -0.890448723f,
+    0.457813304f, -0.889048356f,
+    0.460538711f, -0.887639620f,
+    0.463259784f, -0.886222530f,
+    0.465976496f, -0.884797098f,
+    0.468688822f, -0.883363339f,
+    0.471396737f, -0.881921264f,
+    0.474100215f, -0.880470889f,
+    0.476799230f, -0.879012226f,
+    0.479493758f, -0.877545290f,
+    0.482183772f, -0.876070094f,
+    0.484869248f, -0.874586652f,
+    0.487550160f, -0.873094978f,
+    0.490226483f, -0.871595087f,
+    0.492898192f, -0.870086991f,
+    0.495565262f, -0.868570706f,
+    0.498227667f, -0.867046246f,
+    0.500885383f, -0.865513624f,
+    0.503538384f, -0.863972856f,
+    0.506186645f, -0.862423956f,
+    0.508830143f, -0.860866939f,
+    0.511468850f, -0.859301818f,
+    0.514102744f, -0.857728610f,
+    0.516731799f, -0.856147328f,
+    0.519355990f, -0.854557988f,
+    0.521975293f, -0.852960605f,
+    0.524589683f, -0.851355193f,
+    0.527199135f, -0.849741768f,
+    0.529803625f, -0.848120345f,
+    0.532403128f, -0.846490939f,
+    0.534997620f, -0.844853565f,
+    0.537587076f, -0.843208240f,
+    0.540171473f, -0.841554977f,
+    0.542750785f, -0.839893794f,
+    0.545324988f, -0.838224706f,
+    0.547894059f, -0.836547727f,
+    0.550457973f, -0.834862875f,
+    0.553016706f, -0.833170165f,
+    0.555570233f, -0.831469612f,
+    0.558118531f, -0.829761234f,
+    0.560661576f, -0.828045045f,
+    0.563199344f, -0.826321063f,
+    0.565731811f, -0.824589303f,
+    0.568258953f, -0.822849781f,
+    0.570780746f, -0.821102515f,
+    0.573297167f, -0.819347520f,
+    0.575808191f, -0.817584813f,
+    0.578313796f, -0.815814411f,
+    0.580813958f, -0.814036330f,
+    0.583308653f, -0.812250587f,
+    0.585797857f, -0.810457198f,
+    0.588281548f, -0.808656182f,
+    0.590759702f, -0.806847554f,
+    0.593232295f, -0.805031331f,
+    0.595699304f, -0.803207531f,
+    0.598160707f, -0.801376172f,
+    0.600616479f, -0.799537269f,
+    0.603066599f, -0.797690841f,
+    0.605511041f, -0.795836905f,
+    0.607949785f, -0.793975478f,
+    0.610382806f, -0.792106577f,
+    0.612810082f, -0.790230221f,
+    0.615231591f, -0.788346428f,
+    0.617647308f, -0.786455214f,
+    0.620057212f, -0.784556597f,
+    0.622461279f, -0.782650596f,
+    0.624859488f, -0.780737229f,
+    0.627251815f, -0.778816512f,
+    0.629638239f, -0.776888466f,
+    0.632018736f, -0.774953107f,
+    0.634393284f, -0.773010453f,
+    0.636761861f, -0.771060524f,
+    0.639124445f, -0.769103338f,
+    0.641481013f, -0.767138912f,
+    0.643831543f, -0.765167266f,
+    0.646176013f, -0.763188417f,
+    0.648514401f, -0.761202385f,
+    0.650846685f, -0.759209189f,
+    0.653172843f, -0.757208847f,
+    0.655492853f, -0.755201377f,
+    0.657806693f, -0.753186799f,
+    0.660114342f, -0.751165132f,
+    0.662415778f, -0.749136395f,
+    0.664710978f, -0.747100606f,
+    0.666999922f, -0.745057785f,
+    0.669282588f, -0.743007952f,
+    0.671558955f, -0.740951125f,
+    0.673829000f, -0.738887324f,
+    0.676092704f, -0.736816569f,
+    0.678350043f, -0.734738878f,
+    0.680600998f, -0.732654272f,
+    0.682845546f, -0.730562769f,
+    0.685083668f, -0.728464390f,
+    0.687315341f, -0.726359155f,
+    0.689540545f, -0.724247083f,
+    0.691759258f, -0.722128194f,
+    0.693971461f, -0.720002508f,
+    0.696177131f, -0.717870045f,
+    0.698376249f, -0.715730825f,
+    0.700568794f, -0.713584869f,
+    0.702754744f, -0.711432196f,
+    0.704934080f, -0.709272826f,
+    0.707106781f, -0.707106781f,
+    0.709272826f, -0.704934080f,
+    0.711432196f, -0.702754744f,
+    0.713584869f, -0.700568794f,
+    0.715730825f, -0.698376249f,
+    0.717870045f, -0.696177131f,
+    0.720002508f, -0.693971461f,
+    0.722128194f, -0.691759258f,
+    0.724247083f, -0.689540545f,
+    0.726359155f, -0.687315341f,
+    0.728464390f, -0.685083668f,
+    0.730562769f, -0.682845546f,
+    0.732654272f, -0.680600998f,
+    0.734738878f, -0.678350043f,
+    0.736816569f, -0.676092704f,
+    0.738887324f, -0.673829000f,
+    0.740951125f, -0.671558955f,
+    0.743007952f, -0.669282588f,
+    0.745057785f, -0.666999922f,
+    0.747100606f, -0.664710978f,
+    0.749136395f, -0.662415778f,
+    0.751165132f, -0.660114342f,
+    0.753186799f, -0.657806693f,
+    0.755201377f, -0.655492853f,
+    0.757208847f, -0.653172843f,
+    0.759209189f, -0.650846685f,
+    0.761202385f, -0.648514401f,
+    0.763188417f, -0.646176013f,
+    0.765167266f, -0.643831543f,
+    0.767138912f, -0.641481013f,
+    0.769103338f, -0.639124445f,
+    0.771060524f, -0.636761861f,
+    0.773010453f, -0.634393284f,
+    0.774953107f, -0.632018736f,
+    0.776888466f, -0.629638239f,
+    0.778816512f, -0.627251815f,
+    0.780737229f, -0.624859488f,
+    0.782650596f, -0.622461279f,
+    0.784556597f, -0.620057212f,
+    0.786455214f, -0.617647308f,
+    0.788346428f, -0.615231591f,
+    0.790230221f, -0.612810082f,
+    0.792106577f, -0.610382806f,
+    0.793975478f, -0.607949785f,
+    0.795836905f, -0.605511041f,
+    0.797690841f, -0.603066599f,
+    0.799537269f, -0.600616479f,
+    0.801376172f, -0.598160707f,
+    0.803207531f, -0.595699304f,
+    0.805031331f, -0.593232295f,
+    0.806847554f, -0.590759702f,
+    0.808656182f, -0.588281548f,
+    0.810457198f, -0.585797857f,
+    0.812250587f, -0.583308653f,
+    0.814036330f, -0.580813958f,
+    0.815814411f, -0.578313796f,
+    0.817584813f, -0.575808191f,
+    0.819347520f, -0.573297167f,
+    0.821102515f, -0.570780746f,
+    0.822849781f, -0.568258953f,
+    0.824589303f, -0.565731811f,
+    0.826321063f, -0.563199344f,
+    0.828045045f, -0.560661576f,
+    0.829761234f, -0.558118531f,
+    0.831469612f, -0.555570233f,
+    0.833170165f, -0.553016706f,
+    0.834862875f, -0.550457973f,
+    0.836547727f, -0.547894059f,
+    0.838224706f, -0.545324988f,
+    0.839893794f, -0.542750785f,
+    0.841554977f, -0.540171473f,
+    0.843208240f, -0.537587076f,
+    0.844853565f, -0.534997620f,
+    0.846490939f, -0.532403128f,
+    0.848120345f, -0.529803625f,
+    0.849741768f, -0.527199135f,
+    0.851355193f, -0.524589683f,
+    0.852960605f, -0.521975293f,
+    0.854557988f, -0.519355990f,
+    0.856147328f, -0.516731799f,
+    0.857728610f, -0.514102744f,
+    0.859301818f, -0.511468850f,
+    0.860866939f, -0.508830143f,
+    0.862423956f, -0.506186645f,
+    0.863972856f, -0.503538384f,
+    0.865513624f, -0.500885383f,
+    0.867046246f, -0.498227667f,
+    0.868570706f, -0.495565262f,
+    0.870086991f, -0.492898192f,
+    0.871595087f, -0.490226483f,
+    0.873094978f, -0.487550160f,
+    0.874586652f, -0.484869248f,
+    0.876070094f, -0.482183772f,
+    0.877545290f, -0.479493758f,
+    0.879012226f, -0.476799230f,
+    0.880470889f, -0.474100215f,
+    0.881921264f, -0.471396737f,
+    0.883363339f, -0.468688822f,
+    0.884797098f, -0.465976496f,
+    0.886222530f, -0.463259784f,
+    0.887639620f, -0.460538711f,
+    0.889048356f, -0.457813304f,
+    0.890448723f, -0.455083587f,
+    0.891840709f, -0.452349587f,
+    0.893224301f, -0.449611330f,
+    0.894599486f, -0.446868840f,
+    0.895966250f, -0.444122145f,
+    0.897324581f, -0.441371269f,
+    0.898674466f, -0.438616239f,
+    0.900015892f, -0.435857080f,
+    0.901348847f, -0.433093819f,
+    0.902673318f, -0.430326481f,
+    0.903989293f, -0.427555093f,
+    0.905296759f, -0.424779681f,
+    0.906595705f, -0.422000271f,
+    0.907886116f, -0.419216888f,
+    0.909167983f, -0.416429560f,
+    0.910441292f, -0.413638312f,
+    0.911706032f, -0.410843171f,
+    0.912962190f, -0.408044163f,
+    0.914209756f, -0.405241314f,
+    0.915448716f, -0.402434651f,
+    0.916679060f, -0.399624200f,
+    0.917900776f, -0.396809987f,
+    0.919113852f, -0.393992040f,
+    0.920318277f, -0.391170384f,
+    0.921514039f, -0.388345047f,
+    0.922701128f, -0.385516054f,
+    0.923879533f, -0.382683432f,
+    0.925049241f, -0.379847209f,
+    0.926210242f, -0.377007410f,
+    0.927362526f, -0.374164063f,
+    0.928506080f, -0.371317194f,
+    0.929640896f, -0.368466830f,
+    0.930766961f, -0.365612998f,
+    0.931884266f, -0.362755724f,
+    0.932992799f, -0.359895037f,
+    0.934092550f, -0.357030961f,
+    0.935183510f, -0.354163525f,
+    0.936265667f, -0.351292756f,
+    0.937339012f, -0.348418680f,
+    0.938403534f, -0.345541325f,
+    0.939459224f, -0.342660717f,
+    0.940506071f, -0.339776884f,
+    0.941544065f, -0.336889853f,
+    0.942573198f, -0.333999651f,
+    0.943593458f, -0.331106306f,
+    0.944604837f, -0.328209844f,
+    0.945607325f, -0.325310292f,
+    0.946600913f, -0.322407679f,
+    0.947585591f, -0.319502031f,
+    0.948561350f, -0.316593376f,
+    0.949528181f, -0.313681740f,
+    0.950486074f, -0.310767153f,
+    0.951435021f, -0.307849640f,
+    0.952375013f, -0.304929230f,
+    0.953306040f, -0.302005949f,
+    0.954228095f, -0.299079826f,
+    0.955141168f, -0.296150888f,
+    0.956045251f, -0.293219163f,
+    0.956940336f, -0.290284677f,
+    0.957826413f, -0.287347460f,
+    0.958703475f, -0.284407537f,
+    0.959571513f, -0.281464938f,
+    0.960430519f, -0.278519689f,
+    0.961280486f, -0.275571819f,
+    0.962121404f, -0.272621355f,
+    0.962953267f, -0.269668326f,
+    0.963776066f, -0.266712757f,
+    0.964589793f, -0.263754679f,
+    0.965394442f, -0.260794118f,
+    0.966190003f, -0.257831102f,
+    0.966976471f, -0.254865660f,
+    0.967753837f, -0.251897818f,
+    0.968522094f, -0.248927606f,
+    0.969281235f, -0.245955050f,
+    0.970031253f, -0.242980180f,
+    0.970772141f, -0.240003022f,
+    0.971503891f, -0.237023606f,
+    0.972226497f, -0.234041959f,
+    0.972939952f, -0.231058108f,
+    0.973644250f, -0.228072083f,
+    0.974339383f, -0.225083911f,
+    0.975025345f, -0.222093621f,
+    0.975702130f, -0.219101240f,
+    0.976369731f, -0.216106797f,
+    0.977028143f, -0.213110320f,
+    0.977677358f, -0.210111837f,
+    0.978317371f, -0.207111376f,
+    0.978948175f, -0.204108966f,
+    0.979569766f, -0.201104635f,
+    0.980182136f, -0.198098411f,
+    0.980785280f, -0.195090322f,
+    0.981379193f, -0.192080397f,
+    0.981963869f, -0.189068664f,
+    0.982539302f, -0.186055152f,
+    0.983105487f, -0.183039888f,
+    0.983662419f, -0.180022901f,
+    0.984210092f, -0.177004220f,
+    0.984748502f, -0.173983873f,
+    0.985277642f, -0.170961889f,
+    0.985797509f, -0.167938295f,
+    0.986308097f, -0.164913120f,
+    0.986809402f, -0.161886394f,
+    0.987301418f, -0.158858143f,
+    0.987784142f, -0.155828398f,
+    0.988257568f, -0.152797185f,
+    0.988721692f, -0.149764535f,
+    0.989176510f, -0.146730474f,
+    0.989622017f, -0.143695033f,
+    0.990058210f, -0.140658239f,
+    0.990485084f, -0.137620122f,
+    0.990902635f, -0.134580709f,
+    0.991310860f, -0.131540029f,
+    0.991709754f, -0.128498111f,
+    0.992099313f, -0.125454983f,
+    0.992479535f, -0.122410675f,
+    0.992850414f, -0.119365215f,
+    0.993211949f, -0.116318631f,
+    0.993564136f, -0.113270952f,
+    0.993906970f, -0.110222207f,
+    0.994240449f, -0.107172425f,
+    0.994564571f, -0.104121634f,
+    0.994879331f, -0.101069863f,
+    0.995184727f, -0.098017140f,
+    0.995480755f, -0.094963495f,
+    0.995767414f, -0.091908956f,
+    0.996044701f, -0.088853553f,
+    0.996312612f, -0.085797312f,
+    0.996571146f, -0.082740265f,
+    0.996820299f, -0.079682438f,
+    0.997060070f, -0.076623861f,
+    0.997290457f, -0.073564564f,
+    0.997511456f, -0.070504573f,
+    0.997723067f, -0.067443920f,
+    0.997925286f, -0.064382631f,
+    0.998118113f, -0.061320736f,
+    0.998301545f, -0.058258265f,
+    0.998475581f, -0.055195244f,
+    0.998640218f, -0.052131705f,
+    0.998795456f, -0.049067674f,
+    0.998941293f, -0.046003182f,
+    0.999077728f, -0.042938257f,
+    0.999204759f, -0.039872928f,
+    0.999322385f, -0.036807223f,
+    0.999430605f, -0.033741172f,
+    0.999529418f, -0.030674803f,
+    0.999618822f, -0.027608146f,
+    0.999698819f, -0.024541229f,
+    0.999769405f, -0.021474080f,
+    0.999830582f, -0.018406730f,
+    0.999882347f, -0.015339206f,
+    0.999924702f, -0.012271538f,
+    0.999957645f, -0.009203755f,
+    0.999981175f, -0.006135885f,
+    0.999995294f, -0.003067957f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+/**
+  @par
+  Example code for Floating-point Twiddle factors Generation:
+  @par
+  <pre>for (i = 0; i< N/; i++)
+  {
+ 	twiddleCoef[2*i]   = cos(i * 2*PI/(float)N);
+ 	twiddleCoef[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are in interleaved fashion
+*/
+const float32_t twiddleCoef_4096[8192] = {
+    1.000000000f,  0.000000000f,
+    0.999998823f,  0.001533980f,
+    0.999995294f,  0.003067957f,
+    0.999989411f,  0.004601926f,
+    0.999981175f,  0.006135885f,
+    0.999970586f,  0.007669829f,
+    0.999957645f,  0.009203755f,
+    0.999942350f,  0.010737659f,
+    0.999924702f,  0.012271538f,
+    0.999904701f,  0.013805389f,
+    0.999882347f,  0.015339206f,
+    0.999857641f,  0.016872988f,
+    0.999830582f,  0.018406730f,
+    0.999801170f,  0.019940429f,
+    0.999769405f,  0.021474080f,
+    0.999735288f,  0.023007681f,
+    0.999698819f,  0.024541229f,
+    0.999659997f,  0.026074718f,
+    0.999618822f,  0.027608146f,
+    0.999575296f,  0.029141509f,
+    0.999529418f,  0.030674803f,
+    0.999481187f,  0.032208025f,
+    0.999430605f,  0.033741172f,
+    0.999377670f,  0.035274239f,
+    0.999322385f,  0.036807223f,
+    0.999264747f,  0.038340120f,
+    0.999204759f,  0.039872928f,
+    0.999142419f,  0.041405641f,
+    0.999077728f,  0.042938257f,
+    0.999010686f,  0.044470772f,
+    0.998941293f,  0.046003182f,
+    0.998869550f,  0.047535484f,
+    0.998795456f,  0.049067674f,
+    0.998719012f,  0.050599749f,
+    0.998640218f,  0.052131705f,
+    0.998559074f,  0.053663538f,
+    0.998475581f,  0.055195244f,
+    0.998389737f,  0.056726821f,
+    0.998301545f,  0.058258265f,
+    0.998211003f,  0.059789571f,
+    0.998118113f,  0.061320736f,
+    0.998022874f,  0.062851758f,
+    0.997925286f,  0.064382631f,
+    0.997825350f,  0.065913353f,
+    0.997723067f,  0.067443920f,
+    0.997618435f,  0.068974328f,
+    0.997511456f,  0.070504573f,
+    0.997402130f,  0.072034653f,
+    0.997290457f,  0.073564564f,
+    0.997176437f,  0.075094301f,
+    0.997060070f,  0.076623861f,
+    0.996941358f,  0.078153242f,
+    0.996820299f,  0.079682438f,
+    0.996696895f,  0.081211447f,
+    0.996571146f,  0.082740265f,
+    0.996443051f,  0.084268888f,
+    0.996312612f,  0.085797312f,
+    0.996179829f,  0.087325535f,
+    0.996044701f,  0.088853553f,
+    0.995907229f,  0.090381361f,
+    0.995767414f,  0.091908956f,
+    0.995625256f,  0.093436336f,
+    0.995480755f,  0.094963495f,
+    0.995333912f,  0.096490431f,
+    0.995184727f,  0.098017140f,
+    0.995033199f,  0.099543619f,
+    0.994879331f,  0.101069863f,
+    0.994723121f,  0.102595869f,
+    0.994564571f,  0.104121634f,
+    0.994403680f,  0.105647154f,
+    0.994240449f,  0.107172425f,
+    0.994074879f,  0.108697444f,
+    0.993906970f,  0.110222207f,
+    0.993736722f,  0.111746711f,
+    0.993564136f,  0.113270952f,
+    0.993389211f,  0.114794927f,
+    0.993211949f,  0.116318631f,
+    0.993032350f,  0.117842062f,
+    0.992850414f,  0.119365215f,
+    0.992666142f,  0.120888087f,
+    0.992479535f,  0.122410675f,
+    0.992290591f,  0.123932975f,
+    0.992099313f,  0.125454983f,
+    0.991905700f,  0.126976696f,
+    0.991709754f,  0.128498111f,
+    0.991511473f,  0.130019223f,
+    0.991310860f,  0.131540029f,
+    0.991107914f,  0.133060525f,
+    0.990902635f,  0.134580709f,
+    0.990695025f,  0.136100575f,
+    0.990485084f,  0.137620122f,
+    0.990272812f,  0.139139344f,
+    0.990058210f,  0.140658239f,
+    0.989841278f,  0.142176804f,
+    0.989622017f,  0.143695033f,
+    0.989400428f,  0.145212925f,
+    0.989176510f,  0.146730474f,
+    0.988950265f,  0.148247679f,
+    0.988721692f,  0.149764535f,
+    0.988490793f,  0.151281038f,
+    0.988257568f,  0.152797185f,
+    0.988022017f,  0.154312973f,
+    0.987784142f,  0.155828398f,
+    0.987543942f,  0.157343456f,
+    0.987301418f,  0.158858143f,
+    0.987056571f,  0.160372457f,
+    0.986809402f,  0.161886394f,
+    0.986559910f,  0.163399949f,
+    0.986308097f,  0.164913120f,
+    0.986053963f,  0.166425904f,
+    0.985797509f,  0.167938295f,
+    0.985538735f,  0.169450291f,
+    0.985277642f,  0.170961889f,
+    0.985014231f,  0.172473084f,
+    0.984748502f,  0.173983873f,
+    0.984480455f,  0.175494253f,
+    0.984210092f,  0.177004220f,
+    0.983937413f,  0.178513771f,
+    0.983662419f,  0.180022901f,
+    0.983385110f,  0.181531608f,
+    0.983105487f,  0.183039888f,
+    0.982823551f,  0.184547737f,
+    0.982539302f,  0.186055152f,
+    0.982252741f,  0.187562129f,
+    0.981963869f,  0.189068664f,
+    0.981672686f,  0.190574755f,
+    0.981379193f,  0.192080397f,
+    0.981083391f,  0.193585587f,
+    0.980785280f,  0.195090322f,
+    0.980484862f,  0.196594598f,
+    0.980182136f,  0.198098411f,
+    0.979877104f,  0.199601758f,
+    0.979569766f,  0.201104635f,
+    0.979260123f,  0.202607039f,
+    0.978948175f,  0.204108966f,
+    0.978633924f,  0.205610413f,
+    0.978317371f,  0.207111376f,
+    0.977998515f,  0.208611852f,
+    0.977677358f,  0.210111837f,
+    0.977353900f,  0.211611327f,
+    0.977028143f,  0.213110320f,
+    0.976700086f,  0.214608811f,
+    0.976369731f,  0.216106797f,
+    0.976037079f,  0.217604275f,
+    0.975702130f,  0.219101240f,
+    0.975364885f,  0.220597690f,
+    0.975025345f,  0.222093621f,
+    0.974683511f,  0.223589029f,
+    0.974339383f,  0.225083911f,
+    0.973992962f,  0.226578264f,
+    0.973644250f,  0.228072083f,
+    0.973293246f,  0.229565366f,
+    0.972939952f,  0.231058108f,
+    0.972584369f,  0.232550307f,
+    0.972226497f,  0.234041959f,
+    0.971866337f,  0.235533059f,
+    0.971503891f,  0.237023606f,
+    0.971139158f,  0.238513595f,
+    0.970772141f,  0.240003022f,
+    0.970402839f,  0.241491885f,
+    0.970031253f,  0.242980180f,
+    0.969657385f,  0.244467903f,
+    0.969281235f,  0.245955050f,
+    0.968902805f,  0.247441619f,
+    0.968522094f,  0.248927606f,
+    0.968139105f,  0.250413007f,
+    0.967753837f,  0.251897818f,
+    0.967366292f,  0.253382037f,
+    0.966976471f,  0.254865660f,
+    0.966584374f,  0.256348682f,
+    0.966190003f,  0.257831102f,
+    0.965793359f,  0.259312915f,
+    0.965394442f,  0.260794118f,
+    0.964993253f,  0.262274707f,
+    0.964589793f,  0.263754679f,
+    0.964184064f,  0.265234030f,
+    0.963776066f,  0.266712757f,
+    0.963365800f,  0.268190857f,
+    0.962953267f,  0.269668326f,
+    0.962538468f,  0.271145160f,
+    0.962121404f,  0.272621355f,
+    0.961702077f,  0.274096910f,
+    0.961280486f,  0.275571819f,
+    0.960856633f,  0.277046080f,
+    0.960430519f,  0.278519689f,
+    0.960002146f,  0.279992643f,
+    0.959571513f,  0.281464938f,
+    0.959138622f,  0.282936570f,
+    0.958703475f,  0.284407537f,
+    0.958266071f,  0.285877835f,
+    0.957826413f,  0.287347460f,
+    0.957384501f,  0.288816408f,
+    0.956940336f,  0.290284677f,
+    0.956493919f,  0.291752263f,
+    0.956045251f,  0.293219163f,
+    0.955594334f,  0.294685372f,
+    0.955141168f,  0.296150888f,
+    0.954685755f,  0.297615707f,
+    0.954228095f,  0.299079826f,
+    0.953768190f,  0.300543241f,
+    0.953306040f,  0.302005949f,
+    0.952841648f,  0.303467947f,
+    0.952375013f,  0.304929230f,
+    0.951906137f,  0.306389795f,
+    0.951435021f,  0.307849640f,
+    0.950961666f,  0.309308760f,
+    0.950486074f,  0.310767153f,
+    0.950008245f,  0.312224814f,
+    0.949528181f,  0.313681740f,
+    0.949045882f,  0.315137929f,
+    0.948561350f,  0.316593376f,
+    0.948074586f,  0.318048077f,
+    0.947585591f,  0.319502031f,
+    0.947094366f,  0.320955232f,
+    0.946600913f,  0.322407679f,
+    0.946105232f,  0.323859367f,
+    0.945607325f,  0.325310292f,
+    0.945107193f,  0.326760452f,
+    0.944604837f,  0.328209844f,
+    0.944100258f,  0.329658463f,
+    0.943593458f,  0.331106306f,
+    0.943084437f,  0.332553370f,
+    0.942573198f,  0.333999651f,
+    0.942059740f,  0.335445147f,
+    0.941544065f,  0.336889853f,
+    0.941026175f,  0.338333767f,
+    0.940506071f,  0.339776884f,
+    0.939983753f,  0.341219202f,
+    0.939459224f,  0.342660717f,
+    0.938932484f,  0.344101426f,
+    0.938403534f,  0.345541325f,
+    0.937872376f,  0.346980411f,
+    0.937339012f,  0.348418680f,
+    0.936803442f,  0.349856130f,
+    0.936265667f,  0.351292756f,
+    0.935725689f,  0.352728556f,
+    0.935183510f,  0.354163525f,
+    0.934639130f,  0.355597662f,
+    0.934092550f,  0.357030961f,
+    0.933543773f,  0.358463421f,
+    0.932992799f,  0.359895037f,
+    0.932439629f,  0.361325806f,
+    0.931884266f,  0.362755724f,
+    0.931326709f,  0.364184790f,
+    0.930766961f,  0.365612998f,
+    0.930205023f,  0.367040346f,
+    0.929640896f,  0.368466830f,
+    0.929074581f,  0.369892447f,
+    0.928506080f,  0.371317194f,
+    0.927935395f,  0.372741067f,
+    0.927362526f,  0.374164063f,
+    0.926787474f,  0.375586178f,
+    0.926210242f,  0.377007410f,
+    0.925630831f,  0.378427755f,
+    0.925049241f,  0.379847209f,
+    0.924465474f,  0.381265769f,
+    0.923879533f,  0.382683432f,
+    0.923291417f,  0.384100195f,
+    0.922701128f,  0.385516054f,
+    0.922108669f,  0.386931006f,
+    0.921514039f,  0.388345047f,
+    0.920917242f,  0.389758174f,
+    0.920318277f,  0.391170384f,
+    0.919717146f,  0.392581674f,
+    0.919113852f,  0.393992040f,
+    0.918508394f,  0.395401479f,
+    0.917900776f,  0.396809987f,
+    0.917290997f,  0.398217562f,
+    0.916679060f,  0.399624200f,
+    0.916064966f,  0.401029897f,
+    0.915448716f,  0.402434651f,
+    0.914830312f,  0.403838458f,
+    0.914209756f,  0.405241314f,
+    0.913587048f,  0.406643217f,
+    0.912962190f,  0.408044163f,
+    0.912335185f,  0.409444149f,
+    0.911706032f,  0.410843171f,
+    0.911074734f,  0.412241227f,
+    0.910441292f,  0.413638312f,
+    0.909805708f,  0.415034424f,
+    0.909167983f,  0.416429560f,
+    0.908528119f,  0.417823716f,
+    0.907886116f,  0.419216888f,
+    0.907241978f,  0.420609074f,
+    0.906595705f,  0.422000271f,
+    0.905947298f,  0.423390474f,
+    0.905296759f,  0.424779681f,
+    0.904644091f,  0.426167889f,
+    0.903989293f,  0.427555093f,
+    0.903332368f,  0.428941292f,
+    0.902673318f,  0.430326481f,
+    0.902012144f,  0.431710658f,
+    0.901348847f,  0.433093819f,
+    0.900683429f,  0.434475961f,
+    0.900015892f,  0.435857080f,
+    0.899346237f,  0.437237174f,
+    0.898674466f,  0.438616239f,
+    0.898000580f,  0.439994271f,
+    0.897324581f,  0.441371269f,
+    0.896646470f,  0.442747228f,
+    0.895966250f,  0.444122145f,
+    0.895283921f,  0.445496017f,
+    0.894599486f,  0.446868840f,
+    0.893912945f,  0.448240612f,
+    0.893224301f,  0.449611330f,
+    0.892533555f,  0.450980989f,
+    0.891840709f,  0.452349587f,
+    0.891145765f,  0.453717121f,
+    0.890448723f,  0.455083587f,
+    0.889749586f,  0.456448982f,
+    0.889048356f,  0.457813304f,
+    0.888345033f,  0.459176548f,
+    0.887639620f,  0.460538711f,
+    0.886932119f,  0.461899791f,
+    0.886222530f,  0.463259784f,
+    0.885510856f,  0.464618686f,
+    0.884797098f,  0.465976496f,
+    0.884081259f,  0.467333209f,
+    0.883363339f,  0.468688822f,
+    0.882643340f,  0.470043332f,
+    0.881921264f,  0.471396737f,
+    0.881197113f,  0.472749032f,
+    0.880470889f,  0.474100215f,
+    0.879742593f,  0.475450282f,
+    0.879012226f,  0.476799230f,
+    0.878279792f,  0.478147056f,
+    0.877545290f,  0.479493758f,
+    0.876808724f,  0.480839331f,
+    0.876070094f,  0.482183772f,
+    0.875329403f,  0.483527079f,
+    0.874586652f,  0.484869248f,
+    0.873841843f,  0.486210276f,
+    0.873094978f,  0.487550160f,
+    0.872346059f,  0.488888897f,
+    0.871595087f,  0.490226483f,
+    0.870842063f,  0.491562916f,
+    0.870086991f,  0.492898192f,
+    0.869329871f,  0.494232309f,
+    0.868570706f,  0.495565262f,
+    0.867809497f,  0.496897049f,
+    0.867046246f,  0.498227667f,
+    0.866280954f,  0.499557113f,
+    0.865513624f,  0.500885383f,
+    0.864744258f,  0.502212474f,
+    0.863972856f,  0.503538384f,
+    0.863199422f,  0.504863109f,
+    0.862423956f,  0.506186645f,
+    0.861646461f,  0.507508991f,
+    0.860866939f,  0.508830143f,
+    0.860085390f,  0.510150097f,
+    0.859301818f,  0.511468850f,
+    0.858516224f,  0.512786401f,
+    0.857728610f,  0.514102744f,
+    0.856938977f,  0.515417878f,
+    0.856147328f,  0.516731799f,
+    0.855353665f,  0.518044504f,
+    0.854557988f,  0.519355990f,
+    0.853760301f,  0.520666254f,
+    0.852960605f,  0.521975293f,
+    0.852158902f,  0.523283103f,
+    0.851355193f,  0.524589683f,
+    0.850549481f,  0.525895027f,
+    0.849741768f,  0.527199135f,
+    0.848932055f,  0.528502002f,
+    0.848120345f,  0.529803625f,
+    0.847306639f,  0.531104001f,
+    0.846490939f,  0.532403128f,
+    0.845673247f,  0.533701002f,
+    0.844853565f,  0.534997620f,
+    0.844031895f,  0.536292979f,
+    0.843208240f,  0.537587076f,
+    0.842382600f,  0.538879909f,
+    0.841554977f,  0.540171473f,
+    0.840725375f,  0.541461766f,
+    0.839893794f,  0.542750785f,
+    0.839060237f,  0.544038527f,
+    0.838224706f,  0.545324988f,
+    0.837387202f,  0.546610167f,
+    0.836547727f,  0.547894059f,
+    0.835706284f,  0.549176662f,
+    0.834862875f,  0.550457973f,
+    0.834017501f,  0.551737988f,
+    0.833170165f,  0.553016706f,
+    0.832320868f,  0.554294121f,
+    0.831469612f,  0.555570233f,
+    0.830616400f,  0.556845037f,
+    0.829761234f,  0.558118531f,
+    0.828904115f,  0.559390712f,
+    0.828045045f,  0.560661576f,
+    0.827184027f,  0.561931121f,
+    0.826321063f,  0.563199344f,
+    0.825456154f,  0.564466242f,
+    0.824589303f,  0.565731811f,
+    0.823720511f,  0.566996049f,
+    0.822849781f,  0.568258953f,
+    0.821977115f,  0.569520519f,
+    0.821102515f,  0.570780746f,
+    0.820225983f,  0.572039629f,
+    0.819347520f,  0.573297167f,
+    0.818467130f,  0.574553355f,
+    0.817584813f,  0.575808191f,
+    0.816700573f,  0.577061673f,
+    0.815814411f,  0.578313796f,
+    0.814926329f,  0.579564559f,
+    0.814036330f,  0.580813958f,
+    0.813144415f,  0.582061990f,
+    0.812250587f,  0.583308653f,
+    0.811354847f,  0.584553943f,
+    0.810457198f,  0.585797857f,
+    0.809557642f,  0.587040394f,
+    0.808656182f,  0.588281548f,
+    0.807752818f,  0.589521319f,
+    0.806847554f,  0.590759702f,
+    0.805940391f,  0.591996695f,
+    0.805031331f,  0.593232295f,
+    0.804120377f,  0.594466499f,
+    0.803207531f,  0.595699304f,
+    0.802292796f,  0.596930708f,
+    0.801376172f,  0.598160707f,
+    0.800457662f,  0.599389298f,
+    0.799537269f,  0.600616479f,
+    0.798614995f,  0.601842247f,
+    0.797690841f,  0.603066599f,
+    0.796764810f,  0.604289531f,
+    0.795836905f,  0.605511041f,
+    0.794907126f,  0.606731127f,
+    0.793975478f,  0.607949785f,
+    0.793041960f,  0.609167012f,
+    0.792106577f,  0.610382806f,
+    0.791169330f,  0.611597164f,
+    0.790230221f,  0.612810082f,
+    0.789289253f,  0.614021559f,
+    0.788346428f,  0.615231591f,
+    0.787401747f,  0.616440175f,
+    0.786455214f,  0.617647308f,
+    0.785506830f,  0.618852988f,
+    0.784556597f,  0.620057212f,
+    0.783604519f,  0.621259977f,
+    0.782650596f,  0.622461279f,
+    0.781694832f,  0.623661118f,
+    0.780737229f,  0.624859488f,
+    0.779777788f,  0.626056388f,
+    0.778816512f,  0.627251815f,
+    0.777853404f,  0.628445767f,
+    0.776888466f,  0.629638239f,
+    0.775921699f,  0.630829230f,
+    0.774953107f,  0.632018736f,
+    0.773982691f,  0.633206755f,
+    0.773010453f,  0.634393284f,
+    0.772036397f,  0.635578320f,
+    0.771060524f,  0.636761861f,
+    0.770082837f,  0.637943904f,
+    0.769103338f,  0.639124445f,
+    0.768122029f,  0.640303482f,
+    0.767138912f,  0.641481013f,
+    0.766153990f,  0.642657034f,
+    0.765167266f,  0.643831543f,
+    0.764178741f,  0.645004537f,
+    0.763188417f,  0.646176013f,
+    0.762196298f,  0.647345969f,
+    0.761202385f,  0.648514401f,
+    0.760206682f,  0.649681307f,
+    0.759209189f,  0.650846685f,
+    0.758209910f,  0.652010531f,
+    0.757208847f,  0.653172843f,
+    0.756206001f,  0.654333618f,
+    0.755201377f,  0.655492853f,
+    0.754194975f,  0.656650546f,
+    0.753186799f,  0.657806693f,
+    0.752176850f,  0.658961293f,
+    0.751165132f,  0.660114342f,
+    0.750151646f,  0.661265838f,
+    0.749136395f,  0.662415778f,
+    0.748119380f,  0.663564159f,
+    0.747100606f,  0.664710978f,
+    0.746080074f,  0.665856234f,
+    0.745057785f,  0.666999922f,
+    0.744033744f,  0.668142041f,
+    0.743007952f,  0.669282588f,
+    0.741980412f,  0.670421560f,
+    0.740951125f,  0.671558955f,
+    0.739920095f,  0.672694769f,
+    0.738887324f,  0.673829000f,
+    0.737852815f,  0.674961646f,
+    0.736816569f,  0.676092704f,
+    0.735778589f,  0.677222170f,
+    0.734738878f,  0.678350043f,
+    0.733697438f,  0.679476320f,
+    0.732654272f,  0.680600998f,
+    0.731609381f,  0.681724074f,
+    0.730562769f,  0.682845546f,
+    0.729514438f,  0.683965412f,
+    0.728464390f,  0.685083668f,
+    0.727412629f,  0.686200312f,
+    0.726359155f,  0.687315341f,
+    0.725303972f,  0.688428753f,
+    0.724247083f,  0.689540545f,
+    0.723188489f,  0.690650714f,
+    0.722128194f,  0.691759258f,
+    0.721066199f,  0.692866175f,
+    0.720002508f,  0.693971461f,
+    0.718937122f,  0.695075114f,
+    0.717870045f,  0.696177131f,
+    0.716801279f,  0.697277511f,
+    0.715730825f,  0.698376249f,
+    0.714658688f,  0.699473345f,
+    0.713584869f,  0.700568794f,
+    0.712509371f,  0.701662595f,
+    0.711432196f,  0.702754744f,
+    0.710353347f,  0.703845241f,
+    0.709272826f,  0.704934080f,
+    0.708190637f,  0.706021261f,
+    0.707106781f,  0.707106781f,
+    0.706021261f,  0.708190637f,
+    0.704934080f,  0.709272826f,
+    0.703845241f,  0.710353347f,
+    0.702754744f,  0.711432196f,
+    0.701662595f,  0.712509371f,
+    0.700568794f,  0.713584869f,
+    0.699473345f,  0.714658688f,
+    0.698376249f,  0.715730825f,
+    0.697277511f,  0.716801279f,
+    0.696177131f,  0.717870045f,
+    0.695075114f,  0.718937122f,
+    0.693971461f,  0.720002508f,
+    0.692866175f,  0.721066199f,
+    0.691759258f,  0.722128194f,
+    0.690650714f,  0.723188489f,
+    0.689540545f,  0.724247083f,
+    0.688428753f,  0.725303972f,
+    0.687315341f,  0.726359155f,
+    0.686200312f,  0.727412629f,
+    0.685083668f,  0.728464390f,
+    0.683965412f,  0.729514438f,
+    0.682845546f,  0.730562769f,
+    0.681724074f,  0.731609381f,
+    0.680600998f,  0.732654272f,
+    0.679476320f,  0.733697438f,
+    0.678350043f,  0.734738878f,
+    0.677222170f,  0.735778589f,
+    0.676092704f,  0.736816569f,
+    0.674961646f,  0.737852815f,
+    0.673829000f,  0.738887324f,
+    0.672694769f,  0.739920095f,
+    0.671558955f,  0.740951125f,
+    0.670421560f,  0.741980412f,
+    0.669282588f,  0.743007952f,
+    0.668142041f,  0.744033744f,
+    0.666999922f,  0.745057785f,
+    0.665856234f,  0.746080074f,
+    0.664710978f,  0.747100606f,
+    0.663564159f,  0.748119380f,
+    0.662415778f,  0.749136395f,
+    0.661265838f,  0.750151646f,
+    0.660114342f,  0.751165132f,
+    0.658961293f,  0.752176850f,
+    0.657806693f,  0.753186799f,
+    0.656650546f,  0.754194975f,
+    0.655492853f,  0.755201377f,
+    0.654333618f,  0.756206001f,
+    0.653172843f,  0.757208847f,
+    0.652010531f,  0.758209910f,
+    0.650846685f,  0.759209189f,
+    0.649681307f,  0.760206682f,
+    0.648514401f,  0.761202385f,
+    0.647345969f,  0.762196298f,
+    0.646176013f,  0.763188417f,
+    0.645004537f,  0.764178741f,
+    0.643831543f,  0.765167266f,
+    0.642657034f,  0.766153990f,
+    0.641481013f,  0.767138912f,
+    0.640303482f,  0.768122029f,
+    0.639124445f,  0.769103338f,
+    0.637943904f,  0.770082837f,
+    0.636761861f,  0.771060524f,
+    0.635578320f,  0.772036397f,
+    0.634393284f,  0.773010453f,
+    0.633206755f,  0.773982691f,
+    0.632018736f,  0.774953107f,
+    0.630829230f,  0.775921699f,
+    0.629638239f,  0.776888466f,
+    0.628445767f,  0.777853404f,
+    0.627251815f,  0.778816512f,
+    0.626056388f,  0.779777788f,
+    0.624859488f,  0.780737229f,
+    0.623661118f,  0.781694832f,
+    0.622461279f,  0.782650596f,
+    0.621259977f,  0.783604519f,
+    0.620057212f,  0.784556597f,
+    0.618852988f,  0.785506830f,
+    0.617647308f,  0.786455214f,
+    0.616440175f,  0.787401747f,
+    0.615231591f,  0.788346428f,
+    0.614021559f,  0.789289253f,
+    0.612810082f,  0.790230221f,
+    0.611597164f,  0.791169330f,
+    0.610382806f,  0.792106577f,
+    0.609167012f,  0.793041960f,
+    0.607949785f,  0.793975478f,
+    0.606731127f,  0.794907126f,
+    0.605511041f,  0.795836905f,
+    0.604289531f,  0.796764810f,
+    0.603066599f,  0.797690841f,
+    0.601842247f,  0.798614995f,
+    0.600616479f,  0.799537269f,
+    0.599389298f,  0.800457662f,
+    0.598160707f,  0.801376172f,
+    0.596930708f,  0.802292796f,
+    0.595699304f,  0.803207531f,
+    0.594466499f,  0.804120377f,
+    0.593232295f,  0.805031331f,
+    0.591996695f,  0.805940391f,
+    0.590759702f,  0.806847554f,
+    0.589521319f,  0.807752818f,
+    0.588281548f,  0.808656182f,
+    0.587040394f,  0.809557642f,
+    0.585797857f,  0.810457198f,
+    0.584553943f,  0.811354847f,
+    0.583308653f,  0.812250587f,
+    0.582061990f,  0.813144415f,
+    0.580813958f,  0.814036330f,
+    0.579564559f,  0.814926329f,
+    0.578313796f,  0.815814411f,
+    0.577061673f,  0.816700573f,
+    0.575808191f,  0.817584813f,
+    0.574553355f,  0.818467130f,
+    0.573297167f,  0.819347520f,
+    0.572039629f,  0.820225983f,
+    0.570780746f,  0.821102515f,
+    0.569520519f,  0.821977115f,
+    0.568258953f,  0.822849781f,
+    0.566996049f,  0.823720511f,
+    0.565731811f,  0.824589303f,
+    0.564466242f,  0.825456154f,
+    0.563199344f,  0.826321063f,
+    0.561931121f,  0.827184027f,
+    0.560661576f,  0.828045045f,
+    0.559390712f,  0.828904115f,
+    0.558118531f,  0.829761234f,
+    0.556845037f,  0.830616400f,
+    0.555570233f,  0.831469612f,
+    0.554294121f,  0.832320868f,
+    0.553016706f,  0.833170165f,
+    0.551737988f,  0.834017501f,
+    0.550457973f,  0.834862875f,
+    0.549176662f,  0.835706284f,
+    0.547894059f,  0.836547727f,
+    0.546610167f,  0.837387202f,
+    0.545324988f,  0.838224706f,
+    0.544038527f,  0.839060237f,
+    0.542750785f,  0.839893794f,
+    0.541461766f,  0.840725375f,
+    0.540171473f,  0.841554977f,
+    0.538879909f,  0.842382600f,
+    0.537587076f,  0.843208240f,
+    0.536292979f,  0.844031895f,
+    0.534997620f,  0.844853565f,
+    0.533701002f,  0.845673247f,
+    0.532403128f,  0.846490939f,
+    0.531104001f,  0.847306639f,
+    0.529803625f,  0.848120345f,
+    0.528502002f,  0.848932055f,
+    0.527199135f,  0.849741768f,
+    0.525895027f,  0.850549481f,
+    0.524589683f,  0.851355193f,
+    0.523283103f,  0.852158902f,
+    0.521975293f,  0.852960605f,
+    0.520666254f,  0.853760301f,
+    0.519355990f,  0.854557988f,
+    0.518044504f,  0.855353665f,
+    0.516731799f,  0.856147328f,
+    0.515417878f,  0.856938977f,
+    0.514102744f,  0.857728610f,
+    0.512786401f,  0.858516224f,
+    0.511468850f,  0.859301818f,
+    0.510150097f,  0.860085390f,
+    0.508830143f,  0.860866939f,
+    0.507508991f,  0.861646461f,
+    0.506186645f,  0.862423956f,
+    0.504863109f,  0.863199422f,
+    0.503538384f,  0.863972856f,
+    0.502212474f,  0.864744258f,
+    0.500885383f,  0.865513624f,
+    0.499557113f,  0.866280954f,
+    0.498227667f,  0.867046246f,
+    0.496897049f,  0.867809497f,
+    0.495565262f,  0.868570706f,
+    0.494232309f,  0.869329871f,
+    0.492898192f,  0.870086991f,
+    0.491562916f,  0.870842063f,
+    0.490226483f,  0.871595087f,
+    0.488888897f,  0.872346059f,
+    0.487550160f,  0.873094978f,
+    0.486210276f,  0.873841843f,
+    0.484869248f,  0.874586652f,
+    0.483527079f,  0.875329403f,
+    0.482183772f,  0.876070094f,
+    0.480839331f,  0.876808724f,
+    0.479493758f,  0.877545290f,
+    0.478147056f,  0.878279792f,
+    0.476799230f,  0.879012226f,
+    0.475450282f,  0.879742593f,
+    0.474100215f,  0.880470889f,
+    0.472749032f,  0.881197113f,
+    0.471396737f,  0.881921264f,
+    0.470043332f,  0.882643340f,
+    0.468688822f,  0.883363339f,
+    0.467333209f,  0.884081259f,
+    0.465976496f,  0.884797098f,
+    0.464618686f,  0.885510856f,
+    0.463259784f,  0.886222530f,
+    0.461899791f,  0.886932119f,
+    0.460538711f,  0.887639620f,
+    0.459176548f,  0.888345033f,
+    0.457813304f,  0.889048356f,
+    0.456448982f,  0.889749586f,
+    0.455083587f,  0.890448723f,
+    0.453717121f,  0.891145765f,
+    0.452349587f,  0.891840709f,
+    0.450980989f,  0.892533555f,
+    0.449611330f,  0.893224301f,
+    0.448240612f,  0.893912945f,
+    0.446868840f,  0.894599486f,
+    0.445496017f,  0.895283921f,
+    0.444122145f,  0.895966250f,
+    0.442747228f,  0.896646470f,
+    0.441371269f,  0.897324581f,
+    0.439994271f,  0.898000580f,
+    0.438616239f,  0.898674466f,
+    0.437237174f,  0.899346237f,
+    0.435857080f,  0.900015892f,
+    0.434475961f,  0.900683429f,
+    0.433093819f,  0.901348847f,
+    0.431710658f,  0.902012144f,
+    0.430326481f,  0.902673318f,
+    0.428941292f,  0.903332368f,
+    0.427555093f,  0.903989293f,
+    0.426167889f,  0.904644091f,
+    0.424779681f,  0.905296759f,
+    0.423390474f,  0.905947298f,
+    0.422000271f,  0.906595705f,
+    0.420609074f,  0.907241978f,
+    0.419216888f,  0.907886116f,
+    0.417823716f,  0.908528119f,
+    0.416429560f,  0.909167983f,
+    0.415034424f,  0.909805708f,
+    0.413638312f,  0.910441292f,
+    0.412241227f,  0.911074734f,
+    0.410843171f,  0.911706032f,
+    0.409444149f,  0.912335185f,
+    0.408044163f,  0.912962190f,
+    0.406643217f,  0.913587048f,
+    0.405241314f,  0.914209756f,
+    0.403838458f,  0.914830312f,
+    0.402434651f,  0.915448716f,
+    0.401029897f,  0.916064966f,
+    0.399624200f,  0.916679060f,
+    0.398217562f,  0.917290997f,
+    0.396809987f,  0.917900776f,
+    0.395401479f,  0.918508394f,
+    0.393992040f,  0.919113852f,
+    0.392581674f,  0.919717146f,
+    0.391170384f,  0.920318277f,
+    0.389758174f,  0.920917242f,
+    0.388345047f,  0.921514039f,
+    0.386931006f,  0.922108669f,
+    0.385516054f,  0.922701128f,
+    0.384100195f,  0.923291417f,
+    0.382683432f,  0.923879533f,
+    0.381265769f,  0.924465474f,
+    0.379847209f,  0.925049241f,
+    0.378427755f,  0.925630831f,
+    0.377007410f,  0.926210242f,
+    0.375586178f,  0.926787474f,
+    0.374164063f,  0.927362526f,
+    0.372741067f,  0.927935395f,
+    0.371317194f,  0.928506080f,
+    0.369892447f,  0.929074581f,
+    0.368466830f,  0.929640896f,
+    0.367040346f,  0.930205023f,
+    0.365612998f,  0.930766961f,
+    0.364184790f,  0.931326709f,
+    0.362755724f,  0.931884266f,
+    0.361325806f,  0.932439629f,
+    0.359895037f,  0.932992799f,
+    0.358463421f,  0.933543773f,
+    0.357030961f,  0.934092550f,
+    0.355597662f,  0.934639130f,
+    0.354163525f,  0.935183510f,
+    0.352728556f,  0.935725689f,
+    0.351292756f,  0.936265667f,
+    0.349856130f,  0.936803442f,
+    0.348418680f,  0.937339012f,
+    0.346980411f,  0.937872376f,
+    0.345541325f,  0.938403534f,
+    0.344101426f,  0.938932484f,
+    0.342660717f,  0.939459224f,
+    0.341219202f,  0.939983753f,
+    0.339776884f,  0.940506071f,
+    0.338333767f,  0.941026175f,
+    0.336889853f,  0.941544065f,
+    0.335445147f,  0.942059740f,
+    0.333999651f,  0.942573198f,
+    0.332553370f,  0.943084437f,
+    0.331106306f,  0.943593458f,
+    0.329658463f,  0.944100258f,
+    0.328209844f,  0.944604837f,
+    0.326760452f,  0.945107193f,
+    0.325310292f,  0.945607325f,
+    0.323859367f,  0.946105232f,
+    0.322407679f,  0.946600913f,
+    0.320955232f,  0.947094366f,
+    0.319502031f,  0.947585591f,
+    0.318048077f,  0.948074586f,
+    0.316593376f,  0.948561350f,
+    0.315137929f,  0.949045882f,
+    0.313681740f,  0.949528181f,
+    0.312224814f,  0.950008245f,
+    0.310767153f,  0.950486074f,
+    0.309308760f,  0.950961666f,
+    0.307849640f,  0.951435021f,
+    0.306389795f,  0.951906137f,
+    0.304929230f,  0.952375013f,
+    0.303467947f,  0.952841648f,
+    0.302005949f,  0.953306040f,
+    0.300543241f,  0.953768190f,
+    0.299079826f,  0.954228095f,
+    0.297615707f,  0.954685755f,
+    0.296150888f,  0.955141168f,
+    0.294685372f,  0.955594334f,
+    0.293219163f,  0.956045251f,
+    0.291752263f,  0.956493919f,
+    0.290284677f,  0.956940336f,
+    0.288816408f,  0.957384501f,
+    0.287347460f,  0.957826413f,
+    0.285877835f,  0.958266071f,
+    0.284407537f,  0.958703475f,
+    0.282936570f,  0.959138622f,
+    0.281464938f,  0.959571513f,
+    0.279992643f,  0.960002146f,
+    0.278519689f,  0.960430519f,
+    0.277046080f,  0.960856633f,
+    0.275571819f,  0.961280486f,
+    0.274096910f,  0.961702077f,
+    0.272621355f,  0.962121404f,
+    0.271145160f,  0.962538468f,
+    0.269668326f,  0.962953267f,
+    0.268190857f,  0.963365800f,
+    0.266712757f,  0.963776066f,
+    0.265234030f,  0.964184064f,
+    0.263754679f,  0.964589793f,
+    0.262274707f,  0.964993253f,
+    0.260794118f,  0.965394442f,
+    0.259312915f,  0.965793359f,
+    0.257831102f,  0.966190003f,
+    0.256348682f,  0.966584374f,
+    0.254865660f,  0.966976471f,
+    0.253382037f,  0.967366292f,
+    0.251897818f,  0.967753837f,
+    0.250413007f,  0.968139105f,
+    0.248927606f,  0.968522094f,
+    0.247441619f,  0.968902805f,
+    0.245955050f,  0.969281235f,
+    0.244467903f,  0.969657385f,
+    0.242980180f,  0.970031253f,
+    0.241491885f,  0.970402839f,
+    0.240003022f,  0.970772141f,
+    0.238513595f,  0.971139158f,
+    0.237023606f,  0.971503891f,
+    0.235533059f,  0.971866337f,
+    0.234041959f,  0.972226497f,
+    0.232550307f,  0.972584369f,
+    0.231058108f,  0.972939952f,
+    0.229565366f,  0.973293246f,
+    0.228072083f,  0.973644250f,
+    0.226578264f,  0.973992962f,
+    0.225083911f,  0.974339383f,
+    0.223589029f,  0.974683511f,
+    0.222093621f,  0.975025345f,
+    0.220597690f,  0.975364885f,
+    0.219101240f,  0.975702130f,
+    0.217604275f,  0.976037079f,
+    0.216106797f,  0.976369731f,
+    0.214608811f,  0.976700086f,
+    0.213110320f,  0.977028143f,
+    0.211611327f,  0.977353900f,
+    0.210111837f,  0.977677358f,
+    0.208611852f,  0.977998515f,
+    0.207111376f,  0.978317371f,
+    0.205610413f,  0.978633924f,
+    0.204108966f,  0.978948175f,
+    0.202607039f,  0.979260123f,
+    0.201104635f,  0.979569766f,
+    0.199601758f,  0.979877104f,
+    0.198098411f,  0.980182136f,
+    0.196594598f,  0.980484862f,
+    0.195090322f,  0.980785280f,
+    0.193585587f,  0.981083391f,
+    0.192080397f,  0.981379193f,
+    0.190574755f,  0.981672686f,
+    0.189068664f,  0.981963869f,
+    0.187562129f,  0.982252741f,
+    0.186055152f,  0.982539302f,
+    0.184547737f,  0.982823551f,
+    0.183039888f,  0.983105487f,
+    0.181531608f,  0.983385110f,
+    0.180022901f,  0.983662419f,
+    0.178513771f,  0.983937413f,
+    0.177004220f,  0.984210092f,
+    0.175494253f,  0.984480455f,
+    0.173983873f,  0.984748502f,
+    0.172473084f,  0.985014231f,
+    0.170961889f,  0.985277642f,
+    0.169450291f,  0.985538735f,
+    0.167938295f,  0.985797509f,
+    0.166425904f,  0.986053963f,
+    0.164913120f,  0.986308097f,
+    0.163399949f,  0.986559910f,
+    0.161886394f,  0.986809402f,
+    0.160372457f,  0.987056571f,
+    0.158858143f,  0.987301418f,
+    0.157343456f,  0.987543942f,
+    0.155828398f,  0.987784142f,
+    0.154312973f,  0.988022017f,
+    0.152797185f,  0.988257568f,
+    0.151281038f,  0.988490793f,
+    0.149764535f,  0.988721692f,
+    0.148247679f,  0.988950265f,
+    0.146730474f,  0.989176510f,
+    0.145212925f,  0.989400428f,
+    0.143695033f,  0.989622017f,
+    0.142176804f,  0.989841278f,
+    0.140658239f,  0.990058210f,
+    0.139139344f,  0.990272812f,
+    0.137620122f,  0.990485084f,
+    0.136100575f,  0.990695025f,
+    0.134580709f,  0.990902635f,
+    0.133060525f,  0.991107914f,
+    0.131540029f,  0.991310860f,
+    0.130019223f,  0.991511473f,
+    0.128498111f,  0.991709754f,
+    0.126976696f,  0.991905700f,
+    0.125454983f,  0.992099313f,
+    0.123932975f,  0.992290591f,
+    0.122410675f,  0.992479535f,
+    0.120888087f,  0.992666142f,
+    0.119365215f,  0.992850414f,
+    0.117842062f,  0.993032350f,
+    0.116318631f,  0.993211949f,
+    0.114794927f,  0.993389211f,
+    0.113270952f,  0.993564136f,
+    0.111746711f,  0.993736722f,
+    0.110222207f,  0.993906970f,
+    0.108697444f,  0.994074879f,
+    0.107172425f,  0.994240449f,
+    0.105647154f,  0.994403680f,
+    0.104121634f,  0.994564571f,
+    0.102595869f,  0.994723121f,
+    0.101069863f,  0.994879331f,
+    0.099543619f,  0.995033199f,
+    0.098017140f,  0.995184727f,
+    0.096490431f,  0.995333912f,
+    0.094963495f,  0.995480755f,
+    0.093436336f,  0.995625256f,
+    0.091908956f,  0.995767414f,
+    0.090381361f,  0.995907229f,
+    0.088853553f,  0.996044701f,
+    0.087325535f,  0.996179829f,
+    0.085797312f,  0.996312612f,
+    0.084268888f,  0.996443051f,
+    0.082740265f,  0.996571146f,
+    0.081211447f,  0.996696895f,
+    0.079682438f,  0.996820299f,
+    0.078153242f,  0.996941358f,
+    0.076623861f,  0.997060070f,
+    0.075094301f,  0.997176437f,
+    0.073564564f,  0.997290457f,
+    0.072034653f,  0.997402130f,
+    0.070504573f,  0.997511456f,
+    0.068974328f,  0.997618435f,
+    0.067443920f,  0.997723067f,
+    0.065913353f,  0.997825350f,
+    0.064382631f,  0.997925286f,
+    0.062851758f,  0.998022874f,
+    0.061320736f,  0.998118113f,
+    0.059789571f,  0.998211003f,
+    0.058258265f,  0.998301545f,
+    0.056726821f,  0.998389737f,
+    0.055195244f,  0.998475581f,
+    0.053663538f,  0.998559074f,
+    0.052131705f,  0.998640218f,
+    0.050599749f,  0.998719012f,
+    0.049067674f,  0.998795456f,
+    0.047535484f,  0.998869550f,
+    0.046003182f,  0.998941293f,
+    0.044470772f,  0.999010686f,
+    0.042938257f,  0.999077728f,
+    0.041405641f,  0.999142419f,
+    0.039872928f,  0.999204759f,
+    0.038340120f,  0.999264747f,
+    0.036807223f,  0.999322385f,
+    0.035274239f,  0.999377670f,
+    0.033741172f,  0.999430605f,
+    0.032208025f,  0.999481187f,
+    0.030674803f,  0.999529418f,
+    0.029141509f,  0.999575296f,
+    0.027608146f,  0.999618822f,
+    0.026074718f,  0.999659997f,
+    0.024541229f,  0.999698819f,
+    0.023007681f,  0.999735288f,
+    0.021474080f,  0.999769405f,
+    0.019940429f,  0.999801170f,
+    0.018406730f,  0.999830582f,
+    0.016872988f,  0.999857641f,
+    0.015339206f,  0.999882347f,
+    0.013805389f,  0.999904701f,
+    0.012271538f,  0.999924702f,
+    0.010737659f,  0.999942350f,
+    0.009203755f,  0.999957645f,
+    0.007669829f,  0.999970586f,
+    0.006135885f,  0.999981175f,
+    0.004601926f,  0.999989411f,
+    0.003067957f,  0.999995294f,
+    0.001533980f,  0.999998823f,
+    0.000000000f,  1.000000000f,
+   -0.001533980f,  0.999998823f,
+   -0.003067957f,  0.999995294f,
+   -0.004601926f,  0.999989411f,
+   -0.006135885f,  0.999981175f,
+   -0.007669829f,  0.999970586f,
+   -0.009203755f,  0.999957645f,
+   -0.010737659f,  0.999942350f,
+   -0.012271538f,  0.999924702f,
+   -0.013805389f,  0.999904701f,
+   -0.015339206f,  0.999882347f,
+   -0.016872988f,  0.999857641f,
+   -0.018406730f,  0.999830582f,
+   -0.019940429f,  0.999801170f,
+   -0.021474080f,  0.999769405f,
+   -0.023007681f,  0.999735288f,
+   -0.024541229f,  0.999698819f,
+   -0.026074718f,  0.999659997f,
+   -0.027608146f,  0.999618822f,
+   -0.029141509f,  0.999575296f,
+   -0.030674803f,  0.999529418f,
+   -0.032208025f,  0.999481187f,
+   -0.033741172f,  0.999430605f,
+   -0.035274239f,  0.999377670f,
+   -0.036807223f,  0.999322385f,
+   -0.038340120f,  0.999264747f,
+   -0.039872928f,  0.999204759f,
+   -0.041405641f,  0.999142419f,
+   -0.042938257f,  0.999077728f,
+   -0.044470772f,  0.999010686f,
+   -0.046003182f,  0.998941293f,
+   -0.047535484f,  0.998869550f,
+   -0.049067674f,  0.998795456f,
+   -0.050599749f,  0.998719012f,
+   -0.052131705f,  0.998640218f,
+   -0.053663538f,  0.998559074f,
+   -0.055195244f,  0.998475581f,
+   -0.056726821f,  0.998389737f,
+   -0.058258265f,  0.998301545f,
+   -0.059789571f,  0.998211003f,
+   -0.061320736f,  0.998118113f,
+   -0.062851758f,  0.998022874f,
+   -0.064382631f,  0.997925286f,
+   -0.065913353f,  0.997825350f,
+   -0.067443920f,  0.997723067f,
+   -0.068974328f,  0.997618435f,
+   -0.070504573f,  0.997511456f,
+   -0.072034653f,  0.997402130f,
+   -0.073564564f,  0.997290457f,
+   -0.075094301f,  0.997176437f,
+   -0.076623861f,  0.997060070f,
+   -0.078153242f,  0.996941358f,
+   -0.079682438f,  0.996820299f,
+   -0.081211447f,  0.996696895f,
+   -0.082740265f,  0.996571146f,
+   -0.084268888f,  0.996443051f,
+   -0.085797312f,  0.996312612f,
+   -0.087325535f,  0.996179829f,
+   -0.088853553f,  0.996044701f,
+   -0.090381361f,  0.995907229f,
+   -0.091908956f,  0.995767414f,
+   -0.093436336f,  0.995625256f,
+   -0.094963495f,  0.995480755f,
+   -0.096490431f,  0.995333912f,
+   -0.098017140f,  0.995184727f,
+   -0.099543619f,  0.995033199f,
+   -0.101069863f,  0.994879331f,
+   -0.102595869f,  0.994723121f,
+   -0.104121634f,  0.994564571f,
+   -0.105647154f,  0.994403680f,
+   -0.107172425f,  0.994240449f,
+   -0.108697444f,  0.994074879f,
+   -0.110222207f,  0.993906970f,
+   -0.111746711f,  0.993736722f,
+   -0.113270952f,  0.993564136f,
+   -0.114794927f,  0.993389211f,
+   -0.116318631f,  0.993211949f,
+   -0.117842062f,  0.993032350f,
+   -0.119365215f,  0.992850414f,
+   -0.120888087f,  0.992666142f,
+   -0.122410675f,  0.992479535f,
+   -0.123932975f,  0.992290591f,
+   -0.125454983f,  0.992099313f,
+   -0.126976696f,  0.991905700f,
+   -0.128498111f,  0.991709754f,
+   -0.130019223f,  0.991511473f,
+   -0.131540029f,  0.991310860f,
+   -0.133060525f,  0.991107914f,
+   -0.134580709f,  0.990902635f,
+   -0.136100575f,  0.990695025f,
+   -0.137620122f,  0.990485084f,
+   -0.139139344f,  0.990272812f,
+   -0.140658239f,  0.990058210f,
+   -0.142176804f,  0.989841278f,
+   -0.143695033f,  0.989622017f,
+   -0.145212925f,  0.989400428f,
+   -0.146730474f,  0.989176510f,
+   -0.148247679f,  0.988950265f,
+   -0.149764535f,  0.988721692f,
+   -0.151281038f,  0.988490793f,
+   -0.152797185f,  0.988257568f,
+   -0.154312973f,  0.988022017f,
+   -0.155828398f,  0.987784142f,
+   -0.157343456f,  0.987543942f,
+   -0.158858143f,  0.987301418f,
+   -0.160372457f,  0.987056571f,
+   -0.161886394f,  0.986809402f,
+   -0.163399949f,  0.986559910f,
+   -0.164913120f,  0.986308097f,
+   -0.166425904f,  0.986053963f,
+   -0.167938295f,  0.985797509f,
+   -0.169450291f,  0.985538735f,
+   -0.170961889f,  0.985277642f,
+   -0.172473084f,  0.985014231f,
+   -0.173983873f,  0.984748502f,
+   -0.175494253f,  0.984480455f,
+   -0.177004220f,  0.984210092f,
+   -0.178513771f,  0.983937413f,
+   -0.180022901f,  0.983662419f,
+   -0.181531608f,  0.983385110f,
+   -0.183039888f,  0.983105487f,
+   -0.184547737f,  0.982823551f,
+   -0.186055152f,  0.982539302f,
+   -0.187562129f,  0.982252741f,
+   -0.189068664f,  0.981963869f,
+   -0.190574755f,  0.981672686f,
+   -0.192080397f,  0.981379193f,
+   -0.193585587f,  0.981083391f,
+   -0.195090322f,  0.980785280f,
+   -0.196594598f,  0.980484862f,
+   -0.198098411f,  0.980182136f,
+   -0.199601758f,  0.979877104f,
+   -0.201104635f,  0.979569766f,
+   -0.202607039f,  0.979260123f,
+   -0.204108966f,  0.978948175f,
+   -0.205610413f,  0.978633924f,
+   -0.207111376f,  0.978317371f,
+   -0.208611852f,  0.977998515f,
+   -0.210111837f,  0.977677358f,
+   -0.211611327f,  0.977353900f,
+   -0.213110320f,  0.977028143f,
+   -0.214608811f,  0.976700086f,
+   -0.216106797f,  0.976369731f,
+   -0.217604275f,  0.976037079f,
+   -0.219101240f,  0.975702130f,
+   -0.220597690f,  0.975364885f,
+   -0.222093621f,  0.975025345f,
+   -0.223589029f,  0.974683511f,
+   -0.225083911f,  0.974339383f,
+   -0.226578264f,  0.973992962f,
+   -0.228072083f,  0.973644250f,
+   -0.229565366f,  0.973293246f,
+   -0.231058108f,  0.972939952f,
+   -0.232550307f,  0.972584369f,
+   -0.234041959f,  0.972226497f,
+   -0.235533059f,  0.971866337f,
+   -0.237023606f,  0.971503891f,
+   -0.238513595f,  0.971139158f,
+   -0.240003022f,  0.970772141f,
+   -0.241491885f,  0.970402839f,
+   -0.242980180f,  0.970031253f,
+   -0.244467903f,  0.969657385f,
+   -0.245955050f,  0.969281235f,
+   -0.247441619f,  0.968902805f,
+   -0.248927606f,  0.968522094f,
+   -0.250413007f,  0.968139105f,
+   -0.251897818f,  0.967753837f,
+   -0.253382037f,  0.967366292f,
+   -0.254865660f,  0.966976471f,
+   -0.256348682f,  0.966584374f,
+   -0.257831102f,  0.966190003f,
+   -0.259312915f,  0.965793359f,
+   -0.260794118f,  0.965394442f,
+   -0.262274707f,  0.964993253f,
+   -0.263754679f,  0.964589793f,
+   -0.265234030f,  0.964184064f,
+   -0.266712757f,  0.963776066f,
+   -0.268190857f,  0.963365800f,
+   -0.269668326f,  0.962953267f,
+   -0.271145160f,  0.962538468f,
+   -0.272621355f,  0.962121404f,
+   -0.274096910f,  0.961702077f,
+   -0.275571819f,  0.961280486f,
+   -0.277046080f,  0.960856633f,
+   -0.278519689f,  0.960430519f,
+   -0.279992643f,  0.960002146f,
+   -0.281464938f,  0.959571513f,
+   -0.282936570f,  0.959138622f,
+   -0.284407537f,  0.958703475f,
+   -0.285877835f,  0.958266071f,
+   -0.287347460f,  0.957826413f,
+   -0.288816408f,  0.957384501f,
+   -0.290284677f,  0.956940336f,
+   -0.291752263f,  0.956493919f,
+   -0.293219163f,  0.956045251f,
+   -0.294685372f,  0.955594334f,
+   -0.296150888f,  0.955141168f,
+   -0.297615707f,  0.954685755f,
+   -0.299079826f,  0.954228095f,
+   -0.300543241f,  0.953768190f,
+   -0.302005949f,  0.953306040f,
+   -0.303467947f,  0.952841648f,
+   -0.304929230f,  0.952375013f,
+   -0.306389795f,  0.951906137f,
+   -0.307849640f,  0.951435021f,
+   -0.309308760f,  0.950961666f,
+   -0.310767153f,  0.950486074f,
+   -0.312224814f,  0.950008245f,
+   -0.313681740f,  0.949528181f,
+   -0.315137929f,  0.949045882f,
+   -0.316593376f,  0.948561350f,
+   -0.318048077f,  0.948074586f,
+   -0.319502031f,  0.947585591f,
+   -0.320955232f,  0.947094366f,
+   -0.322407679f,  0.946600913f,
+   -0.323859367f,  0.946105232f,
+   -0.325310292f,  0.945607325f,
+   -0.326760452f,  0.945107193f,
+   -0.328209844f,  0.944604837f,
+   -0.329658463f,  0.944100258f,
+   -0.331106306f,  0.943593458f,
+   -0.332553370f,  0.943084437f,
+   -0.333999651f,  0.942573198f,
+   -0.335445147f,  0.942059740f,
+   -0.336889853f,  0.941544065f,
+   -0.338333767f,  0.941026175f,
+   -0.339776884f,  0.940506071f,
+   -0.341219202f,  0.939983753f,
+   -0.342660717f,  0.939459224f,
+   -0.344101426f,  0.938932484f,
+   -0.345541325f,  0.938403534f,
+   -0.346980411f,  0.937872376f,
+   -0.348418680f,  0.937339012f,
+   -0.349856130f,  0.936803442f,
+   -0.351292756f,  0.936265667f,
+   -0.352728556f,  0.935725689f,
+   -0.354163525f,  0.935183510f,
+   -0.355597662f,  0.934639130f,
+   -0.357030961f,  0.934092550f,
+   -0.358463421f,  0.933543773f,
+   -0.359895037f,  0.932992799f,
+   -0.361325806f,  0.932439629f,
+   -0.362755724f,  0.931884266f,
+   -0.364184790f,  0.931326709f,
+   -0.365612998f,  0.930766961f,
+   -0.367040346f,  0.930205023f,
+   -0.368466830f,  0.929640896f,
+   -0.369892447f,  0.929074581f,
+   -0.371317194f,  0.928506080f,
+   -0.372741067f,  0.927935395f,
+   -0.374164063f,  0.927362526f,
+   -0.375586178f,  0.926787474f,
+   -0.377007410f,  0.926210242f,
+   -0.378427755f,  0.925630831f,
+   -0.379847209f,  0.925049241f,
+   -0.381265769f,  0.924465474f,
+   -0.382683432f,  0.923879533f,
+   -0.384100195f,  0.923291417f,
+   -0.385516054f,  0.922701128f,
+   -0.386931006f,  0.922108669f,
+   -0.388345047f,  0.921514039f,
+   -0.389758174f,  0.920917242f,
+   -0.391170384f,  0.920318277f,
+   -0.392581674f,  0.919717146f,
+   -0.393992040f,  0.919113852f,
+   -0.395401479f,  0.918508394f,
+   -0.396809987f,  0.917900776f,
+   -0.398217562f,  0.917290997f,
+   -0.399624200f,  0.916679060f,
+   -0.401029897f,  0.916064966f,
+   -0.402434651f,  0.915448716f,
+   -0.403838458f,  0.914830312f,
+   -0.405241314f,  0.914209756f,
+   -0.406643217f,  0.913587048f,
+   -0.408044163f,  0.912962190f,
+   -0.409444149f,  0.912335185f,
+   -0.410843171f,  0.911706032f,
+   -0.412241227f,  0.911074734f,
+   -0.413638312f,  0.910441292f,
+   -0.415034424f,  0.909805708f,
+   -0.416429560f,  0.909167983f,
+   -0.417823716f,  0.908528119f,
+   -0.419216888f,  0.907886116f,
+   -0.420609074f,  0.907241978f,
+   -0.422000271f,  0.906595705f,
+   -0.423390474f,  0.905947298f,
+   -0.424779681f,  0.905296759f,
+   -0.426167889f,  0.904644091f,
+   -0.427555093f,  0.903989293f,
+   -0.428941292f,  0.903332368f,
+   -0.430326481f,  0.902673318f,
+   -0.431710658f,  0.902012144f,
+   -0.433093819f,  0.901348847f,
+   -0.434475961f,  0.900683429f,
+   -0.435857080f,  0.900015892f,
+   -0.437237174f,  0.899346237f,
+   -0.438616239f,  0.898674466f,
+   -0.439994271f,  0.898000580f,
+   -0.441371269f,  0.897324581f,
+   -0.442747228f,  0.896646470f,
+   -0.444122145f,  0.895966250f,
+   -0.445496017f,  0.895283921f,
+   -0.446868840f,  0.894599486f,
+   -0.448240612f,  0.893912945f,
+   -0.449611330f,  0.893224301f,
+   -0.450980989f,  0.892533555f,
+   -0.452349587f,  0.891840709f,
+   -0.453717121f,  0.891145765f,
+   -0.455083587f,  0.890448723f,
+   -0.456448982f,  0.889749586f,
+   -0.457813304f,  0.889048356f,
+   -0.459176548f,  0.888345033f,
+   -0.460538711f,  0.887639620f,
+   -0.461899791f,  0.886932119f,
+   -0.463259784f,  0.886222530f,
+   -0.464618686f,  0.885510856f,
+   -0.465976496f,  0.884797098f,
+   -0.467333209f,  0.884081259f,
+   -0.468688822f,  0.883363339f,
+   -0.470043332f,  0.882643340f,
+   -0.471396737f,  0.881921264f,
+   -0.472749032f,  0.881197113f,
+   -0.474100215f,  0.880470889f,
+   -0.475450282f,  0.879742593f,
+   -0.476799230f,  0.879012226f,
+   -0.478147056f,  0.878279792f,
+   -0.479493758f,  0.877545290f,
+   -0.480839331f,  0.876808724f,
+   -0.482183772f,  0.876070094f,
+   -0.483527079f,  0.875329403f,
+   -0.484869248f,  0.874586652f,
+   -0.486210276f,  0.873841843f,
+   -0.487550160f,  0.873094978f,
+   -0.488888897f,  0.872346059f,
+   -0.490226483f,  0.871595087f,
+   -0.491562916f,  0.870842063f,
+   -0.492898192f,  0.870086991f,
+   -0.494232309f,  0.869329871f,
+   -0.495565262f,  0.868570706f,
+   -0.496897049f,  0.867809497f,
+   -0.498227667f,  0.867046246f,
+   -0.499557113f,  0.866280954f,
+   -0.500885383f,  0.865513624f,
+   -0.502212474f,  0.864744258f,
+   -0.503538384f,  0.863972856f,
+   -0.504863109f,  0.863199422f,
+   -0.506186645f,  0.862423956f,
+   -0.507508991f,  0.861646461f,
+   -0.508830143f,  0.860866939f,
+   -0.510150097f,  0.860085390f,
+   -0.511468850f,  0.859301818f,
+   -0.512786401f,  0.858516224f,
+   -0.514102744f,  0.857728610f,
+   -0.515417878f,  0.856938977f,
+   -0.516731799f,  0.856147328f,
+   -0.518044504f,  0.855353665f,
+   -0.519355990f,  0.854557988f,
+   -0.520666254f,  0.853760301f,
+   -0.521975293f,  0.852960605f,
+   -0.523283103f,  0.852158902f,
+   -0.524589683f,  0.851355193f,
+   -0.525895027f,  0.850549481f,
+   -0.527199135f,  0.849741768f,
+   -0.528502002f,  0.848932055f,
+   -0.529803625f,  0.848120345f,
+   -0.531104001f,  0.847306639f,
+   -0.532403128f,  0.846490939f,
+   -0.533701002f,  0.845673247f,
+   -0.534997620f,  0.844853565f,
+   -0.536292979f,  0.844031895f,
+   -0.537587076f,  0.843208240f,
+   -0.538879909f,  0.842382600f,
+   -0.540171473f,  0.841554977f,
+   -0.541461766f,  0.840725375f,
+   -0.542750785f,  0.839893794f,
+   -0.544038527f,  0.839060237f,
+   -0.545324988f,  0.838224706f,
+   -0.546610167f,  0.837387202f,
+   -0.547894059f,  0.836547727f,
+   -0.549176662f,  0.835706284f,
+   -0.550457973f,  0.834862875f,
+   -0.551737988f,  0.834017501f,
+   -0.553016706f,  0.833170165f,
+   -0.554294121f,  0.832320868f,
+   -0.555570233f,  0.831469612f,
+   -0.556845037f,  0.830616400f,
+   -0.558118531f,  0.829761234f,
+   -0.559390712f,  0.828904115f,
+   -0.560661576f,  0.828045045f,
+   -0.561931121f,  0.827184027f,
+   -0.563199344f,  0.826321063f,
+   -0.564466242f,  0.825456154f,
+   -0.565731811f,  0.824589303f,
+   -0.566996049f,  0.823720511f,
+   -0.568258953f,  0.822849781f,
+   -0.569520519f,  0.821977115f,
+   -0.570780746f,  0.821102515f,
+   -0.572039629f,  0.820225983f,
+   -0.573297167f,  0.819347520f,
+   -0.574553355f,  0.818467130f,
+   -0.575808191f,  0.817584813f,
+   -0.577061673f,  0.816700573f,
+   -0.578313796f,  0.815814411f,
+   -0.579564559f,  0.814926329f,
+   -0.580813958f,  0.814036330f,
+   -0.582061990f,  0.813144415f,
+   -0.583308653f,  0.812250587f,
+   -0.584553943f,  0.811354847f,
+   -0.585797857f,  0.810457198f,
+   -0.587040394f,  0.809557642f,
+   -0.588281548f,  0.808656182f,
+   -0.589521319f,  0.807752818f,
+   -0.590759702f,  0.806847554f,
+   -0.591996695f,  0.805940391f,
+   -0.593232295f,  0.805031331f,
+   -0.594466499f,  0.804120377f,
+   -0.595699304f,  0.803207531f,
+   -0.596930708f,  0.802292796f,
+   -0.598160707f,  0.801376172f,
+   -0.599389298f,  0.800457662f,
+   -0.600616479f,  0.799537269f,
+   -0.601842247f,  0.798614995f,
+   -0.603066599f,  0.797690841f,
+   -0.604289531f,  0.796764810f,
+   -0.605511041f,  0.795836905f,
+   -0.606731127f,  0.794907126f,
+   -0.607949785f,  0.793975478f,
+   -0.609167012f,  0.793041960f,
+   -0.610382806f,  0.792106577f,
+   -0.611597164f,  0.791169330f,
+   -0.612810082f,  0.790230221f,
+   -0.614021559f,  0.789289253f,
+   -0.615231591f,  0.788346428f,
+   -0.616440175f,  0.787401747f,
+   -0.617647308f,  0.786455214f,
+   -0.618852988f,  0.785506830f,
+   -0.620057212f,  0.784556597f,
+   -0.621259977f,  0.783604519f,
+   -0.622461279f,  0.782650596f,
+   -0.623661118f,  0.781694832f,
+   -0.624859488f,  0.780737229f,
+   -0.626056388f,  0.779777788f,
+   -0.627251815f,  0.778816512f,
+   -0.628445767f,  0.777853404f,
+   -0.629638239f,  0.776888466f,
+   -0.630829230f,  0.775921699f,
+   -0.632018736f,  0.774953107f,
+   -0.633206755f,  0.773982691f,
+   -0.634393284f,  0.773010453f,
+   -0.635578320f,  0.772036397f,
+   -0.636761861f,  0.771060524f,
+   -0.637943904f,  0.770082837f,
+   -0.639124445f,  0.769103338f,
+   -0.640303482f,  0.768122029f,
+   -0.641481013f,  0.767138912f,
+   -0.642657034f,  0.766153990f,
+   -0.643831543f,  0.765167266f,
+   -0.645004537f,  0.764178741f,
+   -0.646176013f,  0.763188417f,
+   -0.647345969f,  0.762196298f,
+   -0.648514401f,  0.761202385f,
+   -0.649681307f,  0.760206682f,
+   -0.650846685f,  0.759209189f,
+   -0.652010531f,  0.758209910f,
+   -0.653172843f,  0.757208847f,
+   -0.654333618f,  0.756206001f,
+   -0.655492853f,  0.755201377f,
+   -0.656650546f,  0.754194975f,
+   -0.657806693f,  0.753186799f,
+   -0.658961293f,  0.752176850f,
+   -0.660114342f,  0.751165132f,
+   -0.661265838f,  0.750151646f,
+   -0.662415778f,  0.749136395f,
+   -0.663564159f,  0.748119380f,
+   -0.664710978f,  0.747100606f,
+   -0.665856234f,  0.746080074f,
+   -0.666999922f,  0.745057785f,
+   -0.668142041f,  0.744033744f,
+   -0.669282588f,  0.743007952f,
+   -0.670421560f,  0.741980412f,
+   -0.671558955f,  0.740951125f,
+   -0.672694769f,  0.739920095f,
+   -0.673829000f,  0.738887324f,
+   -0.674961646f,  0.737852815f,
+   -0.676092704f,  0.736816569f,
+   -0.677222170f,  0.735778589f,
+   -0.678350043f,  0.734738878f,
+   -0.679476320f,  0.733697438f,
+   -0.680600998f,  0.732654272f,
+   -0.681724074f,  0.731609381f,
+   -0.682845546f,  0.730562769f,
+   -0.683965412f,  0.729514438f,
+   -0.685083668f,  0.728464390f,
+   -0.686200312f,  0.727412629f,
+   -0.687315341f,  0.726359155f,
+   -0.688428753f,  0.725303972f,
+   -0.689540545f,  0.724247083f,
+   -0.690650714f,  0.723188489f,
+   -0.691759258f,  0.722128194f,
+   -0.692866175f,  0.721066199f,
+   -0.693971461f,  0.720002508f,
+   -0.695075114f,  0.718937122f,
+   -0.696177131f,  0.717870045f,
+   -0.697277511f,  0.716801279f,
+   -0.698376249f,  0.715730825f,
+   -0.699473345f,  0.714658688f,
+   -0.700568794f,  0.713584869f,
+   -0.701662595f,  0.712509371f,
+   -0.702754744f,  0.711432196f,
+   -0.703845241f,  0.710353347f,
+   -0.704934080f,  0.709272826f,
+   -0.706021261f,  0.708190637f,
+   -0.707106781f,  0.707106781f,
+   -0.708190637f,  0.706021261f,
+   -0.709272826f,  0.704934080f,
+   -0.710353347f,  0.703845241f,
+   -0.711432196f,  0.702754744f,
+   -0.712509371f,  0.701662595f,
+   -0.713584869f,  0.700568794f,
+   -0.714658688f,  0.699473345f,
+   -0.715730825f,  0.698376249f,
+   -0.716801279f,  0.697277511f,
+   -0.717870045f,  0.696177131f,
+   -0.718937122f,  0.695075114f,
+   -0.720002508f,  0.693971461f,
+   -0.721066199f,  0.692866175f,
+   -0.722128194f,  0.691759258f,
+   -0.723188489f,  0.690650714f,
+   -0.724247083f,  0.689540545f,
+   -0.725303972f,  0.688428753f,
+   -0.726359155f,  0.687315341f,
+   -0.727412629f,  0.686200312f,
+   -0.728464390f,  0.685083668f,
+   -0.729514438f,  0.683965412f,
+   -0.730562769f,  0.682845546f,
+   -0.731609381f,  0.681724074f,
+   -0.732654272f,  0.680600998f,
+   -0.733697438f,  0.679476320f,
+   -0.734738878f,  0.678350043f,
+   -0.735778589f,  0.677222170f,
+   -0.736816569f,  0.676092704f,
+   -0.737852815f,  0.674961646f,
+   -0.738887324f,  0.673829000f,
+   -0.739920095f,  0.672694769f,
+   -0.740951125f,  0.671558955f,
+   -0.741980412f,  0.670421560f,
+   -0.743007952f,  0.669282588f,
+   -0.744033744f,  0.668142041f,
+   -0.745057785f,  0.666999922f,
+   -0.746080074f,  0.665856234f,
+   -0.747100606f,  0.664710978f,
+   -0.748119380f,  0.663564159f,
+   -0.749136395f,  0.662415778f,
+   -0.750151646f,  0.661265838f,
+   -0.751165132f,  0.660114342f,
+   -0.752176850f,  0.658961293f,
+   -0.753186799f,  0.657806693f,
+   -0.754194975f,  0.656650546f,
+   -0.755201377f,  0.655492853f,
+   -0.756206001f,  0.654333618f,
+   -0.757208847f,  0.653172843f,
+   -0.758209910f,  0.652010531f,
+   -0.759209189f,  0.650846685f,
+   -0.760206682f,  0.649681307f,
+   -0.761202385f,  0.648514401f,
+   -0.762196298f,  0.647345969f,
+   -0.763188417f,  0.646176013f,
+   -0.764178741f,  0.645004537f,
+   -0.765167266f,  0.643831543f,
+   -0.766153990f,  0.642657034f,
+   -0.767138912f,  0.641481013f,
+   -0.768122029f,  0.640303482f,
+   -0.769103338f,  0.639124445f,
+   -0.770082837f,  0.637943904f,
+   -0.771060524f,  0.636761861f,
+   -0.772036397f,  0.635578320f,
+   -0.773010453f,  0.634393284f,
+   -0.773982691f,  0.633206755f,
+   -0.774953107f,  0.632018736f,
+   -0.775921699f,  0.630829230f,
+   -0.776888466f,  0.629638239f,
+   -0.777853404f,  0.628445767f,
+   -0.778816512f,  0.627251815f,
+   -0.779777788f,  0.626056388f,
+   -0.780737229f,  0.624859488f,
+   -0.781694832f,  0.623661118f,
+   -0.782650596f,  0.622461279f,
+   -0.783604519f,  0.621259977f,
+   -0.784556597f,  0.620057212f,
+   -0.785506830f,  0.618852988f,
+   -0.786455214f,  0.617647308f,
+   -0.787401747f,  0.616440175f,
+   -0.788346428f,  0.615231591f,
+   -0.789289253f,  0.614021559f,
+   -0.790230221f,  0.612810082f,
+   -0.791169330f,  0.611597164f,
+   -0.792106577f,  0.610382806f,
+   -0.793041960f,  0.609167012f,
+   -0.793975478f,  0.607949785f,
+   -0.794907126f,  0.606731127f,
+   -0.795836905f,  0.605511041f,
+   -0.796764810f,  0.604289531f,
+   -0.797690841f,  0.603066599f,
+   -0.798614995f,  0.601842247f,
+   -0.799537269f,  0.600616479f,
+   -0.800457662f,  0.599389298f,
+   -0.801376172f,  0.598160707f,
+   -0.802292796f,  0.596930708f,
+   -0.803207531f,  0.595699304f,
+   -0.804120377f,  0.594466499f,
+   -0.805031331f,  0.593232295f,
+   -0.805940391f,  0.591996695f,
+   -0.806847554f,  0.590759702f,
+   -0.807752818f,  0.589521319f,
+   -0.808656182f,  0.588281548f,
+   -0.809557642f,  0.587040394f,
+   -0.810457198f,  0.585797857f,
+   -0.811354847f,  0.584553943f,
+   -0.812250587f,  0.583308653f,
+   -0.813144415f,  0.582061990f,
+   -0.814036330f,  0.580813958f,
+   -0.814926329f,  0.579564559f,
+   -0.815814411f,  0.578313796f,
+   -0.816700573f,  0.577061673f,
+   -0.817584813f,  0.575808191f,
+   -0.818467130f,  0.574553355f,
+   -0.819347520f,  0.573297167f,
+   -0.820225983f,  0.572039629f,
+   -0.821102515f,  0.570780746f,
+   -0.821977115f,  0.569520519f,
+   -0.822849781f,  0.568258953f,
+   -0.823720511f,  0.566996049f,
+   -0.824589303f,  0.565731811f,
+   -0.825456154f,  0.564466242f,
+   -0.826321063f,  0.563199344f,
+   -0.827184027f,  0.561931121f,
+   -0.828045045f,  0.560661576f,
+   -0.828904115f,  0.559390712f,
+   -0.829761234f,  0.558118531f,
+   -0.830616400f,  0.556845037f,
+   -0.831469612f,  0.555570233f,
+   -0.832320868f,  0.554294121f,
+   -0.833170165f,  0.553016706f,
+   -0.834017501f,  0.551737988f,
+   -0.834862875f,  0.550457973f,
+   -0.835706284f,  0.549176662f,
+   -0.836547727f,  0.547894059f,
+   -0.837387202f,  0.546610167f,
+   -0.838224706f,  0.545324988f,
+   -0.839060237f,  0.544038527f,
+   -0.839893794f,  0.542750785f,
+   -0.840725375f,  0.541461766f,
+   -0.841554977f,  0.540171473f,
+   -0.842382600f,  0.538879909f,
+   -0.843208240f,  0.537587076f,
+   -0.844031895f,  0.536292979f,
+   -0.844853565f,  0.534997620f,
+   -0.845673247f,  0.533701002f,
+   -0.846490939f,  0.532403128f,
+   -0.847306639f,  0.531104001f,
+   -0.848120345f,  0.529803625f,
+   -0.848932055f,  0.528502002f,
+   -0.849741768f,  0.527199135f,
+   -0.850549481f,  0.525895027f,
+   -0.851355193f,  0.524589683f,
+   -0.852158902f,  0.523283103f,
+   -0.852960605f,  0.521975293f,
+   -0.853760301f,  0.520666254f,
+   -0.854557988f,  0.519355990f,
+   -0.855353665f,  0.518044504f,
+   -0.856147328f,  0.516731799f,
+   -0.856938977f,  0.515417878f,
+   -0.857728610f,  0.514102744f,
+   -0.858516224f,  0.512786401f,
+   -0.859301818f,  0.511468850f,
+   -0.860085390f,  0.510150097f,
+   -0.860866939f,  0.508830143f,
+   -0.861646461f,  0.507508991f,
+   -0.862423956f,  0.506186645f,
+   -0.863199422f,  0.504863109f,
+   -0.863972856f,  0.503538384f,
+   -0.864744258f,  0.502212474f,
+   -0.865513624f,  0.500885383f,
+   -0.866280954f,  0.499557113f,
+   -0.867046246f,  0.498227667f,
+   -0.867809497f,  0.496897049f,
+   -0.868570706f,  0.495565262f,
+   -0.869329871f,  0.494232309f,
+   -0.870086991f,  0.492898192f,
+   -0.870842063f,  0.491562916f,
+   -0.871595087f,  0.490226483f,
+   -0.872346059f,  0.488888897f,
+   -0.873094978f,  0.487550160f,
+   -0.873841843f,  0.486210276f,
+   -0.874586652f,  0.484869248f,
+   -0.875329403f,  0.483527079f,
+   -0.876070094f,  0.482183772f,
+   -0.876808724f,  0.480839331f,
+   -0.877545290f,  0.479493758f,
+   -0.878279792f,  0.478147056f,
+   -0.879012226f,  0.476799230f,
+   -0.879742593f,  0.475450282f,
+   -0.880470889f,  0.474100215f,
+   -0.881197113f,  0.472749032f,
+   -0.881921264f,  0.471396737f,
+   -0.882643340f,  0.470043332f,
+   -0.883363339f,  0.468688822f,
+   -0.884081259f,  0.467333209f,
+   -0.884797098f,  0.465976496f,
+   -0.885510856f,  0.464618686f,
+   -0.886222530f,  0.463259784f,
+   -0.886932119f,  0.461899791f,
+   -0.887639620f,  0.460538711f,
+   -0.888345033f,  0.459176548f,
+   -0.889048356f,  0.457813304f,
+   -0.889749586f,  0.456448982f,
+   -0.890448723f,  0.455083587f,
+   -0.891145765f,  0.453717121f,
+   -0.891840709f,  0.452349587f,
+   -0.892533555f,  0.450980989f,
+   -0.893224301f,  0.449611330f,
+   -0.893912945f,  0.448240612f,
+   -0.894599486f,  0.446868840f,
+   -0.895283921f,  0.445496017f,
+   -0.895966250f,  0.444122145f,
+   -0.896646470f,  0.442747228f,
+   -0.897324581f,  0.441371269f,
+   -0.898000580f,  0.439994271f,
+   -0.898674466f,  0.438616239f,
+   -0.899346237f,  0.437237174f,
+   -0.900015892f,  0.435857080f,
+   -0.900683429f,  0.434475961f,
+   -0.901348847f,  0.433093819f,
+   -0.902012144f,  0.431710658f,
+   -0.902673318f,  0.430326481f,
+   -0.903332368f,  0.428941292f,
+   -0.903989293f,  0.427555093f,
+   -0.904644091f,  0.426167889f,
+   -0.905296759f,  0.424779681f,
+   -0.905947298f,  0.423390474f,
+   -0.906595705f,  0.422000271f,
+   -0.907241978f,  0.420609074f,
+   -0.907886116f,  0.419216888f,
+   -0.908528119f,  0.417823716f,
+   -0.909167983f,  0.416429560f,
+   -0.909805708f,  0.415034424f,
+   -0.910441292f,  0.413638312f,
+   -0.911074734f,  0.412241227f,
+   -0.911706032f,  0.410843171f,
+   -0.912335185f,  0.409444149f,
+   -0.912962190f,  0.408044163f,
+   -0.913587048f,  0.406643217f,
+   -0.914209756f,  0.405241314f,
+   -0.914830312f,  0.403838458f,
+   -0.915448716f,  0.402434651f,
+   -0.916064966f,  0.401029897f,
+   -0.916679060f,  0.399624200f,
+   -0.917290997f,  0.398217562f,
+   -0.917900776f,  0.396809987f,
+   -0.918508394f,  0.395401479f,
+   -0.919113852f,  0.393992040f,
+   -0.919717146f,  0.392581674f,
+   -0.920318277f,  0.391170384f,
+   -0.920917242f,  0.389758174f,
+   -0.921514039f,  0.388345047f,
+   -0.922108669f,  0.386931006f,
+   -0.922701128f,  0.385516054f,
+   -0.923291417f,  0.384100195f,
+   -0.923879533f,  0.382683432f,
+   -0.924465474f,  0.381265769f,
+   -0.925049241f,  0.379847209f,
+   -0.925630831f,  0.378427755f,
+   -0.926210242f,  0.377007410f,
+   -0.926787474f,  0.375586178f,
+   -0.927362526f,  0.374164063f,
+   -0.927935395f,  0.372741067f,
+   -0.928506080f,  0.371317194f,
+   -0.929074581f,  0.369892447f,
+   -0.929640896f,  0.368466830f,
+   -0.930205023f,  0.367040346f,
+   -0.930766961f,  0.365612998f,
+   -0.931326709f,  0.364184790f,
+   -0.931884266f,  0.362755724f,
+   -0.932439629f,  0.361325806f,
+   -0.932992799f,  0.359895037f,
+   -0.933543773f,  0.358463421f,
+   -0.934092550f,  0.357030961f,
+   -0.934639130f,  0.355597662f,
+   -0.935183510f,  0.354163525f,
+   -0.935725689f,  0.352728556f,
+   -0.936265667f,  0.351292756f,
+   -0.936803442f,  0.349856130f,
+   -0.937339012f,  0.348418680f,
+   -0.937872376f,  0.346980411f,
+   -0.938403534f,  0.345541325f,
+   -0.938932484f,  0.344101426f,
+   -0.939459224f,  0.342660717f,
+   -0.939983753f,  0.341219202f,
+   -0.940506071f,  0.339776884f,
+   -0.941026175f,  0.338333767f,
+   -0.941544065f,  0.336889853f,
+   -0.942059740f,  0.335445147f,
+   -0.942573198f,  0.333999651f,
+   -0.943084437f,  0.332553370f,
+   -0.943593458f,  0.331106306f,
+   -0.944100258f,  0.329658463f,
+   -0.944604837f,  0.328209844f,
+   -0.945107193f,  0.326760452f,
+   -0.945607325f,  0.325310292f,
+   -0.946105232f,  0.323859367f,
+   -0.946600913f,  0.322407679f,
+   -0.947094366f,  0.320955232f,
+   -0.947585591f,  0.319502031f,
+   -0.948074586f,  0.318048077f,
+   -0.948561350f,  0.316593376f,
+   -0.949045882f,  0.315137929f,
+   -0.949528181f,  0.313681740f,
+   -0.950008245f,  0.312224814f,
+   -0.950486074f,  0.310767153f,
+   -0.950961666f,  0.309308760f,
+   -0.951435021f,  0.307849640f,
+   -0.951906137f,  0.306389795f,
+   -0.952375013f,  0.304929230f,
+   -0.952841648f,  0.303467947f,
+   -0.953306040f,  0.302005949f,
+   -0.953768190f,  0.300543241f,
+   -0.954228095f,  0.299079826f,
+   -0.954685755f,  0.297615707f,
+   -0.955141168f,  0.296150888f,
+   -0.955594334f,  0.294685372f,
+   -0.956045251f,  0.293219163f,
+   -0.956493919f,  0.291752263f,
+   -0.956940336f,  0.290284677f,
+   -0.957384501f,  0.288816408f,
+   -0.957826413f,  0.287347460f,
+   -0.958266071f,  0.285877835f,
+   -0.958703475f,  0.284407537f,
+   -0.959138622f,  0.282936570f,
+   -0.959571513f,  0.281464938f,
+   -0.960002146f,  0.279992643f,
+   -0.960430519f,  0.278519689f,
+   -0.960856633f,  0.277046080f,
+   -0.961280486f,  0.275571819f,
+   -0.961702077f,  0.274096910f,
+   -0.962121404f,  0.272621355f,
+   -0.962538468f,  0.271145160f,
+   -0.962953267f,  0.269668326f,
+   -0.963365800f,  0.268190857f,
+   -0.963776066f,  0.266712757f,
+   -0.964184064f,  0.265234030f,
+   -0.964589793f,  0.263754679f,
+   -0.964993253f,  0.262274707f,
+   -0.965394442f,  0.260794118f,
+   -0.965793359f,  0.259312915f,
+   -0.966190003f,  0.257831102f,
+   -0.966584374f,  0.256348682f,
+   -0.966976471f,  0.254865660f,
+   -0.967366292f,  0.253382037f,
+   -0.967753837f,  0.251897818f,
+   -0.968139105f,  0.250413007f,
+   -0.968522094f,  0.248927606f,
+   -0.968902805f,  0.247441619f,
+   -0.969281235f,  0.245955050f,
+   -0.969657385f,  0.244467903f,
+   -0.970031253f,  0.242980180f,
+   -0.970402839f,  0.241491885f,
+   -0.970772141f,  0.240003022f,
+   -0.971139158f,  0.238513595f,
+   -0.971503891f,  0.237023606f,
+   -0.971866337f,  0.235533059f,
+   -0.972226497f,  0.234041959f,
+   -0.972584369f,  0.232550307f,
+   -0.972939952f,  0.231058108f,
+   -0.973293246f,  0.229565366f,
+   -0.973644250f,  0.228072083f,
+   -0.973992962f,  0.226578264f,
+   -0.974339383f,  0.225083911f,
+   -0.974683511f,  0.223589029f,
+   -0.975025345f,  0.222093621f,
+   -0.975364885f,  0.220597690f,
+   -0.975702130f,  0.219101240f,
+   -0.976037079f,  0.217604275f,
+   -0.976369731f,  0.216106797f,
+   -0.976700086f,  0.214608811f,
+   -0.977028143f,  0.213110320f,
+   -0.977353900f,  0.211611327f,
+   -0.977677358f,  0.210111837f,
+   -0.977998515f,  0.208611852f,
+   -0.978317371f,  0.207111376f,
+   -0.978633924f,  0.205610413f,
+   -0.978948175f,  0.204108966f,
+   -0.979260123f,  0.202607039f,
+   -0.979569766f,  0.201104635f,
+   -0.979877104f,  0.199601758f,
+   -0.980182136f,  0.198098411f,
+   -0.980484862f,  0.196594598f,
+   -0.980785280f,  0.195090322f,
+   -0.981083391f,  0.193585587f,
+   -0.981379193f,  0.192080397f,
+   -0.981672686f,  0.190574755f,
+   -0.981963869f,  0.189068664f,
+   -0.982252741f,  0.187562129f,
+   -0.982539302f,  0.186055152f,
+   -0.982823551f,  0.184547737f,
+   -0.983105487f,  0.183039888f,
+   -0.983385110f,  0.181531608f,
+   -0.983662419f,  0.180022901f,
+   -0.983937413f,  0.178513771f,
+   -0.984210092f,  0.177004220f,
+   -0.984480455f,  0.175494253f,
+   -0.984748502f,  0.173983873f,
+   -0.985014231f,  0.172473084f,
+   -0.985277642f,  0.170961889f,
+   -0.985538735f,  0.169450291f,
+   -0.985797509f,  0.167938295f,
+   -0.986053963f,  0.166425904f,
+   -0.986308097f,  0.164913120f,
+   -0.986559910f,  0.163399949f,
+   -0.986809402f,  0.161886394f,
+   -0.987056571f,  0.160372457f,
+   -0.987301418f,  0.158858143f,
+   -0.987543942f,  0.157343456f,
+   -0.987784142f,  0.155828398f,
+   -0.988022017f,  0.154312973f,
+   -0.988257568f,  0.152797185f,
+   -0.988490793f,  0.151281038f,
+   -0.988721692f,  0.149764535f,
+   -0.988950265f,  0.148247679f,
+   -0.989176510f,  0.146730474f,
+   -0.989400428f,  0.145212925f,
+   -0.989622017f,  0.143695033f,
+   -0.989841278f,  0.142176804f,
+   -0.990058210f,  0.140658239f,
+   -0.990272812f,  0.139139344f,
+   -0.990485084f,  0.137620122f,
+   -0.990695025f,  0.136100575f,
+   -0.990902635f,  0.134580709f,
+   -0.991107914f,  0.133060525f,
+   -0.991310860f,  0.131540029f,
+   -0.991511473f,  0.130019223f,
+   -0.991709754f,  0.128498111f,
+   -0.991905700f,  0.126976696f,
+   -0.992099313f,  0.125454983f,
+   -0.992290591f,  0.123932975f,
+   -0.992479535f,  0.122410675f,
+   -0.992666142f,  0.120888087f,
+   -0.992850414f,  0.119365215f,
+   -0.993032350f,  0.117842062f,
+   -0.993211949f,  0.116318631f,
+   -0.993389211f,  0.114794927f,
+   -0.993564136f,  0.113270952f,
+   -0.993736722f,  0.111746711f,
+   -0.993906970f,  0.110222207f,
+   -0.994074879f,  0.108697444f,
+   -0.994240449f,  0.107172425f,
+   -0.994403680f,  0.105647154f,
+   -0.994564571f,  0.104121634f,
+   -0.994723121f,  0.102595869f,
+   -0.994879331f,  0.101069863f,
+   -0.995033199f,  0.099543619f,
+   -0.995184727f,  0.098017140f,
+   -0.995333912f,  0.096490431f,
+   -0.995480755f,  0.094963495f,
+   -0.995625256f,  0.093436336f,
+   -0.995767414f,  0.091908956f,
+   -0.995907229f,  0.090381361f,
+   -0.996044701f,  0.088853553f,
+   -0.996179829f,  0.087325535f,
+   -0.996312612f,  0.085797312f,
+   -0.996443051f,  0.084268888f,
+   -0.996571146f,  0.082740265f,
+   -0.996696895f,  0.081211447f,
+   -0.996820299f,  0.079682438f,
+   -0.996941358f,  0.078153242f,
+   -0.997060070f,  0.076623861f,
+   -0.997176437f,  0.075094301f,
+   -0.997290457f,  0.073564564f,
+   -0.997402130f,  0.072034653f,
+   -0.997511456f,  0.070504573f,
+   -0.997618435f,  0.068974328f,
+   -0.997723067f,  0.067443920f,
+   -0.997825350f,  0.065913353f,
+   -0.997925286f,  0.064382631f,
+   -0.998022874f,  0.062851758f,
+   -0.998118113f,  0.061320736f,
+   -0.998211003f,  0.059789571f,
+   -0.998301545f,  0.058258265f,
+   -0.998389737f,  0.056726821f,
+   -0.998475581f,  0.055195244f,
+   -0.998559074f,  0.053663538f,
+   -0.998640218f,  0.052131705f,
+   -0.998719012f,  0.050599749f,
+   -0.998795456f,  0.049067674f,
+   -0.998869550f,  0.047535484f,
+   -0.998941293f,  0.046003182f,
+   -0.999010686f,  0.044470772f,
+   -0.999077728f,  0.042938257f,
+   -0.999142419f,  0.041405641f,
+   -0.999204759f,  0.039872928f,
+   -0.999264747f,  0.038340120f,
+   -0.999322385f,  0.036807223f,
+   -0.999377670f,  0.035274239f,
+   -0.999430605f,  0.033741172f,
+   -0.999481187f,  0.032208025f,
+   -0.999529418f,  0.030674803f,
+   -0.999575296f,  0.029141509f,
+   -0.999618822f,  0.027608146f,
+   -0.999659997f,  0.026074718f,
+   -0.999698819f,  0.024541229f,
+   -0.999735288f,  0.023007681f,
+   -0.999769405f,  0.021474080f,
+   -0.999801170f,  0.019940429f,
+   -0.999830582f,  0.018406730f,
+   -0.999857641f,  0.016872988f,
+   -0.999882347f,  0.015339206f,
+   -0.999904701f,  0.013805389f,
+   -0.999924702f,  0.012271538f,
+   -0.999942350f,  0.010737659f,
+   -0.999957645f,  0.009203755f,
+   -0.999970586f,  0.007669829f,
+   -0.999981175f,  0.006135885f,
+   -0.999989411f,  0.004601926f,
+   -0.999995294f,  0.003067957f,
+   -0.999998823f,  0.001533980f,
+   -1.000000000f,  0.000000000f,
+   -0.999998823f, -0.001533980f,
+   -0.999995294f, -0.003067957f,
+   -0.999989411f, -0.004601926f,
+   -0.999981175f, -0.006135885f,
+   -0.999970586f, -0.007669829f,
+   -0.999957645f, -0.009203755f,
+   -0.999942350f, -0.010737659f,
+   -0.999924702f, -0.012271538f,
+   -0.999904701f, -0.013805389f,
+   -0.999882347f, -0.015339206f,
+   -0.999857641f, -0.016872988f,
+   -0.999830582f, -0.018406730f,
+   -0.999801170f, -0.019940429f,
+   -0.999769405f, -0.021474080f,
+   -0.999735288f, -0.023007681f,
+   -0.999698819f, -0.024541229f,
+   -0.999659997f, -0.026074718f,
+   -0.999618822f, -0.027608146f,
+   -0.999575296f, -0.029141509f,
+   -0.999529418f, -0.030674803f,
+   -0.999481187f, -0.032208025f,
+   -0.999430605f, -0.033741172f,
+   -0.999377670f, -0.035274239f,
+   -0.999322385f, -0.036807223f,
+   -0.999264747f, -0.038340120f,
+   -0.999204759f, -0.039872928f,
+   -0.999142419f, -0.041405641f,
+   -0.999077728f, -0.042938257f,
+   -0.999010686f, -0.044470772f,
+   -0.998941293f, -0.046003182f,
+   -0.998869550f, -0.047535484f,
+   -0.998795456f, -0.049067674f,
+   -0.998719012f, -0.050599749f,
+   -0.998640218f, -0.052131705f,
+   -0.998559074f, -0.053663538f,
+   -0.998475581f, -0.055195244f,
+   -0.998389737f, -0.056726821f,
+   -0.998301545f, -0.058258265f,
+   -0.998211003f, -0.059789571f,
+   -0.998118113f, -0.061320736f,
+   -0.998022874f, -0.062851758f,
+   -0.997925286f, -0.064382631f,
+   -0.997825350f, -0.065913353f,
+   -0.997723067f, -0.067443920f,
+   -0.997618435f, -0.068974328f,
+   -0.997511456f, -0.070504573f,
+   -0.997402130f, -0.072034653f,
+   -0.997290457f, -0.073564564f,
+   -0.997176437f, -0.075094301f,
+   -0.997060070f, -0.076623861f,
+   -0.996941358f, -0.078153242f,
+   -0.996820299f, -0.079682438f,
+   -0.996696895f, -0.081211447f,
+   -0.996571146f, -0.082740265f,
+   -0.996443051f, -0.084268888f,
+   -0.996312612f, -0.085797312f,
+   -0.996179829f, -0.087325535f,
+   -0.996044701f, -0.088853553f,
+   -0.995907229f, -0.090381361f,
+   -0.995767414f, -0.091908956f,
+   -0.995625256f, -0.093436336f,
+   -0.995480755f, -0.094963495f,
+   -0.995333912f, -0.096490431f,
+   -0.995184727f, -0.098017140f,
+   -0.995033199f, -0.099543619f,
+   -0.994879331f, -0.101069863f,
+   -0.994723121f, -0.102595869f,
+   -0.994564571f, -0.104121634f,
+   -0.994403680f, -0.105647154f,
+   -0.994240449f, -0.107172425f,
+   -0.994074879f, -0.108697444f,
+   -0.993906970f, -0.110222207f,
+   -0.993736722f, -0.111746711f,
+   -0.993564136f, -0.113270952f,
+   -0.993389211f, -0.114794927f,
+   -0.993211949f, -0.116318631f,
+   -0.993032350f, -0.117842062f,
+   -0.992850414f, -0.119365215f,
+   -0.992666142f, -0.120888087f,
+   -0.992479535f, -0.122410675f,
+   -0.992290591f, -0.123932975f,
+   -0.992099313f, -0.125454983f,
+   -0.991905700f, -0.126976696f,
+   -0.991709754f, -0.128498111f,
+   -0.991511473f, -0.130019223f,
+   -0.991310860f, -0.131540029f,
+   -0.991107914f, -0.133060525f,
+   -0.990902635f, -0.134580709f,
+   -0.990695025f, -0.136100575f,
+   -0.990485084f, -0.137620122f,
+   -0.990272812f, -0.139139344f,
+   -0.990058210f, -0.140658239f,
+   -0.989841278f, -0.142176804f,
+   -0.989622017f, -0.143695033f,
+   -0.989400428f, -0.145212925f,
+   -0.989176510f, -0.146730474f,
+   -0.988950265f, -0.148247679f,
+   -0.988721692f, -0.149764535f,
+   -0.988490793f, -0.151281038f,
+   -0.988257568f, -0.152797185f,
+   -0.988022017f, -0.154312973f,
+   -0.987784142f, -0.155828398f,
+   -0.987543942f, -0.157343456f,
+   -0.987301418f, -0.158858143f,
+   -0.987056571f, -0.160372457f,
+   -0.986809402f, -0.161886394f,
+   -0.986559910f, -0.163399949f,
+   -0.986308097f, -0.164913120f,
+   -0.986053963f, -0.166425904f,
+   -0.985797509f, -0.167938295f,
+   -0.985538735f, -0.169450291f,
+   -0.985277642f, -0.170961889f,
+   -0.985014231f, -0.172473084f,
+   -0.984748502f, -0.173983873f,
+   -0.984480455f, -0.175494253f,
+   -0.984210092f, -0.177004220f,
+   -0.983937413f, -0.178513771f,
+   -0.983662419f, -0.180022901f,
+   -0.983385110f, -0.181531608f,
+   -0.983105487f, -0.183039888f,
+   -0.982823551f, -0.184547737f,
+   -0.982539302f, -0.186055152f,
+   -0.982252741f, -0.187562129f,
+   -0.981963869f, -0.189068664f,
+   -0.981672686f, -0.190574755f,
+   -0.981379193f, -0.192080397f,
+   -0.981083391f, -0.193585587f,
+   -0.980785280f, -0.195090322f,
+   -0.980484862f, -0.196594598f,
+   -0.980182136f, -0.198098411f,
+   -0.979877104f, -0.199601758f,
+   -0.979569766f, -0.201104635f,
+   -0.979260123f, -0.202607039f,
+   -0.978948175f, -0.204108966f,
+   -0.978633924f, -0.205610413f,
+   -0.978317371f, -0.207111376f,
+   -0.977998515f, -0.208611852f,
+   -0.977677358f, -0.210111837f,
+   -0.977353900f, -0.211611327f,
+   -0.977028143f, -0.213110320f,
+   -0.976700086f, -0.214608811f,
+   -0.976369731f, -0.216106797f,
+   -0.976037079f, -0.217604275f,
+   -0.975702130f, -0.219101240f,
+   -0.975364885f, -0.220597690f,
+   -0.975025345f, -0.222093621f,
+   -0.974683511f, -0.223589029f,
+   -0.974339383f, -0.225083911f,
+   -0.973992962f, -0.226578264f,
+   -0.973644250f, -0.228072083f,
+   -0.973293246f, -0.229565366f,
+   -0.972939952f, -0.231058108f,
+   -0.972584369f, -0.232550307f,
+   -0.972226497f, -0.234041959f,
+   -0.971866337f, -0.235533059f,
+   -0.971503891f, -0.237023606f,
+   -0.971139158f, -0.238513595f,
+   -0.970772141f, -0.240003022f,
+   -0.970402839f, -0.241491885f,
+   -0.970031253f, -0.242980180f,
+   -0.969657385f, -0.244467903f,
+   -0.969281235f, -0.245955050f,
+   -0.968902805f, -0.247441619f,
+   -0.968522094f, -0.248927606f,
+   -0.968139105f, -0.250413007f,
+   -0.967753837f, -0.251897818f,
+   -0.967366292f, -0.253382037f,
+   -0.966976471f, -0.254865660f,
+   -0.966584374f, -0.256348682f,
+   -0.966190003f, -0.257831102f,
+   -0.965793359f, -0.259312915f,
+   -0.965394442f, -0.260794118f,
+   -0.964993253f, -0.262274707f,
+   -0.964589793f, -0.263754679f,
+   -0.964184064f, -0.265234030f,
+   -0.963776066f, -0.266712757f,
+   -0.963365800f, -0.268190857f,
+   -0.962953267f, -0.269668326f,
+   -0.962538468f, -0.271145160f,
+   -0.962121404f, -0.272621355f,
+   -0.961702077f, -0.274096910f,
+   -0.961280486f, -0.275571819f,
+   -0.960856633f, -0.277046080f,
+   -0.960430519f, -0.278519689f,
+   -0.960002146f, -0.279992643f,
+   -0.959571513f, -0.281464938f,
+   -0.959138622f, -0.282936570f,
+   -0.958703475f, -0.284407537f,
+   -0.958266071f, -0.285877835f,
+   -0.957826413f, -0.287347460f,
+   -0.957384501f, -0.288816408f,
+   -0.956940336f, -0.290284677f,
+   -0.956493919f, -0.291752263f,
+   -0.956045251f, -0.293219163f,
+   -0.955594334f, -0.294685372f,
+   -0.955141168f, -0.296150888f,
+   -0.954685755f, -0.297615707f,
+   -0.954228095f, -0.299079826f,
+   -0.953768190f, -0.300543241f,
+   -0.953306040f, -0.302005949f,
+   -0.952841648f, -0.303467947f,
+   -0.952375013f, -0.304929230f,
+   -0.951906137f, -0.306389795f,
+   -0.951435021f, -0.307849640f,
+   -0.950961666f, -0.309308760f,
+   -0.950486074f, -0.310767153f,
+   -0.950008245f, -0.312224814f,
+   -0.949528181f, -0.313681740f,
+   -0.949045882f, -0.315137929f,
+   -0.948561350f, -0.316593376f,
+   -0.948074586f, -0.318048077f,
+   -0.947585591f, -0.319502031f,
+   -0.947094366f, -0.320955232f,
+   -0.946600913f, -0.322407679f,
+   -0.946105232f, -0.323859367f,
+   -0.945607325f, -0.325310292f,
+   -0.945107193f, -0.326760452f,
+   -0.944604837f, -0.328209844f,
+   -0.944100258f, -0.329658463f,
+   -0.943593458f, -0.331106306f,
+   -0.943084437f, -0.332553370f,
+   -0.942573198f, -0.333999651f,
+   -0.942059740f, -0.335445147f,
+   -0.941544065f, -0.336889853f,
+   -0.941026175f, -0.338333767f,
+   -0.940506071f, -0.339776884f,
+   -0.939983753f, -0.341219202f,
+   -0.939459224f, -0.342660717f,
+   -0.938932484f, -0.344101426f,
+   -0.938403534f, -0.345541325f,
+   -0.937872376f, -0.346980411f,
+   -0.937339012f, -0.348418680f,
+   -0.936803442f, -0.349856130f,
+   -0.936265667f, -0.351292756f,
+   -0.935725689f, -0.352728556f,
+   -0.935183510f, -0.354163525f,
+   -0.934639130f, -0.355597662f,
+   -0.934092550f, -0.357030961f,
+   -0.933543773f, -0.358463421f,
+   -0.932992799f, -0.359895037f,
+   -0.932439629f, -0.361325806f,
+   -0.931884266f, -0.362755724f,
+   -0.931326709f, -0.364184790f,
+   -0.930766961f, -0.365612998f,
+   -0.930205023f, -0.367040346f,
+   -0.929640896f, -0.368466830f,
+   -0.929074581f, -0.369892447f,
+   -0.928506080f, -0.371317194f,
+   -0.927935395f, -0.372741067f,
+   -0.927362526f, -0.374164063f,
+   -0.926787474f, -0.375586178f,
+   -0.926210242f, -0.377007410f,
+   -0.925630831f, -0.378427755f,
+   -0.925049241f, -0.379847209f,
+   -0.924465474f, -0.381265769f,
+   -0.923879533f, -0.382683432f,
+   -0.923291417f, -0.384100195f,
+   -0.922701128f, -0.385516054f,
+   -0.922108669f, -0.386931006f,
+   -0.921514039f, -0.388345047f,
+   -0.920917242f, -0.389758174f,
+   -0.920318277f, -0.391170384f,
+   -0.919717146f, -0.392581674f,
+   -0.919113852f, -0.393992040f,
+   -0.918508394f, -0.395401479f,
+   -0.917900776f, -0.396809987f,
+   -0.917290997f, -0.398217562f,
+   -0.916679060f, -0.399624200f,
+   -0.916064966f, -0.401029897f,
+   -0.915448716f, -0.402434651f,
+   -0.914830312f, -0.403838458f,
+   -0.914209756f, -0.405241314f,
+   -0.913587048f, -0.406643217f,
+   -0.912962190f, -0.408044163f,
+   -0.912335185f, -0.409444149f,
+   -0.911706032f, -0.410843171f,
+   -0.911074734f, -0.412241227f,
+   -0.910441292f, -0.413638312f,
+   -0.909805708f, -0.415034424f,
+   -0.909167983f, -0.416429560f,
+   -0.908528119f, -0.417823716f,
+   -0.907886116f, -0.419216888f,
+   -0.907241978f, -0.420609074f,
+   -0.906595705f, -0.422000271f,
+   -0.905947298f, -0.423390474f,
+   -0.905296759f, -0.424779681f,
+   -0.904644091f, -0.426167889f,
+   -0.903989293f, -0.427555093f,
+   -0.903332368f, -0.428941292f,
+   -0.902673318f, -0.430326481f,
+   -0.902012144f, -0.431710658f,
+   -0.901348847f, -0.433093819f,
+   -0.900683429f, -0.434475961f,
+   -0.900015892f, -0.435857080f,
+   -0.899346237f, -0.437237174f,
+   -0.898674466f, -0.438616239f,
+   -0.898000580f, -0.439994271f,
+   -0.897324581f, -0.441371269f,
+   -0.896646470f, -0.442747228f,
+   -0.895966250f, -0.444122145f,
+   -0.895283921f, -0.445496017f,
+   -0.894599486f, -0.446868840f,
+   -0.893912945f, -0.448240612f,
+   -0.893224301f, -0.449611330f,
+   -0.892533555f, -0.450980989f,
+   -0.891840709f, -0.452349587f,
+   -0.891145765f, -0.453717121f,
+   -0.890448723f, -0.455083587f,
+   -0.889749586f, -0.456448982f,
+   -0.889048356f, -0.457813304f,
+   -0.888345033f, -0.459176548f,
+   -0.887639620f, -0.460538711f,
+   -0.886932119f, -0.461899791f,
+   -0.886222530f, -0.463259784f,
+   -0.885510856f, -0.464618686f,
+   -0.884797098f, -0.465976496f,
+   -0.884081259f, -0.467333209f,
+   -0.883363339f, -0.468688822f,
+   -0.882643340f, -0.470043332f,
+   -0.881921264f, -0.471396737f,
+   -0.881197113f, -0.472749032f,
+   -0.880470889f, -0.474100215f,
+   -0.879742593f, -0.475450282f,
+   -0.879012226f, -0.476799230f,
+   -0.878279792f, -0.478147056f,
+   -0.877545290f, -0.479493758f,
+   -0.876808724f, -0.480839331f,
+   -0.876070094f, -0.482183772f,
+   -0.875329403f, -0.483527079f,
+   -0.874586652f, -0.484869248f,
+   -0.873841843f, -0.486210276f,
+   -0.873094978f, -0.487550160f,
+   -0.872346059f, -0.488888897f,
+   -0.871595087f, -0.490226483f,
+   -0.870842063f, -0.491562916f,
+   -0.870086991f, -0.492898192f,
+   -0.869329871f, -0.494232309f,
+   -0.868570706f, -0.495565262f,
+   -0.867809497f, -0.496897049f,
+   -0.867046246f, -0.498227667f,
+   -0.866280954f, -0.499557113f,
+   -0.865513624f, -0.500885383f,
+   -0.864744258f, -0.502212474f,
+   -0.863972856f, -0.503538384f,
+   -0.863199422f, -0.504863109f,
+   -0.862423956f, -0.506186645f,
+   -0.861646461f, -0.507508991f,
+   -0.860866939f, -0.508830143f,
+   -0.860085390f, -0.510150097f,
+   -0.859301818f, -0.511468850f,
+   -0.858516224f, -0.512786401f,
+   -0.857728610f, -0.514102744f,
+   -0.856938977f, -0.515417878f,
+   -0.856147328f, -0.516731799f,
+   -0.855353665f, -0.518044504f,
+   -0.854557988f, -0.519355990f,
+   -0.853760301f, -0.520666254f,
+   -0.852960605f, -0.521975293f,
+   -0.852158902f, -0.523283103f,
+   -0.851355193f, -0.524589683f,
+   -0.850549481f, -0.525895027f,
+   -0.849741768f, -0.527199135f,
+   -0.848932055f, -0.528502002f,
+   -0.848120345f, -0.529803625f,
+   -0.847306639f, -0.531104001f,
+   -0.846490939f, -0.532403128f,
+   -0.845673247f, -0.533701002f,
+   -0.844853565f, -0.534997620f,
+   -0.844031895f, -0.536292979f,
+   -0.843208240f, -0.537587076f,
+   -0.842382600f, -0.538879909f,
+   -0.841554977f, -0.540171473f,
+   -0.840725375f, -0.541461766f,
+   -0.839893794f, -0.542750785f,
+   -0.839060237f, -0.544038527f,
+   -0.838224706f, -0.545324988f,
+   -0.837387202f, -0.546610167f,
+   -0.836547727f, -0.547894059f,
+   -0.835706284f, -0.549176662f,
+   -0.834862875f, -0.550457973f,
+   -0.834017501f, -0.551737988f,
+   -0.833170165f, -0.553016706f,
+   -0.832320868f, -0.554294121f,
+   -0.831469612f, -0.555570233f,
+   -0.830616400f, -0.556845037f,
+   -0.829761234f, -0.558118531f,
+   -0.828904115f, -0.559390712f,
+   -0.828045045f, -0.560661576f,
+   -0.827184027f, -0.561931121f,
+   -0.826321063f, -0.563199344f,
+   -0.825456154f, -0.564466242f,
+   -0.824589303f, -0.565731811f,
+   -0.823720511f, -0.566996049f,
+   -0.822849781f, -0.568258953f,
+   -0.821977115f, -0.569520519f,
+   -0.821102515f, -0.570780746f,
+   -0.820225983f, -0.572039629f,
+   -0.819347520f, -0.573297167f,
+   -0.818467130f, -0.574553355f,
+   -0.817584813f, -0.575808191f,
+   -0.816700573f, -0.577061673f,
+   -0.815814411f, -0.578313796f,
+   -0.814926329f, -0.579564559f,
+   -0.814036330f, -0.580813958f,
+   -0.813144415f, -0.582061990f,
+   -0.812250587f, -0.583308653f,
+   -0.811354847f, -0.584553943f,
+   -0.810457198f, -0.585797857f,
+   -0.809557642f, -0.587040394f,
+   -0.808656182f, -0.588281548f,
+   -0.807752818f, -0.589521319f,
+   -0.806847554f, -0.590759702f,
+   -0.805940391f, -0.591996695f,
+   -0.805031331f, -0.593232295f,
+   -0.804120377f, -0.594466499f,
+   -0.803207531f, -0.595699304f,
+   -0.802292796f, -0.596930708f,
+   -0.801376172f, -0.598160707f,
+   -0.800457662f, -0.599389298f,
+   -0.799537269f, -0.600616479f,
+   -0.798614995f, -0.601842247f,
+   -0.797690841f, -0.603066599f,
+   -0.796764810f, -0.604289531f,
+   -0.795836905f, -0.605511041f,
+   -0.794907126f, -0.606731127f,
+   -0.793975478f, -0.607949785f,
+   -0.793041960f, -0.609167012f,
+   -0.792106577f, -0.610382806f,
+   -0.791169330f, -0.611597164f,
+   -0.790230221f, -0.612810082f,
+   -0.789289253f, -0.614021559f,
+   -0.788346428f, -0.615231591f,
+   -0.787401747f, -0.616440175f,
+   -0.786455214f, -0.617647308f,
+   -0.785506830f, -0.618852988f,
+   -0.784556597f, -0.620057212f,
+   -0.783604519f, -0.621259977f,
+   -0.782650596f, -0.622461279f,
+   -0.781694832f, -0.623661118f,
+   -0.780737229f, -0.624859488f,
+   -0.779777788f, -0.626056388f,
+   -0.778816512f, -0.627251815f,
+   -0.777853404f, -0.628445767f,
+   -0.776888466f, -0.629638239f,
+   -0.775921699f, -0.630829230f,
+   -0.774953107f, -0.632018736f,
+   -0.773982691f, -0.633206755f,
+   -0.773010453f, -0.634393284f,
+   -0.772036397f, -0.635578320f,
+   -0.771060524f, -0.636761861f,
+   -0.770082837f, -0.637943904f,
+   -0.769103338f, -0.639124445f,
+   -0.768122029f, -0.640303482f,
+   -0.767138912f, -0.641481013f,
+   -0.766153990f, -0.642657034f,
+   -0.765167266f, -0.643831543f,
+   -0.764178741f, -0.645004537f,
+   -0.763188417f, -0.646176013f,
+   -0.762196298f, -0.647345969f,
+   -0.761202385f, -0.648514401f,
+   -0.760206682f, -0.649681307f,
+   -0.759209189f, -0.650846685f,
+   -0.758209910f, -0.652010531f,
+   -0.757208847f, -0.653172843f,
+   -0.756206001f, -0.654333618f,
+   -0.755201377f, -0.655492853f,
+   -0.754194975f, -0.656650546f,
+   -0.753186799f, -0.657806693f,
+   -0.752176850f, -0.658961293f,
+   -0.751165132f, -0.660114342f,
+   -0.750151646f, -0.661265838f,
+   -0.749136395f, -0.662415778f,
+   -0.748119380f, -0.663564159f,
+   -0.747100606f, -0.664710978f,
+   -0.746080074f, -0.665856234f,
+   -0.745057785f, -0.666999922f,
+   -0.744033744f, -0.668142041f,
+   -0.743007952f, -0.669282588f,
+   -0.741980412f, -0.670421560f,
+   -0.740951125f, -0.671558955f,
+   -0.739920095f, -0.672694769f,
+   -0.738887324f, -0.673829000f,
+   -0.737852815f, -0.674961646f,
+   -0.736816569f, -0.676092704f,
+   -0.735778589f, -0.677222170f,
+   -0.734738878f, -0.678350043f,
+   -0.733697438f, -0.679476320f,
+   -0.732654272f, -0.680600998f,
+   -0.731609381f, -0.681724074f,
+   -0.730562769f, -0.682845546f,
+   -0.729514438f, -0.683965412f,
+   -0.728464390f, -0.685083668f,
+   -0.727412629f, -0.686200312f,
+   -0.726359155f, -0.687315341f,
+   -0.725303972f, -0.688428753f,
+   -0.724247083f, -0.689540545f,
+   -0.723188489f, -0.690650714f,
+   -0.722128194f, -0.691759258f,
+   -0.721066199f, -0.692866175f,
+   -0.720002508f, -0.693971461f,
+   -0.718937122f, -0.695075114f,
+   -0.717870045f, -0.696177131f,
+   -0.716801279f, -0.697277511f,
+   -0.715730825f, -0.698376249f,
+   -0.714658688f, -0.699473345f,
+   -0.713584869f, -0.700568794f,
+   -0.712509371f, -0.701662595f,
+   -0.711432196f, -0.702754744f,
+   -0.710353347f, -0.703845241f,
+   -0.709272826f, -0.704934080f,
+   -0.708190637f, -0.706021261f,
+   -0.707106781f, -0.707106781f,
+   -0.706021261f, -0.708190637f,
+   -0.704934080f, -0.709272826f,
+   -0.703845241f, -0.710353347f,
+   -0.702754744f, -0.711432196f,
+   -0.701662595f, -0.712509371f,
+   -0.700568794f, -0.713584869f,
+   -0.699473345f, -0.714658688f,
+   -0.698376249f, -0.715730825f,
+   -0.697277511f, -0.716801279f,
+   -0.696177131f, -0.717870045f,
+   -0.695075114f, -0.718937122f,
+   -0.693971461f, -0.720002508f,
+   -0.692866175f, -0.721066199f,
+   -0.691759258f, -0.722128194f,
+   -0.690650714f, -0.723188489f,
+   -0.689540545f, -0.724247083f,
+   -0.688428753f, -0.725303972f,
+   -0.687315341f, -0.726359155f,
+   -0.686200312f, -0.727412629f,
+   -0.685083668f, -0.728464390f,
+   -0.683965412f, -0.729514438f,
+   -0.682845546f, -0.730562769f,
+   -0.681724074f, -0.731609381f,
+   -0.680600998f, -0.732654272f,
+   -0.679476320f, -0.733697438f,
+   -0.678350043f, -0.734738878f,
+   -0.677222170f, -0.735778589f,
+   -0.676092704f, -0.736816569f,
+   -0.674961646f, -0.737852815f,
+   -0.673829000f, -0.738887324f,
+   -0.672694769f, -0.739920095f,
+   -0.671558955f, -0.740951125f,
+   -0.670421560f, -0.741980412f,
+   -0.669282588f, -0.743007952f,
+   -0.668142041f, -0.744033744f,
+   -0.666999922f, -0.745057785f,
+   -0.665856234f, -0.746080074f,
+   -0.664710978f, -0.747100606f,
+   -0.663564159f, -0.748119380f,
+   -0.662415778f, -0.749136395f,
+   -0.661265838f, -0.750151646f,
+   -0.660114342f, -0.751165132f,
+   -0.658961293f, -0.752176850f,
+   -0.657806693f, -0.753186799f,
+   -0.656650546f, -0.754194975f,
+   -0.655492853f, -0.755201377f,
+   -0.654333618f, -0.756206001f,
+   -0.653172843f, -0.757208847f,
+   -0.652010531f, -0.758209910f,
+   -0.650846685f, -0.759209189f,
+   -0.649681307f, -0.760206682f,
+   -0.648514401f, -0.761202385f,
+   -0.647345969f, -0.762196298f,
+   -0.646176013f, -0.763188417f,
+   -0.645004537f, -0.764178741f,
+   -0.643831543f, -0.765167266f,
+   -0.642657034f, -0.766153990f,
+   -0.641481013f, -0.767138912f,
+   -0.640303482f, -0.768122029f,
+   -0.639124445f, -0.769103338f,
+   -0.637943904f, -0.770082837f,
+   -0.636761861f, -0.771060524f,
+   -0.635578320f, -0.772036397f,
+   -0.634393284f, -0.773010453f,
+   -0.633206755f, -0.773982691f,
+   -0.632018736f, -0.774953107f,
+   -0.630829230f, -0.775921699f,
+   -0.629638239f, -0.776888466f,
+   -0.628445767f, -0.777853404f,
+   -0.627251815f, -0.778816512f,
+   -0.626056388f, -0.779777788f,
+   -0.624859488f, -0.780737229f,
+   -0.623661118f, -0.781694832f,
+   -0.622461279f, -0.782650596f,
+   -0.621259977f, -0.783604519f,
+   -0.620057212f, -0.784556597f,
+   -0.618852988f, -0.785506830f,
+   -0.617647308f, -0.786455214f,
+   -0.616440175f, -0.787401747f,
+   -0.615231591f, -0.788346428f,
+   -0.614021559f, -0.789289253f,
+   -0.612810082f, -0.790230221f,
+   -0.611597164f, -0.791169330f,
+   -0.610382806f, -0.792106577f,
+   -0.609167012f, -0.793041960f,
+   -0.607949785f, -0.793975478f,
+   -0.606731127f, -0.794907126f,
+   -0.605511041f, -0.795836905f,
+   -0.604289531f, -0.796764810f,
+   -0.603066599f, -0.797690841f,
+   -0.601842247f, -0.798614995f,
+   -0.600616479f, -0.799537269f,
+   -0.599389298f, -0.800457662f,
+   -0.598160707f, -0.801376172f,
+   -0.596930708f, -0.802292796f,
+   -0.595699304f, -0.803207531f,
+   -0.594466499f, -0.804120377f,
+   -0.593232295f, -0.805031331f,
+   -0.591996695f, -0.805940391f,
+   -0.590759702f, -0.806847554f,
+   -0.589521319f, -0.807752818f,
+   -0.588281548f, -0.808656182f,
+   -0.587040394f, -0.809557642f,
+   -0.585797857f, -0.810457198f,
+   -0.584553943f, -0.811354847f,
+   -0.583308653f, -0.812250587f,
+   -0.582061990f, -0.813144415f,
+   -0.580813958f, -0.814036330f,
+   -0.579564559f, -0.814926329f,
+   -0.578313796f, -0.815814411f,
+   -0.577061673f, -0.816700573f,
+   -0.575808191f, -0.817584813f,
+   -0.574553355f, -0.818467130f,
+   -0.573297167f, -0.819347520f,
+   -0.572039629f, -0.820225983f,
+   -0.570780746f, -0.821102515f,
+   -0.569520519f, -0.821977115f,
+   -0.568258953f, -0.822849781f,
+   -0.566996049f, -0.823720511f,
+   -0.565731811f, -0.824589303f,
+   -0.564466242f, -0.825456154f,
+   -0.563199344f, -0.826321063f,
+   -0.561931121f, -0.827184027f,
+   -0.560661576f, -0.828045045f,
+   -0.559390712f, -0.828904115f,
+   -0.558118531f, -0.829761234f,
+   -0.556845037f, -0.830616400f,
+   -0.555570233f, -0.831469612f,
+   -0.554294121f, -0.832320868f,
+   -0.553016706f, -0.833170165f,
+   -0.551737988f, -0.834017501f,
+   -0.550457973f, -0.834862875f,
+   -0.549176662f, -0.835706284f,
+   -0.547894059f, -0.836547727f,
+   -0.546610167f, -0.837387202f,
+   -0.545324988f, -0.838224706f,
+   -0.544038527f, -0.839060237f,
+   -0.542750785f, -0.839893794f,
+   -0.541461766f, -0.840725375f,
+   -0.540171473f, -0.841554977f,
+   -0.538879909f, -0.842382600f,
+   -0.537587076f, -0.843208240f,
+   -0.536292979f, -0.844031895f,
+   -0.534997620f, -0.844853565f,
+   -0.533701002f, -0.845673247f,
+   -0.532403128f, -0.846490939f,
+   -0.531104001f, -0.847306639f,
+   -0.529803625f, -0.848120345f,
+   -0.528502002f, -0.848932055f,
+   -0.527199135f, -0.849741768f,
+   -0.525895027f, -0.850549481f,
+   -0.524589683f, -0.851355193f,
+   -0.523283103f, -0.852158902f,
+   -0.521975293f, -0.852960605f,
+   -0.520666254f, -0.853760301f,
+   -0.519355990f, -0.854557988f,
+   -0.518044504f, -0.855353665f,
+   -0.516731799f, -0.856147328f,
+   -0.515417878f, -0.856938977f,
+   -0.514102744f, -0.857728610f,
+   -0.512786401f, -0.858516224f,
+   -0.511468850f, -0.859301818f,
+   -0.510150097f, -0.860085390f,
+   -0.508830143f, -0.860866939f,
+   -0.507508991f, -0.861646461f,
+   -0.506186645f, -0.862423956f,
+   -0.504863109f, -0.863199422f,
+   -0.503538384f, -0.863972856f,
+   -0.502212474f, -0.864744258f,
+   -0.500885383f, -0.865513624f,
+   -0.499557113f, -0.866280954f,
+   -0.498227667f, -0.867046246f,
+   -0.496897049f, -0.867809497f,
+   -0.495565262f, -0.868570706f,
+   -0.494232309f, -0.869329871f,
+   -0.492898192f, -0.870086991f,
+   -0.491562916f, -0.870842063f,
+   -0.490226483f, -0.871595087f,
+   -0.488888897f, -0.872346059f,
+   -0.487550160f, -0.873094978f,
+   -0.486210276f, -0.873841843f,
+   -0.484869248f, -0.874586652f,
+   -0.483527079f, -0.875329403f,
+   -0.482183772f, -0.876070094f,
+   -0.480839331f, -0.876808724f,
+   -0.479493758f, -0.877545290f,
+   -0.478147056f, -0.878279792f,
+   -0.476799230f, -0.879012226f,
+   -0.475450282f, -0.879742593f,
+   -0.474100215f, -0.880470889f,
+   -0.472749032f, -0.881197113f,
+   -0.471396737f, -0.881921264f,
+   -0.470043332f, -0.882643340f,
+   -0.468688822f, -0.883363339f,
+   -0.467333209f, -0.884081259f,
+   -0.465976496f, -0.884797098f,
+   -0.464618686f, -0.885510856f,
+   -0.463259784f, -0.886222530f,
+   -0.461899791f, -0.886932119f,
+   -0.460538711f, -0.887639620f,
+   -0.459176548f, -0.888345033f,
+   -0.457813304f, -0.889048356f,
+   -0.456448982f, -0.889749586f,
+   -0.455083587f, -0.890448723f,
+   -0.453717121f, -0.891145765f,
+   -0.452349587f, -0.891840709f,
+   -0.450980989f, -0.892533555f,
+   -0.449611330f, -0.893224301f,
+   -0.448240612f, -0.893912945f,
+   -0.446868840f, -0.894599486f,
+   -0.445496017f, -0.895283921f,
+   -0.444122145f, -0.895966250f,
+   -0.442747228f, -0.896646470f,
+   -0.441371269f, -0.897324581f,
+   -0.439994271f, -0.898000580f,
+   -0.438616239f, -0.898674466f,
+   -0.437237174f, -0.899346237f,
+   -0.435857080f, -0.900015892f,
+   -0.434475961f, -0.900683429f,
+   -0.433093819f, -0.901348847f,
+   -0.431710658f, -0.902012144f,
+   -0.430326481f, -0.902673318f,
+   -0.428941292f, -0.903332368f,
+   -0.427555093f, -0.903989293f,
+   -0.426167889f, -0.904644091f,
+   -0.424779681f, -0.905296759f,
+   -0.423390474f, -0.905947298f,
+   -0.422000271f, -0.906595705f,
+   -0.420609074f, -0.907241978f,
+   -0.419216888f, -0.907886116f,
+   -0.417823716f, -0.908528119f,
+   -0.416429560f, -0.909167983f,
+   -0.415034424f, -0.909805708f,
+   -0.413638312f, -0.910441292f,
+   -0.412241227f, -0.911074734f,
+   -0.410843171f, -0.911706032f,
+   -0.409444149f, -0.912335185f,
+   -0.408044163f, -0.912962190f,
+   -0.406643217f, -0.913587048f,
+   -0.405241314f, -0.914209756f,
+   -0.403838458f, -0.914830312f,
+   -0.402434651f, -0.915448716f,
+   -0.401029897f, -0.916064966f,
+   -0.399624200f, -0.916679060f,
+   -0.398217562f, -0.917290997f,
+   -0.396809987f, -0.917900776f,
+   -0.395401479f, -0.918508394f,
+   -0.393992040f, -0.919113852f,
+   -0.392581674f, -0.919717146f,
+   -0.391170384f, -0.920318277f,
+   -0.389758174f, -0.920917242f,
+   -0.388345047f, -0.921514039f,
+   -0.386931006f, -0.922108669f,
+   -0.385516054f, -0.922701128f,
+   -0.384100195f, -0.923291417f,
+   -0.382683432f, -0.923879533f,
+   -0.381265769f, -0.924465474f,
+   -0.379847209f, -0.925049241f,
+   -0.378427755f, -0.925630831f,
+   -0.377007410f, -0.926210242f,
+   -0.375586178f, -0.926787474f,
+   -0.374164063f, -0.927362526f,
+   -0.372741067f, -0.927935395f,
+   -0.371317194f, -0.928506080f,
+   -0.369892447f, -0.929074581f,
+   -0.368466830f, -0.929640896f,
+   -0.367040346f, -0.930205023f,
+   -0.365612998f, -0.930766961f,
+   -0.364184790f, -0.931326709f,
+   -0.362755724f, -0.931884266f,
+   -0.361325806f, -0.932439629f,
+   -0.359895037f, -0.932992799f,
+   -0.358463421f, -0.933543773f,
+   -0.357030961f, -0.934092550f,
+   -0.355597662f, -0.934639130f,
+   -0.354163525f, -0.935183510f,
+   -0.352728556f, -0.935725689f,
+   -0.351292756f, -0.936265667f,
+   -0.349856130f, -0.936803442f,
+   -0.348418680f, -0.937339012f,
+   -0.346980411f, -0.937872376f,
+   -0.345541325f, -0.938403534f,
+   -0.344101426f, -0.938932484f,
+   -0.342660717f, -0.939459224f,
+   -0.341219202f, -0.939983753f,
+   -0.339776884f, -0.940506071f,
+   -0.338333767f, -0.941026175f,
+   -0.336889853f, -0.941544065f,
+   -0.335445147f, -0.942059740f,
+   -0.333999651f, -0.942573198f,
+   -0.332553370f, -0.943084437f,
+   -0.331106306f, -0.943593458f,
+   -0.329658463f, -0.944100258f,
+   -0.328209844f, -0.944604837f,
+   -0.326760452f, -0.945107193f,
+   -0.325310292f, -0.945607325f,
+   -0.323859367f, -0.946105232f,
+   -0.322407679f, -0.946600913f,
+   -0.320955232f, -0.947094366f,
+   -0.319502031f, -0.947585591f,
+   -0.318048077f, -0.948074586f,
+   -0.316593376f, -0.948561350f,
+   -0.315137929f, -0.949045882f,
+   -0.313681740f, -0.949528181f,
+   -0.312224814f, -0.950008245f,
+   -0.310767153f, -0.950486074f,
+   -0.309308760f, -0.950961666f,
+   -0.307849640f, -0.951435021f,
+   -0.306389795f, -0.951906137f,
+   -0.304929230f, -0.952375013f,
+   -0.303467947f, -0.952841648f,
+   -0.302005949f, -0.953306040f,
+   -0.300543241f, -0.953768190f,
+   -0.299079826f, -0.954228095f,
+   -0.297615707f, -0.954685755f,
+   -0.296150888f, -0.955141168f,
+   -0.294685372f, -0.955594334f,
+   -0.293219163f, -0.956045251f,
+   -0.291752263f, -0.956493919f,
+   -0.290284677f, -0.956940336f,
+   -0.288816408f, -0.957384501f,
+   -0.287347460f, -0.957826413f,
+   -0.285877835f, -0.958266071f,
+   -0.284407537f, -0.958703475f,
+   -0.282936570f, -0.959138622f,
+   -0.281464938f, -0.959571513f,
+   -0.279992643f, -0.960002146f,
+   -0.278519689f, -0.960430519f,
+   -0.277046080f, -0.960856633f,
+   -0.275571819f, -0.961280486f,
+   -0.274096910f, -0.961702077f,
+   -0.272621355f, -0.962121404f,
+   -0.271145160f, -0.962538468f,
+   -0.269668326f, -0.962953267f,
+   -0.268190857f, -0.963365800f,
+   -0.266712757f, -0.963776066f,
+   -0.265234030f, -0.964184064f,
+   -0.263754679f, -0.964589793f,
+   -0.262274707f, -0.964993253f,
+   -0.260794118f, -0.965394442f,
+   -0.259312915f, -0.965793359f,
+   -0.257831102f, -0.966190003f,
+   -0.256348682f, -0.966584374f,
+   -0.254865660f, -0.966976471f,
+   -0.253382037f, -0.967366292f,
+   -0.251897818f, -0.967753837f,
+   -0.250413007f, -0.968139105f,
+   -0.248927606f, -0.968522094f,
+   -0.247441619f, -0.968902805f,
+   -0.245955050f, -0.969281235f,
+   -0.244467903f, -0.969657385f,
+   -0.242980180f, -0.970031253f,
+   -0.241491885f, -0.970402839f,
+   -0.240003022f, -0.970772141f,
+   -0.238513595f, -0.971139158f,
+   -0.237023606f, -0.971503891f,
+   -0.235533059f, -0.971866337f,
+   -0.234041959f, -0.972226497f,
+   -0.232550307f, -0.972584369f,
+   -0.231058108f, -0.972939952f,
+   -0.229565366f, -0.973293246f,
+   -0.228072083f, -0.973644250f,
+   -0.226578264f, -0.973992962f,
+   -0.225083911f, -0.974339383f,
+   -0.223589029f, -0.974683511f,
+   -0.222093621f, -0.975025345f,
+   -0.220597690f, -0.975364885f,
+   -0.219101240f, -0.975702130f,
+   -0.217604275f, -0.976037079f,
+   -0.216106797f, -0.976369731f,
+   -0.214608811f, -0.976700086f,
+   -0.213110320f, -0.977028143f,
+   -0.211611327f, -0.977353900f,
+   -0.210111837f, -0.977677358f,
+   -0.208611852f, -0.977998515f,
+   -0.207111376f, -0.978317371f,
+   -0.205610413f, -0.978633924f,
+   -0.204108966f, -0.978948175f,
+   -0.202607039f, -0.979260123f,
+   -0.201104635f, -0.979569766f,
+   -0.199601758f, -0.979877104f,
+   -0.198098411f, -0.980182136f,
+   -0.196594598f, -0.980484862f,
+   -0.195090322f, -0.980785280f,
+   -0.193585587f, -0.981083391f,
+   -0.192080397f, -0.981379193f,
+   -0.190574755f, -0.981672686f,
+   -0.189068664f, -0.981963869f,
+   -0.187562129f, -0.982252741f,
+   -0.186055152f, -0.982539302f,
+   -0.184547737f, -0.982823551f,
+   -0.183039888f, -0.983105487f,
+   -0.181531608f, -0.983385110f,
+   -0.180022901f, -0.983662419f,
+   -0.178513771f, -0.983937413f,
+   -0.177004220f, -0.984210092f,
+   -0.175494253f, -0.984480455f,
+   -0.173983873f, -0.984748502f,
+   -0.172473084f, -0.985014231f,
+   -0.170961889f, -0.985277642f,
+   -0.169450291f, -0.985538735f,
+   -0.167938295f, -0.985797509f,
+   -0.166425904f, -0.986053963f,
+   -0.164913120f, -0.986308097f,
+   -0.163399949f, -0.986559910f,
+   -0.161886394f, -0.986809402f,
+   -0.160372457f, -0.987056571f,
+   -0.158858143f, -0.987301418f,
+   -0.157343456f, -0.987543942f,
+   -0.155828398f, -0.987784142f,
+   -0.154312973f, -0.988022017f,
+   -0.152797185f, -0.988257568f,
+   -0.151281038f, -0.988490793f,
+   -0.149764535f, -0.988721692f,
+   -0.148247679f, -0.988950265f,
+   -0.146730474f, -0.989176510f,
+   -0.145212925f, -0.989400428f,
+   -0.143695033f, -0.989622017f,
+   -0.142176804f, -0.989841278f,
+   -0.140658239f, -0.990058210f,
+   -0.139139344f, -0.990272812f,
+   -0.137620122f, -0.990485084f,
+   -0.136100575f, -0.990695025f,
+   -0.134580709f, -0.990902635f,
+   -0.133060525f, -0.991107914f,
+   -0.131540029f, -0.991310860f,
+   -0.130019223f, -0.991511473f,
+   -0.128498111f, -0.991709754f,
+   -0.126976696f, -0.991905700f,
+   -0.125454983f, -0.992099313f,
+   -0.123932975f, -0.992290591f,
+   -0.122410675f, -0.992479535f,
+   -0.120888087f, -0.992666142f,
+   -0.119365215f, -0.992850414f,
+   -0.117842062f, -0.993032350f,
+   -0.116318631f, -0.993211949f,
+   -0.114794927f, -0.993389211f,
+   -0.113270952f, -0.993564136f,
+   -0.111746711f, -0.993736722f,
+   -0.110222207f, -0.993906970f,
+   -0.108697444f, -0.994074879f,
+   -0.107172425f, -0.994240449f,
+   -0.105647154f, -0.994403680f,
+   -0.104121634f, -0.994564571f,
+   -0.102595869f, -0.994723121f,
+   -0.101069863f, -0.994879331f,
+   -0.099543619f, -0.995033199f,
+   -0.098017140f, -0.995184727f,
+   -0.096490431f, -0.995333912f,
+   -0.094963495f, -0.995480755f,
+   -0.093436336f, -0.995625256f,
+   -0.091908956f, -0.995767414f,
+   -0.090381361f, -0.995907229f,
+   -0.088853553f, -0.996044701f,
+   -0.087325535f, -0.996179829f,
+   -0.085797312f, -0.996312612f,
+   -0.084268888f, -0.996443051f,
+   -0.082740265f, -0.996571146f,
+   -0.081211447f, -0.996696895f,
+   -0.079682438f, -0.996820299f,
+   -0.078153242f, -0.996941358f,
+   -0.076623861f, -0.997060070f,
+   -0.075094301f, -0.997176437f,
+   -0.073564564f, -0.997290457f,
+   -0.072034653f, -0.997402130f,
+   -0.070504573f, -0.997511456f,
+   -0.068974328f, -0.997618435f,
+   -0.067443920f, -0.997723067f,
+   -0.065913353f, -0.997825350f,
+   -0.064382631f, -0.997925286f,
+   -0.062851758f, -0.998022874f,
+   -0.061320736f, -0.998118113f,
+   -0.059789571f, -0.998211003f,
+   -0.058258265f, -0.998301545f,
+   -0.056726821f, -0.998389737f,
+   -0.055195244f, -0.998475581f,
+   -0.053663538f, -0.998559074f,
+   -0.052131705f, -0.998640218f,
+   -0.050599749f, -0.998719012f,
+   -0.049067674f, -0.998795456f,
+   -0.047535484f, -0.998869550f,
+   -0.046003182f, -0.998941293f,
+   -0.044470772f, -0.999010686f,
+   -0.042938257f, -0.999077728f,
+   -0.041405641f, -0.999142419f,
+   -0.039872928f, -0.999204759f,
+   -0.038340120f, -0.999264747f,
+   -0.036807223f, -0.999322385f,
+   -0.035274239f, -0.999377670f,
+   -0.033741172f, -0.999430605f,
+   -0.032208025f, -0.999481187f,
+   -0.030674803f, -0.999529418f,
+   -0.029141509f, -0.999575296f,
+   -0.027608146f, -0.999618822f,
+   -0.026074718f, -0.999659997f,
+   -0.024541229f, -0.999698819f,
+   -0.023007681f, -0.999735288f,
+   -0.021474080f, -0.999769405f,
+   -0.019940429f, -0.999801170f,
+   -0.018406730f, -0.999830582f,
+   -0.016872988f, -0.999857641f,
+   -0.015339206f, -0.999882347f,
+   -0.013805389f, -0.999904701f,
+   -0.012271538f, -0.999924702f,
+   -0.010737659f, -0.999942350f,
+   -0.009203755f, -0.999957645f,
+   -0.007669829f, -0.999970586f,
+   -0.006135885f, -0.999981175f,
+   -0.004601926f, -0.999989411f,
+   -0.003067957f, -0.999995294f,
+   -0.001533980f, -0.999998823f,
+   -0.000000000f, -1.000000000f,
+    0.001533980f, -0.999998823f,
+    0.003067957f, -0.999995294f,
+    0.004601926f, -0.999989411f,
+    0.006135885f, -0.999981175f,
+    0.007669829f, -0.999970586f,
+    0.009203755f, -0.999957645f,
+    0.010737659f, -0.999942350f,
+    0.012271538f, -0.999924702f,
+    0.013805389f, -0.999904701f,
+    0.015339206f, -0.999882347f,
+    0.016872988f, -0.999857641f,
+    0.018406730f, -0.999830582f,
+    0.019940429f, -0.999801170f,
+    0.021474080f, -0.999769405f,
+    0.023007681f, -0.999735288f,
+    0.024541229f, -0.999698819f,
+    0.026074718f, -0.999659997f,
+    0.027608146f, -0.999618822f,
+    0.029141509f, -0.999575296f,
+    0.030674803f, -0.999529418f,
+    0.032208025f, -0.999481187f,
+    0.033741172f, -0.999430605f,
+    0.035274239f, -0.999377670f,
+    0.036807223f, -0.999322385f,
+    0.038340120f, -0.999264747f,
+    0.039872928f, -0.999204759f,
+    0.041405641f, -0.999142419f,
+    0.042938257f, -0.999077728f,
+    0.044470772f, -0.999010686f,
+    0.046003182f, -0.998941293f,
+    0.047535484f, -0.998869550f,
+    0.049067674f, -0.998795456f,
+    0.050599749f, -0.998719012f,
+    0.052131705f, -0.998640218f,
+    0.053663538f, -0.998559074f,
+    0.055195244f, -0.998475581f,
+    0.056726821f, -0.998389737f,
+    0.058258265f, -0.998301545f,
+    0.059789571f, -0.998211003f,
+    0.061320736f, -0.998118113f,
+    0.062851758f, -0.998022874f,
+    0.064382631f, -0.997925286f,
+    0.065913353f, -0.997825350f,
+    0.067443920f, -0.997723067f,
+    0.068974328f, -0.997618435f,
+    0.070504573f, -0.997511456f,
+    0.072034653f, -0.997402130f,
+    0.073564564f, -0.997290457f,
+    0.075094301f, -0.997176437f,
+    0.076623861f, -0.997060070f,
+    0.078153242f, -0.996941358f,
+    0.079682438f, -0.996820299f,
+    0.081211447f, -0.996696895f,
+    0.082740265f, -0.996571146f,
+    0.084268888f, -0.996443051f,
+    0.085797312f, -0.996312612f,
+    0.087325535f, -0.996179829f,
+    0.088853553f, -0.996044701f,
+    0.090381361f, -0.995907229f,
+    0.091908956f, -0.995767414f,
+    0.093436336f, -0.995625256f,
+    0.094963495f, -0.995480755f,
+    0.096490431f, -0.995333912f,
+    0.098017140f, -0.995184727f,
+    0.099543619f, -0.995033199f,
+    0.101069863f, -0.994879331f,
+    0.102595869f, -0.994723121f,
+    0.104121634f, -0.994564571f,
+    0.105647154f, -0.994403680f,
+    0.107172425f, -0.994240449f,
+    0.108697444f, -0.994074879f,
+    0.110222207f, -0.993906970f,
+    0.111746711f, -0.993736722f,
+    0.113270952f, -0.993564136f,
+    0.114794927f, -0.993389211f,
+    0.116318631f, -0.993211949f,
+    0.117842062f, -0.993032350f,
+    0.119365215f, -0.992850414f,
+    0.120888087f, -0.992666142f,
+    0.122410675f, -0.992479535f,
+    0.123932975f, -0.992290591f,
+    0.125454983f, -0.992099313f,
+    0.126976696f, -0.991905700f,
+    0.128498111f, -0.991709754f,
+    0.130019223f, -0.991511473f,
+    0.131540029f, -0.991310860f,
+    0.133060525f, -0.991107914f,
+    0.134580709f, -0.990902635f,
+    0.136100575f, -0.990695025f,
+    0.137620122f, -0.990485084f,
+    0.139139344f, -0.990272812f,
+    0.140658239f, -0.990058210f,
+    0.142176804f, -0.989841278f,
+    0.143695033f, -0.989622017f,
+    0.145212925f, -0.989400428f,
+    0.146730474f, -0.989176510f,
+    0.148247679f, -0.988950265f,
+    0.149764535f, -0.988721692f,
+    0.151281038f, -0.988490793f,
+    0.152797185f, -0.988257568f,
+    0.154312973f, -0.988022017f,
+    0.155828398f, -0.987784142f,
+    0.157343456f, -0.987543942f,
+    0.158858143f, -0.987301418f,
+    0.160372457f, -0.987056571f,
+    0.161886394f, -0.986809402f,
+    0.163399949f, -0.986559910f,
+    0.164913120f, -0.986308097f,
+    0.166425904f, -0.986053963f,
+    0.167938295f, -0.985797509f,
+    0.169450291f, -0.985538735f,
+    0.170961889f, -0.985277642f,
+    0.172473084f, -0.985014231f,
+    0.173983873f, -0.984748502f,
+    0.175494253f, -0.984480455f,
+    0.177004220f, -0.984210092f,
+    0.178513771f, -0.983937413f,
+    0.180022901f, -0.983662419f,
+    0.181531608f, -0.983385110f,
+    0.183039888f, -0.983105487f,
+    0.184547737f, -0.982823551f,
+    0.186055152f, -0.982539302f,
+    0.187562129f, -0.982252741f,
+    0.189068664f, -0.981963869f,
+    0.190574755f, -0.981672686f,
+    0.192080397f, -0.981379193f,
+    0.193585587f, -0.981083391f,
+    0.195090322f, -0.980785280f,
+    0.196594598f, -0.980484862f,
+    0.198098411f, -0.980182136f,
+    0.199601758f, -0.979877104f,
+    0.201104635f, -0.979569766f,
+    0.202607039f, -0.979260123f,
+    0.204108966f, -0.978948175f,
+    0.205610413f, -0.978633924f,
+    0.207111376f, -0.978317371f,
+    0.208611852f, -0.977998515f,
+    0.210111837f, -0.977677358f,
+    0.211611327f, -0.977353900f,
+    0.213110320f, -0.977028143f,
+    0.214608811f, -0.976700086f,
+    0.216106797f, -0.976369731f,
+    0.217604275f, -0.976037079f,
+    0.219101240f, -0.975702130f,
+    0.220597690f, -0.975364885f,
+    0.222093621f, -0.975025345f,
+    0.223589029f, -0.974683511f,
+    0.225083911f, -0.974339383f,
+    0.226578264f, -0.973992962f,
+    0.228072083f, -0.973644250f,
+    0.229565366f, -0.973293246f,
+    0.231058108f, -0.972939952f,
+    0.232550307f, -0.972584369f,
+    0.234041959f, -0.972226497f,
+    0.235533059f, -0.971866337f,
+    0.237023606f, -0.971503891f,
+    0.238513595f, -0.971139158f,
+    0.240003022f, -0.970772141f,
+    0.241491885f, -0.970402839f,
+    0.242980180f, -0.970031253f,
+    0.244467903f, -0.969657385f,
+    0.245955050f, -0.969281235f,
+    0.247441619f, -0.968902805f,
+    0.248927606f, -0.968522094f,
+    0.250413007f, -0.968139105f,
+    0.251897818f, -0.967753837f,
+    0.253382037f, -0.967366292f,
+    0.254865660f, -0.966976471f,
+    0.256348682f, -0.966584374f,
+    0.257831102f, -0.966190003f,
+    0.259312915f, -0.965793359f,
+    0.260794118f, -0.965394442f,
+    0.262274707f, -0.964993253f,
+    0.263754679f, -0.964589793f,
+    0.265234030f, -0.964184064f,
+    0.266712757f, -0.963776066f,
+    0.268190857f, -0.963365800f,
+    0.269668326f, -0.962953267f,
+    0.271145160f, -0.962538468f,
+    0.272621355f, -0.962121404f,
+    0.274096910f, -0.961702077f,
+    0.275571819f, -0.961280486f,
+    0.277046080f, -0.960856633f,
+    0.278519689f, -0.960430519f,
+    0.279992643f, -0.960002146f,
+    0.281464938f, -0.959571513f,
+    0.282936570f, -0.959138622f,
+    0.284407537f, -0.958703475f,
+    0.285877835f, -0.958266071f,
+    0.287347460f, -0.957826413f,
+    0.288816408f, -0.957384501f,
+    0.290284677f, -0.956940336f,
+    0.291752263f, -0.956493919f,
+    0.293219163f, -0.956045251f,
+    0.294685372f, -0.955594334f,
+    0.296150888f, -0.955141168f,
+    0.297615707f, -0.954685755f,
+    0.299079826f, -0.954228095f,
+    0.300543241f, -0.953768190f,
+    0.302005949f, -0.953306040f,
+    0.303467947f, -0.952841648f,
+    0.304929230f, -0.952375013f,
+    0.306389795f, -0.951906137f,
+    0.307849640f, -0.951435021f,
+    0.309308760f, -0.950961666f,
+    0.310767153f, -0.950486074f,
+    0.312224814f, -0.950008245f,
+    0.313681740f, -0.949528181f,
+    0.315137929f, -0.949045882f,
+    0.316593376f, -0.948561350f,
+    0.318048077f, -0.948074586f,
+    0.319502031f, -0.947585591f,
+    0.320955232f, -0.947094366f,
+    0.322407679f, -0.946600913f,
+    0.323859367f, -0.946105232f,
+    0.325310292f, -0.945607325f,
+    0.326760452f, -0.945107193f,
+    0.328209844f, -0.944604837f,
+    0.329658463f, -0.944100258f,
+    0.331106306f, -0.943593458f,
+    0.332553370f, -0.943084437f,
+    0.333999651f, -0.942573198f,
+    0.335445147f, -0.942059740f,
+    0.336889853f, -0.941544065f,
+    0.338333767f, -0.941026175f,
+    0.339776884f, -0.940506071f,
+    0.341219202f, -0.939983753f,
+    0.342660717f, -0.939459224f,
+    0.344101426f, -0.938932484f,
+    0.345541325f, -0.938403534f,
+    0.346980411f, -0.937872376f,
+    0.348418680f, -0.937339012f,
+    0.349856130f, -0.936803442f,
+    0.351292756f, -0.936265667f,
+    0.352728556f, -0.935725689f,
+    0.354163525f, -0.935183510f,
+    0.355597662f, -0.934639130f,
+    0.357030961f, -0.934092550f,
+    0.358463421f, -0.933543773f,
+    0.359895037f, -0.932992799f,
+    0.361325806f, -0.932439629f,
+    0.362755724f, -0.931884266f,
+    0.364184790f, -0.931326709f,
+    0.365612998f, -0.930766961f,
+    0.367040346f, -0.930205023f,
+    0.368466830f, -0.929640896f,
+    0.369892447f, -0.929074581f,
+    0.371317194f, -0.928506080f,
+    0.372741067f, -0.927935395f,
+    0.374164063f, -0.927362526f,
+    0.375586178f, -0.926787474f,
+    0.377007410f, -0.926210242f,
+    0.378427755f, -0.925630831f,
+    0.379847209f, -0.925049241f,
+    0.381265769f, -0.924465474f,
+    0.382683432f, -0.923879533f,
+    0.384100195f, -0.923291417f,
+    0.385516054f, -0.922701128f,
+    0.386931006f, -0.922108669f,
+    0.388345047f, -0.921514039f,
+    0.389758174f, -0.920917242f,
+    0.391170384f, -0.920318277f,
+    0.392581674f, -0.919717146f,
+    0.393992040f, -0.919113852f,
+    0.395401479f, -0.918508394f,
+    0.396809987f, -0.917900776f,
+    0.398217562f, -0.917290997f,
+    0.399624200f, -0.916679060f,
+    0.401029897f, -0.916064966f,
+    0.402434651f, -0.915448716f,
+    0.403838458f, -0.914830312f,
+    0.405241314f, -0.914209756f,
+    0.406643217f, -0.913587048f,
+    0.408044163f, -0.912962190f,
+    0.409444149f, -0.912335185f,
+    0.410843171f, -0.911706032f,
+    0.412241227f, -0.911074734f,
+    0.413638312f, -0.910441292f,
+    0.415034424f, -0.909805708f,
+    0.416429560f, -0.909167983f,
+    0.417823716f, -0.908528119f,
+    0.419216888f, -0.907886116f,
+    0.420609074f, -0.907241978f,
+    0.422000271f, -0.906595705f,
+    0.423390474f, -0.905947298f,
+    0.424779681f, -0.905296759f,
+    0.426167889f, -0.904644091f,
+    0.427555093f, -0.903989293f,
+    0.428941292f, -0.903332368f,
+    0.430326481f, -0.902673318f,
+    0.431710658f, -0.902012144f,
+    0.433093819f, -0.901348847f,
+    0.434475961f, -0.900683429f,
+    0.435857080f, -0.900015892f,
+    0.437237174f, -0.899346237f,
+    0.438616239f, -0.898674466f,
+    0.439994271f, -0.898000580f,
+    0.441371269f, -0.897324581f,
+    0.442747228f, -0.896646470f,
+    0.444122145f, -0.895966250f,
+    0.445496017f, -0.895283921f,
+    0.446868840f, -0.894599486f,
+    0.448240612f, -0.893912945f,
+    0.449611330f, -0.893224301f,
+    0.450980989f, -0.892533555f,
+    0.452349587f, -0.891840709f,
+    0.453717121f, -0.891145765f,
+    0.455083587f, -0.890448723f,
+    0.456448982f, -0.889749586f,
+    0.457813304f, -0.889048356f,
+    0.459176548f, -0.888345033f,
+    0.460538711f, -0.887639620f,
+    0.461899791f, -0.886932119f,
+    0.463259784f, -0.886222530f,
+    0.464618686f, -0.885510856f,
+    0.465976496f, -0.884797098f,
+    0.467333209f, -0.884081259f,
+    0.468688822f, -0.883363339f,
+    0.470043332f, -0.882643340f,
+    0.471396737f, -0.881921264f,
+    0.472749032f, -0.881197113f,
+    0.474100215f, -0.880470889f,
+    0.475450282f, -0.879742593f,
+    0.476799230f, -0.879012226f,
+    0.478147056f, -0.878279792f,
+    0.479493758f, -0.877545290f,
+    0.480839331f, -0.876808724f,
+    0.482183772f, -0.876070094f,
+    0.483527079f, -0.875329403f,
+    0.484869248f, -0.874586652f,
+    0.486210276f, -0.873841843f,
+    0.487550160f, -0.873094978f,
+    0.488888897f, -0.872346059f,
+    0.490226483f, -0.871595087f,
+    0.491562916f, -0.870842063f,
+    0.492898192f, -0.870086991f,
+    0.494232309f, -0.869329871f,
+    0.495565262f, -0.868570706f,
+    0.496897049f, -0.867809497f,
+    0.498227667f, -0.867046246f,
+    0.499557113f, -0.866280954f,
+    0.500885383f, -0.865513624f,
+    0.502212474f, -0.864744258f,
+    0.503538384f, -0.863972856f,
+    0.504863109f, -0.863199422f,
+    0.506186645f, -0.862423956f,
+    0.507508991f, -0.861646461f,
+    0.508830143f, -0.860866939f,
+    0.510150097f, -0.860085390f,
+    0.511468850f, -0.859301818f,
+    0.512786401f, -0.858516224f,
+    0.514102744f, -0.857728610f,
+    0.515417878f, -0.856938977f,
+    0.516731799f, -0.856147328f,
+    0.518044504f, -0.855353665f,
+    0.519355990f, -0.854557988f,
+    0.520666254f, -0.853760301f,
+    0.521975293f, -0.852960605f,
+    0.523283103f, -0.852158902f,
+    0.524589683f, -0.851355193f,
+    0.525895027f, -0.850549481f,
+    0.527199135f, -0.849741768f,
+    0.528502002f, -0.848932055f,
+    0.529803625f, -0.848120345f,
+    0.531104001f, -0.847306639f,
+    0.532403128f, -0.846490939f,
+    0.533701002f, -0.845673247f,
+    0.534997620f, -0.844853565f,
+    0.536292979f, -0.844031895f,
+    0.537587076f, -0.843208240f,
+    0.538879909f, -0.842382600f,
+    0.540171473f, -0.841554977f,
+    0.541461766f, -0.840725375f,
+    0.542750785f, -0.839893794f,
+    0.544038527f, -0.839060237f,
+    0.545324988f, -0.838224706f,
+    0.546610167f, -0.837387202f,
+    0.547894059f, -0.836547727f,
+    0.549176662f, -0.835706284f,
+    0.550457973f, -0.834862875f,
+    0.551737988f, -0.834017501f,
+    0.553016706f, -0.833170165f,
+    0.554294121f, -0.832320868f,
+    0.555570233f, -0.831469612f,
+    0.556845037f, -0.830616400f,
+    0.558118531f, -0.829761234f,
+    0.559390712f, -0.828904115f,
+    0.560661576f, -0.828045045f,
+    0.561931121f, -0.827184027f,
+    0.563199344f, -0.826321063f,
+    0.564466242f, -0.825456154f,
+    0.565731811f, -0.824589303f,
+    0.566996049f, -0.823720511f,
+    0.568258953f, -0.822849781f,
+    0.569520519f, -0.821977115f,
+    0.570780746f, -0.821102515f,
+    0.572039629f, -0.820225983f,
+    0.573297167f, -0.819347520f,
+    0.574553355f, -0.818467130f,
+    0.575808191f, -0.817584813f,
+    0.577061673f, -0.816700573f,
+    0.578313796f, -0.815814411f,
+    0.579564559f, -0.814926329f,
+    0.580813958f, -0.814036330f,
+    0.582061990f, -0.813144415f,
+    0.583308653f, -0.812250587f,
+    0.584553943f, -0.811354847f,
+    0.585797857f, -0.810457198f,
+    0.587040394f, -0.809557642f,
+    0.588281548f, -0.808656182f,
+    0.589521319f, -0.807752818f,
+    0.590759702f, -0.806847554f,
+    0.591996695f, -0.805940391f,
+    0.593232295f, -0.805031331f,
+    0.594466499f, -0.804120377f,
+    0.595699304f, -0.803207531f,
+    0.596930708f, -0.802292796f,
+    0.598160707f, -0.801376172f,
+    0.599389298f, -0.800457662f,
+    0.600616479f, -0.799537269f,
+    0.601842247f, -0.798614995f,
+    0.603066599f, -0.797690841f,
+    0.604289531f, -0.796764810f,
+    0.605511041f, -0.795836905f,
+    0.606731127f, -0.794907126f,
+    0.607949785f, -0.793975478f,
+    0.609167012f, -0.793041960f,
+    0.610382806f, -0.792106577f,
+    0.611597164f, -0.791169330f,
+    0.612810082f, -0.790230221f,
+    0.614021559f, -0.789289253f,
+    0.615231591f, -0.788346428f,
+    0.616440175f, -0.787401747f,
+    0.617647308f, -0.786455214f,
+    0.618852988f, -0.785506830f,
+    0.620057212f, -0.784556597f,
+    0.621259977f, -0.783604519f,
+    0.622461279f, -0.782650596f,
+    0.623661118f, -0.781694832f,
+    0.624859488f, -0.780737229f,
+    0.626056388f, -0.779777788f,
+    0.627251815f, -0.778816512f,
+    0.628445767f, -0.777853404f,
+    0.629638239f, -0.776888466f,
+    0.630829230f, -0.775921699f,
+    0.632018736f, -0.774953107f,
+    0.633206755f, -0.773982691f,
+    0.634393284f, -0.773010453f,
+    0.635578320f, -0.772036397f,
+    0.636761861f, -0.771060524f,
+    0.637943904f, -0.770082837f,
+    0.639124445f, -0.769103338f,
+    0.640303482f, -0.768122029f,
+    0.641481013f, -0.767138912f,
+    0.642657034f, -0.766153990f,
+    0.643831543f, -0.765167266f,
+    0.645004537f, -0.764178741f,
+    0.646176013f, -0.763188417f,
+    0.647345969f, -0.762196298f,
+    0.648514401f, -0.761202385f,
+    0.649681307f, -0.760206682f,
+    0.650846685f, -0.759209189f,
+    0.652010531f, -0.758209910f,
+    0.653172843f, -0.757208847f,
+    0.654333618f, -0.756206001f,
+    0.655492853f, -0.755201377f,
+    0.656650546f, -0.754194975f,
+    0.657806693f, -0.753186799f,
+    0.658961293f, -0.752176850f,
+    0.660114342f, -0.751165132f,
+    0.661265838f, -0.750151646f,
+    0.662415778f, -0.749136395f,
+    0.663564159f, -0.748119380f,
+    0.664710978f, -0.747100606f,
+    0.665856234f, -0.746080074f,
+    0.666999922f, -0.745057785f,
+    0.668142041f, -0.744033744f,
+    0.669282588f, -0.743007952f,
+    0.670421560f, -0.741980412f,
+    0.671558955f, -0.740951125f,
+    0.672694769f, -0.739920095f,
+    0.673829000f, -0.738887324f,
+    0.674961646f, -0.737852815f,
+    0.676092704f, -0.736816569f,
+    0.677222170f, -0.735778589f,
+    0.678350043f, -0.734738878f,
+    0.679476320f, -0.733697438f,
+    0.680600998f, -0.732654272f,
+    0.681724074f, -0.731609381f,
+    0.682845546f, -0.730562769f,
+    0.683965412f, -0.729514438f,
+    0.685083668f, -0.728464390f,
+    0.686200312f, -0.727412629f,
+    0.687315341f, -0.726359155f,
+    0.688428753f, -0.725303972f,
+    0.689540545f, -0.724247083f,
+    0.690650714f, -0.723188489f,
+    0.691759258f, -0.722128194f,
+    0.692866175f, -0.721066199f,
+    0.693971461f, -0.720002508f,
+    0.695075114f, -0.718937122f,
+    0.696177131f, -0.717870045f,
+    0.697277511f, -0.716801279f,
+    0.698376249f, -0.715730825f,
+    0.699473345f, -0.714658688f,
+    0.700568794f, -0.713584869f,
+    0.701662595f, -0.712509371f,
+    0.702754744f, -0.711432196f,
+    0.703845241f, -0.710353347f,
+    0.704934080f, -0.709272826f,
+    0.706021261f, -0.708190637f,
+    0.707106781f, -0.707106781f,
+    0.708190637f, -0.706021261f,
+    0.709272826f, -0.704934080f,
+    0.710353347f, -0.703845241f,
+    0.711432196f, -0.702754744f,
+    0.712509371f, -0.701662595f,
+    0.713584869f, -0.700568794f,
+    0.714658688f, -0.699473345f,
+    0.715730825f, -0.698376249f,
+    0.716801279f, -0.697277511f,
+    0.717870045f, -0.696177131f,
+    0.718937122f, -0.695075114f,
+    0.720002508f, -0.693971461f,
+    0.721066199f, -0.692866175f,
+    0.722128194f, -0.691759258f,
+    0.723188489f, -0.690650714f,
+    0.724247083f, -0.689540545f,
+    0.725303972f, -0.688428753f,
+    0.726359155f, -0.687315341f,
+    0.727412629f, -0.686200312f,
+    0.728464390f, -0.685083668f,
+    0.729514438f, -0.683965412f,
+    0.730562769f, -0.682845546f,
+    0.731609381f, -0.681724074f,
+    0.732654272f, -0.680600998f,
+    0.733697438f, -0.679476320f,
+    0.734738878f, -0.678350043f,
+    0.735778589f, -0.677222170f,
+    0.736816569f, -0.676092704f,
+    0.737852815f, -0.674961646f,
+    0.738887324f, -0.673829000f,
+    0.739920095f, -0.672694769f,
+    0.740951125f, -0.671558955f,
+    0.741980412f, -0.670421560f,
+    0.743007952f, -0.669282588f,
+    0.744033744f, -0.668142041f,
+    0.745057785f, -0.666999922f,
+    0.746080074f, -0.665856234f,
+    0.747100606f, -0.664710978f,
+    0.748119380f, -0.663564159f,
+    0.749136395f, -0.662415778f,
+    0.750151646f, -0.661265838f,
+    0.751165132f, -0.660114342f,
+    0.752176850f, -0.658961293f,
+    0.753186799f, -0.657806693f,
+    0.754194975f, -0.656650546f,
+    0.755201377f, -0.655492853f,
+    0.756206001f, -0.654333618f,
+    0.757208847f, -0.653172843f,
+    0.758209910f, -0.652010531f,
+    0.759209189f, -0.650846685f,
+    0.760206682f, -0.649681307f,
+    0.761202385f, -0.648514401f,
+    0.762196298f, -0.647345969f,
+    0.763188417f, -0.646176013f,
+    0.764178741f, -0.645004537f,
+    0.765167266f, -0.643831543f,
+    0.766153990f, -0.642657034f,
+    0.767138912f, -0.641481013f,
+    0.768122029f, -0.640303482f,
+    0.769103338f, -0.639124445f,
+    0.770082837f, -0.637943904f,
+    0.771060524f, -0.636761861f,
+    0.772036397f, -0.635578320f,
+    0.773010453f, -0.634393284f,
+    0.773982691f, -0.633206755f,
+    0.774953107f, -0.632018736f,
+    0.775921699f, -0.630829230f,
+    0.776888466f, -0.629638239f,
+    0.777853404f, -0.628445767f,
+    0.778816512f, -0.627251815f,
+    0.779777788f, -0.626056388f,
+    0.780737229f, -0.624859488f,
+    0.781694832f, -0.623661118f,
+    0.782650596f, -0.622461279f,
+    0.783604519f, -0.621259977f,
+    0.784556597f, -0.620057212f,
+    0.785506830f, -0.618852988f,
+    0.786455214f, -0.617647308f,
+    0.787401747f, -0.616440175f,
+    0.788346428f, -0.615231591f,
+    0.789289253f, -0.614021559f,
+    0.790230221f, -0.612810082f,
+    0.791169330f, -0.611597164f,
+    0.792106577f, -0.610382806f,
+    0.793041960f, -0.609167012f,
+    0.793975478f, -0.607949785f,
+    0.794907126f, -0.606731127f,
+    0.795836905f, -0.605511041f,
+    0.796764810f, -0.604289531f,
+    0.797690841f, -0.603066599f,
+    0.798614995f, -0.601842247f,
+    0.799537269f, -0.600616479f,
+    0.800457662f, -0.599389298f,
+    0.801376172f, -0.598160707f,
+    0.802292796f, -0.596930708f,
+    0.803207531f, -0.595699304f,
+    0.804120377f, -0.594466499f,
+    0.805031331f, -0.593232295f,
+    0.805940391f, -0.591996695f,
+    0.806847554f, -0.590759702f,
+    0.807752818f, -0.589521319f,
+    0.808656182f, -0.588281548f,
+    0.809557642f, -0.587040394f,
+    0.810457198f, -0.585797857f,
+    0.811354847f, -0.584553943f,
+    0.812250587f, -0.583308653f,
+    0.813144415f, -0.582061990f,
+    0.814036330f, -0.580813958f,
+    0.814926329f, -0.579564559f,
+    0.815814411f, -0.578313796f,
+    0.816700573f, -0.577061673f,
+    0.817584813f, -0.575808191f,
+    0.818467130f, -0.574553355f,
+    0.819347520f, -0.573297167f,
+    0.820225983f, -0.572039629f,
+    0.821102515f, -0.570780746f,
+    0.821977115f, -0.569520519f,
+    0.822849781f, -0.568258953f,
+    0.823720511f, -0.566996049f,
+    0.824589303f, -0.565731811f,
+    0.825456154f, -0.564466242f,
+    0.826321063f, -0.563199344f,
+    0.827184027f, -0.561931121f,
+    0.828045045f, -0.560661576f,
+    0.828904115f, -0.559390712f,
+    0.829761234f, -0.558118531f,
+    0.830616400f, -0.556845037f,
+    0.831469612f, -0.555570233f,
+    0.832320868f, -0.554294121f,
+    0.833170165f, -0.553016706f,
+    0.834017501f, -0.551737988f,
+    0.834862875f, -0.550457973f,
+    0.835706284f, -0.549176662f,
+    0.836547727f, -0.547894059f,
+    0.837387202f, -0.546610167f,
+    0.838224706f, -0.545324988f,
+    0.839060237f, -0.544038527f,
+    0.839893794f, -0.542750785f,
+    0.840725375f, -0.541461766f,
+    0.841554977f, -0.540171473f,
+    0.842382600f, -0.538879909f,
+    0.843208240f, -0.537587076f,
+    0.844031895f, -0.536292979f,
+    0.844853565f, -0.534997620f,
+    0.845673247f, -0.533701002f,
+    0.846490939f, -0.532403128f,
+    0.847306639f, -0.531104001f,
+    0.848120345f, -0.529803625f,
+    0.848932055f, -0.528502002f,
+    0.849741768f, -0.527199135f,
+    0.850549481f, -0.525895027f,
+    0.851355193f, -0.524589683f,
+    0.852158902f, -0.523283103f,
+    0.852960605f, -0.521975293f,
+    0.853760301f, -0.520666254f,
+    0.854557988f, -0.519355990f,
+    0.855353665f, -0.518044504f,
+    0.856147328f, -0.516731799f,
+    0.856938977f, -0.515417878f,
+    0.857728610f, -0.514102744f,
+    0.858516224f, -0.512786401f,
+    0.859301818f, -0.511468850f,
+    0.860085390f, -0.510150097f,
+    0.860866939f, -0.508830143f,
+    0.861646461f, -0.507508991f,
+    0.862423956f, -0.506186645f,
+    0.863199422f, -0.504863109f,
+    0.863972856f, -0.503538384f,
+    0.864744258f, -0.502212474f,
+    0.865513624f, -0.500885383f,
+    0.866280954f, -0.499557113f,
+    0.867046246f, -0.498227667f,
+    0.867809497f, -0.496897049f,
+    0.868570706f, -0.495565262f,
+    0.869329871f, -0.494232309f,
+    0.870086991f, -0.492898192f,
+    0.870842063f, -0.491562916f,
+    0.871595087f, -0.490226483f,
+    0.872346059f, -0.488888897f,
+    0.873094978f, -0.487550160f,
+    0.873841843f, -0.486210276f,
+    0.874586652f, -0.484869248f,
+    0.875329403f, -0.483527079f,
+    0.876070094f, -0.482183772f,
+    0.876808724f, -0.480839331f,
+    0.877545290f, -0.479493758f,
+    0.878279792f, -0.478147056f,
+    0.879012226f, -0.476799230f,
+    0.879742593f, -0.475450282f,
+    0.880470889f, -0.474100215f,
+    0.881197113f, -0.472749032f,
+    0.881921264f, -0.471396737f,
+    0.882643340f, -0.470043332f,
+    0.883363339f, -0.468688822f,
+    0.884081259f, -0.467333209f,
+    0.884797098f, -0.465976496f,
+    0.885510856f, -0.464618686f,
+    0.886222530f, -0.463259784f,
+    0.886932119f, -0.461899791f,
+    0.887639620f, -0.460538711f,
+    0.888345033f, -0.459176548f,
+    0.889048356f, -0.457813304f,
+    0.889749586f, -0.456448982f,
+    0.890448723f, -0.455083587f,
+    0.891145765f, -0.453717121f,
+    0.891840709f, -0.452349587f,
+    0.892533555f, -0.450980989f,
+    0.893224301f, -0.449611330f,
+    0.893912945f, -0.448240612f,
+    0.894599486f, -0.446868840f,
+    0.895283921f, -0.445496017f,
+    0.895966250f, -0.444122145f,
+    0.896646470f, -0.442747228f,
+    0.897324581f, -0.441371269f,
+    0.898000580f, -0.439994271f,
+    0.898674466f, -0.438616239f,
+    0.899346237f, -0.437237174f,
+    0.900015892f, -0.435857080f,
+    0.900683429f, -0.434475961f,
+    0.901348847f, -0.433093819f,
+    0.902012144f, -0.431710658f,
+    0.902673318f, -0.430326481f,
+    0.903332368f, -0.428941292f,
+    0.903989293f, -0.427555093f,
+    0.904644091f, -0.426167889f,
+    0.905296759f, -0.424779681f,
+    0.905947298f, -0.423390474f,
+    0.906595705f, -0.422000271f,
+    0.907241978f, -0.420609074f,
+    0.907886116f, -0.419216888f,
+    0.908528119f, -0.417823716f,
+    0.909167983f, -0.416429560f,
+    0.909805708f, -0.415034424f,
+    0.910441292f, -0.413638312f,
+    0.911074734f, -0.412241227f,
+    0.911706032f, -0.410843171f,
+    0.912335185f, -0.409444149f,
+    0.912962190f, -0.408044163f,
+    0.913587048f, -0.406643217f,
+    0.914209756f, -0.405241314f,
+    0.914830312f, -0.403838458f,
+    0.915448716f, -0.402434651f,
+    0.916064966f, -0.401029897f,
+    0.916679060f, -0.399624200f,
+    0.917290997f, -0.398217562f,
+    0.917900776f, -0.396809987f,
+    0.918508394f, -0.395401479f,
+    0.919113852f, -0.393992040f,
+    0.919717146f, -0.392581674f,
+    0.920318277f, -0.391170384f,
+    0.920917242f, -0.389758174f,
+    0.921514039f, -0.388345047f,
+    0.922108669f, -0.386931006f,
+    0.922701128f, -0.385516054f,
+    0.923291417f, -0.384100195f,
+    0.923879533f, -0.382683432f,
+    0.924465474f, -0.381265769f,
+    0.925049241f, -0.379847209f,
+    0.925630831f, -0.378427755f,
+    0.926210242f, -0.377007410f,
+    0.926787474f, -0.375586178f,
+    0.927362526f, -0.374164063f,
+    0.927935395f, -0.372741067f,
+    0.928506080f, -0.371317194f,
+    0.929074581f, -0.369892447f,
+    0.929640896f, -0.368466830f,
+    0.930205023f, -0.367040346f,
+    0.930766961f, -0.365612998f,
+    0.931326709f, -0.364184790f,
+    0.931884266f, -0.362755724f,
+    0.932439629f, -0.361325806f,
+    0.932992799f, -0.359895037f,
+    0.933543773f, -0.358463421f,
+    0.934092550f, -0.357030961f,
+    0.934639130f, -0.355597662f,
+    0.935183510f, -0.354163525f,
+    0.935725689f, -0.352728556f,
+    0.936265667f, -0.351292756f,
+    0.936803442f, -0.349856130f,
+    0.937339012f, -0.348418680f,
+    0.937872376f, -0.346980411f,
+    0.938403534f, -0.345541325f,
+    0.938932484f, -0.344101426f,
+    0.939459224f, -0.342660717f,
+    0.939983753f, -0.341219202f,
+    0.940506071f, -0.339776884f,
+    0.941026175f, -0.338333767f,
+    0.941544065f, -0.336889853f,
+    0.942059740f, -0.335445147f,
+    0.942573198f, -0.333999651f,
+    0.943084437f, -0.332553370f,
+    0.943593458f, -0.331106306f,
+    0.944100258f, -0.329658463f,
+    0.944604837f, -0.328209844f,
+    0.945107193f, -0.326760452f,
+    0.945607325f, -0.325310292f,
+    0.946105232f, -0.323859367f,
+    0.946600913f, -0.322407679f,
+    0.947094366f, -0.320955232f,
+    0.947585591f, -0.319502031f,
+    0.948074586f, -0.318048077f,
+    0.948561350f, -0.316593376f,
+    0.949045882f, -0.315137929f,
+    0.949528181f, -0.313681740f,
+    0.950008245f, -0.312224814f,
+    0.950486074f, -0.310767153f,
+    0.950961666f, -0.309308760f,
+    0.951435021f, -0.307849640f,
+    0.951906137f, -0.306389795f,
+    0.952375013f, -0.304929230f,
+    0.952841648f, -0.303467947f,
+    0.953306040f, -0.302005949f,
+    0.953768190f, -0.300543241f,
+    0.954228095f, -0.299079826f,
+    0.954685755f, -0.297615707f,
+    0.955141168f, -0.296150888f,
+    0.955594334f, -0.294685372f,
+    0.956045251f, -0.293219163f,
+    0.956493919f, -0.291752263f,
+    0.956940336f, -0.290284677f,
+    0.957384501f, -0.288816408f,
+    0.957826413f, -0.287347460f,
+    0.958266071f, -0.285877835f,
+    0.958703475f, -0.284407537f,
+    0.959138622f, -0.282936570f,
+    0.959571513f, -0.281464938f,
+    0.960002146f, -0.279992643f,
+    0.960430519f, -0.278519689f,
+    0.960856633f, -0.277046080f,
+    0.961280486f, -0.275571819f,
+    0.961702077f, -0.274096910f,
+    0.962121404f, -0.272621355f,
+    0.962538468f, -0.271145160f,
+    0.962953267f, -0.269668326f,
+    0.963365800f, -0.268190857f,
+    0.963776066f, -0.266712757f,
+    0.964184064f, -0.265234030f,
+    0.964589793f, -0.263754679f,
+    0.964993253f, -0.262274707f,
+    0.965394442f, -0.260794118f,
+    0.965793359f, -0.259312915f,
+    0.966190003f, -0.257831102f,
+    0.966584374f, -0.256348682f,
+    0.966976471f, -0.254865660f,
+    0.967366292f, -0.253382037f,
+    0.967753837f, -0.251897818f,
+    0.968139105f, -0.250413007f,
+    0.968522094f, -0.248927606f,
+    0.968902805f, -0.247441619f,
+    0.969281235f, -0.245955050f,
+    0.969657385f, -0.244467903f,
+    0.970031253f, -0.242980180f,
+    0.970402839f, -0.241491885f,
+    0.970772141f, -0.240003022f,
+    0.971139158f, -0.238513595f,
+    0.971503891f, -0.237023606f,
+    0.971866337f, -0.235533059f,
+    0.972226497f, -0.234041959f,
+    0.972584369f, -0.232550307f,
+    0.972939952f, -0.231058108f,
+    0.973293246f, -0.229565366f,
+    0.973644250f, -0.228072083f,
+    0.973992962f, -0.226578264f,
+    0.974339383f, -0.225083911f,
+    0.974683511f, -0.223589029f,
+    0.975025345f, -0.222093621f,
+    0.975364885f, -0.220597690f,
+    0.975702130f, -0.219101240f,
+    0.976037079f, -0.217604275f,
+    0.976369731f, -0.216106797f,
+    0.976700086f, -0.214608811f,
+    0.977028143f, -0.213110320f,
+    0.977353900f, -0.211611327f,
+    0.977677358f, -0.210111837f,
+    0.977998515f, -0.208611852f,
+    0.978317371f, -0.207111376f,
+    0.978633924f, -0.205610413f,
+    0.978948175f, -0.204108966f,
+    0.979260123f, -0.202607039f,
+    0.979569766f, -0.201104635f,
+    0.979877104f, -0.199601758f,
+    0.980182136f, -0.198098411f,
+    0.980484862f, -0.196594598f,
+    0.980785280f, -0.195090322f,
+    0.981083391f, -0.193585587f,
+    0.981379193f, -0.192080397f,
+    0.981672686f, -0.190574755f,
+    0.981963869f, -0.189068664f,
+    0.982252741f, -0.187562129f,
+    0.982539302f, -0.186055152f,
+    0.982823551f, -0.184547737f,
+    0.983105487f, -0.183039888f,
+    0.983385110f, -0.181531608f,
+    0.983662419f, -0.180022901f,
+    0.983937413f, -0.178513771f,
+    0.984210092f, -0.177004220f,
+    0.984480455f, -0.175494253f,
+    0.984748502f, -0.173983873f,
+    0.985014231f, -0.172473084f,
+    0.985277642f, -0.170961889f,
+    0.985538735f, -0.169450291f,
+    0.985797509f, -0.167938295f,
+    0.986053963f, -0.166425904f,
+    0.986308097f, -0.164913120f,
+    0.986559910f, -0.163399949f,
+    0.986809402f, -0.161886394f,
+    0.987056571f, -0.160372457f,
+    0.987301418f, -0.158858143f,
+    0.987543942f, -0.157343456f,
+    0.987784142f, -0.155828398f,
+    0.988022017f, -0.154312973f,
+    0.988257568f, -0.152797185f,
+    0.988490793f, -0.151281038f,
+    0.988721692f, -0.149764535f,
+    0.988950265f, -0.148247679f,
+    0.989176510f, -0.146730474f,
+    0.989400428f, -0.145212925f,
+    0.989622017f, -0.143695033f,
+    0.989841278f, -0.142176804f,
+    0.990058210f, -0.140658239f,
+    0.990272812f, -0.139139344f,
+    0.990485084f, -0.137620122f,
+    0.990695025f, -0.136100575f,
+    0.990902635f, -0.134580709f,
+    0.991107914f, -0.133060525f,
+    0.991310860f, -0.131540029f,
+    0.991511473f, -0.130019223f,
+    0.991709754f, -0.128498111f,
+    0.991905700f, -0.126976696f,
+    0.992099313f, -0.125454983f,
+    0.992290591f, -0.123932975f,
+    0.992479535f, -0.122410675f,
+    0.992666142f, -0.120888087f,
+    0.992850414f, -0.119365215f,
+    0.993032350f, -0.117842062f,
+    0.993211949f, -0.116318631f,
+    0.993389211f, -0.114794927f,
+    0.993564136f, -0.113270952f,
+    0.993736722f, -0.111746711f,
+    0.993906970f, -0.110222207f,
+    0.994074879f, -0.108697444f,
+    0.994240449f, -0.107172425f,
+    0.994403680f, -0.105647154f,
+    0.994564571f, -0.104121634f,
+    0.994723121f, -0.102595869f,
+    0.994879331f, -0.101069863f,
+    0.995033199f, -0.099543619f,
+    0.995184727f, -0.098017140f,
+    0.995333912f, -0.096490431f,
+    0.995480755f, -0.094963495f,
+    0.995625256f, -0.093436336f,
+    0.995767414f, -0.091908956f,
+    0.995907229f, -0.090381361f,
+    0.996044701f, -0.088853553f,
+    0.996179829f, -0.087325535f,
+    0.996312612f, -0.085797312f,
+    0.996443051f, -0.084268888f,
+    0.996571146f, -0.082740265f,
+    0.996696895f, -0.081211447f,
+    0.996820299f, -0.079682438f,
+    0.996941358f, -0.078153242f,
+    0.997060070f, -0.076623861f,
+    0.997176437f, -0.075094301f,
+    0.997290457f, -0.073564564f,
+    0.997402130f, -0.072034653f,
+    0.997511456f, -0.070504573f,
+    0.997618435f, -0.068974328f,
+    0.997723067f, -0.067443920f,
+    0.997825350f, -0.065913353f,
+    0.997925286f, -0.064382631f,
+    0.998022874f, -0.062851758f,
+    0.998118113f, -0.061320736f,
+    0.998211003f, -0.059789571f,
+    0.998301545f, -0.058258265f,
+    0.998389737f, -0.056726821f,
+    0.998475581f, -0.055195244f,
+    0.998559074f, -0.053663538f,
+    0.998640218f, -0.052131705f,
+    0.998719012f, -0.050599749f,
+    0.998795456f, -0.049067674f,
+    0.998869550f, -0.047535484f,
+    0.998941293f, -0.046003182f,
+    0.999010686f, -0.044470772f,
+    0.999077728f, -0.042938257f,
+    0.999142419f, -0.041405641f,
+    0.999204759f, -0.039872928f,
+    0.999264747f, -0.038340120f,
+    0.999322385f, -0.036807223f,
+    0.999377670f, -0.035274239f,
+    0.999430605f, -0.033741172f,
+    0.999481187f, -0.032208025f,
+    0.999529418f, -0.030674803f,
+    0.999575296f, -0.029141509f,
+    0.999618822f, -0.027608146f,
+    0.999659997f, -0.026074718f,
+    0.999698819f, -0.024541229f,
+    0.999735288f, -0.023007681f,
+    0.999769405f, -0.021474080f,
+    0.999801170f, -0.019940429f,
+    0.999830582f, -0.018406730f,
+    0.999857641f, -0.016872988f,
+    0.999882347f, -0.015339206f,
+    0.999904701f, -0.013805389f,
+    0.999924702f, -0.012271538f,
+    0.999942350f, -0.010737659f,
+    0.999957645f, -0.009203755f,
+    0.999970586f, -0.007669829f,
+    0.999981175f, -0.006135885f,
+    0.999989411f, -0.004601926f,
+    0.999995294f, -0.003067957f,
+    0.999998823f, -0.001533980f
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+
+
+/**
+  @brief  Q31 Twiddle factors Table
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre> for(i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_16_q31[24] = {
+    (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
+    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+    (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C,
+    (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+    (q31_t)0xA57D8666, (q31_t)0x5A82799A,
+    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+    (q31_t)0x80000000, (q31_t)0x00000000,
+    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2,
+    (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_32_q31[48] = {
+    (q31_t)0x7FFFFFFF, (q31_t)0x00000000,
+    (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+    (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+    (q31_t)0x6A6D98A4, (q31_t)0x471CECE6,
+    (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+    (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
+    (q31_t)0x30FBC54D, (q31_t)0x7641AF3C,
+    (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+    (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+    (q31_t)0xE70747C3, (q31_t)0x7D8A5F3F,
+    (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+    (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+    (q31_t)0xA57D8666, (q31_t)0x5A82799A,
+    (q31_t)0x9592675B, (q31_t)0x471CECE6,
+    (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+    (q31_t)0x8275A0C0, (q31_t)0x18F8B83C,
+    (q31_t)0x80000000, (q31_t)0x00000000,
+    (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+    (q31_t)0x89BE50C3, (q31_t)0xCF043AB2,
+    (q31_t)0x9592675B, (q31_t)0xB8E31319,
+    (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+    (q31_t)0xB8E31319, (q31_t)0x9592675B,
+    (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+    (q31_t)0xE70747C3, (q31_t)0x8275A0C0
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_64_q31[96] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7641AF3C,
+	(q31_t)0x30FBC54D, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x62F201AC,
+	(q31_t)0x5133CC94, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x471CECE6,
+	(q31_t)0x6A6D98A4, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x25280C5D,
+	(q31_t)0x7A7D055B, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x89BE50C3,
+	(q31_t)0x30FBC54D, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xF3742CA1, (q31_t)0x809DC970
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i < 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_128_q31[192] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FD8878D,
+	(q31_t)0x0647D97C, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7D8A5F3F,
+	(q31_t)0x18F8B83C, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x78848413,
+	(q31_t)0x2B1F34EB, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x70E2CBC6,
+	(q31_t)0x3C56BA70, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x66CF811F,
+	(q31_t)0x4C3FDFF3, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5A82799A,
+	(q31_t)0x5A82799A, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66CF811F, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3C56BA70,
+	(q31_t)0x70E2CBC6, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2B1F34EB,
+	(q31_t)0x78848413, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x18F8B83C,
+	(q31_t)0x7D8A5F3F, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0647D97C,
+	(q31_t)0x7FD8878D, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF3742CA1,
+	(q31_t)0x7F62368F, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE0E60684,
+	(q31_t)0x7C29FBEE, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xCF043AB2,
+	(q31_t)0x7641AF3C, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xBE31E19B,
+	(q31_t)0x6DCA0D14, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xAECC336B,
+	(q31_t)0x62F201AC, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA1288376,
+	(q31_t)0x55F5A4D2, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9592675B,
+	(q31_t)0x471CECE6, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8C4A142F,
+	(q31_t)0x36BA2013, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8582FAA4,
+	(q31_t)0x25280C5D, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x8162AA03,
+	(q31_t)0x12C8106E, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80000000,
+	(q31_t)0x00000000, (q31_t)0x80277872, (q31_t)0xF9B82683,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x8162AA03,
+	(q31_t)0xED37EF91, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x8582FAA4,
+	(q31_t)0xDAD7F3A2, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8C4A142F,
+	(q31_t)0xC945DFEC, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9592675B,
+	(q31_t)0xB8E31319, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0xA1288376,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAECC336B,
+	(q31_t)0x9D0DFE53, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBE31E19B,
+	(q31_t)0x9235F2EB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCF043AB2,
+	(q31_t)0x89BE50C3, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xE0E60684,
+	(q31_t)0x83D60411, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF3742CA1,
+	(q31_t)0x809DC970, (q31_t)0xF9B82683, (q31_t)0x80277872
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
+const q31_t twiddleCoef_256_q31[384] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FF62182,
+	(q31_t)0x03242ABF, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E1D93E9,
+	(q31_t)0x15E21444, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C29FBEE,
+	(q31_t)0x1F19F97B, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x798A23B1,
+	(q31_t)0x2826B928, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7641AF3C,
+	(q31_t)0x30FBC54D, (q31_t)0x7504D345, (q31_t)0x33DEF287,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x72552C84,
+	(q31_t)0x398CDD32, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6DCA0D14,
+	(q31_t)0x41CE1E64, (q31_t)0x6C242960, (q31_t)0x447ACD50,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x68A69E81,
+	(q31_t)0x49B41533, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x62F201AC,
+	(q31_t)0x5133CC94, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5CB420DF,
+	(q31_t)0x5842DD54, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x55F5A4D2,
+	(q31_t)0x5ED77C89, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4EBFE8A4,
+	(q31_t)0x64E88926, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x471CECE6,
+	(q31_t)0x6A6D98A4, (q31_t)0x447ACD50, (q31_t)0x6C242960,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x3F1749B7,
+	(q31_t)0x6F5F02B1, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x36BA2013,
+	(q31_t)0x73B5EBD0, (q31_t)0x33DEF287, (q31_t)0x7504D345,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2E110A62,
+	(q31_t)0x776C4EDB, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x25280C5D,
+	(q31_t)0x7A7D055B, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1C0B826A,
+	(q31_t)0x7CE3CEB1, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x12C8106E,
+	(q31_t)0x7E9D55FC, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x096A9049,
+	(q31_t)0x7FA736B4, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF6956FB6,
+	(q31_t)0x7FA736B4, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xED37EF91,
+	(q31_t)0x7E9D55FC, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE3F47D95,
+	(q31_t)0x7CE3CEB1, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD1EEF59E,
+	(q31_t)0x776C4EDB, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xC945DFEC,
+	(q31_t)0x73B5EBD0, (q31_t)0xC67322CD, (q31_t)0x72552C84,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC0E8B648,
+	(q31_t)0x6F5F02B1, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB140175B,
+	(q31_t)0x64E88926, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAA0A5B2D,
+	(q31_t)0x5ED77C89, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA34BDF20,
+	(q31_t)0x5842DD54, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9759617E,
+	(q31_t)0x49B41533, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9235F2EB,
+	(q31_t)0x41CE1E64, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8DAAD37B,
+	(q31_t)0x398CDD32, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x89BE50C3,
+	(q31_t)0x30FBC54D, (q31_t)0x8893B124, (q31_t)0x2E110A62,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8675DC4E,
+	(q31_t)0x2826B928, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x83D60411,
+	(q31_t)0x1F19F97B, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x81E26C16,
+	(q31_t)0x15E21444, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x8058C94C, (q31_t)0x096A9049,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8009DE7D,
+	(q31_t)0x03242ABF, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80277872,
+	(q31_t)0xF9B82683, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80F66E3C,
+	(q31_t)0xF054D8D4, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x84A2FC62,
+	(q31_t)0xDDDC5B3A, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x877B7BEC,
+	(q31_t)0xD4E0CB14, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC210D78, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x93DBD69F,
+	(q31_t)0xBB8532AF, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x99307EE0,
+	(q31_t)0xB3C0200C, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9F13C7D0,
+	(q31_t)0xAC64D510, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAC64D510,
+	(q31_t)0x9F13C7D0, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB3C0200C,
+	(q31_t)0x99307EE0, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBB8532AF,
+	(q31_t)0x93DBD69F, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCC210D78,
+	(q31_t)0x8AFB2CBA, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD4E0CB14,
+	(q31_t)0x877B7BEC, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84A2FC62, (q31_t)0xE0E60684, (q31_t)0x83D60411,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xF054D8D4,
+	(q31_t)0x80F66E3C, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF9B82683,
+	(q31_t)0x80277872, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
+const q31_t twiddleCoef_512_q31[768] = {
+    (q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFD885A,
+	(q31_t)0x01921D1F, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FD8878D,
+	(q31_t)0x0647D97C, (q31_t)0x7FC25596, (q31_t)0x07D95B9E,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F872BF3,
+	(q31_t)0x0AFB6805, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F0991C3,
+	(q31_t)0x0FAB272B, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E5FE493,
+	(q31_t)0x145576B1, (q31_t)0x7E1D93E9, (q31_t)0x15E21444,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7D8A5F3F,
+	(q31_t)0x18F8B83C, (q31_t)0x7D3980EC, (q31_t)0x1A82A025,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7C894BDD,
+	(q31_t)0x1D934FE5, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
+	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B5D039D,
+	(q31_t)0x2223A4C5, (q31_t)0x7AEF6323, (q31_t)0x23A6887E,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A05EEAD,
+	(q31_t)0x26A82185, (q31_t)0x798A23B1, (q31_t)0x2826B928,
+	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78848413,
+	(q31_t)0x2B1F34EB, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x76D94988,
+	(q31_t)0x2F875262, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7504D345,
+	(q31_t)0x33DEF287, (q31_t)0x745F9DD1, (q31_t)0x354D9056,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x7307C3D0,
+	(q31_t)0x382493B0, (q31_t)0x72552C84, (q31_t)0x398CDD32,
+	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x70E2CBC6,
+	(q31_t)0x3C56BA70, (q31_t)0x70231099, (q31_t)0x3DB832A5,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6E96A99C,
+	(q31_t)0x4073F21D, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
+	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C242960,
+	(q31_t)0x447ACD50, (q31_t)0x6B4AF278, (q31_t)0x45CD358F,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x698C246C,
+	(q31_t)0x4869E664, (q31_t)0x68A69E81, (q31_t)0x49B41533,
+	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x66CF811F,
+	(q31_t)0x4C3FDFF3, (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x63EF328F,
+	(q31_t)0x4FFB654D, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
+	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x60EC3830,
+	(q31_t)0x539B2AEF, (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5DC79D7C,
+	(q31_t)0x571DEEF9, (q31_t)0x5CB420DF, (q31_t)0x5842DD54,
+	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5A82799A,
+	(q31_t)0x5A82799A, (q31_t)0x59646497, (q31_t)0x5B9D1153,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x571DEEF9,
+	(q31_t)0x5DC79D7C, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
+	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x539B2AEF,
+	(q31_t)0x60EC3830, (q31_t)0x5269126E, (q31_t)0x61F1003E,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x4FFB654D,
+	(q31_t)0x63EF328F, (q31_t)0x4EBFE8A4, (q31_t)0x64E88926,
+	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66CF811F, (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4869E664,
+	(q31_t)0x698C246C, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
+	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x447ACD50,
+	(q31_t)0x6C242960, (q31_t)0x4325C135, (q31_t)0x6CF934FB,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4073F21D,
+	(q31_t)0x6E96A99C, (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1,
+	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3C56BA70,
+	(q31_t)0x70E2CBC6, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x382493B0,
+	(q31_t)0x7307C3D0, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
+	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x33DEF287,
+	(q31_t)0x7504D345, (q31_t)0x326E54C7, (q31_t)0x75A585CF,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x2F875262,
+	(q31_t)0x76D94988, (q31_t)0x2E110A62, (q31_t)0x776C4EDB,
+	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2B1F34EB,
+	(q31_t)0x78848413, (q31_t)0x29A3C484, (q31_t)0x7909A92C,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x26A82185,
+	(q31_t)0x7A05EEAD, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
+	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2223A4C5,
+	(q31_t)0x7B5D039D, (q31_t)0x209F701C, (q31_t)0x7BC5E28F,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1D934FE5,
+	(q31_t)0x7C894BDD, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1,
+	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x18F8B83C,
+	(q31_t)0x7D8A5F3F, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x145576B1,
+	(q31_t)0x7E5FE493, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x0FAB272B,
+	(q31_t)0x7F0991C3, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0AFB6805,
+	(q31_t)0x7F872BF3, (q31_t)0x096A9049, (q31_t)0x7FA736B4,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0647D97C,
+	(q31_t)0x7FD8878D, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x01921D1F,
+	(q31_t)0x7FFD885A, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFCDBD541,
+	(q31_t)0x7FF62182, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF826A461,
+	(q31_t)0x7FC25596, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF3742CA1,
+	(q31_t)0x7F62368F, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEEC60F31,
+	(q31_t)0x7ED5E5C6, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEA1DEBBB,
+	(q31_t)0x7E1D93E9, (q31_t)0xE8922621, (q31_t)0x7DD6668E,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE57D5FDA,
+	(q31_t)0x7D3980EC, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE0E60684,
+	(q31_t)0x7C29FBEE, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDC597781,
+	(q31_t)0x7AEF6323, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD7D946D7,
+	(q31_t)0x798A23B1, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD3670445,
+	(q31_t)0x77FAB988, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCF043AB2,
+	(q31_t)0x7641AF3C, (q31_t)0xCD91AB38, (q31_t)0x75A585CF,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCAB26FA9,
+	(q31_t)0x745F9DD1, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC67322CD,
+	(q31_t)0x72552C84, (q31_t)0xC50D1148, (q31_t)0x719E2CD2,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC247CD5A,
+	(q31_t)0x70231099, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBE31E19B,
+	(q31_t)0x6DCA0D14, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBA32CA70,
+	(q31_t)0x6B4AF278, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB64BEACC,
+	(q31_t)0x68A69E81, (q31_t)0xB5049368, (q31_t)0x67BD0FBC,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB27E9D3B,
+	(q31_t)0x65DDFBD3, (q31_t)0xB140175B, (q31_t)0x64E88926,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAECC336B,
+	(q31_t)0x62F201AC, (q31_t)0xAD96ED91, (q31_t)0x61F1003E,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAB35F5B5,
+	(q31_t)0x5FE3B38D, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA7BD22AB,
+	(q31_t)0x5CB420DF, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA462EEAC,
+	(q31_t)0x59646497, (q31_t)0xA34BDF20, (q31_t)0x5842DD54,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1288376,
+	(q31_t)0x55F5A4D2, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E0EFFC1,
+	(q31_t)0x5269126E, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B1776D9,
+	(q31_t)0x4EBFE8A4, (q31_t)0x9A22042C, (q31_t)0x4D8162C4,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9842F043,
+	(q31_t)0x4AFB6C97, (q31_t)0x9759617E, (q31_t)0x49B41533,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x9592675B,
+	(q31_t)0x471CECE6, (q31_t)0x94B50D87, (q31_t)0x45CD358F,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9306CB04,
+	(q31_t)0x4325C135, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x90A0FD4E,
+	(q31_t)0x3F1749B7, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8E61D32D,
+	(q31_t)0x3AF2EEB7, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32,
+	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8C4A142F,
+	(q31_t)0x36BA2013, (q31_t)0x8BA0622F, (q31_t)0x354D9056,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8A5A7A30,
+	(q31_t)0x326E54C7, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x8893B124,
+	(q31_t)0x2E110A62, (q31_t)0x88054677, (q31_t)0x2C98FBBA,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x86F656D3,
+	(q31_t)0x29A3C484, (q31_t)0x8675DC4E, (q31_t)0x2826B928,
+	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x8582FAA4,
+	(q31_t)0x25280C5D, (q31_t)0x85109CDC, (q31_t)0x23A6887E,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x843A1D70,
+	(q31_t)0x209F701C, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
+	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x831C314E,
+	(q31_t)0x1C0B826A, (q31_t)0x82C67F13, (q31_t)0x1A82A025,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82299971,
+	(q31_t)0x176DD9DE, (q31_t)0x81E26C16, (q31_t)0x15E21444,
+	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8162AA03,
+	(q31_t)0x12C8106E, (q31_t)0x812A1A39, (q31_t)0x1139F0CE,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80C7A80A,
+	(q31_t)0x0E1BC2E3, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x8058C94C,
+	(q31_t)0x096A9049, (q31_t)0x803DAA69, (q31_t)0x07D95B9E,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80163440,
+	(q31_t)0x04B6195D, (q31_t)0x8009DE7D, (q31_t)0x03242ABF,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80000000,
+	(q31_t)0x00000000, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x80163440,
+	(q31_t)0xFB49E6A2, (q31_t)0x80277872, (q31_t)0xF9B82683,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8058C94C,
+	(q31_t)0xF6956FB6, (q31_t)0x8078D40D, (q31_t)0xF50497FA,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80C7A80A,
+	(q31_t)0xF1E43D1C, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8162AA03,
+	(q31_t)0xED37EF91, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82299971,
+	(q31_t)0xE8922621, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x831C314E,
+	(q31_t)0xE3F47D95, (q31_t)0x8376B422, (q31_t)0xE26CB01A,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x843A1D70,
+	(q31_t)0xDF608FE3, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8582FAA4,
+	(q31_t)0xDAD7F3A2, (q31_t)0x85FA1152, (q31_t)0xD957DE7A,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86F656D3,
+	(q31_t)0xD65C3B7B, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8893B124,
+	(q31_t)0xD1EEF59E, (q31_t)0x8926B677, (q31_t)0xD078AD9D,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A5A7A30,
+	(q31_t)0xCD91AB38, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8C4A142F,
+	(q31_t)0xC945DFEC, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E61D32D,
+	(q31_t)0xC50D1148, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x90A0FD4E,
+	(q31_t)0xC0E8B648, (q31_t)0x91695663, (q31_t)0xBF8C0DE2,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9306CB04,
+	(q31_t)0xBCDA3ECA, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9592675B,
+	(q31_t)0xB8E31319, (q31_t)0x9673DB94, (q31_t)0xB796199B,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x9842F043,
+	(q31_t)0xB5049368, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9B1776D9,
+	(q31_t)0xB140175B, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9E0EFFC1,
+	(q31_t)0xAD96ED91, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA1288376,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA2386283, (q31_t)0xA8E21106,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA462EEAC,
+	(q31_t)0xA69B9B68, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA7BD22AB,
+	(q31_t)0xA34BDF20, (q31_t)0xA8E21106, (q31_t)0xA2386283,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAB35F5B5,
+	(q31_t)0xA01C4C72, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAECC336B,
+	(q31_t)0x9D0DFE53, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB27E9D3B,
+	(q31_t)0x9A22042C, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB64BEACC,
+	(q31_t)0x9759617E, (q31_t)0xB796199B, (q31_t)0x9673DB94,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xBA32CA70,
+	(q31_t)0x94B50D87, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBE31E19B,
+	(q31_t)0x9235F2EB, (q31_t)0xBF8C0DE2, (q31_t)0x91695663,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC247CD5A,
+	(q31_t)0x8FDCEF66, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC67322CD,
+	(q31_t)0x8DAAD37B, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xCAB26FA9,
+	(q31_t)0x8BA0622F, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCF043AB2,
+	(q31_t)0x89BE50C3, (q31_t)0xD078AD9D, (q31_t)0x8926B677,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD3670445,
+	(q31_t)0x88054677, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD7D946D7,
+	(q31_t)0x8675DC4E, (q31_t)0xD957DE7A, (q31_t)0x85FA1152,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDC597781,
+	(q31_t)0x85109CDC, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE0E60684,
+	(q31_t)0x83D60411, (q31_t)0xE26CB01A, (q31_t)0x8376B422,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE57D5FDA,
+	(q31_t)0x82C67F13, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xEA1DEBBB,
+	(q31_t)0x81E26C16, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEEC60F31,
+	(q31_t)0x812A1A39, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF3742CA1,
+	(q31_t)0x809DC970, (q31_t)0xF50497FA, (q31_t)0x8078D40D,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF826A461,
+	(q31_t)0x803DAA69, (q31_t)0xF9B82683, (q31_t)0x80277872,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFCDBD541,
+	(q31_t)0x8009DE7D, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ 
+ */
+const q31_t twiddleCoef_1024_q31[1536] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFF6216,
+	(q31_t)0x00C90F88, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
+	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF62182,
+	(q31_t)0x03242ABF, (q31_t)0x7FF09477, (q31_t)0x03ED26E6,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE1C76B,
+	(q31_t)0x057F0034, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC25596,
+	(q31_t)0x07D95B9E, (q31_t)0x7FB563B2, (q31_t)0x08A2009A,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F97CEBC,
+	(q31_t)0x0A3308BC, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805,
+	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2191B4,
+	(q31_t)0x0EE38765, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
+	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7ED5E5C6,
+	(q31_t)0x1139F0CE, (q31_t)0x7EBA3A39, (q31_t)0x120116D4,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E7F3956,
+	(q31_t)0x138EDBB0, (q31_t)0x7E5FE493, (q31_t)0x145576B1,
+	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E1D93E9,
+	(q31_t)0x15E21444, (q31_t)0x7DFA98A7, (q31_t)0x16A81305,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DB0FDF7,
+	(q31_t)0x183366E8, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D3980EC,
+	(q31_t)0x1A82A025, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CB72724,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C29FBEE,
+	(q31_t)0x1F19F97B, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A,
+	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7B920B89,
+	(q31_t)0x2161B39F, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
+	(q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7AEF6323,
+	(q31_t)0x23A6887E, (q31_t)0x7AB6CBA3, (q31_t)0x24677757,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A4210D8,
+	(q31_t)0x25E845B5, (q31_t)0x7A05EEAD, (q31_t)0x26A82185,
+	(q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x798A23B1,
+	(q31_t)0x2826B928, (q31_t)0x794A7C11, (q31_t)0x28E5714A,
+	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78C7ABA1,
+	(q31_t)0x2A61B101, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
+	(q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x77FAB988,
+	(q31_t)0x2C98FBBA, (q31_t)0x77B417DF, (q31_t)0x2D553AFB,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x77235F2D,
+	(q31_t)0x2ECC681E, (q31_t)0x76D94988, (q31_t)0x2F875262,
+	(q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x7641AF3C,
+	(q31_t)0x30FBC54D, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D,
+	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7555BD4B,
+	(q31_t)0x3326E2C2, (q31_t)0x7504D345, (q31_t)0x33DEF287,
+	(q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x745F9DD1,
+	(q31_t)0x354D9056, (q31_t)0x740B53FA, (q31_t)0x36041AD9,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x735F6626,
+	(q31_t)0x376F9E46, (q31_t)0x7307C3D0, (q31_t)0x382493B0,
+	(q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72552C84,
+	(q31_t)0x398CDD32, (q31_t)0x71FA3948, (q31_t)0x3A402DD1,
+	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x71410804,
+	(q31_t)0x3BA51E29, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
+	(q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70231099,
+	(q31_t)0x3DB832A5, (q31_t)0x6FC19385, (q31_t)0x3E680B2C,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6EFB5F12,
+	(q31_t)0x3FC5EC97, (q31_t)0x6E96A99C, (q31_t)0x4073F21D,
+	(q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6DCA0D14,
+	(q31_t)0x41CE1E64, (q31_t)0x6D6227FA, (q31_t)0x427A41D0,
+	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6C8F351C,
+	(q31_t)0x43D09AEC, (q31_t)0x6C242960, (q31_t)0x447ACD50,
+	(q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B4AF278,
+	(q31_t)0x45CD358F, (q31_t)0x6ADCC964, (q31_t)0x46756827,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x69FD614A,
+	(q31_t)0x47C3C22E, (q31_t)0x698C246C, (q31_t)0x4869E664,
+	(q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68A69E81,
+	(q31_t)0x49B41533, (q31_t)0x683257AA, (q31_t)0x4A581C9D,
+	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x6746C7D7,
+	(q31_t)0x4B9E038F, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x65DDFBD3,
+	(q31_t)0x4D8162C4, (q31_t)0x6563BF92, (q31_t)0x4E210617,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x646C59BF,
+	(q31_t)0x4F5E08E3, (q31_t)0x63EF328F, (q31_t)0x4FFB654D,
+	(q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x62F201AC,
+	(q31_t)0x5133CC94, (q31_t)0x6271FA69, (q31_t)0x51CED46E,
+	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x616F146B,
+	(q31_t)0x53028517, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
+	(q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x5FE3B38D,
+	(q31_t)0x54CA0A4A, (q31_t)0x5F5E0DB3, (q31_t)0x556040E2,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E50015D,
+	(q31_t)0x568A34A9, (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9,
+	(q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5CB420DF,
+	(q31_t)0x5842DD54, (q31_t)0x5C290ACC, (q31_t)0x58D40E8C,
+	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B1035CF,
+	(q31_t)0x59F3DE12, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+	(q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59646497,
+	(q31_t)0x5B9D1153, (q31_t)0x58D40E8C, (q31_t)0x5C290ACC,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57B0D256,
+	(q31_t)0x5D3E5236, (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C,
+	(q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x55F5A4D2,
+	(q31_t)0x5ED77C89, (q31_t)0x556040E2, (q31_t)0x5F5E0DB3,
+	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x5433027D,
+	(q31_t)0x60686CCE, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
+	(q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x5269126E,
+	(q31_t)0x61F1003E, (q31_t)0x51CED46E, (q31_t)0x6271FA69,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x5097FC5E,
+	(q31_t)0x637114CC, (q31_t)0x4FFB654D, (q31_t)0x63EF328F,
+	(q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4EBFE8A4,
+	(q31_t)0x64E88926, (q31_t)0x4E210617, (q31_t)0x6563BF92,
+	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4CE10034,
+	(q31_t)0x66573CBB, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
+	(q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4AFB6C97,
+	(q31_t)0x67BD0FBC, (q31_t)0x4A581C9D, (q31_t)0x683257AA,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x490F57EE,
+	(q31_t)0x6919E320, (q31_t)0x4869E664, (q31_t)0x698C246C,
+	(q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x471CECE6,
+	(q31_t)0x6A6D98A4, (q31_t)0x46756827, (q31_t)0x6ADCC964,
+	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x452456BC,
+	(q31_t)0x6BB812D0, (q31_t)0x447ACD50, (q31_t)0x6C242960,
+	(q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x4325C135,
+	(q31_t)0x6CF934FB, (q31_t)0x427A41D0, (q31_t)0x6D6227FA,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4121589A,
+	(q31_t)0x6E30E349, (q31_t)0x4073F21D, (q31_t)0x6E96A99C,
+	(q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F1749B7,
+	(q31_t)0x6F5F02B1, (q31_t)0x3E680B2C, (q31_t)0x6FC19385,
+	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D07C1D5,
+	(q31_t)0x708378FE, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
+	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3AF2EEB7,
+	(q31_t)0x719E2CD2, (q31_t)0x3A402DD1, (q31_t)0x71FA3948,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x38D8FE93,
+	(q31_t)0x72AF05A6, (q31_t)0x382493B0, (q31_t)0x7307C3D0,
+	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x36BA2013,
+	(q31_t)0x73B5EBD0, (q31_t)0x36041AD9, (q31_t)0x740B53FA,
+	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x3496824F,
+	(q31_t)0x74B2C883, (q31_t)0x33DEF287, (q31_t)0x7504D345,
+	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x326E54C7,
+	(q31_t)0x75A585CF, (q31_t)0x31B54A5D, (q31_t)0x75F42C0A,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x3041C760,
+	(q31_t)0x768E0EA5, (q31_t)0x2F875262, (q31_t)0x76D94988,
+	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E110A62,
+	(q31_t)0x776C4EDB, (q31_t)0x2D553AFB, (q31_t)0x77B417DF,
+	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2BDC4E6F,
+	(q31_t)0x78403328, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
+	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x29A3C484,
+	(q31_t)0x7909A92C, (q31_t)0x28E5714A, (q31_t)0x794A7C11,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27679DF4,
+	(q31_t)0x79C89F6D, (q31_t)0x26A82185, (q31_t)0x7A05EEAD,
+	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x25280C5D,
+	(q31_t)0x7A7D055B, (q31_t)0x24677757, (q31_t)0x7AB6CBA3,
+	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x22E541AE,
+	(q31_t)0x7B26CB4F, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
+	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x209F701C,
+	(q31_t)0x7BC5E28F, (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1E56CA1E,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1D934FE5, (q31_t)0x7C894BDD,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C0B826A,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1B4732EF, (q31_t)0x7D0F4218,
+	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x19BDCBF2,
+	(q31_t)0x7D628AC5, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x176DD9DE,
+	(q31_t)0x7DD6668E, (q31_t)0x16A81305, (q31_t)0x7DFA98A7,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x151BDF85,
+	(q31_t)0x7E3F57FE, (q31_t)0x145576B1, (q31_t)0x7E5FE493,
+	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x12C8106E,
+	(q31_t)0x7E9D55FC, (q31_t)0x120116D4, (q31_t)0x7EBA3A39,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x1072A047,
+	(q31_t)0x7EF0585F, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
+	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E1BC2E3,
+	(q31_t)0x7F3857F5, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0BC3AC35,
+	(q31_t)0x7F754E7F, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3,
+	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x096A9049,
+	(q31_t)0x7FA736B4, (q31_t)0x08A2009A, (q31_t)0x7FB563B2,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x0710A344,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
+	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x04B6195D,
+	(q31_t)0x7FE9CBC0, (q31_t)0x03ED26E6, (q31_t)0x7FF09477,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x025B26D7,
+	(q31_t)0x7FFA72D1, (q31_t)0x01921D1F, (q31_t)0x7FFD885A,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xFF36F078, (q31_t)0x7FFF6216,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFDA4D928,
+	(q31_t)0x7FFA72D1, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
+	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFB49E6A2,
+	(q31_t)0x7FE9CBC0, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF8EF5CBB,
+	(q31_t)0x7FCE0C3E, (q31_t)0xF826A461, (q31_t)0x7FC25596,
+	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6956FB6,
+	(q31_t)0x7FA736B4, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF43C53CA,
+	(q31_t)0x7F754E7F, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF1E43D1C,
+	(q31_t)0x7F3857F5, (q31_t)0xF11C789A, (q31_t)0x7F2191B4,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEF8D5FB8,
+	(q31_t)0x7EF0585F, (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6,
+	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xED37EF91,
+	(q31_t)0x7E9D55FC, (q31_t)0xEC71244F, (q31_t)0x7E7F3956,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEAE4207A,
+	(q31_t)0x7E3F57FE, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
+	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE8922621,
+	(q31_t)0x7DD6668E, (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE642340D,
+	(q31_t)0x7D628AC5, (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC,
+	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE3F47D95,
+	(q31_t)0x7CE3CEB1, (q31_t)0xE330734C, (q31_t)0x7CB72724,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE1A935E1,
+	(q31_t)0x7C5A3D4F, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
+	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDF608FE3,
+	(q31_t)0x7BC5E28F, (q31_t)0xDE9E4C60, (q31_t)0x7B920B89,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD1ABE51,
+	(q31_t)0x7B26CB4F, (q31_t)0xDC597781, (q31_t)0x7AEF6323,
+	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD898620C,
+	(q31_t)0x79C89F6D, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
+	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD65C3B7B,
+	(q31_t)0x7909A92C, (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD423B190,
+	(q31_t)0x78403328, (q31_t)0xD3670445, (q31_t)0x77FAB988,
+	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD1EEF59E,
+	(q31_t)0x776C4EDB, (q31_t)0xD13397E1, (q31_t)0x77235F2D,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xCFBE389F,
+	(q31_t)0x768E0EA5, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCD91AB38,
+	(q31_t)0x75A585CF, (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCB697DB0,
+	(q31_t)0x74B2C883, (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1,
+	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC945DFEC,
+	(q31_t)0x73B5EBD0, (q31_t)0xC89061BA, (q31_t)0x735F6626,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC727016C,
+	(q31_t)0x72AF05A6, (q31_t)0xC67322CD, (q31_t)0x72552C84,
+	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC50D1148,
+	(q31_t)0x719E2CD2, (q31_t)0xC45AE1D7, (q31_t)0x71410804,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC2F83E2A,
+	(q31_t)0x708378FE, (q31_t)0xC247CD5A, (q31_t)0x70231099,
+	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC0E8B648,
+	(q31_t)0x6F5F02B1, (q31_t)0xC03A1368, (q31_t)0x6EFB5F12,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBEDEA765,
+	(q31_t)0x6E30E349, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
+	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBCDA3ECA,
+	(q31_t)0x6CF934FB, (q31_t)0xBC2F6513, (q31_t)0x6C8F351C,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBADBA943,
+	(q31_t)0x6BB812D0, (q31_t)0xBA32CA70, (q31_t)0x6B4AF278,
+	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xB83C3DD1, (q31_t)0x69FD614A,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB6F0A811,
+	(q31_t)0x6919E320, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
+	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB5049368,
+	(q31_t)0x67BD0FBC, (q31_t)0xB461FC70, (q31_t)0x6746C7D7,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB31EFFCB,
+	(q31_t)0x66573CBB, (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3,
+	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB140175B,
+	(q31_t)0x64E88926, (q31_t)0xB0A1F71C, (q31_t)0x646C59BF,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAF6803A1,
+	(q31_t)0x637114CC, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xAD96ED91,
+	(q31_t)0x61F1003E, (q31_t)0xACFD7AE8, (q31_t)0x616F146B,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xABCCFD82,
+	(q31_t)0x60686CCE, (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D,
+	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA0A5B2D,
+	(q31_t)0x5ED77C89, (q31_t)0xA975CB56, (q31_t)0x5E50015D,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA84F2DA9,
+	(q31_t)0x5D3E5236, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
+	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA69B9B68,
+	(q31_t)0x5B9D1153, (q31_t)0xA60C21ED, (q31_t)0x5B1035CF,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA4EFCA31,
+	(q31_t)0x59F3DE12, (q31_t)0xA462EEAC, (q31_t)0x59646497,
+	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA34BDF20,
+	(q31_t)0x5842DD54, (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1AFFEA2,
+	(q31_t)0x568A34A9, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
+	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA01C4C72,
+	(q31_t)0x54CA0A4A, (q31_t)0x9F979331, (q31_t)0x5433027D,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9E90EB94,
+	(q31_t)0x53028517, (q31_t)0x9E0EFFC1, (q31_t)0x5269126E,
+	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9B93A640,
+	(q31_t)0x4F5E08E3, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
+	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A22042C,
+	(q31_t)0x4D8162C4, (q31_t)0x99A8C344, (q31_t)0x4CE10034,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98B93828,
+	(q31_t)0x4B9E038F, (q31_t)0x9842F043, (q31_t)0x4AFB6C97,
+	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x9759617E,
+	(q31_t)0x49B41533, (q31_t)0x96E61CDF, (q31_t)0x490F57EE,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x96029EB5,
+	(q31_t)0x47C3C22E, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x94B50D87,
+	(q31_t)0x45CD358F, (q31_t)0x9447ED2F, (q31_t)0x452456BC,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x9370CAE4,
+	(q31_t)0x43D09AEC, (q31_t)0x9306CB04, (q31_t)0x4325C135,
+	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9235F2EB,
+	(q31_t)0x41CE1E64, (q31_t)0x91CF1CB6, (q31_t)0x4121589A,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9104A0ED,
+	(q31_t)0x3FC5EC97, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
+	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x8FDCEF66,
+	(q31_t)0x3DB832A5, (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EBEF7FB,
+	(q31_t)0x3BA51E29, (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7,
+	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DAAD37B,
+	(q31_t)0x398CDD32, (q31_t)0x8D50FA59, (q31_t)0x38D8FE93,
+	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CA099D9,
+	(q31_t)0x376F9E46, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
+	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BA0622F,
+	(q31_t)0x354D9056, (q31_t)0x8B4D377C, (q31_t)0x3496824F,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AAA42B4,
+	(q31_t)0x3326E2C2, (q31_t)0x8A5A7A30, (q31_t)0x326E54C7,
+	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89BE50C3,
+	(q31_t)0x30FBC54D, (q31_t)0x8971F15A, (q31_t)0x3041C760,
+	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x88DCA0D3,
+	(q31_t)0x2ECC681E, (q31_t)0x8893B124, (q31_t)0x2E110A62,
+	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x88054677,
+	(q31_t)0x2C98FBBA, (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8738545E,
+	(q31_t)0x2A61B101, (q31_t)0x86F656D3, (q31_t)0x29A3C484,
+	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x8675DC4E,
+	(q31_t)0x2826B928, (q31_t)0x86376092, (q31_t)0x27679DF4,
+	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85BDEF27,
+	(q31_t)0x25E845B5, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
+	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x85109CDC,
+	(q31_t)0x23A6887E, (q31_t)0x84D934B0, (q31_t)0x22E541AE,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x846DF476,
+	(q31_t)0x2161B39F, (q31_t)0x843A1D70, (q31_t)0x209F701C,
+	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83D60411,
+	(q31_t)0x1F19F97B, (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E,
+	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x8348D8DB,
+	(q31_t)0x1CCF8CB3, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
+	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82C67F13,
+	(q31_t)0x1A82A025, (q31_t)0x829D753A, (q31_t)0x19BDCBF2,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x824F0208,
+	(q31_t)0x183366E8, (q31_t)0x82299971, (q31_t)0x176DD9DE,
+	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81E26C16,
+	(q31_t)0x15E21444, (q31_t)0x81C0A801, (q31_t)0x151BDF85,
+	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x8180C6A9,
+	(q31_t)0x138EDBB0, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
+	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x812A1A39,
+	(q31_t)0x1139F0CE, (q31_t)0x810FA7A0, (q31_t)0x1072A047,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80DE6E4C,
+	(q31_t)0x0EE38765, (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3,
+	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x808AB180, (q31_t)0x0BC3AC35,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80683143,
+	(q31_t)0x0A3308BC, (q31_t)0x8058C94C, (q31_t)0x096A9049,
+	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x803DAA69,
+	(q31_t)0x07D95B9E, (q31_t)0x8031F3C1, (q31_t)0x0710A344,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x801E3894,
+	(q31_t)0x057F0034, (q31_t)0x80163440, (q31_t)0x04B6195D,
+	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x8009DE7D,
+	(q31_t)0x03242ABF, (q31_t)0x80058D2E, (q31_t)0x025B26D7,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x80009DE9,
+	(q31_t)0x00C90F88, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x800277A5,
+	(q31_t)0xFE6DE2E0, (q31_t)0x80058D2E, (q31_t)0xFDA4D928,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800F6B88,
+	(q31_t)0xFC12D919, (q31_t)0x80163440, (q31_t)0xFB49E6A2,
+	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x80277872,
+	(q31_t)0xF9B82683, (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x804A9C4D,
+	(q31_t)0xF75DFF65, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
+	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x8078D40D,
+	(q31_t)0xF50497FA, (q31_t)0x808AB180, (q31_t)0xF43C53CA,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80B21BAF,
+	(q31_t)0xF2AC246D, (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C,
+	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80F66E3C,
+	(q31_t)0xF054D8D4, (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8145C5C6,
+	(q31_t)0xEDFEE92B, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
+	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81A01B6C,
+	(q31_t)0xEBAA894E, (q31_t)0x81C0A801, (q31_t)0xEAE4207A,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x82056758,
+	(q31_t)0xE957ECFB, (q31_t)0x82299971, (q31_t)0xE8922621,
+	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x829D753A, (q31_t)0xE642340D,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82F0BDE8,
+	(q31_t)0xE4B8CD10, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
+	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x8376B422,
+	(q31_t)0xE26CB01A, (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x840777CF,
+	(q31_t)0xE02323E5, (q31_t)0x843A1D70, (q31_t)0xDF608FE3,
+	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x84A2FC62,
+	(q31_t)0xDDDC5B3A, (q31_t)0x84D934B0, (q31_t)0xDD1ABE51,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x8549345C,
+	(q31_t)0xDB9888A8, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85FA1152,
+	(q31_t)0xD957DE7A, (q31_t)0x86376092, (q31_t)0xD898620C,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86B583EE,
+	(q31_t)0xD71A8EB5, (q31_t)0x86F656D3, (q31_t)0xD65C3B7B,
+	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x877B7BEC,
+	(q31_t)0xD4E0CB14, (q31_t)0x87BFCCD7, (q31_t)0xD423B190,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x884BE820,
+	(q31_t)0xD2AAC504, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
+	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x8926B677,
+	(q31_t)0xD078AD9D, (q31_t)0x8971F15A, (q31_t)0xCFBE389F,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x8A0BD3F5,
+	(q31_t)0xCE4AB5A2, (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38,
+	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC210D78, (q31_t)0x8B4D377C, (q31_t)0xCB697DB0,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BF4AC05,
+	(q31_t)0xC9FBE527, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
+	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CF83C30,
+	(q31_t)0xC7DB6C50, (q31_t)0x8D50FA59, (q31_t)0xC727016C,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8E05C6B7,
+	(q31_t)0xC5BFD22E, (q31_t)0x8E61D32D, (q31_t)0xC50D1148,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x903E6C7A,
+	(q31_t)0xC197F4D3, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
+	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x91695663,
+	(q31_t)0xBF8C0DE2, (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x929DD805,
+	(q31_t)0xBD85BE2F, (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA,
+	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x93DBD69F,
+	(q31_t)0xBB8532AF, (q31_t)0x9447ED2F, (q31_t)0xBADBA943,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x9523369B,
+	(q31_t)0xB98A97D8, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x9673DB94,
+	(q31_t)0xB796199B, (q31_t)0x96E61CDF, (q31_t)0xB6F0A811,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97CDA855,
+	(q31_t)0xB5A7E362, (q31_t)0x9842F043, (q31_t)0xB5049368,
+	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x99307EE0,
+	(q31_t)0xB3C0200C, (q31_t)0x99A8C344, (q31_t)0xB31EFFCB,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A9C406D,
+	(q31_t)0xB1DEF9E8, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
+	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9C10CD70,
+	(q31_t)0xB0049AB2, (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D8E0596,
+	(q31_t)0xAE312B91, (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91,
+	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9F13C7D0,
+	(q31_t)0xAC64D510, (q31_t)0x9F979331, (q31_t)0xABCCFD82,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA0A1F24C,
+	(q31_t)0xAA9FBF1D, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA2386283,
+	(q31_t)0xA8E21106, (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3D6F533,
+	(q31_t)0xA72BF173, (q31_t)0xA462EEAC, (q31_t)0xA69B9B68,
+	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA72BF173,
+	(q31_t)0xA3D6F533, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
+	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8E21106,
+	(q31_t)0xA2386283, (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA9FBF1D,
+	(q31_t)0xA0A1F24C, (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72,
+	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC64D510,
+	(q31_t)0x9F13C7D0, (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xAE312B91,
+	(q31_t)0x9D8E0596, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xB0049AB2,
+	(q31_t)0x9C10CD70, (q31_t)0xB0A1F71C, (q31_t)0x9B93A640,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB1DEF9E8,
+	(q31_t)0x9A9C406D, (q31_t)0xB27E9D3B, (q31_t)0x9A22042C,
+	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB3C0200C,
+	(q31_t)0x99307EE0, (q31_t)0xB461FC70, (q31_t)0x98B93828,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB5A7E362,
+	(q31_t)0x97CDA855, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
+	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB796199B,
+	(q31_t)0x9673DB94, (q31_t)0xB83C3DD1, (q31_t)0x96029EB5,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB98A97D8,
+	(q31_t)0x9523369B, (q31_t)0xBA32CA70, (q31_t)0x94B50D87,
+	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB8532AF,
+	(q31_t)0x93DBD69F, (q31_t)0xBC2F6513, (q31_t)0x9370CAE4,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD85BE2F,
+	(q31_t)0x929DD805, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
+	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF8C0DE2,
+	(q31_t)0x91695663, (q31_t)0xC03A1368, (q31_t)0x9104A0ED,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC197F4D3,
+	(q31_t)0x903E6C7A, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66,
+	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5BFD22E,
+	(q31_t)0x8E05C6B7, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
+	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7DB6C50,
+	(q31_t)0x8CF83C30, (q31_t)0xC89061BA, (q31_t)0x8CA099D9,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9FBE527,
+	(q31_t)0x8BF4AC05, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F,
+	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCC210D78,
+	(q31_t)0x8AFB2CBA, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCE4AB5A2,
+	(q31_t)0x8A0BD3F5, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD078AD9D,
+	(q31_t)0x8926B677, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD2AAC504,
+	(q31_t)0x884BE820, (q31_t)0xD3670445, (q31_t)0x88054677,
+	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD4E0CB14,
+	(q31_t)0x877B7BEC, (q31_t)0xD59E4EFE, (q31_t)0x8738545E,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD71A8EB5,
+	(q31_t)0x86B583EE, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
+	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD957DE7A,
+	(q31_t)0x85FA1152, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB9888A8,
+	(q31_t)0x8549345C, (q31_t)0xDC597781, (q31_t)0x85109CDC,
+	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84A2FC62, (q31_t)0xDE9E4C60, (q31_t)0x846DF476,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xE02323E5,
+	(q31_t)0x840777CF, (q31_t)0xE0E60684, (q31_t)0x83D60411,
+	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE26CB01A,
+	(q31_t)0x8376B422, (q31_t)0xE330734C, (q31_t)0x8348D8DB,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4B8CD10,
+	(q31_t)0x82F0BDE8, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13,
+	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xE7CC9917, (q31_t)0x824F0208,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE957ECFB,
+	(q31_t)0x82056758, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
+	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEBAA894E,
+	(q31_t)0x81A01B6C, (q31_t)0xEC71244F, (q31_t)0x8180C6A9,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xEDFEE92B,
+	(q31_t)0x8145C5C6, (q31_t)0xEEC60F31, (q31_t)0x812A1A39,
+	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xF054D8D4,
+	(q31_t)0x80F66E3C, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2AC246D,
+	(q31_t)0x80B21BAF, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
+	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF50497FA,
+	(q31_t)0x8078D40D, (q31_t)0xF5CCF743, (q31_t)0x80683143,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF75DFF65,
+	(q31_t)0x804A9C4D, (q31_t)0xF826A461, (q31_t)0x803DAA69,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9B82683,
+	(q31_t)0x80277872, (q31_t)0xFA80FFCB, (q31_t)0x801E3894,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFC12D919,
+	(q31_t)0x800F6B88, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D,
+	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE6DE2E0,
+	(q31_t)0x800277A5, (q31_t)0xFF36F078, (q31_t)0x80009DE9
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_2048_q31[3072] = {
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFD885,
+	(q31_t)0x006487E3, (q31_t)0x7FFF6216, (q31_t)0x00C90F88,
+	(q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFD885A,
+	(q31_t)0x01921D1F, (q31_t)0x7FFC250F, (q31_t)0x01F6A296,
+	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF871A1,
+	(q31_t)0x02BFA9A4, (q31_t)0x7FF62182, (q31_t)0x03242ABF,
+	(q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF09477,
+	(q31_t)0x03ED26E6, (q31_t)0x7FED5790, (q31_t)0x0451A176,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE5F108,
+	(q31_t)0x051A8E5C, (q31_t)0x7FE1C76B, (q31_t)0x057F0034,
+	(q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FD8878D,
+	(q31_t)0x0647D97C, (q31_t)0x7FD37152, (q31_t)0x06AC406F,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FC85853,
+	(q31_t)0x077501BE, (q31_t)0x7FC25596, (q31_t)0x07D95B9E,
+	(q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB563B2,
+	(q31_t)0x08A2009A, (q31_t)0x7FAE7494, (q31_t)0x09064B3A,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7F9FAA15,
+	(q31_t)0x09CECF89, (q31_t)0x7F97CEBC, (q31_t)0x0A3308BC,
+	(q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F872BF3,
+	(q31_t)0x0AFB6805, (q31_t)0x7F7E648B, (q31_t)0x0B5F8D9F,
+	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F6BE9D4,
+	(q31_t)0x0C27C389, (q31_t)0x7F62368F, (q31_t)0x0C8BD35E,
+	(q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F4DE450,
+	(q31_t)0x0D53DB92, (q31_t)0x7F434563, (q31_t)0x0DB7D376,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F2D1C0E,
+	(q31_t)0x0E7FA99D, (q31_t)0x7F2191B4, (q31_t)0x0EE38765,
+	(q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0991C3,
+	(q31_t)0x0FAB272B, (q31_t)0x7EFD1C3C, (q31_t)0x100EE8AD,
+	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE34635,
+	(q31_t)0x10D64DBC, (q31_t)0x7ED5E5C6, (q31_t)0x1139F0CE,
+	(q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EBA3A39,
+	(q31_t)0x120116D4, (q31_t)0x7EABEF2C, (q31_t)0x1264994E,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E8E6EB1,
+	(q31_t)0x132B7BF9, (q31_t)0x7E7F3956, (q31_t)0x138EDBB0,
+	(q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E5FE493,
+	(q31_t)0x145576B1, (q31_t)0x7E4FC53E, (q31_t)0x14B8B17F,
+	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E2E9CDF,
+	(q31_t)0x157F0086, (q31_t)0x7E1D93E9, (q31_t)0x15E21444,
+	(q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7DFA98A7,
+	(q31_t)0x16A81305, (q31_t)0x7DE8A670, (q31_t)0x170AFD8D,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DC3D90D,
+	(q31_t)0x17D0A7BB, (q31_t)0x7DB0FDF7, (q31_t)0x183366E8,
+	(q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D8A5F3F,
+	(q31_t)0x18F8B83C, (q31_t)0x7D769BB5, (q31_t)0x195B49E9,
+	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D4E2C7E,
+	(q31_t)0x1A203E1B, (q31_t)0x7D3980EC, (q31_t)0x1A82A025,
+	(q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D0F4218,
+	(q31_t)0x1B4732EF, (q31_t)0x7CF9AEF0, (q31_t)0x1BA96334,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CCDA168,
+	(q31_t)0x1C6D9053, (q31_t)0x7CB72724, (q31_t)0x1CCF8CB3,
+	(q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C894BDD,
+	(q31_t)0x1D934FE5, (q31_t)0x7C71EAF8, (q31_t)0x1DF5163F,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4242F2,
+	(q31_t)0x1EB86B46, (q31_t)0x7C29FBEE, (q31_t)0x1F19F97B,
+	(q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7BF88830,
+	(q31_t)0x1FDCDC1A, (q31_t)0x7BDF5B94, (q31_t)0x203E300D,
+	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BAC1D31,
+	(q31_t)0x21009C0B, (q31_t)0x7B920B89, (q31_t)0x2161B39F,
+	(q31_t)0x7B77ADA8, (q31_t)0x21C2B69C, (q31_t)0x7B5D039D,
+	(q31_t)0x2223A4C5, (q31_t)0x7B420D7A, (q31_t)0x22847DDF,
+	(q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B0B3D2C,
+	(q31_t)0x2345EFF7, (q31_t)0x7AEF6323, (q31_t)0x23A6887E,
+	(q31_t)0x7AD33D45, (q31_t)0x24070B07, (q31_t)0x7AB6CBA3,
+	(q31_t)0x24677757, (q31_t)0x7A9A0E4F, (q31_t)0x24C7CD32,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A5FB0D8,
+	(q31_t)0x2588349D, (q31_t)0x7A4210D8, (q31_t)0x25E845B5,
+	(q31_t)0x7A24256E, (q31_t)0x26483F6C, (q31_t)0x7A05EEAD,
+	(q31_t)0x26A82185, (q31_t)0x79E76CA6, (q31_t)0x2707EBC6,
+	(q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79A98715,
+	(q31_t)0x27C737D2, (q31_t)0x798A23B1, (q31_t)0x2826B928,
+	(q31_t)0x796A7554, (q31_t)0x288621B9, (q31_t)0x794A7C11,
+	(q31_t)0x28E5714A, (q31_t)0x792A37FE, (q31_t)0x2944A7A2,
+	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78E8CFB1,
+	(q31_t)0x2A02C7B8, (q31_t)0x78C7ABA1, (q31_t)0x2A61B101,
+	(q31_t)0x78A63D10, (q31_t)0x2AC08025, (q31_t)0x78848413,
+	(q31_t)0x2B1F34EB, (q31_t)0x786280BF, (q31_t)0x2B7DCF17,
+	(q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x781D9B64,
+	(q31_t)0x2C3AB2B9, (q31_t)0x77FAB988, (q31_t)0x2C98FBBA,
+	(q31_t)0x77D78DAA, (q31_t)0x2CF72939, (q31_t)0x77B417DF,
+	(q31_t)0x2D553AFB, (q31_t)0x7790583D, (q31_t)0x2DB330C7,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x7747FBCE,
+	(q31_t)0x2E6EC792, (q31_t)0x77235F2D, (q31_t)0x2ECC681E,
+	(q31_t)0x76FE790E, (q31_t)0x2F29EBCC, (q31_t)0x76D94988,
+	(q31_t)0x2F875262, (q31_t)0x76B3D0B3, (q31_t)0x2FE49BA6,
+	(q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x76680376,
+	(q31_t)0x309ED555, (q31_t)0x7641AF3C, (q31_t)0x30FBC54D,
+	(q31_t)0x761B1211, (q31_t)0x3158970D, (q31_t)0x75F42C0A,
+	(q31_t)0x31B54A5D, (q31_t)0x75CCFD42, (q31_t)0x3211DF03,
+	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x757DC5CA,
+	(q31_t)0x32CAAB6F, (q31_t)0x7555BD4B, (q31_t)0x3326E2C2,
+	(q31_t)0x752D6C6C, (q31_t)0x3382FA88, (q31_t)0x7504D345,
+	(q31_t)0x33DEF287, (q31_t)0x74DBF1EF, (q31_t)0x343ACA87,
+	(q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x7489571B,
+	(q31_t)0x34F219A7, (q31_t)0x745F9DD1, (q31_t)0x354D9056,
+	(q31_t)0x74359CBD, (q31_t)0x35A8E624, (q31_t)0x740B53FA,
+	(q31_t)0x36041AD9, (q31_t)0x73E0C3A3, (q31_t)0x365F2E3B,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x738ACC9E,
+	(q31_t)0x3714F02A, (q31_t)0x735F6626, (q31_t)0x376F9E46,
+	(q31_t)0x7333B883, (q31_t)0x37CA2A30, (q31_t)0x7307C3D0,
+	(q31_t)0x382493B0, (q31_t)0x72DB8828, (q31_t)0x387EDA8E,
+	(q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x72823C66,
+	(q31_t)0x3932FF87, (q31_t)0x72552C84, (q31_t)0x398CDD32,
+	(q31_t)0x7227D61C, (q31_t)0x39E6975D, (q31_t)0x71FA3948,
+	(q31_t)0x3A402DD1, (q31_t)0x71CC5626, (q31_t)0x3A99A057,
+	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x716FBD68,
+	(q31_t)0x3B4C18BA, (q31_t)0x71410804, (q31_t)0x3BA51E29,
+	(q31_t)0x71120CC5, (q31_t)0x3BFDFECD, (q31_t)0x70E2CBC6,
+	(q31_t)0x3C56BA70, (q31_t)0x70B34524, (q31_t)0x3CAF50DA,
+	(q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x70536771,
+	(q31_t)0x3D600D2B, (q31_t)0x70231099, (q31_t)0x3DB832A5,
+	(q31_t)0x6FF27496, (q31_t)0x3E10320D, (q31_t)0x6FC19385,
+	(q31_t)0x3E680B2C, (q31_t)0x6F906D84, (q31_t)0x3EBFBDCC,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6F2D532C,
+	(q31_t)0x3F6EAEB8, (q31_t)0x6EFB5F12, (q31_t)0x3FC5EC97,
+	(q31_t)0x6EC92682, (q31_t)0x401D0320, (q31_t)0x6E96A99C,
+	(q31_t)0x4073F21D, (q31_t)0x6E63E87F, (q31_t)0x40CAB957,
+	(q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6DFD9A1B,
+	(q31_t)0x4177CFB0, (q31_t)0x6DCA0D14, (q31_t)0x41CE1E64,
+	(q31_t)0x6D963C54, (q31_t)0x42244480, (q31_t)0x6D6227FA,
+	(q31_t)0x427A41D0, (q31_t)0x6D2DD027, (q31_t)0x42D0161E,
+	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6CC45697,
+	(q31_t)0x437B42E1, (q31_t)0x6C8F351C, (q31_t)0x43D09AEC,
+	(q31_t)0x6C59D0A9, (q31_t)0x4425C923, (q31_t)0x6C242960,
+	(q31_t)0x447ACD50, (q31_t)0x6BEE3F62, (q31_t)0x44CFA73F,
+	(q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B81A3CD,
+	(q31_t)0x4578DB93, (q31_t)0x6B4AF278, (q31_t)0x45CD358F,
+	(q31_t)0x6B13FEF5, (q31_t)0x4621647C, (q31_t)0x6ADCC964,
+	(q31_t)0x46756827, (q31_t)0x6AA551E8, (q31_t)0x46C9405C,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x6A359DB9,
+	(q31_t)0x47706D93, (q31_t)0x69FD614A, (q31_t)0x47C3C22E,
+	(q31_t)0x69C4E37A, (q31_t)0x4816EA85, (q31_t)0x698C246C,
+	(q31_t)0x4869E664, (q31_t)0x69532442, (q31_t)0x48BCB598,
+	(q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68E06129,
+	(q31_t)0x4961CD32, (q31_t)0x68A69E81, (q31_t)0x49B41533,
+	(q31_t)0x686C9B4B, (q31_t)0x4A062FBD, (q31_t)0x683257AA,
+	(q31_t)0x4A581C9D, (q31_t)0x67F7D3C4, (q31_t)0x4AA9DBA1,
+	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x67820BB6,
+	(q31_t)0x4B4CCF4D, (q31_t)0x6746C7D7, (q31_t)0x4B9E038F,
+	(q31_t)0x670B4443, (q31_t)0x4BEF092D, (q31_t)0x66CF811F,
+	(q31_t)0x4C3FDFF3, (q31_t)0x66937E90, (q31_t)0x4C9087B1,
+	(q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x661ABBC5,
+	(q31_t)0x4D31494B, (q31_t)0x65DDFBD3, (q31_t)0x4D8162C4,
+	(q31_t)0x65A0FD0B, (q31_t)0x4DD14C6E, (q31_t)0x6563BF92,
+	(q31_t)0x4E210617, (q31_t)0x6526438E, (q31_t)0x4E708F8F,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x64AA907F,
+	(q31_t)0x4F0F1126, (q31_t)0x646C59BF, (q31_t)0x4F5E08E3,
+	(q31_t)0x642DE50D, (q31_t)0x4FACCFAB, (q31_t)0x63EF328F,
+	(q31_t)0x4FFB654D, (q31_t)0x63B0426D, (q31_t)0x5049C999,
+	(q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x6331A9D4,
+	(q31_t)0x50E5FD6C, (q31_t)0x62F201AC, (q31_t)0x5133CC94,
+	(q31_t)0x62B21C7B, (q31_t)0x518169A4, (q31_t)0x6271FA69,
+	(q31_t)0x51CED46E, (q31_t)0x62319B9D, (q31_t)0x521C0CC1,
+	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x61B02876,
+	(q31_t)0x52B5E545, (q31_t)0x616F146B, (q31_t)0x53028517,
+	(q31_t)0x612DC446, (q31_t)0x534EF1B5, (q31_t)0x60EC3830,
+	(q31_t)0x539B2AEF, (q31_t)0x60AA704F, (q31_t)0x53E73097,
+	(q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x60262DD5,
+	(q31_t)0x547EA073, (q31_t)0x5FE3B38D, (q31_t)0x54CA0A4A,
+	(q31_t)0x5FA0FE1E, (q31_t)0x55153FD4, (q31_t)0x5F5E0DB3,
+	(q31_t)0x556040E2, (q31_t)0x5F1AE273, (q31_t)0x55AB0D46,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5E93DC1F,
+	(q31_t)0x56400757, (q31_t)0x5E50015D, (q31_t)0x568A34A9,
+	(q31_t)0x5E0BEC6E, (q31_t)0x56D42C99, (q31_t)0x5DC79D7C,
+	(q31_t)0x571DEEF9, (q31_t)0x5D8314B0, (q31_t)0x57677B9D,
+	(q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5CF95638,
+	(q31_t)0x57F9F2F7, (q31_t)0x5CB420DF, (q31_t)0x5842DD54,
+	(q31_t)0x5C6EB258, (q31_t)0x588B913F, (q31_t)0x5C290ACC,
+	(q31_t)0x58D40E8C, (q31_t)0x5BE32A67, (q31_t)0x591C550E,
+	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B56BFBD,
+	(q31_t)0x59AC3CFD, (q31_t)0x5B1035CF, (q31_t)0x59F3DE12,
+	(q31_t)0x5AC973B4, (q31_t)0x5A3B47AA, (q31_t)0x5A82799A,
+	(q31_t)0x5A82799A, (q31_t)0x5A3B47AA, (q31_t)0x5AC973B4,
+	(q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59AC3CFD,
+	(q31_t)0x5B56BFBD, (q31_t)0x59646497, (q31_t)0x5B9D1153,
+	(q31_t)0x591C550E, (q31_t)0x5BE32A67, (q31_t)0x58D40E8C,
+	(q31_t)0x5C290ACC, (q31_t)0x588B913F, (q31_t)0x5C6EB258,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x57F9F2F7,
+	(q31_t)0x5CF95638, (q31_t)0x57B0D256, (q31_t)0x5D3E5236,
+	(q31_t)0x57677B9D, (q31_t)0x5D8314B0, (q31_t)0x571DEEF9,
+	(q31_t)0x5DC79D7C, (q31_t)0x56D42C99, (q31_t)0x5E0BEC6E,
+	(q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x56400757,
+	(q31_t)0x5E93DC1F, (q31_t)0x55F5A4D2, (q31_t)0x5ED77C89,
+	(q31_t)0x55AB0D46, (q31_t)0x5F1AE273, (q31_t)0x556040E2,
+	(q31_t)0x5F5E0DB3, (q31_t)0x55153FD4, (q31_t)0x5FA0FE1E,
+	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x547EA073,
+	(q31_t)0x60262DD5, (q31_t)0x5433027D, (q31_t)0x60686CCE,
+	(q31_t)0x53E73097, (q31_t)0x60AA704F, (q31_t)0x539B2AEF,
+	(q31_t)0x60EC3830, (q31_t)0x534EF1B5, (q31_t)0x612DC446,
+	(q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x52B5E545,
+	(q31_t)0x61B02876, (q31_t)0x5269126E, (q31_t)0x61F1003E,
+	(q31_t)0x521C0CC1, (q31_t)0x62319B9D, (q31_t)0x51CED46E,
+	(q31_t)0x6271FA69, (q31_t)0x518169A4, (q31_t)0x62B21C7B,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x50E5FD6C,
+	(q31_t)0x6331A9D4, (q31_t)0x5097FC5E, (q31_t)0x637114CC,
+	(q31_t)0x5049C999, (q31_t)0x63B0426D, (q31_t)0x4FFB654D,
+	(q31_t)0x63EF328F, (q31_t)0x4FACCFAB, (q31_t)0x642DE50D,
+	(q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4F0F1126,
+	(q31_t)0x64AA907F, (q31_t)0x4EBFE8A4, (q31_t)0x64E88926,
+	(q31_t)0x4E708F8F, (q31_t)0x6526438E, (q31_t)0x4E210617,
+	(q31_t)0x6563BF92, (q31_t)0x4DD14C6E, (q31_t)0x65A0FD0B,
+	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4D31494B,
+	(q31_t)0x661ABBC5, (q31_t)0x4CE10034, (q31_t)0x66573CBB,
+	(q31_t)0x4C9087B1, (q31_t)0x66937E90, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66CF811F, (q31_t)0x4BEF092D, (q31_t)0x670B4443,
+	(q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4B4CCF4D,
+	(q31_t)0x67820BB6, (q31_t)0x4AFB6C97, (q31_t)0x67BD0FBC,
+	(q31_t)0x4AA9DBA1, (q31_t)0x67F7D3C4, (q31_t)0x4A581C9D,
+	(q31_t)0x683257AA, (q31_t)0x4A062FBD, (q31_t)0x686C9B4B,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x4961CD32,
+	(q31_t)0x68E06129, (q31_t)0x490F57EE, (q31_t)0x6919E320,
+	(q31_t)0x48BCB598, (q31_t)0x69532442, (q31_t)0x4869E664,
+	(q31_t)0x698C246C, (q31_t)0x4816EA85, (q31_t)0x69C4E37A,
+	(q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x47706D93,
+	(q31_t)0x6A359DB9, (q31_t)0x471CECE6, (q31_t)0x6A6D98A4,
+	(q31_t)0x46C9405C, (q31_t)0x6AA551E8, (q31_t)0x46756827,
+	(q31_t)0x6ADCC964, (q31_t)0x4621647C, (q31_t)0x6B13FEF5,
+	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x4578DB93,
+	(q31_t)0x6B81A3CD, (q31_t)0x452456BC, (q31_t)0x6BB812D0,
+	(q31_t)0x44CFA73F, (q31_t)0x6BEE3F62, (q31_t)0x447ACD50,
+	(q31_t)0x6C242960, (q31_t)0x4425C923, (q31_t)0x6C59D0A9,
+	(q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x437B42E1,
+	(q31_t)0x6CC45697, (q31_t)0x4325C135, (q31_t)0x6CF934FB,
+	(q31_t)0x42D0161E, (q31_t)0x6D2DD027, (q31_t)0x427A41D0,
+	(q31_t)0x6D6227FA, (q31_t)0x42244480, (q31_t)0x6D963C54,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x4177CFB0,
+	(q31_t)0x6DFD9A1B, (q31_t)0x4121589A, (q31_t)0x6E30E349,
+	(q31_t)0x40CAB957, (q31_t)0x6E63E87F, (q31_t)0x4073F21D,
+	(q31_t)0x6E96A99C, (q31_t)0x401D0320, (q31_t)0x6EC92682,
+	(q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F6EAEB8,
+	(q31_t)0x6F2D532C, (q31_t)0x3F1749B7, (q31_t)0x6F5F02B1,
+	(q31_t)0x3EBFBDCC, (q31_t)0x6F906D84, (q31_t)0x3E680B2C,
+	(q31_t)0x6FC19385, (q31_t)0x3E10320D, (q31_t)0x6FF27496,
+	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D600D2B,
+	(q31_t)0x70536771, (q31_t)0x3D07C1D5, (q31_t)0x708378FE,
+	(q31_t)0x3CAF50DA, (q31_t)0x70B34524, (q31_t)0x3C56BA70,
+	(q31_t)0x70E2CBC6, (q31_t)0x3BFDFECD, (q31_t)0x71120CC5,
+	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3B4C18BA,
+	(q31_t)0x716FBD68, (q31_t)0x3AF2EEB7, (q31_t)0x719E2CD2,
+	(q31_t)0x3A99A057, (q31_t)0x71CC5626, (q31_t)0x3A402DD1,
+	(q31_t)0x71FA3948, (q31_t)0x39E6975D, (q31_t)0x7227D61C,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x3932FF87,
+	(q31_t)0x72823C66, (q31_t)0x38D8FE93, (q31_t)0x72AF05A6,
+	(q31_t)0x387EDA8E, (q31_t)0x72DB8828, (q31_t)0x382493B0,
+	(q31_t)0x7307C3D0, (q31_t)0x37CA2A30, (q31_t)0x7333B883,
+	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x3714F02A,
+	(q31_t)0x738ACC9E, (q31_t)0x36BA2013, (q31_t)0x73B5EBD0,
+	(q31_t)0x365F2E3B, (q31_t)0x73E0C3A3, (q31_t)0x36041AD9,
+	(q31_t)0x740B53FA, (q31_t)0x35A8E624, (q31_t)0x74359CBD,
+	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x34F219A7,
+	(q31_t)0x7489571B, (q31_t)0x3496824F, (q31_t)0x74B2C883,
+	(q31_t)0x343ACA87, (q31_t)0x74DBF1EF, (q31_t)0x33DEF287,
+	(q31_t)0x7504D345, (q31_t)0x3382FA88, (q31_t)0x752D6C6C,
+	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x32CAAB6F,
+	(q31_t)0x757DC5CA, (q31_t)0x326E54C7, (q31_t)0x75A585CF,
+	(q31_t)0x3211DF03, (q31_t)0x75CCFD42, (q31_t)0x31B54A5D,
+	(q31_t)0x75F42C0A, (q31_t)0x3158970D, (q31_t)0x761B1211,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x309ED555,
+	(q31_t)0x76680376, (q31_t)0x3041C760, (q31_t)0x768E0EA5,
+	(q31_t)0x2FE49BA6, (q31_t)0x76B3D0B3, (q31_t)0x2F875262,
+	(q31_t)0x76D94988, (q31_t)0x2F29EBCC, (q31_t)0x76FE790E,
+	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E6EC792,
+	(q31_t)0x7747FBCE, (q31_t)0x2E110A62, (q31_t)0x776C4EDB,
+	(q31_t)0x2DB330C7, (q31_t)0x7790583D, (q31_t)0x2D553AFB,
+	(q31_t)0x77B417DF, (q31_t)0x2CF72939, (q31_t)0x77D78DAA,
+	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2C3AB2B9,
+	(q31_t)0x781D9B64, (q31_t)0x2BDC4E6F, (q31_t)0x78403328,
+	(q31_t)0x2B7DCF17, (q31_t)0x786280BF, (q31_t)0x2B1F34EB,
+	(q31_t)0x78848413, (q31_t)0x2AC08025, (q31_t)0x78A63D10,
+	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x2A02C7B8,
+	(q31_t)0x78E8CFB1, (q31_t)0x29A3C484, (q31_t)0x7909A92C,
+	(q31_t)0x2944A7A2, (q31_t)0x792A37FE, (q31_t)0x28E5714A,
+	(q31_t)0x794A7C11, (q31_t)0x288621B9, (q31_t)0x796A7554,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27C737D2,
+	(q31_t)0x79A98715, (q31_t)0x27679DF4, (q31_t)0x79C89F6D,
+	(q31_t)0x2707EBC6, (q31_t)0x79E76CA6, (q31_t)0x26A82185,
+	(q31_t)0x7A05EEAD, (q31_t)0x26483F6C, (q31_t)0x7A24256E,
+	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x2588349D,
+	(q31_t)0x7A5FB0D8, (q31_t)0x25280C5D, (q31_t)0x7A7D055B,
+	(q31_t)0x24C7CD32, (q31_t)0x7A9A0E4F, (q31_t)0x24677757,
+	(q31_t)0x7AB6CBA3, (q31_t)0x24070B07, (q31_t)0x7AD33D45,
+	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x2345EFF7,
+	(q31_t)0x7B0B3D2C, (q31_t)0x22E541AE, (q31_t)0x7B26CB4F,
+	(q31_t)0x22847DDF, (q31_t)0x7B420D7A, (q31_t)0x2223A4C5,
+	(q31_t)0x7B5D039D, (q31_t)0x21C2B69C, (q31_t)0x7B77ADA8,
+	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x21009C0B,
+	(q31_t)0x7BAC1D31, (q31_t)0x209F701C, (q31_t)0x7BC5E28F,
+	(q31_t)0x203E300D, (q31_t)0x7BDF5B94, (q31_t)0x1FDCDC1A,
+	(q31_t)0x7BF88830, (q31_t)0x1F7B7480, (q31_t)0x7C116853,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1EB86B46,
+	(q31_t)0x7C4242F2, (q31_t)0x1E56CA1E, (q31_t)0x7C5A3D4F,
+	(q31_t)0x1DF5163F, (q31_t)0x7C71EAF8, (q31_t)0x1D934FE5,
+	(q31_t)0x7C894BDD, (q31_t)0x1D31774D, (q31_t)0x7CA05FF1,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C6D9053,
+	(q31_t)0x7CCDA168, (q31_t)0x1C0B826A, (q31_t)0x7CE3CEB1,
+	(q31_t)0x1BA96334, (q31_t)0x7CF9AEF0, (q31_t)0x1B4732EF,
+	(q31_t)0x7D0F4218, (q31_t)0x1AE4F1D6, (q31_t)0x7D24881A,
+	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x1A203E1B,
+	(q31_t)0x7D4E2C7E, (q31_t)0x19BDCBF2, (q31_t)0x7D628AC5,
+	(q31_t)0x195B49E9, (q31_t)0x7D769BB5, (q31_t)0x18F8B83C,
+	(q31_t)0x7D8A5F3F, (q31_t)0x18961727, (q31_t)0x7D9DD55A,
+	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x17D0A7BB,
+	(q31_t)0x7DC3D90D, (q31_t)0x176DD9DE, (q31_t)0x7DD6668E,
+	(q31_t)0x170AFD8D, (q31_t)0x7DE8A670, (q31_t)0x16A81305,
+	(q31_t)0x7DFA98A7, (q31_t)0x16451A83, (q31_t)0x7E0C3D29,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x157F0086,
+	(q31_t)0x7E2E9CDF, (q31_t)0x151BDF85, (q31_t)0x7E3F57FE,
+	(q31_t)0x14B8B17F, (q31_t)0x7E4FC53E, (q31_t)0x145576B1,
+	(q31_t)0x7E5FE493, (q31_t)0x13F22F57, (q31_t)0x7E6FB5F3,
+	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x132B7BF9,
+	(q31_t)0x7E8E6EB1, (q31_t)0x12C8106E, (q31_t)0x7E9D55FC,
+	(q31_t)0x1264994E, (q31_t)0x7EABEF2C, (q31_t)0x120116D4,
+	(q31_t)0x7EBA3A39, (q31_t)0x119D8940, (q31_t)0x7EC8371A,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x10D64DBC,
+	(q31_t)0x7EE34635, (q31_t)0x1072A047, (q31_t)0x7EF0585F,
+	(q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C, (q31_t)0x0FAB272B,
+	(q31_t)0x7F0991C3, (q31_t)0x0F475BFE, (q31_t)0x7F15B8EE,
+	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0E7FA99D,
+	(q31_t)0x7F2D1C0E, (q31_t)0x0E1BC2E3, (q31_t)0x7F3857F5,
+	(q31_t)0x0DB7D376, (q31_t)0x7F434563, (q31_t)0x0D53DB92,
+	(q31_t)0x7F4DE450, (q31_t)0x0CEFDB75, (q31_t)0x7F5834B6,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C27C389,
+	(q31_t)0x7F6BE9D4, (q31_t)0x0BC3AC35, (q31_t)0x7F754E7F,
+	(q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B, (q31_t)0x0AFB6805,
+	(q31_t)0x7F872BF3, (q31_t)0x0A973BA5, (q31_t)0x7F8FA4AF,
+	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x09CECF89,
+	(q31_t)0x7F9FAA15, (q31_t)0x096A9049, (q31_t)0x7FA736B4,
+	(q31_t)0x09064B3A, (q31_t)0x7FAE7494, (q31_t)0x08A2009A,
+	(q31_t)0x7FB563B2, (q31_t)0x083DB0A7, (q31_t)0x7FBC040A,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x077501BE,
+	(q31_t)0x7FC85853, (q31_t)0x0710A344, (q31_t)0x7FCE0C3E,
+	(q31_t)0x06AC406F, (q31_t)0x7FD37152, (q31_t)0x0647D97C,
+	(q31_t)0x7FD8878D, (q31_t)0x05E36EA9, (q31_t)0x7FDD4EEC,
+	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x051A8E5C,
+	(q31_t)0x7FE5F108, (q31_t)0x04B6195D, (q31_t)0x7FE9CBC0,
+	(q31_t)0x0451A176, (q31_t)0x7FED5790, (q31_t)0x03ED26E6,
+	(q31_t)0x7FF09477, (q31_t)0x0388A9E9, (q31_t)0x7FF38273,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02BFA9A4,
+	(q31_t)0x7FF871A1, (q31_t)0x025B26D7, (q31_t)0x7FFA72D1,
+	(q31_t)0x01F6A296, (q31_t)0x7FFC250F, (q31_t)0x01921D1F,
+	(q31_t)0x7FFD885A, (q31_t)0x012D96B0, (q31_t)0x7FFE9CB2,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x006487E3,
+	(q31_t)0x7FFFD885, (q31_t)0x00000000, (q31_t)0x7FFFFFFF,
+	(q31_t)0xFF9B781D, (q31_t)0x7FFFD885, (q31_t)0xFF36F078,
+	(q31_t)0x7FFF6216, (q31_t)0xFED2694F, (q31_t)0x7FFE9CB2,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE095D69,
+	(q31_t)0x7FFC250F, (q31_t)0xFDA4D928, (q31_t)0x7FFA72D1,
+	(q31_t)0xFD40565B, (q31_t)0x7FF871A1, (q31_t)0xFCDBD541,
+	(q31_t)0x7FF62182, (q31_t)0xFC775616, (q31_t)0x7FF38273,
+	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBAE5E89,
+	(q31_t)0x7FED5790, (q31_t)0xFB49E6A2, (q31_t)0x7FE9CBC0,
+	(q31_t)0xFAE571A4, (q31_t)0x7FE5F108, (q31_t)0xFA80FFCB,
+	(q31_t)0x7FE1C76B, (q31_t)0xFA1C9156, (q31_t)0x7FDD4EEC,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF953BF90,
+	(q31_t)0x7FD37152, (q31_t)0xF8EF5CBB, (q31_t)0x7FCE0C3E,
+	(q31_t)0xF88AFE41, (q31_t)0x7FC85853, (q31_t)0xF826A461,
+	(q31_t)0x7FC25596, (q31_t)0xF7C24F58, (q31_t)0x7FBC040A,
+	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF6F9B4C5,
+	(q31_t)0x7FAE7494, (q31_t)0xF6956FB6, (q31_t)0x7FA736B4,
+	(q31_t)0xF6313076, (q31_t)0x7F9FAA15, (q31_t)0xF5CCF743,
+	(q31_t)0x7F97CEBC, (q31_t)0xF568C45A, (q31_t)0x7F8FA4AF,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4A07260,
+	(q31_t)0x7F7E648B, (q31_t)0xF43C53CA, (q31_t)0x7F754E7F,
+	(q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4, (q31_t)0xF3742CA1,
+	(q31_t)0x7F62368F, (q31_t)0xF310248A, (q31_t)0x7F5834B6,
+	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF2482C89,
+	(q31_t)0x7F434563, (q31_t)0xF1E43D1C, (q31_t)0x7F3857F5,
+	(q31_t)0xF1805662, (q31_t)0x7F2D1C0E, (q31_t)0xF11C789A,
+	(q31_t)0x7F2191B4, (q31_t)0xF0B8A401, (q31_t)0x7F15B8EE,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xEFF11752,
+	(q31_t)0x7EFD1C3C, (q31_t)0xEF8D5FB8, (q31_t)0x7EF0585F,
+	(q31_t)0xEF29B243, (q31_t)0x7EE34635, (q31_t)0xEEC60F31,
+	(q31_t)0x7ED5E5C6, (q31_t)0xEE6276BF, (q31_t)0x7EC8371A,
+	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xED9B66B2,
+	(q31_t)0x7EABEF2C, (q31_t)0xED37EF91, (q31_t)0x7E9D55FC,
+	(q31_t)0xECD48406, (q31_t)0x7E8E6EB1, (q31_t)0xEC71244F,
+	(q31_t)0x7E7F3956, (q31_t)0xEC0DD0A8, (q31_t)0x7E6FB5F3,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB474E80,
+	(q31_t)0x7E4FC53E, (q31_t)0xEAE4207A, (q31_t)0x7E3F57FE,
+	(q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF, (q31_t)0xEA1DEBBB,
+	(q31_t)0x7E1D93E9, (q31_t)0xE9BAE57C, (q31_t)0x7E0C3D29,
+	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE8F50273,
+	(q31_t)0x7DE8A670, (q31_t)0xE8922621, (q31_t)0x7DD6668E,
+	(q31_t)0xE82F5844, (q31_t)0x7DC3D90D, (q31_t)0xE7CC9917,
+	(q31_t)0x7DB0FDF7, (q31_t)0xE769E8D8, (q31_t)0x7D9DD55A,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6A4B616,
+	(q31_t)0x7D769BB5, (q31_t)0xE642340D, (q31_t)0x7D628AC5,
+	(q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E, (q31_t)0xE57D5FDA,
+	(q31_t)0x7D3980EC, (q31_t)0xE51B0E2A, (q31_t)0x7D24881A,
+	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE4569CCB,
+	(q31_t)0x7CF9AEF0, (q31_t)0xE3F47D95, (q31_t)0x7CE3CEB1,
+	(q31_t)0xE3926FAC, (q31_t)0x7CCDA168, (q31_t)0xE330734C,
+	(q31_t)0x7CB72724, (q31_t)0xE2CE88B2, (q31_t)0x7CA05FF1,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE20AE9C1,
+	(q31_t)0x7C71EAF8, (q31_t)0xE1A935E1, (q31_t)0x7C5A3D4F,
+	(q31_t)0xE14794B9, (q31_t)0x7C4242F2, (q31_t)0xE0E60684,
+	(q31_t)0x7C29FBEE, (q31_t)0xE0848B7F, (q31_t)0x7C116853,
+	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFC1CFF2,
+	(q31_t)0x7BDF5B94, (q31_t)0xDF608FE3, (q31_t)0x7BC5E28F,
+	(q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31, (q31_t)0xDE9E4C60,
+	(q31_t)0x7B920B89, (q31_t)0xDE3D4963, (q31_t)0x7B77ADA8,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDD7B8220,
+	(q31_t)0x7B420D7A, (q31_t)0xDD1ABE51, (q31_t)0x7B26CB4F,
+	(q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C, (q31_t)0xDC597781,
+	(q31_t)0x7AEF6323, (q31_t)0xDBF8F4F8, (q31_t)0x7AD33D45,
+	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB3832CD,
+	(q31_t)0x7A9A0E4F, (q31_t)0xDAD7F3A2, (q31_t)0x7A7D055B,
+	(q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8, (q31_t)0xDA17BA4A,
+	(q31_t)0x7A4210D8, (q31_t)0xD9B7C093, (q31_t)0x7A24256E,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD8F81439,
+	(q31_t)0x79E76CA6, (q31_t)0xD898620C, (q31_t)0x79C89F6D,
+	(q31_t)0xD838C82D, (q31_t)0x79A98715, (q31_t)0xD7D946D7,
+	(q31_t)0x798A23B1, (q31_t)0xD779DE46, (q31_t)0x796A7554,
+	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6BB585D,
+	(q31_t)0x792A37FE, (q31_t)0xD65C3B7B, (q31_t)0x7909A92C,
+	(q31_t)0xD5FD3847, (q31_t)0x78E8CFB1, (q31_t)0xD59E4EFE,
+	(q31_t)0x78C7ABA1, (q31_t)0xD53F7FDA, (q31_t)0x78A63D10,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD48230E8,
+	(q31_t)0x786280BF, (q31_t)0xD423B190, (q31_t)0x78403328,
+	(q31_t)0xD3C54D46, (q31_t)0x781D9B64, (q31_t)0xD3670445,
+	(q31_t)0x77FAB988, (q31_t)0xD308D6C6, (q31_t)0x77D78DAA,
+	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD24CCF38,
+	(q31_t)0x7790583D, (q31_t)0xD1EEF59E, (q31_t)0x776C4EDB,
+	(q31_t)0xD191386D, (q31_t)0x7747FBCE, (q31_t)0xD13397E1,
+	(q31_t)0x77235F2D, (q31_t)0xD0D61433, (q31_t)0x76FE790E,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD01B6459,
+	(q31_t)0x76B3D0B3, (q31_t)0xCFBE389F, (q31_t)0x768E0EA5,
+	(q31_t)0xCF612AAA, (q31_t)0x76680376, (q31_t)0xCF043AB2,
+	(q31_t)0x7641AF3C, (q31_t)0xCEA768F2, (q31_t)0x761B1211,
+	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCDEE20FC,
+	(q31_t)0x75CCFD42, (q31_t)0xCD91AB38, (q31_t)0x75A585CF,
+	(q31_t)0xCD355490, (q31_t)0x757DC5CA, (q31_t)0xCCD91D3D,
+	(q31_t)0x7555BD4B, (q31_t)0xCC7D0577, (q31_t)0x752D6C6C,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBC53578,
+	(q31_t)0x74DBF1EF, (q31_t)0xCB697DB0, (q31_t)0x74B2C883,
+	(q31_t)0xCB0DE658, (q31_t)0x7489571B, (q31_t)0xCAB26FA9,
+	(q31_t)0x745F9DD1, (q31_t)0xCA5719DB, (q31_t)0x74359CBD,
+	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9A0D1C4,
+	(q31_t)0x73E0C3A3, (q31_t)0xC945DFEC, (q31_t)0x73B5EBD0,
+	(q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E, (q31_t)0xC89061BA,
+	(q31_t)0x735F6626, (q31_t)0xC835D5D0, (q31_t)0x7333B883,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7812571,
+	(q31_t)0x72DB8828, (q31_t)0xC727016C, (q31_t)0x72AF05A6,
+	(q31_t)0xC6CD0079, (q31_t)0x72823C66, (q31_t)0xC67322CD,
+	(q31_t)0x72552C84, (q31_t)0xC61968A2, (q31_t)0x7227D61C,
+	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC5665FA8,
+	(q31_t)0x71CC5626, (q31_t)0xC50D1148, (q31_t)0x719E2CD2,
+	(q31_t)0xC4B3E746, (q31_t)0x716FBD68, (q31_t)0xC45AE1D7,
+	(q31_t)0x71410804, (q31_t)0xC4020132, (q31_t)0x71120CC5,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC350AF25,
+	(q31_t)0x70B34524, (q31_t)0xC2F83E2A, (q31_t)0x708378FE,
+	(q31_t)0xC29FF2D4, (q31_t)0x70536771, (q31_t)0xC247CD5A,
+	(q31_t)0x70231099, (q31_t)0xC1EFCDF2, (q31_t)0x6FF27496,
+	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC1404233,
+	(q31_t)0x6F906D84, (q31_t)0xC0E8B648, (q31_t)0x6F5F02B1,
+	(q31_t)0xC0915147, (q31_t)0x6F2D532C, (q31_t)0xC03A1368,
+	(q31_t)0x6EFB5F12, (q31_t)0xBFE2FCDF, (q31_t)0x6EC92682,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF3546A8,
+	(q31_t)0x6E63E87F, (q31_t)0xBEDEA765, (q31_t)0x6E30E349,
+	(q31_t)0xBE88304F, (q31_t)0x6DFD9A1B, (q31_t)0xBE31E19B,
+	(q31_t)0x6DCA0D14, (q31_t)0xBDDBBB7F, (q31_t)0x6D963C54,
+	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD2FE9E1,
+	(q31_t)0x6D2DD027, (q31_t)0xBCDA3ECA, (q31_t)0x6CF934FB,
+	(q31_t)0xBC84BD1E, (q31_t)0x6CC45697, (q31_t)0xBC2F6513,
+	(q31_t)0x6C8F351C, (q31_t)0xBBDA36DC, (q31_t)0x6C59D0A9,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB3058C0,
+	(q31_t)0x6BEE3F62, (q31_t)0xBADBA943, (q31_t)0x6BB812D0,
+	(q31_t)0xBA87246C, (q31_t)0x6B81A3CD, (q31_t)0xBA32CA70,
+	(q31_t)0x6B4AF278, (q31_t)0xB9DE9B83, (q31_t)0x6B13FEF5,
+	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB936BFA3,
+	(q31_t)0x6AA551E8, (q31_t)0xB8E31319, (q31_t)0x6A6D98A4,
+	(q31_t)0xB88F926C, (q31_t)0x6A359DB9, (q31_t)0xB83C3DD1,
+	(q31_t)0x69FD614A, (q31_t)0xB7E9157A, (q31_t)0x69C4E37A,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB7434A67,
+	(q31_t)0x69532442, (q31_t)0xB6F0A811, (q31_t)0x6919E320,
+	(q31_t)0xB69E32CD, (q31_t)0x68E06129, (q31_t)0xB64BEACC,
+	(q31_t)0x68A69E81, (q31_t)0xB5F9D042, (q31_t)0x686C9B4B,
+	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB556245E,
+	(q31_t)0x67F7D3C4, (q31_t)0xB5049368, (q31_t)0x67BD0FBC,
+	(q31_t)0xB4B330B2, (q31_t)0x67820BB6, (q31_t)0xB461FC70,
+	(q31_t)0x6746C7D7, (q31_t)0xB410F6D2, (q31_t)0x670B4443,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB36F784E,
+	(q31_t)0x66937E90, (q31_t)0xB31EFFCB, (q31_t)0x66573CBB,
+	(q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5, (q31_t)0xB27E9D3B,
+	(q31_t)0x65DDFBD3, (q31_t)0xB22EB392, (q31_t)0x65A0FD0B,
+	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB18F7070,
+	(q31_t)0x6526438E, (q31_t)0xB140175B, (q31_t)0x64E88926,
+	(q31_t)0xB0F0EEDA, (q31_t)0x64AA907F, (q31_t)0xB0A1F71C,
+	(q31_t)0x646C59BF, (q31_t)0xB0533055, (q31_t)0x642DE50D,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFB63667,
+	(q31_t)0x63B0426D, (q31_t)0xAF6803A1, (q31_t)0x637114CC,
+	(q31_t)0xAF1A0293, (q31_t)0x6331A9D4, (q31_t)0xAECC336B,
+	(q31_t)0x62F201AC, (q31_t)0xAE7E965B, (q31_t)0x62B21C7B,
+	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xADE3F33E,
+	(q31_t)0x62319B9D, (q31_t)0xAD96ED91, (q31_t)0x61F1003E,
+	(q31_t)0xAD4A1ABA, (q31_t)0x61B02876, (q31_t)0xACFD7AE8,
+	(q31_t)0x616F146B, (q31_t)0xACB10E4A, (q31_t)0x612DC446,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC18CF68,
+	(q31_t)0x60AA704F, (q31_t)0xABCCFD82, (q31_t)0x60686CCE,
+	(q31_t)0xAB815F8C, (q31_t)0x60262DD5, (q31_t)0xAB35F5B5,
+	(q31_t)0x5FE3B38D, (q31_t)0xAAEAC02B, (q31_t)0x5FA0FE1E,
+	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA54F2B9,
+	(q31_t)0x5F1AE273, (q31_t)0xAA0A5B2D, (q31_t)0x5ED77C89,
+	(q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F, (q31_t)0xA975CB56,
+	(q31_t)0x5E50015D, (q31_t)0xA92BD366, (q31_t)0x5E0BEC6E,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8988463,
+	(q31_t)0x5D8314B0, (q31_t)0xA84F2DA9, (q31_t)0x5D3E5236,
+	(q31_t)0xA8060D08, (q31_t)0x5CF95638, (q31_t)0xA7BD22AB,
+	(q31_t)0x5CB420DF, (q31_t)0xA7746EC0, (q31_t)0x5C6EB258,
+	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA6E3AAF2,
+	(q31_t)0x5BE32A67, (q31_t)0xA69B9B68, (q31_t)0x5B9D1153,
+	(q31_t)0xA653C302, (q31_t)0x5B56BFBD, (q31_t)0xA60C21ED,
+	(q31_t)0x5B1035CF, (q31_t)0xA5C4B855, (q31_t)0x5AC973B4,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA5368C4B,
+	(q31_t)0x5A3B47AA, (q31_t)0xA4EFCA31, (q31_t)0x59F3DE12,
+	(q31_t)0xA4A94042, (q31_t)0x59AC3CFD, (q31_t)0xA462EEAC,
+	(q31_t)0x59646497, (q31_t)0xA41CD598, (q31_t)0x591C550E,
+	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3914DA7,
+	(q31_t)0x588B913F, (q31_t)0xA34BDF20, (q31_t)0x5842DD54,
+	(q31_t)0xA306A9C7, (q31_t)0x57F9F2F7, (q31_t)0xA2C1ADC9,
+	(q31_t)0x57B0D256, (q31_t)0xA27CEB4F, (q31_t)0x57677B9D,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA1F41391,
+	(q31_t)0x56D42C99, (q31_t)0xA1AFFEA2, (q31_t)0x568A34A9,
+	(q31_t)0xA16C23E1, (q31_t)0x56400757, (q31_t)0xA1288376,
+	(q31_t)0x55F5A4D2, (q31_t)0xA0E51D8C, (q31_t)0x55AB0D46,
+	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA05F01E1,
+	(q31_t)0x55153FD4, (q31_t)0xA01C4C72, (q31_t)0x54CA0A4A,
+	(q31_t)0x9FD9D22A, (q31_t)0x547EA073, (q31_t)0x9F979331,
+	(q31_t)0x5433027D, (q31_t)0x9F558FB0, (q31_t)0x53E73097,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9ED23BB9,
+	(q31_t)0x534EF1B5, (q31_t)0x9E90EB94, (q31_t)0x53028517,
+	(q31_t)0x9E4FD789, (q31_t)0x52B5E545, (q31_t)0x9E0EFFC1,
+	(q31_t)0x5269126E, (q31_t)0x9DCE6462, (q31_t)0x521C0CC1,
+	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D4DE384,
+	(q31_t)0x518169A4, (q31_t)0x9D0DFE53, (q31_t)0x5133CC94,
+	(q31_t)0x9CCE562B, (q31_t)0x50E5FD6C, (q31_t)0x9C8EEB33,
+	(q31_t)0x5097FC5E, (q31_t)0x9C4FBD92, (q31_t)0x5049C999,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BD21AF2,
+	(q31_t)0x4FACCFAB, (q31_t)0x9B93A640, (q31_t)0x4F5E08E3,
+	(q31_t)0x9B556F80, (q31_t)0x4F0F1126, (q31_t)0x9B1776D9,
+	(q31_t)0x4EBFE8A4, (q31_t)0x9AD9BC71, (q31_t)0x4E708F8F,
+	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A5F02F5,
+	(q31_t)0x4DD14C6E, (q31_t)0x9A22042C, (q31_t)0x4D8162C4,
+	(q31_t)0x99E5443A, (q31_t)0x4D31494B, (q31_t)0x99A8C344,
+	(q31_t)0x4CE10034, (q31_t)0x996C816F, (q31_t)0x4C9087B1,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x98F4BBBC,
+	(q31_t)0x4BEF092D, (q31_t)0x98B93828, (q31_t)0x4B9E038F,
+	(q31_t)0x987DF449, (q31_t)0x4B4CCF4D, (q31_t)0x9842F043,
+	(q31_t)0x4AFB6C97, (q31_t)0x98082C3B, (q31_t)0x4AA9DBA1,
+	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x979364B5,
+	(q31_t)0x4A062FBD, (q31_t)0x9759617E, (q31_t)0x49B41533,
+	(q31_t)0x971F9ED6, (q31_t)0x4961CD32, (q31_t)0x96E61CDF,
+	(q31_t)0x490F57EE, (q31_t)0x96ACDBBD, (q31_t)0x48BCB598,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x963B1C85,
+	(q31_t)0x4816EA85, (q31_t)0x96029EB5, (q31_t)0x47C3C22E,
+	(q31_t)0x95CA6246, (q31_t)0x47706D93, (q31_t)0x9592675B,
+	(q31_t)0x471CECE6, (q31_t)0x955AAE17, (q31_t)0x46C9405C,
+	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x94EC010B,
+	(q31_t)0x4621647C, (q31_t)0x94B50D87, (q31_t)0x45CD358F,
+	(q31_t)0x947E5C32, (q31_t)0x4578DB93, (q31_t)0x9447ED2F,
+	(q31_t)0x452456BC, (q31_t)0x9411C09D, (q31_t)0x44CFA73F,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93A62F56,
+	(q31_t)0x4425C923, (q31_t)0x9370CAE4, (q31_t)0x43D09AEC,
+	(q31_t)0x933BA968, (q31_t)0x437B42E1, (q31_t)0x9306CB04,
+	(q31_t)0x4325C135, (q31_t)0x92D22FD8, (q31_t)0x42D0161E,
+	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9269C3AC,
+	(q31_t)0x42244480, (q31_t)0x9235F2EB, (q31_t)0x41CE1E64,
+	(q31_t)0x920265E4, (q31_t)0x4177CFB0, (q31_t)0x91CF1CB6,
+	(q31_t)0x4121589A, (q31_t)0x919C1780, (q31_t)0x40CAB957,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x9136D97D,
+	(q31_t)0x401D0320, (q31_t)0x9104A0ED, (q31_t)0x3FC5EC97,
+	(q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8, (q31_t)0x90A0FD4E,
+	(q31_t)0x3F1749B7, (q31_t)0x906F927B, (q31_t)0x3EBFBDCC,
+	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x900D8B69,
+	(q31_t)0x3E10320D, (q31_t)0x8FDCEF66, (q31_t)0x3DB832A5,
+	(q31_t)0x8FAC988E, (q31_t)0x3D600D2B, (q31_t)0x8F7C8701,
+	(q31_t)0x3D07C1D5, (q31_t)0x8F4CBADB, (q31_t)0x3CAF50DA,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8EEDF33B,
+	(q31_t)0x3BFDFECD, (q31_t)0x8EBEF7FB, (q31_t)0x3BA51E29,
+	(q31_t)0x8E904298, (q31_t)0x3B4C18BA, (q31_t)0x8E61D32D,
+	(q31_t)0x3AF2EEB7, (q31_t)0x8E33A9D9, (q31_t)0x3A99A057,
+	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DD829E4,
+	(q31_t)0x39E6975D, (q31_t)0x8DAAD37B, (q31_t)0x398CDD32,
+	(q31_t)0x8D7DC399, (q31_t)0x3932FF87, (q31_t)0x8D50FA59,
+	(q31_t)0x38D8FE93, (q31_t)0x8D2477D8, (q31_t)0x387EDA8E,
+	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CCC477D,
+	(q31_t)0x37CA2A30, (q31_t)0x8CA099D9, (q31_t)0x376F9E46,
+	(q31_t)0x8C753361, (q31_t)0x3714F02A, (q31_t)0x8C4A142F,
+	(q31_t)0x36BA2013, (q31_t)0x8C1F3C5C, (q31_t)0x365F2E3B,
+	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BCA6342,
+	(q31_t)0x35A8E624, (q31_t)0x8BA0622F, (q31_t)0x354D9056,
+	(q31_t)0x8B76A8E4, (q31_t)0x34F219A7, (q31_t)0x8B4D377C,
+	(q31_t)0x3496824F, (q31_t)0x8B240E10, (q31_t)0x343ACA87,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AD29393,
+	(q31_t)0x3382FA88, (q31_t)0x8AAA42B4, (q31_t)0x3326E2C2,
+	(q31_t)0x8A823A35, (q31_t)0x32CAAB6F, (q31_t)0x8A5A7A30,
+	(q31_t)0x326E54C7, (q31_t)0x8A3302BD, (q31_t)0x3211DF03,
+	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89E4EDEE,
+	(q31_t)0x3158970D, (q31_t)0x89BE50C3, (q31_t)0x30FBC54D,
+	(q31_t)0x8997FC89, (q31_t)0x309ED555, (q31_t)0x8971F15A,
+	(q31_t)0x3041C760, (q31_t)0x894C2F4C, (q31_t)0x2FE49BA6,
+	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x890186F1,
+	(q31_t)0x2F29EBCC, (q31_t)0x88DCA0D3, (q31_t)0x2ECC681E,
+	(q31_t)0x88B80431, (q31_t)0x2E6EC792, (q31_t)0x8893B124,
+	(q31_t)0x2E110A62, (q31_t)0x886FA7C2, (q31_t)0x2DB330C7,
+	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x88287255,
+	(q31_t)0x2CF72939, (q31_t)0x88054677, (q31_t)0x2C98FBBA,
+	(q31_t)0x87E2649B, (q31_t)0x2C3AB2B9, (q31_t)0x87BFCCD7,
+	(q31_t)0x2BDC4E6F, (q31_t)0x879D7F40, (q31_t)0x2B7DCF17,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x8759C2EF,
+	(q31_t)0x2AC08025, (q31_t)0x8738545E, (q31_t)0x2A61B101,
+	(q31_t)0x8717304E, (q31_t)0x2A02C7B8, (q31_t)0x86F656D3,
+	(q31_t)0x29A3C484, (q31_t)0x86D5C802, (q31_t)0x2944A7A2,
+	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x86958AAB,
+	(q31_t)0x288621B9, (q31_t)0x8675DC4E, (q31_t)0x2826B928,
+	(q31_t)0x865678EA, (q31_t)0x27C737D2, (q31_t)0x86376092,
+	(q31_t)0x27679DF4, (q31_t)0x86189359, (q31_t)0x2707EBC6,
+	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85DBDA91,
+	(q31_t)0x26483F6C, (q31_t)0x85BDEF27, (q31_t)0x25E845B5,
+	(q31_t)0x85A04F28, (q31_t)0x2588349D, (q31_t)0x8582FAA4,
+	(q31_t)0x25280C5D, (q31_t)0x8565F1B0, (q31_t)0x24C7CD32,
+	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x852CC2BA,
+	(q31_t)0x24070B07, (q31_t)0x85109CDC, (q31_t)0x23A6887E,
+	(q31_t)0x84F4C2D3, (q31_t)0x2345EFF7, (q31_t)0x84D934B0,
+	(q31_t)0x22E541AE, (q31_t)0x84BDF285, (q31_t)0x22847DDF,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x84885257,
+	(q31_t)0x21C2B69C, (q31_t)0x846DF476, (q31_t)0x2161B39F,
+	(q31_t)0x8453E2CE, (q31_t)0x21009C0B, (q31_t)0x843A1D70,
+	(q31_t)0x209F701C, (q31_t)0x8420A46B, (q31_t)0x203E300D,
+	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83EE97AC,
+	(q31_t)0x1F7B7480, (q31_t)0x83D60411, (q31_t)0x1F19F97B,
+	(q31_t)0x83BDBD0D, (q31_t)0x1EB86B46, (q31_t)0x83A5C2B0,
+	(q31_t)0x1E56CA1E, (q31_t)0x838E1507, (q31_t)0x1DF5163F,
+	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x835FA00E,
+	(q31_t)0x1D31774D, (q31_t)0x8348D8DB, (q31_t)0x1CCF8CB3,
+	(q31_t)0x83325E97, (q31_t)0x1C6D9053, (q31_t)0x831C314E,
+	(q31_t)0x1C0B826A, (q31_t)0x8306510F, (q31_t)0x1BA96334,
+	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82DB77E5,
+	(q31_t)0x1AE4F1D6, (q31_t)0x82C67F13, (q31_t)0x1A82A025,
+	(q31_t)0x82B1D381, (q31_t)0x1A203E1B, (q31_t)0x829D753A,
+	(q31_t)0x19BDCBF2, (q31_t)0x8289644A, (q31_t)0x195B49E9,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x82622AA5,
+	(q31_t)0x18961727, (q31_t)0x824F0208, (q31_t)0x183366E8,
+	(q31_t)0x823C26F2, (q31_t)0x17D0A7BB, (q31_t)0x82299971,
+	(q31_t)0x176DD9DE, (q31_t)0x8217598F, (q31_t)0x170AFD8D,
+	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81F3C2D7,
+	(q31_t)0x16451A83, (q31_t)0x81E26C16, (q31_t)0x15E21444,
+	(q31_t)0x81D16320, (q31_t)0x157F0086, (q31_t)0x81C0A801,
+	(q31_t)0x151BDF85, (q31_t)0x81B03AC1, (q31_t)0x14B8B17F,
+	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x81904A0C,
+	(q31_t)0x13F22F57, (q31_t)0x8180C6A9, (q31_t)0x138EDBB0,
+	(q31_t)0x8171914E, (q31_t)0x132B7BF9, (q31_t)0x8162AA03,
+	(q31_t)0x12C8106E, (q31_t)0x815410D3, (q31_t)0x1264994E,
+	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x8137C8E6,
+	(q31_t)0x119D8940, (q31_t)0x812A1A39, (q31_t)0x1139F0CE,
+	(q31_t)0x811CB9CA, (q31_t)0x10D64DBC, (q31_t)0x810FA7A0,
+	(q31_t)0x1072A047, (q31_t)0x8102E3C3, (q31_t)0x100EE8AD,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80EA4712,
+	(q31_t)0x0F475BFE, (q31_t)0x80DE6E4C, (q31_t)0x0EE38765,
+	(q31_t)0x80D2E3F1, (q31_t)0x0E7FA99D, (q31_t)0x80C7A80A,
+	(q31_t)0x0E1BC2E3, (q31_t)0x80BCBA9C, (q31_t)0x0DB7D376,
+	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80A7CB49,
+	(q31_t)0x0CEFDB75, (q31_t)0x809DC970, (q31_t)0x0C8BD35E,
+	(q31_t)0x8094162B, (q31_t)0x0C27C389, (q31_t)0x808AB180,
+	(q31_t)0x0BC3AC35, (q31_t)0x80819B74, (q31_t)0x0B5F8D9F,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80705B50,
+	(q31_t)0x0A973BA5, (q31_t)0x80683143, (q31_t)0x0A3308BC,
+	(q31_t)0x806055EA, (q31_t)0x09CECF89, (q31_t)0x8058C94C,
+	(q31_t)0x096A9049, (q31_t)0x80518B6B, (q31_t)0x09064B3A,
+	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x8043FBF6,
+	(q31_t)0x083DB0A7, (q31_t)0x803DAA69, (q31_t)0x07D95B9E,
+	(q31_t)0x8037A7AC, (q31_t)0x077501BE, (q31_t)0x8031F3C1,
+	(q31_t)0x0710A344, (q31_t)0x802C8EAD, (q31_t)0x06AC406F,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x8022B113,
+	(q31_t)0x05E36EA9, (q31_t)0x801E3894, (q31_t)0x057F0034,
+	(q31_t)0x801A0EF7, (q31_t)0x051A8E5C, (q31_t)0x80163440,
+	(q31_t)0x04B6195D, (q31_t)0x8012A86F, (q31_t)0x0451A176,
+	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800C7D8C,
+	(q31_t)0x0388A9E9, (q31_t)0x8009DE7D, (q31_t)0x03242ABF,
+	(q31_t)0x80078E5E, (q31_t)0x02BFA9A4, (q31_t)0x80058D2E,
+	(q31_t)0x025B26D7, (q31_t)0x8003DAF0, (q31_t)0x01F6A296,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001634D,
+	(q31_t)0x012D96B0, (q31_t)0x80009DE9, (q31_t)0x00C90F88,
+	(q31_t)0x8000277A, (q31_t)0x006487E3, (q31_t)0x80000000,
+	(q31_t)0x00000000, (q31_t)0x8000277A, (q31_t)0xFF9B781D,
+	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8001634D,
+	(q31_t)0xFED2694F, (q31_t)0x800277A5, (q31_t)0xFE6DE2E0,
+	(q31_t)0x8003DAF0, (q31_t)0xFE095D69, (q31_t)0x80058D2E,
+	(q31_t)0xFDA4D928, (q31_t)0x80078E5E, (q31_t)0xFD40565B,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800C7D8C,
+	(q31_t)0xFC775616, (q31_t)0x800F6B88, (q31_t)0xFC12D919,
+	(q31_t)0x8012A86F, (q31_t)0xFBAE5E89, (q31_t)0x80163440,
+	(q31_t)0xFB49E6A2, (q31_t)0x801A0EF7, (q31_t)0xFAE571A4,
+	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x8022B113,
+	(q31_t)0xFA1C9156, (q31_t)0x80277872, (q31_t)0xF9B82683,
+	(q31_t)0x802C8EAD, (q31_t)0xF953BF90, (q31_t)0x8031F3C1,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8037A7AC, (q31_t)0xF88AFE41,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8043FBF6,
+	(q31_t)0xF7C24F58, (q31_t)0x804A9C4D, (q31_t)0xF75DFF65,
+	(q31_t)0x80518B6B, (q31_t)0xF6F9B4C5, (q31_t)0x8058C94C,
+	(q31_t)0xF6956FB6, (q31_t)0x806055EA, (q31_t)0xF6313076,
+	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x80705B50,
+	(q31_t)0xF568C45A, (q31_t)0x8078D40D, (q31_t)0xF50497FA,
+	(q31_t)0x80819B74, (q31_t)0xF4A07260, (q31_t)0x808AB180,
+	(q31_t)0xF43C53CA, (q31_t)0x8094162B, (q31_t)0xF3D83C76,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A7CB49,
+	(q31_t)0xF310248A, (q31_t)0x80B21BAF, (q31_t)0xF2AC246D,
+	(q31_t)0x80BCBA9C, (q31_t)0xF2482C89, (q31_t)0x80C7A80A,
+	(q31_t)0xF1E43D1C, (q31_t)0x80D2E3F1, (q31_t)0xF1805662,
+	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80EA4712,
+	(q31_t)0xF0B8A401, (q31_t)0x80F66E3C, (q31_t)0xF054D8D4,
+	(q31_t)0x8102E3C3, (q31_t)0xEFF11752, (q31_t)0x810FA7A0,
+	(q31_t)0xEF8D5FB8, (q31_t)0x811CB9CA, (q31_t)0xEF29B243,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8137C8E6,
+	(q31_t)0xEE6276BF, (q31_t)0x8145C5C6, (q31_t)0xEDFEE92B,
+	(q31_t)0x815410D3, (q31_t)0xED9B66B2, (q31_t)0x8162AA03,
+	(q31_t)0xED37EF91, (q31_t)0x8171914E, (q31_t)0xECD48406,
+	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81904A0C,
+	(q31_t)0xEC0DD0A8, (q31_t)0x81A01B6C, (q31_t)0xEBAA894E,
+	(q31_t)0x81B03AC1, (q31_t)0xEB474E80, (q31_t)0x81C0A801,
+	(q31_t)0xEAE4207A, (q31_t)0x81D16320, (q31_t)0xEA80FF79,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81F3C2D7,
+	(q31_t)0xE9BAE57C, (q31_t)0x82056758, (q31_t)0xE957ECFB,
+	(q31_t)0x8217598F, (q31_t)0xE8F50273, (q31_t)0x82299971,
+	(q31_t)0xE8922621, (q31_t)0x823C26F2, (q31_t)0xE82F5844,
+	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82622AA5,
+	(q31_t)0xE769E8D8, (q31_t)0x8275A0C0, (q31_t)0xE70747C3,
+	(q31_t)0x8289644A, (q31_t)0xE6A4B616, (q31_t)0x829D753A,
+	(q31_t)0xE642340D, (q31_t)0x82B1D381, (q31_t)0xE5DFC1E4,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82DB77E5,
+	(q31_t)0xE51B0E2A, (q31_t)0x82F0BDE8, (q31_t)0xE4B8CD10,
+	(q31_t)0x8306510F, (q31_t)0xE4569CCB, (q31_t)0x831C314E,
+	(q31_t)0xE3F47D95, (q31_t)0x83325E97, (q31_t)0xE3926FAC,
+	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835FA00E,
+	(q31_t)0xE2CE88B2, (q31_t)0x8376B422, (q31_t)0xE26CB01A,
+	(q31_t)0x838E1507, (q31_t)0xE20AE9C1, (q31_t)0x83A5C2B0,
+	(q31_t)0xE1A935E1, (q31_t)0x83BDBD0D, (q31_t)0xE14794B9,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83EE97AC,
+	(q31_t)0xE0848B7F, (q31_t)0x840777CF, (q31_t)0xE02323E5,
+	(q31_t)0x8420A46B, (q31_t)0xDFC1CFF2, (q31_t)0x843A1D70,
+	(q31_t)0xDF608FE3, (q31_t)0x8453E2CE, (q31_t)0xDEFF63F4,
+	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x84885257,
+	(q31_t)0xDE3D4963, (q31_t)0x84A2FC62, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84BDF285, (q31_t)0xDD7B8220, (q31_t)0x84D934B0,
+	(q31_t)0xDD1ABE51, (q31_t)0x84F4C2D3, (q31_t)0xDCBA1008,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x852CC2BA,
+	(q31_t)0xDBF8F4F8, (q31_t)0x8549345C, (q31_t)0xDB9888A8,
+	(q31_t)0x8565F1B0, (q31_t)0xDB3832CD, (q31_t)0x8582FAA4,
+	(q31_t)0xDAD7F3A2, (q31_t)0x85A04F28, (q31_t)0xDA77CB62,
+	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85DBDA91,
+	(q31_t)0xD9B7C093, (q31_t)0x85FA1152, (q31_t)0xD957DE7A,
+	(q31_t)0x86189359, (q31_t)0xD8F81439, (q31_t)0x86376092,
+	(q31_t)0xD898620C, (q31_t)0x865678EA, (q31_t)0xD838C82D,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x86958AAB,
+	(q31_t)0xD779DE46, (q31_t)0x86B583EE, (q31_t)0xD71A8EB5,
+	(q31_t)0x86D5C802, (q31_t)0xD6BB585D, (q31_t)0x86F656D3,
+	(q31_t)0xD65C3B7B, (q31_t)0x8717304E, (q31_t)0xD5FD3847,
+	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x8759C2EF,
+	(q31_t)0xD53F7FDA, (q31_t)0x877B7BEC, (q31_t)0xD4E0CB14,
+	(q31_t)0x879D7F40, (q31_t)0xD48230E8, (q31_t)0x87BFCCD7,
+	(q31_t)0xD423B190, (q31_t)0x87E2649B, (q31_t)0xD3C54D46,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x88287255,
+	(q31_t)0xD308D6C6, (q31_t)0x884BE820, (q31_t)0xD2AAC504,
+	(q31_t)0x886FA7C2, (q31_t)0xD24CCF38, (q31_t)0x8893B124,
+	(q31_t)0xD1EEF59E, (q31_t)0x88B80431, (q31_t)0xD191386D,
+	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x890186F1,
+	(q31_t)0xD0D61433, (q31_t)0x8926B677, (q31_t)0xD078AD9D,
+	(q31_t)0x894C2F4C, (q31_t)0xD01B6459, (q31_t)0x8971F15A,
+	(q31_t)0xCFBE389F, (q31_t)0x8997FC89, (q31_t)0xCF612AAA,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89E4EDEE,
+	(q31_t)0xCEA768F2, (q31_t)0x8A0BD3F5, (q31_t)0xCE4AB5A2,
+	(q31_t)0x8A3302BD, (q31_t)0xCDEE20FC, (q31_t)0x8A5A7A30,
+	(q31_t)0xCD91AB38, (q31_t)0x8A823A35, (q31_t)0xCD355490,
+	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8AD29393,
+	(q31_t)0xCC7D0577, (q31_t)0x8AFB2CBA, (q31_t)0xCC210D78,
+	(q31_t)0x8B240E10, (q31_t)0xCBC53578, (q31_t)0x8B4D377C,
+	(q31_t)0xCB697DB0, (q31_t)0x8B76A8E4, (q31_t)0xCB0DE658,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BCA6342,
+	(q31_t)0xCA5719DB, (q31_t)0x8BF4AC05, (q31_t)0xC9FBE527,
+	(q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4, (q31_t)0x8C4A142F,
+	(q31_t)0xC945DFEC, (q31_t)0x8C753361, (q31_t)0xC8EB0FD6,
+	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CCC477D,
+	(q31_t)0xC835D5D0, (q31_t)0x8CF83C30, (q31_t)0xC7DB6C50,
+	(q31_t)0x8D2477D8, (q31_t)0xC7812571, (q31_t)0x8D50FA59,
+	(q31_t)0xC727016C, (q31_t)0x8D7DC399, (q31_t)0xC6CD0079,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DD829E4,
+	(q31_t)0xC61968A2, (q31_t)0x8E05C6B7, (q31_t)0xC5BFD22E,
+	(q31_t)0x8E33A9D9, (q31_t)0xC5665FA8, (q31_t)0x8E61D32D,
+	(q31_t)0xC50D1148, (q31_t)0x8E904298, (q31_t)0xC4B3E746,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8EEDF33B,
+	(q31_t)0xC4020132, (q31_t)0x8F1D343A, (q31_t)0xC3A9458F,
+	(q31_t)0x8F4CBADB, (q31_t)0xC350AF25, (q31_t)0x8F7C8701,
+	(q31_t)0xC2F83E2A, (q31_t)0x8FAC988E, (q31_t)0xC29FF2D4,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x900D8B69,
+	(q31_t)0xC1EFCDF2, (q31_t)0x903E6C7A, (q31_t)0xC197F4D3,
+	(q31_t)0x906F927B, (q31_t)0xC1404233, (q31_t)0x90A0FD4E,
+	(q31_t)0xC0E8B648, (q31_t)0x90D2ACD3, (q31_t)0xC0915147,
+	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x9136D97D,
+	(q31_t)0xBFE2FCDF, (q31_t)0x91695663, (q31_t)0xBF8C0DE2,
+	(q31_t)0x919C1780, (q31_t)0xBF3546A8, (q31_t)0x91CF1CB6,
+	(q31_t)0xBEDEA765, (q31_t)0x920265E4, (q31_t)0xBE88304F,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x9269C3AC,
+	(q31_t)0xBDDBBB7F, (q31_t)0x929DD805, (q31_t)0xBD85BE2F,
+	(q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1, (q31_t)0x9306CB04,
+	(q31_t)0xBCDA3ECA, (q31_t)0x933BA968, (q31_t)0xBC84BD1E,
+	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x93A62F56,
+	(q31_t)0xBBDA36DC, (q31_t)0x93DBD69F, (q31_t)0xBB8532AF,
+	(q31_t)0x9411C09D, (q31_t)0xBB3058C0, (q31_t)0x9447ED2F,
+	(q31_t)0xBADBA943, (q31_t)0x947E5C32, (q31_t)0xBA87246C,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94EC010B,
+	(q31_t)0xB9DE9B83, (q31_t)0x9523369B, (q31_t)0xB98A97D8,
+	(q31_t)0x955AAE17, (q31_t)0xB936BFA3, (q31_t)0x9592675B,
+	(q31_t)0xB8E31319, (q31_t)0x95CA6246, (q31_t)0xB88F926C,
+	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x963B1C85,
+	(q31_t)0xB7E9157A, (q31_t)0x9673DB94, (q31_t)0xB796199B,
+	(q31_t)0x96ACDBBD, (q31_t)0xB7434A67, (q31_t)0x96E61CDF,
+	(q31_t)0xB6F0A811, (q31_t)0x971F9ED6, (q31_t)0xB69E32CD,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x979364B5,
+	(q31_t)0xB5F9D042, (q31_t)0x97CDA855, (q31_t)0xB5A7E362,
+	(q31_t)0x98082C3B, (q31_t)0xB556245E, (q31_t)0x9842F043,
+	(q31_t)0xB5049368, (q31_t)0x987DF449, (q31_t)0xB4B330B2,
+	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98F4BBBC,
+	(q31_t)0xB410F6D2, (q31_t)0x99307EE0, (q31_t)0xB3C0200C,
+	(q31_t)0x996C816F, (q31_t)0xB36F784E, (q31_t)0x99A8C344,
+	(q31_t)0xB31EFFCB, (q31_t)0x99E5443A, (q31_t)0xB2CEB6B5,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A5F02F5,
+	(q31_t)0xB22EB392, (q31_t)0x9A9C406D, (q31_t)0xB1DEF9E8,
+	(q31_t)0x9AD9BC71, (q31_t)0xB18F7070, (q31_t)0x9B1776D9,
+	(q31_t)0xB140175B, (q31_t)0x9B556F80, (q31_t)0xB0F0EEDA,
+	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BD21AF2,
+	(q31_t)0xB0533055, (q31_t)0x9C10CD70, (q31_t)0xB0049AB2,
+	(q31_t)0x9C4FBD92, (q31_t)0xAFB63667, (q31_t)0x9C8EEB33,
+	(q31_t)0xAF6803A1, (q31_t)0x9CCE562B, (q31_t)0xAF1A0293,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D4DE384,
+	(q31_t)0xAE7E965B, (q31_t)0x9D8E0596, (q31_t)0xAE312B91,
+	(q31_t)0x9DCE6462, (q31_t)0xADE3F33E, (q31_t)0x9E0EFFC1,
+	(q31_t)0xAD96ED91, (q31_t)0x9E4FD789, (q31_t)0xAD4A1ABA,
+	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9ED23BB9,
+	(q31_t)0xACB10E4A, (q31_t)0x9F13C7D0, (q31_t)0xAC64D510,
+	(q31_t)0x9F558FB0, (q31_t)0xAC18CF68, (q31_t)0x9F979331,
+	(q31_t)0xABCCFD82, (q31_t)0x9FD9D22A, (q31_t)0xAB815F8C,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA05F01E1,
+	(q31_t)0xAAEAC02B, (q31_t)0xA0A1F24C, (q31_t)0xAA9FBF1D,
+	(q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9, (q31_t)0xA1288376,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA16C23E1, (q31_t)0xA9BFF8A8,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1F41391,
+	(q31_t)0xA92BD366, (q31_t)0xA2386283, (q31_t)0xA8E21106,
+	(q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA2C1ADC9,
+	(q31_t)0xA84F2DA9, (q31_t)0xA306A9C7, (q31_t)0xA8060D08,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA3914DA7,
+	(q31_t)0xA7746EC0, (q31_t)0xA3D6F533, (q31_t)0xA72BF173,
+	(q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA462EEAC,
+	(q31_t)0xA69B9B68, (q31_t)0xA4A94042, (q31_t)0xA653C302,
+	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA5368C4B,
+	(q31_t)0xA5C4B855, (q31_t)0xA57D8666, (q31_t)0xA57D8666,
+	(q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA60C21ED,
+	(q31_t)0xA4EFCA31, (q31_t)0xA653C302, (q31_t)0xA4A94042,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6E3AAF2,
+	(q31_t)0xA41CD598, (q31_t)0xA72BF173, (q31_t)0xA3D6F533,
+	(q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA7BD22AB,
+	(q31_t)0xA34BDF20, (q31_t)0xA8060D08, (q31_t)0xA306A9C7,
+	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA8988463,
+	(q31_t)0xA27CEB4F, (q31_t)0xA8E21106, (q31_t)0xA2386283,
+	(q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA975CB56,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA9BFF8A8, (q31_t)0xA16C23E1,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA54F2B9,
+	(q31_t)0xA0E51D8C, (q31_t)0xAA9FBF1D, (q31_t)0xA0A1F24C,
+	(q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB35F5B5,
+	(q31_t)0xA01C4C72, (q31_t)0xAB815F8C, (q31_t)0x9FD9D22A,
+	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xAC18CF68,
+	(q31_t)0x9F558FB0, (q31_t)0xAC64D510, (q31_t)0x9F13C7D0,
+	(q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACFD7AE8,
+	(q31_t)0x9E90EB94, (q31_t)0xAD4A1ABA, (q31_t)0x9E4FD789,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADE3F33E,
+	(q31_t)0x9DCE6462, (q31_t)0xAE312B91, (q31_t)0x9D8E0596,
+	(q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAECC336B,
+	(q31_t)0x9D0DFE53, (q31_t)0xAF1A0293, (q31_t)0x9CCE562B,
+	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAFB63667,
+	(q31_t)0x9C4FBD92, (q31_t)0xB0049AB2, (q31_t)0x9C10CD70,
+	(q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB0A1F71C,
+	(q31_t)0x9B93A640, (q31_t)0xB0F0EEDA, (q31_t)0x9B556F80,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB18F7070,
+	(q31_t)0x9AD9BC71, (q31_t)0xB1DEF9E8, (q31_t)0x9A9C406D,
+	(q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB27E9D3B,
+	(q31_t)0x9A22042C, (q31_t)0xB2CEB6B5, (q31_t)0x99E5443A,
+	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB36F784E,
+	(q31_t)0x996C816F, (q31_t)0xB3C0200C, (q31_t)0x99307EE0,
+	(q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB461FC70,
+	(q31_t)0x98B93828, (q31_t)0xB4B330B2, (q31_t)0x987DF449,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB556245E,
+	(q31_t)0x98082C3B, (q31_t)0xB5A7E362, (q31_t)0x97CDA855,
+	(q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB64BEACC,
+	(q31_t)0x9759617E, (q31_t)0xB69E32CD, (q31_t)0x971F9ED6,
+	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB7434A67,
+	(q31_t)0x96ACDBBD, (q31_t)0xB796199B, (q31_t)0x9673DB94,
+	(q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB83C3DD1,
+	(q31_t)0x96029EB5, (q31_t)0xB88F926C, (q31_t)0x95CA6246,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB936BFA3,
+	(q31_t)0x955AAE17, (q31_t)0xB98A97D8, (q31_t)0x9523369B,
+	(q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA32CA70,
+	(q31_t)0x94B50D87, (q31_t)0xBA87246C, (q31_t)0x947E5C32,
+	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB3058C0,
+	(q31_t)0x9411C09D, (q31_t)0xBB8532AF, (q31_t)0x93DBD69F,
+	(q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC2F6513,
+	(q31_t)0x9370CAE4, (q31_t)0xBC84BD1E, (q31_t)0x933BA968,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD2FE9E1,
+	(q31_t)0x92D22FD8, (q31_t)0xBD85BE2F, (q31_t)0x929DD805,
+	(q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE31E19B,
+	(q31_t)0x9235F2EB, (q31_t)0xBE88304F, (q31_t)0x920265E4,
+	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF3546A8,
+	(q31_t)0x919C1780, (q31_t)0xBF8C0DE2, (q31_t)0x91695663,
+	(q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC03A1368,
+	(q31_t)0x9104A0ED, (q31_t)0xC0915147, (q31_t)0x90D2ACD3,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1404233,
+	(q31_t)0x906F927B, (q31_t)0xC197F4D3, (q31_t)0x903E6C7A,
+	(q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC247CD5A,
+	(q31_t)0x8FDCEF66, (q31_t)0xC29FF2D4, (q31_t)0x8FAC988E,
+	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC350AF25,
+	(q31_t)0x8F4CBADB, (q31_t)0xC3A9458F, (q31_t)0x8F1D343A,
+	(q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC45AE1D7,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC4B3E746, (q31_t)0x8E904298,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC5665FA8,
+	(q31_t)0x8E33A9D9, (q31_t)0xC5BFD22E, (q31_t)0x8E05C6B7,
+	(q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC67322CD,
+	(q31_t)0x8DAAD37B, (q31_t)0xC6CD0079, (q31_t)0x8D7DC399,
+	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7812571,
+	(q31_t)0x8D2477D8, (q31_t)0xC7DB6C50, (q31_t)0x8CF83C30,
+	(q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC89061BA,
+	(q31_t)0x8CA099D9, (q31_t)0xC8EB0FD6, (q31_t)0x8C753361,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC9A0D1C4,
+	(q31_t)0x8C1F3C5C, (q31_t)0xC9FBE527, (q31_t)0x8BF4AC05,
+	(q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCAB26FA9,
+	(q31_t)0x8BA0622F, (q31_t)0xCB0DE658, (q31_t)0x8B76A8E4,
+	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCBC53578,
+	(q31_t)0x8B240E10, (q31_t)0xCC210D78, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCD91D3D,
+	(q31_t)0x8AAA42B4, (q31_t)0xCD355490, (q31_t)0x8A823A35,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDEE20FC,
+	(q31_t)0x8A3302BD, (q31_t)0xCE4AB5A2, (q31_t)0x8A0BD3F5,
+	(q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCF043AB2,
+	(q31_t)0x89BE50C3, (q31_t)0xCF612AAA, (q31_t)0x8997FC89,
+	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xD01B6459,
+	(q31_t)0x894C2F4C, (q31_t)0xD078AD9D, (q31_t)0x8926B677,
+	(q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD13397E1,
+	(q31_t)0x88DCA0D3, (q31_t)0xD191386D, (q31_t)0x88B80431,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD24CCF38,
+	(q31_t)0x886FA7C2, (q31_t)0xD2AAC504, (q31_t)0x884BE820,
+	(q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD3670445,
+	(q31_t)0x88054677, (q31_t)0xD3C54D46, (q31_t)0x87E2649B,
+	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD48230E8,
+	(q31_t)0x879D7F40, (q31_t)0xD4E0CB14, (q31_t)0x877B7BEC,
+	(q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD59E4EFE,
+	(q31_t)0x8738545E, (q31_t)0xD5FD3847, (q31_t)0x8717304E,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD6BB585D,
+	(q31_t)0x86D5C802, (q31_t)0xD71A8EB5, (q31_t)0x86B583EE,
+	(q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7D946D7,
+	(q31_t)0x8675DC4E, (q31_t)0xD838C82D, (q31_t)0x865678EA,
+	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8F81439,
+	(q31_t)0x86189359, (q31_t)0xD957DE7A, (q31_t)0x85FA1152,
+	(q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xDA17BA4A,
+	(q31_t)0x85BDEF27, (q31_t)0xDA77CB62, (q31_t)0x85A04F28,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB3832CD,
+	(q31_t)0x8565F1B0, (q31_t)0xDB9888A8, (q31_t)0x8549345C,
+	(q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC597781,
+	(q31_t)0x85109CDC, (q31_t)0xDCBA1008, (q31_t)0x84F4C2D3,
+	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD7B8220,
+	(q31_t)0x84BDF285, (q31_t)0xDDDC5B3A, (q31_t)0x84A2FC62,
+	(q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE9E4C60,
+	(q31_t)0x846DF476, (q31_t)0xDEFF63F4, (q31_t)0x8453E2CE,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDFC1CFF2,
+	(q31_t)0x8420A46B, (q31_t)0xE02323E5, (q31_t)0x840777CF,
+	(q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0E60684,
+	(q31_t)0x83D60411, (q31_t)0xE14794B9, (q31_t)0x83BDBD0D,
+	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE20AE9C1,
+	(q31_t)0x838E1507, (q31_t)0xE26CB01A, (q31_t)0x8376B422,
+	(q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE330734C,
+	(q31_t)0x8348D8DB, (q31_t)0xE3926FAC, (q31_t)0x83325E97,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4569CCB,
+	(q31_t)0x8306510F, (q31_t)0xE4B8CD10, (q31_t)0x82F0BDE8,
+	(q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE57D5FDA,
+	(q31_t)0x82C67F13, (q31_t)0xE5DFC1E4, (q31_t)0x82B1D381,
+	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6A4B616,
+	(q31_t)0x8289644A, (q31_t)0xE70747C3, (q31_t)0x8275A0C0,
+	(q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE7CC9917,
+	(q31_t)0x824F0208, (q31_t)0xE82F5844, (q31_t)0x823C26F2,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8F50273,
+	(q31_t)0x8217598F, (q31_t)0xE957ECFB, (q31_t)0x82056758,
+	(q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xEA1DEBBB,
+	(q31_t)0x81E26C16, (q31_t)0xEA80FF79, (q31_t)0x81D16320,
+	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB474E80,
+	(q31_t)0x81B03AC1, (q31_t)0xEBAA894E, (q31_t)0x81A01B6C,
+	(q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC71244F,
+	(q31_t)0x8180C6A9, (q31_t)0xECD48406, (q31_t)0x8171914E,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED9B66B2,
+	(q31_t)0x815410D3, (q31_t)0xEDFEE92B, (q31_t)0x8145C5C6,
+	(q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEEC60F31,
+	(q31_t)0x812A1A39, (q31_t)0xEF29B243, (q31_t)0x811CB9CA,
+	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFF11752,
+	(q31_t)0x8102E3C3, (q31_t)0xF054D8D4, (q31_t)0x80F66E3C,
+	(q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF11C789A,
+	(q31_t)0x80DE6E4C, (q31_t)0xF1805662, (q31_t)0x80D2E3F1,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF2482C89,
+	(q31_t)0x80BCBA9C, (q31_t)0xF2AC246D, (q31_t)0x80B21BAF,
+	(q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF3742CA1,
+	(q31_t)0x809DC970, (q31_t)0xF3D83C76, (q31_t)0x8094162B,
+	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF4A07260,
+	(q31_t)0x80819B74, (q31_t)0xF50497FA, (q31_t)0x8078D40D,
+	(q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF5CCF743,
+	(q31_t)0x80683143, (q31_t)0xF6313076, (q31_t)0x806055EA,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6F9B4C5,
+	(q31_t)0x80518B6B, (q31_t)0xF75DFF65, (q31_t)0x804A9C4D,
+	(q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF826A461,
+	(q31_t)0x803DAA69, (q31_t)0xF88AFE41, (q31_t)0x8037A7AC,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF953BF90,
+	(q31_t)0x802C8EAD, (q31_t)0xF9B82683, (q31_t)0x80277872,
+	(q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA80FFCB,
+	(q31_t)0x801E3894, (q31_t)0xFAE571A4, (q31_t)0x801A0EF7,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFBAE5E89,
+	(q31_t)0x8012A86F, (q31_t)0xFC12D919, (q31_t)0x800F6B88,
+	(q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCDBD541,
+	(q31_t)0x8009DE7D, (q31_t)0xFD40565B, (q31_t)0x80078E5E,
+	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFE095D69,
+	(q31_t)0x8003DAF0, (q31_t)0xFE6DE2E0, (q31_t)0x800277A5,
+	(q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF36F078,
+	(q31_t)0x80009DE9, (q31_t)0xFF9B781D, (q31_t)0x8000277A
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
+/**
+  @par
+  Example code for Q31 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefQ31[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefQ31[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to Q31(Fixed point 1.31):
+ 	round(twiddleCoefQ31(i) * pow(2, 31))
+ */
+const q31_t twiddleCoef_4096_q31[6144] =
+{
+	(q31_t)0x7FFFFFFF, (q31_t)0x00000000, (q31_t)0x7FFFF621,
+	(q31_t)0x003243F5, (q31_t)0x7FFFD885, (q31_t)0x006487E3,
+	(q31_t)0x7FFFA72C, (q31_t)0x0096CBC1, (q31_t)0x7FFF6216,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF0942, (q31_t)0x00FB532F,
+	(q31_t)0x7FFE9CB2, (q31_t)0x012D96B0, (q31_t)0x7FFE1C64,
+	(q31_t)0x015FDA03, (q31_t)0x7FFD885A, (q31_t)0x01921D1F,
+	(q31_t)0x7FFCE093, (q31_t)0x01C45FFE, (q31_t)0x7FFC250F,
+	(q31_t)0x01F6A296, (q31_t)0x7FFB55CE, (q31_t)0x0228E4E1,
+	(q31_t)0x7FFA72D1, (q31_t)0x025B26D7, (q31_t)0x7FF97C17,
+	(q31_t)0x028D6870, (q31_t)0x7FF871A1, (q31_t)0x02BFA9A4,
+	(q31_t)0x7FF7536F, (q31_t)0x02F1EA6B, (q31_t)0x7FF62182,
+	(q31_t)0x03242ABF, (q31_t)0x7FF4DBD8, (q31_t)0x03566A96,
+	(q31_t)0x7FF38273, (q31_t)0x0388A9E9, (q31_t)0x7FF21553,
+	(q31_t)0x03BAE8B1, (q31_t)0x7FF09477, (q31_t)0x03ED26E6,
+	(q31_t)0x7FEEFFE1, (q31_t)0x041F647F, (q31_t)0x7FED5790,
+	(q31_t)0x0451A176, (q31_t)0x7FEB9B85, (q31_t)0x0483DDC3,
+	(q31_t)0x7FE9CBC0, (q31_t)0x04B6195D, (q31_t)0x7FE7E840,
+	(q31_t)0x04E8543D, (q31_t)0x7FE5F108, (q31_t)0x051A8E5C,
+	(q31_t)0x7FE3E616, (q31_t)0x054CC7B0, (q31_t)0x7FE1C76B,
+	(q31_t)0x057F0034, (q31_t)0x7FDF9508, (q31_t)0x05B137DF,
+	(q31_t)0x7FDD4EEC, (q31_t)0x05E36EA9, (q31_t)0x7FDAF518,
+	(q31_t)0x0615A48A, (q31_t)0x7FD8878D, (q31_t)0x0647D97C,
+	(q31_t)0x7FD6064B, (q31_t)0x067A0D75, (q31_t)0x7FD37152,
+	(q31_t)0x06AC406F, (q31_t)0x7FD0C8A3, (q31_t)0x06DE7261,
+	(q31_t)0x7FCE0C3E, (q31_t)0x0710A344, (q31_t)0x7FCB3C23,
+	(q31_t)0x0742D310, (q31_t)0x7FC85853, (q31_t)0x077501BE,
+	(q31_t)0x7FC560CF, (q31_t)0x07A72F45, (q31_t)0x7FC25596,
+	(q31_t)0x07D95B9E, (q31_t)0x7FBF36A9, (q31_t)0x080B86C1,
+	(q31_t)0x7FBC040A, (q31_t)0x083DB0A7, (q31_t)0x7FB8BDB7,
+	(q31_t)0x086FD947, (q31_t)0x7FB563B2, (q31_t)0x08A2009A,
+	(q31_t)0x7FB1F5FC, (q31_t)0x08D42698, (q31_t)0x7FAE7494,
+	(q31_t)0x09064B3A, (q31_t)0x7FAADF7C, (q31_t)0x09386E77,
+	(q31_t)0x7FA736B4, (q31_t)0x096A9049, (q31_t)0x7FA37A3C,
+	(q31_t)0x099CB0A7, (q31_t)0x7F9FAA15, (q31_t)0x09CECF89,
+	(q31_t)0x7F9BC63F, (q31_t)0x0A00ECE8, (q31_t)0x7F97CEBC,
+	(q31_t)0x0A3308BC, (q31_t)0x7F93C38C, (q31_t)0x0A6522FE,
+	(q31_t)0x7F8FA4AF, (q31_t)0x0A973BA5, (q31_t)0x7F8B7226,
+	(q31_t)0x0AC952AA, (q31_t)0x7F872BF3, (q31_t)0x0AFB6805,
+	(q31_t)0x7F82D214, (q31_t)0x0B2D7BAE, (q31_t)0x7F7E648B,
+	(q31_t)0x0B5F8D9F, (q31_t)0x7F79E35A, (q31_t)0x0B919DCE,
+	(q31_t)0x7F754E7F, (q31_t)0x0BC3AC35, (q31_t)0x7F70A5FD,
+	(q31_t)0x0BF5B8CB, (q31_t)0x7F6BE9D4, (q31_t)0x0C27C389,
+	(q31_t)0x7F671A04, (q31_t)0x0C59CC67, (q31_t)0x7F62368F,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F5D3F75, (q31_t)0x0CBDD865,
+	(q31_t)0x7F5834B6, (q31_t)0x0CEFDB75, (q31_t)0x7F531654,
+	(q31_t)0x0D21DC87, (q31_t)0x7F4DE450, (q31_t)0x0D53DB92,
+	(q31_t)0x7F489EAA, (q31_t)0x0D85D88F, (q31_t)0x7F434563,
+	(q31_t)0x0DB7D376, (q31_t)0x7F3DD87C, (q31_t)0x0DE9CC3F,
+	(q31_t)0x7F3857F5, (q31_t)0x0E1BC2E3, (q31_t)0x7F32C3D0,
+	(q31_t)0x0E4DB75B, (q31_t)0x7F2D1C0E, (q31_t)0x0E7FA99D,
+	(q31_t)0x7F2760AF, (q31_t)0x0EB199A3, (q31_t)0x7F2191B4,
+	(q31_t)0x0EE38765, (q31_t)0x7F1BAF1E, (q31_t)0x0F1572DC,
+	(q31_t)0x7F15B8EE, (q31_t)0x0F475BFE, (q31_t)0x7F0FAF24,
+	(q31_t)0x0F7942C6, (q31_t)0x7F0991C3, (q31_t)0x0FAB272B,
+	(q31_t)0x7F0360CB, (q31_t)0x0FDD0925, (q31_t)0x7EFD1C3C,
+	(q31_t)0x100EE8AD, (q31_t)0x7EF6C418, (q31_t)0x1040C5BB,
+	(q31_t)0x7EF0585F, (q31_t)0x1072A047, (q31_t)0x7EE9D913,
+	(q31_t)0x10A4784A, (q31_t)0x7EE34635, (q31_t)0x10D64DBC,
+	(q31_t)0x7EDC9FC6, (q31_t)0x11082096, (q31_t)0x7ED5E5C6,
+	(q31_t)0x1139F0CE, (q31_t)0x7ECF1837, (q31_t)0x116BBE5F,
+	(q31_t)0x7EC8371A, (q31_t)0x119D8940, (q31_t)0x7EC1426F,
+	(q31_t)0x11CF516A, (q31_t)0x7EBA3A39, (q31_t)0x120116D4,
+	(q31_t)0x7EB31E77, (q31_t)0x1232D978, (q31_t)0x7EABEF2C,
+	(q31_t)0x1264994E, (q31_t)0x7EA4AC58, (q31_t)0x1296564D,
+	(q31_t)0x7E9D55FC, (q31_t)0x12C8106E, (q31_t)0x7E95EC19,
+	(q31_t)0x12F9C7AA, (q31_t)0x7E8E6EB1, (q31_t)0x132B7BF9,
+	(q31_t)0x7E86DDC5, (q31_t)0x135D2D53, (q31_t)0x7E7F3956,
+	(q31_t)0x138EDBB0, (q31_t)0x7E778165, (q31_t)0x13C0870A,
+	(q31_t)0x7E6FB5F3, (q31_t)0x13F22F57, (q31_t)0x7E67D702,
+	(q31_t)0x1423D492, (q31_t)0x7E5FE493, (q31_t)0x145576B1,
+	(q31_t)0x7E57DEA6, (q31_t)0x148715AD, (q31_t)0x7E4FC53E,
+	(q31_t)0x14B8B17F, (q31_t)0x7E47985B, (q31_t)0x14EA4A1F,
+	(q31_t)0x7E3F57FE, (q31_t)0x151BDF85, (q31_t)0x7E37042A,
+	(q31_t)0x154D71AA, (q31_t)0x7E2E9CDF, (q31_t)0x157F0086,
+	(q31_t)0x7E26221E, (q31_t)0x15B08C11, (q31_t)0x7E1D93E9,
+	(q31_t)0x15E21444, (q31_t)0x7E14F242, (q31_t)0x16139917,
+	(q31_t)0x7E0C3D29, (q31_t)0x16451A83, (q31_t)0x7E03749F,
+	(q31_t)0x1676987F, (q31_t)0x7DFA98A7, (q31_t)0x16A81305,
+	(q31_t)0x7DF1A942, (q31_t)0x16D98A0C, (q31_t)0x7DE8A670,
+	(q31_t)0x170AFD8D, (q31_t)0x7DDF9034, (q31_t)0x173C6D80,
+	(q31_t)0x7DD6668E, (q31_t)0x176DD9DE, (q31_t)0x7DCD2981,
+	(q31_t)0x179F429F, (q31_t)0x7DC3D90D, (q31_t)0x17D0A7BB,
+	(q31_t)0x7DBA7534, (q31_t)0x1802092C, (q31_t)0x7DB0FDF7,
+	(q31_t)0x183366E8, (q31_t)0x7DA77359, (q31_t)0x1864C0E9,
+	(q31_t)0x7D9DD55A, (q31_t)0x18961727, (q31_t)0x7D9423FB,
+	(q31_t)0x18C7699B, (q31_t)0x7D8A5F3F, (q31_t)0x18F8B83C,
+	(q31_t)0x7D808727, (q31_t)0x192A0303, (q31_t)0x7D769BB5,
+	(q31_t)0x195B49E9, (q31_t)0x7D6C9CE9, (q31_t)0x198C8CE6,
+	(q31_t)0x7D628AC5, (q31_t)0x19BDCBF2, (q31_t)0x7D58654C,
+	(q31_t)0x19EF0706, (q31_t)0x7D4E2C7E, (q31_t)0x1A203E1B,
+	(q31_t)0x7D43E05E, (q31_t)0x1A517127, (q31_t)0x7D3980EC,
+	(q31_t)0x1A82A025, (q31_t)0x7D2F0E2A, (q31_t)0x1AB3CB0C,
+	(q31_t)0x7D24881A, (q31_t)0x1AE4F1D6, (q31_t)0x7D19EEBE,
+	(q31_t)0x1B161479, (q31_t)0x7D0F4218, (q31_t)0x1B4732EF,
+	(q31_t)0x7D048228, (q31_t)0x1B784D30, (q31_t)0x7CF9AEF0,
+	(q31_t)0x1BA96334, (q31_t)0x7CEEC873, (q31_t)0x1BDA74F5,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1C0B826A, (q31_t)0x7CD8C1AD,
+	(q31_t)0x1C3C8B8C, (q31_t)0x7CCDA168, (q31_t)0x1C6D9053,
+	(q31_t)0x7CC26DE5, (q31_t)0x1C9E90B8, (q31_t)0x7CB72724,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7CABCD27, (q31_t)0x1D00843C,
+	(q31_t)0x7CA05FF1, (q31_t)0x1D31774D, (q31_t)0x7C94DF82,
+	(q31_t)0x1D6265DD, (q31_t)0x7C894BDD, (q31_t)0x1D934FE5,
+	(q31_t)0x7C7DA504, (q31_t)0x1DC4355D, (q31_t)0x7C71EAF8,
+	(q31_t)0x1DF5163F, (q31_t)0x7C661DBB, (q31_t)0x1E25F281,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1E56CA1E, (q31_t)0x7C4E49B6,
+	(q31_t)0x1E879D0C, (q31_t)0x7C4242F2, (q31_t)0x1EB86B46,
+	(q31_t)0x7C362904, (q31_t)0x1EE934C2, (q31_t)0x7C29FBEE,
+	(q31_t)0x1F19F97B, (q31_t)0x7C1DBBB2, (q31_t)0x1F4AB967,
+	(q31_t)0x7C116853, (q31_t)0x1F7B7480, (q31_t)0x7C0501D1,
+	(q31_t)0x1FAC2ABF, (q31_t)0x7BF88830, (q31_t)0x1FDCDC1A,
+	(q31_t)0x7BEBFB70, (q31_t)0x200D888C, (q31_t)0x7BDF5B94,
+	(q31_t)0x203E300D, (q31_t)0x7BD2A89E, (q31_t)0x206ED295,
+	(q31_t)0x7BC5E28F, (q31_t)0x209F701C, (q31_t)0x7BB9096A,
+	(q31_t)0x20D0089B, (q31_t)0x7BAC1D31, (q31_t)0x21009C0B,
+	(q31_t)0x7B9F1DE5, (q31_t)0x21312A65, (q31_t)0x7B920B89,
+	(q31_t)0x2161B39F, (q31_t)0x7B84E61E, (q31_t)0x219237B4,
+	(q31_t)0x7B77ADA8, (q31_t)0x21C2B69C, (q31_t)0x7B6A6227,
+	(q31_t)0x21F3304E, (q31_t)0x7B5D039D, (q31_t)0x2223A4C5,
+	(q31_t)0x7B4F920E, (q31_t)0x225413F8, (q31_t)0x7B420D7A,
+	(q31_t)0x22847DDF, (q31_t)0x7B3475E4, (q31_t)0x22B4E274,
+	(q31_t)0x7B26CB4F, (q31_t)0x22E541AE, (q31_t)0x7B190DBB,
+	(q31_t)0x23159B87, (q31_t)0x7B0B3D2C, (q31_t)0x2345EFF7,
+	(q31_t)0x7AFD59A3, (q31_t)0x23763EF7, (q31_t)0x7AEF6323,
+	(q31_t)0x23A6887E, (q31_t)0x7AE159AE, (q31_t)0x23D6CC86,
+	(q31_t)0x7AD33D45, (q31_t)0x24070B07, (q31_t)0x7AC50DEB,
+	(q31_t)0x243743FA, (q31_t)0x7AB6CBA3, (q31_t)0x24677757,
+	(q31_t)0x7AA8766E, (q31_t)0x2497A517, (q31_t)0x7A9A0E4F,
+	(q31_t)0x24C7CD32, (q31_t)0x7A8B9348, (q31_t)0x24F7EFA1,
+	(q31_t)0x7A7D055B, (q31_t)0x25280C5D, (q31_t)0x7A6E648A,
+	(q31_t)0x2558235E, (q31_t)0x7A5FB0D8, (q31_t)0x2588349D,
+	(q31_t)0x7A50EA46, (q31_t)0x25B84012, (q31_t)0x7A4210D8,
+	(q31_t)0x25E845B5, (q31_t)0x7A33248F, (q31_t)0x26184581,
+	(q31_t)0x7A24256E, (q31_t)0x26483F6C, (q31_t)0x7A151377,
+	(q31_t)0x26783370, (q31_t)0x7A05EEAD, (q31_t)0x26A82185,
+	(q31_t)0x79F6B711, (q31_t)0x26D809A5, (q31_t)0x79E76CA6,
+	(q31_t)0x2707EBC6, (q31_t)0x79D80F6F, (q31_t)0x2737C7E3,
+	(q31_t)0x79C89F6D, (q31_t)0x27679DF4, (q31_t)0x79B91CA4,
+	(q31_t)0x27976DF1, (q31_t)0x79A98715, (q31_t)0x27C737D2,
+	(q31_t)0x7999DEC3, (q31_t)0x27F6FB92, (q31_t)0x798A23B1,
+	(q31_t)0x2826B928, (q31_t)0x797A55E0, (q31_t)0x2856708C,
+	(q31_t)0x796A7554, (q31_t)0x288621B9, (q31_t)0x795A820E,
+	(q31_t)0x28B5CCA5, (q31_t)0x794A7C11, (q31_t)0x28E5714A,
+	(q31_t)0x793A6360, (q31_t)0x29150FA1, (q31_t)0x792A37FE,
+	(q31_t)0x2944A7A2, (q31_t)0x7919F9EB, (q31_t)0x29743945,
+	(q31_t)0x7909A92C, (q31_t)0x29A3C484, (q31_t)0x78F945C3,
+	(q31_t)0x29D34958, (q31_t)0x78E8CFB1, (q31_t)0x2A02C7B8,
+	(q31_t)0x78D846FB, (q31_t)0x2A323F9D, (q31_t)0x78C7ABA1,
+	(q31_t)0x2A61B101, (q31_t)0x78B6FDA8, (q31_t)0x2A911BDB,
+	(q31_t)0x78A63D10, (q31_t)0x2AC08025, (q31_t)0x789569DE,
+	(q31_t)0x2AEFDDD8, (q31_t)0x78848413, (q31_t)0x2B1F34EB,
+	(q31_t)0x78738BB3, (q31_t)0x2B4E8558, (q31_t)0x786280BF,
+	(q31_t)0x2B7DCF17, (q31_t)0x7851633B, (q31_t)0x2BAD1221,
+	(q31_t)0x78403328, (q31_t)0x2BDC4E6F, (q31_t)0x782EF08B,
+	(q31_t)0x2C0B83F9, (q31_t)0x781D9B64, (q31_t)0x2C3AB2B9,
+	(q31_t)0x780C33B8, (q31_t)0x2C69DAA6, (q31_t)0x77FAB988,
+	(q31_t)0x2C98FBBA, (q31_t)0x77E92CD8, (q31_t)0x2CC815ED,
+	(q31_t)0x77D78DAA, (q31_t)0x2CF72939, (q31_t)0x77C5DC01,
+	(q31_t)0x2D263595, (q31_t)0x77B417DF, (q31_t)0x2D553AFB,
+	(q31_t)0x77A24148, (q31_t)0x2D843963, (q31_t)0x7790583D,
+	(q31_t)0x2DB330C7, (q31_t)0x777E5CC3, (q31_t)0x2DE2211E,
+	(q31_t)0x776C4EDB, (q31_t)0x2E110A62, (q31_t)0x775A2E88,
+	(q31_t)0x2E3FEC8B, (q31_t)0x7747FBCE, (q31_t)0x2E6EC792,
+	(q31_t)0x7735B6AE, (q31_t)0x2E9D9B70, (q31_t)0x77235F2D,
+	(q31_t)0x2ECC681E, (q31_t)0x7710F54B, (q31_t)0x2EFB2D94,
+	(q31_t)0x76FE790E, (q31_t)0x2F29EBCC, (q31_t)0x76EBEA77,
+	(q31_t)0x2F58A2BD, (q31_t)0x76D94988, (q31_t)0x2F875262,
+	(q31_t)0x76C69646, (q31_t)0x2FB5FAB2, (q31_t)0x76B3D0B3,
+	(q31_t)0x2FE49BA6, (q31_t)0x76A0F8D2, (q31_t)0x30133538,
+	(q31_t)0x768E0EA5, (q31_t)0x3041C760, (q31_t)0x767B1230,
+	(q31_t)0x30705217, (q31_t)0x76680376, (q31_t)0x309ED555,
+	(q31_t)0x7654E279, (q31_t)0x30CD5114, (q31_t)0x7641AF3C,
+	(q31_t)0x30FBC54D, (q31_t)0x762E69C3, (q31_t)0x312A31F8,
+	(q31_t)0x761B1211, (q31_t)0x3158970D, (q31_t)0x7607A827,
+	(q31_t)0x3186F487, (q31_t)0x75F42C0A, (q31_t)0x31B54A5D,
+	(q31_t)0x75E09DBD, (q31_t)0x31E39889, (q31_t)0x75CCFD42,
+	(q31_t)0x3211DF03, (q31_t)0x75B94A9C, (q31_t)0x32401DC5,
+	(q31_t)0x75A585CF, (q31_t)0x326E54C7, (q31_t)0x7591AEDD,
+	(q31_t)0x329C8402, (q31_t)0x757DC5CA, (q31_t)0x32CAAB6F,
+	(q31_t)0x7569CA98, (q31_t)0x32F8CB07, (q31_t)0x7555BD4B,
+	(q31_t)0x3326E2C2, (q31_t)0x75419DE6, (q31_t)0x3354F29A,
+	(q31_t)0x752D6C6C, (q31_t)0x3382FA88, (q31_t)0x751928E0,
+	(q31_t)0x33B0FA84, (q31_t)0x7504D345, (q31_t)0x33DEF287,
+	(q31_t)0x74F06B9E, (q31_t)0x340CE28A, (q31_t)0x74DBF1EF,
+	(q31_t)0x343ACA87, (q31_t)0x74C7663A, (q31_t)0x3468AA76,
+	(q31_t)0x74B2C883, (q31_t)0x3496824F, (q31_t)0x749E18CD,
+	(q31_t)0x34C4520D, (q31_t)0x7489571B, (q31_t)0x34F219A7,
+	(q31_t)0x74748371, (q31_t)0x351FD917, (q31_t)0x745F9DD1,
+	(q31_t)0x354D9056, (q31_t)0x744AA63E, (q31_t)0x357B3F5D,
+	(q31_t)0x74359CBD, (q31_t)0x35A8E624, (q31_t)0x74208150,
+	(q31_t)0x35D684A5, (q31_t)0x740B53FA, (q31_t)0x36041AD9,
+	(q31_t)0x73F614C0, (q31_t)0x3631A8B7, (q31_t)0x73E0C3A3,
+	(q31_t)0x365F2E3B, (q31_t)0x73CB60A7, (q31_t)0x368CAB5C,
+	(q31_t)0x73B5EBD0, (q31_t)0x36BA2013, (q31_t)0x73A06522,
+	(q31_t)0x36E78C5A, (q31_t)0x738ACC9E, (q31_t)0x3714F02A,
+	(q31_t)0x73752249, (q31_t)0x37424B7A, (q31_t)0x735F6626,
+	(q31_t)0x376F9E46, (q31_t)0x73499838, (q31_t)0x379CE884,
+	(q31_t)0x7333B883, (q31_t)0x37CA2A30, (q31_t)0x731DC709,
+	(q31_t)0x37F76340, (q31_t)0x7307C3D0, (q31_t)0x382493B0,
+	(q31_t)0x72F1AED8, (q31_t)0x3851BB76, (q31_t)0x72DB8828,
+	(q31_t)0x387EDA8E, (q31_t)0x72C54FC0, (q31_t)0x38ABF0EF,
+	(q31_t)0x72AF05A6, (q31_t)0x38D8FE93, (q31_t)0x7298A9DC,
+	(q31_t)0x39060372, (q31_t)0x72823C66, (q31_t)0x3932FF87,
+	(q31_t)0x726BBD48, (q31_t)0x395FF2C9, (q31_t)0x72552C84,
+	(q31_t)0x398CDD32, (q31_t)0x723E8A1F, (q31_t)0x39B9BEBB,
+	(q31_t)0x7227D61C, (q31_t)0x39E6975D, (q31_t)0x7211107D,
+	(q31_t)0x3A136712, (q31_t)0x71FA3948, (q31_t)0x3A402DD1,
+	(q31_t)0x71E3507F, (q31_t)0x3A6CEB95, (q31_t)0x71CC5626,
+	(q31_t)0x3A99A057, (q31_t)0x71B54A40, (q31_t)0x3AC64C0F,
+	(q31_t)0x719E2CD2, (q31_t)0x3AF2EEB7, (q31_t)0x7186FDDE,
+	(q31_t)0x3B1F8847, (q31_t)0x716FBD68, (q31_t)0x3B4C18BA,
+	(q31_t)0x71586B73, (q31_t)0x3B78A007, (q31_t)0x71410804,
+	(q31_t)0x3BA51E29, (q31_t)0x7129931E, (q31_t)0x3BD19317,
+	(q31_t)0x71120CC5, (q31_t)0x3BFDFECD, (q31_t)0x70FA74FB,
+	(q31_t)0x3C2A6142, (q31_t)0x70E2CBC6, (q31_t)0x3C56BA70,
+	(q31_t)0x70CB1127, (q31_t)0x3C830A4F, (q31_t)0x70B34524,
+	(q31_t)0x3CAF50DA, (q31_t)0x709B67C0, (q31_t)0x3CDB8E09,
+	(q31_t)0x708378FE, (q31_t)0x3D07C1D5, (q31_t)0x706B78E3,
+	(q31_t)0x3D33EC39, (q31_t)0x70536771, (q31_t)0x3D600D2B,
+	(q31_t)0x703B44AC, (q31_t)0x3D8C24A7, (q31_t)0x70231099,
+	(q31_t)0x3DB832A5, (q31_t)0x700ACB3B, (q31_t)0x3DE4371F,
+	(q31_t)0x6FF27496, (q31_t)0x3E10320D, (q31_t)0x6FDA0CAD,
+	(q31_t)0x3E3C2369, (q31_t)0x6FC19385, (q31_t)0x3E680B2C,
+	(q31_t)0x6FA90920, (q31_t)0x3E93E94F, (q31_t)0x6F906D84,
+	(q31_t)0x3EBFBDCC, (q31_t)0x6F77C0B3, (q31_t)0x3EEB889C,
+	(q31_t)0x6F5F02B1, (q31_t)0x3F1749B7, (q31_t)0x6F463383,
+	(q31_t)0x3F430118, (q31_t)0x6F2D532C, (q31_t)0x3F6EAEB8,
+	(q31_t)0x6F1461AF, (q31_t)0x3F9A528F, (q31_t)0x6EFB5F12,
+	(q31_t)0x3FC5EC97, (q31_t)0x6EE24B57, (q31_t)0x3FF17CCA,
+	(q31_t)0x6EC92682, (q31_t)0x401D0320, (q31_t)0x6EAFF098,
+	(q31_t)0x40487F93, (q31_t)0x6E96A99C, (q31_t)0x4073F21D,
+	(q31_t)0x6E7D5193, (q31_t)0x409F5AB6, (q31_t)0x6E63E87F,
+	(q31_t)0x40CAB957, (q31_t)0x6E4A6E65, (q31_t)0x40F60DFB,
+	(q31_t)0x6E30E349, (q31_t)0x4121589A, (q31_t)0x6E17472F,
+	(q31_t)0x414C992E, (q31_t)0x6DFD9A1B, (q31_t)0x4177CFB0,
+	(q31_t)0x6DE3DC11, (q31_t)0x41A2FC1A, (q31_t)0x6DCA0D14,
+	(q31_t)0x41CE1E64, (q31_t)0x6DB02D29, (q31_t)0x41F93688,
+	(q31_t)0x6D963C54, (q31_t)0x42244480, (q31_t)0x6D7C3A98,
+	(q31_t)0x424F4845, (q31_t)0x6D6227FA, (q31_t)0x427A41D0,
+	(q31_t)0x6D48047E, (q31_t)0x42A5311A, (q31_t)0x6D2DD027,
+	(q31_t)0x42D0161E, (q31_t)0x6D138AFA, (q31_t)0x42FAF0D4,
+	(q31_t)0x6CF934FB, (q31_t)0x4325C135, (q31_t)0x6CDECE2E,
+	(q31_t)0x4350873C, (q31_t)0x6CC45697, (q31_t)0x437B42E1,
+	(q31_t)0x6CA9CE3A, (q31_t)0x43A5F41E, (q31_t)0x6C8F351C,
+	(q31_t)0x43D09AEC, (q31_t)0x6C748B3F, (q31_t)0x43FB3745,
+	(q31_t)0x6C59D0A9, (q31_t)0x4425C923, (q31_t)0x6C3F055D,
+	(q31_t)0x4450507E, (q31_t)0x6C242960, (q31_t)0x447ACD50,
+	(q31_t)0x6C093CB6, (q31_t)0x44A53F93, (q31_t)0x6BEE3F62,
+	(q31_t)0x44CFA73F, (q31_t)0x6BD3316A, (q31_t)0x44FA044F,
+	(q31_t)0x6BB812D0, (q31_t)0x452456BC, (q31_t)0x6B9CE39B,
+	(q31_t)0x454E9E80, (q31_t)0x6B81A3CD, (q31_t)0x4578DB93,
+	(q31_t)0x6B66536A, (q31_t)0x45A30DF0, (q31_t)0x6B4AF278,
+	(q31_t)0x45CD358F, (q31_t)0x6B2F80FA, (q31_t)0x45F7526B,
+	(q31_t)0x6B13FEF5, (q31_t)0x4621647C, (q31_t)0x6AF86C6C,
+	(q31_t)0x464B6BBD, (q31_t)0x6ADCC964, (q31_t)0x46756827,
+	(q31_t)0x6AC115E1, (q31_t)0x469F59B4, (q31_t)0x6AA551E8,
+	(q31_t)0x46C9405C, (q31_t)0x6A897D7D, (q31_t)0x46F31C1A,
+	(q31_t)0x6A6D98A4, (q31_t)0x471CECE6, (q31_t)0x6A51A361,
+	(q31_t)0x4746B2BC, (q31_t)0x6A359DB9, (q31_t)0x47706D93,
+	(q31_t)0x6A1987B0, (q31_t)0x479A1D66, (q31_t)0x69FD614A,
+	(q31_t)0x47C3C22E, (q31_t)0x69E12A8C, (q31_t)0x47ED5BE6,
+	(q31_t)0x69C4E37A, (q31_t)0x4816EA85, (q31_t)0x69A88C18,
+	(q31_t)0x48406E07, (q31_t)0x698C246C, (q31_t)0x4869E664,
+	(q31_t)0x696FAC78, (q31_t)0x48935397, (q31_t)0x69532442,
+	(q31_t)0x48BCB598, (q31_t)0x69368BCE, (q31_t)0x48E60C62,
+	(q31_t)0x6919E320, (q31_t)0x490F57EE, (q31_t)0x68FD2A3D,
+	(q31_t)0x49389836, (q31_t)0x68E06129, (q31_t)0x4961CD32,
+	(q31_t)0x68C387E9, (q31_t)0x498AF6DE, (q31_t)0x68A69E81,
+	(q31_t)0x49B41533, (q31_t)0x6889A4F5, (q31_t)0x49DD282A,
+	(q31_t)0x686C9B4B, (q31_t)0x4A062FBD, (q31_t)0x684F8186,
+	(q31_t)0x4A2F2BE5, (q31_t)0x683257AA, (q31_t)0x4A581C9D,
+	(q31_t)0x68151DBE, (q31_t)0x4A8101DE, (q31_t)0x67F7D3C4,
+	(q31_t)0x4AA9DBA1, (q31_t)0x67DA79C2, (q31_t)0x4AD2A9E1,
+	(q31_t)0x67BD0FBC, (q31_t)0x4AFB6C97, (q31_t)0x679F95B7,
+	(q31_t)0x4B2423BD, (q31_t)0x67820BB6, (q31_t)0x4B4CCF4D,
+	(q31_t)0x676471C0, (q31_t)0x4B756F3F, (q31_t)0x6746C7D7,
+	(q31_t)0x4B9E038F, (q31_t)0x67290E02, (q31_t)0x4BC68C36,
+	(q31_t)0x670B4443, (q31_t)0x4BEF092D, (q31_t)0x66ED6AA1,
+	(q31_t)0x4C177A6E, (q31_t)0x66CF811F, (q31_t)0x4C3FDFF3,
+	(q31_t)0x66B187C3, (q31_t)0x4C6839B6, (q31_t)0x66937E90,
+	(q31_t)0x4C9087B1, (q31_t)0x6675658C, (q31_t)0x4CB8C9DD,
+	(q31_t)0x66573CBB, (q31_t)0x4CE10034, (q31_t)0x66390422,
+	(q31_t)0x4D092AB0, (q31_t)0x661ABBC5, (q31_t)0x4D31494B,
+	(q31_t)0x65FC63A9, (q31_t)0x4D595BFE, (q31_t)0x65DDFBD3,
+	(q31_t)0x4D8162C4, (q31_t)0x65BF8447, (q31_t)0x4DA95D96,
+	(q31_t)0x65A0FD0B, (q31_t)0x4DD14C6E, (q31_t)0x65826622,
+	(q31_t)0x4DF92F45, (q31_t)0x6563BF92, (q31_t)0x4E210617,
+	(q31_t)0x6545095F, (q31_t)0x4E48D0DC, (q31_t)0x6526438E,
+	(q31_t)0x4E708F8F, (q31_t)0x65076E24, (q31_t)0x4E984229,
+	(q31_t)0x64E88926, (q31_t)0x4EBFE8A4, (q31_t)0x64C99498,
+	(q31_t)0x4EE782FA, (q31_t)0x64AA907F, (q31_t)0x4F0F1126,
+	(q31_t)0x648B7CDF, (q31_t)0x4F369320, (q31_t)0x646C59BF,
+	(q31_t)0x4F5E08E3, (q31_t)0x644D2722, (q31_t)0x4F857268,
+	(q31_t)0x642DE50D, (q31_t)0x4FACCFAB, (q31_t)0x640E9385,
+	(q31_t)0x4FD420A3, (q31_t)0x63EF328F, (q31_t)0x4FFB654D,
+	(q31_t)0x63CFC230, (q31_t)0x50229DA0, (q31_t)0x63B0426D,
+	(q31_t)0x5049C999, (q31_t)0x6390B34A, (q31_t)0x5070E92F,
+	(q31_t)0x637114CC, (q31_t)0x5097FC5E, (q31_t)0x635166F8,
+	(q31_t)0x50BF031F, (q31_t)0x6331A9D4, (q31_t)0x50E5FD6C,
+	(q31_t)0x6311DD63, (q31_t)0x510CEB40, (q31_t)0x62F201AC,
+	(q31_t)0x5133CC94, (q31_t)0x62D216B2, (q31_t)0x515AA162,
+	(q31_t)0x62B21C7B, (q31_t)0x518169A4, (q31_t)0x6292130C,
+	(q31_t)0x51A82555, (q31_t)0x6271FA69, (q31_t)0x51CED46E,
+	(q31_t)0x6251D297, (q31_t)0x51F576E9, (q31_t)0x62319B9D,
+	(q31_t)0x521C0CC1, (q31_t)0x6211557D, (q31_t)0x524295EF,
+	(q31_t)0x61F1003E, (q31_t)0x5269126E, (q31_t)0x61D09BE5,
+	(q31_t)0x528F8237, (q31_t)0x61B02876, (q31_t)0x52B5E545,
+	(q31_t)0x618FA5F6, (q31_t)0x52DC3B92, (q31_t)0x616F146B,
+	(q31_t)0x53028517, (q31_t)0x614E73D9, (q31_t)0x5328C1D0,
+	(q31_t)0x612DC446, (q31_t)0x534EF1B5, (q31_t)0x610D05B7,
+	(q31_t)0x537514C1, (q31_t)0x60EC3830, (q31_t)0x539B2AEF,
+	(q31_t)0x60CB5BB6, (q31_t)0x53C13438, (q31_t)0x60AA704F,
+	(q31_t)0x53E73097, (q31_t)0x60897600, (q31_t)0x540D2005,
+	(q31_t)0x60686CCE, (q31_t)0x5433027D, (q31_t)0x604754BE,
+	(q31_t)0x5458D7F9, (q31_t)0x60262DD5, (q31_t)0x547EA073,
+	(q31_t)0x6004F818, (q31_t)0x54A45BE5, (q31_t)0x5FE3B38D,
+	(q31_t)0x54CA0A4A, (q31_t)0x5FC26038, (q31_t)0x54EFAB9C,
+	(q31_t)0x5FA0FE1E, (q31_t)0x55153FD4, (q31_t)0x5F7F8D46,
+	(q31_t)0x553AC6ED, (q31_t)0x5F5E0DB3, (q31_t)0x556040E2,
+	(q31_t)0x5F3C7F6B, (q31_t)0x5585ADAC, (q31_t)0x5F1AE273,
+	(q31_t)0x55AB0D46, (q31_t)0x5EF936D1, (q31_t)0x55D05FAA,
+	(q31_t)0x5ED77C89, (q31_t)0x55F5A4D2, (q31_t)0x5EB5B3A1,
+	(q31_t)0x561ADCB8, (q31_t)0x5E93DC1F, (q31_t)0x56400757,
+	(q31_t)0x5E71F606, (q31_t)0x566524AA, (q31_t)0x5E50015D,
+	(q31_t)0x568A34A9, (q31_t)0x5E2DFE28, (q31_t)0x56AF3750,
+	(q31_t)0x5E0BEC6E, (q31_t)0x56D42C99, (q31_t)0x5DE9CC32,
+	(q31_t)0x56F9147E, (q31_t)0x5DC79D7C, (q31_t)0x571DEEF9,
+	(q31_t)0x5DA5604E, (q31_t)0x5742BC05, (q31_t)0x5D8314B0,
+	(q31_t)0x57677B9D, (q31_t)0x5D60BAA6, (q31_t)0x578C2DB9,
+	(q31_t)0x5D3E5236, (q31_t)0x57B0D256, (q31_t)0x5D1BDB65,
+	(q31_t)0x57D5696C, (q31_t)0x5CF95638, (q31_t)0x57F9F2F7,
+	(q31_t)0x5CD6C2B4, (q31_t)0x581E6EF1, (q31_t)0x5CB420DF,
+	(q31_t)0x5842DD54, (q31_t)0x5C9170BF, (q31_t)0x58673E1B,
+	(q31_t)0x5C6EB258, (q31_t)0x588B913F, (q31_t)0x5C4BE5B0,
+	(q31_t)0x58AFD6BC, (q31_t)0x5C290ACC, (q31_t)0x58D40E8C,
+	(q31_t)0x5C0621B2, (q31_t)0x58F838A9, (q31_t)0x5BE32A67,
+	(q31_t)0x591C550E, (q31_t)0x5BC024F0, (q31_t)0x594063B4,
+	(q31_t)0x5B9D1153, (q31_t)0x59646497, (q31_t)0x5B79EF96,
+	(q31_t)0x598857B1, (q31_t)0x5B56BFBD, (q31_t)0x59AC3CFD,
+	(q31_t)0x5B3381CE, (q31_t)0x59D01474, (q31_t)0x5B1035CF,
+	(q31_t)0x59F3DE12, (q31_t)0x5AECDBC4, (q31_t)0x5A1799D0,
+	(q31_t)0x5AC973B4, (q31_t)0x5A3B47AA, (q31_t)0x5AA5FDA4,
+	(q31_t)0x5A5EE79A, (q31_t)0x5A82799A, (q31_t)0x5A82799A,
+	(q31_t)0x5A5EE79A, (q31_t)0x5AA5FDA4, (q31_t)0x5A3B47AA,
+	(q31_t)0x5AC973B4, (q31_t)0x5A1799D0, (q31_t)0x5AECDBC4,
+	(q31_t)0x59F3DE12, (q31_t)0x5B1035CF, (q31_t)0x59D01474,
+	(q31_t)0x5B3381CE, (q31_t)0x59AC3CFD, (q31_t)0x5B56BFBD,
+	(q31_t)0x598857B1, (q31_t)0x5B79EF96, (q31_t)0x59646497,
+	(q31_t)0x5B9D1153, (q31_t)0x594063B4, (q31_t)0x5BC024F0,
+	(q31_t)0x591C550E, (q31_t)0x5BE32A67, (q31_t)0x58F838A9,
+	(q31_t)0x5C0621B2, (q31_t)0x58D40E8C, (q31_t)0x5C290ACC,
+	(q31_t)0x58AFD6BC, (q31_t)0x5C4BE5B0, (q31_t)0x588B913F,
+	(q31_t)0x5C6EB258, (q31_t)0x58673E1B, (q31_t)0x5C9170BF,
+	(q31_t)0x5842DD54, (q31_t)0x5CB420DF, (q31_t)0x581E6EF1,
+	(q31_t)0x5CD6C2B4, (q31_t)0x57F9F2F7, (q31_t)0x5CF95638,
+	(q31_t)0x57D5696C, (q31_t)0x5D1BDB65, (q31_t)0x57B0D256,
+	(q31_t)0x5D3E5236, (q31_t)0x578C2DB9, (q31_t)0x5D60BAA6,
+	(q31_t)0x57677B9D, (q31_t)0x5D8314B0, (q31_t)0x5742BC05,
+	(q31_t)0x5DA5604E, (q31_t)0x571DEEF9, (q31_t)0x5DC79D7C,
+	(q31_t)0x56F9147E, (q31_t)0x5DE9CC32, (q31_t)0x56D42C99,
+	(q31_t)0x5E0BEC6E, (q31_t)0x56AF3750, (q31_t)0x5E2DFE28,
+	(q31_t)0x568A34A9, (q31_t)0x5E50015D, (q31_t)0x566524AA,
+	(q31_t)0x5E71F606, (q31_t)0x56400757, (q31_t)0x5E93DC1F,
+	(q31_t)0x561ADCB8, (q31_t)0x5EB5B3A1, (q31_t)0x55F5A4D2,
+	(q31_t)0x5ED77C89, (q31_t)0x55D05FAA, (q31_t)0x5EF936D1,
+	(q31_t)0x55AB0D46, (q31_t)0x5F1AE273, (q31_t)0x5585ADAC,
+	(q31_t)0x5F3C7F6B, (q31_t)0x556040E2, (q31_t)0x5F5E0DB3,
+	(q31_t)0x553AC6ED, (q31_t)0x5F7F8D46, (q31_t)0x55153FD4,
+	(q31_t)0x5FA0FE1E, (q31_t)0x54EFAB9C, (q31_t)0x5FC26038,
+	(q31_t)0x54CA0A4A, (q31_t)0x5FE3B38D, (q31_t)0x54A45BE5,
+	(q31_t)0x6004F818, (q31_t)0x547EA073, (q31_t)0x60262DD5,
+	(q31_t)0x5458D7F9, (q31_t)0x604754BE, (q31_t)0x5433027D,
+	(q31_t)0x60686CCE, (q31_t)0x540D2005, (q31_t)0x60897600,
+	(q31_t)0x53E73097, (q31_t)0x60AA704F, (q31_t)0x53C13438,
+	(q31_t)0x60CB5BB6, (q31_t)0x539B2AEF, (q31_t)0x60EC3830,
+	(q31_t)0x537514C1, (q31_t)0x610D05B7, (q31_t)0x534EF1B5,
+	(q31_t)0x612DC446, (q31_t)0x5328C1D0, (q31_t)0x614E73D9,
+	(q31_t)0x53028517, (q31_t)0x616F146B, (q31_t)0x52DC3B92,
+	(q31_t)0x618FA5F6, (q31_t)0x52B5E545, (q31_t)0x61B02876,
+	(q31_t)0x528F8237, (q31_t)0x61D09BE5, (q31_t)0x5269126E,
+	(q31_t)0x61F1003E, (q31_t)0x524295EF, (q31_t)0x6211557D,
+	(q31_t)0x521C0CC1, (q31_t)0x62319B9D, (q31_t)0x51F576E9,
+	(q31_t)0x6251D297, (q31_t)0x51CED46E, (q31_t)0x6271FA69,
+	(q31_t)0x51A82555, (q31_t)0x6292130C, (q31_t)0x518169A4,
+	(q31_t)0x62B21C7B, (q31_t)0x515AA162, (q31_t)0x62D216B2,
+	(q31_t)0x5133CC94, (q31_t)0x62F201AC, (q31_t)0x510CEB40,
+	(q31_t)0x6311DD63, (q31_t)0x50E5FD6C, (q31_t)0x6331A9D4,
+	(q31_t)0x50BF031F, (q31_t)0x635166F8, (q31_t)0x5097FC5E,
+	(q31_t)0x637114CC, (q31_t)0x5070E92F, (q31_t)0x6390B34A,
+	(q31_t)0x5049C999, (q31_t)0x63B0426D, (q31_t)0x50229DA0,
+	(q31_t)0x63CFC230, (q31_t)0x4FFB654D, (q31_t)0x63EF328F,
+	(q31_t)0x4FD420A3, (q31_t)0x640E9385, (q31_t)0x4FACCFAB,
+	(q31_t)0x642DE50D, (q31_t)0x4F857268, (q31_t)0x644D2722,
+	(q31_t)0x4F5E08E3, (q31_t)0x646C59BF, (q31_t)0x4F369320,
+	(q31_t)0x648B7CDF, (q31_t)0x4F0F1126, (q31_t)0x64AA907F,
+	(q31_t)0x4EE782FA, (q31_t)0x64C99498, (q31_t)0x4EBFE8A4,
+	(q31_t)0x64E88926, (q31_t)0x4E984229, (q31_t)0x65076E24,
+	(q31_t)0x4E708F8F, (q31_t)0x6526438E, (q31_t)0x4E48D0DC,
+	(q31_t)0x6545095F, (q31_t)0x4E210617, (q31_t)0x6563BF92,
+	(q31_t)0x4DF92F45, (q31_t)0x65826622, (q31_t)0x4DD14C6E,
+	(q31_t)0x65A0FD0B, (q31_t)0x4DA95D96, (q31_t)0x65BF8447,
+	(q31_t)0x4D8162C4, (q31_t)0x65DDFBD3, (q31_t)0x4D595BFE,
+	(q31_t)0x65FC63A9, (q31_t)0x4D31494B, (q31_t)0x661ABBC5,
+	(q31_t)0x4D092AB0, (q31_t)0x66390422, (q31_t)0x4CE10034,
+	(q31_t)0x66573CBB, (q31_t)0x4CB8C9DD, (q31_t)0x6675658C,
+	(q31_t)0x4C9087B1, (q31_t)0x66937E90, (q31_t)0x4C6839B6,
+	(q31_t)0x66B187C3, (q31_t)0x4C3FDFF3, (q31_t)0x66CF811F,
+	(q31_t)0x4C177A6E, (q31_t)0x66ED6AA1, (q31_t)0x4BEF092D,
+	(q31_t)0x670B4443, (q31_t)0x4BC68C36, (q31_t)0x67290E02,
+	(q31_t)0x4B9E038F, (q31_t)0x6746C7D7, (q31_t)0x4B756F3F,
+	(q31_t)0x676471C0, (q31_t)0x4B4CCF4D, (q31_t)0x67820BB6,
+	(q31_t)0x4B2423BD, (q31_t)0x679F95B7, (q31_t)0x4AFB6C97,
+	(q31_t)0x67BD0FBC, (q31_t)0x4AD2A9E1, (q31_t)0x67DA79C2,
+	(q31_t)0x4AA9DBA1, (q31_t)0x67F7D3C4, (q31_t)0x4A8101DE,
+	(q31_t)0x68151DBE, (q31_t)0x4A581C9D, (q31_t)0x683257AA,
+	(q31_t)0x4A2F2BE5, (q31_t)0x684F8186, (q31_t)0x4A062FBD,
+	(q31_t)0x686C9B4B, (q31_t)0x49DD282A, (q31_t)0x6889A4F5,
+	(q31_t)0x49B41533, (q31_t)0x68A69E81, (q31_t)0x498AF6DE,
+	(q31_t)0x68C387E9, (q31_t)0x4961CD32, (q31_t)0x68E06129,
+	(q31_t)0x49389836, (q31_t)0x68FD2A3D, (q31_t)0x490F57EE,
+	(q31_t)0x6919E320, (q31_t)0x48E60C62, (q31_t)0x69368BCE,
+	(q31_t)0x48BCB598, (q31_t)0x69532442, (q31_t)0x48935397,
+	(q31_t)0x696FAC78, (q31_t)0x4869E664, (q31_t)0x698C246C,
+	(q31_t)0x48406E07, (q31_t)0x69A88C18, (q31_t)0x4816EA85,
+	(q31_t)0x69C4E37A, (q31_t)0x47ED5BE6, (q31_t)0x69E12A8C,
+	(q31_t)0x47C3C22E, (q31_t)0x69FD614A, (q31_t)0x479A1D66,
+	(q31_t)0x6A1987B0, (q31_t)0x47706D93, (q31_t)0x6A359DB9,
+	(q31_t)0x4746B2BC, (q31_t)0x6A51A361, (q31_t)0x471CECE6,
+	(q31_t)0x6A6D98A4, (q31_t)0x46F31C1A, (q31_t)0x6A897D7D,
+	(q31_t)0x46C9405C, (q31_t)0x6AA551E8, (q31_t)0x469F59B4,
+	(q31_t)0x6AC115E1, (q31_t)0x46756827, (q31_t)0x6ADCC964,
+	(q31_t)0x464B6BBD, (q31_t)0x6AF86C6C, (q31_t)0x4621647C,
+	(q31_t)0x6B13FEF5, (q31_t)0x45F7526B, (q31_t)0x6B2F80FA,
+	(q31_t)0x45CD358F, (q31_t)0x6B4AF278, (q31_t)0x45A30DF0,
+	(q31_t)0x6B66536A, (q31_t)0x4578DB93, (q31_t)0x6B81A3CD,
+	(q31_t)0x454E9E80, (q31_t)0x6B9CE39B, (q31_t)0x452456BC,
+	(q31_t)0x6BB812D0, (q31_t)0x44FA044F, (q31_t)0x6BD3316A,
+	(q31_t)0x44CFA73F, (q31_t)0x6BEE3F62, (q31_t)0x44A53F93,
+	(q31_t)0x6C093CB6, (q31_t)0x447ACD50, (q31_t)0x6C242960,
+	(q31_t)0x4450507E, (q31_t)0x6C3F055D, (q31_t)0x4425C923,
+	(q31_t)0x6C59D0A9, (q31_t)0x43FB3745, (q31_t)0x6C748B3F,
+	(q31_t)0x43D09AEC, (q31_t)0x6C8F351C, (q31_t)0x43A5F41E,
+	(q31_t)0x6CA9CE3A, (q31_t)0x437B42E1, (q31_t)0x6CC45697,
+	(q31_t)0x4350873C, (q31_t)0x6CDECE2E, (q31_t)0x4325C135,
+	(q31_t)0x6CF934FB, (q31_t)0x42FAF0D4, (q31_t)0x6D138AFA,
+	(q31_t)0x42D0161E, (q31_t)0x6D2DD027, (q31_t)0x42A5311A,
+	(q31_t)0x6D48047E, (q31_t)0x427A41D0, (q31_t)0x6D6227FA,
+	(q31_t)0x424F4845, (q31_t)0x6D7C3A98, (q31_t)0x42244480,
+	(q31_t)0x6D963C54, (q31_t)0x41F93688, (q31_t)0x6DB02D29,
+	(q31_t)0x41CE1E64, (q31_t)0x6DCA0D14, (q31_t)0x41A2FC1A,
+	(q31_t)0x6DE3DC11, (q31_t)0x4177CFB0, (q31_t)0x6DFD9A1B,
+	(q31_t)0x414C992E, (q31_t)0x6E17472F, (q31_t)0x4121589A,
+	(q31_t)0x6E30E349, (q31_t)0x40F60DFB, (q31_t)0x6E4A6E65,
+	(q31_t)0x40CAB957, (q31_t)0x6E63E87F, (q31_t)0x409F5AB6,
+	(q31_t)0x6E7D5193, (q31_t)0x4073F21D, (q31_t)0x6E96A99C,
+	(q31_t)0x40487F93, (q31_t)0x6EAFF098, (q31_t)0x401D0320,
+	(q31_t)0x6EC92682, (q31_t)0x3FF17CCA, (q31_t)0x6EE24B57,
+	(q31_t)0x3FC5EC97, (q31_t)0x6EFB5F12, (q31_t)0x3F9A528F,
+	(q31_t)0x6F1461AF, (q31_t)0x3F6EAEB8, (q31_t)0x6F2D532C,
+	(q31_t)0x3F430118, (q31_t)0x6F463383, (q31_t)0x3F1749B7,
+	(q31_t)0x6F5F02B1, (q31_t)0x3EEB889C, (q31_t)0x6F77C0B3,
+	(q31_t)0x3EBFBDCC, (q31_t)0x6F906D84, (q31_t)0x3E93E94F,
+	(q31_t)0x6FA90920, (q31_t)0x3E680B2C, (q31_t)0x6FC19385,
+	(q31_t)0x3E3C2369, (q31_t)0x6FDA0CAD, (q31_t)0x3E10320D,
+	(q31_t)0x6FF27496, (q31_t)0x3DE4371F, (q31_t)0x700ACB3B,
+	(q31_t)0x3DB832A5, (q31_t)0x70231099, (q31_t)0x3D8C24A7,
+	(q31_t)0x703B44AC, (q31_t)0x3D600D2B, (q31_t)0x70536771,
+	(q31_t)0x3D33EC39, (q31_t)0x706B78E3, (q31_t)0x3D07C1D5,
+	(q31_t)0x708378FE, (q31_t)0x3CDB8E09, (q31_t)0x709B67C0,
+	(q31_t)0x3CAF50DA, (q31_t)0x70B34524, (q31_t)0x3C830A4F,
+	(q31_t)0x70CB1127, (q31_t)0x3C56BA70, (q31_t)0x70E2CBC6,
+	(q31_t)0x3C2A6142, (q31_t)0x70FA74FB, (q31_t)0x3BFDFECD,
+	(q31_t)0x71120CC5, (q31_t)0x3BD19317, (q31_t)0x7129931E,
+	(q31_t)0x3BA51E29, (q31_t)0x71410804, (q31_t)0x3B78A007,
+	(q31_t)0x71586B73, (q31_t)0x3B4C18BA, (q31_t)0x716FBD68,
+	(q31_t)0x3B1F8847, (q31_t)0x7186FDDE, (q31_t)0x3AF2EEB7,
+	(q31_t)0x719E2CD2, (q31_t)0x3AC64C0F, (q31_t)0x71B54A40,
+	(q31_t)0x3A99A057, (q31_t)0x71CC5626, (q31_t)0x3A6CEB95,
+	(q31_t)0x71E3507F, (q31_t)0x3A402DD1, (q31_t)0x71FA3948,
+	(q31_t)0x3A136712, (q31_t)0x7211107D, (q31_t)0x39E6975D,
+	(q31_t)0x7227D61C, (q31_t)0x39B9BEBB, (q31_t)0x723E8A1F,
+	(q31_t)0x398CDD32, (q31_t)0x72552C84, (q31_t)0x395FF2C9,
+	(q31_t)0x726BBD48, (q31_t)0x3932FF87, (q31_t)0x72823C66,
+	(q31_t)0x39060372, (q31_t)0x7298A9DC, (q31_t)0x38D8FE93,
+	(q31_t)0x72AF05A6, (q31_t)0x38ABF0EF, (q31_t)0x72C54FC0,
+	(q31_t)0x387EDA8E, (q31_t)0x72DB8828, (q31_t)0x3851BB76,
+	(q31_t)0x72F1AED8, (q31_t)0x382493B0, (q31_t)0x7307C3D0,
+	(q31_t)0x37F76340, (q31_t)0x731DC709, (q31_t)0x37CA2A30,
+	(q31_t)0x7333B883, (q31_t)0x379CE884, (q31_t)0x73499838,
+	(q31_t)0x376F9E46, (q31_t)0x735F6626, (q31_t)0x37424B7A,
+	(q31_t)0x73752249, (q31_t)0x3714F02A, (q31_t)0x738ACC9E,
+	(q31_t)0x36E78C5A, (q31_t)0x73A06522, (q31_t)0x36BA2013,
+	(q31_t)0x73B5EBD0, (q31_t)0x368CAB5C, (q31_t)0x73CB60A7,
+	(q31_t)0x365F2E3B, (q31_t)0x73E0C3A3, (q31_t)0x3631A8B7,
+	(q31_t)0x73F614C0, (q31_t)0x36041AD9, (q31_t)0x740B53FA,
+	(q31_t)0x35D684A5, (q31_t)0x74208150, (q31_t)0x35A8E624,
+	(q31_t)0x74359CBD, (q31_t)0x357B3F5D, (q31_t)0x744AA63E,
+	(q31_t)0x354D9056, (q31_t)0x745F9DD1, (q31_t)0x351FD917,
+	(q31_t)0x74748371, (q31_t)0x34F219A7, (q31_t)0x7489571B,
+	(q31_t)0x34C4520D, (q31_t)0x749E18CD, (q31_t)0x3496824F,
+	(q31_t)0x74B2C883, (q31_t)0x3468AA76, (q31_t)0x74C7663A,
+	(q31_t)0x343ACA87, (q31_t)0x74DBF1EF, (q31_t)0x340CE28A,
+	(q31_t)0x74F06B9E, (q31_t)0x33DEF287, (q31_t)0x7504D345,
+	(q31_t)0x33B0FA84, (q31_t)0x751928E0, (q31_t)0x3382FA88,
+	(q31_t)0x752D6C6C, (q31_t)0x3354F29A, (q31_t)0x75419DE6,
+	(q31_t)0x3326E2C2, (q31_t)0x7555BD4B, (q31_t)0x32F8CB07,
+	(q31_t)0x7569CA98, (q31_t)0x32CAAB6F, (q31_t)0x757DC5CA,
+	(q31_t)0x329C8402, (q31_t)0x7591AEDD, (q31_t)0x326E54C7,
+	(q31_t)0x75A585CF, (q31_t)0x32401DC5, (q31_t)0x75B94A9C,
+	(q31_t)0x3211DF03, (q31_t)0x75CCFD42, (q31_t)0x31E39889,
+	(q31_t)0x75E09DBD, (q31_t)0x31B54A5D, (q31_t)0x75F42C0A,
+	(q31_t)0x3186F487, (q31_t)0x7607A827, (q31_t)0x3158970D,
+	(q31_t)0x761B1211, (q31_t)0x312A31F8, (q31_t)0x762E69C3,
+	(q31_t)0x30FBC54D, (q31_t)0x7641AF3C, (q31_t)0x30CD5114,
+	(q31_t)0x7654E279, (q31_t)0x309ED555, (q31_t)0x76680376,
+	(q31_t)0x30705217, (q31_t)0x767B1230, (q31_t)0x3041C760,
+	(q31_t)0x768E0EA5, (q31_t)0x30133538, (q31_t)0x76A0F8D2,
+	(q31_t)0x2FE49BA6, (q31_t)0x76B3D0B3, (q31_t)0x2FB5FAB2,
+	(q31_t)0x76C69646, (q31_t)0x2F875262, (q31_t)0x76D94988,
+	(q31_t)0x2F58A2BD, (q31_t)0x76EBEA77, (q31_t)0x2F29EBCC,
+	(q31_t)0x76FE790E, (q31_t)0x2EFB2D94, (q31_t)0x7710F54B,
+	(q31_t)0x2ECC681E, (q31_t)0x77235F2D, (q31_t)0x2E9D9B70,
+	(q31_t)0x7735B6AE, (q31_t)0x2E6EC792, (q31_t)0x7747FBCE,
+	(q31_t)0x2E3FEC8B, (q31_t)0x775A2E88, (q31_t)0x2E110A62,
+	(q31_t)0x776C4EDB, (q31_t)0x2DE2211E, (q31_t)0x777E5CC3,
+	(q31_t)0x2DB330C7, (q31_t)0x7790583D, (q31_t)0x2D843963,
+	(q31_t)0x77A24148, (q31_t)0x2D553AFB, (q31_t)0x77B417DF,
+	(q31_t)0x2D263595, (q31_t)0x77C5DC01, (q31_t)0x2CF72939,
+	(q31_t)0x77D78DAA, (q31_t)0x2CC815ED, (q31_t)0x77E92CD8,
+	(q31_t)0x2C98FBBA, (q31_t)0x77FAB988, (q31_t)0x2C69DAA6,
+	(q31_t)0x780C33B8, (q31_t)0x2C3AB2B9, (q31_t)0x781D9B64,
+	(q31_t)0x2C0B83F9, (q31_t)0x782EF08B, (q31_t)0x2BDC4E6F,
+	(q31_t)0x78403328, (q31_t)0x2BAD1221, (q31_t)0x7851633B,
+	(q31_t)0x2B7DCF17, (q31_t)0x786280BF, (q31_t)0x2B4E8558,
+	(q31_t)0x78738BB3, (q31_t)0x2B1F34EB, (q31_t)0x78848413,
+	(q31_t)0x2AEFDDD8, (q31_t)0x789569DE, (q31_t)0x2AC08025,
+	(q31_t)0x78A63D10, (q31_t)0x2A911BDB, (q31_t)0x78B6FDA8,
+	(q31_t)0x2A61B101, (q31_t)0x78C7ABA1, (q31_t)0x2A323F9D,
+	(q31_t)0x78D846FB, (q31_t)0x2A02C7B8, (q31_t)0x78E8CFB1,
+	(q31_t)0x29D34958, (q31_t)0x78F945C3, (q31_t)0x29A3C484,
+	(q31_t)0x7909A92C, (q31_t)0x29743945, (q31_t)0x7919F9EB,
+	(q31_t)0x2944A7A2, (q31_t)0x792A37FE, (q31_t)0x29150FA1,
+	(q31_t)0x793A6360, (q31_t)0x28E5714A, (q31_t)0x794A7C11,
+	(q31_t)0x28B5CCA5, (q31_t)0x795A820E, (q31_t)0x288621B9,
+	(q31_t)0x796A7554, (q31_t)0x2856708C, (q31_t)0x797A55E0,
+	(q31_t)0x2826B928, (q31_t)0x798A23B1, (q31_t)0x27F6FB92,
+	(q31_t)0x7999DEC3, (q31_t)0x27C737D2, (q31_t)0x79A98715,
+	(q31_t)0x27976DF1, (q31_t)0x79B91CA4, (q31_t)0x27679DF4,
+	(q31_t)0x79C89F6D, (q31_t)0x2737C7E3, (q31_t)0x79D80F6F,
+	(q31_t)0x2707EBC6, (q31_t)0x79E76CA6, (q31_t)0x26D809A5,
+	(q31_t)0x79F6B711, (q31_t)0x26A82185, (q31_t)0x7A05EEAD,
+	(q31_t)0x26783370, (q31_t)0x7A151377, (q31_t)0x26483F6C,
+	(q31_t)0x7A24256E, (q31_t)0x26184581, (q31_t)0x7A33248F,
+	(q31_t)0x25E845B5, (q31_t)0x7A4210D8, (q31_t)0x25B84012,
+	(q31_t)0x7A50EA46, (q31_t)0x2588349D, (q31_t)0x7A5FB0D8,
+	(q31_t)0x2558235E, (q31_t)0x7A6E648A, (q31_t)0x25280C5D,
+	(q31_t)0x7A7D055B, (q31_t)0x24F7EFA1, (q31_t)0x7A8B9348,
+	(q31_t)0x24C7CD32, (q31_t)0x7A9A0E4F, (q31_t)0x2497A517,
+	(q31_t)0x7AA8766E, (q31_t)0x24677757, (q31_t)0x7AB6CBA3,
+	(q31_t)0x243743FA, (q31_t)0x7AC50DEB, (q31_t)0x24070B07,
+	(q31_t)0x7AD33D45, (q31_t)0x23D6CC86, (q31_t)0x7AE159AE,
+	(q31_t)0x23A6887E, (q31_t)0x7AEF6323, (q31_t)0x23763EF7,
+	(q31_t)0x7AFD59A3, (q31_t)0x2345EFF7, (q31_t)0x7B0B3D2C,
+	(q31_t)0x23159B87, (q31_t)0x7B190DBB, (q31_t)0x22E541AE,
+	(q31_t)0x7B26CB4F, (q31_t)0x22B4E274, (q31_t)0x7B3475E4,
+	(q31_t)0x22847DDF, (q31_t)0x7B420D7A, (q31_t)0x225413F8,
+	(q31_t)0x7B4F920E, (q31_t)0x2223A4C5, (q31_t)0x7B5D039D,
+	(q31_t)0x21F3304E, (q31_t)0x7B6A6227, (q31_t)0x21C2B69C,
+	(q31_t)0x7B77ADA8, (q31_t)0x219237B4, (q31_t)0x7B84E61E,
+	(q31_t)0x2161B39F, (q31_t)0x7B920B89, (q31_t)0x21312A65,
+	(q31_t)0x7B9F1DE5, (q31_t)0x21009C0B, (q31_t)0x7BAC1D31,
+	(q31_t)0x20D0089B, (q31_t)0x7BB9096A, (q31_t)0x209F701C,
+	(q31_t)0x7BC5E28F, (q31_t)0x206ED295, (q31_t)0x7BD2A89E,
+	(q31_t)0x203E300D, (q31_t)0x7BDF5B94, (q31_t)0x200D888C,
+	(q31_t)0x7BEBFB70, (q31_t)0x1FDCDC1A, (q31_t)0x7BF88830,
+	(q31_t)0x1FAC2ABF, (q31_t)0x7C0501D1, (q31_t)0x1F7B7480,
+	(q31_t)0x7C116853, (q31_t)0x1F4AB967, (q31_t)0x7C1DBBB2,
+	(q31_t)0x1F19F97B, (q31_t)0x7C29FBEE, (q31_t)0x1EE934C2,
+	(q31_t)0x7C362904, (q31_t)0x1EB86B46, (q31_t)0x7C4242F2,
+	(q31_t)0x1E879D0C, (q31_t)0x7C4E49B6, (q31_t)0x1E56CA1E,
+	(q31_t)0x7C5A3D4F, (q31_t)0x1E25F281, (q31_t)0x7C661DBB,
+	(q31_t)0x1DF5163F, (q31_t)0x7C71EAF8, (q31_t)0x1DC4355D,
+	(q31_t)0x7C7DA504, (q31_t)0x1D934FE5, (q31_t)0x7C894BDD,
+	(q31_t)0x1D6265DD, (q31_t)0x7C94DF82, (q31_t)0x1D31774D,
+	(q31_t)0x7CA05FF1, (q31_t)0x1D00843C, (q31_t)0x7CABCD27,
+	(q31_t)0x1CCF8CB3, (q31_t)0x7CB72724, (q31_t)0x1C9E90B8,
+	(q31_t)0x7CC26DE5, (q31_t)0x1C6D9053, (q31_t)0x7CCDA168,
+	(q31_t)0x1C3C8B8C, (q31_t)0x7CD8C1AD, (q31_t)0x1C0B826A,
+	(q31_t)0x7CE3CEB1, (q31_t)0x1BDA74F5, (q31_t)0x7CEEC873,
+	(q31_t)0x1BA96334, (q31_t)0x7CF9AEF0, (q31_t)0x1B784D30,
+	(q31_t)0x7D048228, (q31_t)0x1B4732EF, (q31_t)0x7D0F4218,
+	(q31_t)0x1B161479, (q31_t)0x7D19EEBE, (q31_t)0x1AE4F1D6,
+	(q31_t)0x7D24881A, (q31_t)0x1AB3CB0C, (q31_t)0x7D2F0E2A,
+	(q31_t)0x1A82A025, (q31_t)0x7D3980EC, (q31_t)0x1A517127,
+	(q31_t)0x7D43E05E, (q31_t)0x1A203E1B, (q31_t)0x7D4E2C7E,
+	(q31_t)0x19EF0706, (q31_t)0x7D58654C, (q31_t)0x19BDCBF2,
+	(q31_t)0x7D628AC5, (q31_t)0x198C8CE6, (q31_t)0x7D6C9CE9,
+	(q31_t)0x195B49E9, (q31_t)0x7D769BB5, (q31_t)0x192A0303,
+	(q31_t)0x7D808727, (q31_t)0x18F8B83C, (q31_t)0x7D8A5F3F,
+	(q31_t)0x18C7699B, (q31_t)0x7D9423FB, (q31_t)0x18961727,
+	(q31_t)0x7D9DD55A, (q31_t)0x1864C0E9, (q31_t)0x7DA77359,
+	(q31_t)0x183366E8, (q31_t)0x7DB0FDF7, (q31_t)0x1802092C,
+	(q31_t)0x7DBA7534, (q31_t)0x17D0A7BB, (q31_t)0x7DC3D90D,
+	(q31_t)0x179F429F, (q31_t)0x7DCD2981, (q31_t)0x176DD9DE,
+	(q31_t)0x7DD6668E, (q31_t)0x173C6D80, (q31_t)0x7DDF9034,
+	(q31_t)0x170AFD8D, (q31_t)0x7DE8A670, (q31_t)0x16D98A0C,
+	(q31_t)0x7DF1A942, (q31_t)0x16A81305, (q31_t)0x7DFA98A7,
+	(q31_t)0x1676987F, (q31_t)0x7E03749F, (q31_t)0x16451A83,
+	(q31_t)0x7E0C3D29, (q31_t)0x16139917, (q31_t)0x7E14F242,
+	(q31_t)0x15E21444, (q31_t)0x7E1D93E9, (q31_t)0x15B08C11,
+	(q31_t)0x7E26221E, (q31_t)0x157F0086, (q31_t)0x7E2E9CDF,
+	(q31_t)0x154D71AA, (q31_t)0x7E37042A, (q31_t)0x151BDF85,
+	(q31_t)0x7E3F57FE, (q31_t)0x14EA4A1F, (q31_t)0x7E47985B,
+	(q31_t)0x14B8B17F, (q31_t)0x7E4FC53E, (q31_t)0x148715AD,
+	(q31_t)0x7E57DEA6, (q31_t)0x145576B1, (q31_t)0x7E5FE493,
+	(q31_t)0x1423D492, (q31_t)0x7E67D702, (q31_t)0x13F22F57,
+	(q31_t)0x7E6FB5F3, (q31_t)0x13C0870A, (q31_t)0x7E778165,
+	(q31_t)0x138EDBB0, (q31_t)0x7E7F3956, (q31_t)0x135D2D53,
+	(q31_t)0x7E86DDC5, (q31_t)0x132B7BF9, (q31_t)0x7E8E6EB1,
+	(q31_t)0x12F9C7AA, (q31_t)0x7E95EC19, (q31_t)0x12C8106E,
+	(q31_t)0x7E9D55FC, (q31_t)0x1296564D, (q31_t)0x7EA4AC58,
+	(q31_t)0x1264994E, (q31_t)0x7EABEF2C, (q31_t)0x1232D978,
+	(q31_t)0x7EB31E77, (q31_t)0x120116D4, (q31_t)0x7EBA3A39,
+	(q31_t)0x11CF516A, (q31_t)0x7EC1426F, (q31_t)0x119D8940,
+	(q31_t)0x7EC8371A, (q31_t)0x116BBE5F, (q31_t)0x7ECF1837,
+	(q31_t)0x1139F0CE, (q31_t)0x7ED5E5C6, (q31_t)0x11082096,
+	(q31_t)0x7EDC9FC6, (q31_t)0x10D64DBC, (q31_t)0x7EE34635,
+	(q31_t)0x10A4784A, (q31_t)0x7EE9D913, (q31_t)0x1072A047,
+	(q31_t)0x7EF0585F, (q31_t)0x1040C5BB, (q31_t)0x7EF6C418,
+	(q31_t)0x100EE8AD, (q31_t)0x7EFD1C3C, (q31_t)0x0FDD0925,
+	(q31_t)0x7F0360CB, (q31_t)0x0FAB272B, (q31_t)0x7F0991C3,
+	(q31_t)0x0F7942C6, (q31_t)0x7F0FAF24, (q31_t)0x0F475BFE,
+	(q31_t)0x7F15B8EE, (q31_t)0x0F1572DC, (q31_t)0x7F1BAF1E,
+	(q31_t)0x0EE38765, (q31_t)0x7F2191B4, (q31_t)0x0EB199A3,
+	(q31_t)0x7F2760AF, (q31_t)0x0E7FA99D, (q31_t)0x7F2D1C0E,
+	(q31_t)0x0E4DB75B, (q31_t)0x7F32C3D0, (q31_t)0x0E1BC2E3,
+	(q31_t)0x7F3857F5, (q31_t)0x0DE9CC3F, (q31_t)0x7F3DD87C,
+	(q31_t)0x0DB7D376, (q31_t)0x7F434563, (q31_t)0x0D85D88F,
+	(q31_t)0x7F489EAA, (q31_t)0x0D53DB92, (q31_t)0x7F4DE450,
+	(q31_t)0x0D21DC87, (q31_t)0x7F531654, (q31_t)0x0CEFDB75,
+	(q31_t)0x7F5834B6, (q31_t)0x0CBDD865, (q31_t)0x7F5D3F75,
+	(q31_t)0x0C8BD35E, (q31_t)0x7F62368F, (q31_t)0x0C59CC67,
+	(q31_t)0x7F671A04, (q31_t)0x0C27C389, (q31_t)0x7F6BE9D4,
+	(q31_t)0x0BF5B8CB, (q31_t)0x7F70A5FD, (q31_t)0x0BC3AC35,
+	(q31_t)0x7F754E7F, (q31_t)0x0B919DCE, (q31_t)0x7F79E35A,
+	(q31_t)0x0B5F8D9F, (q31_t)0x7F7E648B, (q31_t)0x0B2D7BAE,
+	(q31_t)0x7F82D214, (q31_t)0x0AFB6805, (q31_t)0x7F872BF3,
+	(q31_t)0x0AC952AA, (q31_t)0x7F8B7226, (q31_t)0x0A973BA5,
+	(q31_t)0x7F8FA4AF, (q31_t)0x0A6522FE, (q31_t)0x7F93C38C,
+	(q31_t)0x0A3308BC, (q31_t)0x7F97CEBC, (q31_t)0x0A00ECE8,
+	(q31_t)0x7F9BC63F, (q31_t)0x09CECF89, (q31_t)0x7F9FAA15,
+	(q31_t)0x099CB0A7, (q31_t)0x7FA37A3C, (q31_t)0x096A9049,
+	(q31_t)0x7FA736B4, (q31_t)0x09386E77, (q31_t)0x7FAADF7C,
+	(q31_t)0x09064B3A, (q31_t)0x7FAE7494, (q31_t)0x08D42698,
+	(q31_t)0x7FB1F5FC, (q31_t)0x08A2009A, (q31_t)0x7FB563B2,
+	(q31_t)0x086FD947, (q31_t)0x7FB8BDB7, (q31_t)0x083DB0A7,
+	(q31_t)0x7FBC040A, (q31_t)0x080B86C1, (q31_t)0x7FBF36A9,
+	(q31_t)0x07D95B9E, (q31_t)0x7FC25596, (q31_t)0x07A72F45,
+	(q31_t)0x7FC560CF, (q31_t)0x077501BE, (q31_t)0x7FC85853,
+	(q31_t)0x0742D310, (q31_t)0x7FCB3C23, (q31_t)0x0710A344,
+	(q31_t)0x7FCE0C3E, (q31_t)0x06DE7261, (q31_t)0x7FD0C8A3,
+	(q31_t)0x06AC406F, (q31_t)0x7FD37152, (q31_t)0x067A0D75,
+	(q31_t)0x7FD6064B, (q31_t)0x0647D97C, (q31_t)0x7FD8878D,
+	(q31_t)0x0615A48A, (q31_t)0x7FDAF518, (q31_t)0x05E36EA9,
+	(q31_t)0x7FDD4EEC, (q31_t)0x05B137DF, (q31_t)0x7FDF9508,
+	(q31_t)0x057F0034, (q31_t)0x7FE1C76B, (q31_t)0x054CC7B0,
+	(q31_t)0x7FE3E616, (q31_t)0x051A8E5C, (q31_t)0x7FE5F108,
+	(q31_t)0x04E8543D, (q31_t)0x7FE7E840, (q31_t)0x04B6195D,
+	(q31_t)0x7FE9CBC0, (q31_t)0x0483DDC3, (q31_t)0x7FEB9B85,
+	(q31_t)0x0451A176, (q31_t)0x7FED5790, (q31_t)0x041F647F,
+	(q31_t)0x7FEEFFE1, (q31_t)0x03ED26E6, (q31_t)0x7FF09477,
+	(q31_t)0x03BAE8B1, (q31_t)0x7FF21553, (q31_t)0x0388A9E9,
+	(q31_t)0x7FF38273, (q31_t)0x03566A96, (q31_t)0x7FF4DBD8,
+	(q31_t)0x03242ABF, (q31_t)0x7FF62182, (q31_t)0x02F1EA6B,
+	(q31_t)0x7FF7536F, (q31_t)0x02BFA9A4, (q31_t)0x7FF871A1,
+	(q31_t)0x028D6870, (q31_t)0x7FF97C17, (q31_t)0x025B26D7,
+	(q31_t)0x7FFA72D1, (q31_t)0x0228E4E1, (q31_t)0x7FFB55CE,
+	(q31_t)0x01F6A296, (q31_t)0x7FFC250F, (q31_t)0x01C45FFE,
+	(q31_t)0x7FFCE093, (q31_t)0x01921D1F, (q31_t)0x7FFD885A,
+	(q31_t)0x015FDA03, (q31_t)0x7FFE1C64, (q31_t)0x012D96B0,
+	(q31_t)0x7FFE9CB2, (q31_t)0x00FB532F, (q31_t)0x7FFF0942,
+	(q31_t)0x00C90F88, (q31_t)0x7FFF6216, (q31_t)0x0096CBC1,
+	(q31_t)0x7FFFA72C, (q31_t)0x006487E3, (q31_t)0x7FFFD885,
+	(q31_t)0x003243F5, (q31_t)0x7FFFF621, (q31_t)0x00000000,
+	(q31_t)0x7FFFFFFF, (q31_t)0xFFCDBC0A, (q31_t)0x7FFFF621,
+	(q31_t)0xFF9B781D, (q31_t)0x7FFFD885, (q31_t)0xFF69343E,
+	(q31_t)0x7FFFA72C, (q31_t)0xFF36F078, (q31_t)0x7FFF6216,
+	(q31_t)0xFF04ACD0, (q31_t)0x7FFF0942, (q31_t)0xFED2694F,
+	(q31_t)0x7FFE9CB2, (q31_t)0xFEA025FC, (q31_t)0x7FFE1C64,
+	(q31_t)0xFE6DE2E0, (q31_t)0x7FFD885A, (q31_t)0xFE3BA001,
+	(q31_t)0x7FFCE093, (q31_t)0xFE095D69, (q31_t)0x7FFC250F,
+	(q31_t)0xFDD71B1E, (q31_t)0x7FFB55CE, (q31_t)0xFDA4D928,
+	(q31_t)0x7FFA72D1, (q31_t)0xFD72978F, (q31_t)0x7FF97C17,
+	(q31_t)0xFD40565B, (q31_t)0x7FF871A1, (q31_t)0xFD0E1594,
+	(q31_t)0x7FF7536F, (q31_t)0xFCDBD541, (q31_t)0x7FF62182,
+	(q31_t)0xFCA99569, (q31_t)0x7FF4DBD8, (q31_t)0xFC775616,
+	(q31_t)0x7FF38273, (q31_t)0xFC45174E, (q31_t)0x7FF21553,
+	(q31_t)0xFC12D919, (q31_t)0x7FF09477, (q31_t)0xFBE09B80,
+	(q31_t)0x7FEEFFE1, (q31_t)0xFBAE5E89, (q31_t)0x7FED5790,
+	(q31_t)0xFB7C223C, (q31_t)0x7FEB9B85, (q31_t)0xFB49E6A2,
+	(q31_t)0x7FE9CBC0, (q31_t)0xFB17ABC2, (q31_t)0x7FE7E840,
+	(q31_t)0xFAE571A4, (q31_t)0x7FE5F108, (q31_t)0xFAB3384F,
+	(q31_t)0x7FE3E616, (q31_t)0xFA80FFCB, (q31_t)0x7FE1C76B,
+	(q31_t)0xFA4EC820, (q31_t)0x7FDF9508, (q31_t)0xFA1C9156,
+	(q31_t)0x7FDD4EEC, (q31_t)0xF9EA5B75, (q31_t)0x7FDAF518,
+	(q31_t)0xF9B82683, (q31_t)0x7FD8878D, (q31_t)0xF985F28A,
+	(q31_t)0x7FD6064B, (q31_t)0xF953BF90, (q31_t)0x7FD37152,
+	(q31_t)0xF9218D9E, (q31_t)0x7FD0C8A3, (q31_t)0xF8EF5CBB,
+	(q31_t)0x7FCE0C3E, (q31_t)0xF8BD2CEF, (q31_t)0x7FCB3C23,
+	(q31_t)0xF88AFE41, (q31_t)0x7FC85853, (q31_t)0xF858D0BA,
+	(q31_t)0x7FC560CF, (q31_t)0xF826A461, (q31_t)0x7FC25596,
+	(q31_t)0xF7F4793E, (q31_t)0x7FBF36A9, (q31_t)0xF7C24F58,
+	(q31_t)0x7FBC040A, (q31_t)0xF79026B8, (q31_t)0x7FB8BDB7,
+	(q31_t)0xF75DFF65, (q31_t)0x7FB563B2, (q31_t)0xF72BD967,
+	(q31_t)0x7FB1F5FC, (q31_t)0xF6F9B4C5, (q31_t)0x7FAE7494,
+	(q31_t)0xF6C79188, (q31_t)0x7FAADF7C, (q31_t)0xF6956FB6,
+	(q31_t)0x7FA736B4, (q31_t)0xF6634F58, (q31_t)0x7FA37A3C,
+	(q31_t)0xF6313076, (q31_t)0x7F9FAA15, (q31_t)0xF5FF1317,
+	(q31_t)0x7F9BC63F, (q31_t)0xF5CCF743, (q31_t)0x7F97CEBC,
+	(q31_t)0xF59ADD01, (q31_t)0x7F93C38C, (q31_t)0xF568C45A,
+	(q31_t)0x7F8FA4AF, (q31_t)0xF536AD55, (q31_t)0x7F8B7226,
+	(q31_t)0xF50497FA, (q31_t)0x7F872BF3, (q31_t)0xF4D28451,
+	(q31_t)0x7F82D214, (q31_t)0xF4A07260, (q31_t)0x7F7E648B,
+	(q31_t)0xF46E6231, (q31_t)0x7F79E35A, (q31_t)0xF43C53CA,
+	(q31_t)0x7F754E7F, (q31_t)0xF40A4734, (q31_t)0x7F70A5FD,
+	(q31_t)0xF3D83C76, (q31_t)0x7F6BE9D4, (q31_t)0xF3A63398,
+	(q31_t)0x7F671A04, (q31_t)0xF3742CA1, (q31_t)0x7F62368F,
+	(q31_t)0xF342279A, (q31_t)0x7F5D3F75, (q31_t)0xF310248A,
+	(q31_t)0x7F5834B6, (q31_t)0xF2DE2378, (q31_t)0x7F531654,
+	(q31_t)0xF2AC246D, (q31_t)0x7F4DE450, (q31_t)0xF27A2770,
+	(q31_t)0x7F489EAA, (q31_t)0xF2482C89, (q31_t)0x7F434563,
+	(q31_t)0xF21633C0, (q31_t)0x7F3DD87C, (q31_t)0xF1E43D1C,
+	(q31_t)0x7F3857F5, (q31_t)0xF1B248A5, (q31_t)0x7F32C3D0,
+	(q31_t)0xF1805662, (q31_t)0x7F2D1C0E, (q31_t)0xF14E665C,
+	(q31_t)0x7F2760AF, (q31_t)0xF11C789A, (q31_t)0x7F2191B4,
+	(q31_t)0xF0EA8D23, (q31_t)0x7F1BAF1E, (q31_t)0xF0B8A401,
+	(q31_t)0x7F15B8EE, (q31_t)0xF086BD39, (q31_t)0x7F0FAF24,
+	(q31_t)0xF054D8D4, (q31_t)0x7F0991C3, (q31_t)0xF022F6DA,
+	(q31_t)0x7F0360CB, (q31_t)0xEFF11752, (q31_t)0x7EFD1C3C,
+	(q31_t)0xEFBF3A44, (q31_t)0x7EF6C418, (q31_t)0xEF8D5FB8,
+	(q31_t)0x7EF0585F, (q31_t)0xEF5B87B5, (q31_t)0x7EE9D913,
+	(q31_t)0xEF29B243, (q31_t)0x7EE34635, (q31_t)0xEEF7DF6A,
+	(q31_t)0x7EDC9FC6, (q31_t)0xEEC60F31, (q31_t)0x7ED5E5C6,
+	(q31_t)0xEE9441A0, (q31_t)0x7ECF1837, (q31_t)0xEE6276BF,
+	(q31_t)0x7EC8371A, (q31_t)0xEE30AE95, (q31_t)0x7EC1426F,
+	(q31_t)0xEDFEE92B, (q31_t)0x7EBA3A39, (q31_t)0xEDCD2687,
+	(q31_t)0x7EB31E77, (q31_t)0xED9B66B2, (q31_t)0x7EABEF2C,
+	(q31_t)0xED69A9B2, (q31_t)0x7EA4AC58, (q31_t)0xED37EF91,
+	(q31_t)0x7E9D55FC, (q31_t)0xED063855, (q31_t)0x7E95EC19,
+	(q31_t)0xECD48406, (q31_t)0x7E8E6EB1, (q31_t)0xECA2D2AC,
+	(q31_t)0x7E86DDC5, (q31_t)0xEC71244F, (q31_t)0x7E7F3956,
+	(q31_t)0xEC3F78F5, (q31_t)0x7E778165, (q31_t)0xEC0DD0A8,
+	(q31_t)0x7E6FB5F3, (q31_t)0xEBDC2B6D, (q31_t)0x7E67D702,
+	(q31_t)0xEBAA894E, (q31_t)0x7E5FE493, (q31_t)0xEB78EA52,
+	(q31_t)0x7E57DEA6, (q31_t)0xEB474E80, (q31_t)0x7E4FC53E,
+	(q31_t)0xEB15B5E0, (q31_t)0x7E47985B, (q31_t)0xEAE4207A,
+	(q31_t)0x7E3F57FE, (q31_t)0xEAB28E55, (q31_t)0x7E37042A,
+	(q31_t)0xEA80FF79, (q31_t)0x7E2E9CDF, (q31_t)0xEA4F73EE,
+	(q31_t)0x7E26221E, (q31_t)0xEA1DEBBB, (q31_t)0x7E1D93E9,
+	(q31_t)0xE9EC66E8, (q31_t)0x7E14F242, (q31_t)0xE9BAE57C,
+	(q31_t)0x7E0C3D29, (q31_t)0xE9896780, (q31_t)0x7E03749F,
+	(q31_t)0xE957ECFB, (q31_t)0x7DFA98A7, (q31_t)0xE92675F4,
+	(q31_t)0x7DF1A942, (q31_t)0xE8F50273, (q31_t)0x7DE8A670,
+	(q31_t)0xE8C3927F, (q31_t)0x7DDF9034, (q31_t)0xE8922621,
+	(q31_t)0x7DD6668E, (q31_t)0xE860BD60, (q31_t)0x7DCD2981,
+	(q31_t)0xE82F5844, (q31_t)0x7DC3D90D, (q31_t)0xE7FDF6D3,
+	(q31_t)0x7DBA7534, (q31_t)0xE7CC9917, (q31_t)0x7DB0FDF7,
+	(q31_t)0xE79B3F16, (q31_t)0x7DA77359, (q31_t)0xE769E8D8,
+	(q31_t)0x7D9DD55A, (q31_t)0xE7389664, (q31_t)0x7D9423FB,
+	(q31_t)0xE70747C3, (q31_t)0x7D8A5F3F, (q31_t)0xE6D5FCFC,
+	(q31_t)0x7D808727, (q31_t)0xE6A4B616, (q31_t)0x7D769BB5,
+	(q31_t)0xE6737319, (q31_t)0x7D6C9CE9, (q31_t)0xE642340D,
+	(q31_t)0x7D628AC5, (q31_t)0xE610F8F9, (q31_t)0x7D58654C,
+	(q31_t)0xE5DFC1E4, (q31_t)0x7D4E2C7E, (q31_t)0xE5AE8ED8,
+	(q31_t)0x7D43E05E, (q31_t)0xE57D5FDA, (q31_t)0x7D3980EC,
+	(q31_t)0xE54C34F3, (q31_t)0x7D2F0E2A, (q31_t)0xE51B0E2A,
+	(q31_t)0x7D24881A, (q31_t)0xE4E9EB86, (q31_t)0x7D19EEBE,
+	(q31_t)0xE4B8CD10, (q31_t)0x7D0F4218, (q31_t)0xE487B2CF,
+	(q31_t)0x7D048228, (q31_t)0xE4569CCB, (q31_t)0x7CF9AEF0,
+	(q31_t)0xE4258B0A, (q31_t)0x7CEEC873, (q31_t)0xE3F47D95,
+	(q31_t)0x7CE3CEB1, (q31_t)0xE3C37473, (q31_t)0x7CD8C1AD,
+	(q31_t)0xE3926FAC, (q31_t)0x7CCDA168, (q31_t)0xE3616F47,
+	(q31_t)0x7CC26DE5, (q31_t)0xE330734C, (q31_t)0x7CB72724,
+	(q31_t)0xE2FF7BC3, (q31_t)0x7CABCD27, (q31_t)0xE2CE88B2,
+	(q31_t)0x7CA05FF1, (q31_t)0xE29D9A22, (q31_t)0x7C94DF82,
+	(q31_t)0xE26CB01A, (q31_t)0x7C894BDD, (q31_t)0xE23BCAA2,
+	(q31_t)0x7C7DA504, (q31_t)0xE20AE9C1, (q31_t)0x7C71EAF8,
+	(q31_t)0xE1DA0D7E, (q31_t)0x7C661DBB, (q31_t)0xE1A935E1,
+	(q31_t)0x7C5A3D4F, (q31_t)0xE17862F3, (q31_t)0x7C4E49B6,
+	(q31_t)0xE14794B9, (q31_t)0x7C4242F2, (q31_t)0xE116CB3D,
+	(q31_t)0x7C362904, (q31_t)0xE0E60684, (q31_t)0x7C29FBEE,
+	(q31_t)0xE0B54698, (q31_t)0x7C1DBBB2, (q31_t)0xE0848B7F,
+	(q31_t)0x7C116853, (q31_t)0xE053D541, (q31_t)0x7C0501D1,
+	(q31_t)0xE02323E5, (q31_t)0x7BF88830, (q31_t)0xDFF27773,
+	(q31_t)0x7BEBFB70, (q31_t)0xDFC1CFF2, (q31_t)0x7BDF5B94,
+	(q31_t)0xDF912D6A, (q31_t)0x7BD2A89E, (q31_t)0xDF608FE3,
+	(q31_t)0x7BC5E28F, (q31_t)0xDF2FF764, (q31_t)0x7BB9096A,
+	(q31_t)0xDEFF63F4, (q31_t)0x7BAC1D31, (q31_t)0xDECED59B,
+	(q31_t)0x7B9F1DE5, (q31_t)0xDE9E4C60, (q31_t)0x7B920B89,
+	(q31_t)0xDE6DC84B, (q31_t)0x7B84E61E, (q31_t)0xDE3D4963,
+	(q31_t)0x7B77ADA8, (q31_t)0xDE0CCFB1, (q31_t)0x7B6A6227,
+	(q31_t)0xDDDC5B3A, (q31_t)0x7B5D039D, (q31_t)0xDDABEC07,
+	(q31_t)0x7B4F920E, (q31_t)0xDD7B8220, (q31_t)0x7B420D7A,
+	(q31_t)0xDD4B1D8B, (q31_t)0x7B3475E4, (q31_t)0xDD1ABE51,
+	(q31_t)0x7B26CB4F, (q31_t)0xDCEA6478, (q31_t)0x7B190DBB,
+	(q31_t)0xDCBA1008, (q31_t)0x7B0B3D2C, (q31_t)0xDC89C108,
+	(q31_t)0x7AFD59A3, (q31_t)0xDC597781, (q31_t)0x7AEF6323,
+	(q31_t)0xDC293379, (q31_t)0x7AE159AE, (q31_t)0xDBF8F4F8,
+	(q31_t)0x7AD33D45, (q31_t)0xDBC8BC05, (q31_t)0x7AC50DEB,
+	(q31_t)0xDB9888A8, (q31_t)0x7AB6CBA3, (q31_t)0xDB685AE8,
+	(q31_t)0x7AA8766E, (q31_t)0xDB3832CD, (q31_t)0x7A9A0E4F,
+	(q31_t)0xDB08105E, (q31_t)0x7A8B9348, (q31_t)0xDAD7F3A2,
+	(q31_t)0x7A7D055B, (q31_t)0xDAA7DCA1, (q31_t)0x7A6E648A,
+	(q31_t)0xDA77CB62, (q31_t)0x7A5FB0D8, (q31_t)0xDA47BFED,
+	(q31_t)0x7A50EA46, (q31_t)0xDA17BA4A, (q31_t)0x7A4210D8,
+	(q31_t)0xD9E7BA7E, (q31_t)0x7A33248F, (q31_t)0xD9B7C093,
+	(q31_t)0x7A24256E, (q31_t)0xD987CC8F, (q31_t)0x7A151377,
+	(q31_t)0xD957DE7A, (q31_t)0x7A05EEAD, (q31_t)0xD927F65B,
+	(q31_t)0x79F6B711, (q31_t)0xD8F81439, (q31_t)0x79E76CA6,
+	(q31_t)0xD8C8381C, (q31_t)0x79D80F6F, (q31_t)0xD898620C,
+	(q31_t)0x79C89F6D, (q31_t)0xD868920F, (q31_t)0x79B91CA4,
+	(q31_t)0xD838C82D, (q31_t)0x79A98715, (q31_t)0xD809046D,
+	(q31_t)0x7999DEC3, (q31_t)0xD7D946D7, (q31_t)0x798A23B1,
+	(q31_t)0xD7A98F73, (q31_t)0x797A55E0, (q31_t)0xD779DE46,
+	(q31_t)0x796A7554, (q31_t)0xD74A335A, (q31_t)0x795A820E,
+	(q31_t)0xD71A8EB5, (q31_t)0x794A7C11, (q31_t)0xD6EAF05E,
+	(q31_t)0x793A6360, (q31_t)0xD6BB585D, (q31_t)0x792A37FE,
+	(q31_t)0xD68BC6BA, (q31_t)0x7919F9EB, (q31_t)0xD65C3B7B,
+	(q31_t)0x7909A92C, (q31_t)0xD62CB6A7, (q31_t)0x78F945C3,
+	(q31_t)0xD5FD3847, (q31_t)0x78E8CFB1, (q31_t)0xD5CDC062,
+	(q31_t)0x78D846FB, (q31_t)0xD59E4EFE, (q31_t)0x78C7ABA1,
+	(q31_t)0xD56EE424, (q31_t)0x78B6FDA8, (q31_t)0xD53F7FDA,
+	(q31_t)0x78A63D10, (q31_t)0xD5102227, (q31_t)0x789569DE,
+	(q31_t)0xD4E0CB14, (q31_t)0x78848413, (q31_t)0xD4B17AA7,
+	(q31_t)0x78738BB3, (q31_t)0xD48230E8, (q31_t)0x786280BF,
+	(q31_t)0xD452EDDE, (q31_t)0x7851633B, (q31_t)0xD423B190,
+	(q31_t)0x78403328, (q31_t)0xD3F47C06, (q31_t)0x782EF08B,
+	(q31_t)0xD3C54D46, (q31_t)0x781D9B64, (q31_t)0xD3962559,
+	(q31_t)0x780C33B8, (q31_t)0xD3670445, (q31_t)0x77FAB988,
+	(q31_t)0xD337EA12, (q31_t)0x77E92CD8, (q31_t)0xD308D6C6,
+	(q31_t)0x77D78DAA, (q31_t)0xD2D9CA6A, (q31_t)0x77C5DC01,
+	(q31_t)0xD2AAC504, (q31_t)0x77B417DF, (q31_t)0xD27BC69C,
+	(q31_t)0x77A24148, (q31_t)0xD24CCF38, (q31_t)0x7790583D,
+	(q31_t)0xD21DDEE1, (q31_t)0x777E5CC3, (q31_t)0xD1EEF59E,
+	(q31_t)0x776C4EDB, (q31_t)0xD1C01374, (q31_t)0x775A2E88,
+	(q31_t)0xD191386D, (q31_t)0x7747FBCE, (q31_t)0xD162648F,
+	(q31_t)0x7735B6AE, (q31_t)0xD13397E1, (q31_t)0x77235F2D,
+	(q31_t)0xD104D26B, (q31_t)0x7710F54B, (q31_t)0xD0D61433,
+	(q31_t)0x76FE790E, (q31_t)0xD0A75D42, (q31_t)0x76EBEA77,
+	(q31_t)0xD078AD9D, (q31_t)0x76D94988, (q31_t)0xD04A054D,
+	(q31_t)0x76C69646, (q31_t)0xD01B6459, (q31_t)0x76B3D0B3,
+	(q31_t)0xCFECCAC7, (q31_t)0x76A0F8D2, (q31_t)0xCFBE389F,
+	(q31_t)0x768E0EA5, (q31_t)0xCF8FADE8, (q31_t)0x767B1230,
+	(q31_t)0xCF612AAA, (q31_t)0x76680376, (q31_t)0xCF32AEEB,
+	(q31_t)0x7654E279, (q31_t)0xCF043AB2, (q31_t)0x7641AF3C,
+	(q31_t)0xCED5CE08, (q31_t)0x762E69C3, (q31_t)0xCEA768F2,
+	(q31_t)0x761B1211, (q31_t)0xCE790B78, (q31_t)0x7607A827,
+	(q31_t)0xCE4AB5A2, (q31_t)0x75F42C0A, (q31_t)0xCE1C6776,
+	(q31_t)0x75E09DBD, (q31_t)0xCDEE20FC, (q31_t)0x75CCFD42,
+	(q31_t)0xCDBFE23A, (q31_t)0x75B94A9C, (q31_t)0xCD91AB38,
+	(q31_t)0x75A585CF, (q31_t)0xCD637BFD, (q31_t)0x7591AEDD,
+	(q31_t)0xCD355490, (q31_t)0x757DC5CA, (q31_t)0xCD0734F8,
+	(q31_t)0x7569CA98, (q31_t)0xCCD91D3D, (q31_t)0x7555BD4B,
+	(q31_t)0xCCAB0D65, (q31_t)0x75419DE6, (q31_t)0xCC7D0577,
+	(q31_t)0x752D6C6C, (q31_t)0xCC4F057B, (q31_t)0x751928E0,
+	(q31_t)0xCC210D78, (q31_t)0x7504D345, (q31_t)0xCBF31D75,
+	(q31_t)0x74F06B9E, (q31_t)0xCBC53578, (q31_t)0x74DBF1EF,
+	(q31_t)0xCB975589, (q31_t)0x74C7663A, (q31_t)0xCB697DB0,
+	(q31_t)0x74B2C883, (q31_t)0xCB3BADF2, (q31_t)0x749E18CD,
+	(q31_t)0xCB0DE658, (q31_t)0x7489571B, (q31_t)0xCAE026E8,
+	(q31_t)0x74748371, (q31_t)0xCAB26FA9, (q31_t)0x745F9DD1,
+	(q31_t)0xCA84C0A2, (q31_t)0x744AA63E, (q31_t)0xCA5719DB,
+	(q31_t)0x74359CBD, (q31_t)0xCA297B5A, (q31_t)0x74208150,
+	(q31_t)0xC9FBE527, (q31_t)0x740B53FA, (q31_t)0xC9CE5748,
+	(q31_t)0x73F614C0, (q31_t)0xC9A0D1C4, (q31_t)0x73E0C3A3,
+	(q31_t)0xC97354A3, (q31_t)0x73CB60A7, (q31_t)0xC945DFEC,
+	(q31_t)0x73B5EBD0, (q31_t)0xC91873A5, (q31_t)0x73A06522,
+	(q31_t)0xC8EB0FD6, (q31_t)0x738ACC9E, (q31_t)0xC8BDB485,
+	(q31_t)0x73752249, (q31_t)0xC89061BA, (q31_t)0x735F6626,
+	(q31_t)0xC863177B, (q31_t)0x73499838, (q31_t)0xC835D5D0,
+	(q31_t)0x7333B883, (q31_t)0xC8089CBF, (q31_t)0x731DC709,
+	(q31_t)0xC7DB6C50, (q31_t)0x7307C3D0, (q31_t)0xC7AE4489,
+	(q31_t)0x72F1AED8, (q31_t)0xC7812571, (q31_t)0x72DB8828,
+	(q31_t)0xC7540F10, (q31_t)0x72C54FC0, (q31_t)0xC727016C,
+	(q31_t)0x72AF05A6, (q31_t)0xC6F9FC8D, (q31_t)0x7298A9DC,
+	(q31_t)0xC6CD0079, (q31_t)0x72823C66, (q31_t)0xC6A00D36,
+	(q31_t)0x726BBD48, (q31_t)0xC67322CD, (q31_t)0x72552C84,
+	(q31_t)0xC6464144, (q31_t)0x723E8A1F, (q31_t)0xC61968A2,
+	(q31_t)0x7227D61C, (q31_t)0xC5EC98ED, (q31_t)0x7211107D,
+	(q31_t)0xC5BFD22E, (q31_t)0x71FA3948, (q31_t)0xC593146A,
+	(q31_t)0x71E3507F, (q31_t)0xC5665FA8, (q31_t)0x71CC5626,
+	(q31_t)0xC539B3F0, (q31_t)0x71B54A40, (q31_t)0xC50D1148,
+	(q31_t)0x719E2CD2, (q31_t)0xC4E077B8, (q31_t)0x7186FDDE,
+	(q31_t)0xC4B3E746, (q31_t)0x716FBD68, (q31_t)0xC4875FF8,
+	(q31_t)0x71586B73, (q31_t)0xC45AE1D7, (q31_t)0x71410804,
+	(q31_t)0xC42E6CE8, (q31_t)0x7129931E, (q31_t)0xC4020132,
+	(q31_t)0x71120CC5, (q31_t)0xC3D59EBD, (q31_t)0x70FA74FB,
+	(q31_t)0xC3A9458F, (q31_t)0x70E2CBC6, (q31_t)0xC37CF5B0,
+	(q31_t)0x70CB1127, (q31_t)0xC350AF25, (q31_t)0x70B34524,
+	(q31_t)0xC32471F6, (q31_t)0x709B67C0, (q31_t)0xC2F83E2A,
+	(q31_t)0x708378FE, (q31_t)0xC2CC13C7, (q31_t)0x706B78E3,
+	(q31_t)0xC29FF2D4, (q31_t)0x70536771, (q31_t)0xC273DB58,
+	(q31_t)0x703B44AC, (q31_t)0xC247CD5A, (q31_t)0x70231099,
+	(q31_t)0xC21BC8E0, (q31_t)0x700ACB3B, (q31_t)0xC1EFCDF2,
+	(q31_t)0x6FF27496, (q31_t)0xC1C3DC96, (q31_t)0x6FDA0CAD,
+	(q31_t)0xC197F4D3, (q31_t)0x6FC19385, (q31_t)0xC16C16B0,
+	(q31_t)0x6FA90920, (q31_t)0xC1404233, (q31_t)0x6F906D84,
+	(q31_t)0xC1147763, (q31_t)0x6F77C0B3, (q31_t)0xC0E8B648,
+	(q31_t)0x6F5F02B1, (q31_t)0xC0BCFEE7, (q31_t)0x6F463383,
+	(q31_t)0xC0915147, (q31_t)0x6F2D532C, (q31_t)0xC065AD70,
+	(q31_t)0x6F1461AF, (q31_t)0xC03A1368, (q31_t)0x6EFB5F12,
+	(q31_t)0xC00E8335, (q31_t)0x6EE24B57, (q31_t)0xBFE2FCDF,
+	(q31_t)0x6EC92682, (q31_t)0xBFB7806C, (q31_t)0x6EAFF098,
+	(q31_t)0xBF8C0DE2, (q31_t)0x6E96A99C, (q31_t)0xBF60A54A,
+	(q31_t)0x6E7D5193, (q31_t)0xBF3546A8, (q31_t)0x6E63E87F,
+	(q31_t)0xBF09F204, (q31_t)0x6E4A6E65, (q31_t)0xBEDEA765,
+	(q31_t)0x6E30E349, (q31_t)0xBEB366D1, (q31_t)0x6E17472F,
+	(q31_t)0xBE88304F, (q31_t)0x6DFD9A1B, (q31_t)0xBE5D03E5,
+	(q31_t)0x6DE3DC11, (q31_t)0xBE31E19B, (q31_t)0x6DCA0D14,
+	(q31_t)0xBE06C977, (q31_t)0x6DB02D29, (q31_t)0xBDDBBB7F,
+	(q31_t)0x6D963C54, (q31_t)0xBDB0B7BA, (q31_t)0x6D7C3A98,
+	(q31_t)0xBD85BE2F, (q31_t)0x6D6227FA, (q31_t)0xBD5ACEE5,
+	(q31_t)0x6D48047E, (q31_t)0xBD2FE9E1, (q31_t)0x6D2DD027,
+	(q31_t)0xBD050F2C, (q31_t)0x6D138AFA, (q31_t)0xBCDA3ECA,
+	(q31_t)0x6CF934FB, (q31_t)0xBCAF78C3, (q31_t)0x6CDECE2E,
+	(q31_t)0xBC84BD1E, (q31_t)0x6CC45697, (q31_t)0xBC5A0BE1,
+	(q31_t)0x6CA9CE3A, (q31_t)0xBC2F6513, (q31_t)0x6C8F351C,
+	(q31_t)0xBC04C8BA, (q31_t)0x6C748B3F, (q31_t)0xBBDA36DC,
+	(q31_t)0x6C59D0A9, (q31_t)0xBBAFAF81, (q31_t)0x6C3F055D,
+	(q31_t)0xBB8532AF, (q31_t)0x6C242960, (q31_t)0xBB5AC06C,
+	(q31_t)0x6C093CB6, (q31_t)0xBB3058C0, (q31_t)0x6BEE3F62,
+	(q31_t)0xBB05FBB0, (q31_t)0x6BD3316A, (q31_t)0xBADBA943,
+	(q31_t)0x6BB812D0, (q31_t)0xBAB1617F, (q31_t)0x6B9CE39B,
+	(q31_t)0xBA87246C, (q31_t)0x6B81A3CD, (q31_t)0xBA5CF210,
+	(q31_t)0x6B66536A, (q31_t)0xBA32CA70, (q31_t)0x6B4AF278,
+	(q31_t)0xBA08AD94, (q31_t)0x6B2F80FA, (q31_t)0xB9DE9B83,
+	(q31_t)0x6B13FEF5, (q31_t)0xB9B49442, (q31_t)0x6AF86C6C,
+	(q31_t)0xB98A97D8, (q31_t)0x6ADCC964, (q31_t)0xB960A64B,
+	(q31_t)0x6AC115E1, (q31_t)0xB936BFA3, (q31_t)0x6AA551E8,
+	(q31_t)0xB90CE3E6, (q31_t)0x6A897D7D, (q31_t)0xB8E31319,
+	(q31_t)0x6A6D98A4, (q31_t)0xB8B94D44, (q31_t)0x6A51A361,
+	(q31_t)0xB88F926C, (q31_t)0x6A359DB9, (q31_t)0xB865E299,
+	(q31_t)0x6A1987B0, (q31_t)0xB83C3DD1, (q31_t)0x69FD614A,
+	(q31_t)0xB812A419, (q31_t)0x69E12A8C, (q31_t)0xB7E9157A,
+	(q31_t)0x69C4E37A, (q31_t)0xB7BF91F8, (q31_t)0x69A88C18,
+	(q31_t)0xB796199B, (q31_t)0x698C246C, (q31_t)0xB76CAC68,
+	(q31_t)0x696FAC78, (q31_t)0xB7434A67, (q31_t)0x69532442,
+	(q31_t)0xB719F39D, (q31_t)0x69368BCE, (q31_t)0xB6F0A811,
+	(q31_t)0x6919E320, (q31_t)0xB6C767CA, (q31_t)0x68FD2A3D,
+	(q31_t)0xB69E32CD, (q31_t)0x68E06129, (q31_t)0xB6750921,
+	(q31_t)0x68C387E9, (q31_t)0xB64BEACC, (q31_t)0x68A69E81,
+	(q31_t)0xB622D7D5, (q31_t)0x6889A4F5, (q31_t)0xB5F9D042,
+	(q31_t)0x686C9B4B, (q31_t)0xB5D0D41A, (q31_t)0x684F8186,
+	(q31_t)0xB5A7E362, (q31_t)0x683257AA, (q31_t)0xB57EFE21,
+	(q31_t)0x68151DBE, (q31_t)0xB556245E, (q31_t)0x67F7D3C4,
+	(q31_t)0xB52D561E, (q31_t)0x67DA79C2, (q31_t)0xB5049368,
+	(q31_t)0x67BD0FBC, (q31_t)0xB4DBDC42, (q31_t)0x679F95B7,
+	(q31_t)0xB4B330B2, (q31_t)0x67820BB6, (q31_t)0xB48A90C0,
+	(q31_t)0x676471C0, (q31_t)0xB461FC70, (q31_t)0x6746C7D7,
+	(q31_t)0xB43973C9, (q31_t)0x67290E02, (q31_t)0xB410F6D2,
+	(q31_t)0x670B4443, (q31_t)0xB3E88591, (q31_t)0x66ED6AA1,
+	(q31_t)0xB3C0200C, (q31_t)0x66CF811F, (q31_t)0xB397C649,
+	(q31_t)0x66B187C3, (q31_t)0xB36F784E, (q31_t)0x66937E90,
+	(q31_t)0xB3473622, (q31_t)0x6675658C, (q31_t)0xB31EFFCB,
+	(q31_t)0x66573CBB, (q31_t)0xB2F6D54F, (q31_t)0x66390422,
+	(q31_t)0xB2CEB6B5, (q31_t)0x661ABBC5, (q31_t)0xB2A6A401,
+	(q31_t)0x65FC63A9, (q31_t)0xB27E9D3B, (q31_t)0x65DDFBD3,
+	(q31_t)0xB256A26A, (q31_t)0x65BF8447, (q31_t)0xB22EB392,
+	(q31_t)0x65A0FD0B, (q31_t)0xB206D0BA, (q31_t)0x65826622,
+	(q31_t)0xB1DEF9E8, (q31_t)0x6563BF92, (q31_t)0xB1B72F23,
+	(q31_t)0x6545095F, (q31_t)0xB18F7070, (q31_t)0x6526438E,
+	(q31_t)0xB167BDD6, (q31_t)0x65076E24, (q31_t)0xB140175B,
+	(q31_t)0x64E88926, (q31_t)0xB1187D05, (q31_t)0x64C99498,
+	(q31_t)0xB0F0EEDA, (q31_t)0x64AA907F, (q31_t)0xB0C96CDF,
+	(q31_t)0x648B7CDF, (q31_t)0xB0A1F71C, (q31_t)0x646C59BF,
+	(q31_t)0xB07A8D97, (q31_t)0x644D2722, (q31_t)0xB0533055,
+	(q31_t)0x642DE50D, (q31_t)0xB02BDF5C, (q31_t)0x640E9385,
+	(q31_t)0xB0049AB2, (q31_t)0x63EF328F, (q31_t)0xAFDD625F,
+	(q31_t)0x63CFC230, (q31_t)0xAFB63667, (q31_t)0x63B0426D,
+	(q31_t)0xAF8F16D0, (q31_t)0x6390B34A, (q31_t)0xAF6803A1,
+	(q31_t)0x637114CC, (q31_t)0xAF40FCE0, (q31_t)0x635166F8,
+	(q31_t)0xAF1A0293, (q31_t)0x6331A9D4, (q31_t)0xAEF314BF,
+	(q31_t)0x6311DD63, (q31_t)0xAECC336B, (q31_t)0x62F201AC,
+	(q31_t)0xAEA55E9D, (q31_t)0x62D216B2, (q31_t)0xAE7E965B,
+	(q31_t)0x62B21C7B, (q31_t)0xAE57DAAA, (q31_t)0x6292130C,
+	(q31_t)0xAE312B91, (q31_t)0x6271FA69, (q31_t)0xAE0A8916,
+	(q31_t)0x6251D297, (q31_t)0xADE3F33E, (q31_t)0x62319B9D,
+	(q31_t)0xADBD6A10, (q31_t)0x6211557D, (q31_t)0xAD96ED91,
+	(q31_t)0x61F1003E, (q31_t)0xAD707DC8, (q31_t)0x61D09BE5,
+	(q31_t)0xAD4A1ABA, (q31_t)0x61B02876, (q31_t)0xAD23C46D,
+	(q31_t)0x618FA5F6, (q31_t)0xACFD7AE8, (q31_t)0x616F146B,
+	(q31_t)0xACD73E30, (q31_t)0x614E73D9, (q31_t)0xACB10E4A,
+	(q31_t)0x612DC446, (q31_t)0xAC8AEB3E, (q31_t)0x610D05B7,
+	(q31_t)0xAC64D510, (q31_t)0x60EC3830, (q31_t)0xAC3ECBC7,
+	(q31_t)0x60CB5BB6, (q31_t)0xAC18CF68, (q31_t)0x60AA704F,
+	(q31_t)0xABF2DFFA, (q31_t)0x60897600, (q31_t)0xABCCFD82,
+	(q31_t)0x60686CCE, (q31_t)0xABA72806, (q31_t)0x604754BE,
+	(q31_t)0xAB815F8C, (q31_t)0x60262DD5, (q31_t)0xAB5BA41A,
+	(q31_t)0x6004F818, (q31_t)0xAB35F5B5, (q31_t)0x5FE3B38D,
+	(q31_t)0xAB105464, (q31_t)0x5FC26038, (q31_t)0xAAEAC02B,
+	(q31_t)0x5FA0FE1E, (q31_t)0xAAC53912, (q31_t)0x5F7F8D46,
+	(q31_t)0xAA9FBF1D, (q31_t)0x5F5E0DB3, (q31_t)0xAA7A5253,
+	(q31_t)0x5F3C7F6B, (q31_t)0xAA54F2B9, (q31_t)0x5F1AE273,
+	(q31_t)0xAA2FA055, (q31_t)0x5EF936D1, (q31_t)0xAA0A5B2D,
+	(q31_t)0x5ED77C89, (q31_t)0xA9E52347, (q31_t)0x5EB5B3A1,
+	(q31_t)0xA9BFF8A8, (q31_t)0x5E93DC1F, (q31_t)0xA99ADB56,
+	(q31_t)0x5E71F606, (q31_t)0xA975CB56, (q31_t)0x5E50015D,
+	(q31_t)0xA950C8AF, (q31_t)0x5E2DFE28, (q31_t)0xA92BD366,
+	(q31_t)0x5E0BEC6E, (q31_t)0xA906EB81, (q31_t)0x5DE9CC32,
+	(q31_t)0xA8E21106, (q31_t)0x5DC79D7C, (q31_t)0xA8BD43FA,
+	(q31_t)0x5DA5604E, (q31_t)0xA8988463, (q31_t)0x5D8314B0,
+	(q31_t)0xA873D246, (q31_t)0x5D60BAA6, (q31_t)0xA84F2DA9,
+	(q31_t)0x5D3E5236, (q31_t)0xA82A9693, (q31_t)0x5D1BDB65,
+	(q31_t)0xA8060D08, (q31_t)0x5CF95638, (q31_t)0xA7E1910E,
+	(q31_t)0x5CD6C2B4, (q31_t)0xA7BD22AB, (q31_t)0x5CB420DF,
+	(q31_t)0xA798C1E4, (q31_t)0x5C9170BF, (q31_t)0xA7746EC0,
+	(q31_t)0x5C6EB258, (q31_t)0xA7502943, (q31_t)0x5C4BE5B0,
+	(q31_t)0xA72BF173, (q31_t)0x5C290ACC, (q31_t)0xA707C756,
+	(q31_t)0x5C0621B2, (q31_t)0xA6E3AAF2, (q31_t)0x5BE32A67,
+	(q31_t)0xA6BF9C4B, (q31_t)0x5BC024F0, (q31_t)0xA69B9B68,
+	(q31_t)0x5B9D1153, (q31_t)0xA677A84E, (q31_t)0x5B79EF96,
+	(q31_t)0xA653C302, (q31_t)0x5B56BFBD, (q31_t)0xA62FEB8B,
+	(q31_t)0x5B3381CE, (q31_t)0xA60C21ED, (q31_t)0x5B1035CF,
+	(q31_t)0xA5E8662F, (q31_t)0x5AECDBC4, (q31_t)0xA5C4B855,
+	(q31_t)0x5AC973B4, (q31_t)0xA5A11865, (q31_t)0x5AA5FDA4,
+	(q31_t)0xA57D8666, (q31_t)0x5A82799A, (q31_t)0xA55A025B,
+	(q31_t)0x5A5EE79A, (q31_t)0xA5368C4B, (q31_t)0x5A3B47AA,
+	(q31_t)0xA513243B, (q31_t)0x5A1799D0, (q31_t)0xA4EFCA31,
+	(q31_t)0x59F3DE12, (q31_t)0xA4CC7E31, (q31_t)0x59D01474,
+	(q31_t)0xA4A94042, (q31_t)0x59AC3CFD, (q31_t)0xA4861069,
+	(q31_t)0x598857B1, (q31_t)0xA462EEAC, (q31_t)0x59646497,
+	(q31_t)0xA43FDB0F, (q31_t)0x594063B4, (q31_t)0xA41CD598,
+	(q31_t)0x591C550E, (q31_t)0xA3F9DE4D, (q31_t)0x58F838A9,
+	(q31_t)0xA3D6F533, (q31_t)0x58D40E8C, (q31_t)0xA3B41A4F,
+	(q31_t)0x58AFD6BC, (q31_t)0xA3914DA7, (q31_t)0x588B913F,
+	(q31_t)0xA36E8F40, (q31_t)0x58673E1B, (q31_t)0xA34BDF20,
+	(q31_t)0x5842DD54, (q31_t)0xA3293D4B, (q31_t)0x581E6EF1,
+	(q31_t)0xA306A9C7, (q31_t)0x57F9F2F7, (q31_t)0xA2E4249A,
+	(q31_t)0x57D5696C, (q31_t)0xA2C1ADC9, (q31_t)0x57B0D256,
+	(q31_t)0xA29F4559, (q31_t)0x578C2DB9, (q31_t)0xA27CEB4F,
+	(q31_t)0x57677B9D, (q31_t)0xA25A9FB1, (q31_t)0x5742BC05,
+	(q31_t)0xA2386283, (q31_t)0x571DEEF9, (q31_t)0xA21633CD,
+	(q31_t)0x56F9147E, (q31_t)0xA1F41391, (q31_t)0x56D42C99,
+	(q31_t)0xA1D201D7, (q31_t)0x56AF3750, (q31_t)0xA1AFFEA2,
+	(q31_t)0x568A34A9, (q31_t)0xA18E09F9, (q31_t)0x566524AA,
+	(q31_t)0xA16C23E1, (q31_t)0x56400757, (q31_t)0xA14A4C5E,
+	(q31_t)0x561ADCB8, (q31_t)0xA1288376, (q31_t)0x55F5A4D2,
+	(q31_t)0xA106C92E, (q31_t)0x55D05FAA, (q31_t)0xA0E51D8C,
+	(q31_t)0x55AB0D46, (q31_t)0xA0C38094, (q31_t)0x5585ADAC,
+	(q31_t)0xA0A1F24C, (q31_t)0x556040E2, (q31_t)0xA08072BA,
+	(q31_t)0x553AC6ED, (q31_t)0xA05F01E1, (q31_t)0x55153FD4,
+	(q31_t)0xA03D9FC7, (q31_t)0x54EFAB9C, (q31_t)0xA01C4C72,
+	(q31_t)0x54CA0A4A, (q31_t)0x9FFB07E7, (q31_t)0x54A45BE5,
+	(q31_t)0x9FD9D22A, (q31_t)0x547EA073, (q31_t)0x9FB8AB41,
+	(q31_t)0x5458D7F9, (q31_t)0x9F979331, (q31_t)0x5433027D,
+	(q31_t)0x9F7689FF, (q31_t)0x540D2005, (q31_t)0x9F558FB0,
+	(q31_t)0x53E73097, (q31_t)0x9F34A449, (q31_t)0x53C13438,
+	(q31_t)0x9F13C7D0, (q31_t)0x539B2AEF, (q31_t)0x9EF2FA48,
+	(q31_t)0x537514C1, (q31_t)0x9ED23BB9, (q31_t)0x534EF1B5,
+	(q31_t)0x9EB18C26, (q31_t)0x5328C1D0, (q31_t)0x9E90EB94,
+	(q31_t)0x53028517, (q31_t)0x9E705A09, (q31_t)0x52DC3B92,
+	(q31_t)0x9E4FD789, (q31_t)0x52B5E545, (q31_t)0x9E2F641A,
+	(q31_t)0x528F8237, (q31_t)0x9E0EFFC1, (q31_t)0x5269126E,
+	(q31_t)0x9DEEAA82, (q31_t)0x524295EF, (q31_t)0x9DCE6462,
+	(q31_t)0x521C0CC1, (q31_t)0x9DAE2D68, (q31_t)0x51F576E9,
+	(q31_t)0x9D8E0596, (q31_t)0x51CED46E, (q31_t)0x9D6DECF4,
+	(q31_t)0x51A82555, (q31_t)0x9D4DE384, (q31_t)0x518169A4,
+	(q31_t)0x9D2DE94D, (q31_t)0x515AA162, (q31_t)0x9D0DFE53,
+	(q31_t)0x5133CC94, (q31_t)0x9CEE229C, (q31_t)0x510CEB40,
+	(q31_t)0x9CCE562B, (q31_t)0x50E5FD6C, (q31_t)0x9CAE9907,
+	(q31_t)0x50BF031F, (q31_t)0x9C8EEB33, (q31_t)0x5097FC5E,
+	(q31_t)0x9C6F4CB5, (q31_t)0x5070E92F, (q31_t)0x9C4FBD92,
+	(q31_t)0x5049C999, (q31_t)0x9C303DCF, (q31_t)0x50229DA0,
+	(q31_t)0x9C10CD70, (q31_t)0x4FFB654D, (q31_t)0x9BF16C7A,
+	(q31_t)0x4FD420A3, (q31_t)0x9BD21AF2, (q31_t)0x4FACCFAB,
+	(q31_t)0x9BB2D8DD, (q31_t)0x4F857268, (q31_t)0x9B93A640,
+	(q31_t)0x4F5E08E3, (q31_t)0x9B748320, (q31_t)0x4F369320,
+	(q31_t)0x9B556F80, (q31_t)0x4F0F1126, (q31_t)0x9B366B67,
+	(q31_t)0x4EE782FA, (q31_t)0x9B1776D9, (q31_t)0x4EBFE8A4,
+	(q31_t)0x9AF891DB, (q31_t)0x4E984229, (q31_t)0x9AD9BC71,
+	(q31_t)0x4E708F8F, (q31_t)0x9ABAF6A0, (q31_t)0x4E48D0DC,
+	(q31_t)0x9A9C406D, (q31_t)0x4E210617, (q31_t)0x9A7D99DD,
+	(q31_t)0x4DF92F45, (q31_t)0x9A5F02F5, (q31_t)0x4DD14C6E,
+	(q31_t)0x9A407BB8, (q31_t)0x4DA95D96, (q31_t)0x9A22042C,
+	(q31_t)0x4D8162C4, (q31_t)0x9A039C56, (q31_t)0x4D595BFE,
+	(q31_t)0x99E5443A, (q31_t)0x4D31494B, (q31_t)0x99C6FBDE,
+	(q31_t)0x4D092AB0, (q31_t)0x99A8C344, (q31_t)0x4CE10034,
+	(q31_t)0x998A9A73, (q31_t)0x4CB8C9DD, (q31_t)0x996C816F,
+	(q31_t)0x4C9087B1, (q31_t)0x994E783C, (q31_t)0x4C6839B6,
+	(q31_t)0x99307EE0, (q31_t)0x4C3FDFF3, (q31_t)0x9912955E,
+	(q31_t)0x4C177A6E, (q31_t)0x98F4BBBC, (q31_t)0x4BEF092D,
+	(q31_t)0x98D6F1FE, (q31_t)0x4BC68C36, (q31_t)0x98B93828,
+	(q31_t)0x4B9E038F, (q31_t)0x989B8E3F, (q31_t)0x4B756F3F,
+	(q31_t)0x987DF449, (q31_t)0x4B4CCF4D, (q31_t)0x98606A48,
+	(q31_t)0x4B2423BD, (q31_t)0x9842F043, (q31_t)0x4AFB6C97,
+	(q31_t)0x9825863D, (q31_t)0x4AD2A9E1, (q31_t)0x98082C3B,
+	(q31_t)0x4AA9DBA1, (q31_t)0x97EAE241, (q31_t)0x4A8101DE,
+	(q31_t)0x97CDA855, (q31_t)0x4A581C9D, (q31_t)0x97B07E7A,
+	(q31_t)0x4A2F2BE5, (q31_t)0x979364B5, (q31_t)0x4A062FBD,
+	(q31_t)0x97765B0A, (q31_t)0x49DD282A, (q31_t)0x9759617E,
+	(q31_t)0x49B41533, (q31_t)0x973C7816, (q31_t)0x498AF6DE,
+	(q31_t)0x971F9ED6, (q31_t)0x4961CD32, (q31_t)0x9702D5C2,
+	(q31_t)0x49389836, (q31_t)0x96E61CDF, (q31_t)0x490F57EE,
+	(q31_t)0x96C97431, (q31_t)0x48E60C62, (q31_t)0x96ACDBBD,
+	(q31_t)0x48BCB598, (q31_t)0x96905387, (q31_t)0x48935397,
+	(q31_t)0x9673DB94, (q31_t)0x4869E664, (q31_t)0x965773E7,
+	(q31_t)0x48406E07, (q31_t)0x963B1C85, (q31_t)0x4816EA85,
+	(q31_t)0x961ED573, (q31_t)0x47ED5BE6, (q31_t)0x96029EB5,
+	(q31_t)0x47C3C22E, (q31_t)0x95E6784F, (q31_t)0x479A1D66,
+	(q31_t)0x95CA6246, (q31_t)0x47706D93, (q31_t)0x95AE5C9E,
+	(q31_t)0x4746B2BC, (q31_t)0x9592675B, (q31_t)0x471CECE6,
+	(q31_t)0x95768282, (q31_t)0x46F31C1A, (q31_t)0x955AAE17,
+	(q31_t)0x46C9405C, (q31_t)0x953EEA1E, (q31_t)0x469F59B4,
+	(q31_t)0x9523369B, (q31_t)0x46756827, (q31_t)0x95079393,
+	(q31_t)0x464B6BBD, (q31_t)0x94EC010B, (q31_t)0x4621647C,
+	(q31_t)0x94D07F05, (q31_t)0x45F7526B, (q31_t)0x94B50D87,
+	(q31_t)0x45CD358F, (q31_t)0x9499AC95, (q31_t)0x45A30DF0,
+	(q31_t)0x947E5C32, (q31_t)0x4578DB93, (q31_t)0x94631C64,
+	(q31_t)0x454E9E80, (q31_t)0x9447ED2F, (q31_t)0x452456BC,
+	(q31_t)0x942CCE95, (q31_t)0x44FA044F, (q31_t)0x9411C09D,
+	(q31_t)0x44CFA73F, (q31_t)0x93F6C34A, (q31_t)0x44A53F93,
+	(q31_t)0x93DBD69F, (q31_t)0x447ACD50, (q31_t)0x93C0FAA2,
+	(q31_t)0x4450507E, (q31_t)0x93A62F56, (q31_t)0x4425C923,
+	(q31_t)0x938B74C0, (q31_t)0x43FB3745, (q31_t)0x9370CAE4,
+	(q31_t)0x43D09AEC, (q31_t)0x935631C5, (q31_t)0x43A5F41E,
+	(q31_t)0x933BA968, (q31_t)0x437B42E1, (q31_t)0x932131D1,
+	(q31_t)0x4350873C, (q31_t)0x9306CB04, (q31_t)0x4325C135,
+	(q31_t)0x92EC7505, (q31_t)0x42FAF0D4, (q31_t)0x92D22FD8,
+	(q31_t)0x42D0161E, (q31_t)0x92B7FB82, (q31_t)0x42A5311A,
+	(q31_t)0x929DD805, (q31_t)0x427A41D0, (q31_t)0x9283C567,
+	(q31_t)0x424F4845, (q31_t)0x9269C3AC, (q31_t)0x42244480,
+	(q31_t)0x924FD2D6, (q31_t)0x41F93688, (q31_t)0x9235F2EB,
+	(q31_t)0x41CE1E64, (q31_t)0x921C23EE, (q31_t)0x41A2FC1A,
+	(q31_t)0x920265E4, (q31_t)0x4177CFB0, (q31_t)0x91E8B8D0,
+	(q31_t)0x414C992E, (q31_t)0x91CF1CB6, (q31_t)0x4121589A,
+	(q31_t)0x91B5919A, (q31_t)0x40F60DFB, (q31_t)0x919C1780,
+	(q31_t)0x40CAB957, (q31_t)0x9182AE6C, (q31_t)0x409F5AB6,
+	(q31_t)0x91695663, (q31_t)0x4073F21D, (q31_t)0x91500F67,
+	(q31_t)0x40487F93, (q31_t)0x9136D97D, (q31_t)0x401D0320,
+	(q31_t)0x911DB4A8, (q31_t)0x3FF17CCA, (q31_t)0x9104A0ED,
+	(q31_t)0x3FC5EC97, (q31_t)0x90EB9E50, (q31_t)0x3F9A528F,
+	(q31_t)0x90D2ACD3, (q31_t)0x3F6EAEB8, (q31_t)0x90B9CC7C,
+	(q31_t)0x3F430118, (q31_t)0x90A0FD4E, (q31_t)0x3F1749B7,
+	(q31_t)0x90883F4C, (q31_t)0x3EEB889C, (q31_t)0x906F927B,
+	(q31_t)0x3EBFBDCC, (q31_t)0x9056F6DF, (q31_t)0x3E93E94F,
+	(q31_t)0x903E6C7A, (q31_t)0x3E680B2C, (q31_t)0x9025F352,
+	(q31_t)0x3E3C2369, (q31_t)0x900D8B69, (q31_t)0x3E10320D,
+	(q31_t)0x8FF534C4, (q31_t)0x3DE4371F, (q31_t)0x8FDCEF66,
+	(q31_t)0x3DB832A5, (q31_t)0x8FC4BB53, (q31_t)0x3D8C24A7,
+	(q31_t)0x8FAC988E, (q31_t)0x3D600D2B, (q31_t)0x8F94871D,
+	(q31_t)0x3D33EC39, (q31_t)0x8F7C8701, (q31_t)0x3D07C1D5,
+	(q31_t)0x8F64983F, (q31_t)0x3CDB8E09, (q31_t)0x8F4CBADB,
+	(q31_t)0x3CAF50DA, (q31_t)0x8F34EED8, (q31_t)0x3C830A4F,
+	(q31_t)0x8F1D343A, (q31_t)0x3C56BA70, (q31_t)0x8F058B04,
+	(q31_t)0x3C2A6142, (q31_t)0x8EEDF33B, (q31_t)0x3BFDFECD,
+	(q31_t)0x8ED66CE1, (q31_t)0x3BD19317, (q31_t)0x8EBEF7FB,
+	(q31_t)0x3BA51E29, (q31_t)0x8EA7948C, (q31_t)0x3B78A007,
+	(q31_t)0x8E904298, (q31_t)0x3B4C18BA, (q31_t)0x8E790222,
+	(q31_t)0x3B1F8847, (q31_t)0x8E61D32D, (q31_t)0x3AF2EEB7,
+	(q31_t)0x8E4AB5BF, (q31_t)0x3AC64C0F, (q31_t)0x8E33A9D9,
+	(q31_t)0x3A99A057, (q31_t)0x8E1CAF80, (q31_t)0x3A6CEB95,
+	(q31_t)0x8E05C6B7, (q31_t)0x3A402DD1, (q31_t)0x8DEEEF82,
+	(q31_t)0x3A136712, (q31_t)0x8DD829E4, (q31_t)0x39E6975D,
+	(q31_t)0x8DC175E0, (q31_t)0x39B9BEBB, (q31_t)0x8DAAD37B,
+	(q31_t)0x398CDD32, (q31_t)0x8D9442B7, (q31_t)0x395FF2C9,
+	(q31_t)0x8D7DC399, (q31_t)0x3932FF87, (q31_t)0x8D675623,
+	(q31_t)0x39060372, (q31_t)0x8D50FA59, (q31_t)0x38D8FE93,
+	(q31_t)0x8D3AB03F, (q31_t)0x38ABF0EF, (q31_t)0x8D2477D8,
+	(q31_t)0x387EDA8E, (q31_t)0x8D0E5127, (q31_t)0x3851BB76,
+	(q31_t)0x8CF83C30, (q31_t)0x382493B0, (q31_t)0x8CE238F6,
+	(q31_t)0x37F76340, (q31_t)0x8CCC477D, (q31_t)0x37CA2A30,
+	(q31_t)0x8CB667C7, (q31_t)0x379CE884, (q31_t)0x8CA099D9,
+	(q31_t)0x376F9E46, (q31_t)0x8C8ADDB6, (q31_t)0x37424B7A,
+	(q31_t)0x8C753361, (q31_t)0x3714F02A, (q31_t)0x8C5F9ADD,
+	(q31_t)0x36E78C5A, (q31_t)0x8C4A142F, (q31_t)0x36BA2013,
+	(q31_t)0x8C349F58, (q31_t)0x368CAB5C, (q31_t)0x8C1F3C5C,
+	(q31_t)0x365F2E3B, (q31_t)0x8C09EB40, (q31_t)0x3631A8B7,
+	(q31_t)0x8BF4AC05, (q31_t)0x36041AD9, (q31_t)0x8BDF7EAF,
+	(q31_t)0x35D684A5, (q31_t)0x8BCA6342, (q31_t)0x35A8E624,
+	(q31_t)0x8BB559C1, (q31_t)0x357B3F5D, (q31_t)0x8BA0622F,
+	(q31_t)0x354D9056, (q31_t)0x8B8B7C8F, (q31_t)0x351FD917,
+	(q31_t)0x8B76A8E4, (q31_t)0x34F219A7, (q31_t)0x8B61E732,
+	(q31_t)0x34C4520D, (q31_t)0x8B4D377C, (q31_t)0x3496824F,
+	(q31_t)0x8B3899C5, (q31_t)0x3468AA76, (q31_t)0x8B240E10,
+	(q31_t)0x343ACA87, (q31_t)0x8B0F9461, (q31_t)0x340CE28A,
+	(q31_t)0x8AFB2CBA, (q31_t)0x33DEF287, (q31_t)0x8AE6D71F,
+	(q31_t)0x33B0FA84, (q31_t)0x8AD29393, (q31_t)0x3382FA88,
+	(q31_t)0x8ABE6219, (q31_t)0x3354F29A, (q31_t)0x8AAA42B4,
+	(q31_t)0x3326E2C2, (q31_t)0x8A963567, (q31_t)0x32F8CB07,
+	(q31_t)0x8A823A35, (q31_t)0x32CAAB6F, (q31_t)0x8A6E5122,
+	(q31_t)0x329C8402, (q31_t)0x8A5A7A30, (q31_t)0x326E54C7,
+	(q31_t)0x8A46B563, (q31_t)0x32401DC5, (q31_t)0x8A3302BD,
+	(q31_t)0x3211DF03, (q31_t)0x8A1F6242, (q31_t)0x31E39889,
+	(q31_t)0x8A0BD3F5, (q31_t)0x31B54A5D, (q31_t)0x89F857D8,
+	(q31_t)0x3186F487, (q31_t)0x89E4EDEE, (q31_t)0x3158970D,
+	(q31_t)0x89D1963C, (q31_t)0x312A31F8, (q31_t)0x89BE50C3,
+	(q31_t)0x30FBC54D, (q31_t)0x89AB1D86, (q31_t)0x30CD5114,
+	(q31_t)0x8997FC89, (q31_t)0x309ED555, (q31_t)0x8984EDCF,
+	(q31_t)0x30705217, (q31_t)0x8971F15A, (q31_t)0x3041C760,
+	(q31_t)0x895F072D, (q31_t)0x30133538, (q31_t)0x894C2F4C,
+	(q31_t)0x2FE49BA6, (q31_t)0x893969B9, (q31_t)0x2FB5FAB2,
+	(q31_t)0x8926B677, (q31_t)0x2F875262, (q31_t)0x89141589,
+	(q31_t)0x2F58A2BD, (q31_t)0x890186F1, (q31_t)0x2F29EBCC,
+	(q31_t)0x88EF0AB4, (q31_t)0x2EFB2D94, (q31_t)0x88DCA0D3,
+	(q31_t)0x2ECC681E, (q31_t)0x88CA4951, (q31_t)0x2E9D9B70,
+	(q31_t)0x88B80431, (q31_t)0x2E6EC792, (q31_t)0x88A5D177,
+	(q31_t)0x2E3FEC8B, (q31_t)0x8893B124, (q31_t)0x2E110A62,
+	(q31_t)0x8881A33C, (q31_t)0x2DE2211E, (q31_t)0x886FA7C2,
+	(q31_t)0x2DB330C7, (q31_t)0x885DBEB7, (q31_t)0x2D843963,
+	(q31_t)0x884BE820, (q31_t)0x2D553AFB, (q31_t)0x883A23FE,
+	(q31_t)0x2D263595, (q31_t)0x88287255, (q31_t)0x2CF72939,
+	(q31_t)0x8816D327, (q31_t)0x2CC815ED, (q31_t)0x88054677,
+	(q31_t)0x2C98FBBA, (q31_t)0x87F3CC47, (q31_t)0x2C69DAA6,
+	(q31_t)0x87E2649B, (q31_t)0x2C3AB2B9, (q31_t)0x87D10F75,
+	(q31_t)0x2C0B83F9, (q31_t)0x87BFCCD7, (q31_t)0x2BDC4E6F,
+	(q31_t)0x87AE9CC5, (q31_t)0x2BAD1221, (q31_t)0x879D7F40,
+	(q31_t)0x2B7DCF17, (q31_t)0x878C744C, (q31_t)0x2B4E8558,
+	(q31_t)0x877B7BEC, (q31_t)0x2B1F34EB, (q31_t)0x876A9621,
+	(q31_t)0x2AEFDDD8, (q31_t)0x8759C2EF, (q31_t)0x2AC08025,
+	(q31_t)0x87490257, (q31_t)0x2A911BDB, (q31_t)0x8738545E,
+	(q31_t)0x2A61B101, (q31_t)0x8727B904, (q31_t)0x2A323F9D,
+	(q31_t)0x8717304E, (q31_t)0x2A02C7B8, (q31_t)0x8706BA3C,
+	(q31_t)0x29D34958, (q31_t)0x86F656D3, (q31_t)0x29A3C484,
+	(q31_t)0x86E60614, (q31_t)0x29743945, (q31_t)0x86D5C802,
+	(q31_t)0x2944A7A2, (q31_t)0x86C59C9F, (q31_t)0x29150FA1,
+	(q31_t)0x86B583EE, (q31_t)0x28E5714A, (q31_t)0x86A57DF1,
+	(q31_t)0x28B5CCA5, (q31_t)0x86958AAB, (q31_t)0x288621B9,
+	(q31_t)0x8685AA1F, (q31_t)0x2856708C, (q31_t)0x8675DC4E,
+	(q31_t)0x2826B928, (q31_t)0x8666213C, (q31_t)0x27F6FB92,
+	(q31_t)0x865678EA, (q31_t)0x27C737D2, (q31_t)0x8646E35B,
+	(q31_t)0x27976DF1, (q31_t)0x86376092, (q31_t)0x27679DF4,
+	(q31_t)0x8627F090, (q31_t)0x2737C7E3, (q31_t)0x86189359,
+	(q31_t)0x2707EBC6, (q31_t)0x860948EE, (q31_t)0x26D809A5,
+	(q31_t)0x85FA1152, (q31_t)0x26A82185, (q31_t)0x85EAEC88,
+	(q31_t)0x26783370, (q31_t)0x85DBDA91, (q31_t)0x26483F6C,
+	(q31_t)0x85CCDB70, (q31_t)0x26184581, (q31_t)0x85BDEF27,
+	(q31_t)0x25E845B5, (q31_t)0x85AF15B9, (q31_t)0x25B84012,
+	(q31_t)0x85A04F28, (q31_t)0x2588349D, (q31_t)0x85919B75,
+	(q31_t)0x2558235E, (q31_t)0x8582FAA4, (q31_t)0x25280C5D,
+	(q31_t)0x85746CB7, (q31_t)0x24F7EFA1, (q31_t)0x8565F1B0,
+	(q31_t)0x24C7CD32, (q31_t)0x85578991, (q31_t)0x2497A517,
+	(q31_t)0x8549345C, (q31_t)0x24677757, (q31_t)0x853AF214,
+	(q31_t)0x243743FA, (q31_t)0x852CC2BA, (q31_t)0x24070B07,
+	(q31_t)0x851EA652, (q31_t)0x23D6CC86, (q31_t)0x85109CDC,
+	(q31_t)0x23A6887E, (q31_t)0x8502A65C, (q31_t)0x23763EF7,
+	(q31_t)0x84F4C2D3, (q31_t)0x2345EFF7, (q31_t)0x84E6F244,
+	(q31_t)0x23159B87, (q31_t)0x84D934B0, (q31_t)0x22E541AE,
+	(q31_t)0x84CB8A1B, (q31_t)0x22B4E274, (q31_t)0x84BDF285,
+	(q31_t)0x22847DDF, (q31_t)0x84B06DF1, (q31_t)0x225413F8,
+	(q31_t)0x84A2FC62, (q31_t)0x2223A4C5, (q31_t)0x84959DD9,
+	(q31_t)0x21F3304E, (q31_t)0x84885257, (q31_t)0x21C2B69C,
+	(q31_t)0x847B19E1, (q31_t)0x219237B4, (q31_t)0x846DF476,
+	(q31_t)0x2161B39F, (q31_t)0x8460E21A, (q31_t)0x21312A65,
+	(q31_t)0x8453E2CE, (q31_t)0x21009C0B, (q31_t)0x8446F695,
+	(q31_t)0x20D0089B, (q31_t)0x843A1D70, (q31_t)0x209F701C,
+	(q31_t)0x842D5761, (q31_t)0x206ED295, (q31_t)0x8420A46B,
+	(q31_t)0x203E300D, (q31_t)0x8414048F, (q31_t)0x200D888C,
+	(q31_t)0x840777CF, (q31_t)0x1FDCDC1A, (q31_t)0x83FAFE2E,
+	(q31_t)0x1FAC2ABF, (q31_t)0x83EE97AC, (q31_t)0x1F7B7480,
+	(q31_t)0x83E2444D, (q31_t)0x1F4AB967, (q31_t)0x83D60411,
+	(q31_t)0x1F19F97B, (q31_t)0x83C9D6FB, (q31_t)0x1EE934C2,
+	(q31_t)0x83BDBD0D, (q31_t)0x1EB86B46, (q31_t)0x83B1B649,
+	(q31_t)0x1E879D0C, (q31_t)0x83A5C2B0, (q31_t)0x1E56CA1E,
+	(q31_t)0x8399E244, (q31_t)0x1E25F281, (q31_t)0x838E1507,
+	(q31_t)0x1DF5163F, (q31_t)0x83825AFB, (q31_t)0x1DC4355D,
+	(q31_t)0x8376B422, (q31_t)0x1D934FE5, (q31_t)0x836B207D,
+	(q31_t)0x1D6265DD, (q31_t)0x835FA00E, (q31_t)0x1D31774D,
+	(q31_t)0x835432D8, (q31_t)0x1D00843C, (q31_t)0x8348D8DB,
+	(q31_t)0x1CCF8CB3, (q31_t)0x833D921A, (q31_t)0x1C9E90B8,
+	(q31_t)0x83325E97, (q31_t)0x1C6D9053, (q31_t)0x83273E52,
+	(q31_t)0x1C3C8B8C, (q31_t)0x831C314E, (q31_t)0x1C0B826A,
+	(q31_t)0x8311378C, (q31_t)0x1BDA74F5, (q31_t)0x8306510F,
+	(q31_t)0x1BA96334, (q31_t)0x82FB7DD8, (q31_t)0x1B784D30,
+	(q31_t)0x82F0BDE8, (q31_t)0x1B4732EF, (q31_t)0x82E61141,
+	(q31_t)0x1B161479, (q31_t)0x82DB77E5, (q31_t)0x1AE4F1D6,
+	(q31_t)0x82D0F1D5, (q31_t)0x1AB3CB0C, (q31_t)0x82C67F13,
+	(q31_t)0x1A82A025, (q31_t)0x82BC1FA1, (q31_t)0x1A517127,
+	(q31_t)0x82B1D381, (q31_t)0x1A203E1B, (q31_t)0x82A79AB3,
+	(q31_t)0x19EF0706, (q31_t)0x829D753A, (q31_t)0x19BDCBF2,
+	(q31_t)0x82936316, (q31_t)0x198C8CE6, (q31_t)0x8289644A,
+	(q31_t)0x195B49E9, (q31_t)0x827F78D8, (q31_t)0x192A0303,
+	(q31_t)0x8275A0C0, (q31_t)0x18F8B83C, (q31_t)0x826BDC04,
+	(q31_t)0x18C7699B, (q31_t)0x82622AA5, (q31_t)0x18961727,
+	(q31_t)0x82588CA6, (q31_t)0x1864C0E9, (q31_t)0x824F0208,
+	(q31_t)0x183366E8, (q31_t)0x82458ACB, (q31_t)0x1802092C,
+	(q31_t)0x823C26F2, (q31_t)0x17D0A7BB, (q31_t)0x8232D67E,
+	(q31_t)0x179F429F, (q31_t)0x82299971, (q31_t)0x176DD9DE,
+	(q31_t)0x82206FCB, (q31_t)0x173C6D80, (q31_t)0x8217598F,
+	(q31_t)0x170AFD8D, (q31_t)0x820E56BE, (q31_t)0x16D98A0C,
+	(q31_t)0x82056758, (q31_t)0x16A81305, (q31_t)0x81FC8B60,
+	(q31_t)0x1676987F, (q31_t)0x81F3C2D7, (q31_t)0x16451A83,
+	(q31_t)0x81EB0DBD, (q31_t)0x16139917, (q31_t)0x81E26C16,
+	(q31_t)0x15E21444, (q31_t)0x81D9DDE1, (q31_t)0x15B08C11,
+	(q31_t)0x81D16320, (q31_t)0x157F0086, (q31_t)0x81C8FBD5,
+	(q31_t)0x154D71AA, (q31_t)0x81C0A801, (q31_t)0x151BDF85,
+	(q31_t)0x81B867A4, (q31_t)0x14EA4A1F, (q31_t)0x81B03AC1,
+	(q31_t)0x14B8B17F, (q31_t)0x81A82159, (q31_t)0x148715AD,
+	(q31_t)0x81A01B6C, (q31_t)0x145576B1, (q31_t)0x819828FD,
+	(q31_t)0x1423D492, (q31_t)0x81904A0C, (q31_t)0x13F22F57,
+	(q31_t)0x81887E9A, (q31_t)0x13C0870A, (q31_t)0x8180C6A9,
+	(q31_t)0x138EDBB0, (q31_t)0x8179223A, (q31_t)0x135D2D53,
+	(q31_t)0x8171914E, (q31_t)0x132B7BF9, (q31_t)0x816A13E6,
+	(q31_t)0x12F9C7AA, (q31_t)0x8162AA03, (q31_t)0x12C8106E,
+	(q31_t)0x815B53A8, (q31_t)0x1296564D, (q31_t)0x815410D3,
+	(q31_t)0x1264994E, (q31_t)0x814CE188, (q31_t)0x1232D978,
+	(q31_t)0x8145C5C6, (q31_t)0x120116D4, (q31_t)0x813EBD90,
+	(q31_t)0x11CF516A, (q31_t)0x8137C8E6, (q31_t)0x119D8940,
+	(q31_t)0x8130E7C8, (q31_t)0x116BBE5F, (q31_t)0x812A1A39,
+	(q31_t)0x1139F0CE, (q31_t)0x81236039, (q31_t)0x11082096,
+	(q31_t)0x811CB9CA, (q31_t)0x10D64DBC, (q31_t)0x811626EC,
+	(q31_t)0x10A4784A, (q31_t)0x810FA7A0, (q31_t)0x1072A047,
+	(q31_t)0x81093BE8, (q31_t)0x1040C5BB, (q31_t)0x8102E3C3,
+	(q31_t)0x100EE8AD, (q31_t)0x80FC9F35, (q31_t)0x0FDD0925,
+	(q31_t)0x80F66E3C, (q31_t)0x0FAB272B, (q31_t)0x80F050DB,
+	(q31_t)0x0F7942C6, (q31_t)0x80EA4712, (q31_t)0x0F475BFE,
+	(q31_t)0x80E450E2, (q31_t)0x0F1572DC, (q31_t)0x80DE6E4C,
+	(q31_t)0x0EE38765, (q31_t)0x80D89F51, (q31_t)0x0EB199A3,
+	(q31_t)0x80D2E3F1, (q31_t)0x0E7FA99D, (q31_t)0x80CD3C2F,
+	(q31_t)0x0E4DB75B, (q31_t)0x80C7A80A, (q31_t)0x0E1BC2E3,
+	(q31_t)0x80C22783, (q31_t)0x0DE9CC3F, (q31_t)0x80BCBA9C,
+	(q31_t)0x0DB7D376, (q31_t)0x80B76155, (q31_t)0x0D85D88F,
+	(q31_t)0x80B21BAF, (q31_t)0x0D53DB92, (q31_t)0x80ACE9AB,
+	(q31_t)0x0D21DC87, (q31_t)0x80A7CB49, (q31_t)0x0CEFDB75,
+	(q31_t)0x80A2C08B, (q31_t)0x0CBDD865, (q31_t)0x809DC970,
+	(q31_t)0x0C8BD35E, (q31_t)0x8098E5FB, (q31_t)0x0C59CC67,
+	(q31_t)0x8094162B, (q31_t)0x0C27C389, (q31_t)0x808F5A02,
+	(q31_t)0x0BF5B8CB, (q31_t)0x808AB180, (q31_t)0x0BC3AC35,
+	(q31_t)0x80861CA5, (q31_t)0x0B919DCE, (q31_t)0x80819B74,
+	(q31_t)0x0B5F8D9F, (q31_t)0x807D2DEB, (q31_t)0x0B2D7BAE,
+	(q31_t)0x8078D40D, (q31_t)0x0AFB6805, (q31_t)0x80748DD9,
+	(q31_t)0x0AC952AA, (q31_t)0x80705B50, (q31_t)0x0A973BA5,
+	(q31_t)0x806C3C73, (q31_t)0x0A6522FE, (q31_t)0x80683143,
+	(q31_t)0x0A3308BC, (q31_t)0x806439C0, (q31_t)0x0A00ECE8,
+	(q31_t)0x806055EA, (q31_t)0x09CECF89, (q31_t)0x805C85C3,
+	(q31_t)0x099CB0A7, (q31_t)0x8058C94C, (q31_t)0x096A9049,
+	(q31_t)0x80552083, (q31_t)0x09386E77, (q31_t)0x80518B6B,
+	(q31_t)0x09064B3A, (q31_t)0x804E0A03, (q31_t)0x08D42698,
+	(q31_t)0x804A9C4D, (q31_t)0x08A2009A, (q31_t)0x80474248,
+	(q31_t)0x086FD947, (q31_t)0x8043FBF6, (q31_t)0x083DB0A7,
+	(q31_t)0x8040C956, (q31_t)0x080B86C1, (q31_t)0x803DAA69,
+	(q31_t)0x07D95B9E, (q31_t)0x803A9F31, (q31_t)0x07A72F45,
+	(q31_t)0x8037A7AC, (q31_t)0x077501BE, (q31_t)0x8034C3DC,
+	(q31_t)0x0742D310, (q31_t)0x8031F3C1, (q31_t)0x0710A344,
+	(q31_t)0x802F375C, (q31_t)0x06DE7261, (q31_t)0x802C8EAD,
+	(q31_t)0x06AC406F, (q31_t)0x8029F9B4, (q31_t)0x067A0D75,
+	(q31_t)0x80277872, (q31_t)0x0647D97C, (q31_t)0x80250AE7,
+	(q31_t)0x0615A48A, (q31_t)0x8022B113, (q31_t)0x05E36EA9,
+	(q31_t)0x80206AF8, (q31_t)0x05B137DF, (q31_t)0x801E3894,
+	(q31_t)0x057F0034, (q31_t)0x801C19E9, (q31_t)0x054CC7B0,
+	(q31_t)0x801A0EF7, (q31_t)0x051A8E5C, (q31_t)0x801817BF,
+	(q31_t)0x04E8543D, (q31_t)0x80163440, (q31_t)0x04B6195D,
+	(q31_t)0x8014647A, (q31_t)0x0483DDC3, (q31_t)0x8012A86F,
+	(q31_t)0x0451A176, (q31_t)0x8011001E, (q31_t)0x041F647F,
+	(q31_t)0x800F6B88, (q31_t)0x03ED26E6, (q31_t)0x800DEAAC,
+	(q31_t)0x03BAE8B1, (q31_t)0x800C7D8C, (q31_t)0x0388A9E9,
+	(q31_t)0x800B2427, (q31_t)0x03566A96, (q31_t)0x8009DE7D,
+	(q31_t)0x03242ABF, (q31_t)0x8008AC90, (q31_t)0x02F1EA6B,
+	(q31_t)0x80078E5E, (q31_t)0x02BFA9A4, (q31_t)0x800683E8,
+	(q31_t)0x028D6870, (q31_t)0x80058D2E, (q31_t)0x025B26D7,
+	(q31_t)0x8004AA31, (q31_t)0x0228E4E1, (q31_t)0x8003DAF0,
+	(q31_t)0x01F6A296, (q31_t)0x80031F6C, (q31_t)0x01C45FFE,
+	(q31_t)0x800277A5, (q31_t)0x01921D1F, (q31_t)0x8001E39B,
+	(q31_t)0x015FDA03, (q31_t)0x8001634D, (q31_t)0x012D96B0,
+	(q31_t)0x8000F6BD, (q31_t)0x00FB532F, (q31_t)0x80009DE9,
+	(q31_t)0x00C90F88, (q31_t)0x800058D3, (q31_t)0x0096CBC1,
+	(q31_t)0x8000277A, (q31_t)0x006487E3, (q31_t)0x800009DE,
+	(q31_t)0x003243F5, (q31_t)0x80000000, (q31_t)0x00000000,
+	(q31_t)0x800009DE, (q31_t)0xFFCDBC0A, (q31_t)0x8000277A,
+	(q31_t)0xFF9B781D, (q31_t)0x800058D3, (q31_t)0xFF69343E,
+	(q31_t)0x80009DE9, (q31_t)0xFF36F078, (q31_t)0x8000F6BD,
+	(q31_t)0xFF04ACD0, (q31_t)0x8001634D, (q31_t)0xFED2694F,
+	(q31_t)0x8001E39B, (q31_t)0xFEA025FC, (q31_t)0x800277A5,
+	(q31_t)0xFE6DE2E0, (q31_t)0x80031F6C, (q31_t)0xFE3BA001,
+	(q31_t)0x8003DAF0, (q31_t)0xFE095D69, (q31_t)0x8004AA31,
+	(q31_t)0xFDD71B1E, (q31_t)0x80058D2E, (q31_t)0xFDA4D928,
+	(q31_t)0x800683E8, (q31_t)0xFD72978F, (q31_t)0x80078E5E,
+	(q31_t)0xFD40565B, (q31_t)0x8008AC90, (q31_t)0xFD0E1594,
+	(q31_t)0x8009DE7D, (q31_t)0xFCDBD541, (q31_t)0x800B2427,
+	(q31_t)0xFCA99569, (q31_t)0x800C7D8C, (q31_t)0xFC775616,
+	(q31_t)0x800DEAAC, (q31_t)0xFC45174E, (q31_t)0x800F6B88,
+	(q31_t)0xFC12D919, (q31_t)0x8011001E, (q31_t)0xFBE09B80,
+	(q31_t)0x8012A86F, (q31_t)0xFBAE5E89, (q31_t)0x8014647A,
+	(q31_t)0xFB7C223C, (q31_t)0x80163440, (q31_t)0xFB49E6A2,
+	(q31_t)0x801817BF, (q31_t)0xFB17ABC2, (q31_t)0x801A0EF7,
+	(q31_t)0xFAE571A4, (q31_t)0x801C19E9, (q31_t)0xFAB3384F,
+	(q31_t)0x801E3894, (q31_t)0xFA80FFCB, (q31_t)0x80206AF8,
+	(q31_t)0xFA4EC820, (q31_t)0x8022B113, (q31_t)0xFA1C9156,
+	(q31_t)0x80250AE7, (q31_t)0xF9EA5B75, (q31_t)0x80277872,
+	(q31_t)0xF9B82683, (q31_t)0x8029F9B4, (q31_t)0xF985F28A,
+	(q31_t)0x802C8EAD, (q31_t)0xF953BF90, (q31_t)0x802F375C,
+	(q31_t)0xF9218D9E, (q31_t)0x8031F3C1, (q31_t)0xF8EF5CBB,
+	(q31_t)0x8034C3DC, (q31_t)0xF8BD2CEF, (q31_t)0x8037A7AC,
+	(q31_t)0xF88AFE41, (q31_t)0x803A9F31, (q31_t)0xF858D0BA,
+	(q31_t)0x803DAA69, (q31_t)0xF826A461, (q31_t)0x8040C956,
+	(q31_t)0xF7F4793E, (q31_t)0x8043FBF6, (q31_t)0xF7C24F58,
+	(q31_t)0x80474248, (q31_t)0xF79026B8, (q31_t)0x804A9C4D,
+	(q31_t)0xF75DFF65, (q31_t)0x804E0A03, (q31_t)0xF72BD967,
+	(q31_t)0x80518B6B, (q31_t)0xF6F9B4C5, (q31_t)0x80552083,
+	(q31_t)0xF6C79188, (q31_t)0x8058C94C, (q31_t)0xF6956FB6,
+	(q31_t)0x805C85C3, (q31_t)0xF6634F58, (q31_t)0x806055EA,
+	(q31_t)0xF6313076, (q31_t)0x806439C0, (q31_t)0xF5FF1317,
+	(q31_t)0x80683143, (q31_t)0xF5CCF743, (q31_t)0x806C3C73,
+	(q31_t)0xF59ADD01, (q31_t)0x80705B50, (q31_t)0xF568C45A,
+	(q31_t)0x80748DD9, (q31_t)0xF536AD55, (q31_t)0x8078D40D,
+	(q31_t)0xF50497FA, (q31_t)0x807D2DEB, (q31_t)0xF4D28451,
+	(q31_t)0x80819B74, (q31_t)0xF4A07260, (q31_t)0x80861CA5,
+	(q31_t)0xF46E6231, (q31_t)0x808AB180, (q31_t)0xF43C53CA,
+	(q31_t)0x808F5A02, (q31_t)0xF40A4734, (q31_t)0x8094162B,
+	(q31_t)0xF3D83C76, (q31_t)0x8098E5FB, (q31_t)0xF3A63398,
+	(q31_t)0x809DC970, (q31_t)0xF3742CA1, (q31_t)0x80A2C08B,
+	(q31_t)0xF342279A, (q31_t)0x80A7CB49, (q31_t)0xF310248A,
+	(q31_t)0x80ACE9AB, (q31_t)0xF2DE2378, (q31_t)0x80B21BAF,
+	(q31_t)0xF2AC246D, (q31_t)0x80B76155, (q31_t)0xF27A2770,
+	(q31_t)0x80BCBA9C, (q31_t)0xF2482C89, (q31_t)0x80C22783,
+	(q31_t)0xF21633C0, (q31_t)0x80C7A80A, (q31_t)0xF1E43D1C,
+	(q31_t)0x80CD3C2F, (q31_t)0xF1B248A5, (q31_t)0x80D2E3F1,
+	(q31_t)0xF1805662, (q31_t)0x80D89F51, (q31_t)0xF14E665C,
+	(q31_t)0x80DE6E4C, (q31_t)0xF11C789A, (q31_t)0x80E450E2,
+	(q31_t)0xF0EA8D23, (q31_t)0x80EA4712, (q31_t)0xF0B8A401,
+	(q31_t)0x80F050DB, (q31_t)0xF086BD39, (q31_t)0x80F66E3C,
+	(q31_t)0xF054D8D4, (q31_t)0x80FC9F35, (q31_t)0xF022F6DA,
+	(q31_t)0x8102E3C3, (q31_t)0xEFF11752, (q31_t)0x81093BE8,
+	(q31_t)0xEFBF3A44, (q31_t)0x810FA7A0, (q31_t)0xEF8D5FB8,
+	(q31_t)0x811626EC, (q31_t)0xEF5B87B5, (q31_t)0x811CB9CA,
+	(q31_t)0xEF29B243, (q31_t)0x81236039, (q31_t)0xEEF7DF6A,
+	(q31_t)0x812A1A39, (q31_t)0xEEC60F31, (q31_t)0x8130E7C8,
+	(q31_t)0xEE9441A0, (q31_t)0x8137C8E6, (q31_t)0xEE6276BF,
+	(q31_t)0x813EBD90, (q31_t)0xEE30AE95, (q31_t)0x8145C5C6,
+	(q31_t)0xEDFEE92B, (q31_t)0x814CE188, (q31_t)0xEDCD2687,
+	(q31_t)0x815410D3, (q31_t)0xED9B66B2, (q31_t)0x815B53A8,
+	(q31_t)0xED69A9B2, (q31_t)0x8162AA03, (q31_t)0xED37EF91,
+	(q31_t)0x816A13E6, (q31_t)0xED063855, (q31_t)0x8171914E,
+	(q31_t)0xECD48406, (q31_t)0x8179223A, (q31_t)0xECA2D2AC,
+	(q31_t)0x8180C6A9, (q31_t)0xEC71244F, (q31_t)0x81887E9A,
+	(q31_t)0xEC3F78F5, (q31_t)0x81904A0C, (q31_t)0xEC0DD0A8,
+	(q31_t)0x819828FD, (q31_t)0xEBDC2B6D, (q31_t)0x81A01B6C,
+	(q31_t)0xEBAA894E, (q31_t)0x81A82159, (q31_t)0xEB78EA52,
+	(q31_t)0x81B03AC1, (q31_t)0xEB474E80, (q31_t)0x81B867A4,
+	(q31_t)0xEB15B5E0, (q31_t)0x81C0A801, (q31_t)0xEAE4207A,
+	(q31_t)0x81C8FBD5, (q31_t)0xEAB28E55, (q31_t)0x81D16320,
+	(q31_t)0xEA80FF79, (q31_t)0x81D9DDE1, (q31_t)0xEA4F73EE,
+	(q31_t)0x81E26C16, (q31_t)0xEA1DEBBB, (q31_t)0x81EB0DBD,
+	(q31_t)0xE9EC66E8, (q31_t)0x81F3C2D7, (q31_t)0xE9BAE57C,
+	(q31_t)0x81FC8B60, (q31_t)0xE9896780, (q31_t)0x82056758,
+	(q31_t)0xE957ECFB, (q31_t)0x820E56BE, (q31_t)0xE92675F4,
+	(q31_t)0x8217598F, (q31_t)0xE8F50273, (q31_t)0x82206FCB,
+	(q31_t)0xE8C3927F, (q31_t)0x82299971, (q31_t)0xE8922621,
+	(q31_t)0x8232D67E, (q31_t)0xE860BD60, (q31_t)0x823C26F2,
+	(q31_t)0xE82F5844, (q31_t)0x82458ACB, (q31_t)0xE7FDF6D3,
+	(q31_t)0x824F0208, (q31_t)0xE7CC9917, (q31_t)0x82588CA6,
+	(q31_t)0xE79B3F16, (q31_t)0x82622AA5, (q31_t)0xE769E8D8,
+	(q31_t)0x826BDC04, (q31_t)0xE7389664, (q31_t)0x8275A0C0,
+	(q31_t)0xE70747C3, (q31_t)0x827F78D8, (q31_t)0xE6D5FCFC,
+	(q31_t)0x8289644A, (q31_t)0xE6A4B616, (q31_t)0x82936316,
+	(q31_t)0xE6737319, (q31_t)0x829D753A, (q31_t)0xE642340D,
+	(q31_t)0x82A79AB3, (q31_t)0xE610F8F9, (q31_t)0x82B1D381,
+	(q31_t)0xE5DFC1E4, (q31_t)0x82BC1FA1, (q31_t)0xE5AE8ED8,
+	(q31_t)0x82C67F13, (q31_t)0xE57D5FDA, (q31_t)0x82D0F1D5,
+	(q31_t)0xE54C34F3, (q31_t)0x82DB77E5, (q31_t)0xE51B0E2A,
+	(q31_t)0x82E61141, (q31_t)0xE4E9EB86, (q31_t)0x82F0BDE8,
+	(q31_t)0xE4B8CD10, (q31_t)0x82FB7DD8, (q31_t)0xE487B2CF,
+	(q31_t)0x8306510F, (q31_t)0xE4569CCB, (q31_t)0x8311378C,
+	(q31_t)0xE4258B0A, (q31_t)0x831C314E, (q31_t)0xE3F47D95,
+	(q31_t)0x83273E52, (q31_t)0xE3C37473, (q31_t)0x83325E97,
+	(q31_t)0xE3926FAC, (q31_t)0x833D921A, (q31_t)0xE3616F47,
+	(q31_t)0x8348D8DB, (q31_t)0xE330734C, (q31_t)0x835432D8,
+	(q31_t)0xE2FF7BC3, (q31_t)0x835FA00E, (q31_t)0xE2CE88B2,
+	(q31_t)0x836B207D, (q31_t)0xE29D9A22, (q31_t)0x8376B422,
+	(q31_t)0xE26CB01A, (q31_t)0x83825AFB, (q31_t)0xE23BCAA2,
+	(q31_t)0x838E1507, (q31_t)0xE20AE9C1, (q31_t)0x8399E244,
+	(q31_t)0xE1DA0D7E, (q31_t)0x83A5C2B0, (q31_t)0xE1A935E1,
+	(q31_t)0x83B1B649, (q31_t)0xE17862F3, (q31_t)0x83BDBD0D,
+	(q31_t)0xE14794B9, (q31_t)0x83C9D6FB, (q31_t)0xE116CB3D,
+	(q31_t)0x83D60411, (q31_t)0xE0E60684, (q31_t)0x83E2444D,
+	(q31_t)0xE0B54698, (q31_t)0x83EE97AC, (q31_t)0xE0848B7F,
+	(q31_t)0x83FAFE2E, (q31_t)0xE053D541, (q31_t)0x840777CF,
+	(q31_t)0xE02323E5, (q31_t)0x8414048F, (q31_t)0xDFF27773,
+	(q31_t)0x8420A46B, (q31_t)0xDFC1CFF2, (q31_t)0x842D5761,
+	(q31_t)0xDF912D6A, (q31_t)0x843A1D70, (q31_t)0xDF608FE3,
+	(q31_t)0x8446F695, (q31_t)0xDF2FF764, (q31_t)0x8453E2CE,
+	(q31_t)0xDEFF63F4, (q31_t)0x8460E21A, (q31_t)0xDECED59B,
+	(q31_t)0x846DF476, (q31_t)0xDE9E4C60, (q31_t)0x847B19E1,
+	(q31_t)0xDE6DC84B, (q31_t)0x84885257, (q31_t)0xDE3D4963,
+	(q31_t)0x84959DD9, (q31_t)0xDE0CCFB1, (q31_t)0x84A2FC62,
+	(q31_t)0xDDDC5B3A, (q31_t)0x84B06DF1, (q31_t)0xDDABEC07,
+	(q31_t)0x84BDF285, (q31_t)0xDD7B8220, (q31_t)0x84CB8A1B,
+	(q31_t)0xDD4B1D8B, (q31_t)0x84D934B0, (q31_t)0xDD1ABE51,
+	(q31_t)0x84E6F244, (q31_t)0xDCEA6478, (q31_t)0x84F4C2D3,
+	(q31_t)0xDCBA1008, (q31_t)0x8502A65C, (q31_t)0xDC89C108,
+	(q31_t)0x85109CDC, (q31_t)0xDC597781, (q31_t)0x851EA652,
+	(q31_t)0xDC293379, (q31_t)0x852CC2BA, (q31_t)0xDBF8F4F8,
+	(q31_t)0x853AF214, (q31_t)0xDBC8BC05, (q31_t)0x8549345C,
+	(q31_t)0xDB9888A8, (q31_t)0x85578991, (q31_t)0xDB685AE8,
+	(q31_t)0x8565F1B0, (q31_t)0xDB3832CD, (q31_t)0x85746CB7,
+	(q31_t)0xDB08105E, (q31_t)0x8582FAA4, (q31_t)0xDAD7F3A2,
+	(q31_t)0x85919B75, (q31_t)0xDAA7DCA1, (q31_t)0x85A04F28,
+	(q31_t)0xDA77CB62, (q31_t)0x85AF15B9, (q31_t)0xDA47BFED,
+	(q31_t)0x85BDEF27, (q31_t)0xDA17BA4A, (q31_t)0x85CCDB70,
+	(q31_t)0xD9E7BA7E, (q31_t)0x85DBDA91, (q31_t)0xD9B7C093,
+	(q31_t)0x85EAEC88, (q31_t)0xD987CC8F, (q31_t)0x85FA1152,
+	(q31_t)0xD957DE7A, (q31_t)0x860948EE, (q31_t)0xD927F65B,
+	(q31_t)0x86189359, (q31_t)0xD8F81439, (q31_t)0x8627F090,
+	(q31_t)0xD8C8381C, (q31_t)0x86376092, (q31_t)0xD898620C,
+	(q31_t)0x8646E35B, (q31_t)0xD868920F, (q31_t)0x865678EA,
+	(q31_t)0xD838C82D, (q31_t)0x8666213C, (q31_t)0xD809046D,
+	(q31_t)0x8675DC4E, (q31_t)0xD7D946D7, (q31_t)0x8685AA1F,
+	(q31_t)0xD7A98F73, (q31_t)0x86958AAB, (q31_t)0xD779DE46,
+	(q31_t)0x86A57DF1, (q31_t)0xD74A335A, (q31_t)0x86B583EE,
+	(q31_t)0xD71A8EB5, (q31_t)0x86C59C9F, (q31_t)0xD6EAF05E,
+	(q31_t)0x86D5C802, (q31_t)0xD6BB585D, (q31_t)0x86E60614,
+	(q31_t)0xD68BC6BA, (q31_t)0x86F656D3, (q31_t)0xD65C3B7B,
+	(q31_t)0x8706BA3C, (q31_t)0xD62CB6A7, (q31_t)0x8717304E,
+	(q31_t)0xD5FD3847, (q31_t)0x8727B904, (q31_t)0xD5CDC062,
+	(q31_t)0x8738545E, (q31_t)0xD59E4EFE, (q31_t)0x87490257,
+	(q31_t)0xD56EE424, (q31_t)0x8759C2EF, (q31_t)0xD53F7FDA,
+	(q31_t)0x876A9621, (q31_t)0xD5102227, (q31_t)0x877B7BEC,
+	(q31_t)0xD4E0CB14, (q31_t)0x878C744C, (q31_t)0xD4B17AA7,
+	(q31_t)0x879D7F40, (q31_t)0xD48230E8, (q31_t)0x87AE9CC5,
+	(q31_t)0xD452EDDE, (q31_t)0x87BFCCD7, (q31_t)0xD423B190,
+	(q31_t)0x87D10F75, (q31_t)0xD3F47C06, (q31_t)0x87E2649B,
+	(q31_t)0xD3C54D46, (q31_t)0x87F3CC47, (q31_t)0xD3962559,
+	(q31_t)0x88054677, (q31_t)0xD3670445, (q31_t)0x8816D327,
+	(q31_t)0xD337EA12, (q31_t)0x88287255, (q31_t)0xD308D6C6,
+	(q31_t)0x883A23FE, (q31_t)0xD2D9CA6A, (q31_t)0x884BE820,
+	(q31_t)0xD2AAC504, (q31_t)0x885DBEB7, (q31_t)0xD27BC69C,
+	(q31_t)0x886FA7C2, (q31_t)0xD24CCF38, (q31_t)0x8881A33C,
+	(q31_t)0xD21DDEE1, (q31_t)0x8893B124, (q31_t)0xD1EEF59E,
+	(q31_t)0x88A5D177, (q31_t)0xD1C01374, (q31_t)0x88B80431,
+	(q31_t)0xD191386D, (q31_t)0x88CA4951, (q31_t)0xD162648F,
+	(q31_t)0x88DCA0D3, (q31_t)0xD13397E1, (q31_t)0x88EF0AB4,
+	(q31_t)0xD104D26B, (q31_t)0x890186F1, (q31_t)0xD0D61433,
+	(q31_t)0x89141589, (q31_t)0xD0A75D42, (q31_t)0x8926B677,
+	(q31_t)0xD078AD9D, (q31_t)0x893969B9, (q31_t)0xD04A054D,
+	(q31_t)0x894C2F4C, (q31_t)0xD01B6459, (q31_t)0x895F072D,
+	(q31_t)0xCFECCAC7, (q31_t)0x8971F15A, (q31_t)0xCFBE389F,
+	(q31_t)0x8984EDCF, (q31_t)0xCF8FADE8, (q31_t)0x8997FC89,
+	(q31_t)0xCF612AAA, (q31_t)0x89AB1D86, (q31_t)0xCF32AEEB,
+	(q31_t)0x89BE50C3, (q31_t)0xCF043AB2, (q31_t)0x89D1963C,
+	(q31_t)0xCED5CE08, (q31_t)0x89E4EDEE, (q31_t)0xCEA768F2,
+	(q31_t)0x89F857D8, (q31_t)0xCE790B78, (q31_t)0x8A0BD3F5,
+	(q31_t)0xCE4AB5A2, (q31_t)0x8A1F6242, (q31_t)0xCE1C6776,
+	(q31_t)0x8A3302BD, (q31_t)0xCDEE20FC, (q31_t)0x8A46B563,
+	(q31_t)0xCDBFE23A, (q31_t)0x8A5A7A30, (q31_t)0xCD91AB38,
+	(q31_t)0x8A6E5122, (q31_t)0xCD637BFD, (q31_t)0x8A823A35,
+	(q31_t)0xCD355490, (q31_t)0x8A963567, (q31_t)0xCD0734F8,
+	(q31_t)0x8AAA42B4, (q31_t)0xCCD91D3D, (q31_t)0x8ABE6219,
+	(q31_t)0xCCAB0D65, (q31_t)0x8AD29393, (q31_t)0xCC7D0577,
+	(q31_t)0x8AE6D71F, (q31_t)0xCC4F057B, (q31_t)0x8AFB2CBA,
+	(q31_t)0xCC210D78, (q31_t)0x8B0F9461, (q31_t)0xCBF31D75,
+	(q31_t)0x8B240E10, (q31_t)0xCBC53578, (q31_t)0x8B3899C5,
+	(q31_t)0xCB975589, (q31_t)0x8B4D377C, (q31_t)0xCB697DB0,
+	(q31_t)0x8B61E732, (q31_t)0xCB3BADF2, (q31_t)0x8B76A8E4,
+	(q31_t)0xCB0DE658, (q31_t)0x8B8B7C8F, (q31_t)0xCAE026E8,
+	(q31_t)0x8BA0622F, (q31_t)0xCAB26FA9, (q31_t)0x8BB559C1,
+	(q31_t)0xCA84C0A2, (q31_t)0x8BCA6342, (q31_t)0xCA5719DB,
+	(q31_t)0x8BDF7EAF, (q31_t)0xCA297B5A, (q31_t)0x8BF4AC05,
+	(q31_t)0xC9FBE527, (q31_t)0x8C09EB40, (q31_t)0xC9CE5748,
+	(q31_t)0x8C1F3C5C, (q31_t)0xC9A0D1C4, (q31_t)0x8C349F58,
+	(q31_t)0xC97354A3, (q31_t)0x8C4A142F, (q31_t)0xC945DFEC,
+	(q31_t)0x8C5F9ADD, (q31_t)0xC91873A5, (q31_t)0x8C753361,
+	(q31_t)0xC8EB0FD6, (q31_t)0x8C8ADDB6, (q31_t)0xC8BDB485,
+	(q31_t)0x8CA099D9, (q31_t)0xC89061BA, (q31_t)0x8CB667C7,
+	(q31_t)0xC863177B, (q31_t)0x8CCC477D, (q31_t)0xC835D5D0,
+	(q31_t)0x8CE238F6, (q31_t)0xC8089CBF, (q31_t)0x8CF83C30,
+	(q31_t)0xC7DB6C50, (q31_t)0x8D0E5127, (q31_t)0xC7AE4489,
+	(q31_t)0x8D2477D8, (q31_t)0xC7812571, (q31_t)0x8D3AB03F,
+	(q31_t)0xC7540F10, (q31_t)0x8D50FA59, (q31_t)0xC727016C,
+	(q31_t)0x8D675623, (q31_t)0xC6F9FC8D, (q31_t)0x8D7DC399,
+	(q31_t)0xC6CD0079, (q31_t)0x8D9442B7, (q31_t)0xC6A00D36,
+	(q31_t)0x8DAAD37B, (q31_t)0xC67322CD, (q31_t)0x8DC175E0,
+	(q31_t)0xC6464144, (q31_t)0x8DD829E4, (q31_t)0xC61968A2,
+	(q31_t)0x8DEEEF82, (q31_t)0xC5EC98ED, (q31_t)0x8E05C6B7,
+	(q31_t)0xC5BFD22E, (q31_t)0x8E1CAF80, (q31_t)0xC593146A,
+	(q31_t)0x8E33A9D9, (q31_t)0xC5665FA8, (q31_t)0x8E4AB5BF,
+	(q31_t)0xC539B3F0, (q31_t)0x8E61D32D, (q31_t)0xC50D1148,
+	(q31_t)0x8E790222, (q31_t)0xC4E077B8, (q31_t)0x8E904298,
+	(q31_t)0xC4B3E746, (q31_t)0x8EA7948C, (q31_t)0xC4875FF8,
+	(q31_t)0x8EBEF7FB, (q31_t)0xC45AE1D7, (q31_t)0x8ED66CE1,
+	(q31_t)0xC42E6CE8, (q31_t)0x8EEDF33B, (q31_t)0xC4020132,
+	(q31_t)0x8F058B04, (q31_t)0xC3D59EBD, (q31_t)0x8F1D343A,
+	(q31_t)0xC3A9458F, (q31_t)0x8F34EED8, (q31_t)0xC37CF5B0,
+	(q31_t)0x8F4CBADB, (q31_t)0xC350AF25, (q31_t)0x8F64983F,
+	(q31_t)0xC32471F6, (q31_t)0x8F7C8701, (q31_t)0xC2F83E2A,
+	(q31_t)0x8F94871D, (q31_t)0xC2CC13C7, (q31_t)0x8FAC988E,
+	(q31_t)0xC29FF2D4, (q31_t)0x8FC4BB53, (q31_t)0xC273DB58,
+	(q31_t)0x8FDCEF66, (q31_t)0xC247CD5A, (q31_t)0x8FF534C4,
+	(q31_t)0xC21BC8E0, (q31_t)0x900D8B69, (q31_t)0xC1EFCDF2,
+	(q31_t)0x9025F352, (q31_t)0xC1C3DC96, (q31_t)0x903E6C7A,
+	(q31_t)0xC197F4D3, (q31_t)0x9056F6DF, (q31_t)0xC16C16B0,
+	(q31_t)0x906F927B, (q31_t)0xC1404233, (q31_t)0x90883F4C,
+	(q31_t)0xC1147763, (q31_t)0x90A0FD4E, (q31_t)0xC0E8B648,
+	(q31_t)0x90B9CC7C, (q31_t)0xC0BCFEE7, (q31_t)0x90D2ACD3,
+	(q31_t)0xC0915147, (q31_t)0x90EB9E50, (q31_t)0xC065AD70,
+	(q31_t)0x9104A0ED, (q31_t)0xC03A1368, (q31_t)0x911DB4A8,
+	(q31_t)0xC00E8335, (q31_t)0x9136D97D, (q31_t)0xBFE2FCDF,
+	(q31_t)0x91500F67, (q31_t)0xBFB7806C, (q31_t)0x91695663,
+	(q31_t)0xBF8C0DE2, (q31_t)0x9182AE6C, (q31_t)0xBF60A54A,
+	(q31_t)0x919C1780, (q31_t)0xBF3546A8, (q31_t)0x91B5919A,
+	(q31_t)0xBF09F204, (q31_t)0x91CF1CB6, (q31_t)0xBEDEA765,
+	(q31_t)0x91E8B8D0, (q31_t)0xBEB366D1, (q31_t)0x920265E4,
+	(q31_t)0xBE88304F, (q31_t)0x921C23EE, (q31_t)0xBE5D03E5,
+	(q31_t)0x9235F2EB, (q31_t)0xBE31E19B, (q31_t)0x924FD2D6,
+	(q31_t)0xBE06C977, (q31_t)0x9269C3AC, (q31_t)0xBDDBBB7F,
+	(q31_t)0x9283C567, (q31_t)0xBDB0B7BA, (q31_t)0x929DD805,
+	(q31_t)0xBD85BE2F, (q31_t)0x92B7FB82, (q31_t)0xBD5ACEE5,
+	(q31_t)0x92D22FD8, (q31_t)0xBD2FE9E1, (q31_t)0x92EC7505,
+	(q31_t)0xBD050F2C, (q31_t)0x9306CB04, (q31_t)0xBCDA3ECA,
+	(q31_t)0x932131D1, (q31_t)0xBCAF78C3, (q31_t)0x933BA968,
+	(q31_t)0xBC84BD1E, (q31_t)0x935631C5, (q31_t)0xBC5A0BE1,
+	(q31_t)0x9370CAE4, (q31_t)0xBC2F6513, (q31_t)0x938B74C0,
+	(q31_t)0xBC04C8BA, (q31_t)0x93A62F56, (q31_t)0xBBDA36DC,
+	(q31_t)0x93C0FAA2, (q31_t)0xBBAFAF81, (q31_t)0x93DBD69F,
+	(q31_t)0xBB8532AF, (q31_t)0x93F6C34A, (q31_t)0xBB5AC06C,
+	(q31_t)0x9411C09D, (q31_t)0xBB3058C0, (q31_t)0x942CCE95,
+	(q31_t)0xBB05FBB0, (q31_t)0x9447ED2F, (q31_t)0xBADBA943,
+	(q31_t)0x94631C64, (q31_t)0xBAB1617F, (q31_t)0x947E5C32,
+	(q31_t)0xBA87246C, (q31_t)0x9499AC95, (q31_t)0xBA5CF210,
+	(q31_t)0x94B50D87, (q31_t)0xBA32CA70, (q31_t)0x94D07F05,
+	(q31_t)0xBA08AD94, (q31_t)0x94EC010B, (q31_t)0xB9DE9B83,
+	(q31_t)0x95079393, (q31_t)0xB9B49442, (q31_t)0x9523369B,
+	(q31_t)0xB98A97D8, (q31_t)0x953EEA1E, (q31_t)0xB960A64B,
+	(q31_t)0x955AAE17, (q31_t)0xB936BFA3, (q31_t)0x95768282,
+	(q31_t)0xB90CE3E6, (q31_t)0x9592675B, (q31_t)0xB8E31319,
+	(q31_t)0x95AE5C9E, (q31_t)0xB8B94D44, (q31_t)0x95CA6246,
+	(q31_t)0xB88F926C, (q31_t)0x95E6784F, (q31_t)0xB865E299,
+	(q31_t)0x96029EB5, (q31_t)0xB83C3DD1, (q31_t)0x961ED573,
+	(q31_t)0xB812A419, (q31_t)0x963B1C85, (q31_t)0xB7E9157A,
+	(q31_t)0x965773E7, (q31_t)0xB7BF91F8, (q31_t)0x9673DB94,
+	(q31_t)0xB796199B, (q31_t)0x96905387, (q31_t)0xB76CAC68,
+	(q31_t)0x96ACDBBD, (q31_t)0xB7434A67, (q31_t)0x96C97431,
+	(q31_t)0xB719F39D, (q31_t)0x96E61CDF, (q31_t)0xB6F0A811,
+	(q31_t)0x9702D5C2, (q31_t)0xB6C767CA, (q31_t)0x971F9ED6,
+	(q31_t)0xB69E32CD, (q31_t)0x973C7816, (q31_t)0xB6750921,
+	(q31_t)0x9759617E, (q31_t)0xB64BEACC, (q31_t)0x97765B0A,
+	(q31_t)0xB622D7D5, (q31_t)0x979364B5, (q31_t)0xB5F9D042,
+	(q31_t)0x97B07E7A, (q31_t)0xB5D0D41A, (q31_t)0x97CDA855,
+	(q31_t)0xB5A7E362, (q31_t)0x97EAE241, (q31_t)0xB57EFE21,
+	(q31_t)0x98082C3B, (q31_t)0xB556245E, (q31_t)0x9825863D,
+	(q31_t)0xB52D561E, (q31_t)0x9842F043, (q31_t)0xB5049368,
+	(q31_t)0x98606A48, (q31_t)0xB4DBDC42, (q31_t)0x987DF449,
+	(q31_t)0xB4B330B2, (q31_t)0x989B8E3F, (q31_t)0xB48A90C0,
+	(q31_t)0x98B93828, (q31_t)0xB461FC70, (q31_t)0x98D6F1FE,
+	(q31_t)0xB43973C9, (q31_t)0x98F4BBBC, (q31_t)0xB410F6D2,
+	(q31_t)0x9912955E, (q31_t)0xB3E88591, (q31_t)0x99307EE0,
+	(q31_t)0xB3C0200C, (q31_t)0x994E783C, (q31_t)0xB397C649,
+	(q31_t)0x996C816F, (q31_t)0xB36F784E, (q31_t)0x998A9A73,
+	(q31_t)0xB3473622, (q31_t)0x99A8C344, (q31_t)0xB31EFFCB,
+	(q31_t)0x99C6FBDE, (q31_t)0xB2F6D54F, (q31_t)0x99E5443A,
+	(q31_t)0xB2CEB6B5, (q31_t)0x9A039C56, (q31_t)0xB2A6A401,
+	(q31_t)0x9A22042C, (q31_t)0xB27E9D3B, (q31_t)0x9A407BB8,
+	(q31_t)0xB256A26A, (q31_t)0x9A5F02F5, (q31_t)0xB22EB392,
+	(q31_t)0x9A7D99DD, (q31_t)0xB206D0BA, (q31_t)0x9A9C406D,
+	(q31_t)0xB1DEF9E8, (q31_t)0x9ABAF6A0, (q31_t)0xB1B72F23,
+	(q31_t)0x9AD9BC71, (q31_t)0xB18F7070, (q31_t)0x9AF891DB,
+	(q31_t)0xB167BDD6, (q31_t)0x9B1776D9, (q31_t)0xB140175B,
+	(q31_t)0x9B366B67, (q31_t)0xB1187D05, (q31_t)0x9B556F80,
+	(q31_t)0xB0F0EEDA, (q31_t)0x9B748320, (q31_t)0xB0C96CDF,
+	(q31_t)0x9B93A640, (q31_t)0xB0A1F71C, (q31_t)0x9BB2D8DD,
+	(q31_t)0xB07A8D97, (q31_t)0x9BD21AF2, (q31_t)0xB0533055,
+	(q31_t)0x9BF16C7A, (q31_t)0xB02BDF5C, (q31_t)0x9C10CD70,
+	(q31_t)0xB0049AB2, (q31_t)0x9C303DCF, (q31_t)0xAFDD625F,
+	(q31_t)0x9C4FBD92, (q31_t)0xAFB63667, (q31_t)0x9C6F4CB5,
+	(q31_t)0xAF8F16D0, (q31_t)0x9C8EEB33, (q31_t)0xAF6803A1,
+	(q31_t)0x9CAE9907, (q31_t)0xAF40FCE0, (q31_t)0x9CCE562B,
+	(q31_t)0xAF1A0293, (q31_t)0x9CEE229C, (q31_t)0xAEF314BF,
+	(q31_t)0x9D0DFE53, (q31_t)0xAECC336B, (q31_t)0x9D2DE94D,
+	(q31_t)0xAEA55E9D, (q31_t)0x9D4DE384, (q31_t)0xAE7E965B,
+	(q31_t)0x9D6DECF4, (q31_t)0xAE57DAAA, (q31_t)0x9D8E0596,
+	(q31_t)0xAE312B91, (q31_t)0x9DAE2D68, (q31_t)0xAE0A8916,
+	(q31_t)0x9DCE6462, (q31_t)0xADE3F33E, (q31_t)0x9DEEAA82,
+	(q31_t)0xADBD6A10, (q31_t)0x9E0EFFC1, (q31_t)0xAD96ED91,
+	(q31_t)0x9E2F641A, (q31_t)0xAD707DC8, (q31_t)0x9E4FD789,
+	(q31_t)0xAD4A1ABA, (q31_t)0x9E705A09, (q31_t)0xAD23C46D,
+	(q31_t)0x9E90EB94, (q31_t)0xACFD7AE8, (q31_t)0x9EB18C26,
+	(q31_t)0xACD73E30, (q31_t)0x9ED23BB9, (q31_t)0xACB10E4A,
+	(q31_t)0x9EF2FA48, (q31_t)0xAC8AEB3E, (q31_t)0x9F13C7D0,
+	(q31_t)0xAC64D510, (q31_t)0x9F34A449, (q31_t)0xAC3ECBC7,
+	(q31_t)0x9F558FB0, (q31_t)0xAC18CF68, (q31_t)0x9F7689FF,
+	(q31_t)0xABF2DFFA, (q31_t)0x9F979331, (q31_t)0xABCCFD82,
+	(q31_t)0x9FB8AB41, (q31_t)0xABA72806, (q31_t)0x9FD9D22A,
+	(q31_t)0xAB815F8C, (q31_t)0x9FFB07E7, (q31_t)0xAB5BA41A,
+	(q31_t)0xA01C4C72, (q31_t)0xAB35F5B5, (q31_t)0xA03D9FC7,
+	(q31_t)0xAB105464, (q31_t)0xA05F01E1, (q31_t)0xAAEAC02B,
+	(q31_t)0xA08072BA, (q31_t)0xAAC53912, (q31_t)0xA0A1F24C,
+	(q31_t)0xAA9FBF1D, (q31_t)0xA0C38094, (q31_t)0xAA7A5253,
+	(q31_t)0xA0E51D8C, (q31_t)0xAA54F2B9, (q31_t)0xA106C92E,
+	(q31_t)0xAA2FA055, (q31_t)0xA1288376, (q31_t)0xAA0A5B2D,
+	(q31_t)0xA14A4C5E, (q31_t)0xA9E52347, (q31_t)0xA16C23E1,
+	(q31_t)0xA9BFF8A8, (q31_t)0xA18E09F9, (q31_t)0xA99ADB56,
+	(q31_t)0xA1AFFEA2, (q31_t)0xA975CB56, (q31_t)0xA1D201D7,
+	(q31_t)0xA950C8AF, (q31_t)0xA1F41391, (q31_t)0xA92BD366,
+	(q31_t)0xA21633CD, (q31_t)0xA906EB81, (q31_t)0xA2386283,
+	(q31_t)0xA8E21106, (q31_t)0xA25A9FB1, (q31_t)0xA8BD43FA,
+	(q31_t)0xA27CEB4F, (q31_t)0xA8988463, (q31_t)0xA29F4559,
+	(q31_t)0xA873D246, (q31_t)0xA2C1ADC9, (q31_t)0xA84F2DA9,
+	(q31_t)0xA2E4249A, (q31_t)0xA82A9693, (q31_t)0xA306A9C7,
+	(q31_t)0xA8060D08, (q31_t)0xA3293D4B, (q31_t)0xA7E1910E,
+	(q31_t)0xA34BDF20, (q31_t)0xA7BD22AB, (q31_t)0xA36E8F40,
+	(q31_t)0xA798C1E4, (q31_t)0xA3914DA7, (q31_t)0xA7746EC0,
+	(q31_t)0xA3B41A4F, (q31_t)0xA7502943, (q31_t)0xA3D6F533,
+	(q31_t)0xA72BF173, (q31_t)0xA3F9DE4D, (q31_t)0xA707C756,
+	(q31_t)0xA41CD598, (q31_t)0xA6E3AAF2, (q31_t)0xA43FDB0F,
+	(q31_t)0xA6BF9C4B, (q31_t)0xA462EEAC, (q31_t)0xA69B9B68,
+	(q31_t)0xA4861069, (q31_t)0xA677A84E, (q31_t)0xA4A94042,
+	(q31_t)0xA653C302, (q31_t)0xA4CC7E31, (q31_t)0xA62FEB8B,
+	(q31_t)0xA4EFCA31, (q31_t)0xA60C21ED, (q31_t)0xA513243B,
+	(q31_t)0xA5E8662F, (q31_t)0xA5368C4B, (q31_t)0xA5C4B855,
+	(q31_t)0xA55A025B, (q31_t)0xA5A11865, (q31_t)0xA57D8666,
+	(q31_t)0xA57D8666, (q31_t)0xA5A11865, (q31_t)0xA55A025B,
+	(q31_t)0xA5C4B855, (q31_t)0xA5368C4B, (q31_t)0xA5E8662F,
+	(q31_t)0xA513243B, (q31_t)0xA60C21ED, (q31_t)0xA4EFCA31,
+	(q31_t)0xA62FEB8B, (q31_t)0xA4CC7E31, (q31_t)0xA653C302,
+	(q31_t)0xA4A94042, (q31_t)0xA677A84E, (q31_t)0xA4861069,
+	(q31_t)0xA69B9B68, (q31_t)0xA462EEAC, (q31_t)0xA6BF9C4B,
+	(q31_t)0xA43FDB0F, (q31_t)0xA6E3AAF2, (q31_t)0xA41CD598,
+	(q31_t)0xA707C756, (q31_t)0xA3F9DE4D, (q31_t)0xA72BF173,
+	(q31_t)0xA3D6F533, (q31_t)0xA7502943, (q31_t)0xA3B41A4F,
+	(q31_t)0xA7746EC0, (q31_t)0xA3914DA7, (q31_t)0xA798C1E4,
+	(q31_t)0xA36E8F40, (q31_t)0xA7BD22AB, (q31_t)0xA34BDF20,
+	(q31_t)0xA7E1910E, (q31_t)0xA3293D4B, (q31_t)0xA8060D08,
+	(q31_t)0xA306A9C7, (q31_t)0xA82A9693, (q31_t)0xA2E4249A,
+	(q31_t)0xA84F2DA9, (q31_t)0xA2C1ADC9, (q31_t)0xA873D246,
+	(q31_t)0xA29F4559, (q31_t)0xA8988463, (q31_t)0xA27CEB4F,
+	(q31_t)0xA8BD43FA, (q31_t)0xA25A9FB1, (q31_t)0xA8E21106,
+	(q31_t)0xA2386283, (q31_t)0xA906EB81, (q31_t)0xA21633CD,
+	(q31_t)0xA92BD366, (q31_t)0xA1F41391, (q31_t)0xA950C8AF,
+	(q31_t)0xA1D201D7, (q31_t)0xA975CB56, (q31_t)0xA1AFFEA2,
+	(q31_t)0xA99ADB56, (q31_t)0xA18E09F9, (q31_t)0xA9BFF8A8,
+	(q31_t)0xA16C23E1, (q31_t)0xA9E52347, (q31_t)0xA14A4C5E,
+	(q31_t)0xAA0A5B2D, (q31_t)0xA1288376, (q31_t)0xAA2FA055,
+	(q31_t)0xA106C92E, (q31_t)0xAA54F2B9, (q31_t)0xA0E51D8C,
+	(q31_t)0xAA7A5253, (q31_t)0xA0C38094, (q31_t)0xAA9FBF1D,
+	(q31_t)0xA0A1F24C, (q31_t)0xAAC53912, (q31_t)0xA08072BA,
+	(q31_t)0xAAEAC02B, (q31_t)0xA05F01E1, (q31_t)0xAB105464,
+	(q31_t)0xA03D9FC7, (q31_t)0xAB35F5B5, (q31_t)0xA01C4C72,
+	(q31_t)0xAB5BA41A, (q31_t)0x9FFB07E7, (q31_t)0xAB815F8C,
+	(q31_t)0x9FD9D22A, (q31_t)0xABA72806, (q31_t)0x9FB8AB41,
+	(q31_t)0xABCCFD82, (q31_t)0x9F979331, (q31_t)0xABF2DFFA,
+	(q31_t)0x9F7689FF, (q31_t)0xAC18CF68, (q31_t)0x9F558FB0,
+	(q31_t)0xAC3ECBC7, (q31_t)0x9F34A449, (q31_t)0xAC64D510,
+	(q31_t)0x9F13C7D0, (q31_t)0xAC8AEB3E, (q31_t)0x9EF2FA48,
+	(q31_t)0xACB10E4A, (q31_t)0x9ED23BB9, (q31_t)0xACD73E30,
+	(q31_t)0x9EB18C26, (q31_t)0xACFD7AE8, (q31_t)0x9E90EB94,
+	(q31_t)0xAD23C46D, (q31_t)0x9E705A09, (q31_t)0xAD4A1ABA,
+	(q31_t)0x9E4FD789, (q31_t)0xAD707DC8, (q31_t)0x9E2F641A,
+	(q31_t)0xAD96ED91, (q31_t)0x9E0EFFC1, (q31_t)0xADBD6A10,
+	(q31_t)0x9DEEAA82, (q31_t)0xADE3F33E, (q31_t)0x9DCE6462,
+	(q31_t)0xAE0A8916, (q31_t)0x9DAE2D68, (q31_t)0xAE312B91,
+	(q31_t)0x9D8E0596, (q31_t)0xAE57DAAA, (q31_t)0x9D6DECF4,
+	(q31_t)0xAE7E965B, (q31_t)0x9D4DE384, (q31_t)0xAEA55E9D,
+	(q31_t)0x9D2DE94D, (q31_t)0xAECC336B, (q31_t)0x9D0DFE53,
+	(q31_t)0xAEF314BF, (q31_t)0x9CEE229C, (q31_t)0xAF1A0293,
+	(q31_t)0x9CCE562B, (q31_t)0xAF40FCE0, (q31_t)0x9CAE9907,
+	(q31_t)0xAF6803A1, (q31_t)0x9C8EEB33, (q31_t)0xAF8F16D0,
+	(q31_t)0x9C6F4CB5, (q31_t)0xAFB63667, (q31_t)0x9C4FBD92,
+	(q31_t)0xAFDD625F, (q31_t)0x9C303DCF, (q31_t)0xB0049AB2,
+	(q31_t)0x9C10CD70, (q31_t)0xB02BDF5C, (q31_t)0x9BF16C7A,
+	(q31_t)0xB0533055, (q31_t)0x9BD21AF2, (q31_t)0xB07A8D97,
+	(q31_t)0x9BB2D8DD, (q31_t)0xB0A1F71C, (q31_t)0x9B93A640,
+	(q31_t)0xB0C96CDF, (q31_t)0x9B748320, (q31_t)0xB0F0EEDA,
+	(q31_t)0x9B556F80, (q31_t)0xB1187D05, (q31_t)0x9B366B67,
+	(q31_t)0xB140175B, (q31_t)0x9B1776D9, (q31_t)0xB167BDD6,
+	(q31_t)0x9AF891DB, (q31_t)0xB18F7070, (q31_t)0x9AD9BC71,
+	(q31_t)0xB1B72F23, (q31_t)0x9ABAF6A0, (q31_t)0xB1DEF9E8,
+	(q31_t)0x9A9C406D, (q31_t)0xB206D0BA, (q31_t)0x9A7D99DD,
+	(q31_t)0xB22EB392, (q31_t)0x9A5F02F5, (q31_t)0xB256A26A,
+	(q31_t)0x9A407BB8, (q31_t)0xB27E9D3B, (q31_t)0x9A22042C,
+	(q31_t)0xB2A6A401, (q31_t)0x9A039C56, (q31_t)0xB2CEB6B5,
+	(q31_t)0x99E5443A, (q31_t)0xB2F6D54F, (q31_t)0x99C6FBDE,
+	(q31_t)0xB31EFFCB, (q31_t)0x99A8C344, (q31_t)0xB3473622,
+	(q31_t)0x998A9A73, (q31_t)0xB36F784E, (q31_t)0x996C816F,
+	(q31_t)0xB397C649, (q31_t)0x994E783C, (q31_t)0xB3C0200C,
+	(q31_t)0x99307EE0, (q31_t)0xB3E88591, (q31_t)0x9912955E,
+	(q31_t)0xB410F6D2, (q31_t)0x98F4BBBC, (q31_t)0xB43973C9,
+	(q31_t)0x98D6F1FE, (q31_t)0xB461FC70, (q31_t)0x98B93828,
+	(q31_t)0xB48A90C0, (q31_t)0x989B8E3F, (q31_t)0xB4B330B2,
+	(q31_t)0x987DF449, (q31_t)0xB4DBDC42, (q31_t)0x98606A48,
+	(q31_t)0xB5049368, (q31_t)0x9842F043, (q31_t)0xB52D561E,
+	(q31_t)0x9825863D, (q31_t)0xB556245E, (q31_t)0x98082C3B,
+	(q31_t)0xB57EFE21, (q31_t)0x97EAE241, (q31_t)0xB5A7E362,
+	(q31_t)0x97CDA855, (q31_t)0xB5D0D41A, (q31_t)0x97B07E7A,
+	(q31_t)0xB5F9D042, (q31_t)0x979364B5, (q31_t)0xB622D7D5,
+	(q31_t)0x97765B0A, (q31_t)0xB64BEACC, (q31_t)0x9759617E,
+	(q31_t)0xB6750921, (q31_t)0x973C7816, (q31_t)0xB69E32CD,
+	(q31_t)0x971F9ED6, (q31_t)0xB6C767CA, (q31_t)0x9702D5C2,
+	(q31_t)0xB6F0A811, (q31_t)0x96E61CDF, (q31_t)0xB719F39D,
+	(q31_t)0x96C97431, (q31_t)0xB7434A67, (q31_t)0x96ACDBBD,
+	(q31_t)0xB76CAC68, (q31_t)0x96905387, (q31_t)0xB796199B,
+	(q31_t)0x9673DB94, (q31_t)0xB7BF91F8, (q31_t)0x965773E7,
+	(q31_t)0xB7E9157A, (q31_t)0x963B1C85, (q31_t)0xB812A419,
+	(q31_t)0x961ED573, (q31_t)0xB83C3DD1, (q31_t)0x96029EB5,
+	(q31_t)0xB865E299, (q31_t)0x95E6784F, (q31_t)0xB88F926C,
+	(q31_t)0x95CA6246, (q31_t)0xB8B94D44, (q31_t)0x95AE5C9E,
+	(q31_t)0xB8E31319, (q31_t)0x9592675B, (q31_t)0xB90CE3E6,
+	(q31_t)0x95768282, (q31_t)0xB936BFA3, (q31_t)0x955AAE17,
+	(q31_t)0xB960A64B, (q31_t)0x953EEA1E, (q31_t)0xB98A97D8,
+	(q31_t)0x9523369B, (q31_t)0xB9B49442, (q31_t)0x95079393,
+	(q31_t)0xB9DE9B83, (q31_t)0x94EC010B, (q31_t)0xBA08AD94,
+	(q31_t)0x94D07F05, (q31_t)0xBA32CA70, (q31_t)0x94B50D87,
+	(q31_t)0xBA5CF210, (q31_t)0x9499AC95, (q31_t)0xBA87246C,
+	(q31_t)0x947E5C32, (q31_t)0xBAB1617F, (q31_t)0x94631C64,
+	(q31_t)0xBADBA943, (q31_t)0x9447ED2F, (q31_t)0xBB05FBB0,
+	(q31_t)0x942CCE95, (q31_t)0xBB3058C0, (q31_t)0x9411C09D,
+	(q31_t)0xBB5AC06C, (q31_t)0x93F6C34A, (q31_t)0xBB8532AF,
+	(q31_t)0x93DBD69F, (q31_t)0xBBAFAF81, (q31_t)0x93C0FAA2,
+	(q31_t)0xBBDA36DC, (q31_t)0x93A62F56, (q31_t)0xBC04C8BA,
+	(q31_t)0x938B74C0, (q31_t)0xBC2F6513, (q31_t)0x9370CAE4,
+	(q31_t)0xBC5A0BE1, (q31_t)0x935631C5, (q31_t)0xBC84BD1E,
+	(q31_t)0x933BA968, (q31_t)0xBCAF78C3, (q31_t)0x932131D1,
+	(q31_t)0xBCDA3ECA, (q31_t)0x9306CB04, (q31_t)0xBD050F2C,
+	(q31_t)0x92EC7505, (q31_t)0xBD2FE9E1, (q31_t)0x92D22FD8,
+	(q31_t)0xBD5ACEE5, (q31_t)0x92B7FB82, (q31_t)0xBD85BE2F,
+	(q31_t)0x929DD805, (q31_t)0xBDB0B7BA, (q31_t)0x9283C567,
+	(q31_t)0xBDDBBB7F, (q31_t)0x9269C3AC, (q31_t)0xBE06C977,
+	(q31_t)0x924FD2D6, (q31_t)0xBE31E19B, (q31_t)0x9235F2EB,
+	(q31_t)0xBE5D03E5, (q31_t)0x921C23EE, (q31_t)0xBE88304F,
+	(q31_t)0x920265E4, (q31_t)0xBEB366D1, (q31_t)0x91E8B8D0,
+	(q31_t)0xBEDEA765, (q31_t)0x91CF1CB6, (q31_t)0xBF09F204,
+	(q31_t)0x91B5919A, (q31_t)0xBF3546A8, (q31_t)0x919C1780,
+	(q31_t)0xBF60A54A, (q31_t)0x9182AE6C, (q31_t)0xBF8C0DE2,
+	(q31_t)0x91695663, (q31_t)0xBFB7806C, (q31_t)0x91500F67,
+	(q31_t)0xBFE2FCDF, (q31_t)0x9136D97D, (q31_t)0xC00E8335,
+	(q31_t)0x911DB4A8, (q31_t)0xC03A1368, (q31_t)0x9104A0ED,
+	(q31_t)0xC065AD70, (q31_t)0x90EB9E50, (q31_t)0xC0915147,
+	(q31_t)0x90D2ACD3, (q31_t)0xC0BCFEE7, (q31_t)0x90B9CC7C,
+	(q31_t)0xC0E8B648, (q31_t)0x90A0FD4E, (q31_t)0xC1147763,
+	(q31_t)0x90883F4C, (q31_t)0xC1404233, (q31_t)0x906F927B,
+	(q31_t)0xC16C16B0, (q31_t)0x9056F6DF, (q31_t)0xC197F4D3,
+	(q31_t)0x903E6C7A, (q31_t)0xC1C3DC96, (q31_t)0x9025F352,
+	(q31_t)0xC1EFCDF2, (q31_t)0x900D8B69, (q31_t)0xC21BC8E0,
+	(q31_t)0x8FF534C4, (q31_t)0xC247CD5A, (q31_t)0x8FDCEF66,
+	(q31_t)0xC273DB58, (q31_t)0x8FC4BB53, (q31_t)0xC29FF2D4,
+	(q31_t)0x8FAC988E, (q31_t)0xC2CC13C7, (q31_t)0x8F94871D,
+	(q31_t)0xC2F83E2A, (q31_t)0x8F7C8701, (q31_t)0xC32471F6,
+	(q31_t)0x8F64983F, (q31_t)0xC350AF25, (q31_t)0x8F4CBADB,
+	(q31_t)0xC37CF5B0, (q31_t)0x8F34EED8, (q31_t)0xC3A9458F,
+	(q31_t)0x8F1D343A, (q31_t)0xC3D59EBD, (q31_t)0x8F058B04,
+	(q31_t)0xC4020132, (q31_t)0x8EEDF33B, (q31_t)0xC42E6CE8,
+	(q31_t)0x8ED66CE1, (q31_t)0xC45AE1D7, (q31_t)0x8EBEF7FB,
+	(q31_t)0xC4875FF8, (q31_t)0x8EA7948C, (q31_t)0xC4B3E746,
+	(q31_t)0x8E904298, (q31_t)0xC4E077B8, (q31_t)0x8E790222,
+	(q31_t)0xC50D1148, (q31_t)0x8E61D32D, (q31_t)0xC539B3F0,
+	(q31_t)0x8E4AB5BF, (q31_t)0xC5665FA8, (q31_t)0x8E33A9D9,
+	(q31_t)0xC593146A, (q31_t)0x8E1CAF80, (q31_t)0xC5BFD22E,
+	(q31_t)0x8E05C6B7, (q31_t)0xC5EC98ED, (q31_t)0x8DEEEF82,
+	(q31_t)0xC61968A2, (q31_t)0x8DD829E4, (q31_t)0xC6464144,
+	(q31_t)0x8DC175E0, (q31_t)0xC67322CD, (q31_t)0x8DAAD37B,
+	(q31_t)0xC6A00D36, (q31_t)0x8D9442B7, (q31_t)0xC6CD0079,
+	(q31_t)0x8D7DC399, (q31_t)0xC6F9FC8D, (q31_t)0x8D675623,
+	(q31_t)0xC727016C, (q31_t)0x8D50FA59, (q31_t)0xC7540F10,
+	(q31_t)0x8D3AB03F, (q31_t)0xC7812571, (q31_t)0x8D2477D8,
+	(q31_t)0xC7AE4489, (q31_t)0x8D0E5127, (q31_t)0xC7DB6C50,
+	(q31_t)0x8CF83C30, (q31_t)0xC8089CBF, (q31_t)0x8CE238F6,
+	(q31_t)0xC835D5D0, (q31_t)0x8CCC477D, (q31_t)0xC863177B,
+	(q31_t)0x8CB667C7, (q31_t)0xC89061BA, (q31_t)0x8CA099D9,
+	(q31_t)0xC8BDB485, (q31_t)0x8C8ADDB6, (q31_t)0xC8EB0FD6,
+	(q31_t)0x8C753361, (q31_t)0xC91873A5, (q31_t)0x8C5F9ADD,
+	(q31_t)0xC945DFEC, (q31_t)0x8C4A142F, (q31_t)0xC97354A3,
+	(q31_t)0x8C349F58, (q31_t)0xC9A0D1C4, (q31_t)0x8C1F3C5C,
+	(q31_t)0xC9CE5748, (q31_t)0x8C09EB40, (q31_t)0xC9FBE527,
+	(q31_t)0x8BF4AC05, (q31_t)0xCA297B5A, (q31_t)0x8BDF7EAF,
+	(q31_t)0xCA5719DB, (q31_t)0x8BCA6342, (q31_t)0xCA84C0A2,
+	(q31_t)0x8BB559C1, (q31_t)0xCAB26FA9, (q31_t)0x8BA0622F,
+	(q31_t)0xCAE026E8, (q31_t)0x8B8B7C8F, (q31_t)0xCB0DE658,
+	(q31_t)0x8B76A8E4, (q31_t)0xCB3BADF2, (q31_t)0x8B61E732,
+	(q31_t)0xCB697DB0, (q31_t)0x8B4D377C, (q31_t)0xCB975589,
+	(q31_t)0x8B3899C5, (q31_t)0xCBC53578, (q31_t)0x8B240E10,
+	(q31_t)0xCBF31D75, (q31_t)0x8B0F9461, (q31_t)0xCC210D78,
+	(q31_t)0x8AFB2CBA, (q31_t)0xCC4F057B, (q31_t)0x8AE6D71F,
+	(q31_t)0xCC7D0577, (q31_t)0x8AD29393, (q31_t)0xCCAB0D65,
+	(q31_t)0x8ABE6219, (q31_t)0xCCD91D3D, (q31_t)0x8AAA42B4,
+	(q31_t)0xCD0734F8, (q31_t)0x8A963567, (q31_t)0xCD355490,
+	(q31_t)0x8A823A35, (q31_t)0xCD637BFD, (q31_t)0x8A6E5122,
+	(q31_t)0xCD91AB38, (q31_t)0x8A5A7A30, (q31_t)0xCDBFE23A,
+	(q31_t)0x8A46B563, (q31_t)0xCDEE20FC, (q31_t)0x8A3302BD,
+	(q31_t)0xCE1C6776, (q31_t)0x8A1F6242, (q31_t)0xCE4AB5A2,
+	(q31_t)0x8A0BD3F5, (q31_t)0xCE790B78, (q31_t)0x89F857D8,
+	(q31_t)0xCEA768F2, (q31_t)0x89E4EDEE, (q31_t)0xCED5CE08,
+	(q31_t)0x89D1963C, (q31_t)0xCF043AB2, (q31_t)0x89BE50C3,
+	(q31_t)0xCF32AEEB, (q31_t)0x89AB1D86, (q31_t)0xCF612AAA,
+	(q31_t)0x8997FC89, (q31_t)0xCF8FADE8, (q31_t)0x8984EDCF,
+	(q31_t)0xCFBE389F, (q31_t)0x8971F15A, (q31_t)0xCFECCAC7,
+	(q31_t)0x895F072D, (q31_t)0xD01B6459, (q31_t)0x894C2F4C,
+	(q31_t)0xD04A054D, (q31_t)0x893969B9, (q31_t)0xD078AD9D,
+	(q31_t)0x8926B677, (q31_t)0xD0A75D42, (q31_t)0x89141589,
+	(q31_t)0xD0D61433, (q31_t)0x890186F1, (q31_t)0xD104D26B,
+	(q31_t)0x88EF0AB4, (q31_t)0xD13397E1, (q31_t)0x88DCA0D3,
+	(q31_t)0xD162648F, (q31_t)0x88CA4951, (q31_t)0xD191386D,
+	(q31_t)0x88B80431, (q31_t)0xD1C01374, (q31_t)0x88A5D177,
+	(q31_t)0xD1EEF59E, (q31_t)0x8893B124, (q31_t)0xD21DDEE1,
+	(q31_t)0x8881A33C, (q31_t)0xD24CCF38, (q31_t)0x886FA7C2,
+	(q31_t)0xD27BC69C, (q31_t)0x885DBEB7, (q31_t)0xD2AAC504,
+	(q31_t)0x884BE820, (q31_t)0xD2D9CA6A, (q31_t)0x883A23FE,
+	(q31_t)0xD308D6C6, (q31_t)0x88287255, (q31_t)0xD337EA12,
+	(q31_t)0x8816D327, (q31_t)0xD3670445, (q31_t)0x88054677,
+	(q31_t)0xD3962559, (q31_t)0x87F3CC47, (q31_t)0xD3C54D46,
+	(q31_t)0x87E2649B, (q31_t)0xD3F47C06, (q31_t)0x87D10F75,
+	(q31_t)0xD423B190, (q31_t)0x87BFCCD7, (q31_t)0xD452EDDE,
+	(q31_t)0x87AE9CC5, (q31_t)0xD48230E8, (q31_t)0x879D7F40,
+	(q31_t)0xD4B17AA7, (q31_t)0x878C744C, (q31_t)0xD4E0CB14,
+	(q31_t)0x877B7BEC, (q31_t)0xD5102227, (q31_t)0x876A9621,
+	(q31_t)0xD53F7FDA, (q31_t)0x8759C2EF, (q31_t)0xD56EE424,
+	(q31_t)0x87490257, (q31_t)0xD59E4EFE, (q31_t)0x8738545E,
+	(q31_t)0xD5CDC062, (q31_t)0x8727B904, (q31_t)0xD5FD3847,
+	(q31_t)0x8717304E, (q31_t)0xD62CB6A7, (q31_t)0x8706BA3C,
+	(q31_t)0xD65C3B7B, (q31_t)0x86F656D3, (q31_t)0xD68BC6BA,
+	(q31_t)0x86E60614, (q31_t)0xD6BB585D, (q31_t)0x86D5C802,
+	(q31_t)0xD6EAF05E, (q31_t)0x86C59C9F, (q31_t)0xD71A8EB5,
+	(q31_t)0x86B583EE, (q31_t)0xD74A335A, (q31_t)0x86A57DF1,
+	(q31_t)0xD779DE46, (q31_t)0x86958AAB, (q31_t)0xD7A98F73,
+	(q31_t)0x8685AA1F, (q31_t)0xD7D946D7, (q31_t)0x8675DC4E,
+	(q31_t)0xD809046D, (q31_t)0x8666213C, (q31_t)0xD838C82D,
+	(q31_t)0x865678EA, (q31_t)0xD868920F, (q31_t)0x8646E35B,
+	(q31_t)0xD898620C, (q31_t)0x86376092, (q31_t)0xD8C8381C,
+	(q31_t)0x8627F090, (q31_t)0xD8F81439, (q31_t)0x86189359,
+	(q31_t)0xD927F65B, (q31_t)0x860948EE, (q31_t)0xD957DE7A,
+	(q31_t)0x85FA1152, (q31_t)0xD987CC8F, (q31_t)0x85EAEC88,
+	(q31_t)0xD9B7C093, (q31_t)0x85DBDA91, (q31_t)0xD9E7BA7E,
+	(q31_t)0x85CCDB70, (q31_t)0xDA17BA4A, (q31_t)0x85BDEF27,
+	(q31_t)0xDA47BFED, (q31_t)0x85AF15B9, (q31_t)0xDA77CB62,
+	(q31_t)0x85A04F28, (q31_t)0xDAA7DCA1, (q31_t)0x85919B75,
+	(q31_t)0xDAD7F3A2, (q31_t)0x8582FAA4, (q31_t)0xDB08105E,
+	(q31_t)0x85746CB7, (q31_t)0xDB3832CD, (q31_t)0x8565F1B0,
+	(q31_t)0xDB685AE8, (q31_t)0x85578991, (q31_t)0xDB9888A8,
+	(q31_t)0x8549345C, (q31_t)0xDBC8BC05, (q31_t)0x853AF214,
+	(q31_t)0xDBF8F4F8, (q31_t)0x852CC2BA, (q31_t)0xDC293379,
+	(q31_t)0x851EA652, (q31_t)0xDC597781, (q31_t)0x85109CDC,
+	(q31_t)0xDC89C108, (q31_t)0x8502A65C, (q31_t)0xDCBA1008,
+	(q31_t)0x84F4C2D3, (q31_t)0xDCEA6478, (q31_t)0x84E6F244,
+	(q31_t)0xDD1ABE51, (q31_t)0x84D934B0, (q31_t)0xDD4B1D8B,
+	(q31_t)0x84CB8A1B, (q31_t)0xDD7B8220, (q31_t)0x84BDF285,
+	(q31_t)0xDDABEC07, (q31_t)0x84B06DF1, (q31_t)0xDDDC5B3A,
+	(q31_t)0x84A2FC62, (q31_t)0xDE0CCFB1, (q31_t)0x84959DD9,
+	(q31_t)0xDE3D4963, (q31_t)0x84885257, (q31_t)0xDE6DC84B,
+	(q31_t)0x847B19E1, (q31_t)0xDE9E4C60, (q31_t)0x846DF476,
+	(q31_t)0xDECED59B, (q31_t)0x8460E21A, (q31_t)0xDEFF63F4,
+	(q31_t)0x8453E2CE, (q31_t)0xDF2FF764, (q31_t)0x8446F695,
+	(q31_t)0xDF608FE3, (q31_t)0x843A1D70, (q31_t)0xDF912D6A,
+	(q31_t)0x842D5761, (q31_t)0xDFC1CFF2, (q31_t)0x8420A46B,
+	(q31_t)0xDFF27773, (q31_t)0x8414048F, (q31_t)0xE02323E5,
+	(q31_t)0x840777CF, (q31_t)0xE053D541, (q31_t)0x83FAFE2E,
+	(q31_t)0xE0848B7F, (q31_t)0x83EE97AC, (q31_t)0xE0B54698,
+	(q31_t)0x83E2444D, (q31_t)0xE0E60684, (q31_t)0x83D60411,
+	(q31_t)0xE116CB3D, (q31_t)0x83C9D6FB, (q31_t)0xE14794B9,
+	(q31_t)0x83BDBD0D, (q31_t)0xE17862F3, (q31_t)0x83B1B649,
+	(q31_t)0xE1A935E1, (q31_t)0x83A5C2B0, (q31_t)0xE1DA0D7E,
+	(q31_t)0x8399E244, (q31_t)0xE20AE9C1, (q31_t)0x838E1507,
+	(q31_t)0xE23BCAA2, (q31_t)0x83825AFB, (q31_t)0xE26CB01A,
+	(q31_t)0x8376B422, (q31_t)0xE29D9A22, (q31_t)0x836B207D,
+	(q31_t)0xE2CE88B2, (q31_t)0x835FA00E, (q31_t)0xE2FF7BC3,
+	(q31_t)0x835432D8, (q31_t)0xE330734C, (q31_t)0x8348D8DB,
+	(q31_t)0xE3616F47, (q31_t)0x833D921A, (q31_t)0xE3926FAC,
+	(q31_t)0x83325E97, (q31_t)0xE3C37473, (q31_t)0x83273E52,
+	(q31_t)0xE3F47D95, (q31_t)0x831C314E, (q31_t)0xE4258B0A,
+	(q31_t)0x8311378C, (q31_t)0xE4569CCB, (q31_t)0x8306510F,
+	(q31_t)0xE487B2CF, (q31_t)0x82FB7DD8, (q31_t)0xE4B8CD10,
+	(q31_t)0x82F0BDE8, (q31_t)0xE4E9EB86, (q31_t)0x82E61141,
+	(q31_t)0xE51B0E2A, (q31_t)0x82DB77E5, (q31_t)0xE54C34F3,
+	(q31_t)0x82D0F1D5, (q31_t)0xE57D5FDA, (q31_t)0x82C67F13,
+	(q31_t)0xE5AE8ED8, (q31_t)0x82BC1FA1, (q31_t)0xE5DFC1E4,
+	(q31_t)0x82B1D381, (q31_t)0xE610F8F9, (q31_t)0x82A79AB3,
+	(q31_t)0xE642340D, (q31_t)0x829D753A, (q31_t)0xE6737319,
+	(q31_t)0x82936316, (q31_t)0xE6A4B616, (q31_t)0x8289644A,
+	(q31_t)0xE6D5FCFC, (q31_t)0x827F78D8, (q31_t)0xE70747C3,
+	(q31_t)0x8275A0C0, (q31_t)0xE7389664, (q31_t)0x826BDC04,
+	(q31_t)0xE769E8D8, (q31_t)0x82622AA5, (q31_t)0xE79B3F16,
+	(q31_t)0x82588CA6, (q31_t)0xE7CC9917, (q31_t)0x824F0208,
+	(q31_t)0xE7FDF6D3, (q31_t)0x82458ACB, (q31_t)0xE82F5844,
+	(q31_t)0x823C26F2, (q31_t)0xE860BD60, (q31_t)0x8232D67E,
+	(q31_t)0xE8922621, (q31_t)0x82299971, (q31_t)0xE8C3927F,
+	(q31_t)0x82206FCB, (q31_t)0xE8F50273, (q31_t)0x8217598F,
+	(q31_t)0xE92675F4, (q31_t)0x820E56BE, (q31_t)0xE957ECFB,
+	(q31_t)0x82056758, (q31_t)0xE9896780, (q31_t)0x81FC8B60,
+	(q31_t)0xE9BAE57C, (q31_t)0x81F3C2D7, (q31_t)0xE9EC66E8,
+	(q31_t)0x81EB0DBD, (q31_t)0xEA1DEBBB, (q31_t)0x81E26C16,
+	(q31_t)0xEA4F73EE, (q31_t)0x81D9DDE1, (q31_t)0xEA80FF79,
+	(q31_t)0x81D16320, (q31_t)0xEAB28E55, (q31_t)0x81C8FBD5,
+	(q31_t)0xEAE4207A, (q31_t)0x81C0A801, (q31_t)0xEB15B5E0,
+	(q31_t)0x81B867A4, (q31_t)0xEB474E80, (q31_t)0x81B03AC1,
+	(q31_t)0xEB78EA52, (q31_t)0x81A82159, (q31_t)0xEBAA894E,
+	(q31_t)0x81A01B6C, (q31_t)0xEBDC2B6D, (q31_t)0x819828FD,
+	(q31_t)0xEC0DD0A8, (q31_t)0x81904A0C, (q31_t)0xEC3F78F5,
+	(q31_t)0x81887E9A, (q31_t)0xEC71244F, (q31_t)0x8180C6A9,
+	(q31_t)0xECA2D2AC, (q31_t)0x8179223A, (q31_t)0xECD48406,
+	(q31_t)0x8171914E, (q31_t)0xED063855, (q31_t)0x816A13E6,
+	(q31_t)0xED37EF91, (q31_t)0x8162AA03, (q31_t)0xED69A9B2,
+	(q31_t)0x815B53A8, (q31_t)0xED9B66B2, (q31_t)0x815410D3,
+	(q31_t)0xEDCD2687, (q31_t)0x814CE188, (q31_t)0xEDFEE92B,
+	(q31_t)0x8145C5C6, (q31_t)0xEE30AE95, (q31_t)0x813EBD90,
+	(q31_t)0xEE6276BF, (q31_t)0x8137C8E6, (q31_t)0xEE9441A0,
+	(q31_t)0x8130E7C8, (q31_t)0xEEC60F31, (q31_t)0x812A1A39,
+	(q31_t)0xEEF7DF6A, (q31_t)0x81236039, (q31_t)0xEF29B243,
+	(q31_t)0x811CB9CA, (q31_t)0xEF5B87B5, (q31_t)0x811626EC,
+	(q31_t)0xEF8D5FB8, (q31_t)0x810FA7A0, (q31_t)0xEFBF3A44,
+	(q31_t)0x81093BE8, (q31_t)0xEFF11752, (q31_t)0x8102E3C3,
+	(q31_t)0xF022F6DA, (q31_t)0x80FC9F35, (q31_t)0xF054D8D4,
+	(q31_t)0x80F66E3C, (q31_t)0xF086BD39, (q31_t)0x80F050DB,
+	(q31_t)0xF0B8A401, (q31_t)0x80EA4712, (q31_t)0xF0EA8D23,
+	(q31_t)0x80E450E2, (q31_t)0xF11C789A, (q31_t)0x80DE6E4C,
+	(q31_t)0xF14E665C, (q31_t)0x80D89F51, (q31_t)0xF1805662,
+	(q31_t)0x80D2E3F1, (q31_t)0xF1B248A5, (q31_t)0x80CD3C2F,
+	(q31_t)0xF1E43D1C, (q31_t)0x80C7A80A, (q31_t)0xF21633C0,
+	(q31_t)0x80C22783, (q31_t)0xF2482C89, (q31_t)0x80BCBA9C,
+	(q31_t)0xF27A2770, (q31_t)0x80B76155, (q31_t)0xF2AC246D,
+	(q31_t)0x80B21BAF, (q31_t)0xF2DE2378, (q31_t)0x80ACE9AB,
+	(q31_t)0xF310248A, (q31_t)0x80A7CB49, (q31_t)0xF342279A,
+	(q31_t)0x80A2C08B, (q31_t)0xF3742CA1, (q31_t)0x809DC970,
+	(q31_t)0xF3A63398, (q31_t)0x8098E5FB, (q31_t)0xF3D83C76,
+	(q31_t)0x8094162B, (q31_t)0xF40A4734, (q31_t)0x808F5A02,
+	(q31_t)0xF43C53CA, (q31_t)0x808AB180, (q31_t)0xF46E6231,
+	(q31_t)0x80861CA5, (q31_t)0xF4A07260, (q31_t)0x80819B74,
+	(q31_t)0xF4D28451, (q31_t)0x807D2DEB, (q31_t)0xF50497FA,
+	(q31_t)0x8078D40D, (q31_t)0xF536AD55, (q31_t)0x80748DD9,
+	(q31_t)0xF568C45A, (q31_t)0x80705B50, (q31_t)0xF59ADD01,
+	(q31_t)0x806C3C73, (q31_t)0xF5CCF743, (q31_t)0x80683143,
+	(q31_t)0xF5FF1317, (q31_t)0x806439C0, (q31_t)0xF6313076,
+	(q31_t)0x806055EA, (q31_t)0xF6634F58, (q31_t)0x805C85C3,
+	(q31_t)0xF6956FB6, (q31_t)0x8058C94C, (q31_t)0xF6C79188,
+	(q31_t)0x80552083, (q31_t)0xF6F9B4C5, (q31_t)0x80518B6B,
+	(q31_t)0xF72BD967, (q31_t)0x804E0A03, (q31_t)0xF75DFF65,
+	(q31_t)0x804A9C4D, (q31_t)0xF79026B8, (q31_t)0x80474248,
+	(q31_t)0xF7C24F58, (q31_t)0x8043FBF6, (q31_t)0xF7F4793E,
+	(q31_t)0x8040C956, (q31_t)0xF826A461, (q31_t)0x803DAA69,
+	(q31_t)0xF858D0BA, (q31_t)0x803A9F31, (q31_t)0xF88AFE41,
+	(q31_t)0x8037A7AC, (q31_t)0xF8BD2CEF, (q31_t)0x8034C3DC,
+	(q31_t)0xF8EF5CBB, (q31_t)0x8031F3C1, (q31_t)0xF9218D9E,
+	(q31_t)0x802F375C, (q31_t)0xF953BF90, (q31_t)0x802C8EAD,
+	(q31_t)0xF985F28A, (q31_t)0x8029F9B4, (q31_t)0xF9B82683,
+	(q31_t)0x80277872, (q31_t)0xF9EA5B75, (q31_t)0x80250AE7,
+	(q31_t)0xFA1C9156, (q31_t)0x8022B113, (q31_t)0xFA4EC820,
+	(q31_t)0x80206AF8, (q31_t)0xFA80FFCB, (q31_t)0x801E3894,
+	(q31_t)0xFAB3384F, (q31_t)0x801C19E9, (q31_t)0xFAE571A4,
+	(q31_t)0x801A0EF7, (q31_t)0xFB17ABC2, (q31_t)0x801817BF,
+	(q31_t)0xFB49E6A2, (q31_t)0x80163440, (q31_t)0xFB7C223C,
+	(q31_t)0x8014647A, (q31_t)0xFBAE5E89, (q31_t)0x8012A86F,
+	(q31_t)0xFBE09B80, (q31_t)0x8011001E, (q31_t)0xFC12D919,
+	(q31_t)0x800F6B88, (q31_t)0xFC45174E, (q31_t)0x800DEAAC,
+	(q31_t)0xFC775616, (q31_t)0x800C7D8C, (q31_t)0xFCA99569,
+	(q31_t)0x800B2427, (q31_t)0xFCDBD541, (q31_t)0x8009DE7D,
+	(q31_t)0xFD0E1594, (q31_t)0x8008AC90, (q31_t)0xFD40565B,
+	(q31_t)0x80078E5E, (q31_t)0xFD72978F, (q31_t)0x800683E8,
+	(q31_t)0xFDA4D928, (q31_t)0x80058D2E, (q31_t)0xFDD71B1E,
+	(q31_t)0x8004AA31, (q31_t)0xFE095D69, (q31_t)0x8003DAF0,
+	(q31_t)0xFE3BA001, (q31_t)0x80031F6C, (q31_t)0xFE6DE2E0,
+	(q31_t)0x800277A5, (q31_t)0xFEA025FC, (q31_t)0x8001E39B,
+	(q31_t)0xFED2694F, (q31_t)0x8001634D, (q31_t)0xFF04ACD0,
+	(q31_t)0x8000F6BD, (q31_t)0xFF36F078, (q31_t)0x80009DE9,
+	(q31_t)0xFF69343E, (q31_t)0x800058D3, (q31_t)0xFF9B781D,
+	(q31_t)0x8000277A, (q31_t)0xFFCDBC0A, (q31_t)0x800009DE
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+/**
+  @brief  q15 Twiddle factors Table
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
+
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>fori = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 16, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_16_q15[24] = {
+    (q15_t)0x7FFF, (q15_t)0x0000,
+    (q15_t)0x7641, (q15_t)0x30FB,
+    (q15_t)0x5A82, (q15_t)0x5A82,
+    (q15_t)0x30FB, (q15_t)0x7641,
+    (q15_t)0x0000, (q15_t)0x7FFF,
+    (q15_t)0xCF04, (q15_t)0x7641,
+    (q15_t)0xA57D, (q15_t)0x5A82,
+    (q15_t)0x89BE, (q15_t)0x30FB,
+    (q15_t)0x8000, (q15_t)0x0000,
+    (q15_t)0x89BE, (q15_t)0xCF04,
+    (q15_t)0xA57D, (q15_t)0xA57D,
+    (q15_t)0xCF04, (q15_t)0x89BE
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 32, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_32_q15[48] = {
+    (q15_t)0x7FFF, (q15_t)0x0000,
+    (q15_t)0x7D8A, (q15_t)0x18F8,
+    (q15_t)0x7641, (q15_t)0x30FB,
+    (q15_t)0x6A6D, (q15_t)0x471C,
+    (q15_t)0x5A82, (q15_t)0x5A82,
+    (q15_t)0x471C, (q15_t)0x6A6D,
+    (q15_t)0x30FB, (q15_t)0x7641,
+    (q15_t)0x18F8, (q15_t)0x7D8A,
+    (q15_t)0x0000, (q15_t)0x7FFF,
+    (q15_t)0xE707, (q15_t)0x7D8A,
+    (q15_t)0xCF04, (q15_t)0x7641,
+    (q15_t)0xB8E3, (q15_t)0x6A6D,
+    (q15_t)0xA57D, (q15_t)0x5A82,
+    (q15_t)0x9592, (q15_t)0x471C,
+    (q15_t)0x89BE, (q15_t)0x30FB,
+    (q15_t)0x8275, (q15_t)0x18F8,
+    (q15_t)0x8000, (q15_t)0x0000,
+    (q15_t)0x8275, (q15_t)0xE707,
+    (q15_t)0x89BE, (q15_t)0xCF04,
+    (q15_t)0x9592, (q15_t)0xB8E3,
+    (q15_t)0xA57D, (q15_t)0xA57D,
+    (q15_t)0xB8E3, (q15_t)0x9592,
+    (q15_t)0xCF04, (q15_t)0x89BE,
+    (q15_t)0xE707, (q15_t)0x8275
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 64, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_64_q15[96] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7F62, (q15_t)0x0C8B,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7A7D, (q15_t)0x2528,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x70E2, (q15_t)0x3C56,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x62F2, (q15_t)0x5133,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5133, (q15_t)0x62F2,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x3C56, (q15_t)0x70E2,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2528, (q15_t)0x7A7D,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x0C8B, (q15_t)0x7F62,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF374, (q15_t)0x7F62,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xDAD7, (q15_t)0x7A7D,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC3A9, (q15_t)0x70E2,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xAECC, (q15_t)0x62F2,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0x9D0D, (q15_t)0x5133,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x8F1D, (q15_t)0x3C56,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8582, (q15_t)0x2528,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x809D, (q15_t)0x0C8B,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x809D, (q15_t)0xF374,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8582, (q15_t)0xDAD7,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8F1D, (q15_t)0xC3A9,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9D0D, (q15_t)0xAECC,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAECC, (q15_t)0x9D0D,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xC3A9, (q15_t)0x8F1D,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xDAD7, (q15_t)0x8582,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xF374, (q15_t)0x809D
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 128, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_128_q15[192] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FD8, (q15_t)0x0647,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7E9D, (q15_t)0x12C8,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7C29, (q15_t)0x1F19,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7884, (q15_t)0x2B1F,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x73B5, (q15_t)0x36BA,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6DCA, (q15_t)0x41CE,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x66CF, (q15_t)0x4C3F,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x5ED7, (q15_t)0x55F5,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x55F5, (q15_t)0x5ED7,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4C3F, (q15_t)0x66CF,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x41CE, (q15_t)0x6DCA,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x36BA, (q15_t)0x73B5,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2B1F, (q15_t)0x7884,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x1F19, (q15_t)0x7C29,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x12C8, (q15_t)0x7E9D,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0647, (q15_t)0x7FD8,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xF9B8, (q15_t)0x7FD8,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xED37, (q15_t)0x7E9D,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE0E6, (q15_t)0x7C29,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD4E0, (q15_t)0x7884,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xC945, (q15_t)0x73B5,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xBE31, (q15_t)0x6DCA,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB3C0, (q15_t)0x66CF,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAA0A, (q15_t)0x5ED7,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA128, (q15_t)0x55F5,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9930, (q15_t)0x4C3F,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9235, (q15_t)0x41CE,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8C4A, (q15_t)0x36BA,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x877B, (q15_t)0x2B1F,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x83D6, (q15_t)0x1F19,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8162, (q15_t)0x12C8,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8027, (q15_t)0x0647,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8027, (q15_t)0xF9B8,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x8162, (q15_t)0xED37,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x83D6, (q15_t)0xE0E6,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x877B, (q15_t)0xD4E0,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8C4A, (q15_t)0xC945,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x9235, (q15_t)0xBE31,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9930, (q15_t)0xB3C0,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0xA128, (q15_t)0xAA0A,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xAA0A, (q15_t)0xA128,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB3C0, (q15_t)0x9930,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBE31, (q15_t)0x9235,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC945, (q15_t)0x8C4A,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD4E0, (q15_t)0x877B,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xE0E6, (q15_t)0x83D6,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xED37, (q15_t)0x8162,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF9B8, (q15_t)0x8027
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 256, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_256_q15[384] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FF6, (q15_t)0x0324,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FA7, (q15_t)0x096A,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F09, (q15_t)0x0FAB,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E1D, (q15_t)0x15E2,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7CE3, (q15_t)0x1C0B,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7B5D, (q15_t)0x2223,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x798A, (q15_t)0x2826,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x776C, (q15_t)0x2E11,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x7504, (q15_t)0x33DE,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7255, (q15_t)0x398C,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x6F5F, (q15_t)0x3F17,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6C24, (q15_t)0x447A,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x68A6, (q15_t)0x49B4,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x64E8, (q15_t)0x4EBF,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x60EC, (q15_t)0x539B,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5CB4, (q15_t)0x5842,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5842, (q15_t)0x5CB4,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x539B, (q15_t)0x60EC,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4EBF, (q15_t)0x64E8,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x49B4, (q15_t)0x68A6,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x447A, (q15_t)0x6C24,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x3F17, (q15_t)0x6F5F,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x398C, (q15_t)0x7255,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x33DE, (q15_t)0x7504,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2E11, (q15_t)0x776C,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2826, (q15_t)0x798A,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2223, (q15_t)0x7B5D,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1C0B, (q15_t)0x7CE3,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x15E2, (q15_t)0x7E1D,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x0FAB, (q15_t)0x7F09,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x096A, (q15_t)0x7FA7,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0324, (q15_t)0x7FF6,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFCDB, (q15_t)0x7FF6,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF695, (q15_t)0x7FA7,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF054, (q15_t)0x7F09,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEA1D, (q15_t)0x7E1D,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE3F4, (q15_t)0x7CE3,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDDDC, (q15_t)0x7B5D,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD7D9, (q15_t)0x798A,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD1EE, (q15_t)0x776C,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCC21, (q15_t)0x7504,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC673, (q15_t)0x7255,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC0E8, (q15_t)0x6F5F,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBB85, (q15_t)0x6C24,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB64B, (q15_t)0x68A6,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB140, (q15_t)0x64E8,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAC64, (q15_t)0x60EC,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA7BD, (q15_t)0x5CB4,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA34B, (q15_t)0x5842,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0x9F13, (q15_t)0x539B,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9B17, (q15_t)0x4EBF,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9759, (q15_t)0x49B4,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x93DB, (q15_t)0x447A,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x90A0, (q15_t)0x3F17,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8DAA, (q15_t)0x398C,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8AFB, (q15_t)0x33DE,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8893, (q15_t)0x2E11,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8675, (q15_t)0x2826,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x84A2, (q15_t)0x2223,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x831C, (q15_t)0x1C0B,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x81E2, (q15_t)0x15E2,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x80F6, (q15_t)0x0FAB,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8058, (q15_t)0x096A,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8009, (q15_t)0x0324,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8009, (q15_t)0xFCDB,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8058, (q15_t)0xF695,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80F6, (q15_t)0xF054,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81E2, (q15_t)0xEA1D,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x831C, (q15_t)0xE3F4,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x84A2, (q15_t)0xDDDC,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8675, (q15_t)0xD7D9,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8893, (q15_t)0xD1EE,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8AFB, (q15_t)0xCC21,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8DAA, (q15_t)0xC673,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x90A0, (q15_t)0xC0E8,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x93DB, (q15_t)0xBB85,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9759, (q15_t)0xB64B,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9B17, (q15_t)0xB140,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9F13, (q15_t)0xAC64,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA34B, (q15_t)0xA7BD,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA7BD, (q15_t)0xA34B,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAC64, (q15_t)0x9F13,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB140, (q15_t)0x9B17,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB64B, (q15_t)0x9759,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBB85, (q15_t)0x93DB,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xC0E8, (q15_t)0x90A0,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC673, (q15_t)0x8DAA,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCC21, (q15_t)0x8AFB,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD1EE, (q15_t)0x8893,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD7D9, (q15_t)0x8675,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDDDC, (q15_t)0x84A2,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE3F4, (q15_t)0x831C,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xEA1D, (q15_t)0x81E2,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xF054, (q15_t)0x80F6,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF695, (q15_t)0x8058,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFCDB, (q15_t)0x8009
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 512, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_512_q15[768] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFD, (q15_t)0x0192,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FE9, (q15_t)0x04B6,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FC2, (q15_t)0x07D9,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F87, (q15_t)0x0AFB,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F38, (q15_t)0x0E1B,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7ED5, (q15_t)0x1139,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E5F, (q15_t)0x1455,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DD6, (q15_t)0x176D,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D39, (q15_t)0x1A82,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7C89, (q15_t)0x1D93,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BC5, (q15_t)0x209F,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7AEF, (q15_t)0x23A6,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A05, (q15_t)0x26A8,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x7909, (q15_t)0x29A3,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x77FA, (q15_t)0x2C98,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x76D9, (q15_t)0x2F87,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75A5, (q15_t)0x326E,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x745F, (q15_t)0x354D,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x7307, (q15_t)0x3824,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x719E, (q15_t)0x3AF2,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7023, (q15_t)0x3DB8,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6E96, (q15_t)0x4073,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6CF9, (q15_t)0x4325,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6B4A, (q15_t)0x45CD,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x698C, (q15_t)0x4869,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x67BD, (q15_t)0x4AFB,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x65DD, (q15_t)0x4D81,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x63EF, (q15_t)0x4FFB,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x61F1, (q15_t)0x5269,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x5FE3, (q15_t)0x54CA,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5DC7, (q15_t)0x571D,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5B9D, (q15_t)0x5964,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5964, (q15_t)0x5B9D,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x571D, (q15_t)0x5DC7,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x54CA, (q15_t)0x5FE3,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5269, (q15_t)0x61F1,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x4FFB, (q15_t)0x63EF,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4D81, (q15_t)0x65DD,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4AFB, (q15_t)0x67BD,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4869, (q15_t)0x698C,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x45CD, (q15_t)0x6B4A,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4325, (q15_t)0x6CF9,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4073, (q15_t)0x6E96,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3DB8, (q15_t)0x7023,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3AF2, (q15_t)0x719E,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3824, (q15_t)0x7307,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x354D, (q15_t)0x745F,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x326E, (q15_t)0x75A5,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x2F87, (q15_t)0x76D9,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2C98, (q15_t)0x77FA,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x29A3, (q15_t)0x7909,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x26A8, (q15_t)0x7A05,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x23A6, (q15_t)0x7AEF,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x209F, (q15_t)0x7BC5,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1D93, (q15_t)0x7C89,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1A82, (q15_t)0x7D39,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x176D, (q15_t)0x7DD6,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x1455, (q15_t)0x7E5F,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1139, (q15_t)0x7ED5,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0E1B, (q15_t)0x7F38,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0AFB, (q15_t)0x7F87,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x07D9, (q15_t)0x7FC2,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x04B6, (q15_t)0x7FE9,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x0192, (q15_t)0x7FFD,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFE6D, (q15_t)0x7FFD,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFB49, (q15_t)0x7FE9,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF826, (q15_t)0x7FC2,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF504, (q15_t)0x7F87,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF1E4, (q15_t)0x7F38,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEEC6, (q15_t)0x7ED5,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEBAA, (q15_t)0x7E5F,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE892, (q15_t)0x7DD6,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE57D, (q15_t)0x7D39,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE26C, (q15_t)0x7C89,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xDF60, (q15_t)0x7BC5,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDC59, (q15_t)0x7AEF,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xD957, (q15_t)0x7A05,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD65C, (q15_t)0x7909,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD367, (q15_t)0x77FA,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD078, (q15_t)0x76D9,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCD91, (q15_t)0x75A5,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCAB2, (q15_t)0x745F,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC7DB, (q15_t)0x7307,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC50D, (q15_t)0x719E,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC247, (q15_t)0x7023,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xBF8C, (q15_t)0x6E96,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBCDA, (q15_t)0x6CF9,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBA32, (q15_t)0x6B4A,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB796, (q15_t)0x698C,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB504, (q15_t)0x67BD,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB27E, (q15_t)0x65DD,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB004, (q15_t)0x63EF,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAD96, (q15_t)0x61F1,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAB35, (q15_t)0x5FE3,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA8E2, (q15_t)0x5DC7,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA69B, (q15_t)0x5B9D,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA462, (q15_t)0x5964,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA238, (q15_t)0x571D,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA01C, (q15_t)0x54CA,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E0E, (q15_t)0x5269,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C10, (q15_t)0x4FFB,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9A22, (q15_t)0x4D81,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9842, (q15_t)0x4AFB,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x9673, (q15_t)0x4869,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x94B5, (q15_t)0x45CD,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9306, (q15_t)0x4325,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9169, (q15_t)0x4073,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x8FDC, (q15_t)0x3DB8,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8E61, (q15_t)0x3AF2,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8CF8, (q15_t)0x3824,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BA0, (q15_t)0x354D,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8A5A, (q15_t)0x326E,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8926, (q15_t)0x2F87,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8805, (q15_t)0x2C98,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x86F6, (q15_t)0x29A3,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x85FA, (q15_t)0x26A8,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8510, (q15_t)0x23A6,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x843A, (q15_t)0x209F,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x8376, (q15_t)0x1D93,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82C6, (q15_t)0x1A82,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8229, (q15_t)0x176D,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81A0, (q15_t)0x1455,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x812A, (q15_t)0x1139,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80C7, (q15_t)0x0E1B,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8078, (q15_t)0x0AFB,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x803D, (q15_t)0x07D9,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8016, (q15_t)0x04B6,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8002, (q15_t)0x0192,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8002, (q15_t)0xFE6D,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x8016, (q15_t)0xFB49,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x803D, (q15_t)0xF826,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8078, (q15_t)0xF504,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80C7, (q15_t)0xF1E4,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x812A, (q15_t)0xEEC6,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x81A0, (q15_t)0xEBAA,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8229, (q15_t)0xE892,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x82C6, (q15_t)0xE57D,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8376, (q15_t)0xE26C,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x843A, (q15_t)0xDF60,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x8510, (q15_t)0xDC59,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85FA, (q15_t)0xD957,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86F6, (q15_t)0xD65C,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x8805, (q15_t)0xD367,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x8926, (q15_t)0xD078,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A5A, (q15_t)0xCD91,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8BA0, (q15_t)0xCAB2,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CF8, (q15_t)0xC7DB,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E61, (q15_t)0xC50D,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8FDC, (q15_t)0xC247,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9169, (q15_t)0xBF8C,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9306, (q15_t)0xBCDA,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x94B5, (q15_t)0xBA32,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9673, (q15_t)0xB796,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9842, (q15_t)0xB504,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x9A22, (q15_t)0xB27E,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9C10, (q15_t)0xB004,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9E0E, (q15_t)0xAD96,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0xA01C, (q15_t)0xAB35,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA238, (q15_t)0xA8E2,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA462, (q15_t)0xA69B,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA69B, (q15_t)0xA462,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA8E2, (q15_t)0xA238,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAB35, (q15_t)0xA01C,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAD96, (q15_t)0x9E0E,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xB004, (q15_t)0x9C10,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB27E, (q15_t)0x9A22,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB504, (q15_t)0x9842,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB796, (q15_t)0x9673,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xBA32, (q15_t)0x94B5,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBCDA, (q15_t)0x9306,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBF8C, (q15_t)0x9169,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC247, (q15_t)0x8FDC,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC50D, (q15_t)0x8E61,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC7DB, (q15_t)0x8CF8,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xCAB2, (q15_t)0x8BA0,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCD91, (q15_t)0x8A5A,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xD078, (q15_t)0x8926,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD367, (q15_t)0x8805,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD65C, (q15_t)0x86F6,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD957, (q15_t)0x85FA,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDC59, (q15_t)0x8510,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDF60, (q15_t)0x843A,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE26C, (q15_t)0x8376,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE57D, (q15_t)0x82C6,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE892, (q15_t)0x8229,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEBAA, (q15_t)0x81A0,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEEC6, (q15_t)0x812A,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF1E4, (q15_t)0x80C7,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF504, (q15_t)0x8078,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF826, (q15_t)0x803D,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFB49, (q15_t)0x8016,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFE6D, (q15_t)0x8002
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 1024, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ 
+ */
+const q15_t twiddleCoef_1024_q15[1536] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x00C9,
+	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFA, (q15_t)0x025B,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF0, (q15_t)0x03ED,
+	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE1, (q15_t)0x057F,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FCE, (q15_t)0x0710,
+	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FB5, (q15_t)0x08A2,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F97, (q15_t)0x0A33,
+	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F75, (q15_t)0x0BC3,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F4D, (q15_t)0x0D53,
+	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F21, (q15_t)0x0EE3,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EF0, (q15_t)0x1072,
+	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7EBA, (q15_t)0x1201,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E7F, (q15_t)0x138E,
+	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E3F, (q15_t)0x151B,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7DFA, (q15_t)0x16A8,
+	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DB0, (q15_t)0x1833,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D62, (q15_t)0x19BD,
+	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D0F, (q15_t)0x1B47,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CB7, (q15_t)0x1CCF,
+	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C5A, (q15_t)0x1E56,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7BF8, (q15_t)0x1FDC,
+	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7B92, (q15_t)0x2161,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B26, (q15_t)0x22E5,
+	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AB6, (q15_t)0x2467,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A42, (q15_t)0x25E8,
+	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79C8, (q15_t)0x2767,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x794A, (q15_t)0x28E5,
+	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78C7, (q15_t)0x2A61,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7840, (q15_t)0x2BDC,
+	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77B4, (q15_t)0x2D55,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7723, (q15_t)0x2ECC,
+	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x768E, (q15_t)0x3041,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x75F4, (q15_t)0x31B5,
+	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7555, (q15_t)0x3326,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74B2, (q15_t)0x3496,
+	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x740B, (q15_t)0x3604,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x735F, (q15_t)0x376F,
+	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72AF, (q15_t)0x38D8,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x71FA, (q15_t)0x3A40,
+	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7141, (q15_t)0x3BA5,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x7083, (q15_t)0x3D07,
+	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6FC1, (q15_t)0x3E68,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6EFB, (q15_t)0x3FC5,
+	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E30, (q15_t)0x4121,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D62, (q15_t)0x427A,
+	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6C8F, (q15_t)0x43D0,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6BB8, (q15_t)0x4524,
+	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6ADC, (q15_t)0x4675,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x69FD, (q15_t)0x47C3,
+	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6919, (q15_t)0x490F,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6832, (q15_t)0x4A58,
+	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x6746, (q15_t)0x4B9E,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6657, (q15_t)0x4CE1,
+	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x6563, (q15_t)0x4E21,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x646C, (q15_t)0x4F5E,
+	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x6371, (q15_t)0x5097,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x6271, (q15_t)0x51CE,
+	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x616F, (q15_t)0x5302,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x6068, (q15_t)0x5433,
+	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5F5E, (q15_t)0x5560,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E50, (q15_t)0x568A,
+	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5D3E, (q15_t)0x57B0,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C29, (q15_t)0x58D4,
+	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B10, (q15_t)0x59F3,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x59F3, (q15_t)0x5B10,
+	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x58D4, (q15_t)0x5C29,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x57B0, (q15_t)0x5D3E,
+	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x568A, (q15_t)0x5E50,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x5560, (q15_t)0x5F5E,
+	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x5433, (q15_t)0x6068,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5302, (q15_t)0x616F,
+	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x51CE, (q15_t)0x6271,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x5097, (q15_t)0x6371,
+	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4F5E, (q15_t)0x646C,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E21, (q15_t)0x6563,
+	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4CE1, (q15_t)0x6657,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4B9E, (q15_t)0x6746,
+	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4A58, (q15_t)0x6832,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x490F, (q15_t)0x6919,
+	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x47C3, (q15_t)0x69FD,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x4675, (q15_t)0x6ADC,
+	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x4524, (q15_t)0x6BB8,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x43D0, (q15_t)0x6C8F,
+	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x427A, (q15_t)0x6D62,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4121, (q15_t)0x6E30,
+	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x3FC5, (q15_t)0x6EFB,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3E68, (q15_t)0x6FC1,
+	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D07, (q15_t)0x7083,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BA5, (q15_t)0x7141,
+	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A40, (q15_t)0x71FA,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x38D8, (q15_t)0x72AF,
+	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x376F, (q15_t)0x735F,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x3604, (q15_t)0x740B,
+	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x3496, (q15_t)0x74B2,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3326, (q15_t)0x7555,
+	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x31B5, (q15_t)0x75F4,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x3041, (q15_t)0x768E,
+	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2ECC, (q15_t)0x7723,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2D55, (q15_t)0x77B4,
+	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2BDC, (q15_t)0x7840,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2A61, (q15_t)0x78C7,
+	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x28E5, (q15_t)0x794A,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x2767, (q15_t)0x79C8,
+	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x25E8, (q15_t)0x7A42,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x2467, (q15_t)0x7AB6,
+	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x22E5, (q15_t)0x7B26,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x2161, (q15_t)0x7B92,
+	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x1FDC, (q15_t)0x7BF8,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1E56, (q15_t)0x7C5A,
+	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1CCF, (q15_t)0x7CB7,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1B47, (q15_t)0x7D0F,
+	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x19BD, (q15_t)0x7D62,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1833, (q15_t)0x7DB0,
+	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x16A8, (q15_t)0x7DFA,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x151B, (q15_t)0x7E3F,
+	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x138E, (q15_t)0x7E7F,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1201, (q15_t)0x7EBA,
+	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1072, (q15_t)0x7EF0,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0EE3, (q15_t)0x7F21,
+	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0D53, (q15_t)0x7F4D,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0BC3, (q15_t)0x7F75,
+	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0A33, (q15_t)0x7F97,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x08A2, (q15_t)0x7FB5,
+	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0710, (q15_t)0x7FCE,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x057F, (q15_t)0x7FE1,
+	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x03ED, (q15_t)0x7FF0,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x025B, (q15_t)0x7FFA,
+	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x00C9, (q15_t)0x7FFF,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF36, (q15_t)0x7FFF,
+	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFDA4, (q15_t)0x7FFA,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC12, (q15_t)0x7FF0,
+	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFA80, (q15_t)0x7FE1,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF8EF, (q15_t)0x7FCE,
+	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF75D, (q15_t)0x7FB5,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF5CC, (q15_t)0x7F97,
+	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF43C, (q15_t)0x7F75,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF2AC, (q15_t)0x7F4D,
+	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF11C, (q15_t)0x7F21,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEF8D, (q15_t)0x7EF0,
+	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEDFE, (q15_t)0x7EBA,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xEC71, (q15_t)0x7E7F,
+	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEAE4, (q15_t)0x7E3F,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE957, (q15_t)0x7DFA,
+	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE7CC, (q15_t)0x7DB0,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE642, (q15_t)0x7D62,
+	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE4B8, (q15_t)0x7D0F,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE330, (q15_t)0x7CB7,
+	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE1A9, (q15_t)0x7C5A,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE023, (q15_t)0x7BF8,
+	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDE9E, (q15_t)0x7B92,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD1A, (q15_t)0x7B26,
+	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDB98, (q15_t)0x7AB6,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA17, (q15_t)0x7A42,
+	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD898, (q15_t)0x79C8,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD71A, (q15_t)0x794A,
+	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD59E, (q15_t)0x78C7,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD423, (q15_t)0x7840,
+	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD2AA, (q15_t)0x77B4,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD133, (q15_t)0x7723,
+	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xCFBE, (q15_t)0x768E,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCE4A, (q15_t)0x75F4,
+	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCCD9, (q15_t)0x7555,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCB69, (q15_t)0x74B2,
+	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xC9FB, (q15_t)0x740B,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC890, (q15_t)0x735F,
+	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC727, (q15_t)0x72AF,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC5BF, (q15_t)0x71FA,
+	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC45A, (q15_t)0x7141,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC2F8, (q15_t)0x7083,
+	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC197, (q15_t)0x6FC1,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC03A, (q15_t)0x6EFB,
+	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBEDE, (q15_t)0x6E30,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBD85, (q15_t)0x6D62,
+	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBC2F, (q15_t)0x6C8F,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBADB, (q15_t)0x6BB8,
+	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB98A, (q15_t)0x6ADC,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB83C, (q15_t)0x69FD,
+	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB6F0, (q15_t)0x6919,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB5A7, (q15_t)0x6832,
+	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB461, (q15_t)0x6746,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB31E, (q15_t)0x6657,
+	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB1DE, (q15_t)0x6563,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB0A1, (q15_t)0x646C,
+	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAF68, (q15_t)0x6371,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE31, (q15_t)0x6271,
+	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xACFD, (q15_t)0x616F,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xABCC, (q15_t)0x6068,
+	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAA9F, (q15_t)0x5F5E,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA975, (q15_t)0x5E50,
+	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA84F, (q15_t)0x5D3E,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA72B, (q15_t)0x5C29,
+	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA60C, (q15_t)0x5B10,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA4EF, (q15_t)0x59F3,
+	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA3D6, (q15_t)0x58D4,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA2C1, (q15_t)0x57B0,
+	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1AF, (q15_t)0x568A,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA0A1, (q15_t)0x5560,
+	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9F97, (q15_t)0x5433,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9E90, (q15_t)0x5302,
+	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9D8E, (q15_t)0x51CE,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9C8E, (q15_t)0x5097,
+	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9B93, (q15_t)0x4F5E,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9A9C, (q15_t)0x4E21,
+	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x99A8, (q15_t)0x4CE1,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98B9, (q15_t)0x4B9E,
+	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x97CD, (q15_t)0x4A58,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x96E6, (q15_t)0x490F,
+	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x9602, (q15_t)0x47C3,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9523, (q15_t)0x4675,
+	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x9447, (q15_t)0x4524,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x9370, (q15_t)0x43D0,
+	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x929D, (q15_t)0x427A,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x91CF, (q15_t)0x4121,
+	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9104, (q15_t)0x3FC5,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x903E, (q15_t)0x3E68,
+	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8F7C, (q15_t)0x3D07,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8EBE, (q15_t)0x3BA5,
+	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E05, (q15_t)0x3A40,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D50, (q15_t)0x38D8,
+	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CA0, (q15_t)0x376F,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8BF4, (q15_t)0x3604,
+	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B4D, (q15_t)0x3496,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AAA, (q15_t)0x3326,
+	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A0B, (q15_t)0x31B5,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8971, (q15_t)0x3041,
+	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x88DC, (q15_t)0x2ECC,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x884B, (q15_t)0x2D55,
+	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87BF, (q15_t)0x2BDC,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8738, (q15_t)0x2A61,
+	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86B5, (q15_t)0x28E5,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8637, (q15_t)0x2767,
+	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85BD, (q15_t)0x25E8,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8549, (q15_t)0x2467,
+	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84D9, (q15_t)0x22E5,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x846D, (q15_t)0x2161,
+	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8407, (q15_t)0x1FDC,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83A5, (q15_t)0x1E56,
+	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x8348, (q15_t)0x1CCF,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x82F0, (q15_t)0x1B47,
+	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x829D, (q15_t)0x19BD,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x824F, (q15_t)0x1833,
+	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8205, (q15_t)0x16A8,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81C0, (q15_t)0x151B,
+	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8180, (q15_t)0x138E,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8145, (q15_t)0x1201,
+	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x810F, (q15_t)0x1072,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80DE, (q15_t)0x0EE3,
+	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80B2, (q15_t)0x0D53,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x808A, (q15_t)0x0BC3,
+	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8068, (q15_t)0x0A33,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x804A, (q15_t)0x08A2,
+	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x8031, (q15_t)0x0710,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x801E, (q15_t)0x057F,
+	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x800F, (q15_t)0x03ED,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8005, (q15_t)0x025B,
+	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8000, (q15_t)0x00C9,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFF36,
+	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8005, (q15_t)0xFDA4,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800F, (q15_t)0xFC12,
+	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801E, (q15_t)0xFA80,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8031, (q15_t)0xF8EF,
+	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x804A, (q15_t)0xF75D,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8068, (q15_t)0xF5CC,
+	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x808A, (q15_t)0xF43C,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80B2, (q15_t)0xF2AC,
+	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80DE, (q15_t)0xF11C,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x810F, (q15_t)0xEF8D,
+	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8145, (q15_t)0xEDFE,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8180, (q15_t)0xEC71,
+	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81C0, (q15_t)0xEAE4,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x8205, (q15_t)0xE957,
+	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x824F, (q15_t)0xE7CC,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x829D, (q15_t)0xE642,
+	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82F0, (q15_t)0xE4B8,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8348, (q15_t)0xE330,
+	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x83A5, (q15_t)0xE1A9,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x8407, (q15_t)0xE023,
+	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x846D, (q15_t)0xDE9E,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84D9, (q15_t)0xDD1A,
+	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x8549, (q15_t)0xDB98,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85BD, (q15_t)0xDA17,
+	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8637, (q15_t)0xD898,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x86B5, (q15_t)0xD71A,
+	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8738, (q15_t)0xD59E,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x87BF, (q15_t)0xD423,
+	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x884B, (q15_t)0xD2AA,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88DC, (q15_t)0xD133,
+	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8971, (q15_t)0xCFBE,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x8A0B, (q15_t)0xCE4A,
+	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8AAA, (q15_t)0xCCD9,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B4D, (q15_t)0xCB69,
+	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BF4, (q15_t)0xC9FB,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8CA0, (q15_t)0xC890,
+	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D50, (q15_t)0xC727,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8E05, (q15_t)0xC5BF,
+	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8EBE, (q15_t)0xC45A,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F7C, (q15_t)0xC2F8,
+	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x903E, (q15_t)0xC197,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x9104, (q15_t)0xC03A,
+	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x91CF, (q15_t)0xBEDE,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x929D, (q15_t)0xBD85,
+	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9370, (q15_t)0xBC2F,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9447, (q15_t)0xBADB,
+	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x9523, (q15_t)0xB98A,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x9602, (q15_t)0xB83C,
+	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96E6, (q15_t)0xB6F0,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x97CD, (q15_t)0xB5A7,
+	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x98B9, (q15_t)0xB461,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x99A8, (q15_t)0xB31E,
+	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A9C, (q15_t)0xB1DE,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B93, (q15_t)0xB0A1,
+	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C8E, (q15_t)0xAF68,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D8E, (q15_t)0xAE31,
+	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E90, (q15_t)0xACFD,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F97, (q15_t)0xABCC,
+	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA0A1, (q15_t)0xAA9F,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA1AF, (q15_t)0xA975,
+	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA2C1, (q15_t)0xA84F,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA3D6, (q15_t)0xA72B,
+	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4EF, (q15_t)0xA60C,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA60C, (q15_t)0xA4EF,
+	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA72B, (q15_t)0xA3D6,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA84F, (q15_t)0xA2C1,
+	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA975, (q15_t)0xA1AF,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA9F, (q15_t)0xA0A1,
+	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xABCC, (q15_t)0x9F97,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACFD, (q15_t)0x9E90,
+	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xAE31, (q15_t)0x9D8E,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF68, (q15_t)0x9C8E,
+	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB0A1, (q15_t)0x9B93,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB1DE, (q15_t)0x9A9C,
+	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB31E, (q15_t)0x99A8,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB461, (q15_t)0x98B9,
+	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB5A7, (q15_t)0x97CD,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB6F0, (q15_t)0x96E6,
+	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB83C, (q15_t)0x9602,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB98A, (q15_t)0x9523,
+	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBADB, (q15_t)0x9447,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBC2F, (q15_t)0x9370,
+	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD85, (q15_t)0x929D,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBEDE, (q15_t)0x91CF,
+	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xC03A, (q15_t)0x9104,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC197, (q15_t)0x903E,
+	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC2F8, (q15_t)0x8F7C,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC45A, (q15_t)0x8EBE,
+	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC5BF, (q15_t)0x8E05,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC727, (q15_t)0x8D50,
+	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC890, (q15_t)0x8CA0,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9FB, (q15_t)0x8BF4,
+	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB69, (q15_t)0x8B4D,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCCD9, (q15_t)0x8AAA,
+	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCE4A, (q15_t)0x8A0B,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCFBE, (q15_t)0x8971,
+	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD133, (q15_t)0x88DC,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD2AA, (q15_t)0x884B,
+	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD423, (q15_t)0x87BF,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD59E, (q15_t)0x8738,
+	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD71A, (q15_t)0x86B5,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD898, (q15_t)0x8637,
+	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xDA17, (q15_t)0x85BD,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB98, (q15_t)0x8549,
+	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDD1A, (q15_t)0x84D9,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE9E, (q15_t)0x846D,
+	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xE023, (q15_t)0x8407,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE1A9, (q15_t)0x83A5,
+	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE330, (q15_t)0x8348,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE4B8, (q15_t)0x82F0,
+	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE642, (q15_t)0x829D,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE7CC, (q15_t)0x824F,
+	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE957, (q15_t)0x8205,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEAE4, (q15_t)0x81C0,
+	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC71, (q15_t)0x8180,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xEDFE, (q15_t)0x8145,
+	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF8D, (q15_t)0x810F,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF11C, (q15_t)0x80DE,
+	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF2AC, (q15_t)0x80B2,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF43C, (q15_t)0x808A,
+	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF5CC, (q15_t)0x8068,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF75D, (q15_t)0x804A,
+	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF8EF, (q15_t)0x8031,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA80, (q15_t)0x801E,
+	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFC12, (q15_t)0x800F,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFDA4, (q15_t)0x8005,
+	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFF36, (q15_t)0x8000
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 2048, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_2048_q15[3072] = {
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0064,
+	(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFE, (q15_t)0x012D,
+	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01F6,
+	(q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF8, (q15_t)0x02BF,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF3, (q15_t)0x0388,
+	(q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FED, (q15_t)0x0451,
+	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE5, (q15_t)0x051A,
+	(q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDD, (q15_t)0x05E3,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD3, (q15_t)0x06AC,
+	(q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FC8, (q15_t)0x0775,
+	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBC, (q15_t)0x083D,
+	(q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FAE, (q15_t)0x0906,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7F9F, (q15_t)0x09CE,
+	(q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F8F, (q15_t)0x0A97,
+	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F7E, (q15_t)0x0B5F,
+	(q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F6B, (q15_t)0x0C27,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F58, (q15_t)0x0CEF,
+	(q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F43, (q15_t)0x0DB7,
+	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F2D, (q15_t)0x0E7F,
+	(q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F15, (q15_t)0x0F47,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7EFD, (q15_t)0x100E,
+	(q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7EE3, (q15_t)0x10D6,
+	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7EC8, (q15_t)0x119D,
+	(q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EAB, (q15_t)0x1264,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E8E, (q15_t)0x132B,
+	(q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E6F, (q15_t)0x13F2,
+	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E4F, (q15_t)0x14B8,
+	(q15_t)0x7E3F, (q15_t)0x151B, (q15_t)0x7E2E, (q15_t)0x157F,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7E0C, (q15_t)0x1645,
+	(q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DE8, (q15_t)0x170A,
+	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DC3, (q15_t)0x17D0,
+	(q15_t)0x7DB0, (q15_t)0x1833, (q15_t)0x7D9D, (q15_t)0x1896,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D76, (q15_t)0x195B,
+	(q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D4E, (q15_t)0x1A20,
+	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D24, (q15_t)0x1AE4,
+	(q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7CF9, (q15_t)0x1BA9,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CCD, (q15_t)0x1C6D,
+	(q15_t)0x7CB7, (q15_t)0x1CCF, (q15_t)0x7CA0, (q15_t)0x1D31,
+	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C71, (q15_t)0x1DF5,
+	(q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C42, (q15_t)0x1EB8,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C11, (q15_t)0x1F7B,
+	(q15_t)0x7BF8, (q15_t)0x1FDC, (q15_t)0x7BDF, (q15_t)0x203E,
+	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7BAC, (q15_t)0x2100,
+	(q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B77, (q15_t)0x21C2,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B42, (q15_t)0x2284,
+	(q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B0B, (q15_t)0x2345,
+	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AD3, (q15_t)0x2407,
+	(q15_t)0x7AB6, (q15_t)0x2467, (q15_t)0x7A9A, (q15_t)0x24C7,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A5F, (q15_t)0x2588,
+	(q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A24, (q15_t)0x2648,
+	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79E7, (q15_t)0x2707,
+	(q15_t)0x79C8, (q15_t)0x2767, (q15_t)0x79A9, (q15_t)0x27C7,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x796A, (q15_t)0x2886,
+	(q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x792A, (q15_t)0x2944,
+	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78E8, (q15_t)0x2A02,
+	(q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78A6, (q15_t)0x2AC0,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7862, (q15_t)0x2B7D,
+	(q15_t)0x7840, (q15_t)0x2BDC, (q15_t)0x781D, (q15_t)0x2C3A,
+	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77D7, (q15_t)0x2CF7,
+	(q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x7790, (q15_t)0x2DB3,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x7747, (q15_t)0x2E6E,
+	(q15_t)0x7723, (q15_t)0x2ECC, (q15_t)0x76FE, (q15_t)0x2F29,
+	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x76B3, (q15_t)0x2FE4,
+	(q15_t)0x768E, (q15_t)0x3041, (q15_t)0x7668, (q15_t)0x309E,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x761B, (q15_t)0x3158,
+	(q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75CC, (q15_t)0x3211,
+	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x757D, (q15_t)0x32CA,
+	(q15_t)0x7555, (q15_t)0x3326, (q15_t)0x752D, (q15_t)0x3382,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74DB, (q15_t)0x343A,
+	(q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x7489, (q15_t)0x34F2,
+	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x7435, (q15_t)0x35A8,
+	(q15_t)0x740B, (q15_t)0x3604, (q15_t)0x73E0, (q15_t)0x365F,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x738A, (q15_t)0x3714,
+	(q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7333, (q15_t)0x37CA,
+	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72DB, (q15_t)0x387E,
+	(q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7282, (q15_t)0x3932,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x7227, (q15_t)0x39E6,
+	(q15_t)0x71FA, (q15_t)0x3A40, (q15_t)0x71CC, (q15_t)0x3A99,
+	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x716F, (q15_t)0x3B4C,
+	(q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7112, (q15_t)0x3BFD,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70B3, (q15_t)0x3CAF,
+	(q15_t)0x7083, (q15_t)0x3D07, (q15_t)0x7053, (q15_t)0x3D60,
+	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x6FF2, (q15_t)0x3E10,
+	(q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6F90, (q15_t)0x3EBF,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F2D, (q15_t)0x3F6E,
+	(q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EC9, (q15_t)0x401D,
+	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E63, (q15_t)0x40CA,
+	(q15_t)0x6E30, (q15_t)0x4121, (q15_t)0x6DFD, (q15_t)0x4177,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6D96, (q15_t)0x4224,
+	(q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D2D, (q15_t)0x42D0,
+	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CC4, (q15_t)0x437B,
+	(q15_t)0x6C8F, (q15_t)0x43D0, (q15_t)0x6C59, (q15_t)0x4425,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6BEE, (q15_t)0x44CF,
+	(q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B81, (q15_t)0x4578,
+	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B13, (q15_t)0x4621,
+	(q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AA5, (q15_t)0x46C9,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x6A35, (q15_t)0x4770,
+	(q15_t)0x69FD, (q15_t)0x47C3, (q15_t)0x69C4, (q15_t)0x4816,
+	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x6953, (q15_t)0x48BC,
+	(q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68E0, (q15_t)0x4961,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x686C, (q15_t)0x4A06,
+	(q15_t)0x6832, (q15_t)0x4A58, (q15_t)0x67F7, (q15_t)0x4AA9,
+	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x6782, (q15_t)0x4B4C,
+	(q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x670B, (q15_t)0x4BEF,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x6693, (q15_t)0x4C90,
+	(q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x661A, (q15_t)0x4D31,
+	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x65A0, (q15_t)0x4DD1,
+	(q15_t)0x6563, (q15_t)0x4E21, (q15_t)0x6526, (q15_t)0x4E70,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x64AA, (q15_t)0x4F0F,
+	(q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x642D, (q15_t)0x4FAC,
+	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63B0, (q15_t)0x5049,
+	(q15_t)0x6371, (q15_t)0x5097, (q15_t)0x6331, (q15_t)0x50E5,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x62B2, (q15_t)0x5181,
+	(q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x6231, (q15_t)0x521C,
+	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61B0, (q15_t)0x52B5,
+	(q15_t)0x616F, (q15_t)0x5302, (q15_t)0x612D, (q15_t)0x534E,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x60AA, (q15_t)0x53E7,
+	(q15_t)0x6068, (q15_t)0x5433, (q15_t)0x6026, (q15_t)0x547E,
+	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5FA0, (q15_t)0x5515,
+	(q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F1A, (q15_t)0x55AB,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5E93, (q15_t)0x5640,
+	(q15_t)0x5E50, (q15_t)0x568A, (q15_t)0x5E0B, (q15_t)0x56D4,
+	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5D83, (q15_t)0x5767,
+	(q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5CF9, (q15_t)0x57F9,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C6E, (q15_t)0x588B,
+	(q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5BE3, (q15_t)0x591C,
+	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B56, (q15_t)0x59AC,
+	(q15_t)0x5B10, (q15_t)0x59F3, (q15_t)0x5AC9, (q15_t)0x5A3B,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5A3B, (q15_t)0x5AC9,
+	(q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59AC, (q15_t)0x5B56,
+	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x591C, (q15_t)0x5BE3,
+	(q15_t)0x58D4, (q15_t)0x5C29, (q15_t)0x588B, (q15_t)0x5C6E,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x57F9, (q15_t)0x5CF9,
+	(q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x5767, (q15_t)0x5D83,
+	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56D4, (q15_t)0x5E0B,
+	(q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5640, (q15_t)0x5E93,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x55AB, (q15_t)0x5F1A,
+	(q15_t)0x5560, (q15_t)0x5F5E, (q15_t)0x5515, (q15_t)0x5FA0,
+	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x547E, (q15_t)0x6026,
+	(q15_t)0x5433, (q15_t)0x6068, (q15_t)0x53E7, (q15_t)0x60AA,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x534E, (q15_t)0x612D,
+	(q15_t)0x5302, (q15_t)0x616F, (q15_t)0x52B5, (q15_t)0x61B0,
+	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x521C, (q15_t)0x6231,
+	(q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x5181, (q15_t)0x62B2,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x50E5, (q15_t)0x6331,
+	(q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5049, (q15_t)0x63B0,
+	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4FAC, (q15_t)0x642D,
+	(q15_t)0x4F5E, (q15_t)0x646C, (q15_t)0x4F0F, (q15_t)0x64AA,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E70, (q15_t)0x6526,
+	(q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DD1, (q15_t)0x65A0,
+	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D31, (q15_t)0x661A,
+	(q15_t)0x4CE1, (q15_t)0x6657, (q15_t)0x4C90, (q15_t)0x6693,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4BEF, (q15_t)0x670B,
+	(q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4B4C, (q15_t)0x6782,
+	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AA9, (q15_t)0x67F7,
+	(q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A06, (q15_t)0x686C,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x4961, (q15_t)0x68E0,
+	(q15_t)0x490F, (q15_t)0x6919, (q15_t)0x48BC, (q15_t)0x6953,
+	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x4816, (q15_t)0x69C4,
+	(q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x4770, (q15_t)0x6A35,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46C9, (q15_t)0x6AA5,
+	(q15_t)0x4675, (q15_t)0x6ADC, (q15_t)0x4621, (q15_t)0x6B13,
+	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x4578, (q15_t)0x6B81,
+	(q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x44CF, (q15_t)0x6BEE,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4425, (q15_t)0x6C59,
+	(q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x437B, (q15_t)0x6CC4,
+	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x42D0, (q15_t)0x6D2D,
+	(q15_t)0x427A, (q15_t)0x6D62, (q15_t)0x4224, (q15_t)0x6D96,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x4177, (q15_t)0x6DFD,
+	(q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40CA, (q15_t)0x6E63,
+	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x401D, (q15_t)0x6EC9,
+	(q15_t)0x3FC5, (q15_t)0x6EFB, (q15_t)0x3F6E, (q15_t)0x6F2D,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3EBF, (q15_t)0x6F90,
+	(q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3E10, (q15_t)0x6FF2,
+	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D60, (q15_t)0x7053,
+	(q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CAF, (q15_t)0x70B3,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3BFD, (q15_t)0x7112,
+	(q15_t)0x3BA5, (q15_t)0x7141, (q15_t)0x3B4C, (q15_t)0x716F,
+	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3A99, (q15_t)0x71CC,
+	(q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x39E6, (q15_t)0x7227,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x3932, (q15_t)0x7282,
+	(q15_t)0x38D8, (q15_t)0x72AF, (q15_t)0x387E, (q15_t)0x72DB,
+	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x37CA, (q15_t)0x7333,
+	(q15_t)0x376F, (q15_t)0x735F, (q15_t)0x3714, (q15_t)0x738A,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x365F, (q15_t)0x73E0,
+	(q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35A8, (q15_t)0x7435,
+	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x34F2, (q15_t)0x7489,
+	(q15_t)0x3496, (q15_t)0x74B2, (q15_t)0x343A, (q15_t)0x74DB,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x3382, (q15_t)0x752D,
+	(q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32CA, (q15_t)0x757D,
+	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3211, (q15_t)0x75CC,
+	(q15_t)0x31B5, (q15_t)0x75F4, (q15_t)0x3158, (q15_t)0x761B,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x309E, (q15_t)0x7668,
+	(q15_t)0x3041, (q15_t)0x768E, (q15_t)0x2FE4, (q15_t)0x76B3,
+	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F29, (q15_t)0x76FE,
+	(q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E6E, (q15_t)0x7747,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2DB3, (q15_t)0x7790,
+	(q15_t)0x2D55, (q15_t)0x77B4, (q15_t)0x2CF7, (q15_t)0x77D7,
+	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2C3A, (q15_t)0x781D,
+	(q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2B7D, (q15_t)0x7862,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AC0, (q15_t)0x78A6,
+	(q15_t)0x2A61, (q15_t)0x78C7, (q15_t)0x2A02, (q15_t)0x78E8,
+	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2944, (q15_t)0x792A,
+	(q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x2886, (q15_t)0x796A,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27C7, (q15_t)0x79A9,
+	(q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2707, (q15_t)0x79E7,
+	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x2648, (q15_t)0x7A24,
+	(q15_t)0x25E8, (q15_t)0x7A42, (q15_t)0x2588, (q15_t)0x7A5F,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x24C7, (q15_t)0x7A9A,
+	(q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2407, (q15_t)0x7AD3,
+	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2345, (q15_t)0x7B0B,
+	(q15_t)0x22E5, (q15_t)0x7B26, (q15_t)0x2284, (q15_t)0x7B42,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x21C2, (q15_t)0x7B77,
+	(q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x2100, (q15_t)0x7BAC,
+	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x203E, (q15_t)0x7BDF,
+	(q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1F7B, (q15_t)0x7C11,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1EB8, (q15_t)0x7C42,
+	(q15_t)0x1E56, (q15_t)0x7C5A, (q15_t)0x1DF5, (q15_t)0x7C71,
+	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1D31, (q15_t)0x7CA0,
+	(q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C6D, (q15_t)0x7CCD,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BA9, (q15_t)0x7CF9,
+	(q15_t)0x1B47, (q15_t)0x7D0F, (q15_t)0x1AE4, (q15_t)0x7D24,
+	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x1A20, (q15_t)0x7D4E,
+	(q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x195B, (q15_t)0x7D76,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x1896, (q15_t)0x7D9D,
+	(q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x17D0, (q15_t)0x7DC3,
+	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x170A, (q15_t)0x7DE8,
+	(q15_t)0x16A8, (q15_t)0x7DFA, (q15_t)0x1645, (q15_t)0x7E0C,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x157F, (q15_t)0x7E2E,
+	(q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14B8, (q15_t)0x7E4F,
+	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x13F2, (q15_t)0x7E6F,
+	(q15_t)0x138E, (q15_t)0x7E7F, (q15_t)0x132B, (q15_t)0x7E8E,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1264, (q15_t)0x7EAB,
+	(q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x119D, (q15_t)0x7EC8,
+	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x10D6, (q15_t)0x7EE3,
+	(q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x100E, (q15_t)0x7EFD,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0F47, (q15_t)0x7F15,
+	(q15_t)0x0EE3, (q15_t)0x7F21, (q15_t)0x0E7F, (q15_t)0x7F2D,
+	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0DB7, (q15_t)0x7F43,
+	(q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0CEF, (q15_t)0x7F58,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C27, (q15_t)0x7F6B,
+	(q15_t)0x0BC3, (q15_t)0x7F75, (q15_t)0x0B5F, (q15_t)0x7F7E,
+	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0A97, (q15_t)0x7F8F,
+	(q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x09CE, (q15_t)0x7F9F,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0906, (q15_t)0x7FAE,
+	(q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x083D, (q15_t)0x7FBC,
+	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x0775, (q15_t)0x7FC8,
+	(q15_t)0x0710, (q15_t)0x7FCE, (q15_t)0x06AC, (q15_t)0x7FD3,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x05E3, (q15_t)0x7FDD,
+	(q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x051A, (q15_t)0x7FE5,
+	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0451, (q15_t)0x7FED,
+	(q15_t)0x03ED, (q15_t)0x7FF0, (q15_t)0x0388, (q15_t)0x7FF3,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x02BF, (q15_t)0x7FF8,
+	(q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x01F6, (q15_t)0x7FFC,
+	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x012D, (q15_t)0x7FFE,
+	(q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFF9B, (q15_t)0x7FFF,
+	(q15_t)0xFF36, (q15_t)0x7FFF, (q15_t)0xFED2, (q15_t)0x7FFE,
+	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFE09, (q15_t)0x7FFC,
+	(q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD40, (q15_t)0x7FF8,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFC77, (q15_t)0x7FF3,
+	(q15_t)0xFC12, (q15_t)0x7FF0, (q15_t)0xFBAE, (q15_t)0x7FED,
+	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFAE5, (q15_t)0x7FE5,
+	(q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xFA1C, (q15_t)0x7FDD,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF953, (q15_t)0x7FD3,
+	(q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF88A, (q15_t)0x7FC8,
+	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF7C2, (q15_t)0x7FBC,
+	(q15_t)0xF75D, (q15_t)0x7FB5, (q15_t)0xF6F9, (q15_t)0x7FAE,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF631, (q15_t)0x7F9F,
+	(q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF568, (q15_t)0x7F8F,
+	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4A0, (q15_t)0x7F7E,
+	(q15_t)0xF43C, (q15_t)0x7F75, (q15_t)0xF3D8, (q15_t)0x7F6B,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF310, (q15_t)0x7F58,
+	(q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF248, (q15_t)0x7F43,
+	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF180, (q15_t)0x7F2D,
+	(q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0B8, (q15_t)0x7F15,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xEFF1, (q15_t)0x7EFD,
+	(q15_t)0xEF8D, (q15_t)0x7EF0, (q15_t)0xEF29, (q15_t)0x7EE3,
+	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEE62, (q15_t)0x7EC8,
+	(q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xED9B, (q15_t)0x7EAB,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xECD4, (q15_t)0x7E8E,
+	(q15_t)0xEC71, (q15_t)0x7E7F, (q15_t)0xEC0D, (q15_t)0x7E6F,
+	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEB47, (q15_t)0x7E4F,
+	(q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEA80, (q15_t)0x7E2E,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9BA, (q15_t)0x7E0C,
+	(q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE8F5, (q15_t)0x7DE8,
+	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE82F, (q15_t)0x7DC3,
+	(q15_t)0xE7CC, (q15_t)0x7DB0, (q15_t)0xE769, (q15_t)0x7D9D,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE6A4, (q15_t)0x7D76,
+	(q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE5DF, (q15_t)0x7D4E,
+	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE51B, (q15_t)0x7D24,
+	(q15_t)0xE4B8, (q15_t)0x7D0F, (q15_t)0xE456, (q15_t)0x7CF9,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE392, (q15_t)0x7CCD,
+	(q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE2CE, (q15_t)0x7CA0,
+	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE20A, (q15_t)0x7C71,
+	(q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE147, (q15_t)0x7C42,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE084, (q15_t)0x7C11,
+	(q15_t)0xE023, (q15_t)0x7BF8, (q15_t)0xDFC1, (q15_t)0x7BDF,
+	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDEFF, (q15_t)0x7BAC,
+	(q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE3D, (q15_t)0x7B77,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDD7B, (q15_t)0x7B42,
+	(q15_t)0xDD1A, (q15_t)0x7B26, (q15_t)0xDCBA, (q15_t)0x7B0B,
+	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDBF8, (q15_t)0x7AD3,
+	(q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDB38, (q15_t)0x7A9A,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDA77, (q15_t)0x7A5F,
+	(q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9B7, (q15_t)0x7A24,
+	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD8F8, (q15_t)0x79E7,
+	(q15_t)0xD898, (q15_t)0x79C8, (q15_t)0xD838, (q15_t)0x79A9,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD779, (q15_t)0x796A,
+	(q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6BB, (q15_t)0x792A,
+	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD5FD, (q15_t)0x78E8,
+	(q15_t)0xD59E, (q15_t)0x78C7, (q15_t)0xD53F, (q15_t)0x78A6,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD482, (q15_t)0x7862,
+	(q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD3C5, (q15_t)0x781D,
+	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD308, (q15_t)0x77D7,
+	(q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD24C, (q15_t)0x7790,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD191, (q15_t)0x7747,
+	(q15_t)0xD133, (q15_t)0x7723, (q15_t)0xD0D6, (q15_t)0x76FE,
+	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xD01B, (q15_t)0x76B3,
+	(q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF61, (q15_t)0x7668,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCEA7, (q15_t)0x761B,
+	(q15_t)0xCE4A, (q15_t)0x75F4, (q15_t)0xCDEE, (q15_t)0x75CC,
+	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCD35, (q15_t)0x757D,
+	(q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCC7D, (q15_t)0x752D,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBC5, (q15_t)0x74DB,
+	(q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB0D, (q15_t)0x7489,
+	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xCA57, (q15_t)0x7435,
+	(q15_t)0xC9FB, (q15_t)0x740B, (q15_t)0xC9A0, (q15_t)0x73E0,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC8EB, (q15_t)0x738A,
+	(q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC835, (q15_t)0x7333,
+	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC781, (q15_t)0x72DB,
+	(q15_t)0xC727, (q15_t)0x72AF, (q15_t)0xC6CD, (q15_t)0x7282,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC619, (q15_t)0x7227,
+	(q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC566, (q15_t)0x71CC,
+	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4B3, (q15_t)0x716F,
+	(q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC402, (q15_t)0x7112,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC350, (q15_t)0x70B3,
+	(q15_t)0xC2F8, (q15_t)0x7083, (q15_t)0xC29F, (q15_t)0x7053,
+	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC1EF, (q15_t)0x6FF2,
+	(q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC140, (q15_t)0x6F90,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC091, (q15_t)0x6F2D,
+	(q15_t)0xC03A, (q15_t)0x6EFB, (q15_t)0xBFE2, (q15_t)0x6EC9,
+	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBF35, (q15_t)0x6E63,
+	(q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBE88, (q15_t)0x6DFD,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBDDB, (q15_t)0x6D96,
+	(q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD2F, (q15_t)0x6D2D,
+	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBC84, (q15_t)0x6CC4,
+	(q15_t)0xBC2F, (q15_t)0x6C8F, (q15_t)0xBBDA, (q15_t)0x6C59,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBB30, (q15_t)0x6BEE,
+	(q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBA87, (q15_t)0x6B81,
+	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xB9DE, (q15_t)0x6B13,
+	(q15_t)0xB98A, (q15_t)0x6ADC, (q15_t)0xB936, (q15_t)0x6AA5,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB88F, (q15_t)0x6A35,
+	(q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB7E9, (q15_t)0x69C4,
+	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB743, (q15_t)0x6953,
+	(q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB69E, (q15_t)0x68E0,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB5F9, (q15_t)0x686C,
+	(q15_t)0xB5A7, (q15_t)0x6832, (q15_t)0xB556, (q15_t)0x67F7,
+	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB4B3, (q15_t)0x6782,
+	(q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB410, (q15_t)0x670B,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB36F, (q15_t)0x6693,
+	(q15_t)0xB31E, (q15_t)0x6657, (q15_t)0xB2CE, (q15_t)0x661A,
+	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB22E, (q15_t)0x65A0,
+	(q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB18F, (q15_t)0x6526,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB0F0, (q15_t)0x64AA,
+	(q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB053, (q15_t)0x642D,
+	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAFB6, (q15_t)0x63B0,
+	(q15_t)0xAF68, (q15_t)0x6371, (q15_t)0xAF1A, (q15_t)0x6331,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAE7E, (q15_t)0x62B2,
+	(q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xADE3, (q15_t)0x6231,
+	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD4A, (q15_t)0x61B0,
+	(q15_t)0xACFD, (q15_t)0x616F, (q15_t)0xACB1, (q15_t)0x612D,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAC18, (q15_t)0x60AA,
+	(q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xAB81, (q15_t)0x6026,
+	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAAEA, (q15_t)0x5FA0,
+	(q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA54, (q15_t)0x5F1A,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA9BF, (q15_t)0x5E93,
+	(q15_t)0xA975, (q15_t)0x5E50, (q15_t)0xA92B, (q15_t)0x5E0B,
+	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA898, (q15_t)0x5D83,
+	(q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA806, (q15_t)0x5CF9,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA774, (q15_t)0x5C6E,
+	(q15_t)0xA72B, (q15_t)0x5C29, (q15_t)0xA6E3, (q15_t)0x5BE3,
+	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA653, (q15_t)0x5B56,
+	(q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA5C4, (q15_t)0x5AC9,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA536, (q15_t)0x5A3B,
+	(q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4A9, (q15_t)0x59AC,
+	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA41C, (q15_t)0x591C,
+	(q15_t)0xA3D6, (q15_t)0x58D4, (q15_t)0xA391, (q15_t)0x588B,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA306, (q15_t)0x57F9,
+	(q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA27C, (q15_t)0x5767,
+	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA1F4, (q15_t)0x56D4,
+	(q15_t)0xA1AF, (q15_t)0x568A, (q15_t)0xA16C, (q15_t)0x5640,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA0E5, (q15_t)0x55AB,
+	(q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA05F, (q15_t)0x5515,
+	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FD9, (q15_t)0x547E,
+	(q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F55, (q15_t)0x53E7,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9ED2, (q15_t)0x534E,
+	(q15_t)0x9E90, (q15_t)0x5302, (q15_t)0x9E4F, (q15_t)0x52B5,
+	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9DCE, (q15_t)0x521C,
+	(q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D4D, (q15_t)0x5181,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CCE, (q15_t)0x50E5,
+	(q15_t)0x9C8E, (q15_t)0x5097, (q15_t)0x9C4F, (q15_t)0x5049,
+	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9BD2, (q15_t)0x4FAC,
+	(q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B55, (q15_t)0x4F0F,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AD9, (q15_t)0x4E70,
+	(q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A5F, (q15_t)0x4DD1,
+	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x99E5, (q15_t)0x4D31,
+	(q15_t)0x99A8, (q15_t)0x4CE1, (q15_t)0x996C, (q15_t)0x4C90,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x98F4, (q15_t)0x4BEF,
+	(q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x987D, (q15_t)0x4B4C,
+	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9808, (q15_t)0x4AA9,
+	(q15_t)0x97CD, (q15_t)0x4A58, (q15_t)0x9793, (q15_t)0x4A06,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x971F, (q15_t)0x4961,
+	(q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x96AC, (q15_t)0x48BC,
+	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x963B, (q15_t)0x4816,
+	(q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95CA, (q15_t)0x4770,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x955A, (q15_t)0x46C9,
+	(q15_t)0x9523, (q15_t)0x4675, (q15_t)0x94EC, (q15_t)0x4621,
+	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x947E, (q15_t)0x4578,
+	(q15_t)0x9447, (q15_t)0x4524, (q15_t)0x9411, (q15_t)0x44CF,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93A6, (q15_t)0x4425,
+	(q15_t)0x9370, (q15_t)0x43D0, (q15_t)0x933B, (q15_t)0x437B,
+	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x92D2, (q15_t)0x42D0,
+	(q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9269, (q15_t)0x4224,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x9202, (q15_t)0x4177,
+	(q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x919C, (q15_t)0x40CA,
+	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9136, (q15_t)0x401D,
+	(q15_t)0x9104, (q15_t)0x3FC5, (q15_t)0x90D2, (q15_t)0x3F6E,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x906F, (q15_t)0x3EBF,
+	(q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x900D, (q15_t)0x3E10,
+	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FAC, (q15_t)0x3D60,
+	(q15_t)0x8F7C, (q15_t)0x3D07, (q15_t)0x8F4C, (q15_t)0x3CAF,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8EED, (q15_t)0x3BFD,
+	(q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8E90, (q15_t)0x3B4C,
+	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E33, (q15_t)0x3A99,
+	(q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DD8, (q15_t)0x39E6,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D7D, (q15_t)0x3932,
+	(q15_t)0x8D50, (q15_t)0x38D8, (q15_t)0x8D24, (q15_t)0x387E,
+	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CCC, (q15_t)0x37CA,
+	(q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C75, (q15_t)0x3714,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C1F, (q15_t)0x365F,
+	(q15_t)0x8BF4, (q15_t)0x3604, (q15_t)0x8BCA, (q15_t)0x35A8,
+	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B76, (q15_t)0x34F2,
+	(q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8B24, (q15_t)0x343A,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AD2, (q15_t)0x3382,
+	(q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A82, (q15_t)0x32CA,
+	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A33, (q15_t)0x3211,
+	(q15_t)0x8A0B, (q15_t)0x31B5, (q15_t)0x89E4, (q15_t)0x3158,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x8997, (q15_t)0x309E,
+	(q15_t)0x8971, (q15_t)0x3041, (q15_t)0x894C, (q15_t)0x2FE4,
+	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8901, (q15_t)0x2F29,
+	(q15_t)0x88DC, (q15_t)0x2ECC, (q15_t)0x88B8, (q15_t)0x2E6E,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x886F, (q15_t)0x2DB3,
+	(q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x8828, (q15_t)0x2CF7,
+	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87E2, (q15_t)0x2C3A,
+	(q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x879D, (q15_t)0x2B7D,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x8759, (q15_t)0x2AC0,
+	(q15_t)0x8738, (q15_t)0x2A61, (q15_t)0x8717, (q15_t)0x2A02,
+	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86D5, (q15_t)0x2944,
+	(q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x8695, (q15_t)0x2886,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8656, (q15_t)0x27C7,
+	(q15_t)0x8637, (q15_t)0x2767, (q15_t)0x8618, (q15_t)0x2707,
+	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85DB, (q15_t)0x2648,
+	(q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x85A0, (q15_t)0x2588,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8565, (q15_t)0x24C7,
+	(q15_t)0x8549, (q15_t)0x2467, (q15_t)0x852C, (q15_t)0x2407,
+	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x84F4, (q15_t)0x2345,
+	(q15_t)0x84D9, (q15_t)0x22E5, (q15_t)0x84BD, (q15_t)0x2284,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x8488, (q15_t)0x21C2,
+	(q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8453, (q15_t)0x2100,
+	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x8420, (q15_t)0x203E,
+	(q15_t)0x8407, (q15_t)0x1FDC, (q15_t)0x83EE, (q15_t)0x1F7B,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83BD, (q15_t)0x1EB8,
+	(q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x838E, (q15_t)0x1DF5,
+	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x835F, (q15_t)0x1D31,
+	(q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x8332, (q15_t)0x1C6D,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x8306, (q15_t)0x1BA9,
+	(q15_t)0x82F0, (q15_t)0x1B47, (q15_t)0x82DB, (q15_t)0x1AE4,
+	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x82B1, (q15_t)0x1A20,
+	(q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8289, (q15_t)0x195B,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x8262, (q15_t)0x1896,
+	(q15_t)0x824F, (q15_t)0x1833, (q15_t)0x823C, (q15_t)0x17D0,
+	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8217, (q15_t)0x170A,
+	(q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81F3, (q15_t)0x1645,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D1, (q15_t)0x157F,
+	(q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B0, (q15_t)0x14B8,
+	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8190, (q15_t)0x13F2,
+	(q15_t)0x8180, (q15_t)0x138E, (q15_t)0x8171, (q15_t)0x132B,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x8154, (q15_t)0x1264,
+	(q15_t)0x8145, (q15_t)0x1201, (q15_t)0x8137, (q15_t)0x119D,
+	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x811C, (q15_t)0x10D6,
+	(q15_t)0x810F, (q15_t)0x1072, (q15_t)0x8102, (q15_t)0x100E,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80EA, (q15_t)0x0F47,
+	(q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80D2, (q15_t)0x0E7F,
+	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80BC, (q15_t)0x0DB7,
+	(q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80A7, (q15_t)0x0CEF,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8094, (q15_t)0x0C27,
+	(q15_t)0x808A, (q15_t)0x0BC3, (q15_t)0x8081, (q15_t)0x0B5F,
+	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8070, (q15_t)0x0A97,
+	(q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8060, (q15_t)0x09CE,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8051, (q15_t)0x0906,
+	(q15_t)0x804A, (q15_t)0x08A2, (q15_t)0x8043, (q15_t)0x083D,
+	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x8037, (q15_t)0x0775,
+	(q15_t)0x8031, (q15_t)0x0710, (q15_t)0x802C, (q15_t)0x06AC,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8022, (q15_t)0x05E3,
+	(q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801A, (q15_t)0x051A,
+	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x8012, (q15_t)0x0451,
+	(q15_t)0x800F, (q15_t)0x03ED, (q15_t)0x800C, (q15_t)0x0388,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8007, (q15_t)0x02BF,
+	(q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8003, (q15_t)0x01F6,
+	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x012D,
+	(q15_t)0x8000, (q15_t)0x00C9, (q15_t)0x8000, (q15_t)0x0064,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFF9B,
+	(q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8001, (q15_t)0xFED2,
+	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003, (q15_t)0xFE09,
+	(q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8007, (q15_t)0xFD40,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800C, (q15_t)0xFC77,
+	(q15_t)0x800F, (q15_t)0xFC12, (q15_t)0x8012, (q15_t)0xFBAE,
+	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x801A, (q15_t)0xFAE5,
+	(q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8022, (q15_t)0xFA1C,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x802C, (q15_t)0xF953,
+	(q15_t)0x8031, (q15_t)0xF8EF, (q15_t)0x8037, (q15_t)0xF88A,
+	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8043, (q15_t)0xF7C2,
+	(q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x8051, (q15_t)0xF6F9,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x8060, (q15_t)0xF631,
+	(q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x8070, (q15_t)0xF568,
+	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x8081, (q15_t)0xF4A0,
+	(q15_t)0x808A, (q15_t)0xF43C, (q15_t)0x8094, (q15_t)0xF3D8,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80A7, (q15_t)0xF310,
+	(q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80BC, (q15_t)0xF248,
+	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80D2, (q15_t)0xF180,
+	(q15_t)0x80DE, (q15_t)0xF11C, (q15_t)0x80EA, (q15_t)0xF0B8,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x8102, (q15_t)0xEFF1,
+	(q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x811C, (q15_t)0xEF29,
+	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8137, (q15_t)0xEE62,
+	(q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x8154, (q15_t)0xED9B,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x8171, (q15_t)0xECD4,
+	(q15_t)0x8180, (q15_t)0xEC71, (q15_t)0x8190, (q15_t)0xEC0D,
+	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81B0, (q15_t)0xEB47,
+	(q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81D1, (q15_t)0xEA80,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81F3, (q15_t)0xE9BA,
+	(q15_t)0x8205, (q15_t)0xE957, (q15_t)0x8217, (q15_t)0xE8F5,
+	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x823C, (q15_t)0xE82F,
+	(q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8262, (q15_t)0xE769,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x8289, (q15_t)0xE6A4,
+	(q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82B1, (q15_t)0xE5DF,
+	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82DB, (q15_t)0xE51B,
+	(q15_t)0x82F0, (q15_t)0xE4B8, (q15_t)0x8306, (q15_t)0xE456,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8332, (q15_t)0xE392,
+	(q15_t)0x8348, (q15_t)0xE330, (q15_t)0x835F, (q15_t)0xE2CE,
+	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x838E, (q15_t)0xE20A,
+	(q15_t)0x83A5, (q15_t)0xE1A9, (q15_t)0x83BD, (q15_t)0xE147,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x83EE, (q15_t)0xE084,
+	(q15_t)0x8407, (q15_t)0xE023, (q15_t)0x8420, (q15_t)0xDFC1,
+	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8453, (q15_t)0xDEFF,
+	(q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x8488, (q15_t)0xDE3D,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84BD, (q15_t)0xDD7B,
+	(q15_t)0x84D9, (q15_t)0xDD1A, (q15_t)0x84F4, (q15_t)0xDCBA,
+	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x852C, (q15_t)0xDBF8,
+	(q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8565, (q15_t)0xDB38,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x85A0, (q15_t)0xDA77,
+	(q15_t)0x85BD, (q15_t)0xDA17, (q15_t)0x85DB, (q15_t)0xD9B7,
+	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8618, (q15_t)0xD8F8,
+	(q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8656, (q15_t)0xD838,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8695, (q15_t)0xD779,
+	(q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86D5, (q15_t)0xD6BB,
+	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8717, (q15_t)0xD5FD,
+	(q15_t)0x8738, (q15_t)0xD59E, (q15_t)0x8759, (q15_t)0xD53F,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x879D, (q15_t)0xD482,
+	(q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87E2, (q15_t)0xD3C5,
+	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8828, (q15_t)0xD308,
+	(q15_t)0x884B, (q15_t)0xD2AA, (q15_t)0x886F, (q15_t)0xD24C,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88B8, (q15_t)0xD191,
+	(q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x8901, (q15_t)0xD0D6,
+	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x894C, (q15_t)0xD01B,
+	(q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8997, (q15_t)0xCF61,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x89E4, (q15_t)0xCEA7,
+	(q15_t)0x8A0B, (q15_t)0xCE4A, (q15_t)0x8A33, (q15_t)0xCDEE,
+	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8A82, (q15_t)0xCD35,
+	(q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8AD2, (q15_t)0xCC7D,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B24, (q15_t)0xCBC5,
+	(q15_t)0x8B4D, (q15_t)0xCB69, (q15_t)0x8B76, (q15_t)0xCB0D,
+	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BCA, (q15_t)0xCA57,
+	(q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C1F, (q15_t)0xC9A0,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C75, (q15_t)0xC8EB,
+	(q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CCC, (q15_t)0xC835,
+	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D24, (q15_t)0xC781,
+	(q15_t)0x8D50, (q15_t)0xC727, (q15_t)0x8D7D, (q15_t)0xC6CD,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8DD8, (q15_t)0xC619,
+	(q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E33, (q15_t)0xC566,
+	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E90, (q15_t)0xC4B3,
+	(q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8EED, (q15_t)0xC402,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F4C, (q15_t)0xC350,
+	(q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8FAC, (q15_t)0xC29F,
+	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x900D, (q15_t)0xC1EF,
+	(q15_t)0x903E, (q15_t)0xC197, (q15_t)0x906F, (q15_t)0xC140,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x90D2, (q15_t)0xC091,
+	(q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x9136, (q15_t)0xBFE2,
+	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x919C, (q15_t)0xBF35,
+	(q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x9202, (q15_t)0xBE88,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x9269, (q15_t)0xBDDB,
+	(q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x92D2, (q15_t)0xBD2F,
+	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x933B, (q15_t)0xBC84,
+	(q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x93A6, (q15_t)0xBBDA,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x9411, (q15_t)0xBB30,
+	(q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x947E, (q15_t)0xBA87,
+	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x94EC, (q15_t)0xB9DE,
+	(q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x955A, (q15_t)0xB936,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95CA, (q15_t)0xB88F,
+	(q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x963B, (q15_t)0xB7E9,
+	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x96AC, (q15_t)0xB743,
+	(q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x971F, (q15_t)0xB69E,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9793, (q15_t)0xB5F9,
+	(q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x9808, (q15_t)0xB556,
+	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x987D, (q15_t)0xB4B3,
+	(q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98F4, (q15_t)0xB410,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x996C, (q15_t)0xB36F,
+	(q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99E5, (q15_t)0xB2CE,
+	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A5F, (q15_t)0xB22E,
+	(q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9AD9, (q15_t)0xB18F,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B55, (q15_t)0xB0F0,
+	(q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9BD2, (q15_t)0xB053,
+	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C4F, (q15_t)0xAFB6,
+	(q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CCE, (q15_t)0xAF1A,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D4D, (q15_t)0xAE7E,
+	(q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DCE, (q15_t)0xADE3,
+	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E4F, (q15_t)0xAD4A,
+	(q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9ED2, (q15_t)0xACB1,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F55, (q15_t)0xAC18,
+	(q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FD9, (q15_t)0xAB81,
+	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA05F, (q15_t)0xAAEA,
+	(q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA0E5, (q15_t)0xAA54,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA16C, (q15_t)0xA9BF,
+	(q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1F4, (q15_t)0xA92B,
+	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA27C, (q15_t)0xA898,
+	(q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA306, (q15_t)0xA806,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA391, (q15_t)0xA774,
+	(q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA41C, (q15_t)0xA6E3,
+	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA4A9, (q15_t)0xA653,
+	(q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA536, (q15_t)0xA5C4,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5C4, (q15_t)0xA536,
+	(q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA653, (q15_t)0xA4A9,
+	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6E3, (q15_t)0xA41C,
+	(q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA774, (q15_t)0xA391,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA806, (q15_t)0xA306,
+	(q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA898, (q15_t)0xA27C,
+	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA92B, (q15_t)0xA1F4,
+	(q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA9BF, (q15_t)0xA16C,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA54, (q15_t)0xA0E5,
+	(q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAEA, (q15_t)0xA05F,
+	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB81, (q15_t)0x9FD9,
+	(q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xAC18, (q15_t)0x9F55,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xACB1, (q15_t)0x9ED2,
+	(q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD4A, (q15_t)0x9E4F,
+	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADE3, (q15_t)0x9DCE,
+	(q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE7E, (q15_t)0x9D4D,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAF1A, (q15_t)0x9CCE,
+	(q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAFB6, (q15_t)0x9C4F,
+	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB053, (q15_t)0x9BD2,
+	(q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0F0, (q15_t)0x9B55,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB18F, (q15_t)0x9AD9,
+	(q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB22E, (q15_t)0x9A5F,
+	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2CE, (q15_t)0x99E5,
+	(q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB36F, (q15_t)0x996C,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB410, (q15_t)0x98F4,
+	(q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB4B3, (q15_t)0x987D,
+	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB556, (q15_t)0x9808,
+	(q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5F9, (q15_t)0x9793,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB69E, (q15_t)0x971F,
+	(q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB743, (q15_t)0x96AC,
+	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7E9, (q15_t)0x963B,
+	(q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB88F, (q15_t)0x95CA,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB936, (q15_t)0x955A,
+	(q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9DE, (q15_t)0x94EC,
+	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA87, (q15_t)0x947E,
+	(q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB30, (q15_t)0x9411,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBBDA, (q15_t)0x93A6,
+	(q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC84, (q15_t)0x933B,
+	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD2F, (q15_t)0x92D2,
+	(q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDDB, (q15_t)0x9269,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE88, (q15_t)0x9202,
+	(q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF35, (q15_t)0x919C,
+	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFE2, (q15_t)0x9136,
+	(q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC091, (q15_t)0x90D2,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC140, (q15_t)0x906F,
+	(q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1EF, (q15_t)0x900D,
+	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC29F, (q15_t)0x8FAC,
+	(q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC350, (q15_t)0x8F4C,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC402, (q15_t)0x8EED,
+	(q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC4B3, (q15_t)0x8E90,
+	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC566, (q15_t)0x8E33,
+	(q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC619, (q15_t)0x8DD8,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6CD, (q15_t)0x8D7D,
+	(q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC781, (q15_t)0x8D24,
+	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC835, (q15_t)0x8CCC,
+	(q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8EB, (q15_t)0x8C75,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC9A0, (q15_t)0x8C1F,
+	(q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA57, (q15_t)0x8BCA,
+	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCB0D, (q15_t)0x8B76,
+	(q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCBC5, (q15_t)0x8B24,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC7D, (q15_t)0x8AD2,
+	(q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD35, (q15_t)0x8A82,
+	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDEE, (q15_t)0x8A33,
+	(q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCEA7, (q15_t)0x89E4,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF61, (q15_t)0x8997,
+	(q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xD01B, (q15_t)0x894C,
+	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0D6, (q15_t)0x8901,
+	(q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD191, (q15_t)0x88B8,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD24C, (q15_t)0x886F,
+	(q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD308, (q15_t)0x8828,
+	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD3C5, (q15_t)0x87E2,
+	(q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD482, (q15_t)0x879D,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD53F, (q15_t)0x8759,
+	(q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5FD, (q15_t)0x8717,
+	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD6BB, (q15_t)0x86D5,
+	(q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD779, (q15_t)0x8695,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD838, (q15_t)0x8656,
+	(q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8F8, (q15_t)0x8618,
+	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD9B7, (q15_t)0x85DB,
+	(q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA77, (q15_t)0x85A0,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB38, (q15_t)0x8565,
+	(q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBF8, (q15_t)0x852C,
+	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDCBA, (q15_t)0x84F4,
+	(q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD7B, (q15_t)0x84BD,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE3D, (q15_t)0x8488,
+	(q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDEFF, (q15_t)0x8453,
+	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDFC1, (q15_t)0x8420,
+	(q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE084, (q15_t)0x83EE,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE147, (q15_t)0x83BD,
+	(q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE20A, (q15_t)0x838E,
+	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE2CE, (q15_t)0x835F,
+	(q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE392, (q15_t)0x8332,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE456, (q15_t)0x8306,
+	(q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE51B, (q15_t)0x82DB,
+	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5DF, (q15_t)0x82B1,
+	(q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE6A4, (q15_t)0x8289,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE769, (q15_t)0x8262,
+	(q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE82F, (q15_t)0x823C,
+	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8F5, (q15_t)0x8217,
+	(q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE9BA, (q15_t)0x81F3,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA80, (q15_t)0x81D1,
+	(q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB47, (q15_t)0x81B0,
+	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEC0D, (q15_t)0x8190,
+	(q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECD4, (q15_t)0x8171,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED9B, (q15_t)0x8154,
+	(q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE62, (q15_t)0x8137,
+	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEF29, (q15_t)0x811C,
+	(q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFF1, (q15_t)0x8102,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF0B8, (q15_t)0x80EA,
+	(q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF180, (q15_t)0x80D2,
+	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF248, (q15_t)0x80BC,
+	(q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF310, (q15_t)0x80A7,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3D8, (q15_t)0x8094,
+	(q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF4A0, (q15_t)0x8081,
+	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF568, (q15_t)0x8070,
+	(q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF631, (q15_t)0x8060,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6F9, (q15_t)0x8051,
+	(q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF7C2, (q15_t)0x8043,
+	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF88A, (q15_t)0x8037,
+	(q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF953, (q15_t)0x802C,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xFA1C, (q15_t)0x8022,
+	(q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAE5, (q15_t)0x801A,
+	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFBAE, (q15_t)0x8012,
+	(q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC77, (q15_t)0x800C,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD40, (q15_t)0x8007,
+	(q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFE09, (q15_t)0x8003,
+	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFED2, (q15_t)0x8001,
+	(q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
+/**
+  @par
+  Example code for q15 Twiddle factors Generation::
+  @par
+  <pre>for (i = 0; i< 3N/4; i++)
+  {
+     twiddleCoefq15[2*i]   = cos(i * 2*PI/(float)N);
+     twiddleCoefq15[2*i+1] = sin(i * 2*PI/(float)N);
+  } </pre>
+  @par
+  where N = 4096, PI = 3.14159265358979
+  @par
+  Cos and Sin values are interleaved fashion
+  @par
+  Convert Floating point to q15(Fixed point 1.15):
+ 	round(twiddleCoefq15(i) * pow(2, 15))
+ */
+const q15_t twiddleCoef_4096_q15[6144] =
+{
+	(q15_t)0x7FFF, (q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0x0032,
+	(q15_t)0x7FFF, (q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0096,
+	(q15_t)0x7FFF, (q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x00FB,
+	(q15_t)0x7FFE, (q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x015F,
+	(q15_t)0x7FFD, (q15_t)0x0192, (q15_t)0x7FFC, (q15_t)0x01C4,
+	(q15_t)0x7FFC, (q15_t)0x01F6, (q15_t)0x7FFB, (q15_t)0x0228,
+	(q15_t)0x7FFA, (q15_t)0x025B, (q15_t)0x7FF9, (q15_t)0x028D,
+	(q15_t)0x7FF8, (q15_t)0x02BF, (q15_t)0x7FF7, (q15_t)0x02F1,
+	(q15_t)0x7FF6, (q15_t)0x0324, (q15_t)0x7FF4, (q15_t)0x0356,
+	(q15_t)0x7FF3, (q15_t)0x0388, (q15_t)0x7FF2, (q15_t)0x03BA,
+	(q15_t)0x7FF0, (q15_t)0x03ED, (q15_t)0x7FEE, (q15_t)0x041F,
+	(q15_t)0x7FED, (q15_t)0x0451, (q15_t)0x7FEB, (q15_t)0x0483,
+	(q15_t)0x7FE9, (q15_t)0x04B6, (q15_t)0x7FE7, (q15_t)0x04E8,
+	(q15_t)0x7FE5, (q15_t)0x051A, (q15_t)0x7FE3, (q15_t)0x054C,
+	(q15_t)0x7FE1, (q15_t)0x057F, (q15_t)0x7FDF, (q15_t)0x05B1,
+	(q15_t)0x7FDD, (q15_t)0x05E3, (q15_t)0x7FDA, (q15_t)0x0615,
+	(q15_t)0x7FD8, (q15_t)0x0647, (q15_t)0x7FD6, (q15_t)0x067A,
+	(q15_t)0x7FD3, (q15_t)0x06AC, (q15_t)0x7FD0, (q15_t)0x06DE,
+	(q15_t)0x7FCE, (q15_t)0x0710, (q15_t)0x7FCB, (q15_t)0x0742,
+	(q15_t)0x7FC8, (q15_t)0x0775, (q15_t)0x7FC5, (q15_t)0x07A7,
+	(q15_t)0x7FC2, (q15_t)0x07D9, (q15_t)0x7FBF, (q15_t)0x080B,
+	(q15_t)0x7FBC, (q15_t)0x083D, (q15_t)0x7FB8, (q15_t)0x086F,
+	(q15_t)0x7FB5, (q15_t)0x08A2, (q15_t)0x7FB1, (q15_t)0x08D4,
+	(q15_t)0x7FAE, (q15_t)0x0906, (q15_t)0x7FAA, (q15_t)0x0938,
+	(q15_t)0x7FA7, (q15_t)0x096A, (q15_t)0x7FA3, (q15_t)0x099C,
+	(q15_t)0x7F9F, (q15_t)0x09CE, (q15_t)0x7F9B, (q15_t)0x0A00,
+	(q15_t)0x7F97, (q15_t)0x0A33, (q15_t)0x7F93, (q15_t)0x0A65,
+	(q15_t)0x7F8F, (q15_t)0x0A97, (q15_t)0x7F8B, (q15_t)0x0AC9,
+	(q15_t)0x7F87, (q15_t)0x0AFB, (q15_t)0x7F82, (q15_t)0x0B2D,
+	(q15_t)0x7F7E, (q15_t)0x0B5F, (q15_t)0x7F79, (q15_t)0x0B91,
+	(q15_t)0x7F75, (q15_t)0x0BC3, (q15_t)0x7F70, (q15_t)0x0BF5,
+	(q15_t)0x7F6B, (q15_t)0x0C27, (q15_t)0x7F67, (q15_t)0x0C59,
+	(q15_t)0x7F62, (q15_t)0x0C8B, (q15_t)0x7F5D, (q15_t)0x0CBD,
+	(q15_t)0x7F58, (q15_t)0x0CEF, (q15_t)0x7F53, (q15_t)0x0D21,
+	(q15_t)0x7F4D, (q15_t)0x0D53, (q15_t)0x7F48, (q15_t)0x0D85,
+	(q15_t)0x7F43, (q15_t)0x0DB7, (q15_t)0x7F3D, (q15_t)0x0DE9,
+	(q15_t)0x7F38, (q15_t)0x0E1B, (q15_t)0x7F32, (q15_t)0x0E4D,
+	(q15_t)0x7F2D, (q15_t)0x0E7F, (q15_t)0x7F27, (q15_t)0x0EB1,
+	(q15_t)0x7F21, (q15_t)0x0EE3, (q15_t)0x7F1B, (q15_t)0x0F15,
+	(q15_t)0x7F15, (q15_t)0x0F47, (q15_t)0x7F0F, (q15_t)0x0F79,
+	(q15_t)0x7F09, (q15_t)0x0FAB, (q15_t)0x7F03, (q15_t)0x0FDD,
+	(q15_t)0x7EFD, (q15_t)0x100E, (q15_t)0x7EF6, (q15_t)0x1040,
+	(q15_t)0x7EF0, (q15_t)0x1072, (q15_t)0x7EE9, (q15_t)0x10A4,
+	(q15_t)0x7EE3, (q15_t)0x10D6, (q15_t)0x7EDC, (q15_t)0x1108,
+	(q15_t)0x7ED5, (q15_t)0x1139, (q15_t)0x7ECF, (q15_t)0x116B,
+	(q15_t)0x7EC8, (q15_t)0x119D, (q15_t)0x7EC1, (q15_t)0x11CF,
+	(q15_t)0x7EBA, (q15_t)0x1201, (q15_t)0x7EB3, (q15_t)0x1232,
+	(q15_t)0x7EAB, (q15_t)0x1264, (q15_t)0x7EA4, (q15_t)0x1296,
+	(q15_t)0x7E9D, (q15_t)0x12C8, (q15_t)0x7E95, (q15_t)0x12F9,
+	(q15_t)0x7E8E, (q15_t)0x132B, (q15_t)0x7E86, (q15_t)0x135D,
+	(q15_t)0x7E7F, (q15_t)0x138E, (q15_t)0x7E77, (q15_t)0x13C0,
+	(q15_t)0x7E6F, (q15_t)0x13F2, (q15_t)0x7E67, (q15_t)0x1423,
+	(q15_t)0x7E5F, (q15_t)0x1455, (q15_t)0x7E57, (q15_t)0x1487,
+	(q15_t)0x7E4F, (q15_t)0x14B8, (q15_t)0x7E47, (q15_t)0x14EA,
+	(q15_t)0x7E3F, (q15_t)0x151B, (q15_t)0x7E37, (q15_t)0x154D,
+	(q15_t)0x7E2E, (q15_t)0x157F, (q15_t)0x7E26, (q15_t)0x15B0,
+	(q15_t)0x7E1D, (q15_t)0x15E2, (q15_t)0x7E14, (q15_t)0x1613,
+	(q15_t)0x7E0C, (q15_t)0x1645, (q15_t)0x7E03, (q15_t)0x1676,
+	(q15_t)0x7DFA, (q15_t)0x16A8, (q15_t)0x7DF1, (q15_t)0x16D9,
+	(q15_t)0x7DE8, (q15_t)0x170A, (q15_t)0x7DDF, (q15_t)0x173C,
+	(q15_t)0x7DD6, (q15_t)0x176D, (q15_t)0x7DCD, (q15_t)0x179F,
+	(q15_t)0x7DC3, (q15_t)0x17D0, (q15_t)0x7DBA, (q15_t)0x1802,
+	(q15_t)0x7DB0, (q15_t)0x1833, (q15_t)0x7DA7, (q15_t)0x1864,
+	(q15_t)0x7D9D, (q15_t)0x1896, (q15_t)0x7D94, (q15_t)0x18C7,
+	(q15_t)0x7D8A, (q15_t)0x18F8, (q15_t)0x7D80, (q15_t)0x192A,
+	(q15_t)0x7D76, (q15_t)0x195B, (q15_t)0x7D6C, (q15_t)0x198C,
+	(q15_t)0x7D62, (q15_t)0x19BD, (q15_t)0x7D58, (q15_t)0x19EF,
+	(q15_t)0x7D4E, (q15_t)0x1A20, (q15_t)0x7D43, (q15_t)0x1A51,
+	(q15_t)0x7D39, (q15_t)0x1A82, (q15_t)0x7D2F, (q15_t)0x1AB3,
+	(q15_t)0x7D24, (q15_t)0x1AE4, (q15_t)0x7D19, (q15_t)0x1B16,
+	(q15_t)0x7D0F, (q15_t)0x1B47, (q15_t)0x7D04, (q15_t)0x1B78,
+	(q15_t)0x7CF9, (q15_t)0x1BA9, (q15_t)0x7CEE, (q15_t)0x1BDA,
+	(q15_t)0x7CE3, (q15_t)0x1C0B, (q15_t)0x7CD8, (q15_t)0x1C3C,
+	(q15_t)0x7CCD, (q15_t)0x1C6D, (q15_t)0x7CC2, (q15_t)0x1C9E,
+	(q15_t)0x7CB7, (q15_t)0x1CCF, (q15_t)0x7CAB, (q15_t)0x1D00,
+	(q15_t)0x7CA0, (q15_t)0x1D31, (q15_t)0x7C94, (q15_t)0x1D62,
+	(q15_t)0x7C89, (q15_t)0x1D93, (q15_t)0x7C7D, (q15_t)0x1DC4,
+	(q15_t)0x7C71, (q15_t)0x1DF5, (q15_t)0x7C66, (q15_t)0x1E25,
+	(q15_t)0x7C5A, (q15_t)0x1E56, (q15_t)0x7C4E, (q15_t)0x1E87,
+	(q15_t)0x7C42, (q15_t)0x1EB8, (q15_t)0x7C36, (q15_t)0x1EE9,
+	(q15_t)0x7C29, (q15_t)0x1F19, (q15_t)0x7C1D, (q15_t)0x1F4A,
+	(q15_t)0x7C11, (q15_t)0x1F7B, (q15_t)0x7C05, (q15_t)0x1FAC,
+	(q15_t)0x7BF8, (q15_t)0x1FDC, (q15_t)0x7BEB, (q15_t)0x200D,
+	(q15_t)0x7BDF, (q15_t)0x203E, (q15_t)0x7BD2, (q15_t)0x206E,
+	(q15_t)0x7BC5, (q15_t)0x209F, (q15_t)0x7BB9, (q15_t)0x20D0,
+	(q15_t)0x7BAC, (q15_t)0x2100, (q15_t)0x7B9F, (q15_t)0x2131,
+	(q15_t)0x7B92, (q15_t)0x2161, (q15_t)0x7B84, (q15_t)0x2192,
+	(q15_t)0x7B77, (q15_t)0x21C2, (q15_t)0x7B6A, (q15_t)0x21F3,
+	(q15_t)0x7B5D, (q15_t)0x2223, (q15_t)0x7B4F, (q15_t)0x2254,
+	(q15_t)0x7B42, (q15_t)0x2284, (q15_t)0x7B34, (q15_t)0x22B4,
+	(q15_t)0x7B26, (q15_t)0x22E5, (q15_t)0x7B19, (q15_t)0x2315,
+	(q15_t)0x7B0B, (q15_t)0x2345, (q15_t)0x7AFD, (q15_t)0x2376,
+	(q15_t)0x7AEF, (q15_t)0x23A6, (q15_t)0x7AE1, (q15_t)0x23D6,
+	(q15_t)0x7AD3, (q15_t)0x2407, (q15_t)0x7AC5, (q15_t)0x2437,
+	(q15_t)0x7AB6, (q15_t)0x2467, (q15_t)0x7AA8, (q15_t)0x2497,
+	(q15_t)0x7A9A, (q15_t)0x24C7, (q15_t)0x7A8B, (q15_t)0x24F7,
+	(q15_t)0x7A7D, (q15_t)0x2528, (q15_t)0x7A6E, (q15_t)0x2558,
+	(q15_t)0x7A5F, (q15_t)0x2588, (q15_t)0x7A50, (q15_t)0x25B8,
+	(q15_t)0x7A42, (q15_t)0x25E8, (q15_t)0x7A33, (q15_t)0x2618,
+	(q15_t)0x7A24, (q15_t)0x2648, (q15_t)0x7A15, (q15_t)0x2678,
+	(q15_t)0x7A05, (q15_t)0x26A8, (q15_t)0x79F6, (q15_t)0x26D8,
+	(q15_t)0x79E7, (q15_t)0x2707, (q15_t)0x79D8, (q15_t)0x2737,
+	(q15_t)0x79C8, (q15_t)0x2767, (q15_t)0x79B9, (q15_t)0x2797,
+	(q15_t)0x79A9, (q15_t)0x27C7, (q15_t)0x7999, (q15_t)0x27F6,
+	(q15_t)0x798A, (q15_t)0x2826, (q15_t)0x797A, (q15_t)0x2856,
+	(q15_t)0x796A, (q15_t)0x2886, (q15_t)0x795A, (q15_t)0x28B5,
+	(q15_t)0x794A, (q15_t)0x28E5, (q15_t)0x793A, (q15_t)0x2915,
+	(q15_t)0x792A, (q15_t)0x2944, (q15_t)0x7919, (q15_t)0x2974,
+	(q15_t)0x7909, (q15_t)0x29A3, (q15_t)0x78F9, (q15_t)0x29D3,
+	(q15_t)0x78E8, (q15_t)0x2A02, (q15_t)0x78D8, (q15_t)0x2A32,
+	(q15_t)0x78C7, (q15_t)0x2A61, (q15_t)0x78B6, (q15_t)0x2A91,
+	(q15_t)0x78A6, (q15_t)0x2AC0, (q15_t)0x7895, (q15_t)0x2AEF,
+	(q15_t)0x7884, (q15_t)0x2B1F, (q15_t)0x7873, (q15_t)0x2B4E,
+	(q15_t)0x7862, (q15_t)0x2B7D, (q15_t)0x7851, (q15_t)0x2BAD,
+	(q15_t)0x7840, (q15_t)0x2BDC, (q15_t)0x782E, (q15_t)0x2C0B,
+	(q15_t)0x781D, (q15_t)0x2C3A, (q15_t)0x780C, (q15_t)0x2C69,
+	(q15_t)0x77FA, (q15_t)0x2C98, (q15_t)0x77E9, (q15_t)0x2CC8,
+	(q15_t)0x77D7, (q15_t)0x2CF7, (q15_t)0x77C5, (q15_t)0x2D26,
+	(q15_t)0x77B4, (q15_t)0x2D55, (q15_t)0x77A2, (q15_t)0x2D84,
+	(q15_t)0x7790, (q15_t)0x2DB3, (q15_t)0x777E, (q15_t)0x2DE2,
+	(q15_t)0x776C, (q15_t)0x2E11, (q15_t)0x775A, (q15_t)0x2E3F,
+	(q15_t)0x7747, (q15_t)0x2E6E, (q15_t)0x7735, (q15_t)0x2E9D,
+	(q15_t)0x7723, (q15_t)0x2ECC, (q15_t)0x7710, (q15_t)0x2EFB,
+	(q15_t)0x76FE, (q15_t)0x2F29, (q15_t)0x76EB, (q15_t)0x2F58,
+	(q15_t)0x76D9, (q15_t)0x2F87, (q15_t)0x76C6, (q15_t)0x2FB5,
+	(q15_t)0x76B3, (q15_t)0x2FE4, (q15_t)0x76A0, (q15_t)0x3013,
+	(q15_t)0x768E, (q15_t)0x3041, (q15_t)0x767B, (q15_t)0x3070,
+	(q15_t)0x7668, (q15_t)0x309E, (q15_t)0x7654, (q15_t)0x30CD,
+	(q15_t)0x7641, (q15_t)0x30FB, (q15_t)0x762E, (q15_t)0x312A,
+	(q15_t)0x761B, (q15_t)0x3158, (q15_t)0x7607, (q15_t)0x3186,
+	(q15_t)0x75F4, (q15_t)0x31B5, (q15_t)0x75E0, (q15_t)0x31E3,
+	(q15_t)0x75CC, (q15_t)0x3211, (q15_t)0x75B9, (q15_t)0x3240,
+	(q15_t)0x75A5, (q15_t)0x326E, (q15_t)0x7591, (q15_t)0x329C,
+	(q15_t)0x757D, (q15_t)0x32CA, (q15_t)0x7569, (q15_t)0x32F8,
+	(q15_t)0x7555, (q15_t)0x3326, (q15_t)0x7541, (q15_t)0x3354,
+	(q15_t)0x752D, (q15_t)0x3382, (q15_t)0x7519, (q15_t)0x33B0,
+	(q15_t)0x7504, (q15_t)0x33DE, (q15_t)0x74F0, (q15_t)0x340C,
+	(q15_t)0x74DB, (q15_t)0x343A, (q15_t)0x74C7, (q15_t)0x3468,
+	(q15_t)0x74B2, (q15_t)0x3496, (q15_t)0x749E, (q15_t)0x34C4,
+	(q15_t)0x7489, (q15_t)0x34F2, (q15_t)0x7474, (q15_t)0x351F,
+	(q15_t)0x745F, (q15_t)0x354D, (q15_t)0x744A, (q15_t)0x357B,
+	(q15_t)0x7435, (q15_t)0x35A8, (q15_t)0x7420, (q15_t)0x35D6,
+	(q15_t)0x740B, (q15_t)0x3604, (q15_t)0x73F6, (q15_t)0x3631,
+	(q15_t)0x73E0, (q15_t)0x365F, (q15_t)0x73CB, (q15_t)0x368C,
+	(q15_t)0x73B5, (q15_t)0x36BA, (q15_t)0x73A0, (q15_t)0x36E7,
+	(q15_t)0x738A, (q15_t)0x3714, (q15_t)0x7375, (q15_t)0x3742,
+	(q15_t)0x735F, (q15_t)0x376F, (q15_t)0x7349, (q15_t)0x379C,
+	(q15_t)0x7333, (q15_t)0x37CA, (q15_t)0x731D, (q15_t)0x37F7,
+	(q15_t)0x7307, (q15_t)0x3824, (q15_t)0x72F1, (q15_t)0x3851,
+	(q15_t)0x72DB, (q15_t)0x387E, (q15_t)0x72C5, (q15_t)0x38AB,
+	(q15_t)0x72AF, (q15_t)0x38D8, (q15_t)0x7298, (q15_t)0x3906,
+	(q15_t)0x7282, (q15_t)0x3932, (q15_t)0x726B, (q15_t)0x395F,
+	(q15_t)0x7255, (q15_t)0x398C, (q15_t)0x723E, (q15_t)0x39B9,
+	(q15_t)0x7227, (q15_t)0x39E6, (q15_t)0x7211, (q15_t)0x3A13,
+	(q15_t)0x71FA, (q15_t)0x3A40, (q15_t)0x71E3, (q15_t)0x3A6C,
+	(q15_t)0x71CC, (q15_t)0x3A99, (q15_t)0x71B5, (q15_t)0x3AC6,
+	(q15_t)0x719E, (q15_t)0x3AF2, (q15_t)0x7186, (q15_t)0x3B1F,
+	(q15_t)0x716F, (q15_t)0x3B4C, (q15_t)0x7158, (q15_t)0x3B78,
+	(q15_t)0x7141, (q15_t)0x3BA5, (q15_t)0x7129, (q15_t)0x3BD1,
+	(q15_t)0x7112, (q15_t)0x3BFD, (q15_t)0x70FA, (q15_t)0x3C2A,
+	(q15_t)0x70E2, (q15_t)0x3C56, (q15_t)0x70CB, (q15_t)0x3C83,
+	(q15_t)0x70B3, (q15_t)0x3CAF, (q15_t)0x709B, (q15_t)0x3CDB,
+	(q15_t)0x7083, (q15_t)0x3D07, (q15_t)0x706B, (q15_t)0x3D33,
+	(q15_t)0x7053, (q15_t)0x3D60, (q15_t)0x703B, (q15_t)0x3D8C,
+	(q15_t)0x7023, (q15_t)0x3DB8, (q15_t)0x700A, (q15_t)0x3DE4,
+	(q15_t)0x6FF2, (q15_t)0x3E10, (q15_t)0x6FDA, (q15_t)0x3E3C,
+	(q15_t)0x6FC1, (q15_t)0x3E68, (q15_t)0x6FA9, (q15_t)0x3E93,
+	(q15_t)0x6F90, (q15_t)0x3EBF, (q15_t)0x6F77, (q15_t)0x3EEB,
+	(q15_t)0x6F5F, (q15_t)0x3F17, (q15_t)0x6F46, (q15_t)0x3F43,
+	(q15_t)0x6F2D, (q15_t)0x3F6E, (q15_t)0x6F14, (q15_t)0x3F9A,
+	(q15_t)0x6EFB, (q15_t)0x3FC5, (q15_t)0x6EE2, (q15_t)0x3FF1,
+	(q15_t)0x6EC9, (q15_t)0x401D, (q15_t)0x6EAF, (q15_t)0x4048,
+	(q15_t)0x6E96, (q15_t)0x4073, (q15_t)0x6E7D, (q15_t)0x409F,
+	(q15_t)0x6E63, (q15_t)0x40CA, (q15_t)0x6E4A, (q15_t)0x40F6,
+	(q15_t)0x6E30, (q15_t)0x4121, (q15_t)0x6E17, (q15_t)0x414C,
+	(q15_t)0x6DFD, (q15_t)0x4177, (q15_t)0x6DE3, (q15_t)0x41A2,
+	(q15_t)0x6DCA, (q15_t)0x41CE, (q15_t)0x6DB0, (q15_t)0x41F9,
+	(q15_t)0x6D96, (q15_t)0x4224, (q15_t)0x6D7C, (q15_t)0x424F,
+	(q15_t)0x6D62, (q15_t)0x427A, (q15_t)0x6D48, (q15_t)0x42A5,
+	(q15_t)0x6D2D, (q15_t)0x42D0, (q15_t)0x6D13, (q15_t)0x42FA,
+	(q15_t)0x6CF9, (q15_t)0x4325, (q15_t)0x6CDE, (q15_t)0x4350,
+	(q15_t)0x6CC4, (q15_t)0x437B, (q15_t)0x6CA9, (q15_t)0x43A5,
+	(q15_t)0x6C8F, (q15_t)0x43D0, (q15_t)0x6C74, (q15_t)0x43FB,
+	(q15_t)0x6C59, (q15_t)0x4425, (q15_t)0x6C3F, (q15_t)0x4450,
+	(q15_t)0x6C24, (q15_t)0x447A, (q15_t)0x6C09, (q15_t)0x44A5,
+	(q15_t)0x6BEE, (q15_t)0x44CF, (q15_t)0x6BD3, (q15_t)0x44FA,
+	(q15_t)0x6BB8, (q15_t)0x4524, (q15_t)0x6B9C, (q15_t)0x454E,
+	(q15_t)0x6B81, (q15_t)0x4578, (q15_t)0x6B66, (q15_t)0x45A3,
+	(q15_t)0x6B4A, (q15_t)0x45CD, (q15_t)0x6B2F, (q15_t)0x45F7,
+	(q15_t)0x6B13, (q15_t)0x4621, (q15_t)0x6AF8, (q15_t)0x464B,
+	(q15_t)0x6ADC, (q15_t)0x4675, (q15_t)0x6AC1, (q15_t)0x469F,
+	(q15_t)0x6AA5, (q15_t)0x46C9, (q15_t)0x6A89, (q15_t)0x46F3,
+	(q15_t)0x6A6D, (q15_t)0x471C, (q15_t)0x6A51, (q15_t)0x4746,
+	(q15_t)0x6A35, (q15_t)0x4770, (q15_t)0x6A19, (q15_t)0x479A,
+	(q15_t)0x69FD, (q15_t)0x47C3, (q15_t)0x69E1, (q15_t)0x47ED,
+	(q15_t)0x69C4, (q15_t)0x4816, (q15_t)0x69A8, (q15_t)0x4840,
+	(q15_t)0x698C, (q15_t)0x4869, (q15_t)0x696F, (q15_t)0x4893,
+	(q15_t)0x6953, (q15_t)0x48BC, (q15_t)0x6936, (q15_t)0x48E6,
+	(q15_t)0x6919, (q15_t)0x490F, (q15_t)0x68FD, (q15_t)0x4938,
+	(q15_t)0x68E0, (q15_t)0x4961, (q15_t)0x68C3, (q15_t)0x498A,
+	(q15_t)0x68A6, (q15_t)0x49B4, (q15_t)0x6889, (q15_t)0x49DD,
+	(q15_t)0x686C, (q15_t)0x4A06, (q15_t)0x684F, (q15_t)0x4A2F,
+	(q15_t)0x6832, (q15_t)0x4A58, (q15_t)0x6815, (q15_t)0x4A81,
+	(q15_t)0x67F7, (q15_t)0x4AA9, (q15_t)0x67DA, (q15_t)0x4AD2,
+	(q15_t)0x67BD, (q15_t)0x4AFB, (q15_t)0x679F, (q15_t)0x4B24,
+	(q15_t)0x6782, (q15_t)0x4B4C, (q15_t)0x6764, (q15_t)0x4B75,
+	(q15_t)0x6746, (q15_t)0x4B9E, (q15_t)0x6729, (q15_t)0x4BC6,
+	(q15_t)0x670B, (q15_t)0x4BEF, (q15_t)0x66ED, (q15_t)0x4C17,
+	(q15_t)0x66CF, (q15_t)0x4C3F, (q15_t)0x66B1, (q15_t)0x4C68,
+	(q15_t)0x6693, (q15_t)0x4C90, (q15_t)0x6675, (q15_t)0x4CB8,
+	(q15_t)0x6657, (q15_t)0x4CE1, (q15_t)0x6639, (q15_t)0x4D09,
+	(q15_t)0x661A, (q15_t)0x4D31, (q15_t)0x65FC, (q15_t)0x4D59,
+	(q15_t)0x65DD, (q15_t)0x4D81, (q15_t)0x65BF, (q15_t)0x4DA9,
+	(q15_t)0x65A0, (q15_t)0x4DD1, (q15_t)0x6582, (q15_t)0x4DF9,
+	(q15_t)0x6563, (q15_t)0x4E21, (q15_t)0x6545, (q15_t)0x4E48,
+	(q15_t)0x6526, (q15_t)0x4E70, (q15_t)0x6507, (q15_t)0x4E98,
+	(q15_t)0x64E8, (q15_t)0x4EBF, (q15_t)0x64C9, (q15_t)0x4EE7,
+	(q15_t)0x64AA, (q15_t)0x4F0F, (q15_t)0x648B, (q15_t)0x4F36,
+	(q15_t)0x646C, (q15_t)0x4F5E, (q15_t)0x644D, (q15_t)0x4F85,
+	(q15_t)0x642D, (q15_t)0x4FAC, (q15_t)0x640E, (q15_t)0x4FD4,
+	(q15_t)0x63EF, (q15_t)0x4FFB, (q15_t)0x63CF, (q15_t)0x5022,
+	(q15_t)0x63B0, (q15_t)0x5049, (q15_t)0x6390, (q15_t)0x5070,
+	(q15_t)0x6371, (q15_t)0x5097, (q15_t)0x6351, (q15_t)0x50BF,
+	(q15_t)0x6331, (q15_t)0x50E5, (q15_t)0x6311, (q15_t)0x510C,
+	(q15_t)0x62F2, (q15_t)0x5133, (q15_t)0x62D2, (q15_t)0x515A,
+	(q15_t)0x62B2, (q15_t)0x5181, (q15_t)0x6292, (q15_t)0x51A8,
+	(q15_t)0x6271, (q15_t)0x51CE, (q15_t)0x6251, (q15_t)0x51F5,
+	(q15_t)0x6231, (q15_t)0x521C, (q15_t)0x6211, (q15_t)0x5242,
+	(q15_t)0x61F1, (q15_t)0x5269, (q15_t)0x61D0, (q15_t)0x528F,
+	(q15_t)0x61B0, (q15_t)0x52B5, (q15_t)0x618F, (q15_t)0x52DC,
+	(q15_t)0x616F, (q15_t)0x5302, (q15_t)0x614E, (q15_t)0x5328,
+	(q15_t)0x612D, (q15_t)0x534E, (q15_t)0x610D, (q15_t)0x5375,
+	(q15_t)0x60EC, (q15_t)0x539B, (q15_t)0x60CB, (q15_t)0x53C1,
+	(q15_t)0x60AA, (q15_t)0x53E7, (q15_t)0x6089, (q15_t)0x540D,
+	(q15_t)0x6068, (q15_t)0x5433, (q15_t)0x6047, (q15_t)0x5458,
+	(q15_t)0x6026, (q15_t)0x547E, (q15_t)0x6004, (q15_t)0x54A4,
+	(q15_t)0x5FE3, (q15_t)0x54CA, (q15_t)0x5FC2, (q15_t)0x54EF,
+	(q15_t)0x5FA0, (q15_t)0x5515, (q15_t)0x5F7F, (q15_t)0x553A,
+	(q15_t)0x5F5E, (q15_t)0x5560, (q15_t)0x5F3C, (q15_t)0x5585,
+	(q15_t)0x5F1A, (q15_t)0x55AB, (q15_t)0x5EF9, (q15_t)0x55D0,
+	(q15_t)0x5ED7, (q15_t)0x55F5, (q15_t)0x5EB5, (q15_t)0x561A,
+	(q15_t)0x5E93, (q15_t)0x5640, (q15_t)0x5E71, (q15_t)0x5665,
+	(q15_t)0x5E50, (q15_t)0x568A, (q15_t)0x5E2D, (q15_t)0x56AF,
+	(q15_t)0x5E0B, (q15_t)0x56D4, (q15_t)0x5DE9, (q15_t)0x56F9,
+	(q15_t)0x5DC7, (q15_t)0x571D, (q15_t)0x5DA5, (q15_t)0x5742,
+	(q15_t)0x5D83, (q15_t)0x5767, (q15_t)0x5D60, (q15_t)0x578C,
+	(q15_t)0x5D3E, (q15_t)0x57B0, (q15_t)0x5D1B, (q15_t)0x57D5,
+	(q15_t)0x5CF9, (q15_t)0x57F9, (q15_t)0x5CD6, (q15_t)0x581E,
+	(q15_t)0x5CB4, (q15_t)0x5842, (q15_t)0x5C91, (q15_t)0x5867,
+	(q15_t)0x5C6E, (q15_t)0x588B, (q15_t)0x5C4B, (q15_t)0x58AF,
+	(q15_t)0x5C29, (q15_t)0x58D4, (q15_t)0x5C06, (q15_t)0x58F8,
+	(q15_t)0x5BE3, (q15_t)0x591C, (q15_t)0x5BC0, (q15_t)0x5940,
+	(q15_t)0x5B9D, (q15_t)0x5964, (q15_t)0x5B79, (q15_t)0x5988,
+	(q15_t)0x5B56, (q15_t)0x59AC, (q15_t)0x5B33, (q15_t)0x59D0,
+	(q15_t)0x5B10, (q15_t)0x59F3, (q15_t)0x5AEC, (q15_t)0x5A17,
+	(q15_t)0x5AC9, (q15_t)0x5A3B, (q15_t)0x5AA5, (q15_t)0x5A5E,
+	(q15_t)0x5A82, (q15_t)0x5A82, (q15_t)0x5A5E, (q15_t)0x5AA5,
+	(q15_t)0x5A3B, (q15_t)0x5AC9, (q15_t)0x5A17, (q15_t)0x5AEC,
+	(q15_t)0x59F3, (q15_t)0x5B10, (q15_t)0x59D0, (q15_t)0x5B33,
+	(q15_t)0x59AC, (q15_t)0x5B56, (q15_t)0x5988, (q15_t)0x5B79,
+	(q15_t)0x5964, (q15_t)0x5B9D, (q15_t)0x5940, (q15_t)0x5BC0,
+	(q15_t)0x591C, (q15_t)0x5BE3, (q15_t)0x58F8, (q15_t)0x5C06,
+	(q15_t)0x58D4, (q15_t)0x5C29, (q15_t)0x58AF, (q15_t)0x5C4B,
+	(q15_t)0x588B, (q15_t)0x5C6E, (q15_t)0x5867, (q15_t)0x5C91,
+	(q15_t)0x5842, (q15_t)0x5CB4, (q15_t)0x581E, (q15_t)0x5CD6,
+	(q15_t)0x57F9, (q15_t)0x5CF9, (q15_t)0x57D5, (q15_t)0x5D1B,
+	(q15_t)0x57B0, (q15_t)0x5D3E, (q15_t)0x578C, (q15_t)0x5D60,
+	(q15_t)0x5767, (q15_t)0x5D83, (q15_t)0x5742, (q15_t)0x5DA5,
+	(q15_t)0x571D, (q15_t)0x5DC7, (q15_t)0x56F9, (q15_t)0x5DE9,
+	(q15_t)0x56D4, (q15_t)0x5E0B, (q15_t)0x56AF, (q15_t)0x5E2D,
+	(q15_t)0x568A, (q15_t)0x5E50, (q15_t)0x5665, (q15_t)0x5E71,
+	(q15_t)0x5640, (q15_t)0x5E93, (q15_t)0x561A, (q15_t)0x5EB5,
+	(q15_t)0x55F5, (q15_t)0x5ED7, (q15_t)0x55D0, (q15_t)0x5EF9,
+	(q15_t)0x55AB, (q15_t)0x5F1A, (q15_t)0x5585, (q15_t)0x5F3C,
+	(q15_t)0x5560, (q15_t)0x5F5E, (q15_t)0x553A, (q15_t)0x5F7F,
+	(q15_t)0x5515, (q15_t)0x5FA0, (q15_t)0x54EF, (q15_t)0x5FC2,
+	(q15_t)0x54CA, (q15_t)0x5FE3, (q15_t)0x54A4, (q15_t)0x6004,
+	(q15_t)0x547E, (q15_t)0x6026, (q15_t)0x5458, (q15_t)0x6047,
+	(q15_t)0x5433, (q15_t)0x6068, (q15_t)0x540D, (q15_t)0x6089,
+	(q15_t)0x53E7, (q15_t)0x60AA, (q15_t)0x53C1, (q15_t)0x60CB,
+	(q15_t)0x539B, (q15_t)0x60EC, (q15_t)0x5375, (q15_t)0x610D,
+	(q15_t)0x534E, (q15_t)0x612D, (q15_t)0x5328, (q15_t)0x614E,
+	(q15_t)0x5302, (q15_t)0x616F, (q15_t)0x52DC, (q15_t)0x618F,
+	(q15_t)0x52B5, (q15_t)0x61B0, (q15_t)0x528F, (q15_t)0x61D0,
+	(q15_t)0x5269, (q15_t)0x61F1, (q15_t)0x5242, (q15_t)0x6211,
+	(q15_t)0x521C, (q15_t)0x6231, (q15_t)0x51F5, (q15_t)0x6251,
+	(q15_t)0x51CE, (q15_t)0x6271, (q15_t)0x51A8, (q15_t)0x6292,
+	(q15_t)0x5181, (q15_t)0x62B2, (q15_t)0x515A, (q15_t)0x62D2,
+	(q15_t)0x5133, (q15_t)0x62F2, (q15_t)0x510C, (q15_t)0x6311,
+	(q15_t)0x50E5, (q15_t)0x6331, (q15_t)0x50BF, (q15_t)0x6351,
+	(q15_t)0x5097, (q15_t)0x6371, (q15_t)0x5070, (q15_t)0x6390,
+	(q15_t)0x5049, (q15_t)0x63B0, (q15_t)0x5022, (q15_t)0x63CF,
+	(q15_t)0x4FFB, (q15_t)0x63EF, (q15_t)0x4FD4, (q15_t)0x640E,
+	(q15_t)0x4FAC, (q15_t)0x642D, (q15_t)0x4F85, (q15_t)0x644D,
+	(q15_t)0x4F5E, (q15_t)0x646C, (q15_t)0x4F36, (q15_t)0x648B,
+	(q15_t)0x4F0F, (q15_t)0x64AA, (q15_t)0x4EE7, (q15_t)0x64C9,
+	(q15_t)0x4EBF, (q15_t)0x64E8, (q15_t)0x4E98, (q15_t)0x6507,
+	(q15_t)0x4E70, (q15_t)0x6526, (q15_t)0x4E48, (q15_t)0x6545,
+	(q15_t)0x4E21, (q15_t)0x6563, (q15_t)0x4DF9, (q15_t)0x6582,
+	(q15_t)0x4DD1, (q15_t)0x65A0, (q15_t)0x4DA9, (q15_t)0x65BF,
+	(q15_t)0x4D81, (q15_t)0x65DD, (q15_t)0x4D59, (q15_t)0x65FC,
+	(q15_t)0x4D31, (q15_t)0x661A, (q15_t)0x4D09, (q15_t)0x6639,
+	(q15_t)0x4CE1, (q15_t)0x6657, (q15_t)0x4CB8, (q15_t)0x6675,
+	(q15_t)0x4C90, (q15_t)0x6693, (q15_t)0x4C68, (q15_t)0x66B1,
+	(q15_t)0x4C3F, (q15_t)0x66CF, (q15_t)0x4C17, (q15_t)0x66ED,
+	(q15_t)0x4BEF, (q15_t)0x670B, (q15_t)0x4BC6, (q15_t)0x6729,
+	(q15_t)0x4B9E, (q15_t)0x6746, (q15_t)0x4B75, (q15_t)0x6764,
+	(q15_t)0x4B4C, (q15_t)0x6782, (q15_t)0x4B24, (q15_t)0x679F,
+	(q15_t)0x4AFB, (q15_t)0x67BD, (q15_t)0x4AD2, (q15_t)0x67DA,
+	(q15_t)0x4AA9, (q15_t)0x67F7, (q15_t)0x4A81, (q15_t)0x6815,
+	(q15_t)0x4A58, (q15_t)0x6832, (q15_t)0x4A2F, (q15_t)0x684F,
+	(q15_t)0x4A06, (q15_t)0x686C, (q15_t)0x49DD, (q15_t)0x6889,
+	(q15_t)0x49B4, (q15_t)0x68A6, (q15_t)0x498A, (q15_t)0x68C3,
+	(q15_t)0x4961, (q15_t)0x68E0, (q15_t)0x4938, (q15_t)0x68FD,
+	(q15_t)0x490F, (q15_t)0x6919, (q15_t)0x48E6, (q15_t)0x6936,
+	(q15_t)0x48BC, (q15_t)0x6953, (q15_t)0x4893, (q15_t)0x696F,
+	(q15_t)0x4869, (q15_t)0x698C, (q15_t)0x4840, (q15_t)0x69A8,
+	(q15_t)0x4816, (q15_t)0x69C4, (q15_t)0x47ED, (q15_t)0x69E1,
+	(q15_t)0x47C3, (q15_t)0x69FD, (q15_t)0x479A, (q15_t)0x6A19,
+	(q15_t)0x4770, (q15_t)0x6A35, (q15_t)0x4746, (q15_t)0x6A51,
+	(q15_t)0x471C, (q15_t)0x6A6D, (q15_t)0x46F3, (q15_t)0x6A89,
+	(q15_t)0x46C9, (q15_t)0x6AA5, (q15_t)0x469F, (q15_t)0x6AC1,
+	(q15_t)0x4675, (q15_t)0x6ADC, (q15_t)0x464B, (q15_t)0x6AF8,
+	(q15_t)0x4621, (q15_t)0x6B13, (q15_t)0x45F7, (q15_t)0x6B2F,
+	(q15_t)0x45CD, (q15_t)0x6B4A, (q15_t)0x45A3, (q15_t)0x6B66,
+	(q15_t)0x4578, (q15_t)0x6B81, (q15_t)0x454E, (q15_t)0x6B9C,
+	(q15_t)0x4524, (q15_t)0x6BB8, (q15_t)0x44FA, (q15_t)0x6BD3,
+	(q15_t)0x44CF, (q15_t)0x6BEE, (q15_t)0x44A5, (q15_t)0x6C09,
+	(q15_t)0x447A, (q15_t)0x6C24, (q15_t)0x4450, (q15_t)0x6C3F,
+	(q15_t)0x4425, (q15_t)0x6C59, (q15_t)0x43FB, (q15_t)0x6C74,
+	(q15_t)0x43D0, (q15_t)0x6C8F, (q15_t)0x43A5, (q15_t)0x6CA9,
+	(q15_t)0x437B, (q15_t)0x6CC4, (q15_t)0x4350, (q15_t)0x6CDE,
+	(q15_t)0x4325, (q15_t)0x6CF9, (q15_t)0x42FA, (q15_t)0x6D13,
+	(q15_t)0x42D0, (q15_t)0x6D2D, (q15_t)0x42A5, (q15_t)0x6D48,
+	(q15_t)0x427A, (q15_t)0x6D62, (q15_t)0x424F, (q15_t)0x6D7C,
+	(q15_t)0x4224, (q15_t)0x6D96, (q15_t)0x41F9, (q15_t)0x6DB0,
+	(q15_t)0x41CE, (q15_t)0x6DCA, (q15_t)0x41A2, (q15_t)0x6DE3,
+	(q15_t)0x4177, (q15_t)0x6DFD, (q15_t)0x414C, (q15_t)0x6E17,
+	(q15_t)0x4121, (q15_t)0x6E30, (q15_t)0x40F6, (q15_t)0x6E4A,
+	(q15_t)0x40CA, (q15_t)0x6E63, (q15_t)0x409F, (q15_t)0x6E7D,
+	(q15_t)0x4073, (q15_t)0x6E96, (q15_t)0x4048, (q15_t)0x6EAF,
+	(q15_t)0x401D, (q15_t)0x6EC9, (q15_t)0x3FF1, (q15_t)0x6EE2,
+	(q15_t)0x3FC5, (q15_t)0x6EFB, (q15_t)0x3F9A, (q15_t)0x6F14,
+	(q15_t)0x3F6E, (q15_t)0x6F2D, (q15_t)0x3F43, (q15_t)0x6F46,
+	(q15_t)0x3F17, (q15_t)0x6F5F, (q15_t)0x3EEB, (q15_t)0x6F77,
+	(q15_t)0x3EBF, (q15_t)0x6F90, (q15_t)0x3E93, (q15_t)0x6FA9,
+	(q15_t)0x3E68, (q15_t)0x6FC1, (q15_t)0x3E3C, (q15_t)0x6FDA,
+	(q15_t)0x3E10, (q15_t)0x6FF2, (q15_t)0x3DE4, (q15_t)0x700A,
+	(q15_t)0x3DB8, (q15_t)0x7023, (q15_t)0x3D8C, (q15_t)0x703B,
+	(q15_t)0x3D60, (q15_t)0x7053, (q15_t)0x3D33, (q15_t)0x706B,
+	(q15_t)0x3D07, (q15_t)0x7083, (q15_t)0x3CDB, (q15_t)0x709B,
+	(q15_t)0x3CAF, (q15_t)0x70B3, (q15_t)0x3C83, (q15_t)0x70CB,
+	(q15_t)0x3C56, (q15_t)0x70E2, (q15_t)0x3C2A, (q15_t)0x70FA,
+	(q15_t)0x3BFD, (q15_t)0x7112, (q15_t)0x3BD1, (q15_t)0x7129,
+	(q15_t)0x3BA5, (q15_t)0x7141, (q15_t)0x3B78, (q15_t)0x7158,
+	(q15_t)0x3B4C, (q15_t)0x716F, (q15_t)0x3B1F, (q15_t)0x7186,
+	(q15_t)0x3AF2, (q15_t)0x719E, (q15_t)0x3AC6, (q15_t)0x71B5,
+	(q15_t)0x3A99, (q15_t)0x71CC, (q15_t)0x3A6C, (q15_t)0x71E3,
+	(q15_t)0x3A40, (q15_t)0x71FA, (q15_t)0x3A13, (q15_t)0x7211,
+	(q15_t)0x39E6, (q15_t)0x7227, (q15_t)0x39B9, (q15_t)0x723E,
+	(q15_t)0x398C, (q15_t)0x7255, (q15_t)0x395F, (q15_t)0x726B,
+	(q15_t)0x3932, (q15_t)0x7282, (q15_t)0x3906, (q15_t)0x7298,
+	(q15_t)0x38D8, (q15_t)0x72AF, (q15_t)0x38AB, (q15_t)0x72C5,
+	(q15_t)0x387E, (q15_t)0x72DB, (q15_t)0x3851, (q15_t)0x72F1,
+	(q15_t)0x3824, (q15_t)0x7307, (q15_t)0x37F7, (q15_t)0x731D,
+	(q15_t)0x37CA, (q15_t)0x7333, (q15_t)0x379C, (q15_t)0x7349,
+	(q15_t)0x376F, (q15_t)0x735F, (q15_t)0x3742, (q15_t)0x7375,
+	(q15_t)0x3714, (q15_t)0x738A, (q15_t)0x36E7, (q15_t)0x73A0,
+	(q15_t)0x36BA, (q15_t)0x73B5, (q15_t)0x368C, (q15_t)0x73CB,
+	(q15_t)0x365F, (q15_t)0x73E0, (q15_t)0x3631, (q15_t)0x73F6,
+	(q15_t)0x3604, (q15_t)0x740B, (q15_t)0x35D6, (q15_t)0x7420,
+	(q15_t)0x35A8, (q15_t)0x7435, (q15_t)0x357B, (q15_t)0x744A,
+	(q15_t)0x354D, (q15_t)0x745F, (q15_t)0x351F, (q15_t)0x7474,
+	(q15_t)0x34F2, (q15_t)0x7489, (q15_t)0x34C4, (q15_t)0x749E,
+	(q15_t)0x3496, (q15_t)0x74B2, (q15_t)0x3468, (q15_t)0x74C7,
+	(q15_t)0x343A, (q15_t)0x74DB, (q15_t)0x340C, (q15_t)0x74F0,
+	(q15_t)0x33DE, (q15_t)0x7504, (q15_t)0x33B0, (q15_t)0x7519,
+	(q15_t)0x3382, (q15_t)0x752D, (q15_t)0x3354, (q15_t)0x7541,
+	(q15_t)0x3326, (q15_t)0x7555, (q15_t)0x32F8, (q15_t)0x7569,
+	(q15_t)0x32CA, (q15_t)0x757D, (q15_t)0x329C, (q15_t)0x7591,
+	(q15_t)0x326E, (q15_t)0x75A5, (q15_t)0x3240, (q15_t)0x75B9,
+	(q15_t)0x3211, (q15_t)0x75CC, (q15_t)0x31E3, (q15_t)0x75E0,
+	(q15_t)0x31B5, (q15_t)0x75F4, (q15_t)0x3186, (q15_t)0x7607,
+	(q15_t)0x3158, (q15_t)0x761B, (q15_t)0x312A, (q15_t)0x762E,
+	(q15_t)0x30FB, (q15_t)0x7641, (q15_t)0x30CD, (q15_t)0x7654,
+	(q15_t)0x309E, (q15_t)0x7668, (q15_t)0x3070, (q15_t)0x767B,
+	(q15_t)0x3041, (q15_t)0x768E, (q15_t)0x3013, (q15_t)0x76A0,
+	(q15_t)0x2FE4, (q15_t)0x76B3, (q15_t)0x2FB5, (q15_t)0x76C6,
+	(q15_t)0x2F87, (q15_t)0x76D9, (q15_t)0x2F58, (q15_t)0x76EB,
+	(q15_t)0x2F29, (q15_t)0x76FE, (q15_t)0x2EFB, (q15_t)0x7710,
+	(q15_t)0x2ECC, (q15_t)0x7723, (q15_t)0x2E9D, (q15_t)0x7735,
+	(q15_t)0x2E6E, (q15_t)0x7747, (q15_t)0x2E3F, (q15_t)0x775A,
+	(q15_t)0x2E11, (q15_t)0x776C, (q15_t)0x2DE2, (q15_t)0x777E,
+	(q15_t)0x2DB3, (q15_t)0x7790, (q15_t)0x2D84, (q15_t)0x77A2,
+	(q15_t)0x2D55, (q15_t)0x77B4, (q15_t)0x2D26, (q15_t)0x77C5,
+	(q15_t)0x2CF7, (q15_t)0x77D7, (q15_t)0x2CC8, (q15_t)0x77E9,
+	(q15_t)0x2C98, (q15_t)0x77FA, (q15_t)0x2C69, (q15_t)0x780C,
+	(q15_t)0x2C3A, (q15_t)0x781D, (q15_t)0x2C0B, (q15_t)0x782E,
+	(q15_t)0x2BDC, (q15_t)0x7840, (q15_t)0x2BAD, (q15_t)0x7851,
+	(q15_t)0x2B7D, (q15_t)0x7862, (q15_t)0x2B4E, (q15_t)0x7873,
+	(q15_t)0x2B1F, (q15_t)0x7884, (q15_t)0x2AEF, (q15_t)0x7895,
+	(q15_t)0x2AC0, (q15_t)0x78A6, (q15_t)0x2A91, (q15_t)0x78B6,
+	(q15_t)0x2A61, (q15_t)0x78C7, (q15_t)0x2A32, (q15_t)0x78D8,
+	(q15_t)0x2A02, (q15_t)0x78E8, (q15_t)0x29D3, (q15_t)0x78F9,
+	(q15_t)0x29A3, (q15_t)0x7909, (q15_t)0x2974, (q15_t)0x7919,
+	(q15_t)0x2944, (q15_t)0x792A, (q15_t)0x2915, (q15_t)0x793A,
+	(q15_t)0x28E5, (q15_t)0x794A, (q15_t)0x28B5, (q15_t)0x795A,
+	(q15_t)0x2886, (q15_t)0x796A, (q15_t)0x2856, (q15_t)0x797A,
+	(q15_t)0x2826, (q15_t)0x798A, (q15_t)0x27F6, (q15_t)0x7999,
+	(q15_t)0x27C7, (q15_t)0x79A9, (q15_t)0x2797, (q15_t)0x79B9,
+	(q15_t)0x2767, (q15_t)0x79C8, (q15_t)0x2737, (q15_t)0x79D8,
+	(q15_t)0x2707, (q15_t)0x79E7, (q15_t)0x26D8, (q15_t)0x79F6,
+	(q15_t)0x26A8, (q15_t)0x7A05, (q15_t)0x2678, (q15_t)0x7A15,
+	(q15_t)0x2648, (q15_t)0x7A24, (q15_t)0x2618, (q15_t)0x7A33,
+	(q15_t)0x25E8, (q15_t)0x7A42, (q15_t)0x25B8, (q15_t)0x7A50,
+	(q15_t)0x2588, (q15_t)0x7A5F, (q15_t)0x2558, (q15_t)0x7A6E,
+	(q15_t)0x2528, (q15_t)0x7A7D, (q15_t)0x24F7, (q15_t)0x7A8B,
+	(q15_t)0x24C7, (q15_t)0x7A9A, (q15_t)0x2497, (q15_t)0x7AA8,
+	(q15_t)0x2467, (q15_t)0x7AB6, (q15_t)0x2437, (q15_t)0x7AC5,
+	(q15_t)0x2407, (q15_t)0x7AD3, (q15_t)0x23D6, (q15_t)0x7AE1,
+	(q15_t)0x23A6, (q15_t)0x7AEF, (q15_t)0x2376, (q15_t)0x7AFD,
+	(q15_t)0x2345, (q15_t)0x7B0B, (q15_t)0x2315, (q15_t)0x7B19,
+	(q15_t)0x22E5, (q15_t)0x7B26, (q15_t)0x22B4, (q15_t)0x7B34,
+	(q15_t)0x2284, (q15_t)0x7B42, (q15_t)0x2254, (q15_t)0x7B4F,
+	(q15_t)0x2223, (q15_t)0x7B5D, (q15_t)0x21F3, (q15_t)0x7B6A,
+	(q15_t)0x21C2, (q15_t)0x7B77, (q15_t)0x2192, (q15_t)0x7B84,
+	(q15_t)0x2161, (q15_t)0x7B92, (q15_t)0x2131, (q15_t)0x7B9F,
+	(q15_t)0x2100, (q15_t)0x7BAC, (q15_t)0x20D0, (q15_t)0x7BB9,
+	(q15_t)0x209F, (q15_t)0x7BC5, (q15_t)0x206E, (q15_t)0x7BD2,
+	(q15_t)0x203E, (q15_t)0x7BDF, (q15_t)0x200D, (q15_t)0x7BEB,
+	(q15_t)0x1FDC, (q15_t)0x7BF8, (q15_t)0x1FAC, (q15_t)0x7C05,
+	(q15_t)0x1F7B, (q15_t)0x7C11, (q15_t)0x1F4A, (q15_t)0x7C1D,
+	(q15_t)0x1F19, (q15_t)0x7C29, (q15_t)0x1EE9, (q15_t)0x7C36,
+	(q15_t)0x1EB8, (q15_t)0x7C42, (q15_t)0x1E87, (q15_t)0x7C4E,
+	(q15_t)0x1E56, (q15_t)0x7C5A, (q15_t)0x1E25, (q15_t)0x7C66,
+	(q15_t)0x1DF5, (q15_t)0x7C71, (q15_t)0x1DC4, (q15_t)0x7C7D,
+	(q15_t)0x1D93, (q15_t)0x7C89, (q15_t)0x1D62, (q15_t)0x7C94,
+	(q15_t)0x1D31, (q15_t)0x7CA0, (q15_t)0x1D00, (q15_t)0x7CAB,
+	(q15_t)0x1CCF, (q15_t)0x7CB7, (q15_t)0x1C9E, (q15_t)0x7CC2,
+	(q15_t)0x1C6D, (q15_t)0x7CCD, (q15_t)0x1C3C, (q15_t)0x7CD8,
+	(q15_t)0x1C0B, (q15_t)0x7CE3, (q15_t)0x1BDA, (q15_t)0x7CEE,
+	(q15_t)0x1BA9, (q15_t)0x7CF9, (q15_t)0x1B78, (q15_t)0x7D04,
+	(q15_t)0x1B47, (q15_t)0x7D0F, (q15_t)0x1B16, (q15_t)0x7D19,
+	(q15_t)0x1AE4, (q15_t)0x7D24, (q15_t)0x1AB3, (q15_t)0x7D2F,
+	(q15_t)0x1A82, (q15_t)0x7D39, (q15_t)0x1A51, (q15_t)0x7D43,
+	(q15_t)0x1A20, (q15_t)0x7D4E, (q15_t)0x19EF, (q15_t)0x7D58,
+	(q15_t)0x19BD, (q15_t)0x7D62, (q15_t)0x198C, (q15_t)0x7D6C,
+	(q15_t)0x195B, (q15_t)0x7D76, (q15_t)0x192A, (q15_t)0x7D80,
+	(q15_t)0x18F8, (q15_t)0x7D8A, (q15_t)0x18C7, (q15_t)0x7D94,
+	(q15_t)0x1896, (q15_t)0x7D9D, (q15_t)0x1864, (q15_t)0x7DA7,
+	(q15_t)0x1833, (q15_t)0x7DB0, (q15_t)0x1802, (q15_t)0x7DBA,
+	(q15_t)0x17D0, (q15_t)0x7DC3, (q15_t)0x179F, (q15_t)0x7DCD,
+	(q15_t)0x176D, (q15_t)0x7DD6, (q15_t)0x173C, (q15_t)0x7DDF,
+	(q15_t)0x170A, (q15_t)0x7DE8, (q15_t)0x16D9, (q15_t)0x7DF1,
+	(q15_t)0x16A8, (q15_t)0x7DFA, (q15_t)0x1676, (q15_t)0x7E03,
+	(q15_t)0x1645, (q15_t)0x7E0C, (q15_t)0x1613, (q15_t)0x7E14,
+	(q15_t)0x15E2, (q15_t)0x7E1D, (q15_t)0x15B0, (q15_t)0x7E26,
+	(q15_t)0x157F, (q15_t)0x7E2E, (q15_t)0x154D, (q15_t)0x7E37,
+	(q15_t)0x151B, (q15_t)0x7E3F, (q15_t)0x14EA, (q15_t)0x7E47,
+	(q15_t)0x14B8, (q15_t)0x7E4F, (q15_t)0x1487, (q15_t)0x7E57,
+	(q15_t)0x1455, (q15_t)0x7E5F, (q15_t)0x1423, (q15_t)0x7E67,
+	(q15_t)0x13F2, (q15_t)0x7E6F, (q15_t)0x13C0, (q15_t)0x7E77,
+	(q15_t)0x138E, (q15_t)0x7E7F, (q15_t)0x135D, (q15_t)0x7E86,
+	(q15_t)0x132B, (q15_t)0x7E8E, (q15_t)0x12F9, (q15_t)0x7E95,
+	(q15_t)0x12C8, (q15_t)0x7E9D, (q15_t)0x1296, (q15_t)0x7EA4,
+	(q15_t)0x1264, (q15_t)0x7EAB, (q15_t)0x1232, (q15_t)0x7EB3,
+	(q15_t)0x1201, (q15_t)0x7EBA, (q15_t)0x11CF, (q15_t)0x7EC1,
+	(q15_t)0x119D, (q15_t)0x7EC8, (q15_t)0x116B, (q15_t)0x7ECF,
+	(q15_t)0x1139, (q15_t)0x7ED5, (q15_t)0x1108, (q15_t)0x7EDC,
+	(q15_t)0x10D6, (q15_t)0x7EE3, (q15_t)0x10A4, (q15_t)0x7EE9,
+	(q15_t)0x1072, (q15_t)0x7EF0, (q15_t)0x1040, (q15_t)0x7EF6,
+	(q15_t)0x100E, (q15_t)0x7EFD, (q15_t)0x0FDD, (q15_t)0x7F03,
+	(q15_t)0x0FAB, (q15_t)0x7F09, (q15_t)0x0F79, (q15_t)0x7F0F,
+	(q15_t)0x0F47, (q15_t)0x7F15, (q15_t)0x0F15, (q15_t)0x7F1B,
+	(q15_t)0x0EE3, (q15_t)0x7F21, (q15_t)0x0EB1, (q15_t)0x7F27,
+	(q15_t)0x0E7F, (q15_t)0x7F2D, (q15_t)0x0E4D, (q15_t)0x7F32,
+	(q15_t)0x0E1B, (q15_t)0x7F38, (q15_t)0x0DE9, (q15_t)0x7F3D,
+	(q15_t)0x0DB7, (q15_t)0x7F43, (q15_t)0x0D85, (q15_t)0x7F48,
+	(q15_t)0x0D53, (q15_t)0x7F4D, (q15_t)0x0D21, (q15_t)0x7F53,
+	(q15_t)0x0CEF, (q15_t)0x7F58, (q15_t)0x0CBD, (q15_t)0x7F5D,
+	(q15_t)0x0C8B, (q15_t)0x7F62, (q15_t)0x0C59, (q15_t)0x7F67,
+	(q15_t)0x0C27, (q15_t)0x7F6B, (q15_t)0x0BF5, (q15_t)0x7F70,
+	(q15_t)0x0BC3, (q15_t)0x7F75, (q15_t)0x0B91, (q15_t)0x7F79,
+	(q15_t)0x0B5F, (q15_t)0x7F7E, (q15_t)0x0B2D, (q15_t)0x7F82,
+	(q15_t)0x0AFB, (q15_t)0x7F87, (q15_t)0x0AC9, (q15_t)0x7F8B,
+	(q15_t)0x0A97, (q15_t)0x7F8F, (q15_t)0x0A65, (q15_t)0x7F93,
+	(q15_t)0x0A33, (q15_t)0x7F97, (q15_t)0x0A00, (q15_t)0x7F9B,
+	(q15_t)0x09CE, (q15_t)0x7F9F, (q15_t)0x099C, (q15_t)0x7FA3,
+	(q15_t)0x096A, (q15_t)0x7FA7, (q15_t)0x0938, (q15_t)0x7FAA,
+	(q15_t)0x0906, (q15_t)0x7FAE, (q15_t)0x08D4, (q15_t)0x7FB1,
+	(q15_t)0x08A2, (q15_t)0x7FB5, (q15_t)0x086F, (q15_t)0x7FB8,
+	(q15_t)0x083D, (q15_t)0x7FBC, (q15_t)0x080B, (q15_t)0x7FBF,
+	(q15_t)0x07D9, (q15_t)0x7FC2, (q15_t)0x07A7, (q15_t)0x7FC5,
+	(q15_t)0x0775, (q15_t)0x7FC8, (q15_t)0x0742, (q15_t)0x7FCB,
+	(q15_t)0x0710, (q15_t)0x7FCE, (q15_t)0x06DE, (q15_t)0x7FD0,
+	(q15_t)0x06AC, (q15_t)0x7FD3, (q15_t)0x067A, (q15_t)0x7FD6,
+	(q15_t)0x0647, (q15_t)0x7FD8, (q15_t)0x0615, (q15_t)0x7FDA,
+	(q15_t)0x05E3, (q15_t)0x7FDD, (q15_t)0x05B1, (q15_t)0x7FDF,
+	(q15_t)0x057F, (q15_t)0x7FE1, (q15_t)0x054C, (q15_t)0x7FE3,
+	(q15_t)0x051A, (q15_t)0x7FE5, (q15_t)0x04E8, (q15_t)0x7FE7,
+	(q15_t)0x04B6, (q15_t)0x7FE9, (q15_t)0x0483, (q15_t)0x7FEB,
+	(q15_t)0x0451, (q15_t)0x7FED, (q15_t)0x041F, (q15_t)0x7FEE,
+	(q15_t)0x03ED, (q15_t)0x7FF0, (q15_t)0x03BA, (q15_t)0x7FF2,
+	(q15_t)0x0388, (q15_t)0x7FF3, (q15_t)0x0356, (q15_t)0x7FF4,
+	(q15_t)0x0324, (q15_t)0x7FF6, (q15_t)0x02F1, (q15_t)0x7FF7,
+	(q15_t)0x02BF, (q15_t)0x7FF8, (q15_t)0x028D, (q15_t)0x7FF9,
+	(q15_t)0x025B, (q15_t)0x7FFA, (q15_t)0x0228, (q15_t)0x7FFB,
+	(q15_t)0x01F6, (q15_t)0x7FFC, (q15_t)0x01C4, (q15_t)0x7FFC,
+	(q15_t)0x0192, (q15_t)0x7FFD, (q15_t)0x015F, (q15_t)0x7FFE,
+	(q15_t)0x012D, (q15_t)0x7FFE, (q15_t)0x00FB, (q15_t)0x7FFF,
+	(q15_t)0x00C9, (q15_t)0x7FFF, (q15_t)0x0096, (q15_t)0x7FFF,
+	(q15_t)0x0064, (q15_t)0x7FFF, (q15_t)0x0032, (q15_t)0x7FFF,
+	(q15_t)0x0000, (q15_t)0x7FFF, (q15_t)0xFFCD, (q15_t)0x7FFF,
+	(q15_t)0xFF9B, (q15_t)0x7FFF, (q15_t)0xFF69, (q15_t)0x7FFF,
+	(q15_t)0xFF36, (q15_t)0x7FFF, (q15_t)0xFF04, (q15_t)0x7FFF,
+	(q15_t)0xFED2, (q15_t)0x7FFE, (q15_t)0xFEA0, (q15_t)0x7FFE,
+	(q15_t)0xFE6D, (q15_t)0x7FFD, (q15_t)0xFE3B, (q15_t)0x7FFC,
+	(q15_t)0xFE09, (q15_t)0x7FFC, (q15_t)0xFDD7, (q15_t)0x7FFB,
+	(q15_t)0xFDA4, (q15_t)0x7FFA, (q15_t)0xFD72, (q15_t)0x7FF9,
+	(q15_t)0xFD40, (q15_t)0x7FF8, (q15_t)0xFD0E, (q15_t)0x7FF7,
+	(q15_t)0xFCDB, (q15_t)0x7FF6, (q15_t)0xFCA9, (q15_t)0x7FF4,
+	(q15_t)0xFC77, (q15_t)0x7FF3, (q15_t)0xFC45, (q15_t)0x7FF2,
+	(q15_t)0xFC12, (q15_t)0x7FF0, (q15_t)0xFBE0, (q15_t)0x7FEE,
+	(q15_t)0xFBAE, (q15_t)0x7FED, (q15_t)0xFB7C, (q15_t)0x7FEB,
+	(q15_t)0xFB49, (q15_t)0x7FE9, (q15_t)0xFB17, (q15_t)0x7FE7,
+	(q15_t)0xFAE5, (q15_t)0x7FE5, (q15_t)0xFAB3, (q15_t)0x7FE3,
+	(q15_t)0xFA80, (q15_t)0x7FE1, (q15_t)0xFA4E, (q15_t)0x7FDF,
+	(q15_t)0xFA1C, (q15_t)0x7FDD, (q15_t)0xF9EA, (q15_t)0x7FDA,
+	(q15_t)0xF9B8, (q15_t)0x7FD8, (q15_t)0xF985, (q15_t)0x7FD6,
+	(q15_t)0xF953, (q15_t)0x7FD3, (q15_t)0xF921, (q15_t)0x7FD0,
+	(q15_t)0xF8EF, (q15_t)0x7FCE, (q15_t)0xF8BD, (q15_t)0x7FCB,
+	(q15_t)0xF88A, (q15_t)0x7FC8, (q15_t)0xF858, (q15_t)0x7FC5,
+	(q15_t)0xF826, (q15_t)0x7FC2, (q15_t)0xF7F4, (q15_t)0x7FBF,
+	(q15_t)0xF7C2, (q15_t)0x7FBC, (q15_t)0xF790, (q15_t)0x7FB8,
+	(q15_t)0xF75D, (q15_t)0x7FB5, (q15_t)0xF72B, (q15_t)0x7FB1,
+	(q15_t)0xF6F9, (q15_t)0x7FAE, (q15_t)0xF6C7, (q15_t)0x7FAA,
+	(q15_t)0xF695, (q15_t)0x7FA7, (q15_t)0xF663, (q15_t)0x7FA3,
+	(q15_t)0xF631, (q15_t)0x7F9F, (q15_t)0xF5FF, (q15_t)0x7F9B,
+	(q15_t)0xF5CC, (q15_t)0x7F97, (q15_t)0xF59A, (q15_t)0x7F93,
+	(q15_t)0xF568, (q15_t)0x7F8F, (q15_t)0xF536, (q15_t)0x7F8B,
+	(q15_t)0xF504, (q15_t)0x7F87, (q15_t)0xF4D2, (q15_t)0x7F82,
+	(q15_t)0xF4A0, (q15_t)0x7F7E, (q15_t)0xF46E, (q15_t)0x7F79,
+	(q15_t)0xF43C, (q15_t)0x7F75, (q15_t)0xF40A, (q15_t)0x7F70,
+	(q15_t)0xF3D8, (q15_t)0x7F6B, (q15_t)0xF3A6, (q15_t)0x7F67,
+	(q15_t)0xF374, (q15_t)0x7F62, (q15_t)0xF342, (q15_t)0x7F5D,
+	(q15_t)0xF310, (q15_t)0x7F58, (q15_t)0xF2DE, (q15_t)0x7F53,
+	(q15_t)0xF2AC, (q15_t)0x7F4D, (q15_t)0xF27A, (q15_t)0x7F48,
+	(q15_t)0xF248, (q15_t)0x7F43, (q15_t)0xF216, (q15_t)0x7F3D,
+	(q15_t)0xF1E4, (q15_t)0x7F38, (q15_t)0xF1B2, (q15_t)0x7F32,
+	(q15_t)0xF180, (q15_t)0x7F2D, (q15_t)0xF14E, (q15_t)0x7F27,
+	(q15_t)0xF11C, (q15_t)0x7F21, (q15_t)0xF0EA, (q15_t)0x7F1B,
+	(q15_t)0xF0B8, (q15_t)0x7F15, (q15_t)0xF086, (q15_t)0x7F0F,
+	(q15_t)0xF054, (q15_t)0x7F09, (q15_t)0xF022, (q15_t)0x7F03,
+	(q15_t)0xEFF1, (q15_t)0x7EFD, (q15_t)0xEFBF, (q15_t)0x7EF6,
+	(q15_t)0xEF8D, (q15_t)0x7EF0, (q15_t)0xEF5B, (q15_t)0x7EE9,
+	(q15_t)0xEF29, (q15_t)0x7EE3, (q15_t)0xEEF7, (q15_t)0x7EDC,
+	(q15_t)0xEEC6, (q15_t)0x7ED5, (q15_t)0xEE94, (q15_t)0x7ECF,
+	(q15_t)0xEE62, (q15_t)0x7EC8, (q15_t)0xEE30, (q15_t)0x7EC1,
+	(q15_t)0xEDFE, (q15_t)0x7EBA, (q15_t)0xEDCD, (q15_t)0x7EB3,
+	(q15_t)0xED9B, (q15_t)0x7EAB, (q15_t)0xED69, (q15_t)0x7EA4,
+	(q15_t)0xED37, (q15_t)0x7E9D, (q15_t)0xED06, (q15_t)0x7E95,
+	(q15_t)0xECD4, (q15_t)0x7E8E, (q15_t)0xECA2, (q15_t)0x7E86,
+	(q15_t)0xEC71, (q15_t)0x7E7F, (q15_t)0xEC3F, (q15_t)0x7E77,
+	(q15_t)0xEC0D, (q15_t)0x7E6F, (q15_t)0xEBDC, (q15_t)0x7E67,
+	(q15_t)0xEBAA, (q15_t)0x7E5F, (q15_t)0xEB78, (q15_t)0x7E57,
+	(q15_t)0xEB47, (q15_t)0x7E4F, (q15_t)0xEB15, (q15_t)0x7E47,
+	(q15_t)0xEAE4, (q15_t)0x7E3F, (q15_t)0xEAB2, (q15_t)0x7E37,
+	(q15_t)0xEA80, (q15_t)0x7E2E, (q15_t)0xEA4F, (q15_t)0x7E26,
+	(q15_t)0xEA1D, (q15_t)0x7E1D, (q15_t)0xE9EC, (q15_t)0x7E14,
+	(q15_t)0xE9BA, (q15_t)0x7E0C, (q15_t)0xE989, (q15_t)0x7E03,
+	(q15_t)0xE957, (q15_t)0x7DFA, (q15_t)0xE926, (q15_t)0x7DF1,
+	(q15_t)0xE8F5, (q15_t)0x7DE8, (q15_t)0xE8C3, (q15_t)0x7DDF,
+	(q15_t)0xE892, (q15_t)0x7DD6, (q15_t)0xE860, (q15_t)0x7DCD,
+	(q15_t)0xE82F, (q15_t)0x7DC3, (q15_t)0xE7FD, (q15_t)0x7DBA,
+	(q15_t)0xE7CC, (q15_t)0x7DB0, (q15_t)0xE79B, (q15_t)0x7DA7,
+	(q15_t)0xE769, (q15_t)0x7D9D, (q15_t)0xE738, (q15_t)0x7D94,
+	(q15_t)0xE707, (q15_t)0x7D8A, (q15_t)0xE6D5, (q15_t)0x7D80,
+	(q15_t)0xE6A4, (q15_t)0x7D76, (q15_t)0xE673, (q15_t)0x7D6C,
+	(q15_t)0xE642, (q15_t)0x7D62, (q15_t)0xE610, (q15_t)0x7D58,
+	(q15_t)0xE5DF, (q15_t)0x7D4E, (q15_t)0xE5AE, (q15_t)0x7D43,
+	(q15_t)0xE57D, (q15_t)0x7D39, (q15_t)0xE54C, (q15_t)0x7D2F,
+	(q15_t)0xE51B, (q15_t)0x7D24, (q15_t)0xE4E9, (q15_t)0x7D19,
+	(q15_t)0xE4B8, (q15_t)0x7D0F, (q15_t)0xE487, (q15_t)0x7D04,
+	(q15_t)0xE456, (q15_t)0x7CF9, (q15_t)0xE425, (q15_t)0x7CEE,
+	(q15_t)0xE3F4, (q15_t)0x7CE3, (q15_t)0xE3C3, (q15_t)0x7CD8,
+	(q15_t)0xE392, (q15_t)0x7CCD, (q15_t)0xE361, (q15_t)0x7CC2,
+	(q15_t)0xE330, (q15_t)0x7CB7, (q15_t)0xE2FF, (q15_t)0x7CAB,
+	(q15_t)0xE2CE, (q15_t)0x7CA0, (q15_t)0xE29D, (q15_t)0x7C94,
+	(q15_t)0xE26C, (q15_t)0x7C89, (q15_t)0xE23B, (q15_t)0x7C7D,
+	(q15_t)0xE20A, (q15_t)0x7C71, (q15_t)0xE1DA, (q15_t)0x7C66,
+	(q15_t)0xE1A9, (q15_t)0x7C5A, (q15_t)0xE178, (q15_t)0x7C4E,
+	(q15_t)0xE147, (q15_t)0x7C42, (q15_t)0xE116, (q15_t)0x7C36,
+	(q15_t)0xE0E6, (q15_t)0x7C29, (q15_t)0xE0B5, (q15_t)0x7C1D,
+	(q15_t)0xE084, (q15_t)0x7C11, (q15_t)0xE053, (q15_t)0x7C05,
+	(q15_t)0xE023, (q15_t)0x7BF8, (q15_t)0xDFF2, (q15_t)0x7BEB,
+	(q15_t)0xDFC1, (q15_t)0x7BDF, (q15_t)0xDF91, (q15_t)0x7BD2,
+	(q15_t)0xDF60, (q15_t)0x7BC5, (q15_t)0xDF2F, (q15_t)0x7BB9,
+	(q15_t)0xDEFF, (q15_t)0x7BAC, (q15_t)0xDECE, (q15_t)0x7B9F,
+	(q15_t)0xDE9E, (q15_t)0x7B92, (q15_t)0xDE6D, (q15_t)0x7B84,
+	(q15_t)0xDE3D, (q15_t)0x7B77, (q15_t)0xDE0C, (q15_t)0x7B6A,
+	(q15_t)0xDDDC, (q15_t)0x7B5D, (q15_t)0xDDAB, (q15_t)0x7B4F,
+	(q15_t)0xDD7B, (q15_t)0x7B42, (q15_t)0xDD4B, (q15_t)0x7B34,
+	(q15_t)0xDD1A, (q15_t)0x7B26, (q15_t)0xDCEA, (q15_t)0x7B19,
+	(q15_t)0xDCBA, (q15_t)0x7B0B, (q15_t)0xDC89, (q15_t)0x7AFD,
+	(q15_t)0xDC59, (q15_t)0x7AEF, (q15_t)0xDC29, (q15_t)0x7AE1,
+	(q15_t)0xDBF8, (q15_t)0x7AD3, (q15_t)0xDBC8, (q15_t)0x7AC5,
+	(q15_t)0xDB98, (q15_t)0x7AB6, (q15_t)0xDB68, (q15_t)0x7AA8,
+	(q15_t)0xDB38, (q15_t)0x7A9A, (q15_t)0xDB08, (q15_t)0x7A8B,
+	(q15_t)0xDAD7, (q15_t)0x7A7D, (q15_t)0xDAA7, (q15_t)0x7A6E,
+	(q15_t)0xDA77, (q15_t)0x7A5F, (q15_t)0xDA47, (q15_t)0x7A50,
+	(q15_t)0xDA17, (q15_t)0x7A42, (q15_t)0xD9E7, (q15_t)0x7A33,
+	(q15_t)0xD9B7, (q15_t)0x7A24, (q15_t)0xD987, (q15_t)0x7A15,
+	(q15_t)0xD957, (q15_t)0x7A05, (q15_t)0xD927, (q15_t)0x79F6,
+	(q15_t)0xD8F8, (q15_t)0x79E7, (q15_t)0xD8C8, (q15_t)0x79D8,
+	(q15_t)0xD898, (q15_t)0x79C8, (q15_t)0xD868, (q15_t)0x79B9,
+	(q15_t)0xD838, (q15_t)0x79A9, (q15_t)0xD809, (q15_t)0x7999,
+	(q15_t)0xD7D9, (q15_t)0x798A, (q15_t)0xD7A9, (q15_t)0x797A,
+	(q15_t)0xD779, (q15_t)0x796A, (q15_t)0xD74A, (q15_t)0x795A,
+	(q15_t)0xD71A, (q15_t)0x794A, (q15_t)0xD6EA, (q15_t)0x793A,
+	(q15_t)0xD6BB, (q15_t)0x792A, (q15_t)0xD68B, (q15_t)0x7919,
+	(q15_t)0xD65C, (q15_t)0x7909, (q15_t)0xD62C, (q15_t)0x78F9,
+	(q15_t)0xD5FD, (q15_t)0x78E8, (q15_t)0xD5CD, (q15_t)0x78D8,
+	(q15_t)0xD59E, (q15_t)0x78C7, (q15_t)0xD56E, (q15_t)0x78B6,
+	(q15_t)0xD53F, (q15_t)0x78A6, (q15_t)0xD510, (q15_t)0x7895,
+	(q15_t)0xD4E0, (q15_t)0x7884, (q15_t)0xD4B1, (q15_t)0x7873,
+	(q15_t)0xD482, (q15_t)0x7862, (q15_t)0xD452, (q15_t)0x7851,
+	(q15_t)0xD423, (q15_t)0x7840, (q15_t)0xD3F4, (q15_t)0x782E,
+	(q15_t)0xD3C5, (q15_t)0x781D, (q15_t)0xD396, (q15_t)0x780C,
+	(q15_t)0xD367, (q15_t)0x77FA, (q15_t)0xD337, (q15_t)0x77E9,
+	(q15_t)0xD308, (q15_t)0x77D7, (q15_t)0xD2D9, (q15_t)0x77C5,
+	(q15_t)0xD2AA, (q15_t)0x77B4, (q15_t)0xD27B, (q15_t)0x77A2,
+	(q15_t)0xD24C, (q15_t)0x7790, (q15_t)0xD21D, (q15_t)0x777E,
+	(q15_t)0xD1EE, (q15_t)0x776C, (q15_t)0xD1C0, (q15_t)0x775A,
+	(q15_t)0xD191, (q15_t)0x7747, (q15_t)0xD162, (q15_t)0x7735,
+	(q15_t)0xD133, (q15_t)0x7723, (q15_t)0xD104, (q15_t)0x7710,
+	(q15_t)0xD0D6, (q15_t)0x76FE, (q15_t)0xD0A7, (q15_t)0x76EB,
+	(q15_t)0xD078, (q15_t)0x76D9, (q15_t)0xD04A, (q15_t)0x76C6,
+	(q15_t)0xD01B, (q15_t)0x76B3, (q15_t)0xCFEC, (q15_t)0x76A0,
+	(q15_t)0xCFBE, (q15_t)0x768E, (q15_t)0xCF8F, (q15_t)0x767B,
+	(q15_t)0xCF61, (q15_t)0x7668, (q15_t)0xCF32, (q15_t)0x7654,
+	(q15_t)0xCF04, (q15_t)0x7641, (q15_t)0xCED5, (q15_t)0x762E,
+	(q15_t)0xCEA7, (q15_t)0x761B, (q15_t)0xCE79, (q15_t)0x7607,
+	(q15_t)0xCE4A, (q15_t)0x75F4, (q15_t)0xCE1C, (q15_t)0x75E0,
+	(q15_t)0xCDEE, (q15_t)0x75CC, (q15_t)0xCDBF, (q15_t)0x75B9,
+	(q15_t)0xCD91, (q15_t)0x75A5, (q15_t)0xCD63, (q15_t)0x7591,
+	(q15_t)0xCD35, (q15_t)0x757D, (q15_t)0xCD07, (q15_t)0x7569,
+	(q15_t)0xCCD9, (q15_t)0x7555, (q15_t)0xCCAB, (q15_t)0x7541,
+	(q15_t)0xCC7D, (q15_t)0x752D, (q15_t)0xCC4F, (q15_t)0x7519,
+	(q15_t)0xCC21, (q15_t)0x7504, (q15_t)0xCBF3, (q15_t)0x74F0,
+	(q15_t)0xCBC5, (q15_t)0x74DB, (q15_t)0xCB97, (q15_t)0x74C7,
+	(q15_t)0xCB69, (q15_t)0x74B2, (q15_t)0xCB3B, (q15_t)0x749E,
+	(q15_t)0xCB0D, (q15_t)0x7489, (q15_t)0xCAE0, (q15_t)0x7474,
+	(q15_t)0xCAB2, (q15_t)0x745F, (q15_t)0xCA84, (q15_t)0x744A,
+	(q15_t)0xCA57, (q15_t)0x7435, (q15_t)0xCA29, (q15_t)0x7420,
+	(q15_t)0xC9FB, (q15_t)0x740B, (q15_t)0xC9CE, (q15_t)0x73F6,
+	(q15_t)0xC9A0, (q15_t)0x73E0, (q15_t)0xC973, (q15_t)0x73CB,
+	(q15_t)0xC945, (q15_t)0x73B5, (q15_t)0xC918, (q15_t)0x73A0,
+	(q15_t)0xC8EB, (q15_t)0x738A, (q15_t)0xC8BD, (q15_t)0x7375,
+	(q15_t)0xC890, (q15_t)0x735F, (q15_t)0xC863, (q15_t)0x7349,
+	(q15_t)0xC835, (q15_t)0x7333, (q15_t)0xC808, (q15_t)0x731D,
+	(q15_t)0xC7DB, (q15_t)0x7307, (q15_t)0xC7AE, (q15_t)0x72F1,
+	(q15_t)0xC781, (q15_t)0x72DB, (q15_t)0xC754, (q15_t)0x72C5,
+	(q15_t)0xC727, (q15_t)0x72AF, (q15_t)0xC6F9, (q15_t)0x7298,
+	(q15_t)0xC6CD, (q15_t)0x7282, (q15_t)0xC6A0, (q15_t)0x726B,
+	(q15_t)0xC673, (q15_t)0x7255, (q15_t)0xC646, (q15_t)0x723E,
+	(q15_t)0xC619, (q15_t)0x7227, (q15_t)0xC5EC, (q15_t)0x7211,
+	(q15_t)0xC5BF, (q15_t)0x71FA, (q15_t)0xC593, (q15_t)0x71E3,
+	(q15_t)0xC566, (q15_t)0x71CC, (q15_t)0xC539, (q15_t)0x71B5,
+	(q15_t)0xC50D, (q15_t)0x719E, (q15_t)0xC4E0, (q15_t)0x7186,
+	(q15_t)0xC4B3, (q15_t)0x716F, (q15_t)0xC487, (q15_t)0x7158,
+	(q15_t)0xC45A, (q15_t)0x7141, (q15_t)0xC42E, (q15_t)0x7129,
+	(q15_t)0xC402, (q15_t)0x7112, (q15_t)0xC3D5, (q15_t)0x70FA,
+	(q15_t)0xC3A9, (q15_t)0x70E2, (q15_t)0xC37C, (q15_t)0x70CB,
+	(q15_t)0xC350, (q15_t)0x70B3, (q15_t)0xC324, (q15_t)0x709B,
+	(q15_t)0xC2F8, (q15_t)0x7083, (q15_t)0xC2CC, (q15_t)0x706B,
+	(q15_t)0xC29F, (q15_t)0x7053, (q15_t)0xC273, (q15_t)0x703B,
+	(q15_t)0xC247, (q15_t)0x7023, (q15_t)0xC21B, (q15_t)0x700A,
+	(q15_t)0xC1EF, (q15_t)0x6FF2, (q15_t)0xC1C3, (q15_t)0x6FDA,
+	(q15_t)0xC197, (q15_t)0x6FC1, (q15_t)0xC16C, (q15_t)0x6FA9,
+	(q15_t)0xC140, (q15_t)0x6F90, (q15_t)0xC114, (q15_t)0x6F77,
+	(q15_t)0xC0E8, (q15_t)0x6F5F, (q15_t)0xC0BC, (q15_t)0x6F46,
+	(q15_t)0xC091, (q15_t)0x6F2D, (q15_t)0xC065, (q15_t)0x6F14,
+	(q15_t)0xC03A, (q15_t)0x6EFB, (q15_t)0xC00E, (q15_t)0x6EE2,
+	(q15_t)0xBFE2, (q15_t)0x6EC9, (q15_t)0xBFB7, (q15_t)0x6EAF,
+	(q15_t)0xBF8C, (q15_t)0x6E96, (q15_t)0xBF60, (q15_t)0x6E7D,
+	(q15_t)0xBF35, (q15_t)0x6E63, (q15_t)0xBF09, (q15_t)0x6E4A,
+	(q15_t)0xBEDE, (q15_t)0x6E30, (q15_t)0xBEB3, (q15_t)0x6E17,
+	(q15_t)0xBE88, (q15_t)0x6DFD, (q15_t)0xBE5D, (q15_t)0x6DE3,
+	(q15_t)0xBE31, (q15_t)0x6DCA, (q15_t)0xBE06, (q15_t)0x6DB0,
+	(q15_t)0xBDDB, (q15_t)0x6D96, (q15_t)0xBDB0, (q15_t)0x6D7C,
+	(q15_t)0xBD85, (q15_t)0x6D62, (q15_t)0xBD5A, (q15_t)0x6D48,
+	(q15_t)0xBD2F, (q15_t)0x6D2D, (q15_t)0xBD05, (q15_t)0x6D13,
+	(q15_t)0xBCDA, (q15_t)0x6CF9, (q15_t)0xBCAF, (q15_t)0x6CDE,
+	(q15_t)0xBC84, (q15_t)0x6CC4, (q15_t)0xBC5A, (q15_t)0x6CA9,
+	(q15_t)0xBC2F, (q15_t)0x6C8F, (q15_t)0xBC04, (q15_t)0x6C74,
+	(q15_t)0xBBDA, (q15_t)0x6C59, (q15_t)0xBBAF, (q15_t)0x6C3F,
+	(q15_t)0xBB85, (q15_t)0x6C24, (q15_t)0xBB5A, (q15_t)0x6C09,
+	(q15_t)0xBB30, (q15_t)0x6BEE, (q15_t)0xBB05, (q15_t)0x6BD3,
+	(q15_t)0xBADB, (q15_t)0x6BB8, (q15_t)0xBAB1, (q15_t)0x6B9C,
+	(q15_t)0xBA87, (q15_t)0x6B81, (q15_t)0xBA5C, (q15_t)0x6B66,
+	(q15_t)0xBA32, (q15_t)0x6B4A, (q15_t)0xBA08, (q15_t)0x6B2F,
+	(q15_t)0xB9DE, (q15_t)0x6B13, (q15_t)0xB9B4, (q15_t)0x6AF8,
+	(q15_t)0xB98A, (q15_t)0x6ADC, (q15_t)0xB960, (q15_t)0x6AC1,
+	(q15_t)0xB936, (q15_t)0x6AA5, (q15_t)0xB90C, (q15_t)0x6A89,
+	(q15_t)0xB8E3, (q15_t)0x6A6D, (q15_t)0xB8B9, (q15_t)0x6A51,
+	(q15_t)0xB88F, (q15_t)0x6A35, (q15_t)0xB865, (q15_t)0x6A19,
+	(q15_t)0xB83C, (q15_t)0x69FD, (q15_t)0xB812, (q15_t)0x69E1,
+	(q15_t)0xB7E9, (q15_t)0x69C4, (q15_t)0xB7BF, (q15_t)0x69A8,
+	(q15_t)0xB796, (q15_t)0x698C, (q15_t)0xB76C, (q15_t)0x696F,
+	(q15_t)0xB743, (q15_t)0x6953, (q15_t)0xB719, (q15_t)0x6936,
+	(q15_t)0xB6F0, (q15_t)0x6919, (q15_t)0xB6C7, (q15_t)0x68FD,
+	(q15_t)0xB69E, (q15_t)0x68E0, (q15_t)0xB675, (q15_t)0x68C3,
+	(q15_t)0xB64B, (q15_t)0x68A6, (q15_t)0xB622, (q15_t)0x6889,
+	(q15_t)0xB5F9, (q15_t)0x686C, (q15_t)0xB5D0, (q15_t)0x684F,
+	(q15_t)0xB5A7, (q15_t)0x6832, (q15_t)0xB57E, (q15_t)0x6815,
+	(q15_t)0xB556, (q15_t)0x67F7, (q15_t)0xB52D, (q15_t)0x67DA,
+	(q15_t)0xB504, (q15_t)0x67BD, (q15_t)0xB4DB, (q15_t)0x679F,
+	(q15_t)0xB4B3, (q15_t)0x6782, (q15_t)0xB48A, (q15_t)0x6764,
+	(q15_t)0xB461, (q15_t)0x6746, (q15_t)0xB439, (q15_t)0x6729,
+	(q15_t)0xB410, (q15_t)0x670B, (q15_t)0xB3E8, (q15_t)0x66ED,
+	(q15_t)0xB3C0, (q15_t)0x66CF, (q15_t)0xB397, (q15_t)0x66B1,
+	(q15_t)0xB36F, (q15_t)0x6693, (q15_t)0xB347, (q15_t)0x6675,
+	(q15_t)0xB31E, (q15_t)0x6657, (q15_t)0xB2F6, (q15_t)0x6639,
+	(q15_t)0xB2CE, (q15_t)0x661A, (q15_t)0xB2A6, (q15_t)0x65FC,
+	(q15_t)0xB27E, (q15_t)0x65DD, (q15_t)0xB256, (q15_t)0x65BF,
+	(q15_t)0xB22E, (q15_t)0x65A0, (q15_t)0xB206, (q15_t)0x6582,
+	(q15_t)0xB1DE, (q15_t)0x6563, (q15_t)0xB1B7, (q15_t)0x6545,
+	(q15_t)0xB18F, (q15_t)0x6526, (q15_t)0xB167, (q15_t)0x6507,
+	(q15_t)0xB140, (q15_t)0x64E8, (q15_t)0xB118, (q15_t)0x64C9,
+	(q15_t)0xB0F0, (q15_t)0x64AA, (q15_t)0xB0C9, (q15_t)0x648B,
+	(q15_t)0xB0A1, (q15_t)0x646C, (q15_t)0xB07A, (q15_t)0x644D,
+	(q15_t)0xB053, (q15_t)0x642D, (q15_t)0xB02B, (q15_t)0x640E,
+	(q15_t)0xB004, (q15_t)0x63EF, (q15_t)0xAFDD, (q15_t)0x63CF,
+	(q15_t)0xAFB6, (q15_t)0x63B0, (q15_t)0xAF8F, (q15_t)0x6390,
+	(q15_t)0xAF68, (q15_t)0x6371, (q15_t)0xAF40, (q15_t)0x6351,
+	(q15_t)0xAF1A, (q15_t)0x6331, (q15_t)0xAEF3, (q15_t)0x6311,
+	(q15_t)0xAECC, (q15_t)0x62F2, (q15_t)0xAEA5, (q15_t)0x62D2,
+	(q15_t)0xAE7E, (q15_t)0x62B2, (q15_t)0xAE57, (q15_t)0x6292,
+	(q15_t)0xAE31, (q15_t)0x6271, (q15_t)0xAE0A, (q15_t)0x6251,
+	(q15_t)0xADE3, (q15_t)0x6231, (q15_t)0xADBD, (q15_t)0x6211,
+	(q15_t)0xAD96, (q15_t)0x61F1, (q15_t)0xAD70, (q15_t)0x61D0,
+	(q15_t)0xAD4A, (q15_t)0x61B0, (q15_t)0xAD23, (q15_t)0x618F,
+	(q15_t)0xACFD, (q15_t)0x616F, (q15_t)0xACD7, (q15_t)0x614E,
+	(q15_t)0xACB1, (q15_t)0x612D, (q15_t)0xAC8A, (q15_t)0x610D,
+	(q15_t)0xAC64, (q15_t)0x60EC, (q15_t)0xAC3E, (q15_t)0x60CB,
+	(q15_t)0xAC18, (q15_t)0x60AA, (q15_t)0xABF2, (q15_t)0x6089,
+	(q15_t)0xABCC, (q15_t)0x6068, (q15_t)0xABA7, (q15_t)0x6047,
+	(q15_t)0xAB81, (q15_t)0x6026, (q15_t)0xAB5B, (q15_t)0x6004,
+	(q15_t)0xAB35, (q15_t)0x5FE3, (q15_t)0xAB10, (q15_t)0x5FC2,
+	(q15_t)0xAAEA, (q15_t)0x5FA0, (q15_t)0xAAC5, (q15_t)0x5F7F,
+	(q15_t)0xAA9F, (q15_t)0x5F5E, (q15_t)0xAA7A, (q15_t)0x5F3C,
+	(q15_t)0xAA54, (q15_t)0x5F1A, (q15_t)0xAA2F, (q15_t)0x5EF9,
+	(q15_t)0xAA0A, (q15_t)0x5ED7, (q15_t)0xA9E5, (q15_t)0x5EB5,
+	(q15_t)0xA9BF, (q15_t)0x5E93, (q15_t)0xA99A, (q15_t)0x5E71,
+	(q15_t)0xA975, (q15_t)0x5E50, (q15_t)0xA950, (q15_t)0x5E2D,
+	(q15_t)0xA92B, (q15_t)0x5E0B, (q15_t)0xA906, (q15_t)0x5DE9,
+	(q15_t)0xA8E2, (q15_t)0x5DC7, (q15_t)0xA8BD, (q15_t)0x5DA5,
+	(q15_t)0xA898, (q15_t)0x5D83, (q15_t)0xA873, (q15_t)0x5D60,
+	(q15_t)0xA84F, (q15_t)0x5D3E, (q15_t)0xA82A, (q15_t)0x5D1B,
+	(q15_t)0xA806, (q15_t)0x5CF9, (q15_t)0xA7E1, (q15_t)0x5CD6,
+	(q15_t)0xA7BD, (q15_t)0x5CB4, (q15_t)0xA798, (q15_t)0x5C91,
+	(q15_t)0xA774, (q15_t)0x5C6E, (q15_t)0xA750, (q15_t)0x5C4B,
+	(q15_t)0xA72B, (q15_t)0x5C29, (q15_t)0xA707, (q15_t)0x5C06,
+	(q15_t)0xA6E3, (q15_t)0x5BE3, (q15_t)0xA6BF, (q15_t)0x5BC0,
+	(q15_t)0xA69B, (q15_t)0x5B9D, (q15_t)0xA677, (q15_t)0x5B79,
+	(q15_t)0xA653, (q15_t)0x5B56, (q15_t)0xA62F, (q15_t)0x5B33,
+	(q15_t)0xA60C, (q15_t)0x5B10, (q15_t)0xA5E8, (q15_t)0x5AEC,
+	(q15_t)0xA5C4, (q15_t)0x5AC9, (q15_t)0xA5A1, (q15_t)0x5AA5,
+	(q15_t)0xA57D, (q15_t)0x5A82, (q15_t)0xA55A, (q15_t)0x5A5E,
+	(q15_t)0xA536, (q15_t)0x5A3B, (q15_t)0xA513, (q15_t)0x5A17,
+	(q15_t)0xA4EF, (q15_t)0x59F3, (q15_t)0xA4CC, (q15_t)0x59D0,
+	(q15_t)0xA4A9, (q15_t)0x59AC, (q15_t)0xA486, (q15_t)0x5988,
+	(q15_t)0xA462, (q15_t)0x5964, (q15_t)0xA43F, (q15_t)0x5940,
+	(q15_t)0xA41C, (q15_t)0x591C, (q15_t)0xA3F9, (q15_t)0x58F8,
+	(q15_t)0xA3D6, (q15_t)0x58D4, (q15_t)0xA3B4, (q15_t)0x58AF,
+	(q15_t)0xA391, (q15_t)0x588B, (q15_t)0xA36E, (q15_t)0x5867,
+	(q15_t)0xA34B, (q15_t)0x5842, (q15_t)0xA329, (q15_t)0x581E,
+	(q15_t)0xA306, (q15_t)0x57F9, (q15_t)0xA2E4, (q15_t)0x57D5,
+	(q15_t)0xA2C1, (q15_t)0x57B0, (q15_t)0xA29F, (q15_t)0x578C,
+	(q15_t)0xA27C, (q15_t)0x5767, (q15_t)0xA25A, (q15_t)0x5742,
+	(q15_t)0xA238, (q15_t)0x571D, (q15_t)0xA216, (q15_t)0x56F9,
+	(q15_t)0xA1F4, (q15_t)0x56D4, (q15_t)0xA1D2, (q15_t)0x56AF,
+	(q15_t)0xA1AF, (q15_t)0x568A, (q15_t)0xA18E, (q15_t)0x5665,
+	(q15_t)0xA16C, (q15_t)0x5640, (q15_t)0xA14A, (q15_t)0x561A,
+	(q15_t)0xA128, (q15_t)0x55F5, (q15_t)0xA106, (q15_t)0x55D0,
+	(q15_t)0xA0E5, (q15_t)0x55AB, (q15_t)0xA0C3, (q15_t)0x5585,
+	(q15_t)0xA0A1, (q15_t)0x5560, (q15_t)0xA080, (q15_t)0x553A,
+	(q15_t)0xA05F, (q15_t)0x5515, (q15_t)0xA03D, (q15_t)0x54EF,
+	(q15_t)0xA01C, (q15_t)0x54CA, (q15_t)0x9FFB, (q15_t)0x54A4,
+	(q15_t)0x9FD9, (q15_t)0x547E, (q15_t)0x9FB8, (q15_t)0x5458,
+	(q15_t)0x9F97, (q15_t)0x5433, (q15_t)0x9F76, (q15_t)0x540D,
+	(q15_t)0x9F55, (q15_t)0x53E7, (q15_t)0x9F34, (q15_t)0x53C1,
+	(q15_t)0x9F13, (q15_t)0x539B, (q15_t)0x9EF2, (q15_t)0x5375,
+	(q15_t)0x9ED2, (q15_t)0x534E, (q15_t)0x9EB1, (q15_t)0x5328,
+	(q15_t)0x9E90, (q15_t)0x5302, (q15_t)0x9E70, (q15_t)0x52DC,
+	(q15_t)0x9E4F, (q15_t)0x52B5, (q15_t)0x9E2F, (q15_t)0x528F,
+	(q15_t)0x9E0E, (q15_t)0x5269, (q15_t)0x9DEE, (q15_t)0x5242,
+	(q15_t)0x9DCE, (q15_t)0x521C, (q15_t)0x9DAE, (q15_t)0x51F5,
+	(q15_t)0x9D8E, (q15_t)0x51CE, (q15_t)0x9D6D, (q15_t)0x51A8,
+	(q15_t)0x9D4D, (q15_t)0x5181, (q15_t)0x9D2D, (q15_t)0x515A,
+	(q15_t)0x9D0D, (q15_t)0x5133, (q15_t)0x9CEE, (q15_t)0x510C,
+	(q15_t)0x9CCE, (q15_t)0x50E5, (q15_t)0x9CAE, (q15_t)0x50BF,
+	(q15_t)0x9C8E, (q15_t)0x5097, (q15_t)0x9C6F, (q15_t)0x5070,
+	(q15_t)0x9C4F, (q15_t)0x5049, (q15_t)0x9C30, (q15_t)0x5022,
+	(q15_t)0x9C10, (q15_t)0x4FFB, (q15_t)0x9BF1, (q15_t)0x4FD4,
+	(q15_t)0x9BD2, (q15_t)0x4FAC, (q15_t)0x9BB2, (q15_t)0x4F85,
+	(q15_t)0x9B93, (q15_t)0x4F5E, (q15_t)0x9B74, (q15_t)0x4F36,
+	(q15_t)0x9B55, (q15_t)0x4F0F, (q15_t)0x9B36, (q15_t)0x4EE7,
+	(q15_t)0x9B17, (q15_t)0x4EBF, (q15_t)0x9AF8, (q15_t)0x4E98,
+	(q15_t)0x9AD9, (q15_t)0x4E70, (q15_t)0x9ABA, (q15_t)0x4E48,
+	(q15_t)0x9A9C, (q15_t)0x4E21, (q15_t)0x9A7D, (q15_t)0x4DF9,
+	(q15_t)0x9A5F, (q15_t)0x4DD1, (q15_t)0x9A40, (q15_t)0x4DA9,
+	(q15_t)0x9A22, (q15_t)0x4D81, (q15_t)0x9A03, (q15_t)0x4D59,
+	(q15_t)0x99E5, (q15_t)0x4D31, (q15_t)0x99C6, (q15_t)0x4D09,
+	(q15_t)0x99A8, (q15_t)0x4CE1, (q15_t)0x998A, (q15_t)0x4CB8,
+	(q15_t)0x996C, (q15_t)0x4C90, (q15_t)0x994E, (q15_t)0x4C68,
+	(q15_t)0x9930, (q15_t)0x4C3F, (q15_t)0x9912, (q15_t)0x4C17,
+	(q15_t)0x98F4, (q15_t)0x4BEF, (q15_t)0x98D6, (q15_t)0x4BC6,
+	(q15_t)0x98B9, (q15_t)0x4B9E, (q15_t)0x989B, (q15_t)0x4B75,
+	(q15_t)0x987D, (q15_t)0x4B4C, (q15_t)0x9860, (q15_t)0x4B24,
+	(q15_t)0x9842, (q15_t)0x4AFB, (q15_t)0x9825, (q15_t)0x4AD2,
+	(q15_t)0x9808, (q15_t)0x4AA9, (q15_t)0x97EA, (q15_t)0x4A81,
+	(q15_t)0x97CD, (q15_t)0x4A58, (q15_t)0x97B0, (q15_t)0x4A2F,
+	(q15_t)0x9793, (q15_t)0x4A06, (q15_t)0x9776, (q15_t)0x49DD,
+	(q15_t)0x9759, (q15_t)0x49B4, (q15_t)0x973C, (q15_t)0x498A,
+	(q15_t)0x971F, (q15_t)0x4961, (q15_t)0x9702, (q15_t)0x4938,
+	(q15_t)0x96E6, (q15_t)0x490F, (q15_t)0x96C9, (q15_t)0x48E6,
+	(q15_t)0x96AC, (q15_t)0x48BC, (q15_t)0x9690, (q15_t)0x4893,
+	(q15_t)0x9673, (q15_t)0x4869, (q15_t)0x9657, (q15_t)0x4840,
+	(q15_t)0x963B, (q15_t)0x4816, (q15_t)0x961E, (q15_t)0x47ED,
+	(q15_t)0x9602, (q15_t)0x47C3, (q15_t)0x95E6, (q15_t)0x479A,
+	(q15_t)0x95CA, (q15_t)0x4770, (q15_t)0x95AE, (q15_t)0x4746,
+	(q15_t)0x9592, (q15_t)0x471C, (q15_t)0x9576, (q15_t)0x46F3,
+	(q15_t)0x955A, (q15_t)0x46C9, (q15_t)0x953E, (q15_t)0x469F,
+	(q15_t)0x9523, (q15_t)0x4675, (q15_t)0x9507, (q15_t)0x464B,
+	(q15_t)0x94EC, (q15_t)0x4621, (q15_t)0x94D0, (q15_t)0x45F7,
+	(q15_t)0x94B5, (q15_t)0x45CD, (q15_t)0x9499, (q15_t)0x45A3,
+	(q15_t)0x947E, (q15_t)0x4578, (q15_t)0x9463, (q15_t)0x454E,
+	(q15_t)0x9447, (q15_t)0x4524, (q15_t)0x942C, (q15_t)0x44FA,
+	(q15_t)0x9411, (q15_t)0x44CF, (q15_t)0x93F6, (q15_t)0x44A5,
+	(q15_t)0x93DB, (q15_t)0x447A, (q15_t)0x93C0, (q15_t)0x4450,
+	(q15_t)0x93A6, (q15_t)0x4425, (q15_t)0x938B, (q15_t)0x43FB,
+	(q15_t)0x9370, (q15_t)0x43D0, (q15_t)0x9356, (q15_t)0x43A5,
+	(q15_t)0x933B, (q15_t)0x437B, (q15_t)0x9321, (q15_t)0x4350,
+	(q15_t)0x9306, (q15_t)0x4325, (q15_t)0x92EC, (q15_t)0x42FA,
+	(q15_t)0x92D2, (q15_t)0x42D0, (q15_t)0x92B7, (q15_t)0x42A5,
+	(q15_t)0x929D, (q15_t)0x427A, (q15_t)0x9283, (q15_t)0x424F,
+	(q15_t)0x9269, (q15_t)0x4224, (q15_t)0x924F, (q15_t)0x41F9,
+	(q15_t)0x9235, (q15_t)0x41CE, (q15_t)0x921C, (q15_t)0x41A2,
+	(q15_t)0x9202, (q15_t)0x4177, (q15_t)0x91E8, (q15_t)0x414C,
+	(q15_t)0x91CF, (q15_t)0x4121, (q15_t)0x91B5, (q15_t)0x40F6,
+	(q15_t)0x919C, (q15_t)0x40CA, (q15_t)0x9182, (q15_t)0x409F,
+	(q15_t)0x9169, (q15_t)0x4073, (q15_t)0x9150, (q15_t)0x4048,
+	(q15_t)0x9136, (q15_t)0x401D, (q15_t)0x911D, (q15_t)0x3FF1,
+	(q15_t)0x9104, (q15_t)0x3FC5, (q15_t)0x90EB, (q15_t)0x3F9A,
+	(q15_t)0x90D2, (q15_t)0x3F6E, (q15_t)0x90B9, (q15_t)0x3F43,
+	(q15_t)0x90A0, (q15_t)0x3F17, (q15_t)0x9088, (q15_t)0x3EEB,
+	(q15_t)0x906F, (q15_t)0x3EBF, (q15_t)0x9056, (q15_t)0x3E93,
+	(q15_t)0x903E, (q15_t)0x3E68, (q15_t)0x9025, (q15_t)0x3E3C,
+	(q15_t)0x900D, (q15_t)0x3E10, (q15_t)0x8FF5, (q15_t)0x3DE4,
+	(q15_t)0x8FDC, (q15_t)0x3DB8, (q15_t)0x8FC4, (q15_t)0x3D8C,
+	(q15_t)0x8FAC, (q15_t)0x3D60, (q15_t)0x8F94, (q15_t)0x3D33,
+	(q15_t)0x8F7C, (q15_t)0x3D07, (q15_t)0x8F64, (q15_t)0x3CDB,
+	(q15_t)0x8F4C, (q15_t)0x3CAF, (q15_t)0x8F34, (q15_t)0x3C83,
+	(q15_t)0x8F1D, (q15_t)0x3C56, (q15_t)0x8F05, (q15_t)0x3C2A,
+	(q15_t)0x8EED, (q15_t)0x3BFD, (q15_t)0x8ED6, (q15_t)0x3BD1,
+	(q15_t)0x8EBE, (q15_t)0x3BA5, (q15_t)0x8EA7, (q15_t)0x3B78,
+	(q15_t)0x8E90, (q15_t)0x3B4C, (q15_t)0x8E79, (q15_t)0x3B1F,
+	(q15_t)0x8E61, (q15_t)0x3AF2, (q15_t)0x8E4A, (q15_t)0x3AC6,
+	(q15_t)0x8E33, (q15_t)0x3A99, (q15_t)0x8E1C, (q15_t)0x3A6C,
+	(q15_t)0x8E05, (q15_t)0x3A40, (q15_t)0x8DEE, (q15_t)0x3A13,
+	(q15_t)0x8DD8, (q15_t)0x39E6, (q15_t)0x8DC1, (q15_t)0x39B9,
+	(q15_t)0x8DAA, (q15_t)0x398C, (q15_t)0x8D94, (q15_t)0x395F,
+	(q15_t)0x8D7D, (q15_t)0x3932, (q15_t)0x8D67, (q15_t)0x3906,
+	(q15_t)0x8D50, (q15_t)0x38D8, (q15_t)0x8D3A, (q15_t)0x38AB,
+	(q15_t)0x8D24, (q15_t)0x387E, (q15_t)0x8D0E, (q15_t)0x3851,
+	(q15_t)0x8CF8, (q15_t)0x3824, (q15_t)0x8CE2, (q15_t)0x37F7,
+	(q15_t)0x8CCC, (q15_t)0x37CA, (q15_t)0x8CB6, (q15_t)0x379C,
+	(q15_t)0x8CA0, (q15_t)0x376F, (q15_t)0x8C8A, (q15_t)0x3742,
+	(q15_t)0x8C75, (q15_t)0x3714, (q15_t)0x8C5F, (q15_t)0x36E7,
+	(q15_t)0x8C4A, (q15_t)0x36BA, (q15_t)0x8C34, (q15_t)0x368C,
+	(q15_t)0x8C1F, (q15_t)0x365F, (q15_t)0x8C09, (q15_t)0x3631,
+	(q15_t)0x8BF4, (q15_t)0x3604, (q15_t)0x8BDF, (q15_t)0x35D6,
+	(q15_t)0x8BCA, (q15_t)0x35A8, (q15_t)0x8BB5, (q15_t)0x357B,
+	(q15_t)0x8BA0, (q15_t)0x354D, (q15_t)0x8B8B, (q15_t)0x351F,
+	(q15_t)0x8B76, (q15_t)0x34F2, (q15_t)0x8B61, (q15_t)0x34C4,
+	(q15_t)0x8B4D, (q15_t)0x3496, (q15_t)0x8B38, (q15_t)0x3468,
+	(q15_t)0x8B24, (q15_t)0x343A, (q15_t)0x8B0F, (q15_t)0x340C,
+	(q15_t)0x8AFB, (q15_t)0x33DE, (q15_t)0x8AE6, (q15_t)0x33B0,
+	(q15_t)0x8AD2, (q15_t)0x3382, (q15_t)0x8ABE, (q15_t)0x3354,
+	(q15_t)0x8AAA, (q15_t)0x3326, (q15_t)0x8A96, (q15_t)0x32F8,
+	(q15_t)0x8A82, (q15_t)0x32CA, (q15_t)0x8A6E, (q15_t)0x329C,
+	(q15_t)0x8A5A, (q15_t)0x326E, (q15_t)0x8A46, (q15_t)0x3240,
+	(q15_t)0x8A33, (q15_t)0x3211, (q15_t)0x8A1F, (q15_t)0x31E3,
+	(q15_t)0x8A0B, (q15_t)0x31B5, (q15_t)0x89F8, (q15_t)0x3186,
+	(q15_t)0x89E4, (q15_t)0x3158, (q15_t)0x89D1, (q15_t)0x312A,
+	(q15_t)0x89BE, (q15_t)0x30FB, (q15_t)0x89AB, (q15_t)0x30CD,
+	(q15_t)0x8997, (q15_t)0x309E, (q15_t)0x8984, (q15_t)0x3070,
+	(q15_t)0x8971, (q15_t)0x3041, (q15_t)0x895F, (q15_t)0x3013,
+	(q15_t)0x894C, (q15_t)0x2FE4, (q15_t)0x8939, (q15_t)0x2FB5,
+	(q15_t)0x8926, (q15_t)0x2F87, (q15_t)0x8914, (q15_t)0x2F58,
+	(q15_t)0x8901, (q15_t)0x2F29, (q15_t)0x88EF, (q15_t)0x2EFB,
+	(q15_t)0x88DC, (q15_t)0x2ECC, (q15_t)0x88CA, (q15_t)0x2E9D,
+	(q15_t)0x88B8, (q15_t)0x2E6E, (q15_t)0x88A5, (q15_t)0x2E3F,
+	(q15_t)0x8893, (q15_t)0x2E11, (q15_t)0x8881, (q15_t)0x2DE2,
+	(q15_t)0x886F, (q15_t)0x2DB3, (q15_t)0x885D, (q15_t)0x2D84,
+	(q15_t)0x884B, (q15_t)0x2D55, (q15_t)0x883A, (q15_t)0x2D26,
+	(q15_t)0x8828, (q15_t)0x2CF7, (q15_t)0x8816, (q15_t)0x2CC8,
+	(q15_t)0x8805, (q15_t)0x2C98, (q15_t)0x87F3, (q15_t)0x2C69,
+	(q15_t)0x87E2, (q15_t)0x2C3A, (q15_t)0x87D1, (q15_t)0x2C0B,
+	(q15_t)0x87BF, (q15_t)0x2BDC, (q15_t)0x87AE, (q15_t)0x2BAD,
+	(q15_t)0x879D, (q15_t)0x2B7D, (q15_t)0x878C, (q15_t)0x2B4E,
+	(q15_t)0x877B, (q15_t)0x2B1F, (q15_t)0x876A, (q15_t)0x2AEF,
+	(q15_t)0x8759, (q15_t)0x2AC0, (q15_t)0x8749, (q15_t)0x2A91,
+	(q15_t)0x8738, (q15_t)0x2A61, (q15_t)0x8727, (q15_t)0x2A32,
+	(q15_t)0x8717, (q15_t)0x2A02, (q15_t)0x8706, (q15_t)0x29D3,
+	(q15_t)0x86F6, (q15_t)0x29A3, (q15_t)0x86E6, (q15_t)0x2974,
+	(q15_t)0x86D5, (q15_t)0x2944, (q15_t)0x86C5, (q15_t)0x2915,
+	(q15_t)0x86B5, (q15_t)0x28E5, (q15_t)0x86A5, (q15_t)0x28B5,
+	(q15_t)0x8695, (q15_t)0x2886, (q15_t)0x8685, (q15_t)0x2856,
+	(q15_t)0x8675, (q15_t)0x2826, (q15_t)0x8666, (q15_t)0x27F6,
+	(q15_t)0x8656, (q15_t)0x27C7, (q15_t)0x8646, (q15_t)0x2797,
+	(q15_t)0x8637, (q15_t)0x2767, (q15_t)0x8627, (q15_t)0x2737,
+	(q15_t)0x8618, (q15_t)0x2707, (q15_t)0x8609, (q15_t)0x26D8,
+	(q15_t)0x85FA, (q15_t)0x26A8, (q15_t)0x85EA, (q15_t)0x2678,
+	(q15_t)0x85DB, (q15_t)0x2648, (q15_t)0x85CC, (q15_t)0x2618,
+	(q15_t)0x85BD, (q15_t)0x25E8, (q15_t)0x85AF, (q15_t)0x25B8,
+	(q15_t)0x85A0, (q15_t)0x2588, (q15_t)0x8591, (q15_t)0x2558,
+	(q15_t)0x8582, (q15_t)0x2528, (q15_t)0x8574, (q15_t)0x24F7,
+	(q15_t)0x8565, (q15_t)0x24C7, (q15_t)0x8557, (q15_t)0x2497,
+	(q15_t)0x8549, (q15_t)0x2467, (q15_t)0x853A, (q15_t)0x2437,
+	(q15_t)0x852C, (q15_t)0x2407, (q15_t)0x851E, (q15_t)0x23D6,
+	(q15_t)0x8510, (q15_t)0x23A6, (q15_t)0x8502, (q15_t)0x2376,
+	(q15_t)0x84F4, (q15_t)0x2345, (q15_t)0x84E6, (q15_t)0x2315,
+	(q15_t)0x84D9, (q15_t)0x22E5, (q15_t)0x84CB, (q15_t)0x22B4,
+	(q15_t)0x84BD, (q15_t)0x2284, (q15_t)0x84B0, (q15_t)0x2254,
+	(q15_t)0x84A2, (q15_t)0x2223, (q15_t)0x8495, (q15_t)0x21F3,
+	(q15_t)0x8488, (q15_t)0x21C2, (q15_t)0x847B, (q15_t)0x2192,
+	(q15_t)0x846D, (q15_t)0x2161, (q15_t)0x8460, (q15_t)0x2131,
+	(q15_t)0x8453, (q15_t)0x2100, (q15_t)0x8446, (q15_t)0x20D0,
+	(q15_t)0x843A, (q15_t)0x209F, (q15_t)0x842D, (q15_t)0x206E,
+	(q15_t)0x8420, (q15_t)0x203E, (q15_t)0x8414, (q15_t)0x200D,
+	(q15_t)0x8407, (q15_t)0x1FDC, (q15_t)0x83FA, (q15_t)0x1FAC,
+	(q15_t)0x83EE, (q15_t)0x1F7B, (q15_t)0x83E2, (q15_t)0x1F4A,
+	(q15_t)0x83D6, (q15_t)0x1F19, (q15_t)0x83C9, (q15_t)0x1EE9,
+	(q15_t)0x83BD, (q15_t)0x1EB8, (q15_t)0x83B1, (q15_t)0x1E87,
+	(q15_t)0x83A5, (q15_t)0x1E56, (q15_t)0x8399, (q15_t)0x1E25,
+	(q15_t)0x838E, (q15_t)0x1DF5, (q15_t)0x8382, (q15_t)0x1DC4,
+	(q15_t)0x8376, (q15_t)0x1D93, (q15_t)0x836B, (q15_t)0x1D62,
+	(q15_t)0x835F, (q15_t)0x1D31, (q15_t)0x8354, (q15_t)0x1D00,
+	(q15_t)0x8348, (q15_t)0x1CCF, (q15_t)0x833D, (q15_t)0x1C9E,
+	(q15_t)0x8332, (q15_t)0x1C6D, (q15_t)0x8327, (q15_t)0x1C3C,
+	(q15_t)0x831C, (q15_t)0x1C0B, (q15_t)0x8311, (q15_t)0x1BDA,
+	(q15_t)0x8306, (q15_t)0x1BA9, (q15_t)0x82FB, (q15_t)0x1B78,
+	(q15_t)0x82F0, (q15_t)0x1B47, (q15_t)0x82E6, (q15_t)0x1B16,
+	(q15_t)0x82DB, (q15_t)0x1AE4, (q15_t)0x82D0, (q15_t)0x1AB3,
+	(q15_t)0x82C6, (q15_t)0x1A82, (q15_t)0x82BC, (q15_t)0x1A51,
+	(q15_t)0x82B1, (q15_t)0x1A20, (q15_t)0x82A7, (q15_t)0x19EF,
+	(q15_t)0x829D, (q15_t)0x19BD, (q15_t)0x8293, (q15_t)0x198C,
+	(q15_t)0x8289, (q15_t)0x195B, (q15_t)0x827F, (q15_t)0x192A,
+	(q15_t)0x8275, (q15_t)0x18F8, (q15_t)0x826B, (q15_t)0x18C7,
+	(q15_t)0x8262, (q15_t)0x1896, (q15_t)0x8258, (q15_t)0x1864,
+	(q15_t)0x824F, (q15_t)0x1833, (q15_t)0x8245, (q15_t)0x1802,
+	(q15_t)0x823C, (q15_t)0x17D0, (q15_t)0x8232, (q15_t)0x179F,
+	(q15_t)0x8229, (q15_t)0x176D, (q15_t)0x8220, (q15_t)0x173C,
+	(q15_t)0x8217, (q15_t)0x170A, (q15_t)0x820E, (q15_t)0x16D9,
+	(q15_t)0x8205, (q15_t)0x16A8, (q15_t)0x81FC, (q15_t)0x1676,
+	(q15_t)0x81F3, (q15_t)0x1645, (q15_t)0x81EB, (q15_t)0x1613,
+	(q15_t)0x81E2, (q15_t)0x15E2, (q15_t)0x81D9, (q15_t)0x15B0,
+	(q15_t)0x81D1, (q15_t)0x157F, (q15_t)0x81C8, (q15_t)0x154D,
+	(q15_t)0x81C0, (q15_t)0x151B, (q15_t)0x81B8, (q15_t)0x14EA,
+	(q15_t)0x81B0, (q15_t)0x14B8, (q15_t)0x81A8, (q15_t)0x1487,
+	(q15_t)0x81A0, (q15_t)0x1455, (q15_t)0x8198, (q15_t)0x1423,
+	(q15_t)0x8190, (q15_t)0x13F2, (q15_t)0x8188, (q15_t)0x13C0,
+	(q15_t)0x8180, (q15_t)0x138E, (q15_t)0x8179, (q15_t)0x135D,
+	(q15_t)0x8171, (q15_t)0x132B, (q15_t)0x816A, (q15_t)0x12F9,
+	(q15_t)0x8162, (q15_t)0x12C8, (q15_t)0x815B, (q15_t)0x1296,
+	(q15_t)0x8154, (q15_t)0x1264, (q15_t)0x814C, (q15_t)0x1232,
+	(q15_t)0x8145, (q15_t)0x1201, (q15_t)0x813E, (q15_t)0x11CF,
+	(q15_t)0x8137, (q15_t)0x119D, (q15_t)0x8130, (q15_t)0x116B,
+	(q15_t)0x812A, (q15_t)0x1139, (q15_t)0x8123, (q15_t)0x1108,
+	(q15_t)0x811C, (q15_t)0x10D6, (q15_t)0x8116, (q15_t)0x10A4,
+	(q15_t)0x810F, (q15_t)0x1072, (q15_t)0x8109, (q15_t)0x1040,
+	(q15_t)0x8102, (q15_t)0x100E, (q15_t)0x80FC, (q15_t)0x0FDD,
+	(q15_t)0x80F6, (q15_t)0x0FAB, (q15_t)0x80F0, (q15_t)0x0F79,
+	(q15_t)0x80EA, (q15_t)0x0F47, (q15_t)0x80E4, (q15_t)0x0F15,
+	(q15_t)0x80DE, (q15_t)0x0EE3, (q15_t)0x80D8, (q15_t)0x0EB1,
+	(q15_t)0x80D2, (q15_t)0x0E7F, (q15_t)0x80CD, (q15_t)0x0E4D,
+	(q15_t)0x80C7, (q15_t)0x0E1B, (q15_t)0x80C2, (q15_t)0x0DE9,
+	(q15_t)0x80BC, (q15_t)0x0DB7, (q15_t)0x80B7, (q15_t)0x0D85,
+	(q15_t)0x80B2, (q15_t)0x0D53, (q15_t)0x80AC, (q15_t)0x0D21,
+	(q15_t)0x80A7, (q15_t)0x0CEF, (q15_t)0x80A2, (q15_t)0x0CBD,
+	(q15_t)0x809D, (q15_t)0x0C8B, (q15_t)0x8098, (q15_t)0x0C59,
+	(q15_t)0x8094, (q15_t)0x0C27, (q15_t)0x808F, (q15_t)0x0BF5,
+	(q15_t)0x808A, (q15_t)0x0BC3, (q15_t)0x8086, (q15_t)0x0B91,
+	(q15_t)0x8081, (q15_t)0x0B5F, (q15_t)0x807D, (q15_t)0x0B2D,
+	(q15_t)0x8078, (q15_t)0x0AFB, (q15_t)0x8074, (q15_t)0x0AC9,
+	(q15_t)0x8070, (q15_t)0x0A97, (q15_t)0x806C, (q15_t)0x0A65,
+	(q15_t)0x8068, (q15_t)0x0A33, (q15_t)0x8064, (q15_t)0x0A00,
+	(q15_t)0x8060, (q15_t)0x09CE, (q15_t)0x805C, (q15_t)0x099C,
+	(q15_t)0x8058, (q15_t)0x096A, (q15_t)0x8055, (q15_t)0x0938,
+	(q15_t)0x8051, (q15_t)0x0906, (q15_t)0x804E, (q15_t)0x08D4,
+	(q15_t)0x804A, (q15_t)0x08A2, (q15_t)0x8047, (q15_t)0x086F,
+	(q15_t)0x8043, (q15_t)0x083D, (q15_t)0x8040, (q15_t)0x080B,
+	(q15_t)0x803D, (q15_t)0x07D9, (q15_t)0x803A, (q15_t)0x07A7,
+	(q15_t)0x8037, (q15_t)0x0775, (q15_t)0x8034, (q15_t)0x0742,
+	(q15_t)0x8031, (q15_t)0x0710, (q15_t)0x802F, (q15_t)0x06DE,
+	(q15_t)0x802C, (q15_t)0x06AC, (q15_t)0x8029, (q15_t)0x067A,
+	(q15_t)0x8027, (q15_t)0x0647, (q15_t)0x8025, (q15_t)0x0615,
+	(q15_t)0x8022, (q15_t)0x05E3, (q15_t)0x8020, (q15_t)0x05B1,
+	(q15_t)0x801E, (q15_t)0x057F, (q15_t)0x801C, (q15_t)0x054C,
+	(q15_t)0x801A, (q15_t)0x051A, (q15_t)0x8018, (q15_t)0x04E8,
+	(q15_t)0x8016, (q15_t)0x04B6, (q15_t)0x8014, (q15_t)0x0483,
+	(q15_t)0x8012, (q15_t)0x0451, (q15_t)0x8011, (q15_t)0x041F,
+	(q15_t)0x800F, (q15_t)0x03ED, (q15_t)0x800D, (q15_t)0x03BA,
+	(q15_t)0x800C, (q15_t)0x0388, (q15_t)0x800B, (q15_t)0x0356,
+	(q15_t)0x8009, (q15_t)0x0324, (q15_t)0x8008, (q15_t)0x02F1,
+	(q15_t)0x8007, (q15_t)0x02BF, (q15_t)0x8006, (q15_t)0x028D,
+	(q15_t)0x8005, (q15_t)0x025B, (q15_t)0x8004, (q15_t)0x0228,
+	(q15_t)0x8003, (q15_t)0x01F6, (q15_t)0x8003, (q15_t)0x01C4,
+	(q15_t)0x8002, (q15_t)0x0192, (q15_t)0x8001, (q15_t)0x015F,
+	(q15_t)0x8001, (q15_t)0x012D, (q15_t)0x8000, (q15_t)0x00FB,
+	(q15_t)0x8000, (q15_t)0x00C9, (q15_t)0x8000, (q15_t)0x0096,
+	(q15_t)0x8000, (q15_t)0x0064, (q15_t)0x8000, (q15_t)0x0032,
+	(q15_t)0x8000, (q15_t)0x0000, (q15_t)0x8000, (q15_t)0xFFCD,
+	(q15_t)0x8000, (q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFF69,
+	(q15_t)0x8000, (q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF04,
+	(q15_t)0x8001, (q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFEA0,
+	(q15_t)0x8002, (q15_t)0xFE6D, (q15_t)0x8003, (q15_t)0xFE3B,
+	(q15_t)0x8003, (q15_t)0xFE09, (q15_t)0x8004, (q15_t)0xFDD7,
+	(q15_t)0x8005, (q15_t)0xFDA4, (q15_t)0x8006, (q15_t)0xFD72,
+	(q15_t)0x8007, (q15_t)0xFD40, (q15_t)0x8008, (q15_t)0xFD0E,
+	(q15_t)0x8009, (q15_t)0xFCDB, (q15_t)0x800B, (q15_t)0xFCA9,
+	(q15_t)0x800C, (q15_t)0xFC77, (q15_t)0x800D, (q15_t)0xFC45,
+	(q15_t)0x800F, (q15_t)0xFC12, (q15_t)0x8011, (q15_t)0xFBE0,
+	(q15_t)0x8012, (q15_t)0xFBAE, (q15_t)0x8014, (q15_t)0xFB7C,
+	(q15_t)0x8016, (q15_t)0xFB49, (q15_t)0x8018, (q15_t)0xFB17,
+	(q15_t)0x801A, (q15_t)0xFAE5, (q15_t)0x801C, (q15_t)0xFAB3,
+	(q15_t)0x801E, (q15_t)0xFA80, (q15_t)0x8020, (q15_t)0xFA4E,
+	(q15_t)0x8022, (q15_t)0xFA1C, (q15_t)0x8025, (q15_t)0xF9EA,
+	(q15_t)0x8027, (q15_t)0xF9B8, (q15_t)0x8029, (q15_t)0xF985,
+	(q15_t)0x802C, (q15_t)0xF953, (q15_t)0x802F, (q15_t)0xF921,
+	(q15_t)0x8031, (q15_t)0xF8EF, (q15_t)0x8034, (q15_t)0xF8BD,
+	(q15_t)0x8037, (q15_t)0xF88A, (q15_t)0x803A, (q15_t)0xF858,
+	(q15_t)0x803D, (q15_t)0xF826, (q15_t)0x8040, (q15_t)0xF7F4,
+	(q15_t)0x8043, (q15_t)0xF7C2, (q15_t)0x8047, (q15_t)0xF790,
+	(q15_t)0x804A, (q15_t)0xF75D, (q15_t)0x804E, (q15_t)0xF72B,
+	(q15_t)0x8051, (q15_t)0xF6F9, (q15_t)0x8055, (q15_t)0xF6C7,
+	(q15_t)0x8058, (q15_t)0xF695, (q15_t)0x805C, (q15_t)0xF663,
+	(q15_t)0x8060, (q15_t)0xF631, (q15_t)0x8064, (q15_t)0xF5FF,
+	(q15_t)0x8068, (q15_t)0xF5CC, (q15_t)0x806C, (q15_t)0xF59A,
+	(q15_t)0x8070, (q15_t)0xF568, (q15_t)0x8074, (q15_t)0xF536,
+	(q15_t)0x8078, (q15_t)0xF504, (q15_t)0x807D, (q15_t)0xF4D2,
+	(q15_t)0x8081, (q15_t)0xF4A0, (q15_t)0x8086, (q15_t)0xF46E,
+	(q15_t)0x808A, (q15_t)0xF43C, (q15_t)0x808F, (q15_t)0xF40A,
+	(q15_t)0x8094, (q15_t)0xF3D8, (q15_t)0x8098, (q15_t)0xF3A6,
+	(q15_t)0x809D, (q15_t)0xF374, (q15_t)0x80A2, (q15_t)0xF342,
+	(q15_t)0x80A7, (q15_t)0xF310, (q15_t)0x80AC, (q15_t)0xF2DE,
+	(q15_t)0x80B2, (q15_t)0xF2AC, (q15_t)0x80B7, (q15_t)0xF27A,
+	(q15_t)0x80BC, (q15_t)0xF248, (q15_t)0x80C2, (q15_t)0xF216,
+	(q15_t)0x80C7, (q15_t)0xF1E4, (q15_t)0x80CD, (q15_t)0xF1B2,
+	(q15_t)0x80D2, (q15_t)0xF180, (q15_t)0x80D8, (q15_t)0xF14E,
+	(q15_t)0x80DE, (q15_t)0xF11C, (q15_t)0x80E4, (q15_t)0xF0EA,
+	(q15_t)0x80EA, (q15_t)0xF0B8, (q15_t)0x80F0, (q15_t)0xF086,
+	(q15_t)0x80F6, (q15_t)0xF054, (q15_t)0x80FC, (q15_t)0xF022,
+	(q15_t)0x8102, (q15_t)0xEFF1, (q15_t)0x8109, (q15_t)0xEFBF,
+	(q15_t)0x810F, (q15_t)0xEF8D, (q15_t)0x8116, (q15_t)0xEF5B,
+	(q15_t)0x811C, (q15_t)0xEF29, (q15_t)0x8123, (q15_t)0xEEF7,
+	(q15_t)0x812A, (q15_t)0xEEC6, (q15_t)0x8130, (q15_t)0xEE94,
+	(q15_t)0x8137, (q15_t)0xEE62, (q15_t)0x813E, (q15_t)0xEE30,
+	(q15_t)0x8145, (q15_t)0xEDFE, (q15_t)0x814C, (q15_t)0xEDCD,
+	(q15_t)0x8154, (q15_t)0xED9B, (q15_t)0x815B, (q15_t)0xED69,
+	(q15_t)0x8162, (q15_t)0xED37, (q15_t)0x816A, (q15_t)0xED06,
+	(q15_t)0x8171, (q15_t)0xECD4, (q15_t)0x8179, (q15_t)0xECA2,
+	(q15_t)0x8180, (q15_t)0xEC71, (q15_t)0x8188, (q15_t)0xEC3F,
+	(q15_t)0x8190, (q15_t)0xEC0D, (q15_t)0x8198, (q15_t)0xEBDC,
+	(q15_t)0x81A0, (q15_t)0xEBAA, (q15_t)0x81A8, (q15_t)0xEB78,
+	(q15_t)0x81B0, (q15_t)0xEB47, (q15_t)0x81B8, (q15_t)0xEB15,
+	(q15_t)0x81C0, (q15_t)0xEAE4, (q15_t)0x81C8, (q15_t)0xEAB2,
+	(q15_t)0x81D1, (q15_t)0xEA80, (q15_t)0x81D9, (q15_t)0xEA4F,
+	(q15_t)0x81E2, (q15_t)0xEA1D, (q15_t)0x81EB, (q15_t)0xE9EC,
+	(q15_t)0x81F3, (q15_t)0xE9BA, (q15_t)0x81FC, (q15_t)0xE989,
+	(q15_t)0x8205, (q15_t)0xE957, (q15_t)0x820E, (q15_t)0xE926,
+	(q15_t)0x8217, (q15_t)0xE8F5, (q15_t)0x8220, (q15_t)0xE8C3,
+	(q15_t)0x8229, (q15_t)0xE892, (q15_t)0x8232, (q15_t)0xE860,
+	(q15_t)0x823C, (q15_t)0xE82F, (q15_t)0x8245, (q15_t)0xE7FD,
+	(q15_t)0x824F, (q15_t)0xE7CC, (q15_t)0x8258, (q15_t)0xE79B,
+	(q15_t)0x8262, (q15_t)0xE769, (q15_t)0x826B, (q15_t)0xE738,
+	(q15_t)0x8275, (q15_t)0xE707, (q15_t)0x827F, (q15_t)0xE6D5,
+	(q15_t)0x8289, (q15_t)0xE6A4, (q15_t)0x8293, (q15_t)0xE673,
+	(q15_t)0x829D, (q15_t)0xE642, (q15_t)0x82A7, (q15_t)0xE610,
+	(q15_t)0x82B1, (q15_t)0xE5DF, (q15_t)0x82BC, (q15_t)0xE5AE,
+	(q15_t)0x82C6, (q15_t)0xE57D, (q15_t)0x82D0, (q15_t)0xE54C,
+	(q15_t)0x82DB, (q15_t)0xE51B, (q15_t)0x82E6, (q15_t)0xE4E9,
+	(q15_t)0x82F0, (q15_t)0xE4B8, (q15_t)0x82FB, (q15_t)0xE487,
+	(q15_t)0x8306, (q15_t)0xE456, (q15_t)0x8311, (q15_t)0xE425,
+	(q15_t)0x831C, (q15_t)0xE3F4, (q15_t)0x8327, (q15_t)0xE3C3,
+	(q15_t)0x8332, (q15_t)0xE392, (q15_t)0x833D, (q15_t)0xE361,
+	(q15_t)0x8348, (q15_t)0xE330, (q15_t)0x8354, (q15_t)0xE2FF,
+	(q15_t)0x835F, (q15_t)0xE2CE, (q15_t)0x836B, (q15_t)0xE29D,
+	(q15_t)0x8376, (q15_t)0xE26C, (q15_t)0x8382, (q15_t)0xE23B,
+	(q15_t)0x838E, (q15_t)0xE20A, (q15_t)0x8399, (q15_t)0xE1DA,
+	(q15_t)0x83A5, (q15_t)0xE1A9, (q15_t)0x83B1, (q15_t)0xE178,
+	(q15_t)0x83BD, (q15_t)0xE147, (q15_t)0x83C9, (q15_t)0xE116,
+	(q15_t)0x83D6, (q15_t)0xE0E6, (q15_t)0x83E2, (q15_t)0xE0B5,
+	(q15_t)0x83EE, (q15_t)0xE084, (q15_t)0x83FA, (q15_t)0xE053,
+	(q15_t)0x8407, (q15_t)0xE023, (q15_t)0x8414, (q15_t)0xDFF2,
+	(q15_t)0x8420, (q15_t)0xDFC1, (q15_t)0x842D, (q15_t)0xDF91,
+	(q15_t)0x843A, (q15_t)0xDF60, (q15_t)0x8446, (q15_t)0xDF2F,
+	(q15_t)0x8453, (q15_t)0xDEFF, (q15_t)0x8460, (q15_t)0xDECE,
+	(q15_t)0x846D, (q15_t)0xDE9E, (q15_t)0x847B, (q15_t)0xDE6D,
+	(q15_t)0x8488, (q15_t)0xDE3D, (q15_t)0x8495, (q15_t)0xDE0C,
+	(q15_t)0x84A2, (q15_t)0xDDDC, (q15_t)0x84B0, (q15_t)0xDDAB,
+	(q15_t)0x84BD, (q15_t)0xDD7B, (q15_t)0x84CB, (q15_t)0xDD4B,
+	(q15_t)0x84D9, (q15_t)0xDD1A, (q15_t)0x84E6, (q15_t)0xDCEA,
+	(q15_t)0x84F4, (q15_t)0xDCBA, (q15_t)0x8502, (q15_t)0xDC89,
+	(q15_t)0x8510, (q15_t)0xDC59, (q15_t)0x851E, (q15_t)0xDC29,
+	(q15_t)0x852C, (q15_t)0xDBF8, (q15_t)0x853A, (q15_t)0xDBC8,
+	(q15_t)0x8549, (q15_t)0xDB98, (q15_t)0x8557, (q15_t)0xDB68,
+	(q15_t)0x8565, (q15_t)0xDB38, (q15_t)0x8574, (q15_t)0xDB08,
+	(q15_t)0x8582, (q15_t)0xDAD7, (q15_t)0x8591, (q15_t)0xDAA7,
+	(q15_t)0x85A0, (q15_t)0xDA77, (q15_t)0x85AF, (q15_t)0xDA47,
+	(q15_t)0x85BD, (q15_t)0xDA17, (q15_t)0x85CC, (q15_t)0xD9E7,
+	(q15_t)0x85DB, (q15_t)0xD9B7, (q15_t)0x85EA, (q15_t)0xD987,
+	(q15_t)0x85FA, (q15_t)0xD957, (q15_t)0x8609, (q15_t)0xD927,
+	(q15_t)0x8618, (q15_t)0xD8F8, (q15_t)0x8627, (q15_t)0xD8C8,
+	(q15_t)0x8637, (q15_t)0xD898, (q15_t)0x8646, (q15_t)0xD868,
+	(q15_t)0x8656, (q15_t)0xD838, (q15_t)0x8666, (q15_t)0xD809,
+	(q15_t)0x8675, (q15_t)0xD7D9, (q15_t)0x8685, (q15_t)0xD7A9,
+	(q15_t)0x8695, (q15_t)0xD779, (q15_t)0x86A5, (q15_t)0xD74A,
+	(q15_t)0x86B5, (q15_t)0xD71A, (q15_t)0x86C5, (q15_t)0xD6EA,
+	(q15_t)0x86D5, (q15_t)0xD6BB, (q15_t)0x86E6, (q15_t)0xD68B,
+	(q15_t)0x86F6, (q15_t)0xD65C, (q15_t)0x8706, (q15_t)0xD62C,
+	(q15_t)0x8717, (q15_t)0xD5FD, (q15_t)0x8727, (q15_t)0xD5CD,
+	(q15_t)0x8738, (q15_t)0xD59E, (q15_t)0x8749, (q15_t)0xD56E,
+	(q15_t)0x8759, (q15_t)0xD53F, (q15_t)0x876A, (q15_t)0xD510,
+	(q15_t)0x877B, (q15_t)0xD4E0, (q15_t)0x878C, (q15_t)0xD4B1,
+	(q15_t)0x879D, (q15_t)0xD482, (q15_t)0x87AE, (q15_t)0xD452,
+	(q15_t)0x87BF, (q15_t)0xD423, (q15_t)0x87D1, (q15_t)0xD3F4,
+	(q15_t)0x87E2, (q15_t)0xD3C5, (q15_t)0x87F3, (q15_t)0xD396,
+	(q15_t)0x8805, (q15_t)0xD367, (q15_t)0x8816, (q15_t)0xD337,
+	(q15_t)0x8828, (q15_t)0xD308, (q15_t)0x883A, (q15_t)0xD2D9,
+	(q15_t)0x884B, (q15_t)0xD2AA, (q15_t)0x885D, (q15_t)0xD27B,
+	(q15_t)0x886F, (q15_t)0xD24C, (q15_t)0x8881, (q15_t)0xD21D,
+	(q15_t)0x8893, (q15_t)0xD1EE, (q15_t)0x88A5, (q15_t)0xD1C0,
+	(q15_t)0x88B8, (q15_t)0xD191, (q15_t)0x88CA, (q15_t)0xD162,
+	(q15_t)0x88DC, (q15_t)0xD133, (q15_t)0x88EF, (q15_t)0xD104,
+	(q15_t)0x8901, (q15_t)0xD0D6, (q15_t)0x8914, (q15_t)0xD0A7,
+	(q15_t)0x8926, (q15_t)0xD078, (q15_t)0x8939, (q15_t)0xD04A,
+	(q15_t)0x894C, (q15_t)0xD01B, (q15_t)0x895F, (q15_t)0xCFEC,
+	(q15_t)0x8971, (q15_t)0xCFBE, (q15_t)0x8984, (q15_t)0xCF8F,
+	(q15_t)0x8997, (q15_t)0xCF61, (q15_t)0x89AB, (q15_t)0xCF32,
+	(q15_t)0x89BE, (q15_t)0xCF04, (q15_t)0x89D1, (q15_t)0xCED5,
+	(q15_t)0x89E4, (q15_t)0xCEA7, (q15_t)0x89F8, (q15_t)0xCE79,
+	(q15_t)0x8A0B, (q15_t)0xCE4A, (q15_t)0x8A1F, (q15_t)0xCE1C,
+	(q15_t)0x8A33, (q15_t)0xCDEE, (q15_t)0x8A46, (q15_t)0xCDBF,
+	(q15_t)0x8A5A, (q15_t)0xCD91, (q15_t)0x8A6E, (q15_t)0xCD63,
+	(q15_t)0x8A82, (q15_t)0xCD35, (q15_t)0x8A96, (q15_t)0xCD07,
+	(q15_t)0x8AAA, (q15_t)0xCCD9, (q15_t)0x8ABE, (q15_t)0xCCAB,
+	(q15_t)0x8AD2, (q15_t)0xCC7D, (q15_t)0x8AE6, (q15_t)0xCC4F,
+	(q15_t)0x8AFB, (q15_t)0xCC21, (q15_t)0x8B0F, (q15_t)0xCBF3,
+	(q15_t)0x8B24, (q15_t)0xCBC5, (q15_t)0x8B38, (q15_t)0xCB97,
+	(q15_t)0x8B4D, (q15_t)0xCB69, (q15_t)0x8B61, (q15_t)0xCB3B,
+	(q15_t)0x8B76, (q15_t)0xCB0D, (q15_t)0x8B8B, (q15_t)0xCAE0,
+	(q15_t)0x8BA0, (q15_t)0xCAB2, (q15_t)0x8BB5, (q15_t)0xCA84,
+	(q15_t)0x8BCA, (q15_t)0xCA57, (q15_t)0x8BDF, (q15_t)0xCA29,
+	(q15_t)0x8BF4, (q15_t)0xC9FB, (q15_t)0x8C09, (q15_t)0xC9CE,
+	(q15_t)0x8C1F, (q15_t)0xC9A0, (q15_t)0x8C34, (q15_t)0xC973,
+	(q15_t)0x8C4A, (q15_t)0xC945, (q15_t)0x8C5F, (q15_t)0xC918,
+	(q15_t)0x8C75, (q15_t)0xC8EB, (q15_t)0x8C8A, (q15_t)0xC8BD,
+	(q15_t)0x8CA0, (q15_t)0xC890, (q15_t)0x8CB6, (q15_t)0xC863,
+	(q15_t)0x8CCC, (q15_t)0xC835, (q15_t)0x8CE2, (q15_t)0xC808,
+	(q15_t)0x8CF8, (q15_t)0xC7DB, (q15_t)0x8D0E, (q15_t)0xC7AE,
+	(q15_t)0x8D24, (q15_t)0xC781, (q15_t)0x8D3A, (q15_t)0xC754,
+	(q15_t)0x8D50, (q15_t)0xC727, (q15_t)0x8D67, (q15_t)0xC6F9,
+	(q15_t)0x8D7D, (q15_t)0xC6CD, (q15_t)0x8D94, (q15_t)0xC6A0,
+	(q15_t)0x8DAA, (q15_t)0xC673, (q15_t)0x8DC1, (q15_t)0xC646,
+	(q15_t)0x8DD8, (q15_t)0xC619, (q15_t)0x8DEE, (q15_t)0xC5EC,
+	(q15_t)0x8E05, (q15_t)0xC5BF, (q15_t)0x8E1C, (q15_t)0xC593,
+	(q15_t)0x8E33, (q15_t)0xC566, (q15_t)0x8E4A, (q15_t)0xC539,
+	(q15_t)0x8E61, (q15_t)0xC50D, (q15_t)0x8E79, (q15_t)0xC4E0,
+	(q15_t)0x8E90, (q15_t)0xC4B3, (q15_t)0x8EA7, (q15_t)0xC487,
+	(q15_t)0x8EBE, (q15_t)0xC45A, (q15_t)0x8ED6, (q15_t)0xC42E,
+	(q15_t)0x8EED, (q15_t)0xC402, (q15_t)0x8F05, (q15_t)0xC3D5,
+	(q15_t)0x8F1D, (q15_t)0xC3A9, (q15_t)0x8F34, (q15_t)0xC37C,
+	(q15_t)0x8F4C, (q15_t)0xC350, (q15_t)0x8F64, (q15_t)0xC324,
+	(q15_t)0x8F7C, (q15_t)0xC2F8, (q15_t)0x8F94, (q15_t)0xC2CC,
+	(q15_t)0x8FAC, (q15_t)0xC29F, (q15_t)0x8FC4, (q15_t)0xC273,
+	(q15_t)0x8FDC, (q15_t)0xC247, (q15_t)0x8FF5, (q15_t)0xC21B,
+	(q15_t)0x900D, (q15_t)0xC1EF, (q15_t)0x9025, (q15_t)0xC1C3,
+	(q15_t)0x903E, (q15_t)0xC197, (q15_t)0x9056, (q15_t)0xC16C,
+	(q15_t)0x906F, (q15_t)0xC140, (q15_t)0x9088, (q15_t)0xC114,
+	(q15_t)0x90A0, (q15_t)0xC0E8, (q15_t)0x90B9, (q15_t)0xC0BC,
+	(q15_t)0x90D2, (q15_t)0xC091, (q15_t)0x90EB, (q15_t)0xC065,
+	(q15_t)0x9104, (q15_t)0xC03A, (q15_t)0x911D, (q15_t)0xC00E,
+	(q15_t)0x9136, (q15_t)0xBFE2, (q15_t)0x9150, (q15_t)0xBFB7,
+	(q15_t)0x9169, (q15_t)0xBF8C, (q15_t)0x9182, (q15_t)0xBF60,
+	(q15_t)0x919C, (q15_t)0xBF35, (q15_t)0x91B5, (q15_t)0xBF09,
+	(q15_t)0x91CF, (q15_t)0xBEDE, (q15_t)0x91E8, (q15_t)0xBEB3,
+	(q15_t)0x9202, (q15_t)0xBE88, (q15_t)0x921C, (q15_t)0xBE5D,
+	(q15_t)0x9235, (q15_t)0xBE31, (q15_t)0x924F, (q15_t)0xBE06,
+	(q15_t)0x9269, (q15_t)0xBDDB, (q15_t)0x9283, (q15_t)0xBDB0,
+	(q15_t)0x929D, (q15_t)0xBD85, (q15_t)0x92B7, (q15_t)0xBD5A,
+	(q15_t)0x92D2, (q15_t)0xBD2F, (q15_t)0x92EC, (q15_t)0xBD05,
+	(q15_t)0x9306, (q15_t)0xBCDA, (q15_t)0x9321, (q15_t)0xBCAF,
+	(q15_t)0x933B, (q15_t)0xBC84, (q15_t)0x9356, (q15_t)0xBC5A,
+	(q15_t)0x9370, (q15_t)0xBC2F, (q15_t)0x938B, (q15_t)0xBC04,
+	(q15_t)0x93A6, (q15_t)0xBBDA, (q15_t)0x93C0, (q15_t)0xBBAF,
+	(q15_t)0x93DB, (q15_t)0xBB85, (q15_t)0x93F6, (q15_t)0xBB5A,
+	(q15_t)0x9411, (q15_t)0xBB30, (q15_t)0x942C, (q15_t)0xBB05,
+	(q15_t)0x9447, (q15_t)0xBADB, (q15_t)0x9463, (q15_t)0xBAB1,
+	(q15_t)0x947E, (q15_t)0xBA87, (q15_t)0x9499, (q15_t)0xBA5C,
+	(q15_t)0x94B5, (q15_t)0xBA32, (q15_t)0x94D0, (q15_t)0xBA08,
+	(q15_t)0x94EC, (q15_t)0xB9DE, (q15_t)0x9507, (q15_t)0xB9B4,
+	(q15_t)0x9523, (q15_t)0xB98A, (q15_t)0x953E, (q15_t)0xB960,
+	(q15_t)0x955A, (q15_t)0xB936, (q15_t)0x9576, (q15_t)0xB90C,
+	(q15_t)0x9592, (q15_t)0xB8E3, (q15_t)0x95AE, (q15_t)0xB8B9,
+	(q15_t)0x95CA, (q15_t)0xB88F, (q15_t)0x95E6, (q15_t)0xB865,
+	(q15_t)0x9602, (q15_t)0xB83C, (q15_t)0x961E, (q15_t)0xB812,
+	(q15_t)0x963B, (q15_t)0xB7E9, (q15_t)0x9657, (q15_t)0xB7BF,
+	(q15_t)0x9673, (q15_t)0xB796, (q15_t)0x9690, (q15_t)0xB76C,
+	(q15_t)0x96AC, (q15_t)0xB743, (q15_t)0x96C9, (q15_t)0xB719,
+	(q15_t)0x96E6, (q15_t)0xB6F0, (q15_t)0x9702, (q15_t)0xB6C7,
+	(q15_t)0x971F, (q15_t)0xB69E, (q15_t)0x973C, (q15_t)0xB675,
+	(q15_t)0x9759, (q15_t)0xB64B, (q15_t)0x9776, (q15_t)0xB622,
+	(q15_t)0x9793, (q15_t)0xB5F9, (q15_t)0x97B0, (q15_t)0xB5D0,
+	(q15_t)0x97CD, (q15_t)0xB5A7, (q15_t)0x97EA, (q15_t)0xB57E,
+	(q15_t)0x9808, (q15_t)0xB556, (q15_t)0x9825, (q15_t)0xB52D,
+	(q15_t)0x9842, (q15_t)0xB504, (q15_t)0x9860, (q15_t)0xB4DB,
+	(q15_t)0x987D, (q15_t)0xB4B3, (q15_t)0x989B, (q15_t)0xB48A,
+	(q15_t)0x98B9, (q15_t)0xB461, (q15_t)0x98D6, (q15_t)0xB439,
+	(q15_t)0x98F4, (q15_t)0xB410, (q15_t)0x9912, (q15_t)0xB3E8,
+	(q15_t)0x9930, (q15_t)0xB3C0, (q15_t)0x994E, (q15_t)0xB397,
+	(q15_t)0x996C, (q15_t)0xB36F, (q15_t)0x998A, (q15_t)0xB347,
+	(q15_t)0x99A8, (q15_t)0xB31E, (q15_t)0x99C6, (q15_t)0xB2F6,
+	(q15_t)0x99E5, (q15_t)0xB2CE, (q15_t)0x9A03, (q15_t)0xB2A6,
+	(q15_t)0x9A22, (q15_t)0xB27E, (q15_t)0x9A40, (q15_t)0xB256,
+	(q15_t)0x9A5F, (q15_t)0xB22E, (q15_t)0x9A7D, (q15_t)0xB206,
+	(q15_t)0x9A9C, (q15_t)0xB1DE, (q15_t)0x9ABA, (q15_t)0xB1B7,
+	(q15_t)0x9AD9, (q15_t)0xB18F, (q15_t)0x9AF8, (q15_t)0xB167,
+	(q15_t)0x9B17, (q15_t)0xB140, (q15_t)0x9B36, (q15_t)0xB118,
+	(q15_t)0x9B55, (q15_t)0xB0F0, (q15_t)0x9B74, (q15_t)0xB0C9,
+	(q15_t)0x9B93, (q15_t)0xB0A1, (q15_t)0x9BB2, (q15_t)0xB07A,
+	(q15_t)0x9BD2, (q15_t)0xB053, (q15_t)0x9BF1, (q15_t)0xB02B,
+	(q15_t)0x9C10, (q15_t)0xB004, (q15_t)0x9C30, (q15_t)0xAFDD,
+	(q15_t)0x9C4F, (q15_t)0xAFB6, (q15_t)0x9C6F, (q15_t)0xAF8F,
+	(q15_t)0x9C8E, (q15_t)0xAF68, (q15_t)0x9CAE, (q15_t)0xAF40,
+	(q15_t)0x9CCE, (q15_t)0xAF1A, (q15_t)0x9CEE, (q15_t)0xAEF3,
+	(q15_t)0x9D0D, (q15_t)0xAECC, (q15_t)0x9D2D, (q15_t)0xAEA5,
+	(q15_t)0x9D4D, (q15_t)0xAE7E, (q15_t)0x9D6D, (q15_t)0xAE57,
+	(q15_t)0x9D8E, (q15_t)0xAE31, (q15_t)0x9DAE, (q15_t)0xAE0A,
+	(q15_t)0x9DCE, (q15_t)0xADE3, (q15_t)0x9DEE, (q15_t)0xADBD,
+	(q15_t)0x9E0E, (q15_t)0xAD96, (q15_t)0x9E2F, (q15_t)0xAD70,
+	(q15_t)0x9E4F, (q15_t)0xAD4A, (q15_t)0x9E70, (q15_t)0xAD23,
+	(q15_t)0x9E90, (q15_t)0xACFD, (q15_t)0x9EB1, (q15_t)0xACD7,
+	(q15_t)0x9ED2, (q15_t)0xACB1, (q15_t)0x9EF2, (q15_t)0xAC8A,
+	(q15_t)0x9F13, (q15_t)0xAC64, (q15_t)0x9F34, (q15_t)0xAC3E,
+	(q15_t)0x9F55, (q15_t)0xAC18, (q15_t)0x9F76, (q15_t)0xABF2,
+	(q15_t)0x9F97, (q15_t)0xABCC, (q15_t)0x9FB8, (q15_t)0xABA7,
+	(q15_t)0x9FD9, (q15_t)0xAB81, (q15_t)0x9FFB, (q15_t)0xAB5B,
+	(q15_t)0xA01C, (q15_t)0xAB35, (q15_t)0xA03D, (q15_t)0xAB10,
+	(q15_t)0xA05F, (q15_t)0xAAEA, (q15_t)0xA080, (q15_t)0xAAC5,
+	(q15_t)0xA0A1, (q15_t)0xAA9F, (q15_t)0xA0C3, (q15_t)0xAA7A,
+	(q15_t)0xA0E5, (q15_t)0xAA54, (q15_t)0xA106, (q15_t)0xAA2F,
+	(q15_t)0xA128, (q15_t)0xAA0A, (q15_t)0xA14A, (q15_t)0xA9E5,
+	(q15_t)0xA16C, (q15_t)0xA9BF, (q15_t)0xA18E, (q15_t)0xA99A,
+	(q15_t)0xA1AF, (q15_t)0xA975, (q15_t)0xA1D2, (q15_t)0xA950,
+	(q15_t)0xA1F4, (q15_t)0xA92B, (q15_t)0xA216, (q15_t)0xA906,
+	(q15_t)0xA238, (q15_t)0xA8E2, (q15_t)0xA25A, (q15_t)0xA8BD,
+	(q15_t)0xA27C, (q15_t)0xA898, (q15_t)0xA29F, (q15_t)0xA873,
+	(q15_t)0xA2C1, (q15_t)0xA84F, (q15_t)0xA2E4, (q15_t)0xA82A,
+	(q15_t)0xA306, (q15_t)0xA806, (q15_t)0xA329, (q15_t)0xA7E1,
+	(q15_t)0xA34B, (q15_t)0xA7BD, (q15_t)0xA36E, (q15_t)0xA798,
+	(q15_t)0xA391, (q15_t)0xA774, (q15_t)0xA3B4, (q15_t)0xA750,
+	(q15_t)0xA3D6, (q15_t)0xA72B, (q15_t)0xA3F9, (q15_t)0xA707,
+	(q15_t)0xA41C, (q15_t)0xA6E3, (q15_t)0xA43F, (q15_t)0xA6BF,
+	(q15_t)0xA462, (q15_t)0xA69B, (q15_t)0xA486, (q15_t)0xA677,
+	(q15_t)0xA4A9, (q15_t)0xA653, (q15_t)0xA4CC, (q15_t)0xA62F,
+	(q15_t)0xA4EF, (q15_t)0xA60C, (q15_t)0xA513, (q15_t)0xA5E8,
+	(q15_t)0xA536, (q15_t)0xA5C4, (q15_t)0xA55A, (q15_t)0xA5A1,
+	(q15_t)0xA57D, (q15_t)0xA57D, (q15_t)0xA5A1, (q15_t)0xA55A,
+	(q15_t)0xA5C4, (q15_t)0xA536, (q15_t)0xA5E8, (q15_t)0xA513,
+	(q15_t)0xA60C, (q15_t)0xA4EF, (q15_t)0xA62F, (q15_t)0xA4CC,
+	(q15_t)0xA653, (q15_t)0xA4A9, (q15_t)0xA677, (q15_t)0xA486,
+	(q15_t)0xA69B, (q15_t)0xA462, (q15_t)0xA6BF, (q15_t)0xA43F,
+	(q15_t)0xA6E3, (q15_t)0xA41C, (q15_t)0xA707, (q15_t)0xA3F9,
+	(q15_t)0xA72B, (q15_t)0xA3D6, (q15_t)0xA750, (q15_t)0xA3B4,
+	(q15_t)0xA774, (q15_t)0xA391, (q15_t)0xA798, (q15_t)0xA36E,
+	(q15_t)0xA7BD, (q15_t)0xA34B, (q15_t)0xA7E1, (q15_t)0xA329,
+	(q15_t)0xA806, (q15_t)0xA306, (q15_t)0xA82A, (q15_t)0xA2E4,
+	(q15_t)0xA84F, (q15_t)0xA2C1, (q15_t)0xA873, (q15_t)0xA29F,
+	(q15_t)0xA898, (q15_t)0xA27C, (q15_t)0xA8BD, (q15_t)0xA25A,
+	(q15_t)0xA8E2, (q15_t)0xA238, (q15_t)0xA906, (q15_t)0xA216,
+	(q15_t)0xA92B, (q15_t)0xA1F4, (q15_t)0xA950, (q15_t)0xA1D2,
+	(q15_t)0xA975, (q15_t)0xA1AF, (q15_t)0xA99A, (q15_t)0xA18E,
+	(q15_t)0xA9BF, (q15_t)0xA16C, (q15_t)0xA9E5, (q15_t)0xA14A,
+	(q15_t)0xAA0A, (q15_t)0xA128, (q15_t)0xAA2F, (q15_t)0xA106,
+	(q15_t)0xAA54, (q15_t)0xA0E5, (q15_t)0xAA7A, (q15_t)0xA0C3,
+	(q15_t)0xAA9F, (q15_t)0xA0A1, (q15_t)0xAAC5, (q15_t)0xA080,
+	(q15_t)0xAAEA, (q15_t)0xA05F, (q15_t)0xAB10, (q15_t)0xA03D,
+	(q15_t)0xAB35, (q15_t)0xA01C, (q15_t)0xAB5B, (q15_t)0x9FFB,
+	(q15_t)0xAB81, (q15_t)0x9FD9, (q15_t)0xABA7, (q15_t)0x9FB8,
+	(q15_t)0xABCC, (q15_t)0x9F97, (q15_t)0xABF2, (q15_t)0x9F76,
+	(q15_t)0xAC18, (q15_t)0x9F55, (q15_t)0xAC3E, (q15_t)0x9F34,
+	(q15_t)0xAC64, (q15_t)0x9F13, (q15_t)0xAC8A, (q15_t)0x9EF2,
+	(q15_t)0xACB1, (q15_t)0x9ED2, (q15_t)0xACD7, (q15_t)0x9EB1,
+	(q15_t)0xACFD, (q15_t)0x9E90, (q15_t)0xAD23, (q15_t)0x9E70,
+	(q15_t)0xAD4A, (q15_t)0x9E4F, (q15_t)0xAD70, (q15_t)0x9E2F,
+	(q15_t)0xAD96, (q15_t)0x9E0E, (q15_t)0xADBD, (q15_t)0x9DEE,
+	(q15_t)0xADE3, (q15_t)0x9DCE, (q15_t)0xAE0A, (q15_t)0x9DAE,
+	(q15_t)0xAE31, (q15_t)0x9D8E, (q15_t)0xAE57, (q15_t)0x9D6D,
+	(q15_t)0xAE7E, (q15_t)0x9D4D, (q15_t)0xAEA5, (q15_t)0x9D2D,
+	(q15_t)0xAECC, (q15_t)0x9D0D, (q15_t)0xAEF3, (q15_t)0x9CEE,
+	(q15_t)0xAF1A, (q15_t)0x9CCE, (q15_t)0xAF40, (q15_t)0x9CAE,
+	(q15_t)0xAF68, (q15_t)0x9C8E, (q15_t)0xAF8F, (q15_t)0x9C6F,
+	(q15_t)0xAFB6, (q15_t)0x9C4F, (q15_t)0xAFDD, (q15_t)0x9C30,
+	(q15_t)0xB004, (q15_t)0x9C10, (q15_t)0xB02B, (q15_t)0x9BF1,
+	(q15_t)0xB053, (q15_t)0x9BD2, (q15_t)0xB07A, (q15_t)0x9BB2,
+	(q15_t)0xB0A1, (q15_t)0x9B93, (q15_t)0xB0C9, (q15_t)0x9B74,
+	(q15_t)0xB0F0, (q15_t)0x9B55, (q15_t)0xB118, (q15_t)0x9B36,
+	(q15_t)0xB140, (q15_t)0x9B17, (q15_t)0xB167, (q15_t)0x9AF8,
+	(q15_t)0xB18F, (q15_t)0x9AD9, (q15_t)0xB1B7, (q15_t)0x9ABA,
+	(q15_t)0xB1DE, (q15_t)0x9A9C, (q15_t)0xB206, (q15_t)0x9A7D,
+	(q15_t)0xB22E, (q15_t)0x9A5F, (q15_t)0xB256, (q15_t)0x9A40,
+	(q15_t)0xB27E, (q15_t)0x9A22, (q15_t)0xB2A6, (q15_t)0x9A03,
+	(q15_t)0xB2CE, (q15_t)0x99E5, (q15_t)0xB2F6, (q15_t)0x99C6,
+	(q15_t)0xB31E, (q15_t)0x99A8, (q15_t)0xB347, (q15_t)0x998A,
+	(q15_t)0xB36F, (q15_t)0x996C, (q15_t)0xB397, (q15_t)0x994E,
+	(q15_t)0xB3C0, (q15_t)0x9930, (q15_t)0xB3E8, (q15_t)0x9912,
+	(q15_t)0xB410, (q15_t)0x98F4, (q15_t)0xB439, (q15_t)0x98D6,
+	(q15_t)0xB461, (q15_t)0x98B9, (q15_t)0xB48A, (q15_t)0x989B,
+	(q15_t)0xB4B3, (q15_t)0x987D, (q15_t)0xB4DB, (q15_t)0x9860,
+	(q15_t)0xB504, (q15_t)0x9842, (q15_t)0xB52D, (q15_t)0x9825,
+	(q15_t)0xB556, (q15_t)0x9808, (q15_t)0xB57E, (q15_t)0x97EA,
+	(q15_t)0xB5A7, (q15_t)0x97CD, (q15_t)0xB5D0, (q15_t)0x97B0,
+	(q15_t)0xB5F9, (q15_t)0x9793, (q15_t)0xB622, (q15_t)0x9776,
+	(q15_t)0xB64B, (q15_t)0x9759, (q15_t)0xB675, (q15_t)0x973C,
+	(q15_t)0xB69E, (q15_t)0x971F, (q15_t)0xB6C7, (q15_t)0x9702,
+	(q15_t)0xB6F0, (q15_t)0x96E6, (q15_t)0xB719, (q15_t)0x96C9,
+	(q15_t)0xB743, (q15_t)0x96AC, (q15_t)0xB76C, (q15_t)0x9690,
+	(q15_t)0xB796, (q15_t)0x9673, (q15_t)0xB7BF, (q15_t)0x9657,
+	(q15_t)0xB7E9, (q15_t)0x963B, (q15_t)0xB812, (q15_t)0x961E,
+	(q15_t)0xB83C, (q15_t)0x9602, (q15_t)0xB865, (q15_t)0x95E6,
+	(q15_t)0xB88F, (q15_t)0x95CA, (q15_t)0xB8B9, (q15_t)0x95AE,
+	(q15_t)0xB8E3, (q15_t)0x9592, (q15_t)0xB90C, (q15_t)0x9576,
+	(q15_t)0xB936, (q15_t)0x955A, (q15_t)0xB960, (q15_t)0x953E,
+	(q15_t)0xB98A, (q15_t)0x9523, (q15_t)0xB9B4, (q15_t)0x9507,
+	(q15_t)0xB9DE, (q15_t)0x94EC, (q15_t)0xBA08, (q15_t)0x94D0,
+	(q15_t)0xBA32, (q15_t)0x94B5, (q15_t)0xBA5C, (q15_t)0x9499,
+	(q15_t)0xBA87, (q15_t)0x947E, (q15_t)0xBAB1, (q15_t)0x9463,
+	(q15_t)0xBADB, (q15_t)0x9447, (q15_t)0xBB05, (q15_t)0x942C,
+	(q15_t)0xBB30, (q15_t)0x9411, (q15_t)0xBB5A, (q15_t)0x93F6,
+	(q15_t)0xBB85, (q15_t)0x93DB, (q15_t)0xBBAF, (q15_t)0x93C0,
+	(q15_t)0xBBDA, (q15_t)0x93A6, (q15_t)0xBC04, (q15_t)0x938B,
+	(q15_t)0xBC2F, (q15_t)0x9370, (q15_t)0xBC5A, (q15_t)0x9356,
+	(q15_t)0xBC84, (q15_t)0x933B, (q15_t)0xBCAF, (q15_t)0x9321,
+	(q15_t)0xBCDA, (q15_t)0x9306, (q15_t)0xBD05, (q15_t)0x92EC,
+	(q15_t)0xBD2F, (q15_t)0x92D2, (q15_t)0xBD5A, (q15_t)0x92B7,
+	(q15_t)0xBD85, (q15_t)0x929D, (q15_t)0xBDB0, (q15_t)0x9283,
+	(q15_t)0xBDDB, (q15_t)0x9269, (q15_t)0xBE06, (q15_t)0x924F,
+	(q15_t)0xBE31, (q15_t)0x9235, (q15_t)0xBE5D, (q15_t)0x921C,
+	(q15_t)0xBE88, (q15_t)0x9202, (q15_t)0xBEB3, (q15_t)0x91E8,
+	(q15_t)0xBEDE, (q15_t)0x91CF, (q15_t)0xBF09, (q15_t)0x91B5,
+	(q15_t)0xBF35, (q15_t)0x919C, (q15_t)0xBF60, (q15_t)0x9182,
+	(q15_t)0xBF8C, (q15_t)0x9169, (q15_t)0xBFB7, (q15_t)0x9150,
+	(q15_t)0xBFE2, (q15_t)0x9136, (q15_t)0xC00E, (q15_t)0x911D,
+	(q15_t)0xC03A, (q15_t)0x9104, (q15_t)0xC065, (q15_t)0x90EB,
+	(q15_t)0xC091, (q15_t)0x90D2, (q15_t)0xC0BC, (q15_t)0x90B9,
+	(q15_t)0xC0E8, (q15_t)0x90A0, (q15_t)0xC114, (q15_t)0x9088,
+	(q15_t)0xC140, (q15_t)0x906F, (q15_t)0xC16C, (q15_t)0x9056,
+	(q15_t)0xC197, (q15_t)0x903E, (q15_t)0xC1C3, (q15_t)0x9025,
+	(q15_t)0xC1EF, (q15_t)0x900D, (q15_t)0xC21B, (q15_t)0x8FF5,
+	(q15_t)0xC247, (q15_t)0x8FDC, (q15_t)0xC273, (q15_t)0x8FC4,
+	(q15_t)0xC29F, (q15_t)0x8FAC, (q15_t)0xC2CC, (q15_t)0x8F94,
+	(q15_t)0xC2F8, (q15_t)0x8F7C, (q15_t)0xC324, (q15_t)0x8F64,
+	(q15_t)0xC350, (q15_t)0x8F4C, (q15_t)0xC37C, (q15_t)0x8F34,
+	(q15_t)0xC3A9, (q15_t)0x8F1D, (q15_t)0xC3D5, (q15_t)0x8F05,
+	(q15_t)0xC402, (q15_t)0x8EED, (q15_t)0xC42E, (q15_t)0x8ED6,
+	(q15_t)0xC45A, (q15_t)0x8EBE, (q15_t)0xC487, (q15_t)0x8EA7,
+	(q15_t)0xC4B3, (q15_t)0x8E90, (q15_t)0xC4E0, (q15_t)0x8E79,
+	(q15_t)0xC50D, (q15_t)0x8E61, (q15_t)0xC539, (q15_t)0x8E4A,
+	(q15_t)0xC566, (q15_t)0x8E33, (q15_t)0xC593, (q15_t)0x8E1C,
+	(q15_t)0xC5BF, (q15_t)0x8E05, (q15_t)0xC5EC, (q15_t)0x8DEE,
+	(q15_t)0xC619, (q15_t)0x8DD8, (q15_t)0xC646, (q15_t)0x8DC1,
+	(q15_t)0xC673, (q15_t)0x8DAA, (q15_t)0xC6A0, (q15_t)0x8D94,
+	(q15_t)0xC6CD, (q15_t)0x8D7D, (q15_t)0xC6F9, (q15_t)0x8D67,
+	(q15_t)0xC727, (q15_t)0x8D50, (q15_t)0xC754, (q15_t)0x8D3A,
+	(q15_t)0xC781, (q15_t)0x8D24, (q15_t)0xC7AE, (q15_t)0x8D0E,
+	(q15_t)0xC7DB, (q15_t)0x8CF8, (q15_t)0xC808, (q15_t)0x8CE2,
+	(q15_t)0xC835, (q15_t)0x8CCC, (q15_t)0xC863, (q15_t)0x8CB6,
+	(q15_t)0xC890, (q15_t)0x8CA0, (q15_t)0xC8BD, (q15_t)0x8C8A,
+	(q15_t)0xC8EB, (q15_t)0x8C75, (q15_t)0xC918, (q15_t)0x8C5F,
+	(q15_t)0xC945, (q15_t)0x8C4A, (q15_t)0xC973, (q15_t)0x8C34,
+	(q15_t)0xC9A0, (q15_t)0x8C1F, (q15_t)0xC9CE, (q15_t)0x8C09,
+	(q15_t)0xC9FB, (q15_t)0x8BF4, (q15_t)0xCA29, (q15_t)0x8BDF,
+	(q15_t)0xCA57, (q15_t)0x8BCA, (q15_t)0xCA84, (q15_t)0x8BB5,
+	(q15_t)0xCAB2, (q15_t)0x8BA0, (q15_t)0xCAE0, (q15_t)0x8B8B,
+	(q15_t)0xCB0D, (q15_t)0x8B76, (q15_t)0xCB3B, (q15_t)0x8B61,
+	(q15_t)0xCB69, (q15_t)0x8B4D, (q15_t)0xCB97, (q15_t)0x8B38,
+	(q15_t)0xCBC5, (q15_t)0x8B24, (q15_t)0xCBF3, (q15_t)0x8B0F,
+	(q15_t)0xCC21, (q15_t)0x8AFB, (q15_t)0xCC4F, (q15_t)0x8AE6,
+	(q15_t)0xCC7D, (q15_t)0x8AD2, (q15_t)0xCCAB, (q15_t)0x8ABE,
+	(q15_t)0xCCD9, (q15_t)0x8AAA, (q15_t)0xCD07, (q15_t)0x8A96,
+	(q15_t)0xCD35, (q15_t)0x8A82, (q15_t)0xCD63, (q15_t)0x8A6E,
+	(q15_t)0xCD91, (q15_t)0x8A5A, (q15_t)0xCDBF, (q15_t)0x8A46,
+	(q15_t)0xCDEE, (q15_t)0x8A33, (q15_t)0xCE1C, (q15_t)0x8A1F,
+	(q15_t)0xCE4A, (q15_t)0x8A0B, (q15_t)0xCE79, (q15_t)0x89F8,
+	(q15_t)0xCEA7, (q15_t)0x89E4, (q15_t)0xCED5, (q15_t)0x89D1,
+	(q15_t)0xCF04, (q15_t)0x89BE, (q15_t)0xCF32, (q15_t)0x89AB,
+	(q15_t)0xCF61, (q15_t)0x8997, (q15_t)0xCF8F, (q15_t)0x8984,
+	(q15_t)0xCFBE, (q15_t)0x8971, (q15_t)0xCFEC, (q15_t)0x895F,
+	(q15_t)0xD01B, (q15_t)0x894C, (q15_t)0xD04A, (q15_t)0x8939,
+	(q15_t)0xD078, (q15_t)0x8926, (q15_t)0xD0A7, (q15_t)0x8914,
+	(q15_t)0xD0D6, (q15_t)0x8901, (q15_t)0xD104, (q15_t)0x88EF,
+	(q15_t)0xD133, (q15_t)0x88DC, (q15_t)0xD162, (q15_t)0x88CA,
+	(q15_t)0xD191, (q15_t)0x88B8, (q15_t)0xD1C0, (q15_t)0x88A5,
+	(q15_t)0xD1EE, (q15_t)0x8893, (q15_t)0xD21D, (q15_t)0x8881,
+	(q15_t)0xD24C, (q15_t)0x886F, (q15_t)0xD27B, (q15_t)0x885D,
+	(q15_t)0xD2AA, (q15_t)0x884B, (q15_t)0xD2D9, (q15_t)0x883A,
+	(q15_t)0xD308, (q15_t)0x8828, (q15_t)0xD337, (q15_t)0x8816,
+	(q15_t)0xD367, (q15_t)0x8805, (q15_t)0xD396, (q15_t)0x87F3,
+	(q15_t)0xD3C5, (q15_t)0x87E2, (q15_t)0xD3F4, (q15_t)0x87D1,
+	(q15_t)0xD423, (q15_t)0x87BF, (q15_t)0xD452, (q15_t)0x87AE,
+	(q15_t)0xD482, (q15_t)0x879D, (q15_t)0xD4B1, (q15_t)0x878C,
+	(q15_t)0xD4E0, (q15_t)0x877B, (q15_t)0xD510, (q15_t)0x876A,
+	(q15_t)0xD53F, (q15_t)0x8759, (q15_t)0xD56E, (q15_t)0x8749,
+	(q15_t)0xD59E, (q15_t)0x8738, (q15_t)0xD5CD, (q15_t)0x8727,
+	(q15_t)0xD5FD, (q15_t)0x8717, (q15_t)0xD62C, (q15_t)0x8706,
+	(q15_t)0xD65C, (q15_t)0x86F6, (q15_t)0xD68B, (q15_t)0x86E6,
+	(q15_t)0xD6BB, (q15_t)0x86D5, (q15_t)0xD6EA, (q15_t)0x86C5,
+	(q15_t)0xD71A, (q15_t)0x86B5, (q15_t)0xD74A, (q15_t)0x86A5,
+	(q15_t)0xD779, (q15_t)0x8695, (q15_t)0xD7A9, (q15_t)0x8685,
+	(q15_t)0xD7D9, (q15_t)0x8675, (q15_t)0xD809, (q15_t)0x8666,
+	(q15_t)0xD838, (q15_t)0x8656, (q15_t)0xD868, (q15_t)0x8646,
+	(q15_t)0xD898, (q15_t)0x8637, (q15_t)0xD8C8, (q15_t)0x8627,
+	(q15_t)0xD8F8, (q15_t)0x8618, (q15_t)0xD927, (q15_t)0x8609,
+	(q15_t)0xD957, (q15_t)0x85FA, (q15_t)0xD987, (q15_t)0x85EA,
+	(q15_t)0xD9B7, (q15_t)0x85DB, (q15_t)0xD9E7, (q15_t)0x85CC,
+	(q15_t)0xDA17, (q15_t)0x85BD, (q15_t)0xDA47, (q15_t)0x85AF,
+	(q15_t)0xDA77, (q15_t)0x85A0, (q15_t)0xDAA7, (q15_t)0x8591,
+	(q15_t)0xDAD7, (q15_t)0x8582, (q15_t)0xDB08, (q15_t)0x8574,
+	(q15_t)0xDB38, (q15_t)0x8565, (q15_t)0xDB68, (q15_t)0x8557,
+	(q15_t)0xDB98, (q15_t)0x8549, (q15_t)0xDBC8, (q15_t)0x853A,
+	(q15_t)0xDBF8, (q15_t)0x852C, (q15_t)0xDC29, (q15_t)0x851E,
+	(q15_t)0xDC59, (q15_t)0x8510, (q15_t)0xDC89, (q15_t)0x8502,
+	(q15_t)0xDCBA, (q15_t)0x84F4, (q15_t)0xDCEA, (q15_t)0x84E6,
+	(q15_t)0xDD1A, (q15_t)0x84D9, (q15_t)0xDD4B, (q15_t)0x84CB,
+	(q15_t)0xDD7B, (q15_t)0x84BD, (q15_t)0xDDAB, (q15_t)0x84B0,
+	(q15_t)0xDDDC, (q15_t)0x84A2, (q15_t)0xDE0C, (q15_t)0x8495,
+	(q15_t)0xDE3D, (q15_t)0x8488, (q15_t)0xDE6D, (q15_t)0x847B,
+	(q15_t)0xDE9E, (q15_t)0x846D, (q15_t)0xDECE, (q15_t)0x8460,
+	(q15_t)0xDEFF, (q15_t)0x8453, (q15_t)0xDF2F, (q15_t)0x8446,
+	(q15_t)0xDF60, (q15_t)0x843A, (q15_t)0xDF91, (q15_t)0x842D,
+	(q15_t)0xDFC1, (q15_t)0x8420, (q15_t)0xDFF2, (q15_t)0x8414,
+	(q15_t)0xE023, (q15_t)0x8407, (q15_t)0xE053, (q15_t)0x83FA,
+	(q15_t)0xE084, (q15_t)0x83EE, (q15_t)0xE0B5, (q15_t)0x83E2,
+	(q15_t)0xE0E6, (q15_t)0x83D6, (q15_t)0xE116, (q15_t)0x83C9,
+	(q15_t)0xE147, (q15_t)0x83BD, (q15_t)0xE178, (q15_t)0x83B1,
+	(q15_t)0xE1A9, (q15_t)0x83A5, (q15_t)0xE1DA, (q15_t)0x8399,
+	(q15_t)0xE20A, (q15_t)0x838E, (q15_t)0xE23B, (q15_t)0x8382,
+	(q15_t)0xE26C, (q15_t)0x8376, (q15_t)0xE29D, (q15_t)0x836B,
+	(q15_t)0xE2CE, (q15_t)0x835F, (q15_t)0xE2FF, (q15_t)0x8354,
+	(q15_t)0xE330, (q15_t)0x8348, (q15_t)0xE361, (q15_t)0x833D,
+	(q15_t)0xE392, (q15_t)0x8332, (q15_t)0xE3C3, (q15_t)0x8327,
+	(q15_t)0xE3F4, (q15_t)0x831C, (q15_t)0xE425, (q15_t)0x8311,
+	(q15_t)0xE456, (q15_t)0x8306, (q15_t)0xE487, (q15_t)0x82FB,
+	(q15_t)0xE4B8, (q15_t)0x82F0, (q15_t)0xE4E9, (q15_t)0x82E6,
+	(q15_t)0xE51B, (q15_t)0x82DB, (q15_t)0xE54C, (q15_t)0x82D0,
+	(q15_t)0xE57D, (q15_t)0x82C6, (q15_t)0xE5AE, (q15_t)0x82BC,
+	(q15_t)0xE5DF, (q15_t)0x82B1, (q15_t)0xE610, (q15_t)0x82A7,
+	(q15_t)0xE642, (q15_t)0x829D, (q15_t)0xE673, (q15_t)0x8293,
+	(q15_t)0xE6A4, (q15_t)0x8289, (q15_t)0xE6D5, (q15_t)0x827F,
+	(q15_t)0xE707, (q15_t)0x8275, (q15_t)0xE738, (q15_t)0x826B,
+	(q15_t)0xE769, (q15_t)0x8262, (q15_t)0xE79B, (q15_t)0x8258,
+	(q15_t)0xE7CC, (q15_t)0x824F, (q15_t)0xE7FD, (q15_t)0x8245,
+	(q15_t)0xE82F, (q15_t)0x823C, (q15_t)0xE860, (q15_t)0x8232,
+	(q15_t)0xE892, (q15_t)0x8229, (q15_t)0xE8C3, (q15_t)0x8220,
+	(q15_t)0xE8F5, (q15_t)0x8217, (q15_t)0xE926, (q15_t)0x820E,
+	(q15_t)0xE957, (q15_t)0x8205, (q15_t)0xE989, (q15_t)0x81FC,
+	(q15_t)0xE9BA, (q15_t)0x81F3, (q15_t)0xE9EC, (q15_t)0x81EB,
+	(q15_t)0xEA1D, (q15_t)0x81E2, (q15_t)0xEA4F, (q15_t)0x81D9,
+	(q15_t)0xEA80, (q15_t)0x81D1, (q15_t)0xEAB2, (q15_t)0x81C8,
+	(q15_t)0xEAE4, (q15_t)0x81C0, (q15_t)0xEB15, (q15_t)0x81B8,
+	(q15_t)0xEB47, (q15_t)0x81B0, (q15_t)0xEB78, (q15_t)0x81A8,
+	(q15_t)0xEBAA, (q15_t)0x81A0, (q15_t)0xEBDC, (q15_t)0x8198,
+	(q15_t)0xEC0D, (q15_t)0x8190, (q15_t)0xEC3F, (q15_t)0x8188,
+	(q15_t)0xEC71, (q15_t)0x8180, (q15_t)0xECA2, (q15_t)0x8179,
+	(q15_t)0xECD4, (q15_t)0x8171, (q15_t)0xED06, (q15_t)0x816A,
+	(q15_t)0xED37, (q15_t)0x8162, (q15_t)0xED69, (q15_t)0x815B,
+	(q15_t)0xED9B, (q15_t)0x8154, (q15_t)0xEDCD, (q15_t)0x814C,
+	(q15_t)0xEDFE, (q15_t)0x8145, (q15_t)0xEE30, (q15_t)0x813E,
+	(q15_t)0xEE62, (q15_t)0x8137, (q15_t)0xEE94, (q15_t)0x8130,
+	(q15_t)0xEEC6, (q15_t)0x812A, (q15_t)0xEEF7, (q15_t)0x8123,
+	(q15_t)0xEF29, (q15_t)0x811C, (q15_t)0xEF5B, (q15_t)0x8116,
+	(q15_t)0xEF8D, (q15_t)0x810F, (q15_t)0xEFBF, (q15_t)0x8109,
+	(q15_t)0xEFF1, (q15_t)0x8102, (q15_t)0xF022, (q15_t)0x80FC,
+	(q15_t)0xF054, (q15_t)0x80F6, (q15_t)0xF086, (q15_t)0x80F0,
+	(q15_t)0xF0B8, (q15_t)0x80EA, (q15_t)0xF0EA, (q15_t)0x80E4,
+	(q15_t)0xF11C, (q15_t)0x80DE, (q15_t)0xF14E, (q15_t)0x80D8,
+	(q15_t)0xF180, (q15_t)0x80D2, (q15_t)0xF1B2, (q15_t)0x80CD,
+	(q15_t)0xF1E4, (q15_t)0x80C7, (q15_t)0xF216, (q15_t)0x80C2,
+	(q15_t)0xF248, (q15_t)0x80BC, (q15_t)0xF27A, (q15_t)0x80B7,
+	(q15_t)0xF2AC, (q15_t)0x80B2, (q15_t)0xF2DE, (q15_t)0x80AC,
+	(q15_t)0xF310, (q15_t)0x80A7, (q15_t)0xF342, (q15_t)0x80A2,
+	(q15_t)0xF374, (q15_t)0x809D, (q15_t)0xF3A6, (q15_t)0x8098,
+	(q15_t)0xF3D8, (q15_t)0x8094, (q15_t)0xF40A, (q15_t)0x808F,
+	(q15_t)0xF43C, (q15_t)0x808A, (q15_t)0xF46E, (q15_t)0x8086,
+	(q15_t)0xF4A0, (q15_t)0x8081, (q15_t)0xF4D2, (q15_t)0x807D,
+	(q15_t)0xF504, (q15_t)0x8078, (q15_t)0xF536, (q15_t)0x8074,
+	(q15_t)0xF568, (q15_t)0x8070, (q15_t)0xF59A, (q15_t)0x806C,
+	(q15_t)0xF5CC, (q15_t)0x8068, (q15_t)0xF5FF, (q15_t)0x8064,
+	(q15_t)0xF631, (q15_t)0x8060, (q15_t)0xF663, (q15_t)0x805C,
+	(q15_t)0xF695, (q15_t)0x8058, (q15_t)0xF6C7, (q15_t)0x8055,
+	(q15_t)0xF6F9, (q15_t)0x8051, (q15_t)0xF72B, (q15_t)0x804E,
+	(q15_t)0xF75D, (q15_t)0x804A, (q15_t)0xF790, (q15_t)0x8047,
+	(q15_t)0xF7C2, (q15_t)0x8043, (q15_t)0xF7F4, (q15_t)0x8040,
+	(q15_t)0xF826, (q15_t)0x803D, (q15_t)0xF858, (q15_t)0x803A,
+	(q15_t)0xF88A, (q15_t)0x8037, (q15_t)0xF8BD, (q15_t)0x8034,
+	(q15_t)0xF8EF, (q15_t)0x8031, (q15_t)0xF921, (q15_t)0x802F,
+	(q15_t)0xF953, (q15_t)0x802C, (q15_t)0xF985, (q15_t)0x8029,
+	(q15_t)0xF9B8, (q15_t)0x8027, (q15_t)0xF9EA, (q15_t)0x8025,
+	(q15_t)0xFA1C, (q15_t)0x8022, (q15_t)0xFA4E, (q15_t)0x8020,
+	(q15_t)0xFA80, (q15_t)0x801E, (q15_t)0xFAB3, (q15_t)0x801C,
+	(q15_t)0xFAE5, (q15_t)0x801A, (q15_t)0xFB17, (q15_t)0x8018,
+	(q15_t)0xFB49, (q15_t)0x8016, (q15_t)0xFB7C, (q15_t)0x8014,
+	(q15_t)0xFBAE, (q15_t)0x8012, (q15_t)0xFBE0, (q15_t)0x8011,
+	(q15_t)0xFC12, (q15_t)0x800F, (q15_t)0xFC45, (q15_t)0x800D,
+	(q15_t)0xFC77, (q15_t)0x800C, (q15_t)0xFCA9, (q15_t)0x800B,
+	(q15_t)0xFCDB, (q15_t)0x8009, (q15_t)0xFD0E, (q15_t)0x8008,
+	(q15_t)0xFD40, (q15_t)0x8007, (q15_t)0xFD72, (q15_t)0x8006,
+	(q15_t)0xFDA4, (q15_t)0x8005, (q15_t)0xFDD7, (q15_t)0x8004,
+	(q15_t)0xFE09, (q15_t)0x8003, (q15_t)0xFE3B, (q15_t)0x8003,
+	(q15_t)0xFE6D, (q15_t)0x8002, (q15_t)0xFEA0, (q15_t)0x8001,
+	(q15_t)0xFED2, (q15_t)0x8001, (q15_t)0xFF04, (q15_t)0x8000,
+	(q15_t)0xFF36, (q15_t)0x8000, (q15_t)0xFF69, (q15_t)0x8000,
+	(q15_t)0xFF9B, (q15_t)0x8000, (q15_t)0xFFCD, (q15_t)0x8000
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+/**
+  @} end of CFFT_CIFFT group
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_16)
+
+const uint16_t armBitRevIndexTableF64_16[ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH] =
+{
+   /* radix 4, size 12 */
+   8,64, 16,32, 24,96, 40,80, 56,112, 88,104
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_32)
+const uint16_t armBitRevIndexTableF64_32[ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH] =
+{
+   /* 4x2, size 24 */
+   8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144,
+   88,208, 104,176, 120,240, 152,200, 184,232
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_64)
+const uint16_t armBitRevIndexTableF64_64[ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH] =
+{
+   /* radix 4, size 56 */
+   8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352,
+   112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432,
+   232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_128)
+const uint16_t armBitRevIndexTableF64_128[ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH] =
+{
+   /* 4x2, size 112 */
+   8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192,
+   104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608,
+   208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912,
+   328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624,
+   472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968,
+   664,808, 696,936, 728,872, 760,1000, 824,920, 888,984
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_256)
+const uint16_t armBitRevIndexTableF64_256[ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH] =
+{
+   /* radix 4, size 240 */
+   8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640,
+   88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320,
+   168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960,
+   248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672,
+   344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376,
+   432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040,
+   536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912,
+   632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488,
+   752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456,
+   880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520,
+   1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928,
+   1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832,
+   1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816,
+   1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_512)
+const uint16_t armBitRevIndexTableF64_512[ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH] =
+{
+   /* 4x2, size 480 */
+   8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280,
+   88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640,
+   168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944,
+   240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648,
+   328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216,
+   408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960,
+   488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616,
+   584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184,
+   664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976,
+   752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400,
+   848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784,
+   944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064,
+   1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344,
+   1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728,
+   1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152,
+   1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920,
+   1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024,
+   1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376,
+   1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480,
+   1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696,
+   1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824,
+   1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312,
+   2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464,
+   2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912,
+   2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624,
+   2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008,
+   2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072,
+   3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928,
+   3512,3800, 3576,4056, 3704,3896, 3832,4024
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_1024)
+const uint16_t armBitRevIndexTableF64_1024[ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH] =
+{
+    /* radix 4, size 992 */
+    8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608,
+    80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352,
+    144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864,
+    208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176,
+    280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688,
+    344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528,
+    416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040,
+    480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088,
+    552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696,
+    624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392,
+    696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904,
+    760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360,
+    840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544,
+    912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008,
+    984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080,
+    1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688,
+    1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432,
+    1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944,
+    1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304,
+    1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696,
+    1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536,
+    1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048,
+    1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168,
+    1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776,
+    1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960,
+    1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320,
+    1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784,
+    1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624,
+    1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112,
+    2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184,
+    2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368,
+    2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832,
+    2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264,
+    2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728,
+    2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008,
+    2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224,
+    2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664,
+    2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944,
+    2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352,
+    2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792,
+    2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072,
+    3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168,
+    3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400,
+    3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936,
+    3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784,
+    3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552,
+    3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208,
+    3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792,
+    3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000,
+    3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848,
+    3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664,
+    4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176,
+    4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384,
+    4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256,
+    4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512,
+    4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192,
+    4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496,
+    4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368,
+    4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112,
+    5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720,
+    5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312,
+    5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080,
+    5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504,
+    5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888,
+    6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680,
+    6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808,
+    6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512,
+    6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736,
+    7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_2048)
+const uint16_t armBitRevIndexTableF64_2048[ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH] =
+{
+    /* 4x2, size 1984 */
+    8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024,
+    72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512,
+    136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848,
+    192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680,
+    248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400,
+    312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520,
+    368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816,
+    424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080,
+    480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416,
+    544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248,
+    600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736,
+    664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856,
+    720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576,
+    784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408,
+    840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744,
+    904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232,
+    960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064,
+    1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208,
+    1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232,
+    1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720,
+    1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840,
+    1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560,
+    1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584,
+    1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072,
+    1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904,
+    1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240,
+    1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264,
+    1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752,
+    1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776,
+    1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496,
+    1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520,
+    1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008,
+    1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032,
+    2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272,
+    2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296,
+    2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784,
+    2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808,
+    2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432,
+    2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456,
+    2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944,
+    2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968,
+    2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496,
+    2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520,
+    2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888,
+    2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608,
+    2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536,
+    2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024,
+    2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048,
+    3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192,
+    3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408,
+    3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848,
+    3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872,
+    3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496,
+    3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712,
+    3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080,
+    3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416,
+    3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344,
+    3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024,
+    3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000,
+    3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624,
+    3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840,
+    3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208,
+    4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304,
+    4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280,
+    4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672,
+    4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888,
+    4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392,
+    4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072,
+    4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096,
+    4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288,
+    4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504,
+    4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776,
+    4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688,
+    4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664,
+    4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248,
+    5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272,
+    5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392,
+    5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736,
+    5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952,
+    5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648,
+    5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992,
+    5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016,
+    5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424,
+    5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008,
+    5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888,
+    5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680,
+    5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264,
+    6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240,
+    6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264,
+    6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848,
+    6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728,
+    6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520,
+    6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104,
+    6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080,
+    6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392,
+    6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976,
+    6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856,
+    6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648,
+    7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232,
+    7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112,
+    7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328,
+    7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864,
+    7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560,
+    7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632,
+    7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096,
+    7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528,
+    7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600,
+    7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064,
+    7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832,
+    8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296,
+    8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368,
+    8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272,
+    8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736,
+    8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600,
+    8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064,
+    8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136,
+    8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400,
+    8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960,
+    8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608,
+    9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240,
+    9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312,
+    9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824,
+    9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616,
+    9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128,
+    9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200,
+    9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560,
+    9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072,
+    10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816,
+    10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328,
+    10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840,
+    10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584,
+    10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048,
+    10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504,
+    10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992,
+    10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688,
+    11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296,
+    11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952,
+    11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672,
+    11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232,
+    11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080,
+    11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848,
+    12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336,
+    12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616,
+    12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152,
+    12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024,
+    13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280,
+    13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680,
+    13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576,
+    14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344,
+    14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184,
+    14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT64_4096)
+const uint16_t armBitRevIndexTableF64_4096[ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH] =
+{
+    /* radix 4, size 4032 */
+    8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048,
+    72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720,
+    128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312,
+    184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552,
+    240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608,
+    296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136,
+    352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728,
+    408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968,
+    464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640,
+    528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304,
+    584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976,
+    640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568,
+    696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808,
+    752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248,
+    816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912,
+    872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368,
+    928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032,
+    984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320,
+    1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176,
+    1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464,
+    1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632,
+    1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776,
+    1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832,
+    1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688,
+    1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976,
+    1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144,
+    1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288,
+    1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576,
+    1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432,
+    1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720,
+    1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888,
+    1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032,
+    1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088,
+    1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944,
+    1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232,
+    1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400,
+    1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544,
+    2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256,
+    2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496,
+    2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784,
+    2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376,
+    2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232,
+    2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152,
+    2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008,
+    2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296,
+    2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888,
+    2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744,
+    2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896,
+    2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560,
+    2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728,
+    2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392,
+    2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680,
+    2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312,
+    2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976,
+    2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432,
+    2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288,
+    3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576,
+    3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480,
+    3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720,
+    3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312,
+    3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840,
+    3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896,
+    3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136,
+    3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424,
+    3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016,
+    3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872,
+    3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024,
+    3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688,
+    3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856,
+    3728,9664, 3736,26048, 3744,5568, 3752,21952, 3760,13760, 3768,30144,
+    3784,19904, 3792,11712, 3800,28096, 3808,7616, 3816,24000, 3824,15808,
+    3832,32192, 3848,17344, 3856,9152, 3864,25536, 3872,5056, 3880,21440,
+    3888,13248, 3896,29632, 3912,19392, 3920,11200, 3928,27584, 3936,7104,
+    3944,23488, 3952,15296, 3960,31680, 3976,18368, 3984,10176, 3992,26560,
+    4000,6080, 4008,22464, 4016,14272, 4024,30656, 4040,20416, 4048,12224,
+    4056,28608, 4064,8128, 4072,24512, 4080,16320, 4088,32704, 4104,16416,
+    4112,8224, 4120,24608, 4136,20512, 4144,12320, 4152,28704, 4168,18464,
+    4176,10272, 4184,26656, 4192,6176, 4200,22560, 4208,14368, 4216,30752,
+    4232,17440, 4240,9248, 4248,25632, 4256,5152, 4264,21536, 4272,13344,
+    4280,29728, 4296,19488, 4304,11296, 4312,27680, 4320,7200, 4328,23584,
+    4336,15392, 4344,31776, 4360,16928, 4368,8736, 4376,25120, 4384,4640,
+    4392,21024, 4400,12832, 4408,29216, 4424,18976, 4432,10784, 4440,27168,
+    4448,6688, 4456,23072, 4464,14880, 4472,31264, 4488,17952, 4496,9760,
+    4504,26144, 4512,5664, 4520,22048, 4528,13856, 4536,30240, 4552,20000,
+    4560,11808, 4568,28192, 4576,7712, 4584,24096, 4592,15904, 4600,32288,
+    4616,16672, 4624,8480, 4632,24864, 4648,20768, 4656,12576, 4664,28960,
+    4680,18720, 4688,10528, 4696,26912, 4704,6432, 4712,22816, 4720,14624,
+    4728,31008, 4744,17696, 4752,9504, 4760,25888, 4768,5408, 4776,21792,
+    4784,13600, 4792,29984, 4808,19744, 4816,11552, 4824,27936, 4832,7456,
+    4840,23840, 4848,15648, 4856,32032, 4872,17184, 4880,8992, 4888,25376,
+    4904,21280, 4912,13088, 4920,29472, 4936,19232, 4944,11040, 4952,27424,
+    4960,6944, 4968,23328, 4976,15136, 4984,31520, 5000,18208, 5008,10016,
+    5016,26400, 5024,5920, 5032,22304, 5040,14112, 5048,30496, 5064,20256,
+    5072,12064, 5080,28448, 5088,7968, 5096,24352, 5104,16160, 5112,32544,
+    5128,16544, 5136,8352, 5144,24736, 5160,20640, 5168,12448, 5176,28832,
+    5192,18592, 5200,10400, 5208,26784, 5216,6304, 5224,22688, 5232,14496,
+    5240,30880, 5256,17568, 5264,9376, 5272,25760, 5288,21664, 5296,13472,
+    5304,29856, 5320,19616, 5328,11424, 5336,27808, 5344,7328, 5352,23712,
+    5360,15520, 5368,31904, 5384,17056, 5392,8864, 5400,25248, 5416,21152,
+    5424,12960, 5432,29344, 5448,19104, 5456,10912, 5464,27296, 5472,6816,
+    5480,23200, 5488,15008, 5496,31392, 5512,18080, 5520,9888, 5528,26272,
+    5536,5792, 5544,22176, 5552,13984, 5560,30368, 5576,20128, 5584,11936,
+    5592,28320, 5600,7840, 5608,24224, 5616,16032, 5624,32416, 5640,16800,
+    5648,8608, 5656,24992, 5672,20896, 5680,12704, 5688,29088, 5704,18848,
+    5712,10656, 5720,27040, 5728,6560, 5736,22944, 5744,14752, 5752,31136,
+    5768,17824, 5776,9632, 5784,26016, 5800,21920, 5808,13728, 5816,30112,
+    5832,19872, 5840,11680, 5848,28064, 5856,7584, 5864,23968, 5872,15776,
+    5880,32160, 5896,17312, 5904,9120, 5912,25504, 5928,21408, 5936,13216,
+    5944,29600, 5960,19360, 5968,11168, 5976,27552, 5984,7072, 5992,23456,
+    6000,15264, 6008,31648, 6024,18336, 6032,10144, 6040,26528, 6056,22432,
+    6064,14240, 6072,30624, 6088,20384, 6096,12192, 6104,28576, 6112,8096,
+    6120,24480, 6128,16288, 6136,32672, 6152,16480, 6160,8288, 6168,24672,
+    6184,20576, 6192,12384, 6200,28768, 6216,18528, 6224,10336, 6232,26720,
+    6248,22624, 6256,14432, 6264,30816, 6280,17504, 6288,9312, 6296,25696,
+    6312,21600, 6320,13408, 6328,29792, 6344,19552, 6352,11360, 6360,27744,
+    6368,7264, 6376,23648, 6384,15456, 6392,31840, 6408,16992, 6416,8800,
+    6424,25184, 6440,21088, 6448,12896, 6456,29280, 6472,19040, 6480,10848,
+    6488,27232, 6496,6752, 6504,23136, 6512,14944, 6520,31328, 6536,18016,
+    6544,9824, 6552,26208, 6568,22112, 6576,13920, 6584,30304, 6600,20064,
+    6608,11872, 6616,28256, 6624,7776, 6632,24160, 6640,15968, 6648,32352,
+    6664,16736, 6672,8544, 6680,24928, 6696,20832, 6704,12640, 6712,29024,
+    6728,18784, 6736,10592, 6744,26976, 6760,22880, 6768,14688, 6776,31072,
+    6792,17760, 6800,9568, 6808,25952, 6824,21856, 6832,13664, 6840,30048,
+    6856,19808, 6864,11616, 6872,28000, 6880,7520, 6888,23904, 6896,15712,
+    6904,32096, 6920,17248, 6928,9056, 6936,25440, 6952,21344, 6960,13152,
+    6968,29536, 6984,19296, 6992,11104, 7000,27488, 7016,23392, 7024,15200,
+    7032,31584, 7048,18272, 7056,10080, 7064,26464, 7080,22368, 7088,14176,
+    7096,30560, 7112,20320, 7120,12128, 7128,28512, 7136,8032, 7144,24416,
+    7152,16224, 7160,32608, 7176,16608, 7184,8416, 7192,24800, 7208,20704,
+    7216,12512, 7224,28896, 7240,18656, 7248,10464, 7256,26848, 7272,22752,
+    7280,14560, 7288,30944, 7304,17632, 7312,9440, 7320,25824, 7336,21728,
+    7344,13536, 7352,29920, 7368,19680, 7376,11488, 7384,27872, 7400,23776,
+    7408,15584, 7416,31968, 7432,17120, 7440,8928, 7448,25312, 7464,21216,
+    7472,13024, 7480,29408, 7496,19168, 7504,10976, 7512,27360, 7528,23264,
+    7536,15072, 7544,31456, 7560,18144, 7568,9952, 7576,26336, 7592,22240,
+    7600,14048, 7608,30432, 7624,20192, 7632,12000, 7640,28384, 7648,7904,
+    7656,24288, 7664,16096, 7672,32480, 7688,16864, 7696,8672, 7704,25056,
+    7720,20960, 7728,12768, 7736,29152, 7752,18912, 7760,10720, 7768,27104,
+    7784,23008, 7792,14816, 7800,31200, 7816,17888, 7824,9696, 7832,26080,
+    7848,21984, 7856,13792, 7864,30176, 7880,19936, 7888,11744, 7896,28128,
+    7912,24032, 7920,15840, 7928,32224, 7944,17376, 7952,9184, 7960,25568,
+    7976,21472, 7984,13280, 7992,29664, 8008,19424, 8016,11232, 8024,27616,
+    8040,23520, 8048,15328, 8056,31712, 8072,18400, 8080,10208, 8088,26592,
+    8104,22496, 8112,14304, 8120,30688, 8136,20448, 8144,12256, 8152,28640,
+    8168,24544, 8176,16352, 8184,32736, 8200,16400, 8216,24592, 8232,20496,
+    8240,12304, 8248,28688, 8264,18448, 8272,10256, 8280,26640, 8296,22544,
+    8304,14352, 8312,30736, 8328,17424, 8336,9232, 8344,25616, 8360,21520,
+    8368,13328, 8376,29712, 8392,19472, 8400,11280, 8408,27664, 8424,23568,
+    8432,15376, 8440,31760, 8456,16912, 8464,8720, 8472,25104, 8488,21008,
+    8496,12816, 8504,29200, 8520,18960, 8528,10768, 8536,27152, 8552,23056,
+    8560,14864, 8568,31248, 8584,17936, 8592,9744, 8600,26128, 8616,22032,
+    8624,13840, 8632,30224, 8648,19984, 8656,11792, 8664,28176, 8680,24080,
+    8688,15888, 8696,32272, 8712,16656, 8728,24848, 8744,20752, 8752,12560,
+    8760,28944, 8776,18704, 8784,10512, 8792,26896, 8808,22800, 8816,14608,
+    8824,30992, 8840,17680, 8848,9488, 8856,25872, 8872,21776, 8880,13584,
+    8888,29968, 8904,19728, 8912,11536, 8920,27920, 8936,23824, 8944,15632,
+    8952,32016, 8968,17168, 8984,25360, 9000,21264, 9008,13072, 9016,29456,
+    9032,19216, 9040,11024, 9048,27408, 9064,23312, 9072,15120, 9080,31504,
+    9096,18192, 9104,10000, 9112,26384, 9128,22288, 9136,14096, 9144,30480,
+    9160,20240, 9168,12048, 9176,28432, 9192,24336, 9200,16144, 9208,32528,
+    9224,16528, 9240,24720, 9256,20624, 9264,12432, 9272,28816, 9288,18576,
+    9296,10384, 9304,26768, 9320,22672, 9328,14480, 9336,30864, 9352,17552,
+    9368,25744, 9384,21648, 9392,13456, 9400,29840, 9416,19600, 9424,11408,
+    9432,27792, 9448,23696, 9456,15504, 9464,31888, 9480,17040, 9496,25232,
+    9512,21136, 9520,12944, 9528,29328, 9544,19088, 9552,10896, 9560,27280,
+    9576,23184, 9584,14992, 9592,31376, 9608,18064, 9616,9872, 9624,26256,
+    9640,22160, 9648,13968, 9656,30352, 9672,20112, 9680,11920, 9688,28304,
+    9704,24208, 9712,16016, 9720,32400, 9736,16784, 9752,24976, 9768,20880,
+    9776,12688, 9784,29072, 9800,18832, 9808,10640, 9816,27024, 9832,22928,
+    9840,14736, 9848,31120, 9864,17808, 9880,26000, 9896,21904, 9904,13712,
+    9912,30096, 9928,19856, 9936,11664, 9944,28048, 9960,23952, 9968,15760,
+    9976,32144, 9992,17296, 10008,25488, 10024,21392, 10032,13200, 10040,29584,
+    10056,19344, 10064,11152, 10072,27536, 10088,23440, 10096,15248, 10104,31632,
+    10120,18320, 10136,26512, 10152,22416, 10160,14224, 10168,30608, 10184,20368,
+    10192,12176, 10200,28560, 10216,24464, 10224,16272, 10232,32656, 10248,16464,
+    10264,24656, 10280,20560, 10288,12368, 10296,28752, 10312,18512, 10328,26704,
+    10344,22608, 10352,14416, 10360,30800, 10376,17488, 10392,25680, 10408,21584,
+    10416,13392, 10424,29776, 10440,19536, 10448,11344, 10456,27728, 10472,23632,
+    10480,15440, 10488,31824, 10504,16976, 10520,25168, 10536,21072, 10544,12880,
+    10552,29264, 10568,19024, 10576,10832, 10584,27216, 10600,23120, 10608,14928,
+    10616,31312, 10632,18000, 10648,26192, 10664,22096, 10672,13904, 10680,30288,
+    10696,20048, 10704,11856, 10712,28240, 10728,24144, 10736,15952, 10744,32336,
+    10760,16720, 10776,24912, 10792,20816, 10800,12624, 10808,29008, 10824,18768,
+    10840,26960, 10856,22864, 10864,14672, 10872,31056, 10888,17744, 10904,25936,
+    10920,21840, 10928,13648, 10936,30032, 10952,19792, 10960,11600, 10968,27984,
+    10984,23888, 10992,15696, 11000,32080, 11016,17232, 11032,25424, 11048,21328,
+    11056,13136, 11064,29520, 11080,19280, 11096,27472, 11112,23376, 11120,15184,
+    11128,31568, 11144,18256, 11160,26448, 11176,22352, 11184,14160, 11192,30544,
+    11208,20304, 11216,12112, 11224,28496, 11240,24400, 11248,16208, 11256,32592,
+    11272,16592, 11288,24784, 11304,20688, 11312,12496, 11320,28880, 11336,18640,
+    11352,26832, 11368,22736, 11376,14544, 11384,30928, 11400,17616, 11416,25808,
+    11432,21712, 11440,13520, 11448,29904, 11464,19664, 11480,27856, 11496,23760,
+    11504,15568, 11512,31952, 11528,17104, 11544,25296, 11560,21200, 11568,13008,
+    11576,29392, 11592,19152, 11608,27344, 11624,23248, 11632,15056, 11640,31440,
+    11656,18128, 11672,26320, 11688,22224, 11696,14032, 11704,30416, 11720,20176,
+    11728,11984, 11736,28368, 11752,24272, 11760,16080, 11768,32464, 11784,16848,
+    11800,25040, 11816,20944, 11824,12752, 11832,29136, 11848,18896, 11864,27088,
+    11880,22992, 11888,14800, 11896,31184, 11912,17872, 11928,26064, 11944,21968,
+    11952,13776, 11960,30160, 11976,19920, 11992,28112, 12008,24016, 12016,15824,
+    12024,32208, 12040,17360, 12056,25552, 12072,21456, 12080,13264, 12088,29648,
+    12104,19408, 12120,27600, 12136,23504, 12144,15312, 12152,31696, 12168,18384,
+    12184,26576, 12200,22480, 12208,14288, 12216,30672, 12232,20432, 12248,28624,
+    12264,24528, 12272,16336, 12280,32720, 12296,16432, 12312,24624, 12328,20528,
+    12344,28720, 12360,18480, 12376,26672, 12392,22576, 12400,14384, 12408,30768,
+    12424,17456, 12440,25648, 12456,21552, 12464,13360, 12472,29744, 12488,19504,
+    12504,27696, 12520,23600, 12528,15408, 12536,31792, 12552,16944, 12568,25136,
+    12584,21040, 12592,12848, 12600,29232, 12616,18992, 12632,27184, 12648,23088,
+    12656,14896, 12664,31280, 12680,17968, 12696,26160, 12712,22064, 12720,13872,
+    12728,30256, 12744,20016, 12760,28208, 12776,24112, 12784,15920, 12792,32304,
+    12808,16688, 12824,24880, 12840,20784, 12856,28976, 12872,18736, 12888,26928,
+    12904,22832, 12912,14640, 12920,31024, 12936,17712, 12952,25904, 12968,21808,
+    12976,13616, 12984,30000, 13000,19760, 13016,27952, 13032,23856, 13040,15664,
+    13048,32048, 13064,17200, 13080,25392, 13096,21296, 13112,29488, 13128,19248,
+    13144,27440, 13160,23344, 13168,15152, 13176,31536, 13192,18224, 13208,26416,
+    13224,22320, 13232,14128, 13240,30512, 13256,20272, 13272,28464, 13288,24368,
+    13296,16176, 13304,32560, 13320,16560, 13336,24752, 13352,20656, 13368,28848,
+    13384,18608, 13400,26800, 13416,22704, 13424,14512, 13432,30896, 13448,17584,
+    13464,25776, 13480,21680, 13496,29872, 13512,19632, 13528,27824, 13544,23728,
+    13552,15536, 13560,31920, 13576,17072, 13592,25264, 13608,21168, 13624,29360,
+    13640,19120, 13656,27312, 13672,23216, 13680,15024, 13688,31408, 13704,18096,
+    13720,26288, 13736,22192, 13744,14000, 13752,30384, 13768,20144, 13784,28336,
+    13800,24240, 13808,16048, 13816,32432, 13832,16816, 13848,25008, 13864,20912,
+    13880,29104, 13896,18864, 13912,27056, 13928,22960, 13936,14768, 13944,31152,
+    13960,17840, 13976,26032, 13992,21936, 14008,30128, 14024,19888, 14040,28080,
+    14056,23984, 14064,15792, 14072,32176, 14088,17328, 14104,25520, 14120,21424,
+    14136,29616, 14152,19376, 14168,27568, 14184,23472, 14192,15280, 14200,31664,
+    14216,18352, 14232,26544, 14248,22448, 14264,30640, 14280,20400, 14296,28592,
+    14312,24496, 14320,16304, 14328,32688, 14344,16496, 14360,24688, 14376,20592,
+    14392,28784, 14408,18544, 14424,26736, 14440,22640, 14456,30832, 14472,17520,
+    14488,25712, 14504,21616, 14520,29808, 14536,19568, 14552,27760, 14568,23664,
+    14576,15472, 14584,31856, 14600,17008, 14616,25200, 14632,21104, 14648,29296,
+    14664,19056, 14680,27248, 14696,23152, 14704,14960, 14712,31344, 14728,18032,
+    14744,26224, 14760,22128, 14776,30320, 14792,20080, 14808,28272, 14824,24176,
+    14832,15984, 14840,32368, 14856,16752, 14872,24944, 14888,20848, 14904,29040,
+    14920,18800, 14936,26992, 14952,22896, 14968,31088, 14984,17776, 15000,25968,
+    15016,21872, 15032,30064, 15048,19824, 15064,28016, 15080,23920, 15088,15728,
+    15096,32112, 15112,17264, 15128,25456, 15144,21360, 15160,29552, 15176,19312,
+    15192,27504, 15208,23408, 15224,31600, 15240,18288, 15256,26480, 15272,22384,
+    15288,30576, 15304,20336, 15320,28528, 15336,24432, 15344,16240, 15352,32624,
+    15368,16624, 15384,24816, 15400,20720, 15416,28912, 15432,18672, 15448,26864,
+    15464,22768, 15480,30960, 15496,17648, 15512,25840, 15528,21744, 15544,29936,
+    15560,19696, 15576,27888, 15592,23792, 15608,31984, 15624,17136, 15640,25328,
+    15656,21232, 15672,29424, 15688,19184, 15704,27376, 15720,23280, 15736,31472,
+    15752,18160, 15768,26352, 15784,22256, 15800,30448, 15816,20208, 15832,28400,
+    15848,24304, 15856,16112, 15864,32496, 15880,16880, 15896,25072, 15912,20976,
+    15928,29168, 15944,18928, 15960,27120, 15976,23024, 15992,31216, 16008,17904,
+    16024,26096, 16040,22000, 16056,30192, 16072,19952, 16088,28144, 16104,24048,
+    16120,32240, 16136,17392, 16152,25584, 16168,21488, 16184,29680, 16200,19440,
+    16216,27632, 16232,23536, 16248,31728, 16264,18416, 16280,26608, 16296,22512,
+    16312,30704, 16328,20464, 16344,28656, 16360,24560, 16376,32752, 16408,24584,
+    16424,20488, 16440,28680, 16456,18440, 16472,26632, 16488,22536, 16504,30728,
+    16520,17416, 16536,25608, 16552,21512, 16568,29704, 16584,19464, 16600,27656,
+    16616,23560, 16632,31752, 16648,16904, 16664,25096, 16680,21000, 16696,29192,
+    16712,18952, 16728,27144, 16744,23048, 16760,31240, 16776,17928, 16792,26120,
+    16808,22024, 16824,30216, 16840,19976, 16856,28168, 16872,24072, 16888,32264,
+    16920,24840, 16936,20744, 16952,28936, 16968,18696, 16984,26888, 17000,22792,
+    17016,30984, 17032,17672, 17048,25864, 17064,21768, 17080,29960, 17096,19720,
+    17112,27912, 17128,23816, 17144,32008, 17176,25352, 17192,21256, 17208,29448,
+    17224,19208, 17240,27400, 17256,23304, 17272,31496, 17288,18184, 17304,26376,
+    17320,22280, 17336,30472, 17352,20232, 17368,28424, 17384,24328, 17400,32520,
+    17432,24712, 17448,20616, 17464,28808, 17480,18568, 17496,26760, 17512,22664,
+    17528,30856, 17560,25736, 17576,21640, 17592,29832, 17608,19592, 17624,27784,
+    17640,23688, 17656,31880, 17688,25224, 17704,21128, 17720,29320, 17736,19080,
+    17752,27272, 17768,23176, 17784,31368, 17800,18056, 17816,26248, 17832,22152,
+    17848,30344, 17864,20104, 17880,28296, 17896,24200, 17912,32392, 17944,24968,
+    17960,20872, 17976,29064, 17992,18824, 18008,27016, 18024,22920, 18040,31112,
+    18072,25992, 18088,21896, 18104,30088, 18120,19848, 18136,28040, 18152,23944,
+    18168,32136, 18200,25480, 18216,21384, 18232,29576, 18248,19336, 18264,27528,
+    18280,23432, 18296,31624, 18328,26504, 18344,22408, 18360,30600, 18376,20360,
+    18392,28552, 18408,24456, 18424,32648, 18456,24648, 18472,20552, 18488,28744,
+    18520,26696, 18536,22600, 18552,30792, 18584,25672, 18600,21576, 18616,29768,
+    18632,19528, 18648,27720, 18664,23624, 18680,31816, 18712,25160, 18728,21064,
+    18744,29256, 18760,19016, 18776,27208, 18792,23112, 18808,31304, 18840,26184,
+    18856,22088, 18872,30280, 18888,20040, 18904,28232, 18920,24136, 18936,32328,
+    18968,24904, 18984,20808, 19000,29000, 19032,26952, 19048,22856, 19064,31048,
+    19096,25928, 19112,21832, 19128,30024, 19144,19784, 19160,27976, 19176,23880,
+    19192,32072, 19224,25416, 19240,21320, 19256,29512, 19288,27464, 19304,23368,
+    19320,31560, 19352,26440, 19368,22344, 19384,30536, 19400,20296, 19416,28488,
+    19432,24392, 19448,32584, 19480,24776, 19496,20680, 19512,28872, 19544,26824,
+    19560,22728, 19576,30920, 19608,25800, 19624,21704, 19640,29896, 19672,27848,
+    19688,23752, 19704,31944, 19736,25288, 19752,21192, 19768,29384, 19800,27336,
+    19816,23240, 19832,31432, 19864,26312, 19880,22216, 19896,30408, 19912,20168,
+    19928,28360, 19944,24264, 19960,32456, 19992,25032, 20008,20936, 20024,29128,
+    20056,27080, 20072,22984, 20088,31176, 20120,26056, 20136,21960, 20152,30152,
+    20184,28104, 20200,24008, 20216,32200, 20248,25544, 20264,21448, 20280,29640,
+    20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664,
+    20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664,
+    20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688,
+    20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176,
+    20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200,
+    20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824,
+    21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848,
+    21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528,
+    21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552,
+    21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768,
+    21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352,
+    21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376,
+    21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048,
+    22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976,
+    22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656,
+    22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680,
+    22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752,
+    22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144,
+    22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360,
+    23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056,
+    23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496,
+    23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616,
+    23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928,
+    23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464,
+    23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064,
+    24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136,
+    24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600,
+    24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744,
+    24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208,
+    24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280,
+    25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928,
+    25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488,
+    25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848,
+    25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264,
+    26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128,
+    26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640,
+    26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784,
+    26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296,
+    27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992,
+    27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600,
+    27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448,
+    28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168,
+    28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776,
+    28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312,
+    29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568,
+    29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160,
+    30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376,
+    31480,32120, 31736,32632, 32248,32504
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
+
+const uint16_t armBitRevIndexTable16[ARMBITREVINDEXTABLE_16_TABLE_LENGTH] =
+{
+   /* 8x2, size 20 */
+   8,64, 24,72, 16,64, 40,80, 32,64, 56,88, 48,72, 88,104, 72,96, 104,112
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
+
+const uint16_t armBitRevIndexTable32[ARMBITREVINDEXTABLE_32_TABLE_LENGTH] =
+{
+   /* 8x4, size 48 */
+   8,64, 16,128, 24,192, 32,64, 40,72, 48,136, 56,200, 64,128, 72,80, 88,208,
+   80,144, 96,192, 104,208, 112,152, 120,216, 136,192, 144,160, 168,208,
+   152,224, 176,208, 184,232, 216,240, 200,224, 232,240
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
+
+const uint16_t armBitRevIndexTable64[ARMBITREVINDEXTABLE_64_TABLE_LENGTH] =
+{
+   /* radix 8, size 56 */
+   8,64, 16,128, 24,192, 32,256, 40,320, 48,384, 56,448, 80,136, 88,200,
+   96,264, 104,328, 112,392, 120,456, 152,208, 160,272, 168,336, 176,400,
+   184,464, 224,280, 232,344, 240,408, 248,472, 296,352, 304,416, 312,480,
+   368,424, 376,488, 440,496
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
+
+const uint16_t armBitRevIndexTable128[ARMBITREVINDEXTABLE_128_TABLE_LENGTH] =
+{
+   /* 8x2, size 208 */
+   8,512, 16,64, 24,576, 32,128, 40,640, 48,192, 56,704, 64,256, 72,768,
+   80,320, 88,832, 96,384, 104,896, 112,448, 120,960, 128,512, 136,520,
+   144,768, 152,584, 160,520, 168,648, 176,200, 184,712, 192,264, 200,776,
+   208,328, 216,840, 224,392, 232,904, 240,456, 248,968, 264,528, 272,320,
+   280,592, 288,768, 296,656, 304,328, 312,720, 328,784, 344,848, 352,400,
+   360,912, 368,464, 376,976, 384,576, 392,536, 400,832, 408,600, 416,584,
+   424,664, 432,840, 440,728, 448,592, 456,792, 464,848, 472,856, 480,600,
+   488,920, 496,856, 504,984, 520,544, 528,576, 536,608, 552,672, 560,608,
+   568,736, 576,768, 584,800, 592,832, 600,864, 608,800, 616,928, 624,864,
+   632,992, 648,672, 656,896, 664,928, 688,904, 696,744, 704,896, 712,808,
+   720,912, 728,872, 736,928, 744,936, 752,920, 760,1000, 776,800, 784,832,
+   792,864, 808,904, 816,864, 824,920, 840,864, 856,880, 872,944, 888,1008,
+   904,928, 912,960, 920,992, 944,968, 952,1000, 968,992, 984,1008
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
+
+const uint16_t armBitRevIndexTable256[ARMBITREVINDEXTABLE_256_TABLE_LENGTH] =
+{
+   /* 8x4, size 440 */
+   8,512, 16,1024, 24,1536, 32,64, 40,576, 48,1088, 56,1600, 64,128, 72,640,
+   80,1152, 88,1664, 96,192, 104,704, 112,1216, 120,1728, 128,256, 136,768,
+   144,1280, 152,1792, 160,320, 168,832, 176,1344, 184,1856, 192,384,
+   200,896, 208,1408, 216,1920, 224,448, 232,960, 240,1472, 248,1984,
+   256,512, 264,520, 272,1032, 280,1544, 288,640, 296,584, 304,1096, 312,1608,
+   320,768, 328,648, 336,1160, 344,1672, 352,896, 360,712, 368,1224, 376,1736,
+   384,520, 392,776, 400,1288, 408,1800, 416,648, 424,840, 432,1352, 440,1864,
+   448,776, 456,904, 464,1416, 472,1928, 480,904, 488,968, 496,1480, 504,1992,
+   520,528, 512,1024, 528,1040, 536,1552, 544,1152, 552,592, 560,1104,
+   568,1616, 576,1280, 584,656, 592,1168, 600,1680, 608,1408, 616,720,
+   624,1232, 632,1744, 640,1032, 648,784, 656,1296, 664,1808, 672,1160,
+   680,848, 688,1360, 696,1872, 704,1288, 712,912, 720,1424, 728,1936,
+   736,1416, 744,976, 752,1488, 760,2000, 768,1536, 776,1552, 784,1048,
+   792,1560, 800,1664, 808,1680, 816,1112, 824,1624, 832,1792, 840,1808,
+   848,1176, 856,1688, 864,1920, 872,1936, 880,1240, 888,1752, 896,1544,
+   904,1560, 912,1304, 920,1816, 928,1672, 936,1688, 944,1368, 952,1880,
+   960,1800, 968,1816, 976,1432, 984,1944, 992,1928, 1000,1944, 1008,1496,
+   1016,2008, 1032,1152, 1040,1056, 1048,1568, 1064,1408, 1072,1120,
+   1080,1632, 1088,1536, 1096,1160, 1104,1184, 1112,1696, 1120,1552,
+   1128,1416, 1136,1248, 1144,1760, 1160,1664, 1168,1312, 1176,1824,
+   1184,1544, 1192,1920, 1200,1376, 1208,1888, 1216,1568, 1224,1672,
+   1232,1440, 1240,1952, 1248,1560, 1256,1928, 1264,1504, 1272,2016,
+   1288,1312, 1296,1408, 1304,1576, 1320,1424, 1328,1416, 1336,1640,
+   1344,1792, 1352,1824, 1360,1920, 1368,1704, 1376,1800, 1384,1432,
+   1392,1928, 1400,1768, 1416,1680, 1432,1832, 1440,1576, 1448,1936,
+   1456,1832, 1464,1896, 1472,1808, 1480,1688, 1488,1936, 1496,1960,
+   1504,1816, 1512,1944, 1520,1944, 1528,2024, 1560,1584, 1592,1648,
+   1600,1792, 1608,1920, 1616,1800, 1624,1712, 1632,1808, 1640,1936,
+   1648,1816, 1656,1776, 1672,1696, 1688,1840, 1704,1952, 1712,1928,
+   1720,1904, 1728,1824, 1736,1952, 1744,1832, 1752,1968, 1760,1840,
+   1768,1960, 1776,1944, 1784,2032, 1864,1872, 1848,1944, 1872,1888,
+   1880,1904, 1888,1984, 1896,2000, 1912,2032, 1904,2016, 1976,2032,
+   1960,1968, 2008,2032, 1992,2016, 2024,2032
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
+
+const uint16_t armBitRevIndexTable512[ARMBITREVINDEXTABLE_512_TABLE_LENGTH] =
+{
+   /* radix 8, size 448 */
+   8,512, 16,1024, 24,1536, 32,2048, 40,2560, 48,3072, 56,3584, 72,576,
+   80,1088, 88,1600, 96,2112, 104,2624, 112,3136, 120,3648, 136,640, 144,1152,
+   152,1664, 160,2176, 168,2688, 176,3200, 184,3712, 200,704, 208,1216,
+   216,1728, 224,2240, 232,2752, 240,3264, 248,3776, 264,768, 272,1280,
+   280,1792, 288,2304, 296,2816, 304,3328, 312,3840, 328,832, 336,1344,
+   344,1856, 352,2368, 360,2880, 368,3392, 376,3904, 392,896, 400,1408,
+   408,1920, 416,2432, 424,2944, 432,3456, 440,3968, 456,960, 464,1472,
+   472,1984, 480,2496, 488,3008, 496,3520, 504,4032, 528,1032, 536,1544,
+   544,2056, 552,2568, 560,3080, 568,3592, 592,1096, 600,1608, 608,2120,
+   616,2632, 624,3144, 632,3656, 656,1160, 664,1672, 672,2184, 680,2696,
+   688,3208, 696,3720, 720,1224, 728,1736, 736,2248, 744,2760, 752,3272,
+   760,3784, 784,1288, 792,1800, 800,2312, 808,2824, 816,3336, 824,3848,
+   848,1352, 856,1864, 864,2376, 872,2888, 880,3400, 888,3912, 912,1416,
+   920,1928, 928,2440, 936,2952, 944,3464, 952,3976, 976,1480, 984,1992,
+   992,2504, 1000,3016, 1008,3528, 1016,4040, 1048,1552, 1056,2064, 1064,2576,
+   1072,3088, 1080,3600, 1112,1616, 1120,2128, 1128,2640, 1136,3152,
+   1144,3664, 1176,1680, 1184,2192, 1192,2704, 1200,3216, 1208,3728,
+   1240,1744, 1248,2256, 1256,2768, 1264,3280, 1272,3792, 1304,1808,
+   1312,2320, 1320,2832, 1328,3344, 1336,3856, 1368,1872, 1376,2384,
+   1384,2896, 1392,3408, 1400,3920, 1432,1936, 1440,2448, 1448,2960,
+   1456,3472, 1464,3984, 1496,2000, 1504,2512, 1512,3024, 1520,3536,
+   1528,4048, 1568,2072, 1576,2584, 1584,3096, 1592,3608, 1632,2136,
+   1640,2648, 1648,3160, 1656,3672, 1696,2200, 1704,2712, 1712,3224,
+   1720,3736, 1760,2264, 1768,2776, 1776,3288, 1784,3800, 1824,2328,
+   1832,2840, 1840,3352, 1848,3864, 1888,2392, 1896,2904, 1904,3416,
+   1912,3928, 1952,2456, 1960,2968, 1968,3480, 1976,3992, 2016,2520,
+   2024,3032, 2032,3544, 2040,4056, 2088,2592, 2096,3104, 2104,3616,
+   2152,2656, 2160,3168, 2168,3680, 2216,2720, 2224,3232, 2232,3744,
+   2280,2784, 2288,3296, 2296,3808, 2344,2848, 2352,3360, 2360,3872,
+   2408,2912, 2416,3424, 2424,3936, 2472,2976, 2480,3488, 2488,4000,
+   2536,3040, 2544,3552, 2552,4064, 2608,3112, 2616,3624, 2672,3176,
+   2680,3688, 2736,3240, 2744,3752, 2800,3304, 2808,3816, 2864,3368,
+   2872,3880, 2928,3432, 2936,3944, 2992,3496, 3000,4008, 3056,3560,
+   3064,4072, 3128,3632, 3192,3696, 3256,3760, 3320,3824, 3384,3888,
+   3448,3952, 3512,4016, 3576,4080
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
+
+const uint16_t armBitRevIndexTable1024[ARMBITREVINDEXTABLE_1024_TABLE_LENGTH] =
+{
+   /* 8x2, size 1800 */
+   8,4096, 16,512, 24,4608, 32,1024, 40,5120, 48,1536, 56,5632, 64,2048,
+   72,6144, 80,2560, 88,6656, 96,3072, 104,7168, 112,3584, 120,7680, 128,2048,
+   136,4160, 144,576, 152,4672, 160,1088, 168,5184, 176,1600, 184,5696,
+   192,2112, 200,6208, 208,2624, 216,6720, 224,3136, 232,7232, 240,3648,
+   248,7744, 256,2048, 264,4224, 272,640, 280,4736, 288,1152, 296,5248,
+   304,1664, 312,5760, 320,2176, 328,6272, 336,2688, 344,6784, 352,3200,
+   360,7296, 368,3712, 376,7808, 384,2112, 392,4288, 400,704, 408,4800,
+   416,1216, 424,5312, 432,1728, 440,5824, 448,2240, 456,6336, 464,2752,
+   472,6848, 480,3264, 488,7360, 496,3776, 504,7872, 512,2048, 520,4352,
+   528,768, 536,4864, 544,1280, 552,5376, 560,1792, 568,5888, 576,2304,
+   584,6400, 592,2816, 600,6912, 608,3328, 616,7424, 624,3840, 632,7936,
+   640,2176, 648,4416, 656,832, 664,4928, 672,1344, 680,5440, 688,1856,
+   696,5952, 704,2368, 712,6464, 720,2880, 728,6976, 736,3392, 744,7488,
+   752,3904, 760,8000, 768,2112, 776,4480, 784,896, 792,4992, 800,1408,
+   808,5504, 816,1920, 824,6016, 832,2432, 840,6528, 848,2944, 856,7040,
+   864,3456, 872,7552, 880,3968, 888,8064, 896,2240, 904,4544, 912,960,
+   920,5056, 928,1472, 936,5568, 944,1984, 952,6080, 960,2496, 968,6592,
+   976,3008, 984,7104, 992,3520, 1000,7616, 1008,4032, 1016,8128, 1024,4096,
+   1032,4104, 1040,4352, 1048,4616, 1056,4104, 1064,5128, 1072,1544,
+   1080,5640, 1088,2056, 1096,6152, 1104,2568, 1112,6664, 1120,3080,
+   1128,7176, 1136,3592, 1144,7688, 1152,6144, 1160,4168, 1168,6400,
+   1176,4680, 1184,6152, 1192,5192, 1200,1608, 1208,5704, 1216,2120,
+   1224,6216, 1232,2632, 1240,6728, 1248,3144, 1256,7240, 1264,3656,
+   1272,7752, 1280,4160, 1288,4232, 1296,4416, 1304,4744, 1312,4168,
+   1320,5256, 1328,1672, 1336,5768, 1344,2184, 1352,6280, 1360,2696,
+   1368,6792, 1376,3208, 1384,7304, 1392,3720, 1400,7816, 1408,6208,
+   1416,4296, 1424,6464, 1432,4808, 1440,6216, 1448,5320, 1456,1736,
+   1464,5832, 1472,2248, 1480,6344, 1488,2760, 1496,6856, 1504,3272,
+   1512,7368, 1520,3784, 1528,7880, 1536,4224, 1544,4360, 1552,4480,
+   1560,4872, 1568,4232, 1576,5384, 1584,1800, 1592,5896, 1600,2312,
+   1608,6408, 1616,2824, 1624,6920, 1632,3336, 1640,7432, 1648,3848,
+   1656,7944, 1664,6272, 1672,4424, 1680,6528, 1688,4936, 1696,6280,
+   1704,5448, 1712,1864, 1720,5960, 1728,2376, 1736,6472, 1744,2888,
+   1752,6984, 1760,3400, 1768,7496, 1776,3912, 1784,8008, 1792,4288,
+   1800,4488, 1808,4544, 1816,5000, 1824,4296, 1832,5512, 1840,1928,
+   1848,6024, 1856,2440, 1864,6536, 1872,2952, 1880,7048, 1888,3464,
+   1896,7560, 1904,3976, 1912,8072, 1920,6336, 1928,4552, 1936,6592,
+   1944,5064, 1952,6344, 1960,5576, 1968,1992, 1976,6088, 1984,2504,
+   1992,6600, 2000,3016, 2008,7112, 2016,3528, 2024,7624, 2032,4040,
+   2040,8136, 2056,4112, 2064,2112, 2072,4624, 2080,4352, 2088,5136,
+   2096,4480, 2104,5648, 2120,6160, 2128,2576, 2136,6672, 2144,3088,
+   2152,7184, 2160,3600, 2168,7696, 2176,2560, 2184,4176, 2192,2816,
+   2200,4688, 2208,2568, 2216,5200, 2224,2824, 2232,5712, 2240,2576,
+   2248,6224, 2256,2640, 2264,6736, 2272,3152, 2280,7248, 2288,3664,
+   2296,7760, 2312,4240, 2320,2432, 2328,4752, 2336,6400, 2344,5264,
+   2352,6528, 2360,5776, 2368,2816, 2376,6288, 2384,2704, 2392,6800,
+   2400,3216, 2408,7312, 2416,3728, 2424,7824, 2432,2624, 2440,4304,
+   2448,2880, 2456,4816, 2464,2632, 2472,5328, 2480,2888, 2488,5840,
+   2496,2640, 2504,6352, 2512,2768, 2520,6864, 2528,3280, 2536,7376,
+   2544,3792, 2552,7888, 2568,4368, 2584,4880, 2592,4416, 2600,5392,
+   2608,4544, 2616,5904, 2632,6416, 2640,2832, 2648,6928, 2656,3344,
+   2664,7440, 2672,3856, 2680,7952, 2696,4432, 2704,2944, 2712,4944,
+   2720,4432, 2728,5456, 2736,2952, 2744,5968, 2752,2944, 2760,6480,
+   2768,2896, 2776,6992, 2784,3408, 2792,7504, 2800,3920, 2808,8016,
+   2824,4496, 2840,5008, 2848,6464, 2856,5520, 2864,6592, 2872,6032,
+   2888,6544, 2896,2960, 2904,7056, 2912,3472, 2920,7568, 2928,3984,
+   2936,8080, 2952,4560, 2960,3008, 2968,5072, 2976,6480, 2984,5584,
+   2992,3016, 3000,6096, 3016,6608, 3032,7120, 3040,3536, 3048,7632,
+   3056,4048, 3064,8144, 3072,4608, 3080,4120, 3088,4864, 3096,4632,
+   3104,4616, 3112,5144, 3120,4872, 3128,5656, 3136,4624, 3144,6168,
+   3152,4880, 3160,6680, 3168,4632, 3176,7192, 3184,3608, 3192,7704,
+   3200,6656, 3208,4184, 3216,6912, 3224,4696, 3232,6664, 3240,5208,
+   3248,6920, 3256,5720, 3264,6672, 3272,6232, 3280,6928, 3288,6744,
+   3296,6680, 3304,7256, 3312,3672, 3320,7768, 3328,4672, 3336,4248,
+   3344,4928, 3352,4760, 3360,4680, 3368,5272, 3376,4936, 3384,5784,
+   3392,4688, 3400,6296, 3408,4944, 3416,6808, 3424,4696, 3432,7320,
+   3440,3736, 3448,7832, 3456,6720, 3464,4312, 3472,6976, 3480,4824,
+   3488,6728, 3496,5336, 3504,6984, 3512,5848, 3520,6736, 3528,6360,
+   3536,6992, 3544,6872, 3552,6744, 3560,7384, 3568,3800, 3576,7896,
+   3584,4736, 3592,4376, 3600,4992, 3608,4888, 3616,4744, 3624,5400,
+   3632,5000, 3640,5912, 3648,4752, 3656,6424, 3664,5008, 3672,6936,
+   3680,4760, 3688,7448, 3696,3864, 3704,7960, 3712,6784, 3720,4440,
+   3728,7040, 3736,4952, 3744,6792, 3752,5464, 3760,7048, 3768,5976,
+   3776,6800, 3784,6488, 3792,7056, 3800,7000, 3808,6808, 3816,7512,
+   3824,3928, 3832,8024, 3840,4800, 3848,4504, 3856,5056, 3864,5016,
+   3872,4808, 3880,5528, 3888,5064, 3896,6040, 3904,4816, 3912,6552,
+   3920,5072, 3928,7064, 3936,4824, 3944,7576, 3952,3992, 3960,8088,
+   3968,6848, 3976,4568, 3984,7104, 3992,5080, 4000,6856, 4008,5592,
+   4016,7112, 4024,6104, 4032,6864, 4040,6616, 4048,7120, 4056,7128,
+   4064,6872, 4072,7640, 4080,7128, 4088,8152, 4104,4128, 4112,4160,
+   4120,4640, 4136,5152, 4144,4232, 4152,5664, 4160,4352, 4168,6176,
+   4176,4416, 4184,6688, 4192,4616, 4200,7200, 4208,4744, 4216,7712,
+   4224,4608, 4232,4616, 4240,4672, 4248,4704, 4256,4640, 4264,5216,
+   4272,4704, 4280,5728, 4288,4864, 4296,6240, 4304,4928, 4312,6752,
+   4320,4632, 4328,7264, 4336,4760, 4344,7776, 4360,4640, 4368,4416,
+   4376,4768, 4384,6152, 4392,5280, 4400,6280, 4408,5792, 4424,6304,
+   4440,6816, 4448,6664, 4456,7328, 4464,6792, 4472,7840, 4480,4624,
+   4488,4632, 4496,4688, 4504,4832, 4512,6168, 4520,5344, 4528,6296,
+   4536,5856, 4544,4880, 4552,6368, 4560,4944, 4568,6880, 4576,6680,
+   4584,7392, 4592,6808, 4600,7904, 4608,6144, 4616,6152, 4624,6208,
+   4632,4896, 4640,6176, 4648,5408, 4656,6240, 4664,5920, 4672,6400,
+   4680,6432, 4688,6464, 4696,6944, 4704,6432, 4712,7456, 4720,4808,
+   4728,7968, 4736,6656, 4744,6664, 4752,6720, 4760,4960, 4768,6688,
+   4776,5472, 4784,6752, 4792,5984, 4800,6912, 4808,6496, 4816,6976,
+   4824,7008, 4832,6944, 4840,7520, 4848,7008, 4856,8032, 4864,6160,
+   4872,6168, 4880,6224, 4888,5024, 4896,6216, 4904,5536, 4912,6344,
+   4920,6048, 4928,6416, 4936,6560, 4944,6480, 4952,7072, 4960,6728,
+   4968,7584, 4976,6856, 4984,8096, 4992,6672, 5000,6680, 5008,6736,
+   5016,5088, 5024,6232, 5032,5600, 5040,6360, 5048,6112, 5056,6928,
+   5064,6624, 5072,6992, 5080,7136, 5088,6744, 5096,7648, 5104,6872,
+   5112,8160, 5128,5152, 5136,5376, 5144,5408, 5168,5384, 5176,5672,
+   5184,5376, 5192,6184, 5200,5392, 5208,6696, 5216,5408, 5224,7208,
+   5232,5400, 5240,7720, 5248,7168, 5256,7200, 5264,7424, 5272,7456,
+   5280,7176, 5288,7208, 5296,7432, 5304,5736, 5312,7184, 5320,6248,
+   5328,7440, 5336,6760, 5344,7192, 5352,7272, 5360,7448, 5368,7784,
+   5384,5408, 5392,5440, 5400,5472, 5408,6184, 5416,7208, 5424,5448,
+   5432,5800, 5448,6312, 5464,6824, 5472,6696, 5480,7336, 5488,6824,
+   5496,7848, 5504,7232, 5512,7264, 5520,7488, 5528,7520, 5536,7240,
+   5544,7272, 5552,7496, 5560,5864, 5568,7248, 5576,6376, 5584,7504,
+   5592,6888, 5600,7256, 5608,7400, 5616,7512, 5624,7912, 5632,7168,
+   5640,7176, 5648,7232, 5656,7240, 5664,7200, 5672,7208, 5680,7264,
+   5688,5928, 5696,7424, 5704,6440, 5712,7488, 5720,6952, 5728,7456,
+   5736,7464, 5744,7520, 5752,7976, 5760,7296, 5768,7328, 5776,7552,
+   5784,7584, 5792,7304, 5800,7336, 5808,7560, 5816,5992, 5824,7312,
+   5832,6504, 5840,7568, 5848,7016, 5856,7320, 5864,7528, 5872,7576,
+   5880,8040, 5888,7184, 5896,7192, 5904,7248, 5912,7256, 5920,6248,
+   5928,7272, 5936,6376, 5944,6056, 5952,7440, 5960,6568, 5968,7504,
+   5976,7080, 5984,6760, 5992,7592, 6000,6888, 6008,8104, 6016,7360,
+   6024,7392, 6032,7616, 6040,7648, 6048,7368, 6056,7400, 6064,7624,
+   6072,6120, 6080,7376, 6088,6632, 6096,7632, 6104,7144, 6112,7384,
+   6120,7656, 6128,7640, 6136,8168, 6168,6240, 6192,6216, 6200,7264,
+   6232,6704, 6248,7216, 6256,6680, 6264,7728, 6272,6656, 6280,6664,
+   6288,6912, 6296,6496, 6304,6688, 6312,6696, 6320,6944, 6328,7520,
+   6336,6672, 6344,6680, 6352,6928, 6360,6768, 6368,6704, 6376,7280,
+   6384,6744, 6392,7792, 6408,6432, 6424,6752, 6440,7432, 6448,6536,
+   6456,7560, 6472,6944, 6488,6832, 6496,6920, 6504,7344, 6512,7048,
+   6520,7856, 6528,6720, 6536,6728, 6544,6976, 6552,7008, 6560,6752,
+   6568,7448, 6576,7008, 6584,7576, 6592,6736, 6600,6744, 6608,6992,
+   6616,6896, 6624,6936, 6632,7408, 6640,7064, 6648,7920, 6712,7280,
+   6744,6960, 6760,7472, 6768,6936, 6776,7984, 6800,6848, 6808,6856,
+   6832,6880, 6840,6888, 6848,7040, 6856,7048, 6864,7104, 6872,7024,
+   6880,7072, 6888,7536, 6896,7136, 6904,8048, 6952,7496, 6968,7624,
+   6984,7008, 7000,7088, 7016,7600, 7024,7112, 7032,8112, 7056,7104,
+   7064,7112, 7080,7512, 7088,7136, 7096,7640, 7128,7152, 7144,7664,
+   7160,8176, 7176,7200, 7192,7216, 7224,7272, 7240,7264, 7256,7280,
+   7288,7736, 7296,7680, 7304,7712, 7312,7936, 7320,7968, 7328,7688,
+   7336,7720, 7344,7944, 7352,7976, 7360,7696, 7368,7728, 7376,7952,
+   7384,7984, 7392,7704, 7400,7736, 7408,7960, 7416,7800, 7432,7456,
+   7448,7472, 7480,7592, 7496,7520, 7512,7536, 7528,7976, 7544,7864,
+   7552,7744, 7560,7776, 7568,8000, 7576,8032, 7584,7752, 7592,7784,
+   7600,8008, 7608,8040, 7616,7760, 7624,7792, 7632,8016, 7640,8048,
+   7648,7768, 7656,7800, 7664,8024, 7672,7928, 7688,7712, 7704,7728,
+   7752,7776, 7768,7792, 7800,7992, 7816,7840, 7824,8064, 7832,8096,
+   7856,8072, 7864,8104, 7872,8064, 7880,8072, 7888,8080, 7896,8112,
+   7904,8096, 7912,8104, 7920,8088, 7928,8056, 7944,7968, 7960,7984,
+   8008,8032, 8024,8048, 8056,8120, 8072,8096, 8080,8128, 8088,8160,
+   8112,8136, 8120,8168, 8136,8160, 8152,8176
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
+
+const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE_2048_TABLE_LENGTH] =
+{
+   /* 8x2, size 3808 */
+   8,4096, 16,8192, 24,12288, 32,512, 40,4608, 48,8704, 56,12800, 64,1024,
+   72,5120, 80,9216, 88,13312, 96,1536, 104,5632, 112,9728, 120,13824,
+   128,2048, 136,6144, 144,10240, 152,14336, 160,2560, 168,6656, 176,10752,
+   184,14848, 192,3072, 200,7168, 208,11264, 216,15360, 224,3584, 232,7680,
+   240,11776, 248,15872, 256,1024, 264,4160, 272,8256, 280,12352, 288,576,
+   296,4672, 304,8768, 312,12864, 320,1088, 328,5184, 336,9280, 344,13376,
+   352,1600, 360,5696, 368,9792, 376,13888, 384,2112, 392,6208, 400,10304,
+   408,14400, 416,2624, 424,6720, 432,10816, 440,14912, 448,3136, 456,7232,
+   464,11328, 472,15424, 480,3648, 488,7744, 496,11840, 504,15936, 512,2048,
+   520,4224, 528,8320, 536,12416, 544,640, 552,4736, 560,8832, 568,12928,
+   576,1152, 584,5248, 592,9344, 600,13440, 608,1664, 616,5760, 624,9856,
+   632,13952, 640,2176, 648,6272, 656,10368, 664,14464, 672,2688, 680,6784,
+   688,10880, 696,14976, 704,3200, 712,7296, 720,11392, 728,15488, 736,3712,
+   744,7808, 752,11904, 760,16000, 768,3072, 776,4288, 784,8384, 792,12480,
+   800,3200, 808,4800, 816,8896, 824,12992, 832,1216, 840,5312, 848,9408,
+   856,13504, 864,1728, 872,5824, 880,9920, 888,14016, 896,2240, 904,6336,
+   912,10432, 920,14528, 928,2752, 936,6848, 944,10944, 952,15040, 960,3264,
+   968,7360, 976,11456, 984,15552, 992,3776, 1000,7872, 1008,11968, 1016,16064,
+   1032,4352, 1040,8448, 1048,12544, 1056,3072, 1064,4864, 1072,8960,
+   1080,13056, 1088,1280, 1096,5376, 1104,9472, 1112,13568, 1120,1792,
+   1128,5888, 1136,9984, 1144,14080, 1152,2304, 1160,6400, 1168,10496,
+   1176,14592, 1184,2816, 1192,6912, 1200,11008, 1208,15104, 1216,3328,
+   1224,7424, 1232,11520, 1240,15616, 1248,3840, 1256,7936, 1264,12032,
+   1272,16128, 1288,4416, 1296,8512, 1304,12608, 1312,3328, 1320,4928,
+   1328,9024, 1336,13120, 1352,5440, 1360,9536, 1368,13632, 1376,1856,
+   1384,5952, 1392,10048, 1400,14144, 1408,2368, 1416,6464, 1424,10560,
+   1432,14656, 1440,2880, 1448,6976, 1456,11072, 1464,15168, 1472,3392,
+   1480,7488, 1488,11584, 1496,15680, 1504,3904, 1512,8000, 1520,12096,
+   1528,16192, 1536,2112, 1544,4480, 1552,8576, 1560,12672, 1568,2240,
+   1576,4992, 1584,9088, 1592,13184, 1600,2368, 1608,5504, 1616,9600,
+   1624,13696, 1632,1920, 1640,6016, 1648,10112, 1656,14208, 1664,2432,
+   1672,6528, 1680,10624, 1688,14720, 1696,2944, 1704,7040, 1712,11136,
+   1720,15232, 1728,3456, 1736,7552, 1744,11648, 1752,15744, 1760,3968,
+   1768,8064, 1776,12160, 1784,16256, 1792,3136, 1800,4544, 1808,8640,
+   1816,12736, 1824,3264, 1832,5056, 1840,9152, 1848,13248, 1856,3392,
+   1864,5568, 1872,9664, 1880,13760, 1888,1984, 1896,6080, 1904,10176,
+   1912,14272, 1920,2496, 1928,6592, 1936,10688, 1944,14784, 1952,3008,
+   1960,7104, 1968,11200, 1976,15296, 1984,3520, 1992,7616, 2000,11712,
+   2008,15808, 2016,4032, 2024,8128, 2032,12224, 2040,16320, 2048,4096,
+   2056,4104, 2064,8200, 2072,12296, 2080,4224, 2088,4616, 2096,8712,
+   2104,12808, 2112,4352, 2120,5128, 2128,9224, 2136,13320, 2144,4480,
+   2152,5640, 2160,9736, 2168,13832, 2176,4104, 2184,6152, 2192,10248,
+   2200,14344, 2208,2568, 2216,6664, 2224,10760, 2232,14856, 2240,3080,
+   2248,7176, 2256,11272, 2264,15368, 2272,3592, 2280,7688, 2288,11784,
+   2296,15880, 2304,5120, 2312,4168, 2320,8264, 2328,12360, 2336,5248,
+   2344,4680, 2352,8776, 2360,12872, 2368,5376, 2376,5192, 2384,9288,
+   2392,13384, 2400,5504, 2408,5704, 2416,9800, 2424,13896, 2432,5128,
+   2440,6216, 2448,10312, 2456,14408, 2464,2632, 2472,6728, 2480,10824,
+   2488,14920, 2496,3144, 2504,7240, 2512,11336, 2520,15432, 2528,3656,
+   2536,7752, 2544,11848, 2552,15944, 2560,6144, 2568,4232, 2576,8328,
+   2584,12424, 2592,6272, 2600,4744, 2608,8840, 2616,12936, 2624,6400,
+   2632,5256, 2640,9352, 2648,13448, 2656,6528, 2664,5768, 2672,9864,
+   2680,13960, 2688,6152, 2696,6280, 2704,10376, 2712,14472, 2720,6280,
+   2728,6792, 2736,10888, 2744,14984, 2752,3208, 2760,7304, 2768,11400,
+   2776,15496, 2784,3720, 2792,7816, 2800,11912, 2808,16008, 2816,7168,
+   2824,4296, 2832,8392, 2840,12488, 2848,7296, 2856,4808, 2864,8904,
+   2872,13000, 2880,7424, 2888,5320, 2896,9416, 2904,13512, 2912,7552,
+   2920,5832, 2928,9928, 2936,14024, 2944,7176, 2952,6344, 2960,10440,
+   2968,14536, 2976,7304, 2984,6856, 2992,10952, 3000,15048, 3008,3272,
+   3016,7368, 3024,11464, 3032,15560, 3040,3784, 3048,7880, 3056,11976,
+   3064,16072, 3072,4160, 3080,4360, 3088,8456, 3096,12552, 3104,4288,
+   3112,4872, 3120,8968, 3128,13064, 3136,4416, 3144,5384, 3152,9480,
+   3160,13576, 3168,4544, 3176,5896, 3184,9992, 3192,14088, 3200,4168,
+   3208,6408, 3216,10504, 3224,14600, 3232,4296, 3240,6920, 3248,11016,
+   3256,15112, 3264,3336, 3272,7432, 3280,11528, 3288,15624, 3296,3848,
+   3304,7944, 3312,12040, 3320,16136, 3328,5184, 3336,4424, 3344,8520,
+   3352,12616, 3360,5312, 3368,4936, 3376,9032, 3384,13128, 3392,5440,
+   3400,5448, 3408,9544, 3416,13640, 3424,5568, 3432,5960, 3440,10056,
+   3448,14152, 3456,5192, 3464,6472, 3472,10568, 3480,14664, 3488,5320,
+   3496,6984, 3504,11080, 3512,15176, 3520,5448, 3528,7496, 3536,11592,
+   3544,15688, 3552,3912, 3560,8008, 3568,12104, 3576,16200, 3584,6208,
+   3592,4488, 3600,8584, 3608,12680, 3616,6336, 3624,5000, 3632,9096,
+   3640,13192, 3648,6464, 3656,5512, 3664,9608, 3672,13704, 3680,6592,
+   3688,6024, 3696,10120, 3704,14216, 3712,6216, 3720,6536, 3728,10632,
+   3736,14728, 3744,6344, 3752,7048, 3760,11144, 3768,15240, 3776,6472,
+   3784,7560, 3792,11656, 3800,15752, 3808,3976, 3816,8072, 3824,12168,
+   3832,16264, 3840,7232, 3848,4552, 3856,8648, 3864,12744, 3872,7360,
+   3880,5064, 3888,9160, 3896,13256, 3904,7488, 3912,5576, 3920,9672,
+   3928,13768, 3936,7616, 3944,6088, 3952,10184, 3960,14280, 3968,7240,
+   3976,6600, 3984,10696, 3992,14792, 4000,7368, 4008,7112, 4016,11208,
+   4024,15304, 4032,7496, 4040,7624, 4048,11720, 4056,15816, 4064,7624,
+   4072,8136, 4080,12232, 4088,16328, 4096,8192, 4104,4112, 4112,8208,
+   4120,12304, 4128,8320, 4136,4624, 4144,8720, 4152,12816, 4160,8448,
+   4168,5136, 4176,9232, 4184,13328, 4192,8576, 4200,5648, 4208,9744,
+   4216,13840, 4224,8200, 4232,6160, 4240,10256, 4248,14352, 4256,8328,
+   4264,6672, 4272,10768, 4280,14864, 4288,8456, 4296,7184, 4304,11280,
+   4312,15376, 4320,8584, 4328,7696, 4336,11792, 4344,15888, 4352,9216,
+   4360,9232, 4368,8272, 4376,12368, 4384,9344, 4392,4688, 4400,8784,
+   4408,12880, 4416,9472, 4424,5200, 4432,9296, 4440,13392, 4448,9600,
+   4456,5712, 4464,9808, 4472,13904, 4480,9224, 4488,6224, 4496,10320,
+   4504,14416, 4512,9352, 4520,6736, 4528,10832, 4536,14928, 4544,9480,
+   4552,7248, 4560,11344, 4568,15440, 4576,9608, 4584,7760, 4592,11856,
+   4600,15952, 4608,10240, 4616,10256, 4624,8336, 4632,12432, 4640,10368,
+   4648,4752, 4656,8848, 4664,12944, 4672,10496, 4680,5264, 4688,9360,
+   4696,13456, 4704,10624, 4712,5776, 4720,9872, 4728,13968, 4736,10248,
+   4744,6288, 4752,10384, 4760,14480, 4768,10376, 4776,6800, 4784,10896,
+   4792,14992, 4800,10504, 4808,7312, 4816,11408, 4824,15504, 4832,10632,
+   4840,7824, 4848,11920, 4856,16016, 4864,11264, 4872,11280, 4880,8400,
+   4888,12496, 4896,11392, 4904,11408, 4912,8912, 4920,13008, 4928,11520,
+   4936,5328, 4944,9424, 4952,13520, 4960,11648, 4968,5840, 4976,9936,
+   4984,14032, 4992,11272, 5000,6352, 5008,10448, 5016,14544, 5024,11400,
+   5032,6864, 5040,10960, 5048,15056, 5056,11528, 5064,7376, 5072,11472,
+   5080,15568, 5088,11656, 5096,7888, 5104,11984, 5112,16080, 5120,8256,
+   5128,8272, 5136,8464, 5144,12560, 5152,8384, 5160,8400, 5168,8976,
+   5176,13072, 5184,8512, 5192,5392, 5200,9488, 5208,13584, 5216,8640,
+   5224,5904, 5232,10000, 5240,14096, 5248,8264, 5256,6416, 5264,10512,
+   5272,14608, 5280,8392, 5288,6928, 5296,11024, 5304,15120, 5312,8520,
+   5320,7440, 5328,11536, 5336,15632, 5344,8648, 5352,7952, 5360,12048,
+   5368,16144, 5376,9280, 5384,9296, 5392,8528, 5400,12624, 5408,9408,
+   5416,9424, 5424,9040, 5432,13136, 5440,9536, 5448,5456, 5456,9552,
+   5464,13648, 5472,9664, 5480,5968, 5488,10064, 5496,14160, 5504,9288,
+   5512,6480, 5520,10576, 5528,14672, 5536,9416, 5544,6992, 5552,11088,
+   5560,15184, 5568,9544, 5576,7504, 5584,11600, 5592,15696, 5600,9672,
+   5608,8016, 5616,12112, 5624,16208, 5632,10304, 5640,10320, 5648,8592,
+   5656,12688, 5664,10432, 5672,10448, 5680,9104, 5688,13200, 5696,10560,
+   5704,10576, 5712,9616, 5720,13712, 5728,10688, 5736,6032, 5744,10128,
+   5752,14224, 5760,10312, 5768,6544, 5776,10640, 5784,14736, 5792,10440,
+   5800,7056, 5808,11152, 5816,15248, 5824,10568, 5832,7568, 5840,11664,
+   5848,15760, 5856,10696, 5864,8080, 5872,12176, 5880,16272, 5888,11328,
+   5896,11344, 5904,8656, 5912,12752, 5920,11456, 5928,11472, 5936,9168,
+   5944,13264, 5952,11584, 5960,11600, 5968,9680, 5976,13776, 5984,11712,
+   5992,6096, 6000,10192, 6008,14288, 6016,11336, 6024,6608, 6032,10704,
+   6040,14800, 6048,11464, 6056,7120, 6064,11216, 6072,15312, 6080,11592,
+   6088,7632, 6096,11728, 6104,15824, 6112,11720, 6120,8144, 6128,12240,
+   6136,16336, 6144,12288, 6152,12304, 6160,8216, 6168,12312, 6176,12416,
+   6184,12432, 6192,8728, 6200,12824, 6208,12544, 6216,12560, 6224,9240,
+   6232,13336, 6240,12672, 6248,12688, 6256,9752, 6264,13848, 6272,12296,
+   6280,12312, 6288,10264, 6296,14360, 6304,12424, 6312,6680, 6320,10776,
+   6328,14872, 6336,12552, 6344,7192, 6352,11288, 6360,15384, 6368,12680,
+   6376,7704, 6384,11800, 6392,15896, 6400,13312, 6408,13328, 6416,8280,
+   6424,12376, 6432,13440, 6440,13456, 6448,8792, 6456,12888, 6464,13568,
+   6472,13584, 6480,9304, 6488,13400, 6496,13696, 6504,13712, 6512,9816,
+   6520,13912, 6528,13320, 6536,13336, 6544,10328, 6552,14424, 6560,13448,
+   6568,6744, 6576,10840, 6584,14936, 6592,13576, 6600,7256, 6608,11352,
+   6616,15448, 6624,13704, 6632,7768, 6640,11864, 6648,15960, 6656,14336,
+   6664,14352, 6672,8344, 6680,12440, 6688,14464, 6696,14480, 6704,8856,
+   6712,12952, 6720,14592, 6728,14608, 6736,9368, 6744,13464, 6752,14720,
+   6760,14736, 6768,9880, 6776,13976, 6784,14344, 6792,14360, 6800,10392,
+   6808,14488, 6816,14472, 6824,14488, 6832,10904, 6840,15000, 6848,14600,
+   6856,7320, 6864,11416, 6872,15512, 6880,14728, 6888,7832, 6896,11928,
+   6904,16024, 6912,15360, 6920,15376, 6928,8408, 6936,12504, 6944,15488,
+   6952,15504, 6960,8920, 6968,13016, 6976,15616, 6984,15632, 6992,9432,
+   7000,13528, 7008,15744, 7016,15760, 7024,9944, 7032,14040, 7040,15368,
+   7048,15384, 7056,10456, 7064,14552, 7072,15496, 7080,15512, 7088,10968,
+   7096,15064, 7104,15624, 7112,7384, 7120,11480, 7128,15576, 7136,15752,
+   7144,7896, 7152,11992, 7160,16088, 7168,12352, 7176,12368, 7184,8472,
+   7192,12568, 7200,12480, 7208,12496, 7216,8984, 7224,13080, 7232,12608,
+   7240,12624, 7248,9496, 7256,13592, 7264,12736, 7272,12752, 7280,10008,
+   7288,14104, 7296,12360, 7304,12376, 7312,10520, 7320,14616, 7328,12488,
+   7336,12504, 7344,11032, 7352,15128, 7360,12616, 7368,7448, 7376,11544,
+   7384,15640, 7392,12744, 7400,7960, 7408,12056, 7416,16152, 7424,13376,
+   7432,13392, 7440,8536, 7448,12632, 7456,13504, 7464,13520, 7472,9048,
+   7480,13144, 7488,13632, 7496,13648, 7504,9560, 7512,13656, 7520,13760,
+   7528,13776, 7536,10072, 7544,14168, 7552,13384, 7560,13400, 7568,10584,
+   7576,14680, 7584,13512, 7592,13528, 7600,11096, 7608,15192, 7616,13640,
+   7624,13656, 7632,11608, 7640,15704, 7648,13768, 7656,8024, 7664,12120,
+   7672,16216, 7680,14400, 7688,14416, 7696,8600, 7704,12696, 7712,14528,
+   7720,14544, 7728,9112, 7736,13208, 7744,14656, 7752,14672, 7760,9624,
+   7768,13720, 7776,14784, 7784,14800, 7792,10136, 7800,14232, 7808,14408,
+   7816,14424, 7824,10648, 7832,14744, 7840,14536, 7848,14552, 7856,11160,
+   7864,15256, 7872,14664, 7880,14680, 7888,11672, 7896,15768, 7904,14792,
+   7912,8088, 7920,12184, 7928,16280, 7936,15424, 7944,15440, 7952,8664,
+   7960,12760, 7968,15552, 7976,15568, 7984,9176, 7992,13272, 8000,15680,
+   8008,15696, 8016,9688, 8024,13784, 8032,15808, 8040,15824, 8048,10200,
+   8056,14296, 8064,15432, 8072,15448, 8080,10712, 8088,14808, 8096,15560,
+   8104,15576, 8112,11224, 8120,15320, 8128,15688, 8136,15704, 8144,11736,
+   8152,15832, 8160,15816, 8168,15832, 8176,12248, 8184,16344, 8200,8320,
+   8208,8224, 8216,12320, 8232,10368, 8240,8736, 8248,12832, 8256,8448,
+   8264,8384, 8272,9248, 8280,13344, 8288,9232, 8296,10432, 8304,9760,
+   8312,13856, 8328,12416, 8336,10272, 8344,14368, 8352,12296, 8360,14464,
+   8368,10784, 8376,14880, 8384,8456, 8392,12480, 8400,11296, 8408,15392,
+   8416,12552, 8424,14528, 8432,11808, 8440,15904, 8448,9216, 8456,8576,
+   8464,9232, 8472,12384, 8480,9248, 8488,10624, 8496,8800, 8504,12896,
+   8512,9472, 8520,8640, 8528,9312, 8536,13408, 8544,9296, 8552,10688,
+   8560,9824, 8568,13920, 8576,9224, 8584,12672, 8592,10336, 8600,14432,
+   8608,13320, 8616,14720, 8624,10848, 8632,14944, 8640,9480, 8648,12736,
+   8656,11360, 8664,15456, 8672,13576, 8680,14784, 8688,11872, 8696,15968,
+   8704,12288, 8712,12416, 8720,12296, 8728,12448, 8736,12304, 8744,10376,
+   8752,8864, 8760,12960, 8768,12352, 8776,12480, 8784,9376, 8792,13472,
+   8800,12368, 8808,10440, 8816,9888, 8824,13984, 8832,12320, 8840,12424,
+   8848,10400, 8856,14496, 8864,12312, 8872,14472, 8880,10912, 8888,15008,
+   8896,12384, 8904,12488, 8912,11424, 8920,15520, 8928,12568, 8936,14536,
+   8944,11936, 8952,16032, 8960,12544, 8968,12672, 8976,12552, 8984,12512,
+   8992,12560, 9000,10632, 9008,12568, 9016,13024, 9024,12608, 9032,12736,
+   9040,9440, 9048,13536, 9056,12624, 9064,10696, 9072,9952, 9080,14048,
+   9088,9240, 9096,12680, 9104,10464, 9112,14560, 9120,13336, 9128,14728,
+   9136,10976, 9144,15072, 9152,9496, 9160,12744, 9168,11488, 9176,15584,
+   9184,13592, 9192,14792, 9200,12000, 9208,16096, 9224,9344, 9232,9248,
+   9240,12576, 9256,11392, 9264,12560, 9272,13088, 9280,9472, 9288,9408,
+   9296,9504, 9304,13600, 9312,9488, 9320,11456, 9328,10016, 9336,14112,
+   9352,13440, 9360,10528, 9368,14624, 9376,12360, 9384,15488, 9392,11040,
+   9400,15136, 9408,9480, 9416,13504, 9424,11552, 9432,15648, 9440,12616,
+   9448,15552, 9456,12064, 9464,16160, 9480,9600, 9488,9504, 9496,12640,
+   9512,11648, 9520,12624, 9528,13152, 9544,9664, 9552,9568, 9560,13664,
+   9576,11712, 9584,10080, 9592,14176, 9608,13696, 9616,10592, 9624,14688,
+   9632,13384, 9640,15744, 9648,11104, 9656,15200, 9672,13760, 9680,11616,
+   9688,15712, 9696,13640, 9704,15808, 9712,12128, 9720,16224, 9728,13312,
+   9736,13440, 9744,13320, 9752,12704, 9760,13328, 9768,11400, 9776,13336,
+   9784,13216, 9792,13376, 9800,13504, 9808,13384, 9816,13728, 9824,13392,
+   9832,11464, 9840,10144, 9848,14240, 9856,13344, 9864,13448, 9872,10656,
+   9880,14752, 9888,12376, 9896,15496, 9904,11168, 9912,15264, 9920,13408,
+   9928,13512, 9936,11680, 9944,15776, 9952,12632, 9960,15560, 9968,12192,
+   9976,16288, 9984,13568, 9992,13696, 10000,13576, 10008,12768, 10016,13584,
+   10024,11656, 10032,13592, 10040,13280, 10048,13632, 10056,13760,
+   10064,13640, 10072,13792, 10080,13648, 10088,11720, 10096,10208,
+   10104,14304, 10112,13600, 10120,13704, 10128,10720, 10136,14816,
+   10144,13400, 10152,15752, 10160,11232, 10168,15328, 10176,13664,
+   10184,13768, 10192,11744, 10200,15840, 10208,13656, 10216,15816,
+   10224,12256, 10232,16352, 10248,10272, 10256,10368, 10264,12328,
+   10280,10384, 10288,10376, 10296,12840, 10304,11264, 10312,11296,
+   10320,11392, 10328,13352, 10336,11272, 10344,10448, 10352,11400,
+   10360,13864, 10376,12432, 10392,14376, 10400,12328, 10408,14480,
+   10416,10792, 10424,14888, 10432,11280, 10440,12496, 10448,11304,
+   10456,15400, 10464,11288, 10472,14544, 10480,11816, 10488,15912,
+   10496,11264, 10504,11272, 10512,11280, 10520,12392, 10528,11296,
+   10536,10640, 10544,12496, 10552,12904, 10560,11328, 10568,11360,
+   10576,11456, 10584,13416, 10592,11336, 10600,10704, 10608,11464,
+   10616,13928, 10624,11392, 10632,12688, 10640,11304, 10648,14440,
+   10656,13352, 10664,14736, 10672,10856, 10680,14952, 10688,11344,
+   10696,12752, 10704,11368, 10712,15464, 10720,11352, 10728,14800,
+   10736,11880, 10744,15976, 10752,14336, 10760,14368, 10768,14464,
+   10776,12456, 10784,14344, 10792,14376, 10800,14472, 10808,12968,
+   10816,15360, 10824,15392, 10832,15488, 10840,13480, 10848,15368,
+   10856,15400, 10864,15496, 10872,13992, 10880,14352, 10888,12440,
+   10896,14480, 10904,14504, 10912,14360, 10920,14488, 10928,14488,
+   10936,15016, 10944,15376, 10952,12504, 10960,11432, 10968,15528,
+   10976,15384, 10984,14552, 10992,11944, 11000,16040, 11008,14400,
+   11016,14432, 11024,14528, 11032,12520, 11040,14408, 11048,14440,
+   11056,14536, 11064,13032, 11072,15424, 11080,15456, 11088,15552,
+   11096,13544, 11104,15432, 11112,15464, 11120,15560, 11128,14056,
+   11136,14416, 11144,12696, 11152,14544, 11160,14568, 11168,14424,
+   11176,14744, 11184,14552, 11192,15080, 11200,15440, 11208,12760,
+   11216,11496, 11224,15592, 11232,15448, 11240,14808, 11248,12008,
+   11256,16104, 11272,11296, 11280,11392, 11288,12584, 11304,11408,
+   11312,12688, 11320,13096, 11328,11520, 11336,11552, 11344,11648,
+   11352,13608, 11360,11528, 11368,11472, 11376,11656, 11384,14120,
+   11400,13456, 11416,14632, 11424,12392, 11432,15504, 11440,14440,
+   11448,15144, 11456,11536, 11464,13520, 11472,11560, 11480,15656,
+   11488,11544, 11496,15568, 11504,12072, 11512,16168, 11528,11552,
+   11536,11648, 11544,12648, 11560,11664, 11568,12752, 11576,13160,
+   11592,11616, 11600,11712, 11608,13672, 11624,11728, 11632,11720,
+   11640,14184, 11656,13712, 11672,14696, 11680,13416, 11688,15760,
+   11696,15464, 11704,15208, 11720,13776, 11736,15720, 11744,13672,
+   11752,15824, 11760,12136, 11768,16232, 11776,14592, 11784,14624,
+   11792,14720, 11800,12712, 11808,14600, 11816,14632, 11824,14728,
+   11832,13224, 11840,15616, 11848,15648, 11856,15744, 11864,13736,
+   11872,15624, 11880,15656, 11888,15752, 11896,14248, 11904,14608,
+   11912,13464, 11920,14736, 11928,14760, 11936,14616, 11944,15512,
+   11952,14744, 11960,15272, 11968,15632, 11976,13528, 11984,15760,
+   11992,15784, 12000,15640, 12008,15576, 12016,12200, 12024,16296,
+   12032,14656, 12040,14688, 12048,14784, 12056,12776, 12064,14664,
+   12072,14696, 12080,14792, 12088,13288, 12096,15680, 12104,15712,
+   12112,15808, 12120,13800, 12128,15688, 12136,15720, 12144,15816,
+   12152,14312, 12160,14672, 12168,13720, 12176,14800, 12184,14824,
+   12192,14680, 12200,15768, 12208,14808, 12216,15336, 12224,15696,
+   12232,13784, 12240,15824, 12248,15848, 12256,15704, 12264,15832,
+   12272,15832, 12280,16360, 12312,12336, 12344,12848, 12352,12544,
+   12360,12552, 12368,12560, 12376,13360, 12384,12576, 12392,12584,
+   12400,13336, 12408,13872, 12424,12448, 12440,14384, 12456,14496,
+   12464,14472, 12472,14896, 12480,12672, 12488,12512, 12496,12688,
+   12504,15408, 12512,12680, 12520,14560, 12528,14728, 12536,15920,
+   12544,13312, 12552,13320, 12560,13328, 12568,13336, 12576,13344,
+   12584,13352, 12592,13360, 12600,12912, 12608,13568, 12616,13576,
+   12624,13584, 12632,13424, 12640,13600, 12648,13608, 12656,13400,
+   12664,13936, 12672,13440, 12680,12704, 12688,13456, 12696,14448,
+   12704,13448, 12712,14752, 12720,15496, 12728,14960, 12736,13696,
+   12744,12768, 12752,13712, 12760,15472, 12768,13704, 12776,14816,
+   12784,15752, 12792,15984, 12800,14336, 12808,14464, 12816,14344,
+   12824,14472, 12832,14352, 12840,14480, 12848,14360, 12856,12976,
+   12864,14400, 12872,14528, 12880,14408, 12888,13488, 12896,14416,
+   12904,14544, 12912,14424, 12920,14000, 12928,14368, 12936,14496,
+   12944,14376, 12952,14512, 12960,14384, 12968,14504, 12976,14488,
+   12984,15024, 12992,14432, 13000,14560, 13008,14440, 13016,15536,
+   13024,14448, 13032,14568, 13040,14744, 13048,16048, 13056,14592,
+   13064,14720, 13072,14600, 13080,14728, 13088,14608, 13096,14736,
+   13104,14616, 13112,14744, 13120,14656, 13128,14784, 13136,14664,
+   13144,13552, 13152,14672, 13160,14800, 13168,14680, 13176,14064,
+   13184,14624, 13192,14752, 13200,14632, 13208,14576, 13216,13464,
+   13224,14760, 13232,15512, 13240,15088, 13248,14688, 13256,14816,
+   13264,14696, 13272,15600, 13280,13720, 13288,14824, 13296,15768,
+   13304,16112, 13336,13360, 13368,14616, 13376,13568, 13384,13576,
+   13392,13584, 13400,13616, 13408,13600, 13416,13608, 13424,13592,
+   13432,14128, 13448,13472, 13464,14640, 13480,15520, 13488,14536,
+   13496,15152, 13504,13696, 13512,13536, 13520,13712, 13528,15664,
+   13536,13704, 13544,15584, 13552,14792, 13560,16176, 13592,13616,
+   13624,14680, 13656,13680, 13688,14192, 13704,13728, 13720,14704,
+   13736,15776, 13744,15560, 13752,15216, 13768,13792, 13784,15728,
+   13800,15840, 13808,15816, 13816,16240, 13824,15360, 13832,15488,
+   13840,15368, 13848,15496, 13856,15376, 13864,15504, 13872,15384,
+   13880,15512, 13888,15424, 13896,15552, 13904,15432, 13912,15560,
+   13920,15440, 13928,15568, 13936,15448, 13944,14256, 13952,15392,
+   13960,15520, 13968,15400, 13976,14768, 13984,15408, 13992,15528,
+   14000,14552, 14008,15280, 14016,15456, 14024,15584, 14032,15464,
+   14040,15792, 14048,15472, 14056,15592, 14064,14808, 14072,16304,
+   14080,15616, 14088,15744, 14096,15624, 14104,15752, 14112,15632,
+   14120,15760, 14128,15640, 14136,15768, 14144,15680, 14152,15808,
+   14160,15688, 14168,15816, 14176,15696, 14184,15824, 14192,15704,
+   14200,14320, 14208,15648, 14216,15776, 14224,15656, 14232,14832,
+   14240,15664, 14248,15784, 14256,15576, 14264,15344, 14272,15712,
+   14280,15840, 14288,15720, 14296,15856, 14304,15728, 14312,15848,
+   14320,15832, 14328,16368, 14392,14488, 14400,14592, 14408,14600,
+   14416,14608, 14424,14616, 14432,14624, 14440,14632, 14448,14640,
+   14456,15512, 14504,14512, 14520,14904, 14528,14720, 14536,14728,
+   14544,14736, 14552,15416, 14560,14752, 14568,14576, 14584,15928,
+   14576,14760, 14592,15360, 14600,15368, 14608,15376, 14616,15384,
+   14624,15392, 14632,15400, 14640,15408, 14648,15416, 14656,15616,
+   14664,15624, 14672,15632, 14680,15640, 14688,15648, 14696,15656,
+   14704,15664, 14712,15576, 14720,15488, 14728,15496, 14736,15504,
+   14744,15512, 14752,15520, 14760,14768, 14776,14968, 14768,15528,
+   14784,15744, 14792,15752, 14800,15760, 14808,15480, 14816,15776,
+   14824,14832, 14840,15992, 14832,15784, 14856,14864, 14864,14880,
+   14872,14896, 14880,14976, 14888,14992, 14896,15008, 14904,15024,
+   14912,15104, 14920,15120, 14928,15136, 14936,15152, 14944,15232,
+   14952,15248, 14960,15264, 14968,15280, 14984,15008, 15000,15024,
+   15016,15024, 15040,15112, 15048,15128, 15056,15144, 15064,15544,
+   15072,15240, 15080,15256, 15088,15272, 15096,16056, 15104,15872,
+   15112,15888, 15120,15904, 15128,15920, 15136,16000, 15144,16016,
+   15152,16032, 15160,16048, 15168,16128, 15176,16144, 15184,16160,
+   15192,16176, 15200,16256, 15208,16272, 15216,16288, 15224,16304,
+   15232,15880, 15240,15896, 15248,15912, 15256,15928, 15264,16008,
+   15272,16024, 15280,16040, 15288,16056, 15296,16136, 15304,16152,
+   15312,16168, 15320,15608, 15328,16264, 15336,16280, 15344,16296,
+   15352,16120, 15416,15512, 15424,15616, 15432,15624, 15440,15632,
+   15448,15640, 15456,15648, 15464,15656, 15472,15664, 15480,15768,
+   15528,15536, 15544,16048, 15552,15744, 15560,15752, 15568,15760,
+   15576,15672, 15584,15776, 15592,15600, 15600,15784, 15608,16184,
+   15672,15768, 15736,15832, 15784,15792, 15800,16304, 15848,15856,
+   15880,16000, 15864,16248, 15888,16000, 15896,16008, 15904,16000,
+   15912,16016, 15920,16008, 15928,16024, 15936,16128, 15944,16160,
+   15952,16256, 15960,16288, 15968,16136, 15976,16168, 15984,16264,
+   15992,16296, 16008,16032, 16024,16040, 16064,16144, 16040,16048,
+   16072,16176, 16080,16272, 16088,16304, 16096,16152, 16104,16184,
+   16112,16280, 16136,16256, 16120,16312, 16144,16256, 16152,16264,
+   16160,16256, 16168,16272, 16176,16264, 16184,16280, 16200,16208,
+   16208,16224, 16216,16240, 16224,16320, 16232,16336, 16240,16352,
+   16248,16368, 16264,16288, 16280,16296, 16296,16304, 16344,16368,
+   16328,16352, 16360,16368
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
+
+const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE_4096_TABLE_LENGTH] =
+{
+   /* radix 8, size 4032 */
+   8,4096, 16,8192, 24,12288, 32,16384, 40,20480, 48,24576, 56,28672, 64,512,
+   72,4608, 80,8704, 88,12800, 96,16896, 104,20992, 112,25088, 120,29184,
+   128,1024, 136,5120, 144,9216, 152,13312, 160,17408, 168,21504, 176,25600,
+   184,29696, 192,1536, 200,5632, 208,9728, 216,13824, 224,17920, 232,22016,
+   240,26112, 248,30208, 256,2048, 264,6144, 272,10240, 280,14336, 288,18432,
+   296,22528, 304,26624, 312,30720, 320,2560, 328,6656, 336,10752, 344,14848,
+   352,18944, 360,23040, 368,27136, 376,31232, 384,3072, 392,7168, 400,11264,
+   408,15360, 416,19456, 424,23552, 432,27648, 440,31744, 448,3584, 456,7680,
+   464,11776, 472,15872, 480,19968, 488,24064, 496,28160, 504,32256, 520,4160,
+   528,8256, 536,12352, 544,16448, 552,20544, 560,24640, 568,28736, 584,4672,
+   592,8768, 600,12864, 608,16960, 616,21056, 624,25152, 632,29248, 640,1088,
+   648,5184, 656,9280, 664,13376, 672,17472, 680,21568, 688,25664, 696,29760,
+   704,1600, 712,5696, 720,9792, 728,13888, 736,17984, 744,22080, 752,26176,
+   760,30272, 768,2112, 776,6208, 784,10304, 792,14400, 800,18496, 808,22592,
+   816,26688, 824,30784, 832,2624, 840,6720, 848,10816, 856,14912, 864,19008,
+   872,23104, 880,27200, 888,31296, 896,3136, 904,7232, 912,11328, 920,15424,
+   928,19520, 936,23616, 944,27712, 952,31808, 960,3648, 968,7744, 976,11840,
+   984,15936, 992,20032, 1000,24128, 1008,28224, 1016,32320, 1032,4224,
+   1040,8320, 1048,12416, 1056,16512, 1064,20608, 1072,24704, 1080,28800,
+   1096,4736, 1104,8832, 1112,12928, 1120,17024, 1128,21120, 1136,25216,
+   1144,29312, 1160,5248, 1168,9344, 1176,13440, 1184,17536, 1192,21632,
+   1200,25728, 1208,29824, 1216,1664, 1224,5760, 1232,9856, 1240,13952,
+   1248,18048, 1256,22144, 1264,26240, 1272,30336, 1280,2176, 1288,6272,
+   1296,10368, 1304,14464, 1312,18560, 1320,22656, 1328,26752, 1336,30848,
+   1344,2688, 1352,6784, 1360,10880, 1368,14976, 1376,19072, 1384,23168,
+   1392,27264, 1400,31360, 1408,3200, 1416,7296, 1424,11392, 1432,15488,
+   1440,19584, 1448,23680, 1456,27776, 1464,31872, 1472,3712, 1480,7808,
+   1488,11904, 1496,16000, 1504,20096, 1512,24192, 1520,28288, 1528,32384,
+   1544,4288, 1552,8384, 1560,12480, 1568,16576, 1576,20672, 1584,24768,
+   1592,28864, 1608,4800, 1616,8896, 1624,12992, 1632,17088, 1640,21184,
+   1648,25280, 1656,29376, 1672,5312, 1680,9408, 1688,13504, 1696,17600,
+   1704,21696, 1712,25792, 1720,29888, 1736,5824, 1744,9920, 1752,14016,
+   1760,18112, 1768,22208, 1776,26304, 1784,30400, 1792,2240, 1800,6336,
+   1808,10432, 1816,14528, 1824,18624, 1832,22720, 1840,26816, 1848,30912,
+   1856,2752, 1864,6848, 1872,10944, 1880,15040, 1888,19136, 1896,23232,
+   1904,27328, 1912,31424, 1920,3264, 1928,7360, 1936,11456, 1944,15552,
+   1952,19648, 1960,23744, 1968,27840, 1976,31936, 1984,3776, 1992,7872,
+   2000,11968, 2008,16064, 2016,20160, 2024,24256, 2032,28352, 2040,32448,
+   2056,4352, 2064,8448, 2072,12544, 2080,16640, 2088,20736, 2096,24832,
+   2104,28928, 2120,4864, 2128,8960, 2136,13056, 2144,17152, 2152,21248,
+   2160,25344, 2168,29440, 2184,5376, 2192,9472, 2200,13568, 2208,17664,
+   2216,21760, 2224,25856, 2232,29952, 2248,5888, 2256,9984, 2264,14080,
+   2272,18176, 2280,22272, 2288,26368, 2296,30464, 2312,6400, 2320,10496,
+   2328,14592, 2336,18688, 2344,22784, 2352,26880, 2360,30976, 2368,2816,
+   2376,6912, 2384,11008, 2392,15104, 2400,19200, 2408,23296, 2416,27392,
+   2424,31488, 2432,3328, 2440,7424, 2448,11520, 2456,15616, 2464,19712,
+   2472,23808, 2480,27904, 2488,32000, 2496,3840, 2504,7936, 2512,12032,
+   2520,16128, 2528,20224, 2536,24320, 2544,28416, 2552,32512, 2568,4416,
+   2576,8512, 2584,12608, 2592,16704, 2600,20800, 2608,24896, 2616,28992,
+   2632,4928, 2640,9024, 2648,13120, 2656,17216, 2664,21312, 2672,25408,
+   2680,29504, 2696,5440, 2704,9536, 2712,13632, 2720,17728, 2728,21824,
+   2736,25920, 2744,30016, 2760,5952, 2768,10048, 2776,14144, 2784,18240,
+   2792,22336, 2800,26432, 2808,30528, 2824,6464, 2832,10560, 2840,14656,
+   2848,18752, 2856,22848, 2864,26944, 2872,31040, 2888,6976, 2896,11072,
+   2904,15168, 2912,19264, 2920,23360, 2928,27456, 2936,31552, 2944,3392,
+   2952,7488, 2960,11584, 2968,15680, 2976,19776, 2984,23872, 2992,27968,
+   3000,32064, 3008,3904, 3016,8000, 3024,12096, 3032,16192, 3040,20288,
+   3048,24384, 3056,28480, 3064,32576, 3080,4480, 3088,8576, 3096,12672,
+   3104,16768, 3112,20864, 3120,24960, 3128,29056, 3144,4992, 3152,9088,
+   3160,13184, 3168,17280, 3176,21376, 3184,25472, 3192,29568, 3208,5504,
+   3216,9600, 3224,13696, 3232,17792, 3240,21888, 3248,25984, 3256,30080,
+   3272,6016, 3280,10112, 3288,14208, 3296,18304, 3304,22400, 3312,26496,
+   3320,30592, 3336,6528, 3344,10624, 3352,14720, 3360,18816, 3368,22912,
+   3376,27008, 3384,31104, 3400,7040, 3408,11136, 3416,15232, 3424,19328,
+   3432,23424, 3440,27520, 3448,31616, 3464,7552, 3472,11648, 3480,15744,
+   3488,19840, 3496,23936, 3504,28032, 3512,32128, 3520,3968, 3528,8064,
+   3536,12160, 3544,16256, 3552,20352, 3560,24448, 3568,28544, 3576,32640,
+   3592,4544, 3600,8640, 3608,12736, 3616,16832, 3624,20928, 3632,25024,
+   3640,29120, 3656,5056, 3664,9152, 3672,13248, 3680,17344, 3688,21440,
+   3696,25536, 3704,29632, 3720,5568, 3728,9664, 3736,13760, 3744,17856,
+   3752,21952, 3760,26048, 3768,30144, 3784,6080, 3792,10176, 3800,14272,
+   3808,18368, 3816,22464, 3824,26560, 3832,30656, 3848,6592, 3856,10688,
+   3864,14784, 3872,18880, 3880,22976, 3888,27072, 3896,31168, 3912,7104,
+   3920,11200, 3928,15296, 3936,19392, 3944,23488, 3952,27584, 3960,31680,
+   3976,7616, 3984,11712, 3992,15808, 4000,19904, 4008,24000, 4016,28096,
+   4024,32192, 4040,8128, 4048,12224, 4056,16320, 4064,20416, 4072,24512,
+   4080,28608, 4088,32704, 4112,8200, 4120,12296, 4128,16392, 4136,20488,
+   4144,24584, 4152,28680, 4168,4616, 4176,8712, 4184,12808, 4192,16904,
+   4200,21000, 4208,25096, 4216,29192, 4232,5128, 4240,9224, 4248,13320,
+   4256,17416, 4264,21512, 4272,25608, 4280,29704, 4296,5640, 4304,9736,
+   4312,13832, 4320,17928, 4328,22024, 4336,26120, 4344,30216, 4360,6152,
+   4368,10248, 4376,14344, 4384,18440, 4392,22536, 4400,26632, 4408,30728,
+   4424,6664, 4432,10760, 4440,14856, 4448,18952, 4456,23048, 4464,27144,
+   4472,31240, 4488,7176, 4496,11272, 4504,15368, 4512,19464, 4520,23560,
+   4528,27656, 4536,31752, 4552,7688, 4560,11784, 4568,15880, 4576,19976,
+   4584,24072, 4592,28168, 4600,32264, 4624,8264, 4632,12360, 4640,16456,
+   4648,20552, 4656,24648, 4664,28744, 4688,8776, 4696,12872, 4704,16968,
+   4712,21064, 4720,25160, 4728,29256, 4744,5192, 4752,9288, 4760,13384,
+   4768,17480, 4776,21576, 4784,25672, 4792,29768, 4808,5704, 4816,9800,
+   4824,13896, 4832,17992, 4840,22088, 4848,26184, 4856,30280, 4872,6216,
+   4880,10312, 4888,14408, 4896,18504, 4904,22600, 4912,26696, 4920,30792,
+   4936,6728, 4944,10824, 4952,14920, 4960,19016, 4968,23112, 4976,27208,
+   4984,31304, 5000,7240, 5008,11336, 5016,15432, 5024,19528, 5032,23624,
+   5040,27720, 5048,31816, 5064,7752, 5072,11848, 5080,15944, 5088,20040,
+   5096,24136, 5104,28232, 5112,32328, 5136,8328, 5144,12424, 5152,16520,
+   5160,20616, 5168,24712, 5176,28808, 5200,8840, 5208,12936, 5216,17032,
+   5224,21128, 5232,25224, 5240,29320, 5264,9352, 5272,13448, 5280,17544,
+   5288,21640, 5296,25736, 5304,29832, 5320,5768, 5328,9864, 5336,13960,
+   5344,18056, 5352,22152, 5360,26248, 5368,30344, 5384,6280, 5392,10376,
+   5400,14472, 5408,18568, 5416,22664, 5424,26760, 5432,30856, 5448,6792,
+   5456,10888, 5464,14984, 5472,19080, 5480,23176, 5488,27272, 5496,31368,
+   5512,7304, 5520,11400, 5528,15496, 5536,19592, 5544,23688, 5552,27784,
+   5560,31880, 5576,7816, 5584,11912, 5592,16008, 5600,20104, 5608,24200,
+   5616,28296, 5624,32392, 5648,8392, 5656,12488, 5664,16584, 5672,20680,
+   5680,24776, 5688,28872, 5712,8904, 5720,13000, 5728,17096, 5736,21192,
+   5744,25288, 5752,29384, 5776,9416, 5784,13512, 5792,17608, 5800,21704,
+   5808,25800, 5816,29896, 5840,9928, 5848,14024, 5856,18120, 5864,22216,
+   5872,26312, 5880,30408, 5896,6344, 5904,10440, 5912,14536, 5920,18632,
+   5928,22728, 5936,26824, 5944,30920, 5960,6856, 5968,10952, 5976,15048,
+   5984,19144, 5992,23240, 6000,27336, 6008,31432, 6024,7368, 6032,11464,
+   6040,15560, 6048,19656, 6056,23752, 6064,27848, 6072,31944, 6088,7880,
+   6096,11976, 6104,16072, 6112,20168, 6120,24264, 6128,28360, 6136,32456,
+   6160,8456, 6168,12552, 6176,16648, 6184,20744, 6192,24840, 6200,28936,
+   6224,8968, 6232,13064, 6240,17160, 6248,21256, 6256,25352, 6264,29448,
+   6288,9480, 6296,13576, 6304,17672, 6312,21768, 6320,25864, 6328,29960,
+   6352,9992, 6360,14088, 6368,18184, 6376,22280, 6384,26376, 6392,30472,
+   6416,10504, 6424,14600, 6432,18696, 6440,22792, 6448,26888, 6456,30984,
+   6472,6920, 6480,11016, 6488,15112, 6496,19208, 6504,23304, 6512,27400,
+   6520,31496, 6536,7432, 6544,11528, 6552,15624, 6560,19720, 6568,23816,
+   6576,27912, 6584,32008, 6600,7944, 6608,12040, 6616,16136, 6624,20232,
+   6632,24328, 6640,28424, 6648,32520, 6672,8520, 6680,12616, 6688,16712,
+   6696,20808, 6704,24904, 6712,29000, 6736,9032, 6744,13128, 6752,17224,
+   6760,21320, 6768,25416, 6776,29512, 6800,9544, 6808,13640, 6816,17736,
+   6824,21832, 6832,25928, 6840,30024, 6864,10056, 6872,14152, 6880,18248,
+   6888,22344, 6896,26440, 6904,30536, 6928,10568, 6936,14664, 6944,18760,
+   6952,22856, 6960,26952, 6968,31048, 6992,11080, 7000,15176, 7008,19272,
+   7016,23368, 7024,27464, 7032,31560, 7048,7496, 7056,11592, 7064,15688,
+   7072,19784, 7080,23880, 7088,27976, 7096,32072, 7112,8008, 7120,12104,
+   7128,16200, 7136,20296, 7144,24392, 7152,28488, 7160,32584, 7184,8584,
+   7192,12680, 7200,16776, 7208,20872, 7216,24968, 7224,29064, 7248,9096,
+   7256,13192, 7264,17288, 7272,21384, 7280,25480, 7288,29576, 7312,9608,
+   7320,13704, 7328,17800, 7336,21896, 7344,25992, 7352,30088, 7376,10120,
+   7384,14216, 7392,18312, 7400,22408, 7408,26504, 7416,30600, 7440,10632,
+   7448,14728, 7456,18824, 7464,22920, 7472,27016, 7480,31112, 7504,11144,
+   7512,15240, 7520,19336, 7528,23432, 7536,27528, 7544,31624, 7568,11656,
+   7576,15752, 7584,19848, 7592,23944, 7600,28040, 7608,32136, 7624,8072,
+   7632,12168, 7640,16264, 7648,20360, 7656,24456, 7664,28552, 7672,32648,
+   7696,8648, 7704,12744, 7712,16840, 7720,20936, 7728,25032, 7736,29128,
+   7760,9160, 7768,13256, 7776,17352, 7784,21448, 7792,25544, 7800,29640,
+   7824,9672, 7832,13768, 7840,17864, 7848,21960, 7856,26056, 7864,30152,
+   7888,10184, 7896,14280, 7904,18376, 7912,22472, 7920,26568, 7928,30664,
+   7952,10696, 7960,14792, 7968,18888, 7976,22984, 7984,27080, 7992,31176,
+   8016,11208, 8024,15304, 8032,19400, 8040,23496, 8048,27592, 8056,31688,
+   8080,11720, 8088,15816, 8096,19912, 8104,24008, 8112,28104, 8120,32200,
+   8144,12232, 8152,16328, 8160,20424, 8168,24520, 8176,28616, 8184,32712,
+   8216,12304, 8224,16400, 8232,20496, 8240,24592, 8248,28688, 8272,8720,
+   8280,12816, 8288,16912, 8296,21008, 8304,25104, 8312,29200, 8336,9232,
+   8344,13328, 8352,17424, 8360,21520, 8368,25616, 8376,29712, 8400,9744,
+   8408,13840, 8416,17936, 8424,22032, 8432,26128, 8440,30224, 8464,10256,
+   8472,14352, 8480,18448, 8488,22544, 8496,26640, 8504,30736, 8528,10768,
+   8536,14864, 8544,18960, 8552,23056, 8560,27152, 8568,31248, 8592,11280,
+   8600,15376, 8608,19472, 8616,23568, 8624,27664, 8632,31760, 8656,11792,
+   8664,15888, 8672,19984, 8680,24080, 8688,28176, 8696,32272, 8728,12368,
+   8736,16464, 8744,20560, 8752,24656, 8760,28752, 8792,12880, 8800,16976,
+   8808,21072, 8816,25168, 8824,29264, 8848,9296, 8856,13392, 8864,17488,
+   8872,21584, 8880,25680, 8888,29776, 8912,9808, 8920,13904, 8928,18000,
+   8936,22096, 8944,26192, 8952,30288, 8976,10320, 8984,14416, 8992,18512,
+   9000,22608, 9008,26704, 9016,30800, 9040,10832, 9048,14928, 9056,19024,
+   9064,23120, 9072,27216, 9080,31312, 9104,11344, 9112,15440, 9120,19536,
+   9128,23632, 9136,27728, 9144,31824, 9168,11856, 9176,15952, 9184,20048,
+   9192,24144, 9200,28240, 9208,32336, 9240,12432, 9248,16528, 9256,20624,
+   9264,24720, 9272,28816, 9304,12944, 9312,17040, 9320,21136, 9328,25232,
+   9336,29328, 9368,13456, 9376,17552, 9384,21648, 9392,25744, 9400,29840,
+   9424,9872, 9432,13968, 9440,18064, 9448,22160, 9456,26256, 9464,30352,
+   9488,10384, 9496,14480, 9504,18576, 9512,22672, 9520,26768, 9528,30864,
+   9552,10896, 9560,14992, 9568,19088, 9576,23184, 9584,27280, 9592,31376,
+   9616,11408, 9624,15504, 9632,19600, 9640,23696, 9648,27792, 9656,31888,
+   9680,11920, 9688,16016, 9696,20112, 9704,24208, 9712,28304, 9720,32400,
+   9752,12496, 9760,16592, 9768,20688, 9776,24784, 9784,28880, 9816,13008,
+   9824,17104, 9832,21200, 9840,25296, 9848,29392, 9880,13520, 9888,17616,
+   9896,21712, 9904,25808, 9912,29904, 9944,14032, 9952,18128, 9960,22224,
+   9968,26320, 9976,30416, 10000,10448, 10008,14544, 10016,18640, 10024,22736,
+   10032,26832, 10040,30928, 10064,10960, 10072,15056, 10080,19152,
+   10088,23248, 10096,27344, 10104,31440, 10128,11472, 10136,15568,
+   10144,19664, 10152,23760, 10160,27856, 10168,31952, 10192,11984,
+   10200,16080, 10208,20176, 10216,24272, 10224,28368, 10232,32464,
+   10264,12560, 10272,16656, 10280,20752, 10288,24848, 10296,28944,
+   10328,13072, 10336,17168, 10344,21264, 10352,25360, 10360,29456,
+   10392,13584, 10400,17680, 10408,21776, 10416,25872, 10424,29968,
+   10456,14096, 10464,18192, 10472,22288, 10480,26384, 10488,30480,
+   10520,14608, 10528,18704, 10536,22800, 10544,26896, 10552,30992,
+   10576,11024, 10584,15120, 10592,19216, 10600,23312, 10608,27408,
+   10616,31504, 10640,11536, 10648,15632, 10656,19728, 10664,23824,
+   10672,27920, 10680,32016, 10704,12048, 10712,16144, 10720,20240,
+   10728,24336, 10736,28432, 10744,32528, 10776,12624, 10784,16720,
+   10792,20816, 10800,24912, 10808,29008, 10840,13136, 10848,17232,
+   10856,21328, 10864,25424, 10872,29520, 10904,13648, 10912,17744,
+   10920,21840, 10928,25936, 10936,30032, 10968,14160, 10976,18256,
+   10984,22352, 10992,26448, 11000,30544, 11032,14672, 11040,18768,
+   11048,22864, 11056,26960, 11064,31056, 11096,15184, 11104,19280,
+   11112,23376, 11120,27472, 11128,31568, 11152,11600, 11160,15696,
+   11168,19792, 11176,23888, 11184,27984, 11192,32080, 11216,12112,
+   11224,16208, 11232,20304, 11240,24400, 11248,28496, 11256,32592,
+   11288,12688, 11296,16784, 11304,20880, 11312,24976, 11320,29072,
+   11352,13200, 11360,17296, 11368,21392, 11376,25488, 11384,29584,
+   11416,13712, 11424,17808, 11432,21904, 11440,26000, 11448,30096,
+   11480,14224, 11488,18320, 11496,22416, 11504,26512, 11512,30608,
+   11544,14736, 11552,18832, 11560,22928, 11568,27024, 11576,31120,
+   11608,15248, 11616,19344, 11624,23440, 11632,27536, 11640,31632,
+   11672,15760, 11680,19856, 11688,23952, 11696,28048, 11704,32144,
+   11728,12176, 11736,16272, 11744,20368, 11752,24464, 11760,28560,
+   11768,32656, 11800,12752, 11808,16848, 11816,20944, 11824,25040,
+   11832,29136, 11864,13264, 11872,17360, 11880,21456, 11888,25552,
+   11896,29648, 11928,13776, 11936,17872, 11944,21968, 11952,26064,
+   11960,30160, 11992,14288, 12000,18384, 12008,22480, 12016,26576,
+   12024,30672, 12056,14800, 12064,18896, 12072,22992, 12080,27088,
+   12088,31184, 12120,15312, 12128,19408, 12136,23504, 12144,27600,
+   12152,31696, 12184,15824, 12192,19920, 12200,24016, 12208,28112,
+   12216,32208, 12248,16336, 12256,20432, 12264,24528, 12272,28624,
+   12280,32720, 12320,16408, 12328,20504, 12336,24600, 12344,28696,
+   12376,12824, 12384,16920, 12392,21016, 12400,25112, 12408,29208,
+   12440,13336, 12448,17432, 12456,21528, 12464,25624, 12472,29720,
+   12504,13848, 12512,17944, 12520,22040, 12528,26136, 12536,30232,
+   12568,14360, 12576,18456, 12584,22552, 12592,26648, 12600,30744,
+   12632,14872, 12640,18968, 12648,23064, 12656,27160, 12664,31256,
+   12696,15384, 12704,19480, 12712,23576, 12720,27672, 12728,31768,
+   12760,15896, 12768,19992, 12776,24088, 12784,28184, 12792,32280,
+   12832,16472, 12840,20568, 12848,24664, 12856,28760, 12896,16984,
+   12904,21080, 12912,25176, 12920,29272, 12952,13400, 12960,17496,
+   12968,21592, 12976,25688, 12984,29784, 13016,13912, 13024,18008,
+   13032,22104, 13040,26200, 13048,30296, 13080,14424, 13088,18520,
+   13096,22616, 13104,26712, 13112,30808, 13144,14936, 13152,19032,
+   13160,23128, 13168,27224, 13176,31320, 13208,15448, 13216,19544,
+   13224,23640, 13232,27736, 13240,31832, 13272,15960, 13280,20056,
+   13288,24152, 13296,28248, 13304,32344, 13344,16536, 13352,20632,
+   13360,24728, 13368,28824, 13408,17048, 13416,21144, 13424,25240,
+   13432,29336, 13472,17560, 13480,21656, 13488,25752, 13496,29848,
+   13528,13976, 13536,18072, 13544,22168, 13552,26264, 13560,30360,
+   13592,14488, 13600,18584, 13608,22680, 13616,26776, 13624,30872,
+   13656,15000, 13664,19096, 13672,23192, 13680,27288, 13688,31384,
+   13720,15512, 13728,19608, 13736,23704, 13744,27800, 13752,31896,
+   13784,16024, 13792,20120, 13800,24216, 13808,28312, 13816,32408,
+   13856,16600, 13864,20696, 13872,24792, 13880,28888, 13920,17112,
+   13928,21208, 13936,25304, 13944,29400, 13984,17624, 13992,21720,
+   14000,25816, 14008,29912, 14048,18136, 14056,22232, 14064,26328,
+   14072,30424, 14104,14552, 14112,18648, 14120,22744, 14128,26840,
+   14136,30936, 14168,15064, 14176,19160, 14184,23256, 14192,27352,
+   14200,31448, 14232,15576, 14240,19672, 14248,23768, 14256,27864,
+   14264,31960, 14296,16088, 14304,20184, 14312,24280, 14320,28376,
+   14328,32472, 14368,16664, 14376,20760, 14384,24856, 14392,28952,
+   14432,17176, 14440,21272, 14448,25368, 14456,29464, 14496,17688,
+   14504,21784, 14512,25880, 14520,29976, 14560,18200, 14568,22296,
+   14576,26392, 14584,30488, 14624,18712, 14632,22808, 14640,26904,
+   14648,31000, 14680,15128, 14688,19224, 14696,23320, 14704,27416,
+   14712,31512, 14744,15640, 14752,19736, 14760,23832, 14768,27928,
+   14776,32024, 14808,16152, 14816,20248, 14824,24344, 14832,28440,
+   14840,32536, 14880,16728, 14888,20824, 14896,24920, 14904,29016,
+   14944,17240, 14952,21336, 14960,25432, 14968,29528, 15008,17752,
+   15016,21848, 15024,25944, 15032,30040, 15072,18264, 15080,22360,
+   15088,26456, 15096,30552, 15136,18776, 15144,22872, 15152,26968,
+   15160,31064, 15200,19288, 15208,23384, 15216,27480, 15224,31576,
+   15256,15704, 15264,19800, 15272,23896, 15280,27992, 15288,32088,
+   15320,16216, 15328,20312, 15336,24408, 15344,28504, 15352,32600,
+   15392,16792, 15400,20888, 15408,24984, 15416,29080, 15456,17304,
+   15464,21400, 15472,25496, 15480,29592, 15520,17816, 15528,21912,
+   15536,26008, 15544,30104, 15584,18328, 15592,22424, 15600,26520,
+   15608,30616, 15648,18840, 15656,22936, 15664,27032, 15672,31128,
+   15712,19352, 15720,23448, 15728,27544, 15736,31640, 15776,19864,
+   15784,23960, 15792,28056, 15800,32152, 15832,16280, 15840,20376,
+   15848,24472, 15856,28568, 15864,32664, 15904,16856, 15912,20952,
+   15920,25048, 15928,29144, 15968,17368, 15976,21464, 15984,25560,
+   15992,29656, 16032,17880, 16040,21976, 16048,26072, 16056,30168,
+   16096,18392, 16104,22488, 16112,26584, 16120,30680, 16160,18904,
+   16168,23000, 16176,27096, 16184,31192, 16224,19416, 16232,23512,
+   16240,27608, 16248,31704, 16288,19928, 16296,24024, 16304,28120,
+   16312,32216, 16352,20440, 16360,24536, 16368,28632, 16376,32728,
+   16424,20512, 16432,24608, 16440,28704, 16480,16928, 16488,21024,
+   16496,25120, 16504,29216, 16544,17440, 16552,21536, 16560,25632,
+   16568,29728, 16608,17952, 16616,22048, 16624,26144, 16632,30240,
+   16672,18464, 16680,22560, 16688,26656, 16696,30752, 16736,18976,
+   16744,23072, 16752,27168, 16760,31264, 16800,19488, 16808,23584,
+   16816,27680, 16824,31776, 16864,20000, 16872,24096, 16880,28192,
+   16888,32288, 16936,20576, 16944,24672, 16952,28768, 17000,21088,
+   17008,25184, 17016,29280, 17056,17504, 17064,21600, 17072,25696,
+   17080,29792, 17120,18016, 17128,22112, 17136,26208, 17144,30304,
+   17184,18528, 17192,22624, 17200,26720, 17208,30816, 17248,19040,
+   17256,23136, 17264,27232, 17272,31328, 17312,19552, 17320,23648,
+   17328,27744, 17336,31840, 17376,20064, 17384,24160, 17392,28256,
+   17400,32352, 17448,20640, 17456,24736, 17464,28832, 17512,21152,
+   17520,25248, 17528,29344, 17576,21664, 17584,25760, 17592,29856,
+   17632,18080, 17640,22176, 17648,26272, 17656,30368, 17696,18592,
+   17704,22688, 17712,26784, 17720,30880, 17760,19104, 17768,23200,
+   17776,27296, 17784,31392, 17824,19616, 17832,23712, 17840,27808,
+   17848,31904, 17888,20128, 17896,24224, 17904,28320, 17912,32416,
+   17960,20704, 17968,24800, 17976,28896, 18024,21216, 18032,25312,
+   18040,29408, 18088,21728, 18096,25824, 18104,29920, 18152,22240,
+   18160,26336, 18168,30432, 18208,18656, 18216,22752, 18224,26848,
+   18232,30944, 18272,19168, 18280,23264, 18288,27360, 18296,31456,
+   18336,19680, 18344,23776, 18352,27872, 18360,31968, 18400,20192,
+   18408,24288, 18416,28384, 18424,32480, 18472,20768, 18480,24864,
+   18488,28960, 18536,21280, 18544,25376, 18552,29472, 18600,21792,
+   18608,25888, 18616,29984, 18664,22304, 18672,26400, 18680,30496,
+   18728,22816, 18736,26912, 18744,31008, 18784,19232, 18792,23328,
+   18800,27424, 18808,31520, 18848,19744, 18856,23840, 18864,27936,
+   18872,32032, 18912,20256, 18920,24352, 18928,28448, 18936,32544,
+   18984,20832, 18992,24928, 19000,29024, 19048,21344, 19056,25440,
+   19064,29536, 19112,21856, 19120,25952, 19128,30048, 19176,22368,
+   19184,26464, 19192,30560, 19240,22880, 19248,26976, 19256,31072,
+   19304,23392, 19312,27488, 19320,31584, 19360,19808, 19368,23904,
+   19376,28000, 19384,32096, 19424,20320, 19432,24416, 19440,28512,
+   19448,32608, 19496,20896, 19504,24992, 19512,29088, 19560,21408,
+   19568,25504, 19576,29600, 19624,21920, 19632,26016, 19640,30112,
+   19688,22432, 19696,26528, 19704,30624, 19752,22944, 19760,27040,
+   19768,31136, 19816,23456, 19824,27552, 19832,31648, 19880,23968,
+   19888,28064, 19896,32160, 19936,20384, 19944,24480, 19952,28576,
+   19960,32672, 20008,20960, 20016,25056, 20024,29152, 20072,21472,
+   20080,25568, 20088,29664, 20136,21984, 20144,26080, 20152,30176,
+   20200,22496, 20208,26592, 20216,30688, 20264,23008, 20272,27104,
+   20280,31200, 20328,23520, 20336,27616, 20344,31712, 20392,24032,
+   20400,28128, 20408,32224, 20456,24544, 20464,28640, 20472,32736,
+   20528,24616, 20536,28712, 20584,21032, 20592,25128, 20600,29224,
+   20648,21544, 20656,25640, 20664,29736, 20712,22056, 20720,26152,
+   20728,30248, 20776,22568, 20784,26664, 20792,30760, 20840,23080,
+   20848,27176, 20856,31272, 20904,23592, 20912,27688, 20920,31784,
+   20968,24104, 20976,28200, 20984,32296, 21040,24680, 21048,28776,
+   21104,25192, 21112,29288, 21160,21608, 21168,25704, 21176,29800,
+   21224,22120, 21232,26216, 21240,30312, 21288,22632, 21296,26728,
+   21304,30824, 21352,23144, 21360,27240, 21368,31336, 21416,23656,
+   21424,27752, 21432,31848, 21480,24168, 21488,28264, 21496,32360,
+   21552,24744, 21560,28840, 21616,25256, 21624,29352, 21680,25768,
+   21688,29864, 21736,22184, 21744,26280, 21752,30376, 21800,22696,
+   21808,26792, 21816,30888, 21864,23208, 21872,27304, 21880,31400,
+   21928,23720, 21936,27816, 21944,31912, 21992,24232, 22000,28328,
+   22008,32424, 22064,24808, 22072,28904, 22128,25320, 22136,29416,
+   22192,25832, 22200,29928, 22256,26344, 22264,30440, 22312,22760,
+   22320,26856, 22328,30952, 22376,23272, 22384,27368, 22392,31464,
+   22440,23784, 22448,27880, 22456,31976, 22504,24296, 22512,28392,
+   22520,32488, 22576,24872, 22584,28968, 22640,25384, 22648,29480,
+   22704,25896, 22712,29992, 22768,26408, 22776,30504, 22832,26920,
+   22840,31016, 22888,23336, 22896,27432, 22904,31528, 22952,23848,
+   22960,27944, 22968,32040, 23016,24360, 23024,28456, 23032,32552,
+   23088,24936, 23096,29032, 23152,25448, 23160,29544, 23216,25960,
+   23224,30056, 23280,26472, 23288,30568, 23344,26984, 23352,31080,
+   23408,27496, 23416,31592, 23464,23912, 23472,28008, 23480,32104,
+   23528,24424, 23536,28520, 23544,32616, 23600,25000, 23608,29096,
+   23664,25512, 23672,29608, 23728,26024, 23736,30120, 23792,26536,
+   23800,30632, 23856,27048, 23864,31144, 23920,27560, 23928,31656,
+   23984,28072, 23992,32168, 24040,24488, 24048,28584, 24056,32680,
+   24112,25064, 24120,29160, 24176,25576, 24184,29672, 24240,26088,
+   24248,30184, 24304,26600, 24312,30696, 24368,27112, 24376,31208,
+   24432,27624, 24440,31720, 24496,28136, 24504,32232, 24560,28648,
+   24568,32744, 24632,28720, 24688,25136, 24696,29232, 24752,25648,
+   24760,29744, 24816,26160, 24824,30256, 24880,26672, 24888,30768,
+   24944,27184, 24952,31280, 25008,27696, 25016,31792, 25072,28208,
+   25080,32304, 25144,28784, 25208,29296, 25264,25712, 25272,29808,
+   25328,26224, 25336,30320, 25392,26736, 25400,30832, 25456,27248,
+   25464,31344, 25520,27760, 25528,31856, 25584,28272, 25592,32368,
+   25656,28848, 25720,29360, 25784,29872, 25840,26288, 25848,30384,
+   25904,26800, 25912,30896, 25968,27312, 25976,31408, 26032,27824,
+   26040,31920, 26096,28336, 26104,32432, 26168,28912, 26232,29424,
+   26296,29936, 26360,30448, 26416,26864, 26424,30960, 26480,27376,
+   26488,31472, 26544,27888, 26552,31984, 26608,28400, 26616,32496,
+   26680,28976, 26744,29488, 26808,30000, 26872,30512, 26936,31024,
+   26992,27440, 27000,31536, 27056,27952, 27064,32048, 27120,28464,
+   27128,32560, 27192,29040, 27256,29552, 27320,30064, 27384,30576,
+   27448,31088, 27512,31600, 27568,28016, 27576,32112, 27632,28528,
+   27640,32624, 27704,29104, 27768,29616, 27832,30128, 27896,30640,
+   27960,31152, 28024,31664, 28088,32176, 28144,28592, 28152,32688,
+   28216,29168, 28280,29680, 28344,30192, 28408,30704, 28472,31216,
+   28536,31728, 28600,32240, 28664,32752, 28792,29240, 28856,29752,
+   28920,30264, 28984,30776, 29048,31288, 29112,31800, 29176,32312,
+   29368,29816, 29432,30328, 29496,30840, 29560,31352, 29624,31864,
+   29688,32376, 29944,30392, 30008,30904, 30072,31416, 30136,31928,
+   30200,32440, 30520,30968, 30584,31480, 30648,31992, 30712,32504,
+   31096,31544, 31160,32056, 31224,32568, 31672,32120, 31736,32632,
+   32248,32696
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
+
+const uint16_t armBitRevIndexTable_fixed_16[ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH] =
+{
+   /* radix 4, size 12 */
+   8,64, 16,32, 24,96, 40,80, 56,112, 88,104
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
+const uint16_t armBitRevIndexTable_fixed_32[ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH] =
+{
+   /* 4x2, size 24 */
+   8,128, 16,64, 24,192, 40,160, 48,96, 56,224, 72,144,
+   88,208, 104,176, 120,240, 152,200, 184,232
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
+const uint16_t armBitRevIndexTable_fixed_64[ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH] =
+{
+   /* radix 4, size 56 */
+   8,256, 16,128, 24,384, 32,64, 40,320, 48,192, 56,448, 72,288, 80,160, 88,416, 104,352,
+   112,224, 120,480, 136,272, 152,400, 168,336, 176,208, 184,464, 200,304, 216,432,
+   232,368, 248,496, 280,392, 296,328, 312,456, 344,424, 376,488, 440,472
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
+const uint16_t armBitRevIndexTable_fixed_128[ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH] =
+{
+   /* 4x2, size 112 */
+   8,512, 16,256, 24,768, 32,128, 40,640, 48,384, 56,896, 72,576, 80,320, 88,832, 96,192,
+   104,704, 112,448, 120,960, 136,544, 144,288, 152,800, 168,672, 176,416, 184,928, 200,608,
+   208,352, 216,864, 232,736, 240,480, 248,992, 264,528, 280,784, 296,656, 304,400, 312,912,
+   328,592, 344,848, 360,720, 368,464, 376,976, 392,560, 408,816, 424,688, 440,944, 456,624,
+   472,880, 488,752, 504,1008, 536,776, 552,648, 568,904, 600,840, 616,712, 632,968,
+   664,808, 696,936, 728,872, 760,1000, 824,920, 888,984
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
+const uint16_t armBitRevIndexTable_fixed_256[ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH] =
+{
+   /* radix 4, size 240 */
+   8,1024, 16,512, 24,1536, 32,256, 40,1280, 48,768, 56,1792, 64,128, 72,1152, 80,640,
+   88,1664, 96,384, 104,1408, 112,896, 120,1920, 136,1088, 144,576, 152,1600, 160,320,
+   168,1344, 176,832, 184,1856, 200,1216, 208,704, 216,1728, 224,448, 232,1472, 240,960,
+   248,1984, 264,1056, 272,544, 280,1568, 296,1312, 304,800, 312,1824, 328,1184, 336,672,
+   344,1696, 352,416, 360,1440, 368,928, 376,1952, 392,1120, 400,608, 408,1632, 424,1376,
+   432,864, 440,1888, 456,1248, 464,736, 472,1760, 488,1504, 496,992, 504,2016, 520,1040,
+   536,1552, 552,1296, 560,784, 568,1808, 584,1168, 592,656, 600,1680, 616,1424, 624,912,
+   632,1936, 648,1104, 664,1616, 680,1360, 688,848, 696,1872, 712,1232, 728,1744, 744,1488,
+   752,976, 760,2000, 776,1072, 792,1584, 808,1328, 824,1840, 840,1200, 856,1712, 872,1456,
+   880,944, 888,1968, 904,1136, 920,1648, 936,1392, 952,1904, 968,1264, 984,1776, 1000,1520,
+   1016,2032, 1048,1544, 1064,1288, 1080,1800, 1096,1160, 1112,1672, 1128,1416, 1144,1928,
+   1176,1608, 1192,1352, 1208,1864, 1240,1736, 1256,1480, 1272,1992, 1304,1576, 1336,1832,
+   1368,1704, 1384,1448, 1400,1960, 1432,1640, 1464,1896, 1496,1768, 1528,2024, 1592,1816,
+   1624,1688, 1656,1944, 1720,1880, 1784,2008, 1912,1976
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
+const uint16_t armBitRevIndexTable_fixed_512[ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH] =
+{
+   /* 4x2, size 480 */
+   8,2048, 16,1024, 24,3072, 32,512, 40,2560, 48,1536, 56,3584, 64,256, 72,2304, 80,1280,
+   88,3328, 96,768, 104,2816, 112,1792, 120,3840, 136,2176, 144,1152, 152,3200, 160,640,
+   168,2688, 176,1664, 184,3712, 192,384, 200,2432, 208,1408, 216,3456, 224,896, 232,2944,
+   240,1920, 248,3968, 264,2112, 272,1088, 280,3136, 288,576, 296,2624, 304,1600, 312,3648,
+   328,2368, 336,1344, 344,3392, 352,832, 360,2880, 368,1856, 376,3904, 392,2240, 400,1216,
+   408,3264, 416,704, 424,2752, 432,1728, 440,3776, 456,2496, 464,1472, 472,3520, 480,960,
+   488,3008, 496,1984, 504,4032, 520,2080, 528,1056, 536,3104, 552,2592, 560,1568, 568,3616,
+   584,2336, 592,1312, 600,3360, 608,800, 616,2848, 624,1824, 632,3872, 648,2208, 656,1184,
+   664,3232, 680,2720, 688,1696, 696,3744, 712,2464, 720,1440, 728,3488, 736,928, 744,2976,
+   752,1952, 760,4000, 776,2144, 784,1120, 792,3168, 808,2656, 816,1632, 824,3680, 840,2400,
+   848,1376, 856,3424, 872,2912, 880,1888, 888,3936, 904,2272, 912,1248, 920,3296, 936,2784,
+   944,1760, 952,3808, 968,2528, 976,1504, 984,3552, 1000,3040, 1008,2016, 1016,4064,
+   1032,2064, 1048,3088, 1064,2576, 1072,1552, 1080,3600, 1096,2320, 1104,1296, 1112,3344,
+   1128,2832, 1136,1808, 1144,3856, 1160,2192, 1176,3216, 1192,2704, 1200,1680, 1208,3728,
+   1224,2448, 1232,1424, 1240,3472, 1256,2960, 1264,1936, 1272,3984, 1288,2128, 1304,3152,
+   1320,2640, 1328,1616, 1336,3664, 1352,2384, 1368,3408, 1384,2896, 1392,1872, 1400,3920,
+   1416,2256, 1432,3280, 1448,2768, 1456,1744, 1464,3792, 1480,2512, 1496,3536, 1512,3024,
+   1520,2000, 1528,4048, 1544,2096, 1560,3120, 1576,2608, 1592,3632, 1608,2352, 1624,3376,
+   1640,2864, 1648,1840, 1656,3888, 1672,2224, 1688,3248, 1704,2736, 1720,3760, 1736,2480,
+   1752,3504, 1768,2992, 1776,1968, 1784,4016, 1800,2160, 1816,3184, 1832,2672, 1848,3696,
+   1864,2416, 1880,3440, 1896,2928, 1912,3952, 1928,2288, 1944,3312, 1960,2800, 1976,3824,
+   1992,2544, 2008,3568, 2024,3056, 2040,4080, 2072,3080, 2088,2568, 2104,3592, 2120,2312,
+   2136,3336, 2152,2824, 2168,3848, 2200,3208, 2216,2696, 2232,3720, 2248,2440, 2264,3464,
+   2280,2952, 2296,3976, 2328,3144, 2344,2632, 2360,3656, 2392,3400, 2408,2888, 2424,3912,
+   2456,3272, 2472,2760, 2488,3784, 2520,3528, 2536,3016, 2552,4040, 2584,3112, 2616,3624,
+   2648,3368, 2664,2856, 2680,3880, 2712,3240, 2744,3752, 2776,3496, 2792,2984, 2808,4008,
+   2840,3176, 2872,3688, 2904,3432, 2936,3944, 2968,3304, 3000,3816, 3032,3560, 3064,4072,
+   3128,3608, 3160,3352, 3192,3864, 3256,3736, 3288,3480, 3320,3992, 3384,3672, 3448,3928,
+   3512,3800, 3576,4056, 3704,3896, 3832,4024
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
+const uint16_t armBitRevIndexTable_fixed_1024[ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH] =
+{
+    /* radix 4, size 992 */
+    8,4096, 16,2048, 24,6144, 32,1024, 40,5120, 48,3072, 56,7168, 64,512, 72,4608,
+    80,2560, 88,6656, 96,1536, 104,5632, 112,3584, 120,7680, 128,256, 136,4352,
+    144,2304, 152,6400, 160,1280, 168,5376, 176,3328, 184,7424, 192,768, 200,4864,
+    208,2816, 216,6912, 224,1792, 232,5888, 240,3840, 248,7936, 264,4224, 272,2176,
+    280,6272, 288,1152, 296,5248, 304,3200, 312,7296, 320,640, 328,4736, 336,2688,
+    344,6784, 352,1664, 360,5760, 368,3712, 376,7808, 392,4480, 400,2432, 408,6528,
+    416,1408, 424,5504, 432,3456, 440,7552, 448,896, 456,4992, 464,2944, 472,7040,
+    480,1920, 488,6016, 496,3968, 504,8064, 520,4160, 528,2112, 536,6208, 544,1088,
+    552,5184, 560,3136, 568,7232, 584,4672, 592,2624, 600,6720, 608,1600, 616,5696,
+    624,3648, 632,7744, 648,4416, 656,2368, 664,6464, 672,1344, 680,5440, 688,3392,
+    696,7488, 704,832, 712,4928, 720,2880, 728,6976, 736,1856, 744,5952, 752,3904,
+    760,8000, 776,4288, 784,2240, 792,6336, 800,1216, 808,5312, 816,3264, 824,7360,
+    840,4800, 848,2752, 856,6848, 864,1728, 872,5824, 880,3776, 888,7872, 904,4544,
+    912,2496, 920,6592, 928,1472, 936,5568, 944,3520, 952,7616, 968,5056, 976,3008,
+    984,7104, 992,1984, 1000,6080, 1008,4032, 1016,8128, 1032,4128, 1040,2080,
+    1048,6176, 1064,5152, 1072,3104, 1080,7200, 1096,4640, 1104,2592, 1112,6688,
+    1120,1568, 1128,5664, 1136,3616, 1144,7712, 1160,4384, 1168,2336, 1176,6432,
+    1184,1312, 1192,5408, 1200,3360, 1208,7456, 1224,4896, 1232,2848, 1240,6944,
+    1248,1824, 1256,5920, 1264,3872, 1272,7968, 1288,4256, 1296,2208, 1304,6304,
+    1320,5280, 1328,3232, 1336,7328, 1352,4768, 1360,2720, 1368,6816, 1376,1696,
+    1384,5792, 1392,3744, 1400,7840, 1416,4512, 1424,2464, 1432,6560, 1448,5536,
+    1456,3488, 1464,7584, 1480,5024, 1488,2976, 1496,7072, 1504,1952, 1512,6048,
+    1520,4000, 1528,8096, 1544,4192, 1552,2144, 1560,6240, 1576,5216, 1584,3168,
+    1592,7264, 1608,4704, 1616,2656, 1624,6752, 1640,5728, 1648,3680, 1656,7776,
+    1672,4448, 1680,2400, 1688,6496, 1704,5472, 1712,3424, 1720,7520, 1736,4960,
+    1744,2912, 1752,7008, 1760,1888, 1768,5984, 1776,3936, 1784,8032, 1800,4320,
+    1808,2272, 1816,6368, 1832,5344, 1840,3296, 1848,7392, 1864,4832, 1872,2784,
+    1880,6880, 1896,5856, 1904,3808, 1912,7904, 1928,4576, 1936,2528, 1944,6624,
+    1960,5600, 1968,3552, 1976,7648, 1992,5088, 2000,3040, 2008,7136, 2024,6112,
+    2032,4064, 2040,8160, 2056,4112, 2072,6160, 2088,5136, 2096,3088, 2104,7184,
+    2120,4624, 2128,2576, 2136,6672, 2152,5648, 2160,3600, 2168,7696, 2184,4368,
+    2192,2320, 2200,6416, 2216,5392, 2224,3344, 2232,7440, 2248,4880, 2256,2832,
+    2264,6928, 2280,5904, 2288,3856, 2296,7952, 2312,4240, 2328,6288, 2344,5264,
+    2352,3216, 2360,7312, 2376,4752, 2384,2704, 2392,6800, 2408,5776, 2416,3728,
+    2424,7824, 2440,4496, 2456,6544, 2472,5520, 2480,3472, 2488,7568, 2504,5008,
+    2512,2960, 2520,7056, 2536,6032, 2544,3984, 2552,8080, 2568,4176, 2584,6224,
+    2600,5200, 2608,3152, 2616,7248, 2632,4688, 2648,6736, 2664,5712, 2672,3664,
+    2680,7760, 2696,4432, 2712,6480, 2728,5456, 2736,3408, 2744,7504, 2760,4944,
+    2768,2896, 2776,6992, 2792,5968, 2800,3920, 2808,8016, 2824,4304, 2840,6352,
+    2856,5328, 2864,3280, 2872,7376, 2888,4816, 2904,6864, 2920,5840, 2928,3792,
+    2936,7888, 2952,4560, 2968,6608, 2984,5584, 2992,3536, 3000,7632, 3016,5072,
+    3032,7120, 3048,6096, 3056,4048, 3064,8144, 3080,4144, 3096,6192, 3112,5168,
+    3128,7216, 3144,4656, 3160,6704, 3176,5680, 3184,3632, 3192,7728, 3208,4400,
+    3224,6448, 3240,5424, 3248,3376, 3256,7472, 3272,4912, 3288,6960, 3304,5936,
+    3312,3888, 3320,7984, 3336,4272, 3352,6320, 3368,5296, 3384,7344, 3400,4784,
+    3416,6832, 3432,5808, 3440,3760, 3448,7856, 3464,4528, 3480,6576, 3496,5552,
+    3512,7600, 3528,5040, 3544,7088, 3560,6064, 3568,4016, 3576,8112, 3592,4208,
+    3608,6256, 3624,5232, 3640,7280, 3656,4720, 3672,6768, 3688,5744, 3704,7792,
+    3720,4464, 3736,6512, 3752,5488, 3768,7536, 3784,4976, 3800,7024, 3816,6000,
+    3824,3952, 3832,8048, 3848,4336, 3864,6384, 3880,5360, 3896,7408, 3912,4848,
+    3928,6896, 3944,5872, 3960,7920, 3976,4592, 3992,6640, 4008,5616, 4024,7664,
+    4040,5104, 4056,7152, 4072,6128, 4088,8176, 4120,6152, 4136,5128, 4152,7176,
+    4168,4616, 4184,6664, 4200,5640, 4216,7688, 4232,4360, 4248,6408, 4264,5384,
+    4280,7432, 4296,4872, 4312,6920, 4328,5896, 4344,7944, 4376,6280, 4392,5256,
+    4408,7304, 4424,4744, 4440,6792, 4456,5768, 4472,7816, 4504,6536, 4520,5512,
+    4536,7560, 4552,5000, 4568,7048, 4584,6024, 4600,8072, 4632,6216, 4648,5192,
+    4664,7240, 4696,6728, 4712,5704, 4728,7752, 4760,6472, 4776,5448, 4792,7496,
+    4808,4936, 4824,6984, 4840,5960, 4856,8008, 4888,6344, 4904,5320, 4920,7368,
+    4952,6856, 4968,5832, 4984,7880, 5016,6600, 5032,5576, 5048,7624, 5080,7112,
+    5096,6088, 5112,8136, 5144,6184, 5176,7208, 5208,6696, 5224,5672, 5240,7720,
+    5272,6440, 5288,5416, 5304,7464, 5336,6952, 5352,5928, 5368,7976, 5400,6312,
+    5432,7336, 5464,6824, 5480,5800, 5496,7848, 5528,6568, 5560,7592, 5592,7080,
+    5608,6056, 5624,8104, 5656,6248, 5688,7272, 5720,6760, 5752,7784, 5784,6504,
+    5816,7528, 5848,7016, 5864,5992, 5880,8040, 5912,6376, 5944,7400, 5976,6888,
+    6008,7912, 6040,6632, 6072,7656, 6104,7144, 6136,8168, 6200,7192, 6232,6680,
+    6264,7704, 6296,6424, 6328,7448, 6360,6936, 6392,7960, 6456,7320, 6488,6808,
+    6520,7832, 6584,7576, 6616,7064, 6648,8088, 6712,7256, 6776,7768, 6840,7512,
+    6872,7000, 6904,8024, 6968,7384, 7032,7896, 7096,7640, 7160,8152, 7288,7736,
+    7352,7480, 7416,7992, 7544,7864, 7672,8120, 7928,8056
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
+const uint16_t armBitRevIndexTable_fixed_2048[ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH] =
+{
+    /* 4x2, size 1984 */
+    8,8192, 16,4096, 24,12288, 32,2048, 40,10240, 48,6144, 56,14336, 64,1024,
+    72,9216, 80,5120, 88,13312, 96,3072, 104,11264, 112,7168, 120,15360, 128,512,
+    136,8704, 144,4608, 152,12800, 160,2560, 168,10752, 176,6656, 184,14848,
+    192,1536, 200,9728, 208,5632, 216,13824, 224,3584, 232,11776, 240,7680,
+    248,15872, 264,8448, 272,4352, 280,12544, 288,2304, 296,10496, 304,6400,
+    312,14592, 320,1280, 328,9472, 336,5376, 344,13568, 352,3328, 360,11520,
+    368,7424, 376,15616, 384,768, 392,8960, 400,4864, 408,13056, 416,2816,
+    424,11008, 432,6912, 440,15104, 448,1792, 456,9984, 464,5888, 472,14080,
+    480,3840, 488,12032, 496,7936, 504,16128, 520,8320, 528,4224, 536,12416,
+    544,2176, 552,10368, 560,6272, 568,14464, 576,1152, 584,9344, 592,5248,
+    600,13440, 608,3200, 616,11392, 624,7296, 632,15488, 648,8832, 656,4736,
+    664,12928, 672,2688, 680,10880, 688,6784, 696,14976, 704,1664, 712,9856,
+    720,5760, 728,13952, 736,3712, 744,11904, 752,7808, 760,16000, 776,8576,
+    784,4480, 792,12672, 800,2432, 808,10624, 816,6528, 824,14720, 832,1408,
+    840,9600, 848,5504, 856,13696, 864,3456, 872,11648, 880,7552, 888,15744,
+    904,9088, 912,4992, 920,13184, 928,2944, 936,11136, 944,7040, 952,15232,
+    960,1920, 968,10112, 976,6016, 984,14208, 992,3968, 1000,12160, 1008,8064,
+    1016,16256, 1032,8256, 1040,4160, 1048,12352, 1056,2112, 1064,10304, 1072,6208,
+    1080,14400, 1096,9280, 1104,5184, 1112,13376, 1120,3136, 1128,11328, 1136,7232,
+    1144,15424, 1160,8768, 1168,4672, 1176,12864, 1184,2624, 1192,10816, 1200,6720,
+    1208,14912, 1216,1600, 1224,9792, 1232,5696, 1240,13888, 1248,3648, 1256,11840,
+    1264,7744, 1272,15936, 1288,8512, 1296,4416, 1304,12608, 1312,2368, 1320,10560,
+    1328,6464, 1336,14656, 1352,9536, 1360,5440, 1368,13632, 1376,3392, 1384,11584,
+    1392,7488, 1400,15680, 1416,9024, 1424,4928, 1432,13120, 1440,2880, 1448,11072,
+    1456,6976, 1464,15168, 1472,1856, 1480,10048, 1488,5952, 1496,14144, 1504,3904,
+    1512,12096, 1520,8000, 1528,16192, 1544,8384, 1552,4288, 1560,12480, 1568,2240,
+    1576,10432, 1584,6336, 1592,14528, 1608,9408, 1616,5312, 1624,13504, 1632,3264,
+    1640,11456, 1648,7360, 1656,15552, 1672,8896, 1680,4800, 1688,12992, 1696,2752,
+    1704,10944, 1712,6848, 1720,15040, 1736,9920, 1744,5824, 1752,14016, 1760,3776,
+    1768,11968, 1776,7872, 1784,16064, 1800,8640, 1808,4544, 1816,12736, 1824,2496,
+    1832,10688, 1840,6592, 1848,14784, 1864,9664, 1872,5568, 1880,13760, 1888,3520,
+    1896,11712, 1904,7616, 1912,15808, 1928,9152, 1936,5056, 1944,13248, 1952,3008,
+    1960,11200, 1968,7104, 1976,15296, 1992,10176, 2000,6080, 2008,14272, 2016,4032,
+    2024,12224, 2032,8128, 2040,16320, 2056,8224, 2064,4128, 2072,12320, 2088,10272,
+    2096,6176, 2104,14368, 2120,9248, 2128,5152, 2136,13344, 2144,3104, 2152,11296,
+    2160,7200, 2168,15392, 2184,8736, 2192,4640, 2200,12832, 2208,2592, 2216,10784,
+    2224,6688, 2232,14880, 2248,9760, 2256,5664, 2264,13856, 2272,3616, 2280,11808,
+    2288,7712, 2296,15904, 2312,8480, 2320,4384, 2328,12576, 2344,10528, 2352,6432,
+    2360,14624, 2376,9504, 2384,5408, 2392,13600, 2400,3360, 2408,11552, 2416,7456,
+    2424,15648, 2440,8992, 2448,4896, 2456,13088, 2464,2848, 2472,11040, 2480,6944,
+    2488,15136, 2504,10016, 2512,5920, 2520,14112, 2528,3872, 2536,12064, 2544,7968,
+    2552,16160, 2568,8352, 2576,4256, 2584,12448, 2600,10400, 2608,6304, 2616,14496,
+    2632,9376, 2640,5280, 2648,13472, 2656,3232, 2664,11424, 2672,7328, 2680,15520,
+    2696,8864, 2704,4768, 2712,12960, 2728,10912, 2736,6816, 2744,15008, 2760,9888,
+    2768,5792, 2776,13984, 2784,3744, 2792,11936, 2800,7840, 2808,16032, 2824,8608,
+    2832,4512, 2840,12704, 2856,10656, 2864,6560, 2872,14752, 2888,9632, 2896,5536,
+    2904,13728, 2912,3488, 2920,11680, 2928,7584, 2936,15776, 2952,9120, 2960,5024,
+    2968,13216, 2984,11168, 2992,7072, 3000,15264, 3016,10144, 3024,6048,
+    3032,14240, 3040,4000, 3048,12192, 3056,8096, 3064,16288, 3080,8288, 3088,4192,
+    3096,12384, 3112,10336, 3120,6240, 3128,14432, 3144,9312, 3152,5216, 3160,13408,
+    3176,11360, 3184,7264, 3192,15456, 3208,8800, 3216,4704, 3224,12896, 3240,10848,
+    3248,6752, 3256,14944, 3272,9824, 3280,5728, 3288,13920, 3296,3680, 3304,11872,
+    3312,7776, 3320,15968, 3336,8544, 3344,4448, 3352,12640, 3368,10592, 3376,6496,
+    3384,14688, 3400,9568, 3408,5472, 3416,13664, 3432,11616, 3440,7520, 3448,15712,
+    3464,9056, 3472,4960, 3480,13152, 3496,11104, 3504,7008, 3512,15200, 3528,10080,
+    3536,5984, 3544,14176, 3552,3936, 3560,12128, 3568,8032, 3576,16224, 3592,8416,
+    3600,4320, 3608,12512, 3624,10464, 3632,6368, 3640,14560, 3656,9440, 3664,5344,
+    3672,13536, 3688,11488, 3696,7392, 3704,15584, 3720,8928, 3728,4832, 3736,13024,
+    3752,10976, 3760,6880, 3768,15072, 3784,9952, 3792,5856, 3800,14048, 3816,12000,
+    3824,7904, 3832,16096, 3848,8672, 3856,4576, 3864,12768, 3880,10720, 3888,6624,
+    3896,14816, 3912,9696, 3920,5600, 3928,13792, 3944,11744, 3952,7648, 3960,15840,
+    3976,9184, 3984,5088, 3992,13280, 4008,11232, 4016,7136, 4024,15328, 4040,10208,
+    4048,6112, 4056,14304, 4072,12256, 4080,8160, 4088,16352, 4104,8208, 4120,12304,
+    4136,10256, 4144,6160, 4152,14352, 4168,9232, 4176,5136, 4184,13328, 4200,11280,
+    4208,7184, 4216,15376, 4232,8720, 4240,4624, 4248,12816, 4264,10768, 4272,6672,
+    4280,14864, 4296,9744, 4304,5648, 4312,13840, 4328,11792, 4336,7696, 4344,15888,
+    4360,8464, 4376,12560, 4392,10512, 4400,6416, 4408,14608, 4424,9488, 4432,5392,
+    4440,13584, 4456,11536, 4464,7440, 4472,15632, 4488,8976, 4496,4880, 4504,13072,
+    4520,11024, 4528,6928, 4536,15120, 4552,10000, 4560,5904, 4568,14096,
+    4584,12048, 4592,7952, 4600,16144, 4616,8336, 4632,12432, 4648,10384, 4656,6288,
+    4664,14480, 4680,9360, 4688,5264, 4696,13456, 4712,11408, 4720,7312, 4728,15504,
+    4744,8848, 4760,12944, 4776,10896, 4784,6800, 4792,14992, 4808,9872, 4816,5776,
+    4824,13968, 4840,11920, 4848,7824, 4856,16016, 4872,8592, 4888,12688,
+    4904,10640, 4912,6544, 4920,14736, 4936,9616, 4944,5520, 4952,13712, 4968,11664,
+    4976,7568, 4984,15760, 5000,9104, 5016,13200, 5032,11152, 5040,7056, 5048,15248,
+    5064,10128, 5072,6032, 5080,14224, 5096,12176, 5104,8080, 5112,16272, 5128,8272,
+    5144,12368, 5160,10320, 5168,6224, 5176,14416, 5192,9296, 5208,13392,
+    5224,11344, 5232,7248, 5240,15440, 5256,8784, 5272,12880, 5288,10832, 5296,6736,
+    5304,14928, 5320,9808, 5328,5712, 5336,13904, 5352,11856, 5360,7760, 5368,15952,
+    5384,8528, 5400,12624, 5416,10576, 5424,6480, 5432,14672, 5448,9552, 5464,13648,
+    5480,11600, 5488,7504, 5496,15696, 5512,9040, 5528,13136, 5544,11088, 5552,6992,
+    5560,15184, 5576,10064, 5584,5968, 5592,14160, 5608,12112, 5616,8016,
+    5624,16208, 5640,8400, 5656,12496, 5672,10448, 5680,6352, 5688,14544, 5704,9424,
+    5720,13520, 5736,11472, 5744,7376, 5752,15568, 5768,8912, 5784,13008,
+    5800,10960, 5808,6864, 5816,15056, 5832,9936, 5848,14032, 5864,11984, 5872,7888,
+    5880,16080, 5896,8656, 5912,12752, 5928,10704, 5936,6608, 5944,14800, 5960,9680,
+    5976,13776, 5992,11728, 6000,7632, 6008,15824, 6024,9168, 6040,13264,
+    6056,11216, 6064,7120, 6072,15312, 6088,10192, 6104,14288, 6120,12240,
+    6128,8144, 6136,16336, 6152,8240, 6168,12336, 6184,10288, 6200,14384, 6216,9264,
+    6232,13360, 6248,11312, 6256,7216, 6264,15408, 6280,8752, 6296,12848,
+    6312,10800, 6320,6704, 6328,14896, 6344,9776, 6360,13872, 6376,11824, 6384,7728,
+    6392,15920, 6408,8496, 6424,12592, 6440,10544, 6456,14640, 6472,9520,
+    6488,13616, 6504,11568, 6512,7472, 6520,15664, 6536,9008, 6552,13104,
+    6568,11056, 6576,6960, 6584,15152, 6600,10032, 6616,14128, 6632,12080,
+    6640,7984, 6648,16176, 6664,8368, 6680,12464, 6696,10416, 6712,14512, 6728,9392,
+    6744,13488, 6760,11440, 6768,7344, 6776,15536, 6792,8880, 6808,12976,
+    6824,10928, 6840,15024, 6856,9904, 6872,14000, 6888,11952, 6896,7856,
+    6904,16048, 6920,8624, 6936,12720, 6952,10672, 6968,14768, 6984,9648,
+    7000,13744, 7016,11696, 7024,7600, 7032,15792, 7048,9136, 7064,13232,
+    7080,11184, 7096,15280, 7112,10160, 7128,14256, 7144,12208, 7152,8112,
+    7160,16304, 7176,8304, 7192,12400, 7208,10352, 7224,14448, 7240,9328,
+    7256,13424, 7272,11376, 7288,15472, 7304,8816, 7320,12912, 7336,10864,
+    7352,14960, 7368,9840, 7384,13936, 7400,11888, 7408,7792, 7416,15984, 7432,8560,
+    7448,12656, 7464,10608, 7480,14704, 7496,9584, 7512,13680, 7528,11632,
+    7544,15728, 7560,9072, 7576,13168, 7592,11120, 7608,15216, 7624,10096,
+    7640,14192, 7656,12144, 7664,8048, 7672,16240, 7688,8432, 7704,12528,
+    7720,10480, 7736,14576, 7752,9456, 7768,13552, 7784,11504, 7800,15600,
+    7816,8944, 7832,13040, 7848,10992, 7864,15088, 7880,9968, 7896,14064,
+    7912,12016, 7928,16112, 7944,8688, 7960,12784, 7976,10736, 7992,14832,
+    8008,9712, 8024,13808, 8040,11760, 8056,15856, 8072,9200, 8088,13296,
+    8104,11248, 8120,15344, 8136,10224, 8152,14320, 8168,12272, 8184,16368,
+    8216,12296, 8232,10248, 8248,14344, 8264,9224, 8280,13320, 8296,11272,
+    8312,15368, 8328,8712, 8344,12808, 8360,10760, 8376,14856, 8392,9736,
+    8408,13832, 8424,11784, 8440,15880, 8472,12552, 8488,10504, 8504,14600,
+    8520,9480, 8536,13576, 8552,11528, 8568,15624, 8584,8968, 8600,13064,
+    8616,11016, 8632,15112, 8648,9992, 8664,14088, 8680,12040, 8696,16136,
+    8728,12424, 8744,10376, 8760,14472, 8776,9352, 8792,13448, 8808,11400,
+    8824,15496, 8856,12936, 8872,10888, 8888,14984, 8904,9864, 8920,13960,
+    8936,11912, 8952,16008, 8984,12680, 9000,10632, 9016,14728, 9032,9608,
+    9048,13704, 9064,11656, 9080,15752, 9112,13192, 9128,11144, 9144,15240,
+    9160,10120, 9176,14216, 9192,12168, 9208,16264, 9240,12360, 9256,10312,
+    9272,14408, 9304,13384, 9320,11336, 9336,15432, 9368,12872, 9384,10824,
+    9400,14920, 9416,9800, 9432,13896, 9448,11848, 9464,15944, 9496,12616,
+    9512,10568, 9528,14664, 9560,13640, 9576,11592, 9592,15688, 9624,13128,
+    9640,11080, 9656,15176, 9672,10056, 9688,14152, 9704,12104, 9720,16200,
+    9752,12488, 9768,10440, 9784,14536, 9816,13512, 9832,11464, 9848,15560,
+    9880,13000, 9896,10952, 9912,15048, 9944,14024, 9960,11976, 9976,16072,
+    10008,12744, 10024,10696, 10040,14792, 10072,13768, 10088,11720, 10104,15816,
+    10136,13256, 10152,11208, 10168,15304, 10200,14280, 10216,12232, 10232,16328,
+    10264,12328, 10296,14376, 10328,13352, 10344,11304, 10360,15400, 10392,12840,
+    10408,10792, 10424,14888, 10456,13864, 10472,11816, 10488,15912, 10520,12584,
+    10552,14632, 10584,13608, 10600,11560, 10616,15656, 10648,13096, 10664,11048,
+    10680,15144, 10712,14120, 10728,12072, 10744,16168, 10776,12456, 10808,14504,
+    10840,13480, 10856,11432, 10872,15528, 10904,12968, 10936,15016, 10968,13992,
+    10984,11944, 11000,16040, 11032,12712, 11064,14760, 11096,13736, 11112,11688,
+    11128,15784, 11160,13224, 11192,15272, 11224,14248, 11240,12200, 11256,16296,
+    11288,12392, 11320,14440, 11352,13416, 11384,15464, 11416,12904, 11448,14952,
+    11480,13928, 11496,11880, 11512,15976, 11544,12648, 11576,14696, 11608,13672,
+    11640,15720, 11672,13160, 11704,15208, 11736,14184, 11752,12136, 11768,16232,
+    11800,12520, 11832,14568, 11864,13544, 11896,15592, 11928,13032, 11960,15080,
+    11992,14056, 12024,16104, 12056,12776, 12088,14824, 12120,13800, 12152,15848,
+    12184,13288, 12216,15336, 12248,14312, 12280,16360, 12344,14360, 12376,13336,
+    12408,15384, 12440,12824, 12472,14872, 12504,13848, 12536,15896, 12600,14616,
+    12632,13592, 12664,15640, 12696,13080, 12728,15128, 12760,14104, 12792,16152,
+    12856,14488, 12888,13464, 12920,15512, 12984,15000, 13016,13976, 13048,16024,
+    13112,14744, 13144,13720, 13176,15768, 13240,15256, 13272,14232, 13304,16280,
+    13368,14424, 13432,15448, 13496,14936, 13528,13912, 13560,15960, 13624,14680,
+    13688,15704, 13752,15192, 13784,14168, 13816,16216, 13880,14552, 13944,15576,
+    14008,15064, 14072,16088, 14136,14808, 14200,15832, 14264,15320, 14328,16344,
+    14456,15416, 14520,14904, 14584,15928, 14712,15672, 14776,15160, 14840,16184,
+    14968,15544, 15096,16056, 15224,15800, 15352,16312, 15608,15992, 15864,16248
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
+const uint16_t armBitRevIndexTable_fixed_4096[ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH] =
+{
+    /* radix 4, size 4032 */
+    8,16384, 16,8192, 24,24576, 32,4096, 40,20480, 48,12288, 56,28672, 64,2048,
+    72,18432, 80,10240, 88,26624, 96,6144, 104,22528, 112,14336, 120,30720,
+    128,1024, 136,17408, 144,9216, 152,25600, 160,5120, 168,21504, 176,13312,
+    184,29696, 192,3072, 200,19456, 208,11264, 216,27648, 224,7168, 232,23552,
+    240,15360, 248,31744, 256,512, 264,16896, 272,8704, 280,25088, 288,4608,
+    296,20992, 304,12800, 312,29184, 320,2560, 328,18944, 336,10752, 344,27136,
+    352,6656, 360,23040, 368,14848, 376,31232, 384,1536, 392,17920, 400,9728,
+    408,26112, 416,5632, 424,22016, 432,13824, 440,30208, 448,3584, 456,19968,
+    464,11776, 472,28160, 480,7680, 488,24064, 496,15872, 504,32256, 520,16640,
+    528,8448, 536,24832, 544,4352, 552,20736, 560,12544, 568,28928, 576,2304,
+    584,18688, 592,10496, 600,26880, 608,6400, 616,22784, 624,14592, 632,30976,
+    640,1280, 648,17664, 656,9472, 664,25856, 672,5376, 680,21760, 688,13568,
+    696,29952, 704,3328, 712,19712, 720,11520, 728,27904, 736,7424, 744,23808,
+    752,15616, 760,32000, 776,17152, 784,8960, 792,25344, 800,4864, 808,21248,
+    816,13056, 824,29440, 832,2816, 840,19200, 848,11008, 856,27392, 864,6912,
+    872,23296, 880,15104, 888,31488, 896,1792, 904,18176, 912,9984, 920,26368,
+    928,5888, 936,22272, 944,14080, 952,30464, 960,3840, 968,20224, 976,12032,
+    984,28416, 992,7936, 1000,24320, 1008,16128, 1016,32512, 1032,16512, 1040,8320,
+    1048,24704, 1056,4224, 1064,20608, 1072,12416, 1080,28800, 1088,2176,
+    1096,18560, 1104,10368, 1112,26752, 1120,6272, 1128,22656, 1136,14464,
+    1144,30848, 1160,17536, 1168,9344, 1176,25728, 1184,5248, 1192,21632,
+    1200,13440, 1208,29824, 1216,3200, 1224,19584, 1232,11392, 1240,27776,
+    1248,7296, 1256,23680, 1264,15488, 1272,31872, 1288,17024, 1296,8832,
+    1304,25216, 1312,4736, 1320,21120, 1328,12928, 1336,29312, 1344,2688,
+    1352,19072, 1360,10880, 1368,27264, 1376,6784, 1384,23168, 1392,14976,
+    1400,31360, 1408,1664, 1416,18048, 1424,9856, 1432,26240, 1440,5760, 1448,22144,
+    1456,13952, 1464,30336, 1472,3712, 1480,20096, 1488,11904, 1496,28288,
+    1504,7808, 1512,24192, 1520,16000, 1528,32384, 1544,16768, 1552,8576,
+    1560,24960, 1568,4480, 1576,20864, 1584,12672, 1592,29056, 1600,2432,
+    1608,18816, 1616,10624, 1624,27008, 1632,6528, 1640,22912, 1648,14720,
+    1656,31104, 1672,17792, 1680,9600, 1688,25984, 1696,5504, 1704,21888,
+    1712,13696, 1720,30080, 1728,3456, 1736,19840, 1744,11648, 1752,28032,
+    1760,7552, 1768,23936, 1776,15744, 1784,32128, 1800,17280, 1808,9088,
+    1816,25472, 1824,4992, 1832,21376, 1840,13184, 1848,29568, 1856,2944,
+    1864,19328, 1872,11136, 1880,27520, 1888,7040, 1896,23424, 1904,15232,
+    1912,31616, 1928,18304, 1936,10112, 1944,26496, 1952,6016, 1960,22400,
+    1968,14208, 1976,30592, 1984,3968, 1992,20352, 2000,12160, 2008,28544,
+    2016,8064, 2024,24448, 2032,16256, 2040,32640, 2056,16448, 2064,8256,
+    2072,24640, 2080,4160, 2088,20544, 2096,12352, 2104,28736, 2120,18496,
+    2128,10304, 2136,26688, 2144,6208, 2152,22592, 2160,14400, 2168,30784,
+    2184,17472, 2192,9280, 2200,25664, 2208,5184, 2216,21568, 2224,13376,
+    2232,29760, 2240,3136, 2248,19520, 2256,11328, 2264,27712, 2272,7232,
+    2280,23616, 2288,15424, 2296,31808, 2312,16960, 2320,8768, 2328,25152,
+    2336,4672, 2344,21056, 2352,12864, 2360,29248, 2368,2624, 2376,19008,
+    2384,10816, 2392,27200, 2400,6720, 2408,23104, 2416,14912, 2424,31296,
+    2440,17984, 2448,9792, 2456,26176, 2464,5696, 2472,22080, 2480,13888,
+    2488,30272, 2496,3648, 2504,20032, 2512,11840, 2520,28224, 2528,7744,
+    2536,24128, 2544,15936, 2552,32320, 2568,16704, 2576,8512, 2584,24896,
+    2592,4416, 2600,20800, 2608,12608, 2616,28992, 2632,18752, 2640,10560,
+    2648,26944, 2656,6464, 2664,22848, 2672,14656, 2680,31040, 2696,17728,
+    2704,9536, 2712,25920, 2720,5440, 2728,21824, 2736,13632, 2744,30016, 2752,3392,
+    2760,19776, 2768,11584, 2776,27968, 2784,7488, 2792,23872, 2800,15680,
+    2808,32064, 2824,17216, 2832,9024, 2840,25408, 2848,4928, 2856,21312,
+    2864,13120, 2872,29504, 2888,19264, 2896,11072, 2904,27456, 2912,6976,
+    2920,23360, 2928,15168, 2936,31552, 2952,18240, 2960,10048, 2968,26432,
+    2976,5952, 2984,22336, 2992,14144, 3000,30528, 3008,3904, 3016,20288,
+    3024,12096, 3032,28480, 3040,8000, 3048,24384, 3056,16192, 3064,32576,
+    3080,16576, 3088,8384, 3096,24768, 3104,4288, 3112,20672, 3120,12480,
+    3128,28864, 3144,18624, 3152,10432, 3160,26816, 3168,6336, 3176,22720,
+    3184,14528, 3192,30912, 3208,17600, 3216,9408, 3224,25792, 3232,5312,
+    3240,21696, 3248,13504, 3256,29888, 3272,19648, 3280,11456, 3288,27840,
+    3296,7360, 3304,23744, 3312,15552, 3320,31936, 3336,17088, 3344,8896,
+    3352,25280, 3360,4800, 3368,21184, 3376,12992, 3384,29376, 3400,19136,
+    3408,10944, 3416,27328, 3424,6848, 3432,23232, 3440,15040, 3448,31424,
+    3464,18112, 3472,9920, 3480,26304, 3488,5824, 3496,22208, 3504,14016,
+    3512,30400, 3520,3776, 3528,20160, 3536,11968, 3544,28352, 3552,7872,
+    3560,24256, 3568,16064, 3576,32448, 3592,16832, 3600,8640, 3608,25024,
+    3616,4544, 3624,20928, 3632,12736, 3640,29120, 3656,18880, 3664,10688,
+    3672,27072, 3680,6592, 3688,22976, 3696,14784, 3704,31168, 3720,17856,
+    3728,9664, 3736,26048, 3744,5568, 3752,21952, 3760,13760, 3768,30144,
+    3784,19904, 3792,11712, 3800,28096, 3808,7616, 3816,24000, 3824,15808,
+    3832,32192, 3848,17344, 3856,9152, 3864,25536, 3872,5056, 3880,21440,
+    3888,13248, 3896,29632, 3912,19392, 3920,11200, 3928,27584, 3936,7104,
+    3944,23488, 3952,15296, 3960,31680, 3976,18368, 3984,10176, 3992,26560,
+    4000,6080, 4008,22464, 4016,14272, 4024,30656, 4040,20416, 4048,12224,
+    4056,28608, 4064,8128, 4072,24512, 4080,16320, 4088,32704, 4104,16416,
+    4112,8224, 4120,24608, 4136,20512, 4144,12320, 4152,28704, 4168,18464,
+    4176,10272, 4184,26656, 4192,6176, 4200,22560, 4208,14368, 4216,30752,
+    4232,17440, 4240,9248, 4248,25632, 4256,5152, 4264,21536, 4272,13344,
+    4280,29728, 4296,19488, 4304,11296, 4312,27680, 4320,7200, 4328,23584,
+    4336,15392, 4344,31776, 4360,16928, 4368,8736, 4376,25120, 4384,4640,
+    4392,21024, 4400,12832, 4408,29216, 4424,18976, 4432,10784, 4440,27168,
+    4448,6688, 4456,23072, 4464,14880, 4472,31264, 4488,17952, 4496,9760,
+    4504,26144, 4512,5664, 4520,22048, 4528,13856, 4536,30240, 4552,20000,
+    4560,11808, 4568,28192, 4576,7712, 4584,24096, 4592,15904, 4600,32288,
+    4616,16672, 4624,8480, 4632,24864, 4648,20768, 4656,12576, 4664,28960,
+    4680,18720, 4688,10528, 4696,26912, 4704,6432, 4712,22816, 4720,14624,
+    4728,31008, 4744,17696, 4752,9504, 4760,25888, 4768,5408, 4776,21792,
+    4784,13600, 4792,29984, 4808,19744, 4816,11552, 4824,27936, 4832,7456,
+    4840,23840, 4848,15648, 4856,32032, 4872,17184, 4880,8992, 4888,25376,
+    4904,21280, 4912,13088, 4920,29472, 4936,19232, 4944,11040, 4952,27424,
+    4960,6944, 4968,23328, 4976,15136, 4984,31520, 5000,18208, 5008,10016,
+    5016,26400, 5024,5920, 5032,22304, 5040,14112, 5048,30496, 5064,20256,
+    5072,12064, 5080,28448, 5088,7968, 5096,24352, 5104,16160, 5112,32544,
+    5128,16544, 5136,8352, 5144,24736, 5160,20640, 5168,12448, 5176,28832,
+    5192,18592, 5200,10400, 5208,26784, 5216,6304, 5224,22688, 5232,14496,
+    5240,30880, 5256,17568, 5264,9376, 5272,25760, 5288,21664, 5296,13472,
+    5304,29856, 5320,19616, 5328,11424, 5336,27808, 5344,7328, 5352,23712,
+    5360,15520, 5368,31904, 5384,17056, 5392,8864, 5400,25248, 5416,21152,
+    5424,12960, 5432,29344, 5448,19104, 5456,10912, 5464,27296, 5472,6816,
+    5480,23200, 5488,15008, 5496,31392, 5512,18080, 5520,9888, 5528,26272,
+    5536,5792, 5544,22176, 5552,13984, 5560,30368, 5576,20128, 5584,11936,
+    5592,28320, 5600,7840, 5608,24224, 5616,16032, 5624,32416, 5640,16800,
+    5648,8608, 5656,24992, 5672,20896, 5680,12704, 5688,29088, 5704,18848,
+    5712,10656, 5720,27040, 5728,6560, 5736,22944, 5744,14752, 5752,31136,
+    5768,17824, 5776,9632, 5784,26016, 5800,21920, 5808,13728, 5816,30112,
+    5832,19872, 5840,11680, 5848,28064, 5856,7584, 5864,23968, 5872,15776,
+    5880,32160, 5896,17312, 5904,9120, 5912,25504, 5928,21408, 5936,13216,
+    5944,29600, 5960,19360, 5968,11168, 5976,27552, 5984,7072, 5992,23456,
+    6000,15264, 6008,31648, 6024,18336, 6032,10144, 6040,26528, 6056,22432,
+    6064,14240, 6072,30624, 6088,20384, 6096,12192, 6104,28576, 6112,8096,
+    6120,24480, 6128,16288, 6136,32672, 6152,16480, 6160,8288, 6168,24672,
+    6184,20576, 6192,12384, 6200,28768, 6216,18528, 6224,10336, 6232,26720,
+    6248,22624, 6256,14432, 6264,30816, 6280,17504, 6288,9312, 6296,25696,
+    6312,21600, 6320,13408, 6328,29792, 6344,19552, 6352,11360, 6360,27744,
+    6368,7264, 6376,23648, 6384,15456, 6392,31840, 6408,16992, 6416,8800,
+    6424,25184, 6440,21088, 6448,12896, 6456,29280, 6472,19040, 6480,10848,
+    6488,27232, 6496,6752, 6504,23136, 6512,14944, 6520,31328, 6536,18016,
+    6544,9824, 6552,26208, 6568,22112, 6576,13920, 6584,30304, 6600,20064,
+    6608,11872, 6616,28256, 6624,7776, 6632,24160, 6640,15968, 6648,32352,
+    6664,16736, 6672,8544, 6680,24928, 6696,20832, 6704,12640, 6712,29024,
+    6728,18784, 6736,10592, 6744,26976, 6760,22880, 6768,14688, 6776,31072,
+    6792,17760, 6800,9568, 6808,25952, 6824,21856, 6832,13664, 6840,30048,
+    6856,19808, 6864,11616, 6872,28000, 6880,7520, 6888,23904, 6896,15712,
+    6904,32096, 6920,17248, 6928,9056, 6936,25440, 6952,21344, 6960,13152,
+    6968,29536, 6984,19296, 6992,11104, 7000,27488, 7016,23392, 7024,15200,
+    7032,31584, 7048,18272, 7056,10080, 7064,26464, 7080,22368, 7088,14176,
+    7096,30560, 7112,20320, 7120,12128, 7128,28512, 7136,8032, 7144,24416,
+    7152,16224, 7160,32608, 7176,16608, 7184,8416, 7192,24800, 7208,20704,
+    7216,12512, 7224,28896, 7240,18656, 7248,10464, 7256,26848, 7272,22752,
+    7280,14560, 7288,30944, 7304,17632, 7312,9440, 7320,25824, 7336,21728,
+    7344,13536, 7352,29920, 7368,19680, 7376,11488, 7384,27872, 7400,23776,
+    7408,15584, 7416,31968, 7432,17120, 7440,8928, 7448,25312, 7464,21216,
+    7472,13024, 7480,29408, 7496,19168, 7504,10976, 7512,27360, 7528,23264,
+    7536,15072, 7544,31456, 7560,18144, 7568,9952, 7576,26336, 7592,22240,
+    7600,14048, 7608,30432, 7624,20192, 7632,12000, 7640,28384, 7648,7904,
+    7656,24288, 7664,16096, 7672,32480, 7688,16864, 7696,8672, 7704,25056,
+    7720,20960, 7728,12768, 7736,29152, 7752,18912, 7760,10720, 7768,27104,
+    7784,23008, 7792,14816, 7800,31200, 7816,17888, 7824,9696, 7832,26080,
+    7848,21984, 7856,13792, 7864,30176, 7880,19936, 7888,11744, 7896,28128,
+    7912,24032, 7920,15840, 7928,32224, 7944,17376, 7952,9184, 7960,25568,
+    7976,21472, 7984,13280, 7992,29664, 8008,19424, 8016,11232, 8024,27616,
+    8040,23520, 8048,15328, 8056,31712, 8072,18400, 8080,10208, 8088,26592,
+    8104,22496, 8112,14304, 8120,30688, 8136,20448, 8144,12256, 8152,28640,
+    8168,24544, 8176,16352, 8184,32736, 8200,16400, 8216,24592, 8232,20496,
+    8240,12304, 8248,28688, 8264,18448, 8272,10256, 8280,26640, 8296,22544,
+    8304,14352, 8312,30736, 8328,17424, 8336,9232, 8344,25616, 8360,21520,
+    8368,13328, 8376,29712, 8392,19472, 8400,11280, 8408,27664, 8424,23568,
+    8432,15376, 8440,31760, 8456,16912, 8464,8720, 8472,25104, 8488,21008,
+    8496,12816, 8504,29200, 8520,18960, 8528,10768, 8536,27152, 8552,23056,
+    8560,14864, 8568,31248, 8584,17936, 8592,9744, 8600,26128, 8616,22032,
+    8624,13840, 8632,30224, 8648,19984, 8656,11792, 8664,28176, 8680,24080,
+    8688,15888, 8696,32272, 8712,16656, 8728,24848, 8744,20752, 8752,12560,
+    8760,28944, 8776,18704, 8784,10512, 8792,26896, 8808,22800, 8816,14608,
+    8824,30992, 8840,17680, 8848,9488, 8856,25872, 8872,21776, 8880,13584,
+    8888,29968, 8904,19728, 8912,11536, 8920,27920, 8936,23824, 8944,15632,
+    8952,32016, 8968,17168, 8984,25360, 9000,21264, 9008,13072, 9016,29456,
+    9032,19216, 9040,11024, 9048,27408, 9064,23312, 9072,15120, 9080,31504,
+    9096,18192, 9104,10000, 9112,26384, 9128,22288, 9136,14096, 9144,30480,
+    9160,20240, 9168,12048, 9176,28432, 9192,24336, 9200,16144, 9208,32528,
+    9224,16528, 9240,24720, 9256,20624, 9264,12432, 9272,28816, 9288,18576,
+    9296,10384, 9304,26768, 9320,22672, 9328,14480, 9336,30864, 9352,17552,
+    9368,25744, 9384,21648, 9392,13456, 9400,29840, 9416,19600, 9424,11408,
+    9432,27792, 9448,23696, 9456,15504, 9464,31888, 9480,17040, 9496,25232,
+    9512,21136, 9520,12944, 9528,29328, 9544,19088, 9552,10896, 9560,27280,
+    9576,23184, 9584,14992, 9592,31376, 9608,18064, 9616,9872, 9624,26256,
+    9640,22160, 9648,13968, 9656,30352, 9672,20112, 9680,11920, 9688,28304,
+    9704,24208, 9712,16016, 9720,32400, 9736,16784, 9752,24976, 9768,20880,
+    9776,12688, 9784,29072, 9800,18832, 9808,10640, 9816,27024, 9832,22928,
+    9840,14736, 9848,31120, 9864,17808, 9880,26000, 9896,21904, 9904,13712,
+    9912,30096, 9928,19856, 9936,11664, 9944,28048, 9960,23952, 9968,15760,
+    9976,32144, 9992,17296, 10008,25488, 10024,21392, 10032,13200, 10040,29584,
+    10056,19344, 10064,11152, 10072,27536, 10088,23440, 10096,15248, 10104,31632,
+    10120,18320, 10136,26512, 10152,22416, 10160,14224, 10168,30608, 10184,20368,
+    10192,12176, 10200,28560, 10216,24464, 10224,16272, 10232,32656, 10248,16464,
+    10264,24656, 10280,20560, 10288,12368, 10296,28752, 10312,18512, 10328,26704,
+    10344,22608, 10352,14416, 10360,30800, 10376,17488, 10392,25680, 10408,21584,
+    10416,13392, 10424,29776, 10440,19536, 10448,11344, 10456,27728, 10472,23632,
+    10480,15440, 10488,31824, 10504,16976, 10520,25168, 10536,21072, 10544,12880,
+    10552,29264, 10568,19024, 10576,10832, 10584,27216, 10600,23120, 10608,14928,
+    10616,31312, 10632,18000, 10648,26192, 10664,22096, 10672,13904, 10680,30288,
+    10696,20048, 10704,11856, 10712,28240, 10728,24144, 10736,15952, 10744,32336,
+    10760,16720, 10776,24912, 10792,20816, 10800,12624, 10808,29008, 10824,18768,
+    10840,26960, 10856,22864, 10864,14672, 10872,31056, 10888,17744, 10904,25936,
+    10920,21840, 10928,13648, 10936,30032, 10952,19792, 10960,11600, 10968,27984,
+    10984,23888, 10992,15696, 11000,32080, 11016,17232, 11032,25424, 11048,21328,
+    11056,13136, 11064,29520, 11080,19280, 11096,27472, 11112,23376, 11120,15184,
+    11128,31568, 11144,18256, 11160,26448, 11176,22352, 11184,14160, 11192,30544,
+    11208,20304, 11216,12112, 11224,28496, 11240,24400, 11248,16208, 11256,32592,
+    11272,16592, 11288,24784, 11304,20688, 11312,12496, 11320,28880, 11336,18640,
+    11352,26832, 11368,22736, 11376,14544, 11384,30928, 11400,17616, 11416,25808,
+    11432,21712, 11440,13520, 11448,29904, 11464,19664, 11480,27856, 11496,23760,
+    11504,15568, 11512,31952, 11528,17104, 11544,25296, 11560,21200, 11568,13008,
+    11576,29392, 11592,19152, 11608,27344, 11624,23248, 11632,15056, 11640,31440,
+    11656,18128, 11672,26320, 11688,22224, 11696,14032, 11704,30416, 11720,20176,
+    11728,11984, 11736,28368, 11752,24272, 11760,16080, 11768,32464, 11784,16848,
+    11800,25040, 11816,20944, 11824,12752, 11832,29136, 11848,18896, 11864,27088,
+    11880,22992, 11888,14800, 11896,31184, 11912,17872, 11928,26064, 11944,21968,
+    11952,13776, 11960,30160, 11976,19920, 11992,28112, 12008,24016, 12016,15824,
+    12024,32208, 12040,17360, 12056,25552, 12072,21456, 12080,13264, 12088,29648,
+    12104,19408, 12120,27600, 12136,23504, 12144,15312, 12152,31696, 12168,18384,
+    12184,26576, 12200,22480, 12208,14288, 12216,30672, 12232,20432, 12248,28624,
+    12264,24528, 12272,16336, 12280,32720, 12296,16432, 12312,24624, 12328,20528,
+    12344,28720, 12360,18480, 12376,26672, 12392,22576, 12400,14384, 12408,30768,
+    12424,17456, 12440,25648, 12456,21552, 12464,13360, 12472,29744, 12488,19504,
+    12504,27696, 12520,23600, 12528,15408, 12536,31792, 12552,16944, 12568,25136,
+    12584,21040, 12592,12848, 12600,29232, 12616,18992, 12632,27184, 12648,23088,
+    12656,14896, 12664,31280, 12680,17968, 12696,26160, 12712,22064, 12720,13872,
+    12728,30256, 12744,20016, 12760,28208, 12776,24112, 12784,15920, 12792,32304,
+    12808,16688, 12824,24880, 12840,20784, 12856,28976, 12872,18736, 12888,26928,
+    12904,22832, 12912,14640, 12920,31024, 12936,17712, 12952,25904, 12968,21808,
+    12976,13616, 12984,30000, 13000,19760, 13016,27952, 13032,23856, 13040,15664,
+    13048,32048, 13064,17200, 13080,25392, 13096,21296, 13112,29488, 13128,19248,
+    13144,27440, 13160,23344, 13168,15152, 13176,31536, 13192,18224, 13208,26416,
+    13224,22320, 13232,14128, 13240,30512, 13256,20272, 13272,28464, 13288,24368,
+    13296,16176, 13304,32560, 13320,16560, 13336,24752, 13352,20656, 13368,28848,
+    13384,18608, 13400,26800, 13416,22704, 13424,14512, 13432,30896, 13448,17584,
+    13464,25776, 13480,21680, 13496,29872, 13512,19632, 13528,27824, 13544,23728,
+    13552,15536, 13560,31920, 13576,17072, 13592,25264, 13608,21168, 13624,29360,
+    13640,19120, 13656,27312, 13672,23216, 13680,15024, 13688,31408, 13704,18096,
+    13720,26288, 13736,22192, 13744,14000, 13752,30384, 13768,20144, 13784,28336,
+    13800,24240, 13808,16048, 13816,32432, 13832,16816, 13848,25008, 13864,20912,
+    13880,29104, 13896,18864, 13912,27056, 13928,22960, 13936,14768, 13944,31152,
+    13960,17840, 13976,26032, 13992,21936, 14008,30128, 14024,19888, 14040,28080,
+    14056,23984, 14064,15792, 14072,32176, 14088,17328, 14104,25520, 14120,21424,
+    14136,29616, 14152,19376, 14168,27568, 14184,23472, 14192,15280, 14200,31664,
+    14216,18352, 14232,26544, 14248,22448, 14264,30640, 14280,20400, 14296,28592,
+    14312,24496, 14320,16304, 14328,32688, 14344,16496, 14360,24688, 14376,20592,
+    14392,28784, 14408,18544, 14424,26736, 14440,22640, 14456,30832, 14472,17520,
+    14488,25712, 14504,21616, 14520,29808, 14536,19568, 14552,27760, 14568,23664,
+    14576,15472, 14584,31856, 14600,17008, 14616,25200, 14632,21104, 14648,29296,
+    14664,19056, 14680,27248, 14696,23152, 14704,14960, 14712,31344, 14728,18032,
+    14744,26224, 14760,22128, 14776,30320, 14792,20080, 14808,28272, 14824,24176,
+    14832,15984, 14840,32368, 14856,16752, 14872,24944, 14888,20848, 14904,29040,
+    14920,18800, 14936,26992, 14952,22896, 14968,31088, 14984,17776, 15000,25968,
+    15016,21872, 15032,30064, 15048,19824, 15064,28016, 15080,23920, 15088,15728,
+    15096,32112, 15112,17264, 15128,25456, 15144,21360, 15160,29552, 15176,19312,
+    15192,27504, 15208,23408, 15224,31600, 15240,18288, 15256,26480, 15272,22384,
+    15288,30576, 15304,20336, 15320,28528, 15336,24432, 15344,16240, 15352,32624,
+    15368,16624, 15384,24816, 15400,20720, 15416,28912, 15432,18672, 15448,26864,
+    15464,22768, 15480,30960, 15496,17648, 15512,25840, 15528,21744, 15544,29936,
+    15560,19696, 15576,27888, 15592,23792, 15608,31984, 15624,17136, 15640,25328,
+    15656,21232, 15672,29424, 15688,19184, 15704,27376, 15720,23280, 15736,31472,
+    15752,18160, 15768,26352, 15784,22256, 15800,30448, 15816,20208, 15832,28400,
+    15848,24304, 15856,16112, 15864,32496, 15880,16880, 15896,25072, 15912,20976,
+    15928,29168, 15944,18928, 15960,27120, 15976,23024, 15992,31216, 16008,17904,
+    16024,26096, 16040,22000, 16056,30192, 16072,19952, 16088,28144, 16104,24048,
+    16120,32240, 16136,17392, 16152,25584, 16168,21488, 16184,29680, 16200,19440,
+    16216,27632, 16232,23536, 16248,31728, 16264,18416, 16280,26608, 16296,22512,
+    16312,30704, 16328,20464, 16344,28656, 16360,24560, 16376,32752, 16408,24584,
+    16424,20488, 16440,28680, 16456,18440, 16472,26632, 16488,22536, 16504,30728,
+    16520,17416, 16536,25608, 16552,21512, 16568,29704, 16584,19464, 16600,27656,
+    16616,23560, 16632,31752, 16648,16904, 16664,25096, 16680,21000, 16696,29192,
+    16712,18952, 16728,27144, 16744,23048, 16760,31240, 16776,17928, 16792,26120,
+    16808,22024, 16824,30216, 16840,19976, 16856,28168, 16872,24072, 16888,32264,
+    16920,24840, 16936,20744, 16952,28936, 16968,18696, 16984,26888, 17000,22792,
+    17016,30984, 17032,17672, 17048,25864, 17064,21768, 17080,29960, 17096,19720,
+    17112,27912, 17128,23816, 17144,32008, 17176,25352, 17192,21256, 17208,29448,
+    17224,19208, 17240,27400, 17256,23304, 17272,31496, 17288,18184, 17304,26376,
+    17320,22280, 17336,30472, 17352,20232, 17368,28424, 17384,24328, 17400,32520,
+    17432,24712, 17448,20616, 17464,28808, 17480,18568, 17496,26760, 17512,22664,
+    17528,30856, 17560,25736, 17576,21640, 17592,29832, 17608,19592, 17624,27784,
+    17640,23688, 17656,31880, 17688,25224, 17704,21128, 17720,29320, 17736,19080,
+    17752,27272, 17768,23176, 17784,31368, 17800,18056, 17816,26248, 17832,22152,
+    17848,30344, 17864,20104, 17880,28296, 17896,24200, 17912,32392, 17944,24968,
+    17960,20872, 17976,29064, 17992,18824, 18008,27016, 18024,22920, 18040,31112,
+    18072,25992, 18088,21896, 18104,30088, 18120,19848, 18136,28040, 18152,23944,
+    18168,32136, 18200,25480, 18216,21384, 18232,29576, 18248,19336, 18264,27528,
+    18280,23432, 18296,31624, 18328,26504, 18344,22408, 18360,30600, 18376,20360,
+    18392,28552, 18408,24456, 18424,32648, 18456,24648, 18472,20552, 18488,28744,
+    18520,26696, 18536,22600, 18552,30792, 18584,25672, 18600,21576, 18616,29768,
+    18632,19528, 18648,27720, 18664,23624, 18680,31816, 18712,25160, 18728,21064,
+    18744,29256, 18760,19016, 18776,27208, 18792,23112, 18808,31304, 18840,26184,
+    18856,22088, 18872,30280, 18888,20040, 18904,28232, 18920,24136, 18936,32328,
+    18968,24904, 18984,20808, 19000,29000, 19032,26952, 19048,22856, 19064,31048,
+    19096,25928, 19112,21832, 19128,30024, 19144,19784, 19160,27976, 19176,23880,
+    19192,32072, 19224,25416, 19240,21320, 19256,29512, 19288,27464, 19304,23368,
+    19320,31560, 19352,26440, 19368,22344, 19384,30536, 19400,20296, 19416,28488,
+    19432,24392, 19448,32584, 19480,24776, 19496,20680, 19512,28872, 19544,26824,
+    19560,22728, 19576,30920, 19608,25800, 19624,21704, 19640,29896, 19672,27848,
+    19688,23752, 19704,31944, 19736,25288, 19752,21192, 19768,29384, 19800,27336,
+    19816,23240, 19832,31432, 19864,26312, 19880,22216, 19896,30408, 19912,20168,
+    19928,28360, 19944,24264, 19960,32456, 19992,25032, 20008,20936, 20024,29128,
+    20056,27080, 20072,22984, 20088,31176, 20120,26056, 20136,21960, 20152,30152,
+    20184,28104, 20200,24008, 20216,32200, 20248,25544, 20264,21448, 20280,29640,
+    20312,27592, 20328,23496, 20344,31688, 20376,26568, 20392,22472, 20408,30664,
+    20440,28616, 20456,24520, 20472,32712, 20504,24616, 20536,28712, 20568,26664,
+    20584,22568, 20600,30760, 20632,25640, 20648,21544, 20664,29736, 20696,27688,
+    20712,23592, 20728,31784, 20760,25128, 20776,21032, 20792,29224, 20824,27176,
+    20840,23080, 20856,31272, 20888,26152, 20904,22056, 20920,30248, 20952,28200,
+    20968,24104, 20984,32296, 21016,24872, 21048,28968, 21080,26920, 21096,22824,
+    21112,31016, 21144,25896, 21160,21800, 21176,29992, 21208,27944, 21224,23848,
+    21240,32040, 21272,25384, 21304,29480, 21336,27432, 21352,23336, 21368,31528,
+    21400,26408, 21416,22312, 21432,30504, 21464,28456, 21480,24360, 21496,32552,
+    21528,24744, 21560,28840, 21592,26792, 21608,22696, 21624,30888, 21656,25768,
+    21688,29864, 21720,27816, 21736,23720, 21752,31912, 21784,25256, 21816,29352,
+    21848,27304, 21864,23208, 21880,31400, 21912,26280, 21928,22184, 21944,30376,
+    21976,28328, 21992,24232, 22008,32424, 22040,25000, 22072,29096, 22104,27048,
+    22120,22952, 22136,31144, 22168,26024, 22200,30120, 22232,28072, 22248,23976,
+    22264,32168, 22296,25512, 22328,29608, 22360,27560, 22376,23464, 22392,31656,
+    22424,26536, 22456,30632, 22488,28584, 22504,24488, 22520,32680, 22552,24680,
+    22584,28776, 22616,26728, 22648,30824, 22680,25704, 22712,29800, 22744,27752,
+    22760,23656, 22776,31848, 22808,25192, 22840,29288, 22872,27240, 22888,23144,
+    22904,31336, 22936,26216, 22968,30312, 23000,28264, 23016,24168, 23032,32360,
+    23064,24936, 23096,29032, 23128,26984, 23160,31080, 23192,25960, 23224,30056,
+    23256,28008, 23272,23912, 23288,32104, 23320,25448, 23352,29544, 23384,27496,
+    23416,31592, 23448,26472, 23480,30568, 23512,28520, 23528,24424, 23544,32616,
+    23576,24808, 23608,28904, 23640,26856, 23672,30952, 23704,25832, 23736,29928,
+    23768,27880, 23800,31976, 23832,25320, 23864,29416, 23896,27368, 23928,31464,
+    23960,26344, 23992,30440, 24024,28392, 24040,24296, 24056,32488, 24088,25064,
+    24120,29160, 24152,27112, 24184,31208, 24216,26088, 24248,30184, 24280,28136,
+    24312,32232, 24344,25576, 24376,29672, 24408,27624, 24440,31720, 24472,26600,
+    24504,30696, 24536,28648, 24568,32744, 24632,28696, 24664,26648, 24696,30744,
+    24728,25624, 24760,29720, 24792,27672, 24824,31768, 24856,25112, 24888,29208,
+    24920,27160, 24952,31256, 24984,26136, 25016,30232, 25048,28184, 25080,32280,
+    25144,28952, 25176,26904, 25208,31000, 25240,25880, 25272,29976, 25304,27928,
+    25336,32024, 25400,29464, 25432,27416, 25464,31512, 25496,26392, 25528,30488,
+    25560,28440, 25592,32536, 25656,28824, 25688,26776, 25720,30872, 25784,29848,
+    25816,27800, 25848,31896, 25912,29336, 25944,27288, 25976,31384, 26008,26264,
+    26040,30360, 26072,28312, 26104,32408, 26168,29080, 26200,27032, 26232,31128,
+    26296,30104, 26328,28056, 26360,32152, 26424,29592, 26456,27544, 26488,31640,
+    26552,30616, 26584,28568, 26616,32664, 26680,28760, 26744,30808, 26808,29784,
+    26840,27736, 26872,31832, 26936,29272, 26968,27224, 27000,31320, 27064,30296,
+    27096,28248, 27128,32344, 27192,29016, 27256,31064, 27320,30040, 27352,27992,
+    27384,32088, 27448,29528, 27512,31576, 27576,30552, 27608,28504, 27640,32600,
+    27704,28888, 27768,30936, 27832,29912, 27896,31960, 27960,29400, 28024,31448,
+    28088,30424, 28120,28376, 28152,32472, 28216,29144, 28280,31192, 28344,30168,
+    28408,32216, 28472,29656, 28536,31704, 28600,30680, 28664,32728, 28792,30776,
+    28856,29752, 28920,31800, 28984,29240, 29048,31288, 29112,30264, 29176,32312,
+    29304,31032, 29368,30008, 29432,32056, 29560,31544, 29624,30520, 29688,32568,
+    29816,30904, 29944,31928, 30072,31416, 30136,30392, 30200,32440, 30328,31160,
+    30456,32184, 30584,31672, 30712,32696, 30968,31864, 31096,31352, 31224,32376,
+    31480,32120, 31736,32632, 32248,32504
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32)
+/**
+  @par
+  Example code for Double Precision Floating-point RFFT Twiddle factors Generation:
+  @par
+  <pre>TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' </pre>
+  @par
+  Real and Imag values are in interleaved fashion
+*/
+const uint64_t twiddleCoefF64_rfft_32[32] = {
+    0x0000000000000000,     0x3ff0000000000000,     //      0,       1
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //0.19509, 0.98079
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //0.38268, 0.92388
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //0.55557, 0.83147
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //0.70711, 0.70711
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //0.83147, 0.55557
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //0.92388, 0.38268
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //0.98079, 0.19509
+    0x3ff0000000000000,     0x0000000000000000,     //      1,       0
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //0.98079,-0.19509
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //0.92388,-0.38268
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //0.83147,-0.55557
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //0.70711,-0.70711
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //0.55557,-0.83147
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //0.38268,-0.92388
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //0.19509,-0.98079
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64)
+const uint64_t twiddleCoefF64_rfft_64[64] = {
+    0x0000000000000000,     0x3ff0000000000000,     //       0,        1'
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     //0.098017,  0.99518'
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     // 0.19509,  0.98079'
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     // 0.29028,  0.95694'
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     // 0.38268,  0.92388'
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  0.4714,  0.88192'
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // 0.55557,  0.83147'
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     // 0.63439,  0.77301'
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // 0.70711,  0.70711'
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     // 0.77301,  0.63439'
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // 0.83147,  0.55557'
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     // 0.88192,   0.4714'
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     // 0.92388,  0.38268'
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     // 0.95694,  0.29028'
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     // 0.98079,  0.19509'
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     // 0.99518, 0.098017'
+    0x3ff0000000000000,     0x0000000000000000,     //       1,        0'
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     // 0.99518,-0.098017'
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     // 0.98079, -0.19509'
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     // 0.95694, -0.29028'
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     // 0.92388, -0.38268'
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     // 0.88192,  -0.4714'
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // 0.83147, -0.55557'
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     // 0.77301, -0.63439'
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // 0.70711, -0.70711'
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     // 0.63439, -0.77301'
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // 0.55557, -0.83147'
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  0.4714, -0.88192'
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     // 0.38268, -0.92388'
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     // 0.29028, -0.95694'
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     // 0.19509, -0.98079'
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     //0.098017, -0.99518'
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128)
+const uint64_t twiddleCoefF64_rfft_128[128] = {
+    0x0000000000000000,     0x3ff0000000000000,     //       0,        1'
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     //0.049068,   0.9988'
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     //0.098017,  0.99518'
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     // 0.14673,  0.98918'
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     // 0.19509,  0.98079'
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     // 0.24298,  0.97003'
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     // 0.29028,  0.95694'
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     // 0.33689,  0.94154'
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     // 0.38268,  0.92388'
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     // 0.42756,  0.90399'
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  0.4714,  0.88192'
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //  0.5141,  0.85773'
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // 0.55557,  0.83147'
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //  0.5957,  0.80321'
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     // 0.63439,  0.77301'
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     // 0.67156,  0.74095'
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // 0.70711,  0.70711'
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     // 0.74095,  0.67156'
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     // 0.77301,  0.63439'
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     // 0.80321,   0.5957'
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // 0.83147,  0.55557'
+    0x3feb728345196e3e,     0x3fe073879922ffed,     // 0.85773,   0.5141'
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     // 0.88192,   0.4714'
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     // 0.90399,  0.42756'
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     // 0.92388,  0.38268'
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     // 0.94154,  0.33689'
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     // 0.95694,  0.29028'
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     // 0.97003,  0.24298'
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     // 0.98079,  0.19509'
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     // 0.98918,  0.14673'
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     // 0.99518, 0.098017'
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //  0.9988, 0.049068'
+    0x3ff0000000000000,     0x0000000000000000,     //       1,        0'
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //  0.9988,-0.049068'
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     // 0.99518,-0.098017'
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     // 0.98918, -0.14673'
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     // 0.98079, -0.19509'
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     // 0.97003, -0.24298'
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     // 0.95694, -0.29028'
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     // 0.94154, -0.33689'
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     // 0.92388, -0.38268'
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     // 0.90399, -0.42756'
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     // 0.88192,  -0.4714'
+    0x3feb728345196e3e,     0xbfe073879922ffed,     // 0.85773,  -0.5141'
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // 0.83147, -0.55557'
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     // 0.80321,  -0.5957'
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     // 0.77301, -0.63439'
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     // 0.74095, -0.67156'
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // 0.70711, -0.70711'
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     // 0.67156, -0.74095'
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     // 0.63439, -0.77301'
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //  0.5957, -0.80321'
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // 0.55557, -0.83147'
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //  0.5141, -0.85773'
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  0.4714, -0.88192'
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     // 0.42756, -0.90399'
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     // 0.38268, -0.92388'
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     // 0.33689, -0.94154'
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     // 0.29028, -0.95694'
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     // 0.24298, -0.97003'
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     // 0.19509, -0.98079'
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     // 0.14673, -0.98918'
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     //0.098017, -0.99518'
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     //0.049068,  -0.9988'
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256)
+const uint64_t twiddleCoefF64_rfft_256[256] = {
+    0x0000000000000000,     0x3ff0000000000000,     //       0,        1
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     //0.024541,   0.9997
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     //0.049068,   0.9988
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     //0.073565,  0.99729
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     //0.098017,  0.99518
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     // 0.12241,  0.99248
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     // 0.14673,  0.98918
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     // 0.17096,  0.98528
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     // 0.19509,  0.98079
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //  0.2191,   0.9757
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     // 0.24298,  0.97003
+    0x3fd111d262b1f677,     0x3feed740e7684963,     // 0.26671,  0.96378
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     // 0.29028,  0.95694
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     // 0.31368,  0.94953
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     // 0.33689,  0.94154
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //  0.3599,  0.93299
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     // 0.38268,  0.92388
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     // 0.40524,  0.91421
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     // 0.42756,  0.90399
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     // 0.44961,  0.89322
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  0.4714,  0.88192
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //  0.4929,  0.87009
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //  0.5141,  0.85773
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //   0.535,  0.84485
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // 0.55557,  0.83147
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     // 0.57581,  0.81758
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //  0.5957,  0.80321
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     // 0.61523,  0.78835
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     // 0.63439,  0.77301
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     // 0.65317,  0.75721
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     // 0.67156,  0.74095
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     // 0.68954,  0.72425
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // 0.70711,  0.70711
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     // 0.72425,  0.68954
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     // 0.74095,  0.67156
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     // 0.75721,  0.65317
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     // 0.77301,  0.63439
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     // 0.78835,  0.61523
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     // 0.80321,   0.5957
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     // 0.81758,  0.57581
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // 0.83147,  0.55557
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     // 0.84485,    0.535
+    0x3feb728345196e3e,     0x3fe073879922ffed,     // 0.85773,   0.5141
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     // 0.87009,   0.4929
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     // 0.88192,   0.4714
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     // 0.89322,  0.44961
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     // 0.90399,  0.42756
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     // 0.91421,  0.40524
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     // 0.92388,  0.38268
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     // 0.93299,   0.3599
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     // 0.94154,  0.33689
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     // 0.94953,  0.31368
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     // 0.95694,  0.29028
+    0x3feed740e7684963,     0x3fd111d262b1f677,     // 0.96378,  0.26671
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     // 0.97003,  0.24298
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //  0.9757,   0.2191
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     // 0.98079,  0.19509
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     // 0.98528,  0.17096
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     // 0.98918,  0.14673
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     // 0.99248,  0.12241
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     // 0.99518, 0.098017
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     // 0.99729, 0.073565
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //  0.9988, 0.049068
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //  0.9997, 0.024541
+    0x3ff0000000000000,     0x0000000000000000,     //       1,        0
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //  0.9997,-0.024541
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //  0.9988,-0.049068
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     // 0.99729,-0.073565
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     // 0.99518,-0.098017
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     // 0.99248, -0.12241
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     // 0.98918, -0.14673
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     // 0.98528, -0.17096
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     // 0.98079, -0.19509
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //  0.9757,  -0.2191
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     // 0.97003, -0.24298
+    0x3feed740e7684963,     0xbfd111d262b1f677,     // 0.96378, -0.26671
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     // 0.95694, -0.29028
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     // 0.94953, -0.31368
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     // 0.94154, -0.33689
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     // 0.93299,  -0.3599
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     // 0.92388, -0.38268
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     // 0.91421, -0.40524
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     // 0.90399, -0.42756
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     // 0.89322, -0.44961
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     // 0.88192,  -0.4714
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     // 0.87009,  -0.4929
+    0x3feb728345196e3e,     0xbfe073879922ffed,     // 0.85773,  -0.5141
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     // 0.84485,   -0.535
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // 0.83147, -0.55557
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     // 0.81758, -0.57581
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     // 0.80321,  -0.5957
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     // 0.78835, -0.61523
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     // 0.77301, -0.63439
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     // 0.75721, -0.65317
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     // 0.74095, -0.67156
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     // 0.72425, -0.68954
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // 0.70711, -0.70711
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     // 0.68954, -0.72425
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     // 0.67156, -0.74095
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     // 0.65317, -0.75721
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     // 0.63439, -0.77301
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     // 0.61523, -0.78835
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //  0.5957, -0.80321
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     // 0.57581, -0.81758
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // 0.55557, -0.83147
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //   0.535, -0.84485
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //  0.5141, -0.85773
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //  0.4929, -0.87009
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  0.4714, -0.88192
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     // 0.44961, -0.89322
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     // 0.42756, -0.90399
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     // 0.40524, -0.91421
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     // 0.38268, -0.92388
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //  0.3599, -0.93299
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     // 0.33689, -0.94154
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     // 0.31368, -0.94953
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     // 0.29028, -0.95694
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     // 0.26671, -0.96378
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     // 0.24298, -0.97003
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //  0.2191,  -0.9757
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     // 0.19509, -0.98079
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     // 0.17096, -0.98528
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     // 0.14673, -0.98918
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     // 0.12241, -0.99248
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     //0.098017, -0.99518
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     //0.073565, -0.99729
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     //0.049068,  -0.9988'
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     //0.024541,  -0.9997
+        
+            
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512)
+const uint64_t twiddleCoefF64_rfft_512[512] = {
+    0x0000000000000000,     0x3ff0000000000000,     //       0,        1'
+    0x3f8921d1fcdec784,     0x3fefff62169b92db,     //0.012272,  0.99992'
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     //0.024541,   0.9997'
+    0x3fa2d865759455cd,     0x3feffa72effef75d,     //0.036807,  0.99932'
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     //0.049068,   0.9988'
+    0x3faf656e79f820e0,     0x3feff095658e71ad,     //0.061321,  0.99812'
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     //0.073565,  0.99729'
+    0x3fb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     //0.085797,  0.99631'
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     //0.098017,  0.99518'
+    0x3fbc3785c79ec2d5,     0x3fefce15fd6da67b,     // 0.11022,  0.99391'
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     // 0.12241,  0.99248'
+    0x3fc139f0cedaf576,     0x3fefb5797195d741,     // 0.13458,   0.9909'
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     // 0.14673,  0.98918'
+    0x3fc45576b1293e5a,     0x3fef97f924c9099b,     // 0.15886,   0.9873'
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     // 0.17096,  0.98528'
+    0x3fc76dd9de50bf31,     0x3fef7599a3a12077,     // 0.18304,  0.98311'
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     // 0.19509,  0.98079'
+    0x3fca82a025b00451,     0x3fef4e603b0b2f2d,     // 0.20711,  0.97832'
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //  0.2191,   0.9757'
+    0x3fcd934fe5454311,     0x3fef2252f7763ada,     // 0.23106,  0.97294'
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     // 0.24298,  0.97003'
+    0x3fd04fb80e37fdae,     0x3feef178a3e473c2,     // 0.25487,  0.96698'
+    0x3fd111d262b1f677,     0x3feed740e7684963,     // 0.26671,  0.96378'
+    0x3fd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     // 0.27852,  0.96043'
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     // 0.29028,  0.95694'
+    0x3fd35410c2e18152,     0x3fee817bab4cd10d,     // 0.30201,  0.95331'
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     // 0.31368,  0.94953'
+    0x3fd4d1e24278e76a,     0x3fee426a4b2bc17e,     // 0.32531,  0.94561'
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     // 0.33689,  0.94154'
+    0x3fd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     // 0.34842,  0.93734'
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //  0.3599,  0.93299'
+    0x3fd7c3a9311dcce7,     0x3fedb6526238a09b,     // 0.37132,  0.92851'
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     // 0.38268,  0.92388'
+    0x3fd9372a63bc93d7,     0x3fed696173c9e68b,     // 0.39399,  0.91911'
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     // 0.40524,  0.91421'
+    0x3fdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     // 0.41643,  0.90917'
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     // 0.42756,  0.90399'
+    0x3fdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     // 0.43862,  0.89867'
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     // 0.44961,  0.89322'
+    0x3fdd79775b86e389,     0x3fec678b3488739b,     // 0.46054,  0.88764'
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //  0.4714,  0.88192'
+    0x3fdedc1952ef78d5,     0x3fec08c426725549,     // 0.48218,  0.87607'
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //  0.4929,  0.87009'
+    0x3fe01cfc874c3eb7,     0x3feba5aa673590d2,     // 0.50354,  0.86397'
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //  0.5141,  0.85773'
+    0x3fe0c9704d5d898f,     0x3feb3e4d3ef55712,     // 0.52459,  0.85136'
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //   0.535,  0.84485'
+    0x3fe1734d63dedb49,     0x3fead2bc9e21d511,     // 0.54532,  0.83822'
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     // 0.55557,  0.83147'
+    0x3fe21a799933eb58,     0x3fea63091b02fae2,     // 0.56573,  0.82459'
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     // 0.57581,  0.81758'
+    0x3fe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //  0.5858,  0.81046'
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //  0.5957,  0.80321'
+    0x3fe36058b10659f3,     0x3fe9777ef4c7d742,     // 0.60551,  0.79584'
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     // 0.61523,  0.78835'
+    0x3fe3fed9534556d4,     0x3fe8fbcca3ef940d,     // 0.62486,  0.78074'
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     // 0.63439,  0.77301'
+    0x3fe49a449b9b0938,     0x3fe87c400fba2ebf,     // 0.64383,  0.76517'
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     // 0.65317,  0.75721'
+    0x3fe5328292a35596,     0x3fe7f8ece3571771,     // 0.66242,  0.74914'
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     // 0.67156,  0.74095'
+    0x3fe5c77bbe65018c,     0x3fe771e75f037261,     //  0.6806,  0.73265'
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     // 0.68954,  0.72425'
+    0x3fe6591925f0783e,     0x3fe6e74454eaa8ae,     // 0.69838,  0.71573'
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     // 0.70711,  0.70711'
+    0x3fe6e74454eaa8ae,     0x3fe6591925f0783e,     // 0.71573,  0.69838'
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     // 0.72425,  0.68954'
+    0x3fe771e75f037261,     0x3fe5c77bbe65018c,     // 0.73265,   0.6806'
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     // 0.74095,  0.67156'
+    0x3fe7f8ece3571771,     0x3fe5328292a35596,     // 0.74914,  0.66242'
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     // 0.75721,  0.65317'
+    0x3fe87c400fba2ebf,     0x3fe49a449b9b0938,     // 0.76517,  0.64383'
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     // 0.77301,  0.63439'
+    0x3fe8fbcca3ef940d,     0x3fe3fed9534556d4,     // 0.78074,  0.62486'
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     // 0.78835,  0.61523'
+    0x3fe9777ef4c7d742,     0x3fe36058b10659f3,     // 0.79584,  0.60551'
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     // 0.80321,   0.5957'
+    0x3fe9ef43ef29af94,     0x3fe2bedb25faf3ea,     // 0.81046,   0.5858'
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     // 0.81758,  0.57581'
+    0x3fea63091b02fae2,     0x3fe21a799933eb58,     // 0.82459,  0.56573'
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     // 0.83147,  0.55557'
+    0x3fead2bc9e21d511,     0x3fe1734d63dedb49,     // 0.83822,  0.54532'
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     // 0.84485,    0.535'
+    0x3feb3e4d3ef55712,     0x3fe0c9704d5d898f,     // 0.85136,  0.52459'
+    0x3feb728345196e3e,     0x3fe073879922ffed,     // 0.85773,   0.5141'
+    0x3feba5aa673590d2,     0x3fe01cfc874c3eb7,     // 0.86397,  0.50354'
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     // 0.87009,   0.4929'
+    0x3fec08c426725549,     0x3fdedc1952ef78d5,     // 0.87607,  0.48218'
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     // 0.88192,   0.4714'
+    0x3fec678b3488739b,     0x3fdd79775b86e389,     // 0.88764,  0.46054'
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     // 0.89322,  0.44961'
+    0x3fecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     // 0.89867,  0.43862'
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     // 0.90399,  0.42756'
+    0x3fed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     // 0.90917,  0.41643'
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     // 0.91421,  0.40524'
+    0x3fed696173c9e68b,     0x3fd9372a63bc93d7,     // 0.91911,  0.39399'
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     // 0.92388,  0.38268'
+    0x3fedb6526238a09b,     0x3fd7c3a9311dcce7,     // 0.92851,  0.37132'
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     // 0.93299,   0.3599'
+    0x3fedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     // 0.93734,  0.34842'
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     // 0.94154,  0.33689'
+    0x3fee426a4b2bc17e,     0x3fd4d1e24278e76a,     // 0.94561,  0.32531'
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     // 0.94953,  0.31368'
+    0x3fee817bab4cd10d,     0x3fd35410c2e18152,     // 0.95331,  0.30201'
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     // 0.95694,  0.29028'
+    0x3feebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     // 0.96043,  0.27852'
+    0x3feed740e7684963,     0x3fd111d262b1f677,     // 0.96378,  0.26671'
+    0x3feef178a3e473c2,     0x3fd04fb80e37fdae,     // 0.96698,  0.25487'
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     // 0.97003,  0.24298'
+    0x3fef2252f7763ada,     0x3fcd934fe5454311,     // 0.97294,  0.23106'
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //  0.9757,   0.2191'
+    0x3fef4e603b0b2f2d,     0x3fca82a025b00451,     // 0.97832,  0.20711'
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     // 0.98079,  0.19509'
+    0x3fef7599a3a12077,     0x3fc76dd9de50bf31,     // 0.98311,  0.18304'
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     // 0.98528,  0.17096'
+    0x3fef97f924c9099b,     0x3fc45576b1293e5a,     //  0.9873,  0.15886'
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     // 0.98918,  0.14673'
+    0x3fefb5797195d741,     0x3fc139f0cedaf576,     //  0.9909,  0.13458'
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     // 0.99248,  0.12241'
+    0x3fefce15fd6da67b,     0x3fbc3785c79ec2d5,     // 0.99391,  0.11022'
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     // 0.99518, 0.098017'
+    0x3fefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     // 0.99631, 0.085797'
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     // 0.99729, 0.073565'
+    0x3feff095658e71ad,     0x3faf656e79f820e0,     // 0.99812, 0.061321'
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //  0.9988, 0.049068'
+    0x3feffa72effef75d,     0x3fa2d865759455cd,     // 0.99932, 0.036807'
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //  0.9997, 0.024541'
+    0x3fefff62169b92db,     0x3f8921d1fcdec784,     // 0.99992, 0.012272'
+    0x3ff0000000000000,     0x0000000000000000,     //       1,        0'
+    0x3fefff62169b92db,     0xbf8921d1fcdec784,     // 0.99992,-0.012272'
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //  0.9997,-0.024541'
+    0x3feffa72effef75d,     0xbfa2d865759455cd,     // 0.99932,-0.036807'
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //  0.9988,-0.049068'
+    0x3feff095658e71ad,     0xbfaf656e79f820e0,     // 0.99812,-0.061321'
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     // 0.99729,-0.073565'
+    0x3fefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     // 0.99631,-0.085797'
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     // 0.99518,-0.098017'
+    0x3fefce15fd6da67b,     0xbfbc3785c79ec2d5,     // 0.99391, -0.11022'
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     // 0.99248, -0.12241'
+    0x3fefb5797195d741,     0xbfc139f0cedaf576,     //  0.9909, -0.13458'
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     // 0.98918, -0.14673'
+    0x3fef97f924c9099b,     0xbfc45576b1293e5a,     //  0.9873, -0.15886'
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     // 0.98528, -0.17096'
+    0x3fef7599a3a12077,     0xbfc76dd9de50bf31,     // 0.98311, -0.18304'
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     // 0.98079, -0.19509'
+    0x3fef4e603b0b2f2d,     0xbfca82a025b00451,     // 0.97832, -0.20711'
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //  0.9757,  -0.2191'
+    0x3fef2252f7763ada,     0xbfcd934fe5454311,     // 0.97294, -0.23106'
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     // 0.97003, -0.24298'
+    0x3feef178a3e473c2,     0xbfd04fb80e37fdae,     // 0.96698, -0.25487'
+    0x3feed740e7684963,     0xbfd111d262b1f677,     // 0.96378, -0.26671'
+    0x3feebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     // 0.96043, -0.27852'
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     // 0.95694, -0.29028'
+    0x3fee817bab4cd10d,     0xbfd35410c2e18152,     // 0.95331, -0.30201'
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     // 0.94953, -0.31368'
+    0x3fee426a4b2bc17e,     0xbfd4d1e24278e76a,     // 0.94561, -0.32531'
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     // 0.94154, -0.33689'
+    0x3fedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     // 0.93734, -0.34842'
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     // 0.93299,  -0.3599'
+    0x3fedb6526238a09b,     0xbfd7c3a9311dcce7,     // 0.92851, -0.37132'
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     // 0.92388, -0.38268'
+    0x3fed696173c9e68b,     0xbfd9372a63bc93d7,     // 0.91911, -0.39399'
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     // 0.91421, -0.40524'
+    0x3fed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     // 0.90917, -0.41643'
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     // 0.90399, -0.42756'
+    0x3fecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     // 0.89867, -0.43862'
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     // 0.89322, -0.44961'
+    0x3fec678b3488739b,     0xbfdd79775b86e389,     // 0.88764, -0.46054'
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     // 0.88192,  -0.4714'
+    0x3fec08c426725549,     0xbfdedc1952ef78d5,     // 0.87607, -0.48218'
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     // 0.87009,  -0.4929'
+    0x3feba5aa673590d2,     0xbfe01cfc874c3eb7,     // 0.86397, -0.50354'
+    0x3feb728345196e3e,     0xbfe073879922ffed,     // 0.85773,  -0.5141'
+    0x3feb3e4d3ef55712,     0xbfe0c9704d5d898f,     // 0.85136, -0.52459'
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     // 0.84485,   -0.535'
+    0x3fead2bc9e21d511,     0xbfe1734d63dedb49,     // 0.83822, -0.54532'
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     // 0.83147, -0.55557'
+    0x3fea63091b02fae2,     0xbfe21a799933eb58,     // 0.82459, -0.56573'
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     // 0.81758, -0.57581'
+    0x3fe9ef43ef29af94,     0xbfe2bedb25faf3ea,     // 0.81046,  -0.5858'
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     // 0.80321,  -0.5957'
+    0x3fe9777ef4c7d742,     0xbfe36058b10659f3,     // 0.79584, -0.60551'
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     // 0.78835, -0.61523'
+    0x3fe8fbcca3ef940d,     0xbfe3fed9534556d4,     // 0.78074, -0.62486'
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     // 0.77301, -0.63439'
+    0x3fe87c400fba2ebf,     0xbfe49a449b9b0938,     // 0.76517, -0.64383'
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     // 0.75721, -0.65317'
+    0x3fe7f8ece3571771,     0xbfe5328292a35596,     // 0.74914, -0.66242'
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     // 0.74095, -0.67156'
+    0x3fe771e75f037261,     0xbfe5c77bbe65018c,     // 0.73265,  -0.6806'
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     // 0.72425, -0.68954'
+    0x3fe6e74454eaa8ae,     0xbfe6591925f0783e,     // 0.71573, -0.69838'
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     // 0.70711, -0.70711'
+    0x3fe6591925f0783e,     0xbfe6e74454eaa8ae,     // 0.69838, -0.71573'
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     // 0.68954, -0.72425'
+    0x3fe5c77bbe65018c,     0xbfe771e75f037261,     //  0.6806, -0.73265'
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     // 0.67156, -0.74095'
+    0x3fe5328292a35596,     0xbfe7f8ece3571771,     // 0.66242, -0.74914'
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     // 0.65317, -0.75721'
+    0x3fe49a449b9b0938,     0xbfe87c400fba2ebf,     // 0.64383, -0.76517'
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     // 0.63439, -0.77301'
+    0x3fe3fed9534556d4,     0xbfe8fbcca3ef940d,     // 0.62486, -0.78074'
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     // 0.61523, -0.78835'
+    0x3fe36058b10659f3,     0xbfe9777ef4c7d742,     // 0.60551, -0.79584'
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //  0.5957, -0.80321'
+    0x3fe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //  0.5858, -0.81046'
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     // 0.57581, -0.81758'
+    0x3fe21a799933eb58,     0xbfea63091b02fae2,     // 0.56573, -0.82459'
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     // 0.55557, -0.83147'
+    0x3fe1734d63dedb49,     0xbfead2bc9e21d511,     // 0.54532, -0.83822'
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //   0.535, -0.84485'
+    0x3fe0c9704d5d898f,     0xbfeb3e4d3ef55712,     // 0.52459, -0.85136'
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //  0.5141, -0.85773'
+    0x3fe01cfc874c3eb7,     0xbfeba5aa673590d2,     // 0.50354, -0.86397'
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //  0.4929, -0.87009'
+    0x3fdedc1952ef78d5,     0xbfec08c426725549,     // 0.48218, -0.87607'
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //  0.4714, -0.88192'
+    0x3fdd79775b86e389,     0xbfec678b3488739b,     // 0.46054, -0.88764'
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     // 0.44961, -0.89322'
+    0x3fdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     // 0.43862, -0.89867'
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     // 0.42756, -0.90399'
+    0x3fdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     // 0.41643, -0.90917'
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     // 0.40524, -0.91421'
+    0x3fd9372a63bc93d7,     0xbfed696173c9e68b,     // 0.39399, -0.91911'
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     // 0.38268, -0.92388'
+    0x3fd7c3a9311dcce7,     0xbfedb6526238a09b,     // 0.37132, -0.92851'
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //  0.3599, -0.93299'
+    0x3fd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     // 0.34842, -0.93734'
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     // 0.33689, -0.94154'
+    0x3fd4d1e24278e76a,     0xbfee426a4b2bc17e,     // 0.32531, -0.94561'
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     // 0.31368, -0.94953'
+    0x3fd35410c2e18152,     0xbfee817bab4cd10d,     // 0.30201, -0.95331'
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     // 0.29028, -0.95694'
+    0x3fd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     // 0.27852, -0.96043'
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     // 0.26671, -0.96378'
+    0x3fd04fb80e37fdae,     0xbfeef178a3e473c2,     // 0.25487, -0.96698'
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     // 0.24298, -0.97003'
+    0x3fcd934fe5454311,     0xbfef2252f7763ada,     // 0.23106, -0.97294'
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //  0.2191,  -0.9757'
+    0x3fca82a025b00451,     0xbfef4e603b0b2f2d,     // 0.20711, -0.97832'
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     // 0.19509, -0.98079'
+    0x3fc76dd9de50bf31,     0xbfef7599a3a12077,     // 0.18304, -0.98311'
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     // 0.17096, -0.98528'
+    0x3fc45576b1293e5a,     0xbfef97f924c9099b,     // 0.15886,  -0.9873'
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     // 0.14673, -0.98918'
+    0x3fc139f0cedaf576,     0xbfefb5797195d741,     // 0.13458,  -0.9909'
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     // 0.12241, -0.99248'
+    0x3fbc3785c79ec2d5,     0xbfefce15fd6da67b,     // 0.11022, -0.99391'
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     //0.098017, -0.99518'
+    0x3fb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     //0.085797, -0.99631'
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     //0.073565, -0.99729'
+    0x3faf656e79f820e0,     0xbfeff095658e71ad,     //0.061321, -0.99812'
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     //0.049068,  -0.9988'
+    0x3fa2d865759455cd,     0xbfeffa72effef75d,     //0.036807, -0.99932'
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     //0.024541,  -0.9997'
+    0x3f8921d1fcdec784,     0xbfefff62169b92db,     //0.012272, -0.99992'
+
+
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024)
+const uint64_t twiddleCoefF64_rfft_1024[1024] = {
+    0x0000000000000000,     0x3ff0000000000000,     //        0,         1'
+    0x3f7921f0fe670071,     0x3fefffd8858e8a92,     //0.0061359,   0.99998'
+    0x3f8921d1fcdec784,     0x3fefff62169b92db,     // 0.012272,   0.99992'
+    0x3f92d936bbe30efd,     0x3feffe9cb44b51a1,     // 0.018407,   0.99983'
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     // 0.024541,    0.9997'
+    0x3f9f693731d1cf01,     0x3feffc251df1d3f8,     // 0.030675,   0.99953'
+    0x3fa2d865759455cd,     0x3feffa72effef75d,     // 0.036807,   0.99932'
+    0x3fa5fc00d290cd43,     0x3feff871dadb81df,     // 0.042938,   0.99908'
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     // 0.049068,    0.9988'
+    0x3fac428d12c0d7e3,     0x3feff3830f8d575c,     // 0.055195,   0.99848'
+    0x3faf656e79f820e0,     0x3feff095658e71ad,     // 0.061321,   0.99812'
+    0x3fb1440134d709b2,     0x3fefed58ecb673c4,     // 0.067444,   0.99772'
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     // 0.073565,   0.99729'
+    0x3fb4661179272096,     0x3fefe5f3af2e3940,     // 0.079682,   0.99682'
+    0x3fb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     // 0.085797,   0.99631'
+    0x3fb787586a5d5b21,     0x3fefdd539ff1f456,     // 0.091909,   0.99577'
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     // 0.098017,   0.99518'
+    0x3fbaa7b724495c04,     0x3fefd37914220b84,     //  0.10412,   0.99456'
+    0x3fbc3785c79ec2d5,     0x3fefce15fd6da67b,     //  0.11022,   0.99391'
+    0x3fbdc70ecbae9fc8,     0x3fefc8646cfeb721,     //  0.11632,   0.99321'
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     //  0.12241,   0.99248'
+    0x3fc072a047ba831d,     0x3fefbc1617e44186,     //   0.1285,   0.99171'
+    0x3fc139f0cedaf576,     0x3fefb5797195d741,     //  0.13458,    0.9909'
+    0x3fc20116d4ec7bce,     0x3fefae8e8e46cfbb,     //  0.14066,   0.99006'
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //  0.14673,   0.98918'
+    0x3fc38edbb0cd8d14,     0x3fef9fce55adb2c8,     //   0.1528,   0.98826'
+    0x3fc45576b1293e5a,     0x3fef97f924c9099b,     //  0.15886,    0.9873'
+    0x3fc51bdf8597c5f2,     0x3fef8fd5ffae41db,     //  0.16491,   0.98631'
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     //  0.17096,   0.98528'
+    0x3fc6a81304f64ab2,     0x3fef7ea629e63d6e,     //    0.177,   0.98421'
+    0x3fc76dd9de50bf31,     0x3fef7599a3a12077,     //  0.18304,   0.98311'
+    0x3fc83366e89c64c5,     0x3fef6c3f7df5bbb7,     //  0.18907,   0.98196'
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  0.19509,   0.98079'
+    0x3fc9bdcbf2dc4366,     0x3fef58a2b1789e84,     //   0.2011,   0.97957'
+    0x3fca82a025b00451,     0x3fef4e603b0b2f2d,     //  0.20711,   0.97832'
+    0x3fcb4732ef3d6722,     0x3fef43d085ff92dd,     //  0.21311,   0.97703'
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //   0.2191,    0.9757'
+    0x3fcccf8cb312b286,     0x3fef2dc9c9089a9d,     //  0.22508,   0.97434'
+    0x3fcd934fe5454311,     0x3fef2252f7763ada,     //  0.23106,   0.97294'
+    0x3fce56ca1e101a1b,     0x3fef168f53f7205d,     //  0.23702,    0.9715'
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  0.24298,   0.97003'
+    0x3fcfdcdc1adfedf8,     0x3feefe220c0b95ec,     //  0.24893,   0.96852'
+    0x3fd04fb80e37fdae,     0x3feef178a3e473c2,     //  0.25487,   0.96698'
+    0x3fd0b0d9cfdbdb90,     0x3feee482e25a9dbc,     //  0.26079,   0.96539'
+    0x3fd111d262b1f677,     0x3feed740e7684963,     //  0.26671,   0.96378'
+    0x3fd172a0d7765177,     0x3feec9b2d3c3bf84,     //  0.27262,   0.96212'
+    0x3fd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //  0.27852,   0.96043'
+    0x3fd233bbabc3bb72,     0x3feeadb2e8e7a88e,     //  0.28441,    0.9587'
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //  0.29028,   0.95694'
+    0x3fd2f422daec0386,     0x3fee9084361df7f3,     //  0.29615,   0.95514'
+    0x3fd35410c2e18152,     0x3fee817bab4cd10d,     //  0.30201,   0.95331'
+    0x3fd3b3cefa0414b7,     0x3fee7227db6a9744,     //  0.30785,   0.95144'
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     //  0.31368,   0.94953'
+    0x3fd472b8a5571054,     0x3fee529f04729ffc,     //   0.3195,   0.94759'
+    0x3fd4d1e24278e76a,     0x3fee426a4b2bc17e,     //  0.32531,   0.94561'
+    0x3fd530d880af3c24,     0x3fee31eae870ce25,     //  0.33111,   0.94359'
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //  0.33689,   0.94154'
+    0x3fd5ee27379ea693,     0x3fee100cca2980ac,     //  0.34266,   0.93946'
+    0x3fd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //  0.34842,   0.93734'
+    0x3fd6aa9d7dc77e16,     0x3feded05f7de47da,     //  0.35416,   0.93518'
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //   0.3599,   0.93299'
+    0x3fd766340f2418f6,     0x3fedc8d7cb410260,     //  0.36561,   0.93077'
+    0x3fd7c3a9311dcce7,     0x3fedb6526238a09b,     //  0.37132,   0.92851'
+    0x3fd820e3b04eaac4,     0x3feda383a9668988,     //  0.37701,   0.92621'
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //  0.38268,   0.92388'
+    0x3fd8daa52ec8a4af,     0x3fed7d0b02b8ecf9,     //  0.38835,   0.92151'
+    0x3fd9372a63bc93d7,     0x3fed696173c9e68b,     //  0.39399,   0.91911'
+    0x3fd993716141bdfe,     0x3fed556f52e93eb1,     //  0.39962,   0.91668'
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //  0.40524,   0.91421'
+    0x3fda4b4127dea1e4,     0x3fed2cb220e0ef9f,     //  0.41084,   0.91171'
+    0x3fdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //  0.41643,   0.90917'
+    0x3fdb020d6c7f4009,     0x3fed02d4feb2bd92,     //    0.422,    0.9066'
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //  0.42756,   0.90399'
+    0x3fdbb7cf2304bd01,     0x3fecd7d9898b32f6,     //  0.43309,   0.90135'
+    0x3fdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //  0.43862,   0.89867'
+    0x3fdc6c7f4997000a,     0x3fecabc169a0b901,     //  0.44412,   0.89597'
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     //  0.44961,   0.89322'
+    0x3fdd2016e8e9db5b,     0x3fec7e8e52233cf3,     //  0.45508,   0.89045'
+    0x3fdd79775b86e389,     0x3fec678b3488739b,     //  0.46054,   0.88764'
+    0x3fddd28f1481cc58,     0x3fec5042012b6907,     //  0.46598,    0.8848'
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   0.4714,   0.88192'
+    0x3fde83e0eaf85113,     0x3fec20de3fa971b0,     //   0.4768,   0.87901'
+    0x3fdedc1952ef78d5,     0x3fec08c426725549,     //  0.48218,   0.87607'
+    0x3fdf3405963fd068,     0x3febf064e15377dd,     //  0.48755,   0.87309'
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //   0.4929,   0.87009'
+    0x3fdfe2f64be7120f,     0x3febbed7c49380ea,     //  0.49823,   0.86705'
+    0x3fe01cfc874c3eb7,     0x3feba5aa673590d2,     //  0.50354,   0.86397'
+    0x3fe0485626ae221a,     0x3feb8c38d27504e9,     //  0.50883,   0.86087'
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //   0.5141,   0.85773'
+    0x3fe09e907417c5e1,     0x3feb5889fe921405,     //  0.51936,   0.85456'
+    0x3fe0c9704d5d898f,     0x3feb3e4d3ef55712,     //  0.52459,   0.85136'
+    0x3fe0f426bb2a8e7d,     0x3feb23cd470013b4,     //   0.5298,   0.84812'
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //    0.535,   0.84485'
+    0x3fe14915af336ceb,     0x3feaee04b43c1474,     //  0.54017,   0.84155'
+    0x3fe1734d63dedb49,     0x3fead2bc9e21d511,     //  0.54532,   0.83822'
+    0x3fe19d5a09f2b9b8,     0x3feab7325916c0d4,     //  0.55046,   0.83486'
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  0.55557,   0.83147'
+    0x3fe1f0f08bbc861b,     0x3fea7f58529fe69d,     //  0.56066,   0.82805'
+    0x3fe21a799933eb58,     0x3fea63091b02fae2,     //  0.56573,   0.82459'
+    0x3fe243d5fb98ac1f,     0x3fea4678c8119ac8,     //  0.57078,    0.8211'
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     //  0.57581,   0.81758'
+    0x3fe2960727629ca8,     0x3fea0c95eabaf937,     //  0.58081,   0.81404'
+    0x3fe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //   0.5858,   0.81046'
+    0x3fe2e780e3e8ea16,     0x3fe9d1b1f5ea80d6,     //  0.59076,   0.80685'
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //   0.5957,   0.80321'
+    0x3fe338400d0c8e57,     0x3fe995cf2ed80d22,     //  0.60062,   0.79954'
+    0x3fe36058b10659f3,     0x3fe9777ef4c7d742,     //  0.60551,   0.79584'
+    0x3fe3884185dfeb22,     0x3fe958efe48e6dd7,     //  0.61038,   0.79211'
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     //  0.61523,   0.78835'
+    0x3fe3d78238c58343,     0x3fe91b166fd49da2,     //  0.62006,   0.78456'
+    0x3fe3fed9534556d4,     0x3fe8fbcca3ef940d,     //  0.62486,   0.78074'
+    0x3fe425ff178e6bb1,     0x3fe8dc45331698cc,     //  0.62964,   0.77689'
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //  0.63439,   0.77301'
+    0x3fe473b51b987347,     0x3fe89c7e9a4dd4ab,     //  0.63912,    0.7691'
+    0x3fe49a449b9b0938,     0x3fe87c400fba2ebf,     //  0.64383,   0.76517'
+    0x3fe4c0a145ec0004,     0x3fe85bc51ae958cc,     //  0.64851,    0.7612'
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //  0.65317,   0.75721'
+    0x3fe50cc09f59a09b,     0x3fe81a1b33b57acc,     //  0.65781,   0.75319'
+    0x3fe5328292a35596,     0x3fe7f8ece3571771,     //  0.66242,   0.74914'
+    0x3fe5581038975137,     0x3fe7d7836cc33db2,     //    0.667,   0.74506'
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //  0.67156,   0.74095'
+    0x3fe5a28d2a5d7250,     0x3fe79400574f55e4,     //  0.67609,   0.73682'
+    0x3fe5c77bbe65018c,     0x3fe771e75f037261,     //   0.6806,   0.73265'
+    0x3fe5ec3495837074,     0x3fe74f948da8d28d,     //  0.68508,   0.72846'
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     //  0.68954,   0.72425'
+    0x3fe63503a31c1be8,     0x3fe70a42b3176d7a,     //  0.69397,      0.72'
+    0x3fe6591925f0783e,     0x3fe6e74454eaa8ae,     //  0.69838,   0.71573'
+    0x3fe67cf78491af10,     0x3fe6c40d73c18275,     //  0.70275,   0.71143'
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  0.70711,   0.70711'
+    0x3fe6c40d73c18275,     0x3fe67cf78491af10,     //  0.71143,   0.70275'
+    0x3fe6e74454eaa8ae,     0x3fe6591925f0783e,     //  0.71573,   0.69838'
+    0x3fe70a42b3176d7a,     0x3fe63503a31c1be8,     //     0.72,   0.69397'
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     //  0.72425,   0.68954'
+    0x3fe74f948da8d28d,     0x3fe5ec3495837074,     //  0.72846,   0.68508'
+    0x3fe771e75f037261,     0x3fe5c77bbe65018c,     //  0.73265,    0.6806'
+    0x3fe79400574f55e4,     0x3fe5a28d2a5d7250,     //  0.73682,   0.67609'
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //  0.74095,   0.67156'
+    0x3fe7d7836cc33db2,     0x3fe5581038975137,     //  0.74506,     0.667'
+    0x3fe7f8ece3571771,     0x3fe5328292a35596,     //  0.74914,   0.66242'
+    0x3fe81a1b33b57acc,     0x3fe50cc09f59a09b,     //  0.75319,   0.65781'
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //  0.75721,   0.65317'
+    0x3fe85bc51ae958cc,     0x3fe4c0a145ec0004,     //   0.7612,   0.64851'
+    0x3fe87c400fba2ebf,     0x3fe49a449b9b0938,     //  0.76517,   0.64383'
+    0x3fe89c7e9a4dd4ab,     0x3fe473b51b987347,     //   0.7691,   0.63912'
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //  0.77301,   0.63439'
+    0x3fe8dc45331698cc,     0x3fe425ff178e6bb1,     //  0.77689,   0.62964'
+    0x3fe8fbcca3ef940d,     0x3fe3fed9534556d4,     //  0.78074,   0.62486'
+    0x3fe91b166fd49da2,     0x3fe3d78238c58343,     //  0.78456,   0.62006'
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     //  0.78835,   0.61523'
+    0x3fe958efe48e6dd7,     0x3fe3884185dfeb22,     //  0.79211,   0.61038'
+    0x3fe9777ef4c7d742,     0x3fe36058b10659f3,     //  0.79584,   0.60551'
+    0x3fe995cf2ed80d22,     0x3fe338400d0c8e57,     //  0.79954,   0.60062'
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //  0.80321,    0.5957'
+    0x3fe9d1b1f5ea80d6,     0x3fe2e780e3e8ea16,     //  0.80685,   0.59076'
+    0x3fe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //  0.81046,    0.5858'
+    0x3fea0c95eabaf937,     0x3fe2960727629ca8,     //  0.81404,   0.58081'
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     //  0.81758,   0.57581'
+    0x3fea4678c8119ac8,     0x3fe243d5fb98ac1f,     //   0.8211,   0.57078'
+    0x3fea63091b02fae2,     0x3fe21a799933eb58,     //  0.82459,   0.56573'
+    0x3fea7f58529fe69d,     0x3fe1f0f08bbc861b,     //  0.82805,   0.56066'
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  0.83147,   0.55557'
+    0x3feab7325916c0d4,     0x3fe19d5a09f2b9b8,     //  0.83486,   0.55046'
+    0x3fead2bc9e21d511,     0x3fe1734d63dedb49,     //  0.83822,   0.54532'
+    0x3feaee04b43c1474,     0x3fe14915af336ceb,     //  0.84155,   0.54017'
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     //  0.84485,     0.535'
+    0x3feb23cd470013b4,     0x3fe0f426bb2a8e7d,     //  0.84812,    0.5298'
+    0x3feb3e4d3ef55712,     0x3fe0c9704d5d898f,     //  0.85136,   0.52459'
+    0x3feb5889fe921405,     0x3fe09e907417c5e1,     //  0.85456,   0.51936'
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //  0.85773,    0.5141'
+    0x3feb8c38d27504e9,     0x3fe0485626ae221a,     //  0.86087,   0.50883'
+    0x3feba5aa673590d2,     0x3fe01cfc874c3eb7,     //  0.86397,   0.50354'
+    0x3febbed7c49380ea,     0x3fdfe2f64be7120f,     //  0.86705,   0.49823'
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //  0.87009,    0.4929'
+    0x3febf064e15377dd,     0x3fdf3405963fd068,     //  0.87309,   0.48755'
+    0x3fec08c426725549,     0x3fdedc1952ef78d5,     //  0.87607,   0.48218'
+    0x3fec20de3fa971b0,     0x3fde83e0eaf85113,     //  0.87901,    0.4768'
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  0.88192,    0.4714'
+    0x3fec5042012b6907,     0x3fddd28f1481cc58,     //   0.8848,   0.46598'
+    0x3fec678b3488739b,     0x3fdd79775b86e389,     //  0.88764,   0.46054'
+    0x3fec7e8e52233cf3,     0x3fdd2016e8e9db5b,     //  0.89045,   0.45508'
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     //  0.89322,   0.44961'
+    0x3fecabc169a0b901,     0x3fdc6c7f4997000a,     //  0.89597,   0.44412'
+    0x3fecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //  0.89867,   0.43862'
+    0x3fecd7d9898b32f6,     0x3fdbb7cf2304bd01,     //  0.90135,   0.43309'
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //  0.90399,   0.42756'
+    0x3fed02d4feb2bd92,     0x3fdb020d6c7f4009,     //   0.9066,     0.422'
+    0x3fed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //  0.90917,   0.41643'
+    0x3fed2cb220e0ef9f,     0x3fda4b4127dea1e4,     //  0.91171,   0.41084'
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //  0.91421,   0.40524'
+    0x3fed556f52e93eb1,     0x3fd993716141bdfe,     //  0.91668,   0.39962'
+    0x3fed696173c9e68b,     0x3fd9372a63bc93d7,     //  0.91911,   0.39399'
+    0x3fed7d0b02b8ecf9,     0x3fd8daa52ec8a4af,     //  0.92151,   0.38835'
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //  0.92388,   0.38268'
+    0x3feda383a9668988,     0x3fd820e3b04eaac4,     //  0.92621,   0.37701'
+    0x3fedb6526238a09b,     0x3fd7c3a9311dcce7,     //  0.92851,   0.37132'
+    0x3fedc8d7cb410260,     0x3fd766340f2418f6,     //  0.93077,   0.36561'
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     //  0.93299,    0.3599'
+    0x3feded05f7de47da,     0x3fd6aa9d7dc77e16,     //  0.93518,   0.35416'
+    0x3fedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //  0.93734,   0.34842'
+    0x3fee100cca2980ac,     0x3fd5ee27379ea693,     //  0.93946,   0.34266'
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //  0.94154,   0.33689'
+    0x3fee31eae870ce25,     0x3fd530d880af3c24,     //  0.94359,   0.33111'
+    0x3fee426a4b2bc17e,     0x3fd4d1e24278e76a,     //  0.94561,   0.32531'
+    0x3fee529f04729ffc,     0x3fd472b8a5571054,     //  0.94759,    0.3195'
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     //  0.94953,   0.31368'
+    0x3fee7227db6a9744,     0x3fd3b3cefa0414b7,     //  0.95144,   0.30785'
+    0x3fee817bab4cd10d,     0x3fd35410c2e18152,     //  0.95331,   0.30201'
+    0x3fee9084361df7f3,     0x3fd2f422daec0386,     //  0.95514,   0.29615'
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //  0.95694,   0.29028'
+    0x3feeadb2e8e7a88e,     0x3fd233bbabc3bb72,     //   0.9587,   0.28441'
+    0x3feebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //  0.96043,   0.27852'
+    0x3feec9b2d3c3bf84,     0x3fd172a0d7765177,     //  0.96212,   0.27262'
+    0x3feed740e7684963,     0x3fd111d262b1f677,     //  0.96378,   0.26671'
+    0x3feee482e25a9dbc,     0x3fd0b0d9cfdbdb90,     //  0.96539,   0.26079'
+    0x3feef178a3e473c2,     0x3fd04fb80e37fdae,     //  0.96698,   0.25487'
+    0x3feefe220c0b95ec,     0x3fcfdcdc1adfedf8,     //  0.96852,   0.24893'
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  0.97003,   0.24298'
+    0x3fef168f53f7205d,     0x3fce56ca1e101a1b,     //   0.9715,   0.23702'
+    0x3fef2252f7763ada,     0x3fcd934fe5454311,     //  0.97294,   0.23106'
+    0x3fef2dc9c9089a9d,     0x3fcccf8cb312b286,     //  0.97434,   0.22508'
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //   0.9757,    0.2191'
+    0x3fef43d085ff92dd,     0x3fcb4732ef3d6722,     //  0.97703,   0.21311'
+    0x3fef4e603b0b2f2d,     0x3fca82a025b00451,     //  0.97832,   0.20711'
+    0x3fef58a2b1789e84,     0x3fc9bdcbf2dc4366,     //  0.97957,    0.2011'
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  0.98079,   0.19509'
+    0x3fef6c3f7df5bbb7,     0x3fc83366e89c64c5,     //  0.98196,   0.18907'
+    0x3fef7599a3a12077,     0x3fc76dd9de50bf31,     //  0.98311,   0.18304'
+    0x3fef7ea629e63d6e,     0x3fc6a81304f64ab2,     //  0.98421,     0.177'
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     //  0.98528,   0.17096'
+    0x3fef8fd5ffae41db,     0x3fc51bdf8597c5f2,     //  0.98631,   0.16491'
+    0x3fef97f924c9099b,     0x3fc45576b1293e5a,     //   0.9873,   0.15886'
+    0x3fef9fce55adb2c8,     0x3fc38edbb0cd8d14,     //  0.98826,    0.1528'
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //  0.98918,   0.14673'
+    0x3fefae8e8e46cfbb,     0x3fc20116d4ec7bce,     //  0.99006,   0.14066'
+    0x3fefb5797195d741,     0x3fc139f0cedaf576,     //   0.9909,   0.13458'
+    0x3fefbc1617e44186,     0x3fc072a047ba831d,     //  0.99171,    0.1285'
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     //  0.99248,   0.12241'
+    0x3fefc8646cfeb721,     0x3fbdc70ecbae9fc8,     //  0.99321,   0.11632'
+    0x3fefce15fd6da67b,     0x3fbc3785c79ec2d5,     //  0.99391,   0.11022'
+    0x3fefd37914220b84,     0x3fbaa7b724495c04,     //  0.99456,   0.10412'
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //  0.99518,  0.098017'
+    0x3fefdd539ff1f456,     0x3fb787586a5d5b21,     //  0.99577,  0.091909'
+    0x3fefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //  0.99631,  0.085797'
+    0x3fefe5f3af2e3940,     0x3fb4661179272096,     //  0.99682,  0.079682'
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     //  0.99729,  0.073565'
+    0x3fefed58ecb673c4,     0x3fb1440134d709b2,     //  0.99772,  0.067444'
+    0x3feff095658e71ad,     0x3faf656e79f820e0,     //  0.99812,  0.061321'
+    0x3feff3830f8d575c,     0x3fac428d12c0d7e3,     //  0.99848,  0.055195'
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //   0.9988,  0.049068'
+    0x3feff871dadb81df,     0x3fa5fc00d290cd43,     //  0.99908,  0.042938'
+    0x3feffa72effef75d,     0x3fa2d865759455cd,     //  0.99932,  0.036807'
+    0x3feffc251df1d3f8,     0x3f9f693731d1cf01,     //  0.99953,  0.030675'
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //   0.9997,  0.024541'
+    0x3feffe9cb44b51a1,     0x3f92d936bbe30efd,     //  0.99983,  0.018407'
+    0x3fefff62169b92db,     0x3f8921d1fcdec784,     //  0.99992,  0.012272'
+    0x3fefffd8858e8a92,     0x3f7921f0fe670071,     //  0.99998, 0.0061359'
+    0x3ff0000000000000,     0x0000000000000000,     //        1,         0'
+    0x3fefffd8858e8a92,     0xbf7921f0fe670071,     //  0.99998,-0.0061359'
+    0x3fefff62169b92db,     0xbf8921d1fcdec784,     //  0.99992, -0.012272'
+    0x3feffe9cb44b51a1,     0xbf92d936bbe30efd,     //  0.99983, -0.018407'
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //   0.9997, -0.024541'
+    0x3feffc251df1d3f8,     0xbf9f693731d1cf01,     //  0.99953, -0.030675'
+    0x3feffa72effef75d,     0xbfa2d865759455cd,     //  0.99932, -0.036807'
+    0x3feff871dadb81df,     0xbfa5fc00d290cd43,     //  0.99908, -0.042938'
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //   0.9988, -0.049068'
+    0x3feff3830f8d575c,     0xbfac428d12c0d7e3,     //  0.99848, -0.055195'
+    0x3feff095658e71ad,     0xbfaf656e79f820e0,     //  0.99812, -0.061321'
+    0x3fefed58ecb673c4,     0xbfb1440134d709b2,     //  0.99772, -0.067444'
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     //  0.99729, -0.073565'
+    0x3fefe5f3af2e3940,     0xbfb4661179272096,     //  0.99682, -0.079682'
+    0x3fefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //  0.99631, -0.085797'
+    0x3fefdd539ff1f456,     0xbfb787586a5d5b21,     //  0.99577, -0.091909'
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //  0.99518, -0.098017'
+    0x3fefd37914220b84,     0xbfbaa7b724495c04,     //  0.99456,  -0.10412'
+    0x3fefce15fd6da67b,     0xbfbc3785c79ec2d5,     //  0.99391,  -0.11022'
+    0x3fefc8646cfeb721,     0xbfbdc70ecbae9fc8,     //  0.99321,  -0.11632'
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     //  0.99248,  -0.12241'
+    0x3fefbc1617e44186,     0xbfc072a047ba831d,     //  0.99171,   -0.1285'
+    0x3fefb5797195d741,     0xbfc139f0cedaf576,     //   0.9909,  -0.13458'
+    0x3fefae8e8e46cfbb,     0xbfc20116d4ec7bce,     //  0.99006,  -0.14066'
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //  0.98918,  -0.14673'
+    0x3fef9fce55adb2c8,     0xbfc38edbb0cd8d14,     //  0.98826,   -0.1528'
+    0x3fef97f924c9099b,     0xbfc45576b1293e5a,     //   0.9873,  -0.15886'
+    0x3fef8fd5ffae41db,     0xbfc51bdf8597c5f2,     //  0.98631,  -0.16491'
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     //  0.98528,  -0.17096'
+    0x3fef7ea629e63d6e,     0xbfc6a81304f64ab2,     //  0.98421,    -0.177'
+    0x3fef7599a3a12077,     0xbfc76dd9de50bf31,     //  0.98311,  -0.18304'
+    0x3fef6c3f7df5bbb7,     0xbfc83366e89c64c5,     //  0.98196,  -0.18907'
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  0.98079,  -0.19509'
+    0x3fef58a2b1789e84,     0xbfc9bdcbf2dc4366,     //  0.97957,   -0.2011'
+    0x3fef4e603b0b2f2d,     0xbfca82a025b00451,     //  0.97832,  -0.20711'
+    0x3fef43d085ff92dd,     0xbfcb4732ef3d6722,     //  0.97703,  -0.21311'
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //   0.9757,   -0.2191'
+    0x3fef2dc9c9089a9d,     0xbfcccf8cb312b286,     //  0.97434,  -0.22508'
+    0x3fef2252f7763ada,     0xbfcd934fe5454311,     //  0.97294,  -0.23106'
+    0x3fef168f53f7205d,     0xbfce56ca1e101a1b,     //   0.9715,  -0.23702'
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  0.97003,  -0.24298'
+    0x3feefe220c0b95ec,     0xbfcfdcdc1adfedf8,     //  0.96852,  -0.24893'
+    0x3feef178a3e473c2,     0xbfd04fb80e37fdae,     //  0.96698,  -0.25487'
+    0x3feee482e25a9dbc,     0xbfd0b0d9cfdbdb90,     //  0.96539,  -0.26079'
+    0x3feed740e7684963,     0xbfd111d262b1f677,     //  0.96378,  -0.26671'
+    0x3feec9b2d3c3bf84,     0xbfd172a0d7765177,     //  0.96212,  -0.27262'
+    0x3feebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //  0.96043,  -0.27852'
+    0x3feeadb2e8e7a88e,     0xbfd233bbabc3bb72,     //   0.9587,  -0.28441'
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //  0.95694,  -0.29028'
+    0x3fee9084361df7f3,     0xbfd2f422daec0386,     //  0.95514,  -0.29615'
+    0x3fee817bab4cd10d,     0xbfd35410c2e18152,     //  0.95331,  -0.30201'
+    0x3fee7227db6a9744,     0xbfd3b3cefa0414b7,     //  0.95144,  -0.30785'
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     //  0.94953,  -0.31368'
+    0x3fee529f04729ffc,     0xbfd472b8a5571054,     //  0.94759,   -0.3195'
+    0x3fee426a4b2bc17e,     0xbfd4d1e24278e76a,     //  0.94561,  -0.32531'
+    0x3fee31eae870ce25,     0xbfd530d880af3c24,     //  0.94359,  -0.33111'
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //  0.94154,  -0.33689'
+    0x3fee100cca2980ac,     0xbfd5ee27379ea693,     //  0.93946,  -0.34266'
+    0x3fedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //  0.93734,  -0.34842'
+    0x3feded05f7de47da,     0xbfd6aa9d7dc77e16,     //  0.93518,  -0.35416'
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     //  0.93299,   -0.3599'
+    0x3fedc8d7cb410260,     0xbfd766340f2418f6,     //  0.93077,  -0.36561'
+    0x3fedb6526238a09b,     0xbfd7c3a9311dcce7,     //  0.92851,  -0.37132'
+    0x3feda383a9668988,     0xbfd820e3b04eaac4,     //  0.92621,  -0.37701'
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //  0.92388,  -0.38268'
+    0x3fed7d0b02b8ecf9,     0xbfd8daa52ec8a4af,     //  0.92151,  -0.38835'
+    0x3fed696173c9e68b,     0xbfd9372a63bc93d7,     //  0.91911,  -0.39399'
+    0x3fed556f52e93eb1,     0xbfd993716141bdfe,     //  0.91668,  -0.39962'
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //  0.91421,  -0.40524'
+    0x3fed2cb220e0ef9f,     0xbfda4b4127dea1e4,     //  0.91171,  -0.41084'
+    0x3fed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //  0.90917,  -0.41643'
+    0x3fed02d4feb2bd92,     0xbfdb020d6c7f4009,     //   0.9066,    -0.422'
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //  0.90399,  -0.42756'
+    0x3fecd7d9898b32f6,     0xbfdbb7cf2304bd01,     //  0.90135,  -0.43309'
+    0x3fecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //  0.89867,  -0.43862'
+    0x3fecabc169a0b901,     0xbfdc6c7f4997000a,     //  0.89597,  -0.44412'
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     //  0.89322,  -0.44961'
+    0x3fec7e8e52233cf3,     0xbfdd2016e8e9db5b,     //  0.89045,  -0.45508'
+    0x3fec678b3488739b,     0xbfdd79775b86e389,     //  0.88764,  -0.46054'
+    0x3fec5042012b6907,     0xbfddd28f1481cc58,     //   0.8848,  -0.46598'
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  0.88192,   -0.4714'
+    0x3fec20de3fa971b0,     0xbfde83e0eaf85113,     //  0.87901,   -0.4768'
+    0x3fec08c426725549,     0xbfdedc1952ef78d5,     //  0.87607,  -0.48218'
+    0x3febf064e15377dd,     0xbfdf3405963fd068,     //  0.87309,  -0.48755'
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //  0.87009,   -0.4929'
+    0x3febbed7c49380ea,     0xbfdfe2f64be7120f,     //  0.86705,  -0.49823'
+    0x3feba5aa673590d2,     0xbfe01cfc874c3eb7,     //  0.86397,  -0.50354'
+    0x3feb8c38d27504e9,     0xbfe0485626ae221a,     //  0.86087,  -0.50883'
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //  0.85773,   -0.5141'
+    0x3feb5889fe921405,     0xbfe09e907417c5e1,     //  0.85456,  -0.51936'
+    0x3feb3e4d3ef55712,     0xbfe0c9704d5d898f,     //  0.85136,  -0.52459'
+    0x3feb23cd470013b4,     0xbfe0f426bb2a8e7d,     //  0.84812,   -0.5298'
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     //  0.84485,    -0.535'
+    0x3feaee04b43c1474,     0xbfe14915af336ceb,     //  0.84155,  -0.54017'
+    0x3fead2bc9e21d511,     0xbfe1734d63dedb49,     //  0.83822,  -0.54532'
+    0x3feab7325916c0d4,     0xbfe19d5a09f2b9b8,     //  0.83486,  -0.55046'
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  0.83147,  -0.55557'
+    0x3fea7f58529fe69d,     0xbfe1f0f08bbc861b,     //  0.82805,  -0.56066'
+    0x3fea63091b02fae2,     0xbfe21a799933eb58,     //  0.82459,  -0.56573'
+    0x3fea4678c8119ac8,     0xbfe243d5fb98ac1f,     //   0.8211,  -0.57078'
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     //  0.81758,  -0.57581'
+    0x3fea0c95eabaf937,     0xbfe2960727629ca8,     //  0.81404,  -0.58081'
+    0x3fe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //  0.81046,   -0.5858'
+    0x3fe9d1b1f5ea80d6,     0xbfe2e780e3e8ea16,     //  0.80685,  -0.59076'
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //  0.80321,   -0.5957'
+    0x3fe995cf2ed80d22,     0xbfe338400d0c8e57,     //  0.79954,  -0.60062'
+    0x3fe9777ef4c7d742,     0xbfe36058b10659f3,     //  0.79584,  -0.60551'
+    0x3fe958efe48e6dd7,     0xbfe3884185dfeb22,     //  0.79211,  -0.61038'
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     //  0.78835,  -0.61523'
+    0x3fe91b166fd49da2,     0xbfe3d78238c58343,     //  0.78456,  -0.62006'
+    0x3fe8fbcca3ef940d,     0xbfe3fed9534556d4,     //  0.78074,  -0.62486'
+    0x3fe8dc45331698cc,     0xbfe425ff178e6bb1,     //  0.77689,  -0.62964'
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //  0.77301,  -0.63439'
+    0x3fe89c7e9a4dd4ab,     0xbfe473b51b987347,     //   0.7691,  -0.63912'
+    0x3fe87c400fba2ebf,     0xbfe49a449b9b0938,     //  0.76517,  -0.64383'
+    0x3fe85bc51ae958cc,     0xbfe4c0a145ec0004,     //   0.7612,  -0.64851'
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //  0.75721,  -0.65317'
+    0x3fe81a1b33b57acc,     0xbfe50cc09f59a09b,     //  0.75319,  -0.65781'
+    0x3fe7f8ece3571771,     0xbfe5328292a35596,     //  0.74914,  -0.66242'
+    0x3fe7d7836cc33db2,     0xbfe5581038975137,     //  0.74506,    -0.667'
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //  0.74095,  -0.67156'
+    0x3fe79400574f55e4,     0xbfe5a28d2a5d7250,     //  0.73682,  -0.67609'
+    0x3fe771e75f037261,     0xbfe5c77bbe65018c,     //  0.73265,   -0.6806'
+    0x3fe74f948da8d28d,     0xbfe5ec3495837074,     //  0.72846,  -0.68508'
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     //  0.72425,  -0.68954'
+    0x3fe70a42b3176d7a,     0xbfe63503a31c1be8,     //     0.72,  -0.69397'
+    0x3fe6e74454eaa8ae,     0xbfe6591925f0783e,     //  0.71573,  -0.69838'
+    0x3fe6c40d73c18275,     0xbfe67cf78491af10,     //  0.71143,  -0.70275'
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  0.70711,  -0.70711'
+    0x3fe67cf78491af10,     0xbfe6c40d73c18275,     //  0.70275,  -0.71143'
+    0x3fe6591925f0783e,     0xbfe6e74454eaa8ae,     //  0.69838,  -0.71573'
+    0x3fe63503a31c1be8,     0xbfe70a42b3176d7a,     //  0.69397,     -0.72'
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     //  0.68954,  -0.72425'
+    0x3fe5ec3495837074,     0xbfe74f948da8d28d,     //  0.68508,  -0.72846'
+    0x3fe5c77bbe65018c,     0xbfe771e75f037261,     //   0.6806,  -0.73265'
+    0x3fe5a28d2a5d7250,     0xbfe79400574f55e4,     //  0.67609,  -0.73682'
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //  0.67156,  -0.74095'
+    0x3fe5581038975137,     0xbfe7d7836cc33db2,     //    0.667,  -0.74506'
+    0x3fe5328292a35596,     0xbfe7f8ece3571771,     //  0.66242,  -0.74914'
+    0x3fe50cc09f59a09b,     0xbfe81a1b33b57acc,     //  0.65781,  -0.75319'
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //  0.65317,  -0.75721'
+    0x3fe4c0a145ec0004,     0xbfe85bc51ae958cc,     //  0.64851,   -0.7612'
+    0x3fe49a449b9b0938,     0xbfe87c400fba2ebf,     //  0.64383,  -0.76517'
+    0x3fe473b51b987347,     0xbfe89c7e9a4dd4ab,     //  0.63912,   -0.7691'
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //  0.63439,  -0.77301'
+    0x3fe425ff178e6bb1,     0xbfe8dc45331698cc,     //  0.62964,  -0.77689'
+    0x3fe3fed9534556d4,     0xbfe8fbcca3ef940d,     //  0.62486,  -0.78074'
+    0x3fe3d78238c58343,     0xbfe91b166fd49da2,     //  0.62006,  -0.78456'
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     //  0.61523,  -0.78835'
+    0x3fe3884185dfeb22,     0xbfe958efe48e6dd7,     //  0.61038,  -0.79211'
+    0x3fe36058b10659f3,     0xbfe9777ef4c7d742,     //  0.60551,  -0.79584'
+    0x3fe338400d0c8e57,     0xbfe995cf2ed80d22,     //  0.60062,  -0.79954'
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //   0.5957,  -0.80321'
+    0x3fe2e780e3e8ea16,     0xbfe9d1b1f5ea80d6,     //  0.59076,  -0.80685'
+    0x3fe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //   0.5858,  -0.81046'
+    0x3fe2960727629ca8,     0xbfea0c95eabaf937,     //  0.58081,  -0.81404'
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     //  0.57581,  -0.81758'
+    0x3fe243d5fb98ac1f,     0xbfea4678c8119ac8,     //  0.57078,   -0.8211'
+    0x3fe21a799933eb58,     0xbfea63091b02fae2,     //  0.56573,  -0.82459'
+    0x3fe1f0f08bbc861b,     0xbfea7f58529fe69d,     //  0.56066,  -0.82805'
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  0.55557,  -0.83147'
+    0x3fe19d5a09f2b9b8,     0xbfeab7325916c0d4,     //  0.55046,  -0.83486'
+    0x3fe1734d63dedb49,     0xbfead2bc9e21d511,     //  0.54532,  -0.83822'
+    0x3fe14915af336ceb,     0xbfeaee04b43c1474,     //  0.54017,  -0.84155'
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //    0.535,  -0.84485'
+    0x3fe0f426bb2a8e7d,     0xbfeb23cd470013b4,     //   0.5298,  -0.84812'
+    0x3fe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //  0.52459,  -0.85136'
+    0x3fe09e907417c5e1,     0xbfeb5889fe921405,     //  0.51936,  -0.85456'
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //   0.5141,  -0.85773'
+    0x3fe0485626ae221a,     0xbfeb8c38d27504e9,     //  0.50883,  -0.86087'
+    0x3fe01cfc874c3eb7,     0xbfeba5aa673590d2,     //  0.50354,  -0.86397'
+    0x3fdfe2f64be7120f,     0xbfebbed7c49380ea,     //  0.49823,  -0.86705'
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //   0.4929,  -0.87009'
+    0x3fdf3405963fd068,     0xbfebf064e15377dd,     //  0.48755,  -0.87309'
+    0x3fdedc1952ef78d5,     0xbfec08c426725549,     //  0.48218,  -0.87607'
+    0x3fde83e0eaf85113,     0xbfec20de3fa971b0,     //   0.4768,  -0.87901'
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   0.4714,  -0.88192'
+    0x3fddd28f1481cc58,     0xbfec5042012b6907,     //  0.46598,   -0.8848'
+    0x3fdd79775b86e389,     0xbfec678b3488739b,     //  0.46054,  -0.88764'
+    0x3fdd2016e8e9db5b,     0xbfec7e8e52233cf3,     //  0.45508,  -0.89045'
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     //  0.44961,  -0.89322'
+    0x3fdc6c7f4997000a,     0xbfecabc169a0b901,     //  0.44412,  -0.89597'
+    0x3fdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //  0.43862,  -0.89867'
+    0x3fdbb7cf2304bd01,     0xbfecd7d9898b32f6,     //  0.43309,  -0.90135'
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //  0.42756,  -0.90399'
+    0x3fdb020d6c7f4009,     0xbfed02d4feb2bd92,     //    0.422,   -0.9066'
+    0x3fdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //  0.41643,  -0.90917'
+    0x3fda4b4127dea1e4,     0xbfed2cb220e0ef9f,     //  0.41084,  -0.91171'
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //  0.40524,  -0.91421'
+    0x3fd993716141bdfe,     0xbfed556f52e93eb1,     //  0.39962,  -0.91668'
+    0x3fd9372a63bc93d7,     0xbfed696173c9e68b,     //  0.39399,  -0.91911'
+    0x3fd8daa52ec8a4af,     0xbfed7d0b02b8ecf9,     //  0.38835,  -0.92151'
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //  0.38268,  -0.92388'
+    0x3fd820e3b04eaac4,     0xbfeda383a9668988,     //  0.37701,  -0.92621'
+    0x3fd7c3a9311dcce7,     0xbfedb6526238a09b,     //  0.37132,  -0.92851'
+    0x3fd766340f2418f6,     0xbfedc8d7cb410260,     //  0.36561,  -0.93077'
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //   0.3599,  -0.93299'
+    0x3fd6aa9d7dc77e16,     0xbfeded05f7de47da,     //  0.35416,  -0.93518'
+    0x3fd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //  0.34842,  -0.93734'
+    0x3fd5ee27379ea693,     0xbfee100cca2980ac,     //  0.34266,  -0.93946'
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //  0.33689,  -0.94154'
+    0x3fd530d880af3c24,     0xbfee31eae870ce25,     //  0.33111,  -0.94359'
+    0x3fd4d1e24278e76a,     0xbfee426a4b2bc17e,     //  0.32531,  -0.94561'
+    0x3fd472b8a5571054,     0xbfee529f04729ffc,     //   0.3195,  -0.94759'
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     //  0.31368,  -0.94953'
+    0x3fd3b3cefa0414b7,     0xbfee7227db6a9744,     //  0.30785,  -0.95144'
+    0x3fd35410c2e18152,     0xbfee817bab4cd10d,     //  0.30201,  -0.95331'
+    0x3fd2f422daec0386,     0xbfee9084361df7f3,     //  0.29615,  -0.95514'
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //  0.29028,  -0.95694'
+    0x3fd233bbabc3bb72,     0xbfeeadb2e8e7a88e,     //  0.28441,   -0.9587'
+    0x3fd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //  0.27852,  -0.96043'
+    0x3fd172a0d7765177,     0xbfeec9b2d3c3bf84,     //  0.27262,  -0.96212'
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     //  0.26671,  -0.96378'
+    0x3fd0b0d9cfdbdb90,     0xbfeee482e25a9dbc,     //  0.26079,  -0.96539'
+    0x3fd04fb80e37fdae,     0xbfeef178a3e473c2,     //  0.25487,  -0.96698'
+    0x3fcfdcdc1adfedf8,     0xbfeefe220c0b95ec,     //  0.24893,  -0.96852'
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  0.24298,  -0.97003'
+    0x3fce56ca1e101a1b,     0xbfef168f53f7205d,     //  0.23702,   -0.9715'
+    0x3fcd934fe5454311,     0xbfef2252f7763ada,     //  0.23106,  -0.97294'
+    0x3fcccf8cb312b286,     0xbfef2dc9c9089a9d,     //  0.22508,  -0.97434'
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //   0.2191,   -0.9757'
+    0x3fcb4732ef3d6722,     0xbfef43d085ff92dd,     //  0.21311,  -0.97703'
+    0x3fca82a025b00451,     0xbfef4e603b0b2f2d,     //  0.20711,  -0.97832'
+    0x3fc9bdcbf2dc4366,     0xbfef58a2b1789e84,     //   0.2011,  -0.97957'
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  0.19509,  -0.98079'
+    0x3fc83366e89c64c5,     0xbfef6c3f7df5bbb7,     //  0.18907,  -0.98196'
+    0x3fc76dd9de50bf31,     0xbfef7599a3a12077,     //  0.18304,  -0.98311'
+    0x3fc6a81304f64ab2,     0xbfef7ea629e63d6e,     //    0.177,  -0.98421'
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     //  0.17096,  -0.98528'
+    0x3fc51bdf8597c5f2,     0xbfef8fd5ffae41db,     //  0.16491,  -0.98631'
+    0x3fc45576b1293e5a,     0xbfef97f924c9099b,     //  0.15886,   -0.9873'
+    0x3fc38edbb0cd8d14,     0xbfef9fce55adb2c8,     //   0.1528,  -0.98826'
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //  0.14673,  -0.98918'
+    0x3fc20116d4ec7bce,     0xbfefae8e8e46cfbb,     //  0.14066,  -0.99006'
+    0x3fc139f0cedaf576,     0xbfefb5797195d741,     //  0.13458,   -0.9909'
+    0x3fc072a047ba831d,     0xbfefbc1617e44186,     //   0.1285,  -0.99171'
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     //  0.12241,  -0.99248'
+    0x3fbdc70ecbae9fc8,     0xbfefc8646cfeb721,     //  0.11632,  -0.99321'
+    0x3fbc3785c79ec2d5,     0xbfefce15fd6da67b,     //  0.11022,  -0.99391'
+    0x3fbaa7b724495c04,     0xbfefd37914220b84,     //  0.10412,  -0.99456'
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     // 0.098017,  -0.99518'
+    0x3fb787586a5d5b21,     0xbfefdd539ff1f456,     // 0.091909,  -0.99577'
+    0x3fb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     // 0.085797,  -0.99631'
+    0x3fb4661179272096,     0xbfefe5f3af2e3940,     // 0.079682,  -0.99682'
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     // 0.073565,  -0.99729'
+    0x3fb1440134d709b2,     0xbfefed58ecb673c4,     // 0.067444,  -0.99772'
+    0x3faf656e79f820e0,     0xbfeff095658e71ad,     // 0.061321,  -0.99812'
+    0x3fac428d12c0d7e3,     0xbfeff3830f8d575c,     // 0.055195,  -0.99848'
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     // 0.049068,   -0.9988'
+    0x3fa5fc00d290cd43,     0xbfeff871dadb81df,     // 0.042938,  -0.99908'
+    0x3fa2d865759455cd,     0xbfeffa72effef75d,     // 0.036807,  -0.99932'
+    0x3f9f693731d1cf01,     0xbfeffc251df1d3f8,     // 0.030675,  -0.99953'
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     // 0.024541,   -0.9997'
+    0x3f92d936bbe30efd,     0xbfeffe9cb44b51a1,     // 0.018407,  -0.99983'
+    0x3f8921d1fcdec784,     0xbfefff62169b92db,     // 0.012272,  -0.99992'
+    0x3f7921f0fe670071,     0xbfefffd8858e8a92,     //0.0061359,  -0.99998'
+};
+    
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048)
+const uint64_t twiddleCoefF64_rfft_2048[2048] = {
+    0x0000000000000000,     0x3ff0000000000000,     //        0,         1
+    0x3f6921f8becca4ba,     0x3feffff621621d02,     // 0.003068,         1
+    0x3f7921f0fe670071,     0x3fefffd8858e8a92,     //0.0061359,   0.99998
+    0x3f82d96b0e509703,     0x3fefffa72c978c4f,     //0.0092038,   0.99996
+    0x3f8921d1fcdec784,     0x3fefff62169b92db,     // 0.012272,   0.99992
+    0x3f8f6a296ab997ca,     0x3fefff0943c53bd1,     // 0.015339,   0.99988
+    0x3f92d936bbe30efd,     0x3feffe9cb44b51a1,     // 0.018407,   0.99983
+    0x3f95fd4d21fab226,     0x3feffe1c6870cb77,     // 0.021474,   0.99977
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     // 0.024541,    0.9997
+    0x3f9c454f4ce53b1c,     0x3feffce09ce2a679,     // 0.027608,   0.99962
+    0x3f9f693731d1cf01,     0x3feffc251df1d3f8,     // 0.030675,   0.99953
+    0x3fa14685db42c17e,     0x3feffb55e425fdae,     // 0.033741,   0.99943
+    0x3fa2d865759455cd,     0x3feffa72effef75d,     // 0.036807,   0.99932
+    0x3fa46a396ff86179,     0x3feff97c4208c014,     // 0.039873,    0.9992
+    0x3fa5fc00d290cd43,     0x3feff871dadb81df,     // 0.042938,   0.99908
+    0x3fa78dbaa5874685,     0x3feff753bb1b9164,     // 0.046003,   0.99894
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     // 0.049068,    0.9988
+    0x3faab101bd5f8317,     0x3feff4dc54b1bed3,     // 0.052132,   0.99864
+    0x3fac428d12c0d7e3,     0x3feff3830f8d575c,     // 0.055195,   0.99848
+    0x3fadd406f9808ec8,     0x3feff21614e131ed,     // 0.058258,    0.9983
+    0x3faf656e79f820e0,     0x3feff095658e71ad,     // 0.061321,   0.99812
+    0x3fb07b614e463064,     0x3fefef0102826191,     // 0.064383,   0.99793
+    0x3fb1440134d709b2,     0x3fefed58ecb673c4,     // 0.067444,   0.99772
+    0x3fb20c9674ed444c,     0x3fefeb9d2530410f,     // 0.070505,   0.99751
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     // 0.073565,   0.99729
+    0x3fb39d9f12c5a299,     0x3fefe7ea85482d60,     // 0.076624,   0.99706
+    0x3fb4661179272096,     0x3fefe5f3af2e3940,     // 0.079682,   0.99682
+    0x3fb52e774a4d4d0a,     0x3fefe3e92be9d886,     //  0.08274,   0.99657
+    0x3fb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     // 0.085797,   0.99631
+    0x3fb6bf1b3e79b129,     0x3fefdf9922f73307,     // 0.088854,   0.99604
+    0x3fb787586a5d5b21,     0x3fefdd539ff1f456,     // 0.091909,   0.99577
+    0x3fb84f8712c130a0,     0x3fefdafa7514538c,     // 0.094963,   0.99548
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     // 0.098017,   0.99518
+    0x3fb9dfb6eb24a85c,     0x3fefd60d2da75c9e,     //  0.10107,   0.99488
+    0x3fbaa7b724495c04,     0x3fefd37914220b84,     //  0.10412,   0.99456
+    0x3fbb6fa6ec38f64c,     0x3fefd0d158d86087,     //  0.10717,   0.99424
+    0x3fbc3785c79ec2d5,     0x3fefce15fd6da67b,     //  0.11022,   0.99391
+    0x3fbcff533b307dc1,     0x3fefcb4703914354,     //  0.11327,   0.99356
+    0x3fbdc70ecbae9fc8,     0x3fefc8646cfeb721,     //  0.11632,   0.99321
+    0x3fbe8eb7fde4aa3e,     0x3fefc56e3b7d9af6,     //  0.11937,   0.99285
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     //  0.12241,   0.99248
+    0x3fc00ee8ad6fb85b,     0x3fefbf470f0a8d88,     //  0.12545,    0.9921
+    0x3fc072a047ba831d,     0x3fefbc1617e44186,     //   0.1285,   0.99171
+    0x3fc0d64dbcb26786,     0x3fefb8d18d66adb7,     //  0.13154,   0.99131
+    0x3fc139f0cedaf576,     0x3fefb5797195d741,     //  0.13458,    0.9909
+    0x3fc19d8940be24e7,     0x3fefb20dc681d54d,     //  0.13762,   0.99049
+    0x3fc20116d4ec7bce,     0x3fefae8e8e46cfbb,     //  0.14066,   0.99006
+    0x3fc264994dfd340a,     0x3fefaafbcb0cfddc,     //   0.1437,   0.98962
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //  0.14673,   0.98918
+    0x3fc32b7bf94516a7,     0x3fefa39bac7a1791,     //  0.14976,   0.98872
+    0x3fc38edbb0cd8d14,     0x3fef9fce55adb2c8,     //   0.1528,   0.98826
+    0x3fc3f22f57db4893,     0x3fef9bed7cfbde29,     //  0.15583,   0.98778
+    0x3fc45576b1293e5a,     0x3fef97f924c9099b,     //  0.15886,    0.9873
+    0x3fc4b8b17f79fa88,     0x3fef93f14f85ac08,     //  0.16189,   0.98681
+    0x3fc51bdf8597c5f2,     0x3fef8fd5ffae41db,     //  0.16491,   0.98631
+    0x3fc57f008654cbde,     0x3fef8ba737cb4b78,     //  0.16794,    0.9858
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     //  0.17096,   0.98528
+    0x3fc6451a831d830d,     0x3fef830f4a40c60c,     //  0.17398,   0.98475
+    0x3fc6a81304f64ab2,     0x3fef7ea629e63d6e,     //    0.177,   0.98421
+    0x3fc70afd8d08c4ff,     0x3fef7a299c1a322a,     //  0.18002,   0.98366
+    0x3fc76dd9de50bf31,     0x3fef7599a3a12077,     //  0.18304,   0.98311
+    0x3fc7d0a7bbd2cb1b,     0x3fef70f6434b7eb7,     //  0.18606,   0.98254
+    0x3fc83366e89c64c5,     0x3fef6c3f7df5bbb7,     //  0.18907,   0.98196
+    0x3fc8961727c41804,     0x3fef677556883cee,     //  0.19208,   0.98138
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  0.19509,   0.98079
+    0x3fc95b49e9b62af9,     0x3fef5da6ed43685d,     //   0.1981,   0.98018
+    0x3fc9bdcbf2dc4366,     0x3fef58a2b1789e84,     //   0.2011,   0.97957
+    0x3fca203e1b1831da,     0x3fef538b1faf2d07,     //  0.20411,   0.97895
+    0x3fca82a025b00451,     0x3fef4e603b0b2f2d,     //  0.20711,   0.97832
+    0x3fcae4f1d5f3b9ab,     0x3fef492206bcabb4,     //  0.21011,   0.97768
+    0x3fcb4732ef3d6722,     0x3fef43d085ff92dd,     //  0.21311,   0.97703
+    0x3fcba96334f15dad,     0x3fef3e6bbc1bbc65,     //  0.21611,   0.97637
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //   0.2191,    0.9757
+    0x3fcc6d90535d74dc,     0x3fef33685a3aaef0,     //  0.22209,   0.97503
+    0x3fcccf8cb312b286,     0x3fef2dc9c9089a9d,     //  0.22508,   0.97434
+    0x3fcd31774d2cbdee,     0x3fef2817fc4609ce,     //  0.22807,   0.97364
+    0x3fcd934fe5454311,     0x3fef2252f7763ada,     //  0.23106,   0.97294
+    0x3fcdf5163f01099a,     0x3fef1c7abe284708,     //  0.23404,   0.97223
+    0x3fce56ca1e101a1b,     0x3fef168f53f7205d,     //  0.23702,    0.9715
+    0x3fceb86b462de348,     0x3fef1090bc898f5f,     //     0.24,   0.97077
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  0.24298,   0.97003
+    0x3fcf7b7480bd3801,     0x3fef045a14cf738c,     //  0.24596,   0.96928
+    0x3fcfdcdc1adfedf8,     0x3feefe220c0b95ec,     //  0.24893,   0.96852
+    0x3fd01f1806b9fdd2,     0x3feef7d6e51ca3c0,     //   0.2519,   0.96775
+    0x3fd04fb80e37fdae,     0x3feef178a3e473c2,     //  0.25487,   0.96698
+    0x3fd0804e05eb661e,     0x3feeeb074c50a544,     //  0.25783,   0.96619
+    0x3fd0b0d9cfdbdb90,     0x3feee482e25a9dbc,     //  0.26079,   0.96539
+    0x3fd0e15b4e1749cd,     0x3feeddeb6a078651,     //  0.26375,   0.96459
+    0x3fd111d262b1f677,     0x3feed740e7684963,     //  0.26671,   0.96378
+    0x3fd1423eefc69378,     0x3feed0835e999009,     //  0.26967,   0.96295
+    0x3fd172a0d7765177,     0x3feec9b2d3c3bf84,     //  0.27262,   0.96212
+    0x3fd1a2f7fbe8f243,     0x3feec2cf4b1af6b2,     //  0.27557,   0.96128
+    0x3fd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //  0.27852,   0.96043
+    0x3fd2038583d727bd,     0x3feeb4cf515b8811,     //  0.28146,   0.95957
+    0x3fd233bbabc3bb72,     0x3feeadb2e8e7a88e,     //  0.28441,    0.9587
+    0x3fd263e6995554ba,     0x3feea68393e65800,     //  0.28735,   0.95783
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //  0.29028,   0.95694
+    0x3fd2c41a4e954520,     0x3fee97ec36016b30,     //  0.29322,   0.95605
+    0x3fd2f422daec0386,     0x3fee9084361df7f3,     //  0.29615,   0.95514
+    0x3fd3241fb638baaf,     0x3fee89095bad6025,     //  0.29908,   0.95423
+    0x3fd35410c2e18152,     0x3fee817bab4cd10d,     //  0.30201,   0.95331
+    0x3fd383f5e353b6aa,     0x3fee79db29a5165a,     //  0.30493,   0.95238
+    0x3fd3b3cefa0414b7,     0x3fee7227db6a9744,     //  0.30785,   0.95144
+    0x3fd3e39be96ec271,     0x3fee6a61c55d53a7,     //  0.31077,   0.95049
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     //  0.31368,   0.94953
+    0x3fd44310dc8936f0,     0x3fee5a9d550467d3,     //  0.31659,   0.94856
+    0x3fd472b8a5571054,     0x3fee529f04729ffc,     //   0.3195,   0.94759
+    0x3fd4a253d11b82f3,     0x3fee4a8dff81ce5e,     //  0.32241,    0.9466
+    0x3fd4d1e24278e76a,     0x3fee426a4b2bc17e,     //  0.32531,   0.94561
+    0x3fd50163dc197047,     0x3fee3a33ec75ce85,     //  0.32821,    0.9446
+    0x3fd530d880af3c24,     0x3fee31eae870ce25,     //  0.33111,   0.94359
+    0x3fd5604012f467b4,     0x3fee298f4439197a,     //    0.334,   0.94257
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //  0.33689,   0.94154
+    0x3fd5bee78b9db3b6,     0x3fee18a02fdc66d9,     //  0.33978,   0.94051
+    0x3fd5ee27379ea693,     0x3fee100cca2980ac,     //  0.34266,   0.93946
+    0x3fd61d595c88c203,     0x3fee0766d9280f54,     //  0.34554,    0.9384
+    0x3fd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //  0.34842,   0.93734
+    0x3fd67b949cad63ca,     0x3fedf5e36a9ba59c,     //  0.35129,   0.93627
+    0x3fd6aa9d7dc77e16,     0x3feded05f7de47da,     //  0.35416,   0.93518
+    0x3fd6d998638a0cb5,     0x3fede4160f6d8d81,     //  0.35703,   0.93409
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //   0.3599,   0.93299
+    0x3fd73763c9261092,     0x3fedd1fef38a915a,     //  0.36276,   0.93188
+    0x3fd766340f2418f6,     0x3fedc8d7cb410260,     //  0.36561,   0.93077
+    0x3fd794f5e613dfae,     0x3fedbf9e4395759a,     //  0.36847,   0.92964
+    0x3fd7c3a9311dcce7,     0x3fedb6526238a09b,     //  0.37132,   0.92851
+    0x3fd7f24dd37341e3,     0x3fedacf42ce68ab9,     //  0.37416,   0.92736
+    0x3fd820e3b04eaac4,     0x3feda383a9668988,     //  0.37701,   0.92621
+    0x3fd84f6aaaf3903f,     0x3fed9a00dd8b3d46,     //  0.37985,   0.92505
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //  0.38268,   0.92388
+    0x3fd8ac4b86d5ed44,     0x3fed86c48445a450,     //  0.38552,    0.9227
+    0x3fd8daa52ec8a4af,     0x3fed7d0b02b8ecf9,     //  0.38835,   0.92151
+    0x3fd908ef81ef7bd1,     0x3fed733f508c0dff,     //  0.39117,   0.92032
+    0x3fd9372a63bc93d7,     0x3fed696173c9e68b,     //  0.39399,   0.91911
+    0x3fd96555b7ab948f,     0x3fed5f7172888a7f,     //  0.39681,    0.9179
+    0x3fd993716141bdfe,     0x3fed556f52e93eb1,     //  0.39962,   0.91668
+    0x3fd9c17d440df9f2,     0x3fed4b5b1b187524,     //  0.40243,   0.91545
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //  0.40524,   0.91421
+    0x3fda1d6543b50ac0,     0x3fed36fc7bcbfbdc,     //  0.40804,   0.91296
+    0x3fda4b4127dea1e4,     0x3fed2cb220e0ef9f,     //  0.41084,   0.91171
+    0x3fda790cd3dbf31a,     0x3fed2255c6e5a4e1,     //  0.41364,   0.91044
+    0x3fdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //  0.41643,   0.90917
+    0x3fdad473125cdc08,     0x3fed0d672f59d2b9,     //  0.41922,   0.90789
+    0x3fdb020d6c7f4009,     0x3fed02d4feb2bd92,     //    0.422,    0.9066
+    0x3fdb2f971db31972,     0x3fecf830e8ce467b,     //  0.42478,    0.9053
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //  0.42756,   0.90399
+    0x3fdb8a7814fd5693,     0x3fece2b32799a060,     //  0.43033,   0.90267
+    0x3fdbb7cf2304bd01,     0x3fecd7d9898b32f6,     //  0.43309,   0.90135
+    0x3fdbe51517ffc0d9,     0x3fecccee20c2de9f,     //  0.43586,   0.90002
+    0x3fdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //  0.43862,   0.89867
+    0x3fdc3f6d47263129,     0x3fecb6e20a00da99,     //  0.44137,   0.89732
+    0x3fdc6c7f4997000a,     0x3fecabc169a0b901,     //  0.44412,   0.89597
+    0x3fdc997fc3865388,     0x3feca08f19b9c449,     //  0.44687,    0.8946
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     //  0.44961,   0.89322
+    0x3fdcf34baee1cd21,     0x3fec89f587029c13,     //  0.45235,   0.89184
+    0x3fdd2016e8e9db5b,     0x3fec7e8e52233cf3,     //  0.45508,   0.89045
+    0x3fdd4cd02ba8609c,     0x3fec7315899eaad7,     //  0.45781,   0.88905
+    0x3fdd79775b86e389,     0x3fec678b3488739b,     //  0.46054,   0.88764
+    0x3fdda60c5cfa10d8,     0x3fec5bef59fef85a,     //  0.46326,   0.88622
+    0x3fddd28f1481cc58,     0x3fec5042012b6907,     //  0.46598,    0.8848
+    0x3fddfeff66a941de,     0x3fec44833141c004,     //  0.46869,   0.88336
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   0.4714,   0.88192
+    0x3fde57a86d3cd824,     0x3fec2cd14931e3f1,     //   0.4741,   0.88047
+    0x3fde83e0eaf85113,     0x3fec20de3fa971b0,     //   0.4768,   0.87901
+    0x3fdeb00695f25620,     0x3fec14d9dc465e58,     //  0.47949,   0.87755
+    0x3fdedc1952ef78d5,     0x3fec08c426725549,     //  0.48218,   0.87607
+    0x3fdf081906bff7fd,     0x3febfc9d25a1b147,     //  0.48487,   0.87459
+    0x3fdf3405963fd068,     0x3febf064e15377dd,     //  0.48755,   0.87309
+    0x3fdf5fdee656cda3,     0x3febe41b611154c1,     //  0.49023,    0.8716
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //   0.4929,   0.87009
+    0x3fdfb7575c24d2de,     0x3febcb54cb0d2327,     //  0.49557,   0.86857
+    0x3fdfe2f64be7120f,     0x3febbed7c49380ea,     //  0.49823,   0.86705
+    0x3fe00740c82b82e0,     0x3febb249a0b6c40d,     //  0.50089,   0.86551
+    0x3fe01cfc874c3eb7,     0x3feba5aa673590d2,     //  0.50354,   0.86397
+    0x3fe032ae55edbd95,     0x3feb98fa1fd9155e,     //  0.50619,   0.86242
+    0x3fe0485626ae221a,     0x3feb8c38d27504e9,     //  0.50883,   0.86087
+    0x3fe05df3ec31b8b6,     0x3feb7f6686e792ea,     //  0.51147,    0.8593
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //   0.5141,   0.85773
+    0x3fe089112032b08c,     0x3feb658f14fdbc47,     //  0.51673,   0.85615
+    0x3fe09e907417c5e1,     0x3feb5889fe921405,     //  0.51936,   0.85456
+    0x3fe0b405878f85ec,     0x3feb4b7409de7925,     //  0.52198,   0.85296
+    0x3fe0c9704d5d898f,     0x3feb3e4d3ef55712,     //  0.52459,   0.85136
+    0x3fe0ded0b84bc4b5,     0x3feb3115a5f37bf4,     //   0.5272,   0.84974
+    0x3fe0f426bb2a8e7d,     0x3feb23cd470013b4,     //   0.5298,   0.84812
+    0x3fe1097248d0a956,     0x3feb16742a4ca2f5,     //   0.5324,   0.84649
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //    0.535,   0.84485
+    0x3fe133e9cfee254e,     0x3feafb8fd89f57b6,     //  0.53759,   0.84321
+    0x3fe14915af336ceb,     0x3feaee04b43c1474,     //  0.54017,   0.84155
+    0x3fe15e36e4dbe2bc,     0x3feae068f345ecef,     //  0.54275,   0.83989
+    0x3fe1734d63dedb49,     0x3fead2bc9e21d511,     //  0.54532,   0.83822
+    0x3fe188591f3a46e5,     0x3feac4ffbd3efac8,     //  0.54789,   0.83655
+    0x3fe19d5a09f2b9b8,     0x3feab7325916c0d4,     //  0.55046,   0.83486
+    0x3fe1b250171373be,     0x3feaa9547a2cb98e,     //  0.55302,   0.83317
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  0.55557,   0.83147
+    0x3fe1dc1b64dc4872,     0x3fea8d676e545ad2,     //  0.55812,   0.82976
+    0x3fe1f0f08bbc861b,     0x3fea7f58529fe69d,     //  0.56066,   0.82805
+    0x3fe205baa17560d6,     0x3fea7138de9d60f5,     //   0.5632,   0.82632
+    0x3fe21a799933eb58,     0x3fea63091b02fae2,     //  0.56573,   0.82459
+    0x3fe22f2d662c13e1,     0x3fea54c91090f524,     //  0.56826,   0.82285
+    0x3fe243d5fb98ac1f,     0x3fea4678c8119ac8,     //  0.57078,    0.8211
+    0x3fe258734cbb7110,     0x3fea38184a593bc6,     //   0.5733,   0.81935
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     //  0.57581,   0.81758
+    0x3fe2818bef4d3cba,     0x3fea1b26d2c0a75e,     //  0.57831,   0.81581
+    0x3fe2960727629ca8,     0x3fea0c95eabaf937,     //  0.58081,   0.81404
+    0x3fe2aa76e87aeb58,     0x3fe9fdf4f13149de,     //  0.58331,   0.81225
+    0x3fe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //   0.5858,   0.81046
+    0x3fe2d333d34e9bb7,     0x3fe9e082edb42472,     //  0.58828,   0.80866
+    0x3fe2e780e3e8ea16,     0x3fe9d1b1f5ea80d6,     //  0.59076,   0.80685
+    0x3fe2fbc24b441015,     0x3fe9c2d110f075c3,     //  0.59323,   0.80503
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //   0.5957,   0.80321
+    0x3fe32421ec49a620,     0x3fe9a4dfa42b06b2,     //  0.59816,   0.80138
+    0x3fe338400d0c8e57,     0x3fe995cf2ed80d22,     //  0.60062,   0.79954
+    0x3fe34c5252c14de1,     0x3fe986aef1457594,     //  0.60307,   0.79769
+    0x3fe36058b10659f3,     0x3fe9777ef4c7d742,     //  0.60551,   0.79584
+    0x3fe374531b817f8d,     0x3fe9683f42bd7fe1,     //  0.60795,   0.79398
+    0x3fe3884185dfeb22,     0x3fe958efe48e6dd7,     //  0.61038,   0.79211
+    0x3fe39c23e3d63029,     0x3fe94990e3ac4a6c,     //  0.61281,   0.79023
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     //  0.61523,   0.78835
+    0x3fe3c3c44981c517,     0x3fe92aa41fc5a815,     //  0.61765,   0.78646
+    0x3fe3d78238c58343,     0x3fe91b166fd49da2,     //  0.62006,   0.78456
+    0x3fe3eb33eabe0680,     0x3fe90b7943575efe,     //  0.62246,   0.78265
+    0x3fe3fed9534556d4,     0x3fe8fbcca3ef940d,     //  0.62486,   0.78074
+    0x3fe41272663d108c,     0x3fe8ec109b486c49,     //  0.62725,   0.77882
+    0x3fe425ff178e6bb1,     0x3fe8dc45331698cc,     //  0.62964,   0.77689
+    0x3fe4397f5b2a4380,     0x3fe8cc6a75184655,     //  0.63202,   0.77495
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //  0.63439,   0.77301
+    0x3fe4605a692b32a2,     0x3fe8ac871ede1d88,     //  0.63676,   0.77106
+    0x3fe473b51b987347,     0x3fe89c7e9a4dd4ab,     //  0.63912,    0.7691
+    0x3fe48703306091fe,     0x3fe88c66e7481ba1,     //  0.64148,   0.76714
+    0x3fe49a449b9b0938,     0x3fe87c400fba2ebf,     //  0.64383,   0.76517
+    0x3fe4ad79516722f0,     0x3fe86c0a1d9aa195,     //  0.64618,   0.76319
+    0x3fe4c0a145ec0004,     0x3fe85bc51ae958cc,     //  0.64851,    0.7612
+    0x3fe4d3bc6d589f80,     0x3fe84b7111af83f9,     //  0.65085,   0.75921
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //  0.65317,   0.75721
+    0x3fe4f9cc25cca486,     0x3fe82a9c13f545ff,     //  0.65549,    0.7552
+    0x3fe50cc09f59a09b,     0x3fe81a1b33b57acc,     //  0.65781,   0.75319
+    0x3fe51fa81cd99aa6,     0x3fe8098b756e52fa,     //  0.66011,   0.75117
+    0x3fe5328292a35596,     0x3fe7f8ece3571771,     //  0.66242,   0.74914
+    0x3fe5454ff5159dfb,     0x3fe7e83f87b03686,     //  0.66471,    0.7471
+    0x3fe5581038975137,     0x3fe7d7836cc33db2,     //    0.667,   0.74506
+    0x3fe56ac35197649e,     0x3fe7c6b89ce2d333,     //  0.66928,   0.74301
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //  0.67156,   0.74095
+    0x3fe59001d5f723df,     0x3fe7a4f707bf97d2,     //  0.67383,   0.73889
+    0x3fe5a28d2a5d7250,     0x3fe79400574f55e4,     //  0.67609,   0.73682
+    0x3fe5b50b264f7448,     0x3fe782fb1b90b35b,     //  0.67835,   0.73474
+    0x3fe5c77bbe65018c,     0x3fe771e75f037261,     //   0.6806,   0.73265
+    0x3fe5d9dee73e345c,     0x3fe760c52c304764,     //  0.68285,   0.73056
+    0x3fe5ec3495837074,     0x3fe74f948da8d28d,     //  0.68508,   0.72846
+    0x3fe5fe7cbde56a0f,     0x3fe73e558e079942,     //  0.68732,   0.72636
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     //  0.68954,   0.72425
+    0x3fe622e44fec22ff,     0x3fe71bac960e41bf,     //  0.69176,   0.72213
+    0x3fe63503a31c1be8,     0x3fe70a42b3176d7a,     //  0.69397,      0.72
+    0x3fe64715437f535b,     0x3fe6f8ca99c95b75,     //  0.69618,   0.71787
+    0x3fe6591925f0783e,     0x3fe6e74454eaa8ae,     //  0.69838,   0.71573
+    0x3fe66b0f3f52b386,     0x3fe6d5afef4aafcc,     //  0.70057,   0.71358
+    0x3fe67cf78491af10,     0x3fe6c40d73c18275,     //  0.70275,   0.71143
+    0x3fe68ed1eaa19c71,     0x3fe6b25ced2fe29c,     //  0.70493,   0.70927
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  0.70711,   0.70711
+    0x3fe6b25ced2fe29c,     0x3fe68ed1eaa19c71,     //  0.70927,   0.70493
+    0x3fe6c40d73c18275,     0x3fe67cf78491af10,     //  0.71143,   0.70275
+    0x3fe6d5afef4aafcc,     0x3fe66b0f3f52b386,     //  0.71358,   0.70057
+    0x3fe6e74454eaa8ae,     0x3fe6591925f0783e,     //  0.71573,   0.69838
+    0x3fe6f8ca99c95b75,     0x3fe64715437f535b,     //  0.71787,   0.69618
+    0x3fe70a42b3176d7a,     0x3fe63503a31c1be8,     //     0.72,   0.69397
+    0x3fe71bac960e41bf,     0x3fe622e44fec22ff,     //  0.72213,   0.69176
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     //  0.72425,   0.68954
+    0x3fe73e558e079942,     0x3fe5fe7cbde56a0f,     //  0.72636,   0.68732
+    0x3fe74f948da8d28d,     0x3fe5ec3495837074,     //  0.72846,   0.68508
+    0x3fe760c52c304764,     0x3fe5d9dee73e345c,     //  0.73056,   0.68285
+    0x3fe771e75f037261,     0x3fe5c77bbe65018c,     //  0.73265,    0.6806
+    0x3fe782fb1b90b35b,     0x3fe5b50b264f7448,     //  0.73474,   0.67835
+    0x3fe79400574f55e4,     0x3fe5a28d2a5d7250,     //  0.73682,   0.67609
+    0x3fe7a4f707bf97d2,     0x3fe59001d5f723df,     //  0.73889,   0.67383
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //  0.74095,   0.67156
+    0x3fe7c6b89ce2d333,     0x3fe56ac35197649e,     //  0.74301,   0.66928
+    0x3fe7d7836cc33db2,     0x3fe5581038975137,     //  0.74506,     0.667
+    0x3fe7e83f87b03686,     0x3fe5454ff5159dfb,     //   0.7471,   0.66471
+    0x3fe7f8ece3571771,     0x3fe5328292a35596,     //  0.74914,   0.66242
+    0x3fe8098b756e52fa,     0x3fe51fa81cd99aa6,     //  0.75117,   0.66011
+    0x3fe81a1b33b57acc,     0x3fe50cc09f59a09b,     //  0.75319,   0.65781
+    0x3fe82a9c13f545ff,     0x3fe4f9cc25cca486,     //   0.7552,   0.65549
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //  0.75721,   0.65317
+    0x3fe84b7111af83f9,     0x3fe4d3bc6d589f80,     //  0.75921,   0.65085
+    0x3fe85bc51ae958cc,     0x3fe4c0a145ec0004,     //   0.7612,   0.64851
+    0x3fe86c0a1d9aa195,     0x3fe4ad79516722f0,     //  0.76319,   0.64618
+    0x3fe87c400fba2ebf,     0x3fe49a449b9b0938,     //  0.76517,   0.64383
+    0x3fe88c66e7481ba1,     0x3fe48703306091fe,     //  0.76714,   0.64148
+    0x3fe89c7e9a4dd4ab,     0x3fe473b51b987347,     //   0.7691,   0.63912
+    0x3fe8ac871ede1d88,     0x3fe4605a692b32a2,     //  0.77106,   0.63676
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //  0.77301,   0.63439
+    0x3fe8cc6a75184655,     0x3fe4397f5b2a4380,     //  0.77495,   0.63202
+    0x3fe8dc45331698cc,     0x3fe425ff178e6bb1,     //  0.77689,   0.62964
+    0x3fe8ec109b486c49,     0x3fe41272663d108c,     //  0.77882,   0.62725
+    0x3fe8fbcca3ef940d,     0x3fe3fed9534556d4,     //  0.78074,   0.62486
+    0x3fe90b7943575efe,     0x3fe3eb33eabe0680,     //  0.78265,   0.62246
+    0x3fe91b166fd49da2,     0x3fe3d78238c58343,     //  0.78456,   0.62006
+    0x3fe92aa41fc5a815,     0x3fe3c3c44981c517,     //  0.78646,   0.61765
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     //  0.78835,   0.61523
+    0x3fe94990e3ac4a6c,     0x3fe39c23e3d63029,     //  0.79023,   0.61281
+    0x3fe958efe48e6dd7,     0x3fe3884185dfeb22,     //  0.79211,   0.61038
+    0x3fe9683f42bd7fe1,     0x3fe374531b817f8d,     //  0.79398,   0.60795
+    0x3fe9777ef4c7d742,     0x3fe36058b10659f3,     //  0.79584,   0.60551
+    0x3fe986aef1457594,     0x3fe34c5252c14de1,     //  0.79769,   0.60307
+    0x3fe995cf2ed80d22,     0x3fe338400d0c8e57,     //  0.79954,   0.60062
+    0x3fe9a4dfa42b06b2,     0x3fe32421ec49a620,     //  0.80138,   0.59816
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //  0.80321,    0.5957
+    0x3fe9c2d110f075c3,     0x3fe2fbc24b441015,     //  0.80503,   0.59323
+    0x3fe9d1b1f5ea80d6,     0x3fe2e780e3e8ea16,     //  0.80685,   0.59076
+    0x3fe9e082edb42472,     0x3fe2d333d34e9bb7,     //  0.80866,   0.58828
+    0x3fe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //  0.81046,    0.5858
+    0x3fe9fdf4f13149de,     0x3fe2aa76e87aeb58,     //  0.81225,   0.58331
+    0x3fea0c95eabaf937,     0x3fe2960727629ca8,     //  0.81404,   0.58081
+    0x3fea1b26d2c0a75e,     0x3fe2818bef4d3cba,     //  0.81581,   0.57831
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     //  0.81758,   0.57581
+    0x3fea38184a593bc6,     0x3fe258734cbb7110,     //  0.81935,    0.5733
+    0x3fea4678c8119ac8,     0x3fe243d5fb98ac1f,     //   0.8211,   0.57078
+    0x3fea54c91090f524,     0x3fe22f2d662c13e1,     //  0.82285,   0.56826
+    0x3fea63091b02fae2,     0x3fe21a799933eb58,     //  0.82459,   0.56573
+    0x3fea7138de9d60f5,     0x3fe205baa17560d6,     //  0.82632,    0.5632
+    0x3fea7f58529fe69d,     0x3fe1f0f08bbc861b,     //  0.82805,   0.56066
+    0x3fea8d676e545ad2,     0x3fe1dc1b64dc4872,     //  0.82976,   0.55812
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  0.83147,   0.55557
+    0x3feaa9547a2cb98e,     0x3fe1b250171373be,     //  0.83317,   0.55302
+    0x3feab7325916c0d4,     0x3fe19d5a09f2b9b8,     //  0.83486,   0.55046
+    0x3feac4ffbd3efac8,     0x3fe188591f3a46e5,     //  0.83655,   0.54789
+    0x3fead2bc9e21d511,     0x3fe1734d63dedb49,     //  0.83822,   0.54532
+    0x3feae068f345ecef,     0x3fe15e36e4dbe2bc,     //  0.83989,   0.54275
+    0x3feaee04b43c1474,     0x3fe14915af336ceb,     //  0.84155,   0.54017
+    0x3feafb8fd89f57b6,     0x3fe133e9cfee254e,     //  0.84321,   0.53759
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     //  0.84485,     0.535
+    0x3feb16742a4ca2f5,     0x3fe1097248d0a956,     //  0.84649,    0.5324
+    0x3feb23cd470013b4,     0x3fe0f426bb2a8e7d,     //  0.84812,    0.5298
+    0x3feb3115a5f37bf4,     0x3fe0ded0b84bc4b5,     //  0.84974,    0.5272
+    0x3feb3e4d3ef55712,     0x3fe0c9704d5d898f,     //  0.85136,   0.52459
+    0x3feb4b7409de7925,     0x3fe0b405878f85ec,     //  0.85296,   0.52198
+    0x3feb5889fe921405,     0x3fe09e907417c5e1,     //  0.85456,   0.51936
+    0x3feb658f14fdbc47,     0x3fe089112032b08c,     //  0.85615,   0.51673
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //  0.85773,    0.5141
+    0x3feb7f6686e792ea,     0x3fe05df3ec31b8b6,     //   0.8593,   0.51147
+    0x3feb8c38d27504e9,     0x3fe0485626ae221a,     //  0.86087,   0.50883
+    0x3feb98fa1fd9155e,     0x3fe032ae55edbd95,     //  0.86242,   0.50619
+    0x3feba5aa673590d2,     0x3fe01cfc874c3eb7,     //  0.86397,   0.50354
+    0x3febb249a0b6c40d,     0x3fe00740c82b82e0,     //  0.86551,   0.50089
+    0x3febbed7c49380ea,     0x3fdfe2f64be7120f,     //  0.86705,   0.49823
+    0x3febcb54cb0d2327,     0x3fdfb7575c24d2de,     //  0.86857,   0.49557
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //  0.87009,    0.4929
+    0x3febe41b611154c1,     0x3fdf5fdee656cda3,     //   0.8716,   0.49023
+    0x3febf064e15377dd,     0x3fdf3405963fd068,     //  0.87309,   0.48755
+    0x3febfc9d25a1b147,     0x3fdf081906bff7fd,     //  0.87459,   0.48487
+    0x3fec08c426725549,     0x3fdedc1952ef78d5,     //  0.87607,   0.48218
+    0x3fec14d9dc465e58,     0x3fdeb00695f25620,     //  0.87755,   0.47949
+    0x3fec20de3fa971b0,     0x3fde83e0eaf85113,     //  0.87901,    0.4768
+    0x3fec2cd14931e3f1,     0x3fde57a86d3cd824,     //  0.88047,    0.4741
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  0.88192,    0.4714
+    0x3fec44833141c004,     0x3fddfeff66a941de,     //  0.88336,   0.46869
+    0x3fec5042012b6907,     0x3fddd28f1481cc58,     //   0.8848,   0.46598
+    0x3fec5bef59fef85a,     0x3fdda60c5cfa10d8,     //  0.88622,   0.46326
+    0x3fec678b3488739b,     0x3fdd79775b86e389,     //  0.88764,   0.46054
+    0x3fec7315899eaad7,     0x3fdd4cd02ba8609c,     //  0.88905,   0.45781
+    0x3fec7e8e52233cf3,     0x3fdd2016e8e9db5b,     //  0.89045,   0.45508
+    0x3fec89f587029c13,     0x3fdcf34baee1cd21,     //  0.89184,   0.45235
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     //  0.89322,   0.44961
+    0x3feca08f19b9c449,     0x3fdc997fc3865388,     //   0.8946,   0.44687
+    0x3fecabc169a0b901,     0x3fdc6c7f4997000a,     //  0.89597,   0.44412
+    0x3fecb6e20a00da99,     0x3fdc3f6d47263129,     //  0.89732,   0.44137
+    0x3fecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //  0.89867,   0.43862
+    0x3fecccee20c2de9f,     0x3fdbe51517ffc0d9,     //  0.90002,   0.43586
+    0x3fecd7d9898b32f6,     0x3fdbb7cf2304bd01,     //  0.90135,   0.43309
+    0x3fece2b32799a060,     0x3fdb8a7814fd5693,     //  0.90267,   0.43033
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //  0.90399,   0.42756
+    0x3fecf830e8ce467b,     0x3fdb2f971db31972,     //   0.9053,   0.42478
+    0x3fed02d4feb2bd92,     0x3fdb020d6c7f4009,     //   0.9066,     0.422
+    0x3fed0d672f59d2b9,     0x3fdad473125cdc08,     //  0.90789,   0.41922
+    0x3fed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //  0.90917,   0.41643
+    0x3fed2255c6e5a4e1,     0x3fda790cd3dbf31a,     //  0.91044,   0.41364
+    0x3fed2cb220e0ef9f,     0x3fda4b4127dea1e4,     //  0.91171,   0.41084
+    0x3fed36fc7bcbfbdc,     0x3fda1d6543b50ac0,     //  0.91296,   0.40804
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //  0.91421,   0.40524
+    0x3fed4b5b1b187524,     0x3fd9c17d440df9f2,     //  0.91545,   0.40243
+    0x3fed556f52e93eb1,     0x3fd993716141bdfe,     //  0.91668,   0.39962
+    0x3fed5f7172888a7f,     0x3fd96555b7ab948f,     //   0.9179,   0.39681
+    0x3fed696173c9e68b,     0x3fd9372a63bc93d7,     //  0.91911,   0.39399
+    0x3fed733f508c0dff,     0x3fd908ef81ef7bd1,     //  0.92032,   0.39117
+    0x3fed7d0b02b8ecf9,     0x3fd8daa52ec8a4af,     //  0.92151,   0.38835
+    0x3fed86c48445a450,     0x3fd8ac4b86d5ed44,     //   0.9227,   0.38552
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //  0.92388,   0.38268
+    0x3fed9a00dd8b3d46,     0x3fd84f6aaaf3903f,     //  0.92505,   0.37985
+    0x3feda383a9668988,     0x3fd820e3b04eaac4,     //  0.92621,   0.37701
+    0x3fedacf42ce68ab9,     0x3fd7f24dd37341e3,     //  0.92736,   0.37416
+    0x3fedb6526238a09b,     0x3fd7c3a9311dcce7,     //  0.92851,   0.37132
+    0x3fedbf9e4395759a,     0x3fd794f5e613dfae,     //  0.92964,   0.36847
+    0x3fedc8d7cb410260,     0x3fd766340f2418f6,     //  0.93077,   0.36561
+    0x3fedd1fef38a915a,     0x3fd73763c9261092,     //  0.93188,   0.36276
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     //  0.93299,    0.3599
+    0x3fede4160f6d8d81,     0x3fd6d998638a0cb5,     //  0.93409,   0.35703
+    0x3feded05f7de47da,     0x3fd6aa9d7dc77e16,     //  0.93518,   0.35416
+    0x3fedf5e36a9ba59c,     0x3fd67b949cad63ca,     //  0.93627,   0.35129
+    0x3fedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //  0.93734,   0.34842
+    0x3fee0766d9280f54,     0x3fd61d595c88c203,     //   0.9384,   0.34554
+    0x3fee100cca2980ac,     0x3fd5ee27379ea693,     //  0.93946,   0.34266
+    0x3fee18a02fdc66d9,     0x3fd5bee78b9db3b6,     //  0.94051,   0.33978
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //  0.94154,   0.33689
+    0x3fee298f4439197a,     0x3fd5604012f467b4,     //  0.94257,     0.334
+    0x3fee31eae870ce25,     0x3fd530d880af3c24,     //  0.94359,   0.33111
+    0x3fee3a33ec75ce85,     0x3fd50163dc197047,     //   0.9446,   0.32821
+    0x3fee426a4b2bc17e,     0x3fd4d1e24278e76a,     //  0.94561,   0.32531
+    0x3fee4a8dff81ce5e,     0x3fd4a253d11b82f3,     //   0.9466,   0.32241
+    0x3fee529f04729ffc,     0x3fd472b8a5571054,     //  0.94759,    0.3195
+    0x3fee5a9d550467d3,     0x3fd44310dc8936f0,     //  0.94856,   0.31659
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     //  0.94953,   0.31368
+    0x3fee6a61c55d53a7,     0x3fd3e39be96ec271,     //  0.95049,   0.31077
+    0x3fee7227db6a9744,     0x3fd3b3cefa0414b7,     //  0.95144,   0.30785
+    0x3fee79db29a5165a,     0x3fd383f5e353b6aa,     //  0.95238,   0.30493
+    0x3fee817bab4cd10d,     0x3fd35410c2e18152,     //  0.95331,   0.30201
+    0x3fee89095bad6025,     0x3fd3241fb638baaf,     //  0.95423,   0.29908
+    0x3fee9084361df7f3,     0x3fd2f422daec0386,     //  0.95514,   0.29615
+    0x3fee97ec36016b30,     0x3fd2c41a4e954520,     //  0.95605,   0.29322
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //  0.95694,   0.29028
+    0x3feea68393e65800,     0x3fd263e6995554ba,     //  0.95783,   0.28735
+    0x3feeadb2e8e7a88e,     0x3fd233bbabc3bb72,     //   0.9587,   0.28441
+    0x3feeb4cf515b8811,     0x3fd2038583d727bd,     //  0.95957,   0.28146
+    0x3feebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //  0.96043,   0.27852
+    0x3feec2cf4b1af6b2,     0x3fd1a2f7fbe8f243,     //  0.96128,   0.27557
+    0x3feec9b2d3c3bf84,     0x3fd172a0d7765177,     //  0.96212,   0.27262
+    0x3feed0835e999009,     0x3fd1423eefc69378,     //  0.96295,   0.26967
+    0x3feed740e7684963,     0x3fd111d262b1f677,     //  0.96378,   0.26671
+    0x3feeddeb6a078651,     0x3fd0e15b4e1749cd,     //  0.96459,   0.26375
+    0x3feee482e25a9dbc,     0x3fd0b0d9cfdbdb90,     //  0.96539,   0.26079
+    0x3feeeb074c50a544,     0x3fd0804e05eb661e,     //  0.96619,   0.25783
+    0x3feef178a3e473c2,     0x3fd04fb80e37fdae,     //  0.96698,   0.25487
+    0x3feef7d6e51ca3c0,     0x3fd01f1806b9fdd2,     //  0.96775,    0.2519
+    0x3feefe220c0b95ec,     0x3fcfdcdc1adfedf8,     //  0.96852,   0.24893
+    0x3fef045a14cf738c,     0x3fcf7b7480bd3801,     //  0.96928,   0.24596
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  0.97003,   0.24298
+    0x3fef1090bc898f5f,     0x3fceb86b462de348,     //  0.97077,      0.24
+    0x3fef168f53f7205d,     0x3fce56ca1e101a1b,     //   0.9715,   0.23702
+    0x3fef1c7abe284708,     0x3fcdf5163f01099a,     //  0.97223,   0.23404
+    0x3fef2252f7763ada,     0x3fcd934fe5454311,     //  0.97294,   0.23106
+    0x3fef2817fc4609ce,     0x3fcd31774d2cbdee,     //  0.97364,   0.22807
+    0x3fef2dc9c9089a9d,     0x3fcccf8cb312b286,     //  0.97434,   0.22508
+    0x3fef33685a3aaef0,     0x3fcc6d90535d74dc,     //  0.97503,   0.22209
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //   0.9757,    0.2191
+    0x3fef3e6bbc1bbc65,     0x3fcba96334f15dad,     //  0.97637,   0.21611
+    0x3fef43d085ff92dd,     0x3fcb4732ef3d6722,     //  0.97703,   0.21311
+    0x3fef492206bcabb4,     0x3fcae4f1d5f3b9ab,     //  0.97768,   0.21011
+    0x3fef4e603b0b2f2d,     0x3fca82a025b00451,     //  0.97832,   0.20711
+    0x3fef538b1faf2d07,     0x3fca203e1b1831da,     //  0.97895,   0.20411
+    0x3fef58a2b1789e84,     0x3fc9bdcbf2dc4366,     //  0.97957,    0.2011
+    0x3fef5da6ed43685d,     0x3fc95b49e9b62af9,     //  0.98018,    0.1981
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  0.98079,   0.19509
+    0x3fef677556883cee,     0x3fc8961727c41804,     //  0.98138,   0.19208
+    0x3fef6c3f7df5bbb7,     0x3fc83366e89c64c5,     //  0.98196,   0.18907
+    0x3fef70f6434b7eb7,     0x3fc7d0a7bbd2cb1b,     //  0.98254,   0.18606
+    0x3fef7599a3a12077,     0x3fc76dd9de50bf31,     //  0.98311,   0.18304
+    0x3fef7a299c1a322a,     0x3fc70afd8d08c4ff,     //  0.98366,   0.18002
+    0x3fef7ea629e63d6e,     0x3fc6a81304f64ab2,     //  0.98421,     0.177
+    0x3fef830f4a40c60c,     0x3fc6451a831d830d,     //  0.98475,   0.17398
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     //  0.98528,   0.17096
+    0x3fef8ba737cb4b78,     0x3fc57f008654cbde,     //   0.9858,   0.16794
+    0x3fef8fd5ffae41db,     0x3fc51bdf8597c5f2,     //  0.98631,   0.16491
+    0x3fef93f14f85ac08,     0x3fc4b8b17f79fa88,     //  0.98681,   0.16189
+    0x3fef97f924c9099b,     0x3fc45576b1293e5a,     //   0.9873,   0.15886
+    0x3fef9bed7cfbde29,     0x3fc3f22f57db4893,     //  0.98778,   0.15583
+    0x3fef9fce55adb2c8,     0x3fc38edbb0cd8d14,     //  0.98826,    0.1528
+    0x3fefa39bac7a1791,     0x3fc32b7bf94516a7,     //  0.98872,   0.14976
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //  0.98918,   0.14673
+    0x3fefaafbcb0cfddc,     0x3fc264994dfd340a,     //  0.98962,    0.1437
+    0x3fefae8e8e46cfbb,     0x3fc20116d4ec7bce,     //  0.99006,   0.14066
+    0x3fefb20dc681d54d,     0x3fc19d8940be24e7,     //  0.99049,   0.13762
+    0x3fefb5797195d741,     0x3fc139f0cedaf576,     //   0.9909,   0.13458
+    0x3fefb8d18d66adb7,     0x3fc0d64dbcb26786,     //  0.99131,   0.13154
+    0x3fefbc1617e44186,     0x3fc072a047ba831d,     //  0.99171,    0.1285
+    0x3fefbf470f0a8d88,     0x3fc00ee8ad6fb85b,     //   0.9921,   0.12545
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     //  0.99248,   0.12241
+    0x3fefc56e3b7d9af6,     0x3fbe8eb7fde4aa3e,     //  0.99285,   0.11937
+    0x3fefc8646cfeb721,     0x3fbdc70ecbae9fc8,     //  0.99321,   0.11632
+    0x3fefcb4703914354,     0x3fbcff533b307dc1,     //  0.99356,   0.11327
+    0x3fefce15fd6da67b,     0x3fbc3785c79ec2d5,     //  0.99391,   0.11022
+    0x3fefd0d158d86087,     0x3fbb6fa6ec38f64c,     //  0.99424,   0.10717
+    0x3fefd37914220b84,     0x3fbaa7b724495c04,     //  0.99456,   0.10412
+    0x3fefd60d2da75c9e,     0x3fb9dfb6eb24a85c,     //  0.99488,   0.10107
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //  0.99518,  0.098017
+    0x3fefdafa7514538c,     0x3fb84f8712c130a0,     //  0.99548,  0.094963
+    0x3fefdd539ff1f456,     0x3fb787586a5d5b21,     //  0.99577,  0.091909
+    0x3fefdf9922f73307,     0x3fb6bf1b3e79b129,     //  0.99604,  0.088854
+    0x3fefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //  0.99631,  0.085797
+    0x3fefe3e92be9d886,     0x3fb52e774a4d4d0a,     //  0.99657,   0.08274
+    0x3fefe5f3af2e3940,     0x3fb4661179272096,     //  0.99682,  0.079682
+    0x3fefe7ea85482d60,     0x3fb39d9f12c5a299,     //  0.99706,  0.076624
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     //  0.99729,  0.073565
+    0x3fefeb9d2530410f,     0x3fb20c9674ed444c,     //  0.99751,  0.070505
+    0x3fefed58ecb673c4,     0x3fb1440134d709b2,     //  0.99772,  0.067444
+    0x3fefef0102826191,     0x3fb07b614e463064,     //  0.99793,  0.064383
+    0x3feff095658e71ad,     0x3faf656e79f820e0,     //  0.99812,  0.061321
+    0x3feff21614e131ed,     0x3fadd406f9808ec8,     //   0.9983,  0.058258
+    0x3feff3830f8d575c,     0x3fac428d12c0d7e3,     //  0.99848,  0.055195
+    0x3feff4dc54b1bed3,     0x3faab101bd5f8317,     //  0.99864,  0.052132
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //   0.9988,  0.049068
+    0x3feff753bb1b9164,     0x3fa78dbaa5874685,     //  0.99894,  0.046003
+    0x3feff871dadb81df,     0x3fa5fc00d290cd43,     //  0.99908,  0.042938
+    0x3feff97c4208c014,     0x3fa46a396ff86179,     //   0.9992,  0.039873
+    0x3feffa72effef75d,     0x3fa2d865759455cd,     //  0.99932,  0.036807
+    0x3feffb55e425fdae,     0x3fa14685db42c17e,     //  0.99943,  0.033741
+    0x3feffc251df1d3f8,     0x3f9f693731d1cf01,     //  0.99953,  0.030675
+    0x3feffce09ce2a679,     0x3f9c454f4ce53b1c,     //  0.99962,  0.027608
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //   0.9997,  0.024541
+    0x3feffe1c6870cb77,     0x3f95fd4d21fab226,     //  0.99977,  0.021474
+    0x3feffe9cb44b51a1,     0x3f92d936bbe30efd,     //  0.99983,  0.018407
+    0x3fefff0943c53bd1,     0x3f8f6a296ab997ca,     //  0.99988,  0.015339
+    0x3fefff62169b92db,     0x3f8921d1fcdec784,     //  0.99992,  0.012272
+    0x3fefffa72c978c4f,     0x3f82d96b0e509703,     //  0.99996, 0.0092038
+    0x3fefffd8858e8a92,     0x3f7921f0fe670071,     //  0.99998, 0.0061359
+    0x3feffff621621d02,     0x3f6921f8becca4ba,     //        1,  0.003068
+    0x3ff0000000000000,     0x0000000000000000,     //        1,         0
+    0x3feffff621621d02,     0xbf6921f8becca4ba,     //        1, -0.003068
+    0x3fefffd8858e8a92,     0xbf7921f0fe670071,     //  0.99998,-0.0061359
+    0x3fefffa72c978c4f,     0xbf82d96b0e509703,     //  0.99996,-0.0092038
+    0x3fefff62169b92db,     0xbf8921d1fcdec784,     //  0.99992, -0.012272
+    0x3fefff0943c53bd1,     0xbf8f6a296ab997ca,     //  0.99988, -0.015339
+    0x3feffe9cb44b51a1,     0xbf92d936bbe30efd,     //  0.99983, -0.018407
+    0x3feffe1c6870cb77,     0xbf95fd4d21fab226,     //  0.99977, -0.021474
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //   0.9997, -0.024541
+    0x3feffce09ce2a679,     0xbf9c454f4ce53b1c,     //  0.99962, -0.027608
+    0x3feffc251df1d3f8,     0xbf9f693731d1cf01,     //  0.99953, -0.030675
+    0x3feffb55e425fdae,     0xbfa14685db42c17e,     //  0.99943, -0.033741
+    0x3feffa72effef75d,     0xbfa2d865759455cd,     //  0.99932, -0.036807
+    0x3feff97c4208c014,     0xbfa46a396ff86179,     //   0.9992, -0.039873
+    0x3feff871dadb81df,     0xbfa5fc00d290cd43,     //  0.99908, -0.042938
+    0x3feff753bb1b9164,     0xbfa78dbaa5874685,     //  0.99894, -0.046003
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //   0.9988, -0.049068
+    0x3feff4dc54b1bed3,     0xbfaab101bd5f8317,     //  0.99864, -0.052132
+    0x3feff3830f8d575c,     0xbfac428d12c0d7e3,     //  0.99848, -0.055195
+    0x3feff21614e131ed,     0xbfadd406f9808ec8,     //   0.9983, -0.058258
+    0x3feff095658e71ad,     0xbfaf656e79f820e0,     //  0.99812, -0.061321
+    0x3fefef0102826191,     0xbfb07b614e463064,     //  0.99793, -0.064383
+    0x3fefed58ecb673c4,     0xbfb1440134d709b2,     //  0.99772, -0.067444
+    0x3fefeb9d2530410f,     0xbfb20c9674ed444c,     //  0.99751, -0.070505
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     //  0.99729, -0.073565
+    0x3fefe7ea85482d60,     0xbfb39d9f12c5a299,     //  0.99706, -0.076624
+    0x3fefe5f3af2e3940,     0xbfb4661179272096,     //  0.99682, -0.079682
+    0x3fefe3e92be9d886,     0xbfb52e774a4d4d0a,     //  0.99657,  -0.08274
+    0x3fefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //  0.99631, -0.085797
+    0x3fefdf9922f73307,     0xbfb6bf1b3e79b129,     //  0.99604, -0.088854
+    0x3fefdd539ff1f456,     0xbfb787586a5d5b21,     //  0.99577, -0.091909
+    0x3fefdafa7514538c,     0xbfb84f8712c130a0,     //  0.99548, -0.094963
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //  0.99518, -0.098017
+    0x3fefd60d2da75c9e,     0xbfb9dfb6eb24a85c,     //  0.99488,  -0.10107
+    0x3fefd37914220b84,     0xbfbaa7b724495c04,     //  0.99456,  -0.10412
+    0x3fefd0d158d86087,     0xbfbb6fa6ec38f64c,     //  0.99424,  -0.10717
+    0x3fefce15fd6da67b,     0xbfbc3785c79ec2d5,     //  0.99391,  -0.11022
+    0x3fefcb4703914354,     0xbfbcff533b307dc1,     //  0.99356,  -0.11327
+    0x3fefc8646cfeb721,     0xbfbdc70ecbae9fc8,     //  0.99321,  -0.11632
+    0x3fefc56e3b7d9af6,     0xbfbe8eb7fde4aa3e,     //  0.99285,  -0.11937
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     //  0.99248,  -0.12241
+    0x3fefbf470f0a8d88,     0xbfc00ee8ad6fb85b,     //   0.9921,  -0.12545
+    0x3fefbc1617e44186,     0xbfc072a047ba831d,     //  0.99171,   -0.1285
+    0x3fefb8d18d66adb7,     0xbfc0d64dbcb26786,     //  0.99131,  -0.13154
+    0x3fefb5797195d741,     0xbfc139f0cedaf576,     //   0.9909,  -0.13458
+    0x3fefb20dc681d54d,     0xbfc19d8940be24e7,     //  0.99049,  -0.13762
+    0x3fefae8e8e46cfbb,     0xbfc20116d4ec7bce,     //  0.99006,  -0.14066
+    0x3fefaafbcb0cfddc,     0xbfc264994dfd340a,     //  0.98962,   -0.1437
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //  0.98918,  -0.14673
+    0x3fefa39bac7a1791,     0xbfc32b7bf94516a7,     //  0.98872,  -0.14976
+    0x3fef9fce55adb2c8,     0xbfc38edbb0cd8d14,     //  0.98826,   -0.1528
+    0x3fef9bed7cfbde29,     0xbfc3f22f57db4893,     //  0.98778,  -0.15583
+    0x3fef97f924c9099b,     0xbfc45576b1293e5a,     //   0.9873,  -0.15886
+    0x3fef93f14f85ac08,     0xbfc4b8b17f79fa88,     //  0.98681,  -0.16189
+    0x3fef8fd5ffae41db,     0xbfc51bdf8597c5f2,     //  0.98631,  -0.16491
+    0x3fef8ba737cb4b78,     0xbfc57f008654cbde,     //   0.9858,  -0.16794
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     //  0.98528,  -0.17096
+    0x3fef830f4a40c60c,     0xbfc6451a831d830d,     //  0.98475,  -0.17398
+    0x3fef7ea629e63d6e,     0xbfc6a81304f64ab2,     //  0.98421,    -0.177
+    0x3fef7a299c1a322a,     0xbfc70afd8d08c4ff,     //  0.98366,  -0.18002
+    0x3fef7599a3a12077,     0xbfc76dd9de50bf31,     //  0.98311,  -0.18304
+    0x3fef70f6434b7eb7,     0xbfc7d0a7bbd2cb1b,     //  0.98254,  -0.18606
+    0x3fef6c3f7df5bbb7,     0xbfc83366e89c64c5,     //  0.98196,  -0.18907
+    0x3fef677556883cee,     0xbfc8961727c41804,     //  0.98138,  -0.19208
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  0.98079,  -0.19509
+    0x3fef5da6ed43685d,     0xbfc95b49e9b62af9,     //  0.98018,   -0.1981
+    0x3fef58a2b1789e84,     0xbfc9bdcbf2dc4366,     //  0.97957,   -0.2011
+    0x3fef538b1faf2d07,     0xbfca203e1b1831da,     //  0.97895,  -0.20411
+    0x3fef4e603b0b2f2d,     0xbfca82a025b00451,     //  0.97832,  -0.20711
+    0x3fef492206bcabb4,     0xbfcae4f1d5f3b9ab,     //  0.97768,  -0.21011
+    0x3fef43d085ff92dd,     0xbfcb4732ef3d6722,     //  0.97703,  -0.21311
+    0x3fef3e6bbc1bbc65,     0xbfcba96334f15dad,     //  0.97637,  -0.21611
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //   0.9757,   -0.2191
+    0x3fef33685a3aaef0,     0xbfcc6d90535d74dc,     //  0.97503,  -0.22209
+    0x3fef2dc9c9089a9d,     0xbfcccf8cb312b286,     //  0.97434,  -0.22508
+    0x3fef2817fc4609ce,     0xbfcd31774d2cbdee,     //  0.97364,  -0.22807
+    0x3fef2252f7763ada,     0xbfcd934fe5454311,     //  0.97294,  -0.23106
+    0x3fef1c7abe284708,     0xbfcdf5163f01099a,     //  0.97223,  -0.23404
+    0x3fef168f53f7205d,     0xbfce56ca1e101a1b,     //   0.9715,  -0.23702
+    0x3fef1090bc898f5f,     0xbfceb86b462de348,     //  0.97077,     -0.24
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  0.97003,  -0.24298
+    0x3fef045a14cf738c,     0xbfcf7b7480bd3801,     //  0.96928,  -0.24596
+    0x3feefe220c0b95ec,     0xbfcfdcdc1adfedf8,     //  0.96852,  -0.24893
+    0x3feef7d6e51ca3c0,     0xbfd01f1806b9fdd2,     //  0.96775,   -0.2519
+    0x3feef178a3e473c2,     0xbfd04fb80e37fdae,     //  0.96698,  -0.25487
+    0x3feeeb074c50a544,     0xbfd0804e05eb661e,     //  0.96619,  -0.25783
+    0x3feee482e25a9dbc,     0xbfd0b0d9cfdbdb90,     //  0.96539,  -0.26079
+    0x3feeddeb6a078651,     0xbfd0e15b4e1749cd,     //  0.96459,  -0.26375
+    0x3feed740e7684963,     0xbfd111d262b1f677,     //  0.96378,  -0.26671
+    0x3feed0835e999009,     0xbfd1423eefc69378,     //  0.96295,  -0.26967
+    0x3feec9b2d3c3bf84,     0xbfd172a0d7765177,     //  0.96212,  -0.27262
+    0x3feec2cf4b1af6b2,     0xbfd1a2f7fbe8f243,     //  0.96128,  -0.27557
+    0x3feebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //  0.96043,  -0.27852
+    0x3feeb4cf515b8811,     0xbfd2038583d727bd,     //  0.95957,  -0.28146
+    0x3feeadb2e8e7a88e,     0xbfd233bbabc3bb72,     //   0.9587,  -0.28441
+    0x3feea68393e65800,     0xbfd263e6995554ba,     //  0.95783,  -0.28735
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //  0.95694,  -0.29028
+    0x3fee97ec36016b30,     0xbfd2c41a4e954520,     //  0.95605,  -0.29322
+    0x3fee9084361df7f3,     0xbfd2f422daec0386,     //  0.95514,  -0.29615
+    0x3fee89095bad6025,     0xbfd3241fb638baaf,     //  0.95423,  -0.29908
+    0x3fee817bab4cd10d,     0xbfd35410c2e18152,     //  0.95331,  -0.30201
+    0x3fee79db29a5165a,     0xbfd383f5e353b6aa,     //  0.95238,  -0.30493
+    0x3fee7227db6a9744,     0xbfd3b3cefa0414b7,     //  0.95144,  -0.30785
+    0x3fee6a61c55d53a7,     0xbfd3e39be96ec271,     //  0.95049,  -0.31077
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     //  0.94953,  -0.31368
+    0x3fee5a9d550467d3,     0xbfd44310dc8936f0,     //  0.94856,  -0.31659
+    0x3fee529f04729ffc,     0xbfd472b8a5571054,     //  0.94759,   -0.3195
+    0x3fee4a8dff81ce5e,     0xbfd4a253d11b82f3,     //   0.9466,  -0.32241
+    0x3fee426a4b2bc17e,     0xbfd4d1e24278e76a,     //  0.94561,  -0.32531
+    0x3fee3a33ec75ce85,     0xbfd50163dc197047,     //   0.9446,  -0.32821
+    0x3fee31eae870ce25,     0xbfd530d880af3c24,     //  0.94359,  -0.33111
+    0x3fee298f4439197a,     0xbfd5604012f467b4,     //  0.94257,    -0.334
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //  0.94154,  -0.33689
+    0x3fee18a02fdc66d9,     0xbfd5bee78b9db3b6,     //  0.94051,  -0.33978
+    0x3fee100cca2980ac,     0xbfd5ee27379ea693,     //  0.93946,  -0.34266
+    0x3fee0766d9280f54,     0xbfd61d595c88c203,     //   0.9384,  -0.34554
+    0x3fedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //  0.93734,  -0.34842
+    0x3fedf5e36a9ba59c,     0xbfd67b949cad63ca,     //  0.93627,  -0.35129
+    0x3feded05f7de47da,     0xbfd6aa9d7dc77e16,     //  0.93518,  -0.35416
+    0x3fede4160f6d8d81,     0xbfd6d998638a0cb5,     //  0.93409,  -0.35703
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     //  0.93299,   -0.3599
+    0x3fedd1fef38a915a,     0xbfd73763c9261092,     //  0.93188,  -0.36276
+    0x3fedc8d7cb410260,     0xbfd766340f2418f6,     //  0.93077,  -0.36561
+    0x3fedbf9e4395759a,     0xbfd794f5e613dfae,     //  0.92964,  -0.36847
+    0x3fedb6526238a09b,     0xbfd7c3a9311dcce7,     //  0.92851,  -0.37132
+    0x3fedacf42ce68ab9,     0xbfd7f24dd37341e3,     //  0.92736,  -0.37416
+    0x3feda383a9668988,     0xbfd820e3b04eaac4,     //  0.92621,  -0.37701
+    0x3fed9a00dd8b3d46,     0xbfd84f6aaaf3903f,     //  0.92505,  -0.37985
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //  0.92388,  -0.38268
+    0x3fed86c48445a450,     0xbfd8ac4b86d5ed44,     //   0.9227,  -0.38552
+    0x3fed7d0b02b8ecf9,     0xbfd8daa52ec8a4af,     //  0.92151,  -0.38835
+    0x3fed733f508c0dff,     0xbfd908ef81ef7bd1,     //  0.92032,  -0.39117
+    0x3fed696173c9e68b,     0xbfd9372a63bc93d7,     //  0.91911,  -0.39399
+    0x3fed5f7172888a7f,     0xbfd96555b7ab948f,     //   0.9179,  -0.39681
+    0x3fed556f52e93eb1,     0xbfd993716141bdfe,     //  0.91668,  -0.39962
+    0x3fed4b5b1b187524,     0xbfd9c17d440df9f2,     //  0.91545,  -0.40243
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //  0.91421,  -0.40524
+    0x3fed36fc7bcbfbdc,     0xbfda1d6543b50ac0,     //  0.91296,  -0.40804
+    0x3fed2cb220e0ef9f,     0xbfda4b4127dea1e4,     //  0.91171,  -0.41084
+    0x3fed2255c6e5a4e1,     0xbfda790cd3dbf31a,     //  0.91044,  -0.41364
+    0x3fed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //  0.90917,  -0.41643
+    0x3fed0d672f59d2b9,     0xbfdad473125cdc08,     //  0.90789,  -0.41922
+    0x3fed02d4feb2bd92,     0xbfdb020d6c7f4009,     //   0.9066,    -0.422
+    0x3fecf830e8ce467b,     0xbfdb2f971db31972,     //   0.9053,  -0.42478
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //  0.90399,  -0.42756
+    0x3fece2b32799a060,     0xbfdb8a7814fd5693,     //  0.90267,  -0.43033
+    0x3fecd7d9898b32f6,     0xbfdbb7cf2304bd01,     //  0.90135,  -0.43309
+    0x3fecccee20c2de9f,     0xbfdbe51517ffc0d9,     //  0.90002,  -0.43586
+    0x3fecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //  0.89867,  -0.43862
+    0x3fecb6e20a00da99,     0xbfdc3f6d47263129,     //  0.89732,  -0.44137
+    0x3fecabc169a0b901,     0xbfdc6c7f4997000a,     //  0.89597,  -0.44412
+    0x3feca08f19b9c449,     0xbfdc997fc3865388,     //   0.8946,  -0.44687
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     //  0.89322,  -0.44961
+    0x3fec89f587029c13,     0xbfdcf34baee1cd21,     //  0.89184,  -0.45235
+    0x3fec7e8e52233cf3,     0xbfdd2016e8e9db5b,     //  0.89045,  -0.45508
+    0x3fec7315899eaad7,     0xbfdd4cd02ba8609c,     //  0.88905,  -0.45781
+    0x3fec678b3488739b,     0xbfdd79775b86e389,     //  0.88764,  -0.46054
+    0x3fec5bef59fef85a,     0xbfdda60c5cfa10d8,     //  0.88622,  -0.46326
+    0x3fec5042012b6907,     0xbfddd28f1481cc58,     //   0.8848,  -0.46598
+    0x3fec44833141c004,     0xbfddfeff66a941de,     //  0.88336,  -0.46869
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  0.88192,   -0.4714
+    0x3fec2cd14931e3f1,     0xbfde57a86d3cd824,     //  0.88047,   -0.4741
+    0x3fec20de3fa971b0,     0xbfde83e0eaf85113,     //  0.87901,   -0.4768
+    0x3fec14d9dc465e58,     0xbfdeb00695f25620,     //  0.87755,  -0.47949
+    0x3fec08c426725549,     0xbfdedc1952ef78d5,     //  0.87607,  -0.48218
+    0x3febfc9d25a1b147,     0xbfdf081906bff7fd,     //  0.87459,  -0.48487
+    0x3febf064e15377dd,     0xbfdf3405963fd068,     //  0.87309,  -0.48755
+    0x3febe41b611154c1,     0xbfdf5fdee656cda3,     //   0.8716,  -0.49023
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //  0.87009,   -0.4929
+    0x3febcb54cb0d2327,     0xbfdfb7575c24d2de,     //  0.86857,  -0.49557
+    0x3febbed7c49380ea,     0xbfdfe2f64be7120f,     //  0.86705,  -0.49823
+    0x3febb249a0b6c40d,     0xbfe00740c82b82e0,     //  0.86551,  -0.50089
+    0x3feba5aa673590d2,     0xbfe01cfc874c3eb7,     //  0.86397,  -0.50354
+    0x3feb98fa1fd9155e,     0xbfe032ae55edbd95,     //  0.86242,  -0.50619
+    0x3feb8c38d27504e9,     0xbfe0485626ae221a,     //  0.86087,  -0.50883
+    0x3feb7f6686e792ea,     0xbfe05df3ec31b8b6,     //   0.8593,  -0.51147
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //  0.85773,   -0.5141
+    0x3feb658f14fdbc47,     0xbfe089112032b08c,     //  0.85615,  -0.51673
+    0x3feb5889fe921405,     0xbfe09e907417c5e1,     //  0.85456,  -0.51936
+    0x3feb4b7409de7925,     0xbfe0b405878f85ec,     //  0.85296,  -0.52198
+    0x3feb3e4d3ef55712,     0xbfe0c9704d5d898f,     //  0.85136,  -0.52459
+    0x3feb3115a5f37bf4,     0xbfe0ded0b84bc4b5,     //  0.84974,   -0.5272
+    0x3feb23cd470013b4,     0xbfe0f426bb2a8e7d,     //  0.84812,   -0.5298
+    0x3feb16742a4ca2f5,     0xbfe1097248d0a956,     //  0.84649,   -0.5324
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     //  0.84485,    -0.535
+    0x3feafb8fd89f57b6,     0xbfe133e9cfee254e,     //  0.84321,  -0.53759
+    0x3feaee04b43c1474,     0xbfe14915af336ceb,     //  0.84155,  -0.54017
+    0x3feae068f345ecef,     0xbfe15e36e4dbe2bc,     //  0.83989,  -0.54275
+    0x3fead2bc9e21d511,     0xbfe1734d63dedb49,     //  0.83822,  -0.54532
+    0x3feac4ffbd3efac8,     0xbfe188591f3a46e5,     //  0.83655,  -0.54789
+    0x3feab7325916c0d4,     0xbfe19d5a09f2b9b8,     //  0.83486,  -0.55046
+    0x3feaa9547a2cb98e,     0xbfe1b250171373be,     //  0.83317,  -0.55302
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  0.83147,  -0.55557
+    0x3fea8d676e545ad2,     0xbfe1dc1b64dc4872,     //  0.82976,  -0.55812
+    0x3fea7f58529fe69d,     0xbfe1f0f08bbc861b,     //  0.82805,  -0.56066
+    0x3fea7138de9d60f5,     0xbfe205baa17560d6,     //  0.82632,   -0.5632
+    0x3fea63091b02fae2,     0xbfe21a799933eb58,     //  0.82459,  -0.56573
+    0x3fea54c91090f524,     0xbfe22f2d662c13e1,     //  0.82285,  -0.56826
+    0x3fea4678c8119ac8,     0xbfe243d5fb98ac1f,     //   0.8211,  -0.57078
+    0x3fea38184a593bc6,     0xbfe258734cbb7110,     //  0.81935,   -0.5733
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     //  0.81758,  -0.57581
+    0x3fea1b26d2c0a75e,     0xbfe2818bef4d3cba,     //  0.81581,  -0.57831
+    0x3fea0c95eabaf937,     0xbfe2960727629ca8,     //  0.81404,  -0.58081
+    0x3fe9fdf4f13149de,     0xbfe2aa76e87aeb58,     //  0.81225,  -0.58331
+    0x3fe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //  0.81046,   -0.5858
+    0x3fe9e082edb42472,     0xbfe2d333d34e9bb7,     //  0.80866,  -0.58828
+    0x3fe9d1b1f5ea80d6,     0xbfe2e780e3e8ea16,     //  0.80685,  -0.59076
+    0x3fe9c2d110f075c3,     0xbfe2fbc24b441015,     //  0.80503,  -0.59323
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //  0.80321,   -0.5957
+    0x3fe9a4dfa42b06b2,     0xbfe32421ec49a620,     //  0.80138,  -0.59816
+    0x3fe995cf2ed80d22,     0xbfe338400d0c8e57,     //  0.79954,  -0.60062
+    0x3fe986aef1457594,     0xbfe34c5252c14de1,     //  0.79769,  -0.60307
+    0x3fe9777ef4c7d742,     0xbfe36058b10659f3,     //  0.79584,  -0.60551
+    0x3fe9683f42bd7fe1,     0xbfe374531b817f8d,     //  0.79398,  -0.60795
+    0x3fe958efe48e6dd7,     0xbfe3884185dfeb22,     //  0.79211,  -0.61038
+    0x3fe94990e3ac4a6c,     0xbfe39c23e3d63029,     //  0.79023,  -0.61281
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     //  0.78835,  -0.61523
+    0x3fe92aa41fc5a815,     0xbfe3c3c44981c517,     //  0.78646,  -0.61765
+    0x3fe91b166fd49da2,     0xbfe3d78238c58343,     //  0.78456,  -0.62006
+    0x3fe90b7943575efe,     0xbfe3eb33eabe0680,     //  0.78265,  -0.62246
+    0x3fe8fbcca3ef940d,     0xbfe3fed9534556d4,     //  0.78074,  -0.62486
+    0x3fe8ec109b486c49,     0xbfe41272663d108c,     //  0.77882,  -0.62725
+    0x3fe8dc45331698cc,     0xbfe425ff178e6bb1,     //  0.77689,  -0.62964
+    0x3fe8cc6a75184655,     0xbfe4397f5b2a4380,     //  0.77495,  -0.63202
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //  0.77301,  -0.63439
+    0x3fe8ac871ede1d88,     0xbfe4605a692b32a2,     //  0.77106,  -0.63676
+    0x3fe89c7e9a4dd4ab,     0xbfe473b51b987347,     //   0.7691,  -0.63912
+    0x3fe88c66e7481ba1,     0xbfe48703306091fe,     //  0.76714,  -0.64148
+    0x3fe87c400fba2ebf,     0xbfe49a449b9b0938,     //  0.76517,  -0.64383
+    0x3fe86c0a1d9aa195,     0xbfe4ad79516722f0,     //  0.76319,  -0.64618
+    0x3fe85bc51ae958cc,     0xbfe4c0a145ec0004,     //   0.7612,  -0.64851
+    0x3fe84b7111af83f9,     0xbfe4d3bc6d589f80,     //  0.75921,  -0.65085
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //  0.75721,  -0.65317
+    0x3fe82a9c13f545ff,     0xbfe4f9cc25cca486,     //   0.7552,  -0.65549
+    0x3fe81a1b33b57acc,     0xbfe50cc09f59a09b,     //  0.75319,  -0.65781
+    0x3fe8098b756e52fa,     0xbfe51fa81cd99aa6,     //  0.75117,  -0.66011
+    0x3fe7f8ece3571771,     0xbfe5328292a35596,     //  0.74914,  -0.66242
+    0x3fe7e83f87b03686,     0xbfe5454ff5159dfb,     //   0.7471,  -0.66471
+    0x3fe7d7836cc33db2,     0xbfe5581038975137,     //  0.74506,    -0.667
+    0x3fe7c6b89ce2d333,     0xbfe56ac35197649e,     //  0.74301,  -0.66928
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //  0.74095,  -0.67156
+    0x3fe7a4f707bf97d2,     0xbfe59001d5f723df,     //  0.73889,  -0.67383
+    0x3fe79400574f55e4,     0xbfe5a28d2a5d7250,     //  0.73682,  -0.67609
+    0x3fe782fb1b90b35b,     0xbfe5b50b264f7448,     //  0.73474,  -0.67835
+    0x3fe771e75f037261,     0xbfe5c77bbe65018c,     //  0.73265,   -0.6806
+    0x3fe760c52c304764,     0xbfe5d9dee73e345c,     //  0.73056,  -0.68285
+    0x3fe74f948da8d28d,     0xbfe5ec3495837074,     //  0.72846,  -0.68508
+    0x3fe73e558e079942,     0xbfe5fe7cbde56a0f,     //  0.72636,  -0.68732
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     //  0.72425,  -0.68954
+    0x3fe71bac960e41bf,     0xbfe622e44fec22ff,     //  0.72213,  -0.69176
+    0x3fe70a42b3176d7a,     0xbfe63503a31c1be8,     //     0.72,  -0.69397
+    0x3fe6f8ca99c95b75,     0xbfe64715437f535b,     //  0.71787,  -0.69618
+    0x3fe6e74454eaa8ae,     0xbfe6591925f0783e,     //  0.71573,  -0.69838
+    0x3fe6d5afef4aafcc,     0xbfe66b0f3f52b386,     //  0.71358,  -0.70057
+    0x3fe6c40d73c18275,     0xbfe67cf78491af10,     //  0.71143,  -0.70275
+    0x3fe6b25ced2fe29c,     0xbfe68ed1eaa19c71,     //  0.70927,  -0.70493
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  0.70711,  -0.70711
+    0x3fe68ed1eaa19c71,     0xbfe6b25ced2fe29c,     //  0.70493,  -0.70927
+    0x3fe67cf78491af10,     0xbfe6c40d73c18275,     //  0.70275,  -0.71143
+    0x3fe66b0f3f52b386,     0xbfe6d5afef4aafcc,     //  0.70057,  -0.71358
+    0x3fe6591925f0783e,     0xbfe6e74454eaa8ae,     //  0.69838,  -0.71573
+    0x3fe64715437f535b,     0xbfe6f8ca99c95b75,     //  0.69618,  -0.71787
+    0x3fe63503a31c1be8,     0xbfe70a42b3176d7a,     //  0.69397,     -0.72
+    0x3fe622e44fec22ff,     0xbfe71bac960e41bf,     //  0.69176,  -0.72213
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     //  0.68954,  -0.72425
+    0x3fe5fe7cbde56a0f,     0xbfe73e558e079942,     //  0.68732,  -0.72636
+    0x3fe5ec3495837074,     0xbfe74f948da8d28d,     //  0.68508,  -0.72846
+    0x3fe5d9dee73e345c,     0xbfe760c52c304764,     //  0.68285,  -0.73056
+    0x3fe5c77bbe65018c,     0xbfe771e75f037261,     //   0.6806,  -0.73265
+    0x3fe5b50b264f7448,     0xbfe782fb1b90b35b,     //  0.67835,  -0.73474
+    0x3fe5a28d2a5d7250,     0xbfe79400574f55e4,     //  0.67609,  -0.73682
+    0x3fe59001d5f723df,     0xbfe7a4f707bf97d2,     //  0.67383,  -0.73889
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //  0.67156,  -0.74095
+    0x3fe56ac35197649e,     0xbfe7c6b89ce2d333,     //  0.66928,  -0.74301
+    0x3fe5581038975137,     0xbfe7d7836cc33db2,     //    0.667,  -0.74506
+    0x3fe5454ff5159dfb,     0xbfe7e83f87b03686,     //  0.66471,   -0.7471
+    0x3fe5328292a35596,     0xbfe7f8ece3571771,     //  0.66242,  -0.74914
+    0x3fe51fa81cd99aa6,     0xbfe8098b756e52fa,     //  0.66011,  -0.75117
+    0x3fe50cc09f59a09b,     0xbfe81a1b33b57acc,     //  0.65781,  -0.75319
+    0x3fe4f9cc25cca486,     0xbfe82a9c13f545ff,     //  0.65549,   -0.7552
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //  0.65317,  -0.75721
+    0x3fe4d3bc6d589f80,     0xbfe84b7111af83f9,     //  0.65085,  -0.75921
+    0x3fe4c0a145ec0004,     0xbfe85bc51ae958cc,     //  0.64851,   -0.7612
+    0x3fe4ad79516722f0,     0xbfe86c0a1d9aa195,     //  0.64618,  -0.76319
+    0x3fe49a449b9b0938,     0xbfe87c400fba2ebf,     //  0.64383,  -0.76517
+    0x3fe48703306091fe,     0xbfe88c66e7481ba1,     //  0.64148,  -0.76714
+    0x3fe473b51b987347,     0xbfe89c7e9a4dd4ab,     //  0.63912,   -0.7691
+    0x3fe4605a692b32a2,     0xbfe8ac871ede1d88,     //  0.63676,  -0.77106
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //  0.63439,  -0.77301
+    0x3fe4397f5b2a4380,     0xbfe8cc6a75184655,     //  0.63202,  -0.77495
+    0x3fe425ff178e6bb1,     0xbfe8dc45331698cc,     //  0.62964,  -0.77689
+    0x3fe41272663d108c,     0xbfe8ec109b486c49,     //  0.62725,  -0.77882
+    0x3fe3fed9534556d4,     0xbfe8fbcca3ef940d,     //  0.62486,  -0.78074
+    0x3fe3eb33eabe0680,     0xbfe90b7943575efe,     //  0.62246,  -0.78265
+    0x3fe3d78238c58343,     0xbfe91b166fd49da2,     //  0.62006,  -0.78456
+    0x3fe3c3c44981c517,     0xbfe92aa41fc5a815,     //  0.61765,  -0.78646
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     //  0.61523,  -0.78835
+    0x3fe39c23e3d63029,     0xbfe94990e3ac4a6c,     //  0.61281,  -0.79023
+    0x3fe3884185dfeb22,     0xbfe958efe48e6dd7,     //  0.61038,  -0.79211
+    0x3fe374531b817f8d,     0xbfe9683f42bd7fe1,     //  0.60795,  -0.79398
+    0x3fe36058b10659f3,     0xbfe9777ef4c7d742,     //  0.60551,  -0.79584
+    0x3fe34c5252c14de1,     0xbfe986aef1457594,     //  0.60307,  -0.79769
+    0x3fe338400d0c8e57,     0xbfe995cf2ed80d22,     //  0.60062,  -0.79954
+    0x3fe32421ec49a620,     0xbfe9a4dfa42b06b2,     //  0.59816,  -0.80138
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //   0.5957,  -0.80321
+    0x3fe2fbc24b441015,     0xbfe9c2d110f075c3,     //  0.59323,  -0.80503
+    0x3fe2e780e3e8ea16,     0xbfe9d1b1f5ea80d6,     //  0.59076,  -0.80685
+    0x3fe2d333d34e9bb7,     0xbfe9e082edb42472,     //  0.58828,  -0.80866
+    0x3fe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //   0.5858,  -0.81046
+    0x3fe2aa76e87aeb58,     0xbfe9fdf4f13149de,     //  0.58331,  -0.81225
+    0x3fe2960727629ca8,     0xbfea0c95eabaf937,     //  0.58081,  -0.81404
+    0x3fe2818bef4d3cba,     0xbfea1b26d2c0a75e,     //  0.57831,  -0.81581
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     //  0.57581,  -0.81758
+    0x3fe258734cbb7110,     0xbfea38184a593bc6,     //   0.5733,  -0.81935
+    0x3fe243d5fb98ac1f,     0xbfea4678c8119ac8,     //  0.57078,   -0.8211
+    0x3fe22f2d662c13e1,     0xbfea54c91090f524,     //  0.56826,  -0.82285
+    0x3fe21a799933eb58,     0xbfea63091b02fae2,     //  0.56573,  -0.82459
+    0x3fe205baa17560d6,     0xbfea7138de9d60f5,     //   0.5632,  -0.82632
+    0x3fe1f0f08bbc861b,     0xbfea7f58529fe69d,     //  0.56066,  -0.82805
+    0x3fe1dc1b64dc4872,     0xbfea8d676e545ad2,     //  0.55812,  -0.82976
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  0.55557,  -0.83147
+    0x3fe1b250171373be,     0xbfeaa9547a2cb98e,     //  0.55302,  -0.83317
+    0x3fe19d5a09f2b9b8,     0xbfeab7325916c0d4,     //  0.55046,  -0.83486
+    0x3fe188591f3a46e5,     0xbfeac4ffbd3efac8,     //  0.54789,  -0.83655
+    0x3fe1734d63dedb49,     0xbfead2bc9e21d511,     //  0.54532,  -0.83822
+    0x3fe15e36e4dbe2bc,     0xbfeae068f345ecef,     //  0.54275,  -0.83989
+    0x3fe14915af336ceb,     0xbfeaee04b43c1474,     //  0.54017,  -0.84155
+    0x3fe133e9cfee254e,     0xbfeafb8fd89f57b6,     //  0.53759,  -0.84321
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //    0.535,  -0.84485
+    0x3fe1097248d0a956,     0xbfeb16742a4ca2f5,     //   0.5324,  -0.84649
+    0x3fe0f426bb2a8e7d,     0xbfeb23cd470013b4,     //   0.5298,  -0.84812
+    0x3fe0ded0b84bc4b5,     0xbfeb3115a5f37bf4,     //   0.5272,  -0.84974
+    0x3fe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //  0.52459,  -0.85136
+    0x3fe0b405878f85ec,     0xbfeb4b7409de7925,     //  0.52198,  -0.85296
+    0x3fe09e907417c5e1,     0xbfeb5889fe921405,     //  0.51936,  -0.85456
+    0x3fe089112032b08c,     0xbfeb658f14fdbc47,     //  0.51673,  -0.85615
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //   0.5141,  -0.85773
+    0x3fe05df3ec31b8b6,     0xbfeb7f6686e792ea,     //  0.51147,   -0.8593
+    0x3fe0485626ae221a,     0xbfeb8c38d27504e9,     //  0.50883,  -0.86087
+    0x3fe032ae55edbd95,     0xbfeb98fa1fd9155e,     //  0.50619,  -0.86242
+    0x3fe01cfc874c3eb7,     0xbfeba5aa673590d2,     //  0.50354,  -0.86397
+    0x3fe00740c82b82e0,     0xbfebb249a0b6c40d,     //  0.50089,  -0.86551
+    0x3fdfe2f64be7120f,     0xbfebbed7c49380ea,     //  0.49823,  -0.86705
+    0x3fdfb7575c24d2de,     0xbfebcb54cb0d2327,     //  0.49557,  -0.86857
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //   0.4929,  -0.87009
+    0x3fdf5fdee656cda3,     0xbfebe41b611154c1,     //  0.49023,   -0.8716
+    0x3fdf3405963fd068,     0xbfebf064e15377dd,     //  0.48755,  -0.87309
+    0x3fdf081906bff7fd,     0xbfebfc9d25a1b147,     //  0.48487,  -0.87459
+    0x3fdedc1952ef78d5,     0xbfec08c426725549,     //  0.48218,  -0.87607
+    0x3fdeb00695f25620,     0xbfec14d9dc465e58,     //  0.47949,  -0.87755
+    0x3fde83e0eaf85113,     0xbfec20de3fa971b0,     //   0.4768,  -0.87901
+    0x3fde57a86d3cd824,     0xbfec2cd14931e3f1,     //   0.4741,  -0.88047
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   0.4714,  -0.88192
+    0x3fddfeff66a941de,     0xbfec44833141c004,     //  0.46869,  -0.88336
+    0x3fddd28f1481cc58,     0xbfec5042012b6907,     //  0.46598,   -0.8848
+    0x3fdda60c5cfa10d8,     0xbfec5bef59fef85a,     //  0.46326,  -0.88622
+    0x3fdd79775b86e389,     0xbfec678b3488739b,     //  0.46054,  -0.88764
+    0x3fdd4cd02ba8609c,     0xbfec7315899eaad7,     //  0.45781,  -0.88905
+    0x3fdd2016e8e9db5b,     0xbfec7e8e52233cf3,     //  0.45508,  -0.89045
+    0x3fdcf34baee1cd21,     0xbfec89f587029c13,     //  0.45235,  -0.89184
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     //  0.44961,  -0.89322
+    0x3fdc997fc3865388,     0xbfeca08f19b9c449,     //  0.44687,   -0.8946
+    0x3fdc6c7f4997000a,     0xbfecabc169a0b901,     //  0.44412,  -0.89597
+    0x3fdc3f6d47263129,     0xbfecb6e20a00da99,     //  0.44137,  -0.89732
+    0x3fdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //  0.43862,  -0.89867
+    0x3fdbe51517ffc0d9,     0xbfecccee20c2de9f,     //  0.43586,  -0.90002
+    0x3fdbb7cf2304bd01,     0xbfecd7d9898b32f6,     //  0.43309,  -0.90135
+    0x3fdb8a7814fd5693,     0xbfece2b32799a060,     //  0.43033,  -0.90267
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //  0.42756,  -0.90399
+    0x3fdb2f971db31972,     0xbfecf830e8ce467b,     //  0.42478,   -0.9053
+    0x3fdb020d6c7f4009,     0xbfed02d4feb2bd92,     //    0.422,   -0.9066
+    0x3fdad473125cdc08,     0xbfed0d672f59d2b9,     //  0.41922,  -0.90789
+    0x3fdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //  0.41643,  -0.90917
+    0x3fda790cd3dbf31a,     0xbfed2255c6e5a4e1,     //  0.41364,  -0.91044
+    0x3fda4b4127dea1e4,     0xbfed2cb220e0ef9f,     //  0.41084,  -0.91171
+    0x3fda1d6543b50ac0,     0xbfed36fc7bcbfbdc,     //  0.40804,  -0.91296
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //  0.40524,  -0.91421
+    0x3fd9c17d440df9f2,     0xbfed4b5b1b187524,     //  0.40243,  -0.91545
+    0x3fd993716141bdfe,     0xbfed556f52e93eb1,     //  0.39962,  -0.91668
+    0x3fd96555b7ab948f,     0xbfed5f7172888a7f,     //  0.39681,   -0.9179
+    0x3fd9372a63bc93d7,     0xbfed696173c9e68b,     //  0.39399,  -0.91911
+    0x3fd908ef81ef7bd1,     0xbfed733f508c0dff,     //  0.39117,  -0.92032
+    0x3fd8daa52ec8a4af,     0xbfed7d0b02b8ecf9,     //  0.38835,  -0.92151
+    0x3fd8ac4b86d5ed44,     0xbfed86c48445a450,     //  0.38552,   -0.9227
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //  0.38268,  -0.92388
+    0x3fd84f6aaaf3903f,     0xbfed9a00dd8b3d46,     //  0.37985,  -0.92505
+    0x3fd820e3b04eaac4,     0xbfeda383a9668988,     //  0.37701,  -0.92621
+    0x3fd7f24dd37341e3,     0xbfedacf42ce68ab9,     //  0.37416,  -0.92736
+    0x3fd7c3a9311dcce7,     0xbfedb6526238a09b,     //  0.37132,  -0.92851
+    0x3fd794f5e613dfae,     0xbfedbf9e4395759a,     //  0.36847,  -0.92964
+    0x3fd766340f2418f6,     0xbfedc8d7cb410260,     //  0.36561,  -0.93077
+    0x3fd73763c9261092,     0xbfedd1fef38a915a,     //  0.36276,  -0.93188
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //   0.3599,  -0.93299
+    0x3fd6d998638a0cb5,     0xbfede4160f6d8d81,     //  0.35703,  -0.93409
+    0x3fd6aa9d7dc77e16,     0xbfeded05f7de47da,     //  0.35416,  -0.93518
+    0x3fd67b949cad63ca,     0xbfedf5e36a9ba59c,     //  0.35129,  -0.93627
+    0x3fd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //  0.34842,  -0.93734
+    0x3fd61d595c88c203,     0xbfee0766d9280f54,     //  0.34554,   -0.9384
+    0x3fd5ee27379ea693,     0xbfee100cca2980ac,     //  0.34266,  -0.93946
+    0x3fd5bee78b9db3b6,     0xbfee18a02fdc66d9,     //  0.33978,  -0.94051
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //  0.33689,  -0.94154
+    0x3fd5604012f467b4,     0xbfee298f4439197a,     //    0.334,  -0.94257
+    0x3fd530d880af3c24,     0xbfee31eae870ce25,     //  0.33111,  -0.94359
+    0x3fd50163dc197047,     0xbfee3a33ec75ce85,     //  0.32821,   -0.9446
+    0x3fd4d1e24278e76a,     0xbfee426a4b2bc17e,     //  0.32531,  -0.94561
+    0x3fd4a253d11b82f3,     0xbfee4a8dff81ce5e,     //  0.32241,   -0.9466
+    0x3fd472b8a5571054,     0xbfee529f04729ffc,     //   0.3195,  -0.94759
+    0x3fd44310dc8936f0,     0xbfee5a9d550467d3,     //  0.31659,  -0.94856
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     //  0.31368,  -0.94953
+    0x3fd3e39be96ec271,     0xbfee6a61c55d53a7,     //  0.31077,  -0.95049
+    0x3fd3b3cefa0414b7,     0xbfee7227db6a9744,     //  0.30785,  -0.95144
+    0x3fd383f5e353b6aa,     0xbfee79db29a5165a,     //  0.30493,  -0.95238
+    0x3fd35410c2e18152,     0xbfee817bab4cd10d,     //  0.30201,  -0.95331
+    0x3fd3241fb638baaf,     0xbfee89095bad6025,     //  0.29908,  -0.95423
+    0x3fd2f422daec0386,     0xbfee9084361df7f3,     //  0.29615,  -0.95514
+    0x3fd2c41a4e954520,     0xbfee97ec36016b30,     //  0.29322,  -0.95605
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //  0.29028,  -0.95694
+    0x3fd263e6995554ba,     0xbfeea68393e65800,     //  0.28735,  -0.95783
+    0x3fd233bbabc3bb72,     0xbfeeadb2e8e7a88e,     //  0.28441,   -0.9587
+    0x3fd2038583d727bd,     0xbfeeb4cf515b8811,     //  0.28146,  -0.95957
+    0x3fd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //  0.27852,  -0.96043
+    0x3fd1a2f7fbe8f243,     0xbfeec2cf4b1af6b2,     //  0.27557,  -0.96128
+    0x3fd172a0d7765177,     0xbfeec9b2d3c3bf84,     //  0.27262,  -0.96212
+    0x3fd1423eefc69378,     0xbfeed0835e999009,     //  0.26967,  -0.96295
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     //  0.26671,  -0.96378
+    0x3fd0e15b4e1749cd,     0xbfeeddeb6a078651,     //  0.26375,  -0.96459
+    0x3fd0b0d9cfdbdb90,     0xbfeee482e25a9dbc,     //  0.26079,  -0.96539
+    0x3fd0804e05eb661e,     0xbfeeeb074c50a544,     //  0.25783,  -0.96619
+    0x3fd04fb80e37fdae,     0xbfeef178a3e473c2,     //  0.25487,  -0.96698
+    0x3fd01f1806b9fdd2,     0xbfeef7d6e51ca3c0,     //   0.2519,  -0.96775
+    0x3fcfdcdc1adfedf8,     0xbfeefe220c0b95ec,     //  0.24893,  -0.96852
+    0x3fcf7b7480bd3801,     0xbfef045a14cf738c,     //  0.24596,  -0.96928
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  0.24298,  -0.97003
+    0x3fceb86b462de348,     0xbfef1090bc898f5f,     //     0.24,  -0.97077
+    0x3fce56ca1e101a1b,     0xbfef168f53f7205d,     //  0.23702,   -0.9715
+    0x3fcdf5163f01099a,     0xbfef1c7abe284708,     //  0.23404,  -0.97223
+    0x3fcd934fe5454311,     0xbfef2252f7763ada,     //  0.23106,  -0.97294
+    0x3fcd31774d2cbdee,     0xbfef2817fc4609ce,     //  0.22807,  -0.97364
+    0x3fcccf8cb312b286,     0xbfef2dc9c9089a9d,     //  0.22508,  -0.97434
+    0x3fcc6d90535d74dc,     0xbfef33685a3aaef0,     //  0.22209,  -0.97503
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //   0.2191,   -0.9757
+    0x3fcba96334f15dad,     0xbfef3e6bbc1bbc65,     //  0.21611,  -0.97637
+    0x3fcb4732ef3d6722,     0xbfef43d085ff92dd,     //  0.21311,  -0.97703
+    0x3fcae4f1d5f3b9ab,     0xbfef492206bcabb4,     //  0.21011,  -0.97768
+    0x3fca82a025b00451,     0xbfef4e603b0b2f2d,     //  0.20711,  -0.97832
+    0x3fca203e1b1831da,     0xbfef538b1faf2d07,     //  0.20411,  -0.97895
+    0x3fc9bdcbf2dc4366,     0xbfef58a2b1789e84,     //   0.2011,  -0.97957
+    0x3fc95b49e9b62af9,     0xbfef5da6ed43685d,     //   0.1981,  -0.98018
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  0.19509,  -0.98079
+    0x3fc8961727c41804,     0xbfef677556883cee,     //  0.19208,  -0.98138
+    0x3fc83366e89c64c5,     0xbfef6c3f7df5bbb7,     //  0.18907,  -0.98196
+    0x3fc7d0a7bbd2cb1b,     0xbfef70f6434b7eb7,     //  0.18606,  -0.98254
+    0x3fc76dd9de50bf31,     0xbfef7599a3a12077,     //  0.18304,  -0.98311
+    0x3fc70afd8d08c4ff,     0xbfef7a299c1a322a,     //  0.18002,  -0.98366
+    0x3fc6a81304f64ab2,     0xbfef7ea629e63d6e,     //    0.177,  -0.98421
+    0x3fc6451a831d830d,     0xbfef830f4a40c60c,     //  0.17398,  -0.98475
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     //  0.17096,  -0.98528
+    0x3fc57f008654cbde,     0xbfef8ba737cb4b78,     //  0.16794,   -0.9858
+    0x3fc51bdf8597c5f2,     0xbfef8fd5ffae41db,     //  0.16491,  -0.98631
+    0x3fc4b8b17f79fa88,     0xbfef93f14f85ac08,     //  0.16189,  -0.98681
+    0x3fc45576b1293e5a,     0xbfef97f924c9099b,     //  0.15886,   -0.9873
+    0x3fc3f22f57db4893,     0xbfef9bed7cfbde29,     //  0.15583,  -0.98778
+    0x3fc38edbb0cd8d14,     0xbfef9fce55adb2c8,     //   0.1528,  -0.98826
+    0x3fc32b7bf94516a7,     0xbfefa39bac7a1791,     //  0.14976,  -0.98872
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //  0.14673,  -0.98918
+    0x3fc264994dfd340a,     0xbfefaafbcb0cfddc,     //   0.1437,  -0.98962
+    0x3fc20116d4ec7bce,     0xbfefae8e8e46cfbb,     //  0.14066,  -0.99006
+    0x3fc19d8940be24e7,     0xbfefb20dc681d54d,     //  0.13762,  -0.99049
+    0x3fc139f0cedaf576,     0xbfefb5797195d741,     //  0.13458,   -0.9909
+    0x3fc0d64dbcb26786,     0xbfefb8d18d66adb7,     //  0.13154,  -0.99131
+    0x3fc072a047ba831d,     0xbfefbc1617e44186,     //   0.1285,  -0.99171
+    0x3fc00ee8ad6fb85b,     0xbfefbf470f0a8d88,     //  0.12545,   -0.9921
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     //  0.12241,  -0.99248
+    0x3fbe8eb7fde4aa3e,     0xbfefc56e3b7d9af6,     //  0.11937,  -0.99285
+    0x3fbdc70ecbae9fc8,     0xbfefc8646cfeb721,     //  0.11632,  -0.99321
+    0x3fbcff533b307dc1,     0xbfefcb4703914354,     //  0.11327,  -0.99356
+    0x3fbc3785c79ec2d5,     0xbfefce15fd6da67b,     //  0.11022,  -0.99391
+    0x3fbb6fa6ec38f64c,     0xbfefd0d158d86087,     //  0.10717,  -0.99424
+    0x3fbaa7b724495c04,     0xbfefd37914220b84,     //  0.10412,  -0.99456
+    0x3fb9dfb6eb24a85c,     0xbfefd60d2da75c9e,     //  0.10107,  -0.99488
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     // 0.098017,  -0.99518
+    0x3fb84f8712c130a0,     0xbfefdafa7514538c,     // 0.094963,  -0.99548
+    0x3fb787586a5d5b21,     0xbfefdd539ff1f456,     // 0.091909,  -0.99577
+    0x3fb6bf1b3e79b129,     0xbfefdf9922f73307,     // 0.088854,  -0.99604
+    0x3fb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     // 0.085797,  -0.99631
+    0x3fb52e774a4d4d0a,     0xbfefe3e92be9d886,     //  0.08274,  -0.99657
+    0x3fb4661179272096,     0xbfefe5f3af2e3940,     // 0.079682,  -0.99682
+    0x3fb39d9f12c5a299,     0xbfefe7ea85482d60,     // 0.076624,  -0.99706
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     // 0.073565,  -0.99729
+    0x3fb20c9674ed444c,     0xbfefeb9d2530410f,     // 0.070505,  -0.99751
+    0x3fb1440134d709b2,     0xbfefed58ecb673c4,     // 0.067444,  -0.99772
+    0x3fb07b614e463064,     0xbfefef0102826191,     // 0.064383,  -0.99793
+    0x3faf656e79f820e0,     0xbfeff095658e71ad,     // 0.061321,  -0.99812
+    0x3fadd406f9808ec8,     0xbfeff21614e131ed,     // 0.058258,   -0.9983
+    0x3fac428d12c0d7e3,     0xbfeff3830f8d575c,     // 0.055195,  -0.99848
+    0x3faab101bd5f8317,     0xbfeff4dc54b1bed3,     // 0.052132,  -0.99864
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     // 0.049068,   -0.9988
+    0x3fa78dbaa5874685,     0xbfeff753bb1b9164,     // 0.046003,  -0.99894
+    0x3fa5fc00d290cd43,     0xbfeff871dadb81df,     // 0.042938,  -0.99908
+    0x3fa46a396ff86179,     0xbfeff97c4208c014,     // 0.039873,   -0.9992
+    0x3fa2d865759455cd,     0xbfeffa72effef75d,     // 0.036807,  -0.99932
+    0x3fa14685db42c17e,     0xbfeffb55e425fdae,     // 0.033741,  -0.99943
+    0x3f9f693731d1cf01,     0xbfeffc251df1d3f8,     // 0.030675,  -0.99953
+    0x3f9c454f4ce53b1c,     0xbfeffce09ce2a679,     // 0.027608,  -0.99962
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     // 0.024541,   -0.9997
+    0x3f95fd4d21fab226,     0xbfeffe1c6870cb77,     // 0.021474,  -0.99977
+    0x3f92d936bbe30efd,     0xbfeffe9cb44b51a1,     // 0.018407,  -0.99983
+    0x3f8f6a296ab997ca,     0xbfefff0943c53bd1,     // 0.015339,  -0.99988
+    0x3f8921d1fcdec784,     0xbfefff62169b92db,     // 0.012272,  -0.99992
+    0x3f82d96b0e509703,     0xbfefffa72c978c4f,     //0.0092038,  -0.99996
+    0x3f7921f0fe670071,     0xbfefffd8858e8a92,     //0.0061359,  -0.99998
+    0x3f6921f8becca4ba,     0xbfeffff621621d02,     // 0.003068,        -1
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096)
+const uint64_t twiddleCoefF64_rfft_4096[4096] = {
+    0x0000000000000000,     0x3ff0000000000000,     //        0,         1
+    0x3f5921faaee6472d,     0x3feffffd88586ee6,     // 0.001534,         1
+    0x3f6921f8becca4ba,     0x3feffff621621d02,     // 0.003068,         1
+    0x3f72d97822f996bc,     0x3fefffe9cb1e2e8d,     //0.0046019,   0.99999
+    0x3f7921f0fe670071,     0x3fefffd8858e8a92,     //0.0061359,   0.99998
+    0x3f7f6a65f9a2a3c5,     0x3fefffc250b5daef,     //0.0076698,   0.99997
+    0x3f82d96b0e509703,     0x3fefffa72c978c4f,     //0.0092038,   0.99996
+    0x3f85fda037ac05e0,     0x3fefff871937ce2f,     // 0.010738,   0.99994
+    0x3f8921d1fcdec784,     0x3fefff62169b92db,     // 0.012272,   0.99992
+    0x3f8c45ffe1e48ad9,     0x3fefff3824c88f6f,     // 0.013805,    0.9999
+    0x3f8f6a296ab997ca,     0x3fefff0943c53bd1,     // 0.015339,   0.99988
+    0x3f9147270dad7132,     0x3feffed57398d2b7,     // 0.016873,   0.99986
+    0x3f92d936bbe30efd,     0x3feffe9cb44b51a1,     // 0.018407,   0.99983
+    0x3f946b4381fce81c,     0x3feffe5f05e578db,     //  0.01994,    0.9998
+    0x3f95fd4d21fab226,     0x3feffe1c6870cb77,     // 0.021474,   0.99977
+    0x3f978f535ddc9f03,     0x3feffdd4dbf78f52,     // 0.023008,   0.99974
+    0x3f992155f7a3667e,     0x3feffd886084cd0d,     // 0.024541,    0.9997
+    0x3f9ab354b1504fca,     0x3feffd36f624500c,     // 0.026075,   0.99966
+    0x3f9c454f4ce53b1c,     0x3feffce09ce2a679,     // 0.027608,   0.99962
+    0x3f9dd7458c64ab39,     0x3feffc8554cd213a,     // 0.029142,   0.99958
+    0x3f9f693731d1cf01,     0x3feffc251df1d3f8,     // 0.030675,   0.99953
+    0x3fa07d91ff984580,     0x3feffbbff85f9515,     // 0.032208,   0.99948
+    0x3fa14685db42c17e,     0x3feffb55e425fdae,     // 0.033741,   0.99943
+    0x3fa20f770ceb11c6,     0x3feffae6e1556998,     // 0.035274,   0.99938
+    0x3fa2d865759455cd,     0x3feffa72effef75d,     // 0.036807,   0.99932
+    0x3fa3a150f6421afc,     0x3feff9fa10348837,     //  0.03834,   0.99926
+    0x3fa46a396ff86179,     0x3feff97c4208c014,     // 0.039873,    0.9992
+    0x3fa5331ec3bba0eb,     0x3feff8f9858f058b,     // 0.041406,   0.99914
+    0x3fa5fc00d290cd43,     0x3feff871dadb81df,     // 0.042938,   0.99908
+    0x3fa6c4df7d7d5b84,     0x3feff7e5420320f9,     // 0.044471,   0.99901
+    0x3fa78dbaa5874685,     0x3feff753bb1b9164,     // 0.046003,   0.99894
+    0x3fa856922bb513c1,     0x3feff6bd463b444d,     // 0.047535,   0.99887
+    0x3fa91f65f10dd814,     0x3feff621e3796d7e,     // 0.049068,    0.9988
+    0x3fa9e835d6993c87,     0x3feff58192ee0358,     //   0.0506,   0.99872
+    0x3faab101bd5f8317,     0x3feff4dc54b1bed3,     // 0.052132,   0.99864
+    0x3fab79c986698b78,     0x3feff43228de1b77,     // 0.053664,   0.99856
+    0x3fac428d12c0d7e3,     0x3feff3830f8d575c,     // 0.055195,   0.99848
+    0x3fad0b4c436f91d0,     0x3feff2cf08da7321,     // 0.056727,   0.99839
+    0x3fadd406f9808ec8,     0x3feff21614e131ed,     // 0.058258,    0.9983
+    0x3fae9cbd15ff5527,     0x3feff15833be1965,     //  0.05979,   0.99821
+    0x3faf656e79f820e0,     0x3feff095658e71ad,     // 0.061321,   0.99812
+    0x3fb0170d833bf421,     0x3fefefcdaa704562,     // 0.062852,   0.99802
+    0x3fb07b614e463064,     0x3fefef0102826191,     // 0.064383,   0.99793
+    0x3fb0dfb28ea201e6,     0x3fefee2f6de455ba,     // 0.065913,   0.99783
+    0x3fb1440134d709b2,     0x3fefed58ecb673c4,     // 0.067444,   0.99772
+    0x3fb1a84d316d4f8a,     0x3fefec7d7f19cffc,     // 0.068974,   0.99762
+    0x3fb20c9674ed444c,     0x3fefeb9d2530410f,     // 0.070505,   0.99751
+    0x3fb270dcefdfc45b,     0x3fefeab7df1c6005,     // 0.072035,    0.9974
+    0x3fb2d52092ce19f6,     0x3fefe9cdad01883a,     // 0.073565,   0.99729
+    0x3fb339614e41ffa5,     0x3fefe8de8f03d75c,     // 0.075094,   0.99718
+    0x3fb39d9f12c5a299,     0x3fefe7ea85482d60,     // 0.076624,   0.99706
+    0x3fb401d9d0e3a507,     0x3fefe6f18ff42c84,     // 0.078153,   0.99694
+    0x3fb4661179272096,     0x3fefe5f3af2e3940,     // 0.079682,   0.99682
+    0x3fb4ca45fc1ba8b6,     0x3fefe4f0e31d7a4a,     // 0.081211,    0.9967
+    0x3fb52e774a4d4d0a,     0x3fefe3e92be9d886,     //  0.08274,   0.99657
+    0x3fb592a554489bc8,     0x3fefe2dc89bbff08,     // 0.084269,   0.99644
+    0x3fb5f6d00a9aa419,     0x3fefe1cafcbd5b09,     // 0.085797,   0.99631
+    0x3fb65af75dd0f87b,     0x3fefe0b485181be3,     // 0.087326,   0.99618
+    0x3fb6bf1b3e79b129,     0x3fefdf9922f73307,     // 0.088854,   0.99604
+    0x3fb7233b9d236e71,     0x3fefde78d68653fd,     // 0.090381,   0.99591
+    0x3fb787586a5d5b21,     0x3fefdd539ff1f456,     // 0.091909,   0.99577
+    0x3fb7eb7196b72ee4,     0x3fefdc297f674ba9,     // 0.093436,   0.99563
+    0x3fb84f8712c130a0,     0x3fefdafa7514538c,     // 0.094963,   0.99548
+    0x3fb8b398cf0c38e0,     0x3fefd9c68127c78c,     //  0.09649,   0.99533
+    0x3fb917a6bc29b42c,     0x3fefd88da3d12526,     // 0.098017,   0.99518
+    0x3fb97bb0caaba56f,     0x3fefd74fdd40abbf,     // 0.099544,   0.99503
+    0x3fb9dfb6eb24a85c,     0x3fefd60d2da75c9e,     //  0.10107,   0.99488
+    0x3fba43b90e27f3c4,     0x3fefd4c59536fae4,     //   0.1026,   0.99472
+    0x3fbaa7b724495c04,     0x3fefd37914220b84,     //  0.10412,   0.99456
+    0x3fbb0bb11e1d5559,     0x3fefd227aa9bd53b,     //  0.10565,    0.9944
+    0x3fbb6fa6ec38f64c,     0x3fefd0d158d86087,     //  0.10717,   0.99424
+    0x3fbbd3987f31fa0e,     0x3fefcf761f0c77a3,     //   0.1087,   0.99407
+    0x3fbc3785c79ec2d5,     0x3fefce15fd6da67b,     //  0.11022,   0.99391
+    0x3fbc9b6eb6165c42,     0x3fefccb0f4323aa3,     //  0.11175,   0.99374
+    0x3fbcff533b307dc1,     0x3fefcb4703914354,     //  0.11327,   0.99356
+    0x3fbd633347858ce4,     0x3fefc9d82bc2915e,     //  0.11479,   0.99339
+    0x3fbdc70ecbae9fc8,     0x3fefc8646cfeb721,     //  0.11632,   0.99321
+    0x3fbe2ae5b8457f77,     0x3fefc6ebc77f0887,     //  0.11784,   0.99303
+    0x3fbe8eb7fde4aa3e,     0x3fefc56e3b7d9af6,     //  0.11937,   0.99285
+    0x3fbef2858d27561b,     0x3fefc3ebc935454c,     //  0.12089,   0.99267
+    0x3fbf564e56a9730e,     0x3fefc26470e19fd3,     //  0.12241,   0.99248
+    0x3fbfba124b07ad85,     0x3fefc0d832bf043a,     //  0.12393,   0.99229
+    0x3fc00ee8ad6fb85b,     0x3fefbf470f0a8d88,     //  0.12545,    0.9921
+    0x3fc040c5bb67747e,     0x3fefbdb106021816,     //  0.12698,   0.99191
+    0x3fc072a047ba831d,     0x3fefbc1617e44186,     //   0.1285,   0.99171
+    0x3fc0a4784ab8bf1d,     0x3fefba7644f068b5,     //  0.13002,   0.99151
+    0x3fc0d64dbcb26786,     0x3fefb8d18d66adb7,     //  0.13154,   0.99131
+    0x3fc1082095f820b0,     0x3fefb727f187f1c7,     //  0.13306,   0.99111
+    0x3fc139f0cedaf576,     0x3fefb5797195d741,     //  0.13458,    0.9909
+    0x3fc16bbe5fac5865,     0x3fefb3c60dd2c199,     //   0.1361,    0.9907
+    0x3fc19d8940be24e7,     0x3fefb20dc681d54d,     //  0.13762,   0.99049
+    0x3fc1cf516a62a077,     0x3fefb0509be6f7db,     //  0.13914,   0.99027
+    0x3fc20116d4ec7bce,     0x3fefae8e8e46cfbb,     //  0.14066,   0.99006
+    0x3fc232d978aed413,     0x3fefacc79de6c44f,     //  0.14218,   0.98984
+    0x3fc264994dfd340a,     0x3fefaafbcb0cfddc,     //   0.1437,   0.98962
+    0x3fc296564d2b953e,     0x3fefa92b1600657c,     //  0.14521,    0.9894
+    0x3fc2c8106e8e613a,     0x3fefa7557f08a517,     //  0.14673,   0.98918
+    0x3fc2f9c7aa7a72af,     0x3fefa57b066e2754,     //  0.14825,   0.98895
+    0x3fc32b7bf94516a7,     0x3fefa39bac7a1791,     //  0.14976,   0.98872
+    0x3fc35d2d53440db2,     0x3fefa1b7717661d5,     //  0.15128,   0.98849
+    0x3fc38edbb0cd8d14,     0x3fef9fce55adb2c8,     //   0.1528,   0.98826
+    0x3fc3c0870a383ff6,     0x3fef9de0596b77a3,     //  0.15431,   0.98802
+    0x3fc3f22f57db4893,     0x3fef9bed7cfbde29,     //  0.15583,   0.98778
+    0x3fc423d4920e4166,     0x3fef99f5c0abd496,     //  0.15734,   0.98754
+    0x3fc45576b1293e5a,     0x3fef97f924c9099b,     //  0.15886,    0.9873
+    0x3fc48715ad84cdf5,     0x3fef95f7a9a1ec47,     //  0.16037,   0.98706
+    0x3fc4b8b17f79fa88,     0x3fef93f14f85ac08,     //  0.16189,   0.98681
+    0x3fc4ea4a1f624b61,     0x3fef91e616c43891,     //   0.1634,   0.98656
+    0x3fc51bdf8597c5f2,     0x3fef8fd5ffae41db,     //  0.16491,   0.98631
+    0x3fc54d71aa74ef02,     0x3fef8dc10a95380d,     //  0.16643,   0.98605
+    0x3fc57f008654cbde,     0x3fef8ba737cb4b78,     //  0.16794,    0.9858
+    0x3fc5b08c1192e381,     0x3fef898887a36c84,     //  0.16945,   0.98554
+    0x3fc5e214448b3fc6,     0x3fef8764fa714ba9,     //  0.17096,   0.98528
+    0x3fc61399179a6e94,     0x3fef853c9089595e,     //  0.17247,   0.98501
+    0x3fc6451a831d830d,     0x3fef830f4a40c60c,     //  0.17398,   0.98475
+    0x3fc676987f7216b8,     0x3fef80dd27ed8204,     //  0.17549,   0.98448
+    0x3fc6a81304f64ab2,     0x3fef7ea629e63d6e,     //    0.177,   0.98421
+    0x3fc6d98a0c08c8da,     0x3fef7c6a50826840,     //  0.17851,   0.98394
+    0x3fc70afd8d08c4ff,     0x3fef7a299c1a322a,     //  0.18002,   0.98366
+    0x3fc73c6d8055fe0a,     0x3fef77e40d068a90,     //  0.18153,   0.98339
+    0x3fc76dd9de50bf31,     0x3fef7599a3a12077,     //  0.18304,   0.98311
+    0x3fc79f429f59e11d,     0x3fef734a60446279,     //  0.18455,   0.98282
+    0x3fc7d0a7bbd2cb1b,     0x3fef70f6434b7eb7,     //  0.18606,   0.98254
+    0x3fc802092c1d744b,     0x3fef6e9d4d1262ca,     //  0.18756,   0.98225
+    0x3fc83366e89c64c5,     0x3fef6c3f7df5bbb7,     //  0.18907,   0.98196
+    0x3fc864c0e9b2b6cf,     0x3fef69dcd652f5de,     //  0.19057,   0.98167
+    0x3fc8961727c41804,     0x3fef677556883cee,     //  0.19208,   0.98138
+    0x3fc8c7699b34ca7e,     0x3fef6508fef47bd5,     //  0.19359,   0.98108
+    0x3fc8f8b83c69a60a,     0x3fef6297cff75cb0,     //  0.19509,   0.98079
+    0x3fc92a0303c8194f,     0x3fef6021c9f148c2,     //  0.19659,   0.98048
+    0x3fc95b49e9b62af9,     0x3fef5da6ed43685d,     //   0.1981,   0.98018
+    0x3fc98c8ce69a7aec,     0x3fef5b273a4fa2d9,     //   0.1996,   0.97988
+    0x3fc9bdcbf2dc4366,     0x3fef58a2b1789e84,     //   0.2011,   0.97957
+    0x3fc9ef0706e35a35,     0x3fef56195321c090,     //  0.20261,   0.97926
+    0x3fca203e1b1831da,     0x3fef538b1faf2d07,     //  0.20411,   0.97895
+    0x3fca517127e3dabc,     0x3fef50f81785c6b9,     //  0.20561,   0.97863
+    0x3fca82a025b00451,     0x3fef4e603b0b2f2d,     //  0.20711,   0.97832
+    0x3fcab3cb0ce6fe44,     0x3fef4bc38aa5c694,     //  0.20861,     0.978
+    0x3fcae4f1d5f3b9ab,     0x3fef492206bcabb4,     //  0.21011,   0.97768
+    0x3fcb16147941ca2a,     0x3fef467bafb7bbe0,     //  0.21161,   0.97735
+    0x3fcb4732ef3d6722,     0x3fef43d085ff92dd,     //  0.21311,   0.97703
+    0x3fcb784d30536cda,     0x3fef412089fd8adc,     //  0.21461,    0.9767
+    0x3fcba96334f15dad,     0x3fef3e6bbc1bbc65,     //  0.21611,   0.97637
+    0x3fcbda74f5856330,     0x3fef3bb21cc4fe47,     //   0.2176,   0.97604
+    0x3fcc0b826a7e4f63,     0x3fef38f3ac64e589,     //   0.2191,    0.9757
+    0x3fcc3c8b8c4b9dd7,     0x3fef36306b67c556,     //   0.2206,   0.97536
+    0x3fcc6d90535d74dc,     0x3fef33685a3aaef0,     //  0.22209,   0.97503
+    0x3fcc9e90b824a6a9,     0x3fef309b794b719f,     //  0.22359,   0.97468
+    0x3fcccf8cb312b286,     0x3fef2dc9c9089a9d,     //  0.22508,   0.97434
+    0x3fcd00843c99c5f9,     0x3fef2af349e17507,     //  0.22658,   0.97399
+    0x3fcd31774d2cbdee,     0x3fef2817fc4609ce,     //  0.22807,   0.97364
+    0x3fcd6265dd3f27e3,     0x3fef2537e0a71f9f,     //  0.22957,   0.97329
+    0x3fcd934fe5454311,     0x3fef2252f7763ada,     //  0.23106,   0.97294
+    0x3fcdc4355db40195,     0x3fef1f6941259d7a,     //  0.23255,   0.97258
+    0x3fcdf5163f01099a,     0x3fef1c7abe284708,     //  0.23404,   0.97223
+    0x3fce25f281a2b684,     0x3fef19876ef1f486,     //  0.23553,   0.97187
+    0x3fce56ca1e101a1b,     0x3fef168f53f7205d,     //  0.23702,    0.9715
+    0x3fce879d0cc0fdaf,     0x3fef13926dad024e,     //  0.23851,   0.97114
+    0x3fceb86b462de348,     0x3fef1090bc898f5f,     //     0.24,   0.97077
+    0x3fcee934c2d006c7,     0x3fef0d8a410379c5,     //  0.24149,    0.9704
+    0x3fcf19f97b215f1a,     0x3fef0a7efb9230d7,     //  0.24298,   0.97003
+    0x3fcf4ab9679c9f5c,     0x3fef076eecade0fa,     //  0.24447,   0.96966
+    0x3fcf7b7480bd3801,     0x3fef045a14cf738c,     //  0.24596,   0.96928
+    0x3fcfac2abeff57ff,     0x3fef014074708ed3,     //  0.24744,    0.9689
+    0x3fcfdcdc1adfedf8,     0x3feefe220c0b95ec,     //  0.24893,   0.96852
+    0x3fd006c4466e54af,     0x3feefafedc1ba8b7,     //  0.25041,   0.96814
+    0x3fd01f1806b9fdd2,     0x3feef7d6e51ca3c0,     //   0.2519,   0.96775
+    0x3fd037694a928cac,     0x3feef4aa278b2032,     //  0.25338,   0.96737
+    0x3fd04fb80e37fdae,     0x3feef178a3e473c2,     //  0.25487,   0.96698
+    0x3fd068044deab002,     0x3feeee425aa6b09a,     //  0.25635,   0.96658
+    0x3fd0804e05eb661e,     0x3feeeb074c50a544,     //  0.25783,   0.96619
+    0x3fd09895327b465e,     0x3feee7c77961dc9e,     //  0.25931,   0.96579
+    0x3fd0b0d9cfdbdb90,     0x3feee482e25a9dbc,     //  0.26079,   0.96539
+    0x3fd0c91bda4f158d,     0x3feee13987bbebdc,     //  0.26227,   0.96499
+    0x3fd0e15b4e1749cd,     0x3feeddeb6a078651,     //  0.26375,   0.96459
+    0x3fd0f998277733f7,     0x3feeda9889bfe86a,     //  0.26523,   0.96418
+    0x3fd111d262b1f677,     0x3feed740e7684963,     //  0.26671,   0.96378
+    0x3fd12a09fc0b1b12,     0x3feed3e483849c51,     //  0.26819,   0.96337
+    0x3fd1423eefc69378,     0x3feed0835e999009,     //  0.26967,   0.96295
+    0x3fd15a713a28b9d9,     0x3feecd1d792c8f10,     //  0.27115,   0.96254
+    0x3fd172a0d7765177,     0x3feec9b2d3c3bf84,     //  0.27262,   0.96212
+    0x3fd18acdc3f4873a,     0x3feec6436ee60309,     //   0.2741,    0.9617
+    0x3fd1a2f7fbe8f243,     0x3feec2cf4b1af6b2,     //  0.27557,   0.96128
+    0x3fd1bb1f7b999480,     0x3feebf5668eaf2ef,     //  0.27705,   0.96086
+    0x3fd1d3443f4cdb3d,     0x3feebbd8c8df0b74,     //  0.27852,   0.96043
+    0x3fd1eb6643499fbb,     0x3feeb8566b810f2a,     //  0.27999,      0.96
+    0x3fd2038583d727bd,     0x3feeb4cf515b8811,     //  0.28146,   0.95957
+    0x3fd21ba1fd3d2623,     0x3feeb1437af9bb34,     //  0.28294,   0.95914
+    0x3fd233bbabc3bb72,     0x3feeadb2e8e7a88e,     //  0.28441,    0.9587
+    0x3fd24bd28bb37672,     0x3feeaa1d9bb20af3,     //  0.28588,   0.95827
+    0x3fd263e6995554ba,     0x3feea68393e65800,     //  0.28735,   0.95783
+    0x3fd27bf7d0f2c346,     0x3feea2e4d212c000,     //  0.28882,   0.95738
+    0x3fd294062ed59f05,     0x3fee9f4156c62dda,     //  0.29028,   0.95694
+    0x3fd2ac11af483572,     0x3fee9b99229046f8,     //  0.29175,   0.95649
+    0x3fd2c41a4e954520,     0x3fee97ec36016b30,     //  0.29322,   0.95605
+    0x3fd2dc200907fe51,     0x3fee943a91aab4b4,     //  0.29469,   0.95559
+    0x3fd2f422daec0386,     0x3fee9084361df7f3,     //  0.29615,   0.95514
+    0x3fd30c22c08d6a13,     0x3fee8cc923edc388,     //  0.29762,   0.95469
+    0x3fd3241fb638baaf,     0x3fee89095bad6025,     //  0.29908,   0.95423
+    0x3fd33c19b83af207,     0x3fee8544ddf0d075,     //  0.30054,   0.95377
+    0x3fd35410c2e18152,     0x3fee817bab4cd10d,     //  0.30201,   0.95331
+    0x3fd36c04d27a4edf,     0x3fee7dadc456d850,     //  0.30347,   0.95284
+    0x3fd383f5e353b6aa,     0x3fee79db29a5165a,     //  0.30493,   0.95238
+    0x3fd39be3f1bc8aef,     0x3fee7603dbce74e9,     //  0.30639,   0.95191
+    0x3fd3b3cefa0414b7,     0x3fee7227db6a9744,     //  0.30785,   0.95144
+    0x3fd3cbb6f87a146e,     0x3fee6e472911da27,     //  0.30931,   0.95096
+    0x3fd3e39be96ec271,     0x3fee6a61c55d53a7,     //  0.31077,   0.95049
+    0x3fd3fb7dc932cfa4,     0x3fee6677b0e6d31e,     //  0.31222,   0.95001
+    0x3fd4135c94176602,     0x3fee6288ec48e112,     //  0.31368,   0.94953
+    0x3fd42b38466e2928,     0x3fee5e95781ebf1c,     //  0.31514,   0.94905
+    0x3fd44310dc8936f0,     0x3fee5a9d550467d3,     //  0.31659,   0.94856
+    0x3fd45ae652bb2800,     0x3fee56a083968eb1,     //  0.31805,   0.94807
+    0x3fd472b8a5571054,     0x3fee529f04729ffc,     //   0.3195,   0.94759
+    0x3fd48a87d0b07fd7,     0x3fee4e98d836c0af,     //  0.32096,   0.94709
+    0x3fd4a253d11b82f3,     0x3fee4a8dff81ce5e,     //  0.32241,    0.9466
+    0x3fd4ba1ca2eca31c,     0x3fee467e7af35f23,     //  0.32386,   0.94611
+    0x3fd4d1e24278e76a,     0x3fee426a4b2bc17e,     //  0.32531,   0.94561
+    0x3fd4e9a4ac15d520,     0x3fee3e5170cbfc46,     //  0.32676,   0.94511
+    0x3fd50163dc197047,     0x3fee3a33ec75ce85,     //  0.32821,    0.9446
+    0x3fd5191fceda3c35,     0x3fee3611becbaf69,     //  0.32966,    0.9441
+    0x3fd530d880af3c24,     0x3fee31eae870ce25,     //  0.33111,   0.94359
+    0x3fd5488dedeff3be,     0x3fee2dbf6a0911d9,     //  0.33255,   0.94308
+    0x3fd5604012f467b4,     0x3fee298f4439197a,     //    0.334,   0.94257
+    0x3fd577eeec151e47,     0x3fee255a77a63bb8,     //  0.33545,   0.94206
+    0x3fd58f9a75ab1fdd,     0x3fee212104f686e5,     //  0.33689,   0.94154
+    0x3fd5a742ac0ff78d,     0x3fee1ce2ecd0c0d8,     //  0.33833,   0.94103
+    0x3fd5bee78b9db3b6,     0x3fee18a02fdc66d9,     //  0.33978,   0.94051
+    0x3fd5d68910aee686,     0x3fee1458cec1ad83,     //  0.34122,   0.93998
+    0x3fd5ee27379ea693,     0x3fee100cca2980ac,     //  0.34266,   0.93946
+    0x3fd605c1fcc88f63,     0x3fee0bbc22bd8349,     //   0.3441,   0.93893
+    0x3fd61d595c88c203,     0x3fee0766d9280f54,     //  0.34554,    0.9384
+    0x3fd634ed533be58e,     0x3fee030cee1435b8,     //  0.34698,   0.93787
+    0x3fd64c7ddd3f27c6,     0x3fedfeae622dbe2b,     //  0.34842,   0.93734
+    0x3fd6640af6f03d9e,     0x3fedfa4b3621271d,     //  0.34986,    0.9368
+    0x3fd67b949cad63ca,     0x3fedf5e36a9ba59c,     //  0.35129,   0.93627
+    0x3fd6931acad55f51,     0x3fedf177004b2534,     //  0.35273,   0.93573
+    0x3fd6aa9d7dc77e16,     0x3feded05f7de47da,     //  0.35416,   0.93518
+    0x3fd6c21cb1e39771,     0x3fede890520465ce,     //   0.3556,   0.93464
+    0x3fd6d998638a0cb5,     0x3fede4160f6d8d81,     //  0.35703,   0.93409
+    0x3fd6f1108f1bc9c5,     0x3feddf9730ca837b,     //  0.35846,   0.93354
+    0x3fd7088530fa459e,     0x3feddb13b6ccc23d,     //   0.3599,   0.93299
+    0x3fd71ff6458782ec,     0x3fedd68ba2267a25,     //  0.36133,   0.93244
+    0x3fd73763c9261092,     0x3fedd1fef38a915a,     //  0.36276,   0.93188
+    0x3fd74ecdb8390a3e,     0x3fedcd6dabaca3a5,     //  0.36418,   0.93133
+    0x3fd766340f2418f6,     0x3fedc8d7cb410260,     //  0.36561,   0.93077
+    0x3fd77d96ca4b73a6,     0x3fedc43d52fcb453,     //  0.36704,   0.93021
+    0x3fd794f5e613dfae,     0x3fedbf9e4395759a,     //  0.36847,   0.92964
+    0x3fd7ac515ee2b172,     0x3fedbafa9dc1b78d,     //  0.36989,   0.92907
+    0x3fd7c3a9311dcce7,     0x3fedb6526238a09b,     //  0.37132,   0.92851
+    0x3fd7dafd592ba621,     0x3fedb1a591b20c38,     //  0.37274,   0.92794
+    0x3fd7f24dd37341e3,     0x3fedacf42ce68ab9,     //  0.37416,   0.92736
+    0x3fd8099a9c5c362d,     0x3feda83e348f613b,     //  0.37559,   0.92679
+    0x3fd820e3b04eaac4,     0x3feda383a9668988,     //  0.37701,   0.92621
+    0x3fd838290bb359c8,     0x3fed9ec48c26b1f3,     //  0.37843,   0.92563
+    0x3fd84f6aaaf3903f,     0x3fed9a00dd8b3d46,     //  0.37985,   0.92505
+    0x3fd866a88a792ea0,     0x3fed95389e50429b,     //  0.38127,   0.92447
+    0x3fd87de2a6aea963,     0x3fed906bcf328d46,     //  0.38268,   0.92388
+    0x3fd89518fbff098e,     0x3fed8b9a70ef9cb4,     //   0.3841,   0.92329
+    0x3fd8ac4b86d5ed44,     0x3fed86c48445a450,     //  0.38552,    0.9227
+    0x3fd8c37a439f884f,     0x3fed81ea09f38b63,     //  0.38693,   0.92211
+    0x3fd8daa52ec8a4af,     0x3fed7d0b02b8ecf9,     //  0.38835,   0.92151
+    0x3fd8f1cc44bea329,     0x3fed78276f5617c6,     //  0.38976,   0.92092
+    0x3fd908ef81ef7bd1,     0x3fed733f508c0dff,     //  0.39117,   0.92032
+    0x3fd9200ee2c9be97,     0x3fed6e52a71c8547,     //  0.39258,   0.91972
+    0x3fd9372a63bc93d7,     0x3fed696173c9e68b,     //  0.39399,   0.91911
+    0x3fd94e420137bce3,     0x3fed646bb7574de5,     //   0.3954,   0.91851
+    0x3fd96555b7ab948f,     0x3fed5f7172888a7f,     //  0.39681,    0.9179
+    0x3fd97c6583890fc2,     0x3fed5a72a6221e73,     //  0.39822,   0.91729
+    0x3fd993716141bdfe,     0x3fed556f52e93eb1,     //  0.39962,   0.91668
+    0x3fd9aa794d47c9ee,     0x3fed506779a3d2d9,     //  0.40103,   0.91606
+    0x3fd9c17d440df9f2,     0x3fed4b5b1b187524,     //  0.40243,   0.91545
+    0x3fd9d87d4207b0ab,     0x3fed464a380e7242,     //  0.40384,   0.91483
+    0x3fd9ef7943a8ed8a,     0x3fed4134d14dc93a,     //  0.40524,   0.91421
+    0x3fda067145664d57,     0x3fed3c1ae79f2b4e,     //  0.40664,   0.91359
+    0x3fda1d6543b50ac0,     0x3fed36fc7bcbfbdc,     //  0.40804,   0.91296
+    0x3fda34553b0afee5,     0x3fed31d98e9e503a,     //  0.40944,   0.91234
+    0x3fda4b4127dea1e4,     0x3fed2cb220e0ef9f,     //  0.41084,   0.91171
+    0x3fda622906a70b63,     0x3fed2786335f52fc,     //  0.41224,   0.91107
+    0x3fda790cd3dbf31a,     0x3fed2255c6e5a4e1,     //  0.41364,   0.91044
+    0x3fda8fec8bf5b166,     0x3fed1d20dc40c15c,     //  0.41503,   0.90981
+    0x3fdaa6c82b6d3fc9,     0x3fed17e7743e35dc,     //  0.41643,   0.90917
+    0x3fdabd9faebc3980,     0x3fed12a98fac410c,     //  0.41782,   0.90853
+    0x3fdad473125cdc08,     0x3fed0d672f59d2b9,     //  0.41922,   0.90789
+    0x3fdaeb4252ca07ab,     0x3fed082054168bac,     //  0.42061,   0.90724
+    0x3fdb020d6c7f4009,     0x3fed02d4feb2bd92,     //    0.422,    0.9066
+    0x3fdb18d45bf8aca6,     0x3fecfd852fff6ad4,     //  0.42339,   0.90595
+    0x3fdb2f971db31972,     0x3fecf830e8ce467b,     //  0.42478,    0.9053
+    0x3fdb4655ae2bf757,     0x3fecf2d829f1b40e,     //  0.42617,   0.90464
+    0x3fdb5d1009e15cc0,     0x3feced7af43cc773,     //  0.42756,   0.90399
+    0x3fdb73c62d520624,     0x3fece819488344ce,     //  0.42894,   0.90333
+    0x3fdb8a7814fd5693,     0x3fece2b32799a060,     //  0.43033,   0.90267
+    0x3fdba125bd63583e,     0x3fecdd489254fe65,     //  0.43171,   0.90201
+    0x3fdbb7cf2304bd01,     0x3fecd7d9898b32f6,     //  0.43309,   0.90135
+    0x3fdbce744262deee,     0x3fecd2660e12c1e6,     //  0.43448,   0.90068
+    0x3fdbe51517ffc0d9,     0x3fecccee20c2de9f,     //  0.43586,   0.90002
+    0x3fdbfbb1a05e0edc,     0x3fecc771c2736c09,     //  0.43724,   0.89935
+    0x3fdc1249d8011ee7,     0x3fecc1f0f3fcfc5c,     //  0.43862,   0.89867
+    0x3fdc28ddbb6cf145,     0x3fecbc6bb638d10b,     //  0.43999,     0.898
+    0x3fdc3f6d47263129,     0x3fecb6e20a00da99,     //  0.44137,   0.89732
+    0x3fdc55f877b23537,     0x3fecb153f02fb87d,     //  0.44275,   0.89665
+    0x3fdc6c7f4997000a,     0x3fecabc169a0b901,     //  0.44412,   0.89597
+    0x3fdc8301b95b40c2,     0x3feca62a772fd919,     //   0.4455,   0.89528
+    0x3fdc997fc3865388,     0x3feca08f19b9c449,     //  0.44687,    0.8946
+    0x3fdcaff964a0421d,     0x3fec9aef521bd480,     //  0.44824,   0.89391
+    0x3fdcc66e9931c45d,     0x3fec954b213411f5,     //  0.44961,   0.89322
+    0x3fdcdcdf5dc440ce,     0x3fec8fa287e13305,     //  0.45098,   0.89253
+    0x3fdcf34baee1cd21,     0x3fec89f587029c13,     //  0.45235,   0.89184
+    0x3fdd09b389152ec1,     0x3fec84441f785f61,     //  0.45372,   0.89115
+    0x3fdd2016e8e9db5b,     0x3fec7e8e52233cf3,     //  0.45508,   0.89045
+    0x3fdd3675caebf962,     0x3fec78d41fe4a267,     //  0.45645,   0.88975
+    0x3fdd4cd02ba8609c,     0x3fec7315899eaad7,     //  0.45781,   0.88905
+    0x3fdd632607ac9aa9,     0x3fec6d5290341eb2,     //  0.45918,   0.88835
+    0x3fdd79775b86e389,     0x3fec678b3488739b,     //  0.46054,   0.88764
+    0x3fdd8fc423c62a25,     0x3fec61bf777fcc48,     //   0.4619,   0.88693
+    0x3fdda60c5cfa10d8,     0x3fec5bef59fef85a,     //  0.46326,   0.88622
+    0x3fddbc5003b2edf8,     0x3fec561adceb743e,     //  0.46462,   0.88551
+    0x3fddd28f1481cc58,     0x3fec5042012b6907,     //  0.46598,    0.8848
+    0x3fdde8c98bf86bd6,     0x3fec4a64c7a5ac4c,     //  0.46733,   0.88408
+    0x3fddfeff66a941de,     0x3fec44833141c004,     //  0.46869,   0.88336
+    0x3fde1530a12779f4,     0x3fec3e9d3ee7d262,     //  0.47004,   0.88264
+    0x3fde2b5d3806f63b,     0x3fec38b2f180bdb1,     //   0.4714,   0.88192
+    0x3fde418527dc4ffa,     0x3fec32c449f60831,     //  0.47275,    0.8812
+    0x3fde57a86d3cd824,     0x3fec2cd14931e3f1,     //   0.4741,   0.88047
+    0x3fde6dc704be97e2,     0x3fec26d9f01f2eaf,     //  0.47545,   0.87974
+    0x3fde83e0eaf85113,     0x3fec20de3fa971b0,     //   0.4768,   0.87901
+    0x3fde99f61c817eda,     0x3fec1ade38bce19b,     //  0.47815,   0.87828
+    0x3fdeb00695f25620,     0x3fec14d9dc465e58,     //  0.47949,   0.87755
+    0x3fdec61253e3c61b,     0x3fec0ed12b3372e9,     //  0.48084,   0.87681
+    0x3fdedc1952ef78d5,     0x3fec08c426725549,     //  0.48218,   0.87607
+    0x3fdef21b8fafd3b5,     0x3fec02b2cef1e641,     //  0.48353,   0.87533
+    0x3fdf081906bff7fd,     0x3febfc9d25a1b147,     //  0.48487,   0.87459
+    0x3fdf1e11b4bbc35c,     0x3febf6832b71ec5b,     //  0.48621,   0.87384
+    0x3fdf3405963fd068,     0x3febf064e15377dd,     //  0.48755,   0.87309
+    0x3fdf49f4a7e97729,     0x3febea424837de6d,     //  0.48889,   0.87235
+    0x3fdf5fdee656cda3,     0x3febe41b611154c1,     //  0.49023,    0.8716
+    0x3fdf75c44e26a852,     0x3febddf02cd2b983,     //  0.49156,   0.87084
+    0x3fdf8ba4dbf89aba,     0x3febd7c0ac6f952a,     //   0.4929,   0.87009
+    0x3fdfa1808c6cf7e0,     0x3febd18ce0dc19d6,     //  0.49423,   0.86933
+    0x3fdfb7575c24d2de,     0x3febcb54cb0d2327,     //  0.49557,   0.86857
+    0x3fdfcd2947c1ff57,     0x3febc5186bf8361d,     //   0.4969,   0.86781
+    0x3fdfe2f64be7120f,     0x3febbed7c49380ea,     //  0.49823,   0.86705
+    0x3fdff8be6537615e,     0x3febb892d5d5dad5,     //  0.49956,   0.86628
+    0x3fe00740c82b82e0,     0x3febb249a0b6c40d,     //  0.50089,   0.86551
+    0x3fe0121fe4f56d2c,     0x3febabfc262e6586,     //  0.50221,   0.86474
+    0x3fe01cfc874c3eb7,     0x3feba5aa673590d2,     //  0.50354,   0.86397
+    0x3fe027d6ad83287e,     0x3feb9f5464c5bffc,     //  0.50486,    0.8632
+    0x3fe032ae55edbd95,     0x3feb98fa1fd9155e,     //  0.50619,   0.86242
+    0x3fe03d837edff370,     0x3feb929b996a5b7f,     //  0.50751,   0.86165
+    0x3fe0485626ae221a,     0x3feb8c38d27504e9,     //  0.50883,   0.86087
+    0x3fe053264bad0483,     0x3feb85d1cbf52c02,     //  0.51015,   0.86009
+    0x3fe05df3ec31b8b6,     0x3feb7f6686e792ea,     //  0.51147,    0.8593
+    0x3fe068bf0691c028,     0x3feb78f70449a34b,     //  0.51279,   0.85852
+    0x3fe073879922ffed,     0x3feb728345196e3e,     //   0.5141,   0.85773
+    0x3fe07e4da23bc102,     0x3feb6c0b4a55ac17,     //  0.51542,   0.85694
+    0x3fe089112032b08c,     0x3feb658f14fdbc47,     //  0.51673,   0.85615
+    0x3fe093d2115ee018,     0x3feb5f0ea611a532,     //  0.51804,   0.85535
+    0x3fe09e907417c5e1,     0x3feb5889fe921405,     //  0.51936,   0.85456
+    0x3fe0a94c46b53d0b,     0x3feb52011f805c92,     //  0.52067,   0.85376
+    0x3fe0b405878f85ec,     0x3feb4b7409de7925,     //  0.52198,   0.85296
+    0x3fe0bebc34ff4646,     0x3feb44e2beaf0a61,     //  0.52328,   0.85216
+    0x3fe0c9704d5d898f,     0x3feb3e4d3ef55712,     //  0.52459,   0.85136
+    0x3fe0d421cf03c12b,     0x3feb37b38bb54c09,     //   0.5259,   0.85055
+    0x3fe0ded0b84bc4b5,     0x3feb3115a5f37bf4,     //   0.5272,   0.84974
+    0x3fe0e97d078fd23b,     0x3feb2a738eb51f33,     //   0.5285,   0.84893
+    0x3fe0f426bb2a8e7d,     0x3feb23cd470013b4,     //   0.5298,   0.84812
+    0x3fe0fecdd1770537,     0x3feb1d22cfdadcc6,     //   0.5311,   0.84731
+    0x3fe1097248d0a956,     0x3feb16742a4ca2f5,     //   0.5324,   0.84649
+    0x3fe114141f935545,     0x3feb0fc1575d33db,     //   0.5337,   0.84567
+    0x3fe11eb3541b4b22,     0x3feb090a58150200,     //    0.535,   0.84485
+    0x3fe1294fe4c5350a,     0x3feb024f2d7d24a9,     //  0.53629,   0.84403
+    0x3fe133e9cfee254e,     0x3feafb8fd89f57b6,     //  0.53759,   0.84321
+    0x3fe13e8113f396c1,     0x3feaf4cc5a85fb73,     //  0.53888,   0.84238
+    0x3fe14915af336ceb,     0x3feaee04b43c1474,     //  0.54017,   0.84155
+    0x3fe153a7a00bf453,     0x3feae738e6cd4b67,     //  0.54146,   0.84073
+    0x3fe15e36e4dbe2bc,     0x3feae068f345ecef,     //  0.54275,   0.83989
+    0x3fe168c37c025764,     0x3fead994dab2e979,     //  0.54404,   0.83906
+    0x3fe1734d63dedb49,     0x3fead2bc9e21d511,     //  0.54532,   0.83822
+    0x3fe17dd49ad16161,     0x3feacbe03ea0e73b,     //  0.54661,   0.83739
+    0x3fe188591f3a46e5,     0x3feac4ffbd3efac8,     //  0.54789,   0.83655
+    0x3fe192daef7a5386,     0x3feabe1b1b0b8dac,     //  0.54918,   0.83571
+    0x3fe19d5a09f2b9b8,     0x3feab7325916c0d4,     //  0.55046,   0.83486
+    0x3fe1a7d66d0516e6,     0x3feab045787157ff,     //  0.55174,   0.83402
+    0x3fe1b250171373be,     0x3feaa9547a2cb98e,     //  0.55302,   0.83317
+    0x3fe1bcc706804467,     0x3feaa25f5f5aee60,     //  0.55429,   0.83232
+    0x3fe1c73b39ae68c8,     0x3fea9b66290ea1a3,     //  0.55557,   0.83147
+    0x3fe1d1acaf012cc2,     0x3fea9468d85b20ae,     //  0.55685,   0.83062
+    0x3fe1dc1b64dc4872,     0x3fea8d676e545ad2,     //  0.55812,   0.82976
+    0x3fe1e68759a3e074,     0x3fea8661ec0ee133,     //  0.55939,    0.8289
+    0x3fe1f0f08bbc861b,     0x3fea7f58529fe69d,     //  0.56066,   0.82805
+    0x3fe1fb56f98b37b8,     0x3fea784aa31d3f55,     //  0.56193,   0.82718
+    0x3fe205baa17560d6,     0x3fea7138de9d60f5,     //   0.5632,   0.82632
+    0x3fe2101b81e0da78,     0x3fea6a230637623b,     //  0.56447,   0.82546
+    0x3fe21a799933eb58,     0x3fea63091b02fae2,     //  0.56573,   0.82459
+    0x3fe224d4e5d5482e,     0x3fea5beb1e188375,     //    0.567,   0.82372
+    0x3fe22f2d662c13e1,     0x3fea54c91090f524,     //  0.56826,   0.82285
+    0x3fe23983189fdfd5,     0x3fea4da2f385e997,     //  0.56952,   0.82198
+    0x3fe243d5fb98ac1f,     0x3fea4678c8119ac8,     //  0.57078,    0.8211
+    0x3fe24e260d7ee7c9,     0x3fea3f4a8f4ee2d2,     //  0.57204,   0.82023
+    0x3fe258734cbb7110,     0x3fea38184a593bc6,     //   0.5733,   0.81935
+    0x3fe262bdb7b795a2,     0x3fea30e1fa4cbf81,     //  0.57455,   0.81847
+    0x3fe26d054cdd12df,     0x3fea29a7a0462782,     //  0.57581,   0.81758
+    0x3fe2774a0a961612,     0x3fea22693d62ccb9,     //  0.57706,    0.8167
+    0x3fe2818bef4d3cba,     0x3fea1b26d2c0a75e,     //  0.57831,   0.81581
+    0x3fe28bcaf96d94ba,     0x3fea13e0617e4ec7,     //  0.57956,   0.81493
+    0x3fe2960727629ca8,     0x3fea0c95eabaf937,     //  0.58081,   0.81404
+    0x3fe2a040779843fb,     0x3fea05476f967bb5,     //  0.58206,   0.81314
+    0x3fe2aa76e87aeb58,     0x3fe9fdf4f13149de,     //  0.58331,   0.81225
+    0x3fe2b4aa787764c4,     0x3fe9f69e70ac75bc,     //  0.58455,   0.81135
+    0x3fe2bedb25faf3ea,     0x3fe9ef43ef29af94,     //   0.5858,   0.81046
+    0x3fe2c908ef734e57,     0x3fe9e7e56dcb45bd,     //  0.58704,   0.80956
+    0x3fe2d333d34e9bb7,     0x3fe9e082edb42472,     //  0.58828,   0.80866
+    0x3fe2dd5bcffb7616,     0x3fe9d91c7007d5a6,     //  0.58952,   0.80775
+    0x3fe2e780e3e8ea16,     0x3fe9d1b1f5ea80d6,     //  0.59076,   0.80685
+    0x3fe2f1a30d86773a,     0x3fe9ca438080eadb,     //    0.592,   0.80594
+    0x3fe2fbc24b441015,     0x3fe9c2d110f075c3,     //  0.59323,   0.80503
+    0x3fe305de9b921a94,     0x3fe9bb5aa85f2098,     //  0.59447,   0.80412
+    0x3fe30ff7fce17035,     0x3fe9b3e047f38741,     //   0.5957,   0.80321
+    0x3fe31a0e6da35e44,     0x3fe9ac61f0d4e247,     //  0.59693,   0.80229
+    0x3fe32421ec49a620,     0x3fe9a4dfa42b06b2,     //  0.59816,   0.80138
+    0x3fe32e3277467d6b,     0x3fe99d59631e65d5,     //  0.59939,   0.80046
+    0x3fe338400d0c8e57,     0x3fe995cf2ed80d22,     //  0.60062,   0.79954
+    0x3fe3424aac0ef7d6,     0x3fe98e410881a600,     //  0.60184,   0.79861
+    0x3fe34c5252c14de1,     0x3fe986aef1457594,     //  0.60307,   0.79769
+    0x3fe35656ff9799ae,     0x3fe97f18ea4e5c9e,     //  0.60429,   0.79676
+    0x3fe36058b10659f3,     0x3fe9777ef4c7d742,     //  0.60551,   0.79584
+    0x3fe36a576582831b,     0x3fe96fe111ddfce0,     //  0.60673,   0.79491
+    0x3fe374531b817f8d,     0x3fe9683f42bd7fe1,     //  0.60795,   0.79398
+    0x3fe37e4bd1792fe2,     0x3fe960998893ad8c,     //  0.60917,   0.79304
+    0x3fe3884185dfeb22,     0x3fe958efe48e6dd7,     //  0.61038,   0.79211
+    0x3fe39234372c7f04,     0x3fe9514257dc4335,     //   0.6116,   0.79117
+    0x3fe39c23e3d63029,     0x3fe94990e3ac4a6c,     //  0.61281,   0.79023
+    0x3fe3a6108a54ba58,     0x3fe941db892e3a65,     //  0.61402,   0.78929
+    0x3fe3affa292050b9,     0x3fe93a22499263fc,     //  0.61523,   0.78835
+    0x3fe3b9e0beb19e18,     0x3fe932652609b1cf,     //  0.61644,    0.7874
+    0x3fe3c3c44981c517,     0x3fe92aa41fc5a815,     //  0.61765,   0.78646
+    0x3fe3cda4c80a6076,     0x3fe922df37f8646a,     //  0.61885,   0.78551
+    0x3fe3d78238c58343,     0x3fe91b166fd49da2,     //  0.62006,   0.78456
+    0x3fe3e15c9a2db922,     0x3fe91349c88da398,     //  0.62126,    0.7836
+    0x3fe3eb33eabe0680,     0x3fe90b7943575efe,     //  0.62246,   0.78265
+    0x3fe3f50828f1e8d2,     0x3fe903a4e1665133,     //  0.62366,   0.78169
+    0x3fe3fed9534556d4,     0x3fe8fbcca3ef940d,     //  0.62486,   0.78074
+    0x3fe408a76834c0c0,     0x3fe8f3f08c28d9ac,     //  0.62606,   0.77978
+    0x3fe41272663d108c,     0x3fe8ec109b486c49,     //  0.62725,   0.77882
+    0x3fe41c3a4bdbaa26,     0x3fe8e42cd2852e0a,     //  0.62845,   0.77785
+    0x3fe425ff178e6bb1,     0x3fe8dc45331698cc,     //  0.62964,   0.77689
+    0x3fe42fc0c7d3adbb,     0x3fe8d459be34bdfa,     //  0.63083,   0.77592
+    0x3fe4397f5b2a4380,     0x3fe8cc6a75184655,     //  0.63202,   0.77495
+    0x3fe4433ad0117b1d,     0x3fe8c47758fa71cb,     //  0.63321,   0.77398
+    0x3fe44cf325091dd6,     0x3fe8bc806b151741,     //  0.63439,   0.77301
+    0x3fe456a858917046,     0x3fe8b485aca2a468,     //  0.63558,   0.77204
+    0x3fe4605a692b32a2,     0x3fe8ac871ede1d88,     //  0.63676,   0.77106
+    0x3fe46a095557a0f1,     0x3fe8a484c3031d50,     //  0.63794,   0.77008
+    0x3fe473b51b987347,     0x3fe89c7e9a4dd4ab,     //  0.63912,    0.7691
+    0x3fe47d5dba6fde01,     0x3fe89474a5fb0a84,     //   0.6403,   0.76812
+    0x3fe48703306091fe,     0x3fe88c66e7481ba1,     //  0.64148,   0.76714
+    0x3fe490a57bedbcdf,     0x3fe884555f72fa6b,     //  0.64266,   0.76615
+    0x3fe49a449b9b0938,     0x3fe87c400fba2ebf,     //  0.64383,   0.76517
+    0x3fe4a3e08dec9ed6,     0x3fe87426f95cd5bd,     //    0.645,   0.76418
+    0x3fe4ad79516722f0,     0x3fe86c0a1d9aa195,     //  0.64618,   0.76319
+    0x3fe4b70ee48fb869,     0x3fe863e97db3d95a,     //  0.64735,    0.7622
+    0x3fe4c0a145ec0004,     0x3fe85bc51ae958cc,     //  0.64851,    0.7612
+    0x3fe4ca30740218a3,     0x3fe8539cf67c9029,     //  0.64968,   0.76021
+    0x3fe4d3bc6d589f80,     0x3fe84b7111af83f9,     //  0.65085,   0.75921
+    0x3fe4dd453076b064,     0x3fe843416dc4cce2,     //  0.65201,   0.75821
+    0x3fe4e6cabbe3e5e9,     0x3fe83b0e0bff976e,     //  0.65317,   0.75721
+    0x3fe4f04d0e2859aa,     0x3fe832d6eda3a3e0,     //  0.65433,   0.75621
+    0x3fe4f9cc25cca486,     0x3fe82a9c13f545ff,     //  0.65549,    0.7552
+    0x3fe503480159ded2,     0x3fe8225d803964e5,     //  0.65665,   0.75419
+    0x3fe50cc09f59a09b,     0x3fe81a1b33b57acc,     //  0.65781,   0.75319
+    0x3fe51635fe5601d7,     0x3fe811d52faf94dc,     //  0.65896,   0.75218
+    0x3fe51fa81cd99aa6,     0x3fe8098b756e52fa,     //  0.66011,   0.75117
+    0x3fe52916f96f8388,     0x3fe8013e0638e795,     //  0.66127,   0.75015
+    0x3fe5328292a35596,     0x3fe7f8ece3571771,     //  0.66242,   0.74914
+    0x3fe53beae7012abe,     0x3fe7f0980e113978,     //  0.66356,   0.74812
+    0x3fe5454ff5159dfb,     0x3fe7e83f87b03686,     //  0.66471,    0.7471
+    0x3fe54eb1bb6dcb8f,     0x3fe7dfe3517d8937,     //  0.66586,   0.74608
+    0x3fe5581038975137,     0x3fe7d7836cc33db2,     //    0.667,   0.74506
+    0x3fe5616b6b204e6e,     0x3fe7cf1fdacbf179,     //  0.66814,   0.74403
+    0x3fe56ac35197649e,     0x3fe7c6b89ce2d333,     //  0.66928,   0.74301
+    0x3fe57417ea8bb75c,     0x3fe7be4db453a27c,     //  0.67042,   0.74198
+    0x3fe57d69348cec9f,     0x3fe7b5df226aafb0,     //  0.67156,   0.74095
+    0x3fe586b72e2b2cfd,     0x3fe7ad6ce874dbb6,     //  0.67269,   0.73992
+    0x3fe59001d5f723df,     0x3fe7a4f707bf97d2,     //  0.67383,   0.73889
+    0x3fe599492a81ffbc,     0x3fe79c7d8198e56e,     //  0.67496,   0.73785
+    0x3fe5a28d2a5d7250,     0x3fe79400574f55e4,     //  0.67609,   0.73682
+    0x3fe5abcdd41bb0d8,     0x3fe78b7f8a320a52,     //  0.67722,   0.73578
+    0x3fe5b50b264f7448,     0x3fe782fb1b90b35b,     //  0.67835,   0.73474
+    0x3fe5be451f8bf980,     0x3fe77a730cbb9100,     //  0.67948,    0.7337
+    0x3fe5c77bbe65018c,     0x3fe771e75f037261,     //   0.6806,   0.73265
+    0x3fe5d0af016ed1d4,     0x3fe7695813b9b594,     //  0.68172,   0.73161
+    0x3fe5d9dee73e345c,     0x3fe760c52c304764,     //  0.68285,   0.73056
+    0x3fe5e30b6e6877f3,     0x3fe7582ea9b9a329,     //  0.68397,   0.72951
+    0x3fe5ec3495837074,     0x3fe74f948da8d28d,     //  0.68508,   0.72846
+    0x3fe5f55a5b2576f8,     0x3fe746f6d9516d59,     //   0.6862,   0.72741
+    0x3fe5fe7cbde56a0f,     0x3fe73e558e079942,     //  0.68732,   0.72636
+    0x3fe6079bbc5aadfa,     0x3fe735b0ad2009b2,     //  0.68843,    0.7253
+    0x3fe610b7551d2cde,     0x3fe72d0837efff97,     //  0.68954,   0.72425
+    0x3fe619cf86c55702,     0x3fe7245c2fcd492a,     //  0.69065,   0.72319
+    0x3fe622e44fec22ff,     0x3fe71bac960e41bf,     //  0.69176,   0.72213
+    0x3fe62bf5af2b0dfd,     0x3fe712f96c09d18d,     //  0.69287,   0.72107
+    0x3fe63503a31c1be8,     0x3fe70a42b3176d7a,     //  0.69397,      0.72
+    0x3fe63e0e2a59d7aa,     0x3fe701886c8f16e6,     //  0.69508,   0.71894
+    0x3fe64715437f535b,     0x3fe6f8ca99c95b75,     //  0.69618,   0.71787
+    0x3fe65018ed28287f,     0x3fe6f0093c1f54de,     //  0.69728,    0.7168
+    0x3fe6591925f0783e,     0x3fe6e74454eaa8ae,     //  0.69838,   0.71573
+    0x3fe66215ec74eb91,     0x3fe6de7be585881d,     //  0.69947,   0.71466
+    0x3fe66b0f3f52b386,     0x3fe6d5afef4aafcc,     //  0.70057,   0.71358
+    0x3fe674051d27896c,     0x3fe6cce07395679f,     //  0.70166,   0.71251
+    0x3fe67cf78491af10,     0x3fe6c40d73c18275,     //  0.70275,   0.71143
+    0x3fe685e6742feeef,     0x3fe6bb36f12b5e06,     //  0.70385,   0.71035
+    0x3fe68ed1eaa19c71,     0x3fe6b25ced2fe29c,     //  0.70493,   0.70927
+    0x3fe697b9e686941c,     0x3fe6a97f692c82ea,     //  0.70602,   0.70819
+    0x3fe6a09e667f3bcc,     0x3fe6a09e667f3bcc,     //  0.70711,   0.70711
+    0x3fe6a97f692c82ea,     0x3fe697b9e686941c,     //  0.70819,   0.70602
+    0x3fe6b25ced2fe29c,     0x3fe68ed1eaa19c71,     //  0.70927,   0.70493
+    0x3fe6bb36f12b5e06,     0x3fe685e6742feeef,     //  0.71035,   0.70385
+    0x3fe6c40d73c18275,     0x3fe67cf78491af10,     //  0.71143,   0.70275
+    0x3fe6cce07395679f,     0x3fe674051d27896c,     //  0.71251,   0.70166
+    0x3fe6d5afef4aafcc,     0x3fe66b0f3f52b386,     //  0.71358,   0.70057
+    0x3fe6de7be585881d,     0x3fe66215ec74eb91,     //  0.71466,   0.69947
+    0x3fe6e74454eaa8ae,     0x3fe6591925f0783e,     //  0.71573,   0.69838
+    0x3fe6f0093c1f54de,     0x3fe65018ed28287f,     //   0.7168,   0.69728
+    0x3fe6f8ca99c95b75,     0x3fe64715437f535b,     //  0.71787,   0.69618
+    0x3fe701886c8f16e6,     0x3fe63e0e2a59d7aa,     //  0.71894,   0.69508
+    0x3fe70a42b3176d7a,     0x3fe63503a31c1be8,     //     0.72,   0.69397
+    0x3fe712f96c09d18d,     0x3fe62bf5af2b0dfd,     //  0.72107,   0.69287
+    0x3fe71bac960e41bf,     0x3fe622e44fec22ff,     //  0.72213,   0.69176
+    0x3fe7245c2fcd492a,     0x3fe619cf86c55702,     //  0.72319,   0.69065
+    0x3fe72d0837efff97,     0x3fe610b7551d2cde,     //  0.72425,   0.68954
+    0x3fe735b0ad2009b2,     0x3fe6079bbc5aadfa,     //   0.7253,   0.68843
+    0x3fe73e558e079942,     0x3fe5fe7cbde56a0f,     //  0.72636,   0.68732
+    0x3fe746f6d9516d59,     0x3fe5f55a5b2576f8,     //  0.72741,    0.6862
+    0x3fe74f948da8d28d,     0x3fe5ec3495837074,     //  0.72846,   0.68508
+    0x3fe7582ea9b9a329,     0x3fe5e30b6e6877f3,     //  0.72951,   0.68397
+    0x3fe760c52c304764,     0x3fe5d9dee73e345c,     //  0.73056,   0.68285
+    0x3fe7695813b9b594,     0x3fe5d0af016ed1d4,     //  0.73161,   0.68172
+    0x3fe771e75f037261,     0x3fe5c77bbe65018c,     //  0.73265,    0.6806
+    0x3fe77a730cbb9100,     0x3fe5be451f8bf980,     //   0.7337,   0.67948
+    0x3fe782fb1b90b35b,     0x3fe5b50b264f7448,     //  0.73474,   0.67835
+    0x3fe78b7f8a320a52,     0x3fe5abcdd41bb0d8,     //  0.73578,   0.67722
+    0x3fe79400574f55e4,     0x3fe5a28d2a5d7250,     //  0.73682,   0.67609
+    0x3fe79c7d8198e56e,     0x3fe599492a81ffbc,     //  0.73785,   0.67496
+    0x3fe7a4f707bf97d2,     0x3fe59001d5f723df,     //  0.73889,   0.67383
+    0x3fe7ad6ce874dbb6,     0x3fe586b72e2b2cfd,     //  0.73992,   0.67269
+    0x3fe7b5df226aafb0,     0x3fe57d69348cec9f,     //  0.74095,   0.67156
+    0x3fe7be4db453a27c,     0x3fe57417ea8bb75c,     //  0.74198,   0.67042
+    0x3fe7c6b89ce2d333,     0x3fe56ac35197649e,     //  0.74301,   0.66928
+    0x3fe7cf1fdacbf179,     0x3fe5616b6b204e6e,     //  0.74403,   0.66814
+    0x3fe7d7836cc33db2,     0x3fe5581038975137,     //  0.74506,     0.667
+    0x3fe7dfe3517d8937,     0x3fe54eb1bb6dcb8f,     //  0.74608,   0.66586
+    0x3fe7e83f87b03686,     0x3fe5454ff5159dfb,     //   0.7471,   0.66471
+    0x3fe7f0980e113978,     0x3fe53beae7012abe,     //  0.74812,   0.66356
+    0x3fe7f8ece3571771,     0x3fe5328292a35596,     //  0.74914,   0.66242
+    0x3fe8013e0638e795,     0x3fe52916f96f8388,     //  0.75015,   0.66127
+    0x3fe8098b756e52fa,     0x3fe51fa81cd99aa6,     //  0.75117,   0.66011
+    0x3fe811d52faf94dc,     0x3fe51635fe5601d7,     //  0.75218,   0.65896
+    0x3fe81a1b33b57acc,     0x3fe50cc09f59a09b,     //  0.75319,   0.65781
+    0x3fe8225d803964e5,     0x3fe503480159ded2,     //  0.75419,   0.65665
+    0x3fe82a9c13f545ff,     0x3fe4f9cc25cca486,     //   0.7552,   0.65549
+    0x3fe832d6eda3a3e0,     0x3fe4f04d0e2859aa,     //  0.75621,   0.65433
+    0x3fe83b0e0bff976e,     0x3fe4e6cabbe3e5e9,     //  0.75721,   0.65317
+    0x3fe843416dc4cce2,     0x3fe4dd453076b064,     //  0.75821,   0.65201
+    0x3fe84b7111af83f9,     0x3fe4d3bc6d589f80,     //  0.75921,   0.65085
+    0x3fe8539cf67c9029,     0x3fe4ca30740218a3,     //  0.76021,   0.64968
+    0x3fe85bc51ae958cc,     0x3fe4c0a145ec0004,     //   0.7612,   0.64851
+    0x3fe863e97db3d95a,     0x3fe4b70ee48fb869,     //   0.7622,   0.64735
+    0x3fe86c0a1d9aa195,     0x3fe4ad79516722f0,     //  0.76319,   0.64618
+    0x3fe87426f95cd5bd,     0x3fe4a3e08dec9ed6,     //  0.76418,     0.645
+    0x3fe87c400fba2ebf,     0x3fe49a449b9b0938,     //  0.76517,   0.64383
+    0x3fe884555f72fa6b,     0x3fe490a57bedbcdf,     //  0.76615,   0.64266
+    0x3fe88c66e7481ba1,     0x3fe48703306091fe,     //  0.76714,   0.64148
+    0x3fe89474a5fb0a84,     0x3fe47d5dba6fde01,     //  0.76812,    0.6403
+    0x3fe89c7e9a4dd4ab,     0x3fe473b51b987347,     //   0.7691,   0.63912
+    0x3fe8a484c3031d50,     0x3fe46a095557a0f1,     //  0.77008,   0.63794
+    0x3fe8ac871ede1d88,     0x3fe4605a692b32a2,     //  0.77106,   0.63676
+    0x3fe8b485aca2a468,     0x3fe456a858917046,     //  0.77204,   0.63558
+    0x3fe8bc806b151741,     0x3fe44cf325091dd6,     //  0.77301,   0.63439
+    0x3fe8c47758fa71cb,     0x3fe4433ad0117b1d,     //  0.77398,   0.63321
+    0x3fe8cc6a75184655,     0x3fe4397f5b2a4380,     //  0.77495,   0.63202
+    0x3fe8d459be34bdfa,     0x3fe42fc0c7d3adbb,     //  0.77592,   0.63083
+    0x3fe8dc45331698cc,     0x3fe425ff178e6bb1,     //  0.77689,   0.62964
+    0x3fe8e42cd2852e0a,     0x3fe41c3a4bdbaa26,     //  0.77785,   0.62845
+    0x3fe8ec109b486c49,     0x3fe41272663d108c,     //  0.77882,   0.62725
+    0x3fe8f3f08c28d9ac,     0x3fe408a76834c0c0,     //  0.77978,   0.62606
+    0x3fe8fbcca3ef940d,     0x3fe3fed9534556d4,     //  0.78074,   0.62486
+    0x3fe903a4e1665133,     0x3fe3f50828f1e8d2,     //  0.78169,   0.62366
+    0x3fe90b7943575efe,     0x3fe3eb33eabe0680,     //  0.78265,   0.62246
+    0x3fe91349c88da398,     0x3fe3e15c9a2db922,     //   0.7836,   0.62126
+    0x3fe91b166fd49da2,     0x3fe3d78238c58343,     //  0.78456,   0.62006
+    0x3fe922df37f8646a,     0x3fe3cda4c80a6076,     //  0.78551,   0.61885
+    0x3fe92aa41fc5a815,     0x3fe3c3c44981c517,     //  0.78646,   0.61765
+    0x3fe932652609b1cf,     0x3fe3b9e0beb19e18,     //   0.7874,   0.61644
+    0x3fe93a22499263fc,     0x3fe3affa292050b9,     //  0.78835,   0.61523
+    0x3fe941db892e3a65,     0x3fe3a6108a54ba58,     //  0.78929,   0.61402
+    0x3fe94990e3ac4a6c,     0x3fe39c23e3d63029,     //  0.79023,   0.61281
+    0x3fe9514257dc4335,     0x3fe39234372c7f04,     //  0.79117,    0.6116
+    0x3fe958efe48e6dd7,     0x3fe3884185dfeb22,     //  0.79211,   0.61038
+    0x3fe960998893ad8c,     0x3fe37e4bd1792fe2,     //  0.79304,   0.60917
+    0x3fe9683f42bd7fe1,     0x3fe374531b817f8d,     //  0.79398,   0.60795
+    0x3fe96fe111ddfce0,     0x3fe36a576582831b,     //  0.79491,   0.60673
+    0x3fe9777ef4c7d742,     0x3fe36058b10659f3,     //  0.79584,   0.60551
+    0x3fe97f18ea4e5c9e,     0x3fe35656ff9799ae,     //  0.79676,   0.60429
+    0x3fe986aef1457594,     0x3fe34c5252c14de1,     //  0.79769,   0.60307
+    0x3fe98e410881a600,     0x3fe3424aac0ef7d6,     //  0.79861,   0.60184
+    0x3fe995cf2ed80d22,     0x3fe338400d0c8e57,     //  0.79954,   0.60062
+    0x3fe99d59631e65d5,     0x3fe32e3277467d6b,     //  0.80046,   0.59939
+    0x3fe9a4dfa42b06b2,     0x3fe32421ec49a620,     //  0.80138,   0.59816
+    0x3fe9ac61f0d4e247,     0x3fe31a0e6da35e44,     //  0.80229,   0.59693
+    0x3fe9b3e047f38741,     0x3fe30ff7fce17035,     //  0.80321,    0.5957
+    0x3fe9bb5aa85f2098,     0x3fe305de9b921a94,     //  0.80412,   0.59447
+    0x3fe9c2d110f075c3,     0x3fe2fbc24b441015,     //  0.80503,   0.59323
+    0x3fe9ca438080eadb,     0x3fe2f1a30d86773a,     //  0.80594,     0.592
+    0x3fe9d1b1f5ea80d6,     0x3fe2e780e3e8ea16,     //  0.80685,   0.59076
+    0x3fe9d91c7007d5a6,     0x3fe2dd5bcffb7616,     //  0.80775,   0.58952
+    0x3fe9e082edb42472,     0x3fe2d333d34e9bb7,     //  0.80866,   0.58828
+    0x3fe9e7e56dcb45bd,     0x3fe2c908ef734e57,     //  0.80956,   0.58704
+    0x3fe9ef43ef29af94,     0x3fe2bedb25faf3ea,     //  0.81046,    0.5858
+    0x3fe9f69e70ac75bc,     0x3fe2b4aa787764c4,     //  0.81135,   0.58455
+    0x3fe9fdf4f13149de,     0x3fe2aa76e87aeb58,     //  0.81225,   0.58331
+    0x3fea05476f967bb5,     0x3fe2a040779843fb,     //  0.81314,   0.58206
+    0x3fea0c95eabaf937,     0x3fe2960727629ca8,     //  0.81404,   0.58081
+    0x3fea13e0617e4ec7,     0x3fe28bcaf96d94ba,     //  0.81493,   0.57956
+    0x3fea1b26d2c0a75e,     0x3fe2818bef4d3cba,     //  0.81581,   0.57831
+    0x3fea22693d62ccb9,     0x3fe2774a0a961612,     //   0.8167,   0.57706
+    0x3fea29a7a0462782,     0x3fe26d054cdd12df,     //  0.81758,   0.57581
+    0x3fea30e1fa4cbf81,     0x3fe262bdb7b795a2,     //  0.81847,   0.57455
+    0x3fea38184a593bc6,     0x3fe258734cbb7110,     //  0.81935,    0.5733
+    0x3fea3f4a8f4ee2d2,     0x3fe24e260d7ee7c9,     //  0.82023,   0.57204
+    0x3fea4678c8119ac8,     0x3fe243d5fb98ac1f,     //   0.8211,   0.57078
+    0x3fea4da2f385e997,     0x3fe23983189fdfd5,     //  0.82198,   0.56952
+    0x3fea54c91090f524,     0x3fe22f2d662c13e1,     //  0.82285,   0.56826
+    0x3fea5beb1e188375,     0x3fe224d4e5d5482e,     //  0.82372,     0.567
+    0x3fea63091b02fae2,     0x3fe21a799933eb58,     //  0.82459,   0.56573
+    0x3fea6a230637623b,     0x3fe2101b81e0da78,     //  0.82546,   0.56447
+    0x3fea7138de9d60f5,     0x3fe205baa17560d6,     //  0.82632,    0.5632
+    0x3fea784aa31d3f55,     0x3fe1fb56f98b37b8,     //  0.82718,   0.56193
+    0x3fea7f58529fe69d,     0x3fe1f0f08bbc861b,     //  0.82805,   0.56066
+    0x3fea8661ec0ee133,     0x3fe1e68759a3e074,     //   0.8289,   0.55939
+    0x3fea8d676e545ad2,     0x3fe1dc1b64dc4872,     //  0.82976,   0.55812
+    0x3fea9468d85b20ae,     0x3fe1d1acaf012cc2,     //  0.83062,   0.55685
+    0x3fea9b66290ea1a3,     0x3fe1c73b39ae68c8,     //  0.83147,   0.55557
+    0x3feaa25f5f5aee60,     0x3fe1bcc706804467,     //  0.83232,   0.55429
+    0x3feaa9547a2cb98e,     0x3fe1b250171373be,     //  0.83317,   0.55302
+    0x3feab045787157ff,     0x3fe1a7d66d0516e6,     //  0.83402,   0.55174
+    0x3feab7325916c0d4,     0x3fe19d5a09f2b9b8,     //  0.83486,   0.55046
+    0x3feabe1b1b0b8dac,     0x3fe192daef7a5386,     //  0.83571,   0.54918
+    0x3feac4ffbd3efac8,     0x3fe188591f3a46e5,     //  0.83655,   0.54789
+    0x3feacbe03ea0e73b,     0x3fe17dd49ad16161,     //  0.83739,   0.54661
+    0x3fead2bc9e21d511,     0x3fe1734d63dedb49,     //  0.83822,   0.54532
+    0x3fead994dab2e979,     0x3fe168c37c025764,     //  0.83906,   0.54404
+    0x3feae068f345ecef,     0x3fe15e36e4dbe2bc,     //  0.83989,   0.54275
+    0x3feae738e6cd4b67,     0x3fe153a7a00bf453,     //  0.84073,   0.54146
+    0x3feaee04b43c1474,     0x3fe14915af336ceb,     //  0.84155,   0.54017
+    0x3feaf4cc5a85fb73,     0x3fe13e8113f396c1,     //  0.84238,   0.53888
+    0x3feafb8fd89f57b6,     0x3fe133e9cfee254e,     //  0.84321,   0.53759
+    0x3feb024f2d7d24a9,     0x3fe1294fe4c5350a,     //  0.84403,   0.53629
+    0x3feb090a58150200,     0x3fe11eb3541b4b22,     //  0.84485,     0.535
+    0x3feb0fc1575d33db,     0x3fe114141f935545,     //  0.84567,    0.5337
+    0x3feb16742a4ca2f5,     0x3fe1097248d0a956,     //  0.84649,    0.5324
+    0x3feb1d22cfdadcc6,     0x3fe0fecdd1770537,     //  0.84731,    0.5311
+    0x3feb23cd470013b4,     0x3fe0f426bb2a8e7d,     //  0.84812,    0.5298
+    0x3feb2a738eb51f33,     0x3fe0e97d078fd23b,     //  0.84893,    0.5285
+    0x3feb3115a5f37bf4,     0x3fe0ded0b84bc4b5,     //  0.84974,    0.5272
+    0x3feb37b38bb54c09,     0x3fe0d421cf03c12b,     //  0.85055,    0.5259
+    0x3feb3e4d3ef55712,     0x3fe0c9704d5d898f,     //  0.85136,   0.52459
+    0x3feb44e2beaf0a61,     0x3fe0bebc34ff4646,     //  0.85216,   0.52328
+    0x3feb4b7409de7925,     0x3fe0b405878f85ec,     //  0.85296,   0.52198
+    0x3feb52011f805c92,     0x3fe0a94c46b53d0b,     //  0.85376,   0.52067
+    0x3feb5889fe921405,     0x3fe09e907417c5e1,     //  0.85456,   0.51936
+    0x3feb5f0ea611a532,     0x3fe093d2115ee018,     //  0.85535,   0.51804
+    0x3feb658f14fdbc47,     0x3fe089112032b08c,     //  0.85615,   0.51673
+    0x3feb6c0b4a55ac17,     0x3fe07e4da23bc102,     //  0.85694,   0.51542
+    0x3feb728345196e3e,     0x3fe073879922ffed,     //  0.85773,    0.5141
+    0x3feb78f70449a34b,     0x3fe068bf0691c028,     //  0.85852,   0.51279
+    0x3feb7f6686e792ea,     0x3fe05df3ec31b8b6,     //   0.8593,   0.51147
+    0x3feb85d1cbf52c02,     0x3fe053264bad0483,     //  0.86009,   0.51015
+    0x3feb8c38d27504e9,     0x3fe0485626ae221a,     //  0.86087,   0.50883
+    0x3feb929b996a5b7f,     0x3fe03d837edff370,     //  0.86165,   0.50751
+    0x3feb98fa1fd9155e,     0x3fe032ae55edbd95,     //  0.86242,   0.50619
+    0x3feb9f5464c5bffc,     0x3fe027d6ad83287e,     //   0.8632,   0.50486
+    0x3feba5aa673590d2,     0x3fe01cfc874c3eb7,     //  0.86397,   0.50354
+    0x3febabfc262e6586,     0x3fe0121fe4f56d2c,     //  0.86474,   0.50221
+    0x3febb249a0b6c40d,     0x3fe00740c82b82e0,     //  0.86551,   0.50089
+    0x3febb892d5d5dad5,     0x3fdff8be6537615e,     //  0.86628,   0.49956
+    0x3febbed7c49380ea,     0x3fdfe2f64be7120f,     //  0.86705,   0.49823
+    0x3febc5186bf8361d,     0x3fdfcd2947c1ff57,     //  0.86781,    0.4969
+    0x3febcb54cb0d2327,     0x3fdfb7575c24d2de,     //  0.86857,   0.49557
+    0x3febd18ce0dc19d6,     0x3fdfa1808c6cf7e0,     //  0.86933,   0.49423
+    0x3febd7c0ac6f952a,     0x3fdf8ba4dbf89aba,     //  0.87009,    0.4929
+    0x3febddf02cd2b983,     0x3fdf75c44e26a852,     //  0.87084,   0.49156
+    0x3febe41b611154c1,     0x3fdf5fdee656cda3,     //   0.8716,   0.49023
+    0x3febea424837de6d,     0x3fdf49f4a7e97729,     //  0.87235,   0.48889
+    0x3febf064e15377dd,     0x3fdf3405963fd068,     //  0.87309,   0.48755
+    0x3febf6832b71ec5b,     0x3fdf1e11b4bbc35c,     //  0.87384,   0.48621
+    0x3febfc9d25a1b147,     0x3fdf081906bff7fd,     //  0.87459,   0.48487
+    0x3fec02b2cef1e641,     0x3fdef21b8fafd3b5,     //  0.87533,   0.48353
+    0x3fec08c426725549,     0x3fdedc1952ef78d5,     //  0.87607,   0.48218
+    0x3fec0ed12b3372e9,     0x3fdec61253e3c61b,     //  0.87681,   0.48084
+    0x3fec14d9dc465e58,     0x3fdeb00695f25620,     //  0.87755,   0.47949
+    0x3fec1ade38bce19b,     0x3fde99f61c817eda,     //  0.87828,   0.47815
+    0x3fec20de3fa971b0,     0x3fde83e0eaf85113,     //  0.87901,    0.4768
+    0x3fec26d9f01f2eaf,     0x3fde6dc704be97e2,     //  0.87974,   0.47545
+    0x3fec2cd14931e3f1,     0x3fde57a86d3cd824,     //  0.88047,    0.4741
+    0x3fec32c449f60831,     0x3fde418527dc4ffa,     //   0.8812,   0.47275
+    0x3fec38b2f180bdb1,     0x3fde2b5d3806f63b,     //  0.88192,    0.4714
+    0x3fec3e9d3ee7d262,     0x3fde1530a12779f4,     //  0.88264,   0.47004
+    0x3fec44833141c004,     0x3fddfeff66a941de,     //  0.88336,   0.46869
+    0x3fec4a64c7a5ac4c,     0x3fdde8c98bf86bd6,     //  0.88408,   0.46733
+    0x3fec5042012b6907,     0x3fddd28f1481cc58,     //   0.8848,   0.46598
+    0x3fec561adceb743e,     0x3fddbc5003b2edf8,     //  0.88551,   0.46462
+    0x3fec5bef59fef85a,     0x3fdda60c5cfa10d8,     //  0.88622,   0.46326
+    0x3fec61bf777fcc48,     0x3fdd8fc423c62a25,     //  0.88693,    0.4619
+    0x3fec678b3488739b,     0x3fdd79775b86e389,     //  0.88764,   0.46054
+    0x3fec6d5290341eb2,     0x3fdd632607ac9aa9,     //  0.88835,   0.45918
+    0x3fec7315899eaad7,     0x3fdd4cd02ba8609c,     //  0.88905,   0.45781
+    0x3fec78d41fe4a267,     0x3fdd3675caebf962,     //  0.88975,   0.45645
+    0x3fec7e8e52233cf3,     0x3fdd2016e8e9db5b,     //  0.89045,   0.45508
+    0x3fec84441f785f61,     0x3fdd09b389152ec1,     //  0.89115,   0.45372
+    0x3fec89f587029c13,     0x3fdcf34baee1cd21,     //  0.89184,   0.45235
+    0x3fec8fa287e13305,     0x3fdcdcdf5dc440ce,     //  0.89253,   0.45098
+    0x3fec954b213411f5,     0x3fdcc66e9931c45d,     //  0.89322,   0.44961
+    0x3fec9aef521bd480,     0x3fdcaff964a0421d,     //  0.89391,   0.44824
+    0x3feca08f19b9c449,     0x3fdc997fc3865388,     //   0.8946,   0.44687
+    0x3feca62a772fd919,     0x3fdc8301b95b40c2,     //  0.89528,    0.4455
+    0x3fecabc169a0b901,     0x3fdc6c7f4997000a,     //  0.89597,   0.44412
+    0x3fecb153f02fb87d,     0x3fdc55f877b23537,     //  0.89665,   0.44275
+    0x3fecb6e20a00da99,     0x3fdc3f6d47263129,     //  0.89732,   0.44137
+    0x3fecbc6bb638d10b,     0x3fdc28ddbb6cf145,     //    0.898,   0.43999
+    0x3fecc1f0f3fcfc5c,     0x3fdc1249d8011ee7,     //  0.89867,   0.43862
+    0x3fecc771c2736c09,     0x3fdbfbb1a05e0edc,     //  0.89935,   0.43724
+    0x3fecccee20c2de9f,     0x3fdbe51517ffc0d9,     //  0.90002,   0.43586
+    0x3fecd2660e12c1e6,     0x3fdbce744262deee,     //  0.90068,   0.43448
+    0x3fecd7d9898b32f6,     0x3fdbb7cf2304bd01,     //  0.90135,   0.43309
+    0x3fecdd489254fe65,     0x3fdba125bd63583e,     //  0.90201,   0.43171
+    0x3fece2b32799a060,     0x3fdb8a7814fd5693,     //  0.90267,   0.43033
+    0x3fece819488344ce,     0x3fdb73c62d520624,     //  0.90333,   0.42894
+    0x3feced7af43cc773,     0x3fdb5d1009e15cc0,     //  0.90399,   0.42756
+    0x3fecf2d829f1b40e,     0x3fdb4655ae2bf757,     //  0.90464,   0.42617
+    0x3fecf830e8ce467b,     0x3fdb2f971db31972,     //   0.9053,   0.42478
+    0x3fecfd852fff6ad4,     0x3fdb18d45bf8aca6,     //  0.90595,   0.42339
+    0x3fed02d4feb2bd92,     0x3fdb020d6c7f4009,     //   0.9066,     0.422
+    0x3fed082054168bac,     0x3fdaeb4252ca07ab,     //  0.90724,   0.42061
+    0x3fed0d672f59d2b9,     0x3fdad473125cdc08,     //  0.90789,   0.41922
+    0x3fed12a98fac410c,     0x3fdabd9faebc3980,     //  0.90853,   0.41782
+    0x3fed17e7743e35dc,     0x3fdaa6c82b6d3fc9,     //  0.90917,   0.41643
+    0x3fed1d20dc40c15c,     0x3fda8fec8bf5b166,     //  0.90981,   0.41503
+    0x3fed2255c6e5a4e1,     0x3fda790cd3dbf31a,     //  0.91044,   0.41364
+    0x3fed2786335f52fc,     0x3fda622906a70b63,     //  0.91107,   0.41224
+    0x3fed2cb220e0ef9f,     0x3fda4b4127dea1e4,     //  0.91171,   0.41084
+    0x3fed31d98e9e503a,     0x3fda34553b0afee5,     //  0.91234,   0.40944
+    0x3fed36fc7bcbfbdc,     0x3fda1d6543b50ac0,     //  0.91296,   0.40804
+    0x3fed3c1ae79f2b4e,     0x3fda067145664d57,     //  0.91359,   0.40664
+    0x3fed4134d14dc93a,     0x3fd9ef7943a8ed8a,     //  0.91421,   0.40524
+    0x3fed464a380e7242,     0x3fd9d87d4207b0ab,     //  0.91483,   0.40384
+    0x3fed4b5b1b187524,     0x3fd9c17d440df9f2,     //  0.91545,   0.40243
+    0x3fed506779a3d2d9,     0x3fd9aa794d47c9ee,     //  0.91606,   0.40103
+    0x3fed556f52e93eb1,     0x3fd993716141bdfe,     //  0.91668,   0.39962
+    0x3fed5a72a6221e73,     0x3fd97c6583890fc2,     //  0.91729,   0.39822
+    0x3fed5f7172888a7f,     0x3fd96555b7ab948f,     //   0.9179,   0.39681
+    0x3fed646bb7574de5,     0x3fd94e420137bce3,     //  0.91851,    0.3954
+    0x3fed696173c9e68b,     0x3fd9372a63bc93d7,     //  0.91911,   0.39399
+    0x3fed6e52a71c8547,     0x3fd9200ee2c9be97,     //  0.91972,   0.39258
+    0x3fed733f508c0dff,     0x3fd908ef81ef7bd1,     //  0.92032,   0.39117
+    0x3fed78276f5617c6,     0x3fd8f1cc44bea329,     //  0.92092,   0.38976
+    0x3fed7d0b02b8ecf9,     0x3fd8daa52ec8a4af,     //  0.92151,   0.38835
+    0x3fed81ea09f38b63,     0x3fd8c37a439f884f,     //  0.92211,   0.38693
+    0x3fed86c48445a450,     0x3fd8ac4b86d5ed44,     //   0.9227,   0.38552
+    0x3fed8b9a70ef9cb4,     0x3fd89518fbff098e,     //  0.92329,    0.3841
+    0x3fed906bcf328d46,     0x3fd87de2a6aea963,     //  0.92388,   0.38268
+    0x3fed95389e50429b,     0x3fd866a88a792ea0,     //  0.92447,   0.38127
+    0x3fed9a00dd8b3d46,     0x3fd84f6aaaf3903f,     //  0.92505,   0.37985
+    0x3fed9ec48c26b1f3,     0x3fd838290bb359c8,     //  0.92563,   0.37843
+    0x3feda383a9668988,     0x3fd820e3b04eaac4,     //  0.92621,   0.37701
+    0x3feda83e348f613b,     0x3fd8099a9c5c362d,     //  0.92679,   0.37559
+    0x3fedacf42ce68ab9,     0x3fd7f24dd37341e3,     //  0.92736,   0.37416
+    0x3fedb1a591b20c38,     0x3fd7dafd592ba621,     //  0.92794,   0.37274
+    0x3fedb6526238a09b,     0x3fd7c3a9311dcce7,     //  0.92851,   0.37132
+    0x3fedbafa9dc1b78d,     0x3fd7ac515ee2b172,     //  0.92907,   0.36989
+    0x3fedbf9e4395759a,     0x3fd794f5e613dfae,     //  0.92964,   0.36847
+    0x3fedc43d52fcb453,     0x3fd77d96ca4b73a6,     //  0.93021,   0.36704
+    0x3fedc8d7cb410260,     0x3fd766340f2418f6,     //  0.93077,   0.36561
+    0x3fedcd6dabaca3a5,     0x3fd74ecdb8390a3e,     //  0.93133,   0.36418
+    0x3fedd1fef38a915a,     0x3fd73763c9261092,     //  0.93188,   0.36276
+    0x3fedd68ba2267a25,     0x3fd71ff6458782ec,     //  0.93244,   0.36133
+    0x3feddb13b6ccc23d,     0x3fd7088530fa459e,     //  0.93299,    0.3599
+    0x3feddf9730ca837b,     0x3fd6f1108f1bc9c5,     //  0.93354,   0.35846
+    0x3fede4160f6d8d81,     0x3fd6d998638a0cb5,     //  0.93409,   0.35703
+    0x3fede890520465ce,     0x3fd6c21cb1e39771,     //  0.93464,    0.3556
+    0x3feded05f7de47da,     0x3fd6aa9d7dc77e16,     //  0.93518,   0.35416
+    0x3fedf177004b2534,     0x3fd6931acad55f51,     //  0.93573,   0.35273
+    0x3fedf5e36a9ba59c,     0x3fd67b949cad63ca,     //  0.93627,   0.35129
+    0x3fedfa4b3621271d,     0x3fd6640af6f03d9e,     //   0.9368,   0.34986
+    0x3fedfeae622dbe2b,     0x3fd64c7ddd3f27c6,     //  0.93734,   0.34842
+    0x3fee030cee1435b8,     0x3fd634ed533be58e,     //  0.93787,   0.34698
+    0x3fee0766d9280f54,     0x3fd61d595c88c203,     //   0.9384,   0.34554
+    0x3fee0bbc22bd8349,     0x3fd605c1fcc88f63,     //  0.93893,    0.3441
+    0x3fee100cca2980ac,     0x3fd5ee27379ea693,     //  0.93946,   0.34266
+    0x3fee1458cec1ad83,     0x3fd5d68910aee686,     //  0.93998,   0.34122
+    0x3fee18a02fdc66d9,     0x3fd5bee78b9db3b6,     //  0.94051,   0.33978
+    0x3fee1ce2ecd0c0d8,     0x3fd5a742ac0ff78d,     //  0.94103,   0.33833
+    0x3fee212104f686e5,     0x3fd58f9a75ab1fdd,     //  0.94154,   0.33689
+    0x3fee255a77a63bb8,     0x3fd577eeec151e47,     //  0.94206,   0.33545
+    0x3fee298f4439197a,     0x3fd5604012f467b4,     //  0.94257,     0.334
+    0x3fee2dbf6a0911d9,     0x3fd5488dedeff3be,     //  0.94308,   0.33255
+    0x3fee31eae870ce25,     0x3fd530d880af3c24,     //  0.94359,   0.33111
+    0x3fee3611becbaf69,     0x3fd5191fceda3c35,     //   0.9441,   0.32966
+    0x3fee3a33ec75ce85,     0x3fd50163dc197047,     //   0.9446,   0.32821
+    0x3fee3e5170cbfc46,     0x3fd4e9a4ac15d520,     //  0.94511,   0.32676
+    0x3fee426a4b2bc17e,     0x3fd4d1e24278e76a,     //  0.94561,   0.32531
+    0x3fee467e7af35f23,     0x3fd4ba1ca2eca31c,     //  0.94611,   0.32386
+    0x3fee4a8dff81ce5e,     0x3fd4a253d11b82f3,     //   0.9466,   0.32241
+    0x3fee4e98d836c0af,     0x3fd48a87d0b07fd7,     //  0.94709,   0.32096
+    0x3fee529f04729ffc,     0x3fd472b8a5571054,     //  0.94759,    0.3195
+    0x3fee56a083968eb1,     0x3fd45ae652bb2800,     //  0.94807,   0.31805
+    0x3fee5a9d550467d3,     0x3fd44310dc8936f0,     //  0.94856,   0.31659
+    0x3fee5e95781ebf1c,     0x3fd42b38466e2928,     //  0.94905,   0.31514
+    0x3fee6288ec48e112,     0x3fd4135c94176602,     //  0.94953,   0.31368
+    0x3fee6677b0e6d31e,     0x3fd3fb7dc932cfa4,     //  0.95001,   0.31222
+    0x3fee6a61c55d53a7,     0x3fd3e39be96ec271,     //  0.95049,   0.31077
+    0x3fee6e472911da27,     0x3fd3cbb6f87a146e,     //  0.95096,   0.30931
+    0x3fee7227db6a9744,     0x3fd3b3cefa0414b7,     //  0.95144,   0.30785
+    0x3fee7603dbce74e9,     0x3fd39be3f1bc8aef,     //  0.95191,   0.30639
+    0x3fee79db29a5165a,     0x3fd383f5e353b6aa,     //  0.95238,   0.30493
+    0x3fee7dadc456d850,     0x3fd36c04d27a4edf,     //  0.95284,   0.30347
+    0x3fee817bab4cd10d,     0x3fd35410c2e18152,     //  0.95331,   0.30201
+    0x3fee8544ddf0d075,     0x3fd33c19b83af207,     //  0.95377,   0.30054
+    0x3fee89095bad6025,     0x3fd3241fb638baaf,     //  0.95423,   0.29908
+    0x3fee8cc923edc388,     0x3fd30c22c08d6a13,     //  0.95469,   0.29762
+    0x3fee9084361df7f3,     0x3fd2f422daec0386,     //  0.95514,   0.29615
+    0x3fee943a91aab4b4,     0x3fd2dc200907fe51,     //  0.95559,   0.29469
+    0x3fee97ec36016b30,     0x3fd2c41a4e954520,     //  0.95605,   0.29322
+    0x3fee9b99229046f8,     0x3fd2ac11af483572,     //  0.95649,   0.29175
+    0x3fee9f4156c62dda,     0x3fd294062ed59f05,     //  0.95694,   0.29028
+    0x3feea2e4d212c000,     0x3fd27bf7d0f2c346,     //  0.95738,   0.28882
+    0x3feea68393e65800,     0x3fd263e6995554ba,     //  0.95783,   0.28735
+    0x3feeaa1d9bb20af3,     0x3fd24bd28bb37672,     //  0.95827,   0.28588
+    0x3feeadb2e8e7a88e,     0x3fd233bbabc3bb72,     //   0.9587,   0.28441
+    0x3feeb1437af9bb34,     0x3fd21ba1fd3d2623,     //  0.95914,   0.28294
+    0x3feeb4cf515b8811,     0x3fd2038583d727bd,     //  0.95957,   0.28146
+    0x3feeb8566b810f2a,     0x3fd1eb6643499fbb,     //     0.96,   0.27999
+    0x3feebbd8c8df0b74,     0x3fd1d3443f4cdb3d,     //  0.96043,   0.27852
+    0x3feebf5668eaf2ef,     0x3fd1bb1f7b999480,     //  0.96086,   0.27705
+    0x3feec2cf4b1af6b2,     0x3fd1a2f7fbe8f243,     //  0.96128,   0.27557
+    0x3feec6436ee60309,     0x3fd18acdc3f4873a,     //   0.9617,    0.2741
+    0x3feec9b2d3c3bf84,     0x3fd172a0d7765177,     //  0.96212,   0.27262
+    0x3feecd1d792c8f10,     0x3fd15a713a28b9d9,     //  0.96254,   0.27115
+    0x3feed0835e999009,     0x3fd1423eefc69378,     //  0.96295,   0.26967
+    0x3feed3e483849c51,     0x3fd12a09fc0b1b12,     //  0.96337,   0.26819
+    0x3feed740e7684963,     0x3fd111d262b1f677,     //  0.96378,   0.26671
+    0x3feeda9889bfe86a,     0x3fd0f998277733f7,     //  0.96418,   0.26523
+    0x3feeddeb6a078651,     0x3fd0e15b4e1749cd,     //  0.96459,   0.26375
+    0x3feee13987bbebdc,     0x3fd0c91bda4f158d,     //  0.96499,   0.26227
+    0x3feee482e25a9dbc,     0x3fd0b0d9cfdbdb90,     //  0.96539,   0.26079
+    0x3feee7c77961dc9e,     0x3fd09895327b465e,     //  0.96579,   0.25931
+    0x3feeeb074c50a544,     0x3fd0804e05eb661e,     //  0.96619,   0.25783
+    0x3feeee425aa6b09a,     0x3fd068044deab002,     //  0.96658,   0.25635
+    0x3feef178a3e473c2,     0x3fd04fb80e37fdae,     //  0.96698,   0.25487
+    0x3feef4aa278b2032,     0x3fd037694a928cac,     //  0.96737,   0.25338
+    0x3feef7d6e51ca3c0,     0x3fd01f1806b9fdd2,     //  0.96775,    0.2519
+    0x3feefafedc1ba8b7,     0x3fd006c4466e54af,     //  0.96814,   0.25041
+    0x3feefe220c0b95ec,     0x3fcfdcdc1adfedf8,     //  0.96852,   0.24893
+    0x3fef014074708ed3,     0x3fcfac2abeff57ff,     //   0.9689,   0.24744
+    0x3fef045a14cf738c,     0x3fcf7b7480bd3801,     //  0.96928,   0.24596
+    0x3fef076eecade0fa,     0x3fcf4ab9679c9f5c,     //  0.96966,   0.24447
+    0x3fef0a7efb9230d7,     0x3fcf19f97b215f1a,     //  0.97003,   0.24298
+    0x3fef0d8a410379c5,     0x3fcee934c2d006c7,     //   0.9704,   0.24149
+    0x3fef1090bc898f5f,     0x3fceb86b462de348,     //  0.97077,      0.24
+    0x3fef13926dad024e,     0x3fce879d0cc0fdaf,     //  0.97114,   0.23851
+    0x3fef168f53f7205d,     0x3fce56ca1e101a1b,     //   0.9715,   0.23702
+    0x3fef19876ef1f486,     0x3fce25f281a2b684,     //  0.97187,   0.23553
+    0x3fef1c7abe284708,     0x3fcdf5163f01099a,     //  0.97223,   0.23404
+    0x3fef1f6941259d7a,     0x3fcdc4355db40195,     //  0.97258,   0.23255
+    0x3fef2252f7763ada,     0x3fcd934fe5454311,     //  0.97294,   0.23106
+    0x3fef2537e0a71f9f,     0x3fcd6265dd3f27e3,     //  0.97329,   0.22957
+    0x3fef2817fc4609ce,     0x3fcd31774d2cbdee,     //  0.97364,   0.22807
+    0x3fef2af349e17507,     0x3fcd00843c99c5f9,     //  0.97399,   0.22658
+    0x3fef2dc9c9089a9d,     0x3fcccf8cb312b286,     //  0.97434,   0.22508
+    0x3fef309b794b719f,     0x3fcc9e90b824a6a9,     //  0.97468,   0.22359
+    0x3fef33685a3aaef0,     0x3fcc6d90535d74dc,     //  0.97503,   0.22209
+    0x3fef36306b67c556,     0x3fcc3c8b8c4b9dd7,     //  0.97536,    0.2206
+    0x3fef38f3ac64e589,     0x3fcc0b826a7e4f63,     //   0.9757,    0.2191
+    0x3fef3bb21cc4fe47,     0x3fcbda74f5856330,     //  0.97604,    0.2176
+    0x3fef3e6bbc1bbc65,     0x3fcba96334f15dad,     //  0.97637,   0.21611
+    0x3fef412089fd8adc,     0x3fcb784d30536cda,     //   0.9767,   0.21461
+    0x3fef43d085ff92dd,     0x3fcb4732ef3d6722,     //  0.97703,   0.21311
+    0x3fef467bafb7bbe0,     0x3fcb16147941ca2a,     //  0.97735,   0.21161
+    0x3fef492206bcabb4,     0x3fcae4f1d5f3b9ab,     //  0.97768,   0.21011
+    0x3fef4bc38aa5c694,     0x3fcab3cb0ce6fe44,     //    0.978,   0.20861
+    0x3fef4e603b0b2f2d,     0x3fca82a025b00451,     //  0.97832,   0.20711
+    0x3fef50f81785c6b9,     0x3fca517127e3dabc,     //  0.97863,   0.20561
+    0x3fef538b1faf2d07,     0x3fca203e1b1831da,     //  0.97895,   0.20411
+    0x3fef56195321c090,     0x3fc9ef0706e35a35,     //  0.97926,   0.20261
+    0x3fef58a2b1789e84,     0x3fc9bdcbf2dc4366,     //  0.97957,    0.2011
+    0x3fef5b273a4fa2d9,     0x3fc98c8ce69a7aec,     //  0.97988,    0.1996
+    0x3fef5da6ed43685d,     0x3fc95b49e9b62af9,     //  0.98018,    0.1981
+    0x3fef6021c9f148c2,     0x3fc92a0303c8194f,     //  0.98048,   0.19659
+    0x3fef6297cff75cb0,     0x3fc8f8b83c69a60a,     //  0.98079,   0.19509
+    0x3fef6508fef47bd5,     0x3fc8c7699b34ca7e,     //  0.98108,   0.19359
+    0x3fef677556883cee,     0x3fc8961727c41804,     //  0.98138,   0.19208
+    0x3fef69dcd652f5de,     0x3fc864c0e9b2b6cf,     //  0.98167,   0.19057
+    0x3fef6c3f7df5bbb7,     0x3fc83366e89c64c5,     //  0.98196,   0.18907
+    0x3fef6e9d4d1262ca,     0x3fc802092c1d744b,     //  0.98225,   0.18756
+    0x3fef70f6434b7eb7,     0x3fc7d0a7bbd2cb1b,     //  0.98254,   0.18606
+    0x3fef734a60446279,     0x3fc79f429f59e11d,     //  0.98282,   0.18455
+    0x3fef7599a3a12077,     0x3fc76dd9de50bf31,     //  0.98311,   0.18304
+    0x3fef77e40d068a90,     0x3fc73c6d8055fe0a,     //  0.98339,   0.18153
+    0x3fef7a299c1a322a,     0x3fc70afd8d08c4ff,     //  0.98366,   0.18002
+    0x3fef7c6a50826840,     0x3fc6d98a0c08c8da,     //  0.98394,   0.17851
+    0x3fef7ea629e63d6e,     0x3fc6a81304f64ab2,     //  0.98421,     0.177
+    0x3fef80dd27ed8204,     0x3fc676987f7216b8,     //  0.98448,   0.17549
+    0x3fef830f4a40c60c,     0x3fc6451a831d830d,     //  0.98475,   0.17398
+    0x3fef853c9089595e,     0x3fc61399179a6e94,     //  0.98501,   0.17247
+    0x3fef8764fa714ba9,     0x3fc5e214448b3fc6,     //  0.98528,   0.17096
+    0x3fef898887a36c84,     0x3fc5b08c1192e381,     //  0.98554,   0.16945
+    0x3fef8ba737cb4b78,     0x3fc57f008654cbde,     //   0.9858,   0.16794
+    0x3fef8dc10a95380d,     0x3fc54d71aa74ef02,     //  0.98605,   0.16643
+    0x3fef8fd5ffae41db,     0x3fc51bdf8597c5f2,     //  0.98631,   0.16491
+    0x3fef91e616c43891,     0x3fc4ea4a1f624b61,     //  0.98656,    0.1634
+    0x3fef93f14f85ac08,     0x3fc4b8b17f79fa88,     //  0.98681,   0.16189
+    0x3fef95f7a9a1ec47,     0x3fc48715ad84cdf5,     //  0.98706,   0.16037
+    0x3fef97f924c9099b,     0x3fc45576b1293e5a,     //   0.9873,   0.15886
+    0x3fef99f5c0abd496,     0x3fc423d4920e4166,     //  0.98754,   0.15734
+    0x3fef9bed7cfbde29,     0x3fc3f22f57db4893,     //  0.98778,   0.15583
+    0x3fef9de0596b77a3,     0x3fc3c0870a383ff6,     //  0.98802,   0.15431
+    0x3fef9fce55adb2c8,     0x3fc38edbb0cd8d14,     //  0.98826,    0.1528
+    0x3fefa1b7717661d5,     0x3fc35d2d53440db2,     //  0.98849,   0.15128
+    0x3fefa39bac7a1791,     0x3fc32b7bf94516a7,     //  0.98872,   0.14976
+    0x3fefa57b066e2754,     0x3fc2f9c7aa7a72af,     //  0.98895,   0.14825
+    0x3fefa7557f08a517,     0x3fc2c8106e8e613a,     //  0.98918,   0.14673
+    0x3fefa92b1600657c,     0x3fc296564d2b953e,     //   0.9894,   0.14521
+    0x3fefaafbcb0cfddc,     0x3fc264994dfd340a,     //  0.98962,    0.1437
+    0x3fefacc79de6c44f,     0x3fc232d978aed413,     //  0.98984,   0.14218
+    0x3fefae8e8e46cfbb,     0x3fc20116d4ec7bce,     //  0.99006,   0.14066
+    0x3fefb0509be6f7db,     0x3fc1cf516a62a077,     //  0.99027,   0.13914
+    0x3fefb20dc681d54d,     0x3fc19d8940be24e7,     //  0.99049,   0.13762
+    0x3fefb3c60dd2c199,     0x3fc16bbe5fac5865,     //   0.9907,    0.1361
+    0x3fefb5797195d741,     0x3fc139f0cedaf576,     //   0.9909,   0.13458
+    0x3fefb727f187f1c7,     0x3fc1082095f820b0,     //  0.99111,   0.13306
+    0x3fefb8d18d66adb7,     0x3fc0d64dbcb26786,     //  0.99131,   0.13154
+    0x3fefba7644f068b5,     0x3fc0a4784ab8bf1d,     //  0.99151,   0.13002
+    0x3fefbc1617e44186,     0x3fc072a047ba831d,     //  0.99171,    0.1285
+    0x3fefbdb106021816,     0x3fc040c5bb67747e,     //  0.99191,   0.12698
+    0x3fefbf470f0a8d88,     0x3fc00ee8ad6fb85b,     //   0.9921,   0.12545
+    0x3fefc0d832bf043a,     0x3fbfba124b07ad85,     //  0.99229,   0.12393
+    0x3fefc26470e19fd3,     0x3fbf564e56a9730e,     //  0.99248,   0.12241
+    0x3fefc3ebc935454c,     0x3fbef2858d27561b,     //  0.99267,   0.12089
+    0x3fefc56e3b7d9af6,     0x3fbe8eb7fde4aa3e,     //  0.99285,   0.11937
+    0x3fefc6ebc77f0887,     0x3fbe2ae5b8457f77,     //  0.99303,   0.11784
+    0x3fefc8646cfeb721,     0x3fbdc70ecbae9fc8,     //  0.99321,   0.11632
+    0x3fefc9d82bc2915e,     0x3fbd633347858ce4,     //  0.99339,   0.11479
+    0x3fefcb4703914354,     0x3fbcff533b307dc1,     //  0.99356,   0.11327
+    0x3fefccb0f4323aa3,     0x3fbc9b6eb6165c42,     //  0.99374,   0.11175
+    0x3fefce15fd6da67b,     0x3fbc3785c79ec2d5,     //  0.99391,   0.11022
+    0x3fefcf761f0c77a3,     0x3fbbd3987f31fa0e,     //  0.99407,    0.1087
+    0x3fefd0d158d86087,     0x3fbb6fa6ec38f64c,     //  0.99424,   0.10717
+    0x3fefd227aa9bd53b,     0x3fbb0bb11e1d5559,     //   0.9944,   0.10565
+    0x3fefd37914220b84,     0x3fbaa7b724495c04,     //  0.99456,   0.10412
+    0x3fefd4c59536fae4,     0x3fba43b90e27f3c4,     //  0.99472,    0.1026
+    0x3fefd60d2da75c9e,     0x3fb9dfb6eb24a85c,     //  0.99488,   0.10107
+    0x3fefd74fdd40abbf,     0x3fb97bb0caaba56f,     //  0.99503,  0.099544
+    0x3fefd88da3d12526,     0x3fb917a6bc29b42c,     //  0.99518,  0.098017
+    0x3fefd9c68127c78c,     0x3fb8b398cf0c38e0,     //  0.99533,   0.09649
+    0x3fefdafa7514538c,     0x3fb84f8712c130a0,     //  0.99548,  0.094963
+    0x3fefdc297f674ba9,     0x3fb7eb7196b72ee4,     //  0.99563,  0.093436
+    0x3fefdd539ff1f456,     0x3fb787586a5d5b21,     //  0.99577,  0.091909
+    0x3fefde78d68653fd,     0x3fb7233b9d236e71,     //  0.99591,  0.090381
+    0x3fefdf9922f73307,     0x3fb6bf1b3e79b129,     //  0.99604,  0.088854
+    0x3fefe0b485181be3,     0x3fb65af75dd0f87b,     //  0.99618,  0.087326
+    0x3fefe1cafcbd5b09,     0x3fb5f6d00a9aa419,     //  0.99631,  0.085797
+    0x3fefe2dc89bbff08,     0x3fb592a554489bc8,     //  0.99644,  0.084269
+    0x3fefe3e92be9d886,     0x3fb52e774a4d4d0a,     //  0.99657,   0.08274
+    0x3fefe4f0e31d7a4a,     0x3fb4ca45fc1ba8b6,     //   0.9967,  0.081211
+    0x3fefe5f3af2e3940,     0x3fb4661179272096,     //  0.99682,  0.079682
+    0x3fefe6f18ff42c84,     0x3fb401d9d0e3a507,     //  0.99694,  0.078153
+    0x3fefe7ea85482d60,     0x3fb39d9f12c5a299,     //  0.99706,  0.076624
+    0x3fefe8de8f03d75c,     0x3fb339614e41ffa5,     //  0.99718,  0.075094
+    0x3fefe9cdad01883a,     0x3fb2d52092ce19f6,     //  0.99729,  0.073565
+    0x3fefeab7df1c6005,     0x3fb270dcefdfc45b,     //   0.9974,  0.072035
+    0x3fefeb9d2530410f,     0x3fb20c9674ed444c,     //  0.99751,  0.070505
+    0x3fefec7d7f19cffc,     0x3fb1a84d316d4f8a,     //  0.99762,  0.068974
+    0x3fefed58ecb673c4,     0x3fb1440134d709b2,     //  0.99772,  0.067444
+    0x3fefee2f6de455ba,     0x3fb0dfb28ea201e6,     //  0.99783,  0.065913
+    0x3fefef0102826191,     0x3fb07b614e463064,     //  0.99793,  0.064383
+    0x3fefefcdaa704562,     0x3fb0170d833bf421,     //  0.99802,  0.062852
+    0x3feff095658e71ad,     0x3faf656e79f820e0,     //  0.99812,  0.061321
+    0x3feff15833be1965,     0x3fae9cbd15ff5527,     //  0.99821,   0.05979
+    0x3feff21614e131ed,     0x3fadd406f9808ec8,     //   0.9983,  0.058258
+    0x3feff2cf08da7321,     0x3fad0b4c436f91d0,     //  0.99839,  0.056727
+    0x3feff3830f8d575c,     0x3fac428d12c0d7e3,     //  0.99848,  0.055195
+    0x3feff43228de1b77,     0x3fab79c986698b78,     //  0.99856,  0.053664
+    0x3feff4dc54b1bed3,     0x3faab101bd5f8317,     //  0.99864,  0.052132
+    0x3feff58192ee0358,     0x3fa9e835d6993c87,     //  0.99872,    0.0506
+    0x3feff621e3796d7e,     0x3fa91f65f10dd814,     //   0.9988,  0.049068
+    0x3feff6bd463b444d,     0x3fa856922bb513c1,     //  0.99887,  0.047535
+    0x3feff753bb1b9164,     0x3fa78dbaa5874685,     //  0.99894,  0.046003
+    0x3feff7e5420320f9,     0x3fa6c4df7d7d5b84,     //  0.99901,  0.044471
+    0x3feff871dadb81df,     0x3fa5fc00d290cd43,     //  0.99908,  0.042938
+    0x3feff8f9858f058b,     0x3fa5331ec3bba0eb,     //  0.99914,  0.041406
+    0x3feff97c4208c014,     0x3fa46a396ff86179,     //   0.9992,  0.039873
+    0x3feff9fa10348837,     0x3fa3a150f6421afc,     //  0.99926,   0.03834
+    0x3feffa72effef75d,     0x3fa2d865759455cd,     //  0.99932,  0.036807
+    0x3feffae6e1556998,     0x3fa20f770ceb11c6,     //  0.99938,  0.035274
+    0x3feffb55e425fdae,     0x3fa14685db42c17e,     //  0.99943,  0.033741
+    0x3feffbbff85f9515,     0x3fa07d91ff984580,     //  0.99948,  0.032208
+    0x3feffc251df1d3f8,     0x3f9f693731d1cf01,     //  0.99953,  0.030675
+    0x3feffc8554cd213a,     0x3f9dd7458c64ab39,     //  0.99958,  0.029142
+    0x3feffce09ce2a679,     0x3f9c454f4ce53b1c,     //  0.99962,  0.027608
+    0x3feffd36f624500c,     0x3f9ab354b1504fca,     //  0.99966,  0.026075
+    0x3feffd886084cd0d,     0x3f992155f7a3667e,     //   0.9997,  0.024541
+    0x3feffdd4dbf78f52,     0x3f978f535ddc9f03,     //  0.99974,  0.023008
+    0x3feffe1c6870cb77,     0x3f95fd4d21fab226,     //  0.99977,  0.021474
+    0x3feffe5f05e578db,     0x3f946b4381fce81c,     //   0.9998,   0.01994
+    0x3feffe9cb44b51a1,     0x3f92d936bbe30efd,     //  0.99983,  0.018407
+    0x3feffed57398d2b7,     0x3f9147270dad7132,     //  0.99986,  0.016873
+    0x3fefff0943c53bd1,     0x3f8f6a296ab997ca,     //  0.99988,  0.015339
+    0x3fefff3824c88f6f,     0x3f8c45ffe1e48ad9,     //   0.9999,  0.013805
+    0x3fefff62169b92db,     0x3f8921d1fcdec784,     //  0.99992,  0.012272
+    0x3fefff871937ce2f,     0x3f85fda037ac05e0,     //  0.99994,  0.010738
+    0x3fefffa72c978c4f,     0x3f82d96b0e509703,     //  0.99996, 0.0092038
+    0x3fefffc250b5daef,     0x3f7f6a65f9a2a3c5,     //  0.99997, 0.0076698
+    0x3fefffd8858e8a92,     0x3f7921f0fe670071,     //  0.99998, 0.0061359
+    0x3fefffe9cb1e2e8d,     0x3f72d97822f996bc,     //  0.99999, 0.0046019
+    0x3feffff621621d02,     0x3f6921f8becca4ba,     //        1,  0.003068
+    0x3feffffd88586ee6,     0x3f5921faaee6472d,     //        1,  0.001534
+    0x3ff0000000000000,     0x0000000000000000,     //        1,         0
+    0x3feffffd88586ee6,     0xbf5921faaee6472d,     //        1, -0.001534
+    0x3feffff621621d02,     0xbf6921f8becca4ba,     //        1, -0.003068
+    0x3fefffe9cb1e2e8d,     0xbf72d97822f996bc,     //  0.99999,-0.0046019
+    0x3fefffd8858e8a92,     0xbf7921f0fe670071,     //  0.99998,-0.0061359
+    0x3fefffc250b5daef,     0xbf7f6a65f9a2a3c5,     //  0.99997,-0.0076698
+    0x3fefffa72c978c4f,     0xbf82d96b0e509703,     //  0.99996,-0.0092038
+    0x3fefff871937ce2f,     0xbf85fda037ac05e0,     //  0.99994, -0.010738
+    0x3fefff62169b92db,     0xbf8921d1fcdec784,     //  0.99992, -0.012272
+    0x3fefff3824c88f6f,     0xbf8c45ffe1e48ad9,     //   0.9999, -0.013805
+    0x3fefff0943c53bd1,     0xbf8f6a296ab997ca,     //  0.99988, -0.015339
+    0x3feffed57398d2b7,     0xbf9147270dad7132,     //  0.99986, -0.016873
+    0x3feffe9cb44b51a1,     0xbf92d936bbe30efd,     //  0.99983, -0.018407
+    0x3feffe5f05e578db,     0xbf946b4381fce81c,     //   0.9998,  -0.01994
+    0x3feffe1c6870cb77,     0xbf95fd4d21fab226,     //  0.99977, -0.021474
+    0x3feffdd4dbf78f52,     0xbf978f535ddc9f03,     //  0.99974, -0.023008
+    0x3feffd886084cd0d,     0xbf992155f7a3667e,     //   0.9997, -0.024541
+    0x3feffd36f624500c,     0xbf9ab354b1504fca,     //  0.99966, -0.026075
+    0x3feffce09ce2a679,     0xbf9c454f4ce53b1c,     //  0.99962, -0.027608
+    0x3feffc8554cd213a,     0xbf9dd7458c64ab39,     //  0.99958, -0.029142
+    0x3feffc251df1d3f8,     0xbf9f693731d1cf01,     //  0.99953, -0.030675
+    0x3feffbbff85f9515,     0xbfa07d91ff984580,     //  0.99948, -0.032208
+    0x3feffb55e425fdae,     0xbfa14685db42c17e,     //  0.99943, -0.033741
+    0x3feffae6e1556998,     0xbfa20f770ceb11c6,     //  0.99938, -0.035274
+    0x3feffa72effef75d,     0xbfa2d865759455cd,     //  0.99932, -0.036807
+    0x3feff9fa10348837,     0xbfa3a150f6421afc,     //  0.99926,  -0.03834
+    0x3feff97c4208c014,     0xbfa46a396ff86179,     //   0.9992, -0.039873
+    0x3feff8f9858f058b,     0xbfa5331ec3bba0eb,     //  0.99914, -0.041406
+    0x3feff871dadb81df,     0xbfa5fc00d290cd43,     //  0.99908, -0.042938
+    0x3feff7e5420320f9,     0xbfa6c4df7d7d5b84,     //  0.99901, -0.044471
+    0x3feff753bb1b9164,     0xbfa78dbaa5874685,     //  0.99894, -0.046003
+    0x3feff6bd463b444d,     0xbfa856922bb513c1,     //  0.99887, -0.047535
+    0x3feff621e3796d7e,     0xbfa91f65f10dd814,     //   0.9988, -0.049068
+    0x3feff58192ee0358,     0xbfa9e835d6993c87,     //  0.99872,   -0.0506
+    0x3feff4dc54b1bed3,     0xbfaab101bd5f8317,     //  0.99864, -0.052132
+    0x3feff43228de1b77,     0xbfab79c986698b78,     //  0.99856, -0.053664
+    0x3feff3830f8d575c,     0xbfac428d12c0d7e3,     //  0.99848, -0.055195
+    0x3feff2cf08da7321,     0xbfad0b4c436f91d0,     //  0.99839, -0.056727
+    0x3feff21614e131ed,     0xbfadd406f9808ec8,     //   0.9983, -0.058258
+    0x3feff15833be1965,     0xbfae9cbd15ff5527,     //  0.99821,  -0.05979
+    0x3feff095658e71ad,     0xbfaf656e79f820e0,     //  0.99812, -0.061321
+    0x3fefefcdaa704562,     0xbfb0170d833bf421,     //  0.99802, -0.062852
+    0x3fefef0102826191,     0xbfb07b614e463064,     //  0.99793, -0.064383
+    0x3fefee2f6de455ba,     0xbfb0dfb28ea201e6,     //  0.99783, -0.065913
+    0x3fefed58ecb673c4,     0xbfb1440134d709b2,     //  0.99772, -0.067444
+    0x3fefec7d7f19cffc,     0xbfb1a84d316d4f8a,     //  0.99762, -0.068974
+    0x3fefeb9d2530410f,     0xbfb20c9674ed444c,     //  0.99751, -0.070505
+    0x3fefeab7df1c6005,     0xbfb270dcefdfc45b,     //   0.9974, -0.072035
+    0x3fefe9cdad01883a,     0xbfb2d52092ce19f6,     //  0.99729, -0.073565
+    0x3fefe8de8f03d75c,     0xbfb339614e41ffa5,     //  0.99718, -0.075094
+    0x3fefe7ea85482d60,     0xbfb39d9f12c5a299,     //  0.99706, -0.076624
+    0x3fefe6f18ff42c84,     0xbfb401d9d0e3a507,     //  0.99694, -0.078153
+    0x3fefe5f3af2e3940,     0xbfb4661179272096,     //  0.99682, -0.079682
+    0x3fefe4f0e31d7a4a,     0xbfb4ca45fc1ba8b6,     //   0.9967, -0.081211
+    0x3fefe3e92be9d886,     0xbfb52e774a4d4d0a,     //  0.99657,  -0.08274
+    0x3fefe2dc89bbff08,     0xbfb592a554489bc8,     //  0.99644, -0.084269
+    0x3fefe1cafcbd5b09,     0xbfb5f6d00a9aa419,     //  0.99631, -0.085797
+    0x3fefe0b485181be3,     0xbfb65af75dd0f87b,     //  0.99618, -0.087326
+    0x3fefdf9922f73307,     0xbfb6bf1b3e79b129,     //  0.99604, -0.088854
+    0x3fefde78d68653fd,     0xbfb7233b9d236e71,     //  0.99591, -0.090381
+    0x3fefdd539ff1f456,     0xbfb787586a5d5b21,     //  0.99577, -0.091909
+    0x3fefdc297f674ba9,     0xbfb7eb7196b72ee4,     //  0.99563, -0.093436
+    0x3fefdafa7514538c,     0xbfb84f8712c130a0,     //  0.99548, -0.094963
+    0x3fefd9c68127c78c,     0xbfb8b398cf0c38e0,     //  0.99533,  -0.09649
+    0x3fefd88da3d12526,     0xbfb917a6bc29b42c,     //  0.99518, -0.098017
+    0x3fefd74fdd40abbf,     0xbfb97bb0caaba56f,     //  0.99503, -0.099544
+    0x3fefd60d2da75c9e,     0xbfb9dfb6eb24a85c,     //  0.99488,  -0.10107
+    0x3fefd4c59536fae4,     0xbfba43b90e27f3c4,     //  0.99472,   -0.1026
+    0x3fefd37914220b84,     0xbfbaa7b724495c04,     //  0.99456,  -0.10412
+    0x3fefd227aa9bd53b,     0xbfbb0bb11e1d5559,     //   0.9944,  -0.10565
+    0x3fefd0d158d86087,     0xbfbb6fa6ec38f64c,     //  0.99424,  -0.10717
+    0x3fefcf761f0c77a3,     0xbfbbd3987f31fa0e,     //  0.99407,   -0.1087
+    0x3fefce15fd6da67b,     0xbfbc3785c79ec2d5,     //  0.99391,  -0.11022
+    0x3fefccb0f4323aa3,     0xbfbc9b6eb6165c42,     //  0.99374,  -0.11175
+    0x3fefcb4703914354,     0xbfbcff533b307dc1,     //  0.99356,  -0.11327
+    0x3fefc9d82bc2915e,     0xbfbd633347858ce4,     //  0.99339,  -0.11479
+    0x3fefc8646cfeb721,     0xbfbdc70ecbae9fc8,     //  0.99321,  -0.11632
+    0x3fefc6ebc77f0887,     0xbfbe2ae5b8457f77,     //  0.99303,  -0.11784
+    0x3fefc56e3b7d9af6,     0xbfbe8eb7fde4aa3e,     //  0.99285,  -0.11937
+    0x3fefc3ebc935454c,     0xbfbef2858d27561b,     //  0.99267,  -0.12089
+    0x3fefc26470e19fd3,     0xbfbf564e56a9730e,     //  0.99248,  -0.12241
+    0x3fefc0d832bf043a,     0xbfbfba124b07ad85,     //  0.99229,  -0.12393
+    0x3fefbf470f0a8d88,     0xbfc00ee8ad6fb85b,     //   0.9921,  -0.12545
+    0x3fefbdb106021816,     0xbfc040c5bb67747e,     //  0.99191,  -0.12698
+    0x3fefbc1617e44186,     0xbfc072a047ba831d,     //  0.99171,   -0.1285
+    0x3fefba7644f068b5,     0xbfc0a4784ab8bf1d,     //  0.99151,  -0.13002
+    0x3fefb8d18d66adb7,     0xbfc0d64dbcb26786,     //  0.99131,  -0.13154
+    0x3fefb727f187f1c7,     0xbfc1082095f820b0,     //  0.99111,  -0.13306
+    0x3fefb5797195d741,     0xbfc139f0cedaf576,     //   0.9909,  -0.13458
+    0x3fefb3c60dd2c199,     0xbfc16bbe5fac5865,     //   0.9907,   -0.1361
+    0x3fefb20dc681d54d,     0xbfc19d8940be24e7,     //  0.99049,  -0.13762
+    0x3fefb0509be6f7db,     0xbfc1cf516a62a077,     //  0.99027,  -0.13914
+    0x3fefae8e8e46cfbb,     0xbfc20116d4ec7bce,     //  0.99006,  -0.14066
+    0x3fefacc79de6c44f,     0xbfc232d978aed413,     //  0.98984,  -0.14218
+    0x3fefaafbcb0cfddc,     0xbfc264994dfd340a,     //  0.98962,   -0.1437
+    0x3fefa92b1600657c,     0xbfc296564d2b953e,     //   0.9894,  -0.14521
+    0x3fefa7557f08a517,     0xbfc2c8106e8e613a,     //  0.98918,  -0.14673
+    0x3fefa57b066e2754,     0xbfc2f9c7aa7a72af,     //  0.98895,  -0.14825
+    0x3fefa39bac7a1791,     0xbfc32b7bf94516a7,     //  0.98872,  -0.14976
+    0x3fefa1b7717661d5,     0xbfc35d2d53440db2,     //  0.98849,  -0.15128
+    0x3fef9fce55adb2c8,     0xbfc38edbb0cd8d14,     //  0.98826,   -0.1528
+    0x3fef9de0596b77a3,     0xbfc3c0870a383ff6,     //  0.98802,  -0.15431
+    0x3fef9bed7cfbde29,     0xbfc3f22f57db4893,     //  0.98778,  -0.15583
+    0x3fef99f5c0abd496,     0xbfc423d4920e4166,     //  0.98754,  -0.15734
+    0x3fef97f924c9099b,     0xbfc45576b1293e5a,     //   0.9873,  -0.15886
+    0x3fef95f7a9a1ec47,     0xbfc48715ad84cdf5,     //  0.98706,  -0.16037
+    0x3fef93f14f85ac08,     0xbfc4b8b17f79fa88,     //  0.98681,  -0.16189
+    0x3fef91e616c43891,     0xbfc4ea4a1f624b61,     //  0.98656,   -0.1634
+    0x3fef8fd5ffae41db,     0xbfc51bdf8597c5f2,     //  0.98631,  -0.16491
+    0x3fef8dc10a95380d,     0xbfc54d71aa74ef02,     //  0.98605,  -0.16643
+    0x3fef8ba737cb4b78,     0xbfc57f008654cbde,     //   0.9858,  -0.16794
+    0x3fef898887a36c84,     0xbfc5b08c1192e381,     //  0.98554,  -0.16945
+    0x3fef8764fa714ba9,     0xbfc5e214448b3fc6,     //  0.98528,  -0.17096
+    0x3fef853c9089595e,     0xbfc61399179a6e94,     //  0.98501,  -0.17247
+    0x3fef830f4a40c60c,     0xbfc6451a831d830d,     //  0.98475,  -0.17398
+    0x3fef80dd27ed8204,     0xbfc676987f7216b8,     //  0.98448,  -0.17549
+    0x3fef7ea629e63d6e,     0xbfc6a81304f64ab2,     //  0.98421,    -0.177
+    0x3fef7c6a50826840,     0xbfc6d98a0c08c8da,     //  0.98394,  -0.17851
+    0x3fef7a299c1a322a,     0xbfc70afd8d08c4ff,     //  0.98366,  -0.18002
+    0x3fef77e40d068a90,     0xbfc73c6d8055fe0a,     //  0.98339,  -0.18153
+    0x3fef7599a3a12077,     0xbfc76dd9de50bf31,     //  0.98311,  -0.18304
+    0x3fef734a60446279,     0xbfc79f429f59e11d,     //  0.98282,  -0.18455
+    0x3fef70f6434b7eb7,     0xbfc7d0a7bbd2cb1b,     //  0.98254,  -0.18606
+    0x3fef6e9d4d1262ca,     0xbfc802092c1d744b,     //  0.98225,  -0.18756
+    0x3fef6c3f7df5bbb7,     0xbfc83366e89c64c5,     //  0.98196,  -0.18907
+    0x3fef69dcd652f5de,     0xbfc864c0e9b2b6cf,     //  0.98167,  -0.19057
+    0x3fef677556883cee,     0xbfc8961727c41804,     //  0.98138,  -0.19208
+    0x3fef6508fef47bd5,     0xbfc8c7699b34ca7e,     //  0.98108,  -0.19359
+    0x3fef6297cff75cb0,     0xbfc8f8b83c69a60a,     //  0.98079,  -0.19509
+    0x3fef6021c9f148c2,     0xbfc92a0303c8194f,     //  0.98048,  -0.19659
+    0x3fef5da6ed43685d,     0xbfc95b49e9b62af9,     //  0.98018,   -0.1981
+    0x3fef5b273a4fa2d9,     0xbfc98c8ce69a7aec,     //  0.97988,   -0.1996
+    0x3fef58a2b1789e84,     0xbfc9bdcbf2dc4366,     //  0.97957,   -0.2011
+    0x3fef56195321c090,     0xbfc9ef0706e35a35,     //  0.97926,  -0.20261
+    0x3fef538b1faf2d07,     0xbfca203e1b1831da,     //  0.97895,  -0.20411
+    0x3fef50f81785c6b9,     0xbfca517127e3dabc,     //  0.97863,  -0.20561
+    0x3fef4e603b0b2f2d,     0xbfca82a025b00451,     //  0.97832,  -0.20711
+    0x3fef4bc38aa5c694,     0xbfcab3cb0ce6fe44,     //    0.978,  -0.20861
+    0x3fef492206bcabb4,     0xbfcae4f1d5f3b9ab,     //  0.97768,  -0.21011
+    0x3fef467bafb7bbe0,     0xbfcb16147941ca2a,     //  0.97735,  -0.21161
+    0x3fef43d085ff92dd,     0xbfcb4732ef3d6722,     //  0.97703,  -0.21311
+    0x3fef412089fd8adc,     0xbfcb784d30536cda,     //   0.9767,  -0.21461
+    0x3fef3e6bbc1bbc65,     0xbfcba96334f15dad,     //  0.97637,  -0.21611
+    0x3fef3bb21cc4fe47,     0xbfcbda74f5856330,     //  0.97604,   -0.2176
+    0x3fef38f3ac64e589,     0xbfcc0b826a7e4f63,     //   0.9757,   -0.2191
+    0x3fef36306b67c556,     0xbfcc3c8b8c4b9dd7,     //  0.97536,   -0.2206
+    0x3fef33685a3aaef0,     0xbfcc6d90535d74dc,     //  0.97503,  -0.22209
+    0x3fef309b794b719f,     0xbfcc9e90b824a6a9,     //  0.97468,  -0.22359
+    0x3fef2dc9c9089a9d,     0xbfcccf8cb312b286,     //  0.97434,  -0.22508
+    0x3fef2af349e17507,     0xbfcd00843c99c5f9,     //  0.97399,  -0.22658
+    0x3fef2817fc4609ce,     0xbfcd31774d2cbdee,     //  0.97364,  -0.22807
+    0x3fef2537e0a71f9f,     0xbfcd6265dd3f27e3,     //  0.97329,  -0.22957
+    0x3fef2252f7763ada,     0xbfcd934fe5454311,     //  0.97294,  -0.23106
+    0x3fef1f6941259d7a,     0xbfcdc4355db40195,     //  0.97258,  -0.23255
+    0x3fef1c7abe284708,     0xbfcdf5163f01099a,     //  0.97223,  -0.23404
+    0x3fef19876ef1f486,     0xbfce25f281a2b684,     //  0.97187,  -0.23553
+    0x3fef168f53f7205d,     0xbfce56ca1e101a1b,     //   0.9715,  -0.23702
+    0x3fef13926dad024e,     0xbfce879d0cc0fdaf,     //  0.97114,  -0.23851
+    0x3fef1090bc898f5f,     0xbfceb86b462de348,     //  0.97077,     -0.24
+    0x3fef0d8a410379c5,     0xbfcee934c2d006c7,     //   0.9704,  -0.24149
+    0x3fef0a7efb9230d7,     0xbfcf19f97b215f1a,     //  0.97003,  -0.24298
+    0x3fef076eecade0fa,     0xbfcf4ab9679c9f5c,     //  0.96966,  -0.24447
+    0x3fef045a14cf738c,     0xbfcf7b7480bd3801,     //  0.96928,  -0.24596
+    0x3fef014074708ed3,     0xbfcfac2abeff57ff,     //   0.9689,  -0.24744
+    0x3feefe220c0b95ec,     0xbfcfdcdc1adfedf8,     //  0.96852,  -0.24893
+    0x3feefafedc1ba8b7,     0xbfd006c4466e54af,     //  0.96814,  -0.25041
+    0x3feef7d6e51ca3c0,     0xbfd01f1806b9fdd2,     //  0.96775,   -0.2519
+    0x3feef4aa278b2032,     0xbfd037694a928cac,     //  0.96737,  -0.25338
+    0x3feef178a3e473c2,     0xbfd04fb80e37fdae,     //  0.96698,  -0.25487
+    0x3feeee425aa6b09a,     0xbfd068044deab002,     //  0.96658,  -0.25635
+    0x3feeeb074c50a544,     0xbfd0804e05eb661e,     //  0.96619,  -0.25783
+    0x3feee7c77961dc9e,     0xbfd09895327b465e,     //  0.96579,  -0.25931
+    0x3feee482e25a9dbc,     0xbfd0b0d9cfdbdb90,     //  0.96539,  -0.26079
+    0x3feee13987bbebdc,     0xbfd0c91bda4f158d,     //  0.96499,  -0.26227
+    0x3feeddeb6a078651,     0xbfd0e15b4e1749cd,     //  0.96459,  -0.26375
+    0x3feeda9889bfe86a,     0xbfd0f998277733f7,     //  0.96418,  -0.26523
+    0x3feed740e7684963,     0xbfd111d262b1f677,     //  0.96378,  -0.26671
+    0x3feed3e483849c51,     0xbfd12a09fc0b1b12,     //  0.96337,  -0.26819
+    0x3feed0835e999009,     0xbfd1423eefc69378,     //  0.96295,  -0.26967
+    0x3feecd1d792c8f10,     0xbfd15a713a28b9d9,     //  0.96254,  -0.27115
+    0x3feec9b2d3c3bf84,     0xbfd172a0d7765177,     //  0.96212,  -0.27262
+    0x3feec6436ee60309,     0xbfd18acdc3f4873a,     //   0.9617,   -0.2741
+    0x3feec2cf4b1af6b2,     0xbfd1a2f7fbe8f243,     //  0.96128,  -0.27557
+    0x3feebf5668eaf2ef,     0xbfd1bb1f7b999480,     //  0.96086,  -0.27705
+    0x3feebbd8c8df0b74,     0xbfd1d3443f4cdb3d,     //  0.96043,  -0.27852
+    0x3feeb8566b810f2a,     0xbfd1eb6643499fbb,     //     0.96,  -0.27999
+    0x3feeb4cf515b8811,     0xbfd2038583d727bd,     //  0.95957,  -0.28146
+    0x3feeb1437af9bb34,     0xbfd21ba1fd3d2623,     //  0.95914,  -0.28294
+    0x3feeadb2e8e7a88e,     0xbfd233bbabc3bb72,     //   0.9587,  -0.28441
+    0x3feeaa1d9bb20af3,     0xbfd24bd28bb37672,     //  0.95827,  -0.28588
+    0x3feea68393e65800,     0xbfd263e6995554ba,     //  0.95783,  -0.28735
+    0x3feea2e4d212c000,     0xbfd27bf7d0f2c346,     //  0.95738,  -0.28882
+    0x3fee9f4156c62dda,     0xbfd294062ed59f05,     //  0.95694,  -0.29028
+    0x3fee9b99229046f8,     0xbfd2ac11af483572,     //  0.95649,  -0.29175
+    0x3fee97ec36016b30,     0xbfd2c41a4e954520,     //  0.95605,  -0.29322
+    0x3fee943a91aab4b4,     0xbfd2dc200907fe51,     //  0.95559,  -0.29469
+    0x3fee9084361df7f3,     0xbfd2f422daec0386,     //  0.95514,  -0.29615
+    0x3fee8cc923edc388,     0xbfd30c22c08d6a13,     //  0.95469,  -0.29762
+    0x3fee89095bad6025,     0xbfd3241fb638baaf,     //  0.95423,  -0.29908
+    0x3fee8544ddf0d075,     0xbfd33c19b83af207,     //  0.95377,  -0.30054
+    0x3fee817bab4cd10d,     0xbfd35410c2e18152,     //  0.95331,  -0.30201
+    0x3fee7dadc456d850,     0xbfd36c04d27a4edf,     //  0.95284,  -0.30347
+    0x3fee79db29a5165a,     0xbfd383f5e353b6aa,     //  0.95238,  -0.30493
+    0x3fee7603dbce74e9,     0xbfd39be3f1bc8aef,     //  0.95191,  -0.30639
+    0x3fee7227db6a9744,     0xbfd3b3cefa0414b7,     //  0.95144,  -0.30785
+    0x3fee6e472911da27,     0xbfd3cbb6f87a146e,     //  0.95096,  -0.30931
+    0x3fee6a61c55d53a7,     0xbfd3e39be96ec271,     //  0.95049,  -0.31077
+    0x3fee6677b0e6d31e,     0xbfd3fb7dc932cfa4,     //  0.95001,  -0.31222
+    0x3fee6288ec48e112,     0xbfd4135c94176602,     //  0.94953,  -0.31368
+    0x3fee5e95781ebf1c,     0xbfd42b38466e2928,     //  0.94905,  -0.31514
+    0x3fee5a9d550467d3,     0xbfd44310dc8936f0,     //  0.94856,  -0.31659
+    0x3fee56a083968eb1,     0xbfd45ae652bb2800,     //  0.94807,  -0.31805
+    0x3fee529f04729ffc,     0xbfd472b8a5571054,     //  0.94759,   -0.3195
+    0x3fee4e98d836c0af,     0xbfd48a87d0b07fd7,     //  0.94709,  -0.32096
+    0x3fee4a8dff81ce5e,     0xbfd4a253d11b82f3,     //   0.9466,  -0.32241
+    0x3fee467e7af35f23,     0xbfd4ba1ca2eca31c,     //  0.94611,  -0.32386
+    0x3fee426a4b2bc17e,     0xbfd4d1e24278e76a,     //  0.94561,  -0.32531
+    0x3fee3e5170cbfc46,     0xbfd4e9a4ac15d520,     //  0.94511,  -0.32676
+    0x3fee3a33ec75ce85,     0xbfd50163dc197047,     //   0.9446,  -0.32821
+    0x3fee3611becbaf69,     0xbfd5191fceda3c35,     //   0.9441,  -0.32966
+    0x3fee31eae870ce25,     0xbfd530d880af3c24,     //  0.94359,  -0.33111
+    0x3fee2dbf6a0911d9,     0xbfd5488dedeff3be,     //  0.94308,  -0.33255
+    0x3fee298f4439197a,     0xbfd5604012f467b4,     //  0.94257,    -0.334
+    0x3fee255a77a63bb8,     0xbfd577eeec151e47,     //  0.94206,  -0.33545
+    0x3fee212104f686e5,     0xbfd58f9a75ab1fdd,     //  0.94154,  -0.33689
+    0x3fee1ce2ecd0c0d8,     0xbfd5a742ac0ff78d,     //  0.94103,  -0.33833
+    0x3fee18a02fdc66d9,     0xbfd5bee78b9db3b6,     //  0.94051,  -0.33978
+    0x3fee1458cec1ad83,     0xbfd5d68910aee686,     //  0.93998,  -0.34122
+    0x3fee100cca2980ac,     0xbfd5ee27379ea693,     //  0.93946,  -0.34266
+    0x3fee0bbc22bd8349,     0xbfd605c1fcc88f63,     //  0.93893,   -0.3441
+    0x3fee0766d9280f54,     0xbfd61d595c88c203,     //   0.9384,  -0.34554
+    0x3fee030cee1435b8,     0xbfd634ed533be58e,     //  0.93787,  -0.34698
+    0x3fedfeae622dbe2b,     0xbfd64c7ddd3f27c6,     //  0.93734,  -0.34842
+    0x3fedfa4b3621271d,     0xbfd6640af6f03d9e,     //   0.9368,  -0.34986
+    0x3fedf5e36a9ba59c,     0xbfd67b949cad63ca,     //  0.93627,  -0.35129
+    0x3fedf177004b2534,     0xbfd6931acad55f51,     //  0.93573,  -0.35273
+    0x3feded05f7de47da,     0xbfd6aa9d7dc77e16,     //  0.93518,  -0.35416
+    0x3fede890520465ce,     0xbfd6c21cb1e39771,     //  0.93464,   -0.3556
+    0x3fede4160f6d8d81,     0xbfd6d998638a0cb5,     //  0.93409,  -0.35703
+    0x3feddf9730ca837b,     0xbfd6f1108f1bc9c5,     //  0.93354,  -0.35846
+    0x3feddb13b6ccc23d,     0xbfd7088530fa459e,     //  0.93299,   -0.3599
+    0x3fedd68ba2267a25,     0xbfd71ff6458782ec,     //  0.93244,  -0.36133
+    0x3fedd1fef38a915a,     0xbfd73763c9261092,     //  0.93188,  -0.36276
+    0x3fedcd6dabaca3a5,     0xbfd74ecdb8390a3e,     //  0.93133,  -0.36418
+    0x3fedc8d7cb410260,     0xbfd766340f2418f6,     //  0.93077,  -0.36561
+    0x3fedc43d52fcb453,     0xbfd77d96ca4b73a6,     //  0.93021,  -0.36704
+    0x3fedbf9e4395759a,     0xbfd794f5e613dfae,     //  0.92964,  -0.36847
+    0x3fedbafa9dc1b78d,     0xbfd7ac515ee2b172,     //  0.92907,  -0.36989
+    0x3fedb6526238a09b,     0xbfd7c3a9311dcce7,     //  0.92851,  -0.37132
+    0x3fedb1a591b20c38,     0xbfd7dafd592ba621,     //  0.92794,  -0.37274
+    0x3fedacf42ce68ab9,     0xbfd7f24dd37341e3,     //  0.92736,  -0.37416
+    0x3feda83e348f613b,     0xbfd8099a9c5c362d,     //  0.92679,  -0.37559
+    0x3feda383a9668988,     0xbfd820e3b04eaac4,     //  0.92621,  -0.37701
+    0x3fed9ec48c26b1f3,     0xbfd838290bb359c8,     //  0.92563,  -0.37843
+    0x3fed9a00dd8b3d46,     0xbfd84f6aaaf3903f,     //  0.92505,  -0.37985
+    0x3fed95389e50429b,     0xbfd866a88a792ea0,     //  0.92447,  -0.38127
+    0x3fed906bcf328d46,     0xbfd87de2a6aea963,     //  0.92388,  -0.38268
+    0x3fed8b9a70ef9cb4,     0xbfd89518fbff098e,     //  0.92329,   -0.3841
+    0x3fed86c48445a450,     0xbfd8ac4b86d5ed44,     //   0.9227,  -0.38552
+    0x3fed81ea09f38b63,     0xbfd8c37a439f884f,     //  0.92211,  -0.38693
+    0x3fed7d0b02b8ecf9,     0xbfd8daa52ec8a4af,     //  0.92151,  -0.38835
+    0x3fed78276f5617c6,     0xbfd8f1cc44bea329,     //  0.92092,  -0.38976
+    0x3fed733f508c0dff,     0xbfd908ef81ef7bd1,     //  0.92032,  -0.39117
+    0x3fed6e52a71c8547,     0xbfd9200ee2c9be97,     //  0.91972,  -0.39258
+    0x3fed696173c9e68b,     0xbfd9372a63bc93d7,     //  0.91911,  -0.39399
+    0x3fed646bb7574de5,     0xbfd94e420137bce3,     //  0.91851,   -0.3954
+    0x3fed5f7172888a7f,     0xbfd96555b7ab948f,     //   0.9179,  -0.39681
+    0x3fed5a72a6221e73,     0xbfd97c6583890fc2,     //  0.91729,  -0.39822
+    0x3fed556f52e93eb1,     0xbfd993716141bdfe,     //  0.91668,  -0.39962
+    0x3fed506779a3d2d9,     0xbfd9aa794d47c9ee,     //  0.91606,  -0.40103
+    0x3fed4b5b1b187524,     0xbfd9c17d440df9f2,     //  0.91545,  -0.40243
+    0x3fed464a380e7242,     0xbfd9d87d4207b0ab,     //  0.91483,  -0.40384
+    0x3fed4134d14dc93a,     0xbfd9ef7943a8ed8a,     //  0.91421,  -0.40524
+    0x3fed3c1ae79f2b4e,     0xbfda067145664d57,     //  0.91359,  -0.40664
+    0x3fed36fc7bcbfbdc,     0xbfda1d6543b50ac0,     //  0.91296,  -0.40804
+    0x3fed31d98e9e503a,     0xbfda34553b0afee5,     //  0.91234,  -0.40944
+    0x3fed2cb220e0ef9f,     0xbfda4b4127dea1e4,     //  0.91171,  -0.41084
+    0x3fed2786335f52fc,     0xbfda622906a70b63,     //  0.91107,  -0.41224
+    0x3fed2255c6e5a4e1,     0xbfda790cd3dbf31a,     //  0.91044,  -0.41364
+    0x3fed1d20dc40c15c,     0xbfda8fec8bf5b166,     //  0.90981,  -0.41503
+    0x3fed17e7743e35dc,     0xbfdaa6c82b6d3fc9,     //  0.90917,  -0.41643
+    0x3fed12a98fac410c,     0xbfdabd9faebc3980,     //  0.90853,  -0.41782
+    0x3fed0d672f59d2b9,     0xbfdad473125cdc08,     //  0.90789,  -0.41922
+    0x3fed082054168bac,     0xbfdaeb4252ca07ab,     //  0.90724,  -0.42061
+    0x3fed02d4feb2bd92,     0xbfdb020d6c7f4009,     //   0.9066,    -0.422
+    0x3fecfd852fff6ad4,     0xbfdb18d45bf8aca6,     //  0.90595,  -0.42339
+    0x3fecf830e8ce467b,     0xbfdb2f971db31972,     //   0.9053,  -0.42478
+    0x3fecf2d829f1b40e,     0xbfdb4655ae2bf757,     //  0.90464,  -0.42617
+    0x3feced7af43cc773,     0xbfdb5d1009e15cc0,     //  0.90399,  -0.42756
+    0x3fece819488344ce,     0xbfdb73c62d520624,     //  0.90333,  -0.42894
+    0x3fece2b32799a060,     0xbfdb8a7814fd5693,     //  0.90267,  -0.43033
+    0x3fecdd489254fe65,     0xbfdba125bd63583e,     //  0.90201,  -0.43171
+    0x3fecd7d9898b32f6,     0xbfdbb7cf2304bd01,     //  0.90135,  -0.43309
+    0x3fecd2660e12c1e6,     0xbfdbce744262deee,     //  0.90068,  -0.43448
+    0x3fecccee20c2de9f,     0xbfdbe51517ffc0d9,     //  0.90002,  -0.43586
+    0x3fecc771c2736c09,     0xbfdbfbb1a05e0edc,     //  0.89935,  -0.43724
+    0x3fecc1f0f3fcfc5c,     0xbfdc1249d8011ee7,     //  0.89867,  -0.43862
+    0x3fecbc6bb638d10b,     0xbfdc28ddbb6cf145,     //    0.898,  -0.43999
+    0x3fecb6e20a00da99,     0xbfdc3f6d47263129,     //  0.89732,  -0.44137
+    0x3fecb153f02fb87d,     0xbfdc55f877b23537,     //  0.89665,  -0.44275
+    0x3fecabc169a0b901,     0xbfdc6c7f4997000a,     //  0.89597,  -0.44412
+    0x3feca62a772fd919,     0xbfdc8301b95b40c2,     //  0.89528,   -0.4455
+    0x3feca08f19b9c449,     0xbfdc997fc3865388,     //   0.8946,  -0.44687
+    0x3fec9aef521bd480,     0xbfdcaff964a0421d,     //  0.89391,  -0.44824
+    0x3fec954b213411f5,     0xbfdcc66e9931c45d,     //  0.89322,  -0.44961
+    0x3fec8fa287e13305,     0xbfdcdcdf5dc440ce,     //  0.89253,  -0.45098
+    0x3fec89f587029c13,     0xbfdcf34baee1cd21,     //  0.89184,  -0.45235
+    0x3fec84441f785f61,     0xbfdd09b389152ec1,     //  0.89115,  -0.45372
+    0x3fec7e8e52233cf3,     0xbfdd2016e8e9db5b,     //  0.89045,  -0.45508
+    0x3fec78d41fe4a267,     0xbfdd3675caebf962,     //  0.88975,  -0.45645
+    0x3fec7315899eaad7,     0xbfdd4cd02ba8609c,     //  0.88905,  -0.45781
+    0x3fec6d5290341eb2,     0xbfdd632607ac9aa9,     //  0.88835,  -0.45918
+    0x3fec678b3488739b,     0xbfdd79775b86e389,     //  0.88764,  -0.46054
+    0x3fec61bf777fcc48,     0xbfdd8fc423c62a25,     //  0.88693,   -0.4619
+    0x3fec5bef59fef85a,     0xbfdda60c5cfa10d8,     //  0.88622,  -0.46326
+    0x3fec561adceb743e,     0xbfddbc5003b2edf8,     //  0.88551,  -0.46462
+    0x3fec5042012b6907,     0xbfddd28f1481cc58,     //   0.8848,  -0.46598
+    0x3fec4a64c7a5ac4c,     0xbfdde8c98bf86bd6,     //  0.88408,  -0.46733
+    0x3fec44833141c004,     0xbfddfeff66a941de,     //  0.88336,  -0.46869
+    0x3fec3e9d3ee7d262,     0xbfde1530a12779f4,     //  0.88264,  -0.47004
+    0x3fec38b2f180bdb1,     0xbfde2b5d3806f63b,     //  0.88192,   -0.4714
+    0x3fec32c449f60831,     0xbfde418527dc4ffa,     //   0.8812,  -0.47275
+    0x3fec2cd14931e3f1,     0xbfde57a86d3cd824,     //  0.88047,   -0.4741
+    0x3fec26d9f01f2eaf,     0xbfde6dc704be97e2,     //  0.87974,  -0.47545
+    0x3fec20de3fa971b0,     0xbfde83e0eaf85113,     //  0.87901,   -0.4768
+    0x3fec1ade38bce19b,     0xbfde99f61c817eda,     //  0.87828,  -0.47815
+    0x3fec14d9dc465e58,     0xbfdeb00695f25620,     //  0.87755,  -0.47949
+    0x3fec0ed12b3372e9,     0xbfdec61253e3c61b,     //  0.87681,  -0.48084
+    0x3fec08c426725549,     0xbfdedc1952ef78d5,     //  0.87607,  -0.48218
+    0x3fec02b2cef1e641,     0xbfdef21b8fafd3b5,     //  0.87533,  -0.48353
+    0x3febfc9d25a1b147,     0xbfdf081906bff7fd,     //  0.87459,  -0.48487
+    0x3febf6832b71ec5b,     0xbfdf1e11b4bbc35c,     //  0.87384,  -0.48621
+    0x3febf064e15377dd,     0xbfdf3405963fd068,     //  0.87309,  -0.48755
+    0x3febea424837de6d,     0xbfdf49f4a7e97729,     //  0.87235,  -0.48889
+    0x3febe41b611154c1,     0xbfdf5fdee656cda3,     //   0.8716,  -0.49023
+    0x3febddf02cd2b983,     0xbfdf75c44e26a852,     //  0.87084,  -0.49156
+    0x3febd7c0ac6f952a,     0xbfdf8ba4dbf89aba,     //  0.87009,   -0.4929
+    0x3febd18ce0dc19d6,     0xbfdfa1808c6cf7e0,     //  0.86933,  -0.49423
+    0x3febcb54cb0d2327,     0xbfdfb7575c24d2de,     //  0.86857,  -0.49557
+    0x3febc5186bf8361d,     0xbfdfcd2947c1ff57,     //  0.86781,   -0.4969
+    0x3febbed7c49380ea,     0xbfdfe2f64be7120f,     //  0.86705,  -0.49823
+    0x3febb892d5d5dad5,     0xbfdff8be6537615e,     //  0.86628,  -0.49956
+    0x3febb249a0b6c40d,     0xbfe00740c82b82e0,     //  0.86551,  -0.50089
+    0x3febabfc262e6586,     0xbfe0121fe4f56d2c,     //  0.86474,  -0.50221
+    0x3feba5aa673590d2,     0xbfe01cfc874c3eb7,     //  0.86397,  -0.50354
+    0x3feb9f5464c5bffc,     0xbfe027d6ad83287e,     //   0.8632,  -0.50486
+    0x3feb98fa1fd9155e,     0xbfe032ae55edbd95,     //  0.86242,  -0.50619
+    0x3feb929b996a5b7f,     0xbfe03d837edff370,     //  0.86165,  -0.50751
+    0x3feb8c38d27504e9,     0xbfe0485626ae221a,     //  0.86087,  -0.50883
+    0x3feb85d1cbf52c02,     0xbfe053264bad0483,     //  0.86009,  -0.51015
+    0x3feb7f6686e792ea,     0xbfe05df3ec31b8b6,     //   0.8593,  -0.51147
+    0x3feb78f70449a34b,     0xbfe068bf0691c028,     //  0.85852,  -0.51279
+    0x3feb728345196e3e,     0xbfe073879922ffed,     //  0.85773,   -0.5141
+    0x3feb6c0b4a55ac17,     0xbfe07e4da23bc102,     //  0.85694,  -0.51542
+    0x3feb658f14fdbc47,     0xbfe089112032b08c,     //  0.85615,  -0.51673
+    0x3feb5f0ea611a532,     0xbfe093d2115ee018,     //  0.85535,  -0.51804
+    0x3feb5889fe921405,     0xbfe09e907417c5e1,     //  0.85456,  -0.51936
+    0x3feb52011f805c92,     0xbfe0a94c46b53d0b,     //  0.85376,  -0.52067
+    0x3feb4b7409de7925,     0xbfe0b405878f85ec,     //  0.85296,  -0.52198
+    0x3feb44e2beaf0a61,     0xbfe0bebc34ff4646,     //  0.85216,  -0.52328
+    0x3feb3e4d3ef55712,     0xbfe0c9704d5d898f,     //  0.85136,  -0.52459
+    0x3feb37b38bb54c09,     0xbfe0d421cf03c12b,     //  0.85055,   -0.5259
+    0x3feb3115a5f37bf4,     0xbfe0ded0b84bc4b5,     //  0.84974,   -0.5272
+    0x3feb2a738eb51f33,     0xbfe0e97d078fd23b,     //  0.84893,   -0.5285
+    0x3feb23cd470013b4,     0xbfe0f426bb2a8e7d,     //  0.84812,   -0.5298
+    0x3feb1d22cfdadcc6,     0xbfe0fecdd1770537,     //  0.84731,   -0.5311
+    0x3feb16742a4ca2f5,     0xbfe1097248d0a956,     //  0.84649,   -0.5324
+    0x3feb0fc1575d33db,     0xbfe114141f935545,     //  0.84567,   -0.5337
+    0x3feb090a58150200,     0xbfe11eb3541b4b22,     //  0.84485,    -0.535
+    0x3feb024f2d7d24a9,     0xbfe1294fe4c5350a,     //  0.84403,  -0.53629
+    0x3feafb8fd89f57b6,     0xbfe133e9cfee254e,     //  0.84321,  -0.53759
+    0x3feaf4cc5a85fb73,     0xbfe13e8113f396c1,     //  0.84238,  -0.53888
+    0x3feaee04b43c1474,     0xbfe14915af336ceb,     //  0.84155,  -0.54017
+    0x3feae738e6cd4b67,     0xbfe153a7a00bf453,     //  0.84073,  -0.54146
+    0x3feae068f345ecef,     0xbfe15e36e4dbe2bc,     //  0.83989,  -0.54275
+    0x3fead994dab2e979,     0xbfe168c37c025764,     //  0.83906,  -0.54404
+    0x3fead2bc9e21d511,     0xbfe1734d63dedb49,     //  0.83822,  -0.54532
+    0x3feacbe03ea0e73b,     0xbfe17dd49ad16161,     //  0.83739,  -0.54661
+    0x3feac4ffbd3efac8,     0xbfe188591f3a46e5,     //  0.83655,  -0.54789
+    0x3feabe1b1b0b8dac,     0xbfe192daef7a5386,     //  0.83571,  -0.54918
+    0x3feab7325916c0d4,     0xbfe19d5a09f2b9b8,     //  0.83486,  -0.55046
+    0x3feab045787157ff,     0xbfe1a7d66d0516e6,     //  0.83402,  -0.55174
+    0x3feaa9547a2cb98e,     0xbfe1b250171373be,     //  0.83317,  -0.55302
+    0x3feaa25f5f5aee60,     0xbfe1bcc706804467,     //  0.83232,  -0.55429
+    0x3fea9b66290ea1a3,     0xbfe1c73b39ae68c8,     //  0.83147,  -0.55557
+    0x3fea9468d85b20ae,     0xbfe1d1acaf012cc2,     //  0.83062,  -0.55685
+    0x3fea8d676e545ad2,     0xbfe1dc1b64dc4872,     //  0.82976,  -0.55812
+    0x3fea8661ec0ee133,     0xbfe1e68759a3e074,     //   0.8289,  -0.55939
+    0x3fea7f58529fe69d,     0xbfe1f0f08bbc861b,     //  0.82805,  -0.56066
+    0x3fea784aa31d3f55,     0xbfe1fb56f98b37b8,     //  0.82718,  -0.56193
+    0x3fea7138de9d60f5,     0xbfe205baa17560d6,     //  0.82632,   -0.5632
+    0x3fea6a230637623b,     0xbfe2101b81e0da78,     //  0.82546,  -0.56447
+    0x3fea63091b02fae2,     0xbfe21a799933eb58,     //  0.82459,  -0.56573
+    0x3fea5beb1e188375,     0xbfe224d4e5d5482e,     //  0.82372,    -0.567
+    0x3fea54c91090f524,     0xbfe22f2d662c13e1,     //  0.82285,  -0.56826
+    0x3fea4da2f385e997,     0xbfe23983189fdfd5,     //  0.82198,  -0.56952
+    0x3fea4678c8119ac8,     0xbfe243d5fb98ac1f,     //   0.8211,  -0.57078
+    0x3fea3f4a8f4ee2d2,     0xbfe24e260d7ee7c9,     //  0.82023,  -0.57204
+    0x3fea38184a593bc6,     0xbfe258734cbb7110,     //  0.81935,   -0.5733
+    0x3fea30e1fa4cbf81,     0xbfe262bdb7b795a2,     //  0.81847,  -0.57455
+    0x3fea29a7a0462782,     0xbfe26d054cdd12df,     //  0.81758,  -0.57581
+    0x3fea22693d62ccb9,     0xbfe2774a0a961612,     //   0.8167,  -0.57706
+    0x3fea1b26d2c0a75e,     0xbfe2818bef4d3cba,     //  0.81581,  -0.57831
+    0x3fea13e0617e4ec7,     0xbfe28bcaf96d94ba,     //  0.81493,  -0.57956
+    0x3fea0c95eabaf937,     0xbfe2960727629ca8,     //  0.81404,  -0.58081
+    0x3fea05476f967bb5,     0xbfe2a040779843fb,     //  0.81314,  -0.58206
+    0x3fe9fdf4f13149de,     0xbfe2aa76e87aeb58,     //  0.81225,  -0.58331
+    0x3fe9f69e70ac75bc,     0xbfe2b4aa787764c4,     //  0.81135,  -0.58455
+    0x3fe9ef43ef29af94,     0xbfe2bedb25faf3ea,     //  0.81046,   -0.5858
+    0x3fe9e7e56dcb45bd,     0xbfe2c908ef734e57,     //  0.80956,  -0.58704
+    0x3fe9e082edb42472,     0xbfe2d333d34e9bb7,     //  0.80866,  -0.58828
+    0x3fe9d91c7007d5a6,     0xbfe2dd5bcffb7616,     //  0.80775,  -0.58952
+    0x3fe9d1b1f5ea80d6,     0xbfe2e780e3e8ea16,     //  0.80685,  -0.59076
+    0x3fe9ca438080eadb,     0xbfe2f1a30d86773a,     //  0.80594,    -0.592
+    0x3fe9c2d110f075c3,     0xbfe2fbc24b441015,     //  0.80503,  -0.59323
+    0x3fe9bb5aa85f2098,     0xbfe305de9b921a94,     //  0.80412,  -0.59447
+    0x3fe9b3e047f38741,     0xbfe30ff7fce17035,     //  0.80321,   -0.5957
+    0x3fe9ac61f0d4e247,     0xbfe31a0e6da35e44,     //  0.80229,  -0.59693
+    0x3fe9a4dfa42b06b2,     0xbfe32421ec49a620,     //  0.80138,  -0.59816
+    0x3fe99d59631e65d5,     0xbfe32e3277467d6b,     //  0.80046,  -0.59939
+    0x3fe995cf2ed80d22,     0xbfe338400d0c8e57,     //  0.79954,  -0.60062
+    0x3fe98e410881a600,     0xbfe3424aac0ef7d6,     //  0.79861,  -0.60184
+    0x3fe986aef1457594,     0xbfe34c5252c14de1,     //  0.79769,  -0.60307
+    0x3fe97f18ea4e5c9e,     0xbfe35656ff9799ae,     //  0.79676,  -0.60429
+    0x3fe9777ef4c7d742,     0xbfe36058b10659f3,     //  0.79584,  -0.60551
+    0x3fe96fe111ddfce0,     0xbfe36a576582831b,     //  0.79491,  -0.60673
+    0x3fe9683f42bd7fe1,     0xbfe374531b817f8d,     //  0.79398,  -0.60795
+    0x3fe960998893ad8c,     0xbfe37e4bd1792fe2,     //  0.79304,  -0.60917
+    0x3fe958efe48e6dd7,     0xbfe3884185dfeb22,     //  0.79211,  -0.61038
+    0x3fe9514257dc4335,     0xbfe39234372c7f04,     //  0.79117,   -0.6116
+    0x3fe94990e3ac4a6c,     0xbfe39c23e3d63029,     //  0.79023,  -0.61281
+    0x3fe941db892e3a65,     0xbfe3a6108a54ba58,     //  0.78929,  -0.61402
+    0x3fe93a22499263fc,     0xbfe3affa292050b9,     //  0.78835,  -0.61523
+    0x3fe932652609b1cf,     0xbfe3b9e0beb19e18,     //   0.7874,  -0.61644
+    0x3fe92aa41fc5a815,     0xbfe3c3c44981c517,     //  0.78646,  -0.61765
+    0x3fe922df37f8646a,     0xbfe3cda4c80a6076,     //  0.78551,  -0.61885
+    0x3fe91b166fd49da2,     0xbfe3d78238c58343,     //  0.78456,  -0.62006
+    0x3fe91349c88da398,     0xbfe3e15c9a2db922,     //   0.7836,  -0.62126
+    0x3fe90b7943575efe,     0xbfe3eb33eabe0680,     //  0.78265,  -0.62246
+    0x3fe903a4e1665133,     0xbfe3f50828f1e8d2,     //  0.78169,  -0.62366
+    0x3fe8fbcca3ef940d,     0xbfe3fed9534556d4,     //  0.78074,  -0.62486
+    0x3fe8f3f08c28d9ac,     0xbfe408a76834c0c0,     //  0.77978,  -0.62606
+    0x3fe8ec109b486c49,     0xbfe41272663d108c,     //  0.77882,  -0.62725
+    0x3fe8e42cd2852e0a,     0xbfe41c3a4bdbaa26,     //  0.77785,  -0.62845
+    0x3fe8dc45331698cc,     0xbfe425ff178e6bb1,     //  0.77689,  -0.62964
+    0x3fe8d459be34bdfa,     0xbfe42fc0c7d3adbb,     //  0.77592,  -0.63083
+    0x3fe8cc6a75184655,     0xbfe4397f5b2a4380,     //  0.77495,  -0.63202
+    0x3fe8c47758fa71cb,     0xbfe4433ad0117b1d,     //  0.77398,  -0.63321
+    0x3fe8bc806b151741,     0xbfe44cf325091dd6,     //  0.77301,  -0.63439
+    0x3fe8b485aca2a468,     0xbfe456a858917046,     //  0.77204,  -0.63558
+    0x3fe8ac871ede1d88,     0xbfe4605a692b32a2,     //  0.77106,  -0.63676
+    0x3fe8a484c3031d50,     0xbfe46a095557a0f1,     //  0.77008,  -0.63794
+    0x3fe89c7e9a4dd4ab,     0xbfe473b51b987347,     //   0.7691,  -0.63912
+    0x3fe89474a5fb0a84,     0xbfe47d5dba6fde01,     //  0.76812,   -0.6403
+    0x3fe88c66e7481ba1,     0xbfe48703306091fe,     //  0.76714,  -0.64148
+    0x3fe884555f72fa6b,     0xbfe490a57bedbcdf,     //  0.76615,  -0.64266
+    0x3fe87c400fba2ebf,     0xbfe49a449b9b0938,     //  0.76517,  -0.64383
+    0x3fe87426f95cd5bd,     0xbfe4a3e08dec9ed6,     //  0.76418,    -0.645
+    0x3fe86c0a1d9aa195,     0xbfe4ad79516722f0,     //  0.76319,  -0.64618
+    0x3fe863e97db3d95a,     0xbfe4b70ee48fb869,     //   0.7622,  -0.64735
+    0x3fe85bc51ae958cc,     0xbfe4c0a145ec0004,     //   0.7612,  -0.64851
+    0x3fe8539cf67c9029,     0xbfe4ca30740218a3,     //  0.76021,  -0.64968
+    0x3fe84b7111af83f9,     0xbfe4d3bc6d589f80,     //  0.75921,  -0.65085
+    0x3fe843416dc4cce2,     0xbfe4dd453076b064,     //  0.75821,  -0.65201
+    0x3fe83b0e0bff976e,     0xbfe4e6cabbe3e5e9,     //  0.75721,  -0.65317
+    0x3fe832d6eda3a3e0,     0xbfe4f04d0e2859aa,     //  0.75621,  -0.65433
+    0x3fe82a9c13f545ff,     0xbfe4f9cc25cca486,     //   0.7552,  -0.65549
+    0x3fe8225d803964e5,     0xbfe503480159ded2,     //  0.75419,  -0.65665
+    0x3fe81a1b33b57acc,     0xbfe50cc09f59a09b,     //  0.75319,  -0.65781
+    0x3fe811d52faf94dc,     0xbfe51635fe5601d7,     //  0.75218,  -0.65896
+    0x3fe8098b756e52fa,     0xbfe51fa81cd99aa6,     //  0.75117,  -0.66011
+    0x3fe8013e0638e795,     0xbfe52916f96f8388,     //  0.75015,  -0.66127
+    0x3fe7f8ece3571771,     0xbfe5328292a35596,     //  0.74914,  -0.66242
+    0x3fe7f0980e113978,     0xbfe53beae7012abe,     //  0.74812,  -0.66356
+    0x3fe7e83f87b03686,     0xbfe5454ff5159dfb,     //   0.7471,  -0.66471
+    0x3fe7dfe3517d8937,     0xbfe54eb1bb6dcb8f,     //  0.74608,  -0.66586
+    0x3fe7d7836cc33db2,     0xbfe5581038975137,     //  0.74506,    -0.667
+    0x3fe7cf1fdacbf179,     0xbfe5616b6b204e6e,     //  0.74403,  -0.66814
+    0x3fe7c6b89ce2d333,     0xbfe56ac35197649e,     //  0.74301,  -0.66928
+    0x3fe7be4db453a27c,     0xbfe57417ea8bb75c,     //  0.74198,  -0.67042
+    0x3fe7b5df226aafb0,     0xbfe57d69348cec9f,     //  0.74095,  -0.67156
+    0x3fe7ad6ce874dbb6,     0xbfe586b72e2b2cfd,     //  0.73992,  -0.67269
+    0x3fe7a4f707bf97d2,     0xbfe59001d5f723df,     //  0.73889,  -0.67383
+    0x3fe79c7d8198e56e,     0xbfe599492a81ffbc,     //  0.73785,  -0.67496
+    0x3fe79400574f55e4,     0xbfe5a28d2a5d7250,     //  0.73682,  -0.67609
+    0x3fe78b7f8a320a52,     0xbfe5abcdd41bb0d8,     //  0.73578,  -0.67722
+    0x3fe782fb1b90b35b,     0xbfe5b50b264f7448,     //  0.73474,  -0.67835
+    0x3fe77a730cbb9100,     0xbfe5be451f8bf980,     //   0.7337,  -0.67948
+    0x3fe771e75f037261,     0xbfe5c77bbe65018c,     //  0.73265,   -0.6806
+    0x3fe7695813b9b594,     0xbfe5d0af016ed1d4,     //  0.73161,  -0.68172
+    0x3fe760c52c304764,     0xbfe5d9dee73e345c,     //  0.73056,  -0.68285
+    0x3fe7582ea9b9a329,     0xbfe5e30b6e6877f3,     //  0.72951,  -0.68397
+    0x3fe74f948da8d28d,     0xbfe5ec3495837074,     //  0.72846,  -0.68508
+    0x3fe746f6d9516d59,     0xbfe5f55a5b2576f8,     //  0.72741,   -0.6862
+    0x3fe73e558e079942,     0xbfe5fe7cbde56a0f,     //  0.72636,  -0.68732
+    0x3fe735b0ad2009b2,     0xbfe6079bbc5aadfa,     //   0.7253,  -0.68843
+    0x3fe72d0837efff97,     0xbfe610b7551d2cde,     //  0.72425,  -0.68954
+    0x3fe7245c2fcd492a,     0xbfe619cf86c55702,     //  0.72319,  -0.69065
+    0x3fe71bac960e41bf,     0xbfe622e44fec22ff,     //  0.72213,  -0.69176
+    0x3fe712f96c09d18d,     0xbfe62bf5af2b0dfd,     //  0.72107,  -0.69287
+    0x3fe70a42b3176d7a,     0xbfe63503a31c1be8,     //     0.72,  -0.69397
+    0x3fe701886c8f16e6,     0xbfe63e0e2a59d7aa,     //  0.71894,  -0.69508
+    0x3fe6f8ca99c95b75,     0xbfe64715437f535b,     //  0.71787,  -0.69618
+    0x3fe6f0093c1f54de,     0xbfe65018ed28287f,     //   0.7168,  -0.69728
+    0x3fe6e74454eaa8ae,     0xbfe6591925f0783e,     //  0.71573,  -0.69838
+    0x3fe6de7be585881d,     0xbfe66215ec74eb91,     //  0.71466,  -0.69947
+    0x3fe6d5afef4aafcc,     0xbfe66b0f3f52b386,     //  0.71358,  -0.70057
+    0x3fe6cce07395679f,     0xbfe674051d27896c,     //  0.71251,  -0.70166
+    0x3fe6c40d73c18275,     0xbfe67cf78491af10,     //  0.71143,  -0.70275
+    0x3fe6bb36f12b5e06,     0xbfe685e6742feeef,     //  0.71035,  -0.70385
+    0x3fe6b25ced2fe29c,     0xbfe68ed1eaa19c71,     //  0.70927,  -0.70493
+    0x3fe6a97f692c82ea,     0xbfe697b9e686941c,     //  0.70819,  -0.70602
+    0x3fe6a09e667f3bcc,     0xbfe6a09e667f3bcc,     //  0.70711,  -0.70711
+    0x3fe697b9e686941c,     0xbfe6a97f692c82ea,     //  0.70602,  -0.70819
+    0x3fe68ed1eaa19c71,     0xbfe6b25ced2fe29c,     //  0.70493,  -0.70927
+    0x3fe685e6742feeef,     0xbfe6bb36f12b5e06,     //  0.70385,  -0.71035
+    0x3fe67cf78491af10,     0xbfe6c40d73c18275,     //  0.70275,  -0.71143
+    0x3fe674051d27896c,     0xbfe6cce07395679f,     //  0.70166,  -0.71251
+    0x3fe66b0f3f52b386,     0xbfe6d5afef4aafcc,     //  0.70057,  -0.71358
+    0x3fe66215ec74eb91,     0xbfe6de7be585881d,     //  0.69947,  -0.71466
+    0x3fe6591925f0783e,     0xbfe6e74454eaa8ae,     //  0.69838,  -0.71573
+    0x3fe65018ed28287f,     0xbfe6f0093c1f54de,     //  0.69728,   -0.7168
+    0x3fe64715437f535b,     0xbfe6f8ca99c95b75,     //  0.69618,  -0.71787
+    0x3fe63e0e2a59d7aa,     0xbfe701886c8f16e6,     //  0.69508,  -0.71894
+    0x3fe63503a31c1be8,     0xbfe70a42b3176d7a,     //  0.69397,     -0.72
+    0x3fe62bf5af2b0dfd,     0xbfe712f96c09d18d,     //  0.69287,  -0.72107
+    0x3fe622e44fec22ff,     0xbfe71bac960e41bf,     //  0.69176,  -0.72213
+    0x3fe619cf86c55702,     0xbfe7245c2fcd492a,     //  0.69065,  -0.72319
+    0x3fe610b7551d2cde,     0xbfe72d0837efff97,     //  0.68954,  -0.72425
+    0x3fe6079bbc5aadfa,     0xbfe735b0ad2009b2,     //  0.68843,   -0.7253
+    0x3fe5fe7cbde56a0f,     0xbfe73e558e079942,     //  0.68732,  -0.72636
+    0x3fe5f55a5b2576f8,     0xbfe746f6d9516d59,     //   0.6862,  -0.72741
+    0x3fe5ec3495837074,     0xbfe74f948da8d28d,     //  0.68508,  -0.72846
+    0x3fe5e30b6e6877f3,     0xbfe7582ea9b9a329,     //  0.68397,  -0.72951
+    0x3fe5d9dee73e345c,     0xbfe760c52c304764,     //  0.68285,  -0.73056
+    0x3fe5d0af016ed1d4,     0xbfe7695813b9b594,     //  0.68172,  -0.73161
+    0x3fe5c77bbe65018c,     0xbfe771e75f037261,     //   0.6806,  -0.73265
+    0x3fe5be451f8bf980,     0xbfe77a730cbb9100,     //  0.67948,   -0.7337
+    0x3fe5b50b264f7448,     0xbfe782fb1b90b35b,     //  0.67835,  -0.73474
+    0x3fe5abcdd41bb0d8,     0xbfe78b7f8a320a52,     //  0.67722,  -0.73578
+    0x3fe5a28d2a5d7250,     0xbfe79400574f55e4,     //  0.67609,  -0.73682
+    0x3fe599492a81ffbc,     0xbfe79c7d8198e56e,     //  0.67496,  -0.73785
+    0x3fe59001d5f723df,     0xbfe7a4f707bf97d2,     //  0.67383,  -0.73889
+    0x3fe586b72e2b2cfd,     0xbfe7ad6ce874dbb6,     //  0.67269,  -0.73992
+    0x3fe57d69348cec9f,     0xbfe7b5df226aafb0,     //  0.67156,  -0.74095
+    0x3fe57417ea8bb75c,     0xbfe7be4db453a27c,     //  0.67042,  -0.74198
+    0x3fe56ac35197649e,     0xbfe7c6b89ce2d333,     //  0.66928,  -0.74301
+    0x3fe5616b6b204e6e,     0xbfe7cf1fdacbf179,     //  0.66814,  -0.74403
+    0x3fe5581038975137,     0xbfe7d7836cc33db2,     //    0.667,  -0.74506
+    0x3fe54eb1bb6dcb8f,     0xbfe7dfe3517d8937,     //  0.66586,  -0.74608
+    0x3fe5454ff5159dfb,     0xbfe7e83f87b03686,     //  0.66471,   -0.7471
+    0x3fe53beae7012abe,     0xbfe7f0980e113978,     //  0.66356,  -0.74812
+    0x3fe5328292a35596,     0xbfe7f8ece3571771,     //  0.66242,  -0.74914
+    0x3fe52916f96f8388,     0xbfe8013e0638e795,     //  0.66127,  -0.75015
+    0x3fe51fa81cd99aa6,     0xbfe8098b756e52fa,     //  0.66011,  -0.75117
+    0x3fe51635fe5601d7,     0xbfe811d52faf94dc,     //  0.65896,  -0.75218
+    0x3fe50cc09f59a09b,     0xbfe81a1b33b57acc,     //  0.65781,  -0.75319
+    0x3fe503480159ded2,     0xbfe8225d803964e5,     //  0.65665,  -0.75419
+    0x3fe4f9cc25cca486,     0xbfe82a9c13f545ff,     //  0.65549,   -0.7552
+    0x3fe4f04d0e2859aa,     0xbfe832d6eda3a3e0,     //  0.65433,  -0.75621
+    0x3fe4e6cabbe3e5e9,     0xbfe83b0e0bff976e,     //  0.65317,  -0.75721
+    0x3fe4dd453076b064,     0xbfe843416dc4cce2,     //  0.65201,  -0.75821
+    0x3fe4d3bc6d589f80,     0xbfe84b7111af83f9,     //  0.65085,  -0.75921
+    0x3fe4ca30740218a3,     0xbfe8539cf67c9029,     //  0.64968,  -0.76021
+    0x3fe4c0a145ec0004,     0xbfe85bc51ae958cc,     //  0.64851,   -0.7612
+    0x3fe4b70ee48fb869,     0xbfe863e97db3d95a,     //  0.64735,   -0.7622
+    0x3fe4ad79516722f0,     0xbfe86c0a1d9aa195,     //  0.64618,  -0.76319
+    0x3fe4a3e08dec9ed6,     0xbfe87426f95cd5bd,     //    0.645,  -0.76418
+    0x3fe49a449b9b0938,     0xbfe87c400fba2ebf,     //  0.64383,  -0.76517
+    0x3fe490a57bedbcdf,     0xbfe884555f72fa6b,     //  0.64266,  -0.76615
+    0x3fe48703306091fe,     0xbfe88c66e7481ba1,     //  0.64148,  -0.76714
+    0x3fe47d5dba6fde01,     0xbfe89474a5fb0a84,     //   0.6403,  -0.76812
+    0x3fe473b51b987347,     0xbfe89c7e9a4dd4ab,     //  0.63912,   -0.7691
+    0x3fe46a095557a0f1,     0xbfe8a484c3031d50,     //  0.63794,  -0.77008
+    0x3fe4605a692b32a2,     0xbfe8ac871ede1d88,     //  0.63676,  -0.77106
+    0x3fe456a858917046,     0xbfe8b485aca2a468,     //  0.63558,  -0.77204
+    0x3fe44cf325091dd6,     0xbfe8bc806b151741,     //  0.63439,  -0.77301
+    0x3fe4433ad0117b1d,     0xbfe8c47758fa71cb,     //  0.63321,  -0.77398
+    0x3fe4397f5b2a4380,     0xbfe8cc6a75184655,     //  0.63202,  -0.77495
+    0x3fe42fc0c7d3adbb,     0xbfe8d459be34bdfa,     //  0.63083,  -0.77592
+    0x3fe425ff178e6bb1,     0xbfe8dc45331698cc,     //  0.62964,  -0.77689
+    0x3fe41c3a4bdbaa26,     0xbfe8e42cd2852e0a,     //  0.62845,  -0.77785
+    0x3fe41272663d108c,     0xbfe8ec109b486c49,     //  0.62725,  -0.77882
+    0x3fe408a76834c0c0,     0xbfe8f3f08c28d9ac,     //  0.62606,  -0.77978
+    0x3fe3fed9534556d4,     0xbfe8fbcca3ef940d,     //  0.62486,  -0.78074
+    0x3fe3f50828f1e8d2,     0xbfe903a4e1665133,     //  0.62366,  -0.78169
+    0x3fe3eb33eabe0680,     0xbfe90b7943575efe,     //  0.62246,  -0.78265
+    0x3fe3e15c9a2db922,     0xbfe91349c88da398,     //  0.62126,   -0.7836
+    0x3fe3d78238c58343,     0xbfe91b166fd49da2,     //  0.62006,  -0.78456
+    0x3fe3cda4c80a6076,     0xbfe922df37f8646a,     //  0.61885,  -0.78551
+    0x3fe3c3c44981c517,     0xbfe92aa41fc5a815,     //  0.61765,  -0.78646
+    0x3fe3b9e0beb19e18,     0xbfe932652609b1cf,     //  0.61644,   -0.7874
+    0x3fe3affa292050b9,     0xbfe93a22499263fc,     //  0.61523,  -0.78835
+    0x3fe3a6108a54ba58,     0xbfe941db892e3a65,     //  0.61402,  -0.78929
+    0x3fe39c23e3d63029,     0xbfe94990e3ac4a6c,     //  0.61281,  -0.79023
+    0x3fe39234372c7f04,     0xbfe9514257dc4335,     //   0.6116,  -0.79117
+    0x3fe3884185dfeb22,     0xbfe958efe48e6dd7,     //  0.61038,  -0.79211
+    0x3fe37e4bd1792fe2,     0xbfe960998893ad8c,     //  0.60917,  -0.79304
+    0x3fe374531b817f8d,     0xbfe9683f42bd7fe1,     //  0.60795,  -0.79398
+    0x3fe36a576582831b,     0xbfe96fe111ddfce0,     //  0.60673,  -0.79491
+    0x3fe36058b10659f3,     0xbfe9777ef4c7d742,     //  0.60551,  -0.79584
+    0x3fe35656ff9799ae,     0xbfe97f18ea4e5c9e,     //  0.60429,  -0.79676
+    0x3fe34c5252c14de1,     0xbfe986aef1457594,     //  0.60307,  -0.79769
+    0x3fe3424aac0ef7d6,     0xbfe98e410881a600,     //  0.60184,  -0.79861
+    0x3fe338400d0c8e57,     0xbfe995cf2ed80d22,     //  0.60062,  -0.79954
+    0x3fe32e3277467d6b,     0xbfe99d59631e65d5,     //  0.59939,  -0.80046
+    0x3fe32421ec49a620,     0xbfe9a4dfa42b06b2,     //  0.59816,  -0.80138
+    0x3fe31a0e6da35e44,     0xbfe9ac61f0d4e247,     //  0.59693,  -0.80229
+    0x3fe30ff7fce17035,     0xbfe9b3e047f38741,     //   0.5957,  -0.80321
+    0x3fe305de9b921a94,     0xbfe9bb5aa85f2098,     //  0.59447,  -0.80412
+    0x3fe2fbc24b441015,     0xbfe9c2d110f075c3,     //  0.59323,  -0.80503
+    0x3fe2f1a30d86773a,     0xbfe9ca438080eadb,     //    0.592,  -0.80594
+    0x3fe2e780e3e8ea16,     0xbfe9d1b1f5ea80d6,     //  0.59076,  -0.80685
+    0x3fe2dd5bcffb7616,     0xbfe9d91c7007d5a6,     //  0.58952,  -0.80775
+    0x3fe2d333d34e9bb7,     0xbfe9e082edb42472,     //  0.58828,  -0.80866
+    0x3fe2c908ef734e57,     0xbfe9e7e56dcb45bd,     //  0.58704,  -0.80956
+    0x3fe2bedb25faf3ea,     0xbfe9ef43ef29af94,     //   0.5858,  -0.81046
+    0x3fe2b4aa787764c4,     0xbfe9f69e70ac75bc,     //  0.58455,  -0.81135
+    0x3fe2aa76e87aeb58,     0xbfe9fdf4f13149de,     //  0.58331,  -0.81225
+    0x3fe2a040779843fb,     0xbfea05476f967bb5,     //  0.58206,  -0.81314
+    0x3fe2960727629ca8,     0xbfea0c95eabaf937,     //  0.58081,  -0.81404
+    0x3fe28bcaf96d94ba,     0xbfea13e0617e4ec7,     //  0.57956,  -0.81493
+    0x3fe2818bef4d3cba,     0xbfea1b26d2c0a75e,     //  0.57831,  -0.81581
+    0x3fe2774a0a961612,     0xbfea22693d62ccb9,     //  0.57706,   -0.8167
+    0x3fe26d054cdd12df,     0xbfea29a7a0462782,     //  0.57581,  -0.81758
+    0x3fe262bdb7b795a2,     0xbfea30e1fa4cbf81,     //  0.57455,  -0.81847
+    0x3fe258734cbb7110,     0xbfea38184a593bc6,     //   0.5733,  -0.81935
+    0x3fe24e260d7ee7c9,     0xbfea3f4a8f4ee2d2,     //  0.57204,  -0.82023
+    0x3fe243d5fb98ac1f,     0xbfea4678c8119ac8,     //  0.57078,   -0.8211
+    0x3fe23983189fdfd5,     0xbfea4da2f385e997,     //  0.56952,  -0.82198
+    0x3fe22f2d662c13e1,     0xbfea54c91090f524,     //  0.56826,  -0.82285
+    0x3fe224d4e5d5482e,     0xbfea5beb1e188375,     //    0.567,  -0.82372
+    0x3fe21a799933eb58,     0xbfea63091b02fae2,     //  0.56573,  -0.82459
+    0x3fe2101b81e0da78,     0xbfea6a230637623b,     //  0.56447,  -0.82546
+    0x3fe205baa17560d6,     0xbfea7138de9d60f5,     //   0.5632,  -0.82632
+    0x3fe1fb56f98b37b8,     0xbfea784aa31d3f55,     //  0.56193,  -0.82718
+    0x3fe1f0f08bbc861b,     0xbfea7f58529fe69d,     //  0.56066,  -0.82805
+    0x3fe1e68759a3e074,     0xbfea8661ec0ee133,     //  0.55939,   -0.8289
+    0x3fe1dc1b64dc4872,     0xbfea8d676e545ad2,     //  0.55812,  -0.82976
+    0x3fe1d1acaf012cc2,     0xbfea9468d85b20ae,     //  0.55685,  -0.83062
+    0x3fe1c73b39ae68c8,     0xbfea9b66290ea1a3,     //  0.55557,  -0.83147
+    0x3fe1bcc706804467,     0xbfeaa25f5f5aee60,     //  0.55429,  -0.83232
+    0x3fe1b250171373be,     0xbfeaa9547a2cb98e,     //  0.55302,  -0.83317
+    0x3fe1a7d66d0516e6,     0xbfeab045787157ff,     //  0.55174,  -0.83402
+    0x3fe19d5a09f2b9b8,     0xbfeab7325916c0d4,     //  0.55046,  -0.83486
+    0x3fe192daef7a5386,     0xbfeabe1b1b0b8dac,     //  0.54918,  -0.83571
+    0x3fe188591f3a46e5,     0xbfeac4ffbd3efac8,     //  0.54789,  -0.83655
+    0x3fe17dd49ad16161,     0xbfeacbe03ea0e73b,     //  0.54661,  -0.83739
+    0x3fe1734d63dedb49,     0xbfead2bc9e21d511,     //  0.54532,  -0.83822
+    0x3fe168c37c025764,     0xbfead994dab2e979,     //  0.54404,  -0.83906
+    0x3fe15e36e4dbe2bc,     0xbfeae068f345ecef,     //  0.54275,  -0.83989
+    0x3fe153a7a00bf453,     0xbfeae738e6cd4b67,     //  0.54146,  -0.84073
+    0x3fe14915af336ceb,     0xbfeaee04b43c1474,     //  0.54017,  -0.84155
+    0x3fe13e8113f396c1,     0xbfeaf4cc5a85fb73,     //  0.53888,  -0.84238
+    0x3fe133e9cfee254e,     0xbfeafb8fd89f57b6,     //  0.53759,  -0.84321
+    0x3fe1294fe4c5350a,     0xbfeb024f2d7d24a9,     //  0.53629,  -0.84403
+    0x3fe11eb3541b4b22,     0xbfeb090a58150200,     //    0.535,  -0.84485
+    0x3fe114141f935545,     0xbfeb0fc1575d33db,     //   0.5337,  -0.84567
+    0x3fe1097248d0a956,     0xbfeb16742a4ca2f5,     //   0.5324,  -0.84649
+    0x3fe0fecdd1770537,     0xbfeb1d22cfdadcc6,     //   0.5311,  -0.84731
+    0x3fe0f426bb2a8e7d,     0xbfeb23cd470013b4,     //   0.5298,  -0.84812
+    0x3fe0e97d078fd23b,     0xbfeb2a738eb51f33,     //   0.5285,  -0.84893
+    0x3fe0ded0b84bc4b5,     0xbfeb3115a5f37bf4,     //   0.5272,  -0.84974
+    0x3fe0d421cf03c12b,     0xbfeb37b38bb54c09,     //   0.5259,  -0.85055
+    0x3fe0c9704d5d898f,     0xbfeb3e4d3ef55712,     //  0.52459,  -0.85136
+    0x3fe0bebc34ff4646,     0xbfeb44e2beaf0a61,     //  0.52328,  -0.85216
+    0x3fe0b405878f85ec,     0xbfeb4b7409de7925,     //  0.52198,  -0.85296
+    0x3fe0a94c46b53d0b,     0xbfeb52011f805c92,     //  0.52067,  -0.85376
+    0x3fe09e907417c5e1,     0xbfeb5889fe921405,     //  0.51936,  -0.85456
+    0x3fe093d2115ee018,     0xbfeb5f0ea611a532,     //  0.51804,  -0.85535
+    0x3fe089112032b08c,     0xbfeb658f14fdbc47,     //  0.51673,  -0.85615
+    0x3fe07e4da23bc102,     0xbfeb6c0b4a55ac17,     //  0.51542,  -0.85694
+    0x3fe073879922ffed,     0xbfeb728345196e3e,     //   0.5141,  -0.85773
+    0x3fe068bf0691c028,     0xbfeb78f70449a34b,     //  0.51279,  -0.85852
+    0x3fe05df3ec31b8b6,     0xbfeb7f6686e792ea,     //  0.51147,   -0.8593
+    0x3fe053264bad0483,     0xbfeb85d1cbf52c02,     //  0.51015,  -0.86009
+    0x3fe0485626ae221a,     0xbfeb8c38d27504e9,     //  0.50883,  -0.86087
+    0x3fe03d837edff370,     0xbfeb929b996a5b7f,     //  0.50751,  -0.86165
+    0x3fe032ae55edbd95,     0xbfeb98fa1fd9155e,     //  0.50619,  -0.86242
+    0x3fe027d6ad83287e,     0xbfeb9f5464c5bffc,     //  0.50486,   -0.8632
+    0x3fe01cfc874c3eb7,     0xbfeba5aa673590d2,     //  0.50354,  -0.86397
+    0x3fe0121fe4f56d2c,     0xbfebabfc262e6586,     //  0.50221,  -0.86474
+    0x3fe00740c82b82e0,     0xbfebb249a0b6c40d,     //  0.50089,  -0.86551
+    0x3fdff8be6537615e,     0xbfebb892d5d5dad5,     //  0.49956,  -0.86628
+    0x3fdfe2f64be7120f,     0xbfebbed7c49380ea,     //  0.49823,  -0.86705
+    0x3fdfcd2947c1ff57,     0xbfebc5186bf8361d,     //   0.4969,  -0.86781
+    0x3fdfb7575c24d2de,     0xbfebcb54cb0d2327,     //  0.49557,  -0.86857
+    0x3fdfa1808c6cf7e0,     0xbfebd18ce0dc19d6,     //  0.49423,  -0.86933
+    0x3fdf8ba4dbf89aba,     0xbfebd7c0ac6f952a,     //   0.4929,  -0.87009
+    0x3fdf75c44e26a852,     0xbfebddf02cd2b983,     //  0.49156,  -0.87084
+    0x3fdf5fdee656cda3,     0xbfebe41b611154c1,     //  0.49023,   -0.8716
+    0x3fdf49f4a7e97729,     0xbfebea424837de6d,     //  0.48889,  -0.87235
+    0x3fdf3405963fd068,     0xbfebf064e15377dd,     //  0.48755,  -0.87309
+    0x3fdf1e11b4bbc35c,     0xbfebf6832b71ec5b,     //  0.48621,  -0.87384
+    0x3fdf081906bff7fd,     0xbfebfc9d25a1b147,     //  0.48487,  -0.87459
+    0x3fdef21b8fafd3b5,     0xbfec02b2cef1e641,     //  0.48353,  -0.87533
+    0x3fdedc1952ef78d5,     0xbfec08c426725549,     //  0.48218,  -0.87607
+    0x3fdec61253e3c61b,     0xbfec0ed12b3372e9,     //  0.48084,  -0.87681
+    0x3fdeb00695f25620,     0xbfec14d9dc465e58,     //  0.47949,  -0.87755
+    0x3fde99f61c817eda,     0xbfec1ade38bce19b,     //  0.47815,  -0.87828
+    0x3fde83e0eaf85113,     0xbfec20de3fa971b0,     //   0.4768,  -0.87901
+    0x3fde6dc704be97e2,     0xbfec26d9f01f2eaf,     //  0.47545,  -0.87974
+    0x3fde57a86d3cd824,     0xbfec2cd14931e3f1,     //   0.4741,  -0.88047
+    0x3fde418527dc4ffa,     0xbfec32c449f60831,     //  0.47275,   -0.8812
+    0x3fde2b5d3806f63b,     0xbfec38b2f180bdb1,     //   0.4714,  -0.88192
+    0x3fde1530a12779f4,     0xbfec3e9d3ee7d262,     //  0.47004,  -0.88264
+    0x3fddfeff66a941de,     0xbfec44833141c004,     //  0.46869,  -0.88336
+    0x3fdde8c98bf86bd6,     0xbfec4a64c7a5ac4c,     //  0.46733,  -0.88408
+    0x3fddd28f1481cc58,     0xbfec5042012b6907,     //  0.46598,   -0.8848
+    0x3fddbc5003b2edf8,     0xbfec561adceb743e,     //  0.46462,  -0.88551
+    0x3fdda60c5cfa10d8,     0xbfec5bef59fef85a,     //  0.46326,  -0.88622
+    0x3fdd8fc423c62a25,     0xbfec61bf777fcc48,     //   0.4619,  -0.88693
+    0x3fdd79775b86e389,     0xbfec678b3488739b,     //  0.46054,  -0.88764
+    0x3fdd632607ac9aa9,     0xbfec6d5290341eb2,     //  0.45918,  -0.88835
+    0x3fdd4cd02ba8609c,     0xbfec7315899eaad7,     //  0.45781,  -0.88905
+    0x3fdd3675caebf962,     0xbfec78d41fe4a267,     //  0.45645,  -0.88975
+    0x3fdd2016e8e9db5b,     0xbfec7e8e52233cf3,     //  0.45508,  -0.89045
+    0x3fdd09b389152ec1,     0xbfec84441f785f61,     //  0.45372,  -0.89115
+    0x3fdcf34baee1cd21,     0xbfec89f587029c13,     //  0.45235,  -0.89184
+    0x3fdcdcdf5dc440ce,     0xbfec8fa287e13305,     //  0.45098,  -0.89253
+    0x3fdcc66e9931c45d,     0xbfec954b213411f5,     //  0.44961,  -0.89322
+    0x3fdcaff964a0421d,     0xbfec9aef521bd480,     //  0.44824,  -0.89391
+    0x3fdc997fc3865388,     0xbfeca08f19b9c449,     //  0.44687,   -0.8946
+    0x3fdc8301b95b40c2,     0xbfeca62a772fd919,     //   0.4455,  -0.89528
+    0x3fdc6c7f4997000a,     0xbfecabc169a0b901,     //  0.44412,  -0.89597
+    0x3fdc55f877b23537,     0xbfecb153f02fb87d,     //  0.44275,  -0.89665
+    0x3fdc3f6d47263129,     0xbfecb6e20a00da99,     //  0.44137,  -0.89732
+    0x3fdc28ddbb6cf145,     0xbfecbc6bb638d10b,     //  0.43999,    -0.898
+    0x3fdc1249d8011ee7,     0xbfecc1f0f3fcfc5c,     //  0.43862,  -0.89867
+    0x3fdbfbb1a05e0edc,     0xbfecc771c2736c09,     //  0.43724,  -0.89935
+    0x3fdbe51517ffc0d9,     0xbfecccee20c2de9f,     //  0.43586,  -0.90002
+    0x3fdbce744262deee,     0xbfecd2660e12c1e6,     //  0.43448,  -0.90068
+    0x3fdbb7cf2304bd01,     0xbfecd7d9898b32f6,     //  0.43309,  -0.90135
+    0x3fdba125bd63583e,     0xbfecdd489254fe65,     //  0.43171,  -0.90201
+    0x3fdb8a7814fd5693,     0xbfece2b32799a060,     //  0.43033,  -0.90267
+    0x3fdb73c62d520624,     0xbfece819488344ce,     //  0.42894,  -0.90333
+    0x3fdb5d1009e15cc0,     0xbfeced7af43cc773,     //  0.42756,  -0.90399
+    0x3fdb4655ae2bf757,     0xbfecf2d829f1b40e,     //  0.42617,  -0.90464
+    0x3fdb2f971db31972,     0xbfecf830e8ce467b,     //  0.42478,   -0.9053
+    0x3fdb18d45bf8aca6,     0xbfecfd852fff6ad4,     //  0.42339,  -0.90595
+    0x3fdb020d6c7f4009,     0xbfed02d4feb2bd92,     //    0.422,   -0.9066
+    0x3fdaeb4252ca07ab,     0xbfed082054168bac,     //  0.42061,  -0.90724
+    0x3fdad473125cdc08,     0xbfed0d672f59d2b9,     //  0.41922,  -0.90789
+    0x3fdabd9faebc3980,     0xbfed12a98fac410c,     //  0.41782,  -0.90853
+    0x3fdaa6c82b6d3fc9,     0xbfed17e7743e35dc,     //  0.41643,  -0.90917
+    0x3fda8fec8bf5b166,     0xbfed1d20dc40c15c,     //  0.41503,  -0.90981
+    0x3fda790cd3dbf31a,     0xbfed2255c6e5a4e1,     //  0.41364,  -0.91044
+    0x3fda622906a70b63,     0xbfed2786335f52fc,     //  0.41224,  -0.91107
+    0x3fda4b4127dea1e4,     0xbfed2cb220e0ef9f,     //  0.41084,  -0.91171
+    0x3fda34553b0afee5,     0xbfed31d98e9e503a,     //  0.40944,  -0.91234
+    0x3fda1d6543b50ac0,     0xbfed36fc7bcbfbdc,     //  0.40804,  -0.91296
+    0x3fda067145664d57,     0xbfed3c1ae79f2b4e,     //  0.40664,  -0.91359
+    0x3fd9ef7943a8ed8a,     0xbfed4134d14dc93a,     //  0.40524,  -0.91421
+    0x3fd9d87d4207b0ab,     0xbfed464a380e7242,     //  0.40384,  -0.91483
+    0x3fd9c17d440df9f2,     0xbfed4b5b1b187524,     //  0.40243,  -0.91545
+    0x3fd9aa794d47c9ee,     0xbfed506779a3d2d9,     //  0.40103,  -0.91606
+    0x3fd993716141bdfe,     0xbfed556f52e93eb1,     //  0.39962,  -0.91668
+    0x3fd97c6583890fc2,     0xbfed5a72a6221e73,     //  0.39822,  -0.91729
+    0x3fd96555b7ab948f,     0xbfed5f7172888a7f,     //  0.39681,   -0.9179
+    0x3fd94e420137bce3,     0xbfed646bb7574de5,     //   0.3954,  -0.91851
+    0x3fd9372a63bc93d7,     0xbfed696173c9e68b,     //  0.39399,  -0.91911
+    0x3fd9200ee2c9be97,     0xbfed6e52a71c8547,     //  0.39258,  -0.91972
+    0x3fd908ef81ef7bd1,     0xbfed733f508c0dff,     //  0.39117,  -0.92032
+    0x3fd8f1cc44bea329,     0xbfed78276f5617c6,     //  0.38976,  -0.92092
+    0x3fd8daa52ec8a4af,     0xbfed7d0b02b8ecf9,     //  0.38835,  -0.92151
+    0x3fd8c37a439f884f,     0xbfed81ea09f38b63,     //  0.38693,  -0.92211
+    0x3fd8ac4b86d5ed44,     0xbfed86c48445a450,     //  0.38552,   -0.9227
+    0x3fd89518fbff098e,     0xbfed8b9a70ef9cb4,     //   0.3841,  -0.92329
+    0x3fd87de2a6aea963,     0xbfed906bcf328d46,     //  0.38268,  -0.92388
+    0x3fd866a88a792ea0,     0xbfed95389e50429b,     //  0.38127,  -0.92447
+    0x3fd84f6aaaf3903f,     0xbfed9a00dd8b3d46,     //  0.37985,  -0.92505
+    0x3fd838290bb359c8,     0xbfed9ec48c26b1f3,     //  0.37843,  -0.92563
+    0x3fd820e3b04eaac4,     0xbfeda383a9668988,     //  0.37701,  -0.92621
+    0x3fd8099a9c5c362d,     0xbfeda83e348f613b,     //  0.37559,  -0.92679
+    0x3fd7f24dd37341e3,     0xbfedacf42ce68ab9,     //  0.37416,  -0.92736
+    0x3fd7dafd592ba621,     0xbfedb1a591b20c38,     //  0.37274,  -0.92794
+    0x3fd7c3a9311dcce7,     0xbfedb6526238a09b,     //  0.37132,  -0.92851
+    0x3fd7ac515ee2b172,     0xbfedbafa9dc1b78d,     //  0.36989,  -0.92907
+    0x3fd794f5e613dfae,     0xbfedbf9e4395759a,     //  0.36847,  -0.92964
+    0x3fd77d96ca4b73a6,     0xbfedc43d52fcb453,     //  0.36704,  -0.93021
+    0x3fd766340f2418f6,     0xbfedc8d7cb410260,     //  0.36561,  -0.93077
+    0x3fd74ecdb8390a3e,     0xbfedcd6dabaca3a5,     //  0.36418,  -0.93133
+    0x3fd73763c9261092,     0xbfedd1fef38a915a,     //  0.36276,  -0.93188
+    0x3fd71ff6458782ec,     0xbfedd68ba2267a25,     //  0.36133,  -0.93244
+    0x3fd7088530fa459e,     0xbfeddb13b6ccc23d,     //   0.3599,  -0.93299
+    0x3fd6f1108f1bc9c5,     0xbfeddf9730ca837b,     //  0.35846,  -0.93354
+    0x3fd6d998638a0cb5,     0xbfede4160f6d8d81,     //  0.35703,  -0.93409
+    0x3fd6c21cb1e39771,     0xbfede890520465ce,     //   0.3556,  -0.93464
+    0x3fd6aa9d7dc77e16,     0xbfeded05f7de47da,     //  0.35416,  -0.93518
+    0x3fd6931acad55f51,     0xbfedf177004b2534,     //  0.35273,  -0.93573
+    0x3fd67b949cad63ca,     0xbfedf5e36a9ba59c,     //  0.35129,  -0.93627
+    0x3fd6640af6f03d9e,     0xbfedfa4b3621271d,     //  0.34986,   -0.9368
+    0x3fd64c7ddd3f27c6,     0xbfedfeae622dbe2b,     //  0.34842,  -0.93734
+    0x3fd634ed533be58e,     0xbfee030cee1435b8,     //  0.34698,  -0.93787
+    0x3fd61d595c88c203,     0xbfee0766d9280f54,     //  0.34554,   -0.9384
+    0x3fd605c1fcc88f63,     0xbfee0bbc22bd8349,     //   0.3441,  -0.93893
+    0x3fd5ee27379ea693,     0xbfee100cca2980ac,     //  0.34266,  -0.93946
+    0x3fd5d68910aee686,     0xbfee1458cec1ad83,     //  0.34122,  -0.93998
+    0x3fd5bee78b9db3b6,     0xbfee18a02fdc66d9,     //  0.33978,  -0.94051
+    0x3fd5a742ac0ff78d,     0xbfee1ce2ecd0c0d8,     //  0.33833,  -0.94103
+    0x3fd58f9a75ab1fdd,     0xbfee212104f686e5,     //  0.33689,  -0.94154
+    0x3fd577eeec151e47,     0xbfee255a77a63bb8,     //  0.33545,  -0.94206
+    0x3fd5604012f467b4,     0xbfee298f4439197a,     //    0.334,  -0.94257
+    0x3fd5488dedeff3be,     0xbfee2dbf6a0911d9,     //  0.33255,  -0.94308
+    0x3fd530d880af3c24,     0xbfee31eae870ce25,     //  0.33111,  -0.94359
+    0x3fd5191fceda3c35,     0xbfee3611becbaf69,     //  0.32966,   -0.9441
+    0x3fd50163dc197047,     0xbfee3a33ec75ce85,     //  0.32821,   -0.9446
+    0x3fd4e9a4ac15d520,     0xbfee3e5170cbfc46,     //  0.32676,  -0.94511
+    0x3fd4d1e24278e76a,     0xbfee426a4b2bc17e,     //  0.32531,  -0.94561
+    0x3fd4ba1ca2eca31c,     0xbfee467e7af35f23,     //  0.32386,  -0.94611
+    0x3fd4a253d11b82f3,     0xbfee4a8dff81ce5e,     //  0.32241,   -0.9466
+    0x3fd48a87d0b07fd7,     0xbfee4e98d836c0af,     //  0.32096,  -0.94709
+    0x3fd472b8a5571054,     0xbfee529f04729ffc,     //   0.3195,  -0.94759
+    0x3fd45ae652bb2800,     0xbfee56a083968eb1,     //  0.31805,  -0.94807
+    0x3fd44310dc8936f0,     0xbfee5a9d550467d3,     //  0.31659,  -0.94856
+    0x3fd42b38466e2928,     0xbfee5e95781ebf1c,     //  0.31514,  -0.94905
+    0x3fd4135c94176602,     0xbfee6288ec48e112,     //  0.31368,  -0.94953
+    0x3fd3fb7dc932cfa4,     0xbfee6677b0e6d31e,     //  0.31222,  -0.95001
+    0x3fd3e39be96ec271,     0xbfee6a61c55d53a7,     //  0.31077,  -0.95049
+    0x3fd3cbb6f87a146e,     0xbfee6e472911da27,     //  0.30931,  -0.95096
+    0x3fd3b3cefa0414b7,     0xbfee7227db6a9744,     //  0.30785,  -0.95144
+    0x3fd39be3f1bc8aef,     0xbfee7603dbce74e9,     //  0.30639,  -0.95191
+    0x3fd383f5e353b6aa,     0xbfee79db29a5165a,     //  0.30493,  -0.95238
+    0x3fd36c04d27a4edf,     0xbfee7dadc456d850,     //  0.30347,  -0.95284
+    0x3fd35410c2e18152,     0xbfee817bab4cd10d,     //  0.30201,  -0.95331
+    0x3fd33c19b83af207,     0xbfee8544ddf0d075,     //  0.30054,  -0.95377
+    0x3fd3241fb638baaf,     0xbfee89095bad6025,     //  0.29908,  -0.95423
+    0x3fd30c22c08d6a13,     0xbfee8cc923edc388,     //  0.29762,  -0.95469
+    0x3fd2f422daec0386,     0xbfee9084361df7f3,     //  0.29615,  -0.95514
+    0x3fd2dc200907fe51,     0xbfee943a91aab4b4,     //  0.29469,  -0.95559
+    0x3fd2c41a4e954520,     0xbfee97ec36016b30,     //  0.29322,  -0.95605
+    0x3fd2ac11af483572,     0xbfee9b99229046f8,     //  0.29175,  -0.95649
+    0x3fd294062ed59f05,     0xbfee9f4156c62dda,     //  0.29028,  -0.95694
+    0x3fd27bf7d0f2c346,     0xbfeea2e4d212c000,     //  0.28882,  -0.95738
+    0x3fd263e6995554ba,     0xbfeea68393e65800,     //  0.28735,  -0.95783
+    0x3fd24bd28bb37672,     0xbfeeaa1d9bb20af3,     //  0.28588,  -0.95827
+    0x3fd233bbabc3bb72,     0xbfeeadb2e8e7a88e,     //  0.28441,   -0.9587
+    0x3fd21ba1fd3d2623,     0xbfeeb1437af9bb34,     //  0.28294,  -0.95914
+    0x3fd2038583d727bd,     0xbfeeb4cf515b8811,     //  0.28146,  -0.95957
+    0x3fd1eb6643499fbb,     0xbfeeb8566b810f2a,     //  0.27999,     -0.96
+    0x3fd1d3443f4cdb3d,     0xbfeebbd8c8df0b74,     //  0.27852,  -0.96043
+    0x3fd1bb1f7b999480,     0xbfeebf5668eaf2ef,     //  0.27705,  -0.96086
+    0x3fd1a2f7fbe8f243,     0xbfeec2cf4b1af6b2,     //  0.27557,  -0.96128
+    0x3fd18acdc3f4873a,     0xbfeec6436ee60309,     //   0.2741,   -0.9617
+    0x3fd172a0d7765177,     0xbfeec9b2d3c3bf84,     //  0.27262,  -0.96212
+    0x3fd15a713a28b9d9,     0xbfeecd1d792c8f10,     //  0.27115,  -0.96254
+    0x3fd1423eefc69378,     0xbfeed0835e999009,     //  0.26967,  -0.96295
+    0x3fd12a09fc0b1b12,     0xbfeed3e483849c51,     //  0.26819,  -0.96337
+    0x3fd111d262b1f677,     0xbfeed740e7684963,     //  0.26671,  -0.96378
+    0x3fd0f998277733f7,     0xbfeeda9889bfe86a,     //  0.26523,  -0.96418
+    0x3fd0e15b4e1749cd,     0xbfeeddeb6a078651,     //  0.26375,  -0.96459
+    0x3fd0c91bda4f158d,     0xbfeee13987bbebdc,     //  0.26227,  -0.96499
+    0x3fd0b0d9cfdbdb90,     0xbfeee482e25a9dbc,     //  0.26079,  -0.96539
+    0x3fd09895327b465e,     0xbfeee7c77961dc9e,     //  0.25931,  -0.96579
+    0x3fd0804e05eb661e,     0xbfeeeb074c50a544,     //  0.25783,  -0.96619
+    0x3fd068044deab002,     0xbfeeee425aa6b09a,     //  0.25635,  -0.96658
+    0x3fd04fb80e37fdae,     0xbfeef178a3e473c2,     //  0.25487,  -0.96698
+    0x3fd037694a928cac,     0xbfeef4aa278b2032,     //  0.25338,  -0.96737
+    0x3fd01f1806b9fdd2,     0xbfeef7d6e51ca3c0,     //   0.2519,  -0.96775
+    0x3fd006c4466e54af,     0xbfeefafedc1ba8b7,     //  0.25041,  -0.96814
+    0x3fcfdcdc1adfedf8,     0xbfeefe220c0b95ec,     //  0.24893,  -0.96852
+    0x3fcfac2abeff57ff,     0xbfef014074708ed3,     //  0.24744,   -0.9689
+    0x3fcf7b7480bd3801,     0xbfef045a14cf738c,     //  0.24596,  -0.96928
+    0x3fcf4ab9679c9f5c,     0xbfef076eecade0fa,     //  0.24447,  -0.96966
+    0x3fcf19f97b215f1a,     0xbfef0a7efb9230d7,     //  0.24298,  -0.97003
+    0x3fcee934c2d006c7,     0xbfef0d8a410379c5,     //  0.24149,   -0.9704
+    0x3fceb86b462de348,     0xbfef1090bc898f5f,     //     0.24,  -0.97077
+    0x3fce879d0cc0fdaf,     0xbfef13926dad024e,     //  0.23851,  -0.97114
+    0x3fce56ca1e101a1b,     0xbfef168f53f7205d,     //  0.23702,   -0.9715
+    0x3fce25f281a2b684,     0xbfef19876ef1f486,     //  0.23553,  -0.97187
+    0x3fcdf5163f01099a,     0xbfef1c7abe284708,     //  0.23404,  -0.97223
+    0x3fcdc4355db40195,     0xbfef1f6941259d7a,     //  0.23255,  -0.97258
+    0x3fcd934fe5454311,     0xbfef2252f7763ada,     //  0.23106,  -0.97294
+    0x3fcd6265dd3f27e3,     0xbfef2537e0a71f9f,     //  0.22957,  -0.97329
+    0x3fcd31774d2cbdee,     0xbfef2817fc4609ce,     //  0.22807,  -0.97364
+    0x3fcd00843c99c5f9,     0xbfef2af349e17507,     //  0.22658,  -0.97399
+    0x3fcccf8cb312b286,     0xbfef2dc9c9089a9d,     //  0.22508,  -0.97434
+    0x3fcc9e90b824a6a9,     0xbfef309b794b719f,     //  0.22359,  -0.97468
+    0x3fcc6d90535d74dc,     0xbfef33685a3aaef0,     //  0.22209,  -0.97503
+    0x3fcc3c8b8c4b9dd7,     0xbfef36306b67c556,     //   0.2206,  -0.97536
+    0x3fcc0b826a7e4f63,     0xbfef38f3ac64e589,     //   0.2191,   -0.9757
+    0x3fcbda74f5856330,     0xbfef3bb21cc4fe47,     //   0.2176,  -0.97604
+    0x3fcba96334f15dad,     0xbfef3e6bbc1bbc65,     //  0.21611,  -0.97637
+    0x3fcb784d30536cda,     0xbfef412089fd8adc,     //  0.21461,   -0.9767
+    0x3fcb4732ef3d6722,     0xbfef43d085ff92dd,     //  0.21311,  -0.97703
+    0x3fcb16147941ca2a,     0xbfef467bafb7bbe0,     //  0.21161,  -0.97735
+    0x3fcae4f1d5f3b9ab,     0xbfef492206bcabb4,     //  0.21011,  -0.97768
+    0x3fcab3cb0ce6fe44,     0xbfef4bc38aa5c694,     //  0.20861,    -0.978
+    0x3fca82a025b00451,     0xbfef4e603b0b2f2d,     //  0.20711,  -0.97832
+    0x3fca517127e3dabc,     0xbfef50f81785c6b9,     //  0.20561,  -0.97863
+    0x3fca203e1b1831da,     0xbfef538b1faf2d07,     //  0.20411,  -0.97895
+    0x3fc9ef0706e35a35,     0xbfef56195321c090,     //  0.20261,  -0.97926
+    0x3fc9bdcbf2dc4366,     0xbfef58a2b1789e84,     //   0.2011,  -0.97957
+    0x3fc98c8ce69a7aec,     0xbfef5b273a4fa2d9,     //   0.1996,  -0.97988
+    0x3fc95b49e9b62af9,     0xbfef5da6ed43685d,     //   0.1981,  -0.98018
+    0x3fc92a0303c8194f,     0xbfef6021c9f148c2,     //  0.19659,  -0.98048
+    0x3fc8f8b83c69a60a,     0xbfef6297cff75cb0,     //  0.19509,  -0.98079
+    0x3fc8c7699b34ca7e,     0xbfef6508fef47bd5,     //  0.19359,  -0.98108
+    0x3fc8961727c41804,     0xbfef677556883cee,     //  0.19208,  -0.98138
+    0x3fc864c0e9b2b6cf,     0xbfef69dcd652f5de,     //  0.19057,  -0.98167
+    0x3fc83366e89c64c5,     0xbfef6c3f7df5bbb7,     //  0.18907,  -0.98196
+    0x3fc802092c1d744b,     0xbfef6e9d4d1262ca,     //  0.18756,  -0.98225
+    0x3fc7d0a7bbd2cb1b,     0xbfef70f6434b7eb7,     //  0.18606,  -0.98254
+    0x3fc79f429f59e11d,     0xbfef734a60446279,     //  0.18455,  -0.98282
+    0x3fc76dd9de50bf31,     0xbfef7599a3a12077,     //  0.18304,  -0.98311
+    0x3fc73c6d8055fe0a,     0xbfef77e40d068a90,     //  0.18153,  -0.98339
+    0x3fc70afd8d08c4ff,     0xbfef7a299c1a322a,     //  0.18002,  -0.98366
+    0x3fc6d98a0c08c8da,     0xbfef7c6a50826840,     //  0.17851,  -0.98394
+    0x3fc6a81304f64ab2,     0xbfef7ea629e63d6e,     //    0.177,  -0.98421
+    0x3fc676987f7216b8,     0xbfef80dd27ed8204,     //  0.17549,  -0.98448
+    0x3fc6451a831d830d,     0xbfef830f4a40c60c,     //  0.17398,  -0.98475
+    0x3fc61399179a6e94,     0xbfef853c9089595e,     //  0.17247,  -0.98501
+    0x3fc5e214448b3fc6,     0xbfef8764fa714ba9,     //  0.17096,  -0.98528
+    0x3fc5b08c1192e381,     0xbfef898887a36c84,     //  0.16945,  -0.98554
+    0x3fc57f008654cbde,     0xbfef8ba737cb4b78,     //  0.16794,   -0.9858
+    0x3fc54d71aa74ef02,     0xbfef8dc10a95380d,     //  0.16643,  -0.98605
+    0x3fc51bdf8597c5f2,     0xbfef8fd5ffae41db,     //  0.16491,  -0.98631
+    0x3fc4ea4a1f624b61,     0xbfef91e616c43891,     //   0.1634,  -0.98656
+    0x3fc4b8b17f79fa88,     0xbfef93f14f85ac08,     //  0.16189,  -0.98681
+    0x3fc48715ad84cdf5,     0xbfef95f7a9a1ec47,     //  0.16037,  -0.98706
+    0x3fc45576b1293e5a,     0xbfef97f924c9099b,     //  0.15886,   -0.9873
+    0x3fc423d4920e4166,     0xbfef99f5c0abd496,     //  0.15734,  -0.98754
+    0x3fc3f22f57db4893,     0xbfef9bed7cfbde29,     //  0.15583,  -0.98778
+    0x3fc3c0870a383ff6,     0xbfef9de0596b77a3,     //  0.15431,  -0.98802
+    0x3fc38edbb0cd8d14,     0xbfef9fce55adb2c8,     //   0.1528,  -0.98826
+    0x3fc35d2d53440db2,     0xbfefa1b7717661d5,     //  0.15128,  -0.98849
+    0x3fc32b7bf94516a7,     0xbfefa39bac7a1791,     //  0.14976,  -0.98872
+    0x3fc2f9c7aa7a72af,     0xbfefa57b066e2754,     //  0.14825,  -0.98895
+    0x3fc2c8106e8e613a,     0xbfefa7557f08a517,     //  0.14673,  -0.98918
+    0x3fc296564d2b953e,     0xbfefa92b1600657c,     //  0.14521,   -0.9894
+    0x3fc264994dfd340a,     0xbfefaafbcb0cfddc,     //   0.1437,  -0.98962
+    0x3fc232d978aed413,     0xbfefacc79de6c44f,     //  0.14218,  -0.98984
+    0x3fc20116d4ec7bce,     0xbfefae8e8e46cfbb,     //  0.14066,  -0.99006
+    0x3fc1cf516a62a077,     0xbfefb0509be6f7db,     //  0.13914,  -0.99027
+    0x3fc19d8940be24e7,     0xbfefb20dc681d54d,     //  0.13762,  -0.99049
+    0x3fc16bbe5fac5865,     0xbfefb3c60dd2c199,     //   0.1361,   -0.9907
+    0x3fc139f0cedaf576,     0xbfefb5797195d741,     //  0.13458,   -0.9909
+    0x3fc1082095f820b0,     0xbfefb727f187f1c7,     //  0.13306,  -0.99111
+    0x3fc0d64dbcb26786,     0xbfefb8d18d66adb7,     //  0.13154,  -0.99131
+    0x3fc0a4784ab8bf1d,     0xbfefba7644f068b5,     //  0.13002,  -0.99151
+    0x3fc072a047ba831d,     0xbfefbc1617e44186,     //   0.1285,  -0.99171
+    0x3fc040c5bb67747e,     0xbfefbdb106021816,     //  0.12698,  -0.99191
+    0x3fc00ee8ad6fb85b,     0xbfefbf470f0a8d88,     //  0.12545,   -0.9921
+    0x3fbfba124b07ad85,     0xbfefc0d832bf043a,     //  0.12393,  -0.99229
+    0x3fbf564e56a9730e,     0xbfefc26470e19fd3,     //  0.12241,  -0.99248
+    0x3fbef2858d27561b,     0xbfefc3ebc935454c,     //  0.12089,  -0.99267
+    0x3fbe8eb7fde4aa3e,     0xbfefc56e3b7d9af6,     //  0.11937,  -0.99285
+    0x3fbe2ae5b8457f77,     0xbfefc6ebc77f0887,     //  0.11784,  -0.99303
+    0x3fbdc70ecbae9fc8,     0xbfefc8646cfeb721,     //  0.11632,  -0.99321
+    0x3fbd633347858ce4,     0xbfefc9d82bc2915e,     //  0.11479,  -0.99339
+    0x3fbcff533b307dc1,     0xbfefcb4703914354,     //  0.11327,  -0.99356
+    0x3fbc9b6eb6165c42,     0xbfefccb0f4323aa3,     //  0.11175,  -0.99374
+    0x3fbc3785c79ec2d5,     0xbfefce15fd6da67b,     //  0.11022,  -0.99391
+    0x3fbbd3987f31fa0e,     0xbfefcf761f0c77a3,     //   0.1087,  -0.99407
+    0x3fbb6fa6ec38f64c,     0xbfefd0d158d86087,     //  0.10717,  -0.99424
+    0x3fbb0bb11e1d5559,     0xbfefd227aa9bd53b,     //  0.10565,   -0.9944
+    0x3fbaa7b724495c04,     0xbfefd37914220b84,     //  0.10412,  -0.99456
+    0x3fba43b90e27f3c4,     0xbfefd4c59536fae4,     //   0.1026,  -0.99472
+    0x3fb9dfb6eb24a85c,     0xbfefd60d2da75c9e,     //  0.10107,  -0.99488
+    0x3fb97bb0caaba56f,     0xbfefd74fdd40abbf,     // 0.099544,  -0.99503
+    0x3fb917a6bc29b42c,     0xbfefd88da3d12526,     // 0.098017,  -0.99518
+    0x3fb8b398cf0c38e0,     0xbfefd9c68127c78c,     //  0.09649,  -0.99533
+    0x3fb84f8712c130a0,     0xbfefdafa7514538c,     // 0.094963,  -0.99548
+    0x3fb7eb7196b72ee4,     0xbfefdc297f674ba9,     // 0.093436,  -0.99563
+    0x3fb787586a5d5b21,     0xbfefdd539ff1f456,     // 0.091909,  -0.99577
+    0x3fb7233b9d236e71,     0xbfefde78d68653fd,     // 0.090381,  -0.99591
+    0x3fb6bf1b3e79b129,     0xbfefdf9922f73307,     // 0.088854,  -0.99604
+    0x3fb65af75dd0f87b,     0xbfefe0b485181be3,     // 0.087326,  -0.99618
+    0x3fb5f6d00a9aa419,     0xbfefe1cafcbd5b09,     // 0.085797,  -0.99631
+    0x3fb592a554489bc8,     0xbfefe2dc89bbff08,     // 0.084269,  -0.99644
+    0x3fb52e774a4d4d0a,     0xbfefe3e92be9d886,     //  0.08274,  -0.99657
+    0x3fb4ca45fc1ba8b6,     0xbfefe4f0e31d7a4a,     // 0.081211,   -0.9967
+    0x3fb4661179272096,     0xbfefe5f3af2e3940,     // 0.079682,  -0.99682
+    0x3fb401d9d0e3a507,     0xbfefe6f18ff42c84,     // 0.078153,  -0.99694
+    0x3fb39d9f12c5a299,     0xbfefe7ea85482d60,     // 0.076624,  -0.99706
+    0x3fb339614e41ffa5,     0xbfefe8de8f03d75c,     // 0.075094,  -0.99718
+    0x3fb2d52092ce19f6,     0xbfefe9cdad01883a,     // 0.073565,  -0.99729
+    0x3fb270dcefdfc45b,     0xbfefeab7df1c6005,     // 0.072035,   -0.9974
+    0x3fb20c9674ed444c,     0xbfefeb9d2530410f,     // 0.070505,  -0.99751
+    0x3fb1a84d316d4f8a,     0xbfefec7d7f19cffc,     // 0.068974,  -0.99762
+    0x3fb1440134d709b2,     0xbfefed58ecb673c4,     // 0.067444,  -0.99772
+    0x3fb0dfb28ea201e6,     0xbfefee2f6de455ba,     // 0.065913,  -0.99783
+    0x3fb07b614e463064,     0xbfefef0102826191,     // 0.064383,  -0.99793
+    0x3fb0170d833bf421,     0xbfefefcdaa704562,     // 0.062852,  -0.99802
+    0x3faf656e79f820e0,     0xbfeff095658e71ad,     // 0.061321,  -0.99812
+    0x3fae9cbd15ff5527,     0xbfeff15833be1965,     //  0.05979,  -0.99821
+    0x3fadd406f9808ec8,     0xbfeff21614e131ed,     // 0.058258,   -0.9983
+    0x3fad0b4c436f91d0,     0xbfeff2cf08da7321,     // 0.056727,  -0.99839
+    0x3fac428d12c0d7e3,     0xbfeff3830f8d575c,     // 0.055195,  -0.99848
+    0x3fab79c986698b78,     0xbfeff43228de1b77,     // 0.053664,  -0.99856
+    0x3faab101bd5f8317,     0xbfeff4dc54b1bed3,     // 0.052132,  -0.99864
+    0x3fa9e835d6993c87,     0xbfeff58192ee0358,     //   0.0506,  -0.99872
+    0x3fa91f65f10dd814,     0xbfeff621e3796d7e,     // 0.049068,   -0.9988
+    0x3fa856922bb513c1,     0xbfeff6bd463b444d,     // 0.047535,  -0.99887
+    0x3fa78dbaa5874685,     0xbfeff753bb1b9164,     // 0.046003,  -0.99894
+    0x3fa6c4df7d7d5b84,     0xbfeff7e5420320f9,     // 0.044471,  -0.99901
+    0x3fa5fc00d290cd43,     0xbfeff871dadb81df,     // 0.042938,  -0.99908
+    0x3fa5331ec3bba0eb,     0xbfeff8f9858f058b,     // 0.041406,  -0.99914
+    0x3fa46a396ff86179,     0xbfeff97c4208c014,     // 0.039873,   -0.9992
+    0x3fa3a150f6421afc,     0xbfeff9fa10348837,     //  0.03834,  -0.99926
+    0x3fa2d865759455cd,     0xbfeffa72effef75d,     // 0.036807,  -0.99932
+    0x3fa20f770ceb11c6,     0xbfeffae6e1556998,     // 0.035274,  -0.99938
+    0x3fa14685db42c17e,     0xbfeffb55e425fdae,     // 0.033741,  -0.99943
+    0x3fa07d91ff984580,     0xbfeffbbff85f9515,     // 0.032208,  -0.99948
+    0x3f9f693731d1cf01,     0xbfeffc251df1d3f8,     // 0.030675,  -0.99953
+    0x3f9dd7458c64ab39,     0xbfeffc8554cd213a,     // 0.029142,  -0.99958
+    0x3f9c454f4ce53b1c,     0xbfeffce09ce2a679,     // 0.027608,  -0.99962
+    0x3f9ab354b1504fca,     0xbfeffd36f624500c,     // 0.026075,  -0.99966
+    0x3f992155f7a3667e,     0xbfeffd886084cd0d,     // 0.024541,   -0.9997
+    0x3f978f535ddc9f03,     0xbfeffdd4dbf78f52,     // 0.023008,  -0.99974
+    0x3f95fd4d21fab226,     0xbfeffe1c6870cb77,     // 0.021474,  -0.99977
+    0x3f946b4381fce81c,     0xbfeffe5f05e578db,     //  0.01994,   -0.9998
+    0x3f92d936bbe30efd,     0xbfeffe9cb44b51a1,     // 0.018407,  -0.99983
+    0x3f9147270dad7132,     0xbfeffed57398d2b7,     // 0.016873,  -0.99986
+    0x3f8f6a296ab997ca,     0xbfefff0943c53bd1,     // 0.015339,  -0.99988
+    0x3f8c45ffe1e48ad9,     0xbfefff3824c88f6f,     // 0.013805,   -0.9999
+    0x3f8921d1fcdec784,     0xbfefff62169b92db,     // 0.012272,  -0.99992
+    0x3f85fda037ac05e0,     0xbfefff871937ce2f,     // 0.010738,  -0.99994
+    0x3f82d96b0e509703,     0xbfefffa72c978c4f,     //0.0092038,  -0.99996
+    0x3f7f6a65f9a2a3c5,     0xbfefffc250b5daef,     //0.0076698,  -0.99997
+    0x3f7921f0fe670071,     0xbfefffd8858e8a92,     //0.0061359,  -0.99998
+    0x3f72d97822f996bc,     0xbfefffe9cb1e2e8d,     //0.0046019,  -0.99999
+    0x3f6921f8becca4ba,     0xbfeffff621621d02,     // 0.003068,        -1
+    0x3f5921faaee6472d,     0xbfeffffd88586ee6,     // 0.001534,        -1
+};
+
+#endif
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
+/**
+  @par
+  Example code for Floating-point RFFT Twiddle factors Generation:
+  @par
+  <pre>TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' </pre>
+  @par
+  Real and Imag values are in interleaved fashion
+*/
+const float32_t twiddleCoef_rfft_32[32] = {
+    0.000000000f,  1.000000000f,
+    0.195090322f,  0.980785280f,
+    0.382683432f,  0.923879533f,
+    0.555570233f,  0.831469612f,
+    0.707106781f,  0.707106781f,
+    0.831469612f,  0.555570233f,
+    0.923879533f,  0.382683432f,
+    0.980785280f,  0.195090322f,
+    1.000000000f,  0.000000000f,
+    0.980785280f, -0.195090322f,
+    0.923879533f, -0.382683432f,
+    0.831469612f, -0.555570233f,
+    0.707106781f, -0.707106781f,
+    0.555570233f, -0.831469612f,
+    0.382683432f, -0.923879533f,
+    0.195090322f, -0.980785280f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
+const float32_t twiddleCoef_rfft_64[64] = {
+    0.000000000000000f,  1.000000000000000f,
+    0.098017140329561f,  0.995184726672197f,
+    0.195090322016128f,  0.980785280403230f,
+    0.290284677254462f,  0.956940335732209f,
+    0.382683432365090f,  0.923879532511287f,
+    0.471396736825998f,  0.881921264348355f,
+    0.555570233019602f,  0.831469612302545f,
+    0.634393284163645f,  0.773010453362737f,
+    0.707106781186547f,  0.707106781186548f,
+    0.773010453362737f,  0.634393284163645f,
+    0.831469612302545f,  0.555570233019602f,
+    0.881921264348355f,  0.471396736825998f,
+    0.923879532511287f,  0.382683432365090f,
+    0.956940335732209f,  0.290284677254462f,
+    0.980785280403230f,  0.195090322016128f,
+    0.995184726672197f,  0.098017140329561f,
+    1.000000000000000f,  0.000000000000000f,
+    0.995184726672197f, -0.098017140329561f,
+    0.980785280403230f, -0.195090322016128f,
+    0.956940335732209f, -0.290284677254462f,
+    0.923879532511287f, -0.382683432365090f,
+    0.881921264348355f, -0.471396736825998f,
+    0.831469612302545f, -0.555570233019602f,
+    0.773010453362737f, -0.634393284163645f,
+    0.707106781186548f, -0.707106781186547f,
+    0.634393284163645f, -0.773010453362737f,
+    0.555570233019602f, -0.831469612302545f,
+    0.471396736825998f, -0.881921264348355f,
+    0.382683432365090f, -0.923879532511287f,
+    0.290284677254462f, -0.956940335732209f,
+    0.195090322016129f, -0.980785280403230f,
+    0.098017140329561f, -0.995184726672197f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
+const float32_t twiddleCoef_rfft_128[128] = {
+    0.000000000f,  1.000000000f,
+    0.049067674f,  0.998795456f,
+    0.098017140f,  0.995184727f,
+    0.146730474f,  0.989176510f,
+    0.195090322f,  0.980785280f,
+    0.242980180f,  0.970031253f,
+    0.290284677f,  0.956940336f,
+    0.336889853f,  0.941544065f,
+    0.382683432f,  0.923879533f,
+    0.427555093f,  0.903989293f,
+    0.471396737f,  0.881921264f,
+    0.514102744f,  0.857728610f,
+    0.555570233f,  0.831469612f,
+    0.595699304f,  0.803207531f,
+    0.634393284f,  0.773010453f,
+    0.671558955f,  0.740951125f,
+    0.707106781f,  0.707106781f,
+    0.740951125f,  0.671558955f,
+    0.773010453f,  0.634393284f,
+    0.803207531f,  0.595699304f,
+    0.831469612f,  0.555570233f,
+    0.857728610f,  0.514102744f,
+    0.881921264f,  0.471396737f,
+    0.903989293f,  0.427555093f,
+    0.923879533f,  0.382683432f,
+    0.941544065f,  0.336889853f,
+    0.956940336f,  0.290284677f,
+    0.970031253f,  0.242980180f,
+    0.980785280f,  0.195090322f,
+    0.989176510f,  0.146730474f,
+    0.995184727f,  0.098017140f,
+    0.998795456f,  0.049067674f,
+    1.000000000f,  0.000000000f,
+    0.998795456f, -0.049067674f,
+    0.995184727f, -0.098017140f,
+    0.989176510f, -0.146730474f,
+    0.980785280f, -0.195090322f,
+    0.970031253f, -0.242980180f,
+    0.956940336f, -0.290284677f,
+    0.941544065f, -0.336889853f,
+    0.923879533f, -0.382683432f,
+    0.903989293f, -0.427555093f,
+    0.881921264f, -0.471396737f,
+    0.857728610f, -0.514102744f,
+    0.831469612f, -0.555570233f,
+    0.803207531f, -0.595699304f,
+    0.773010453f, -0.634393284f,
+    0.740951125f, -0.671558955f,
+    0.707106781f, -0.707106781f,
+    0.671558955f, -0.740951125f,
+    0.634393284f, -0.773010453f,
+    0.595699304f, -0.803207531f,
+    0.555570233f, -0.831469612f,
+    0.514102744f, -0.857728610f,
+    0.471396737f, -0.881921264f,
+    0.427555093f, -0.903989293f,
+    0.382683432f, -0.923879533f,
+    0.336889853f, -0.941544065f,
+    0.290284677f, -0.956940336f,
+    0.242980180f, -0.970031253f,
+    0.195090322f, -0.980785280f,
+    0.146730474f, -0.989176510f,
+    0.098017140f, -0.995184727f,
+    0.049067674f, -0.998795456f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
+const float32_t twiddleCoef_rfft_256[256] = {
+    0.000000000f,  1.000000000f,
+    0.024541229f,  0.999698819f,
+    0.049067674f,  0.998795456f,
+    0.073564564f,  0.997290457f,
+    0.098017140f,  0.995184727f,
+    0.122410675f,  0.992479535f,
+    0.146730474f,  0.989176510f,
+    0.170961889f,  0.985277642f,
+    0.195090322f,  0.980785280f,
+    0.219101240f,  0.975702130f,
+    0.242980180f,  0.970031253f,
+    0.266712757f,  0.963776066f,
+    0.290284677f,  0.956940336f,
+    0.313681740f,  0.949528181f,
+    0.336889853f,  0.941544065f,
+    0.359895037f,  0.932992799f,
+    0.382683432f,  0.923879533f,
+    0.405241314f,  0.914209756f,
+    0.427555093f,  0.903989293f,
+    0.449611330f,  0.893224301f,
+    0.471396737f,  0.881921264f,
+    0.492898192f,  0.870086991f,
+    0.514102744f,  0.857728610f,
+    0.534997620f,  0.844853565f,
+    0.555570233f,  0.831469612f,
+    0.575808191f,  0.817584813f,
+    0.595699304f,  0.803207531f,
+    0.615231591f,  0.788346428f,
+    0.634393284f,  0.773010453f,
+    0.653172843f,  0.757208847f,
+    0.671558955f,  0.740951125f,
+    0.689540545f,  0.724247083f,
+    0.707106781f,  0.707106781f,
+    0.724247083f,  0.689540545f,
+    0.740951125f,  0.671558955f,
+    0.757208847f,  0.653172843f,
+    0.773010453f,  0.634393284f,
+    0.788346428f,  0.615231591f,
+    0.803207531f,  0.595699304f,
+    0.817584813f,  0.575808191f,
+    0.831469612f,  0.555570233f,
+    0.844853565f,  0.534997620f,
+    0.857728610f,  0.514102744f,
+    0.870086991f,  0.492898192f,
+    0.881921264f,  0.471396737f,
+    0.893224301f,  0.449611330f,
+    0.903989293f,  0.427555093f,
+    0.914209756f,  0.405241314f,
+    0.923879533f,  0.382683432f,
+    0.932992799f,  0.359895037f,
+    0.941544065f,  0.336889853f,
+    0.949528181f,  0.313681740f,
+    0.956940336f,  0.290284677f,
+    0.963776066f,  0.266712757f,
+    0.970031253f,  0.242980180f,
+    0.975702130f,  0.219101240f,
+    0.980785280f,  0.195090322f,
+    0.985277642f,  0.170961889f,
+    0.989176510f,  0.146730474f,
+    0.992479535f,  0.122410675f,
+    0.995184727f,  0.098017140f,
+    0.997290457f,  0.073564564f,
+    0.998795456f,  0.049067674f,
+    0.999698819f,  0.024541229f,
+    1.000000000f,  0.000000000f,
+    0.999698819f, -0.024541229f,
+    0.998795456f, -0.049067674f,
+    0.997290457f, -0.073564564f,
+    0.995184727f, -0.098017140f,
+    0.992479535f, -0.122410675f,
+    0.989176510f, -0.146730474f,
+    0.985277642f, -0.170961889f,
+    0.980785280f, -0.195090322f,
+    0.975702130f, -0.219101240f,
+    0.970031253f, -0.242980180f,
+    0.963776066f, -0.266712757f,
+    0.956940336f, -0.290284677f,
+    0.949528181f, -0.313681740f,
+    0.941544065f, -0.336889853f,
+    0.932992799f, -0.359895037f,
+    0.923879533f, -0.382683432f,
+    0.914209756f, -0.405241314f,
+    0.903989293f, -0.427555093f,
+    0.893224301f, -0.449611330f,
+    0.881921264f, -0.471396737f,
+    0.870086991f, -0.492898192f,
+    0.857728610f, -0.514102744f,
+    0.844853565f, -0.534997620f,
+    0.831469612f, -0.555570233f,
+    0.817584813f, -0.575808191f,
+    0.803207531f, -0.595699304f,
+    0.788346428f, -0.615231591f,
+    0.773010453f, -0.634393284f,
+    0.757208847f, -0.653172843f,
+    0.740951125f, -0.671558955f,
+    0.724247083f, -0.689540545f,
+    0.707106781f, -0.707106781f,
+    0.689540545f, -0.724247083f,
+    0.671558955f, -0.740951125f,
+    0.653172843f, -0.757208847f,
+    0.634393284f, -0.773010453f,
+    0.615231591f, -0.788346428f,
+    0.595699304f, -0.803207531f,
+    0.575808191f, -0.817584813f,
+    0.555570233f, -0.831469612f,
+    0.534997620f, -0.844853565f,
+    0.514102744f, -0.857728610f,
+    0.492898192f, -0.870086991f,
+    0.471396737f, -0.881921264f,
+    0.449611330f, -0.893224301f,
+    0.427555093f, -0.903989293f,
+    0.405241314f, -0.914209756f,
+    0.382683432f, -0.923879533f,
+    0.359895037f, -0.932992799f,
+    0.336889853f, -0.941544065f,
+    0.313681740f, -0.949528181f,
+    0.290284677f, -0.956940336f,
+    0.266712757f, -0.963776066f,
+    0.242980180f, -0.970031253f,
+    0.219101240f, -0.975702130f,
+    0.195090322f, -0.980785280f,
+    0.170961889f, -0.985277642f,
+    0.146730474f, -0.989176510f,
+    0.122410675f, -0.992479535f,
+    0.098017140f, -0.995184727f,
+    0.073564564f, -0.997290457f,
+    0.049067674f, -0.998795456f,
+    0.024541229f, -0.999698819f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
+const float32_t twiddleCoef_rfft_512[512] = {
+    0.000000000f,  1.000000000f,
+    0.012271538f,  0.999924702f,
+    0.024541229f,  0.999698819f,
+    0.036807223f,  0.999322385f,
+    0.049067674f,  0.998795456f,
+    0.061320736f,  0.998118113f,
+    0.073564564f,  0.997290457f,
+    0.085797312f,  0.996312612f,
+    0.098017140f,  0.995184727f,
+    0.110222207f,  0.993906970f,
+    0.122410675f,  0.992479535f,
+    0.134580709f,  0.990902635f,
+    0.146730474f,  0.989176510f,
+    0.158858143f,  0.987301418f,
+    0.170961889f,  0.985277642f,
+    0.183039888f,  0.983105487f,
+    0.195090322f,  0.980785280f,
+    0.207111376f,  0.978317371f,
+    0.219101240f,  0.975702130f,
+    0.231058108f,  0.972939952f,
+    0.242980180f,  0.970031253f,
+    0.254865660f,  0.966976471f,
+    0.266712757f,  0.963776066f,
+    0.278519689f,  0.960430519f,
+    0.290284677f,  0.956940336f,
+    0.302005949f,  0.953306040f,
+    0.313681740f,  0.949528181f,
+    0.325310292f,  0.945607325f,
+    0.336889853f,  0.941544065f,
+    0.348418680f,  0.937339012f,
+    0.359895037f,  0.932992799f,
+    0.371317194f,  0.928506080f,
+    0.382683432f,  0.923879533f,
+    0.393992040f,  0.919113852f,
+    0.405241314f,  0.914209756f,
+    0.416429560f,  0.909167983f,
+    0.427555093f,  0.903989293f,
+    0.438616239f,  0.898674466f,
+    0.449611330f,  0.893224301f,
+    0.460538711f,  0.887639620f,
+    0.471396737f,  0.881921264f,
+    0.482183772f,  0.876070094f,
+    0.492898192f,  0.870086991f,
+    0.503538384f,  0.863972856f,
+    0.514102744f,  0.857728610f,
+    0.524589683f,  0.851355193f,
+    0.534997620f,  0.844853565f,
+    0.545324988f,  0.838224706f,
+    0.555570233f,  0.831469612f,
+    0.565731811f,  0.824589303f,
+    0.575808191f,  0.817584813f,
+    0.585797857f,  0.810457198f,
+    0.595699304f,  0.803207531f,
+    0.605511041f,  0.795836905f,
+    0.615231591f,  0.788346428f,
+    0.624859488f,  0.780737229f,
+    0.634393284f,  0.773010453f,
+    0.643831543f,  0.765167266f,
+    0.653172843f,  0.757208847f,
+    0.662415778f,  0.749136395f,
+    0.671558955f,  0.740951125f,
+    0.680600998f,  0.732654272f,
+    0.689540545f,  0.724247083f,
+    0.698376249f,  0.715730825f,
+    0.707106781f,  0.707106781f,
+    0.715730825f,  0.698376249f,
+    0.724247083f,  0.689540545f,
+    0.732654272f,  0.680600998f,
+    0.740951125f,  0.671558955f,
+    0.749136395f,  0.662415778f,
+    0.757208847f,  0.653172843f,
+    0.765167266f,  0.643831543f,
+    0.773010453f,  0.634393284f,
+    0.780737229f,  0.624859488f,
+    0.788346428f,  0.615231591f,
+    0.795836905f,  0.605511041f,
+    0.803207531f,  0.595699304f,
+    0.810457198f,  0.585797857f,
+    0.817584813f,  0.575808191f,
+    0.824589303f,  0.565731811f,
+    0.831469612f,  0.555570233f,
+    0.838224706f,  0.545324988f,
+    0.844853565f,  0.534997620f,
+    0.851355193f,  0.524589683f,
+    0.857728610f,  0.514102744f,
+    0.863972856f,  0.503538384f,
+    0.870086991f,  0.492898192f,
+    0.876070094f,  0.482183772f,
+    0.881921264f,  0.471396737f,
+    0.887639620f,  0.460538711f,
+    0.893224301f,  0.449611330f,
+    0.898674466f,  0.438616239f,
+    0.903989293f,  0.427555093f,
+    0.909167983f,  0.416429560f,
+    0.914209756f,  0.405241314f,
+    0.919113852f,  0.393992040f,
+    0.923879533f,  0.382683432f,
+    0.928506080f,  0.371317194f,
+    0.932992799f,  0.359895037f,
+    0.937339012f,  0.348418680f,
+    0.941544065f,  0.336889853f,
+    0.945607325f,  0.325310292f,
+    0.949528181f,  0.313681740f,
+    0.953306040f,  0.302005949f,
+    0.956940336f,  0.290284677f,
+    0.960430519f,  0.278519689f,
+    0.963776066f,  0.266712757f,
+    0.966976471f,  0.254865660f,
+    0.970031253f,  0.242980180f,
+    0.972939952f,  0.231058108f,
+    0.975702130f,  0.219101240f,
+    0.978317371f,  0.207111376f,
+    0.980785280f,  0.195090322f,
+    0.983105487f,  0.183039888f,
+    0.985277642f,  0.170961889f,
+    0.987301418f,  0.158858143f,
+    0.989176510f,  0.146730474f,
+    0.990902635f,  0.134580709f,
+    0.992479535f,  0.122410675f,
+    0.993906970f,  0.110222207f,
+    0.995184727f,  0.098017140f,
+    0.996312612f,  0.085797312f,
+    0.997290457f,  0.073564564f,
+    0.998118113f,  0.061320736f,
+    0.998795456f,  0.049067674f,
+    0.999322385f,  0.036807223f,
+    0.999698819f,  0.024541229f,
+    0.999924702f,  0.012271538f,
+    1.000000000f,  0.000000000f,
+    0.999924702f, -0.012271538f,
+    0.999698819f, -0.024541229f,
+    0.999322385f, -0.036807223f,
+    0.998795456f, -0.049067674f,
+    0.998118113f, -0.061320736f,
+    0.997290457f, -0.073564564f,
+    0.996312612f, -0.085797312f,
+    0.995184727f, -0.098017140f,
+    0.993906970f, -0.110222207f,
+    0.992479535f, -0.122410675f,
+    0.990902635f, -0.134580709f,
+    0.989176510f, -0.146730474f,
+    0.987301418f, -0.158858143f,
+    0.985277642f, -0.170961889f,
+    0.983105487f, -0.183039888f,
+    0.980785280f, -0.195090322f,
+    0.978317371f, -0.207111376f,
+    0.975702130f, -0.219101240f,
+    0.972939952f, -0.231058108f,
+    0.970031253f, -0.242980180f,
+    0.966976471f, -0.254865660f,
+    0.963776066f, -0.266712757f,
+    0.960430519f, -0.278519689f,
+    0.956940336f, -0.290284677f,
+    0.953306040f, -0.302005949f,
+    0.949528181f, -0.313681740f,
+    0.945607325f, -0.325310292f,
+    0.941544065f, -0.336889853f,
+    0.937339012f, -0.348418680f,
+    0.932992799f, -0.359895037f,
+    0.928506080f, -0.371317194f,
+    0.923879533f, -0.382683432f,
+    0.919113852f, -0.393992040f,
+    0.914209756f, -0.405241314f,
+    0.909167983f, -0.416429560f,
+    0.903989293f, -0.427555093f,
+    0.898674466f, -0.438616239f,
+    0.893224301f, -0.449611330f,
+    0.887639620f, -0.460538711f,
+    0.881921264f, -0.471396737f,
+    0.876070094f, -0.482183772f,
+    0.870086991f, -0.492898192f,
+    0.863972856f, -0.503538384f,
+    0.857728610f, -0.514102744f,
+    0.851355193f, -0.524589683f,
+    0.844853565f, -0.534997620f,
+    0.838224706f, -0.545324988f,
+    0.831469612f, -0.555570233f,
+    0.824589303f, -0.565731811f,
+    0.817584813f, -0.575808191f,
+    0.810457198f, -0.585797857f,
+    0.803207531f, -0.595699304f,
+    0.795836905f, -0.605511041f,
+    0.788346428f, -0.615231591f,
+    0.780737229f, -0.624859488f,
+    0.773010453f, -0.634393284f,
+    0.765167266f, -0.643831543f,
+    0.757208847f, -0.653172843f,
+    0.749136395f, -0.662415778f,
+    0.740951125f, -0.671558955f,
+    0.732654272f, -0.680600998f,
+    0.724247083f, -0.689540545f,
+    0.715730825f, -0.698376249f,
+    0.707106781f, -0.707106781f,
+    0.698376249f, -0.715730825f,
+    0.689540545f, -0.724247083f,
+    0.680600998f, -0.732654272f,
+    0.671558955f, -0.740951125f,
+    0.662415778f, -0.749136395f,
+    0.653172843f, -0.757208847f,
+    0.643831543f, -0.765167266f,
+    0.634393284f, -0.773010453f,
+    0.624859488f, -0.780737229f,
+    0.615231591f, -0.788346428f,
+    0.605511041f, -0.795836905f,
+    0.595699304f, -0.803207531f,
+    0.585797857f, -0.810457198f,
+    0.575808191f, -0.817584813f,
+    0.565731811f, -0.824589303f,
+    0.555570233f, -0.831469612f,
+    0.545324988f, -0.838224706f,
+    0.534997620f, -0.844853565f,
+    0.524589683f, -0.851355193f,
+    0.514102744f, -0.857728610f,
+    0.503538384f, -0.863972856f,
+    0.492898192f, -0.870086991f,
+    0.482183772f, -0.876070094f,
+    0.471396737f, -0.881921264f,
+    0.460538711f, -0.887639620f,
+    0.449611330f, -0.893224301f,
+    0.438616239f, -0.898674466f,
+    0.427555093f, -0.903989293f,
+    0.416429560f, -0.909167983f,
+    0.405241314f, -0.914209756f,
+    0.393992040f, -0.919113852f,
+    0.382683432f, -0.923879533f,
+    0.371317194f, -0.928506080f,
+    0.359895037f, -0.932992799f,
+    0.348418680f, -0.937339012f,
+    0.336889853f, -0.941544065f,
+    0.325310292f, -0.945607325f,
+    0.313681740f, -0.949528181f,
+    0.302005949f, -0.953306040f,
+    0.290284677f, -0.956940336f,
+    0.278519689f, -0.960430519f,
+    0.266712757f, -0.963776066f,
+    0.254865660f, -0.966976471f,
+    0.242980180f, -0.970031253f,
+    0.231058108f, -0.972939952f,
+    0.219101240f, -0.975702130f,
+    0.207111376f, -0.978317371f,
+    0.195090322f, -0.980785280f,
+    0.183039888f, -0.983105487f,
+    0.170961889f, -0.985277642f,
+    0.158858143f, -0.987301418f,
+    0.146730474f, -0.989176510f,
+    0.134580709f, -0.990902635f,
+    0.122410675f, -0.992479535f,
+    0.110222207f, -0.993906970f,
+    0.098017140f, -0.995184727f,
+    0.085797312f, -0.996312612f,
+    0.073564564f, -0.997290457f,
+    0.061320736f, -0.998118113f,
+    0.049067674f, -0.998795456f,
+    0.036807223f, -0.999322385f,
+    0.024541229f, -0.999698819f,
+    0.012271538f, -0.999924702f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
+const float32_t twiddleCoef_rfft_1024[1024] = {
+    0.000000000f,  1.000000000f,
+    0.006135885f,  0.999981175f,
+    0.012271538f,  0.999924702f,
+    0.018406730f,  0.999830582f,
+    0.024541229f,  0.999698819f,
+    0.030674803f,  0.999529418f,
+    0.036807223f,  0.999322385f,
+    0.042938257f,  0.999077728f,
+    0.049067674f,  0.998795456f,
+    0.055195244f,  0.998475581f,
+    0.061320736f,  0.998118113f,
+    0.067443920f,  0.997723067f,
+    0.073564564f,  0.997290457f,
+    0.079682438f,  0.996820299f,
+    0.085797312f,  0.996312612f,
+    0.091908956f,  0.995767414f,
+    0.098017140f,  0.995184727f,
+    0.104121634f,  0.994564571f,
+    0.110222207f,  0.993906970f,
+    0.116318631f,  0.993211949f,
+    0.122410675f,  0.992479535f,
+    0.128498111f,  0.991709754f,
+    0.134580709f,  0.990902635f,
+    0.140658239f,  0.990058210f,
+    0.146730474f,  0.989176510f,
+    0.152797185f,  0.988257568f,
+    0.158858143f,  0.987301418f,
+    0.164913120f,  0.986308097f,
+    0.170961889f,  0.985277642f,
+    0.177004220f,  0.984210092f,
+    0.183039888f,  0.983105487f,
+    0.189068664f,  0.981963869f,
+    0.195090322f,  0.980785280f,
+    0.201104635f,  0.979569766f,
+    0.207111376f,  0.978317371f,
+    0.213110320f,  0.977028143f,
+    0.219101240f,  0.975702130f,
+    0.225083911f,  0.974339383f,
+    0.231058108f,  0.972939952f,
+    0.237023606f,  0.971503891f,
+    0.242980180f,  0.970031253f,
+    0.248927606f,  0.968522094f,
+    0.254865660f,  0.966976471f,
+    0.260794118f,  0.965394442f,
+    0.266712757f,  0.963776066f,
+    0.272621355f,  0.962121404f,
+    0.278519689f,  0.960430519f,
+    0.284407537f,  0.958703475f,
+    0.290284677f,  0.956940336f,
+    0.296150888f,  0.955141168f,
+    0.302005949f,  0.953306040f,
+    0.307849640f,  0.951435021f,
+    0.313681740f,  0.949528181f,
+    0.319502031f,  0.947585591f,
+    0.325310292f,  0.945607325f,
+    0.331106306f,  0.943593458f,
+    0.336889853f,  0.941544065f,
+    0.342660717f,  0.939459224f,
+    0.348418680f,  0.937339012f,
+    0.354163525f,  0.935183510f,
+    0.359895037f,  0.932992799f,
+    0.365612998f,  0.930766961f,
+    0.371317194f,  0.928506080f,
+    0.377007410f,  0.926210242f,
+    0.382683432f,  0.923879533f,
+    0.388345047f,  0.921514039f,
+    0.393992040f,  0.919113852f,
+    0.399624200f,  0.916679060f,
+    0.405241314f,  0.914209756f,
+    0.410843171f,  0.911706032f,
+    0.416429560f,  0.909167983f,
+    0.422000271f,  0.906595705f,
+    0.427555093f,  0.903989293f,
+    0.433093819f,  0.901348847f,
+    0.438616239f,  0.898674466f,
+    0.444122145f,  0.895966250f,
+    0.449611330f,  0.893224301f,
+    0.455083587f,  0.890448723f,
+    0.460538711f,  0.887639620f,
+    0.465976496f,  0.884797098f,
+    0.471396737f,  0.881921264f,
+    0.476799230f,  0.879012226f,
+    0.482183772f,  0.876070094f,
+    0.487550160f,  0.873094978f,
+    0.492898192f,  0.870086991f,
+    0.498227667f,  0.867046246f,
+    0.503538384f,  0.863972856f,
+    0.508830143f,  0.860866939f,
+    0.514102744f,  0.857728610f,
+    0.519355990f,  0.854557988f,
+    0.524589683f,  0.851355193f,
+    0.529803625f,  0.848120345f,
+    0.534997620f,  0.844853565f,
+    0.540171473f,  0.841554977f,
+    0.545324988f,  0.838224706f,
+    0.550457973f,  0.834862875f,
+    0.555570233f,  0.831469612f,
+    0.560661576f,  0.828045045f,
+    0.565731811f,  0.824589303f,
+    0.570780746f,  0.821102515f,
+    0.575808191f,  0.817584813f,
+    0.580813958f,  0.814036330f,
+    0.585797857f,  0.810457198f,
+    0.590759702f,  0.806847554f,
+    0.595699304f,  0.803207531f,
+    0.600616479f,  0.799537269f,
+    0.605511041f,  0.795836905f,
+    0.610382806f,  0.792106577f,
+    0.615231591f,  0.788346428f,
+    0.620057212f,  0.784556597f,
+    0.624859488f,  0.780737229f,
+    0.629638239f,  0.776888466f,
+    0.634393284f,  0.773010453f,
+    0.639124445f,  0.769103338f,
+    0.643831543f,  0.765167266f,
+    0.648514401f,  0.761202385f,
+    0.653172843f,  0.757208847f,
+    0.657806693f,  0.753186799f,
+    0.662415778f,  0.749136395f,
+    0.666999922f,  0.745057785f,
+    0.671558955f,  0.740951125f,
+    0.676092704f,  0.736816569f,
+    0.680600998f,  0.732654272f,
+    0.685083668f,  0.728464390f,
+    0.689540545f,  0.724247083f,
+    0.693971461f,  0.720002508f,
+    0.698376249f,  0.715730825f,
+    0.702754744f,  0.711432196f,
+    0.707106781f,  0.707106781f,
+    0.711432196f,  0.702754744f,
+    0.715730825f,  0.698376249f,
+    0.720002508f,  0.693971461f,
+    0.724247083f,  0.689540545f,
+    0.728464390f,  0.685083668f,
+    0.732654272f,  0.680600998f,
+    0.736816569f,  0.676092704f,
+    0.740951125f,  0.671558955f,
+    0.745057785f,  0.666999922f,
+    0.749136395f,  0.662415778f,
+    0.753186799f,  0.657806693f,
+    0.757208847f,  0.653172843f,
+    0.761202385f,  0.648514401f,
+    0.765167266f,  0.643831543f,
+    0.769103338f,  0.639124445f,
+    0.773010453f,  0.634393284f,
+    0.776888466f,  0.629638239f,
+    0.780737229f,  0.624859488f,
+    0.784556597f,  0.620057212f,
+    0.788346428f,  0.615231591f,
+    0.792106577f,  0.610382806f,
+    0.795836905f,  0.605511041f,
+    0.799537269f,  0.600616479f,
+    0.803207531f,  0.595699304f,
+    0.806847554f,  0.590759702f,
+    0.810457198f,  0.585797857f,
+    0.814036330f,  0.580813958f,
+    0.817584813f,  0.575808191f,
+    0.821102515f,  0.570780746f,
+    0.824589303f,  0.565731811f,
+    0.828045045f,  0.560661576f,
+    0.831469612f,  0.555570233f,
+    0.834862875f,  0.550457973f,
+    0.838224706f,  0.545324988f,
+    0.841554977f,  0.540171473f,
+    0.844853565f,  0.534997620f,
+    0.848120345f,  0.529803625f,
+    0.851355193f,  0.524589683f,
+    0.854557988f,  0.519355990f,
+    0.857728610f,  0.514102744f,
+    0.860866939f,  0.508830143f,
+    0.863972856f,  0.503538384f,
+    0.867046246f,  0.498227667f,
+    0.870086991f,  0.492898192f,
+    0.873094978f,  0.487550160f,
+    0.876070094f,  0.482183772f,
+    0.879012226f,  0.476799230f,
+    0.881921264f,  0.471396737f,
+    0.884797098f,  0.465976496f,
+    0.887639620f,  0.460538711f,
+    0.890448723f,  0.455083587f,
+    0.893224301f,  0.449611330f,
+    0.895966250f,  0.444122145f,
+    0.898674466f,  0.438616239f,
+    0.901348847f,  0.433093819f,
+    0.903989293f,  0.427555093f,
+    0.906595705f,  0.422000271f,
+    0.909167983f,  0.416429560f,
+    0.911706032f,  0.410843171f,
+    0.914209756f,  0.405241314f,
+    0.916679060f,  0.399624200f,
+    0.919113852f,  0.393992040f,
+    0.921514039f,  0.388345047f,
+    0.923879533f,  0.382683432f,
+    0.926210242f,  0.377007410f,
+    0.928506080f,  0.371317194f,
+    0.930766961f,  0.365612998f,
+    0.932992799f,  0.359895037f,
+    0.935183510f,  0.354163525f,
+    0.937339012f,  0.348418680f,
+    0.939459224f,  0.342660717f,
+    0.941544065f,  0.336889853f,
+    0.943593458f,  0.331106306f,
+    0.945607325f,  0.325310292f,
+    0.947585591f,  0.319502031f,
+    0.949528181f,  0.313681740f,
+    0.951435021f,  0.307849640f,
+    0.953306040f,  0.302005949f,
+    0.955141168f,  0.296150888f,
+    0.956940336f,  0.290284677f,
+    0.958703475f,  0.284407537f,
+    0.960430519f,  0.278519689f,
+    0.962121404f,  0.272621355f,
+    0.963776066f,  0.266712757f,
+    0.965394442f,  0.260794118f,
+    0.966976471f,  0.254865660f,
+    0.968522094f,  0.248927606f,
+    0.970031253f,  0.242980180f,
+    0.971503891f,  0.237023606f,
+    0.972939952f,  0.231058108f,
+    0.974339383f,  0.225083911f,
+    0.975702130f,  0.219101240f,
+    0.977028143f,  0.213110320f,
+    0.978317371f,  0.207111376f,
+    0.979569766f,  0.201104635f,
+    0.980785280f,  0.195090322f,
+    0.981963869f,  0.189068664f,
+    0.983105487f,  0.183039888f,
+    0.984210092f,  0.177004220f,
+    0.985277642f,  0.170961889f,
+    0.986308097f,  0.164913120f,
+    0.987301418f,  0.158858143f,
+    0.988257568f,  0.152797185f,
+    0.989176510f,  0.146730474f,
+    0.990058210f,  0.140658239f,
+    0.990902635f,  0.134580709f,
+    0.991709754f,  0.128498111f,
+    0.992479535f,  0.122410675f,
+    0.993211949f,  0.116318631f,
+    0.993906970f,  0.110222207f,
+    0.994564571f,  0.104121634f,
+    0.995184727f,  0.098017140f,
+    0.995767414f,  0.091908956f,
+    0.996312612f,  0.085797312f,
+    0.996820299f,  0.079682438f,
+    0.997290457f,  0.073564564f,
+    0.997723067f,  0.067443920f,
+    0.998118113f,  0.061320736f,
+    0.998475581f,  0.055195244f,
+    0.998795456f,  0.049067674f,
+    0.999077728f,  0.042938257f,
+    0.999322385f,  0.036807223f,
+    0.999529418f,  0.030674803f,
+    0.999698819f,  0.024541229f,
+    0.999830582f,  0.018406730f,
+    0.999924702f,  0.012271538f,
+    0.999981175f,  0.006135885f,
+    1.000000000f,  0.000000000f,
+    0.999981175f, -0.006135885f,
+    0.999924702f, -0.012271538f,
+    0.999830582f, -0.018406730f,
+    0.999698819f, -0.024541229f,
+    0.999529418f, -0.030674803f,
+    0.999322385f, -0.036807223f,
+    0.999077728f, -0.042938257f,
+    0.998795456f, -0.049067674f,
+    0.998475581f, -0.055195244f,
+    0.998118113f, -0.061320736f,
+    0.997723067f, -0.067443920f,
+    0.997290457f, -0.073564564f,
+    0.996820299f, -0.079682438f,
+    0.996312612f, -0.085797312f,
+    0.995767414f, -0.091908956f,
+    0.995184727f, -0.098017140f,
+    0.994564571f, -0.104121634f,
+    0.993906970f, -0.110222207f,
+    0.993211949f, -0.116318631f,
+    0.992479535f, -0.122410675f,
+    0.991709754f, -0.128498111f,
+    0.990902635f, -0.134580709f,
+    0.990058210f, -0.140658239f,
+    0.989176510f, -0.146730474f,
+    0.988257568f, -0.152797185f,
+    0.987301418f, -0.158858143f,
+    0.986308097f, -0.164913120f,
+    0.985277642f, -0.170961889f,
+    0.984210092f, -0.177004220f,
+    0.983105487f, -0.183039888f,
+    0.981963869f, -0.189068664f,
+    0.980785280f, -0.195090322f,
+    0.979569766f, -0.201104635f,
+    0.978317371f, -0.207111376f,
+    0.977028143f, -0.213110320f,
+    0.975702130f, -0.219101240f,
+    0.974339383f, -0.225083911f,
+    0.972939952f, -0.231058108f,
+    0.971503891f, -0.237023606f,
+    0.970031253f, -0.242980180f,
+    0.968522094f, -0.248927606f,
+    0.966976471f, -0.254865660f,
+    0.965394442f, -0.260794118f,
+    0.963776066f, -0.266712757f,
+    0.962121404f, -0.272621355f,
+    0.960430519f, -0.278519689f,
+    0.958703475f, -0.284407537f,
+    0.956940336f, -0.290284677f,
+    0.955141168f, -0.296150888f,
+    0.953306040f, -0.302005949f,
+    0.951435021f, -0.307849640f,
+    0.949528181f, -0.313681740f,
+    0.947585591f, -0.319502031f,
+    0.945607325f, -0.325310292f,
+    0.943593458f, -0.331106306f,
+    0.941544065f, -0.336889853f,
+    0.939459224f, -0.342660717f,
+    0.937339012f, -0.348418680f,
+    0.935183510f, -0.354163525f,
+    0.932992799f, -0.359895037f,
+    0.930766961f, -0.365612998f,
+    0.928506080f, -0.371317194f,
+    0.926210242f, -0.377007410f,
+    0.923879533f, -0.382683432f,
+    0.921514039f, -0.388345047f,
+    0.919113852f, -0.393992040f,
+    0.916679060f, -0.399624200f,
+    0.914209756f, -0.405241314f,
+    0.911706032f, -0.410843171f,
+    0.909167983f, -0.416429560f,
+    0.906595705f, -0.422000271f,
+    0.903989293f, -0.427555093f,
+    0.901348847f, -0.433093819f,
+    0.898674466f, -0.438616239f,
+    0.895966250f, -0.444122145f,
+    0.893224301f, -0.449611330f,
+    0.890448723f, -0.455083587f,
+    0.887639620f, -0.460538711f,
+    0.884797098f, -0.465976496f,
+    0.881921264f, -0.471396737f,
+    0.879012226f, -0.476799230f,
+    0.876070094f, -0.482183772f,
+    0.873094978f, -0.487550160f,
+    0.870086991f, -0.492898192f,
+    0.867046246f, -0.498227667f,
+    0.863972856f, -0.503538384f,
+    0.860866939f, -0.508830143f,
+    0.857728610f, -0.514102744f,
+    0.854557988f, -0.519355990f,
+    0.851355193f, -0.524589683f,
+    0.848120345f, -0.529803625f,
+    0.844853565f, -0.534997620f,
+    0.841554977f, -0.540171473f,
+    0.838224706f, -0.545324988f,
+    0.834862875f, -0.550457973f,
+    0.831469612f, -0.555570233f,
+    0.828045045f, -0.560661576f,
+    0.824589303f, -0.565731811f,
+    0.821102515f, -0.570780746f,
+    0.817584813f, -0.575808191f,
+    0.814036330f, -0.580813958f,
+    0.810457198f, -0.585797857f,
+    0.806847554f, -0.590759702f,
+    0.803207531f, -0.595699304f,
+    0.799537269f, -0.600616479f,
+    0.795836905f, -0.605511041f,
+    0.792106577f, -0.610382806f,
+    0.788346428f, -0.615231591f,
+    0.784556597f, -0.620057212f,
+    0.780737229f, -0.624859488f,
+    0.776888466f, -0.629638239f,
+    0.773010453f, -0.634393284f,
+    0.769103338f, -0.639124445f,
+    0.765167266f, -0.643831543f,
+    0.761202385f, -0.648514401f,
+    0.757208847f, -0.653172843f,
+    0.753186799f, -0.657806693f,
+    0.749136395f, -0.662415778f,
+    0.745057785f, -0.666999922f,
+    0.740951125f, -0.671558955f,
+    0.736816569f, -0.676092704f,
+    0.732654272f, -0.680600998f,
+    0.728464390f, -0.685083668f,
+    0.724247083f, -0.689540545f,
+    0.720002508f, -0.693971461f,
+    0.715730825f, -0.698376249f,
+    0.711432196f, -0.702754744f,
+    0.707106781f, -0.707106781f,
+    0.702754744f, -0.711432196f,
+    0.698376249f, -0.715730825f,
+    0.693971461f, -0.720002508f,
+    0.689540545f, -0.724247083f,
+    0.685083668f, -0.728464390f,
+    0.680600998f, -0.732654272f,
+    0.676092704f, -0.736816569f,
+    0.671558955f, -0.740951125f,
+    0.666999922f, -0.745057785f,
+    0.662415778f, -0.749136395f,
+    0.657806693f, -0.753186799f,
+    0.653172843f, -0.757208847f,
+    0.648514401f, -0.761202385f,
+    0.643831543f, -0.765167266f,
+    0.639124445f, -0.769103338f,
+    0.634393284f, -0.773010453f,
+    0.629638239f, -0.776888466f,
+    0.624859488f, -0.780737229f,
+    0.620057212f, -0.784556597f,
+    0.615231591f, -0.788346428f,
+    0.610382806f, -0.792106577f,
+    0.605511041f, -0.795836905f,
+    0.600616479f, -0.799537269f,
+    0.595699304f, -0.803207531f,
+    0.590759702f, -0.806847554f,
+    0.585797857f, -0.810457198f,
+    0.580813958f, -0.814036330f,
+    0.575808191f, -0.817584813f,
+    0.570780746f, -0.821102515f,
+    0.565731811f, -0.824589303f,
+    0.560661576f, -0.828045045f,
+    0.555570233f, -0.831469612f,
+    0.550457973f, -0.834862875f,
+    0.545324988f, -0.838224706f,
+    0.540171473f, -0.841554977f,
+    0.534997620f, -0.844853565f,
+    0.529803625f, -0.848120345f,
+    0.524589683f, -0.851355193f,
+    0.519355990f, -0.854557988f,
+    0.514102744f, -0.857728610f,
+    0.508830143f, -0.860866939f,
+    0.503538384f, -0.863972856f,
+    0.498227667f, -0.867046246f,
+    0.492898192f, -0.870086991f,
+    0.487550160f, -0.873094978f,
+    0.482183772f, -0.876070094f,
+    0.476799230f, -0.879012226f,
+    0.471396737f, -0.881921264f,
+    0.465976496f, -0.884797098f,
+    0.460538711f, -0.887639620f,
+    0.455083587f, -0.890448723f,
+    0.449611330f, -0.893224301f,
+    0.444122145f, -0.895966250f,
+    0.438616239f, -0.898674466f,
+    0.433093819f, -0.901348847f,
+    0.427555093f, -0.903989293f,
+    0.422000271f, -0.906595705f,
+    0.416429560f, -0.909167983f,
+    0.410843171f, -0.911706032f,
+    0.405241314f, -0.914209756f,
+    0.399624200f, -0.916679060f,
+    0.393992040f, -0.919113852f,
+    0.388345047f, -0.921514039f,
+    0.382683432f, -0.923879533f,
+    0.377007410f, -0.926210242f,
+    0.371317194f, -0.928506080f,
+    0.365612998f, -0.930766961f,
+    0.359895037f, -0.932992799f,
+    0.354163525f, -0.935183510f,
+    0.348418680f, -0.937339012f,
+    0.342660717f, -0.939459224f,
+    0.336889853f, -0.941544065f,
+    0.331106306f, -0.943593458f,
+    0.325310292f, -0.945607325f,
+    0.319502031f, -0.947585591f,
+    0.313681740f, -0.949528181f,
+    0.307849640f, -0.951435021f,
+    0.302005949f, -0.953306040f,
+    0.296150888f, -0.955141168f,
+    0.290284677f, -0.956940336f,
+    0.284407537f, -0.958703475f,
+    0.278519689f, -0.960430519f,
+    0.272621355f, -0.962121404f,
+    0.266712757f, -0.963776066f,
+    0.260794118f, -0.965394442f,
+    0.254865660f, -0.966976471f,
+    0.248927606f, -0.968522094f,
+    0.242980180f, -0.970031253f,
+    0.237023606f, -0.971503891f,
+    0.231058108f, -0.972939952f,
+    0.225083911f, -0.974339383f,
+    0.219101240f, -0.975702130f,
+    0.213110320f, -0.977028143f,
+    0.207111376f, -0.978317371f,
+    0.201104635f, -0.979569766f,
+    0.195090322f, -0.980785280f,
+    0.189068664f, -0.981963869f,
+    0.183039888f, -0.983105487f,
+    0.177004220f, -0.984210092f,
+    0.170961889f, -0.985277642f,
+    0.164913120f, -0.986308097f,
+    0.158858143f, -0.987301418f,
+    0.152797185f, -0.988257568f,
+    0.146730474f, -0.989176510f,
+    0.140658239f, -0.990058210f,
+    0.134580709f, -0.990902635f,
+    0.128498111f, -0.991709754f,
+    0.122410675f, -0.992479535f,
+    0.116318631f, -0.993211949f,
+    0.110222207f, -0.993906970f,
+    0.104121634f, -0.994564571f,
+    0.098017140f, -0.995184727f,
+    0.091908956f, -0.995767414f,
+    0.085797312f, -0.996312612f,
+    0.079682438f, -0.996820299f,
+    0.073564564f, -0.997290457f,
+    0.067443920f, -0.997723067f,
+    0.061320736f, -0.998118113f,
+    0.055195244f, -0.998475581f,
+    0.049067674f, -0.998795456f,
+    0.042938257f, -0.999077728f,
+    0.036807223f, -0.999322385f,
+    0.030674803f, -0.999529418f,
+    0.024541229f, -0.999698819f,
+    0.018406730f, -0.999830582f,
+    0.012271538f, -0.999924702f,
+    0.006135885f, -0.999981175f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
+const float32_t twiddleCoef_rfft_2048[2048] = {
+    0.000000000f,  1.000000000f,
+    0.003067957f,  0.999995294f,
+    0.006135885f,  0.999981175f,
+    0.009203755f,  0.999957645f,
+    0.012271538f,  0.999924702f,
+    0.015339206f,  0.999882347f,
+    0.018406730f,  0.999830582f,
+    0.021474080f,  0.999769405f,
+    0.024541229f,  0.999698819f,
+    0.027608146f,  0.999618822f,
+    0.030674803f,  0.999529418f,
+    0.033741172f,  0.999430605f,
+    0.036807223f,  0.999322385f,
+    0.039872928f,  0.999204759f,
+    0.042938257f,  0.999077728f,
+    0.046003182f,  0.998941293f,
+    0.049067674f,  0.998795456f,
+    0.052131705f,  0.998640218f,
+    0.055195244f,  0.998475581f,
+    0.058258265f,  0.998301545f,
+    0.061320736f,  0.998118113f,
+    0.064382631f,  0.997925286f,
+    0.067443920f,  0.997723067f,
+    0.070504573f,  0.997511456f,
+    0.073564564f,  0.997290457f,
+    0.076623861f,  0.997060070f,
+    0.079682438f,  0.996820299f,
+    0.082740265f,  0.996571146f,
+    0.085797312f,  0.996312612f,
+    0.088853553f,  0.996044701f,
+    0.091908956f,  0.995767414f,
+    0.094963495f,  0.995480755f,
+    0.098017140f,  0.995184727f,
+    0.101069863f,  0.994879331f,
+    0.104121634f,  0.994564571f,
+    0.107172425f,  0.994240449f,
+    0.110222207f,  0.993906970f,
+    0.113270952f,  0.993564136f,
+    0.116318631f,  0.993211949f,
+    0.119365215f,  0.992850414f,
+    0.122410675f,  0.992479535f,
+    0.125454983f,  0.992099313f,
+    0.128498111f,  0.991709754f,
+    0.131540029f,  0.991310860f,
+    0.134580709f,  0.990902635f,
+    0.137620122f,  0.990485084f,
+    0.140658239f,  0.990058210f,
+    0.143695033f,  0.989622017f,
+    0.146730474f,  0.989176510f,
+    0.149764535f,  0.988721692f,
+    0.152797185f,  0.988257568f,
+    0.155828398f,  0.987784142f,
+    0.158858143f,  0.987301418f,
+    0.161886394f,  0.986809402f,
+    0.164913120f,  0.986308097f,
+    0.167938295f,  0.985797509f,
+    0.170961889f,  0.985277642f,
+    0.173983873f,  0.984748502f,
+    0.177004220f,  0.984210092f,
+    0.180022901f,  0.983662419f,
+    0.183039888f,  0.983105487f,
+    0.186055152f,  0.982539302f,
+    0.189068664f,  0.981963869f,
+    0.192080397f,  0.981379193f,
+    0.195090322f,  0.980785280f,
+    0.198098411f,  0.980182136f,
+    0.201104635f,  0.979569766f,
+    0.204108966f,  0.978948175f,
+    0.207111376f,  0.978317371f,
+    0.210111837f,  0.977677358f,
+    0.213110320f,  0.977028143f,
+    0.216106797f,  0.976369731f,
+    0.219101240f,  0.975702130f,
+    0.222093621f,  0.975025345f,
+    0.225083911f,  0.974339383f,
+    0.228072083f,  0.973644250f,
+    0.231058108f,  0.972939952f,
+    0.234041959f,  0.972226497f,
+    0.237023606f,  0.971503891f,
+    0.240003022f,  0.970772141f,
+    0.242980180f,  0.970031253f,
+    0.245955050f,  0.969281235f,
+    0.248927606f,  0.968522094f,
+    0.251897818f,  0.967753837f,
+    0.254865660f,  0.966976471f,
+    0.257831102f,  0.966190003f,
+    0.260794118f,  0.965394442f,
+    0.263754679f,  0.964589793f,
+    0.266712757f,  0.963776066f,
+    0.269668326f,  0.962953267f,
+    0.272621355f,  0.962121404f,
+    0.275571819f,  0.961280486f,
+    0.278519689f,  0.960430519f,
+    0.281464938f,  0.959571513f,
+    0.284407537f,  0.958703475f,
+    0.287347460f,  0.957826413f,
+    0.290284677f,  0.956940336f,
+    0.293219163f,  0.956045251f,
+    0.296150888f,  0.955141168f,
+    0.299079826f,  0.954228095f,
+    0.302005949f,  0.953306040f,
+    0.304929230f,  0.952375013f,
+    0.307849640f,  0.951435021f,
+    0.310767153f,  0.950486074f,
+    0.313681740f,  0.949528181f,
+    0.316593376f,  0.948561350f,
+    0.319502031f,  0.947585591f,
+    0.322407679f,  0.946600913f,
+    0.325310292f,  0.945607325f,
+    0.328209844f,  0.944604837f,
+    0.331106306f,  0.943593458f,
+    0.333999651f,  0.942573198f,
+    0.336889853f,  0.941544065f,
+    0.339776884f,  0.940506071f,
+    0.342660717f,  0.939459224f,
+    0.345541325f,  0.938403534f,
+    0.348418680f,  0.937339012f,
+    0.351292756f,  0.936265667f,
+    0.354163525f,  0.935183510f,
+    0.357030961f,  0.934092550f,
+    0.359895037f,  0.932992799f,
+    0.362755724f,  0.931884266f,
+    0.365612998f,  0.930766961f,
+    0.368466830f,  0.929640896f,
+    0.371317194f,  0.928506080f,
+    0.374164063f,  0.927362526f,
+    0.377007410f,  0.926210242f,
+    0.379847209f,  0.925049241f,
+    0.382683432f,  0.923879533f,
+    0.385516054f,  0.922701128f,
+    0.388345047f,  0.921514039f,
+    0.391170384f,  0.920318277f,
+    0.393992040f,  0.919113852f,
+    0.396809987f,  0.917900776f,
+    0.399624200f,  0.916679060f,
+    0.402434651f,  0.915448716f,
+    0.405241314f,  0.914209756f,
+    0.408044163f,  0.912962190f,
+    0.410843171f,  0.911706032f,
+    0.413638312f,  0.910441292f,
+    0.416429560f,  0.909167983f,
+    0.419216888f,  0.907886116f,
+    0.422000271f,  0.906595705f,
+    0.424779681f,  0.905296759f,
+    0.427555093f,  0.903989293f,
+    0.430326481f,  0.902673318f,
+    0.433093819f,  0.901348847f,
+    0.435857080f,  0.900015892f,
+    0.438616239f,  0.898674466f,
+    0.441371269f,  0.897324581f,
+    0.444122145f,  0.895966250f,
+    0.446868840f,  0.894599486f,
+    0.449611330f,  0.893224301f,
+    0.452349587f,  0.891840709f,
+    0.455083587f,  0.890448723f,
+    0.457813304f,  0.889048356f,
+    0.460538711f,  0.887639620f,
+    0.463259784f,  0.886222530f,
+    0.465976496f,  0.884797098f,
+    0.468688822f,  0.883363339f,
+    0.471396737f,  0.881921264f,
+    0.474100215f,  0.880470889f,
+    0.476799230f,  0.879012226f,
+    0.479493758f,  0.877545290f,
+    0.482183772f,  0.876070094f,
+    0.484869248f,  0.874586652f,
+    0.487550160f,  0.873094978f,
+    0.490226483f,  0.871595087f,
+    0.492898192f,  0.870086991f,
+    0.495565262f,  0.868570706f,
+    0.498227667f,  0.867046246f,
+    0.500885383f,  0.865513624f,
+    0.503538384f,  0.863972856f,
+    0.506186645f,  0.862423956f,
+    0.508830143f,  0.860866939f,
+    0.511468850f,  0.859301818f,
+    0.514102744f,  0.857728610f,
+    0.516731799f,  0.856147328f,
+    0.519355990f,  0.854557988f,
+    0.521975293f,  0.852960605f,
+    0.524589683f,  0.851355193f,
+    0.527199135f,  0.849741768f,
+    0.529803625f,  0.848120345f,
+    0.532403128f,  0.846490939f,
+    0.534997620f,  0.844853565f,
+    0.537587076f,  0.843208240f,
+    0.540171473f,  0.841554977f,
+    0.542750785f,  0.839893794f,
+    0.545324988f,  0.838224706f,
+    0.547894059f,  0.836547727f,
+    0.550457973f,  0.834862875f,
+    0.553016706f,  0.833170165f,
+    0.555570233f,  0.831469612f,
+    0.558118531f,  0.829761234f,
+    0.560661576f,  0.828045045f,
+    0.563199344f,  0.826321063f,
+    0.565731811f,  0.824589303f,
+    0.568258953f,  0.822849781f,
+    0.570780746f,  0.821102515f,
+    0.573297167f,  0.819347520f,
+    0.575808191f,  0.817584813f,
+    0.578313796f,  0.815814411f,
+    0.580813958f,  0.814036330f,
+    0.583308653f,  0.812250587f,
+    0.585797857f,  0.810457198f,
+    0.588281548f,  0.808656182f,
+    0.590759702f,  0.806847554f,
+    0.593232295f,  0.805031331f,
+    0.595699304f,  0.803207531f,
+    0.598160707f,  0.801376172f,
+    0.600616479f,  0.799537269f,
+    0.603066599f,  0.797690841f,
+    0.605511041f,  0.795836905f,
+    0.607949785f,  0.793975478f,
+    0.610382806f,  0.792106577f,
+    0.612810082f,  0.790230221f,
+    0.615231591f,  0.788346428f,
+    0.617647308f,  0.786455214f,
+    0.620057212f,  0.784556597f,
+    0.622461279f,  0.782650596f,
+    0.624859488f,  0.780737229f,
+    0.627251815f,  0.778816512f,
+    0.629638239f,  0.776888466f,
+    0.632018736f,  0.774953107f,
+    0.634393284f,  0.773010453f,
+    0.636761861f,  0.771060524f,
+    0.639124445f,  0.769103338f,
+    0.641481013f,  0.767138912f,
+    0.643831543f,  0.765167266f,
+    0.646176013f,  0.763188417f,
+    0.648514401f,  0.761202385f,
+    0.650846685f,  0.759209189f,
+    0.653172843f,  0.757208847f,
+    0.655492853f,  0.755201377f,
+    0.657806693f,  0.753186799f,
+    0.660114342f,  0.751165132f,
+    0.662415778f,  0.749136395f,
+    0.664710978f,  0.747100606f,
+    0.666999922f,  0.745057785f,
+    0.669282588f,  0.743007952f,
+    0.671558955f,  0.740951125f,
+    0.673829000f,  0.738887324f,
+    0.676092704f,  0.736816569f,
+    0.678350043f,  0.734738878f,
+    0.680600998f,  0.732654272f,
+    0.682845546f,  0.730562769f,
+    0.685083668f,  0.728464390f,
+    0.687315341f,  0.726359155f,
+    0.689540545f,  0.724247083f,
+    0.691759258f,  0.722128194f,
+    0.693971461f,  0.720002508f,
+    0.696177131f,  0.717870045f,
+    0.698376249f,  0.715730825f,
+    0.700568794f,  0.713584869f,
+    0.702754744f,  0.711432196f,
+    0.704934080f,  0.709272826f,
+    0.707106781f,  0.707106781f,
+    0.709272826f,  0.704934080f,
+    0.711432196f,  0.702754744f,
+    0.713584869f,  0.700568794f,
+    0.715730825f,  0.698376249f,
+    0.717870045f,  0.696177131f,
+    0.720002508f,  0.693971461f,
+    0.722128194f,  0.691759258f,
+    0.724247083f,  0.689540545f,
+    0.726359155f,  0.687315341f,
+    0.728464390f,  0.685083668f,
+    0.730562769f,  0.682845546f,
+    0.732654272f,  0.680600998f,
+    0.734738878f,  0.678350043f,
+    0.736816569f,  0.676092704f,
+    0.738887324f,  0.673829000f,
+    0.740951125f,  0.671558955f,
+    0.743007952f,  0.669282588f,
+    0.745057785f,  0.666999922f,
+    0.747100606f,  0.664710978f,
+    0.749136395f,  0.662415778f,
+    0.751165132f,  0.660114342f,
+    0.753186799f,  0.657806693f,
+    0.755201377f,  0.655492853f,
+    0.757208847f,  0.653172843f,
+    0.759209189f,  0.650846685f,
+    0.761202385f,  0.648514401f,
+    0.763188417f,  0.646176013f,
+    0.765167266f,  0.643831543f,
+    0.767138912f,  0.641481013f,
+    0.769103338f,  0.639124445f,
+    0.771060524f,  0.636761861f,
+    0.773010453f,  0.634393284f,
+    0.774953107f,  0.632018736f,
+    0.776888466f,  0.629638239f,
+    0.778816512f,  0.627251815f,
+    0.780737229f,  0.624859488f,
+    0.782650596f,  0.622461279f,
+    0.784556597f,  0.620057212f,
+    0.786455214f,  0.617647308f,
+    0.788346428f,  0.615231591f,
+    0.790230221f,  0.612810082f,
+    0.792106577f,  0.610382806f,
+    0.793975478f,  0.607949785f,
+    0.795836905f,  0.605511041f,
+    0.797690841f,  0.603066599f,
+    0.799537269f,  0.600616479f,
+    0.801376172f,  0.598160707f,
+    0.803207531f,  0.595699304f,
+    0.805031331f,  0.593232295f,
+    0.806847554f,  0.590759702f,
+    0.808656182f,  0.588281548f,
+    0.810457198f,  0.585797857f,
+    0.812250587f,  0.583308653f,
+    0.814036330f,  0.580813958f,
+    0.815814411f,  0.578313796f,
+    0.817584813f,  0.575808191f,
+    0.819347520f,  0.573297167f,
+    0.821102515f,  0.570780746f,
+    0.822849781f,  0.568258953f,
+    0.824589303f,  0.565731811f,
+    0.826321063f,  0.563199344f,
+    0.828045045f,  0.560661576f,
+    0.829761234f,  0.558118531f,
+    0.831469612f,  0.555570233f,
+    0.833170165f,  0.553016706f,
+    0.834862875f,  0.550457973f,
+    0.836547727f,  0.547894059f,
+    0.838224706f,  0.545324988f,
+    0.839893794f,  0.542750785f,
+    0.841554977f,  0.540171473f,
+    0.843208240f,  0.537587076f,
+    0.844853565f,  0.534997620f,
+    0.846490939f,  0.532403128f,
+    0.848120345f,  0.529803625f,
+    0.849741768f,  0.527199135f,
+    0.851355193f,  0.524589683f,
+    0.852960605f,  0.521975293f,
+    0.854557988f,  0.519355990f,
+    0.856147328f,  0.516731799f,
+    0.857728610f,  0.514102744f,
+    0.859301818f,  0.511468850f,
+    0.860866939f,  0.508830143f,
+    0.862423956f,  0.506186645f,
+    0.863972856f,  0.503538384f,
+    0.865513624f,  0.500885383f,
+    0.867046246f,  0.498227667f,
+    0.868570706f,  0.495565262f,
+    0.870086991f,  0.492898192f,
+    0.871595087f,  0.490226483f,
+    0.873094978f,  0.487550160f,
+    0.874586652f,  0.484869248f,
+    0.876070094f,  0.482183772f,
+    0.877545290f,  0.479493758f,
+    0.879012226f,  0.476799230f,
+    0.880470889f,  0.474100215f,
+    0.881921264f,  0.471396737f,
+    0.883363339f,  0.468688822f,
+    0.884797098f,  0.465976496f,
+    0.886222530f,  0.463259784f,
+    0.887639620f,  0.460538711f,
+    0.889048356f,  0.457813304f,
+    0.890448723f,  0.455083587f,
+    0.891840709f,  0.452349587f,
+    0.893224301f,  0.449611330f,
+    0.894599486f,  0.446868840f,
+    0.895966250f,  0.444122145f,
+    0.897324581f,  0.441371269f,
+    0.898674466f,  0.438616239f,
+    0.900015892f,  0.435857080f,
+    0.901348847f,  0.433093819f,
+    0.902673318f,  0.430326481f,
+    0.903989293f,  0.427555093f,
+    0.905296759f,  0.424779681f,
+    0.906595705f,  0.422000271f,
+    0.907886116f,  0.419216888f,
+    0.909167983f,  0.416429560f,
+    0.910441292f,  0.413638312f,
+    0.911706032f,  0.410843171f,
+    0.912962190f,  0.408044163f,
+    0.914209756f,  0.405241314f,
+    0.915448716f,  0.402434651f,
+    0.916679060f,  0.399624200f,
+    0.917900776f,  0.396809987f,
+    0.919113852f,  0.393992040f,
+    0.920318277f,  0.391170384f,
+    0.921514039f,  0.388345047f,
+    0.922701128f,  0.385516054f,
+    0.923879533f,  0.382683432f,
+    0.925049241f,  0.379847209f,
+    0.926210242f,  0.377007410f,
+    0.927362526f,  0.374164063f,
+    0.928506080f,  0.371317194f,
+    0.929640896f,  0.368466830f,
+    0.930766961f,  0.365612998f,
+    0.931884266f,  0.362755724f,
+    0.932992799f,  0.359895037f,
+    0.934092550f,  0.357030961f,
+    0.935183510f,  0.354163525f,
+    0.936265667f,  0.351292756f,
+    0.937339012f,  0.348418680f,
+    0.938403534f,  0.345541325f,
+    0.939459224f,  0.342660717f,
+    0.940506071f,  0.339776884f,
+    0.941544065f,  0.336889853f,
+    0.942573198f,  0.333999651f,
+    0.943593458f,  0.331106306f,
+    0.944604837f,  0.328209844f,
+    0.945607325f,  0.325310292f,
+    0.946600913f,  0.322407679f,
+    0.947585591f,  0.319502031f,
+    0.948561350f,  0.316593376f,
+    0.949528181f,  0.313681740f,
+    0.950486074f,  0.310767153f,
+    0.951435021f,  0.307849640f,
+    0.952375013f,  0.304929230f,
+    0.953306040f,  0.302005949f,
+    0.954228095f,  0.299079826f,
+    0.955141168f,  0.296150888f,
+    0.956045251f,  0.293219163f,
+    0.956940336f,  0.290284677f,
+    0.957826413f,  0.287347460f,
+    0.958703475f,  0.284407537f,
+    0.959571513f,  0.281464938f,
+    0.960430519f,  0.278519689f,
+    0.961280486f,  0.275571819f,
+    0.962121404f,  0.272621355f,
+    0.962953267f,  0.269668326f,
+    0.963776066f,  0.266712757f,
+    0.964589793f,  0.263754679f,
+    0.965394442f,  0.260794118f,
+    0.966190003f,  0.257831102f,
+    0.966976471f,  0.254865660f,
+    0.967753837f,  0.251897818f,
+    0.968522094f,  0.248927606f,
+    0.969281235f,  0.245955050f,
+    0.970031253f,  0.242980180f,
+    0.970772141f,  0.240003022f,
+    0.971503891f,  0.237023606f,
+    0.972226497f,  0.234041959f,
+    0.972939952f,  0.231058108f,
+    0.973644250f,  0.228072083f,
+    0.974339383f,  0.225083911f,
+    0.975025345f,  0.222093621f,
+    0.975702130f,  0.219101240f,
+    0.976369731f,  0.216106797f,
+    0.977028143f,  0.213110320f,
+    0.977677358f,  0.210111837f,
+    0.978317371f,  0.207111376f,
+    0.978948175f,  0.204108966f,
+    0.979569766f,  0.201104635f,
+    0.980182136f,  0.198098411f,
+    0.980785280f,  0.195090322f,
+    0.981379193f,  0.192080397f,
+    0.981963869f,  0.189068664f,
+    0.982539302f,  0.186055152f,
+    0.983105487f,  0.183039888f,
+    0.983662419f,  0.180022901f,
+    0.984210092f,  0.177004220f,
+    0.984748502f,  0.173983873f,
+    0.985277642f,  0.170961889f,
+    0.985797509f,  0.167938295f,
+    0.986308097f,  0.164913120f,
+    0.986809402f,  0.161886394f,
+    0.987301418f,  0.158858143f,
+    0.987784142f,  0.155828398f,
+    0.988257568f,  0.152797185f,
+    0.988721692f,  0.149764535f,
+    0.989176510f,  0.146730474f,
+    0.989622017f,  0.143695033f,
+    0.990058210f,  0.140658239f,
+    0.990485084f,  0.137620122f,
+    0.990902635f,  0.134580709f,
+    0.991310860f,  0.131540029f,
+    0.991709754f,  0.128498111f,
+    0.992099313f,  0.125454983f,
+    0.992479535f,  0.122410675f,
+    0.992850414f,  0.119365215f,
+    0.993211949f,  0.116318631f,
+    0.993564136f,  0.113270952f,
+    0.993906970f,  0.110222207f,
+    0.994240449f,  0.107172425f,
+    0.994564571f,  0.104121634f,
+    0.994879331f,  0.101069863f,
+    0.995184727f,  0.098017140f,
+    0.995480755f,  0.094963495f,
+    0.995767414f,  0.091908956f,
+    0.996044701f,  0.088853553f,
+    0.996312612f,  0.085797312f,
+    0.996571146f,  0.082740265f,
+    0.996820299f,  0.079682438f,
+    0.997060070f,  0.076623861f,
+    0.997290457f,  0.073564564f,
+    0.997511456f,  0.070504573f,
+    0.997723067f,  0.067443920f,
+    0.997925286f,  0.064382631f,
+    0.998118113f,  0.061320736f,
+    0.998301545f,  0.058258265f,
+    0.998475581f,  0.055195244f,
+    0.998640218f,  0.052131705f,
+    0.998795456f,  0.049067674f,
+    0.998941293f,  0.046003182f,
+    0.999077728f,  0.042938257f,
+    0.999204759f,  0.039872928f,
+    0.999322385f,  0.036807223f,
+    0.999430605f,  0.033741172f,
+    0.999529418f,  0.030674803f,
+    0.999618822f,  0.027608146f,
+    0.999698819f,  0.024541229f,
+    0.999769405f,  0.021474080f,
+    0.999830582f,  0.018406730f,
+    0.999882347f,  0.015339206f,
+    0.999924702f,  0.012271538f,
+    0.999957645f,  0.009203755f,
+    0.999981175f,  0.006135885f,
+    0.999995294f,  0.003067957f,
+    1.000000000f,  0.000000000f,
+    0.999995294f, -0.003067957f,
+    0.999981175f, -0.006135885f,
+    0.999957645f, -0.009203755f,
+    0.999924702f, -0.012271538f,
+    0.999882347f, -0.015339206f,
+    0.999830582f, -0.018406730f,
+    0.999769405f, -0.021474080f,
+    0.999698819f, -0.024541229f,
+    0.999618822f, -0.027608146f,
+    0.999529418f, -0.030674803f,
+    0.999430605f, -0.033741172f,
+    0.999322385f, -0.036807223f,
+    0.999204759f, -0.039872928f,
+    0.999077728f, -0.042938257f,
+    0.998941293f, -0.046003182f,
+    0.998795456f, -0.049067674f,
+    0.998640218f, -0.052131705f,
+    0.998475581f, -0.055195244f,
+    0.998301545f, -0.058258265f,
+    0.998118113f, -0.061320736f,
+    0.997925286f, -0.064382631f,
+    0.997723067f, -0.067443920f,
+    0.997511456f, -0.070504573f,
+    0.997290457f, -0.073564564f,
+    0.997060070f, -0.076623861f,
+    0.996820299f, -0.079682438f,
+    0.996571146f, -0.082740265f,
+    0.996312612f, -0.085797312f,
+    0.996044701f, -0.088853553f,
+    0.995767414f, -0.091908956f,
+    0.995480755f, -0.094963495f,
+    0.995184727f, -0.098017140f,
+    0.994879331f, -0.101069863f,
+    0.994564571f, -0.104121634f,
+    0.994240449f, -0.107172425f,
+    0.993906970f, -0.110222207f,
+    0.993564136f, -0.113270952f,
+    0.993211949f, -0.116318631f,
+    0.992850414f, -0.119365215f,
+    0.992479535f, -0.122410675f,
+    0.992099313f, -0.125454983f,
+    0.991709754f, -0.128498111f,
+    0.991310860f, -0.131540029f,
+    0.990902635f, -0.134580709f,
+    0.990485084f, -0.137620122f,
+    0.990058210f, -0.140658239f,
+    0.989622017f, -0.143695033f,
+    0.989176510f, -0.146730474f,
+    0.988721692f, -0.149764535f,
+    0.988257568f, -0.152797185f,
+    0.987784142f, -0.155828398f,
+    0.987301418f, -0.158858143f,
+    0.986809402f, -0.161886394f,
+    0.986308097f, -0.164913120f,
+    0.985797509f, -0.167938295f,
+    0.985277642f, -0.170961889f,
+    0.984748502f, -0.173983873f,
+    0.984210092f, -0.177004220f,
+    0.983662419f, -0.180022901f,
+    0.983105487f, -0.183039888f,
+    0.982539302f, -0.186055152f,
+    0.981963869f, -0.189068664f,
+    0.981379193f, -0.192080397f,
+    0.980785280f, -0.195090322f,
+    0.980182136f, -0.198098411f,
+    0.979569766f, -0.201104635f,
+    0.978948175f, -0.204108966f,
+    0.978317371f, -0.207111376f,
+    0.977677358f, -0.210111837f,
+    0.977028143f, -0.213110320f,
+    0.976369731f, -0.216106797f,
+    0.975702130f, -0.219101240f,
+    0.975025345f, -0.222093621f,
+    0.974339383f, -0.225083911f,
+    0.973644250f, -0.228072083f,
+    0.972939952f, -0.231058108f,
+    0.972226497f, -0.234041959f,
+    0.971503891f, -0.237023606f,
+    0.970772141f, -0.240003022f,
+    0.970031253f, -0.242980180f,
+    0.969281235f, -0.245955050f,
+    0.968522094f, -0.248927606f,
+    0.967753837f, -0.251897818f,
+    0.966976471f, -0.254865660f,
+    0.966190003f, -0.257831102f,
+    0.965394442f, -0.260794118f,
+    0.964589793f, -0.263754679f,
+    0.963776066f, -0.266712757f,
+    0.962953267f, -0.269668326f,
+    0.962121404f, -0.272621355f,
+    0.961280486f, -0.275571819f,
+    0.960430519f, -0.278519689f,
+    0.959571513f, -0.281464938f,
+    0.958703475f, -0.284407537f,
+    0.957826413f, -0.287347460f,
+    0.956940336f, -0.290284677f,
+    0.956045251f, -0.293219163f,
+    0.955141168f, -0.296150888f,
+    0.954228095f, -0.299079826f,
+    0.953306040f, -0.302005949f,
+    0.952375013f, -0.304929230f,
+    0.951435021f, -0.307849640f,
+    0.950486074f, -0.310767153f,
+    0.949528181f, -0.313681740f,
+    0.948561350f, -0.316593376f,
+    0.947585591f, -0.319502031f,
+    0.946600913f, -0.322407679f,
+    0.945607325f, -0.325310292f,
+    0.944604837f, -0.328209844f,
+    0.943593458f, -0.331106306f,
+    0.942573198f, -0.333999651f,
+    0.941544065f, -0.336889853f,
+    0.940506071f, -0.339776884f,
+    0.939459224f, -0.342660717f,
+    0.938403534f, -0.345541325f,
+    0.937339012f, -0.348418680f,
+    0.936265667f, -0.351292756f,
+    0.935183510f, -0.354163525f,
+    0.934092550f, -0.357030961f,
+    0.932992799f, -0.359895037f,
+    0.931884266f, -0.362755724f,
+    0.930766961f, -0.365612998f,
+    0.929640896f, -0.368466830f,
+    0.928506080f, -0.371317194f,
+    0.927362526f, -0.374164063f,
+    0.926210242f, -0.377007410f,
+    0.925049241f, -0.379847209f,
+    0.923879533f, -0.382683432f,
+    0.922701128f, -0.385516054f,
+    0.921514039f, -0.388345047f,
+    0.920318277f, -0.391170384f,
+    0.919113852f, -0.393992040f,
+    0.917900776f, -0.396809987f,
+    0.916679060f, -0.399624200f,
+    0.915448716f, -0.402434651f,
+    0.914209756f, -0.405241314f,
+    0.912962190f, -0.408044163f,
+    0.911706032f, -0.410843171f,
+    0.910441292f, -0.413638312f,
+    0.909167983f, -0.416429560f,
+    0.907886116f, -0.419216888f,
+    0.906595705f, -0.422000271f,
+    0.905296759f, -0.424779681f,
+    0.903989293f, -0.427555093f,
+    0.902673318f, -0.430326481f,
+    0.901348847f, -0.433093819f,
+    0.900015892f, -0.435857080f,
+    0.898674466f, -0.438616239f,
+    0.897324581f, -0.441371269f,
+    0.895966250f, -0.444122145f,
+    0.894599486f, -0.446868840f,
+    0.893224301f, -0.449611330f,
+    0.891840709f, -0.452349587f,
+    0.890448723f, -0.455083587f,
+    0.889048356f, -0.457813304f,
+    0.887639620f, -0.460538711f,
+    0.886222530f, -0.463259784f,
+    0.884797098f, -0.465976496f,
+    0.883363339f, -0.468688822f,
+    0.881921264f, -0.471396737f,
+    0.880470889f, -0.474100215f,
+    0.879012226f, -0.476799230f,
+    0.877545290f, -0.479493758f,
+    0.876070094f, -0.482183772f,
+    0.874586652f, -0.484869248f,
+    0.873094978f, -0.487550160f,
+    0.871595087f, -0.490226483f,
+    0.870086991f, -0.492898192f,
+    0.868570706f, -0.495565262f,
+    0.867046246f, -0.498227667f,
+    0.865513624f, -0.500885383f,
+    0.863972856f, -0.503538384f,
+    0.862423956f, -0.506186645f,
+    0.860866939f, -0.508830143f,
+    0.859301818f, -0.511468850f,
+    0.857728610f, -0.514102744f,
+    0.856147328f, -0.516731799f,
+    0.854557988f, -0.519355990f,
+    0.852960605f, -0.521975293f,
+    0.851355193f, -0.524589683f,
+    0.849741768f, -0.527199135f,
+    0.848120345f, -0.529803625f,
+    0.846490939f, -0.532403128f,
+    0.844853565f, -0.534997620f,
+    0.843208240f, -0.537587076f,
+    0.841554977f, -0.540171473f,
+    0.839893794f, -0.542750785f,
+    0.838224706f, -0.545324988f,
+    0.836547727f, -0.547894059f,
+    0.834862875f, -0.550457973f,
+    0.833170165f, -0.553016706f,
+    0.831469612f, -0.555570233f,
+    0.829761234f, -0.558118531f,
+    0.828045045f, -0.560661576f,
+    0.826321063f, -0.563199344f,
+    0.824589303f, -0.565731811f,
+    0.822849781f, -0.568258953f,
+    0.821102515f, -0.570780746f,
+    0.819347520f, -0.573297167f,
+    0.817584813f, -0.575808191f,
+    0.815814411f, -0.578313796f,
+    0.814036330f, -0.580813958f,
+    0.812250587f, -0.583308653f,
+    0.810457198f, -0.585797857f,
+    0.808656182f, -0.588281548f,
+    0.806847554f, -0.590759702f,
+    0.805031331f, -0.593232295f,
+    0.803207531f, -0.595699304f,
+    0.801376172f, -0.598160707f,
+    0.799537269f, -0.600616479f,
+    0.797690841f, -0.603066599f,
+    0.795836905f, -0.605511041f,
+    0.793975478f, -0.607949785f,
+    0.792106577f, -0.610382806f,
+    0.790230221f, -0.612810082f,
+    0.788346428f, -0.615231591f,
+    0.786455214f, -0.617647308f,
+    0.784556597f, -0.620057212f,
+    0.782650596f, -0.622461279f,
+    0.780737229f, -0.624859488f,
+    0.778816512f, -0.627251815f,
+    0.776888466f, -0.629638239f,
+    0.774953107f, -0.632018736f,
+    0.773010453f, -0.634393284f,
+    0.771060524f, -0.636761861f,
+    0.769103338f, -0.639124445f,
+    0.767138912f, -0.641481013f,
+    0.765167266f, -0.643831543f,
+    0.763188417f, -0.646176013f,
+    0.761202385f, -0.648514401f,
+    0.759209189f, -0.650846685f,
+    0.757208847f, -0.653172843f,
+    0.755201377f, -0.655492853f,
+    0.753186799f, -0.657806693f,
+    0.751165132f, -0.660114342f,
+    0.749136395f, -0.662415778f,
+    0.747100606f, -0.664710978f,
+    0.745057785f, -0.666999922f,
+    0.743007952f, -0.669282588f,
+    0.740951125f, -0.671558955f,
+    0.738887324f, -0.673829000f,
+    0.736816569f, -0.676092704f,
+    0.734738878f, -0.678350043f,
+    0.732654272f, -0.680600998f,
+    0.730562769f, -0.682845546f,
+    0.728464390f, -0.685083668f,
+    0.726359155f, -0.687315341f,
+    0.724247083f, -0.689540545f,
+    0.722128194f, -0.691759258f,
+    0.720002508f, -0.693971461f,
+    0.717870045f, -0.696177131f,
+    0.715730825f, -0.698376249f,
+    0.713584869f, -0.700568794f,
+    0.711432196f, -0.702754744f,
+    0.709272826f, -0.704934080f,
+    0.707106781f, -0.707106781f,
+    0.704934080f, -0.709272826f,
+    0.702754744f, -0.711432196f,
+    0.700568794f, -0.713584869f,
+    0.698376249f, -0.715730825f,
+    0.696177131f, -0.717870045f,
+    0.693971461f, -0.720002508f,
+    0.691759258f, -0.722128194f,
+    0.689540545f, -0.724247083f,
+    0.687315341f, -0.726359155f,
+    0.685083668f, -0.728464390f,
+    0.682845546f, -0.730562769f,
+    0.680600998f, -0.732654272f,
+    0.678350043f, -0.734738878f,
+    0.676092704f, -0.736816569f,
+    0.673829000f, -0.738887324f,
+    0.671558955f, -0.740951125f,
+    0.669282588f, -0.743007952f,
+    0.666999922f, -0.745057785f,
+    0.664710978f, -0.747100606f,
+    0.662415778f, -0.749136395f,
+    0.660114342f, -0.751165132f,
+    0.657806693f, -0.753186799f,
+    0.655492853f, -0.755201377f,
+    0.653172843f, -0.757208847f,
+    0.650846685f, -0.759209189f,
+    0.648514401f, -0.761202385f,
+    0.646176013f, -0.763188417f,
+    0.643831543f, -0.765167266f,
+    0.641481013f, -0.767138912f,
+    0.639124445f, -0.769103338f,
+    0.636761861f, -0.771060524f,
+    0.634393284f, -0.773010453f,
+    0.632018736f, -0.774953107f,
+    0.629638239f, -0.776888466f,
+    0.627251815f, -0.778816512f,
+    0.624859488f, -0.780737229f,
+    0.622461279f, -0.782650596f,
+    0.620057212f, -0.784556597f,
+    0.617647308f, -0.786455214f,
+    0.615231591f, -0.788346428f,
+    0.612810082f, -0.790230221f,
+    0.610382806f, -0.792106577f,
+    0.607949785f, -0.793975478f,
+    0.605511041f, -0.795836905f,
+    0.603066599f, -0.797690841f,
+    0.600616479f, -0.799537269f,
+    0.598160707f, -0.801376172f,
+    0.595699304f, -0.803207531f,
+    0.593232295f, -0.805031331f,
+    0.590759702f, -0.806847554f,
+    0.588281548f, -0.808656182f,
+    0.585797857f, -0.810457198f,
+    0.583308653f, -0.812250587f,
+    0.580813958f, -0.814036330f,
+    0.578313796f, -0.815814411f,
+    0.575808191f, -0.817584813f,
+    0.573297167f, -0.819347520f,
+    0.570780746f, -0.821102515f,
+    0.568258953f, -0.822849781f,
+    0.565731811f, -0.824589303f,
+    0.563199344f, -0.826321063f,
+    0.560661576f, -0.828045045f,
+    0.558118531f, -0.829761234f,
+    0.555570233f, -0.831469612f,
+    0.553016706f, -0.833170165f,
+    0.550457973f, -0.834862875f,
+    0.547894059f, -0.836547727f,
+    0.545324988f, -0.838224706f,
+    0.542750785f, -0.839893794f,
+    0.540171473f, -0.841554977f,
+    0.537587076f, -0.843208240f,
+    0.534997620f, -0.844853565f,
+    0.532403128f, -0.846490939f,
+    0.529803625f, -0.848120345f,
+    0.527199135f, -0.849741768f,
+    0.524589683f, -0.851355193f,
+    0.521975293f, -0.852960605f,
+    0.519355990f, -0.854557988f,
+    0.516731799f, -0.856147328f,
+    0.514102744f, -0.857728610f,
+    0.511468850f, -0.859301818f,
+    0.508830143f, -0.860866939f,
+    0.506186645f, -0.862423956f,
+    0.503538384f, -0.863972856f,
+    0.500885383f, -0.865513624f,
+    0.498227667f, -0.867046246f,
+    0.495565262f, -0.868570706f,
+    0.492898192f, -0.870086991f,
+    0.490226483f, -0.871595087f,
+    0.487550160f, -0.873094978f,
+    0.484869248f, -0.874586652f,
+    0.482183772f, -0.876070094f,
+    0.479493758f, -0.877545290f,
+    0.476799230f, -0.879012226f,
+    0.474100215f, -0.880470889f,
+    0.471396737f, -0.881921264f,
+    0.468688822f, -0.883363339f,
+    0.465976496f, -0.884797098f,
+    0.463259784f, -0.886222530f,
+    0.460538711f, -0.887639620f,
+    0.457813304f, -0.889048356f,
+    0.455083587f, -0.890448723f,
+    0.452349587f, -0.891840709f,
+    0.449611330f, -0.893224301f,
+    0.446868840f, -0.894599486f,
+    0.444122145f, -0.895966250f,
+    0.441371269f, -0.897324581f,
+    0.438616239f, -0.898674466f,
+    0.435857080f, -0.900015892f,
+    0.433093819f, -0.901348847f,
+    0.430326481f, -0.902673318f,
+    0.427555093f, -0.903989293f,
+    0.424779681f, -0.905296759f,
+    0.422000271f, -0.906595705f,
+    0.419216888f, -0.907886116f,
+    0.416429560f, -0.909167983f,
+    0.413638312f, -0.910441292f,
+    0.410843171f, -0.911706032f,
+    0.408044163f, -0.912962190f,
+    0.405241314f, -0.914209756f,
+    0.402434651f, -0.915448716f,
+    0.399624200f, -0.916679060f,
+    0.396809987f, -0.917900776f,
+    0.393992040f, -0.919113852f,
+    0.391170384f, -0.920318277f,
+    0.388345047f, -0.921514039f,
+    0.385516054f, -0.922701128f,
+    0.382683432f, -0.923879533f,
+    0.379847209f, -0.925049241f,
+    0.377007410f, -0.926210242f,
+    0.374164063f, -0.927362526f,
+    0.371317194f, -0.928506080f,
+    0.368466830f, -0.929640896f,
+    0.365612998f, -0.930766961f,
+    0.362755724f, -0.931884266f,
+    0.359895037f, -0.932992799f,
+    0.357030961f, -0.934092550f,
+    0.354163525f, -0.935183510f,
+    0.351292756f, -0.936265667f,
+    0.348418680f, -0.937339012f,
+    0.345541325f, -0.938403534f,
+    0.342660717f, -0.939459224f,
+    0.339776884f, -0.940506071f,
+    0.336889853f, -0.941544065f,
+    0.333999651f, -0.942573198f,
+    0.331106306f, -0.943593458f,
+    0.328209844f, -0.944604837f,
+    0.325310292f, -0.945607325f,
+    0.322407679f, -0.946600913f,
+    0.319502031f, -0.947585591f,
+    0.316593376f, -0.948561350f,
+    0.313681740f, -0.949528181f,
+    0.310767153f, -0.950486074f,
+    0.307849640f, -0.951435021f,
+    0.304929230f, -0.952375013f,
+    0.302005949f, -0.953306040f,
+    0.299079826f, -0.954228095f,
+    0.296150888f, -0.955141168f,
+    0.293219163f, -0.956045251f,
+    0.290284677f, -0.956940336f,
+    0.287347460f, -0.957826413f,
+    0.284407537f, -0.958703475f,
+    0.281464938f, -0.959571513f,
+    0.278519689f, -0.960430519f,
+    0.275571819f, -0.961280486f,
+    0.272621355f, -0.962121404f,
+    0.269668326f, -0.962953267f,
+    0.266712757f, -0.963776066f,
+    0.263754679f, -0.964589793f,
+    0.260794118f, -0.965394442f,
+    0.257831102f, -0.966190003f,
+    0.254865660f, -0.966976471f,
+    0.251897818f, -0.967753837f,
+    0.248927606f, -0.968522094f,
+    0.245955050f, -0.969281235f,
+    0.242980180f, -0.970031253f,
+    0.240003022f, -0.970772141f,
+    0.237023606f, -0.971503891f,
+    0.234041959f, -0.972226497f,
+    0.231058108f, -0.972939952f,
+    0.228072083f, -0.973644250f,
+    0.225083911f, -0.974339383f,
+    0.222093621f, -0.975025345f,
+    0.219101240f, -0.975702130f,
+    0.216106797f, -0.976369731f,
+    0.213110320f, -0.977028143f,
+    0.210111837f, -0.977677358f,
+    0.207111376f, -0.978317371f,
+    0.204108966f, -0.978948175f,
+    0.201104635f, -0.979569766f,
+    0.198098411f, -0.980182136f,
+    0.195090322f, -0.980785280f,
+    0.192080397f, -0.981379193f,
+    0.189068664f, -0.981963869f,
+    0.186055152f, -0.982539302f,
+    0.183039888f, -0.983105487f,
+    0.180022901f, -0.983662419f,
+    0.177004220f, -0.984210092f,
+    0.173983873f, -0.984748502f,
+    0.170961889f, -0.985277642f,
+    0.167938295f, -0.985797509f,
+    0.164913120f, -0.986308097f,
+    0.161886394f, -0.986809402f,
+    0.158858143f, -0.987301418f,
+    0.155828398f, -0.987784142f,
+    0.152797185f, -0.988257568f,
+    0.149764535f, -0.988721692f,
+    0.146730474f, -0.989176510f,
+    0.143695033f, -0.989622017f,
+    0.140658239f, -0.990058210f,
+    0.137620122f, -0.990485084f,
+    0.134580709f, -0.990902635f,
+    0.131540029f, -0.991310860f,
+    0.128498111f, -0.991709754f,
+    0.125454983f, -0.992099313f,
+    0.122410675f, -0.992479535f,
+    0.119365215f, -0.992850414f,
+    0.116318631f, -0.993211949f,
+    0.113270952f, -0.993564136f,
+    0.110222207f, -0.993906970f,
+    0.107172425f, -0.994240449f,
+    0.104121634f, -0.994564571f,
+    0.101069863f, -0.994879331f,
+    0.098017140f, -0.995184727f,
+    0.094963495f, -0.995480755f,
+    0.091908956f, -0.995767414f,
+    0.088853553f, -0.996044701f,
+    0.085797312f, -0.996312612f,
+    0.082740265f, -0.996571146f,
+    0.079682438f, -0.996820299f,
+    0.076623861f, -0.997060070f,
+    0.073564564f, -0.997290457f,
+    0.070504573f, -0.997511456f,
+    0.067443920f, -0.997723067f,
+    0.064382631f, -0.997925286f,
+    0.061320736f, -0.998118113f,
+    0.058258265f, -0.998301545f,
+    0.055195244f, -0.998475581f,
+    0.052131705f, -0.998640218f,
+    0.049067674f, -0.998795456f,
+    0.046003182f, -0.998941293f,
+    0.042938257f, -0.999077728f,
+    0.039872928f, -0.999204759f,
+    0.036807223f, -0.999322385f,
+    0.033741172f, -0.999430605f,
+    0.030674803f, -0.999529418f,
+    0.027608146f, -0.999618822f,
+    0.024541229f, -0.999698819f,
+    0.021474080f, -0.999769405f,
+    0.018406730f, -0.999830582f,
+    0.015339206f, -0.999882347f,
+    0.012271538f, -0.999924702f,
+    0.009203755f, -0.999957645f,
+    0.006135885f, -0.999981175f,
+    0.003067957f, -0.999995294f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
+const float32_t twiddleCoef_rfft_4096[4096] = {
+    0.000000000f,  1.000000000f,
+    0.001533980f,  0.999998823f,
+    0.003067957f,  0.999995294f,
+    0.004601926f,  0.999989411f,
+    0.006135885f,  0.999981175f,
+    0.007669829f,  0.999970586f,
+    0.009203755f,  0.999957645f,
+    0.010737659f,  0.999942350f,
+    0.012271538f,  0.999924702f,
+    0.013805389f,  0.999904701f,
+    0.015339206f,  0.999882347f,
+    0.016872988f,  0.999857641f,
+    0.018406730f,  0.999830582f,
+    0.019940429f,  0.999801170f,
+    0.021474080f,  0.999769405f,
+    0.023007681f,  0.999735288f,
+    0.024541229f,  0.999698819f,
+    0.026074718f,  0.999659997f,
+    0.027608146f,  0.999618822f,
+    0.029141509f,  0.999575296f,
+    0.030674803f,  0.999529418f,
+    0.032208025f,  0.999481187f,
+    0.033741172f,  0.999430605f,
+    0.035274239f,  0.999377670f,
+    0.036807223f,  0.999322385f,
+    0.038340120f,  0.999264747f,
+    0.039872928f,  0.999204759f,
+    0.041405641f,  0.999142419f,
+    0.042938257f,  0.999077728f,
+    0.044470772f,  0.999010686f,
+    0.046003182f,  0.998941293f,
+    0.047535484f,  0.998869550f,
+    0.049067674f,  0.998795456f,
+    0.050599749f,  0.998719012f,
+    0.052131705f,  0.998640218f,
+    0.053663538f,  0.998559074f,
+    0.055195244f,  0.998475581f,
+    0.056726821f,  0.998389737f,
+    0.058258265f,  0.998301545f,
+    0.059789571f,  0.998211003f,
+    0.061320736f,  0.998118113f,
+    0.062851758f,  0.998022874f,
+    0.064382631f,  0.997925286f,
+    0.065913353f,  0.997825350f,
+    0.067443920f,  0.997723067f,
+    0.068974328f,  0.997618435f,
+    0.070504573f,  0.997511456f,
+    0.072034653f,  0.997402130f,
+    0.073564564f,  0.997290457f,
+    0.075094301f,  0.997176437f,
+    0.076623861f,  0.997060070f,
+    0.078153242f,  0.996941358f,
+    0.079682438f,  0.996820299f,
+    0.081211447f,  0.996696895f,
+    0.082740265f,  0.996571146f,
+    0.084268888f,  0.996443051f,
+    0.085797312f,  0.996312612f,
+    0.087325535f,  0.996179829f,
+    0.088853553f,  0.996044701f,
+    0.090381361f,  0.995907229f,
+    0.091908956f,  0.995767414f,
+    0.093436336f,  0.995625256f,
+    0.094963495f,  0.995480755f,
+    0.096490431f,  0.995333912f,
+    0.098017140f,  0.995184727f,
+    0.099543619f,  0.995033199f,
+    0.101069863f,  0.994879331f,
+    0.102595869f,  0.994723121f,
+    0.104121634f,  0.994564571f,
+    0.105647154f,  0.994403680f,
+    0.107172425f,  0.994240449f,
+    0.108697444f,  0.994074879f,
+    0.110222207f,  0.993906970f,
+    0.111746711f,  0.993736722f,
+    0.113270952f,  0.993564136f,
+    0.114794927f,  0.993389211f,
+    0.116318631f,  0.993211949f,
+    0.117842062f,  0.993032350f,
+    0.119365215f,  0.992850414f,
+    0.120888087f,  0.992666142f,
+    0.122410675f,  0.992479535f,
+    0.123932975f,  0.992290591f,
+    0.125454983f,  0.992099313f,
+    0.126976696f,  0.991905700f,
+    0.128498111f,  0.991709754f,
+    0.130019223f,  0.991511473f,
+    0.131540029f,  0.991310860f,
+    0.133060525f,  0.991107914f,
+    0.134580709f,  0.990902635f,
+    0.136100575f,  0.990695025f,
+    0.137620122f,  0.990485084f,
+    0.139139344f,  0.990272812f,
+    0.140658239f,  0.990058210f,
+    0.142176804f,  0.989841278f,
+    0.143695033f,  0.989622017f,
+    0.145212925f,  0.989400428f,
+    0.146730474f,  0.989176510f,
+    0.148247679f,  0.988950265f,
+    0.149764535f,  0.988721692f,
+    0.151281038f,  0.988490793f,
+    0.152797185f,  0.988257568f,
+    0.154312973f,  0.988022017f,
+    0.155828398f,  0.987784142f,
+    0.157343456f,  0.987543942f,
+    0.158858143f,  0.987301418f,
+    0.160372457f,  0.987056571f,
+    0.161886394f,  0.986809402f,
+    0.163399949f,  0.986559910f,
+    0.164913120f,  0.986308097f,
+    0.166425904f,  0.986053963f,
+    0.167938295f,  0.985797509f,
+    0.169450291f,  0.985538735f,
+    0.170961889f,  0.985277642f,
+    0.172473084f,  0.985014231f,
+    0.173983873f,  0.984748502f,
+    0.175494253f,  0.984480455f,
+    0.177004220f,  0.984210092f,
+    0.178513771f,  0.983937413f,
+    0.180022901f,  0.983662419f,
+    0.181531608f,  0.983385110f,
+    0.183039888f,  0.983105487f,
+    0.184547737f,  0.982823551f,
+    0.186055152f,  0.982539302f,
+    0.187562129f,  0.982252741f,
+    0.189068664f,  0.981963869f,
+    0.190574755f,  0.981672686f,
+    0.192080397f,  0.981379193f,
+    0.193585587f,  0.981083391f,
+    0.195090322f,  0.980785280f,
+    0.196594598f,  0.980484862f,
+    0.198098411f,  0.980182136f,
+    0.199601758f,  0.979877104f,
+    0.201104635f,  0.979569766f,
+    0.202607039f,  0.979260123f,
+    0.204108966f,  0.978948175f,
+    0.205610413f,  0.978633924f,
+    0.207111376f,  0.978317371f,
+    0.208611852f,  0.977998515f,
+    0.210111837f,  0.977677358f,
+    0.211611327f,  0.977353900f,
+    0.213110320f,  0.977028143f,
+    0.214608811f,  0.976700086f,
+    0.216106797f,  0.976369731f,
+    0.217604275f,  0.976037079f,
+    0.219101240f,  0.975702130f,
+    0.220597690f,  0.975364885f,
+    0.222093621f,  0.975025345f,
+    0.223589029f,  0.974683511f,
+    0.225083911f,  0.974339383f,
+    0.226578264f,  0.973992962f,
+    0.228072083f,  0.973644250f,
+    0.229565366f,  0.973293246f,
+    0.231058108f,  0.972939952f,
+    0.232550307f,  0.972584369f,
+    0.234041959f,  0.972226497f,
+    0.235533059f,  0.971866337f,
+    0.237023606f,  0.971503891f,
+    0.238513595f,  0.971139158f,
+    0.240003022f,  0.970772141f,
+    0.241491885f,  0.970402839f,
+    0.242980180f,  0.970031253f,
+    0.244467903f,  0.969657385f,
+    0.245955050f,  0.969281235f,
+    0.247441619f,  0.968902805f,
+    0.248927606f,  0.968522094f,
+    0.250413007f,  0.968139105f,
+    0.251897818f,  0.967753837f,
+    0.253382037f,  0.967366292f,
+    0.254865660f,  0.966976471f,
+    0.256348682f,  0.966584374f,
+    0.257831102f,  0.966190003f,
+    0.259312915f,  0.965793359f,
+    0.260794118f,  0.965394442f,
+    0.262274707f,  0.964993253f,
+    0.263754679f,  0.964589793f,
+    0.265234030f,  0.964184064f,
+    0.266712757f,  0.963776066f,
+    0.268190857f,  0.963365800f,
+    0.269668326f,  0.962953267f,
+    0.271145160f,  0.962538468f,
+    0.272621355f,  0.962121404f,
+    0.274096910f,  0.961702077f,
+    0.275571819f,  0.961280486f,
+    0.277046080f,  0.960856633f,
+    0.278519689f,  0.960430519f,
+    0.279992643f,  0.960002146f,
+    0.281464938f,  0.959571513f,
+    0.282936570f,  0.959138622f,
+    0.284407537f,  0.958703475f,
+    0.285877835f,  0.958266071f,
+    0.287347460f,  0.957826413f,
+    0.288816408f,  0.957384501f,
+    0.290284677f,  0.956940336f,
+    0.291752263f,  0.956493919f,
+    0.293219163f,  0.956045251f,
+    0.294685372f,  0.955594334f,
+    0.296150888f,  0.955141168f,
+    0.297615707f,  0.954685755f,
+    0.299079826f,  0.954228095f,
+    0.300543241f,  0.953768190f,
+    0.302005949f,  0.953306040f,
+    0.303467947f,  0.952841648f,
+    0.304929230f,  0.952375013f,
+    0.306389795f,  0.951906137f,
+    0.307849640f,  0.951435021f,
+    0.309308760f,  0.950961666f,
+    0.310767153f,  0.950486074f,
+    0.312224814f,  0.950008245f,
+    0.313681740f,  0.949528181f,
+    0.315137929f,  0.949045882f,
+    0.316593376f,  0.948561350f,
+    0.318048077f,  0.948074586f,
+    0.319502031f,  0.947585591f,
+    0.320955232f,  0.947094366f,
+    0.322407679f,  0.946600913f,
+    0.323859367f,  0.946105232f,
+    0.325310292f,  0.945607325f,
+    0.326760452f,  0.945107193f,
+    0.328209844f,  0.944604837f,
+    0.329658463f,  0.944100258f,
+    0.331106306f,  0.943593458f,
+    0.332553370f,  0.943084437f,
+    0.333999651f,  0.942573198f,
+    0.335445147f,  0.942059740f,
+    0.336889853f,  0.941544065f,
+    0.338333767f,  0.941026175f,
+    0.339776884f,  0.940506071f,
+    0.341219202f,  0.939983753f,
+    0.342660717f,  0.939459224f,
+    0.344101426f,  0.938932484f,
+    0.345541325f,  0.938403534f,
+    0.346980411f,  0.937872376f,
+    0.348418680f,  0.937339012f,
+    0.349856130f,  0.936803442f,
+    0.351292756f,  0.936265667f,
+    0.352728556f,  0.935725689f,
+    0.354163525f,  0.935183510f,
+    0.355597662f,  0.934639130f,
+    0.357030961f,  0.934092550f,
+    0.358463421f,  0.933543773f,
+    0.359895037f,  0.932992799f,
+    0.361325806f,  0.932439629f,
+    0.362755724f,  0.931884266f,
+    0.364184790f,  0.931326709f,
+    0.365612998f,  0.930766961f,
+    0.367040346f,  0.930205023f,
+    0.368466830f,  0.929640896f,
+    0.369892447f,  0.929074581f,
+    0.371317194f,  0.928506080f,
+    0.372741067f,  0.927935395f,
+    0.374164063f,  0.927362526f,
+    0.375586178f,  0.926787474f,
+    0.377007410f,  0.926210242f,
+    0.378427755f,  0.925630831f,
+    0.379847209f,  0.925049241f,
+    0.381265769f,  0.924465474f,
+    0.382683432f,  0.923879533f,
+    0.384100195f,  0.923291417f,
+    0.385516054f,  0.922701128f,
+    0.386931006f,  0.922108669f,
+    0.388345047f,  0.921514039f,
+    0.389758174f,  0.920917242f,
+    0.391170384f,  0.920318277f,
+    0.392581674f,  0.919717146f,
+    0.393992040f,  0.919113852f,
+    0.395401479f,  0.918508394f,
+    0.396809987f,  0.917900776f,
+    0.398217562f,  0.917290997f,
+    0.399624200f,  0.916679060f,
+    0.401029897f,  0.916064966f,
+    0.402434651f,  0.915448716f,
+    0.403838458f,  0.914830312f,
+    0.405241314f,  0.914209756f,
+    0.406643217f,  0.913587048f,
+    0.408044163f,  0.912962190f,
+    0.409444149f,  0.912335185f,
+    0.410843171f,  0.911706032f,
+    0.412241227f,  0.911074734f,
+    0.413638312f,  0.910441292f,
+    0.415034424f,  0.909805708f,
+    0.416429560f,  0.909167983f,
+    0.417823716f,  0.908528119f,
+    0.419216888f,  0.907886116f,
+    0.420609074f,  0.907241978f,
+    0.422000271f,  0.906595705f,
+    0.423390474f,  0.905947298f,
+    0.424779681f,  0.905296759f,
+    0.426167889f,  0.904644091f,
+    0.427555093f,  0.903989293f,
+    0.428941292f,  0.903332368f,
+    0.430326481f,  0.902673318f,
+    0.431710658f,  0.902012144f,
+    0.433093819f,  0.901348847f,
+    0.434475961f,  0.900683429f,
+    0.435857080f,  0.900015892f,
+    0.437237174f,  0.899346237f,
+    0.438616239f,  0.898674466f,
+    0.439994271f,  0.898000580f,
+    0.441371269f,  0.897324581f,
+    0.442747228f,  0.896646470f,
+    0.444122145f,  0.895966250f,
+    0.445496017f,  0.895283921f,
+    0.446868840f,  0.894599486f,
+    0.448240612f,  0.893912945f,
+    0.449611330f,  0.893224301f,
+    0.450980989f,  0.892533555f,
+    0.452349587f,  0.891840709f,
+    0.453717121f,  0.891145765f,
+    0.455083587f,  0.890448723f,
+    0.456448982f,  0.889749586f,
+    0.457813304f,  0.889048356f,
+    0.459176548f,  0.888345033f,
+    0.460538711f,  0.887639620f,
+    0.461899791f,  0.886932119f,
+    0.463259784f,  0.886222530f,
+    0.464618686f,  0.885510856f,
+    0.465976496f,  0.884797098f,
+    0.467333209f,  0.884081259f,
+    0.468688822f,  0.883363339f,
+    0.470043332f,  0.882643340f,
+    0.471396737f,  0.881921264f,
+    0.472749032f,  0.881197113f,
+    0.474100215f,  0.880470889f,
+    0.475450282f,  0.879742593f,
+    0.476799230f,  0.879012226f,
+    0.478147056f,  0.878279792f,
+    0.479493758f,  0.877545290f,
+    0.480839331f,  0.876808724f,
+    0.482183772f,  0.876070094f,
+    0.483527079f,  0.875329403f,
+    0.484869248f,  0.874586652f,
+    0.486210276f,  0.873841843f,
+    0.487550160f,  0.873094978f,
+    0.488888897f,  0.872346059f,
+    0.490226483f,  0.871595087f,
+    0.491562916f,  0.870842063f,
+    0.492898192f,  0.870086991f,
+    0.494232309f,  0.869329871f,
+    0.495565262f,  0.868570706f,
+    0.496897049f,  0.867809497f,
+    0.498227667f,  0.867046246f,
+    0.499557113f,  0.866280954f,
+    0.500885383f,  0.865513624f,
+    0.502212474f,  0.864744258f,
+    0.503538384f,  0.863972856f,
+    0.504863109f,  0.863199422f,
+    0.506186645f,  0.862423956f,
+    0.507508991f,  0.861646461f,
+    0.508830143f,  0.860866939f,
+    0.510150097f,  0.860085390f,
+    0.511468850f,  0.859301818f,
+    0.512786401f,  0.858516224f,
+    0.514102744f,  0.857728610f,
+    0.515417878f,  0.856938977f,
+    0.516731799f,  0.856147328f,
+    0.518044504f,  0.855353665f,
+    0.519355990f,  0.854557988f,
+    0.520666254f,  0.853760301f,
+    0.521975293f,  0.852960605f,
+    0.523283103f,  0.852158902f,
+    0.524589683f,  0.851355193f,
+    0.525895027f,  0.850549481f,
+    0.527199135f,  0.849741768f,
+    0.528502002f,  0.848932055f,
+    0.529803625f,  0.848120345f,
+    0.531104001f,  0.847306639f,
+    0.532403128f,  0.846490939f,
+    0.533701002f,  0.845673247f,
+    0.534997620f,  0.844853565f,
+    0.536292979f,  0.844031895f,
+    0.537587076f,  0.843208240f,
+    0.538879909f,  0.842382600f,
+    0.540171473f,  0.841554977f,
+    0.541461766f,  0.840725375f,
+    0.542750785f,  0.839893794f,
+    0.544038527f,  0.839060237f,
+    0.545324988f,  0.838224706f,
+    0.546610167f,  0.837387202f,
+    0.547894059f,  0.836547727f,
+    0.549176662f,  0.835706284f,
+    0.550457973f,  0.834862875f,
+    0.551737988f,  0.834017501f,
+    0.553016706f,  0.833170165f,
+    0.554294121f,  0.832320868f,
+    0.555570233f,  0.831469612f,
+    0.556845037f,  0.830616400f,
+    0.558118531f,  0.829761234f,
+    0.559390712f,  0.828904115f,
+    0.560661576f,  0.828045045f,
+    0.561931121f,  0.827184027f,
+    0.563199344f,  0.826321063f,
+    0.564466242f,  0.825456154f,
+    0.565731811f,  0.824589303f,
+    0.566996049f,  0.823720511f,
+    0.568258953f,  0.822849781f,
+    0.569520519f,  0.821977115f,
+    0.570780746f,  0.821102515f,
+    0.572039629f,  0.820225983f,
+    0.573297167f,  0.819347520f,
+    0.574553355f,  0.818467130f,
+    0.575808191f,  0.817584813f,
+    0.577061673f,  0.816700573f,
+    0.578313796f,  0.815814411f,
+    0.579564559f,  0.814926329f,
+    0.580813958f,  0.814036330f,
+    0.582061990f,  0.813144415f,
+    0.583308653f,  0.812250587f,
+    0.584553943f,  0.811354847f,
+    0.585797857f,  0.810457198f,
+    0.587040394f,  0.809557642f,
+    0.588281548f,  0.808656182f,
+    0.589521319f,  0.807752818f,
+    0.590759702f,  0.806847554f,
+    0.591996695f,  0.805940391f,
+    0.593232295f,  0.805031331f,
+    0.594466499f,  0.804120377f,
+    0.595699304f,  0.803207531f,
+    0.596930708f,  0.802292796f,
+    0.598160707f,  0.801376172f,
+    0.599389298f,  0.800457662f,
+    0.600616479f,  0.799537269f,
+    0.601842247f,  0.798614995f,
+    0.603066599f,  0.797690841f,
+    0.604289531f,  0.796764810f,
+    0.605511041f,  0.795836905f,
+    0.606731127f,  0.794907126f,
+    0.607949785f,  0.793975478f,
+    0.609167012f,  0.793041960f,
+    0.610382806f,  0.792106577f,
+    0.611597164f,  0.791169330f,
+    0.612810082f,  0.790230221f,
+    0.614021559f,  0.789289253f,
+    0.615231591f,  0.788346428f,
+    0.616440175f,  0.787401747f,
+    0.617647308f,  0.786455214f,
+    0.618852988f,  0.785506830f,
+    0.620057212f,  0.784556597f,
+    0.621259977f,  0.783604519f,
+    0.622461279f,  0.782650596f,
+    0.623661118f,  0.781694832f,
+    0.624859488f,  0.780737229f,
+    0.626056388f,  0.779777788f,
+    0.627251815f,  0.778816512f,
+    0.628445767f,  0.777853404f,
+    0.629638239f,  0.776888466f,
+    0.630829230f,  0.775921699f,
+    0.632018736f,  0.774953107f,
+    0.633206755f,  0.773982691f,
+    0.634393284f,  0.773010453f,
+    0.635578320f,  0.772036397f,
+    0.636761861f,  0.771060524f,
+    0.637943904f,  0.770082837f,
+    0.639124445f,  0.769103338f,
+    0.640303482f,  0.768122029f,
+    0.641481013f,  0.767138912f,
+    0.642657034f,  0.766153990f,
+    0.643831543f,  0.765167266f,
+    0.645004537f,  0.764178741f,
+    0.646176013f,  0.763188417f,
+    0.647345969f,  0.762196298f,
+    0.648514401f,  0.761202385f,
+    0.649681307f,  0.760206682f,
+    0.650846685f,  0.759209189f,
+    0.652010531f,  0.758209910f,
+    0.653172843f,  0.757208847f,
+    0.654333618f,  0.756206001f,
+    0.655492853f,  0.755201377f,
+    0.656650546f,  0.754194975f,
+    0.657806693f,  0.753186799f,
+    0.658961293f,  0.752176850f,
+    0.660114342f,  0.751165132f,
+    0.661265838f,  0.750151646f,
+    0.662415778f,  0.749136395f,
+    0.663564159f,  0.748119380f,
+    0.664710978f,  0.747100606f,
+    0.665856234f,  0.746080074f,
+    0.666999922f,  0.745057785f,
+    0.668142041f,  0.744033744f,
+    0.669282588f,  0.743007952f,
+    0.670421560f,  0.741980412f,
+    0.671558955f,  0.740951125f,
+    0.672694769f,  0.739920095f,
+    0.673829000f,  0.738887324f,
+    0.674961646f,  0.737852815f,
+    0.676092704f,  0.736816569f,
+    0.677222170f,  0.735778589f,
+    0.678350043f,  0.734738878f,
+    0.679476320f,  0.733697438f,
+    0.680600998f,  0.732654272f,
+    0.681724074f,  0.731609381f,
+    0.682845546f,  0.730562769f,
+    0.683965412f,  0.729514438f,
+    0.685083668f,  0.728464390f,
+    0.686200312f,  0.727412629f,
+    0.687315341f,  0.726359155f,
+    0.688428753f,  0.725303972f,
+    0.689540545f,  0.724247083f,
+    0.690650714f,  0.723188489f,
+    0.691759258f,  0.722128194f,
+    0.692866175f,  0.721066199f,
+    0.693971461f,  0.720002508f,
+    0.695075114f,  0.718937122f,
+    0.696177131f,  0.717870045f,
+    0.697277511f,  0.716801279f,
+    0.698376249f,  0.715730825f,
+    0.699473345f,  0.714658688f,
+    0.700568794f,  0.713584869f,
+    0.701662595f,  0.712509371f,
+    0.702754744f,  0.711432196f,
+    0.703845241f,  0.710353347f,
+    0.704934080f,  0.709272826f,
+    0.706021261f,  0.708190637f,
+    0.707106781f,  0.707106781f,
+    0.708190637f,  0.706021261f,
+    0.709272826f,  0.704934080f,
+    0.710353347f,  0.703845241f,
+    0.711432196f,  0.702754744f,
+    0.712509371f,  0.701662595f,
+    0.713584869f,  0.700568794f,
+    0.714658688f,  0.699473345f,
+    0.715730825f,  0.698376249f,
+    0.716801279f,  0.697277511f,
+    0.717870045f,  0.696177131f,
+    0.718937122f,  0.695075114f,
+    0.720002508f,  0.693971461f,
+    0.721066199f,  0.692866175f,
+    0.722128194f,  0.691759258f,
+    0.723188489f,  0.690650714f,
+    0.724247083f,  0.689540545f,
+    0.725303972f,  0.688428753f,
+    0.726359155f,  0.687315341f,
+    0.727412629f,  0.686200312f,
+    0.728464390f,  0.685083668f,
+    0.729514438f,  0.683965412f,
+    0.730562769f,  0.682845546f,
+    0.731609381f,  0.681724074f,
+    0.732654272f,  0.680600998f,
+    0.733697438f,  0.679476320f,
+    0.734738878f,  0.678350043f,
+    0.735778589f,  0.677222170f,
+    0.736816569f,  0.676092704f,
+    0.737852815f,  0.674961646f,
+    0.738887324f,  0.673829000f,
+    0.739920095f,  0.672694769f,
+    0.740951125f,  0.671558955f,
+    0.741980412f,  0.670421560f,
+    0.743007952f,  0.669282588f,
+    0.744033744f,  0.668142041f,
+    0.745057785f,  0.666999922f,
+    0.746080074f,  0.665856234f,
+    0.747100606f,  0.664710978f,
+    0.748119380f,  0.663564159f,
+    0.749136395f,  0.662415778f,
+    0.750151646f,  0.661265838f,
+    0.751165132f,  0.660114342f,
+    0.752176850f,  0.658961293f,
+    0.753186799f,  0.657806693f,
+    0.754194975f,  0.656650546f,
+    0.755201377f,  0.655492853f,
+    0.756206001f,  0.654333618f,
+    0.757208847f,  0.653172843f,
+    0.758209910f,  0.652010531f,
+    0.759209189f,  0.650846685f,
+    0.760206682f,  0.649681307f,
+    0.761202385f,  0.648514401f,
+    0.762196298f,  0.647345969f,
+    0.763188417f,  0.646176013f,
+    0.764178741f,  0.645004537f,
+    0.765167266f,  0.643831543f,
+    0.766153990f,  0.642657034f,
+    0.767138912f,  0.641481013f,
+    0.768122029f,  0.640303482f,
+    0.769103338f,  0.639124445f,
+    0.770082837f,  0.637943904f,
+    0.771060524f,  0.636761861f,
+    0.772036397f,  0.635578320f,
+    0.773010453f,  0.634393284f,
+    0.773982691f,  0.633206755f,
+    0.774953107f,  0.632018736f,
+    0.775921699f,  0.630829230f,
+    0.776888466f,  0.629638239f,
+    0.777853404f,  0.628445767f,
+    0.778816512f,  0.627251815f,
+    0.779777788f,  0.626056388f,
+    0.780737229f,  0.624859488f,
+    0.781694832f,  0.623661118f,
+    0.782650596f,  0.622461279f,
+    0.783604519f,  0.621259977f,
+    0.784556597f,  0.620057212f,
+    0.785506830f,  0.618852988f,
+    0.786455214f,  0.617647308f,
+    0.787401747f,  0.616440175f,
+    0.788346428f,  0.615231591f,
+    0.789289253f,  0.614021559f,
+    0.790230221f,  0.612810082f,
+    0.791169330f,  0.611597164f,
+    0.792106577f,  0.610382806f,
+    0.793041960f,  0.609167012f,
+    0.793975478f,  0.607949785f,
+    0.794907126f,  0.606731127f,
+    0.795836905f,  0.605511041f,
+    0.796764810f,  0.604289531f,
+    0.797690841f,  0.603066599f,
+    0.798614995f,  0.601842247f,
+    0.799537269f,  0.600616479f,
+    0.800457662f,  0.599389298f,
+    0.801376172f,  0.598160707f,
+    0.802292796f,  0.596930708f,
+    0.803207531f,  0.595699304f,
+    0.804120377f,  0.594466499f,
+    0.805031331f,  0.593232295f,
+    0.805940391f,  0.591996695f,
+    0.806847554f,  0.590759702f,
+    0.807752818f,  0.589521319f,
+    0.808656182f,  0.588281548f,
+    0.809557642f,  0.587040394f,
+    0.810457198f,  0.585797857f,
+    0.811354847f,  0.584553943f,
+    0.812250587f,  0.583308653f,
+    0.813144415f,  0.582061990f,
+    0.814036330f,  0.580813958f,
+    0.814926329f,  0.579564559f,
+    0.815814411f,  0.578313796f,
+    0.816700573f,  0.577061673f,
+    0.817584813f,  0.575808191f,
+    0.818467130f,  0.574553355f,
+    0.819347520f,  0.573297167f,
+    0.820225983f,  0.572039629f,
+    0.821102515f,  0.570780746f,
+    0.821977115f,  0.569520519f,
+    0.822849781f,  0.568258953f,
+    0.823720511f,  0.566996049f,
+    0.824589303f,  0.565731811f,
+    0.825456154f,  0.564466242f,
+    0.826321063f,  0.563199344f,
+    0.827184027f,  0.561931121f,
+    0.828045045f,  0.560661576f,
+    0.828904115f,  0.559390712f,
+    0.829761234f,  0.558118531f,
+    0.830616400f,  0.556845037f,
+    0.831469612f,  0.555570233f,
+    0.832320868f,  0.554294121f,
+    0.833170165f,  0.553016706f,
+    0.834017501f,  0.551737988f,
+    0.834862875f,  0.550457973f,
+    0.835706284f,  0.549176662f,
+    0.836547727f,  0.547894059f,
+    0.837387202f,  0.546610167f,
+    0.838224706f,  0.545324988f,
+    0.839060237f,  0.544038527f,
+    0.839893794f,  0.542750785f,
+    0.840725375f,  0.541461766f,
+    0.841554977f,  0.540171473f,
+    0.842382600f,  0.538879909f,
+    0.843208240f,  0.537587076f,
+    0.844031895f,  0.536292979f,
+    0.844853565f,  0.534997620f,
+    0.845673247f,  0.533701002f,
+    0.846490939f,  0.532403128f,
+    0.847306639f,  0.531104001f,
+    0.848120345f,  0.529803625f,
+    0.848932055f,  0.528502002f,
+    0.849741768f,  0.527199135f,
+    0.850549481f,  0.525895027f,
+    0.851355193f,  0.524589683f,
+    0.852158902f,  0.523283103f,
+    0.852960605f,  0.521975293f,
+    0.853760301f,  0.520666254f,
+    0.854557988f,  0.519355990f,
+    0.855353665f,  0.518044504f,
+    0.856147328f,  0.516731799f,
+    0.856938977f,  0.515417878f,
+    0.857728610f,  0.514102744f,
+    0.858516224f,  0.512786401f,
+    0.859301818f,  0.511468850f,
+    0.860085390f,  0.510150097f,
+    0.860866939f,  0.508830143f,
+    0.861646461f,  0.507508991f,
+    0.862423956f,  0.506186645f,
+    0.863199422f,  0.504863109f,
+    0.863972856f,  0.503538384f,
+    0.864744258f,  0.502212474f,
+    0.865513624f,  0.500885383f,
+    0.866280954f,  0.499557113f,
+    0.867046246f,  0.498227667f,
+    0.867809497f,  0.496897049f,
+    0.868570706f,  0.495565262f,
+    0.869329871f,  0.494232309f,
+    0.870086991f,  0.492898192f,
+    0.870842063f,  0.491562916f,
+    0.871595087f,  0.490226483f,
+    0.872346059f,  0.488888897f,
+    0.873094978f,  0.487550160f,
+    0.873841843f,  0.486210276f,
+    0.874586652f,  0.484869248f,
+    0.875329403f,  0.483527079f,
+    0.876070094f,  0.482183772f,
+    0.876808724f,  0.480839331f,
+    0.877545290f,  0.479493758f,
+    0.878279792f,  0.478147056f,
+    0.879012226f,  0.476799230f,
+    0.879742593f,  0.475450282f,
+    0.880470889f,  0.474100215f,
+    0.881197113f,  0.472749032f,
+    0.881921264f,  0.471396737f,
+    0.882643340f,  0.470043332f,
+    0.883363339f,  0.468688822f,
+    0.884081259f,  0.467333209f,
+    0.884797098f,  0.465976496f,
+    0.885510856f,  0.464618686f,
+    0.886222530f,  0.463259784f,
+    0.886932119f,  0.461899791f,
+    0.887639620f,  0.460538711f,
+    0.888345033f,  0.459176548f,
+    0.889048356f,  0.457813304f,
+    0.889749586f,  0.456448982f,
+    0.890448723f,  0.455083587f,
+    0.891145765f,  0.453717121f,
+    0.891840709f,  0.452349587f,
+    0.892533555f,  0.450980989f,
+    0.893224301f,  0.449611330f,
+    0.893912945f,  0.448240612f,
+    0.894599486f,  0.446868840f,
+    0.895283921f,  0.445496017f,
+    0.895966250f,  0.444122145f,
+    0.896646470f,  0.442747228f,
+    0.897324581f,  0.441371269f,
+    0.898000580f,  0.439994271f,
+    0.898674466f,  0.438616239f,
+    0.899346237f,  0.437237174f,
+    0.900015892f,  0.435857080f,
+    0.900683429f,  0.434475961f,
+    0.901348847f,  0.433093819f,
+    0.902012144f,  0.431710658f,
+    0.902673318f,  0.430326481f,
+    0.903332368f,  0.428941292f,
+    0.903989293f,  0.427555093f,
+    0.904644091f,  0.426167889f,
+    0.905296759f,  0.424779681f,
+    0.905947298f,  0.423390474f,
+    0.906595705f,  0.422000271f,
+    0.907241978f,  0.420609074f,
+    0.907886116f,  0.419216888f,
+    0.908528119f,  0.417823716f,
+    0.909167983f,  0.416429560f,
+    0.909805708f,  0.415034424f,
+    0.910441292f,  0.413638312f,
+    0.911074734f,  0.412241227f,
+    0.911706032f,  0.410843171f,
+    0.912335185f,  0.409444149f,
+    0.912962190f,  0.408044163f,
+    0.913587048f,  0.406643217f,
+    0.914209756f,  0.405241314f,
+    0.914830312f,  0.403838458f,
+    0.915448716f,  0.402434651f,
+    0.916064966f,  0.401029897f,
+    0.916679060f,  0.399624200f,
+    0.917290997f,  0.398217562f,
+    0.917900776f,  0.396809987f,
+    0.918508394f,  0.395401479f,
+    0.919113852f,  0.393992040f,
+    0.919717146f,  0.392581674f,
+    0.920318277f,  0.391170384f,
+    0.920917242f,  0.389758174f,
+    0.921514039f,  0.388345047f,
+    0.922108669f,  0.386931006f,
+    0.922701128f,  0.385516054f,
+    0.923291417f,  0.384100195f,
+    0.923879533f,  0.382683432f,
+    0.924465474f,  0.381265769f,
+    0.925049241f,  0.379847209f,
+    0.925630831f,  0.378427755f,
+    0.926210242f,  0.377007410f,
+    0.926787474f,  0.375586178f,
+    0.927362526f,  0.374164063f,
+    0.927935395f,  0.372741067f,
+    0.928506080f,  0.371317194f,
+    0.929074581f,  0.369892447f,
+    0.929640896f,  0.368466830f,
+    0.930205023f,  0.367040346f,
+    0.930766961f,  0.365612998f,
+    0.931326709f,  0.364184790f,
+    0.931884266f,  0.362755724f,
+    0.932439629f,  0.361325806f,
+    0.932992799f,  0.359895037f,
+    0.933543773f,  0.358463421f,
+    0.934092550f,  0.357030961f,
+    0.934639130f,  0.355597662f,
+    0.935183510f,  0.354163525f,
+    0.935725689f,  0.352728556f,
+    0.936265667f,  0.351292756f,
+    0.936803442f,  0.349856130f,
+    0.937339012f,  0.348418680f,
+    0.937872376f,  0.346980411f,
+    0.938403534f,  0.345541325f,
+    0.938932484f,  0.344101426f,
+    0.939459224f,  0.342660717f,
+    0.939983753f,  0.341219202f,
+    0.940506071f,  0.339776884f,
+    0.941026175f,  0.338333767f,
+    0.941544065f,  0.336889853f,
+    0.942059740f,  0.335445147f,
+    0.942573198f,  0.333999651f,
+    0.943084437f,  0.332553370f,
+    0.943593458f,  0.331106306f,
+    0.944100258f,  0.329658463f,
+    0.944604837f,  0.328209844f,
+    0.945107193f,  0.326760452f,
+    0.945607325f,  0.325310292f,
+    0.946105232f,  0.323859367f,
+    0.946600913f,  0.322407679f,
+    0.947094366f,  0.320955232f,
+    0.947585591f,  0.319502031f,
+    0.948074586f,  0.318048077f,
+    0.948561350f,  0.316593376f,
+    0.949045882f,  0.315137929f,
+    0.949528181f,  0.313681740f,
+    0.950008245f,  0.312224814f,
+    0.950486074f,  0.310767153f,
+    0.950961666f,  0.309308760f,
+    0.951435021f,  0.307849640f,
+    0.951906137f,  0.306389795f,
+    0.952375013f,  0.304929230f,
+    0.952841648f,  0.303467947f,
+    0.953306040f,  0.302005949f,
+    0.953768190f,  0.300543241f,
+    0.954228095f,  0.299079826f,
+    0.954685755f,  0.297615707f,
+    0.955141168f,  0.296150888f,
+    0.955594334f,  0.294685372f,
+    0.956045251f,  0.293219163f,
+    0.956493919f,  0.291752263f,
+    0.956940336f,  0.290284677f,
+    0.957384501f,  0.288816408f,
+    0.957826413f,  0.287347460f,
+    0.958266071f,  0.285877835f,
+    0.958703475f,  0.284407537f,
+    0.959138622f,  0.282936570f,
+    0.959571513f,  0.281464938f,
+    0.960002146f,  0.279992643f,
+    0.960430519f,  0.278519689f,
+    0.960856633f,  0.277046080f,
+    0.961280486f,  0.275571819f,
+    0.961702077f,  0.274096910f,
+    0.962121404f,  0.272621355f,
+    0.962538468f,  0.271145160f,
+    0.962953267f,  0.269668326f,
+    0.963365800f,  0.268190857f,
+    0.963776066f,  0.266712757f,
+    0.964184064f,  0.265234030f,
+    0.964589793f,  0.263754679f,
+    0.964993253f,  0.262274707f,
+    0.965394442f,  0.260794118f,
+    0.965793359f,  0.259312915f,
+    0.966190003f,  0.257831102f,
+    0.966584374f,  0.256348682f,
+    0.966976471f,  0.254865660f,
+    0.967366292f,  0.253382037f,
+    0.967753837f,  0.251897818f,
+    0.968139105f,  0.250413007f,
+    0.968522094f,  0.248927606f,
+    0.968902805f,  0.247441619f,
+    0.969281235f,  0.245955050f,
+    0.969657385f,  0.244467903f,
+    0.970031253f,  0.242980180f,
+    0.970402839f,  0.241491885f,
+    0.970772141f,  0.240003022f,
+    0.971139158f,  0.238513595f,
+    0.971503891f,  0.237023606f,
+    0.971866337f,  0.235533059f,
+    0.972226497f,  0.234041959f,
+    0.972584369f,  0.232550307f,
+    0.972939952f,  0.231058108f,
+    0.973293246f,  0.229565366f,
+    0.973644250f,  0.228072083f,
+    0.973992962f,  0.226578264f,
+    0.974339383f,  0.225083911f,
+    0.974683511f,  0.223589029f,
+    0.975025345f,  0.222093621f,
+    0.975364885f,  0.220597690f,
+    0.975702130f,  0.219101240f,
+    0.976037079f,  0.217604275f,
+    0.976369731f,  0.216106797f,
+    0.976700086f,  0.214608811f,
+    0.977028143f,  0.213110320f,
+    0.977353900f,  0.211611327f,
+    0.977677358f,  0.210111837f,
+    0.977998515f,  0.208611852f,
+    0.978317371f,  0.207111376f,
+    0.978633924f,  0.205610413f,
+    0.978948175f,  0.204108966f,
+    0.979260123f,  0.202607039f,
+    0.979569766f,  0.201104635f,
+    0.979877104f,  0.199601758f,
+    0.980182136f,  0.198098411f,
+    0.980484862f,  0.196594598f,
+    0.980785280f,  0.195090322f,
+    0.981083391f,  0.193585587f,
+    0.981379193f,  0.192080397f,
+    0.981672686f,  0.190574755f,
+    0.981963869f,  0.189068664f,
+    0.982252741f,  0.187562129f,
+    0.982539302f,  0.186055152f,
+    0.982823551f,  0.184547737f,
+    0.983105487f,  0.183039888f,
+    0.983385110f,  0.181531608f,
+    0.983662419f,  0.180022901f,
+    0.983937413f,  0.178513771f,
+    0.984210092f,  0.177004220f,
+    0.984480455f,  0.175494253f,
+    0.984748502f,  0.173983873f,
+    0.985014231f,  0.172473084f,
+    0.985277642f,  0.170961889f,
+    0.985538735f,  0.169450291f,
+    0.985797509f,  0.167938295f,
+    0.986053963f,  0.166425904f,
+    0.986308097f,  0.164913120f,
+    0.986559910f,  0.163399949f,
+    0.986809402f,  0.161886394f,
+    0.987056571f,  0.160372457f,
+    0.987301418f,  0.158858143f,
+    0.987543942f,  0.157343456f,
+    0.987784142f,  0.155828398f,
+    0.988022017f,  0.154312973f,
+    0.988257568f,  0.152797185f,
+    0.988490793f,  0.151281038f,
+    0.988721692f,  0.149764535f,
+    0.988950265f,  0.148247679f,
+    0.989176510f,  0.146730474f,
+    0.989400428f,  0.145212925f,
+    0.989622017f,  0.143695033f,
+    0.989841278f,  0.142176804f,
+    0.990058210f,  0.140658239f,
+    0.990272812f,  0.139139344f,
+    0.990485084f,  0.137620122f,
+    0.990695025f,  0.136100575f,
+    0.990902635f,  0.134580709f,
+    0.991107914f,  0.133060525f,
+    0.991310860f,  0.131540029f,
+    0.991511473f,  0.130019223f,
+    0.991709754f,  0.128498111f,
+    0.991905700f,  0.126976696f,
+    0.992099313f,  0.125454983f,
+    0.992290591f,  0.123932975f,
+    0.992479535f,  0.122410675f,
+    0.992666142f,  0.120888087f,
+    0.992850414f,  0.119365215f,
+    0.993032350f,  0.117842062f,
+    0.993211949f,  0.116318631f,
+    0.993389211f,  0.114794927f,
+    0.993564136f,  0.113270952f,
+    0.993736722f,  0.111746711f,
+    0.993906970f,  0.110222207f,
+    0.994074879f,  0.108697444f,
+    0.994240449f,  0.107172425f,
+    0.994403680f,  0.105647154f,
+    0.994564571f,  0.104121634f,
+    0.994723121f,  0.102595869f,
+    0.994879331f,  0.101069863f,
+    0.995033199f,  0.099543619f,
+    0.995184727f,  0.098017140f,
+    0.995333912f,  0.096490431f,
+    0.995480755f,  0.094963495f,
+    0.995625256f,  0.093436336f,
+    0.995767414f,  0.091908956f,
+    0.995907229f,  0.090381361f,
+    0.996044701f,  0.088853553f,
+    0.996179829f,  0.087325535f,
+    0.996312612f,  0.085797312f,
+    0.996443051f,  0.084268888f,
+    0.996571146f,  0.082740265f,
+    0.996696895f,  0.081211447f,
+    0.996820299f,  0.079682438f,
+    0.996941358f,  0.078153242f,
+    0.997060070f,  0.076623861f,
+    0.997176437f,  0.075094301f,
+    0.997290457f,  0.073564564f,
+    0.997402130f,  0.072034653f,
+    0.997511456f,  0.070504573f,
+    0.997618435f,  0.068974328f,
+    0.997723067f,  0.067443920f,
+    0.997825350f,  0.065913353f,
+    0.997925286f,  0.064382631f,
+    0.998022874f,  0.062851758f,
+    0.998118113f,  0.061320736f,
+    0.998211003f,  0.059789571f,
+    0.998301545f,  0.058258265f,
+    0.998389737f,  0.056726821f,
+    0.998475581f,  0.055195244f,
+    0.998559074f,  0.053663538f,
+    0.998640218f,  0.052131705f,
+    0.998719012f,  0.050599749f,
+    0.998795456f,  0.049067674f,
+    0.998869550f,  0.047535484f,
+    0.998941293f,  0.046003182f,
+    0.999010686f,  0.044470772f,
+    0.999077728f,  0.042938257f,
+    0.999142419f,  0.041405641f,
+    0.999204759f,  0.039872928f,
+    0.999264747f,  0.038340120f,
+    0.999322385f,  0.036807223f,
+    0.999377670f,  0.035274239f,
+    0.999430605f,  0.033741172f,
+    0.999481187f,  0.032208025f,
+    0.999529418f,  0.030674803f,
+    0.999575296f,  0.029141509f,
+    0.999618822f,  0.027608146f,
+    0.999659997f,  0.026074718f,
+    0.999698819f,  0.024541229f,
+    0.999735288f,  0.023007681f,
+    0.999769405f,  0.021474080f,
+    0.999801170f,  0.019940429f,
+    0.999830582f,  0.018406730f,
+    0.999857641f,  0.016872988f,
+    0.999882347f,  0.015339206f,
+    0.999904701f,  0.013805389f,
+    0.999924702f,  0.012271538f,
+    0.999942350f,  0.010737659f,
+    0.999957645f,  0.009203755f,
+    0.999970586f,  0.007669829f,
+    0.999981175f,  0.006135885f,
+    0.999989411f,  0.004601926f,
+    0.999995294f,  0.003067957f,
+    0.999998823f,  0.001533980f,
+    1.000000000f,  0.000000000f,
+    0.999998823f, -0.001533980f,
+    0.999995294f, -0.003067957f,
+    0.999989411f, -0.004601926f,
+    0.999981175f, -0.006135885f,
+    0.999970586f, -0.007669829f,
+    0.999957645f, -0.009203755f,
+    0.999942350f, -0.010737659f,
+    0.999924702f, -0.012271538f,
+    0.999904701f, -0.013805389f,
+    0.999882347f, -0.015339206f,
+    0.999857641f, -0.016872988f,
+    0.999830582f, -0.018406730f,
+    0.999801170f, -0.019940429f,
+    0.999769405f, -0.021474080f,
+    0.999735288f, -0.023007681f,
+    0.999698819f, -0.024541229f,
+    0.999659997f, -0.026074718f,
+    0.999618822f, -0.027608146f,
+    0.999575296f, -0.029141509f,
+    0.999529418f, -0.030674803f,
+    0.999481187f, -0.032208025f,
+    0.999430605f, -0.033741172f,
+    0.999377670f, -0.035274239f,
+    0.999322385f, -0.036807223f,
+    0.999264747f, -0.038340120f,
+    0.999204759f, -0.039872928f,
+    0.999142419f, -0.041405641f,
+    0.999077728f, -0.042938257f,
+    0.999010686f, -0.044470772f,
+    0.998941293f, -0.046003182f,
+    0.998869550f, -0.047535484f,
+    0.998795456f, -0.049067674f,
+    0.998719012f, -0.050599749f,
+    0.998640218f, -0.052131705f,
+    0.998559074f, -0.053663538f,
+    0.998475581f, -0.055195244f,
+    0.998389737f, -0.056726821f,
+    0.998301545f, -0.058258265f,
+    0.998211003f, -0.059789571f,
+    0.998118113f, -0.061320736f,
+    0.998022874f, -0.062851758f,
+    0.997925286f, -0.064382631f,
+    0.997825350f, -0.065913353f,
+    0.997723067f, -0.067443920f,
+    0.997618435f, -0.068974328f,
+    0.997511456f, -0.070504573f,
+    0.997402130f, -0.072034653f,
+    0.997290457f, -0.073564564f,
+    0.997176437f, -0.075094301f,
+    0.997060070f, -0.076623861f,
+    0.996941358f, -0.078153242f,
+    0.996820299f, -0.079682438f,
+    0.996696895f, -0.081211447f,
+    0.996571146f, -0.082740265f,
+    0.996443051f, -0.084268888f,
+    0.996312612f, -0.085797312f,
+    0.996179829f, -0.087325535f,
+    0.996044701f, -0.088853553f,
+    0.995907229f, -0.090381361f,
+    0.995767414f, -0.091908956f,
+    0.995625256f, -0.093436336f,
+    0.995480755f, -0.094963495f,
+    0.995333912f, -0.096490431f,
+    0.995184727f, -0.098017140f,
+    0.995033199f, -0.099543619f,
+    0.994879331f, -0.101069863f,
+    0.994723121f, -0.102595869f,
+    0.994564571f, -0.104121634f,
+    0.994403680f, -0.105647154f,
+    0.994240449f, -0.107172425f,
+    0.994074879f, -0.108697444f,
+    0.993906970f, -0.110222207f,
+    0.993736722f, -0.111746711f,
+    0.993564136f, -0.113270952f,
+    0.993389211f, -0.114794927f,
+    0.993211949f, -0.116318631f,
+    0.993032350f, -0.117842062f,
+    0.992850414f, -0.119365215f,
+    0.992666142f, -0.120888087f,
+    0.992479535f, -0.122410675f,
+    0.992290591f, -0.123932975f,
+    0.992099313f, -0.125454983f,
+    0.991905700f, -0.126976696f,
+    0.991709754f, -0.128498111f,
+    0.991511473f, -0.130019223f,
+    0.991310860f, -0.131540029f,
+    0.991107914f, -0.133060525f,
+    0.990902635f, -0.134580709f,
+    0.990695025f, -0.136100575f,
+    0.990485084f, -0.137620122f,
+    0.990272812f, -0.139139344f,
+    0.990058210f, -0.140658239f,
+    0.989841278f, -0.142176804f,
+    0.989622017f, -0.143695033f,
+    0.989400428f, -0.145212925f,
+    0.989176510f, -0.146730474f,
+    0.988950265f, -0.148247679f,
+    0.988721692f, -0.149764535f,
+    0.988490793f, -0.151281038f,
+    0.988257568f, -0.152797185f,
+    0.988022017f, -0.154312973f,
+    0.987784142f, -0.155828398f,
+    0.987543942f, -0.157343456f,
+    0.987301418f, -0.158858143f,
+    0.987056571f, -0.160372457f,
+    0.986809402f, -0.161886394f,
+    0.986559910f, -0.163399949f,
+    0.986308097f, -0.164913120f,
+    0.986053963f, -0.166425904f,
+    0.985797509f, -0.167938295f,
+    0.985538735f, -0.169450291f,
+    0.985277642f, -0.170961889f,
+    0.985014231f, -0.172473084f,
+    0.984748502f, -0.173983873f,
+    0.984480455f, -0.175494253f,
+    0.984210092f, -0.177004220f,
+    0.983937413f, -0.178513771f,
+    0.983662419f, -0.180022901f,
+    0.983385110f, -0.181531608f,
+    0.983105487f, -0.183039888f,
+    0.982823551f, -0.184547737f,
+    0.982539302f, -0.186055152f,
+    0.982252741f, -0.187562129f,
+    0.981963869f, -0.189068664f,
+    0.981672686f, -0.190574755f,
+    0.981379193f, -0.192080397f,
+    0.981083391f, -0.193585587f,
+    0.980785280f, -0.195090322f,
+    0.980484862f, -0.196594598f,
+    0.980182136f, -0.198098411f,
+    0.979877104f, -0.199601758f,
+    0.979569766f, -0.201104635f,
+    0.979260123f, -0.202607039f,
+    0.978948175f, -0.204108966f,
+    0.978633924f, -0.205610413f,
+    0.978317371f, -0.207111376f,
+    0.977998515f, -0.208611852f,
+    0.977677358f, -0.210111837f,
+    0.977353900f, -0.211611327f,
+    0.977028143f, -0.213110320f,
+    0.976700086f, -0.214608811f,
+    0.976369731f, -0.216106797f,
+    0.976037079f, -0.217604275f,
+    0.975702130f, -0.219101240f,
+    0.975364885f, -0.220597690f,
+    0.975025345f, -0.222093621f,
+    0.974683511f, -0.223589029f,
+    0.974339383f, -0.225083911f,
+    0.973992962f, -0.226578264f,
+    0.973644250f, -0.228072083f,
+    0.973293246f, -0.229565366f,
+    0.972939952f, -0.231058108f,
+    0.972584369f, -0.232550307f,
+    0.972226497f, -0.234041959f,
+    0.971866337f, -0.235533059f,
+    0.971503891f, -0.237023606f,
+    0.971139158f, -0.238513595f,
+    0.970772141f, -0.240003022f,
+    0.970402839f, -0.241491885f,
+    0.970031253f, -0.242980180f,
+    0.969657385f, -0.244467903f,
+    0.969281235f, -0.245955050f,
+    0.968902805f, -0.247441619f,
+    0.968522094f, -0.248927606f,
+    0.968139105f, -0.250413007f,
+    0.967753837f, -0.251897818f,
+    0.967366292f, -0.253382037f,
+    0.966976471f, -0.254865660f,
+    0.966584374f, -0.256348682f,
+    0.966190003f, -0.257831102f,
+    0.965793359f, -0.259312915f,
+    0.965394442f, -0.260794118f,
+    0.964993253f, -0.262274707f,
+    0.964589793f, -0.263754679f,
+    0.964184064f, -0.265234030f,
+    0.963776066f, -0.266712757f,
+    0.963365800f, -0.268190857f,
+    0.962953267f, -0.269668326f,
+    0.962538468f, -0.271145160f,
+    0.962121404f, -0.272621355f,
+    0.961702077f, -0.274096910f,
+    0.961280486f, -0.275571819f,
+    0.960856633f, -0.277046080f,
+    0.960430519f, -0.278519689f,
+    0.960002146f, -0.279992643f,
+    0.959571513f, -0.281464938f,
+    0.959138622f, -0.282936570f,
+    0.958703475f, -0.284407537f,
+    0.958266071f, -0.285877835f,
+    0.957826413f, -0.287347460f,
+    0.957384501f, -0.288816408f,
+    0.956940336f, -0.290284677f,
+    0.956493919f, -0.291752263f,
+    0.956045251f, -0.293219163f,
+    0.955594334f, -0.294685372f,
+    0.955141168f, -0.296150888f,
+    0.954685755f, -0.297615707f,
+    0.954228095f, -0.299079826f,
+    0.953768190f, -0.300543241f,
+    0.953306040f, -0.302005949f,
+    0.952841648f, -0.303467947f,
+    0.952375013f, -0.304929230f,
+    0.951906137f, -0.306389795f,
+    0.951435021f, -0.307849640f,
+    0.950961666f, -0.309308760f,
+    0.950486074f, -0.310767153f,
+    0.950008245f, -0.312224814f,
+    0.949528181f, -0.313681740f,
+    0.949045882f, -0.315137929f,
+    0.948561350f, -0.316593376f,
+    0.948074586f, -0.318048077f,
+    0.947585591f, -0.319502031f,
+    0.947094366f, -0.320955232f,
+    0.946600913f, -0.322407679f,
+    0.946105232f, -0.323859367f,
+    0.945607325f, -0.325310292f,
+    0.945107193f, -0.326760452f,
+    0.944604837f, -0.328209844f,
+    0.944100258f, -0.329658463f,
+    0.943593458f, -0.331106306f,
+    0.943084437f, -0.332553370f,
+    0.942573198f, -0.333999651f,
+    0.942059740f, -0.335445147f,
+    0.941544065f, -0.336889853f,
+    0.941026175f, -0.338333767f,
+    0.940506071f, -0.339776884f,
+    0.939983753f, -0.341219202f,
+    0.939459224f, -0.342660717f,
+    0.938932484f, -0.344101426f,
+    0.938403534f, -0.345541325f,
+    0.937872376f, -0.346980411f,
+    0.937339012f, -0.348418680f,
+    0.936803442f, -0.349856130f,
+    0.936265667f, -0.351292756f,
+    0.935725689f, -0.352728556f,
+    0.935183510f, -0.354163525f,
+    0.934639130f, -0.355597662f,
+    0.934092550f, -0.357030961f,
+    0.933543773f, -0.358463421f,
+    0.932992799f, -0.359895037f,
+    0.932439629f, -0.361325806f,
+    0.931884266f, -0.362755724f,
+    0.931326709f, -0.364184790f,
+    0.930766961f, -0.365612998f,
+    0.930205023f, -0.367040346f,
+    0.929640896f, -0.368466830f,
+    0.929074581f, -0.369892447f,
+    0.928506080f, -0.371317194f,
+    0.927935395f, -0.372741067f,
+    0.927362526f, -0.374164063f,
+    0.926787474f, -0.375586178f,
+    0.926210242f, -0.377007410f,
+    0.925630831f, -0.378427755f,
+    0.925049241f, -0.379847209f,
+    0.924465474f, -0.381265769f,
+    0.923879533f, -0.382683432f,
+    0.923291417f, -0.384100195f,
+    0.922701128f, -0.385516054f,
+    0.922108669f, -0.386931006f,
+    0.921514039f, -0.388345047f,
+    0.920917242f, -0.389758174f,
+    0.920318277f, -0.391170384f,
+    0.919717146f, -0.392581674f,
+    0.919113852f, -0.393992040f,
+    0.918508394f, -0.395401479f,
+    0.917900776f, -0.396809987f,
+    0.917290997f, -0.398217562f,
+    0.916679060f, -0.399624200f,
+    0.916064966f, -0.401029897f,
+    0.915448716f, -0.402434651f,
+    0.914830312f, -0.403838458f,
+    0.914209756f, -0.405241314f,
+    0.913587048f, -0.406643217f,
+    0.912962190f, -0.408044163f,
+    0.912335185f, -0.409444149f,
+    0.911706032f, -0.410843171f,
+    0.911074734f, -0.412241227f,
+    0.910441292f, -0.413638312f,
+    0.909805708f, -0.415034424f,
+    0.909167983f, -0.416429560f,
+    0.908528119f, -0.417823716f,
+    0.907886116f, -0.419216888f,
+    0.907241978f, -0.420609074f,
+    0.906595705f, -0.422000271f,
+    0.905947298f, -0.423390474f,
+    0.905296759f, -0.424779681f,
+    0.904644091f, -0.426167889f,
+    0.903989293f, -0.427555093f,
+    0.903332368f, -0.428941292f,
+    0.902673318f, -0.430326481f,
+    0.902012144f, -0.431710658f,
+    0.901348847f, -0.433093819f,
+    0.900683429f, -0.434475961f,
+    0.900015892f, -0.435857080f,
+    0.899346237f, -0.437237174f,
+    0.898674466f, -0.438616239f,
+    0.898000580f, -0.439994271f,
+    0.897324581f, -0.441371269f,
+    0.896646470f, -0.442747228f,
+    0.895966250f, -0.444122145f,
+    0.895283921f, -0.445496017f,
+    0.894599486f, -0.446868840f,
+    0.893912945f, -0.448240612f,
+    0.893224301f, -0.449611330f,
+    0.892533555f, -0.450980989f,
+    0.891840709f, -0.452349587f,
+    0.891145765f, -0.453717121f,
+    0.890448723f, -0.455083587f,
+    0.889749586f, -0.456448982f,
+    0.889048356f, -0.457813304f,
+    0.888345033f, -0.459176548f,
+    0.887639620f, -0.460538711f,
+    0.886932119f, -0.461899791f,
+    0.886222530f, -0.463259784f,
+    0.885510856f, -0.464618686f,
+    0.884797098f, -0.465976496f,
+    0.884081259f, -0.467333209f,
+    0.883363339f, -0.468688822f,
+    0.882643340f, -0.470043332f,
+    0.881921264f, -0.471396737f,
+    0.881197113f, -0.472749032f,
+    0.880470889f, -0.474100215f,
+    0.879742593f, -0.475450282f,
+    0.879012226f, -0.476799230f,
+    0.878279792f, -0.478147056f,
+    0.877545290f, -0.479493758f,
+    0.876808724f, -0.480839331f,
+    0.876070094f, -0.482183772f,
+    0.875329403f, -0.483527079f,
+    0.874586652f, -0.484869248f,
+    0.873841843f, -0.486210276f,
+    0.873094978f, -0.487550160f,
+    0.872346059f, -0.488888897f,
+    0.871595087f, -0.490226483f,
+    0.870842063f, -0.491562916f,
+    0.870086991f, -0.492898192f,
+    0.869329871f, -0.494232309f,
+    0.868570706f, -0.495565262f,
+    0.867809497f, -0.496897049f,
+    0.867046246f, -0.498227667f,
+    0.866280954f, -0.499557113f,
+    0.865513624f, -0.500885383f,
+    0.864744258f, -0.502212474f,
+    0.863972856f, -0.503538384f,
+    0.863199422f, -0.504863109f,
+    0.862423956f, -0.506186645f,
+    0.861646461f, -0.507508991f,
+    0.860866939f, -0.508830143f,
+    0.860085390f, -0.510150097f,
+    0.859301818f, -0.511468850f,
+    0.858516224f, -0.512786401f,
+    0.857728610f, -0.514102744f,
+    0.856938977f, -0.515417878f,
+    0.856147328f, -0.516731799f,
+    0.855353665f, -0.518044504f,
+    0.854557988f, -0.519355990f,
+    0.853760301f, -0.520666254f,
+    0.852960605f, -0.521975293f,
+    0.852158902f, -0.523283103f,
+    0.851355193f, -0.524589683f,
+    0.850549481f, -0.525895027f,
+    0.849741768f, -0.527199135f,
+    0.848932055f, -0.528502002f,
+    0.848120345f, -0.529803625f,
+    0.847306639f, -0.531104001f,
+    0.846490939f, -0.532403128f,
+    0.845673247f, -0.533701002f,
+    0.844853565f, -0.534997620f,
+    0.844031895f, -0.536292979f,
+    0.843208240f, -0.537587076f,
+    0.842382600f, -0.538879909f,
+    0.841554977f, -0.540171473f,
+    0.840725375f, -0.541461766f,
+    0.839893794f, -0.542750785f,
+    0.839060237f, -0.544038527f,
+    0.838224706f, -0.545324988f,
+    0.837387202f, -0.546610167f,
+    0.836547727f, -0.547894059f,
+    0.835706284f, -0.549176662f,
+    0.834862875f, -0.550457973f,
+    0.834017501f, -0.551737988f,
+    0.833170165f, -0.553016706f,
+    0.832320868f, -0.554294121f,
+    0.831469612f, -0.555570233f,
+    0.830616400f, -0.556845037f,
+    0.829761234f, -0.558118531f,
+    0.828904115f, -0.559390712f,
+    0.828045045f, -0.560661576f,
+    0.827184027f, -0.561931121f,
+    0.826321063f, -0.563199344f,
+    0.825456154f, -0.564466242f,
+    0.824589303f, -0.565731811f,
+    0.823720511f, -0.566996049f,
+    0.822849781f, -0.568258953f,
+    0.821977115f, -0.569520519f,
+    0.821102515f, -0.570780746f,
+    0.820225983f, -0.572039629f,
+    0.819347520f, -0.573297167f,
+    0.818467130f, -0.574553355f,
+    0.817584813f, -0.575808191f,
+    0.816700573f, -0.577061673f,
+    0.815814411f, -0.578313796f,
+    0.814926329f, -0.579564559f,
+    0.814036330f, -0.580813958f,
+    0.813144415f, -0.582061990f,
+    0.812250587f, -0.583308653f,
+    0.811354847f, -0.584553943f,
+    0.810457198f, -0.585797857f,
+    0.809557642f, -0.587040394f,
+    0.808656182f, -0.588281548f,
+    0.807752818f, -0.589521319f,
+    0.806847554f, -0.590759702f,
+    0.805940391f, -0.591996695f,
+    0.805031331f, -0.593232295f,
+    0.804120377f, -0.594466499f,
+    0.803207531f, -0.595699304f,
+    0.802292796f, -0.596930708f,
+    0.801376172f, -0.598160707f,
+    0.800457662f, -0.599389298f,
+    0.799537269f, -0.600616479f,
+    0.798614995f, -0.601842247f,
+    0.797690841f, -0.603066599f,
+    0.796764810f, -0.604289531f,
+    0.795836905f, -0.605511041f,
+    0.794907126f, -0.606731127f,
+    0.793975478f, -0.607949785f,
+    0.793041960f, -0.609167012f,
+    0.792106577f, -0.610382806f,
+    0.791169330f, -0.611597164f,
+    0.790230221f, -0.612810082f,
+    0.789289253f, -0.614021559f,
+    0.788346428f, -0.615231591f,
+    0.787401747f, -0.616440175f,
+    0.786455214f, -0.617647308f,
+    0.785506830f, -0.618852988f,
+    0.784556597f, -0.620057212f,
+    0.783604519f, -0.621259977f,
+    0.782650596f, -0.622461279f,
+    0.781694832f, -0.623661118f,
+    0.780737229f, -0.624859488f,
+    0.779777788f, -0.626056388f,
+    0.778816512f, -0.627251815f,
+    0.777853404f, -0.628445767f,
+    0.776888466f, -0.629638239f,
+    0.775921699f, -0.630829230f,
+    0.774953107f, -0.632018736f,
+    0.773982691f, -0.633206755f,
+    0.773010453f, -0.634393284f,
+    0.772036397f, -0.635578320f,
+    0.771060524f, -0.636761861f,
+    0.770082837f, -0.637943904f,
+    0.769103338f, -0.639124445f,
+    0.768122029f, -0.640303482f,
+    0.767138912f, -0.641481013f,
+    0.766153990f, -0.642657034f,
+    0.765167266f, -0.643831543f,
+    0.764178741f, -0.645004537f,
+    0.763188417f, -0.646176013f,
+    0.762196298f, -0.647345969f,
+    0.761202385f, -0.648514401f,
+    0.760206682f, -0.649681307f,
+    0.759209189f, -0.650846685f,
+    0.758209910f, -0.652010531f,
+    0.757208847f, -0.653172843f,
+    0.756206001f, -0.654333618f,
+    0.755201377f, -0.655492853f,
+    0.754194975f, -0.656650546f,
+    0.753186799f, -0.657806693f,
+    0.752176850f, -0.658961293f,
+    0.751165132f, -0.660114342f,
+    0.750151646f, -0.661265838f,
+    0.749136395f, -0.662415778f,
+    0.748119380f, -0.663564159f,
+    0.747100606f, -0.664710978f,
+    0.746080074f, -0.665856234f,
+    0.745057785f, -0.666999922f,
+    0.744033744f, -0.668142041f,
+    0.743007952f, -0.669282588f,
+    0.741980412f, -0.670421560f,
+    0.740951125f, -0.671558955f,
+    0.739920095f, -0.672694769f,
+    0.738887324f, -0.673829000f,
+    0.737852815f, -0.674961646f,
+    0.736816569f, -0.676092704f,
+    0.735778589f, -0.677222170f,
+    0.734738878f, -0.678350043f,
+    0.733697438f, -0.679476320f,
+    0.732654272f, -0.680600998f,
+    0.731609381f, -0.681724074f,
+    0.730562769f, -0.682845546f,
+    0.729514438f, -0.683965412f,
+    0.728464390f, -0.685083668f,
+    0.727412629f, -0.686200312f,
+    0.726359155f, -0.687315341f,
+    0.725303972f, -0.688428753f,
+    0.724247083f, -0.689540545f,
+    0.723188489f, -0.690650714f,
+    0.722128194f, -0.691759258f,
+    0.721066199f, -0.692866175f,
+    0.720002508f, -0.693971461f,
+    0.718937122f, -0.695075114f,
+    0.717870045f, -0.696177131f,
+    0.716801279f, -0.697277511f,
+    0.715730825f, -0.698376249f,
+    0.714658688f, -0.699473345f,
+    0.713584869f, -0.700568794f,
+    0.712509371f, -0.701662595f,
+    0.711432196f, -0.702754744f,
+    0.710353347f, -0.703845241f,
+    0.709272826f, -0.704934080f,
+    0.708190637f, -0.706021261f,
+    0.707106781f, -0.707106781f,
+    0.706021261f, -0.708190637f,
+    0.704934080f, -0.709272826f,
+    0.703845241f, -0.710353347f,
+    0.702754744f, -0.711432196f,
+    0.701662595f, -0.712509371f,
+    0.700568794f, -0.713584869f,
+    0.699473345f, -0.714658688f,
+    0.698376249f, -0.715730825f,
+    0.697277511f, -0.716801279f,
+    0.696177131f, -0.717870045f,
+    0.695075114f, -0.718937122f,
+    0.693971461f, -0.720002508f,
+    0.692866175f, -0.721066199f,
+    0.691759258f, -0.722128194f,
+    0.690650714f, -0.723188489f,
+    0.689540545f, -0.724247083f,
+    0.688428753f, -0.725303972f,
+    0.687315341f, -0.726359155f,
+    0.686200312f, -0.727412629f,
+    0.685083668f, -0.728464390f,
+    0.683965412f, -0.729514438f,
+    0.682845546f, -0.730562769f,
+    0.681724074f, -0.731609381f,
+    0.680600998f, -0.732654272f,
+    0.679476320f, -0.733697438f,
+    0.678350043f, -0.734738878f,
+    0.677222170f, -0.735778589f,
+    0.676092704f, -0.736816569f,
+    0.674961646f, -0.737852815f,
+    0.673829000f, -0.738887324f,
+    0.672694769f, -0.739920095f,
+    0.671558955f, -0.740951125f,
+    0.670421560f, -0.741980412f,
+    0.669282588f, -0.743007952f,
+    0.668142041f, -0.744033744f,
+    0.666999922f, -0.745057785f,
+    0.665856234f, -0.746080074f,
+    0.664710978f, -0.747100606f,
+    0.663564159f, -0.748119380f,
+    0.662415778f, -0.749136395f,
+    0.661265838f, -0.750151646f,
+    0.660114342f, -0.751165132f,
+    0.658961293f, -0.752176850f,
+    0.657806693f, -0.753186799f,
+    0.656650546f, -0.754194975f,
+    0.655492853f, -0.755201377f,
+    0.654333618f, -0.756206001f,
+    0.653172843f, -0.757208847f,
+    0.652010531f, -0.758209910f,
+    0.650846685f, -0.759209189f,
+    0.649681307f, -0.760206682f,
+    0.648514401f, -0.761202385f,
+    0.647345969f, -0.762196298f,
+    0.646176013f, -0.763188417f,
+    0.645004537f, -0.764178741f,
+    0.643831543f, -0.765167266f,
+    0.642657034f, -0.766153990f,
+    0.641481013f, -0.767138912f,
+    0.640303482f, -0.768122029f,
+    0.639124445f, -0.769103338f,
+    0.637943904f, -0.770082837f,
+    0.636761861f, -0.771060524f,
+    0.635578320f, -0.772036397f,
+    0.634393284f, -0.773010453f,
+    0.633206755f, -0.773982691f,
+    0.632018736f, -0.774953107f,
+    0.630829230f, -0.775921699f,
+    0.629638239f, -0.776888466f,
+    0.628445767f, -0.777853404f,
+    0.627251815f, -0.778816512f,
+    0.626056388f, -0.779777788f,
+    0.624859488f, -0.780737229f,
+    0.623661118f, -0.781694832f,
+    0.622461279f, -0.782650596f,
+    0.621259977f, -0.783604519f,
+    0.620057212f, -0.784556597f,
+    0.618852988f, -0.785506830f,
+    0.617647308f, -0.786455214f,
+    0.616440175f, -0.787401747f,
+    0.615231591f, -0.788346428f,
+    0.614021559f, -0.789289253f,
+    0.612810082f, -0.790230221f,
+    0.611597164f, -0.791169330f,
+    0.610382806f, -0.792106577f,
+    0.609167012f, -0.793041960f,
+    0.607949785f, -0.793975478f,
+    0.606731127f, -0.794907126f,
+    0.605511041f, -0.795836905f,
+    0.604289531f, -0.796764810f,
+    0.603066599f, -0.797690841f,
+    0.601842247f, -0.798614995f,
+    0.600616479f, -0.799537269f,
+    0.599389298f, -0.800457662f,
+    0.598160707f, -0.801376172f,
+    0.596930708f, -0.802292796f,
+    0.595699304f, -0.803207531f,
+    0.594466499f, -0.804120377f,
+    0.593232295f, -0.805031331f,
+    0.591996695f, -0.805940391f,
+    0.590759702f, -0.806847554f,
+    0.589521319f, -0.807752818f,
+    0.588281548f, -0.808656182f,
+    0.587040394f, -0.809557642f,
+    0.585797857f, -0.810457198f,
+    0.584553943f, -0.811354847f,
+    0.583308653f, -0.812250587f,
+    0.582061990f, -0.813144415f,
+    0.580813958f, -0.814036330f,
+    0.579564559f, -0.814926329f,
+    0.578313796f, -0.815814411f,
+    0.577061673f, -0.816700573f,
+    0.575808191f, -0.817584813f,
+    0.574553355f, -0.818467130f,
+    0.573297167f, -0.819347520f,
+    0.572039629f, -0.820225983f,
+    0.570780746f, -0.821102515f,
+    0.569520519f, -0.821977115f,
+    0.568258953f, -0.822849781f,
+    0.566996049f, -0.823720511f,
+    0.565731811f, -0.824589303f,
+    0.564466242f, -0.825456154f,
+    0.563199344f, -0.826321063f,
+    0.561931121f, -0.827184027f,
+    0.560661576f, -0.828045045f,
+    0.559390712f, -0.828904115f,
+    0.558118531f, -0.829761234f,
+    0.556845037f, -0.830616400f,
+    0.555570233f, -0.831469612f,
+    0.554294121f, -0.832320868f,
+    0.553016706f, -0.833170165f,
+    0.551737988f, -0.834017501f,
+    0.550457973f, -0.834862875f,
+    0.549176662f, -0.835706284f,
+    0.547894059f, -0.836547727f,
+    0.546610167f, -0.837387202f,
+    0.545324988f, -0.838224706f,
+    0.544038527f, -0.839060237f,
+    0.542750785f, -0.839893794f,
+    0.541461766f, -0.840725375f,
+    0.540171473f, -0.841554977f,
+    0.538879909f, -0.842382600f,
+    0.537587076f, -0.843208240f,
+    0.536292979f, -0.844031895f,
+    0.534997620f, -0.844853565f,
+    0.533701002f, -0.845673247f,
+    0.532403128f, -0.846490939f,
+    0.531104001f, -0.847306639f,
+    0.529803625f, -0.848120345f,
+    0.528502002f, -0.848932055f,
+    0.527199135f, -0.849741768f,
+    0.525895027f, -0.850549481f,
+    0.524589683f, -0.851355193f,
+    0.523283103f, -0.852158902f,
+    0.521975293f, -0.852960605f,
+    0.520666254f, -0.853760301f,
+    0.519355990f, -0.854557988f,
+    0.518044504f, -0.855353665f,
+    0.516731799f, -0.856147328f,
+    0.515417878f, -0.856938977f,
+    0.514102744f, -0.857728610f,
+    0.512786401f, -0.858516224f,
+    0.511468850f, -0.859301818f,
+    0.510150097f, -0.860085390f,
+    0.508830143f, -0.860866939f,
+    0.507508991f, -0.861646461f,
+    0.506186645f, -0.862423956f,
+    0.504863109f, -0.863199422f,
+    0.503538384f, -0.863972856f,
+    0.502212474f, -0.864744258f,
+    0.500885383f, -0.865513624f,
+    0.499557113f, -0.866280954f,
+    0.498227667f, -0.867046246f,
+    0.496897049f, -0.867809497f,
+    0.495565262f, -0.868570706f,
+    0.494232309f, -0.869329871f,
+    0.492898192f, -0.870086991f,
+    0.491562916f, -0.870842063f,
+    0.490226483f, -0.871595087f,
+    0.488888897f, -0.872346059f,
+    0.487550160f, -0.873094978f,
+    0.486210276f, -0.873841843f,
+    0.484869248f, -0.874586652f,
+    0.483527079f, -0.875329403f,
+    0.482183772f, -0.876070094f,
+    0.480839331f, -0.876808724f,
+    0.479493758f, -0.877545290f,
+    0.478147056f, -0.878279792f,
+    0.476799230f, -0.879012226f,
+    0.475450282f, -0.879742593f,
+    0.474100215f, -0.880470889f,
+    0.472749032f, -0.881197113f,
+    0.471396737f, -0.881921264f,
+    0.470043332f, -0.882643340f,
+    0.468688822f, -0.883363339f,
+    0.467333209f, -0.884081259f,
+    0.465976496f, -0.884797098f,
+    0.464618686f, -0.885510856f,
+    0.463259784f, -0.886222530f,
+    0.461899791f, -0.886932119f,
+    0.460538711f, -0.887639620f,
+    0.459176548f, -0.888345033f,
+    0.457813304f, -0.889048356f,
+    0.456448982f, -0.889749586f,
+    0.455083587f, -0.890448723f,
+    0.453717121f, -0.891145765f,
+    0.452349587f, -0.891840709f,
+    0.450980989f, -0.892533555f,
+    0.449611330f, -0.893224301f,
+    0.448240612f, -0.893912945f,
+    0.446868840f, -0.894599486f,
+    0.445496017f, -0.895283921f,
+    0.444122145f, -0.895966250f,
+    0.442747228f, -0.896646470f,
+    0.441371269f, -0.897324581f,
+    0.439994271f, -0.898000580f,
+    0.438616239f, -0.898674466f,
+    0.437237174f, -0.899346237f,
+    0.435857080f, -0.900015892f,
+    0.434475961f, -0.900683429f,
+    0.433093819f, -0.901348847f,
+    0.431710658f, -0.902012144f,
+    0.430326481f, -0.902673318f,
+    0.428941292f, -0.903332368f,
+    0.427555093f, -0.903989293f,
+    0.426167889f, -0.904644091f,
+    0.424779681f, -0.905296759f,
+    0.423390474f, -0.905947298f,
+    0.422000271f, -0.906595705f,
+    0.420609074f, -0.907241978f,
+    0.419216888f, -0.907886116f,
+    0.417823716f, -0.908528119f,
+    0.416429560f, -0.909167983f,
+    0.415034424f, -0.909805708f,
+    0.413638312f, -0.910441292f,
+    0.412241227f, -0.911074734f,
+    0.410843171f, -0.911706032f,
+    0.409444149f, -0.912335185f,
+    0.408044163f, -0.912962190f,
+    0.406643217f, -0.913587048f,
+    0.405241314f, -0.914209756f,
+    0.403838458f, -0.914830312f,
+    0.402434651f, -0.915448716f,
+    0.401029897f, -0.916064966f,
+    0.399624200f, -0.916679060f,
+    0.398217562f, -0.917290997f,
+    0.396809987f, -0.917900776f,
+    0.395401479f, -0.918508394f,
+    0.393992040f, -0.919113852f,
+    0.392581674f, -0.919717146f,
+    0.391170384f, -0.920318277f,
+    0.389758174f, -0.920917242f,
+    0.388345047f, -0.921514039f,
+    0.386931006f, -0.922108669f,
+    0.385516054f, -0.922701128f,
+    0.384100195f, -0.923291417f,
+    0.382683432f, -0.923879533f,
+    0.381265769f, -0.924465474f,
+    0.379847209f, -0.925049241f,
+    0.378427755f, -0.925630831f,
+    0.377007410f, -0.926210242f,
+    0.375586178f, -0.926787474f,
+    0.374164063f, -0.927362526f,
+    0.372741067f, -0.927935395f,
+    0.371317194f, -0.928506080f,
+    0.369892447f, -0.929074581f,
+    0.368466830f, -0.929640896f,
+    0.367040346f, -0.930205023f,
+    0.365612998f, -0.930766961f,
+    0.364184790f, -0.931326709f,
+    0.362755724f, -0.931884266f,
+    0.361325806f, -0.932439629f,
+    0.359895037f, -0.932992799f,
+    0.358463421f, -0.933543773f,
+    0.357030961f, -0.934092550f,
+    0.355597662f, -0.934639130f,
+    0.354163525f, -0.935183510f,
+    0.352728556f, -0.935725689f,
+    0.351292756f, -0.936265667f,
+    0.349856130f, -0.936803442f,
+    0.348418680f, -0.937339012f,
+    0.346980411f, -0.937872376f,
+    0.345541325f, -0.938403534f,
+    0.344101426f, -0.938932484f,
+    0.342660717f, -0.939459224f,
+    0.341219202f, -0.939983753f,
+    0.339776884f, -0.940506071f,
+    0.338333767f, -0.941026175f,
+    0.336889853f, -0.941544065f,
+    0.335445147f, -0.942059740f,
+    0.333999651f, -0.942573198f,
+    0.332553370f, -0.943084437f,
+    0.331106306f, -0.943593458f,
+    0.329658463f, -0.944100258f,
+    0.328209844f, -0.944604837f,
+    0.326760452f, -0.945107193f,
+    0.325310292f, -0.945607325f,
+    0.323859367f, -0.946105232f,
+    0.322407679f, -0.946600913f,
+    0.320955232f, -0.947094366f,
+    0.319502031f, -0.947585591f,
+    0.318048077f, -0.948074586f,
+    0.316593376f, -0.948561350f,
+    0.315137929f, -0.949045882f,
+    0.313681740f, -0.949528181f,
+    0.312224814f, -0.950008245f,
+    0.310767153f, -0.950486074f,
+    0.309308760f, -0.950961666f,
+    0.307849640f, -0.951435021f,
+    0.306389795f, -0.951906137f,
+    0.304929230f, -0.952375013f,
+    0.303467947f, -0.952841648f,
+    0.302005949f, -0.953306040f,
+    0.300543241f, -0.953768190f,
+    0.299079826f, -0.954228095f,
+    0.297615707f, -0.954685755f,
+    0.296150888f, -0.955141168f,
+    0.294685372f, -0.955594334f,
+    0.293219163f, -0.956045251f,
+    0.291752263f, -0.956493919f,
+    0.290284677f, -0.956940336f,
+    0.288816408f, -0.957384501f,
+    0.287347460f, -0.957826413f,
+    0.285877835f, -0.958266071f,
+    0.284407537f, -0.958703475f,
+    0.282936570f, -0.959138622f,
+    0.281464938f, -0.959571513f,
+    0.279992643f, -0.960002146f,
+    0.278519689f, -0.960430519f,
+    0.277046080f, -0.960856633f,
+    0.275571819f, -0.961280486f,
+    0.274096910f, -0.961702077f,
+    0.272621355f, -0.962121404f,
+    0.271145160f, -0.962538468f,
+    0.269668326f, -0.962953267f,
+    0.268190857f, -0.963365800f,
+    0.266712757f, -0.963776066f,
+    0.265234030f, -0.964184064f,
+    0.263754679f, -0.964589793f,
+    0.262274707f, -0.964993253f,
+    0.260794118f, -0.965394442f,
+    0.259312915f, -0.965793359f,
+    0.257831102f, -0.966190003f,
+    0.256348682f, -0.966584374f,
+    0.254865660f, -0.966976471f,
+    0.253382037f, -0.967366292f,
+    0.251897818f, -0.967753837f,
+    0.250413007f, -0.968139105f,
+    0.248927606f, -0.968522094f,
+    0.247441619f, -0.968902805f,
+    0.245955050f, -0.969281235f,
+    0.244467903f, -0.969657385f,
+    0.242980180f, -0.970031253f,
+    0.241491885f, -0.970402839f,
+    0.240003022f, -0.970772141f,
+    0.238513595f, -0.971139158f,
+    0.237023606f, -0.971503891f,
+    0.235533059f, -0.971866337f,
+    0.234041959f, -0.972226497f,
+    0.232550307f, -0.972584369f,
+    0.231058108f, -0.972939952f,
+    0.229565366f, -0.973293246f,
+    0.228072083f, -0.973644250f,
+    0.226578264f, -0.973992962f,
+    0.225083911f, -0.974339383f,
+    0.223589029f, -0.974683511f,
+    0.222093621f, -0.975025345f,
+    0.220597690f, -0.975364885f,
+    0.219101240f, -0.975702130f,
+    0.217604275f, -0.976037079f,
+    0.216106797f, -0.976369731f,
+    0.214608811f, -0.976700086f,
+    0.213110320f, -0.977028143f,
+    0.211611327f, -0.977353900f,
+    0.210111837f, -0.977677358f,
+    0.208611852f, -0.977998515f,
+    0.207111376f, -0.978317371f,
+    0.205610413f, -0.978633924f,
+    0.204108966f, -0.978948175f,
+    0.202607039f, -0.979260123f,
+    0.201104635f, -0.979569766f,
+    0.199601758f, -0.979877104f,
+    0.198098411f, -0.980182136f,
+    0.196594598f, -0.980484862f,
+    0.195090322f, -0.980785280f,
+    0.193585587f, -0.981083391f,
+    0.192080397f, -0.981379193f,
+    0.190574755f, -0.981672686f,
+    0.189068664f, -0.981963869f,
+    0.187562129f, -0.982252741f,
+    0.186055152f, -0.982539302f,
+    0.184547737f, -0.982823551f,
+    0.183039888f, -0.983105487f,
+    0.181531608f, -0.983385110f,
+    0.180022901f, -0.983662419f,
+    0.178513771f, -0.983937413f,
+    0.177004220f, -0.984210092f,
+    0.175494253f, -0.984480455f,
+    0.173983873f, -0.984748502f,
+    0.172473084f, -0.985014231f,
+    0.170961889f, -0.985277642f,
+    0.169450291f, -0.985538735f,
+    0.167938295f, -0.985797509f,
+    0.166425904f, -0.986053963f,
+    0.164913120f, -0.986308097f,
+    0.163399949f, -0.986559910f,
+    0.161886394f, -0.986809402f,
+    0.160372457f, -0.987056571f,
+    0.158858143f, -0.987301418f,
+    0.157343456f, -0.987543942f,
+    0.155828398f, -0.987784142f,
+    0.154312973f, -0.988022017f,
+    0.152797185f, -0.988257568f,
+    0.151281038f, -0.988490793f,
+    0.149764535f, -0.988721692f,
+    0.148247679f, -0.988950265f,
+    0.146730474f, -0.989176510f,
+    0.145212925f, -0.989400428f,
+    0.143695033f, -0.989622017f,
+    0.142176804f, -0.989841278f,
+    0.140658239f, -0.990058210f,
+    0.139139344f, -0.990272812f,
+    0.137620122f, -0.990485084f,
+    0.136100575f, -0.990695025f,
+    0.134580709f, -0.990902635f,
+    0.133060525f, -0.991107914f,
+    0.131540029f, -0.991310860f,
+    0.130019223f, -0.991511473f,
+    0.128498111f, -0.991709754f,
+    0.126976696f, -0.991905700f,
+    0.125454983f, -0.992099313f,
+    0.123932975f, -0.992290591f,
+    0.122410675f, -0.992479535f,
+    0.120888087f, -0.992666142f,
+    0.119365215f, -0.992850414f,
+    0.117842062f, -0.993032350f,
+    0.116318631f, -0.993211949f,
+    0.114794927f, -0.993389211f,
+    0.113270952f, -0.993564136f,
+    0.111746711f, -0.993736722f,
+    0.110222207f, -0.993906970f,
+    0.108697444f, -0.994074879f,
+    0.107172425f, -0.994240449f,
+    0.105647154f, -0.994403680f,
+    0.104121634f, -0.994564571f,
+    0.102595869f, -0.994723121f,
+    0.101069863f, -0.994879331f,
+    0.099543619f, -0.995033199f,
+    0.098017140f, -0.995184727f,
+    0.096490431f, -0.995333912f,
+    0.094963495f, -0.995480755f,
+    0.093436336f, -0.995625256f,
+    0.091908956f, -0.995767414f,
+    0.090381361f, -0.995907229f,
+    0.088853553f, -0.996044701f,
+    0.087325535f, -0.996179829f,
+    0.085797312f, -0.996312612f,
+    0.084268888f, -0.996443051f,
+    0.082740265f, -0.996571146f,
+    0.081211447f, -0.996696895f,
+    0.079682438f, -0.996820299f,
+    0.078153242f, -0.996941358f,
+    0.076623861f, -0.997060070f,
+    0.075094301f, -0.997176437f,
+    0.073564564f, -0.997290457f,
+    0.072034653f, -0.997402130f,
+    0.070504573f, -0.997511456f,
+    0.068974328f, -0.997618435f,
+    0.067443920f, -0.997723067f,
+    0.065913353f, -0.997825350f,
+    0.064382631f, -0.997925286f,
+    0.062851758f, -0.998022874f,
+    0.061320736f, -0.998118113f,
+    0.059789571f, -0.998211003f,
+    0.058258265f, -0.998301545f,
+    0.056726821f, -0.998389737f,
+    0.055195244f, -0.998475581f,
+    0.053663538f, -0.998559074f,
+    0.052131705f, -0.998640218f,
+    0.050599749f, -0.998719012f,
+    0.049067674f, -0.998795456f,
+    0.047535484f, -0.998869550f,
+    0.046003182f, -0.998941293f,
+    0.044470772f, -0.999010686f,
+    0.042938257f, -0.999077728f,
+    0.041405641f, -0.999142419f,
+    0.039872928f, -0.999204759f,
+    0.038340120f, -0.999264747f,
+    0.036807223f, -0.999322385f,
+    0.035274239f, -0.999377670f,
+    0.033741172f, -0.999430605f,
+    0.032208025f, -0.999481187f,
+    0.030674803f, -0.999529418f,
+    0.029141509f, -0.999575296f,
+    0.027608146f, -0.999618822f,
+    0.026074718f, -0.999659997f,
+    0.024541229f, -0.999698819f,
+    0.023007681f, -0.999735288f,
+    0.021474080f, -0.999769405f,
+    0.019940429f, -0.999801170f,
+    0.018406730f, -0.999830582f,
+    0.016872988f, -0.999857641f,
+    0.015339206f, -0.999882347f,
+    0.013805389f, -0.999904701f,
+    0.012271538f, -0.999924702f,
+    0.010737659f, -0.999942350f,
+    0.009203755f, -0.999957645f,
+    0.007669829f, -0.999970586f,
+    0.006135885f, -0.999981175f,
+    0.004601926f, -0.999989411f,
+    0.003067957f, -0.999995294f,
+    0.001533980f, -0.999998823f
+};
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALL_TABLES) */
+
+/**
+  @ingroup RealFFT
+ */
+
+/**
+  @addtogroup RealFFT_Table Real FFT Tables
+  @{
+ */
+
+/**
+  @par
+  Generation of realCoefA array:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
+const float32_t realCoefA[8192] = {
+  0.500000000000000f, -0.500000000000000f, 0.499616503715515f, -0.499999850988388f,
+  0.499233007431030f, -0.499999403953552f, 0.498849511146545f, -0.499998688697815f,
+  0.498466014862061f, -0.499997645616531f, 0.498082518577576f, -0.499996334314346f,
+  0.497699022293091f, -0.499994695186615f, 0.497315555810928f, -0.499992787837982f,
+  0.496932059526443f, -0.499990582466125f, 0.496548563241959f, -0.499988079071045f,
+  0.496165096759796f, -0.499985307455063f, 0.495781600475311f, -0.499982208013535f,
+  0.495398133993149f, -0.499978810548782f, 0.495014637708664f, -0.499975144863129f,
+  0.494631171226501f, -0.499971181154251f, 0.494247704744339f, -0.499966919422150f,
+  0.493864238262177f, -0.499962359666824f, 0.493480771780014f, -0.499957501888275f,
+  0.493097305297852f, -0.499952346086502f, 0.492713838815689f, -0.499946922063828f,
+  0.492330402135849f, -0.499941170215607f, 0.491946935653687f, -0.499935150146484f,
+  0.491563498973846f, -0.499928832054138f, 0.491180062294006f, -0.499922215938568f,
+  0.490796625614166f, -0.499915301799774f, 0.490413218736649f, -0.499908089637756f,
+  0.490029782056808f, -0.499900579452515f, 0.489646375179291f, -0.499892801046371f,
+  0.489262968301773f, -0.499884694814682f, 0.488879561424255f, -0.499876320362091f,
+  0.488496154546738f, -0.499867647886276f, 0.488112777471542f, -0.499858677387238f,
+  0.487729400396347f, -0.499849408864975f, 0.487346023321152f, -0.499839842319489f,
+  0.486962646245956f, -0.499830007553101f, 0.486579269170761f, -0.499819844961166f,
+  0.486195921897888f, -0.499809414148331f, 0.485812574625015f, -0.499798685312271f,
+  0.485429257154465f, -0.499787658452988f, 0.485045909881592f, -0.499776333570480f,
+  0.484662592411041f, -0.499764710664749f, 0.484279274940491f, -0.499752789735794f,
+  0.483895987272263f, -0.499740600585938f, 0.483512699604034f, -0.499728083610535f,
+  0.483129411935806f, -0.499715298414230f, 0.482746154069901f, -0.499702215194702f,
+  0.482362866401672f, -0.499688833951950f, 0.481979638338089f, -0.499675154685974f,
+  0.481596380472183f, -0.499661177396774f, 0.481213152408600f, -0.499646931886673f,
+  0.480829954147339f, -0.499632388353348f, 0.480446726083755f, -0.499617516994476f,
+  0.480063527822495f, -0.499602377414703f, 0.479680359363556f, -0.499586939811707f,
+  0.479297190904617f, -0.499571204185486f, 0.478914022445679f, -0.499555170536041f,
+  0.478530883789063f, -0.499538868665695f, 0.478147745132446f, -0.499522238969803f,
+  0.477764606475830f, -0.499505341053009f, 0.477381497621536f, -0.499488145112991f,
+  0.476998418569565f, -0.499470651149750f, 0.476615339517593f, -0.499452859163284f,
+  0.476232260465622f, -0.499434769153595f, 0.475849211215973f, -0.499416410923004f,
+  0.475466161966324f, -0.499397724866867f, 0.475083142518997f, -0.499378770589828f,
+  0.474700123071671f, -0.499359518289566f, 0.474317133426666f, -0.499339967966080f,
+  0.473934143781662f, -0.499320119619370f, 0.473551183938980f, -0.499299973249435f,
+  0.473168224096298f, -0.499279528856277f, 0.472785294055939f, -0.499258816242218f,
+  0.472402364015579f, -0.499237775802612f, 0.472019463777542f, -0.499216467142105f,
+  0.471636593341827f, -0.499194860458374f, 0.471253722906113f, -0.499172955751419f,
+  0.470870882272720f, -0.499150782823563f, 0.470488041639328f, -0.499128282070160f,
+  0.470105201005936f, -0.499105513095856f, 0.469722419977188f, -0.499082416296005f,
+  0.469339638948441f, -0.499059051275253f, 0.468956857919693f, -0.499035388231277f,
+  0.468574106693268f, -0.499011427164078f, 0.468191385269165f, -0.498987197875977f,
+  0.467808693647385f, -0.498962640762329f, 0.467426002025604f, -0.498937815427780f,
+  0.467043310403824f, -0.498912662267685f, 0.466660678386688f, -0.498887240886688f,
+  0.466278046369553f, -0.498861521482468f, 0.465895414352417f, -0.498835533857346f,
+  0.465512841939926f, -0.498809218406677f, 0.465130269527435f, -0.498782604932785f,
+  0.464747726917267f, -0.498755723237991f, 0.464365184307098f, -0.498728543519974f,
+  0.463982671499252f, -0.498701065778732f, 0.463600188493729f, -0.498673290014267f,
+  0.463217705488205f, -0.498645216226578f, 0.462835282087326f, -0.498616874217987f,
+  0.462452858686447f, -0.498588204383850f, 0.462070435285568f, -0.498559266328812f,
+  0.461688071489334f, -0.498530030250549f, 0.461305707693100f, -0.498500496149063f,
+  0.460923373699188f, -0.498470664024353f, 0.460541069507599f, -0.498440563678741f,
+  0.460158795118332f, -0.498410135507584f, 0.459776520729065f, -0.498379439115524f,
+  0.459394276142120f, -0.498348444700241f, 0.459012061357498f, -0.498317152261734f,
+  0.458629876375198f, -0.498285561800003f, 0.458247691392899f, -0.498253703117371f,
+  0.457865566015244f, -0.498221516609192f, 0.457483440637589f, -0.498189061880112f,
+  0.457101345062256f, -0.498156309127808f, 0.456719279289246f, -0.498123258352280f,
+  0.456337243318558f, -0.498089909553528f, 0.455955207347870f, -0.498056292533875f,
+  0.455573230981827f, -0.498022347688675f, 0.455191254615784f, -0.497988134622574f,
+  0.454809308052063f, -0.497953623533249f, 0.454427421092987f, -0.497918814420700f,
+  0.454045534133911f, -0.497883707284927f, 0.453663676977158f, -0.497848302125931f,
+  0.453281819820404f, -0.497812628746033f, 0.452900022268295f, -0.497776657342911f,
+  0.452518254518509f, -0.497740387916565f, 0.452136516571045f, -0.497703820466995f,
+  0.451754778623581f, -0.497666954994202f, 0.451373100280762f, -0.497629791498184f,
+  0.450991421937943f, -0.497592359781265f, 0.450609803199768f, -0.497554630041122f,
+  0.450228184461594f, -0.497516602277756f, 0.449846625328064f, -0.497478276491165f,
+  0.449465066194534f, -0.497439652681351f, 0.449083566665649f, -0.497400760650635f,
+  0.448702067136765f, -0.497361570596695f, 0.448320597410202f, -0.497322082519531f,
+  0.447939187288284f, -0.497282296419144f, 0.447557777166367f, -0.497242212295532f,
+  0.447176426649094f, -0.497201830148697f, 0.446795076131821f, -0.497161179780960f,
+  0.446413785219193f, -0.497120231389999f, 0.446032524108887f, -0.497078984975815f,
+  0.445651292800903f, -0.497037440538406f, 0.445270061492920f, -0.496995598077774f,
+  0.444888889789581f, -0.496953487396240f, 0.444507747888565f, -0.496911078691483f,
+  0.444126635789871f, -0.496868371963501f, 0.443745553493500f, -0.496825367212296f,
+  0.443364530801773f, -0.496782064437866f, 0.442983508110046f, -0.496738493442535f,
+  0.442602545022964f, -0.496694594621658f, 0.442221581935883f, -0.496650427579880f,
+  0.441840678453445f, -0.496605962514877f, 0.441459804773331f, -0.496561229228973f,
+  0.441078960895538f, -0.496516168117523f, 0.440698176622391f, -0.496470838785172f,
+  0.440317392349243f, -0.496425211429596f, 0.439936667680740f, -0.496379286050797f,
+  0.439555943012238f, -0.496333062648773f, 0.439175277948380f, -0.496286571025848f,
+  0.438794672489166f, -0.496239781379700f, 0.438414067029953f, -0.496192663908005f,
+  0.438033521175385f, -0.496145308017731f, 0.437653005123138f, -0.496097624301910f,
+  0.437272518873215f, -0.496049642562866f, 0.436892062425613f, -0.496001392602921f,
+  0.436511665582657f, -0.495952844619751f, 0.436131268739700f, -0.495903998613358f,
+  0.435750931501389f, -0.495854884386063f, 0.435370653867722f, -0.495805442333221f,
+  0.434990376234055f, -0.495755732059479f, 0.434610158205032f, -0.495705723762512f,
+  0.434229999780655f, -0.495655417442322f, 0.433849841356277f, -0.495604842901230f,
+  0.433469742536545f, -0.495553970336914f, 0.433089673519135f, -0.495502769947052f,
+  0.432709634304047f, -0.495451331138611f, 0.432329654693604f, -0.495399564504623f,
+  0.431949704885483f, -0.495347499847412f, 0.431569814682007f, -0.495295166969299f,
+  0.431189924478531f, -0.495242536067963f, 0.430810123682022f, -0.495189607143402f,
+  0.430430322885513f, -0.495136409997940f, 0.430050581693649f, -0.495082914829254f,
+  0.429670870304108f, -0.495029091835022f, 0.429291218519211f, -0.494975030422211f,
+  0.428911596536636f, -0.494920641183853f, 0.428532034158707f, -0.494865983724594f,
+  0.428152471780777f, -0.494810998439789f, 0.427772998809814f, -0.494755744934082f,
+  0.427393525838852f, -0.494700223207474f, 0.427014142274857f, -0.494644373655319f,
+  0.426634758710861f, -0.494588255882263f, 0.426255434751511f, -0.494531840085983f,
+  0.425876170396805f, -0.494475126266479f, 0.425496935844421f, -0.494418144226074f,
+  0.425117731094360f, -0.494360834360123f, 0.424738585948944f, -0.494303256273270f,
+  0.424359470605850f, -0.494245409965515f, 0.423980414867401f, -0.494187235832214f,
+  0.423601418733597f, -0.494128793478012f, 0.423222452402115f, -0.494070053100586f,
+  0.422843515872955f, -0.494011014699936f, 0.422464638948441f, -0.493951678276062f,
+  0.422085791826248f, -0.493892073631287f, 0.421707004308701f, -0.493832170963287f,
+  0.421328276395798f, -0.493771970272064f, 0.420949578285217f, -0.493711471557617f,
+  0.420570939779282f, -0.493650704622269f, 0.420192331075668f, -0.493589639663696f,
+  0.419813781976700f, -0.493528276681900f, 0.419435262680054f, -0.493466645479202f,
+  0.419056802988052f, -0.493404686450958f, 0.418678402900696f, -0.493342459201813f,
+  0.418300032615662f, -0.493279963731766f, 0.417921721935272f, -0.493217140436172f,
+  0.417543441057205f, -0.493154048919678f, 0.417165219783783f, -0.493090659379959f,
+  0.416787058115005f, -0.493026971817017f, 0.416408926248550f, -0.492963016033173f,
+  0.416030853986740f, -0.492898762226105f, 0.415652841329575f, -0.492834210395813f,
+  0.415274858474731f, -0.492769360542297f, 0.414896935224533f, -0.492704242467880f,
+  0.414519041776657f, -0.492638826370239f, 0.414141237735748f, -0.492573112249374f,
+  0.413763463497162f, -0.492507129907608f, 0.413385748863220f, -0.492440819740295f,
+  0.413008064031601f, -0.492374241352081f, 0.412630438804626f, -0.492307394742966f,
+  0.412252873182297f, -0.492240220308304f, 0.411875367164612f, -0.492172777652740f,
+  0.411497890949249f, -0.492105036973953f, 0.411120474338531f, -0.492037028074265f,
+  0.410743117332459f, -0.491968721151352f, 0.410365819931030f, -0.491900116205215f,
+  0.409988552331924f, -0.491831213235855f, 0.409611344337463f, -0.491762012243271f,
+  0.409234195947647f, -0.491692543029785f, 0.408857107162476f, -0.491622805595398f,
+  0.408480048179626f, -0.491552740335464f, 0.408103078603745f, -0.491482406854630f,
+  0.407726138830185f, -0.491411775350571f, 0.407349258661270f, -0.491340845823288f,
+  0.406972438097000f, -0.491269648075104f, 0.406595647335052f, -0.491198152303696f,
+  0.406218945980072f, -0.491126358509064f, 0.405842274427414f, -0.491054296493530f,
+  0.405465662479401f, -0.490981936454773f, 0.405089110136032f, -0.490909278392792f,
+  0.404712617397308f, -0.490836352109909f, 0.404336184263229f, -0.490763127803802f,
+  0.403959810733795f, -0.490689605474472f, 0.403583467006683f, -0.490615785121918f,
+  0.403207212686539f, -0.490541696548462f, 0.402830988168716f, -0.490467309951782f,
+  0.402454853057861f, -0.490392625331879f, 0.402078747749329f, -0.490317672491074f,
+  0.401702702045441f, -0.490242421627045f, 0.401326715946198f, -0.490166902542114f,
+  0.400950789451599f, -0.490091055631638f, 0.400574922561646f, -0.490014940500259f,
+  0.400199115276337f, -0.489938557147980f, 0.399823367595673f, -0.489861875772476f,
+  0.399447679519653f, -0.489784896373749f, 0.399072051048279f, -0.489707618951797f,
+  0.398696482181549f, -0.489630073308945f, 0.398320972919464f, -0.489552229642868f,
+  0.397945523262024f, -0.489474087953568f, 0.397570133209229f, -0.489395678043365f,
+  0.397194802761078f, -0.489316970109940f, 0.396819531917572f, -0.489237964153290f,
+  0.396444320678711f, -0.489158689975739f, 0.396069169044495f, -0.489079117774963f,
+  0.395694077014923f, -0.488999247550964f, 0.395319044589996f, -0.488919109106064f,
+  0.394944071769714f, -0.488838672637939f, 0.394569188356400f, -0.488757967948914f,
+  0.394194334745407f, -0.488676935434341f, 0.393819570541382f, -0.488595664501190f,
+  0.393444836139679f, -0.488514065742493f, 0.393070191144943f, -0.488432198762894f,
+  0.392695605754852f, -0.488350033760071f, 0.392321079969406f, -0.488267600536346f,
+  0.391946613788605f, -0.488184869289398f, 0.391572207212448f, -0.488101840019226f,
+  0.391197860240936f, -0.488018542528152f, 0.390823602676392f, -0.487934947013855f,
+  0.390449374914169f, -0.487851053476334f, 0.390075236558914f, -0.487766891717911f,
+  0.389701157808304f, -0.487682431936264f, 0.389327138662338f, -0.487597703933716f,
+  0.388953179121017f, -0.487512677907944f, 0.388579308986664f, -0.487427353858948f,
+  0.388205498456955f, -0.487341761589050f, 0.387831717729568f, -0.487255871295929f,
+  0.387458056211472f, -0.487169682979584f, 0.387084424495697f, -0.487083226442337f,
+  0.386710882186890f, -0.486996471881866f, 0.386337369680405f, -0.486909449100494f,
+  0.385963946580887f, -0.486822128295898f, 0.385590612888336f, -0.486734509468079f,
+  0.385217308998108f, -0.486646622419357f, 0.384844094514847f, -0.486558437347412f,
+  0.384470939636230f, -0.486469984054565f, 0.384097874164581f, -0.486381232738495f,
+  0.383724838495255f, -0.486292183399200f, 0.383351892232895f, -0.486202865839005f,
+  0.382979035377502f, -0.486113250255585f, 0.382606208324432f, -0.486023366451263f,
+  0.382233470678329f, -0.485933154821396f, 0.381860792636871f, -0.485842704772949f,
+  0.381488204002380f, -0.485751956701279f, 0.381115674972534f, -0.485660910606384f,
+  0.380743205547333f, -0.485569566488266f, 0.380370795726776f, -0.485477954149246f,
+  0.379998475313187f, -0.485386073589325f, 0.379626244306564f, -0.485293895006180f,
+  0.379254043102264f, -0.485201418399811f, 0.378881961107254f, -0.485108673572540f,
+  0.378509908914566f, -0.485015630722046f, 0.378137946128845f, -0.484922289848328f,
+  0.377766042947769f, -0.484828680753708f, 0.377394229173660f, -0.484734803438187f,
+  0.377022475004196f, -0.484640628099442f, 0.376650810241699f, -0.484546154737473f,
+  0.376279205083847f, -0.484451413154602f, 0.375907659530640f, -0.484356373548508f,
+  0.375536203384399f, -0.484261035919189f, 0.375164806842804f, -0.484165430068970f,
+  0.374793499708176f, -0.484069555997849f, 0.374422252178192f, -0.483973383903503f,
+  0.374051094055176f, -0.483876913785934f, 0.373679995536804f, -0.483780175447464f,
+  0.373308986425400f, -0.483683139085770f, 0.372938036918640f, -0.483585834503174f,
+  0.372567176818848f, -0.483488231897354f, 0.372196376323700f, -0.483390361070633f,
+  0.371825665235519f, -0.483292192220688f, 0.371455013751984f, -0.483193725347519f,
+  0.371084451675415f, -0.483094990253448f, 0.370713949203491f, -0.482995986938477f,
+  0.370343536138535f, -0.482896685600281f, 0.369973212480545f, -0.482797086238861f,
+  0.369602948427200f, -0.482697218656540f, 0.369232743978500f, -0.482597053050995f,
+  0.368862658739090f, -0.482496619224548f, 0.368492603302002f, -0.482395917177200f,
+  0.368122667074203f, -0.482294887304306f, 0.367752790451050f, -0.482193619012833f,
+  0.367382973432541f, -0.482092022895813f, 0.367013275623322f, -0.481990188360214f,
+  0.366643607616425f, -0.481888025999069f, 0.366274058818817f, -0.481785595417023f,
+  0.365904569625854f, -0.481682896614075f, 0.365535169839859f, -0.481579899787903f,
+  0.365165829658508f, -0.481476634740829f, 0.364796578884125f, -0.481373071670532f,
+  0.364427417516708f, -0.481269240379334f, 0.364058345556259f, -0.481165111064911f,
+  0.363689333200455f, -0.481060713529587f, 0.363320380449295f, -0.480956017971039f,
+  0.362951546907425f, -0.480851024389267f, 0.362582772970200f, -0.480745792388916f,
+  0.362214088439941f, -0.480640232563019f, 0.361845493316650f, -0.480534434318542f,
+  0.361476957798004f, -0.480428308248520f, 0.361108511686325f, -0.480321943759918f,
+  0.360740154981613f, -0.480215251445770f, 0.360371887683868f, -0.480108320713043f,
+  0.360003679990768f, -0.480001062154770f, 0.359635561704636f, -0.479893565177917f,
+  0.359267532825470f, -0.479785770177841f, 0.358899593353271f, -0.479677677154541f,
+  0.358531713485718f, -0.479569315910339f, 0.358163923025131f, -0.479460656642914f,
+  0.357796221971512f, -0.479351729154587f, 0.357428610324860f, -0.479242533445358f,
+  0.357061088085175f, -0.479133039712906f, 0.356693625450134f, -0.479023247957230f,
+  0.356326282024384f, -0.478913217782974f, 0.355958998203278f, -0.478802859783173f,
+  0.355591803789139f, -0.478692263364792f, 0.355224698781967f, -0.478581339120865f,
+  0.354857653379440f, -0.478470176458359f, 0.354490727186203f, -0.478358715772629f,
+  0.354123860597610f, -0.478246957063675f, 0.353757113218308f, -0.478134930133820f,
+  0.353390425443649f, -0.478022634983063f, 0.353023827075958f, -0.477910041809082f,
+  0.352657318115234f, -0.477797180414200f, 0.352290898561478f, -0.477684020996094f,
+  0.351924568414688f, -0.477570593357086f, 0.351558297872543f, -0.477456867694855f,
+  0.351192146539688f, -0.477342873811722f, 0.350826084613800f, -0.477228611707687f,
+  0.350460082292557f, -0.477114051580429f, 0.350094199180603f, -0.476999223232269f,
+  0.349728375673294f, -0.476884096860886f, 0.349362671375275f, -0.476768702268600f,
+  0.348997026681900f, -0.476653009653091f, 0.348631471395493f, -0.476537048816681f,
+  0.348266035318375f, -0.476420819759369f, 0.347900658845901f, -0.476304292678833f,
+  0.347535371780396f, -0.476187497377396f, 0.347170203924179f, -0.476070433855057f,
+  0.346805095672607f, -0.475953072309494f, 0.346440106630325f, -0.475835442543030f,
+  0.346075177192688f, -0.475717514753342f, 0.345710366964340f, -0.475599318742752f,
+  0.345345616340637f, -0.475480824708939f, 0.344980984926224f, -0.475362062454224f,
+  0.344616413116455f, -0.475243031978607f, 0.344251960515976f, -0.475123733282089f,
+  0.343887597322464f, -0.475004136562347f, 0.343523323535919f, -0.474884241819382f,
+  0.343159139156342f, -0.474764078855515f, 0.342795044183731f, -0.474643647670746f,
+  0.342431038618088f, -0.474522948265076f, 0.342067122459412f, -0.474401950836182f,
+  0.341703325510025f, -0.474280685186386f, 0.341339588165283f, -0.474159121513367f,
+  0.340975970029831f, -0.474037289619446f, 0.340612411499023f, -0.473915189504623f,
+  0.340248972177505f, -0.473792791366577f, 0.339885622262955f, -0.473670125007629f,
+  0.339522391557693f, -0.473547190427780f, 0.339159220457077f, -0.473423957824707f,
+  0.338796168565750f, -0.473300457000732f, 0.338433176279068f, -0.473176687955856f,
+  0.338070303201675f, -0.473052620887756f, 0.337707549333572f, -0.472928285598755f,
+  0.337344855070114f, -0.472803652286530f, 0.336982280015945f, -0.472678780555725f,
+  0.336619764566422f, -0.472553610801697f, 0.336257368326187f, -0.472428143024445f,
+  0.335895091295242f, -0.472302407026291f, 0.335532873868942f, -0.472176402807236f,
+  0.335170775651932f, -0.472050130367279f, 0.334808766841888f, -0.471923559904099f,
+  0.334446847438812f, -0.471796721220016f, 0.334085017442703f, -0.471669614315033f,
+  0.333723306655884f, -0.471542209386826f, 0.333361685276031f, -0.471414536237717f,
+  0.333000183105469f, -0.471286594867706f, 0.332638740539551f, -0.471158385276794f,
+  0.332277417182922f, -0.471029877662659f, 0.331916213035584f, -0.470901101827621f,
+  0.331555068492889f, -0.470772027969360f, 0.331194043159485f, -0.470642685890198f,
+  0.330833107233047f, -0.470513075590134f, 0.330472290515900f, -0.470383197069168f,
+  0.330111563205719f, -0.470253020524979f, 0.329750925302505f, -0.470122605562210f,
+  0.329390406608582f, -0.469991862773895f, 0.329029977321625f, -0.469860881567001f,
+  0.328669637441635f, -0.469729602336884f, 0.328309416770935f, -0.469598054885864f,
+  0.327949285507202f, -0.469466239213943f, 0.327589273452759f, -0.469334155321121f,
+  0.327229350805283f, -0.469201773405075f, 0.326869517564774f, -0.469069123268127f,
+  0.326509803533554f, -0.468936175107956f, 0.326150178909302f, -0.468802988529205f,
+  0.325790673494339f, -0.468669503927231f, 0.325431257486343f, -0.468535751104355f,
+  0.325071930885315f, -0.468401730060577f, 0.324712723493576f, -0.468267410993576f,
+  0.324353635311127f, -0.468132823705673f, 0.323994606733322f, -0.467997968196869f,
+  0.323635727167130f, -0.467862844467163f, 0.323276937007904f, -0.467727422714233f,
+  0.322918236255646f, -0.467591762542725f, 0.322559654712677f, -0.467455804347992f,
+  0.322201162576675f, -0.467319577932358f, 0.321842789649963f, -0.467183053493500f,
+  0.321484506130219f, -0.467046260833740f, 0.321126341819763f, -0.466909229755402f,
+  0.320768296718597f, -0.466771900653839f, 0.320410341024399f, -0.466634273529053f,
+  0.320052474737167f, -0.466496407985687f, 0.319694727659225f, -0.466358244419098f,
+  0.319337099790573f, -0.466219812631607f, 0.318979561328888f, -0.466081112623215f,
+  0.318622142076492f, -0.465942144393921f, 0.318264812231064f, -0.465802878141403f,
+  0.317907601594925f, -0.465663343667984f, 0.317550510168076f, -0.465523540973663f,
+  0.317193508148193f, -0.465383470058441f, 0.316836595535278f, -0.465243130922318f,
+  0.316479831933975f, -0.465102523565292f, 0.316123157739639f, -0.464961618185043f,
+  0.315766572952271f, -0.464820444583893f, 0.315410137176514f, -0.464679002761841f,
+  0.315053790807724f, -0.464537292718887f, 0.314697533845901f, -0.464395314455032f,
+  0.314341396093369f, -0.464253038167953f, 0.313985377550125f, -0.464110493659973f,
+  0.313629478216171f, -0.463967710733414f, 0.313273668289185f, -0.463824629783630f,
+  0.312917977571487f, -0.463681250810623f, 0.312562376260757f, -0.463537633419037f,
+  0.312206923961639f, -0.463393747806549f, 0.311851561069489f, -0.463249564170837f,
+  0.311496287584305f, -0.463105112314224f, 0.311141163110733f, -0.462960392236710f,
+  0.310786128044128f, -0.462815403938293f, 0.310431212186813f, -0.462670147418976f,
+  0.310076385736465f, -0.462524622678757f, 0.309721708297729f, -0.462378799915314f,
+  0.309367120265961f, -0.462232738733292f, 0.309012651443481f, -0.462086379528046f,
+  0.308658272027969f, -0.461939752101898f, 0.308304041624069f, -0.461792886257172f,
+  0.307949900627136f, -0.461645722389221f, 0.307595878839493f, -0.461498260498047f,
+  0.307241976261139f, -0.461350560188293f, 0.306888192892075f, -0.461202591657639f,
+  0.306534498929977f, -0.461054325103760f, 0.306180924177170f, -0.460905820131302f,
+  0.305827468633652f, -0.460757017135620f, 0.305474132299423f, -0.460607945919037f,
+  0.305120915174484f, -0.460458606481552f, 0.304767817258835f, -0.460309028625488f,
+  0.304414808750153f, -0.460159152746201f, 0.304061919450760f, -0.460008978843689f,
+  0.303709149360657f, -0.459858566522598f, 0.303356528282166f, -0.459707885980606f,
+  0.303003966808319f, -0.459556937217712f, 0.302651554346085f, -0.459405690431595f,
+  0.302299261093140f, -0.459254205226898f, 0.301947087049484f, -0.459102421998978f,
+  0.301595002412796f, -0.458950400352478f, 0.301243066787720f, -0.458798080682755f,
+  0.300891220569611f, -0.458645492792130f, 0.300539493560791f, -0.458492636680603f,
+  0.300187885761261f, -0.458339542150497f, 0.299836426973343f, -0.458186149597168f,
+  0.299485057592392f, -0.458032488822937f, 0.299133807420731f, -0.457878559827805f,
+  0.298782676458359f, -0.457724362611771f, 0.298431664705276f, -0.457569897174835f,
+  0.298080772161484f, -0.457415163516998f, 0.297729998826981f, -0.457260161638260f,
+  0.297379344701767f, -0.457104891538620f, 0.297028809785843f, -0.456949323415756f,
+  0.296678394079208f, -0.456793516874313f, 0.296328097581863f, -0.456637442111969f,
+  0.295977920293808f, -0.456481099128723f, 0.295627862215042f, -0.456324487924576f,
+  0.295277923345566f, -0.456167578697205f, 0.294928103685379f, -0.456010431051254f,
+  0.294578403234482f, -0.455853015184402f, 0.294228851795197f, -0.455695331096649f,
+  0.293879389762878f, -0.455537378787994f, 0.293530046939850f, -0.455379128456116f,
+  0.293180853128433f, -0.455220639705658f, 0.292831748723984f, -0.455061882734299f,
+  0.292482793331146f, -0.454902857542038f, 0.292133957147598f, -0.454743564128876f,
+  0.291785210371017f, -0.454584002494812f, 0.291436612606049f, -0.454424172639847f,
+  0.291088134050369f, -0.454264044761658f, 0.290739774703979f, -0.454103678464890f,
+  0.290391564369202f, -0.453943043947220f, 0.290043443441391f, -0.453782171010971f,
+  0.289695471525192f, -0.453621000051498f, 0.289347589015961f, -0.453459560871124f,
+  0.288999855518341f, -0.453297853469849f, 0.288652241230011f, -0.453135877847672f,
+  0.288304775953293f, -0.452973634004593f, 0.287957400083542f, -0.452811151742935f,
+  0.287610173225403f, -0.452648371458054f, 0.287263035774231f, -0.452485352754593f,
+  0.286916047334671f, -0.452322036027908f, 0.286569178104401f, -0.452158480882645f,
+  0.286222457885742f, -0.451994657516479f, 0.285875827074051f, -0.451830536127090f,
+  0.285529345273972f, -0.451666176319122f, 0.285182982683182f, -0.451501548290253f,
+  0.284836769104004f, -0.451336652040482f, 0.284490644931793f, -0.451171487569809f,
+  0.284144669771194f, -0.451006084680557f, 0.283798813819885f, -0.450840383768082f,
+  0.283453077077866f, -0.450674414634705f, 0.283107489347458f, -0.450508207082748f,
+  0.282762020826340f, -0.450341701507568f, 0.282416671514511f, -0.450174957513809f,
+  0.282071471214294f, -0.450007945299149f, 0.281726360321045f, -0.449840664863586f,
+  0.281381398439407f, -0.449673116207123f, 0.281036585569382f, -0.449505299329758f,
+  0.280691891908646f, -0.449337244033813f, 0.280347317457199f, -0.449168890714645f,
+  0.280002862215042f, -0.449000298976898f, 0.279658555984497f, -0.448831409215927f,
+  0.279314368963242f, -0.448662281036377f, 0.278970301151276f, -0.448492884635925f,
+  0.278626382350922f, -0.448323249816895f, 0.278282582759857f, -0.448153316974640f,
+  0.277938932180405f, -0.447983115911484f, 0.277595400810242f, -0.447812676429749f,
+  0.277251988649368f, -0.447641968727112f, 0.276908725500107f, -0.447470992803574f,
+  0.276565581560135f, -0.447299748659134f, 0.276222556829453f, -0.447128236293793f,
+  0.275879681110382f, -0.446956485509872f, 0.275536954402924f, -0.446784436702728f,
+  0.275194346904755f, -0.446612149477005f, 0.274851858615875f, -0.446439594030380f,
+  0.274509519338608f, -0.446266770362854f, 0.274167299270630f, -0.446093708276749f,
+  0.273825198411942f, -0.445920348167419f, 0.273483246564865f, -0.445746749639511f,
+  0.273141443729401f, -0.445572882890701f, 0.272799760103226f, -0.445398747920990f,
+  0.272458195686340f, -0.445224374532700f, 0.272116780281067f, -0.445049703121185f,
+  0.271775513887405f, -0.444874793291092f, 0.271434366703033f, -0.444699615240097f,
+  0.271093338727951f, -0.444524168968201f, 0.270752459764481f, -0.444348484277725f,
+  0.270411729812622f, -0.444172531366348f, 0.270071119070053f, -0.443996280431747f,
+  0.269730657339096f, -0.443819820880890f, 0.269390314817429f, -0.443643063306808f,
+  0.269050091505051f, -0.443466067314148f, 0.268710047006607f, -0.443288803100586f,
+  0.268370121717453f, -0.443111270666122f, 0.268030315637589f, -0.442933470010757f,
+  0.267690658569336f, -0.442755430936813f, 0.267351150512695f, -0.442577123641968f,
+  0.267011761665344f, -0.442398548126221f, 0.266672492027283f, -0.442219734191895f,
+  0.266333401203156f, -0.442040622234344f, 0.265994429588318f, -0.441861271858215f,
+  0.265655577182770f, -0.441681683063507f, 0.265316903591156f, -0.441501796245575f,
+  0.264978319406509f, -0.441321671009064f, 0.264639914035797f, -0.441141277551651f,
+  0.264301627874374f, -0.440960645675659f, 0.263963490724564f, -0.440779715776443f,
+  0.263625472784042f, -0.440598547458649f, 0.263287603855133f, -0.440417140722275f,
+  0.262949883937836f, -0.440235435962677f, 0.262612313032150f, -0.440053492784500f,
+  0.262274861335754f, -0.439871311187744f, 0.261937558650970f, -0.439688831567764f,
+  0.261600375175476f, -0.439506113529205f, 0.261263370513916f, -0.439323127269745f,
+  0.260926485061646f, -0.439139902591705f, 0.260589718818665f, -0.438956409692764f,
+  0.260253131389618f, -0.438772648572922f, 0.259916663169861f, -0.438588619232178f,
+  0.259580343961716f, -0.438404351472855f, 0.259244143962860f, -0.438219845294952f,
+  0.258908122777939f, -0.438035041093826f, 0.258572220802307f, -0.437849998474121f,
+  0.258236467838287f, -0.437664687633514f, 0.257900834083557f, -0.437479138374329f,
+  0.257565379142761f, -0.437293320894241f, 0.257230043411255f, -0.437107264995575f,
+  0.256894856691360f, -0.436920911073685f, 0.256559818983078f, -0.436734348535538f,
+  0.256224930286407f, -0.436547487974167f, 0.255890160799026f, -0.436360388994217f,
+  0.255555540323257f, -0.436173021793365f, 0.255221068859100f, -0.435985416173935f,
+  0.254886746406555f, -0.435797542333603f, 0.254552572965622f, -0.435609430074692f,
+  0.254218548536301f, -0.435421019792557f, 0.253884643316269f, -0.435232400894165f,
+  0.253550916910172f, -0.435043483972549f, 0.253217309713364f, -0.434854328632355f,
+  0.252883851528168f, -0.434664934873581f, 0.252550542354584f, -0.434475272893906f,
+  0.252217382192612f, -0.434285342693329f, 0.251884341239929f, -0.434095174074173f,
+  0.251551479101181f, -0.433904737234116f, 0.251218736171722f, -0.433714061975479f,
+  0.250886172056198f, -0.433523118495941f, 0.250553727149963f, -0.433331936597824f,
+  0.250221431255341f, -0.433140486478806f, 0.249889299273491f, -0.432948768138886f,
+  0.249557301402092f, -0.432756811380386f, 0.249225467443466f, -0.432564586400986f,
+  0.248893767595291f, -0.432372123003006f, 0.248562216758728f, -0.432179391384125f,
+  0.248230814933777f, -0.431986421346664f, 0.247899547219276f, -0.431793183088303f,
+  0.247568443417549f, -0.431599706411362f, 0.247237488627434f, -0.431405961513519f,
+  0.246906682848930f, -0.431211978197098f, 0.246576011180878f, -0.431017726659775f,
+  0.246245503425598f, -0.430823236703873f, 0.245915144681931f, -0.430628478527069f,
+  0.245584934949875f, -0.430433481931686f, 0.245254859328270f, -0.430238217115402f,
+  0.244924947619438f, -0.430042684078217f, 0.244595184922218f, -0.429846942424774f,
+  0.244265571236610f, -0.429650902748108f, 0.243936106562614f, -0.429454624652863f,
+  0.243606805801392f, -0.429258108139038f, 0.243277639150620f, -0.429061323404312f,
+  0.242948621511459f, -0.428864300251007f, 0.242619767785072f, -0.428667008876801f,
+  0.242291063070297f, -0.428469479084015f, 0.241962507367134f, -0.428271710872650f,
+  0.241634100675583f, -0.428073674440384f, 0.241305842995644f, -0.427875369787216f,
+  0.240977749228477f, -0.427676826715469f, 0.240649804472923f, -0.427478045225143f,
+  0.240322008728981f, -0.427278995513916f, 0.239994361996651f, -0.427079707384110f,
+  0.239666879177094f, -0.426880151033401f, 0.239339530467987f, -0.426680356264114f,
+  0.239012360572815f, -0.426480293273926f, 0.238685324788094f, -0.426279991865158f,
+  0.238358452916145f, -0.426079452037811f, 0.238031730055809f, -0.425878643989563f,
+  0.237705156207085f, -0.425677597522736f, 0.237378746271133f, -0.425476282835007f,
+  0.237052485346794f, -0.425274729728699f, 0.236726388335228f, -0.425072938203812f,
+  0.236400425434113f, -0.424870878458023f, 0.236074641346931f, -0.424668580293655f,
+  0.235749006271362f, -0.424466013908386f, 0.235423520207405f, -0.424263238906860f,
+  0.235098183155060f, -0.424060165882111f, 0.234773010015488f, -0.423856884241104f,
+  0.234448000788689f, -0.423653304576874f, 0.234123140573502f, -0.423449516296387f,
+  0.233798429369926f, -0.423245459794998f, 0.233473882079124f, -0.423041164875031f,
+  0.233149498701096f, -0.422836631536484f, 0.232825264334679f, -0.422631829977036f,
+  0.232501193881035f, -0.422426789999008f, 0.232177272439003f, -0.422221481800079f,
+  0.231853514909744f, -0.422015935182571f, 0.231529906392097f, -0.421810150146484f,
+  0.231206461787224f, -0.421604126691818f, 0.230883181095123f, -0.421397835016251f,
+  0.230560049414635f, -0.421191304922104f, 0.230237081646919f, -0.420984506607056f,
+  0.229914262890816f, -0.420777499675751f, 0.229591608047485f, -0.420570224523544f,
+  0.229269117116928f, -0.420362681150436f, 0.228946775197983f, -0.420154929161072f,
+  0.228624612092972f, -0.419946908950806f, 0.228302597999573f, -0.419738620519638f,
+  0.227980732917786f, -0.419530123472214f, 0.227659046649933f, -0.419321358203888f,
+  0.227337509393692f, -0.419112354516983f, 0.227016136050224f, -0.418903112411499f,
+  0.226694911718369f, -0.418693602085114f, 0.226373866200447f, -0.418483853340149f,
+  0.226052969694138f, -0.418273866176605f, 0.225732237100601f, -0.418063640594482f,
+  0.225411668419838f, -0.417853146791458f, 0.225091263651848f, -0.417642414569855f,
+  0.224771007895470f, -0.417431443929672f, 0.224450930953026f, -0.417220205068588f,
+  0.224131003022194f, -0.417008757591248f, 0.223811239004135f, -0.416797041893005f,
+  0.223491653800011f, -0.416585087776184f, 0.223172217607498f, -0.416372895240784f,
+  0.222852945327759f, -0.416160434484482f, 0.222533836960793f, -0.415947735309601f,
+  0.222214877605438f, -0.415734797716141f, 0.221896097064018f, -0.415521621704102f,
+  0.221577480435371f, -0.415308207273483f, 0.221259027719498f, -0.415094524621964f,
+  0.220940738916397f, -0.414880603551865f, 0.220622614026070f, -0.414666473865509f,
+  0.220304638147354f, -0.414452046155930f, 0.219986841082573f, -0.414237409830093f,
+  0.219669207930565f, -0.414022535085678f, 0.219351738691330f, -0.413807392120361f,
+  0.219034433364868f, -0.413592010736465f, 0.218717306852341f, -0.413376390933990f,
+  0.218400329351425f, -0.413160532712936f, 0.218083515763283f, -0.412944436073303f,
+  0.217766880989075f, -0.412728071212769f, 0.217450410127640f, -0.412511497735977f,
+  0.217134088277817f, -0.412294656038284f, 0.216817945241928f, -0.412077575922012f,
+  0.216501981019974f, -0.411860257387161f, 0.216186165809631f, -0.411642700433731f,
+  0.215870529413223f, -0.411424905061722f, 0.215555042028427f, -0.411206841468811f,
+  0.215239733457565f, -0.410988569259644f, 0.214924603700638f, -0.410770028829575f,
+  0.214609622955322f, -0.410551249980927f, 0.214294821023941f, -0.410332232713699f,
+  0.213980183005333f, -0.410112977027893f, 0.213665723800659f, -0.409893482923508f,
+  0.213351413607597f, -0.409673750400543f, 0.213037282228470f, -0.409453779459000f,
+  0.212723329663277f, -0.409233570098877f, 0.212409526109695f, -0.409013092517853f,
+  0.212095901370049f, -0.408792406320572f, 0.211782455444336f, -0.408571451902390f,
+  0.211469158530235f, -0.408350288867950f, 0.211156040430069f, -0.408128857612610f,
+  0.210843101143837f, -0.407907217741013f, 0.210530325770378f, -0.407685309648514f,
+  0.210217714309692f, -0.407463163137436f, 0.209905281662941f, -0.407240778207779f,
+  0.209593027830124f, -0.407018154859543f, 0.209280923008919f, -0.406795293092728f,
+  0.208969011902809f, -0.406572192907333f, 0.208657249808311f, -0.406348884105682f,
+  0.208345666527748f, -0.406125307083130f, 0.208034262061119f, -0.405901491641998f,
+  0.207723021507263f, -0.405677437782288f, 0.207411959767342f, -0.405453115701675f,
+  0.207101076841354f, -0.405228585004807f, 0.206790357828140f, -0.405003815889359f,
+  0.206479802727699f, -0.404778808355331f, 0.206169426441193f, -0.404553562402725f,
+  0.205859228968620f, -0.404328078031540f, 0.205549195408821f, -0.404102355241776f,
+  0.205239340662956f, -0.403876423835754f, 0.204929664731026f, -0.403650224208832f,
+  0.204620152711868f, -0.403423786163330f, 0.204310819506645f, -0.403197109699249f,
+  0.204001650214195f, -0.402970194816589f, 0.203692659735680f, -0.402743041515350f,
+  0.203383848071098f, -0.402515679597855f, 0.203075215220451f, -0.402288049459457f,
+  0.202766746282578f, -0.402060180902481f, 0.202458456158638f, -0.401832103729248f,
+  0.202150344848633f, -0.401603758335114f, 0.201842412352562f, -0.401375204324722f,
+  0.201534643769264f, -0.401146411895752f, 0.201227053999901f, -0.400917351245880f,
+  0.200919643044472f, -0.400688081979752f, 0.200612410902977f, -0.400458574295044f,
+  0.200305357575417f, -0.400228828191757f, 0.199998468160629f, -0.399998843669891f,
+  0.199691757559776f, -0.399768620729446f, 0.199385225772858f, -0.399538189172745f,
+  0.199078872799873f, -0.399307489395142f, 0.198772698640823f, -0.399076581001282f,
+  0.198466703295708f, -0.398845434188843f, 0.198160871863365f, -0.398614019155502f,
+  0.197855234146118f, -0.398382395505905f, 0.197549775242805f, -0.398150533437729f,
+  0.197244480252266f, -0.397918462753296f, 0.196939364075661f, -0.397686123847961f,
+  0.196634441614151f, -0.397453576326370f, 0.196329683065414f, -0.397220760583878f,
+  0.196025103330612f, -0.396987736225128f, 0.195720717310905f, -0.396754473447800f,
+  0.195416495203972f, -0.396520972251892f, 0.195112451910973f, -0.396287262439728f,
+  0.194808602333069f, -0.396053284406662f, 0.194504916667938f, -0.395819097757339f,
+  0.194201424717903f, -0.395584672689438f, 0.193898096680641f, -0.395350009202957f,
+  0.193594962358475f, -0.395115107297897f, 0.193292006850243f, -0.394879996776581f,
+  0.192989215254784f, -0.394644618034363f, 0.192686617374420f, -0.394409030675888f,
+  0.192384198307991f, -0.394173204898834f, 0.192081972956657f, -0.393937170505524f,
+  0.191779911518097f, -0.393700867891312f, 0.191478043794632f, -0.393464356660843f,
+  0.191176339983940f, -0.393227607011795f, 0.190874829888344f, -0.392990618944168f,
+  0.190573498606682f, -0.392753422260284f, 0.190272361040115f, -0.392515957355499f,
+  0.189971387386322f, -0.392278283834457f, 0.189670607447624f, -0.392040401697159f,
+  0.189370006322861f, -0.391802251338959f, 0.189069598913193f, -0.391563892364502f,
+  0.188769355416298f, -0.391325294971466f, 0.188469305634499f, -0.391086459159851f,
+  0.188169434666634f, -0.390847414731979f, 0.187869757413864f, -0.390608131885529f,
+  0.187570258975029f, -0.390368610620499f, 0.187270939350128f, -0.390128880739212f,
+  0.186971798539162f, -0.389888882637024f, 0.186672851443291f, -0.389648675918579f,
+  0.186374098062515f, -0.389408260583878f, 0.186075508594513f, -0.389167606830597f,
+  0.185777112841606f, -0.388926714658737f, 0.185478910803795f, -0.388685584068298f,
+  0.185180887579918f, -0.388444244861603f, 0.184883043169975f, -0.388202667236328f,
+  0.184585392475128f, -0.387960851192474f, 0.184287920594215f, -0.387718826532364f,
+  0.183990627527237f, -0.387476563453674f, 0.183693528175354f, -0.387234061956406f,
+  0.183396622538567f, -0.386991351842880f, 0.183099895715714f, -0.386748403310776f,
+  0.182803362607956f, -0.386505216360092f, 0.182507008314133f, -0.386261820793152f,
+  0.182210832834244f, -0.386018186807632f, 0.181914865970612f, -0.385774344205856f,
+  0.181619063019753f, -0.385530263185501f, 0.181323468685150f, -0.385285943746567f,
+  0.181028053164482f, -0.385041415691376f, 0.180732816457748f, -0.384796649217606f,
+  0.180437773466110f, -0.384551674127579f, 0.180142924189568f, -0.384306460618973f,
+  0.179848253726959f, -0.384061008691788f, 0.179553776979446f, -0.383815348148346f,
+  0.179259493947029f, -0.383569449186325f, 0.178965389728546f, -0.383323341608047f,
+  0.178671479225159f, -0.383076995611191f, 0.178377762436867f, -0.382830440998077f,
+  0.178084224462509f, -0.382583618164063f, 0.177790880203247f, -0.382336616516113f,
+  0.177497729659081f, -0.382089376449585f, 0.177204772830009f, -0.381841897964478f,
+  0.176911994814873f, -0.381594210863113f, 0.176619410514832f, -0.381346285343170f,
+  0.176327019929886f, -0.381098151206970f, 0.176034808158875f, -0.380849778652191f,
+  0.175742805004120f, -0.380601197481155f, 0.175450980663300f, -0.380352377891541f,
+  0.175159350037575f, -0.380103349685669f, 0.174867913126946f, -0.379854083061218f,
+  0.174576655030251f, -0.379604607820511f, 0.174285605549812f, -0.379354894161224f,
+  0.173994734883308f, -0.379104942083359f, 0.173704057931900f, -0.378854811191559f,
+  0.173413574695587f, -0.378604412078857f, 0.173123285174370f, -0.378353834152222f,
+  0.172833189368248f, -0.378102988004684f, 0.172543287277222f, -0.377851963043213f,
+  0.172253578901291f, -0.377600699663162f, 0.171964049339294f, -0.377349197864532f,
+  0.171674728393555f, -0.377097487449646f, 0.171385586261749f, -0.376845568418503f,
+  0.171096652746201f, -0.376593410968781f, 0.170807912945747f, -0.376341015100479f,
+  0.170519351959229f, -0.376088410615921f, 0.170230999588966f, -0.375835597515106f,
+  0.169942826032639f, -0.375582575798035f, 0.169654861092567f, -0.375329315662384f,
+  0.169367074966431f, -0.375075817108154f, 0.169079497456551f, -0.374822109937668f,
+  0.168792113661766f, -0.374568194150925f, 0.168504923582077f, -0.374314039945602f,
+  0.168217927217484f, -0.374059677124023f, 0.167931124567986f, -0.373805105686188f,
+  0.167644515633583f, -0.373550295829773f, 0.167358100414276f, -0.373295277357101f,
+  0.167071878910065f, -0.373040050268173f, 0.166785866022110f, -0.372784584760666f,
+  0.166500031948090f, -0.372528880834579f, 0.166214406490326f, -0.372272998094559f,
+  0.165928974747658f, -0.372016876935959f, 0.165643751621246f, -0.371760547161102f,
+  0.165358707308769f, -0.371503978967667f, 0.165073871612549f, -0.371247202157974f,
+  0.164789214730263f, -0.370990216732025f, 0.164504766464233f, -0.370732992887497f,
+  0.164220526814461f, -0.370475560426712f, 0.163936465978622f, -0.370217919349670f,
+  0.163652613759041f, -0.369960039854050f, 0.163368955254555f, -0.369701951742172f,
+  0.163085505366325f, -0.369443655014038f, 0.162802234292030f, -0.369185149669647f,
+  0.162519171833992f, -0.368926405906677f, 0.162236317992210f, -0.368667453527451f,
+  0.161953642964363f, -0.368408292531967f, 0.161671176552773f, -0.368148893117905f,
+  0.161388918757439f, -0.367889285087585f, 0.161106839776039f, -0.367629468441010f,
+  0.160824984312058f, -0.367369443178177f, 0.160543307662010f, -0.367109179496765f,
+  0.160261839628220f, -0.366848707199097f, 0.159980565309525f, -0.366588026285172f,
+  0.159699499607086f, -0.366327136754990f, 0.159418627619743f, -0.366066008806229f,
+  0.159137964248657f, -0.365804702043533f, 0.158857494592667f, -0.365543156862259f,
+  0.158577233552933f, -0.365281373262405f, 0.158297166228294f, -0.365019410848618f,
+  0.158017292618752f, -0.364757210016251f, 0.157737627625465f, -0.364494800567627f,
+  0.157458171248436f, -0.364232182502747f, 0.157178908586502f, -0.363969355821610f,
+  0.156899839639664f, -0.363706320524216f, 0.156620979309082f, -0.363443046808243f,
+  0.156342327594757f, -0.363179564476013f, 0.156063869595528f, -0.362915903329849f,
+  0.155785620212555f, -0.362651973962784f, 0.155507579445839f, -0.362387865781784f,
+  0.155229732394218f, -0.362123548984528f, 0.154952079057693f, -0.361858993768692f,
+  0.154674649238586f, -0.361594229936600f, 0.154397398233414f, -0.361329287290573f,
+  0.154120370745659f, -0.361064106225967f, 0.153843536973000f, -0.360798716545105f,
+  0.153566911816597f, -0.360533088445663f, 0.153290495276451f, -0.360267281532288f,
+  0.153014272451401f, -0.360001266002655f, 0.152738258242607f, -0.359735012054443f,
+  0.152462437748909f, -0.359468549489975f, 0.152186840772629f, -0.359201908111572f,
+  0.151911437511444f, -0.358935028314590f, 0.151636242866516f, -0.358667939901352f,
+  0.151361241936684f, -0.358400642871857f, 0.151086464524269f, -0.358133137226105f,
+  0.150811880826950f, -0.357865422964096f, 0.150537505745888f, -0.357597470283508f,
+  0.150263324379921f, -0.357329338788986f, 0.149989366531372f, -0.357060998678207f,
+  0.149715602397919f, -0.356792420148849f, 0.149442046880722f, -0.356523662805557f,
+  0.149168699979782f, -0.356254696846008f, 0.148895561695099f, -0.355985492467880f,
+  0.148622632026672f, -0.355716109275818f, 0.148349896073341f, -0.355446487665176f,
+  0.148077383637428f, -0.355176687240601f, 0.147805064916611f, -0.354906648397446f,
+  0.147532954812050f, -0.354636400938034f, 0.147261068224907f, -0.354365974664688f,
+  0.146989375352860f, -0.354095309972763f, 0.146717891097069f, -0.353824466466904f,
+  0.146446615457535f, -0.353553384542465f, 0.146175548434258f, -0.353282123804092f,
+  0.145904675126076f, -0.353010624647141f, 0.145634025335312f, -0.352738946676254f,
+  0.145363584160805f, -0.352467030286789f, 0.145093351602554f, -0.352194935083389f,
+  0.144823327660561f, -0.351922631263733f, 0.144553512334824f, -0.351650089025497f,
+  0.144283905625343f, -0.351377367973328f, 0.144014507532120f, -0.351104438304901f,
+  0.143745318055153f, -0.350831300020218f, 0.143476337194443f, -0.350557953119278f,
+  0.143207564949989f, -0.350284397602081f, 0.142939001321793f, -0.350010633468628f,
+  0.142670661211014f, -0.349736660718918f, 0.142402514815331f, -0.349462509155273f,
+  0.142134591937065f, -0.349188119173050f, 0.141866862773895f, -0.348913550376892f,
+  0.141599357128143f, -0.348638743162155f, 0.141332060098648f, -0.348363757133484f,
+  0.141064971685410f, -0.348088562488556f, 0.140798106789589f, -0.347813159227371f,
+  0.140531435608864f, -0.347537547349930f, 0.140264987945557f, -0.347261756658554f,
+  0.139998748898506f, -0.346985727548599f, 0.139732718467712f, -0.346709519624710f,
+  0.139466896653175f, -0.346433073282242f, 0.139201298356056f, -0.346156448125839f,
+  0.138935908675194f, -0.345879614353180f, 0.138670727610588f, -0.345602601766586f,
+  0.138405755162239f, -0.345325350761414f, 0.138141006231308f, -0.345047920942307f,
+  0.137876465916634f, -0.344770282506943f, 0.137612134218216f, -0.344492435455322f,
+  0.137348011136055f, -0.344214379787445f, 0.137084111571312f, -0.343936115503311f,
+  0.136820420622826f, -0.343657672405243f, 0.136556953191757f, -0.343379020690918f,
+  0.136293679475784f, -0.343100160360336f, 0.136030644178391f, -0.342821091413498f,
+  0.135767802596092f, -0.342541843652725f, 0.135505184531212f, -0.342262357473373f,
+  0.135242775082588f, -0.341982692480087f, 0.134980589151382f, -0.341702848672867f,
+  0.134718611836433f, -0.341422766447067f, 0.134456858038902f, -0.341142505407333f,
+  0.134195312857628f, -0.340862035751343f, 0.133933976292610f, -0.340581357479095f,
+  0.133672863245010f, -0.340300500392914f, 0.133411958813667f, -0.340019434690475f,
+  0.133151277899742f, -0.339738160371780f, 0.132890805602074f, -0.339456677436829f,
+  0.132630556821823f, -0.339175015687943f, 0.132370531558990f, -0.338893145322800f,
+  0.132110700011253f, -0.338611096143723f, 0.131851106882095f, -0.338328808546066f,
+  0.131591722369194f, -0.338046342134476f, 0.131332546472549f, -0.337763696908951f,
+  0.131073594093323f, -0.337480813264847f, 0.130814850330353f, -0.337197750806808f,
+  0.130556344985962f, -0.336914509534836f, 0.130298033356667f, -0.336631029844284f,
+  0.130039945244789f, -0.336347371339798f, 0.129782080650330f, -0.336063534021378f,
+  0.129524439573288f, -0.335779488086700f, 0.129267007112503f, -0.335495233535767f,
+  0.129009798169136f, -0.335210770368576f, 0.128752797842026f, -0.334926128387451f,
+  0.128496021032333f, -0.334641307592392f, 0.128239467740059f, -0.334356248378754f,
+  0.127983123064041f, -0.334071010351181f, 0.127727001905441f, -0.333785593509674f,
+  0.127471104264259f, -0.333499968051910f, 0.127215430140495f, -0.333214133977890f,
+  0.126959964632988f, -0.332928121089935f, 0.126704722642899f, -0.332641899585724f,
+  0.126449704170227f, -0.332355499267578f, 0.126194894313812f, -0.332068890333176f,
+  0.125940307974815f, -0.331782072782516f, 0.125685945153236f, -0.331495076417923f,
+  0.125431805849075f, -0.331207901239395f, 0.125177875161171f, -0.330920487642288f,
+  0.124924175441265f, -0.330632925033569f, 0.124670691788197f, -0.330345153808594f,
+  0.124417431652546f, -0.330057173967361f, 0.124164395034313f, -0.329769015312195f,
+  0.123911574482918f, -0.329480648040771f, 0.123658977448940f, -0.329192101955414f,
+  0.123406603932381f, -0.328903347253799f, 0.123154446482658f, -0.328614413738251f,
+  0.122902512550354f, -0.328325271606445f, 0.122650802135468f, -0.328035950660706f,
+  0.122399315237999f, -0.327746421098709f, 0.122148044407368f, -0.327456712722778f,
+  0.121896997094154f, -0.327166795730591f, 0.121646173298359f, -0.326876699924469f,
+  0.121395580470562f, -0.326586425304413f, 0.121145196259022f, -0.326295942068100f,
+  0.120895043015480f, -0.326005280017853f, 0.120645113289356f, -0.325714409351349f,
+  0.120395407080650f, -0.325423330068588f, 0.120145916938782f, -0.325132101774216f,
+  0.119896657764912f, -0.324840664863586f, 0.119647622108459f, -0.324549019336700f,
+  0.119398809969425f, -0.324257194995880f, 0.119150213897228f, -0.323965191841125f,
+  0.118901848793030f, -0.323672980070114f, 0.118653707206249f, -0.323380589485168f,
+  0.118405789136887f, -0.323088020086288f, 0.118158094584942f, -0.322795242071152f,
+  0.117910631000996f, -0.322502255439758f, 0.117663383483887f, -0.322209119796753f,
+  0.117416366934776f, -0.321915775537491f, 0.117169573903084f, -0.321622252464294f,
+  0.116923004388809f, -0.321328520774841f, 0.116676658391953f, -0.321034610271454f,
+  0.116430543363094f, -0.320740520954132f, 0.116184651851654f, -0.320446223020554f,
+  0.115938983857632f, -0.320151746273041f, 0.115693546831608f, -0.319857090711594f,
+  0.115448333323002f, -0.319562226533890f, 0.115203343331814f, -0.319267183542252f,
+  0.114958584308624f, -0.318971961736679f, 0.114714048802853f, -0.318676531314850f,
+  0.114469736814499f, -0.318380922079086f, 0.114225655794144f, -0.318085134029388f,
+  0.113981798291206f, -0.317789167165756f, 0.113738171756268f, -0.317492991685867f,
+  0.113494776189327f, -0.317196637392044f, 0.113251596689224f, -0.316900104284287f,
+  0.113008655607700f, -0.316603392362595f, 0.112765938043594f, -0.316306471824646f,
+  0.112523443996906f, -0.316009372472763f, 0.112281180918217f, -0.315712094306946f,
+  0.112039148807526f, -0.315414607524872f, 0.111797347664833f, -0.315116971731186f,
+  0.111555770039558f, -0.314819127321243f, 0.111314415931702f, -0.314521104097366f,
+  0.111073300242424f, -0.314222872257233f, 0.110832408070564f, -0.313924491405487f,
+  0.110591746866703f, -0.313625901937485f, 0.110351309180260f, -0.313327133655548f,
+  0.110111102461815f, -0.313028186559677f, 0.109871134161949f, -0.312729060649872f,
+  0.109631389379501f, -0.312429755926132f, 0.109391868114471f, -0.312130242586136f,
+  0.109152585268021f, -0.311830550432205f, 0.108913525938988f, -0.311530679464340f,
+  0.108674705028534f, -0.311230629682541f, 0.108436107635498f, -0.310930401086807f,
+  0.108197741210461f, -0.310629993677139f, 0.107959605753422f, -0.310329377651215f,
+  0.107721701264381f, -0.310028612613678f, 0.107484027743340f, -0.309727638959885f,
+  0.107246585190296f, -0.309426486492157f, 0.107009373605251f, -0.309125155210495f,
+  0.106772392988205f, -0.308823645114899f, 0.106535643339157f, -0.308521956205368f,
+  0.106299124658108f, -0.308220088481903f, 0.106062836945057f, -0.307918041944504f,
+  0.105826787650585f, -0.307615786790848f, 0.105590961873531f, -0.307313382625580f,
+  0.105355374515057f, -0.307010769844055f, 0.105120018124580f, -0.306708008050919f,
+  0.104884892702103f, -0.306405037641525f, 0.104649998247623f, -0.306101888418198f,
+  0.104415334761143f, -0.305798590183258f, 0.104180909693241f, -0.305495083332062f,
+  0.103946708142757f, -0.305191397666931f, 0.103712752461433f, -0.304887533187866f,
+  0.103479020297527f, -0.304583519697189f, 0.103245526552200f, -0.304279297590256f,
+  0.103012263774872f, -0.303974896669388f, 0.102779231965542f, -0.303670316934586f,
+  0.102546438574791f, -0.303365558385849f, 0.102313876152039f, -0.303060621023178f,
+  0.102081544697285f, -0.302755534648895f, 0.101849451661110f, -0.302450239658356f,
+  0.101617597043514f, -0.302144765853882f, 0.101385973393917f, -0.301839113235474f,
+  0.101154580712318f, -0.301533311605453f, 0.100923426449299f, -0.301227301359177f,
+  0.100692503154278f, -0.300921112298965f, 0.100461818277836f, -0.300614774227142f,
+  0.100231364369392f, -0.300308227539063f, 0.100001148879528f, -0.300001531839371f,
+  0.099771171808243f, -0.299694657325745f, 0.099541425704956f, -0.299387603998184f,
+  0.099311910569668f, -0.299080342054367f, 0.099082641303539f, -0.298772931098938f,
+  0.098853603005409f, -0.298465341329575f, 0.098624803125858f, -0.298157602548599f,
+  0.098396234214306f, -0.297849655151367f, 0.098167903721333f, -0.297541528940201f,
+  0.097939811646938f, -0.297233253717422f, 0.097711957991123f, -0.296924799680710f,
+  0.097484335303307f, -0.296616137027740f, 0.097256951034069f, -0.296307325363159f,
+  0.097029805183411f, -0.295998334884644f, 0.096802897751331f, -0.295689195394516f,
+  0.096576221287251f, -0.295379847288132f, 0.096349790692329f, -0.295070350170136f,
+  0.096123591065407f, -0.294760644435883f, 0.095897629857063f, -0.294450789690018f,
+  0.095671907067299f, -0.294140785932541f, 0.095446422696114f, -0.293830573558807f,
+  0.095221176743507f, -0.293520182371140f, 0.094996169209480f, -0.293209642171860f,
+  0.094771400094032f, -0.292898923158646f, 0.094546869397163f, -0.292588025331497f,
+  0.094322577118874f, -0.292276978492737f, 0.094098523259163f, -0.291965723037720f,
+  0.093874707818031f, -0.291654318571091f, 0.093651130795479f, -0.291342735290527f,
+  0.093427792191505f, -0.291031002998352f, 0.093204692006111f, -0.290719062089920f,
+  0.092981837689877f, -0.290406972169876f, 0.092759214341640f, -0.290094703435898f,
+  0.092536836862564f, -0.289782285690308f, 0.092314697802067f, -0.289469659328461f,
+  0.092092797160149f, -0.289156883955002f, 0.091871134936810f, -0.288843959569931f,
+  0.091649711132050f, -0.288530826568604f, 0.091428533196449f, -0.288217544555664f,
+  0.091207593679428f, -0.287904083728790f, 0.090986892580986f, -0.287590473890305f,
+  0.090766437351704f, -0.287276685237885f, 0.090546220541000f, -0.286962717771530f,
+  0.090326242148876f, -0.286648571491241f, 0.090106502175331f, -0.286334276199341f,
+  0.089887008070946f, -0.286019802093506f, 0.089667752385139f, -0.285705178976059f,
+  0.089448742568493f, -0.285390377044678f, 0.089229971170425f, -0.285075396299362f,
+  0.089011445641518f, -0.284760266542435f, 0.088793158531189f, -0.284444957971573f,
+  0.088575109839439f, -0.284129470586777f, 0.088357307016850f, -0.283813834190369f,
+  0.088139742612839f, -0.283498018980026f, 0.087922424077988f, -0.283182054758072f,
+  0.087705351412296f, -0.282865911722183f, 0.087488517165184f, -0.282549589872360f,
+  0.087271921336651f, -0.282233119010925f, 0.087055571377277f, -0.281916469335556f,
+  0.086839467287064f, -0.281599670648575f, 0.086623609066010f, -0.281282693147659f,
+  0.086407989263535f, -0.280965566635132f, 0.086192607879639f, -0.280648261308670f,
+  0.085977479815483f, -0.280330777168274f, 0.085762590169907f, -0.280013144016266f,
+  0.085547938942909f, -0.279695361852646f, 0.085333541035652f, -0.279377400875092f,
+  0.085119381546974f, -0.279059261083603f, 0.084905467927456f, -0.278740972280502f,
+  0.084691800177097f, -0.278422504663467f, 0.084478378295898f, -0.278103888034821f,
+  0.084265194833279f, -0.277785122394562f, 0.084052257239819f, -0.277466177940369f,
+  0.083839565515518f, -0.277147054672241f, 0.083627119660378f, -0.276827782392502f,
+  0.083414919674397f, -0.276508361101151f, 0.083202958106995f, -0.276188760995865f,
+  0.082991249859333f, -0.275868982076645f, 0.082779780030251f, -0.275549083948135f,
+  0.082568563520908f, -0.275228977203369f, 0.082357585430145f, -0.274908751249313f,
+  0.082146860659122f, -0.274588316679001f, 0.081936374306679f, -0.274267762899399f,
+  0.081726133823395f, -0.273947030305862f, 0.081516146659851f, -0.273626148700714f,
+  0.081306397914886f, -0.273305088281631f, 0.081096902489662f, -0.272983878850937f,
+  0.080887645483017f, -0.272662490606308f, 0.080678641796112f, -0.272340953350067f,
+  0.080469883978367f, -0.272019267082214f, 0.080261372029781f, -0.271697402000427f,
+  0.080053105950356f, -0.271375387907028f, 0.079845085740089f, -0.271053224802017f,
+  0.079637311398983f, -0.270730882883072f, 0.079429790377617f, -0.270408391952515f,
+  0.079222507774830f, -0.270085722208023f, 0.079015478491783f, -0.269762933254242f,
+  0.078808702528477f, -0.269439965486526f, 0.078602164983749f, -0.269116818904877f,
+  0.078395880758762f, -0.268793523311615f, 0.078189842402935f, -0.268470078706741f,
+  0.077984049916267f, -0.268146485090256f, 0.077778510749340f, -0.267822742462158f,
+  0.077573217451572f, -0.267498821020126f, 0.077368170022964f, -0.267174720764160f,
+  0.077163375914097f, -0.266850501298904f, 0.076958827674389f, -0.266526103019714f,
+  0.076754532754421f, -0.266201555728912f, 0.076550483703613f, -0.265876859426498f,
+  0.076346680521965f, -0.265552014112473f, 0.076143130660057f, -0.265226989984512f,
+  0.075939826667309f, -0.264901816844940f, 0.075736775994301f, -0.264576494693756f,
+  0.075533971190453f, -0.264250993728638f, 0.075331419706345f, -0.263925373554230f,
+  0.075129114091396f, -0.263599574565887f, 0.074927061796188f, -0.263273626565933f,
+  0.074725262820721f, -0.262947499752045f, 0.074523709714413f, -0.262621253728867f,
+  0.074322402477264f, -0.262294828891754f, 0.074121348559856f, -0.261968284845352f,
+  0.073920547962189f, -0.261641561985016f, 0.073720000684261f, -0.261314690113068f,
+  0.073519699275494f, -0.260987639427185f, 0.073319651186466f, -0.260660469532013f,
+  0.073119848966599f, -0.260333120822906f, 0.072920300066471f, -0.260005623102188f,
+  0.072721004486084f, -0.259678006172180f, 0.072521962225437f, -0.259350210428238f,
+  0.072323165833950f, -0.259022265672684f, 0.072124622762203f, -0.258694142103195f,
+  0.071926333010197f, -0.258365899324417f, 0.071728296577930f, -0.258037507534027f,
+  0.071530513465405f, -0.257708936929703f, 0.071332976222038f, -0.257380217313766f,
+  0.071135692298412f, -0.257051378488541f, 0.070938661694527f, -0.256722360849380f,
+  0.070741884410381f, -0.256393194198608f, 0.070545360445976f, -0.256063878536224f,
+  0.070349089801311f, -0.255734413862228f, 0.070153072476387f, -0.255404800176620f,
+  0.069957308471203f, -0.255075037479401f, 0.069761790335178f, -0.254745125770569f,
+  0.069566532969475f, -0.254415065050125f, 0.069371521472931f, -0.254084855318069f,
+  0.069176770746708f, -0.253754496574402f, 0.068982265889645f, -0.253423988819122f,
+  0.068788021802902f, -0.253093332052231f, 0.068594031035900f, -0.252762526273727f,
+  0.068400286138058f, -0.252431541681290f, 0.068206802010536f, -0.252100437879562f,
+  0.068013571202755f, -0.251769185066223f, 0.067820593714714f, -0.251437783241272f,
+  0.067627869546413f, -0.251106232404709f, 0.067435398697853f, -0.250774532556534f,
+  0.067243188619614f, -0.250442683696747f, 0.067051224410534f, -0.250110685825348f,
+  0.066859520971775f, -0.249778553843498f, 0.066668070852757f, -0.249446272850037f,
+  0.066476874053478f, -0.249113827943802f, 0.066285938024521f, -0.248781248927116f,
+  0.066095255315304f, -0.248448520898819f, 0.065904818475246f, -0.248115643858910f,
+  0.065714649856091f, -0.247782632708550f, 0.065524727106094f, -0.247449472546577f,
+  0.065335065126419f, -0.247116148471832f, 0.065145656466484f, -0.246782705187798f,
+  0.064956501126289f, -0.246449097990990f, 0.064767606556416f, -0.246115356683731f,
+  0.064578965306282f, -0.245781451463699f, 0.064390584826469f, -0.245447427034378f,
+  0.064202457666397f, -0.245113238692284f, 0.064014583826065f, -0.244778916239738f,
+  0.063826970756054f, -0.244444444775581f, 0.063639611005783f, -0.244109839200974f,
+  0.063452512025833f, -0.243775084614754f, 0.063265666365623f, -0.243440181016922f,
+  0.063079081475735f, -0.243105143308640f, 0.062892749905586f, -0.242769956588745f,
+  0.062706671655178f, -0.242434620857239f, 0.062520854175091f, -0.242099151015282f,
+  0.062335297465324f, -0.241763532161713f, 0.062149997800589f, -0.241427779197693f,
+  0.061964951455593f, -0.241091892123222f, 0.061780165880919f, -0.240755841135979f,
+  0.061595637351274f, -0.240419670939446f, 0.061411365866661f, -0.240083336830139f,
+  0.061227355152369f, -0.239746883511543f, 0.061043601483107f, -0.239410281181335f,
+  0.060860104858875f, -0.239073529839516f, 0.060676865279675f, -0.238736644387245f,
+  0.060493886470795f, -0.238399609923363f, 0.060311164706945f, -0.238062441349030f,
+  0.060128703713417f, -0.237725138664246f, 0.059946499764919f, -0.237387686967850f,
+  0.059764556586742f, -0.237050101161003f, 0.059582870453596f, -0.236712381243706f,
+  0.059401445090771f, -0.236374512314796f, 0.059220276772976f, -0.236036509275436f,
+  0.059039369225502f, -0.235698372125626f, 0.058858718723059f, -0.235360085964203f,
+  0.058678328990936f, -0.235021665692329f, 0.058498200029135f, -0.234683111310005f,
+  0.058318331837654f, -0.234344407916069f, 0.058138720691204f, -0.234005570411682f,
+  0.057959370315075f, -0.233666598796844f, 0.057780280709267f, -0.233327493071556f,
+  0.057601451873779f, -0.232988253235817f, 0.057422880083323f, -0.232648864388466f,
+  0.057244572788477f, -0.232309341430664f, 0.057066522538662f, -0.231969684362412f,
+  0.056888736784458f, -0.231629893183708f, 0.056711208075285f, -0.231289967894554f,
+  0.056533940136433f, -0.230949893593788f, 0.056356932967901f, -0.230609700083733f,
+  0.056180190294981f, -0.230269357562065f, 0.056003704667091f, -0.229928880929947f,
+  0.055827483534813f, -0.229588270187378f, 0.055651523172855f, -0.229247525334358f,
+  0.055475823581219f, -0.228906646370888f, 0.055300384759903f, -0.228565633296967f,
+  0.055125206708908f, -0.228224486112595f, 0.054950293153524f, -0.227883204817772f,
+  0.054775636643171f, -0.227541789412498f, 0.054601248353720f, -0.227200239896774f,
+  0.054427117109299f, -0.226858556270599f, 0.054253250360489f, -0.226516738533974f,
+  0.054079644382000f, -0.226174786686897f, 0.053906302899122f, -0.225832715630531f,
+  0.053733222186565f, -0.225490495562553f, 0.053560405969620f, -0.225148141384125f,
+  0.053387850522995f, -0.224805667996407f, 0.053215555846691f, -0.224463045597076f,
+  0.053043525665998f, -0.224120303988457f, 0.052871759980917f, -0.223777428269386f,
+  0.052700258791447f, -0.223434418439865f, 0.052529018372297f, -0.223091274499893f,
+  0.052358038723469f, -0.222748011350632f, 0.052187327295542f, -0.222404599189758f,
+  0.052016876637936f, -0.222061067819595f, 0.051846686750650f, -0.221717402338982f,
+  0.051676765084267f, -0.221373617649078f, 0.051507104188204f, -0.221029683947563f,
+  0.051337707787752f, -0.220685631036758f, 0.051168579608202f, -0.220341444015503f,
+  0.050999708473682f, -0.219997137784958f, 0.050831105560064f, -0.219652697443962f,
+  0.050662767142057f, -0.219308122992516f, 0.050494693219662f, -0.218963414430618f,
+  0.050326880067587f, -0.218618586659431f, 0.050159335136414f, -0.218273624777794f,
+  0.049992054700851f, -0.217928543686867f, 0.049825038760900f, -0.217583328485489f,
+  0.049658283591270f, -0.217237979173660f, 0.049491796642542f, -0.216892510652542f,
+  0.049325577914715f, -0.216546908020973f, 0.049159619957209f, -0.216201186180115f,
+  0.048993926495314f, -0.215855330228806f, 0.048828501254320f, -0.215509355068207f,
+  0.048663340508938f, -0.215163245797157f, 0.048498444259167f, -0.214817002415657f,
+  0.048333816230297f, -0.214470639824867f, 0.048169452697039f, -0.214124158024788f,
+  0.048005353659391f, -0.213777542114258f, 0.047841522842646f, -0.213430806994438f,
+  0.047677956521511f, -0.213083937764168f, 0.047514654695988f, -0.212736949324608f,
+  0.047351621091366f, -0.212389841675758f, 0.047188851982355f, -0.212042599916458f,
+  0.047026351094246f, -0.211695238947868f, 0.046864114701748f, -0.211347743868828f,
+  0.046702146530151f, -0.211000129580498f, 0.046540446579456f, -0.210652396082878f,
+  0.046379011124372f, -0.210304543375969f, 0.046217843890190f, -0.209956556558609f,
+  0.046056941151619f, -0.209608450531960f, 0.045896306633949f, -0.209260210394859f,
+  0.045735940337181f, -0.208911851048470f, 0.045575842261314f, -0.208563387393951f,
+  0.045416008681059f, -0.208214774727821f, 0.045256443321705f, -0.207866057753563f,
+  0.045097146183252f, -0.207517206668854f, 0.044938117265701f, -0.207168251276016f,
+  0.044779352843761f, -0.206819161772728f, 0.044620860368013f, -0.206469938158989f,
+  0.044462632387877f, -0.206120610237122f, 0.044304672628641f, -0.205771163105965f,
+  0.044146984815598f, -0.205421581864357f, 0.043989561498165f, -0.205071896314621f,
+  0.043832406401634f, -0.204722076654434f, 0.043675523251295f, -0.204372137784958f,
+  0.043518904596567f, -0.204022079706192f, 0.043362557888031f, -0.203671902418137f,
+  0.043206475675106f, -0.203321605920792f, 0.043050665408373f, -0.202971190214157f,
+  0.042895123362541f, -0.202620655298233f, 0.042739849537611f, -0.202270001173019f,
+  0.042584843933582f, -0.201919227838516f, 0.042430106550455f, -0.201568335294724f,
+  0.042275641113520f, -0.201217323541641f, 0.042121443897486f, -0.200866192579269f,
+  0.041967518627644f, -0.200514942407608f, 0.041813857853413f, -0.200163587927818f,
+  0.041660469025373f, -0.199812099337578f, 0.041507352143526f, -0.199460506439209f,
+  0.041354499757290f, -0.199108779430389f, 0.041201923042536f, -0.198756948113441f,
+  0.041049610823393f, -0.198404997587204f, 0.040897574275732f, -0.198052927851677f,
+  0.040745802223682f, -0.197700738906860f, 0.040594302117825f, -0.197348430752754f,
+  0.040443073958158f, -0.196996018290520f, 0.040292114019394f, -0.196643486618996f,
+  0.040141426026821f, -0.196290835738182f, 0.039991009980440f, -0.195938065648079f,
+  0.039840862154961f, -0.195585191249847f, 0.039690986275673f, -0.195232197642326f,
+  0.039541378617287f, -0.194879084825516f, 0.039392042905092f, -0.194525867700577f,
+  0.039242979139090f, -0.194172516465187f, 0.039094187319279f, -0.193819075822830f,
+  0.038945667445660f, -0.193465501070023f, 0.038797415792942f, -0.193111822009087f,
+  0.038649436086416f, -0.192758023738861f, 0.038501728326082f, -0.192404121160507f,
+  0.038354292511940f, -0.192050099372864f, 0.038207128643990f, -0.191695958375931f,
+  0.038060232996941f, -0.191341713070869f, 0.037913613021374f, -0.190987363457680f,
+  0.037767261266708f, -0.190632879734039f, 0.037621185183525f, -0.190278306603432f,
+  0.037475381046534f, -0.189923599362373f, 0.037329845130444f, -0.189568802714348f,
+  0.037184584885836f, -0.189213871955872f, 0.037039596587420f, -0.188858851790428f,
+  0.036894880235195f, -0.188503712415695f, 0.036750435829163f, -0.188148453831673f,
+  0.036606263369322f, -0.187793090939522f, 0.036462362855673f, -0.187437608838081f,
+  0.036318738013506f, -0.187082037329674f, 0.036175385117531f, -0.186726331710815f,
+  0.036032304167747f, -0.186370536684990f, 0.035889495164156f, -0.186014622449875f,
+  0.035746958106756f, -0.185658603906631f, 0.035604696720839f, -0.185302466154099f,
+  0.035462711006403f, -0.184946224093437f, 0.035320993512869f, -0.184589877724648f,
+  0.035179551690817f, -0.184233412146568f, 0.035038381814957f, -0.183876842260361f,
+  0.034897487610579f, -0.183520168066025f, 0.034756865352392f, -0.183163389563560f,
+  0.034616518765688f, -0.182806491851807f, 0.034476444125175f, -0.182449504733086f,
+  0.034336645156145f, -0.182092398405075f, 0.034197118133307f, -0.181735187768936f,
+  0.034057866781950f, -0.181377857923508f, 0.033918887376785f, -0.181020438671112f,
+  0.033780183643103f, -0.180662900209427f, 0.033641755580902f, -0.180305257439613f,
+  0.033503599464893f, -0.179947525262833f, 0.033365719020367f, -0.179589673876762f,
+  0.033228114247322f, -0.179231703281403f, 0.033090781420469f, -0.178873643279076f,
+  0.032953724265099f, -0.178515478968620f, 0.032816942781210f, -0.178157210350037f,
+  0.032680433243513f, -0.177798837423325f, 0.032544203102589f, -0.177440345287323f,
+  0.032408244907856f, -0.177081763744354f, 0.032272562384605f, -0.176723077893257f,
+  0.032137155532837f, -0.176364272832870f, 0.032002024352551f, -0.176005378365517f,
+  0.031867165118456f, -0.175646379590034f, 0.031732585281134f, -0.175287276506424f,
+  0.031598277390003f, -0.174928069114685f, 0.031464248895645f, -0.174568757414818f,
+  0.031330492347479f, -0.174209341406822f, 0.031197015196085f, -0.173849821090698f,
+  0.031063811853528f, -0.173490211367607f, 0.030930884182453f, -0.173130482435226f,
+  0.030798232182860f, -0.172770664095879f, 0.030665857717395f, -0.172410741448402f,
+  0.030533758923411f, -0.172050714492798f, 0.030401935800910f, -0.171690583229065f,
+  0.030270388349891f, -0.171330362558365f, 0.030139118432999f, -0.170970037579536f,
+  0.030008124187589f, -0.170609608292580f, 0.029877405613661f, -0.170249074697495f,
+  0.029746964573860f, -0.169888436794281f, 0.029616801068187f, -0.169527709484100f,
+  0.029486913233995f, -0.169166877865791f, 0.029357301071286f, -0.168805956840515f,
+  0.029227968305349f, -0.168444931507111f, 0.029098909348249f, -0.168083801865578f,
+  0.028970129787922f, -0.167722567915916f, 0.028841627761722f, -0.167361244559288f,
+  0.028713401407003f, -0.166999831795692f, 0.028585452586412f, -0.166638299822807f,
+  0.028457781299949f, -0.166276678442955f, 0.028330387547612f, -0.165914967656136f,
+  0.028203271329403f, -0.165553152561188f, 0.028076432645321f, -0.165191248059273f,
+  0.027949871495366f, -0.164829224348068f, 0.027823587879539f, -0.164467126131058f,
+  0.027697581797838f, -0.164104923605919f, 0.027571853250265f, -0.163742616772652f,
+  0.027446404099464f, -0.163380220532417f, 0.027321230620146f, -0.163017734885216f,
+  0.027196336537600f, -0.162655144929886f, 0.027071721851826f, -0.162292465567589f,
+  0.026947384700179f, -0.161929681897163f, 0.026823325082660f, -0.161566808819771f,
+  0.026699542999268f, -0.161203846335411f, 0.026576040312648f, -0.160840779542923f,
+  0.026452817022800f, -0.160477623343468f, 0.026329871267080f, -0.160114362835884f,
+  0.026207204908133f, -0.159751012921333f, 0.026084816083312f, -0.159387573599815f,
+  0.025962706655264f, -0.159024044871330f, 0.025840876623988f, -0.158660411834717f,
+  0.025719324126840f, -0.158296689391136f, 0.025598052889109f, -0.157932877540588f,
+  0.025477059185505f, -0.157568961381912f, 0.025356344878674f, -0.157204970717430f,
+  0.025235909968615f, -0.156840875744820f, 0.025115754455328f, -0.156476691365242f,
+  0.024995878338814f, -0.156112402677536f, 0.024876279756427f, -0.155748039484024f,
+  0.024756962433457f, -0.155383571982384f, 0.024637924507260f, -0.155019029974937f,
+  0.024519165977836f, -0.154654383659363f, 0.024400688707829f, -0.154289647936821f,
+  0.024282488971949f, -0.153924822807312f, 0.024164570495486f, -0.153559908270836f,
+  0.024046931415796f, -0.153194904327393f, 0.023929571732879f, -0.152829796075821f,
+  0.023812493309379f, -0.152464613318443f, 0.023695694282651f, -0.152099341154099f,
+  0.023579176515341f, -0.151733979582787f, 0.023462938144803f, -0.151368513703346f,
+  0.023346979171038f, -0.151002973318100f, 0.023231301456690f, -0.150637343525887f,
+  0.023115905001760f, -0.150271624326706f, 0.023000787943602f, -0.149905815720558f,
+  0.022885952144861f, -0.149539917707443f, 0.022771397605538f, -0.149173930287361f,
+  0.022657122462988f, -0.148807853460312f, 0.022543128579855f, -0.148441687226295f,
+  0.022429415956140f, -0.148075446486473f, 0.022315984591842f, -0.147709101438522f,
+  0.022202832624316f, -0.147342681884766f, 0.022089963778853f, -0.146976172924042f,
+  0.021977374330163f, -0.146609574556351f, 0.021865066140890f, -0.146242901682854f,
+  0.021753041073680f, -0.145876124501228f, 0.021641295403242f, -0.145509272813797f,
+  0.021529832854867f, -0.145142331719399f, 0.021418649703264f, -0.144775316119194f,
+  0.021307749673724f, -0.144408211112022f, 0.021197130903602f, -0.144041016697884f,
+  0.021086793392897f, -0.143673732876778f, 0.020976737141609f, -0.143306359648705f,
+  0.020866964012384f, -0.142938911914825f, 0.020757472142577f, -0.142571389675140f,
+  0.020648263394833f, -0.142203763127327f, 0.020539334043860f, -0.141836062073708f,
+  0.020430689677596f, -0.141468286514282f, 0.020322324708104f, -0.141100421547890f,
+  0.020214242860675f, -0.140732467174530f, 0.020106444135308f, -0.140364438295364f,
+  0.019998926669359f, -0.139996320009232f, 0.019891692325473f, -0.139628127217293f,
+  0.019784741103649f, -0.139259845018387f, 0.019678071141243f, -0.138891488313675f,
+  0.019571684300900f, -0.138523042201996f, 0.019465578719974f, -0.138154521584511f,
+  0.019359756261110f, -0.137785911560059f, 0.019254218786955f, -0.137417227029800f,
+  0.019148962572217f, -0.137048453092575f, 0.019043987616897f, -0.136679604649544f,
+  0.018939297646284f, -0.136310681700706f, 0.018834890797734f, -0.135941669344902f,
+  0.018730765208602f, -0.135572582483292f, 0.018626924604177f, -0.135203406214714f,
+  0.018523367121816f, -0.134834155440331f, 0.018420090898871f, -0.134464830160141f,
+  0.018317099660635f, -0.134095430374146f, 0.018214391544461f, -0.133725941181183f,
+  0.018111966550350f, -0.133356377482414f, 0.018009826540947f, -0.132986739277840f,
+  0.017907967790961f, -0.132617011666298f, 0.017806394025683f, -0.132247209548950f,
+  0.017705103382468f, -0.131877332925797f, 0.017604095861316f, -0.131507381796837f,
+  0.017503373324871f, -0.131137356162071f, 0.017402933910489f, -0.130767241120338f,
+  0.017302779480815f, -0.130397051572800f, 0.017202908173203f, -0.130026802420616f,
+  0.017103319987655f, -0.129656463861465f, 0.017004016786814f, -0.129286035895348f,
+  0.016904998570681f, -0.128915548324585f, 0.016806263476610f, -0.128544986248016f,
+  0.016707813367248f, -0.128174334764481f, 0.016609646379948f, -0.127803623676300f,
+  0.016511764377356f, -0.127432823181152f, 0.016414167359471f, -0.127061963081360f,
+  0.016316853463650f, -0.126691013574600f, 0.016219824552536f, -0.126320004463196f,
+  0.016123080626130f, -0.125948905944824f, 0.016026621684432f, -0.125577747821808f,
+  0.015930447727442f, -0.125206500291824f, 0.015834558755159f, -0.124835193157196f,
+  0.015738952904940f, -0.124463804066181f, 0.015643632039428f, -0.124092340469360f,
+  0.015548598021269f, -0.123720809817314f, 0.015453847125173f, -0.123349204659462f,
+  0.015359382145107f, -0.122977524995804f, 0.015265202149749f, -0.122605770826340f,
+  0.015171307139099f, -0.122233949601650f, 0.015077698044479f, -0.121862053871155f,
+  0.014984373003244f, -0.121490091085434f, 0.014891333878040f, -0.121118053793907f,
+  0.014798580668867f, -0.120745941996574f, 0.014706112444401f, -0.120373763144016f,
+  0.014613929204643f, -0.120001509785652f, 0.014522032812238f, -0.119629189372063f,
+  0.014430420473218f, -0.119256794452667f, 0.014339094981551f, -0.118884332478046f,
+  0.014248054474592f, -0.118511803448200f, 0.014157299883664f, -0.118139199912548f,
+  0.014066831208766f, -0.117766529321671f, 0.013976648449898f, -0.117393791675568f,
+  0.013886751607060f, -0.117020979523659f, 0.013797140680254f, -0.116648100316525f,
+  0.013707815669477f, -0.116275154054165f, 0.013618776574731f, -0.115902140736580f,
+  0.013530024327338f, -0.115529052913189f, 0.013441557064652f, -0.115155905485153f,
+  0.013353376649320f, -0.114782683551311f, 0.013265483081341f, -0.114409394562244f,
+  0.013177875429392f, -0.114036038517952f, 0.013090553693473f, -0.113662622869015f,
+  0.013003518804908f, -0.113289132714272f, 0.012916770763695f, -0.112915575504303f,
+  0.012830308638513f, -0.112541958689690f, 0.012744133360684f, -0.112168267369270f,
+  0.012658244930208f, -0.111794516444206f, 0.012572642415762f, -0.111420698463917f,
+  0.012487327679992f, -0.111046813428402f, 0.012402298860252f, -0.110672861337662f,
+  0.012317557819188f, -0.110298842191696f, 0.012233102694154f, -0.109924763441086f,
+  0.012148935347795f, -0.109550617635250f, 0.012065053917468f, -0.109176412224770f,
+  0.011981460265815f, -0.108802139759064f, 0.011898153461516f, -0.108427800238132f,
+  0.011815134435892f, -0.108053401112556f, 0.011732402257621f, -0.107678934931755f,
+  0.011649956926703f, -0.107304409146309f, 0.011567799374461f, -0.106929816305637f,
+  0.011485928669572f, -0.106555156409740f, 0.011404345743358f, -0.106180444359779f,
+  0.011323049664497f, -0.105805665254593f, 0.011242041364312f, -0.105430819094181f,
+  0.011161320842803f, -0.105055920779705f, 0.011080888099968f, -0.104680955410004f,
+  0.011000742204487f, -0.104305922985077f, 0.010920885019004f, -0.103930838406086f,
+  0.010841314680874f, -0.103555686771870f, 0.010762032121420f, -0.103180475533009f,
+  0.010683037340641f, -0.102805204689503f, 0.010604331269860f, -0.102429874241352f,
+  0.010525912046432f, -0.102054484188557f, 0.010447781533003f, -0.101679034531116f,
+  0.010369938798249f, -0.101303517818451f, 0.010292383842170f, -0.100927948951721f,
+  0.010215117596090f, -0.100552320480347f, 0.010138138197362f, -0.100176624953747f,
+  0.010061448439956f, -0.099800877273083f, 0.009985045529902f, -0.099425069987774f,
+  0.009908932261169f, -0.099049203097820f, 0.009833106771111f, -0.098673284053802f,
+  0.009757569059730f, -0.098297297954559f, 0.009682320058346f, -0.097921259701252f,
+  0.009607359766960f, -0.097545161843300f, 0.009532688185573f, -0.097169004380703f,
+  0.009458304382861f, -0.096792794764042f, 0.009384209290147f, -0.096416525542736f,
+  0.009310402907431f, -0.096040196716785f, 0.009236886166036f, -0.095663815736771f,
+  0.009163657203317f, -0.095287375152111f, 0.009090716950595f, -0.094910882413387f,
+  0.009018065407872f, -0.094534330070019f, 0.008945702575147f, -0.094157725572586f,
+  0.008873629383743f, -0.093781061470509f, 0.008801844902337f, -0.093404345214367f,
+  0.008730349130929f, -0.093027576804161f, 0.008659142069519f, -0.092650748789310f,
+  0.008588224649429f, -0.092273868620396f, 0.008517595939338f, -0.091896936297417f,
+  0.008447255939245f, -0.091519944369793f, 0.008377205580473f, -0.091142900288105f,
+  0.008307444863021f, -0.090765804052353f, 0.008237972855568f, -0.090388655662537f,
+  0.008168790489435f, -0.090011447668076f, 0.008099896833301f, -0.089634194970131f,
+  0.008031292818487f, -0.089256882667542f, 0.007962978444993f, -0.088879525661469f,
+  0.007894953712821f, -0.088502109050751f, 0.007827218621969f, -0.088124647736549f,
+  0.007759772241116f, -0.087747126817703f, 0.007692615967244f, -0.087369553744793f,
+  0.007625748869032f, -0.086991935968399f, 0.007559171877801f, -0.086614266037941f,
+  0.007492884527892f, -0.086236543953419f, 0.007426886819303f, -0.085858769714832f,
+  0.007361178752035f, -0.085480943322182f, 0.007295760791749f, -0.085103072226048f,
+  0.007230632472783f, -0.084725148975849f, 0.007165793795139f, -0.084347173571587f,
+  0.007101245224476f, -0.083969146013260f, 0.007036986760795f, -0.083591073751450f,
+  0.006973018404096f, -0.083212949335575f, 0.006909339688718f, -0.082834780216217f,
+  0.006845951545984f, -0.082456558942795f, 0.006782853044569f, -0.082078292965889f,
+  0.006720044650137f, -0.081699974834919f, 0.006657526828349f, -0.081321612000465f,
+  0.006595299113542f, -0.080943197011948f, 0.006533361505717f, -0.080564737319946f,
+  0.006471714470536f, -0.080186225473881f, 0.006410357542336f, -0.079807676374912f,
+  0.006349290721118f, -0.079429075121880f, 0.006288514938205f, -0.079050421714783f,
+  0.006228029262275f, -0.078671731054783f, 0.006167833693326f, -0.078292988240719f,
+  0.006107929162681f, -0.077914200723171f, 0.006048315204680f, -0.077535368502140f,
+  0.005988991353661f, -0.077156484127045f, 0.005929958540946f, -0.076777562499046f,
+  0.005871216300875f, -0.076398596167564f, 0.005812764633447f, -0.076019577682018f,
+  0.005754603538662f, -0.075640521943569f, 0.005696733482182f, -0.075261414051056f,
+  0.005639153998345f, -0.074882268905640f, 0.005581865552813f, -0.074503071606159f,
+  0.005524867679924f, -0.074123837053776f, 0.005468160845339f, -0.073744557797909f,
+  0.005411745049059f, -0.073365233838558f, 0.005355620291084f, -0.072985872626305f,
+  0.005299786105752f, -0.072606459259987f, 0.005244242958724f, -0.072227008640766f,
+  0.005188991315663f, -0.071847513318062f, 0.005134030245245f, -0.071467980742455f,
+  0.005079360678792f, -0.071088403463364f, 0.005024982150644f, -0.070708781480789f,
+  0.004970894660801f, -0.070329122245312f, 0.004917098674923f, -0.069949418306351f,
+  0.004863593727350f, -0.069569669663906f, 0.004810380283743f, -0.069189883768559f,
+  0.004757457878441f, -0.068810060620308f, 0.004704826977104f, -0.068430192768574f,
+  0.004652487114072f, -0.068050287663937f, 0.004600439220667f, -0.067670337855816f,
+  0.004548682365566f, -0.067290350794792f, 0.004497217014432f, -0.066910326480865f,
+  0.004446043167263f, -0.066530264914036f, 0.004395160824060f, -0.066150158643723f,
+  0.004344569984823f, -0.065770015120506f, 0.004294271115214f, -0.065389834344387f,
+  0.004244263283908f, -0.065009608864784f, 0.004194547422230f, -0.064629353582859f,
+  0.004145123064518f, -0.064249053597450f, 0.004095990676433f, -0.063868723809719f,
+  0.004047149792314f, -0.063488349318504f, 0.003998600877821f, -0.063107937574387f,
+  0.003950343467295f, -0.062727488577366f, 0.003902378026396f, -0.062347009778023f,
+  0.003854704322293f, -0.061966486275196f, 0.003807322587818f, -0.061585929244757f,
+  0.003760232590139f, -0.061205338686705f, 0.003713434794918f, -0.060824707150459f,
+  0.003666928736493f, -0.060444042086601f, 0.003620714880526f, -0.060063343495131f,
+  0.003574792761356f, -0.059682607650757f, 0.003529162844643f, -0.059301838278770f,
+  0.003483824897557f, -0.058921031653881f, 0.003438779152930f, -0.058540191501379f,
+  0.003394025377929f, -0.058159314095974f, 0.003349563805386f, -0.057778406888247f,
+  0.003305394435301f, -0.057397462427616f, 0.003261517267674f, -0.057016488164663f,
+  0.003217932302505f, -0.056635476648808f, 0.003174639539793f, -0.056254431605339f,
+  0.003131638979539f, -0.055873356759548f, 0.003088930854574f, -0.055492244660854f,
+  0.003046514932066f, -0.055111102759838f, 0.003004391444847f, -0.054729927331209f,
+  0.002962560392916f, -0.054348722100258f, 0.002921021543443f, -0.053967483341694f,
+  0.002879775362089f, -0.053586211055517f, 0.002838821383193f, -0.053204908967018f,
+  0.002798160072416f, -0.052823577076197f, 0.002757790964097f, -0.052442211657763f,
+  0.002717714523897f, -0.052060816437006f, 0.002677930751815f, -0.051679391413927f,
+  0.002638439415023f, -0.051297932863235f, 0.002599240746349f, -0.050916448235512f,
+  0.002560334512964f, -0.050534930080175f, 0.002521721180528f, -0.050153385847807f,
+  0.002483400283381f, -0.049771808087826f, 0.002445372054353f, -0.049390204250813f,
+  0.002407636726275f, -0.049008570611477f, 0.002370193833485f, -0.048626907169819f,
+  0.002333043841645f, -0.048245213925838f, 0.002296186750755f, -0.047863494604826f,
+  0.002259622327983f, -0.047481749206781f, 0.002223350573331f, -0.047099970281124f,
+  0.002187371719629f, -0.046718169003725f, 0.002151685766876f, -0.046336337924004f,
+  0.002116292715073f, -0.045954477041960f, 0.002081192564219f, -0.045572593808174f,
+  0.002046385314316f, -0.045190680772066f, 0.002011870965362f, -0.044808741658926f,
+  0.001977649517357f, -0.044426776468754f, 0.001943721086718f, -0.044044785201550f,
+  0.001910085673444f, -0.043662767857313f, 0.001876743277535f, -0.043280724436045f,
+  0.001843693898991f, -0.042898654937744f, 0.001810937537812f, -0.042516563087702f,
+  0.001778474310413f, -0.042134445160627f, 0.001746304216795f, -0.041752301156521f,
+  0.001714427140541f, -0.041370131075382f, 0.001682843198068f, -0.040987938642502f,
+  0.001651552389376f, -0.040605723857880f, 0.001620554830879f, -0.040223482996225f,
+  0.001589850406162f, -0.039841219782829f, 0.001559439115226f, -0.039458930492401f,
+  0.001529321074486f, -0.039076622575521f, 0.001499496400356f, -0.038694288581610f,
+  0.001469964860007f, -0.038311932235956f, 0.001440726569854f, -0.037929553538561f,
+  0.001411781646311f, -0.037547148764133f, 0.001383129972965f, -0.037164725363255f,
+  0.001354771666229f, -0.036782283335924f, 0.001326706726104f, -0.036399815231562f,
+  0.001298935036175f, -0.036017324775457f, 0.001271456829272f, -0.035634815692902f,
+  0.001244271872565f, -0.035252287983894f, 0.001217380515300f, -0.034869734197855f,
+  0.001190782408230f, -0.034487165510654f, 0.001164477784187f, -0.034104570746422f,
+  0.001138466643170f, -0.033721961081028f, 0.001112748985179f, -0.033339329063892f,
+  0.001087324810214f, -0.032956674695015f, 0.001062194118276f, -0.032574005424976f,
+  0.001037356909364f, -0.032191313803196f, 0.001012813183479f, -0.031808607280254f,
+  0.000988563057035f, -0.031425878405571f, 0.000964606530033f, -0.031043132767081f,
+  0.000940943544265f, -0.030660368502140f, 0.000917574157938f, -0.030277585610747f,
+  0.000894498312846f, -0.029894785955548f, 0.000871716125403f, -0.029511967673898f,
+  0.000849227537401f, -0.029129132628441f, 0.000827032607049f, -0.028746278956532f,
+  0.000805131276138f, -0.028363410383463f, 0.000783523661084f, -0.027980525046587f,
+  0.000762209703680f, -0.027597622945905f, 0.000741189462133f, -0.027214704081416f,
+  0.000720462878235f, -0.026831768453121f, 0.000700030010194f, -0.026448817923665f,
+  0.000679890916217f, -0.026065852493048f, 0.000660045538098f, -0.025682870298624f,
+  0.000640493875835f, -0.025299875065684f, 0.000621235987637f, -0.024916863068938f,
+  0.000602271873504f, -0.024533838033676f, 0.000583601591643f, -0.024150796234608f,
+  0.000565225025639f, -0.023767741397023f, 0.000547142291907f, -0.023384673520923f,
+  0.000529353390448f, -0.023001590743661f, 0.000511858321261f, -0.022618494927883f,
+  0.000494657084346f, -0.022235386073589f, 0.000477749679703f, -0.021852264180779f,
+  0.000461136136437f, -0.021469129249454f, 0.000444816454547f, -0.021085981279612f,
+  0.000428790634032f, -0.020702820271254f, 0.000413058703998f, -0.020319648087025f,
+  0.000397620693548f, -0.019936462864280f, 0.000382476573577f, -0.019553268328309f,
+  0.000367626344087f, -0.019170060753822f, 0.000353070063284f, -0.018786842003465f,
+  0.000338807702065f, -0.018403612077236f, 0.000324839289533f, -0.018020370975137f,
+  0.000311164796585f, -0.017637118697166f, 0.000297784281429f, -0.017253857105970f,
+  0.000284697714960f, -0.016870586201549f, 0.000271905126283f, -0.016487304121256f,
+  0.000259406515397f, -0.016104012727737f, 0.000247201882303f, -0.015720712020993f,
+  0.000235291256104f, -0.015337402001023f, 0.000223674607696f, -0.014954082667828f,
+  0.000212351980736f, -0.014570754021406f, 0.000201323360670f, -0.014187417924404f,
+  0.000190588747500f, -0.013804072514176f, 0.000180148170330f, -0.013420719653368f,
+  0.000170001629158f, -0.013037359341979f, 0.000160149123985f, -0.012653990648687f,
+  0.000150590654812f, -0.012270614504814f, 0.000141326236189f, -0.011887230910361f,
+  0.000132355868118f, -0.011503840796649f, 0.000123679565149f, -0.011120444163680f,
+  0.000115297327284f, -0.010737040080130f, 0.000107209154521f, -0.010353630408645f,
+  0.000099415054137f, -0.009970214217901f, 0.000091915040684f, -0.009586792439222f,
+  0.000084709099610f, -0.009203365072608f, 0.000077797252743f, -0.008819932118058f,
+  0.000071179500083f, -0.008436493575573f, 0.000064855834353f, -0.008053051307797f,
+  0.000058826273744f, -0.007669602986425f, 0.000053090810979f, -0.007286150939763f,
+  0.000047649456974f, -0.006902694236487f, 0.000042502211727f, -0.006519233807921f,
+  0.000037649078877f, -0.006135769188404f, 0.000033090062061f, -0.005752300843596f,
+  0.000028825161280f, -0.005368829704821f, 0.000024854381991f, -0.004985354840755f,
+  0.000021177724193f, -0.004601877182722f, 0.000017795191525f, -0.004218397196382f,
+  0.000014706784896f, -0.003834914416075f, 0.000011912506125f, -0.003451429307461f,
+  0.000009412358850f, -0.003067942336202f, 0.000007206342616f, -0.002684453502297f,
+  0.000005294459243f, -0.002300963038579f, 0.000003676709639f, -0.001917471294291f,
+  0.000002353095169f, -0.001533978385851f, 0.000001323616516f, -0.001150484546088f,
+  0.000000588274133f, -0.000766990066040f, 0.000000147068562f, -0.000383495149435f,
+  0.000000000000000f, -0.000000000000023f, 0.000000147068562f, 0.000383495149435f,
+  0.000000588274133f, 0.000766990066040f, 0.000001323616516f, 0.001150484546088f,
+  0.000002353095169f, 0.001533978385851f, 0.000003676709639f, 0.001917471294291f,
+  0.000005294459243f, 0.002300963038579f, 0.000007206342616f, 0.002684453502297f,
+  0.000009412358850f, 0.003067942336202f, 0.000011912506125f, 0.003451429307461f,
+  0.000014706784896f, 0.003834914416075f, 0.000017795191525f, 0.004218397196382f,
+  0.000021177724193f, 0.004601877182722f, 0.000024854381991f, 0.004985354840755f,
+  0.000028825161280f, 0.005368829704821f, 0.000033090062061f, 0.005752300843596f,
+  0.000037649078877f, 0.006135769188404f, 0.000042502211727f, 0.006519233807921f,
+  0.000047649456974f, 0.006902694236487f, 0.000053090810979f, 0.007286150939763f,
+  0.000058826273744f, 0.007669602986425f, 0.000064855834353f, 0.008053051307797f,
+  0.000071179500083f, 0.008436493575573f, 0.000077797252743f, 0.008819932118058f,
+  0.000084709099610f, 0.009203365072608f, 0.000091915040684f, 0.009586792439222f,
+  0.000099415054137f, 0.009970214217901f, 0.000107209154521f, 0.010353630408645f,
+  0.000115297327284f, 0.010737040080130f, 0.000123679565149f, 0.011120444163680f,
+  0.000132355868118f, 0.011503840796649f, 0.000141326236189f, 0.011887230910361f,
+  0.000150590654812f, 0.012270614504814f, 0.000160149123985f, 0.012653990648687f,
+  0.000170001629158f, 0.013037359341979f, 0.000180148170330f, 0.013420719653368f,
+  0.000190588747500f, 0.013804072514176f, 0.000201323360670f, 0.014187417924404f,
+  0.000212351980736f, 0.014570754021406f, 0.000223674607696f, 0.014954082667828f,
+  0.000235291256104f, 0.015337402001023f, 0.000247201882303f, 0.015720712020993f,
+  0.000259406515397f, 0.016104012727737f, 0.000271905126283f, 0.016487304121256f,
+  0.000284697714960f, 0.016870586201549f, 0.000297784281429f, 0.017253857105970f,
+  0.000311164796585f, 0.017637118697166f, 0.000324839289533f, 0.018020370975137f,
+  0.000338807702065f, 0.018403612077236f, 0.000353070063284f, 0.018786842003465f,
+  0.000367626344087f, 0.019170060753822f, 0.000382476573577f, 0.019553268328309f,
+  0.000397620693548f, 0.019936462864280f, 0.000413058703998f, 0.020319648087025f,
+  0.000428790634032f, 0.020702820271254f, 0.000444816454547f, 0.021085981279612f,
+  0.000461136136437f, 0.021469129249454f, 0.000477749679703f, 0.021852264180779f,
+  0.000494657084346f, 0.022235386073589f, 0.000511858321261f, 0.022618494927883f,
+  0.000529353390448f, 0.023001590743661f, 0.000547142291907f, 0.023384673520923f,
+  0.000565225025639f, 0.023767741397023f, 0.000583601591643f, 0.024150796234608f,
+  0.000602271873504f, 0.024533838033676f, 0.000621235987637f, 0.024916863068938f,
+  0.000640493875835f, 0.025299875065684f, 0.000660045538098f, 0.025682870298624f,
+  0.000679890916217f, 0.026065852493048f, 0.000700030010194f, 0.026448817923665f,
+  0.000720462878235f, 0.026831768453121f, 0.000741189462133f, 0.027214704081416f,
+  0.000762209703680f, 0.027597622945905f, 0.000783523661084f, 0.027980525046587f,
+  0.000805131276138f, 0.028363410383463f, 0.000827032607049f, 0.028746278956532f,
+  0.000849227537401f, 0.029129132628441f, 0.000871716125403f, 0.029511967673898f,
+  0.000894498312846f, 0.029894785955548f, 0.000917574157938f, 0.030277585610747f,
+  0.000940943544265f, 0.030660368502140f, 0.000964606530033f, 0.031043132767081f,
+  0.000988563057035f, 0.031425878405571f, 0.001012813183479f, 0.031808607280254f,
+  0.001037356909364f, 0.032191313803196f, 0.001062194118276f, 0.032574005424976f,
+  0.001087324810214f, 0.032956674695015f, 0.001112748985179f, 0.033339329063892f,
+  0.001138466643170f, 0.033721961081028f, 0.001164477784187f, 0.034104570746422f,
+  0.001190782408230f, 0.034487165510654f, 0.001217380515300f, 0.034869734197855f,
+  0.001244271872565f, 0.035252287983894f, 0.001271456829272f, 0.035634815692902f,
+  0.001298935036175f, 0.036017324775457f, 0.001326706726104f, 0.036399815231562f,
+  0.001354771666229f, 0.036782283335924f, 0.001383129972965f, 0.037164725363255f,
+  0.001411781646311f, 0.037547148764133f, 0.001440726569854f, 0.037929553538561f,
+  0.001469964860007f, 0.038311932235956f, 0.001499496400356f, 0.038694288581610f,
+  0.001529321074486f, 0.039076622575521f, 0.001559439115226f, 0.039458930492401f,
+  0.001589850406162f, 0.039841219782829f, 0.001620554830879f, 0.040223482996225f,
+  0.001651552389376f, 0.040605723857880f, 0.001682843198068f, 0.040987938642502f,
+  0.001714427140541f, 0.041370131075382f, 0.001746304216795f, 0.041752301156521f,
+  0.001778474310413f, 0.042134445160627f, 0.001810937537812f, 0.042516563087702f,
+  0.001843693898991f, 0.042898654937744f, 0.001876743277535f, 0.043280724436045f,
+  0.001910085673444f, 0.043662767857313f, 0.001943721086718f, 0.044044785201550f,
+  0.001977649517357f, 0.044426776468754f, 0.002011870965362f, 0.044808741658926f,
+  0.002046385314316f, 0.045190680772066f, 0.002081192564219f, 0.045572593808174f,
+  0.002116292715073f, 0.045954477041960f, 0.002151685766876f, 0.046336337924004f,
+  0.002187371719629f, 0.046718169003725f, 0.002223350573331f, 0.047099970281124f,
+  0.002259622327983f, 0.047481749206781f, 0.002296186750755f, 0.047863494604826f,
+  0.002333043841645f, 0.048245213925838f, 0.002370193833485f, 0.048626907169819f,
+  0.002407636726275f, 0.049008570611477f, 0.002445372054353f, 0.049390204250813f,
+  0.002483400283381f, 0.049771808087826f, 0.002521721180528f, 0.050153385847807f,
+  0.002560334512964f, 0.050534930080175f, 0.002599240746349f, 0.050916448235512f,
+  0.002638439415023f, 0.051297932863235f, 0.002677930751815f, 0.051679391413927f,
+  0.002717714523897f, 0.052060816437006f, 0.002757790964097f, 0.052442211657763f,
+  0.002798160072416f, 0.052823577076197f, 0.002838821383193f, 0.053204908967018f,
+  0.002879775362089f, 0.053586211055517f, 0.002921021543443f, 0.053967483341694f,
+  0.002962560392916f, 0.054348722100258f, 0.003004391444847f, 0.054729927331209f,
+  0.003046514932066f, 0.055111102759838f, 0.003088930854574f, 0.055492244660854f,
+  0.003131638979539f, 0.055873356759548f, 0.003174639539793f, 0.056254431605339f,
+  0.003217932302505f, 0.056635476648808f, 0.003261517267674f, 0.057016488164663f,
+  0.003305394435301f, 0.057397462427616f, 0.003349563805386f, 0.057778406888247f,
+  0.003394025377929f, 0.058159314095974f, 0.003438779152930f, 0.058540191501379f,
+  0.003483824897557f, 0.058921031653881f, 0.003529162844643f, 0.059301838278770f,
+  0.003574792761356f, 0.059682607650757f, 0.003620714880526f, 0.060063343495131f,
+  0.003666928736493f, 0.060444042086601f, 0.003713434794918f, 0.060824707150459f,
+  0.003760232590139f, 0.061205338686705f, 0.003807322587818f, 0.061585929244757f,
+  0.003854704322293f, 0.061966486275196f, 0.003902378026396f, 0.062347009778023f,
+  0.003950343467295f, 0.062727488577366f, 0.003998600877821f, 0.063107937574387f,
+  0.004047149792314f, 0.063488349318504f, 0.004095990676433f, 0.063868723809719f,
+  0.004145123064518f, 0.064249053597450f, 0.004194547422230f, 0.064629353582859f,
+  0.004244263283908f, 0.065009608864784f, 0.004294271115214f, 0.065389834344387f,
+  0.004344569984823f, 0.065770015120506f, 0.004395160824060f, 0.066150158643723f,
+  0.004446043167263f, 0.066530264914036f, 0.004497217014432f, 0.066910326480865f,
+  0.004548682365566f, 0.067290350794792f, 0.004600439220667f, 0.067670337855816f,
+  0.004652487114072f, 0.068050287663937f, 0.004704826977104f, 0.068430192768574f,
+  0.004757457878441f, 0.068810060620308f, 0.004810380283743f, 0.069189883768559f,
+  0.004863593727350f, 0.069569669663906f, 0.004917098674923f, 0.069949418306351f,
+  0.004970894660801f, 0.070329122245312f, 0.005024982150644f, 0.070708781480789f,
+  0.005079360678792f, 0.071088403463364f, 0.005134030245245f, 0.071467980742455f,
+  0.005188991315663f, 0.071847513318062f, 0.005244242958724f, 0.072227008640766f,
+  0.005299786105752f, 0.072606459259987f, 0.005355620291084f, 0.072985872626305f,
+  0.005411745049059f, 0.073365233838558f, 0.005468160845339f, 0.073744557797909f,
+  0.005524867679924f, 0.074123837053776f, 0.005581865552813f, 0.074503071606159f,
+  0.005639153998345f, 0.074882268905640f, 0.005696733482182f, 0.075261414051056f,
+  0.005754603538662f, 0.075640521943569f, 0.005812764633447f, 0.076019577682018f,
+  0.005871216300875f, 0.076398596167564f, 0.005929958540946f, 0.076777562499046f,
+  0.005988991353661f, 0.077156484127045f, 0.006048315204680f, 0.077535368502140f,
+  0.006107929162681f, 0.077914200723171f, 0.006167833693326f, 0.078292988240719f,
+  0.006228029262275f, 0.078671731054783f, 0.006288514938205f, 0.079050421714783f,
+  0.006349290721118f, 0.079429075121880f, 0.006410357542336f, 0.079807676374912f,
+  0.006471714470536f, 0.080186225473881f, 0.006533361505717f, 0.080564737319946f,
+  0.006595299113542f, 0.080943197011948f, 0.006657526828349f, 0.081321612000465f,
+  0.006720044650137f, 0.081699974834919f, 0.006782853044569f, 0.082078292965889f,
+  0.006845951545984f, 0.082456558942795f, 0.006909339688718f, 0.082834780216217f,
+  0.006973018404096f, 0.083212949335575f, 0.007036986760795f, 0.083591073751450f,
+  0.007101245224476f, 0.083969146013260f, 0.007165793795139f, 0.084347173571587f,
+  0.007230632472783f, 0.084725148975849f, 0.007295760791749f, 0.085103072226048f,
+  0.007361178752035f, 0.085480943322182f, 0.007426886819303f, 0.085858769714832f,
+  0.007492884527892f, 0.086236543953419f, 0.007559171877801f, 0.086614266037941f,
+  0.007625748869032f, 0.086991935968399f, 0.007692615967244f, 0.087369553744793f,
+  0.007759772241116f, 0.087747126817703f, 0.007827218621969f, 0.088124647736549f,
+  0.007894953712821f, 0.088502109050751f, 0.007962978444993f, 0.088879525661469f,
+  0.008031292818487f, 0.089256882667542f, 0.008099896833301f, 0.089634194970131f,
+  0.008168790489435f, 0.090011447668076f, 0.008237972855568f, 0.090388655662537f,
+  0.008307444863021f, 0.090765804052353f, 0.008377205580473f, 0.091142900288105f,
+  0.008447255939245f, 0.091519944369793f, 0.008517595939338f, 0.091896936297417f,
+  0.008588224649429f, 0.092273868620396f, 0.008659142069519f, 0.092650748789310f,
+  0.008730349130929f, 0.093027576804161f, 0.008801844902337f, 0.093404345214367f,
+  0.008873629383743f, 0.093781061470509f, 0.008945702575147f, 0.094157725572586f,
+  0.009018065407872f, 0.094534330070019f, 0.009090716950595f, 0.094910882413387f,
+  0.009163657203317f, 0.095287375152111f, 0.009236886166036f, 0.095663815736771f,
+  0.009310402907431f, 0.096040196716785f, 0.009384209290147f, 0.096416525542736f,
+  0.009458304382861f, 0.096792794764042f, 0.009532688185573f, 0.097169004380703f,
+  0.009607359766960f, 0.097545161843300f, 0.009682320058346f, 0.097921259701252f,
+  0.009757569059730f, 0.098297297954559f, 0.009833106771111f, 0.098673284053802f,
+  0.009908932261169f, 0.099049203097820f, 0.009985045529902f, 0.099425069987774f,
+  0.010061448439956f, 0.099800877273083f, 0.010138138197362f, 0.100176624953747f,
+  0.010215117596090f, 0.100552320480347f, 0.010292383842170f, 0.100927948951721f,
+  0.010369938798249f, 0.101303517818451f, 0.010447781533003f, 0.101679034531116f,
+  0.010525912046432f, 0.102054484188557f, 0.010604331269860f, 0.102429874241352f,
+  0.010683037340641f, 0.102805204689503f, 0.010762032121420f, 0.103180475533009f,
+  0.010841314680874f, 0.103555686771870f, 0.010920885019004f, 0.103930838406086f,
+  0.011000742204487f, 0.104305922985077f, 0.011080888099968f, 0.104680955410004f,
+  0.011161320842803f, 0.105055920779705f, 0.011242041364312f, 0.105430819094181f,
+  0.011323049664497f, 0.105805665254593f, 0.011404345743358f, 0.106180444359779f,
+  0.011485928669572f, 0.106555156409740f, 0.011567799374461f, 0.106929816305637f,
+  0.011649956926703f, 0.107304409146309f, 0.011732402257621f, 0.107678934931755f,
+  0.011815134435892f, 0.108053401112556f, 0.011898153461516f, 0.108427800238132f,
+  0.011981460265815f, 0.108802139759064f, 0.012065053917468f, 0.109176412224770f,
+  0.012148935347795f, 0.109550617635250f, 0.012233102694154f, 0.109924763441086f,
+  0.012317557819188f, 0.110298842191696f, 0.012402298860252f, 0.110672861337662f,
+  0.012487327679992f, 0.111046813428402f, 0.012572642415762f, 0.111420698463917f,
+  0.012658244930208f, 0.111794516444206f, 0.012744133360684f, 0.112168267369270f,
+  0.012830308638513f, 0.112541958689690f, 0.012916770763695f, 0.112915575504303f,
+  0.013003518804908f, 0.113289132714272f, 0.013090553693473f, 0.113662622869015f,
+  0.013177875429392f, 0.114036038517952f, 0.013265483081341f, 0.114409394562244f,
+  0.013353376649320f, 0.114782683551311f, 0.013441557064652f, 0.115155905485153f,
+  0.013530024327338f, 0.115529052913189f, 0.013618776574731f, 0.115902140736580f,
+  0.013707815669477f, 0.116275154054165f, 0.013797140680254f, 0.116648100316525f,
+  0.013886751607060f, 0.117020979523659f, 0.013976648449898f, 0.117393791675568f,
+  0.014066831208766f, 0.117766529321671f, 0.014157299883664f, 0.118139199912548f,
+  0.014248054474592f, 0.118511803448200f, 0.014339094981551f, 0.118884332478046f,
+  0.014430420473218f, 0.119256794452667f, 0.014522032812238f, 0.119629189372063f,
+  0.014613929204643f, 0.120001509785652f, 0.014706112444401f, 0.120373763144016f,
+  0.014798580668867f, 0.120745941996574f, 0.014891333878040f, 0.121118053793907f,
+  0.014984373003244f, 0.121490091085434f, 0.015077698044479f, 0.121862053871155f,
+  0.015171307139099f, 0.122233949601650f, 0.015265202149749f, 0.122605770826340f,
+  0.015359382145107f, 0.122977524995804f, 0.015453847125173f, 0.123349204659462f,
+  0.015548598021269f, 0.123720809817314f, 0.015643632039428f, 0.124092340469360f,
+  0.015738952904940f, 0.124463804066181f, 0.015834558755159f, 0.124835193157196f,
+  0.015930447727442f, 0.125206500291824f, 0.016026621684432f, 0.125577747821808f,
+  0.016123080626130f, 0.125948905944824f, 0.016219824552536f, 0.126320004463196f,
+  0.016316853463650f, 0.126691013574600f, 0.016414167359471f, 0.127061963081360f,
+  0.016511764377356f, 0.127432823181152f, 0.016609646379948f, 0.127803623676300f,
+  0.016707813367248f, 0.128174334764481f, 0.016806263476610f, 0.128544986248016f,
+  0.016904998570681f, 0.128915548324585f, 0.017004016786814f, 0.129286035895348f,
+  0.017103319987655f, 0.129656463861465f, 0.017202908173203f, 0.130026802420616f,
+  0.017302779480815f, 0.130397051572800f, 0.017402933910489f, 0.130767241120338f,
+  0.017503373324871f, 0.131137356162071f, 0.017604095861316f, 0.131507381796837f,
+  0.017705103382468f, 0.131877332925797f, 0.017806394025683f, 0.132247209548950f,
+  0.017907967790961f, 0.132617011666298f, 0.018009826540947f, 0.132986739277840f,
+  0.018111966550350f, 0.133356377482414f, 0.018214391544461f, 0.133725941181183f,
+  0.018317099660635f, 0.134095430374146f, 0.018420090898871f, 0.134464830160141f,
+  0.018523367121816f, 0.134834155440331f, 0.018626924604177f, 0.135203406214714f,
+  0.018730765208602f, 0.135572582483292f, 0.018834890797734f, 0.135941669344902f,
+  0.018939297646284f, 0.136310681700706f, 0.019043987616897f, 0.136679604649544f,
+  0.019148962572217f, 0.137048453092575f, 0.019254218786955f, 0.137417227029800f,
+  0.019359756261110f, 0.137785911560059f, 0.019465578719974f, 0.138154521584511f,
+  0.019571684300900f, 0.138523042201996f, 0.019678071141243f, 0.138891488313675f,
+  0.019784741103649f, 0.139259845018387f, 0.019891692325473f, 0.139628127217293f,
+  0.019998926669359f, 0.139996320009232f, 0.020106444135308f, 0.140364438295364f,
+  0.020214242860675f, 0.140732467174530f, 0.020322324708104f, 0.141100421547890f,
+  0.020430689677596f, 0.141468286514282f, 0.020539334043860f, 0.141836062073708f,
+  0.020648263394833f, 0.142203763127327f, 0.020757472142577f, 0.142571389675140f,
+  0.020866964012384f, 0.142938911914825f, 0.020976737141609f, 0.143306359648705f,
+  0.021086793392897f, 0.143673732876778f, 0.021197130903602f, 0.144041016697884f,
+  0.021307749673724f, 0.144408211112022f, 0.021418649703264f, 0.144775316119194f,
+  0.021529832854867f, 0.145142331719399f, 0.021641295403242f, 0.145509272813797f,
+  0.021753041073680f, 0.145876124501228f, 0.021865066140890f, 0.146242901682854f,
+  0.021977374330163f, 0.146609574556351f, 0.022089963778853f, 0.146976172924042f,
+  0.022202832624316f, 0.147342681884766f, 0.022315984591842f, 0.147709101438522f,
+  0.022429415956140f, 0.148075446486473f, 0.022543128579855f, 0.148441687226295f,
+  0.022657122462988f, 0.148807853460312f, 0.022771397605538f, 0.149173930287361f,
+  0.022885952144861f, 0.149539917707443f, 0.023000787943602f, 0.149905815720558f,
+  0.023115905001760f, 0.150271624326706f, 0.023231301456690f, 0.150637343525887f,
+  0.023346979171038f, 0.151002973318100f, 0.023462938144803f, 0.151368513703346f,
+  0.023579176515341f, 0.151733979582787f, 0.023695694282651f, 0.152099341154099f,
+  0.023812493309379f, 0.152464613318443f, 0.023929571732879f, 0.152829796075821f,
+  0.024046931415796f, 0.153194904327393f, 0.024164570495486f, 0.153559908270836f,
+  0.024282488971949f, 0.153924822807312f, 0.024400688707829f, 0.154289647936821f,
+  0.024519165977836f, 0.154654383659363f, 0.024637924507260f, 0.155019029974937f,
+  0.024756962433457f, 0.155383571982384f, 0.024876279756427f, 0.155748039484024f,
+  0.024995878338814f, 0.156112402677536f, 0.025115754455328f, 0.156476691365242f,
+  0.025235909968615f, 0.156840875744820f, 0.025356344878674f, 0.157204970717430f,
+  0.025477059185505f, 0.157568961381912f, 0.025598052889109f, 0.157932877540588f,
+  0.025719324126840f, 0.158296689391136f, 0.025840876623988f, 0.158660411834717f,
+  0.025962706655264f, 0.159024044871330f, 0.026084816083312f, 0.159387573599815f,
+  0.026207204908133f, 0.159751012921333f, 0.026329871267080f, 0.160114362835884f,
+  0.026452817022800f, 0.160477623343468f, 0.026576040312648f, 0.160840779542923f,
+  0.026699542999268f, 0.161203846335411f, 0.026823325082660f, 0.161566808819771f,
+  0.026947384700179f, 0.161929681897163f, 0.027071721851826f, 0.162292465567589f,
+  0.027196336537600f, 0.162655144929886f, 0.027321230620146f, 0.163017734885216f,
+  0.027446404099464f, 0.163380220532417f, 0.027571853250265f, 0.163742616772652f,
+  0.027697581797838f, 0.164104923605919f, 0.027823587879539f, 0.164467126131058f,
+  0.027949871495366f, 0.164829224348068f, 0.028076432645321f, 0.165191248059273f,
+  0.028203271329403f, 0.165553152561188f, 0.028330387547612f, 0.165914967656136f,
+  0.028457781299949f, 0.166276678442955f, 0.028585452586412f, 0.166638299822807f,
+  0.028713401407003f, 0.166999831795692f, 0.028841627761722f, 0.167361244559288f,
+  0.028970129787922f, 0.167722567915916f, 0.029098909348249f, 0.168083801865578f,
+  0.029227968305349f, 0.168444931507111f, 0.029357301071286f, 0.168805956840515f,
+  0.029486913233995f, 0.169166877865791f, 0.029616801068187f, 0.169527709484100f,
+  0.029746964573860f, 0.169888436794281f, 0.029877405613661f, 0.170249074697495f,
+  0.030008124187589f, 0.170609608292580f, 0.030139118432999f, 0.170970037579536f,
+  0.030270388349891f, 0.171330362558365f, 0.030401935800910f, 0.171690583229065f,
+  0.030533758923411f, 0.172050714492798f, 0.030665857717395f, 0.172410741448402f,
+  0.030798232182860f, 0.172770664095879f, 0.030930884182453f, 0.173130482435226f,
+  0.031063811853528f, 0.173490211367607f, 0.031197015196085f, 0.173849821090698f,
+  0.031330492347479f, 0.174209341406822f, 0.031464248895645f, 0.174568757414818f,
+  0.031598277390003f, 0.174928069114685f, 0.031732585281134f, 0.175287276506424f,
+  0.031867165118456f, 0.175646379590034f, 0.032002024352551f, 0.176005378365517f,
+  0.032137155532837f, 0.176364272832870f, 0.032272562384605f, 0.176723077893257f,
+  0.032408244907856f, 0.177081763744354f, 0.032544203102589f, 0.177440345287323f,
+  0.032680433243513f, 0.177798837423325f, 0.032816942781210f, 0.178157210350037f,
+  0.032953724265099f, 0.178515478968620f, 0.033090781420469f, 0.178873643279076f,
+  0.033228114247322f, 0.179231703281403f, 0.033365719020367f, 0.179589673876762f,
+  0.033503599464893f, 0.179947525262833f, 0.033641755580902f, 0.180305257439613f,
+  0.033780183643103f, 0.180662900209427f, 0.033918887376785f, 0.181020438671112f,
+  0.034057866781950f, 0.181377857923508f, 0.034197118133307f, 0.181735187768936f,
+  0.034336645156145f, 0.182092398405075f, 0.034476444125175f, 0.182449504733086f,
+  0.034616518765688f, 0.182806491851807f, 0.034756865352392f, 0.183163389563560f,
+  0.034897487610579f, 0.183520168066025f, 0.035038381814957f, 0.183876842260361f,
+  0.035179551690817f, 0.184233412146568f, 0.035320993512869f, 0.184589877724648f,
+  0.035462711006403f, 0.184946224093437f, 0.035604696720839f, 0.185302466154099f,
+  0.035746958106756f, 0.185658603906631f, 0.035889495164156f, 0.186014622449875f,
+  0.036032304167747f, 0.186370536684990f, 0.036175385117531f, 0.186726331710815f,
+  0.036318738013506f, 0.187082037329674f, 0.036462362855673f, 0.187437608838081f,
+  0.036606263369322f, 0.187793090939522f, 0.036750435829163f, 0.188148453831673f,
+  0.036894880235195f, 0.188503712415695f, 0.037039596587420f, 0.188858851790428f,
+  0.037184584885836f, 0.189213871955872f, 0.037329845130444f, 0.189568802714348f,
+  0.037475381046534f, 0.189923599362373f, 0.037621185183525f, 0.190278306603432f,
+  0.037767261266708f, 0.190632879734039f, 0.037913613021374f, 0.190987363457680f,
+  0.038060232996941f, 0.191341713070869f, 0.038207128643990f, 0.191695958375931f,
+  0.038354292511940f, 0.192050099372864f, 0.038501728326082f, 0.192404121160507f,
+  0.038649436086416f, 0.192758023738861f, 0.038797415792942f, 0.193111822009087f,
+  0.038945667445660f, 0.193465501070023f, 0.039094187319279f, 0.193819075822830f,
+  0.039242979139090f, 0.194172516465187f, 0.039392042905092f, 0.194525867700577f,
+  0.039541378617287f, 0.194879084825516f, 0.039690986275673f, 0.195232197642326f,
+  0.039840862154961f, 0.195585191249847f, 0.039991009980440f, 0.195938065648079f,
+  0.040141426026821f, 0.196290835738182f, 0.040292114019394f, 0.196643486618996f,
+  0.040443073958158f, 0.196996018290520f, 0.040594302117825f, 0.197348430752754f,
+  0.040745802223682f, 0.197700738906860f, 0.040897574275732f, 0.198052927851677f,
+  0.041049610823393f, 0.198404997587204f, 0.041201923042536f, 0.198756948113441f,
+  0.041354499757290f, 0.199108779430389f, 0.041507352143526f, 0.199460506439209f,
+  0.041660469025373f, 0.199812099337578f, 0.041813857853413f, 0.200163587927818f,
+  0.041967518627644f, 0.200514942407608f, 0.042121443897486f, 0.200866192579269f,
+  0.042275641113520f, 0.201217323541641f, 0.042430106550455f, 0.201568335294724f,
+  0.042584843933582f, 0.201919227838516f, 0.042739849537611f, 0.202270001173019f,
+  0.042895123362541f, 0.202620655298233f, 0.043050665408373f, 0.202971190214157f,
+  0.043206475675106f, 0.203321605920792f, 0.043362557888031f, 0.203671902418137f,
+  0.043518904596567f, 0.204022079706192f, 0.043675523251295f, 0.204372137784958f,
+  0.043832406401634f, 0.204722076654434f, 0.043989561498165f, 0.205071896314621f,
+  0.044146984815598f, 0.205421581864357f, 0.044304672628641f, 0.205771163105965f,
+  0.044462632387877f, 0.206120610237122f, 0.044620860368013f, 0.206469938158989f,
+  0.044779352843761f, 0.206819161772728f, 0.044938117265701f, 0.207168251276016f,
+  0.045097146183252f, 0.207517206668854f, 0.045256443321705f, 0.207866057753563f,
+  0.045416008681059f, 0.208214774727821f, 0.045575842261314f, 0.208563387393951f,
+  0.045735940337181f, 0.208911851048470f, 0.045896306633949f, 0.209260210394859f,
+  0.046056941151619f, 0.209608450531960f, 0.046217843890190f, 0.209956556558609f,
+  0.046379011124372f, 0.210304543375969f, 0.046540446579456f, 0.210652396082878f,
+  0.046702146530151f, 0.211000129580498f, 0.046864114701748f, 0.211347743868828f,
+  0.047026351094246f, 0.211695238947868f, 0.047188851982355f, 0.212042599916458f,
+  0.047351621091366f, 0.212389841675758f, 0.047514654695988f, 0.212736949324608f,
+  0.047677956521511f, 0.213083937764168f, 0.047841522842646f, 0.213430806994438f,
+  0.048005353659391f, 0.213777542114258f, 0.048169452697039f, 0.214124158024788f,
+  0.048333816230297f, 0.214470639824867f, 0.048498444259167f, 0.214817002415657f,
+  0.048663340508938f, 0.215163245797157f, 0.048828501254320f, 0.215509355068207f,
+  0.048993926495314f, 0.215855330228806f, 0.049159619957209f, 0.216201186180115f,
+  0.049325577914715f, 0.216546908020973f, 0.049491796642542f, 0.216892510652542f,
+  0.049658283591270f, 0.217237979173660f, 0.049825038760900f, 0.217583328485489f,
+  0.049992054700851f, 0.217928543686867f, 0.050159335136414f, 0.218273624777794f,
+  0.050326880067587f, 0.218618586659431f, 0.050494693219662f, 0.218963414430618f,
+  0.050662767142057f, 0.219308122992516f, 0.050831105560064f, 0.219652697443962f,
+  0.050999708473682f, 0.219997137784958f, 0.051168579608202f, 0.220341444015503f,
+  0.051337707787752f, 0.220685631036758f, 0.051507104188204f, 0.221029683947563f,
+  0.051676765084267f, 0.221373617649078f, 0.051846686750650f, 0.221717402338982f,
+  0.052016876637936f, 0.222061067819595f, 0.052187327295542f, 0.222404599189758f,
+  0.052358038723469f, 0.222748011350632f, 0.052529018372297f, 0.223091274499893f,
+  0.052700258791447f, 0.223434418439865f, 0.052871759980917f, 0.223777428269386f,
+  0.053043525665998f, 0.224120303988457f, 0.053215555846691f, 0.224463045597076f,
+  0.053387850522995f, 0.224805667996407f, 0.053560405969620f, 0.225148141384125f,
+  0.053733222186565f, 0.225490495562553f, 0.053906302899122f, 0.225832715630531f,
+  0.054079644382000f, 0.226174786686897f, 0.054253250360489f, 0.226516738533974f,
+  0.054427117109299f, 0.226858556270599f, 0.054601248353720f, 0.227200239896774f,
+  0.054775636643171f, 0.227541789412498f, 0.054950293153524f, 0.227883204817772f,
+  0.055125206708908f, 0.228224486112595f, 0.055300384759903f, 0.228565633296967f,
+  0.055475823581219f, 0.228906646370888f, 0.055651523172855f, 0.229247525334358f,
+  0.055827483534813f, 0.229588270187378f, 0.056003704667091f, 0.229928880929947f,
+  0.056180190294981f, 0.230269357562065f, 0.056356932967901f, 0.230609700083733f,
+  0.056533940136433f, 0.230949893593788f, 0.056711208075285f, 0.231289967894554f,
+  0.056888736784458f, 0.231629893183708f, 0.057066522538662f, 0.231969684362412f,
+  0.057244572788477f, 0.232309341430664f, 0.057422880083323f, 0.232648864388466f,
+  0.057601451873779f, 0.232988253235817f, 0.057780280709267f, 0.233327493071556f,
+  0.057959370315075f, 0.233666598796844f, 0.058138720691204f, 0.234005570411682f,
+  0.058318331837654f, 0.234344407916069f, 0.058498200029135f, 0.234683111310005f,
+  0.058678328990936f, 0.235021665692329f, 0.058858718723059f, 0.235360085964203f,
+  0.059039369225502f, 0.235698372125626f, 0.059220276772976f, 0.236036509275436f,
+  0.059401445090771f, 0.236374512314796f, 0.059582870453596f, 0.236712381243706f,
+  0.059764556586742f, 0.237050101161003f, 0.059946499764919f, 0.237387686967850f,
+  0.060128703713417f, 0.237725138664246f, 0.060311164706945f, 0.238062441349030f,
+  0.060493886470795f, 0.238399609923363f, 0.060676865279675f, 0.238736644387245f,
+  0.060860104858875f, 0.239073529839516f, 0.061043601483107f, 0.239410281181335f,
+  0.061227355152369f, 0.239746883511543f, 0.061411365866661f, 0.240083336830139f,
+  0.061595637351274f, 0.240419670939446f, 0.061780165880919f, 0.240755841135979f,
+  0.061964951455593f, 0.241091892123222f, 0.062149997800589f, 0.241427779197693f,
+  0.062335297465324f, 0.241763532161713f, 0.062520854175091f, 0.242099151015282f,
+  0.062706671655178f, 0.242434620857239f, 0.062892749905586f, 0.242769956588745f,
+  0.063079081475735f, 0.243105143308640f, 0.063265666365623f, 0.243440181016922f,
+  0.063452512025833f, 0.243775084614754f, 0.063639611005783f, 0.244109839200974f,
+  0.063826970756054f, 0.244444444775581f, 0.064014583826065f, 0.244778916239738f,
+  0.064202457666397f, 0.245113238692284f, 0.064390584826469f, 0.245447427034378f,
+  0.064578965306282f, 0.245781451463699f, 0.064767606556416f, 0.246115356683731f,
+  0.064956501126289f, 0.246449097990990f, 0.065145656466484f, 0.246782705187798f,
+  0.065335065126419f, 0.247116148471832f, 0.065524727106094f, 0.247449472546577f,
+  0.065714649856091f, 0.247782632708550f, 0.065904818475246f, 0.248115643858910f,
+  0.066095255315304f, 0.248448520898819f, 0.066285938024521f, 0.248781248927116f,
+  0.066476874053478f, 0.249113827943802f, 0.066668070852757f, 0.249446272850037f,
+  0.066859520971775f, 0.249778553843498f, 0.067051224410534f, 0.250110685825348f,
+  0.067243188619614f, 0.250442683696747f, 0.067435398697853f, 0.250774532556534f,
+  0.067627869546413f, 0.251106232404709f, 0.067820593714714f, 0.251437783241272f,
+  0.068013571202755f, 0.251769185066223f, 0.068206802010536f, 0.252100437879562f,
+  0.068400286138058f, 0.252431541681290f, 0.068594031035900f, 0.252762526273727f,
+  0.068788021802902f, 0.253093332052231f, 0.068982265889645f, 0.253423988819122f,
+  0.069176770746708f, 0.253754496574402f, 0.069371521472931f, 0.254084855318069f,
+  0.069566532969475f, 0.254415065050125f, 0.069761790335178f, 0.254745125770569f,
+  0.069957308471203f, 0.255075037479401f, 0.070153072476387f, 0.255404800176620f,
+  0.070349089801311f, 0.255734413862228f, 0.070545360445976f, 0.256063878536224f,
+  0.070741884410381f, 0.256393194198608f, 0.070938661694527f, 0.256722360849380f,
+  0.071135692298412f, 0.257051378488541f, 0.071332976222038f, 0.257380217313766f,
+  0.071530513465405f, 0.257708936929703f, 0.071728296577930f, 0.258037507534027f,
+  0.071926333010197f, 0.258365899324417f, 0.072124622762203f, 0.258694142103195f,
+  0.072323165833950f, 0.259022265672684f, 0.072521962225437f, 0.259350210428238f,
+  0.072721004486084f, 0.259678006172180f, 0.072920300066471f, 0.260005623102188f,
+  0.073119848966599f, 0.260333120822906f, 0.073319651186466f, 0.260660469532013f,
+  0.073519699275494f, 0.260987639427185f, 0.073720000684261f, 0.261314690113068f,
+  0.073920547962189f, 0.261641561985016f, 0.074121348559856f, 0.261968284845352f,
+  0.074322402477264f, 0.262294828891754f, 0.074523709714413f, 0.262621253728867f,
+  0.074725262820721f, 0.262947499752045f, 0.074927061796188f, 0.263273626565933f,
+  0.075129114091396f, 0.263599574565887f, 0.075331419706345f, 0.263925373554230f,
+  0.075533971190453f, 0.264250993728638f, 0.075736775994301f, 0.264576494693756f,
+  0.075939826667309f, 0.264901816844940f, 0.076143130660057f, 0.265226989984512f,
+  0.076346680521965f, 0.265552014112473f, 0.076550483703613f, 0.265876859426498f,
+  0.076754532754421f, 0.266201555728912f, 0.076958827674389f, 0.266526103019714f,
+  0.077163375914097f, 0.266850501298904f, 0.077368170022964f, 0.267174720764160f,
+  0.077573217451572f, 0.267498821020126f, 0.077778510749340f, 0.267822742462158f,
+  0.077984049916267f, 0.268146485090256f, 0.078189842402935f, 0.268470078706741f,
+  0.078395880758762f, 0.268793523311615f, 0.078602164983749f, 0.269116818904877f,
+  0.078808702528477f, 0.269439965486526f, 0.079015478491783f, 0.269762933254242f,
+  0.079222507774830f, 0.270085722208023f, 0.079429790377617f, 0.270408391952515f,
+  0.079637311398983f, 0.270730882883072f, 0.079845085740089f, 0.271053224802017f,
+  0.080053105950356f, 0.271375387907028f, 0.080261372029781f, 0.271697402000427f,
+  0.080469883978367f, 0.272019267082214f, 0.080678641796112f, 0.272340953350067f,
+  0.080887645483017f, 0.272662490606308f, 0.081096902489662f, 0.272983878850937f,
+  0.081306397914886f, 0.273305088281631f, 0.081516146659851f, 0.273626148700714f,
+  0.081726133823395f, 0.273947030305862f, 0.081936374306679f, 0.274267762899399f,
+  0.082146860659122f, 0.274588316679001f, 0.082357585430145f, 0.274908751249313f,
+  0.082568563520908f, 0.275228977203369f, 0.082779780030251f, 0.275549083948135f,
+  0.082991249859333f, 0.275868982076645f, 0.083202958106995f, 0.276188760995865f,
+  0.083414919674397f, 0.276508361101151f, 0.083627119660378f, 0.276827782392502f,
+  0.083839565515518f, 0.277147054672241f, 0.084052257239819f, 0.277466177940369f,
+  0.084265194833279f, 0.277785122394562f, 0.084478378295898f, 0.278103888034821f,
+  0.084691800177097f, 0.278422504663467f, 0.084905467927456f, 0.278740972280502f,
+  0.085119381546974f, 0.279059261083603f, 0.085333541035652f, 0.279377400875092f,
+  0.085547938942909f, 0.279695361852646f, 0.085762590169907f, 0.280013144016266f,
+  0.085977479815483f, 0.280330777168274f, 0.086192607879639f, 0.280648261308670f,
+  0.086407989263535f, 0.280965566635132f, 0.086623609066010f, 0.281282693147659f,
+  0.086839467287064f, 0.281599670648575f, 0.087055571377277f, 0.281916469335556f,
+  0.087271921336651f, 0.282233119010925f, 0.087488517165184f, 0.282549589872360f,
+  0.087705351412296f, 0.282865911722183f, 0.087922424077988f, 0.283182054758072f,
+  0.088139742612839f, 0.283498018980026f, 0.088357307016850f, 0.283813834190369f,
+  0.088575109839439f, 0.284129470586777f, 0.088793158531189f, 0.284444957971573f,
+  0.089011445641518f, 0.284760266542435f, 0.089229971170425f, 0.285075396299362f,
+  0.089448742568493f, 0.285390377044678f, 0.089667752385139f, 0.285705178976059f,
+  0.089887008070946f, 0.286019802093506f, 0.090106502175331f, 0.286334276199341f,
+  0.090326242148876f, 0.286648571491241f, 0.090546220541000f, 0.286962717771530f,
+  0.090766437351704f, 0.287276685237885f, 0.090986892580986f, 0.287590473890305f,
+  0.091207593679428f, 0.287904083728790f, 0.091428533196449f, 0.288217544555664f,
+  0.091649711132050f, 0.288530826568604f, 0.091871134936810f, 0.288843959569931f,
+  0.092092797160149f, 0.289156883955002f, 0.092314697802067f, 0.289469659328461f,
+  0.092536836862564f, 0.289782285690308f, 0.092759214341640f, 0.290094703435898f,
+  0.092981837689877f, 0.290406972169876f, 0.093204692006111f, 0.290719062089920f,
+  0.093427792191505f, 0.291031002998352f, 0.093651130795479f, 0.291342735290527f,
+  0.093874707818031f, 0.291654318571091f, 0.094098523259163f, 0.291965723037720f,
+  0.094322577118874f, 0.292276978492737f, 0.094546869397163f, 0.292588025331497f,
+  0.094771400094032f, 0.292898923158646f, 0.094996169209480f, 0.293209642171860f,
+  0.095221176743507f, 0.293520182371140f, 0.095446422696114f, 0.293830573558807f,
+  0.095671907067299f, 0.294140785932541f, 0.095897629857063f, 0.294450789690018f,
+  0.096123591065407f, 0.294760644435883f, 0.096349790692329f, 0.295070350170136f,
+  0.096576221287251f, 0.295379847288132f, 0.096802897751331f, 0.295689195394516f,
+  0.097029805183411f, 0.295998334884644f, 0.097256951034069f, 0.296307325363159f,
+  0.097484335303307f, 0.296616137027740f, 0.097711957991123f, 0.296924799680710f,
+  0.097939811646938f, 0.297233253717422f, 0.098167903721333f, 0.297541528940201f,
+  0.098396234214306f, 0.297849655151367f, 0.098624803125858f, 0.298157602548599f,
+  0.098853603005409f, 0.298465341329575f, 0.099082641303539f, 0.298772931098938f,
+  0.099311910569668f, 0.299080342054367f, 0.099541425704956f, 0.299387603998184f,
+  0.099771171808243f, 0.299694657325745f, 0.100001148879528f, 0.300001531839371f,
+  0.100231364369392f, 0.300308227539063f, 0.100461818277836f, 0.300614774227142f,
+  0.100692503154278f, 0.300921112298965f, 0.100923426449299f, 0.301227301359177f,
+  0.101154580712318f, 0.301533311605453f, 0.101385973393917f, 0.301839113235474f,
+  0.101617597043514f, 0.302144765853882f, 0.101849451661110f, 0.302450239658356f,
+  0.102081544697285f, 0.302755534648895f, 0.102313876152039f, 0.303060621023178f,
+  0.102546438574791f, 0.303365558385849f, 0.102779231965542f, 0.303670316934586f,
+  0.103012263774872f, 0.303974896669388f, 0.103245526552200f, 0.304279297590256f,
+  0.103479020297527f, 0.304583519697189f, 0.103712752461433f, 0.304887533187866f,
+  0.103946708142757f, 0.305191397666931f, 0.104180909693241f, 0.305495083332062f,
+  0.104415334761143f, 0.305798590183258f, 0.104649998247623f, 0.306101888418198f,
+  0.104884892702103f, 0.306405037641525f, 0.105120018124580f, 0.306708008050919f,
+  0.105355374515057f, 0.307010769844055f, 0.105590961873531f, 0.307313382625580f,
+  0.105826787650585f, 0.307615786790848f, 0.106062836945057f, 0.307918041944504f,
+  0.106299124658108f, 0.308220088481903f, 0.106535643339157f, 0.308521956205368f,
+  0.106772392988205f, 0.308823645114899f, 0.107009373605251f, 0.309125155210495f,
+  0.107246585190296f, 0.309426486492157f, 0.107484027743340f, 0.309727638959885f,
+  0.107721701264381f, 0.310028612613678f, 0.107959605753422f, 0.310329377651215f,
+  0.108197741210461f, 0.310629993677139f, 0.108436107635498f, 0.310930401086807f,
+  0.108674705028534f, 0.311230629682541f, 0.108913525938988f, 0.311530679464340f,
+  0.109152585268021f, 0.311830550432205f, 0.109391868114471f, 0.312130242586136f,
+  0.109631389379501f, 0.312429755926132f, 0.109871134161949f, 0.312729060649872f,
+  0.110111102461815f, 0.313028186559677f, 0.110351309180260f, 0.313327133655548f,
+  0.110591746866703f, 0.313625901937485f, 0.110832408070564f, 0.313924491405487f,
+  0.111073300242424f, 0.314222872257233f, 0.111314415931702f, 0.314521104097366f,
+  0.111555770039558f, 0.314819127321243f, 0.111797347664833f, 0.315116971731186f,
+  0.112039148807526f, 0.315414607524872f, 0.112281180918217f, 0.315712094306946f,
+  0.112523443996906f, 0.316009372472763f, 0.112765938043594f, 0.316306471824646f,
+  0.113008655607700f, 0.316603392362595f, 0.113251596689224f, 0.316900104284287f,
+  0.113494776189327f, 0.317196637392044f, 0.113738171756268f, 0.317492991685867f,
+  0.113981798291206f, 0.317789167165756f, 0.114225655794144f, 0.318085134029388f,
+  0.114469736814499f, 0.318380922079086f, 0.114714048802853f, 0.318676531314850f,
+  0.114958584308624f, 0.318971961736679f, 0.115203343331814f, 0.319267183542252f,
+  0.115448333323002f, 0.319562226533890f, 0.115693546831608f, 0.319857090711594f,
+  0.115938983857632f, 0.320151746273041f, 0.116184651851654f, 0.320446223020554f,
+  0.116430543363094f, 0.320740520954132f, 0.116676658391953f, 0.321034610271454f,
+  0.116923004388809f, 0.321328520774841f, 0.117169573903084f, 0.321622252464294f,
+  0.117416366934776f, 0.321915775537491f, 0.117663383483887f, 0.322209119796753f,
+  0.117910631000996f, 0.322502255439758f, 0.118158094584942f, 0.322795242071152f,
+  0.118405789136887f, 0.323088020086288f, 0.118653707206249f, 0.323380589485168f,
+  0.118901848793030f, 0.323672980070114f, 0.119150213897228f, 0.323965191841125f,
+  0.119398809969425f, 0.324257194995880f, 0.119647622108459f, 0.324549019336700f,
+  0.119896657764912f, 0.324840664863586f, 0.120145916938782f, 0.325132101774216f,
+  0.120395407080650f, 0.325423330068588f, 0.120645113289356f, 0.325714409351349f,
+  0.120895043015480f, 0.326005280017853f, 0.121145196259022f, 0.326295942068100f,
+  0.121395580470562f, 0.326586425304413f, 0.121646173298359f, 0.326876699924469f,
+  0.121896997094154f, 0.327166795730591f, 0.122148044407368f, 0.327456712722778f,
+  0.122399315237999f, 0.327746421098709f, 0.122650802135468f, 0.328035950660706f,
+  0.122902512550354f, 0.328325271606445f, 0.123154446482658f, 0.328614413738251f,
+  0.123406603932381f, 0.328903347253799f, 0.123658977448940f, 0.329192101955414f,
+  0.123911574482918f, 0.329480648040771f, 0.124164395034313f, 0.329769015312195f,
+  0.124417431652546f, 0.330057173967361f, 0.124670691788197f, 0.330345153808594f,
+  0.124924175441265f, 0.330632925033569f, 0.125177875161171f, 0.330920487642288f,
+  0.125431805849075f, 0.331207901239395f, 0.125685945153236f, 0.331495076417923f,
+  0.125940307974815f, 0.331782072782516f, 0.126194894313812f, 0.332068890333176f,
+  0.126449704170227f, 0.332355499267578f, 0.126704722642899f, 0.332641899585724f,
+  0.126959964632988f, 0.332928121089935f, 0.127215430140495f, 0.333214133977890f,
+  0.127471104264259f, 0.333499968051910f, 0.127727001905441f, 0.333785593509674f,
+  0.127983123064041f, 0.334071010351181f, 0.128239467740059f, 0.334356248378754f,
+  0.128496021032333f, 0.334641307592392f, 0.128752797842026f, 0.334926128387451f,
+  0.129009798169136f, 0.335210770368576f, 0.129267007112503f, 0.335495233535767f,
+  0.129524439573288f, 0.335779488086700f, 0.129782080650330f, 0.336063534021378f,
+  0.130039945244789f, 0.336347371339798f, 0.130298033356667f, 0.336631029844284f,
+  0.130556344985962f, 0.336914509534836f, 0.130814850330353f, 0.337197750806808f,
+  0.131073594093323f, 0.337480813264847f, 0.131332546472549f, 0.337763696908951f,
+  0.131591722369194f, 0.338046342134476f, 0.131851106882095f, 0.338328808546066f,
+  0.132110700011253f, 0.338611096143723f, 0.132370531558990f, 0.338893145322800f,
+  0.132630556821823f, 0.339175015687943f, 0.132890805602074f, 0.339456677436829f,
+  0.133151277899742f, 0.339738160371780f, 0.133411958813667f, 0.340019434690475f,
+  0.133672863245010f, 0.340300500392914f, 0.133933976292610f, 0.340581357479095f,
+  0.134195312857628f, 0.340862035751343f, 0.134456858038902f, 0.341142505407333f,
+  0.134718611836433f, 0.341422766447067f, 0.134980589151382f, 0.341702848672867f,
+  0.135242775082588f, 0.341982692480087f, 0.135505184531212f, 0.342262357473373f,
+  0.135767802596092f, 0.342541843652725f, 0.136030644178391f, 0.342821091413498f,
+  0.136293679475784f, 0.343100160360336f, 0.136556953191757f, 0.343379020690918f,
+  0.136820420622826f, 0.343657672405243f, 0.137084111571312f, 0.343936115503311f,
+  0.137348011136055f, 0.344214379787445f, 0.137612134218216f, 0.344492435455322f,
+  0.137876465916634f, 0.344770282506943f, 0.138141006231308f, 0.345047920942307f,
+  0.138405755162239f, 0.345325350761414f, 0.138670727610588f, 0.345602601766586f,
+  0.138935908675194f, 0.345879614353180f, 0.139201298356056f, 0.346156448125839f,
+  0.139466896653175f, 0.346433073282242f, 0.139732718467712f, 0.346709519624710f,
+  0.139998748898506f, 0.346985727548599f, 0.140264987945557f, 0.347261756658554f,
+  0.140531435608864f, 0.347537547349930f, 0.140798106789589f, 0.347813159227371f,
+  0.141064971685410f, 0.348088562488556f, 0.141332060098648f, 0.348363757133484f,
+  0.141599357128143f, 0.348638743162155f, 0.141866862773895f, 0.348913550376892f,
+  0.142134591937065f, 0.349188119173050f, 0.142402514815331f, 0.349462509155273f,
+  0.142670661211014f, 0.349736660718918f, 0.142939001321793f, 0.350010633468628f,
+  0.143207564949989f, 0.350284397602081f, 0.143476337194443f, 0.350557953119278f,
+  0.143745318055153f, 0.350831300020218f, 0.144014507532120f, 0.351104438304901f,
+  0.144283905625343f, 0.351377367973328f, 0.144553512334824f, 0.351650089025497f,
+  0.144823327660561f, 0.351922631263733f, 0.145093351602554f, 0.352194935083389f,
+  0.145363584160805f, 0.352467030286789f, 0.145634025335312f, 0.352738946676254f,
+  0.145904675126076f, 0.353010624647141f, 0.146175548434258f, 0.353282123804092f,
+  0.146446615457535f, 0.353553384542465f, 0.146717891097069f, 0.353824466466904f,
+  0.146989375352860f, 0.354095309972763f, 0.147261068224907f, 0.354365974664688f,
+  0.147532954812050f, 0.354636400938034f, 0.147805064916611f, 0.354906648397446f,
+  0.148077383637428f, 0.355176687240601f, 0.148349896073341f, 0.355446487665176f,
+  0.148622632026672f, 0.355716109275818f, 0.148895561695099f, 0.355985492467880f,
+  0.149168699979782f, 0.356254696846008f, 0.149442046880722f, 0.356523662805557f,
+  0.149715602397919f, 0.356792420148849f, 0.149989366531372f, 0.357060998678207f,
+  0.150263324379921f, 0.357329338788986f, 0.150537505745888f, 0.357597470283508f,
+  0.150811880826950f, 0.357865422964096f, 0.151086464524269f, 0.358133137226105f,
+  0.151361241936684f, 0.358400642871857f, 0.151636242866516f, 0.358667939901352f,
+  0.151911437511444f, 0.358935028314590f, 0.152186840772629f, 0.359201908111572f,
+  0.152462437748909f, 0.359468549489975f, 0.152738258242607f, 0.359735012054443f,
+  0.153014272451401f, 0.360001266002655f, 0.153290495276451f, 0.360267281532288f,
+  0.153566911816597f, 0.360533088445663f, 0.153843536973000f, 0.360798716545105f,
+  0.154120370745659f, 0.361064106225967f, 0.154397398233414f, 0.361329287290573f,
+  0.154674649238586f, 0.361594229936600f, 0.154952079057693f, 0.361858993768692f,
+  0.155229732394218f, 0.362123548984528f, 0.155507579445839f, 0.362387865781784f,
+  0.155785620212555f, 0.362651973962784f, 0.156063869595528f, 0.362915903329849f,
+  0.156342327594757f, 0.363179564476013f, 0.156620979309082f, 0.363443046808243f,
+  0.156899839639664f, 0.363706320524216f, 0.157178908586502f, 0.363969355821610f,
+  0.157458171248436f, 0.364232182502747f, 0.157737627625465f, 0.364494800567627f,
+  0.158017292618752f, 0.364757210016251f, 0.158297166228294f, 0.365019410848618f,
+  0.158577233552933f, 0.365281373262405f, 0.158857494592667f, 0.365543156862259f,
+  0.159137964248657f, 0.365804702043533f, 0.159418627619743f, 0.366066008806229f,
+  0.159699499607086f, 0.366327136754990f, 0.159980565309525f, 0.366588026285172f,
+  0.160261839628220f, 0.366848707199097f, 0.160543307662010f, 0.367109179496765f,
+  0.160824984312058f, 0.367369443178177f, 0.161106839776039f, 0.367629468441010f,
+  0.161388918757439f, 0.367889285087585f, 0.161671176552773f, 0.368148893117905f,
+  0.161953642964363f, 0.368408292531967f, 0.162236317992210f, 0.368667453527451f,
+  0.162519171833992f, 0.368926405906677f, 0.162802234292030f, 0.369185149669647f,
+  0.163085505366325f, 0.369443655014038f, 0.163368955254555f, 0.369701951742172f,
+  0.163652613759041f, 0.369960039854050f, 0.163936465978622f, 0.370217919349670f,
+  0.164220526814461f, 0.370475560426712f, 0.164504766464233f, 0.370732992887497f,
+  0.164789214730263f, 0.370990216732025f, 0.165073871612549f, 0.371247202157974f,
+  0.165358707308769f, 0.371503978967667f, 0.165643751621246f, 0.371760547161102f,
+  0.165928974747658f, 0.372016876935959f, 0.166214406490326f, 0.372272998094559f,
+  0.166500031948090f, 0.372528880834579f, 0.166785866022110f, 0.372784584760666f,
+  0.167071878910065f, 0.373040050268173f, 0.167358100414276f, 0.373295277357101f,
+  0.167644515633583f, 0.373550295829773f, 0.167931124567986f, 0.373805105686188f,
+  0.168217927217484f, 0.374059677124023f, 0.168504923582077f, 0.374314039945602f,
+  0.168792113661766f, 0.374568194150925f, 0.169079497456551f, 0.374822109937668f,
+  0.169367074966431f, 0.375075817108154f, 0.169654861092567f, 0.375329315662384f,
+  0.169942826032639f, 0.375582575798035f, 0.170230999588966f, 0.375835597515106f,
+  0.170519351959229f, 0.376088410615921f, 0.170807912945747f, 0.376341015100479f,
+  0.171096652746201f, 0.376593410968781f, 0.171385586261749f, 0.376845568418503f,
+  0.171674728393555f, 0.377097487449646f, 0.171964049339294f, 0.377349197864532f,
+  0.172253578901291f, 0.377600699663162f, 0.172543287277222f, 0.377851963043213f,
+  0.172833189368248f, 0.378102988004684f, 0.173123285174370f, 0.378353834152222f,
+  0.173413574695587f, 0.378604412078857f, 0.173704057931900f, 0.378854811191559f,
+  0.173994734883308f, 0.379104942083359f, 0.174285605549812f, 0.379354894161224f,
+  0.174576655030251f, 0.379604607820511f, 0.174867913126946f, 0.379854083061218f,
+  0.175159350037575f, 0.380103349685669f, 0.175450980663300f, 0.380352377891541f,
+  0.175742805004120f, 0.380601197481155f, 0.176034808158875f, 0.380849778652191f,
+  0.176327019929886f, 0.381098151206970f, 0.176619410514832f, 0.381346285343170f,
+  0.176911994814873f, 0.381594210863113f, 0.177204772830009f, 0.381841897964478f,
+  0.177497729659081f, 0.382089376449585f, 0.177790880203247f, 0.382336616516113f,
+  0.178084224462509f, 0.382583618164063f, 0.178377762436867f, 0.382830440998077f,
+  0.178671479225159f, 0.383076995611191f, 0.178965389728546f, 0.383323341608047f,
+  0.179259493947029f, 0.383569449186325f, 0.179553776979446f, 0.383815348148346f,
+  0.179848253726959f, 0.384061008691788f, 0.180142924189568f, 0.384306460618973f,
+  0.180437773466110f, 0.384551674127579f, 0.180732816457748f, 0.384796649217606f,
+  0.181028053164482f, 0.385041415691376f, 0.181323468685150f, 0.385285943746567f,
+  0.181619063019753f, 0.385530263185501f, 0.181914865970612f, 0.385774344205856f,
+  0.182210832834244f, 0.386018186807632f, 0.182507008314133f, 0.386261820793152f,
+  0.182803362607956f, 0.386505216360092f, 0.183099895715714f, 0.386748403310776f,
+  0.183396622538567f, 0.386991351842880f, 0.183693528175354f, 0.387234061956406f,
+  0.183990627527237f, 0.387476563453674f, 0.184287920594215f, 0.387718826532364f,
+  0.184585392475128f, 0.387960851192474f, 0.184883043169975f, 0.388202667236328f,
+  0.185180887579918f, 0.388444244861603f, 0.185478910803795f, 0.388685584068298f,
+  0.185777112841606f, 0.388926714658737f, 0.186075508594513f, 0.389167606830597f,
+  0.186374098062515f, 0.389408260583878f, 0.186672851443291f, 0.389648675918579f,
+  0.186971798539162f, 0.389888882637024f, 0.187270939350128f, 0.390128880739212f,
+  0.187570258975029f, 0.390368610620499f, 0.187869757413864f, 0.390608131885529f,
+  0.188169434666634f, 0.390847414731979f, 0.188469305634499f, 0.391086459159851f,
+  0.188769355416298f, 0.391325294971466f, 0.189069598913193f, 0.391563892364502f,
+  0.189370006322861f, 0.391802251338959f, 0.189670607447624f, 0.392040401697159f,
+  0.189971387386322f, 0.392278283834457f, 0.190272361040115f, 0.392515957355499f,
+  0.190573498606682f, 0.392753422260284f, 0.190874829888344f, 0.392990618944168f,
+  0.191176339983940f, 0.393227607011795f, 0.191478043794632f, 0.393464356660843f,
+  0.191779911518097f, 0.393700867891312f, 0.192081972956657f, 0.393937170505524f,
+  0.192384198307991f, 0.394173204898834f, 0.192686617374420f, 0.394409030675888f,
+  0.192989215254784f, 0.394644618034363f, 0.193292006850243f, 0.394879996776581f,
+  0.193594962358475f, 0.395115107297897f, 0.193898096680641f, 0.395350009202957f,
+  0.194201424717903f, 0.395584672689438f, 0.194504916667938f, 0.395819097757339f,
+  0.194808602333069f, 0.396053284406662f, 0.195112451910973f, 0.396287262439728f,
+  0.195416495203972f, 0.396520972251892f, 0.195720717310905f, 0.396754473447800f,
+  0.196025103330612f, 0.396987736225128f, 0.196329683065414f, 0.397220760583878f,
+  0.196634441614151f, 0.397453576326370f, 0.196939364075661f, 0.397686123847961f,
+  0.197244480252266f, 0.397918462753296f, 0.197549775242805f, 0.398150533437729f,
+  0.197855234146118f, 0.398382395505905f, 0.198160871863365f, 0.398614019155502f,
+  0.198466703295708f, 0.398845434188843f, 0.198772698640823f, 0.399076581001282f,
+  0.199078872799873f, 0.399307489395142f, 0.199385225772858f, 0.399538189172745f,
+  0.199691757559776f, 0.399768620729446f, 0.199998468160629f, 0.399998843669891f,
+  0.200305357575417f, 0.400228828191757f, 0.200612410902977f, 0.400458574295044f,
+  0.200919643044472f, 0.400688081979752f, 0.201227053999901f, 0.400917351245880f,
+  0.201534643769264f, 0.401146411895752f, 0.201842412352562f, 0.401375204324722f,
+  0.202150344848633f, 0.401603758335114f, 0.202458456158638f, 0.401832103729248f,
+  0.202766746282578f, 0.402060180902481f, 0.203075215220451f, 0.402288049459457f,
+  0.203383848071098f, 0.402515679597855f, 0.203692659735680f, 0.402743041515350f,
+  0.204001650214195f, 0.402970194816589f, 0.204310819506645f, 0.403197109699249f,
+  0.204620152711868f, 0.403423786163330f, 0.204929664731026f, 0.403650224208832f,
+  0.205239340662956f, 0.403876423835754f, 0.205549195408821f, 0.404102355241776f,
+  0.205859228968620f, 0.404328078031540f, 0.206169426441193f, 0.404553562402725f,
+  0.206479802727699f, 0.404778808355331f, 0.206790357828140f, 0.405003815889359f,
+  0.207101076841354f, 0.405228585004807f, 0.207411959767342f, 0.405453115701675f,
+  0.207723021507263f, 0.405677437782288f, 0.208034262061119f, 0.405901491641998f,
+  0.208345666527748f, 0.406125307083130f, 0.208657249808311f, 0.406348884105682f,
+  0.208969011902809f, 0.406572192907333f, 0.209280923008919f, 0.406795293092728f,
+  0.209593027830124f, 0.407018154859543f, 0.209905281662941f, 0.407240778207779f,
+  0.210217714309692f, 0.407463163137436f, 0.210530325770378f, 0.407685309648514f,
+  0.210843101143837f, 0.407907217741013f, 0.211156040430069f, 0.408128857612610f,
+  0.211469158530235f, 0.408350288867950f, 0.211782455444336f, 0.408571451902390f,
+  0.212095901370049f, 0.408792406320572f, 0.212409526109695f, 0.409013092517853f,
+  0.212723329663277f, 0.409233570098877f, 0.213037282228470f, 0.409453779459000f,
+  0.213351413607597f, 0.409673750400543f, 0.213665723800659f, 0.409893482923508f,
+  0.213980183005333f, 0.410112977027893f, 0.214294821023941f, 0.410332232713699f,
+  0.214609622955322f, 0.410551249980927f, 0.214924603700638f, 0.410770028829575f,
+  0.215239733457565f, 0.410988569259644f, 0.215555042028427f, 0.411206841468811f,
+  0.215870529413223f, 0.411424905061722f, 0.216186165809631f, 0.411642700433731f,
+  0.216501981019974f, 0.411860257387161f, 0.216817945241928f, 0.412077575922012f,
+  0.217134088277817f, 0.412294656038284f, 0.217450410127640f, 0.412511497735977f,
+  0.217766880989075f, 0.412728071212769f, 0.218083515763283f, 0.412944436073303f,
+  0.218400329351425f, 0.413160532712936f, 0.218717306852341f, 0.413376390933990f,
+  0.219034433364868f, 0.413592010736465f, 0.219351738691330f, 0.413807392120361f,
+  0.219669207930565f, 0.414022535085678f, 0.219986841082573f, 0.414237409830093f,
+  0.220304638147354f, 0.414452046155930f, 0.220622614026070f, 0.414666473865509f,
+  0.220940738916397f, 0.414880603551865f, 0.221259027719498f, 0.415094524621964f,
+  0.221577480435371f, 0.415308207273483f, 0.221896097064018f, 0.415521621704102f,
+  0.222214877605438f, 0.415734797716141f, 0.222533836960793f, 0.415947735309601f,
+  0.222852945327759f, 0.416160434484482f, 0.223172217607498f, 0.416372895240784f,
+  0.223491653800011f, 0.416585087776184f, 0.223811239004135f, 0.416797041893005f,
+  0.224131003022194f, 0.417008757591248f, 0.224450930953026f, 0.417220205068588f,
+  0.224771007895470f, 0.417431443929672f, 0.225091263651848f, 0.417642414569855f,
+  0.225411668419838f, 0.417853146791458f, 0.225732237100601f, 0.418063640594482f,
+  0.226052969694138f, 0.418273866176605f, 0.226373866200447f, 0.418483853340149f,
+  0.226694911718369f, 0.418693602085114f, 0.227016136050224f, 0.418903112411499f,
+  0.227337509393692f, 0.419112354516983f, 0.227659046649933f, 0.419321358203888f,
+  0.227980732917786f, 0.419530123472214f, 0.228302597999573f, 0.419738620519638f,
+  0.228624612092972f, 0.419946908950806f, 0.228946775197983f, 0.420154929161072f,
+  0.229269117116928f, 0.420362681150436f, 0.229591608047485f, 0.420570224523544f,
+  0.229914262890816f, 0.420777499675751f, 0.230237081646919f, 0.420984506607056f,
+  0.230560049414635f, 0.421191304922104f, 0.230883181095123f, 0.421397835016251f,
+  0.231206461787224f, 0.421604126691818f, 0.231529906392097f, 0.421810150146484f,
+  0.231853514909744f, 0.422015935182571f, 0.232177272439003f, 0.422221481800079f,
+  0.232501193881035f, 0.422426789999008f, 0.232825264334679f, 0.422631829977036f,
+  0.233149498701096f, 0.422836631536484f, 0.233473882079124f, 0.423041164875031f,
+  0.233798429369926f, 0.423245459794998f, 0.234123140573502f, 0.423449516296387f,
+  0.234448000788689f, 0.423653304576874f, 0.234773010015488f, 0.423856884241104f,
+  0.235098183155060f, 0.424060165882111f, 0.235423520207405f, 0.424263238906860f,
+  0.235749006271362f, 0.424466013908386f, 0.236074641346931f, 0.424668580293655f,
+  0.236400425434113f, 0.424870878458023f, 0.236726388335228f, 0.425072938203812f,
+  0.237052485346794f, 0.425274729728699f, 0.237378746271133f, 0.425476282835007f,
+  0.237705156207085f, 0.425677597522736f, 0.238031730055809f, 0.425878643989563f,
+  0.238358452916145f, 0.426079452037811f, 0.238685324788094f, 0.426279991865158f,
+  0.239012360572815f, 0.426480293273926f, 0.239339530467987f, 0.426680356264114f,
+  0.239666879177094f, 0.426880151033401f, 0.239994361996651f, 0.427079707384110f,
+  0.240322008728981f, 0.427278995513916f, 0.240649804472923f, 0.427478045225143f,
+  0.240977749228477f, 0.427676826715469f, 0.241305842995644f, 0.427875369787216f,
+  0.241634100675583f, 0.428073674440384f, 0.241962507367134f, 0.428271710872650f,
+  0.242291063070297f, 0.428469479084015f, 0.242619767785072f, 0.428667008876801f,
+  0.242948621511459f, 0.428864300251007f, 0.243277639150620f, 0.429061323404312f,
+  0.243606805801392f, 0.429258108139038f, 0.243936106562614f, 0.429454624652863f,
+  0.244265571236610f, 0.429650902748108f, 0.244595184922218f, 0.429846942424774f,
+  0.244924947619438f, 0.430042684078217f, 0.245254859328270f, 0.430238217115402f,
+  0.245584934949875f, 0.430433481931686f, 0.245915144681931f, 0.430628478527069f,
+  0.246245503425598f, 0.430823236703873f, 0.246576011180878f, 0.431017726659775f,
+  0.246906682848930f, 0.431211978197098f, 0.247237488627434f, 0.431405961513519f,
+  0.247568443417549f, 0.431599706411362f, 0.247899547219276f, 0.431793183088303f,
+  0.248230814933777f, 0.431986421346664f, 0.248562216758728f, 0.432179391384125f,
+  0.248893767595291f, 0.432372123003006f, 0.249225467443466f, 0.432564586400986f,
+  0.249557301402092f, 0.432756811380386f, 0.249889299273491f, 0.432948768138886f,
+  0.250221431255341f, 0.433140486478806f, 0.250553727149963f, 0.433331936597824f,
+  0.250886172056198f, 0.433523118495941f, 0.251218736171722f, 0.433714061975479f,
+  0.251551479101181f, 0.433904737234116f, 0.251884341239929f, 0.434095174074173f,
+  0.252217382192612f, 0.434285342693329f, 0.252550542354584f, 0.434475272893906f,
+  0.252883851528168f, 0.434664934873581f, 0.253217309713364f, 0.434854328632355f,
+  0.253550916910172f, 0.435043483972549f, 0.253884643316269f, 0.435232400894165f,
+  0.254218548536301f, 0.435421019792557f, 0.254552572965622f, 0.435609430074692f,
+  0.254886746406555f, 0.435797542333603f, 0.255221068859100f, 0.435985416173935f,
+  0.255555540323257f, 0.436173021793365f, 0.255890160799026f, 0.436360388994217f,
+  0.256224930286407f, 0.436547487974167f, 0.256559818983078f, 0.436734348535538f,
+  0.256894856691360f, 0.436920911073685f, 0.257230043411255f, 0.437107264995575f,
+  0.257565379142761f, 0.437293320894241f, 0.257900834083557f, 0.437479138374329f,
+  0.258236467838287f, 0.437664687633514f, 0.258572220802307f, 0.437849998474121f,
+  0.258908122777939f, 0.438035041093826f, 0.259244143962860f, 0.438219845294952f,
+  0.259580343961716f, 0.438404351472855f, 0.259916663169861f, 0.438588619232178f,
+  0.260253131389618f, 0.438772648572922f, 0.260589718818665f, 0.438956409692764f,
+  0.260926485061646f, 0.439139902591705f, 0.261263370513916f, 0.439323127269745f,
+  0.261600375175476f, 0.439506113529205f, 0.261937558650970f, 0.439688831567764f,
+  0.262274861335754f, 0.439871311187744f, 0.262612313032150f, 0.440053492784500f,
+  0.262949883937836f, 0.440235435962677f, 0.263287603855133f, 0.440417140722275f,
+  0.263625472784042f, 0.440598547458649f, 0.263963490724564f, 0.440779715776443f,
+  0.264301627874374f, 0.440960645675659f, 0.264639914035797f, 0.441141277551651f,
+  0.264978319406509f, 0.441321671009064f, 0.265316903591156f, 0.441501796245575f,
+  0.265655577182770f, 0.441681683063507f, 0.265994429588318f, 0.441861271858215f,
+  0.266333401203156f, 0.442040622234344f, 0.266672492027283f, 0.442219734191895f,
+  0.267011761665344f, 0.442398548126221f, 0.267351150512695f, 0.442577123641968f,
+  0.267690658569336f, 0.442755430936813f, 0.268030315637589f, 0.442933470010757f,
+  0.268370121717453f, 0.443111270666122f, 0.268710047006607f, 0.443288803100586f,
+  0.269050091505051f, 0.443466067314148f, 0.269390314817429f, 0.443643063306808f,
+  0.269730657339096f, 0.443819820880890f, 0.270071119070053f, 0.443996280431747f,
+  0.270411729812622f, 0.444172531366348f, 0.270752459764481f, 0.444348484277725f,
+  0.271093338727951f, 0.444524168968201f, 0.271434366703033f, 0.444699615240097f,
+  0.271775513887405f, 0.444874793291092f, 0.272116780281067f, 0.445049703121185f,
+  0.272458195686340f, 0.445224374532700f, 0.272799760103226f, 0.445398747920990f,
+  0.273141443729401f, 0.445572882890701f, 0.273483246564865f, 0.445746749639511f,
+  0.273825198411942f, 0.445920348167419f, 0.274167299270630f, 0.446093708276749f,
+  0.274509519338608f, 0.446266770362854f, 0.274851858615875f, 0.446439594030380f,
+  0.275194346904755f, 0.446612149477005f, 0.275536954402924f, 0.446784436702728f,
+  0.275879681110382f, 0.446956485509872f, 0.276222556829453f, 0.447128236293793f,
+  0.276565581560135f, 0.447299748659134f, 0.276908725500107f, 0.447470992803574f,
+  0.277251988649368f, 0.447641968727112f, 0.277595400810242f, 0.447812676429749f,
+  0.277938932180405f, 0.447983115911484f, 0.278282582759857f, 0.448153316974640f,
+  0.278626382350922f, 0.448323249816895f, 0.278970301151276f, 0.448492884635925f,
+  0.279314368963242f, 0.448662281036377f, 0.279658555984497f, 0.448831409215927f,
+  0.280002862215042f, 0.449000298976898f, 0.280347317457199f, 0.449168890714645f,
+  0.280691891908646f, 0.449337244033813f, 0.281036585569382f, 0.449505299329758f,
+  0.281381398439407f, 0.449673116207123f, 0.281726360321045f, 0.449840664863586f,
+  0.282071471214294f, 0.450007945299149f, 0.282416671514511f, 0.450174957513809f,
+  0.282762020826340f, 0.450341701507568f, 0.283107489347458f, 0.450508207082748f,
+  0.283453077077866f, 0.450674414634705f, 0.283798813819885f, 0.450840383768082f,
+  0.284144669771194f, 0.451006084680557f, 0.284490644931793f, 0.451171487569809f,
+  0.284836769104004f, 0.451336652040482f, 0.285182982683182f, 0.451501548290253f,
+  0.285529345273972f, 0.451666176319122f, 0.285875827074051f, 0.451830536127090f,
+  0.286222457885742f, 0.451994657516479f, 0.286569178104401f, 0.452158480882645f,
+  0.286916047334671f, 0.452322036027908f, 0.287263035774231f, 0.452485352754593f,
+  0.287610173225403f, 0.452648371458054f, 0.287957400083542f, 0.452811151742935f,
+  0.288304775953293f, 0.452973634004593f, 0.288652241230011f, 0.453135877847672f,
+  0.288999855518341f, 0.453297853469849f, 0.289347589015961f, 0.453459560871124f,
+  0.289695471525192f, 0.453621000051498f, 0.290043443441391f, 0.453782171010971f,
+  0.290391564369202f, 0.453943043947220f, 0.290739774703979f, 0.454103678464890f,
+  0.291088134050369f, 0.454264044761658f, 0.291436612606049f, 0.454424172639847f,
+  0.291785210371017f, 0.454584002494812f, 0.292133957147598f, 0.454743564128876f,
+  0.292482793331146f, 0.454902857542038f, 0.292831748723984f, 0.455061882734299f,
+  0.293180853128433f, 0.455220639705658f, 0.293530046939850f, 0.455379128456116f,
+  0.293879389762878f, 0.455537378787994f, 0.294228851795197f, 0.455695331096649f,
+  0.294578403234482f, 0.455853015184402f, 0.294928103685379f, 0.456010431051254f,
+  0.295277923345566f, 0.456167578697205f, 0.295627862215042f, 0.456324487924576f,
+  0.295977920293808f, 0.456481099128723f, 0.296328097581863f, 0.456637442111969f,
+  0.296678394079208f, 0.456793516874313f, 0.297028809785843f, 0.456949323415756f,
+  0.297379344701767f, 0.457104891538620f, 0.297729998826981f, 0.457260161638260f,
+  0.298080772161484f, 0.457415163516998f, 0.298431664705276f, 0.457569897174835f,
+  0.298782676458359f, 0.457724362611771f, 0.299133807420731f, 0.457878559827805f,
+  0.299485057592392f, 0.458032488822937f, 0.299836426973343f, 0.458186149597168f,
+  0.300187885761261f, 0.458339542150497f, 0.300539493560791f, 0.458492636680603f,
+  0.300891220569611f, 0.458645492792130f, 0.301243066787720f, 0.458798080682755f,
+  0.301595002412796f, 0.458950400352478f, 0.301947087049484f, 0.459102421998978f,
+  0.302299261093140f, 0.459254205226898f, 0.302651554346085f, 0.459405690431595f,
+  0.303003966808319f, 0.459556937217712f, 0.303356528282166f, 0.459707885980606f,
+  0.303709149360657f, 0.459858566522598f, 0.304061919450760f, 0.460008978843689f,
+  0.304414808750153f, 0.460159152746201f, 0.304767817258835f, 0.460309028625488f,
+  0.305120915174484f, 0.460458606481552f, 0.305474132299423f, 0.460607945919037f,
+  0.305827468633652f, 0.460757017135620f, 0.306180924177170f, 0.460905820131302f,
+  0.306534498929977f, 0.461054325103760f, 0.306888192892075f, 0.461202591657639f,
+  0.307241976261139f, 0.461350560188293f, 0.307595878839493f, 0.461498260498047f,
+  0.307949900627136f, 0.461645722389221f, 0.308304041624069f, 0.461792886257172f,
+  0.308658272027969f, 0.461939752101898f, 0.309012651443481f, 0.462086379528046f,
+  0.309367120265961f, 0.462232738733292f, 0.309721708297729f, 0.462378799915314f,
+  0.310076385736465f, 0.462524622678757f, 0.310431212186813f, 0.462670147418976f,
+  0.310786128044128f, 0.462815403938293f, 0.311141163110733f, 0.462960392236710f,
+  0.311496287584305f, 0.463105112314224f, 0.311851561069489f, 0.463249564170837f,
+  0.312206923961639f, 0.463393747806549f, 0.312562376260757f, 0.463537633419037f,
+  0.312917977571487f, 0.463681250810623f, 0.313273668289185f, 0.463824629783630f,
+  0.313629478216171f, 0.463967710733414f, 0.313985377550125f, 0.464110493659973f,
+  0.314341396093369f, 0.464253038167953f, 0.314697533845901f, 0.464395314455032f,
+  0.315053790807724f, 0.464537292718887f, 0.315410137176514f, 0.464679002761841f,
+  0.315766572952271f, 0.464820444583893f, 0.316123157739639f, 0.464961618185043f,
+  0.316479831933975f, 0.465102523565292f, 0.316836595535278f, 0.465243130922318f,
+  0.317193508148193f, 0.465383470058441f, 0.317550510168076f, 0.465523540973663f,
+  0.317907601594925f, 0.465663343667984f, 0.318264812231064f, 0.465802878141403f,
+  0.318622142076492f, 0.465942144393921f, 0.318979561328888f, 0.466081112623215f,
+  0.319337099790573f, 0.466219812631607f, 0.319694727659225f, 0.466358244419098f,
+  0.320052474737167f, 0.466496407985687f, 0.320410341024399f, 0.466634273529053f,
+  0.320768296718597f, 0.466771900653839f, 0.321126341819763f, 0.466909229755402f,
+  0.321484506130219f, 0.467046260833740f, 0.321842789649963f, 0.467183053493500f,
+  0.322201162576675f, 0.467319577932358f, 0.322559654712677f, 0.467455804347992f,
+  0.322918236255646f, 0.467591762542725f, 0.323276937007904f, 0.467727422714233f,
+  0.323635727167130f, 0.467862844467163f, 0.323994606733322f, 0.467997968196869f,
+  0.324353635311127f, 0.468132823705673f, 0.324712723493576f, 0.468267410993576f,
+  0.325071930885315f, 0.468401730060577f, 0.325431257486343f, 0.468535751104355f,
+  0.325790673494339f, 0.468669503927231f, 0.326150178909302f, 0.468802988529205f,
+  0.326509803533554f, 0.468936175107956f, 0.326869517564774f, 0.469069123268127f,
+  0.327229350805283f, 0.469201773405075f, 0.327589273452759f, 0.469334155321121f,
+  0.327949285507202f, 0.469466239213943f, 0.328309416770935f, 0.469598054885864f,
+  0.328669637441635f, 0.469729602336884f, 0.329029977321625f, 0.469860881567001f,
+  0.329390406608582f, 0.469991862773895f, 0.329750925302505f, 0.470122605562210f,
+  0.330111563205719f, 0.470253020524979f, 0.330472290515900f, 0.470383197069168f,
+  0.330833107233047f, 0.470513075590134f, 0.331194043159485f, 0.470642685890198f,
+  0.331555068492889f, 0.470772027969360f, 0.331916213035584f, 0.470901101827621f,
+  0.332277417182922f, 0.471029877662659f, 0.332638740539551f, 0.471158385276794f,
+  0.333000183105469f, 0.471286594867706f, 0.333361685276031f, 0.471414536237717f,
+  0.333723306655884f, 0.471542209386826f, 0.334085017442703f, 0.471669614315033f,
+  0.334446847438812f, 0.471796721220016f, 0.334808766841888f, 0.471923559904099f,
+  0.335170775651932f, 0.472050130367279f, 0.335532873868942f, 0.472176402807236f,
+  0.335895091295242f, 0.472302407026291f, 0.336257368326187f, 0.472428143024445f,
+  0.336619764566422f, 0.472553610801697f, 0.336982280015945f, 0.472678780555725f,
+  0.337344855070114f, 0.472803652286530f, 0.337707549333572f, 0.472928285598755f,
+  0.338070303201675f, 0.473052620887756f, 0.338433176279068f, 0.473176687955856f,
+  0.338796168565750f, 0.473300457000732f, 0.339159220457077f, 0.473423957824707f,
+  0.339522391557693f, 0.473547190427780f, 0.339885622262955f, 0.473670125007629f,
+  0.340248972177505f, 0.473792791366577f, 0.340612411499023f, 0.473915189504623f,
+  0.340975970029831f, 0.474037289619446f, 0.341339588165283f, 0.474159121513367f,
+  0.341703325510025f, 0.474280685186386f, 0.342067122459412f, 0.474401950836182f,
+  0.342431038618088f, 0.474522948265076f, 0.342795044183731f, 0.474643647670746f,
+  0.343159139156342f, 0.474764078855515f, 0.343523323535919f, 0.474884241819382f,
+  0.343887597322464f, 0.475004136562347f, 0.344251960515976f, 0.475123733282089f,
+  0.344616413116455f, 0.475243031978607f, 0.344980984926224f, 0.475362062454224f,
+  0.345345616340637f, 0.475480824708939f, 0.345710366964340f, 0.475599318742752f,
+  0.346075177192688f, 0.475717514753342f, 0.346440106630325f, 0.475835442543030f,
+  0.346805095672607f, 0.475953072309494f, 0.347170203924179f, 0.476070433855057f,
+  0.347535371780396f, 0.476187497377396f, 0.347900658845901f, 0.476304292678833f,
+  0.348266035318375f, 0.476420819759369f, 0.348631471395493f, 0.476537048816681f,
+  0.348997026681900f, 0.476653009653091f, 0.349362671375275f, 0.476768702268600f,
+  0.349728375673294f, 0.476884096860886f, 0.350094199180603f, 0.476999223232269f,
+  0.350460082292557f, 0.477114051580429f, 0.350826084613800f, 0.477228611707687f,
+  0.351192146539688f, 0.477342873811722f, 0.351558297872543f, 0.477456867694855f,
+  0.351924568414688f, 0.477570593357086f, 0.352290898561478f, 0.477684020996094f,
+  0.352657318115234f, 0.477797180414200f, 0.353023827075958f, 0.477910041809082f,
+  0.353390425443649f, 0.478022634983063f, 0.353757113218308f, 0.478134930133820f,
+  0.354123860597610f, 0.478246957063675f, 0.354490727186203f, 0.478358715772629f,
+  0.354857653379440f, 0.478470176458359f, 0.355224698781967f, 0.478581339120865f,
+  0.355591803789139f, 0.478692263364792f, 0.355958998203278f, 0.478802859783173f,
+  0.356326282024384f, 0.478913217782974f, 0.356693625450134f, 0.479023247957230f,
+  0.357061088085175f, 0.479133039712906f, 0.357428610324860f, 0.479242533445358f,
+  0.357796221971512f, 0.479351729154587f, 0.358163923025131f, 0.479460656642914f,
+  0.358531713485718f, 0.479569315910339f, 0.358899593353271f, 0.479677677154541f,
+  0.359267532825470f, 0.479785770177841f, 0.359635561704636f, 0.479893565177917f,
+  0.360003679990768f, 0.480001062154770f, 0.360371887683868f, 0.480108320713043f,
+  0.360740154981613f, 0.480215251445770f, 0.361108511686325f, 0.480321943759918f,
+  0.361476957798004f, 0.480428308248520f, 0.361845493316650f, 0.480534434318542f,
+  0.362214088439941f, 0.480640232563019f, 0.362582772970200f, 0.480745792388916f,
+  0.362951546907425f, 0.480851024389267f, 0.363320380449295f, 0.480956017971039f,
+  0.363689333200455f, 0.481060713529587f, 0.364058345556259f, 0.481165111064911f,
+  0.364427417516708f, 0.481269240379334f, 0.364796578884125f, 0.481373071670532f,
+  0.365165829658508f, 0.481476634740829f, 0.365535169839859f, 0.481579899787903f,
+  0.365904569625854f, 0.481682896614075f, 0.366274058818817f, 0.481785595417023f,
+  0.366643607616425f, 0.481888025999069f, 0.367013275623322f, 0.481990188360214f,
+  0.367382973432541f, 0.482092022895813f, 0.367752790451050f, 0.482193619012833f,
+  0.368122667074203f, 0.482294887304306f, 0.368492603302002f, 0.482395917177200f,
+  0.368862658739090f, 0.482496619224548f, 0.369232743978500f, 0.482597053050995f,
+  0.369602948427200f, 0.482697218656540f, 0.369973212480545f, 0.482797086238861f,
+  0.370343536138535f, 0.482896685600281f, 0.370713949203491f, 0.482995986938477f,
+  0.371084451675415f, 0.483094990253448f, 0.371455013751984f, 0.483193725347519f,
+  0.371825665235519f, 0.483292192220688f, 0.372196376323700f, 0.483390361070633f,
+  0.372567176818848f, 0.483488231897354f, 0.372938036918640f, 0.483585834503174f,
+  0.373308986425400f, 0.483683139085770f, 0.373679995536804f, 0.483780175447464f,
+  0.374051094055176f, 0.483876913785934f, 0.374422252178192f, 0.483973383903503f,
+  0.374793499708176f, 0.484069555997849f, 0.375164806842804f, 0.484165430068970f,
+  0.375536203384399f, 0.484261035919189f, 0.375907659530640f, 0.484356373548508f,
+  0.376279205083847f, 0.484451413154602f, 0.376650810241699f, 0.484546154737473f,
+  0.377022475004196f, 0.484640628099442f, 0.377394229173660f, 0.484734803438187f,
+  0.377766042947769f, 0.484828680753708f, 0.378137946128845f, 0.484922289848328f,
+  0.378509908914566f, 0.485015630722046f, 0.378881961107254f, 0.485108673572540f,
+  0.379254043102264f, 0.485201418399811f, 0.379626244306564f, 0.485293895006180f,
+  0.379998475313187f, 0.485386073589325f, 0.380370795726776f, 0.485477954149246f,
+  0.380743205547333f, 0.485569566488266f, 0.381115674972534f, 0.485660910606384f,
+  0.381488204002380f, 0.485751956701279f, 0.381860792636871f, 0.485842704772949f,
+  0.382233470678329f, 0.485933154821396f, 0.382606208324432f, 0.486023366451263f,
+  0.382979035377502f, 0.486113250255585f, 0.383351892232895f, 0.486202865839005f,
+  0.383724838495255f, 0.486292183399200f, 0.384097874164581f, 0.486381232738495f,
+  0.384470939636230f, 0.486469984054565f, 0.384844094514847f, 0.486558437347412f,
+  0.385217308998108f, 0.486646622419357f, 0.385590612888336f, 0.486734509468079f,
+  0.385963946580887f, 0.486822128295898f, 0.386337369680405f, 0.486909449100494f,
+  0.386710882186890f, 0.486996471881866f, 0.387084424495697f, 0.487083226442337f,
+  0.387458056211472f, 0.487169682979584f, 0.387831717729568f, 0.487255871295929f,
+  0.388205498456955f, 0.487341761589050f, 0.388579308986664f, 0.487427353858948f,
+  0.388953179121017f, 0.487512677907944f, 0.389327138662338f, 0.487597703933716f,
+  0.389701157808304f, 0.487682431936264f, 0.390075236558914f, 0.487766891717911f,
+  0.390449374914169f, 0.487851053476334f, 0.390823602676392f, 0.487934947013855f,
+  0.391197860240936f, 0.488018542528152f, 0.391572207212448f, 0.488101840019226f,
+  0.391946613788605f, 0.488184869289398f, 0.392321079969406f, 0.488267600536346f,
+  0.392695605754852f, 0.488350033760071f, 0.393070191144943f, 0.488432198762894f,
+  0.393444836139679f, 0.488514065742493f, 0.393819570541382f, 0.488595664501190f,
+  0.394194334745407f, 0.488676935434341f, 0.394569188356400f, 0.488757967948914f,
+  0.394944071769714f, 0.488838672637939f, 0.395319044589996f, 0.488919109106064f,
+  0.395694077014923f, 0.488999247550964f, 0.396069169044495f, 0.489079117774963f,
+  0.396444320678711f, 0.489158689975739f, 0.396819531917572f, 0.489237964153290f,
+  0.397194802761078f, 0.489316970109940f, 0.397570133209229f, 0.489395678043365f,
+  0.397945523262024f, 0.489474087953568f, 0.398320972919464f, 0.489552229642868f,
+  0.398696482181549f, 0.489630073308945f, 0.399072051048279f, 0.489707618951797f,
+  0.399447679519653f, 0.489784896373749f, 0.399823367595673f, 0.489861875772476f,
+  0.400199115276337f, 0.489938557147980f, 0.400574922561646f, 0.490014940500259f,
+  0.400950789451599f, 0.490091055631638f, 0.401326715946198f, 0.490166902542114f,
+  0.401702702045441f, 0.490242421627045f, 0.402078747749329f, 0.490317672491074f,
+  0.402454853057861f, 0.490392625331879f, 0.402830988168716f, 0.490467309951782f,
+  0.403207212686539f, 0.490541696548462f, 0.403583467006683f, 0.490615785121918f,
+  0.403959810733795f, 0.490689605474472f, 0.404336184263229f, 0.490763127803802f,
+  0.404712617397308f, 0.490836352109909f, 0.405089110136032f, 0.490909278392792f,
+  0.405465662479401f, 0.490981936454773f, 0.405842274427414f, 0.491054296493530f,
+  0.406218945980072f, 0.491126358509064f, 0.406595647335052f, 0.491198152303696f,
+  0.406972438097000f, 0.491269648075104f, 0.407349258661270f, 0.491340845823288f,
+  0.407726138830185f, 0.491411775350571f, 0.408103078603745f, 0.491482406854630f,
+  0.408480048179626f, 0.491552740335464f, 0.408857107162476f, 0.491622805595398f,
+  0.409234195947647f, 0.491692543029785f, 0.409611344337463f, 0.491762012243271f,
+  0.409988552331924f, 0.491831213235855f, 0.410365819931030f, 0.491900116205215f,
+  0.410743117332459f, 0.491968721151352f, 0.411120474338531f, 0.492037028074265f,
+  0.411497890949249f, 0.492105036973953f, 0.411875367164612f, 0.492172777652740f,
+  0.412252873182297f, 0.492240220308304f, 0.412630438804626f, 0.492307394742966f,
+  0.413008064031601f, 0.492374241352081f, 0.413385748863220f, 0.492440819740295f,
+  0.413763463497162f, 0.492507129907608f, 0.414141237735748f, 0.492573112249374f,
+  0.414519041776657f, 0.492638826370239f, 0.414896935224533f, 0.492704242467880f,
+  0.415274858474731f, 0.492769360542297f, 0.415652841329575f, 0.492834210395813f,
+  0.416030853986740f, 0.492898762226105f, 0.416408926248550f, 0.492963016033173f,
+  0.416787058115005f, 0.493026971817017f, 0.417165219783783f, 0.493090659379959f,
+  0.417543441057205f, 0.493154048919678f, 0.417921721935272f, 0.493217140436172f,
+  0.418300032615662f, 0.493279963731766f, 0.418678402900696f, 0.493342459201813f,
+  0.419056802988052f, 0.493404686450958f, 0.419435262680054f, 0.493466645479202f,
+  0.419813781976700f, 0.493528276681900f, 0.420192331075668f, 0.493589639663696f,
+  0.420570939779282f, 0.493650704622269f, 0.420949578285217f, 0.493711471557617f,
+  0.421328276395798f, 0.493771970272064f, 0.421707004308701f, 0.493832170963287f,
+  0.422085791826248f, 0.493892073631287f, 0.422464638948441f, 0.493951678276062f,
+  0.422843515872955f, 0.494011014699936f, 0.423222452402115f, 0.494070053100586f,
+  0.423601418733597f, 0.494128793478012f, 0.423980414867401f, 0.494187235832214f,
+  0.424359470605850f, 0.494245409965515f, 0.424738585948944f, 0.494303256273270f,
+  0.425117731094360f, 0.494360834360123f, 0.425496935844421f, 0.494418144226074f,
+  0.425876170396805f, 0.494475126266479f, 0.426255434751511f, 0.494531840085983f,
+  0.426634758710861f, 0.494588255882263f, 0.427014142274857f, 0.494644373655319f,
+  0.427393525838852f, 0.494700223207474f, 0.427772998809814f, 0.494755744934082f,
+  0.428152471780777f, 0.494810998439789f, 0.428532034158707f, 0.494865983724594f,
+  0.428911596536636f, 0.494920641183853f, 0.429291218519211f, 0.494975030422211f,
+  0.429670870304108f, 0.495029091835022f, 0.430050581693649f, 0.495082914829254f,
+  0.430430322885513f, 0.495136409997940f, 0.430810123682022f, 0.495189607143402f,
+  0.431189924478531f, 0.495242536067963f, 0.431569814682007f, 0.495295166969299f,
+  0.431949704885483f, 0.495347499847412f, 0.432329654693604f, 0.495399564504623f,
+  0.432709634304047f, 0.495451331138611f, 0.433089673519135f, 0.495502769947052f,
+  0.433469742536545f, 0.495553970336914f, 0.433849841356277f, 0.495604842901230f,
+  0.434229999780655f, 0.495655417442322f, 0.434610158205032f, 0.495705723762512f,
+  0.434990376234055f, 0.495755732059479f, 0.435370653867722f, 0.495805442333221f,
+  0.435750931501389f, 0.495854884386063f, 0.436131268739700f, 0.495903998613358f,
+  0.436511665582657f, 0.495952844619751f, 0.436892062425613f, 0.496001392602921f,
+  0.437272518873215f, 0.496049642562866f, 0.437653005123138f, 0.496097624301910f,
+  0.438033521175385f, 0.496145308017731f, 0.438414067029953f, 0.496192663908005f,
+  0.438794672489166f, 0.496239781379700f, 0.439175277948380f, 0.496286571025848f,
+  0.439555943012238f, 0.496333062648773f, 0.439936667680740f, 0.496379286050797f,
+  0.440317392349243f, 0.496425211429596f, 0.440698176622391f, 0.496470838785172f,
+  0.441078960895538f, 0.496516168117523f, 0.441459804773331f, 0.496561229228973f,
+  0.441840678453445f, 0.496605962514877f, 0.442221581935883f, 0.496650427579880f,
+  0.442602545022964f, 0.496694594621658f, 0.442983508110046f, 0.496738493442535f,
+  0.443364530801773f, 0.496782064437866f, 0.443745553493500f, 0.496825367212296f,
+  0.444126635789871f, 0.496868371963501f, 0.444507747888565f, 0.496911078691483f,
+  0.444888889789581f, 0.496953487396240f, 0.445270061492920f, 0.496995598077774f,
+  0.445651292800903f, 0.497037440538406f, 0.446032524108887f, 0.497078984975815f,
+  0.446413785219193f, 0.497120231389999f, 0.446795076131821f, 0.497161179780960f,
+  0.447176426649094f, 0.497201830148697f, 0.447557777166367f, 0.497242212295532f,
+  0.447939187288284f, 0.497282296419144f, 0.448320597410202f, 0.497322082519531f,
+  0.448702067136765f, 0.497361570596695f, 0.449083566665649f, 0.497400760650635f,
+  0.449465066194534f, 0.497439652681351f, 0.449846625328064f, 0.497478276491165f,
+  0.450228184461594f, 0.497516602277756f, 0.450609803199768f, 0.497554630041122f,
+  0.450991421937943f, 0.497592359781265f, 0.451373100280762f, 0.497629791498184f,
+  0.451754778623581f, 0.497666954994202f, 0.452136516571045f, 0.497703820466995f,
+  0.452518254518509f, 0.497740387916565f, 0.452900022268295f, 0.497776657342911f,
+  0.453281819820404f, 0.497812628746033f, 0.453663676977158f, 0.497848302125931f,
+  0.454045534133911f, 0.497883707284927f, 0.454427421092987f, 0.497918814420700f,
+  0.454809308052063f, 0.497953623533249f, 0.455191254615784f, 0.497988134622574f,
+  0.455573230981827f, 0.498022347688675f, 0.455955207347870f, 0.498056292533875f,
+  0.456337243318558f, 0.498089909553528f, 0.456719279289246f, 0.498123258352280f,
+  0.457101345062256f, 0.498156309127808f, 0.457483440637589f, 0.498189061880112f,
+  0.457865566015244f, 0.498221516609192f, 0.458247691392899f, 0.498253703117371f,
+  0.458629876375198f, 0.498285561800003f, 0.459012061357498f, 0.498317152261734f,
+  0.459394276142120f, 0.498348444700241f, 0.459776520729065f, 0.498379439115524f,
+  0.460158795118332f, 0.498410135507584f, 0.460541069507599f, 0.498440563678741f,
+  0.460923373699188f, 0.498470664024353f, 0.461305707693100f, 0.498500496149063f,
+  0.461688071489334f, 0.498530030250549f, 0.462070435285568f, 0.498559266328812f,
+  0.462452858686447f, 0.498588204383850f, 0.462835282087326f, 0.498616874217987f,
+  0.463217705488205f, 0.498645216226578f, 0.463600188493729f, 0.498673290014267f,
+  0.463982671499252f, 0.498701065778732f, 0.464365184307098f, 0.498728543519974f,
+  0.464747726917267f, 0.498755723237991f, 0.465130269527435f, 0.498782604932785f,
+  0.465512841939926f, 0.498809218406677f, 0.465895414352417f, 0.498835533857346f,
+  0.466278046369553f, 0.498861521482468f, 0.466660678386688f, 0.498887240886688f,
+  0.467043310403824f, 0.498912662267685f, 0.467426002025604f, 0.498937815427780f,
+  0.467808693647385f, 0.498962640762329f, 0.468191385269165f, 0.498987197875977f,
+  0.468574106693268f, 0.499011427164078f, 0.468956857919693f, 0.499035388231277f,
+  0.469339638948441f, 0.499059051275253f, 0.469722419977188f, 0.499082416296005f,
+  0.470105201005936f, 0.499105513095856f, 0.470488041639328f, 0.499128282070160f,
+  0.470870882272720f, 0.499150782823563f, 0.471253722906113f, 0.499172955751419f,
+  0.471636593341827f, 0.499194860458374f, 0.472019463777542f, 0.499216467142105f,
+  0.472402364015579f, 0.499237775802612f, 0.472785294055939f, 0.499258816242218f,
+  0.473168224096298f, 0.499279528856277f, 0.473551183938980f, 0.499299973249435f,
+  0.473934143781662f, 0.499320119619370f, 0.474317133426666f, 0.499339967966080f,
+  0.474700123071671f, 0.499359518289566f, 0.475083142518997f, 0.499378770589828f,
+  0.475466161966324f, 0.499397724866867f, 0.475849211215973f, 0.499416410923004f,
+  0.476232260465622f, 0.499434769153595f, 0.476615339517593f, 0.499452859163284f,
+  0.476998418569565f, 0.499470651149750f, 0.477381497621536f, 0.499488145112991f,
+  0.477764606475830f, 0.499505341053009f, 0.478147745132446f, 0.499522238969803f,
+  0.478530883789063f, 0.499538868665695f, 0.478914022445679f, 0.499555170536041f,
+  0.479297190904617f, 0.499571204185486f, 0.479680359363556f, 0.499586939811707f,
+  0.480063527822495f, 0.499602377414703f, 0.480446726083755f, 0.499617516994476f,
+  0.480829954147339f, 0.499632388353348f, 0.481213152408600f, 0.499646931886673f,
+  0.481596380472183f, 0.499661177396774f, 0.481979638338089f, 0.499675154685974f,
+  0.482362866401672f, 0.499688833951950f, 0.482746154069901f, 0.499702215194702f,
+  0.483129411935806f, 0.499715298414230f, 0.483512699604034f, 0.499728083610535f,
+  0.483895987272263f, 0.499740600585938f, 0.484279274940491f, 0.499752789735794f,
+  0.484662592411041f, 0.499764710664749f, 0.485045909881592f, 0.499776333570480f,
+  0.485429257154465f, 0.499787658452988f, 0.485812574625015f, 0.499798685312271f,
+  0.486195921897888f, 0.499809414148331f, 0.486579269170761f, 0.499819844961166f,
+  0.486962646245956f, 0.499830007553101f, 0.487346023321152f, 0.499839842319489f,
+  0.487729400396347f, 0.499849408864975f, 0.488112777471542f, 0.499858677387238f,
+  0.488496154546738f, 0.499867647886276f, 0.488879561424255f, 0.499876320362091f,
+  0.489262968301773f, 0.499884694814682f, 0.489646375179291f, 0.499892801046371f,
+  0.490029782056808f, 0.499900579452515f, 0.490413218736649f, 0.499908089637756f,
+  0.490796625614166f, 0.499915301799774f, 0.491180062294006f, 0.499922215938568f,
+  0.491563498973846f, 0.499928832054138f, 0.491946935653687f, 0.499935150146484f,
+  0.492330402135849f, 0.499941170215607f, 0.492713838815689f, 0.499946922063828f,
+  0.493097305297852f, 0.499952346086502f, 0.493480771780014f, 0.499957501888275f,
+  0.493864238262177f, 0.499962359666824f, 0.494247704744339f, 0.499966919422150f,
+  0.494631171226501f, 0.499971181154251f, 0.495014637708664f, 0.499975144863129f,
+  0.495398133993149f, 0.499978810548782f, 0.495781600475311f, 0.499982208013535f,
+  0.496165096759796f, 0.499985307455063f, 0.496548563241959f, 0.499988079071045f,
+  0.496932059526443f, 0.499990582466125f, 0.497315555810928f, 0.499992787837982f,
+  0.497699022293091f, 0.499994695186615f, 0.498082518577576f, 0.499996334314346f,
+  0.498466014862061f, 0.499997645616531f, 0.498849511146545f, 0.499998688697815f,
+  0.499233007431030f, 0.499999403953552f, 0.499616503715515f, 0.499999850988388f,
+};
+
+
+/**
+  @par
+  Generation of realCoefB array:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+ */
+
+const float32_t realCoefB[8192] = {
+  0.500000000000000f, 0.500000000000000f, 0.500383496284485f, 0.499999850988388f,
+  0.500766992568970f, 0.499999403953552f, 0.501150488853455f, 0.499998688697815f,
+  0.501533985137939f, 0.499997645616531f, 0.501917481422424f, 0.499996334314346f,
+  0.502300977706909f, 0.499994695186615f, 0.502684473991394f, 0.499992787837982f,
+  0.503067970275879f, 0.499990582466125f, 0.503451406955719f, 0.499988079071045f,
+  0.503834903240204f, 0.499985307455063f, 0.504218399524689f, 0.499982208013535f,
+  0.504601895809174f, 0.499978810548782f, 0.504985332489014f, 0.499975144863129f,
+  0.505368828773499f, 0.499971181154251f, 0.505752325057983f, 0.499966919422150f,
+  0.506135761737823f, 0.499962359666824f, 0.506519258022308f, 0.499957501888275f,
+  0.506902694702148f, 0.499952346086502f, 0.507286131381989f, 0.499946922063828f,
+  0.507669627666473f, 0.499941170215607f, 0.508053064346313f, 0.499935150146484f,
+  0.508436501026154f, 0.499928832054138f, 0.508819937705994f, 0.499922215938568f,
+  0.509203374385834f, 0.499915301799774f, 0.509586811065674f, 0.499908089637756f,
+  0.509970188140869f, 0.499900579452515f, 0.510353624820709f, 0.499892801046371f,
+  0.510737061500549f, 0.499884694814682f, 0.511120438575745f, 0.499876320362091f,
+  0.511503815650940f, 0.499867647886276f, 0.511887252330780f, 0.499858677387238f,
+  0.512270629405975f, 0.499849408864975f, 0.512654006481171f, 0.499839842319489f,
+  0.513037383556366f, 0.499830007553101f, 0.513420701026917f, 0.499819844961166f,
+  0.513804078102112f, 0.499809414148331f, 0.514187395572662f, 0.499798685312271f,
+  0.514570772647858f, 0.499787658452988f, 0.514954090118408f, 0.499776333570480f,
+  0.515337407588959f, 0.499764710664749f, 0.515720725059509f, 0.499752789735794f,
+  0.516103982925415f, 0.499740600585938f, 0.516487300395966f, 0.499728083610535f,
+  0.516870558261871f, 0.499715298414230f, 0.517253875732422f, 0.499702215194702f,
+  0.517637133598328f, 0.499688833951950f, 0.518020391464233f, 0.499675154685974f,
+  0.518403589725494f, 0.499661177396774f, 0.518786847591400f, 0.499646931886673f,
+  0.519170045852661f, 0.499632388353348f, 0.519553244113922f, 0.499617516994476f,
+  0.519936442375183f, 0.499602377414703f, 0.520319640636444f, 0.499586939811707f,
+  0.520702838897705f, 0.499571204185486f, 0.521085977554321f, 0.499555170536041f,
+  0.521469116210938f, 0.499538868665695f, 0.521852254867554f, 0.499522238969803f,
+  0.522235393524170f, 0.499505341053009f, 0.522618472576141f, 0.499488145112991f,
+  0.523001611232758f, 0.499470651149750f, 0.523384690284729f, 0.499452859163284f,
+  0.523767769336700f, 0.499434769153595f, 0.524150788784027f, 0.499416410923004f,
+  0.524533808231354f, 0.499397724866867f, 0.524916887283325f, 0.499378770589828f,
+  0.525299847126007f, 0.499359518289566f, 0.525682866573334f, 0.499339967966080f,
+  0.526065826416016f, 0.499320119619370f, 0.526448845863342f, 0.499299973249435f,
+  0.526831746101379f, 0.499279528856277f, 0.527214705944061f, 0.499258816242218f,
+  0.527597606182098f, 0.499237775802612f, 0.527980506420136f, 0.499216467142105f,
+  0.528363406658173f, 0.499194860458374f, 0.528746306896210f, 0.499172955751419f,
+  0.529129147529602f, 0.499150782823563f, 0.529511988162994f, 0.499128282070160f,
+  0.529894769191742f, 0.499105513095856f, 0.530277609825134f, 0.499082416296005f,
+  0.530660390853882f, 0.499059051275253f, 0.531043112277985f, 0.499035388231277f,
+  0.531425893306732f, 0.499011427164078f, 0.531808614730835f, 0.498987197875977f,
+  0.532191336154938f, 0.498962640762329f, 0.532573997974396f, 0.498937815427780f,
+  0.532956659793854f, 0.498912662267685f, 0.533339321613312f, 0.498887240886688f,
+  0.533721983432770f, 0.498861521482468f, 0.534104585647583f, 0.498835533857346f,
+  0.534487187862396f, 0.498809218406677f, 0.534869730472565f, 0.498782604932785f,
+  0.535252273082733f, 0.498755723237991f, 0.535634815692902f, 0.498728543519974f,
+  0.536017298698425f, 0.498701065778732f, 0.536399841308594f, 0.498673290014267f,
+  0.536782264709473f, 0.498645216226578f, 0.537164747714996f, 0.498616874217987f,
+  0.537547171115875f, 0.498588204383850f, 0.537929534912109f, 0.498559266328812f,
+  0.538311958312988f, 0.498530030250549f, 0.538694262504578f, 0.498500496149063f,
+  0.539076626300812f, 0.498470664024353f, 0.539458930492401f, 0.498440563678741f,
+  0.539841234683990f, 0.498410135507584f, 0.540223479270935f, 0.498379439115524f,
+  0.540605723857880f, 0.498348444700241f, 0.540987968444824f, 0.498317152261734f,
+  0.541370153427124f, 0.498285561800003f, 0.541752278804779f, 0.498253703117371f,
+  0.542134463787079f, 0.498221516609192f, 0.542516589164734f, 0.498189061880112f,
+  0.542898654937744f, 0.498156309127808f, 0.543280720710754f, 0.498123258352280f,
+  0.543662786483765f, 0.498089909553528f, 0.544044792652130f, 0.498056292533875f,
+  0.544426798820496f, 0.498022347688675f, 0.544808745384216f, 0.497988134622574f,
+  0.545190691947937f, 0.497953623533249f, 0.545572578907013f, 0.497918814420700f,
+  0.545954465866089f, 0.497883707284927f, 0.546336352825165f, 0.497848302125931f,
+  0.546718180179596f, 0.497812628746033f, 0.547099947929382f, 0.497776657342911f,
+  0.547481775283813f, 0.497740387916565f, 0.547863483428955f, 0.497703820466995f,
+  0.548245191574097f, 0.497666954994202f, 0.548626899719238f, 0.497629791498184f,
+  0.549008548259735f, 0.497592359781265f, 0.549390196800232f, 0.497554630041122f,
+  0.549771785736084f, 0.497516602277756f, 0.550153374671936f, 0.497478276491165f,
+  0.550534904003143f, 0.497439652681351f, 0.550916433334351f, 0.497400760650635f,
+  0.551297962665558f, 0.497361570596695f, 0.551679372787476f, 0.497322082519531f,
+  0.552060842514038f, 0.497282296419144f, 0.552442193031311f, 0.497242212295532f,
+  0.552823603153229f, 0.497201830148697f, 0.553204894065857f, 0.497161179780960f,
+  0.553586184978485f, 0.497120231389999f, 0.553967475891113f, 0.497078984975815f,
+  0.554348707199097f, 0.497037440538406f, 0.554729938507080f, 0.496995598077774f,
+  0.555111110210419f, 0.496953487396240f, 0.555492222309113f, 0.496911078691483f,
+  0.555873334407806f, 0.496868371963501f, 0.556254446506500f, 0.496825367212296f,
+  0.556635499000549f, 0.496782064437866f, 0.557016491889954f, 0.496738493442535f,
+  0.557397484779358f, 0.496694594621658f, 0.557778418064117f, 0.496650427579880f,
+  0.558159291744232f, 0.496605962514877f, 0.558540165424347f, 0.496561229228973f,
+  0.558921039104462f, 0.496516168117523f, 0.559301853179932f, 0.496470838785172f,
+  0.559682607650757f, 0.496425211429596f, 0.560063362121582f, 0.496379286050797f,
+  0.560444056987762f, 0.496333062648773f, 0.560824692249298f, 0.496286571025848f,
+  0.561205327510834f, 0.496239781379700f, 0.561585903167725f, 0.496192663908005f,
+  0.561966478824615f, 0.496145308017731f, 0.562346994876862f, 0.496097624301910f,
+  0.562727510929108f, 0.496049642562866f, 0.563107967376709f, 0.496001392602921f,
+  0.563488364219666f, 0.495952844619751f, 0.563868701457977f, 0.495903998613358f,
+  0.564249038696289f, 0.495854884386063f, 0.564629375934601f, 0.495805442333221f,
+  0.565009593963623f, 0.495755732059479f, 0.565389811992645f, 0.495705723762512f,
+  0.565770030021667f, 0.495655417442322f, 0.566150128841400f, 0.495604842901230f,
+  0.566530287265778f, 0.495553970336914f, 0.566910326480865f, 0.495502769947052f,
+  0.567290365695953f, 0.495451331138611f, 0.567670345306396f, 0.495399564504623f,
+  0.568050265312195f, 0.495347499847412f, 0.568430185317993f, 0.495295166969299f,
+  0.568810045719147f, 0.495242536067963f, 0.569189906120300f, 0.495189607143402f,
+  0.569569647312164f, 0.495136409997940f, 0.569949388504028f, 0.495082914829254f,
+  0.570329129695892f, 0.495029091835022f, 0.570708811283112f, 0.494975030422211f,
+  0.571088373661041f, 0.494920641183853f, 0.571467995643616f, 0.494865983724594f,
+  0.571847498416901f, 0.494810998439789f, 0.572227001190186f, 0.494755744934082f,
+  0.572606444358826f, 0.494700223207474f, 0.572985887527466f, 0.494644373655319f,
+  0.573365211486816f, 0.494588255882263f, 0.573744535446167f, 0.494531840085983f,
+  0.574123859405518f, 0.494475126266479f, 0.574503064155579f, 0.494418144226074f,
+  0.574882268905640f, 0.494360834360123f, 0.575261414051056f, 0.494303256273270f,
+  0.575640499591827f, 0.494245409965515f, 0.576019585132599f, 0.494187235832214f,
+  0.576398611068726f, 0.494128793478012f, 0.576777577400208f, 0.494070053100586f,
+  0.577156484127045f, 0.494011014699936f, 0.577535390853882f, 0.493951678276062f,
+  0.577914178371429f, 0.493892073631287f, 0.578292965888977f, 0.493832170963287f,
+  0.578671753406525f, 0.493771970272064f, 0.579050421714783f, 0.493711471557617f,
+  0.579429090023041f, 0.493650704622269f, 0.579807698726654f, 0.493589639663696f,
+  0.580186247825623f, 0.493528276681900f, 0.580564737319946f, 0.493466645479202f,
+  0.580943167209625f, 0.493404686450958f, 0.581321597099304f, 0.493342459201813f,
+  0.581699967384338f, 0.493279963731766f, 0.582078278064728f, 0.493217140436172f,
+  0.582456588745117f, 0.493154048919678f, 0.582834780216217f, 0.493090659379959f,
+  0.583212971687317f, 0.493026971817017f, 0.583591103553772f, 0.492963016033173f,
+  0.583969175815582f, 0.492898762226105f, 0.584347188472748f, 0.492834210395813f,
+  0.584725141525269f, 0.492769360542297f, 0.585103094577789f, 0.492704242467880f,
+  0.585480928421021f, 0.492638826370239f, 0.585858762264252f, 0.492573112249374f,
+  0.586236536502838f, 0.492507129907608f, 0.586614251136780f, 0.492440819740295f,
+  0.586991965770721f, 0.492374241352081f, 0.587369561195374f, 0.492307394742966f,
+  0.587747097015381f, 0.492240220308304f, 0.588124632835388f, 0.492172777652740f,
+  0.588502109050751f, 0.492105036973953f, 0.588879525661469f, 0.492037028074265f,
+  0.589256882667542f, 0.491968721151352f, 0.589634180068970f, 0.491900116205215f,
+  0.590011477470398f, 0.491831213235855f, 0.590388655662537f, 0.491762012243271f,
+  0.590765833854675f, 0.491692543029785f, 0.591142892837524f, 0.491622805595398f,
+  0.591519951820374f, 0.491552740335464f, 0.591896951198578f, 0.491482406854630f,
+  0.592273890972137f, 0.491411775350571f, 0.592650771141052f, 0.491340845823288f,
+  0.593027591705322f, 0.491269648075104f, 0.593404352664948f, 0.491198152303696f,
+  0.593781054019928f, 0.491126358509064f, 0.594157755374908f, 0.491054296493530f,
+  0.594534337520599f, 0.490981936454773f, 0.594910860061646f, 0.490909278392792f,
+  0.595287382602692f, 0.490836352109909f, 0.595663845539093f, 0.490763127803802f,
+  0.596040189266205f, 0.490689605474472f, 0.596416532993317f, 0.490615785121918f,
+  0.596792817115784f, 0.490541696548462f, 0.597168982028961f, 0.490467309951782f,
+  0.597545146942139f, 0.490392625331879f, 0.597921252250671f, 0.490317672491074f,
+  0.598297297954559f, 0.490242421627045f, 0.598673284053802f, 0.490166902542114f,
+  0.599049210548401f, 0.490091055631638f, 0.599425077438354f, 0.490014940500259f,
+  0.599800884723663f, 0.489938557147980f, 0.600176632404327f, 0.489861875772476f,
+  0.600552320480347f, 0.489784896373749f, 0.600927948951721f, 0.489707618951797f,
+  0.601303517818451f, 0.489630073308945f, 0.601679027080536f, 0.489552229642868f,
+  0.602054476737976f, 0.489474087953568f, 0.602429866790771f, 0.489395678043365f,
+  0.602805197238922f, 0.489316970109940f, 0.603180468082428f, 0.489237964153290f,
+  0.603555679321289f, 0.489158689975739f, 0.603930830955505f, 0.489079117774963f,
+  0.604305922985077f, 0.488999247550964f, 0.604680955410004f, 0.488919109106064f,
+  0.605055928230286f, 0.488838672637939f, 0.605430841445923f, 0.488757967948914f,
+  0.605805635452271f, 0.488676935434341f, 0.606180429458618f, 0.488595664501190f,
+  0.606555163860321f, 0.488514065742493f, 0.606929838657379f, 0.488432198762894f,
+  0.607304394245148f, 0.488350033760071f, 0.607678949832916f, 0.488267600536346f,
+  0.608053386211395f, 0.488184869289398f, 0.608427822589874f, 0.488101840019226f,
+  0.608802139759064f, 0.488018542528152f, 0.609176397323608f, 0.487934947013855f,
+  0.609550595283508f, 0.487851053476334f, 0.609924793243408f, 0.487766891717911f,
+  0.610298871994019f, 0.487682431936264f, 0.610672831535339f, 0.487597703933716f,
+  0.611046791076660f, 0.487512677907944f, 0.611420691013336f, 0.487427353858948f,
+  0.611794531345367f, 0.487341761589050f, 0.612168252468109f, 0.487255871295929f,
+  0.612541973590851f, 0.487169682979584f, 0.612915575504303f, 0.487083226442337f,
+  0.613289117813110f, 0.486996471881866f, 0.613662600517273f, 0.486909449100494f,
+  0.614036023616791f, 0.486822128295898f, 0.614409387111664f, 0.486734509468079f,
+  0.614782691001892f, 0.486646622419357f, 0.615155875682831f, 0.486558437347412f,
+  0.615529060363770f, 0.486469984054565f, 0.615902125835419f, 0.486381232738495f,
+  0.616275131702423f, 0.486292183399200f, 0.616648077964783f, 0.486202865839005f,
+  0.617020964622498f, 0.486113250255585f, 0.617393791675568f, 0.486023366451263f,
+  0.617766559123993f, 0.485933154821396f, 0.618139207363129f, 0.485842704772949f,
+  0.618511795997620f, 0.485751956701279f, 0.618884325027466f, 0.485660910606384f,
+  0.619256794452667f, 0.485569566488266f, 0.619629204273224f, 0.485477954149246f,
+  0.620001494884491f, 0.485386073589325f, 0.620373785495758f, 0.485293895006180f,
+  0.620745956897736f, 0.485201418399811f, 0.621118068695068f, 0.485108673572540f,
+  0.621490061283112f, 0.485015630722046f, 0.621862053871155f, 0.484922289848328f,
+  0.622233927249908f, 0.484828680753708f, 0.622605800628662f, 0.484734803438187f,
+  0.622977554798126f, 0.484640628099442f, 0.623349189758301f, 0.484546154737473f,
+  0.623720824718475f, 0.484451413154602f, 0.624092340469360f, 0.484356373548508f,
+  0.624463796615601f, 0.484261035919189f, 0.624835193157196f, 0.484165430068970f,
+  0.625206530094147f, 0.484069555997849f, 0.625577747821808f, 0.483973383903503f,
+  0.625948905944824f, 0.483876913785934f, 0.626320004463196f, 0.483780175447464f,
+  0.626691043376923f, 0.483683139085770f, 0.627061963081360f, 0.483585834503174f,
+  0.627432823181152f, 0.483488231897354f, 0.627803623676300f, 0.483390361070633f,
+  0.628174364566803f, 0.483292192220688f, 0.628544986248016f, 0.483193725347519f,
+  0.628915548324585f, 0.483094990253448f, 0.629286050796509f, 0.482995986938477f,
+  0.629656434059143f, 0.482896685600281f, 0.630026817321777f, 0.482797086238861f,
+  0.630397081375122f, 0.482697218656540f, 0.630767226219177f, 0.482597053050995f,
+  0.631137371063232f, 0.482496619224548f, 0.631507396697998f, 0.482395917177200f,
+  0.631877362728119f, 0.482294887304306f, 0.632247209548950f, 0.482193619012833f,
+  0.632616996765137f, 0.482092022895813f, 0.632986724376678f, 0.481990188360214f,
+  0.633356392383575f, 0.481888025999069f, 0.633725941181183f, 0.481785595417023f,
+  0.634095430374146f, 0.481682896614075f, 0.634464859962463f, 0.481579899787903f,
+  0.634834170341492f, 0.481476634740829f, 0.635203421115875f, 0.481373071670532f,
+  0.635572552680969f, 0.481269240379334f, 0.635941684246063f, 0.481165111064911f,
+  0.636310696601868f, 0.481060713529587f, 0.636679589748383f, 0.480956017971039f,
+  0.637048482894897f, 0.480851024389267f, 0.637417197227478f, 0.480745792388916f,
+  0.637785911560059f, 0.480640232563019f, 0.638154506683350f, 0.480534434318542f,
+  0.638523042201996f, 0.480428308248520f, 0.638891458511353f, 0.480321943759918f,
+  0.639259815216064f, 0.480215251445770f, 0.639628112316132f, 0.480108320713043f,
+  0.639996349811554f, 0.480001062154770f, 0.640364408493042f, 0.479893565177917f,
+  0.640732467174530f, 0.479785770177841f, 0.641100406646729f, 0.479677677154541f,
+  0.641468286514282f, 0.479569315910339f, 0.641836047172546f, 0.479460656642914f,
+  0.642203748226166f, 0.479351729154587f, 0.642571389675140f, 0.479242533445358f,
+  0.642938911914825f, 0.479133039712906f, 0.643306374549866f, 0.479023247957230f,
+  0.643673717975616f, 0.478913217782974f, 0.644041001796722f, 0.478802859783173f,
+  0.644408226013184f, 0.478692263364792f, 0.644775331020355f, 0.478581339120865f,
+  0.645142316818237f, 0.478470176458359f, 0.645509302616119f, 0.478358715772629f,
+  0.645876109600067f, 0.478246957063675f, 0.646242916584015f, 0.478134930133820f,
+  0.646609604358673f, 0.478022634983063f, 0.646976172924042f, 0.477910041809082f,
+  0.647342681884766f, 0.477797180414200f, 0.647709131240845f, 0.477684020996094f,
+  0.648075461387634f, 0.477570593357086f, 0.648441672325134f, 0.477456867694855f,
+  0.648807883262634f, 0.477342873811722f, 0.649173915386200f, 0.477228611707687f,
+  0.649539887905121f, 0.477114051580429f, 0.649905800819397f, 0.476999223232269f,
+  0.650271594524384f, 0.476884096860886f, 0.650637328624725f, 0.476768702268600f,
+  0.651003003120422f, 0.476653009653091f, 0.651368498802185f, 0.476537048816681f,
+  0.651733994483948f, 0.476420819759369f, 0.652099311351776f, 0.476304292678833f,
+  0.652464628219604f, 0.476187497377396f, 0.652829825878143f, 0.476070433855057f,
+  0.653194904327393f, 0.475953072309494f, 0.653559923171997f, 0.475835442543030f,
+  0.653924822807312f, 0.475717514753342f, 0.654289662837982f, 0.475599318742752f,
+  0.654654383659363f, 0.475480824708939f, 0.655019044876099f, 0.475362062454224f,
+  0.655383586883545f, 0.475243031978607f, 0.655748009681702f, 0.475123733282089f,
+  0.656112432479858f, 0.475004136562347f, 0.656476676464081f, 0.474884241819382f,
+  0.656840860843658f, 0.474764078855515f, 0.657204985618591f, 0.474643647670746f,
+  0.657568991184235f, 0.474522948265076f, 0.657932877540588f, 0.474401950836182f,
+  0.658296704292297f, 0.474280685186386f, 0.658660411834717f, 0.474159121513367f,
+  0.659024059772491f, 0.474037289619446f, 0.659387588500977f, 0.473915189504623f,
+  0.659750998020172f, 0.473792791366577f, 0.660114347934723f, 0.473670125007629f,
+  0.660477638244629f, 0.473547190427780f, 0.660840749740601f, 0.473423957824707f,
+  0.661203861236572f, 0.473300457000732f, 0.661566793918610f, 0.473176687955856f,
+  0.661929666996002f, 0.473052620887756f, 0.662292480468750f, 0.472928285598755f,
+  0.662655174732208f, 0.472803652286530f, 0.663017749786377f, 0.472678780555725f,
+  0.663380205631256f, 0.472553610801697f, 0.663742601871490f, 0.472428143024445f,
+  0.664104938507080f, 0.472302407026291f, 0.664467096328735f, 0.472176402807236f,
+  0.664829254150391f, 0.472050130367279f, 0.665191233158112f, 0.471923559904099f,
+  0.665553152561188f, 0.471796721220016f, 0.665914952754974f, 0.471669614315033f,
+  0.666276693344116f, 0.471542209386826f, 0.666638314723969f, 0.471414536237717f,
+  0.666999816894531f, 0.471286594867706f, 0.667361259460449f, 0.471158385276794f,
+  0.667722582817078f, 0.471029877662659f, 0.668083786964417f, 0.470901101827621f,
+  0.668444931507111f, 0.470772027969360f, 0.668805956840515f, 0.470642685890198f,
+  0.669166862964630f, 0.470513075590134f, 0.669527709484100f, 0.470383197069168f,
+  0.669888436794281f, 0.470253020524979f, 0.670249044895172f, 0.470122605562210f,
+  0.670609593391418f, 0.469991862773895f, 0.670970022678375f, 0.469860881567001f,
+  0.671330332756042f, 0.469729602336884f, 0.671690583229065f, 0.469598054885864f,
+  0.672050714492798f, 0.469466239213943f, 0.672410726547241f, 0.469334155321121f,
+  0.672770678997040f, 0.469201773405075f, 0.673130512237549f, 0.469069123268127f,
+  0.673490226268768f, 0.468936175107956f, 0.673849821090698f, 0.468802988529205f,
+  0.674209356307983f, 0.468669503927231f, 0.674568772315979f, 0.468535751104355f,
+  0.674928069114685f, 0.468401730060577f, 0.675287246704102f, 0.468267410993576f,
+  0.675646364688873f, 0.468132823705673f, 0.676005363464355f, 0.467997968196869f,
+  0.676364302635193f, 0.467862844467163f, 0.676723062992096f, 0.467727422714233f,
+  0.677081763744354f, 0.467591762542725f, 0.677440345287323f, 0.467455804347992f,
+  0.677798807621002f, 0.467319577932358f, 0.678157210350037f, 0.467183053493500f,
+  0.678515493869781f, 0.467046260833740f, 0.678873658180237f, 0.466909229755402f,
+  0.679231703281403f, 0.466771900653839f, 0.679589688777924f, 0.466634273529053f,
+  0.679947495460510f, 0.466496407985687f, 0.680305242538452f, 0.466358244419098f,
+  0.680662930011749f, 0.466219812631607f, 0.681020438671112f, 0.466081112623215f,
+  0.681377887725830f, 0.465942144393921f, 0.681735157966614f, 0.465802878141403f,
+  0.682092368602753f, 0.465663343667984f, 0.682449519634247f, 0.465523540973663f,
+  0.682806491851807f, 0.465383470058441f, 0.683163404464722f, 0.465243130922318f,
+  0.683520197868347f, 0.465102523565292f, 0.683876872062683f, 0.464961618185043f,
+  0.684233427047729f, 0.464820444583893f, 0.684589862823486f, 0.464679002761841f,
+  0.684946238994598f, 0.464537292718887f, 0.685302436351776f, 0.464395314455032f,
+  0.685658574104309f, 0.464253038167953f, 0.686014592647552f, 0.464110493659973f,
+  0.686370551586151f, 0.463967710733414f, 0.686726331710815f, 0.463824629783630f,
+  0.687082052230835f, 0.463681250810623f, 0.687437593936920f, 0.463537633419037f,
+  0.687793076038361f, 0.463393747806549f, 0.688148438930511f, 0.463249564170837f,
+  0.688503682613373f, 0.463105112314224f, 0.688858866691589f, 0.462960392236710f,
+  0.689213871955872f, 0.462815403938293f, 0.689568817615509f, 0.462670147418976f,
+  0.689923584461212f, 0.462524622678757f, 0.690278291702271f, 0.462378799915314f,
+  0.690632879734039f, 0.462232738733292f, 0.690987348556519f, 0.462086379528046f,
+  0.691341698169708f, 0.461939752101898f, 0.691695988178253f, 0.461792886257172f,
+  0.692050099372864f, 0.461645722389221f, 0.692404091358185f, 0.461498260498047f,
+  0.692758023738861f, 0.461350560188293f, 0.693111836910248f, 0.461202591657639f,
+  0.693465530872345f, 0.461054325103760f, 0.693819046020508f, 0.460905820131302f,
+  0.694172501564026f, 0.460757017135620f, 0.694525837898254f, 0.460607945919037f,
+  0.694879114627838f, 0.460458606481552f, 0.695232212543488f, 0.460309028625488f,
+  0.695585191249847f, 0.460159152746201f, 0.695938050746918f, 0.460008978843689f,
+  0.696290850639343f, 0.459858566522598f, 0.696643471717834f, 0.459707885980606f,
+  0.696996033191681f, 0.459556937217712f, 0.697348415851593f, 0.459405690431595f,
+  0.697700738906860f, 0.459254205226898f, 0.698052942752838f, 0.459102421998978f,
+  0.698404967784882f, 0.458950400352478f, 0.698756933212280f, 0.458798080682755f,
+  0.699108779430389f, 0.458645492792130f, 0.699460506439209f, 0.458492636680603f,
+  0.699812114238739f, 0.458339542150497f, 0.700163602828979f, 0.458186149597168f,
+  0.700514972209930f, 0.458032488822937f, 0.700866222381592f, 0.457878559827805f,
+  0.701217353343964f, 0.457724362611771f, 0.701568365097046f, 0.457569897174835f,
+  0.701919257640839f, 0.457415163516998f, 0.702270030975342f, 0.457260161638260f,
+  0.702620685100555f, 0.457104891538620f, 0.702971220016479f, 0.456949323415756f,
+  0.703321635723114f, 0.456793516874313f, 0.703671932220459f, 0.456637442111969f,
+  0.704022109508514f, 0.456481099128723f, 0.704372167587280f, 0.456324487924576f,
+  0.704722046852112f, 0.456167578697205f, 0.705071866512299f, 0.456010431051254f,
+  0.705421566963196f, 0.455853015184402f, 0.705771148204803f, 0.455695331096649f,
+  0.706120610237122f, 0.455537378787994f, 0.706469953060150f, 0.455379128456116f,
+  0.706819176673889f, 0.455220639705658f, 0.707168221473694f, 0.455061882734299f,
+  0.707517206668854f, 0.454902857542038f, 0.707866072654724f, 0.454743564128876f,
+  0.708214759826660f, 0.454584002494812f, 0.708563387393951f, 0.454424172639847f,
+  0.708911836147308f, 0.454264044761658f, 0.709260225296021f, 0.454103678464890f,
+  0.709608435630798f, 0.453943043947220f, 0.709956526756287f, 0.453782171010971f,
+  0.710304558277130f, 0.453621000051498f, 0.710652410984039f, 0.453459560871124f,
+  0.711000144481659f, 0.453297853469849f, 0.711347758769989f, 0.453135877847672f,
+  0.711695253849030f, 0.452973634004593f, 0.712042629718781f, 0.452811151742935f,
+  0.712389826774597f, 0.452648371458054f, 0.712736964225769f, 0.452485352754593f,
+  0.713083922863007f, 0.452322036027908f, 0.713430821895599f, 0.452158480882645f,
+  0.713777542114258f, 0.451994657516479f, 0.714124143123627f, 0.451830536127090f,
+  0.714470624923706f, 0.451666176319122f, 0.714816987514496f, 0.451501548290253f,
+  0.715163230895996f, 0.451336652040482f, 0.715509355068207f, 0.451171487569809f,
+  0.715855300426483f, 0.451006084680557f, 0.716201186180115f, 0.450840383768082f,
+  0.716546893119812f, 0.450674414634705f, 0.716892480850220f, 0.450508207082748f,
+  0.717238008975983f, 0.450341701507568f, 0.717583298683167f, 0.450174957513809f,
+  0.717928528785706f, 0.450007945299149f, 0.718273639678955f, 0.449840664863586f,
+  0.718618571758270f, 0.449673116207123f, 0.718963444232941f, 0.449505299329758f,
+  0.719308137893677f, 0.449337244033813f, 0.719652712345123f, 0.449168890714645f,
+  0.719997107982636f, 0.449000298976898f, 0.720341444015503f, 0.448831409215927f,
+  0.720685660839081f, 0.448662281036377f, 0.721029698848724f, 0.448492884635925f,
+  0.721373617649078f, 0.448323249816895f, 0.721717417240143f, 0.448153316974640f,
+  0.722061097621918f, 0.447983115911484f, 0.722404599189758f, 0.447812676429749f,
+  0.722747981548309f, 0.447641968727112f, 0.723091304302216f, 0.447470992803574f,
+  0.723434448242188f, 0.447299748659134f, 0.723777413368225f, 0.447128236293793f,
+  0.724120318889618f, 0.446956485509872f, 0.724463045597076f, 0.446784436702728f,
+  0.724805653095245f, 0.446612149477005f, 0.725148141384125f, 0.446439594030380f,
+  0.725490510463715f, 0.446266770362854f, 0.725832700729370f, 0.446093708276749f,
+  0.726174771785736f, 0.445920348167419f, 0.726516723632813f, 0.445746749639511f,
+  0.726858556270599f, 0.445572882890701f, 0.727200269699097f, 0.445398747920990f,
+  0.727541804313660f, 0.445224374532700f, 0.727883219718933f, 0.445049703121185f,
+  0.728224515914917f, 0.444874793291092f, 0.728565633296967f, 0.444699615240097f,
+  0.728906631469727f, 0.444524168968201f, 0.729247510433197f, 0.444348484277725f,
+  0.729588270187378f, 0.444172531366348f, 0.729928910732269f, 0.443996280431747f,
+  0.730269372463226f, 0.443819820880890f, 0.730609714984894f, 0.443643063306808f,
+  0.730949878692627f, 0.443466067314148f, 0.731289982795715f, 0.443288803100586f,
+  0.731629908084869f, 0.443111270666122f, 0.731969714164734f, 0.442933470010757f,
+  0.732309341430664f, 0.442755430936813f, 0.732648849487305f, 0.442577123641968f,
+  0.732988238334656f, 0.442398548126221f, 0.733327507972717f, 0.442219734191895f,
+  0.733666598796844f, 0.442040622234344f, 0.734005570411682f, 0.441861271858215f,
+  0.734344422817230f, 0.441681683063507f, 0.734683096408844f, 0.441501796245575f,
+  0.735021650791168f, 0.441321671009064f, 0.735360085964203f, 0.441141277551651f,
+  0.735698342323303f, 0.440960645675659f, 0.736036539077759f, 0.440779715776443f,
+  0.736374497413635f, 0.440598547458649f, 0.736712396144867f, 0.440417140722275f,
+  0.737050116062164f, 0.440235435962677f, 0.737387716770172f, 0.440053492784500f,
+  0.737725138664246f, 0.439871311187744f, 0.738062441349030f, 0.439688831567764f,
+  0.738399624824524f, 0.439506113529205f, 0.738736629486084f, 0.439323127269745f,
+  0.739073514938354f, 0.439139902591705f, 0.739410281181335f, 0.438956409692764f,
+  0.739746868610382f, 0.438772648572922f, 0.740083336830139f, 0.438588619232178f,
+  0.740419685840607f, 0.438404351472855f, 0.740755856037140f, 0.438219845294952f,
+  0.741091907024384f, 0.438035041093826f, 0.741427779197693f, 0.437849998474121f,
+  0.741763532161713f, 0.437664687633514f, 0.742099165916443f, 0.437479138374329f,
+  0.742434620857239f, 0.437293320894241f, 0.742769956588745f, 0.437107264995575f,
+  0.743105113506317f, 0.436920911073685f, 0.743440151214600f, 0.436734348535538f,
+  0.743775069713593f, 0.436547487974167f, 0.744109809398651f, 0.436360388994217f,
+  0.744444429874420f, 0.436173021793365f, 0.744778931140900f, 0.435985416173935f,
+  0.745113253593445f, 0.435797542333603f, 0.745447397232056f, 0.435609430074692f,
+  0.745781481266022f, 0.435421019792557f, 0.746115326881409f, 0.435232400894165f,
+  0.746449112892151f, 0.435043483972549f, 0.746782720088959f, 0.434854328632355f,
+  0.747116148471832f, 0.434664934873581f, 0.747449457645416f, 0.434475272893906f,
+  0.747782647609711f, 0.434285342693329f, 0.748115658760071f, 0.434095174074173f,
+  0.748448550701141f, 0.433904737234116f, 0.748781263828278f, 0.433714061975479f,
+  0.749113857746124f, 0.433523118495941f, 0.749446272850037f, 0.433331936597824f,
+  0.749778568744659f, 0.433140486478806f, 0.750110685825348f, 0.432948768138886f,
+  0.750442683696747f, 0.432756811380386f, 0.750774562358856f, 0.432564586400986f,
+  0.751106262207031f, 0.432372123003006f, 0.751437783241272f, 0.432179391384125f,
+  0.751769185066223f, 0.431986421346664f, 0.752100467681885f, 0.431793183088303f,
+  0.752431571483612f, 0.431599706411362f, 0.752762496471405f, 0.431405961513519f,
+  0.753093302249908f, 0.431211978197098f, 0.753423988819122f, 0.431017726659775f,
+  0.753754496574402f, 0.430823236703873f, 0.754084885120392f, 0.430628478527069f,
+  0.754415094852448f, 0.430433481931686f, 0.754745125770569f, 0.430238217115402f,
+  0.755075037479401f, 0.430042684078217f, 0.755404829978943f, 0.429846942424774f,
+  0.755734443664551f, 0.429650902748108f, 0.756063878536224f, 0.429454624652863f,
+  0.756393194198608f, 0.429258108139038f, 0.756722390651703f, 0.429061323404312f,
+  0.757051348686218f, 0.428864300251007f, 0.757380247116089f, 0.428667008876801f,
+  0.757708966732025f, 0.428469479084015f, 0.758037507534027f, 0.428271710872650f,
+  0.758365929126740f, 0.428073674440384f, 0.758694171905518f, 0.427875369787216f,
+  0.759022235870361f, 0.427676826715469f, 0.759350180625916f, 0.427478045225143f,
+  0.759678006172180f, 0.427278995513916f, 0.760005652904511f, 0.427079707384110f,
+  0.760333120822906f, 0.426880151033401f, 0.760660469532013f, 0.426680356264114f,
+  0.760987639427185f, 0.426480293273926f, 0.761314690113068f, 0.426279991865158f,
+  0.761641561985016f, 0.426079452037811f, 0.761968255043030f, 0.425878643989563f,
+  0.762294828891754f, 0.425677597522736f, 0.762621283531189f, 0.425476282835007f,
+  0.762947499752045f, 0.425274729728699f, 0.763273596763611f, 0.425072938203812f,
+  0.763599574565887f, 0.424870878458023f, 0.763925373554230f, 0.424668580293655f,
+  0.764250993728638f, 0.424466013908386f, 0.764576494693756f, 0.424263238906860f,
+  0.764901816844940f, 0.424060165882111f, 0.765226960182190f, 0.423856884241104f,
+  0.765551984310150f, 0.423653304576874f, 0.765876889228821f, 0.423449516296387f,
+  0.766201555728912f, 0.423245459794998f, 0.766526103019714f, 0.423041164875031f,
+  0.766850471496582f, 0.422836631536484f, 0.767174720764160f, 0.422631829977036f,
+  0.767498791217804f, 0.422426789999008f, 0.767822742462158f, 0.422221481800079f,
+  0.768146514892578f, 0.422015935182571f, 0.768470108509064f, 0.421810150146484f,
+  0.768793523311615f, 0.421604126691818f, 0.769116818904877f, 0.421397835016251f,
+  0.769439935684204f, 0.421191304922104f, 0.769762933254242f, 0.420984506607056f,
+  0.770085752010345f, 0.420777499675751f, 0.770408391952515f, 0.420570224523544f,
+  0.770730912685394f, 0.420362681150436f, 0.771053194999695f, 0.420154929161072f,
+  0.771375417709351f, 0.419946908950806f, 0.771697402000427f, 0.419738620519638f,
+  0.772019267082214f, 0.419530123472214f, 0.772340953350067f, 0.419321358203888f,
+  0.772662520408630f, 0.419112354516983f, 0.772983849048615f, 0.418903112411499f,
+  0.773305058479309f, 0.418693602085114f, 0.773626148700714f, 0.418483853340149f,
+  0.773947000503540f, 0.418273866176605f, 0.774267733097076f, 0.418063640594482f,
+  0.774588346481323f, 0.417853146791458f, 0.774908721446991f, 0.417642414569855f,
+  0.775228977203369f, 0.417431443929672f, 0.775549054145813f, 0.417220205068588f,
+  0.775869011878967f, 0.417008757591248f, 0.776188731193542f, 0.416797041893005f,
+  0.776508331298828f, 0.416585087776184f, 0.776827812194824f, 0.416372895240784f,
+  0.777147054672241f, 0.416160434484482f, 0.777466177940369f, 0.415947735309601f,
+  0.777785122394562f, 0.415734797716141f, 0.778103888034821f, 0.415521621704102f,
+  0.778422534465790f, 0.415308207273483f, 0.778741002082825f, 0.415094524621964f,
+  0.779059290885925f, 0.414880603551865f, 0.779377400875092f, 0.414666473865509f,
+  0.779695332050323f, 0.414452046155930f, 0.780013144016266f, 0.414237409830093f,
+  0.780330777168274f, 0.414022535085678f, 0.780648231506348f, 0.413807392120361f,
+  0.780965566635132f, 0.413592010736465f, 0.781282722949982f, 0.413376390933990f,
+  0.781599700450897f, 0.413160532712936f, 0.781916499137878f, 0.412944436073303f,
+  0.782233119010925f, 0.412728071212769f, 0.782549619674683f, 0.412511497735977f,
+  0.782865881919861f, 0.412294656038284f, 0.783182024955750f, 0.412077575922012f,
+  0.783498048782349f, 0.411860257387161f, 0.783813834190369f, 0.411642700433731f,
+  0.784129500389099f, 0.411424905061722f, 0.784444928169250f, 0.411206841468811f,
+  0.784760236740112f, 0.410988569259644f, 0.785075426101685f, 0.410770028829575f,
+  0.785390377044678f, 0.410551249980927f, 0.785705149173737f, 0.410332232713699f,
+  0.786019802093506f, 0.410112977027893f, 0.786334276199341f, 0.409893482923508f,
+  0.786648571491241f, 0.409673750400543f, 0.786962687969208f, 0.409453779459000f,
+  0.787276685237885f, 0.409233570098877f, 0.787590444087982f, 0.409013092517853f,
+  0.787904083728790f, 0.408792406320572f, 0.788217544555664f, 0.408571451902390f,
+  0.788530826568604f, 0.408350288867950f, 0.788843929767609f, 0.408128857612610f,
+  0.789156913757324f, 0.407907217741013f, 0.789469659328461f, 0.407685309648514f,
+  0.789782285690308f, 0.407463163137436f, 0.790094733238220f, 0.407240778207779f,
+  0.790407001972198f, 0.407018154859543f, 0.790719091892242f, 0.406795293092728f,
+  0.791031002998352f, 0.406572192907333f, 0.791342735290527f, 0.406348884105682f,
+  0.791654348373413f, 0.406125307083130f, 0.791965723037720f, 0.405901491641998f,
+  0.792276978492737f, 0.405677437782288f, 0.792588055133820f, 0.405453115701675f,
+  0.792898952960968f, 0.405228585004807f, 0.793209671974182f, 0.405003815889359f,
+  0.793520212173462f, 0.404778808355331f, 0.793830573558807f, 0.404553562402725f,
+  0.794140756130219f, 0.404328078031540f, 0.794450819492340f, 0.404102355241776f,
+  0.794760644435883f, 0.403876423835754f, 0.795070350170136f, 0.403650224208832f,
+  0.795379877090454f, 0.403423786163330f, 0.795689165592194f, 0.403197109699249f,
+  0.795998334884644f, 0.402970194816589f, 0.796307325363159f, 0.402743041515350f,
+  0.796616137027740f, 0.402515679597855f, 0.796924769878387f, 0.402288049459457f,
+  0.797233223915100f, 0.402060180902481f, 0.797541558742523f, 0.401832103729248f,
+  0.797849655151367f, 0.401603758335114f, 0.798157572746277f, 0.401375204324722f,
+  0.798465371131897f, 0.401146411895752f, 0.798772931098938f, 0.400917351245880f,
+  0.799080371856689f, 0.400688081979752f, 0.799387574195862f, 0.400458574295044f,
+  0.799694657325745f, 0.400228828191757f, 0.800001561641693f, 0.399998843669891f,
+  0.800308227539063f, 0.399768620729446f, 0.800614774227142f, 0.399538189172745f,
+  0.800921142101288f, 0.399307489395142f, 0.801227271556854f, 0.399076581001282f,
+  0.801533281803131f, 0.398845434188843f, 0.801839113235474f, 0.398614019155502f,
+  0.802144765853882f, 0.398382395505905f, 0.802450239658356f, 0.398150533437729f,
+  0.802755534648895f, 0.397918462753296f, 0.803060650825500f, 0.397686123847961f,
+  0.803365588188171f, 0.397453576326370f, 0.803670346736908f, 0.397220760583878f,
+  0.803974866867065f, 0.396987736225128f, 0.804279267787933f, 0.396754473447800f,
+  0.804583489894867f, 0.396520972251892f, 0.804887533187866f, 0.396287262439728f,
+  0.805191397666931f, 0.396053284406662f, 0.805495083332062f, 0.395819097757339f,
+  0.805798590183258f, 0.395584672689438f, 0.806101918220520f, 0.395350009202957f,
+  0.806405067443848f, 0.395115107297897f, 0.806707978248596f, 0.394879996776581f,
+  0.807010769844055f, 0.394644618034363f, 0.807313382625580f, 0.394409030675888f,
+  0.807615816593170f, 0.394173204898834f, 0.807918012142181f, 0.393937170505524f,
+  0.808220088481903f, 0.393700867891312f, 0.808521986007690f, 0.393464356660843f,
+  0.808823645114899f, 0.393227607011795f, 0.809125185012817f, 0.392990618944168f,
+  0.809426486492157f, 0.392753422260284f, 0.809727668762207f, 0.392515957355499f,
+  0.810028612613678f, 0.392278283834457f, 0.810329377651215f, 0.392040401697159f,
+  0.810629963874817f, 0.391802251338959f, 0.810930430889130f, 0.391563892364502f,
+  0.811230659484863f, 0.391325294971466f, 0.811530709266663f, 0.391086459159851f,
+  0.811830580234528f, 0.390847414731979f, 0.812130272388458f, 0.390608131885529f,
+  0.812429726123810f, 0.390368610620499f, 0.812729060649872f, 0.390128880739212f,
+  0.813028216362000f, 0.389888882637024f, 0.813327133655548f, 0.389648675918579f,
+  0.813625931739807f, 0.389408260583878f, 0.813924491405487f, 0.389167606830597f,
+  0.814222872257233f, 0.388926714658737f, 0.814521074295044f, 0.388685584068298f,
+  0.814819097518921f, 0.388444244861603f, 0.815116941928864f, 0.388202667236328f,
+  0.815414607524872f, 0.387960851192474f, 0.815712094306946f, 0.387718826532364f,
+  0.816009342670441f, 0.387476563453674f, 0.816306471824646f, 0.387234061956406f,
+  0.816603362560272f, 0.386991351842880f, 0.816900074481964f, 0.386748403310776f,
+  0.817196667194366f, 0.386505216360092f, 0.817493021488190f, 0.386261820793152f,
+  0.817789137363434f, 0.386018186807632f, 0.818085134029388f, 0.385774344205856f,
+  0.818380951881409f, 0.385530263185501f, 0.818676531314850f, 0.385285943746567f,
+  0.818971931934357f, 0.385041415691376f, 0.819267153739929f, 0.384796649217606f,
+  0.819562196731567f, 0.384551674127579f, 0.819857060909271f, 0.384306460618973f,
+  0.820151746273041f, 0.384061008691788f, 0.820446193218231f, 0.383815348148346f,
+  0.820740520954132f, 0.383569449186325f, 0.821034610271454f, 0.383323341608047f,
+  0.821328520774841f, 0.383076995611191f, 0.821622252464294f, 0.382830440998077f,
+  0.821915745735168f, 0.382583618164063f, 0.822209119796753f, 0.382336616516113f,
+  0.822502255439758f, 0.382089376449585f, 0.822795212268829f, 0.381841897964478f,
+  0.823087990283966f, 0.381594210863113f, 0.823380589485168f, 0.381346285343170f,
+  0.823673009872437f, 0.381098151206970f, 0.823965191841125f, 0.380849778652191f,
+  0.824257194995880f, 0.380601197481155f, 0.824549019336700f, 0.380352377891541f,
+  0.824840664863586f, 0.380103349685669f, 0.825132071971893f, 0.379854083061218f,
+  0.825423359870911f, 0.379604607820511f, 0.825714409351349f, 0.379354894161224f,
+  0.826005280017853f, 0.379104942083359f, 0.826295912265778f, 0.378854811191559f,
+  0.826586425304413f, 0.378604412078857f, 0.826876699924469f, 0.378353834152222f,
+  0.827166795730591f, 0.378102988004684f, 0.827456712722778f, 0.377851963043213f,
+  0.827746450901031f, 0.377600699663162f, 0.828035950660706f, 0.377349197864532f,
+  0.828325271606445f, 0.377097487449646f, 0.828614413738251f, 0.376845568418503f,
+  0.828903317451477f, 0.376593410968781f, 0.829192101955414f, 0.376341015100479f,
+  0.829480648040771f, 0.376088410615921f, 0.829769015312195f, 0.375835597515106f,
+  0.830057144165039f, 0.375582575798035f, 0.830345153808594f, 0.375329315662384f,
+  0.830632925033569f, 0.375075817108154f, 0.830920517444611f, 0.374822109937668f,
+  0.831207871437073f, 0.374568194150925f, 0.831495106220245f, 0.374314039945602f,
+  0.831782102584839f, 0.374059677124023f, 0.832068860530853f, 0.373805105686188f,
+  0.832355499267578f, 0.373550295829773f, 0.832641899585724f, 0.373295277357101f,
+  0.832928121089935f, 0.373040050268173f, 0.833214163780212f, 0.372784584760666f,
+  0.833499968051910f, 0.372528880834579f, 0.833785593509674f, 0.372272998094559f,
+  0.834071040153503f, 0.372016876935959f, 0.834356248378754f, 0.371760547161102f,
+  0.834641277790070f, 0.371503978967667f, 0.834926128387451f, 0.371247202157974f,
+  0.835210800170898f, 0.370990216732025f, 0.835495233535767f, 0.370732992887497f,
+  0.835779488086700f, 0.370475560426712f, 0.836063504219055f, 0.370217919349670f,
+  0.836347401142120f, 0.369960039854050f, 0.836631059646606f, 0.369701951742172f,
+  0.836914479732513f, 0.369443655014038f, 0.837197780609131f, 0.369185149669647f,
+  0.837480843067169f, 0.368926405906677f, 0.837763667106628f, 0.368667453527451f,
+  0.838046371936798f, 0.368408292531967f, 0.838328838348389f, 0.368148893117905f,
+  0.838611066341400f, 0.367889285087585f, 0.838893175125122f, 0.367629468441010f,
+  0.839175045490265f, 0.367369443178177f, 0.839456677436829f, 0.367109179496765f,
+  0.839738130569458f, 0.366848707199097f, 0.840019404888153f, 0.366588026285172f,
+  0.840300500392914f, 0.366327136754990f, 0.840581357479095f, 0.366066008806229f,
+  0.840862035751343f, 0.365804702043533f, 0.841142535209656f, 0.365543156862259f,
+  0.841422796249390f, 0.365281373262405f, 0.841702818870544f, 0.365019410848618f,
+  0.841982722282410f, 0.364757210016251f, 0.842262387275696f, 0.364494800567627f,
+  0.842541813850403f, 0.364232182502747f, 0.842821121215820f, 0.363969355821610f,
+  0.843100130558014f, 0.363706320524216f, 0.843379020690918f, 0.363443046808243f,
+  0.843657672405243f, 0.363179564476013f, 0.843936145305634f, 0.362915903329849f,
+  0.844214379787445f, 0.362651973962784f, 0.844492435455322f, 0.362387865781784f,
+  0.844770252704620f, 0.362123548984528f, 0.845047891139984f, 0.361858993768692f,
+  0.845325350761414f, 0.361594229936600f, 0.845602571964264f, 0.361329287290573f,
+  0.845879614353180f, 0.361064106225967f, 0.846156477928162f, 0.360798716545105f,
+  0.846433103084564f, 0.360533088445663f, 0.846709489822388f, 0.360267281532288f,
+  0.846985757350922f, 0.360001266002655f, 0.847261726856232f, 0.359735012054443f,
+  0.847537577152252f, 0.359468549489975f, 0.847813189029694f, 0.359201908111572f,
+  0.848088562488556f, 0.358935028314590f, 0.848363757133484f, 0.358667939901352f,
+  0.848638772964478f, 0.358400642871857f, 0.848913550376892f, 0.358133137226105f,
+  0.849188148975372f, 0.357865422964096f, 0.849462509155273f, 0.357597470283508f,
+  0.849736690521240f, 0.357329338788986f, 0.850010633468628f, 0.357060998678207f,
+  0.850284397602081f, 0.356792420148849f, 0.850557923316956f, 0.356523662805557f,
+  0.850831270217896f, 0.356254696846008f, 0.851104438304901f, 0.355985492467880f,
+  0.851377367973328f, 0.355716109275818f, 0.851650118827820f, 0.355446487665176f,
+  0.851922631263733f, 0.355176687240601f, 0.852194905281067f, 0.354906648397446f,
+  0.852467060089111f, 0.354636400938034f, 0.852738916873932f, 0.354365974664688f,
+  0.853010654449463f, 0.354095309972763f, 0.853282094001770f, 0.353824466466904f,
+  0.853553414344788f, 0.353553384542465f, 0.853824436664581f, 0.353282123804092f,
+  0.854095339775085f, 0.353010624647141f, 0.854365944862366f, 0.352738946676254f,
+  0.854636430740356f, 0.352467030286789f, 0.854906618595123f, 0.352194935083389f,
+  0.855176687240601f, 0.351922631263733f, 0.855446517467499f, 0.351650089025497f,
+  0.855716109275818f, 0.351377367973328f, 0.855985522270203f, 0.351104438304901f,
+  0.856254696846008f, 0.350831300020218f, 0.856523692607880f, 0.350557953119278f,
+  0.856792449951172f, 0.350284397602081f, 0.857060968875885f, 0.350010633468628f,
+  0.857329368591309f, 0.349736660718918f, 0.857597470283508f, 0.349462509155273f,
+  0.857865393161774f, 0.349188119173050f, 0.858133137226105f, 0.348913550376892f,
+  0.858400642871857f, 0.348638743162155f, 0.858667910099030f, 0.348363757133484f,
+  0.858934998512268f, 0.348088562488556f, 0.859201908111572f, 0.347813159227371f,
+  0.859468579292297f, 0.347537547349930f, 0.859735012054443f, 0.347261756658554f,
+  0.860001266002655f, 0.346985727548599f, 0.860267281532288f, 0.346709519624710f,
+  0.860533118247986f, 0.346433073282242f, 0.860798716545105f, 0.346156448125839f,
+  0.861064076423645f, 0.345879614353180f, 0.861329257488251f, 0.345602601766586f,
+  0.861594259738922f, 0.345325350761414f, 0.861859023571014f, 0.345047920942307f,
+  0.862123548984528f, 0.344770282506943f, 0.862387895584106f, 0.344492435455322f,
+  0.862652003765106f, 0.344214379787445f, 0.862915873527527f, 0.343936115503311f,
+  0.863179564476013f, 0.343657672405243f, 0.863443076610565f, 0.343379020690918f,
+  0.863706290721893f, 0.343100160360336f, 0.863969385623932f, 0.342821091413498f,
+  0.864232182502747f, 0.342541843652725f, 0.864494800567627f, 0.342262357473373f,
+  0.864757239818573f, 0.341982692480087f, 0.865019381046295f, 0.341702848672867f,
+  0.865281403064728f, 0.341422766447067f, 0.865543127059937f, 0.341142505407333f,
+  0.865804672241211f, 0.340862035751343f, 0.866066038608551f, 0.340581357479095f,
+  0.866327106952667f, 0.340300500392914f, 0.866588056087494f, 0.340019434690475f,
+  0.866848707199097f, 0.339738160371780f, 0.867109179496765f, 0.339456677436829f,
+  0.867369413375854f, 0.339175015687943f, 0.867629468441010f, 0.338893145322800f,
+  0.867889285087585f, 0.338611096143723f, 0.868148922920227f, 0.338328808546066f,
+  0.868408262729645f, 0.338046342134476f, 0.868667483329773f, 0.337763696908951f,
+  0.868926405906677f, 0.337480813264847f, 0.869185149669647f, 0.337197750806808f,
+  0.869443655014038f, 0.336914509534836f, 0.869701981544495f, 0.336631029844284f,
+  0.869960069656372f, 0.336347371339798f, 0.870217919349670f, 0.336063534021378f,
+  0.870475590229034f, 0.335779488086700f, 0.870733022689819f, 0.335495233535767f,
+  0.870990216732025f, 0.335210770368576f, 0.871247172355652f, 0.334926128387451f,
+  0.871503949165344f, 0.334641307592392f, 0.871760547161102f, 0.334356248378754f,
+  0.872016847133636f, 0.334071010351181f, 0.872272968292236f, 0.333785593509674f,
+  0.872528910636902f, 0.333499968051910f, 0.872784554958344f, 0.333214133977890f,
+  0.873040020465851f, 0.332928121089935f, 0.873295307159424f, 0.332641899585724f,
+  0.873550295829773f, 0.332355499267578f, 0.873805105686188f, 0.332068890333176f,
+  0.874059677124023f, 0.331782072782516f, 0.874314069747925f, 0.331495076417923f,
+  0.874568223953247f, 0.331207901239395f, 0.874822139739990f, 0.330920487642288f,
+  0.875075817108154f, 0.330632925033569f, 0.875329315662384f, 0.330345153808594f,
+  0.875582575798035f, 0.330057173967361f, 0.875835597515106f, 0.329769015312195f,
+  0.876088440418243f, 0.329480648040771f, 0.876341044902802f, 0.329192101955414f,
+  0.876593410968781f, 0.328903347253799f, 0.876845538616180f, 0.328614413738251f,
+  0.877097487449646f, 0.328325271606445f, 0.877349197864532f, 0.328035950660706f,
+  0.877600669860840f, 0.327746421098709f, 0.877851963043213f, 0.327456712722778f,
+  0.878103017807007f, 0.327166795730591f, 0.878353834152222f, 0.326876699924469f,
+  0.878604412078857f, 0.326586425304413f, 0.878854811191559f, 0.326295942068100f,
+  0.879104971885681f, 0.326005280017853f, 0.879354894161224f, 0.325714409351349f,
+  0.879604578018188f, 0.325423330068588f, 0.879854083061218f, 0.325132101774216f,
+  0.880103349685669f, 0.324840664863586f, 0.880352377891541f, 0.324549019336700f,
+  0.880601167678833f, 0.324257194995880f, 0.880849778652191f, 0.323965191841125f,
+  0.881098151206970f, 0.323672980070114f, 0.881346285343170f, 0.323380589485168f,
+  0.881594181060791f, 0.323088020086288f, 0.881841897964478f, 0.322795242071152f,
+  0.882089376449585f, 0.322502255439758f, 0.882336616516113f, 0.322209119796753f,
+  0.882583618164063f, 0.321915775537491f, 0.882830440998077f, 0.321622252464294f,
+  0.883076965808868f, 0.321328520774841f, 0.883323311805725f, 0.321034610271454f,
+  0.883569478988647f, 0.320740520954132f, 0.883815348148346f, 0.320446223020554f,
+  0.884061038494110f, 0.320151746273041f, 0.884306430816650f, 0.319857090711594f,
+  0.884551644325256f, 0.319562226533890f, 0.884796679019928f, 0.319267183542252f,
+  0.885041415691376f, 0.318971961736679f, 0.885285973548889f, 0.318676531314850f,
+  0.885530233383179f, 0.318380922079086f, 0.885774314403534f, 0.318085134029388f,
+  0.886018216609955f, 0.317789167165756f, 0.886261820793152f, 0.317492991685867f,
+  0.886505246162415f, 0.317196637392044f, 0.886748373508453f, 0.316900104284287f,
+  0.886991322040558f, 0.316603392362595f, 0.887234091758728f, 0.316306471824646f,
+  0.887476563453674f, 0.316009372472763f, 0.887718796730042f, 0.315712094306946f,
+  0.887960851192474f, 0.315414607524872f, 0.888202667236328f, 0.315116971731186f,
+  0.888444244861603f, 0.314819127321243f, 0.888685584068298f, 0.314521104097366f,
+  0.888926684856415f, 0.314222872257233f, 0.889167606830597f, 0.313924491405487f,
+  0.889408230781555f, 0.313625901937485f, 0.889648675918579f, 0.313327133655548f,
+  0.889888882637024f, 0.313028186559677f, 0.890128850936890f, 0.312729060649872f,
+  0.890368640422821f, 0.312429755926132f, 0.890608131885529f, 0.312130242586136f,
+  0.890847444534302f, 0.311830550432205f, 0.891086459159851f, 0.311530679464340f,
+  0.891325294971466f, 0.311230629682541f, 0.891563892364502f, 0.310930401086807f,
+  0.891802251338959f, 0.310629993677139f, 0.892040371894836f, 0.310329377651215f,
+  0.892278313636780f, 0.310028612613678f, 0.892515957355499f, 0.309727638959885f,
+  0.892753422260284f, 0.309426486492157f, 0.892990648746490f, 0.309125155210495f,
+  0.893227577209473f, 0.308823645114899f, 0.893464326858521f, 0.308521956205368f,
+  0.893700897693634f, 0.308220088481903f, 0.893937170505524f, 0.307918041944504f,
+  0.894173204898834f, 0.307615786790848f, 0.894409060478210f, 0.307313382625580f,
+  0.894644618034363f, 0.307010769844055f, 0.894879996776581f, 0.306708008050919f,
+  0.895115137100220f, 0.306405037641525f, 0.895349979400635f, 0.306101888418198f,
+  0.895584642887115f, 0.305798590183258f, 0.895819067955017f, 0.305495083332062f,
+  0.896053314208984f, 0.305191397666931f, 0.896287262439728f, 0.304887533187866f,
+  0.896520972251892f, 0.304583519697189f, 0.896754503250122f, 0.304279297590256f,
+  0.896987736225128f, 0.303974896669388f, 0.897220790386200f, 0.303670316934586f,
+  0.897453546524048f, 0.303365558385849f, 0.897686123847961f, 0.303060621023178f,
+  0.897918462753296f, 0.302755534648895f, 0.898150563240051f, 0.302450239658356f,
+  0.898382425308228f, 0.302144765853882f, 0.898614048957825f, 0.301839113235474f,
+  0.898845434188843f, 0.301533311605453f, 0.899076581001282f, 0.301227301359177f,
+  0.899307489395142f, 0.300921112298965f, 0.899538159370422f, 0.300614774227142f,
+  0.899768650531769f, 0.300308227539063f, 0.899998843669891f, 0.300001531839371f,
+  0.900228857994080f, 0.299694657325745f, 0.900458574295044f, 0.299387603998184f,
+  0.900688111782074f, 0.299080342054367f, 0.900917351245880f, 0.298772931098938f,
+  0.901146411895752f, 0.298465341329575f, 0.901375174522400f, 0.298157602548599f,
+  0.901603758335114f, 0.297849655151367f, 0.901832103729248f, 0.297541528940201f,
+  0.902060210704803f, 0.297233253717422f, 0.902288019657135f, 0.296924799680710f,
+  0.902515649795532f, 0.296616137027740f, 0.902743041515350f, 0.296307325363159f,
+  0.902970194816589f, 0.295998334884644f, 0.903197109699249f, 0.295689195394516f,
+  0.903423786163330f, 0.295379847288132f, 0.903650224208832f, 0.295070350170136f,
+  0.903876423835754f, 0.294760644435883f, 0.904102385044098f, 0.294450789690018f,
+  0.904328107833862f, 0.294140785932541f, 0.904553592205048f, 0.293830573558807f,
+  0.904778838157654f, 0.293520182371140f, 0.905003845691681f, 0.293209642171860f,
+  0.905228614807129f, 0.292898923158646f, 0.905453145503998f, 0.292588025331497f,
+  0.905677437782288f, 0.292276978492737f, 0.905901491641998f, 0.291965723037720f,
+  0.906125307083130f, 0.291654318571091f, 0.906348884105682f, 0.291342735290527f,
+  0.906572222709656f, 0.291031002998352f, 0.906795322895050f, 0.290719062089920f,
+  0.907018184661865f, 0.290406972169876f, 0.907240808010101f, 0.290094703435898f,
+  0.907463192939758f, 0.289782285690308f, 0.907685279846191f, 0.289469659328461f,
+  0.907907187938690f, 0.289156883955002f, 0.908128857612610f, 0.288843959569931f,
+  0.908350288867950f, 0.288530826568604f, 0.908571481704712f, 0.288217544555664f,
+  0.908792436122894f, 0.287904083728790f, 0.909013092517853f, 0.287590473890305f,
+  0.909233570098877f, 0.287276685237885f, 0.909453809261322f, 0.286962717771530f,
+  0.909673750400543f, 0.286648571491241f, 0.909893512725830f, 0.286334276199341f,
+  0.910112977027893f, 0.286019802093506f, 0.910332262516022f, 0.285705178976059f,
+  0.910551249980927f, 0.285390377044678f, 0.910769999027252f, 0.285075396299362f,
+  0.910988569259644f, 0.284760266542435f, 0.911206841468811f, 0.284444957971573f,
+  0.911424875259399f, 0.284129470586777f, 0.911642670631409f, 0.283813834190369f,
+  0.911860227584839f, 0.283498018980026f, 0.912077546119690f, 0.283182054758072f,
+  0.912294626235962f, 0.282865911722183f, 0.912511467933655f, 0.282549589872360f,
+  0.912728071212769f, 0.282233119010925f, 0.912944436073303f, 0.281916469335556f,
+  0.913160502910614f, 0.281599670648575f, 0.913376390933990f, 0.281282693147659f,
+  0.913592040538788f, 0.280965566635132f, 0.913807392120361f, 0.280648261308670f,
+  0.914022505283356f, 0.280330777168274f, 0.914237439632416f, 0.280013144016266f,
+  0.914452075958252f, 0.279695361852646f, 0.914666473865509f, 0.279377400875092f,
+  0.914880633354187f, 0.279059261083603f, 0.915094554424286f, 0.278740972280502f,
+  0.915308177471161f, 0.278422504663467f, 0.915521621704102f, 0.278103888034821f,
+  0.915734827518463f, 0.277785122394562f, 0.915947735309601f, 0.277466177940369f,
+  0.916160404682159f, 0.277147054672241f, 0.916372895240784f, 0.276827782392502f,
+  0.916585087776184f, 0.276508361101151f, 0.916797041893005f, 0.276188760995865f,
+  0.917008757591248f, 0.275868982076645f, 0.917220234870911f, 0.275549083948135f,
+  0.917431414127350f, 0.275228977203369f, 0.917642414569855f, 0.274908751249313f,
+  0.917853116989136f, 0.274588316679001f, 0.918063640594482f, 0.274267762899399f,
+  0.918273866176605f, 0.273947030305862f, 0.918483853340149f, 0.273626148700714f,
+  0.918693602085114f, 0.273305088281631f, 0.918903112411499f, 0.272983878850937f,
+  0.919112324714661f, 0.272662490606308f, 0.919321358203888f, 0.272340953350067f,
+  0.919530093669891f, 0.272019267082214f, 0.919738650321960f, 0.271697402000427f,
+  0.919946908950806f, 0.271375387907028f, 0.920154929161072f, 0.271053224802017f,
+  0.920362710952759f, 0.270730882883072f, 0.920570194721222f, 0.270408391952515f,
+  0.920777499675751f, 0.270085722208023f, 0.920984506607056f, 0.269762933254242f,
+  0.921191275119781f, 0.269439965486526f, 0.921397805213928f, 0.269116818904877f,
+  0.921604096889496f, 0.268793523311615f, 0.921810150146484f, 0.268470078706741f,
+  0.922015964984894f, 0.268146485090256f, 0.922221481800079f, 0.267822742462158f,
+  0.922426760196686f, 0.267498821020126f, 0.922631800174713f, 0.267174720764160f,
+  0.922836601734161f, 0.266850501298904f, 0.923041164875031f, 0.266526103019714f,
+  0.923245489597321f, 0.266201555728912f, 0.923449516296387f, 0.265876859426498f,
+  0.923653304576874f, 0.265552014112473f, 0.923856854438782f, 0.265226989984512f,
+  0.924060165882111f, 0.264901816844940f, 0.924263238906860f, 0.264576494693756f,
+  0.924466013908386f, 0.264250993728638f, 0.924668610095978f, 0.263925373554230f,
+  0.924870908260345f, 0.263599574565887f, 0.925072908401489f, 0.263273626565933f,
+  0.925274729728699f, 0.262947499752045f, 0.925476312637329f, 0.262621253728867f,
+  0.925677597522736f, 0.262294828891754f, 0.925878643989563f, 0.261968284845352f,
+  0.926079452037811f, 0.261641561985016f, 0.926280021667480f, 0.261314690113068f,
+  0.926480293273926f, 0.260987639427185f, 0.926680326461792f, 0.260660469532013f,
+  0.926880121231079f, 0.260333120822906f, 0.927079677581787f, 0.260005623102188f,
+  0.927278995513916f, 0.259678006172180f, 0.927478015422821f, 0.259350210428238f,
+  0.927676856517792f, 0.259022265672684f, 0.927875399589539f, 0.258694142103195f,
+  0.928073644638062f, 0.258365899324417f, 0.928271710872650f, 0.258037507534027f,
+  0.928469479084015f, 0.257708936929703f, 0.928667008876801f, 0.257380217313766f,
+  0.928864300251007f, 0.257051378488541f, 0.929061353206635f, 0.256722360849380f,
+  0.929258108139038f, 0.256393194198608f, 0.929454624652863f, 0.256063878536224f,
+  0.929650902748108f, 0.255734413862228f, 0.929846942424774f, 0.255404800176620f,
+  0.930042684078217f, 0.255075037479401f, 0.930238187313080f, 0.254745125770569f,
+  0.930433452129364f, 0.254415065050125f, 0.930628478527069f, 0.254084855318069f,
+  0.930823206901550f, 0.253754496574402f, 0.931017756462097f, 0.253423988819122f,
+  0.931211948394775f, 0.253093332052231f, 0.931405961513519f, 0.252762526273727f,
+  0.931599736213684f, 0.252431541681290f, 0.931793212890625f, 0.252100437879562f,
+  0.931986451148987f, 0.251769185066223f, 0.932179391384125f, 0.251437783241272f,
+  0.932372152805328f, 0.251106232404709f, 0.932564616203308f, 0.250774532556534f,
+  0.932756841182709f, 0.250442683696747f, 0.932948768138886f, 0.250110685825348f,
+  0.933140456676483f, 0.249778553843498f, 0.933331906795502f, 0.249446272850037f,
+  0.933523118495941f, 0.249113827943802f, 0.933714091777802f, 0.248781248927116f,
+  0.933904767036438f, 0.248448520898819f, 0.934095203876495f, 0.248115643858910f,
+  0.934285342693329f, 0.247782632708550f, 0.934475243091583f, 0.247449472546577f,
+  0.934664964675903f, 0.247116148471832f, 0.934854328632355f, 0.246782705187798f,
+  0.935043513774872f, 0.246449097990990f, 0.935232400894165f, 0.246115356683731f,
+  0.935421049594879f, 0.245781451463699f, 0.935609400272369f, 0.245447427034378f,
+  0.935797572135925f, 0.245113238692284f, 0.935985386371613f, 0.244778916239738f,
+  0.936173021793365f, 0.244444444775581f, 0.936360359191895f, 0.244109839200974f,
+  0.936547517776489f, 0.243775084614754f, 0.936734318733215f, 0.243440181016922f,
+  0.936920940876007f, 0.243105143308640f, 0.937107264995575f, 0.242769956588745f,
+  0.937293350696564f, 0.242434620857239f, 0.937479138374329f, 0.242099151015282f,
+  0.937664687633514f, 0.241763532161713f, 0.937849998474121f, 0.241427779197693f,
+  0.938035070896149f, 0.241091892123222f, 0.938219845294952f, 0.240755841135979f,
+  0.938404381275177f, 0.240419670939446f, 0.938588619232178f, 0.240083336830139f,
+  0.938772618770599f, 0.239746883511543f, 0.938956379890442f, 0.239410281181335f,
+  0.939139902591705f, 0.239073529839516f, 0.939323127269745f, 0.238736644387245f,
+  0.939506113529205f, 0.238399609923363f, 0.939688861370087f, 0.238062441349030f,
+  0.939871311187744f, 0.237725138664246f, 0.940053522586823f, 0.237387686967850f,
+  0.940235435962677f, 0.237050101161003f, 0.940417110919952f, 0.236712381243706f,
+  0.940598547458649f, 0.236374512314796f, 0.940779745578766f, 0.236036509275436f,
+  0.940960645675659f, 0.235698372125626f, 0.941141307353973f, 0.235360085964203f,
+  0.941321671009064f, 0.235021665692329f, 0.941501796245575f, 0.234683111310005f,
+  0.941681683063507f, 0.234344407916069f, 0.941861271858215f, 0.234005570411682f,
+  0.942040622234344f, 0.233666598796844f, 0.942219734191895f, 0.233327493071556f,
+  0.942398548126221f, 0.232988253235817f, 0.942577123641968f, 0.232648864388466f,
+  0.942755401134491f, 0.232309341430664f, 0.942933499813080f, 0.231969684362412f,
+  0.943111240863800f, 0.231629893183708f, 0.943288803100586f, 0.231289967894554f,
+  0.943466067314148f, 0.230949893593788f, 0.943643093109131f, 0.230609700083733f,
+  0.943819820880890f, 0.230269357562065f, 0.943996310234070f, 0.229928880929947f,
+  0.944172501564026f, 0.229588270187378f, 0.944348454475403f, 0.229247525334358f,
+  0.944524168968201f, 0.228906646370888f, 0.944699645042419f, 0.228565633296967f,
+  0.944874763488770f, 0.228224486112595f, 0.945049703121185f, 0.227883204817772f,
+  0.945224344730377f, 0.227541789412498f, 0.945398747920990f, 0.227200239896774f,
+  0.945572853088379f, 0.226858556270599f, 0.945746779441834f, 0.226516738533974f,
+  0.945920348167419f, 0.226174786686897f, 0.946093678474426f, 0.225832715630531f,
+  0.946266770362854f, 0.225490495562553f, 0.946439623832703f, 0.225148141384125f,
+  0.946612179279327f, 0.224805667996407f, 0.946784436702728f, 0.224463045597076f,
+  0.946956455707550f, 0.224120303988457f, 0.947128236293793f, 0.223777428269386f,
+  0.947299718856812f, 0.223434418439865f, 0.947470963001251f, 0.223091274499893f,
+  0.947641968727112f, 0.222748011350632f, 0.947812676429749f, 0.222404599189758f,
+  0.947983145713806f, 0.222061067819595f, 0.948153316974640f, 0.221717402338982f,
+  0.948323249816895f, 0.221373617649078f, 0.948492884635925f, 0.221029683947563f,
+  0.948662281036377f, 0.220685631036758f, 0.948831439018250f, 0.220341444015503f,
+  0.949000298976898f, 0.219997137784958f, 0.949168920516968f, 0.219652697443962f,
+  0.949337244033813f, 0.219308122992516f, 0.949505329132080f, 0.218963414430618f,
+  0.949673116207123f, 0.218618586659431f, 0.949840664863586f, 0.218273624777794f,
+  0.950007975101471f, 0.217928543686867f, 0.950174987316132f, 0.217583328485489f,
+  0.950341701507568f, 0.217237979173660f, 0.950508177280426f, 0.216892510652542f,
+  0.950674414634705f, 0.216546908020973f, 0.950840353965759f, 0.216201186180115f,
+  0.951006054878235f, 0.215855330228806f, 0.951171517372131f, 0.215509355068207f,
+  0.951336681842804f, 0.215163245797157f, 0.951501548290253f, 0.214817002415657f,
+  0.951666176319122f, 0.214470639824867f, 0.951830565929413f, 0.214124158024788f,
+  0.951994657516479f, 0.213777542114258f, 0.952158451080322f, 0.213430806994438f,
+  0.952322065830231f, 0.213083937764168f, 0.952485322952271f, 0.212736949324608f,
+  0.952648401260376f, 0.212389841675758f, 0.952811121940613f, 0.212042599916458f,
+  0.952973663806915f, 0.211695238947868f, 0.953135907649994f, 0.211347743868828f,
+  0.953297853469849f, 0.211000129580498f, 0.953459560871124f, 0.210652396082878f,
+  0.953620970249176f, 0.210304543375969f, 0.953782141208649f, 0.209956556558609f,
+  0.953943073749542f, 0.209608450531960f, 0.954103708267212f, 0.209260210394859f,
+  0.954264044761658f, 0.208911851048470f, 0.954424142837524f, 0.208563387393951f,
+  0.954584002494812f, 0.208214774727821f, 0.954743564128876f, 0.207866057753563f,
+  0.954902827739716f, 0.207517206668854f, 0.955061912536621f, 0.207168251276016f,
+  0.955220639705658f, 0.206819161772728f, 0.955379128456116f, 0.206469938158989f,
+  0.955537378787994f, 0.206120610237122f, 0.955695331096649f, 0.205771163105965f,
+  0.955853044986725f, 0.205421581864357f, 0.956010460853577f, 0.205071896314621f,
+  0.956167578697205f, 0.204722076654434f, 0.956324458122253f, 0.204372137784958f,
+  0.956481099128723f, 0.204022079706192f, 0.956637442111969f, 0.203671902418137f,
+  0.956793546676636f, 0.203321605920792f, 0.956949353218079f, 0.202971190214157f,
+  0.957104861736298f, 0.202620655298233f, 0.957260131835938f, 0.202270001173019f,
+  0.957415163516998f, 0.201919227838516f, 0.957569897174835f, 0.201568335294724f,
+  0.957724332809448f, 0.201217323541641f, 0.957878530025482f, 0.200866192579269f,
+  0.958032488822937f, 0.200514942407608f, 0.958186149597168f, 0.200163587927818f,
+  0.958339512348175f, 0.199812099337578f, 0.958492636680603f, 0.199460506439209f,
+  0.958645522594452f, 0.199108779430389f, 0.958798050880432f, 0.198756948113441f,
+  0.958950400352478f, 0.198404997587204f, 0.959102451801300f, 0.198052927851677f,
+  0.959254205226898f, 0.197700738906860f, 0.959405720233917f, 0.197348430752754f,
+  0.959556937217712f, 0.196996018290520f, 0.959707856178284f, 0.196643486618996f,
+  0.959858596324921f, 0.196290835738182f, 0.960008978843689f, 0.195938065648079f,
+  0.960159122943878f, 0.195585191249847f, 0.960309028625488f, 0.195232197642326f,
+  0.960458636283875f, 0.194879084825516f, 0.960607945919037f, 0.194525867700577f,
+  0.960757017135620f, 0.194172516465187f, 0.960905790328979f, 0.193819075822830f,
+  0.961054325103760f, 0.193465501070023f, 0.961202561855316f, 0.193111822009087f,
+  0.961350560188293f, 0.192758023738861f, 0.961498260498047f, 0.192404121160507f,
+  0.961645722389221f, 0.192050099372864f, 0.961792886257172f, 0.191695958375931f,
+  0.961939752101898f, 0.191341713070869f, 0.962086379528046f, 0.190987363457680f,
+  0.962232708930969f, 0.190632879734039f, 0.962378799915314f, 0.190278306603432f,
+  0.962524592876434f, 0.189923599362373f, 0.962670147418976f, 0.189568802714348f,
+  0.962815403938293f, 0.189213871955872f, 0.962960422039032f, 0.188858851790428f,
+  0.963105142116547f, 0.188503712415695f, 0.963249564170837f, 0.188148453831673f,
+  0.963393747806549f, 0.187793090939522f, 0.963537633419037f, 0.187437608838081f,
+  0.963681280612946f, 0.187082037329674f, 0.963824629783630f, 0.186726331710815f,
+  0.963967680931091f, 0.186370536684990f, 0.964110493659973f, 0.186014622449875f,
+  0.964253067970276f, 0.185658603906631f, 0.964395284652710f, 0.185302466154099f,
+  0.964537262916565f, 0.184946224093437f, 0.964679002761841f, 0.184589877724648f,
+  0.964820444583893f, 0.184233412146568f, 0.964961588382721f, 0.183876842260361f,
+  0.965102493762970f, 0.183520168066025f, 0.965243160724640f, 0.183163389563560f,
+  0.965383470058441f, 0.182806491851807f, 0.965523540973663f, 0.182449504733086f,
+  0.965663373470306f, 0.182092398405075f, 0.965802907943726f, 0.181735187768936f,
+  0.965942144393921f, 0.181377857923508f, 0.966081082820892f, 0.181020438671112f,
+  0.966219842433929f, 0.180662900209427f, 0.966358244419098f, 0.180305257439613f,
+  0.966496407985687f, 0.179947525262833f, 0.966634273529053f, 0.179589673876762f,
+  0.966771900653839f, 0.179231703281403f, 0.966909229755402f, 0.178873643279076f,
+  0.967046260833740f, 0.178515478968620f, 0.967183053493500f, 0.178157210350037f,
+  0.967319548130035f, 0.177798837423325f, 0.967455804347992f, 0.177440345287323f,
+  0.967591762542725f, 0.177081763744354f, 0.967727422714233f, 0.176723077893257f,
+  0.967862844467163f, 0.176364272832870f, 0.967997968196869f, 0.176005378365517f,
+  0.968132853507996f, 0.175646379590034f, 0.968267440795898f, 0.175287276506424f,
+  0.968401730060577f, 0.174928069114685f, 0.968535780906677f, 0.174568757414818f,
+  0.968669533729553f, 0.174209341406822f, 0.968802988529205f, 0.173849821090698f,
+  0.968936204910278f, 0.173490211367607f, 0.969069123268127f, 0.173130482435226f,
+  0.969201743602753f, 0.172770664095879f, 0.969334125518799f, 0.172410741448402f,
+  0.969466269016266f, 0.172050714492798f, 0.969598054885864f, 0.171690583229065f,
+  0.969729602336884f, 0.171330362558365f, 0.969860911369324f, 0.170970037579536f,
+  0.969991862773895f, 0.170609608292580f, 0.970122575759888f, 0.170249074697495f,
+  0.970253050327301f, 0.169888436794281f, 0.970383226871490f, 0.169527709484100f,
+  0.970513105392456f, 0.169166877865791f, 0.970642685890198f, 0.168805956840515f,
+  0.970772027969360f, 0.168444931507111f, 0.970901072025299f, 0.168083801865578f,
+  0.971029877662659f, 0.167722567915916f, 0.971158385276794f, 0.167361244559288f,
+  0.971286594867706f, 0.166999831795692f, 0.971414566040039f, 0.166638299822807f,
+  0.971542239189148f, 0.166276678442955f, 0.971669614315033f, 0.165914967656136f,
+  0.971796751022339f, 0.165553152561188f, 0.971923589706421f, 0.165191248059273f,
+  0.972050130367279f, 0.164829224348068f, 0.972176432609558f, 0.164467126131058f,
+  0.972302436828613f, 0.164104923605919f, 0.972428143024445f, 0.163742616772652f,
+  0.972553610801697f, 0.163380220532417f, 0.972678780555725f, 0.163017734885216f,
+  0.972803652286530f, 0.162655144929886f, 0.972928285598755f, 0.162292465567589f,
+  0.973052620887756f, 0.161929681897163f, 0.973176658153534f, 0.161566808819771f,
+  0.973300457000732f, 0.161203846335411f, 0.973423957824707f, 0.160840779542923f,
+  0.973547160625458f, 0.160477623343468f, 0.973670125007629f, 0.160114362835884f,
+  0.973792791366577f, 0.159751012921333f, 0.973915159702301f, 0.159387573599815f,
+  0.974037289619446f, 0.159024044871330f, 0.974159121513367f, 0.158660411834717f,
+  0.974280655384064f, 0.158296689391136f, 0.974401950836182f, 0.157932877540588f,
+  0.974522948265076f, 0.157568961381912f, 0.974643647670746f, 0.157204970717430f,
+  0.974764108657837f, 0.156840875744820f, 0.974884271621704f, 0.156476691365242f,
+  0.975004136562347f, 0.156112402677536f, 0.975123703479767f, 0.155748039484024f,
+  0.975243031978607f, 0.155383571982384f, 0.975362062454224f, 0.155019029974937f,
+  0.975480854511261f, 0.154654383659363f, 0.975599288940430f, 0.154289647936821f,
+  0.975717484951019f, 0.153924822807312f, 0.975835442543030f, 0.153559908270836f,
+  0.975953042507172f, 0.153194904327393f, 0.976070404052734f, 0.152829796075821f,
+  0.976187527179718f, 0.152464613318443f, 0.976304292678833f, 0.152099341154099f,
+  0.976420819759369f, 0.151733979582787f, 0.976537048816681f, 0.151368513703346f,
+  0.976653039455414f, 0.151002973318100f, 0.976768672466278f, 0.150637343525887f,
+  0.976884067058563f, 0.150271624326706f, 0.976999223232269f, 0.149905815720558f,
+  0.977114021778107f, 0.149539917707443f, 0.977228581905365f, 0.149173930287361f,
+  0.977342903614044f, 0.148807853460312f, 0.977456867694855f, 0.148441687226295f,
+  0.977570593357086f, 0.148075446486473f, 0.977684020996094f, 0.147709101438522f,
+  0.977797150611877f, 0.147342681884766f, 0.977910041809082f, 0.146976172924042f,
+  0.978022634983063f, 0.146609574556351f, 0.978134930133820f, 0.146242901682854f,
+  0.978246986865997f, 0.145876124501228f, 0.978358685970306f, 0.145509272813797f,
+  0.978470146656036f, 0.145142331719399f, 0.978581368923187f, 0.144775316119194f,
+  0.978692233562469f, 0.144408211112022f, 0.978802859783173f, 0.144041016697884f,
+  0.978913187980652f, 0.143673732876778f, 0.979023277759552f, 0.143306359648705f,
+  0.979133009910584f, 0.142938911914825f, 0.979242503643036f, 0.142571389675140f,
+  0.979351758956909f, 0.142203763127327f, 0.979460656642914f, 0.141836062073708f,
+  0.979569315910339f, 0.141468286514282f, 0.979677677154541f, 0.141100421547890f,
+  0.979785740375519f, 0.140732467174530f, 0.979893565177917f, 0.140364438295364f,
+  0.980001091957092f, 0.139996320009232f, 0.980108320713043f, 0.139628127217293f,
+  0.980215251445770f, 0.139259845018387f, 0.980321943759918f, 0.138891488313675f,
+  0.980428338050842f, 0.138523042201996f, 0.980534434318542f, 0.138154521584511f,
+  0.980640232563019f, 0.137785911560059f, 0.980745792388916f, 0.137417227029800f,
+  0.980851054191589f, 0.137048453092575f, 0.980956017971039f, 0.136679604649544f,
+  0.981060683727264f, 0.136310681700706f, 0.981165111064911f, 0.135941669344902f,
+  0.981269240379334f, 0.135572582483292f, 0.981373071670532f, 0.135203406214714f,
+  0.981476604938507f, 0.134834155440331f, 0.981579899787903f, 0.134464830160141f,
+  0.981682896614075f, 0.134095430374146f, 0.981785595417023f, 0.133725941181183f,
+  0.981888055801392f, 0.133356377482414f, 0.981990158557892f, 0.132986739277840f,
+  0.982092022895813f, 0.132617011666298f, 0.982193589210510f, 0.132247209548950f,
+  0.982294917106628f, 0.131877332925797f, 0.982395887374878f, 0.131507381796837f,
+  0.982496619224548f, 0.131137356162071f, 0.982597053050995f, 0.130767241120338f,
+  0.982697248458862f, 0.130397051572800f, 0.982797086238861f, 0.130026802420616f,
+  0.982896685600281f, 0.129656463861465f, 0.982995986938477f, 0.129286035895348f,
+  0.983094990253448f, 0.128915548324585f, 0.983193755149841f, 0.128544986248016f,
+  0.983292162418365f, 0.128174334764481f, 0.983390331268311f, 0.127803623676300f,
+  0.983488261699677f, 0.127432823181152f, 0.983585834503174f, 0.127061963081360f,
+  0.983683168888092f, 0.126691013574600f, 0.983780145645142f, 0.126320004463196f,
+  0.983876943588257f, 0.125948905944824f, 0.983973383903503f, 0.125577747821808f,
+  0.984069526195526f, 0.125206500291824f, 0.984165430068970f, 0.124835193157196f,
+  0.984261035919189f, 0.124463804066181f, 0.984356343746185f, 0.124092340469360f,
+  0.984451413154602f, 0.123720809817314f, 0.984546124935150f, 0.123349204659462f,
+  0.984640598297119f, 0.122977524995804f, 0.984734773635864f, 0.122605770826340f,
+  0.984828710556030f, 0.122233949601650f, 0.984922289848328f, 0.121862053871155f,
+  0.985015630722046f, 0.121490091085434f, 0.985108673572540f, 0.121118053793907f,
+  0.985201418399811f, 0.120745941996574f, 0.985293865203857f, 0.120373763144016f,
+  0.985386073589325f, 0.120001509785652f, 0.985477983951569f, 0.119629189372063f,
+  0.985569596290588f, 0.119256794452667f, 0.985660910606384f, 0.118884332478046f,
+  0.985751926898956f, 0.118511803448200f, 0.985842704772949f, 0.118139199912548f,
+  0.985933184623718f, 0.117766529321671f, 0.986023366451263f, 0.117393791675568f,
+  0.986113250255585f, 0.117020979523659f, 0.986202836036682f, 0.116648100316525f,
+  0.986292183399200f, 0.116275154054165f, 0.986381232738495f, 0.115902140736580f,
+  0.986469984054565f, 0.115529052913189f, 0.986558437347412f, 0.115155905485153f,
+  0.986646652221680f, 0.114782683551311f, 0.986734509468079f, 0.114409394562244f,
+  0.986822128295898f, 0.114036038517952f, 0.986909449100494f, 0.113662622869015f,
+  0.986996471881866f, 0.113289132714272f, 0.987083256244659f, 0.112915575504303f,
+  0.987169682979584f, 0.112541958689690f, 0.987255871295929f, 0.112168267369270f,
+  0.987341761589050f, 0.111794516444206f, 0.987427353858948f, 0.111420698463917f,
+  0.987512648105621f, 0.111046813428402f, 0.987597703933716f, 0.110672861337662f,
+  0.987682461738586f, 0.110298842191696f, 0.987766921520233f, 0.109924763441086f,
+  0.987851083278656f, 0.109550617635250f, 0.987934947013855f, 0.109176412224770f,
+  0.988018512725830f, 0.108802139759064f, 0.988101840019226f, 0.108427800238132f,
+  0.988184869289398f, 0.108053401112556f, 0.988267600536346f, 0.107678934931755f,
+  0.988350033760071f, 0.107304409146309f, 0.988432228565216f, 0.106929816305637f,
+  0.988514065742493f, 0.106555156409740f, 0.988595664501190f, 0.106180444359779f,
+  0.988676965236664f, 0.105805665254593f, 0.988757967948914f, 0.105430819094181f,
+  0.988838672637939f, 0.105055920779705f, 0.988919138908386f, 0.104680955410004f,
+  0.988999247550964f, 0.104305922985077f, 0.989079117774963f, 0.103930838406086f,
+  0.989158689975739f, 0.103555686771870f, 0.989237964153290f, 0.103180475533009f,
+  0.989316940307617f, 0.102805204689503f, 0.989395678043365f, 0.102429874241352f,
+  0.989474058151245f, 0.102054484188557f, 0.989552199840546f, 0.101679034531116f,
+  0.989630043506622f, 0.101303517818451f, 0.989707589149475f, 0.100927948951721f,
+  0.989784896373749f, 0.100552320480347f, 0.989861845970154f, 0.100176624953747f,
+  0.989938557147980f, 0.099800877273083f, 0.990014970302582f, 0.099425069987774f,
+  0.990091085433960f, 0.099049203097820f, 0.990166902542114f, 0.098673284053802f,
+  0.990242421627045f, 0.098297297954559f, 0.990317702293396f, 0.097921259701252f,
+  0.990392625331879f, 0.097545161843300f, 0.990467309951782f, 0.097169004380703f,
+  0.990541696548462f, 0.096792794764042f, 0.990615785121918f, 0.096416525542736f,
+  0.990689575672150f, 0.096040196716785f, 0.990763127803802f, 0.095663815736771f,
+  0.990836322307587f, 0.095287375152111f, 0.990909278392792f, 0.094910882413387f,
+  0.990981936454773f, 0.094534330070019f, 0.991054296493530f, 0.094157725572586f,
+  0.991126358509064f, 0.093781061470509f, 0.991198182106018f, 0.093404345214367f,
+  0.991269648075104f, 0.093027576804161f, 0.991340875625610f, 0.092650748789310f,
+  0.991411805152893f, 0.092273868620396f, 0.991482377052307f, 0.091896936297417f,
+  0.991552770137787f, 0.091519944369793f, 0.991622805595398f, 0.091142900288105f,
+  0.991692543029785f, 0.090765804052353f, 0.991762042045593f, 0.090388655662537f,
+  0.991831183433533f, 0.090011447668076f, 0.991900086402893f, 0.089634194970131f,
+  0.991968691349030f, 0.089256882667542f, 0.992036998271942f, 0.088879525661469f,
+  0.992105066776276f, 0.088502109050751f, 0.992172777652740f, 0.088124647736549f,
+  0.992240250110626f, 0.087747126817703f, 0.992307364940643f, 0.087369553744793f,
+  0.992374241352081f, 0.086991935968399f, 0.992440819740295f, 0.086614266037941f,
+  0.992507100105286f, 0.086236543953419f, 0.992573142051697f, 0.085858769714832f,
+  0.992638826370239f, 0.085480943322182f, 0.992704212665558f, 0.085103072226048f,
+  0.992769360542297f, 0.084725148975849f, 0.992834210395813f, 0.084347173571587f,
+  0.992898762226105f, 0.083969146013260f, 0.992963016033173f, 0.083591073751450f,
+  0.993026971817017f, 0.083212949335575f, 0.993090689182281f, 0.082834780216217f,
+  0.993154048919678f, 0.082456558942795f, 0.993217170238495f, 0.082078292965889f,
+  0.993279933929443f, 0.081699974834919f, 0.993342459201813f, 0.081321612000465f,
+  0.993404686450958f, 0.080943197011948f, 0.993466615676880f, 0.080564737319946f,
+  0.993528306484222f, 0.080186225473881f, 0.993589639663696f, 0.079807676374912f,
+  0.993650734424591f, 0.079429075121880f, 0.993711471557617f, 0.079050421714783f,
+  0.993771970272064f, 0.078671731054783f, 0.993832170963287f, 0.078292988240719f,
+  0.993892073631287f, 0.077914200723171f, 0.993951678276062f, 0.077535368502140f,
+  0.994010984897614f, 0.077156484127045f, 0.994070053100586f, 0.076777562499046f,
+  0.994128763675690f, 0.076398596167564f, 0.994187235832214f, 0.076019577682018f,
+  0.994245409965515f, 0.075640521943569f, 0.994303286075592f, 0.075261414051056f,
+  0.994360864162445f, 0.074882268905640f, 0.994418144226074f, 0.074503071606159f,
+  0.994475126266479f, 0.074123837053776f, 0.994531810283661f, 0.073744557797909f,
+  0.994588255882263f, 0.073365233838558f, 0.994644403457642f, 0.072985872626305f,
+  0.994700193405151f, 0.072606459259987f, 0.994755744934082f, 0.072227008640766f,
+  0.994810998439789f, 0.071847513318062f, 0.994865953922272f, 0.071467980742455f,
+  0.994920611381531f, 0.071088403463364f, 0.994975030422211f, 0.070708781480789f,
+  0.995029091835022f, 0.070329122245312f, 0.995082914829254f, 0.069949418306351f,
+  0.995136380195618f, 0.069569669663906f, 0.995189607143402f, 0.069189883768559f,
+  0.995242536067963f, 0.068810060620308f, 0.995295166969299f, 0.068430192768574f,
+  0.995347499847412f, 0.068050287663937f, 0.995399534702301f, 0.067670337855816f,
+  0.995451331138611f, 0.067290350794792f, 0.995502769947052f, 0.066910326480865f,
+  0.995553970336914f, 0.066530264914036f, 0.995604813098907f, 0.066150158643723f,
+  0.995655417442322f, 0.065770015120506f, 0.995705723762512f, 0.065389834344387f,
+  0.995755732059479f, 0.065009608864784f, 0.995805442333221f, 0.064629353582859f,
+  0.995854854583740f, 0.064249053597450f, 0.995904028415680f, 0.063868723809719f,
+  0.995952844619751f, 0.063488349318504f, 0.996001422405243f, 0.063107937574387f,
+  0.996049642562866f, 0.062727488577366f, 0.996097624301910f, 0.062347009778023f,
+  0.996145308017731f, 0.061966486275196f, 0.996192693710327f, 0.061585929244757f,
+  0.996239781379700f, 0.061205338686705f, 0.996286571025848f, 0.060824707150459f,
+  0.996333062648773f, 0.060444042086601f, 0.996379256248474f, 0.060063343495131f,
+  0.996425211429596f, 0.059682607650757f, 0.996470808982849f, 0.059301838278770f,
+  0.996516168117523f, 0.058921031653881f, 0.996561229228973f, 0.058540191501379f,
+  0.996605992317200f, 0.058159314095974f, 0.996650457382202f, 0.057778406888247f,
+  0.996694624423981f, 0.057397462427616f, 0.996738493442535f, 0.057016488164663f,
+  0.996782064437866f, 0.056635476648808f, 0.996825337409973f, 0.056254431605339f,
+  0.996868371963501f, 0.055873356759548f, 0.996911048889160f, 0.055492244660854f,
+  0.996953487396240f, 0.055111102759838f, 0.996995627880096f, 0.054729927331209f,
+  0.997037410736084f, 0.054348722100258f, 0.997078955173492f, 0.053967483341694f,
+  0.997120201587677f, 0.053586211055517f, 0.997161149978638f, 0.053204908967018f,
+  0.997201859951019f, 0.052823577076197f, 0.997242212295532f, 0.052442211657763f,
+  0.997282266616821f, 0.052060816437006f, 0.997322082519531f, 0.051679391413927f,
+  0.997361540794373f, 0.051297932863235f, 0.997400760650635f, 0.050916448235512f,
+  0.997439682483673f, 0.050534930080175f, 0.997478306293488f, 0.050153385847807f,
+  0.997516572475433f, 0.049771808087826f, 0.997554600238800f, 0.049390204250813f,
+  0.997592389583588f, 0.049008570611477f, 0.997629821300507f, 0.048626907169819f,
+  0.997666954994202f, 0.048245213925838f, 0.997703790664673f, 0.047863494604826f,
+  0.997740387916565f, 0.047481749206781f, 0.997776627540588f, 0.047099970281124f,
+  0.997812628746033f, 0.046718169003725f, 0.997848331928253f, 0.046336337924004f,
+  0.997883677482605f, 0.045954477041960f, 0.997918784618378f, 0.045572593808174f,
+  0.997953593730927f, 0.045190680772066f, 0.997988104820251f, 0.044808741658926f,
+  0.998022377490997f, 0.044426776468754f, 0.998056292533875f, 0.044044785201550f,
+  0.998089909553528f, 0.043662767857313f, 0.998123228549957f, 0.043280724436045f,
+  0.998156309127808f, 0.042898654937744f, 0.998189091682434f, 0.042516563087702f,
+  0.998221516609192f, 0.042134445160627f, 0.998253703117371f, 0.041752301156521f,
+  0.998285591602325f, 0.041370131075382f, 0.998317182064056f, 0.040987938642502f,
+  0.998348474502563f, 0.040605723857880f, 0.998379468917847f, 0.040223482996225f,
+  0.998410165309906f, 0.039841219782829f, 0.998440563678741f, 0.039458930492401f,
+  0.998470664024353f, 0.039076622575521f, 0.998500525951386f, 0.038694288581610f,
+  0.998530030250549f, 0.038311932235956f, 0.998559296131134f, 0.037929553538561f,
+  0.998588204383850f, 0.037547148764133f, 0.998616874217987f, 0.037164725363255f,
+  0.998645246028900f, 0.036782283335924f, 0.998673319816589f, 0.036399815231562f,
+  0.998701035976410f, 0.036017324775457f, 0.998728513717651f, 0.035634815692902f,
+  0.998755753040314f, 0.035252287983894f, 0.998782634735107f, 0.034869734197855f,
+  0.998809218406677f, 0.034487165510654f, 0.998835504055023f, 0.034104570746422f,
+  0.998861551284790f, 0.033721961081028f, 0.998887240886688f, 0.033339329063892f,
+  0.998912692070007f, 0.032956674695015f, 0.998937785625458f, 0.032574005424976f,
+  0.998962640762329f, 0.032191313803196f, 0.998987197875977f, 0.031808607280254f,
+  0.999011456966400f, 0.031425878405571f, 0.999035418033600f, 0.031043132767081f,
+  0.999059081077576f, 0.030660368502140f, 0.999082446098328f, 0.030277585610747f,
+  0.999105513095856f, 0.029894785955548f, 0.999128282070160f, 0.029511967673898f,
+  0.999150753021240f, 0.029129132628441f, 0.999172985553741f, 0.028746278956532f,
+  0.999194860458374f, 0.028363410383463f, 0.999216496944427f, 0.027980525046587f,
+  0.999237775802612f, 0.027597622945905f, 0.999258816242218f, 0.027214704081416f,
+  0.999279558658600f, 0.026831768453121f, 0.999299943447113f, 0.026448817923665f,
+  0.999320089817047f, 0.026065852493048f, 0.999339938163757f, 0.025682870298624f,
+  0.999359488487244f, 0.025299875065684f, 0.999378740787506f, 0.024916863068938f,
+  0.999397754669189f, 0.024533838033676f, 0.999416410923004f, 0.024150796234608f,
+  0.999434769153595f, 0.023767741397023f, 0.999452829360962f, 0.023384673520923f,
+  0.999470651149750f, 0.023001590743661f, 0.999488115310669f, 0.022618494927883f,
+  0.999505341053009f, 0.022235386073589f, 0.999522268772125f, 0.021852264180779f,
+  0.999538838863373f, 0.021469129249454f, 0.999555170536041f, 0.021085981279612f,
+  0.999571204185486f, 0.020702820271254f, 0.999586939811707f, 0.020319648087025f,
+  0.999602377414703f, 0.019936462864280f, 0.999617516994476f, 0.019553268328309f,
+  0.999632358551025f, 0.019170060753822f, 0.999646902084351f, 0.018786842003465f,
+  0.999661207199097f, 0.018403612077236f, 0.999675154685974f, 0.018020370975137f,
+  0.999688863754272f, 0.017637118697166f, 0.999702215194702f, 0.017253857105970f,
+  0.999715328216553f, 0.016870586201549f, 0.999728083610535f, 0.016487304121256f,
+  0.999740600585938f, 0.016104012727737f, 0.999752819538116f, 0.015720712020993f,
+  0.999764680862427f, 0.015337402001023f, 0.999776303768158f, 0.014954082667828f,
+  0.999787628650665f, 0.014570754021406f, 0.999798655509949f, 0.014187417924404f,
+  0.999809384346008f, 0.013804072514176f, 0.999819874763489f, 0.013420719653368f,
+  0.999830007553101f, 0.013037359341979f, 0.999839842319489f, 0.012653990648687f,
+  0.999849438667297f, 0.012270614504814f, 0.999858677387238f, 0.011887230910361f,
+  0.999867618083954f, 0.011503840796649f, 0.999876320362091f, 0.011120444163680f,
+  0.999884724617004f, 0.010737040080130f, 0.999892771244049f, 0.010353630408645f,
+  0.999900579452515f, 0.009970214217901f, 0.999908089637756f, 0.009586792439222f,
+  0.999915301799774f, 0.009203365072608f, 0.999922215938568f, 0.008819932118058f,
+  0.999928832054138f, 0.008436493575573f, 0.999935150146484f, 0.008053051307797f,
+  0.999941170215607f, 0.007669602986425f, 0.999946892261505f, 0.007286150939763f,
+  0.999952375888824f, 0.006902694236487f, 0.999957501888275f, 0.006519233807921f,
+  0.999962329864502f, 0.006135769188404f, 0.999966919422150f, 0.005752300843596f,
+  0.999971151351929f, 0.005368829704821f, 0.999975144863129f, 0.004985354840755f,
+  0.999978840351105f, 0.004601877182722f, 0.999982178211212f, 0.004218397196382f,
+  0.999985277652740f, 0.003834914416075f, 0.999988079071045f, 0.003451429307461f,
+  0.999990582466125f, 0.003067942336202f, 0.999992787837982f, 0.002684453502297f,
+  0.999994695186615f, 0.002300963038579f, 0.999996304512024f, 0.001917471294291f,
+  0.999997675418854f, 0.001533978385851f, 0.999998688697815f, 0.001150484546088f,
+  0.999999403953552f, 0.000766990066040f, 0.999999880790710f, 0.000383495149435f,
+  1.000000000000000f, 0.000000000000023f, 0.999999880790710f, -0.000383495149435f,
+  0.999999403953552f, -0.000766990066040f, 0.999998688697815f, -0.001150484546088f,
+  0.999997675418854f, -0.001533978385851f, 0.999996304512024f, -0.001917471294291f,
+  0.999994695186615f, -0.002300963038579f, 0.999992787837982f, -0.002684453502297f,
+  0.999990582466125f, -0.003067942336202f, 0.999988079071045f, -0.003451429307461f,
+  0.999985277652740f, -0.003834914416075f, 0.999982178211212f, -0.004218397196382f,
+  0.999978840351105f, -0.004601877182722f, 0.999975144863129f, -0.004985354840755f,
+  0.999971151351929f, -0.005368829704821f, 0.999966919422150f, -0.005752300843596f,
+  0.999962329864502f, -0.006135769188404f, 0.999957501888275f, -0.006519233807921f,
+  0.999952375888824f, -0.006902694236487f, 0.999946892261505f, -0.007286150939763f,
+  0.999941170215607f, -0.007669602986425f, 0.999935150146484f, -0.008053051307797f,
+  0.999928832054138f, -0.008436493575573f, 0.999922215938568f, -0.008819932118058f,
+  0.999915301799774f, -0.009203365072608f, 0.999908089637756f, -0.009586792439222f,
+  0.999900579452515f, -0.009970214217901f, 0.999892771244049f, -0.010353630408645f,
+  0.999884724617004f, -0.010737040080130f, 0.999876320362091f, -0.011120444163680f,
+  0.999867618083954f, -0.011503840796649f, 0.999858677387238f, -0.011887230910361f,
+  0.999849438667297f, -0.012270614504814f, 0.999839842319489f, -0.012653990648687f,
+  0.999830007553101f, -0.013037359341979f, 0.999819874763489f, -0.013420719653368f,
+  0.999809384346008f, -0.013804072514176f, 0.999798655509949f, -0.014187417924404f,
+  0.999787628650665f, -0.014570754021406f, 0.999776303768158f, -0.014954082667828f,
+  0.999764680862427f, -0.015337402001023f, 0.999752819538116f, -0.015720712020993f,
+  0.999740600585938f, -0.016104012727737f, 0.999728083610535f, -0.016487304121256f,
+  0.999715328216553f, -0.016870586201549f, 0.999702215194702f, -0.017253857105970f,
+  0.999688863754272f, -0.017637118697166f, 0.999675154685974f, -0.018020370975137f,
+  0.999661207199097f, -0.018403612077236f, 0.999646902084351f, -0.018786842003465f,
+  0.999632358551025f, -0.019170060753822f, 0.999617516994476f, -0.019553268328309f,
+  0.999602377414703f, -0.019936462864280f, 0.999586939811707f, -0.020319648087025f,
+  0.999571204185486f, -0.020702820271254f, 0.999555170536041f, -0.021085981279612f,
+  0.999538838863373f, -0.021469129249454f, 0.999522268772125f, -0.021852264180779f,
+  0.999505341053009f, -0.022235386073589f, 0.999488115310669f, -0.022618494927883f,
+  0.999470651149750f, -0.023001590743661f, 0.999452829360962f, -0.023384673520923f,
+  0.999434769153595f, -0.023767741397023f, 0.999416410923004f, -0.024150796234608f,
+  0.999397754669189f, -0.024533838033676f, 0.999378740787506f, -0.024916863068938f,
+  0.999359488487244f, -0.025299875065684f, 0.999339938163757f, -0.025682870298624f,
+  0.999320089817047f, -0.026065852493048f, 0.999299943447113f, -0.026448817923665f,
+  0.999279558658600f, -0.026831768453121f, 0.999258816242218f, -0.027214704081416f,
+  0.999237775802612f, -0.027597622945905f, 0.999216496944427f, -0.027980525046587f,
+  0.999194860458374f, -0.028363410383463f, 0.999172985553741f, -0.028746278956532f,
+  0.999150753021240f, -0.029129132628441f, 0.999128282070160f, -0.029511967673898f,
+  0.999105513095856f, -0.029894785955548f, 0.999082446098328f, -0.030277585610747f,
+  0.999059081077576f, -0.030660368502140f, 0.999035418033600f, -0.031043132767081f,
+  0.999011456966400f, -0.031425878405571f, 0.998987197875977f, -0.031808607280254f,
+  0.998962640762329f, -0.032191313803196f, 0.998937785625458f, -0.032574005424976f,
+  0.998912692070007f, -0.032956674695015f, 0.998887240886688f, -0.033339329063892f,
+  0.998861551284790f, -0.033721961081028f, 0.998835504055023f, -0.034104570746422f,
+  0.998809218406677f, -0.034487165510654f, 0.998782634735107f, -0.034869734197855f,
+  0.998755753040314f, -0.035252287983894f, 0.998728513717651f, -0.035634815692902f,
+  0.998701035976410f, -0.036017324775457f, 0.998673319816589f, -0.036399815231562f,
+  0.998645246028900f, -0.036782283335924f, 0.998616874217987f, -0.037164725363255f,
+  0.998588204383850f, -0.037547148764133f, 0.998559296131134f, -0.037929553538561f,
+  0.998530030250549f, -0.038311932235956f, 0.998500525951386f, -0.038694288581610f,
+  0.998470664024353f, -0.039076622575521f, 0.998440563678741f, -0.039458930492401f,
+  0.998410165309906f, -0.039841219782829f, 0.998379468917847f, -0.040223482996225f,
+  0.998348474502563f, -0.040605723857880f, 0.998317182064056f, -0.040987938642502f,
+  0.998285591602325f, -0.041370131075382f, 0.998253703117371f, -0.041752301156521f,
+  0.998221516609192f, -0.042134445160627f, 0.998189091682434f, -0.042516563087702f,
+  0.998156309127808f, -0.042898654937744f, 0.998123228549957f, -0.043280724436045f,
+  0.998089909553528f, -0.043662767857313f, 0.998056292533875f, -0.044044785201550f,
+  0.998022377490997f, -0.044426776468754f, 0.997988104820251f, -0.044808741658926f,
+  0.997953593730927f, -0.045190680772066f, 0.997918784618378f, -0.045572593808174f,
+  0.997883677482605f, -0.045954477041960f, 0.997848331928253f, -0.046336337924004f,
+  0.997812628746033f, -0.046718169003725f, 0.997776627540588f, -0.047099970281124f,
+  0.997740387916565f, -0.047481749206781f, 0.997703790664673f, -0.047863494604826f,
+  0.997666954994202f, -0.048245213925838f, 0.997629821300507f, -0.048626907169819f,
+  0.997592389583588f, -0.049008570611477f, 0.997554600238800f, -0.049390204250813f,
+  0.997516572475433f, -0.049771808087826f, 0.997478306293488f, -0.050153385847807f,
+  0.997439682483673f, -0.050534930080175f, 0.997400760650635f, -0.050916448235512f,
+  0.997361540794373f, -0.051297932863235f, 0.997322082519531f, -0.051679391413927f,
+  0.997282266616821f, -0.052060816437006f, 0.997242212295532f, -0.052442211657763f,
+  0.997201859951019f, -0.052823577076197f, 0.997161149978638f, -0.053204908967018f,
+  0.997120201587677f, -0.053586211055517f, 0.997078955173492f, -0.053967483341694f,
+  0.997037410736084f, -0.054348722100258f, 0.996995627880096f, -0.054729927331209f,
+  0.996953487396240f, -0.055111102759838f, 0.996911048889160f, -0.055492244660854f,
+  0.996868371963501f, -0.055873356759548f, 0.996825337409973f, -0.056254431605339f,
+  0.996782064437866f, -0.056635476648808f, 0.996738493442535f, -0.057016488164663f,
+  0.996694624423981f, -0.057397462427616f, 0.996650457382202f, -0.057778406888247f,
+  0.996605992317200f, -0.058159314095974f, 0.996561229228973f, -0.058540191501379f,
+  0.996516168117523f, -0.058921031653881f, 0.996470808982849f, -0.059301838278770f,
+  0.996425211429596f, -0.059682607650757f, 0.996379256248474f, -0.060063343495131f,
+  0.996333062648773f, -0.060444042086601f, 0.996286571025848f, -0.060824707150459f,
+  0.996239781379700f, -0.061205338686705f, 0.996192693710327f, -0.061585929244757f,
+  0.996145308017731f, -0.061966486275196f, 0.996097624301910f, -0.062347009778023f,
+  0.996049642562866f, -0.062727488577366f, 0.996001422405243f, -0.063107937574387f,
+  0.995952844619751f, -0.063488349318504f, 0.995904028415680f, -0.063868723809719f,
+  0.995854854583740f, -0.064249053597450f, 0.995805442333221f, -0.064629353582859f,
+  0.995755732059479f, -0.065009608864784f, 0.995705723762512f, -0.065389834344387f,
+  0.995655417442322f, -0.065770015120506f, 0.995604813098907f, -0.066150158643723f,
+  0.995553970336914f, -0.066530264914036f, 0.995502769947052f, -0.066910326480865f,
+  0.995451331138611f, -0.067290350794792f, 0.995399534702301f, -0.067670337855816f,
+  0.995347499847412f, -0.068050287663937f, 0.995295166969299f, -0.068430192768574f,
+  0.995242536067963f, -0.068810060620308f, 0.995189607143402f, -0.069189883768559f,
+  0.995136380195618f, -0.069569669663906f, 0.995082914829254f, -0.069949418306351f,
+  0.995029091835022f, -0.070329122245312f, 0.994975030422211f, -0.070708781480789f,
+  0.994920611381531f, -0.071088403463364f, 0.994865953922272f, -0.071467980742455f,
+  0.994810998439789f, -0.071847513318062f, 0.994755744934082f, -0.072227008640766f,
+  0.994700193405151f, -0.072606459259987f, 0.994644403457642f, -0.072985872626305f,
+  0.994588255882263f, -0.073365233838558f, 0.994531810283661f, -0.073744557797909f,
+  0.994475126266479f, -0.074123837053776f, 0.994418144226074f, -0.074503071606159f,
+  0.994360864162445f, -0.074882268905640f, 0.994303286075592f, -0.075261414051056f,
+  0.994245409965515f, -0.075640521943569f, 0.994187235832214f, -0.076019577682018f,
+  0.994128763675690f, -0.076398596167564f, 0.994070053100586f, -0.076777562499046f,
+  0.994010984897614f, -0.077156484127045f, 0.993951678276062f, -0.077535368502140f,
+  0.993892073631287f, -0.077914200723171f, 0.993832170963287f, -0.078292988240719f,
+  0.993771970272064f, -0.078671731054783f, 0.993711471557617f, -0.079050421714783f,
+  0.993650734424591f, -0.079429075121880f, 0.993589639663696f, -0.079807676374912f,
+  0.993528306484222f, -0.080186225473881f, 0.993466615676880f, -0.080564737319946f,
+  0.993404686450958f, -0.080943197011948f, 0.993342459201813f, -0.081321612000465f,
+  0.993279933929443f, -0.081699974834919f, 0.993217170238495f, -0.082078292965889f,
+  0.993154048919678f, -0.082456558942795f, 0.993090689182281f, -0.082834780216217f,
+  0.993026971817017f, -0.083212949335575f, 0.992963016033173f, -0.083591073751450f,
+  0.992898762226105f, -0.083969146013260f, 0.992834210395813f, -0.084347173571587f,
+  0.992769360542297f, -0.084725148975849f, 0.992704212665558f, -0.085103072226048f,
+  0.992638826370239f, -0.085480943322182f, 0.992573142051697f, -0.085858769714832f,
+  0.992507100105286f, -0.086236543953419f, 0.992440819740295f, -0.086614266037941f,
+  0.992374241352081f, -0.086991935968399f, 0.992307364940643f, -0.087369553744793f,
+  0.992240250110626f, -0.087747126817703f, 0.992172777652740f, -0.088124647736549f,
+  0.992105066776276f, -0.088502109050751f, 0.992036998271942f, -0.088879525661469f,
+  0.991968691349030f, -0.089256882667542f, 0.991900086402893f, -0.089634194970131f,
+  0.991831183433533f, -0.090011447668076f, 0.991762042045593f, -0.090388655662537f,
+  0.991692543029785f, -0.090765804052353f, 0.991622805595398f, -0.091142900288105f,
+  0.991552770137787f, -0.091519944369793f, 0.991482377052307f, -0.091896936297417f,
+  0.991411805152893f, -0.092273868620396f, 0.991340875625610f, -0.092650748789310f,
+  0.991269648075104f, -0.093027576804161f, 0.991198182106018f, -0.093404345214367f,
+  0.991126358509064f, -0.093781061470509f, 0.991054296493530f, -0.094157725572586f,
+  0.990981936454773f, -0.094534330070019f, 0.990909278392792f, -0.094910882413387f,
+  0.990836322307587f, -0.095287375152111f, 0.990763127803802f, -0.095663815736771f,
+  0.990689575672150f, -0.096040196716785f, 0.990615785121918f, -0.096416525542736f,
+  0.990541696548462f, -0.096792794764042f, 0.990467309951782f, -0.097169004380703f,
+  0.990392625331879f, -0.097545161843300f, 0.990317702293396f, -0.097921259701252f,
+  0.990242421627045f, -0.098297297954559f, 0.990166902542114f, -0.098673284053802f,
+  0.990091085433960f, -0.099049203097820f, 0.990014970302582f, -0.099425069987774f,
+  0.989938557147980f, -0.099800877273083f, 0.989861845970154f, -0.100176624953747f,
+  0.989784896373749f, -0.100552320480347f, 0.989707589149475f, -0.100927948951721f,
+  0.989630043506622f, -0.101303517818451f, 0.989552199840546f, -0.101679034531116f,
+  0.989474058151245f, -0.102054484188557f, 0.989395678043365f, -0.102429874241352f,
+  0.989316940307617f, -0.102805204689503f, 0.989237964153290f, -0.103180475533009f,
+  0.989158689975739f, -0.103555686771870f, 0.989079117774963f, -0.103930838406086f,
+  0.988999247550964f, -0.104305922985077f, 0.988919138908386f, -0.104680955410004f,
+  0.988838672637939f, -0.105055920779705f, 0.988757967948914f, -0.105430819094181f,
+  0.988676965236664f, -0.105805665254593f, 0.988595664501190f, -0.106180444359779f,
+  0.988514065742493f, -0.106555156409740f, 0.988432228565216f, -0.106929816305637f,
+  0.988350033760071f, -0.107304409146309f, 0.988267600536346f, -0.107678934931755f,
+  0.988184869289398f, -0.108053401112556f, 0.988101840019226f, -0.108427800238132f,
+  0.988018512725830f, -0.108802139759064f, 0.987934947013855f, -0.109176412224770f,
+  0.987851083278656f, -0.109550617635250f, 0.987766921520233f, -0.109924763441086f,
+  0.987682461738586f, -0.110298842191696f, 0.987597703933716f, -0.110672861337662f,
+  0.987512648105621f, -0.111046813428402f, 0.987427353858948f, -0.111420698463917f,
+  0.987341761589050f, -0.111794516444206f, 0.987255871295929f, -0.112168267369270f,
+  0.987169682979584f, -0.112541958689690f, 0.987083256244659f, -0.112915575504303f,
+  0.986996471881866f, -0.113289132714272f, 0.986909449100494f, -0.113662622869015f,
+  0.986822128295898f, -0.114036038517952f, 0.986734509468079f, -0.114409394562244f,
+  0.986646652221680f, -0.114782683551311f, 0.986558437347412f, -0.115155905485153f,
+  0.986469984054565f, -0.115529052913189f, 0.986381232738495f, -0.115902140736580f,
+  0.986292183399200f, -0.116275154054165f, 0.986202836036682f, -0.116648100316525f,
+  0.986113250255585f, -0.117020979523659f, 0.986023366451263f, -0.117393791675568f,
+  0.985933184623718f, -0.117766529321671f, 0.985842704772949f, -0.118139199912548f,
+  0.985751926898956f, -0.118511803448200f, 0.985660910606384f, -0.118884332478046f,
+  0.985569596290588f, -0.119256794452667f, 0.985477983951569f, -0.119629189372063f,
+  0.985386073589325f, -0.120001509785652f, 0.985293865203857f, -0.120373763144016f,
+  0.985201418399811f, -0.120745941996574f, 0.985108673572540f, -0.121118053793907f,
+  0.985015630722046f, -0.121490091085434f, 0.984922289848328f, -0.121862053871155f,
+  0.984828710556030f, -0.122233949601650f, 0.984734773635864f, -0.122605770826340f,
+  0.984640598297119f, -0.122977524995804f, 0.984546124935150f, -0.123349204659462f,
+  0.984451413154602f, -0.123720809817314f, 0.984356343746185f, -0.124092340469360f,
+  0.984261035919189f, -0.124463804066181f, 0.984165430068970f, -0.124835193157196f,
+  0.984069526195526f, -0.125206500291824f, 0.983973383903503f, -0.125577747821808f,
+  0.983876943588257f, -0.125948905944824f, 0.983780145645142f, -0.126320004463196f,
+  0.983683168888092f, -0.126691013574600f, 0.983585834503174f, -0.127061963081360f,
+  0.983488261699677f, -0.127432823181152f, 0.983390331268311f, -0.127803623676300f,
+  0.983292162418365f, -0.128174334764481f, 0.983193755149841f, -0.128544986248016f,
+  0.983094990253448f, -0.128915548324585f, 0.982995986938477f, -0.129286035895348f,
+  0.982896685600281f, -0.129656463861465f, 0.982797086238861f, -0.130026802420616f,
+  0.982697248458862f, -0.130397051572800f, 0.982597053050995f, -0.130767241120338f,
+  0.982496619224548f, -0.131137356162071f, 0.982395887374878f, -0.131507381796837f,
+  0.982294917106628f, -0.131877332925797f, 0.982193589210510f, -0.132247209548950f,
+  0.982092022895813f, -0.132617011666298f, 0.981990158557892f, -0.132986739277840f,
+  0.981888055801392f, -0.133356377482414f, 0.981785595417023f, -0.133725941181183f,
+  0.981682896614075f, -0.134095430374146f, 0.981579899787903f, -0.134464830160141f,
+  0.981476604938507f, -0.134834155440331f, 0.981373071670532f, -0.135203406214714f,
+  0.981269240379334f, -0.135572582483292f, 0.981165111064911f, -0.135941669344902f,
+  0.981060683727264f, -0.136310681700706f, 0.980956017971039f, -0.136679604649544f,
+  0.980851054191589f, -0.137048453092575f, 0.980745792388916f, -0.137417227029800f,
+  0.980640232563019f, -0.137785911560059f, 0.980534434318542f, -0.138154521584511f,
+  0.980428338050842f, -0.138523042201996f, 0.980321943759918f, -0.138891488313675f,
+  0.980215251445770f, -0.139259845018387f, 0.980108320713043f, -0.139628127217293f,
+  0.980001091957092f, -0.139996320009232f, 0.979893565177917f, -0.140364438295364f,
+  0.979785740375519f, -0.140732467174530f, 0.979677677154541f, -0.141100421547890f,
+  0.979569315910339f, -0.141468286514282f, 0.979460656642914f, -0.141836062073708f,
+  0.979351758956909f, -0.142203763127327f, 0.979242503643036f, -0.142571389675140f,
+  0.979133009910584f, -0.142938911914825f, 0.979023277759552f, -0.143306359648705f,
+  0.978913187980652f, -0.143673732876778f, 0.978802859783173f, -0.144041016697884f,
+  0.978692233562469f, -0.144408211112022f, 0.978581368923187f, -0.144775316119194f,
+  0.978470146656036f, -0.145142331719399f, 0.978358685970306f, -0.145509272813797f,
+  0.978246986865997f, -0.145876124501228f, 0.978134930133820f, -0.146242901682854f,
+  0.978022634983063f, -0.146609574556351f, 0.977910041809082f, -0.146976172924042f,
+  0.977797150611877f, -0.147342681884766f, 0.977684020996094f, -0.147709101438522f,
+  0.977570593357086f, -0.148075446486473f, 0.977456867694855f, -0.148441687226295f,
+  0.977342903614044f, -0.148807853460312f, 0.977228581905365f, -0.149173930287361f,
+  0.977114021778107f, -0.149539917707443f, 0.976999223232269f, -0.149905815720558f,
+  0.976884067058563f, -0.150271624326706f, 0.976768672466278f, -0.150637343525887f,
+  0.976653039455414f, -0.151002973318100f, 0.976537048816681f, -0.151368513703346f,
+  0.976420819759369f, -0.151733979582787f, 0.976304292678833f, -0.152099341154099f,
+  0.976187527179718f, -0.152464613318443f, 0.976070404052734f, -0.152829796075821f,
+  0.975953042507172f, -0.153194904327393f, 0.975835442543030f, -0.153559908270836f,
+  0.975717484951019f, -0.153924822807312f, 0.975599288940430f, -0.154289647936821f,
+  0.975480854511261f, -0.154654383659363f, 0.975362062454224f, -0.155019029974937f,
+  0.975243031978607f, -0.155383571982384f, 0.975123703479767f, -0.155748039484024f,
+  0.975004136562347f, -0.156112402677536f, 0.974884271621704f, -0.156476691365242f,
+  0.974764108657837f, -0.156840875744820f, 0.974643647670746f, -0.157204970717430f,
+  0.974522948265076f, -0.157568961381912f, 0.974401950836182f, -0.157932877540588f,
+  0.974280655384064f, -0.158296689391136f, 0.974159121513367f, -0.158660411834717f,
+  0.974037289619446f, -0.159024044871330f, 0.973915159702301f, -0.159387573599815f,
+  0.973792791366577f, -0.159751012921333f, 0.973670125007629f, -0.160114362835884f,
+  0.973547160625458f, -0.160477623343468f, 0.973423957824707f, -0.160840779542923f,
+  0.973300457000732f, -0.161203846335411f, 0.973176658153534f, -0.161566808819771f,
+  0.973052620887756f, -0.161929681897163f, 0.972928285598755f, -0.162292465567589f,
+  0.972803652286530f, -0.162655144929886f, 0.972678780555725f, -0.163017734885216f,
+  0.972553610801697f, -0.163380220532417f, 0.972428143024445f, -0.163742616772652f,
+  0.972302436828613f, -0.164104923605919f, 0.972176432609558f, -0.164467126131058f,
+  0.972050130367279f, -0.164829224348068f, 0.971923589706421f, -0.165191248059273f,
+  0.971796751022339f, -0.165553152561188f, 0.971669614315033f, -0.165914967656136f,
+  0.971542239189148f, -0.166276678442955f, 0.971414566040039f, -0.166638299822807f,
+  0.971286594867706f, -0.166999831795692f, 0.971158385276794f, -0.167361244559288f,
+  0.971029877662659f, -0.167722567915916f, 0.970901072025299f, -0.168083801865578f,
+  0.970772027969360f, -0.168444931507111f, 0.970642685890198f, -0.168805956840515f,
+  0.970513105392456f, -0.169166877865791f, 0.970383226871490f, -0.169527709484100f,
+  0.970253050327301f, -0.169888436794281f, 0.970122575759888f, -0.170249074697495f,
+  0.969991862773895f, -0.170609608292580f, 0.969860911369324f, -0.170970037579536f,
+  0.969729602336884f, -0.171330362558365f, 0.969598054885864f, -0.171690583229065f,
+  0.969466269016266f, -0.172050714492798f, 0.969334125518799f, -0.172410741448402f,
+  0.969201743602753f, -0.172770664095879f, 0.969069123268127f, -0.173130482435226f,
+  0.968936204910278f, -0.173490211367607f, 0.968802988529205f, -0.173849821090698f,
+  0.968669533729553f, -0.174209341406822f, 0.968535780906677f, -0.174568757414818f,
+  0.968401730060577f, -0.174928069114685f, 0.968267440795898f, -0.175287276506424f,
+  0.968132853507996f, -0.175646379590034f, 0.967997968196869f, -0.176005378365517f,
+  0.967862844467163f, -0.176364272832870f, 0.967727422714233f, -0.176723077893257f,
+  0.967591762542725f, -0.177081763744354f, 0.967455804347992f, -0.177440345287323f,
+  0.967319548130035f, -0.177798837423325f, 0.967183053493500f, -0.178157210350037f,
+  0.967046260833740f, -0.178515478968620f, 0.966909229755402f, -0.178873643279076f,
+  0.966771900653839f, -0.179231703281403f, 0.966634273529053f, -0.179589673876762f,
+  0.966496407985687f, -0.179947525262833f, 0.966358244419098f, -0.180305257439613f,
+  0.966219842433929f, -0.180662900209427f, 0.966081082820892f, -0.181020438671112f,
+  0.965942144393921f, -0.181377857923508f, 0.965802907943726f, -0.181735187768936f,
+  0.965663373470306f, -0.182092398405075f, 0.965523540973663f, -0.182449504733086f,
+  0.965383470058441f, -0.182806491851807f, 0.965243160724640f, -0.183163389563560f,
+  0.965102493762970f, -0.183520168066025f, 0.964961588382721f, -0.183876842260361f,
+  0.964820444583893f, -0.184233412146568f, 0.964679002761841f, -0.184589877724648f,
+  0.964537262916565f, -0.184946224093437f, 0.964395284652710f, -0.185302466154099f,
+  0.964253067970276f, -0.185658603906631f, 0.964110493659973f, -0.186014622449875f,
+  0.963967680931091f, -0.186370536684990f, 0.963824629783630f, -0.186726331710815f,
+  0.963681280612946f, -0.187082037329674f, 0.963537633419037f, -0.187437608838081f,
+  0.963393747806549f, -0.187793090939522f, 0.963249564170837f, -0.188148453831673f,
+  0.963105142116547f, -0.188503712415695f, 0.962960422039032f, -0.188858851790428f,
+  0.962815403938293f, -0.189213871955872f, 0.962670147418976f, -0.189568802714348f,
+  0.962524592876434f, -0.189923599362373f, 0.962378799915314f, -0.190278306603432f,
+  0.962232708930969f, -0.190632879734039f, 0.962086379528046f, -0.190987363457680f,
+  0.961939752101898f, -0.191341713070869f, 0.961792886257172f, -0.191695958375931f,
+  0.961645722389221f, -0.192050099372864f, 0.961498260498047f, -0.192404121160507f,
+  0.961350560188293f, -0.192758023738861f, 0.961202561855316f, -0.193111822009087f,
+  0.961054325103760f, -0.193465501070023f, 0.960905790328979f, -0.193819075822830f,
+  0.960757017135620f, -0.194172516465187f, 0.960607945919037f, -0.194525867700577f,
+  0.960458636283875f, -0.194879084825516f, 0.960309028625488f, -0.195232197642326f,
+  0.960159122943878f, -0.195585191249847f, 0.960008978843689f, -0.195938065648079f,
+  0.959858596324921f, -0.196290835738182f, 0.959707856178284f, -0.196643486618996f,
+  0.959556937217712f, -0.196996018290520f, 0.959405720233917f, -0.197348430752754f,
+  0.959254205226898f, -0.197700738906860f, 0.959102451801300f, -0.198052927851677f,
+  0.958950400352478f, -0.198404997587204f, 0.958798050880432f, -0.198756948113441f,
+  0.958645522594452f, -0.199108779430389f, 0.958492636680603f, -0.199460506439209f,
+  0.958339512348175f, -0.199812099337578f, 0.958186149597168f, -0.200163587927818f,
+  0.958032488822937f, -0.200514942407608f, 0.957878530025482f, -0.200866192579269f,
+  0.957724332809448f, -0.201217323541641f, 0.957569897174835f, -0.201568335294724f,
+  0.957415163516998f, -0.201919227838516f, 0.957260131835938f, -0.202270001173019f,
+  0.957104861736298f, -0.202620655298233f, 0.956949353218079f, -0.202971190214157f,
+  0.956793546676636f, -0.203321605920792f, 0.956637442111969f, -0.203671902418137f,
+  0.956481099128723f, -0.204022079706192f, 0.956324458122253f, -0.204372137784958f,
+  0.956167578697205f, -0.204722076654434f, 0.956010460853577f, -0.205071896314621f,
+  0.955853044986725f, -0.205421581864357f, 0.955695331096649f, -0.205771163105965f,
+  0.955537378787994f, -0.206120610237122f, 0.955379128456116f, -0.206469938158989f,
+  0.955220639705658f, -0.206819161772728f, 0.955061912536621f, -0.207168251276016f,
+  0.954902827739716f, -0.207517206668854f, 0.954743564128876f, -0.207866057753563f,
+  0.954584002494812f, -0.208214774727821f, 0.954424142837524f, -0.208563387393951f,
+  0.954264044761658f, -0.208911851048470f, 0.954103708267212f, -0.209260210394859f,
+  0.953943073749542f, -0.209608450531960f, 0.953782141208649f, -0.209956556558609f,
+  0.953620970249176f, -0.210304543375969f, 0.953459560871124f, -0.210652396082878f,
+  0.953297853469849f, -0.211000129580498f, 0.953135907649994f, -0.211347743868828f,
+  0.952973663806915f, -0.211695238947868f, 0.952811121940613f, -0.212042599916458f,
+  0.952648401260376f, -0.212389841675758f, 0.952485322952271f, -0.212736949324608f,
+  0.952322065830231f, -0.213083937764168f, 0.952158451080322f, -0.213430806994438f,
+  0.951994657516479f, -0.213777542114258f, 0.951830565929413f, -0.214124158024788f,
+  0.951666176319122f, -0.214470639824867f, 0.951501548290253f, -0.214817002415657f,
+  0.951336681842804f, -0.215163245797157f, 0.951171517372131f, -0.215509355068207f,
+  0.951006054878235f, -0.215855330228806f, 0.950840353965759f, -0.216201186180115f,
+  0.950674414634705f, -0.216546908020973f, 0.950508177280426f, -0.216892510652542f,
+  0.950341701507568f, -0.217237979173660f, 0.950174987316132f, -0.217583328485489f,
+  0.950007975101471f, -0.217928543686867f, 0.949840664863586f, -0.218273624777794f,
+  0.949673116207123f, -0.218618586659431f, 0.949505329132080f, -0.218963414430618f,
+  0.949337244033813f, -0.219308122992516f, 0.949168920516968f, -0.219652697443962f,
+  0.949000298976898f, -0.219997137784958f, 0.948831439018250f, -0.220341444015503f,
+  0.948662281036377f, -0.220685631036758f, 0.948492884635925f, -0.221029683947563f,
+  0.948323249816895f, -0.221373617649078f, 0.948153316974640f, -0.221717402338982f,
+  0.947983145713806f, -0.222061067819595f, 0.947812676429749f, -0.222404599189758f,
+  0.947641968727112f, -0.222748011350632f, 0.947470963001251f, -0.223091274499893f,
+  0.947299718856812f, -0.223434418439865f, 0.947128236293793f, -0.223777428269386f,
+  0.946956455707550f, -0.224120303988457f, 0.946784436702728f, -0.224463045597076f,
+  0.946612179279327f, -0.224805667996407f, 0.946439623832703f, -0.225148141384125f,
+  0.946266770362854f, -0.225490495562553f, 0.946093678474426f, -0.225832715630531f,
+  0.945920348167419f, -0.226174786686897f, 0.945746779441834f, -0.226516738533974f,
+  0.945572853088379f, -0.226858556270599f, 0.945398747920990f, -0.227200239896774f,
+  0.945224344730377f, -0.227541789412498f, 0.945049703121185f, -0.227883204817772f,
+  0.944874763488770f, -0.228224486112595f, 0.944699645042419f, -0.228565633296967f,
+  0.944524168968201f, -0.228906646370888f, 0.944348454475403f, -0.229247525334358f,
+  0.944172501564026f, -0.229588270187378f, 0.943996310234070f, -0.229928880929947f,
+  0.943819820880890f, -0.230269357562065f, 0.943643093109131f, -0.230609700083733f,
+  0.943466067314148f, -0.230949893593788f, 0.943288803100586f, -0.231289967894554f,
+  0.943111240863800f, -0.231629893183708f, 0.942933499813080f, -0.231969684362412f,
+  0.942755401134491f, -0.232309341430664f, 0.942577123641968f, -0.232648864388466f,
+  0.942398548126221f, -0.232988253235817f, 0.942219734191895f, -0.233327493071556f,
+  0.942040622234344f, -0.233666598796844f, 0.941861271858215f, -0.234005570411682f,
+  0.941681683063507f, -0.234344407916069f, 0.941501796245575f, -0.234683111310005f,
+  0.941321671009064f, -0.235021665692329f, 0.941141307353973f, -0.235360085964203f,
+  0.940960645675659f, -0.235698372125626f, 0.940779745578766f, -0.236036509275436f,
+  0.940598547458649f, -0.236374512314796f, 0.940417110919952f, -0.236712381243706f,
+  0.940235435962677f, -0.237050101161003f, 0.940053522586823f, -0.237387686967850f,
+  0.939871311187744f, -0.237725138664246f, 0.939688861370087f, -0.238062441349030f,
+  0.939506113529205f, -0.238399609923363f, 0.939323127269745f, -0.238736644387245f,
+  0.939139902591705f, -0.239073529839516f, 0.938956379890442f, -0.239410281181335f,
+  0.938772618770599f, -0.239746883511543f, 0.938588619232178f, -0.240083336830139f,
+  0.938404381275177f, -0.240419670939446f, 0.938219845294952f, -0.240755841135979f,
+  0.938035070896149f, -0.241091892123222f, 0.937849998474121f, -0.241427779197693f,
+  0.937664687633514f, -0.241763532161713f, 0.937479138374329f, -0.242099151015282f,
+  0.937293350696564f, -0.242434620857239f, 0.937107264995575f, -0.242769956588745f,
+  0.936920940876007f, -0.243105143308640f, 0.936734318733215f, -0.243440181016922f,
+  0.936547517776489f, -0.243775084614754f, 0.936360359191895f, -0.244109839200974f,
+  0.936173021793365f, -0.244444444775581f, 0.935985386371613f, -0.244778916239738f,
+  0.935797572135925f, -0.245113238692284f, 0.935609400272369f, -0.245447427034378f,
+  0.935421049594879f, -0.245781451463699f, 0.935232400894165f, -0.246115356683731f,
+  0.935043513774872f, -0.246449097990990f, 0.934854328632355f, -0.246782705187798f,
+  0.934664964675903f, -0.247116148471832f, 0.934475243091583f, -0.247449472546577f,
+  0.934285342693329f, -0.247782632708550f, 0.934095203876495f, -0.248115643858910f,
+  0.933904767036438f, -0.248448520898819f, 0.933714091777802f, -0.248781248927116f,
+  0.933523118495941f, -0.249113827943802f, 0.933331906795502f, -0.249446272850037f,
+  0.933140456676483f, -0.249778553843498f, 0.932948768138886f, -0.250110685825348f,
+  0.932756841182709f, -0.250442683696747f, 0.932564616203308f, -0.250774532556534f,
+  0.932372152805328f, -0.251106232404709f, 0.932179391384125f, -0.251437783241272f,
+  0.931986451148987f, -0.251769185066223f, 0.931793212890625f, -0.252100437879562f,
+  0.931599736213684f, -0.252431541681290f, 0.931405961513519f, -0.252762526273727f,
+  0.931211948394775f, -0.253093332052231f, 0.931017756462097f, -0.253423988819122f,
+  0.930823206901550f, -0.253754496574402f, 0.930628478527069f, -0.254084855318069f,
+  0.930433452129364f, -0.254415065050125f, 0.930238187313080f, -0.254745125770569f,
+  0.930042684078217f, -0.255075037479401f, 0.929846942424774f, -0.255404800176620f,
+  0.929650902748108f, -0.255734413862228f, 0.929454624652863f, -0.256063878536224f,
+  0.929258108139038f, -0.256393194198608f, 0.929061353206635f, -0.256722360849380f,
+  0.928864300251007f, -0.257051378488541f, 0.928667008876801f, -0.257380217313766f,
+  0.928469479084015f, -0.257708936929703f, 0.928271710872650f, -0.258037507534027f,
+  0.928073644638062f, -0.258365899324417f, 0.927875399589539f, -0.258694142103195f,
+  0.927676856517792f, -0.259022265672684f, 0.927478015422821f, -0.259350210428238f,
+  0.927278995513916f, -0.259678006172180f, 0.927079677581787f, -0.260005623102188f,
+  0.926880121231079f, -0.260333120822906f, 0.926680326461792f, -0.260660469532013f,
+  0.926480293273926f, -0.260987639427185f, 0.926280021667480f, -0.261314690113068f,
+  0.926079452037811f, -0.261641561985016f, 0.925878643989563f, -0.261968284845352f,
+  0.925677597522736f, -0.262294828891754f, 0.925476312637329f, -0.262621253728867f,
+  0.925274729728699f, -0.262947499752045f, 0.925072908401489f, -0.263273626565933f,
+  0.924870908260345f, -0.263599574565887f, 0.924668610095978f, -0.263925373554230f,
+  0.924466013908386f, -0.264250993728638f, 0.924263238906860f, -0.264576494693756f,
+  0.924060165882111f, -0.264901816844940f, 0.923856854438782f, -0.265226989984512f,
+  0.923653304576874f, -0.265552014112473f, 0.923449516296387f, -0.265876859426498f,
+  0.923245489597321f, -0.266201555728912f, 0.923041164875031f, -0.266526103019714f,
+  0.922836601734161f, -0.266850501298904f, 0.922631800174713f, -0.267174720764160f,
+  0.922426760196686f, -0.267498821020126f, 0.922221481800079f, -0.267822742462158f,
+  0.922015964984894f, -0.268146485090256f, 0.921810150146484f, -0.268470078706741f,
+  0.921604096889496f, -0.268793523311615f, 0.921397805213928f, -0.269116818904877f,
+  0.921191275119781f, -0.269439965486526f, 0.920984506607056f, -0.269762933254242f,
+  0.920777499675751f, -0.270085722208023f, 0.920570194721222f, -0.270408391952515f,
+  0.920362710952759f, -0.270730882883072f, 0.920154929161072f, -0.271053224802017f,
+  0.919946908950806f, -0.271375387907028f, 0.919738650321960f, -0.271697402000427f,
+  0.919530093669891f, -0.272019267082214f, 0.919321358203888f, -0.272340953350067f,
+  0.919112324714661f, -0.272662490606308f, 0.918903112411499f, -0.272983878850937f,
+  0.918693602085114f, -0.273305088281631f, 0.918483853340149f, -0.273626148700714f,
+  0.918273866176605f, -0.273947030305862f, 0.918063640594482f, -0.274267762899399f,
+  0.917853116989136f, -0.274588316679001f, 0.917642414569855f, -0.274908751249313f,
+  0.917431414127350f, -0.275228977203369f, 0.917220234870911f, -0.275549083948135f,
+  0.917008757591248f, -0.275868982076645f, 0.916797041893005f, -0.276188760995865f,
+  0.916585087776184f, -0.276508361101151f, 0.916372895240784f, -0.276827782392502f,
+  0.916160404682159f, -0.277147054672241f, 0.915947735309601f, -0.277466177940369f,
+  0.915734827518463f, -0.277785122394562f, 0.915521621704102f, -0.278103888034821f,
+  0.915308177471161f, -0.278422504663467f, 0.915094554424286f, -0.278740972280502f,
+  0.914880633354187f, -0.279059261083603f, 0.914666473865509f, -0.279377400875092f,
+  0.914452075958252f, -0.279695361852646f, 0.914237439632416f, -0.280013144016266f,
+  0.914022505283356f, -0.280330777168274f, 0.913807392120361f, -0.280648261308670f,
+  0.913592040538788f, -0.280965566635132f, 0.913376390933990f, -0.281282693147659f,
+  0.913160502910614f, -0.281599670648575f, 0.912944436073303f, -0.281916469335556f,
+  0.912728071212769f, -0.282233119010925f, 0.912511467933655f, -0.282549589872360f,
+  0.912294626235962f, -0.282865911722183f, 0.912077546119690f, -0.283182054758072f,
+  0.911860227584839f, -0.283498018980026f, 0.911642670631409f, -0.283813834190369f,
+  0.911424875259399f, -0.284129470586777f, 0.911206841468811f, -0.284444957971573f,
+  0.910988569259644f, -0.284760266542435f, 0.910769999027252f, -0.285075396299362f,
+  0.910551249980927f, -0.285390377044678f, 0.910332262516022f, -0.285705178976059f,
+  0.910112977027893f, -0.286019802093506f, 0.909893512725830f, -0.286334276199341f,
+  0.909673750400543f, -0.286648571491241f, 0.909453809261322f, -0.286962717771530f,
+  0.909233570098877f, -0.287276685237885f, 0.909013092517853f, -0.287590473890305f,
+  0.908792436122894f, -0.287904083728790f, 0.908571481704712f, -0.288217544555664f,
+  0.908350288867950f, -0.288530826568604f, 0.908128857612610f, -0.288843959569931f,
+  0.907907187938690f, -0.289156883955002f, 0.907685279846191f, -0.289469659328461f,
+  0.907463192939758f, -0.289782285690308f, 0.907240808010101f, -0.290094703435898f,
+  0.907018184661865f, -0.290406972169876f, 0.906795322895050f, -0.290719062089920f,
+  0.906572222709656f, -0.291031002998352f, 0.906348884105682f, -0.291342735290527f,
+  0.906125307083130f, -0.291654318571091f, 0.905901491641998f, -0.291965723037720f,
+  0.905677437782288f, -0.292276978492737f, 0.905453145503998f, -0.292588025331497f,
+  0.905228614807129f, -0.292898923158646f, 0.905003845691681f, -0.293209642171860f,
+  0.904778838157654f, -0.293520182371140f, 0.904553592205048f, -0.293830573558807f,
+  0.904328107833862f, -0.294140785932541f, 0.904102385044098f, -0.294450789690018f,
+  0.903876423835754f, -0.294760644435883f, 0.903650224208832f, -0.295070350170136f,
+  0.903423786163330f, -0.295379847288132f, 0.903197109699249f, -0.295689195394516f,
+  0.902970194816589f, -0.295998334884644f, 0.902743041515350f, -0.296307325363159f,
+  0.902515649795532f, -0.296616137027740f, 0.902288019657135f, -0.296924799680710f,
+  0.902060210704803f, -0.297233253717422f, 0.901832103729248f, -0.297541528940201f,
+  0.901603758335114f, -0.297849655151367f, 0.901375174522400f, -0.298157602548599f,
+  0.901146411895752f, -0.298465341329575f, 0.900917351245880f, -0.298772931098938f,
+  0.900688111782074f, -0.299080342054367f, 0.900458574295044f, -0.299387603998184f,
+  0.900228857994080f, -0.299694657325745f, 0.899998843669891f, -0.300001531839371f,
+  0.899768650531769f, -0.300308227539063f, 0.899538159370422f, -0.300614774227142f,
+  0.899307489395142f, -0.300921112298965f, 0.899076581001282f, -0.301227301359177f,
+  0.898845434188843f, -0.301533311605453f, 0.898614048957825f, -0.301839113235474f,
+  0.898382425308228f, -0.302144765853882f, 0.898150563240051f, -0.302450239658356f,
+  0.897918462753296f, -0.302755534648895f, 0.897686123847961f, -0.303060621023178f,
+  0.897453546524048f, -0.303365558385849f, 0.897220790386200f, -0.303670316934586f,
+  0.896987736225128f, -0.303974896669388f, 0.896754503250122f, -0.304279297590256f,
+  0.896520972251892f, -0.304583519697189f, 0.896287262439728f, -0.304887533187866f,
+  0.896053314208984f, -0.305191397666931f, 0.895819067955017f, -0.305495083332062f,
+  0.895584642887115f, -0.305798590183258f, 0.895349979400635f, -0.306101888418198f,
+  0.895115137100220f, -0.306405037641525f, 0.894879996776581f, -0.306708008050919f,
+  0.894644618034363f, -0.307010769844055f, 0.894409060478210f, -0.307313382625580f,
+  0.894173204898834f, -0.307615786790848f, 0.893937170505524f, -0.307918041944504f,
+  0.893700897693634f, -0.308220088481903f, 0.893464326858521f, -0.308521956205368f,
+  0.893227577209473f, -0.308823645114899f, 0.892990648746490f, -0.309125155210495f,
+  0.892753422260284f, -0.309426486492157f, 0.892515957355499f, -0.309727638959885f,
+  0.892278313636780f, -0.310028612613678f, 0.892040371894836f, -0.310329377651215f,
+  0.891802251338959f, -0.310629993677139f, 0.891563892364502f, -0.310930401086807f,
+  0.891325294971466f, -0.311230629682541f, 0.891086459159851f, -0.311530679464340f,
+  0.890847444534302f, -0.311830550432205f, 0.890608131885529f, -0.312130242586136f,
+  0.890368640422821f, -0.312429755926132f, 0.890128850936890f, -0.312729060649872f,
+  0.889888882637024f, -0.313028186559677f, 0.889648675918579f, -0.313327133655548f,
+  0.889408230781555f, -0.313625901937485f, 0.889167606830597f, -0.313924491405487f,
+  0.888926684856415f, -0.314222872257233f, 0.888685584068298f, -0.314521104097366f,
+  0.888444244861603f, -0.314819127321243f, 0.888202667236328f, -0.315116971731186f,
+  0.887960851192474f, -0.315414607524872f, 0.887718796730042f, -0.315712094306946f,
+  0.887476563453674f, -0.316009372472763f, 0.887234091758728f, -0.316306471824646f,
+  0.886991322040558f, -0.316603392362595f, 0.886748373508453f, -0.316900104284287f,
+  0.886505246162415f, -0.317196637392044f, 0.886261820793152f, -0.317492991685867f,
+  0.886018216609955f, -0.317789167165756f, 0.885774314403534f, -0.318085134029388f,
+  0.885530233383179f, -0.318380922079086f, 0.885285973548889f, -0.318676531314850f,
+  0.885041415691376f, -0.318971961736679f, 0.884796679019928f, -0.319267183542252f,
+  0.884551644325256f, -0.319562226533890f, 0.884306430816650f, -0.319857090711594f,
+  0.884061038494110f, -0.320151746273041f, 0.883815348148346f, -0.320446223020554f,
+  0.883569478988647f, -0.320740520954132f, 0.883323311805725f, -0.321034610271454f,
+  0.883076965808868f, -0.321328520774841f, 0.882830440998077f, -0.321622252464294f,
+  0.882583618164063f, -0.321915775537491f, 0.882336616516113f, -0.322209119796753f,
+  0.882089376449585f, -0.322502255439758f, 0.881841897964478f, -0.322795242071152f,
+  0.881594181060791f, -0.323088020086288f, 0.881346285343170f, -0.323380589485168f,
+  0.881098151206970f, -0.323672980070114f, 0.880849778652191f, -0.323965191841125f,
+  0.880601167678833f, -0.324257194995880f, 0.880352377891541f, -0.324549019336700f,
+  0.880103349685669f, -0.324840664863586f, 0.879854083061218f, -0.325132101774216f,
+  0.879604578018188f, -0.325423330068588f, 0.879354894161224f, -0.325714409351349f,
+  0.879104971885681f, -0.326005280017853f, 0.878854811191559f, -0.326295942068100f,
+  0.878604412078857f, -0.326586425304413f, 0.878353834152222f, -0.326876699924469f,
+  0.878103017807007f, -0.327166795730591f, 0.877851963043213f, -0.327456712722778f,
+  0.877600669860840f, -0.327746421098709f, 0.877349197864532f, -0.328035950660706f,
+  0.877097487449646f, -0.328325271606445f, 0.876845538616180f, -0.328614413738251f,
+  0.876593410968781f, -0.328903347253799f, 0.876341044902802f, -0.329192101955414f,
+  0.876088440418243f, -0.329480648040771f, 0.875835597515106f, -0.329769015312195f,
+  0.875582575798035f, -0.330057173967361f, 0.875329315662384f, -0.330345153808594f,
+  0.875075817108154f, -0.330632925033569f, 0.874822139739990f, -0.330920487642288f,
+  0.874568223953247f, -0.331207901239395f, 0.874314069747925f, -0.331495076417923f,
+  0.874059677124023f, -0.331782072782516f, 0.873805105686188f, -0.332068890333176f,
+  0.873550295829773f, -0.332355499267578f, 0.873295307159424f, -0.332641899585724f,
+  0.873040020465851f, -0.332928121089935f, 0.872784554958344f, -0.333214133977890f,
+  0.872528910636902f, -0.333499968051910f, 0.872272968292236f, -0.333785593509674f,
+  0.872016847133636f, -0.334071010351181f, 0.871760547161102f, -0.334356248378754f,
+  0.871503949165344f, -0.334641307592392f, 0.871247172355652f, -0.334926128387451f,
+  0.870990216732025f, -0.335210770368576f, 0.870733022689819f, -0.335495233535767f,
+  0.870475590229034f, -0.335779488086700f, 0.870217919349670f, -0.336063534021378f,
+  0.869960069656372f, -0.336347371339798f, 0.869701981544495f, -0.336631029844284f,
+  0.869443655014038f, -0.336914509534836f, 0.869185149669647f, -0.337197750806808f,
+  0.868926405906677f, -0.337480813264847f, 0.868667483329773f, -0.337763696908951f,
+  0.868408262729645f, -0.338046342134476f, 0.868148922920227f, -0.338328808546066f,
+  0.867889285087585f, -0.338611096143723f, 0.867629468441010f, -0.338893145322800f,
+  0.867369413375854f, -0.339175015687943f, 0.867109179496765f, -0.339456677436829f,
+  0.866848707199097f, -0.339738160371780f, 0.866588056087494f, -0.340019434690475f,
+  0.866327106952667f, -0.340300500392914f, 0.866066038608551f, -0.340581357479095f,
+  0.865804672241211f, -0.340862035751343f, 0.865543127059937f, -0.341142505407333f,
+  0.865281403064728f, -0.341422766447067f, 0.865019381046295f, -0.341702848672867f,
+  0.864757239818573f, -0.341982692480087f, 0.864494800567627f, -0.342262357473373f,
+  0.864232182502747f, -0.342541843652725f, 0.863969385623932f, -0.342821091413498f,
+  0.863706290721893f, -0.343100160360336f, 0.863443076610565f, -0.343379020690918f,
+  0.863179564476013f, -0.343657672405243f, 0.862915873527527f, -0.343936115503311f,
+  0.862652003765106f, -0.344214379787445f, 0.862387895584106f, -0.344492435455322f,
+  0.862123548984528f, -0.344770282506943f, 0.861859023571014f, -0.345047920942307f,
+  0.861594259738922f, -0.345325350761414f, 0.861329257488251f, -0.345602601766586f,
+  0.861064076423645f, -0.345879614353180f, 0.860798716545105f, -0.346156448125839f,
+  0.860533118247986f, -0.346433073282242f, 0.860267281532288f, -0.346709519624710f,
+  0.860001266002655f, -0.346985727548599f, 0.859735012054443f, -0.347261756658554f,
+  0.859468579292297f, -0.347537547349930f, 0.859201908111572f, -0.347813159227371f,
+  0.858934998512268f, -0.348088562488556f, 0.858667910099030f, -0.348363757133484f,
+  0.858400642871857f, -0.348638743162155f, 0.858133137226105f, -0.348913550376892f,
+  0.857865393161774f, -0.349188119173050f, 0.857597470283508f, -0.349462509155273f,
+  0.857329368591309f, -0.349736660718918f, 0.857060968875885f, -0.350010633468628f,
+  0.856792449951172f, -0.350284397602081f, 0.856523692607880f, -0.350557953119278f,
+  0.856254696846008f, -0.350831300020218f, 0.855985522270203f, -0.351104438304901f,
+  0.855716109275818f, -0.351377367973328f, 0.855446517467499f, -0.351650089025497f,
+  0.855176687240601f, -0.351922631263733f, 0.854906618595123f, -0.352194935083389f,
+  0.854636430740356f, -0.352467030286789f, 0.854365944862366f, -0.352738946676254f,
+  0.854095339775085f, -0.353010624647141f, 0.853824436664581f, -0.353282123804092f,
+  0.853553414344788f, -0.353553384542465f, 0.853282094001770f, -0.353824466466904f,
+  0.853010654449463f, -0.354095309972763f, 0.852738916873932f, -0.354365974664688f,
+  0.852467060089111f, -0.354636400938034f, 0.852194905281067f, -0.354906648397446f,
+  0.851922631263733f, -0.355176687240601f, 0.851650118827820f, -0.355446487665176f,
+  0.851377367973328f, -0.355716109275818f, 0.851104438304901f, -0.355985492467880f,
+  0.850831270217896f, -0.356254696846008f, 0.850557923316956f, -0.356523662805557f,
+  0.850284397602081f, -0.356792420148849f, 0.850010633468628f, -0.357060998678207f,
+  0.849736690521240f, -0.357329338788986f, 0.849462509155273f, -0.357597470283508f,
+  0.849188148975372f, -0.357865422964096f, 0.848913550376892f, -0.358133137226105f,
+  0.848638772964478f, -0.358400642871857f, 0.848363757133484f, -0.358667939901352f,
+  0.848088562488556f, -0.358935028314590f, 0.847813189029694f, -0.359201908111572f,
+  0.847537577152252f, -0.359468549489975f, 0.847261726856232f, -0.359735012054443f,
+  0.846985757350922f, -0.360001266002655f, 0.846709489822388f, -0.360267281532288f,
+  0.846433103084564f, -0.360533088445663f, 0.846156477928162f, -0.360798716545105f,
+  0.845879614353180f, -0.361064106225967f, 0.845602571964264f, -0.361329287290573f,
+  0.845325350761414f, -0.361594229936600f, 0.845047891139984f, -0.361858993768692f,
+  0.844770252704620f, -0.362123548984528f, 0.844492435455322f, -0.362387865781784f,
+  0.844214379787445f, -0.362651973962784f, 0.843936145305634f, -0.362915903329849f,
+  0.843657672405243f, -0.363179564476013f, 0.843379020690918f, -0.363443046808243f,
+  0.843100130558014f, -0.363706320524216f, 0.842821121215820f, -0.363969355821610f,
+  0.842541813850403f, -0.364232182502747f, 0.842262387275696f, -0.364494800567627f,
+  0.841982722282410f, -0.364757210016251f, 0.841702818870544f, -0.365019410848618f,
+  0.841422796249390f, -0.365281373262405f, 0.841142535209656f, -0.365543156862259f,
+  0.840862035751343f, -0.365804702043533f, 0.840581357479095f, -0.366066008806229f,
+  0.840300500392914f, -0.366327136754990f, 0.840019404888153f, -0.366588026285172f,
+  0.839738130569458f, -0.366848707199097f, 0.839456677436829f, -0.367109179496765f,
+  0.839175045490265f, -0.367369443178177f, 0.838893175125122f, -0.367629468441010f,
+  0.838611066341400f, -0.367889285087585f, 0.838328838348389f, -0.368148893117905f,
+  0.838046371936798f, -0.368408292531967f, 0.837763667106628f, -0.368667453527451f,
+  0.837480843067169f, -0.368926405906677f, 0.837197780609131f, -0.369185149669647f,
+  0.836914479732513f, -0.369443655014038f, 0.836631059646606f, -0.369701951742172f,
+  0.836347401142120f, -0.369960039854050f, 0.836063504219055f, -0.370217919349670f,
+  0.835779488086700f, -0.370475560426712f, 0.835495233535767f, -0.370732992887497f,
+  0.835210800170898f, -0.370990216732025f, 0.834926128387451f, -0.371247202157974f,
+  0.834641277790070f, -0.371503978967667f, 0.834356248378754f, -0.371760547161102f,
+  0.834071040153503f, -0.372016876935959f, 0.833785593509674f, -0.372272998094559f,
+  0.833499968051910f, -0.372528880834579f, 0.833214163780212f, -0.372784584760666f,
+  0.832928121089935f, -0.373040050268173f, 0.832641899585724f, -0.373295277357101f,
+  0.832355499267578f, -0.373550295829773f, 0.832068860530853f, -0.373805105686188f,
+  0.831782102584839f, -0.374059677124023f, 0.831495106220245f, -0.374314039945602f,
+  0.831207871437073f, -0.374568194150925f, 0.830920517444611f, -0.374822109937668f,
+  0.830632925033569f, -0.375075817108154f, 0.830345153808594f, -0.375329315662384f,
+  0.830057144165039f, -0.375582575798035f, 0.829769015312195f, -0.375835597515106f,
+  0.829480648040771f, -0.376088410615921f, 0.829192101955414f, -0.376341015100479f,
+  0.828903317451477f, -0.376593410968781f, 0.828614413738251f, -0.376845568418503f,
+  0.828325271606445f, -0.377097487449646f, 0.828035950660706f, -0.377349197864532f,
+  0.827746450901031f, -0.377600699663162f, 0.827456712722778f, -0.377851963043213f,
+  0.827166795730591f, -0.378102988004684f, 0.826876699924469f, -0.378353834152222f,
+  0.826586425304413f, -0.378604412078857f, 0.826295912265778f, -0.378854811191559f,
+  0.826005280017853f, -0.379104942083359f, 0.825714409351349f, -0.379354894161224f,
+  0.825423359870911f, -0.379604607820511f, 0.825132071971893f, -0.379854083061218f,
+  0.824840664863586f, -0.380103349685669f, 0.824549019336700f, -0.380352377891541f,
+  0.824257194995880f, -0.380601197481155f, 0.823965191841125f, -0.380849778652191f,
+  0.823673009872437f, -0.381098151206970f, 0.823380589485168f, -0.381346285343170f,
+  0.823087990283966f, -0.381594210863113f, 0.822795212268829f, -0.381841897964478f,
+  0.822502255439758f, -0.382089376449585f, 0.822209119796753f, -0.382336616516113f,
+  0.821915745735168f, -0.382583618164063f, 0.821622252464294f, -0.382830440998077f,
+  0.821328520774841f, -0.383076995611191f, 0.821034610271454f, -0.383323341608047f,
+  0.820740520954132f, -0.383569449186325f, 0.820446193218231f, -0.383815348148346f,
+  0.820151746273041f, -0.384061008691788f, 0.819857060909271f, -0.384306460618973f,
+  0.819562196731567f, -0.384551674127579f, 0.819267153739929f, -0.384796649217606f,
+  0.818971931934357f, -0.385041415691376f, 0.818676531314850f, -0.385285943746567f,
+  0.818380951881409f, -0.385530263185501f, 0.818085134029388f, -0.385774344205856f,
+  0.817789137363434f, -0.386018186807632f, 0.817493021488190f, -0.386261820793152f,
+  0.817196667194366f, -0.386505216360092f, 0.816900074481964f, -0.386748403310776f,
+  0.816603362560272f, -0.386991351842880f, 0.816306471824646f, -0.387234061956406f,
+  0.816009342670441f, -0.387476563453674f, 0.815712094306946f, -0.387718826532364f,
+  0.815414607524872f, -0.387960851192474f, 0.815116941928864f, -0.388202667236328f,
+  0.814819097518921f, -0.388444244861603f, 0.814521074295044f, -0.388685584068298f,
+  0.814222872257233f, -0.388926714658737f, 0.813924491405487f, -0.389167606830597f,
+  0.813625931739807f, -0.389408260583878f, 0.813327133655548f, -0.389648675918579f,
+  0.813028216362000f, -0.389888882637024f, 0.812729060649872f, -0.390128880739212f,
+  0.812429726123810f, -0.390368610620499f, 0.812130272388458f, -0.390608131885529f,
+  0.811830580234528f, -0.390847414731979f, 0.811530709266663f, -0.391086459159851f,
+  0.811230659484863f, -0.391325294971466f, 0.810930430889130f, -0.391563892364502f,
+  0.810629963874817f, -0.391802251338959f, 0.810329377651215f, -0.392040401697159f,
+  0.810028612613678f, -0.392278283834457f, 0.809727668762207f, -0.392515957355499f,
+  0.809426486492157f, -0.392753422260284f, 0.809125185012817f, -0.392990618944168f,
+  0.808823645114899f, -0.393227607011795f, 0.808521986007690f, -0.393464356660843f,
+  0.808220088481903f, -0.393700867891312f, 0.807918012142181f, -0.393937170505524f,
+  0.807615816593170f, -0.394173204898834f, 0.807313382625580f, -0.394409030675888f,
+  0.807010769844055f, -0.394644618034363f, 0.806707978248596f, -0.394879996776581f,
+  0.806405067443848f, -0.395115107297897f, 0.806101918220520f, -0.395350009202957f,
+  0.805798590183258f, -0.395584672689438f, 0.805495083332062f, -0.395819097757339f,
+  0.805191397666931f, -0.396053284406662f, 0.804887533187866f, -0.396287262439728f,
+  0.804583489894867f, -0.396520972251892f, 0.804279267787933f, -0.396754473447800f,
+  0.803974866867065f, -0.396987736225128f, 0.803670346736908f, -0.397220760583878f,
+  0.803365588188171f, -0.397453576326370f, 0.803060650825500f, -0.397686123847961f,
+  0.802755534648895f, -0.397918462753296f, 0.802450239658356f, -0.398150533437729f,
+  0.802144765853882f, -0.398382395505905f, 0.801839113235474f, -0.398614019155502f,
+  0.801533281803131f, -0.398845434188843f, 0.801227271556854f, -0.399076581001282f,
+  0.800921142101288f, -0.399307489395142f, 0.800614774227142f, -0.399538189172745f,
+  0.800308227539063f, -0.399768620729446f, 0.800001561641693f, -0.399998843669891f,
+  0.799694657325745f, -0.400228828191757f, 0.799387574195862f, -0.400458574295044f,
+  0.799080371856689f, -0.400688081979752f, 0.798772931098938f, -0.400917351245880f,
+  0.798465371131897f, -0.401146411895752f, 0.798157572746277f, -0.401375204324722f,
+  0.797849655151367f, -0.401603758335114f, 0.797541558742523f, -0.401832103729248f,
+  0.797233223915100f, -0.402060180902481f, 0.796924769878387f, -0.402288049459457f,
+  0.796616137027740f, -0.402515679597855f, 0.796307325363159f, -0.402743041515350f,
+  0.795998334884644f, -0.402970194816589f, 0.795689165592194f, -0.403197109699249f,
+  0.795379877090454f, -0.403423786163330f, 0.795070350170136f, -0.403650224208832f,
+  0.794760644435883f, -0.403876423835754f, 0.794450819492340f, -0.404102355241776f,
+  0.794140756130219f, -0.404328078031540f, 0.793830573558807f, -0.404553562402725f,
+  0.793520212173462f, -0.404778808355331f, 0.793209671974182f, -0.405003815889359f,
+  0.792898952960968f, -0.405228585004807f, 0.792588055133820f, -0.405453115701675f,
+  0.792276978492737f, -0.405677437782288f, 0.791965723037720f, -0.405901491641998f,
+  0.791654348373413f, -0.406125307083130f, 0.791342735290527f, -0.406348884105682f,
+  0.791031002998352f, -0.406572192907333f, 0.790719091892242f, -0.406795293092728f,
+  0.790407001972198f, -0.407018154859543f, 0.790094733238220f, -0.407240778207779f,
+  0.789782285690308f, -0.407463163137436f, 0.789469659328461f, -0.407685309648514f,
+  0.789156913757324f, -0.407907217741013f, 0.788843929767609f, -0.408128857612610f,
+  0.788530826568604f, -0.408350288867950f, 0.788217544555664f, -0.408571451902390f,
+  0.787904083728790f, -0.408792406320572f, 0.787590444087982f, -0.409013092517853f,
+  0.787276685237885f, -0.409233570098877f, 0.786962687969208f, -0.409453779459000f,
+  0.786648571491241f, -0.409673750400543f, 0.786334276199341f, -0.409893482923508f,
+  0.786019802093506f, -0.410112977027893f, 0.785705149173737f, -0.410332232713699f,
+  0.785390377044678f, -0.410551249980927f, 0.785075426101685f, -0.410770028829575f,
+  0.784760236740112f, -0.410988569259644f, 0.784444928169250f, -0.411206841468811f,
+  0.784129500389099f, -0.411424905061722f, 0.783813834190369f, -0.411642700433731f,
+  0.783498048782349f, -0.411860257387161f, 0.783182024955750f, -0.412077575922012f,
+  0.782865881919861f, -0.412294656038284f, 0.782549619674683f, -0.412511497735977f,
+  0.782233119010925f, -0.412728071212769f, 0.781916499137878f, -0.412944436073303f,
+  0.781599700450897f, -0.413160532712936f, 0.781282722949982f, -0.413376390933990f,
+  0.780965566635132f, -0.413592010736465f, 0.780648231506348f, -0.413807392120361f,
+  0.780330777168274f, -0.414022535085678f, 0.780013144016266f, -0.414237409830093f,
+  0.779695332050323f, -0.414452046155930f, 0.779377400875092f, -0.414666473865509f,
+  0.779059290885925f, -0.414880603551865f, 0.778741002082825f, -0.415094524621964f,
+  0.778422534465790f, -0.415308207273483f, 0.778103888034821f, -0.415521621704102f,
+  0.777785122394562f, -0.415734797716141f, 0.777466177940369f, -0.415947735309601f,
+  0.777147054672241f, -0.416160434484482f, 0.776827812194824f, -0.416372895240784f,
+  0.776508331298828f, -0.416585087776184f, 0.776188731193542f, -0.416797041893005f,
+  0.775869011878967f, -0.417008757591248f, 0.775549054145813f, -0.417220205068588f,
+  0.775228977203369f, -0.417431443929672f, 0.774908721446991f, -0.417642414569855f,
+  0.774588346481323f, -0.417853146791458f, 0.774267733097076f, -0.418063640594482f,
+  0.773947000503540f, -0.418273866176605f, 0.773626148700714f, -0.418483853340149f,
+  0.773305058479309f, -0.418693602085114f, 0.772983849048615f, -0.418903112411499f,
+  0.772662520408630f, -0.419112354516983f, 0.772340953350067f, -0.419321358203888f,
+  0.772019267082214f, -0.419530123472214f, 0.771697402000427f, -0.419738620519638f,
+  0.771375417709351f, -0.419946908950806f, 0.771053194999695f, -0.420154929161072f,
+  0.770730912685394f, -0.420362681150436f, 0.770408391952515f, -0.420570224523544f,
+  0.770085752010345f, -0.420777499675751f, 0.769762933254242f, -0.420984506607056f,
+  0.769439935684204f, -0.421191304922104f, 0.769116818904877f, -0.421397835016251f,
+  0.768793523311615f, -0.421604126691818f, 0.768470108509064f, -0.421810150146484f,
+  0.768146514892578f, -0.422015935182571f, 0.767822742462158f, -0.422221481800079f,
+  0.767498791217804f, -0.422426789999008f, 0.767174720764160f, -0.422631829977036f,
+  0.766850471496582f, -0.422836631536484f, 0.766526103019714f, -0.423041164875031f,
+  0.766201555728912f, -0.423245459794998f, 0.765876889228821f, -0.423449516296387f,
+  0.765551984310150f, -0.423653304576874f, 0.765226960182190f, -0.423856884241104f,
+  0.764901816844940f, -0.424060165882111f, 0.764576494693756f, -0.424263238906860f,
+  0.764250993728638f, -0.424466013908386f, 0.763925373554230f, -0.424668580293655f,
+  0.763599574565887f, -0.424870878458023f, 0.763273596763611f, -0.425072938203812f,
+  0.762947499752045f, -0.425274729728699f, 0.762621283531189f, -0.425476282835007f,
+  0.762294828891754f, -0.425677597522736f, 0.761968255043030f, -0.425878643989563f,
+  0.761641561985016f, -0.426079452037811f, 0.761314690113068f, -0.426279991865158f,
+  0.760987639427185f, -0.426480293273926f, 0.760660469532013f, -0.426680356264114f,
+  0.760333120822906f, -0.426880151033401f, 0.760005652904511f, -0.427079707384110f,
+  0.759678006172180f, -0.427278995513916f, 0.759350180625916f, -0.427478045225143f,
+  0.759022235870361f, -0.427676826715469f, 0.758694171905518f, -0.427875369787216f,
+  0.758365929126740f, -0.428073674440384f, 0.758037507534027f, -0.428271710872650f,
+  0.757708966732025f, -0.428469479084015f, 0.757380247116089f, -0.428667008876801f,
+  0.757051348686218f, -0.428864300251007f, 0.756722390651703f, -0.429061323404312f,
+  0.756393194198608f, -0.429258108139038f, 0.756063878536224f, -0.429454624652863f,
+  0.755734443664551f, -0.429650902748108f, 0.755404829978943f, -0.429846942424774f,
+  0.755075037479401f, -0.430042684078217f, 0.754745125770569f, -0.430238217115402f,
+  0.754415094852448f, -0.430433481931686f, 0.754084885120392f, -0.430628478527069f,
+  0.753754496574402f, -0.430823236703873f, 0.753423988819122f, -0.431017726659775f,
+  0.753093302249908f, -0.431211978197098f, 0.752762496471405f, -0.431405961513519f,
+  0.752431571483612f, -0.431599706411362f, 0.752100467681885f, -0.431793183088303f,
+  0.751769185066223f, -0.431986421346664f, 0.751437783241272f, -0.432179391384125f,
+  0.751106262207031f, -0.432372123003006f, 0.750774562358856f, -0.432564586400986f,
+  0.750442683696747f, -0.432756811380386f, 0.750110685825348f, -0.432948768138886f,
+  0.749778568744659f, -0.433140486478806f, 0.749446272850037f, -0.433331936597824f,
+  0.749113857746124f, -0.433523118495941f, 0.748781263828278f, -0.433714061975479f,
+  0.748448550701141f, -0.433904737234116f, 0.748115658760071f, -0.434095174074173f,
+  0.747782647609711f, -0.434285342693329f, 0.747449457645416f, -0.434475272893906f,
+  0.747116148471832f, -0.434664934873581f, 0.746782720088959f, -0.434854328632355f,
+  0.746449112892151f, -0.435043483972549f, 0.746115326881409f, -0.435232400894165f,
+  0.745781481266022f, -0.435421019792557f, 0.745447397232056f, -0.435609430074692f,
+  0.745113253593445f, -0.435797542333603f, 0.744778931140900f, -0.435985416173935f,
+  0.744444429874420f, -0.436173021793365f, 0.744109809398651f, -0.436360388994217f,
+  0.743775069713593f, -0.436547487974167f, 0.743440151214600f, -0.436734348535538f,
+  0.743105113506317f, -0.436920911073685f, 0.742769956588745f, -0.437107264995575f,
+  0.742434620857239f, -0.437293320894241f, 0.742099165916443f, -0.437479138374329f,
+  0.741763532161713f, -0.437664687633514f, 0.741427779197693f, -0.437849998474121f,
+  0.741091907024384f, -0.438035041093826f, 0.740755856037140f, -0.438219845294952f,
+  0.740419685840607f, -0.438404351472855f, 0.740083336830139f, -0.438588619232178f,
+  0.739746868610382f, -0.438772648572922f, 0.739410281181335f, -0.438956409692764f,
+  0.739073514938354f, -0.439139902591705f, 0.738736629486084f, -0.439323127269745f,
+  0.738399624824524f, -0.439506113529205f, 0.738062441349030f, -0.439688831567764f,
+  0.737725138664246f, -0.439871311187744f, 0.737387716770172f, -0.440053492784500f,
+  0.737050116062164f, -0.440235435962677f, 0.736712396144867f, -0.440417140722275f,
+  0.736374497413635f, -0.440598547458649f, 0.736036539077759f, -0.440779715776443f,
+  0.735698342323303f, -0.440960645675659f, 0.735360085964203f, -0.441141277551651f,
+  0.735021650791168f, -0.441321671009064f, 0.734683096408844f, -0.441501796245575f,
+  0.734344422817230f, -0.441681683063507f, 0.734005570411682f, -0.441861271858215f,
+  0.733666598796844f, -0.442040622234344f, 0.733327507972717f, -0.442219734191895f,
+  0.732988238334656f, -0.442398548126221f, 0.732648849487305f, -0.442577123641968f,
+  0.732309341430664f, -0.442755430936813f, 0.731969714164734f, -0.442933470010757f,
+  0.731629908084869f, -0.443111270666122f, 0.731289982795715f, -0.443288803100586f,
+  0.730949878692627f, -0.443466067314148f, 0.730609714984894f, -0.443643063306808f,
+  0.730269372463226f, -0.443819820880890f, 0.729928910732269f, -0.443996280431747f,
+  0.729588270187378f, -0.444172531366348f, 0.729247510433197f, -0.444348484277725f,
+  0.728906631469727f, -0.444524168968201f, 0.728565633296967f, -0.444699615240097f,
+  0.728224515914917f, -0.444874793291092f, 0.727883219718933f, -0.445049703121185f,
+  0.727541804313660f, -0.445224374532700f, 0.727200269699097f, -0.445398747920990f,
+  0.726858556270599f, -0.445572882890701f, 0.726516723632813f, -0.445746749639511f,
+  0.726174771785736f, -0.445920348167419f, 0.725832700729370f, -0.446093708276749f,
+  0.725490510463715f, -0.446266770362854f, 0.725148141384125f, -0.446439594030380f,
+  0.724805653095245f, -0.446612149477005f, 0.724463045597076f, -0.446784436702728f,
+  0.724120318889618f, -0.446956485509872f, 0.723777413368225f, -0.447128236293793f,
+  0.723434448242188f, -0.447299748659134f, 0.723091304302216f, -0.447470992803574f,
+  0.722747981548309f, -0.447641968727112f, 0.722404599189758f, -0.447812676429749f,
+  0.722061097621918f, -0.447983115911484f, 0.721717417240143f, -0.448153316974640f,
+  0.721373617649078f, -0.448323249816895f, 0.721029698848724f, -0.448492884635925f,
+  0.720685660839081f, -0.448662281036377f, 0.720341444015503f, -0.448831409215927f,
+  0.719997107982636f, -0.449000298976898f, 0.719652712345123f, -0.449168890714645f,
+  0.719308137893677f, -0.449337244033813f, 0.718963444232941f, -0.449505299329758f,
+  0.718618571758270f, -0.449673116207123f, 0.718273639678955f, -0.449840664863586f,
+  0.717928528785706f, -0.450007945299149f, 0.717583298683167f, -0.450174957513809f,
+  0.717238008975983f, -0.450341701507568f, 0.716892480850220f, -0.450508207082748f,
+  0.716546893119812f, -0.450674414634705f, 0.716201186180115f, -0.450840383768082f,
+  0.715855300426483f, -0.451006084680557f, 0.715509355068207f, -0.451171487569809f,
+  0.715163230895996f, -0.451336652040482f, 0.714816987514496f, -0.451501548290253f,
+  0.714470624923706f, -0.451666176319122f, 0.714124143123627f, -0.451830536127090f,
+  0.713777542114258f, -0.451994657516479f, 0.713430821895599f, -0.452158480882645f,
+  0.713083922863007f, -0.452322036027908f, 0.712736964225769f, -0.452485352754593f,
+  0.712389826774597f, -0.452648371458054f, 0.712042629718781f, -0.452811151742935f,
+  0.711695253849030f, -0.452973634004593f, 0.711347758769989f, -0.453135877847672f,
+  0.711000144481659f, -0.453297853469849f, 0.710652410984039f, -0.453459560871124f,
+  0.710304558277130f, -0.453621000051498f, 0.709956526756287f, -0.453782171010971f,
+  0.709608435630798f, -0.453943043947220f, 0.709260225296021f, -0.454103678464890f,
+  0.708911836147308f, -0.454264044761658f, 0.708563387393951f, -0.454424172639847f,
+  0.708214759826660f, -0.454584002494812f, 0.707866072654724f, -0.454743564128876f,
+  0.707517206668854f, -0.454902857542038f, 0.707168221473694f, -0.455061882734299f,
+  0.706819176673889f, -0.455220639705658f, 0.706469953060150f, -0.455379128456116f,
+  0.706120610237122f, -0.455537378787994f, 0.705771148204803f, -0.455695331096649f,
+  0.705421566963196f, -0.455853015184402f, 0.705071866512299f, -0.456010431051254f,
+  0.704722046852112f, -0.456167578697205f, 0.704372167587280f, -0.456324487924576f,
+  0.704022109508514f, -0.456481099128723f, 0.703671932220459f, -0.456637442111969f,
+  0.703321635723114f, -0.456793516874313f, 0.702971220016479f, -0.456949323415756f,
+  0.702620685100555f, -0.457104891538620f, 0.702270030975342f, -0.457260161638260f,
+  0.701919257640839f, -0.457415163516998f, 0.701568365097046f, -0.457569897174835f,
+  0.701217353343964f, -0.457724362611771f, 0.700866222381592f, -0.457878559827805f,
+  0.700514972209930f, -0.458032488822937f, 0.700163602828979f, -0.458186149597168f,
+  0.699812114238739f, -0.458339542150497f, 0.699460506439209f, -0.458492636680603f,
+  0.699108779430389f, -0.458645492792130f, 0.698756933212280f, -0.458798080682755f,
+  0.698404967784882f, -0.458950400352478f, 0.698052942752838f, -0.459102421998978f,
+  0.697700738906860f, -0.459254205226898f, 0.697348415851593f, -0.459405690431595f,
+  0.696996033191681f, -0.459556937217712f, 0.696643471717834f, -0.459707885980606f,
+  0.696290850639343f, -0.459858566522598f, 0.695938050746918f, -0.460008978843689f,
+  0.695585191249847f, -0.460159152746201f, 0.695232212543488f, -0.460309028625488f,
+  0.694879114627838f, -0.460458606481552f, 0.694525837898254f, -0.460607945919037f,
+  0.694172501564026f, -0.460757017135620f, 0.693819046020508f, -0.460905820131302f,
+  0.693465530872345f, -0.461054325103760f, 0.693111836910248f, -0.461202591657639f,
+  0.692758023738861f, -0.461350560188293f, 0.692404091358185f, -0.461498260498047f,
+  0.692050099372864f, -0.461645722389221f, 0.691695988178253f, -0.461792886257172f,
+  0.691341698169708f, -0.461939752101898f, 0.690987348556519f, -0.462086379528046f,
+  0.690632879734039f, -0.462232738733292f, 0.690278291702271f, -0.462378799915314f,
+  0.689923584461212f, -0.462524622678757f, 0.689568817615509f, -0.462670147418976f,
+  0.689213871955872f, -0.462815403938293f, 0.688858866691589f, -0.462960392236710f,
+  0.688503682613373f, -0.463105112314224f, 0.688148438930511f, -0.463249564170837f,
+  0.687793076038361f, -0.463393747806549f, 0.687437593936920f, -0.463537633419037f,
+  0.687082052230835f, -0.463681250810623f, 0.686726331710815f, -0.463824629783630f,
+  0.686370551586151f, -0.463967710733414f, 0.686014592647552f, -0.464110493659973f,
+  0.685658574104309f, -0.464253038167953f, 0.685302436351776f, -0.464395314455032f,
+  0.684946238994598f, -0.464537292718887f, 0.684589862823486f, -0.464679002761841f,
+  0.684233427047729f, -0.464820444583893f, 0.683876872062683f, -0.464961618185043f,
+  0.683520197868347f, -0.465102523565292f, 0.683163404464722f, -0.465243130922318f,
+  0.682806491851807f, -0.465383470058441f, 0.682449519634247f, -0.465523540973663f,
+  0.682092368602753f, -0.465663343667984f, 0.681735157966614f, -0.465802878141403f,
+  0.681377887725830f, -0.465942144393921f, 0.681020438671112f, -0.466081112623215f,
+  0.680662930011749f, -0.466219812631607f, 0.680305242538452f, -0.466358244419098f,
+  0.679947495460510f, -0.466496407985687f, 0.679589688777924f, -0.466634273529053f,
+  0.679231703281403f, -0.466771900653839f, 0.678873658180237f, -0.466909229755402f,
+  0.678515493869781f, -0.467046260833740f, 0.678157210350037f, -0.467183053493500f,
+  0.677798807621002f, -0.467319577932358f, 0.677440345287323f, -0.467455804347992f,
+  0.677081763744354f, -0.467591762542725f, 0.676723062992096f, -0.467727422714233f,
+  0.676364302635193f, -0.467862844467163f, 0.676005363464355f, -0.467997968196869f,
+  0.675646364688873f, -0.468132823705673f, 0.675287246704102f, -0.468267410993576f,
+  0.674928069114685f, -0.468401730060577f, 0.674568772315979f, -0.468535751104355f,
+  0.674209356307983f, -0.468669503927231f, 0.673849821090698f, -0.468802988529205f,
+  0.673490226268768f, -0.468936175107956f, 0.673130512237549f, -0.469069123268127f,
+  0.672770678997040f, -0.469201773405075f, 0.672410726547241f, -0.469334155321121f,
+  0.672050714492798f, -0.469466239213943f, 0.671690583229065f, -0.469598054885864f,
+  0.671330332756042f, -0.469729602336884f, 0.670970022678375f, -0.469860881567001f,
+  0.670609593391418f, -0.469991862773895f, 0.670249044895172f, -0.470122605562210f,
+  0.669888436794281f, -0.470253020524979f, 0.669527709484100f, -0.470383197069168f,
+  0.669166862964630f, -0.470513075590134f, 0.668805956840515f, -0.470642685890198f,
+  0.668444931507111f, -0.470772027969360f, 0.668083786964417f, -0.470901101827621f,
+  0.667722582817078f, -0.471029877662659f, 0.667361259460449f, -0.471158385276794f,
+  0.666999816894531f, -0.471286594867706f, 0.666638314723969f, -0.471414536237717f,
+  0.666276693344116f, -0.471542209386826f, 0.665914952754974f, -0.471669614315033f,
+  0.665553152561188f, -0.471796721220016f, 0.665191233158112f, -0.471923559904099f,
+  0.664829254150391f, -0.472050130367279f, 0.664467096328735f, -0.472176402807236f,
+  0.664104938507080f, -0.472302407026291f, 0.663742601871490f, -0.472428143024445f,
+  0.663380205631256f, -0.472553610801697f, 0.663017749786377f, -0.472678780555725f,
+  0.662655174732208f, -0.472803652286530f, 0.662292480468750f, -0.472928285598755f,
+  0.661929666996002f, -0.473052620887756f, 0.661566793918610f, -0.473176687955856f,
+  0.661203861236572f, -0.473300457000732f, 0.660840749740601f, -0.473423957824707f,
+  0.660477638244629f, -0.473547190427780f, 0.660114347934723f, -0.473670125007629f,
+  0.659750998020172f, -0.473792791366577f, 0.659387588500977f, -0.473915189504623f,
+  0.659024059772491f, -0.474037289619446f, 0.658660411834717f, -0.474159121513367f,
+  0.658296704292297f, -0.474280685186386f, 0.657932877540588f, -0.474401950836182f,
+  0.657568991184235f, -0.474522948265076f, 0.657204985618591f, -0.474643647670746f,
+  0.656840860843658f, -0.474764078855515f, 0.656476676464081f, -0.474884241819382f,
+  0.656112432479858f, -0.475004136562347f, 0.655748009681702f, -0.475123733282089f,
+  0.655383586883545f, -0.475243031978607f, 0.655019044876099f, -0.475362062454224f,
+  0.654654383659363f, -0.475480824708939f, 0.654289662837982f, -0.475599318742752f,
+  0.653924822807312f, -0.475717514753342f, 0.653559923171997f, -0.475835442543030f,
+  0.653194904327393f, -0.475953072309494f, 0.652829825878143f, -0.476070433855057f,
+  0.652464628219604f, -0.476187497377396f, 0.652099311351776f, -0.476304292678833f,
+  0.651733994483948f, -0.476420819759369f, 0.651368498802185f, -0.476537048816681f,
+  0.651003003120422f, -0.476653009653091f, 0.650637328624725f, -0.476768702268600f,
+  0.650271594524384f, -0.476884096860886f, 0.649905800819397f, -0.476999223232269f,
+  0.649539887905121f, -0.477114051580429f, 0.649173915386200f, -0.477228611707687f,
+  0.648807883262634f, -0.477342873811722f, 0.648441672325134f, -0.477456867694855f,
+  0.648075461387634f, -0.477570593357086f, 0.647709131240845f, -0.477684020996094f,
+  0.647342681884766f, -0.477797180414200f, 0.646976172924042f, -0.477910041809082f,
+  0.646609604358673f, -0.478022634983063f, 0.646242916584015f, -0.478134930133820f,
+  0.645876109600067f, -0.478246957063675f, 0.645509302616119f, -0.478358715772629f,
+  0.645142316818237f, -0.478470176458359f, 0.644775331020355f, -0.478581339120865f,
+  0.644408226013184f, -0.478692263364792f, 0.644041001796722f, -0.478802859783173f,
+  0.643673717975616f, -0.478913217782974f, 0.643306374549866f, -0.479023247957230f,
+  0.642938911914825f, -0.479133039712906f, 0.642571389675140f, -0.479242533445358f,
+  0.642203748226166f, -0.479351729154587f, 0.641836047172546f, -0.479460656642914f,
+  0.641468286514282f, -0.479569315910339f, 0.641100406646729f, -0.479677677154541f,
+  0.640732467174530f, -0.479785770177841f, 0.640364408493042f, -0.479893565177917f,
+  0.639996349811554f, -0.480001062154770f, 0.639628112316132f, -0.480108320713043f,
+  0.639259815216064f, -0.480215251445770f, 0.638891458511353f, -0.480321943759918f,
+  0.638523042201996f, -0.480428308248520f, 0.638154506683350f, -0.480534434318542f,
+  0.637785911560059f, -0.480640232563019f, 0.637417197227478f, -0.480745792388916f,
+  0.637048482894897f, -0.480851024389267f, 0.636679589748383f, -0.480956017971039f,
+  0.636310696601868f, -0.481060713529587f, 0.635941684246063f, -0.481165111064911f,
+  0.635572552680969f, -0.481269240379334f, 0.635203421115875f, -0.481373071670532f,
+  0.634834170341492f, -0.481476634740829f, 0.634464859962463f, -0.481579899787903f,
+  0.634095430374146f, -0.481682896614075f, 0.633725941181183f, -0.481785595417023f,
+  0.633356392383575f, -0.481888025999069f, 0.632986724376678f, -0.481990188360214f,
+  0.632616996765137f, -0.482092022895813f, 0.632247209548950f, -0.482193619012833f,
+  0.631877362728119f, -0.482294887304306f, 0.631507396697998f, -0.482395917177200f,
+  0.631137371063232f, -0.482496619224548f, 0.630767226219177f, -0.482597053050995f,
+  0.630397081375122f, -0.482697218656540f, 0.630026817321777f, -0.482797086238861f,
+  0.629656434059143f, -0.482896685600281f, 0.629286050796509f, -0.482995986938477f,
+  0.628915548324585f, -0.483094990253448f, 0.628544986248016f, -0.483193725347519f,
+  0.628174364566803f, -0.483292192220688f, 0.627803623676300f, -0.483390361070633f,
+  0.627432823181152f, -0.483488231897354f, 0.627061963081360f, -0.483585834503174f,
+  0.626691043376923f, -0.483683139085770f, 0.626320004463196f, -0.483780175447464f,
+  0.625948905944824f, -0.483876913785934f, 0.625577747821808f, -0.483973383903503f,
+  0.625206530094147f, -0.484069555997849f, 0.624835193157196f, -0.484165430068970f,
+  0.624463796615601f, -0.484261035919189f, 0.624092340469360f, -0.484356373548508f,
+  0.623720824718475f, -0.484451413154602f, 0.623349189758301f, -0.484546154737473f,
+  0.622977554798126f, -0.484640628099442f, 0.622605800628662f, -0.484734803438187f,
+  0.622233927249908f, -0.484828680753708f, 0.621862053871155f, -0.484922289848328f,
+  0.621490061283112f, -0.485015630722046f, 0.621118068695068f, -0.485108673572540f,
+  0.620745956897736f, -0.485201418399811f, 0.620373785495758f, -0.485293895006180f,
+  0.620001494884491f, -0.485386073589325f, 0.619629204273224f, -0.485477954149246f,
+  0.619256794452667f, -0.485569566488266f, 0.618884325027466f, -0.485660910606384f,
+  0.618511795997620f, -0.485751956701279f, 0.618139207363129f, -0.485842704772949f,
+  0.617766559123993f, -0.485933154821396f, 0.617393791675568f, -0.486023366451263f,
+  0.617020964622498f, -0.486113250255585f, 0.616648077964783f, -0.486202865839005f,
+  0.616275131702423f, -0.486292183399200f, 0.615902125835419f, -0.486381232738495f,
+  0.615529060363770f, -0.486469984054565f, 0.615155875682831f, -0.486558437347412f,
+  0.614782691001892f, -0.486646622419357f, 0.614409387111664f, -0.486734509468079f,
+  0.614036023616791f, -0.486822128295898f, 0.613662600517273f, -0.486909449100494f,
+  0.613289117813110f, -0.486996471881866f, 0.612915575504303f, -0.487083226442337f,
+  0.612541973590851f, -0.487169682979584f, 0.612168252468109f, -0.487255871295929f,
+  0.611794531345367f, -0.487341761589050f, 0.611420691013336f, -0.487427353858948f,
+  0.611046791076660f, -0.487512677907944f, 0.610672831535339f, -0.487597703933716f,
+  0.610298871994019f, -0.487682431936264f, 0.609924793243408f, -0.487766891717911f,
+  0.609550595283508f, -0.487851053476334f, 0.609176397323608f, -0.487934947013855f,
+  0.608802139759064f, -0.488018542528152f, 0.608427822589874f, -0.488101840019226f,
+  0.608053386211395f, -0.488184869289398f, 0.607678949832916f, -0.488267600536346f,
+  0.607304394245148f, -0.488350033760071f, 0.606929838657379f, -0.488432198762894f,
+  0.606555163860321f, -0.488514065742493f, 0.606180429458618f, -0.488595664501190f,
+  0.605805635452271f, -0.488676935434341f, 0.605430841445923f, -0.488757967948914f,
+  0.605055928230286f, -0.488838672637939f, 0.604680955410004f, -0.488919109106064f,
+  0.604305922985077f, -0.488999247550964f, 0.603930830955505f, -0.489079117774963f,
+  0.603555679321289f, -0.489158689975739f, 0.603180468082428f, -0.489237964153290f,
+  0.602805197238922f, -0.489316970109940f, 0.602429866790771f, -0.489395678043365f,
+  0.602054476737976f, -0.489474087953568f, 0.601679027080536f, -0.489552229642868f,
+  0.601303517818451f, -0.489630073308945f, 0.600927948951721f, -0.489707618951797f,
+  0.600552320480347f, -0.489784896373749f, 0.600176632404327f, -0.489861875772476f,
+  0.599800884723663f, -0.489938557147980f, 0.599425077438354f, -0.490014940500259f,
+  0.599049210548401f, -0.490091055631638f, 0.598673284053802f, -0.490166902542114f,
+  0.598297297954559f, -0.490242421627045f, 0.597921252250671f, -0.490317672491074f,
+  0.597545146942139f, -0.490392625331879f, 0.597168982028961f, -0.490467309951782f,
+  0.596792817115784f, -0.490541696548462f, 0.596416532993317f, -0.490615785121918f,
+  0.596040189266205f, -0.490689605474472f, 0.595663845539093f, -0.490763127803802f,
+  0.595287382602692f, -0.490836352109909f, 0.594910860061646f, -0.490909278392792f,
+  0.594534337520599f, -0.490981936454773f, 0.594157755374908f, -0.491054296493530f,
+  0.593781054019928f, -0.491126358509064f, 0.593404352664948f, -0.491198152303696f,
+  0.593027591705322f, -0.491269648075104f, 0.592650771141052f, -0.491340845823288f,
+  0.592273890972137f, -0.491411775350571f, 0.591896951198578f, -0.491482406854630f,
+  0.591519951820374f, -0.491552740335464f, 0.591142892837524f, -0.491622805595398f,
+  0.590765833854675f, -0.491692543029785f, 0.590388655662537f, -0.491762012243271f,
+  0.590011477470398f, -0.491831213235855f, 0.589634180068970f, -0.491900116205215f,
+  0.589256882667542f, -0.491968721151352f, 0.588879525661469f, -0.492037028074265f,
+  0.588502109050751f, -0.492105036973953f, 0.588124632835388f, -0.492172777652740f,
+  0.587747097015381f, -0.492240220308304f, 0.587369561195374f, -0.492307394742966f,
+  0.586991965770721f, -0.492374241352081f, 0.586614251136780f, -0.492440819740295f,
+  0.586236536502838f, -0.492507129907608f, 0.585858762264252f, -0.492573112249374f,
+  0.585480928421021f, -0.492638826370239f, 0.585103094577789f, -0.492704242467880f,
+  0.584725141525269f, -0.492769360542297f, 0.584347188472748f, -0.492834210395813f,
+  0.583969175815582f, -0.492898762226105f, 0.583591103553772f, -0.492963016033173f,
+  0.583212971687317f, -0.493026971817017f, 0.582834780216217f, -0.493090659379959f,
+  0.582456588745117f, -0.493154048919678f, 0.582078278064728f, -0.493217140436172f,
+  0.581699967384338f, -0.493279963731766f, 0.581321597099304f, -0.493342459201813f,
+  0.580943167209625f, -0.493404686450958f, 0.580564737319946f, -0.493466645479202f,
+  0.580186247825623f, -0.493528276681900f, 0.579807698726654f, -0.493589639663696f,
+  0.579429090023041f, -0.493650704622269f, 0.579050421714783f, -0.493711471557617f,
+  0.578671753406525f, -0.493771970272064f, 0.578292965888977f, -0.493832170963287f,
+  0.577914178371429f, -0.493892073631287f, 0.577535390853882f, -0.493951678276062f,
+  0.577156484127045f, -0.494011014699936f, 0.576777577400208f, -0.494070053100586f,
+  0.576398611068726f, -0.494128793478012f, 0.576019585132599f, -0.494187235832214f,
+  0.575640499591827f, -0.494245409965515f, 0.575261414051056f, -0.494303256273270f,
+  0.574882268905640f, -0.494360834360123f, 0.574503064155579f, -0.494418144226074f,
+  0.574123859405518f, -0.494475126266479f, 0.573744535446167f, -0.494531840085983f,
+  0.573365211486816f, -0.494588255882263f, 0.572985887527466f, -0.494644373655319f,
+  0.572606444358826f, -0.494700223207474f, 0.572227001190186f, -0.494755744934082f,
+  0.571847498416901f, -0.494810998439789f, 0.571467995643616f, -0.494865983724594f,
+  0.571088373661041f, -0.494920641183853f, 0.570708811283112f, -0.494975030422211f,
+  0.570329129695892f, -0.495029091835022f, 0.569949388504028f, -0.495082914829254f,
+  0.569569647312164f, -0.495136409997940f, 0.569189906120300f, -0.495189607143402f,
+  0.568810045719147f, -0.495242536067963f, 0.568430185317993f, -0.495295166969299f,
+  0.568050265312195f, -0.495347499847412f, 0.567670345306396f, -0.495399564504623f,
+  0.567290365695953f, -0.495451331138611f, 0.566910326480865f, -0.495502769947052f,
+  0.566530287265778f, -0.495553970336914f, 0.566150128841400f, -0.495604842901230f,
+  0.565770030021667f, -0.495655417442322f, 0.565389811992645f, -0.495705723762512f,
+  0.565009593963623f, -0.495755732059479f, 0.564629375934601f, -0.495805442333221f,
+  0.564249038696289f, -0.495854884386063f, 0.563868701457977f, -0.495903998613358f,
+  0.563488364219666f, -0.495952844619751f, 0.563107967376709f, -0.496001392602921f,
+  0.562727510929108f, -0.496049642562866f, 0.562346994876862f, -0.496097624301910f,
+  0.561966478824615f, -0.496145308017731f, 0.561585903167725f, -0.496192663908005f,
+  0.561205327510834f, -0.496239781379700f, 0.560824692249298f, -0.496286571025848f,
+  0.560444056987762f, -0.496333062648773f, 0.560063362121582f, -0.496379286050797f,
+  0.559682607650757f, -0.496425211429596f, 0.559301853179932f, -0.496470838785172f,
+  0.558921039104462f, -0.496516168117523f, 0.558540165424347f, -0.496561229228973f,
+  0.558159291744232f, -0.496605962514877f, 0.557778418064117f, -0.496650427579880f,
+  0.557397484779358f, -0.496694594621658f, 0.557016491889954f, -0.496738493442535f,
+  0.556635499000549f, -0.496782064437866f, 0.556254446506500f, -0.496825367212296f,
+  0.555873334407806f, -0.496868371963501f, 0.555492222309113f, -0.496911078691483f,
+  0.555111110210419f, -0.496953487396240f, 0.554729938507080f, -0.496995598077774f,
+  0.554348707199097f, -0.497037440538406f, 0.553967475891113f, -0.497078984975815f,
+  0.553586184978485f, -0.497120231389999f, 0.553204894065857f, -0.497161179780960f,
+  0.552823603153229f, -0.497201830148697f, 0.552442193031311f, -0.497242212295532f,
+  0.552060842514038f, -0.497282296419144f, 0.551679372787476f, -0.497322082519531f,
+  0.551297962665558f, -0.497361570596695f, 0.550916433334351f, -0.497400760650635f,
+  0.550534904003143f, -0.497439652681351f, 0.550153374671936f, -0.497478276491165f,
+  0.549771785736084f, -0.497516602277756f, 0.549390196800232f, -0.497554630041122f,
+  0.549008548259735f, -0.497592359781265f, 0.548626899719238f, -0.497629791498184f,
+  0.548245191574097f, -0.497666954994202f, 0.547863483428955f, -0.497703820466995f,
+  0.547481775283813f, -0.497740387916565f, 0.547099947929382f, -0.497776657342911f,
+  0.546718180179596f, -0.497812628746033f, 0.546336352825165f, -0.497848302125931f,
+  0.545954465866089f, -0.497883707284927f, 0.545572578907013f, -0.497918814420700f,
+  0.545190691947937f, -0.497953623533249f, 0.544808745384216f, -0.497988134622574f,
+  0.544426798820496f, -0.498022347688675f, 0.544044792652130f, -0.498056292533875f,
+  0.543662786483765f, -0.498089909553528f, 0.543280720710754f, -0.498123258352280f,
+  0.542898654937744f, -0.498156309127808f, 0.542516589164734f, -0.498189061880112f,
+  0.542134463787079f, -0.498221516609192f, 0.541752278804779f, -0.498253703117371f,
+  0.541370153427124f, -0.498285561800003f, 0.540987968444824f, -0.498317152261734f,
+  0.540605723857880f, -0.498348444700241f, 0.540223479270935f, -0.498379439115524f,
+  0.539841234683990f, -0.498410135507584f, 0.539458930492401f, -0.498440563678741f,
+  0.539076626300812f, -0.498470664024353f, 0.538694262504578f, -0.498500496149063f,
+  0.538311958312988f, -0.498530030250549f, 0.537929534912109f, -0.498559266328812f,
+  0.537547171115875f, -0.498588204383850f, 0.537164747714996f, -0.498616874217987f,
+  0.536782264709473f, -0.498645216226578f, 0.536399841308594f, -0.498673290014267f,
+  0.536017298698425f, -0.498701065778732f, 0.535634815692902f, -0.498728543519974f,
+  0.535252273082733f, -0.498755723237991f, 0.534869730472565f, -0.498782604932785f,
+  0.534487187862396f, -0.498809218406677f, 0.534104585647583f, -0.498835533857346f,
+  0.533721983432770f, -0.498861521482468f, 0.533339321613312f, -0.498887240886688f,
+  0.532956659793854f, -0.498912662267685f, 0.532573997974396f, -0.498937815427780f,
+  0.532191336154938f, -0.498962640762329f, 0.531808614730835f, -0.498987197875977f,
+  0.531425893306732f, -0.499011427164078f, 0.531043112277985f, -0.499035388231277f,
+  0.530660390853882f, -0.499059051275253f, 0.530277609825134f, -0.499082416296005f,
+  0.529894769191742f, -0.499105513095856f, 0.529511988162994f, -0.499128282070160f,
+  0.529129147529602f, -0.499150782823563f, 0.528746306896210f, -0.499172955751419f,
+  0.528363406658173f, -0.499194860458374f, 0.527980506420136f, -0.499216467142105f,
+  0.527597606182098f, -0.499237775802612f, 0.527214705944061f, -0.499258816242218f,
+  0.526831746101379f, -0.499279528856277f, 0.526448845863342f, -0.499299973249435f,
+  0.526065826416016f, -0.499320119619370f, 0.525682866573334f, -0.499339967966080f,
+  0.525299847126007f, -0.499359518289566f, 0.524916887283325f, -0.499378770589828f,
+  0.524533808231354f, -0.499397724866867f, 0.524150788784027f, -0.499416410923004f,
+  0.523767769336700f, -0.499434769153595f, 0.523384690284729f, -0.499452859163284f,
+  0.523001611232758f, -0.499470651149750f, 0.522618472576141f, -0.499488145112991f,
+  0.522235393524170f, -0.499505341053009f, 0.521852254867554f, -0.499522238969803f,
+  0.521469116210938f, -0.499538868665695f, 0.521085977554321f, -0.499555170536041f,
+  0.520702838897705f, -0.499571204185486f, 0.520319640636444f, -0.499586939811707f,
+  0.519936442375183f, -0.499602377414703f, 0.519553244113922f, -0.499617516994476f,
+  0.519170045852661f, -0.499632388353348f, 0.518786847591400f, -0.499646931886673f,
+  0.518403589725494f, -0.499661177396774f, 0.518020391464233f, -0.499675154685974f,
+  0.517637133598328f, -0.499688833951950f, 0.517253875732422f, -0.499702215194702f,
+  0.516870558261871f, -0.499715298414230f, 0.516487300395966f, -0.499728083610535f,
+  0.516103982925415f, -0.499740600585938f, 0.515720725059509f, -0.499752789735794f,
+  0.515337407588959f, -0.499764710664749f, 0.514954090118408f, -0.499776333570480f,
+  0.514570772647858f, -0.499787658452988f, 0.514187395572662f, -0.499798685312271f,
+  0.513804078102112f, -0.499809414148331f, 0.513420701026917f, -0.499819844961166f,
+  0.513037383556366f, -0.499830007553101f, 0.512654006481171f, -0.499839842319489f,
+  0.512270629405975f, -0.499849408864975f, 0.511887252330780f, -0.499858677387238f,
+  0.511503815650940f, -0.499867647886276f, 0.511120438575745f, -0.499876320362091f,
+  0.510737061500549f, -0.499884694814682f, 0.510353624820709f, -0.499892801046371f,
+  0.509970188140869f, -0.499900579452515f, 0.509586811065674f, -0.499908089637756f,
+  0.509203374385834f, -0.499915301799774f, 0.508819937705994f, -0.499922215938568f,
+  0.508436501026154f, -0.499928832054138f, 0.508053064346313f, -0.499935150146484f,
+  0.507669627666473f, -0.499941170215607f, 0.507286131381989f, -0.499946922063828f,
+  0.506902694702148f, -0.499952346086502f, 0.506519258022308f, -0.499957501888275f,
+  0.506135761737823f, -0.499962359666824f, 0.505752325057983f, -0.499966919422150f,
+  0.505368828773499f, -0.499971181154251f, 0.504985332489014f, -0.499975144863129f,
+  0.504601895809174f, -0.499978810548782f, 0.504218399524689f, -0.499982208013535f,
+  0.503834903240204f, -0.499985307455063f, 0.503451406955719f, -0.499988079071045f,
+  0.503067970275879f, -0.499990582466125f, 0.502684473991394f, -0.499992787837982f,
+  0.502300977706909f, -0.499994695186615f, 0.501917481422424f, -0.499996334314346f,
+  0.501533985137939f, -0.499997645616531f, 0.501150488853455f, -0.499998688697815f,
+  0.500766992568970f, -0.499999403953552f, 0.500383496284485f, -0.499999850988388f,
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
+/**
+  @par
+  Generation fixed-point realCoefAQ31 array in Q31 format:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+  @par
+  Convert to fixed point Q31 format
+      round(pATable[i] * pow(2, 31))
+*/
+const q31_t realCoefAQ31[8192] = {
+    (q31_t)0x40000000, (q31_t)0xc0000000, (q31_t)0x3ff36f02, (q31_t)0xc000013c,
+    (q31_t)0x3fe6de05, (q31_t)0xc00004ef, (q31_t)0x3fda4d09, (q31_t)0xc0000b1a,
+    (q31_t)0x3fcdbc0f, (q31_t)0xc00013bd, (q31_t)0x3fc12b16, (q31_t)0xc0001ed8,
+    (q31_t)0x3fb49a1f, (q31_t)0xc0002c6a, (q31_t)0x3fa8092c, (q31_t)0xc0003c74,
+    (q31_t)0x3f9b783c, (q31_t)0xc0004ef5, (q31_t)0x3f8ee750, (q31_t)0xc00063ee,
+    (q31_t)0x3f825668, (q31_t)0xc0007b5f, (q31_t)0x3f75c585, (q31_t)0xc0009547,
+    (q31_t)0x3f6934a8, (q31_t)0xc000b1a7, (q31_t)0x3f5ca3d0, (q31_t)0xc000d07e,
+    (q31_t)0x3f5012fe, (q31_t)0xc000f1ce, (q31_t)0x3f438234, (q31_t)0xc0011594,
+    (q31_t)0x3f36f170, (q31_t)0xc0013bd3, (q31_t)0x3f2a60b4, (q31_t)0xc0016489,
+    (q31_t)0x3f1dd001, (q31_t)0xc0018fb6, (q31_t)0x3f113f56, (q31_t)0xc001bd5c,
+    (q31_t)0x3f04aeb5, (q31_t)0xc001ed78, (q31_t)0x3ef81e1d, (q31_t)0xc002200d,
+    (q31_t)0x3eeb8d8f, (q31_t)0xc0025519, (q31_t)0x3edefd0c, (q31_t)0xc0028c9c,
+    (q31_t)0x3ed26c94, (q31_t)0xc002c697, (q31_t)0x3ec5dc28, (q31_t)0xc003030a,
+    (q31_t)0x3eb94bc8, (q31_t)0xc00341f4, (q31_t)0x3eacbb74, (q31_t)0xc0038356,
+    (q31_t)0x3ea02b2e, (q31_t)0xc003c72f, (q31_t)0x3e939af5, (q31_t)0xc0040d80,
+    (q31_t)0x3e870aca, (q31_t)0xc0045648, (q31_t)0x3e7a7aae, (q31_t)0xc004a188,
+    (q31_t)0x3e6deaa1, (q31_t)0xc004ef3f, (q31_t)0x3e615aa3, (q31_t)0xc0053f6e,
+    (q31_t)0x3e54cab5, (q31_t)0xc0059214, (q31_t)0x3e483ad8, (q31_t)0xc005e731,
+    (q31_t)0x3e3bab0b, (q31_t)0xc0063ec6, (q31_t)0x3e2f1b50, (q31_t)0xc00698d3,
+    (q31_t)0x3e228ba7, (q31_t)0xc006f556, (q31_t)0x3e15fc11, (q31_t)0xc0075452,
+    (q31_t)0x3e096c8d, (q31_t)0xc007b5c4, (q31_t)0x3dfcdd1d, (q31_t)0xc00819ae,
+    (q31_t)0x3df04dc0, (q31_t)0xc008800f, (q31_t)0x3de3be78, (q31_t)0xc008e8e8,
+    (q31_t)0x3dd72f45, (q31_t)0xc0095438, (q31_t)0x3dcaa027, (q31_t)0xc009c1ff,
+    (q31_t)0x3dbe111e, (q31_t)0xc00a323d, (q31_t)0x3db1822c, (q31_t)0xc00aa4f3,
+    (q31_t)0x3da4f351, (q31_t)0xc00b1a20, (q31_t)0x3d98648d, (q31_t)0xc00b91c4,
+    (q31_t)0x3d8bd5e1, (q31_t)0xc00c0be0, (q31_t)0x3d7f474d, (q31_t)0xc00c8872,
+    (q31_t)0x3d72b8d2, (q31_t)0xc00d077c, (q31_t)0x3d662a70, (q31_t)0xc00d88fd,
+    (q31_t)0x3d599c28, (q31_t)0xc00e0cf5, (q31_t)0x3d4d0df9, (q31_t)0xc00e9364,
+    (q31_t)0x3d407fe6, (q31_t)0xc00f1c4a, (q31_t)0x3d33f1ed, (q31_t)0xc00fa7a8,
+    (q31_t)0x3d276410, (q31_t)0xc010357c, (q31_t)0x3d1ad650, (q31_t)0xc010c5c7,
+    (q31_t)0x3d0e48ab, (q31_t)0xc011588a, (q31_t)0x3d01bb24, (q31_t)0xc011edc3,
+    (q31_t)0x3cf52dbb, (q31_t)0xc0128574, (q31_t)0x3ce8a06f, (q31_t)0xc0131f9b,
+    (q31_t)0x3cdc1342, (q31_t)0xc013bc39, (q31_t)0x3ccf8634, (q31_t)0xc0145b4e,
+    (q31_t)0x3cc2f945, (q31_t)0xc014fcda, (q31_t)0x3cb66c77, (q31_t)0xc015a0dd,
+    (q31_t)0x3ca9dfc8, (q31_t)0xc0164757, (q31_t)0x3c9d533b, (q31_t)0xc016f047,
+    (q31_t)0x3c90c6cf, (q31_t)0xc0179bae, (q31_t)0x3c843a85, (q31_t)0xc018498c,
+    (q31_t)0x3c77ae5e, (q31_t)0xc018f9e1, (q31_t)0x3c6b2259, (q31_t)0xc019acac,
+    (q31_t)0x3c5e9678, (q31_t)0xc01a61ee, (q31_t)0x3c520aba, (q31_t)0xc01b19a7,
+    (q31_t)0x3c457f21, (q31_t)0xc01bd3d6, (q31_t)0x3c38f3ac, (q31_t)0xc01c907c,
+    (q31_t)0x3c2c685d, (q31_t)0xc01d4f99, (q31_t)0x3c1fdd34, (q31_t)0xc01e112b,
+    (q31_t)0x3c135231, (q31_t)0xc01ed535, (q31_t)0x3c06c754, (q31_t)0xc01f9bb5,
+    (q31_t)0x3bfa3c9f, (q31_t)0xc02064ab, (q31_t)0x3bedb212, (q31_t)0xc0213018,
+    (q31_t)0x3be127ac, (q31_t)0xc021fdfb, (q31_t)0x3bd49d70, (q31_t)0xc022ce54,
+    (q31_t)0x3bc8135c, (q31_t)0xc023a124, (q31_t)0x3bbb8973, (q31_t)0xc024766a,
+    (q31_t)0x3baeffb3, (q31_t)0xc0254e27, (q31_t)0x3ba2761e, (q31_t)0xc0262859,
+    (q31_t)0x3b95ecb4, (q31_t)0xc0270502, (q31_t)0x3b896375, (q31_t)0xc027e421,
+    (q31_t)0x3b7cda63, (q31_t)0xc028c5b6, (q31_t)0x3b70517d, (q31_t)0xc029a9c1,
+    (q31_t)0x3b63c8c4, (q31_t)0xc02a9042, (q31_t)0x3b574039, (q31_t)0xc02b7939,
+    (q31_t)0x3b4ab7db, (q31_t)0xc02c64a6, (q31_t)0x3b3e2fac, (q31_t)0xc02d5289,
+    (q31_t)0x3b31a7ac, (q31_t)0xc02e42e2, (q31_t)0x3b251fdc, (q31_t)0xc02f35b1,
+    (q31_t)0x3b18983b, (q31_t)0xc0302af5, (q31_t)0x3b0c10cb, (q31_t)0xc03122b0,
+    (q31_t)0x3aff898c, (q31_t)0xc0321ce0, (q31_t)0x3af3027e, (q31_t)0xc0331986,
+    (q31_t)0x3ae67ba2, (q31_t)0xc03418a2, (q31_t)0x3ad9f4f8, (q31_t)0xc0351a33,
+    (q31_t)0x3acd6e81, (q31_t)0xc0361e3a, (q31_t)0x3ac0e83d, (q31_t)0xc03724b6,
+    (q31_t)0x3ab4622d, (q31_t)0xc0382da8, (q31_t)0x3aa7dc52, (q31_t)0xc0393910,
+    (q31_t)0x3a9b56ab, (q31_t)0xc03a46ed, (q31_t)0x3a8ed139, (q31_t)0xc03b573f,
+    (q31_t)0x3a824bfd, (q31_t)0xc03c6a07, (q31_t)0x3a75c6f8, (q31_t)0xc03d7f44,
+    (q31_t)0x3a694229, (q31_t)0xc03e96f6, (q31_t)0x3a5cbd91, (q31_t)0xc03fb11d,
+    (q31_t)0x3a503930, (q31_t)0xc040cdba, (q31_t)0x3a43b508, (q31_t)0xc041eccc,
+    (q31_t)0x3a373119, (q31_t)0xc0430e53, (q31_t)0x3a2aad62, (q31_t)0xc044324f,
+    (q31_t)0x3a1e29e5, (q31_t)0xc04558c0, (q31_t)0x3a11a6a3, (q31_t)0xc04681a6,
+    (q31_t)0x3a05239a, (q31_t)0xc047ad01, (q31_t)0x39f8a0cd, (q31_t)0xc048dad1,
+    (q31_t)0x39ec1e3b, (q31_t)0xc04a0b16, (q31_t)0x39df9be6, (q31_t)0xc04b3dcf,
+    (q31_t)0x39d319cc, (q31_t)0xc04c72fe, (q31_t)0x39c697f0, (q31_t)0xc04daaa1,
+    (q31_t)0x39ba1651, (q31_t)0xc04ee4b8, (q31_t)0x39ad94f0, (q31_t)0xc0502145,
+    (q31_t)0x39a113cd, (q31_t)0xc0516045, (q31_t)0x399492ea, (q31_t)0xc052a1bb,
+    (q31_t)0x39881245, (q31_t)0xc053e5a5, (q31_t)0x397b91e1, (q31_t)0xc0552c03,
+    (q31_t)0x396f11bc, (q31_t)0xc05674d6, (q31_t)0x396291d9, (q31_t)0xc057c01d,
+    (q31_t)0x39561237, (q31_t)0xc0590dd8, (q31_t)0x394992d7, (q31_t)0xc05a5e07,
+    (q31_t)0x393d13b8, (q31_t)0xc05bb0ab, (q31_t)0x393094dd, (q31_t)0xc05d05c3,
+    (q31_t)0x39241645, (q31_t)0xc05e5d4e, (q31_t)0x391797f0, (q31_t)0xc05fb74e,
+    (q31_t)0x390b19e0, (q31_t)0xc06113c2, (q31_t)0x38fe9c15, (q31_t)0xc06272aa,
+    (q31_t)0x38f21e8e, (q31_t)0xc063d405, (q31_t)0x38e5a14d, (q31_t)0xc06537d4,
+    (q31_t)0x38d92452, (q31_t)0xc0669e18, (q31_t)0x38cca79e, (q31_t)0xc06806ce,
+    (q31_t)0x38c02b31, (q31_t)0xc06971f9, (q31_t)0x38b3af0c, (q31_t)0xc06adf97,
+    (q31_t)0x38a7332e, (q31_t)0xc06c4fa8, (q31_t)0x389ab799, (q31_t)0xc06dc22e,
+    (q31_t)0x388e3c4d, (q31_t)0xc06f3726, (q31_t)0x3881c14b, (q31_t)0xc070ae92,
+    (q31_t)0x38754692, (q31_t)0xc0722871, (q31_t)0x3868cc24, (q31_t)0xc073a4c3,
+    (q31_t)0x385c5201, (q31_t)0xc0752389, (q31_t)0x384fd829, (q31_t)0xc076a4c2,
+    (q31_t)0x38435e9d, (q31_t)0xc078286e, (q31_t)0x3836e55d, (q31_t)0xc079ae8c,
+    (q31_t)0x382a6c6a, (q31_t)0xc07b371e, (q31_t)0x381df3c5, (q31_t)0xc07cc223,
+    (q31_t)0x38117b6d, (q31_t)0xc07e4f9b, (q31_t)0x38050364, (q31_t)0xc07fdf85,
+    (q31_t)0x37f88ba9, (q31_t)0xc08171e2, (q31_t)0x37ec143e, (q31_t)0xc08306b2,
+    (q31_t)0x37df9d22, (q31_t)0xc0849df4, (q31_t)0x37d32657, (q31_t)0xc08637a9,
+    (q31_t)0x37c6afdc, (q31_t)0xc087d3d0, (q31_t)0x37ba39b3, (q31_t)0xc089726a,
+    (q31_t)0x37adc3db, (q31_t)0xc08b1376, (q31_t)0x37a14e55, (q31_t)0xc08cb6f5,
+    (q31_t)0x3794d922, (q31_t)0xc08e5ce5, (q31_t)0x37886442, (q31_t)0xc0900548,
+    (q31_t)0x377befb5, (q31_t)0xc091b01d, (q31_t)0x376f7b7d, (q31_t)0xc0935d64,
+    (q31_t)0x37630799, (q31_t)0xc0950d1d, (q31_t)0x3756940a, (q31_t)0xc096bf48,
+    (q31_t)0x374a20d0, (q31_t)0xc09873e4, (q31_t)0x373daded, (q31_t)0xc09a2af3,
+    (q31_t)0x37313b60, (q31_t)0xc09be473, (q31_t)0x3724c92a, (q31_t)0xc09da065,
+    (q31_t)0x3718574b, (q31_t)0xc09f5ec8, (q31_t)0x370be5c4, (q31_t)0xc0a11f9d,
+    (q31_t)0x36ff7496, (q31_t)0xc0a2e2e3, (q31_t)0x36f303c0, (q31_t)0xc0a4a89b,
+    (q31_t)0x36e69344, (q31_t)0xc0a670c4, (q31_t)0x36da2321, (q31_t)0xc0a83b5e,
+    (q31_t)0x36cdb359, (q31_t)0xc0aa086a, (q31_t)0x36c143ec, (q31_t)0xc0abd7e6,
+    (q31_t)0x36b4d4d9, (q31_t)0xc0ada9d4, (q31_t)0x36a86623, (q31_t)0xc0af7e33,
+    (q31_t)0x369bf7c9, (q31_t)0xc0b15502, (q31_t)0x368f89cb, (q31_t)0xc0b32e42,
+    (q31_t)0x36831c2b, (q31_t)0xc0b509f3, (q31_t)0x3676aee8, (q31_t)0xc0b6e815,
+    (q31_t)0x366a4203, (q31_t)0xc0b8c8a7, (q31_t)0x365dd57d, (q31_t)0xc0baabaa,
+    (q31_t)0x36516956, (q31_t)0xc0bc911d, (q31_t)0x3644fd8f, (q31_t)0xc0be7901,
+    (q31_t)0x36389228, (q31_t)0xc0c06355, (q31_t)0x362c2721, (q31_t)0xc0c25019,
+    (q31_t)0x361fbc7b, (q31_t)0xc0c43f4d, (q31_t)0x36135237, (q31_t)0xc0c630f2,
+    (q31_t)0x3606e854, (q31_t)0xc0c82506, (q31_t)0x35fa7ed4, (q31_t)0xc0ca1b8a,
+    (q31_t)0x35ee15b7, (q31_t)0xc0cc147f, (q31_t)0x35e1acfd, (q31_t)0xc0ce0fe3,
+    (q31_t)0x35d544a7, (q31_t)0xc0d00db6, (q31_t)0x35c8dcb6, (q31_t)0xc0d20dfa,
+    (q31_t)0x35bc7529, (q31_t)0xc0d410ad, (q31_t)0x35b00e02, (q31_t)0xc0d615cf,
+    (q31_t)0x35a3a740, (q31_t)0xc0d81d61, (q31_t)0x359740e5, (q31_t)0xc0da2762,
+    (q31_t)0x358adaf0, (q31_t)0xc0dc33d2, (q31_t)0x357e7563, (q31_t)0xc0de42b2,
+    (q31_t)0x3572103d, (q31_t)0xc0e05401, (q31_t)0x3565ab80, (q31_t)0xc0e267be,
+    (q31_t)0x3559472b, (q31_t)0xc0e47deb, (q31_t)0x354ce33f, (q31_t)0xc0e69686,
+    (q31_t)0x35407fbd, (q31_t)0xc0e8b190, (q31_t)0x35341ca5, (q31_t)0xc0eacf09,
+    (q31_t)0x3527b9f7, (q31_t)0xc0eceef1, (q31_t)0x351b57b5, (q31_t)0xc0ef1147,
+    (q31_t)0x350ef5de, (q31_t)0xc0f1360b, (q31_t)0x35029473, (q31_t)0xc0f35d3e,
+    (q31_t)0x34f63374, (q31_t)0xc0f586df, (q31_t)0x34e9d2e3, (q31_t)0xc0f7b2ee,
+    (q31_t)0x34dd72be, (q31_t)0xc0f9e16b, (q31_t)0x34d11308, (q31_t)0xc0fc1257,
+    (q31_t)0x34c4b3c0, (q31_t)0xc0fe45b0, (q31_t)0x34b854e7, (q31_t)0xc1007b77,
+    (q31_t)0x34abf67e, (q31_t)0xc102b3ac, (q31_t)0x349f9884, (q31_t)0xc104ee4f,
+    (q31_t)0x34933afa, (q31_t)0xc1072b5f, (q31_t)0x3486dde1, (q31_t)0xc1096add,
+    (q31_t)0x347a8139, (q31_t)0xc10bacc8, (q31_t)0x346e2504, (q31_t)0xc10df120,
+    (q31_t)0x3461c940, (q31_t)0xc11037e6, (q31_t)0x34556def, (q31_t)0xc1128119,
+    (q31_t)0x34491311, (q31_t)0xc114ccb9, (q31_t)0x343cb8a7, (q31_t)0xc1171ac6,
+    (q31_t)0x34305eb0, (q31_t)0xc1196b3f, (q31_t)0x3424052f, (q31_t)0xc11bbe26,
+    (q31_t)0x3417ac22, (q31_t)0xc11e1379, (q31_t)0x340b538b, (q31_t)0xc1206b39,
+    (q31_t)0x33fefb6a, (q31_t)0xc122c566, (q31_t)0x33f2a3bf, (q31_t)0xc12521ff,
+    (q31_t)0x33e64c8c, (q31_t)0xc1278104, (q31_t)0x33d9f5cf, (q31_t)0xc129e276,
+    (q31_t)0x33cd9f8b, (q31_t)0xc12c4653, (q31_t)0x33c149bf, (q31_t)0xc12eac9d,
+    (q31_t)0x33b4f46c, (q31_t)0xc1311553, (q31_t)0x33a89f92, (q31_t)0xc1338075,
+    (q31_t)0x339c4b32, (q31_t)0xc135ee02, (q31_t)0x338ff74d, (q31_t)0xc1385dfb,
+    (q31_t)0x3383a3e2, (q31_t)0xc13ad060, (q31_t)0x337750f2, (q31_t)0xc13d4530,
+    (q31_t)0x336afe7e, (q31_t)0xc13fbc6c, (q31_t)0x335eac86, (q31_t)0xc1423613,
+    (q31_t)0x33525b0b, (q31_t)0xc144b225, (q31_t)0x33460a0d, (q31_t)0xc14730a3,
+    (q31_t)0x3339b98d, (q31_t)0xc149b18b, (q31_t)0x332d698a, (q31_t)0xc14c34df,
+    (q31_t)0x33211a07, (q31_t)0xc14eba9d, (q31_t)0x3314cb02, (q31_t)0xc15142c6,
+    (q31_t)0x33087c7d, (q31_t)0xc153cd5a, (q31_t)0x32fc2e77, (q31_t)0xc1565a58,
+    (q31_t)0x32efe0f2, (q31_t)0xc158e9c1, (q31_t)0x32e393ef, (q31_t)0xc15b7b94,
+    (q31_t)0x32d7476c, (q31_t)0xc15e0fd1, (q31_t)0x32cafb6b, (q31_t)0xc160a678,
+    (q31_t)0x32beafed, (q31_t)0xc1633f8a, (q31_t)0x32b264f2, (q31_t)0xc165db05,
+    (q31_t)0x32a61a7a, (q31_t)0xc16878eb, (q31_t)0x3299d085, (q31_t)0xc16b193a,
+    (q31_t)0x328d8715, (q31_t)0xc16dbbf3, (q31_t)0x32813e2a, (q31_t)0xc1706115,
+    (q31_t)0x3274f5c3, (q31_t)0xc17308a1, (q31_t)0x3268ade3, (q31_t)0xc175b296,
+    (q31_t)0x325c6688, (q31_t)0xc1785ef4, (q31_t)0x32501fb5, (q31_t)0xc17b0dbb,
+    (q31_t)0x3243d968, (q31_t)0xc17dbeec, (q31_t)0x323793a3, (q31_t)0xc1807285,
+    (q31_t)0x322b4e66, (q31_t)0xc1832888, (q31_t)0x321f09b1, (q31_t)0xc185e0f3,
+    (q31_t)0x3212c585, (q31_t)0xc1889bc6, (q31_t)0x320681e3, (q31_t)0xc18b5903,
+    (q31_t)0x31fa3ecb, (q31_t)0xc18e18a7, (q31_t)0x31edfc3d, (q31_t)0xc190dab4,
+    (q31_t)0x31e1ba3a, (q31_t)0xc1939f29, (q31_t)0x31d578c2, (q31_t)0xc1966606,
+    (q31_t)0x31c937d6, (q31_t)0xc1992f4c, (q31_t)0x31bcf777, (q31_t)0xc19bfaf9,
+    (q31_t)0x31b0b7a4, (q31_t)0xc19ec90d, (q31_t)0x31a4785e, (q31_t)0xc1a1998a,
+    (q31_t)0x319839a6, (q31_t)0xc1a46c6e, (q31_t)0x318bfb7d, (q31_t)0xc1a741b9,
+    (q31_t)0x317fbde2, (q31_t)0xc1aa196c, (q31_t)0x317380d6, (q31_t)0xc1acf386,
+    (q31_t)0x31674459, (q31_t)0xc1afd007, (q31_t)0x315b086d, (q31_t)0xc1b2aef0,
+    (q31_t)0x314ecd11, (q31_t)0xc1b5903f, (q31_t)0x31429247, (q31_t)0xc1b873f5,
+    (q31_t)0x3136580d, (q31_t)0xc1bb5a11, (q31_t)0x312a1e66, (q31_t)0xc1be4294,
+    (q31_t)0x311de551, (q31_t)0xc1c12d7e, (q31_t)0x3111accf, (q31_t)0xc1c41ace,
+    (q31_t)0x310574e0, (q31_t)0xc1c70a84, (q31_t)0x30f93d86, (q31_t)0xc1c9fca0,
+    (q31_t)0x30ed06bf, (q31_t)0xc1ccf122, (q31_t)0x30e0d08d, (q31_t)0xc1cfe80a,
+    (q31_t)0x30d49af1, (q31_t)0xc1d2e158, (q31_t)0x30c865ea, (q31_t)0xc1d5dd0c,
+    (q31_t)0x30bc317a, (q31_t)0xc1d8db25, (q31_t)0x30affda0, (q31_t)0xc1dbdba3,
+    (q31_t)0x30a3ca5d, (q31_t)0xc1dede87, (q31_t)0x309797b2, (q31_t)0xc1e1e3d0,
+    (q31_t)0x308b659f, (q31_t)0xc1e4eb7e, (q31_t)0x307f3424, (q31_t)0xc1e7f591,
+    (q31_t)0x30730342, (q31_t)0xc1eb0209, (q31_t)0x3066d2fa, (q31_t)0xc1ee10e5,
+    (q31_t)0x305aa34c, (q31_t)0xc1f12227, (q31_t)0x304e7438, (q31_t)0xc1f435cc,
+    (q31_t)0x304245c0, (q31_t)0xc1f74bd6, (q31_t)0x303617e2, (q31_t)0xc1fa6445,
+    (q31_t)0x3029eaa1, (q31_t)0xc1fd7f17, (q31_t)0x301dbdfb, (q31_t)0xc2009c4e,
+    (q31_t)0x301191f3, (q31_t)0xc203bbe8, (q31_t)0x30056687, (q31_t)0xc206dde6,
+    (q31_t)0x2ff93bba, (q31_t)0xc20a0248, (q31_t)0x2fed118a, (q31_t)0xc20d290d,
+    (q31_t)0x2fe0e7f9, (q31_t)0xc2105236, (q31_t)0x2fd4bf08, (q31_t)0xc2137dc2,
+    (q31_t)0x2fc896b5, (q31_t)0xc216abb1, (q31_t)0x2fbc6f03, (q31_t)0xc219dc03,
+    (q31_t)0x2fb047f2, (q31_t)0xc21d0eb8, (q31_t)0x2fa42181, (q31_t)0xc22043d0,
+    (q31_t)0x2f97fbb2, (q31_t)0xc2237b4b, (q31_t)0x2f8bd685, (q31_t)0xc226b528,
+    (q31_t)0x2f7fb1fa, (q31_t)0xc229f167, (q31_t)0x2f738e12, (q31_t)0xc22d3009,
+    (q31_t)0x2f676ace, (q31_t)0xc230710d, (q31_t)0x2f5b482d, (q31_t)0xc233b473,
+    (q31_t)0x2f4f2630, (q31_t)0xc236fa3b, (q31_t)0x2f4304d8, (q31_t)0xc23a4265,
+    (q31_t)0x2f36e426, (q31_t)0xc23d8cf1, (q31_t)0x2f2ac419, (q31_t)0xc240d9de,
+    (q31_t)0x2f1ea4b2, (q31_t)0xc244292c, (q31_t)0x2f1285f2, (q31_t)0xc2477adc,
+    (q31_t)0x2f0667d9, (q31_t)0xc24aceed, (q31_t)0x2efa4a67, (q31_t)0xc24e255e,
+    (q31_t)0x2eee2d9d, (q31_t)0xc2517e31, (q31_t)0x2ee2117c, (q31_t)0xc254d965,
+    (q31_t)0x2ed5f604, (q31_t)0xc25836f9, (q31_t)0x2ec9db35, (q31_t)0xc25b96ee,
+    (q31_t)0x2ebdc110, (q31_t)0xc25ef943, (q31_t)0x2eb1a796, (q31_t)0xc2625df8,
+    (q31_t)0x2ea58ec6, (q31_t)0xc265c50e, (q31_t)0x2e9976a1, (q31_t)0xc2692e83,
+    (q31_t)0x2e8d5f29, (q31_t)0xc26c9a58, (q31_t)0x2e81485c, (q31_t)0xc270088e,
+    (q31_t)0x2e75323c, (q31_t)0xc2737922, (q31_t)0x2e691cc9, (q31_t)0xc276ec16,
+    (q31_t)0x2e5d0804, (q31_t)0xc27a616a, (q31_t)0x2e50f3ed, (q31_t)0xc27dd91c,
+    (q31_t)0x2e44e084, (q31_t)0xc281532e, (q31_t)0x2e38cdcb, (q31_t)0xc284cf9f,
+    (q31_t)0x2e2cbbc1, (q31_t)0xc2884e6e, (q31_t)0x2e20aa67, (q31_t)0xc28bcf9c,
+    (q31_t)0x2e1499bd, (q31_t)0xc28f5329, (q31_t)0x2e0889c4, (q31_t)0xc292d914,
+    (q31_t)0x2dfc7a7c, (q31_t)0xc296615d, (q31_t)0x2df06be6, (q31_t)0xc299ec05,
+    (q31_t)0x2de45e03, (q31_t)0xc29d790a, (q31_t)0x2dd850d2, (q31_t)0xc2a1086d,
+    (q31_t)0x2dcc4454, (q31_t)0xc2a49a2e, (q31_t)0x2dc0388a, (q31_t)0xc2a82e4d,
+    (q31_t)0x2db42d74, (q31_t)0xc2abc4c9, (q31_t)0x2da82313, (q31_t)0xc2af5da2,
+    (q31_t)0x2d9c1967, (q31_t)0xc2b2f8d8, (q31_t)0x2d901070, (q31_t)0xc2b6966c,
+    (q31_t)0x2d84082f, (q31_t)0xc2ba365c, (q31_t)0x2d7800a5, (q31_t)0xc2bdd8a9,
+    (q31_t)0x2d6bf9d1, (q31_t)0xc2c17d52, (q31_t)0x2d5ff3b5, (q31_t)0xc2c52459,
+    (q31_t)0x2d53ee51, (q31_t)0xc2c8cdbb, (q31_t)0x2d47e9a5, (q31_t)0xc2cc7979,
+    (q31_t)0x2d3be5b1, (q31_t)0xc2d02794, (q31_t)0x2d2fe277, (q31_t)0xc2d3d80a,
+    (q31_t)0x2d23dff7, (q31_t)0xc2d78add, (q31_t)0x2d17de31, (q31_t)0xc2db400a,
+    (q31_t)0x2d0bdd25, (q31_t)0xc2def794, (q31_t)0x2cffdcd4, (q31_t)0xc2e2b178,
+    (q31_t)0x2cf3dd3f, (q31_t)0xc2e66db8, (q31_t)0x2ce7de66, (q31_t)0xc2ea2c53,
+    (q31_t)0x2cdbe04a, (q31_t)0xc2eded49, (q31_t)0x2ccfe2ea, (q31_t)0xc2f1b099,
+    (q31_t)0x2cc3e648, (q31_t)0xc2f57644, (q31_t)0x2cb7ea63, (q31_t)0xc2f93e4a,
+    (q31_t)0x2cabef3d, (q31_t)0xc2fd08a9, (q31_t)0x2c9ff4d6, (q31_t)0xc300d563,
+    (q31_t)0x2c93fb2e, (q31_t)0xc304a477, (q31_t)0x2c880245, (q31_t)0xc30875e5,
+    (q31_t)0x2c7c0a1d, (q31_t)0xc30c49ad, (q31_t)0x2c7012b5, (q31_t)0xc3101fce,
+    (q31_t)0x2c641c0e, (q31_t)0xc313f848, (q31_t)0x2c582629, (q31_t)0xc317d31c,
+    (q31_t)0x2c4c3106, (q31_t)0xc31bb049, (q31_t)0x2c403ca5, (q31_t)0xc31f8fcf,
+    (q31_t)0x2c344908, (q31_t)0xc32371ae, (q31_t)0x2c28562d, (q31_t)0xc32755e5,
+    (q31_t)0x2c1c6417, (q31_t)0xc32b3c75, (q31_t)0x2c1072c4, (q31_t)0xc32f255e,
+    (q31_t)0x2c048237, (q31_t)0xc333109e, (q31_t)0x2bf8926f, (q31_t)0xc336fe37,
+    (q31_t)0x2beca36c, (q31_t)0xc33aee27, (q31_t)0x2be0b52f, (q31_t)0xc33ee070,
+    (q31_t)0x2bd4c7ba, (q31_t)0xc342d510, (q31_t)0x2bc8db0b, (q31_t)0xc346cc07,
+    (q31_t)0x2bbcef23, (q31_t)0xc34ac556, (q31_t)0x2bb10404, (q31_t)0xc34ec0fc,
+    (q31_t)0x2ba519ad, (q31_t)0xc352bef9, (q31_t)0x2b99301f, (q31_t)0xc356bf4d,
+    (q31_t)0x2b8d475b, (q31_t)0xc35ac1f7, (q31_t)0x2b815f60, (q31_t)0xc35ec6f8,
+    (q31_t)0x2b75782f, (q31_t)0xc362ce50, (q31_t)0x2b6991ca, (q31_t)0xc366d7fd,
+    (q31_t)0x2b5dac2f, (q31_t)0xc36ae401, (q31_t)0x2b51c760, (q31_t)0xc36ef25b,
+    (q31_t)0x2b45e35d, (q31_t)0xc373030a, (q31_t)0x2b3a0027, (q31_t)0xc377160f,
+    (q31_t)0x2b2e1dbe, (q31_t)0xc37b2b6a, (q31_t)0x2b223c22, (q31_t)0xc37f4319,
+    (q31_t)0x2b165b54, (q31_t)0xc3835d1e, (q31_t)0x2b0a7b54, (q31_t)0xc3877978,
+    (q31_t)0x2afe9c24, (q31_t)0xc38b9827, (q31_t)0x2af2bdc3, (q31_t)0xc38fb92a,
+    (q31_t)0x2ae6e031, (q31_t)0xc393dc82, (q31_t)0x2adb0370, (q31_t)0xc398022f,
+    (q31_t)0x2acf277f, (q31_t)0xc39c2a2f, (q31_t)0x2ac34c60, (q31_t)0xc3a05484,
+    (q31_t)0x2ab77212, (q31_t)0xc3a4812c, (q31_t)0x2aab9896, (q31_t)0xc3a8b028,
+    (q31_t)0x2a9fbfed, (q31_t)0xc3ace178, (q31_t)0x2a93e817, (q31_t)0xc3b1151b,
+    (q31_t)0x2a881114, (q31_t)0xc3b54b11, (q31_t)0x2a7c3ae5, (q31_t)0xc3b9835a,
+    (q31_t)0x2a70658a, (q31_t)0xc3bdbdf6, (q31_t)0x2a649105, (q31_t)0xc3c1fae5,
+    (q31_t)0x2a58bd54, (q31_t)0xc3c63a26, (q31_t)0x2a4cea79, (q31_t)0xc3ca7bba,
+    (q31_t)0x2a411874, (q31_t)0xc3cebfa0, (q31_t)0x2a354746, (q31_t)0xc3d305d8,
+    (q31_t)0x2a2976ef, (q31_t)0xc3d74e62, (q31_t)0x2a1da770, (q31_t)0xc3db993e,
+    (q31_t)0x2a11d8c8, (q31_t)0xc3dfe66c, (q31_t)0x2a060af9, (q31_t)0xc3e435ea,
+    (q31_t)0x29fa3e03, (q31_t)0xc3e887bb, (q31_t)0x29ee71e6, (q31_t)0xc3ecdbdc,
+    (q31_t)0x29e2a6a3, (q31_t)0xc3f1324e, (q31_t)0x29d6dc3b, (q31_t)0xc3f58b10,
+    (q31_t)0x29cb12ad, (q31_t)0xc3f9e624, (q31_t)0x29bf49fa, (q31_t)0xc3fe4388,
+    (q31_t)0x29b38223, (q31_t)0xc402a33c, (q31_t)0x29a7bb28, (q31_t)0xc4070540,
+    (q31_t)0x299bf509, (q31_t)0xc40b6994, (q31_t)0x29902fc7, (q31_t)0xc40fd037,
+    (q31_t)0x29846b63, (q31_t)0xc414392b, (q31_t)0x2978a7dd, (q31_t)0xc418a46d,
+    (q31_t)0x296ce535, (q31_t)0xc41d11ff, (q31_t)0x2961236c, (q31_t)0xc42181e0,
+    (q31_t)0x29556282, (q31_t)0xc425f410, (q31_t)0x2949a278, (q31_t)0xc42a688f,
+    (q31_t)0x293de34e, (q31_t)0xc42edf5c, (q31_t)0x29322505, (q31_t)0xc4335877,
+    (q31_t)0x2926679c, (q31_t)0xc437d3e1, (q31_t)0x291aab16, (q31_t)0xc43c5199,
+    (q31_t)0x290eef71, (q31_t)0xc440d19e, (q31_t)0x290334af, (q31_t)0xc44553f2,
+    (q31_t)0x28f77acf, (q31_t)0xc449d892, (q31_t)0x28ebc1d3, (q31_t)0xc44e5f80,
+    (q31_t)0x28e009ba, (q31_t)0xc452e8bc, (q31_t)0x28d45286, (q31_t)0xc4577444,
+    (q31_t)0x28c89c37, (q31_t)0xc45c0219, (q31_t)0x28bce6cd, (q31_t)0xc460923b,
+    (q31_t)0x28b13248, (q31_t)0xc46524a9, (q31_t)0x28a57ea9, (q31_t)0xc469b963,
+    (q31_t)0x2899cbf1, (q31_t)0xc46e5069, (q31_t)0x288e1a20, (q31_t)0xc472e9bc,
+    (q31_t)0x28826936, (q31_t)0xc477855a, (q31_t)0x2876b934, (q31_t)0xc47c2344,
+    (q31_t)0x286b0a1a, (q31_t)0xc480c379, (q31_t)0x285f5be9, (q31_t)0xc48565f9,
+    (q31_t)0x2853aea1, (q31_t)0xc48a0ac4, (q31_t)0x28480243, (q31_t)0xc48eb1db,
+    (q31_t)0x283c56cf, (q31_t)0xc4935b3c, (q31_t)0x2830ac45, (q31_t)0xc49806e7,
+    (q31_t)0x282502a7, (q31_t)0xc49cb4dd, (q31_t)0x281959f4, (q31_t)0xc4a1651c,
+    (q31_t)0x280db22d, (q31_t)0xc4a617a6, (q31_t)0x28020b52, (q31_t)0xc4aacc7a,
+    (q31_t)0x27f66564, (q31_t)0xc4af8397, (q31_t)0x27eac063, (q31_t)0xc4b43cfd,
+    (q31_t)0x27df1c50, (q31_t)0xc4b8f8ad, (q31_t)0x27d3792b, (q31_t)0xc4bdb6a6,
+    (q31_t)0x27c7d6f4, (q31_t)0xc4c276e8, (q31_t)0x27bc35ad, (q31_t)0xc4c73972,
+    (q31_t)0x27b09555, (q31_t)0xc4cbfe45, (q31_t)0x27a4f5ed, (q31_t)0xc4d0c560,
+    (q31_t)0x27995776, (q31_t)0xc4d58ec3, (q31_t)0x278db9ef, (q31_t)0xc4da5a6f,
+    (q31_t)0x27821d59, (q31_t)0xc4df2862, (q31_t)0x277681b6, (q31_t)0xc4e3f89c,
+    (q31_t)0x276ae704, (q31_t)0xc4e8cb1e, (q31_t)0x275f4d45, (q31_t)0xc4ed9fe7,
+    (q31_t)0x2753b479, (q31_t)0xc4f276f7, (q31_t)0x27481ca1, (q31_t)0xc4f7504e,
+    (q31_t)0x273c85bc, (q31_t)0xc4fc2bec, (q31_t)0x2730efcc, (q31_t)0xc50109d0,
+    (q31_t)0x27255ad1, (q31_t)0xc505e9fb, (q31_t)0x2719c6cb, (q31_t)0xc50acc6b,
+    (q31_t)0x270e33bb, (q31_t)0xc50fb121, (q31_t)0x2702a1a1, (q31_t)0xc514981d,
+    (q31_t)0x26f7107e, (q31_t)0xc519815f, (q31_t)0x26eb8052, (q31_t)0xc51e6ce6,
+    (q31_t)0x26dff11d, (q31_t)0xc5235ab2, (q31_t)0x26d462e1, (q31_t)0xc5284ac3,
+    (q31_t)0x26c8d59c, (q31_t)0xc52d3d18, (q31_t)0x26bd4951, (q31_t)0xc53231b3,
+    (q31_t)0x26b1bdff, (q31_t)0xc5372891, (q31_t)0x26a633a6, (q31_t)0xc53c21b4,
+    (q31_t)0x269aaa48, (q31_t)0xc5411d1b, (q31_t)0x268f21e5, (q31_t)0xc5461ac6,
+    (q31_t)0x26839a7c, (q31_t)0xc54b1ab4, (q31_t)0x26781410, (q31_t)0xc5501ce5,
+    (q31_t)0x266c8e9f, (q31_t)0xc555215a, (q31_t)0x26610a2a, (q31_t)0xc55a2812,
+    (q31_t)0x265586b3, (q31_t)0xc55f310d, (q31_t)0x264a0438, (q31_t)0xc5643c4a,
+    (q31_t)0x263e82bc, (q31_t)0xc56949ca, (q31_t)0x2633023e, (q31_t)0xc56e598c,
+    (q31_t)0x262782be, (q31_t)0xc5736b90, (q31_t)0x261c043d, (q31_t)0xc5787fd6,
+    (q31_t)0x261086bc, (q31_t)0xc57d965d, (q31_t)0x26050a3b, (q31_t)0xc582af26,
+    (q31_t)0x25f98ebb, (q31_t)0xc587ca31, (q31_t)0x25ee143b, (q31_t)0xc58ce77c,
+    (q31_t)0x25e29abc, (q31_t)0xc5920708, (q31_t)0x25d72240, (q31_t)0xc59728d5,
+    (q31_t)0x25cbaac5, (q31_t)0xc59c4ce3, (q31_t)0x25c0344d, (q31_t)0xc5a17330,
+    (q31_t)0x25b4bed8, (q31_t)0xc5a69bbe, (q31_t)0x25a94a67, (q31_t)0xc5abc68c,
+    (q31_t)0x259dd6f9, (q31_t)0xc5b0f399, (q31_t)0x25926490, (q31_t)0xc5b622e6,
+    (q31_t)0x2586f32c, (q31_t)0xc5bb5472, (q31_t)0x257b82cd, (q31_t)0xc5c0883d,
+    (q31_t)0x25701374, (q31_t)0xc5c5be47, (q31_t)0x2564a521, (q31_t)0xc5caf690,
+    (q31_t)0x255937d5, (q31_t)0xc5d03118, (q31_t)0x254dcb8f, (q31_t)0xc5d56ddd,
+    (q31_t)0x25426051, (q31_t)0xc5daace1, (q31_t)0x2536f61b, (q31_t)0xc5dfee22,
+    (q31_t)0x252b8cee, (q31_t)0xc5e531a1, (q31_t)0x252024c9, (q31_t)0xc5ea775e,
+    (q31_t)0x2514bdad, (q31_t)0xc5efbf58, (q31_t)0x2509579b, (q31_t)0xc5f5098f,
+    (q31_t)0x24fdf294, (q31_t)0xc5fa5603, (q31_t)0x24f28e96, (q31_t)0xc5ffa4b3,
+    (q31_t)0x24e72ba4, (q31_t)0xc604f5a0, (q31_t)0x24dbc9bd, (q31_t)0xc60a48c9,
+    (q31_t)0x24d068e2, (q31_t)0xc60f9e2e, (q31_t)0x24c50914, (q31_t)0xc614f5cf,
+    (q31_t)0x24b9aa52, (q31_t)0xc61a4fac, (q31_t)0x24ae4c9d, (q31_t)0xc61fabc4,
+    (q31_t)0x24a2eff6, (q31_t)0xc6250a18, (q31_t)0x2497945d, (q31_t)0xc62a6aa6,
+    (q31_t)0x248c39d3, (q31_t)0xc62fcd6f, (q31_t)0x2480e057, (q31_t)0xc6353273,
+    (q31_t)0x247587eb, (q31_t)0xc63a99b1, (q31_t)0x246a308f, (q31_t)0xc6400329,
+    (q31_t)0x245eda43, (q31_t)0xc6456edb, (q31_t)0x24538507, (q31_t)0xc64adcc7,
+    (q31_t)0x244830dd, (q31_t)0xc6504ced, (q31_t)0x243cddc4, (q31_t)0xc655bf4c,
+    (q31_t)0x24318bbe, (q31_t)0xc65b33e4, (q31_t)0x24263ac9, (q31_t)0xc660aab5,
+    (q31_t)0x241aeae8, (q31_t)0xc66623be, (q31_t)0x240f9c1a, (q31_t)0xc66b9f01,
+    (q31_t)0x24044e60, (q31_t)0xc6711c7b, (q31_t)0x23f901ba, (q31_t)0xc6769c2e,
+    (q31_t)0x23edb628, (q31_t)0xc67c1e18, (q31_t)0x23e26bac, (q31_t)0xc681a23a,
+    (q31_t)0x23d72245, (q31_t)0xc6872894, (q31_t)0x23cbd9f4, (q31_t)0xc68cb124,
+    (q31_t)0x23c092b9, (q31_t)0xc6923bec, (q31_t)0x23b54c95, (q31_t)0xc697c8eb,
+    (q31_t)0x23aa0788, (q31_t)0xc69d5820, (q31_t)0x239ec393, (q31_t)0xc6a2e98b,
+    (q31_t)0x239380b6, (q31_t)0xc6a87d2d, (q31_t)0x23883ef2, (q31_t)0xc6ae1304,
+    (q31_t)0x237cfe47, (q31_t)0xc6b3ab12, (q31_t)0x2371beb5, (q31_t)0xc6b94554,
+    (q31_t)0x2366803c, (q31_t)0xc6bee1cd, (q31_t)0x235b42df, (q31_t)0xc6c4807a,
+    (q31_t)0x2350069b, (q31_t)0xc6ca215c, (q31_t)0x2344cb73, (q31_t)0xc6cfc472,
+    (q31_t)0x23399167, (q31_t)0xc6d569be, (q31_t)0x232e5876, (q31_t)0xc6db113d,
+    (q31_t)0x232320a2, (q31_t)0xc6e0baf0, (q31_t)0x2317e9eb, (q31_t)0xc6e666d7,
+    (q31_t)0x230cb451, (q31_t)0xc6ec14f2, (q31_t)0x23017fd5, (q31_t)0xc6f1c540,
+    (q31_t)0x22f64c77, (q31_t)0xc6f777c1, (q31_t)0x22eb1a37, (q31_t)0xc6fd2c75,
+    (q31_t)0x22dfe917, (q31_t)0xc702e35c, (q31_t)0x22d4b916, (q31_t)0xc7089c75,
+    (q31_t)0x22c98a35, (q31_t)0xc70e57c0, (q31_t)0x22be5c74, (q31_t)0xc714153e,
+    (q31_t)0x22b32fd4, (q31_t)0xc719d4ed, (q31_t)0x22a80456, (q31_t)0xc71f96ce,
+    (q31_t)0x229cd9f8, (q31_t)0xc7255ae0, (q31_t)0x2291b0bd, (q31_t)0xc72b2123,
+    (q31_t)0x228688a4, (q31_t)0xc730e997, (q31_t)0x227b61af, (q31_t)0xc736b43c,
+    (q31_t)0x22703bdc, (q31_t)0xc73c8111, (q31_t)0x2265172e, (q31_t)0xc7425016,
+    (q31_t)0x2259f3a3, (q31_t)0xc748214c, (q31_t)0x224ed13d, (q31_t)0xc74df4b1,
+    (q31_t)0x2243affc, (q31_t)0xc753ca46, (q31_t)0x22388fe1, (q31_t)0xc759a20a,
+    (q31_t)0x222d70eb, (q31_t)0xc75f7bfe, (q31_t)0x2222531c, (q31_t)0xc7655820,
+    (q31_t)0x22173674, (q31_t)0xc76b3671, (q31_t)0x220c1af3, (q31_t)0xc77116f0,
+    (q31_t)0x22010099, (q31_t)0xc776f99d, (q31_t)0x21f5e768, (q31_t)0xc77cde79,
+    (q31_t)0x21eacf5f, (q31_t)0xc782c582, (q31_t)0x21dfb87f, (q31_t)0xc788aeb9,
+    (q31_t)0x21d4a2c8, (q31_t)0xc78e9a1d, (q31_t)0x21c98e3b, (q31_t)0xc79487ae,
+    (q31_t)0x21be7ad8, (q31_t)0xc79a776c, (q31_t)0x21b368a0, (q31_t)0xc7a06957,
+    (q31_t)0x21a85793, (q31_t)0xc7a65d6e, (q31_t)0x219d47b1, (q31_t)0xc7ac53b1,
+    (q31_t)0x219238fb, (q31_t)0xc7b24c20, (q31_t)0x21872b72, (q31_t)0xc7b846ba,
+    (q31_t)0x217c1f15, (q31_t)0xc7be4381, (q31_t)0x217113e5, (q31_t)0xc7c44272,
+    (q31_t)0x216609e3, (q31_t)0xc7ca438f, (q31_t)0x215b0110, (q31_t)0xc7d046d6,
+    (q31_t)0x214ff96a, (q31_t)0xc7d64c47, (q31_t)0x2144f2f3, (q31_t)0xc7dc53e3,
+    (q31_t)0x2139edac, (q31_t)0xc7e25daa, (q31_t)0x212ee995, (q31_t)0xc7e8699a,
+    (q31_t)0x2123e6ad, (q31_t)0xc7ee77b3, (q31_t)0x2118e4f6, (q31_t)0xc7f487f6,
+    (q31_t)0x210de470, (q31_t)0xc7fa9a62, (q31_t)0x2102e51c, (q31_t)0xc800aef7,
+    (q31_t)0x20f7e6f9, (q31_t)0xc806c5b5, (q31_t)0x20ecea09, (q31_t)0xc80cde9b,
+    (q31_t)0x20e1ee4b, (q31_t)0xc812f9a9, (q31_t)0x20d6f3c1, (q31_t)0xc81916df,
+    (q31_t)0x20cbfa6a, (q31_t)0xc81f363d, (q31_t)0x20c10247, (q31_t)0xc82557c3,
+    (q31_t)0x20b60b58, (q31_t)0xc82b7b70, (q31_t)0x20ab159e, (q31_t)0xc831a143,
+    (q31_t)0x20a0211a, (q31_t)0xc837c93e, (q31_t)0x20952dcb, (q31_t)0xc83df35f,
+    (q31_t)0x208a3bb2, (q31_t)0xc8441fa6, (q31_t)0x207f4acf, (q31_t)0xc84a4e14,
+    (q31_t)0x20745b24, (q31_t)0xc8507ea7, (q31_t)0x20696cb0, (q31_t)0xc856b160,
+    (q31_t)0x205e7f74, (q31_t)0xc85ce63e, (q31_t)0x2053936f, (q31_t)0xc8631d42,
+    (q31_t)0x2048a8a4, (q31_t)0xc869566a, (q31_t)0x203dbf11, (q31_t)0xc86f91b7,
+    (q31_t)0x2032d6b8, (q31_t)0xc875cf28, (q31_t)0x2027ef99, (q31_t)0xc87c0ebd,
+    (q31_t)0x201d09b4, (q31_t)0xc8825077, (q31_t)0x2012250a, (q31_t)0xc8889454,
+    (q31_t)0x2007419b, (q31_t)0xc88eda54, (q31_t)0x1ffc5f67, (q31_t)0xc8952278,
+    (q31_t)0x1ff17e70, (q31_t)0xc89b6cbf, (q31_t)0x1fe69eb4, (q31_t)0xc8a1b928,
+    (q31_t)0x1fdbc036, (q31_t)0xc8a807b4, (q31_t)0x1fd0e2f5, (q31_t)0xc8ae5862,
+    (q31_t)0x1fc606f1, (q31_t)0xc8b4ab32, (q31_t)0x1fbb2c2c, (q31_t)0xc8bb0023,
+    (q31_t)0x1fb052a5, (q31_t)0xc8c15736, (q31_t)0x1fa57a5d, (q31_t)0xc8c7b06b,
+    (q31_t)0x1f9aa354, (q31_t)0xc8ce0bc0, (q31_t)0x1f8fcd8b, (q31_t)0xc8d46936,
+    (q31_t)0x1f84f902, (q31_t)0xc8dac8cd, (q31_t)0x1f7a25ba, (q31_t)0xc8e12a84,
+    (q31_t)0x1f6f53b3, (q31_t)0xc8e78e5b, (q31_t)0x1f6482ed, (q31_t)0xc8edf452,
+    (q31_t)0x1f59b369, (q31_t)0xc8f45c68, (q31_t)0x1f4ee527, (q31_t)0xc8fac69e,
+    (q31_t)0x1f441828, (q31_t)0xc90132f2, (q31_t)0x1f394c6b, (q31_t)0xc907a166,
+    (q31_t)0x1f2e81f3, (q31_t)0xc90e11f7, (q31_t)0x1f23b8be, (q31_t)0xc91484a8,
+    (q31_t)0x1f18f0ce, (q31_t)0xc91af976, (q31_t)0x1f0e2a22, (q31_t)0xc9217062,
+    (q31_t)0x1f0364bc, (q31_t)0xc927e96b, (q31_t)0x1ef8a09b, (q31_t)0xc92e6492,
+    (q31_t)0x1eedddc0, (q31_t)0xc934e1d6, (q31_t)0x1ee31c2b, (q31_t)0xc93b6137,
+    (q31_t)0x1ed85bdd, (q31_t)0xc941e2b4, (q31_t)0x1ecd9cd7, (q31_t)0xc948664d,
+    (q31_t)0x1ec2df18, (q31_t)0xc94eec03, (q31_t)0x1eb822a1, (q31_t)0xc95573d4,
+    (q31_t)0x1ead6773, (q31_t)0xc95bfdc1, (q31_t)0x1ea2ad8d, (q31_t)0xc96289c9,
+    (q31_t)0x1e97f4f1, (q31_t)0xc96917ec, (q31_t)0x1e8d3d9e, (q31_t)0xc96fa82a,
+    (q31_t)0x1e828796, (q31_t)0xc9763a83, (q31_t)0x1e77d2d8, (q31_t)0xc97ccef5,
+    (q31_t)0x1e6d1f65, (q31_t)0xc9836582, (q31_t)0x1e626d3e, (q31_t)0xc989fe29,
+    (q31_t)0x1e57bc62, (q31_t)0xc99098e9, (q31_t)0x1e4d0cd2, (q31_t)0xc99735c2,
+    (q31_t)0x1e425e8f, (q31_t)0xc99dd4b4, (q31_t)0x1e37b199, (q31_t)0xc9a475bf,
+    (q31_t)0x1e2d05f1, (q31_t)0xc9ab18e3, (q31_t)0x1e225b96, (q31_t)0xc9b1be1e,
+    (q31_t)0x1e17b28a, (q31_t)0xc9b86572, (q31_t)0x1e0d0acc, (q31_t)0xc9bf0edd,
+    (q31_t)0x1e02645d, (q31_t)0xc9c5ba60, (q31_t)0x1df7bf3e, (q31_t)0xc9cc67fa,
+    (q31_t)0x1ded1b6e, (q31_t)0xc9d317ab, (q31_t)0x1de278ef, (q31_t)0xc9d9c973,
+    (q31_t)0x1dd7d7c1, (q31_t)0xc9e07d51, (q31_t)0x1dcd37e4, (q31_t)0xc9e73346,
+    (q31_t)0x1dc29958, (q31_t)0xc9edeb50, (q31_t)0x1db7fc1e, (q31_t)0xc9f4a570,
+    (q31_t)0x1dad6036, (q31_t)0xc9fb61a5, (q31_t)0x1da2c5a2, (q31_t)0xca021fef,
+    (q31_t)0x1d982c60, (q31_t)0xca08e04f, (q31_t)0x1d8d9472, (q31_t)0xca0fa2c3,
+    (q31_t)0x1d82fdd8, (q31_t)0xca16674b, (q31_t)0x1d786892, (q31_t)0xca1d2de7,
+    (q31_t)0x1d6dd4a2, (q31_t)0xca23f698, (q31_t)0x1d634206, (q31_t)0xca2ac15b,
+    (q31_t)0x1d58b0c0, (q31_t)0xca318e32, (q31_t)0x1d4e20d0, (q31_t)0xca385d1d,
+    (q31_t)0x1d439236, (q31_t)0xca3f2e19, (q31_t)0x1d3904f4, (q31_t)0xca460129,
+    (q31_t)0x1d2e7908, (q31_t)0xca4cd64b, (q31_t)0x1d23ee74, (q31_t)0xca53ad7e,
+    (q31_t)0x1d196538, (q31_t)0xca5a86c4, (q31_t)0x1d0edd55, (q31_t)0xca61621b,
+    (q31_t)0x1d0456ca, (q31_t)0xca683f83, (q31_t)0x1cf9d199, (q31_t)0xca6f1efc,
+    (q31_t)0x1cef4dc2, (q31_t)0xca760086, (q31_t)0x1ce4cb44, (q31_t)0xca7ce420,
+    (q31_t)0x1cda4a21, (q31_t)0xca83c9ca, (q31_t)0x1ccfca59, (q31_t)0xca8ab184,
+    (q31_t)0x1cc54bec, (q31_t)0xca919b4e, (q31_t)0x1cbacedb, (q31_t)0xca988727,
+    (q31_t)0x1cb05326, (q31_t)0xca9f750f, (q31_t)0x1ca5d8cd, (q31_t)0xcaa66506,
+    (q31_t)0x1c9b5fd2, (q31_t)0xcaad570c, (q31_t)0x1c90e834, (q31_t)0xcab44b1f,
+    (q31_t)0x1c8671f3, (q31_t)0xcabb4141, (q31_t)0x1c7bfd11, (q31_t)0xcac23971,
+    (q31_t)0x1c71898d, (q31_t)0xcac933ae, (q31_t)0x1c671768, (q31_t)0xcad02ff8,
+    (q31_t)0x1c5ca6a2, (q31_t)0xcad72e4f, (q31_t)0x1c52373c, (q31_t)0xcade2eb3,
+    (q31_t)0x1c47c936, (q31_t)0xcae53123, (q31_t)0x1c3d5c91, (q31_t)0xcaec35a0,
+    (q31_t)0x1c32f14d, (q31_t)0xcaf33c28, (q31_t)0x1c28876a, (q31_t)0xcafa44bc,
+    (q31_t)0x1c1e1ee9, (q31_t)0xcb014f5b, (q31_t)0x1c13b7c9, (q31_t)0xcb085c05,
+    (q31_t)0x1c09520d, (q31_t)0xcb0f6aba, (q31_t)0x1bfeedb3, (q31_t)0xcb167b79,
+    (q31_t)0x1bf48abd, (q31_t)0xcb1d8e43, (q31_t)0x1bea292b, (q31_t)0xcb24a316,
+    (q31_t)0x1bdfc8fc, (q31_t)0xcb2bb9f4, (q31_t)0x1bd56a32, (q31_t)0xcb32d2da,
+    (q31_t)0x1bcb0cce, (q31_t)0xcb39edca, (q31_t)0x1bc0b0ce, (q31_t)0xcb410ac3,
+    (q31_t)0x1bb65634, (q31_t)0xcb4829c4, (q31_t)0x1babfd01, (q31_t)0xcb4f4acd,
+    (q31_t)0x1ba1a534, (q31_t)0xcb566ddf, (q31_t)0x1b974ece, (q31_t)0xcb5d92f8,
+    (q31_t)0x1b8cf9cf, (q31_t)0xcb64ba19, (q31_t)0x1b82a638, (q31_t)0xcb6be341,
+    (q31_t)0x1b785409, (q31_t)0xcb730e70, (q31_t)0x1b6e0342, (q31_t)0xcb7a3ba5,
+    (q31_t)0x1b63b3e5, (q31_t)0xcb816ae1, (q31_t)0x1b5965f1, (q31_t)0xcb889c23,
+    (q31_t)0x1b4f1967, (q31_t)0xcb8fcf6b, (q31_t)0x1b44ce46, (q31_t)0xcb9704b9,
+    (q31_t)0x1b3a8491, (q31_t)0xcb9e3c0b, (q31_t)0x1b303c46, (q31_t)0xcba57563,
+    (q31_t)0x1b25f566, (q31_t)0xcbacb0bf, (q31_t)0x1b1baff2, (q31_t)0xcbb3ee20,
+    (q31_t)0x1b116beb, (q31_t)0xcbbb2d85, (q31_t)0x1b072950, (q31_t)0xcbc26eee,
+    (q31_t)0x1afce821, (q31_t)0xcbc9b25a, (q31_t)0x1af2a860, (q31_t)0xcbd0f7ca,
+    (q31_t)0x1ae86a0d, (q31_t)0xcbd83f3d, (q31_t)0x1ade2d28, (q31_t)0xcbdf88b3,
+    (q31_t)0x1ad3f1b1, (q31_t)0xcbe6d42b, (q31_t)0x1ac9b7a9, (q31_t)0xcbee21a5,
+    (q31_t)0x1abf7f11, (q31_t)0xcbf57121, (q31_t)0x1ab547e8, (q31_t)0xcbfcc29f,
+    (q31_t)0x1aab122f, (q31_t)0xcc04161e, (q31_t)0x1aa0dde7, (q31_t)0xcc0b6b9e,
+    (q31_t)0x1a96ab0f, (q31_t)0xcc12c31f, (q31_t)0x1a8c79a9, (q31_t)0xcc1a1ca0,
+    (q31_t)0x1a8249b4, (q31_t)0xcc217822, (q31_t)0x1a781b31, (q31_t)0xcc28d5a3,
+    (q31_t)0x1a6dee21, (q31_t)0xcc303524, (q31_t)0x1a63c284, (q31_t)0xcc3796a5,
+    (q31_t)0x1a599859, (q31_t)0xcc3efa25, (q31_t)0x1a4f6fa3, (q31_t)0xcc465fa3,
+    (q31_t)0x1a454860, (q31_t)0xcc4dc720, (q31_t)0x1a3b2292, (q31_t)0xcc55309b,
+    (q31_t)0x1a30fe38, (q31_t)0xcc5c9c14, (q31_t)0x1a26db54, (q31_t)0xcc64098b,
+    (q31_t)0x1a1cb9e5, (q31_t)0xcc6b78ff, (q31_t)0x1a1299ec, (q31_t)0xcc72ea70,
+    (q31_t)0x1a087b69, (q31_t)0xcc7a5dde, (q31_t)0x19fe5e5e, (q31_t)0xcc81d349,
+    (q31_t)0x19f442c9, (q31_t)0xcc894aaf, (q31_t)0x19ea28ac, (q31_t)0xcc90c412,
+    (q31_t)0x19e01006, (q31_t)0xcc983f70, (q31_t)0x19d5f8d9, (q31_t)0xcc9fbcca,
+    (q31_t)0x19cbe325, (q31_t)0xcca73c1e, (q31_t)0x19c1cee9, (q31_t)0xccaebd6e,
+    (q31_t)0x19b7bc27, (q31_t)0xccb640b8, (q31_t)0x19adaadf, (q31_t)0xccbdc5fc,
+    (q31_t)0x19a39b11, (q31_t)0xccc54d3a, (q31_t)0x19998cbe, (q31_t)0xccccd671,
+    (q31_t)0x198f7fe6, (q31_t)0xccd461a2, (q31_t)0x19857489, (q31_t)0xccdbeecc,
+    (q31_t)0x197b6aa8, (q31_t)0xcce37def, (q31_t)0x19716243, (q31_t)0xcceb0f0a,
+    (q31_t)0x19675b5a, (q31_t)0xccf2a21d, (q31_t)0x195d55ef, (q31_t)0xccfa3729,
+    (q31_t)0x19535201, (q31_t)0xcd01ce2b, (q31_t)0x19494f90, (q31_t)0xcd096725,
+    (q31_t)0x193f4e9e, (q31_t)0xcd110216, (q31_t)0x19354f2a, (q31_t)0xcd189efe,
+    (q31_t)0x192b5135, (q31_t)0xcd203ddc, (q31_t)0x192154bf, (q31_t)0xcd27deb0,
+    (q31_t)0x191759c9, (q31_t)0xcd2f817b, (q31_t)0x190d6053, (q31_t)0xcd37263a,
+    (q31_t)0x1903685d, (q31_t)0xcd3eccef, (q31_t)0x18f971e8, (q31_t)0xcd467599,
+    (q31_t)0x18ef7cf4, (q31_t)0xcd4e2037, (q31_t)0x18e58982, (q31_t)0xcd55ccca,
+    (q31_t)0x18db9792, (q31_t)0xcd5d7b50, (q31_t)0x18d1a724, (q31_t)0xcd652bcb,
+    (q31_t)0x18c7b838, (q31_t)0xcd6cde39, (q31_t)0x18bdcad0, (q31_t)0xcd74929a,
+    (q31_t)0x18b3deeb, (q31_t)0xcd7c48ee, (q31_t)0x18a9f48a, (q31_t)0xcd840134,
+    (q31_t)0x18a00bae, (q31_t)0xcd8bbb6d, (q31_t)0x18962456, (q31_t)0xcd937798,
+    (q31_t)0x188c3e83, (q31_t)0xcd9b35b4, (q31_t)0x18825a35, (q31_t)0xcda2f5c2,
+    (q31_t)0x1878776d, (q31_t)0xcdaab7c0, (q31_t)0x186e962b, (q31_t)0xcdb27bb0,
+    (q31_t)0x1864b670, (q31_t)0xcdba4190, (q31_t)0x185ad83c, (q31_t)0xcdc20960,
+    (q31_t)0x1850fb8e, (q31_t)0xcdc9d320, (q31_t)0x18472069, (q31_t)0xcdd19ed0,
+    (q31_t)0x183d46cc, (q31_t)0xcdd96c6f, (q31_t)0x18336eb7, (q31_t)0xcde13bfd,
+    (q31_t)0x1829982b, (q31_t)0xcde90d79, (q31_t)0x181fc328, (q31_t)0xcdf0e0e4,
+    (q31_t)0x1815efae, (q31_t)0xcdf8b63d, (q31_t)0x180c1dbf, (q31_t)0xce008d84,
+    (q31_t)0x18024d59, (q31_t)0xce0866b8, (q31_t)0x17f87e7f, (q31_t)0xce1041d9,
+    (q31_t)0x17eeb130, (q31_t)0xce181ee8, (q31_t)0x17e4e56c, (q31_t)0xce1ffde2,
+    (q31_t)0x17db1b34, (q31_t)0xce27dec9, (q31_t)0x17d15288, (q31_t)0xce2fc19c,
+    (q31_t)0x17c78b68, (q31_t)0xce37a65b, (q31_t)0x17bdc5d6, (q31_t)0xce3f8d05,
+    (q31_t)0x17b401d1, (q31_t)0xce47759a, (q31_t)0x17aa3f5a, (q31_t)0xce4f6019,
+    (q31_t)0x17a07e70, (q31_t)0xce574c84, (q31_t)0x1796bf16, (q31_t)0xce5f3ad8,
+    (q31_t)0x178d014a, (q31_t)0xce672b16, (q31_t)0x1783450d, (q31_t)0xce6f1d3d,
+    (q31_t)0x17798a60, (q31_t)0xce77114e, (q31_t)0x176fd143, (q31_t)0xce7f0748,
+    (q31_t)0x176619b6, (q31_t)0xce86ff2a, (q31_t)0x175c63ba, (q31_t)0xce8ef8f4,
+    (q31_t)0x1752af4f, (q31_t)0xce96f4a7, (q31_t)0x1748fc75, (q31_t)0xce9ef241,
+    (q31_t)0x173f4b2e, (q31_t)0xcea6f1c2, (q31_t)0x17359b78, (q31_t)0xceaef32b,
+    (q31_t)0x172bed55, (q31_t)0xceb6f67a, (q31_t)0x172240c5, (q31_t)0xcebefbb0,
+    (q31_t)0x171895c9, (q31_t)0xcec702cb, (q31_t)0x170eec60, (q31_t)0xcecf0bcd,
+    (q31_t)0x1705448b, (q31_t)0xced716b4, (q31_t)0x16fb9e4b, (q31_t)0xcedf2380,
+    (q31_t)0x16f1f99f, (q31_t)0xcee73231, (q31_t)0x16e85689, (q31_t)0xceef42c7,
+    (q31_t)0x16deb508, (q31_t)0xcef75541, (q31_t)0x16d5151d, (q31_t)0xceff699f,
+    (q31_t)0x16cb76c9, (q31_t)0xcf077fe1, (q31_t)0x16c1da0b, (q31_t)0xcf0f9805,
+    (q31_t)0x16b83ee4, (q31_t)0xcf17b20d, (q31_t)0x16aea555, (q31_t)0xcf1fcdf8,
+    (q31_t)0x16a50d5d, (q31_t)0xcf27ebc5, (q31_t)0x169b76fe, (q31_t)0xcf300b74,
+    (q31_t)0x1691e237, (q31_t)0xcf382d05, (q31_t)0x16884f09, (q31_t)0xcf405077,
+    (q31_t)0x167ebd74, (q31_t)0xcf4875ca, (q31_t)0x16752d79, (q31_t)0xcf509cfe,
+    (q31_t)0x166b9f18, (q31_t)0xcf58c613, (q31_t)0x16621251, (q31_t)0xcf60f108,
+    (q31_t)0x16588725, (q31_t)0xcf691ddd, (q31_t)0x164efd94, (q31_t)0xcf714c91,
+    (q31_t)0x1645759f, (q31_t)0xcf797d24, (q31_t)0x163bef46, (q31_t)0xcf81af97,
+    (q31_t)0x16326a88, (q31_t)0xcf89e3e8, (q31_t)0x1628e767, (q31_t)0xcf921a17,
+    (q31_t)0x161f65e4, (q31_t)0xcf9a5225, (q31_t)0x1615e5fd, (q31_t)0xcfa28c10,
+    (q31_t)0x160c67b4, (q31_t)0xcfaac7d8, (q31_t)0x1602eb0a, (q31_t)0xcfb3057d,
+    (q31_t)0x15f96ffd, (q31_t)0xcfbb4500, (q31_t)0x15eff690, (q31_t)0xcfc3865e,
+    (q31_t)0x15e67ec1, (q31_t)0xcfcbc999, (q31_t)0x15dd0892, (q31_t)0xcfd40eaf,
+    (q31_t)0x15d39403, (q31_t)0xcfdc55a1, (q31_t)0x15ca2115, (q31_t)0xcfe49e6d,
+    (q31_t)0x15c0afc6, (q31_t)0xcfece915, (q31_t)0x15b74019, (q31_t)0xcff53597,
+    (q31_t)0x15add20d, (q31_t)0xcffd83f4, (q31_t)0x15a465a3, (q31_t)0xd005d42a,
+    (q31_t)0x159afadb, (q31_t)0xd00e2639, (q31_t)0x159191b5, (q31_t)0xd0167a22,
+    (q31_t)0x15882a32, (q31_t)0xd01ecfe4, (q31_t)0x157ec452, (q31_t)0xd027277e,
+    (q31_t)0x15756016, (q31_t)0xd02f80f1, (q31_t)0x156bfd7d, (q31_t)0xd037dc3b,
+    (q31_t)0x15629c89, (q31_t)0xd040395d, (q31_t)0x15593d3a, (q31_t)0xd0489856,
+    (q31_t)0x154fdf8f, (q31_t)0xd050f926, (q31_t)0x15468389, (q31_t)0xd0595bcd,
+    (q31_t)0x153d292a, (q31_t)0xd061c04a, (q31_t)0x1533d070, (q31_t)0xd06a269d,
+    (q31_t)0x152a795d, (q31_t)0xd0728ec6, (q31_t)0x152123f0, (q31_t)0xd07af8c4,
+    (q31_t)0x1517d02b, (q31_t)0xd0836497, (q31_t)0x150e7e0d, (q31_t)0xd08bd23f,
+    (q31_t)0x15052d97, (q31_t)0xd09441bb, (q31_t)0x14fbdec9, (q31_t)0xd09cb30b,
+    (q31_t)0x14f291a4, (q31_t)0xd0a5262f, (q31_t)0x14e94627, (q31_t)0xd0ad9b26,
+    (q31_t)0x14dffc54, (q31_t)0xd0b611f1, (q31_t)0x14d6b42b, (q31_t)0xd0be8a8d,
+    (q31_t)0x14cd6dab, (q31_t)0xd0c704fd, (q31_t)0x14c428d6, (q31_t)0xd0cf813e,
+    (q31_t)0x14bae5ab, (q31_t)0xd0d7ff51, (q31_t)0x14b1a42c, (q31_t)0xd0e07f36,
+    (q31_t)0x14a86458, (q31_t)0xd0e900ec, (q31_t)0x149f2630, (q31_t)0xd0f18472,
+    (q31_t)0x1495e9b3, (q31_t)0xd0fa09c9, (q31_t)0x148caee4, (q31_t)0xd10290f0,
+    (q31_t)0x148375c1, (q31_t)0xd10b19e7, (q31_t)0x147a3e4b, (q31_t)0xd113a4ad,
+    (q31_t)0x14710883, (q31_t)0xd11c3142, (q31_t)0x1467d469, (q31_t)0xd124bfa6,
+    (q31_t)0x145ea1fd, (q31_t)0xd12d4fd9, (q31_t)0x14557140, (q31_t)0xd135e1d9,
+    (q31_t)0x144c4232, (q31_t)0xd13e75a8, (q31_t)0x144314d3, (q31_t)0xd1470b44,
+    (q31_t)0x1439e923, (q31_t)0xd14fa2ad, (q31_t)0x1430bf24, (q31_t)0xd1583be2,
+    (q31_t)0x142796d5, (q31_t)0xd160d6e5, (q31_t)0x141e7037, (q31_t)0xd16973b3,
+    (q31_t)0x14154b4a, (q31_t)0xd172124d, (q31_t)0x140c280e, (q31_t)0xd17ab2b3,
+    (q31_t)0x14030684, (q31_t)0xd18354e4, (q31_t)0x13f9e6ad, (q31_t)0xd18bf8e0,
+    (q31_t)0x13f0c887, (q31_t)0xd1949ea6, (q31_t)0x13e7ac15, (q31_t)0xd19d4636,
+    (q31_t)0x13de9156, (q31_t)0xd1a5ef90, (q31_t)0x13d5784a, (q31_t)0xd1ae9ab4,
+    (q31_t)0x13cc60f2, (q31_t)0xd1b747a0, (q31_t)0x13c34b4f, (q31_t)0xd1bff656,
+    (q31_t)0x13ba3760, (q31_t)0xd1c8a6d4, (q31_t)0x13b12526, (q31_t)0xd1d1591a,
+    (q31_t)0x13a814a2, (q31_t)0xd1da0d28, (q31_t)0x139f05d3, (q31_t)0xd1e2c2fd,
+    (q31_t)0x1395f8ba, (q31_t)0xd1eb7a9a, (q31_t)0x138ced57, (q31_t)0xd1f433fd,
+    (q31_t)0x1383e3ab, (q31_t)0xd1fcef27, (q31_t)0x137adbb6, (q31_t)0xd205ac17,
+    (q31_t)0x1371d579, (q31_t)0xd20e6acc, (q31_t)0x1368d0f3, (q31_t)0xd2172b48,
+    (q31_t)0x135fce26, (q31_t)0xd21fed88, (q31_t)0x1356cd11, (q31_t)0xd228b18d,
+    (q31_t)0x134dcdb4, (q31_t)0xd2317756, (q31_t)0x1344d011, (q31_t)0xd23a3ee4,
+    (q31_t)0x133bd427, (q31_t)0xd2430835, (q31_t)0x1332d9f7, (q31_t)0xd24bd34a,
+    (q31_t)0x1329e181, (q31_t)0xd254a021, (q31_t)0x1320eac6, (q31_t)0xd25d6ebc,
+    (q31_t)0x1317f5c6, (q31_t)0xd2663f19, (q31_t)0x130f0280, (q31_t)0xd26f1138,
+    (q31_t)0x130610f7, (q31_t)0xd277e518, (q31_t)0x12fd2129, (q31_t)0xd280babb,
+    (q31_t)0x12f43318, (q31_t)0xd289921e, (q31_t)0x12eb46c3, (q31_t)0xd2926b41,
+    (q31_t)0x12e25c2b, (q31_t)0xd29b4626, (q31_t)0x12d97350, (q31_t)0xd2a422ca,
+    (q31_t)0x12d08c33, (q31_t)0xd2ad012e, (q31_t)0x12c7a6d4, (q31_t)0xd2b5e151,
+    (q31_t)0x12bec333, (q31_t)0xd2bec333, (q31_t)0x12b5e151, (q31_t)0xd2c7a6d4,
+    (q31_t)0x12ad012e, (q31_t)0xd2d08c33, (q31_t)0x12a422ca, (q31_t)0xd2d97350,
+    (q31_t)0x129b4626, (q31_t)0xd2e25c2b, (q31_t)0x12926b41, (q31_t)0xd2eb46c3,
+    (q31_t)0x1289921e, (q31_t)0xd2f43318, (q31_t)0x1280babb, (q31_t)0xd2fd2129,
+    (q31_t)0x1277e518, (q31_t)0xd30610f7, (q31_t)0x126f1138, (q31_t)0xd30f0280,
+    (q31_t)0x12663f19, (q31_t)0xd317f5c6, (q31_t)0x125d6ebc, (q31_t)0xd320eac6,
+    (q31_t)0x1254a021, (q31_t)0xd329e181, (q31_t)0x124bd34a, (q31_t)0xd332d9f7,
+    (q31_t)0x12430835, (q31_t)0xd33bd427, (q31_t)0x123a3ee4, (q31_t)0xd344d011,
+    (q31_t)0x12317756, (q31_t)0xd34dcdb4, (q31_t)0x1228b18d, (q31_t)0xd356cd11,
+    (q31_t)0x121fed88, (q31_t)0xd35fce26, (q31_t)0x12172b48, (q31_t)0xd368d0f3,
+    (q31_t)0x120e6acc, (q31_t)0xd371d579, (q31_t)0x1205ac17, (q31_t)0xd37adbb6,
+    (q31_t)0x11fcef27, (q31_t)0xd383e3ab, (q31_t)0x11f433fd, (q31_t)0xd38ced57,
+    (q31_t)0x11eb7a9a, (q31_t)0xd395f8ba, (q31_t)0x11e2c2fd, (q31_t)0xd39f05d3,
+    (q31_t)0x11da0d28, (q31_t)0xd3a814a2, (q31_t)0x11d1591a, (q31_t)0xd3b12526,
+    (q31_t)0x11c8a6d4, (q31_t)0xd3ba3760, (q31_t)0x11bff656, (q31_t)0xd3c34b4f,
+    (q31_t)0x11b747a0, (q31_t)0xd3cc60f2, (q31_t)0x11ae9ab4, (q31_t)0xd3d5784a,
+    (q31_t)0x11a5ef90, (q31_t)0xd3de9156, (q31_t)0x119d4636, (q31_t)0xd3e7ac15,
+    (q31_t)0x11949ea6, (q31_t)0xd3f0c887, (q31_t)0x118bf8e0, (q31_t)0xd3f9e6ad,
+    (q31_t)0x118354e4, (q31_t)0xd4030684, (q31_t)0x117ab2b3, (q31_t)0xd40c280e,
+    (q31_t)0x1172124d, (q31_t)0xd4154b4a, (q31_t)0x116973b3, (q31_t)0xd41e7037,
+    (q31_t)0x1160d6e5, (q31_t)0xd42796d5, (q31_t)0x11583be2, (q31_t)0xd430bf24,
+    (q31_t)0x114fa2ad, (q31_t)0xd439e923, (q31_t)0x11470b44, (q31_t)0xd44314d3,
+    (q31_t)0x113e75a8, (q31_t)0xd44c4232, (q31_t)0x1135e1d9, (q31_t)0xd4557140,
+    (q31_t)0x112d4fd9, (q31_t)0xd45ea1fd, (q31_t)0x1124bfa6, (q31_t)0xd467d469,
+    (q31_t)0x111c3142, (q31_t)0xd4710883, (q31_t)0x1113a4ad, (q31_t)0xd47a3e4b,
+    (q31_t)0x110b19e7, (q31_t)0xd48375c1, (q31_t)0x110290f0, (q31_t)0xd48caee4,
+    (q31_t)0x10fa09c9, (q31_t)0xd495e9b3, (q31_t)0x10f18472, (q31_t)0xd49f2630,
+    (q31_t)0x10e900ec, (q31_t)0xd4a86458, (q31_t)0x10e07f36, (q31_t)0xd4b1a42c,
+    (q31_t)0x10d7ff51, (q31_t)0xd4bae5ab, (q31_t)0x10cf813e, (q31_t)0xd4c428d6,
+    (q31_t)0x10c704fd, (q31_t)0xd4cd6dab, (q31_t)0x10be8a8d, (q31_t)0xd4d6b42b,
+    (q31_t)0x10b611f1, (q31_t)0xd4dffc54, (q31_t)0x10ad9b26, (q31_t)0xd4e94627,
+    (q31_t)0x10a5262f, (q31_t)0xd4f291a4, (q31_t)0x109cb30b, (q31_t)0xd4fbdec9,
+    (q31_t)0x109441bb, (q31_t)0xd5052d97, (q31_t)0x108bd23f, (q31_t)0xd50e7e0d,
+    (q31_t)0x10836497, (q31_t)0xd517d02b, (q31_t)0x107af8c4, (q31_t)0xd52123f0,
+    (q31_t)0x10728ec6, (q31_t)0xd52a795d, (q31_t)0x106a269d, (q31_t)0xd533d070,
+    (q31_t)0x1061c04a, (q31_t)0xd53d292a, (q31_t)0x10595bcd, (q31_t)0xd5468389,
+    (q31_t)0x1050f926, (q31_t)0xd54fdf8f, (q31_t)0x10489856, (q31_t)0xd5593d3a,
+    (q31_t)0x1040395d, (q31_t)0xd5629c89, (q31_t)0x1037dc3b, (q31_t)0xd56bfd7d,
+    (q31_t)0x102f80f1, (q31_t)0xd5756016, (q31_t)0x1027277e, (q31_t)0xd57ec452,
+    (q31_t)0x101ecfe4, (q31_t)0xd5882a32, (q31_t)0x10167a22, (q31_t)0xd59191b5,
+    (q31_t)0x100e2639, (q31_t)0xd59afadb, (q31_t)0x1005d42a, (q31_t)0xd5a465a3,
+    (q31_t)0xffd83f4, (q31_t)0xd5add20d, (q31_t)0xff53597, (q31_t)0xd5b74019,
+    (q31_t)0xfece915, (q31_t)0xd5c0afc6, (q31_t)0xfe49e6d, (q31_t)0xd5ca2115,
+    (q31_t)0xfdc55a1, (q31_t)0xd5d39403, (q31_t)0xfd40eaf, (q31_t)0xd5dd0892,
+    (q31_t)0xfcbc999, (q31_t)0xd5e67ec1, (q31_t)0xfc3865e, (q31_t)0xd5eff690,
+    (q31_t)0xfbb4500, (q31_t)0xd5f96ffd, (q31_t)0xfb3057d, (q31_t)0xd602eb0a,
+    (q31_t)0xfaac7d8, (q31_t)0xd60c67b4, (q31_t)0xfa28c10, (q31_t)0xd615e5fd,
+    (q31_t)0xf9a5225, (q31_t)0xd61f65e4, (q31_t)0xf921a17, (q31_t)0xd628e767,
+    (q31_t)0xf89e3e8, (q31_t)0xd6326a88, (q31_t)0xf81af97, (q31_t)0xd63bef46,
+    (q31_t)0xf797d24, (q31_t)0xd645759f, (q31_t)0xf714c91, (q31_t)0xd64efd94,
+    (q31_t)0xf691ddd, (q31_t)0xd6588725, (q31_t)0xf60f108, (q31_t)0xd6621251,
+    (q31_t)0xf58c613, (q31_t)0xd66b9f18, (q31_t)0xf509cfe, (q31_t)0xd6752d79,
+    (q31_t)0xf4875ca, (q31_t)0xd67ebd74, (q31_t)0xf405077, (q31_t)0xd6884f09,
+    (q31_t)0xf382d05, (q31_t)0xd691e237, (q31_t)0xf300b74, (q31_t)0xd69b76fe,
+    (q31_t)0xf27ebc5, (q31_t)0xd6a50d5d, (q31_t)0xf1fcdf8, (q31_t)0xd6aea555,
+    (q31_t)0xf17b20d, (q31_t)0xd6b83ee4, (q31_t)0xf0f9805, (q31_t)0xd6c1da0b,
+    (q31_t)0xf077fe1, (q31_t)0xd6cb76c9, (q31_t)0xeff699f, (q31_t)0xd6d5151d,
+    (q31_t)0xef75541, (q31_t)0xd6deb508, (q31_t)0xeef42c7, (q31_t)0xd6e85689,
+    (q31_t)0xee73231, (q31_t)0xd6f1f99f, (q31_t)0xedf2380, (q31_t)0xd6fb9e4b,
+    (q31_t)0xed716b4, (q31_t)0xd705448b, (q31_t)0xecf0bcd, (q31_t)0xd70eec60,
+    (q31_t)0xec702cb, (q31_t)0xd71895c9, (q31_t)0xebefbb0, (q31_t)0xd72240c5,
+    (q31_t)0xeb6f67a, (q31_t)0xd72bed55, (q31_t)0xeaef32b, (q31_t)0xd7359b78,
+    (q31_t)0xea6f1c2, (q31_t)0xd73f4b2e, (q31_t)0xe9ef241, (q31_t)0xd748fc75,
+    (q31_t)0xe96f4a7, (q31_t)0xd752af4f, (q31_t)0xe8ef8f4, (q31_t)0xd75c63ba,
+    (q31_t)0xe86ff2a, (q31_t)0xd76619b6, (q31_t)0xe7f0748, (q31_t)0xd76fd143,
+    (q31_t)0xe77114e, (q31_t)0xd7798a60, (q31_t)0xe6f1d3d, (q31_t)0xd783450d,
+    (q31_t)0xe672b16, (q31_t)0xd78d014a, (q31_t)0xe5f3ad8, (q31_t)0xd796bf16,
+    (q31_t)0xe574c84, (q31_t)0xd7a07e70, (q31_t)0xe4f6019, (q31_t)0xd7aa3f5a,
+    (q31_t)0xe47759a, (q31_t)0xd7b401d1, (q31_t)0xe3f8d05, (q31_t)0xd7bdc5d6,
+    (q31_t)0xe37a65b, (q31_t)0xd7c78b68, (q31_t)0xe2fc19c, (q31_t)0xd7d15288,
+    (q31_t)0xe27dec9, (q31_t)0xd7db1b34, (q31_t)0xe1ffde2, (q31_t)0xd7e4e56c,
+    (q31_t)0xe181ee8, (q31_t)0xd7eeb130, (q31_t)0xe1041d9, (q31_t)0xd7f87e7f,
+    (q31_t)0xe0866b8, (q31_t)0xd8024d59, (q31_t)0xe008d84, (q31_t)0xd80c1dbf,
+    (q31_t)0xdf8b63d, (q31_t)0xd815efae, (q31_t)0xdf0e0e4, (q31_t)0xd81fc328,
+    (q31_t)0xde90d79, (q31_t)0xd829982b, (q31_t)0xde13bfd, (q31_t)0xd8336eb7,
+    (q31_t)0xdd96c6f, (q31_t)0xd83d46cc, (q31_t)0xdd19ed0, (q31_t)0xd8472069,
+    (q31_t)0xdc9d320, (q31_t)0xd850fb8e, (q31_t)0xdc20960, (q31_t)0xd85ad83c,
+    (q31_t)0xdba4190, (q31_t)0xd864b670, (q31_t)0xdb27bb0, (q31_t)0xd86e962b,
+    (q31_t)0xdaab7c0, (q31_t)0xd878776d, (q31_t)0xda2f5c2, (q31_t)0xd8825a35,
+    (q31_t)0xd9b35b4, (q31_t)0xd88c3e83, (q31_t)0xd937798, (q31_t)0xd8962456,
+    (q31_t)0xd8bbb6d, (q31_t)0xd8a00bae, (q31_t)0xd840134, (q31_t)0xd8a9f48a,
+    (q31_t)0xd7c48ee, (q31_t)0xd8b3deeb, (q31_t)0xd74929a, (q31_t)0xd8bdcad0,
+    (q31_t)0xd6cde39, (q31_t)0xd8c7b838, (q31_t)0xd652bcb, (q31_t)0xd8d1a724,
+    (q31_t)0xd5d7b50, (q31_t)0xd8db9792, (q31_t)0xd55ccca, (q31_t)0xd8e58982,
+    (q31_t)0xd4e2037, (q31_t)0xd8ef7cf4, (q31_t)0xd467599, (q31_t)0xd8f971e8,
+    (q31_t)0xd3eccef, (q31_t)0xd903685d, (q31_t)0xd37263a, (q31_t)0xd90d6053,
+    (q31_t)0xd2f817b, (q31_t)0xd91759c9, (q31_t)0xd27deb0, (q31_t)0xd92154bf,
+    (q31_t)0xd203ddc, (q31_t)0xd92b5135, (q31_t)0xd189efe, (q31_t)0xd9354f2a,
+    (q31_t)0xd110216, (q31_t)0xd93f4e9e, (q31_t)0xd096725, (q31_t)0xd9494f90,
+    (q31_t)0xd01ce2b, (q31_t)0xd9535201, (q31_t)0xcfa3729, (q31_t)0xd95d55ef,
+    (q31_t)0xcf2a21d, (q31_t)0xd9675b5a, (q31_t)0xceb0f0a, (q31_t)0xd9716243,
+    (q31_t)0xce37def, (q31_t)0xd97b6aa8, (q31_t)0xcdbeecc, (q31_t)0xd9857489,
+    (q31_t)0xcd461a2, (q31_t)0xd98f7fe6, (q31_t)0xcccd671, (q31_t)0xd9998cbe,
+    (q31_t)0xcc54d3a, (q31_t)0xd9a39b11, (q31_t)0xcbdc5fc, (q31_t)0xd9adaadf,
+    (q31_t)0xcb640b8, (q31_t)0xd9b7bc27, (q31_t)0xcaebd6e, (q31_t)0xd9c1cee9,
+    (q31_t)0xca73c1e, (q31_t)0xd9cbe325, (q31_t)0xc9fbcca, (q31_t)0xd9d5f8d9,
+    (q31_t)0xc983f70, (q31_t)0xd9e01006, (q31_t)0xc90c412, (q31_t)0xd9ea28ac,
+    (q31_t)0xc894aaf, (q31_t)0xd9f442c9, (q31_t)0xc81d349, (q31_t)0xd9fe5e5e,
+    (q31_t)0xc7a5dde, (q31_t)0xda087b69, (q31_t)0xc72ea70, (q31_t)0xda1299ec,
+    (q31_t)0xc6b78ff, (q31_t)0xda1cb9e5, (q31_t)0xc64098b, (q31_t)0xda26db54,
+    (q31_t)0xc5c9c14, (q31_t)0xda30fe38, (q31_t)0xc55309b, (q31_t)0xda3b2292,
+    (q31_t)0xc4dc720, (q31_t)0xda454860, (q31_t)0xc465fa3, (q31_t)0xda4f6fa3,
+    (q31_t)0xc3efa25, (q31_t)0xda599859, (q31_t)0xc3796a5, (q31_t)0xda63c284,
+    (q31_t)0xc303524, (q31_t)0xda6dee21, (q31_t)0xc28d5a3, (q31_t)0xda781b31,
+    (q31_t)0xc217822, (q31_t)0xda8249b4, (q31_t)0xc1a1ca0, (q31_t)0xda8c79a9,
+    (q31_t)0xc12c31f, (q31_t)0xda96ab0f, (q31_t)0xc0b6b9e, (q31_t)0xdaa0dde7,
+    (q31_t)0xc04161e, (q31_t)0xdaab122f, (q31_t)0xbfcc29f, (q31_t)0xdab547e8,
+    (q31_t)0xbf57121, (q31_t)0xdabf7f11, (q31_t)0xbee21a5, (q31_t)0xdac9b7a9,
+    (q31_t)0xbe6d42b, (q31_t)0xdad3f1b1, (q31_t)0xbdf88b3, (q31_t)0xdade2d28,
+    (q31_t)0xbd83f3d, (q31_t)0xdae86a0d, (q31_t)0xbd0f7ca, (q31_t)0xdaf2a860,
+    (q31_t)0xbc9b25a, (q31_t)0xdafce821, (q31_t)0xbc26eee, (q31_t)0xdb072950,
+    (q31_t)0xbbb2d85, (q31_t)0xdb116beb, (q31_t)0xbb3ee20, (q31_t)0xdb1baff2,
+    (q31_t)0xbacb0bf, (q31_t)0xdb25f566, (q31_t)0xba57563, (q31_t)0xdb303c46,
+    (q31_t)0xb9e3c0b, (q31_t)0xdb3a8491, (q31_t)0xb9704b9, (q31_t)0xdb44ce46,
+    (q31_t)0xb8fcf6b, (q31_t)0xdb4f1967, (q31_t)0xb889c23, (q31_t)0xdb5965f1,
+    (q31_t)0xb816ae1, (q31_t)0xdb63b3e5, (q31_t)0xb7a3ba5, (q31_t)0xdb6e0342,
+    (q31_t)0xb730e70, (q31_t)0xdb785409, (q31_t)0xb6be341, (q31_t)0xdb82a638,
+    (q31_t)0xb64ba19, (q31_t)0xdb8cf9cf, (q31_t)0xb5d92f8, (q31_t)0xdb974ece,
+    (q31_t)0xb566ddf, (q31_t)0xdba1a534, (q31_t)0xb4f4acd, (q31_t)0xdbabfd01,
+    (q31_t)0xb4829c4, (q31_t)0xdbb65634, (q31_t)0xb410ac3, (q31_t)0xdbc0b0ce,
+    (q31_t)0xb39edca, (q31_t)0xdbcb0cce, (q31_t)0xb32d2da, (q31_t)0xdbd56a32,
+    (q31_t)0xb2bb9f4, (q31_t)0xdbdfc8fc, (q31_t)0xb24a316, (q31_t)0xdbea292b,
+    (q31_t)0xb1d8e43, (q31_t)0xdbf48abd, (q31_t)0xb167b79, (q31_t)0xdbfeedb3,
+    (q31_t)0xb0f6aba, (q31_t)0xdc09520d, (q31_t)0xb085c05, (q31_t)0xdc13b7c9,
+    (q31_t)0xb014f5b, (q31_t)0xdc1e1ee9, (q31_t)0xafa44bc, (q31_t)0xdc28876a,
+    (q31_t)0xaf33c28, (q31_t)0xdc32f14d, (q31_t)0xaec35a0, (q31_t)0xdc3d5c91,
+    (q31_t)0xae53123, (q31_t)0xdc47c936, (q31_t)0xade2eb3, (q31_t)0xdc52373c,
+    (q31_t)0xad72e4f, (q31_t)0xdc5ca6a2, (q31_t)0xad02ff8, (q31_t)0xdc671768,
+    (q31_t)0xac933ae, (q31_t)0xdc71898d, (q31_t)0xac23971, (q31_t)0xdc7bfd11,
+    (q31_t)0xabb4141, (q31_t)0xdc8671f3, (q31_t)0xab44b1f, (q31_t)0xdc90e834,
+    (q31_t)0xaad570c, (q31_t)0xdc9b5fd2, (q31_t)0xaa66506, (q31_t)0xdca5d8cd,
+    (q31_t)0xa9f750f, (q31_t)0xdcb05326, (q31_t)0xa988727, (q31_t)0xdcbacedb,
+    (q31_t)0xa919b4e, (q31_t)0xdcc54bec, (q31_t)0xa8ab184, (q31_t)0xdccfca59,
+    (q31_t)0xa83c9ca, (q31_t)0xdcda4a21, (q31_t)0xa7ce420, (q31_t)0xdce4cb44,
+    (q31_t)0xa760086, (q31_t)0xdcef4dc2, (q31_t)0xa6f1efc, (q31_t)0xdcf9d199,
+    (q31_t)0xa683f83, (q31_t)0xdd0456ca, (q31_t)0xa61621b, (q31_t)0xdd0edd55,
+    (q31_t)0xa5a86c4, (q31_t)0xdd196538, (q31_t)0xa53ad7e, (q31_t)0xdd23ee74,
+    (q31_t)0xa4cd64b, (q31_t)0xdd2e7908, (q31_t)0xa460129, (q31_t)0xdd3904f4,
+    (q31_t)0xa3f2e19, (q31_t)0xdd439236, (q31_t)0xa385d1d, (q31_t)0xdd4e20d0,
+    (q31_t)0xa318e32, (q31_t)0xdd58b0c0, (q31_t)0xa2ac15b, (q31_t)0xdd634206,
+    (q31_t)0xa23f698, (q31_t)0xdd6dd4a2, (q31_t)0xa1d2de7, (q31_t)0xdd786892,
+    (q31_t)0xa16674b, (q31_t)0xdd82fdd8, (q31_t)0xa0fa2c3, (q31_t)0xdd8d9472,
+    (q31_t)0xa08e04f, (q31_t)0xdd982c60, (q31_t)0xa021fef, (q31_t)0xdda2c5a2,
+    (q31_t)0x9fb61a5, (q31_t)0xddad6036, (q31_t)0x9f4a570, (q31_t)0xddb7fc1e,
+    (q31_t)0x9edeb50, (q31_t)0xddc29958, (q31_t)0x9e73346, (q31_t)0xddcd37e4,
+    (q31_t)0x9e07d51, (q31_t)0xddd7d7c1, (q31_t)0x9d9c973, (q31_t)0xdde278ef,
+    (q31_t)0x9d317ab, (q31_t)0xdded1b6e, (q31_t)0x9cc67fa, (q31_t)0xddf7bf3e,
+    (q31_t)0x9c5ba60, (q31_t)0xde02645d, (q31_t)0x9bf0edd, (q31_t)0xde0d0acc,
+    (q31_t)0x9b86572, (q31_t)0xde17b28a, (q31_t)0x9b1be1e, (q31_t)0xde225b96,
+    (q31_t)0x9ab18e3, (q31_t)0xde2d05f1, (q31_t)0x9a475bf, (q31_t)0xde37b199,
+    (q31_t)0x99dd4b4, (q31_t)0xde425e8f, (q31_t)0x99735c2, (q31_t)0xde4d0cd2,
+    (q31_t)0x99098e9, (q31_t)0xde57bc62, (q31_t)0x989fe29, (q31_t)0xde626d3e,
+    (q31_t)0x9836582, (q31_t)0xde6d1f65, (q31_t)0x97ccef5, (q31_t)0xde77d2d8,
+    (q31_t)0x9763a83, (q31_t)0xde828796, (q31_t)0x96fa82a, (q31_t)0xde8d3d9e,
+    (q31_t)0x96917ec, (q31_t)0xde97f4f1, (q31_t)0x96289c9, (q31_t)0xdea2ad8d,
+    (q31_t)0x95bfdc1, (q31_t)0xdead6773, (q31_t)0x95573d4, (q31_t)0xdeb822a1,
+    (q31_t)0x94eec03, (q31_t)0xdec2df18, (q31_t)0x948664d, (q31_t)0xdecd9cd7,
+    (q31_t)0x941e2b4, (q31_t)0xded85bdd, (q31_t)0x93b6137, (q31_t)0xdee31c2b,
+    (q31_t)0x934e1d6, (q31_t)0xdeedddc0, (q31_t)0x92e6492, (q31_t)0xdef8a09b,
+    (q31_t)0x927e96b, (q31_t)0xdf0364bc, (q31_t)0x9217062, (q31_t)0xdf0e2a22,
+    (q31_t)0x91af976, (q31_t)0xdf18f0ce, (q31_t)0x91484a8, (q31_t)0xdf23b8be,
+    (q31_t)0x90e11f7, (q31_t)0xdf2e81f3, (q31_t)0x907a166, (q31_t)0xdf394c6b,
+    (q31_t)0x90132f2, (q31_t)0xdf441828, (q31_t)0x8fac69e, (q31_t)0xdf4ee527,
+    (q31_t)0x8f45c68, (q31_t)0xdf59b369, (q31_t)0x8edf452, (q31_t)0xdf6482ed,
+    (q31_t)0x8e78e5b, (q31_t)0xdf6f53b3, (q31_t)0x8e12a84, (q31_t)0xdf7a25ba,
+    (q31_t)0x8dac8cd, (q31_t)0xdf84f902, (q31_t)0x8d46936, (q31_t)0xdf8fcd8b,
+    (q31_t)0x8ce0bc0, (q31_t)0xdf9aa354, (q31_t)0x8c7b06b, (q31_t)0xdfa57a5d,
+    (q31_t)0x8c15736, (q31_t)0xdfb052a5, (q31_t)0x8bb0023, (q31_t)0xdfbb2c2c,
+    (q31_t)0x8b4ab32, (q31_t)0xdfc606f1, (q31_t)0x8ae5862, (q31_t)0xdfd0e2f5,
+    (q31_t)0x8a807b4, (q31_t)0xdfdbc036, (q31_t)0x8a1b928, (q31_t)0xdfe69eb4,
+    (q31_t)0x89b6cbf, (q31_t)0xdff17e70, (q31_t)0x8952278, (q31_t)0xdffc5f67,
+    (q31_t)0x88eda54, (q31_t)0xe007419b, (q31_t)0x8889454, (q31_t)0xe012250a,
+    (q31_t)0x8825077, (q31_t)0xe01d09b4, (q31_t)0x87c0ebd, (q31_t)0xe027ef99,
+    (q31_t)0x875cf28, (q31_t)0xe032d6b8, (q31_t)0x86f91b7, (q31_t)0xe03dbf11,
+    (q31_t)0x869566a, (q31_t)0xe048a8a4, (q31_t)0x8631d42, (q31_t)0xe053936f,
+    (q31_t)0x85ce63e, (q31_t)0xe05e7f74, (q31_t)0x856b160, (q31_t)0xe0696cb0,
+    (q31_t)0x8507ea7, (q31_t)0xe0745b24, (q31_t)0x84a4e14, (q31_t)0xe07f4acf,
+    (q31_t)0x8441fa6, (q31_t)0xe08a3bb2, (q31_t)0x83df35f, (q31_t)0xe0952dcb,
+    (q31_t)0x837c93e, (q31_t)0xe0a0211a, (q31_t)0x831a143, (q31_t)0xe0ab159e,
+    (q31_t)0x82b7b70, (q31_t)0xe0b60b58, (q31_t)0x82557c3, (q31_t)0xe0c10247,
+    (q31_t)0x81f363d, (q31_t)0xe0cbfa6a, (q31_t)0x81916df, (q31_t)0xe0d6f3c1,
+    (q31_t)0x812f9a9, (q31_t)0xe0e1ee4b, (q31_t)0x80cde9b, (q31_t)0xe0ecea09,
+    (q31_t)0x806c5b5, (q31_t)0xe0f7e6f9, (q31_t)0x800aef7, (q31_t)0xe102e51c,
+    (q31_t)0x7fa9a62, (q31_t)0xe10de470, (q31_t)0x7f487f6, (q31_t)0xe118e4f6,
+    (q31_t)0x7ee77b3, (q31_t)0xe123e6ad, (q31_t)0x7e8699a, (q31_t)0xe12ee995,
+    (q31_t)0x7e25daa, (q31_t)0xe139edac, (q31_t)0x7dc53e3, (q31_t)0xe144f2f3,
+    (q31_t)0x7d64c47, (q31_t)0xe14ff96a, (q31_t)0x7d046d6, (q31_t)0xe15b0110,
+    (q31_t)0x7ca438f, (q31_t)0xe16609e3, (q31_t)0x7c44272, (q31_t)0xe17113e5,
+    (q31_t)0x7be4381, (q31_t)0xe17c1f15, (q31_t)0x7b846ba, (q31_t)0xe1872b72,
+    (q31_t)0x7b24c20, (q31_t)0xe19238fb, (q31_t)0x7ac53b1, (q31_t)0xe19d47b1,
+    (q31_t)0x7a65d6e, (q31_t)0xe1a85793, (q31_t)0x7a06957, (q31_t)0xe1b368a0,
+    (q31_t)0x79a776c, (q31_t)0xe1be7ad8, (q31_t)0x79487ae, (q31_t)0xe1c98e3b,
+    (q31_t)0x78e9a1d, (q31_t)0xe1d4a2c8, (q31_t)0x788aeb9, (q31_t)0xe1dfb87f,
+    (q31_t)0x782c582, (q31_t)0xe1eacf5f, (q31_t)0x77cde79, (q31_t)0xe1f5e768,
+    (q31_t)0x776f99d, (q31_t)0xe2010099, (q31_t)0x77116f0, (q31_t)0xe20c1af3,
+    (q31_t)0x76b3671, (q31_t)0xe2173674, (q31_t)0x7655820, (q31_t)0xe222531c,
+    (q31_t)0x75f7bfe, (q31_t)0xe22d70eb, (q31_t)0x759a20a, (q31_t)0xe2388fe1,
+    (q31_t)0x753ca46, (q31_t)0xe243affc, (q31_t)0x74df4b1, (q31_t)0xe24ed13d,
+    (q31_t)0x748214c, (q31_t)0xe259f3a3, (q31_t)0x7425016, (q31_t)0xe265172e,
+    (q31_t)0x73c8111, (q31_t)0xe2703bdc, (q31_t)0x736b43c, (q31_t)0xe27b61af,
+    (q31_t)0x730e997, (q31_t)0xe28688a4, (q31_t)0x72b2123, (q31_t)0xe291b0bd,
+    (q31_t)0x7255ae0, (q31_t)0xe29cd9f8, (q31_t)0x71f96ce, (q31_t)0xe2a80456,
+    (q31_t)0x719d4ed, (q31_t)0xe2b32fd4, (q31_t)0x714153e, (q31_t)0xe2be5c74,
+    (q31_t)0x70e57c0, (q31_t)0xe2c98a35, (q31_t)0x7089c75, (q31_t)0xe2d4b916,
+    (q31_t)0x702e35c, (q31_t)0xe2dfe917, (q31_t)0x6fd2c75, (q31_t)0xe2eb1a37,
+    (q31_t)0x6f777c1, (q31_t)0xe2f64c77, (q31_t)0x6f1c540, (q31_t)0xe3017fd5,
+    (q31_t)0x6ec14f2, (q31_t)0xe30cb451, (q31_t)0x6e666d7, (q31_t)0xe317e9eb,
+    (q31_t)0x6e0baf0, (q31_t)0xe32320a2, (q31_t)0x6db113d, (q31_t)0xe32e5876,
+    (q31_t)0x6d569be, (q31_t)0xe3399167, (q31_t)0x6cfc472, (q31_t)0xe344cb73,
+    (q31_t)0x6ca215c, (q31_t)0xe350069b, (q31_t)0x6c4807a, (q31_t)0xe35b42df,
+    (q31_t)0x6bee1cd, (q31_t)0xe366803c, (q31_t)0x6b94554, (q31_t)0xe371beb5,
+    (q31_t)0x6b3ab12, (q31_t)0xe37cfe47, (q31_t)0x6ae1304, (q31_t)0xe3883ef2,
+    (q31_t)0x6a87d2d, (q31_t)0xe39380b6, (q31_t)0x6a2e98b, (q31_t)0xe39ec393,
+    (q31_t)0x69d5820, (q31_t)0xe3aa0788, (q31_t)0x697c8eb, (q31_t)0xe3b54c95,
+    (q31_t)0x6923bec, (q31_t)0xe3c092b9, (q31_t)0x68cb124, (q31_t)0xe3cbd9f4,
+    (q31_t)0x6872894, (q31_t)0xe3d72245, (q31_t)0x681a23a, (q31_t)0xe3e26bac,
+    (q31_t)0x67c1e18, (q31_t)0xe3edb628, (q31_t)0x6769c2e, (q31_t)0xe3f901ba,
+    (q31_t)0x6711c7b, (q31_t)0xe4044e60, (q31_t)0x66b9f01, (q31_t)0xe40f9c1a,
+    (q31_t)0x66623be, (q31_t)0xe41aeae8, (q31_t)0x660aab5, (q31_t)0xe4263ac9,
+    (q31_t)0x65b33e4, (q31_t)0xe4318bbe, (q31_t)0x655bf4c, (q31_t)0xe43cddc4,
+    (q31_t)0x6504ced, (q31_t)0xe44830dd, (q31_t)0x64adcc7, (q31_t)0xe4538507,
+    (q31_t)0x6456edb, (q31_t)0xe45eda43, (q31_t)0x6400329, (q31_t)0xe46a308f,
+    (q31_t)0x63a99b1, (q31_t)0xe47587eb, (q31_t)0x6353273, (q31_t)0xe480e057,
+    (q31_t)0x62fcd6f, (q31_t)0xe48c39d3, (q31_t)0x62a6aa6, (q31_t)0xe497945d,
+    (q31_t)0x6250a18, (q31_t)0xe4a2eff6, (q31_t)0x61fabc4, (q31_t)0xe4ae4c9d,
+    (q31_t)0x61a4fac, (q31_t)0xe4b9aa52, (q31_t)0x614f5cf, (q31_t)0xe4c50914,
+    (q31_t)0x60f9e2e, (q31_t)0xe4d068e2, (q31_t)0x60a48c9, (q31_t)0xe4dbc9bd,
+    (q31_t)0x604f5a0, (q31_t)0xe4e72ba4, (q31_t)0x5ffa4b3, (q31_t)0xe4f28e96,
+    (q31_t)0x5fa5603, (q31_t)0xe4fdf294, (q31_t)0x5f5098f, (q31_t)0xe509579b,
+    (q31_t)0x5efbf58, (q31_t)0xe514bdad, (q31_t)0x5ea775e, (q31_t)0xe52024c9,
+    (q31_t)0x5e531a1, (q31_t)0xe52b8cee, (q31_t)0x5dfee22, (q31_t)0xe536f61b,
+    (q31_t)0x5daace1, (q31_t)0xe5426051, (q31_t)0x5d56ddd, (q31_t)0xe54dcb8f,
+    (q31_t)0x5d03118, (q31_t)0xe55937d5, (q31_t)0x5caf690, (q31_t)0xe564a521,
+    (q31_t)0x5c5be47, (q31_t)0xe5701374, (q31_t)0x5c0883d, (q31_t)0xe57b82cd,
+    (q31_t)0x5bb5472, (q31_t)0xe586f32c, (q31_t)0x5b622e6, (q31_t)0xe5926490,
+    (q31_t)0x5b0f399, (q31_t)0xe59dd6f9, (q31_t)0x5abc68c, (q31_t)0xe5a94a67,
+    (q31_t)0x5a69bbe, (q31_t)0xe5b4bed8, (q31_t)0x5a17330, (q31_t)0xe5c0344d,
+    (q31_t)0x59c4ce3, (q31_t)0xe5cbaac5, (q31_t)0x59728d5, (q31_t)0xe5d72240,
+    (q31_t)0x5920708, (q31_t)0xe5e29abc, (q31_t)0x58ce77c, (q31_t)0xe5ee143b,
+    (q31_t)0x587ca31, (q31_t)0xe5f98ebb, (q31_t)0x582af26, (q31_t)0xe6050a3b,
+    (q31_t)0x57d965d, (q31_t)0xe61086bc, (q31_t)0x5787fd6, (q31_t)0xe61c043d,
+    (q31_t)0x5736b90, (q31_t)0xe62782be, (q31_t)0x56e598c, (q31_t)0xe633023e,
+    (q31_t)0x56949ca, (q31_t)0xe63e82bc, (q31_t)0x5643c4a, (q31_t)0xe64a0438,
+    (q31_t)0x55f310d, (q31_t)0xe65586b3, (q31_t)0x55a2812, (q31_t)0xe6610a2a,
+    (q31_t)0x555215a, (q31_t)0xe66c8e9f, (q31_t)0x5501ce5, (q31_t)0xe6781410,
+    (q31_t)0x54b1ab4, (q31_t)0xe6839a7c, (q31_t)0x5461ac6, (q31_t)0xe68f21e5,
+    (q31_t)0x5411d1b, (q31_t)0xe69aaa48, (q31_t)0x53c21b4, (q31_t)0xe6a633a6,
+    (q31_t)0x5372891, (q31_t)0xe6b1bdff, (q31_t)0x53231b3, (q31_t)0xe6bd4951,
+    (q31_t)0x52d3d18, (q31_t)0xe6c8d59c, (q31_t)0x5284ac3, (q31_t)0xe6d462e1,
+    (q31_t)0x5235ab2, (q31_t)0xe6dff11d, (q31_t)0x51e6ce6, (q31_t)0xe6eb8052,
+    (q31_t)0x519815f, (q31_t)0xe6f7107e, (q31_t)0x514981d, (q31_t)0xe702a1a1,
+    (q31_t)0x50fb121, (q31_t)0xe70e33bb, (q31_t)0x50acc6b, (q31_t)0xe719c6cb,
+    (q31_t)0x505e9fb, (q31_t)0xe7255ad1, (q31_t)0x50109d0, (q31_t)0xe730efcc,
+    (q31_t)0x4fc2bec, (q31_t)0xe73c85bc, (q31_t)0x4f7504e, (q31_t)0xe7481ca1,
+    (q31_t)0x4f276f7, (q31_t)0xe753b479, (q31_t)0x4ed9fe7, (q31_t)0xe75f4d45,
+    (q31_t)0x4e8cb1e, (q31_t)0xe76ae704, (q31_t)0x4e3f89c, (q31_t)0xe77681b6,
+    (q31_t)0x4df2862, (q31_t)0xe7821d59, (q31_t)0x4da5a6f, (q31_t)0xe78db9ef,
+    (q31_t)0x4d58ec3, (q31_t)0xe7995776, (q31_t)0x4d0c560, (q31_t)0xe7a4f5ed,
+    (q31_t)0x4cbfe45, (q31_t)0xe7b09555, (q31_t)0x4c73972, (q31_t)0xe7bc35ad,
+    (q31_t)0x4c276e8, (q31_t)0xe7c7d6f4, (q31_t)0x4bdb6a6, (q31_t)0xe7d3792b,
+    (q31_t)0x4b8f8ad, (q31_t)0xe7df1c50, (q31_t)0x4b43cfd, (q31_t)0xe7eac063,
+    (q31_t)0x4af8397, (q31_t)0xe7f66564, (q31_t)0x4aacc7a, (q31_t)0xe8020b52,
+    (q31_t)0x4a617a6, (q31_t)0xe80db22d, (q31_t)0x4a1651c, (q31_t)0xe81959f4,
+    (q31_t)0x49cb4dd, (q31_t)0xe82502a7, (q31_t)0x49806e7, (q31_t)0xe830ac45,
+    (q31_t)0x4935b3c, (q31_t)0xe83c56cf, (q31_t)0x48eb1db, (q31_t)0xe8480243,
+    (q31_t)0x48a0ac4, (q31_t)0xe853aea1, (q31_t)0x48565f9, (q31_t)0xe85f5be9,
+    (q31_t)0x480c379, (q31_t)0xe86b0a1a, (q31_t)0x47c2344, (q31_t)0xe876b934,
+    (q31_t)0x477855a, (q31_t)0xe8826936, (q31_t)0x472e9bc, (q31_t)0xe88e1a20,
+    (q31_t)0x46e5069, (q31_t)0xe899cbf1, (q31_t)0x469b963, (q31_t)0xe8a57ea9,
+    (q31_t)0x46524a9, (q31_t)0xe8b13248, (q31_t)0x460923b, (q31_t)0xe8bce6cd,
+    (q31_t)0x45c0219, (q31_t)0xe8c89c37, (q31_t)0x4577444, (q31_t)0xe8d45286,
+    (q31_t)0x452e8bc, (q31_t)0xe8e009ba, (q31_t)0x44e5f80, (q31_t)0xe8ebc1d3,
+    (q31_t)0x449d892, (q31_t)0xe8f77acf, (q31_t)0x44553f2, (q31_t)0xe90334af,
+    (q31_t)0x440d19e, (q31_t)0xe90eef71, (q31_t)0x43c5199, (q31_t)0xe91aab16,
+    (q31_t)0x437d3e1, (q31_t)0xe926679c, (q31_t)0x4335877, (q31_t)0xe9322505,
+    (q31_t)0x42edf5c, (q31_t)0xe93de34e, (q31_t)0x42a688f, (q31_t)0xe949a278,
+    (q31_t)0x425f410, (q31_t)0xe9556282, (q31_t)0x42181e0, (q31_t)0xe961236c,
+    (q31_t)0x41d11ff, (q31_t)0xe96ce535, (q31_t)0x418a46d, (q31_t)0xe978a7dd,
+    (q31_t)0x414392b, (q31_t)0xe9846b63, (q31_t)0x40fd037, (q31_t)0xe9902fc7,
+    (q31_t)0x40b6994, (q31_t)0xe99bf509, (q31_t)0x4070540, (q31_t)0xe9a7bb28,
+    (q31_t)0x402a33c, (q31_t)0xe9b38223, (q31_t)0x3fe4388, (q31_t)0xe9bf49fa,
+    (q31_t)0x3f9e624, (q31_t)0xe9cb12ad, (q31_t)0x3f58b10, (q31_t)0xe9d6dc3b,
+    (q31_t)0x3f1324e, (q31_t)0xe9e2a6a3, (q31_t)0x3ecdbdc, (q31_t)0xe9ee71e6,
+    (q31_t)0x3e887bb, (q31_t)0xe9fa3e03, (q31_t)0x3e435ea, (q31_t)0xea060af9,
+    (q31_t)0x3dfe66c, (q31_t)0xea11d8c8, (q31_t)0x3db993e, (q31_t)0xea1da770,
+    (q31_t)0x3d74e62, (q31_t)0xea2976ef, (q31_t)0x3d305d8, (q31_t)0xea354746,
+    (q31_t)0x3cebfa0, (q31_t)0xea411874, (q31_t)0x3ca7bba, (q31_t)0xea4cea79,
+    (q31_t)0x3c63a26, (q31_t)0xea58bd54, (q31_t)0x3c1fae5, (q31_t)0xea649105,
+    (q31_t)0x3bdbdf6, (q31_t)0xea70658a, (q31_t)0x3b9835a, (q31_t)0xea7c3ae5,
+    (q31_t)0x3b54b11, (q31_t)0xea881114, (q31_t)0x3b1151b, (q31_t)0xea93e817,
+    (q31_t)0x3ace178, (q31_t)0xea9fbfed, (q31_t)0x3a8b028, (q31_t)0xeaab9896,
+    (q31_t)0x3a4812c, (q31_t)0xeab77212, (q31_t)0x3a05484, (q31_t)0xeac34c60,
+    (q31_t)0x39c2a2f, (q31_t)0xeacf277f, (q31_t)0x398022f, (q31_t)0xeadb0370,
+    (q31_t)0x393dc82, (q31_t)0xeae6e031, (q31_t)0x38fb92a, (q31_t)0xeaf2bdc3,
+    (q31_t)0x38b9827, (q31_t)0xeafe9c24, (q31_t)0x3877978, (q31_t)0xeb0a7b54,
+    (q31_t)0x3835d1e, (q31_t)0xeb165b54, (q31_t)0x37f4319, (q31_t)0xeb223c22,
+    (q31_t)0x37b2b6a, (q31_t)0xeb2e1dbe, (q31_t)0x377160f, (q31_t)0xeb3a0027,
+    (q31_t)0x373030a, (q31_t)0xeb45e35d, (q31_t)0x36ef25b, (q31_t)0xeb51c760,
+    (q31_t)0x36ae401, (q31_t)0xeb5dac2f, (q31_t)0x366d7fd, (q31_t)0xeb6991ca,
+    (q31_t)0x362ce50, (q31_t)0xeb75782f, (q31_t)0x35ec6f8, (q31_t)0xeb815f60,
+    (q31_t)0x35ac1f7, (q31_t)0xeb8d475b, (q31_t)0x356bf4d, (q31_t)0xeb99301f,
+    (q31_t)0x352bef9, (q31_t)0xeba519ad, (q31_t)0x34ec0fc, (q31_t)0xebb10404,
+    (q31_t)0x34ac556, (q31_t)0xebbcef23, (q31_t)0x346cc07, (q31_t)0xebc8db0b,
+    (q31_t)0x342d510, (q31_t)0xebd4c7ba, (q31_t)0x33ee070, (q31_t)0xebe0b52f,
+    (q31_t)0x33aee27, (q31_t)0xebeca36c, (q31_t)0x336fe37, (q31_t)0xebf8926f,
+    (q31_t)0x333109e, (q31_t)0xec048237, (q31_t)0x32f255e, (q31_t)0xec1072c4,
+    (q31_t)0x32b3c75, (q31_t)0xec1c6417, (q31_t)0x32755e5, (q31_t)0xec28562d,
+    (q31_t)0x32371ae, (q31_t)0xec344908, (q31_t)0x31f8fcf, (q31_t)0xec403ca5,
+    (q31_t)0x31bb049, (q31_t)0xec4c3106, (q31_t)0x317d31c, (q31_t)0xec582629,
+    (q31_t)0x313f848, (q31_t)0xec641c0e, (q31_t)0x3101fce, (q31_t)0xec7012b5,
+    (q31_t)0x30c49ad, (q31_t)0xec7c0a1d, (q31_t)0x30875e5, (q31_t)0xec880245,
+    (q31_t)0x304a477, (q31_t)0xec93fb2e, (q31_t)0x300d563, (q31_t)0xec9ff4d6,
+    (q31_t)0x2fd08a9, (q31_t)0xecabef3d, (q31_t)0x2f93e4a, (q31_t)0xecb7ea63,
+    (q31_t)0x2f57644, (q31_t)0xecc3e648, (q31_t)0x2f1b099, (q31_t)0xeccfe2ea,
+    (q31_t)0x2eded49, (q31_t)0xecdbe04a, (q31_t)0x2ea2c53, (q31_t)0xece7de66,
+    (q31_t)0x2e66db8, (q31_t)0xecf3dd3f, (q31_t)0x2e2b178, (q31_t)0xecffdcd4,
+    (q31_t)0x2def794, (q31_t)0xed0bdd25, (q31_t)0x2db400a, (q31_t)0xed17de31,
+    (q31_t)0x2d78add, (q31_t)0xed23dff7, (q31_t)0x2d3d80a, (q31_t)0xed2fe277,
+    (q31_t)0x2d02794, (q31_t)0xed3be5b1, (q31_t)0x2cc7979, (q31_t)0xed47e9a5,
+    (q31_t)0x2c8cdbb, (q31_t)0xed53ee51, (q31_t)0x2c52459, (q31_t)0xed5ff3b5,
+    (q31_t)0x2c17d52, (q31_t)0xed6bf9d1, (q31_t)0x2bdd8a9, (q31_t)0xed7800a5,
+    (q31_t)0x2ba365c, (q31_t)0xed84082f, (q31_t)0x2b6966c, (q31_t)0xed901070,
+    (q31_t)0x2b2f8d8, (q31_t)0xed9c1967, (q31_t)0x2af5da2, (q31_t)0xeda82313,
+    (q31_t)0x2abc4c9, (q31_t)0xedb42d74, (q31_t)0x2a82e4d, (q31_t)0xedc0388a,
+    (q31_t)0x2a49a2e, (q31_t)0xedcc4454, (q31_t)0x2a1086d, (q31_t)0xedd850d2,
+    (q31_t)0x29d790a, (q31_t)0xede45e03, (q31_t)0x299ec05, (q31_t)0xedf06be6,
+    (q31_t)0x296615d, (q31_t)0xedfc7a7c, (q31_t)0x292d914, (q31_t)0xee0889c4,
+    (q31_t)0x28f5329, (q31_t)0xee1499bd, (q31_t)0x28bcf9c, (q31_t)0xee20aa67,
+    (q31_t)0x2884e6e, (q31_t)0xee2cbbc1, (q31_t)0x284cf9f, (q31_t)0xee38cdcb,
+    (q31_t)0x281532e, (q31_t)0xee44e084, (q31_t)0x27dd91c, (q31_t)0xee50f3ed,
+    (q31_t)0x27a616a, (q31_t)0xee5d0804, (q31_t)0x276ec16, (q31_t)0xee691cc9,
+    (q31_t)0x2737922, (q31_t)0xee75323c, (q31_t)0x270088e, (q31_t)0xee81485c,
+    (q31_t)0x26c9a58, (q31_t)0xee8d5f29, (q31_t)0x2692e83, (q31_t)0xee9976a1,
+    (q31_t)0x265c50e, (q31_t)0xeea58ec6, (q31_t)0x2625df8, (q31_t)0xeeb1a796,
+    (q31_t)0x25ef943, (q31_t)0xeebdc110, (q31_t)0x25b96ee, (q31_t)0xeec9db35,
+    (q31_t)0x25836f9, (q31_t)0xeed5f604, (q31_t)0x254d965, (q31_t)0xeee2117c,
+    (q31_t)0x2517e31, (q31_t)0xeeee2d9d, (q31_t)0x24e255e, (q31_t)0xeefa4a67,
+    (q31_t)0x24aceed, (q31_t)0xef0667d9, (q31_t)0x2477adc, (q31_t)0xef1285f2,
+    (q31_t)0x244292c, (q31_t)0xef1ea4b2, (q31_t)0x240d9de, (q31_t)0xef2ac419,
+    (q31_t)0x23d8cf1, (q31_t)0xef36e426, (q31_t)0x23a4265, (q31_t)0xef4304d8,
+    (q31_t)0x236fa3b, (q31_t)0xef4f2630, (q31_t)0x233b473, (q31_t)0xef5b482d,
+    (q31_t)0x230710d, (q31_t)0xef676ace, (q31_t)0x22d3009, (q31_t)0xef738e12,
+    (q31_t)0x229f167, (q31_t)0xef7fb1fa, (q31_t)0x226b528, (q31_t)0xef8bd685,
+    (q31_t)0x2237b4b, (q31_t)0xef97fbb2, (q31_t)0x22043d0, (q31_t)0xefa42181,
+    (q31_t)0x21d0eb8, (q31_t)0xefb047f2, (q31_t)0x219dc03, (q31_t)0xefbc6f03,
+    (q31_t)0x216abb1, (q31_t)0xefc896b5, (q31_t)0x2137dc2, (q31_t)0xefd4bf08,
+    (q31_t)0x2105236, (q31_t)0xefe0e7f9, (q31_t)0x20d290d, (q31_t)0xefed118a,
+    (q31_t)0x20a0248, (q31_t)0xeff93bba, (q31_t)0x206dde6, (q31_t)0xf0056687,
+    (q31_t)0x203bbe8, (q31_t)0xf01191f3, (q31_t)0x2009c4e, (q31_t)0xf01dbdfb,
+    (q31_t)0x1fd7f17, (q31_t)0xf029eaa1, (q31_t)0x1fa6445, (q31_t)0xf03617e2,
+    (q31_t)0x1f74bd6, (q31_t)0xf04245c0, (q31_t)0x1f435cc, (q31_t)0xf04e7438,
+    (q31_t)0x1f12227, (q31_t)0xf05aa34c, (q31_t)0x1ee10e5, (q31_t)0xf066d2fa,
+    (q31_t)0x1eb0209, (q31_t)0xf0730342, (q31_t)0x1e7f591, (q31_t)0xf07f3424,
+    (q31_t)0x1e4eb7e, (q31_t)0xf08b659f, (q31_t)0x1e1e3d0, (q31_t)0xf09797b2,
+    (q31_t)0x1dede87, (q31_t)0xf0a3ca5d, (q31_t)0x1dbdba3, (q31_t)0xf0affda0,
+    (q31_t)0x1d8db25, (q31_t)0xf0bc317a, (q31_t)0x1d5dd0c, (q31_t)0xf0c865ea,
+    (q31_t)0x1d2e158, (q31_t)0xf0d49af1, (q31_t)0x1cfe80a, (q31_t)0xf0e0d08d,
+    (q31_t)0x1ccf122, (q31_t)0xf0ed06bf, (q31_t)0x1c9fca0, (q31_t)0xf0f93d86,
+    (q31_t)0x1c70a84, (q31_t)0xf10574e0, (q31_t)0x1c41ace, (q31_t)0xf111accf,
+    (q31_t)0x1c12d7e, (q31_t)0xf11de551, (q31_t)0x1be4294, (q31_t)0xf12a1e66,
+    (q31_t)0x1bb5a11, (q31_t)0xf136580d, (q31_t)0x1b873f5, (q31_t)0xf1429247,
+    (q31_t)0x1b5903f, (q31_t)0xf14ecd11, (q31_t)0x1b2aef0, (q31_t)0xf15b086d,
+    (q31_t)0x1afd007, (q31_t)0xf1674459, (q31_t)0x1acf386, (q31_t)0xf17380d6,
+    (q31_t)0x1aa196c, (q31_t)0xf17fbde2, (q31_t)0x1a741b9, (q31_t)0xf18bfb7d,
+    (q31_t)0x1a46c6e, (q31_t)0xf19839a6, (q31_t)0x1a1998a, (q31_t)0xf1a4785e,
+    (q31_t)0x19ec90d, (q31_t)0xf1b0b7a4, (q31_t)0x19bfaf9, (q31_t)0xf1bcf777,
+    (q31_t)0x1992f4c, (q31_t)0xf1c937d6, (q31_t)0x1966606, (q31_t)0xf1d578c2,
+    (q31_t)0x1939f29, (q31_t)0xf1e1ba3a, (q31_t)0x190dab4, (q31_t)0xf1edfc3d,
+    (q31_t)0x18e18a7, (q31_t)0xf1fa3ecb, (q31_t)0x18b5903, (q31_t)0xf20681e3,
+    (q31_t)0x1889bc6, (q31_t)0xf212c585, (q31_t)0x185e0f3, (q31_t)0xf21f09b1,
+    (q31_t)0x1832888, (q31_t)0xf22b4e66, (q31_t)0x1807285, (q31_t)0xf23793a3,
+    (q31_t)0x17dbeec, (q31_t)0xf243d968, (q31_t)0x17b0dbb, (q31_t)0xf2501fb5,
+    (q31_t)0x1785ef4, (q31_t)0xf25c6688, (q31_t)0x175b296, (q31_t)0xf268ade3,
+    (q31_t)0x17308a1, (q31_t)0xf274f5c3, (q31_t)0x1706115, (q31_t)0xf2813e2a,
+    (q31_t)0x16dbbf3, (q31_t)0xf28d8715, (q31_t)0x16b193a, (q31_t)0xf299d085,
+    (q31_t)0x16878eb, (q31_t)0xf2a61a7a, (q31_t)0x165db05, (q31_t)0xf2b264f2,
+    (q31_t)0x1633f8a, (q31_t)0xf2beafed, (q31_t)0x160a678, (q31_t)0xf2cafb6b,
+    (q31_t)0x15e0fd1, (q31_t)0xf2d7476c, (q31_t)0x15b7b94, (q31_t)0xf2e393ef,
+    (q31_t)0x158e9c1, (q31_t)0xf2efe0f2, (q31_t)0x1565a58, (q31_t)0xf2fc2e77,
+    (q31_t)0x153cd5a, (q31_t)0xf3087c7d, (q31_t)0x15142c6, (q31_t)0xf314cb02,
+    (q31_t)0x14eba9d, (q31_t)0xf3211a07, (q31_t)0x14c34df, (q31_t)0xf32d698a,
+    (q31_t)0x149b18b, (q31_t)0xf339b98d, (q31_t)0x14730a3, (q31_t)0xf3460a0d,
+    (q31_t)0x144b225, (q31_t)0xf3525b0b, (q31_t)0x1423613, (q31_t)0xf35eac86,
+    (q31_t)0x13fbc6c, (q31_t)0xf36afe7e, (q31_t)0x13d4530, (q31_t)0xf37750f2,
+    (q31_t)0x13ad060, (q31_t)0xf383a3e2, (q31_t)0x1385dfb, (q31_t)0xf38ff74d,
+    (q31_t)0x135ee02, (q31_t)0xf39c4b32, (q31_t)0x1338075, (q31_t)0xf3a89f92,
+    (q31_t)0x1311553, (q31_t)0xf3b4f46c, (q31_t)0x12eac9d, (q31_t)0xf3c149bf,
+    (q31_t)0x12c4653, (q31_t)0xf3cd9f8b, (q31_t)0x129e276, (q31_t)0xf3d9f5cf,
+    (q31_t)0x1278104, (q31_t)0xf3e64c8c, (q31_t)0x12521ff, (q31_t)0xf3f2a3bf,
+    (q31_t)0x122c566, (q31_t)0xf3fefb6a, (q31_t)0x1206b39, (q31_t)0xf40b538b,
+    (q31_t)0x11e1379, (q31_t)0xf417ac22, (q31_t)0x11bbe26, (q31_t)0xf424052f,
+    (q31_t)0x1196b3f, (q31_t)0xf4305eb0, (q31_t)0x1171ac6, (q31_t)0xf43cb8a7,
+    (q31_t)0x114ccb9, (q31_t)0xf4491311, (q31_t)0x1128119, (q31_t)0xf4556def,
+    (q31_t)0x11037e6, (q31_t)0xf461c940, (q31_t)0x10df120, (q31_t)0xf46e2504,
+    (q31_t)0x10bacc8, (q31_t)0xf47a8139, (q31_t)0x1096add, (q31_t)0xf486dde1,
+    (q31_t)0x1072b5f, (q31_t)0xf4933afa, (q31_t)0x104ee4f, (q31_t)0xf49f9884,
+    (q31_t)0x102b3ac, (q31_t)0xf4abf67e, (q31_t)0x1007b77, (q31_t)0xf4b854e7,
+    (q31_t)0xfe45b0, (q31_t)0xf4c4b3c0, (q31_t)0xfc1257, (q31_t)0xf4d11308,
+    (q31_t)0xf9e16b, (q31_t)0xf4dd72be, (q31_t)0xf7b2ee, (q31_t)0xf4e9d2e3,
+    (q31_t)0xf586df, (q31_t)0xf4f63374, (q31_t)0xf35d3e, (q31_t)0xf5029473,
+    (q31_t)0xf1360b, (q31_t)0xf50ef5de, (q31_t)0xef1147, (q31_t)0xf51b57b5,
+    (q31_t)0xeceef1, (q31_t)0xf527b9f7, (q31_t)0xeacf09, (q31_t)0xf5341ca5,
+    (q31_t)0xe8b190, (q31_t)0xf5407fbd, (q31_t)0xe69686, (q31_t)0xf54ce33f,
+    (q31_t)0xe47deb, (q31_t)0xf559472b, (q31_t)0xe267be, (q31_t)0xf565ab80,
+    (q31_t)0xe05401, (q31_t)0xf572103d, (q31_t)0xde42b2, (q31_t)0xf57e7563,
+    (q31_t)0xdc33d2, (q31_t)0xf58adaf0, (q31_t)0xda2762, (q31_t)0xf59740e5,
+    (q31_t)0xd81d61, (q31_t)0xf5a3a740, (q31_t)0xd615cf, (q31_t)0xf5b00e02,
+    (q31_t)0xd410ad, (q31_t)0xf5bc7529, (q31_t)0xd20dfa, (q31_t)0xf5c8dcb6,
+    (q31_t)0xd00db6, (q31_t)0xf5d544a7, (q31_t)0xce0fe3, (q31_t)0xf5e1acfd,
+    (q31_t)0xcc147f, (q31_t)0xf5ee15b7, (q31_t)0xca1b8a, (q31_t)0xf5fa7ed4,
+    (q31_t)0xc82506, (q31_t)0xf606e854, (q31_t)0xc630f2, (q31_t)0xf6135237,
+    (q31_t)0xc43f4d, (q31_t)0xf61fbc7b, (q31_t)0xc25019, (q31_t)0xf62c2721,
+    (q31_t)0xc06355, (q31_t)0xf6389228, (q31_t)0xbe7901, (q31_t)0xf644fd8f,
+    (q31_t)0xbc911d, (q31_t)0xf6516956, (q31_t)0xbaabaa, (q31_t)0xf65dd57d,
+    (q31_t)0xb8c8a7, (q31_t)0xf66a4203, (q31_t)0xb6e815, (q31_t)0xf676aee8,
+    (q31_t)0xb509f3, (q31_t)0xf6831c2b, (q31_t)0xb32e42, (q31_t)0xf68f89cb,
+    (q31_t)0xb15502, (q31_t)0xf69bf7c9, (q31_t)0xaf7e33, (q31_t)0xf6a86623,
+    (q31_t)0xada9d4, (q31_t)0xf6b4d4d9, (q31_t)0xabd7e6, (q31_t)0xf6c143ec,
+    (q31_t)0xaa086a, (q31_t)0xf6cdb359, (q31_t)0xa83b5e, (q31_t)0xf6da2321,
+    (q31_t)0xa670c4, (q31_t)0xf6e69344, (q31_t)0xa4a89b, (q31_t)0xf6f303c0,
+    (q31_t)0xa2e2e3, (q31_t)0xf6ff7496, (q31_t)0xa11f9d, (q31_t)0xf70be5c4,
+    (q31_t)0x9f5ec8, (q31_t)0xf718574b, (q31_t)0x9da065, (q31_t)0xf724c92a,
+    (q31_t)0x9be473, (q31_t)0xf7313b60, (q31_t)0x9a2af3, (q31_t)0xf73daded,
+    (q31_t)0x9873e4, (q31_t)0xf74a20d0, (q31_t)0x96bf48, (q31_t)0xf756940a,
+    (q31_t)0x950d1d, (q31_t)0xf7630799, (q31_t)0x935d64, (q31_t)0xf76f7b7d,
+    (q31_t)0x91b01d, (q31_t)0xf77befb5, (q31_t)0x900548, (q31_t)0xf7886442,
+    (q31_t)0x8e5ce5, (q31_t)0xf794d922, (q31_t)0x8cb6f5, (q31_t)0xf7a14e55,
+    (q31_t)0x8b1376, (q31_t)0xf7adc3db, (q31_t)0x89726a, (q31_t)0xf7ba39b3,
+    (q31_t)0x87d3d0, (q31_t)0xf7c6afdc, (q31_t)0x8637a9, (q31_t)0xf7d32657,
+    (q31_t)0x849df4, (q31_t)0xf7df9d22, (q31_t)0x8306b2, (q31_t)0xf7ec143e,
+    (q31_t)0x8171e2, (q31_t)0xf7f88ba9, (q31_t)0x7fdf85, (q31_t)0xf8050364,
+    (q31_t)0x7e4f9b, (q31_t)0xf8117b6d, (q31_t)0x7cc223, (q31_t)0xf81df3c5,
+    (q31_t)0x7b371e, (q31_t)0xf82a6c6a, (q31_t)0x79ae8c, (q31_t)0xf836e55d,
+    (q31_t)0x78286e, (q31_t)0xf8435e9d, (q31_t)0x76a4c2, (q31_t)0xf84fd829,
+    (q31_t)0x752389, (q31_t)0xf85c5201, (q31_t)0x73a4c3, (q31_t)0xf868cc24,
+    (q31_t)0x722871, (q31_t)0xf8754692, (q31_t)0x70ae92, (q31_t)0xf881c14b,
+    (q31_t)0x6f3726, (q31_t)0xf88e3c4d, (q31_t)0x6dc22e, (q31_t)0xf89ab799,
+    (q31_t)0x6c4fa8, (q31_t)0xf8a7332e, (q31_t)0x6adf97, (q31_t)0xf8b3af0c,
+    (q31_t)0x6971f9, (q31_t)0xf8c02b31, (q31_t)0x6806ce, (q31_t)0xf8cca79e,
+    (q31_t)0x669e18, (q31_t)0xf8d92452, (q31_t)0x6537d4, (q31_t)0xf8e5a14d,
+    (q31_t)0x63d405, (q31_t)0xf8f21e8e, (q31_t)0x6272aa, (q31_t)0xf8fe9c15,
+    (q31_t)0x6113c2, (q31_t)0xf90b19e0, (q31_t)0x5fb74e, (q31_t)0xf91797f0,
+    (q31_t)0x5e5d4e, (q31_t)0xf9241645, (q31_t)0x5d05c3, (q31_t)0xf93094dd,
+    (q31_t)0x5bb0ab, (q31_t)0xf93d13b8, (q31_t)0x5a5e07, (q31_t)0xf94992d7,
+    (q31_t)0x590dd8, (q31_t)0xf9561237, (q31_t)0x57c01d, (q31_t)0xf96291d9,
+    (q31_t)0x5674d6, (q31_t)0xf96f11bc, (q31_t)0x552c03, (q31_t)0xf97b91e1,
+    (q31_t)0x53e5a5, (q31_t)0xf9881245, (q31_t)0x52a1bb, (q31_t)0xf99492ea,
+    (q31_t)0x516045, (q31_t)0xf9a113cd, (q31_t)0x502145, (q31_t)0xf9ad94f0,
+    (q31_t)0x4ee4b8, (q31_t)0xf9ba1651, (q31_t)0x4daaa1, (q31_t)0xf9c697f0,
+    (q31_t)0x4c72fe, (q31_t)0xf9d319cc, (q31_t)0x4b3dcf, (q31_t)0xf9df9be6,
+    (q31_t)0x4a0b16, (q31_t)0xf9ec1e3b, (q31_t)0x48dad1, (q31_t)0xf9f8a0cd,
+    (q31_t)0x47ad01, (q31_t)0xfa05239a, (q31_t)0x4681a6, (q31_t)0xfa11a6a3,
+    (q31_t)0x4558c0, (q31_t)0xfa1e29e5, (q31_t)0x44324f, (q31_t)0xfa2aad62,
+    (q31_t)0x430e53, (q31_t)0xfa373119, (q31_t)0x41eccc, (q31_t)0xfa43b508,
+    (q31_t)0x40cdba, (q31_t)0xfa503930, (q31_t)0x3fb11d, (q31_t)0xfa5cbd91,
+    (q31_t)0x3e96f6, (q31_t)0xfa694229, (q31_t)0x3d7f44, (q31_t)0xfa75c6f8,
+    (q31_t)0x3c6a07, (q31_t)0xfa824bfd, (q31_t)0x3b573f, (q31_t)0xfa8ed139,
+    (q31_t)0x3a46ed, (q31_t)0xfa9b56ab, (q31_t)0x393910, (q31_t)0xfaa7dc52,
+    (q31_t)0x382da8, (q31_t)0xfab4622d, (q31_t)0x3724b6, (q31_t)0xfac0e83d,
+    (q31_t)0x361e3a, (q31_t)0xfacd6e81, (q31_t)0x351a33, (q31_t)0xfad9f4f8,
+    (q31_t)0x3418a2, (q31_t)0xfae67ba2, (q31_t)0x331986, (q31_t)0xfaf3027e,
+    (q31_t)0x321ce0, (q31_t)0xfaff898c, (q31_t)0x3122b0, (q31_t)0xfb0c10cb,
+    (q31_t)0x302af5, (q31_t)0xfb18983b, (q31_t)0x2f35b1, (q31_t)0xfb251fdc,
+    (q31_t)0x2e42e2, (q31_t)0xfb31a7ac, (q31_t)0x2d5289, (q31_t)0xfb3e2fac,
+    (q31_t)0x2c64a6, (q31_t)0xfb4ab7db, (q31_t)0x2b7939, (q31_t)0xfb574039,
+    (q31_t)0x2a9042, (q31_t)0xfb63c8c4, (q31_t)0x29a9c1, (q31_t)0xfb70517d,
+    (q31_t)0x28c5b6, (q31_t)0xfb7cda63, (q31_t)0x27e421, (q31_t)0xfb896375,
+    (q31_t)0x270502, (q31_t)0xfb95ecb4, (q31_t)0x262859, (q31_t)0xfba2761e,
+    (q31_t)0x254e27, (q31_t)0xfbaeffb3, (q31_t)0x24766a, (q31_t)0xfbbb8973,
+    (q31_t)0x23a124, (q31_t)0xfbc8135c, (q31_t)0x22ce54, (q31_t)0xfbd49d70,
+    (q31_t)0x21fdfb, (q31_t)0xfbe127ac, (q31_t)0x213018, (q31_t)0xfbedb212,
+    (q31_t)0x2064ab, (q31_t)0xfbfa3c9f, (q31_t)0x1f9bb5, (q31_t)0xfc06c754,
+    (q31_t)0x1ed535, (q31_t)0xfc135231, (q31_t)0x1e112b, (q31_t)0xfc1fdd34,
+    (q31_t)0x1d4f99, (q31_t)0xfc2c685d, (q31_t)0x1c907c, (q31_t)0xfc38f3ac,
+    (q31_t)0x1bd3d6, (q31_t)0xfc457f21, (q31_t)0x1b19a7, (q31_t)0xfc520aba,
+    (q31_t)0x1a61ee, (q31_t)0xfc5e9678, (q31_t)0x19acac, (q31_t)0xfc6b2259,
+    (q31_t)0x18f9e1, (q31_t)0xfc77ae5e, (q31_t)0x18498c, (q31_t)0xfc843a85,
+    (q31_t)0x179bae, (q31_t)0xfc90c6cf, (q31_t)0x16f047, (q31_t)0xfc9d533b,
+    (q31_t)0x164757, (q31_t)0xfca9dfc8, (q31_t)0x15a0dd, (q31_t)0xfcb66c77,
+    (q31_t)0x14fcda, (q31_t)0xfcc2f945, (q31_t)0x145b4e, (q31_t)0xfccf8634,
+    (q31_t)0x13bc39, (q31_t)0xfcdc1342, (q31_t)0x131f9b, (q31_t)0xfce8a06f,
+    (q31_t)0x128574, (q31_t)0xfcf52dbb, (q31_t)0x11edc3, (q31_t)0xfd01bb24,
+    (q31_t)0x11588a, (q31_t)0xfd0e48ab, (q31_t)0x10c5c7, (q31_t)0xfd1ad650,
+    (q31_t)0x10357c, (q31_t)0xfd276410, (q31_t)0xfa7a8, (q31_t)0xfd33f1ed,
+    (q31_t)0xf1c4a, (q31_t)0xfd407fe6, (q31_t)0xe9364, (q31_t)0xfd4d0df9,
+    (q31_t)0xe0cf5, (q31_t)0xfd599c28, (q31_t)0xd88fd, (q31_t)0xfd662a70,
+    (q31_t)0xd077c, (q31_t)0xfd72b8d2, (q31_t)0xc8872, (q31_t)0xfd7f474d,
+    (q31_t)0xc0be0, (q31_t)0xfd8bd5e1, (q31_t)0xb91c4, (q31_t)0xfd98648d,
+    (q31_t)0xb1a20, (q31_t)0xfda4f351, (q31_t)0xaa4f3, (q31_t)0xfdb1822c,
+    (q31_t)0xa323d, (q31_t)0xfdbe111e, (q31_t)0x9c1ff, (q31_t)0xfdcaa027,
+    (q31_t)0x95438, (q31_t)0xfdd72f45, (q31_t)0x8e8e8, (q31_t)0xfde3be78,
+    (q31_t)0x8800f, (q31_t)0xfdf04dc0, (q31_t)0x819ae, (q31_t)0xfdfcdd1d,
+    (q31_t)0x7b5c4, (q31_t)0xfe096c8d, (q31_t)0x75452, (q31_t)0xfe15fc11,
+    (q31_t)0x6f556, (q31_t)0xfe228ba7, (q31_t)0x698d3, (q31_t)0xfe2f1b50,
+    (q31_t)0x63ec6, (q31_t)0xfe3bab0b, (q31_t)0x5e731, (q31_t)0xfe483ad8,
+    (q31_t)0x59214, (q31_t)0xfe54cab5, (q31_t)0x53f6e, (q31_t)0xfe615aa3,
+    (q31_t)0x4ef3f, (q31_t)0xfe6deaa1, (q31_t)0x4a188, (q31_t)0xfe7a7aae,
+    (q31_t)0x45648, (q31_t)0xfe870aca, (q31_t)0x40d80, (q31_t)0xfe939af5,
+    (q31_t)0x3c72f, (q31_t)0xfea02b2e, (q31_t)0x38356, (q31_t)0xfeacbb74,
+    (q31_t)0x341f4, (q31_t)0xfeb94bc8, (q31_t)0x3030a, (q31_t)0xfec5dc28,
+    (q31_t)0x2c697, (q31_t)0xfed26c94, (q31_t)0x28c9c, (q31_t)0xfedefd0c,
+    (q31_t)0x25519, (q31_t)0xfeeb8d8f, (q31_t)0x2200d, (q31_t)0xfef81e1d,
+    (q31_t)0x1ed78, (q31_t)0xff04aeb5, (q31_t)0x1bd5c, (q31_t)0xff113f56,
+    (q31_t)0x18fb6, (q31_t)0xff1dd001, (q31_t)0x16489, (q31_t)0xff2a60b4,
+    (q31_t)0x13bd3, (q31_t)0xff36f170, (q31_t)0x11594, (q31_t)0xff438234,
+    (q31_t)0xf1ce, (q31_t)0xff5012fe, (q31_t)0xd07e, (q31_t)0xff5ca3d0,
+    (q31_t)0xb1a7, (q31_t)0xff6934a8, (q31_t)0x9547, (q31_t)0xff75c585,
+    (q31_t)0x7b5f, (q31_t)0xff825668, (q31_t)0x63ee, (q31_t)0xff8ee750,
+    (q31_t)0x4ef5, (q31_t)0xff9b783c, (q31_t)0x3c74, (q31_t)0xffa8092c,
+    (q31_t)0x2c6a, (q31_t)0xffb49a1f, (q31_t)0x1ed8, (q31_t)0xffc12b16,
+    (q31_t)0x13bd, (q31_t)0xffcdbc0f, (q31_t)0xb1a, (q31_t)0xffda4d09,
+    (q31_t)0x4ef, (q31_t)0xffe6de05, (q31_t)0x13c, (q31_t)0xfff36f02,
+    (q31_t)0x0, (q31_t)0x0, (q31_t)0x13c, (q31_t)0xc90fe,
+    (q31_t)0x4ef, (q31_t)0x1921fb, (q31_t)0xb1a, (q31_t)0x25b2f7,
+    (q31_t)0x13bd, (q31_t)0x3243f1, (q31_t)0x1ed8, (q31_t)0x3ed4ea,
+    (q31_t)0x2c6a, (q31_t)0x4b65e1, (q31_t)0x3c74, (q31_t)0x57f6d4,
+    (q31_t)0x4ef5, (q31_t)0x6487c4, (q31_t)0x63ee, (q31_t)0x7118b0,
+    (q31_t)0x7b5f, (q31_t)0x7da998, (q31_t)0x9547, (q31_t)0x8a3a7b,
+    (q31_t)0xb1a7, (q31_t)0x96cb58, (q31_t)0xd07e, (q31_t)0xa35c30,
+    (q31_t)0xf1ce, (q31_t)0xafed02, (q31_t)0x11594, (q31_t)0xbc7dcc,
+    (q31_t)0x13bd3, (q31_t)0xc90e90, (q31_t)0x16489, (q31_t)0xd59f4c,
+    (q31_t)0x18fb6, (q31_t)0xe22fff, (q31_t)0x1bd5c, (q31_t)0xeec0aa,
+    (q31_t)0x1ed78, (q31_t)0xfb514b, (q31_t)0x2200d, (q31_t)0x107e1e3,
+    (q31_t)0x25519, (q31_t)0x1147271, (q31_t)0x28c9c, (q31_t)0x12102f4,
+    (q31_t)0x2c697, (q31_t)0x12d936c, (q31_t)0x3030a, (q31_t)0x13a23d8,
+    (q31_t)0x341f4, (q31_t)0x146b438, (q31_t)0x38356, (q31_t)0x153448c,
+    (q31_t)0x3c72f, (q31_t)0x15fd4d2, (q31_t)0x40d80, (q31_t)0x16c650b,
+    (q31_t)0x45648, (q31_t)0x178f536, (q31_t)0x4a188, (q31_t)0x1858552,
+    (q31_t)0x4ef3f, (q31_t)0x192155f, (q31_t)0x53f6e, (q31_t)0x19ea55d,
+    (q31_t)0x59214, (q31_t)0x1ab354b, (q31_t)0x5e731, (q31_t)0x1b7c528,
+    (q31_t)0x63ec6, (q31_t)0x1c454f5, (q31_t)0x698d3, (q31_t)0x1d0e4b0,
+    (q31_t)0x6f556, (q31_t)0x1dd7459, (q31_t)0x75452, (q31_t)0x1ea03ef,
+    (q31_t)0x7b5c4, (q31_t)0x1f69373, (q31_t)0x819ae, (q31_t)0x20322e3,
+    (q31_t)0x8800f, (q31_t)0x20fb240, (q31_t)0x8e8e8, (q31_t)0x21c4188,
+    (q31_t)0x95438, (q31_t)0x228d0bb, (q31_t)0x9c1ff, (q31_t)0x2355fd9,
+    (q31_t)0xa323d, (q31_t)0x241eee2, (q31_t)0xaa4f3, (q31_t)0x24e7dd4,
+    (q31_t)0xb1a20, (q31_t)0x25b0caf, (q31_t)0xb91c4, (q31_t)0x2679b73,
+    (q31_t)0xc0be0, (q31_t)0x2742a1f, (q31_t)0xc8872, (q31_t)0x280b8b3,
+    (q31_t)0xd077c, (q31_t)0x28d472e, (q31_t)0xd88fd, (q31_t)0x299d590,
+    (q31_t)0xe0cf5, (q31_t)0x2a663d8, (q31_t)0xe9364, (q31_t)0x2b2f207,
+    (q31_t)0xf1c4a, (q31_t)0x2bf801a, (q31_t)0xfa7a8, (q31_t)0x2cc0e13,
+    (q31_t)0x10357c, (q31_t)0x2d89bf0, (q31_t)0x10c5c7, (q31_t)0x2e529b0,
+    (q31_t)0x11588a, (q31_t)0x2f1b755, (q31_t)0x11edc3, (q31_t)0x2fe44dc,
+    (q31_t)0x128574, (q31_t)0x30ad245, (q31_t)0x131f9b, (q31_t)0x3175f91,
+    (q31_t)0x13bc39, (q31_t)0x323ecbe, (q31_t)0x145b4e, (q31_t)0x33079cc,
+    (q31_t)0x14fcda, (q31_t)0x33d06bb, (q31_t)0x15a0dd, (q31_t)0x3499389,
+    (q31_t)0x164757, (q31_t)0x3562038, (q31_t)0x16f047, (q31_t)0x362acc5,
+    (q31_t)0x179bae, (q31_t)0x36f3931, (q31_t)0x18498c, (q31_t)0x37bc57b,
+    (q31_t)0x18f9e1, (q31_t)0x38851a2, (q31_t)0x19acac, (q31_t)0x394dda7,
+    (q31_t)0x1a61ee, (q31_t)0x3a16988, (q31_t)0x1b19a7, (q31_t)0x3adf546,
+    (q31_t)0x1bd3d6, (q31_t)0x3ba80df, (q31_t)0x1c907c, (q31_t)0x3c70c54,
+    (q31_t)0x1d4f99, (q31_t)0x3d397a3, (q31_t)0x1e112b, (q31_t)0x3e022cc,
+    (q31_t)0x1ed535, (q31_t)0x3ecadcf, (q31_t)0x1f9bb5, (q31_t)0x3f938ac,
+    (q31_t)0x2064ab, (q31_t)0x405c361, (q31_t)0x213018, (q31_t)0x4124dee,
+    (q31_t)0x21fdfb, (q31_t)0x41ed854, (q31_t)0x22ce54, (q31_t)0x42b6290,
+    (q31_t)0x23a124, (q31_t)0x437eca4, (q31_t)0x24766a, (q31_t)0x444768d,
+    (q31_t)0x254e27, (q31_t)0x451004d, (q31_t)0x262859, (q31_t)0x45d89e2,
+    (q31_t)0x270502, (q31_t)0x46a134c, (q31_t)0x27e421, (q31_t)0x4769c8b,
+    (q31_t)0x28c5b6, (q31_t)0x483259d, (q31_t)0x29a9c1, (q31_t)0x48fae83,
+    (q31_t)0x2a9042, (q31_t)0x49c373c, (q31_t)0x2b7939, (q31_t)0x4a8bfc7,
+    (q31_t)0x2c64a6, (q31_t)0x4b54825, (q31_t)0x2d5289, (q31_t)0x4c1d054,
+    (q31_t)0x2e42e2, (q31_t)0x4ce5854, (q31_t)0x2f35b1, (q31_t)0x4dae024,
+    (q31_t)0x302af5, (q31_t)0x4e767c5, (q31_t)0x3122b0, (q31_t)0x4f3ef35,
+    (q31_t)0x321ce0, (q31_t)0x5007674, (q31_t)0x331986, (q31_t)0x50cfd82,
+    (q31_t)0x3418a2, (q31_t)0x519845e, (q31_t)0x351a33, (q31_t)0x5260b08,
+    (q31_t)0x361e3a, (q31_t)0x532917f, (q31_t)0x3724b6, (q31_t)0x53f17c3,
+    (q31_t)0x382da8, (q31_t)0x54b9dd3, (q31_t)0x393910, (q31_t)0x55823ae,
+    (q31_t)0x3a46ed, (q31_t)0x564a955, (q31_t)0x3b573f, (q31_t)0x5712ec7,
+    (q31_t)0x3c6a07, (q31_t)0x57db403, (q31_t)0x3d7f44, (q31_t)0x58a3908,
+    (q31_t)0x3e96f6, (q31_t)0x596bdd7, (q31_t)0x3fb11d, (q31_t)0x5a3426f,
+    (q31_t)0x40cdba, (q31_t)0x5afc6d0, (q31_t)0x41eccc, (q31_t)0x5bc4af8,
+    (q31_t)0x430e53, (q31_t)0x5c8cee7, (q31_t)0x44324f, (q31_t)0x5d5529e,
+    (q31_t)0x4558c0, (q31_t)0x5e1d61b, (q31_t)0x4681a6, (q31_t)0x5ee595d,
+    (q31_t)0x47ad01, (q31_t)0x5fadc66, (q31_t)0x48dad1, (q31_t)0x6075f33,
+    (q31_t)0x4a0b16, (q31_t)0x613e1c5, (q31_t)0x4b3dcf, (q31_t)0x620641a,
+    (q31_t)0x4c72fe, (q31_t)0x62ce634, (q31_t)0x4daaa1, (q31_t)0x6396810,
+    (q31_t)0x4ee4b8, (q31_t)0x645e9af, (q31_t)0x502145, (q31_t)0x6526b10,
+    (q31_t)0x516045, (q31_t)0x65eec33, (q31_t)0x52a1bb, (q31_t)0x66b6d16,
+    (q31_t)0x53e5a5, (q31_t)0x677edbb, (q31_t)0x552c03, (q31_t)0x6846e1f,
+    (q31_t)0x5674d6, (q31_t)0x690ee44, (q31_t)0x57c01d, (q31_t)0x69d6e27,
+    (q31_t)0x590dd8, (q31_t)0x6a9edc9, (q31_t)0x5a5e07, (q31_t)0x6b66d29,
+    (q31_t)0x5bb0ab, (q31_t)0x6c2ec48, (q31_t)0x5d05c3, (q31_t)0x6cf6b23,
+    (q31_t)0x5e5d4e, (q31_t)0x6dbe9bb, (q31_t)0x5fb74e, (q31_t)0x6e86810,
+    (q31_t)0x6113c2, (q31_t)0x6f4e620, (q31_t)0x6272aa, (q31_t)0x70163eb,
+    (q31_t)0x63d405, (q31_t)0x70de172, (q31_t)0x6537d4, (q31_t)0x71a5eb3,
+    (q31_t)0x669e18, (q31_t)0x726dbae, (q31_t)0x6806ce, (q31_t)0x7335862,
+    (q31_t)0x6971f9, (q31_t)0x73fd4cf, (q31_t)0x6adf97, (q31_t)0x74c50f4,
+    (q31_t)0x6c4fa8, (q31_t)0x758ccd2, (q31_t)0x6dc22e, (q31_t)0x7654867,
+    (q31_t)0x6f3726, (q31_t)0x771c3b3, (q31_t)0x70ae92, (q31_t)0x77e3eb5,
+    (q31_t)0x722871, (q31_t)0x78ab96e, (q31_t)0x73a4c3, (q31_t)0x79733dc,
+    (q31_t)0x752389, (q31_t)0x7a3adff, (q31_t)0x76a4c2, (q31_t)0x7b027d7,
+    (q31_t)0x78286e, (q31_t)0x7bca163, (q31_t)0x79ae8c, (q31_t)0x7c91aa3,
+    (q31_t)0x7b371e, (q31_t)0x7d59396, (q31_t)0x7cc223, (q31_t)0x7e20c3b,
+    (q31_t)0x7e4f9b, (q31_t)0x7ee8493, (q31_t)0x7fdf85, (q31_t)0x7fafc9c,
+    (q31_t)0x8171e2, (q31_t)0x8077457, (q31_t)0x8306b2, (q31_t)0x813ebc2,
+    (q31_t)0x849df4, (q31_t)0x82062de, (q31_t)0x8637a9, (q31_t)0x82cd9a9,
+    (q31_t)0x87d3d0, (q31_t)0x8395024, (q31_t)0x89726a, (q31_t)0x845c64d,
+    (q31_t)0x8b1376, (q31_t)0x8523c25, (q31_t)0x8cb6f5, (q31_t)0x85eb1ab,
+    (q31_t)0x8e5ce5, (q31_t)0x86b26de, (q31_t)0x900548, (q31_t)0x8779bbe,
+    (q31_t)0x91b01d, (q31_t)0x884104b, (q31_t)0x935d64, (q31_t)0x8908483,
+    (q31_t)0x950d1d, (q31_t)0x89cf867, (q31_t)0x96bf48, (q31_t)0x8a96bf6,
+    (q31_t)0x9873e4, (q31_t)0x8b5df30, (q31_t)0x9a2af3, (q31_t)0x8c25213,
+    (q31_t)0x9be473, (q31_t)0x8cec4a0, (q31_t)0x9da065, (q31_t)0x8db36d6,
+    (q31_t)0x9f5ec8, (q31_t)0x8e7a8b5, (q31_t)0xa11f9d, (q31_t)0x8f41a3c,
+    (q31_t)0xa2e2e3, (q31_t)0x9008b6a, (q31_t)0xa4a89b, (q31_t)0x90cfc40,
+    (q31_t)0xa670c4, (q31_t)0x9196cbc, (q31_t)0xa83b5e, (q31_t)0x925dcdf,
+    (q31_t)0xaa086a, (q31_t)0x9324ca7, (q31_t)0xabd7e6, (q31_t)0x93ebc14,
+    (q31_t)0xada9d4, (q31_t)0x94b2b27, (q31_t)0xaf7e33, (q31_t)0x95799dd,
+    (q31_t)0xb15502, (q31_t)0x9640837, (q31_t)0xb32e42, (q31_t)0x9707635,
+    (q31_t)0xb509f3, (q31_t)0x97ce3d5, (q31_t)0xb6e815, (q31_t)0x9895118,
+    (q31_t)0xb8c8a7, (q31_t)0x995bdfd, (q31_t)0xbaabaa, (q31_t)0x9a22a83,
+    (q31_t)0xbc911d, (q31_t)0x9ae96aa, (q31_t)0xbe7901, (q31_t)0x9bb0271,
+    (q31_t)0xc06355, (q31_t)0x9c76dd8, (q31_t)0xc25019, (q31_t)0x9d3d8df,
+    (q31_t)0xc43f4d, (q31_t)0x9e04385, (q31_t)0xc630f2, (q31_t)0x9ecadc9,
+    (q31_t)0xc82506, (q31_t)0x9f917ac, (q31_t)0xca1b8a, (q31_t)0xa05812c,
+    (q31_t)0xcc147f, (q31_t)0xa11ea49, (q31_t)0xce0fe3, (q31_t)0xa1e5303,
+    (q31_t)0xd00db6, (q31_t)0xa2abb59, (q31_t)0xd20dfa, (q31_t)0xa37234a,
+    (q31_t)0xd410ad, (q31_t)0xa438ad7, (q31_t)0xd615cf, (q31_t)0xa4ff1fe,
+    (q31_t)0xd81d61, (q31_t)0xa5c58c0, (q31_t)0xda2762, (q31_t)0xa68bf1b,
+    (q31_t)0xdc33d2, (q31_t)0xa752510, (q31_t)0xde42b2, (q31_t)0xa818a9d,
+    (q31_t)0xe05401, (q31_t)0xa8defc3, (q31_t)0xe267be, (q31_t)0xa9a5480,
+    (q31_t)0xe47deb, (q31_t)0xaa6b8d5, (q31_t)0xe69686, (q31_t)0xab31cc1,
+    (q31_t)0xe8b190, (q31_t)0xabf8043, (q31_t)0xeacf09, (q31_t)0xacbe35b,
+    (q31_t)0xeceef1, (q31_t)0xad84609, (q31_t)0xef1147, (q31_t)0xae4a84b,
+    (q31_t)0xf1360b, (q31_t)0xaf10a22, (q31_t)0xf35d3e, (q31_t)0xafd6b8d,
+    (q31_t)0xf586df, (q31_t)0xb09cc8c, (q31_t)0xf7b2ee, (q31_t)0xb162d1d,
+    (q31_t)0xf9e16b, (q31_t)0xb228d42, (q31_t)0xfc1257, (q31_t)0xb2eecf8,
+    (q31_t)0xfe45b0, (q31_t)0xb3b4c40, (q31_t)0x1007b77, (q31_t)0xb47ab19,
+    (q31_t)0x102b3ac, (q31_t)0xb540982, (q31_t)0x104ee4f, (q31_t)0xb60677c,
+    (q31_t)0x1072b5f, (q31_t)0xb6cc506, (q31_t)0x1096add, (q31_t)0xb79221f,
+    (q31_t)0x10bacc8, (q31_t)0xb857ec7, (q31_t)0x10df120, (q31_t)0xb91dafc,
+    (q31_t)0x11037e6, (q31_t)0xb9e36c0, (q31_t)0x1128119, (q31_t)0xbaa9211,
+    (q31_t)0x114ccb9, (q31_t)0xbb6ecef, (q31_t)0x1171ac6, (q31_t)0xbc34759,
+    (q31_t)0x1196b3f, (q31_t)0xbcfa150, (q31_t)0x11bbe26, (q31_t)0xbdbfad1,
+    (q31_t)0x11e1379, (q31_t)0xbe853de, (q31_t)0x1206b39, (q31_t)0xbf4ac75,
+    (q31_t)0x122c566, (q31_t)0xc010496, (q31_t)0x12521ff, (q31_t)0xc0d5c41,
+    (q31_t)0x1278104, (q31_t)0xc19b374, (q31_t)0x129e276, (q31_t)0xc260a31,
+    (q31_t)0x12c4653, (q31_t)0xc326075, (q31_t)0x12eac9d, (q31_t)0xc3eb641,
+    (q31_t)0x1311553, (q31_t)0xc4b0b94, (q31_t)0x1338075, (q31_t)0xc57606e,
+    (q31_t)0x135ee02, (q31_t)0xc63b4ce, (q31_t)0x1385dfb, (q31_t)0xc7008b3,
+    (q31_t)0x13ad060, (q31_t)0xc7c5c1e, (q31_t)0x13d4530, (q31_t)0xc88af0e,
+    (q31_t)0x13fbc6c, (q31_t)0xc950182, (q31_t)0x1423613, (q31_t)0xca1537a,
+    (q31_t)0x144b225, (q31_t)0xcada4f5, (q31_t)0x14730a3, (q31_t)0xcb9f5f3,
+    (q31_t)0x149b18b, (q31_t)0xcc64673, (q31_t)0x14c34df, (q31_t)0xcd29676,
+    (q31_t)0x14eba9d, (q31_t)0xcdee5f9, (q31_t)0x15142c6, (q31_t)0xceb34fe,
+    (q31_t)0x153cd5a, (q31_t)0xcf78383, (q31_t)0x1565a58, (q31_t)0xd03d189,
+    (q31_t)0x158e9c1, (q31_t)0xd101f0e, (q31_t)0x15b7b94, (q31_t)0xd1c6c11,
+    (q31_t)0x15e0fd1, (q31_t)0xd28b894, (q31_t)0x160a678, (q31_t)0xd350495,
+    (q31_t)0x1633f8a, (q31_t)0xd415013, (q31_t)0x165db05, (q31_t)0xd4d9b0e,
+    (q31_t)0x16878eb, (q31_t)0xd59e586, (q31_t)0x16b193a, (q31_t)0xd662f7b,
+    (q31_t)0x16dbbf3, (q31_t)0xd7278eb, (q31_t)0x1706115, (q31_t)0xd7ec1d6,
+    (q31_t)0x17308a1, (q31_t)0xd8b0a3d, (q31_t)0x175b296, (q31_t)0xd97521d,
+    (q31_t)0x1785ef4, (q31_t)0xda39978, (q31_t)0x17b0dbb, (q31_t)0xdafe04b,
+    (q31_t)0x17dbeec, (q31_t)0xdbc2698, (q31_t)0x1807285, (q31_t)0xdc86c5d,
+    (q31_t)0x1832888, (q31_t)0xdd4b19a, (q31_t)0x185e0f3, (q31_t)0xde0f64f,
+    (q31_t)0x1889bc6, (q31_t)0xded3a7b, (q31_t)0x18b5903, (q31_t)0xdf97e1d,
+    (q31_t)0x18e18a7, (q31_t)0xe05c135, (q31_t)0x190dab4, (q31_t)0xe1203c3,
+    (q31_t)0x1939f29, (q31_t)0xe1e45c6, (q31_t)0x1966606, (q31_t)0xe2a873e,
+    (q31_t)0x1992f4c, (q31_t)0xe36c82a, (q31_t)0x19bfaf9, (q31_t)0xe430889,
+    (q31_t)0x19ec90d, (q31_t)0xe4f485c, (q31_t)0x1a1998a, (q31_t)0xe5b87a2,
+    (q31_t)0x1a46c6e, (q31_t)0xe67c65a, (q31_t)0x1a741b9, (q31_t)0xe740483,
+    (q31_t)0x1aa196c, (q31_t)0xe80421e, (q31_t)0x1acf386, (q31_t)0xe8c7f2a,
+    (q31_t)0x1afd007, (q31_t)0xe98bba7, (q31_t)0x1b2aef0, (q31_t)0xea4f793,
+    (q31_t)0x1b5903f, (q31_t)0xeb132ef, (q31_t)0x1b873f5, (q31_t)0xebd6db9,
+    (q31_t)0x1bb5a11, (q31_t)0xec9a7f3, (q31_t)0x1be4294, (q31_t)0xed5e19a,
+    (q31_t)0x1c12d7e, (q31_t)0xee21aaf, (q31_t)0x1c41ace, (q31_t)0xeee5331,
+    (q31_t)0x1c70a84, (q31_t)0xefa8b20, (q31_t)0x1c9fca0, (q31_t)0xf06c27a,
+    (q31_t)0x1ccf122, (q31_t)0xf12f941, (q31_t)0x1cfe80a, (q31_t)0xf1f2f73,
+    (q31_t)0x1d2e158, (q31_t)0xf2b650f, (q31_t)0x1d5dd0c, (q31_t)0xf379a16,
+    (q31_t)0x1d8db25, (q31_t)0xf43ce86, (q31_t)0x1dbdba3, (q31_t)0xf500260,
+    (q31_t)0x1dede87, (q31_t)0xf5c35a3, (q31_t)0x1e1e3d0, (q31_t)0xf68684e,
+    (q31_t)0x1e4eb7e, (q31_t)0xf749a61, (q31_t)0x1e7f591, (q31_t)0xf80cbdc,
+    (q31_t)0x1eb0209, (q31_t)0xf8cfcbe, (q31_t)0x1ee10e5, (q31_t)0xf992d06,
+    (q31_t)0x1f12227, (q31_t)0xfa55cb4, (q31_t)0x1f435cc, (q31_t)0xfb18bc8,
+    (q31_t)0x1f74bd6, (q31_t)0xfbdba40, (q31_t)0x1fa6445, (q31_t)0xfc9e81e,
+    (q31_t)0x1fd7f17, (q31_t)0xfd6155f, (q31_t)0x2009c4e, (q31_t)0xfe24205,
+    (q31_t)0x203bbe8, (q31_t)0xfee6e0d, (q31_t)0x206dde6, (q31_t)0xffa9979,
+    (q31_t)0x20a0248, (q31_t)0x1006c446, (q31_t)0x20d290d, (q31_t)0x1012ee76,
+    (q31_t)0x2105236, (q31_t)0x101f1807, (q31_t)0x2137dc2, (q31_t)0x102b40f8,
+    (q31_t)0x216abb1, (q31_t)0x1037694b, (q31_t)0x219dc03, (q31_t)0x104390fd,
+    (q31_t)0x21d0eb8, (q31_t)0x104fb80e, (q31_t)0x22043d0, (q31_t)0x105bde7f,
+    (q31_t)0x2237b4b, (q31_t)0x1068044e, (q31_t)0x226b528, (q31_t)0x1074297b,
+    (q31_t)0x229f167, (q31_t)0x10804e06, (q31_t)0x22d3009, (q31_t)0x108c71ee,
+    (q31_t)0x230710d, (q31_t)0x10989532, (q31_t)0x233b473, (q31_t)0x10a4b7d3,
+    (q31_t)0x236fa3b, (q31_t)0x10b0d9d0, (q31_t)0x23a4265, (q31_t)0x10bcfb28,
+    (q31_t)0x23d8cf1, (q31_t)0x10c91bda, (q31_t)0x240d9de, (q31_t)0x10d53be7,
+    (q31_t)0x244292c, (q31_t)0x10e15b4e, (q31_t)0x2477adc, (q31_t)0x10ed7a0e,
+    (q31_t)0x24aceed, (q31_t)0x10f99827, (q31_t)0x24e255e, (q31_t)0x1105b599,
+    (q31_t)0x2517e31, (q31_t)0x1111d263, (q31_t)0x254d965, (q31_t)0x111dee84,
+    (q31_t)0x25836f9, (q31_t)0x112a09fc, (q31_t)0x25b96ee, (q31_t)0x113624cb,
+    (q31_t)0x25ef943, (q31_t)0x11423ef0, (q31_t)0x2625df8, (q31_t)0x114e586a,
+    (q31_t)0x265c50e, (q31_t)0x115a713a, (q31_t)0x2692e83, (q31_t)0x1166895f,
+    (q31_t)0x26c9a58, (q31_t)0x1172a0d7, (q31_t)0x270088e, (q31_t)0x117eb7a4,
+    (q31_t)0x2737922, (q31_t)0x118acdc4, (q31_t)0x276ec16, (q31_t)0x1196e337,
+    (q31_t)0x27a616a, (q31_t)0x11a2f7fc, (q31_t)0x27dd91c, (q31_t)0x11af0c13,
+    (q31_t)0x281532e, (q31_t)0x11bb1f7c, (q31_t)0x284cf9f, (q31_t)0x11c73235,
+    (q31_t)0x2884e6e, (q31_t)0x11d3443f, (q31_t)0x28bcf9c, (q31_t)0x11df5599,
+    (q31_t)0x28f5329, (q31_t)0x11eb6643, (q31_t)0x292d914, (q31_t)0x11f7763c,
+    (q31_t)0x296615d, (q31_t)0x12038584, (q31_t)0x299ec05, (q31_t)0x120f941a,
+    (q31_t)0x29d790a, (q31_t)0x121ba1fd, (q31_t)0x2a1086d, (q31_t)0x1227af2e,
+    (q31_t)0x2a49a2e, (q31_t)0x1233bbac, (q31_t)0x2a82e4d, (q31_t)0x123fc776,
+    (q31_t)0x2abc4c9, (q31_t)0x124bd28c, (q31_t)0x2af5da2, (q31_t)0x1257dced,
+    (q31_t)0x2b2f8d8, (q31_t)0x1263e699, (q31_t)0x2b6966c, (q31_t)0x126fef90,
+    (q31_t)0x2ba365c, (q31_t)0x127bf7d1, (q31_t)0x2bdd8a9, (q31_t)0x1287ff5b,
+    (q31_t)0x2c17d52, (q31_t)0x1294062f, (q31_t)0x2c52459, (q31_t)0x12a00c4b,
+    (q31_t)0x2c8cdbb, (q31_t)0x12ac11af, (q31_t)0x2cc7979, (q31_t)0x12b8165b,
+    (q31_t)0x2d02794, (q31_t)0x12c41a4f, (q31_t)0x2d3d80a, (q31_t)0x12d01d89,
+    (q31_t)0x2d78add, (q31_t)0x12dc2009, (q31_t)0x2db400a, (q31_t)0x12e821cf,
+    (q31_t)0x2def794, (q31_t)0x12f422db, (q31_t)0x2e2b178, (q31_t)0x1300232c,
+    (q31_t)0x2e66db8, (q31_t)0x130c22c1, (q31_t)0x2ea2c53, (q31_t)0x1318219a,
+    (q31_t)0x2eded49, (q31_t)0x13241fb6, (q31_t)0x2f1b099, (q31_t)0x13301d16,
+    (q31_t)0x2f57644, (q31_t)0x133c19b8, (q31_t)0x2f93e4a, (q31_t)0x1348159d,
+    (q31_t)0x2fd08a9, (q31_t)0x135410c3, (q31_t)0x300d563, (q31_t)0x13600b2a,
+    (q31_t)0x304a477, (q31_t)0x136c04d2, (q31_t)0x30875e5, (q31_t)0x1377fdbb,
+    (q31_t)0x30c49ad, (q31_t)0x1383f5e3, (q31_t)0x3101fce, (q31_t)0x138fed4b,
+    (q31_t)0x313f848, (q31_t)0x139be3f2, (q31_t)0x317d31c, (q31_t)0x13a7d9d7,
+    (q31_t)0x31bb049, (q31_t)0x13b3cefa, (q31_t)0x31f8fcf, (q31_t)0x13bfc35b,
+    (q31_t)0x32371ae, (q31_t)0x13cbb6f8, (q31_t)0x32755e5, (q31_t)0x13d7a9d3,
+    (q31_t)0x32b3c75, (q31_t)0x13e39be9, (q31_t)0x32f255e, (q31_t)0x13ef8d3c,
+    (q31_t)0x333109e, (q31_t)0x13fb7dc9, (q31_t)0x336fe37, (q31_t)0x14076d91,
+    (q31_t)0x33aee27, (q31_t)0x14135c94, (q31_t)0x33ee070, (q31_t)0x141f4ad1,
+    (q31_t)0x342d510, (q31_t)0x142b3846, (q31_t)0x346cc07, (q31_t)0x143724f5,
+    (q31_t)0x34ac556, (q31_t)0x144310dd, (q31_t)0x34ec0fc, (q31_t)0x144efbfc,
+    (q31_t)0x352bef9, (q31_t)0x145ae653, (q31_t)0x356bf4d, (q31_t)0x1466cfe1,
+    (q31_t)0x35ac1f7, (q31_t)0x1472b8a5, (q31_t)0x35ec6f8, (q31_t)0x147ea0a0,
+    (q31_t)0x362ce50, (q31_t)0x148a87d1, (q31_t)0x366d7fd, (q31_t)0x14966e36,
+    (q31_t)0x36ae401, (q31_t)0x14a253d1, (q31_t)0x36ef25b, (q31_t)0x14ae38a0,
+    (q31_t)0x373030a, (q31_t)0x14ba1ca3, (q31_t)0x377160f, (q31_t)0x14c5ffd9,
+    (q31_t)0x37b2b6a, (q31_t)0x14d1e242, (q31_t)0x37f4319, (q31_t)0x14ddc3de,
+    (q31_t)0x3835d1e, (q31_t)0x14e9a4ac, (q31_t)0x3877978, (q31_t)0x14f584ac,
+    (q31_t)0x38b9827, (q31_t)0x150163dc, (q31_t)0x38fb92a, (q31_t)0x150d423d,
+    (q31_t)0x393dc82, (q31_t)0x15191fcf, (q31_t)0x398022f, (q31_t)0x1524fc90,
+    (q31_t)0x39c2a2f, (q31_t)0x1530d881, (q31_t)0x3a05484, (q31_t)0x153cb3a0,
+    (q31_t)0x3a4812c, (q31_t)0x15488dee, (q31_t)0x3a8b028, (q31_t)0x1554676a,
+    (q31_t)0x3ace178, (q31_t)0x15604013, (q31_t)0x3b1151b, (q31_t)0x156c17e9,
+    (q31_t)0x3b54b11, (q31_t)0x1577eeec, (q31_t)0x3b9835a, (q31_t)0x1583c51b,
+    (q31_t)0x3bdbdf6, (q31_t)0x158f9a76, (q31_t)0x3c1fae5, (q31_t)0x159b6efb,
+    (q31_t)0x3c63a26, (q31_t)0x15a742ac, (q31_t)0x3ca7bba, (q31_t)0x15b31587,
+    (q31_t)0x3cebfa0, (q31_t)0x15bee78c, (q31_t)0x3d305d8, (q31_t)0x15cab8ba,
+    (q31_t)0x3d74e62, (q31_t)0x15d68911, (q31_t)0x3db993e, (q31_t)0x15e25890,
+    (q31_t)0x3dfe66c, (q31_t)0x15ee2738, (q31_t)0x3e435ea, (q31_t)0x15f9f507,
+    (q31_t)0x3e887bb, (q31_t)0x1605c1fd, (q31_t)0x3ecdbdc, (q31_t)0x16118e1a,
+    (q31_t)0x3f1324e, (q31_t)0x161d595d, (q31_t)0x3f58b10, (q31_t)0x162923c5,
+    (q31_t)0x3f9e624, (q31_t)0x1634ed53, (q31_t)0x3fe4388, (q31_t)0x1640b606,
+    (q31_t)0x402a33c, (q31_t)0x164c7ddd, (q31_t)0x4070540, (q31_t)0x165844d8,
+    (q31_t)0x40b6994, (q31_t)0x16640af7, (q31_t)0x40fd037, (q31_t)0x166fd039,
+    (q31_t)0x414392b, (q31_t)0x167b949d, (q31_t)0x418a46d, (q31_t)0x16875823,
+    (q31_t)0x41d11ff, (q31_t)0x16931acb, (q31_t)0x42181e0, (q31_t)0x169edc94,
+    (q31_t)0x425f410, (q31_t)0x16aa9d7e, (q31_t)0x42a688f, (q31_t)0x16b65d88,
+    (q31_t)0x42edf5c, (q31_t)0x16c21cb2, (q31_t)0x4335877, (q31_t)0x16cddafb,
+    (q31_t)0x437d3e1, (q31_t)0x16d99864, (q31_t)0x43c5199, (q31_t)0x16e554ea,
+    (q31_t)0x440d19e, (q31_t)0x16f1108f, (q31_t)0x44553f2, (q31_t)0x16fccb51,
+    (q31_t)0x449d892, (q31_t)0x17088531, (q31_t)0x44e5f80, (q31_t)0x17143e2d,
+    (q31_t)0x452e8bc, (q31_t)0x171ff646, (q31_t)0x4577444, (q31_t)0x172bad7a,
+    (q31_t)0x45c0219, (q31_t)0x173763c9, (q31_t)0x460923b, (q31_t)0x17431933,
+    (q31_t)0x46524a9, (q31_t)0x174ecdb8, (q31_t)0x469b963, (q31_t)0x175a8157,
+    (q31_t)0x46e5069, (q31_t)0x1766340f, (q31_t)0x472e9bc, (q31_t)0x1771e5e0,
+    (q31_t)0x477855a, (q31_t)0x177d96ca, (q31_t)0x47c2344, (q31_t)0x178946cc,
+    (q31_t)0x480c379, (q31_t)0x1794f5e6, (q31_t)0x48565f9, (q31_t)0x17a0a417,
+    (q31_t)0x48a0ac4, (q31_t)0x17ac515f, (q31_t)0x48eb1db, (q31_t)0x17b7fdbd,
+    (q31_t)0x4935b3c, (q31_t)0x17c3a931, (q31_t)0x49806e7, (q31_t)0x17cf53bb,
+    (q31_t)0x49cb4dd, (q31_t)0x17dafd59, (q31_t)0x4a1651c, (q31_t)0x17e6a60c,
+    (q31_t)0x4a617a6, (q31_t)0x17f24dd3, (q31_t)0x4aacc7a, (q31_t)0x17fdf4ae,
+    (q31_t)0x4af8397, (q31_t)0x18099a9c, (q31_t)0x4b43cfd, (q31_t)0x18153f9d,
+    (q31_t)0x4b8f8ad, (q31_t)0x1820e3b0, (q31_t)0x4bdb6a6, (q31_t)0x182c86d5,
+    (q31_t)0x4c276e8, (q31_t)0x1838290c, (q31_t)0x4c73972, (q31_t)0x1843ca53,
+    (q31_t)0x4cbfe45, (q31_t)0x184f6aab, (q31_t)0x4d0c560, (q31_t)0x185b0a13,
+    (q31_t)0x4d58ec3, (q31_t)0x1866a88a, (q31_t)0x4da5a6f, (q31_t)0x18724611,
+    (q31_t)0x4df2862, (q31_t)0x187de2a7, (q31_t)0x4e3f89c, (q31_t)0x18897e4a,
+    (q31_t)0x4e8cb1e, (q31_t)0x189518fc, (q31_t)0x4ed9fe7, (q31_t)0x18a0b2bb,
+    (q31_t)0x4f276f7, (q31_t)0x18ac4b87, (q31_t)0x4f7504e, (q31_t)0x18b7e35f,
+    (q31_t)0x4fc2bec, (q31_t)0x18c37a44, (q31_t)0x50109d0, (q31_t)0x18cf1034,
+    (q31_t)0x505e9fb, (q31_t)0x18daa52f, (q31_t)0x50acc6b, (q31_t)0x18e63935,
+    (q31_t)0x50fb121, (q31_t)0x18f1cc45, (q31_t)0x514981d, (q31_t)0x18fd5e5f,
+    (q31_t)0x519815f, (q31_t)0x1908ef82, (q31_t)0x51e6ce6, (q31_t)0x19147fae,
+    (q31_t)0x5235ab2, (q31_t)0x19200ee3, (q31_t)0x5284ac3, (q31_t)0x192b9d1f,
+    (q31_t)0x52d3d18, (q31_t)0x19372a64, (q31_t)0x53231b3, (q31_t)0x1942b6af,
+    (q31_t)0x5372891, (q31_t)0x194e4201, (q31_t)0x53c21b4, (q31_t)0x1959cc5a,
+    (q31_t)0x5411d1b, (q31_t)0x196555b8, (q31_t)0x5461ac6, (q31_t)0x1970de1b,
+    (q31_t)0x54b1ab4, (q31_t)0x197c6584, (q31_t)0x5501ce5, (q31_t)0x1987ebf0,
+    (q31_t)0x555215a, (q31_t)0x19937161, (q31_t)0x55a2812, (q31_t)0x199ef5d6,
+    (q31_t)0x55f310d, (q31_t)0x19aa794d, (q31_t)0x5643c4a, (q31_t)0x19b5fbc8,
+    (q31_t)0x56949ca, (q31_t)0x19c17d44, (q31_t)0x56e598c, (q31_t)0x19ccfdc2,
+    (q31_t)0x5736b90, (q31_t)0x19d87d42, (q31_t)0x5787fd6, (q31_t)0x19e3fbc3,
+    (q31_t)0x57d965d, (q31_t)0x19ef7944, (q31_t)0x582af26, (q31_t)0x19faf5c5,
+    (q31_t)0x587ca31, (q31_t)0x1a067145, (q31_t)0x58ce77c, (q31_t)0x1a11ebc5,
+    (q31_t)0x5920708, (q31_t)0x1a1d6544, (q31_t)0x59728d5, (q31_t)0x1a28ddc0,
+    (q31_t)0x59c4ce3, (q31_t)0x1a34553b, (q31_t)0x5a17330, (q31_t)0x1a3fcbb3,
+    (q31_t)0x5a69bbe, (q31_t)0x1a4b4128, (q31_t)0x5abc68c, (q31_t)0x1a56b599,
+    (q31_t)0x5b0f399, (q31_t)0x1a622907, (q31_t)0x5b622e6, (q31_t)0x1a6d9b70,
+    (q31_t)0x5bb5472, (q31_t)0x1a790cd4, (q31_t)0x5c0883d, (q31_t)0x1a847d33,
+    (q31_t)0x5c5be47, (q31_t)0x1a8fec8c, (q31_t)0x5caf690, (q31_t)0x1a9b5adf,
+    (q31_t)0x5d03118, (q31_t)0x1aa6c82b, (q31_t)0x5d56ddd, (q31_t)0x1ab23471,
+    (q31_t)0x5daace1, (q31_t)0x1abd9faf, (q31_t)0x5dfee22, (q31_t)0x1ac909e5,
+    (q31_t)0x5e531a1, (q31_t)0x1ad47312, (q31_t)0x5ea775e, (q31_t)0x1adfdb37,
+    (q31_t)0x5efbf58, (q31_t)0x1aeb4253, (q31_t)0x5f5098f, (q31_t)0x1af6a865,
+    (q31_t)0x5fa5603, (q31_t)0x1b020d6c, (q31_t)0x5ffa4b3, (q31_t)0x1b0d716a,
+    (q31_t)0x604f5a0, (q31_t)0x1b18d45c, (q31_t)0x60a48c9, (q31_t)0x1b243643,
+    (q31_t)0x60f9e2e, (q31_t)0x1b2f971e, (q31_t)0x614f5cf, (q31_t)0x1b3af6ec,
+    (q31_t)0x61a4fac, (q31_t)0x1b4655ae, (q31_t)0x61fabc4, (q31_t)0x1b51b363,
+    (q31_t)0x6250a18, (q31_t)0x1b5d100a, (q31_t)0x62a6aa6, (q31_t)0x1b686ba3,
+    (q31_t)0x62fcd6f, (q31_t)0x1b73c62d, (q31_t)0x6353273, (q31_t)0x1b7f1fa9,
+    (q31_t)0x63a99b1, (q31_t)0x1b8a7815, (q31_t)0x6400329, (q31_t)0x1b95cf71,
+    (q31_t)0x6456edb, (q31_t)0x1ba125bd, (q31_t)0x64adcc7, (q31_t)0x1bac7af9,
+    (q31_t)0x6504ced, (q31_t)0x1bb7cf23, (q31_t)0x655bf4c, (q31_t)0x1bc3223c,
+    (q31_t)0x65b33e4, (q31_t)0x1bce7442, (q31_t)0x660aab5, (q31_t)0x1bd9c537,
+    (q31_t)0x66623be, (q31_t)0x1be51518, (q31_t)0x66b9f01, (q31_t)0x1bf063e6,
+    (q31_t)0x6711c7b, (q31_t)0x1bfbb1a0, (q31_t)0x6769c2e, (q31_t)0x1c06fe46,
+    (q31_t)0x67c1e18, (q31_t)0x1c1249d8, (q31_t)0x681a23a, (q31_t)0x1c1d9454,
+    (q31_t)0x6872894, (q31_t)0x1c28ddbb, (q31_t)0x68cb124, (q31_t)0x1c34260c,
+    (q31_t)0x6923bec, (q31_t)0x1c3f6d47, (q31_t)0x697c8eb, (q31_t)0x1c4ab36b,
+    (q31_t)0x69d5820, (q31_t)0x1c55f878, (q31_t)0x6a2e98b, (q31_t)0x1c613c6d,
+    (q31_t)0x6a87d2d, (q31_t)0x1c6c7f4a, (q31_t)0x6ae1304, (q31_t)0x1c77c10e,
+    (q31_t)0x6b3ab12, (q31_t)0x1c8301b9, (q31_t)0x6b94554, (q31_t)0x1c8e414b,
+    (q31_t)0x6bee1cd, (q31_t)0x1c997fc4, (q31_t)0x6c4807a, (q31_t)0x1ca4bd21,
+    (q31_t)0x6ca215c, (q31_t)0x1caff965, (q31_t)0x6cfc472, (q31_t)0x1cbb348d,
+    (q31_t)0x6d569be, (q31_t)0x1cc66e99, (q31_t)0x6db113d, (q31_t)0x1cd1a78a,
+    (q31_t)0x6e0baf0, (q31_t)0x1cdcdf5e, (q31_t)0x6e666d7, (q31_t)0x1ce81615,
+    (q31_t)0x6ec14f2, (q31_t)0x1cf34baf, (q31_t)0x6f1c540, (q31_t)0x1cfe802b,
+    (q31_t)0x6f777c1, (q31_t)0x1d09b389, (q31_t)0x6fd2c75, (q31_t)0x1d14e5c9,
+    (q31_t)0x702e35c, (q31_t)0x1d2016e9, (q31_t)0x7089c75, (q31_t)0x1d2b46ea,
+    (q31_t)0x70e57c0, (q31_t)0x1d3675cb, (q31_t)0x714153e, (q31_t)0x1d41a38c,
+    (q31_t)0x719d4ed, (q31_t)0x1d4cd02c, (q31_t)0x71f96ce, (q31_t)0x1d57fbaa,
+    (q31_t)0x7255ae0, (q31_t)0x1d632608, (q31_t)0x72b2123, (q31_t)0x1d6e4f43,
+    (q31_t)0x730e997, (q31_t)0x1d79775c, (q31_t)0x736b43c, (q31_t)0x1d849e51,
+    (q31_t)0x73c8111, (q31_t)0x1d8fc424, (q31_t)0x7425016, (q31_t)0x1d9ae8d2,
+    (q31_t)0x748214c, (q31_t)0x1da60c5d, (q31_t)0x74df4b1, (q31_t)0x1db12ec3,
+    (q31_t)0x753ca46, (q31_t)0x1dbc5004, (q31_t)0x759a20a, (q31_t)0x1dc7701f,
+    (q31_t)0x75f7bfe, (q31_t)0x1dd28f15, (q31_t)0x7655820, (q31_t)0x1dddace4,
+    (q31_t)0x76b3671, (q31_t)0x1de8c98c, (q31_t)0x77116f0, (q31_t)0x1df3e50d,
+    (q31_t)0x776f99d, (q31_t)0x1dfeff67, (q31_t)0x77cde79, (q31_t)0x1e0a1898,
+    (q31_t)0x782c582, (q31_t)0x1e1530a1, (q31_t)0x788aeb9, (q31_t)0x1e204781,
+    (q31_t)0x78e9a1d, (q31_t)0x1e2b5d38, (q31_t)0x79487ae, (q31_t)0x1e3671c5,
+    (q31_t)0x79a776c, (q31_t)0x1e418528, (q31_t)0x7a06957, (q31_t)0x1e4c9760,
+    (q31_t)0x7a65d6e, (q31_t)0x1e57a86d, (q31_t)0x7ac53b1, (q31_t)0x1e62b84f,
+    (q31_t)0x7b24c20, (q31_t)0x1e6dc705, (q31_t)0x7b846ba, (q31_t)0x1e78d48e,
+    (q31_t)0x7be4381, (q31_t)0x1e83e0eb, (q31_t)0x7c44272, (q31_t)0x1e8eec1b,
+    (q31_t)0x7ca438f, (q31_t)0x1e99f61d, (q31_t)0x7d046d6, (q31_t)0x1ea4fef0,
+    (q31_t)0x7d64c47, (q31_t)0x1eb00696, (q31_t)0x7dc53e3, (q31_t)0x1ebb0d0d,
+    (q31_t)0x7e25daa, (q31_t)0x1ec61254, (q31_t)0x7e8699a, (q31_t)0x1ed1166b,
+    (q31_t)0x7ee77b3, (q31_t)0x1edc1953, (q31_t)0x7f487f6, (q31_t)0x1ee71b0a,
+    (q31_t)0x7fa9a62, (q31_t)0x1ef21b90, (q31_t)0x800aef7, (q31_t)0x1efd1ae4,
+    (q31_t)0x806c5b5, (q31_t)0x1f081907, (q31_t)0x80cde9b, (q31_t)0x1f1315f7,
+    (q31_t)0x812f9a9, (q31_t)0x1f1e11b5, (q31_t)0x81916df, (q31_t)0x1f290c3f,
+    (q31_t)0x81f363d, (q31_t)0x1f340596, (q31_t)0x82557c3, (q31_t)0x1f3efdb9,
+    (q31_t)0x82b7b70, (q31_t)0x1f49f4a8, (q31_t)0x831a143, (q31_t)0x1f54ea62,
+    (q31_t)0x837c93e, (q31_t)0x1f5fdee6, (q31_t)0x83df35f, (q31_t)0x1f6ad235,
+    (q31_t)0x8441fa6, (q31_t)0x1f75c44e, (q31_t)0x84a4e14, (q31_t)0x1f80b531,
+    (q31_t)0x8507ea7, (q31_t)0x1f8ba4dc, (q31_t)0x856b160, (q31_t)0x1f969350,
+    (q31_t)0x85ce63e, (q31_t)0x1fa1808c, (q31_t)0x8631d42, (q31_t)0x1fac6c91,
+    (q31_t)0x869566a, (q31_t)0x1fb7575c, (q31_t)0x86f91b7, (q31_t)0x1fc240ef,
+    (q31_t)0x875cf28, (q31_t)0x1fcd2948, (q31_t)0x87c0ebd, (q31_t)0x1fd81067,
+    (q31_t)0x8825077, (q31_t)0x1fe2f64c, (q31_t)0x8889454, (q31_t)0x1feddaf6,
+    (q31_t)0x88eda54, (q31_t)0x1ff8be65, (q31_t)0x8952278, (q31_t)0x2003a099,
+    (q31_t)0x89b6cbf, (q31_t)0x200e8190, (q31_t)0x8a1b928, (q31_t)0x2019614c,
+    (q31_t)0x8a807b4, (q31_t)0x20243fca, (q31_t)0x8ae5862, (q31_t)0x202f1d0b,
+    (q31_t)0x8b4ab32, (q31_t)0x2039f90f, (q31_t)0x8bb0023, (q31_t)0x2044d3d4,
+    (q31_t)0x8c15736, (q31_t)0x204fad5b, (q31_t)0x8c7b06b, (q31_t)0x205a85a3,
+    (q31_t)0x8ce0bc0, (q31_t)0x20655cac, (q31_t)0x8d46936, (q31_t)0x20703275,
+    (q31_t)0x8dac8cd, (q31_t)0x207b06fe, (q31_t)0x8e12a84, (q31_t)0x2085da46,
+    (q31_t)0x8e78e5b, (q31_t)0x2090ac4d, (q31_t)0x8edf452, (q31_t)0x209b7d13,
+    (q31_t)0x8f45c68, (q31_t)0x20a64c97, (q31_t)0x8fac69e, (q31_t)0x20b11ad9,
+    (q31_t)0x90132f2, (q31_t)0x20bbe7d8, (q31_t)0x907a166, (q31_t)0x20c6b395,
+    (q31_t)0x90e11f7, (q31_t)0x20d17e0d, (q31_t)0x91484a8, (q31_t)0x20dc4742,
+    (q31_t)0x91af976, (q31_t)0x20e70f32, (q31_t)0x9217062, (q31_t)0x20f1d5de,
+    (q31_t)0x927e96b, (q31_t)0x20fc9b44, (q31_t)0x92e6492, (q31_t)0x21075f65,
+    (q31_t)0x934e1d6, (q31_t)0x21122240, (q31_t)0x93b6137, (q31_t)0x211ce3d5,
+    (q31_t)0x941e2b4, (q31_t)0x2127a423, (q31_t)0x948664d, (q31_t)0x21326329,
+    (q31_t)0x94eec03, (q31_t)0x213d20e8, (q31_t)0x95573d4, (q31_t)0x2147dd5f,
+    (q31_t)0x95bfdc1, (q31_t)0x2152988d, (q31_t)0x96289c9, (q31_t)0x215d5273,
+    (q31_t)0x96917ec, (q31_t)0x21680b0f, (q31_t)0x96fa82a, (q31_t)0x2172c262,
+    (q31_t)0x9763a83, (q31_t)0x217d786a, (q31_t)0x97ccef5, (q31_t)0x21882d28,
+    (q31_t)0x9836582, (q31_t)0x2192e09b, (q31_t)0x989fe29, (q31_t)0x219d92c2,
+    (q31_t)0x99098e9, (q31_t)0x21a8439e, (q31_t)0x99735c2, (q31_t)0x21b2f32e,
+    (q31_t)0x99dd4b4, (q31_t)0x21bda171, (q31_t)0x9a475bf, (q31_t)0x21c84e67,
+    (q31_t)0x9ab18e3, (q31_t)0x21d2fa0f, (q31_t)0x9b1be1e, (q31_t)0x21dda46a,
+    (q31_t)0x9b86572, (q31_t)0x21e84d76, (q31_t)0x9bf0edd, (q31_t)0x21f2f534,
+    (q31_t)0x9c5ba60, (q31_t)0x21fd9ba3, (q31_t)0x9cc67fa, (q31_t)0x220840c2,
+    (q31_t)0x9d317ab, (q31_t)0x2212e492, (q31_t)0x9d9c973, (q31_t)0x221d8711,
+    (q31_t)0x9e07d51, (q31_t)0x2228283f, (q31_t)0x9e73346, (q31_t)0x2232c81c,
+    (q31_t)0x9edeb50, (q31_t)0x223d66a8, (q31_t)0x9f4a570, (q31_t)0x224803e2,
+    (q31_t)0x9fb61a5, (q31_t)0x22529fca, (q31_t)0xa021fef, (q31_t)0x225d3a5e,
+    (q31_t)0xa08e04f, (q31_t)0x2267d3a0, (q31_t)0xa0fa2c3, (q31_t)0x22726b8e,
+    (q31_t)0xa16674b, (q31_t)0x227d0228, (q31_t)0xa1d2de7, (q31_t)0x2287976e,
+    (q31_t)0xa23f698, (q31_t)0x22922b5e, (q31_t)0xa2ac15b, (q31_t)0x229cbdfa,
+    (q31_t)0xa318e32, (q31_t)0x22a74f40, (q31_t)0xa385d1d, (q31_t)0x22b1df30,
+    (q31_t)0xa3f2e19, (q31_t)0x22bc6dca, (q31_t)0xa460129, (q31_t)0x22c6fb0c,
+    (q31_t)0xa4cd64b, (q31_t)0x22d186f8, (q31_t)0xa53ad7e, (q31_t)0x22dc118c,
+    (q31_t)0xa5a86c4, (q31_t)0x22e69ac8, (q31_t)0xa61621b, (q31_t)0x22f122ab,
+    (q31_t)0xa683f83, (q31_t)0x22fba936, (q31_t)0xa6f1efc, (q31_t)0x23062e67,
+    (q31_t)0xa760086, (q31_t)0x2310b23e, (q31_t)0xa7ce420, (q31_t)0x231b34bc,
+    (q31_t)0xa83c9ca, (q31_t)0x2325b5df, (q31_t)0xa8ab184, (q31_t)0x233035a7,
+    (q31_t)0xa919b4e, (q31_t)0x233ab414, (q31_t)0xa988727, (q31_t)0x23453125,
+    (q31_t)0xa9f750f, (q31_t)0x234facda, (q31_t)0xaa66506, (q31_t)0x235a2733,
+    (q31_t)0xaad570c, (q31_t)0x2364a02e, (q31_t)0xab44b1f, (q31_t)0x236f17cc,
+    (q31_t)0xabb4141, (q31_t)0x23798e0d, (q31_t)0xac23971, (q31_t)0x238402ef,
+    (q31_t)0xac933ae, (q31_t)0x238e7673, (q31_t)0xad02ff8, (q31_t)0x2398e898,
+    (q31_t)0xad72e4f, (q31_t)0x23a3595e, (q31_t)0xade2eb3, (q31_t)0x23adc8c4,
+    (q31_t)0xae53123, (q31_t)0x23b836ca, (q31_t)0xaec35a0, (q31_t)0x23c2a36f,
+    (q31_t)0xaf33c28, (q31_t)0x23cd0eb3, (q31_t)0xafa44bc, (q31_t)0x23d77896,
+    (q31_t)0xb014f5b, (q31_t)0x23e1e117, (q31_t)0xb085c05, (q31_t)0x23ec4837,
+    (q31_t)0xb0f6aba, (q31_t)0x23f6adf3, (q31_t)0xb167b79, (q31_t)0x2401124d,
+    (q31_t)0xb1d8e43, (q31_t)0x240b7543, (q31_t)0xb24a316, (q31_t)0x2415d6d5,
+    (q31_t)0xb2bb9f4, (q31_t)0x24203704, (q31_t)0xb32d2da, (q31_t)0x242a95ce,
+    (q31_t)0xb39edca, (q31_t)0x2434f332, (q31_t)0xb410ac3, (q31_t)0x243f4f32,
+    (q31_t)0xb4829c4, (q31_t)0x2449a9cc, (q31_t)0xb4f4acd, (q31_t)0x245402ff,
+    (q31_t)0xb566ddf, (q31_t)0x245e5acc, (q31_t)0xb5d92f8, (q31_t)0x2468b132,
+    (q31_t)0xb64ba19, (q31_t)0x24730631, (q31_t)0xb6be341, (q31_t)0x247d59c8,
+    (q31_t)0xb730e70, (q31_t)0x2487abf7, (q31_t)0xb7a3ba5, (q31_t)0x2491fcbe,
+    (q31_t)0xb816ae1, (q31_t)0x249c4c1b, (q31_t)0xb889c23, (q31_t)0x24a69a0f,
+    (q31_t)0xb8fcf6b, (q31_t)0x24b0e699, (q31_t)0xb9704b9, (q31_t)0x24bb31ba,
+    (q31_t)0xb9e3c0b, (q31_t)0x24c57b6f, (q31_t)0xba57563, (q31_t)0x24cfc3ba,
+    (q31_t)0xbacb0bf, (q31_t)0x24da0a9a, (q31_t)0xbb3ee20, (q31_t)0x24e4500e,
+    (q31_t)0xbbb2d85, (q31_t)0x24ee9415, (q31_t)0xbc26eee, (q31_t)0x24f8d6b0,
+    (q31_t)0xbc9b25a, (q31_t)0x250317df, (q31_t)0xbd0f7ca, (q31_t)0x250d57a0,
+    (q31_t)0xbd83f3d, (q31_t)0x251795f3, (q31_t)0xbdf88b3, (q31_t)0x2521d2d8,
+    (q31_t)0xbe6d42b, (q31_t)0x252c0e4f, (q31_t)0xbee21a5, (q31_t)0x25364857,
+    (q31_t)0xbf57121, (q31_t)0x254080ef, (q31_t)0xbfcc29f, (q31_t)0x254ab818,
+    (q31_t)0xc04161e, (q31_t)0x2554edd1, (q31_t)0xc0b6b9e, (q31_t)0x255f2219,
+    (q31_t)0xc12c31f, (q31_t)0x256954f1, (q31_t)0xc1a1ca0, (q31_t)0x25738657,
+    (q31_t)0xc217822, (q31_t)0x257db64c, (q31_t)0xc28d5a3, (q31_t)0x2587e4cf,
+    (q31_t)0xc303524, (q31_t)0x259211df, (q31_t)0xc3796a5, (q31_t)0x259c3d7c,
+    (q31_t)0xc3efa25, (q31_t)0x25a667a7, (q31_t)0xc465fa3, (q31_t)0x25b0905d,
+    (q31_t)0xc4dc720, (q31_t)0x25bab7a0, (q31_t)0xc55309b, (q31_t)0x25c4dd6e,
+    (q31_t)0xc5c9c14, (q31_t)0x25cf01c8, (q31_t)0xc64098b, (q31_t)0x25d924ac,
+    (q31_t)0xc6b78ff, (q31_t)0x25e3461b, (q31_t)0xc72ea70, (q31_t)0x25ed6614,
+    (q31_t)0xc7a5dde, (q31_t)0x25f78497, (q31_t)0xc81d349, (q31_t)0x2601a1a2,
+    (q31_t)0xc894aaf, (q31_t)0x260bbd37, (q31_t)0xc90c412, (q31_t)0x2615d754,
+    (q31_t)0xc983f70, (q31_t)0x261feffa, (q31_t)0xc9fbcca, (q31_t)0x262a0727,
+    (q31_t)0xca73c1e, (q31_t)0x26341cdb, (q31_t)0xcaebd6e, (q31_t)0x263e3117,
+    (q31_t)0xcb640b8, (q31_t)0x264843d9, (q31_t)0xcbdc5fc, (q31_t)0x26525521,
+    (q31_t)0xcc54d3a, (q31_t)0x265c64ef, (q31_t)0xcccd671, (q31_t)0x26667342,
+    (q31_t)0xcd461a2, (q31_t)0x2670801a, (q31_t)0xcdbeecc, (q31_t)0x267a8b77,
+    (q31_t)0xce37def, (q31_t)0x26849558, (q31_t)0xceb0f0a, (q31_t)0x268e9dbd,
+    (q31_t)0xcf2a21d, (q31_t)0x2698a4a6, (q31_t)0xcfa3729, (q31_t)0x26a2aa11,
+    (q31_t)0xd01ce2b, (q31_t)0x26acadff, (q31_t)0xd096725, (q31_t)0x26b6b070,
+    (q31_t)0xd110216, (q31_t)0x26c0b162, (q31_t)0xd189efe, (q31_t)0x26cab0d6,
+    (q31_t)0xd203ddc, (q31_t)0x26d4aecb, (q31_t)0xd27deb0, (q31_t)0x26deab41,
+    (q31_t)0xd2f817b, (q31_t)0x26e8a637, (q31_t)0xd37263a, (q31_t)0x26f29fad,
+    (q31_t)0xd3eccef, (q31_t)0x26fc97a3, (q31_t)0xd467599, (q31_t)0x27068e18,
+    (q31_t)0xd4e2037, (q31_t)0x2710830c, (q31_t)0xd55ccca, (q31_t)0x271a767e,
+    (q31_t)0xd5d7b50, (q31_t)0x2724686e, (q31_t)0xd652bcb, (q31_t)0x272e58dc,
+    (q31_t)0xd6cde39, (q31_t)0x273847c8, (q31_t)0xd74929a, (q31_t)0x27423530,
+    (q31_t)0xd7c48ee, (q31_t)0x274c2115, (q31_t)0xd840134, (q31_t)0x27560b76,
+    (q31_t)0xd8bbb6d, (q31_t)0x275ff452, (q31_t)0xd937798, (q31_t)0x2769dbaa,
+    (q31_t)0xd9b35b4, (q31_t)0x2773c17d, (q31_t)0xda2f5c2, (q31_t)0x277da5cb,
+    (q31_t)0xdaab7c0, (q31_t)0x27878893, (q31_t)0xdb27bb0, (q31_t)0x279169d5,
+    (q31_t)0xdba4190, (q31_t)0x279b4990, (q31_t)0xdc20960, (q31_t)0x27a527c4,
+    (q31_t)0xdc9d320, (q31_t)0x27af0472, (q31_t)0xdd19ed0, (q31_t)0x27b8df97,
+    (q31_t)0xdd96c6f, (q31_t)0x27c2b934, (q31_t)0xde13bfd, (q31_t)0x27cc9149,
+    (q31_t)0xde90d79, (q31_t)0x27d667d5, (q31_t)0xdf0e0e4, (q31_t)0x27e03cd8,
+    (q31_t)0xdf8b63d, (q31_t)0x27ea1052, (q31_t)0xe008d84, (q31_t)0x27f3e241,
+    (q31_t)0xe0866b8, (q31_t)0x27fdb2a7, (q31_t)0xe1041d9, (q31_t)0x28078181,
+    (q31_t)0xe181ee8, (q31_t)0x28114ed0, (q31_t)0xe1ffde2, (q31_t)0x281b1a94,
+    (q31_t)0xe27dec9, (q31_t)0x2824e4cc, (q31_t)0xe2fc19c, (q31_t)0x282ead78,
+    (q31_t)0xe37a65b, (q31_t)0x28387498, (q31_t)0xe3f8d05, (q31_t)0x28423a2a,
+    (q31_t)0xe47759a, (q31_t)0x284bfe2f, (q31_t)0xe4f6019, (q31_t)0x2855c0a6,
+    (q31_t)0xe574c84, (q31_t)0x285f8190, (q31_t)0xe5f3ad8, (q31_t)0x286940ea,
+    (q31_t)0xe672b16, (q31_t)0x2872feb6, (q31_t)0xe6f1d3d, (q31_t)0x287cbaf3,
+    (q31_t)0xe77114e, (q31_t)0x288675a0, (q31_t)0xe7f0748, (q31_t)0x28902ebd,
+    (q31_t)0xe86ff2a, (q31_t)0x2899e64a, (q31_t)0xe8ef8f4, (q31_t)0x28a39c46,
+    (q31_t)0xe96f4a7, (q31_t)0x28ad50b1, (q31_t)0xe9ef241, (q31_t)0x28b7038b,
+    (q31_t)0xea6f1c2, (q31_t)0x28c0b4d2, (q31_t)0xeaef32b, (q31_t)0x28ca6488,
+    (q31_t)0xeb6f67a, (q31_t)0x28d412ab, (q31_t)0xebefbb0, (q31_t)0x28ddbf3b,
+    (q31_t)0xec702cb, (q31_t)0x28e76a37, (q31_t)0xecf0bcd, (q31_t)0x28f113a0,
+    (q31_t)0xed716b4, (q31_t)0x28fabb75, (q31_t)0xedf2380, (q31_t)0x290461b5,
+    (q31_t)0xee73231, (q31_t)0x290e0661, (q31_t)0xeef42c7, (q31_t)0x2917a977,
+    (q31_t)0xef75541, (q31_t)0x29214af8, (q31_t)0xeff699f, (q31_t)0x292aeae3,
+    (q31_t)0xf077fe1, (q31_t)0x29348937, (q31_t)0xf0f9805, (q31_t)0x293e25f5,
+    (q31_t)0xf17b20d, (q31_t)0x2947c11c, (q31_t)0xf1fcdf8, (q31_t)0x29515aab,
+    (q31_t)0xf27ebc5, (q31_t)0x295af2a3, (q31_t)0xf300b74, (q31_t)0x29648902,
+    (q31_t)0xf382d05, (q31_t)0x296e1dc9, (q31_t)0xf405077, (q31_t)0x2977b0f7,
+    (q31_t)0xf4875ca, (q31_t)0x2981428c, (q31_t)0xf509cfe, (q31_t)0x298ad287,
+    (q31_t)0xf58c613, (q31_t)0x299460e8, (q31_t)0xf60f108, (q31_t)0x299dedaf,
+    (q31_t)0xf691ddd, (q31_t)0x29a778db, (q31_t)0xf714c91, (q31_t)0x29b1026c,
+    (q31_t)0xf797d24, (q31_t)0x29ba8a61, (q31_t)0xf81af97, (q31_t)0x29c410ba,
+    (q31_t)0xf89e3e8, (q31_t)0x29cd9578, (q31_t)0xf921a17, (q31_t)0x29d71899,
+    (q31_t)0xf9a5225, (q31_t)0x29e09a1c, (q31_t)0xfa28c10, (q31_t)0x29ea1a03,
+    (q31_t)0xfaac7d8, (q31_t)0x29f3984c, (q31_t)0xfb3057d, (q31_t)0x29fd14f6,
+    (q31_t)0xfbb4500, (q31_t)0x2a069003, (q31_t)0xfc3865e, (q31_t)0x2a100970,
+    (q31_t)0xfcbc999, (q31_t)0x2a19813f, (q31_t)0xfd40eaf, (q31_t)0x2a22f76e,
+    (q31_t)0xfdc55a1, (q31_t)0x2a2c6bfd, (q31_t)0xfe49e6d, (q31_t)0x2a35deeb,
+    (q31_t)0xfece915, (q31_t)0x2a3f503a, (q31_t)0xff53597, (q31_t)0x2a48bfe7,
+    (q31_t)0xffd83f4, (q31_t)0x2a522df3, (q31_t)0x1005d42a, (q31_t)0x2a5b9a5d,
+    (q31_t)0x100e2639, (q31_t)0x2a650525, (q31_t)0x10167a22, (q31_t)0x2a6e6e4b,
+    (q31_t)0x101ecfe4, (q31_t)0x2a77d5ce, (q31_t)0x1027277e, (q31_t)0x2a813bae,
+    (q31_t)0x102f80f1, (q31_t)0x2a8a9fea, (q31_t)0x1037dc3b, (q31_t)0x2a940283,
+    (q31_t)0x1040395d, (q31_t)0x2a9d6377, (q31_t)0x10489856, (q31_t)0x2aa6c2c6,
+    (q31_t)0x1050f926, (q31_t)0x2ab02071, (q31_t)0x10595bcd, (q31_t)0x2ab97c77,
+    (q31_t)0x1061c04a, (q31_t)0x2ac2d6d6, (q31_t)0x106a269d, (q31_t)0x2acc2f90,
+    (q31_t)0x10728ec6, (q31_t)0x2ad586a3, (q31_t)0x107af8c4, (q31_t)0x2adedc10,
+    (q31_t)0x10836497, (q31_t)0x2ae82fd5, (q31_t)0x108bd23f, (q31_t)0x2af181f3,
+    (q31_t)0x109441bb, (q31_t)0x2afad269, (q31_t)0x109cb30b, (q31_t)0x2b042137,
+    (q31_t)0x10a5262f, (q31_t)0x2b0d6e5c, (q31_t)0x10ad9b26, (q31_t)0x2b16b9d9,
+    (q31_t)0x10b611f1, (q31_t)0x2b2003ac, (q31_t)0x10be8a8d, (q31_t)0x2b294bd5,
+    (q31_t)0x10c704fd, (q31_t)0x2b329255, (q31_t)0x10cf813e, (q31_t)0x2b3bd72a,
+    (q31_t)0x10d7ff51, (q31_t)0x2b451a55, (q31_t)0x10e07f36, (q31_t)0x2b4e5bd4,
+    (q31_t)0x10e900ec, (q31_t)0x2b579ba8, (q31_t)0x10f18472, (q31_t)0x2b60d9d0,
+    (q31_t)0x10fa09c9, (q31_t)0x2b6a164d, (q31_t)0x110290f0, (q31_t)0x2b73511c,
+    (q31_t)0x110b19e7, (q31_t)0x2b7c8a3f, (q31_t)0x1113a4ad, (q31_t)0x2b85c1b5,
+    (q31_t)0x111c3142, (q31_t)0x2b8ef77d, (q31_t)0x1124bfa6, (q31_t)0x2b982b97,
+    (q31_t)0x112d4fd9, (q31_t)0x2ba15e03, (q31_t)0x1135e1d9, (q31_t)0x2baa8ec0,
+    (q31_t)0x113e75a8, (q31_t)0x2bb3bdce, (q31_t)0x11470b44, (q31_t)0x2bbceb2d,
+    (q31_t)0x114fa2ad, (q31_t)0x2bc616dd, (q31_t)0x11583be2, (q31_t)0x2bcf40dc,
+    (q31_t)0x1160d6e5, (q31_t)0x2bd8692b, (q31_t)0x116973b3, (q31_t)0x2be18fc9,
+    (q31_t)0x1172124d, (q31_t)0x2beab4b6, (q31_t)0x117ab2b3, (q31_t)0x2bf3d7f2,
+    (q31_t)0x118354e4, (q31_t)0x2bfcf97c, (q31_t)0x118bf8e0, (q31_t)0x2c061953,
+    (q31_t)0x11949ea6, (q31_t)0x2c0f3779, (q31_t)0x119d4636, (q31_t)0x2c1853eb,
+    (q31_t)0x11a5ef90, (q31_t)0x2c216eaa, (q31_t)0x11ae9ab4, (q31_t)0x2c2a87b6,
+    (q31_t)0x11b747a0, (q31_t)0x2c339f0e, (q31_t)0x11bff656, (q31_t)0x2c3cb4b1,
+    (q31_t)0x11c8a6d4, (q31_t)0x2c45c8a0, (q31_t)0x11d1591a, (q31_t)0x2c4edada,
+    (q31_t)0x11da0d28, (q31_t)0x2c57eb5e, (q31_t)0x11e2c2fd, (q31_t)0x2c60fa2d,
+    (q31_t)0x11eb7a9a, (q31_t)0x2c6a0746, (q31_t)0x11f433fd, (q31_t)0x2c7312a9,
+    (q31_t)0x11fcef27, (q31_t)0x2c7c1c55, (q31_t)0x1205ac17, (q31_t)0x2c85244a,
+    (q31_t)0x120e6acc, (q31_t)0x2c8e2a87, (q31_t)0x12172b48, (q31_t)0x2c972f0d,
+    (q31_t)0x121fed88, (q31_t)0x2ca031da, (q31_t)0x1228b18d, (q31_t)0x2ca932ef,
+    (q31_t)0x12317756, (q31_t)0x2cb2324c, (q31_t)0x123a3ee4, (q31_t)0x2cbb2fef,
+    (q31_t)0x12430835, (q31_t)0x2cc42bd9, (q31_t)0x124bd34a, (q31_t)0x2ccd2609,
+    (q31_t)0x1254a021, (q31_t)0x2cd61e7f, (q31_t)0x125d6ebc, (q31_t)0x2cdf153a,
+    (q31_t)0x12663f19, (q31_t)0x2ce80a3a, (q31_t)0x126f1138, (q31_t)0x2cf0fd80,
+    (q31_t)0x1277e518, (q31_t)0x2cf9ef09, (q31_t)0x1280babb, (q31_t)0x2d02ded7,
+    (q31_t)0x1289921e, (q31_t)0x2d0bcce8, (q31_t)0x12926b41, (q31_t)0x2d14b93d,
+    (q31_t)0x129b4626, (q31_t)0x2d1da3d5, (q31_t)0x12a422ca, (q31_t)0x2d268cb0,
+    (q31_t)0x12ad012e, (q31_t)0x2d2f73cd, (q31_t)0x12b5e151, (q31_t)0x2d38592c,
+    (q31_t)0x12bec333, (q31_t)0x2d413ccd, (q31_t)0x12c7a6d4, (q31_t)0x2d4a1eaf,
+    (q31_t)0x12d08c33, (q31_t)0x2d52fed2, (q31_t)0x12d97350, (q31_t)0x2d5bdd36,
+    (q31_t)0x12e25c2b, (q31_t)0x2d64b9da, (q31_t)0x12eb46c3, (q31_t)0x2d6d94bf,
+    (q31_t)0x12f43318, (q31_t)0x2d766de2, (q31_t)0x12fd2129, (q31_t)0x2d7f4545,
+    (q31_t)0x130610f7, (q31_t)0x2d881ae8, (q31_t)0x130f0280, (q31_t)0x2d90eec8,
+    (q31_t)0x1317f5c6, (q31_t)0x2d99c0e7, (q31_t)0x1320eac6, (q31_t)0x2da29144,
+    (q31_t)0x1329e181, (q31_t)0x2dab5fdf, (q31_t)0x1332d9f7, (q31_t)0x2db42cb6,
+    (q31_t)0x133bd427, (q31_t)0x2dbcf7cb, (q31_t)0x1344d011, (q31_t)0x2dc5c11c,
+    (q31_t)0x134dcdb4, (q31_t)0x2dce88aa, (q31_t)0x1356cd11, (q31_t)0x2dd74e73,
+    (q31_t)0x135fce26, (q31_t)0x2de01278, (q31_t)0x1368d0f3, (q31_t)0x2de8d4b8,
+    (q31_t)0x1371d579, (q31_t)0x2df19534, (q31_t)0x137adbb6, (q31_t)0x2dfa53e9,
+    (q31_t)0x1383e3ab, (q31_t)0x2e0310d9, (q31_t)0x138ced57, (q31_t)0x2e0bcc03,
+    (q31_t)0x1395f8ba, (q31_t)0x2e148566, (q31_t)0x139f05d3, (q31_t)0x2e1d3d03,
+    (q31_t)0x13a814a2, (q31_t)0x2e25f2d8, (q31_t)0x13b12526, (q31_t)0x2e2ea6e6,
+    (q31_t)0x13ba3760, (q31_t)0x2e37592c, (q31_t)0x13c34b4f, (q31_t)0x2e4009aa,
+    (q31_t)0x13cc60f2, (q31_t)0x2e48b860, (q31_t)0x13d5784a, (q31_t)0x2e51654c,
+    (q31_t)0x13de9156, (q31_t)0x2e5a1070, (q31_t)0x13e7ac15, (q31_t)0x2e62b9ca,
+    (q31_t)0x13f0c887, (q31_t)0x2e6b615a, (q31_t)0x13f9e6ad, (q31_t)0x2e740720,
+    (q31_t)0x14030684, (q31_t)0x2e7cab1c, (q31_t)0x140c280e, (q31_t)0x2e854d4d,
+    (q31_t)0x14154b4a, (q31_t)0x2e8dedb3, (q31_t)0x141e7037, (q31_t)0x2e968c4d,
+    (q31_t)0x142796d5, (q31_t)0x2e9f291b, (q31_t)0x1430bf24, (q31_t)0x2ea7c41e,
+    (q31_t)0x1439e923, (q31_t)0x2eb05d53, (q31_t)0x144314d3, (q31_t)0x2eb8f4bc,
+    (q31_t)0x144c4232, (q31_t)0x2ec18a58, (q31_t)0x14557140, (q31_t)0x2eca1e27,
+    (q31_t)0x145ea1fd, (q31_t)0x2ed2b027, (q31_t)0x1467d469, (q31_t)0x2edb405a,
+    (q31_t)0x14710883, (q31_t)0x2ee3cebe, (q31_t)0x147a3e4b, (q31_t)0x2eec5b53,
+    (q31_t)0x148375c1, (q31_t)0x2ef4e619, (q31_t)0x148caee4, (q31_t)0x2efd6f10,
+    (q31_t)0x1495e9b3, (q31_t)0x2f05f637, (q31_t)0x149f2630, (q31_t)0x2f0e7b8e,
+    (q31_t)0x14a86458, (q31_t)0x2f16ff14, (q31_t)0x14b1a42c, (q31_t)0x2f1f80ca,
+    (q31_t)0x14bae5ab, (q31_t)0x2f2800af, (q31_t)0x14c428d6, (q31_t)0x2f307ec2,
+    (q31_t)0x14cd6dab, (q31_t)0x2f38fb03, (q31_t)0x14d6b42b, (q31_t)0x2f417573,
+    (q31_t)0x14dffc54, (q31_t)0x2f49ee0f, (q31_t)0x14e94627, (q31_t)0x2f5264da,
+    (q31_t)0x14f291a4, (q31_t)0x2f5ad9d1, (q31_t)0x14fbdec9, (q31_t)0x2f634cf5,
+    (q31_t)0x15052d97, (q31_t)0x2f6bbe45, (q31_t)0x150e7e0d, (q31_t)0x2f742dc1,
+    (q31_t)0x1517d02b, (q31_t)0x2f7c9b69, (q31_t)0x152123f0, (q31_t)0x2f85073c,
+    (q31_t)0x152a795d, (q31_t)0x2f8d713a, (q31_t)0x1533d070, (q31_t)0x2f95d963,
+    (q31_t)0x153d292a, (q31_t)0x2f9e3fb6, (q31_t)0x15468389, (q31_t)0x2fa6a433,
+    (q31_t)0x154fdf8f, (q31_t)0x2faf06da, (q31_t)0x15593d3a, (q31_t)0x2fb767aa,
+    (q31_t)0x15629c89, (q31_t)0x2fbfc6a3, (q31_t)0x156bfd7d, (q31_t)0x2fc823c5,
+    (q31_t)0x15756016, (q31_t)0x2fd07f0f, (q31_t)0x157ec452, (q31_t)0x2fd8d882,
+    (q31_t)0x15882a32, (q31_t)0x2fe1301c, (q31_t)0x159191b5, (q31_t)0x2fe985de,
+    (q31_t)0x159afadb, (q31_t)0x2ff1d9c7, (q31_t)0x15a465a3, (q31_t)0x2ffa2bd6,
+    (q31_t)0x15add20d, (q31_t)0x30027c0c, (q31_t)0x15b74019, (q31_t)0x300aca69,
+    (q31_t)0x15c0afc6, (q31_t)0x301316eb, (q31_t)0x15ca2115, (q31_t)0x301b6193,
+    (q31_t)0x15d39403, (q31_t)0x3023aa5f, (q31_t)0x15dd0892, (q31_t)0x302bf151,
+    (q31_t)0x15e67ec1, (q31_t)0x30343667, (q31_t)0x15eff690, (q31_t)0x303c79a2,
+    (q31_t)0x15f96ffd, (q31_t)0x3044bb00, (q31_t)0x1602eb0a, (q31_t)0x304cfa83,
+    (q31_t)0x160c67b4, (q31_t)0x30553828, (q31_t)0x1615e5fd, (q31_t)0x305d73f0,
+    (q31_t)0x161f65e4, (q31_t)0x3065addb, (q31_t)0x1628e767, (q31_t)0x306de5e9,
+    (q31_t)0x16326a88, (q31_t)0x30761c18, (q31_t)0x163bef46, (q31_t)0x307e5069,
+    (q31_t)0x1645759f, (q31_t)0x308682dc, (q31_t)0x164efd94, (q31_t)0x308eb36f,
+    (q31_t)0x16588725, (q31_t)0x3096e223, (q31_t)0x16621251, (q31_t)0x309f0ef8,
+    (q31_t)0x166b9f18, (q31_t)0x30a739ed, (q31_t)0x16752d79, (q31_t)0x30af6302,
+    (q31_t)0x167ebd74, (q31_t)0x30b78a36, (q31_t)0x16884f09, (q31_t)0x30bfaf89,
+    (q31_t)0x1691e237, (q31_t)0x30c7d2fb, (q31_t)0x169b76fe, (q31_t)0x30cff48c,
+    (q31_t)0x16a50d5d, (q31_t)0x30d8143b, (q31_t)0x16aea555, (q31_t)0x30e03208,
+    (q31_t)0x16b83ee4, (q31_t)0x30e84df3, (q31_t)0x16c1da0b, (q31_t)0x30f067fb,
+    (q31_t)0x16cb76c9, (q31_t)0x30f8801f, (q31_t)0x16d5151d, (q31_t)0x31009661,
+    (q31_t)0x16deb508, (q31_t)0x3108aabf, (q31_t)0x16e85689, (q31_t)0x3110bd39,
+    (q31_t)0x16f1f99f, (q31_t)0x3118cdcf, (q31_t)0x16fb9e4b, (q31_t)0x3120dc80,
+    (q31_t)0x1705448b, (q31_t)0x3128e94c, (q31_t)0x170eec60, (q31_t)0x3130f433,
+    (q31_t)0x171895c9, (q31_t)0x3138fd35, (q31_t)0x172240c5, (q31_t)0x31410450,
+    (q31_t)0x172bed55, (q31_t)0x31490986, (q31_t)0x17359b78, (q31_t)0x31510cd5,
+    (q31_t)0x173f4b2e, (q31_t)0x31590e3e, (q31_t)0x1748fc75, (q31_t)0x31610dbf,
+    (q31_t)0x1752af4f, (q31_t)0x31690b59, (q31_t)0x175c63ba, (q31_t)0x3171070c,
+    (q31_t)0x176619b6, (q31_t)0x317900d6, (q31_t)0x176fd143, (q31_t)0x3180f8b8,
+    (q31_t)0x17798a60, (q31_t)0x3188eeb2, (q31_t)0x1783450d, (q31_t)0x3190e2c3,
+    (q31_t)0x178d014a, (q31_t)0x3198d4ea, (q31_t)0x1796bf16, (q31_t)0x31a0c528,
+    (q31_t)0x17a07e70, (q31_t)0x31a8b37c, (q31_t)0x17aa3f5a, (q31_t)0x31b09fe7,
+    (q31_t)0x17b401d1, (q31_t)0x31b88a66, (q31_t)0x17bdc5d6, (q31_t)0x31c072fb,
+    (q31_t)0x17c78b68, (q31_t)0x31c859a5, (q31_t)0x17d15288, (q31_t)0x31d03e64,
+    (q31_t)0x17db1b34, (q31_t)0x31d82137, (q31_t)0x17e4e56c, (q31_t)0x31e0021e,
+    (q31_t)0x17eeb130, (q31_t)0x31e7e118, (q31_t)0x17f87e7f, (q31_t)0x31efbe27,
+    (q31_t)0x18024d59, (q31_t)0x31f79948, (q31_t)0x180c1dbf, (q31_t)0x31ff727c,
+    (q31_t)0x1815efae, (q31_t)0x320749c3, (q31_t)0x181fc328, (q31_t)0x320f1f1c,
+    (q31_t)0x1829982b, (q31_t)0x3216f287, (q31_t)0x18336eb7, (q31_t)0x321ec403,
+    (q31_t)0x183d46cc, (q31_t)0x32269391, (q31_t)0x18472069, (q31_t)0x322e6130,
+    (q31_t)0x1850fb8e, (q31_t)0x32362ce0, (q31_t)0x185ad83c, (q31_t)0x323df6a0,
+    (q31_t)0x1864b670, (q31_t)0x3245be70, (q31_t)0x186e962b, (q31_t)0x324d8450,
+    (q31_t)0x1878776d, (q31_t)0x32554840, (q31_t)0x18825a35, (q31_t)0x325d0a3e,
+    (q31_t)0x188c3e83, (q31_t)0x3264ca4c, (q31_t)0x18962456, (q31_t)0x326c8868,
+    (q31_t)0x18a00bae, (q31_t)0x32744493, (q31_t)0x18a9f48a, (q31_t)0x327bfecc,
+    (q31_t)0x18b3deeb, (q31_t)0x3283b712, (q31_t)0x18bdcad0, (q31_t)0x328b6d66,
+    (q31_t)0x18c7b838, (q31_t)0x329321c7, (q31_t)0x18d1a724, (q31_t)0x329ad435,
+    (q31_t)0x18db9792, (q31_t)0x32a284b0, (q31_t)0x18e58982, (q31_t)0x32aa3336,
+    (q31_t)0x18ef7cf4, (q31_t)0x32b1dfc9, (q31_t)0x18f971e8, (q31_t)0x32b98a67,
+    (q31_t)0x1903685d, (q31_t)0x32c13311, (q31_t)0x190d6053, (q31_t)0x32c8d9c6,
+    (q31_t)0x191759c9, (q31_t)0x32d07e85, (q31_t)0x192154bf, (q31_t)0x32d82150,
+    (q31_t)0x192b5135, (q31_t)0x32dfc224, (q31_t)0x19354f2a, (q31_t)0x32e76102,
+    (q31_t)0x193f4e9e, (q31_t)0x32eefdea, (q31_t)0x19494f90, (q31_t)0x32f698db,
+    (q31_t)0x19535201, (q31_t)0x32fe31d5, (q31_t)0x195d55ef, (q31_t)0x3305c8d7,
+    (q31_t)0x19675b5a, (q31_t)0x330d5de3, (q31_t)0x19716243, (q31_t)0x3314f0f6,
+    (q31_t)0x197b6aa8, (q31_t)0x331c8211, (q31_t)0x19857489, (q31_t)0x33241134,
+    (q31_t)0x198f7fe6, (q31_t)0x332b9e5e, (q31_t)0x19998cbe, (q31_t)0x3333298f,
+    (q31_t)0x19a39b11, (q31_t)0x333ab2c6, (q31_t)0x19adaadf, (q31_t)0x33423a04,
+    (q31_t)0x19b7bc27, (q31_t)0x3349bf48, (q31_t)0x19c1cee9, (q31_t)0x33514292,
+    (q31_t)0x19cbe325, (q31_t)0x3358c3e2, (q31_t)0x19d5f8d9, (q31_t)0x33604336,
+    (q31_t)0x19e01006, (q31_t)0x3367c090, (q31_t)0x19ea28ac, (q31_t)0x336f3bee,
+    (q31_t)0x19f442c9, (q31_t)0x3376b551, (q31_t)0x19fe5e5e, (q31_t)0x337e2cb7,
+    (q31_t)0x1a087b69, (q31_t)0x3385a222, (q31_t)0x1a1299ec, (q31_t)0x338d1590,
+    (q31_t)0x1a1cb9e5, (q31_t)0x33948701, (q31_t)0x1a26db54, (q31_t)0x339bf675,
+    (q31_t)0x1a30fe38, (q31_t)0x33a363ec, (q31_t)0x1a3b2292, (q31_t)0x33aacf65,
+    (q31_t)0x1a454860, (q31_t)0x33b238e0, (q31_t)0x1a4f6fa3, (q31_t)0x33b9a05d,
+    (q31_t)0x1a599859, (q31_t)0x33c105db, (q31_t)0x1a63c284, (q31_t)0x33c8695b,
+    (q31_t)0x1a6dee21, (q31_t)0x33cfcadc, (q31_t)0x1a781b31, (q31_t)0x33d72a5d,
+    (q31_t)0x1a8249b4, (q31_t)0x33de87de, (q31_t)0x1a8c79a9, (q31_t)0x33e5e360,
+    (q31_t)0x1a96ab0f, (q31_t)0x33ed3ce1, (q31_t)0x1aa0dde7, (q31_t)0x33f49462,
+    (q31_t)0x1aab122f, (q31_t)0x33fbe9e2, (q31_t)0x1ab547e8, (q31_t)0x34033d61,
+    (q31_t)0x1abf7f11, (q31_t)0x340a8edf, (q31_t)0x1ac9b7a9, (q31_t)0x3411de5b,
+    (q31_t)0x1ad3f1b1, (q31_t)0x34192bd5, (q31_t)0x1ade2d28, (q31_t)0x3420774d,
+    (q31_t)0x1ae86a0d, (q31_t)0x3427c0c3, (q31_t)0x1af2a860, (q31_t)0x342f0836,
+    (q31_t)0x1afce821, (q31_t)0x34364da6, (q31_t)0x1b072950, (q31_t)0x343d9112,
+    (q31_t)0x1b116beb, (q31_t)0x3444d27b, (q31_t)0x1b1baff2, (q31_t)0x344c11e0,
+    (q31_t)0x1b25f566, (q31_t)0x34534f41, (q31_t)0x1b303c46, (q31_t)0x345a8a9d,
+    (q31_t)0x1b3a8491, (q31_t)0x3461c3f5, (q31_t)0x1b44ce46, (q31_t)0x3468fb47,
+    (q31_t)0x1b4f1967, (q31_t)0x34703095, (q31_t)0x1b5965f1, (q31_t)0x347763dd,
+    (q31_t)0x1b63b3e5, (q31_t)0x347e951f, (q31_t)0x1b6e0342, (q31_t)0x3485c45b,
+    (q31_t)0x1b785409, (q31_t)0x348cf190, (q31_t)0x1b82a638, (q31_t)0x34941cbf,
+    (q31_t)0x1b8cf9cf, (q31_t)0x349b45e7, (q31_t)0x1b974ece, (q31_t)0x34a26d08,
+    (q31_t)0x1ba1a534, (q31_t)0x34a99221, (q31_t)0x1babfd01, (q31_t)0x34b0b533,
+    (q31_t)0x1bb65634, (q31_t)0x34b7d63c, (q31_t)0x1bc0b0ce, (q31_t)0x34bef53d,
+    (q31_t)0x1bcb0cce, (q31_t)0x34c61236, (q31_t)0x1bd56a32, (q31_t)0x34cd2d26,
+    (q31_t)0x1bdfc8fc, (q31_t)0x34d4460c, (q31_t)0x1bea292b, (q31_t)0x34db5cea,
+    (q31_t)0x1bf48abd, (q31_t)0x34e271bd, (q31_t)0x1bfeedb3, (q31_t)0x34e98487,
+    (q31_t)0x1c09520d, (q31_t)0x34f09546, (q31_t)0x1c13b7c9, (q31_t)0x34f7a3fb,
+    (q31_t)0x1c1e1ee9, (q31_t)0x34feb0a5, (q31_t)0x1c28876a, (q31_t)0x3505bb44,
+    (q31_t)0x1c32f14d, (q31_t)0x350cc3d8, (q31_t)0x1c3d5c91, (q31_t)0x3513ca60,
+    (q31_t)0x1c47c936, (q31_t)0x351acedd, (q31_t)0x1c52373c, (q31_t)0x3521d14d,
+    (q31_t)0x1c5ca6a2, (q31_t)0x3528d1b1, (q31_t)0x1c671768, (q31_t)0x352fd008,
+    (q31_t)0x1c71898d, (q31_t)0x3536cc52, (q31_t)0x1c7bfd11, (q31_t)0x353dc68f,
+    (q31_t)0x1c8671f3, (q31_t)0x3544bebf, (q31_t)0x1c90e834, (q31_t)0x354bb4e1,
+    (q31_t)0x1c9b5fd2, (q31_t)0x3552a8f4, (q31_t)0x1ca5d8cd, (q31_t)0x35599afa,
+    (q31_t)0x1cb05326, (q31_t)0x35608af1, (q31_t)0x1cbacedb, (q31_t)0x356778d9,
+    (q31_t)0x1cc54bec, (q31_t)0x356e64b2, (q31_t)0x1ccfca59, (q31_t)0x35754e7c,
+    (q31_t)0x1cda4a21, (q31_t)0x357c3636, (q31_t)0x1ce4cb44, (q31_t)0x35831be0,
+    (q31_t)0x1cef4dc2, (q31_t)0x3589ff7a, (q31_t)0x1cf9d199, (q31_t)0x3590e104,
+    (q31_t)0x1d0456ca, (q31_t)0x3597c07d, (q31_t)0x1d0edd55, (q31_t)0x359e9de5,
+    (q31_t)0x1d196538, (q31_t)0x35a5793c, (q31_t)0x1d23ee74, (q31_t)0x35ac5282,
+    (q31_t)0x1d2e7908, (q31_t)0x35b329b5, (q31_t)0x1d3904f4, (q31_t)0x35b9fed7,
+    (q31_t)0x1d439236, (q31_t)0x35c0d1e7, (q31_t)0x1d4e20d0, (q31_t)0x35c7a2e3,
+    (q31_t)0x1d58b0c0, (q31_t)0x35ce71ce, (q31_t)0x1d634206, (q31_t)0x35d53ea5,
+    (q31_t)0x1d6dd4a2, (q31_t)0x35dc0968, (q31_t)0x1d786892, (q31_t)0x35e2d219,
+    (q31_t)0x1d82fdd8, (q31_t)0x35e998b5, (q31_t)0x1d8d9472, (q31_t)0x35f05d3d,
+    (q31_t)0x1d982c60, (q31_t)0x35f71fb1, (q31_t)0x1da2c5a2, (q31_t)0x35fde011,
+    (q31_t)0x1dad6036, (q31_t)0x36049e5b, (q31_t)0x1db7fc1e, (q31_t)0x360b5a90,
+    (q31_t)0x1dc29958, (q31_t)0x361214b0, (q31_t)0x1dcd37e4, (q31_t)0x3618ccba,
+    (q31_t)0x1dd7d7c1, (q31_t)0x361f82af, (q31_t)0x1de278ef, (q31_t)0x3626368d,
+    (q31_t)0x1ded1b6e, (q31_t)0x362ce855, (q31_t)0x1df7bf3e, (q31_t)0x36339806,
+    (q31_t)0x1e02645d, (q31_t)0x363a45a0, (q31_t)0x1e0d0acc, (q31_t)0x3640f123,
+    (q31_t)0x1e17b28a, (q31_t)0x36479a8e, (q31_t)0x1e225b96, (q31_t)0x364e41e2,
+    (q31_t)0x1e2d05f1, (q31_t)0x3654e71d, (q31_t)0x1e37b199, (q31_t)0x365b8a41,
+    (q31_t)0x1e425e8f, (q31_t)0x36622b4c, (q31_t)0x1e4d0cd2, (q31_t)0x3668ca3e,
+    (q31_t)0x1e57bc62, (q31_t)0x366f6717, (q31_t)0x1e626d3e, (q31_t)0x367601d7,
+    (q31_t)0x1e6d1f65, (q31_t)0x367c9a7e, (q31_t)0x1e77d2d8, (q31_t)0x3683310b,
+    (q31_t)0x1e828796, (q31_t)0x3689c57d, (q31_t)0x1e8d3d9e, (q31_t)0x369057d6,
+    (q31_t)0x1e97f4f1, (q31_t)0x3696e814, (q31_t)0x1ea2ad8d, (q31_t)0x369d7637,
+    (q31_t)0x1ead6773, (q31_t)0x36a4023f, (q31_t)0x1eb822a1, (q31_t)0x36aa8c2c,
+    (q31_t)0x1ec2df18, (q31_t)0x36b113fd, (q31_t)0x1ecd9cd7, (q31_t)0x36b799b3,
+    (q31_t)0x1ed85bdd, (q31_t)0x36be1d4c, (q31_t)0x1ee31c2b, (q31_t)0x36c49ec9,
+    (q31_t)0x1eedddc0, (q31_t)0x36cb1e2a, (q31_t)0x1ef8a09b, (q31_t)0x36d19b6e,
+    (q31_t)0x1f0364bc, (q31_t)0x36d81695, (q31_t)0x1f0e2a22, (q31_t)0x36de8f9e,
+    (q31_t)0x1f18f0ce, (q31_t)0x36e5068a, (q31_t)0x1f23b8be, (q31_t)0x36eb7b58,
+    (q31_t)0x1f2e81f3, (q31_t)0x36f1ee09, (q31_t)0x1f394c6b, (q31_t)0x36f85e9a,
+    (q31_t)0x1f441828, (q31_t)0x36fecd0e, (q31_t)0x1f4ee527, (q31_t)0x37053962,
+    (q31_t)0x1f59b369, (q31_t)0x370ba398, (q31_t)0x1f6482ed, (q31_t)0x37120bae,
+    (q31_t)0x1f6f53b3, (q31_t)0x371871a5, (q31_t)0x1f7a25ba, (q31_t)0x371ed57c,
+    (q31_t)0x1f84f902, (q31_t)0x37253733, (q31_t)0x1f8fcd8b, (q31_t)0x372b96ca,
+    (q31_t)0x1f9aa354, (q31_t)0x3731f440, (q31_t)0x1fa57a5d, (q31_t)0x37384f95,
+    (q31_t)0x1fb052a5, (q31_t)0x373ea8ca, (q31_t)0x1fbb2c2c, (q31_t)0x3744ffdd,
+    (q31_t)0x1fc606f1, (q31_t)0x374b54ce, (q31_t)0x1fd0e2f5, (q31_t)0x3751a79e,
+    (q31_t)0x1fdbc036, (q31_t)0x3757f84c, (q31_t)0x1fe69eb4, (q31_t)0x375e46d8,
+    (q31_t)0x1ff17e70, (q31_t)0x37649341, (q31_t)0x1ffc5f67, (q31_t)0x376add88,
+    (q31_t)0x2007419b, (q31_t)0x377125ac, (q31_t)0x2012250a, (q31_t)0x37776bac,
+    (q31_t)0x201d09b4, (q31_t)0x377daf89, (q31_t)0x2027ef99, (q31_t)0x3783f143,
+    (q31_t)0x2032d6b8, (q31_t)0x378a30d8, (q31_t)0x203dbf11, (q31_t)0x37906e49,
+    (q31_t)0x2048a8a4, (q31_t)0x3796a996, (q31_t)0x2053936f, (q31_t)0x379ce2be,
+    (q31_t)0x205e7f74, (q31_t)0x37a319c2, (q31_t)0x20696cb0, (q31_t)0x37a94ea0,
+    (q31_t)0x20745b24, (q31_t)0x37af8159, (q31_t)0x207f4acf, (q31_t)0x37b5b1ec,
+    (q31_t)0x208a3bb2, (q31_t)0x37bbe05a, (q31_t)0x20952dcb, (q31_t)0x37c20ca1,
+    (q31_t)0x20a0211a, (q31_t)0x37c836c2, (q31_t)0x20ab159e, (q31_t)0x37ce5ebd,
+    (q31_t)0x20b60b58, (q31_t)0x37d48490, (q31_t)0x20c10247, (q31_t)0x37daa83d,
+    (q31_t)0x20cbfa6a, (q31_t)0x37e0c9c3, (q31_t)0x20d6f3c1, (q31_t)0x37e6e921,
+    (q31_t)0x20e1ee4b, (q31_t)0x37ed0657, (q31_t)0x20ecea09, (q31_t)0x37f32165,
+    (q31_t)0x20f7e6f9, (q31_t)0x37f93a4b, (q31_t)0x2102e51c, (q31_t)0x37ff5109,
+    (q31_t)0x210de470, (q31_t)0x3805659e, (q31_t)0x2118e4f6, (q31_t)0x380b780a,
+    (q31_t)0x2123e6ad, (q31_t)0x3811884d, (q31_t)0x212ee995, (q31_t)0x38179666,
+    (q31_t)0x2139edac, (q31_t)0x381da256, (q31_t)0x2144f2f3, (q31_t)0x3823ac1d,
+    (q31_t)0x214ff96a, (q31_t)0x3829b3b9, (q31_t)0x215b0110, (q31_t)0x382fb92a,
+    (q31_t)0x216609e3, (q31_t)0x3835bc71, (q31_t)0x217113e5, (q31_t)0x383bbd8e,
+    (q31_t)0x217c1f15, (q31_t)0x3841bc7f, (q31_t)0x21872b72, (q31_t)0x3847b946,
+    (q31_t)0x219238fb, (q31_t)0x384db3e0, (q31_t)0x219d47b1, (q31_t)0x3853ac4f,
+    (q31_t)0x21a85793, (q31_t)0x3859a292, (q31_t)0x21b368a0, (q31_t)0x385f96a9,
+    (q31_t)0x21be7ad8, (q31_t)0x38658894, (q31_t)0x21c98e3b, (q31_t)0x386b7852,
+    (q31_t)0x21d4a2c8, (q31_t)0x387165e3, (q31_t)0x21dfb87f, (q31_t)0x38775147,
+    (q31_t)0x21eacf5f, (q31_t)0x387d3a7e, (q31_t)0x21f5e768, (q31_t)0x38832187,
+    (q31_t)0x22010099, (q31_t)0x38890663, (q31_t)0x220c1af3, (q31_t)0x388ee910,
+    (q31_t)0x22173674, (q31_t)0x3894c98f, (q31_t)0x2222531c, (q31_t)0x389aa7e0,
+    (q31_t)0x222d70eb, (q31_t)0x38a08402, (q31_t)0x22388fe1, (q31_t)0x38a65df6,
+    (q31_t)0x2243affc, (q31_t)0x38ac35ba, (q31_t)0x224ed13d, (q31_t)0x38b20b4f,
+    (q31_t)0x2259f3a3, (q31_t)0x38b7deb4, (q31_t)0x2265172e, (q31_t)0x38bdafea,
+    (q31_t)0x22703bdc, (q31_t)0x38c37eef, (q31_t)0x227b61af, (q31_t)0x38c94bc4,
+    (q31_t)0x228688a4, (q31_t)0x38cf1669, (q31_t)0x2291b0bd, (q31_t)0x38d4dedd,
+    (q31_t)0x229cd9f8, (q31_t)0x38daa520, (q31_t)0x22a80456, (q31_t)0x38e06932,
+    (q31_t)0x22b32fd4, (q31_t)0x38e62b13, (q31_t)0x22be5c74, (q31_t)0x38ebeac2,
+    (q31_t)0x22c98a35, (q31_t)0x38f1a840, (q31_t)0x22d4b916, (q31_t)0x38f7638b,
+    (q31_t)0x22dfe917, (q31_t)0x38fd1ca4, (q31_t)0x22eb1a37, (q31_t)0x3902d38b,
+    (q31_t)0x22f64c77, (q31_t)0x3908883f, (q31_t)0x23017fd5, (q31_t)0x390e3ac0,
+    (q31_t)0x230cb451, (q31_t)0x3913eb0e, (q31_t)0x2317e9eb, (q31_t)0x39199929,
+    (q31_t)0x232320a2, (q31_t)0x391f4510, (q31_t)0x232e5876, (q31_t)0x3924eec3,
+    (q31_t)0x23399167, (q31_t)0x392a9642, (q31_t)0x2344cb73, (q31_t)0x39303b8e,
+    (q31_t)0x2350069b, (q31_t)0x3935dea4, (q31_t)0x235b42df, (q31_t)0x393b7f86,
+    (q31_t)0x2366803c, (q31_t)0x39411e33, (q31_t)0x2371beb5, (q31_t)0x3946baac,
+    (q31_t)0x237cfe47, (q31_t)0x394c54ee, (q31_t)0x23883ef2, (q31_t)0x3951ecfc,
+    (q31_t)0x239380b6, (q31_t)0x395782d3, (q31_t)0x239ec393, (q31_t)0x395d1675,
+    (q31_t)0x23aa0788, (q31_t)0x3962a7e0, (q31_t)0x23b54c95, (q31_t)0x39683715,
+    (q31_t)0x23c092b9, (q31_t)0x396dc414, (q31_t)0x23cbd9f4, (q31_t)0x39734edc,
+    (q31_t)0x23d72245, (q31_t)0x3978d76c, (q31_t)0x23e26bac, (q31_t)0x397e5dc6,
+    (q31_t)0x23edb628, (q31_t)0x3983e1e8, (q31_t)0x23f901ba, (q31_t)0x398963d2,
+    (q31_t)0x24044e60, (q31_t)0x398ee385, (q31_t)0x240f9c1a, (q31_t)0x399460ff,
+    (q31_t)0x241aeae8, (q31_t)0x3999dc42, (q31_t)0x24263ac9, (q31_t)0x399f554b,
+    (q31_t)0x24318bbe, (q31_t)0x39a4cc1c, (q31_t)0x243cddc4, (q31_t)0x39aa40b4,
+    (q31_t)0x244830dd, (q31_t)0x39afb313, (q31_t)0x24538507, (q31_t)0x39b52339,
+    (q31_t)0x245eda43, (q31_t)0x39ba9125, (q31_t)0x246a308f, (q31_t)0x39bffcd7,
+    (q31_t)0x247587eb, (q31_t)0x39c5664f, (q31_t)0x2480e057, (q31_t)0x39cacd8d,
+    (q31_t)0x248c39d3, (q31_t)0x39d03291, (q31_t)0x2497945d, (q31_t)0x39d5955a,
+    (q31_t)0x24a2eff6, (q31_t)0x39daf5e8, (q31_t)0x24ae4c9d, (q31_t)0x39e0543c,
+    (q31_t)0x24b9aa52, (q31_t)0x39e5b054, (q31_t)0x24c50914, (q31_t)0x39eb0a31,
+    (q31_t)0x24d068e2, (q31_t)0x39f061d2, (q31_t)0x24dbc9bd, (q31_t)0x39f5b737,
+    (q31_t)0x24e72ba4, (q31_t)0x39fb0a60, (q31_t)0x24f28e96, (q31_t)0x3a005b4d,
+    (q31_t)0x24fdf294, (q31_t)0x3a05a9fd, (q31_t)0x2509579b, (q31_t)0x3a0af671,
+    (q31_t)0x2514bdad, (q31_t)0x3a1040a8, (q31_t)0x252024c9, (q31_t)0x3a1588a2,
+    (q31_t)0x252b8cee, (q31_t)0x3a1ace5f, (q31_t)0x2536f61b, (q31_t)0x3a2011de,
+    (q31_t)0x25426051, (q31_t)0x3a25531f, (q31_t)0x254dcb8f, (q31_t)0x3a2a9223,
+    (q31_t)0x255937d5, (q31_t)0x3a2fcee8, (q31_t)0x2564a521, (q31_t)0x3a350970,
+    (q31_t)0x25701374, (q31_t)0x3a3a41b9, (q31_t)0x257b82cd, (q31_t)0x3a3f77c3,
+    (q31_t)0x2586f32c, (q31_t)0x3a44ab8e, (q31_t)0x25926490, (q31_t)0x3a49dd1a,
+    (q31_t)0x259dd6f9, (q31_t)0x3a4f0c67, (q31_t)0x25a94a67, (q31_t)0x3a543974,
+    (q31_t)0x25b4bed8, (q31_t)0x3a596442, (q31_t)0x25c0344d, (q31_t)0x3a5e8cd0,
+    (q31_t)0x25cbaac5, (q31_t)0x3a63b31d, (q31_t)0x25d72240, (q31_t)0x3a68d72b,
+    (q31_t)0x25e29abc, (q31_t)0x3a6df8f8, (q31_t)0x25ee143b, (q31_t)0x3a731884,
+    (q31_t)0x25f98ebb, (q31_t)0x3a7835cf, (q31_t)0x26050a3b, (q31_t)0x3a7d50da,
+    (q31_t)0x261086bc, (q31_t)0x3a8269a3, (q31_t)0x261c043d, (q31_t)0x3a87802a,
+    (q31_t)0x262782be, (q31_t)0x3a8c9470, (q31_t)0x2633023e, (q31_t)0x3a91a674,
+    (q31_t)0x263e82bc, (q31_t)0x3a96b636, (q31_t)0x264a0438, (q31_t)0x3a9bc3b6,
+    (q31_t)0x265586b3, (q31_t)0x3aa0cef3, (q31_t)0x26610a2a, (q31_t)0x3aa5d7ee,
+    (q31_t)0x266c8e9f, (q31_t)0x3aaadea6, (q31_t)0x26781410, (q31_t)0x3aafe31b,
+    (q31_t)0x26839a7c, (q31_t)0x3ab4e54c, (q31_t)0x268f21e5, (q31_t)0x3ab9e53a,
+    (q31_t)0x269aaa48, (q31_t)0x3abee2e5, (q31_t)0x26a633a6, (q31_t)0x3ac3de4c,
+    (q31_t)0x26b1bdff, (q31_t)0x3ac8d76f, (q31_t)0x26bd4951, (q31_t)0x3acdce4d,
+    (q31_t)0x26c8d59c, (q31_t)0x3ad2c2e8, (q31_t)0x26d462e1, (q31_t)0x3ad7b53d,
+    (q31_t)0x26dff11d, (q31_t)0x3adca54e, (q31_t)0x26eb8052, (q31_t)0x3ae1931a,
+    (q31_t)0x26f7107e, (q31_t)0x3ae67ea1, (q31_t)0x2702a1a1, (q31_t)0x3aeb67e3,
+    (q31_t)0x270e33bb, (q31_t)0x3af04edf, (q31_t)0x2719c6cb, (q31_t)0x3af53395,
+    (q31_t)0x27255ad1, (q31_t)0x3afa1605, (q31_t)0x2730efcc, (q31_t)0x3afef630,
+    (q31_t)0x273c85bc, (q31_t)0x3b03d414, (q31_t)0x27481ca1, (q31_t)0x3b08afb2,
+    (q31_t)0x2753b479, (q31_t)0x3b0d8909, (q31_t)0x275f4d45, (q31_t)0x3b126019,
+    (q31_t)0x276ae704, (q31_t)0x3b1734e2, (q31_t)0x277681b6, (q31_t)0x3b1c0764,
+    (q31_t)0x27821d59, (q31_t)0x3b20d79e, (q31_t)0x278db9ef, (q31_t)0x3b25a591,
+    (q31_t)0x27995776, (q31_t)0x3b2a713d, (q31_t)0x27a4f5ed, (q31_t)0x3b2f3aa0,
+    (q31_t)0x27b09555, (q31_t)0x3b3401bb, (q31_t)0x27bc35ad, (q31_t)0x3b38c68e,
+    (q31_t)0x27c7d6f4, (q31_t)0x3b3d8918, (q31_t)0x27d3792b, (q31_t)0x3b42495a,
+    (q31_t)0x27df1c50, (q31_t)0x3b470753, (q31_t)0x27eac063, (q31_t)0x3b4bc303,
+    (q31_t)0x27f66564, (q31_t)0x3b507c69, (q31_t)0x28020b52, (q31_t)0x3b553386,
+    (q31_t)0x280db22d, (q31_t)0x3b59e85a, (q31_t)0x281959f4, (q31_t)0x3b5e9ae4,
+    (q31_t)0x282502a7, (q31_t)0x3b634b23, (q31_t)0x2830ac45, (q31_t)0x3b67f919,
+    (q31_t)0x283c56cf, (q31_t)0x3b6ca4c4, (q31_t)0x28480243, (q31_t)0x3b714e25,
+    (q31_t)0x2853aea1, (q31_t)0x3b75f53c, (q31_t)0x285f5be9, (q31_t)0x3b7a9a07,
+    (q31_t)0x286b0a1a, (q31_t)0x3b7f3c87, (q31_t)0x2876b934, (q31_t)0x3b83dcbc,
+    (q31_t)0x28826936, (q31_t)0x3b887aa6, (q31_t)0x288e1a20, (q31_t)0x3b8d1644,
+    (q31_t)0x2899cbf1, (q31_t)0x3b91af97, (q31_t)0x28a57ea9, (q31_t)0x3b96469d,
+    (q31_t)0x28b13248, (q31_t)0x3b9adb57, (q31_t)0x28bce6cd, (q31_t)0x3b9f6dc5,
+    (q31_t)0x28c89c37, (q31_t)0x3ba3fde7, (q31_t)0x28d45286, (q31_t)0x3ba88bbc,
+    (q31_t)0x28e009ba, (q31_t)0x3bad1744, (q31_t)0x28ebc1d3, (q31_t)0x3bb1a080,
+    (q31_t)0x28f77acf, (q31_t)0x3bb6276e, (q31_t)0x290334af, (q31_t)0x3bbaac0e,
+    (q31_t)0x290eef71, (q31_t)0x3bbf2e62, (q31_t)0x291aab16, (q31_t)0x3bc3ae67,
+    (q31_t)0x2926679c, (q31_t)0x3bc82c1f, (q31_t)0x29322505, (q31_t)0x3bcca789,
+    (q31_t)0x293de34e, (q31_t)0x3bd120a4, (q31_t)0x2949a278, (q31_t)0x3bd59771,
+    (q31_t)0x29556282, (q31_t)0x3bda0bf0, (q31_t)0x2961236c, (q31_t)0x3bde7e20,
+    (q31_t)0x296ce535, (q31_t)0x3be2ee01, (q31_t)0x2978a7dd, (q31_t)0x3be75b93,
+    (q31_t)0x29846b63, (q31_t)0x3bebc6d5, (q31_t)0x29902fc7, (q31_t)0x3bf02fc9,
+    (q31_t)0x299bf509, (q31_t)0x3bf4966c, (q31_t)0x29a7bb28, (q31_t)0x3bf8fac0,
+    (q31_t)0x29b38223, (q31_t)0x3bfd5cc4, (q31_t)0x29bf49fa, (q31_t)0x3c01bc78,
+    (q31_t)0x29cb12ad, (q31_t)0x3c0619dc, (q31_t)0x29d6dc3b, (q31_t)0x3c0a74f0,
+    (q31_t)0x29e2a6a3, (q31_t)0x3c0ecdb2, (q31_t)0x29ee71e6, (q31_t)0x3c132424,
+    (q31_t)0x29fa3e03, (q31_t)0x3c177845, (q31_t)0x2a060af9, (q31_t)0x3c1bca16,
+    (q31_t)0x2a11d8c8, (q31_t)0x3c201994, (q31_t)0x2a1da770, (q31_t)0x3c2466c2,
+    (q31_t)0x2a2976ef, (q31_t)0x3c28b19e, (q31_t)0x2a354746, (q31_t)0x3c2cfa28,
+    (q31_t)0x2a411874, (q31_t)0x3c314060, (q31_t)0x2a4cea79, (q31_t)0x3c358446,
+    (q31_t)0x2a58bd54, (q31_t)0x3c39c5da, (q31_t)0x2a649105, (q31_t)0x3c3e051b,
+    (q31_t)0x2a70658a, (q31_t)0x3c42420a, (q31_t)0x2a7c3ae5, (q31_t)0x3c467ca6,
+    (q31_t)0x2a881114, (q31_t)0x3c4ab4ef, (q31_t)0x2a93e817, (q31_t)0x3c4eeae5,
+    (q31_t)0x2a9fbfed, (q31_t)0x3c531e88, (q31_t)0x2aab9896, (q31_t)0x3c574fd8,
+    (q31_t)0x2ab77212, (q31_t)0x3c5b7ed4, (q31_t)0x2ac34c60, (q31_t)0x3c5fab7c,
+    (q31_t)0x2acf277f, (q31_t)0x3c63d5d1, (q31_t)0x2adb0370, (q31_t)0x3c67fdd1,
+    (q31_t)0x2ae6e031, (q31_t)0x3c6c237e, (q31_t)0x2af2bdc3, (q31_t)0x3c7046d6,
+    (q31_t)0x2afe9c24, (q31_t)0x3c7467d9, (q31_t)0x2b0a7b54, (q31_t)0x3c788688,
+    (q31_t)0x2b165b54, (q31_t)0x3c7ca2e2, (q31_t)0x2b223c22, (q31_t)0x3c80bce7,
+    (q31_t)0x2b2e1dbe, (q31_t)0x3c84d496, (q31_t)0x2b3a0027, (q31_t)0x3c88e9f1,
+    (q31_t)0x2b45e35d, (q31_t)0x3c8cfcf6, (q31_t)0x2b51c760, (q31_t)0x3c910da5,
+    (q31_t)0x2b5dac2f, (q31_t)0x3c951bff, (q31_t)0x2b6991ca, (q31_t)0x3c992803,
+    (q31_t)0x2b75782f, (q31_t)0x3c9d31b0, (q31_t)0x2b815f60, (q31_t)0x3ca13908,
+    (q31_t)0x2b8d475b, (q31_t)0x3ca53e09, (q31_t)0x2b99301f, (q31_t)0x3ca940b3,
+    (q31_t)0x2ba519ad, (q31_t)0x3cad4107, (q31_t)0x2bb10404, (q31_t)0x3cb13f04,
+    (q31_t)0x2bbcef23, (q31_t)0x3cb53aaa, (q31_t)0x2bc8db0b, (q31_t)0x3cb933f9,
+    (q31_t)0x2bd4c7ba, (q31_t)0x3cbd2af0, (q31_t)0x2be0b52f, (q31_t)0x3cc11f90,
+    (q31_t)0x2beca36c, (q31_t)0x3cc511d9, (q31_t)0x2bf8926f, (q31_t)0x3cc901c9,
+    (q31_t)0x2c048237, (q31_t)0x3cccef62, (q31_t)0x2c1072c4, (q31_t)0x3cd0daa2,
+    (q31_t)0x2c1c6417, (q31_t)0x3cd4c38b, (q31_t)0x2c28562d, (q31_t)0x3cd8aa1b,
+    (q31_t)0x2c344908, (q31_t)0x3cdc8e52, (q31_t)0x2c403ca5, (q31_t)0x3ce07031,
+    (q31_t)0x2c4c3106, (q31_t)0x3ce44fb7, (q31_t)0x2c582629, (q31_t)0x3ce82ce4,
+    (q31_t)0x2c641c0e, (q31_t)0x3cec07b8, (q31_t)0x2c7012b5, (q31_t)0x3cefe032,
+    (q31_t)0x2c7c0a1d, (q31_t)0x3cf3b653, (q31_t)0x2c880245, (q31_t)0x3cf78a1b,
+    (q31_t)0x2c93fb2e, (q31_t)0x3cfb5b89, (q31_t)0x2c9ff4d6, (q31_t)0x3cff2a9d,
+    (q31_t)0x2cabef3d, (q31_t)0x3d02f757, (q31_t)0x2cb7ea63, (q31_t)0x3d06c1b6,
+    (q31_t)0x2cc3e648, (q31_t)0x3d0a89bc, (q31_t)0x2ccfe2ea, (q31_t)0x3d0e4f67,
+    (q31_t)0x2cdbe04a, (q31_t)0x3d1212b7, (q31_t)0x2ce7de66, (q31_t)0x3d15d3ad,
+    (q31_t)0x2cf3dd3f, (q31_t)0x3d199248, (q31_t)0x2cffdcd4, (q31_t)0x3d1d4e88,
+    (q31_t)0x2d0bdd25, (q31_t)0x3d21086c, (q31_t)0x2d17de31, (q31_t)0x3d24bff6,
+    (q31_t)0x2d23dff7, (q31_t)0x3d287523, (q31_t)0x2d2fe277, (q31_t)0x3d2c27f6,
+    (q31_t)0x2d3be5b1, (q31_t)0x3d2fd86c, (q31_t)0x2d47e9a5, (q31_t)0x3d338687,
+    (q31_t)0x2d53ee51, (q31_t)0x3d373245, (q31_t)0x2d5ff3b5, (q31_t)0x3d3adba7,
+    (q31_t)0x2d6bf9d1, (q31_t)0x3d3e82ae, (q31_t)0x2d7800a5, (q31_t)0x3d422757,
+    (q31_t)0x2d84082f, (q31_t)0x3d45c9a4, (q31_t)0x2d901070, (q31_t)0x3d496994,
+    (q31_t)0x2d9c1967, (q31_t)0x3d4d0728, (q31_t)0x2da82313, (q31_t)0x3d50a25e,
+    (q31_t)0x2db42d74, (q31_t)0x3d543b37, (q31_t)0x2dc0388a, (q31_t)0x3d57d1b3,
+    (q31_t)0x2dcc4454, (q31_t)0x3d5b65d2, (q31_t)0x2dd850d2, (q31_t)0x3d5ef793,
+    (q31_t)0x2de45e03, (q31_t)0x3d6286f6, (q31_t)0x2df06be6, (q31_t)0x3d6613fb,
+    (q31_t)0x2dfc7a7c, (q31_t)0x3d699ea3, (q31_t)0x2e0889c4, (q31_t)0x3d6d26ec,
+    (q31_t)0x2e1499bd, (q31_t)0x3d70acd7, (q31_t)0x2e20aa67, (q31_t)0x3d743064,
+    (q31_t)0x2e2cbbc1, (q31_t)0x3d77b192, (q31_t)0x2e38cdcb, (q31_t)0x3d7b3061,
+    (q31_t)0x2e44e084, (q31_t)0x3d7eacd2, (q31_t)0x2e50f3ed, (q31_t)0x3d8226e4,
+    (q31_t)0x2e5d0804, (q31_t)0x3d859e96, (q31_t)0x2e691cc9, (q31_t)0x3d8913ea,
+    (q31_t)0x2e75323c, (q31_t)0x3d8c86de, (q31_t)0x2e81485c, (q31_t)0x3d8ff772,
+    (q31_t)0x2e8d5f29, (q31_t)0x3d9365a8, (q31_t)0x2e9976a1, (q31_t)0x3d96d17d,
+    (q31_t)0x2ea58ec6, (q31_t)0x3d9a3af2, (q31_t)0x2eb1a796, (q31_t)0x3d9da208,
+    (q31_t)0x2ebdc110, (q31_t)0x3da106bd, (q31_t)0x2ec9db35, (q31_t)0x3da46912,
+    (q31_t)0x2ed5f604, (q31_t)0x3da7c907, (q31_t)0x2ee2117c, (q31_t)0x3dab269b,
+    (q31_t)0x2eee2d9d, (q31_t)0x3dae81cf, (q31_t)0x2efa4a67, (q31_t)0x3db1daa2,
+    (q31_t)0x2f0667d9, (q31_t)0x3db53113, (q31_t)0x2f1285f2, (q31_t)0x3db88524,
+    (q31_t)0x2f1ea4b2, (q31_t)0x3dbbd6d4, (q31_t)0x2f2ac419, (q31_t)0x3dbf2622,
+    (q31_t)0x2f36e426, (q31_t)0x3dc2730f, (q31_t)0x2f4304d8, (q31_t)0x3dc5bd9b,
+    (q31_t)0x2f4f2630, (q31_t)0x3dc905c5, (q31_t)0x2f5b482d, (q31_t)0x3dcc4b8d,
+    (q31_t)0x2f676ace, (q31_t)0x3dcf8ef3, (q31_t)0x2f738e12, (q31_t)0x3dd2cff7,
+    (q31_t)0x2f7fb1fa, (q31_t)0x3dd60e99, (q31_t)0x2f8bd685, (q31_t)0x3dd94ad8,
+    (q31_t)0x2f97fbb2, (q31_t)0x3ddc84b5, (q31_t)0x2fa42181, (q31_t)0x3ddfbc30,
+    (q31_t)0x2fb047f2, (q31_t)0x3de2f148, (q31_t)0x2fbc6f03, (q31_t)0x3de623fd,
+    (q31_t)0x2fc896b5, (q31_t)0x3de9544f, (q31_t)0x2fd4bf08, (q31_t)0x3dec823e,
+    (q31_t)0x2fe0e7f9, (q31_t)0x3defadca, (q31_t)0x2fed118a, (q31_t)0x3df2d6f3,
+    (q31_t)0x2ff93bba, (q31_t)0x3df5fdb8, (q31_t)0x30056687, (q31_t)0x3df9221a,
+    (q31_t)0x301191f3, (q31_t)0x3dfc4418, (q31_t)0x301dbdfb, (q31_t)0x3dff63b2,
+    (q31_t)0x3029eaa1, (q31_t)0x3e0280e9, (q31_t)0x303617e2, (q31_t)0x3e059bbb,
+    (q31_t)0x304245c0, (q31_t)0x3e08b42a, (q31_t)0x304e7438, (q31_t)0x3e0bca34,
+    (q31_t)0x305aa34c, (q31_t)0x3e0eddd9, (q31_t)0x3066d2fa, (q31_t)0x3e11ef1b,
+    (q31_t)0x30730342, (q31_t)0x3e14fdf7, (q31_t)0x307f3424, (q31_t)0x3e180a6f,
+    (q31_t)0x308b659f, (q31_t)0x3e1b1482, (q31_t)0x309797b2, (q31_t)0x3e1e1c30,
+    (q31_t)0x30a3ca5d, (q31_t)0x3e212179, (q31_t)0x30affda0, (q31_t)0x3e24245d,
+    (q31_t)0x30bc317a, (q31_t)0x3e2724db, (q31_t)0x30c865ea, (q31_t)0x3e2a22f4,
+    (q31_t)0x30d49af1, (q31_t)0x3e2d1ea8, (q31_t)0x30e0d08d, (q31_t)0x3e3017f6,
+    (q31_t)0x30ed06bf, (q31_t)0x3e330ede, (q31_t)0x30f93d86, (q31_t)0x3e360360,
+    (q31_t)0x310574e0, (q31_t)0x3e38f57c, (q31_t)0x3111accf, (q31_t)0x3e3be532,
+    (q31_t)0x311de551, (q31_t)0x3e3ed282, (q31_t)0x312a1e66, (q31_t)0x3e41bd6c,
+    (q31_t)0x3136580d, (q31_t)0x3e44a5ef, (q31_t)0x31429247, (q31_t)0x3e478c0b,
+    (q31_t)0x314ecd11, (q31_t)0x3e4a6fc1, (q31_t)0x315b086d, (q31_t)0x3e4d5110,
+    (q31_t)0x31674459, (q31_t)0x3e502ff9, (q31_t)0x317380d6, (q31_t)0x3e530c7a,
+    (q31_t)0x317fbde2, (q31_t)0x3e55e694, (q31_t)0x318bfb7d, (q31_t)0x3e58be47,
+    (q31_t)0x319839a6, (q31_t)0x3e5b9392, (q31_t)0x31a4785e, (q31_t)0x3e5e6676,
+    (q31_t)0x31b0b7a4, (q31_t)0x3e6136f3, (q31_t)0x31bcf777, (q31_t)0x3e640507,
+    (q31_t)0x31c937d6, (q31_t)0x3e66d0b4, (q31_t)0x31d578c2, (q31_t)0x3e6999fa,
+    (q31_t)0x31e1ba3a, (q31_t)0x3e6c60d7, (q31_t)0x31edfc3d, (q31_t)0x3e6f254c,
+    (q31_t)0x31fa3ecb, (q31_t)0x3e71e759, (q31_t)0x320681e3, (q31_t)0x3e74a6fd,
+    (q31_t)0x3212c585, (q31_t)0x3e77643a, (q31_t)0x321f09b1, (q31_t)0x3e7a1f0d,
+    (q31_t)0x322b4e66, (q31_t)0x3e7cd778, (q31_t)0x323793a3, (q31_t)0x3e7f8d7b,
+    (q31_t)0x3243d968, (q31_t)0x3e824114, (q31_t)0x32501fb5, (q31_t)0x3e84f245,
+    (q31_t)0x325c6688, (q31_t)0x3e87a10c, (q31_t)0x3268ade3, (q31_t)0x3e8a4d6a,
+    (q31_t)0x3274f5c3, (q31_t)0x3e8cf75f, (q31_t)0x32813e2a, (q31_t)0x3e8f9eeb,
+    (q31_t)0x328d8715, (q31_t)0x3e92440d, (q31_t)0x3299d085, (q31_t)0x3e94e6c6,
+    (q31_t)0x32a61a7a, (q31_t)0x3e978715, (q31_t)0x32b264f2, (q31_t)0x3e9a24fb,
+    (q31_t)0x32beafed, (q31_t)0x3e9cc076, (q31_t)0x32cafb6b, (q31_t)0x3e9f5988,
+    (q31_t)0x32d7476c, (q31_t)0x3ea1f02f, (q31_t)0x32e393ef, (q31_t)0x3ea4846c,
+    (q31_t)0x32efe0f2, (q31_t)0x3ea7163f, (q31_t)0x32fc2e77, (q31_t)0x3ea9a5a8,
+    (q31_t)0x33087c7d, (q31_t)0x3eac32a6, (q31_t)0x3314cb02, (q31_t)0x3eaebd3a,
+    (q31_t)0x33211a07, (q31_t)0x3eb14563, (q31_t)0x332d698a, (q31_t)0x3eb3cb21,
+    (q31_t)0x3339b98d, (q31_t)0x3eb64e75, (q31_t)0x33460a0d, (q31_t)0x3eb8cf5d,
+    (q31_t)0x33525b0b, (q31_t)0x3ebb4ddb, (q31_t)0x335eac86, (q31_t)0x3ebdc9ed,
+    (q31_t)0x336afe7e, (q31_t)0x3ec04394, (q31_t)0x337750f2, (q31_t)0x3ec2bad0,
+    (q31_t)0x3383a3e2, (q31_t)0x3ec52fa0, (q31_t)0x338ff74d, (q31_t)0x3ec7a205,
+    (q31_t)0x339c4b32, (q31_t)0x3eca11fe, (q31_t)0x33a89f92, (q31_t)0x3ecc7f8b,
+    (q31_t)0x33b4f46c, (q31_t)0x3eceeaad, (q31_t)0x33c149bf, (q31_t)0x3ed15363,
+    (q31_t)0x33cd9f8b, (q31_t)0x3ed3b9ad, (q31_t)0x33d9f5cf, (q31_t)0x3ed61d8a,
+    (q31_t)0x33e64c8c, (q31_t)0x3ed87efc, (q31_t)0x33f2a3bf, (q31_t)0x3edade01,
+    (q31_t)0x33fefb6a, (q31_t)0x3edd3a9a, (q31_t)0x340b538b, (q31_t)0x3edf94c7,
+    (q31_t)0x3417ac22, (q31_t)0x3ee1ec87, (q31_t)0x3424052f, (q31_t)0x3ee441da,
+    (q31_t)0x34305eb0, (q31_t)0x3ee694c1, (q31_t)0x343cb8a7, (q31_t)0x3ee8e53a,
+    (q31_t)0x34491311, (q31_t)0x3eeb3347, (q31_t)0x34556def, (q31_t)0x3eed7ee7,
+    (q31_t)0x3461c940, (q31_t)0x3eefc81a, (q31_t)0x346e2504, (q31_t)0x3ef20ee0,
+    (q31_t)0x347a8139, (q31_t)0x3ef45338, (q31_t)0x3486dde1, (q31_t)0x3ef69523,
+    (q31_t)0x34933afa, (q31_t)0x3ef8d4a1, (q31_t)0x349f9884, (q31_t)0x3efb11b1,
+    (q31_t)0x34abf67e, (q31_t)0x3efd4c54, (q31_t)0x34b854e7, (q31_t)0x3eff8489,
+    (q31_t)0x34c4b3c0, (q31_t)0x3f01ba50, (q31_t)0x34d11308, (q31_t)0x3f03eda9,
+    (q31_t)0x34dd72be, (q31_t)0x3f061e95, (q31_t)0x34e9d2e3, (q31_t)0x3f084d12,
+    (q31_t)0x34f63374, (q31_t)0x3f0a7921, (q31_t)0x35029473, (q31_t)0x3f0ca2c2,
+    (q31_t)0x350ef5de, (q31_t)0x3f0ec9f5, (q31_t)0x351b57b5, (q31_t)0x3f10eeb9,
+    (q31_t)0x3527b9f7, (q31_t)0x3f13110f, (q31_t)0x35341ca5, (q31_t)0x3f1530f7,
+    (q31_t)0x35407fbd, (q31_t)0x3f174e70, (q31_t)0x354ce33f, (q31_t)0x3f19697a,
+    (q31_t)0x3559472b, (q31_t)0x3f1b8215, (q31_t)0x3565ab80, (q31_t)0x3f1d9842,
+    (q31_t)0x3572103d, (q31_t)0x3f1fabff, (q31_t)0x357e7563, (q31_t)0x3f21bd4e,
+    (q31_t)0x358adaf0, (q31_t)0x3f23cc2e, (q31_t)0x359740e5, (q31_t)0x3f25d89e,
+    (q31_t)0x35a3a740, (q31_t)0x3f27e29f, (q31_t)0x35b00e02, (q31_t)0x3f29ea31,
+    (q31_t)0x35bc7529, (q31_t)0x3f2bef53, (q31_t)0x35c8dcb6, (q31_t)0x3f2df206,
+    (q31_t)0x35d544a7, (q31_t)0x3f2ff24a, (q31_t)0x35e1acfd, (q31_t)0x3f31f01d,
+    (q31_t)0x35ee15b7, (q31_t)0x3f33eb81, (q31_t)0x35fa7ed4, (q31_t)0x3f35e476,
+    (q31_t)0x3606e854, (q31_t)0x3f37dafa, (q31_t)0x36135237, (q31_t)0x3f39cf0e,
+    (q31_t)0x361fbc7b, (q31_t)0x3f3bc0b3, (q31_t)0x362c2721, (q31_t)0x3f3dafe7,
+    (q31_t)0x36389228, (q31_t)0x3f3f9cab, (q31_t)0x3644fd8f, (q31_t)0x3f4186ff,
+    (q31_t)0x36516956, (q31_t)0x3f436ee3, (q31_t)0x365dd57d, (q31_t)0x3f455456,
+    (q31_t)0x366a4203, (q31_t)0x3f473759, (q31_t)0x3676aee8, (q31_t)0x3f4917eb,
+    (q31_t)0x36831c2b, (q31_t)0x3f4af60d, (q31_t)0x368f89cb, (q31_t)0x3f4cd1be,
+    (q31_t)0x369bf7c9, (q31_t)0x3f4eaafe, (q31_t)0x36a86623, (q31_t)0x3f5081cd,
+    (q31_t)0x36b4d4d9, (q31_t)0x3f52562c, (q31_t)0x36c143ec, (q31_t)0x3f54281a,
+    (q31_t)0x36cdb359, (q31_t)0x3f55f796, (q31_t)0x36da2321, (q31_t)0x3f57c4a2,
+    (q31_t)0x36e69344, (q31_t)0x3f598f3c, (q31_t)0x36f303c0, (q31_t)0x3f5b5765,
+    (q31_t)0x36ff7496, (q31_t)0x3f5d1d1d, (q31_t)0x370be5c4, (q31_t)0x3f5ee063,
+    (q31_t)0x3718574b, (q31_t)0x3f60a138, (q31_t)0x3724c92a, (q31_t)0x3f625f9b,
+    (q31_t)0x37313b60, (q31_t)0x3f641b8d, (q31_t)0x373daded, (q31_t)0x3f65d50d,
+    (q31_t)0x374a20d0, (q31_t)0x3f678c1c, (q31_t)0x3756940a, (q31_t)0x3f6940b8,
+    (q31_t)0x37630799, (q31_t)0x3f6af2e3, (q31_t)0x376f7b7d, (q31_t)0x3f6ca29c,
+    (q31_t)0x377befb5, (q31_t)0x3f6e4fe3, (q31_t)0x37886442, (q31_t)0x3f6ffab8,
+    (q31_t)0x3794d922, (q31_t)0x3f71a31b, (q31_t)0x37a14e55, (q31_t)0x3f73490b,
+    (q31_t)0x37adc3db, (q31_t)0x3f74ec8a, (q31_t)0x37ba39b3, (q31_t)0x3f768d96,
+    (q31_t)0x37c6afdc, (q31_t)0x3f782c30, (q31_t)0x37d32657, (q31_t)0x3f79c857,
+    (q31_t)0x37df9d22, (q31_t)0x3f7b620c, (q31_t)0x37ec143e, (q31_t)0x3f7cf94e,
+    (q31_t)0x37f88ba9, (q31_t)0x3f7e8e1e, (q31_t)0x38050364, (q31_t)0x3f80207b,
+    (q31_t)0x38117b6d, (q31_t)0x3f81b065, (q31_t)0x381df3c5, (q31_t)0x3f833ddd,
+    (q31_t)0x382a6c6a, (q31_t)0x3f84c8e2, (q31_t)0x3836e55d, (q31_t)0x3f865174,
+    (q31_t)0x38435e9d, (q31_t)0x3f87d792, (q31_t)0x384fd829, (q31_t)0x3f895b3e,
+    (q31_t)0x385c5201, (q31_t)0x3f8adc77, (q31_t)0x3868cc24, (q31_t)0x3f8c5b3d,
+    (q31_t)0x38754692, (q31_t)0x3f8dd78f, (q31_t)0x3881c14b, (q31_t)0x3f8f516e,
+    (q31_t)0x388e3c4d, (q31_t)0x3f90c8da, (q31_t)0x389ab799, (q31_t)0x3f923dd2,
+    (q31_t)0x38a7332e, (q31_t)0x3f93b058, (q31_t)0x38b3af0c, (q31_t)0x3f952069,
+    (q31_t)0x38c02b31, (q31_t)0x3f968e07, (q31_t)0x38cca79e, (q31_t)0x3f97f932,
+    (q31_t)0x38d92452, (q31_t)0x3f9961e8, (q31_t)0x38e5a14d, (q31_t)0x3f9ac82c,
+    (q31_t)0x38f21e8e, (q31_t)0x3f9c2bfb, (q31_t)0x38fe9c15, (q31_t)0x3f9d8d56,
+    (q31_t)0x390b19e0, (q31_t)0x3f9eec3e, (q31_t)0x391797f0, (q31_t)0x3fa048b2,
+    (q31_t)0x39241645, (q31_t)0x3fa1a2b2, (q31_t)0x393094dd, (q31_t)0x3fa2fa3d,
+    (q31_t)0x393d13b8, (q31_t)0x3fa44f55, (q31_t)0x394992d7, (q31_t)0x3fa5a1f9,
+    (q31_t)0x39561237, (q31_t)0x3fa6f228, (q31_t)0x396291d9, (q31_t)0x3fa83fe3,
+    (q31_t)0x396f11bc, (q31_t)0x3fa98b2a, (q31_t)0x397b91e1, (q31_t)0x3faad3fd,
+    (q31_t)0x39881245, (q31_t)0x3fac1a5b, (q31_t)0x399492ea, (q31_t)0x3fad5e45,
+    (q31_t)0x39a113cd, (q31_t)0x3fae9fbb, (q31_t)0x39ad94f0, (q31_t)0x3fafdebb,
+    (q31_t)0x39ba1651, (q31_t)0x3fb11b48, (q31_t)0x39c697f0, (q31_t)0x3fb2555f,
+    (q31_t)0x39d319cc, (q31_t)0x3fb38d02, (q31_t)0x39df9be6, (q31_t)0x3fb4c231,
+    (q31_t)0x39ec1e3b, (q31_t)0x3fb5f4ea, (q31_t)0x39f8a0cd, (q31_t)0x3fb7252f,
+    (q31_t)0x3a05239a, (q31_t)0x3fb852ff, (q31_t)0x3a11a6a3, (q31_t)0x3fb97e5a,
+    (q31_t)0x3a1e29e5, (q31_t)0x3fbaa740, (q31_t)0x3a2aad62, (q31_t)0x3fbbcdb1,
+    (q31_t)0x3a373119, (q31_t)0x3fbcf1ad, (q31_t)0x3a43b508, (q31_t)0x3fbe1334,
+    (q31_t)0x3a503930, (q31_t)0x3fbf3246, (q31_t)0x3a5cbd91, (q31_t)0x3fc04ee3,
+    (q31_t)0x3a694229, (q31_t)0x3fc1690a, (q31_t)0x3a75c6f8, (q31_t)0x3fc280bc,
+    (q31_t)0x3a824bfd, (q31_t)0x3fc395f9, (q31_t)0x3a8ed139, (q31_t)0x3fc4a8c1,
+    (q31_t)0x3a9b56ab, (q31_t)0x3fc5b913, (q31_t)0x3aa7dc52, (q31_t)0x3fc6c6f0,
+    (q31_t)0x3ab4622d, (q31_t)0x3fc7d258, (q31_t)0x3ac0e83d, (q31_t)0x3fc8db4a,
+    (q31_t)0x3acd6e81, (q31_t)0x3fc9e1c6, (q31_t)0x3ad9f4f8, (q31_t)0x3fcae5cd,
+    (q31_t)0x3ae67ba2, (q31_t)0x3fcbe75e, (q31_t)0x3af3027e, (q31_t)0x3fcce67a,
+    (q31_t)0x3aff898c, (q31_t)0x3fcde320, (q31_t)0x3b0c10cb, (q31_t)0x3fcedd50,
+    (q31_t)0x3b18983b, (q31_t)0x3fcfd50b, (q31_t)0x3b251fdc, (q31_t)0x3fd0ca4f,
+    (q31_t)0x3b31a7ac, (q31_t)0x3fd1bd1e, (q31_t)0x3b3e2fac, (q31_t)0x3fd2ad77,
+    (q31_t)0x3b4ab7db, (q31_t)0x3fd39b5a, (q31_t)0x3b574039, (q31_t)0x3fd486c7,
+    (q31_t)0x3b63c8c4, (q31_t)0x3fd56fbe, (q31_t)0x3b70517d, (q31_t)0x3fd6563f,
+    (q31_t)0x3b7cda63, (q31_t)0x3fd73a4a, (q31_t)0x3b896375, (q31_t)0x3fd81bdf,
+    (q31_t)0x3b95ecb4, (q31_t)0x3fd8fafe, (q31_t)0x3ba2761e, (q31_t)0x3fd9d7a7,
+    (q31_t)0x3baeffb3, (q31_t)0x3fdab1d9, (q31_t)0x3bbb8973, (q31_t)0x3fdb8996,
+    (q31_t)0x3bc8135c, (q31_t)0x3fdc5edc, (q31_t)0x3bd49d70, (q31_t)0x3fdd31ac,
+    (q31_t)0x3be127ac, (q31_t)0x3fde0205, (q31_t)0x3bedb212, (q31_t)0x3fdecfe8,
+    (q31_t)0x3bfa3c9f, (q31_t)0x3fdf9b55, (q31_t)0x3c06c754, (q31_t)0x3fe0644b,
+    (q31_t)0x3c135231, (q31_t)0x3fe12acb, (q31_t)0x3c1fdd34, (q31_t)0x3fe1eed5,
+    (q31_t)0x3c2c685d, (q31_t)0x3fe2b067, (q31_t)0x3c38f3ac, (q31_t)0x3fe36f84,
+    (q31_t)0x3c457f21, (q31_t)0x3fe42c2a, (q31_t)0x3c520aba, (q31_t)0x3fe4e659,
+    (q31_t)0x3c5e9678, (q31_t)0x3fe59e12, (q31_t)0x3c6b2259, (q31_t)0x3fe65354,
+    (q31_t)0x3c77ae5e, (q31_t)0x3fe7061f, (q31_t)0x3c843a85, (q31_t)0x3fe7b674,
+    (q31_t)0x3c90c6cf, (q31_t)0x3fe86452, (q31_t)0x3c9d533b, (q31_t)0x3fe90fb9,
+    (q31_t)0x3ca9dfc8, (q31_t)0x3fe9b8a9, (q31_t)0x3cb66c77, (q31_t)0x3fea5f23,
+    (q31_t)0x3cc2f945, (q31_t)0x3feb0326, (q31_t)0x3ccf8634, (q31_t)0x3feba4b2,
+    (q31_t)0x3cdc1342, (q31_t)0x3fec43c7, (q31_t)0x3ce8a06f, (q31_t)0x3fece065,
+    (q31_t)0x3cf52dbb, (q31_t)0x3fed7a8c, (q31_t)0x3d01bb24, (q31_t)0x3fee123d,
+    (q31_t)0x3d0e48ab, (q31_t)0x3feea776, (q31_t)0x3d1ad650, (q31_t)0x3fef3a39,
+    (q31_t)0x3d276410, (q31_t)0x3fefca84, (q31_t)0x3d33f1ed, (q31_t)0x3ff05858,
+    (q31_t)0x3d407fe6, (q31_t)0x3ff0e3b6, (q31_t)0x3d4d0df9, (q31_t)0x3ff16c9c,
+    (q31_t)0x3d599c28, (q31_t)0x3ff1f30b, (q31_t)0x3d662a70, (q31_t)0x3ff27703,
+    (q31_t)0x3d72b8d2, (q31_t)0x3ff2f884, (q31_t)0x3d7f474d, (q31_t)0x3ff3778e,
+    (q31_t)0x3d8bd5e1, (q31_t)0x3ff3f420, (q31_t)0x3d98648d, (q31_t)0x3ff46e3c,
+    (q31_t)0x3da4f351, (q31_t)0x3ff4e5e0, (q31_t)0x3db1822c, (q31_t)0x3ff55b0d,
+    (q31_t)0x3dbe111e, (q31_t)0x3ff5cdc3, (q31_t)0x3dcaa027, (q31_t)0x3ff63e01,
+    (q31_t)0x3dd72f45, (q31_t)0x3ff6abc8, (q31_t)0x3de3be78, (q31_t)0x3ff71718,
+    (q31_t)0x3df04dc0, (q31_t)0x3ff77ff1, (q31_t)0x3dfcdd1d, (q31_t)0x3ff7e652,
+    (q31_t)0x3e096c8d, (q31_t)0x3ff84a3c, (q31_t)0x3e15fc11, (q31_t)0x3ff8abae,
+    (q31_t)0x3e228ba7, (q31_t)0x3ff90aaa, (q31_t)0x3e2f1b50, (q31_t)0x3ff9672d,
+    (q31_t)0x3e3bab0b, (q31_t)0x3ff9c13a, (q31_t)0x3e483ad8, (q31_t)0x3ffa18cf,
+    (q31_t)0x3e54cab5, (q31_t)0x3ffa6dec, (q31_t)0x3e615aa3, (q31_t)0x3ffac092,
+    (q31_t)0x3e6deaa1, (q31_t)0x3ffb10c1, (q31_t)0x3e7a7aae, (q31_t)0x3ffb5e78,
+    (q31_t)0x3e870aca, (q31_t)0x3ffba9b8, (q31_t)0x3e939af5, (q31_t)0x3ffbf280,
+    (q31_t)0x3ea02b2e, (q31_t)0x3ffc38d1, (q31_t)0x3eacbb74, (q31_t)0x3ffc7caa,
+    (q31_t)0x3eb94bc8, (q31_t)0x3ffcbe0c, (q31_t)0x3ec5dc28, (q31_t)0x3ffcfcf6,
+    (q31_t)0x3ed26c94, (q31_t)0x3ffd3969, (q31_t)0x3edefd0c, (q31_t)0x3ffd7364,
+    (q31_t)0x3eeb8d8f, (q31_t)0x3ffdaae7, (q31_t)0x3ef81e1d, (q31_t)0x3ffddff3,
+    (q31_t)0x3f04aeb5, (q31_t)0x3ffe1288, (q31_t)0x3f113f56, (q31_t)0x3ffe42a4,
+    (q31_t)0x3f1dd001, (q31_t)0x3ffe704a, (q31_t)0x3f2a60b4, (q31_t)0x3ffe9b77,
+    (q31_t)0x3f36f170, (q31_t)0x3ffec42d, (q31_t)0x3f438234, (q31_t)0x3ffeea6c,
+    (q31_t)0x3f5012fe, (q31_t)0x3fff0e32, (q31_t)0x3f5ca3d0, (q31_t)0x3fff2f82,
+    (q31_t)0x3f6934a8, (q31_t)0x3fff4e59, (q31_t)0x3f75c585, (q31_t)0x3fff6ab9,
+    (q31_t)0x3f825668, (q31_t)0x3fff84a1, (q31_t)0x3f8ee750, (q31_t)0x3fff9c12,
+    (q31_t)0x3f9b783c, (q31_t)0x3fffb10b, (q31_t)0x3fa8092c, (q31_t)0x3fffc38c,
+    (q31_t)0x3fb49a1f, (q31_t)0x3fffd396, (q31_t)0x3fc12b16, (q31_t)0x3fffe128,
+    (q31_t)0x3fcdbc0f, (q31_t)0x3fffec43, (q31_t)0x3fda4d09, (q31_t)0x3ffff4e6,
+    (q31_t)0x3fe6de05, (q31_t)0x3ffffb11, (q31_t)0x3ff36f02, (q31_t)0x3ffffec4,
+};
+
+
+/**
+  @par
+  Generation of realCoefBQ31 array:
+  @par
+   n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  } </pre>
+  @par
+  Convert to fixed point Q31 format
+      round(pBTable[i] * pow(2, 31))
+ */
+
+const q31_t realCoefBQ31[8192] = {
+    (q31_t)0x40000000, (q31_t)0x40000000, (q31_t)0x400c90fe, (q31_t)0x3ffffec4,
+    (q31_t)0x401921fb, (q31_t)0x3ffffb11, (q31_t)0x4025b2f7, (q31_t)0x3ffff4e6,
+    (q31_t)0x403243f1, (q31_t)0x3fffec43, (q31_t)0x403ed4ea, (q31_t)0x3fffe128,
+    (q31_t)0x404b65e1, (q31_t)0x3fffd396, (q31_t)0x4057f6d4, (q31_t)0x3fffc38c,
+    (q31_t)0x406487c4, (q31_t)0x3fffb10b, (q31_t)0x407118b0, (q31_t)0x3fff9c12,
+    (q31_t)0x407da998, (q31_t)0x3fff84a1, (q31_t)0x408a3a7b, (q31_t)0x3fff6ab9,
+    (q31_t)0x4096cb58, (q31_t)0x3fff4e59, (q31_t)0x40a35c30, (q31_t)0x3fff2f82,
+    (q31_t)0x40afed02, (q31_t)0x3fff0e32, (q31_t)0x40bc7dcc, (q31_t)0x3ffeea6c,
+    (q31_t)0x40c90e90, (q31_t)0x3ffec42d, (q31_t)0x40d59f4c, (q31_t)0x3ffe9b77,
+    (q31_t)0x40e22fff, (q31_t)0x3ffe704a, (q31_t)0x40eec0aa, (q31_t)0x3ffe42a4,
+    (q31_t)0x40fb514b, (q31_t)0x3ffe1288, (q31_t)0x4107e1e3, (q31_t)0x3ffddff3,
+    (q31_t)0x41147271, (q31_t)0x3ffdaae7, (q31_t)0x412102f4, (q31_t)0x3ffd7364,
+    (q31_t)0x412d936c, (q31_t)0x3ffd3969, (q31_t)0x413a23d8, (q31_t)0x3ffcfcf6,
+    (q31_t)0x4146b438, (q31_t)0x3ffcbe0c, (q31_t)0x4153448c, (q31_t)0x3ffc7caa,
+    (q31_t)0x415fd4d2, (q31_t)0x3ffc38d1, (q31_t)0x416c650b, (q31_t)0x3ffbf280,
+    (q31_t)0x4178f536, (q31_t)0x3ffba9b8, (q31_t)0x41858552, (q31_t)0x3ffb5e78,
+    (q31_t)0x4192155f, (q31_t)0x3ffb10c1, (q31_t)0x419ea55d, (q31_t)0x3ffac092,
+    (q31_t)0x41ab354b, (q31_t)0x3ffa6dec, (q31_t)0x41b7c528, (q31_t)0x3ffa18cf,
+    (q31_t)0x41c454f5, (q31_t)0x3ff9c13a, (q31_t)0x41d0e4b0, (q31_t)0x3ff9672d,
+    (q31_t)0x41dd7459, (q31_t)0x3ff90aaa, (q31_t)0x41ea03ef, (q31_t)0x3ff8abae,
+    (q31_t)0x41f69373, (q31_t)0x3ff84a3c, (q31_t)0x420322e3, (q31_t)0x3ff7e652,
+    (q31_t)0x420fb240, (q31_t)0x3ff77ff1, (q31_t)0x421c4188, (q31_t)0x3ff71718,
+    (q31_t)0x4228d0bb, (q31_t)0x3ff6abc8, (q31_t)0x42355fd9, (q31_t)0x3ff63e01,
+    (q31_t)0x4241eee2, (q31_t)0x3ff5cdc3, (q31_t)0x424e7dd4, (q31_t)0x3ff55b0d,
+    (q31_t)0x425b0caf, (q31_t)0x3ff4e5e0, (q31_t)0x42679b73, (q31_t)0x3ff46e3c,
+    (q31_t)0x42742a1f, (q31_t)0x3ff3f420, (q31_t)0x4280b8b3, (q31_t)0x3ff3778e,
+    (q31_t)0x428d472e, (q31_t)0x3ff2f884, (q31_t)0x4299d590, (q31_t)0x3ff27703,
+    (q31_t)0x42a663d8, (q31_t)0x3ff1f30b, (q31_t)0x42b2f207, (q31_t)0x3ff16c9c,
+    (q31_t)0x42bf801a, (q31_t)0x3ff0e3b6, (q31_t)0x42cc0e13, (q31_t)0x3ff05858,
+    (q31_t)0x42d89bf0, (q31_t)0x3fefca84, (q31_t)0x42e529b0, (q31_t)0x3fef3a39,
+    (q31_t)0x42f1b755, (q31_t)0x3feea776, (q31_t)0x42fe44dc, (q31_t)0x3fee123d,
+    (q31_t)0x430ad245, (q31_t)0x3fed7a8c, (q31_t)0x43175f91, (q31_t)0x3fece065,
+    (q31_t)0x4323ecbe, (q31_t)0x3fec43c7, (q31_t)0x433079cc, (q31_t)0x3feba4b2,
+    (q31_t)0x433d06bb, (q31_t)0x3feb0326, (q31_t)0x43499389, (q31_t)0x3fea5f23,
+    (q31_t)0x43562038, (q31_t)0x3fe9b8a9, (q31_t)0x4362acc5, (q31_t)0x3fe90fb9,
+    (q31_t)0x436f3931, (q31_t)0x3fe86452, (q31_t)0x437bc57b, (q31_t)0x3fe7b674,
+    (q31_t)0x438851a2, (q31_t)0x3fe7061f, (q31_t)0x4394dda7, (q31_t)0x3fe65354,
+    (q31_t)0x43a16988, (q31_t)0x3fe59e12, (q31_t)0x43adf546, (q31_t)0x3fe4e659,
+    (q31_t)0x43ba80df, (q31_t)0x3fe42c2a, (q31_t)0x43c70c54, (q31_t)0x3fe36f84,
+    (q31_t)0x43d397a3, (q31_t)0x3fe2b067, (q31_t)0x43e022cc, (q31_t)0x3fe1eed5,
+    (q31_t)0x43ecadcf, (q31_t)0x3fe12acb, (q31_t)0x43f938ac, (q31_t)0x3fe0644b,
+    (q31_t)0x4405c361, (q31_t)0x3fdf9b55, (q31_t)0x44124dee, (q31_t)0x3fdecfe8,
+    (q31_t)0x441ed854, (q31_t)0x3fde0205, (q31_t)0x442b6290, (q31_t)0x3fdd31ac,
+    (q31_t)0x4437eca4, (q31_t)0x3fdc5edc, (q31_t)0x4444768d, (q31_t)0x3fdb8996,
+    (q31_t)0x4451004d, (q31_t)0x3fdab1d9, (q31_t)0x445d89e2, (q31_t)0x3fd9d7a7,
+    (q31_t)0x446a134c, (q31_t)0x3fd8fafe, (q31_t)0x44769c8b, (q31_t)0x3fd81bdf,
+    (q31_t)0x4483259d, (q31_t)0x3fd73a4a, (q31_t)0x448fae83, (q31_t)0x3fd6563f,
+    (q31_t)0x449c373c, (q31_t)0x3fd56fbe, (q31_t)0x44a8bfc7, (q31_t)0x3fd486c7,
+    (q31_t)0x44b54825, (q31_t)0x3fd39b5a, (q31_t)0x44c1d054, (q31_t)0x3fd2ad77,
+    (q31_t)0x44ce5854, (q31_t)0x3fd1bd1e, (q31_t)0x44dae024, (q31_t)0x3fd0ca4f,
+    (q31_t)0x44e767c5, (q31_t)0x3fcfd50b, (q31_t)0x44f3ef35, (q31_t)0x3fcedd50,
+    (q31_t)0x45007674, (q31_t)0x3fcde320, (q31_t)0x450cfd82, (q31_t)0x3fcce67a,
+    (q31_t)0x4519845e, (q31_t)0x3fcbe75e, (q31_t)0x45260b08, (q31_t)0x3fcae5cd,
+    (q31_t)0x4532917f, (q31_t)0x3fc9e1c6, (q31_t)0x453f17c3, (q31_t)0x3fc8db4a,
+    (q31_t)0x454b9dd3, (q31_t)0x3fc7d258, (q31_t)0x455823ae, (q31_t)0x3fc6c6f0,
+    (q31_t)0x4564a955, (q31_t)0x3fc5b913, (q31_t)0x45712ec7, (q31_t)0x3fc4a8c1,
+    (q31_t)0x457db403, (q31_t)0x3fc395f9, (q31_t)0x458a3908, (q31_t)0x3fc280bc,
+    (q31_t)0x4596bdd7, (q31_t)0x3fc1690a, (q31_t)0x45a3426f, (q31_t)0x3fc04ee3,
+    (q31_t)0x45afc6d0, (q31_t)0x3fbf3246, (q31_t)0x45bc4af8, (q31_t)0x3fbe1334,
+    (q31_t)0x45c8cee7, (q31_t)0x3fbcf1ad, (q31_t)0x45d5529e, (q31_t)0x3fbbcdb1,
+    (q31_t)0x45e1d61b, (q31_t)0x3fbaa740, (q31_t)0x45ee595d, (q31_t)0x3fb97e5a,
+    (q31_t)0x45fadc66, (q31_t)0x3fb852ff, (q31_t)0x46075f33, (q31_t)0x3fb7252f,
+    (q31_t)0x4613e1c5, (q31_t)0x3fb5f4ea, (q31_t)0x4620641a, (q31_t)0x3fb4c231,
+    (q31_t)0x462ce634, (q31_t)0x3fb38d02, (q31_t)0x46396810, (q31_t)0x3fb2555f,
+    (q31_t)0x4645e9af, (q31_t)0x3fb11b48, (q31_t)0x46526b10, (q31_t)0x3fafdebb,
+    (q31_t)0x465eec33, (q31_t)0x3fae9fbb, (q31_t)0x466b6d16, (q31_t)0x3fad5e45,
+    (q31_t)0x4677edbb, (q31_t)0x3fac1a5b, (q31_t)0x46846e1f, (q31_t)0x3faad3fd,
+    (q31_t)0x4690ee44, (q31_t)0x3fa98b2a, (q31_t)0x469d6e27, (q31_t)0x3fa83fe3,
+    (q31_t)0x46a9edc9, (q31_t)0x3fa6f228, (q31_t)0x46b66d29, (q31_t)0x3fa5a1f9,
+    (q31_t)0x46c2ec48, (q31_t)0x3fa44f55, (q31_t)0x46cf6b23, (q31_t)0x3fa2fa3d,
+    (q31_t)0x46dbe9bb, (q31_t)0x3fa1a2b2, (q31_t)0x46e86810, (q31_t)0x3fa048b2,
+    (q31_t)0x46f4e620, (q31_t)0x3f9eec3e, (q31_t)0x470163eb, (q31_t)0x3f9d8d56,
+    (q31_t)0x470de172, (q31_t)0x3f9c2bfb, (q31_t)0x471a5eb3, (q31_t)0x3f9ac82c,
+    (q31_t)0x4726dbae, (q31_t)0x3f9961e8, (q31_t)0x47335862, (q31_t)0x3f97f932,
+    (q31_t)0x473fd4cf, (q31_t)0x3f968e07, (q31_t)0x474c50f4, (q31_t)0x3f952069,
+    (q31_t)0x4758ccd2, (q31_t)0x3f93b058, (q31_t)0x47654867, (q31_t)0x3f923dd2,
+    (q31_t)0x4771c3b3, (q31_t)0x3f90c8da, (q31_t)0x477e3eb5, (q31_t)0x3f8f516e,
+    (q31_t)0x478ab96e, (q31_t)0x3f8dd78f, (q31_t)0x479733dc, (q31_t)0x3f8c5b3d,
+    (q31_t)0x47a3adff, (q31_t)0x3f8adc77, (q31_t)0x47b027d7, (q31_t)0x3f895b3e,
+    (q31_t)0x47bca163, (q31_t)0x3f87d792, (q31_t)0x47c91aa3, (q31_t)0x3f865174,
+    (q31_t)0x47d59396, (q31_t)0x3f84c8e2, (q31_t)0x47e20c3b, (q31_t)0x3f833ddd,
+    (q31_t)0x47ee8493, (q31_t)0x3f81b065, (q31_t)0x47fafc9c, (q31_t)0x3f80207b,
+    (q31_t)0x48077457, (q31_t)0x3f7e8e1e, (q31_t)0x4813ebc2, (q31_t)0x3f7cf94e,
+    (q31_t)0x482062de, (q31_t)0x3f7b620c, (q31_t)0x482cd9a9, (q31_t)0x3f79c857,
+    (q31_t)0x48395024, (q31_t)0x3f782c30, (q31_t)0x4845c64d, (q31_t)0x3f768d96,
+    (q31_t)0x48523c25, (q31_t)0x3f74ec8a, (q31_t)0x485eb1ab, (q31_t)0x3f73490b,
+    (q31_t)0x486b26de, (q31_t)0x3f71a31b, (q31_t)0x48779bbe, (q31_t)0x3f6ffab8,
+    (q31_t)0x4884104b, (q31_t)0x3f6e4fe3, (q31_t)0x48908483, (q31_t)0x3f6ca29c,
+    (q31_t)0x489cf867, (q31_t)0x3f6af2e3, (q31_t)0x48a96bf6, (q31_t)0x3f6940b8,
+    (q31_t)0x48b5df30, (q31_t)0x3f678c1c, (q31_t)0x48c25213, (q31_t)0x3f65d50d,
+    (q31_t)0x48cec4a0, (q31_t)0x3f641b8d, (q31_t)0x48db36d6, (q31_t)0x3f625f9b,
+    (q31_t)0x48e7a8b5, (q31_t)0x3f60a138, (q31_t)0x48f41a3c, (q31_t)0x3f5ee063,
+    (q31_t)0x49008b6a, (q31_t)0x3f5d1d1d, (q31_t)0x490cfc40, (q31_t)0x3f5b5765,
+    (q31_t)0x49196cbc, (q31_t)0x3f598f3c, (q31_t)0x4925dcdf, (q31_t)0x3f57c4a2,
+    (q31_t)0x49324ca7, (q31_t)0x3f55f796, (q31_t)0x493ebc14, (q31_t)0x3f54281a,
+    (q31_t)0x494b2b27, (q31_t)0x3f52562c, (q31_t)0x495799dd, (q31_t)0x3f5081cd,
+    (q31_t)0x49640837, (q31_t)0x3f4eaafe, (q31_t)0x49707635, (q31_t)0x3f4cd1be,
+    (q31_t)0x497ce3d5, (q31_t)0x3f4af60d, (q31_t)0x49895118, (q31_t)0x3f4917eb,
+    (q31_t)0x4995bdfd, (q31_t)0x3f473759, (q31_t)0x49a22a83, (q31_t)0x3f455456,
+    (q31_t)0x49ae96aa, (q31_t)0x3f436ee3, (q31_t)0x49bb0271, (q31_t)0x3f4186ff,
+    (q31_t)0x49c76dd8, (q31_t)0x3f3f9cab, (q31_t)0x49d3d8df, (q31_t)0x3f3dafe7,
+    (q31_t)0x49e04385, (q31_t)0x3f3bc0b3, (q31_t)0x49ecadc9, (q31_t)0x3f39cf0e,
+    (q31_t)0x49f917ac, (q31_t)0x3f37dafa, (q31_t)0x4a05812c, (q31_t)0x3f35e476,
+    (q31_t)0x4a11ea49, (q31_t)0x3f33eb81, (q31_t)0x4a1e5303, (q31_t)0x3f31f01d,
+    (q31_t)0x4a2abb59, (q31_t)0x3f2ff24a, (q31_t)0x4a37234a, (q31_t)0x3f2df206,
+    (q31_t)0x4a438ad7, (q31_t)0x3f2bef53, (q31_t)0x4a4ff1fe, (q31_t)0x3f29ea31,
+    (q31_t)0x4a5c58c0, (q31_t)0x3f27e29f, (q31_t)0x4a68bf1b, (q31_t)0x3f25d89e,
+    (q31_t)0x4a752510, (q31_t)0x3f23cc2e, (q31_t)0x4a818a9d, (q31_t)0x3f21bd4e,
+    (q31_t)0x4a8defc3, (q31_t)0x3f1fabff, (q31_t)0x4a9a5480, (q31_t)0x3f1d9842,
+    (q31_t)0x4aa6b8d5, (q31_t)0x3f1b8215, (q31_t)0x4ab31cc1, (q31_t)0x3f19697a,
+    (q31_t)0x4abf8043, (q31_t)0x3f174e70, (q31_t)0x4acbe35b, (q31_t)0x3f1530f7,
+    (q31_t)0x4ad84609, (q31_t)0x3f13110f, (q31_t)0x4ae4a84b, (q31_t)0x3f10eeb9,
+    (q31_t)0x4af10a22, (q31_t)0x3f0ec9f5, (q31_t)0x4afd6b8d, (q31_t)0x3f0ca2c2,
+    (q31_t)0x4b09cc8c, (q31_t)0x3f0a7921, (q31_t)0x4b162d1d, (q31_t)0x3f084d12,
+    (q31_t)0x4b228d42, (q31_t)0x3f061e95, (q31_t)0x4b2eecf8, (q31_t)0x3f03eda9,
+    (q31_t)0x4b3b4c40, (q31_t)0x3f01ba50, (q31_t)0x4b47ab19, (q31_t)0x3eff8489,
+    (q31_t)0x4b540982, (q31_t)0x3efd4c54, (q31_t)0x4b60677c, (q31_t)0x3efb11b1,
+    (q31_t)0x4b6cc506, (q31_t)0x3ef8d4a1, (q31_t)0x4b79221f, (q31_t)0x3ef69523,
+    (q31_t)0x4b857ec7, (q31_t)0x3ef45338, (q31_t)0x4b91dafc, (q31_t)0x3ef20ee0,
+    (q31_t)0x4b9e36c0, (q31_t)0x3eefc81a, (q31_t)0x4baa9211, (q31_t)0x3eed7ee7,
+    (q31_t)0x4bb6ecef, (q31_t)0x3eeb3347, (q31_t)0x4bc34759, (q31_t)0x3ee8e53a,
+    (q31_t)0x4bcfa150, (q31_t)0x3ee694c1, (q31_t)0x4bdbfad1, (q31_t)0x3ee441da,
+    (q31_t)0x4be853de, (q31_t)0x3ee1ec87, (q31_t)0x4bf4ac75, (q31_t)0x3edf94c7,
+    (q31_t)0x4c010496, (q31_t)0x3edd3a9a, (q31_t)0x4c0d5c41, (q31_t)0x3edade01,
+    (q31_t)0x4c19b374, (q31_t)0x3ed87efc, (q31_t)0x4c260a31, (q31_t)0x3ed61d8a,
+    (q31_t)0x4c326075, (q31_t)0x3ed3b9ad, (q31_t)0x4c3eb641, (q31_t)0x3ed15363,
+    (q31_t)0x4c4b0b94, (q31_t)0x3eceeaad, (q31_t)0x4c57606e, (q31_t)0x3ecc7f8b,
+    (q31_t)0x4c63b4ce, (q31_t)0x3eca11fe, (q31_t)0x4c7008b3, (q31_t)0x3ec7a205,
+    (q31_t)0x4c7c5c1e, (q31_t)0x3ec52fa0, (q31_t)0x4c88af0e, (q31_t)0x3ec2bad0,
+    (q31_t)0x4c950182, (q31_t)0x3ec04394, (q31_t)0x4ca1537a, (q31_t)0x3ebdc9ed,
+    (q31_t)0x4cada4f5, (q31_t)0x3ebb4ddb, (q31_t)0x4cb9f5f3, (q31_t)0x3eb8cf5d,
+    (q31_t)0x4cc64673, (q31_t)0x3eb64e75, (q31_t)0x4cd29676, (q31_t)0x3eb3cb21,
+    (q31_t)0x4cdee5f9, (q31_t)0x3eb14563, (q31_t)0x4ceb34fe, (q31_t)0x3eaebd3a,
+    (q31_t)0x4cf78383, (q31_t)0x3eac32a6, (q31_t)0x4d03d189, (q31_t)0x3ea9a5a8,
+    (q31_t)0x4d101f0e, (q31_t)0x3ea7163f, (q31_t)0x4d1c6c11, (q31_t)0x3ea4846c,
+    (q31_t)0x4d28b894, (q31_t)0x3ea1f02f, (q31_t)0x4d350495, (q31_t)0x3e9f5988,
+    (q31_t)0x4d415013, (q31_t)0x3e9cc076, (q31_t)0x4d4d9b0e, (q31_t)0x3e9a24fb,
+    (q31_t)0x4d59e586, (q31_t)0x3e978715, (q31_t)0x4d662f7b, (q31_t)0x3e94e6c6,
+    (q31_t)0x4d7278eb, (q31_t)0x3e92440d, (q31_t)0x4d7ec1d6, (q31_t)0x3e8f9eeb,
+    (q31_t)0x4d8b0a3d, (q31_t)0x3e8cf75f, (q31_t)0x4d97521d, (q31_t)0x3e8a4d6a,
+    (q31_t)0x4da39978, (q31_t)0x3e87a10c, (q31_t)0x4dafe04b, (q31_t)0x3e84f245,
+    (q31_t)0x4dbc2698, (q31_t)0x3e824114, (q31_t)0x4dc86c5d, (q31_t)0x3e7f8d7b,
+    (q31_t)0x4dd4b19a, (q31_t)0x3e7cd778, (q31_t)0x4de0f64f, (q31_t)0x3e7a1f0d,
+    (q31_t)0x4ded3a7b, (q31_t)0x3e77643a, (q31_t)0x4df97e1d, (q31_t)0x3e74a6fd,
+    (q31_t)0x4e05c135, (q31_t)0x3e71e759, (q31_t)0x4e1203c3, (q31_t)0x3e6f254c,
+    (q31_t)0x4e1e45c6, (q31_t)0x3e6c60d7, (q31_t)0x4e2a873e, (q31_t)0x3e6999fa,
+    (q31_t)0x4e36c82a, (q31_t)0x3e66d0b4, (q31_t)0x4e430889, (q31_t)0x3e640507,
+    (q31_t)0x4e4f485c, (q31_t)0x3e6136f3, (q31_t)0x4e5b87a2, (q31_t)0x3e5e6676,
+    (q31_t)0x4e67c65a, (q31_t)0x3e5b9392, (q31_t)0x4e740483, (q31_t)0x3e58be47,
+    (q31_t)0x4e80421e, (q31_t)0x3e55e694, (q31_t)0x4e8c7f2a, (q31_t)0x3e530c7a,
+    (q31_t)0x4e98bba7, (q31_t)0x3e502ff9, (q31_t)0x4ea4f793, (q31_t)0x3e4d5110,
+    (q31_t)0x4eb132ef, (q31_t)0x3e4a6fc1, (q31_t)0x4ebd6db9, (q31_t)0x3e478c0b,
+    (q31_t)0x4ec9a7f3, (q31_t)0x3e44a5ef, (q31_t)0x4ed5e19a, (q31_t)0x3e41bd6c,
+    (q31_t)0x4ee21aaf, (q31_t)0x3e3ed282, (q31_t)0x4eee5331, (q31_t)0x3e3be532,
+    (q31_t)0x4efa8b20, (q31_t)0x3e38f57c, (q31_t)0x4f06c27a, (q31_t)0x3e360360,
+    (q31_t)0x4f12f941, (q31_t)0x3e330ede, (q31_t)0x4f1f2f73, (q31_t)0x3e3017f6,
+    (q31_t)0x4f2b650f, (q31_t)0x3e2d1ea8, (q31_t)0x4f379a16, (q31_t)0x3e2a22f4,
+    (q31_t)0x4f43ce86, (q31_t)0x3e2724db, (q31_t)0x4f500260, (q31_t)0x3e24245d,
+    (q31_t)0x4f5c35a3, (q31_t)0x3e212179, (q31_t)0x4f68684e, (q31_t)0x3e1e1c30,
+    (q31_t)0x4f749a61, (q31_t)0x3e1b1482, (q31_t)0x4f80cbdc, (q31_t)0x3e180a6f,
+    (q31_t)0x4f8cfcbe, (q31_t)0x3e14fdf7, (q31_t)0x4f992d06, (q31_t)0x3e11ef1b,
+    (q31_t)0x4fa55cb4, (q31_t)0x3e0eddd9, (q31_t)0x4fb18bc8, (q31_t)0x3e0bca34,
+    (q31_t)0x4fbdba40, (q31_t)0x3e08b42a, (q31_t)0x4fc9e81e, (q31_t)0x3e059bbb,
+    (q31_t)0x4fd6155f, (q31_t)0x3e0280e9, (q31_t)0x4fe24205, (q31_t)0x3dff63b2,
+    (q31_t)0x4fee6e0d, (q31_t)0x3dfc4418, (q31_t)0x4ffa9979, (q31_t)0x3df9221a,
+    (q31_t)0x5006c446, (q31_t)0x3df5fdb8, (q31_t)0x5012ee76, (q31_t)0x3df2d6f3,
+    (q31_t)0x501f1807, (q31_t)0x3defadca, (q31_t)0x502b40f8, (q31_t)0x3dec823e,
+    (q31_t)0x5037694b, (q31_t)0x3de9544f, (q31_t)0x504390fd, (q31_t)0x3de623fd,
+    (q31_t)0x504fb80e, (q31_t)0x3de2f148, (q31_t)0x505bde7f, (q31_t)0x3ddfbc30,
+    (q31_t)0x5068044e, (q31_t)0x3ddc84b5, (q31_t)0x5074297b, (q31_t)0x3dd94ad8,
+    (q31_t)0x50804e06, (q31_t)0x3dd60e99, (q31_t)0x508c71ee, (q31_t)0x3dd2cff7,
+    (q31_t)0x50989532, (q31_t)0x3dcf8ef3, (q31_t)0x50a4b7d3, (q31_t)0x3dcc4b8d,
+    (q31_t)0x50b0d9d0, (q31_t)0x3dc905c5, (q31_t)0x50bcfb28, (q31_t)0x3dc5bd9b,
+    (q31_t)0x50c91bda, (q31_t)0x3dc2730f, (q31_t)0x50d53be7, (q31_t)0x3dbf2622,
+    (q31_t)0x50e15b4e, (q31_t)0x3dbbd6d4, (q31_t)0x50ed7a0e, (q31_t)0x3db88524,
+    (q31_t)0x50f99827, (q31_t)0x3db53113, (q31_t)0x5105b599, (q31_t)0x3db1daa2,
+    (q31_t)0x5111d263, (q31_t)0x3dae81cf, (q31_t)0x511dee84, (q31_t)0x3dab269b,
+    (q31_t)0x512a09fc, (q31_t)0x3da7c907, (q31_t)0x513624cb, (q31_t)0x3da46912,
+    (q31_t)0x51423ef0, (q31_t)0x3da106bd, (q31_t)0x514e586a, (q31_t)0x3d9da208,
+    (q31_t)0x515a713a, (q31_t)0x3d9a3af2, (q31_t)0x5166895f, (q31_t)0x3d96d17d,
+    (q31_t)0x5172a0d7, (q31_t)0x3d9365a8, (q31_t)0x517eb7a4, (q31_t)0x3d8ff772,
+    (q31_t)0x518acdc4, (q31_t)0x3d8c86de, (q31_t)0x5196e337, (q31_t)0x3d8913ea,
+    (q31_t)0x51a2f7fc, (q31_t)0x3d859e96, (q31_t)0x51af0c13, (q31_t)0x3d8226e4,
+    (q31_t)0x51bb1f7c, (q31_t)0x3d7eacd2, (q31_t)0x51c73235, (q31_t)0x3d7b3061,
+    (q31_t)0x51d3443f, (q31_t)0x3d77b192, (q31_t)0x51df5599, (q31_t)0x3d743064,
+    (q31_t)0x51eb6643, (q31_t)0x3d70acd7, (q31_t)0x51f7763c, (q31_t)0x3d6d26ec,
+    (q31_t)0x52038584, (q31_t)0x3d699ea3, (q31_t)0x520f941a, (q31_t)0x3d6613fb,
+    (q31_t)0x521ba1fd, (q31_t)0x3d6286f6, (q31_t)0x5227af2e, (q31_t)0x3d5ef793,
+    (q31_t)0x5233bbac, (q31_t)0x3d5b65d2, (q31_t)0x523fc776, (q31_t)0x3d57d1b3,
+    (q31_t)0x524bd28c, (q31_t)0x3d543b37, (q31_t)0x5257dced, (q31_t)0x3d50a25e,
+    (q31_t)0x5263e699, (q31_t)0x3d4d0728, (q31_t)0x526fef90, (q31_t)0x3d496994,
+    (q31_t)0x527bf7d1, (q31_t)0x3d45c9a4, (q31_t)0x5287ff5b, (q31_t)0x3d422757,
+    (q31_t)0x5294062f, (q31_t)0x3d3e82ae, (q31_t)0x52a00c4b, (q31_t)0x3d3adba7,
+    (q31_t)0x52ac11af, (q31_t)0x3d373245, (q31_t)0x52b8165b, (q31_t)0x3d338687,
+    (q31_t)0x52c41a4f, (q31_t)0x3d2fd86c, (q31_t)0x52d01d89, (q31_t)0x3d2c27f6,
+    (q31_t)0x52dc2009, (q31_t)0x3d287523, (q31_t)0x52e821cf, (q31_t)0x3d24bff6,
+    (q31_t)0x52f422db, (q31_t)0x3d21086c, (q31_t)0x5300232c, (q31_t)0x3d1d4e88,
+    (q31_t)0x530c22c1, (q31_t)0x3d199248, (q31_t)0x5318219a, (q31_t)0x3d15d3ad,
+    (q31_t)0x53241fb6, (q31_t)0x3d1212b7, (q31_t)0x53301d16, (q31_t)0x3d0e4f67,
+    (q31_t)0x533c19b8, (q31_t)0x3d0a89bc, (q31_t)0x5348159d, (q31_t)0x3d06c1b6,
+    (q31_t)0x535410c3, (q31_t)0x3d02f757, (q31_t)0x53600b2a, (q31_t)0x3cff2a9d,
+    (q31_t)0x536c04d2, (q31_t)0x3cfb5b89, (q31_t)0x5377fdbb, (q31_t)0x3cf78a1b,
+    (q31_t)0x5383f5e3, (q31_t)0x3cf3b653, (q31_t)0x538fed4b, (q31_t)0x3cefe032,
+    (q31_t)0x539be3f2, (q31_t)0x3cec07b8, (q31_t)0x53a7d9d7, (q31_t)0x3ce82ce4,
+    (q31_t)0x53b3cefa, (q31_t)0x3ce44fb7, (q31_t)0x53bfc35b, (q31_t)0x3ce07031,
+    (q31_t)0x53cbb6f8, (q31_t)0x3cdc8e52, (q31_t)0x53d7a9d3, (q31_t)0x3cd8aa1b,
+    (q31_t)0x53e39be9, (q31_t)0x3cd4c38b, (q31_t)0x53ef8d3c, (q31_t)0x3cd0daa2,
+    (q31_t)0x53fb7dc9, (q31_t)0x3cccef62, (q31_t)0x54076d91, (q31_t)0x3cc901c9,
+    (q31_t)0x54135c94, (q31_t)0x3cc511d9, (q31_t)0x541f4ad1, (q31_t)0x3cc11f90,
+    (q31_t)0x542b3846, (q31_t)0x3cbd2af0, (q31_t)0x543724f5, (q31_t)0x3cb933f9,
+    (q31_t)0x544310dd, (q31_t)0x3cb53aaa, (q31_t)0x544efbfc, (q31_t)0x3cb13f04,
+    (q31_t)0x545ae653, (q31_t)0x3cad4107, (q31_t)0x5466cfe1, (q31_t)0x3ca940b3,
+    (q31_t)0x5472b8a5, (q31_t)0x3ca53e09, (q31_t)0x547ea0a0, (q31_t)0x3ca13908,
+    (q31_t)0x548a87d1, (q31_t)0x3c9d31b0, (q31_t)0x54966e36, (q31_t)0x3c992803,
+    (q31_t)0x54a253d1, (q31_t)0x3c951bff, (q31_t)0x54ae38a0, (q31_t)0x3c910da5,
+    (q31_t)0x54ba1ca3, (q31_t)0x3c8cfcf6, (q31_t)0x54c5ffd9, (q31_t)0x3c88e9f1,
+    (q31_t)0x54d1e242, (q31_t)0x3c84d496, (q31_t)0x54ddc3de, (q31_t)0x3c80bce7,
+    (q31_t)0x54e9a4ac, (q31_t)0x3c7ca2e2, (q31_t)0x54f584ac, (q31_t)0x3c788688,
+    (q31_t)0x550163dc, (q31_t)0x3c7467d9, (q31_t)0x550d423d, (q31_t)0x3c7046d6,
+    (q31_t)0x55191fcf, (q31_t)0x3c6c237e, (q31_t)0x5524fc90, (q31_t)0x3c67fdd1,
+    (q31_t)0x5530d881, (q31_t)0x3c63d5d1, (q31_t)0x553cb3a0, (q31_t)0x3c5fab7c,
+    (q31_t)0x55488dee, (q31_t)0x3c5b7ed4, (q31_t)0x5554676a, (q31_t)0x3c574fd8,
+    (q31_t)0x55604013, (q31_t)0x3c531e88, (q31_t)0x556c17e9, (q31_t)0x3c4eeae5,
+    (q31_t)0x5577eeec, (q31_t)0x3c4ab4ef, (q31_t)0x5583c51b, (q31_t)0x3c467ca6,
+    (q31_t)0x558f9a76, (q31_t)0x3c42420a, (q31_t)0x559b6efb, (q31_t)0x3c3e051b,
+    (q31_t)0x55a742ac, (q31_t)0x3c39c5da, (q31_t)0x55b31587, (q31_t)0x3c358446,
+    (q31_t)0x55bee78c, (q31_t)0x3c314060, (q31_t)0x55cab8ba, (q31_t)0x3c2cfa28,
+    (q31_t)0x55d68911, (q31_t)0x3c28b19e, (q31_t)0x55e25890, (q31_t)0x3c2466c2,
+    (q31_t)0x55ee2738, (q31_t)0x3c201994, (q31_t)0x55f9f507, (q31_t)0x3c1bca16,
+    (q31_t)0x5605c1fd, (q31_t)0x3c177845, (q31_t)0x56118e1a, (q31_t)0x3c132424,
+    (q31_t)0x561d595d, (q31_t)0x3c0ecdb2, (q31_t)0x562923c5, (q31_t)0x3c0a74f0,
+    (q31_t)0x5634ed53, (q31_t)0x3c0619dc, (q31_t)0x5640b606, (q31_t)0x3c01bc78,
+    (q31_t)0x564c7ddd, (q31_t)0x3bfd5cc4, (q31_t)0x565844d8, (q31_t)0x3bf8fac0,
+    (q31_t)0x56640af7, (q31_t)0x3bf4966c, (q31_t)0x566fd039, (q31_t)0x3bf02fc9,
+    (q31_t)0x567b949d, (q31_t)0x3bebc6d5, (q31_t)0x56875823, (q31_t)0x3be75b93,
+    (q31_t)0x56931acb, (q31_t)0x3be2ee01, (q31_t)0x569edc94, (q31_t)0x3bde7e20,
+    (q31_t)0x56aa9d7e, (q31_t)0x3bda0bf0, (q31_t)0x56b65d88, (q31_t)0x3bd59771,
+    (q31_t)0x56c21cb2, (q31_t)0x3bd120a4, (q31_t)0x56cddafb, (q31_t)0x3bcca789,
+    (q31_t)0x56d99864, (q31_t)0x3bc82c1f, (q31_t)0x56e554ea, (q31_t)0x3bc3ae67,
+    (q31_t)0x56f1108f, (q31_t)0x3bbf2e62, (q31_t)0x56fccb51, (q31_t)0x3bbaac0e,
+    (q31_t)0x57088531, (q31_t)0x3bb6276e, (q31_t)0x57143e2d, (q31_t)0x3bb1a080,
+    (q31_t)0x571ff646, (q31_t)0x3bad1744, (q31_t)0x572bad7a, (q31_t)0x3ba88bbc,
+    (q31_t)0x573763c9, (q31_t)0x3ba3fde7, (q31_t)0x57431933, (q31_t)0x3b9f6dc5,
+    (q31_t)0x574ecdb8, (q31_t)0x3b9adb57, (q31_t)0x575a8157, (q31_t)0x3b96469d,
+    (q31_t)0x5766340f, (q31_t)0x3b91af97, (q31_t)0x5771e5e0, (q31_t)0x3b8d1644,
+    (q31_t)0x577d96ca, (q31_t)0x3b887aa6, (q31_t)0x578946cc, (q31_t)0x3b83dcbc,
+    (q31_t)0x5794f5e6, (q31_t)0x3b7f3c87, (q31_t)0x57a0a417, (q31_t)0x3b7a9a07,
+    (q31_t)0x57ac515f, (q31_t)0x3b75f53c, (q31_t)0x57b7fdbd, (q31_t)0x3b714e25,
+    (q31_t)0x57c3a931, (q31_t)0x3b6ca4c4, (q31_t)0x57cf53bb, (q31_t)0x3b67f919,
+    (q31_t)0x57dafd59, (q31_t)0x3b634b23, (q31_t)0x57e6a60c, (q31_t)0x3b5e9ae4,
+    (q31_t)0x57f24dd3, (q31_t)0x3b59e85a, (q31_t)0x57fdf4ae, (q31_t)0x3b553386,
+    (q31_t)0x58099a9c, (q31_t)0x3b507c69, (q31_t)0x58153f9d, (q31_t)0x3b4bc303,
+    (q31_t)0x5820e3b0, (q31_t)0x3b470753, (q31_t)0x582c86d5, (q31_t)0x3b42495a,
+    (q31_t)0x5838290c, (q31_t)0x3b3d8918, (q31_t)0x5843ca53, (q31_t)0x3b38c68e,
+    (q31_t)0x584f6aab, (q31_t)0x3b3401bb, (q31_t)0x585b0a13, (q31_t)0x3b2f3aa0,
+    (q31_t)0x5866a88a, (q31_t)0x3b2a713d, (q31_t)0x58724611, (q31_t)0x3b25a591,
+    (q31_t)0x587de2a7, (q31_t)0x3b20d79e, (q31_t)0x58897e4a, (q31_t)0x3b1c0764,
+    (q31_t)0x589518fc, (q31_t)0x3b1734e2, (q31_t)0x58a0b2bb, (q31_t)0x3b126019,
+    (q31_t)0x58ac4b87, (q31_t)0x3b0d8909, (q31_t)0x58b7e35f, (q31_t)0x3b08afb2,
+    (q31_t)0x58c37a44, (q31_t)0x3b03d414, (q31_t)0x58cf1034, (q31_t)0x3afef630,
+    (q31_t)0x58daa52f, (q31_t)0x3afa1605, (q31_t)0x58e63935, (q31_t)0x3af53395,
+    (q31_t)0x58f1cc45, (q31_t)0x3af04edf, (q31_t)0x58fd5e5f, (q31_t)0x3aeb67e3,
+    (q31_t)0x5908ef82, (q31_t)0x3ae67ea1, (q31_t)0x59147fae, (q31_t)0x3ae1931a,
+    (q31_t)0x59200ee3, (q31_t)0x3adca54e, (q31_t)0x592b9d1f, (q31_t)0x3ad7b53d,
+    (q31_t)0x59372a64, (q31_t)0x3ad2c2e8, (q31_t)0x5942b6af, (q31_t)0x3acdce4d,
+    (q31_t)0x594e4201, (q31_t)0x3ac8d76f, (q31_t)0x5959cc5a, (q31_t)0x3ac3de4c,
+    (q31_t)0x596555b8, (q31_t)0x3abee2e5, (q31_t)0x5970de1b, (q31_t)0x3ab9e53a,
+    (q31_t)0x597c6584, (q31_t)0x3ab4e54c, (q31_t)0x5987ebf0, (q31_t)0x3aafe31b,
+    (q31_t)0x59937161, (q31_t)0x3aaadea6, (q31_t)0x599ef5d6, (q31_t)0x3aa5d7ee,
+    (q31_t)0x59aa794d, (q31_t)0x3aa0cef3, (q31_t)0x59b5fbc8, (q31_t)0x3a9bc3b6,
+    (q31_t)0x59c17d44, (q31_t)0x3a96b636, (q31_t)0x59ccfdc2, (q31_t)0x3a91a674,
+    (q31_t)0x59d87d42, (q31_t)0x3a8c9470, (q31_t)0x59e3fbc3, (q31_t)0x3a87802a,
+    (q31_t)0x59ef7944, (q31_t)0x3a8269a3, (q31_t)0x59faf5c5, (q31_t)0x3a7d50da,
+    (q31_t)0x5a067145, (q31_t)0x3a7835cf, (q31_t)0x5a11ebc5, (q31_t)0x3a731884,
+    (q31_t)0x5a1d6544, (q31_t)0x3a6df8f8, (q31_t)0x5a28ddc0, (q31_t)0x3a68d72b,
+    (q31_t)0x5a34553b, (q31_t)0x3a63b31d, (q31_t)0x5a3fcbb3, (q31_t)0x3a5e8cd0,
+    (q31_t)0x5a4b4128, (q31_t)0x3a596442, (q31_t)0x5a56b599, (q31_t)0x3a543974,
+    (q31_t)0x5a622907, (q31_t)0x3a4f0c67, (q31_t)0x5a6d9b70, (q31_t)0x3a49dd1a,
+    (q31_t)0x5a790cd4, (q31_t)0x3a44ab8e, (q31_t)0x5a847d33, (q31_t)0x3a3f77c3,
+    (q31_t)0x5a8fec8c, (q31_t)0x3a3a41b9, (q31_t)0x5a9b5adf, (q31_t)0x3a350970,
+    (q31_t)0x5aa6c82b, (q31_t)0x3a2fcee8, (q31_t)0x5ab23471, (q31_t)0x3a2a9223,
+    (q31_t)0x5abd9faf, (q31_t)0x3a25531f, (q31_t)0x5ac909e5, (q31_t)0x3a2011de,
+    (q31_t)0x5ad47312, (q31_t)0x3a1ace5f, (q31_t)0x5adfdb37, (q31_t)0x3a1588a2,
+    (q31_t)0x5aeb4253, (q31_t)0x3a1040a8, (q31_t)0x5af6a865, (q31_t)0x3a0af671,
+    (q31_t)0x5b020d6c, (q31_t)0x3a05a9fd, (q31_t)0x5b0d716a, (q31_t)0x3a005b4d,
+    (q31_t)0x5b18d45c, (q31_t)0x39fb0a60, (q31_t)0x5b243643, (q31_t)0x39f5b737,
+    (q31_t)0x5b2f971e, (q31_t)0x39f061d2, (q31_t)0x5b3af6ec, (q31_t)0x39eb0a31,
+    (q31_t)0x5b4655ae, (q31_t)0x39e5b054, (q31_t)0x5b51b363, (q31_t)0x39e0543c,
+    (q31_t)0x5b5d100a, (q31_t)0x39daf5e8, (q31_t)0x5b686ba3, (q31_t)0x39d5955a,
+    (q31_t)0x5b73c62d, (q31_t)0x39d03291, (q31_t)0x5b7f1fa9, (q31_t)0x39cacd8d,
+    (q31_t)0x5b8a7815, (q31_t)0x39c5664f, (q31_t)0x5b95cf71, (q31_t)0x39bffcd7,
+    (q31_t)0x5ba125bd, (q31_t)0x39ba9125, (q31_t)0x5bac7af9, (q31_t)0x39b52339,
+    (q31_t)0x5bb7cf23, (q31_t)0x39afb313, (q31_t)0x5bc3223c, (q31_t)0x39aa40b4,
+    (q31_t)0x5bce7442, (q31_t)0x39a4cc1c, (q31_t)0x5bd9c537, (q31_t)0x399f554b,
+    (q31_t)0x5be51518, (q31_t)0x3999dc42, (q31_t)0x5bf063e6, (q31_t)0x399460ff,
+    (q31_t)0x5bfbb1a0, (q31_t)0x398ee385, (q31_t)0x5c06fe46, (q31_t)0x398963d2,
+    (q31_t)0x5c1249d8, (q31_t)0x3983e1e8, (q31_t)0x5c1d9454, (q31_t)0x397e5dc6,
+    (q31_t)0x5c28ddbb, (q31_t)0x3978d76c, (q31_t)0x5c34260c, (q31_t)0x39734edc,
+    (q31_t)0x5c3f6d47, (q31_t)0x396dc414, (q31_t)0x5c4ab36b, (q31_t)0x39683715,
+    (q31_t)0x5c55f878, (q31_t)0x3962a7e0, (q31_t)0x5c613c6d, (q31_t)0x395d1675,
+    (q31_t)0x5c6c7f4a, (q31_t)0x395782d3, (q31_t)0x5c77c10e, (q31_t)0x3951ecfc,
+    (q31_t)0x5c8301b9, (q31_t)0x394c54ee, (q31_t)0x5c8e414b, (q31_t)0x3946baac,
+    (q31_t)0x5c997fc4, (q31_t)0x39411e33, (q31_t)0x5ca4bd21, (q31_t)0x393b7f86,
+    (q31_t)0x5caff965, (q31_t)0x3935dea4, (q31_t)0x5cbb348d, (q31_t)0x39303b8e,
+    (q31_t)0x5cc66e99, (q31_t)0x392a9642, (q31_t)0x5cd1a78a, (q31_t)0x3924eec3,
+    (q31_t)0x5cdcdf5e, (q31_t)0x391f4510, (q31_t)0x5ce81615, (q31_t)0x39199929,
+    (q31_t)0x5cf34baf, (q31_t)0x3913eb0e, (q31_t)0x5cfe802b, (q31_t)0x390e3ac0,
+    (q31_t)0x5d09b389, (q31_t)0x3908883f, (q31_t)0x5d14e5c9, (q31_t)0x3902d38b,
+    (q31_t)0x5d2016e9, (q31_t)0x38fd1ca4, (q31_t)0x5d2b46ea, (q31_t)0x38f7638b,
+    (q31_t)0x5d3675cb, (q31_t)0x38f1a840, (q31_t)0x5d41a38c, (q31_t)0x38ebeac2,
+    (q31_t)0x5d4cd02c, (q31_t)0x38e62b13, (q31_t)0x5d57fbaa, (q31_t)0x38e06932,
+    (q31_t)0x5d632608, (q31_t)0x38daa520, (q31_t)0x5d6e4f43, (q31_t)0x38d4dedd,
+    (q31_t)0x5d79775c, (q31_t)0x38cf1669, (q31_t)0x5d849e51, (q31_t)0x38c94bc4,
+    (q31_t)0x5d8fc424, (q31_t)0x38c37eef, (q31_t)0x5d9ae8d2, (q31_t)0x38bdafea,
+    (q31_t)0x5da60c5d, (q31_t)0x38b7deb4, (q31_t)0x5db12ec3, (q31_t)0x38b20b4f,
+    (q31_t)0x5dbc5004, (q31_t)0x38ac35ba, (q31_t)0x5dc7701f, (q31_t)0x38a65df6,
+    (q31_t)0x5dd28f15, (q31_t)0x38a08402, (q31_t)0x5dddace4, (q31_t)0x389aa7e0,
+    (q31_t)0x5de8c98c, (q31_t)0x3894c98f, (q31_t)0x5df3e50d, (q31_t)0x388ee910,
+    (q31_t)0x5dfeff67, (q31_t)0x38890663, (q31_t)0x5e0a1898, (q31_t)0x38832187,
+    (q31_t)0x5e1530a1, (q31_t)0x387d3a7e, (q31_t)0x5e204781, (q31_t)0x38775147,
+    (q31_t)0x5e2b5d38, (q31_t)0x387165e3, (q31_t)0x5e3671c5, (q31_t)0x386b7852,
+    (q31_t)0x5e418528, (q31_t)0x38658894, (q31_t)0x5e4c9760, (q31_t)0x385f96a9,
+    (q31_t)0x5e57a86d, (q31_t)0x3859a292, (q31_t)0x5e62b84f, (q31_t)0x3853ac4f,
+    (q31_t)0x5e6dc705, (q31_t)0x384db3e0, (q31_t)0x5e78d48e, (q31_t)0x3847b946,
+    (q31_t)0x5e83e0eb, (q31_t)0x3841bc7f, (q31_t)0x5e8eec1b, (q31_t)0x383bbd8e,
+    (q31_t)0x5e99f61d, (q31_t)0x3835bc71, (q31_t)0x5ea4fef0, (q31_t)0x382fb92a,
+    (q31_t)0x5eb00696, (q31_t)0x3829b3b9, (q31_t)0x5ebb0d0d, (q31_t)0x3823ac1d,
+    (q31_t)0x5ec61254, (q31_t)0x381da256, (q31_t)0x5ed1166b, (q31_t)0x38179666,
+    (q31_t)0x5edc1953, (q31_t)0x3811884d, (q31_t)0x5ee71b0a, (q31_t)0x380b780a,
+    (q31_t)0x5ef21b90, (q31_t)0x3805659e, (q31_t)0x5efd1ae4, (q31_t)0x37ff5109,
+    (q31_t)0x5f081907, (q31_t)0x37f93a4b, (q31_t)0x5f1315f7, (q31_t)0x37f32165,
+    (q31_t)0x5f1e11b5, (q31_t)0x37ed0657, (q31_t)0x5f290c3f, (q31_t)0x37e6e921,
+    (q31_t)0x5f340596, (q31_t)0x37e0c9c3, (q31_t)0x5f3efdb9, (q31_t)0x37daa83d,
+    (q31_t)0x5f49f4a8, (q31_t)0x37d48490, (q31_t)0x5f54ea62, (q31_t)0x37ce5ebd,
+    (q31_t)0x5f5fdee6, (q31_t)0x37c836c2, (q31_t)0x5f6ad235, (q31_t)0x37c20ca1,
+    (q31_t)0x5f75c44e, (q31_t)0x37bbe05a, (q31_t)0x5f80b531, (q31_t)0x37b5b1ec,
+    (q31_t)0x5f8ba4dc, (q31_t)0x37af8159, (q31_t)0x5f969350, (q31_t)0x37a94ea0,
+    (q31_t)0x5fa1808c, (q31_t)0x37a319c2, (q31_t)0x5fac6c91, (q31_t)0x379ce2be,
+    (q31_t)0x5fb7575c, (q31_t)0x3796a996, (q31_t)0x5fc240ef, (q31_t)0x37906e49,
+    (q31_t)0x5fcd2948, (q31_t)0x378a30d8, (q31_t)0x5fd81067, (q31_t)0x3783f143,
+    (q31_t)0x5fe2f64c, (q31_t)0x377daf89, (q31_t)0x5feddaf6, (q31_t)0x37776bac,
+    (q31_t)0x5ff8be65, (q31_t)0x377125ac, (q31_t)0x6003a099, (q31_t)0x376add88,
+    (q31_t)0x600e8190, (q31_t)0x37649341, (q31_t)0x6019614c, (q31_t)0x375e46d8,
+    (q31_t)0x60243fca, (q31_t)0x3757f84c, (q31_t)0x602f1d0b, (q31_t)0x3751a79e,
+    (q31_t)0x6039f90f, (q31_t)0x374b54ce, (q31_t)0x6044d3d4, (q31_t)0x3744ffdd,
+    (q31_t)0x604fad5b, (q31_t)0x373ea8ca, (q31_t)0x605a85a3, (q31_t)0x37384f95,
+    (q31_t)0x60655cac, (q31_t)0x3731f440, (q31_t)0x60703275, (q31_t)0x372b96ca,
+    (q31_t)0x607b06fe, (q31_t)0x37253733, (q31_t)0x6085da46, (q31_t)0x371ed57c,
+    (q31_t)0x6090ac4d, (q31_t)0x371871a5, (q31_t)0x609b7d13, (q31_t)0x37120bae,
+    (q31_t)0x60a64c97, (q31_t)0x370ba398, (q31_t)0x60b11ad9, (q31_t)0x37053962,
+    (q31_t)0x60bbe7d8, (q31_t)0x36fecd0e, (q31_t)0x60c6b395, (q31_t)0x36f85e9a,
+    (q31_t)0x60d17e0d, (q31_t)0x36f1ee09, (q31_t)0x60dc4742, (q31_t)0x36eb7b58,
+    (q31_t)0x60e70f32, (q31_t)0x36e5068a, (q31_t)0x60f1d5de, (q31_t)0x36de8f9e,
+    (q31_t)0x60fc9b44, (q31_t)0x36d81695, (q31_t)0x61075f65, (q31_t)0x36d19b6e,
+    (q31_t)0x61122240, (q31_t)0x36cb1e2a, (q31_t)0x611ce3d5, (q31_t)0x36c49ec9,
+    (q31_t)0x6127a423, (q31_t)0x36be1d4c, (q31_t)0x61326329, (q31_t)0x36b799b3,
+    (q31_t)0x613d20e8, (q31_t)0x36b113fd, (q31_t)0x6147dd5f, (q31_t)0x36aa8c2c,
+    (q31_t)0x6152988d, (q31_t)0x36a4023f, (q31_t)0x615d5273, (q31_t)0x369d7637,
+    (q31_t)0x61680b0f, (q31_t)0x3696e814, (q31_t)0x6172c262, (q31_t)0x369057d6,
+    (q31_t)0x617d786a, (q31_t)0x3689c57d, (q31_t)0x61882d28, (q31_t)0x3683310b,
+    (q31_t)0x6192e09b, (q31_t)0x367c9a7e, (q31_t)0x619d92c2, (q31_t)0x367601d7,
+    (q31_t)0x61a8439e, (q31_t)0x366f6717, (q31_t)0x61b2f32e, (q31_t)0x3668ca3e,
+    (q31_t)0x61bda171, (q31_t)0x36622b4c, (q31_t)0x61c84e67, (q31_t)0x365b8a41,
+    (q31_t)0x61d2fa0f, (q31_t)0x3654e71d, (q31_t)0x61dda46a, (q31_t)0x364e41e2,
+    (q31_t)0x61e84d76, (q31_t)0x36479a8e, (q31_t)0x61f2f534, (q31_t)0x3640f123,
+    (q31_t)0x61fd9ba3, (q31_t)0x363a45a0, (q31_t)0x620840c2, (q31_t)0x36339806,
+    (q31_t)0x6212e492, (q31_t)0x362ce855, (q31_t)0x621d8711, (q31_t)0x3626368d,
+    (q31_t)0x6228283f, (q31_t)0x361f82af, (q31_t)0x6232c81c, (q31_t)0x3618ccba,
+    (q31_t)0x623d66a8, (q31_t)0x361214b0, (q31_t)0x624803e2, (q31_t)0x360b5a90,
+    (q31_t)0x62529fca, (q31_t)0x36049e5b, (q31_t)0x625d3a5e, (q31_t)0x35fde011,
+    (q31_t)0x6267d3a0, (q31_t)0x35f71fb1, (q31_t)0x62726b8e, (q31_t)0x35f05d3d,
+    (q31_t)0x627d0228, (q31_t)0x35e998b5, (q31_t)0x6287976e, (q31_t)0x35e2d219,
+    (q31_t)0x62922b5e, (q31_t)0x35dc0968, (q31_t)0x629cbdfa, (q31_t)0x35d53ea5,
+    (q31_t)0x62a74f40, (q31_t)0x35ce71ce, (q31_t)0x62b1df30, (q31_t)0x35c7a2e3,
+    (q31_t)0x62bc6dca, (q31_t)0x35c0d1e7, (q31_t)0x62c6fb0c, (q31_t)0x35b9fed7,
+    (q31_t)0x62d186f8, (q31_t)0x35b329b5, (q31_t)0x62dc118c, (q31_t)0x35ac5282,
+    (q31_t)0x62e69ac8, (q31_t)0x35a5793c, (q31_t)0x62f122ab, (q31_t)0x359e9de5,
+    (q31_t)0x62fba936, (q31_t)0x3597c07d, (q31_t)0x63062e67, (q31_t)0x3590e104,
+    (q31_t)0x6310b23e, (q31_t)0x3589ff7a, (q31_t)0x631b34bc, (q31_t)0x35831be0,
+    (q31_t)0x6325b5df, (q31_t)0x357c3636, (q31_t)0x633035a7, (q31_t)0x35754e7c,
+    (q31_t)0x633ab414, (q31_t)0x356e64b2, (q31_t)0x63453125, (q31_t)0x356778d9,
+    (q31_t)0x634facda, (q31_t)0x35608af1, (q31_t)0x635a2733, (q31_t)0x35599afa,
+    (q31_t)0x6364a02e, (q31_t)0x3552a8f4, (q31_t)0x636f17cc, (q31_t)0x354bb4e1,
+    (q31_t)0x63798e0d, (q31_t)0x3544bebf, (q31_t)0x638402ef, (q31_t)0x353dc68f,
+    (q31_t)0x638e7673, (q31_t)0x3536cc52, (q31_t)0x6398e898, (q31_t)0x352fd008,
+    (q31_t)0x63a3595e, (q31_t)0x3528d1b1, (q31_t)0x63adc8c4, (q31_t)0x3521d14d,
+    (q31_t)0x63b836ca, (q31_t)0x351acedd, (q31_t)0x63c2a36f, (q31_t)0x3513ca60,
+    (q31_t)0x63cd0eb3, (q31_t)0x350cc3d8, (q31_t)0x63d77896, (q31_t)0x3505bb44,
+    (q31_t)0x63e1e117, (q31_t)0x34feb0a5, (q31_t)0x63ec4837, (q31_t)0x34f7a3fb,
+    (q31_t)0x63f6adf3, (q31_t)0x34f09546, (q31_t)0x6401124d, (q31_t)0x34e98487,
+    (q31_t)0x640b7543, (q31_t)0x34e271bd, (q31_t)0x6415d6d5, (q31_t)0x34db5cea,
+    (q31_t)0x64203704, (q31_t)0x34d4460c, (q31_t)0x642a95ce, (q31_t)0x34cd2d26,
+    (q31_t)0x6434f332, (q31_t)0x34c61236, (q31_t)0x643f4f32, (q31_t)0x34bef53d,
+    (q31_t)0x6449a9cc, (q31_t)0x34b7d63c, (q31_t)0x645402ff, (q31_t)0x34b0b533,
+    (q31_t)0x645e5acc, (q31_t)0x34a99221, (q31_t)0x6468b132, (q31_t)0x34a26d08,
+    (q31_t)0x64730631, (q31_t)0x349b45e7, (q31_t)0x647d59c8, (q31_t)0x34941cbf,
+    (q31_t)0x6487abf7, (q31_t)0x348cf190, (q31_t)0x6491fcbe, (q31_t)0x3485c45b,
+    (q31_t)0x649c4c1b, (q31_t)0x347e951f, (q31_t)0x64a69a0f, (q31_t)0x347763dd,
+    (q31_t)0x64b0e699, (q31_t)0x34703095, (q31_t)0x64bb31ba, (q31_t)0x3468fb47,
+    (q31_t)0x64c57b6f, (q31_t)0x3461c3f5, (q31_t)0x64cfc3ba, (q31_t)0x345a8a9d,
+    (q31_t)0x64da0a9a, (q31_t)0x34534f41, (q31_t)0x64e4500e, (q31_t)0x344c11e0,
+    (q31_t)0x64ee9415, (q31_t)0x3444d27b, (q31_t)0x64f8d6b0, (q31_t)0x343d9112,
+    (q31_t)0x650317df, (q31_t)0x34364da6, (q31_t)0x650d57a0, (q31_t)0x342f0836,
+    (q31_t)0x651795f3, (q31_t)0x3427c0c3, (q31_t)0x6521d2d8, (q31_t)0x3420774d,
+    (q31_t)0x652c0e4f, (q31_t)0x34192bd5, (q31_t)0x65364857, (q31_t)0x3411de5b,
+    (q31_t)0x654080ef, (q31_t)0x340a8edf, (q31_t)0x654ab818, (q31_t)0x34033d61,
+    (q31_t)0x6554edd1, (q31_t)0x33fbe9e2, (q31_t)0x655f2219, (q31_t)0x33f49462,
+    (q31_t)0x656954f1, (q31_t)0x33ed3ce1, (q31_t)0x65738657, (q31_t)0x33e5e360,
+    (q31_t)0x657db64c, (q31_t)0x33de87de, (q31_t)0x6587e4cf, (q31_t)0x33d72a5d,
+    (q31_t)0x659211df, (q31_t)0x33cfcadc, (q31_t)0x659c3d7c, (q31_t)0x33c8695b,
+    (q31_t)0x65a667a7, (q31_t)0x33c105db, (q31_t)0x65b0905d, (q31_t)0x33b9a05d,
+    (q31_t)0x65bab7a0, (q31_t)0x33b238e0, (q31_t)0x65c4dd6e, (q31_t)0x33aacf65,
+    (q31_t)0x65cf01c8, (q31_t)0x33a363ec, (q31_t)0x65d924ac, (q31_t)0x339bf675,
+    (q31_t)0x65e3461b, (q31_t)0x33948701, (q31_t)0x65ed6614, (q31_t)0x338d1590,
+    (q31_t)0x65f78497, (q31_t)0x3385a222, (q31_t)0x6601a1a2, (q31_t)0x337e2cb7,
+    (q31_t)0x660bbd37, (q31_t)0x3376b551, (q31_t)0x6615d754, (q31_t)0x336f3bee,
+    (q31_t)0x661feffa, (q31_t)0x3367c090, (q31_t)0x662a0727, (q31_t)0x33604336,
+    (q31_t)0x66341cdb, (q31_t)0x3358c3e2, (q31_t)0x663e3117, (q31_t)0x33514292,
+    (q31_t)0x664843d9, (q31_t)0x3349bf48, (q31_t)0x66525521, (q31_t)0x33423a04,
+    (q31_t)0x665c64ef, (q31_t)0x333ab2c6, (q31_t)0x66667342, (q31_t)0x3333298f,
+    (q31_t)0x6670801a, (q31_t)0x332b9e5e, (q31_t)0x667a8b77, (q31_t)0x33241134,
+    (q31_t)0x66849558, (q31_t)0x331c8211, (q31_t)0x668e9dbd, (q31_t)0x3314f0f6,
+    (q31_t)0x6698a4a6, (q31_t)0x330d5de3, (q31_t)0x66a2aa11, (q31_t)0x3305c8d7,
+    (q31_t)0x66acadff, (q31_t)0x32fe31d5, (q31_t)0x66b6b070, (q31_t)0x32f698db,
+    (q31_t)0x66c0b162, (q31_t)0x32eefdea, (q31_t)0x66cab0d6, (q31_t)0x32e76102,
+    (q31_t)0x66d4aecb, (q31_t)0x32dfc224, (q31_t)0x66deab41, (q31_t)0x32d82150,
+    (q31_t)0x66e8a637, (q31_t)0x32d07e85, (q31_t)0x66f29fad, (q31_t)0x32c8d9c6,
+    (q31_t)0x66fc97a3, (q31_t)0x32c13311, (q31_t)0x67068e18, (q31_t)0x32b98a67,
+    (q31_t)0x6710830c, (q31_t)0x32b1dfc9, (q31_t)0x671a767e, (q31_t)0x32aa3336,
+    (q31_t)0x6724686e, (q31_t)0x32a284b0, (q31_t)0x672e58dc, (q31_t)0x329ad435,
+    (q31_t)0x673847c8, (q31_t)0x329321c7, (q31_t)0x67423530, (q31_t)0x328b6d66,
+    (q31_t)0x674c2115, (q31_t)0x3283b712, (q31_t)0x67560b76, (q31_t)0x327bfecc,
+    (q31_t)0x675ff452, (q31_t)0x32744493, (q31_t)0x6769dbaa, (q31_t)0x326c8868,
+    (q31_t)0x6773c17d, (q31_t)0x3264ca4c, (q31_t)0x677da5cb, (q31_t)0x325d0a3e,
+    (q31_t)0x67878893, (q31_t)0x32554840, (q31_t)0x679169d5, (q31_t)0x324d8450,
+    (q31_t)0x679b4990, (q31_t)0x3245be70, (q31_t)0x67a527c4, (q31_t)0x323df6a0,
+    (q31_t)0x67af0472, (q31_t)0x32362ce0, (q31_t)0x67b8df97, (q31_t)0x322e6130,
+    (q31_t)0x67c2b934, (q31_t)0x32269391, (q31_t)0x67cc9149, (q31_t)0x321ec403,
+    (q31_t)0x67d667d5, (q31_t)0x3216f287, (q31_t)0x67e03cd8, (q31_t)0x320f1f1c,
+    (q31_t)0x67ea1052, (q31_t)0x320749c3, (q31_t)0x67f3e241, (q31_t)0x31ff727c,
+    (q31_t)0x67fdb2a7, (q31_t)0x31f79948, (q31_t)0x68078181, (q31_t)0x31efbe27,
+    (q31_t)0x68114ed0, (q31_t)0x31e7e118, (q31_t)0x681b1a94, (q31_t)0x31e0021e,
+    (q31_t)0x6824e4cc, (q31_t)0x31d82137, (q31_t)0x682ead78, (q31_t)0x31d03e64,
+    (q31_t)0x68387498, (q31_t)0x31c859a5, (q31_t)0x68423a2a, (q31_t)0x31c072fb,
+    (q31_t)0x684bfe2f, (q31_t)0x31b88a66, (q31_t)0x6855c0a6, (q31_t)0x31b09fe7,
+    (q31_t)0x685f8190, (q31_t)0x31a8b37c, (q31_t)0x686940ea, (q31_t)0x31a0c528,
+    (q31_t)0x6872feb6, (q31_t)0x3198d4ea, (q31_t)0x687cbaf3, (q31_t)0x3190e2c3,
+    (q31_t)0x688675a0, (q31_t)0x3188eeb2, (q31_t)0x68902ebd, (q31_t)0x3180f8b8,
+    (q31_t)0x6899e64a, (q31_t)0x317900d6, (q31_t)0x68a39c46, (q31_t)0x3171070c,
+    (q31_t)0x68ad50b1, (q31_t)0x31690b59, (q31_t)0x68b7038b, (q31_t)0x31610dbf,
+    (q31_t)0x68c0b4d2, (q31_t)0x31590e3e, (q31_t)0x68ca6488, (q31_t)0x31510cd5,
+    (q31_t)0x68d412ab, (q31_t)0x31490986, (q31_t)0x68ddbf3b, (q31_t)0x31410450,
+    (q31_t)0x68e76a37, (q31_t)0x3138fd35, (q31_t)0x68f113a0, (q31_t)0x3130f433,
+    (q31_t)0x68fabb75, (q31_t)0x3128e94c, (q31_t)0x690461b5, (q31_t)0x3120dc80,
+    (q31_t)0x690e0661, (q31_t)0x3118cdcf, (q31_t)0x6917a977, (q31_t)0x3110bd39,
+    (q31_t)0x69214af8, (q31_t)0x3108aabf, (q31_t)0x692aeae3, (q31_t)0x31009661,
+    (q31_t)0x69348937, (q31_t)0x30f8801f, (q31_t)0x693e25f5, (q31_t)0x30f067fb,
+    (q31_t)0x6947c11c, (q31_t)0x30e84df3, (q31_t)0x69515aab, (q31_t)0x30e03208,
+    (q31_t)0x695af2a3, (q31_t)0x30d8143b, (q31_t)0x69648902, (q31_t)0x30cff48c,
+    (q31_t)0x696e1dc9, (q31_t)0x30c7d2fb, (q31_t)0x6977b0f7, (q31_t)0x30bfaf89,
+    (q31_t)0x6981428c, (q31_t)0x30b78a36, (q31_t)0x698ad287, (q31_t)0x30af6302,
+    (q31_t)0x699460e8, (q31_t)0x30a739ed, (q31_t)0x699dedaf, (q31_t)0x309f0ef8,
+    (q31_t)0x69a778db, (q31_t)0x3096e223, (q31_t)0x69b1026c, (q31_t)0x308eb36f,
+    (q31_t)0x69ba8a61, (q31_t)0x308682dc, (q31_t)0x69c410ba, (q31_t)0x307e5069,
+    (q31_t)0x69cd9578, (q31_t)0x30761c18, (q31_t)0x69d71899, (q31_t)0x306de5e9,
+    (q31_t)0x69e09a1c, (q31_t)0x3065addb, (q31_t)0x69ea1a03, (q31_t)0x305d73f0,
+    (q31_t)0x69f3984c, (q31_t)0x30553828, (q31_t)0x69fd14f6, (q31_t)0x304cfa83,
+    (q31_t)0x6a069003, (q31_t)0x3044bb00, (q31_t)0x6a100970, (q31_t)0x303c79a2,
+    (q31_t)0x6a19813f, (q31_t)0x30343667, (q31_t)0x6a22f76e, (q31_t)0x302bf151,
+    (q31_t)0x6a2c6bfd, (q31_t)0x3023aa5f, (q31_t)0x6a35deeb, (q31_t)0x301b6193,
+    (q31_t)0x6a3f503a, (q31_t)0x301316eb, (q31_t)0x6a48bfe7, (q31_t)0x300aca69,
+    (q31_t)0x6a522df3, (q31_t)0x30027c0c, (q31_t)0x6a5b9a5d, (q31_t)0x2ffa2bd6,
+    (q31_t)0x6a650525, (q31_t)0x2ff1d9c7, (q31_t)0x6a6e6e4b, (q31_t)0x2fe985de,
+    (q31_t)0x6a77d5ce, (q31_t)0x2fe1301c, (q31_t)0x6a813bae, (q31_t)0x2fd8d882,
+    (q31_t)0x6a8a9fea, (q31_t)0x2fd07f0f, (q31_t)0x6a940283, (q31_t)0x2fc823c5,
+    (q31_t)0x6a9d6377, (q31_t)0x2fbfc6a3, (q31_t)0x6aa6c2c6, (q31_t)0x2fb767aa,
+    (q31_t)0x6ab02071, (q31_t)0x2faf06da, (q31_t)0x6ab97c77, (q31_t)0x2fa6a433,
+    (q31_t)0x6ac2d6d6, (q31_t)0x2f9e3fb6, (q31_t)0x6acc2f90, (q31_t)0x2f95d963,
+    (q31_t)0x6ad586a3, (q31_t)0x2f8d713a, (q31_t)0x6adedc10, (q31_t)0x2f85073c,
+    (q31_t)0x6ae82fd5, (q31_t)0x2f7c9b69, (q31_t)0x6af181f3, (q31_t)0x2f742dc1,
+    (q31_t)0x6afad269, (q31_t)0x2f6bbe45, (q31_t)0x6b042137, (q31_t)0x2f634cf5,
+    (q31_t)0x6b0d6e5c, (q31_t)0x2f5ad9d1, (q31_t)0x6b16b9d9, (q31_t)0x2f5264da,
+    (q31_t)0x6b2003ac, (q31_t)0x2f49ee0f, (q31_t)0x6b294bd5, (q31_t)0x2f417573,
+    (q31_t)0x6b329255, (q31_t)0x2f38fb03, (q31_t)0x6b3bd72a, (q31_t)0x2f307ec2,
+    (q31_t)0x6b451a55, (q31_t)0x2f2800af, (q31_t)0x6b4e5bd4, (q31_t)0x2f1f80ca,
+    (q31_t)0x6b579ba8, (q31_t)0x2f16ff14, (q31_t)0x6b60d9d0, (q31_t)0x2f0e7b8e,
+    (q31_t)0x6b6a164d, (q31_t)0x2f05f637, (q31_t)0x6b73511c, (q31_t)0x2efd6f10,
+    (q31_t)0x6b7c8a3f, (q31_t)0x2ef4e619, (q31_t)0x6b85c1b5, (q31_t)0x2eec5b53,
+    (q31_t)0x6b8ef77d, (q31_t)0x2ee3cebe, (q31_t)0x6b982b97, (q31_t)0x2edb405a,
+    (q31_t)0x6ba15e03, (q31_t)0x2ed2b027, (q31_t)0x6baa8ec0, (q31_t)0x2eca1e27,
+    (q31_t)0x6bb3bdce, (q31_t)0x2ec18a58, (q31_t)0x6bbceb2d, (q31_t)0x2eb8f4bc,
+    (q31_t)0x6bc616dd, (q31_t)0x2eb05d53, (q31_t)0x6bcf40dc, (q31_t)0x2ea7c41e,
+    (q31_t)0x6bd8692b, (q31_t)0x2e9f291b, (q31_t)0x6be18fc9, (q31_t)0x2e968c4d,
+    (q31_t)0x6beab4b6, (q31_t)0x2e8dedb3, (q31_t)0x6bf3d7f2, (q31_t)0x2e854d4d,
+    (q31_t)0x6bfcf97c, (q31_t)0x2e7cab1c, (q31_t)0x6c061953, (q31_t)0x2e740720,
+    (q31_t)0x6c0f3779, (q31_t)0x2e6b615a, (q31_t)0x6c1853eb, (q31_t)0x2e62b9ca,
+    (q31_t)0x6c216eaa, (q31_t)0x2e5a1070, (q31_t)0x6c2a87b6, (q31_t)0x2e51654c,
+    (q31_t)0x6c339f0e, (q31_t)0x2e48b860, (q31_t)0x6c3cb4b1, (q31_t)0x2e4009aa,
+    (q31_t)0x6c45c8a0, (q31_t)0x2e37592c, (q31_t)0x6c4edada, (q31_t)0x2e2ea6e6,
+    (q31_t)0x6c57eb5e, (q31_t)0x2e25f2d8, (q31_t)0x6c60fa2d, (q31_t)0x2e1d3d03,
+    (q31_t)0x6c6a0746, (q31_t)0x2e148566, (q31_t)0x6c7312a9, (q31_t)0x2e0bcc03,
+    (q31_t)0x6c7c1c55, (q31_t)0x2e0310d9, (q31_t)0x6c85244a, (q31_t)0x2dfa53e9,
+    (q31_t)0x6c8e2a87, (q31_t)0x2df19534, (q31_t)0x6c972f0d, (q31_t)0x2de8d4b8,
+    (q31_t)0x6ca031da, (q31_t)0x2de01278, (q31_t)0x6ca932ef, (q31_t)0x2dd74e73,
+    (q31_t)0x6cb2324c, (q31_t)0x2dce88aa, (q31_t)0x6cbb2fef, (q31_t)0x2dc5c11c,
+    (q31_t)0x6cc42bd9, (q31_t)0x2dbcf7cb, (q31_t)0x6ccd2609, (q31_t)0x2db42cb6,
+    (q31_t)0x6cd61e7f, (q31_t)0x2dab5fdf, (q31_t)0x6cdf153a, (q31_t)0x2da29144,
+    (q31_t)0x6ce80a3a, (q31_t)0x2d99c0e7, (q31_t)0x6cf0fd80, (q31_t)0x2d90eec8,
+    (q31_t)0x6cf9ef09, (q31_t)0x2d881ae8, (q31_t)0x6d02ded7, (q31_t)0x2d7f4545,
+    (q31_t)0x6d0bcce8, (q31_t)0x2d766de2, (q31_t)0x6d14b93d, (q31_t)0x2d6d94bf,
+    (q31_t)0x6d1da3d5, (q31_t)0x2d64b9da, (q31_t)0x6d268cb0, (q31_t)0x2d5bdd36,
+    (q31_t)0x6d2f73cd, (q31_t)0x2d52fed2, (q31_t)0x6d38592c, (q31_t)0x2d4a1eaf,
+    (q31_t)0x6d413ccd, (q31_t)0x2d413ccd, (q31_t)0x6d4a1eaf, (q31_t)0x2d38592c,
+    (q31_t)0x6d52fed2, (q31_t)0x2d2f73cd, (q31_t)0x6d5bdd36, (q31_t)0x2d268cb0,
+    (q31_t)0x6d64b9da, (q31_t)0x2d1da3d5, (q31_t)0x6d6d94bf, (q31_t)0x2d14b93d,
+    (q31_t)0x6d766de2, (q31_t)0x2d0bcce8, (q31_t)0x6d7f4545, (q31_t)0x2d02ded7,
+    (q31_t)0x6d881ae8, (q31_t)0x2cf9ef09, (q31_t)0x6d90eec8, (q31_t)0x2cf0fd80,
+    (q31_t)0x6d99c0e7, (q31_t)0x2ce80a3a, (q31_t)0x6da29144, (q31_t)0x2cdf153a,
+    (q31_t)0x6dab5fdf, (q31_t)0x2cd61e7f, (q31_t)0x6db42cb6, (q31_t)0x2ccd2609,
+    (q31_t)0x6dbcf7cb, (q31_t)0x2cc42bd9, (q31_t)0x6dc5c11c, (q31_t)0x2cbb2fef,
+    (q31_t)0x6dce88aa, (q31_t)0x2cb2324c, (q31_t)0x6dd74e73, (q31_t)0x2ca932ef,
+    (q31_t)0x6de01278, (q31_t)0x2ca031da, (q31_t)0x6de8d4b8, (q31_t)0x2c972f0d,
+    (q31_t)0x6df19534, (q31_t)0x2c8e2a87, (q31_t)0x6dfa53e9, (q31_t)0x2c85244a,
+    (q31_t)0x6e0310d9, (q31_t)0x2c7c1c55, (q31_t)0x6e0bcc03, (q31_t)0x2c7312a9,
+    (q31_t)0x6e148566, (q31_t)0x2c6a0746, (q31_t)0x6e1d3d03, (q31_t)0x2c60fa2d,
+    (q31_t)0x6e25f2d8, (q31_t)0x2c57eb5e, (q31_t)0x6e2ea6e6, (q31_t)0x2c4edada,
+    (q31_t)0x6e37592c, (q31_t)0x2c45c8a0, (q31_t)0x6e4009aa, (q31_t)0x2c3cb4b1,
+    (q31_t)0x6e48b860, (q31_t)0x2c339f0e, (q31_t)0x6e51654c, (q31_t)0x2c2a87b6,
+    (q31_t)0x6e5a1070, (q31_t)0x2c216eaa, (q31_t)0x6e62b9ca, (q31_t)0x2c1853eb,
+    (q31_t)0x6e6b615a, (q31_t)0x2c0f3779, (q31_t)0x6e740720, (q31_t)0x2c061953,
+    (q31_t)0x6e7cab1c, (q31_t)0x2bfcf97c, (q31_t)0x6e854d4d, (q31_t)0x2bf3d7f2,
+    (q31_t)0x6e8dedb3, (q31_t)0x2beab4b6, (q31_t)0x6e968c4d, (q31_t)0x2be18fc9,
+    (q31_t)0x6e9f291b, (q31_t)0x2bd8692b, (q31_t)0x6ea7c41e, (q31_t)0x2bcf40dc,
+    (q31_t)0x6eb05d53, (q31_t)0x2bc616dd, (q31_t)0x6eb8f4bc, (q31_t)0x2bbceb2d,
+    (q31_t)0x6ec18a58, (q31_t)0x2bb3bdce, (q31_t)0x6eca1e27, (q31_t)0x2baa8ec0,
+    (q31_t)0x6ed2b027, (q31_t)0x2ba15e03, (q31_t)0x6edb405a, (q31_t)0x2b982b97,
+    (q31_t)0x6ee3cebe, (q31_t)0x2b8ef77d, (q31_t)0x6eec5b53, (q31_t)0x2b85c1b5,
+    (q31_t)0x6ef4e619, (q31_t)0x2b7c8a3f, (q31_t)0x6efd6f10, (q31_t)0x2b73511c,
+    (q31_t)0x6f05f637, (q31_t)0x2b6a164d, (q31_t)0x6f0e7b8e, (q31_t)0x2b60d9d0,
+    (q31_t)0x6f16ff14, (q31_t)0x2b579ba8, (q31_t)0x6f1f80ca, (q31_t)0x2b4e5bd4,
+    (q31_t)0x6f2800af, (q31_t)0x2b451a55, (q31_t)0x6f307ec2, (q31_t)0x2b3bd72a,
+    (q31_t)0x6f38fb03, (q31_t)0x2b329255, (q31_t)0x6f417573, (q31_t)0x2b294bd5,
+    (q31_t)0x6f49ee0f, (q31_t)0x2b2003ac, (q31_t)0x6f5264da, (q31_t)0x2b16b9d9,
+    (q31_t)0x6f5ad9d1, (q31_t)0x2b0d6e5c, (q31_t)0x6f634cf5, (q31_t)0x2b042137,
+    (q31_t)0x6f6bbe45, (q31_t)0x2afad269, (q31_t)0x6f742dc1, (q31_t)0x2af181f3,
+    (q31_t)0x6f7c9b69, (q31_t)0x2ae82fd5, (q31_t)0x6f85073c, (q31_t)0x2adedc10,
+    (q31_t)0x6f8d713a, (q31_t)0x2ad586a3, (q31_t)0x6f95d963, (q31_t)0x2acc2f90,
+    (q31_t)0x6f9e3fb6, (q31_t)0x2ac2d6d6, (q31_t)0x6fa6a433, (q31_t)0x2ab97c77,
+    (q31_t)0x6faf06da, (q31_t)0x2ab02071, (q31_t)0x6fb767aa, (q31_t)0x2aa6c2c6,
+    (q31_t)0x6fbfc6a3, (q31_t)0x2a9d6377, (q31_t)0x6fc823c5, (q31_t)0x2a940283,
+    (q31_t)0x6fd07f0f, (q31_t)0x2a8a9fea, (q31_t)0x6fd8d882, (q31_t)0x2a813bae,
+    (q31_t)0x6fe1301c, (q31_t)0x2a77d5ce, (q31_t)0x6fe985de, (q31_t)0x2a6e6e4b,
+    (q31_t)0x6ff1d9c7, (q31_t)0x2a650525, (q31_t)0x6ffa2bd6, (q31_t)0x2a5b9a5d,
+    (q31_t)0x70027c0c, (q31_t)0x2a522df3, (q31_t)0x700aca69, (q31_t)0x2a48bfe7,
+    (q31_t)0x701316eb, (q31_t)0x2a3f503a, (q31_t)0x701b6193, (q31_t)0x2a35deeb,
+    (q31_t)0x7023aa5f, (q31_t)0x2a2c6bfd, (q31_t)0x702bf151, (q31_t)0x2a22f76e,
+    (q31_t)0x70343667, (q31_t)0x2a19813f, (q31_t)0x703c79a2, (q31_t)0x2a100970,
+    (q31_t)0x7044bb00, (q31_t)0x2a069003, (q31_t)0x704cfa83, (q31_t)0x29fd14f6,
+    (q31_t)0x70553828, (q31_t)0x29f3984c, (q31_t)0x705d73f0, (q31_t)0x29ea1a03,
+    (q31_t)0x7065addb, (q31_t)0x29e09a1c, (q31_t)0x706de5e9, (q31_t)0x29d71899,
+    (q31_t)0x70761c18, (q31_t)0x29cd9578, (q31_t)0x707e5069, (q31_t)0x29c410ba,
+    (q31_t)0x708682dc, (q31_t)0x29ba8a61, (q31_t)0x708eb36f, (q31_t)0x29b1026c,
+    (q31_t)0x7096e223, (q31_t)0x29a778db, (q31_t)0x709f0ef8, (q31_t)0x299dedaf,
+    (q31_t)0x70a739ed, (q31_t)0x299460e8, (q31_t)0x70af6302, (q31_t)0x298ad287,
+    (q31_t)0x70b78a36, (q31_t)0x2981428c, (q31_t)0x70bfaf89, (q31_t)0x2977b0f7,
+    (q31_t)0x70c7d2fb, (q31_t)0x296e1dc9, (q31_t)0x70cff48c, (q31_t)0x29648902,
+    (q31_t)0x70d8143b, (q31_t)0x295af2a3, (q31_t)0x70e03208, (q31_t)0x29515aab,
+    (q31_t)0x70e84df3, (q31_t)0x2947c11c, (q31_t)0x70f067fb, (q31_t)0x293e25f5,
+    (q31_t)0x70f8801f, (q31_t)0x29348937, (q31_t)0x71009661, (q31_t)0x292aeae3,
+    (q31_t)0x7108aabf, (q31_t)0x29214af8, (q31_t)0x7110bd39, (q31_t)0x2917a977,
+    (q31_t)0x7118cdcf, (q31_t)0x290e0661, (q31_t)0x7120dc80, (q31_t)0x290461b5,
+    (q31_t)0x7128e94c, (q31_t)0x28fabb75, (q31_t)0x7130f433, (q31_t)0x28f113a0,
+    (q31_t)0x7138fd35, (q31_t)0x28e76a37, (q31_t)0x71410450, (q31_t)0x28ddbf3b,
+    (q31_t)0x71490986, (q31_t)0x28d412ab, (q31_t)0x71510cd5, (q31_t)0x28ca6488,
+    (q31_t)0x71590e3e, (q31_t)0x28c0b4d2, (q31_t)0x71610dbf, (q31_t)0x28b7038b,
+    (q31_t)0x71690b59, (q31_t)0x28ad50b1, (q31_t)0x7171070c, (q31_t)0x28a39c46,
+    (q31_t)0x717900d6, (q31_t)0x2899e64a, (q31_t)0x7180f8b8, (q31_t)0x28902ebd,
+    (q31_t)0x7188eeb2, (q31_t)0x288675a0, (q31_t)0x7190e2c3, (q31_t)0x287cbaf3,
+    (q31_t)0x7198d4ea, (q31_t)0x2872feb6, (q31_t)0x71a0c528, (q31_t)0x286940ea,
+    (q31_t)0x71a8b37c, (q31_t)0x285f8190, (q31_t)0x71b09fe7, (q31_t)0x2855c0a6,
+    (q31_t)0x71b88a66, (q31_t)0x284bfe2f, (q31_t)0x71c072fb, (q31_t)0x28423a2a,
+    (q31_t)0x71c859a5, (q31_t)0x28387498, (q31_t)0x71d03e64, (q31_t)0x282ead78,
+    (q31_t)0x71d82137, (q31_t)0x2824e4cc, (q31_t)0x71e0021e, (q31_t)0x281b1a94,
+    (q31_t)0x71e7e118, (q31_t)0x28114ed0, (q31_t)0x71efbe27, (q31_t)0x28078181,
+    (q31_t)0x71f79948, (q31_t)0x27fdb2a7, (q31_t)0x71ff727c, (q31_t)0x27f3e241,
+    (q31_t)0x720749c3, (q31_t)0x27ea1052, (q31_t)0x720f1f1c, (q31_t)0x27e03cd8,
+    (q31_t)0x7216f287, (q31_t)0x27d667d5, (q31_t)0x721ec403, (q31_t)0x27cc9149,
+    (q31_t)0x72269391, (q31_t)0x27c2b934, (q31_t)0x722e6130, (q31_t)0x27b8df97,
+    (q31_t)0x72362ce0, (q31_t)0x27af0472, (q31_t)0x723df6a0, (q31_t)0x27a527c4,
+    (q31_t)0x7245be70, (q31_t)0x279b4990, (q31_t)0x724d8450, (q31_t)0x279169d5,
+    (q31_t)0x72554840, (q31_t)0x27878893, (q31_t)0x725d0a3e, (q31_t)0x277da5cb,
+    (q31_t)0x7264ca4c, (q31_t)0x2773c17d, (q31_t)0x726c8868, (q31_t)0x2769dbaa,
+    (q31_t)0x72744493, (q31_t)0x275ff452, (q31_t)0x727bfecc, (q31_t)0x27560b76,
+    (q31_t)0x7283b712, (q31_t)0x274c2115, (q31_t)0x728b6d66, (q31_t)0x27423530,
+    (q31_t)0x729321c7, (q31_t)0x273847c8, (q31_t)0x729ad435, (q31_t)0x272e58dc,
+    (q31_t)0x72a284b0, (q31_t)0x2724686e, (q31_t)0x72aa3336, (q31_t)0x271a767e,
+    (q31_t)0x72b1dfc9, (q31_t)0x2710830c, (q31_t)0x72b98a67, (q31_t)0x27068e18,
+    (q31_t)0x72c13311, (q31_t)0x26fc97a3, (q31_t)0x72c8d9c6, (q31_t)0x26f29fad,
+    (q31_t)0x72d07e85, (q31_t)0x26e8a637, (q31_t)0x72d82150, (q31_t)0x26deab41,
+    (q31_t)0x72dfc224, (q31_t)0x26d4aecb, (q31_t)0x72e76102, (q31_t)0x26cab0d6,
+    (q31_t)0x72eefdea, (q31_t)0x26c0b162, (q31_t)0x72f698db, (q31_t)0x26b6b070,
+    (q31_t)0x72fe31d5, (q31_t)0x26acadff, (q31_t)0x7305c8d7, (q31_t)0x26a2aa11,
+    (q31_t)0x730d5de3, (q31_t)0x2698a4a6, (q31_t)0x7314f0f6, (q31_t)0x268e9dbd,
+    (q31_t)0x731c8211, (q31_t)0x26849558, (q31_t)0x73241134, (q31_t)0x267a8b77,
+    (q31_t)0x732b9e5e, (q31_t)0x2670801a, (q31_t)0x7333298f, (q31_t)0x26667342,
+    (q31_t)0x733ab2c6, (q31_t)0x265c64ef, (q31_t)0x73423a04, (q31_t)0x26525521,
+    (q31_t)0x7349bf48, (q31_t)0x264843d9, (q31_t)0x73514292, (q31_t)0x263e3117,
+    (q31_t)0x7358c3e2, (q31_t)0x26341cdb, (q31_t)0x73604336, (q31_t)0x262a0727,
+    (q31_t)0x7367c090, (q31_t)0x261feffa, (q31_t)0x736f3bee, (q31_t)0x2615d754,
+    (q31_t)0x7376b551, (q31_t)0x260bbd37, (q31_t)0x737e2cb7, (q31_t)0x2601a1a2,
+    (q31_t)0x7385a222, (q31_t)0x25f78497, (q31_t)0x738d1590, (q31_t)0x25ed6614,
+    (q31_t)0x73948701, (q31_t)0x25e3461b, (q31_t)0x739bf675, (q31_t)0x25d924ac,
+    (q31_t)0x73a363ec, (q31_t)0x25cf01c8, (q31_t)0x73aacf65, (q31_t)0x25c4dd6e,
+    (q31_t)0x73b238e0, (q31_t)0x25bab7a0, (q31_t)0x73b9a05d, (q31_t)0x25b0905d,
+    (q31_t)0x73c105db, (q31_t)0x25a667a7, (q31_t)0x73c8695b, (q31_t)0x259c3d7c,
+    (q31_t)0x73cfcadc, (q31_t)0x259211df, (q31_t)0x73d72a5d, (q31_t)0x2587e4cf,
+    (q31_t)0x73de87de, (q31_t)0x257db64c, (q31_t)0x73e5e360, (q31_t)0x25738657,
+    (q31_t)0x73ed3ce1, (q31_t)0x256954f1, (q31_t)0x73f49462, (q31_t)0x255f2219,
+    (q31_t)0x73fbe9e2, (q31_t)0x2554edd1, (q31_t)0x74033d61, (q31_t)0x254ab818,
+    (q31_t)0x740a8edf, (q31_t)0x254080ef, (q31_t)0x7411de5b, (q31_t)0x25364857,
+    (q31_t)0x74192bd5, (q31_t)0x252c0e4f, (q31_t)0x7420774d, (q31_t)0x2521d2d8,
+    (q31_t)0x7427c0c3, (q31_t)0x251795f3, (q31_t)0x742f0836, (q31_t)0x250d57a0,
+    (q31_t)0x74364da6, (q31_t)0x250317df, (q31_t)0x743d9112, (q31_t)0x24f8d6b0,
+    (q31_t)0x7444d27b, (q31_t)0x24ee9415, (q31_t)0x744c11e0, (q31_t)0x24e4500e,
+    (q31_t)0x74534f41, (q31_t)0x24da0a9a, (q31_t)0x745a8a9d, (q31_t)0x24cfc3ba,
+    (q31_t)0x7461c3f5, (q31_t)0x24c57b6f, (q31_t)0x7468fb47, (q31_t)0x24bb31ba,
+    (q31_t)0x74703095, (q31_t)0x24b0e699, (q31_t)0x747763dd, (q31_t)0x24a69a0f,
+    (q31_t)0x747e951f, (q31_t)0x249c4c1b, (q31_t)0x7485c45b, (q31_t)0x2491fcbe,
+    (q31_t)0x748cf190, (q31_t)0x2487abf7, (q31_t)0x74941cbf, (q31_t)0x247d59c8,
+    (q31_t)0x749b45e7, (q31_t)0x24730631, (q31_t)0x74a26d08, (q31_t)0x2468b132,
+    (q31_t)0x74a99221, (q31_t)0x245e5acc, (q31_t)0x74b0b533, (q31_t)0x245402ff,
+    (q31_t)0x74b7d63c, (q31_t)0x2449a9cc, (q31_t)0x74bef53d, (q31_t)0x243f4f32,
+    (q31_t)0x74c61236, (q31_t)0x2434f332, (q31_t)0x74cd2d26, (q31_t)0x242a95ce,
+    (q31_t)0x74d4460c, (q31_t)0x24203704, (q31_t)0x74db5cea, (q31_t)0x2415d6d5,
+    (q31_t)0x74e271bd, (q31_t)0x240b7543, (q31_t)0x74e98487, (q31_t)0x2401124d,
+    (q31_t)0x74f09546, (q31_t)0x23f6adf3, (q31_t)0x74f7a3fb, (q31_t)0x23ec4837,
+    (q31_t)0x74feb0a5, (q31_t)0x23e1e117, (q31_t)0x7505bb44, (q31_t)0x23d77896,
+    (q31_t)0x750cc3d8, (q31_t)0x23cd0eb3, (q31_t)0x7513ca60, (q31_t)0x23c2a36f,
+    (q31_t)0x751acedd, (q31_t)0x23b836ca, (q31_t)0x7521d14d, (q31_t)0x23adc8c4,
+    (q31_t)0x7528d1b1, (q31_t)0x23a3595e, (q31_t)0x752fd008, (q31_t)0x2398e898,
+    (q31_t)0x7536cc52, (q31_t)0x238e7673, (q31_t)0x753dc68f, (q31_t)0x238402ef,
+    (q31_t)0x7544bebf, (q31_t)0x23798e0d, (q31_t)0x754bb4e1, (q31_t)0x236f17cc,
+    (q31_t)0x7552a8f4, (q31_t)0x2364a02e, (q31_t)0x75599afa, (q31_t)0x235a2733,
+    (q31_t)0x75608af1, (q31_t)0x234facda, (q31_t)0x756778d9, (q31_t)0x23453125,
+    (q31_t)0x756e64b2, (q31_t)0x233ab414, (q31_t)0x75754e7c, (q31_t)0x233035a7,
+    (q31_t)0x757c3636, (q31_t)0x2325b5df, (q31_t)0x75831be0, (q31_t)0x231b34bc,
+    (q31_t)0x7589ff7a, (q31_t)0x2310b23e, (q31_t)0x7590e104, (q31_t)0x23062e67,
+    (q31_t)0x7597c07d, (q31_t)0x22fba936, (q31_t)0x759e9de5, (q31_t)0x22f122ab,
+    (q31_t)0x75a5793c, (q31_t)0x22e69ac8, (q31_t)0x75ac5282, (q31_t)0x22dc118c,
+    (q31_t)0x75b329b5, (q31_t)0x22d186f8, (q31_t)0x75b9fed7, (q31_t)0x22c6fb0c,
+    (q31_t)0x75c0d1e7, (q31_t)0x22bc6dca, (q31_t)0x75c7a2e3, (q31_t)0x22b1df30,
+    (q31_t)0x75ce71ce, (q31_t)0x22a74f40, (q31_t)0x75d53ea5, (q31_t)0x229cbdfa,
+    (q31_t)0x75dc0968, (q31_t)0x22922b5e, (q31_t)0x75e2d219, (q31_t)0x2287976e,
+    (q31_t)0x75e998b5, (q31_t)0x227d0228, (q31_t)0x75f05d3d, (q31_t)0x22726b8e,
+    (q31_t)0x75f71fb1, (q31_t)0x2267d3a0, (q31_t)0x75fde011, (q31_t)0x225d3a5e,
+    (q31_t)0x76049e5b, (q31_t)0x22529fca, (q31_t)0x760b5a90, (q31_t)0x224803e2,
+    (q31_t)0x761214b0, (q31_t)0x223d66a8, (q31_t)0x7618ccba, (q31_t)0x2232c81c,
+    (q31_t)0x761f82af, (q31_t)0x2228283f, (q31_t)0x7626368d, (q31_t)0x221d8711,
+    (q31_t)0x762ce855, (q31_t)0x2212e492, (q31_t)0x76339806, (q31_t)0x220840c2,
+    (q31_t)0x763a45a0, (q31_t)0x21fd9ba3, (q31_t)0x7640f123, (q31_t)0x21f2f534,
+    (q31_t)0x76479a8e, (q31_t)0x21e84d76, (q31_t)0x764e41e2, (q31_t)0x21dda46a,
+    (q31_t)0x7654e71d, (q31_t)0x21d2fa0f, (q31_t)0x765b8a41, (q31_t)0x21c84e67,
+    (q31_t)0x76622b4c, (q31_t)0x21bda171, (q31_t)0x7668ca3e, (q31_t)0x21b2f32e,
+    (q31_t)0x766f6717, (q31_t)0x21a8439e, (q31_t)0x767601d7, (q31_t)0x219d92c2,
+    (q31_t)0x767c9a7e, (q31_t)0x2192e09b, (q31_t)0x7683310b, (q31_t)0x21882d28,
+    (q31_t)0x7689c57d, (q31_t)0x217d786a, (q31_t)0x769057d6, (q31_t)0x2172c262,
+    (q31_t)0x7696e814, (q31_t)0x21680b0f, (q31_t)0x769d7637, (q31_t)0x215d5273,
+    (q31_t)0x76a4023f, (q31_t)0x2152988d, (q31_t)0x76aa8c2c, (q31_t)0x2147dd5f,
+    (q31_t)0x76b113fd, (q31_t)0x213d20e8, (q31_t)0x76b799b3, (q31_t)0x21326329,
+    (q31_t)0x76be1d4c, (q31_t)0x2127a423, (q31_t)0x76c49ec9, (q31_t)0x211ce3d5,
+    (q31_t)0x76cb1e2a, (q31_t)0x21122240, (q31_t)0x76d19b6e, (q31_t)0x21075f65,
+    (q31_t)0x76d81695, (q31_t)0x20fc9b44, (q31_t)0x76de8f9e, (q31_t)0x20f1d5de,
+    (q31_t)0x76e5068a, (q31_t)0x20e70f32, (q31_t)0x76eb7b58, (q31_t)0x20dc4742,
+    (q31_t)0x76f1ee09, (q31_t)0x20d17e0d, (q31_t)0x76f85e9a, (q31_t)0x20c6b395,
+    (q31_t)0x76fecd0e, (q31_t)0x20bbe7d8, (q31_t)0x77053962, (q31_t)0x20b11ad9,
+    (q31_t)0x770ba398, (q31_t)0x20a64c97, (q31_t)0x77120bae, (q31_t)0x209b7d13,
+    (q31_t)0x771871a5, (q31_t)0x2090ac4d, (q31_t)0x771ed57c, (q31_t)0x2085da46,
+    (q31_t)0x77253733, (q31_t)0x207b06fe, (q31_t)0x772b96ca, (q31_t)0x20703275,
+    (q31_t)0x7731f440, (q31_t)0x20655cac, (q31_t)0x77384f95, (q31_t)0x205a85a3,
+    (q31_t)0x773ea8ca, (q31_t)0x204fad5b, (q31_t)0x7744ffdd, (q31_t)0x2044d3d4,
+    (q31_t)0x774b54ce, (q31_t)0x2039f90f, (q31_t)0x7751a79e, (q31_t)0x202f1d0b,
+    (q31_t)0x7757f84c, (q31_t)0x20243fca, (q31_t)0x775e46d8, (q31_t)0x2019614c,
+    (q31_t)0x77649341, (q31_t)0x200e8190, (q31_t)0x776add88, (q31_t)0x2003a099,
+    (q31_t)0x777125ac, (q31_t)0x1ff8be65, (q31_t)0x77776bac, (q31_t)0x1feddaf6,
+    (q31_t)0x777daf89, (q31_t)0x1fe2f64c, (q31_t)0x7783f143, (q31_t)0x1fd81067,
+    (q31_t)0x778a30d8, (q31_t)0x1fcd2948, (q31_t)0x77906e49, (q31_t)0x1fc240ef,
+    (q31_t)0x7796a996, (q31_t)0x1fb7575c, (q31_t)0x779ce2be, (q31_t)0x1fac6c91,
+    (q31_t)0x77a319c2, (q31_t)0x1fa1808c, (q31_t)0x77a94ea0, (q31_t)0x1f969350,
+    (q31_t)0x77af8159, (q31_t)0x1f8ba4dc, (q31_t)0x77b5b1ec, (q31_t)0x1f80b531,
+    (q31_t)0x77bbe05a, (q31_t)0x1f75c44e, (q31_t)0x77c20ca1, (q31_t)0x1f6ad235,
+    (q31_t)0x77c836c2, (q31_t)0x1f5fdee6, (q31_t)0x77ce5ebd, (q31_t)0x1f54ea62,
+    (q31_t)0x77d48490, (q31_t)0x1f49f4a8, (q31_t)0x77daa83d, (q31_t)0x1f3efdb9,
+    (q31_t)0x77e0c9c3, (q31_t)0x1f340596, (q31_t)0x77e6e921, (q31_t)0x1f290c3f,
+    (q31_t)0x77ed0657, (q31_t)0x1f1e11b5, (q31_t)0x77f32165, (q31_t)0x1f1315f7,
+    (q31_t)0x77f93a4b, (q31_t)0x1f081907, (q31_t)0x77ff5109, (q31_t)0x1efd1ae4,
+    (q31_t)0x7805659e, (q31_t)0x1ef21b90, (q31_t)0x780b780a, (q31_t)0x1ee71b0a,
+    (q31_t)0x7811884d, (q31_t)0x1edc1953, (q31_t)0x78179666, (q31_t)0x1ed1166b,
+    (q31_t)0x781da256, (q31_t)0x1ec61254, (q31_t)0x7823ac1d, (q31_t)0x1ebb0d0d,
+    (q31_t)0x7829b3b9, (q31_t)0x1eb00696, (q31_t)0x782fb92a, (q31_t)0x1ea4fef0,
+    (q31_t)0x7835bc71, (q31_t)0x1e99f61d, (q31_t)0x783bbd8e, (q31_t)0x1e8eec1b,
+    (q31_t)0x7841bc7f, (q31_t)0x1e83e0eb, (q31_t)0x7847b946, (q31_t)0x1e78d48e,
+    (q31_t)0x784db3e0, (q31_t)0x1e6dc705, (q31_t)0x7853ac4f, (q31_t)0x1e62b84f,
+    (q31_t)0x7859a292, (q31_t)0x1e57a86d, (q31_t)0x785f96a9, (q31_t)0x1e4c9760,
+    (q31_t)0x78658894, (q31_t)0x1e418528, (q31_t)0x786b7852, (q31_t)0x1e3671c5,
+    (q31_t)0x787165e3, (q31_t)0x1e2b5d38, (q31_t)0x78775147, (q31_t)0x1e204781,
+    (q31_t)0x787d3a7e, (q31_t)0x1e1530a1, (q31_t)0x78832187, (q31_t)0x1e0a1898,
+    (q31_t)0x78890663, (q31_t)0x1dfeff67, (q31_t)0x788ee910, (q31_t)0x1df3e50d,
+    (q31_t)0x7894c98f, (q31_t)0x1de8c98c, (q31_t)0x789aa7e0, (q31_t)0x1dddace4,
+    (q31_t)0x78a08402, (q31_t)0x1dd28f15, (q31_t)0x78a65df6, (q31_t)0x1dc7701f,
+    (q31_t)0x78ac35ba, (q31_t)0x1dbc5004, (q31_t)0x78b20b4f, (q31_t)0x1db12ec3,
+    (q31_t)0x78b7deb4, (q31_t)0x1da60c5d, (q31_t)0x78bdafea, (q31_t)0x1d9ae8d2,
+    (q31_t)0x78c37eef, (q31_t)0x1d8fc424, (q31_t)0x78c94bc4, (q31_t)0x1d849e51,
+    (q31_t)0x78cf1669, (q31_t)0x1d79775c, (q31_t)0x78d4dedd, (q31_t)0x1d6e4f43,
+    (q31_t)0x78daa520, (q31_t)0x1d632608, (q31_t)0x78e06932, (q31_t)0x1d57fbaa,
+    (q31_t)0x78e62b13, (q31_t)0x1d4cd02c, (q31_t)0x78ebeac2, (q31_t)0x1d41a38c,
+    (q31_t)0x78f1a840, (q31_t)0x1d3675cb, (q31_t)0x78f7638b, (q31_t)0x1d2b46ea,
+    (q31_t)0x78fd1ca4, (q31_t)0x1d2016e9, (q31_t)0x7902d38b, (q31_t)0x1d14e5c9,
+    (q31_t)0x7908883f, (q31_t)0x1d09b389, (q31_t)0x790e3ac0, (q31_t)0x1cfe802b,
+    (q31_t)0x7913eb0e, (q31_t)0x1cf34baf, (q31_t)0x79199929, (q31_t)0x1ce81615,
+    (q31_t)0x791f4510, (q31_t)0x1cdcdf5e, (q31_t)0x7924eec3, (q31_t)0x1cd1a78a,
+    (q31_t)0x792a9642, (q31_t)0x1cc66e99, (q31_t)0x79303b8e, (q31_t)0x1cbb348d,
+    (q31_t)0x7935dea4, (q31_t)0x1caff965, (q31_t)0x793b7f86, (q31_t)0x1ca4bd21,
+    (q31_t)0x79411e33, (q31_t)0x1c997fc4, (q31_t)0x7946baac, (q31_t)0x1c8e414b,
+    (q31_t)0x794c54ee, (q31_t)0x1c8301b9, (q31_t)0x7951ecfc, (q31_t)0x1c77c10e,
+    (q31_t)0x795782d3, (q31_t)0x1c6c7f4a, (q31_t)0x795d1675, (q31_t)0x1c613c6d,
+    (q31_t)0x7962a7e0, (q31_t)0x1c55f878, (q31_t)0x79683715, (q31_t)0x1c4ab36b,
+    (q31_t)0x796dc414, (q31_t)0x1c3f6d47, (q31_t)0x79734edc, (q31_t)0x1c34260c,
+    (q31_t)0x7978d76c, (q31_t)0x1c28ddbb, (q31_t)0x797e5dc6, (q31_t)0x1c1d9454,
+    (q31_t)0x7983e1e8, (q31_t)0x1c1249d8, (q31_t)0x798963d2, (q31_t)0x1c06fe46,
+    (q31_t)0x798ee385, (q31_t)0x1bfbb1a0, (q31_t)0x799460ff, (q31_t)0x1bf063e6,
+    (q31_t)0x7999dc42, (q31_t)0x1be51518, (q31_t)0x799f554b, (q31_t)0x1bd9c537,
+    (q31_t)0x79a4cc1c, (q31_t)0x1bce7442, (q31_t)0x79aa40b4, (q31_t)0x1bc3223c,
+    (q31_t)0x79afb313, (q31_t)0x1bb7cf23, (q31_t)0x79b52339, (q31_t)0x1bac7af9,
+    (q31_t)0x79ba9125, (q31_t)0x1ba125bd, (q31_t)0x79bffcd7, (q31_t)0x1b95cf71,
+    (q31_t)0x79c5664f, (q31_t)0x1b8a7815, (q31_t)0x79cacd8d, (q31_t)0x1b7f1fa9,
+    (q31_t)0x79d03291, (q31_t)0x1b73c62d, (q31_t)0x79d5955a, (q31_t)0x1b686ba3,
+    (q31_t)0x79daf5e8, (q31_t)0x1b5d100a, (q31_t)0x79e0543c, (q31_t)0x1b51b363,
+    (q31_t)0x79e5b054, (q31_t)0x1b4655ae, (q31_t)0x79eb0a31, (q31_t)0x1b3af6ec,
+    (q31_t)0x79f061d2, (q31_t)0x1b2f971e, (q31_t)0x79f5b737, (q31_t)0x1b243643,
+    (q31_t)0x79fb0a60, (q31_t)0x1b18d45c, (q31_t)0x7a005b4d, (q31_t)0x1b0d716a,
+    (q31_t)0x7a05a9fd, (q31_t)0x1b020d6c, (q31_t)0x7a0af671, (q31_t)0x1af6a865,
+    (q31_t)0x7a1040a8, (q31_t)0x1aeb4253, (q31_t)0x7a1588a2, (q31_t)0x1adfdb37,
+    (q31_t)0x7a1ace5f, (q31_t)0x1ad47312, (q31_t)0x7a2011de, (q31_t)0x1ac909e5,
+    (q31_t)0x7a25531f, (q31_t)0x1abd9faf, (q31_t)0x7a2a9223, (q31_t)0x1ab23471,
+    (q31_t)0x7a2fcee8, (q31_t)0x1aa6c82b, (q31_t)0x7a350970, (q31_t)0x1a9b5adf,
+    (q31_t)0x7a3a41b9, (q31_t)0x1a8fec8c, (q31_t)0x7a3f77c3, (q31_t)0x1a847d33,
+    (q31_t)0x7a44ab8e, (q31_t)0x1a790cd4, (q31_t)0x7a49dd1a, (q31_t)0x1a6d9b70,
+    (q31_t)0x7a4f0c67, (q31_t)0x1a622907, (q31_t)0x7a543974, (q31_t)0x1a56b599,
+    (q31_t)0x7a596442, (q31_t)0x1a4b4128, (q31_t)0x7a5e8cd0, (q31_t)0x1a3fcbb3,
+    (q31_t)0x7a63b31d, (q31_t)0x1a34553b, (q31_t)0x7a68d72b, (q31_t)0x1a28ddc0,
+    (q31_t)0x7a6df8f8, (q31_t)0x1a1d6544, (q31_t)0x7a731884, (q31_t)0x1a11ebc5,
+    (q31_t)0x7a7835cf, (q31_t)0x1a067145, (q31_t)0x7a7d50da, (q31_t)0x19faf5c5,
+    (q31_t)0x7a8269a3, (q31_t)0x19ef7944, (q31_t)0x7a87802a, (q31_t)0x19e3fbc3,
+    (q31_t)0x7a8c9470, (q31_t)0x19d87d42, (q31_t)0x7a91a674, (q31_t)0x19ccfdc2,
+    (q31_t)0x7a96b636, (q31_t)0x19c17d44, (q31_t)0x7a9bc3b6, (q31_t)0x19b5fbc8,
+    (q31_t)0x7aa0cef3, (q31_t)0x19aa794d, (q31_t)0x7aa5d7ee, (q31_t)0x199ef5d6,
+    (q31_t)0x7aaadea6, (q31_t)0x19937161, (q31_t)0x7aafe31b, (q31_t)0x1987ebf0,
+    (q31_t)0x7ab4e54c, (q31_t)0x197c6584, (q31_t)0x7ab9e53a, (q31_t)0x1970de1b,
+    (q31_t)0x7abee2e5, (q31_t)0x196555b8, (q31_t)0x7ac3de4c, (q31_t)0x1959cc5a,
+    (q31_t)0x7ac8d76f, (q31_t)0x194e4201, (q31_t)0x7acdce4d, (q31_t)0x1942b6af,
+    (q31_t)0x7ad2c2e8, (q31_t)0x19372a64, (q31_t)0x7ad7b53d, (q31_t)0x192b9d1f,
+    (q31_t)0x7adca54e, (q31_t)0x19200ee3, (q31_t)0x7ae1931a, (q31_t)0x19147fae,
+    (q31_t)0x7ae67ea1, (q31_t)0x1908ef82, (q31_t)0x7aeb67e3, (q31_t)0x18fd5e5f,
+    (q31_t)0x7af04edf, (q31_t)0x18f1cc45, (q31_t)0x7af53395, (q31_t)0x18e63935,
+    (q31_t)0x7afa1605, (q31_t)0x18daa52f, (q31_t)0x7afef630, (q31_t)0x18cf1034,
+    (q31_t)0x7b03d414, (q31_t)0x18c37a44, (q31_t)0x7b08afb2, (q31_t)0x18b7e35f,
+    (q31_t)0x7b0d8909, (q31_t)0x18ac4b87, (q31_t)0x7b126019, (q31_t)0x18a0b2bb,
+    (q31_t)0x7b1734e2, (q31_t)0x189518fc, (q31_t)0x7b1c0764, (q31_t)0x18897e4a,
+    (q31_t)0x7b20d79e, (q31_t)0x187de2a7, (q31_t)0x7b25a591, (q31_t)0x18724611,
+    (q31_t)0x7b2a713d, (q31_t)0x1866a88a, (q31_t)0x7b2f3aa0, (q31_t)0x185b0a13,
+    (q31_t)0x7b3401bb, (q31_t)0x184f6aab, (q31_t)0x7b38c68e, (q31_t)0x1843ca53,
+    (q31_t)0x7b3d8918, (q31_t)0x1838290c, (q31_t)0x7b42495a, (q31_t)0x182c86d5,
+    (q31_t)0x7b470753, (q31_t)0x1820e3b0, (q31_t)0x7b4bc303, (q31_t)0x18153f9d,
+    (q31_t)0x7b507c69, (q31_t)0x18099a9c, (q31_t)0x7b553386, (q31_t)0x17fdf4ae,
+    (q31_t)0x7b59e85a, (q31_t)0x17f24dd3, (q31_t)0x7b5e9ae4, (q31_t)0x17e6a60c,
+    (q31_t)0x7b634b23, (q31_t)0x17dafd59, (q31_t)0x7b67f919, (q31_t)0x17cf53bb,
+    (q31_t)0x7b6ca4c4, (q31_t)0x17c3a931, (q31_t)0x7b714e25, (q31_t)0x17b7fdbd,
+    (q31_t)0x7b75f53c, (q31_t)0x17ac515f, (q31_t)0x7b7a9a07, (q31_t)0x17a0a417,
+    (q31_t)0x7b7f3c87, (q31_t)0x1794f5e6, (q31_t)0x7b83dcbc, (q31_t)0x178946cc,
+    (q31_t)0x7b887aa6, (q31_t)0x177d96ca, (q31_t)0x7b8d1644, (q31_t)0x1771e5e0,
+    (q31_t)0x7b91af97, (q31_t)0x1766340f, (q31_t)0x7b96469d, (q31_t)0x175a8157,
+    (q31_t)0x7b9adb57, (q31_t)0x174ecdb8, (q31_t)0x7b9f6dc5, (q31_t)0x17431933,
+    (q31_t)0x7ba3fde7, (q31_t)0x173763c9, (q31_t)0x7ba88bbc, (q31_t)0x172bad7a,
+    (q31_t)0x7bad1744, (q31_t)0x171ff646, (q31_t)0x7bb1a080, (q31_t)0x17143e2d,
+    (q31_t)0x7bb6276e, (q31_t)0x17088531, (q31_t)0x7bbaac0e, (q31_t)0x16fccb51,
+    (q31_t)0x7bbf2e62, (q31_t)0x16f1108f, (q31_t)0x7bc3ae67, (q31_t)0x16e554ea,
+    (q31_t)0x7bc82c1f, (q31_t)0x16d99864, (q31_t)0x7bcca789, (q31_t)0x16cddafb,
+    (q31_t)0x7bd120a4, (q31_t)0x16c21cb2, (q31_t)0x7bd59771, (q31_t)0x16b65d88,
+    (q31_t)0x7bda0bf0, (q31_t)0x16aa9d7e, (q31_t)0x7bde7e20, (q31_t)0x169edc94,
+    (q31_t)0x7be2ee01, (q31_t)0x16931acb, (q31_t)0x7be75b93, (q31_t)0x16875823,
+    (q31_t)0x7bebc6d5, (q31_t)0x167b949d, (q31_t)0x7bf02fc9, (q31_t)0x166fd039,
+    (q31_t)0x7bf4966c, (q31_t)0x16640af7, (q31_t)0x7bf8fac0, (q31_t)0x165844d8,
+    (q31_t)0x7bfd5cc4, (q31_t)0x164c7ddd, (q31_t)0x7c01bc78, (q31_t)0x1640b606,
+    (q31_t)0x7c0619dc, (q31_t)0x1634ed53, (q31_t)0x7c0a74f0, (q31_t)0x162923c5,
+    (q31_t)0x7c0ecdb2, (q31_t)0x161d595d, (q31_t)0x7c132424, (q31_t)0x16118e1a,
+    (q31_t)0x7c177845, (q31_t)0x1605c1fd, (q31_t)0x7c1bca16, (q31_t)0x15f9f507,
+    (q31_t)0x7c201994, (q31_t)0x15ee2738, (q31_t)0x7c2466c2, (q31_t)0x15e25890,
+    (q31_t)0x7c28b19e, (q31_t)0x15d68911, (q31_t)0x7c2cfa28, (q31_t)0x15cab8ba,
+    (q31_t)0x7c314060, (q31_t)0x15bee78c, (q31_t)0x7c358446, (q31_t)0x15b31587,
+    (q31_t)0x7c39c5da, (q31_t)0x15a742ac, (q31_t)0x7c3e051b, (q31_t)0x159b6efb,
+    (q31_t)0x7c42420a, (q31_t)0x158f9a76, (q31_t)0x7c467ca6, (q31_t)0x1583c51b,
+    (q31_t)0x7c4ab4ef, (q31_t)0x1577eeec, (q31_t)0x7c4eeae5, (q31_t)0x156c17e9,
+    (q31_t)0x7c531e88, (q31_t)0x15604013, (q31_t)0x7c574fd8, (q31_t)0x1554676a,
+    (q31_t)0x7c5b7ed4, (q31_t)0x15488dee, (q31_t)0x7c5fab7c, (q31_t)0x153cb3a0,
+    (q31_t)0x7c63d5d1, (q31_t)0x1530d881, (q31_t)0x7c67fdd1, (q31_t)0x1524fc90,
+    (q31_t)0x7c6c237e, (q31_t)0x15191fcf, (q31_t)0x7c7046d6, (q31_t)0x150d423d,
+    (q31_t)0x7c7467d9, (q31_t)0x150163dc, (q31_t)0x7c788688, (q31_t)0x14f584ac,
+    (q31_t)0x7c7ca2e2, (q31_t)0x14e9a4ac, (q31_t)0x7c80bce7, (q31_t)0x14ddc3de,
+    (q31_t)0x7c84d496, (q31_t)0x14d1e242, (q31_t)0x7c88e9f1, (q31_t)0x14c5ffd9,
+    (q31_t)0x7c8cfcf6, (q31_t)0x14ba1ca3, (q31_t)0x7c910da5, (q31_t)0x14ae38a0,
+    (q31_t)0x7c951bff, (q31_t)0x14a253d1, (q31_t)0x7c992803, (q31_t)0x14966e36,
+    (q31_t)0x7c9d31b0, (q31_t)0x148a87d1, (q31_t)0x7ca13908, (q31_t)0x147ea0a0,
+    (q31_t)0x7ca53e09, (q31_t)0x1472b8a5, (q31_t)0x7ca940b3, (q31_t)0x1466cfe1,
+    (q31_t)0x7cad4107, (q31_t)0x145ae653, (q31_t)0x7cb13f04, (q31_t)0x144efbfc,
+    (q31_t)0x7cb53aaa, (q31_t)0x144310dd, (q31_t)0x7cb933f9, (q31_t)0x143724f5,
+    (q31_t)0x7cbd2af0, (q31_t)0x142b3846, (q31_t)0x7cc11f90, (q31_t)0x141f4ad1,
+    (q31_t)0x7cc511d9, (q31_t)0x14135c94, (q31_t)0x7cc901c9, (q31_t)0x14076d91,
+    (q31_t)0x7cccef62, (q31_t)0x13fb7dc9, (q31_t)0x7cd0daa2, (q31_t)0x13ef8d3c,
+    (q31_t)0x7cd4c38b, (q31_t)0x13e39be9, (q31_t)0x7cd8aa1b, (q31_t)0x13d7a9d3,
+    (q31_t)0x7cdc8e52, (q31_t)0x13cbb6f8, (q31_t)0x7ce07031, (q31_t)0x13bfc35b,
+    (q31_t)0x7ce44fb7, (q31_t)0x13b3cefa, (q31_t)0x7ce82ce4, (q31_t)0x13a7d9d7,
+    (q31_t)0x7cec07b8, (q31_t)0x139be3f2, (q31_t)0x7cefe032, (q31_t)0x138fed4b,
+    (q31_t)0x7cf3b653, (q31_t)0x1383f5e3, (q31_t)0x7cf78a1b, (q31_t)0x1377fdbb,
+    (q31_t)0x7cfb5b89, (q31_t)0x136c04d2, (q31_t)0x7cff2a9d, (q31_t)0x13600b2a,
+    (q31_t)0x7d02f757, (q31_t)0x135410c3, (q31_t)0x7d06c1b6, (q31_t)0x1348159d,
+    (q31_t)0x7d0a89bc, (q31_t)0x133c19b8, (q31_t)0x7d0e4f67, (q31_t)0x13301d16,
+    (q31_t)0x7d1212b7, (q31_t)0x13241fb6, (q31_t)0x7d15d3ad, (q31_t)0x1318219a,
+    (q31_t)0x7d199248, (q31_t)0x130c22c1, (q31_t)0x7d1d4e88, (q31_t)0x1300232c,
+    (q31_t)0x7d21086c, (q31_t)0x12f422db, (q31_t)0x7d24bff6, (q31_t)0x12e821cf,
+    (q31_t)0x7d287523, (q31_t)0x12dc2009, (q31_t)0x7d2c27f6, (q31_t)0x12d01d89,
+    (q31_t)0x7d2fd86c, (q31_t)0x12c41a4f, (q31_t)0x7d338687, (q31_t)0x12b8165b,
+    (q31_t)0x7d373245, (q31_t)0x12ac11af, (q31_t)0x7d3adba7, (q31_t)0x12a00c4b,
+    (q31_t)0x7d3e82ae, (q31_t)0x1294062f, (q31_t)0x7d422757, (q31_t)0x1287ff5b,
+    (q31_t)0x7d45c9a4, (q31_t)0x127bf7d1, (q31_t)0x7d496994, (q31_t)0x126fef90,
+    (q31_t)0x7d4d0728, (q31_t)0x1263e699, (q31_t)0x7d50a25e, (q31_t)0x1257dced,
+    (q31_t)0x7d543b37, (q31_t)0x124bd28c, (q31_t)0x7d57d1b3, (q31_t)0x123fc776,
+    (q31_t)0x7d5b65d2, (q31_t)0x1233bbac, (q31_t)0x7d5ef793, (q31_t)0x1227af2e,
+    (q31_t)0x7d6286f6, (q31_t)0x121ba1fd, (q31_t)0x7d6613fb, (q31_t)0x120f941a,
+    (q31_t)0x7d699ea3, (q31_t)0x12038584, (q31_t)0x7d6d26ec, (q31_t)0x11f7763c,
+    (q31_t)0x7d70acd7, (q31_t)0x11eb6643, (q31_t)0x7d743064, (q31_t)0x11df5599,
+    (q31_t)0x7d77b192, (q31_t)0x11d3443f, (q31_t)0x7d7b3061, (q31_t)0x11c73235,
+    (q31_t)0x7d7eacd2, (q31_t)0x11bb1f7c, (q31_t)0x7d8226e4, (q31_t)0x11af0c13,
+    (q31_t)0x7d859e96, (q31_t)0x11a2f7fc, (q31_t)0x7d8913ea, (q31_t)0x1196e337,
+    (q31_t)0x7d8c86de, (q31_t)0x118acdc4, (q31_t)0x7d8ff772, (q31_t)0x117eb7a4,
+    (q31_t)0x7d9365a8, (q31_t)0x1172a0d7, (q31_t)0x7d96d17d, (q31_t)0x1166895f,
+    (q31_t)0x7d9a3af2, (q31_t)0x115a713a, (q31_t)0x7d9da208, (q31_t)0x114e586a,
+    (q31_t)0x7da106bd, (q31_t)0x11423ef0, (q31_t)0x7da46912, (q31_t)0x113624cb,
+    (q31_t)0x7da7c907, (q31_t)0x112a09fc, (q31_t)0x7dab269b, (q31_t)0x111dee84,
+    (q31_t)0x7dae81cf, (q31_t)0x1111d263, (q31_t)0x7db1daa2, (q31_t)0x1105b599,
+    (q31_t)0x7db53113, (q31_t)0x10f99827, (q31_t)0x7db88524, (q31_t)0x10ed7a0e,
+    (q31_t)0x7dbbd6d4, (q31_t)0x10e15b4e, (q31_t)0x7dbf2622, (q31_t)0x10d53be7,
+    (q31_t)0x7dc2730f, (q31_t)0x10c91bda, (q31_t)0x7dc5bd9b, (q31_t)0x10bcfb28,
+    (q31_t)0x7dc905c5, (q31_t)0x10b0d9d0, (q31_t)0x7dcc4b8d, (q31_t)0x10a4b7d3,
+    (q31_t)0x7dcf8ef3, (q31_t)0x10989532, (q31_t)0x7dd2cff7, (q31_t)0x108c71ee,
+    (q31_t)0x7dd60e99, (q31_t)0x10804e06, (q31_t)0x7dd94ad8, (q31_t)0x1074297b,
+    (q31_t)0x7ddc84b5, (q31_t)0x1068044e, (q31_t)0x7ddfbc30, (q31_t)0x105bde7f,
+    (q31_t)0x7de2f148, (q31_t)0x104fb80e, (q31_t)0x7de623fd, (q31_t)0x104390fd,
+    (q31_t)0x7de9544f, (q31_t)0x1037694b, (q31_t)0x7dec823e, (q31_t)0x102b40f8,
+    (q31_t)0x7defadca, (q31_t)0x101f1807, (q31_t)0x7df2d6f3, (q31_t)0x1012ee76,
+    (q31_t)0x7df5fdb8, (q31_t)0x1006c446, (q31_t)0x7df9221a, (q31_t)0xffa9979,
+    (q31_t)0x7dfc4418, (q31_t)0xfee6e0d, (q31_t)0x7dff63b2, (q31_t)0xfe24205,
+    (q31_t)0x7e0280e9, (q31_t)0xfd6155f, (q31_t)0x7e059bbb, (q31_t)0xfc9e81e,
+    (q31_t)0x7e08b42a, (q31_t)0xfbdba40, (q31_t)0x7e0bca34, (q31_t)0xfb18bc8,
+    (q31_t)0x7e0eddd9, (q31_t)0xfa55cb4, (q31_t)0x7e11ef1b, (q31_t)0xf992d06,
+    (q31_t)0x7e14fdf7, (q31_t)0xf8cfcbe, (q31_t)0x7e180a6f, (q31_t)0xf80cbdc,
+    (q31_t)0x7e1b1482, (q31_t)0xf749a61, (q31_t)0x7e1e1c30, (q31_t)0xf68684e,
+    (q31_t)0x7e212179, (q31_t)0xf5c35a3, (q31_t)0x7e24245d, (q31_t)0xf500260,
+    (q31_t)0x7e2724db, (q31_t)0xf43ce86, (q31_t)0x7e2a22f4, (q31_t)0xf379a16,
+    (q31_t)0x7e2d1ea8, (q31_t)0xf2b650f, (q31_t)0x7e3017f6, (q31_t)0xf1f2f73,
+    (q31_t)0x7e330ede, (q31_t)0xf12f941, (q31_t)0x7e360360, (q31_t)0xf06c27a,
+    (q31_t)0x7e38f57c, (q31_t)0xefa8b20, (q31_t)0x7e3be532, (q31_t)0xeee5331,
+    (q31_t)0x7e3ed282, (q31_t)0xee21aaf, (q31_t)0x7e41bd6c, (q31_t)0xed5e19a,
+    (q31_t)0x7e44a5ef, (q31_t)0xec9a7f3, (q31_t)0x7e478c0b, (q31_t)0xebd6db9,
+    (q31_t)0x7e4a6fc1, (q31_t)0xeb132ef, (q31_t)0x7e4d5110, (q31_t)0xea4f793,
+    (q31_t)0x7e502ff9, (q31_t)0xe98bba7, (q31_t)0x7e530c7a, (q31_t)0xe8c7f2a,
+    (q31_t)0x7e55e694, (q31_t)0xe80421e, (q31_t)0x7e58be47, (q31_t)0xe740483,
+    (q31_t)0x7e5b9392, (q31_t)0xe67c65a, (q31_t)0x7e5e6676, (q31_t)0xe5b87a2,
+    (q31_t)0x7e6136f3, (q31_t)0xe4f485c, (q31_t)0x7e640507, (q31_t)0xe430889,
+    (q31_t)0x7e66d0b4, (q31_t)0xe36c82a, (q31_t)0x7e6999fa, (q31_t)0xe2a873e,
+    (q31_t)0x7e6c60d7, (q31_t)0xe1e45c6, (q31_t)0x7e6f254c, (q31_t)0xe1203c3,
+    (q31_t)0x7e71e759, (q31_t)0xe05c135, (q31_t)0x7e74a6fd, (q31_t)0xdf97e1d,
+    (q31_t)0x7e77643a, (q31_t)0xded3a7b, (q31_t)0x7e7a1f0d, (q31_t)0xde0f64f,
+    (q31_t)0x7e7cd778, (q31_t)0xdd4b19a, (q31_t)0x7e7f8d7b, (q31_t)0xdc86c5d,
+    (q31_t)0x7e824114, (q31_t)0xdbc2698, (q31_t)0x7e84f245, (q31_t)0xdafe04b,
+    (q31_t)0x7e87a10c, (q31_t)0xda39978, (q31_t)0x7e8a4d6a, (q31_t)0xd97521d,
+    (q31_t)0x7e8cf75f, (q31_t)0xd8b0a3d, (q31_t)0x7e8f9eeb, (q31_t)0xd7ec1d6,
+    (q31_t)0x7e92440d, (q31_t)0xd7278eb, (q31_t)0x7e94e6c6, (q31_t)0xd662f7b,
+    (q31_t)0x7e978715, (q31_t)0xd59e586, (q31_t)0x7e9a24fb, (q31_t)0xd4d9b0e,
+    (q31_t)0x7e9cc076, (q31_t)0xd415013, (q31_t)0x7e9f5988, (q31_t)0xd350495,
+    (q31_t)0x7ea1f02f, (q31_t)0xd28b894, (q31_t)0x7ea4846c, (q31_t)0xd1c6c11,
+    (q31_t)0x7ea7163f, (q31_t)0xd101f0e, (q31_t)0x7ea9a5a8, (q31_t)0xd03d189,
+    (q31_t)0x7eac32a6, (q31_t)0xcf78383, (q31_t)0x7eaebd3a, (q31_t)0xceb34fe,
+    (q31_t)0x7eb14563, (q31_t)0xcdee5f9, (q31_t)0x7eb3cb21, (q31_t)0xcd29676,
+    (q31_t)0x7eb64e75, (q31_t)0xcc64673, (q31_t)0x7eb8cf5d, (q31_t)0xcb9f5f3,
+    (q31_t)0x7ebb4ddb, (q31_t)0xcada4f5, (q31_t)0x7ebdc9ed, (q31_t)0xca1537a,
+    (q31_t)0x7ec04394, (q31_t)0xc950182, (q31_t)0x7ec2bad0, (q31_t)0xc88af0e,
+    (q31_t)0x7ec52fa0, (q31_t)0xc7c5c1e, (q31_t)0x7ec7a205, (q31_t)0xc7008b3,
+    (q31_t)0x7eca11fe, (q31_t)0xc63b4ce, (q31_t)0x7ecc7f8b, (q31_t)0xc57606e,
+    (q31_t)0x7eceeaad, (q31_t)0xc4b0b94, (q31_t)0x7ed15363, (q31_t)0xc3eb641,
+    (q31_t)0x7ed3b9ad, (q31_t)0xc326075, (q31_t)0x7ed61d8a, (q31_t)0xc260a31,
+    (q31_t)0x7ed87efc, (q31_t)0xc19b374, (q31_t)0x7edade01, (q31_t)0xc0d5c41,
+    (q31_t)0x7edd3a9a, (q31_t)0xc010496, (q31_t)0x7edf94c7, (q31_t)0xbf4ac75,
+    (q31_t)0x7ee1ec87, (q31_t)0xbe853de, (q31_t)0x7ee441da, (q31_t)0xbdbfad1,
+    (q31_t)0x7ee694c1, (q31_t)0xbcfa150, (q31_t)0x7ee8e53a, (q31_t)0xbc34759,
+    (q31_t)0x7eeb3347, (q31_t)0xbb6ecef, (q31_t)0x7eed7ee7, (q31_t)0xbaa9211,
+    (q31_t)0x7eefc81a, (q31_t)0xb9e36c0, (q31_t)0x7ef20ee0, (q31_t)0xb91dafc,
+    (q31_t)0x7ef45338, (q31_t)0xb857ec7, (q31_t)0x7ef69523, (q31_t)0xb79221f,
+    (q31_t)0x7ef8d4a1, (q31_t)0xb6cc506, (q31_t)0x7efb11b1, (q31_t)0xb60677c,
+    (q31_t)0x7efd4c54, (q31_t)0xb540982, (q31_t)0x7eff8489, (q31_t)0xb47ab19,
+    (q31_t)0x7f01ba50, (q31_t)0xb3b4c40, (q31_t)0x7f03eda9, (q31_t)0xb2eecf8,
+    (q31_t)0x7f061e95, (q31_t)0xb228d42, (q31_t)0x7f084d12, (q31_t)0xb162d1d,
+    (q31_t)0x7f0a7921, (q31_t)0xb09cc8c, (q31_t)0x7f0ca2c2, (q31_t)0xafd6b8d,
+    (q31_t)0x7f0ec9f5, (q31_t)0xaf10a22, (q31_t)0x7f10eeb9, (q31_t)0xae4a84b,
+    (q31_t)0x7f13110f, (q31_t)0xad84609, (q31_t)0x7f1530f7, (q31_t)0xacbe35b,
+    (q31_t)0x7f174e70, (q31_t)0xabf8043, (q31_t)0x7f19697a, (q31_t)0xab31cc1,
+    (q31_t)0x7f1b8215, (q31_t)0xaa6b8d5, (q31_t)0x7f1d9842, (q31_t)0xa9a5480,
+    (q31_t)0x7f1fabff, (q31_t)0xa8defc3, (q31_t)0x7f21bd4e, (q31_t)0xa818a9d,
+    (q31_t)0x7f23cc2e, (q31_t)0xa752510, (q31_t)0x7f25d89e, (q31_t)0xa68bf1b,
+    (q31_t)0x7f27e29f, (q31_t)0xa5c58c0, (q31_t)0x7f29ea31, (q31_t)0xa4ff1fe,
+    (q31_t)0x7f2bef53, (q31_t)0xa438ad7, (q31_t)0x7f2df206, (q31_t)0xa37234a,
+    (q31_t)0x7f2ff24a, (q31_t)0xa2abb59, (q31_t)0x7f31f01d, (q31_t)0xa1e5303,
+    (q31_t)0x7f33eb81, (q31_t)0xa11ea49, (q31_t)0x7f35e476, (q31_t)0xa05812c,
+    (q31_t)0x7f37dafa, (q31_t)0x9f917ac, (q31_t)0x7f39cf0e, (q31_t)0x9ecadc9,
+    (q31_t)0x7f3bc0b3, (q31_t)0x9e04385, (q31_t)0x7f3dafe7, (q31_t)0x9d3d8df,
+    (q31_t)0x7f3f9cab, (q31_t)0x9c76dd8, (q31_t)0x7f4186ff, (q31_t)0x9bb0271,
+    (q31_t)0x7f436ee3, (q31_t)0x9ae96aa, (q31_t)0x7f455456, (q31_t)0x9a22a83,
+    (q31_t)0x7f473759, (q31_t)0x995bdfd, (q31_t)0x7f4917eb, (q31_t)0x9895118,
+    (q31_t)0x7f4af60d, (q31_t)0x97ce3d5, (q31_t)0x7f4cd1be, (q31_t)0x9707635,
+    (q31_t)0x7f4eaafe, (q31_t)0x9640837, (q31_t)0x7f5081cd, (q31_t)0x95799dd,
+    (q31_t)0x7f52562c, (q31_t)0x94b2b27, (q31_t)0x7f54281a, (q31_t)0x93ebc14,
+    (q31_t)0x7f55f796, (q31_t)0x9324ca7, (q31_t)0x7f57c4a2, (q31_t)0x925dcdf,
+    (q31_t)0x7f598f3c, (q31_t)0x9196cbc, (q31_t)0x7f5b5765, (q31_t)0x90cfc40,
+    (q31_t)0x7f5d1d1d, (q31_t)0x9008b6a, (q31_t)0x7f5ee063, (q31_t)0x8f41a3c,
+    (q31_t)0x7f60a138, (q31_t)0x8e7a8b5, (q31_t)0x7f625f9b, (q31_t)0x8db36d6,
+    (q31_t)0x7f641b8d, (q31_t)0x8cec4a0, (q31_t)0x7f65d50d, (q31_t)0x8c25213,
+    (q31_t)0x7f678c1c, (q31_t)0x8b5df30, (q31_t)0x7f6940b8, (q31_t)0x8a96bf6,
+    (q31_t)0x7f6af2e3, (q31_t)0x89cf867, (q31_t)0x7f6ca29c, (q31_t)0x8908483,
+    (q31_t)0x7f6e4fe3, (q31_t)0x884104b, (q31_t)0x7f6ffab8, (q31_t)0x8779bbe,
+    (q31_t)0x7f71a31b, (q31_t)0x86b26de, (q31_t)0x7f73490b, (q31_t)0x85eb1ab,
+    (q31_t)0x7f74ec8a, (q31_t)0x8523c25, (q31_t)0x7f768d96, (q31_t)0x845c64d,
+    (q31_t)0x7f782c30, (q31_t)0x8395024, (q31_t)0x7f79c857, (q31_t)0x82cd9a9,
+    (q31_t)0x7f7b620c, (q31_t)0x82062de, (q31_t)0x7f7cf94e, (q31_t)0x813ebc2,
+    (q31_t)0x7f7e8e1e, (q31_t)0x8077457, (q31_t)0x7f80207b, (q31_t)0x7fafc9c,
+    (q31_t)0x7f81b065, (q31_t)0x7ee8493, (q31_t)0x7f833ddd, (q31_t)0x7e20c3b,
+    (q31_t)0x7f84c8e2, (q31_t)0x7d59396, (q31_t)0x7f865174, (q31_t)0x7c91aa3,
+    (q31_t)0x7f87d792, (q31_t)0x7bca163, (q31_t)0x7f895b3e, (q31_t)0x7b027d7,
+    (q31_t)0x7f8adc77, (q31_t)0x7a3adff, (q31_t)0x7f8c5b3d, (q31_t)0x79733dc,
+    (q31_t)0x7f8dd78f, (q31_t)0x78ab96e, (q31_t)0x7f8f516e, (q31_t)0x77e3eb5,
+    (q31_t)0x7f90c8da, (q31_t)0x771c3b3, (q31_t)0x7f923dd2, (q31_t)0x7654867,
+    (q31_t)0x7f93b058, (q31_t)0x758ccd2, (q31_t)0x7f952069, (q31_t)0x74c50f4,
+    (q31_t)0x7f968e07, (q31_t)0x73fd4cf, (q31_t)0x7f97f932, (q31_t)0x7335862,
+    (q31_t)0x7f9961e8, (q31_t)0x726dbae, (q31_t)0x7f9ac82c, (q31_t)0x71a5eb3,
+    (q31_t)0x7f9c2bfb, (q31_t)0x70de172, (q31_t)0x7f9d8d56, (q31_t)0x70163eb,
+    (q31_t)0x7f9eec3e, (q31_t)0x6f4e620, (q31_t)0x7fa048b2, (q31_t)0x6e86810,
+    (q31_t)0x7fa1a2b2, (q31_t)0x6dbe9bb, (q31_t)0x7fa2fa3d, (q31_t)0x6cf6b23,
+    (q31_t)0x7fa44f55, (q31_t)0x6c2ec48, (q31_t)0x7fa5a1f9, (q31_t)0x6b66d29,
+    (q31_t)0x7fa6f228, (q31_t)0x6a9edc9, (q31_t)0x7fa83fe3, (q31_t)0x69d6e27,
+    (q31_t)0x7fa98b2a, (q31_t)0x690ee44, (q31_t)0x7faad3fd, (q31_t)0x6846e1f,
+    (q31_t)0x7fac1a5b, (q31_t)0x677edbb, (q31_t)0x7fad5e45, (q31_t)0x66b6d16,
+    (q31_t)0x7fae9fbb, (q31_t)0x65eec33, (q31_t)0x7fafdebb, (q31_t)0x6526b10,
+    (q31_t)0x7fb11b48, (q31_t)0x645e9af, (q31_t)0x7fb2555f, (q31_t)0x6396810,
+    (q31_t)0x7fb38d02, (q31_t)0x62ce634, (q31_t)0x7fb4c231, (q31_t)0x620641a,
+    (q31_t)0x7fb5f4ea, (q31_t)0x613e1c5, (q31_t)0x7fb7252f, (q31_t)0x6075f33,
+    (q31_t)0x7fb852ff, (q31_t)0x5fadc66, (q31_t)0x7fb97e5a, (q31_t)0x5ee595d,
+    (q31_t)0x7fbaa740, (q31_t)0x5e1d61b, (q31_t)0x7fbbcdb1, (q31_t)0x5d5529e,
+    (q31_t)0x7fbcf1ad, (q31_t)0x5c8cee7, (q31_t)0x7fbe1334, (q31_t)0x5bc4af8,
+    (q31_t)0x7fbf3246, (q31_t)0x5afc6d0, (q31_t)0x7fc04ee3, (q31_t)0x5a3426f,
+    (q31_t)0x7fc1690a, (q31_t)0x596bdd7, (q31_t)0x7fc280bc, (q31_t)0x58a3908,
+    (q31_t)0x7fc395f9, (q31_t)0x57db403, (q31_t)0x7fc4a8c1, (q31_t)0x5712ec7,
+    (q31_t)0x7fc5b913, (q31_t)0x564a955, (q31_t)0x7fc6c6f0, (q31_t)0x55823ae,
+    (q31_t)0x7fc7d258, (q31_t)0x54b9dd3, (q31_t)0x7fc8db4a, (q31_t)0x53f17c3,
+    (q31_t)0x7fc9e1c6, (q31_t)0x532917f, (q31_t)0x7fcae5cd, (q31_t)0x5260b08,
+    (q31_t)0x7fcbe75e, (q31_t)0x519845e, (q31_t)0x7fcce67a, (q31_t)0x50cfd82,
+    (q31_t)0x7fcde320, (q31_t)0x5007674, (q31_t)0x7fcedd50, (q31_t)0x4f3ef35,
+    (q31_t)0x7fcfd50b, (q31_t)0x4e767c5, (q31_t)0x7fd0ca4f, (q31_t)0x4dae024,
+    (q31_t)0x7fd1bd1e, (q31_t)0x4ce5854, (q31_t)0x7fd2ad77, (q31_t)0x4c1d054,
+    (q31_t)0x7fd39b5a, (q31_t)0x4b54825, (q31_t)0x7fd486c7, (q31_t)0x4a8bfc7,
+    (q31_t)0x7fd56fbe, (q31_t)0x49c373c, (q31_t)0x7fd6563f, (q31_t)0x48fae83,
+    (q31_t)0x7fd73a4a, (q31_t)0x483259d, (q31_t)0x7fd81bdf, (q31_t)0x4769c8b,
+    (q31_t)0x7fd8fafe, (q31_t)0x46a134c, (q31_t)0x7fd9d7a7, (q31_t)0x45d89e2,
+    (q31_t)0x7fdab1d9, (q31_t)0x451004d, (q31_t)0x7fdb8996, (q31_t)0x444768d,
+    (q31_t)0x7fdc5edc, (q31_t)0x437eca4, (q31_t)0x7fdd31ac, (q31_t)0x42b6290,
+    (q31_t)0x7fde0205, (q31_t)0x41ed854, (q31_t)0x7fdecfe8, (q31_t)0x4124dee,
+    (q31_t)0x7fdf9b55, (q31_t)0x405c361, (q31_t)0x7fe0644b, (q31_t)0x3f938ac,
+    (q31_t)0x7fe12acb, (q31_t)0x3ecadcf, (q31_t)0x7fe1eed5, (q31_t)0x3e022cc,
+    (q31_t)0x7fe2b067, (q31_t)0x3d397a3, (q31_t)0x7fe36f84, (q31_t)0x3c70c54,
+    (q31_t)0x7fe42c2a, (q31_t)0x3ba80df, (q31_t)0x7fe4e659, (q31_t)0x3adf546,
+    (q31_t)0x7fe59e12, (q31_t)0x3a16988, (q31_t)0x7fe65354, (q31_t)0x394dda7,
+    (q31_t)0x7fe7061f, (q31_t)0x38851a2, (q31_t)0x7fe7b674, (q31_t)0x37bc57b,
+    (q31_t)0x7fe86452, (q31_t)0x36f3931, (q31_t)0x7fe90fb9, (q31_t)0x362acc5,
+    (q31_t)0x7fe9b8a9, (q31_t)0x3562038, (q31_t)0x7fea5f23, (q31_t)0x3499389,
+    (q31_t)0x7feb0326, (q31_t)0x33d06bb, (q31_t)0x7feba4b2, (q31_t)0x33079cc,
+    (q31_t)0x7fec43c7, (q31_t)0x323ecbe, (q31_t)0x7fece065, (q31_t)0x3175f91,
+    (q31_t)0x7fed7a8c, (q31_t)0x30ad245, (q31_t)0x7fee123d, (q31_t)0x2fe44dc,
+    (q31_t)0x7feea776, (q31_t)0x2f1b755, (q31_t)0x7fef3a39, (q31_t)0x2e529b0,
+    (q31_t)0x7fefca84, (q31_t)0x2d89bf0, (q31_t)0x7ff05858, (q31_t)0x2cc0e13,
+    (q31_t)0x7ff0e3b6, (q31_t)0x2bf801a, (q31_t)0x7ff16c9c, (q31_t)0x2b2f207,
+    (q31_t)0x7ff1f30b, (q31_t)0x2a663d8, (q31_t)0x7ff27703, (q31_t)0x299d590,
+    (q31_t)0x7ff2f884, (q31_t)0x28d472e, (q31_t)0x7ff3778e, (q31_t)0x280b8b3,
+    (q31_t)0x7ff3f420, (q31_t)0x2742a1f, (q31_t)0x7ff46e3c, (q31_t)0x2679b73,
+    (q31_t)0x7ff4e5e0, (q31_t)0x25b0caf, (q31_t)0x7ff55b0d, (q31_t)0x24e7dd4,
+    (q31_t)0x7ff5cdc3, (q31_t)0x241eee2, (q31_t)0x7ff63e01, (q31_t)0x2355fd9,
+    (q31_t)0x7ff6abc8, (q31_t)0x228d0bb, (q31_t)0x7ff71718, (q31_t)0x21c4188,
+    (q31_t)0x7ff77ff1, (q31_t)0x20fb240, (q31_t)0x7ff7e652, (q31_t)0x20322e3,
+    (q31_t)0x7ff84a3c, (q31_t)0x1f69373, (q31_t)0x7ff8abae, (q31_t)0x1ea03ef,
+    (q31_t)0x7ff90aaa, (q31_t)0x1dd7459, (q31_t)0x7ff9672d, (q31_t)0x1d0e4b0,
+    (q31_t)0x7ff9c13a, (q31_t)0x1c454f5, (q31_t)0x7ffa18cf, (q31_t)0x1b7c528,
+    (q31_t)0x7ffa6dec, (q31_t)0x1ab354b, (q31_t)0x7ffac092, (q31_t)0x19ea55d,
+    (q31_t)0x7ffb10c1, (q31_t)0x192155f, (q31_t)0x7ffb5e78, (q31_t)0x1858552,
+    (q31_t)0x7ffba9b8, (q31_t)0x178f536, (q31_t)0x7ffbf280, (q31_t)0x16c650b,
+    (q31_t)0x7ffc38d1, (q31_t)0x15fd4d2, (q31_t)0x7ffc7caa, (q31_t)0x153448c,
+    (q31_t)0x7ffcbe0c, (q31_t)0x146b438, (q31_t)0x7ffcfcf6, (q31_t)0x13a23d8,
+    (q31_t)0x7ffd3969, (q31_t)0x12d936c, (q31_t)0x7ffd7364, (q31_t)0x12102f4,
+    (q31_t)0x7ffdaae7, (q31_t)0x1147271, (q31_t)0x7ffddff3, (q31_t)0x107e1e3,
+    (q31_t)0x7ffe1288, (q31_t)0xfb514b, (q31_t)0x7ffe42a4, (q31_t)0xeec0aa,
+    (q31_t)0x7ffe704a, (q31_t)0xe22fff, (q31_t)0x7ffe9b77, (q31_t)0xd59f4c,
+    (q31_t)0x7ffec42d, (q31_t)0xc90e90, (q31_t)0x7ffeea6c, (q31_t)0xbc7dcc,
+    (q31_t)0x7fff0e32, (q31_t)0xafed02, (q31_t)0x7fff2f82, (q31_t)0xa35c30,
+    (q31_t)0x7fff4e59, (q31_t)0x96cb58, (q31_t)0x7fff6ab9, (q31_t)0x8a3a7b,
+    (q31_t)0x7fff84a1, (q31_t)0x7da998, (q31_t)0x7fff9c12, (q31_t)0x7118b0,
+    (q31_t)0x7fffb10b, (q31_t)0x6487c4, (q31_t)0x7fffc38c, (q31_t)0x57f6d4,
+    (q31_t)0x7fffd396, (q31_t)0x4b65e1, (q31_t)0x7fffe128, (q31_t)0x3ed4ea,
+    (q31_t)0x7fffec43, (q31_t)0x3243f1, (q31_t)0x7ffff4e6, (q31_t)0x25b2f7,
+    (q31_t)0x7ffffb11, (q31_t)0x1921fb, (q31_t)0x7ffffec4, (q31_t)0xc90fe,
+    (q31_t)0x7fffffff, (q31_t)0x0, (q31_t)0x7ffffec4, (q31_t)0xfff36f02,
+    (q31_t)0x7ffffb11, (q31_t)0xffe6de05, (q31_t)0x7ffff4e6, (q31_t)0xffda4d09,
+    (q31_t)0x7fffec43, (q31_t)0xffcdbc0f, (q31_t)0x7fffe128, (q31_t)0xffc12b16,
+    (q31_t)0x7fffd396, (q31_t)0xffb49a1f, (q31_t)0x7fffc38c, (q31_t)0xffa8092c,
+    (q31_t)0x7fffb10b, (q31_t)0xff9b783c, (q31_t)0x7fff9c12, (q31_t)0xff8ee750,
+    (q31_t)0x7fff84a1, (q31_t)0xff825668, (q31_t)0x7fff6ab9, (q31_t)0xff75c585,
+    (q31_t)0x7fff4e59, (q31_t)0xff6934a8, (q31_t)0x7fff2f82, (q31_t)0xff5ca3d0,
+    (q31_t)0x7fff0e32, (q31_t)0xff5012fe, (q31_t)0x7ffeea6c, (q31_t)0xff438234,
+    (q31_t)0x7ffec42d, (q31_t)0xff36f170, (q31_t)0x7ffe9b77, (q31_t)0xff2a60b4,
+    (q31_t)0x7ffe704a, (q31_t)0xff1dd001, (q31_t)0x7ffe42a4, (q31_t)0xff113f56,
+    (q31_t)0x7ffe1288, (q31_t)0xff04aeb5, (q31_t)0x7ffddff3, (q31_t)0xfef81e1d,
+    (q31_t)0x7ffdaae7, (q31_t)0xfeeb8d8f, (q31_t)0x7ffd7364, (q31_t)0xfedefd0c,
+    (q31_t)0x7ffd3969, (q31_t)0xfed26c94, (q31_t)0x7ffcfcf6, (q31_t)0xfec5dc28,
+    (q31_t)0x7ffcbe0c, (q31_t)0xfeb94bc8, (q31_t)0x7ffc7caa, (q31_t)0xfeacbb74,
+    (q31_t)0x7ffc38d1, (q31_t)0xfea02b2e, (q31_t)0x7ffbf280, (q31_t)0xfe939af5,
+    (q31_t)0x7ffba9b8, (q31_t)0xfe870aca, (q31_t)0x7ffb5e78, (q31_t)0xfe7a7aae,
+    (q31_t)0x7ffb10c1, (q31_t)0xfe6deaa1, (q31_t)0x7ffac092, (q31_t)0xfe615aa3,
+    (q31_t)0x7ffa6dec, (q31_t)0xfe54cab5, (q31_t)0x7ffa18cf, (q31_t)0xfe483ad8,
+    (q31_t)0x7ff9c13a, (q31_t)0xfe3bab0b, (q31_t)0x7ff9672d, (q31_t)0xfe2f1b50,
+    (q31_t)0x7ff90aaa, (q31_t)0xfe228ba7, (q31_t)0x7ff8abae, (q31_t)0xfe15fc11,
+    (q31_t)0x7ff84a3c, (q31_t)0xfe096c8d, (q31_t)0x7ff7e652, (q31_t)0xfdfcdd1d,
+    (q31_t)0x7ff77ff1, (q31_t)0xfdf04dc0, (q31_t)0x7ff71718, (q31_t)0xfde3be78,
+    (q31_t)0x7ff6abc8, (q31_t)0xfdd72f45, (q31_t)0x7ff63e01, (q31_t)0xfdcaa027,
+    (q31_t)0x7ff5cdc3, (q31_t)0xfdbe111e, (q31_t)0x7ff55b0d, (q31_t)0xfdb1822c,
+    (q31_t)0x7ff4e5e0, (q31_t)0xfda4f351, (q31_t)0x7ff46e3c, (q31_t)0xfd98648d,
+    (q31_t)0x7ff3f420, (q31_t)0xfd8bd5e1, (q31_t)0x7ff3778e, (q31_t)0xfd7f474d,
+    (q31_t)0x7ff2f884, (q31_t)0xfd72b8d2, (q31_t)0x7ff27703, (q31_t)0xfd662a70,
+    (q31_t)0x7ff1f30b, (q31_t)0xfd599c28, (q31_t)0x7ff16c9c, (q31_t)0xfd4d0df9,
+    (q31_t)0x7ff0e3b6, (q31_t)0xfd407fe6, (q31_t)0x7ff05858, (q31_t)0xfd33f1ed,
+    (q31_t)0x7fefca84, (q31_t)0xfd276410, (q31_t)0x7fef3a39, (q31_t)0xfd1ad650,
+    (q31_t)0x7feea776, (q31_t)0xfd0e48ab, (q31_t)0x7fee123d, (q31_t)0xfd01bb24,
+    (q31_t)0x7fed7a8c, (q31_t)0xfcf52dbb, (q31_t)0x7fece065, (q31_t)0xfce8a06f,
+    (q31_t)0x7fec43c7, (q31_t)0xfcdc1342, (q31_t)0x7feba4b2, (q31_t)0xfccf8634,
+    (q31_t)0x7feb0326, (q31_t)0xfcc2f945, (q31_t)0x7fea5f23, (q31_t)0xfcb66c77,
+    (q31_t)0x7fe9b8a9, (q31_t)0xfca9dfc8, (q31_t)0x7fe90fb9, (q31_t)0xfc9d533b,
+    (q31_t)0x7fe86452, (q31_t)0xfc90c6cf, (q31_t)0x7fe7b674, (q31_t)0xfc843a85,
+    (q31_t)0x7fe7061f, (q31_t)0xfc77ae5e, (q31_t)0x7fe65354, (q31_t)0xfc6b2259,
+    (q31_t)0x7fe59e12, (q31_t)0xfc5e9678, (q31_t)0x7fe4e659, (q31_t)0xfc520aba,
+    (q31_t)0x7fe42c2a, (q31_t)0xfc457f21, (q31_t)0x7fe36f84, (q31_t)0xfc38f3ac,
+    (q31_t)0x7fe2b067, (q31_t)0xfc2c685d, (q31_t)0x7fe1eed5, (q31_t)0xfc1fdd34,
+    (q31_t)0x7fe12acb, (q31_t)0xfc135231, (q31_t)0x7fe0644b, (q31_t)0xfc06c754,
+    (q31_t)0x7fdf9b55, (q31_t)0xfbfa3c9f, (q31_t)0x7fdecfe8, (q31_t)0xfbedb212,
+    (q31_t)0x7fde0205, (q31_t)0xfbe127ac, (q31_t)0x7fdd31ac, (q31_t)0xfbd49d70,
+    (q31_t)0x7fdc5edc, (q31_t)0xfbc8135c, (q31_t)0x7fdb8996, (q31_t)0xfbbb8973,
+    (q31_t)0x7fdab1d9, (q31_t)0xfbaeffb3, (q31_t)0x7fd9d7a7, (q31_t)0xfba2761e,
+    (q31_t)0x7fd8fafe, (q31_t)0xfb95ecb4, (q31_t)0x7fd81bdf, (q31_t)0xfb896375,
+    (q31_t)0x7fd73a4a, (q31_t)0xfb7cda63, (q31_t)0x7fd6563f, (q31_t)0xfb70517d,
+    (q31_t)0x7fd56fbe, (q31_t)0xfb63c8c4, (q31_t)0x7fd486c7, (q31_t)0xfb574039,
+    (q31_t)0x7fd39b5a, (q31_t)0xfb4ab7db, (q31_t)0x7fd2ad77, (q31_t)0xfb3e2fac,
+    (q31_t)0x7fd1bd1e, (q31_t)0xfb31a7ac, (q31_t)0x7fd0ca4f, (q31_t)0xfb251fdc,
+    (q31_t)0x7fcfd50b, (q31_t)0xfb18983b, (q31_t)0x7fcedd50, (q31_t)0xfb0c10cb,
+    (q31_t)0x7fcde320, (q31_t)0xfaff898c, (q31_t)0x7fcce67a, (q31_t)0xfaf3027e,
+    (q31_t)0x7fcbe75e, (q31_t)0xfae67ba2, (q31_t)0x7fcae5cd, (q31_t)0xfad9f4f8,
+    (q31_t)0x7fc9e1c6, (q31_t)0xfacd6e81, (q31_t)0x7fc8db4a, (q31_t)0xfac0e83d,
+    (q31_t)0x7fc7d258, (q31_t)0xfab4622d, (q31_t)0x7fc6c6f0, (q31_t)0xfaa7dc52,
+    (q31_t)0x7fc5b913, (q31_t)0xfa9b56ab, (q31_t)0x7fc4a8c1, (q31_t)0xfa8ed139,
+    (q31_t)0x7fc395f9, (q31_t)0xfa824bfd, (q31_t)0x7fc280bc, (q31_t)0xfa75c6f8,
+    (q31_t)0x7fc1690a, (q31_t)0xfa694229, (q31_t)0x7fc04ee3, (q31_t)0xfa5cbd91,
+    (q31_t)0x7fbf3246, (q31_t)0xfa503930, (q31_t)0x7fbe1334, (q31_t)0xfa43b508,
+    (q31_t)0x7fbcf1ad, (q31_t)0xfa373119, (q31_t)0x7fbbcdb1, (q31_t)0xfa2aad62,
+    (q31_t)0x7fbaa740, (q31_t)0xfa1e29e5, (q31_t)0x7fb97e5a, (q31_t)0xfa11a6a3,
+    (q31_t)0x7fb852ff, (q31_t)0xfa05239a, (q31_t)0x7fb7252f, (q31_t)0xf9f8a0cd,
+    (q31_t)0x7fb5f4ea, (q31_t)0xf9ec1e3b, (q31_t)0x7fb4c231, (q31_t)0xf9df9be6,
+    (q31_t)0x7fb38d02, (q31_t)0xf9d319cc, (q31_t)0x7fb2555f, (q31_t)0xf9c697f0,
+    (q31_t)0x7fb11b48, (q31_t)0xf9ba1651, (q31_t)0x7fafdebb, (q31_t)0xf9ad94f0,
+    (q31_t)0x7fae9fbb, (q31_t)0xf9a113cd, (q31_t)0x7fad5e45, (q31_t)0xf99492ea,
+    (q31_t)0x7fac1a5b, (q31_t)0xf9881245, (q31_t)0x7faad3fd, (q31_t)0xf97b91e1,
+    (q31_t)0x7fa98b2a, (q31_t)0xf96f11bc, (q31_t)0x7fa83fe3, (q31_t)0xf96291d9,
+    (q31_t)0x7fa6f228, (q31_t)0xf9561237, (q31_t)0x7fa5a1f9, (q31_t)0xf94992d7,
+    (q31_t)0x7fa44f55, (q31_t)0xf93d13b8, (q31_t)0x7fa2fa3d, (q31_t)0xf93094dd,
+    (q31_t)0x7fa1a2b2, (q31_t)0xf9241645, (q31_t)0x7fa048b2, (q31_t)0xf91797f0,
+    (q31_t)0x7f9eec3e, (q31_t)0xf90b19e0, (q31_t)0x7f9d8d56, (q31_t)0xf8fe9c15,
+    (q31_t)0x7f9c2bfb, (q31_t)0xf8f21e8e, (q31_t)0x7f9ac82c, (q31_t)0xf8e5a14d,
+    (q31_t)0x7f9961e8, (q31_t)0xf8d92452, (q31_t)0x7f97f932, (q31_t)0xf8cca79e,
+    (q31_t)0x7f968e07, (q31_t)0xf8c02b31, (q31_t)0x7f952069, (q31_t)0xf8b3af0c,
+    (q31_t)0x7f93b058, (q31_t)0xf8a7332e, (q31_t)0x7f923dd2, (q31_t)0xf89ab799,
+    (q31_t)0x7f90c8da, (q31_t)0xf88e3c4d, (q31_t)0x7f8f516e, (q31_t)0xf881c14b,
+    (q31_t)0x7f8dd78f, (q31_t)0xf8754692, (q31_t)0x7f8c5b3d, (q31_t)0xf868cc24,
+    (q31_t)0x7f8adc77, (q31_t)0xf85c5201, (q31_t)0x7f895b3e, (q31_t)0xf84fd829,
+    (q31_t)0x7f87d792, (q31_t)0xf8435e9d, (q31_t)0x7f865174, (q31_t)0xf836e55d,
+    (q31_t)0x7f84c8e2, (q31_t)0xf82a6c6a, (q31_t)0x7f833ddd, (q31_t)0xf81df3c5,
+    (q31_t)0x7f81b065, (q31_t)0xf8117b6d, (q31_t)0x7f80207b, (q31_t)0xf8050364,
+    (q31_t)0x7f7e8e1e, (q31_t)0xf7f88ba9, (q31_t)0x7f7cf94e, (q31_t)0xf7ec143e,
+    (q31_t)0x7f7b620c, (q31_t)0xf7df9d22, (q31_t)0x7f79c857, (q31_t)0xf7d32657,
+    (q31_t)0x7f782c30, (q31_t)0xf7c6afdc, (q31_t)0x7f768d96, (q31_t)0xf7ba39b3,
+    (q31_t)0x7f74ec8a, (q31_t)0xf7adc3db, (q31_t)0x7f73490b, (q31_t)0xf7a14e55,
+    (q31_t)0x7f71a31b, (q31_t)0xf794d922, (q31_t)0x7f6ffab8, (q31_t)0xf7886442,
+    (q31_t)0x7f6e4fe3, (q31_t)0xf77befb5, (q31_t)0x7f6ca29c, (q31_t)0xf76f7b7d,
+    (q31_t)0x7f6af2e3, (q31_t)0xf7630799, (q31_t)0x7f6940b8, (q31_t)0xf756940a,
+    (q31_t)0x7f678c1c, (q31_t)0xf74a20d0, (q31_t)0x7f65d50d, (q31_t)0xf73daded,
+    (q31_t)0x7f641b8d, (q31_t)0xf7313b60, (q31_t)0x7f625f9b, (q31_t)0xf724c92a,
+    (q31_t)0x7f60a138, (q31_t)0xf718574b, (q31_t)0x7f5ee063, (q31_t)0xf70be5c4,
+    (q31_t)0x7f5d1d1d, (q31_t)0xf6ff7496, (q31_t)0x7f5b5765, (q31_t)0xf6f303c0,
+    (q31_t)0x7f598f3c, (q31_t)0xf6e69344, (q31_t)0x7f57c4a2, (q31_t)0xf6da2321,
+    (q31_t)0x7f55f796, (q31_t)0xf6cdb359, (q31_t)0x7f54281a, (q31_t)0xf6c143ec,
+    (q31_t)0x7f52562c, (q31_t)0xf6b4d4d9, (q31_t)0x7f5081cd, (q31_t)0xf6a86623,
+    (q31_t)0x7f4eaafe, (q31_t)0xf69bf7c9, (q31_t)0x7f4cd1be, (q31_t)0xf68f89cb,
+    (q31_t)0x7f4af60d, (q31_t)0xf6831c2b, (q31_t)0x7f4917eb, (q31_t)0xf676aee8,
+    (q31_t)0x7f473759, (q31_t)0xf66a4203, (q31_t)0x7f455456, (q31_t)0xf65dd57d,
+    (q31_t)0x7f436ee3, (q31_t)0xf6516956, (q31_t)0x7f4186ff, (q31_t)0xf644fd8f,
+    (q31_t)0x7f3f9cab, (q31_t)0xf6389228, (q31_t)0x7f3dafe7, (q31_t)0xf62c2721,
+    (q31_t)0x7f3bc0b3, (q31_t)0xf61fbc7b, (q31_t)0x7f39cf0e, (q31_t)0xf6135237,
+    (q31_t)0x7f37dafa, (q31_t)0xf606e854, (q31_t)0x7f35e476, (q31_t)0xf5fa7ed4,
+    (q31_t)0x7f33eb81, (q31_t)0xf5ee15b7, (q31_t)0x7f31f01d, (q31_t)0xf5e1acfd,
+    (q31_t)0x7f2ff24a, (q31_t)0xf5d544a7, (q31_t)0x7f2df206, (q31_t)0xf5c8dcb6,
+    (q31_t)0x7f2bef53, (q31_t)0xf5bc7529, (q31_t)0x7f29ea31, (q31_t)0xf5b00e02,
+    (q31_t)0x7f27e29f, (q31_t)0xf5a3a740, (q31_t)0x7f25d89e, (q31_t)0xf59740e5,
+    (q31_t)0x7f23cc2e, (q31_t)0xf58adaf0, (q31_t)0x7f21bd4e, (q31_t)0xf57e7563,
+    (q31_t)0x7f1fabff, (q31_t)0xf572103d, (q31_t)0x7f1d9842, (q31_t)0xf565ab80,
+    (q31_t)0x7f1b8215, (q31_t)0xf559472b, (q31_t)0x7f19697a, (q31_t)0xf54ce33f,
+    (q31_t)0x7f174e70, (q31_t)0xf5407fbd, (q31_t)0x7f1530f7, (q31_t)0xf5341ca5,
+    (q31_t)0x7f13110f, (q31_t)0xf527b9f7, (q31_t)0x7f10eeb9, (q31_t)0xf51b57b5,
+    (q31_t)0x7f0ec9f5, (q31_t)0xf50ef5de, (q31_t)0x7f0ca2c2, (q31_t)0xf5029473,
+    (q31_t)0x7f0a7921, (q31_t)0xf4f63374, (q31_t)0x7f084d12, (q31_t)0xf4e9d2e3,
+    (q31_t)0x7f061e95, (q31_t)0xf4dd72be, (q31_t)0x7f03eda9, (q31_t)0xf4d11308,
+    (q31_t)0x7f01ba50, (q31_t)0xf4c4b3c0, (q31_t)0x7eff8489, (q31_t)0xf4b854e7,
+    (q31_t)0x7efd4c54, (q31_t)0xf4abf67e, (q31_t)0x7efb11b1, (q31_t)0xf49f9884,
+    (q31_t)0x7ef8d4a1, (q31_t)0xf4933afa, (q31_t)0x7ef69523, (q31_t)0xf486dde1,
+    (q31_t)0x7ef45338, (q31_t)0xf47a8139, (q31_t)0x7ef20ee0, (q31_t)0xf46e2504,
+    (q31_t)0x7eefc81a, (q31_t)0xf461c940, (q31_t)0x7eed7ee7, (q31_t)0xf4556def,
+    (q31_t)0x7eeb3347, (q31_t)0xf4491311, (q31_t)0x7ee8e53a, (q31_t)0xf43cb8a7,
+    (q31_t)0x7ee694c1, (q31_t)0xf4305eb0, (q31_t)0x7ee441da, (q31_t)0xf424052f,
+    (q31_t)0x7ee1ec87, (q31_t)0xf417ac22, (q31_t)0x7edf94c7, (q31_t)0xf40b538b,
+    (q31_t)0x7edd3a9a, (q31_t)0xf3fefb6a, (q31_t)0x7edade01, (q31_t)0xf3f2a3bf,
+    (q31_t)0x7ed87efc, (q31_t)0xf3e64c8c, (q31_t)0x7ed61d8a, (q31_t)0xf3d9f5cf,
+    (q31_t)0x7ed3b9ad, (q31_t)0xf3cd9f8b, (q31_t)0x7ed15363, (q31_t)0xf3c149bf,
+    (q31_t)0x7eceeaad, (q31_t)0xf3b4f46c, (q31_t)0x7ecc7f8b, (q31_t)0xf3a89f92,
+    (q31_t)0x7eca11fe, (q31_t)0xf39c4b32, (q31_t)0x7ec7a205, (q31_t)0xf38ff74d,
+    (q31_t)0x7ec52fa0, (q31_t)0xf383a3e2, (q31_t)0x7ec2bad0, (q31_t)0xf37750f2,
+    (q31_t)0x7ec04394, (q31_t)0xf36afe7e, (q31_t)0x7ebdc9ed, (q31_t)0xf35eac86,
+    (q31_t)0x7ebb4ddb, (q31_t)0xf3525b0b, (q31_t)0x7eb8cf5d, (q31_t)0xf3460a0d,
+    (q31_t)0x7eb64e75, (q31_t)0xf339b98d, (q31_t)0x7eb3cb21, (q31_t)0xf32d698a,
+    (q31_t)0x7eb14563, (q31_t)0xf3211a07, (q31_t)0x7eaebd3a, (q31_t)0xf314cb02,
+    (q31_t)0x7eac32a6, (q31_t)0xf3087c7d, (q31_t)0x7ea9a5a8, (q31_t)0xf2fc2e77,
+    (q31_t)0x7ea7163f, (q31_t)0xf2efe0f2, (q31_t)0x7ea4846c, (q31_t)0xf2e393ef,
+    (q31_t)0x7ea1f02f, (q31_t)0xf2d7476c, (q31_t)0x7e9f5988, (q31_t)0xf2cafb6b,
+    (q31_t)0x7e9cc076, (q31_t)0xf2beafed, (q31_t)0x7e9a24fb, (q31_t)0xf2b264f2,
+    (q31_t)0x7e978715, (q31_t)0xf2a61a7a, (q31_t)0x7e94e6c6, (q31_t)0xf299d085,
+    (q31_t)0x7e92440d, (q31_t)0xf28d8715, (q31_t)0x7e8f9eeb, (q31_t)0xf2813e2a,
+    (q31_t)0x7e8cf75f, (q31_t)0xf274f5c3, (q31_t)0x7e8a4d6a, (q31_t)0xf268ade3,
+    (q31_t)0x7e87a10c, (q31_t)0xf25c6688, (q31_t)0x7e84f245, (q31_t)0xf2501fb5,
+    (q31_t)0x7e824114, (q31_t)0xf243d968, (q31_t)0x7e7f8d7b, (q31_t)0xf23793a3,
+    (q31_t)0x7e7cd778, (q31_t)0xf22b4e66, (q31_t)0x7e7a1f0d, (q31_t)0xf21f09b1,
+    (q31_t)0x7e77643a, (q31_t)0xf212c585, (q31_t)0x7e74a6fd, (q31_t)0xf20681e3,
+    (q31_t)0x7e71e759, (q31_t)0xf1fa3ecb, (q31_t)0x7e6f254c, (q31_t)0xf1edfc3d,
+    (q31_t)0x7e6c60d7, (q31_t)0xf1e1ba3a, (q31_t)0x7e6999fa, (q31_t)0xf1d578c2,
+    (q31_t)0x7e66d0b4, (q31_t)0xf1c937d6, (q31_t)0x7e640507, (q31_t)0xf1bcf777,
+    (q31_t)0x7e6136f3, (q31_t)0xf1b0b7a4, (q31_t)0x7e5e6676, (q31_t)0xf1a4785e,
+    (q31_t)0x7e5b9392, (q31_t)0xf19839a6, (q31_t)0x7e58be47, (q31_t)0xf18bfb7d,
+    (q31_t)0x7e55e694, (q31_t)0xf17fbde2, (q31_t)0x7e530c7a, (q31_t)0xf17380d6,
+    (q31_t)0x7e502ff9, (q31_t)0xf1674459, (q31_t)0x7e4d5110, (q31_t)0xf15b086d,
+    (q31_t)0x7e4a6fc1, (q31_t)0xf14ecd11, (q31_t)0x7e478c0b, (q31_t)0xf1429247,
+    (q31_t)0x7e44a5ef, (q31_t)0xf136580d, (q31_t)0x7e41bd6c, (q31_t)0xf12a1e66,
+    (q31_t)0x7e3ed282, (q31_t)0xf11de551, (q31_t)0x7e3be532, (q31_t)0xf111accf,
+    (q31_t)0x7e38f57c, (q31_t)0xf10574e0, (q31_t)0x7e360360, (q31_t)0xf0f93d86,
+    (q31_t)0x7e330ede, (q31_t)0xf0ed06bf, (q31_t)0x7e3017f6, (q31_t)0xf0e0d08d,
+    (q31_t)0x7e2d1ea8, (q31_t)0xf0d49af1, (q31_t)0x7e2a22f4, (q31_t)0xf0c865ea,
+    (q31_t)0x7e2724db, (q31_t)0xf0bc317a, (q31_t)0x7e24245d, (q31_t)0xf0affda0,
+    (q31_t)0x7e212179, (q31_t)0xf0a3ca5d, (q31_t)0x7e1e1c30, (q31_t)0xf09797b2,
+    (q31_t)0x7e1b1482, (q31_t)0xf08b659f, (q31_t)0x7e180a6f, (q31_t)0xf07f3424,
+    (q31_t)0x7e14fdf7, (q31_t)0xf0730342, (q31_t)0x7e11ef1b, (q31_t)0xf066d2fa,
+    (q31_t)0x7e0eddd9, (q31_t)0xf05aa34c, (q31_t)0x7e0bca34, (q31_t)0xf04e7438,
+    (q31_t)0x7e08b42a, (q31_t)0xf04245c0, (q31_t)0x7e059bbb, (q31_t)0xf03617e2,
+    (q31_t)0x7e0280e9, (q31_t)0xf029eaa1, (q31_t)0x7dff63b2, (q31_t)0xf01dbdfb,
+    (q31_t)0x7dfc4418, (q31_t)0xf01191f3, (q31_t)0x7df9221a, (q31_t)0xf0056687,
+    (q31_t)0x7df5fdb8, (q31_t)0xeff93bba, (q31_t)0x7df2d6f3, (q31_t)0xefed118a,
+    (q31_t)0x7defadca, (q31_t)0xefe0e7f9, (q31_t)0x7dec823e, (q31_t)0xefd4bf08,
+    (q31_t)0x7de9544f, (q31_t)0xefc896b5, (q31_t)0x7de623fd, (q31_t)0xefbc6f03,
+    (q31_t)0x7de2f148, (q31_t)0xefb047f2, (q31_t)0x7ddfbc30, (q31_t)0xefa42181,
+    (q31_t)0x7ddc84b5, (q31_t)0xef97fbb2, (q31_t)0x7dd94ad8, (q31_t)0xef8bd685,
+    (q31_t)0x7dd60e99, (q31_t)0xef7fb1fa, (q31_t)0x7dd2cff7, (q31_t)0xef738e12,
+    (q31_t)0x7dcf8ef3, (q31_t)0xef676ace, (q31_t)0x7dcc4b8d, (q31_t)0xef5b482d,
+    (q31_t)0x7dc905c5, (q31_t)0xef4f2630, (q31_t)0x7dc5bd9b, (q31_t)0xef4304d8,
+    (q31_t)0x7dc2730f, (q31_t)0xef36e426, (q31_t)0x7dbf2622, (q31_t)0xef2ac419,
+    (q31_t)0x7dbbd6d4, (q31_t)0xef1ea4b2, (q31_t)0x7db88524, (q31_t)0xef1285f2,
+    (q31_t)0x7db53113, (q31_t)0xef0667d9, (q31_t)0x7db1daa2, (q31_t)0xeefa4a67,
+    (q31_t)0x7dae81cf, (q31_t)0xeeee2d9d, (q31_t)0x7dab269b, (q31_t)0xeee2117c,
+    (q31_t)0x7da7c907, (q31_t)0xeed5f604, (q31_t)0x7da46912, (q31_t)0xeec9db35,
+    (q31_t)0x7da106bd, (q31_t)0xeebdc110, (q31_t)0x7d9da208, (q31_t)0xeeb1a796,
+    (q31_t)0x7d9a3af2, (q31_t)0xeea58ec6, (q31_t)0x7d96d17d, (q31_t)0xee9976a1,
+    (q31_t)0x7d9365a8, (q31_t)0xee8d5f29, (q31_t)0x7d8ff772, (q31_t)0xee81485c,
+    (q31_t)0x7d8c86de, (q31_t)0xee75323c, (q31_t)0x7d8913ea, (q31_t)0xee691cc9,
+    (q31_t)0x7d859e96, (q31_t)0xee5d0804, (q31_t)0x7d8226e4, (q31_t)0xee50f3ed,
+    (q31_t)0x7d7eacd2, (q31_t)0xee44e084, (q31_t)0x7d7b3061, (q31_t)0xee38cdcb,
+    (q31_t)0x7d77b192, (q31_t)0xee2cbbc1, (q31_t)0x7d743064, (q31_t)0xee20aa67,
+    (q31_t)0x7d70acd7, (q31_t)0xee1499bd, (q31_t)0x7d6d26ec, (q31_t)0xee0889c4,
+    (q31_t)0x7d699ea3, (q31_t)0xedfc7a7c, (q31_t)0x7d6613fb, (q31_t)0xedf06be6,
+    (q31_t)0x7d6286f6, (q31_t)0xede45e03, (q31_t)0x7d5ef793, (q31_t)0xedd850d2,
+    (q31_t)0x7d5b65d2, (q31_t)0xedcc4454, (q31_t)0x7d57d1b3, (q31_t)0xedc0388a,
+    (q31_t)0x7d543b37, (q31_t)0xedb42d74, (q31_t)0x7d50a25e, (q31_t)0xeda82313,
+    (q31_t)0x7d4d0728, (q31_t)0xed9c1967, (q31_t)0x7d496994, (q31_t)0xed901070,
+    (q31_t)0x7d45c9a4, (q31_t)0xed84082f, (q31_t)0x7d422757, (q31_t)0xed7800a5,
+    (q31_t)0x7d3e82ae, (q31_t)0xed6bf9d1, (q31_t)0x7d3adba7, (q31_t)0xed5ff3b5,
+    (q31_t)0x7d373245, (q31_t)0xed53ee51, (q31_t)0x7d338687, (q31_t)0xed47e9a5,
+    (q31_t)0x7d2fd86c, (q31_t)0xed3be5b1, (q31_t)0x7d2c27f6, (q31_t)0xed2fe277,
+    (q31_t)0x7d287523, (q31_t)0xed23dff7, (q31_t)0x7d24bff6, (q31_t)0xed17de31,
+    (q31_t)0x7d21086c, (q31_t)0xed0bdd25, (q31_t)0x7d1d4e88, (q31_t)0xecffdcd4,
+    (q31_t)0x7d199248, (q31_t)0xecf3dd3f, (q31_t)0x7d15d3ad, (q31_t)0xece7de66,
+    (q31_t)0x7d1212b7, (q31_t)0xecdbe04a, (q31_t)0x7d0e4f67, (q31_t)0xeccfe2ea,
+    (q31_t)0x7d0a89bc, (q31_t)0xecc3e648, (q31_t)0x7d06c1b6, (q31_t)0xecb7ea63,
+    (q31_t)0x7d02f757, (q31_t)0xecabef3d, (q31_t)0x7cff2a9d, (q31_t)0xec9ff4d6,
+    (q31_t)0x7cfb5b89, (q31_t)0xec93fb2e, (q31_t)0x7cf78a1b, (q31_t)0xec880245,
+    (q31_t)0x7cf3b653, (q31_t)0xec7c0a1d, (q31_t)0x7cefe032, (q31_t)0xec7012b5,
+    (q31_t)0x7cec07b8, (q31_t)0xec641c0e, (q31_t)0x7ce82ce4, (q31_t)0xec582629,
+    (q31_t)0x7ce44fb7, (q31_t)0xec4c3106, (q31_t)0x7ce07031, (q31_t)0xec403ca5,
+    (q31_t)0x7cdc8e52, (q31_t)0xec344908, (q31_t)0x7cd8aa1b, (q31_t)0xec28562d,
+    (q31_t)0x7cd4c38b, (q31_t)0xec1c6417, (q31_t)0x7cd0daa2, (q31_t)0xec1072c4,
+    (q31_t)0x7cccef62, (q31_t)0xec048237, (q31_t)0x7cc901c9, (q31_t)0xebf8926f,
+    (q31_t)0x7cc511d9, (q31_t)0xebeca36c, (q31_t)0x7cc11f90, (q31_t)0xebe0b52f,
+    (q31_t)0x7cbd2af0, (q31_t)0xebd4c7ba, (q31_t)0x7cb933f9, (q31_t)0xebc8db0b,
+    (q31_t)0x7cb53aaa, (q31_t)0xebbcef23, (q31_t)0x7cb13f04, (q31_t)0xebb10404,
+    (q31_t)0x7cad4107, (q31_t)0xeba519ad, (q31_t)0x7ca940b3, (q31_t)0xeb99301f,
+    (q31_t)0x7ca53e09, (q31_t)0xeb8d475b, (q31_t)0x7ca13908, (q31_t)0xeb815f60,
+    (q31_t)0x7c9d31b0, (q31_t)0xeb75782f, (q31_t)0x7c992803, (q31_t)0xeb6991ca,
+    (q31_t)0x7c951bff, (q31_t)0xeb5dac2f, (q31_t)0x7c910da5, (q31_t)0xeb51c760,
+    (q31_t)0x7c8cfcf6, (q31_t)0xeb45e35d, (q31_t)0x7c88e9f1, (q31_t)0xeb3a0027,
+    (q31_t)0x7c84d496, (q31_t)0xeb2e1dbe, (q31_t)0x7c80bce7, (q31_t)0xeb223c22,
+    (q31_t)0x7c7ca2e2, (q31_t)0xeb165b54, (q31_t)0x7c788688, (q31_t)0xeb0a7b54,
+    (q31_t)0x7c7467d9, (q31_t)0xeafe9c24, (q31_t)0x7c7046d6, (q31_t)0xeaf2bdc3,
+    (q31_t)0x7c6c237e, (q31_t)0xeae6e031, (q31_t)0x7c67fdd1, (q31_t)0xeadb0370,
+    (q31_t)0x7c63d5d1, (q31_t)0xeacf277f, (q31_t)0x7c5fab7c, (q31_t)0xeac34c60,
+    (q31_t)0x7c5b7ed4, (q31_t)0xeab77212, (q31_t)0x7c574fd8, (q31_t)0xeaab9896,
+    (q31_t)0x7c531e88, (q31_t)0xea9fbfed, (q31_t)0x7c4eeae5, (q31_t)0xea93e817,
+    (q31_t)0x7c4ab4ef, (q31_t)0xea881114, (q31_t)0x7c467ca6, (q31_t)0xea7c3ae5,
+    (q31_t)0x7c42420a, (q31_t)0xea70658a, (q31_t)0x7c3e051b, (q31_t)0xea649105,
+    (q31_t)0x7c39c5da, (q31_t)0xea58bd54, (q31_t)0x7c358446, (q31_t)0xea4cea79,
+    (q31_t)0x7c314060, (q31_t)0xea411874, (q31_t)0x7c2cfa28, (q31_t)0xea354746,
+    (q31_t)0x7c28b19e, (q31_t)0xea2976ef, (q31_t)0x7c2466c2, (q31_t)0xea1da770,
+    (q31_t)0x7c201994, (q31_t)0xea11d8c8, (q31_t)0x7c1bca16, (q31_t)0xea060af9,
+    (q31_t)0x7c177845, (q31_t)0xe9fa3e03, (q31_t)0x7c132424, (q31_t)0xe9ee71e6,
+    (q31_t)0x7c0ecdb2, (q31_t)0xe9e2a6a3, (q31_t)0x7c0a74f0, (q31_t)0xe9d6dc3b,
+    (q31_t)0x7c0619dc, (q31_t)0xe9cb12ad, (q31_t)0x7c01bc78, (q31_t)0xe9bf49fa,
+    (q31_t)0x7bfd5cc4, (q31_t)0xe9b38223, (q31_t)0x7bf8fac0, (q31_t)0xe9a7bb28,
+    (q31_t)0x7bf4966c, (q31_t)0xe99bf509, (q31_t)0x7bf02fc9, (q31_t)0xe9902fc7,
+    (q31_t)0x7bebc6d5, (q31_t)0xe9846b63, (q31_t)0x7be75b93, (q31_t)0xe978a7dd,
+    (q31_t)0x7be2ee01, (q31_t)0xe96ce535, (q31_t)0x7bde7e20, (q31_t)0xe961236c,
+    (q31_t)0x7bda0bf0, (q31_t)0xe9556282, (q31_t)0x7bd59771, (q31_t)0xe949a278,
+    (q31_t)0x7bd120a4, (q31_t)0xe93de34e, (q31_t)0x7bcca789, (q31_t)0xe9322505,
+    (q31_t)0x7bc82c1f, (q31_t)0xe926679c, (q31_t)0x7bc3ae67, (q31_t)0xe91aab16,
+    (q31_t)0x7bbf2e62, (q31_t)0xe90eef71, (q31_t)0x7bbaac0e, (q31_t)0xe90334af,
+    (q31_t)0x7bb6276e, (q31_t)0xe8f77acf, (q31_t)0x7bb1a080, (q31_t)0xe8ebc1d3,
+    (q31_t)0x7bad1744, (q31_t)0xe8e009ba, (q31_t)0x7ba88bbc, (q31_t)0xe8d45286,
+    (q31_t)0x7ba3fde7, (q31_t)0xe8c89c37, (q31_t)0x7b9f6dc5, (q31_t)0xe8bce6cd,
+    (q31_t)0x7b9adb57, (q31_t)0xe8b13248, (q31_t)0x7b96469d, (q31_t)0xe8a57ea9,
+    (q31_t)0x7b91af97, (q31_t)0xe899cbf1, (q31_t)0x7b8d1644, (q31_t)0xe88e1a20,
+    (q31_t)0x7b887aa6, (q31_t)0xe8826936, (q31_t)0x7b83dcbc, (q31_t)0xe876b934,
+    (q31_t)0x7b7f3c87, (q31_t)0xe86b0a1a, (q31_t)0x7b7a9a07, (q31_t)0xe85f5be9,
+    (q31_t)0x7b75f53c, (q31_t)0xe853aea1, (q31_t)0x7b714e25, (q31_t)0xe8480243,
+    (q31_t)0x7b6ca4c4, (q31_t)0xe83c56cf, (q31_t)0x7b67f919, (q31_t)0xe830ac45,
+    (q31_t)0x7b634b23, (q31_t)0xe82502a7, (q31_t)0x7b5e9ae4, (q31_t)0xe81959f4,
+    (q31_t)0x7b59e85a, (q31_t)0xe80db22d, (q31_t)0x7b553386, (q31_t)0xe8020b52,
+    (q31_t)0x7b507c69, (q31_t)0xe7f66564, (q31_t)0x7b4bc303, (q31_t)0xe7eac063,
+    (q31_t)0x7b470753, (q31_t)0xe7df1c50, (q31_t)0x7b42495a, (q31_t)0xe7d3792b,
+    (q31_t)0x7b3d8918, (q31_t)0xe7c7d6f4, (q31_t)0x7b38c68e, (q31_t)0xe7bc35ad,
+    (q31_t)0x7b3401bb, (q31_t)0xe7b09555, (q31_t)0x7b2f3aa0, (q31_t)0xe7a4f5ed,
+    (q31_t)0x7b2a713d, (q31_t)0xe7995776, (q31_t)0x7b25a591, (q31_t)0xe78db9ef,
+    (q31_t)0x7b20d79e, (q31_t)0xe7821d59, (q31_t)0x7b1c0764, (q31_t)0xe77681b6,
+    (q31_t)0x7b1734e2, (q31_t)0xe76ae704, (q31_t)0x7b126019, (q31_t)0xe75f4d45,
+    (q31_t)0x7b0d8909, (q31_t)0xe753b479, (q31_t)0x7b08afb2, (q31_t)0xe7481ca1,
+    (q31_t)0x7b03d414, (q31_t)0xe73c85bc, (q31_t)0x7afef630, (q31_t)0xe730efcc,
+    (q31_t)0x7afa1605, (q31_t)0xe7255ad1, (q31_t)0x7af53395, (q31_t)0xe719c6cb,
+    (q31_t)0x7af04edf, (q31_t)0xe70e33bb, (q31_t)0x7aeb67e3, (q31_t)0xe702a1a1,
+    (q31_t)0x7ae67ea1, (q31_t)0xe6f7107e, (q31_t)0x7ae1931a, (q31_t)0xe6eb8052,
+    (q31_t)0x7adca54e, (q31_t)0xe6dff11d, (q31_t)0x7ad7b53d, (q31_t)0xe6d462e1,
+    (q31_t)0x7ad2c2e8, (q31_t)0xe6c8d59c, (q31_t)0x7acdce4d, (q31_t)0xe6bd4951,
+    (q31_t)0x7ac8d76f, (q31_t)0xe6b1bdff, (q31_t)0x7ac3de4c, (q31_t)0xe6a633a6,
+    (q31_t)0x7abee2e5, (q31_t)0xe69aaa48, (q31_t)0x7ab9e53a, (q31_t)0xe68f21e5,
+    (q31_t)0x7ab4e54c, (q31_t)0xe6839a7c, (q31_t)0x7aafe31b, (q31_t)0xe6781410,
+    (q31_t)0x7aaadea6, (q31_t)0xe66c8e9f, (q31_t)0x7aa5d7ee, (q31_t)0xe6610a2a,
+    (q31_t)0x7aa0cef3, (q31_t)0xe65586b3, (q31_t)0x7a9bc3b6, (q31_t)0xe64a0438,
+    (q31_t)0x7a96b636, (q31_t)0xe63e82bc, (q31_t)0x7a91a674, (q31_t)0xe633023e,
+    (q31_t)0x7a8c9470, (q31_t)0xe62782be, (q31_t)0x7a87802a, (q31_t)0xe61c043d,
+    (q31_t)0x7a8269a3, (q31_t)0xe61086bc, (q31_t)0x7a7d50da, (q31_t)0xe6050a3b,
+    (q31_t)0x7a7835cf, (q31_t)0xe5f98ebb, (q31_t)0x7a731884, (q31_t)0xe5ee143b,
+    (q31_t)0x7a6df8f8, (q31_t)0xe5e29abc, (q31_t)0x7a68d72b, (q31_t)0xe5d72240,
+    (q31_t)0x7a63b31d, (q31_t)0xe5cbaac5, (q31_t)0x7a5e8cd0, (q31_t)0xe5c0344d,
+    (q31_t)0x7a596442, (q31_t)0xe5b4bed8, (q31_t)0x7a543974, (q31_t)0xe5a94a67,
+    (q31_t)0x7a4f0c67, (q31_t)0xe59dd6f9, (q31_t)0x7a49dd1a, (q31_t)0xe5926490,
+    (q31_t)0x7a44ab8e, (q31_t)0xe586f32c, (q31_t)0x7a3f77c3, (q31_t)0xe57b82cd,
+    (q31_t)0x7a3a41b9, (q31_t)0xe5701374, (q31_t)0x7a350970, (q31_t)0xe564a521,
+    (q31_t)0x7a2fcee8, (q31_t)0xe55937d5, (q31_t)0x7a2a9223, (q31_t)0xe54dcb8f,
+    (q31_t)0x7a25531f, (q31_t)0xe5426051, (q31_t)0x7a2011de, (q31_t)0xe536f61b,
+    (q31_t)0x7a1ace5f, (q31_t)0xe52b8cee, (q31_t)0x7a1588a2, (q31_t)0xe52024c9,
+    (q31_t)0x7a1040a8, (q31_t)0xe514bdad, (q31_t)0x7a0af671, (q31_t)0xe509579b,
+    (q31_t)0x7a05a9fd, (q31_t)0xe4fdf294, (q31_t)0x7a005b4d, (q31_t)0xe4f28e96,
+    (q31_t)0x79fb0a60, (q31_t)0xe4e72ba4, (q31_t)0x79f5b737, (q31_t)0xe4dbc9bd,
+    (q31_t)0x79f061d2, (q31_t)0xe4d068e2, (q31_t)0x79eb0a31, (q31_t)0xe4c50914,
+    (q31_t)0x79e5b054, (q31_t)0xe4b9aa52, (q31_t)0x79e0543c, (q31_t)0xe4ae4c9d,
+    (q31_t)0x79daf5e8, (q31_t)0xe4a2eff6, (q31_t)0x79d5955a, (q31_t)0xe497945d,
+    (q31_t)0x79d03291, (q31_t)0xe48c39d3, (q31_t)0x79cacd8d, (q31_t)0xe480e057,
+    (q31_t)0x79c5664f, (q31_t)0xe47587eb, (q31_t)0x79bffcd7, (q31_t)0xe46a308f,
+    (q31_t)0x79ba9125, (q31_t)0xe45eda43, (q31_t)0x79b52339, (q31_t)0xe4538507,
+    (q31_t)0x79afb313, (q31_t)0xe44830dd, (q31_t)0x79aa40b4, (q31_t)0xe43cddc4,
+    (q31_t)0x79a4cc1c, (q31_t)0xe4318bbe, (q31_t)0x799f554b, (q31_t)0xe4263ac9,
+    (q31_t)0x7999dc42, (q31_t)0xe41aeae8, (q31_t)0x799460ff, (q31_t)0xe40f9c1a,
+    (q31_t)0x798ee385, (q31_t)0xe4044e60, (q31_t)0x798963d2, (q31_t)0xe3f901ba,
+    (q31_t)0x7983e1e8, (q31_t)0xe3edb628, (q31_t)0x797e5dc6, (q31_t)0xe3e26bac,
+    (q31_t)0x7978d76c, (q31_t)0xe3d72245, (q31_t)0x79734edc, (q31_t)0xe3cbd9f4,
+    (q31_t)0x796dc414, (q31_t)0xe3c092b9, (q31_t)0x79683715, (q31_t)0xe3b54c95,
+    (q31_t)0x7962a7e0, (q31_t)0xe3aa0788, (q31_t)0x795d1675, (q31_t)0xe39ec393,
+    (q31_t)0x795782d3, (q31_t)0xe39380b6, (q31_t)0x7951ecfc, (q31_t)0xe3883ef2,
+    (q31_t)0x794c54ee, (q31_t)0xe37cfe47, (q31_t)0x7946baac, (q31_t)0xe371beb5,
+    (q31_t)0x79411e33, (q31_t)0xe366803c, (q31_t)0x793b7f86, (q31_t)0xe35b42df,
+    (q31_t)0x7935dea4, (q31_t)0xe350069b, (q31_t)0x79303b8e, (q31_t)0xe344cb73,
+    (q31_t)0x792a9642, (q31_t)0xe3399167, (q31_t)0x7924eec3, (q31_t)0xe32e5876,
+    (q31_t)0x791f4510, (q31_t)0xe32320a2, (q31_t)0x79199929, (q31_t)0xe317e9eb,
+    (q31_t)0x7913eb0e, (q31_t)0xe30cb451, (q31_t)0x790e3ac0, (q31_t)0xe3017fd5,
+    (q31_t)0x7908883f, (q31_t)0xe2f64c77, (q31_t)0x7902d38b, (q31_t)0xe2eb1a37,
+    (q31_t)0x78fd1ca4, (q31_t)0xe2dfe917, (q31_t)0x78f7638b, (q31_t)0xe2d4b916,
+    (q31_t)0x78f1a840, (q31_t)0xe2c98a35, (q31_t)0x78ebeac2, (q31_t)0xe2be5c74,
+    (q31_t)0x78e62b13, (q31_t)0xe2b32fd4, (q31_t)0x78e06932, (q31_t)0xe2a80456,
+    (q31_t)0x78daa520, (q31_t)0xe29cd9f8, (q31_t)0x78d4dedd, (q31_t)0xe291b0bd,
+    (q31_t)0x78cf1669, (q31_t)0xe28688a4, (q31_t)0x78c94bc4, (q31_t)0xe27b61af,
+    (q31_t)0x78c37eef, (q31_t)0xe2703bdc, (q31_t)0x78bdafea, (q31_t)0xe265172e,
+    (q31_t)0x78b7deb4, (q31_t)0xe259f3a3, (q31_t)0x78b20b4f, (q31_t)0xe24ed13d,
+    (q31_t)0x78ac35ba, (q31_t)0xe243affc, (q31_t)0x78a65df6, (q31_t)0xe2388fe1,
+    (q31_t)0x78a08402, (q31_t)0xe22d70eb, (q31_t)0x789aa7e0, (q31_t)0xe222531c,
+    (q31_t)0x7894c98f, (q31_t)0xe2173674, (q31_t)0x788ee910, (q31_t)0xe20c1af3,
+    (q31_t)0x78890663, (q31_t)0xe2010099, (q31_t)0x78832187, (q31_t)0xe1f5e768,
+    (q31_t)0x787d3a7e, (q31_t)0xe1eacf5f, (q31_t)0x78775147, (q31_t)0xe1dfb87f,
+    (q31_t)0x787165e3, (q31_t)0xe1d4a2c8, (q31_t)0x786b7852, (q31_t)0xe1c98e3b,
+    (q31_t)0x78658894, (q31_t)0xe1be7ad8, (q31_t)0x785f96a9, (q31_t)0xe1b368a0,
+    (q31_t)0x7859a292, (q31_t)0xe1a85793, (q31_t)0x7853ac4f, (q31_t)0xe19d47b1,
+    (q31_t)0x784db3e0, (q31_t)0xe19238fb, (q31_t)0x7847b946, (q31_t)0xe1872b72,
+    (q31_t)0x7841bc7f, (q31_t)0xe17c1f15, (q31_t)0x783bbd8e, (q31_t)0xe17113e5,
+    (q31_t)0x7835bc71, (q31_t)0xe16609e3, (q31_t)0x782fb92a, (q31_t)0xe15b0110,
+    (q31_t)0x7829b3b9, (q31_t)0xe14ff96a, (q31_t)0x7823ac1d, (q31_t)0xe144f2f3,
+    (q31_t)0x781da256, (q31_t)0xe139edac, (q31_t)0x78179666, (q31_t)0xe12ee995,
+    (q31_t)0x7811884d, (q31_t)0xe123e6ad, (q31_t)0x780b780a, (q31_t)0xe118e4f6,
+    (q31_t)0x7805659e, (q31_t)0xe10de470, (q31_t)0x77ff5109, (q31_t)0xe102e51c,
+    (q31_t)0x77f93a4b, (q31_t)0xe0f7e6f9, (q31_t)0x77f32165, (q31_t)0xe0ecea09,
+    (q31_t)0x77ed0657, (q31_t)0xe0e1ee4b, (q31_t)0x77e6e921, (q31_t)0xe0d6f3c1,
+    (q31_t)0x77e0c9c3, (q31_t)0xe0cbfa6a, (q31_t)0x77daa83d, (q31_t)0xe0c10247,
+    (q31_t)0x77d48490, (q31_t)0xe0b60b58, (q31_t)0x77ce5ebd, (q31_t)0xe0ab159e,
+    (q31_t)0x77c836c2, (q31_t)0xe0a0211a, (q31_t)0x77c20ca1, (q31_t)0xe0952dcb,
+    (q31_t)0x77bbe05a, (q31_t)0xe08a3bb2, (q31_t)0x77b5b1ec, (q31_t)0xe07f4acf,
+    (q31_t)0x77af8159, (q31_t)0xe0745b24, (q31_t)0x77a94ea0, (q31_t)0xe0696cb0,
+    (q31_t)0x77a319c2, (q31_t)0xe05e7f74, (q31_t)0x779ce2be, (q31_t)0xe053936f,
+    (q31_t)0x7796a996, (q31_t)0xe048a8a4, (q31_t)0x77906e49, (q31_t)0xe03dbf11,
+    (q31_t)0x778a30d8, (q31_t)0xe032d6b8, (q31_t)0x7783f143, (q31_t)0xe027ef99,
+    (q31_t)0x777daf89, (q31_t)0xe01d09b4, (q31_t)0x77776bac, (q31_t)0xe012250a,
+    (q31_t)0x777125ac, (q31_t)0xe007419b, (q31_t)0x776add88, (q31_t)0xdffc5f67,
+    (q31_t)0x77649341, (q31_t)0xdff17e70, (q31_t)0x775e46d8, (q31_t)0xdfe69eb4,
+    (q31_t)0x7757f84c, (q31_t)0xdfdbc036, (q31_t)0x7751a79e, (q31_t)0xdfd0e2f5,
+    (q31_t)0x774b54ce, (q31_t)0xdfc606f1, (q31_t)0x7744ffdd, (q31_t)0xdfbb2c2c,
+    (q31_t)0x773ea8ca, (q31_t)0xdfb052a5, (q31_t)0x77384f95, (q31_t)0xdfa57a5d,
+    (q31_t)0x7731f440, (q31_t)0xdf9aa354, (q31_t)0x772b96ca, (q31_t)0xdf8fcd8b,
+    (q31_t)0x77253733, (q31_t)0xdf84f902, (q31_t)0x771ed57c, (q31_t)0xdf7a25ba,
+    (q31_t)0x771871a5, (q31_t)0xdf6f53b3, (q31_t)0x77120bae, (q31_t)0xdf6482ed,
+    (q31_t)0x770ba398, (q31_t)0xdf59b369, (q31_t)0x77053962, (q31_t)0xdf4ee527,
+    (q31_t)0x76fecd0e, (q31_t)0xdf441828, (q31_t)0x76f85e9a, (q31_t)0xdf394c6b,
+    (q31_t)0x76f1ee09, (q31_t)0xdf2e81f3, (q31_t)0x76eb7b58, (q31_t)0xdf23b8be,
+    (q31_t)0x76e5068a, (q31_t)0xdf18f0ce, (q31_t)0x76de8f9e, (q31_t)0xdf0e2a22,
+    (q31_t)0x76d81695, (q31_t)0xdf0364bc, (q31_t)0x76d19b6e, (q31_t)0xdef8a09b,
+    (q31_t)0x76cb1e2a, (q31_t)0xdeedddc0, (q31_t)0x76c49ec9, (q31_t)0xdee31c2b,
+    (q31_t)0x76be1d4c, (q31_t)0xded85bdd, (q31_t)0x76b799b3, (q31_t)0xdecd9cd7,
+    (q31_t)0x76b113fd, (q31_t)0xdec2df18, (q31_t)0x76aa8c2c, (q31_t)0xdeb822a1,
+    (q31_t)0x76a4023f, (q31_t)0xdead6773, (q31_t)0x769d7637, (q31_t)0xdea2ad8d,
+    (q31_t)0x7696e814, (q31_t)0xde97f4f1, (q31_t)0x769057d6, (q31_t)0xde8d3d9e,
+    (q31_t)0x7689c57d, (q31_t)0xde828796, (q31_t)0x7683310b, (q31_t)0xde77d2d8,
+    (q31_t)0x767c9a7e, (q31_t)0xde6d1f65, (q31_t)0x767601d7, (q31_t)0xde626d3e,
+    (q31_t)0x766f6717, (q31_t)0xde57bc62, (q31_t)0x7668ca3e, (q31_t)0xde4d0cd2,
+    (q31_t)0x76622b4c, (q31_t)0xde425e8f, (q31_t)0x765b8a41, (q31_t)0xde37b199,
+    (q31_t)0x7654e71d, (q31_t)0xde2d05f1, (q31_t)0x764e41e2, (q31_t)0xde225b96,
+    (q31_t)0x76479a8e, (q31_t)0xde17b28a, (q31_t)0x7640f123, (q31_t)0xde0d0acc,
+    (q31_t)0x763a45a0, (q31_t)0xde02645d, (q31_t)0x76339806, (q31_t)0xddf7bf3e,
+    (q31_t)0x762ce855, (q31_t)0xdded1b6e, (q31_t)0x7626368d, (q31_t)0xdde278ef,
+    (q31_t)0x761f82af, (q31_t)0xddd7d7c1, (q31_t)0x7618ccba, (q31_t)0xddcd37e4,
+    (q31_t)0x761214b0, (q31_t)0xddc29958, (q31_t)0x760b5a90, (q31_t)0xddb7fc1e,
+    (q31_t)0x76049e5b, (q31_t)0xddad6036, (q31_t)0x75fde011, (q31_t)0xdda2c5a2,
+    (q31_t)0x75f71fb1, (q31_t)0xdd982c60, (q31_t)0x75f05d3d, (q31_t)0xdd8d9472,
+    (q31_t)0x75e998b5, (q31_t)0xdd82fdd8, (q31_t)0x75e2d219, (q31_t)0xdd786892,
+    (q31_t)0x75dc0968, (q31_t)0xdd6dd4a2, (q31_t)0x75d53ea5, (q31_t)0xdd634206,
+    (q31_t)0x75ce71ce, (q31_t)0xdd58b0c0, (q31_t)0x75c7a2e3, (q31_t)0xdd4e20d0,
+    (q31_t)0x75c0d1e7, (q31_t)0xdd439236, (q31_t)0x75b9fed7, (q31_t)0xdd3904f4,
+    (q31_t)0x75b329b5, (q31_t)0xdd2e7908, (q31_t)0x75ac5282, (q31_t)0xdd23ee74,
+    (q31_t)0x75a5793c, (q31_t)0xdd196538, (q31_t)0x759e9de5, (q31_t)0xdd0edd55,
+    (q31_t)0x7597c07d, (q31_t)0xdd0456ca, (q31_t)0x7590e104, (q31_t)0xdcf9d199,
+    (q31_t)0x7589ff7a, (q31_t)0xdcef4dc2, (q31_t)0x75831be0, (q31_t)0xdce4cb44,
+    (q31_t)0x757c3636, (q31_t)0xdcda4a21, (q31_t)0x75754e7c, (q31_t)0xdccfca59,
+    (q31_t)0x756e64b2, (q31_t)0xdcc54bec, (q31_t)0x756778d9, (q31_t)0xdcbacedb,
+    (q31_t)0x75608af1, (q31_t)0xdcb05326, (q31_t)0x75599afa, (q31_t)0xdca5d8cd,
+    (q31_t)0x7552a8f4, (q31_t)0xdc9b5fd2, (q31_t)0x754bb4e1, (q31_t)0xdc90e834,
+    (q31_t)0x7544bebf, (q31_t)0xdc8671f3, (q31_t)0x753dc68f, (q31_t)0xdc7bfd11,
+    (q31_t)0x7536cc52, (q31_t)0xdc71898d, (q31_t)0x752fd008, (q31_t)0xdc671768,
+    (q31_t)0x7528d1b1, (q31_t)0xdc5ca6a2, (q31_t)0x7521d14d, (q31_t)0xdc52373c,
+    (q31_t)0x751acedd, (q31_t)0xdc47c936, (q31_t)0x7513ca60, (q31_t)0xdc3d5c91,
+    (q31_t)0x750cc3d8, (q31_t)0xdc32f14d, (q31_t)0x7505bb44, (q31_t)0xdc28876a,
+    (q31_t)0x74feb0a5, (q31_t)0xdc1e1ee9, (q31_t)0x74f7a3fb, (q31_t)0xdc13b7c9,
+    (q31_t)0x74f09546, (q31_t)0xdc09520d, (q31_t)0x74e98487, (q31_t)0xdbfeedb3,
+    (q31_t)0x74e271bd, (q31_t)0xdbf48abd, (q31_t)0x74db5cea, (q31_t)0xdbea292b,
+    (q31_t)0x74d4460c, (q31_t)0xdbdfc8fc, (q31_t)0x74cd2d26, (q31_t)0xdbd56a32,
+    (q31_t)0x74c61236, (q31_t)0xdbcb0cce, (q31_t)0x74bef53d, (q31_t)0xdbc0b0ce,
+    (q31_t)0x74b7d63c, (q31_t)0xdbb65634, (q31_t)0x74b0b533, (q31_t)0xdbabfd01,
+    (q31_t)0x74a99221, (q31_t)0xdba1a534, (q31_t)0x74a26d08, (q31_t)0xdb974ece,
+    (q31_t)0x749b45e7, (q31_t)0xdb8cf9cf, (q31_t)0x74941cbf, (q31_t)0xdb82a638,
+    (q31_t)0x748cf190, (q31_t)0xdb785409, (q31_t)0x7485c45b, (q31_t)0xdb6e0342,
+    (q31_t)0x747e951f, (q31_t)0xdb63b3e5, (q31_t)0x747763dd, (q31_t)0xdb5965f1,
+    (q31_t)0x74703095, (q31_t)0xdb4f1967, (q31_t)0x7468fb47, (q31_t)0xdb44ce46,
+    (q31_t)0x7461c3f5, (q31_t)0xdb3a8491, (q31_t)0x745a8a9d, (q31_t)0xdb303c46,
+    (q31_t)0x74534f41, (q31_t)0xdb25f566, (q31_t)0x744c11e0, (q31_t)0xdb1baff2,
+    (q31_t)0x7444d27b, (q31_t)0xdb116beb, (q31_t)0x743d9112, (q31_t)0xdb072950,
+    (q31_t)0x74364da6, (q31_t)0xdafce821, (q31_t)0x742f0836, (q31_t)0xdaf2a860,
+    (q31_t)0x7427c0c3, (q31_t)0xdae86a0d, (q31_t)0x7420774d, (q31_t)0xdade2d28,
+    (q31_t)0x74192bd5, (q31_t)0xdad3f1b1, (q31_t)0x7411de5b, (q31_t)0xdac9b7a9,
+    (q31_t)0x740a8edf, (q31_t)0xdabf7f11, (q31_t)0x74033d61, (q31_t)0xdab547e8,
+    (q31_t)0x73fbe9e2, (q31_t)0xdaab122f, (q31_t)0x73f49462, (q31_t)0xdaa0dde7,
+    (q31_t)0x73ed3ce1, (q31_t)0xda96ab0f, (q31_t)0x73e5e360, (q31_t)0xda8c79a9,
+    (q31_t)0x73de87de, (q31_t)0xda8249b4, (q31_t)0x73d72a5d, (q31_t)0xda781b31,
+    (q31_t)0x73cfcadc, (q31_t)0xda6dee21, (q31_t)0x73c8695b, (q31_t)0xda63c284,
+    (q31_t)0x73c105db, (q31_t)0xda599859, (q31_t)0x73b9a05d, (q31_t)0xda4f6fa3,
+    (q31_t)0x73b238e0, (q31_t)0xda454860, (q31_t)0x73aacf65, (q31_t)0xda3b2292,
+    (q31_t)0x73a363ec, (q31_t)0xda30fe38, (q31_t)0x739bf675, (q31_t)0xda26db54,
+    (q31_t)0x73948701, (q31_t)0xda1cb9e5, (q31_t)0x738d1590, (q31_t)0xda1299ec,
+    (q31_t)0x7385a222, (q31_t)0xda087b69, (q31_t)0x737e2cb7, (q31_t)0xd9fe5e5e,
+    (q31_t)0x7376b551, (q31_t)0xd9f442c9, (q31_t)0x736f3bee, (q31_t)0xd9ea28ac,
+    (q31_t)0x7367c090, (q31_t)0xd9e01006, (q31_t)0x73604336, (q31_t)0xd9d5f8d9,
+    (q31_t)0x7358c3e2, (q31_t)0xd9cbe325, (q31_t)0x73514292, (q31_t)0xd9c1cee9,
+    (q31_t)0x7349bf48, (q31_t)0xd9b7bc27, (q31_t)0x73423a04, (q31_t)0xd9adaadf,
+    (q31_t)0x733ab2c6, (q31_t)0xd9a39b11, (q31_t)0x7333298f, (q31_t)0xd9998cbe,
+    (q31_t)0x732b9e5e, (q31_t)0xd98f7fe6, (q31_t)0x73241134, (q31_t)0xd9857489,
+    (q31_t)0x731c8211, (q31_t)0xd97b6aa8, (q31_t)0x7314f0f6, (q31_t)0xd9716243,
+    (q31_t)0x730d5de3, (q31_t)0xd9675b5a, (q31_t)0x7305c8d7, (q31_t)0xd95d55ef,
+    (q31_t)0x72fe31d5, (q31_t)0xd9535201, (q31_t)0x72f698db, (q31_t)0xd9494f90,
+    (q31_t)0x72eefdea, (q31_t)0xd93f4e9e, (q31_t)0x72e76102, (q31_t)0xd9354f2a,
+    (q31_t)0x72dfc224, (q31_t)0xd92b5135, (q31_t)0x72d82150, (q31_t)0xd92154bf,
+    (q31_t)0x72d07e85, (q31_t)0xd91759c9, (q31_t)0x72c8d9c6, (q31_t)0xd90d6053,
+    (q31_t)0x72c13311, (q31_t)0xd903685d, (q31_t)0x72b98a67, (q31_t)0xd8f971e8,
+    (q31_t)0x72b1dfc9, (q31_t)0xd8ef7cf4, (q31_t)0x72aa3336, (q31_t)0xd8e58982,
+    (q31_t)0x72a284b0, (q31_t)0xd8db9792, (q31_t)0x729ad435, (q31_t)0xd8d1a724,
+    (q31_t)0x729321c7, (q31_t)0xd8c7b838, (q31_t)0x728b6d66, (q31_t)0xd8bdcad0,
+    (q31_t)0x7283b712, (q31_t)0xd8b3deeb, (q31_t)0x727bfecc, (q31_t)0xd8a9f48a,
+    (q31_t)0x72744493, (q31_t)0xd8a00bae, (q31_t)0x726c8868, (q31_t)0xd8962456,
+    (q31_t)0x7264ca4c, (q31_t)0xd88c3e83, (q31_t)0x725d0a3e, (q31_t)0xd8825a35,
+    (q31_t)0x72554840, (q31_t)0xd878776d, (q31_t)0x724d8450, (q31_t)0xd86e962b,
+    (q31_t)0x7245be70, (q31_t)0xd864b670, (q31_t)0x723df6a0, (q31_t)0xd85ad83c,
+    (q31_t)0x72362ce0, (q31_t)0xd850fb8e, (q31_t)0x722e6130, (q31_t)0xd8472069,
+    (q31_t)0x72269391, (q31_t)0xd83d46cc, (q31_t)0x721ec403, (q31_t)0xd8336eb7,
+    (q31_t)0x7216f287, (q31_t)0xd829982b, (q31_t)0x720f1f1c, (q31_t)0xd81fc328,
+    (q31_t)0x720749c3, (q31_t)0xd815efae, (q31_t)0x71ff727c, (q31_t)0xd80c1dbf,
+    (q31_t)0x71f79948, (q31_t)0xd8024d59, (q31_t)0x71efbe27, (q31_t)0xd7f87e7f,
+    (q31_t)0x71e7e118, (q31_t)0xd7eeb130, (q31_t)0x71e0021e, (q31_t)0xd7e4e56c,
+    (q31_t)0x71d82137, (q31_t)0xd7db1b34, (q31_t)0x71d03e64, (q31_t)0xd7d15288,
+    (q31_t)0x71c859a5, (q31_t)0xd7c78b68, (q31_t)0x71c072fb, (q31_t)0xd7bdc5d6,
+    (q31_t)0x71b88a66, (q31_t)0xd7b401d1, (q31_t)0x71b09fe7, (q31_t)0xd7aa3f5a,
+    (q31_t)0x71a8b37c, (q31_t)0xd7a07e70, (q31_t)0x71a0c528, (q31_t)0xd796bf16,
+    (q31_t)0x7198d4ea, (q31_t)0xd78d014a, (q31_t)0x7190e2c3, (q31_t)0xd783450d,
+    (q31_t)0x7188eeb2, (q31_t)0xd7798a60, (q31_t)0x7180f8b8, (q31_t)0xd76fd143,
+    (q31_t)0x717900d6, (q31_t)0xd76619b6, (q31_t)0x7171070c, (q31_t)0xd75c63ba,
+    (q31_t)0x71690b59, (q31_t)0xd752af4f, (q31_t)0x71610dbf, (q31_t)0xd748fc75,
+    (q31_t)0x71590e3e, (q31_t)0xd73f4b2e, (q31_t)0x71510cd5, (q31_t)0xd7359b78,
+    (q31_t)0x71490986, (q31_t)0xd72bed55, (q31_t)0x71410450, (q31_t)0xd72240c5,
+    (q31_t)0x7138fd35, (q31_t)0xd71895c9, (q31_t)0x7130f433, (q31_t)0xd70eec60,
+    (q31_t)0x7128e94c, (q31_t)0xd705448b, (q31_t)0x7120dc80, (q31_t)0xd6fb9e4b,
+    (q31_t)0x7118cdcf, (q31_t)0xd6f1f99f, (q31_t)0x7110bd39, (q31_t)0xd6e85689,
+    (q31_t)0x7108aabf, (q31_t)0xd6deb508, (q31_t)0x71009661, (q31_t)0xd6d5151d,
+    (q31_t)0x70f8801f, (q31_t)0xd6cb76c9, (q31_t)0x70f067fb, (q31_t)0xd6c1da0b,
+    (q31_t)0x70e84df3, (q31_t)0xd6b83ee4, (q31_t)0x70e03208, (q31_t)0xd6aea555,
+    (q31_t)0x70d8143b, (q31_t)0xd6a50d5d, (q31_t)0x70cff48c, (q31_t)0xd69b76fe,
+    (q31_t)0x70c7d2fb, (q31_t)0xd691e237, (q31_t)0x70bfaf89, (q31_t)0xd6884f09,
+    (q31_t)0x70b78a36, (q31_t)0xd67ebd74, (q31_t)0x70af6302, (q31_t)0xd6752d79,
+    (q31_t)0x70a739ed, (q31_t)0xd66b9f18, (q31_t)0x709f0ef8, (q31_t)0xd6621251,
+    (q31_t)0x7096e223, (q31_t)0xd6588725, (q31_t)0x708eb36f, (q31_t)0xd64efd94,
+    (q31_t)0x708682dc, (q31_t)0xd645759f, (q31_t)0x707e5069, (q31_t)0xd63bef46,
+    (q31_t)0x70761c18, (q31_t)0xd6326a88, (q31_t)0x706de5e9, (q31_t)0xd628e767,
+    (q31_t)0x7065addb, (q31_t)0xd61f65e4, (q31_t)0x705d73f0, (q31_t)0xd615e5fd,
+    (q31_t)0x70553828, (q31_t)0xd60c67b4, (q31_t)0x704cfa83, (q31_t)0xd602eb0a,
+    (q31_t)0x7044bb00, (q31_t)0xd5f96ffd, (q31_t)0x703c79a2, (q31_t)0xd5eff690,
+    (q31_t)0x70343667, (q31_t)0xd5e67ec1, (q31_t)0x702bf151, (q31_t)0xd5dd0892,
+    (q31_t)0x7023aa5f, (q31_t)0xd5d39403, (q31_t)0x701b6193, (q31_t)0xd5ca2115,
+    (q31_t)0x701316eb, (q31_t)0xd5c0afc6, (q31_t)0x700aca69, (q31_t)0xd5b74019,
+    (q31_t)0x70027c0c, (q31_t)0xd5add20d, (q31_t)0x6ffa2bd6, (q31_t)0xd5a465a3,
+    (q31_t)0x6ff1d9c7, (q31_t)0xd59afadb, (q31_t)0x6fe985de, (q31_t)0xd59191b5,
+    (q31_t)0x6fe1301c, (q31_t)0xd5882a32, (q31_t)0x6fd8d882, (q31_t)0xd57ec452,
+    (q31_t)0x6fd07f0f, (q31_t)0xd5756016, (q31_t)0x6fc823c5, (q31_t)0xd56bfd7d,
+    (q31_t)0x6fbfc6a3, (q31_t)0xd5629c89, (q31_t)0x6fb767aa, (q31_t)0xd5593d3a,
+    (q31_t)0x6faf06da, (q31_t)0xd54fdf8f, (q31_t)0x6fa6a433, (q31_t)0xd5468389,
+    (q31_t)0x6f9e3fb6, (q31_t)0xd53d292a, (q31_t)0x6f95d963, (q31_t)0xd533d070,
+    (q31_t)0x6f8d713a, (q31_t)0xd52a795d, (q31_t)0x6f85073c, (q31_t)0xd52123f0,
+    (q31_t)0x6f7c9b69, (q31_t)0xd517d02b, (q31_t)0x6f742dc1, (q31_t)0xd50e7e0d,
+    (q31_t)0x6f6bbe45, (q31_t)0xd5052d97, (q31_t)0x6f634cf5, (q31_t)0xd4fbdec9,
+    (q31_t)0x6f5ad9d1, (q31_t)0xd4f291a4, (q31_t)0x6f5264da, (q31_t)0xd4e94627,
+    (q31_t)0x6f49ee0f, (q31_t)0xd4dffc54, (q31_t)0x6f417573, (q31_t)0xd4d6b42b,
+    (q31_t)0x6f38fb03, (q31_t)0xd4cd6dab, (q31_t)0x6f307ec2, (q31_t)0xd4c428d6,
+    (q31_t)0x6f2800af, (q31_t)0xd4bae5ab, (q31_t)0x6f1f80ca, (q31_t)0xd4b1a42c,
+    (q31_t)0x6f16ff14, (q31_t)0xd4a86458, (q31_t)0x6f0e7b8e, (q31_t)0xd49f2630,
+    (q31_t)0x6f05f637, (q31_t)0xd495e9b3, (q31_t)0x6efd6f10, (q31_t)0xd48caee4,
+    (q31_t)0x6ef4e619, (q31_t)0xd48375c1, (q31_t)0x6eec5b53, (q31_t)0xd47a3e4b,
+    (q31_t)0x6ee3cebe, (q31_t)0xd4710883, (q31_t)0x6edb405a, (q31_t)0xd467d469,
+    (q31_t)0x6ed2b027, (q31_t)0xd45ea1fd, (q31_t)0x6eca1e27, (q31_t)0xd4557140,
+    (q31_t)0x6ec18a58, (q31_t)0xd44c4232, (q31_t)0x6eb8f4bc, (q31_t)0xd44314d3,
+    (q31_t)0x6eb05d53, (q31_t)0xd439e923, (q31_t)0x6ea7c41e, (q31_t)0xd430bf24,
+    (q31_t)0x6e9f291b, (q31_t)0xd42796d5, (q31_t)0x6e968c4d, (q31_t)0xd41e7037,
+    (q31_t)0x6e8dedb3, (q31_t)0xd4154b4a, (q31_t)0x6e854d4d, (q31_t)0xd40c280e,
+    (q31_t)0x6e7cab1c, (q31_t)0xd4030684, (q31_t)0x6e740720, (q31_t)0xd3f9e6ad,
+    (q31_t)0x6e6b615a, (q31_t)0xd3f0c887, (q31_t)0x6e62b9ca, (q31_t)0xd3e7ac15,
+    (q31_t)0x6e5a1070, (q31_t)0xd3de9156, (q31_t)0x6e51654c, (q31_t)0xd3d5784a,
+    (q31_t)0x6e48b860, (q31_t)0xd3cc60f2, (q31_t)0x6e4009aa, (q31_t)0xd3c34b4f,
+    (q31_t)0x6e37592c, (q31_t)0xd3ba3760, (q31_t)0x6e2ea6e6, (q31_t)0xd3b12526,
+    (q31_t)0x6e25f2d8, (q31_t)0xd3a814a2, (q31_t)0x6e1d3d03, (q31_t)0xd39f05d3,
+    (q31_t)0x6e148566, (q31_t)0xd395f8ba, (q31_t)0x6e0bcc03, (q31_t)0xd38ced57,
+    (q31_t)0x6e0310d9, (q31_t)0xd383e3ab, (q31_t)0x6dfa53e9, (q31_t)0xd37adbb6,
+    (q31_t)0x6df19534, (q31_t)0xd371d579, (q31_t)0x6de8d4b8, (q31_t)0xd368d0f3,
+    (q31_t)0x6de01278, (q31_t)0xd35fce26, (q31_t)0x6dd74e73, (q31_t)0xd356cd11,
+    (q31_t)0x6dce88aa, (q31_t)0xd34dcdb4, (q31_t)0x6dc5c11c, (q31_t)0xd344d011,
+    (q31_t)0x6dbcf7cb, (q31_t)0xd33bd427, (q31_t)0x6db42cb6, (q31_t)0xd332d9f7,
+    (q31_t)0x6dab5fdf, (q31_t)0xd329e181, (q31_t)0x6da29144, (q31_t)0xd320eac6,
+    (q31_t)0x6d99c0e7, (q31_t)0xd317f5c6, (q31_t)0x6d90eec8, (q31_t)0xd30f0280,
+    (q31_t)0x6d881ae8, (q31_t)0xd30610f7, (q31_t)0x6d7f4545, (q31_t)0xd2fd2129,
+    (q31_t)0x6d766de2, (q31_t)0xd2f43318, (q31_t)0x6d6d94bf, (q31_t)0xd2eb46c3,
+    (q31_t)0x6d64b9da, (q31_t)0xd2e25c2b, (q31_t)0x6d5bdd36, (q31_t)0xd2d97350,
+    (q31_t)0x6d52fed2, (q31_t)0xd2d08c33, (q31_t)0x6d4a1eaf, (q31_t)0xd2c7a6d4,
+    (q31_t)0x6d413ccd, (q31_t)0xd2bec333, (q31_t)0x6d38592c, (q31_t)0xd2b5e151,
+    (q31_t)0x6d2f73cd, (q31_t)0xd2ad012e, (q31_t)0x6d268cb0, (q31_t)0xd2a422ca,
+    (q31_t)0x6d1da3d5, (q31_t)0xd29b4626, (q31_t)0x6d14b93d, (q31_t)0xd2926b41,
+    (q31_t)0x6d0bcce8, (q31_t)0xd289921e, (q31_t)0x6d02ded7, (q31_t)0xd280babb,
+    (q31_t)0x6cf9ef09, (q31_t)0xd277e518, (q31_t)0x6cf0fd80, (q31_t)0xd26f1138,
+    (q31_t)0x6ce80a3a, (q31_t)0xd2663f19, (q31_t)0x6cdf153a, (q31_t)0xd25d6ebc,
+    (q31_t)0x6cd61e7f, (q31_t)0xd254a021, (q31_t)0x6ccd2609, (q31_t)0xd24bd34a,
+    (q31_t)0x6cc42bd9, (q31_t)0xd2430835, (q31_t)0x6cbb2fef, (q31_t)0xd23a3ee4,
+    (q31_t)0x6cb2324c, (q31_t)0xd2317756, (q31_t)0x6ca932ef, (q31_t)0xd228b18d,
+    (q31_t)0x6ca031da, (q31_t)0xd21fed88, (q31_t)0x6c972f0d, (q31_t)0xd2172b48,
+    (q31_t)0x6c8e2a87, (q31_t)0xd20e6acc, (q31_t)0x6c85244a, (q31_t)0xd205ac17,
+    (q31_t)0x6c7c1c55, (q31_t)0xd1fcef27, (q31_t)0x6c7312a9, (q31_t)0xd1f433fd,
+    (q31_t)0x6c6a0746, (q31_t)0xd1eb7a9a, (q31_t)0x6c60fa2d, (q31_t)0xd1e2c2fd,
+    (q31_t)0x6c57eb5e, (q31_t)0xd1da0d28, (q31_t)0x6c4edada, (q31_t)0xd1d1591a,
+    (q31_t)0x6c45c8a0, (q31_t)0xd1c8a6d4, (q31_t)0x6c3cb4b1, (q31_t)0xd1bff656,
+    (q31_t)0x6c339f0e, (q31_t)0xd1b747a0, (q31_t)0x6c2a87b6, (q31_t)0xd1ae9ab4,
+    (q31_t)0x6c216eaa, (q31_t)0xd1a5ef90, (q31_t)0x6c1853eb, (q31_t)0xd19d4636,
+    (q31_t)0x6c0f3779, (q31_t)0xd1949ea6, (q31_t)0x6c061953, (q31_t)0xd18bf8e0,
+    (q31_t)0x6bfcf97c, (q31_t)0xd18354e4, (q31_t)0x6bf3d7f2, (q31_t)0xd17ab2b3,
+    (q31_t)0x6beab4b6, (q31_t)0xd172124d, (q31_t)0x6be18fc9, (q31_t)0xd16973b3,
+    (q31_t)0x6bd8692b, (q31_t)0xd160d6e5, (q31_t)0x6bcf40dc, (q31_t)0xd1583be2,
+    (q31_t)0x6bc616dd, (q31_t)0xd14fa2ad, (q31_t)0x6bbceb2d, (q31_t)0xd1470b44,
+    (q31_t)0x6bb3bdce, (q31_t)0xd13e75a8, (q31_t)0x6baa8ec0, (q31_t)0xd135e1d9,
+    (q31_t)0x6ba15e03, (q31_t)0xd12d4fd9, (q31_t)0x6b982b97, (q31_t)0xd124bfa6,
+    (q31_t)0x6b8ef77d, (q31_t)0xd11c3142, (q31_t)0x6b85c1b5, (q31_t)0xd113a4ad,
+    (q31_t)0x6b7c8a3f, (q31_t)0xd10b19e7, (q31_t)0x6b73511c, (q31_t)0xd10290f0,
+    (q31_t)0x6b6a164d, (q31_t)0xd0fa09c9, (q31_t)0x6b60d9d0, (q31_t)0xd0f18472,
+    (q31_t)0x6b579ba8, (q31_t)0xd0e900ec, (q31_t)0x6b4e5bd4, (q31_t)0xd0e07f36,
+    (q31_t)0x6b451a55, (q31_t)0xd0d7ff51, (q31_t)0x6b3bd72a, (q31_t)0xd0cf813e,
+    (q31_t)0x6b329255, (q31_t)0xd0c704fd, (q31_t)0x6b294bd5, (q31_t)0xd0be8a8d,
+    (q31_t)0x6b2003ac, (q31_t)0xd0b611f1, (q31_t)0x6b16b9d9, (q31_t)0xd0ad9b26,
+    (q31_t)0x6b0d6e5c, (q31_t)0xd0a5262f, (q31_t)0x6b042137, (q31_t)0xd09cb30b,
+    (q31_t)0x6afad269, (q31_t)0xd09441bb, (q31_t)0x6af181f3, (q31_t)0xd08bd23f,
+    (q31_t)0x6ae82fd5, (q31_t)0xd0836497, (q31_t)0x6adedc10, (q31_t)0xd07af8c4,
+    (q31_t)0x6ad586a3, (q31_t)0xd0728ec6, (q31_t)0x6acc2f90, (q31_t)0xd06a269d,
+    (q31_t)0x6ac2d6d6, (q31_t)0xd061c04a, (q31_t)0x6ab97c77, (q31_t)0xd0595bcd,
+    (q31_t)0x6ab02071, (q31_t)0xd050f926, (q31_t)0x6aa6c2c6, (q31_t)0xd0489856,
+    (q31_t)0x6a9d6377, (q31_t)0xd040395d, (q31_t)0x6a940283, (q31_t)0xd037dc3b,
+    (q31_t)0x6a8a9fea, (q31_t)0xd02f80f1, (q31_t)0x6a813bae, (q31_t)0xd027277e,
+    (q31_t)0x6a77d5ce, (q31_t)0xd01ecfe4, (q31_t)0x6a6e6e4b, (q31_t)0xd0167a22,
+    (q31_t)0x6a650525, (q31_t)0xd00e2639, (q31_t)0x6a5b9a5d, (q31_t)0xd005d42a,
+    (q31_t)0x6a522df3, (q31_t)0xcffd83f4, (q31_t)0x6a48bfe7, (q31_t)0xcff53597,
+    (q31_t)0x6a3f503a, (q31_t)0xcfece915, (q31_t)0x6a35deeb, (q31_t)0xcfe49e6d,
+    (q31_t)0x6a2c6bfd, (q31_t)0xcfdc55a1, (q31_t)0x6a22f76e, (q31_t)0xcfd40eaf,
+    (q31_t)0x6a19813f, (q31_t)0xcfcbc999, (q31_t)0x6a100970, (q31_t)0xcfc3865e,
+    (q31_t)0x6a069003, (q31_t)0xcfbb4500, (q31_t)0x69fd14f6, (q31_t)0xcfb3057d,
+    (q31_t)0x69f3984c, (q31_t)0xcfaac7d8, (q31_t)0x69ea1a03, (q31_t)0xcfa28c10,
+    (q31_t)0x69e09a1c, (q31_t)0xcf9a5225, (q31_t)0x69d71899, (q31_t)0xcf921a17,
+    (q31_t)0x69cd9578, (q31_t)0xcf89e3e8, (q31_t)0x69c410ba, (q31_t)0xcf81af97,
+    (q31_t)0x69ba8a61, (q31_t)0xcf797d24, (q31_t)0x69b1026c, (q31_t)0xcf714c91,
+    (q31_t)0x69a778db, (q31_t)0xcf691ddd, (q31_t)0x699dedaf, (q31_t)0xcf60f108,
+    (q31_t)0x699460e8, (q31_t)0xcf58c613, (q31_t)0x698ad287, (q31_t)0xcf509cfe,
+    (q31_t)0x6981428c, (q31_t)0xcf4875ca, (q31_t)0x6977b0f7, (q31_t)0xcf405077,
+    (q31_t)0x696e1dc9, (q31_t)0xcf382d05, (q31_t)0x69648902, (q31_t)0xcf300b74,
+    (q31_t)0x695af2a3, (q31_t)0xcf27ebc5, (q31_t)0x69515aab, (q31_t)0xcf1fcdf8,
+    (q31_t)0x6947c11c, (q31_t)0xcf17b20d, (q31_t)0x693e25f5, (q31_t)0xcf0f9805,
+    (q31_t)0x69348937, (q31_t)0xcf077fe1, (q31_t)0x692aeae3, (q31_t)0xceff699f,
+    (q31_t)0x69214af8, (q31_t)0xcef75541, (q31_t)0x6917a977, (q31_t)0xceef42c7,
+    (q31_t)0x690e0661, (q31_t)0xcee73231, (q31_t)0x690461b5, (q31_t)0xcedf2380,
+    (q31_t)0x68fabb75, (q31_t)0xced716b4, (q31_t)0x68f113a0, (q31_t)0xcecf0bcd,
+    (q31_t)0x68e76a37, (q31_t)0xcec702cb, (q31_t)0x68ddbf3b, (q31_t)0xcebefbb0,
+    (q31_t)0x68d412ab, (q31_t)0xceb6f67a, (q31_t)0x68ca6488, (q31_t)0xceaef32b,
+    (q31_t)0x68c0b4d2, (q31_t)0xcea6f1c2, (q31_t)0x68b7038b, (q31_t)0xce9ef241,
+    (q31_t)0x68ad50b1, (q31_t)0xce96f4a7, (q31_t)0x68a39c46, (q31_t)0xce8ef8f4,
+    (q31_t)0x6899e64a, (q31_t)0xce86ff2a, (q31_t)0x68902ebd, (q31_t)0xce7f0748,
+    (q31_t)0x688675a0, (q31_t)0xce77114e, (q31_t)0x687cbaf3, (q31_t)0xce6f1d3d,
+    (q31_t)0x6872feb6, (q31_t)0xce672b16, (q31_t)0x686940ea, (q31_t)0xce5f3ad8,
+    (q31_t)0x685f8190, (q31_t)0xce574c84, (q31_t)0x6855c0a6, (q31_t)0xce4f6019,
+    (q31_t)0x684bfe2f, (q31_t)0xce47759a, (q31_t)0x68423a2a, (q31_t)0xce3f8d05,
+    (q31_t)0x68387498, (q31_t)0xce37a65b, (q31_t)0x682ead78, (q31_t)0xce2fc19c,
+    (q31_t)0x6824e4cc, (q31_t)0xce27dec9, (q31_t)0x681b1a94, (q31_t)0xce1ffde2,
+    (q31_t)0x68114ed0, (q31_t)0xce181ee8, (q31_t)0x68078181, (q31_t)0xce1041d9,
+    (q31_t)0x67fdb2a7, (q31_t)0xce0866b8, (q31_t)0x67f3e241, (q31_t)0xce008d84,
+    (q31_t)0x67ea1052, (q31_t)0xcdf8b63d, (q31_t)0x67e03cd8, (q31_t)0xcdf0e0e4,
+    (q31_t)0x67d667d5, (q31_t)0xcde90d79, (q31_t)0x67cc9149, (q31_t)0xcde13bfd,
+    (q31_t)0x67c2b934, (q31_t)0xcdd96c6f, (q31_t)0x67b8df97, (q31_t)0xcdd19ed0,
+    (q31_t)0x67af0472, (q31_t)0xcdc9d320, (q31_t)0x67a527c4, (q31_t)0xcdc20960,
+    (q31_t)0x679b4990, (q31_t)0xcdba4190, (q31_t)0x679169d5, (q31_t)0xcdb27bb0,
+    (q31_t)0x67878893, (q31_t)0xcdaab7c0, (q31_t)0x677da5cb, (q31_t)0xcda2f5c2,
+    (q31_t)0x6773c17d, (q31_t)0xcd9b35b4, (q31_t)0x6769dbaa, (q31_t)0xcd937798,
+    (q31_t)0x675ff452, (q31_t)0xcd8bbb6d, (q31_t)0x67560b76, (q31_t)0xcd840134,
+    (q31_t)0x674c2115, (q31_t)0xcd7c48ee, (q31_t)0x67423530, (q31_t)0xcd74929a,
+    (q31_t)0x673847c8, (q31_t)0xcd6cde39, (q31_t)0x672e58dc, (q31_t)0xcd652bcb,
+    (q31_t)0x6724686e, (q31_t)0xcd5d7b50, (q31_t)0x671a767e, (q31_t)0xcd55ccca,
+    (q31_t)0x6710830c, (q31_t)0xcd4e2037, (q31_t)0x67068e18, (q31_t)0xcd467599,
+    (q31_t)0x66fc97a3, (q31_t)0xcd3eccef, (q31_t)0x66f29fad, (q31_t)0xcd37263a,
+    (q31_t)0x66e8a637, (q31_t)0xcd2f817b, (q31_t)0x66deab41, (q31_t)0xcd27deb0,
+    (q31_t)0x66d4aecb, (q31_t)0xcd203ddc, (q31_t)0x66cab0d6, (q31_t)0xcd189efe,
+    (q31_t)0x66c0b162, (q31_t)0xcd110216, (q31_t)0x66b6b070, (q31_t)0xcd096725,
+    (q31_t)0x66acadff, (q31_t)0xcd01ce2b, (q31_t)0x66a2aa11, (q31_t)0xccfa3729,
+    (q31_t)0x6698a4a6, (q31_t)0xccf2a21d, (q31_t)0x668e9dbd, (q31_t)0xcceb0f0a,
+    (q31_t)0x66849558, (q31_t)0xcce37def, (q31_t)0x667a8b77, (q31_t)0xccdbeecc,
+    (q31_t)0x6670801a, (q31_t)0xccd461a2, (q31_t)0x66667342, (q31_t)0xccccd671,
+    (q31_t)0x665c64ef, (q31_t)0xccc54d3a, (q31_t)0x66525521, (q31_t)0xccbdc5fc,
+    (q31_t)0x664843d9, (q31_t)0xccb640b8, (q31_t)0x663e3117, (q31_t)0xccaebd6e,
+    (q31_t)0x66341cdb, (q31_t)0xcca73c1e, (q31_t)0x662a0727, (q31_t)0xcc9fbcca,
+    (q31_t)0x661feffa, (q31_t)0xcc983f70, (q31_t)0x6615d754, (q31_t)0xcc90c412,
+    (q31_t)0x660bbd37, (q31_t)0xcc894aaf, (q31_t)0x6601a1a2, (q31_t)0xcc81d349,
+    (q31_t)0x65f78497, (q31_t)0xcc7a5dde, (q31_t)0x65ed6614, (q31_t)0xcc72ea70,
+    (q31_t)0x65e3461b, (q31_t)0xcc6b78ff, (q31_t)0x65d924ac, (q31_t)0xcc64098b,
+    (q31_t)0x65cf01c8, (q31_t)0xcc5c9c14, (q31_t)0x65c4dd6e, (q31_t)0xcc55309b,
+    (q31_t)0x65bab7a0, (q31_t)0xcc4dc720, (q31_t)0x65b0905d, (q31_t)0xcc465fa3,
+    (q31_t)0x65a667a7, (q31_t)0xcc3efa25, (q31_t)0x659c3d7c, (q31_t)0xcc3796a5,
+    (q31_t)0x659211df, (q31_t)0xcc303524, (q31_t)0x6587e4cf, (q31_t)0xcc28d5a3,
+    (q31_t)0x657db64c, (q31_t)0xcc217822, (q31_t)0x65738657, (q31_t)0xcc1a1ca0,
+    (q31_t)0x656954f1, (q31_t)0xcc12c31f, (q31_t)0x655f2219, (q31_t)0xcc0b6b9e,
+    (q31_t)0x6554edd1, (q31_t)0xcc04161e, (q31_t)0x654ab818, (q31_t)0xcbfcc29f,
+    (q31_t)0x654080ef, (q31_t)0xcbf57121, (q31_t)0x65364857, (q31_t)0xcbee21a5,
+    (q31_t)0x652c0e4f, (q31_t)0xcbe6d42b, (q31_t)0x6521d2d8, (q31_t)0xcbdf88b3,
+    (q31_t)0x651795f3, (q31_t)0xcbd83f3d, (q31_t)0x650d57a0, (q31_t)0xcbd0f7ca,
+    (q31_t)0x650317df, (q31_t)0xcbc9b25a, (q31_t)0x64f8d6b0, (q31_t)0xcbc26eee,
+    (q31_t)0x64ee9415, (q31_t)0xcbbb2d85, (q31_t)0x64e4500e, (q31_t)0xcbb3ee20,
+    (q31_t)0x64da0a9a, (q31_t)0xcbacb0bf, (q31_t)0x64cfc3ba, (q31_t)0xcba57563,
+    (q31_t)0x64c57b6f, (q31_t)0xcb9e3c0b, (q31_t)0x64bb31ba, (q31_t)0xcb9704b9,
+    (q31_t)0x64b0e699, (q31_t)0xcb8fcf6b, (q31_t)0x64a69a0f, (q31_t)0xcb889c23,
+    (q31_t)0x649c4c1b, (q31_t)0xcb816ae1, (q31_t)0x6491fcbe, (q31_t)0xcb7a3ba5,
+    (q31_t)0x6487abf7, (q31_t)0xcb730e70, (q31_t)0x647d59c8, (q31_t)0xcb6be341,
+    (q31_t)0x64730631, (q31_t)0xcb64ba19, (q31_t)0x6468b132, (q31_t)0xcb5d92f8,
+    (q31_t)0x645e5acc, (q31_t)0xcb566ddf, (q31_t)0x645402ff, (q31_t)0xcb4f4acd,
+    (q31_t)0x6449a9cc, (q31_t)0xcb4829c4, (q31_t)0x643f4f32, (q31_t)0xcb410ac3,
+    (q31_t)0x6434f332, (q31_t)0xcb39edca, (q31_t)0x642a95ce, (q31_t)0xcb32d2da,
+    (q31_t)0x64203704, (q31_t)0xcb2bb9f4, (q31_t)0x6415d6d5, (q31_t)0xcb24a316,
+    (q31_t)0x640b7543, (q31_t)0xcb1d8e43, (q31_t)0x6401124d, (q31_t)0xcb167b79,
+    (q31_t)0x63f6adf3, (q31_t)0xcb0f6aba, (q31_t)0x63ec4837, (q31_t)0xcb085c05,
+    (q31_t)0x63e1e117, (q31_t)0xcb014f5b, (q31_t)0x63d77896, (q31_t)0xcafa44bc,
+    (q31_t)0x63cd0eb3, (q31_t)0xcaf33c28, (q31_t)0x63c2a36f, (q31_t)0xcaec35a0,
+    (q31_t)0x63b836ca, (q31_t)0xcae53123, (q31_t)0x63adc8c4, (q31_t)0xcade2eb3,
+    (q31_t)0x63a3595e, (q31_t)0xcad72e4f, (q31_t)0x6398e898, (q31_t)0xcad02ff8,
+    (q31_t)0x638e7673, (q31_t)0xcac933ae, (q31_t)0x638402ef, (q31_t)0xcac23971,
+    (q31_t)0x63798e0d, (q31_t)0xcabb4141, (q31_t)0x636f17cc, (q31_t)0xcab44b1f,
+    (q31_t)0x6364a02e, (q31_t)0xcaad570c, (q31_t)0x635a2733, (q31_t)0xcaa66506,
+    (q31_t)0x634facda, (q31_t)0xca9f750f, (q31_t)0x63453125, (q31_t)0xca988727,
+    (q31_t)0x633ab414, (q31_t)0xca919b4e, (q31_t)0x633035a7, (q31_t)0xca8ab184,
+    (q31_t)0x6325b5df, (q31_t)0xca83c9ca, (q31_t)0x631b34bc, (q31_t)0xca7ce420,
+    (q31_t)0x6310b23e, (q31_t)0xca760086, (q31_t)0x63062e67, (q31_t)0xca6f1efc,
+    (q31_t)0x62fba936, (q31_t)0xca683f83, (q31_t)0x62f122ab, (q31_t)0xca61621b,
+    (q31_t)0x62e69ac8, (q31_t)0xca5a86c4, (q31_t)0x62dc118c, (q31_t)0xca53ad7e,
+    (q31_t)0x62d186f8, (q31_t)0xca4cd64b, (q31_t)0x62c6fb0c, (q31_t)0xca460129,
+    (q31_t)0x62bc6dca, (q31_t)0xca3f2e19, (q31_t)0x62b1df30, (q31_t)0xca385d1d,
+    (q31_t)0x62a74f40, (q31_t)0xca318e32, (q31_t)0x629cbdfa, (q31_t)0xca2ac15b,
+    (q31_t)0x62922b5e, (q31_t)0xca23f698, (q31_t)0x6287976e, (q31_t)0xca1d2de7,
+    (q31_t)0x627d0228, (q31_t)0xca16674b, (q31_t)0x62726b8e, (q31_t)0xca0fa2c3,
+    (q31_t)0x6267d3a0, (q31_t)0xca08e04f, (q31_t)0x625d3a5e, (q31_t)0xca021fef,
+    (q31_t)0x62529fca, (q31_t)0xc9fb61a5, (q31_t)0x624803e2, (q31_t)0xc9f4a570,
+    (q31_t)0x623d66a8, (q31_t)0xc9edeb50, (q31_t)0x6232c81c, (q31_t)0xc9e73346,
+    (q31_t)0x6228283f, (q31_t)0xc9e07d51, (q31_t)0x621d8711, (q31_t)0xc9d9c973,
+    (q31_t)0x6212e492, (q31_t)0xc9d317ab, (q31_t)0x620840c2, (q31_t)0xc9cc67fa,
+    (q31_t)0x61fd9ba3, (q31_t)0xc9c5ba60, (q31_t)0x61f2f534, (q31_t)0xc9bf0edd,
+    (q31_t)0x61e84d76, (q31_t)0xc9b86572, (q31_t)0x61dda46a, (q31_t)0xc9b1be1e,
+    (q31_t)0x61d2fa0f, (q31_t)0xc9ab18e3, (q31_t)0x61c84e67, (q31_t)0xc9a475bf,
+    (q31_t)0x61bda171, (q31_t)0xc99dd4b4, (q31_t)0x61b2f32e, (q31_t)0xc99735c2,
+    (q31_t)0x61a8439e, (q31_t)0xc99098e9, (q31_t)0x619d92c2, (q31_t)0xc989fe29,
+    (q31_t)0x6192e09b, (q31_t)0xc9836582, (q31_t)0x61882d28, (q31_t)0xc97ccef5,
+    (q31_t)0x617d786a, (q31_t)0xc9763a83, (q31_t)0x6172c262, (q31_t)0xc96fa82a,
+    (q31_t)0x61680b0f, (q31_t)0xc96917ec, (q31_t)0x615d5273, (q31_t)0xc96289c9,
+    (q31_t)0x6152988d, (q31_t)0xc95bfdc1, (q31_t)0x6147dd5f, (q31_t)0xc95573d4,
+    (q31_t)0x613d20e8, (q31_t)0xc94eec03, (q31_t)0x61326329, (q31_t)0xc948664d,
+    (q31_t)0x6127a423, (q31_t)0xc941e2b4, (q31_t)0x611ce3d5, (q31_t)0xc93b6137,
+    (q31_t)0x61122240, (q31_t)0xc934e1d6, (q31_t)0x61075f65, (q31_t)0xc92e6492,
+    (q31_t)0x60fc9b44, (q31_t)0xc927e96b, (q31_t)0x60f1d5de, (q31_t)0xc9217062,
+    (q31_t)0x60e70f32, (q31_t)0xc91af976, (q31_t)0x60dc4742, (q31_t)0xc91484a8,
+    (q31_t)0x60d17e0d, (q31_t)0xc90e11f7, (q31_t)0x60c6b395, (q31_t)0xc907a166,
+    (q31_t)0x60bbe7d8, (q31_t)0xc90132f2, (q31_t)0x60b11ad9, (q31_t)0xc8fac69e,
+    (q31_t)0x60a64c97, (q31_t)0xc8f45c68, (q31_t)0x609b7d13, (q31_t)0xc8edf452,
+    (q31_t)0x6090ac4d, (q31_t)0xc8e78e5b, (q31_t)0x6085da46, (q31_t)0xc8e12a84,
+    (q31_t)0x607b06fe, (q31_t)0xc8dac8cd, (q31_t)0x60703275, (q31_t)0xc8d46936,
+    (q31_t)0x60655cac, (q31_t)0xc8ce0bc0, (q31_t)0x605a85a3, (q31_t)0xc8c7b06b,
+    (q31_t)0x604fad5b, (q31_t)0xc8c15736, (q31_t)0x6044d3d4, (q31_t)0xc8bb0023,
+    (q31_t)0x6039f90f, (q31_t)0xc8b4ab32, (q31_t)0x602f1d0b, (q31_t)0xc8ae5862,
+    (q31_t)0x60243fca, (q31_t)0xc8a807b4, (q31_t)0x6019614c, (q31_t)0xc8a1b928,
+    (q31_t)0x600e8190, (q31_t)0xc89b6cbf, (q31_t)0x6003a099, (q31_t)0xc8952278,
+    (q31_t)0x5ff8be65, (q31_t)0xc88eda54, (q31_t)0x5feddaf6, (q31_t)0xc8889454,
+    (q31_t)0x5fe2f64c, (q31_t)0xc8825077, (q31_t)0x5fd81067, (q31_t)0xc87c0ebd,
+    (q31_t)0x5fcd2948, (q31_t)0xc875cf28, (q31_t)0x5fc240ef, (q31_t)0xc86f91b7,
+    (q31_t)0x5fb7575c, (q31_t)0xc869566a, (q31_t)0x5fac6c91, (q31_t)0xc8631d42,
+    (q31_t)0x5fa1808c, (q31_t)0xc85ce63e, (q31_t)0x5f969350, (q31_t)0xc856b160,
+    (q31_t)0x5f8ba4dc, (q31_t)0xc8507ea7, (q31_t)0x5f80b531, (q31_t)0xc84a4e14,
+    (q31_t)0x5f75c44e, (q31_t)0xc8441fa6, (q31_t)0x5f6ad235, (q31_t)0xc83df35f,
+    (q31_t)0x5f5fdee6, (q31_t)0xc837c93e, (q31_t)0x5f54ea62, (q31_t)0xc831a143,
+    (q31_t)0x5f49f4a8, (q31_t)0xc82b7b70, (q31_t)0x5f3efdb9, (q31_t)0xc82557c3,
+    (q31_t)0x5f340596, (q31_t)0xc81f363d, (q31_t)0x5f290c3f, (q31_t)0xc81916df,
+    (q31_t)0x5f1e11b5, (q31_t)0xc812f9a9, (q31_t)0x5f1315f7, (q31_t)0xc80cde9b,
+    (q31_t)0x5f081907, (q31_t)0xc806c5b5, (q31_t)0x5efd1ae4, (q31_t)0xc800aef7,
+    (q31_t)0x5ef21b90, (q31_t)0xc7fa9a62, (q31_t)0x5ee71b0a, (q31_t)0xc7f487f6,
+    (q31_t)0x5edc1953, (q31_t)0xc7ee77b3, (q31_t)0x5ed1166b, (q31_t)0xc7e8699a,
+    (q31_t)0x5ec61254, (q31_t)0xc7e25daa, (q31_t)0x5ebb0d0d, (q31_t)0xc7dc53e3,
+    (q31_t)0x5eb00696, (q31_t)0xc7d64c47, (q31_t)0x5ea4fef0, (q31_t)0xc7d046d6,
+    (q31_t)0x5e99f61d, (q31_t)0xc7ca438f, (q31_t)0x5e8eec1b, (q31_t)0xc7c44272,
+    (q31_t)0x5e83e0eb, (q31_t)0xc7be4381, (q31_t)0x5e78d48e, (q31_t)0xc7b846ba,
+    (q31_t)0x5e6dc705, (q31_t)0xc7b24c20, (q31_t)0x5e62b84f, (q31_t)0xc7ac53b1,
+    (q31_t)0x5e57a86d, (q31_t)0xc7a65d6e, (q31_t)0x5e4c9760, (q31_t)0xc7a06957,
+    (q31_t)0x5e418528, (q31_t)0xc79a776c, (q31_t)0x5e3671c5, (q31_t)0xc79487ae,
+    (q31_t)0x5e2b5d38, (q31_t)0xc78e9a1d, (q31_t)0x5e204781, (q31_t)0xc788aeb9,
+    (q31_t)0x5e1530a1, (q31_t)0xc782c582, (q31_t)0x5e0a1898, (q31_t)0xc77cde79,
+    (q31_t)0x5dfeff67, (q31_t)0xc776f99d, (q31_t)0x5df3e50d, (q31_t)0xc77116f0,
+    (q31_t)0x5de8c98c, (q31_t)0xc76b3671, (q31_t)0x5dddace4, (q31_t)0xc7655820,
+    (q31_t)0x5dd28f15, (q31_t)0xc75f7bfe, (q31_t)0x5dc7701f, (q31_t)0xc759a20a,
+    (q31_t)0x5dbc5004, (q31_t)0xc753ca46, (q31_t)0x5db12ec3, (q31_t)0xc74df4b1,
+    (q31_t)0x5da60c5d, (q31_t)0xc748214c, (q31_t)0x5d9ae8d2, (q31_t)0xc7425016,
+    (q31_t)0x5d8fc424, (q31_t)0xc73c8111, (q31_t)0x5d849e51, (q31_t)0xc736b43c,
+    (q31_t)0x5d79775c, (q31_t)0xc730e997, (q31_t)0x5d6e4f43, (q31_t)0xc72b2123,
+    (q31_t)0x5d632608, (q31_t)0xc7255ae0, (q31_t)0x5d57fbaa, (q31_t)0xc71f96ce,
+    (q31_t)0x5d4cd02c, (q31_t)0xc719d4ed, (q31_t)0x5d41a38c, (q31_t)0xc714153e,
+    (q31_t)0x5d3675cb, (q31_t)0xc70e57c0, (q31_t)0x5d2b46ea, (q31_t)0xc7089c75,
+    (q31_t)0x5d2016e9, (q31_t)0xc702e35c, (q31_t)0x5d14e5c9, (q31_t)0xc6fd2c75,
+    (q31_t)0x5d09b389, (q31_t)0xc6f777c1, (q31_t)0x5cfe802b, (q31_t)0xc6f1c540,
+    (q31_t)0x5cf34baf, (q31_t)0xc6ec14f2, (q31_t)0x5ce81615, (q31_t)0xc6e666d7,
+    (q31_t)0x5cdcdf5e, (q31_t)0xc6e0baf0, (q31_t)0x5cd1a78a, (q31_t)0xc6db113d,
+    (q31_t)0x5cc66e99, (q31_t)0xc6d569be, (q31_t)0x5cbb348d, (q31_t)0xc6cfc472,
+    (q31_t)0x5caff965, (q31_t)0xc6ca215c, (q31_t)0x5ca4bd21, (q31_t)0xc6c4807a,
+    (q31_t)0x5c997fc4, (q31_t)0xc6bee1cd, (q31_t)0x5c8e414b, (q31_t)0xc6b94554,
+    (q31_t)0x5c8301b9, (q31_t)0xc6b3ab12, (q31_t)0x5c77c10e, (q31_t)0xc6ae1304,
+    (q31_t)0x5c6c7f4a, (q31_t)0xc6a87d2d, (q31_t)0x5c613c6d, (q31_t)0xc6a2e98b,
+    (q31_t)0x5c55f878, (q31_t)0xc69d5820, (q31_t)0x5c4ab36b, (q31_t)0xc697c8eb,
+    (q31_t)0x5c3f6d47, (q31_t)0xc6923bec, (q31_t)0x5c34260c, (q31_t)0xc68cb124,
+    (q31_t)0x5c28ddbb, (q31_t)0xc6872894, (q31_t)0x5c1d9454, (q31_t)0xc681a23a,
+    (q31_t)0x5c1249d8, (q31_t)0xc67c1e18, (q31_t)0x5c06fe46, (q31_t)0xc6769c2e,
+    (q31_t)0x5bfbb1a0, (q31_t)0xc6711c7b, (q31_t)0x5bf063e6, (q31_t)0xc66b9f01,
+    (q31_t)0x5be51518, (q31_t)0xc66623be, (q31_t)0x5bd9c537, (q31_t)0xc660aab5,
+    (q31_t)0x5bce7442, (q31_t)0xc65b33e4, (q31_t)0x5bc3223c, (q31_t)0xc655bf4c,
+    (q31_t)0x5bb7cf23, (q31_t)0xc6504ced, (q31_t)0x5bac7af9, (q31_t)0xc64adcc7,
+    (q31_t)0x5ba125bd, (q31_t)0xc6456edb, (q31_t)0x5b95cf71, (q31_t)0xc6400329,
+    (q31_t)0x5b8a7815, (q31_t)0xc63a99b1, (q31_t)0x5b7f1fa9, (q31_t)0xc6353273,
+    (q31_t)0x5b73c62d, (q31_t)0xc62fcd6f, (q31_t)0x5b686ba3, (q31_t)0xc62a6aa6,
+    (q31_t)0x5b5d100a, (q31_t)0xc6250a18, (q31_t)0x5b51b363, (q31_t)0xc61fabc4,
+    (q31_t)0x5b4655ae, (q31_t)0xc61a4fac, (q31_t)0x5b3af6ec, (q31_t)0xc614f5cf,
+    (q31_t)0x5b2f971e, (q31_t)0xc60f9e2e, (q31_t)0x5b243643, (q31_t)0xc60a48c9,
+    (q31_t)0x5b18d45c, (q31_t)0xc604f5a0, (q31_t)0x5b0d716a, (q31_t)0xc5ffa4b3,
+    (q31_t)0x5b020d6c, (q31_t)0xc5fa5603, (q31_t)0x5af6a865, (q31_t)0xc5f5098f,
+    (q31_t)0x5aeb4253, (q31_t)0xc5efbf58, (q31_t)0x5adfdb37, (q31_t)0xc5ea775e,
+    (q31_t)0x5ad47312, (q31_t)0xc5e531a1, (q31_t)0x5ac909e5, (q31_t)0xc5dfee22,
+    (q31_t)0x5abd9faf, (q31_t)0xc5daace1, (q31_t)0x5ab23471, (q31_t)0xc5d56ddd,
+    (q31_t)0x5aa6c82b, (q31_t)0xc5d03118, (q31_t)0x5a9b5adf, (q31_t)0xc5caf690,
+    (q31_t)0x5a8fec8c, (q31_t)0xc5c5be47, (q31_t)0x5a847d33, (q31_t)0xc5c0883d,
+    (q31_t)0x5a790cd4, (q31_t)0xc5bb5472, (q31_t)0x5a6d9b70, (q31_t)0xc5b622e6,
+    (q31_t)0x5a622907, (q31_t)0xc5b0f399, (q31_t)0x5a56b599, (q31_t)0xc5abc68c,
+    (q31_t)0x5a4b4128, (q31_t)0xc5a69bbe, (q31_t)0x5a3fcbb3, (q31_t)0xc5a17330,
+    (q31_t)0x5a34553b, (q31_t)0xc59c4ce3, (q31_t)0x5a28ddc0, (q31_t)0xc59728d5,
+    (q31_t)0x5a1d6544, (q31_t)0xc5920708, (q31_t)0x5a11ebc5, (q31_t)0xc58ce77c,
+    (q31_t)0x5a067145, (q31_t)0xc587ca31, (q31_t)0x59faf5c5, (q31_t)0xc582af26,
+    (q31_t)0x59ef7944, (q31_t)0xc57d965d, (q31_t)0x59e3fbc3, (q31_t)0xc5787fd6,
+    (q31_t)0x59d87d42, (q31_t)0xc5736b90, (q31_t)0x59ccfdc2, (q31_t)0xc56e598c,
+    (q31_t)0x59c17d44, (q31_t)0xc56949ca, (q31_t)0x59b5fbc8, (q31_t)0xc5643c4a,
+    (q31_t)0x59aa794d, (q31_t)0xc55f310d, (q31_t)0x599ef5d6, (q31_t)0xc55a2812,
+    (q31_t)0x59937161, (q31_t)0xc555215a, (q31_t)0x5987ebf0, (q31_t)0xc5501ce5,
+    (q31_t)0x597c6584, (q31_t)0xc54b1ab4, (q31_t)0x5970de1b, (q31_t)0xc5461ac6,
+    (q31_t)0x596555b8, (q31_t)0xc5411d1b, (q31_t)0x5959cc5a, (q31_t)0xc53c21b4,
+    (q31_t)0x594e4201, (q31_t)0xc5372891, (q31_t)0x5942b6af, (q31_t)0xc53231b3,
+    (q31_t)0x59372a64, (q31_t)0xc52d3d18, (q31_t)0x592b9d1f, (q31_t)0xc5284ac3,
+    (q31_t)0x59200ee3, (q31_t)0xc5235ab2, (q31_t)0x59147fae, (q31_t)0xc51e6ce6,
+    (q31_t)0x5908ef82, (q31_t)0xc519815f, (q31_t)0x58fd5e5f, (q31_t)0xc514981d,
+    (q31_t)0x58f1cc45, (q31_t)0xc50fb121, (q31_t)0x58e63935, (q31_t)0xc50acc6b,
+    (q31_t)0x58daa52f, (q31_t)0xc505e9fb, (q31_t)0x58cf1034, (q31_t)0xc50109d0,
+    (q31_t)0x58c37a44, (q31_t)0xc4fc2bec, (q31_t)0x58b7e35f, (q31_t)0xc4f7504e,
+    (q31_t)0x58ac4b87, (q31_t)0xc4f276f7, (q31_t)0x58a0b2bb, (q31_t)0xc4ed9fe7,
+    (q31_t)0x589518fc, (q31_t)0xc4e8cb1e, (q31_t)0x58897e4a, (q31_t)0xc4e3f89c,
+    (q31_t)0x587de2a7, (q31_t)0xc4df2862, (q31_t)0x58724611, (q31_t)0xc4da5a6f,
+    (q31_t)0x5866a88a, (q31_t)0xc4d58ec3, (q31_t)0x585b0a13, (q31_t)0xc4d0c560,
+    (q31_t)0x584f6aab, (q31_t)0xc4cbfe45, (q31_t)0x5843ca53, (q31_t)0xc4c73972,
+    (q31_t)0x5838290c, (q31_t)0xc4c276e8, (q31_t)0x582c86d5, (q31_t)0xc4bdb6a6,
+    (q31_t)0x5820e3b0, (q31_t)0xc4b8f8ad, (q31_t)0x58153f9d, (q31_t)0xc4b43cfd,
+    (q31_t)0x58099a9c, (q31_t)0xc4af8397, (q31_t)0x57fdf4ae, (q31_t)0xc4aacc7a,
+    (q31_t)0x57f24dd3, (q31_t)0xc4a617a6, (q31_t)0x57e6a60c, (q31_t)0xc4a1651c,
+    (q31_t)0x57dafd59, (q31_t)0xc49cb4dd, (q31_t)0x57cf53bb, (q31_t)0xc49806e7,
+    (q31_t)0x57c3a931, (q31_t)0xc4935b3c, (q31_t)0x57b7fdbd, (q31_t)0xc48eb1db,
+    (q31_t)0x57ac515f, (q31_t)0xc48a0ac4, (q31_t)0x57a0a417, (q31_t)0xc48565f9,
+    (q31_t)0x5794f5e6, (q31_t)0xc480c379, (q31_t)0x578946cc, (q31_t)0xc47c2344,
+    (q31_t)0x577d96ca, (q31_t)0xc477855a, (q31_t)0x5771e5e0, (q31_t)0xc472e9bc,
+    (q31_t)0x5766340f, (q31_t)0xc46e5069, (q31_t)0x575a8157, (q31_t)0xc469b963,
+    (q31_t)0x574ecdb8, (q31_t)0xc46524a9, (q31_t)0x57431933, (q31_t)0xc460923b,
+    (q31_t)0x573763c9, (q31_t)0xc45c0219, (q31_t)0x572bad7a, (q31_t)0xc4577444,
+    (q31_t)0x571ff646, (q31_t)0xc452e8bc, (q31_t)0x57143e2d, (q31_t)0xc44e5f80,
+    (q31_t)0x57088531, (q31_t)0xc449d892, (q31_t)0x56fccb51, (q31_t)0xc44553f2,
+    (q31_t)0x56f1108f, (q31_t)0xc440d19e, (q31_t)0x56e554ea, (q31_t)0xc43c5199,
+    (q31_t)0x56d99864, (q31_t)0xc437d3e1, (q31_t)0x56cddafb, (q31_t)0xc4335877,
+    (q31_t)0x56c21cb2, (q31_t)0xc42edf5c, (q31_t)0x56b65d88, (q31_t)0xc42a688f,
+    (q31_t)0x56aa9d7e, (q31_t)0xc425f410, (q31_t)0x569edc94, (q31_t)0xc42181e0,
+    (q31_t)0x56931acb, (q31_t)0xc41d11ff, (q31_t)0x56875823, (q31_t)0xc418a46d,
+    (q31_t)0x567b949d, (q31_t)0xc414392b, (q31_t)0x566fd039, (q31_t)0xc40fd037,
+    (q31_t)0x56640af7, (q31_t)0xc40b6994, (q31_t)0x565844d8, (q31_t)0xc4070540,
+    (q31_t)0x564c7ddd, (q31_t)0xc402a33c, (q31_t)0x5640b606, (q31_t)0xc3fe4388,
+    (q31_t)0x5634ed53, (q31_t)0xc3f9e624, (q31_t)0x562923c5, (q31_t)0xc3f58b10,
+    (q31_t)0x561d595d, (q31_t)0xc3f1324e, (q31_t)0x56118e1a, (q31_t)0xc3ecdbdc,
+    (q31_t)0x5605c1fd, (q31_t)0xc3e887bb, (q31_t)0x55f9f507, (q31_t)0xc3e435ea,
+    (q31_t)0x55ee2738, (q31_t)0xc3dfe66c, (q31_t)0x55e25890, (q31_t)0xc3db993e,
+    (q31_t)0x55d68911, (q31_t)0xc3d74e62, (q31_t)0x55cab8ba, (q31_t)0xc3d305d8,
+    (q31_t)0x55bee78c, (q31_t)0xc3cebfa0, (q31_t)0x55b31587, (q31_t)0xc3ca7bba,
+    (q31_t)0x55a742ac, (q31_t)0xc3c63a26, (q31_t)0x559b6efb, (q31_t)0xc3c1fae5,
+    (q31_t)0x558f9a76, (q31_t)0xc3bdbdf6, (q31_t)0x5583c51b, (q31_t)0xc3b9835a,
+    (q31_t)0x5577eeec, (q31_t)0xc3b54b11, (q31_t)0x556c17e9, (q31_t)0xc3b1151b,
+    (q31_t)0x55604013, (q31_t)0xc3ace178, (q31_t)0x5554676a, (q31_t)0xc3a8b028,
+    (q31_t)0x55488dee, (q31_t)0xc3a4812c, (q31_t)0x553cb3a0, (q31_t)0xc3a05484,
+    (q31_t)0x5530d881, (q31_t)0xc39c2a2f, (q31_t)0x5524fc90, (q31_t)0xc398022f,
+    (q31_t)0x55191fcf, (q31_t)0xc393dc82, (q31_t)0x550d423d, (q31_t)0xc38fb92a,
+    (q31_t)0x550163dc, (q31_t)0xc38b9827, (q31_t)0x54f584ac, (q31_t)0xc3877978,
+    (q31_t)0x54e9a4ac, (q31_t)0xc3835d1e, (q31_t)0x54ddc3de, (q31_t)0xc37f4319,
+    (q31_t)0x54d1e242, (q31_t)0xc37b2b6a, (q31_t)0x54c5ffd9, (q31_t)0xc377160f,
+    (q31_t)0x54ba1ca3, (q31_t)0xc373030a, (q31_t)0x54ae38a0, (q31_t)0xc36ef25b,
+    (q31_t)0x54a253d1, (q31_t)0xc36ae401, (q31_t)0x54966e36, (q31_t)0xc366d7fd,
+    (q31_t)0x548a87d1, (q31_t)0xc362ce50, (q31_t)0x547ea0a0, (q31_t)0xc35ec6f8,
+    (q31_t)0x5472b8a5, (q31_t)0xc35ac1f7, (q31_t)0x5466cfe1, (q31_t)0xc356bf4d,
+    (q31_t)0x545ae653, (q31_t)0xc352bef9, (q31_t)0x544efbfc, (q31_t)0xc34ec0fc,
+    (q31_t)0x544310dd, (q31_t)0xc34ac556, (q31_t)0x543724f5, (q31_t)0xc346cc07,
+    (q31_t)0x542b3846, (q31_t)0xc342d510, (q31_t)0x541f4ad1, (q31_t)0xc33ee070,
+    (q31_t)0x54135c94, (q31_t)0xc33aee27, (q31_t)0x54076d91, (q31_t)0xc336fe37,
+    (q31_t)0x53fb7dc9, (q31_t)0xc333109e, (q31_t)0x53ef8d3c, (q31_t)0xc32f255e,
+    (q31_t)0x53e39be9, (q31_t)0xc32b3c75, (q31_t)0x53d7a9d3, (q31_t)0xc32755e5,
+    (q31_t)0x53cbb6f8, (q31_t)0xc32371ae, (q31_t)0x53bfc35b, (q31_t)0xc31f8fcf,
+    (q31_t)0x53b3cefa, (q31_t)0xc31bb049, (q31_t)0x53a7d9d7, (q31_t)0xc317d31c,
+    (q31_t)0x539be3f2, (q31_t)0xc313f848, (q31_t)0x538fed4b, (q31_t)0xc3101fce,
+    (q31_t)0x5383f5e3, (q31_t)0xc30c49ad, (q31_t)0x5377fdbb, (q31_t)0xc30875e5,
+    (q31_t)0x536c04d2, (q31_t)0xc304a477, (q31_t)0x53600b2a, (q31_t)0xc300d563,
+    (q31_t)0x535410c3, (q31_t)0xc2fd08a9, (q31_t)0x5348159d, (q31_t)0xc2f93e4a,
+    (q31_t)0x533c19b8, (q31_t)0xc2f57644, (q31_t)0x53301d16, (q31_t)0xc2f1b099,
+    (q31_t)0x53241fb6, (q31_t)0xc2eded49, (q31_t)0x5318219a, (q31_t)0xc2ea2c53,
+    (q31_t)0x530c22c1, (q31_t)0xc2e66db8, (q31_t)0x5300232c, (q31_t)0xc2e2b178,
+    (q31_t)0x52f422db, (q31_t)0xc2def794, (q31_t)0x52e821cf, (q31_t)0xc2db400a,
+    (q31_t)0x52dc2009, (q31_t)0xc2d78add, (q31_t)0x52d01d89, (q31_t)0xc2d3d80a,
+    (q31_t)0x52c41a4f, (q31_t)0xc2d02794, (q31_t)0x52b8165b, (q31_t)0xc2cc7979,
+    (q31_t)0x52ac11af, (q31_t)0xc2c8cdbb, (q31_t)0x52a00c4b, (q31_t)0xc2c52459,
+    (q31_t)0x5294062f, (q31_t)0xc2c17d52, (q31_t)0x5287ff5b, (q31_t)0xc2bdd8a9,
+    (q31_t)0x527bf7d1, (q31_t)0xc2ba365c, (q31_t)0x526fef90, (q31_t)0xc2b6966c,
+    (q31_t)0x5263e699, (q31_t)0xc2b2f8d8, (q31_t)0x5257dced, (q31_t)0xc2af5da2,
+    (q31_t)0x524bd28c, (q31_t)0xc2abc4c9, (q31_t)0x523fc776, (q31_t)0xc2a82e4d,
+    (q31_t)0x5233bbac, (q31_t)0xc2a49a2e, (q31_t)0x5227af2e, (q31_t)0xc2a1086d,
+    (q31_t)0x521ba1fd, (q31_t)0xc29d790a, (q31_t)0x520f941a, (q31_t)0xc299ec05,
+    (q31_t)0x52038584, (q31_t)0xc296615d, (q31_t)0x51f7763c, (q31_t)0xc292d914,
+    (q31_t)0x51eb6643, (q31_t)0xc28f5329, (q31_t)0x51df5599, (q31_t)0xc28bcf9c,
+    (q31_t)0x51d3443f, (q31_t)0xc2884e6e, (q31_t)0x51c73235, (q31_t)0xc284cf9f,
+    (q31_t)0x51bb1f7c, (q31_t)0xc281532e, (q31_t)0x51af0c13, (q31_t)0xc27dd91c,
+    (q31_t)0x51a2f7fc, (q31_t)0xc27a616a, (q31_t)0x5196e337, (q31_t)0xc276ec16,
+    (q31_t)0x518acdc4, (q31_t)0xc2737922, (q31_t)0x517eb7a4, (q31_t)0xc270088e,
+    (q31_t)0x5172a0d7, (q31_t)0xc26c9a58, (q31_t)0x5166895f, (q31_t)0xc2692e83,
+    (q31_t)0x515a713a, (q31_t)0xc265c50e, (q31_t)0x514e586a, (q31_t)0xc2625df8,
+    (q31_t)0x51423ef0, (q31_t)0xc25ef943, (q31_t)0x513624cb, (q31_t)0xc25b96ee,
+    (q31_t)0x512a09fc, (q31_t)0xc25836f9, (q31_t)0x511dee84, (q31_t)0xc254d965,
+    (q31_t)0x5111d263, (q31_t)0xc2517e31, (q31_t)0x5105b599, (q31_t)0xc24e255e,
+    (q31_t)0x50f99827, (q31_t)0xc24aceed, (q31_t)0x50ed7a0e, (q31_t)0xc2477adc,
+    (q31_t)0x50e15b4e, (q31_t)0xc244292c, (q31_t)0x50d53be7, (q31_t)0xc240d9de,
+    (q31_t)0x50c91bda, (q31_t)0xc23d8cf1, (q31_t)0x50bcfb28, (q31_t)0xc23a4265,
+    (q31_t)0x50b0d9d0, (q31_t)0xc236fa3b, (q31_t)0x50a4b7d3, (q31_t)0xc233b473,
+    (q31_t)0x50989532, (q31_t)0xc230710d, (q31_t)0x508c71ee, (q31_t)0xc22d3009,
+    (q31_t)0x50804e06, (q31_t)0xc229f167, (q31_t)0x5074297b, (q31_t)0xc226b528,
+    (q31_t)0x5068044e, (q31_t)0xc2237b4b, (q31_t)0x505bde7f, (q31_t)0xc22043d0,
+    (q31_t)0x504fb80e, (q31_t)0xc21d0eb8, (q31_t)0x504390fd, (q31_t)0xc219dc03,
+    (q31_t)0x5037694b, (q31_t)0xc216abb1, (q31_t)0x502b40f8, (q31_t)0xc2137dc2,
+    (q31_t)0x501f1807, (q31_t)0xc2105236, (q31_t)0x5012ee76, (q31_t)0xc20d290d,
+    (q31_t)0x5006c446, (q31_t)0xc20a0248, (q31_t)0x4ffa9979, (q31_t)0xc206dde6,
+    (q31_t)0x4fee6e0d, (q31_t)0xc203bbe8, (q31_t)0x4fe24205, (q31_t)0xc2009c4e,
+    (q31_t)0x4fd6155f, (q31_t)0xc1fd7f17, (q31_t)0x4fc9e81e, (q31_t)0xc1fa6445,
+    (q31_t)0x4fbdba40, (q31_t)0xc1f74bd6, (q31_t)0x4fb18bc8, (q31_t)0xc1f435cc,
+    (q31_t)0x4fa55cb4, (q31_t)0xc1f12227, (q31_t)0x4f992d06, (q31_t)0xc1ee10e5,
+    (q31_t)0x4f8cfcbe, (q31_t)0xc1eb0209, (q31_t)0x4f80cbdc, (q31_t)0xc1e7f591,
+    (q31_t)0x4f749a61, (q31_t)0xc1e4eb7e, (q31_t)0x4f68684e, (q31_t)0xc1e1e3d0,
+    (q31_t)0x4f5c35a3, (q31_t)0xc1dede87, (q31_t)0x4f500260, (q31_t)0xc1dbdba3,
+    (q31_t)0x4f43ce86, (q31_t)0xc1d8db25, (q31_t)0x4f379a16, (q31_t)0xc1d5dd0c,
+    (q31_t)0x4f2b650f, (q31_t)0xc1d2e158, (q31_t)0x4f1f2f73, (q31_t)0xc1cfe80a,
+    (q31_t)0x4f12f941, (q31_t)0xc1ccf122, (q31_t)0x4f06c27a, (q31_t)0xc1c9fca0,
+    (q31_t)0x4efa8b20, (q31_t)0xc1c70a84, (q31_t)0x4eee5331, (q31_t)0xc1c41ace,
+    (q31_t)0x4ee21aaf, (q31_t)0xc1c12d7e, (q31_t)0x4ed5e19a, (q31_t)0xc1be4294,
+    (q31_t)0x4ec9a7f3, (q31_t)0xc1bb5a11, (q31_t)0x4ebd6db9, (q31_t)0xc1b873f5,
+    (q31_t)0x4eb132ef, (q31_t)0xc1b5903f, (q31_t)0x4ea4f793, (q31_t)0xc1b2aef0,
+    (q31_t)0x4e98bba7, (q31_t)0xc1afd007, (q31_t)0x4e8c7f2a, (q31_t)0xc1acf386,
+    (q31_t)0x4e80421e, (q31_t)0xc1aa196c, (q31_t)0x4e740483, (q31_t)0xc1a741b9,
+    (q31_t)0x4e67c65a, (q31_t)0xc1a46c6e, (q31_t)0x4e5b87a2, (q31_t)0xc1a1998a,
+    (q31_t)0x4e4f485c, (q31_t)0xc19ec90d, (q31_t)0x4e430889, (q31_t)0xc19bfaf9,
+    (q31_t)0x4e36c82a, (q31_t)0xc1992f4c, (q31_t)0x4e2a873e, (q31_t)0xc1966606,
+    (q31_t)0x4e1e45c6, (q31_t)0xc1939f29, (q31_t)0x4e1203c3, (q31_t)0xc190dab4,
+    (q31_t)0x4e05c135, (q31_t)0xc18e18a7, (q31_t)0x4df97e1d, (q31_t)0xc18b5903,
+    (q31_t)0x4ded3a7b, (q31_t)0xc1889bc6, (q31_t)0x4de0f64f, (q31_t)0xc185e0f3,
+    (q31_t)0x4dd4b19a, (q31_t)0xc1832888, (q31_t)0x4dc86c5d, (q31_t)0xc1807285,
+    (q31_t)0x4dbc2698, (q31_t)0xc17dbeec, (q31_t)0x4dafe04b, (q31_t)0xc17b0dbb,
+    (q31_t)0x4da39978, (q31_t)0xc1785ef4, (q31_t)0x4d97521d, (q31_t)0xc175b296,
+    (q31_t)0x4d8b0a3d, (q31_t)0xc17308a1, (q31_t)0x4d7ec1d6, (q31_t)0xc1706115,
+    (q31_t)0x4d7278eb, (q31_t)0xc16dbbf3, (q31_t)0x4d662f7b, (q31_t)0xc16b193a,
+    (q31_t)0x4d59e586, (q31_t)0xc16878eb, (q31_t)0x4d4d9b0e, (q31_t)0xc165db05,
+    (q31_t)0x4d415013, (q31_t)0xc1633f8a, (q31_t)0x4d350495, (q31_t)0xc160a678,
+    (q31_t)0x4d28b894, (q31_t)0xc15e0fd1, (q31_t)0x4d1c6c11, (q31_t)0xc15b7b94,
+    (q31_t)0x4d101f0e, (q31_t)0xc158e9c1, (q31_t)0x4d03d189, (q31_t)0xc1565a58,
+    (q31_t)0x4cf78383, (q31_t)0xc153cd5a, (q31_t)0x4ceb34fe, (q31_t)0xc15142c6,
+    (q31_t)0x4cdee5f9, (q31_t)0xc14eba9d, (q31_t)0x4cd29676, (q31_t)0xc14c34df,
+    (q31_t)0x4cc64673, (q31_t)0xc149b18b, (q31_t)0x4cb9f5f3, (q31_t)0xc14730a3,
+    (q31_t)0x4cada4f5, (q31_t)0xc144b225, (q31_t)0x4ca1537a, (q31_t)0xc1423613,
+    (q31_t)0x4c950182, (q31_t)0xc13fbc6c, (q31_t)0x4c88af0e, (q31_t)0xc13d4530,
+    (q31_t)0x4c7c5c1e, (q31_t)0xc13ad060, (q31_t)0x4c7008b3, (q31_t)0xc1385dfb,
+    (q31_t)0x4c63b4ce, (q31_t)0xc135ee02, (q31_t)0x4c57606e, (q31_t)0xc1338075,
+    (q31_t)0x4c4b0b94, (q31_t)0xc1311553, (q31_t)0x4c3eb641, (q31_t)0xc12eac9d,
+    (q31_t)0x4c326075, (q31_t)0xc12c4653, (q31_t)0x4c260a31, (q31_t)0xc129e276,
+    (q31_t)0x4c19b374, (q31_t)0xc1278104, (q31_t)0x4c0d5c41, (q31_t)0xc12521ff,
+    (q31_t)0x4c010496, (q31_t)0xc122c566, (q31_t)0x4bf4ac75, (q31_t)0xc1206b39,
+    (q31_t)0x4be853de, (q31_t)0xc11e1379, (q31_t)0x4bdbfad1, (q31_t)0xc11bbe26,
+    (q31_t)0x4bcfa150, (q31_t)0xc1196b3f, (q31_t)0x4bc34759, (q31_t)0xc1171ac6,
+    (q31_t)0x4bb6ecef, (q31_t)0xc114ccb9, (q31_t)0x4baa9211, (q31_t)0xc1128119,
+    (q31_t)0x4b9e36c0, (q31_t)0xc11037e6, (q31_t)0x4b91dafc, (q31_t)0xc10df120,
+    (q31_t)0x4b857ec7, (q31_t)0xc10bacc8, (q31_t)0x4b79221f, (q31_t)0xc1096add,
+    (q31_t)0x4b6cc506, (q31_t)0xc1072b5f, (q31_t)0x4b60677c, (q31_t)0xc104ee4f,
+    (q31_t)0x4b540982, (q31_t)0xc102b3ac, (q31_t)0x4b47ab19, (q31_t)0xc1007b77,
+    (q31_t)0x4b3b4c40, (q31_t)0xc0fe45b0, (q31_t)0x4b2eecf8, (q31_t)0xc0fc1257,
+    (q31_t)0x4b228d42, (q31_t)0xc0f9e16b, (q31_t)0x4b162d1d, (q31_t)0xc0f7b2ee,
+    (q31_t)0x4b09cc8c, (q31_t)0xc0f586df, (q31_t)0x4afd6b8d, (q31_t)0xc0f35d3e,
+    (q31_t)0x4af10a22, (q31_t)0xc0f1360b, (q31_t)0x4ae4a84b, (q31_t)0xc0ef1147,
+    (q31_t)0x4ad84609, (q31_t)0xc0eceef1, (q31_t)0x4acbe35b, (q31_t)0xc0eacf09,
+    (q31_t)0x4abf8043, (q31_t)0xc0e8b190, (q31_t)0x4ab31cc1, (q31_t)0xc0e69686,
+    (q31_t)0x4aa6b8d5, (q31_t)0xc0e47deb, (q31_t)0x4a9a5480, (q31_t)0xc0e267be,
+    (q31_t)0x4a8defc3, (q31_t)0xc0e05401, (q31_t)0x4a818a9d, (q31_t)0xc0de42b2,
+    (q31_t)0x4a752510, (q31_t)0xc0dc33d2, (q31_t)0x4a68bf1b, (q31_t)0xc0da2762,
+    (q31_t)0x4a5c58c0, (q31_t)0xc0d81d61, (q31_t)0x4a4ff1fe, (q31_t)0xc0d615cf,
+    (q31_t)0x4a438ad7, (q31_t)0xc0d410ad, (q31_t)0x4a37234a, (q31_t)0xc0d20dfa,
+    (q31_t)0x4a2abb59, (q31_t)0xc0d00db6, (q31_t)0x4a1e5303, (q31_t)0xc0ce0fe3,
+    (q31_t)0x4a11ea49, (q31_t)0xc0cc147f, (q31_t)0x4a05812c, (q31_t)0xc0ca1b8a,
+    (q31_t)0x49f917ac, (q31_t)0xc0c82506, (q31_t)0x49ecadc9, (q31_t)0xc0c630f2,
+    (q31_t)0x49e04385, (q31_t)0xc0c43f4d, (q31_t)0x49d3d8df, (q31_t)0xc0c25019,
+    (q31_t)0x49c76dd8, (q31_t)0xc0c06355, (q31_t)0x49bb0271, (q31_t)0xc0be7901,
+    (q31_t)0x49ae96aa, (q31_t)0xc0bc911d, (q31_t)0x49a22a83, (q31_t)0xc0baabaa,
+    (q31_t)0x4995bdfd, (q31_t)0xc0b8c8a7, (q31_t)0x49895118, (q31_t)0xc0b6e815,
+    (q31_t)0x497ce3d5, (q31_t)0xc0b509f3, (q31_t)0x49707635, (q31_t)0xc0b32e42,
+    (q31_t)0x49640837, (q31_t)0xc0b15502, (q31_t)0x495799dd, (q31_t)0xc0af7e33,
+    (q31_t)0x494b2b27, (q31_t)0xc0ada9d4, (q31_t)0x493ebc14, (q31_t)0xc0abd7e6,
+    (q31_t)0x49324ca7, (q31_t)0xc0aa086a, (q31_t)0x4925dcdf, (q31_t)0xc0a83b5e,
+    (q31_t)0x49196cbc, (q31_t)0xc0a670c4, (q31_t)0x490cfc40, (q31_t)0xc0a4a89b,
+    (q31_t)0x49008b6a, (q31_t)0xc0a2e2e3, (q31_t)0x48f41a3c, (q31_t)0xc0a11f9d,
+    (q31_t)0x48e7a8b5, (q31_t)0xc09f5ec8, (q31_t)0x48db36d6, (q31_t)0xc09da065,
+    (q31_t)0x48cec4a0, (q31_t)0xc09be473, (q31_t)0x48c25213, (q31_t)0xc09a2af3,
+    (q31_t)0x48b5df30, (q31_t)0xc09873e4, (q31_t)0x48a96bf6, (q31_t)0xc096bf48,
+    (q31_t)0x489cf867, (q31_t)0xc0950d1d, (q31_t)0x48908483, (q31_t)0xc0935d64,
+    (q31_t)0x4884104b, (q31_t)0xc091b01d, (q31_t)0x48779bbe, (q31_t)0xc0900548,
+    (q31_t)0x486b26de, (q31_t)0xc08e5ce5, (q31_t)0x485eb1ab, (q31_t)0xc08cb6f5,
+    (q31_t)0x48523c25, (q31_t)0xc08b1376, (q31_t)0x4845c64d, (q31_t)0xc089726a,
+    (q31_t)0x48395024, (q31_t)0xc087d3d0, (q31_t)0x482cd9a9, (q31_t)0xc08637a9,
+    (q31_t)0x482062de, (q31_t)0xc0849df4, (q31_t)0x4813ebc2, (q31_t)0xc08306b2,
+    (q31_t)0x48077457, (q31_t)0xc08171e2, (q31_t)0x47fafc9c, (q31_t)0xc07fdf85,
+    (q31_t)0x47ee8493, (q31_t)0xc07e4f9b, (q31_t)0x47e20c3b, (q31_t)0xc07cc223,
+    (q31_t)0x47d59396, (q31_t)0xc07b371e, (q31_t)0x47c91aa3, (q31_t)0xc079ae8c,
+    (q31_t)0x47bca163, (q31_t)0xc078286e, (q31_t)0x47b027d7, (q31_t)0xc076a4c2,
+    (q31_t)0x47a3adff, (q31_t)0xc0752389, (q31_t)0x479733dc, (q31_t)0xc073a4c3,
+    (q31_t)0x478ab96e, (q31_t)0xc0722871, (q31_t)0x477e3eb5, (q31_t)0xc070ae92,
+    (q31_t)0x4771c3b3, (q31_t)0xc06f3726, (q31_t)0x47654867, (q31_t)0xc06dc22e,
+    (q31_t)0x4758ccd2, (q31_t)0xc06c4fa8, (q31_t)0x474c50f4, (q31_t)0xc06adf97,
+    (q31_t)0x473fd4cf, (q31_t)0xc06971f9, (q31_t)0x47335862, (q31_t)0xc06806ce,
+    (q31_t)0x4726dbae, (q31_t)0xc0669e18, (q31_t)0x471a5eb3, (q31_t)0xc06537d4,
+    (q31_t)0x470de172, (q31_t)0xc063d405, (q31_t)0x470163eb, (q31_t)0xc06272aa,
+    (q31_t)0x46f4e620, (q31_t)0xc06113c2, (q31_t)0x46e86810, (q31_t)0xc05fb74e,
+    (q31_t)0x46dbe9bb, (q31_t)0xc05e5d4e, (q31_t)0x46cf6b23, (q31_t)0xc05d05c3,
+    (q31_t)0x46c2ec48, (q31_t)0xc05bb0ab, (q31_t)0x46b66d29, (q31_t)0xc05a5e07,
+    (q31_t)0x46a9edc9, (q31_t)0xc0590dd8, (q31_t)0x469d6e27, (q31_t)0xc057c01d,
+    (q31_t)0x4690ee44, (q31_t)0xc05674d6, (q31_t)0x46846e1f, (q31_t)0xc0552c03,
+    (q31_t)0x4677edbb, (q31_t)0xc053e5a5, (q31_t)0x466b6d16, (q31_t)0xc052a1bb,
+    (q31_t)0x465eec33, (q31_t)0xc0516045, (q31_t)0x46526b10, (q31_t)0xc0502145,
+    (q31_t)0x4645e9af, (q31_t)0xc04ee4b8, (q31_t)0x46396810, (q31_t)0xc04daaa1,
+    (q31_t)0x462ce634, (q31_t)0xc04c72fe, (q31_t)0x4620641a, (q31_t)0xc04b3dcf,
+    (q31_t)0x4613e1c5, (q31_t)0xc04a0b16, (q31_t)0x46075f33, (q31_t)0xc048dad1,
+    (q31_t)0x45fadc66, (q31_t)0xc047ad01, (q31_t)0x45ee595d, (q31_t)0xc04681a6,
+    (q31_t)0x45e1d61b, (q31_t)0xc04558c0, (q31_t)0x45d5529e, (q31_t)0xc044324f,
+    (q31_t)0x45c8cee7, (q31_t)0xc0430e53, (q31_t)0x45bc4af8, (q31_t)0xc041eccc,
+    (q31_t)0x45afc6d0, (q31_t)0xc040cdba, (q31_t)0x45a3426f, (q31_t)0xc03fb11d,
+    (q31_t)0x4596bdd7, (q31_t)0xc03e96f6, (q31_t)0x458a3908, (q31_t)0xc03d7f44,
+    (q31_t)0x457db403, (q31_t)0xc03c6a07, (q31_t)0x45712ec7, (q31_t)0xc03b573f,
+    (q31_t)0x4564a955, (q31_t)0xc03a46ed, (q31_t)0x455823ae, (q31_t)0xc0393910,
+    (q31_t)0x454b9dd3, (q31_t)0xc0382da8, (q31_t)0x453f17c3, (q31_t)0xc03724b6,
+    (q31_t)0x4532917f, (q31_t)0xc0361e3a, (q31_t)0x45260b08, (q31_t)0xc0351a33,
+    (q31_t)0x4519845e, (q31_t)0xc03418a2, (q31_t)0x450cfd82, (q31_t)0xc0331986,
+    (q31_t)0x45007674, (q31_t)0xc0321ce0, (q31_t)0x44f3ef35, (q31_t)0xc03122b0,
+    (q31_t)0x44e767c5, (q31_t)0xc0302af5, (q31_t)0x44dae024, (q31_t)0xc02f35b1,
+    (q31_t)0x44ce5854, (q31_t)0xc02e42e2, (q31_t)0x44c1d054, (q31_t)0xc02d5289,
+    (q31_t)0x44b54825, (q31_t)0xc02c64a6, (q31_t)0x44a8bfc7, (q31_t)0xc02b7939,
+    (q31_t)0x449c373c, (q31_t)0xc02a9042, (q31_t)0x448fae83, (q31_t)0xc029a9c1,
+    (q31_t)0x4483259d, (q31_t)0xc028c5b6, (q31_t)0x44769c8b, (q31_t)0xc027e421,
+    (q31_t)0x446a134c, (q31_t)0xc0270502, (q31_t)0x445d89e2, (q31_t)0xc0262859,
+    (q31_t)0x4451004d, (q31_t)0xc0254e27, (q31_t)0x4444768d, (q31_t)0xc024766a,
+    (q31_t)0x4437eca4, (q31_t)0xc023a124, (q31_t)0x442b6290, (q31_t)0xc022ce54,
+    (q31_t)0x441ed854, (q31_t)0xc021fdfb, (q31_t)0x44124dee, (q31_t)0xc0213018,
+    (q31_t)0x4405c361, (q31_t)0xc02064ab, (q31_t)0x43f938ac, (q31_t)0xc01f9bb5,
+    (q31_t)0x43ecadcf, (q31_t)0xc01ed535, (q31_t)0x43e022cc, (q31_t)0xc01e112b,
+    (q31_t)0x43d397a3, (q31_t)0xc01d4f99, (q31_t)0x43c70c54, (q31_t)0xc01c907c,
+    (q31_t)0x43ba80df, (q31_t)0xc01bd3d6, (q31_t)0x43adf546, (q31_t)0xc01b19a7,
+    (q31_t)0x43a16988, (q31_t)0xc01a61ee, (q31_t)0x4394dda7, (q31_t)0xc019acac,
+    (q31_t)0x438851a2, (q31_t)0xc018f9e1, (q31_t)0x437bc57b, (q31_t)0xc018498c,
+    (q31_t)0x436f3931, (q31_t)0xc0179bae, (q31_t)0x4362acc5, (q31_t)0xc016f047,
+    (q31_t)0x43562038, (q31_t)0xc0164757, (q31_t)0x43499389, (q31_t)0xc015a0dd,
+    (q31_t)0x433d06bb, (q31_t)0xc014fcda, (q31_t)0x433079cc, (q31_t)0xc0145b4e,
+    (q31_t)0x4323ecbe, (q31_t)0xc013bc39, (q31_t)0x43175f91, (q31_t)0xc0131f9b,
+    (q31_t)0x430ad245, (q31_t)0xc0128574, (q31_t)0x42fe44dc, (q31_t)0xc011edc3,
+    (q31_t)0x42f1b755, (q31_t)0xc011588a, (q31_t)0x42e529b0, (q31_t)0xc010c5c7,
+    (q31_t)0x42d89bf0, (q31_t)0xc010357c, (q31_t)0x42cc0e13, (q31_t)0xc00fa7a8,
+    (q31_t)0x42bf801a, (q31_t)0xc00f1c4a, (q31_t)0x42b2f207, (q31_t)0xc00e9364,
+    (q31_t)0x42a663d8, (q31_t)0xc00e0cf5, (q31_t)0x4299d590, (q31_t)0xc00d88fd,
+    (q31_t)0x428d472e, (q31_t)0xc00d077c, (q31_t)0x4280b8b3, (q31_t)0xc00c8872,
+    (q31_t)0x42742a1f, (q31_t)0xc00c0be0, (q31_t)0x42679b73, (q31_t)0xc00b91c4,
+    (q31_t)0x425b0caf, (q31_t)0xc00b1a20, (q31_t)0x424e7dd4, (q31_t)0xc00aa4f3,
+    (q31_t)0x4241eee2, (q31_t)0xc00a323d, (q31_t)0x42355fd9, (q31_t)0xc009c1ff,
+    (q31_t)0x4228d0bb, (q31_t)0xc0095438, (q31_t)0x421c4188, (q31_t)0xc008e8e8,
+    (q31_t)0x420fb240, (q31_t)0xc008800f, (q31_t)0x420322e3, (q31_t)0xc00819ae,
+    (q31_t)0x41f69373, (q31_t)0xc007b5c4, (q31_t)0x41ea03ef, (q31_t)0xc0075452,
+    (q31_t)0x41dd7459, (q31_t)0xc006f556, (q31_t)0x41d0e4b0, (q31_t)0xc00698d3,
+    (q31_t)0x41c454f5, (q31_t)0xc0063ec6, (q31_t)0x41b7c528, (q31_t)0xc005e731,
+    (q31_t)0x41ab354b, (q31_t)0xc0059214, (q31_t)0x419ea55d, (q31_t)0xc0053f6e,
+    (q31_t)0x4192155f, (q31_t)0xc004ef3f, (q31_t)0x41858552, (q31_t)0xc004a188,
+    (q31_t)0x4178f536, (q31_t)0xc0045648, (q31_t)0x416c650b, (q31_t)0xc0040d80,
+    (q31_t)0x415fd4d2, (q31_t)0xc003c72f, (q31_t)0x4153448c, (q31_t)0xc0038356,
+    (q31_t)0x4146b438, (q31_t)0xc00341f4, (q31_t)0x413a23d8, (q31_t)0xc003030a,
+    (q31_t)0x412d936c, (q31_t)0xc002c697, (q31_t)0x412102f4, (q31_t)0xc0028c9c,
+    (q31_t)0x41147271, (q31_t)0xc0025519, (q31_t)0x4107e1e3, (q31_t)0xc002200d,
+    (q31_t)0x40fb514b, (q31_t)0xc001ed78, (q31_t)0x40eec0aa, (q31_t)0xc001bd5c,
+    (q31_t)0x40e22fff, (q31_t)0xc0018fb6, (q31_t)0x40d59f4c, (q31_t)0xc0016489,
+    (q31_t)0x40c90e90, (q31_t)0xc0013bd3, (q31_t)0x40bc7dcc, (q31_t)0xc0011594,
+    (q31_t)0x40afed02, (q31_t)0xc000f1ce, (q31_t)0x40a35c30, (q31_t)0xc000d07e,
+    (q31_t)0x4096cb58, (q31_t)0xc000b1a7, (q31_t)0x408a3a7b, (q31_t)0xc0009547,
+    (q31_t)0x407da998, (q31_t)0xc0007b5f, (q31_t)0x407118b0, (q31_t)0xc00063ee,
+    (q31_t)0x406487c4, (q31_t)0xc0004ef5, (q31_t)0x4057f6d4, (q31_t)0xc0003c74,
+    (q31_t)0x404b65e1, (q31_t)0xc0002c6a, (q31_t)0x403ed4ea, (q31_t)0xc0001ed8,
+    (q31_t)0x403243f1, (q31_t)0xc00013bd, (q31_t)0x4025b2f7, (q31_t)0xc0000b1a,
+    (q31_t)0x401921fb, (q31_t)0xc00004ef, (q31_t)0x400c90fe, (q31_t)0xc000013c,
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
+/**
+  @par
+  Generation fixed-point realCoefAQ15 array in Q15 format:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pATable[2 * i]     = 0.5 * ( 1.0 - sin (2 * PI / (double) (2 * n) * (double) i));
+     pATable[2 * i + 1] = 0.5 * (-1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+  @par
+  Convert to fixed point Q15 format
+        round(pATable[i] * pow(2, 15))
+ */
+const q15_t __ALIGNED(4) realCoefAQ15[8192] = {
+    (q15_t)0x4000, (q15_t)0xc000, (q15_t)0x3ff3, (q15_t)0xc000, (q15_t)0x3fe7, (q15_t)0xc000, (q15_t)0x3fda, (q15_t)0xc000,
+    (q15_t)0x3fce, (q15_t)0xc000, (q15_t)0x3fc1, (q15_t)0xc000, (q15_t)0x3fb5, (q15_t)0xc000, (q15_t)0x3fa8, (q15_t)0xc000,
+    (q15_t)0x3f9b, (q15_t)0xc000, (q15_t)0x3f8f, (q15_t)0xc000, (q15_t)0x3f82, (q15_t)0xc000, (q15_t)0x3f76, (q15_t)0xc001,
+    (q15_t)0x3f69, (q15_t)0xc001, (q15_t)0x3f5d, (q15_t)0xc001, (q15_t)0x3f50, (q15_t)0xc001, (q15_t)0x3f44, (q15_t)0xc001,
+    (q15_t)0x3f37, (q15_t)0xc001, (q15_t)0x3f2a, (q15_t)0xc001, (q15_t)0x3f1e, (q15_t)0xc002, (q15_t)0x3f11, (q15_t)0xc002,
+    (q15_t)0x3f05, (q15_t)0xc002, (q15_t)0x3ef8, (q15_t)0xc002, (q15_t)0x3eec, (q15_t)0xc002, (q15_t)0x3edf, (q15_t)0xc003,
+    (q15_t)0x3ed2, (q15_t)0xc003, (q15_t)0x3ec6, (q15_t)0xc003, (q15_t)0x3eb9, (q15_t)0xc003, (q15_t)0x3ead, (q15_t)0xc004,
+    (q15_t)0x3ea0, (q15_t)0xc004, (q15_t)0x3e94, (q15_t)0xc004, (q15_t)0x3e87, (q15_t)0xc004, (q15_t)0x3e7a, (q15_t)0xc005,
+    (q15_t)0x3e6e, (q15_t)0xc005, (q15_t)0x3e61, (q15_t)0xc005, (q15_t)0x3e55, (q15_t)0xc006, (q15_t)0x3e48, (q15_t)0xc006,
+    (q15_t)0x3e3c, (q15_t)0xc006, (q15_t)0x3e2f, (q15_t)0xc007, (q15_t)0x3e23, (q15_t)0xc007, (q15_t)0x3e16, (q15_t)0xc007,
+    (q15_t)0x3e09, (q15_t)0xc008, (q15_t)0x3dfd, (q15_t)0xc008, (q15_t)0x3df0, (q15_t)0xc009, (q15_t)0x3de4, (q15_t)0xc009,
+    (q15_t)0x3dd7, (q15_t)0xc009, (q15_t)0x3dcb, (q15_t)0xc00a, (q15_t)0x3dbe, (q15_t)0xc00a, (q15_t)0x3db2, (q15_t)0xc00b,
+    (q15_t)0x3da5, (q15_t)0xc00b, (q15_t)0x3d98, (q15_t)0xc00c, (q15_t)0x3d8c, (q15_t)0xc00c, (q15_t)0x3d7f, (q15_t)0xc00d,
+    (q15_t)0x3d73, (q15_t)0xc00d, (q15_t)0x3d66, (q15_t)0xc00e, (q15_t)0x3d5a, (q15_t)0xc00e, (q15_t)0x3d4d, (q15_t)0xc00f,
+    (q15_t)0x3d40, (q15_t)0xc00f, (q15_t)0x3d34, (q15_t)0xc010, (q15_t)0x3d27, (q15_t)0xc010, (q15_t)0x3d1b, (q15_t)0xc011,
+    (q15_t)0x3d0e, (q15_t)0xc011, (q15_t)0x3d02, (q15_t)0xc012, (q15_t)0x3cf5, (q15_t)0xc013, (q15_t)0x3ce9, (q15_t)0xc013,
+    (q15_t)0x3cdc, (q15_t)0xc014, (q15_t)0x3cd0, (q15_t)0xc014, (q15_t)0x3cc3, (q15_t)0xc015, (q15_t)0x3cb6, (q15_t)0xc016,
+    (q15_t)0x3caa, (q15_t)0xc016, (q15_t)0x3c9d, (q15_t)0xc017, (q15_t)0x3c91, (q15_t)0xc018, (q15_t)0x3c84, (q15_t)0xc018,
+    (q15_t)0x3c78, (q15_t)0xc019, (q15_t)0x3c6b, (q15_t)0xc01a, (q15_t)0x3c5f, (q15_t)0xc01a, (q15_t)0x3c52, (q15_t)0xc01b,
+    (q15_t)0x3c45, (q15_t)0xc01c, (q15_t)0x3c39, (q15_t)0xc01d, (q15_t)0x3c2c, (q15_t)0xc01d, (q15_t)0x3c20, (q15_t)0xc01e,
+    (q15_t)0x3c13, (q15_t)0xc01f, (q15_t)0x3c07, (q15_t)0xc020, (q15_t)0x3bfa, (q15_t)0xc020, (q15_t)0x3bee, (q15_t)0xc021,
+    (q15_t)0x3be1, (q15_t)0xc022, (q15_t)0x3bd5, (q15_t)0xc023, (q15_t)0x3bc8, (q15_t)0xc024, (q15_t)0x3bbc, (q15_t)0xc024,
+    (q15_t)0x3baf, (q15_t)0xc025, (q15_t)0x3ba2, (q15_t)0xc026, (q15_t)0x3b96, (q15_t)0xc027, (q15_t)0x3b89, (q15_t)0xc028,
+    (q15_t)0x3b7d, (q15_t)0xc029, (q15_t)0x3b70, (q15_t)0xc02a, (q15_t)0x3b64, (q15_t)0xc02b, (q15_t)0x3b57, (q15_t)0xc02b,
+    (q15_t)0x3b4b, (q15_t)0xc02c, (q15_t)0x3b3e, (q15_t)0xc02d, (q15_t)0x3b32, (q15_t)0xc02e, (q15_t)0x3b25, (q15_t)0xc02f,
+    (q15_t)0x3b19, (q15_t)0xc030, (q15_t)0x3b0c, (q15_t)0xc031, (q15_t)0x3b00, (q15_t)0xc032, (q15_t)0x3af3, (q15_t)0xc033,
+    (q15_t)0x3ae6, (q15_t)0xc034, (q15_t)0x3ada, (q15_t)0xc035, (q15_t)0x3acd, (q15_t)0xc036, (q15_t)0x3ac1, (q15_t)0xc037,
+    (q15_t)0x3ab4, (q15_t)0xc038, (q15_t)0x3aa8, (q15_t)0xc039, (q15_t)0x3a9b, (q15_t)0xc03a, (q15_t)0x3a8f, (q15_t)0xc03b,
+    (q15_t)0x3a82, (q15_t)0xc03c, (q15_t)0x3a76, (q15_t)0xc03d, (q15_t)0x3a69, (q15_t)0xc03f, (q15_t)0x3a5d, (q15_t)0xc040,
+    (q15_t)0x3a50, (q15_t)0xc041, (q15_t)0x3a44, (q15_t)0xc042, (q15_t)0x3a37, (q15_t)0xc043, (q15_t)0x3a2b, (q15_t)0xc044,
+    (q15_t)0x3a1e, (q15_t)0xc045, (q15_t)0x3a12, (q15_t)0xc047, (q15_t)0x3a05, (q15_t)0xc048, (q15_t)0x39f9, (q15_t)0xc049,
+    (q15_t)0x39ec, (q15_t)0xc04a, (q15_t)0x39e0, (q15_t)0xc04b, (q15_t)0x39d3, (q15_t)0xc04c, (q15_t)0x39c7, (q15_t)0xc04e,
+    (q15_t)0x39ba, (q15_t)0xc04f, (q15_t)0x39ae, (q15_t)0xc050, (q15_t)0x39a1, (q15_t)0xc051, (q15_t)0x3995, (q15_t)0xc053,
+    (q15_t)0x3988, (q15_t)0xc054, (q15_t)0x397c, (q15_t)0xc055, (q15_t)0x396f, (q15_t)0xc056, (q15_t)0x3963, (q15_t)0xc058,
+    (q15_t)0x3956, (q15_t)0xc059, (q15_t)0x394a, (q15_t)0xc05a, (q15_t)0x393d, (q15_t)0xc05c, (q15_t)0x3931, (q15_t)0xc05d,
+    (q15_t)0x3924, (q15_t)0xc05e, (q15_t)0x3918, (q15_t)0xc060, (q15_t)0x390b, (q15_t)0xc061, (q15_t)0x38ff, (q15_t)0xc062,
+    (q15_t)0x38f2, (q15_t)0xc064, (q15_t)0x38e6, (q15_t)0xc065, (q15_t)0x38d9, (q15_t)0xc067, (q15_t)0x38cd, (q15_t)0xc068,
+    (q15_t)0x38c0, (q15_t)0xc069, (q15_t)0x38b4, (q15_t)0xc06b, (q15_t)0x38a7, (q15_t)0xc06c, (q15_t)0x389b, (q15_t)0xc06e,
+    (q15_t)0x388e, (q15_t)0xc06f, (q15_t)0x3882, (q15_t)0xc071, (q15_t)0x3875, (q15_t)0xc072, (q15_t)0x3869, (q15_t)0xc074,
+    (q15_t)0x385c, (q15_t)0xc075, (q15_t)0x3850, (q15_t)0xc077, (q15_t)0x3843, (q15_t)0xc078, (q15_t)0x3837, (q15_t)0xc07a,
+    (q15_t)0x382a, (q15_t)0xc07b, (q15_t)0x381e, (q15_t)0xc07d, (q15_t)0x3811, (q15_t)0xc07e, (q15_t)0x3805, (q15_t)0xc080,
+    (q15_t)0x37f9, (q15_t)0xc081, (q15_t)0x37ec, (q15_t)0xc083, (q15_t)0x37e0, (q15_t)0xc085, (q15_t)0x37d3, (q15_t)0xc086,
+    (q15_t)0x37c7, (q15_t)0xc088, (q15_t)0x37ba, (q15_t)0xc089, (q15_t)0x37ae, (q15_t)0xc08b, (q15_t)0x37a1, (q15_t)0xc08d,
+    (q15_t)0x3795, (q15_t)0xc08e, (q15_t)0x3788, (q15_t)0xc090, (q15_t)0x377c, (q15_t)0xc092, (q15_t)0x376f, (q15_t)0xc093,
+    (q15_t)0x3763, (q15_t)0xc095, (q15_t)0x3757, (q15_t)0xc097, (q15_t)0x374a, (q15_t)0xc098, (q15_t)0x373e, (q15_t)0xc09a,
+    (q15_t)0x3731, (q15_t)0xc09c, (q15_t)0x3725, (q15_t)0xc09e, (q15_t)0x3718, (q15_t)0xc09f, (q15_t)0x370c, (q15_t)0xc0a1,
+    (q15_t)0x36ff, (q15_t)0xc0a3, (q15_t)0x36f3, (q15_t)0xc0a5, (q15_t)0x36e7, (q15_t)0xc0a6, (q15_t)0x36da, (q15_t)0xc0a8,
+    (q15_t)0x36ce, (q15_t)0xc0aa, (q15_t)0x36c1, (q15_t)0xc0ac, (q15_t)0x36b5, (q15_t)0xc0ae, (q15_t)0x36a8, (q15_t)0xc0af,
+    (q15_t)0x369c, (q15_t)0xc0b1, (q15_t)0x3690, (q15_t)0xc0b3, (q15_t)0x3683, (q15_t)0xc0b5, (q15_t)0x3677, (q15_t)0xc0b7,
+    (q15_t)0x366a, (q15_t)0xc0b9, (q15_t)0x365e, (q15_t)0xc0bb, (q15_t)0x3651, (q15_t)0xc0bd, (q15_t)0x3645, (q15_t)0xc0be,
+    (q15_t)0x3639, (q15_t)0xc0c0, (q15_t)0x362c, (q15_t)0xc0c2, (q15_t)0x3620, (q15_t)0xc0c4, (q15_t)0x3613, (q15_t)0xc0c6,
+    (q15_t)0x3607, (q15_t)0xc0c8, (q15_t)0x35fa, (q15_t)0xc0ca, (q15_t)0x35ee, (q15_t)0xc0cc, (q15_t)0x35e2, (q15_t)0xc0ce,
+    (q15_t)0x35d5, (q15_t)0xc0d0, (q15_t)0x35c9, (q15_t)0xc0d2, (q15_t)0x35bc, (q15_t)0xc0d4, (q15_t)0x35b0, (q15_t)0xc0d6,
+    (q15_t)0x35a4, (q15_t)0xc0d8, (q15_t)0x3597, (q15_t)0xc0da, (q15_t)0x358b, (q15_t)0xc0dc, (q15_t)0x357e, (q15_t)0xc0de,
+    (q15_t)0x3572, (q15_t)0xc0e0, (q15_t)0x3566, (q15_t)0xc0e2, (q15_t)0x3559, (q15_t)0xc0e4, (q15_t)0x354d, (q15_t)0xc0e7,
+    (q15_t)0x3540, (q15_t)0xc0e9, (q15_t)0x3534, (q15_t)0xc0eb, (q15_t)0x3528, (q15_t)0xc0ed, (q15_t)0x351b, (q15_t)0xc0ef,
+    (q15_t)0x350f, (q15_t)0xc0f1, (q15_t)0x3503, (q15_t)0xc0f3, (q15_t)0x34f6, (q15_t)0xc0f6, (q15_t)0x34ea, (q15_t)0xc0f8,
+    (q15_t)0x34dd, (q15_t)0xc0fa, (q15_t)0x34d1, (q15_t)0xc0fc, (q15_t)0x34c5, (q15_t)0xc0fe, (q15_t)0x34b8, (q15_t)0xc100,
+    (q15_t)0x34ac, (q15_t)0xc103, (q15_t)0x34a0, (q15_t)0xc105, (q15_t)0x3493, (q15_t)0xc107, (q15_t)0x3487, (q15_t)0xc109,
+    (q15_t)0x347b, (q15_t)0xc10c, (q15_t)0x346e, (q15_t)0xc10e, (q15_t)0x3462, (q15_t)0xc110, (q15_t)0x3455, (q15_t)0xc113,
+    (q15_t)0x3449, (q15_t)0xc115, (q15_t)0x343d, (q15_t)0xc117, (q15_t)0x3430, (q15_t)0xc119, (q15_t)0x3424, (q15_t)0xc11c,
+    (q15_t)0x3418, (q15_t)0xc11e, (q15_t)0x340b, (q15_t)0xc120, (q15_t)0x33ff, (q15_t)0xc123, (q15_t)0x33f3, (q15_t)0xc125,
+    (q15_t)0x33e6, (q15_t)0xc128, (q15_t)0x33da, (q15_t)0xc12a, (q15_t)0x33ce, (q15_t)0xc12c, (q15_t)0x33c1, (q15_t)0xc12f,
+    (q15_t)0x33b5, (q15_t)0xc131, (q15_t)0x33a9, (q15_t)0xc134, (q15_t)0x339c, (q15_t)0xc136, (q15_t)0x3390, (q15_t)0xc138,
+    (q15_t)0x3384, (q15_t)0xc13b, (q15_t)0x3377, (q15_t)0xc13d, (q15_t)0x336b, (q15_t)0xc140, (q15_t)0x335f, (q15_t)0xc142,
+    (q15_t)0x3352, (q15_t)0xc145, (q15_t)0x3346, (q15_t)0xc147, (q15_t)0x333a, (q15_t)0xc14a, (q15_t)0x332d, (q15_t)0xc14c,
+    (q15_t)0x3321, (q15_t)0xc14f, (q15_t)0x3315, (q15_t)0xc151, (q15_t)0x3308, (q15_t)0xc154, (q15_t)0x32fc, (q15_t)0xc156,
+    (q15_t)0x32f0, (q15_t)0xc159, (q15_t)0x32e4, (q15_t)0xc15b, (q15_t)0x32d7, (q15_t)0xc15e, (q15_t)0x32cb, (q15_t)0xc161,
+    (q15_t)0x32bf, (q15_t)0xc163, (q15_t)0x32b2, (q15_t)0xc166, (q15_t)0x32a6, (q15_t)0xc168, (q15_t)0x329a, (q15_t)0xc16b,
+    (q15_t)0x328e, (q15_t)0xc16e, (q15_t)0x3281, (q15_t)0xc170, (q15_t)0x3275, (q15_t)0xc173, (q15_t)0x3269, (q15_t)0xc176,
+    (q15_t)0x325c, (q15_t)0xc178, (q15_t)0x3250, (q15_t)0xc17b, (q15_t)0x3244, (q15_t)0xc17e, (q15_t)0x3238, (q15_t)0xc180,
+    (q15_t)0x322b, (q15_t)0xc183, (q15_t)0x321f, (q15_t)0xc186, (q15_t)0x3213, (q15_t)0xc189, (q15_t)0x3207, (q15_t)0xc18b,
+    (q15_t)0x31fa, (q15_t)0xc18e, (q15_t)0x31ee, (q15_t)0xc191, (q15_t)0x31e2, (q15_t)0xc194, (q15_t)0x31d5, (q15_t)0xc196,
+    (q15_t)0x31c9, (q15_t)0xc199, (q15_t)0x31bd, (q15_t)0xc19c, (q15_t)0x31b1, (q15_t)0xc19f, (q15_t)0x31a4, (q15_t)0xc1a2,
+    (q15_t)0x3198, (q15_t)0xc1a4, (q15_t)0x318c, (q15_t)0xc1a7, (q15_t)0x3180, (q15_t)0xc1aa, (q15_t)0x3174, (q15_t)0xc1ad,
+    (q15_t)0x3167, (q15_t)0xc1b0, (q15_t)0x315b, (q15_t)0xc1b3, (q15_t)0x314f, (q15_t)0xc1b6, (q15_t)0x3143, (q15_t)0xc1b8,
+    (q15_t)0x3136, (q15_t)0xc1bb, (q15_t)0x312a, (q15_t)0xc1be, (q15_t)0x311e, (q15_t)0xc1c1, (q15_t)0x3112, (q15_t)0xc1c4,
+    (q15_t)0x3105, (q15_t)0xc1c7, (q15_t)0x30f9, (q15_t)0xc1ca, (q15_t)0x30ed, (q15_t)0xc1cd, (q15_t)0x30e1, (q15_t)0xc1d0,
+    (q15_t)0x30d5, (q15_t)0xc1d3, (q15_t)0x30c8, (q15_t)0xc1d6, (q15_t)0x30bc, (q15_t)0xc1d9, (q15_t)0x30b0, (q15_t)0xc1dc,
+    (q15_t)0x30a4, (q15_t)0xc1df, (q15_t)0x3098, (q15_t)0xc1e2, (q15_t)0x308b, (q15_t)0xc1e5, (q15_t)0x307f, (q15_t)0xc1e8,
+    (q15_t)0x3073, (q15_t)0xc1eb, (q15_t)0x3067, (q15_t)0xc1ee, (q15_t)0x305b, (q15_t)0xc1f1, (q15_t)0x304e, (q15_t)0xc1f4,
+    (q15_t)0x3042, (q15_t)0xc1f7, (q15_t)0x3036, (q15_t)0xc1fa, (q15_t)0x302a, (q15_t)0xc1fd, (q15_t)0x301e, (q15_t)0xc201,
+    (q15_t)0x3012, (q15_t)0xc204, (q15_t)0x3005, (q15_t)0xc207, (q15_t)0x2ff9, (q15_t)0xc20a, (q15_t)0x2fed, (q15_t)0xc20d,
+    (q15_t)0x2fe1, (q15_t)0xc210, (q15_t)0x2fd5, (q15_t)0xc213, (q15_t)0x2fc9, (q15_t)0xc217, (q15_t)0x2fbc, (q15_t)0xc21a,
+    (q15_t)0x2fb0, (q15_t)0xc21d, (q15_t)0x2fa4, (q15_t)0xc220, (q15_t)0x2f98, (q15_t)0xc223, (q15_t)0x2f8c, (q15_t)0xc227,
+    (q15_t)0x2f80, (q15_t)0xc22a, (q15_t)0x2f74, (q15_t)0xc22d, (q15_t)0x2f67, (q15_t)0xc230, (q15_t)0x2f5b, (q15_t)0xc234,
+    (q15_t)0x2f4f, (q15_t)0xc237, (q15_t)0x2f43, (q15_t)0xc23a, (q15_t)0x2f37, (q15_t)0xc23e, (q15_t)0x2f2b, (q15_t)0xc241,
+    (q15_t)0x2f1f, (q15_t)0xc244, (q15_t)0x2f13, (q15_t)0xc247, (q15_t)0x2f06, (q15_t)0xc24b, (q15_t)0x2efa, (q15_t)0xc24e,
+    (q15_t)0x2eee, (q15_t)0xc251, (q15_t)0x2ee2, (q15_t)0xc255, (q15_t)0x2ed6, (q15_t)0xc258, (q15_t)0x2eca, (q15_t)0xc25c,
+    (q15_t)0x2ebe, (q15_t)0xc25f, (q15_t)0x2eb2, (q15_t)0xc262, (q15_t)0x2ea6, (q15_t)0xc266, (q15_t)0x2e99, (q15_t)0xc269,
+    (q15_t)0x2e8d, (q15_t)0xc26d, (q15_t)0x2e81, (q15_t)0xc270, (q15_t)0x2e75, (q15_t)0xc273, (q15_t)0x2e69, (q15_t)0xc277,
+    (q15_t)0x2e5d, (q15_t)0xc27a, (q15_t)0x2e51, (q15_t)0xc27e, (q15_t)0x2e45, (q15_t)0xc281, (q15_t)0x2e39, (q15_t)0xc285,
+    (q15_t)0x2e2d, (q15_t)0xc288, (q15_t)0x2e21, (q15_t)0xc28c, (q15_t)0x2e15, (q15_t)0xc28f, (q15_t)0x2e09, (q15_t)0xc293,
+    (q15_t)0x2dfc, (q15_t)0xc296, (q15_t)0x2df0, (q15_t)0xc29a, (q15_t)0x2de4, (q15_t)0xc29d, (q15_t)0x2dd8, (q15_t)0xc2a1,
+    (q15_t)0x2dcc, (q15_t)0xc2a5, (q15_t)0x2dc0, (q15_t)0xc2a8, (q15_t)0x2db4, (q15_t)0xc2ac, (q15_t)0x2da8, (q15_t)0xc2af,
+    (q15_t)0x2d9c, (q15_t)0xc2b3, (q15_t)0x2d90, (q15_t)0xc2b7, (q15_t)0x2d84, (q15_t)0xc2ba, (q15_t)0x2d78, (q15_t)0xc2be,
+    (q15_t)0x2d6c, (q15_t)0xc2c1, (q15_t)0x2d60, (q15_t)0xc2c5, (q15_t)0x2d54, (q15_t)0xc2c9, (q15_t)0x2d48, (q15_t)0xc2cc,
+    (q15_t)0x2d3c, (q15_t)0xc2d0, (q15_t)0x2d30, (q15_t)0xc2d4, (q15_t)0x2d24, (q15_t)0xc2d8, (q15_t)0x2d18, (q15_t)0xc2db,
+    (q15_t)0x2d0c, (q15_t)0xc2df, (q15_t)0x2d00, (q15_t)0xc2e3, (q15_t)0x2cf4, (q15_t)0xc2e6, (q15_t)0x2ce8, (q15_t)0xc2ea,
+    (q15_t)0x2cdc, (q15_t)0xc2ee, (q15_t)0x2cd0, (q15_t)0xc2f2, (q15_t)0x2cc4, (q15_t)0xc2f5, (q15_t)0x2cb8, (q15_t)0xc2f9,
+    (q15_t)0x2cac, (q15_t)0xc2fd, (q15_t)0x2ca0, (q15_t)0xc301, (q15_t)0x2c94, (q15_t)0xc305, (q15_t)0x2c88, (q15_t)0xc308,
+    (q15_t)0x2c7c, (q15_t)0xc30c, (q15_t)0x2c70, (q15_t)0xc310, (q15_t)0x2c64, (q15_t)0xc314, (q15_t)0x2c58, (q15_t)0xc318,
+    (q15_t)0x2c4c, (q15_t)0xc31c, (q15_t)0x2c40, (q15_t)0xc320, (q15_t)0x2c34, (q15_t)0xc323, (q15_t)0x2c28, (q15_t)0xc327,
+    (q15_t)0x2c1c, (q15_t)0xc32b, (q15_t)0x2c10, (q15_t)0xc32f, (q15_t)0x2c05, (q15_t)0xc333, (q15_t)0x2bf9, (q15_t)0xc337,
+    (q15_t)0x2bed, (q15_t)0xc33b, (q15_t)0x2be1, (q15_t)0xc33f, (q15_t)0x2bd5, (q15_t)0xc343, (q15_t)0x2bc9, (q15_t)0xc347,
+    (q15_t)0x2bbd, (q15_t)0xc34b, (q15_t)0x2bb1, (q15_t)0xc34f, (q15_t)0x2ba5, (q15_t)0xc353, (q15_t)0x2b99, (q15_t)0xc357,
+    (q15_t)0x2b8d, (q15_t)0xc35b, (q15_t)0x2b81, (q15_t)0xc35f, (q15_t)0x2b75, (q15_t)0xc363, (q15_t)0x2b6a, (q15_t)0xc367,
+    (q15_t)0x2b5e, (q15_t)0xc36b, (q15_t)0x2b52, (q15_t)0xc36f, (q15_t)0x2b46, (q15_t)0xc373, (q15_t)0x2b3a, (q15_t)0xc377,
+    (q15_t)0x2b2e, (q15_t)0xc37b, (q15_t)0x2b22, (q15_t)0xc37f, (q15_t)0x2b16, (q15_t)0xc383, (q15_t)0x2b0a, (q15_t)0xc387,
+    (q15_t)0x2aff, (q15_t)0xc38c, (q15_t)0x2af3, (q15_t)0xc390, (q15_t)0x2ae7, (q15_t)0xc394, (q15_t)0x2adb, (q15_t)0xc398,
+    (q15_t)0x2acf, (q15_t)0xc39c, (q15_t)0x2ac3, (q15_t)0xc3a0, (q15_t)0x2ab7, (q15_t)0xc3a5, (q15_t)0x2aac, (q15_t)0xc3a9,
+    (q15_t)0x2aa0, (q15_t)0xc3ad, (q15_t)0x2a94, (q15_t)0xc3b1, (q15_t)0x2a88, (q15_t)0xc3b5, (q15_t)0x2a7c, (q15_t)0xc3ba,
+    (q15_t)0x2a70, (q15_t)0xc3be, (q15_t)0x2a65, (q15_t)0xc3c2, (q15_t)0x2a59, (q15_t)0xc3c6, (q15_t)0x2a4d, (q15_t)0xc3ca,
+    (q15_t)0x2a41, (q15_t)0xc3cf, (q15_t)0x2a35, (q15_t)0xc3d3, (q15_t)0x2a29, (q15_t)0xc3d7, (q15_t)0x2a1e, (q15_t)0xc3dc,
+    (q15_t)0x2a12, (q15_t)0xc3e0, (q15_t)0x2a06, (q15_t)0xc3e4, (q15_t)0x29fa, (q15_t)0xc3e9, (q15_t)0x29ee, (q15_t)0xc3ed,
+    (q15_t)0x29e3, (q15_t)0xc3f1, (q15_t)0x29d7, (q15_t)0xc3f6, (q15_t)0x29cb, (q15_t)0xc3fa, (q15_t)0x29bf, (q15_t)0xc3fe,
+    (q15_t)0x29b4, (q15_t)0xc403, (q15_t)0x29a8, (q15_t)0xc407, (q15_t)0x299c, (q15_t)0xc40b, (q15_t)0x2990, (q15_t)0xc410,
+    (q15_t)0x2984, (q15_t)0xc414, (q15_t)0x2979, (q15_t)0xc419, (q15_t)0x296d, (q15_t)0xc41d, (q15_t)0x2961, (q15_t)0xc422,
+    (q15_t)0x2955, (q15_t)0xc426, (q15_t)0x294a, (q15_t)0xc42a, (q15_t)0x293e, (q15_t)0xc42f, (q15_t)0x2932, (q15_t)0xc433,
+    (q15_t)0x2926, (q15_t)0xc438, (q15_t)0x291b, (q15_t)0xc43c, (q15_t)0x290f, (q15_t)0xc441, (q15_t)0x2903, (q15_t)0xc445,
+    (q15_t)0x28f7, (q15_t)0xc44a, (q15_t)0x28ec, (q15_t)0xc44e, (q15_t)0x28e0, (q15_t)0xc453, (q15_t)0x28d4, (q15_t)0xc457,
+    (q15_t)0x28c9, (q15_t)0xc45c, (q15_t)0x28bd, (q15_t)0xc461, (q15_t)0x28b1, (q15_t)0xc465, (q15_t)0x28a5, (q15_t)0xc46a,
+    (q15_t)0x289a, (q15_t)0xc46e, (q15_t)0x288e, (q15_t)0xc473, (q15_t)0x2882, (q15_t)0xc478, (q15_t)0x2877, (q15_t)0xc47c,
+    (q15_t)0x286b, (q15_t)0xc481, (q15_t)0x285f, (q15_t)0xc485, (q15_t)0x2854, (q15_t)0xc48a, (q15_t)0x2848, (q15_t)0xc48f,
+    (q15_t)0x283c, (q15_t)0xc493, (q15_t)0x2831, (q15_t)0xc498, (q15_t)0x2825, (q15_t)0xc49d, (q15_t)0x2819, (q15_t)0xc4a1,
+    (q15_t)0x280e, (q15_t)0xc4a6, (q15_t)0x2802, (q15_t)0xc4ab, (q15_t)0x27f6, (q15_t)0xc4b0, (q15_t)0x27eb, (q15_t)0xc4b4,
+    (q15_t)0x27df, (q15_t)0xc4b9, (q15_t)0x27d3, (q15_t)0xc4be, (q15_t)0x27c8, (q15_t)0xc4c2, (q15_t)0x27bc, (q15_t)0xc4c7,
+    (q15_t)0x27b1, (q15_t)0xc4cc, (q15_t)0x27a5, (q15_t)0xc4d1, (q15_t)0x2799, (q15_t)0xc4d6, (q15_t)0x278e, (q15_t)0xc4da,
+    (q15_t)0x2782, (q15_t)0xc4df, (q15_t)0x2777, (q15_t)0xc4e4, (q15_t)0x276b, (q15_t)0xc4e9, (q15_t)0x275f, (q15_t)0xc4ee,
+    (q15_t)0x2754, (q15_t)0xc4f2, (q15_t)0x2748, (q15_t)0xc4f7, (q15_t)0x273d, (q15_t)0xc4fc, (q15_t)0x2731, (q15_t)0xc501,
+    (q15_t)0x2725, (q15_t)0xc506, (q15_t)0x271a, (q15_t)0xc50b, (q15_t)0x270e, (q15_t)0xc510, (q15_t)0x2703, (q15_t)0xc515,
+    (q15_t)0x26f7, (q15_t)0xc51a, (q15_t)0x26ec, (q15_t)0xc51e, (q15_t)0x26e0, (q15_t)0xc523, (q15_t)0x26d4, (q15_t)0xc528,
+    (q15_t)0x26c9, (q15_t)0xc52d, (q15_t)0x26bd, (q15_t)0xc532, (q15_t)0x26b2, (q15_t)0xc537, (q15_t)0x26a6, (q15_t)0xc53c,
+    (q15_t)0x269b, (q15_t)0xc541, (q15_t)0x268f, (q15_t)0xc546, (q15_t)0x2684, (q15_t)0xc54b, (q15_t)0x2678, (q15_t)0xc550,
+    (q15_t)0x266d, (q15_t)0xc555, (q15_t)0x2661, (q15_t)0xc55a, (q15_t)0x2656, (q15_t)0xc55f, (q15_t)0x264a, (q15_t)0xc564,
+    (q15_t)0x263f, (q15_t)0xc569, (q15_t)0x2633, (q15_t)0xc56e, (q15_t)0x2628, (q15_t)0xc573, (q15_t)0x261c, (q15_t)0xc578,
+    (q15_t)0x2611, (q15_t)0xc57e, (q15_t)0x2605, (q15_t)0xc583, (q15_t)0x25fa, (q15_t)0xc588, (q15_t)0x25ee, (q15_t)0xc58d,
+    (q15_t)0x25e3, (q15_t)0xc592, (q15_t)0x25d7, (q15_t)0xc597, (q15_t)0x25cc, (q15_t)0xc59c, (q15_t)0x25c0, (q15_t)0xc5a1,
+    (q15_t)0x25b5, (q15_t)0xc5a7, (q15_t)0x25a9, (q15_t)0xc5ac, (q15_t)0x259e, (q15_t)0xc5b1, (q15_t)0x2592, (q15_t)0xc5b6,
+    (q15_t)0x2587, (q15_t)0xc5bb, (q15_t)0x257c, (q15_t)0xc5c1, (q15_t)0x2570, (q15_t)0xc5c6, (q15_t)0x2565, (q15_t)0xc5cb,
+    (q15_t)0x2559, (q15_t)0xc5d0, (q15_t)0x254e, (q15_t)0xc5d5, (q15_t)0x2542, (q15_t)0xc5db, (q15_t)0x2537, (q15_t)0xc5e0,
+    (q15_t)0x252c, (q15_t)0xc5e5, (q15_t)0x2520, (q15_t)0xc5ea, (q15_t)0x2515, (q15_t)0xc5f0, (q15_t)0x2509, (q15_t)0xc5f5,
+    (q15_t)0x24fe, (q15_t)0xc5fa, (q15_t)0x24f3, (q15_t)0xc600, (q15_t)0x24e7, (q15_t)0xc605, (q15_t)0x24dc, (q15_t)0xc60a,
+    (q15_t)0x24d0, (q15_t)0xc610, (q15_t)0x24c5, (q15_t)0xc615, (q15_t)0x24ba, (q15_t)0xc61a, (q15_t)0x24ae, (q15_t)0xc620,
+    (q15_t)0x24a3, (q15_t)0xc625, (q15_t)0x2498, (q15_t)0xc62a, (q15_t)0x248c, (q15_t)0xc630, (q15_t)0x2481, (q15_t)0xc635,
+    (q15_t)0x2476, (q15_t)0xc63b, (q15_t)0x246a, (q15_t)0xc640, (q15_t)0x245f, (q15_t)0xc645, (q15_t)0x2454, (q15_t)0xc64b,
+    (q15_t)0x2448, (q15_t)0xc650, (q15_t)0x243d, (q15_t)0xc656, (q15_t)0x2432, (q15_t)0xc65b, (q15_t)0x2426, (q15_t)0xc661,
+    (q15_t)0x241b, (q15_t)0xc666, (q15_t)0x2410, (q15_t)0xc66c, (q15_t)0x2404, (q15_t)0xc671, (q15_t)0x23f9, (q15_t)0xc677,
+    (q15_t)0x23ee, (q15_t)0xc67c, (q15_t)0x23e2, (q15_t)0xc682, (q15_t)0x23d7, (q15_t)0xc687, (q15_t)0x23cc, (q15_t)0xc68d,
+    (q15_t)0x23c1, (q15_t)0xc692, (q15_t)0x23b5, (q15_t)0xc698, (q15_t)0x23aa, (q15_t)0xc69d, (q15_t)0x239f, (q15_t)0xc6a3,
+    (q15_t)0x2394, (q15_t)0xc6a8, (q15_t)0x2388, (q15_t)0xc6ae, (q15_t)0x237d, (q15_t)0xc6b4, (q15_t)0x2372, (q15_t)0xc6b9,
+    (q15_t)0x2367, (q15_t)0xc6bf, (q15_t)0x235b, (q15_t)0xc6c5, (q15_t)0x2350, (q15_t)0xc6ca, (q15_t)0x2345, (q15_t)0xc6d0,
+    (q15_t)0x233a, (q15_t)0xc6d5, (q15_t)0x232e, (q15_t)0xc6db, (q15_t)0x2323, (q15_t)0xc6e1, (q15_t)0x2318, (q15_t)0xc6e6,
+    (q15_t)0x230d, (q15_t)0xc6ec, (q15_t)0x2301, (q15_t)0xc6f2, (q15_t)0x22f6, (q15_t)0xc6f7, (q15_t)0x22eb, (q15_t)0xc6fd,
+    (q15_t)0x22e0, (q15_t)0xc703, (q15_t)0x22d5, (q15_t)0xc709, (q15_t)0x22ca, (q15_t)0xc70e, (q15_t)0x22be, (q15_t)0xc714,
+    (q15_t)0x22b3, (q15_t)0xc71a, (q15_t)0x22a8, (q15_t)0xc720, (q15_t)0x229d, (q15_t)0xc725, (q15_t)0x2292, (q15_t)0xc72b,
+    (q15_t)0x2287, (q15_t)0xc731, (q15_t)0x227b, (q15_t)0xc737, (q15_t)0x2270, (q15_t)0xc73d, (q15_t)0x2265, (q15_t)0xc742,
+    (q15_t)0x225a, (q15_t)0xc748, (q15_t)0x224f, (q15_t)0xc74e, (q15_t)0x2244, (q15_t)0xc754, (q15_t)0x2239, (q15_t)0xc75a,
+    (q15_t)0x222d, (q15_t)0xc75f, (q15_t)0x2222, (q15_t)0xc765, (q15_t)0x2217, (q15_t)0xc76b, (q15_t)0x220c, (q15_t)0xc771,
+    (q15_t)0x2201, (q15_t)0xc777, (q15_t)0x21f6, (q15_t)0xc77d, (q15_t)0x21eb, (q15_t)0xc783, (q15_t)0x21e0, (q15_t)0xc789,
+    (q15_t)0x21d5, (q15_t)0xc78f, (q15_t)0x21ca, (q15_t)0xc795, (q15_t)0x21be, (q15_t)0xc79a, (q15_t)0x21b3, (q15_t)0xc7a0,
+    (q15_t)0x21a8, (q15_t)0xc7a6, (q15_t)0x219d, (q15_t)0xc7ac, (q15_t)0x2192, (q15_t)0xc7b2, (q15_t)0x2187, (q15_t)0xc7b8,
+    (q15_t)0x217c, (q15_t)0xc7be, (q15_t)0x2171, (q15_t)0xc7c4, (q15_t)0x2166, (q15_t)0xc7ca, (q15_t)0x215b, (q15_t)0xc7d0,
+    (q15_t)0x2150, (q15_t)0xc7d6, (q15_t)0x2145, (q15_t)0xc7dc, (q15_t)0x213a, (q15_t)0xc7e2, (q15_t)0x212f, (q15_t)0xc7e8,
+    (q15_t)0x2124, (q15_t)0xc7ee, (q15_t)0x2119, (q15_t)0xc7f5, (q15_t)0x210e, (q15_t)0xc7fb, (q15_t)0x2103, (q15_t)0xc801,
+    (q15_t)0x20f8, (q15_t)0xc807, (q15_t)0x20ed, (q15_t)0xc80d, (q15_t)0x20e2, (q15_t)0xc813, (q15_t)0x20d7, (q15_t)0xc819,
+    (q15_t)0x20cc, (q15_t)0xc81f, (q15_t)0x20c1, (q15_t)0xc825, (q15_t)0x20b6, (q15_t)0xc82b, (q15_t)0x20ab, (q15_t)0xc832,
+    (q15_t)0x20a0, (q15_t)0xc838, (q15_t)0x2095, (q15_t)0xc83e, (q15_t)0x208a, (q15_t)0xc844, (q15_t)0x207f, (q15_t)0xc84a,
+    (q15_t)0x2074, (q15_t)0xc850, (q15_t)0x2069, (q15_t)0xc857, (q15_t)0x205e, (q15_t)0xc85d, (q15_t)0x2054, (q15_t)0xc863,
+    (q15_t)0x2049, (q15_t)0xc869, (q15_t)0x203e, (q15_t)0xc870, (q15_t)0x2033, (q15_t)0xc876, (q15_t)0x2028, (q15_t)0xc87c,
+    (q15_t)0x201d, (q15_t)0xc882, (q15_t)0x2012, (q15_t)0xc889, (q15_t)0x2007, (q15_t)0xc88f, (q15_t)0x1ffc, (q15_t)0xc895,
+    (q15_t)0x1ff1, (q15_t)0xc89b, (q15_t)0x1fe7, (q15_t)0xc8a2, (q15_t)0x1fdc, (q15_t)0xc8a8, (q15_t)0x1fd1, (q15_t)0xc8ae,
+    (q15_t)0x1fc6, (q15_t)0xc8b5, (q15_t)0x1fbb, (q15_t)0xc8bb, (q15_t)0x1fb0, (q15_t)0xc8c1, (q15_t)0x1fa5, (q15_t)0xc8c8,
+    (q15_t)0x1f9b, (q15_t)0xc8ce, (q15_t)0x1f90, (q15_t)0xc8d4, (q15_t)0x1f85, (q15_t)0xc8db, (q15_t)0x1f7a, (q15_t)0xc8e1,
+    (q15_t)0x1f6f, (q15_t)0xc8e8, (q15_t)0x1f65, (q15_t)0xc8ee, (q15_t)0x1f5a, (q15_t)0xc8f4, (q15_t)0x1f4f, (q15_t)0xc8fb,
+    (q15_t)0x1f44, (q15_t)0xc901, (q15_t)0x1f39, (q15_t)0xc908, (q15_t)0x1f2f, (q15_t)0xc90e, (q15_t)0x1f24, (q15_t)0xc915,
+    (q15_t)0x1f19, (q15_t)0xc91b, (q15_t)0x1f0e, (q15_t)0xc921, (q15_t)0x1f03, (q15_t)0xc928, (q15_t)0x1ef9, (q15_t)0xc92e,
+    (q15_t)0x1eee, (q15_t)0xc935, (q15_t)0x1ee3, (q15_t)0xc93b, (q15_t)0x1ed8, (q15_t)0xc942, (q15_t)0x1ece, (q15_t)0xc948,
+    (q15_t)0x1ec3, (q15_t)0xc94f, (q15_t)0x1eb8, (q15_t)0xc955, (q15_t)0x1ead, (q15_t)0xc95c, (q15_t)0x1ea3, (q15_t)0xc963,
+    (q15_t)0x1e98, (q15_t)0xc969, (q15_t)0x1e8d, (q15_t)0xc970, (q15_t)0x1e83, (q15_t)0xc976, (q15_t)0x1e78, (q15_t)0xc97d,
+    (q15_t)0x1e6d, (q15_t)0xc983, (q15_t)0x1e62, (q15_t)0xc98a, (q15_t)0x1e58, (q15_t)0xc991, (q15_t)0x1e4d, (q15_t)0xc997,
+    (q15_t)0x1e42, (q15_t)0xc99e, (q15_t)0x1e38, (q15_t)0xc9a4, (q15_t)0x1e2d, (q15_t)0xc9ab, (q15_t)0x1e22, (q15_t)0xc9b2,
+    (q15_t)0x1e18, (q15_t)0xc9b8, (q15_t)0x1e0d, (q15_t)0xc9bf, (q15_t)0x1e02, (q15_t)0xc9c6, (q15_t)0x1df8, (q15_t)0xc9cc,
+    (q15_t)0x1ded, (q15_t)0xc9d3, (q15_t)0x1de2, (q15_t)0xc9da, (q15_t)0x1dd8, (q15_t)0xc9e0, (q15_t)0x1dcd, (q15_t)0xc9e7,
+    (q15_t)0x1dc3, (q15_t)0xc9ee, (q15_t)0x1db8, (q15_t)0xc9f5, (q15_t)0x1dad, (q15_t)0xc9fb, (q15_t)0x1da3, (q15_t)0xca02,
+    (q15_t)0x1d98, (q15_t)0xca09, (q15_t)0x1d8e, (q15_t)0xca10, (q15_t)0x1d83, (q15_t)0xca16, (q15_t)0x1d78, (q15_t)0xca1d,
+    (q15_t)0x1d6e, (q15_t)0xca24, (q15_t)0x1d63, (q15_t)0xca2b, (q15_t)0x1d59, (q15_t)0xca32, (q15_t)0x1d4e, (q15_t)0xca38,
+    (q15_t)0x1d44, (q15_t)0xca3f, (q15_t)0x1d39, (q15_t)0xca46, (q15_t)0x1d2e, (q15_t)0xca4d, (q15_t)0x1d24, (q15_t)0xca54,
+    (q15_t)0x1d19, (q15_t)0xca5b, (q15_t)0x1d0f, (q15_t)0xca61, (q15_t)0x1d04, (q15_t)0xca68, (q15_t)0x1cfa, (q15_t)0xca6f,
+    (q15_t)0x1cef, (q15_t)0xca76, (q15_t)0x1ce5, (q15_t)0xca7d, (q15_t)0x1cda, (q15_t)0xca84, (q15_t)0x1cd0, (q15_t)0xca8b,
+    (q15_t)0x1cc5, (q15_t)0xca92, (q15_t)0x1cbb, (q15_t)0xca99, (q15_t)0x1cb0, (q15_t)0xca9f, (q15_t)0x1ca6, (q15_t)0xcaa6,
+    (q15_t)0x1c9b, (q15_t)0xcaad, (q15_t)0x1c91, (q15_t)0xcab4, (q15_t)0x1c86, (q15_t)0xcabb, (q15_t)0x1c7c, (q15_t)0xcac2,
+    (q15_t)0x1c72, (q15_t)0xcac9, (q15_t)0x1c67, (q15_t)0xcad0, (q15_t)0x1c5d, (q15_t)0xcad7, (q15_t)0x1c52, (q15_t)0xcade,
+    (q15_t)0x1c48, (q15_t)0xcae5, (q15_t)0x1c3d, (q15_t)0xcaec, (q15_t)0x1c33, (q15_t)0xcaf3, (q15_t)0x1c29, (q15_t)0xcafa,
+    (q15_t)0x1c1e, (q15_t)0xcb01, (q15_t)0x1c14, (q15_t)0xcb08, (q15_t)0x1c09, (q15_t)0xcb0f, (q15_t)0x1bff, (q15_t)0xcb16,
+    (q15_t)0x1bf5, (q15_t)0xcb1e, (q15_t)0x1bea, (q15_t)0xcb25, (q15_t)0x1be0, (q15_t)0xcb2c, (q15_t)0x1bd5, (q15_t)0xcb33,
+    (q15_t)0x1bcb, (q15_t)0xcb3a, (q15_t)0x1bc1, (q15_t)0xcb41, (q15_t)0x1bb6, (q15_t)0xcb48, (q15_t)0x1bac, (q15_t)0xcb4f,
+    (q15_t)0x1ba2, (q15_t)0xcb56, (q15_t)0x1b97, (q15_t)0xcb5e, (q15_t)0x1b8d, (q15_t)0xcb65, (q15_t)0x1b83, (q15_t)0xcb6c,
+    (q15_t)0x1b78, (q15_t)0xcb73, (q15_t)0x1b6e, (q15_t)0xcb7a, (q15_t)0x1b64, (q15_t)0xcb81, (q15_t)0x1b59, (q15_t)0xcb89,
+    (q15_t)0x1b4f, (q15_t)0xcb90, (q15_t)0x1b45, (q15_t)0xcb97, (q15_t)0x1b3b, (q15_t)0xcb9e, (q15_t)0x1b30, (q15_t)0xcba5,
+    (q15_t)0x1b26, (q15_t)0xcbad, (q15_t)0x1b1c, (q15_t)0xcbb4, (q15_t)0x1b11, (q15_t)0xcbbb, (q15_t)0x1b07, (q15_t)0xcbc2,
+    (q15_t)0x1afd, (q15_t)0xcbca, (q15_t)0x1af3, (q15_t)0xcbd1, (q15_t)0x1ae8, (q15_t)0xcbd8, (q15_t)0x1ade, (q15_t)0xcbe0,
+    (q15_t)0x1ad4, (q15_t)0xcbe7, (q15_t)0x1aca, (q15_t)0xcbee, (q15_t)0x1abf, (q15_t)0xcbf5, (q15_t)0x1ab5, (q15_t)0xcbfd,
+    (q15_t)0x1aab, (q15_t)0xcc04, (q15_t)0x1aa1, (q15_t)0xcc0b, (q15_t)0x1a97, (q15_t)0xcc13, (q15_t)0x1a8c, (q15_t)0xcc1a,
+    (q15_t)0x1a82, (q15_t)0xcc21, (q15_t)0x1a78, (q15_t)0xcc29, (q15_t)0x1a6e, (q15_t)0xcc30, (q15_t)0x1a64, (q15_t)0xcc38,
+    (q15_t)0x1a5a, (q15_t)0xcc3f, (q15_t)0x1a4f, (q15_t)0xcc46, (q15_t)0x1a45, (q15_t)0xcc4e, (q15_t)0x1a3b, (q15_t)0xcc55,
+    (q15_t)0x1a31, (q15_t)0xcc5d, (q15_t)0x1a27, (q15_t)0xcc64, (q15_t)0x1a1d, (q15_t)0xcc6b, (q15_t)0x1a13, (q15_t)0xcc73,
+    (q15_t)0x1a08, (q15_t)0xcc7a, (q15_t)0x19fe, (q15_t)0xcc82, (q15_t)0x19f4, (q15_t)0xcc89, (q15_t)0x19ea, (q15_t)0xcc91,
+    (q15_t)0x19e0, (q15_t)0xcc98, (q15_t)0x19d6, (q15_t)0xcca0, (q15_t)0x19cc, (q15_t)0xcca7, (q15_t)0x19c2, (q15_t)0xccaf,
+    (q15_t)0x19b8, (q15_t)0xccb6, (q15_t)0x19ae, (q15_t)0xccbe, (q15_t)0x19a4, (q15_t)0xccc5, (q15_t)0x199a, (q15_t)0xcccd,
+    (q15_t)0x198f, (q15_t)0xccd4, (q15_t)0x1985, (q15_t)0xccdc, (q15_t)0x197b, (q15_t)0xcce3, (q15_t)0x1971, (q15_t)0xcceb,
+    (q15_t)0x1967, (q15_t)0xccf3, (q15_t)0x195d, (q15_t)0xccfa, (q15_t)0x1953, (q15_t)0xcd02, (q15_t)0x1949, (q15_t)0xcd09,
+    (q15_t)0x193f, (q15_t)0xcd11, (q15_t)0x1935, (q15_t)0xcd19, (q15_t)0x192b, (q15_t)0xcd20, (q15_t)0x1921, (q15_t)0xcd28,
+    (q15_t)0x1917, (q15_t)0xcd30, (q15_t)0x190d, (q15_t)0xcd37, (q15_t)0x1903, (q15_t)0xcd3f, (q15_t)0x18f9, (q15_t)0xcd46,
+    (q15_t)0x18ef, (q15_t)0xcd4e, (q15_t)0x18e6, (q15_t)0xcd56, (q15_t)0x18dc, (q15_t)0xcd5d, (q15_t)0x18d2, (q15_t)0xcd65,
+    (q15_t)0x18c8, (q15_t)0xcd6d, (q15_t)0x18be, (q15_t)0xcd75, (q15_t)0x18b4, (q15_t)0xcd7c, (q15_t)0x18aa, (q15_t)0xcd84,
+    (q15_t)0x18a0, (q15_t)0xcd8c, (q15_t)0x1896, (q15_t)0xcd93, (q15_t)0x188c, (q15_t)0xcd9b, (q15_t)0x1882, (q15_t)0xcda3,
+    (q15_t)0x1878, (q15_t)0xcdab, (q15_t)0x186f, (q15_t)0xcdb2, (q15_t)0x1865, (q15_t)0xcdba, (q15_t)0x185b, (q15_t)0xcdc2,
+    (q15_t)0x1851, (q15_t)0xcdca, (q15_t)0x1847, (q15_t)0xcdd2, (q15_t)0x183d, (q15_t)0xcdd9, (q15_t)0x1833, (q15_t)0xcde1,
+    (q15_t)0x182a, (q15_t)0xcde9, (q15_t)0x1820, (q15_t)0xcdf1, (q15_t)0x1816, (q15_t)0xcdf9, (q15_t)0x180c, (q15_t)0xce01,
+    (q15_t)0x1802, (q15_t)0xce08, (q15_t)0x17f8, (q15_t)0xce10, (q15_t)0x17ef, (q15_t)0xce18, (q15_t)0x17e5, (q15_t)0xce20,
+    (q15_t)0x17db, (q15_t)0xce28, (q15_t)0x17d1, (q15_t)0xce30, (q15_t)0x17c8, (q15_t)0xce38, (q15_t)0x17be, (q15_t)0xce40,
+    (q15_t)0x17b4, (q15_t)0xce47, (q15_t)0x17aa, (q15_t)0xce4f, (q15_t)0x17a0, (q15_t)0xce57, (q15_t)0x1797, (q15_t)0xce5f,
+    (q15_t)0x178d, (q15_t)0xce67, (q15_t)0x1783, (q15_t)0xce6f, (q15_t)0x177a, (q15_t)0xce77, (q15_t)0x1770, (q15_t)0xce7f,
+    (q15_t)0x1766, (q15_t)0xce87, (q15_t)0x175c, (q15_t)0xce8f, (q15_t)0x1753, (q15_t)0xce97, (q15_t)0x1749, (q15_t)0xce9f,
+    (q15_t)0x173f, (q15_t)0xcea7, (q15_t)0x1736, (q15_t)0xceaf, (q15_t)0x172c, (q15_t)0xceb7, (q15_t)0x1722, (q15_t)0xcebf,
+    (q15_t)0x1719, (q15_t)0xcec7, (q15_t)0x170f, (q15_t)0xcecf, (q15_t)0x1705, (q15_t)0xced7, (q15_t)0x16fc, (q15_t)0xcedf,
+    (q15_t)0x16f2, (q15_t)0xcee7, (q15_t)0x16e8, (q15_t)0xceef, (q15_t)0x16df, (q15_t)0xcef7, (q15_t)0x16d5, (q15_t)0xceff,
+    (q15_t)0x16cb, (q15_t)0xcf07, (q15_t)0x16c2, (q15_t)0xcf10, (q15_t)0x16b8, (q15_t)0xcf18, (q15_t)0x16af, (q15_t)0xcf20,
+    (q15_t)0x16a5, (q15_t)0xcf28, (q15_t)0x169b, (q15_t)0xcf30, (q15_t)0x1692, (q15_t)0xcf38, (q15_t)0x1688, (q15_t)0xcf40,
+    (q15_t)0x167f, (q15_t)0xcf48, (q15_t)0x1675, (q15_t)0xcf51, (q15_t)0x166c, (q15_t)0xcf59, (q15_t)0x1662, (q15_t)0xcf61,
+    (q15_t)0x1659, (q15_t)0xcf69, (q15_t)0x164f, (q15_t)0xcf71, (q15_t)0x1645, (q15_t)0xcf79, (q15_t)0x163c, (q15_t)0xcf82,
+    (q15_t)0x1632, (q15_t)0xcf8a, (q15_t)0x1629, (q15_t)0xcf92, (q15_t)0x161f, (q15_t)0xcf9a, (q15_t)0x1616, (q15_t)0xcfa3,
+    (q15_t)0x160c, (q15_t)0xcfab, (q15_t)0x1603, (q15_t)0xcfb3, (q15_t)0x15f9, (q15_t)0xcfbb, (q15_t)0x15f0, (q15_t)0xcfc4,
+    (q15_t)0x15e6, (q15_t)0xcfcc, (q15_t)0x15dd, (q15_t)0xcfd4, (q15_t)0x15d4, (q15_t)0xcfdc, (q15_t)0x15ca, (q15_t)0xcfe5,
+    (q15_t)0x15c1, (q15_t)0xcfed, (q15_t)0x15b7, (q15_t)0xcff5, (q15_t)0x15ae, (q15_t)0xcffe, (q15_t)0x15a4, (q15_t)0xd006,
+    (q15_t)0x159b, (q15_t)0xd00e, (q15_t)0x1592, (q15_t)0xd016, (q15_t)0x1588, (q15_t)0xd01f, (q15_t)0x157f, (q15_t)0xd027,
+    (q15_t)0x1575, (q15_t)0xd030, (q15_t)0x156c, (q15_t)0xd038, (q15_t)0x1563, (q15_t)0xd040, (q15_t)0x1559, (q15_t)0xd049,
+    (q15_t)0x1550, (q15_t)0xd051, (q15_t)0x1547, (q15_t)0xd059, (q15_t)0x153d, (q15_t)0xd062, (q15_t)0x1534, (q15_t)0xd06a,
+    (q15_t)0x152a, (q15_t)0xd073, (q15_t)0x1521, (q15_t)0xd07b, (q15_t)0x1518, (q15_t)0xd083, (q15_t)0x150e, (q15_t)0xd08c,
+    (q15_t)0x1505, (q15_t)0xd094, (q15_t)0x14fc, (q15_t)0xd09d, (q15_t)0x14f3, (q15_t)0xd0a5, (q15_t)0x14e9, (q15_t)0xd0ae,
+    (q15_t)0x14e0, (q15_t)0xd0b6, (q15_t)0x14d7, (q15_t)0xd0bf, (q15_t)0x14cd, (q15_t)0xd0c7, (q15_t)0x14c4, (q15_t)0xd0d0,
+    (q15_t)0x14bb, (q15_t)0xd0d8, (q15_t)0x14b2, (q15_t)0xd0e0, (q15_t)0x14a8, (q15_t)0xd0e9, (q15_t)0x149f, (q15_t)0xd0f2,
+    (q15_t)0x1496, (q15_t)0xd0fa, (q15_t)0x148d, (q15_t)0xd103, (q15_t)0x1483, (q15_t)0xd10b, (q15_t)0x147a, (q15_t)0xd114,
+    (q15_t)0x1471, (q15_t)0xd11c, (q15_t)0x1468, (q15_t)0xd125, (q15_t)0x145f, (q15_t)0xd12d, (q15_t)0x1455, (q15_t)0xd136,
+    (q15_t)0x144c, (q15_t)0xd13e, (q15_t)0x1443, (q15_t)0xd147, (q15_t)0x143a, (q15_t)0xd150, (q15_t)0x1431, (q15_t)0xd158,
+    (q15_t)0x1428, (q15_t)0xd161, (q15_t)0x141e, (q15_t)0xd169, (q15_t)0x1415, (q15_t)0xd172, (q15_t)0x140c, (q15_t)0xd17b,
+    (q15_t)0x1403, (q15_t)0xd183, (q15_t)0x13fa, (q15_t)0xd18c, (q15_t)0x13f1, (q15_t)0xd195, (q15_t)0x13e8, (q15_t)0xd19d,
+    (q15_t)0x13df, (q15_t)0xd1a6, (q15_t)0x13d5, (q15_t)0xd1af, (q15_t)0x13cc, (q15_t)0xd1b7, (q15_t)0x13c3, (q15_t)0xd1c0,
+    (q15_t)0x13ba, (q15_t)0xd1c9, (q15_t)0x13b1, (q15_t)0xd1d1, (q15_t)0x13a8, (q15_t)0xd1da, (q15_t)0x139f, (q15_t)0xd1e3,
+    (q15_t)0x1396, (q15_t)0xd1eb, (q15_t)0x138d, (q15_t)0xd1f4, (q15_t)0x1384, (q15_t)0xd1fd, (q15_t)0x137b, (q15_t)0xd206,
+    (q15_t)0x1372, (q15_t)0xd20e, (q15_t)0x1369, (q15_t)0xd217, (q15_t)0x1360, (q15_t)0xd220, (q15_t)0x1357, (q15_t)0xd229,
+    (q15_t)0x134e, (q15_t)0xd231, (q15_t)0x1345, (q15_t)0xd23a, (q15_t)0x133c, (q15_t)0xd243, (q15_t)0x1333, (q15_t)0xd24c,
+    (q15_t)0x132a, (q15_t)0xd255, (q15_t)0x1321, (q15_t)0xd25d, (q15_t)0x1318, (q15_t)0xd266, (q15_t)0x130f, (q15_t)0xd26f,
+    (q15_t)0x1306, (q15_t)0xd278, (q15_t)0x12fd, (q15_t)0xd281, (q15_t)0x12f4, (q15_t)0xd28a, (q15_t)0x12eb, (q15_t)0xd292,
+    (q15_t)0x12e2, (q15_t)0xd29b, (q15_t)0x12d9, (q15_t)0xd2a4, (q15_t)0x12d1, (q15_t)0xd2ad, (q15_t)0x12c8, (q15_t)0xd2b6,
+    (q15_t)0x12bf, (q15_t)0xd2bf, (q15_t)0x12b6, (q15_t)0xd2c8, (q15_t)0x12ad, (q15_t)0xd2d1, (q15_t)0x12a4, (q15_t)0xd2d9,
+    (q15_t)0x129b, (q15_t)0xd2e2, (q15_t)0x1292, (q15_t)0xd2eb, (q15_t)0x128a, (q15_t)0xd2f4, (q15_t)0x1281, (q15_t)0xd2fd,
+    (q15_t)0x1278, (q15_t)0xd306, (q15_t)0x126f, (q15_t)0xd30f, (q15_t)0x1266, (q15_t)0xd318, (q15_t)0x125d, (q15_t)0xd321,
+    (q15_t)0x1255, (q15_t)0xd32a, (q15_t)0x124c, (q15_t)0xd333, (q15_t)0x1243, (q15_t)0xd33c, (q15_t)0x123a, (q15_t)0xd345,
+    (q15_t)0x1231, (q15_t)0xd34e, (q15_t)0x1229, (q15_t)0xd357, (q15_t)0x1220, (q15_t)0xd360, (q15_t)0x1217, (q15_t)0xd369,
+    (q15_t)0x120e, (q15_t)0xd372, (q15_t)0x1206, (q15_t)0xd37b, (q15_t)0x11fd, (q15_t)0xd384, (q15_t)0x11f4, (q15_t)0xd38d,
+    (q15_t)0x11eb, (q15_t)0xd396, (q15_t)0x11e3, (q15_t)0xd39f, (q15_t)0x11da, (q15_t)0xd3a8, (q15_t)0x11d1, (q15_t)0xd3b1,
+    (q15_t)0x11c9, (q15_t)0xd3ba, (q15_t)0x11c0, (q15_t)0xd3c3, (q15_t)0x11b7, (q15_t)0xd3cc, (q15_t)0x11af, (q15_t)0xd3d5,
+    (q15_t)0x11a6, (q15_t)0xd3df, (q15_t)0x119d, (q15_t)0xd3e8, (q15_t)0x1195, (q15_t)0xd3f1, (q15_t)0x118c, (q15_t)0xd3fa,
+    (q15_t)0x1183, (q15_t)0xd403, (q15_t)0x117b, (q15_t)0xd40c, (q15_t)0x1172, (q15_t)0xd415, (q15_t)0x1169, (q15_t)0xd41e,
+    (q15_t)0x1161, (q15_t)0xd428, (q15_t)0x1158, (q15_t)0xd431, (q15_t)0x1150, (q15_t)0xd43a, (q15_t)0x1147, (q15_t)0xd443,
+    (q15_t)0x113e, (q15_t)0xd44c, (q15_t)0x1136, (q15_t)0xd455, (q15_t)0x112d, (q15_t)0xd45f, (q15_t)0x1125, (q15_t)0xd468,
+    (q15_t)0x111c, (q15_t)0xd471, (q15_t)0x1114, (q15_t)0xd47a, (q15_t)0x110b, (q15_t)0xd483, (q15_t)0x1103, (q15_t)0xd48d,
+    (q15_t)0x10fa, (q15_t)0xd496, (q15_t)0x10f2, (q15_t)0xd49f, (q15_t)0x10e9, (q15_t)0xd4a8, (q15_t)0x10e0, (q15_t)0xd4b2,
+    (q15_t)0x10d8, (q15_t)0xd4bb, (q15_t)0x10d0, (q15_t)0xd4c4, (q15_t)0x10c7, (q15_t)0xd4cd, (q15_t)0x10bf, (q15_t)0xd4d7,
+    (q15_t)0x10b6, (q15_t)0xd4e0, (q15_t)0x10ae, (q15_t)0xd4e9, (q15_t)0x10a5, (q15_t)0xd4f3, (q15_t)0x109d, (q15_t)0xd4fc,
+    (q15_t)0x1094, (q15_t)0xd505, (q15_t)0x108c, (q15_t)0xd50e, (q15_t)0x1083, (q15_t)0xd518, (q15_t)0x107b, (q15_t)0xd521,
+    (q15_t)0x1073, (q15_t)0xd52a, (q15_t)0x106a, (q15_t)0xd534, (q15_t)0x1062, (q15_t)0xd53d, (q15_t)0x1059, (q15_t)0xd547,
+    (q15_t)0x1051, (q15_t)0xd550, (q15_t)0x1049, (q15_t)0xd559, (q15_t)0x1040, (q15_t)0xd563, (q15_t)0x1038, (q15_t)0xd56c,
+    (q15_t)0x1030, (q15_t)0xd575, (q15_t)0x1027, (q15_t)0xd57f, (q15_t)0x101f, (q15_t)0xd588, (q15_t)0x1016, (q15_t)0xd592,
+    (q15_t)0x100e, (q15_t)0xd59b, (q15_t)0x1006, (q15_t)0xd5a4, (q15_t)0xffe, (q15_t)0xd5ae, (q15_t)0xff5, (q15_t)0xd5b7,
+    (q15_t)0xfed, (q15_t)0xd5c1, (q15_t)0xfe5, (q15_t)0xd5ca, (q15_t)0xfdc, (q15_t)0xd5d4, (q15_t)0xfd4, (q15_t)0xd5dd,
+    (q15_t)0xfcc, (q15_t)0xd5e6, (q15_t)0xfc4, (q15_t)0xd5f0, (q15_t)0xfbb, (q15_t)0xd5f9, (q15_t)0xfb3, (q15_t)0xd603,
+    (q15_t)0xfab, (q15_t)0xd60c, (q15_t)0xfa3, (q15_t)0xd616, (q15_t)0xf9a, (q15_t)0xd61f, (q15_t)0xf92, (q15_t)0xd629,
+    (q15_t)0xf8a, (q15_t)0xd632, (q15_t)0xf82, (q15_t)0xd63c, (q15_t)0xf79, (q15_t)0xd645, (q15_t)0xf71, (q15_t)0xd64f,
+    (q15_t)0xf69, (q15_t)0xd659, (q15_t)0xf61, (q15_t)0xd662, (q15_t)0xf59, (q15_t)0xd66c, (q15_t)0xf51, (q15_t)0xd675,
+    (q15_t)0xf48, (q15_t)0xd67f, (q15_t)0xf40, (q15_t)0xd688, (q15_t)0xf38, (q15_t)0xd692, (q15_t)0xf30, (q15_t)0xd69b,
+    (q15_t)0xf28, (q15_t)0xd6a5, (q15_t)0xf20, (q15_t)0xd6af, (q15_t)0xf18, (q15_t)0xd6b8, (q15_t)0xf10, (q15_t)0xd6c2,
+    (q15_t)0xf07, (q15_t)0xd6cb, (q15_t)0xeff, (q15_t)0xd6d5, (q15_t)0xef7, (q15_t)0xd6df, (q15_t)0xeef, (q15_t)0xd6e8,
+    (q15_t)0xee7, (q15_t)0xd6f2, (q15_t)0xedf, (q15_t)0xd6fc, (q15_t)0xed7, (q15_t)0xd705, (q15_t)0xecf, (q15_t)0xd70f,
+    (q15_t)0xec7, (q15_t)0xd719, (q15_t)0xebf, (q15_t)0xd722, (q15_t)0xeb7, (q15_t)0xd72c, (q15_t)0xeaf, (q15_t)0xd736,
+    (q15_t)0xea7, (q15_t)0xd73f, (q15_t)0xe9f, (q15_t)0xd749, (q15_t)0xe97, (q15_t)0xd753, (q15_t)0xe8f, (q15_t)0xd75c,
+    (q15_t)0xe87, (q15_t)0xd766, (q15_t)0xe7f, (q15_t)0xd770, (q15_t)0xe77, (q15_t)0xd77a, (q15_t)0xe6f, (q15_t)0xd783,
+    (q15_t)0xe67, (q15_t)0xd78d, (q15_t)0xe5f, (q15_t)0xd797, (q15_t)0xe57, (q15_t)0xd7a0, (q15_t)0xe4f, (q15_t)0xd7aa,
+    (q15_t)0xe47, (q15_t)0xd7b4, (q15_t)0xe40, (q15_t)0xd7be, (q15_t)0xe38, (q15_t)0xd7c8, (q15_t)0xe30, (q15_t)0xd7d1,
+    (q15_t)0xe28, (q15_t)0xd7db, (q15_t)0xe20, (q15_t)0xd7e5, (q15_t)0xe18, (q15_t)0xd7ef, (q15_t)0xe10, (q15_t)0xd7f8,
+    (q15_t)0xe08, (q15_t)0xd802, (q15_t)0xe01, (q15_t)0xd80c, (q15_t)0xdf9, (q15_t)0xd816, (q15_t)0xdf1, (q15_t)0xd820,
+    (q15_t)0xde9, (q15_t)0xd82a, (q15_t)0xde1, (q15_t)0xd833, (q15_t)0xdd9, (q15_t)0xd83d, (q15_t)0xdd2, (q15_t)0xd847,
+    (q15_t)0xdca, (q15_t)0xd851, (q15_t)0xdc2, (q15_t)0xd85b, (q15_t)0xdba, (q15_t)0xd865, (q15_t)0xdb2, (q15_t)0xd86f,
+    (q15_t)0xdab, (q15_t)0xd878, (q15_t)0xda3, (q15_t)0xd882, (q15_t)0xd9b, (q15_t)0xd88c, (q15_t)0xd93, (q15_t)0xd896,
+    (q15_t)0xd8c, (q15_t)0xd8a0, (q15_t)0xd84, (q15_t)0xd8aa, (q15_t)0xd7c, (q15_t)0xd8b4, (q15_t)0xd75, (q15_t)0xd8be,
+    (q15_t)0xd6d, (q15_t)0xd8c8, (q15_t)0xd65, (q15_t)0xd8d2, (q15_t)0xd5d, (q15_t)0xd8dc, (q15_t)0xd56, (q15_t)0xd8e6,
+    (q15_t)0xd4e, (q15_t)0xd8ef, (q15_t)0xd46, (q15_t)0xd8f9, (q15_t)0xd3f, (q15_t)0xd903, (q15_t)0xd37, (q15_t)0xd90d,
+    (q15_t)0xd30, (q15_t)0xd917, (q15_t)0xd28, (q15_t)0xd921, (q15_t)0xd20, (q15_t)0xd92b, (q15_t)0xd19, (q15_t)0xd935,
+    (q15_t)0xd11, (q15_t)0xd93f, (q15_t)0xd09, (q15_t)0xd949, (q15_t)0xd02, (q15_t)0xd953, (q15_t)0xcfa, (q15_t)0xd95d,
+    (q15_t)0xcf3, (q15_t)0xd967, (q15_t)0xceb, (q15_t)0xd971, (q15_t)0xce3, (q15_t)0xd97b, (q15_t)0xcdc, (q15_t)0xd985,
+    (q15_t)0xcd4, (q15_t)0xd98f, (q15_t)0xccd, (q15_t)0xd99a, (q15_t)0xcc5, (q15_t)0xd9a4, (q15_t)0xcbe, (q15_t)0xd9ae,
+    (q15_t)0xcb6, (q15_t)0xd9b8, (q15_t)0xcaf, (q15_t)0xd9c2, (q15_t)0xca7, (q15_t)0xd9cc, (q15_t)0xca0, (q15_t)0xd9d6,
+    (q15_t)0xc98, (q15_t)0xd9e0, (q15_t)0xc91, (q15_t)0xd9ea, (q15_t)0xc89, (q15_t)0xd9f4, (q15_t)0xc82, (q15_t)0xd9fe,
+    (q15_t)0xc7a, (q15_t)0xda08, (q15_t)0xc73, (q15_t)0xda13, (q15_t)0xc6b, (q15_t)0xda1d, (q15_t)0xc64, (q15_t)0xda27,
+    (q15_t)0xc5d, (q15_t)0xda31, (q15_t)0xc55, (q15_t)0xda3b, (q15_t)0xc4e, (q15_t)0xda45, (q15_t)0xc46, (q15_t)0xda4f,
+    (q15_t)0xc3f, (q15_t)0xda5a, (q15_t)0xc38, (q15_t)0xda64, (q15_t)0xc30, (q15_t)0xda6e, (q15_t)0xc29, (q15_t)0xda78,
+    (q15_t)0xc21, (q15_t)0xda82, (q15_t)0xc1a, (q15_t)0xda8c, (q15_t)0xc13, (q15_t)0xda97, (q15_t)0xc0b, (q15_t)0xdaa1,
+    (q15_t)0xc04, (q15_t)0xdaab, (q15_t)0xbfd, (q15_t)0xdab5, (q15_t)0xbf5, (q15_t)0xdabf, (q15_t)0xbee, (q15_t)0xdaca,
+    (q15_t)0xbe7, (q15_t)0xdad4, (q15_t)0xbe0, (q15_t)0xdade, (q15_t)0xbd8, (q15_t)0xdae8, (q15_t)0xbd1, (q15_t)0xdaf3,
+    (q15_t)0xbca, (q15_t)0xdafd, (q15_t)0xbc2, (q15_t)0xdb07, (q15_t)0xbbb, (q15_t)0xdb11, (q15_t)0xbb4, (q15_t)0xdb1c,
+    (q15_t)0xbad, (q15_t)0xdb26, (q15_t)0xba5, (q15_t)0xdb30, (q15_t)0xb9e, (q15_t)0xdb3b, (q15_t)0xb97, (q15_t)0xdb45,
+    (q15_t)0xb90, (q15_t)0xdb4f, (q15_t)0xb89, (q15_t)0xdb59, (q15_t)0xb81, (q15_t)0xdb64, (q15_t)0xb7a, (q15_t)0xdb6e,
+    (q15_t)0xb73, (q15_t)0xdb78, (q15_t)0xb6c, (q15_t)0xdb83, (q15_t)0xb65, (q15_t)0xdb8d, (q15_t)0xb5e, (q15_t)0xdb97,
+    (q15_t)0xb56, (q15_t)0xdba2, (q15_t)0xb4f, (q15_t)0xdbac, (q15_t)0xb48, (q15_t)0xdbb6, (q15_t)0xb41, (q15_t)0xdbc1,
+    (q15_t)0xb3a, (q15_t)0xdbcb, (q15_t)0xb33, (q15_t)0xdbd5, (q15_t)0xb2c, (q15_t)0xdbe0, (q15_t)0xb25, (q15_t)0xdbea,
+    (q15_t)0xb1e, (q15_t)0xdbf5, (q15_t)0xb16, (q15_t)0xdbff, (q15_t)0xb0f, (q15_t)0xdc09, (q15_t)0xb08, (q15_t)0xdc14,
+    (q15_t)0xb01, (q15_t)0xdc1e, (q15_t)0xafa, (q15_t)0xdc29, (q15_t)0xaf3, (q15_t)0xdc33, (q15_t)0xaec, (q15_t)0xdc3d,
+    (q15_t)0xae5, (q15_t)0xdc48, (q15_t)0xade, (q15_t)0xdc52, (q15_t)0xad7, (q15_t)0xdc5d, (q15_t)0xad0, (q15_t)0xdc67,
+    (q15_t)0xac9, (q15_t)0xdc72, (q15_t)0xac2, (q15_t)0xdc7c, (q15_t)0xabb, (q15_t)0xdc86, (q15_t)0xab4, (q15_t)0xdc91,
+    (q15_t)0xaad, (q15_t)0xdc9b, (q15_t)0xaa6, (q15_t)0xdca6, (q15_t)0xa9f, (q15_t)0xdcb0, (q15_t)0xa99, (q15_t)0xdcbb,
+    (q15_t)0xa92, (q15_t)0xdcc5, (q15_t)0xa8b, (q15_t)0xdcd0, (q15_t)0xa84, (q15_t)0xdcda, (q15_t)0xa7d, (q15_t)0xdce5,
+    (q15_t)0xa76, (q15_t)0xdcef, (q15_t)0xa6f, (q15_t)0xdcfa, (q15_t)0xa68, (q15_t)0xdd04, (q15_t)0xa61, (q15_t)0xdd0f,
+    (q15_t)0xa5b, (q15_t)0xdd19, (q15_t)0xa54, (q15_t)0xdd24, (q15_t)0xa4d, (q15_t)0xdd2e, (q15_t)0xa46, (q15_t)0xdd39,
+    (q15_t)0xa3f, (q15_t)0xdd44, (q15_t)0xa38, (q15_t)0xdd4e, (q15_t)0xa32, (q15_t)0xdd59, (q15_t)0xa2b, (q15_t)0xdd63,
+    (q15_t)0xa24, (q15_t)0xdd6e, (q15_t)0xa1d, (q15_t)0xdd78, (q15_t)0xa16, (q15_t)0xdd83, (q15_t)0xa10, (q15_t)0xdd8e,
+    (q15_t)0xa09, (q15_t)0xdd98, (q15_t)0xa02, (q15_t)0xdda3, (q15_t)0x9fb, (q15_t)0xddad, (q15_t)0x9f5, (q15_t)0xddb8,
+    (q15_t)0x9ee, (q15_t)0xddc3, (q15_t)0x9e7, (q15_t)0xddcd, (q15_t)0x9e0, (q15_t)0xddd8, (q15_t)0x9da, (q15_t)0xdde2,
+    (q15_t)0x9d3, (q15_t)0xdded, (q15_t)0x9cc, (q15_t)0xddf8, (q15_t)0x9c6, (q15_t)0xde02, (q15_t)0x9bf, (q15_t)0xde0d,
+    (q15_t)0x9b8, (q15_t)0xde18, (q15_t)0x9b2, (q15_t)0xde22, (q15_t)0x9ab, (q15_t)0xde2d, (q15_t)0x9a4, (q15_t)0xde38,
+    (q15_t)0x99e, (q15_t)0xde42, (q15_t)0x997, (q15_t)0xde4d, (q15_t)0x991, (q15_t)0xde58, (q15_t)0x98a, (q15_t)0xde62,
+    (q15_t)0x983, (q15_t)0xde6d, (q15_t)0x97d, (q15_t)0xde78, (q15_t)0x976, (q15_t)0xde83, (q15_t)0x970, (q15_t)0xde8d,
+    (q15_t)0x969, (q15_t)0xde98, (q15_t)0x963, (q15_t)0xdea3, (q15_t)0x95c, (q15_t)0xdead, (q15_t)0x955, (q15_t)0xdeb8,
+    (q15_t)0x94f, (q15_t)0xdec3, (q15_t)0x948, (q15_t)0xdece, (q15_t)0x942, (q15_t)0xded8, (q15_t)0x93b, (q15_t)0xdee3,
+    (q15_t)0x935, (q15_t)0xdeee, (q15_t)0x92e, (q15_t)0xdef9, (q15_t)0x928, (q15_t)0xdf03, (q15_t)0x921, (q15_t)0xdf0e,
+    (q15_t)0x91b, (q15_t)0xdf19, (q15_t)0x915, (q15_t)0xdf24, (q15_t)0x90e, (q15_t)0xdf2f, (q15_t)0x908, (q15_t)0xdf39,
+    (q15_t)0x901, (q15_t)0xdf44, (q15_t)0x8fb, (q15_t)0xdf4f, (q15_t)0x8f4, (q15_t)0xdf5a, (q15_t)0x8ee, (q15_t)0xdf65,
+    (q15_t)0x8e8, (q15_t)0xdf6f, (q15_t)0x8e1, (q15_t)0xdf7a, (q15_t)0x8db, (q15_t)0xdf85, (q15_t)0x8d4, (q15_t)0xdf90,
+    (q15_t)0x8ce, (q15_t)0xdf9b, (q15_t)0x8c8, (q15_t)0xdfa5, (q15_t)0x8c1, (q15_t)0xdfb0, (q15_t)0x8bb, (q15_t)0xdfbb,
+    (q15_t)0x8b5, (q15_t)0xdfc6, (q15_t)0x8ae, (q15_t)0xdfd1, (q15_t)0x8a8, (q15_t)0xdfdc, (q15_t)0x8a2, (q15_t)0xdfe7,
+    (q15_t)0x89b, (q15_t)0xdff1, (q15_t)0x895, (q15_t)0xdffc, (q15_t)0x88f, (q15_t)0xe007, (q15_t)0x889, (q15_t)0xe012,
+    (q15_t)0x882, (q15_t)0xe01d, (q15_t)0x87c, (q15_t)0xe028, (q15_t)0x876, (q15_t)0xe033, (q15_t)0x870, (q15_t)0xe03e,
+    (q15_t)0x869, (q15_t)0xe049, (q15_t)0x863, (q15_t)0xe054, (q15_t)0x85d, (q15_t)0xe05e, (q15_t)0x857, (q15_t)0xe069,
+    (q15_t)0x850, (q15_t)0xe074, (q15_t)0x84a, (q15_t)0xe07f, (q15_t)0x844, (q15_t)0xe08a, (q15_t)0x83e, (q15_t)0xe095,
+    (q15_t)0x838, (q15_t)0xe0a0, (q15_t)0x832, (q15_t)0xe0ab, (q15_t)0x82b, (q15_t)0xe0b6, (q15_t)0x825, (q15_t)0xe0c1,
+    (q15_t)0x81f, (q15_t)0xe0cc, (q15_t)0x819, (q15_t)0xe0d7, (q15_t)0x813, (q15_t)0xe0e2, (q15_t)0x80d, (q15_t)0xe0ed,
+    (q15_t)0x807, (q15_t)0xe0f8, (q15_t)0x801, (q15_t)0xe103, (q15_t)0x7fb, (q15_t)0xe10e, (q15_t)0x7f5, (q15_t)0xe119,
+    (q15_t)0x7ee, (q15_t)0xe124, (q15_t)0x7e8, (q15_t)0xe12f, (q15_t)0x7e2, (q15_t)0xe13a, (q15_t)0x7dc, (q15_t)0xe145,
+    (q15_t)0x7d6, (q15_t)0xe150, (q15_t)0x7d0, (q15_t)0xe15b, (q15_t)0x7ca, (q15_t)0xe166, (q15_t)0x7c4, (q15_t)0xe171,
+    (q15_t)0x7be, (q15_t)0xe17c, (q15_t)0x7b8, (q15_t)0xe187, (q15_t)0x7b2, (q15_t)0xe192, (q15_t)0x7ac, (q15_t)0xe19d,
+    (q15_t)0x7a6, (q15_t)0xe1a8, (q15_t)0x7a0, (q15_t)0xe1b3, (q15_t)0x79a, (q15_t)0xe1be, (q15_t)0x795, (q15_t)0xe1ca,
+    (q15_t)0x78f, (q15_t)0xe1d5, (q15_t)0x789, (q15_t)0xe1e0, (q15_t)0x783, (q15_t)0xe1eb, (q15_t)0x77d, (q15_t)0xe1f6,
+    (q15_t)0x777, (q15_t)0xe201, (q15_t)0x771, (q15_t)0xe20c, (q15_t)0x76b, (q15_t)0xe217, (q15_t)0x765, (q15_t)0xe222,
+    (q15_t)0x75f, (q15_t)0xe22d, (q15_t)0x75a, (q15_t)0xe239, (q15_t)0x754, (q15_t)0xe244, (q15_t)0x74e, (q15_t)0xe24f,
+    (q15_t)0x748, (q15_t)0xe25a, (q15_t)0x742, (q15_t)0xe265, (q15_t)0x73d, (q15_t)0xe270, (q15_t)0x737, (q15_t)0xe27b,
+    (q15_t)0x731, (q15_t)0xe287, (q15_t)0x72b, (q15_t)0xe292, (q15_t)0x725, (q15_t)0xe29d, (q15_t)0x720, (q15_t)0xe2a8,
+    (q15_t)0x71a, (q15_t)0xe2b3, (q15_t)0x714, (q15_t)0xe2be, (q15_t)0x70e, (q15_t)0xe2ca, (q15_t)0x709, (q15_t)0xe2d5,
+    (q15_t)0x703, (q15_t)0xe2e0, (q15_t)0x6fd, (q15_t)0xe2eb, (q15_t)0x6f7, (q15_t)0xe2f6, (q15_t)0x6f2, (q15_t)0xe301,
+    (q15_t)0x6ec, (q15_t)0xe30d, (q15_t)0x6e6, (q15_t)0xe318, (q15_t)0x6e1, (q15_t)0xe323, (q15_t)0x6db, (q15_t)0xe32e,
+    (q15_t)0x6d5, (q15_t)0xe33a, (q15_t)0x6d0, (q15_t)0xe345, (q15_t)0x6ca, (q15_t)0xe350, (q15_t)0x6c5, (q15_t)0xe35b,
+    (q15_t)0x6bf, (q15_t)0xe367, (q15_t)0x6b9, (q15_t)0xe372, (q15_t)0x6b4, (q15_t)0xe37d, (q15_t)0x6ae, (q15_t)0xe388,
+    (q15_t)0x6a8, (q15_t)0xe394, (q15_t)0x6a3, (q15_t)0xe39f, (q15_t)0x69d, (q15_t)0xe3aa, (q15_t)0x698, (q15_t)0xe3b5,
+    (q15_t)0x692, (q15_t)0xe3c1, (q15_t)0x68d, (q15_t)0xe3cc, (q15_t)0x687, (q15_t)0xe3d7, (q15_t)0x682, (q15_t)0xe3e2,
+    (q15_t)0x67c, (q15_t)0xe3ee, (q15_t)0x677, (q15_t)0xe3f9, (q15_t)0x671, (q15_t)0xe404, (q15_t)0x66c, (q15_t)0xe410,
+    (q15_t)0x666, (q15_t)0xe41b, (q15_t)0x661, (q15_t)0xe426, (q15_t)0x65b, (q15_t)0xe432, (q15_t)0x656, (q15_t)0xe43d,
+    (q15_t)0x650, (q15_t)0xe448, (q15_t)0x64b, (q15_t)0xe454, (q15_t)0x645, (q15_t)0xe45f, (q15_t)0x640, (q15_t)0xe46a,
+    (q15_t)0x63b, (q15_t)0xe476, (q15_t)0x635, (q15_t)0xe481, (q15_t)0x630, (q15_t)0xe48c, (q15_t)0x62a, (q15_t)0xe498,
+    (q15_t)0x625, (q15_t)0xe4a3, (q15_t)0x620, (q15_t)0xe4ae, (q15_t)0x61a, (q15_t)0xe4ba, (q15_t)0x615, (q15_t)0xe4c5,
+    (q15_t)0x610, (q15_t)0xe4d0, (q15_t)0x60a, (q15_t)0xe4dc, (q15_t)0x605, (q15_t)0xe4e7, (q15_t)0x600, (q15_t)0xe4f3,
+    (q15_t)0x5fa, (q15_t)0xe4fe, (q15_t)0x5f5, (q15_t)0xe509, (q15_t)0x5f0, (q15_t)0xe515, (q15_t)0x5ea, (q15_t)0xe520,
+    (q15_t)0x5e5, (q15_t)0xe52c, (q15_t)0x5e0, (q15_t)0xe537, (q15_t)0x5db, (q15_t)0xe542, (q15_t)0x5d5, (q15_t)0xe54e,
+    (q15_t)0x5d0, (q15_t)0xe559, (q15_t)0x5cb, (q15_t)0xe565, (q15_t)0x5c6, (q15_t)0xe570, (q15_t)0x5c1, (q15_t)0xe57c,
+    (q15_t)0x5bb, (q15_t)0xe587, (q15_t)0x5b6, (q15_t)0xe592, (q15_t)0x5b1, (q15_t)0xe59e, (q15_t)0x5ac, (q15_t)0xe5a9,
+    (q15_t)0x5a7, (q15_t)0xe5b5, (q15_t)0x5a1, (q15_t)0xe5c0, (q15_t)0x59c, (q15_t)0xe5cc, (q15_t)0x597, (q15_t)0xe5d7,
+    (q15_t)0x592, (q15_t)0xe5e3, (q15_t)0x58d, (q15_t)0xe5ee, (q15_t)0x588, (q15_t)0xe5fa, (q15_t)0x583, (q15_t)0xe605,
+    (q15_t)0x57e, (q15_t)0xe611, (q15_t)0x578, (q15_t)0xe61c, (q15_t)0x573, (q15_t)0xe628, (q15_t)0x56e, (q15_t)0xe633,
+    (q15_t)0x569, (q15_t)0xe63f, (q15_t)0x564, (q15_t)0xe64a, (q15_t)0x55f, (q15_t)0xe656, (q15_t)0x55a, (q15_t)0xe661,
+    (q15_t)0x555, (q15_t)0xe66d, (q15_t)0x550, (q15_t)0xe678, (q15_t)0x54b, (q15_t)0xe684, (q15_t)0x546, (q15_t)0xe68f,
+    (q15_t)0x541, (q15_t)0xe69b, (q15_t)0x53c, (q15_t)0xe6a6, (q15_t)0x537, (q15_t)0xe6b2, (q15_t)0x532, (q15_t)0xe6bd,
+    (q15_t)0x52d, (q15_t)0xe6c9, (q15_t)0x528, (q15_t)0xe6d4, (q15_t)0x523, (q15_t)0xe6e0, (q15_t)0x51e, (q15_t)0xe6ec,
+    (q15_t)0x51a, (q15_t)0xe6f7, (q15_t)0x515, (q15_t)0xe703, (q15_t)0x510, (q15_t)0xe70e, (q15_t)0x50b, (q15_t)0xe71a,
+    (q15_t)0x506, (q15_t)0xe725, (q15_t)0x501, (q15_t)0xe731, (q15_t)0x4fc, (q15_t)0xe73d, (q15_t)0x4f7, (q15_t)0xe748,
+    (q15_t)0x4f2, (q15_t)0xe754, (q15_t)0x4ee, (q15_t)0xe75f, (q15_t)0x4e9, (q15_t)0xe76b, (q15_t)0x4e4, (q15_t)0xe777,
+    (q15_t)0x4df, (q15_t)0xe782, (q15_t)0x4da, (q15_t)0xe78e, (q15_t)0x4d6, (q15_t)0xe799, (q15_t)0x4d1, (q15_t)0xe7a5,
+    (q15_t)0x4cc, (q15_t)0xe7b1, (q15_t)0x4c7, (q15_t)0xe7bc, (q15_t)0x4c2, (q15_t)0xe7c8, (q15_t)0x4be, (q15_t)0xe7d3,
+    (q15_t)0x4b9, (q15_t)0xe7df, (q15_t)0x4b4, (q15_t)0xe7eb, (q15_t)0x4b0, (q15_t)0xe7f6, (q15_t)0x4ab, (q15_t)0xe802,
+    (q15_t)0x4a6, (q15_t)0xe80e, (q15_t)0x4a1, (q15_t)0xe819, (q15_t)0x49d, (q15_t)0xe825, (q15_t)0x498, (q15_t)0xe831,
+    (q15_t)0x493, (q15_t)0xe83c, (q15_t)0x48f, (q15_t)0xe848, (q15_t)0x48a, (q15_t)0xe854, (q15_t)0x485, (q15_t)0xe85f,
+    (q15_t)0x481, (q15_t)0xe86b, (q15_t)0x47c, (q15_t)0xe877, (q15_t)0x478, (q15_t)0xe882, (q15_t)0x473, (q15_t)0xe88e,
+    (q15_t)0x46e, (q15_t)0xe89a, (q15_t)0x46a, (q15_t)0xe8a5, (q15_t)0x465, (q15_t)0xe8b1, (q15_t)0x461, (q15_t)0xe8bd,
+    (q15_t)0x45c, (q15_t)0xe8c9, (q15_t)0x457, (q15_t)0xe8d4, (q15_t)0x453, (q15_t)0xe8e0, (q15_t)0x44e, (q15_t)0xe8ec,
+    (q15_t)0x44a, (q15_t)0xe8f7, (q15_t)0x445, (q15_t)0xe903, (q15_t)0x441, (q15_t)0xe90f, (q15_t)0x43c, (q15_t)0xe91b,
+    (q15_t)0x438, (q15_t)0xe926, (q15_t)0x433, (q15_t)0xe932, (q15_t)0x42f, (q15_t)0xe93e, (q15_t)0x42a, (q15_t)0xe94a,
+    (q15_t)0x426, (q15_t)0xe955, (q15_t)0x422, (q15_t)0xe961, (q15_t)0x41d, (q15_t)0xe96d, (q15_t)0x419, (q15_t)0xe979,
+    (q15_t)0x414, (q15_t)0xe984, (q15_t)0x410, (q15_t)0xe990, (q15_t)0x40b, (q15_t)0xe99c, (q15_t)0x407, (q15_t)0xe9a8,
+    (q15_t)0x403, (q15_t)0xe9b4, (q15_t)0x3fe, (q15_t)0xe9bf, (q15_t)0x3fa, (q15_t)0xe9cb, (q15_t)0x3f6, (q15_t)0xe9d7,
+    (q15_t)0x3f1, (q15_t)0xe9e3, (q15_t)0x3ed, (q15_t)0xe9ee, (q15_t)0x3e9, (q15_t)0xe9fa, (q15_t)0x3e4, (q15_t)0xea06,
+    (q15_t)0x3e0, (q15_t)0xea12, (q15_t)0x3dc, (q15_t)0xea1e, (q15_t)0x3d7, (q15_t)0xea29, (q15_t)0x3d3, (q15_t)0xea35,
+    (q15_t)0x3cf, (q15_t)0xea41, (q15_t)0x3ca, (q15_t)0xea4d, (q15_t)0x3c6, (q15_t)0xea59, (q15_t)0x3c2, (q15_t)0xea65,
+    (q15_t)0x3be, (q15_t)0xea70, (q15_t)0x3ba, (q15_t)0xea7c, (q15_t)0x3b5, (q15_t)0xea88, (q15_t)0x3b1, (q15_t)0xea94,
+    (q15_t)0x3ad, (q15_t)0xeaa0, (q15_t)0x3a9, (q15_t)0xeaac, (q15_t)0x3a5, (q15_t)0xeab7, (q15_t)0x3a0, (q15_t)0xeac3,
+    (q15_t)0x39c, (q15_t)0xeacf, (q15_t)0x398, (q15_t)0xeadb, (q15_t)0x394, (q15_t)0xeae7, (q15_t)0x390, (q15_t)0xeaf3,
+    (q15_t)0x38c, (q15_t)0xeaff, (q15_t)0x387, (q15_t)0xeb0a, (q15_t)0x383, (q15_t)0xeb16, (q15_t)0x37f, (q15_t)0xeb22,
+    (q15_t)0x37b, (q15_t)0xeb2e, (q15_t)0x377, (q15_t)0xeb3a, (q15_t)0x373, (q15_t)0xeb46, (q15_t)0x36f, (q15_t)0xeb52,
+    (q15_t)0x36b, (q15_t)0xeb5e, (q15_t)0x367, (q15_t)0xeb6a, (q15_t)0x363, (q15_t)0xeb75, (q15_t)0x35f, (q15_t)0xeb81,
+    (q15_t)0x35b, (q15_t)0xeb8d, (q15_t)0x357, (q15_t)0xeb99, (q15_t)0x353, (q15_t)0xeba5, (q15_t)0x34f, (q15_t)0xebb1,
+    (q15_t)0x34b, (q15_t)0xebbd, (q15_t)0x347, (q15_t)0xebc9, (q15_t)0x343, (q15_t)0xebd5, (q15_t)0x33f, (q15_t)0xebe1,
+    (q15_t)0x33b, (q15_t)0xebed, (q15_t)0x337, (q15_t)0xebf9, (q15_t)0x333, (q15_t)0xec05, (q15_t)0x32f, (q15_t)0xec10,
+    (q15_t)0x32b, (q15_t)0xec1c, (q15_t)0x327, (q15_t)0xec28, (q15_t)0x323, (q15_t)0xec34, (q15_t)0x320, (q15_t)0xec40,
+    (q15_t)0x31c, (q15_t)0xec4c, (q15_t)0x318, (q15_t)0xec58, (q15_t)0x314, (q15_t)0xec64, (q15_t)0x310, (q15_t)0xec70,
+    (q15_t)0x30c, (q15_t)0xec7c, (q15_t)0x308, (q15_t)0xec88, (q15_t)0x305, (q15_t)0xec94, (q15_t)0x301, (q15_t)0xeca0,
+    (q15_t)0x2fd, (q15_t)0xecac, (q15_t)0x2f9, (q15_t)0xecb8, (q15_t)0x2f5, (q15_t)0xecc4, (q15_t)0x2f2, (q15_t)0xecd0,
+    (q15_t)0x2ee, (q15_t)0xecdc, (q15_t)0x2ea, (q15_t)0xece8, (q15_t)0x2e6, (q15_t)0xecf4, (q15_t)0x2e3, (q15_t)0xed00,
+    (q15_t)0x2df, (q15_t)0xed0c, (q15_t)0x2db, (q15_t)0xed18, (q15_t)0x2d8, (q15_t)0xed24, (q15_t)0x2d4, (q15_t)0xed30,
+    (q15_t)0x2d0, (q15_t)0xed3c, (q15_t)0x2cc, (q15_t)0xed48, (q15_t)0x2c9, (q15_t)0xed54, (q15_t)0x2c5, (q15_t)0xed60,
+    (q15_t)0x2c1, (q15_t)0xed6c, (q15_t)0x2be, (q15_t)0xed78, (q15_t)0x2ba, (q15_t)0xed84, (q15_t)0x2b7, (q15_t)0xed90,
+    (q15_t)0x2b3, (q15_t)0xed9c, (q15_t)0x2af, (q15_t)0xeda8, (q15_t)0x2ac, (q15_t)0xedb4, (q15_t)0x2a8, (q15_t)0xedc0,
+    (q15_t)0x2a5, (q15_t)0xedcc, (q15_t)0x2a1, (q15_t)0xedd8, (q15_t)0x29d, (q15_t)0xede4, (q15_t)0x29a, (q15_t)0xedf0,
+    (q15_t)0x296, (q15_t)0xedfc, (q15_t)0x293, (q15_t)0xee09, (q15_t)0x28f, (q15_t)0xee15, (q15_t)0x28c, (q15_t)0xee21,
+    (q15_t)0x288, (q15_t)0xee2d, (q15_t)0x285, (q15_t)0xee39, (q15_t)0x281, (q15_t)0xee45, (q15_t)0x27e, (q15_t)0xee51,
+    (q15_t)0x27a, (q15_t)0xee5d, (q15_t)0x277, (q15_t)0xee69, (q15_t)0x273, (q15_t)0xee75, (q15_t)0x270, (q15_t)0xee81,
+    (q15_t)0x26d, (q15_t)0xee8d, (q15_t)0x269, (q15_t)0xee99, (q15_t)0x266, (q15_t)0xeea6, (q15_t)0x262, (q15_t)0xeeb2,
+    (q15_t)0x25f, (q15_t)0xeebe, (q15_t)0x25c, (q15_t)0xeeca, (q15_t)0x258, (q15_t)0xeed6, (q15_t)0x255, (q15_t)0xeee2,
+    (q15_t)0x251, (q15_t)0xeeee, (q15_t)0x24e, (q15_t)0xeefa, (q15_t)0x24b, (q15_t)0xef06, (q15_t)0x247, (q15_t)0xef13,
+    (q15_t)0x244, (q15_t)0xef1f, (q15_t)0x241, (q15_t)0xef2b, (q15_t)0x23e, (q15_t)0xef37, (q15_t)0x23a, (q15_t)0xef43,
+    (q15_t)0x237, (q15_t)0xef4f, (q15_t)0x234, (q15_t)0xef5b, (q15_t)0x230, (q15_t)0xef67, (q15_t)0x22d, (q15_t)0xef74,
+    (q15_t)0x22a, (q15_t)0xef80, (q15_t)0x227, (q15_t)0xef8c, (q15_t)0x223, (q15_t)0xef98, (q15_t)0x220, (q15_t)0xefa4,
+    (q15_t)0x21d, (q15_t)0xefb0, (q15_t)0x21a, (q15_t)0xefbc, (q15_t)0x217, (q15_t)0xefc9, (q15_t)0x213, (q15_t)0xefd5,
+    (q15_t)0x210, (q15_t)0xefe1, (q15_t)0x20d, (q15_t)0xefed, (q15_t)0x20a, (q15_t)0xeff9, (q15_t)0x207, (q15_t)0xf005,
+    (q15_t)0x204, (q15_t)0xf012, (q15_t)0x201, (q15_t)0xf01e, (q15_t)0x1fd, (q15_t)0xf02a, (q15_t)0x1fa, (q15_t)0xf036,
+    (q15_t)0x1f7, (q15_t)0xf042, (q15_t)0x1f4, (q15_t)0xf04e, (q15_t)0x1f1, (q15_t)0xf05b, (q15_t)0x1ee, (q15_t)0xf067,
+    (q15_t)0x1eb, (q15_t)0xf073, (q15_t)0x1e8, (q15_t)0xf07f, (q15_t)0x1e5, (q15_t)0xf08b, (q15_t)0x1e2, (q15_t)0xf098,
+    (q15_t)0x1df, (q15_t)0xf0a4, (q15_t)0x1dc, (q15_t)0xf0b0, (q15_t)0x1d9, (q15_t)0xf0bc, (q15_t)0x1d6, (q15_t)0xf0c8,
+    (q15_t)0x1d3, (q15_t)0xf0d5, (q15_t)0x1d0, (q15_t)0xf0e1, (q15_t)0x1cd, (q15_t)0xf0ed, (q15_t)0x1ca, (q15_t)0xf0f9,
+    (q15_t)0x1c7, (q15_t)0xf105, (q15_t)0x1c4, (q15_t)0xf112, (q15_t)0x1c1, (q15_t)0xf11e, (q15_t)0x1be, (q15_t)0xf12a,
+    (q15_t)0x1bb, (q15_t)0xf136, (q15_t)0x1b8, (q15_t)0xf143, (q15_t)0x1b6, (q15_t)0xf14f, (q15_t)0x1b3, (q15_t)0xf15b,
+    (q15_t)0x1b0, (q15_t)0xf167, (q15_t)0x1ad, (q15_t)0xf174, (q15_t)0x1aa, (q15_t)0xf180, (q15_t)0x1a7, (q15_t)0xf18c,
+    (q15_t)0x1a4, (q15_t)0xf198, (q15_t)0x1a2, (q15_t)0xf1a4, (q15_t)0x19f, (q15_t)0xf1b1, (q15_t)0x19c, (q15_t)0xf1bd,
+    (q15_t)0x199, (q15_t)0xf1c9, (q15_t)0x196, (q15_t)0xf1d5, (q15_t)0x194, (q15_t)0xf1e2, (q15_t)0x191, (q15_t)0xf1ee,
+    (q15_t)0x18e, (q15_t)0xf1fa, (q15_t)0x18b, (q15_t)0xf207, (q15_t)0x189, (q15_t)0xf213, (q15_t)0x186, (q15_t)0xf21f,
+    (q15_t)0x183, (q15_t)0xf22b, (q15_t)0x180, (q15_t)0xf238, (q15_t)0x17e, (q15_t)0xf244, (q15_t)0x17b, (q15_t)0xf250,
+    (q15_t)0x178, (q15_t)0xf25c, (q15_t)0x176, (q15_t)0xf269, (q15_t)0x173, (q15_t)0xf275, (q15_t)0x170, (q15_t)0xf281,
+    (q15_t)0x16e, (q15_t)0xf28e, (q15_t)0x16b, (q15_t)0xf29a, (q15_t)0x168, (q15_t)0xf2a6, (q15_t)0x166, (q15_t)0xf2b2,
+    (q15_t)0x163, (q15_t)0xf2bf, (q15_t)0x161, (q15_t)0xf2cb, (q15_t)0x15e, (q15_t)0xf2d7, (q15_t)0x15b, (q15_t)0xf2e4,
+    (q15_t)0x159, (q15_t)0xf2f0, (q15_t)0x156, (q15_t)0xf2fc, (q15_t)0x154, (q15_t)0xf308, (q15_t)0x151, (q15_t)0xf315,
+    (q15_t)0x14f, (q15_t)0xf321, (q15_t)0x14c, (q15_t)0xf32d, (q15_t)0x14a, (q15_t)0xf33a, (q15_t)0x147, (q15_t)0xf346,
+    (q15_t)0x145, (q15_t)0xf352, (q15_t)0x142, (q15_t)0xf35f, (q15_t)0x140, (q15_t)0xf36b, (q15_t)0x13d, (q15_t)0xf377,
+    (q15_t)0x13b, (q15_t)0xf384, (q15_t)0x138, (q15_t)0xf390, (q15_t)0x136, (q15_t)0xf39c, (q15_t)0x134, (q15_t)0xf3a9,
+    (q15_t)0x131, (q15_t)0xf3b5, (q15_t)0x12f, (q15_t)0xf3c1, (q15_t)0x12c, (q15_t)0xf3ce, (q15_t)0x12a, (q15_t)0xf3da,
+    (q15_t)0x128, (q15_t)0xf3e6, (q15_t)0x125, (q15_t)0xf3f3, (q15_t)0x123, (q15_t)0xf3ff, (q15_t)0x120, (q15_t)0xf40b,
+    (q15_t)0x11e, (q15_t)0xf418, (q15_t)0x11c, (q15_t)0xf424, (q15_t)0x119, (q15_t)0xf430, (q15_t)0x117, (q15_t)0xf43d,
+    (q15_t)0x115, (q15_t)0xf449, (q15_t)0x113, (q15_t)0xf455, (q15_t)0x110, (q15_t)0xf462, (q15_t)0x10e, (q15_t)0xf46e,
+    (q15_t)0x10c, (q15_t)0xf47b, (q15_t)0x109, (q15_t)0xf487, (q15_t)0x107, (q15_t)0xf493, (q15_t)0x105, (q15_t)0xf4a0,
+    (q15_t)0x103, (q15_t)0xf4ac, (q15_t)0x100, (q15_t)0xf4b8, (q15_t)0xfe, (q15_t)0xf4c5, (q15_t)0xfc, (q15_t)0xf4d1,
+    (q15_t)0xfa, (q15_t)0xf4dd, (q15_t)0xf8, (q15_t)0xf4ea, (q15_t)0xf6, (q15_t)0xf4f6, (q15_t)0xf3, (q15_t)0xf503,
+    (q15_t)0xf1, (q15_t)0xf50f, (q15_t)0xef, (q15_t)0xf51b, (q15_t)0xed, (q15_t)0xf528, (q15_t)0xeb, (q15_t)0xf534,
+    (q15_t)0xe9, (q15_t)0xf540, (q15_t)0xe7, (q15_t)0xf54d, (q15_t)0xe4, (q15_t)0xf559, (q15_t)0xe2, (q15_t)0xf566,
+    (q15_t)0xe0, (q15_t)0xf572, (q15_t)0xde, (q15_t)0xf57e, (q15_t)0xdc, (q15_t)0xf58b, (q15_t)0xda, (q15_t)0xf597,
+    (q15_t)0xd8, (q15_t)0xf5a4, (q15_t)0xd6, (q15_t)0xf5b0, (q15_t)0xd4, (q15_t)0xf5bc, (q15_t)0xd2, (q15_t)0xf5c9,
+    (q15_t)0xd0, (q15_t)0xf5d5, (q15_t)0xce, (q15_t)0xf5e2, (q15_t)0xcc, (q15_t)0xf5ee, (q15_t)0xca, (q15_t)0xf5fa,
+    (q15_t)0xc8, (q15_t)0xf607, (q15_t)0xc6, (q15_t)0xf613, (q15_t)0xc4, (q15_t)0xf620, (q15_t)0xc2, (q15_t)0xf62c,
+    (q15_t)0xc0, (q15_t)0xf639, (q15_t)0xbe, (q15_t)0xf645, (q15_t)0xbd, (q15_t)0xf651, (q15_t)0xbb, (q15_t)0xf65e,
+    (q15_t)0xb9, (q15_t)0xf66a, (q15_t)0xb7, (q15_t)0xf677, (q15_t)0xb5, (q15_t)0xf683, (q15_t)0xb3, (q15_t)0xf690,
+    (q15_t)0xb1, (q15_t)0xf69c, (q15_t)0xaf, (q15_t)0xf6a8, (q15_t)0xae, (q15_t)0xf6b5, (q15_t)0xac, (q15_t)0xf6c1,
+    (q15_t)0xaa, (q15_t)0xf6ce, (q15_t)0xa8, (q15_t)0xf6da, (q15_t)0xa6, (q15_t)0xf6e7, (q15_t)0xa5, (q15_t)0xf6f3,
+    (q15_t)0xa3, (q15_t)0xf6ff, (q15_t)0xa1, (q15_t)0xf70c, (q15_t)0x9f, (q15_t)0xf718, (q15_t)0x9e, (q15_t)0xf725,
+    (q15_t)0x9c, (q15_t)0xf731, (q15_t)0x9a, (q15_t)0xf73e, (q15_t)0x98, (q15_t)0xf74a, (q15_t)0x97, (q15_t)0xf757,
+    (q15_t)0x95, (q15_t)0xf763, (q15_t)0x93, (q15_t)0xf76f, (q15_t)0x92, (q15_t)0xf77c, (q15_t)0x90, (q15_t)0xf788,
+    (q15_t)0x8e, (q15_t)0xf795, (q15_t)0x8d, (q15_t)0xf7a1, (q15_t)0x8b, (q15_t)0xf7ae, (q15_t)0x89, (q15_t)0xf7ba,
+    (q15_t)0x88, (q15_t)0xf7c7, (q15_t)0x86, (q15_t)0xf7d3, (q15_t)0x85, (q15_t)0xf7e0, (q15_t)0x83, (q15_t)0xf7ec,
+    (q15_t)0x81, (q15_t)0xf7f9, (q15_t)0x80, (q15_t)0xf805, (q15_t)0x7e, (q15_t)0xf811, (q15_t)0x7d, (q15_t)0xf81e,
+    (q15_t)0x7b, (q15_t)0xf82a, (q15_t)0x7a, (q15_t)0xf837, (q15_t)0x78, (q15_t)0xf843, (q15_t)0x77, (q15_t)0xf850,
+    (q15_t)0x75, (q15_t)0xf85c, (q15_t)0x74, (q15_t)0xf869, (q15_t)0x72, (q15_t)0xf875, (q15_t)0x71, (q15_t)0xf882,
+    (q15_t)0x6f, (q15_t)0xf88e, (q15_t)0x6e, (q15_t)0xf89b, (q15_t)0x6c, (q15_t)0xf8a7, (q15_t)0x6b, (q15_t)0xf8b4,
+    (q15_t)0x69, (q15_t)0xf8c0, (q15_t)0x68, (q15_t)0xf8cd, (q15_t)0x67, (q15_t)0xf8d9, (q15_t)0x65, (q15_t)0xf8e6,
+    (q15_t)0x64, (q15_t)0xf8f2, (q15_t)0x62, (q15_t)0xf8ff, (q15_t)0x61, (q15_t)0xf90b, (q15_t)0x60, (q15_t)0xf918,
+    (q15_t)0x5e, (q15_t)0xf924, (q15_t)0x5d, (q15_t)0xf931, (q15_t)0x5c, (q15_t)0xf93d, (q15_t)0x5a, (q15_t)0xf94a,
+    (q15_t)0x59, (q15_t)0xf956, (q15_t)0x58, (q15_t)0xf963, (q15_t)0x56, (q15_t)0xf96f, (q15_t)0x55, (q15_t)0xf97c,
+    (q15_t)0x54, (q15_t)0xf988, (q15_t)0x53, (q15_t)0xf995, (q15_t)0x51, (q15_t)0xf9a1, (q15_t)0x50, (q15_t)0xf9ae,
+    (q15_t)0x4f, (q15_t)0xf9ba, (q15_t)0x4e, (q15_t)0xf9c7, (q15_t)0x4c, (q15_t)0xf9d3, (q15_t)0x4b, (q15_t)0xf9e0,
+    (q15_t)0x4a, (q15_t)0xf9ec, (q15_t)0x49, (q15_t)0xf9f9, (q15_t)0x48, (q15_t)0xfa05, (q15_t)0x47, (q15_t)0xfa12,
+    (q15_t)0x45, (q15_t)0xfa1e, (q15_t)0x44, (q15_t)0xfa2b, (q15_t)0x43, (q15_t)0xfa37, (q15_t)0x42, (q15_t)0xfa44,
+    (q15_t)0x41, (q15_t)0xfa50, (q15_t)0x40, (q15_t)0xfa5d, (q15_t)0x3f, (q15_t)0xfa69, (q15_t)0x3d, (q15_t)0xfa76,
+    (q15_t)0x3c, (q15_t)0xfa82, (q15_t)0x3b, (q15_t)0xfa8f, (q15_t)0x3a, (q15_t)0xfa9b, (q15_t)0x39, (q15_t)0xfaa8,
+    (q15_t)0x38, (q15_t)0xfab4, (q15_t)0x37, (q15_t)0xfac1, (q15_t)0x36, (q15_t)0xfacd, (q15_t)0x35, (q15_t)0xfada,
+    (q15_t)0x34, (q15_t)0xfae6, (q15_t)0x33, (q15_t)0xfaf3, (q15_t)0x32, (q15_t)0xfb00, (q15_t)0x31, (q15_t)0xfb0c,
+    (q15_t)0x30, (q15_t)0xfb19, (q15_t)0x2f, (q15_t)0xfb25, (q15_t)0x2e, (q15_t)0xfb32, (q15_t)0x2d, (q15_t)0xfb3e,
+    (q15_t)0x2c, (q15_t)0xfb4b, (q15_t)0x2b, (q15_t)0xfb57, (q15_t)0x2b, (q15_t)0xfb64, (q15_t)0x2a, (q15_t)0xfb70,
+    (q15_t)0x29, (q15_t)0xfb7d, (q15_t)0x28, (q15_t)0xfb89, (q15_t)0x27, (q15_t)0xfb96, (q15_t)0x26, (q15_t)0xfba2,
+    (q15_t)0x25, (q15_t)0xfbaf, (q15_t)0x24, (q15_t)0xfbbc, (q15_t)0x24, (q15_t)0xfbc8, (q15_t)0x23, (q15_t)0xfbd5,
+    (q15_t)0x22, (q15_t)0xfbe1, (q15_t)0x21, (q15_t)0xfbee, (q15_t)0x20, (q15_t)0xfbfa, (q15_t)0x20, (q15_t)0xfc07,
+    (q15_t)0x1f, (q15_t)0xfc13, (q15_t)0x1e, (q15_t)0xfc20, (q15_t)0x1d, (q15_t)0xfc2c, (q15_t)0x1d, (q15_t)0xfc39,
+    (q15_t)0x1c, (q15_t)0xfc45, (q15_t)0x1b, (q15_t)0xfc52, (q15_t)0x1a, (q15_t)0xfc5f, (q15_t)0x1a, (q15_t)0xfc6b,
+    (q15_t)0x19, (q15_t)0xfc78, (q15_t)0x18, (q15_t)0xfc84, (q15_t)0x18, (q15_t)0xfc91, (q15_t)0x17, (q15_t)0xfc9d,
+    (q15_t)0x16, (q15_t)0xfcaa, (q15_t)0x16, (q15_t)0xfcb6, (q15_t)0x15, (q15_t)0xfcc3, (q15_t)0x14, (q15_t)0xfcd0,
+    (q15_t)0x14, (q15_t)0xfcdc, (q15_t)0x13, (q15_t)0xfce9, (q15_t)0x13, (q15_t)0xfcf5, (q15_t)0x12, (q15_t)0xfd02,
+    (q15_t)0x11, (q15_t)0xfd0e, (q15_t)0x11, (q15_t)0xfd1b, (q15_t)0x10, (q15_t)0xfd27, (q15_t)0x10, (q15_t)0xfd34,
+    (q15_t)0xf, (q15_t)0xfd40, (q15_t)0xf, (q15_t)0xfd4d, (q15_t)0xe, (q15_t)0xfd5a, (q15_t)0xe, (q15_t)0xfd66,
+    (q15_t)0xd, (q15_t)0xfd73, (q15_t)0xd, (q15_t)0xfd7f, (q15_t)0xc, (q15_t)0xfd8c, (q15_t)0xc, (q15_t)0xfd98,
+    (q15_t)0xb, (q15_t)0xfda5, (q15_t)0xb, (q15_t)0xfdb2, (q15_t)0xa, (q15_t)0xfdbe, (q15_t)0xa, (q15_t)0xfdcb,
+    (q15_t)0x9, (q15_t)0xfdd7, (q15_t)0x9, (q15_t)0xfde4, (q15_t)0x9, (q15_t)0xfdf0, (q15_t)0x8, (q15_t)0xfdfd,
+    (q15_t)0x8, (q15_t)0xfe09, (q15_t)0x7, (q15_t)0xfe16, (q15_t)0x7, (q15_t)0xfe23, (q15_t)0x7, (q15_t)0xfe2f,
+    (q15_t)0x6, (q15_t)0xfe3c, (q15_t)0x6, (q15_t)0xfe48, (q15_t)0x6, (q15_t)0xfe55, (q15_t)0x5, (q15_t)0xfe61,
+    (q15_t)0x5, (q15_t)0xfe6e, (q15_t)0x5, (q15_t)0xfe7a, (q15_t)0x4, (q15_t)0xfe87, (q15_t)0x4, (q15_t)0xfe94,
+    (q15_t)0x4, (q15_t)0xfea0, (q15_t)0x4, (q15_t)0xfead, (q15_t)0x3, (q15_t)0xfeb9, (q15_t)0x3, (q15_t)0xfec6,
+    (q15_t)0x3, (q15_t)0xfed2, (q15_t)0x3, (q15_t)0xfedf, (q15_t)0x2, (q15_t)0xfeec, (q15_t)0x2, (q15_t)0xfef8,
+    (q15_t)0x2, (q15_t)0xff05, (q15_t)0x2, (q15_t)0xff11, (q15_t)0x2, (q15_t)0xff1e, (q15_t)0x1, (q15_t)0xff2a,
+    (q15_t)0x1, (q15_t)0xff37, (q15_t)0x1, (q15_t)0xff44, (q15_t)0x1, (q15_t)0xff50, (q15_t)0x1, (q15_t)0xff5d,
+    (q15_t)0x1, (q15_t)0xff69, (q15_t)0x1, (q15_t)0xff76, (q15_t)0x0, (q15_t)0xff82, (q15_t)0x0, (q15_t)0xff8f,
+    (q15_t)0x0, (q15_t)0xff9b, (q15_t)0x0, (q15_t)0xffa8, (q15_t)0x0, (q15_t)0xffb5, (q15_t)0x0, (q15_t)0xffc1,
+    (q15_t)0x0, (q15_t)0xffce, (q15_t)0x0, (q15_t)0xffda, (q15_t)0x0, (q15_t)0xffe7, (q15_t)0x0, (q15_t)0xfff3,
+    (q15_t)0x0, (q15_t)0x0, (q15_t)0x0, (q15_t)0xd, (q15_t)0x0, (q15_t)0x19, (q15_t)0x0, (q15_t)0x26,
+    (q15_t)0x0, (q15_t)0x32, (q15_t)0x0, (q15_t)0x3f, (q15_t)0x0, (q15_t)0x4b, (q15_t)0x0, (q15_t)0x58,
+    (q15_t)0x0, (q15_t)0x65, (q15_t)0x0, (q15_t)0x71, (q15_t)0x0, (q15_t)0x7e, (q15_t)0x1, (q15_t)0x8a,
+    (q15_t)0x1, (q15_t)0x97, (q15_t)0x1, (q15_t)0xa3, (q15_t)0x1, (q15_t)0xb0, (q15_t)0x1, (q15_t)0xbc,
+    (q15_t)0x1, (q15_t)0xc9, (q15_t)0x1, (q15_t)0xd6, (q15_t)0x2, (q15_t)0xe2, (q15_t)0x2, (q15_t)0xef,
+    (q15_t)0x2, (q15_t)0xfb, (q15_t)0x2, (q15_t)0x108, (q15_t)0x2, (q15_t)0x114, (q15_t)0x3, (q15_t)0x121,
+    (q15_t)0x3, (q15_t)0x12e, (q15_t)0x3, (q15_t)0x13a, (q15_t)0x3, (q15_t)0x147, (q15_t)0x4, (q15_t)0x153,
+    (q15_t)0x4, (q15_t)0x160, (q15_t)0x4, (q15_t)0x16c, (q15_t)0x4, (q15_t)0x179, (q15_t)0x5, (q15_t)0x186,
+    (q15_t)0x5, (q15_t)0x192, (q15_t)0x5, (q15_t)0x19f, (q15_t)0x6, (q15_t)0x1ab, (q15_t)0x6, (q15_t)0x1b8,
+    (q15_t)0x6, (q15_t)0x1c4, (q15_t)0x7, (q15_t)0x1d1, (q15_t)0x7, (q15_t)0x1dd, (q15_t)0x7, (q15_t)0x1ea,
+    (q15_t)0x8, (q15_t)0x1f7, (q15_t)0x8, (q15_t)0x203, (q15_t)0x9, (q15_t)0x210, (q15_t)0x9, (q15_t)0x21c,
+    (q15_t)0x9, (q15_t)0x229, (q15_t)0xa, (q15_t)0x235, (q15_t)0xa, (q15_t)0x242, (q15_t)0xb, (q15_t)0x24e,
+    (q15_t)0xb, (q15_t)0x25b, (q15_t)0xc, (q15_t)0x268, (q15_t)0xc, (q15_t)0x274, (q15_t)0xd, (q15_t)0x281,
+    (q15_t)0xd, (q15_t)0x28d, (q15_t)0xe, (q15_t)0x29a, (q15_t)0xe, (q15_t)0x2a6, (q15_t)0xf, (q15_t)0x2b3,
+    (q15_t)0xf, (q15_t)0x2c0, (q15_t)0x10, (q15_t)0x2cc, (q15_t)0x10, (q15_t)0x2d9, (q15_t)0x11, (q15_t)0x2e5,
+    (q15_t)0x11, (q15_t)0x2f2, (q15_t)0x12, (q15_t)0x2fe, (q15_t)0x13, (q15_t)0x30b, (q15_t)0x13, (q15_t)0x317,
+    (q15_t)0x14, (q15_t)0x324, (q15_t)0x14, (q15_t)0x330, (q15_t)0x15, (q15_t)0x33d, (q15_t)0x16, (q15_t)0x34a,
+    (q15_t)0x16, (q15_t)0x356, (q15_t)0x17, (q15_t)0x363, (q15_t)0x18, (q15_t)0x36f, (q15_t)0x18, (q15_t)0x37c,
+    (q15_t)0x19, (q15_t)0x388, (q15_t)0x1a, (q15_t)0x395, (q15_t)0x1a, (q15_t)0x3a1, (q15_t)0x1b, (q15_t)0x3ae,
+    (q15_t)0x1c, (q15_t)0x3bb, (q15_t)0x1d, (q15_t)0x3c7, (q15_t)0x1d, (q15_t)0x3d4, (q15_t)0x1e, (q15_t)0x3e0,
+    (q15_t)0x1f, (q15_t)0x3ed, (q15_t)0x20, (q15_t)0x3f9, (q15_t)0x20, (q15_t)0x406, (q15_t)0x21, (q15_t)0x412,
+    (q15_t)0x22, (q15_t)0x41f, (q15_t)0x23, (q15_t)0x42b, (q15_t)0x24, (q15_t)0x438, (q15_t)0x24, (q15_t)0x444,
+    (q15_t)0x25, (q15_t)0x451, (q15_t)0x26, (q15_t)0x45e, (q15_t)0x27, (q15_t)0x46a, (q15_t)0x28, (q15_t)0x477,
+    (q15_t)0x29, (q15_t)0x483, (q15_t)0x2a, (q15_t)0x490, (q15_t)0x2b, (q15_t)0x49c, (q15_t)0x2b, (q15_t)0x4a9,
+    (q15_t)0x2c, (q15_t)0x4b5, (q15_t)0x2d, (q15_t)0x4c2, (q15_t)0x2e, (q15_t)0x4ce, (q15_t)0x2f, (q15_t)0x4db,
+    (q15_t)0x30, (q15_t)0x4e7, (q15_t)0x31, (q15_t)0x4f4, (q15_t)0x32, (q15_t)0x500, (q15_t)0x33, (q15_t)0x50d,
+    (q15_t)0x34, (q15_t)0x51a, (q15_t)0x35, (q15_t)0x526, (q15_t)0x36, (q15_t)0x533, (q15_t)0x37, (q15_t)0x53f,
+    (q15_t)0x38, (q15_t)0x54c, (q15_t)0x39, (q15_t)0x558, (q15_t)0x3a, (q15_t)0x565, (q15_t)0x3b, (q15_t)0x571,
+    (q15_t)0x3c, (q15_t)0x57e, (q15_t)0x3d, (q15_t)0x58a, (q15_t)0x3f, (q15_t)0x597, (q15_t)0x40, (q15_t)0x5a3,
+    (q15_t)0x41, (q15_t)0x5b0, (q15_t)0x42, (q15_t)0x5bc, (q15_t)0x43, (q15_t)0x5c9, (q15_t)0x44, (q15_t)0x5d5,
+    (q15_t)0x45, (q15_t)0x5e2, (q15_t)0x47, (q15_t)0x5ee, (q15_t)0x48, (q15_t)0x5fb, (q15_t)0x49, (q15_t)0x607,
+    (q15_t)0x4a, (q15_t)0x614, (q15_t)0x4b, (q15_t)0x620, (q15_t)0x4c, (q15_t)0x62d, (q15_t)0x4e, (q15_t)0x639,
+    (q15_t)0x4f, (q15_t)0x646, (q15_t)0x50, (q15_t)0x652, (q15_t)0x51, (q15_t)0x65f, (q15_t)0x53, (q15_t)0x66b,
+    (q15_t)0x54, (q15_t)0x678, (q15_t)0x55, (q15_t)0x684, (q15_t)0x56, (q15_t)0x691, (q15_t)0x58, (q15_t)0x69d,
+    (q15_t)0x59, (q15_t)0x6aa, (q15_t)0x5a, (q15_t)0x6b6, (q15_t)0x5c, (q15_t)0x6c3, (q15_t)0x5d, (q15_t)0x6cf,
+    (q15_t)0x5e, (q15_t)0x6dc, (q15_t)0x60, (q15_t)0x6e8, (q15_t)0x61, (q15_t)0x6f5, (q15_t)0x62, (q15_t)0x701,
+    (q15_t)0x64, (q15_t)0x70e, (q15_t)0x65, (q15_t)0x71a, (q15_t)0x67, (q15_t)0x727, (q15_t)0x68, (q15_t)0x733,
+    (q15_t)0x69, (q15_t)0x740, (q15_t)0x6b, (q15_t)0x74c, (q15_t)0x6c, (q15_t)0x759, (q15_t)0x6e, (q15_t)0x765,
+    (q15_t)0x6f, (q15_t)0x772, (q15_t)0x71, (q15_t)0x77e, (q15_t)0x72, (q15_t)0x78b, (q15_t)0x74, (q15_t)0x797,
+    (q15_t)0x75, (q15_t)0x7a4, (q15_t)0x77, (q15_t)0x7b0, (q15_t)0x78, (q15_t)0x7bd, (q15_t)0x7a, (q15_t)0x7c9,
+    (q15_t)0x7b, (q15_t)0x7d6, (q15_t)0x7d, (q15_t)0x7e2, (q15_t)0x7e, (q15_t)0x7ef, (q15_t)0x80, (q15_t)0x7fb,
+    (q15_t)0x81, (q15_t)0x807, (q15_t)0x83, (q15_t)0x814, (q15_t)0x85, (q15_t)0x820, (q15_t)0x86, (q15_t)0x82d,
+    (q15_t)0x88, (q15_t)0x839, (q15_t)0x89, (q15_t)0x846, (q15_t)0x8b, (q15_t)0x852, (q15_t)0x8d, (q15_t)0x85f,
+    (q15_t)0x8e, (q15_t)0x86b, (q15_t)0x90, (q15_t)0x878, (q15_t)0x92, (q15_t)0x884, (q15_t)0x93, (q15_t)0x891,
+    (q15_t)0x95, (q15_t)0x89d, (q15_t)0x97, (q15_t)0x8a9, (q15_t)0x98, (q15_t)0x8b6, (q15_t)0x9a, (q15_t)0x8c2,
+    (q15_t)0x9c, (q15_t)0x8cf, (q15_t)0x9e, (q15_t)0x8db, (q15_t)0x9f, (q15_t)0x8e8, (q15_t)0xa1, (q15_t)0x8f4,
+    (q15_t)0xa3, (q15_t)0x901, (q15_t)0xa5, (q15_t)0x90d, (q15_t)0xa6, (q15_t)0x919, (q15_t)0xa8, (q15_t)0x926,
+    (q15_t)0xaa, (q15_t)0x932, (q15_t)0xac, (q15_t)0x93f, (q15_t)0xae, (q15_t)0x94b, (q15_t)0xaf, (q15_t)0x958,
+    (q15_t)0xb1, (q15_t)0x964, (q15_t)0xb3, (q15_t)0x970, (q15_t)0xb5, (q15_t)0x97d, (q15_t)0xb7, (q15_t)0x989,
+    (q15_t)0xb9, (q15_t)0x996, (q15_t)0xbb, (q15_t)0x9a2, (q15_t)0xbd, (q15_t)0x9af, (q15_t)0xbe, (q15_t)0x9bb,
+    (q15_t)0xc0, (q15_t)0x9c7, (q15_t)0xc2, (q15_t)0x9d4, (q15_t)0xc4, (q15_t)0x9e0, (q15_t)0xc6, (q15_t)0x9ed,
+    (q15_t)0xc8, (q15_t)0x9f9, (q15_t)0xca, (q15_t)0xa06, (q15_t)0xcc, (q15_t)0xa12, (q15_t)0xce, (q15_t)0xa1e,
+    (q15_t)0xd0, (q15_t)0xa2b, (q15_t)0xd2, (q15_t)0xa37, (q15_t)0xd4, (q15_t)0xa44, (q15_t)0xd6, (q15_t)0xa50,
+    (q15_t)0xd8, (q15_t)0xa5c, (q15_t)0xda, (q15_t)0xa69, (q15_t)0xdc, (q15_t)0xa75, (q15_t)0xde, (q15_t)0xa82,
+    (q15_t)0xe0, (q15_t)0xa8e, (q15_t)0xe2, (q15_t)0xa9a, (q15_t)0xe4, (q15_t)0xaa7, (q15_t)0xe7, (q15_t)0xab3,
+    (q15_t)0xe9, (q15_t)0xac0, (q15_t)0xeb, (q15_t)0xacc, (q15_t)0xed, (q15_t)0xad8, (q15_t)0xef, (q15_t)0xae5,
+    (q15_t)0xf1, (q15_t)0xaf1, (q15_t)0xf3, (q15_t)0xafd, (q15_t)0xf6, (q15_t)0xb0a, (q15_t)0xf8, (q15_t)0xb16,
+    (q15_t)0xfa, (q15_t)0xb23, (q15_t)0xfc, (q15_t)0xb2f, (q15_t)0xfe, (q15_t)0xb3b, (q15_t)0x100, (q15_t)0xb48,
+    (q15_t)0x103, (q15_t)0xb54, (q15_t)0x105, (q15_t)0xb60, (q15_t)0x107, (q15_t)0xb6d, (q15_t)0x109, (q15_t)0xb79,
+    (q15_t)0x10c, (q15_t)0xb85, (q15_t)0x10e, (q15_t)0xb92, (q15_t)0x110, (q15_t)0xb9e, (q15_t)0x113, (q15_t)0xbab,
+    (q15_t)0x115, (q15_t)0xbb7, (q15_t)0x117, (q15_t)0xbc3, (q15_t)0x119, (q15_t)0xbd0, (q15_t)0x11c, (q15_t)0xbdc,
+    (q15_t)0x11e, (q15_t)0xbe8, (q15_t)0x120, (q15_t)0xbf5, (q15_t)0x123, (q15_t)0xc01, (q15_t)0x125, (q15_t)0xc0d,
+    (q15_t)0x128, (q15_t)0xc1a, (q15_t)0x12a, (q15_t)0xc26, (q15_t)0x12c, (q15_t)0xc32, (q15_t)0x12f, (q15_t)0xc3f,
+    (q15_t)0x131, (q15_t)0xc4b, (q15_t)0x134, (q15_t)0xc57, (q15_t)0x136, (q15_t)0xc64, (q15_t)0x138, (q15_t)0xc70,
+    (q15_t)0x13b, (q15_t)0xc7c, (q15_t)0x13d, (q15_t)0xc89, (q15_t)0x140, (q15_t)0xc95, (q15_t)0x142, (q15_t)0xca1,
+    (q15_t)0x145, (q15_t)0xcae, (q15_t)0x147, (q15_t)0xcba, (q15_t)0x14a, (q15_t)0xcc6, (q15_t)0x14c, (q15_t)0xcd3,
+    (q15_t)0x14f, (q15_t)0xcdf, (q15_t)0x151, (q15_t)0xceb, (q15_t)0x154, (q15_t)0xcf8, (q15_t)0x156, (q15_t)0xd04,
+    (q15_t)0x159, (q15_t)0xd10, (q15_t)0x15b, (q15_t)0xd1c, (q15_t)0x15e, (q15_t)0xd29, (q15_t)0x161, (q15_t)0xd35,
+    (q15_t)0x163, (q15_t)0xd41, (q15_t)0x166, (q15_t)0xd4e, (q15_t)0x168, (q15_t)0xd5a, (q15_t)0x16b, (q15_t)0xd66,
+    (q15_t)0x16e, (q15_t)0xd72, (q15_t)0x170, (q15_t)0xd7f, (q15_t)0x173, (q15_t)0xd8b, (q15_t)0x176, (q15_t)0xd97,
+    (q15_t)0x178, (q15_t)0xda4, (q15_t)0x17b, (q15_t)0xdb0, (q15_t)0x17e, (q15_t)0xdbc, (q15_t)0x180, (q15_t)0xdc8,
+    (q15_t)0x183, (q15_t)0xdd5, (q15_t)0x186, (q15_t)0xde1, (q15_t)0x189, (q15_t)0xded, (q15_t)0x18b, (q15_t)0xdf9,
+    (q15_t)0x18e, (q15_t)0xe06, (q15_t)0x191, (q15_t)0xe12, (q15_t)0x194, (q15_t)0xe1e, (q15_t)0x196, (q15_t)0xe2b,
+    (q15_t)0x199, (q15_t)0xe37, (q15_t)0x19c, (q15_t)0xe43, (q15_t)0x19f, (q15_t)0xe4f, (q15_t)0x1a2, (q15_t)0xe5c,
+    (q15_t)0x1a4, (q15_t)0xe68, (q15_t)0x1a7, (q15_t)0xe74, (q15_t)0x1aa, (q15_t)0xe80, (q15_t)0x1ad, (q15_t)0xe8c,
+    (q15_t)0x1b0, (q15_t)0xe99, (q15_t)0x1b3, (q15_t)0xea5, (q15_t)0x1b6, (q15_t)0xeb1, (q15_t)0x1b8, (q15_t)0xebd,
+    (q15_t)0x1bb, (q15_t)0xeca, (q15_t)0x1be, (q15_t)0xed6, (q15_t)0x1c1, (q15_t)0xee2, (q15_t)0x1c4, (q15_t)0xeee,
+    (q15_t)0x1c7, (q15_t)0xefb, (q15_t)0x1ca, (q15_t)0xf07, (q15_t)0x1cd, (q15_t)0xf13, (q15_t)0x1d0, (q15_t)0xf1f,
+    (q15_t)0x1d3, (q15_t)0xf2b, (q15_t)0x1d6, (q15_t)0xf38, (q15_t)0x1d9, (q15_t)0xf44, (q15_t)0x1dc, (q15_t)0xf50,
+    (q15_t)0x1df, (q15_t)0xf5c, (q15_t)0x1e2, (q15_t)0xf68, (q15_t)0x1e5, (q15_t)0xf75, (q15_t)0x1e8, (q15_t)0xf81,
+    (q15_t)0x1eb, (q15_t)0xf8d, (q15_t)0x1ee, (q15_t)0xf99, (q15_t)0x1f1, (q15_t)0xfa5, (q15_t)0x1f4, (q15_t)0xfb2,
+    (q15_t)0x1f7, (q15_t)0xfbe, (q15_t)0x1fa, (q15_t)0xfca, (q15_t)0x1fd, (q15_t)0xfd6, (q15_t)0x201, (q15_t)0xfe2,
+    (q15_t)0x204, (q15_t)0xfee, (q15_t)0x207, (q15_t)0xffb, (q15_t)0x20a, (q15_t)0x1007, (q15_t)0x20d, (q15_t)0x1013,
+    (q15_t)0x210, (q15_t)0x101f, (q15_t)0x213, (q15_t)0x102b, (q15_t)0x217, (q15_t)0x1037, (q15_t)0x21a, (q15_t)0x1044,
+    (q15_t)0x21d, (q15_t)0x1050, (q15_t)0x220, (q15_t)0x105c, (q15_t)0x223, (q15_t)0x1068, (q15_t)0x227, (q15_t)0x1074,
+    (q15_t)0x22a, (q15_t)0x1080, (q15_t)0x22d, (q15_t)0x108c, (q15_t)0x230, (q15_t)0x1099, (q15_t)0x234, (q15_t)0x10a5,
+    (q15_t)0x237, (q15_t)0x10b1, (q15_t)0x23a, (q15_t)0x10bd, (q15_t)0x23e, (q15_t)0x10c9, (q15_t)0x241, (q15_t)0x10d5,
+    (q15_t)0x244, (q15_t)0x10e1, (q15_t)0x247, (q15_t)0x10ed, (q15_t)0x24b, (q15_t)0x10fa, (q15_t)0x24e, (q15_t)0x1106,
+    (q15_t)0x251, (q15_t)0x1112, (q15_t)0x255, (q15_t)0x111e, (q15_t)0x258, (q15_t)0x112a, (q15_t)0x25c, (q15_t)0x1136,
+    (q15_t)0x25f, (q15_t)0x1142, (q15_t)0x262, (q15_t)0x114e, (q15_t)0x266, (q15_t)0x115a, (q15_t)0x269, (q15_t)0x1167,
+    (q15_t)0x26d, (q15_t)0x1173, (q15_t)0x270, (q15_t)0x117f, (q15_t)0x273, (q15_t)0x118b, (q15_t)0x277, (q15_t)0x1197,
+    (q15_t)0x27a, (q15_t)0x11a3, (q15_t)0x27e, (q15_t)0x11af, (q15_t)0x281, (q15_t)0x11bb, (q15_t)0x285, (q15_t)0x11c7,
+    (q15_t)0x288, (q15_t)0x11d3, (q15_t)0x28c, (q15_t)0x11df, (q15_t)0x28f, (q15_t)0x11eb, (q15_t)0x293, (q15_t)0x11f7,
+    (q15_t)0x296, (q15_t)0x1204, (q15_t)0x29a, (q15_t)0x1210, (q15_t)0x29d, (q15_t)0x121c, (q15_t)0x2a1, (q15_t)0x1228,
+    (q15_t)0x2a5, (q15_t)0x1234, (q15_t)0x2a8, (q15_t)0x1240, (q15_t)0x2ac, (q15_t)0x124c, (q15_t)0x2af, (q15_t)0x1258,
+    (q15_t)0x2b3, (q15_t)0x1264, (q15_t)0x2b7, (q15_t)0x1270, (q15_t)0x2ba, (q15_t)0x127c, (q15_t)0x2be, (q15_t)0x1288,
+    (q15_t)0x2c1, (q15_t)0x1294, (q15_t)0x2c5, (q15_t)0x12a0, (q15_t)0x2c9, (q15_t)0x12ac, (q15_t)0x2cc, (q15_t)0x12b8,
+    (q15_t)0x2d0, (q15_t)0x12c4, (q15_t)0x2d4, (q15_t)0x12d0, (q15_t)0x2d8, (q15_t)0x12dc, (q15_t)0x2db, (q15_t)0x12e8,
+    (q15_t)0x2df, (q15_t)0x12f4, (q15_t)0x2e3, (q15_t)0x1300, (q15_t)0x2e6, (q15_t)0x130c, (q15_t)0x2ea, (q15_t)0x1318,
+    (q15_t)0x2ee, (q15_t)0x1324, (q15_t)0x2f2, (q15_t)0x1330, (q15_t)0x2f5, (q15_t)0x133c, (q15_t)0x2f9, (q15_t)0x1348,
+    (q15_t)0x2fd, (q15_t)0x1354, (q15_t)0x301, (q15_t)0x1360, (q15_t)0x305, (q15_t)0x136c, (q15_t)0x308, (q15_t)0x1378,
+    (q15_t)0x30c, (q15_t)0x1384, (q15_t)0x310, (q15_t)0x1390, (q15_t)0x314, (q15_t)0x139c, (q15_t)0x318, (q15_t)0x13a8,
+    (q15_t)0x31c, (q15_t)0x13b4, (q15_t)0x320, (q15_t)0x13c0, (q15_t)0x323, (q15_t)0x13cc, (q15_t)0x327, (q15_t)0x13d8,
+    (q15_t)0x32b, (q15_t)0x13e4, (q15_t)0x32f, (q15_t)0x13f0, (q15_t)0x333, (q15_t)0x13fb, (q15_t)0x337, (q15_t)0x1407,
+    (q15_t)0x33b, (q15_t)0x1413, (q15_t)0x33f, (q15_t)0x141f, (q15_t)0x343, (q15_t)0x142b, (q15_t)0x347, (q15_t)0x1437,
+    (q15_t)0x34b, (q15_t)0x1443, (q15_t)0x34f, (q15_t)0x144f, (q15_t)0x353, (q15_t)0x145b, (q15_t)0x357, (q15_t)0x1467,
+    (q15_t)0x35b, (q15_t)0x1473, (q15_t)0x35f, (q15_t)0x147f, (q15_t)0x363, (q15_t)0x148b, (q15_t)0x367, (q15_t)0x1496,
+    (q15_t)0x36b, (q15_t)0x14a2, (q15_t)0x36f, (q15_t)0x14ae, (q15_t)0x373, (q15_t)0x14ba, (q15_t)0x377, (q15_t)0x14c6,
+    (q15_t)0x37b, (q15_t)0x14d2, (q15_t)0x37f, (q15_t)0x14de, (q15_t)0x383, (q15_t)0x14ea, (q15_t)0x387, (q15_t)0x14f6,
+    (q15_t)0x38c, (q15_t)0x1501, (q15_t)0x390, (q15_t)0x150d, (q15_t)0x394, (q15_t)0x1519, (q15_t)0x398, (q15_t)0x1525,
+    (q15_t)0x39c, (q15_t)0x1531, (q15_t)0x3a0, (q15_t)0x153d, (q15_t)0x3a5, (q15_t)0x1549, (q15_t)0x3a9, (q15_t)0x1554,
+    (q15_t)0x3ad, (q15_t)0x1560, (q15_t)0x3b1, (q15_t)0x156c, (q15_t)0x3b5, (q15_t)0x1578, (q15_t)0x3ba, (q15_t)0x1584,
+    (q15_t)0x3be, (q15_t)0x1590, (q15_t)0x3c2, (q15_t)0x159b, (q15_t)0x3c6, (q15_t)0x15a7, (q15_t)0x3ca, (q15_t)0x15b3,
+    (q15_t)0x3cf, (q15_t)0x15bf, (q15_t)0x3d3, (q15_t)0x15cb, (q15_t)0x3d7, (q15_t)0x15d7, (q15_t)0x3dc, (q15_t)0x15e2,
+    (q15_t)0x3e0, (q15_t)0x15ee, (q15_t)0x3e4, (q15_t)0x15fa, (q15_t)0x3e9, (q15_t)0x1606, (q15_t)0x3ed, (q15_t)0x1612,
+    (q15_t)0x3f1, (q15_t)0x161d, (q15_t)0x3f6, (q15_t)0x1629, (q15_t)0x3fa, (q15_t)0x1635, (q15_t)0x3fe, (q15_t)0x1641,
+    (q15_t)0x403, (q15_t)0x164c, (q15_t)0x407, (q15_t)0x1658, (q15_t)0x40b, (q15_t)0x1664, (q15_t)0x410, (q15_t)0x1670,
+    (q15_t)0x414, (q15_t)0x167c, (q15_t)0x419, (q15_t)0x1687, (q15_t)0x41d, (q15_t)0x1693, (q15_t)0x422, (q15_t)0x169f,
+    (q15_t)0x426, (q15_t)0x16ab, (q15_t)0x42a, (q15_t)0x16b6, (q15_t)0x42f, (q15_t)0x16c2, (q15_t)0x433, (q15_t)0x16ce,
+    (q15_t)0x438, (q15_t)0x16da, (q15_t)0x43c, (q15_t)0x16e5, (q15_t)0x441, (q15_t)0x16f1, (q15_t)0x445, (q15_t)0x16fd,
+    (q15_t)0x44a, (q15_t)0x1709, (q15_t)0x44e, (q15_t)0x1714, (q15_t)0x453, (q15_t)0x1720, (q15_t)0x457, (q15_t)0x172c,
+    (q15_t)0x45c, (q15_t)0x1737, (q15_t)0x461, (q15_t)0x1743, (q15_t)0x465, (q15_t)0x174f, (q15_t)0x46a, (q15_t)0x175b,
+    (q15_t)0x46e, (q15_t)0x1766, (q15_t)0x473, (q15_t)0x1772, (q15_t)0x478, (q15_t)0x177e, (q15_t)0x47c, (q15_t)0x1789,
+    (q15_t)0x481, (q15_t)0x1795, (q15_t)0x485, (q15_t)0x17a1, (q15_t)0x48a, (q15_t)0x17ac, (q15_t)0x48f, (q15_t)0x17b8,
+    (q15_t)0x493, (q15_t)0x17c4, (q15_t)0x498, (q15_t)0x17cf, (q15_t)0x49d, (q15_t)0x17db, (q15_t)0x4a1, (q15_t)0x17e7,
+    (q15_t)0x4a6, (q15_t)0x17f2, (q15_t)0x4ab, (q15_t)0x17fe, (q15_t)0x4b0, (q15_t)0x180a, (q15_t)0x4b4, (q15_t)0x1815,
+    (q15_t)0x4b9, (q15_t)0x1821, (q15_t)0x4be, (q15_t)0x182d, (q15_t)0x4c2, (q15_t)0x1838, (q15_t)0x4c7, (q15_t)0x1844,
+    (q15_t)0x4cc, (q15_t)0x184f, (q15_t)0x4d1, (q15_t)0x185b, (q15_t)0x4d6, (q15_t)0x1867, (q15_t)0x4da, (q15_t)0x1872,
+    (q15_t)0x4df, (q15_t)0x187e, (q15_t)0x4e4, (q15_t)0x1889, (q15_t)0x4e9, (q15_t)0x1895, (q15_t)0x4ee, (q15_t)0x18a1,
+    (q15_t)0x4f2, (q15_t)0x18ac, (q15_t)0x4f7, (q15_t)0x18b8, (q15_t)0x4fc, (q15_t)0x18c3, (q15_t)0x501, (q15_t)0x18cf,
+    (q15_t)0x506, (q15_t)0x18db, (q15_t)0x50b, (q15_t)0x18e6, (q15_t)0x510, (q15_t)0x18f2, (q15_t)0x515, (q15_t)0x18fd,
+    (q15_t)0x51a, (q15_t)0x1909, (q15_t)0x51e, (q15_t)0x1914, (q15_t)0x523, (q15_t)0x1920, (q15_t)0x528, (q15_t)0x192c,
+    (q15_t)0x52d, (q15_t)0x1937, (q15_t)0x532, (q15_t)0x1943, (q15_t)0x537, (q15_t)0x194e, (q15_t)0x53c, (q15_t)0x195a,
+    (q15_t)0x541, (q15_t)0x1965, (q15_t)0x546, (q15_t)0x1971, (q15_t)0x54b, (q15_t)0x197c, (q15_t)0x550, (q15_t)0x1988,
+    (q15_t)0x555, (q15_t)0x1993, (q15_t)0x55a, (q15_t)0x199f, (q15_t)0x55f, (q15_t)0x19aa, (q15_t)0x564, (q15_t)0x19b6,
+    (q15_t)0x569, (q15_t)0x19c1, (q15_t)0x56e, (q15_t)0x19cd, (q15_t)0x573, (q15_t)0x19d8, (q15_t)0x578, (q15_t)0x19e4,
+    (q15_t)0x57e, (q15_t)0x19ef, (q15_t)0x583, (q15_t)0x19fb, (q15_t)0x588, (q15_t)0x1a06, (q15_t)0x58d, (q15_t)0x1a12,
+    (q15_t)0x592, (q15_t)0x1a1d, (q15_t)0x597, (q15_t)0x1a29, (q15_t)0x59c, (q15_t)0x1a34, (q15_t)0x5a1, (q15_t)0x1a40,
+    (q15_t)0x5a7, (q15_t)0x1a4b, (q15_t)0x5ac, (q15_t)0x1a57, (q15_t)0x5b1, (q15_t)0x1a62, (q15_t)0x5b6, (q15_t)0x1a6e,
+    (q15_t)0x5bb, (q15_t)0x1a79, (q15_t)0x5c1, (q15_t)0x1a84, (q15_t)0x5c6, (q15_t)0x1a90, (q15_t)0x5cb, (q15_t)0x1a9b,
+    (q15_t)0x5d0, (q15_t)0x1aa7, (q15_t)0x5d5, (q15_t)0x1ab2, (q15_t)0x5db, (q15_t)0x1abe, (q15_t)0x5e0, (q15_t)0x1ac9,
+    (q15_t)0x5e5, (q15_t)0x1ad4, (q15_t)0x5ea, (q15_t)0x1ae0, (q15_t)0x5f0, (q15_t)0x1aeb, (q15_t)0x5f5, (q15_t)0x1af7,
+    (q15_t)0x5fa, (q15_t)0x1b02, (q15_t)0x600, (q15_t)0x1b0d, (q15_t)0x605, (q15_t)0x1b19, (q15_t)0x60a, (q15_t)0x1b24,
+    (q15_t)0x610, (q15_t)0x1b30, (q15_t)0x615, (q15_t)0x1b3b, (q15_t)0x61a, (q15_t)0x1b46, (q15_t)0x620, (q15_t)0x1b52,
+    (q15_t)0x625, (q15_t)0x1b5d, (q15_t)0x62a, (q15_t)0x1b68, (q15_t)0x630, (q15_t)0x1b74, (q15_t)0x635, (q15_t)0x1b7f,
+    (q15_t)0x63b, (q15_t)0x1b8a, (q15_t)0x640, (q15_t)0x1b96, (q15_t)0x645, (q15_t)0x1ba1, (q15_t)0x64b, (q15_t)0x1bac,
+    (q15_t)0x650, (q15_t)0x1bb8, (q15_t)0x656, (q15_t)0x1bc3, (q15_t)0x65b, (q15_t)0x1bce, (q15_t)0x661, (q15_t)0x1bda,
+    (q15_t)0x666, (q15_t)0x1be5, (q15_t)0x66c, (q15_t)0x1bf0, (q15_t)0x671, (q15_t)0x1bfc, (q15_t)0x677, (q15_t)0x1c07,
+    (q15_t)0x67c, (q15_t)0x1c12, (q15_t)0x682, (q15_t)0x1c1e, (q15_t)0x687, (q15_t)0x1c29, (q15_t)0x68d, (q15_t)0x1c34,
+    (q15_t)0x692, (q15_t)0x1c3f, (q15_t)0x698, (q15_t)0x1c4b, (q15_t)0x69d, (q15_t)0x1c56, (q15_t)0x6a3, (q15_t)0x1c61,
+    (q15_t)0x6a8, (q15_t)0x1c6c, (q15_t)0x6ae, (q15_t)0x1c78, (q15_t)0x6b4, (q15_t)0x1c83, (q15_t)0x6b9, (q15_t)0x1c8e,
+    (q15_t)0x6bf, (q15_t)0x1c99, (q15_t)0x6c5, (q15_t)0x1ca5, (q15_t)0x6ca, (q15_t)0x1cb0, (q15_t)0x6d0, (q15_t)0x1cbb,
+    (q15_t)0x6d5, (q15_t)0x1cc6, (q15_t)0x6db, (q15_t)0x1cd2, (q15_t)0x6e1, (q15_t)0x1cdd, (q15_t)0x6e6, (q15_t)0x1ce8,
+    (q15_t)0x6ec, (q15_t)0x1cf3, (q15_t)0x6f2, (q15_t)0x1cff, (q15_t)0x6f7, (q15_t)0x1d0a, (q15_t)0x6fd, (q15_t)0x1d15,
+    (q15_t)0x703, (q15_t)0x1d20, (q15_t)0x709, (q15_t)0x1d2b, (q15_t)0x70e, (q15_t)0x1d36, (q15_t)0x714, (q15_t)0x1d42,
+    (q15_t)0x71a, (q15_t)0x1d4d, (q15_t)0x720, (q15_t)0x1d58, (q15_t)0x725, (q15_t)0x1d63, (q15_t)0x72b, (q15_t)0x1d6e,
+    (q15_t)0x731, (q15_t)0x1d79, (q15_t)0x737, (q15_t)0x1d85, (q15_t)0x73d, (q15_t)0x1d90, (q15_t)0x742, (q15_t)0x1d9b,
+    (q15_t)0x748, (q15_t)0x1da6, (q15_t)0x74e, (q15_t)0x1db1, (q15_t)0x754, (q15_t)0x1dbc, (q15_t)0x75a, (q15_t)0x1dc7,
+    (q15_t)0x75f, (q15_t)0x1dd3, (q15_t)0x765, (q15_t)0x1dde, (q15_t)0x76b, (q15_t)0x1de9, (q15_t)0x771, (q15_t)0x1df4,
+    (q15_t)0x777, (q15_t)0x1dff, (q15_t)0x77d, (q15_t)0x1e0a, (q15_t)0x783, (q15_t)0x1e15, (q15_t)0x789, (q15_t)0x1e20,
+    (q15_t)0x78f, (q15_t)0x1e2b, (q15_t)0x795, (q15_t)0x1e36, (q15_t)0x79a, (q15_t)0x1e42, (q15_t)0x7a0, (q15_t)0x1e4d,
+    (q15_t)0x7a6, (q15_t)0x1e58, (q15_t)0x7ac, (q15_t)0x1e63, (q15_t)0x7b2, (q15_t)0x1e6e, (q15_t)0x7b8, (q15_t)0x1e79,
+    (q15_t)0x7be, (q15_t)0x1e84, (q15_t)0x7c4, (q15_t)0x1e8f, (q15_t)0x7ca, (q15_t)0x1e9a, (q15_t)0x7d0, (q15_t)0x1ea5,
+    (q15_t)0x7d6, (q15_t)0x1eb0, (q15_t)0x7dc, (q15_t)0x1ebb, (q15_t)0x7e2, (q15_t)0x1ec6, (q15_t)0x7e8, (q15_t)0x1ed1,
+    (q15_t)0x7ee, (q15_t)0x1edc, (q15_t)0x7f5, (q15_t)0x1ee7, (q15_t)0x7fb, (q15_t)0x1ef2, (q15_t)0x801, (q15_t)0x1efd,
+    (q15_t)0x807, (q15_t)0x1f08, (q15_t)0x80d, (q15_t)0x1f13, (q15_t)0x813, (q15_t)0x1f1e, (q15_t)0x819, (q15_t)0x1f29,
+    (q15_t)0x81f, (q15_t)0x1f34, (q15_t)0x825, (q15_t)0x1f3f, (q15_t)0x82b, (q15_t)0x1f4a, (q15_t)0x832, (q15_t)0x1f55,
+    (q15_t)0x838, (q15_t)0x1f60, (q15_t)0x83e, (q15_t)0x1f6b, (q15_t)0x844, (q15_t)0x1f76, (q15_t)0x84a, (q15_t)0x1f81,
+    (q15_t)0x850, (q15_t)0x1f8c, (q15_t)0x857, (q15_t)0x1f97, (q15_t)0x85d, (q15_t)0x1fa2, (q15_t)0x863, (q15_t)0x1fac,
+    (q15_t)0x869, (q15_t)0x1fb7, (q15_t)0x870, (q15_t)0x1fc2, (q15_t)0x876, (q15_t)0x1fcd, (q15_t)0x87c, (q15_t)0x1fd8,
+    (q15_t)0x882, (q15_t)0x1fe3, (q15_t)0x889, (q15_t)0x1fee, (q15_t)0x88f, (q15_t)0x1ff9, (q15_t)0x895, (q15_t)0x2004,
+    (q15_t)0x89b, (q15_t)0x200f, (q15_t)0x8a2, (q15_t)0x2019, (q15_t)0x8a8, (q15_t)0x2024, (q15_t)0x8ae, (q15_t)0x202f,
+    (q15_t)0x8b5, (q15_t)0x203a, (q15_t)0x8bb, (q15_t)0x2045, (q15_t)0x8c1, (q15_t)0x2050, (q15_t)0x8c8, (q15_t)0x205b,
+    (q15_t)0x8ce, (q15_t)0x2065, (q15_t)0x8d4, (q15_t)0x2070, (q15_t)0x8db, (q15_t)0x207b, (q15_t)0x8e1, (q15_t)0x2086,
+    (q15_t)0x8e8, (q15_t)0x2091, (q15_t)0x8ee, (q15_t)0x209b, (q15_t)0x8f4, (q15_t)0x20a6, (q15_t)0x8fb, (q15_t)0x20b1,
+    (q15_t)0x901, (q15_t)0x20bc, (q15_t)0x908, (q15_t)0x20c7, (q15_t)0x90e, (q15_t)0x20d1, (q15_t)0x915, (q15_t)0x20dc,
+    (q15_t)0x91b, (q15_t)0x20e7, (q15_t)0x921, (q15_t)0x20f2, (q15_t)0x928, (q15_t)0x20fd, (q15_t)0x92e, (q15_t)0x2107,
+    (q15_t)0x935, (q15_t)0x2112, (q15_t)0x93b, (q15_t)0x211d, (q15_t)0x942, (q15_t)0x2128, (q15_t)0x948, (q15_t)0x2132,
+    (q15_t)0x94f, (q15_t)0x213d, (q15_t)0x955, (q15_t)0x2148, (q15_t)0x95c, (q15_t)0x2153, (q15_t)0x963, (q15_t)0x215d,
+    (q15_t)0x969, (q15_t)0x2168, (q15_t)0x970, (q15_t)0x2173, (q15_t)0x976, (q15_t)0x217d, (q15_t)0x97d, (q15_t)0x2188,
+    (q15_t)0x983, (q15_t)0x2193, (q15_t)0x98a, (q15_t)0x219e, (q15_t)0x991, (q15_t)0x21a8, (q15_t)0x997, (q15_t)0x21b3,
+    (q15_t)0x99e, (q15_t)0x21be, (q15_t)0x9a4, (q15_t)0x21c8, (q15_t)0x9ab, (q15_t)0x21d3, (q15_t)0x9b2, (q15_t)0x21de,
+    (q15_t)0x9b8, (q15_t)0x21e8, (q15_t)0x9bf, (q15_t)0x21f3, (q15_t)0x9c6, (q15_t)0x21fe, (q15_t)0x9cc, (q15_t)0x2208,
+    (q15_t)0x9d3, (q15_t)0x2213, (q15_t)0x9da, (q15_t)0x221e, (q15_t)0x9e0, (q15_t)0x2228, (q15_t)0x9e7, (q15_t)0x2233,
+    (q15_t)0x9ee, (q15_t)0x223d, (q15_t)0x9f5, (q15_t)0x2248, (q15_t)0x9fb, (q15_t)0x2253, (q15_t)0xa02, (q15_t)0x225d,
+    (q15_t)0xa09, (q15_t)0x2268, (q15_t)0xa10, (q15_t)0x2272, (q15_t)0xa16, (q15_t)0x227d, (q15_t)0xa1d, (q15_t)0x2288,
+    (q15_t)0xa24, (q15_t)0x2292, (q15_t)0xa2b, (q15_t)0x229d, (q15_t)0xa32, (q15_t)0x22a7, (q15_t)0xa38, (q15_t)0x22b2,
+    (q15_t)0xa3f, (q15_t)0x22bc, (q15_t)0xa46, (q15_t)0x22c7, (q15_t)0xa4d, (q15_t)0x22d2, (q15_t)0xa54, (q15_t)0x22dc,
+    (q15_t)0xa5b, (q15_t)0x22e7, (q15_t)0xa61, (q15_t)0x22f1, (q15_t)0xa68, (q15_t)0x22fc, (q15_t)0xa6f, (q15_t)0x2306,
+    (q15_t)0xa76, (q15_t)0x2311, (q15_t)0xa7d, (q15_t)0x231b, (q15_t)0xa84, (q15_t)0x2326, (q15_t)0xa8b, (q15_t)0x2330,
+    (q15_t)0xa92, (q15_t)0x233b, (q15_t)0xa99, (q15_t)0x2345, (q15_t)0xa9f, (q15_t)0x2350, (q15_t)0xaa6, (q15_t)0x235a,
+    (q15_t)0xaad, (q15_t)0x2365, (q15_t)0xab4, (q15_t)0x236f, (q15_t)0xabb, (q15_t)0x237a, (q15_t)0xac2, (q15_t)0x2384,
+    (q15_t)0xac9, (q15_t)0x238e, (q15_t)0xad0, (q15_t)0x2399, (q15_t)0xad7, (q15_t)0x23a3, (q15_t)0xade, (q15_t)0x23ae,
+    (q15_t)0xae5, (q15_t)0x23b8, (q15_t)0xaec, (q15_t)0x23c3, (q15_t)0xaf3, (q15_t)0x23cd, (q15_t)0xafa, (q15_t)0x23d7,
+    (q15_t)0xb01, (q15_t)0x23e2, (q15_t)0xb08, (q15_t)0x23ec, (q15_t)0xb0f, (q15_t)0x23f7, (q15_t)0xb16, (q15_t)0x2401,
+    (q15_t)0xb1e, (q15_t)0x240b, (q15_t)0xb25, (q15_t)0x2416, (q15_t)0xb2c, (q15_t)0x2420, (q15_t)0xb33, (q15_t)0x242b,
+    (q15_t)0xb3a, (q15_t)0x2435, (q15_t)0xb41, (q15_t)0x243f, (q15_t)0xb48, (q15_t)0x244a, (q15_t)0xb4f, (q15_t)0x2454,
+    (q15_t)0xb56, (q15_t)0x245e, (q15_t)0xb5e, (q15_t)0x2469, (q15_t)0xb65, (q15_t)0x2473, (q15_t)0xb6c, (q15_t)0x247d,
+    (q15_t)0xb73, (q15_t)0x2488, (q15_t)0xb7a, (q15_t)0x2492, (q15_t)0xb81, (q15_t)0x249c, (q15_t)0xb89, (q15_t)0x24a7,
+    (q15_t)0xb90, (q15_t)0x24b1, (q15_t)0xb97, (q15_t)0x24bb, (q15_t)0xb9e, (q15_t)0x24c5, (q15_t)0xba5, (q15_t)0x24d0,
+    (q15_t)0xbad, (q15_t)0x24da, (q15_t)0xbb4, (q15_t)0x24e4, (q15_t)0xbbb, (q15_t)0x24ef, (q15_t)0xbc2, (q15_t)0x24f9,
+    (q15_t)0xbca, (q15_t)0x2503, (q15_t)0xbd1, (q15_t)0x250d, (q15_t)0xbd8, (q15_t)0x2518, (q15_t)0xbe0, (q15_t)0x2522,
+    (q15_t)0xbe7, (q15_t)0x252c, (q15_t)0xbee, (q15_t)0x2536, (q15_t)0xbf5, (q15_t)0x2541, (q15_t)0xbfd, (q15_t)0x254b,
+    (q15_t)0xc04, (q15_t)0x2555, (q15_t)0xc0b, (q15_t)0x255f, (q15_t)0xc13, (q15_t)0x2569, (q15_t)0xc1a, (q15_t)0x2574,
+    (q15_t)0xc21, (q15_t)0x257e, (q15_t)0xc29, (q15_t)0x2588, (q15_t)0xc30, (q15_t)0x2592, (q15_t)0xc38, (q15_t)0x259c,
+    (q15_t)0xc3f, (q15_t)0x25a6, (q15_t)0xc46, (q15_t)0x25b1, (q15_t)0xc4e, (q15_t)0x25bb, (q15_t)0xc55, (q15_t)0x25c5,
+    (q15_t)0xc5d, (q15_t)0x25cf, (q15_t)0xc64, (q15_t)0x25d9, (q15_t)0xc6b, (q15_t)0x25e3, (q15_t)0xc73, (q15_t)0x25ed,
+    (q15_t)0xc7a, (q15_t)0x25f8, (q15_t)0xc82, (q15_t)0x2602, (q15_t)0xc89, (q15_t)0x260c, (q15_t)0xc91, (q15_t)0x2616,
+    (q15_t)0xc98, (q15_t)0x2620, (q15_t)0xca0, (q15_t)0x262a, (q15_t)0xca7, (q15_t)0x2634, (q15_t)0xcaf, (q15_t)0x263e,
+    (q15_t)0xcb6, (q15_t)0x2648, (q15_t)0xcbe, (q15_t)0x2652, (q15_t)0xcc5, (q15_t)0x265c, (q15_t)0xccd, (q15_t)0x2666,
+    (q15_t)0xcd4, (q15_t)0x2671, (q15_t)0xcdc, (q15_t)0x267b, (q15_t)0xce3, (q15_t)0x2685, (q15_t)0xceb, (q15_t)0x268f,
+    (q15_t)0xcf3, (q15_t)0x2699, (q15_t)0xcfa, (q15_t)0x26a3, (q15_t)0xd02, (q15_t)0x26ad, (q15_t)0xd09, (q15_t)0x26b7,
+    (q15_t)0xd11, (q15_t)0x26c1, (q15_t)0xd19, (q15_t)0x26cb, (q15_t)0xd20, (q15_t)0x26d5, (q15_t)0xd28, (q15_t)0x26df,
+    (q15_t)0xd30, (q15_t)0x26e9, (q15_t)0xd37, (q15_t)0x26f3, (q15_t)0xd3f, (q15_t)0x26fd, (q15_t)0xd46, (q15_t)0x2707,
+    (q15_t)0xd4e, (q15_t)0x2711, (q15_t)0xd56, (q15_t)0x271a, (q15_t)0xd5d, (q15_t)0x2724, (q15_t)0xd65, (q15_t)0x272e,
+    (q15_t)0xd6d, (q15_t)0x2738, (q15_t)0xd75, (q15_t)0x2742, (q15_t)0xd7c, (q15_t)0x274c, (q15_t)0xd84, (q15_t)0x2756,
+    (q15_t)0xd8c, (q15_t)0x2760, (q15_t)0xd93, (q15_t)0x276a, (q15_t)0xd9b, (q15_t)0x2774, (q15_t)0xda3, (q15_t)0x277e,
+    (q15_t)0xdab, (q15_t)0x2788, (q15_t)0xdb2, (q15_t)0x2791, (q15_t)0xdba, (q15_t)0x279b, (q15_t)0xdc2, (q15_t)0x27a5,
+    (q15_t)0xdca, (q15_t)0x27af, (q15_t)0xdd2, (q15_t)0x27b9, (q15_t)0xdd9, (q15_t)0x27c3, (q15_t)0xde1, (q15_t)0x27cd,
+    (q15_t)0xde9, (q15_t)0x27d6, (q15_t)0xdf1, (q15_t)0x27e0, (q15_t)0xdf9, (q15_t)0x27ea, (q15_t)0xe01, (q15_t)0x27f4,
+    (q15_t)0xe08, (q15_t)0x27fe, (q15_t)0xe10, (q15_t)0x2808, (q15_t)0xe18, (q15_t)0x2811, (q15_t)0xe20, (q15_t)0x281b,
+    (q15_t)0xe28, (q15_t)0x2825, (q15_t)0xe30, (q15_t)0x282f, (q15_t)0xe38, (q15_t)0x2838, (q15_t)0xe40, (q15_t)0x2842,
+    (q15_t)0xe47, (q15_t)0x284c, (q15_t)0xe4f, (q15_t)0x2856, (q15_t)0xe57, (q15_t)0x2860, (q15_t)0xe5f, (q15_t)0x2869,
+    (q15_t)0xe67, (q15_t)0x2873, (q15_t)0xe6f, (q15_t)0x287d, (q15_t)0xe77, (q15_t)0x2886, (q15_t)0xe7f, (q15_t)0x2890,
+    (q15_t)0xe87, (q15_t)0x289a, (q15_t)0xe8f, (q15_t)0x28a4, (q15_t)0xe97, (q15_t)0x28ad, (q15_t)0xe9f, (q15_t)0x28b7,
+    (q15_t)0xea7, (q15_t)0x28c1, (q15_t)0xeaf, (q15_t)0x28ca, (q15_t)0xeb7, (q15_t)0x28d4, (q15_t)0xebf, (q15_t)0x28de,
+    (q15_t)0xec7, (q15_t)0x28e7, (q15_t)0xecf, (q15_t)0x28f1, (q15_t)0xed7, (q15_t)0x28fb, (q15_t)0xedf, (q15_t)0x2904,
+    (q15_t)0xee7, (q15_t)0x290e, (q15_t)0xeef, (q15_t)0x2918, (q15_t)0xef7, (q15_t)0x2921, (q15_t)0xeff, (q15_t)0x292b,
+    (q15_t)0xf07, (q15_t)0x2935, (q15_t)0xf10, (q15_t)0x293e, (q15_t)0xf18, (q15_t)0x2948, (q15_t)0xf20, (q15_t)0x2951,
+    (q15_t)0xf28, (q15_t)0x295b, (q15_t)0xf30, (q15_t)0x2965, (q15_t)0xf38, (q15_t)0x296e, (q15_t)0xf40, (q15_t)0x2978,
+    (q15_t)0xf48, (q15_t)0x2981, (q15_t)0xf51, (q15_t)0x298b, (q15_t)0xf59, (q15_t)0x2994, (q15_t)0xf61, (q15_t)0x299e,
+    (q15_t)0xf69, (q15_t)0x29a7, (q15_t)0xf71, (q15_t)0x29b1, (q15_t)0xf79, (q15_t)0x29bb, (q15_t)0xf82, (q15_t)0x29c4,
+    (q15_t)0xf8a, (q15_t)0x29ce, (q15_t)0xf92, (q15_t)0x29d7, (q15_t)0xf9a, (q15_t)0x29e1, (q15_t)0xfa3, (q15_t)0x29ea,
+    (q15_t)0xfab, (q15_t)0x29f4, (q15_t)0xfb3, (q15_t)0x29fd, (q15_t)0xfbb, (q15_t)0x2a07, (q15_t)0xfc4, (q15_t)0x2a10,
+    (q15_t)0xfcc, (q15_t)0x2a1a, (q15_t)0xfd4, (q15_t)0x2a23, (q15_t)0xfdc, (q15_t)0x2a2c, (q15_t)0xfe5, (q15_t)0x2a36,
+    (q15_t)0xfed, (q15_t)0x2a3f, (q15_t)0xff5, (q15_t)0x2a49, (q15_t)0xffe, (q15_t)0x2a52, (q15_t)0x1006, (q15_t)0x2a5c,
+    (q15_t)0x100e, (q15_t)0x2a65, (q15_t)0x1016, (q15_t)0x2a6e, (q15_t)0x101f, (q15_t)0x2a78, (q15_t)0x1027, (q15_t)0x2a81,
+    (q15_t)0x1030, (q15_t)0x2a8b, (q15_t)0x1038, (q15_t)0x2a94, (q15_t)0x1040, (q15_t)0x2a9d, (q15_t)0x1049, (q15_t)0x2aa7,
+    (q15_t)0x1051, (q15_t)0x2ab0, (q15_t)0x1059, (q15_t)0x2ab9, (q15_t)0x1062, (q15_t)0x2ac3, (q15_t)0x106a, (q15_t)0x2acc,
+    (q15_t)0x1073, (q15_t)0x2ad6, (q15_t)0x107b, (q15_t)0x2adf, (q15_t)0x1083, (q15_t)0x2ae8, (q15_t)0x108c, (q15_t)0x2af2,
+    (q15_t)0x1094, (q15_t)0x2afb, (q15_t)0x109d, (q15_t)0x2b04, (q15_t)0x10a5, (q15_t)0x2b0d, (q15_t)0x10ae, (q15_t)0x2b17,
+    (q15_t)0x10b6, (q15_t)0x2b20, (q15_t)0x10bf, (q15_t)0x2b29, (q15_t)0x10c7, (q15_t)0x2b33, (q15_t)0x10d0, (q15_t)0x2b3c,
+    (q15_t)0x10d8, (q15_t)0x2b45, (q15_t)0x10e0, (q15_t)0x2b4e, (q15_t)0x10e9, (q15_t)0x2b58, (q15_t)0x10f2, (q15_t)0x2b61,
+    (q15_t)0x10fa, (q15_t)0x2b6a, (q15_t)0x1103, (q15_t)0x2b73, (q15_t)0x110b, (q15_t)0x2b7d, (q15_t)0x1114, (q15_t)0x2b86,
+    (q15_t)0x111c, (q15_t)0x2b8f, (q15_t)0x1125, (q15_t)0x2b98, (q15_t)0x112d, (q15_t)0x2ba1, (q15_t)0x1136, (q15_t)0x2bab,
+    (q15_t)0x113e, (q15_t)0x2bb4, (q15_t)0x1147, (q15_t)0x2bbd, (q15_t)0x1150, (q15_t)0x2bc6, (q15_t)0x1158, (q15_t)0x2bcf,
+    (q15_t)0x1161, (q15_t)0x2bd8, (q15_t)0x1169, (q15_t)0x2be2, (q15_t)0x1172, (q15_t)0x2beb, (q15_t)0x117b, (q15_t)0x2bf4,
+    (q15_t)0x1183, (q15_t)0x2bfd, (q15_t)0x118c, (q15_t)0x2c06, (q15_t)0x1195, (q15_t)0x2c0f, (q15_t)0x119d, (q15_t)0x2c18,
+    (q15_t)0x11a6, (q15_t)0x2c21, (q15_t)0x11af, (q15_t)0x2c2b, (q15_t)0x11b7, (q15_t)0x2c34, (q15_t)0x11c0, (q15_t)0x2c3d,
+    (q15_t)0x11c9, (q15_t)0x2c46, (q15_t)0x11d1, (q15_t)0x2c4f, (q15_t)0x11da, (q15_t)0x2c58, (q15_t)0x11e3, (q15_t)0x2c61,
+    (q15_t)0x11eb, (q15_t)0x2c6a, (q15_t)0x11f4, (q15_t)0x2c73, (q15_t)0x11fd, (q15_t)0x2c7c, (q15_t)0x1206, (q15_t)0x2c85,
+    (q15_t)0x120e, (q15_t)0x2c8e, (q15_t)0x1217, (q15_t)0x2c97, (q15_t)0x1220, (q15_t)0x2ca0, (q15_t)0x1229, (q15_t)0x2ca9,
+    (q15_t)0x1231, (q15_t)0x2cb2, (q15_t)0x123a, (q15_t)0x2cbb, (q15_t)0x1243, (q15_t)0x2cc4, (q15_t)0x124c, (q15_t)0x2ccd,
+    (q15_t)0x1255, (q15_t)0x2cd6, (q15_t)0x125d, (q15_t)0x2cdf, (q15_t)0x1266, (q15_t)0x2ce8, (q15_t)0x126f, (q15_t)0x2cf1,
+    (q15_t)0x1278, (q15_t)0x2cfa, (q15_t)0x1281, (q15_t)0x2d03, (q15_t)0x128a, (q15_t)0x2d0c, (q15_t)0x1292, (q15_t)0x2d15,
+    (q15_t)0x129b, (q15_t)0x2d1e, (q15_t)0x12a4, (q15_t)0x2d27, (q15_t)0x12ad, (q15_t)0x2d2f, (q15_t)0x12b6, (q15_t)0x2d38,
+    (q15_t)0x12bf, (q15_t)0x2d41, (q15_t)0x12c8, (q15_t)0x2d4a, (q15_t)0x12d1, (q15_t)0x2d53, (q15_t)0x12d9, (q15_t)0x2d5c,
+    (q15_t)0x12e2, (q15_t)0x2d65, (q15_t)0x12eb, (q15_t)0x2d6e, (q15_t)0x12f4, (q15_t)0x2d76, (q15_t)0x12fd, (q15_t)0x2d7f,
+    (q15_t)0x1306, (q15_t)0x2d88, (q15_t)0x130f, (q15_t)0x2d91, (q15_t)0x1318, (q15_t)0x2d9a, (q15_t)0x1321, (q15_t)0x2da3,
+    (q15_t)0x132a, (q15_t)0x2dab, (q15_t)0x1333, (q15_t)0x2db4, (q15_t)0x133c, (q15_t)0x2dbd, (q15_t)0x1345, (q15_t)0x2dc6,
+    (q15_t)0x134e, (q15_t)0x2dcf, (q15_t)0x1357, (q15_t)0x2dd7, (q15_t)0x1360, (q15_t)0x2de0, (q15_t)0x1369, (q15_t)0x2de9,
+    (q15_t)0x1372, (q15_t)0x2df2, (q15_t)0x137b, (q15_t)0x2dfa, (q15_t)0x1384, (q15_t)0x2e03, (q15_t)0x138d, (q15_t)0x2e0c,
+    (q15_t)0x1396, (q15_t)0x2e15, (q15_t)0x139f, (q15_t)0x2e1d, (q15_t)0x13a8, (q15_t)0x2e26, (q15_t)0x13b1, (q15_t)0x2e2f,
+    (q15_t)0x13ba, (q15_t)0x2e37, (q15_t)0x13c3, (q15_t)0x2e40, (q15_t)0x13cc, (q15_t)0x2e49, (q15_t)0x13d5, (q15_t)0x2e51,
+    (q15_t)0x13df, (q15_t)0x2e5a, (q15_t)0x13e8, (q15_t)0x2e63, (q15_t)0x13f1, (q15_t)0x2e6b, (q15_t)0x13fa, (q15_t)0x2e74,
+    (q15_t)0x1403, (q15_t)0x2e7d, (q15_t)0x140c, (q15_t)0x2e85, (q15_t)0x1415, (q15_t)0x2e8e, (q15_t)0x141e, (q15_t)0x2e97,
+    (q15_t)0x1428, (q15_t)0x2e9f, (q15_t)0x1431, (q15_t)0x2ea8, (q15_t)0x143a, (q15_t)0x2eb0, (q15_t)0x1443, (q15_t)0x2eb9,
+    (q15_t)0x144c, (q15_t)0x2ec2, (q15_t)0x1455, (q15_t)0x2eca, (q15_t)0x145f, (q15_t)0x2ed3, (q15_t)0x1468, (q15_t)0x2edb,
+    (q15_t)0x1471, (q15_t)0x2ee4, (q15_t)0x147a, (q15_t)0x2eec, (q15_t)0x1483, (q15_t)0x2ef5, (q15_t)0x148d, (q15_t)0x2efd,
+    (q15_t)0x1496, (q15_t)0x2f06, (q15_t)0x149f, (q15_t)0x2f0e, (q15_t)0x14a8, (q15_t)0x2f17, (q15_t)0x14b2, (q15_t)0x2f20,
+    (q15_t)0x14bb, (q15_t)0x2f28, (q15_t)0x14c4, (q15_t)0x2f30, (q15_t)0x14cd, (q15_t)0x2f39, (q15_t)0x14d7, (q15_t)0x2f41,
+    (q15_t)0x14e0, (q15_t)0x2f4a, (q15_t)0x14e9, (q15_t)0x2f52, (q15_t)0x14f3, (q15_t)0x2f5b, (q15_t)0x14fc, (q15_t)0x2f63,
+    (q15_t)0x1505, (q15_t)0x2f6c, (q15_t)0x150e, (q15_t)0x2f74, (q15_t)0x1518, (q15_t)0x2f7d, (q15_t)0x1521, (q15_t)0x2f85,
+    (q15_t)0x152a, (q15_t)0x2f8d, (q15_t)0x1534, (q15_t)0x2f96, (q15_t)0x153d, (q15_t)0x2f9e, (q15_t)0x1547, (q15_t)0x2fa7,
+    (q15_t)0x1550, (q15_t)0x2faf, (q15_t)0x1559, (q15_t)0x2fb7, (q15_t)0x1563, (q15_t)0x2fc0, (q15_t)0x156c, (q15_t)0x2fc8,
+    (q15_t)0x1575, (q15_t)0x2fd0, (q15_t)0x157f, (q15_t)0x2fd9, (q15_t)0x1588, (q15_t)0x2fe1, (q15_t)0x1592, (q15_t)0x2fea,
+    (q15_t)0x159b, (q15_t)0x2ff2, (q15_t)0x15a4, (q15_t)0x2ffa, (q15_t)0x15ae, (q15_t)0x3002, (q15_t)0x15b7, (q15_t)0x300b,
+    (q15_t)0x15c1, (q15_t)0x3013, (q15_t)0x15ca, (q15_t)0x301b, (q15_t)0x15d4, (q15_t)0x3024, (q15_t)0x15dd, (q15_t)0x302c,
+    (q15_t)0x15e6, (q15_t)0x3034, (q15_t)0x15f0, (q15_t)0x303c, (q15_t)0x15f9, (q15_t)0x3045, (q15_t)0x1603, (q15_t)0x304d,
+    (q15_t)0x160c, (q15_t)0x3055, (q15_t)0x1616, (q15_t)0x305d, (q15_t)0x161f, (q15_t)0x3066, (q15_t)0x1629, (q15_t)0x306e,
+    (q15_t)0x1632, (q15_t)0x3076, (q15_t)0x163c, (q15_t)0x307e, (q15_t)0x1645, (q15_t)0x3087, (q15_t)0x164f, (q15_t)0x308f,
+    (q15_t)0x1659, (q15_t)0x3097, (q15_t)0x1662, (q15_t)0x309f, (q15_t)0x166c, (q15_t)0x30a7, (q15_t)0x1675, (q15_t)0x30af,
+    (q15_t)0x167f, (q15_t)0x30b8, (q15_t)0x1688, (q15_t)0x30c0, (q15_t)0x1692, (q15_t)0x30c8, (q15_t)0x169b, (q15_t)0x30d0,
+    (q15_t)0x16a5, (q15_t)0x30d8, (q15_t)0x16af, (q15_t)0x30e0, (q15_t)0x16b8, (q15_t)0x30e8, (q15_t)0x16c2, (q15_t)0x30f0,
+    (q15_t)0x16cb, (q15_t)0x30f9, (q15_t)0x16d5, (q15_t)0x3101, (q15_t)0x16df, (q15_t)0x3109, (q15_t)0x16e8, (q15_t)0x3111,
+    (q15_t)0x16f2, (q15_t)0x3119, (q15_t)0x16fc, (q15_t)0x3121, (q15_t)0x1705, (q15_t)0x3129, (q15_t)0x170f, (q15_t)0x3131,
+    (q15_t)0x1719, (q15_t)0x3139, (q15_t)0x1722, (q15_t)0x3141, (q15_t)0x172c, (q15_t)0x3149, (q15_t)0x1736, (q15_t)0x3151,
+    (q15_t)0x173f, (q15_t)0x3159, (q15_t)0x1749, (q15_t)0x3161, (q15_t)0x1753, (q15_t)0x3169, (q15_t)0x175c, (q15_t)0x3171,
+    (q15_t)0x1766, (q15_t)0x3179, (q15_t)0x1770, (q15_t)0x3181, (q15_t)0x177a, (q15_t)0x3189, (q15_t)0x1783, (q15_t)0x3191,
+    (q15_t)0x178d, (q15_t)0x3199, (q15_t)0x1797, (q15_t)0x31a1, (q15_t)0x17a0, (q15_t)0x31a9, (q15_t)0x17aa, (q15_t)0x31b1,
+    (q15_t)0x17b4, (q15_t)0x31b9, (q15_t)0x17be, (q15_t)0x31c0, (q15_t)0x17c8, (q15_t)0x31c8, (q15_t)0x17d1, (q15_t)0x31d0,
+    (q15_t)0x17db, (q15_t)0x31d8, (q15_t)0x17e5, (q15_t)0x31e0, (q15_t)0x17ef, (q15_t)0x31e8, (q15_t)0x17f8, (q15_t)0x31f0,
+    (q15_t)0x1802, (q15_t)0x31f8, (q15_t)0x180c, (q15_t)0x31ff, (q15_t)0x1816, (q15_t)0x3207, (q15_t)0x1820, (q15_t)0x320f,
+    (q15_t)0x182a, (q15_t)0x3217, (q15_t)0x1833, (q15_t)0x321f, (q15_t)0x183d, (q15_t)0x3227, (q15_t)0x1847, (q15_t)0x322e,
+    (q15_t)0x1851, (q15_t)0x3236, (q15_t)0x185b, (q15_t)0x323e, (q15_t)0x1865, (q15_t)0x3246, (q15_t)0x186f, (q15_t)0x324e,
+    (q15_t)0x1878, (q15_t)0x3255, (q15_t)0x1882, (q15_t)0x325d, (q15_t)0x188c, (q15_t)0x3265, (q15_t)0x1896, (q15_t)0x326d,
+    (q15_t)0x18a0, (q15_t)0x3274, (q15_t)0x18aa, (q15_t)0x327c, (q15_t)0x18b4, (q15_t)0x3284, (q15_t)0x18be, (q15_t)0x328b,
+    (q15_t)0x18c8, (q15_t)0x3293, (q15_t)0x18d2, (q15_t)0x329b, (q15_t)0x18dc, (q15_t)0x32a3, (q15_t)0x18e6, (q15_t)0x32aa,
+    (q15_t)0x18ef, (q15_t)0x32b2, (q15_t)0x18f9, (q15_t)0x32ba, (q15_t)0x1903, (q15_t)0x32c1, (q15_t)0x190d, (q15_t)0x32c9,
+    (q15_t)0x1917, (q15_t)0x32d0, (q15_t)0x1921, (q15_t)0x32d8, (q15_t)0x192b, (q15_t)0x32e0, (q15_t)0x1935, (q15_t)0x32e7,
+    (q15_t)0x193f, (q15_t)0x32ef, (q15_t)0x1949, (q15_t)0x32f7, (q15_t)0x1953, (q15_t)0x32fe, (q15_t)0x195d, (q15_t)0x3306,
+    (q15_t)0x1967, (q15_t)0x330d, (q15_t)0x1971, (q15_t)0x3315, (q15_t)0x197b, (q15_t)0x331d, (q15_t)0x1985, (q15_t)0x3324,
+    (q15_t)0x198f, (q15_t)0x332c, (q15_t)0x199a, (q15_t)0x3333, (q15_t)0x19a4, (q15_t)0x333b, (q15_t)0x19ae, (q15_t)0x3342,
+    (q15_t)0x19b8, (q15_t)0x334a, (q15_t)0x19c2, (q15_t)0x3351, (q15_t)0x19cc, (q15_t)0x3359, (q15_t)0x19d6, (q15_t)0x3360,
+    (q15_t)0x19e0, (q15_t)0x3368, (q15_t)0x19ea, (q15_t)0x336f, (q15_t)0x19f4, (q15_t)0x3377, (q15_t)0x19fe, (q15_t)0x337e,
+    (q15_t)0x1a08, (q15_t)0x3386, (q15_t)0x1a13, (q15_t)0x338d, (q15_t)0x1a1d, (q15_t)0x3395, (q15_t)0x1a27, (q15_t)0x339c,
+    (q15_t)0x1a31, (q15_t)0x33a3, (q15_t)0x1a3b, (q15_t)0x33ab, (q15_t)0x1a45, (q15_t)0x33b2, (q15_t)0x1a4f, (q15_t)0x33ba,
+    (q15_t)0x1a5a, (q15_t)0x33c1, (q15_t)0x1a64, (q15_t)0x33c8, (q15_t)0x1a6e, (q15_t)0x33d0, (q15_t)0x1a78, (q15_t)0x33d7,
+    (q15_t)0x1a82, (q15_t)0x33df, (q15_t)0x1a8c, (q15_t)0x33e6, (q15_t)0x1a97, (q15_t)0x33ed, (q15_t)0x1aa1, (q15_t)0x33f5,
+    (q15_t)0x1aab, (q15_t)0x33fc, (q15_t)0x1ab5, (q15_t)0x3403, (q15_t)0x1abf, (q15_t)0x340b, (q15_t)0x1aca, (q15_t)0x3412,
+    (q15_t)0x1ad4, (q15_t)0x3419, (q15_t)0x1ade, (q15_t)0x3420, (q15_t)0x1ae8, (q15_t)0x3428, (q15_t)0x1af3, (q15_t)0x342f,
+    (q15_t)0x1afd, (q15_t)0x3436, (q15_t)0x1b07, (q15_t)0x343e, (q15_t)0x1b11, (q15_t)0x3445, (q15_t)0x1b1c, (q15_t)0x344c,
+    (q15_t)0x1b26, (q15_t)0x3453, (q15_t)0x1b30, (q15_t)0x345b, (q15_t)0x1b3b, (q15_t)0x3462, (q15_t)0x1b45, (q15_t)0x3469,
+    (q15_t)0x1b4f, (q15_t)0x3470, (q15_t)0x1b59, (q15_t)0x3477, (q15_t)0x1b64, (q15_t)0x347f, (q15_t)0x1b6e, (q15_t)0x3486,
+    (q15_t)0x1b78, (q15_t)0x348d, (q15_t)0x1b83, (q15_t)0x3494, (q15_t)0x1b8d, (q15_t)0x349b, (q15_t)0x1b97, (q15_t)0x34a2,
+    (q15_t)0x1ba2, (q15_t)0x34aa, (q15_t)0x1bac, (q15_t)0x34b1, (q15_t)0x1bb6, (q15_t)0x34b8, (q15_t)0x1bc1, (q15_t)0x34bf,
+    (q15_t)0x1bcb, (q15_t)0x34c6, (q15_t)0x1bd5, (q15_t)0x34cd, (q15_t)0x1be0, (q15_t)0x34d4, (q15_t)0x1bea, (q15_t)0x34db,
+    (q15_t)0x1bf5, (q15_t)0x34e2, (q15_t)0x1bff, (q15_t)0x34ea, (q15_t)0x1c09, (q15_t)0x34f1, (q15_t)0x1c14, (q15_t)0x34f8,
+    (q15_t)0x1c1e, (q15_t)0x34ff, (q15_t)0x1c29, (q15_t)0x3506, (q15_t)0x1c33, (q15_t)0x350d, (q15_t)0x1c3d, (q15_t)0x3514,
+    (q15_t)0x1c48, (q15_t)0x351b, (q15_t)0x1c52, (q15_t)0x3522, (q15_t)0x1c5d, (q15_t)0x3529, (q15_t)0x1c67, (q15_t)0x3530,
+    (q15_t)0x1c72, (q15_t)0x3537, (q15_t)0x1c7c, (q15_t)0x353e, (q15_t)0x1c86, (q15_t)0x3545, (q15_t)0x1c91, (q15_t)0x354c,
+    (q15_t)0x1c9b, (q15_t)0x3553, (q15_t)0x1ca6, (q15_t)0x355a, (q15_t)0x1cb0, (q15_t)0x3561, (q15_t)0x1cbb, (q15_t)0x3567,
+    (q15_t)0x1cc5, (q15_t)0x356e, (q15_t)0x1cd0, (q15_t)0x3575, (q15_t)0x1cda, (q15_t)0x357c, (q15_t)0x1ce5, (q15_t)0x3583,
+    (q15_t)0x1cef, (q15_t)0x358a, (q15_t)0x1cfa, (q15_t)0x3591, (q15_t)0x1d04, (q15_t)0x3598, (q15_t)0x1d0f, (q15_t)0x359f,
+    (q15_t)0x1d19, (q15_t)0x35a5, (q15_t)0x1d24, (q15_t)0x35ac, (q15_t)0x1d2e, (q15_t)0x35b3, (q15_t)0x1d39, (q15_t)0x35ba,
+    (q15_t)0x1d44, (q15_t)0x35c1, (q15_t)0x1d4e, (q15_t)0x35c8, (q15_t)0x1d59, (q15_t)0x35ce, (q15_t)0x1d63, (q15_t)0x35d5,
+    (q15_t)0x1d6e, (q15_t)0x35dc, (q15_t)0x1d78, (q15_t)0x35e3, (q15_t)0x1d83, (q15_t)0x35ea, (q15_t)0x1d8e, (q15_t)0x35f0,
+    (q15_t)0x1d98, (q15_t)0x35f7, (q15_t)0x1da3, (q15_t)0x35fe, (q15_t)0x1dad, (q15_t)0x3605, (q15_t)0x1db8, (q15_t)0x360b,
+    (q15_t)0x1dc3, (q15_t)0x3612, (q15_t)0x1dcd, (q15_t)0x3619, (q15_t)0x1dd8, (q15_t)0x3620, (q15_t)0x1de2, (q15_t)0x3626,
+    (q15_t)0x1ded, (q15_t)0x362d, (q15_t)0x1df8, (q15_t)0x3634, (q15_t)0x1e02, (q15_t)0x363a, (q15_t)0x1e0d, (q15_t)0x3641,
+    (q15_t)0x1e18, (q15_t)0x3648, (q15_t)0x1e22, (q15_t)0x364e, (q15_t)0x1e2d, (q15_t)0x3655, (q15_t)0x1e38, (q15_t)0x365c,
+    (q15_t)0x1e42, (q15_t)0x3662, (q15_t)0x1e4d, (q15_t)0x3669, (q15_t)0x1e58, (q15_t)0x366f, (q15_t)0x1e62, (q15_t)0x3676,
+    (q15_t)0x1e6d, (q15_t)0x367d, (q15_t)0x1e78, (q15_t)0x3683, (q15_t)0x1e83, (q15_t)0x368a, (q15_t)0x1e8d, (q15_t)0x3690,
+    (q15_t)0x1e98, (q15_t)0x3697, (q15_t)0x1ea3, (q15_t)0x369d, (q15_t)0x1ead, (q15_t)0x36a4, (q15_t)0x1eb8, (q15_t)0x36ab,
+    (q15_t)0x1ec3, (q15_t)0x36b1, (q15_t)0x1ece, (q15_t)0x36b8, (q15_t)0x1ed8, (q15_t)0x36be, (q15_t)0x1ee3, (q15_t)0x36c5,
+    (q15_t)0x1eee, (q15_t)0x36cb, (q15_t)0x1ef9, (q15_t)0x36d2, (q15_t)0x1f03, (q15_t)0x36d8, (q15_t)0x1f0e, (q15_t)0x36df,
+    (q15_t)0x1f19, (q15_t)0x36e5, (q15_t)0x1f24, (q15_t)0x36eb, (q15_t)0x1f2f, (q15_t)0x36f2, (q15_t)0x1f39, (q15_t)0x36f8,
+    (q15_t)0x1f44, (q15_t)0x36ff, (q15_t)0x1f4f, (q15_t)0x3705, (q15_t)0x1f5a, (q15_t)0x370c, (q15_t)0x1f65, (q15_t)0x3712,
+    (q15_t)0x1f6f, (q15_t)0x3718, (q15_t)0x1f7a, (q15_t)0x371f, (q15_t)0x1f85, (q15_t)0x3725, (q15_t)0x1f90, (q15_t)0x372c,
+    (q15_t)0x1f9b, (q15_t)0x3732, (q15_t)0x1fa5, (q15_t)0x3738, (q15_t)0x1fb0, (q15_t)0x373f, (q15_t)0x1fbb, (q15_t)0x3745,
+    (q15_t)0x1fc6, (q15_t)0x374b, (q15_t)0x1fd1, (q15_t)0x3752, (q15_t)0x1fdc, (q15_t)0x3758, (q15_t)0x1fe7, (q15_t)0x375e,
+    (q15_t)0x1ff1, (q15_t)0x3765, (q15_t)0x1ffc, (q15_t)0x376b, (q15_t)0x2007, (q15_t)0x3771, (q15_t)0x2012, (q15_t)0x3777,
+    (q15_t)0x201d, (q15_t)0x377e, (q15_t)0x2028, (q15_t)0x3784, (q15_t)0x2033, (q15_t)0x378a, (q15_t)0x203e, (q15_t)0x3790,
+    (q15_t)0x2049, (q15_t)0x3797, (q15_t)0x2054, (q15_t)0x379d, (q15_t)0x205e, (q15_t)0x37a3, (q15_t)0x2069, (q15_t)0x37a9,
+    (q15_t)0x2074, (q15_t)0x37b0, (q15_t)0x207f, (q15_t)0x37b6, (q15_t)0x208a, (q15_t)0x37bc, (q15_t)0x2095, (q15_t)0x37c2,
+    (q15_t)0x20a0, (q15_t)0x37c8, (q15_t)0x20ab, (q15_t)0x37ce, (q15_t)0x20b6, (q15_t)0x37d5, (q15_t)0x20c1, (q15_t)0x37db,
+    (q15_t)0x20cc, (q15_t)0x37e1, (q15_t)0x20d7, (q15_t)0x37e7, (q15_t)0x20e2, (q15_t)0x37ed, (q15_t)0x20ed, (q15_t)0x37f3,
+    (q15_t)0x20f8, (q15_t)0x37f9, (q15_t)0x2103, (q15_t)0x37ff, (q15_t)0x210e, (q15_t)0x3805, (q15_t)0x2119, (q15_t)0x380b,
+    (q15_t)0x2124, (q15_t)0x3812, (q15_t)0x212f, (q15_t)0x3818, (q15_t)0x213a, (q15_t)0x381e, (q15_t)0x2145, (q15_t)0x3824,
+    (q15_t)0x2150, (q15_t)0x382a, (q15_t)0x215b, (q15_t)0x3830, (q15_t)0x2166, (q15_t)0x3836, (q15_t)0x2171, (q15_t)0x383c,
+    (q15_t)0x217c, (q15_t)0x3842, (q15_t)0x2187, (q15_t)0x3848, (q15_t)0x2192, (q15_t)0x384e, (q15_t)0x219d, (q15_t)0x3854,
+    (q15_t)0x21a8, (q15_t)0x385a, (q15_t)0x21b3, (q15_t)0x3860, (q15_t)0x21be, (q15_t)0x3866, (q15_t)0x21ca, (q15_t)0x386b,
+    (q15_t)0x21d5, (q15_t)0x3871, (q15_t)0x21e0, (q15_t)0x3877, (q15_t)0x21eb, (q15_t)0x387d, (q15_t)0x21f6, (q15_t)0x3883,
+    (q15_t)0x2201, (q15_t)0x3889, (q15_t)0x220c, (q15_t)0x388f, (q15_t)0x2217, (q15_t)0x3895, (q15_t)0x2222, (q15_t)0x389b,
+    (q15_t)0x222d, (q15_t)0x38a1, (q15_t)0x2239, (q15_t)0x38a6, (q15_t)0x2244, (q15_t)0x38ac, (q15_t)0x224f, (q15_t)0x38b2,
+    (q15_t)0x225a, (q15_t)0x38b8, (q15_t)0x2265, (q15_t)0x38be, (q15_t)0x2270, (q15_t)0x38c3, (q15_t)0x227b, (q15_t)0x38c9,
+    (q15_t)0x2287, (q15_t)0x38cf, (q15_t)0x2292, (q15_t)0x38d5, (q15_t)0x229d, (q15_t)0x38db, (q15_t)0x22a8, (q15_t)0x38e0,
+    (q15_t)0x22b3, (q15_t)0x38e6, (q15_t)0x22be, (q15_t)0x38ec, (q15_t)0x22ca, (q15_t)0x38f2, (q15_t)0x22d5, (q15_t)0x38f7,
+    (q15_t)0x22e0, (q15_t)0x38fd, (q15_t)0x22eb, (q15_t)0x3903, (q15_t)0x22f6, (q15_t)0x3909, (q15_t)0x2301, (q15_t)0x390e,
+    (q15_t)0x230d, (q15_t)0x3914, (q15_t)0x2318, (q15_t)0x391a, (q15_t)0x2323, (q15_t)0x391f, (q15_t)0x232e, (q15_t)0x3925,
+    (q15_t)0x233a, (q15_t)0x392b, (q15_t)0x2345, (q15_t)0x3930, (q15_t)0x2350, (q15_t)0x3936, (q15_t)0x235b, (q15_t)0x393b,
+    (q15_t)0x2367, (q15_t)0x3941, (q15_t)0x2372, (q15_t)0x3947, (q15_t)0x237d, (q15_t)0x394c, (q15_t)0x2388, (q15_t)0x3952,
+    (q15_t)0x2394, (q15_t)0x3958, (q15_t)0x239f, (q15_t)0x395d, (q15_t)0x23aa, (q15_t)0x3963, (q15_t)0x23b5, (q15_t)0x3968,
+    (q15_t)0x23c1, (q15_t)0x396e, (q15_t)0x23cc, (q15_t)0x3973, (q15_t)0x23d7, (q15_t)0x3979, (q15_t)0x23e2, (q15_t)0x397e,
+    (q15_t)0x23ee, (q15_t)0x3984, (q15_t)0x23f9, (q15_t)0x3989, (q15_t)0x2404, (q15_t)0x398f, (q15_t)0x2410, (q15_t)0x3994,
+    (q15_t)0x241b, (q15_t)0x399a, (q15_t)0x2426, (q15_t)0x399f, (q15_t)0x2432, (q15_t)0x39a5, (q15_t)0x243d, (q15_t)0x39aa,
+    (q15_t)0x2448, (q15_t)0x39b0, (q15_t)0x2454, (q15_t)0x39b5, (q15_t)0x245f, (q15_t)0x39bb, (q15_t)0x246a, (q15_t)0x39c0,
+    (q15_t)0x2476, (q15_t)0x39c5, (q15_t)0x2481, (q15_t)0x39cb, (q15_t)0x248c, (q15_t)0x39d0, (q15_t)0x2498, (q15_t)0x39d6,
+    (q15_t)0x24a3, (q15_t)0x39db, (q15_t)0x24ae, (q15_t)0x39e0, (q15_t)0x24ba, (q15_t)0x39e6, (q15_t)0x24c5, (q15_t)0x39eb,
+    (q15_t)0x24d0, (q15_t)0x39f0, (q15_t)0x24dc, (q15_t)0x39f6, (q15_t)0x24e7, (q15_t)0x39fb, (q15_t)0x24f3, (q15_t)0x3a00,
+    (q15_t)0x24fe, (q15_t)0x3a06, (q15_t)0x2509, (q15_t)0x3a0b, (q15_t)0x2515, (q15_t)0x3a10, (q15_t)0x2520, (q15_t)0x3a16,
+    (q15_t)0x252c, (q15_t)0x3a1b, (q15_t)0x2537, (q15_t)0x3a20, (q15_t)0x2542, (q15_t)0x3a25, (q15_t)0x254e, (q15_t)0x3a2b,
+    (q15_t)0x2559, (q15_t)0x3a30, (q15_t)0x2565, (q15_t)0x3a35, (q15_t)0x2570, (q15_t)0x3a3a, (q15_t)0x257c, (q15_t)0x3a3f,
+    (q15_t)0x2587, (q15_t)0x3a45, (q15_t)0x2592, (q15_t)0x3a4a, (q15_t)0x259e, (q15_t)0x3a4f, (q15_t)0x25a9, (q15_t)0x3a54,
+    (q15_t)0x25b5, (q15_t)0x3a59, (q15_t)0x25c0, (q15_t)0x3a5f, (q15_t)0x25cc, (q15_t)0x3a64, (q15_t)0x25d7, (q15_t)0x3a69,
+    (q15_t)0x25e3, (q15_t)0x3a6e, (q15_t)0x25ee, (q15_t)0x3a73, (q15_t)0x25fa, (q15_t)0x3a78, (q15_t)0x2605, (q15_t)0x3a7d,
+    (q15_t)0x2611, (q15_t)0x3a82, (q15_t)0x261c, (q15_t)0x3a88, (q15_t)0x2628, (q15_t)0x3a8d, (q15_t)0x2633, (q15_t)0x3a92,
+    (q15_t)0x263f, (q15_t)0x3a97, (q15_t)0x264a, (q15_t)0x3a9c, (q15_t)0x2656, (q15_t)0x3aa1, (q15_t)0x2661, (q15_t)0x3aa6,
+    (q15_t)0x266d, (q15_t)0x3aab, (q15_t)0x2678, (q15_t)0x3ab0, (q15_t)0x2684, (q15_t)0x3ab5, (q15_t)0x268f, (q15_t)0x3aba,
+    (q15_t)0x269b, (q15_t)0x3abf, (q15_t)0x26a6, (q15_t)0x3ac4, (q15_t)0x26b2, (q15_t)0x3ac9, (q15_t)0x26bd, (q15_t)0x3ace,
+    (q15_t)0x26c9, (q15_t)0x3ad3, (q15_t)0x26d4, (q15_t)0x3ad8, (q15_t)0x26e0, (q15_t)0x3add, (q15_t)0x26ec, (q15_t)0x3ae2,
+    (q15_t)0x26f7, (q15_t)0x3ae6, (q15_t)0x2703, (q15_t)0x3aeb, (q15_t)0x270e, (q15_t)0x3af0, (q15_t)0x271a, (q15_t)0x3af5,
+    (q15_t)0x2725, (q15_t)0x3afa, (q15_t)0x2731, (q15_t)0x3aff, (q15_t)0x273d, (q15_t)0x3b04, (q15_t)0x2748, (q15_t)0x3b09,
+    (q15_t)0x2754, (q15_t)0x3b0e, (q15_t)0x275f, (q15_t)0x3b12, (q15_t)0x276b, (q15_t)0x3b17, (q15_t)0x2777, (q15_t)0x3b1c,
+    (q15_t)0x2782, (q15_t)0x3b21, (q15_t)0x278e, (q15_t)0x3b26, (q15_t)0x2799, (q15_t)0x3b2a, (q15_t)0x27a5, (q15_t)0x3b2f,
+    (q15_t)0x27b1, (q15_t)0x3b34, (q15_t)0x27bc, (q15_t)0x3b39, (q15_t)0x27c8, (q15_t)0x3b3e, (q15_t)0x27d3, (q15_t)0x3b42,
+    (q15_t)0x27df, (q15_t)0x3b47, (q15_t)0x27eb, (q15_t)0x3b4c, (q15_t)0x27f6, (q15_t)0x3b50, (q15_t)0x2802, (q15_t)0x3b55,
+    (q15_t)0x280e, (q15_t)0x3b5a, (q15_t)0x2819, (q15_t)0x3b5f, (q15_t)0x2825, (q15_t)0x3b63, (q15_t)0x2831, (q15_t)0x3b68,
+    (q15_t)0x283c, (q15_t)0x3b6d, (q15_t)0x2848, (q15_t)0x3b71, (q15_t)0x2854, (q15_t)0x3b76, (q15_t)0x285f, (q15_t)0x3b7b,
+    (q15_t)0x286b, (q15_t)0x3b7f, (q15_t)0x2877, (q15_t)0x3b84, (q15_t)0x2882, (q15_t)0x3b88, (q15_t)0x288e, (q15_t)0x3b8d,
+    (q15_t)0x289a, (q15_t)0x3b92, (q15_t)0x28a5, (q15_t)0x3b96, (q15_t)0x28b1, (q15_t)0x3b9b, (q15_t)0x28bd, (q15_t)0x3b9f,
+    (q15_t)0x28c9, (q15_t)0x3ba4, (q15_t)0x28d4, (q15_t)0x3ba9, (q15_t)0x28e0, (q15_t)0x3bad, (q15_t)0x28ec, (q15_t)0x3bb2,
+    (q15_t)0x28f7, (q15_t)0x3bb6, (q15_t)0x2903, (q15_t)0x3bbb, (q15_t)0x290f, (q15_t)0x3bbf, (q15_t)0x291b, (q15_t)0x3bc4,
+    (q15_t)0x2926, (q15_t)0x3bc8, (q15_t)0x2932, (q15_t)0x3bcd, (q15_t)0x293e, (q15_t)0x3bd1, (q15_t)0x294a, (q15_t)0x3bd6,
+    (q15_t)0x2955, (q15_t)0x3bda, (q15_t)0x2961, (q15_t)0x3bde, (q15_t)0x296d, (q15_t)0x3be3, (q15_t)0x2979, (q15_t)0x3be7,
+    (q15_t)0x2984, (q15_t)0x3bec, (q15_t)0x2990, (q15_t)0x3bf0, (q15_t)0x299c, (q15_t)0x3bf5, (q15_t)0x29a8, (q15_t)0x3bf9,
+    (q15_t)0x29b4, (q15_t)0x3bfd, (q15_t)0x29bf, (q15_t)0x3c02, (q15_t)0x29cb, (q15_t)0x3c06, (q15_t)0x29d7, (q15_t)0x3c0a,
+    (q15_t)0x29e3, (q15_t)0x3c0f, (q15_t)0x29ee, (q15_t)0x3c13, (q15_t)0x29fa, (q15_t)0x3c17, (q15_t)0x2a06, (q15_t)0x3c1c,
+    (q15_t)0x2a12, (q15_t)0x3c20, (q15_t)0x2a1e, (q15_t)0x3c24, (q15_t)0x2a29, (q15_t)0x3c29, (q15_t)0x2a35, (q15_t)0x3c2d,
+    (q15_t)0x2a41, (q15_t)0x3c31, (q15_t)0x2a4d, (q15_t)0x3c36, (q15_t)0x2a59, (q15_t)0x3c3a, (q15_t)0x2a65, (q15_t)0x3c3e,
+    (q15_t)0x2a70, (q15_t)0x3c42, (q15_t)0x2a7c, (q15_t)0x3c46, (q15_t)0x2a88, (q15_t)0x3c4b, (q15_t)0x2a94, (q15_t)0x3c4f,
+    (q15_t)0x2aa0, (q15_t)0x3c53, (q15_t)0x2aac, (q15_t)0x3c57, (q15_t)0x2ab7, (q15_t)0x3c5b, (q15_t)0x2ac3, (q15_t)0x3c60,
+    (q15_t)0x2acf, (q15_t)0x3c64, (q15_t)0x2adb, (q15_t)0x3c68, (q15_t)0x2ae7, (q15_t)0x3c6c, (q15_t)0x2af3, (q15_t)0x3c70,
+    (q15_t)0x2aff, (q15_t)0x3c74, (q15_t)0x2b0a, (q15_t)0x3c79, (q15_t)0x2b16, (q15_t)0x3c7d, (q15_t)0x2b22, (q15_t)0x3c81,
+    (q15_t)0x2b2e, (q15_t)0x3c85, (q15_t)0x2b3a, (q15_t)0x3c89, (q15_t)0x2b46, (q15_t)0x3c8d, (q15_t)0x2b52, (q15_t)0x3c91,
+    (q15_t)0x2b5e, (q15_t)0x3c95, (q15_t)0x2b6a, (q15_t)0x3c99, (q15_t)0x2b75, (q15_t)0x3c9d, (q15_t)0x2b81, (q15_t)0x3ca1,
+    (q15_t)0x2b8d, (q15_t)0x3ca5, (q15_t)0x2b99, (q15_t)0x3ca9, (q15_t)0x2ba5, (q15_t)0x3cad, (q15_t)0x2bb1, (q15_t)0x3cb1,
+    (q15_t)0x2bbd, (q15_t)0x3cb5, (q15_t)0x2bc9, (q15_t)0x3cb9, (q15_t)0x2bd5, (q15_t)0x3cbd, (q15_t)0x2be1, (q15_t)0x3cc1,
+    (q15_t)0x2bed, (q15_t)0x3cc5, (q15_t)0x2bf9, (q15_t)0x3cc9, (q15_t)0x2c05, (q15_t)0x3ccd, (q15_t)0x2c10, (q15_t)0x3cd1,
+    (q15_t)0x2c1c, (q15_t)0x3cd5, (q15_t)0x2c28, (q15_t)0x3cd9, (q15_t)0x2c34, (q15_t)0x3cdd, (q15_t)0x2c40, (q15_t)0x3ce0,
+    (q15_t)0x2c4c, (q15_t)0x3ce4, (q15_t)0x2c58, (q15_t)0x3ce8, (q15_t)0x2c64, (q15_t)0x3cec, (q15_t)0x2c70, (q15_t)0x3cf0,
+    (q15_t)0x2c7c, (q15_t)0x3cf4, (q15_t)0x2c88, (q15_t)0x3cf8, (q15_t)0x2c94, (q15_t)0x3cfb, (q15_t)0x2ca0, (q15_t)0x3cff,
+    (q15_t)0x2cac, (q15_t)0x3d03, (q15_t)0x2cb8, (q15_t)0x3d07, (q15_t)0x2cc4, (q15_t)0x3d0b, (q15_t)0x2cd0, (q15_t)0x3d0e,
+    (q15_t)0x2cdc, (q15_t)0x3d12, (q15_t)0x2ce8, (q15_t)0x3d16, (q15_t)0x2cf4, (q15_t)0x3d1a, (q15_t)0x2d00, (q15_t)0x3d1d,
+    (q15_t)0x2d0c, (q15_t)0x3d21, (q15_t)0x2d18, (q15_t)0x3d25, (q15_t)0x2d24, (q15_t)0x3d28, (q15_t)0x2d30, (q15_t)0x3d2c,
+    (q15_t)0x2d3c, (q15_t)0x3d30, (q15_t)0x2d48, (q15_t)0x3d34, (q15_t)0x2d54, (q15_t)0x3d37, (q15_t)0x2d60, (q15_t)0x3d3b,
+    (q15_t)0x2d6c, (q15_t)0x3d3f, (q15_t)0x2d78, (q15_t)0x3d42, (q15_t)0x2d84, (q15_t)0x3d46, (q15_t)0x2d90, (q15_t)0x3d49,
+    (q15_t)0x2d9c, (q15_t)0x3d4d, (q15_t)0x2da8, (q15_t)0x3d51, (q15_t)0x2db4, (q15_t)0x3d54, (q15_t)0x2dc0, (q15_t)0x3d58,
+    (q15_t)0x2dcc, (q15_t)0x3d5b, (q15_t)0x2dd8, (q15_t)0x3d5f, (q15_t)0x2de4, (q15_t)0x3d63, (q15_t)0x2df0, (q15_t)0x3d66,
+    (q15_t)0x2dfc, (q15_t)0x3d6a, (q15_t)0x2e09, (q15_t)0x3d6d, (q15_t)0x2e15, (q15_t)0x3d71, (q15_t)0x2e21, (q15_t)0x3d74,
+    (q15_t)0x2e2d, (q15_t)0x3d78, (q15_t)0x2e39, (q15_t)0x3d7b, (q15_t)0x2e45, (q15_t)0x3d7f, (q15_t)0x2e51, (q15_t)0x3d82,
+    (q15_t)0x2e5d, (q15_t)0x3d86, (q15_t)0x2e69, (q15_t)0x3d89, (q15_t)0x2e75, (q15_t)0x3d8d, (q15_t)0x2e81, (q15_t)0x3d90,
+    (q15_t)0x2e8d, (q15_t)0x3d93, (q15_t)0x2e99, (q15_t)0x3d97, (q15_t)0x2ea6, (q15_t)0x3d9a, (q15_t)0x2eb2, (q15_t)0x3d9e,
+    (q15_t)0x2ebe, (q15_t)0x3da1, (q15_t)0x2eca, (q15_t)0x3da4, (q15_t)0x2ed6, (q15_t)0x3da8, (q15_t)0x2ee2, (q15_t)0x3dab,
+    (q15_t)0x2eee, (q15_t)0x3daf, (q15_t)0x2efa, (q15_t)0x3db2, (q15_t)0x2f06, (q15_t)0x3db5, (q15_t)0x2f13, (q15_t)0x3db9,
+    (q15_t)0x2f1f, (q15_t)0x3dbc, (q15_t)0x2f2b, (q15_t)0x3dbf, (q15_t)0x2f37, (q15_t)0x3dc2, (q15_t)0x2f43, (q15_t)0x3dc6,
+    (q15_t)0x2f4f, (q15_t)0x3dc9, (q15_t)0x2f5b, (q15_t)0x3dcc, (q15_t)0x2f67, (q15_t)0x3dd0, (q15_t)0x2f74, (q15_t)0x3dd3,
+    (q15_t)0x2f80, (q15_t)0x3dd6, (q15_t)0x2f8c, (q15_t)0x3dd9, (q15_t)0x2f98, (q15_t)0x3ddd, (q15_t)0x2fa4, (q15_t)0x3de0,
+    (q15_t)0x2fb0, (q15_t)0x3de3, (q15_t)0x2fbc, (q15_t)0x3de6, (q15_t)0x2fc9, (q15_t)0x3de9, (q15_t)0x2fd5, (q15_t)0x3ded,
+    (q15_t)0x2fe1, (q15_t)0x3df0, (q15_t)0x2fed, (q15_t)0x3df3, (q15_t)0x2ff9, (q15_t)0x3df6, (q15_t)0x3005, (q15_t)0x3df9,
+    (q15_t)0x3012, (q15_t)0x3dfc, (q15_t)0x301e, (q15_t)0x3dff, (q15_t)0x302a, (q15_t)0x3e03, (q15_t)0x3036, (q15_t)0x3e06,
+    (q15_t)0x3042, (q15_t)0x3e09, (q15_t)0x304e, (q15_t)0x3e0c, (q15_t)0x305b, (q15_t)0x3e0f, (q15_t)0x3067, (q15_t)0x3e12,
+    (q15_t)0x3073, (q15_t)0x3e15, (q15_t)0x307f, (q15_t)0x3e18, (q15_t)0x308b, (q15_t)0x3e1b, (q15_t)0x3098, (q15_t)0x3e1e,
+    (q15_t)0x30a4, (q15_t)0x3e21, (q15_t)0x30b0, (q15_t)0x3e24, (q15_t)0x30bc, (q15_t)0x3e27, (q15_t)0x30c8, (q15_t)0x3e2a,
+    (q15_t)0x30d5, (q15_t)0x3e2d, (q15_t)0x30e1, (q15_t)0x3e30, (q15_t)0x30ed, (q15_t)0x3e33, (q15_t)0x30f9, (q15_t)0x3e36,
+    (q15_t)0x3105, (q15_t)0x3e39, (q15_t)0x3112, (q15_t)0x3e3c, (q15_t)0x311e, (q15_t)0x3e3f, (q15_t)0x312a, (q15_t)0x3e42,
+    (q15_t)0x3136, (q15_t)0x3e45, (q15_t)0x3143, (q15_t)0x3e48, (q15_t)0x314f, (q15_t)0x3e4a, (q15_t)0x315b, (q15_t)0x3e4d,
+    (q15_t)0x3167, (q15_t)0x3e50, (q15_t)0x3174, (q15_t)0x3e53, (q15_t)0x3180, (q15_t)0x3e56, (q15_t)0x318c, (q15_t)0x3e59,
+    (q15_t)0x3198, (q15_t)0x3e5c, (q15_t)0x31a4, (q15_t)0x3e5e, (q15_t)0x31b1, (q15_t)0x3e61, (q15_t)0x31bd, (q15_t)0x3e64,
+    (q15_t)0x31c9, (q15_t)0x3e67, (q15_t)0x31d5, (q15_t)0x3e6a, (q15_t)0x31e2, (q15_t)0x3e6c, (q15_t)0x31ee, (q15_t)0x3e6f,
+    (q15_t)0x31fa, (q15_t)0x3e72, (q15_t)0x3207, (q15_t)0x3e75, (q15_t)0x3213, (q15_t)0x3e77, (q15_t)0x321f, (q15_t)0x3e7a,
+    (q15_t)0x322b, (q15_t)0x3e7d, (q15_t)0x3238, (q15_t)0x3e80, (q15_t)0x3244, (q15_t)0x3e82, (q15_t)0x3250, (q15_t)0x3e85,
+    (q15_t)0x325c, (q15_t)0x3e88, (q15_t)0x3269, (q15_t)0x3e8a, (q15_t)0x3275, (q15_t)0x3e8d, (q15_t)0x3281, (q15_t)0x3e90,
+    (q15_t)0x328e, (q15_t)0x3e92, (q15_t)0x329a, (q15_t)0x3e95, (q15_t)0x32a6, (q15_t)0x3e98, (q15_t)0x32b2, (q15_t)0x3e9a,
+    (q15_t)0x32bf, (q15_t)0x3e9d, (q15_t)0x32cb, (q15_t)0x3e9f, (q15_t)0x32d7, (q15_t)0x3ea2, (q15_t)0x32e4, (q15_t)0x3ea5,
+    (q15_t)0x32f0, (q15_t)0x3ea7, (q15_t)0x32fc, (q15_t)0x3eaa, (q15_t)0x3308, (q15_t)0x3eac, (q15_t)0x3315, (q15_t)0x3eaf,
+    (q15_t)0x3321, (q15_t)0x3eb1, (q15_t)0x332d, (q15_t)0x3eb4, (q15_t)0x333a, (q15_t)0x3eb6, (q15_t)0x3346, (q15_t)0x3eb9,
+    (q15_t)0x3352, (q15_t)0x3ebb, (q15_t)0x335f, (q15_t)0x3ebe, (q15_t)0x336b, (q15_t)0x3ec0, (q15_t)0x3377, (q15_t)0x3ec3,
+    (q15_t)0x3384, (q15_t)0x3ec5, (q15_t)0x3390, (q15_t)0x3ec8, (q15_t)0x339c, (q15_t)0x3eca, (q15_t)0x33a9, (q15_t)0x3ecc,
+    (q15_t)0x33b5, (q15_t)0x3ecf, (q15_t)0x33c1, (q15_t)0x3ed1, (q15_t)0x33ce, (q15_t)0x3ed4, (q15_t)0x33da, (q15_t)0x3ed6,
+    (q15_t)0x33e6, (q15_t)0x3ed8, (q15_t)0x33f3, (q15_t)0x3edb, (q15_t)0x33ff, (q15_t)0x3edd, (q15_t)0x340b, (q15_t)0x3ee0,
+    (q15_t)0x3418, (q15_t)0x3ee2, (q15_t)0x3424, (q15_t)0x3ee4, (q15_t)0x3430, (q15_t)0x3ee7, (q15_t)0x343d, (q15_t)0x3ee9,
+    (q15_t)0x3449, (q15_t)0x3eeb, (q15_t)0x3455, (q15_t)0x3eed, (q15_t)0x3462, (q15_t)0x3ef0, (q15_t)0x346e, (q15_t)0x3ef2,
+    (q15_t)0x347b, (q15_t)0x3ef4, (q15_t)0x3487, (q15_t)0x3ef7, (q15_t)0x3493, (q15_t)0x3ef9, (q15_t)0x34a0, (q15_t)0x3efb,
+    (q15_t)0x34ac, (q15_t)0x3efd, (q15_t)0x34b8, (q15_t)0x3f00, (q15_t)0x34c5, (q15_t)0x3f02, (q15_t)0x34d1, (q15_t)0x3f04,
+    (q15_t)0x34dd, (q15_t)0x3f06, (q15_t)0x34ea, (q15_t)0x3f08, (q15_t)0x34f6, (q15_t)0x3f0a, (q15_t)0x3503, (q15_t)0x3f0d,
+    (q15_t)0x350f, (q15_t)0x3f0f, (q15_t)0x351b, (q15_t)0x3f11, (q15_t)0x3528, (q15_t)0x3f13, (q15_t)0x3534, (q15_t)0x3f15,
+    (q15_t)0x3540, (q15_t)0x3f17, (q15_t)0x354d, (q15_t)0x3f19, (q15_t)0x3559, (q15_t)0x3f1c, (q15_t)0x3566, (q15_t)0x3f1e,
+    (q15_t)0x3572, (q15_t)0x3f20, (q15_t)0x357e, (q15_t)0x3f22, (q15_t)0x358b, (q15_t)0x3f24, (q15_t)0x3597, (q15_t)0x3f26,
+    (q15_t)0x35a4, (q15_t)0x3f28, (q15_t)0x35b0, (q15_t)0x3f2a, (q15_t)0x35bc, (q15_t)0x3f2c, (q15_t)0x35c9, (q15_t)0x3f2e,
+    (q15_t)0x35d5, (q15_t)0x3f30, (q15_t)0x35e2, (q15_t)0x3f32, (q15_t)0x35ee, (q15_t)0x3f34, (q15_t)0x35fa, (q15_t)0x3f36,
+    (q15_t)0x3607, (q15_t)0x3f38, (q15_t)0x3613, (q15_t)0x3f3a, (q15_t)0x3620, (q15_t)0x3f3c, (q15_t)0x362c, (q15_t)0x3f3e,
+    (q15_t)0x3639, (q15_t)0x3f40, (q15_t)0x3645, (q15_t)0x3f42, (q15_t)0x3651, (q15_t)0x3f43, (q15_t)0x365e, (q15_t)0x3f45,
+    (q15_t)0x366a, (q15_t)0x3f47, (q15_t)0x3677, (q15_t)0x3f49, (q15_t)0x3683, (q15_t)0x3f4b, (q15_t)0x3690, (q15_t)0x3f4d,
+    (q15_t)0x369c, (q15_t)0x3f4f, (q15_t)0x36a8, (q15_t)0x3f51, (q15_t)0x36b5, (q15_t)0x3f52, (q15_t)0x36c1, (q15_t)0x3f54,
+    (q15_t)0x36ce, (q15_t)0x3f56, (q15_t)0x36da, (q15_t)0x3f58, (q15_t)0x36e7, (q15_t)0x3f5a, (q15_t)0x36f3, (q15_t)0x3f5b,
+    (q15_t)0x36ff, (q15_t)0x3f5d, (q15_t)0x370c, (q15_t)0x3f5f, (q15_t)0x3718, (q15_t)0x3f61, (q15_t)0x3725, (q15_t)0x3f62,
+    (q15_t)0x3731, (q15_t)0x3f64, (q15_t)0x373e, (q15_t)0x3f66, (q15_t)0x374a, (q15_t)0x3f68, (q15_t)0x3757, (q15_t)0x3f69,
+    (q15_t)0x3763, (q15_t)0x3f6b, (q15_t)0x376f, (q15_t)0x3f6d, (q15_t)0x377c, (q15_t)0x3f6e, (q15_t)0x3788, (q15_t)0x3f70,
+    (q15_t)0x3795, (q15_t)0x3f72, (q15_t)0x37a1, (q15_t)0x3f73, (q15_t)0x37ae, (q15_t)0x3f75, (q15_t)0x37ba, (q15_t)0x3f77,
+    (q15_t)0x37c7, (q15_t)0x3f78, (q15_t)0x37d3, (q15_t)0x3f7a, (q15_t)0x37e0, (q15_t)0x3f7b, (q15_t)0x37ec, (q15_t)0x3f7d,
+    (q15_t)0x37f9, (q15_t)0x3f7f, (q15_t)0x3805, (q15_t)0x3f80, (q15_t)0x3811, (q15_t)0x3f82, (q15_t)0x381e, (q15_t)0x3f83,
+    (q15_t)0x382a, (q15_t)0x3f85, (q15_t)0x3837, (q15_t)0x3f86, (q15_t)0x3843, (q15_t)0x3f88, (q15_t)0x3850, (q15_t)0x3f89,
+    (q15_t)0x385c, (q15_t)0x3f8b, (q15_t)0x3869, (q15_t)0x3f8c, (q15_t)0x3875, (q15_t)0x3f8e, (q15_t)0x3882, (q15_t)0x3f8f,
+    (q15_t)0x388e, (q15_t)0x3f91, (q15_t)0x389b, (q15_t)0x3f92, (q15_t)0x38a7, (q15_t)0x3f94, (q15_t)0x38b4, (q15_t)0x3f95,
+    (q15_t)0x38c0, (q15_t)0x3f97, (q15_t)0x38cd, (q15_t)0x3f98, (q15_t)0x38d9, (q15_t)0x3f99, (q15_t)0x38e6, (q15_t)0x3f9b,
+    (q15_t)0x38f2, (q15_t)0x3f9c, (q15_t)0x38ff, (q15_t)0x3f9e, (q15_t)0x390b, (q15_t)0x3f9f, (q15_t)0x3918, (q15_t)0x3fa0,
+    (q15_t)0x3924, (q15_t)0x3fa2, (q15_t)0x3931, (q15_t)0x3fa3, (q15_t)0x393d, (q15_t)0x3fa4, (q15_t)0x394a, (q15_t)0x3fa6,
+    (q15_t)0x3956, (q15_t)0x3fa7, (q15_t)0x3963, (q15_t)0x3fa8, (q15_t)0x396f, (q15_t)0x3faa, (q15_t)0x397c, (q15_t)0x3fab,
+    (q15_t)0x3988, (q15_t)0x3fac, (q15_t)0x3995, (q15_t)0x3fad, (q15_t)0x39a1, (q15_t)0x3faf, (q15_t)0x39ae, (q15_t)0x3fb0,
+    (q15_t)0x39ba, (q15_t)0x3fb1, (q15_t)0x39c7, (q15_t)0x3fb2, (q15_t)0x39d3, (q15_t)0x3fb4, (q15_t)0x39e0, (q15_t)0x3fb5,
+    (q15_t)0x39ec, (q15_t)0x3fb6, (q15_t)0x39f9, (q15_t)0x3fb7, (q15_t)0x3a05, (q15_t)0x3fb8, (q15_t)0x3a12, (q15_t)0x3fb9,
+    (q15_t)0x3a1e, (q15_t)0x3fbb, (q15_t)0x3a2b, (q15_t)0x3fbc, (q15_t)0x3a37, (q15_t)0x3fbd, (q15_t)0x3a44, (q15_t)0x3fbe,
+    (q15_t)0x3a50, (q15_t)0x3fbf, (q15_t)0x3a5d, (q15_t)0x3fc0, (q15_t)0x3a69, (q15_t)0x3fc1, (q15_t)0x3a76, (q15_t)0x3fc3,
+    (q15_t)0x3a82, (q15_t)0x3fc4, (q15_t)0x3a8f, (q15_t)0x3fc5, (q15_t)0x3a9b, (q15_t)0x3fc6, (q15_t)0x3aa8, (q15_t)0x3fc7,
+    (q15_t)0x3ab4, (q15_t)0x3fc8, (q15_t)0x3ac1, (q15_t)0x3fc9, (q15_t)0x3acd, (q15_t)0x3fca, (q15_t)0x3ada, (q15_t)0x3fcb,
+    (q15_t)0x3ae6, (q15_t)0x3fcc, (q15_t)0x3af3, (q15_t)0x3fcd, (q15_t)0x3b00, (q15_t)0x3fce, (q15_t)0x3b0c, (q15_t)0x3fcf,
+    (q15_t)0x3b19, (q15_t)0x3fd0, (q15_t)0x3b25, (q15_t)0x3fd1, (q15_t)0x3b32, (q15_t)0x3fd2, (q15_t)0x3b3e, (q15_t)0x3fd3,
+    (q15_t)0x3b4b, (q15_t)0x3fd4, (q15_t)0x3b57, (q15_t)0x3fd5, (q15_t)0x3b64, (q15_t)0x3fd5, (q15_t)0x3b70, (q15_t)0x3fd6,
+    (q15_t)0x3b7d, (q15_t)0x3fd7, (q15_t)0x3b89, (q15_t)0x3fd8, (q15_t)0x3b96, (q15_t)0x3fd9, (q15_t)0x3ba2, (q15_t)0x3fda,
+    (q15_t)0x3baf, (q15_t)0x3fdb, (q15_t)0x3bbc, (q15_t)0x3fdc, (q15_t)0x3bc8, (q15_t)0x3fdc, (q15_t)0x3bd5, (q15_t)0x3fdd,
+    (q15_t)0x3be1, (q15_t)0x3fde, (q15_t)0x3bee, (q15_t)0x3fdf, (q15_t)0x3bfa, (q15_t)0x3fe0, (q15_t)0x3c07, (q15_t)0x3fe0,
+    (q15_t)0x3c13, (q15_t)0x3fe1, (q15_t)0x3c20, (q15_t)0x3fe2, (q15_t)0x3c2c, (q15_t)0x3fe3, (q15_t)0x3c39, (q15_t)0x3fe3,
+    (q15_t)0x3c45, (q15_t)0x3fe4, (q15_t)0x3c52, (q15_t)0x3fe5, (q15_t)0x3c5f, (q15_t)0x3fe6, (q15_t)0x3c6b, (q15_t)0x3fe6,
+    (q15_t)0x3c78, (q15_t)0x3fe7, (q15_t)0x3c84, (q15_t)0x3fe8, (q15_t)0x3c91, (q15_t)0x3fe8, (q15_t)0x3c9d, (q15_t)0x3fe9,
+    (q15_t)0x3caa, (q15_t)0x3fea, (q15_t)0x3cb6, (q15_t)0x3fea, (q15_t)0x3cc3, (q15_t)0x3feb, (q15_t)0x3cd0, (q15_t)0x3fec,
+    (q15_t)0x3cdc, (q15_t)0x3fec, (q15_t)0x3ce9, (q15_t)0x3fed, (q15_t)0x3cf5, (q15_t)0x3fed, (q15_t)0x3d02, (q15_t)0x3fee,
+    (q15_t)0x3d0e, (q15_t)0x3fef, (q15_t)0x3d1b, (q15_t)0x3fef, (q15_t)0x3d27, (q15_t)0x3ff0, (q15_t)0x3d34, (q15_t)0x3ff0,
+    (q15_t)0x3d40, (q15_t)0x3ff1, (q15_t)0x3d4d, (q15_t)0x3ff1, (q15_t)0x3d5a, (q15_t)0x3ff2, (q15_t)0x3d66, (q15_t)0x3ff2,
+    (q15_t)0x3d73, (q15_t)0x3ff3, (q15_t)0x3d7f, (q15_t)0x3ff3, (q15_t)0x3d8c, (q15_t)0x3ff4, (q15_t)0x3d98, (q15_t)0x3ff4,
+    (q15_t)0x3da5, (q15_t)0x3ff5, (q15_t)0x3db2, (q15_t)0x3ff5, (q15_t)0x3dbe, (q15_t)0x3ff6, (q15_t)0x3dcb, (q15_t)0x3ff6,
+    (q15_t)0x3dd7, (q15_t)0x3ff7, (q15_t)0x3de4, (q15_t)0x3ff7, (q15_t)0x3df0, (q15_t)0x3ff7, (q15_t)0x3dfd, (q15_t)0x3ff8,
+    (q15_t)0x3e09, (q15_t)0x3ff8, (q15_t)0x3e16, (q15_t)0x3ff9, (q15_t)0x3e23, (q15_t)0x3ff9, (q15_t)0x3e2f, (q15_t)0x3ff9,
+    (q15_t)0x3e3c, (q15_t)0x3ffa, (q15_t)0x3e48, (q15_t)0x3ffa, (q15_t)0x3e55, (q15_t)0x3ffa, (q15_t)0x3e61, (q15_t)0x3ffb,
+    (q15_t)0x3e6e, (q15_t)0x3ffb, (q15_t)0x3e7a, (q15_t)0x3ffb, (q15_t)0x3e87, (q15_t)0x3ffc, (q15_t)0x3e94, (q15_t)0x3ffc,
+    (q15_t)0x3ea0, (q15_t)0x3ffc, (q15_t)0x3ead, (q15_t)0x3ffc, (q15_t)0x3eb9, (q15_t)0x3ffd, (q15_t)0x3ec6, (q15_t)0x3ffd,
+    (q15_t)0x3ed2, (q15_t)0x3ffd, (q15_t)0x3edf, (q15_t)0x3ffd, (q15_t)0x3eec, (q15_t)0x3ffe, (q15_t)0x3ef8, (q15_t)0x3ffe,
+    (q15_t)0x3f05, (q15_t)0x3ffe, (q15_t)0x3f11, (q15_t)0x3ffe, (q15_t)0x3f1e, (q15_t)0x3ffe, (q15_t)0x3f2a, (q15_t)0x3fff,
+    (q15_t)0x3f37, (q15_t)0x3fff, (q15_t)0x3f44, (q15_t)0x3fff, (q15_t)0x3f50, (q15_t)0x3fff, (q15_t)0x3f5d, (q15_t)0x3fff,
+    (q15_t)0x3f69, (q15_t)0x3fff, (q15_t)0x3f76, (q15_t)0x3fff, (q15_t)0x3f82, (q15_t)0x4000, (q15_t)0x3f8f, (q15_t)0x4000,
+    (q15_t)0x3f9b, (q15_t)0x4000, (q15_t)0x3fa8, (q15_t)0x4000, (q15_t)0x3fb5, (q15_t)0x4000, (q15_t)0x3fc1, (q15_t)0x4000,
+    (q15_t)0x3fce, (q15_t)0x4000, (q15_t)0x3fda, (q15_t)0x4000, (q15_t)0x3fe7, (q15_t)0x4000, (q15_t)0x3ff3, (q15_t)0x4000,
+};
+
+/**
+  @par
+  Generation of real_CoefB array:
+  @par
+  n = 4096
+  <pre>for (i = 0; i < n; i++)
+  {
+     pBTable[2 * i]     = 0.5 * (1.0 + sin (2 * PI / (double) (2 * n) * (double) i));
+     pBTable[2 * i + 1] = 0.5 * (1.0 * cos (2 * PI / (double) (2 * n) * (double) i));
+  }</pre>
+  @par
+  Convert to fixed point Q15 format
+        round(pBTable[i] * pow(2, 15))
+*/
+const q15_t __ALIGNED(4) realCoefBQ15[8192] = {
+    (q15_t)0x4000, (q15_t)0x4000, (q15_t)0x400d, (q15_t)0x4000, (q15_t)0x4019, (q15_t)0x4000, (q15_t)0x4026, (q15_t)0x4000,
+    (q15_t)0x4032, (q15_t)0x4000, (q15_t)0x403f, (q15_t)0x4000, (q15_t)0x404b, (q15_t)0x4000, (q15_t)0x4058, (q15_t)0x4000,
+    (q15_t)0x4065, (q15_t)0x4000, (q15_t)0x4071, (q15_t)0x4000, (q15_t)0x407e, (q15_t)0x4000, (q15_t)0x408a, (q15_t)0x3fff,
+    (q15_t)0x4097, (q15_t)0x3fff, (q15_t)0x40a3, (q15_t)0x3fff, (q15_t)0x40b0, (q15_t)0x3fff, (q15_t)0x40bc, (q15_t)0x3fff,
+    (q15_t)0x40c9, (q15_t)0x3fff, (q15_t)0x40d6, (q15_t)0x3fff, (q15_t)0x40e2, (q15_t)0x3ffe, (q15_t)0x40ef, (q15_t)0x3ffe,
+    (q15_t)0x40fb, (q15_t)0x3ffe, (q15_t)0x4108, (q15_t)0x3ffe, (q15_t)0x4114, (q15_t)0x3ffe, (q15_t)0x4121, (q15_t)0x3ffd,
+    (q15_t)0x412e, (q15_t)0x3ffd, (q15_t)0x413a, (q15_t)0x3ffd, (q15_t)0x4147, (q15_t)0x3ffd, (q15_t)0x4153, (q15_t)0x3ffc,
+    (q15_t)0x4160, (q15_t)0x3ffc, (q15_t)0x416c, (q15_t)0x3ffc, (q15_t)0x4179, (q15_t)0x3ffc, (q15_t)0x4186, (q15_t)0x3ffb,
+    (q15_t)0x4192, (q15_t)0x3ffb, (q15_t)0x419f, (q15_t)0x3ffb, (q15_t)0x41ab, (q15_t)0x3ffa, (q15_t)0x41b8, (q15_t)0x3ffa,
+    (q15_t)0x41c4, (q15_t)0x3ffa, (q15_t)0x41d1, (q15_t)0x3ff9, (q15_t)0x41dd, (q15_t)0x3ff9, (q15_t)0x41ea, (q15_t)0x3ff9,
+    (q15_t)0x41f7, (q15_t)0x3ff8, (q15_t)0x4203, (q15_t)0x3ff8, (q15_t)0x4210, (q15_t)0x3ff7, (q15_t)0x421c, (q15_t)0x3ff7,
+    (q15_t)0x4229, (q15_t)0x3ff7, (q15_t)0x4235, (q15_t)0x3ff6, (q15_t)0x4242, (q15_t)0x3ff6, (q15_t)0x424e, (q15_t)0x3ff5,
+    (q15_t)0x425b, (q15_t)0x3ff5, (q15_t)0x4268, (q15_t)0x3ff4, (q15_t)0x4274, (q15_t)0x3ff4, (q15_t)0x4281, (q15_t)0x3ff3,
+    (q15_t)0x428d, (q15_t)0x3ff3, (q15_t)0x429a, (q15_t)0x3ff2, (q15_t)0x42a6, (q15_t)0x3ff2, (q15_t)0x42b3, (q15_t)0x3ff1,
+    (q15_t)0x42c0, (q15_t)0x3ff1, (q15_t)0x42cc, (q15_t)0x3ff0, (q15_t)0x42d9, (q15_t)0x3ff0, (q15_t)0x42e5, (q15_t)0x3fef,
+    (q15_t)0x42f2, (q15_t)0x3fef, (q15_t)0x42fe, (q15_t)0x3fee, (q15_t)0x430b, (q15_t)0x3fed, (q15_t)0x4317, (q15_t)0x3fed,
+    (q15_t)0x4324, (q15_t)0x3fec, (q15_t)0x4330, (q15_t)0x3fec, (q15_t)0x433d, (q15_t)0x3feb, (q15_t)0x434a, (q15_t)0x3fea,
+    (q15_t)0x4356, (q15_t)0x3fea, (q15_t)0x4363, (q15_t)0x3fe9, (q15_t)0x436f, (q15_t)0x3fe8, (q15_t)0x437c, (q15_t)0x3fe8,
+    (q15_t)0x4388, (q15_t)0x3fe7, (q15_t)0x4395, (q15_t)0x3fe6, (q15_t)0x43a1, (q15_t)0x3fe6, (q15_t)0x43ae, (q15_t)0x3fe5,
+    (q15_t)0x43bb, (q15_t)0x3fe4, (q15_t)0x43c7, (q15_t)0x3fe3, (q15_t)0x43d4, (q15_t)0x3fe3, (q15_t)0x43e0, (q15_t)0x3fe2,
+    (q15_t)0x43ed, (q15_t)0x3fe1, (q15_t)0x43f9, (q15_t)0x3fe0, (q15_t)0x4406, (q15_t)0x3fe0, (q15_t)0x4412, (q15_t)0x3fdf,
+    (q15_t)0x441f, (q15_t)0x3fde, (q15_t)0x442b, (q15_t)0x3fdd, (q15_t)0x4438, (q15_t)0x3fdc, (q15_t)0x4444, (q15_t)0x3fdc,
+    (q15_t)0x4451, (q15_t)0x3fdb, (q15_t)0x445e, (q15_t)0x3fda, (q15_t)0x446a, (q15_t)0x3fd9, (q15_t)0x4477, (q15_t)0x3fd8,
+    (q15_t)0x4483, (q15_t)0x3fd7, (q15_t)0x4490, (q15_t)0x3fd6, (q15_t)0x449c, (q15_t)0x3fd5, (q15_t)0x44a9, (q15_t)0x3fd5,
+    (q15_t)0x44b5, (q15_t)0x3fd4, (q15_t)0x44c2, (q15_t)0x3fd3, (q15_t)0x44ce, (q15_t)0x3fd2, (q15_t)0x44db, (q15_t)0x3fd1,
+    (q15_t)0x44e7, (q15_t)0x3fd0, (q15_t)0x44f4, (q15_t)0x3fcf, (q15_t)0x4500, (q15_t)0x3fce, (q15_t)0x450d, (q15_t)0x3fcd,
+    (q15_t)0x451a, (q15_t)0x3fcc, (q15_t)0x4526, (q15_t)0x3fcb, (q15_t)0x4533, (q15_t)0x3fca, (q15_t)0x453f, (q15_t)0x3fc9,
+    (q15_t)0x454c, (q15_t)0x3fc8, (q15_t)0x4558, (q15_t)0x3fc7, (q15_t)0x4565, (q15_t)0x3fc6, (q15_t)0x4571, (q15_t)0x3fc5,
+    (q15_t)0x457e, (q15_t)0x3fc4, (q15_t)0x458a, (q15_t)0x3fc3, (q15_t)0x4597, (q15_t)0x3fc1, (q15_t)0x45a3, (q15_t)0x3fc0,
+    (q15_t)0x45b0, (q15_t)0x3fbf, (q15_t)0x45bc, (q15_t)0x3fbe, (q15_t)0x45c9, (q15_t)0x3fbd, (q15_t)0x45d5, (q15_t)0x3fbc,
+    (q15_t)0x45e2, (q15_t)0x3fbb, (q15_t)0x45ee, (q15_t)0x3fb9, (q15_t)0x45fb, (q15_t)0x3fb8, (q15_t)0x4607, (q15_t)0x3fb7,
+    (q15_t)0x4614, (q15_t)0x3fb6, (q15_t)0x4620, (q15_t)0x3fb5, (q15_t)0x462d, (q15_t)0x3fb4, (q15_t)0x4639, (q15_t)0x3fb2,
+    (q15_t)0x4646, (q15_t)0x3fb1, (q15_t)0x4652, (q15_t)0x3fb0, (q15_t)0x465f, (q15_t)0x3faf, (q15_t)0x466b, (q15_t)0x3fad,
+    (q15_t)0x4678, (q15_t)0x3fac, (q15_t)0x4684, (q15_t)0x3fab, (q15_t)0x4691, (q15_t)0x3faa, (q15_t)0x469d, (q15_t)0x3fa8,
+    (q15_t)0x46aa, (q15_t)0x3fa7, (q15_t)0x46b6, (q15_t)0x3fa6, (q15_t)0x46c3, (q15_t)0x3fa4, (q15_t)0x46cf, (q15_t)0x3fa3,
+    (q15_t)0x46dc, (q15_t)0x3fa2, (q15_t)0x46e8, (q15_t)0x3fa0, (q15_t)0x46f5, (q15_t)0x3f9f, (q15_t)0x4701, (q15_t)0x3f9e,
+    (q15_t)0x470e, (q15_t)0x3f9c, (q15_t)0x471a, (q15_t)0x3f9b, (q15_t)0x4727, (q15_t)0x3f99, (q15_t)0x4733, (q15_t)0x3f98,
+    (q15_t)0x4740, (q15_t)0x3f97, (q15_t)0x474c, (q15_t)0x3f95, (q15_t)0x4759, (q15_t)0x3f94, (q15_t)0x4765, (q15_t)0x3f92,
+    (q15_t)0x4772, (q15_t)0x3f91, (q15_t)0x477e, (q15_t)0x3f8f, (q15_t)0x478b, (q15_t)0x3f8e, (q15_t)0x4797, (q15_t)0x3f8c,
+    (q15_t)0x47a4, (q15_t)0x3f8b, (q15_t)0x47b0, (q15_t)0x3f89, (q15_t)0x47bd, (q15_t)0x3f88, (q15_t)0x47c9, (q15_t)0x3f86,
+    (q15_t)0x47d6, (q15_t)0x3f85, (q15_t)0x47e2, (q15_t)0x3f83, (q15_t)0x47ef, (q15_t)0x3f82, (q15_t)0x47fb, (q15_t)0x3f80,
+    (q15_t)0x4807, (q15_t)0x3f7f, (q15_t)0x4814, (q15_t)0x3f7d, (q15_t)0x4820, (q15_t)0x3f7b, (q15_t)0x482d, (q15_t)0x3f7a,
+    (q15_t)0x4839, (q15_t)0x3f78, (q15_t)0x4846, (q15_t)0x3f77, (q15_t)0x4852, (q15_t)0x3f75, (q15_t)0x485f, (q15_t)0x3f73,
+    (q15_t)0x486b, (q15_t)0x3f72, (q15_t)0x4878, (q15_t)0x3f70, (q15_t)0x4884, (q15_t)0x3f6e, (q15_t)0x4891, (q15_t)0x3f6d,
+    (q15_t)0x489d, (q15_t)0x3f6b, (q15_t)0x48a9, (q15_t)0x3f69, (q15_t)0x48b6, (q15_t)0x3f68, (q15_t)0x48c2, (q15_t)0x3f66,
+    (q15_t)0x48cf, (q15_t)0x3f64, (q15_t)0x48db, (q15_t)0x3f62, (q15_t)0x48e8, (q15_t)0x3f61, (q15_t)0x48f4, (q15_t)0x3f5f,
+    (q15_t)0x4901, (q15_t)0x3f5d, (q15_t)0x490d, (q15_t)0x3f5b, (q15_t)0x4919, (q15_t)0x3f5a, (q15_t)0x4926, (q15_t)0x3f58,
+    (q15_t)0x4932, (q15_t)0x3f56, (q15_t)0x493f, (q15_t)0x3f54, (q15_t)0x494b, (q15_t)0x3f52, (q15_t)0x4958, (q15_t)0x3f51,
+    (q15_t)0x4964, (q15_t)0x3f4f, (q15_t)0x4970, (q15_t)0x3f4d, (q15_t)0x497d, (q15_t)0x3f4b, (q15_t)0x4989, (q15_t)0x3f49,
+    (q15_t)0x4996, (q15_t)0x3f47, (q15_t)0x49a2, (q15_t)0x3f45, (q15_t)0x49af, (q15_t)0x3f43, (q15_t)0x49bb, (q15_t)0x3f42,
+    (q15_t)0x49c7, (q15_t)0x3f40, (q15_t)0x49d4, (q15_t)0x3f3e, (q15_t)0x49e0, (q15_t)0x3f3c, (q15_t)0x49ed, (q15_t)0x3f3a,
+    (q15_t)0x49f9, (q15_t)0x3f38, (q15_t)0x4a06, (q15_t)0x3f36, (q15_t)0x4a12, (q15_t)0x3f34, (q15_t)0x4a1e, (q15_t)0x3f32,
+    (q15_t)0x4a2b, (q15_t)0x3f30, (q15_t)0x4a37, (q15_t)0x3f2e, (q15_t)0x4a44, (q15_t)0x3f2c, (q15_t)0x4a50, (q15_t)0x3f2a,
+    (q15_t)0x4a5c, (q15_t)0x3f28, (q15_t)0x4a69, (q15_t)0x3f26, (q15_t)0x4a75, (q15_t)0x3f24, (q15_t)0x4a82, (q15_t)0x3f22,
+    (q15_t)0x4a8e, (q15_t)0x3f20, (q15_t)0x4a9a, (q15_t)0x3f1e, (q15_t)0x4aa7, (q15_t)0x3f1c, (q15_t)0x4ab3, (q15_t)0x3f19,
+    (q15_t)0x4ac0, (q15_t)0x3f17, (q15_t)0x4acc, (q15_t)0x3f15, (q15_t)0x4ad8, (q15_t)0x3f13, (q15_t)0x4ae5, (q15_t)0x3f11,
+    (q15_t)0x4af1, (q15_t)0x3f0f, (q15_t)0x4afd, (q15_t)0x3f0d, (q15_t)0x4b0a, (q15_t)0x3f0a, (q15_t)0x4b16, (q15_t)0x3f08,
+    (q15_t)0x4b23, (q15_t)0x3f06, (q15_t)0x4b2f, (q15_t)0x3f04, (q15_t)0x4b3b, (q15_t)0x3f02, (q15_t)0x4b48, (q15_t)0x3f00,
+    (q15_t)0x4b54, (q15_t)0x3efd, (q15_t)0x4b60, (q15_t)0x3efb, (q15_t)0x4b6d, (q15_t)0x3ef9, (q15_t)0x4b79, (q15_t)0x3ef7,
+    (q15_t)0x4b85, (q15_t)0x3ef4, (q15_t)0x4b92, (q15_t)0x3ef2, (q15_t)0x4b9e, (q15_t)0x3ef0, (q15_t)0x4bab, (q15_t)0x3eed,
+    (q15_t)0x4bb7, (q15_t)0x3eeb, (q15_t)0x4bc3, (q15_t)0x3ee9, (q15_t)0x4bd0, (q15_t)0x3ee7, (q15_t)0x4bdc, (q15_t)0x3ee4,
+    (q15_t)0x4be8, (q15_t)0x3ee2, (q15_t)0x4bf5, (q15_t)0x3ee0, (q15_t)0x4c01, (q15_t)0x3edd, (q15_t)0x4c0d, (q15_t)0x3edb,
+    (q15_t)0x4c1a, (q15_t)0x3ed8, (q15_t)0x4c26, (q15_t)0x3ed6, (q15_t)0x4c32, (q15_t)0x3ed4, (q15_t)0x4c3f, (q15_t)0x3ed1,
+    (q15_t)0x4c4b, (q15_t)0x3ecf, (q15_t)0x4c57, (q15_t)0x3ecc, (q15_t)0x4c64, (q15_t)0x3eca, (q15_t)0x4c70, (q15_t)0x3ec8,
+    (q15_t)0x4c7c, (q15_t)0x3ec5, (q15_t)0x4c89, (q15_t)0x3ec3, (q15_t)0x4c95, (q15_t)0x3ec0, (q15_t)0x4ca1, (q15_t)0x3ebe,
+    (q15_t)0x4cae, (q15_t)0x3ebb, (q15_t)0x4cba, (q15_t)0x3eb9, (q15_t)0x4cc6, (q15_t)0x3eb6, (q15_t)0x4cd3, (q15_t)0x3eb4,
+    (q15_t)0x4cdf, (q15_t)0x3eb1, (q15_t)0x4ceb, (q15_t)0x3eaf, (q15_t)0x4cf8, (q15_t)0x3eac, (q15_t)0x4d04, (q15_t)0x3eaa,
+    (q15_t)0x4d10, (q15_t)0x3ea7, (q15_t)0x4d1c, (q15_t)0x3ea5, (q15_t)0x4d29, (q15_t)0x3ea2, (q15_t)0x4d35, (q15_t)0x3e9f,
+    (q15_t)0x4d41, (q15_t)0x3e9d, (q15_t)0x4d4e, (q15_t)0x3e9a, (q15_t)0x4d5a, (q15_t)0x3e98, (q15_t)0x4d66, (q15_t)0x3e95,
+    (q15_t)0x4d72, (q15_t)0x3e92, (q15_t)0x4d7f, (q15_t)0x3e90, (q15_t)0x4d8b, (q15_t)0x3e8d, (q15_t)0x4d97, (q15_t)0x3e8a,
+    (q15_t)0x4da4, (q15_t)0x3e88, (q15_t)0x4db0, (q15_t)0x3e85, (q15_t)0x4dbc, (q15_t)0x3e82, (q15_t)0x4dc8, (q15_t)0x3e80,
+    (q15_t)0x4dd5, (q15_t)0x3e7d, (q15_t)0x4de1, (q15_t)0x3e7a, (q15_t)0x4ded, (q15_t)0x3e77, (q15_t)0x4df9, (q15_t)0x3e75,
+    (q15_t)0x4e06, (q15_t)0x3e72, (q15_t)0x4e12, (q15_t)0x3e6f, (q15_t)0x4e1e, (q15_t)0x3e6c, (q15_t)0x4e2b, (q15_t)0x3e6a,
+    (q15_t)0x4e37, (q15_t)0x3e67, (q15_t)0x4e43, (q15_t)0x3e64, (q15_t)0x4e4f, (q15_t)0x3e61, (q15_t)0x4e5c, (q15_t)0x3e5e,
+    (q15_t)0x4e68, (q15_t)0x3e5c, (q15_t)0x4e74, (q15_t)0x3e59, (q15_t)0x4e80, (q15_t)0x3e56, (q15_t)0x4e8c, (q15_t)0x3e53,
+    (q15_t)0x4e99, (q15_t)0x3e50, (q15_t)0x4ea5, (q15_t)0x3e4d, (q15_t)0x4eb1, (q15_t)0x3e4a, (q15_t)0x4ebd, (q15_t)0x3e48,
+    (q15_t)0x4eca, (q15_t)0x3e45, (q15_t)0x4ed6, (q15_t)0x3e42, (q15_t)0x4ee2, (q15_t)0x3e3f, (q15_t)0x4eee, (q15_t)0x3e3c,
+    (q15_t)0x4efb, (q15_t)0x3e39, (q15_t)0x4f07, (q15_t)0x3e36, (q15_t)0x4f13, (q15_t)0x3e33, (q15_t)0x4f1f, (q15_t)0x3e30,
+    (q15_t)0x4f2b, (q15_t)0x3e2d, (q15_t)0x4f38, (q15_t)0x3e2a, (q15_t)0x4f44, (q15_t)0x3e27, (q15_t)0x4f50, (q15_t)0x3e24,
+    (q15_t)0x4f5c, (q15_t)0x3e21, (q15_t)0x4f68, (q15_t)0x3e1e, (q15_t)0x4f75, (q15_t)0x3e1b, (q15_t)0x4f81, (q15_t)0x3e18,
+    (q15_t)0x4f8d, (q15_t)0x3e15, (q15_t)0x4f99, (q15_t)0x3e12, (q15_t)0x4fa5, (q15_t)0x3e0f, (q15_t)0x4fb2, (q15_t)0x3e0c,
+    (q15_t)0x4fbe, (q15_t)0x3e09, (q15_t)0x4fca, (q15_t)0x3e06, (q15_t)0x4fd6, (q15_t)0x3e03, (q15_t)0x4fe2, (q15_t)0x3dff,
+    (q15_t)0x4fee, (q15_t)0x3dfc, (q15_t)0x4ffb, (q15_t)0x3df9, (q15_t)0x5007, (q15_t)0x3df6, (q15_t)0x5013, (q15_t)0x3df3,
+    (q15_t)0x501f, (q15_t)0x3df0, (q15_t)0x502b, (q15_t)0x3ded, (q15_t)0x5037, (q15_t)0x3de9, (q15_t)0x5044, (q15_t)0x3de6,
+    (q15_t)0x5050, (q15_t)0x3de3, (q15_t)0x505c, (q15_t)0x3de0, (q15_t)0x5068, (q15_t)0x3ddd, (q15_t)0x5074, (q15_t)0x3dd9,
+    (q15_t)0x5080, (q15_t)0x3dd6, (q15_t)0x508c, (q15_t)0x3dd3, (q15_t)0x5099, (q15_t)0x3dd0, (q15_t)0x50a5, (q15_t)0x3dcc,
+    (q15_t)0x50b1, (q15_t)0x3dc9, (q15_t)0x50bd, (q15_t)0x3dc6, (q15_t)0x50c9, (q15_t)0x3dc2, (q15_t)0x50d5, (q15_t)0x3dbf,
+    (q15_t)0x50e1, (q15_t)0x3dbc, (q15_t)0x50ed, (q15_t)0x3db9, (q15_t)0x50fa, (q15_t)0x3db5, (q15_t)0x5106, (q15_t)0x3db2,
+    (q15_t)0x5112, (q15_t)0x3daf, (q15_t)0x511e, (q15_t)0x3dab, (q15_t)0x512a, (q15_t)0x3da8, (q15_t)0x5136, (q15_t)0x3da4,
+    (q15_t)0x5142, (q15_t)0x3da1, (q15_t)0x514e, (q15_t)0x3d9e, (q15_t)0x515a, (q15_t)0x3d9a, (q15_t)0x5167, (q15_t)0x3d97,
+    (q15_t)0x5173, (q15_t)0x3d93, (q15_t)0x517f, (q15_t)0x3d90, (q15_t)0x518b, (q15_t)0x3d8d, (q15_t)0x5197, (q15_t)0x3d89,
+    (q15_t)0x51a3, (q15_t)0x3d86, (q15_t)0x51af, (q15_t)0x3d82, (q15_t)0x51bb, (q15_t)0x3d7f, (q15_t)0x51c7, (q15_t)0x3d7b,
+    (q15_t)0x51d3, (q15_t)0x3d78, (q15_t)0x51df, (q15_t)0x3d74, (q15_t)0x51eb, (q15_t)0x3d71, (q15_t)0x51f7, (q15_t)0x3d6d,
+    (q15_t)0x5204, (q15_t)0x3d6a, (q15_t)0x5210, (q15_t)0x3d66, (q15_t)0x521c, (q15_t)0x3d63, (q15_t)0x5228, (q15_t)0x3d5f,
+    (q15_t)0x5234, (q15_t)0x3d5b, (q15_t)0x5240, (q15_t)0x3d58, (q15_t)0x524c, (q15_t)0x3d54, (q15_t)0x5258, (q15_t)0x3d51,
+    (q15_t)0x5264, (q15_t)0x3d4d, (q15_t)0x5270, (q15_t)0x3d49, (q15_t)0x527c, (q15_t)0x3d46, (q15_t)0x5288, (q15_t)0x3d42,
+    (q15_t)0x5294, (q15_t)0x3d3f, (q15_t)0x52a0, (q15_t)0x3d3b, (q15_t)0x52ac, (q15_t)0x3d37, (q15_t)0x52b8, (q15_t)0x3d34,
+    (q15_t)0x52c4, (q15_t)0x3d30, (q15_t)0x52d0, (q15_t)0x3d2c, (q15_t)0x52dc, (q15_t)0x3d28, (q15_t)0x52e8, (q15_t)0x3d25,
+    (q15_t)0x52f4, (q15_t)0x3d21, (q15_t)0x5300, (q15_t)0x3d1d, (q15_t)0x530c, (q15_t)0x3d1a, (q15_t)0x5318, (q15_t)0x3d16,
+    (q15_t)0x5324, (q15_t)0x3d12, (q15_t)0x5330, (q15_t)0x3d0e, (q15_t)0x533c, (q15_t)0x3d0b, (q15_t)0x5348, (q15_t)0x3d07,
+    (q15_t)0x5354, (q15_t)0x3d03, (q15_t)0x5360, (q15_t)0x3cff, (q15_t)0x536c, (q15_t)0x3cfb, (q15_t)0x5378, (q15_t)0x3cf8,
+    (q15_t)0x5384, (q15_t)0x3cf4, (q15_t)0x5390, (q15_t)0x3cf0, (q15_t)0x539c, (q15_t)0x3cec, (q15_t)0x53a8, (q15_t)0x3ce8,
+    (q15_t)0x53b4, (q15_t)0x3ce4, (q15_t)0x53c0, (q15_t)0x3ce0, (q15_t)0x53cc, (q15_t)0x3cdd, (q15_t)0x53d8, (q15_t)0x3cd9,
+    (q15_t)0x53e4, (q15_t)0x3cd5, (q15_t)0x53f0, (q15_t)0x3cd1, (q15_t)0x53fb, (q15_t)0x3ccd, (q15_t)0x5407, (q15_t)0x3cc9,
+    (q15_t)0x5413, (q15_t)0x3cc5, (q15_t)0x541f, (q15_t)0x3cc1, (q15_t)0x542b, (q15_t)0x3cbd, (q15_t)0x5437, (q15_t)0x3cb9,
+    (q15_t)0x5443, (q15_t)0x3cb5, (q15_t)0x544f, (q15_t)0x3cb1, (q15_t)0x545b, (q15_t)0x3cad, (q15_t)0x5467, (q15_t)0x3ca9,
+    (q15_t)0x5473, (q15_t)0x3ca5, (q15_t)0x547f, (q15_t)0x3ca1, (q15_t)0x548b, (q15_t)0x3c9d, (q15_t)0x5496, (q15_t)0x3c99,
+    (q15_t)0x54a2, (q15_t)0x3c95, (q15_t)0x54ae, (q15_t)0x3c91, (q15_t)0x54ba, (q15_t)0x3c8d, (q15_t)0x54c6, (q15_t)0x3c89,
+    (q15_t)0x54d2, (q15_t)0x3c85, (q15_t)0x54de, (q15_t)0x3c81, (q15_t)0x54ea, (q15_t)0x3c7d, (q15_t)0x54f6, (q15_t)0x3c79,
+    (q15_t)0x5501, (q15_t)0x3c74, (q15_t)0x550d, (q15_t)0x3c70, (q15_t)0x5519, (q15_t)0x3c6c, (q15_t)0x5525, (q15_t)0x3c68,
+    (q15_t)0x5531, (q15_t)0x3c64, (q15_t)0x553d, (q15_t)0x3c60, (q15_t)0x5549, (q15_t)0x3c5b, (q15_t)0x5554, (q15_t)0x3c57,
+    (q15_t)0x5560, (q15_t)0x3c53, (q15_t)0x556c, (q15_t)0x3c4f, (q15_t)0x5578, (q15_t)0x3c4b, (q15_t)0x5584, (q15_t)0x3c46,
+    (q15_t)0x5590, (q15_t)0x3c42, (q15_t)0x559b, (q15_t)0x3c3e, (q15_t)0x55a7, (q15_t)0x3c3a, (q15_t)0x55b3, (q15_t)0x3c36,
+    (q15_t)0x55bf, (q15_t)0x3c31, (q15_t)0x55cb, (q15_t)0x3c2d, (q15_t)0x55d7, (q15_t)0x3c29, (q15_t)0x55e2, (q15_t)0x3c24,
+    (q15_t)0x55ee, (q15_t)0x3c20, (q15_t)0x55fa, (q15_t)0x3c1c, (q15_t)0x5606, (q15_t)0x3c17, (q15_t)0x5612, (q15_t)0x3c13,
+    (q15_t)0x561d, (q15_t)0x3c0f, (q15_t)0x5629, (q15_t)0x3c0a, (q15_t)0x5635, (q15_t)0x3c06, (q15_t)0x5641, (q15_t)0x3c02,
+    (q15_t)0x564c, (q15_t)0x3bfd, (q15_t)0x5658, (q15_t)0x3bf9, (q15_t)0x5664, (q15_t)0x3bf5, (q15_t)0x5670, (q15_t)0x3bf0,
+    (q15_t)0x567c, (q15_t)0x3bec, (q15_t)0x5687, (q15_t)0x3be7, (q15_t)0x5693, (q15_t)0x3be3, (q15_t)0x569f, (q15_t)0x3bde,
+    (q15_t)0x56ab, (q15_t)0x3bda, (q15_t)0x56b6, (q15_t)0x3bd6, (q15_t)0x56c2, (q15_t)0x3bd1, (q15_t)0x56ce, (q15_t)0x3bcd,
+    (q15_t)0x56da, (q15_t)0x3bc8, (q15_t)0x56e5, (q15_t)0x3bc4, (q15_t)0x56f1, (q15_t)0x3bbf, (q15_t)0x56fd, (q15_t)0x3bbb,
+    (q15_t)0x5709, (q15_t)0x3bb6, (q15_t)0x5714, (q15_t)0x3bb2, (q15_t)0x5720, (q15_t)0x3bad, (q15_t)0x572c, (q15_t)0x3ba9,
+    (q15_t)0x5737, (q15_t)0x3ba4, (q15_t)0x5743, (q15_t)0x3b9f, (q15_t)0x574f, (q15_t)0x3b9b, (q15_t)0x575b, (q15_t)0x3b96,
+    (q15_t)0x5766, (q15_t)0x3b92, (q15_t)0x5772, (q15_t)0x3b8d, (q15_t)0x577e, (q15_t)0x3b88, (q15_t)0x5789, (q15_t)0x3b84,
+    (q15_t)0x5795, (q15_t)0x3b7f, (q15_t)0x57a1, (q15_t)0x3b7b, (q15_t)0x57ac, (q15_t)0x3b76, (q15_t)0x57b8, (q15_t)0x3b71,
+    (q15_t)0x57c4, (q15_t)0x3b6d, (q15_t)0x57cf, (q15_t)0x3b68, (q15_t)0x57db, (q15_t)0x3b63, (q15_t)0x57e7, (q15_t)0x3b5f,
+    (q15_t)0x57f2, (q15_t)0x3b5a, (q15_t)0x57fe, (q15_t)0x3b55, (q15_t)0x580a, (q15_t)0x3b50, (q15_t)0x5815, (q15_t)0x3b4c,
+    (q15_t)0x5821, (q15_t)0x3b47, (q15_t)0x582d, (q15_t)0x3b42, (q15_t)0x5838, (q15_t)0x3b3e, (q15_t)0x5844, (q15_t)0x3b39,
+    (q15_t)0x584f, (q15_t)0x3b34, (q15_t)0x585b, (q15_t)0x3b2f, (q15_t)0x5867, (q15_t)0x3b2a, (q15_t)0x5872, (q15_t)0x3b26,
+    (q15_t)0x587e, (q15_t)0x3b21, (q15_t)0x5889, (q15_t)0x3b1c, (q15_t)0x5895, (q15_t)0x3b17, (q15_t)0x58a1, (q15_t)0x3b12,
+    (q15_t)0x58ac, (q15_t)0x3b0e, (q15_t)0x58b8, (q15_t)0x3b09, (q15_t)0x58c3, (q15_t)0x3b04, (q15_t)0x58cf, (q15_t)0x3aff,
+    (q15_t)0x58db, (q15_t)0x3afa, (q15_t)0x58e6, (q15_t)0x3af5, (q15_t)0x58f2, (q15_t)0x3af0, (q15_t)0x58fd, (q15_t)0x3aeb,
+    (q15_t)0x5909, (q15_t)0x3ae6, (q15_t)0x5914, (q15_t)0x3ae2, (q15_t)0x5920, (q15_t)0x3add, (q15_t)0x592c, (q15_t)0x3ad8,
+    (q15_t)0x5937, (q15_t)0x3ad3, (q15_t)0x5943, (q15_t)0x3ace, (q15_t)0x594e, (q15_t)0x3ac9, (q15_t)0x595a, (q15_t)0x3ac4,
+    (q15_t)0x5965, (q15_t)0x3abf, (q15_t)0x5971, (q15_t)0x3aba, (q15_t)0x597c, (q15_t)0x3ab5, (q15_t)0x5988, (q15_t)0x3ab0,
+    (q15_t)0x5993, (q15_t)0x3aab, (q15_t)0x599f, (q15_t)0x3aa6, (q15_t)0x59aa, (q15_t)0x3aa1, (q15_t)0x59b6, (q15_t)0x3a9c,
+    (q15_t)0x59c1, (q15_t)0x3a97, (q15_t)0x59cd, (q15_t)0x3a92, (q15_t)0x59d8, (q15_t)0x3a8d, (q15_t)0x59e4, (q15_t)0x3a88,
+    (q15_t)0x59ef, (q15_t)0x3a82, (q15_t)0x59fb, (q15_t)0x3a7d, (q15_t)0x5a06, (q15_t)0x3a78, (q15_t)0x5a12, (q15_t)0x3a73,
+    (q15_t)0x5a1d, (q15_t)0x3a6e, (q15_t)0x5a29, (q15_t)0x3a69, (q15_t)0x5a34, (q15_t)0x3a64, (q15_t)0x5a40, (q15_t)0x3a5f,
+    (q15_t)0x5a4b, (q15_t)0x3a59, (q15_t)0x5a57, (q15_t)0x3a54, (q15_t)0x5a62, (q15_t)0x3a4f, (q15_t)0x5a6e, (q15_t)0x3a4a,
+    (q15_t)0x5a79, (q15_t)0x3a45, (q15_t)0x5a84, (q15_t)0x3a3f, (q15_t)0x5a90, (q15_t)0x3a3a, (q15_t)0x5a9b, (q15_t)0x3a35,
+    (q15_t)0x5aa7, (q15_t)0x3a30, (q15_t)0x5ab2, (q15_t)0x3a2b, (q15_t)0x5abe, (q15_t)0x3a25, (q15_t)0x5ac9, (q15_t)0x3a20,
+    (q15_t)0x5ad4, (q15_t)0x3a1b, (q15_t)0x5ae0, (q15_t)0x3a16, (q15_t)0x5aeb, (q15_t)0x3a10, (q15_t)0x5af7, (q15_t)0x3a0b,
+    (q15_t)0x5b02, (q15_t)0x3a06, (q15_t)0x5b0d, (q15_t)0x3a00, (q15_t)0x5b19, (q15_t)0x39fb, (q15_t)0x5b24, (q15_t)0x39f6,
+    (q15_t)0x5b30, (q15_t)0x39f0, (q15_t)0x5b3b, (q15_t)0x39eb, (q15_t)0x5b46, (q15_t)0x39e6, (q15_t)0x5b52, (q15_t)0x39e0,
+    (q15_t)0x5b5d, (q15_t)0x39db, (q15_t)0x5b68, (q15_t)0x39d6, (q15_t)0x5b74, (q15_t)0x39d0, (q15_t)0x5b7f, (q15_t)0x39cb,
+    (q15_t)0x5b8a, (q15_t)0x39c5, (q15_t)0x5b96, (q15_t)0x39c0, (q15_t)0x5ba1, (q15_t)0x39bb, (q15_t)0x5bac, (q15_t)0x39b5,
+    (q15_t)0x5bb8, (q15_t)0x39b0, (q15_t)0x5bc3, (q15_t)0x39aa, (q15_t)0x5bce, (q15_t)0x39a5, (q15_t)0x5bda, (q15_t)0x399f,
+    (q15_t)0x5be5, (q15_t)0x399a, (q15_t)0x5bf0, (q15_t)0x3994, (q15_t)0x5bfc, (q15_t)0x398f, (q15_t)0x5c07, (q15_t)0x3989,
+    (q15_t)0x5c12, (q15_t)0x3984, (q15_t)0x5c1e, (q15_t)0x397e, (q15_t)0x5c29, (q15_t)0x3979, (q15_t)0x5c34, (q15_t)0x3973,
+    (q15_t)0x5c3f, (q15_t)0x396e, (q15_t)0x5c4b, (q15_t)0x3968, (q15_t)0x5c56, (q15_t)0x3963, (q15_t)0x5c61, (q15_t)0x395d,
+    (q15_t)0x5c6c, (q15_t)0x3958, (q15_t)0x5c78, (q15_t)0x3952, (q15_t)0x5c83, (q15_t)0x394c, (q15_t)0x5c8e, (q15_t)0x3947,
+    (q15_t)0x5c99, (q15_t)0x3941, (q15_t)0x5ca5, (q15_t)0x393b, (q15_t)0x5cb0, (q15_t)0x3936, (q15_t)0x5cbb, (q15_t)0x3930,
+    (q15_t)0x5cc6, (q15_t)0x392b, (q15_t)0x5cd2, (q15_t)0x3925, (q15_t)0x5cdd, (q15_t)0x391f, (q15_t)0x5ce8, (q15_t)0x391a,
+    (q15_t)0x5cf3, (q15_t)0x3914, (q15_t)0x5cff, (q15_t)0x390e, (q15_t)0x5d0a, (q15_t)0x3909, (q15_t)0x5d15, (q15_t)0x3903,
+    (q15_t)0x5d20, (q15_t)0x38fd, (q15_t)0x5d2b, (q15_t)0x38f7, (q15_t)0x5d36, (q15_t)0x38f2, (q15_t)0x5d42, (q15_t)0x38ec,
+    (q15_t)0x5d4d, (q15_t)0x38e6, (q15_t)0x5d58, (q15_t)0x38e0, (q15_t)0x5d63, (q15_t)0x38db, (q15_t)0x5d6e, (q15_t)0x38d5,
+    (q15_t)0x5d79, (q15_t)0x38cf, (q15_t)0x5d85, (q15_t)0x38c9, (q15_t)0x5d90, (q15_t)0x38c3, (q15_t)0x5d9b, (q15_t)0x38be,
+    (q15_t)0x5da6, (q15_t)0x38b8, (q15_t)0x5db1, (q15_t)0x38b2, (q15_t)0x5dbc, (q15_t)0x38ac, (q15_t)0x5dc7, (q15_t)0x38a6,
+    (q15_t)0x5dd3, (q15_t)0x38a1, (q15_t)0x5dde, (q15_t)0x389b, (q15_t)0x5de9, (q15_t)0x3895, (q15_t)0x5df4, (q15_t)0x388f,
+    (q15_t)0x5dff, (q15_t)0x3889, (q15_t)0x5e0a, (q15_t)0x3883, (q15_t)0x5e15, (q15_t)0x387d, (q15_t)0x5e20, (q15_t)0x3877,
+    (q15_t)0x5e2b, (q15_t)0x3871, (q15_t)0x5e36, (q15_t)0x386b, (q15_t)0x5e42, (q15_t)0x3866, (q15_t)0x5e4d, (q15_t)0x3860,
+    (q15_t)0x5e58, (q15_t)0x385a, (q15_t)0x5e63, (q15_t)0x3854, (q15_t)0x5e6e, (q15_t)0x384e, (q15_t)0x5e79, (q15_t)0x3848,
+    (q15_t)0x5e84, (q15_t)0x3842, (q15_t)0x5e8f, (q15_t)0x383c, (q15_t)0x5e9a, (q15_t)0x3836, (q15_t)0x5ea5, (q15_t)0x3830,
+    (q15_t)0x5eb0, (q15_t)0x382a, (q15_t)0x5ebb, (q15_t)0x3824, (q15_t)0x5ec6, (q15_t)0x381e, (q15_t)0x5ed1, (q15_t)0x3818,
+    (q15_t)0x5edc, (q15_t)0x3812, (q15_t)0x5ee7, (q15_t)0x380b, (q15_t)0x5ef2, (q15_t)0x3805, (q15_t)0x5efd, (q15_t)0x37ff,
+    (q15_t)0x5f08, (q15_t)0x37f9, (q15_t)0x5f13, (q15_t)0x37f3, (q15_t)0x5f1e, (q15_t)0x37ed, (q15_t)0x5f29, (q15_t)0x37e7,
+    (q15_t)0x5f34, (q15_t)0x37e1, (q15_t)0x5f3f, (q15_t)0x37db, (q15_t)0x5f4a, (q15_t)0x37d5, (q15_t)0x5f55, (q15_t)0x37ce,
+    (q15_t)0x5f60, (q15_t)0x37c8, (q15_t)0x5f6b, (q15_t)0x37c2, (q15_t)0x5f76, (q15_t)0x37bc, (q15_t)0x5f81, (q15_t)0x37b6,
+    (q15_t)0x5f8c, (q15_t)0x37b0, (q15_t)0x5f97, (q15_t)0x37a9, (q15_t)0x5fa2, (q15_t)0x37a3, (q15_t)0x5fac, (q15_t)0x379d,
+    (q15_t)0x5fb7, (q15_t)0x3797, (q15_t)0x5fc2, (q15_t)0x3790, (q15_t)0x5fcd, (q15_t)0x378a, (q15_t)0x5fd8, (q15_t)0x3784,
+    (q15_t)0x5fe3, (q15_t)0x377e, (q15_t)0x5fee, (q15_t)0x3777, (q15_t)0x5ff9, (q15_t)0x3771, (q15_t)0x6004, (q15_t)0x376b,
+    (q15_t)0x600f, (q15_t)0x3765, (q15_t)0x6019, (q15_t)0x375e, (q15_t)0x6024, (q15_t)0x3758, (q15_t)0x602f, (q15_t)0x3752,
+    (q15_t)0x603a, (q15_t)0x374b, (q15_t)0x6045, (q15_t)0x3745, (q15_t)0x6050, (q15_t)0x373f, (q15_t)0x605b, (q15_t)0x3738,
+    (q15_t)0x6065, (q15_t)0x3732, (q15_t)0x6070, (q15_t)0x372c, (q15_t)0x607b, (q15_t)0x3725, (q15_t)0x6086, (q15_t)0x371f,
+    (q15_t)0x6091, (q15_t)0x3718, (q15_t)0x609b, (q15_t)0x3712, (q15_t)0x60a6, (q15_t)0x370c, (q15_t)0x60b1, (q15_t)0x3705,
+    (q15_t)0x60bc, (q15_t)0x36ff, (q15_t)0x60c7, (q15_t)0x36f8, (q15_t)0x60d1, (q15_t)0x36f2, (q15_t)0x60dc, (q15_t)0x36eb,
+    (q15_t)0x60e7, (q15_t)0x36e5, (q15_t)0x60f2, (q15_t)0x36df, (q15_t)0x60fd, (q15_t)0x36d8, (q15_t)0x6107, (q15_t)0x36d2,
+    (q15_t)0x6112, (q15_t)0x36cb, (q15_t)0x611d, (q15_t)0x36c5, (q15_t)0x6128, (q15_t)0x36be, (q15_t)0x6132, (q15_t)0x36b8,
+    (q15_t)0x613d, (q15_t)0x36b1, (q15_t)0x6148, (q15_t)0x36ab, (q15_t)0x6153, (q15_t)0x36a4, (q15_t)0x615d, (q15_t)0x369d,
+    (q15_t)0x6168, (q15_t)0x3697, (q15_t)0x6173, (q15_t)0x3690, (q15_t)0x617d, (q15_t)0x368a, (q15_t)0x6188, (q15_t)0x3683,
+    (q15_t)0x6193, (q15_t)0x367d, (q15_t)0x619e, (q15_t)0x3676, (q15_t)0x61a8, (q15_t)0x366f, (q15_t)0x61b3, (q15_t)0x3669,
+    (q15_t)0x61be, (q15_t)0x3662, (q15_t)0x61c8, (q15_t)0x365c, (q15_t)0x61d3, (q15_t)0x3655, (q15_t)0x61de, (q15_t)0x364e,
+    (q15_t)0x61e8, (q15_t)0x3648, (q15_t)0x61f3, (q15_t)0x3641, (q15_t)0x61fe, (q15_t)0x363a, (q15_t)0x6208, (q15_t)0x3634,
+    (q15_t)0x6213, (q15_t)0x362d, (q15_t)0x621e, (q15_t)0x3626, (q15_t)0x6228, (q15_t)0x3620, (q15_t)0x6233, (q15_t)0x3619,
+    (q15_t)0x623d, (q15_t)0x3612, (q15_t)0x6248, (q15_t)0x360b, (q15_t)0x6253, (q15_t)0x3605, (q15_t)0x625d, (q15_t)0x35fe,
+    (q15_t)0x6268, (q15_t)0x35f7, (q15_t)0x6272, (q15_t)0x35f0, (q15_t)0x627d, (q15_t)0x35ea, (q15_t)0x6288, (q15_t)0x35e3,
+    (q15_t)0x6292, (q15_t)0x35dc, (q15_t)0x629d, (q15_t)0x35d5, (q15_t)0x62a7, (q15_t)0x35ce, (q15_t)0x62b2, (q15_t)0x35c8,
+    (q15_t)0x62bc, (q15_t)0x35c1, (q15_t)0x62c7, (q15_t)0x35ba, (q15_t)0x62d2, (q15_t)0x35b3, (q15_t)0x62dc, (q15_t)0x35ac,
+    (q15_t)0x62e7, (q15_t)0x35a5, (q15_t)0x62f1, (q15_t)0x359f, (q15_t)0x62fc, (q15_t)0x3598, (q15_t)0x6306, (q15_t)0x3591,
+    (q15_t)0x6311, (q15_t)0x358a, (q15_t)0x631b, (q15_t)0x3583, (q15_t)0x6326, (q15_t)0x357c, (q15_t)0x6330, (q15_t)0x3575,
+    (q15_t)0x633b, (q15_t)0x356e, (q15_t)0x6345, (q15_t)0x3567, (q15_t)0x6350, (q15_t)0x3561, (q15_t)0x635a, (q15_t)0x355a,
+    (q15_t)0x6365, (q15_t)0x3553, (q15_t)0x636f, (q15_t)0x354c, (q15_t)0x637a, (q15_t)0x3545, (q15_t)0x6384, (q15_t)0x353e,
+    (q15_t)0x638e, (q15_t)0x3537, (q15_t)0x6399, (q15_t)0x3530, (q15_t)0x63a3, (q15_t)0x3529, (q15_t)0x63ae, (q15_t)0x3522,
+    (q15_t)0x63b8, (q15_t)0x351b, (q15_t)0x63c3, (q15_t)0x3514, (q15_t)0x63cd, (q15_t)0x350d, (q15_t)0x63d7, (q15_t)0x3506,
+    (q15_t)0x63e2, (q15_t)0x34ff, (q15_t)0x63ec, (q15_t)0x34f8, (q15_t)0x63f7, (q15_t)0x34f1, (q15_t)0x6401, (q15_t)0x34ea,
+    (q15_t)0x640b, (q15_t)0x34e2, (q15_t)0x6416, (q15_t)0x34db, (q15_t)0x6420, (q15_t)0x34d4, (q15_t)0x642b, (q15_t)0x34cd,
+    (q15_t)0x6435, (q15_t)0x34c6, (q15_t)0x643f, (q15_t)0x34bf, (q15_t)0x644a, (q15_t)0x34b8, (q15_t)0x6454, (q15_t)0x34b1,
+    (q15_t)0x645e, (q15_t)0x34aa, (q15_t)0x6469, (q15_t)0x34a2, (q15_t)0x6473, (q15_t)0x349b, (q15_t)0x647d, (q15_t)0x3494,
+    (q15_t)0x6488, (q15_t)0x348d, (q15_t)0x6492, (q15_t)0x3486, (q15_t)0x649c, (q15_t)0x347f, (q15_t)0x64a7, (q15_t)0x3477,
+    (q15_t)0x64b1, (q15_t)0x3470, (q15_t)0x64bb, (q15_t)0x3469, (q15_t)0x64c5, (q15_t)0x3462, (q15_t)0x64d0, (q15_t)0x345b,
+    (q15_t)0x64da, (q15_t)0x3453, (q15_t)0x64e4, (q15_t)0x344c, (q15_t)0x64ef, (q15_t)0x3445, (q15_t)0x64f9, (q15_t)0x343e,
+    (q15_t)0x6503, (q15_t)0x3436, (q15_t)0x650d, (q15_t)0x342f, (q15_t)0x6518, (q15_t)0x3428, (q15_t)0x6522, (q15_t)0x3420,
+    (q15_t)0x652c, (q15_t)0x3419, (q15_t)0x6536, (q15_t)0x3412, (q15_t)0x6541, (q15_t)0x340b, (q15_t)0x654b, (q15_t)0x3403,
+    (q15_t)0x6555, (q15_t)0x33fc, (q15_t)0x655f, (q15_t)0x33f5, (q15_t)0x6569, (q15_t)0x33ed, (q15_t)0x6574, (q15_t)0x33e6,
+    (q15_t)0x657e, (q15_t)0x33df, (q15_t)0x6588, (q15_t)0x33d7, (q15_t)0x6592, (q15_t)0x33d0, (q15_t)0x659c, (q15_t)0x33c8,
+    (q15_t)0x65a6, (q15_t)0x33c1, (q15_t)0x65b1, (q15_t)0x33ba, (q15_t)0x65bb, (q15_t)0x33b2, (q15_t)0x65c5, (q15_t)0x33ab,
+    (q15_t)0x65cf, (q15_t)0x33a3, (q15_t)0x65d9, (q15_t)0x339c, (q15_t)0x65e3, (q15_t)0x3395, (q15_t)0x65ed, (q15_t)0x338d,
+    (q15_t)0x65f8, (q15_t)0x3386, (q15_t)0x6602, (q15_t)0x337e, (q15_t)0x660c, (q15_t)0x3377, (q15_t)0x6616, (q15_t)0x336f,
+    (q15_t)0x6620, (q15_t)0x3368, (q15_t)0x662a, (q15_t)0x3360, (q15_t)0x6634, (q15_t)0x3359, (q15_t)0x663e, (q15_t)0x3351,
+    (q15_t)0x6648, (q15_t)0x334a, (q15_t)0x6652, (q15_t)0x3342, (q15_t)0x665c, (q15_t)0x333b, (q15_t)0x6666, (q15_t)0x3333,
+    (q15_t)0x6671, (q15_t)0x332c, (q15_t)0x667b, (q15_t)0x3324, (q15_t)0x6685, (q15_t)0x331d, (q15_t)0x668f, (q15_t)0x3315,
+    (q15_t)0x6699, (q15_t)0x330d, (q15_t)0x66a3, (q15_t)0x3306, (q15_t)0x66ad, (q15_t)0x32fe, (q15_t)0x66b7, (q15_t)0x32f7,
+    (q15_t)0x66c1, (q15_t)0x32ef, (q15_t)0x66cb, (q15_t)0x32e7, (q15_t)0x66d5, (q15_t)0x32e0, (q15_t)0x66df, (q15_t)0x32d8,
+    (q15_t)0x66e9, (q15_t)0x32d0, (q15_t)0x66f3, (q15_t)0x32c9, (q15_t)0x66fd, (q15_t)0x32c1, (q15_t)0x6707, (q15_t)0x32ba,
+    (q15_t)0x6711, (q15_t)0x32b2, (q15_t)0x671a, (q15_t)0x32aa, (q15_t)0x6724, (q15_t)0x32a3, (q15_t)0x672e, (q15_t)0x329b,
+    (q15_t)0x6738, (q15_t)0x3293, (q15_t)0x6742, (q15_t)0x328b, (q15_t)0x674c, (q15_t)0x3284, (q15_t)0x6756, (q15_t)0x327c,
+    (q15_t)0x6760, (q15_t)0x3274, (q15_t)0x676a, (q15_t)0x326d, (q15_t)0x6774, (q15_t)0x3265, (q15_t)0x677e, (q15_t)0x325d,
+    (q15_t)0x6788, (q15_t)0x3255, (q15_t)0x6791, (q15_t)0x324e, (q15_t)0x679b, (q15_t)0x3246, (q15_t)0x67a5, (q15_t)0x323e,
+    (q15_t)0x67af, (q15_t)0x3236, (q15_t)0x67b9, (q15_t)0x322e, (q15_t)0x67c3, (q15_t)0x3227, (q15_t)0x67cd, (q15_t)0x321f,
+    (q15_t)0x67d6, (q15_t)0x3217, (q15_t)0x67e0, (q15_t)0x320f, (q15_t)0x67ea, (q15_t)0x3207, (q15_t)0x67f4, (q15_t)0x31ff,
+    (q15_t)0x67fe, (q15_t)0x31f8, (q15_t)0x6808, (q15_t)0x31f0, (q15_t)0x6811, (q15_t)0x31e8, (q15_t)0x681b, (q15_t)0x31e0,
+    (q15_t)0x6825, (q15_t)0x31d8, (q15_t)0x682f, (q15_t)0x31d0, (q15_t)0x6838, (q15_t)0x31c8, (q15_t)0x6842, (q15_t)0x31c0,
+    (q15_t)0x684c, (q15_t)0x31b9, (q15_t)0x6856, (q15_t)0x31b1, (q15_t)0x6860, (q15_t)0x31a9, (q15_t)0x6869, (q15_t)0x31a1,
+    (q15_t)0x6873, (q15_t)0x3199, (q15_t)0x687d, (q15_t)0x3191, (q15_t)0x6886, (q15_t)0x3189, (q15_t)0x6890, (q15_t)0x3181,
+    (q15_t)0x689a, (q15_t)0x3179, (q15_t)0x68a4, (q15_t)0x3171, (q15_t)0x68ad, (q15_t)0x3169, (q15_t)0x68b7, (q15_t)0x3161,
+    (q15_t)0x68c1, (q15_t)0x3159, (q15_t)0x68ca, (q15_t)0x3151, (q15_t)0x68d4, (q15_t)0x3149, (q15_t)0x68de, (q15_t)0x3141,
+    (q15_t)0x68e7, (q15_t)0x3139, (q15_t)0x68f1, (q15_t)0x3131, (q15_t)0x68fb, (q15_t)0x3129, (q15_t)0x6904, (q15_t)0x3121,
+    (q15_t)0x690e, (q15_t)0x3119, (q15_t)0x6918, (q15_t)0x3111, (q15_t)0x6921, (q15_t)0x3109, (q15_t)0x692b, (q15_t)0x3101,
+    (q15_t)0x6935, (q15_t)0x30f9, (q15_t)0x693e, (q15_t)0x30f0, (q15_t)0x6948, (q15_t)0x30e8, (q15_t)0x6951, (q15_t)0x30e0,
+    (q15_t)0x695b, (q15_t)0x30d8, (q15_t)0x6965, (q15_t)0x30d0, (q15_t)0x696e, (q15_t)0x30c8, (q15_t)0x6978, (q15_t)0x30c0,
+    (q15_t)0x6981, (q15_t)0x30b8, (q15_t)0x698b, (q15_t)0x30af, (q15_t)0x6994, (q15_t)0x30a7, (q15_t)0x699e, (q15_t)0x309f,
+    (q15_t)0x69a7, (q15_t)0x3097, (q15_t)0x69b1, (q15_t)0x308f, (q15_t)0x69bb, (q15_t)0x3087, (q15_t)0x69c4, (q15_t)0x307e,
+    (q15_t)0x69ce, (q15_t)0x3076, (q15_t)0x69d7, (q15_t)0x306e, (q15_t)0x69e1, (q15_t)0x3066, (q15_t)0x69ea, (q15_t)0x305d,
+    (q15_t)0x69f4, (q15_t)0x3055, (q15_t)0x69fd, (q15_t)0x304d, (q15_t)0x6a07, (q15_t)0x3045, (q15_t)0x6a10, (q15_t)0x303c,
+    (q15_t)0x6a1a, (q15_t)0x3034, (q15_t)0x6a23, (q15_t)0x302c, (q15_t)0x6a2c, (q15_t)0x3024, (q15_t)0x6a36, (q15_t)0x301b,
+    (q15_t)0x6a3f, (q15_t)0x3013, (q15_t)0x6a49, (q15_t)0x300b, (q15_t)0x6a52, (q15_t)0x3002, (q15_t)0x6a5c, (q15_t)0x2ffa,
+    (q15_t)0x6a65, (q15_t)0x2ff2, (q15_t)0x6a6e, (q15_t)0x2fea, (q15_t)0x6a78, (q15_t)0x2fe1, (q15_t)0x6a81, (q15_t)0x2fd9,
+    (q15_t)0x6a8b, (q15_t)0x2fd0, (q15_t)0x6a94, (q15_t)0x2fc8, (q15_t)0x6a9d, (q15_t)0x2fc0, (q15_t)0x6aa7, (q15_t)0x2fb7,
+    (q15_t)0x6ab0, (q15_t)0x2faf, (q15_t)0x6ab9, (q15_t)0x2fa7, (q15_t)0x6ac3, (q15_t)0x2f9e, (q15_t)0x6acc, (q15_t)0x2f96,
+    (q15_t)0x6ad6, (q15_t)0x2f8d, (q15_t)0x6adf, (q15_t)0x2f85, (q15_t)0x6ae8, (q15_t)0x2f7d, (q15_t)0x6af2, (q15_t)0x2f74,
+    (q15_t)0x6afb, (q15_t)0x2f6c, (q15_t)0x6b04, (q15_t)0x2f63, (q15_t)0x6b0d, (q15_t)0x2f5b, (q15_t)0x6b17, (q15_t)0x2f52,
+    (q15_t)0x6b20, (q15_t)0x2f4a, (q15_t)0x6b29, (q15_t)0x2f41, (q15_t)0x6b33, (q15_t)0x2f39, (q15_t)0x6b3c, (q15_t)0x2f30,
+    (q15_t)0x6b45, (q15_t)0x2f28, (q15_t)0x6b4e, (q15_t)0x2f20, (q15_t)0x6b58, (q15_t)0x2f17, (q15_t)0x6b61, (q15_t)0x2f0e,
+    (q15_t)0x6b6a, (q15_t)0x2f06, (q15_t)0x6b73, (q15_t)0x2efd, (q15_t)0x6b7d, (q15_t)0x2ef5, (q15_t)0x6b86, (q15_t)0x2eec,
+    (q15_t)0x6b8f, (q15_t)0x2ee4, (q15_t)0x6b98, (q15_t)0x2edb, (q15_t)0x6ba1, (q15_t)0x2ed3, (q15_t)0x6bab, (q15_t)0x2eca,
+    (q15_t)0x6bb4, (q15_t)0x2ec2, (q15_t)0x6bbd, (q15_t)0x2eb9, (q15_t)0x6bc6, (q15_t)0x2eb0, (q15_t)0x6bcf, (q15_t)0x2ea8,
+    (q15_t)0x6bd8, (q15_t)0x2e9f, (q15_t)0x6be2, (q15_t)0x2e97, (q15_t)0x6beb, (q15_t)0x2e8e, (q15_t)0x6bf4, (q15_t)0x2e85,
+    (q15_t)0x6bfd, (q15_t)0x2e7d, (q15_t)0x6c06, (q15_t)0x2e74, (q15_t)0x6c0f, (q15_t)0x2e6b, (q15_t)0x6c18, (q15_t)0x2e63,
+    (q15_t)0x6c21, (q15_t)0x2e5a, (q15_t)0x6c2b, (q15_t)0x2e51, (q15_t)0x6c34, (q15_t)0x2e49, (q15_t)0x6c3d, (q15_t)0x2e40,
+    (q15_t)0x6c46, (q15_t)0x2e37, (q15_t)0x6c4f, (q15_t)0x2e2f, (q15_t)0x6c58, (q15_t)0x2e26, (q15_t)0x6c61, (q15_t)0x2e1d,
+    (q15_t)0x6c6a, (q15_t)0x2e15, (q15_t)0x6c73, (q15_t)0x2e0c, (q15_t)0x6c7c, (q15_t)0x2e03, (q15_t)0x6c85, (q15_t)0x2dfa,
+    (q15_t)0x6c8e, (q15_t)0x2df2, (q15_t)0x6c97, (q15_t)0x2de9, (q15_t)0x6ca0, (q15_t)0x2de0, (q15_t)0x6ca9, (q15_t)0x2dd7,
+    (q15_t)0x6cb2, (q15_t)0x2dcf, (q15_t)0x6cbb, (q15_t)0x2dc6, (q15_t)0x6cc4, (q15_t)0x2dbd, (q15_t)0x6ccd, (q15_t)0x2db4,
+    (q15_t)0x6cd6, (q15_t)0x2dab, (q15_t)0x6cdf, (q15_t)0x2da3, (q15_t)0x6ce8, (q15_t)0x2d9a, (q15_t)0x6cf1, (q15_t)0x2d91,
+    (q15_t)0x6cfa, (q15_t)0x2d88, (q15_t)0x6d03, (q15_t)0x2d7f, (q15_t)0x6d0c, (q15_t)0x2d76, (q15_t)0x6d15, (q15_t)0x2d6e,
+    (q15_t)0x6d1e, (q15_t)0x2d65, (q15_t)0x6d27, (q15_t)0x2d5c, (q15_t)0x6d2f, (q15_t)0x2d53, (q15_t)0x6d38, (q15_t)0x2d4a,
+    (q15_t)0x6d41, (q15_t)0x2d41, (q15_t)0x6d4a, (q15_t)0x2d38, (q15_t)0x6d53, (q15_t)0x2d2f, (q15_t)0x6d5c, (q15_t)0x2d27,
+    (q15_t)0x6d65, (q15_t)0x2d1e, (q15_t)0x6d6e, (q15_t)0x2d15, (q15_t)0x6d76, (q15_t)0x2d0c, (q15_t)0x6d7f, (q15_t)0x2d03,
+    (q15_t)0x6d88, (q15_t)0x2cfa, (q15_t)0x6d91, (q15_t)0x2cf1, (q15_t)0x6d9a, (q15_t)0x2ce8, (q15_t)0x6da3, (q15_t)0x2cdf,
+    (q15_t)0x6dab, (q15_t)0x2cd6, (q15_t)0x6db4, (q15_t)0x2ccd, (q15_t)0x6dbd, (q15_t)0x2cc4, (q15_t)0x6dc6, (q15_t)0x2cbb,
+    (q15_t)0x6dcf, (q15_t)0x2cb2, (q15_t)0x6dd7, (q15_t)0x2ca9, (q15_t)0x6de0, (q15_t)0x2ca0, (q15_t)0x6de9, (q15_t)0x2c97,
+    (q15_t)0x6df2, (q15_t)0x2c8e, (q15_t)0x6dfa, (q15_t)0x2c85, (q15_t)0x6e03, (q15_t)0x2c7c, (q15_t)0x6e0c, (q15_t)0x2c73,
+    (q15_t)0x6e15, (q15_t)0x2c6a, (q15_t)0x6e1d, (q15_t)0x2c61, (q15_t)0x6e26, (q15_t)0x2c58, (q15_t)0x6e2f, (q15_t)0x2c4f,
+    (q15_t)0x6e37, (q15_t)0x2c46, (q15_t)0x6e40, (q15_t)0x2c3d, (q15_t)0x6e49, (q15_t)0x2c34, (q15_t)0x6e51, (q15_t)0x2c2b,
+    (q15_t)0x6e5a, (q15_t)0x2c21, (q15_t)0x6e63, (q15_t)0x2c18, (q15_t)0x6e6b, (q15_t)0x2c0f, (q15_t)0x6e74, (q15_t)0x2c06,
+    (q15_t)0x6e7d, (q15_t)0x2bfd, (q15_t)0x6e85, (q15_t)0x2bf4, (q15_t)0x6e8e, (q15_t)0x2beb, (q15_t)0x6e97, (q15_t)0x2be2,
+    (q15_t)0x6e9f, (q15_t)0x2bd8, (q15_t)0x6ea8, (q15_t)0x2bcf, (q15_t)0x6eb0, (q15_t)0x2bc6, (q15_t)0x6eb9, (q15_t)0x2bbd,
+    (q15_t)0x6ec2, (q15_t)0x2bb4, (q15_t)0x6eca, (q15_t)0x2bab, (q15_t)0x6ed3, (q15_t)0x2ba1, (q15_t)0x6edb, (q15_t)0x2b98,
+    (q15_t)0x6ee4, (q15_t)0x2b8f, (q15_t)0x6eec, (q15_t)0x2b86, (q15_t)0x6ef5, (q15_t)0x2b7d, (q15_t)0x6efd, (q15_t)0x2b73,
+    (q15_t)0x6f06, (q15_t)0x2b6a, (q15_t)0x6f0e, (q15_t)0x2b61, (q15_t)0x6f17, (q15_t)0x2b58, (q15_t)0x6f20, (q15_t)0x2b4e,
+    (q15_t)0x6f28, (q15_t)0x2b45, (q15_t)0x6f30, (q15_t)0x2b3c, (q15_t)0x6f39, (q15_t)0x2b33, (q15_t)0x6f41, (q15_t)0x2b29,
+    (q15_t)0x6f4a, (q15_t)0x2b20, (q15_t)0x6f52, (q15_t)0x2b17, (q15_t)0x6f5b, (q15_t)0x2b0d, (q15_t)0x6f63, (q15_t)0x2b04,
+    (q15_t)0x6f6c, (q15_t)0x2afb, (q15_t)0x6f74, (q15_t)0x2af2, (q15_t)0x6f7d, (q15_t)0x2ae8, (q15_t)0x6f85, (q15_t)0x2adf,
+    (q15_t)0x6f8d, (q15_t)0x2ad6, (q15_t)0x6f96, (q15_t)0x2acc, (q15_t)0x6f9e, (q15_t)0x2ac3, (q15_t)0x6fa7, (q15_t)0x2ab9,
+    (q15_t)0x6faf, (q15_t)0x2ab0, (q15_t)0x6fb7, (q15_t)0x2aa7, (q15_t)0x6fc0, (q15_t)0x2a9d, (q15_t)0x6fc8, (q15_t)0x2a94,
+    (q15_t)0x6fd0, (q15_t)0x2a8b, (q15_t)0x6fd9, (q15_t)0x2a81, (q15_t)0x6fe1, (q15_t)0x2a78, (q15_t)0x6fea, (q15_t)0x2a6e,
+    (q15_t)0x6ff2, (q15_t)0x2a65, (q15_t)0x6ffa, (q15_t)0x2a5c, (q15_t)0x7002, (q15_t)0x2a52, (q15_t)0x700b, (q15_t)0x2a49,
+    (q15_t)0x7013, (q15_t)0x2a3f, (q15_t)0x701b, (q15_t)0x2a36, (q15_t)0x7024, (q15_t)0x2a2c, (q15_t)0x702c, (q15_t)0x2a23,
+    (q15_t)0x7034, (q15_t)0x2a1a, (q15_t)0x703c, (q15_t)0x2a10, (q15_t)0x7045, (q15_t)0x2a07, (q15_t)0x704d, (q15_t)0x29fd,
+    (q15_t)0x7055, (q15_t)0x29f4, (q15_t)0x705d, (q15_t)0x29ea, (q15_t)0x7066, (q15_t)0x29e1, (q15_t)0x706e, (q15_t)0x29d7,
+    (q15_t)0x7076, (q15_t)0x29ce, (q15_t)0x707e, (q15_t)0x29c4, (q15_t)0x7087, (q15_t)0x29bb, (q15_t)0x708f, (q15_t)0x29b1,
+    (q15_t)0x7097, (q15_t)0x29a7, (q15_t)0x709f, (q15_t)0x299e, (q15_t)0x70a7, (q15_t)0x2994, (q15_t)0x70af, (q15_t)0x298b,
+    (q15_t)0x70b8, (q15_t)0x2981, (q15_t)0x70c0, (q15_t)0x2978, (q15_t)0x70c8, (q15_t)0x296e, (q15_t)0x70d0, (q15_t)0x2965,
+    (q15_t)0x70d8, (q15_t)0x295b, (q15_t)0x70e0, (q15_t)0x2951, (q15_t)0x70e8, (q15_t)0x2948, (q15_t)0x70f0, (q15_t)0x293e,
+    (q15_t)0x70f9, (q15_t)0x2935, (q15_t)0x7101, (q15_t)0x292b, (q15_t)0x7109, (q15_t)0x2921, (q15_t)0x7111, (q15_t)0x2918,
+    (q15_t)0x7119, (q15_t)0x290e, (q15_t)0x7121, (q15_t)0x2904, (q15_t)0x7129, (q15_t)0x28fb, (q15_t)0x7131, (q15_t)0x28f1,
+    (q15_t)0x7139, (q15_t)0x28e7, (q15_t)0x7141, (q15_t)0x28de, (q15_t)0x7149, (q15_t)0x28d4, (q15_t)0x7151, (q15_t)0x28ca,
+    (q15_t)0x7159, (q15_t)0x28c1, (q15_t)0x7161, (q15_t)0x28b7, (q15_t)0x7169, (q15_t)0x28ad, (q15_t)0x7171, (q15_t)0x28a4,
+    (q15_t)0x7179, (q15_t)0x289a, (q15_t)0x7181, (q15_t)0x2890, (q15_t)0x7189, (q15_t)0x2886, (q15_t)0x7191, (q15_t)0x287d,
+    (q15_t)0x7199, (q15_t)0x2873, (q15_t)0x71a1, (q15_t)0x2869, (q15_t)0x71a9, (q15_t)0x2860, (q15_t)0x71b1, (q15_t)0x2856,
+    (q15_t)0x71b9, (q15_t)0x284c, (q15_t)0x71c0, (q15_t)0x2842, (q15_t)0x71c8, (q15_t)0x2838, (q15_t)0x71d0, (q15_t)0x282f,
+    (q15_t)0x71d8, (q15_t)0x2825, (q15_t)0x71e0, (q15_t)0x281b, (q15_t)0x71e8, (q15_t)0x2811, (q15_t)0x71f0, (q15_t)0x2808,
+    (q15_t)0x71f8, (q15_t)0x27fe, (q15_t)0x71ff, (q15_t)0x27f4, (q15_t)0x7207, (q15_t)0x27ea, (q15_t)0x720f, (q15_t)0x27e0,
+    (q15_t)0x7217, (q15_t)0x27d6, (q15_t)0x721f, (q15_t)0x27cd, (q15_t)0x7227, (q15_t)0x27c3, (q15_t)0x722e, (q15_t)0x27b9,
+    (q15_t)0x7236, (q15_t)0x27af, (q15_t)0x723e, (q15_t)0x27a5, (q15_t)0x7246, (q15_t)0x279b, (q15_t)0x724e, (q15_t)0x2791,
+    (q15_t)0x7255, (q15_t)0x2788, (q15_t)0x725d, (q15_t)0x277e, (q15_t)0x7265, (q15_t)0x2774, (q15_t)0x726d, (q15_t)0x276a,
+    (q15_t)0x7274, (q15_t)0x2760, (q15_t)0x727c, (q15_t)0x2756, (q15_t)0x7284, (q15_t)0x274c, (q15_t)0x728b, (q15_t)0x2742,
+    (q15_t)0x7293, (q15_t)0x2738, (q15_t)0x729b, (q15_t)0x272e, (q15_t)0x72a3, (q15_t)0x2724, (q15_t)0x72aa, (q15_t)0x271a,
+    (q15_t)0x72b2, (q15_t)0x2711, (q15_t)0x72ba, (q15_t)0x2707, (q15_t)0x72c1, (q15_t)0x26fd, (q15_t)0x72c9, (q15_t)0x26f3,
+    (q15_t)0x72d0, (q15_t)0x26e9, (q15_t)0x72d8, (q15_t)0x26df, (q15_t)0x72e0, (q15_t)0x26d5, (q15_t)0x72e7, (q15_t)0x26cb,
+    (q15_t)0x72ef, (q15_t)0x26c1, (q15_t)0x72f7, (q15_t)0x26b7, (q15_t)0x72fe, (q15_t)0x26ad, (q15_t)0x7306, (q15_t)0x26a3,
+    (q15_t)0x730d, (q15_t)0x2699, (q15_t)0x7315, (q15_t)0x268f, (q15_t)0x731d, (q15_t)0x2685, (q15_t)0x7324, (q15_t)0x267b,
+    (q15_t)0x732c, (q15_t)0x2671, (q15_t)0x7333, (q15_t)0x2666, (q15_t)0x733b, (q15_t)0x265c, (q15_t)0x7342, (q15_t)0x2652,
+    (q15_t)0x734a, (q15_t)0x2648, (q15_t)0x7351, (q15_t)0x263e, (q15_t)0x7359, (q15_t)0x2634, (q15_t)0x7360, (q15_t)0x262a,
+    (q15_t)0x7368, (q15_t)0x2620, (q15_t)0x736f, (q15_t)0x2616, (q15_t)0x7377, (q15_t)0x260c, (q15_t)0x737e, (q15_t)0x2602,
+    (q15_t)0x7386, (q15_t)0x25f8, (q15_t)0x738d, (q15_t)0x25ed, (q15_t)0x7395, (q15_t)0x25e3, (q15_t)0x739c, (q15_t)0x25d9,
+    (q15_t)0x73a3, (q15_t)0x25cf, (q15_t)0x73ab, (q15_t)0x25c5, (q15_t)0x73b2, (q15_t)0x25bb, (q15_t)0x73ba, (q15_t)0x25b1,
+    (q15_t)0x73c1, (q15_t)0x25a6, (q15_t)0x73c8, (q15_t)0x259c, (q15_t)0x73d0, (q15_t)0x2592, (q15_t)0x73d7, (q15_t)0x2588,
+    (q15_t)0x73df, (q15_t)0x257e, (q15_t)0x73e6, (q15_t)0x2574, (q15_t)0x73ed, (q15_t)0x2569, (q15_t)0x73f5, (q15_t)0x255f,
+    (q15_t)0x73fc, (q15_t)0x2555, (q15_t)0x7403, (q15_t)0x254b, (q15_t)0x740b, (q15_t)0x2541, (q15_t)0x7412, (q15_t)0x2536,
+    (q15_t)0x7419, (q15_t)0x252c, (q15_t)0x7420, (q15_t)0x2522, (q15_t)0x7428, (q15_t)0x2518, (q15_t)0x742f, (q15_t)0x250d,
+    (q15_t)0x7436, (q15_t)0x2503, (q15_t)0x743e, (q15_t)0x24f9, (q15_t)0x7445, (q15_t)0x24ef, (q15_t)0x744c, (q15_t)0x24e4,
+    (q15_t)0x7453, (q15_t)0x24da, (q15_t)0x745b, (q15_t)0x24d0, (q15_t)0x7462, (q15_t)0x24c5, (q15_t)0x7469, (q15_t)0x24bb,
+    (q15_t)0x7470, (q15_t)0x24b1, (q15_t)0x7477, (q15_t)0x24a7, (q15_t)0x747f, (q15_t)0x249c, (q15_t)0x7486, (q15_t)0x2492,
+    (q15_t)0x748d, (q15_t)0x2488, (q15_t)0x7494, (q15_t)0x247d, (q15_t)0x749b, (q15_t)0x2473, (q15_t)0x74a2, (q15_t)0x2469,
+    (q15_t)0x74aa, (q15_t)0x245e, (q15_t)0x74b1, (q15_t)0x2454, (q15_t)0x74b8, (q15_t)0x244a, (q15_t)0x74bf, (q15_t)0x243f,
+    (q15_t)0x74c6, (q15_t)0x2435, (q15_t)0x74cd, (q15_t)0x242b, (q15_t)0x74d4, (q15_t)0x2420, (q15_t)0x74db, (q15_t)0x2416,
+    (q15_t)0x74e2, (q15_t)0x240b, (q15_t)0x74ea, (q15_t)0x2401, (q15_t)0x74f1, (q15_t)0x23f7, (q15_t)0x74f8, (q15_t)0x23ec,
+    (q15_t)0x74ff, (q15_t)0x23e2, (q15_t)0x7506, (q15_t)0x23d7, (q15_t)0x750d, (q15_t)0x23cd, (q15_t)0x7514, (q15_t)0x23c3,
+    (q15_t)0x751b, (q15_t)0x23b8, (q15_t)0x7522, (q15_t)0x23ae, (q15_t)0x7529, (q15_t)0x23a3, (q15_t)0x7530, (q15_t)0x2399,
+    (q15_t)0x7537, (q15_t)0x238e, (q15_t)0x753e, (q15_t)0x2384, (q15_t)0x7545, (q15_t)0x237a, (q15_t)0x754c, (q15_t)0x236f,
+    (q15_t)0x7553, (q15_t)0x2365, (q15_t)0x755a, (q15_t)0x235a, (q15_t)0x7561, (q15_t)0x2350, (q15_t)0x7567, (q15_t)0x2345,
+    (q15_t)0x756e, (q15_t)0x233b, (q15_t)0x7575, (q15_t)0x2330, (q15_t)0x757c, (q15_t)0x2326, (q15_t)0x7583, (q15_t)0x231b,
+    (q15_t)0x758a, (q15_t)0x2311, (q15_t)0x7591, (q15_t)0x2306, (q15_t)0x7598, (q15_t)0x22fc, (q15_t)0x759f, (q15_t)0x22f1,
+    (q15_t)0x75a5, (q15_t)0x22e7, (q15_t)0x75ac, (q15_t)0x22dc, (q15_t)0x75b3, (q15_t)0x22d2, (q15_t)0x75ba, (q15_t)0x22c7,
+    (q15_t)0x75c1, (q15_t)0x22bc, (q15_t)0x75c8, (q15_t)0x22b2, (q15_t)0x75ce, (q15_t)0x22a7, (q15_t)0x75d5, (q15_t)0x229d,
+    (q15_t)0x75dc, (q15_t)0x2292, (q15_t)0x75e3, (q15_t)0x2288, (q15_t)0x75ea, (q15_t)0x227d, (q15_t)0x75f0, (q15_t)0x2272,
+    (q15_t)0x75f7, (q15_t)0x2268, (q15_t)0x75fe, (q15_t)0x225d, (q15_t)0x7605, (q15_t)0x2253, (q15_t)0x760b, (q15_t)0x2248,
+    (q15_t)0x7612, (q15_t)0x223d, (q15_t)0x7619, (q15_t)0x2233, (q15_t)0x7620, (q15_t)0x2228, (q15_t)0x7626, (q15_t)0x221e,
+    (q15_t)0x762d, (q15_t)0x2213, (q15_t)0x7634, (q15_t)0x2208, (q15_t)0x763a, (q15_t)0x21fe, (q15_t)0x7641, (q15_t)0x21f3,
+    (q15_t)0x7648, (q15_t)0x21e8, (q15_t)0x764e, (q15_t)0x21de, (q15_t)0x7655, (q15_t)0x21d3, (q15_t)0x765c, (q15_t)0x21c8,
+    (q15_t)0x7662, (q15_t)0x21be, (q15_t)0x7669, (q15_t)0x21b3, (q15_t)0x766f, (q15_t)0x21a8, (q15_t)0x7676, (q15_t)0x219e,
+    (q15_t)0x767d, (q15_t)0x2193, (q15_t)0x7683, (q15_t)0x2188, (q15_t)0x768a, (q15_t)0x217d, (q15_t)0x7690, (q15_t)0x2173,
+    (q15_t)0x7697, (q15_t)0x2168, (q15_t)0x769d, (q15_t)0x215d, (q15_t)0x76a4, (q15_t)0x2153, (q15_t)0x76ab, (q15_t)0x2148,
+    (q15_t)0x76b1, (q15_t)0x213d, (q15_t)0x76b8, (q15_t)0x2132, (q15_t)0x76be, (q15_t)0x2128, (q15_t)0x76c5, (q15_t)0x211d,
+    (q15_t)0x76cb, (q15_t)0x2112, (q15_t)0x76d2, (q15_t)0x2107, (q15_t)0x76d8, (q15_t)0x20fd, (q15_t)0x76df, (q15_t)0x20f2,
+    (q15_t)0x76e5, (q15_t)0x20e7, (q15_t)0x76eb, (q15_t)0x20dc, (q15_t)0x76f2, (q15_t)0x20d1, (q15_t)0x76f8, (q15_t)0x20c7,
+    (q15_t)0x76ff, (q15_t)0x20bc, (q15_t)0x7705, (q15_t)0x20b1, (q15_t)0x770c, (q15_t)0x20a6, (q15_t)0x7712, (q15_t)0x209b,
+    (q15_t)0x7718, (q15_t)0x2091, (q15_t)0x771f, (q15_t)0x2086, (q15_t)0x7725, (q15_t)0x207b, (q15_t)0x772c, (q15_t)0x2070,
+    (q15_t)0x7732, (q15_t)0x2065, (q15_t)0x7738, (q15_t)0x205b, (q15_t)0x773f, (q15_t)0x2050, (q15_t)0x7745, (q15_t)0x2045,
+    (q15_t)0x774b, (q15_t)0x203a, (q15_t)0x7752, (q15_t)0x202f, (q15_t)0x7758, (q15_t)0x2024, (q15_t)0x775e, (q15_t)0x2019,
+    (q15_t)0x7765, (q15_t)0x200f, (q15_t)0x776b, (q15_t)0x2004, (q15_t)0x7771, (q15_t)0x1ff9, (q15_t)0x7777, (q15_t)0x1fee,
+    (q15_t)0x777e, (q15_t)0x1fe3, (q15_t)0x7784, (q15_t)0x1fd8, (q15_t)0x778a, (q15_t)0x1fcd, (q15_t)0x7790, (q15_t)0x1fc2,
+    (q15_t)0x7797, (q15_t)0x1fb7, (q15_t)0x779d, (q15_t)0x1fac, (q15_t)0x77a3, (q15_t)0x1fa2, (q15_t)0x77a9, (q15_t)0x1f97,
+    (q15_t)0x77b0, (q15_t)0x1f8c, (q15_t)0x77b6, (q15_t)0x1f81, (q15_t)0x77bc, (q15_t)0x1f76, (q15_t)0x77c2, (q15_t)0x1f6b,
+    (q15_t)0x77c8, (q15_t)0x1f60, (q15_t)0x77ce, (q15_t)0x1f55, (q15_t)0x77d5, (q15_t)0x1f4a, (q15_t)0x77db, (q15_t)0x1f3f,
+    (q15_t)0x77e1, (q15_t)0x1f34, (q15_t)0x77e7, (q15_t)0x1f29, (q15_t)0x77ed, (q15_t)0x1f1e, (q15_t)0x77f3, (q15_t)0x1f13,
+    (q15_t)0x77f9, (q15_t)0x1f08, (q15_t)0x77ff, (q15_t)0x1efd, (q15_t)0x7805, (q15_t)0x1ef2, (q15_t)0x780b, (q15_t)0x1ee7,
+    (q15_t)0x7812, (q15_t)0x1edc, (q15_t)0x7818, (q15_t)0x1ed1, (q15_t)0x781e, (q15_t)0x1ec6, (q15_t)0x7824, (q15_t)0x1ebb,
+    (q15_t)0x782a, (q15_t)0x1eb0, (q15_t)0x7830, (q15_t)0x1ea5, (q15_t)0x7836, (q15_t)0x1e9a, (q15_t)0x783c, (q15_t)0x1e8f,
+    (q15_t)0x7842, (q15_t)0x1e84, (q15_t)0x7848, (q15_t)0x1e79, (q15_t)0x784e, (q15_t)0x1e6e, (q15_t)0x7854, (q15_t)0x1e63,
+    (q15_t)0x785a, (q15_t)0x1e58, (q15_t)0x7860, (q15_t)0x1e4d, (q15_t)0x7866, (q15_t)0x1e42, (q15_t)0x786b, (q15_t)0x1e36,
+    (q15_t)0x7871, (q15_t)0x1e2b, (q15_t)0x7877, (q15_t)0x1e20, (q15_t)0x787d, (q15_t)0x1e15, (q15_t)0x7883, (q15_t)0x1e0a,
+    (q15_t)0x7889, (q15_t)0x1dff, (q15_t)0x788f, (q15_t)0x1df4, (q15_t)0x7895, (q15_t)0x1de9, (q15_t)0x789b, (q15_t)0x1dde,
+    (q15_t)0x78a1, (q15_t)0x1dd3, (q15_t)0x78a6, (q15_t)0x1dc7, (q15_t)0x78ac, (q15_t)0x1dbc, (q15_t)0x78b2, (q15_t)0x1db1,
+    (q15_t)0x78b8, (q15_t)0x1da6, (q15_t)0x78be, (q15_t)0x1d9b, (q15_t)0x78c3, (q15_t)0x1d90, (q15_t)0x78c9, (q15_t)0x1d85,
+    (q15_t)0x78cf, (q15_t)0x1d79, (q15_t)0x78d5, (q15_t)0x1d6e, (q15_t)0x78db, (q15_t)0x1d63, (q15_t)0x78e0, (q15_t)0x1d58,
+    (q15_t)0x78e6, (q15_t)0x1d4d, (q15_t)0x78ec, (q15_t)0x1d42, (q15_t)0x78f2, (q15_t)0x1d36, (q15_t)0x78f7, (q15_t)0x1d2b,
+    (q15_t)0x78fd, (q15_t)0x1d20, (q15_t)0x7903, (q15_t)0x1d15, (q15_t)0x7909, (q15_t)0x1d0a, (q15_t)0x790e, (q15_t)0x1cff,
+    (q15_t)0x7914, (q15_t)0x1cf3, (q15_t)0x791a, (q15_t)0x1ce8, (q15_t)0x791f, (q15_t)0x1cdd, (q15_t)0x7925, (q15_t)0x1cd2,
+    (q15_t)0x792b, (q15_t)0x1cc6, (q15_t)0x7930, (q15_t)0x1cbb, (q15_t)0x7936, (q15_t)0x1cb0, (q15_t)0x793b, (q15_t)0x1ca5,
+    (q15_t)0x7941, (q15_t)0x1c99, (q15_t)0x7947, (q15_t)0x1c8e, (q15_t)0x794c, (q15_t)0x1c83, (q15_t)0x7952, (q15_t)0x1c78,
+    (q15_t)0x7958, (q15_t)0x1c6c, (q15_t)0x795d, (q15_t)0x1c61, (q15_t)0x7963, (q15_t)0x1c56, (q15_t)0x7968, (q15_t)0x1c4b,
+    (q15_t)0x796e, (q15_t)0x1c3f, (q15_t)0x7973, (q15_t)0x1c34, (q15_t)0x7979, (q15_t)0x1c29, (q15_t)0x797e, (q15_t)0x1c1e,
+    (q15_t)0x7984, (q15_t)0x1c12, (q15_t)0x7989, (q15_t)0x1c07, (q15_t)0x798f, (q15_t)0x1bfc, (q15_t)0x7994, (q15_t)0x1bf0,
+    (q15_t)0x799a, (q15_t)0x1be5, (q15_t)0x799f, (q15_t)0x1bda, (q15_t)0x79a5, (q15_t)0x1bce, (q15_t)0x79aa, (q15_t)0x1bc3,
+    (q15_t)0x79b0, (q15_t)0x1bb8, (q15_t)0x79b5, (q15_t)0x1bac, (q15_t)0x79bb, (q15_t)0x1ba1, (q15_t)0x79c0, (q15_t)0x1b96,
+    (q15_t)0x79c5, (q15_t)0x1b8a, (q15_t)0x79cb, (q15_t)0x1b7f, (q15_t)0x79d0, (q15_t)0x1b74, (q15_t)0x79d6, (q15_t)0x1b68,
+    (q15_t)0x79db, (q15_t)0x1b5d, (q15_t)0x79e0, (q15_t)0x1b52, (q15_t)0x79e6, (q15_t)0x1b46, (q15_t)0x79eb, (q15_t)0x1b3b,
+    (q15_t)0x79f0, (q15_t)0x1b30, (q15_t)0x79f6, (q15_t)0x1b24, (q15_t)0x79fb, (q15_t)0x1b19, (q15_t)0x7a00, (q15_t)0x1b0d,
+    (q15_t)0x7a06, (q15_t)0x1b02, (q15_t)0x7a0b, (q15_t)0x1af7, (q15_t)0x7a10, (q15_t)0x1aeb, (q15_t)0x7a16, (q15_t)0x1ae0,
+    (q15_t)0x7a1b, (q15_t)0x1ad4, (q15_t)0x7a20, (q15_t)0x1ac9, (q15_t)0x7a25, (q15_t)0x1abe, (q15_t)0x7a2b, (q15_t)0x1ab2,
+    (q15_t)0x7a30, (q15_t)0x1aa7, (q15_t)0x7a35, (q15_t)0x1a9b, (q15_t)0x7a3a, (q15_t)0x1a90, (q15_t)0x7a3f, (q15_t)0x1a84,
+    (q15_t)0x7a45, (q15_t)0x1a79, (q15_t)0x7a4a, (q15_t)0x1a6e, (q15_t)0x7a4f, (q15_t)0x1a62, (q15_t)0x7a54, (q15_t)0x1a57,
+    (q15_t)0x7a59, (q15_t)0x1a4b, (q15_t)0x7a5f, (q15_t)0x1a40, (q15_t)0x7a64, (q15_t)0x1a34, (q15_t)0x7a69, (q15_t)0x1a29,
+    (q15_t)0x7a6e, (q15_t)0x1a1d, (q15_t)0x7a73, (q15_t)0x1a12, (q15_t)0x7a78, (q15_t)0x1a06, (q15_t)0x7a7d, (q15_t)0x19fb,
+    (q15_t)0x7a82, (q15_t)0x19ef, (q15_t)0x7a88, (q15_t)0x19e4, (q15_t)0x7a8d, (q15_t)0x19d8, (q15_t)0x7a92, (q15_t)0x19cd,
+    (q15_t)0x7a97, (q15_t)0x19c1, (q15_t)0x7a9c, (q15_t)0x19b6, (q15_t)0x7aa1, (q15_t)0x19aa, (q15_t)0x7aa6, (q15_t)0x199f,
+    (q15_t)0x7aab, (q15_t)0x1993, (q15_t)0x7ab0, (q15_t)0x1988, (q15_t)0x7ab5, (q15_t)0x197c, (q15_t)0x7aba, (q15_t)0x1971,
+    (q15_t)0x7abf, (q15_t)0x1965, (q15_t)0x7ac4, (q15_t)0x195a, (q15_t)0x7ac9, (q15_t)0x194e, (q15_t)0x7ace, (q15_t)0x1943,
+    (q15_t)0x7ad3, (q15_t)0x1937, (q15_t)0x7ad8, (q15_t)0x192c, (q15_t)0x7add, (q15_t)0x1920, (q15_t)0x7ae2, (q15_t)0x1914,
+    (q15_t)0x7ae6, (q15_t)0x1909, (q15_t)0x7aeb, (q15_t)0x18fd, (q15_t)0x7af0, (q15_t)0x18f2, (q15_t)0x7af5, (q15_t)0x18e6,
+    (q15_t)0x7afa, (q15_t)0x18db, (q15_t)0x7aff, (q15_t)0x18cf, (q15_t)0x7b04, (q15_t)0x18c3, (q15_t)0x7b09, (q15_t)0x18b8,
+    (q15_t)0x7b0e, (q15_t)0x18ac, (q15_t)0x7b12, (q15_t)0x18a1, (q15_t)0x7b17, (q15_t)0x1895, (q15_t)0x7b1c, (q15_t)0x1889,
+    (q15_t)0x7b21, (q15_t)0x187e, (q15_t)0x7b26, (q15_t)0x1872, (q15_t)0x7b2a, (q15_t)0x1867, (q15_t)0x7b2f, (q15_t)0x185b,
+    (q15_t)0x7b34, (q15_t)0x184f, (q15_t)0x7b39, (q15_t)0x1844, (q15_t)0x7b3e, (q15_t)0x1838, (q15_t)0x7b42, (q15_t)0x182d,
+    (q15_t)0x7b47, (q15_t)0x1821, (q15_t)0x7b4c, (q15_t)0x1815, (q15_t)0x7b50, (q15_t)0x180a, (q15_t)0x7b55, (q15_t)0x17fe,
+    (q15_t)0x7b5a, (q15_t)0x17f2, (q15_t)0x7b5f, (q15_t)0x17e7, (q15_t)0x7b63, (q15_t)0x17db, (q15_t)0x7b68, (q15_t)0x17cf,
+    (q15_t)0x7b6d, (q15_t)0x17c4, (q15_t)0x7b71, (q15_t)0x17b8, (q15_t)0x7b76, (q15_t)0x17ac, (q15_t)0x7b7b, (q15_t)0x17a1,
+    (q15_t)0x7b7f, (q15_t)0x1795, (q15_t)0x7b84, (q15_t)0x1789, (q15_t)0x7b88, (q15_t)0x177e, (q15_t)0x7b8d, (q15_t)0x1772,
+    (q15_t)0x7b92, (q15_t)0x1766, (q15_t)0x7b96, (q15_t)0x175b, (q15_t)0x7b9b, (q15_t)0x174f, (q15_t)0x7b9f, (q15_t)0x1743,
+    (q15_t)0x7ba4, (q15_t)0x1737, (q15_t)0x7ba9, (q15_t)0x172c, (q15_t)0x7bad, (q15_t)0x1720, (q15_t)0x7bb2, (q15_t)0x1714,
+    (q15_t)0x7bb6, (q15_t)0x1709, (q15_t)0x7bbb, (q15_t)0x16fd, (q15_t)0x7bbf, (q15_t)0x16f1, (q15_t)0x7bc4, (q15_t)0x16e5,
+    (q15_t)0x7bc8, (q15_t)0x16da, (q15_t)0x7bcd, (q15_t)0x16ce, (q15_t)0x7bd1, (q15_t)0x16c2, (q15_t)0x7bd6, (q15_t)0x16b6,
+    (q15_t)0x7bda, (q15_t)0x16ab, (q15_t)0x7bde, (q15_t)0x169f, (q15_t)0x7be3, (q15_t)0x1693, (q15_t)0x7be7, (q15_t)0x1687,
+    (q15_t)0x7bec, (q15_t)0x167c, (q15_t)0x7bf0, (q15_t)0x1670, (q15_t)0x7bf5, (q15_t)0x1664, (q15_t)0x7bf9, (q15_t)0x1658,
+    (q15_t)0x7bfd, (q15_t)0x164c, (q15_t)0x7c02, (q15_t)0x1641, (q15_t)0x7c06, (q15_t)0x1635, (q15_t)0x7c0a, (q15_t)0x1629,
+    (q15_t)0x7c0f, (q15_t)0x161d, (q15_t)0x7c13, (q15_t)0x1612, (q15_t)0x7c17, (q15_t)0x1606, (q15_t)0x7c1c, (q15_t)0x15fa,
+    (q15_t)0x7c20, (q15_t)0x15ee, (q15_t)0x7c24, (q15_t)0x15e2, (q15_t)0x7c29, (q15_t)0x15d7, (q15_t)0x7c2d, (q15_t)0x15cb,
+    (q15_t)0x7c31, (q15_t)0x15bf, (q15_t)0x7c36, (q15_t)0x15b3, (q15_t)0x7c3a, (q15_t)0x15a7, (q15_t)0x7c3e, (q15_t)0x159b,
+    (q15_t)0x7c42, (q15_t)0x1590, (q15_t)0x7c46, (q15_t)0x1584, (q15_t)0x7c4b, (q15_t)0x1578, (q15_t)0x7c4f, (q15_t)0x156c,
+    (q15_t)0x7c53, (q15_t)0x1560, (q15_t)0x7c57, (q15_t)0x1554, (q15_t)0x7c5b, (q15_t)0x1549, (q15_t)0x7c60, (q15_t)0x153d,
+    (q15_t)0x7c64, (q15_t)0x1531, (q15_t)0x7c68, (q15_t)0x1525, (q15_t)0x7c6c, (q15_t)0x1519, (q15_t)0x7c70, (q15_t)0x150d,
+    (q15_t)0x7c74, (q15_t)0x1501, (q15_t)0x7c79, (q15_t)0x14f6, (q15_t)0x7c7d, (q15_t)0x14ea, (q15_t)0x7c81, (q15_t)0x14de,
+    (q15_t)0x7c85, (q15_t)0x14d2, (q15_t)0x7c89, (q15_t)0x14c6, (q15_t)0x7c8d, (q15_t)0x14ba, (q15_t)0x7c91, (q15_t)0x14ae,
+    (q15_t)0x7c95, (q15_t)0x14a2, (q15_t)0x7c99, (q15_t)0x1496, (q15_t)0x7c9d, (q15_t)0x148b, (q15_t)0x7ca1, (q15_t)0x147f,
+    (q15_t)0x7ca5, (q15_t)0x1473, (q15_t)0x7ca9, (q15_t)0x1467, (q15_t)0x7cad, (q15_t)0x145b, (q15_t)0x7cb1, (q15_t)0x144f,
+    (q15_t)0x7cb5, (q15_t)0x1443, (q15_t)0x7cb9, (q15_t)0x1437, (q15_t)0x7cbd, (q15_t)0x142b, (q15_t)0x7cc1, (q15_t)0x141f,
+    (q15_t)0x7cc5, (q15_t)0x1413, (q15_t)0x7cc9, (q15_t)0x1407, (q15_t)0x7ccd, (q15_t)0x13fb, (q15_t)0x7cd1, (q15_t)0x13f0,
+    (q15_t)0x7cd5, (q15_t)0x13e4, (q15_t)0x7cd9, (q15_t)0x13d8, (q15_t)0x7cdd, (q15_t)0x13cc, (q15_t)0x7ce0, (q15_t)0x13c0,
+    (q15_t)0x7ce4, (q15_t)0x13b4, (q15_t)0x7ce8, (q15_t)0x13a8, (q15_t)0x7cec, (q15_t)0x139c, (q15_t)0x7cf0, (q15_t)0x1390,
+    (q15_t)0x7cf4, (q15_t)0x1384, (q15_t)0x7cf8, (q15_t)0x1378, (q15_t)0x7cfb, (q15_t)0x136c, (q15_t)0x7cff, (q15_t)0x1360,
+    (q15_t)0x7d03, (q15_t)0x1354, (q15_t)0x7d07, (q15_t)0x1348, (q15_t)0x7d0b, (q15_t)0x133c, (q15_t)0x7d0e, (q15_t)0x1330,
+    (q15_t)0x7d12, (q15_t)0x1324, (q15_t)0x7d16, (q15_t)0x1318, (q15_t)0x7d1a, (q15_t)0x130c, (q15_t)0x7d1d, (q15_t)0x1300,
+    (q15_t)0x7d21, (q15_t)0x12f4, (q15_t)0x7d25, (q15_t)0x12e8, (q15_t)0x7d28, (q15_t)0x12dc, (q15_t)0x7d2c, (q15_t)0x12d0,
+    (q15_t)0x7d30, (q15_t)0x12c4, (q15_t)0x7d34, (q15_t)0x12b8, (q15_t)0x7d37, (q15_t)0x12ac, (q15_t)0x7d3b, (q15_t)0x12a0,
+    (q15_t)0x7d3f, (q15_t)0x1294, (q15_t)0x7d42, (q15_t)0x1288, (q15_t)0x7d46, (q15_t)0x127c, (q15_t)0x7d49, (q15_t)0x1270,
+    (q15_t)0x7d4d, (q15_t)0x1264, (q15_t)0x7d51, (q15_t)0x1258, (q15_t)0x7d54, (q15_t)0x124c, (q15_t)0x7d58, (q15_t)0x1240,
+    (q15_t)0x7d5b, (q15_t)0x1234, (q15_t)0x7d5f, (q15_t)0x1228, (q15_t)0x7d63, (q15_t)0x121c, (q15_t)0x7d66, (q15_t)0x1210,
+    (q15_t)0x7d6a, (q15_t)0x1204, (q15_t)0x7d6d, (q15_t)0x11f7, (q15_t)0x7d71, (q15_t)0x11eb, (q15_t)0x7d74, (q15_t)0x11df,
+    (q15_t)0x7d78, (q15_t)0x11d3, (q15_t)0x7d7b, (q15_t)0x11c7, (q15_t)0x7d7f, (q15_t)0x11bb, (q15_t)0x7d82, (q15_t)0x11af,
+    (q15_t)0x7d86, (q15_t)0x11a3, (q15_t)0x7d89, (q15_t)0x1197, (q15_t)0x7d8d, (q15_t)0x118b, (q15_t)0x7d90, (q15_t)0x117f,
+    (q15_t)0x7d93, (q15_t)0x1173, (q15_t)0x7d97, (q15_t)0x1167, (q15_t)0x7d9a, (q15_t)0x115a, (q15_t)0x7d9e, (q15_t)0x114e,
+    (q15_t)0x7da1, (q15_t)0x1142, (q15_t)0x7da4, (q15_t)0x1136, (q15_t)0x7da8, (q15_t)0x112a, (q15_t)0x7dab, (q15_t)0x111e,
+    (q15_t)0x7daf, (q15_t)0x1112, (q15_t)0x7db2, (q15_t)0x1106, (q15_t)0x7db5, (q15_t)0x10fa, (q15_t)0x7db9, (q15_t)0x10ed,
+    (q15_t)0x7dbc, (q15_t)0x10e1, (q15_t)0x7dbf, (q15_t)0x10d5, (q15_t)0x7dc2, (q15_t)0x10c9, (q15_t)0x7dc6, (q15_t)0x10bd,
+    (q15_t)0x7dc9, (q15_t)0x10b1, (q15_t)0x7dcc, (q15_t)0x10a5, (q15_t)0x7dd0, (q15_t)0x1099, (q15_t)0x7dd3, (q15_t)0x108c,
+    (q15_t)0x7dd6, (q15_t)0x1080, (q15_t)0x7dd9, (q15_t)0x1074, (q15_t)0x7ddd, (q15_t)0x1068, (q15_t)0x7de0, (q15_t)0x105c,
+    (q15_t)0x7de3, (q15_t)0x1050, (q15_t)0x7de6, (q15_t)0x1044, (q15_t)0x7de9, (q15_t)0x1037, (q15_t)0x7ded, (q15_t)0x102b,
+    (q15_t)0x7df0, (q15_t)0x101f, (q15_t)0x7df3, (q15_t)0x1013, (q15_t)0x7df6, (q15_t)0x1007, (q15_t)0x7df9, (q15_t)0xffb,
+    (q15_t)0x7dfc, (q15_t)0xfee, (q15_t)0x7dff, (q15_t)0xfe2, (q15_t)0x7e03, (q15_t)0xfd6, (q15_t)0x7e06, (q15_t)0xfca,
+    (q15_t)0x7e09, (q15_t)0xfbe, (q15_t)0x7e0c, (q15_t)0xfb2, (q15_t)0x7e0f, (q15_t)0xfa5, (q15_t)0x7e12, (q15_t)0xf99,
+    (q15_t)0x7e15, (q15_t)0xf8d, (q15_t)0x7e18, (q15_t)0xf81, (q15_t)0x7e1b, (q15_t)0xf75, (q15_t)0x7e1e, (q15_t)0xf68,
+    (q15_t)0x7e21, (q15_t)0xf5c, (q15_t)0x7e24, (q15_t)0xf50, (q15_t)0x7e27, (q15_t)0xf44, (q15_t)0x7e2a, (q15_t)0xf38,
+    (q15_t)0x7e2d, (q15_t)0xf2b, (q15_t)0x7e30, (q15_t)0xf1f, (q15_t)0x7e33, (q15_t)0xf13, (q15_t)0x7e36, (q15_t)0xf07,
+    (q15_t)0x7e39, (q15_t)0xefb, (q15_t)0x7e3c, (q15_t)0xeee, (q15_t)0x7e3f, (q15_t)0xee2, (q15_t)0x7e42, (q15_t)0xed6,
+    (q15_t)0x7e45, (q15_t)0xeca, (q15_t)0x7e48, (q15_t)0xebd, (q15_t)0x7e4a, (q15_t)0xeb1, (q15_t)0x7e4d, (q15_t)0xea5,
+    (q15_t)0x7e50, (q15_t)0xe99, (q15_t)0x7e53, (q15_t)0xe8c, (q15_t)0x7e56, (q15_t)0xe80, (q15_t)0x7e59, (q15_t)0xe74,
+    (q15_t)0x7e5c, (q15_t)0xe68, (q15_t)0x7e5e, (q15_t)0xe5c, (q15_t)0x7e61, (q15_t)0xe4f, (q15_t)0x7e64, (q15_t)0xe43,
+    (q15_t)0x7e67, (q15_t)0xe37, (q15_t)0x7e6a, (q15_t)0xe2b, (q15_t)0x7e6c, (q15_t)0xe1e, (q15_t)0x7e6f, (q15_t)0xe12,
+    (q15_t)0x7e72, (q15_t)0xe06, (q15_t)0x7e75, (q15_t)0xdf9, (q15_t)0x7e77, (q15_t)0xded, (q15_t)0x7e7a, (q15_t)0xde1,
+    (q15_t)0x7e7d, (q15_t)0xdd5, (q15_t)0x7e80, (q15_t)0xdc8, (q15_t)0x7e82, (q15_t)0xdbc, (q15_t)0x7e85, (q15_t)0xdb0,
+    (q15_t)0x7e88, (q15_t)0xda4, (q15_t)0x7e8a, (q15_t)0xd97, (q15_t)0x7e8d, (q15_t)0xd8b, (q15_t)0x7e90, (q15_t)0xd7f,
+    (q15_t)0x7e92, (q15_t)0xd72, (q15_t)0x7e95, (q15_t)0xd66, (q15_t)0x7e98, (q15_t)0xd5a, (q15_t)0x7e9a, (q15_t)0xd4e,
+    (q15_t)0x7e9d, (q15_t)0xd41, (q15_t)0x7e9f, (q15_t)0xd35, (q15_t)0x7ea2, (q15_t)0xd29, (q15_t)0x7ea5, (q15_t)0xd1c,
+    (q15_t)0x7ea7, (q15_t)0xd10, (q15_t)0x7eaa, (q15_t)0xd04, (q15_t)0x7eac, (q15_t)0xcf8, (q15_t)0x7eaf, (q15_t)0xceb,
+    (q15_t)0x7eb1, (q15_t)0xcdf, (q15_t)0x7eb4, (q15_t)0xcd3, (q15_t)0x7eb6, (q15_t)0xcc6, (q15_t)0x7eb9, (q15_t)0xcba,
+    (q15_t)0x7ebb, (q15_t)0xcae, (q15_t)0x7ebe, (q15_t)0xca1, (q15_t)0x7ec0, (q15_t)0xc95, (q15_t)0x7ec3, (q15_t)0xc89,
+    (q15_t)0x7ec5, (q15_t)0xc7c, (q15_t)0x7ec8, (q15_t)0xc70, (q15_t)0x7eca, (q15_t)0xc64, (q15_t)0x7ecc, (q15_t)0xc57,
+    (q15_t)0x7ecf, (q15_t)0xc4b, (q15_t)0x7ed1, (q15_t)0xc3f, (q15_t)0x7ed4, (q15_t)0xc32, (q15_t)0x7ed6, (q15_t)0xc26,
+    (q15_t)0x7ed8, (q15_t)0xc1a, (q15_t)0x7edb, (q15_t)0xc0d, (q15_t)0x7edd, (q15_t)0xc01, (q15_t)0x7ee0, (q15_t)0xbf5,
+    (q15_t)0x7ee2, (q15_t)0xbe8, (q15_t)0x7ee4, (q15_t)0xbdc, (q15_t)0x7ee7, (q15_t)0xbd0, (q15_t)0x7ee9, (q15_t)0xbc3,
+    (q15_t)0x7eeb, (q15_t)0xbb7, (q15_t)0x7eed, (q15_t)0xbab, (q15_t)0x7ef0, (q15_t)0xb9e, (q15_t)0x7ef2, (q15_t)0xb92,
+    (q15_t)0x7ef4, (q15_t)0xb85, (q15_t)0x7ef7, (q15_t)0xb79, (q15_t)0x7ef9, (q15_t)0xb6d, (q15_t)0x7efb, (q15_t)0xb60,
+    (q15_t)0x7efd, (q15_t)0xb54, (q15_t)0x7f00, (q15_t)0xb48, (q15_t)0x7f02, (q15_t)0xb3b, (q15_t)0x7f04, (q15_t)0xb2f,
+    (q15_t)0x7f06, (q15_t)0xb23, (q15_t)0x7f08, (q15_t)0xb16, (q15_t)0x7f0a, (q15_t)0xb0a, (q15_t)0x7f0d, (q15_t)0xafd,
+    (q15_t)0x7f0f, (q15_t)0xaf1, (q15_t)0x7f11, (q15_t)0xae5, (q15_t)0x7f13, (q15_t)0xad8, (q15_t)0x7f15, (q15_t)0xacc,
+    (q15_t)0x7f17, (q15_t)0xac0, (q15_t)0x7f19, (q15_t)0xab3, (q15_t)0x7f1c, (q15_t)0xaa7, (q15_t)0x7f1e, (q15_t)0xa9a,
+    (q15_t)0x7f20, (q15_t)0xa8e, (q15_t)0x7f22, (q15_t)0xa82, (q15_t)0x7f24, (q15_t)0xa75, (q15_t)0x7f26, (q15_t)0xa69,
+    (q15_t)0x7f28, (q15_t)0xa5c, (q15_t)0x7f2a, (q15_t)0xa50, (q15_t)0x7f2c, (q15_t)0xa44, (q15_t)0x7f2e, (q15_t)0xa37,
+    (q15_t)0x7f30, (q15_t)0xa2b, (q15_t)0x7f32, (q15_t)0xa1e, (q15_t)0x7f34, (q15_t)0xa12, (q15_t)0x7f36, (q15_t)0xa06,
+    (q15_t)0x7f38, (q15_t)0x9f9, (q15_t)0x7f3a, (q15_t)0x9ed, (q15_t)0x7f3c, (q15_t)0x9e0, (q15_t)0x7f3e, (q15_t)0x9d4,
+    (q15_t)0x7f40, (q15_t)0x9c7, (q15_t)0x7f42, (q15_t)0x9bb, (q15_t)0x7f43, (q15_t)0x9af, (q15_t)0x7f45, (q15_t)0x9a2,
+    (q15_t)0x7f47, (q15_t)0x996, (q15_t)0x7f49, (q15_t)0x989, (q15_t)0x7f4b, (q15_t)0x97d, (q15_t)0x7f4d, (q15_t)0x970,
+    (q15_t)0x7f4f, (q15_t)0x964, (q15_t)0x7f51, (q15_t)0x958, (q15_t)0x7f52, (q15_t)0x94b, (q15_t)0x7f54, (q15_t)0x93f,
+    (q15_t)0x7f56, (q15_t)0x932, (q15_t)0x7f58, (q15_t)0x926, (q15_t)0x7f5a, (q15_t)0x919, (q15_t)0x7f5b, (q15_t)0x90d,
+    (q15_t)0x7f5d, (q15_t)0x901, (q15_t)0x7f5f, (q15_t)0x8f4, (q15_t)0x7f61, (q15_t)0x8e8, (q15_t)0x7f62, (q15_t)0x8db,
+    (q15_t)0x7f64, (q15_t)0x8cf, (q15_t)0x7f66, (q15_t)0x8c2, (q15_t)0x7f68, (q15_t)0x8b6, (q15_t)0x7f69, (q15_t)0x8a9,
+    (q15_t)0x7f6b, (q15_t)0x89d, (q15_t)0x7f6d, (q15_t)0x891, (q15_t)0x7f6e, (q15_t)0x884, (q15_t)0x7f70, (q15_t)0x878,
+    (q15_t)0x7f72, (q15_t)0x86b, (q15_t)0x7f73, (q15_t)0x85f, (q15_t)0x7f75, (q15_t)0x852, (q15_t)0x7f77, (q15_t)0x846,
+    (q15_t)0x7f78, (q15_t)0x839, (q15_t)0x7f7a, (q15_t)0x82d, (q15_t)0x7f7b, (q15_t)0x820, (q15_t)0x7f7d, (q15_t)0x814,
+    (q15_t)0x7f7f, (q15_t)0x807, (q15_t)0x7f80, (q15_t)0x7fb, (q15_t)0x7f82, (q15_t)0x7ef, (q15_t)0x7f83, (q15_t)0x7e2,
+    (q15_t)0x7f85, (q15_t)0x7d6, (q15_t)0x7f86, (q15_t)0x7c9, (q15_t)0x7f88, (q15_t)0x7bd, (q15_t)0x7f89, (q15_t)0x7b0,
+    (q15_t)0x7f8b, (q15_t)0x7a4, (q15_t)0x7f8c, (q15_t)0x797, (q15_t)0x7f8e, (q15_t)0x78b, (q15_t)0x7f8f, (q15_t)0x77e,
+    (q15_t)0x7f91, (q15_t)0x772, (q15_t)0x7f92, (q15_t)0x765, (q15_t)0x7f94, (q15_t)0x759, (q15_t)0x7f95, (q15_t)0x74c,
+    (q15_t)0x7f97, (q15_t)0x740, (q15_t)0x7f98, (q15_t)0x733, (q15_t)0x7f99, (q15_t)0x727, (q15_t)0x7f9b, (q15_t)0x71a,
+    (q15_t)0x7f9c, (q15_t)0x70e, (q15_t)0x7f9e, (q15_t)0x701, (q15_t)0x7f9f, (q15_t)0x6f5, (q15_t)0x7fa0, (q15_t)0x6e8,
+    (q15_t)0x7fa2, (q15_t)0x6dc, (q15_t)0x7fa3, (q15_t)0x6cf, (q15_t)0x7fa4, (q15_t)0x6c3, (q15_t)0x7fa6, (q15_t)0x6b6,
+    (q15_t)0x7fa7, (q15_t)0x6aa, (q15_t)0x7fa8, (q15_t)0x69d, (q15_t)0x7faa, (q15_t)0x691, (q15_t)0x7fab, (q15_t)0x684,
+    (q15_t)0x7fac, (q15_t)0x678, (q15_t)0x7fad, (q15_t)0x66b, (q15_t)0x7faf, (q15_t)0x65f, (q15_t)0x7fb0, (q15_t)0x652,
+    (q15_t)0x7fb1, (q15_t)0x646, (q15_t)0x7fb2, (q15_t)0x639, (q15_t)0x7fb4, (q15_t)0x62d, (q15_t)0x7fb5, (q15_t)0x620,
+    (q15_t)0x7fb6, (q15_t)0x614, (q15_t)0x7fb7, (q15_t)0x607, (q15_t)0x7fb8, (q15_t)0x5fb, (q15_t)0x7fb9, (q15_t)0x5ee,
+    (q15_t)0x7fbb, (q15_t)0x5e2, (q15_t)0x7fbc, (q15_t)0x5d5, (q15_t)0x7fbd, (q15_t)0x5c9, (q15_t)0x7fbe, (q15_t)0x5bc,
+    (q15_t)0x7fbf, (q15_t)0x5b0, (q15_t)0x7fc0, (q15_t)0x5a3, (q15_t)0x7fc1, (q15_t)0x597, (q15_t)0x7fc3, (q15_t)0x58a,
+    (q15_t)0x7fc4, (q15_t)0x57e, (q15_t)0x7fc5, (q15_t)0x571, (q15_t)0x7fc6, (q15_t)0x565, (q15_t)0x7fc7, (q15_t)0x558,
+    (q15_t)0x7fc8, (q15_t)0x54c, (q15_t)0x7fc9, (q15_t)0x53f, (q15_t)0x7fca, (q15_t)0x533, (q15_t)0x7fcb, (q15_t)0x526,
+    (q15_t)0x7fcc, (q15_t)0x51a, (q15_t)0x7fcd, (q15_t)0x50d, (q15_t)0x7fce, (q15_t)0x500, (q15_t)0x7fcf, (q15_t)0x4f4,
+    (q15_t)0x7fd0, (q15_t)0x4e7, (q15_t)0x7fd1, (q15_t)0x4db, (q15_t)0x7fd2, (q15_t)0x4ce, (q15_t)0x7fd3, (q15_t)0x4c2,
+    (q15_t)0x7fd4, (q15_t)0x4b5, (q15_t)0x7fd5, (q15_t)0x4a9, (q15_t)0x7fd5, (q15_t)0x49c, (q15_t)0x7fd6, (q15_t)0x490,
+    (q15_t)0x7fd7, (q15_t)0x483, (q15_t)0x7fd8, (q15_t)0x477, (q15_t)0x7fd9, (q15_t)0x46a, (q15_t)0x7fda, (q15_t)0x45e,
+    (q15_t)0x7fdb, (q15_t)0x451, (q15_t)0x7fdc, (q15_t)0x444, (q15_t)0x7fdc, (q15_t)0x438, (q15_t)0x7fdd, (q15_t)0x42b,
+    (q15_t)0x7fde, (q15_t)0x41f, (q15_t)0x7fdf, (q15_t)0x412, (q15_t)0x7fe0, (q15_t)0x406, (q15_t)0x7fe0, (q15_t)0x3f9,
+    (q15_t)0x7fe1, (q15_t)0x3ed, (q15_t)0x7fe2, (q15_t)0x3e0, (q15_t)0x7fe3, (q15_t)0x3d4, (q15_t)0x7fe3, (q15_t)0x3c7,
+    (q15_t)0x7fe4, (q15_t)0x3bb, (q15_t)0x7fe5, (q15_t)0x3ae, (q15_t)0x7fe6, (q15_t)0x3a1, (q15_t)0x7fe6, (q15_t)0x395,
+    (q15_t)0x7fe7, (q15_t)0x388, (q15_t)0x7fe8, (q15_t)0x37c, (q15_t)0x7fe8, (q15_t)0x36f, (q15_t)0x7fe9, (q15_t)0x363,
+    (q15_t)0x7fea, (q15_t)0x356, (q15_t)0x7fea, (q15_t)0x34a, (q15_t)0x7feb, (q15_t)0x33d, (q15_t)0x7fec, (q15_t)0x330,
+    (q15_t)0x7fec, (q15_t)0x324, (q15_t)0x7fed, (q15_t)0x317, (q15_t)0x7fed, (q15_t)0x30b, (q15_t)0x7fee, (q15_t)0x2fe,
+    (q15_t)0x7fef, (q15_t)0x2f2, (q15_t)0x7fef, (q15_t)0x2e5, (q15_t)0x7ff0, (q15_t)0x2d9, (q15_t)0x7ff0, (q15_t)0x2cc,
+    (q15_t)0x7ff1, (q15_t)0x2c0, (q15_t)0x7ff1, (q15_t)0x2b3, (q15_t)0x7ff2, (q15_t)0x2a6, (q15_t)0x7ff2, (q15_t)0x29a,
+    (q15_t)0x7ff3, (q15_t)0x28d, (q15_t)0x7ff3, (q15_t)0x281, (q15_t)0x7ff4, (q15_t)0x274, (q15_t)0x7ff4, (q15_t)0x268,
+    (q15_t)0x7ff5, (q15_t)0x25b, (q15_t)0x7ff5, (q15_t)0x24e, (q15_t)0x7ff6, (q15_t)0x242, (q15_t)0x7ff6, (q15_t)0x235,
+    (q15_t)0x7ff7, (q15_t)0x229, (q15_t)0x7ff7, (q15_t)0x21c, (q15_t)0x7ff7, (q15_t)0x210, (q15_t)0x7ff8, (q15_t)0x203,
+    (q15_t)0x7ff8, (q15_t)0x1f7, (q15_t)0x7ff9, (q15_t)0x1ea, (q15_t)0x7ff9, (q15_t)0x1dd, (q15_t)0x7ff9, (q15_t)0x1d1,
+    (q15_t)0x7ffa, (q15_t)0x1c4, (q15_t)0x7ffa, (q15_t)0x1b8, (q15_t)0x7ffa, (q15_t)0x1ab, (q15_t)0x7ffb, (q15_t)0x19f,
+    (q15_t)0x7ffb, (q15_t)0x192, (q15_t)0x7ffb, (q15_t)0x186, (q15_t)0x7ffc, (q15_t)0x179, (q15_t)0x7ffc, (q15_t)0x16c,
+    (q15_t)0x7ffc, (q15_t)0x160, (q15_t)0x7ffc, (q15_t)0x153, (q15_t)0x7ffd, (q15_t)0x147, (q15_t)0x7ffd, (q15_t)0x13a,
+    (q15_t)0x7ffd, (q15_t)0x12e, (q15_t)0x7ffd, (q15_t)0x121, (q15_t)0x7ffe, (q15_t)0x114, (q15_t)0x7ffe, (q15_t)0x108,
+    (q15_t)0x7ffe, (q15_t)0xfb, (q15_t)0x7ffe, (q15_t)0xef, (q15_t)0x7ffe, (q15_t)0xe2, (q15_t)0x7fff, (q15_t)0xd6,
+    (q15_t)0x7fff, (q15_t)0xc9, (q15_t)0x7fff, (q15_t)0xbc, (q15_t)0x7fff, (q15_t)0xb0, (q15_t)0x7fff, (q15_t)0xa3,
+    (q15_t)0x7fff, (q15_t)0x97, (q15_t)0x7fff, (q15_t)0x8a, (q15_t)0x7fff, (q15_t)0x7e, (q15_t)0x7fff, (q15_t)0x71,
+    (q15_t)0x7fff, (q15_t)0x65, (q15_t)0x7fff, (q15_t)0x58, (q15_t)0x7fff, (q15_t)0x4b, (q15_t)0x7fff, (q15_t)0x3f,
+    (q15_t)0x7fff, (q15_t)0x32, (q15_t)0x7fff, (q15_t)0x26, (q15_t)0x7fff, (q15_t)0x19, (q15_t)0x7fff, (q15_t)0xd,
+    (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfff3, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffda,
+    (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc1, (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffa8,
+    (q15_t)0x7fff, (q15_t)0xff9b, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff82, (q15_t)0x7fff, (q15_t)0xff76,
+    (q15_t)0x7fff, (q15_t)0xff69, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff50, (q15_t)0x7fff, (q15_t)0xff44,
+    (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff2a, (q15_t)0x7ffe, (q15_t)0xff1e, (q15_t)0x7ffe, (q15_t)0xff11,
+    (q15_t)0x7ffe, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfef8, (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffd, (q15_t)0xfedf,
+    (q15_t)0x7ffd, (q15_t)0xfed2, (q15_t)0x7ffd, (q15_t)0xfec6, (q15_t)0x7ffd, (q15_t)0xfeb9, (q15_t)0x7ffc, (q15_t)0xfead,
+    (q15_t)0x7ffc, (q15_t)0xfea0, (q15_t)0x7ffc, (q15_t)0xfe94, (q15_t)0x7ffc, (q15_t)0xfe87, (q15_t)0x7ffb, (q15_t)0xfe7a,
+    (q15_t)0x7ffb, (q15_t)0xfe6e, (q15_t)0x7ffb, (q15_t)0xfe61, (q15_t)0x7ffa, (q15_t)0xfe55, (q15_t)0x7ffa, (q15_t)0xfe48,
+    (q15_t)0x7ffa, (q15_t)0xfe3c, (q15_t)0x7ff9, (q15_t)0xfe2f, (q15_t)0x7ff9, (q15_t)0xfe23, (q15_t)0x7ff9, (q15_t)0xfe16,
+    (q15_t)0x7ff8, (q15_t)0xfe09, (q15_t)0x7ff8, (q15_t)0xfdfd, (q15_t)0x7ff7, (q15_t)0xfdf0, (q15_t)0x7ff7, (q15_t)0xfde4,
+    (q15_t)0x7ff7, (q15_t)0xfdd7, (q15_t)0x7ff6, (q15_t)0xfdcb, (q15_t)0x7ff6, (q15_t)0xfdbe, (q15_t)0x7ff5, (q15_t)0xfdb2,
+    (q15_t)0x7ff5, (q15_t)0xfda5, (q15_t)0x7ff4, (q15_t)0xfd98, (q15_t)0x7ff4, (q15_t)0xfd8c, (q15_t)0x7ff3, (q15_t)0xfd7f,
+    (q15_t)0x7ff3, (q15_t)0xfd73, (q15_t)0x7ff2, (q15_t)0xfd66, (q15_t)0x7ff2, (q15_t)0xfd5a, (q15_t)0x7ff1, (q15_t)0xfd4d,
+    (q15_t)0x7ff1, (q15_t)0xfd40, (q15_t)0x7ff0, (q15_t)0xfd34, (q15_t)0x7ff0, (q15_t)0xfd27, (q15_t)0x7fef, (q15_t)0xfd1b,
+    (q15_t)0x7fef, (q15_t)0xfd0e, (q15_t)0x7fee, (q15_t)0xfd02, (q15_t)0x7fed, (q15_t)0xfcf5, (q15_t)0x7fed, (q15_t)0xfce9,
+    (q15_t)0x7fec, (q15_t)0xfcdc, (q15_t)0x7fec, (q15_t)0xfcd0, (q15_t)0x7feb, (q15_t)0xfcc3, (q15_t)0x7fea, (q15_t)0xfcb6,
+    (q15_t)0x7fea, (q15_t)0xfcaa, (q15_t)0x7fe9, (q15_t)0xfc9d, (q15_t)0x7fe8, (q15_t)0xfc91, (q15_t)0x7fe8, (q15_t)0xfc84,
+    (q15_t)0x7fe7, (q15_t)0xfc78, (q15_t)0x7fe6, (q15_t)0xfc6b, (q15_t)0x7fe6, (q15_t)0xfc5f, (q15_t)0x7fe5, (q15_t)0xfc52,
+    (q15_t)0x7fe4, (q15_t)0xfc45, (q15_t)0x7fe3, (q15_t)0xfc39, (q15_t)0x7fe3, (q15_t)0xfc2c, (q15_t)0x7fe2, (q15_t)0xfc20,
+    (q15_t)0x7fe1, (q15_t)0xfc13, (q15_t)0x7fe0, (q15_t)0xfc07, (q15_t)0x7fe0, (q15_t)0xfbfa, (q15_t)0x7fdf, (q15_t)0xfbee,
+    (q15_t)0x7fde, (q15_t)0xfbe1, (q15_t)0x7fdd, (q15_t)0xfbd5, (q15_t)0x7fdc, (q15_t)0xfbc8, (q15_t)0x7fdc, (q15_t)0xfbbc,
+    (q15_t)0x7fdb, (q15_t)0xfbaf, (q15_t)0x7fda, (q15_t)0xfba2, (q15_t)0x7fd9, (q15_t)0xfb96, (q15_t)0x7fd8, (q15_t)0xfb89,
+    (q15_t)0x7fd7, (q15_t)0xfb7d, (q15_t)0x7fd6, (q15_t)0xfb70, (q15_t)0x7fd5, (q15_t)0xfb64, (q15_t)0x7fd5, (q15_t)0xfb57,
+    (q15_t)0x7fd4, (q15_t)0xfb4b, (q15_t)0x7fd3, (q15_t)0xfb3e, (q15_t)0x7fd2, (q15_t)0xfb32, (q15_t)0x7fd1, (q15_t)0xfb25,
+    (q15_t)0x7fd0, (q15_t)0xfb19, (q15_t)0x7fcf, (q15_t)0xfb0c, (q15_t)0x7fce, (q15_t)0xfb00, (q15_t)0x7fcd, (q15_t)0xfaf3,
+    (q15_t)0x7fcc, (q15_t)0xfae6, (q15_t)0x7fcb, (q15_t)0xfada, (q15_t)0x7fca, (q15_t)0xfacd, (q15_t)0x7fc9, (q15_t)0xfac1,
+    (q15_t)0x7fc8, (q15_t)0xfab4, (q15_t)0x7fc7, (q15_t)0xfaa8, (q15_t)0x7fc6, (q15_t)0xfa9b, (q15_t)0x7fc5, (q15_t)0xfa8f,
+    (q15_t)0x7fc4, (q15_t)0xfa82, (q15_t)0x7fc3, (q15_t)0xfa76, (q15_t)0x7fc1, (q15_t)0xfa69, (q15_t)0x7fc0, (q15_t)0xfa5d,
+    (q15_t)0x7fbf, (q15_t)0xfa50, (q15_t)0x7fbe, (q15_t)0xfa44, (q15_t)0x7fbd, (q15_t)0xfa37, (q15_t)0x7fbc, (q15_t)0xfa2b,
+    (q15_t)0x7fbb, (q15_t)0xfa1e, (q15_t)0x7fb9, (q15_t)0xfa12, (q15_t)0x7fb8, (q15_t)0xfa05, (q15_t)0x7fb7, (q15_t)0xf9f9,
+    (q15_t)0x7fb6, (q15_t)0xf9ec, (q15_t)0x7fb5, (q15_t)0xf9e0, (q15_t)0x7fb4, (q15_t)0xf9d3, (q15_t)0x7fb2, (q15_t)0xf9c7,
+    (q15_t)0x7fb1, (q15_t)0xf9ba, (q15_t)0x7fb0, (q15_t)0xf9ae, (q15_t)0x7faf, (q15_t)0xf9a1, (q15_t)0x7fad, (q15_t)0xf995,
+    (q15_t)0x7fac, (q15_t)0xf988, (q15_t)0x7fab, (q15_t)0xf97c, (q15_t)0x7faa, (q15_t)0xf96f, (q15_t)0x7fa8, (q15_t)0xf963,
+    (q15_t)0x7fa7, (q15_t)0xf956, (q15_t)0x7fa6, (q15_t)0xf94a, (q15_t)0x7fa4, (q15_t)0xf93d, (q15_t)0x7fa3, (q15_t)0xf931,
+    (q15_t)0x7fa2, (q15_t)0xf924, (q15_t)0x7fa0, (q15_t)0xf918, (q15_t)0x7f9f, (q15_t)0xf90b, (q15_t)0x7f9e, (q15_t)0xf8ff,
+    (q15_t)0x7f9c, (q15_t)0xf8f2, (q15_t)0x7f9b, (q15_t)0xf8e6, (q15_t)0x7f99, (q15_t)0xf8d9, (q15_t)0x7f98, (q15_t)0xf8cd,
+    (q15_t)0x7f97, (q15_t)0xf8c0, (q15_t)0x7f95, (q15_t)0xf8b4, (q15_t)0x7f94, (q15_t)0xf8a7, (q15_t)0x7f92, (q15_t)0xf89b,
+    (q15_t)0x7f91, (q15_t)0xf88e, (q15_t)0x7f8f, (q15_t)0xf882, (q15_t)0x7f8e, (q15_t)0xf875, (q15_t)0x7f8c, (q15_t)0xf869,
+    (q15_t)0x7f8b, (q15_t)0xf85c, (q15_t)0x7f89, (q15_t)0xf850, (q15_t)0x7f88, (q15_t)0xf843, (q15_t)0x7f86, (q15_t)0xf837,
+    (q15_t)0x7f85, (q15_t)0xf82a, (q15_t)0x7f83, (q15_t)0xf81e, (q15_t)0x7f82, (q15_t)0xf811, (q15_t)0x7f80, (q15_t)0xf805,
+    (q15_t)0x7f7f, (q15_t)0xf7f9, (q15_t)0x7f7d, (q15_t)0xf7ec, (q15_t)0x7f7b, (q15_t)0xf7e0, (q15_t)0x7f7a, (q15_t)0xf7d3,
+    (q15_t)0x7f78, (q15_t)0xf7c7, (q15_t)0x7f77, (q15_t)0xf7ba, (q15_t)0x7f75, (q15_t)0xf7ae, (q15_t)0x7f73, (q15_t)0xf7a1,
+    (q15_t)0x7f72, (q15_t)0xf795, (q15_t)0x7f70, (q15_t)0xf788, (q15_t)0x7f6e, (q15_t)0xf77c, (q15_t)0x7f6d, (q15_t)0xf76f,
+    (q15_t)0x7f6b, (q15_t)0xf763, (q15_t)0x7f69, (q15_t)0xf757, (q15_t)0x7f68, (q15_t)0xf74a, (q15_t)0x7f66, (q15_t)0xf73e,
+    (q15_t)0x7f64, (q15_t)0xf731, (q15_t)0x7f62, (q15_t)0xf725, (q15_t)0x7f61, (q15_t)0xf718, (q15_t)0x7f5f, (q15_t)0xf70c,
+    (q15_t)0x7f5d, (q15_t)0xf6ff, (q15_t)0x7f5b, (q15_t)0xf6f3, (q15_t)0x7f5a, (q15_t)0xf6e7, (q15_t)0x7f58, (q15_t)0xf6da,
+    (q15_t)0x7f56, (q15_t)0xf6ce, (q15_t)0x7f54, (q15_t)0xf6c1, (q15_t)0x7f52, (q15_t)0xf6b5, (q15_t)0x7f51, (q15_t)0xf6a8,
+    (q15_t)0x7f4f, (q15_t)0xf69c, (q15_t)0x7f4d, (q15_t)0xf690, (q15_t)0x7f4b, (q15_t)0xf683, (q15_t)0x7f49, (q15_t)0xf677,
+    (q15_t)0x7f47, (q15_t)0xf66a, (q15_t)0x7f45, (q15_t)0xf65e, (q15_t)0x7f43, (q15_t)0xf651, (q15_t)0x7f42, (q15_t)0xf645,
+    (q15_t)0x7f40, (q15_t)0xf639, (q15_t)0x7f3e, (q15_t)0xf62c, (q15_t)0x7f3c, (q15_t)0xf620, (q15_t)0x7f3a, (q15_t)0xf613,
+    (q15_t)0x7f38, (q15_t)0xf607, (q15_t)0x7f36, (q15_t)0xf5fa, (q15_t)0x7f34, (q15_t)0xf5ee, (q15_t)0x7f32, (q15_t)0xf5e2,
+    (q15_t)0x7f30, (q15_t)0xf5d5, (q15_t)0x7f2e, (q15_t)0xf5c9, (q15_t)0x7f2c, (q15_t)0xf5bc, (q15_t)0x7f2a, (q15_t)0xf5b0,
+    (q15_t)0x7f28, (q15_t)0xf5a4, (q15_t)0x7f26, (q15_t)0xf597, (q15_t)0x7f24, (q15_t)0xf58b, (q15_t)0x7f22, (q15_t)0xf57e,
+    (q15_t)0x7f20, (q15_t)0xf572, (q15_t)0x7f1e, (q15_t)0xf566, (q15_t)0x7f1c, (q15_t)0xf559, (q15_t)0x7f19, (q15_t)0xf54d,
+    (q15_t)0x7f17, (q15_t)0xf540, (q15_t)0x7f15, (q15_t)0xf534, (q15_t)0x7f13, (q15_t)0xf528, (q15_t)0x7f11, (q15_t)0xf51b,
+    (q15_t)0x7f0f, (q15_t)0xf50f, (q15_t)0x7f0d, (q15_t)0xf503, (q15_t)0x7f0a, (q15_t)0xf4f6, (q15_t)0x7f08, (q15_t)0xf4ea,
+    (q15_t)0x7f06, (q15_t)0xf4dd, (q15_t)0x7f04, (q15_t)0xf4d1, (q15_t)0x7f02, (q15_t)0xf4c5, (q15_t)0x7f00, (q15_t)0xf4b8,
+    (q15_t)0x7efd, (q15_t)0xf4ac, (q15_t)0x7efb, (q15_t)0xf4a0, (q15_t)0x7ef9, (q15_t)0xf493, (q15_t)0x7ef7, (q15_t)0xf487,
+    (q15_t)0x7ef4, (q15_t)0xf47b, (q15_t)0x7ef2, (q15_t)0xf46e, (q15_t)0x7ef0, (q15_t)0xf462, (q15_t)0x7eed, (q15_t)0xf455,
+    (q15_t)0x7eeb, (q15_t)0xf449, (q15_t)0x7ee9, (q15_t)0xf43d, (q15_t)0x7ee7, (q15_t)0xf430, (q15_t)0x7ee4, (q15_t)0xf424,
+    (q15_t)0x7ee2, (q15_t)0xf418, (q15_t)0x7ee0, (q15_t)0xf40b, (q15_t)0x7edd, (q15_t)0xf3ff, (q15_t)0x7edb, (q15_t)0xf3f3,
+    (q15_t)0x7ed8, (q15_t)0xf3e6, (q15_t)0x7ed6, (q15_t)0xf3da, (q15_t)0x7ed4, (q15_t)0xf3ce, (q15_t)0x7ed1, (q15_t)0xf3c1,
+    (q15_t)0x7ecf, (q15_t)0xf3b5, (q15_t)0x7ecc, (q15_t)0xf3a9, (q15_t)0x7eca, (q15_t)0xf39c, (q15_t)0x7ec8, (q15_t)0xf390,
+    (q15_t)0x7ec5, (q15_t)0xf384, (q15_t)0x7ec3, (q15_t)0xf377, (q15_t)0x7ec0, (q15_t)0xf36b, (q15_t)0x7ebe, (q15_t)0xf35f,
+    (q15_t)0x7ebb, (q15_t)0xf352, (q15_t)0x7eb9, (q15_t)0xf346, (q15_t)0x7eb6, (q15_t)0xf33a, (q15_t)0x7eb4, (q15_t)0xf32d,
+    (q15_t)0x7eb1, (q15_t)0xf321, (q15_t)0x7eaf, (q15_t)0xf315, (q15_t)0x7eac, (q15_t)0xf308, (q15_t)0x7eaa, (q15_t)0xf2fc,
+    (q15_t)0x7ea7, (q15_t)0xf2f0, (q15_t)0x7ea5, (q15_t)0xf2e4, (q15_t)0x7ea2, (q15_t)0xf2d7, (q15_t)0x7e9f, (q15_t)0xf2cb,
+    (q15_t)0x7e9d, (q15_t)0xf2bf, (q15_t)0x7e9a, (q15_t)0xf2b2, (q15_t)0x7e98, (q15_t)0xf2a6, (q15_t)0x7e95, (q15_t)0xf29a,
+    (q15_t)0x7e92, (q15_t)0xf28e, (q15_t)0x7e90, (q15_t)0xf281, (q15_t)0x7e8d, (q15_t)0xf275, (q15_t)0x7e8a, (q15_t)0xf269,
+    (q15_t)0x7e88, (q15_t)0xf25c, (q15_t)0x7e85, (q15_t)0xf250, (q15_t)0x7e82, (q15_t)0xf244, (q15_t)0x7e80, (q15_t)0xf238,
+    (q15_t)0x7e7d, (q15_t)0xf22b, (q15_t)0x7e7a, (q15_t)0xf21f, (q15_t)0x7e77, (q15_t)0xf213, (q15_t)0x7e75, (q15_t)0xf207,
+    (q15_t)0x7e72, (q15_t)0xf1fa, (q15_t)0x7e6f, (q15_t)0xf1ee, (q15_t)0x7e6c, (q15_t)0xf1e2, (q15_t)0x7e6a, (q15_t)0xf1d5,
+    (q15_t)0x7e67, (q15_t)0xf1c9, (q15_t)0x7e64, (q15_t)0xf1bd, (q15_t)0x7e61, (q15_t)0xf1b1, (q15_t)0x7e5e, (q15_t)0xf1a4,
+    (q15_t)0x7e5c, (q15_t)0xf198, (q15_t)0x7e59, (q15_t)0xf18c, (q15_t)0x7e56, (q15_t)0xf180, (q15_t)0x7e53, (q15_t)0xf174,
+    (q15_t)0x7e50, (q15_t)0xf167, (q15_t)0x7e4d, (q15_t)0xf15b, (q15_t)0x7e4a, (q15_t)0xf14f, (q15_t)0x7e48, (q15_t)0xf143,
+    (q15_t)0x7e45, (q15_t)0xf136, (q15_t)0x7e42, (q15_t)0xf12a, (q15_t)0x7e3f, (q15_t)0xf11e, (q15_t)0x7e3c, (q15_t)0xf112,
+    (q15_t)0x7e39, (q15_t)0xf105, (q15_t)0x7e36, (q15_t)0xf0f9, (q15_t)0x7e33, (q15_t)0xf0ed, (q15_t)0x7e30, (q15_t)0xf0e1,
+    (q15_t)0x7e2d, (q15_t)0xf0d5, (q15_t)0x7e2a, (q15_t)0xf0c8, (q15_t)0x7e27, (q15_t)0xf0bc, (q15_t)0x7e24, (q15_t)0xf0b0,
+    (q15_t)0x7e21, (q15_t)0xf0a4, (q15_t)0x7e1e, (q15_t)0xf098, (q15_t)0x7e1b, (q15_t)0xf08b, (q15_t)0x7e18, (q15_t)0xf07f,
+    (q15_t)0x7e15, (q15_t)0xf073, (q15_t)0x7e12, (q15_t)0xf067, (q15_t)0x7e0f, (q15_t)0xf05b, (q15_t)0x7e0c, (q15_t)0xf04e,
+    (q15_t)0x7e09, (q15_t)0xf042, (q15_t)0x7e06, (q15_t)0xf036, (q15_t)0x7e03, (q15_t)0xf02a, (q15_t)0x7dff, (q15_t)0xf01e,
+    (q15_t)0x7dfc, (q15_t)0xf012, (q15_t)0x7df9, (q15_t)0xf005, (q15_t)0x7df6, (q15_t)0xeff9, (q15_t)0x7df3, (q15_t)0xefed,
+    (q15_t)0x7df0, (q15_t)0xefe1, (q15_t)0x7ded, (q15_t)0xefd5, (q15_t)0x7de9, (q15_t)0xefc9, (q15_t)0x7de6, (q15_t)0xefbc,
+    (q15_t)0x7de3, (q15_t)0xefb0, (q15_t)0x7de0, (q15_t)0xefa4, (q15_t)0x7ddd, (q15_t)0xef98, (q15_t)0x7dd9, (q15_t)0xef8c,
+    (q15_t)0x7dd6, (q15_t)0xef80, (q15_t)0x7dd3, (q15_t)0xef74, (q15_t)0x7dd0, (q15_t)0xef67, (q15_t)0x7dcc, (q15_t)0xef5b,
+    (q15_t)0x7dc9, (q15_t)0xef4f, (q15_t)0x7dc6, (q15_t)0xef43, (q15_t)0x7dc2, (q15_t)0xef37, (q15_t)0x7dbf, (q15_t)0xef2b,
+    (q15_t)0x7dbc, (q15_t)0xef1f, (q15_t)0x7db9, (q15_t)0xef13, (q15_t)0x7db5, (q15_t)0xef06, (q15_t)0x7db2, (q15_t)0xeefa,
+    (q15_t)0x7daf, (q15_t)0xeeee, (q15_t)0x7dab, (q15_t)0xeee2, (q15_t)0x7da8, (q15_t)0xeed6, (q15_t)0x7da4, (q15_t)0xeeca,
+    (q15_t)0x7da1, (q15_t)0xeebe, (q15_t)0x7d9e, (q15_t)0xeeb2, (q15_t)0x7d9a, (q15_t)0xeea6, (q15_t)0x7d97, (q15_t)0xee99,
+    (q15_t)0x7d93, (q15_t)0xee8d, (q15_t)0x7d90, (q15_t)0xee81, (q15_t)0x7d8d, (q15_t)0xee75, (q15_t)0x7d89, (q15_t)0xee69,
+    (q15_t)0x7d86, (q15_t)0xee5d, (q15_t)0x7d82, (q15_t)0xee51, (q15_t)0x7d7f, (q15_t)0xee45, (q15_t)0x7d7b, (q15_t)0xee39,
+    (q15_t)0x7d78, (q15_t)0xee2d, (q15_t)0x7d74, (q15_t)0xee21, (q15_t)0x7d71, (q15_t)0xee15, (q15_t)0x7d6d, (q15_t)0xee09,
+    (q15_t)0x7d6a, (q15_t)0xedfc, (q15_t)0x7d66, (q15_t)0xedf0, (q15_t)0x7d63, (q15_t)0xede4, (q15_t)0x7d5f, (q15_t)0xedd8,
+    (q15_t)0x7d5b, (q15_t)0xedcc, (q15_t)0x7d58, (q15_t)0xedc0, (q15_t)0x7d54, (q15_t)0xedb4, (q15_t)0x7d51, (q15_t)0xeda8,
+    (q15_t)0x7d4d, (q15_t)0xed9c, (q15_t)0x7d49, (q15_t)0xed90, (q15_t)0x7d46, (q15_t)0xed84, (q15_t)0x7d42, (q15_t)0xed78,
+    (q15_t)0x7d3f, (q15_t)0xed6c, (q15_t)0x7d3b, (q15_t)0xed60, (q15_t)0x7d37, (q15_t)0xed54, (q15_t)0x7d34, (q15_t)0xed48,
+    (q15_t)0x7d30, (q15_t)0xed3c, (q15_t)0x7d2c, (q15_t)0xed30, (q15_t)0x7d28, (q15_t)0xed24, (q15_t)0x7d25, (q15_t)0xed18,
+    (q15_t)0x7d21, (q15_t)0xed0c, (q15_t)0x7d1d, (q15_t)0xed00, (q15_t)0x7d1a, (q15_t)0xecf4, (q15_t)0x7d16, (q15_t)0xece8,
+    (q15_t)0x7d12, (q15_t)0xecdc, (q15_t)0x7d0e, (q15_t)0xecd0, (q15_t)0x7d0b, (q15_t)0xecc4, (q15_t)0x7d07, (q15_t)0xecb8,
+    (q15_t)0x7d03, (q15_t)0xecac, (q15_t)0x7cff, (q15_t)0xeca0, (q15_t)0x7cfb, (q15_t)0xec94, (q15_t)0x7cf8, (q15_t)0xec88,
+    (q15_t)0x7cf4, (q15_t)0xec7c, (q15_t)0x7cf0, (q15_t)0xec70, (q15_t)0x7cec, (q15_t)0xec64, (q15_t)0x7ce8, (q15_t)0xec58,
+    (q15_t)0x7ce4, (q15_t)0xec4c, (q15_t)0x7ce0, (q15_t)0xec40, (q15_t)0x7cdd, (q15_t)0xec34, (q15_t)0x7cd9, (q15_t)0xec28,
+    (q15_t)0x7cd5, (q15_t)0xec1c, (q15_t)0x7cd1, (q15_t)0xec10, (q15_t)0x7ccd, (q15_t)0xec05, (q15_t)0x7cc9, (q15_t)0xebf9,
+    (q15_t)0x7cc5, (q15_t)0xebed, (q15_t)0x7cc1, (q15_t)0xebe1, (q15_t)0x7cbd, (q15_t)0xebd5, (q15_t)0x7cb9, (q15_t)0xebc9,
+    (q15_t)0x7cb5, (q15_t)0xebbd, (q15_t)0x7cb1, (q15_t)0xebb1, (q15_t)0x7cad, (q15_t)0xeba5, (q15_t)0x7ca9, (q15_t)0xeb99,
+    (q15_t)0x7ca5, (q15_t)0xeb8d, (q15_t)0x7ca1, (q15_t)0xeb81, (q15_t)0x7c9d, (q15_t)0xeb75, (q15_t)0x7c99, (q15_t)0xeb6a,
+    (q15_t)0x7c95, (q15_t)0xeb5e, (q15_t)0x7c91, (q15_t)0xeb52, (q15_t)0x7c8d, (q15_t)0xeb46, (q15_t)0x7c89, (q15_t)0xeb3a,
+    (q15_t)0x7c85, (q15_t)0xeb2e, (q15_t)0x7c81, (q15_t)0xeb22, (q15_t)0x7c7d, (q15_t)0xeb16, (q15_t)0x7c79, (q15_t)0xeb0a,
+    (q15_t)0x7c74, (q15_t)0xeaff, (q15_t)0x7c70, (q15_t)0xeaf3, (q15_t)0x7c6c, (q15_t)0xeae7, (q15_t)0x7c68, (q15_t)0xeadb,
+    (q15_t)0x7c64, (q15_t)0xeacf, (q15_t)0x7c60, (q15_t)0xeac3, (q15_t)0x7c5b, (q15_t)0xeab7, (q15_t)0x7c57, (q15_t)0xeaac,
+    (q15_t)0x7c53, (q15_t)0xeaa0, (q15_t)0x7c4f, (q15_t)0xea94, (q15_t)0x7c4b, (q15_t)0xea88, (q15_t)0x7c46, (q15_t)0xea7c,
+    (q15_t)0x7c42, (q15_t)0xea70, (q15_t)0x7c3e, (q15_t)0xea65, (q15_t)0x7c3a, (q15_t)0xea59, (q15_t)0x7c36, (q15_t)0xea4d,
+    (q15_t)0x7c31, (q15_t)0xea41, (q15_t)0x7c2d, (q15_t)0xea35, (q15_t)0x7c29, (q15_t)0xea29, (q15_t)0x7c24, (q15_t)0xea1e,
+    (q15_t)0x7c20, (q15_t)0xea12, (q15_t)0x7c1c, (q15_t)0xea06, (q15_t)0x7c17, (q15_t)0xe9fa, (q15_t)0x7c13, (q15_t)0xe9ee,
+    (q15_t)0x7c0f, (q15_t)0xe9e3, (q15_t)0x7c0a, (q15_t)0xe9d7, (q15_t)0x7c06, (q15_t)0xe9cb, (q15_t)0x7c02, (q15_t)0xe9bf,
+    (q15_t)0x7bfd, (q15_t)0xe9b4, (q15_t)0x7bf9, (q15_t)0xe9a8, (q15_t)0x7bf5, (q15_t)0xe99c, (q15_t)0x7bf0, (q15_t)0xe990,
+    (q15_t)0x7bec, (q15_t)0xe984, (q15_t)0x7be7, (q15_t)0xe979, (q15_t)0x7be3, (q15_t)0xe96d, (q15_t)0x7bde, (q15_t)0xe961,
+    (q15_t)0x7bda, (q15_t)0xe955, (q15_t)0x7bd6, (q15_t)0xe94a, (q15_t)0x7bd1, (q15_t)0xe93e, (q15_t)0x7bcd, (q15_t)0xe932,
+    (q15_t)0x7bc8, (q15_t)0xe926, (q15_t)0x7bc4, (q15_t)0xe91b, (q15_t)0x7bbf, (q15_t)0xe90f, (q15_t)0x7bbb, (q15_t)0xe903,
+    (q15_t)0x7bb6, (q15_t)0xe8f7, (q15_t)0x7bb2, (q15_t)0xe8ec, (q15_t)0x7bad, (q15_t)0xe8e0, (q15_t)0x7ba9, (q15_t)0xe8d4,
+    (q15_t)0x7ba4, (q15_t)0xe8c9, (q15_t)0x7b9f, (q15_t)0xe8bd, (q15_t)0x7b9b, (q15_t)0xe8b1, (q15_t)0x7b96, (q15_t)0xe8a5,
+    (q15_t)0x7b92, (q15_t)0xe89a, (q15_t)0x7b8d, (q15_t)0xe88e, (q15_t)0x7b88, (q15_t)0xe882, (q15_t)0x7b84, (q15_t)0xe877,
+    (q15_t)0x7b7f, (q15_t)0xe86b, (q15_t)0x7b7b, (q15_t)0xe85f, (q15_t)0x7b76, (q15_t)0xe854, (q15_t)0x7b71, (q15_t)0xe848,
+    (q15_t)0x7b6d, (q15_t)0xe83c, (q15_t)0x7b68, (q15_t)0xe831, (q15_t)0x7b63, (q15_t)0xe825, (q15_t)0x7b5f, (q15_t)0xe819,
+    (q15_t)0x7b5a, (q15_t)0xe80e, (q15_t)0x7b55, (q15_t)0xe802, (q15_t)0x7b50, (q15_t)0xe7f6, (q15_t)0x7b4c, (q15_t)0xe7eb,
+    (q15_t)0x7b47, (q15_t)0xe7df, (q15_t)0x7b42, (q15_t)0xe7d3, (q15_t)0x7b3e, (q15_t)0xe7c8, (q15_t)0x7b39, (q15_t)0xe7bc,
+    (q15_t)0x7b34, (q15_t)0xe7b1, (q15_t)0x7b2f, (q15_t)0xe7a5, (q15_t)0x7b2a, (q15_t)0xe799, (q15_t)0x7b26, (q15_t)0xe78e,
+    (q15_t)0x7b21, (q15_t)0xe782, (q15_t)0x7b1c, (q15_t)0xe777, (q15_t)0x7b17, (q15_t)0xe76b, (q15_t)0x7b12, (q15_t)0xe75f,
+    (q15_t)0x7b0e, (q15_t)0xe754, (q15_t)0x7b09, (q15_t)0xe748, (q15_t)0x7b04, (q15_t)0xe73d, (q15_t)0x7aff, (q15_t)0xe731,
+    (q15_t)0x7afa, (q15_t)0xe725, (q15_t)0x7af5, (q15_t)0xe71a, (q15_t)0x7af0, (q15_t)0xe70e, (q15_t)0x7aeb, (q15_t)0xe703,
+    (q15_t)0x7ae6, (q15_t)0xe6f7, (q15_t)0x7ae2, (q15_t)0xe6ec, (q15_t)0x7add, (q15_t)0xe6e0, (q15_t)0x7ad8, (q15_t)0xe6d4,
+    (q15_t)0x7ad3, (q15_t)0xe6c9, (q15_t)0x7ace, (q15_t)0xe6bd, (q15_t)0x7ac9, (q15_t)0xe6b2, (q15_t)0x7ac4, (q15_t)0xe6a6,
+    (q15_t)0x7abf, (q15_t)0xe69b, (q15_t)0x7aba, (q15_t)0xe68f, (q15_t)0x7ab5, (q15_t)0xe684, (q15_t)0x7ab0, (q15_t)0xe678,
+    (q15_t)0x7aab, (q15_t)0xe66d, (q15_t)0x7aa6, (q15_t)0xe661, (q15_t)0x7aa1, (q15_t)0xe656, (q15_t)0x7a9c, (q15_t)0xe64a,
+    (q15_t)0x7a97, (q15_t)0xe63f, (q15_t)0x7a92, (q15_t)0xe633, (q15_t)0x7a8d, (q15_t)0xe628, (q15_t)0x7a88, (q15_t)0xe61c,
+    (q15_t)0x7a82, (q15_t)0xe611, (q15_t)0x7a7d, (q15_t)0xe605, (q15_t)0x7a78, (q15_t)0xe5fa, (q15_t)0x7a73, (q15_t)0xe5ee,
+    (q15_t)0x7a6e, (q15_t)0xe5e3, (q15_t)0x7a69, (q15_t)0xe5d7, (q15_t)0x7a64, (q15_t)0xe5cc, (q15_t)0x7a5f, (q15_t)0xe5c0,
+    (q15_t)0x7a59, (q15_t)0xe5b5, (q15_t)0x7a54, (q15_t)0xe5a9, (q15_t)0x7a4f, (q15_t)0xe59e, (q15_t)0x7a4a, (q15_t)0xe592,
+    (q15_t)0x7a45, (q15_t)0xe587, (q15_t)0x7a3f, (q15_t)0xe57c, (q15_t)0x7a3a, (q15_t)0xe570, (q15_t)0x7a35, (q15_t)0xe565,
+    (q15_t)0x7a30, (q15_t)0xe559, (q15_t)0x7a2b, (q15_t)0xe54e, (q15_t)0x7a25, (q15_t)0xe542, (q15_t)0x7a20, (q15_t)0xe537,
+    (q15_t)0x7a1b, (q15_t)0xe52c, (q15_t)0x7a16, (q15_t)0xe520, (q15_t)0x7a10, (q15_t)0xe515, (q15_t)0x7a0b, (q15_t)0xe509,
+    (q15_t)0x7a06, (q15_t)0xe4fe, (q15_t)0x7a00, (q15_t)0xe4f3, (q15_t)0x79fb, (q15_t)0xe4e7, (q15_t)0x79f6, (q15_t)0xe4dc,
+    (q15_t)0x79f0, (q15_t)0xe4d0, (q15_t)0x79eb, (q15_t)0xe4c5, (q15_t)0x79e6, (q15_t)0xe4ba, (q15_t)0x79e0, (q15_t)0xe4ae,
+    (q15_t)0x79db, (q15_t)0xe4a3, (q15_t)0x79d6, (q15_t)0xe498, (q15_t)0x79d0, (q15_t)0xe48c, (q15_t)0x79cb, (q15_t)0xe481,
+    (q15_t)0x79c5, (q15_t)0xe476, (q15_t)0x79c0, (q15_t)0xe46a, (q15_t)0x79bb, (q15_t)0xe45f, (q15_t)0x79b5, (q15_t)0xe454,
+    (q15_t)0x79b0, (q15_t)0xe448, (q15_t)0x79aa, (q15_t)0xe43d, (q15_t)0x79a5, (q15_t)0xe432, (q15_t)0x799f, (q15_t)0xe426,
+    (q15_t)0x799a, (q15_t)0xe41b, (q15_t)0x7994, (q15_t)0xe410, (q15_t)0x798f, (q15_t)0xe404, (q15_t)0x7989, (q15_t)0xe3f9,
+    (q15_t)0x7984, (q15_t)0xe3ee, (q15_t)0x797e, (q15_t)0xe3e2, (q15_t)0x7979, (q15_t)0xe3d7, (q15_t)0x7973, (q15_t)0xe3cc,
+    (q15_t)0x796e, (q15_t)0xe3c1, (q15_t)0x7968, (q15_t)0xe3b5, (q15_t)0x7963, (q15_t)0xe3aa, (q15_t)0x795d, (q15_t)0xe39f,
+    (q15_t)0x7958, (q15_t)0xe394, (q15_t)0x7952, (q15_t)0xe388, (q15_t)0x794c, (q15_t)0xe37d, (q15_t)0x7947, (q15_t)0xe372,
+    (q15_t)0x7941, (q15_t)0xe367, (q15_t)0x793b, (q15_t)0xe35b, (q15_t)0x7936, (q15_t)0xe350, (q15_t)0x7930, (q15_t)0xe345,
+    (q15_t)0x792b, (q15_t)0xe33a, (q15_t)0x7925, (q15_t)0xe32e, (q15_t)0x791f, (q15_t)0xe323, (q15_t)0x791a, (q15_t)0xe318,
+    (q15_t)0x7914, (q15_t)0xe30d, (q15_t)0x790e, (q15_t)0xe301, (q15_t)0x7909, (q15_t)0xe2f6, (q15_t)0x7903, (q15_t)0xe2eb,
+    (q15_t)0x78fd, (q15_t)0xe2e0, (q15_t)0x78f7, (q15_t)0xe2d5, (q15_t)0x78f2, (q15_t)0xe2ca, (q15_t)0x78ec, (q15_t)0xe2be,
+    (q15_t)0x78e6, (q15_t)0xe2b3, (q15_t)0x78e0, (q15_t)0xe2a8, (q15_t)0x78db, (q15_t)0xe29d, (q15_t)0x78d5, (q15_t)0xe292,
+    (q15_t)0x78cf, (q15_t)0xe287, (q15_t)0x78c9, (q15_t)0xe27b, (q15_t)0x78c3, (q15_t)0xe270, (q15_t)0x78be, (q15_t)0xe265,
+    (q15_t)0x78b8, (q15_t)0xe25a, (q15_t)0x78b2, (q15_t)0xe24f, (q15_t)0x78ac, (q15_t)0xe244, (q15_t)0x78a6, (q15_t)0xe239,
+    (q15_t)0x78a1, (q15_t)0xe22d, (q15_t)0x789b, (q15_t)0xe222, (q15_t)0x7895, (q15_t)0xe217, (q15_t)0x788f, (q15_t)0xe20c,
+    (q15_t)0x7889, (q15_t)0xe201, (q15_t)0x7883, (q15_t)0xe1f6, (q15_t)0x787d, (q15_t)0xe1eb, (q15_t)0x7877, (q15_t)0xe1e0,
+    (q15_t)0x7871, (q15_t)0xe1d5, (q15_t)0x786b, (q15_t)0xe1ca, (q15_t)0x7866, (q15_t)0xe1be, (q15_t)0x7860, (q15_t)0xe1b3,
+    (q15_t)0x785a, (q15_t)0xe1a8, (q15_t)0x7854, (q15_t)0xe19d, (q15_t)0x784e, (q15_t)0xe192, (q15_t)0x7848, (q15_t)0xe187,
+    (q15_t)0x7842, (q15_t)0xe17c, (q15_t)0x783c, (q15_t)0xe171, (q15_t)0x7836, (q15_t)0xe166, (q15_t)0x7830, (q15_t)0xe15b,
+    (q15_t)0x782a, (q15_t)0xe150, (q15_t)0x7824, (q15_t)0xe145, (q15_t)0x781e, (q15_t)0xe13a, (q15_t)0x7818, (q15_t)0xe12f,
+    (q15_t)0x7812, (q15_t)0xe124, (q15_t)0x780b, (q15_t)0xe119, (q15_t)0x7805, (q15_t)0xe10e, (q15_t)0x77ff, (q15_t)0xe103,
+    (q15_t)0x77f9, (q15_t)0xe0f8, (q15_t)0x77f3, (q15_t)0xe0ed, (q15_t)0x77ed, (q15_t)0xe0e2, (q15_t)0x77e7, (q15_t)0xe0d7,
+    (q15_t)0x77e1, (q15_t)0xe0cc, (q15_t)0x77db, (q15_t)0xe0c1, (q15_t)0x77d5, (q15_t)0xe0b6, (q15_t)0x77ce, (q15_t)0xe0ab,
+    (q15_t)0x77c8, (q15_t)0xe0a0, (q15_t)0x77c2, (q15_t)0xe095, (q15_t)0x77bc, (q15_t)0xe08a, (q15_t)0x77b6, (q15_t)0xe07f,
+    (q15_t)0x77b0, (q15_t)0xe074, (q15_t)0x77a9, (q15_t)0xe069, (q15_t)0x77a3, (q15_t)0xe05e, (q15_t)0x779d, (q15_t)0xe054,
+    (q15_t)0x7797, (q15_t)0xe049, (q15_t)0x7790, (q15_t)0xe03e, (q15_t)0x778a, (q15_t)0xe033, (q15_t)0x7784, (q15_t)0xe028,
+    (q15_t)0x777e, (q15_t)0xe01d, (q15_t)0x7777, (q15_t)0xe012, (q15_t)0x7771, (q15_t)0xe007, (q15_t)0x776b, (q15_t)0xdffc,
+    (q15_t)0x7765, (q15_t)0xdff1, (q15_t)0x775e, (q15_t)0xdfe7, (q15_t)0x7758, (q15_t)0xdfdc, (q15_t)0x7752, (q15_t)0xdfd1,
+    (q15_t)0x774b, (q15_t)0xdfc6, (q15_t)0x7745, (q15_t)0xdfbb, (q15_t)0x773f, (q15_t)0xdfb0, (q15_t)0x7738, (q15_t)0xdfa5,
+    (q15_t)0x7732, (q15_t)0xdf9b, (q15_t)0x772c, (q15_t)0xdf90, (q15_t)0x7725, (q15_t)0xdf85, (q15_t)0x771f, (q15_t)0xdf7a,
+    (q15_t)0x7718, (q15_t)0xdf6f, (q15_t)0x7712, (q15_t)0xdf65, (q15_t)0x770c, (q15_t)0xdf5a, (q15_t)0x7705, (q15_t)0xdf4f,
+    (q15_t)0x76ff, (q15_t)0xdf44, (q15_t)0x76f8, (q15_t)0xdf39, (q15_t)0x76f2, (q15_t)0xdf2f, (q15_t)0x76eb, (q15_t)0xdf24,
+    (q15_t)0x76e5, (q15_t)0xdf19, (q15_t)0x76df, (q15_t)0xdf0e, (q15_t)0x76d8, (q15_t)0xdf03, (q15_t)0x76d2, (q15_t)0xdef9,
+    (q15_t)0x76cb, (q15_t)0xdeee, (q15_t)0x76c5, (q15_t)0xdee3, (q15_t)0x76be, (q15_t)0xded8, (q15_t)0x76b8, (q15_t)0xdece,
+    (q15_t)0x76b1, (q15_t)0xdec3, (q15_t)0x76ab, (q15_t)0xdeb8, (q15_t)0x76a4, (q15_t)0xdead, (q15_t)0x769d, (q15_t)0xdea3,
+    (q15_t)0x7697, (q15_t)0xde98, (q15_t)0x7690, (q15_t)0xde8d, (q15_t)0x768a, (q15_t)0xde83, (q15_t)0x7683, (q15_t)0xde78,
+    (q15_t)0x767d, (q15_t)0xde6d, (q15_t)0x7676, (q15_t)0xde62, (q15_t)0x766f, (q15_t)0xde58, (q15_t)0x7669, (q15_t)0xde4d,
+    (q15_t)0x7662, (q15_t)0xde42, (q15_t)0x765c, (q15_t)0xde38, (q15_t)0x7655, (q15_t)0xde2d, (q15_t)0x764e, (q15_t)0xde22,
+    (q15_t)0x7648, (q15_t)0xde18, (q15_t)0x7641, (q15_t)0xde0d, (q15_t)0x763a, (q15_t)0xde02, (q15_t)0x7634, (q15_t)0xddf8,
+    (q15_t)0x762d, (q15_t)0xdded, (q15_t)0x7626, (q15_t)0xdde2, (q15_t)0x7620, (q15_t)0xddd8, (q15_t)0x7619, (q15_t)0xddcd,
+    (q15_t)0x7612, (q15_t)0xddc3, (q15_t)0x760b, (q15_t)0xddb8, (q15_t)0x7605, (q15_t)0xddad, (q15_t)0x75fe, (q15_t)0xdda3,
+    (q15_t)0x75f7, (q15_t)0xdd98, (q15_t)0x75f0, (q15_t)0xdd8e, (q15_t)0x75ea, (q15_t)0xdd83, (q15_t)0x75e3, (q15_t)0xdd78,
+    (q15_t)0x75dc, (q15_t)0xdd6e, (q15_t)0x75d5, (q15_t)0xdd63, (q15_t)0x75ce, (q15_t)0xdd59, (q15_t)0x75c8, (q15_t)0xdd4e,
+    (q15_t)0x75c1, (q15_t)0xdd44, (q15_t)0x75ba, (q15_t)0xdd39, (q15_t)0x75b3, (q15_t)0xdd2e, (q15_t)0x75ac, (q15_t)0xdd24,
+    (q15_t)0x75a5, (q15_t)0xdd19, (q15_t)0x759f, (q15_t)0xdd0f, (q15_t)0x7598, (q15_t)0xdd04, (q15_t)0x7591, (q15_t)0xdcfa,
+    (q15_t)0x758a, (q15_t)0xdcef, (q15_t)0x7583, (q15_t)0xdce5, (q15_t)0x757c, (q15_t)0xdcda, (q15_t)0x7575, (q15_t)0xdcd0,
+    (q15_t)0x756e, (q15_t)0xdcc5, (q15_t)0x7567, (q15_t)0xdcbb, (q15_t)0x7561, (q15_t)0xdcb0, (q15_t)0x755a, (q15_t)0xdca6,
+    (q15_t)0x7553, (q15_t)0xdc9b, (q15_t)0x754c, (q15_t)0xdc91, (q15_t)0x7545, (q15_t)0xdc86, (q15_t)0x753e, (q15_t)0xdc7c,
+    (q15_t)0x7537, (q15_t)0xdc72, (q15_t)0x7530, (q15_t)0xdc67, (q15_t)0x7529, (q15_t)0xdc5d, (q15_t)0x7522, (q15_t)0xdc52,
+    (q15_t)0x751b, (q15_t)0xdc48, (q15_t)0x7514, (q15_t)0xdc3d, (q15_t)0x750d, (q15_t)0xdc33, (q15_t)0x7506, (q15_t)0xdc29,
+    (q15_t)0x74ff, (q15_t)0xdc1e, (q15_t)0x74f8, (q15_t)0xdc14, (q15_t)0x74f1, (q15_t)0xdc09, (q15_t)0x74ea, (q15_t)0xdbff,
+    (q15_t)0x74e2, (q15_t)0xdbf5, (q15_t)0x74db, (q15_t)0xdbea, (q15_t)0x74d4, (q15_t)0xdbe0, (q15_t)0x74cd, (q15_t)0xdbd5,
+    (q15_t)0x74c6, (q15_t)0xdbcb, (q15_t)0x74bf, (q15_t)0xdbc1, (q15_t)0x74b8, (q15_t)0xdbb6, (q15_t)0x74b1, (q15_t)0xdbac,
+    (q15_t)0x74aa, (q15_t)0xdba2, (q15_t)0x74a2, (q15_t)0xdb97, (q15_t)0x749b, (q15_t)0xdb8d, (q15_t)0x7494, (q15_t)0xdb83,
+    (q15_t)0x748d, (q15_t)0xdb78, (q15_t)0x7486, (q15_t)0xdb6e, (q15_t)0x747f, (q15_t)0xdb64, (q15_t)0x7477, (q15_t)0xdb59,
+    (q15_t)0x7470, (q15_t)0xdb4f, (q15_t)0x7469, (q15_t)0xdb45, (q15_t)0x7462, (q15_t)0xdb3b, (q15_t)0x745b, (q15_t)0xdb30,
+    (q15_t)0x7453, (q15_t)0xdb26, (q15_t)0x744c, (q15_t)0xdb1c, (q15_t)0x7445, (q15_t)0xdb11, (q15_t)0x743e, (q15_t)0xdb07,
+    (q15_t)0x7436, (q15_t)0xdafd, (q15_t)0x742f, (q15_t)0xdaf3, (q15_t)0x7428, (q15_t)0xdae8, (q15_t)0x7420, (q15_t)0xdade,
+    (q15_t)0x7419, (q15_t)0xdad4, (q15_t)0x7412, (q15_t)0xdaca, (q15_t)0x740b, (q15_t)0xdabf, (q15_t)0x7403, (q15_t)0xdab5,
+    (q15_t)0x73fc, (q15_t)0xdaab, (q15_t)0x73f5, (q15_t)0xdaa1, (q15_t)0x73ed, (q15_t)0xda97, (q15_t)0x73e6, (q15_t)0xda8c,
+    (q15_t)0x73df, (q15_t)0xda82, (q15_t)0x73d7, (q15_t)0xda78, (q15_t)0x73d0, (q15_t)0xda6e, (q15_t)0x73c8, (q15_t)0xda64,
+    (q15_t)0x73c1, (q15_t)0xda5a, (q15_t)0x73ba, (q15_t)0xda4f, (q15_t)0x73b2, (q15_t)0xda45, (q15_t)0x73ab, (q15_t)0xda3b,
+    (q15_t)0x73a3, (q15_t)0xda31, (q15_t)0x739c, (q15_t)0xda27, (q15_t)0x7395, (q15_t)0xda1d, (q15_t)0x738d, (q15_t)0xda13,
+    (q15_t)0x7386, (q15_t)0xda08, (q15_t)0x737e, (q15_t)0xd9fe, (q15_t)0x7377, (q15_t)0xd9f4, (q15_t)0x736f, (q15_t)0xd9ea,
+    (q15_t)0x7368, (q15_t)0xd9e0, (q15_t)0x7360, (q15_t)0xd9d6, (q15_t)0x7359, (q15_t)0xd9cc, (q15_t)0x7351, (q15_t)0xd9c2,
+    (q15_t)0x734a, (q15_t)0xd9b8, (q15_t)0x7342, (q15_t)0xd9ae, (q15_t)0x733b, (q15_t)0xd9a4, (q15_t)0x7333, (q15_t)0xd99a,
+    (q15_t)0x732c, (q15_t)0xd98f, (q15_t)0x7324, (q15_t)0xd985, (q15_t)0x731d, (q15_t)0xd97b, (q15_t)0x7315, (q15_t)0xd971,
+    (q15_t)0x730d, (q15_t)0xd967, (q15_t)0x7306, (q15_t)0xd95d, (q15_t)0x72fe, (q15_t)0xd953, (q15_t)0x72f7, (q15_t)0xd949,
+    (q15_t)0x72ef, (q15_t)0xd93f, (q15_t)0x72e7, (q15_t)0xd935, (q15_t)0x72e0, (q15_t)0xd92b, (q15_t)0x72d8, (q15_t)0xd921,
+    (q15_t)0x72d0, (q15_t)0xd917, (q15_t)0x72c9, (q15_t)0xd90d, (q15_t)0x72c1, (q15_t)0xd903, (q15_t)0x72ba, (q15_t)0xd8f9,
+    (q15_t)0x72b2, (q15_t)0xd8ef, (q15_t)0x72aa, (q15_t)0xd8e6, (q15_t)0x72a3, (q15_t)0xd8dc, (q15_t)0x729b, (q15_t)0xd8d2,
+    (q15_t)0x7293, (q15_t)0xd8c8, (q15_t)0x728b, (q15_t)0xd8be, (q15_t)0x7284, (q15_t)0xd8b4, (q15_t)0x727c, (q15_t)0xd8aa,
+    (q15_t)0x7274, (q15_t)0xd8a0, (q15_t)0x726d, (q15_t)0xd896, (q15_t)0x7265, (q15_t)0xd88c, (q15_t)0x725d, (q15_t)0xd882,
+    (q15_t)0x7255, (q15_t)0xd878, (q15_t)0x724e, (q15_t)0xd86f, (q15_t)0x7246, (q15_t)0xd865, (q15_t)0x723e, (q15_t)0xd85b,
+    (q15_t)0x7236, (q15_t)0xd851, (q15_t)0x722e, (q15_t)0xd847, (q15_t)0x7227, (q15_t)0xd83d, (q15_t)0x721f, (q15_t)0xd833,
+    (q15_t)0x7217, (q15_t)0xd82a, (q15_t)0x720f, (q15_t)0xd820, (q15_t)0x7207, (q15_t)0xd816, (q15_t)0x71ff, (q15_t)0xd80c,
+    (q15_t)0x71f8, (q15_t)0xd802, (q15_t)0x71f0, (q15_t)0xd7f8, (q15_t)0x71e8, (q15_t)0xd7ef, (q15_t)0x71e0, (q15_t)0xd7e5,
+    (q15_t)0x71d8, (q15_t)0xd7db, (q15_t)0x71d0, (q15_t)0xd7d1, (q15_t)0x71c8, (q15_t)0xd7c8, (q15_t)0x71c0, (q15_t)0xd7be,
+    (q15_t)0x71b9, (q15_t)0xd7b4, (q15_t)0x71b1, (q15_t)0xd7aa, (q15_t)0x71a9, (q15_t)0xd7a0, (q15_t)0x71a1, (q15_t)0xd797,
+    (q15_t)0x7199, (q15_t)0xd78d, (q15_t)0x7191, (q15_t)0xd783, (q15_t)0x7189, (q15_t)0xd77a, (q15_t)0x7181, (q15_t)0xd770,
+    (q15_t)0x7179, (q15_t)0xd766, (q15_t)0x7171, (q15_t)0xd75c, (q15_t)0x7169, (q15_t)0xd753, (q15_t)0x7161, (q15_t)0xd749,
+    (q15_t)0x7159, (q15_t)0xd73f, (q15_t)0x7151, (q15_t)0xd736, (q15_t)0x7149, (q15_t)0xd72c, (q15_t)0x7141, (q15_t)0xd722,
+    (q15_t)0x7139, (q15_t)0xd719, (q15_t)0x7131, (q15_t)0xd70f, (q15_t)0x7129, (q15_t)0xd705, (q15_t)0x7121, (q15_t)0xd6fc,
+    (q15_t)0x7119, (q15_t)0xd6f2, (q15_t)0x7111, (q15_t)0xd6e8, (q15_t)0x7109, (q15_t)0xd6df, (q15_t)0x7101, (q15_t)0xd6d5,
+    (q15_t)0x70f9, (q15_t)0xd6cb, (q15_t)0x70f0, (q15_t)0xd6c2, (q15_t)0x70e8, (q15_t)0xd6b8, (q15_t)0x70e0, (q15_t)0xd6af,
+    (q15_t)0x70d8, (q15_t)0xd6a5, (q15_t)0x70d0, (q15_t)0xd69b, (q15_t)0x70c8, (q15_t)0xd692, (q15_t)0x70c0, (q15_t)0xd688,
+    (q15_t)0x70b8, (q15_t)0xd67f, (q15_t)0x70af, (q15_t)0xd675, (q15_t)0x70a7, (q15_t)0xd66c, (q15_t)0x709f, (q15_t)0xd662,
+    (q15_t)0x7097, (q15_t)0xd659, (q15_t)0x708f, (q15_t)0xd64f, (q15_t)0x7087, (q15_t)0xd645, (q15_t)0x707e, (q15_t)0xd63c,
+    (q15_t)0x7076, (q15_t)0xd632, (q15_t)0x706e, (q15_t)0xd629, (q15_t)0x7066, (q15_t)0xd61f, (q15_t)0x705d, (q15_t)0xd616,
+    (q15_t)0x7055, (q15_t)0xd60c, (q15_t)0x704d, (q15_t)0xd603, (q15_t)0x7045, (q15_t)0xd5f9, (q15_t)0x703c, (q15_t)0xd5f0,
+    (q15_t)0x7034, (q15_t)0xd5e6, (q15_t)0x702c, (q15_t)0xd5dd, (q15_t)0x7024, (q15_t)0xd5d4, (q15_t)0x701b, (q15_t)0xd5ca,
+    (q15_t)0x7013, (q15_t)0xd5c1, (q15_t)0x700b, (q15_t)0xd5b7, (q15_t)0x7002, (q15_t)0xd5ae, (q15_t)0x6ffa, (q15_t)0xd5a4,
+    (q15_t)0x6ff2, (q15_t)0xd59b, (q15_t)0x6fea, (q15_t)0xd592, (q15_t)0x6fe1, (q15_t)0xd588, (q15_t)0x6fd9, (q15_t)0xd57f,
+    (q15_t)0x6fd0, (q15_t)0xd575, (q15_t)0x6fc8, (q15_t)0xd56c, (q15_t)0x6fc0, (q15_t)0xd563, (q15_t)0x6fb7, (q15_t)0xd559,
+    (q15_t)0x6faf, (q15_t)0xd550, (q15_t)0x6fa7, (q15_t)0xd547, (q15_t)0x6f9e, (q15_t)0xd53d, (q15_t)0x6f96, (q15_t)0xd534,
+    (q15_t)0x6f8d, (q15_t)0xd52a, (q15_t)0x6f85, (q15_t)0xd521, (q15_t)0x6f7d, (q15_t)0xd518, (q15_t)0x6f74, (q15_t)0xd50e,
+    (q15_t)0x6f6c, (q15_t)0xd505, (q15_t)0x6f63, (q15_t)0xd4fc, (q15_t)0x6f5b, (q15_t)0xd4f3, (q15_t)0x6f52, (q15_t)0xd4e9,
+    (q15_t)0x6f4a, (q15_t)0xd4e0, (q15_t)0x6f41, (q15_t)0xd4d7, (q15_t)0x6f39, (q15_t)0xd4cd, (q15_t)0x6f30, (q15_t)0xd4c4,
+    (q15_t)0x6f28, (q15_t)0xd4bb, (q15_t)0x6f20, (q15_t)0xd4b2, (q15_t)0x6f17, (q15_t)0xd4a8, (q15_t)0x6f0e, (q15_t)0xd49f,
+    (q15_t)0x6f06, (q15_t)0xd496, (q15_t)0x6efd, (q15_t)0xd48d, (q15_t)0x6ef5, (q15_t)0xd483, (q15_t)0x6eec, (q15_t)0xd47a,
+    (q15_t)0x6ee4, (q15_t)0xd471, (q15_t)0x6edb, (q15_t)0xd468, (q15_t)0x6ed3, (q15_t)0xd45f, (q15_t)0x6eca, (q15_t)0xd455,
+    (q15_t)0x6ec2, (q15_t)0xd44c, (q15_t)0x6eb9, (q15_t)0xd443, (q15_t)0x6eb0, (q15_t)0xd43a, (q15_t)0x6ea8, (q15_t)0xd431,
+    (q15_t)0x6e9f, (q15_t)0xd428, (q15_t)0x6e97, (q15_t)0xd41e, (q15_t)0x6e8e, (q15_t)0xd415, (q15_t)0x6e85, (q15_t)0xd40c,
+    (q15_t)0x6e7d, (q15_t)0xd403, (q15_t)0x6e74, (q15_t)0xd3fa, (q15_t)0x6e6b, (q15_t)0xd3f1, (q15_t)0x6e63, (q15_t)0xd3e8,
+    (q15_t)0x6e5a, (q15_t)0xd3df, (q15_t)0x6e51, (q15_t)0xd3d5, (q15_t)0x6e49, (q15_t)0xd3cc, (q15_t)0x6e40, (q15_t)0xd3c3,
+    (q15_t)0x6e37, (q15_t)0xd3ba, (q15_t)0x6e2f, (q15_t)0xd3b1, (q15_t)0x6e26, (q15_t)0xd3a8, (q15_t)0x6e1d, (q15_t)0xd39f,
+    (q15_t)0x6e15, (q15_t)0xd396, (q15_t)0x6e0c, (q15_t)0xd38d, (q15_t)0x6e03, (q15_t)0xd384, (q15_t)0x6dfa, (q15_t)0xd37b,
+    (q15_t)0x6df2, (q15_t)0xd372, (q15_t)0x6de9, (q15_t)0xd369, (q15_t)0x6de0, (q15_t)0xd360, (q15_t)0x6dd7, (q15_t)0xd357,
+    (q15_t)0x6dcf, (q15_t)0xd34e, (q15_t)0x6dc6, (q15_t)0xd345, (q15_t)0x6dbd, (q15_t)0xd33c, (q15_t)0x6db4, (q15_t)0xd333,
+    (q15_t)0x6dab, (q15_t)0xd32a, (q15_t)0x6da3, (q15_t)0xd321, (q15_t)0x6d9a, (q15_t)0xd318, (q15_t)0x6d91, (q15_t)0xd30f,
+    (q15_t)0x6d88, (q15_t)0xd306, (q15_t)0x6d7f, (q15_t)0xd2fd, (q15_t)0x6d76, (q15_t)0xd2f4, (q15_t)0x6d6e, (q15_t)0xd2eb,
+    (q15_t)0x6d65, (q15_t)0xd2e2, (q15_t)0x6d5c, (q15_t)0xd2d9, (q15_t)0x6d53, (q15_t)0xd2d1, (q15_t)0x6d4a, (q15_t)0xd2c8,
+    (q15_t)0x6d41, (q15_t)0xd2bf, (q15_t)0x6d38, (q15_t)0xd2b6, (q15_t)0x6d2f, (q15_t)0xd2ad, (q15_t)0x6d27, (q15_t)0xd2a4,
+    (q15_t)0x6d1e, (q15_t)0xd29b, (q15_t)0x6d15, (q15_t)0xd292, (q15_t)0x6d0c, (q15_t)0xd28a, (q15_t)0x6d03, (q15_t)0xd281,
+    (q15_t)0x6cfa, (q15_t)0xd278, (q15_t)0x6cf1, (q15_t)0xd26f, (q15_t)0x6ce8, (q15_t)0xd266, (q15_t)0x6cdf, (q15_t)0xd25d,
+    (q15_t)0x6cd6, (q15_t)0xd255, (q15_t)0x6ccd, (q15_t)0xd24c, (q15_t)0x6cc4, (q15_t)0xd243, (q15_t)0x6cbb, (q15_t)0xd23a,
+    (q15_t)0x6cb2, (q15_t)0xd231, (q15_t)0x6ca9, (q15_t)0xd229, (q15_t)0x6ca0, (q15_t)0xd220, (q15_t)0x6c97, (q15_t)0xd217,
+    (q15_t)0x6c8e, (q15_t)0xd20e, (q15_t)0x6c85, (q15_t)0xd206, (q15_t)0x6c7c, (q15_t)0xd1fd, (q15_t)0x6c73, (q15_t)0xd1f4,
+    (q15_t)0x6c6a, (q15_t)0xd1eb, (q15_t)0x6c61, (q15_t)0xd1e3, (q15_t)0x6c58, (q15_t)0xd1da, (q15_t)0x6c4f, (q15_t)0xd1d1,
+    (q15_t)0x6c46, (q15_t)0xd1c9, (q15_t)0x6c3d, (q15_t)0xd1c0, (q15_t)0x6c34, (q15_t)0xd1b7, (q15_t)0x6c2b, (q15_t)0xd1af,
+    (q15_t)0x6c21, (q15_t)0xd1a6, (q15_t)0x6c18, (q15_t)0xd19d, (q15_t)0x6c0f, (q15_t)0xd195, (q15_t)0x6c06, (q15_t)0xd18c,
+    (q15_t)0x6bfd, (q15_t)0xd183, (q15_t)0x6bf4, (q15_t)0xd17b, (q15_t)0x6beb, (q15_t)0xd172, (q15_t)0x6be2, (q15_t)0xd169,
+    (q15_t)0x6bd8, (q15_t)0xd161, (q15_t)0x6bcf, (q15_t)0xd158, (q15_t)0x6bc6, (q15_t)0xd150, (q15_t)0x6bbd, (q15_t)0xd147,
+    (q15_t)0x6bb4, (q15_t)0xd13e, (q15_t)0x6bab, (q15_t)0xd136, (q15_t)0x6ba1, (q15_t)0xd12d, (q15_t)0x6b98, (q15_t)0xd125,
+    (q15_t)0x6b8f, (q15_t)0xd11c, (q15_t)0x6b86, (q15_t)0xd114, (q15_t)0x6b7d, (q15_t)0xd10b, (q15_t)0x6b73, (q15_t)0xd103,
+    (q15_t)0x6b6a, (q15_t)0xd0fa, (q15_t)0x6b61, (q15_t)0xd0f2, (q15_t)0x6b58, (q15_t)0xd0e9, (q15_t)0x6b4e, (q15_t)0xd0e0,
+    (q15_t)0x6b45, (q15_t)0xd0d8, (q15_t)0x6b3c, (q15_t)0xd0d0, (q15_t)0x6b33, (q15_t)0xd0c7, (q15_t)0x6b29, (q15_t)0xd0bf,
+    (q15_t)0x6b20, (q15_t)0xd0b6, (q15_t)0x6b17, (q15_t)0xd0ae, (q15_t)0x6b0d, (q15_t)0xd0a5, (q15_t)0x6b04, (q15_t)0xd09d,
+    (q15_t)0x6afb, (q15_t)0xd094, (q15_t)0x6af2, (q15_t)0xd08c, (q15_t)0x6ae8, (q15_t)0xd083, (q15_t)0x6adf, (q15_t)0xd07b,
+    (q15_t)0x6ad6, (q15_t)0xd073, (q15_t)0x6acc, (q15_t)0xd06a, (q15_t)0x6ac3, (q15_t)0xd062, (q15_t)0x6ab9, (q15_t)0xd059,
+    (q15_t)0x6ab0, (q15_t)0xd051, (q15_t)0x6aa7, (q15_t)0xd049, (q15_t)0x6a9d, (q15_t)0xd040, (q15_t)0x6a94, (q15_t)0xd038,
+    (q15_t)0x6a8b, (q15_t)0xd030, (q15_t)0x6a81, (q15_t)0xd027, (q15_t)0x6a78, (q15_t)0xd01f, (q15_t)0x6a6e, (q15_t)0xd016,
+    (q15_t)0x6a65, (q15_t)0xd00e, (q15_t)0x6a5c, (q15_t)0xd006, (q15_t)0x6a52, (q15_t)0xcffe, (q15_t)0x6a49, (q15_t)0xcff5,
+    (q15_t)0x6a3f, (q15_t)0xcfed, (q15_t)0x6a36, (q15_t)0xcfe5, (q15_t)0x6a2c, (q15_t)0xcfdc, (q15_t)0x6a23, (q15_t)0xcfd4,
+    (q15_t)0x6a1a, (q15_t)0xcfcc, (q15_t)0x6a10, (q15_t)0xcfc4, (q15_t)0x6a07, (q15_t)0xcfbb, (q15_t)0x69fd, (q15_t)0xcfb3,
+    (q15_t)0x69f4, (q15_t)0xcfab, (q15_t)0x69ea, (q15_t)0xcfa3, (q15_t)0x69e1, (q15_t)0xcf9a, (q15_t)0x69d7, (q15_t)0xcf92,
+    (q15_t)0x69ce, (q15_t)0xcf8a, (q15_t)0x69c4, (q15_t)0xcf82, (q15_t)0x69bb, (q15_t)0xcf79, (q15_t)0x69b1, (q15_t)0xcf71,
+    (q15_t)0x69a7, (q15_t)0xcf69, (q15_t)0x699e, (q15_t)0xcf61, (q15_t)0x6994, (q15_t)0xcf59, (q15_t)0x698b, (q15_t)0xcf51,
+    (q15_t)0x6981, (q15_t)0xcf48, (q15_t)0x6978, (q15_t)0xcf40, (q15_t)0x696e, (q15_t)0xcf38, (q15_t)0x6965, (q15_t)0xcf30,
+    (q15_t)0x695b, (q15_t)0xcf28, (q15_t)0x6951, (q15_t)0xcf20, (q15_t)0x6948, (q15_t)0xcf18, (q15_t)0x693e, (q15_t)0xcf10,
+    (q15_t)0x6935, (q15_t)0xcf07, (q15_t)0x692b, (q15_t)0xceff, (q15_t)0x6921, (q15_t)0xcef7, (q15_t)0x6918, (q15_t)0xceef,
+    (q15_t)0x690e, (q15_t)0xcee7, (q15_t)0x6904, (q15_t)0xcedf, (q15_t)0x68fb, (q15_t)0xced7, (q15_t)0x68f1, (q15_t)0xcecf,
+    (q15_t)0x68e7, (q15_t)0xcec7, (q15_t)0x68de, (q15_t)0xcebf, (q15_t)0x68d4, (q15_t)0xceb7, (q15_t)0x68ca, (q15_t)0xceaf,
+    (q15_t)0x68c1, (q15_t)0xcea7, (q15_t)0x68b7, (q15_t)0xce9f, (q15_t)0x68ad, (q15_t)0xce97, (q15_t)0x68a4, (q15_t)0xce8f,
+    (q15_t)0x689a, (q15_t)0xce87, (q15_t)0x6890, (q15_t)0xce7f, (q15_t)0x6886, (q15_t)0xce77, (q15_t)0x687d, (q15_t)0xce6f,
+    (q15_t)0x6873, (q15_t)0xce67, (q15_t)0x6869, (q15_t)0xce5f, (q15_t)0x6860, (q15_t)0xce57, (q15_t)0x6856, (q15_t)0xce4f,
+    (q15_t)0x684c, (q15_t)0xce47, (q15_t)0x6842, (q15_t)0xce40, (q15_t)0x6838, (q15_t)0xce38, (q15_t)0x682f, (q15_t)0xce30,
+    (q15_t)0x6825, (q15_t)0xce28, (q15_t)0x681b, (q15_t)0xce20, (q15_t)0x6811, (q15_t)0xce18, (q15_t)0x6808, (q15_t)0xce10,
+    (q15_t)0x67fe, (q15_t)0xce08, (q15_t)0x67f4, (q15_t)0xce01, (q15_t)0x67ea, (q15_t)0xcdf9, (q15_t)0x67e0, (q15_t)0xcdf1,
+    (q15_t)0x67d6, (q15_t)0xcde9, (q15_t)0x67cd, (q15_t)0xcde1, (q15_t)0x67c3, (q15_t)0xcdd9, (q15_t)0x67b9, (q15_t)0xcdd2,
+    (q15_t)0x67af, (q15_t)0xcdca, (q15_t)0x67a5, (q15_t)0xcdc2, (q15_t)0x679b, (q15_t)0xcdba, (q15_t)0x6791, (q15_t)0xcdb2,
+    (q15_t)0x6788, (q15_t)0xcdab, (q15_t)0x677e, (q15_t)0xcda3, (q15_t)0x6774, (q15_t)0xcd9b, (q15_t)0x676a, (q15_t)0xcd93,
+    (q15_t)0x6760, (q15_t)0xcd8c, (q15_t)0x6756, (q15_t)0xcd84, (q15_t)0x674c, (q15_t)0xcd7c, (q15_t)0x6742, (q15_t)0xcd75,
+    (q15_t)0x6738, (q15_t)0xcd6d, (q15_t)0x672e, (q15_t)0xcd65, (q15_t)0x6724, (q15_t)0xcd5d, (q15_t)0x671a, (q15_t)0xcd56,
+    (q15_t)0x6711, (q15_t)0xcd4e, (q15_t)0x6707, (q15_t)0xcd46, (q15_t)0x66fd, (q15_t)0xcd3f, (q15_t)0x66f3, (q15_t)0xcd37,
+    (q15_t)0x66e9, (q15_t)0xcd30, (q15_t)0x66df, (q15_t)0xcd28, (q15_t)0x66d5, (q15_t)0xcd20, (q15_t)0x66cb, (q15_t)0xcd19,
+    (q15_t)0x66c1, (q15_t)0xcd11, (q15_t)0x66b7, (q15_t)0xcd09, (q15_t)0x66ad, (q15_t)0xcd02, (q15_t)0x66a3, (q15_t)0xccfa,
+    (q15_t)0x6699, (q15_t)0xccf3, (q15_t)0x668f, (q15_t)0xcceb, (q15_t)0x6685, (q15_t)0xcce3, (q15_t)0x667b, (q15_t)0xccdc,
+    (q15_t)0x6671, (q15_t)0xccd4, (q15_t)0x6666, (q15_t)0xcccd, (q15_t)0x665c, (q15_t)0xccc5, (q15_t)0x6652, (q15_t)0xccbe,
+    (q15_t)0x6648, (q15_t)0xccb6, (q15_t)0x663e, (q15_t)0xccaf, (q15_t)0x6634, (q15_t)0xcca7, (q15_t)0x662a, (q15_t)0xcca0,
+    (q15_t)0x6620, (q15_t)0xcc98, (q15_t)0x6616, (q15_t)0xcc91, (q15_t)0x660c, (q15_t)0xcc89, (q15_t)0x6602, (q15_t)0xcc82,
+    (q15_t)0x65f8, (q15_t)0xcc7a, (q15_t)0x65ed, (q15_t)0xcc73, (q15_t)0x65e3, (q15_t)0xcc6b, (q15_t)0x65d9, (q15_t)0xcc64,
+    (q15_t)0x65cf, (q15_t)0xcc5d, (q15_t)0x65c5, (q15_t)0xcc55, (q15_t)0x65bb, (q15_t)0xcc4e, (q15_t)0x65b1, (q15_t)0xcc46,
+    (q15_t)0x65a6, (q15_t)0xcc3f, (q15_t)0x659c, (q15_t)0xcc38, (q15_t)0x6592, (q15_t)0xcc30, (q15_t)0x6588, (q15_t)0xcc29,
+    (q15_t)0x657e, (q15_t)0xcc21, (q15_t)0x6574, (q15_t)0xcc1a, (q15_t)0x6569, (q15_t)0xcc13, (q15_t)0x655f, (q15_t)0xcc0b,
+    (q15_t)0x6555, (q15_t)0xcc04, (q15_t)0x654b, (q15_t)0xcbfd, (q15_t)0x6541, (q15_t)0xcbf5, (q15_t)0x6536, (q15_t)0xcbee,
+    (q15_t)0x652c, (q15_t)0xcbe7, (q15_t)0x6522, (q15_t)0xcbe0, (q15_t)0x6518, (q15_t)0xcbd8, (q15_t)0x650d, (q15_t)0xcbd1,
+    (q15_t)0x6503, (q15_t)0xcbca, (q15_t)0x64f9, (q15_t)0xcbc2, (q15_t)0x64ef, (q15_t)0xcbbb, (q15_t)0x64e4, (q15_t)0xcbb4,
+    (q15_t)0x64da, (q15_t)0xcbad, (q15_t)0x64d0, (q15_t)0xcba5, (q15_t)0x64c5, (q15_t)0xcb9e, (q15_t)0x64bb, (q15_t)0xcb97,
+    (q15_t)0x64b1, (q15_t)0xcb90, (q15_t)0x64a7, (q15_t)0xcb89, (q15_t)0x649c, (q15_t)0xcb81, (q15_t)0x6492, (q15_t)0xcb7a,
+    (q15_t)0x6488, (q15_t)0xcb73, (q15_t)0x647d, (q15_t)0xcb6c, (q15_t)0x6473, (q15_t)0xcb65, (q15_t)0x6469, (q15_t)0xcb5e,
+    (q15_t)0x645e, (q15_t)0xcb56, (q15_t)0x6454, (q15_t)0xcb4f, (q15_t)0x644a, (q15_t)0xcb48, (q15_t)0x643f, (q15_t)0xcb41,
+    (q15_t)0x6435, (q15_t)0xcb3a, (q15_t)0x642b, (q15_t)0xcb33, (q15_t)0x6420, (q15_t)0xcb2c, (q15_t)0x6416, (q15_t)0xcb25,
+    (q15_t)0x640b, (q15_t)0xcb1e, (q15_t)0x6401, (q15_t)0xcb16, (q15_t)0x63f7, (q15_t)0xcb0f, (q15_t)0x63ec, (q15_t)0xcb08,
+    (q15_t)0x63e2, (q15_t)0xcb01, (q15_t)0x63d7, (q15_t)0xcafa, (q15_t)0x63cd, (q15_t)0xcaf3, (q15_t)0x63c3, (q15_t)0xcaec,
+    (q15_t)0x63b8, (q15_t)0xcae5, (q15_t)0x63ae, (q15_t)0xcade, (q15_t)0x63a3, (q15_t)0xcad7, (q15_t)0x6399, (q15_t)0xcad0,
+    (q15_t)0x638e, (q15_t)0xcac9, (q15_t)0x6384, (q15_t)0xcac2, (q15_t)0x637a, (q15_t)0xcabb, (q15_t)0x636f, (q15_t)0xcab4,
+    (q15_t)0x6365, (q15_t)0xcaad, (q15_t)0x635a, (q15_t)0xcaa6, (q15_t)0x6350, (q15_t)0xca9f, (q15_t)0x6345, (q15_t)0xca99,
+    (q15_t)0x633b, (q15_t)0xca92, (q15_t)0x6330, (q15_t)0xca8b, (q15_t)0x6326, (q15_t)0xca84, (q15_t)0x631b, (q15_t)0xca7d,
+    (q15_t)0x6311, (q15_t)0xca76, (q15_t)0x6306, (q15_t)0xca6f, (q15_t)0x62fc, (q15_t)0xca68, (q15_t)0x62f1, (q15_t)0xca61,
+    (q15_t)0x62e7, (q15_t)0xca5b, (q15_t)0x62dc, (q15_t)0xca54, (q15_t)0x62d2, (q15_t)0xca4d, (q15_t)0x62c7, (q15_t)0xca46,
+    (q15_t)0x62bc, (q15_t)0xca3f, (q15_t)0x62b2, (q15_t)0xca38, (q15_t)0x62a7, (q15_t)0xca32, (q15_t)0x629d, (q15_t)0xca2b,
+    (q15_t)0x6292, (q15_t)0xca24, (q15_t)0x6288, (q15_t)0xca1d, (q15_t)0x627d, (q15_t)0xca16, (q15_t)0x6272, (q15_t)0xca10,
+    (q15_t)0x6268, (q15_t)0xca09, (q15_t)0x625d, (q15_t)0xca02, (q15_t)0x6253, (q15_t)0xc9fb, (q15_t)0x6248, (q15_t)0xc9f5,
+    (q15_t)0x623d, (q15_t)0xc9ee, (q15_t)0x6233, (q15_t)0xc9e7, (q15_t)0x6228, (q15_t)0xc9e0, (q15_t)0x621e, (q15_t)0xc9da,
+    (q15_t)0x6213, (q15_t)0xc9d3, (q15_t)0x6208, (q15_t)0xc9cc, (q15_t)0x61fe, (q15_t)0xc9c6, (q15_t)0x61f3, (q15_t)0xc9bf,
+    (q15_t)0x61e8, (q15_t)0xc9b8, (q15_t)0x61de, (q15_t)0xc9b2, (q15_t)0x61d3, (q15_t)0xc9ab, (q15_t)0x61c8, (q15_t)0xc9a4,
+    (q15_t)0x61be, (q15_t)0xc99e, (q15_t)0x61b3, (q15_t)0xc997, (q15_t)0x61a8, (q15_t)0xc991, (q15_t)0x619e, (q15_t)0xc98a,
+    (q15_t)0x6193, (q15_t)0xc983, (q15_t)0x6188, (q15_t)0xc97d, (q15_t)0x617d, (q15_t)0xc976, (q15_t)0x6173, (q15_t)0xc970,
+    (q15_t)0x6168, (q15_t)0xc969, (q15_t)0x615d, (q15_t)0xc963, (q15_t)0x6153, (q15_t)0xc95c, (q15_t)0x6148, (q15_t)0xc955,
+    (q15_t)0x613d, (q15_t)0xc94f, (q15_t)0x6132, (q15_t)0xc948, (q15_t)0x6128, (q15_t)0xc942, (q15_t)0x611d, (q15_t)0xc93b,
+    (q15_t)0x6112, (q15_t)0xc935, (q15_t)0x6107, (q15_t)0xc92e, (q15_t)0x60fd, (q15_t)0xc928, (q15_t)0x60f2, (q15_t)0xc921,
+    (q15_t)0x60e7, (q15_t)0xc91b, (q15_t)0x60dc, (q15_t)0xc915, (q15_t)0x60d1, (q15_t)0xc90e, (q15_t)0x60c7, (q15_t)0xc908,
+    (q15_t)0x60bc, (q15_t)0xc901, (q15_t)0x60b1, (q15_t)0xc8fb, (q15_t)0x60a6, (q15_t)0xc8f4, (q15_t)0x609b, (q15_t)0xc8ee,
+    (q15_t)0x6091, (q15_t)0xc8e8, (q15_t)0x6086, (q15_t)0xc8e1, (q15_t)0x607b, (q15_t)0xc8db, (q15_t)0x6070, (q15_t)0xc8d4,
+    (q15_t)0x6065, (q15_t)0xc8ce, (q15_t)0x605b, (q15_t)0xc8c8, (q15_t)0x6050, (q15_t)0xc8c1, (q15_t)0x6045, (q15_t)0xc8bb,
+    (q15_t)0x603a, (q15_t)0xc8b5, (q15_t)0x602f, (q15_t)0xc8ae, (q15_t)0x6024, (q15_t)0xc8a8, (q15_t)0x6019, (q15_t)0xc8a2,
+    (q15_t)0x600f, (q15_t)0xc89b, (q15_t)0x6004, (q15_t)0xc895, (q15_t)0x5ff9, (q15_t)0xc88f, (q15_t)0x5fee, (q15_t)0xc889,
+    (q15_t)0x5fe3, (q15_t)0xc882, (q15_t)0x5fd8, (q15_t)0xc87c, (q15_t)0x5fcd, (q15_t)0xc876, (q15_t)0x5fc2, (q15_t)0xc870,
+    (q15_t)0x5fb7, (q15_t)0xc869, (q15_t)0x5fac, (q15_t)0xc863, (q15_t)0x5fa2, (q15_t)0xc85d, (q15_t)0x5f97, (q15_t)0xc857,
+    (q15_t)0x5f8c, (q15_t)0xc850, (q15_t)0x5f81, (q15_t)0xc84a, (q15_t)0x5f76, (q15_t)0xc844, (q15_t)0x5f6b, (q15_t)0xc83e,
+    (q15_t)0x5f60, (q15_t)0xc838, (q15_t)0x5f55, (q15_t)0xc832, (q15_t)0x5f4a, (q15_t)0xc82b, (q15_t)0x5f3f, (q15_t)0xc825,
+    (q15_t)0x5f34, (q15_t)0xc81f, (q15_t)0x5f29, (q15_t)0xc819, (q15_t)0x5f1e, (q15_t)0xc813, (q15_t)0x5f13, (q15_t)0xc80d,
+    (q15_t)0x5f08, (q15_t)0xc807, (q15_t)0x5efd, (q15_t)0xc801, (q15_t)0x5ef2, (q15_t)0xc7fb, (q15_t)0x5ee7, (q15_t)0xc7f5,
+    (q15_t)0x5edc, (q15_t)0xc7ee, (q15_t)0x5ed1, (q15_t)0xc7e8, (q15_t)0x5ec6, (q15_t)0xc7e2, (q15_t)0x5ebb, (q15_t)0xc7dc,
+    (q15_t)0x5eb0, (q15_t)0xc7d6, (q15_t)0x5ea5, (q15_t)0xc7d0, (q15_t)0x5e9a, (q15_t)0xc7ca, (q15_t)0x5e8f, (q15_t)0xc7c4,
+    (q15_t)0x5e84, (q15_t)0xc7be, (q15_t)0x5e79, (q15_t)0xc7b8, (q15_t)0x5e6e, (q15_t)0xc7b2, (q15_t)0x5e63, (q15_t)0xc7ac,
+    (q15_t)0x5e58, (q15_t)0xc7a6, (q15_t)0x5e4d, (q15_t)0xc7a0, (q15_t)0x5e42, (q15_t)0xc79a, (q15_t)0x5e36, (q15_t)0xc795,
+    (q15_t)0x5e2b, (q15_t)0xc78f, (q15_t)0x5e20, (q15_t)0xc789, (q15_t)0x5e15, (q15_t)0xc783, (q15_t)0x5e0a, (q15_t)0xc77d,
+    (q15_t)0x5dff, (q15_t)0xc777, (q15_t)0x5df4, (q15_t)0xc771, (q15_t)0x5de9, (q15_t)0xc76b, (q15_t)0x5dde, (q15_t)0xc765,
+    (q15_t)0x5dd3, (q15_t)0xc75f, (q15_t)0x5dc7, (q15_t)0xc75a, (q15_t)0x5dbc, (q15_t)0xc754, (q15_t)0x5db1, (q15_t)0xc74e,
+    (q15_t)0x5da6, (q15_t)0xc748, (q15_t)0x5d9b, (q15_t)0xc742, (q15_t)0x5d90, (q15_t)0xc73d, (q15_t)0x5d85, (q15_t)0xc737,
+    (q15_t)0x5d79, (q15_t)0xc731, (q15_t)0x5d6e, (q15_t)0xc72b, (q15_t)0x5d63, (q15_t)0xc725, (q15_t)0x5d58, (q15_t)0xc720,
+    (q15_t)0x5d4d, (q15_t)0xc71a, (q15_t)0x5d42, (q15_t)0xc714, (q15_t)0x5d36, (q15_t)0xc70e, (q15_t)0x5d2b, (q15_t)0xc709,
+    (q15_t)0x5d20, (q15_t)0xc703, (q15_t)0x5d15, (q15_t)0xc6fd, (q15_t)0x5d0a, (q15_t)0xc6f7, (q15_t)0x5cff, (q15_t)0xc6f2,
+    (q15_t)0x5cf3, (q15_t)0xc6ec, (q15_t)0x5ce8, (q15_t)0xc6e6, (q15_t)0x5cdd, (q15_t)0xc6e1, (q15_t)0x5cd2, (q15_t)0xc6db,
+    (q15_t)0x5cc6, (q15_t)0xc6d5, (q15_t)0x5cbb, (q15_t)0xc6d0, (q15_t)0x5cb0, (q15_t)0xc6ca, (q15_t)0x5ca5, (q15_t)0xc6c5,
+    (q15_t)0x5c99, (q15_t)0xc6bf, (q15_t)0x5c8e, (q15_t)0xc6b9, (q15_t)0x5c83, (q15_t)0xc6b4, (q15_t)0x5c78, (q15_t)0xc6ae,
+    (q15_t)0x5c6c, (q15_t)0xc6a8, (q15_t)0x5c61, (q15_t)0xc6a3, (q15_t)0x5c56, (q15_t)0xc69d, (q15_t)0x5c4b, (q15_t)0xc698,
+    (q15_t)0x5c3f, (q15_t)0xc692, (q15_t)0x5c34, (q15_t)0xc68d, (q15_t)0x5c29, (q15_t)0xc687, (q15_t)0x5c1e, (q15_t)0xc682,
+    (q15_t)0x5c12, (q15_t)0xc67c, (q15_t)0x5c07, (q15_t)0xc677, (q15_t)0x5bfc, (q15_t)0xc671, (q15_t)0x5bf0, (q15_t)0xc66c,
+    (q15_t)0x5be5, (q15_t)0xc666, (q15_t)0x5bda, (q15_t)0xc661, (q15_t)0x5bce, (q15_t)0xc65b, (q15_t)0x5bc3, (q15_t)0xc656,
+    (q15_t)0x5bb8, (q15_t)0xc650, (q15_t)0x5bac, (q15_t)0xc64b, (q15_t)0x5ba1, (q15_t)0xc645, (q15_t)0x5b96, (q15_t)0xc640,
+    (q15_t)0x5b8a, (q15_t)0xc63b, (q15_t)0x5b7f, (q15_t)0xc635, (q15_t)0x5b74, (q15_t)0xc630, (q15_t)0x5b68, (q15_t)0xc62a,
+    (q15_t)0x5b5d, (q15_t)0xc625, (q15_t)0x5b52, (q15_t)0xc620, (q15_t)0x5b46, (q15_t)0xc61a, (q15_t)0x5b3b, (q15_t)0xc615,
+    (q15_t)0x5b30, (q15_t)0xc610, (q15_t)0x5b24, (q15_t)0xc60a, (q15_t)0x5b19, (q15_t)0xc605, (q15_t)0x5b0d, (q15_t)0xc600,
+    (q15_t)0x5b02, (q15_t)0xc5fa, (q15_t)0x5af7, (q15_t)0xc5f5, (q15_t)0x5aeb, (q15_t)0xc5f0, (q15_t)0x5ae0, (q15_t)0xc5ea,
+    (q15_t)0x5ad4, (q15_t)0xc5e5, (q15_t)0x5ac9, (q15_t)0xc5e0, (q15_t)0x5abe, (q15_t)0xc5db, (q15_t)0x5ab2, (q15_t)0xc5d5,
+    (q15_t)0x5aa7, (q15_t)0xc5d0, (q15_t)0x5a9b, (q15_t)0xc5cb, (q15_t)0x5a90, (q15_t)0xc5c6, (q15_t)0x5a84, (q15_t)0xc5c1,
+    (q15_t)0x5a79, (q15_t)0xc5bb, (q15_t)0x5a6e, (q15_t)0xc5b6, (q15_t)0x5a62, (q15_t)0xc5b1, (q15_t)0x5a57, (q15_t)0xc5ac,
+    (q15_t)0x5a4b, (q15_t)0xc5a7, (q15_t)0x5a40, (q15_t)0xc5a1, (q15_t)0x5a34, (q15_t)0xc59c, (q15_t)0x5a29, (q15_t)0xc597,
+    (q15_t)0x5a1d, (q15_t)0xc592, (q15_t)0x5a12, (q15_t)0xc58d, (q15_t)0x5a06, (q15_t)0xc588, (q15_t)0x59fb, (q15_t)0xc583,
+    (q15_t)0x59ef, (q15_t)0xc57e, (q15_t)0x59e4, (q15_t)0xc578, (q15_t)0x59d8, (q15_t)0xc573, (q15_t)0x59cd, (q15_t)0xc56e,
+    (q15_t)0x59c1, (q15_t)0xc569, (q15_t)0x59b6, (q15_t)0xc564, (q15_t)0x59aa, (q15_t)0xc55f, (q15_t)0x599f, (q15_t)0xc55a,
+    (q15_t)0x5993, (q15_t)0xc555, (q15_t)0x5988, (q15_t)0xc550, (q15_t)0x597c, (q15_t)0xc54b, (q15_t)0x5971, (q15_t)0xc546,
+    (q15_t)0x5965, (q15_t)0xc541, (q15_t)0x595a, (q15_t)0xc53c, (q15_t)0x594e, (q15_t)0xc537, (q15_t)0x5943, (q15_t)0xc532,
+    (q15_t)0x5937, (q15_t)0xc52d, (q15_t)0x592c, (q15_t)0xc528, (q15_t)0x5920, (q15_t)0xc523, (q15_t)0x5914, (q15_t)0xc51e,
+    (q15_t)0x5909, (q15_t)0xc51a, (q15_t)0x58fd, (q15_t)0xc515, (q15_t)0x58f2, (q15_t)0xc510, (q15_t)0x58e6, (q15_t)0xc50b,
+    (q15_t)0x58db, (q15_t)0xc506, (q15_t)0x58cf, (q15_t)0xc501, (q15_t)0x58c3, (q15_t)0xc4fc, (q15_t)0x58b8, (q15_t)0xc4f7,
+    (q15_t)0x58ac, (q15_t)0xc4f2, (q15_t)0x58a1, (q15_t)0xc4ee, (q15_t)0x5895, (q15_t)0xc4e9, (q15_t)0x5889, (q15_t)0xc4e4,
+    (q15_t)0x587e, (q15_t)0xc4df, (q15_t)0x5872, (q15_t)0xc4da, (q15_t)0x5867, (q15_t)0xc4d6, (q15_t)0x585b, (q15_t)0xc4d1,
+    (q15_t)0x584f, (q15_t)0xc4cc, (q15_t)0x5844, (q15_t)0xc4c7, (q15_t)0x5838, (q15_t)0xc4c2, (q15_t)0x582d, (q15_t)0xc4be,
+    (q15_t)0x5821, (q15_t)0xc4b9, (q15_t)0x5815, (q15_t)0xc4b4, (q15_t)0x580a, (q15_t)0xc4b0, (q15_t)0x57fe, (q15_t)0xc4ab,
+    (q15_t)0x57f2, (q15_t)0xc4a6, (q15_t)0x57e7, (q15_t)0xc4a1, (q15_t)0x57db, (q15_t)0xc49d, (q15_t)0x57cf, (q15_t)0xc498,
+    (q15_t)0x57c4, (q15_t)0xc493, (q15_t)0x57b8, (q15_t)0xc48f, (q15_t)0x57ac, (q15_t)0xc48a, (q15_t)0x57a1, (q15_t)0xc485,
+    (q15_t)0x5795, (q15_t)0xc481, (q15_t)0x5789, (q15_t)0xc47c, (q15_t)0x577e, (q15_t)0xc478, (q15_t)0x5772, (q15_t)0xc473,
+    (q15_t)0x5766, (q15_t)0xc46e, (q15_t)0x575b, (q15_t)0xc46a, (q15_t)0x574f, (q15_t)0xc465, (q15_t)0x5743, (q15_t)0xc461,
+    (q15_t)0x5737, (q15_t)0xc45c, (q15_t)0x572c, (q15_t)0xc457, (q15_t)0x5720, (q15_t)0xc453, (q15_t)0x5714, (q15_t)0xc44e,
+    (q15_t)0x5709, (q15_t)0xc44a, (q15_t)0x56fd, (q15_t)0xc445, (q15_t)0x56f1, (q15_t)0xc441, (q15_t)0x56e5, (q15_t)0xc43c,
+    (q15_t)0x56da, (q15_t)0xc438, (q15_t)0x56ce, (q15_t)0xc433, (q15_t)0x56c2, (q15_t)0xc42f, (q15_t)0x56b6, (q15_t)0xc42a,
+    (q15_t)0x56ab, (q15_t)0xc426, (q15_t)0x569f, (q15_t)0xc422, (q15_t)0x5693, (q15_t)0xc41d, (q15_t)0x5687, (q15_t)0xc419,
+    (q15_t)0x567c, (q15_t)0xc414, (q15_t)0x5670, (q15_t)0xc410, (q15_t)0x5664, (q15_t)0xc40b, (q15_t)0x5658, (q15_t)0xc407,
+    (q15_t)0x564c, (q15_t)0xc403, (q15_t)0x5641, (q15_t)0xc3fe, (q15_t)0x5635, (q15_t)0xc3fa, (q15_t)0x5629, (q15_t)0xc3f6,
+    (q15_t)0x561d, (q15_t)0xc3f1, (q15_t)0x5612, (q15_t)0xc3ed, (q15_t)0x5606, (q15_t)0xc3e9, (q15_t)0x55fa, (q15_t)0xc3e4,
+    (q15_t)0x55ee, (q15_t)0xc3e0, (q15_t)0x55e2, (q15_t)0xc3dc, (q15_t)0x55d7, (q15_t)0xc3d7, (q15_t)0x55cb, (q15_t)0xc3d3,
+    (q15_t)0x55bf, (q15_t)0xc3cf, (q15_t)0x55b3, (q15_t)0xc3ca, (q15_t)0x55a7, (q15_t)0xc3c6, (q15_t)0x559b, (q15_t)0xc3c2,
+    (q15_t)0x5590, (q15_t)0xc3be, (q15_t)0x5584, (q15_t)0xc3ba, (q15_t)0x5578, (q15_t)0xc3b5, (q15_t)0x556c, (q15_t)0xc3b1,
+    (q15_t)0x5560, (q15_t)0xc3ad, (q15_t)0x5554, (q15_t)0xc3a9, (q15_t)0x5549, (q15_t)0xc3a5, (q15_t)0x553d, (q15_t)0xc3a0,
+    (q15_t)0x5531, (q15_t)0xc39c, (q15_t)0x5525, (q15_t)0xc398, (q15_t)0x5519, (q15_t)0xc394, (q15_t)0x550d, (q15_t)0xc390,
+    (q15_t)0x5501, (q15_t)0xc38c, (q15_t)0x54f6, (q15_t)0xc387, (q15_t)0x54ea, (q15_t)0xc383, (q15_t)0x54de, (q15_t)0xc37f,
+    (q15_t)0x54d2, (q15_t)0xc37b, (q15_t)0x54c6, (q15_t)0xc377, (q15_t)0x54ba, (q15_t)0xc373, (q15_t)0x54ae, (q15_t)0xc36f,
+    (q15_t)0x54a2, (q15_t)0xc36b, (q15_t)0x5496, (q15_t)0xc367, (q15_t)0x548b, (q15_t)0xc363, (q15_t)0x547f, (q15_t)0xc35f,
+    (q15_t)0x5473, (q15_t)0xc35b, (q15_t)0x5467, (q15_t)0xc357, (q15_t)0x545b, (q15_t)0xc353, (q15_t)0x544f, (q15_t)0xc34f,
+    (q15_t)0x5443, (q15_t)0xc34b, (q15_t)0x5437, (q15_t)0xc347, (q15_t)0x542b, (q15_t)0xc343, (q15_t)0x541f, (q15_t)0xc33f,
+    (q15_t)0x5413, (q15_t)0xc33b, (q15_t)0x5407, (q15_t)0xc337, (q15_t)0x53fb, (q15_t)0xc333, (q15_t)0x53f0, (q15_t)0xc32f,
+    (q15_t)0x53e4, (q15_t)0xc32b, (q15_t)0x53d8, (q15_t)0xc327, (q15_t)0x53cc, (q15_t)0xc323, (q15_t)0x53c0, (q15_t)0xc320,
+    (q15_t)0x53b4, (q15_t)0xc31c, (q15_t)0x53a8, (q15_t)0xc318, (q15_t)0x539c, (q15_t)0xc314, (q15_t)0x5390, (q15_t)0xc310,
+    (q15_t)0x5384, (q15_t)0xc30c, (q15_t)0x5378, (q15_t)0xc308, (q15_t)0x536c, (q15_t)0xc305, (q15_t)0x5360, (q15_t)0xc301,
+    (q15_t)0x5354, (q15_t)0xc2fd, (q15_t)0x5348, (q15_t)0xc2f9, (q15_t)0x533c, (q15_t)0xc2f5, (q15_t)0x5330, (q15_t)0xc2f2,
+    (q15_t)0x5324, (q15_t)0xc2ee, (q15_t)0x5318, (q15_t)0xc2ea, (q15_t)0x530c, (q15_t)0xc2e6, (q15_t)0x5300, (q15_t)0xc2e3,
+    (q15_t)0x52f4, (q15_t)0xc2df, (q15_t)0x52e8, (q15_t)0xc2db, (q15_t)0x52dc, (q15_t)0xc2d8, (q15_t)0x52d0, (q15_t)0xc2d4,
+    (q15_t)0x52c4, (q15_t)0xc2d0, (q15_t)0x52b8, (q15_t)0xc2cc, (q15_t)0x52ac, (q15_t)0xc2c9, (q15_t)0x52a0, (q15_t)0xc2c5,
+    (q15_t)0x5294, (q15_t)0xc2c1, (q15_t)0x5288, (q15_t)0xc2be, (q15_t)0x527c, (q15_t)0xc2ba, (q15_t)0x5270, (q15_t)0xc2b7,
+    (q15_t)0x5264, (q15_t)0xc2b3, (q15_t)0x5258, (q15_t)0xc2af, (q15_t)0x524c, (q15_t)0xc2ac, (q15_t)0x5240, (q15_t)0xc2a8,
+    (q15_t)0x5234, (q15_t)0xc2a5, (q15_t)0x5228, (q15_t)0xc2a1, (q15_t)0x521c, (q15_t)0xc29d, (q15_t)0x5210, (q15_t)0xc29a,
+    (q15_t)0x5204, (q15_t)0xc296, (q15_t)0x51f7, (q15_t)0xc293, (q15_t)0x51eb, (q15_t)0xc28f, (q15_t)0x51df, (q15_t)0xc28c,
+    (q15_t)0x51d3, (q15_t)0xc288, (q15_t)0x51c7, (q15_t)0xc285, (q15_t)0x51bb, (q15_t)0xc281, (q15_t)0x51af, (q15_t)0xc27e,
+    (q15_t)0x51a3, (q15_t)0xc27a, (q15_t)0x5197, (q15_t)0xc277, (q15_t)0x518b, (q15_t)0xc273, (q15_t)0x517f, (q15_t)0xc270,
+    (q15_t)0x5173, (q15_t)0xc26d, (q15_t)0x5167, (q15_t)0xc269, (q15_t)0x515a, (q15_t)0xc266, (q15_t)0x514e, (q15_t)0xc262,
+    (q15_t)0x5142, (q15_t)0xc25f, (q15_t)0x5136, (q15_t)0xc25c, (q15_t)0x512a, (q15_t)0xc258, (q15_t)0x511e, (q15_t)0xc255,
+    (q15_t)0x5112, (q15_t)0xc251, (q15_t)0x5106, (q15_t)0xc24e, (q15_t)0x50fa, (q15_t)0xc24b, (q15_t)0x50ed, (q15_t)0xc247,
+    (q15_t)0x50e1, (q15_t)0xc244, (q15_t)0x50d5, (q15_t)0xc241, (q15_t)0x50c9, (q15_t)0xc23e, (q15_t)0x50bd, (q15_t)0xc23a,
+    (q15_t)0x50b1, (q15_t)0xc237, (q15_t)0x50a5, (q15_t)0xc234, (q15_t)0x5099, (q15_t)0xc230, (q15_t)0x508c, (q15_t)0xc22d,
+    (q15_t)0x5080, (q15_t)0xc22a, (q15_t)0x5074, (q15_t)0xc227, (q15_t)0x5068, (q15_t)0xc223, (q15_t)0x505c, (q15_t)0xc220,
+    (q15_t)0x5050, (q15_t)0xc21d, (q15_t)0x5044, (q15_t)0xc21a, (q15_t)0x5037, (q15_t)0xc217, (q15_t)0x502b, (q15_t)0xc213,
+    (q15_t)0x501f, (q15_t)0xc210, (q15_t)0x5013, (q15_t)0xc20d, (q15_t)0x5007, (q15_t)0xc20a, (q15_t)0x4ffb, (q15_t)0xc207,
+    (q15_t)0x4fee, (q15_t)0xc204, (q15_t)0x4fe2, (q15_t)0xc201, (q15_t)0x4fd6, (q15_t)0xc1fd, (q15_t)0x4fca, (q15_t)0xc1fa,
+    (q15_t)0x4fbe, (q15_t)0xc1f7, (q15_t)0x4fb2, (q15_t)0xc1f4, (q15_t)0x4fa5, (q15_t)0xc1f1, (q15_t)0x4f99, (q15_t)0xc1ee,
+    (q15_t)0x4f8d, (q15_t)0xc1eb, (q15_t)0x4f81, (q15_t)0xc1e8, (q15_t)0x4f75, (q15_t)0xc1e5, (q15_t)0x4f68, (q15_t)0xc1e2,
+    (q15_t)0x4f5c, (q15_t)0xc1df, (q15_t)0x4f50, (q15_t)0xc1dc, (q15_t)0x4f44, (q15_t)0xc1d9, (q15_t)0x4f38, (q15_t)0xc1d6,
+    (q15_t)0x4f2b, (q15_t)0xc1d3, (q15_t)0x4f1f, (q15_t)0xc1d0, (q15_t)0x4f13, (q15_t)0xc1cd, (q15_t)0x4f07, (q15_t)0xc1ca,
+    (q15_t)0x4efb, (q15_t)0xc1c7, (q15_t)0x4eee, (q15_t)0xc1c4, (q15_t)0x4ee2, (q15_t)0xc1c1, (q15_t)0x4ed6, (q15_t)0xc1be,
+    (q15_t)0x4eca, (q15_t)0xc1bb, (q15_t)0x4ebd, (q15_t)0xc1b8, (q15_t)0x4eb1, (q15_t)0xc1b6, (q15_t)0x4ea5, (q15_t)0xc1b3,
+    (q15_t)0x4e99, (q15_t)0xc1b0, (q15_t)0x4e8c, (q15_t)0xc1ad, (q15_t)0x4e80, (q15_t)0xc1aa, (q15_t)0x4e74, (q15_t)0xc1a7,
+    (q15_t)0x4e68, (q15_t)0xc1a4, (q15_t)0x4e5c, (q15_t)0xc1a2, (q15_t)0x4e4f, (q15_t)0xc19f, (q15_t)0x4e43, (q15_t)0xc19c,
+    (q15_t)0x4e37, (q15_t)0xc199, (q15_t)0x4e2b, (q15_t)0xc196, (q15_t)0x4e1e, (q15_t)0xc194, (q15_t)0x4e12, (q15_t)0xc191,
+    (q15_t)0x4e06, (q15_t)0xc18e, (q15_t)0x4df9, (q15_t)0xc18b, (q15_t)0x4ded, (q15_t)0xc189, (q15_t)0x4de1, (q15_t)0xc186,
+    (q15_t)0x4dd5, (q15_t)0xc183, (q15_t)0x4dc8, (q15_t)0xc180, (q15_t)0x4dbc, (q15_t)0xc17e, (q15_t)0x4db0, (q15_t)0xc17b,
+    (q15_t)0x4da4, (q15_t)0xc178, (q15_t)0x4d97, (q15_t)0xc176, (q15_t)0x4d8b, (q15_t)0xc173, (q15_t)0x4d7f, (q15_t)0xc170,
+    (q15_t)0x4d72, (q15_t)0xc16e, (q15_t)0x4d66, (q15_t)0xc16b, (q15_t)0x4d5a, (q15_t)0xc168, (q15_t)0x4d4e, (q15_t)0xc166,
+    (q15_t)0x4d41, (q15_t)0xc163, (q15_t)0x4d35, (q15_t)0xc161, (q15_t)0x4d29, (q15_t)0xc15e, (q15_t)0x4d1c, (q15_t)0xc15b,
+    (q15_t)0x4d10, (q15_t)0xc159, (q15_t)0x4d04, (q15_t)0xc156, (q15_t)0x4cf8, (q15_t)0xc154, (q15_t)0x4ceb, (q15_t)0xc151,
+    (q15_t)0x4cdf, (q15_t)0xc14f, (q15_t)0x4cd3, (q15_t)0xc14c, (q15_t)0x4cc6, (q15_t)0xc14a, (q15_t)0x4cba, (q15_t)0xc147,
+    (q15_t)0x4cae, (q15_t)0xc145, (q15_t)0x4ca1, (q15_t)0xc142, (q15_t)0x4c95, (q15_t)0xc140, (q15_t)0x4c89, (q15_t)0xc13d,
+    (q15_t)0x4c7c, (q15_t)0xc13b, (q15_t)0x4c70, (q15_t)0xc138, (q15_t)0x4c64, (q15_t)0xc136, (q15_t)0x4c57, (q15_t)0xc134,
+    (q15_t)0x4c4b, (q15_t)0xc131, (q15_t)0x4c3f, (q15_t)0xc12f, (q15_t)0x4c32, (q15_t)0xc12c, (q15_t)0x4c26, (q15_t)0xc12a,
+    (q15_t)0x4c1a, (q15_t)0xc128, (q15_t)0x4c0d, (q15_t)0xc125, (q15_t)0x4c01, (q15_t)0xc123, (q15_t)0x4bf5, (q15_t)0xc120,
+    (q15_t)0x4be8, (q15_t)0xc11e, (q15_t)0x4bdc, (q15_t)0xc11c, (q15_t)0x4bd0, (q15_t)0xc119, (q15_t)0x4bc3, (q15_t)0xc117,
+    (q15_t)0x4bb7, (q15_t)0xc115, (q15_t)0x4bab, (q15_t)0xc113, (q15_t)0x4b9e, (q15_t)0xc110, (q15_t)0x4b92, (q15_t)0xc10e,
+    (q15_t)0x4b85, (q15_t)0xc10c, (q15_t)0x4b79, (q15_t)0xc109, (q15_t)0x4b6d, (q15_t)0xc107, (q15_t)0x4b60, (q15_t)0xc105,
+    (q15_t)0x4b54, (q15_t)0xc103, (q15_t)0x4b48, (q15_t)0xc100, (q15_t)0x4b3b, (q15_t)0xc0fe, (q15_t)0x4b2f, (q15_t)0xc0fc,
+    (q15_t)0x4b23, (q15_t)0xc0fa, (q15_t)0x4b16, (q15_t)0xc0f8, (q15_t)0x4b0a, (q15_t)0xc0f6, (q15_t)0x4afd, (q15_t)0xc0f3,
+    (q15_t)0x4af1, (q15_t)0xc0f1, (q15_t)0x4ae5, (q15_t)0xc0ef, (q15_t)0x4ad8, (q15_t)0xc0ed, (q15_t)0x4acc, (q15_t)0xc0eb,
+    (q15_t)0x4ac0, (q15_t)0xc0e9, (q15_t)0x4ab3, (q15_t)0xc0e7, (q15_t)0x4aa7, (q15_t)0xc0e4, (q15_t)0x4a9a, (q15_t)0xc0e2,
+    (q15_t)0x4a8e, (q15_t)0xc0e0, (q15_t)0x4a82, (q15_t)0xc0de, (q15_t)0x4a75, (q15_t)0xc0dc, (q15_t)0x4a69, (q15_t)0xc0da,
+    (q15_t)0x4a5c, (q15_t)0xc0d8, (q15_t)0x4a50, (q15_t)0xc0d6, (q15_t)0x4a44, (q15_t)0xc0d4, (q15_t)0x4a37, (q15_t)0xc0d2,
+    (q15_t)0x4a2b, (q15_t)0xc0d0, (q15_t)0x4a1e, (q15_t)0xc0ce, (q15_t)0x4a12, (q15_t)0xc0cc, (q15_t)0x4a06, (q15_t)0xc0ca,
+    (q15_t)0x49f9, (q15_t)0xc0c8, (q15_t)0x49ed, (q15_t)0xc0c6, (q15_t)0x49e0, (q15_t)0xc0c4, (q15_t)0x49d4, (q15_t)0xc0c2,
+    (q15_t)0x49c7, (q15_t)0xc0c0, (q15_t)0x49bb, (q15_t)0xc0be, (q15_t)0x49af, (q15_t)0xc0bd, (q15_t)0x49a2, (q15_t)0xc0bb,
+    (q15_t)0x4996, (q15_t)0xc0b9, (q15_t)0x4989, (q15_t)0xc0b7, (q15_t)0x497d, (q15_t)0xc0b5, (q15_t)0x4970, (q15_t)0xc0b3,
+    (q15_t)0x4964, (q15_t)0xc0b1, (q15_t)0x4958, (q15_t)0xc0af, (q15_t)0x494b, (q15_t)0xc0ae, (q15_t)0x493f, (q15_t)0xc0ac,
+    (q15_t)0x4932, (q15_t)0xc0aa, (q15_t)0x4926, (q15_t)0xc0a8, (q15_t)0x4919, (q15_t)0xc0a6, (q15_t)0x490d, (q15_t)0xc0a5,
+    (q15_t)0x4901, (q15_t)0xc0a3, (q15_t)0x48f4, (q15_t)0xc0a1, (q15_t)0x48e8, (q15_t)0xc09f, (q15_t)0x48db, (q15_t)0xc09e,
+    (q15_t)0x48cf, (q15_t)0xc09c, (q15_t)0x48c2, (q15_t)0xc09a, (q15_t)0x48b6, (q15_t)0xc098, (q15_t)0x48a9, (q15_t)0xc097,
+    (q15_t)0x489d, (q15_t)0xc095, (q15_t)0x4891, (q15_t)0xc093, (q15_t)0x4884, (q15_t)0xc092, (q15_t)0x4878, (q15_t)0xc090,
+    (q15_t)0x486b, (q15_t)0xc08e, (q15_t)0x485f, (q15_t)0xc08d, (q15_t)0x4852, (q15_t)0xc08b, (q15_t)0x4846, (q15_t)0xc089,
+    (q15_t)0x4839, (q15_t)0xc088, (q15_t)0x482d, (q15_t)0xc086, (q15_t)0x4820, (q15_t)0xc085, (q15_t)0x4814, (q15_t)0xc083,
+    (q15_t)0x4807, (q15_t)0xc081, (q15_t)0x47fb, (q15_t)0xc080, (q15_t)0x47ef, (q15_t)0xc07e, (q15_t)0x47e2, (q15_t)0xc07d,
+    (q15_t)0x47d6, (q15_t)0xc07b, (q15_t)0x47c9, (q15_t)0xc07a, (q15_t)0x47bd, (q15_t)0xc078, (q15_t)0x47b0, (q15_t)0xc077,
+    (q15_t)0x47a4, (q15_t)0xc075, (q15_t)0x4797, (q15_t)0xc074, (q15_t)0x478b, (q15_t)0xc072, (q15_t)0x477e, (q15_t)0xc071,
+    (q15_t)0x4772, (q15_t)0xc06f, (q15_t)0x4765, (q15_t)0xc06e, (q15_t)0x4759, (q15_t)0xc06c, (q15_t)0x474c, (q15_t)0xc06b,
+    (q15_t)0x4740, (q15_t)0xc069, (q15_t)0x4733, (q15_t)0xc068, (q15_t)0x4727, (q15_t)0xc067, (q15_t)0x471a, (q15_t)0xc065,
+    (q15_t)0x470e, (q15_t)0xc064, (q15_t)0x4701, (q15_t)0xc062, (q15_t)0x46f5, (q15_t)0xc061, (q15_t)0x46e8, (q15_t)0xc060,
+    (q15_t)0x46dc, (q15_t)0xc05e, (q15_t)0x46cf, (q15_t)0xc05d, (q15_t)0x46c3, (q15_t)0xc05c, (q15_t)0x46b6, (q15_t)0xc05a,
+    (q15_t)0x46aa, (q15_t)0xc059, (q15_t)0x469d, (q15_t)0xc058, (q15_t)0x4691, (q15_t)0xc056, (q15_t)0x4684, (q15_t)0xc055,
+    (q15_t)0x4678, (q15_t)0xc054, (q15_t)0x466b, (q15_t)0xc053, (q15_t)0x465f, (q15_t)0xc051, (q15_t)0x4652, (q15_t)0xc050,
+    (q15_t)0x4646, (q15_t)0xc04f, (q15_t)0x4639, (q15_t)0xc04e, (q15_t)0x462d, (q15_t)0xc04c, (q15_t)0x4620, (q15_t)0xc04b,
+    (q15_t)0x4614, (q15_t)0xc04a, (q15_t)0x4607, (q15_t)0xc049, (q15_t)0x45fb, (q15_t)0xc048, (q15_t)0x45ee, (q15_t)0xc047,
+    (q15_t)0x45e2, (q15_t)0xc045, (q15_t)0x45d5, (q15_t)0xc044, (q15_t)0x45c9, (q15_t)0xc043, (q15_t)0x45bc, (q15_t)0xc042,
+    (q15_t)0x45b0, (q15_t)0xc041, (q15_t)0x45a3, (q15_t)0xc040, (q15_t)0x4597, (q15_t)0xc03f, (q15_t)0x458a, (q15_t)0xc03d,
+    (q15_t)0x457e, (q15_t)0xc03c, (q15_t)0x4571, (q15_t)0xc03b, (q15_t)0x4565, (q15_t)0xc03a, (q15_t)0x4558, (q15_t)0xc039,
+    (q15_t)0x454c, (q15_t)0xc038, (q15_t)0x453f, (q15_t)0xc037, (q15_t)0x4533, (q15_t)0xc036, (q15_t)0x4526, (q15_t)0xc035,
+    (q15_t)0x451a, (q15_t)0xc034, (q15_t)0x450d, (q15_t)0xc033, (q15_t)0x4500, (q15_t)0xc032, (q15_t)0x44f4, (q15_t)0xc031,
+    (q15_t)0x44e7, (q15_t)0xc030, (q15_t)0x44db, (q15_t)0xc02f, (q15_t)0x44ce, (q15_t)0xc02e, (q15_t)0x44c2, (q15_t)0xc02d,
+    (q15_t)0x44b5, (q15_t)0xc02c, (q15_t)0x44a9, (q15_t)0xc02b, (q15_t)0x449c, (q15_t)0xc02b, (q15_t)0x4490, (q15_t)0xc02a,
+    (q15_t)0x4483, (q15_t)0xc029, (q15_t)0x4477, (q15_t)0xc028, (q15_t)0x446a, (q15_t)0xc027, (q15_t)0x445e, (q15_t)0xc026,
+    (q15_t)0x4451, (q15_t)0xc025, (q15_t)0x4444, (q15_t)0xc024, (q15_t)0x4438, (q15_t)0xc024, (q15_t)0x442b, (q15_t)0xc023,
+    (q15_t)0x441f, (q15_t)0xc022, (q15_t)0x4412, (q15_t)0xc021, (q15_t)0x4406, (q15_t)0xc020, (q15_t)0x43f9, (q15_t)0xc020,
+    (q15_t)0x43ed, (q15_t)0xc01f, (q15_t)0x43e0, (q15_t)0xc01e, (q15_t)0x43d4, (q15_t)0xc01d, (q15_t)0x43c7, (q15_t)0xc01d,
+    (q15_t)0x43bb, (q15_t)0xc01c, (q15_t)0x43ae, (q15_t)0xc01b, (q15_t)0x43a1, (q15_t)0xc01a, (q15_t)0x4395, (q15_t)0xc01a,
+    (q15_t)0x4388, (q15_t)0xc019, (q15_t)0x437c, (q15_t)0xc018, (q15_t)0x436f, (q15_t)0xc018, (q15_t)0x4363, (q15_t)0xc017,
+    (q15_t)0x4356, (q15_t)0xc016, (q15_t)0x434a, (q15_t)0xc016, (q15_t)0x433d, (q15_t)0xc015, (q15_t)0x4330, (q15_t)0xc014,
+    (q15_t)0x4324, (q15_t)0xc014, (q15_t)0x4317, (q15_t)0xc013, (q15_t)0x430b, (q15_t)0xc013, (q15_t)0x42fe, (q15_t)0xc012,
+    (q15_t)0x42f2, (q15_t)0xc011, (q15_t)0x42e5, (q15_t)0xc011, (q15_t)0x42d9, (q15_t)0xc010, (q15_t)0x42cc, (q15_t)0xc010,
+    (q15_t)0x42c0, (q15_t)0xc00f, (q15_t)0x42b3, (q15_t)0xc00f, (q15_t)0x42a6, (q15_t)0xc00e, (q15_t)0x429a, (q15_t)0xc00e,
+    (q15_t)0x428d, (q15_t)0xc00d, (q15_t)0x4281, (q15_t)0xc00d, (q15_t)0x4274, (q15_t)0xc00c, (q15_t)0x4268, (q15_t)0xc00c,
+    (q15_t)0x425b, (q15_t)0xc00b, (q15_t)0x424e, (q15_t)0xc00b, (q15_t)0x4242, (q15_t)0xc00a, (q15_t)0x4235, (q15_t)0xc00a,
+    (q15_t)0x4229, (q15_t)0xc009, (q15_t)0x421c, (q15_t)0xc009, (q15_t)0x4210, (q15_t)0xc009, (q15_t)0x4203, (q15_t)0xc008,
+    (q15_t)0x41f7, (q15_t)0xc008, (q15_t)0x41ea, (q15_t)0xc007, (q15_t)0x41dd, (q15_t)0xc007, (q15_t)0x41d1, (q15_t)0xc007,
+    (q15_t)0x41c4, (q15_t)0xc006, (q15_t)0x41b8, (q15_t)0xc006, (q15_t)0x41ab, (q15_t)0xc006, (q15_t)0x419f, (q15_t)0xc005,
+    (q15_t)0x4192, (q15_t)0xc005, (q15_t)0x4186, (q15_t)0xc005, (q15_t)0x4179, (q15_t)0xc004, (q15_t)0x416c, (q15_t)0xc004,
+    (q15_t)0x4160, (q15_t)0xc004, (q15_t)0x4153, (q15_t)0xc004, (q15_t)0x4147, (q15_t)0xc003, (q15_t)0x413a, (q15_t)0xc003,
+    (q15_t)0x412e, (q15_t)0xc003, (q15_t)0x4121, (q15_t)0xc003, (q15_t)0x4114, (q15_t)0xc002, (q15_t)0x4108, (q15_t)0xc002,
+    (q15_t)0x40fb, (q15_t)0xc002, (q15_t)0x40ef, (q15_t)0xc002, (q15_t)0x40e2, (q15_t)0xc002, (q15_t)0x40d6, (q15_t)0xc001,
+    (q15_t)0x40c9, (q15_t)0xc001, (q15_t)0x40bc, (q15_t)0xc001, (q15_t)0x40b0, (q15_t)0xc001, (q15_t)0x40a3, (q15_t)0xc001,
+    (q15_t)0x4097, (q15_t)0xc001, (q15_t)0x408a, (q15_t)0xc001, (q15_t)0x407e, (q15_t)0xc000, (q15_t)0x4071, (q15_t)0xc000,
+    (q15_t)0x4065, (q15_t)0xc000, (q15_t)0x4058, (q15_t)0xc000, (q15_t)0x404b, (q15_t)0xc000, (q15_t)0x403f, (q15_t)0xc000,
+    (q15_t)0x4032, (q15_t)0xc000, (q15_t)0x4026, (q15_t)0xc000, (q15_t)0x4019, (q15_t)0xc000, (q15_t)0x400d, (q15_t)0xc000,
+};
+
+#endif
+/**
+  @} end of RealFFT_Table group
+ */
+
+/**
+  @ingroup DCT4_IDCT4
+ */
+
+/**
+  @addtogroup DCT4_IDCT4_Table DCT Type IV Tables
+  @{
+ */
+
+/**
+  @brief  Weights Table
+ */
+
+/**
+  @par
+  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for(i = 0; i< N; i++)
+  {
+    weights[(2*i)]   =  cos (i*c);
+    weights[(2*i)+1] = -sin (i*c);
+  } </pre>
+  @par
+  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is <code>2*N</code>.
+ */
+
+
+/**
+  @par
+  cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
+  @par
+  C command to generate the table
+  @par
+  <pre> for(i = 0; i< N; i++)
+  {
+     cos_factors[i]= 2 * cos((2*i+1)*c/2);
+  } </pre>
+  @par
+  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+*/
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+    const float32_t Weights_128[256] = {
+  1.000000000000000000f, 0.000000000000000000f, 0.999924701839144500f,  -0.012271538285719925f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999322384588349540f, -0.036807222941358832f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998118112900149180f, -0.061320736302208578f,
+  0.997290456678690210f, -0.073564563599667426f, 0.996312612182778000f, -0.085797312344439894f,
+  0.995184726672196930f, -0.098017140329560604f, 0.993906970002356060f, -0.110222207293883060f,
+  0.992479534598709970f, -0.122410675199216200f, 0.990902635427780010f, -0.134580708507126170f,
+  0.989176509964781010f, -0.146730474455361750f, 0.987301418157858430f, -0.158858143333861450f,
+  0.985277642388941220f, -0.170961888760301220f, 0.983105487431216290f, -0.183039887955140950f,
+  0.980785280403230430f, -0.195090322016128250f, 0.978317370719627650f, -0.207111376192218560f,
+  0.975702130038528570f, -0.219101240156869800f, 0.972939952205560180f, -0.231058108280671110f,
+  0.970031253194543970f, -0.242980179903263870f, 0.966976471044852070f, -0.254865659604514570f,
+  0.963776065795439840f, -0.266712757474898370f, 0.960430519415565790f, -0.278519689385053060f,
+  0.956940335732208820f, -0.290284677254462330f, 0.953306040354193860f, -0.302005949319228080f,
+  0.949528180593036670f, -0.313681740398891520f, 0.945607325380521280f, -0.325310292162262930f,
+  0.941544065183020810f, -0.336889853392220050f, 0.937339011912574960f, -0.348418680249434560f,
+  0.932992798834738960f, -0.359895036534988110f, 0.928506080473215590f, -0.371317193951837540f,
+  0.923879532511286740f, -0.382683432365089780f, 0.919113851690057770f, -0.393992040061048100f,
+  0.914209755703530690f, -0.405241314004989860f, 0.909167983090522380f, -0.416429560097637150f,
+  0.903989293123443340f, -0.427555093430282080f, 0.898674465693953820f, -0.438616238538527660f,
+  0.893224301195515320f, -0.449611329654606540f, 0.887639620402853930f, -0.460538710958240010f,
+  0.881921264348355050f, -0.471396736825997640f, 0.876070094195406600f, -0.482183772079122720f,
+  0.870086991108711460f, -0.492898192229784040f, 0.863972856121586810f, -0.503538383725717580f,
+  0.857728610000272120f, -0.514102744193221660f, 0.851355193105265200f, -0.524589682678468950f,
+  0.844853565249707120f, -0.534997619887097150f, 0.838224705554838080f, -0.545324988422046460f,
+  0.831469612302545240f, -0.555570233019602180f, 0.824589302785025290f, -0.565731810783613120f,
+  0.817584813151583710f, -0.575808191417845340f, 0.810457198252594770f, -0.585797857456438860f,
+  0.803207531480644940f, -0.595699304492433360f, 0.795836904608883570f, -0.605511041404325550f,
+  0.788346427626606340f, -0.615231590580626820f, 0.780737228572094490f, -0.624859488142386340f,
+  0.773010453362736990f, -0.634393284163645490f, 0.765167265622458960f, -0.643831542889791390f,
+  0.757208846506484570f, -0.653172842953776760f, 0.749136394523459370f, -0.662415777590171780f,
+  0.740951125354959110f, -0.671558954847018330f, 0.732654271672412820f, -0.680600997795453020f,
+  0.724247082951467000f, -0.689540544737066830f, 0.715730825283818590f, -0.698376249408972920f,
+  0.707106781186547570f, -0.707106781186547460f, 0.698376249408972920f, -0.715730825283818590f,
+  0.689540544737066940f, -0.724247082951466890f, 0.680600997795453130f, -0.732654271672412820f,
+  0.671558954847018330f, -0.740951125354959110f, 0.662415777590171780f, -0.749136394523459260f,
+  0.653172842953776760f, -0.757208846506484460f, 0.643831542889791500f, -0.765167265622458960f,
+  0.634393284163645490f, -0.773010453362736990f, 0.624859488142386450f, -0.780737228572094380f,
+  0.615231590580626820f, -0.788346427626606230f, 0.605511041404325550f, -0.795836904608883460f,
+  0.595699304492433470f, -0.803207531480644830f, 0.585797857456438860f, -0.810457198252594770f,
+  0.575808191417845340f, -0.817584813151583710f, 0.565731810783613230f, -0.824589302785025290f,
+  0.555570233019602290f, -0.831469612302545240f, 0.545324988422046460f, -0.838224705554837970f,
+  0.534997619887097260f, -0.844853565249707010f, 0.524589682678468840f, -0.851355193105265200f,
+  0.514102744193221660f, -0.857728610000272120f, 0.503538383725717580f, -0.863972856121586700f,
+  0.492898192229784090f, -0.870086991108711350f, 0.482183772079122830f, -0.876070094195406600f,
+  0.471396736825997810f, -0.881921264348354940f, 0.460538710958240010f, -0.887639620402853930f,
+  0.449611329654606600f, -0.893224301195515320f, 0.438616238538527710f, -0.898674465693953820f,
+  0.427555093430282200f, -0.903989293123443340f, 0.416429560097637320f, -0.909167983090522270f,
+  0.405241314004989860f, -0.914209755703530690f, 0.393992040061048100f, -0.919113851690057770f,
+  0.382683432365089840f, -0.923879532511286740f, 0.371317193951837600f, -0.928506080473215480f,
+  0.359895036534988280f, -0.932992798834738850f, 0.348418680249434510f, -0.937339011912574960f,
+  0.336889853392220050f, -0.941544065183020810f, 0.325310292162262980f, -0.945607325380521280f,
+  0.313681740398891570f, -0.949528180593036670f, 0.302005949319228200f, -0.953306040354193750f,
+  0.290284677254462330f, -0.956940335732208940f, 0.278519689385053060f, -0.960430519415565790f,
+  0.266712757474898420f, -0.963776065795439840f, 0.254865659604514630f, -0.966976471044852070f,
+  0.242980179903263980f, -0.970031253194543970f, 0.231058108280671280f, -0.972939952205560070f,
+  0.219101240156869770f, -0.975702130038528570f, 0.207111376192218560f, -0.978317370719627650f,
+  0.195090322016128330f, -0.980785280403230430f, 0.183039887955141060f, -0.983105487431216290f,
+  0.170961888760301360f, -0.985277642388941220f, 0.158858143333861390f, -0.987301418157858430f,
+  0.146730474455361750f, -0.989176509964781010f, 0.134580708507126220f, -0.990902635427780010f,
+  0.122410675199216280f, -0.992479534598709970f, 0.110222207293883180f, -0.993906970002356060f,
+  0.098017140329560770f, -0.995184726672196820f, 0.085797312344439880f, -0.996312612182778000f,
+  0.073564563599667454f, -0.997290456678690210f, 0.061320736302208648f, -0.998118112900149180f,
+  0.049067674327418126f, -0.998795456205172410f, 0.036807222941358991f, -0.999322384588349540f,
+  0.024541228522912264f, -0.999698818696204250f, 0.012271538285719944f, -0.999924701839144500f
+};
+
+    const float32_t cos_factors_128[128] = {
+  0.999981175282601110f, 0.999830581795823400f, 0.999529417501093140f,
+  0.999077727752645360f,
+  0.998475580573294770f, 0.997723066644191640f, 0.996820299291165670f,
+  0.995767414467659820f,
+  0.994564570734255420f, 0.993211949234794500f, 0.991709753669099530f,
+  0.990058210262297120f,
+  0.988257567730749460f, 0.986308097244598670f, 0.984210092386929030f,
+  0.981963869109555240f,
+  0.979569765685440520f, 0.977028142657754390f, 0.974339382785575860f,
+  0.971503890986251780f,
+  0.968522094274417380f, 0.965394441697689400f, 0.962121404269041580f,
+  0.958703474895871600f,
+  0.955141168305770780f, 0.951435020969008340f, 0.947585591017741090f,
+  0.943593458161960390f,
+  0.939459223602189920f, 0.935183509938947610f, 0.930766961078983710f,
+  0.926210242138311380f,
+  0.921514039342042010f, 0.916679059921042700f, 0.911706032005429880f,
+  0.906595704514915330f,
+  0.901348847046022030f, 0.895966249756185220f, 0.890448723244757880f,
+  0.884797098430937790f,
+  0.879012226428633530f, 0.873094978418290090f, 0.867046245515692650f,
+  0.860866938637767310f,
+  0.854557988365400530f, 0.848120344803297230f, 0.841554977436898440f,
+  0.834862874986380010f,
+  0.828045045257755800f, 0.821102514991104650f, 0.814036329705948410f,
+  0.806847553543799330f,
+  0.799537269107905010f, 0.792106577300212390f, 0.784556597155575240f,
+  0.776888465673232440f,
+  0.769103337645579700f, 0.761202385484261780f, 0.753186799043612520f,
+  0.745057785441466060f,
+  0.736816568877369900f, 0.728464390448225200f, 0.720002507961381650f,
+  0.711432195745216430f,
+  0.702754744457225300f, 0.693971460889654000f, 0.685083667772700360f,
+  0.676092703575316030f,
+  0.666999922303637470f, 0.657806693297078640f, 0.648514401022112550f,
+  0.639124444863775730f,
+  0.629638238914927100f, 0.620057211763289210f, 0.610382806276309480f,
+  0.600616479383868970f,
+  0.590759701858874280f, 0.580813958095764530f, 0.570780745886967370f,
+  0.560661576197336030f,
+  0.550457972936604810f, 0.540171472729892970f, 0.529803624686294830f,
+  0.519355990165589530f,
+  0.508830142543106990f, 0.498227666972781870f, 0.487550160148436050f,
+  0.476799230063322250f,
+  0.465976495767966130f, 0.455083587126343840f, 0.444122144570429260f,
+  0.433093818853152010f,
+  0.422000270799799790f, 0.410843171057903910f, 0.399624199845646790f,
+  0.388345046698826300f,
+  0.377007410216418310f, 0.365612997804773960f, 0.354163525420490510f,
+  0.342660717311994380f,
+  0.331106305759876430f, 0.319502030816015750f, 0.307849640041534980f,
+  0.296150888243623960f,
+  0.284407537211271820f, 0.272621355449948980f, 0.260794117915275570f,
+  0.248927605745720260f,
+  0.237023605994367340f, 0.225083911359792780f, 0.213110319916091360f,
+  0.201104634842091960f,
+  0.189068664149806280f, 0.177004220412148860f, 0.164913120489970090f,
+  0.152797185258443410f,
+  0.140658239332849240f, 0.128498110793793220f, 0.116318630911904880f,
+  0.104121633872054730f,
+  0.091908956497132696f, 0.079682437971430126f, 0.067443919563664106f,
+  0.055195244349690031f,
+  0.042938256934940959f, 0.030674803176636581f, 0.018406729905804820f,
+  0.006135884649154515f
+};
+
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+    const float32_t Weights_512[1024] = {
+  1.000000000000000000f,  0.000000000000000000f, 0.999995293809576190f, -0.003067956762965976f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999957644551963900f, -0.009203754782059819f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999882347454212560f, -0.015339206284988100f,
+  0.999830581795823400f, -0.018406729905804820f, 0.999769405351215280f, -0.021474080275469508f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999618822495178640f, -0.027608145778965740f,
+  0.999529417501093140f, -0.030674803176636626f, 0.999430604555461730f, -0.033741171851377580f,
+  0.999322384588349540f, -0.036807222941358832f, 0.999204758618363890f, -0.039872927587739811f,
+  0.999077727752645360f, -0.042938256934940820f, 0.998941293186856870f, -0.046003182130914623f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998640218180265270f, -0.052131704680283324f,
+  0.998475580573294770f, -0.055195244349689934f, 0.998301544933892890f, -0.058258264500435752f,
+  0.998118112900149180f, -0.061320736302208578f, 0.997925286198596000f, -0.064382630929857465f,
+  0.997723066644191640f, -0.067443919563664051f, 0.997511456140303450f, -0.070504573389613856f,
+  0.997290456678690210f, -0.073564563599667426f, 0.997060070339482960f, -0.076623861392031492f,
+  0.996820299291165670f, -0.079682437971430126f, 0.996571145790554840f, -0.082740264549375692f,
+  0.996312612182778000f, -0.085797312344439894f, 0.996044700901251970f, -0.088853552582524600f,
+  0.995767414467659820f, -0.091908956497132724f, 0.995480755491926940f, -0.094963495329638992f,
+  0.995184726672196930f, -0.098017140329560604f, 0.994879330794805620f, -0.101069862754827820f,
+  0.994564570734255420f, -0.104121633872054590f, 0.994240449453187900f, -0.107172424956808840f,
+  0.993906970002356060f, -0.110222207293883060f, 0.993564135520595300f, -0.113270952177564350f,
+  0.993211949234794500f, -0.116318630911904750f, 0.992850414459865100f, -0.119365214810991350f,
+  0.992479534598709970f, -0.122410675199216200f, 0.992099313142191800f, -0.125454983411546230f,
+  0.991709753669099530f, -0.128498110793793170f, 0.991310859846115440f, -0.131540028702883120f,
+  0.990902635427780010f, -0.134580708507126170f, 0.990485084256457090f, -0.137620121586486040f,
+  0.990058210262297120f, -0.140658239332849210f, 0.989622017463200890f, -0.143695033150294470f,
+  0.989176509964781010f, -0.146730474455361750f, 0.988721691960323780f, -0.149764534677321510f,
+  0.988257567730749460f, -0.152797185258443440f, 0.987784141644572180f, -0.155828397654265230f,
+  0.987301418157858430f, -0.158858143333861450f, 0.986809401814185530f, -0.161886393780111830f,
+  0.986308097244598670f, -0.164913120489969890f, 0.985797509167567480f, -0.167938294974731170f,
+  0.985277642388941220f, -0.170961888760301220f, 0.984748501801904210f, -0.173983873387463820f,
+  0.984210092386929030f, -0.177004220412148750f, 0.983662419211730250f, -0.180022901405699510f,
+  0.983105487431216290f, -0.183039887955140950f, 0.982539302287441240f, -0.186055151663446630f,
+  0.981963869109555240f, -0.189068664149806190f, 0.981379193313754560f, -0.192080397049892440f,
+  0.980785280403230430f, -0.195090322016128250f, 0.980182135968117430f, -0.198098410717953560f,
+  0.979569765685440520f, -0.201104634842091900f, 0.978948175319062200f, -0.204108966092816870f,
+  0.978317370719627650f, -0.207111376192218560f, 0.977677357824509930f, -0.210111836880469610f,
+  0.977028142657754390f, -0.213110319916091360f, 0.976369731330021140f, -0.216106797076219520f,
+  0.975702130038528570f, -0.219101240156869800f, 0.975025345066994120f, -0.222093620973203510f,
+  0.974339382785575860f, -0.225083911359792830f, 0.973644249650811980f, -0.228072083170885730f,
+  0.972939952205560180f, -0.231058108280671110f, 0.972226497078936270f, -0.234041958583543430f,
+  0.971503890986251780f, -0.237023605994367200f, 0.970772140728950350f, -0.240003022448741500f,
+  0.970031253194543970f, -0.242980179903263870f, 0.969281235356548530f, -0.245955050335794590f,
+  0.968522094274417380f, -0.248927605745720150f, 0.967753837093475510f, -0.251897818154216970f,
+  0.966976471044852070f, -0.254865659604514570f, 0.966190003445412500f, -0.257831102162158990f,
+  0.965394441697689400f, -0.260794117915275510f, 0.964589793289812760f, -0.263754678974831350f,
+  0.963776065795439840f, -0.266712757474898370f, 0.962953266873683880f, -0.269668325572915090f,
+  0.962121404269041580f, -0.272621355449948980f, 0.961280485811320640f, -0.275571819310958140f,
+  0.960430519415565790f, -0.278519689385053060f, 0.959571513081984520f, -0.281464937925757940f,
+  0.958703474895871600f, -0.284407537211271880f, 0.957826413027532910f, -0.287347459544729510f,
+  0.956940335732208820f, -0.290284677254462330f, 0.956045251349996410f, -0.293219162694258630f,
+  0.955141168305770780f, -0.296150888243623790f, 0.954228095109105670f, -0.299079826308040480f,
+  0.953306040354193860f, -0.302005949319228080f, 0.952375012719765880f, -0.304929229735402370f,
+  0.951435020969008340f, -0.307849640041534870f, 0.950486073949481700f, -0.310767152749611470f,
+  0.949528180593036670f, -0.313681740398891520f, 0.948561349915730270f, -0.316593375556165850f,
+  0.947585591017741090f, -0.319502030816015690f, 0.946600913083283530f, -0.322407678801069850f,
+  0.945607325380521280f, -0.325310292162262930f, 0.944604837261480260f, -0.328209843579092500f,
+  0.943593458161960390f, -0.331106305759876430f, 0.942573197601446870f, -0.333999651442009380f,
+  0.941544065183020810f, -0.336889853392220050f, 0.940506070593268300f, -0.339776884406826850f,
+  0.939459223602189920f, -0.342660717311994380f, 0.938403534063108060f, -0.345541324963989090f,
+  0.937339011912574960f, -0.348418680249434560f, 0.936265667170278260f, -0.351292756085567090f,
+  0.935183509938947610f, -0.354163525420490340f, 0.934092550404258980f, -0.357030961233429980f,
+  0.932992798834738960f, -0.359895036534988110f, 0.931884265581668150f, -0.362755724367397230f,
+  0.930766961078983710f, -0.365612997804773850f, 0.929640895843181330f, -0.368466829953372320f,
+  0.928506080473215590f, -0.371317193951837540f, 0.927362525650401110f, -0.374164062971457930f,
+  0.926210242138311380f, -0.377007410216418260f, 0.925049240782677580f, -0.379847208924051160f,
+  0.923879532511286740f, -0.382683432365089780f, 0.922701128333878630f, -0.385516053843918850f,
+  0.921514039342042010f, -0.388345046698826250f, 0.920318276709110590f, -0.391170384302253870f,
+  0.919113851690057770f, -0.393992040061048100f, 0.917900775621390500f, -0.396809987416710310f,
+  0.916679059921042700f, -0.399624199845646790f, 0.915448716088267830f, -0.402434650859418430f,
+  0.914209755703530690f, -0.405241314004989860f, 0.912962190428398210f, -0.408044162864978690f,
+  0.911706032005429880f, -0.410843171057903910f, 0.910441292258067250f, -0.413638312238434500f,
+  0.909167983090522380f, -0.416429560097637150f, 0.907886116487666260f, -0.419216888363223910f,
+  0.906595704514915330f, -0.422000270799799680f, 0.905296759318118820f, -0.424779681209108810f,
+  0.903989293123443340f, -0.427555093430282080f, 0.902673318237258830f, -0.430326481340082610f,
+  0.901348847046022030f, -0.433093818853151960f, 0.900015892016160280f, -0.435857079922255470f,
+  0.898674465693953820f, -0.438616238538527660f, 0.897324580705418320f, -0.441371268731716670f,
+  0.895966249756185220f, -0.444122144570429200f, 0.894599485631382700f, -0.446868840162374160f,
+  0.893224301195515320f, -0.449611329654606540f, 0.891840709392342720f, -0.452349587233770890f,
+  0.890448723244757880f, -0.455083587126343840f, 0.889048355854664570f, -0.457813303598877170f,
+  0.887639620402853930f, -0.460538710958240010f, 0.886222530148880640f, -0.463259783551860150f,
+  0.884797098430937790f, -0.465976495767966180f, 0.883363338665731580f, -0.468688822035827900f,
+  0.881921264348355050f, -0.471396736825997640f, 0.880470889052160750f, -0.474100214650549970f,
+  0.879012226428633530f, -0.476799230063322090f, 0.877545290207261350f, -0.479493757660153010f,
+  0.876070094195406600f, -0.482183772079122720f, 0.874586652278176110f, -0.484869248000791060f,
+  0.873094978418290090f, -0.487550160148436000f, 0.871595086655950980f, -0.490226483288291160f,
+  0.870086991108711460f, -0.492898192229784040f, 0.868570705971340900f, -0.495565261825772540f,
+  0.867046245515692650f, -0.498227666972781870f, 0.865513624090569090f, -0.500885382611240710f,
+  0.863972856121586810f, -0.503538383725717580f, 0.862423956111040610f, -0.506186645345155230f,
+  0.860866938637767310f, -0.508830142543106990f, 0.859301818357008470f, -0.511468850437970300f,
+  0.857728610000272120f, -0.514102744193221660f, 0.856147328375194470f, -0.516731799017649870f,
+  0.854557988365400530f, -0.519355990165589640f, 0.852960604930363630f, -0.521975292937154390f,
+  0.851355193105265200f, -0.524589682678468950f, 0.849741768000852550f, -0.527199134781901280f,
+  0.848120344803297230f, -0.529803624686294610f, 0.846490938774052130f, -0.532403127877197900f,
+  0.844853565249707120f, -0.534997619887097150f, 0.843208239641845440f, -0.537587076295645390f,
+  0.841554977436898440f, -0.540171472729892850f, 0.839893794195999520f, -0.542750784864515890f,
+  0.838224705554838080f, -0.545324988422046460f, 0.836547727223512010f, -0.547894059173100190f,
+  0.834862874986380010f, -0.550457972936604810f, 0.833170164701913190f, -0.553016705580027470f,
+  0.831469612302545240f, -0.555570233019602180f, 0.829761233794523050f, -0.558118531220556100f,
+  0.828045045257755800f, -0.560661576197336030f, 0.826321062845663530f, -0.563199344013834090f,
+  0.824589302785025290f, -0.565731810783613120f, 0.822849781375826430f, -0.568258952670131490f,
+  0.821102514991104650f, -0.570780745886967260f, 0.819347520076796900f, -0.573297166698042200f,
+  0.817584813151583710f, -0.575808191417845340f, 0.815814410806733780f, -0.578313796411655590f,
+  0.814036329705948410f, -0.580813958095764530f, 0.812250586585203880f, -0.583308652937698290f,
+  0.810457198252594770f, -0.585797857456438860f, 0.808656181588174980f, -0.588281548222645220f,
+  0.806847553543799330f, -0.590759701858874160f, 0.805031331142963660f, -0.593232295039799800f,
+  0.803207531480644940f, -0.595699304492433360f, 0.801376171723140240f, -0.598160706996342270f,
+  0.799537269107905010f, -0.600616479383868970f, 0.797690840943391160f, -0.603066598540348160f,
+  0.795836904608883570f, -0.605511041404325550f, 0.793975477554337170f, -0.607949784967773630f,
+  0.792106577300212390f, -0.610382806276309480f, 0.790230221437310030f, -0.612810082429409710f,
+  0.788346427626606340f, -0.615231590580626820f, 0.786455213599085770f, -0.617647307937803870f,
+  0.784556597155575240f, -0.620057211763289100f, 0.782650596166575730f, -0.622461279374149970f,
+  0.780737228572094490f, -0.624859488142386340f, 0.778816512381475980f, -0.627251815495144080f,
+  0.776888465673232440f, -0.629638238914926980f, 0.774953106594873930f, -0.632018735939809060f,
+  0.773010453362736990f, -0.634393284163645490f, 0.771060524261813820f, -0.636761861236284200f,
+  0.769103337645579700f, -0.639124444863775730f, 0.767138911935820400f, -0.641481012808583160f,
+  0.765167265622458960f, -0.643831542889791390f, 0.763188417263381270f, -0.646176012983316280f,
+  0.761202385484261780f, -0.648514401022112440f, 0.759209188978388070f, -0.650846684996380880f,
+  0.757208846506484570f, -0.653172842953776760f, 0.755201376896536550f, -0.655492852999615350f,
+  0.753186799043612520f, -0.657806693297078640f, 0.751165131909686480f, -0.660114342067420480f,
+  0.749136394523459370f, -0.662415777590171780f, 0.747100605980180130f, -0.664710978203344790f,
+  0.745057785441466060f, -0.666999922303637470f, 0.743007952135121720f, -0.669282588346636010f,
+  0.740951125354959110f, -0.671558954847018330f, 0.738887324460615110f, -0.673829000378756040f,
+  0.736816568877369900f, -0.676092703575315920f, 0.734738878095963500f, -0.678350043129861470f,
+  0.732654271672412820f, -0.680600997795453020f, 0.730562769227827590f, -0.682845546385248080f,
+  0.728464390448225200f, -0.685083667772700360f, 0.726359155084346010f, -0.687315340891759050f,
+  0.724247082951467000f, -0.689540544737066830f, 0.722128193929215350f, -0.691759258364157750f,
+  0.720002507961381650f, -0.693971460889654000f, 0.717870045055731710f, -0.696177131491462990f,
+  0.715730825283818590f, -0.698376249408972920f, 0.713584868780793640f, -0.700568793943248340f,
+  0.711432195745216430f, -0.702754744457225300f, 0.709272826438865690f, -0.704934080375904880f,
+  0.707106781186547570f, -0.707106781186547460f, 0.704934080375904990f, -0.709272826438865580f,
+  0.702754744457225300f, -0.711432195745216430f, 0.700568793943248450f, -0.713584868780793520f,
+  0.698376249408972920f, -0.715730825283818590f, 0.696177131491462990f, -0.717870045055731710f,
+  0.693971460889654000f, -0.720002507961381650f, 0.691759258364157750f, -0.722128193929215350f,
+  0.689540544737066940f, -0.724247082951466890f, 0.687315340891759160f, -0.726359155084346010f,
+  0.685083667772700360f, -0.728464390448225200f, 0.682845546385248080f, -0.730562769227827590f,
+  0.680600997795453130f, -0.732654271672412820f, 0.678350043129861580f, -0.734738878095963390f,
+  0.676092703575316030f, -0.736816568877369790f, 0.673829000378756150f, -0.738887324460615110f,
+  0.671558954847018330f, -0.740951125354959110f, 0.669282588346636010f, -0.743007952135121720f,
+  0.666999922303637470f, -0.745057785441465950f, 0.664710978203344900f, -0.747100605980180130f,
+  0.662415777590171780f, -0.749136394523459260f, 0.660114342067420480f, -0.751165131909686370f,
+  0.657806693297078640f, -0.753186799043612410f, 0.655492852999615460f, -0.755201376896536550f,
+  0.653172842953776760f, -0.757208846506484460f, 0.650846684996380990f, -0.759209188978387960f,
+  0.648514401022112550f, -0.761202385484261780f, 0.646176012983316390f, -0.763188417263381270f,
+  0.643831542889791500f, -0.765167265622458960f, 0.641481012808583160f, -0.767138911935820400f,
+  0.639124444863775730f, -0.769103337645579590f, 0.636761861236284200f, -0.771060524261813710f,
+  0.634393284163645490f, -0.773010453362736990f, 0.632018735939809060f, -0.774953106594873820f,
+  0.629638238914927100f, -0.776888465673232440f, 0.627251815495144190f, -0.778816512381475870f,
+  0.624859488142386450f, -0.780737228572094380f, 0.622461279374150080f, -0.782650596166575730f,
+  0.620057211763289210f, -0.784556597155575240f, 0.617647307937803980f, -0.786455213599085770f,
+  0.615231590580626820f, -0.788346427626606230f, 0.612810082429409710f, -0.790230221437310030f,
+  0.610382806276309480f, -0.792106577300212390f, 0.607949784967773740f, -0.793975477554337170f,
+  0.605511041404325550f, -0.795836904608883460f, 0.603066598540348280f, -0.797690840943391040f,
+  0.600616479383868970f, -0.799537269107905010f, 0.598160706996342380f, -0.801376171723140130f,
+  0.595699304492433470f, -0.803207531480644830f, 0.593232295039799800f, -0.805031331142963660f,
+  0.590759701858874280f, -0.806847553543799220f, 0.588281548222645330f, -0.808656181588174980f,
+  0.585797857456438860f, -0.810457198252594770f, 0.583308652937698290f, -0.812250586585203880f,
+  0.580813958095764530f, -0.814036329705948300f, 0.578313796411655590f, -0.815814410806733780f,
+  0.575808191417845340f, -0.817584813151583710f, 0.573297166698042320f, -0.819347520076796900f,
+  0.570780745886967370f, -0.821102514991104650f, 0.568258952670131490f, -0.822849781375826320f,
+  0.565731810783613230f, -0.824589302785025290f, 0.563199344013834090f, -0.826321062845663420f,
+  0.560661576197336030f, -0.828045045257755800f, 0.558118531220556100f, -0.829761233794523050f,
+  0.555570233019602290f, -0.831469612302545240f, 0.553016705580027580f, -0.833170164701913190f,
+  0.550457972936604810f, -0.834862874986380010f, 0.547894059173100190f, -0.836547727223511890f,
+  0.545324988422046460f, -0.838224705554837970f, 0.542750784864516000f, -0.839893794195999410f,
+  0.540171472729892970f, -0.841554977436898330f, 0.537587076295645510f, -0.843208239641845440f,
+  0.534997619887097260f, -0.844853565249707010f, 0.532403127877198010f, -0.846490938774052020f,
+  0.529803624686294830f, -0.848120344803297120f, 0.527199134781901390f, -0.849741768000852440f,
+  0.524589682678468840f, -0.851355193105265200f, 0.521975292937154390f, -0.852960604930363630f,
+  0.519355990165589530f, -0.854557988365400530f, 0.516731799017649980f, -0.856147328375194470f,
+  0.514102744193221660f, -0.857728610000272120f, 0.511468850437970520f, -0.859301818357008360f,
+  0.508830142543106990f, -0.860866938637767310f, 0.506186645345155450f, -0.862423956111040500f,
+  0.503538383725717580f, -0.863972856121586700f, 0.500885382611240940f, -0.865513624090568980f,
+  0.498227666972781870f, -0.867046245515692650f, 0.495565261825772490f, -0.868570705971340900f,
+  0.492898192229784090f, -0.870086991108711350f, 0.490226483288291100f, -0.871595086655951090f,
+  0.487550160148436050f, -0.873094978418290090f, 0.484869248000791120f, -0.874586652278176110f,
+  0.482183772079122830f, -0.876070094195406600f, 0.479493757660153010f, -0.877545290207261240f,
+  0.476799230063322250f, -0.879012226428633410f, 0.474100214650550020f, -0.880470889052160750f,
+  0.471396736825997810f, -0.881921264348354940f, 0.468688822035827960f, -0.883363338665731580f,
+  0.465976495767966130f, -0.884797098430937790f, 0.463259783551860260f, -0.886222530148880640f,
+  0.460538710958240010f, -0.887639620402853930f, 0.457813303598877290f, -0.889048355854664570f,
+  0.455083587126343840f, -0.890448723244757880f, 0.452349587233771000f, -0.891840709392342720f,
+  0.449611329654606600f, -0.893224301195515320f, 0.446868840162374330f, -0.894599485631382580f,
+  0.444122144570429260f, -0.895966249756185110f, 0.441371268731716620f, -0.897324580705418320f,
+  0.438616238538527710f, -0.898674465693953820f, 0.435857079922255470f, -0.900015892016160280f,
+  0.433093818853152010f, -0.901348847046022030f, 0.430326481340082610f, -0.902673318237258830f,
+  0.427555093430282200f, -0.903989293123443340f, 0.424779681209108810f, -0.905296759318118820f,
+  0.422000270799799790f, -0.906595704514915330f, 0.419216888363223960f, -0.907886116487666150f,
+  0.416429560097637320f, -0.909167983090522270f, 0.413638312238434560f, -0.910441292258067140f,
+  0.410843171057903910f, -0.911706032005429880f, 0.408044162864978740f, -0.912962190428398100f,
+  0.405241314004989860f, -0.914209755703530690f, 0.402434650859418540f, -0.915448716088267830f,
+  0.399624199845646790f, -0.916679059921042700f, 0.396809987416710420f, -0.917900775621390390f,
+  0.393992040061048100f, -0.919113851690057770f, 0.391170384302253980f, -0.920318276709110480f,
+  0.388345046698826300f, -0.921514039342041900f, 0.385516053843919020f, -0.922701128333878520f,
+  0.382683432365089840f, -0.923879532511286740f, 0.379847208924051110f, -0.925049240782677580f,
+  0.377007410216418310f, -0.926210242138311270f, 0.374164062971457990f, -0.927362525650401110f,
+  0.371317193951837600f, -0.928506080473215480f, 0.368466829953372320f, -0.929640895843181330f,
+  0.365612997804773960f, -0.930766961078983710f, 0.362755724367397230f, -0.931884265581668150f,
+  0.359895036534988280f, -0.932992798834738850f, 0.357030961233430030f, -0.934092550404258870f,
+  0.354163525420490510f, -0.935183509938947500f, 0.351292756085567150f, -0.936265667170278260f,
+  0.348418680249434510f, -0.937339011912574960f, 0.345541324963989150f, -0.938403534063108060f,
+  0.342660717311994380f, -0.939459223602189920f, 0.339776884406826960f, -0.940506070593268300f,
+  0.336889853392220050f, -0.941544065183020810f, 0.333999651442009490f, -0.942573197601446870f,
+  0.331106305759876430f, -0.943593458161960390f, 0.328209843579092660f, -0.944604837261480260f,
+  0.325310292162262980f, -0.945607325380521280f, 0.322407678801070020f, -0.946600913083283530f,
+  0.319502030816015750f, -0.947585591017741090f, 0.316593375556165850f, -0.948561349915730270f,
+  0.313681740398891570f, -0.949528180593036670f, 0.310767152749611470f, -0.950486073949481700f,
+  0.307849640041534980f, -0.951435020969008340f, 0.304929229735402430f, -0.952375012719765880f,
+  0.302005949319228200f, -0.953306040354193750f, 0.299079826308040480f, -0.954228095109105670f,
+  0.296150888243623960f, -0.955141168305770670f, 0.293219162694258680f, -0.956045251349996410f,
+  0.290284677254462330f, -0.956940335732208940f, 0.287347459544729570f, -0.957826413027532910f,
+  0.284407537211271820f, -0.958703474895871600f, 0.281464937925758050f, -0.959571513081984520f,
+  0.278519689385053060f, -0.960430519415565790f, 0.275571819310958250f, -0.961280485811320640f,
+  0.272621355449948980f, -0.962121404269041580f, 0.269668325572915200f, -0.962953266873683880f,
+  0.266712757474898420f, -0.963776065795439840f, 0.263754678974831510f, -0.964589793289812650f,
+  0.260794117915275570f, -0.965394441697689400f, 0.257831102162158930f, -0.966190003445412620f,
+  0.254865659604514630f, -0.966976471044852070f, 0.251897818154216910f, -0.967753837093475510f,
+  0.248927605745720260f, -0.968522094274417270f, 0.245955050335794590f, -0.969281235356548530f,
+  0.242980179903263980f, -0.970031253194543970f, 0.240003022448741500f, -0.970772140728950350f,
+  0.237023605994367340f, -0.971503890986251780f, 0.234041958583543460f, -0.972226497078936270f,
+  0.231058108280671280f, -0.972939952205560070f, 0.228072083170885790f, -0.973644249650811870f,
+  0.225083911359792780f, -0.974339382785575860f, 0.222093620973203590f, -0.975025345066994120f,
+  0.219101240156869770f, -0.975702130038528570f, 0.216106797076219600f, -0.976369731330021140f,
+  0.213110319916091360f, -0.977028142657754390f, 0.210111836880469720f, -0.977677357824509930f,
+  0.207111376192218560f, -0.978317370719627650f, 0.204108966092817010f, -0.978948175319062200f,
+  0.201104634842091960f, -0.979569765685440520f, 0.198098410717953730f, -0.980182135968117320f,
+  0.195090322016128330f, -0.980785280403230430f, 0.192080397049892380f, -0.981379193313754560f,
+  0.189068664149806280f, -0.981963869109555240f, 0.186055151663446630f, -0.982539302287441240f,
+  0.183039887955141060f, -0.983105487431216290f, 0.180022901405699510f, -0.983662419211730250f,
+  0.177004220412148860f, -0.984210092386929030f, 0.173983873387463850f, -0.984748501801904210f,
+  0.170961888760301360f, -0.985277642388941220f, 0.167938294974731230f, -0.985797509167567370f,
+  0.164913120489970090f, -0.986308097244598670f, 0.161886393780111910f, -0.986809401814185420f,
+  0.158858143333861390f, -0.987301418157858430f, 0.155828397654265320f, -0.987784141644572180f,
+  0.152797185258443410f, -0.988257567730749460f, 0.149764534677321620f, -0.988721691960323780f,
+  0.146730474455361750f, -0.989176509964781010f, 0.143695033150294580f, -0.989622017463200780f,
+  0.140658239332849240f, -0.990058210262297120f, 0.137620121586486180f, -0.990485084256456980f,
+  0.134580708507126220f, -0.990902635427780010f, 0.131540028702883280f, -0.991310859846115440f,
+  0.128498110793793220f, -0.991709753669099530f, 0.125454983411546210f, -0.992099313142191800f,
+  0.122410675199216280f, -0.992479534598709970f, 0.119365214810991350f, -0.992850414459865100f,
+  0.116318630911904880f, -0.993211949234794500f, 0.113270952177564360f, -0.993564135520595300f,
+  0.110222207293883180f, -0.993906970002356060f, 0.107172424956808870f, -0.994240449453187900f,
+  0.104121633872054730f, -0.994564570734255420f, 0.101069862754827880f, -0.994879330794805620f,
+  0.098017140329560770f, -0.995184726672196820f, 0.094963495329639061f, -0.995480755491926940f,
+  0.091908956497132696f, -0.995767414467659820f, 0.088853552582524684f, -0.996044700901251970f,
+  0.085797312344439880f, -0.996312612182778000f, 0.082740264549375803f, -0.996571145790554840f,
+  0.079682437971430126f, -0.996820299291165670f, 0.076623861392031617f, -0.997060070339482960f,
+  0.073564563599667454f, -0.997290456678690210f, 0.070504573389614009f, -0.997511456140303450f,
+  0.067443919563664106f, -0.997723066644191640f, 0.064382630929857410f, -0.997925286198596000f,
+  0.061320736302208648f, -0.998118112900149180f, 0.058258264500435732f, -0.998301544933892890f,
+  0.055195244349690031f, -0.998475580573294770f, 0.052131704680283317f, -0.998640218180265270f,
+  0.049067674327418126f, -0.998795456205172410f, 0.046003182130914644f, -0.998941293186856870f,
+  0.042938256934940959f, -0.999077727752645360f, 0.039872927587739845f, -0.999204758618363890f,
+  0.036807222941358991f, -0.999322384588349540f, 0.033741171851377642f, -0.999430604555461730f,
+  0.030674803176636581f, -0.999529417501093140f, 0.027608145778965820f, -0.999618822495178640f,
+  0.024541228522912264f, -0.999698818696204250f, 0.021474080275469605f, -0.999769405351215280f,
+  0.018406729905804820f, -0.999830581795823400f, 0.015339206284988220f, -0.999882347454212560f,
+  0.012271538285719944f, -0.999924701839144500f, 0.009203754782059960f, -0.999957644551963900f,
+  0.006135884649154515f, -0.999981175282601110f, 0.003067956762966138f, -0.999995293809576190f
+};
+
+    const float32_t cos_factors_512[512] = {
+  0.999998823451701880f, 0.999989411081928400f, 0.999970586430974140f,
+  0.999942349676023910f,
+  0.999904701082852900f, 0.999857641005823860f, 0.999801169887884260f,
+  0.999735288260561680f,
+  0.999659996743959220f, 0.999575296046749220f, 0.999481186966166950f,
+  0.999377670388002850f,
+  0.999264747286594420f, 0.999142418724816910f, 0.999010685854073380f,
+  0.998869549914283560f,
+  0.998719012233872940f, 0.998559074229759310f, 0.998389737407340160f,
+  0.998211003360478190f,
+  0.998022873771486240f, 0.997825350411111640f, 0.997618435138519550f,
+  0.997402129901275300f,
+  0.997176436735326190f, 0.996941357764982160f, 0.996696895202896060f,
+  0.996443051350042630f,
+  0.996179828595696980f, 0.995907229417411720f, 0.995625256380994310f,
+  0.995333912140482280f,
+  0.995033199438118630f, 0.994723121104325700f, 0.994403680057679100f,
+  0.994074879304879370f,
+  0.993736721940724600f, 0.993389211148080650f, 0.993032350197851410f,
+  0.992666142448948020f,
+  0.992290591348257370f, 0.991905700430609330f, 0.991511473318743900f,
+  0.991107913723276890f,
+  0.990695025442664630f, 0.990272812363169110f, 0.989841278458820530f,
+  0.989400427791380380f,
+  0.988950264510302990f, 0.988490792852696590f, 0.988022017143283530f,
+  0.987543941794359230f,
+  0.987056571305750970f, 0.986559910264775410f, 0.986053963346195440f,
+  0.985538735312176060f,
+  0.985014231012239840f, 0.984480455383220930f, 0.983937413449218920f,
+  0.983385110321551180f,
+  0.982823551198705240f, 0.982252741366289370f, 0.981672686196983110f,
+  0.981083391150486710f,
+  0.980484861773469380f, 0.979877103699517640f, 0.979260122649082020f,
+  0.978633924429423210f,
+  0.977998514934557140f, 0.977353900145199960f, 0.976700086128711840f,
+  0.976037079039039020f,
+  0.975364885116656980f, 0.974683510688510670f, 0.973992962167955830f,
+  0.973293246054698250f,
+  0.972584368934732210f, 0.971866337480279400f, 0.971139158449725090f,
+  0.970402838687555500f,
+  0.969657385124292450f, 0.968902804776428870f, 0.968139104746362440f,
+  0.967366292222328510f,
+  0.966584374478333120f, 0.965793358874083680f, 0.964993252854920320f,
+  0.964184063951745830f,
+  0.963365799780954050f, 0.962538468044359160f, 0.961702076529122540f,
+  0.960856633107679660f,
+  0.960002145737665960f, 0.959138622461841890f, 0.958266071408017670f,
+  0.957384500788975860f,
+  0.956493918902395100f, 0.955594334130771110f, 0.954685754941338340f,
+  0.953768189885990330f,
+  0.952841647601198720f, 0.951906136807932350f, 0.950961666311575080f,
+  0.950008245001843000f,
+  0.949045881852700560f, 0.948074585922276230f, 0.947094366352777220f,
+  0.946105232370403450f,
+  0.945107193285260610f, 0.944100258491272660f, 0.943084437466093490f,
+  0.942059739771017310f,
+  0.941026175050889260f, 0.939983753034014050f, 0.938932483532064600f,
+  0.937872376439989890f,
+  0.936803441735921560f, 0.935725689481080370f, 0.934639129819680780f,
+  0.933543772978836170f,
+  0.932439629268462360f, 0.931326709081180430f, 0.930205022892219070f,
+  0.929074581259315860f,
+  0.927935394822617890f, 0.926787474304581750f, 0.925630830509872720f,
+  0.924465474325262600f,
+  0.923291416719527640f, 0.922108668743345180f, 0.920917241529189520f,
+  0.919717146291227360f,
+  0.918508394325212250f, 0.917290997008377910f, 0.916064965799331720f,
+  0.914830312237946200f,
+  0.913587047945250810f, 0.912335184623322750f, 0.911074734055176360f,
+  0.909805708104652220f,
+  0.908528118716306120f, 0.907241977915295820f, 0.905947297807268460f,
+  0.904644090578246240f,
+  0.903332368494511820f, 0.902012143902493180f, 0.900683429228646970f,
+  0.899346236979341570f,
+  0.898000579740739880f, 0.896646470178680150f, 0.895283921038557580f,
+  0.893912945145203250f,
+  0.892533555402764580f, 0.891145764794583180f, 0.889749586383072780f,
+  0.888345033309596350f,
+  0.886932118794342190f, 0.885510856136199950f, 0.884081258712634990f,
+  0.882643339979562790f,
+  0.881197113471222090f, 0.879742592800047410f, 0.878279791656541580f,
+  0.876808723809145650f,
+  0.875329403104110890f, 0.873841843465366860f, 0.872346058894391540f,
+  0.870842063470078980f,
+  0.869329871348606840f, 0.867809496763303320f, 0.866280954024512990f,
+  0.864744257519462380f,
+  0.863199421712124160f, 0.861646461143081300f, 0.860085390429390140f,
+  0.858516224264442740f,
+  0.856938977417828760f, 0.855353664735196030f, 0.853760301138111410f,
+  0.852158901623919830f,
+  0.850549481265603480f, 0.848932055211639610f, 0.847306638685858320f,
+  0.845673246987299070f,
+  0.844031895490066410f, 0.842382599643185850f, 0.840725374970458070f,
+  0.839060237070312740f,
+  0.837387201615661940f, 0.835706284353752600f, 0.834017501106018130f,
+  0.832320867767929680f,
+  0.830616400308846310f, 0.828904114771864870f, 0.827184027273669130f,
+  0.825456154004377550f,
+  0.823720511227391430f, 0.821977115279241550f, 0.820225982569434690f,
+  0.818467129580298660f,
+  0.816700572866827850f, 0.814926329056526620f, 0.813144414849253590f,
+  0.811354847017063730f,
+  0.809557642404051260f, 0.807752817926190360f, 0.805940390571176280f,
+  0.804120377398265810f,
+  0.802292795538115720f, 0.800457662192622820f, 0.798614994634760820f,
+  0.796764810208418830f,
+  0.794907126328237010f, 0.793041960479443640f, 0.791169330217690200f,
+  0.789289253168885650f,
+  0.787401747029031430f, 0.785506829564053930f, 0.783604518609638200f,
+  0.781694832071059390f,
+  0.779777787923014550f, 0.777853404209453150f, 0.775921699043407690f,
+  0.773982690606822900f,
+  0.772036397150384520f, 0.770082836993347900f, 0.768122028523365420f,
+  0.766153990196312920f,
+  0.764178740536116670f, 0.762196298134578900f, 0.760206681651202420f,
+  0.758209909813015280f,
+  0.756206001414394540f, 0.754194975316889170f, 0.752176850449042810f,
+  0.750151645806215070f,
+  0.748119380450403600f, 0.746080073510063780f, 0.744033744179929290f,
+  0.741980411720831070f,
+  0.739920095459516200f, 0.737852814788465980f, 0.735778589165713590f,
+  0.733697438114660370f,
+  0.731609381223892630f, 0.729514438146997010f, 0.727412628602375770f,
+  0.725303972373060770f,
+  0.723188489306527460f, 0.721066199314508110f, 0.718937122372804490f,
+  0.716801278521099540f,
+  0.714658687862769090f, 0.712509370564692320f, 0.710353346857062420f,
+  0.708190637033195400f,
+  0.706021261449339740f, 0.703845240524484940f, 0.701662594740168570f,
+  0.699473344640283770f,
+  0.697277510830886630f, 0.695075113980000880f, 0.692866174817424740f,
+  0.690650714134534720f,
+  0.688428752784090550f, 0.686200311680038700f, 0.683965411797315510f,
+  0.681724074171649820f,
+  0.679476319899365080f, 0.677222170137180450f, 0.674961646102012040f,
+  0.672694769070772970f,
+  0.670421560380173090f, 0.668142041426518560f, 0.665856233665509720f,
+  0.663564158612039880f,
+  0.661265837839992270f, 0.658961292982037320f, 0.656650545729429050f,
+  0.654333617831800550f,
+  0.652010531096959500f, 0.649681307390683190f, 0.647345968636512060f,
+  0.645004536815544040f,
+  0.642657033966226860f, 0.640303482184151670f, 0.637943903621844170f,
+  0.635578320488556230f,
+  0.633206755050057190f, 0.630829229628424470f, 0.628445766601832710f,
+  0.626056388404343520f,
+  0.623661117525694640f, 0.621259976511087660f, 0.618852987960976320f,
+  0.616440174530853650f,
+  0.614021558931038490f, 0.611597163926462020f, 0.609167012336453210f,
+  0.606731127034524480f,
+  0.604289530948156070f, 0.601842247058580030f, 0.599389298400564540f,
+  0.596930708062196500f,
+  0.594466499184664540f, 0.591996694962040990f, 0.589521318641063940f,
+  0.587040393520918080f,
+  0.584553942953015330f, 0.582061990340775550f, 0.579564559139405740f,
+  0.577061672855679550f,
+  0.574553355047715760f, 0.572039629324757050f, 0.569520519346947250f,
+  0.566996048825108680f,
+  0.564466241520519500f, 0.561931121244689470f, 0.559390711859136140f,
+  0.556845037275160100f,
+  0.554294121453620110f, 0.551737988404707450f, 0.549176662187719770f,
+  0.546610166910834860f,
+  0.544038526730883930f, 0.541461765853123560f, 0.538879908531008420f,
+  0.536292979065963180f,
+  0.533701001807152960f, 0.531104001151255000f, 0.528502001542228480f,
+  0.525895027471084740f,
+  0.523283103475656430f, 0.520666254140367270f, 0.518044504095999340f,
+  0.515417878019463150f,
+  0.512786400633563070f, 0.510150096706766700f, 0.507508991052970870f,
+  0.504863108531267480f,
+  0.502212474045710900f, 0.499557112545081890f, 0.496897049022654640f,
+  0.494232308515959730f,
+  0.491562916106550060f, 0.488888896919763230f, 0.486210276124486530f,
+  0.483527078932918740f,
+  0.480839330600333900f, 0.478147056424843120f, 0.475450281747155870f,
+  0.472749031950342900f,
+  0.470043332459595620f, 0.467333208741988530f, 0.464618686306237820f,
+  0.461899790702462840f,
+  0.459176547521944150f, 0.456448982396883860f, 0.453717121000163930f,
+  0.450980989045103810f,
+  0.448240612285220000f, 0.445496016513981740f, 0.442747227564570130f,
+  0.439994271309633260f,
+  0.437237173661044200f, 0.434475960569655710f, 0.431710658025057370f,
+  0.428941292055329550f,
+  0.426167888726799620f, 0.423390474143796100f, 0.420609074448402510f,
+  0.417823715820212380f,
+  0.415034424476081630f, 0.412241226669883000f, 0.409444148692257590f,
+  0.406643216870369140f,
+  0.403838457567654130f, 0.401029897183575790f, 0.398217562153373620f,
+  0.395401478947816300f,
+  0.392581674072951530f, 0.389758174069856410f, 0.386931005514388690f,
+  0.384100195016935040f,
+  0.381265769222162490f, 0.378427754808765620f, 0.375586178489217330f,
+  0.372741067009515810f,
+  0.369892447148934270f, 0.367040345719767240f, 0.364184789567079840f,
+  0.361325805568454340f,
+  0.358463420633736540f, 0.355597661704783960f, 0.352728555755210730f,
+  0.349856129790135030f,
+  0.346980410845923680f, 0.344101425989938980f, 0.341219202320282410f,
+  0.338333766965541290f,
+  0.335445147084531660f, 0.332553369866044220f, 0.329658462528587550f,
+  0.326760452320131790f,
+  0.323859366517852960f, 0.320955232427875210f, 0.318048077385015060f,
+  0.315137928752522440f,
+  0.312224813921825050f, 0.309308760312268780f, 0.306389795370861080f,
+  0.303467946572011370f,
+  0.300543241417273400f, 0.297615707435086310f, 0.294685372180514330f,
+  0.291752263234989370f,
+  0.288816408206049480f, 0.285877834727080730f, 0.282936570457055390f,
+  0.279992643080273380f,
+  0.277046080306099950f, 0.274096909868706330f, 0.271145159526808070f,
+  0.268190857063403180f,
+  0.265234030285511900f, 0.262274707023913590f, 0.259312915132886350f,
+  0.256348682489942910f,
+  0.253382036995570270f, 0.250413006572965280f, 0.247441619167773440f,
+  0.244467902747824210f,
+  0.241491885302869300f, 0.238513594844318500f, 0.235533059404975460f,
+  0.232550307038775330f,
+  0.229565365820518870f, 0.226578263845610110f, 0.223589029229790020f,
+  0.220597690108873650f,
+  0.217604274638483670f, 0.214608810993786920f, 0.211611327369227610f,
+  0.208611851978263460f,
+  0.205610413053099320f, 0.202607038844421110f, 0.199601757621131050f,
+  0.196594597670080220f,
+  0.193585587295803750f, 0.190574754820252800f, 0.187562128582529740f,
+  0.184547736938619640f,
+  0.181531608261125130f, 0.178513770938997590f, 0.175494253377271400f,
+  0.172473083996796030f,
+  0.169450291233967930f, 0.166425903540464220f, 0.163399949382973230f,
+  0.160372457242928400f,
+  0.157343455616238280f, 0.154312973013020240f, 0.151281037957330250f,
+  0.148247678986896200f,
+  0.145212924652847520f, 0.142176803519448000f, 0.139139344163826280f,
+  0.136100575175706200f,
+  0.133060525157139180f, 0.130019222722233350f, 0.126976696496885980f,
+  0.123932975118512200f,
+  0.120888087235777220f, 0.117842061508325020f, 0.114794926606510250f,
+  0.111746711211126660f,
+  0.108697444013138670f, 0.105647153713410700f, 0.102595869022436280f,
+  0.099543618660069444f,
+  0.096490431355252607f, 0.093436335845747912f, 0.090381360877865011f,
+  0.087325535206192226f,
+  0.084268887593324127f, 0.081211446809592386f, 0.078153241632794315f,
+  0.075094300847921291f,
+  0.072034653246889416f, 0.068974327628266732f, 0.065913352797003930f,
+  0.062851757564161420f,
+  0.059789570746640007f, 0.056726821166907783f, 0.053663537652730679f,
+  0.050599749036899337f,
+  0.047535484156959261f, 0.044470771854938744f, 0.041405640977076712f,
+  0.038340120373552791f,
+  0.035274238898213947f, 0.032208025408304704f, 0.029141508764193740f,
+  0.026074717829104040f,
+  0.023007681468839410f, 0.019940428551514598f, 0.016872987947281773f,
+  0.013805388528060349f,
+  0.010737659167264572f, 0.007669828739531077f, 0.004601926120448672f,
+  0.001533980186284766f
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+    const float32_t Weights_2048[4096] = {
+  1.000000000000000000f, 0.000000000000000000f, 0.999999705862882230f,  -0.000766990318742704f,
+  0.999998823451701880f, -0.001533980186284766f, 0.999997352766978210f,  -0.002300969151425805f,
+  0.999995293809576190f, -0.003067956762965976f, 0.999992646580707190f,  -0.003834942569706228f,
+  0.999989411081928400f, -0.004601926120448571f, 0.999985587315143200f,  -0.005368906963996343f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999976174986897610f,  -0.006902858724729756f,
+  0.999970586430974140f, -0.007669828739531097f, 0.999964409618118280f,  -0.008436794242369799f,
+  0.999957644551963900f, -0.009203754782059819f, 0.999950291236490480f,  -0.009970709907418031f,
+  0.999942349676023910f, -0.010737659167264491f, 0.999933819875236000f,  -0.011504602110422714f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999914995573113470f,  -0.013038467241987334f,
+  0.999904701082852900f, -0.013805388528060391f, 0.999893818374418490f,  -0.014572301692779064f,
+  0.999882347454212560f, -0.015339206284988100f, 0.999870288328982950f,  -0.016106101853537287f,
+  0.999857641005823860f, -0.016872987947281710f, 0.999844405492175240f,  -0.017639864115082053f,
+  0.999830581795823400f, -0.018406729905804820f, 0.999816169924900410f,  -0.019173584868322623f,
+  0.999801169887884260f, -0.019940428551514441f, 0.999785581693599210f,  -0.020707260504265895f,
+  0.999769405351215280f, -0.021474080275469508f, 0.999752640870248840f,  -0.022240887414024961f,
+  0.999735288260561680f, -0.023007681468839369f, 0.999717347532362190f,  -0.023774461988827555f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999679701762987930f,  -0.025307980620024571f,
+  0.999659996743959220f, -0.026074717829103901f, 0.999639703650710200f,  -0.026841439699098531f,
+  0.999618822495178640f, -0.027608145778965740f, 0.999597353289648380f,  -0.028374835617672099f,
+  0.999575296046749220f, -0.029141508764193722f, 0.999552650779456990f,  -0.029908164767516555f,
+  0.999529417501093140f, -0.030674803176636626f, 0.999505596225325310f,  -0.031441423540560301f,
+  0.999481186966166950f, -0.032208025408304586f, 0.999456189737977340f,  -0.032974608328897335f,
+  0.999430604555461730f, -0.033741171851377580f, 0.999404431433671300f,  -0.034507715524795750f,
+  0.999377670388002850f, -0.035274238898213947f, 0.999350321434199440f,  -0.036040741520706229f,
+  0.999322384588349540f, -0.036807222941358832f, 0.999293859866887790f,  -0.037573682709270494f,
+  0.999264747286594420f, -0.038340120373552694f, 0.999235046864595850f,  -0.039106535483329888f,
+  0.999204758618363890f, -0.039872927587739811f, 0.999173882565716380f,  -0.040639296235933736f,
+  0.999142418724816910f, -0.041405640977076739f, 0.999110367114174890f,  -0.042171961360347947f,
+  0.999077727752645360f, -0.042938256934940820f, 0.999044500659429290f,  -0.043704527250063421f,
+  0.999010685854073380f, -0.044470771854938668f, 0.998976283356469820f,  -0.045236990298804590f,
+  0.998941293186856870f, -0.046003182130914623f, 0.998905715365818290f,  -0.046769346900537863f,
+  0.998869549914283560f, -0.047535484156959303f, 0.998832796853527990f,  -0.048301593449480144f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998757527991183340f,  -0.049833726340107277f,
+  0.998719012233872940f, -0.050599749036899282f, 0.998679908955899090f,  -0.051365741967162593f,
+  0.998640218180265270f, -0.052131704680283324f, 0.998599939930320370f,  -0.052897636725665324f,
+  0.998559074229759310f, -0.053663537652730520f, 0.998517621102622210f,  -0.054429407010919133f,
+  0.998475580573294770f, -0.055195244349689934f, 0.998432952666508440f,  -0.055961049218520569f,
+  0.998389737407340160f, -0.056726821166907748f, 0.998345934821212370f,  -0.057492559744367566f,
+  0.998301544933892890f, -0.058258264500435752f, 0.998256567771495180f,  -0.059023934984667931f,
+  0.998211003360478190f, -0.059789570746639868f, 0.998164851727646240f,  -0.060555171335947788f,
+  0.998118112900149180f, -0.061320736302208578f, 0.998070786905482340f,  -0.062086265195060088f,
+  0.998022873771486240f, -0.062851757564161406f, 0.997974373526346990f,  -0.063617212959193106f,
+  0.997925286198596000f, -0.064382630929857465f, 0.997875611817110150f,  -0.065148011025878833f,
+  0.997825350411111640f, -0.065913352797003805f, 0.997774502010167820f,  -0.066678655793001557f,
+  0.997723066644191640f, -0.067443919563664051f, 0.997671044343441000f,  -0.068209143658806329f,
+  0.997618435138519550f, -0.068974327628266746f, 0.997565239060375750f,  -0.069739471021907307f,
+  0.997511456140303450f, -0.070504573389613856f, 0.997457086409941910f,  -0.071269634281296401f,
+  0.997402129901275300f, -0.072034653246889332f, 0.997346586646633230f,  -0.072799629836351673f,
+  0.997290456678690210f, -0.073564563599667426f, 0.997233740030466280f,  -0.074329454086845756f,
+  0.997176436735326190f, -0.075094300847921305f, 0.997118546826979980f,  -0.075859103432954447f,
+  0.997060070339482960f, -0.076623861392031492f, 0.997001007307235290f,  -0.077388574275265049f,
+  0.996941357764982160f, -0.078153241632794232f, 0.996881121747813850f,  -0.078917863014784942f,
+  0.996820299291165670f, -0.079682437971430126f, 0.996758890430818000f,  -0.080446966052950014f,
+  0.996696895202896060f, -0.081211446809592441f, 0.996634313643869900f,  -0.081975879791633066f,
+  0.996571145790554840f, -0.082740264549375692f, 0.996507391680110820f,  -0.083504600633152432f,
+  0.996443051350042630f, -0.084268887593324071f, 0.996378124838200210f,  -0.085033124980280275f,
+  0.996312612182778000f, -0.085797312344439894f, 0.996246513422315520f,  -0.086561449236251170f,
+  0.996179828595696980f, -0.087325535206192059f, 0.996112557742151130f,  -0.088089569804770507f,
+  0.996044700901251970f, -0.088853552582524600f, 0.995976258112917790f,  -0.089617483090022959f,
+  0.995907229417411720f, -0.090381360877864983f, 0.995837614855341610f,  -0.091145185496681005f,
+  0.995767414467659820f, -0.091908956497132724f, 0.995696628295663520f,  -0.092672673429913310f,
+  0.995625256380994310f, -0.093436335845747787f, 0.995553298765638470f,  -0.094199943295393204f,
+  0.995480755491926940f, -0.094963495329638992f, 0.995407626602534900f,  -0.095726991499307162f,
+  0.995333912140482280f, -0.096490431355252593f, 0.995259612149133390f,  -0.097253814448363271f,
+  0.995184726672196930f, -0.098017140329560604f, 0.995109255753726110f,  -0.098780408549799623f,
+  0.995033199438118630f, -0.099543618660069319f, 0.994956557770116380f,  -0.100306770211392860f,
+  0.994879330794805620f, -0.101069862754827820f, 0.994801518557617110f,  -0.101832895841466530f,
+  0.994723121104325700f, -0.102595869022436280f, 0.994644138481050710f,  -0.103358781848899610f,
+  0.994564570734255420f, -0.104121633872054590f, 0.994484417910747600f,  -0.104884424643134970f,
+  0.994403680057679100f, -0.105647153713410620f, 0.994322357222545810f,  -0.106409820634187680f,
+  0.994240449453187900f, -0.107172424956808840f, 0.994157956797789730f,  -0.107934966232653650f,
+  0.994074879304879370f, -0.108697444013138720f, 0.993991217023329380f,  -0.109459857849717980f,
+  0.993906970002356060f, -0.110222207293883060f, 0.993822138291519660f,  -0.110984491897163390f,
+  0.993736721940724600f, -0.111746711211126590f, 0.993650721000219120f,  -0.112508864787378690f,
+  0.993564135520595300f, -0.113270952177564350f, 0.993476965552789190f,  -0.114032972933367200f,
+  0.993389211148080650f, -0.114794926606510080f, 0.993300872358093280f,  -0.115556812748755260f,
+  0.993211949234794500f, -0.116318630911904750f, 0.993122441830495580f,  -0.117080380647800590f,
+  0.993032350197851410f, -0.117842061508324980f, 0.992941674389860470f,  -0.118603673045400720f,
+  0.992850414459865100f, -0.119365214810991350f, 0.992758570461551140f,  -0.120126686357101500f,
+  0.992666142448948020f, -0.120888087235777080f, 0.992573130476428810f,  -0.121649416999105530f,
+  0.992479534598709970f, -0.122410675199216200f, 0.992385354870851670f,  -0.123171861388280480f,
+  0.992290591348257370f, -0.123932975118512160f, 0.992195244086673920f,  -0.124694015942167640f,
+  0.992099313142191800f, -0.125454983411546230f, 0.992002798571244520f,  -0.126215877078990350f,
+  0.991905700430609330f, -0.126976696496885870f, 0.991808018777406430f,  -0.127737441217662310f,
+  0.991709753669099530f, -0.128498110793793170f, 0.991610905163495370f,  -0.129258704777796140f,
+  0.991511473318743900f, -0.130019222722233350f, 0.991411458193338540f,  -0.130779664179711710f,
+  0.991310859846115440f, -0.131540028702883120f, 0.991209678336254060f,  -0.132300315844444650f,
+  0.991107913723276890f, -0.133060525157139060f, 0.991005566067049370f,  -0.133820656193754720f,
+  0.990902635427780010f, -0.134580708507126170f, 0.990799121866020370f,  -0.135340681650134210f,
+  0.990695025442664630f, -0.136100575175706200f, 0.990590346218950150f,  -0.136860388636816380f,
+  0.990485084256457090f, -0.137620121586486040f, 0.990379239617108160f,  -0.138379773577783890f,
+  0.990272812363169110f, -0.139139344163826200f, 0.990165802557248400f,  -0.139898832897777210f,
+  0.990058210262297120f, -0.140658239332849210f, 0.989950035541608990f,  -0.141417563022303020f,
+  0.989841278458820530f, -0.142176803519448030f, 0.989731939077910570f,  -0.142935960377642670f,
+  0.989622017463200890f, -0.143695033150294470f, 0.989511513679355190f,  -0.144454021390860470f,
+  0.989400427791380380f, -0.145212924652847460f, 0.989288759864625170f,  -0.145971742489812210f,
+  0.989176509964781010f, -0.146730474455361750f, 0.989063678157881540f,  -0.147489120103153570f,
+  0.988950264510302990f, -0.148247678986896030f, 0.988836269088763540f,  -0.149006150660348450f,
+  0.988721691960323780f, -0.149764534677321510f, 0.988606533192386450f,  -0.150522830591677400f,
+  0.988490792852696590f, -0.151281037957330220f, 0.988374471009341280f,  -0.152039156328246050f,
+  0.988257567730749460f, -0.152797185258443440f, 0.988140083085692570f,  -0.153555124301993450f,
+  0.988022017143283530f, -0.154312973013020100f, 0.987903369972977790f,  -0.155070730945700510f,
+  0.987784141644572180f, -0.155828397654265230f, 0.987664332228205710f,  -0.156585972692998430f,
+  0.987543941794359230f, -0.157343455616238250f, 0.987422970413855410f,  -0.158100845978376980f,
+  0.987301418157858430f, -0.158858143333861450f, 0.987179285097874340f,  -0.159615347237193060f,
+  0.987056571305750970f, -0.160372457242928280f, 0.986933276853677710f,  -0.161129472905678810f,
+  0.986809401814185530f, -0.161886393780111830f, 0.986684946260146690f,  -0.162643219420950310f,
+  0.986559910264775410f, -0.163399949382973230f, 0.986434293901627180f,  -0.164156583221015810f,
+  0.986308097244598670f, -0.164913120489969890f, 0.986181320367928270f,  -0.165669560744784120f,
+  0.986053963346195440f, -0.166425903540464100f, 0.985926026254321130f,  -0.167182148432072940f,
+  0.985797509167567480f, -0.167938294974731170f, 0.985668412161537550f,  -0.168694342723617330f,
+  0.985538735312176060f, -0.169450291233967960f, 0.985408478695768420f,  -0.170206140061078070f,
+  0.985277642388941220f, -0.170961888760301220f, 0.985146226468662230f,  -0.171717536887049970f,
+  0.985014231012239840f, -0.172473083996795950f, 0.984881656097323700f,  -0.173228529645070320f,
+  0.984748501801904210f, -0.173983873387463820f, 0.984614768204312600f,  -0.174739114779627200f,
+  0.984480455383220930f, -0.175494253377271430f, 0.984345563417641900f,  -0.176249288736167880f,
+  0.984210092386929030f, -0.177004220412148750f, 0.984074042370776450f,  -0.177759047961107170f,
+  0.983937413449218920f, -0.178513770938997510f, 0.983800205702631600f,  -0.179268388901835750f,
+  0.983662419211730250f, -0.180022901405699510f, 0.983524054057571260f,  -0.180777308006728590f,
+  0.983385110321551180f, -0.181531608261124970f, 0.983245588085407070f,  -0.182285801725153300f,
+  0.983105487431216290f, -0.183039887955140950f, 0.982964808441396440f,  -0.183793866507478450f,
+  0.982823551198705240f, -0.184547736938619620f, 0.982681715786240860f,  -0.185301498805081900f,
+  0.982539302287441240f, -0.186055151663446630f, 0.982396310786084690f,  -0.186808695070359270f,
+  0.982252741366289370f, -0.187562128582529600f, 0.982108594112513610f,  -0.188315451756732120f,
+  0.981963869109555240f, -0.189068664149806190f, 0.981818566442552500f,  -0.189821765318656410f,
+  0.981672686196983110f, -0.190574754820252740f, 0.981526228458664770f,  -0.191327632211630900f,
+  0.981379193313754560f, -0.192080397049892440f, 0.981231580848749730f,  -0.192833048892205230f,
+  0.981083391150486710f, -0.193585587295803610f, 0.980934624306141640f,  -0.194338011817988600f,
+  0.980785280403230430f, -0.195090322016128250f, 0.980635359529608120f,  -0.195842517447657850f,
+  0.980484861773469380f, -0.196594597670080220f, 0.980333787223347960f,  -0.197346562240965920f,
+  0.980182135968117430f, -0.198098410717953560f, 0.980029908096990090f,  -0.198850142658750090f,
+  0.979877103699517640f, -0.199601757621130970f, 0.979723722865591170f,  -0.200353255162940450f,
+  0.979569765685440520f, -0.201104634842091900f, 0.979415232249634780f,  -0.201855896216568050f,
+  0.979260122649082020f, -0.202607038844421130f, 0.979104436975029250f,  -0.203358062283773320f,
+  0.978948175319062200f, -0.204108966092816870f, 0.978791337773105670f,  -0.204859749829814420f,
+  0.978633924429423210f, -0.205610413053099240f, 0.978475935380616830f,  -0.206360955321075510f,
+  0.978317370719627650f, -0.207111376192218560f, 0.978158230539735050f,  -0.207861675225075070f,
+  0.977998514934557140f, -0.208611851978263490f, 0.977838223998050430f,  -0.209361906010474160f,
+  0.977677357824509930f, -0.210111836880469610f, 0.977515916508569280f,  -0.210861644147084860f,
+  0.977353900145199960f, -0.211611327369227550f, 0.977191308829712280f,  -0.212360886105878420f,
+  0.977028142657754390f, -0.213110319916091360f, 0.976864401725312640f,  -0.213859628358993750f,
+  0.976700086128711840f, -0.214608810993786760f, 0.976535195964614470f,  -0.215357867379745550f,
+  0.976369731330021140f, -0.216106797076219520f, 0.976203692322270560f,  -0.216855599642632620f,
+  0.976037079039039020f, -0.217604274638483640f, 0.975869891578341030f,  -0.218352821623346320f,
+  0.975702130038528570f, -0.219101240156869800f, 0.975533794518291360f,  -0.219849529798778700f,
+  0.975364885116656980f, -0.220597690108873510f, 0.975195401932990370f,  -0.221345720647030810f,
+  0.975025345066994120f, -0.222093620973203510f, 0.974854714618708430f,  -0.222841390647421120f,
+  0.974683510688510670f, -0.223589029229789990f, 0.974511733377115720f,  -0.224336536280493600f,
+  0.974339382785575860f, -0.225083911359792830f, 0.974166459015280320f,  -0.225831154028026170f,
+  0.973992962167955830f, -0.226578263845610000f, 0.973818892345666100f,  -0.227325240373038860f,
+  0.973644249650811980f, -0.228072083170885730f, 0.973469034186131070f,  -0.228818791799802220f,
+  0.973293246054698250f, -0.229565365820518870f, 0.973116885359925130f,  -0.230311804793845440f,
+  0.972939952205560180f, -0.231058108280671110f, 0.972762446695688570f,  -0.231804275841964780f,
+  0.972584368934732210f, -0.232550307038775240f, 0.972405719027449770f,  -0.233296201432231590f,
+  0.972226497078936270f, -0.234041958583543430f, 0.972046703194623500f,  -0.234787578054000970f,
+  0.971866337480279400f, -0.235533059404975490f, 0.971685400042008540f,  -0.236278402197919570f,
+  0.971503890986251780f, -0.237023605994367200f, 0.971321810419786160f,  -0.237768670355934190f,
+  0.971139158449725090f, -0.238513594844318420f, 0.970955935183517970f,  -0.239258379021299980f,
+  0.970772140728950350f, -0.240003022448741500f, 0.970587775194143630f,  -0.240747524688588430f,
+  0.970402838687555500f, -0.241491885302869330f, 0.970217331317979160f,  -0.242236103853696010f,
+  0.970031253194543970f, -0.242980179903263870f, 0.969844604426714830f,  -0.243724113013852160f,
+  0.969657385124292450f, -0.244467902747824150f, 0.969469595397413060f,  -0.245211548667627540f,
+  0.969281235356548530f, -0.245955050335794590f, 0.969092305112506210f,  -0.246698407314942410f,
+  0.968902804776428870f, -0.247441619167773270f, 0.968712734459794780f,  -0.248184685457074780f,
+  0.968522094274417380f, -0.248927605745720150f, 0.968330884332445190f,  -0.249670379596668570f,
+  0.968139104746362440f, -0.250413006572965220f, 0.967946755628987800f,  -0.251155486237741920f,
+  0.967753837093475510f, -0.251897818154216970f, 0.967560349253314360f,  -0.252640001885695520f,
+  0.967366292222328510f, -0.253382036995570160f, 0.967171666114676640f,  -0.254123923047320620f,
+  0.966976471044852070f, -0.254865659604514570f, 0.966780707127683270f,  -0.255607246230807380f,
+  0.966584374478333120f, -0.256348682489942910f, 0.966387473212298900f,  -0.257089967945753120f,
+  0.966190003445412500f, -0.257831102162158990f, 0.965991965293840570f,
+  -0.258572084703170340f,
+  0.965793358874083680f, -0.259312915132886230f, 0.965594184302976830f,
+  -0.260053593015495190f,
+  0.965394441697689400f, -0.260794117915275510f, 0.965194131175724720f,
+  -0.261534489396595520f,
+  0.964993252854920320f, -0.262274707023913590f, 0.964791806853447900f,
+  -0.263014770361779000f,
+  0.964589793289812760f, -0.263754678974831350f, 0.964387212282854290f,
+  -0.264494432427801630f,
+  0.964184063951745830f, -0.265234030285511790f, 0.963980348415994110f,
+  -0.265973472112875590f,
+  0.963776065795439840f, -0.266712757474898370f, 0.963571216210257320f,
+  -0.267451885936677620f,
+  0.963365799780954050f, -0.268190857063403180f, 0.963159816628371360f,
+  -0.268929670420357260f,
+  0.962953266873683880f, -0.269668325572915090f, 0.962746150638399410f,
+  -0.270406822086544820f,
+  0.962538468044359160f, -0.271145159526808010f, 0.962330219213737400f,
+  -0.271883337459359720f,
+  0.962121404269041580f, -0.272621355449948980f, 0.961912023333112210f,
+  -0.273359213064418680f,
+  0.961702076529122540f, -0.274096909868706380f, 0.961491563980579000f,
+  -0.274834445428843940f,
+  0.961280485811320640f, -0.275571819310958140f, 0.961068842145519350f,
+  -0.276309031081271080f,
+  0.960856633107679660f, -0.277046080306099900f, 0.960643858822638590f,
+  -0.277782966551857690f,
+  0.960430519415565790f, -0.278519689385053060f, 0.960216615011963430f,
+  -0.279256248372291180f,
+  0.960002145737665960f, -0.279992643080273220f, 0.959787111718839900f,
+  -0.280728873075797190f,
+  0.959571513081984520f, -0.281464937925757940f, 0.959355349953930790f,
+  -0.282200837197147560f,
+  0.959138622461841890f, -0.282936570457055390f, 0.958921330733213170f,
+  -0.283672137272668430f,
+  0.958703474895871600f, -0.284407537211271880f, 0.958485055077976100f,
+  -0.285142769840248670f,
+  0.958266071408017670f, -0.285877834727080620f, 0.958046524014818600f,
+  -0.286612731439347790f,
+  0.957826413027532910f, -0.287347459544729510f, 0.957605738575646350f,
+  -0.288082018611004130f,
+  0.957384500788975860f, -0.288816408206049480f, 0.957162699797670210f,
+  -0.289550627897843030f,
+  0.956940335732208820f, -0.290284677254462330f, 0.956717408723403050f,
+  -0.291018555844085090f,
+  0.956493918902395100f, -0.291752263234989260f, 0.956269866400658030f,
+  -0.292485798995553880f,
+  0.956045251349996410f, -0.293219162694258630f, 0.955820073882545420f,
+  -0.293952353899684660f,
+  0.955594334130771110f, -0.294685372180514330f, 0.955368032227470350f,
+  -0.295418217105532010f,
+  0.955141168305770780f, -0.296150888243623790f, 0.954913742499130520f,
+  -0.296883385163778270f,
+  0.954685754941338340f, -0.297615707435086200f, 0.954457205766513490f,
+  -0.298347854626741400f,
+  0.954228095109105670f, -0.299079826308040480f, 0.953998423103894490f,
+  -0.299811622048383350f,
+  0.953768189885990330f, -0.300543241417273450f, 0.953537395590833280f,
+  -0.301274683984317950f,
+  0.953306040354193860f, -0.302005949319228080f, 0.953074124312172200f,
+  -0.302737036991819140f,
+  0.952841647601198720f, -0.303467946572011320f, 0.952608610358033350f,
+  -0.304198677629829110f,
+  0.952375012719765880f, -0.304929229735402370f, 0.952140854823815830f,
+  -0.305659602458966120f,
+  0.951906136807932350f, -0.306389795370860920f, 0.951670858810193860f,
+  -0.307119808041533100f,
+  0.951435020969008340f, -0.307849640041534870f, 0.951198623423113230f,
+  -0.308579290941525090f,
+  0.950961666311575080f, -0.309308760312268730f, 0.950724149773789610f,
+  -0.310038047724637890f,
+  0.950486073949481700f, -0.310767152749611470f, 0.950247438978705230f,
+  -0.311496074958275910f,
+  0.950008245001843000f, -0.312224813921824880f, 0.949768492159606680f,
+  -0.312953369211560200f,
+  0.949528180593036670f, -0.313681740398891520f, 0.949287310443502120f,
+  -0.314409927055336660f,
+  0.949045881852700560f, -0.315137928752522440f, 0.948803894962658490f,
+  -0.315865745062183960f,
+  0.948561349915730270f, -0.316593375556165850f, 0.948318246854599090f,
+  -0.317320819806421740f,
+  0.948074585922276230f, -0.318048077385014950f, 0.947830367262101010f,
+  -0.318775147864118480f,
+  0.947585591017741090f, -0.319502030816015690f, 0.947340257333192050f,
+  -0.320228725813099860f,
+  0.947094366352777220f, -0.320955232427875210f, 0.946847918221148000f,
+  -0.321681550232956580f,
+  0.946600913083283530f, -0.322407678801069850f, 0.946353351084490590f,
+  -0.323133617705052330f,
+  0.946105232370403450f, -0.323859366517852850f, 0.945856557086983910f,
+  -0.324584924812532150f,
+  0.945607325380521280f, -0.325310292162262930f, 0.945357537397632290f,
+  -0.326035468140330240f,
+  0.945107193285260610f, -0.326760452320131730f, 0.944856293190677210f,
+  -0.327485244275178000f,
+  0.944604837261480260f, -0.328209843579092500f, 0.944352825645594750f,
+  -0.328934249805612200f,
+  0.944100258491272660f, -0.329658462528587490f, 0.943847135947092690f,
+  -0.330382481321982780f,
+  0.943593458161960390f, -0.331106305759876430f, 0.943339225285107720f,
+  -0.331829935416461110f,
+  0.943084437466093490f, -0.332553369866044220f, 0.942829094854802710f,
+  -0.333276608683047930f,
+  0.942573197601446870f, -0.333999651442009380f, 0.942316745856563780f,
+  -0.334722497717581220f,
+  0.942059739771017310f, -0.335445147084531600f, 0.941802179495997650f,
+  -0.336167599117744520f,
+  0.941544065183020810f, -0.336889853392220050f, 0.941285396983928660f,
+  -0.337611909483074620f,
+  0.941026175050889260f, -0.338333766965541130f, 0.940766399536396070f,
+  -0.339055425414969640f,
+  0.940506070593268300f, -0.339776884406826850f, 0.940245188374650880f,
+  -0.340498143516697160f,
+  0.939983753034014050f, -0.341219202320282360f, 0.939721764725153340f,
+  -0.341940060393402190f,
+  0.939459223602189920f, -0.342660717311994380f, 0.939196129819569900f,
+  -0.343381172652115040f,
+  0.938932483532064600f, -0.344101425989938810f, 0.938668284894770170f,
+  -0.344821476901759290f,
+  0.938403534063108060f, -0.345541324963989090f, 0.938138231192824360f,
+  -0.346260969753160010f,
+  0.937872376439989890f, -0.346980410845923680f, 0.937605969960999990f,
+  -0.347699647819051380f,
+  0.937339011912574960f, -0.348418680249434560f, 0.937071502451759190f,
+  -0.349137507714084970f,
+  0.936803441735921560f, -0.349856129790134920f, 0.936534829922755500f,
+  -0.350574546054837510f,
+  0.936265667170278260f, -0.351292756085567090f, 0.935995953636831410f,
+  -0.352010759459819080f,
+  0.935725689481080370f, -0.352728555755210730f, 0.935454874862014620f,
+  -0.353446144549480810f,
+  0.935183509938947610f, -0.354163525420490340f, 0.934911594871516090f,
+  -0.354880697946222790f,
+  0.934639129819680780f, -0.355597661704783850f, 0.934366114943725790f,
+  -0.356314416274402410f,
+  0.934092550404258980f, -0.357030961233429980f, 0.933818436362210960f,
+  -0.357747296160341900f,
+  0.933543772978836170f, -0.358463420633736540f, 0.933268560415712050f,
+  -0.359179334232336500f,
+  0.932992798834738960f, -0.359895036534988110f, 0.932716488398140250f,
+  -0.360610527120662270f,
+  0.932439629268462360f, -0.361325805568454280f, 0.932162221608574430f,
+  -0.362040871457584180f,
+  0.931884265581668150f, -0.362755724367397230f, 0.931605761351257830f,
+  -0.363470363877363760f,
+  0.931326709081180430f, -0.364184789567079890f, 0.931047108935595280f,
+  -0.364899001016267320f,
+  0.930766961078983710f, -0.365612997804773850f, 0.930486265676149780f,
+  -0.366326779512573590f,
+  0.930205022892219070f, -0.367040345719767180f, 0.929923232892639670f,
+  -0.367753696006581980f,
+  0.929640895843181330f, -0.368466829953372320f, 0.929358011909935500f,
+  -0.369179747140620020f,
+  0.929074581259315860f, -0.369892447148934100f, 0.928790604058057020f,
+  -0.370604929559051670f,
+  0.928506080473215590f, -0.371317193951837540f, 0.928221010672169440f,
+  -0.372029239908285010f,
+  0.927935394822617890f, -0.372741067009515760f, 0.927649233092581180f,
+  -0.373452674836780300f,
+  0.927362525650401110f, -0.374164062971457930f, 0.927075272664740100f,
+  -0.374875230995057540f,
+  0.926787474304581750f, -0.375586178489217220f, 0.926499130739230510f,
+  -0.376296905035704790f,
+  0.926210242138311380f, -0.377007410216418260f, 0.925920808671770070f,
+  -0.377717693613385640f,
+  0.925630830509872720f, -0.378427754808765560f, 0.925340307823206310f,
+  -0.379137593384847320f,
+  0.925049240782677580f, -0.379847208924051160f, 0.924757629559513910f,
+  -0.380556601008928520f,
+  0.924465474325262600f, -0.381265769222162380f, 0.924172775251791200f,
+  -0.381974713146567220f,
+  0.923879532511286740f, -0.382683432365089780f, 0.923585746276256670f,
+  -0.383391926460808660f,
+  0.923291416719527640f, -0.384100195016935040f, 0.922996544014246250f,
+  -0.384808237616812880f,
+  0.922701128333878630f, -0.385516053843918850f, 0.922405169852209880f,
+  -0.386223643281862980f,
+  0.922108668743345180f, -0.386931005514388580f, 0.921811625181708120f,
+  -0.387638140125372730f,
+  0.921514039342042010f, -0.388345046698826250f, 0.921215911399408730f,
+  -0.389051724818894380f,
+  0.920917241529189520f, -0.389758174069856410f, 0.920618029907083970f,
+  -0.390464394036126590f,
+  0.920318276709110590f, -0.391170384302253870f, 0.920017982111606570f,
+  -0.391876144452922350f,
+  0.919717146291227360f, -0.392581674072951470f, 0.919415769424947070f,
+  -0.393286972747296400f,
+  0.919113851690057770f, -0.393992040061048100f, 0.918811393264170050f,
+  -0.394696875599433560f,
+  0.918508394325212250f, -0.395401478947816350f, 0.918204855051430900f,
+  -0.396105849691696270f,
+  0.917900775621390500f, -0.396809987416710310f, 0.917596156213972950f,
+  -0.397513891708632330f,
+  0.917290997008377910f, -0.398217562153373560f, 0.916985298184123000f,
+  -0.398920998336982910f,
+  0.916679059921042700f, -0.399624199845646790f, 0.916372282399289140f,
+  -0.400327166265690090f,
+  0.916064965799331720f, -0.401029897183575620f, 0.915757110301956720f,
+  -0.401732392185905010f,
+  0.915448716088267830f, -0.402434650859418430f, 0.915139783339685260f,
+  -0.403136672790995300f,
+  0.914830312237946200f, -0.403838457567654070f, 0.914520302965104450f,
+  -0.404540004776553000f,
+  0.914209755703530690f, -0.405241314004989860f, 0.913898670635911680f,
+  -0.405942384840402510f,
+  0.913587047945250810f, -0.406643216870369030f, 0.913274887814867760f,
+  -0.407343809682607970f,
+  0.912962190428398210f, -0.408044162864978690f, 0.912648955969793900f,
+  -0.408744276005481360f,
+  0.912335184623322750f, -0.409444148692257590f, 0.912020876573568340f,
+  -0.410143780513590240f,
+  0.911706032005429880f, -0.410843171057903910f, 0.911390651104122430f,
+  -0.411542319913765220f,
+  0.911074734055176360f, -0.412241226669882890f, 0.910758281044437570f,
+  -0.412939890915108080f,
+  0.910441292258067250f, -0.413638312238434500f, 0.910123767882541680f,
+  -0.414336490228999100f,
+  0.909805708104652220f, -0.415034424476081630f, 0.909487113111505430f,
+  -0.415732114569105360f,
+  0.909167983090522380f, -0.416429560097637150f, 0.908848318229439120f,
+  -0.417126760651387870f,
+  0.908528118716306120f, -0.417823715820212270f, 0.908207384739488700f,
+  -0.418520425194109700f,
+  0.907886116487666260f, -0.419216888363223910f, 0.907564314149832630f,
+  -0.419913104917843620f,
+  0.907241977915295820f, -0.420609074448402510f, 0.906919107973678140f,
+  -0.421304796545479640f,
+  0.906595704514915330f, -0.422000270799799680f, 0.906271767729257660f,
+  -0.422695496802232950f,
+  0.905947297807268460f, -0.423390474143796050f, 0.905622294939825270f,
+  -0.424085202415651560f,
+  0.905296759318118820f, -0.424779681209108810f, 0.904970691133653250f,
+  -0.425473910115623800f,
+  0.904644090578246240f, -0.426167888726799620f, 0.904316957844028320f,
+  -0.426861616634386430f,
+  0.903989293123443340f, -0.427555093430282080f, 0.903661096609247980f,
+  -0.428248318706531960f,
+  0.903332368494511820f, -0.428941292055329490f, 0.903003108972617150f,
+  -0.429634013069016380f,
+  0.902673318237258830f, -0.430326481340082610f, 0.902342996482444200f,
+  -0.431018696461167030f,
+  0.902012143902493180f, -0.431710658025057260f, 0.901680760692037730f,
+  -0.432402365624690140f,
+  0.901348847046022030f, -0.433093818853151960f, 0.901016403159702330f,
+  -0.433785017303678520f,
+  0.900683429228646970f, -0.434475960569655650f, 0.900349925448735600f,
+  -0.435166648244619260f,
+  0.900015892016160280f, -0.435857079922255470f, 0.899681329127423930f,
+  -0.436547255196401200f,
+  0.899346236979341570f, -0.437237173661044090f, 0.899010615769039070f,
+  -0.437926834910322860f,
+  0.898674465693953820f, -0.438616238538527660f, 0.898337786951834310f,
+  -0.439305384140099950f,
+  0.898000579740739880f, -0.439994271309633260f, 0.897662844259040860f,
+  -0.440682899641872900f,
+  0.897324580705418320f, -0.441371268731716670f, 0.896985789278863970f,
+  -0.442059378174214700f,
+  0.896646470178680150f, -0.442747227564570020f, 0.896306623604479550f,
+  -0.443434816498138480f,
+  0.895966249756185220f, -0.444122144570429200f, 0.895625348834030110f,
+  -0.444809211377104880f,
+  0.895283921038557580f, -0.445496016513981740f, 0.894941966570620750f,
+  -0.446182559577030070f,
+  0.894599485631382700f, -0.446868840162374160f, 0.894256478422316040f,
+  -0.447554857866293010f,
+  0.893912945145203250f, -0.448240612285219890f, 0.893568886002135910f,
+  -0.448926103015743260f,
+  0.893224301195515320f, -0.449611329654606540f, 0.892879190928051680f,
+  -0.450296291798708610f,
+  0.892533555402764580f, -0.450980989045103860f, 0.892187394822982480f,
+  -0.451665420991002490f,
+  0.891840709392342720f, -0.452349587233770890f, 0.891493499314791380f,
+  -0.453033487370931580f,
+  0.891145764794583180f, -0.453717121000163870f, 0.890797506036281490f,
+  -0.454400487719303580f,
+  0.890448723244757880f, -0.455083587126343840f, 0.890099416625192320f,
+  -0.455766418819434640f,
+  0.889749586383072780f, -0.456448982396883920f, 0.889399232724195520f,
+  -0.457131277457156980f,
+  0.889048355854664570f, -0.457813303598877170f, 0.888696955980891600f,
+  -0.458495060420826270f,
+  0.888345033309596350f, -0.459176547521944090f, 0.887992588047805560f,
+  -0.459857764501329540f,
+  0.887639620402853930f, -0.460538710958240010f, 0.887286130582383150f,
+  -0.461219386492092380f,
+  0.886932118794342190f, -0.461899790702462730f, 0.886577585246987040f,
+  -0.462579923189086810f,
+  0.886222530148880640f, -0.463259783551860150f, 0.885866953708892790f,
+  -0.463939371390838520f,
+  0.885510856136199950f, -0.464618686306237820f, 0.885154237640285110f,
+  -0.465297727898434600f,
+  0.884797098430937790f, -0.465976495767966180f, 0.884439438718253810f,
+  -0.466654989515530920f,
+  0.884081258712634990f, -0.467333208741988420f, 0.883722558624789660f,
+  -0.468011153048359830f,
+  0.883363338665731580f, -0.468688822035827900f, 0.883003599046780830f,
+  -0.469366215305737520f,
+  0.882643339979562790f, -0.470043332459595620f, 0.882282561676008710f,
+  -0.470720173099071600f,
+  0.881921264348355050f, -0.471396736825997640f, 0.881559448209143780f,
+  -0.472073023242368660f,
+  0.881197113471222090f, -0.472749031950342790f, 0.880834260347742040f,
+  -0.473424762552241530f,
+  0.880470889052160750f, -0.474100214650549970f, 0.880106999798240360f,
+  -0.474775387847917120f,
+  0.879742592800047410f, -0.475450281747155870f, 0.879377668271953290f,
+  -0.476124895951243580f,
+  0.879012226428633530f, -0.476799230063322090f, 0.878646267485068130f,
+  -0.477473283686698060f,
+  0.878279791656541580f, -0.478147056424843010f, 0.877912799158641840f,
+  -0.478820547881393890f,
+  0.877545290207261350f, -0.479493757660153010f, 0.877177265018595940f,
+  -0.480166685365088390f,
+  0.876808723809145650f, -0.480839330600333960f, 0.876439666795713610f,
+  -0.481511692970189860f,
+  0.876070094195406600f, -0.482183772079122720f, 0.875700006225634600f,
+  -0.482855567531765670f,
+  0.875329403104110890f, -0.483527078932918740f, 0.874958285048851650f,
+  -0.484198305887549030f,
+  0.874586652278176110f, -0.484869248000791060f, 0.874214505010706300f,
+  -0.485539904877946960f,
+  0.873841843465366860f, -0.486210276124486420f, 0.873468667861384880f,
+  -0.486880361346047340f,
+  0.873094978418290090f, -0.487550160148436000f, 0.872720775355914300f,
+  -0.488219672137626790f,
+  0.872346058894391540f, -0.488888896919763170f, 0.871970829254157810f,
+  -0.489557834101157440f,
+  0.871595086655950980f, -0.490226483288291160f, 0.871218831320811020f,
+  -0.490894844087815090f,
+  0.870842063470078980f, -0.491562916106549900f, 0.870464783325397670f,
+  -0.492230698951486020f,
+  0.870086991108711460f, -0.492898192229784040f, 0.869708687042265670f,
+  -0.493565395548774770f,
+  0.869329871348606840f, -0.494232308515959670f, 0.868950544250582380f,
+  -0.494898930739011260f,
+  0.868570705971340900f, -0.495565261825772540f, 0.868190356734331310f,
+  -0.496231301384258250f,
+  0.867809496763303320f, -0.496897049022654470f, 0.867428126282306920f,
+  -0.497562504349319150f,
+  0.867046245515692650f, -0.498227666972781870f, 0.866663854688111130f,
+  -0.498892536501744590f,
+  0.866280954024512990f, -0.499557112545081840f, 0.865897543750148820f,
+  -0.500221394711840680f,
+  0.865513624090569090f, -0.500885382611240710f, 0.865129195271623800f,
+  -0.501549075852675390f,
+  0.864744257519462380f, -0.502212474045710790f, 0.864358811060534030f,
+  -0.502875576800086990f,
+  0.863972856121586810f, -0.503538383725717580f, 0.863586392929668100f,
+  -0.504200894432690340f,
+  0.863199421712124160f, -0.504863108531267590f, 0.862811942696600330f,
+  -0.505525025631885390f,
+  0.862423956111040610f, -0.506186645345155230f, 0.862035462183687210f,
+  -0.506847967281863210f,
+  0.861646461143081300f, -0.507508991052970870f, 0.861256953218062170f,
+  -0.508169716269614600f,
+  0.860866938637767310f, -0.508830142543106990f, 0.860476417631632070f,
+  -0.509490269484936360f,
+  0.860085390429390140f, -0.510150096706766810f, 0.859693857261072610f,
+  -0.510809623820439040f,
+  0.859301818357008470f, -0.511468850437970300f, 0.858909273947823900f,
+  -0.512127776171554690f,
+  0.858516224264442740f, -0.512786400633562960f, 0.858122669538086140f,
+  -0.513444723436543460f,
+  0.857728610000272120f, -0.514102744193221660f, 0.857334045882815590f,
+  -0.514760462516501200f,
+  0.856938977417828760f, -0.515417878019462930f, 0.856543404837719960f,
+  -0.516074990315366630f,
+  0.856147328375194470f, -0.516731799017649870f, 0.855750748263253920f,
+  -0.517388303739929060f,
+  0.855353664735196030f, -0.518044504095999340f, 0.854956078024614930f,
+  -0.518700399699834950f,
+  0.854557988365400530f, -0.519355990165589640f, 0.854159395991738850f,
+  -0.520011275107596040f,
+  0.853760301138111410f, -0.520666254140367160f, 0.853360704039295430f,
+  -0.521320926878595660f,
+  0.852960604930363630f, -0.521975292937154390f, 0.852560004046684080f,
+  -0.522629351931096610f,
+  0.852158901623919830f, -0.523283103475656430f, 0.851757297898029120f,
+  -0.523936547186248600f,
+  0.851355193105265200f, -0.524589682678468950f, 0.850952587482175730f,
+  -0.525242509568094710f,
+  0.850549481265603480f, -0.525895027471084630f, 0.850145874692685210f,
+  -0.526547236003579440f,
+  0.849741768000852550f, -0.527199134781901280f, 0.849337161427830780f,
+  -0.527850723422555230f,
+  0.848932055211639610f, -0.528502001542228480f, 0.848526449590592650f,
+  -0.529152968757790610f,
+  0.848120344803297230f, -0.529803624686294610f, 0.847713741088654380f,
+  -0.530453968944976320f,
+  0.847306638685858320f, -0.531104001151255000f, 0.846899037834397240f,
+  -0.531753720922733320f,
+  0.846490938774052130f, -0.532403127877197900f, 0.846082341744897050f,
+  -0.533052221632619450f,
+  0.845673246987299070f, -0.533701001807152960f, 0.845263654741918220f,
+  -0.534349468019137520f,
+  0.844853565249707120f, -0.534997619887097150f, 0.844442978751910660f,
+  -0.535645457029741090f,
+  0.844031895490066410f, -0.536292979065963180f, 0.843620315706004150f,
+  -0.536940185614842910f,
+  0.843208239641845440f, -0.537587076295645390f, 0.842795667540004120f,
+  -0.538233650727821700f,
+  0.842382599643185850f, -0.538879908531008420f, 0.841969036194387680f,
+  -0.539525849325028890f,
+  0.841554977436898440f, -0.540171472729892850f, 0.841140423614298080f,
+  -0.540816778365796670f,
+  0.840725374970458070f, -0.541461765853123440f, 0.840309831749540770f,
+  -0.542106434812443920f,
+  0.839893794195999520f, -0.542750784864515890f, 0.839477262554578550f,
+  -0.543394815630284800f,
+  0.839060237070312740f, -0.544038526730883820f, 0.838642717988527300f,
+  -0.544681917787634530f,
+  0.838224705554838080f, -0.545324988422046460f, 0.837806200015150940f,
+  -0.545967738255817570f,
+  0.837387201615661940f, -0.546610166910834860f, 0.836967710602857020f,
+  -0.547252274009174090f,
+  0.836547727223512010f, -0.547894059173100190f, 0.836127251724692270f,
+  -0.548535522025067390f,
+  0.835706284353752600f, -0.549176662187719660f, 0.835284825358337370f,
+  -0.549817479283890910f,
+  0.834862874986380010f, -0.550457972936604810f, 0.834440433486103190f,
+  -0.551098142769075430f,
+  0.834017501106018130f, -0.551737988404707340f, 0.833594078094925140f,
+  -0.552377509467096070f,
+  0.833170164701913190f, -0.553016705580027470f, 0.832745761176359460f,
+  -0.553655576367479310f,
+  0.832320867767929680f, -0.554294121453620000f, 0.831895484726577590f,
+  -0.554932340462810370f,
+  0.831469612302545240f, -0.555570233019602180f, 0.831043250746362320f,
+  -0.556207798748739930f,
+  0.830616400308846310f, -0.556845037275160100f, 0.830189061241102370f,
+  -0.557481948223991550f,
+  0.829761233794523050f, -0.558118531220556100f, 0.829332918220788250f,
+  -0.558754785890368310f,
+  0.828904114771864870f, -0.559390711859136140f, 0.828474823700007130f,
+  -0.560026308752760380f,
+  0.828045045257755800f, -0.560661576197336030f, 0.827614779697938400f,
+  -0.561296513819151470f,
+  0.827184027273669130f, -0.561931121244689470f, 0.826752788238348520f,
+  -0.562565398100626560f,
+  0.826321062845663530f, -0.563199344013834090f, 0.825888851349586780f,
+  -0.563832958611378170f,
+  0.825456154004377550f, -0.564466241520519500f, 0.825022971064580220f,
+  -0.565099192368713980f,
+  0.824589302785025290f, -0.565731810783613120f, 0.824155149420828570f,
+  -0.566364096393063840f,
+  0.823720511227391430f, -0.566996048825108680f, 0.823285388460400110f,
+  -0.567627667707986230f,
+  0.822849781375826430f, -0.568258952670131490f, 0.822413690229926390f,
+  -0.568889903340175860f,
+  0.821977115279241550f, -0.569520519346947140f, 0.821540056780597610f,
+  -0.570150800319470300f,
+  0.821102514991104650f, -0.570780745886967260f, 0.820664490168157460f,
+  -0.571410355678857230f,
+  0.820225982569434690f, -0.572039629324757050f, 0.819786992452898990f,
+  -0.572668566454481160f,
+  0.819347520076796900f, -0.573297166698042200f, 0.818907565699658950f,
+  -0.573925429685650750f,
+  0.818467129580298660f, -0.574553355047715760f, 0.818026211977813440f,
+  -0.575180942414845080f,
+  0.817584813151583710f, -0.575808191417845340f, 0.817142933361272970f,
+  -0.576435101687721830f,
+  0.816700572866827850f, -0.577061672855679440f, 0.816257731928477390f,
+  -0.577687904553122800f,
+  0.815814410806733780f, -0.578313796411655590f, 0.815370609762391290f,
+  -0.578939348063081780f,
+  0.814926329056526620f, -0.579564559139405630f, 0.814481568950498610f,
+  -0.580189429272831680f,
+  0.814036329705948410f, -0.580813958095764530f, 0.813590611584798510f,
+  -0.581438145240810170f,
+  0.813144414849253590f, -0.582061990340775440f, 0.812697739761799490f,
+  -0.582685493028668460f,
+  0.812250586585203880f, -0.583308652937698290f, 0.811802955582515470f,
+  -0.583931469701276180f,
+  0.811354847017063730f, -0.584553942953015330f, 0.810906261152459670f,
+  -0.585176072326730410f,
+  0.810457198252594770f, -0.585797857456438860f, 0.810007658581641140f,
+  -0.586419297976360500f,
+  0.809557642404051260f, -0.587040393520917970f, 0.809107149984558240f,
+  -0.587661143724736660f,
+  0.808656181588174980f, -0.588281548222645220f, 0.808204737480194720f,
+  -0.588901606649675720f,
+  0.807752817926190360f, -0.589521318641063940f, 0.807300423192014450f,
+  -0.590140683832248820f,
+  0.806847553543799330f, -0.590759701858874160f, 0.806394209247956240f,
+  -0.591378372356787580f,
+  0.805940390571176280f, -0.591996694962040990f, 0.805486097780429230f,
+  -0.592614669310891130f,
+  0.805031331142963660f, -0.593232295039799800f, 0.804576090926307110f,
+  -0.593849571785433630f,
+  0.804120377398265810f, -0.594466499184664430f, 0.803664190826924090f,
+  -0.595083076874569960f,
+  0.803207531480644940f, -0.595699304492433360f, 0.802750399628069160f,
+  -0.596315181675743710f,
+  0.802292795538115720f, -0.596930708062196500f, 0.801834719479981310f,
+  -0.597545883289693160f,
+  0.801376171723140240f, -0.598160706996342270f, 0.800917152537344300f,
+  -0.598775178820458720f,
+  0.800457662192622820f, -0.599389298400564540f, 0.799997700959281910f,
+  -0.600003065375388940f,
+  0.799537269107905010f, -0.600616479383868970f, 0.799076366909352350f,
+  -0.601229540065148500f,
+  0.798614994634760820f, -0.601842247058580030f, 0.798153152555543750f,
+  -0.602454600003723750f,
+  0.797690840943391160f, -0.603066598540348160f, 0.797228060070268810f,
+  -0.603678242308430370f,
+  0.796764810208418830f, -0.604289530948155960f, 0.796301091630359110f,
+  -0.604900464099919820f,
+  0.795836904608883570f, -0.605511041404325550f, 0.795372249417061310f,
+  -0.606121262502186120f,
+  0.794907126328237010f, -0.606731127034524480f, 0.794441535616030590f,
+  -0.607340634642572930f,
+  0.793975477554337170f, -0.607949784967773630f, 0.793508952417326660f,
+  -0.608558577651779450f,
+  0.793041960479443640f, -0.609167012336453210f, 0.792574502015407690f,
+  -0.609775088663868430f,
+  0.792106577300212390f, -0.610382806276309480f, 0.791638186609125880f,
+  -0.610990164816271660f,
+  0.791169330217690200f, -0.611597163926461910f, 0.790700008401721610f,
+  -0.612203803249797950f,
+  0.790230221437310030f, -0.612810082429409710f, 0.789759969600819070f,
+  -0.613416001108638590f,
+  0.789289253168885650f, -0.614021558931038380f, 0.788818072418420280f,
+  -0.614626755540375050f,
+  0.788346427626606340f, -0.615231590580626820f, 0.787874319070900220f,
+  -0.615836063695985090f,
+  0.787401747029031430f, -0.616440174530853650f, 0.786928711779001810f,
+  -0.617043922729849760f,
+  0.786455213599085770f, -0.617647307937803870f, 0.785981252767830150f,
+  -0.618250329799760250f,
+  0.785506829564053930f, -0.618852987960976320f, 0.785031944266848080f,
+  -0.619455282066924020f,
+  0.784556597155575240f, -0.620057211763289100f, 0.784080788509869950f,
+  -0.620658776695972140f,
+  0.783604518609638200f, -0.621259976511087550f, 0.783127787735057310f,
+  -0.621860810854965360f,
+  0.782650596166575730f, -0.622461279374149970f, 0.782172944184913010f,
+  -0.623061381715401260f,
+  0.781694832071059390f, -0.623661117525694530f, 0.781216260106276090f,
+  -0.624260486452220650f,
+  0.780737228572094490f, -0.624859488142386340f, 0.780257737750316590f,
+  -0.625458122243814360f,
+  0.779777787923014550f, -0.626056388404343520f, 0.779297379372530300f,
+  -0.626654286272029350f,
+  0.778816512381475980f, -0.627251815495144080f, 0.778335187232733210f,
+  -0.627848975722176460f,
+  0.777853404209453150f, -0.628445766601832710f, 0.777371163595056310f,
+  -0.629042187783036000f,
+  0.776888465673232440f, -0.629638238914926980f, 0.776405310727940390f,
+  -0.630233919646864370f,
+  0.775921699043407690f, -0.630829229628424470f, 0.775437630904130540f,
+  -0.631424168509401860f,
+  0.774953106594873930f, -0.632018735939809060f, 0.774468126400670860f,
+  -0.632612931569877410f,
+  0.773982690606822900f, -0.633206755050057190f, 0.773496799498899050f,
+  -0.633800206031017280f,
+  0.773010453362736990f, -0.634393284163645490f, 0.772523652484441330f,
+  -0.634985989099049460f,
+  0.772036397150384520f, -0.635578320488556110f, 0.771548687647206300f,
+  -0.636170277983712170f,
+  0.771060524261813820f, -0.636761861236284200f, 0.770571907281380810f,
+  -0.637353069898259130f,
+  0.770082836993347900f, -0.637943903621844060f, 0.769593313685422940f,
+  -0.638534362059466790f,
+  0.769103337645579700f, -0.639124444863775730f, 0.768612909162058380f,
+  -0.639714151687640450f,
+  0.768122028523365420f, -0.640303482184151670f, 0.767630696018273380f,
+  -0.640892436006621380f,
+  0.767138911935820400f, -0.641481012808583160f, 0.766646676565310380f,
+  -0.642069212243792540f,
+  0.766153990196312920f, -0.642657033966226860f, 0.765660853118662500f,
+  -0.643244477630085850f,
+  0.765167265622458960f, -0.643831542889791390f, 0.764673227998067140f,
+  -0.644418229399988380f,
+  0.764178740536116670f, -0.645004536815543930f, 0.763683803527501870f,
+  -0.645590464791548690f,
+  0.763188417263381270f, -0.646176012983316280f, 0.762692582035177980f,
+  -0.646761181046383920f,
+  0.762196298134578900f, -0.647345968636512060f, 0.761699565853535380f,
+  -0.647930375409685340f,
+  0.761202385484261780f, -0.648514401022112440f, 0.760704757319236920f,
+  -0.649098045130225950f,
+  0.760206681651202420f, -0.649681307390683190f, 0.759708158773163440f,
+  -0.650264187460365850f,
+  0.759209188978388070f, -0.650846684996380880f, 0.758709772560407390f,
+  -0.651428799656059820f,
+  0.758209909813015280f, -0.652010531096959500f, 0.757709601030268080f,
+  -0.652591878976862440f,
+  0.757208846506484570f, -0.653172842953776760f, 0.756707646536245670f,
+  -0.653753422685936060f,
+  0.756206001414394540f, -0.654333617831800440f, 0.755703911436035880f,
+  -0.654913428050056030f,
+  0.755201376896536550f, -0.655492852999615350f, 0.754698398091524500f,
+  -0.656071892339617600f,
+  0.754194975316889170f, -0.656650545729428940f, 0.753691108868781210f,
+  -0.657228812828642540f,
+  0.753186799043612520f, -0.657806693297078640f, 0.752682046138055340f,
+  -0.658384186794785050f,
+  0.752176850449042810f, -0.658961292982037320f, 0.751671212273768430f,
+  -0.659538011519338660f,
+  0.751165131909686480f, -0.660114342067420480f, 0.750658609654510700f,
+  -0.660690284287242300f,
+  0.750151645806215070f, -0.661265837839992270f, 0.749644240663033480f,
+  -0.661841002387086870f,
+  0.749136394523459370f, -0.662415777590171780f, 0.748628107686245440f,
+  -0.662990163111121470f,
+  0.748119380450403600f, -0.663564158612039770f, 0.747610213115205150f,
+  -0.664137763755260010f,
+  0.747100605980180130f, -0.664710978203344790f, 0.746590559345117310f,
+  -0.665283801619087180f,
+  0.746080073510063780f, -0.665856233665509720f, 0.745569148775325430f,
+  -0.666428274005865240f,
+  0.745057785441466060f, -0.666999922303637470f, 0.744545983809307370f,
+  -0.667571178222540310f,
+  0.744033744179929290f, -0.668142041426518450f, 0.743521066854669120f,
+  -0.668712511579747980f,
+  0.743007952135121720f, -0.669282588346636010f, 0.742494400323139180f,
+  -0.669852271391821020f,
+  0.741980411720831070f, -0.670421560380173090f, 0.741465986630563290f,
+  -0.670990454976794220f,
+  0.740951125354959110f, -0.671558954847018330f, 0.740435828196898020f,
+  -0.672127059656411730f,
+  0.739920095459516200f, -0.672694769070772860f, 0.739403927446205760f,
+  -0.673262082756132970f,
+  0.738887324460615110f, -0.673829000378756040f, 0.738370286806648620f,
+  -0.674395521605139050f,
+  0.737852814788465980f, -0.674961646102011930f, 0.737334908710482910f,
+  -0.675527373536338520f,
+  0.736816568877369900f, -0.676092703575315920f, 0.736297795594053170f,
+  -0.676657635886374950f,
+  0.735778589165713590f, -0.677222170137180330f, 0.735258949897786840f,
+  -0.677786305995631500f,
+  0.734738878095963500f, -0.678350043129861470f, 0.734218374066188280f,
+  -0.678913381208238410f,
+  0.733697438114660370f, -0.679476319899364970f, 0.733176070547832740f,
+  -0.680038858872078930f,
+  0.732654271672412820f, -0.680600997795453020f, 0.732132041795361290f,
+  -0.681162736338795430f,
+  0.731609381223892630f, -0.681724074171649710f, 0.731086290265474340f,
+  -0.682285010963795570f,
+  0.730562769227827590f, -0.682845546385248080f, 0.730038818418926260f,
+  -0.683405680106258680f,
+  0.729514438146997010f, -0.683965411797315400f, 0.728989628720519420f,
+  -0.684524741129142300f,
+  0.728464390448225200f, -0.685083667772700360f, 0.727938723639098620f,
+  -0.685642191399187470f,
+  0.727412628602375770f, -0.686200311680038590f, 0.726886105647544970f,
+  -0.686758028286925890f,
+  0.726359155084346010f, -0.687315340891759050f, 0.725831777222770370f,
+  -0.687872249166685550f,
+  0.725303972373060770f, -0.688428752784090440f, 0.724775740845711280f,
+  -0.688984851416597040f,
+  0.724247082951467000f, -0.689540544737066830f, 0.723717999001323500f,
+  -0.690095832418599950f,
+  0.723188489306527460f, -0.690650714134534600f, 0.722658554178575610f,
+  -0.691205189558448450f,
+  0.722128193929215350f, -0.691759258364157750f, 0.721597408870443770f,
+  -0.692312920225718220f,
+  0.721066199314508110f, -0.692866174817424630f, 0.720534565573905270f,
+  -0.693419021813811760f,
+  0.720002507961381650f, -0.693971460889654000f, 0.719470026789932990f,
+  -0.694523491719965520f,
+  0.718937122372804490f, -0.695075113980000880f, 0.718403795023489830f,
+  -0.695626327345254870f,
+  0.717870045055731710f, -0.696177131491462990f, 0.717335872783521730f,
+  -0.696727526094601200f,
+  0.716801278521099540f, -0.697277510830886520f, 0.716266262582953120f,
+  -0.697827085376777290f,
+  0.715730825283818590f, -0.698376249408972920f, 0.715194966938680120f,
+  -0.698925002604414150f,
+  0.714658687862769090f, -0.699473344640283770f, 0.714121988371564820f,
+  -0.700021275194006250f,
+  0.713584868780793640f, -0.700568793943248340f, 0.713047329406429340f,
+  -0.701115900565918660f,
+  0.712509370564692320f, -0.701662594740168450f, 0.711970992572050100f,
+  -0.702208876144391870f,
+  0.711432195745216430f, -0.702754744457225300f, 0.710892980401151680f,
+  -0.703300199357548730f,
+  0.710353346857062420f, -0.703845240524484940f, 0.709813295430400840f,
+  -0.704389867637400410f,
+  0.709272826438865690f, -0.704934080375904880f, 0.708731940200400650f,
+  -0.705477878419852100f,
+  0.708190637033195400f, -0.706021261449339740f, 0.707648917255684350f,
+  -0.706564229144709510f,
+  0.707106781186547570f, -0.707106781186547460f, 0.706564229144709620f,
+  -0.707648917255684350f,
+  0.706021261449339740f, -0.708190637033195290f, 0.705477878419852210f,
+  -0.708731940200400650f,
+  0.704934080375904990f, -0.709272826438865580f, 0.704389867637400410f,
+  -0.709813295430400840f,
+  0.703845240524484940f, -0.710353346857062310f, 0.703300199357548730f,
+  -0.710892980401151680f,
+  0.702754744457225300f, -0.711432195745216430f, 0.702208876144391870f,
+  -0.711970992572049990f,
+  0.701662594740168570f, -0.712509370564692320f, 0.701115900565918660f,
+  -0.713047329406429230f,
+  0.700568793943248450f, -0.713584868780793520f, 0.700021275194006360f,
+  -0.714121988371564710f,
+  0.699473344640283770f, -0.714658687862768980f, 0.698925002604414150f,
+  -0.715194966938680010f,
+  0.698376249408972920f, -0.715730825283818590f, 0.697827085376777290f,
+  -0.716266262582953120f,
+  0.697277510830886630f, -0.716801278521099540f, 0.696727526094601200f,
+  -0.717335872783521730f,
+  0.696177131491462990f, -0.717870045055731710f, 0.695626327345254870f,
+  -0.718403795023489720f,
+  0.695075113980000880f, -0.718937122372804380f, 0.694523491719965520f,
+  -0.719470026789932990f,
+  0.693971460889654000f, -0.720002507961381650f, 0.693419021813811880f,
+  -0.720534565573905270f,
+  0.692866174817424740f, -0.721066199314508110f, 0.692312920225718220f,
+  -0.721597408870443660f,
+  0.691759258364157750f, -0.722128193929215350f, 0.691205189558448450f,
+  -0.722658554178575610f,
+  0.690650714134534720f, -0.723188489306527350f, 0.690095832418599950f,
+  -0.723717999001323390f,
+  0.689540544737066940f, -0.724247082951466890f, 0.688984851416597150f,
+  -0.724775740845711280f,
+  0.688428752784090550f, -0.725303972373060660f, 0.687872249166685550f,
+  -0.725831777222770370f,
+  0.687315340891759160f, -0.726359155084346010f, 0.686758028286925890f,
+  -0.726886105647544970f,
+  0.686200311680038700f, -0.727412628602375770f, 0.685642191399187470f,
+  -0.727938723639098620f,
+  0.685083667772700360f, -0.728464390448225200f, 0.684524741129142300f,
+  -0.728989628720519310f,
+  0.683965411797315510f, -0.729514438146996900f, 0.683405680106258790f,
+  -0.730038818418926150f,
+  0.682845546385248080f, -0.730562769227827590f, 0.682285010963795570f,
+  -0.731086290265474230f,
+  0.681724074171649820f, -0.731609381223892520f, 0.681162736338795430f,
+  -0.732132041795361290f,
+  0.680600997795453130f, -0.732654271672412820f, 0.680038858872079040f,
+  -0.733176070547832740f,
+  0.679476319899365080f, -0.733697438114660260f, 0.678913381208238410f,
+  -0.734218374066188170f,
+  0.678350043129861580f, -0.734738878095963390f, 0.677786305995631500f,
+  -0.735258949897786730f,
+  0.677222170137180450f, -0.735778589165713480f, 0.676657635886374950f,
+  -0.736297795594053060f,
+  0.676092703575316030f, -0.736816568877369790f, 0.675527373536338630f,
+  -0.737334908710482790f,
+  0.674961646102012040f, -0.737852814788465980f, 0.674395521605139050f,
+  -0.738370286806648510f,
+  0.673829000378756150f, -0.738887324460615110f, 0.673262082756132970f,
+  -0.739403927446205760f,
+  0.672694769070772970f, -0.739920095459516090f, 0.672127059656411840f,
+  -0.740435828196898020f,
+  0.671558954847018330f, -0.740951125354959110f, 0.670990454976794220f,
+  -0.741465986630563290f,
+  0.670421560380173090f, -0.741980411720830960f, 0.669852271391821130f,
+  -0.742494400323139180f,
+  0.669282588346636010f, -0.743007952135121720f, 0.668712511579748090f,
+  -0.743521066854669120f,
+  0.668142041426518560f, -0.744033744179929180f, 0.667571178222540310f,
+  -0.744545983809307250f,
+  0.666999922303637470f, -0.745057785441465950f, 0.666428274005865350f,
+  -0.745569148775325430f,
+  0.665856233665509720f, -0.746080073510063780f, 0.665283801619087180f,
+  -0.746590559345117310f,
+  0.664710978203344900f, -0.747100605980180130f, 0.664137763755260010f,
+  -0.747610213115205150f,
+  0.663564158612039880f, -0.748119380450403490f, 0.662990163111121470f,
+  -0.748628107686245330f,
+  0.662415777590171780f, -0.749136394523459260f, 0.661841002387086870f,
+  -0.749644240663033480f,
+  0.661265837839992270f, -0.750151645806214960f, 0.660690284287242300f,
+  -0.750658609654510590f,
+  0.660114342067420480f, -0.751165131909686370f, 0.659538011519338770f,
+  -0.751671212273768430f,
+  0.658961292982037320f, -0.752176850449042700f, 0.658384186794785050f,
+  -0.752682046138055230f,
+  0.657806693297078640f, -0.753186799043612410f, 0.657228812828642650f,
+  -0.753691108868781210f,
+  0.656650545729429050f, -0.754194975316889170f, 0.656071892339617710f,
+  -0.754698398091524390f,
+  0.655492852999615460f, -0.755201376896536550f, 0.654913428050056150f,
+  -0.755703911436035880f,
+  0.654333617831800550f, -0.756206001414394540f, 0.653753422685936170f,
+  -0.756707646536245670f,
+  0.653172842953776760f, -0.757208846506484460f, 0.652591878976862550f,
+  -0.757709601030268080f,
+  0.652010531096959500f, -0.758209909813015280f, 0.651428799656059820f,
+  -0.758709772560407390f,
+  0.650846684996380990f, -0.759209188978387960f, 0.650264187460365960f,
+  -0.759708158773163440f,
+  0.649681307390683190f, -0.760206681651202420f, 0.649098045130226060f,
+  -0.760704757319236920f,
+  0.648514401022112550f, -0.761202385484261780f, 0.647930375409685460f,
+  -0.761699565853535270f,
+  0.647345968636512060f, -0.762196298134578900f, 0.646761181046383920f,
+  -0.762692582035177870f,
+  0.646176012983316390f, -0.763188417263381270f, 0.645590464791548800f,
+  -0.763683803527501870f,
+  0.645004536815544040f, -0.764178740536116670f, 0.644418229399988380f,
+  -0.764673227998067140f,
+  0.643831542889791500f, -0.765167265622458960f, 0.643244477630085850f,
+  -0.765660853118662390f,
+  0.642657033966226860f, -0.766153990196312810f, 0.642069212243792540f,
+  -0.766646676565310380f,
+  0.641481012808583160f, -0.767138911935820400f, 0.640892436006621380f,
+  -0.767630696018273270f,
+  0.640303482184151670f, -0.768122028523365310f, 0.639714151687640450f,
+  -0.768612909162058270f,
+  0.639124444863775730f, -0.769103337645579590f, 0.638534362059466790f,
+  -0.769593313685422940f,
+  0.637943903621844170f, -0.770082836993347900f, 0.637353069898259130f,
+  -0.770571907281380700f,
+  0.636761861236284200f, -0.771060524261813710f, 0.636170277983712170f,
+  -0.771548687647206300f,
+  0.635578320488556230f, -0.772036397150384410f, 0.634985989099049460f,
+  -0.772523652484441330f,
+  0.634393284163645490f, -0.773010453362736990f, 0.633800206031017280f,
+  -0.773496799498899050f,
+  0.633206755050057190f, -0.773982690606822790f, 0.632612931569877520f,
+  -0.774468126400670860f,
+  0.632018735939809060f, -0.774953106594873820f, 0.631424168509401860f,
+  -0.775437630904130430f,
+  0.630829229628424470f, -0.775921699043407580f, 0.630233919646864480f,
+  -0.776405310727940390f,
+  0.629638238914927100f, -0.776888465673232440f, 0.629042187783036000f,
+  -0.777371163595056200f,
+  0.628445766601832710f, -0.777853404209453040f, 0.627848975722176570f,
+  -0.778335187232733090f,
+  0.627251815495144190f, -0.778816512381475870f, 0.626654286272029460f,
+  -0.779297379372530300f,
+  0.626056388404343520f, -0.779777787923014440f, 0.625458122243814360f,
+  -0.780257737750316590f,
+  0.624859488142386450f, -0.780737228572094380f, 0.624260486452220650f,
+  -0.781216260106276090f,
+  0.623661117525694640f, -0.781694832071059390f, 0.623061381715401370f,
+  -0.782172944184912900f,
+  0.622461279374150080f, -0.782650596166575730f, 0.621860810854965360f,
+  -0.783127787735057310f,
+  0.621259976511087660f, -0.783604518609638200f, 0.620658776695972140f,
+  -0.784080788509869950f,
+  0.620057211763289210f, -0.784556597155575240f, 0.619455282066924020f,
+  -0.785031944266848080f,
+  0.618852987960976320f, -0.785506829564053930f, 0.618250329799760250f,
+  -0.785981252767830150f,
+  0.617647307937803980f, -0.786455213599085770f, 0.617043922729849760f,
+  -0.786928711779001700f,
+  0.616440174530853650f, -0.787401747029031320f, 0.615836063695985090f,
+  -0.787874319070900110f,
+  0.615231590580626820f, -0.788346427626606230f, 0.614626755540375050f,
+  -0.788818072418420170f,
+  0.614021558931038490f, -0.789289253168885650f, 0.613416001108638590f,
+  -0.789759969600819070f,
+  0.612810082429409710f, -0.790230221437310030f, 0.612203803249798060f,
+  -0.790700008401721610f,
+  0.611597163926462020f, -0.791169330217690090f, 0.610990164816271770f,
+  -0.791638186609125770f,
+  0.610382806276309480f, -0.792106577300212390f, 0.609775088663868430f,
+  -0.792574502015407580f,
+  0.609167012336453210f, -0.793041960479443640f, 0.608558577651779450f,
+  -0.793508952417326660f,
+  0.607949784967773740f, -0.793975477554337170f, 0.607340634642572930f,
+  -0.794441535616030590f,
+  0.606731127034524480f, -0.794907126328237010f, 0.606121262502186230f,
+  -0.795372249417061190f,
+  0.605511041404325550f, -0.795836904608883460f, 0.604900464099919930f,
+  -0.796301091630359110f,
+  0.604289530948156070f, -0.796764810208418720f, 0.603678242308430370f,
+  -0.797228060070268700f,
+  0.603066598540348280f, -0.797690840943391040f, 0.602454600003723860f,
+  -0.798153152555543750f,
+  0.601842247058580030f, -0.798614994634760820f, 0.601229540065148620f,
+  -0.799076366909352350f,
+  0.600616479383868970f, -0.799537269107905010f, 0.600003065375389060f,
+  -0.799997700959281910f,
+  0.599389298400564540f, -0.800457662192622710f, 0.598775178820458720f,
+  -0.800917152537344300f,
+  0.598160706996342380f, -0.801376171723140130f, 0.597545883289693270f,
+  -0.801834719479981310f,
+  0.596930708062196500f, -0.802292795538115720f, 0.596315181675743820f,
+  -0.802750399628069160f,
+  0.595699304492433470f, -0.803207531480644830f, 0.595083076874569960f,
+  -0.803664190826924090f,
+  0.594466499184664540f, -0.804120377398265700f, 0.593849571785433630f,
+  -0.804576090926307000f,
+  0.593232295039799800f, -0.805031331142963660f, 0.592614669310891130f,
+  -0.805486097780429120f,
+  0.591996694962040990f, -0.805940390571176280f, 0.591378372356787580f,
+  -0.806394209247956240f,
+  0.590759701858874280f, -0.806847553543799220f, 0.590140683832248940f,
+  -0.807300423192014450f,
+  0.589521318641063940f, -0.807752817926190360f, 0.588901606649675840f,
+  -0.808204737480194720f,
+  0.588281548222645330f, -0.808656181588174980f, 0.587661143724736770f,
+  -0.809107149984558130f,
+  0.587040393520918080f, -0.809557642404051260f, 0.586419297976360500f,
+  -0.810007658581641140f,
+  0.585797857456438860f, -0.810457198252594770f, 0.585176072326730410f,
+  -0.810906261152459670f,
+  0.584553942953015330f, -0.811354847017063730f, 0.583931469701276300f,
+  -0.811802955582515360f,
+  0.583308652937698290f, -0.812250586585203880f, 0.582685493028668460f,
+  -0.812697739761799490f,
+  0.582061990340775550f, -0.813144414849253590f, 0.581438145240810280f,
+  -0.813590611584798510f,
+  0.580813958095764530f, -0.814036329705948300f, 0.580189429272831680f,
+  -0.814481568950498610f,
+  0.579564559139405740f, -0.814926329056526620f, 0.578939348063081890f,
+  -0.815370609762391290f,
+  0.578313796411655590f, -0.815814410806733780f, 0.577687904553122800f,
+  -0.816257731928477390f,
+  0.577061672855679550f, -0.816700572866827850f, 0.576435101687721830f,
+  -0.817142933361272970f,
+  0.575808191417845340f, -0.817584813151583710f, 0.575180942414845190f,
+  -0.818026211977813440f,
+  0.574553355047715760f, -0.818467129580298660f, 0.573925429685650750f,
+  -0.818907565699658950f,
+  0.573297166698042320f, -0.819347520076796900f, 0.572668566454481160f,
+  -0.819786992452898990f,
+  0.572039629324757050f, -0.820225982569434690f, 0.571410355678857340f,
+  -0.820664490168157460f,
+  0.570780745886967370f, -0.821102514991104650f, 0.570150800319470300f,
+  -0.821540056780597610f,
+  0.569520519346947250f, -0.821977115279241550f, 0.568889903340175970f,
+  -0.822413690229926390f,
+  0.568258952670131490f, -0.822849781375826320f, 0.567627667707986230f,
+  -0.823285388460400110f,
+  0.566996048825108680f, -0.823720511227391320f, 0.566364096393063950f,
+  -0.824155149420828570f,
+  0.565731810783613230f, -0.824589302785025290f, 0.565099192368714090f,
+  -0.825022971064580220f,
+  0.564466241520519500f, -0.825456154004377440f, 0.563832958611378170f,
+  -0.825888851349586780f,
+  0.563199344013834090f, -0.826321062845663420f, 0.562565398100626560f,
+  -0.826752788238348520f,
+  0.561931121244689470f, -0.827184027273669020f, 0.561296513819151470f,
+  -0.827614779697938400f,
+  0.560661576197336030f, -0.828045045257755800f, 0.560026308752760380f,
+  -0.828474823700007130f,
+  0.559390711859136140f, -0.828904114771864870f, 0.558754785890368310f,
+  -0.829332918220788250f,
+  0.558118531220556100f, -0.829761233794523050f, 0.557481948223991660f,
+  -0.830189061241102370f,
+  0.556845037275160100f, -0.830616400308846200f, 0.556207798748739930f,
+  -0.831043250746362320f,
+  0.555570233019602290f, -0.831469612302545240f, 0.554932340462810370f,
+  -0.831895484726577590f,
+  0.554294121453620110f, -0.832320867767929680f, 0.553655576367479310f,
+  -0.832745761176359460f,
+  0.553016705580027580f, -0.833170164701913190f, 0.552377509467096070f,
+  -0.833594078094925140f,
+  0.551737988404707450f, -0.834017501106018130f, 0.551098142769075430f,
+  -0.834440433486103190f,
+  0.550457972936604810f, -0.834862874986380010f, 0.549817479283891020f,
+  -0.835284825358337370f,
+  0.549176662187719770f, -0.835706284353752600f, 0.548535522025067390f,
+  -0.836127251724692160f,
+  0.547894059173100190f, -0.836547727223511890f, 0.547252274009174090f,
+  -0.836967710602857020f,
+  0.546610166910834860f, -0.837387201615661940f, 0.545967738255817680f,
+  -0.837806200015150940f,
+  0.545324988422046460f, -0.838224705554837970f, 0.544681917787634530f,
+  -0.838642717988527300f,
+  0.544038526730883930f, -0.839060237070312630f, 0.543394815630284800f,
+  -0.839477262554578550f,
+  0.542750784864516000f, -0.839893794195999410f, 0.542106434812444030f,
+  -0.840309831749540770f,
+  0.541461765853123560f, -0.840725374970458070f, 0.540816778365796670f,
+  -0.841140423614298080f,
+  0.540171472729892970f, -0.841554977436898330f, 0.539525849325029010f,
+  -0.841969036194387680f,
+  0.538879908531008420f, -0.842382599643185960f, 0.538233650727821700f,
+  -0.842795667540004120f,
+  0.537587076295645510f, -0.843208239641845440f, 0.536940185614843020f,
+  -0.843620315706004040f,
+  0.536292979065963180f, -0.844031895490066410f, 0.535645457029741090f,
+  -0.844442978751910660f,
+  0.534997619887097260f, -0.844853565249707010f, 0.534349468019137520f,
+  -0.845263654741918220f,
+  0.533701001807152960f, -0.845673246987299070f, 0.533052221632619670f,
+  -0.846082341744896940f,
+  0.532403127877198010f, -0.846490938774052020f, 0.531753720922733320f,
+  -0.846899037834397350f,
+  0.531104001151255000f, -0.847306638685858320f, 0.530453968944976320f,
+  -0.847713741088654270f,
+  0.529803624686294830f, -0.848120344803297120f, 0.529152968757790720f,
+  -0.848526449590592650f,
+  0.528502001542228480f, -0.848932055211639610f, 0.527850723422555460f,
+  -0.849337161427830670f,
+  0.527199134781901390f, -0.849741768000852440f, 0.526547236003579330f,
+  -0.850145874692685210f,
+  0.525895027471084740f, -0.850549481265603370f, 0.525242509568094710f,
+  -0.850952587482175730f,
+  0.524589682678468840f, -0.851355193105265200f, 0.523936547186248600f,
+  -0.851757297898029120f,
+  0.523283103475656430f, -0.852158901623919830f, 0.522629351931096720f,
+  -0.852560004046683970f,
+  0.521975292937154390f, -0.852960604930363630f, 0.521320926878595550f,
+  -0.853360704039295430f,
+  0.520666254140367270f, -0.853760301138111300f, 0.520011275107596040f,
+  -0.854159395991738730f,
+  0.519355990165589530f, -0.854557988365400530f, 0.518700399699835170f,
+  -0.854956078024614820f,
+  0.518044504095999340f, -0.855353664735196030f, 0.517388303739929060f,
+  -0.855750748263253920f,
+  0.516731799017649980f, -0.856147328375194470f, 0.516074990315366630f,
+  -0.856543404837719960f,
+  0.515417878019463150f, -0.856938977417828650f, 0.514760462516501200f,
+  -0.857334045882815590f,
+  0.514102744193221660f, -0.857728610000272120f, 0.513444723436543570f,
+  -0.858122669538086020f,
+  0.512786400633563070f, -0.858516224264442740f, 0.512127776171554690f,
+  -0.858909273947823900f,
+  0.511468850437970520f, -0.859301818357008360f, 0.510809623820439040f,
+  -0.859693857261072610f,
+  0.510150096706766700f, -0.860085390429390140f, 0.509490269484936360f,
+  -0.860476417631632070f,
+  0.508830142543106990f, -0.860866938637767310f, 0.508169716269614710f,
+  -0.861256953218062060f,
+  0.507508991052970870f, -0.861646461143081300f, 0.506847967281863320f,
+  -0.862035462183687210f,
+  0.506186645345155450f, -0.862423956111040500f, 0.505525025631885510f,
+  -0.862811942696600330f,
+  0.504863108531267480f, -0.863199421712124160f, 0.504200894432690560f,
+  -0.863586392929667990f,
+  0.503538383725717580f, -0.863972856121586700f, 0.502875576800086880f,
+  -0.864358811060534030f,
+  0.502212474045710900f, -0.864744257519462380f, 0.501549075852675390f,
+  -0.865129195271623690f,
+  0.500885382611240940f, -0.865513624090568980f, 0.500221394711840680f,
+  -0.865897543750148820f,
+  0.499557112545081890f, -0.866280954024512990f, 0.498892536501744750f,
+  -0.866663854688111020f,
+  0.498227666972781870f, -0.867046245515692650f, 0.497562504349319090f,
+  -0.867428126282306920f,
+  0.496897049022654640f, -0.867809496763303210f, 0.496231301384258310f,
+  -0.868190356734331310f,
+  0.495565261825772490f, -0.868570705971340900f, 0.494898930739011310f,
+  -0.868950544250582380f,
+  0.494232308515959730f, -0.869329871348606730f, 0.493565395548774880f,
+  -0.869708687042265560f,
+  0.492898192229784090f, -0.870086991108711350f, 0.492230698951486080f,
+  -0.870464783325397670f,
+  0.491562916106550060f, -0.870842063470078860f, 0.490894844087815140f,
+  -0.871218831320810900f,
+  0.490226483288291100f, -0.871595086655951090f, 0.489557834101157550f,
+  -0.871970829254157700f,
+  0.488888896919763230f, -0.872346058894391540f, 0.488219672137626740f,
+  -0.872720775355914300f,
+  0.487550160148436050f, -0.873094978418290090f, 0.486880361346047400f,
+  -0.873468667861384880f,
+  0.486210276124486530f, -0.873841843465366750f, 0.485539904877947020f,
+  -0.874214505010706300f,
+  0.484869248000791120f, -0.874586652278176110f, 0.484198305887549140f,
+  -0.874958285048851540f,
+  0.483527078932918740f, -0.875329403104110780f, 0.482855567531765670f,
+  -0.875700006225634600f,
+  0.482183772079122830f, -0.876070094195406600f, 0.481511692970189920f,
+  -0.876439666795713610f,
+  0.480839330600333900f, -0.876808723809145760f, 0.480166685365088440f,
+  -0.877177265018595940f,
+  0.479493757660153010f, -0.877545290207261240f, 0.478820547881394050f,
+  -0.877912799158641730f,
+  0.478147056424843120f, -0.878279791656541460f, 0.477473283686698060f,
+  -0.878646267485068130f,
+  0.476799230063322250f, -0.879012226428633410f, 0.476124895951243630f,
+  -0.879377668271953180f,
+  0.475450281747155870f, -0.879742592800047410f, 0.474775387847917230f,
+  -0.880106999798240360f,
+  0.474100214650550020f, -0.880470889052160750f, 0.473424762552241530f,
+  -0.880834260347742040f,
+  0.472749031950342900f, -0.881197113471221980f, 0.472073023242368660f,
+  -0.881559448209143780f,
+  0.471396736825997810f, -0.881921264348354940f, 0.470720173099071710f,
+  -0.882282561676008600f,
+  0.470043332459595620f, -0.882643339979562790f, 0.469366215305737630f,
+  -0.883003599046780720f,
+  0.468688822035827960f, -0.883363338665731580f, 0.468011153048359830f,
+  -0.883722558624789660f,
+  0.467333208741988530f, -0.884081258712634990f, 0.466654989515530970f,
+  -0.884439438718253700f,
+  0.465976495767966130f, -0.884797098430937790f, 0.465297727898434650f,
+  -0.885154237640285110f,
+  0.464618686306237820f, -0.885510856136199950f, 0.463939371390838460f,
+  -0.885866953708892790f,
+  0.463259783551860260f, -0.886222530148880640f, 0.462579923189086810f,
+  -0.886577585246987040f,
+  0.461899790702462840f, -0.886932118794342080f, 0.461219386492092430f,
+  -0.887286130582383150f,
+  0.460538710958240010f, -0.887639620402853930f, 0.459857764501329650f,
+  -0.887992588047805560f,
+  0.459176547521944150f, -0.888345033309596240f, 0.458495060420826220f,
+  -0.888696955980891710f,
+  0.457813303598877290f, -0.889048355854664570f, 0.457131277457156980f,
+  -0.889399232724195520f,
+  0.456448982396883860f, -0.889749586383072890f, 0.455766418819434750f,
+  -0.890099416625192210f,
+  0.455083587126343840f, -0.890448723244757880f, 0.454400487719303750f,
+  -0.890797506036281490f,
+  0.453717121000163930f, -0.891145764794583180f, 0.453033487370931580f,
+  -0.891493499314791380f,
+  0.452349587233771000f, -0.891840709392342720f, 0.451665420991002540f,
+  -0.892187394822982480f,
+  0.450980989045103810f, -0.892533555402764690f, 0.450296291798708730f,
+  -0.892879190928051680f,
+  0.449611329654606600f, -0.893224301195515320f, 0.448926103015743260f,
+  -0.893568886002136020f,
+  0.448240612285220000f, -0.893912945145203250f, 0.447554857866293010f,
+  -0.894256478422316040f,
+  0.446868840162374330f, -0.894599485631382580f, 0.446182559577030120f,
+  -0.894941966570620750f,
+  0.445496016513981740f, -0.895283921038557580f, 0.444809211377105000f,
+  -0.895625348834030000f,
+  0.444122144570429260f, -0.895966249756185110f, 0.443434816498138430f,
+  -0.896306623604479660f,
+  0.442747227564570130f, -0.896646470178680150f, 0.442059378174214760f,
+  -0.896985789278863970f,
+  0.441371268731716620f, -0.897324580705418320f, 0.440682899641873020f,
+  -0.897662844259040750f,
+  0.439994271309633260f, -0.898000579740739880f, 0.439305384140100060f,
+  -0.898337786951834190f,
+  0.438616238538527710f, -0.898674465693953820f, 0.437926834910322860f,
+  -0.899010615769039070f,
+  0.437237173661044200f, -0.899346236979341460f, 0.436547255196401250f,
+  -0.899681329127423930f,
+  0.435857079922255470f, -0.900015892016160280f, 0.435166648244619370f,
+  -0.900349925448735600f,
+  0.434475960569655710f, -0.900683429228646860f, 0.433785017303678520f,
+  -0.901016403159702330f,
+  0.433093818853152010f, -0.901348847046022030f, 0.432402365624690140f,
+  -0.901680760692037730f,
+  0.431710658025057370f, -0.902012143902493070f, 0.431018696461167080f,
+  -0.902342996482444200f,
+  0.430326481340082610f, -0.902673318237258830f, 0.429634013069016500f,
+  -0.903003108972617040f,
+  0.428941292055329550f, -0.903332368494511820f, 0.428248318706531910f,
+  -0.903661096609247980f,
+  0.427555093430282200f, -0.903989293123443340f, 0.426861616634386490f,
+  -0.904316957844028320f,
+  0.426167888726799620f, -0.904644090578246240f, 0.425473910115623910f,
+  -0.904970691133653250f,
+  0.424779681209108810f, -0.905296759318118820f, 0.424085202415651670f,
+  -0.905622294939825160f,
+  0.423390474143796100f, -0.905947297807268460f, 0.422695496802232950f,
+  -0.906271767729257660f,
+  0.422000270799799790f, -0.906595704514915330f, 0.421304796545479700f,
+  -0.906919107973678030f,
+  0.420609074448402510f, -0.907241977915295930f, 0.419913104917843730f,
+  -0.907564314149832520f,
+  0.419216888363223960f, -0.907886116487666150f, 0.418520425194109700f,
+  -0.908207384739488700f,
+  0.417823715820212380f, -0.908528118716306120f, 0.417126760651387870f,
+  -0.908848318229439120f,
+  0.416429560097637320f, -0.909167983090522270f, 0.415732114569105420f,
+  -0.909487113111505430f,
+  0.415034424476081630f, -0.909805708104652220f, 0.414336490228999210f,
+  -0.910123767882541570f,
+  0.413638312238434560f, -0.910441292258067140f, 0.412939890915108020f,
+  -0.910758281044437570f,
+  0.412241226669883000f, -0.911074734055176250f, 0.411542319913765280f,
+  -0.911390651104122320f,
+  0.410843171057903910f, -0.911706032005429880f, 0.410143780513590350f,
+  -0.912020876573568230f,
+  0.409444148692257590f, -0.912335184623322750f, 0.408744276005481520f,
+  -0.912648955969793900f,
+  0.408044162864978740f, -0.912962190428398100f, 0.407343809682607970f,
+  -0.913274887814867760f,
+  0.406643216870369140f, -0.913587047945250810f, 0.405942384840402570f,
+  -0.913898670635911680f,
+  0.405241314004989860f, -0.914209755703530690f, 0.404540004776553110f,
+  -0.914520302965104450f,
+  0.403838457567654130f, -0.914830312237946090f, 0.403136672790995240f,
+  -0.915139783339685260f,
+  0.402434650859418540f, -0.915448716088267830f, 0.401732392185905010f,
+  -0.915757110301956720f,
+  0.401029897183575790f, -0.916064965799331610f, 0.400327166265690150f,
+  -0.916372282399289140f,
+  0.399624199845646790f, -0.916679059921042700f, 0.398920998336983020f,
+  -0.916985298184122890f,
+  0.398217562153373620f, -0.917290997008377910f, 0.397513891708632330f,
+  -0.917596156213972950f,
+  0.396809987416710420f, -0.917900775621390390f, 0.396105849691696320f,
+  -0.918204855051430900f,
+  0.395401478947816300f, -0.918508394325212250f, 0.394696875599433670f,
+  -0.918811393264169940f,
+  0.393992040061048100f, -0.919113851690057770f, 0.393286972747296570f,
+  -0.919415769424946960f,
+  0.392581674072951530f, -0.919717146291227360f, 0.391876144452922350f,
+  -0.920017982111606570f,
+  0.391170384302253980f, -0.920318276709110480f, 0.390464394036126650f,
+  -0.920618029907083860f,
+  0.389758174069856410f, -0.920917241529189520f, 0.389051724818894500f,
+  -0.921215911399408730f,
+  0.388345046698826300f, -0.921514039342041900f, 0.387638140125372680f,
+  -0.921811625181708120f,
+  0.386931005514388690f, -0.922108668743345070f, 0.386223643281862980f,
+  -0.922405169852209880f,
+  0.385516053843919020f, -0.922701128333878520f, 0.384808237616812930f,
+  -0.922996544014246250f,
+  0.384100195016935040f, -0.923291416719527640f, 0.383391926460808770f,
+  -0.923585746276256560f,
+  0.382683432365089840f, -0.923879532511286740f, 0.381974713146567220f,
+  -0.924172775251791200f,
+  0.381265769222162490f, -0.924465474325262600f, 0.380556601008928570f,
+  -0.924757629559513910f,
+  0.379847208924051110f, -0.925049240782677580f, 0.379137593384847430f,
+  -0.925340307823206200f,
+  0.378427754808765620f, -0.925630830509872720f, 0.377717693613385810f,
+  -0.925920808671769960f,
+  0.377007410216418310f, -0.926210242138311270f, 0.376296905035704790f,
+  -0.926499130739230510f,
+  0.375586178489217330f, -0.926787474304581750f, 0.374875230995057600f,
+  -0.927075272664740100f,
+  0.374164062971457990f, -0.927362525650401110f, 0.373452674836780410f,
+  -0.927649233092581180f,
+  0.372741067009515810f, -0.927935394822617890f, 0.372029239908284960f,
+  -0.928221010672169440f,
+  0.371317193951837600f, -0.928506080473215480f, 0.370604929559051670f,
+  -0.928790604058057020f,
+  0.369892447148934270f, -0.929074581259315750f, 0.369179747140620070f,
+  -0.929358011909935500f,
+  0.368466829953372320f, -0.929640895843181330f, 0.367753696006582090f,
+  -0.929923232892639560f,
+  0.367040345719767240f, -0.930205022892219070f, 0.366326779512573590f,
+  -0.930486265676149780f,
+  0.365612997804773960f, -0.930766961078983710f, 0.364899001016267380f,
+  -0.931047108935595170f,
+  0.364184789567079840f, -0.931326709081180430f, 0.363470363877363870f,
+  -0.931605761351257830f,
+  0.362755724367397230f, -0.931884265581668150f, 0.362040871457584350f,
+  -0.932162221608574320f,
+  0.361325805568454340f, -0.932439629268462360f, 0.360610527120662270f,
+  -0.932716488398140250f,
+  0.359895036534988280f, -0.932992798834738850f, 0.359179334232336560f,
+  -0.933268560415712050f,
+  0.358463420633736540f, -0.933543772978836170f, 0.357747296160342010f,
+  -0.933818436362210960f,
+  0.357030961233430030f, -0.934092550404258870f, 0.356314416274402360f,
+  -0.934366114943725900f,
+  0.355597661704783960f, -0.934639129819680780f, 0.354880697946222790f,
+  -0.934911594871516090f,
+  0.354163525420490510f, -0.935183509938947500f, 0.353446144549480870f,
+  -0.935454874862014620f,
+  0.352728555755210730f, -0.935725689481080370f, 0.352010759459819240f,
+  -0.935995953636831300f,
+  0.351292756085567150f, -0.936265667170278260f, 0.350574546054837570f,
+  -0.936534829922755500f,
+  0.349856129790135030f, -0.936803441735921560f, 0.349137507714085030f,
+  -0.937071502451759190f,
+  0.348418680249434510f, -0.937339011912574960f, 0.347699647819051490f,
+  -0.937605969960999990f,
+  0.346980410845923680f, -0.937872376439989890f, 0.346260969753160170f,
+  -0.938138231192824360f,
+  0.345541324963989150f, -0.938403534063108060f, 0.344821476901759290f,
+  -0.938668284894770170f,
+  0.344101425989938980f, -0.938932483532064490f, 0.343381172652115100f,
+  -0.939196129819569900f,
+  0.342660717311994380f, -0.939459223602189920f, 0.341940060393402300f,
+  -0.939721764725153340f,
+  0.341219202320282410f, -0.939983753034013940f, 0.340498143516697100f,
+  -0.940245188374650880f,
+  0.339776884406826960f, -0.940506070593268300f, 0.339055425414969640f,
+  -0.940766399536396070f,
+  0.338333766965541290f, -0.941026175050889260f, 0.337611909483074680f,
+  -0.941285396983928660f,
+  0.336889853392220050f, -0.941544065183020810f, 0.336167599117744690f,
+  -0.941802179495997650f,
+  0.335445147084531660f, -0.942059739771017310f, 0.334722497717581220f,
+  -0.942316745856563780f,
+  0.333999651442009490f, -0.942573197601446870f, 0.333276608683047980f,
+  -0.942829094854802710f,
+  0.332553369866044220f, -0.943084437466093490f, 0.331829935416461220f,
+  -0.943339225285107720f,
+  0.331106305759876430f, -0.943593458161960390f, 0.330382481321982950f,
+  -0.943847135947092690f,
+  0.329658462528587550f, -0.944100258491272660f, 0.328934249805612200f,
+  -0.944352825645594750f,
+  0.328209843579092660f, -0.944604837261480260f, 0.327485244275178060f,
+  -0.944856293190677210f,
+  0.326760452320131790f, -0.945107193285260610f, 0.326035468140330350f,
+  -0.945357537397632290f,
+  0.325310292162262980f, -0.945607325380521280f, 0.324584924812532150f,
+  -0.945856557086983910f,
+  0.323859366517852960f, -0.946105232370403340f, 0.323133617705052330f,
+  -0.946353351084490590f,
+  0.322407678801070020f, -0.946600913083283530f, 0.321681550232956640f,
+  -0.946847918221148000f,
+  0.320955232427875210f, -0.947094366352777220f, 0.320228725813100020f,
+  -0.947340257333191940f,
+  0.319502030816015750f, -0.947585591017741090f, 0.318775147864118480f,
+  -0.947830367262101010f,
+  0.318048077385015060f, -0.948074585922276230f, 0.317320819806421790f,
+  -0.948318246854599090f,
+  0.316593375556165850f, -0.948561349915730270f, 0.315865745062184070f,
+  -0.948803894962658380f,
+  0.315137928752522440f, -0.949045881852700560f, 0.314409927055336820f,
+  -0.949287310443502010f,
+  0.313681740398891570f, -0.949528180593036670f, 0.312953369211560200f,
+  -0.949768492159606680f,
+  0.312224813921825050f, -0.950008245001843000f, 0.311496074958275970f,
+  -0.950247438978705230f,
+  0.310767152749611470f, -0.950486073949481700f, 0.310038047724638000f,
+  -0.950724149773789610f,
+  0.309308760312268780f, -0.950961666311575080f, 0.308579290941525030f,
+  -0.951198623423113230f,
+  0.307849640041534980f, -0.951435020969008340f, 0.307119808041533100f,
+  -0.951670858810193860f,
+  0.306389795370861080f, -0.951906136807932230f, 0.305659602458966230f,
+  -0.952140854823815830f,
+  0.304929229735402430f, -0.952375012719765880f, 0.304198677629829270f,
+  -0.952608610358033240f,
+  0.303467946572011370f, -0.952841647601198720f, 0.302737036991819140f,
+  -0.953074124312172200f,
+  0.302005949319228200f, -0.953306040354193750f, 0.301274683984318000f,
+  -0.953537395590833280f,
+  0.300543241417273400f, -0.953768189885990330f, 0.299811622048383460f,
+  -0.953998423103894490f,
+  0.299079826308040480f, -0.954228095109105670f, 0.298347854626741570f,
+  -0.954457205766513490f,
+  0.297615707435086310f, -0.954685754941338340f, 0.296883385163778270f,
+  -0.954913742499130520f,
+  0.296150888243623960f, -0.955141168305770670f, 0.295418217105532070f,
+  -0.955368032227470240f,
+  0.294685372180514330f, -0.955594334130771110f, 0.293952353899684770f,
+  -0.955820073882545420f,
+  0.293219162694258680f, -0.956045251349996410f, 0.292485798995553830f,
+  -0.956269866400658140f,
+  0.291752263234989370f, -0.956493918902394990f, 0.291018555844085090f,
+  -0.956717408723403050f,
+  0.290284677254462330f, -0.956940335732208940f, 0.289550627897843140f,
+  -0.957162699797670100f,
+  0.288816408206049480f, -0.957384500788975860f, 0.288082018611004300f,
+  -0.957605738575646240f,
+  0.287347459544729570f, -0.957826413027532910f, 0.286612731439347790f,
+  -0.958046524014818600f,
+  0.285877834727080730f, -0.958266071408017670f, 0.285142769840248720f,
+  -0.958485055077976100f,
+  0.284407537211271820f, -0.958703474895871600f, 0.283672137272668550f,
+  -0.958921330733213060f,
+  0.282936570457055390f, -0.959138622461841890f, 0.282200837197147500f,
+  -0.959355349953930790f,
+  0.281464937925758050f, -0.959571513081984520f, 0.280728873075797190f,
+  -0.959787111718839900f,
+  0.279992643080273380f, -0.960002145737665850f, 0.279256248372291240f,
+  -0.960216615011963430f,
+  0.278519689385053060f, -0.960430519415565790f, 0.277782966551857800f,
+  -0.960643858822638470f,
+  0.277046080306099950f, -0.960856633107679660f, 0.276309031081271030f,
+  -0.961068842145519350f,
+  0.275571819310958250f, -0.961280485811320640f, 0.274834445428843940f,
+  -0.961491563980579000f,
+  0.274096909868706330f, -0.961702076529122540f, 0.273359213064418790f,
+  -0.961912023333112100f,
+  0.272621355449948980f, -0.962121404269041580f, 0.271883337459359890f,
+  -0.962330219213737400f,
+  0.271145159526808070f, -0.962538468044359160f, 0.270406822086544820f,
+  -0.962746150638399410f,
+  0.269668325572915200f, -0.962953266873683880f, 0.268929670420357310f,
+  -0.963159816628371360f,
+  0.268190857063403180f, -0.963365799780954050f, 0.267451885936677740f,
+  -0.963571216210257210f,
+  0.266712757474898420f, -0.963776065795439840f, 0.265973472112875530f,
+  -0.963980348415994110f,
+  0.265234030285511900f, -0.964184063951745720f, 0.264494432427801630f,
+  -0.964387212282854290f,
+  0.263754678974831510f, -0.964589793289812650f, 0.263014770361779060f,
+  -0.964791806853447900f,
+  0.262274707023913590f, -0.964993252854920320f, 0.261534489396595630f,
+  -0.965194131175724720f,
+  0.260794117915275570f, -0.965394441697689400f, 0.260053593015495130f,
+  -0.965594184302976830f,
+  0.259312915132886350f, -0.965793358874083570f, 0.258572084703170390f,
+  -0.965991965293840570f,
+  0.257831102162158930f, -0.966190003445412620f, 0.257089967945753230f,
+  -0.966387473212298790f,
+  0.256348682489942910f, -0.966584374478333120f, 0.255607246230807550f,
+  -0.966780707127683270f,
+  0.254865659604514630f, -0.966976471044852070f, 0.254123923047320620f,
+  -0.967171666114676640f,
+  0.253382036995570270f, -0.967366292222328510f, 0.252640001885695580f,
+  -0.967560349253314360f,
+  0.251897818154216910f, -0.967753837093475510f, 0.251155486237742030f,
+  -0.967946755628987800f,
+  0.250413006572965280f, -0.968139104746362330f, 0.249670379596668520f,
+  -0.968330884332445300f,
+  0.248927605745720260f, -0.968522094274417270f, 0.248184685457074780f,
+  -0.968712734459794780f,
+  0.247441619167773440f, -0.968902804776428870f, 0.246698407314942500f,
+  -0.969092305112506100f,
+  0.245955050335794590f, -0.969281235356548530f, 0.245211548667627680f,
+  -0.969469595397412950f,
+  0.244467902747824210f, -0.969657385124292450f, 0.243724113013852130f,
+  -0.969844604426714830f,
+  0.242980179903263980f, -0.970031253194543970f, 0.242236103853696070f,
+  -0.970217331317979160f,
+  0.241491885302869300f, -0.970402838687555500f, 0.240747524688588540f,
+  -0.970587775194143630f,
+  0.240003022448741500f, -0.970772140728950350f, 0.239258379021300120f,
+  -0.970955935183517970f,
+  0.238513594844318500f, -0.971139158449725090f, 0.237768670355934210f,
+  -0.971321810419786160f,
+  0.237023605994367340f, -0.971503890986251780f, 0.236278402197919620f,
+  -0.971685400042008540f,
+  0.235533059404975460f, -0.971866337480279400f, 0.234787578054001080f,
+  -0.972046703194623500f,
+  0.234041958583543460f, -0.972226497078936270f, 0.233296201432231560f,
+  -0.972405719027449770f,
+  0.232550307038775330f, -0.972584368934732210f, 0.231804275841964780f,
+  -0.972762446695688570f,
+  0.231058108280671280f, -0.972939952205560070f, 0.230311804793845530f,
+  -0.973116885359925130f,
+  0.229565365820518870f, -0.973293246054698250f, 0.228818791799802360f,
+  -0.973469034186130950f,
+  0.228072083170885790f, -0.973644249650811870f, 0.227325240373038830f,
+  -0.973818892345666100f,
+  0.226578263845610110f, -0.973992962167955830f, 0.225831154028026200f,
+  -0.974166459015280320f,
+  0.225083911359792780f, -0.974339382785575860f, 0.224336536280493690f,
+  -0.974511733377115720f,
+  0.223589029229790020f, -0.974683510688510670f, 0.222841390647421280f,
+  -0.974854714618708430f,
+  0.222093620973203590f, -0.975025345066994120f, 0.221345720647030810f,
+  -0.975195401932990370f,
+  0.220597690108873650f, -0.975364885116656870f, 0.219849529798778750f,
+  -0.975533794518291360f,
+  0.219101240156869770f, -0.975702130038528570f, 0.218352821623346430f,
+  -0.975869891578341030f,
+  0.217604274638483670f, -0.976037079039039020f, 0.216855599642632570f,
+  -0.976203692322270560f,
+  0.216106797076219600f, -0.976369731330021140f, 0.215357867379745550f,
+  -0.976535195964614470f,
+  0.214608810993786920f, -0.976700086128711840f, 0.213859628358993830f,
+  -0.976864401725312640f,
+  0.213110319916091360f, -0.977028142657754390f, 0.212360886105878580f,
+  -0.977191308829712280f,
+  0.211611327369227610f, -0.977353900145199960f, 0.210861644147084830f,
+  -0.977515916508569280f,
+  0.210111836880469720f, -0.977677357824509930f, 0.209361906010474190f,
+  -0.977838223998050430f,
+  0.208611851978263460f, -0.977998514934557140f, 0.207861675225075150f,
+  -0.978158230539735050f,
+  0.207111376192218560f, -0.978317370719627650f, 0.206360955321075680f,
+  -0.978475935380616830f,
+  0.205610413053099320f, -0.978633924429423100f, 0.204859749829814420f,
+  -0.978791337773105670f,
+  0.204108966092817010f, -0.978948175319062200f, 0.203358062283773370f,
+  -0.979104436975029250f,
+  0.202607038844421110f, -0.979260122649082020f, 0.201855896216568160f,
+  -0.979415232249634780f,
+  0.201104634842091960f, -0.979569765685440520f, 0.200353255162940420f,
+  -0.979723722865591170f,
+  0.199601757621131050f, -0.979877103699517640f, 0.198850142658750120f,
+  -0.980029908096989980f,
+  0.198098410717953730f, -0.980182135968117320f, 0.197346562240966000f,
+  -0.980333787223347960f,
+  0.196594597670080220f, -0.980484861773469380f, 0.195842517447657990f,
+  -0.980635359529608120f,
+  0.195090322016128330f, -0.980785280403230430f, 0.194338011817988600f,
+  -0.980934624306141640f,
+  0.193585587295803750f, -0.981083391150486590f, 0.192833048892205290f,
+  -0.981231580848749730f,
+  0.192080397049892380f, -0.981379193313754560f, 0.191327632211630990f,
+  -0.981526228458664660f,
+  0.190574754820252800f, -0.981672686196983110f, 0.189821765318656580f,
+  -0.981818566442552500f,
+  0.189068664149806280f, -0.981963869109555240f, 0.188315451756732120f,
+  -0.982108594112513610f,
+  0.187562128582529740f, -0.982252741366289370f, 0.186808695070359330f,
+  -0.982396310786084690f,
+  0.186055151663446630f, -0.982539302287441240f, 0.185301498805082040f,
+  -0.982681715786240860f,
+  0.184547736938619640f, -0.982823551198705240f, 0.183793866507478390f,
+  -0.982964808441396440f,
+  0.183039887955141060f, -0.983105487431216290f, 0.182285801725153320f,
+  -0.983245588085407070f,
+  0.181531608261125130f, -0.983385110321551180f, 0.180777308006728670f,
+  -0.983524054057571260f,
+  0.180022901405699510f, -0.983662419211730250f, 0.179268388901835880f,
+  -0.983800205702631490f,
+  0.178513770938997590f, -0.983937413449218920f, 0.177759047961107140f,
+  -0.984074042370776450f,
+  0.177004220412148860f, -0.984210092386929030f, 0.176249288736167940f,
+  -0.984345563417641900f,
+  0.175494253377271400f, -0.984480455383220930f, 0.174739114779627310f,
+  -0.984614768204312600f,
+  0.173983873387463850f, -0.984748501801904210f, 0.173228529645070490f,
+  -0.984881656097323700f,
+  0.172473083996796030f, -0.985014231012239840f, 0.171717536887049970f,
+  -0.985146226468662230f,
+  0.170961888760301360f, -0.985277642388941220f, 0.170206140061078120f,
+  -0.985408478695768420f,
+  0.169450291233967930f, -0.985538735312176060f, 0.168694342723617440f,
+  -0.985668412161537550f,
+  0.167938294974731230f, -0.985797509167567370f, 0.167182148432072880f,
+  -0.985926026254321130f,
+  0.166425903540464220f, -0.986053963346195440f, 0.165669560744784140f,
+  -0.986181320367928270f,
+  0.164913120489970090f, -0.986308097244598670f, 0.164156583221015890f,
+  -0.986434293901627070f,
+  0.163399949382973230f, -0.986559910264775410f, 0.162643219420950450f,
+  -0.986684946260146690f,
+  0.161886393780111910f, -0.986809401814185420f, 0.161129472905678780f,
+  -0.986933276853677710f,
+  0.160372457242928400f, -0.987056571305750970f, 0.159615347237193090f,
+  -0.987179285097874340f,
+  0.158858143333861390f, -0.987301418157858430f, 0.158100845978377090f,
+  -0.987422970413855410f,
+  0.157343455616238280f, -0.987543941794359230f, 0.156585972692998590f,
+  -0.987664332228205710f,
+  0.155828397654265320f, -0.987784141644572180f, 0.155070730945700510f,
+  -0.987903369972977790f,
+  0.154312973013020240f, -0.988022017143283530f, 0.153555124301993500f,
+  -0.988140083085692570f,
+  0.152797185258443410f, -0.988257567730749460f, 0.152039156328246160f,
+  -0.988374471009341280f,
+  0.151281037957330250f, -0.988490792852696590f, 0.150522830591677370f,
+  -0.988606533192386450f,
+  0.149764534677321620f, -0.988721691960323780f, 0.149006150660348470f,
+  -0.988836269088763540f,
+  0.148247678986896200f, -0.988950264510302990f, 0.147489120103153680f,
+  -0.989063678157881540f,
+  0.146730474455361750f, -0.989176509964781010f, 0.145971742489812370f,
+  -0.989288759864625170f,
+  0.145212924652847520f, -0.989400427791380380f, 0.144454021390860440f,
+  -0.989511513679355190f,
+  0.143695033150294580f, -0.989622017463200780f, 0.142935960377642700f,
+  -0.989731939077910570f,
+  0.142176803519448000f, -0.989841278458820530f, 0.141417563022303130f,
+  -0.989950035541608990f,
+  0.140658239332849240f, -0.990058210262297120f, 0.139898832897777380f,
+  -0.990165802557248400f,
+  0.139139344163826280f, -0.990272812363169110f, 0.138379773577783890f,
+  -0.990379239617108160f,
+  0.137620121586486180f, -0.990485084256456980f, 0.136860388636816430f,
+  -0.990590346218950150f,
+  0.136100575175706200f, -0.990695025442664630f, 0.135340681650134330f,
+  -0.990799121866020370f,
+  0.134580708507126220f, -0.990902635427780010f, 0.133820656193754690f,
+  -0.991005566067049370f,
+  0.133060525157139180f, -0.991107913723276780f, 0.132300315844444680f,
+  -0.991209678336254060f,
+  0.131540028702883280f, -0.991310859846115440f, 0.130779664179711790f,
+  -0.991411458193338540f,
+  0.130019222722233350f, -0.991511473318743900f, 0.129258704777796270f,
+  -0.991610905163495370f,
+  0.128498110793793220f, -0.991709753669099530f, 0.127737441217662280f,
+  -0.991808018777406430f,
+  0.126976696496885980f, -0.991905700430609330f, 0.126215877078990400f,
+  -0.992002798571244520f,
+  0.125454983411546210f, -0.992099313142191800f, 0.124694015942167770f,
+  -0.992195244086673920f,
+  0.123932975118512200f, -0.992290591348257370f, 0.123171861388280650f,
+  -0.992385354870851670f,
+  0.122410675199216280f, -0.992479534598709970f, 0.121649416999105540f,
+  -0.992573130476428810f,
+  0.120888087235777220f, -0.992666142448948020f, 0.120126686357101580f,
+  -0.992758570461551140f,
+  0.119365214810991350f, -0.992850414459865100f, 0.118603673045400840f,
+  -0.992941674389860470f,
+  0.117842061508325020f, -0.993032350197851410f, 0.117080380647800550f,
+  -0.993122441830495580f,
+  0.116318630911904880f, -0.993211949234794500f, 0.115556812748755290f,
+  -0.993300872358093280f,
+  0.114794926606510250f, -0.993389211148080650f, 0.114032972933367300f,
+  -0.993476965552789190f,
+  0.113270952177564360f, -0.993564135520595300f, 0.112508864787378830f,
+  -0.993650721000219120f,
+  0.111746711211126660f, -0.993736721940724600f, 0.110984491897163380f,
+  -0.993822138291519660f,
+  0.110222207293883180f, -0.993906970002356060f, 0.109459857849718030f,
+  -0.993991217023329380f,
+  0.108697444013138670f, -0.994074879304879370f, 0.107934966232653760f,
+  -0.994157956797789730f,
+  0.107172424956808870f, -0.994240449453187900f, 0.106409820634187840f,
+  -0.994322357222545810f,
+  0.105647153713410700f, -0.994403680057679100f, 0.104884424643134970f,
+  -0.994484417910747600f,
+  0.104121633872054730f, -0.994564570734255420f, 0.103358781848899700f,
+  -0.994644138481050710f,
+  0.102595869022436280f, -0.994723121104325700f, 0.101832895841466670f,
+  -0.994801518557617110f,
+  0.101069862754827880f, -0.994879330794805620f, 0.100306770211392820f,
+  -0.994956557770116380f,
+  0.099543618660069444f, -0.995033199438118630f, 0.098780408549799664f,
+  -0.995109255753726110f,
+  0.098017140329560770f, -0.995184726672196820f, 0.097253814448363354f,
+  -0.995259612149133390f,
+  0.096490431355252607f, -0.995333912140482280f, 0.095726991499307315f,
+  -0.995407626602534900f,
+  0.094963495329639061f, -0.995480755491926940f, 0.094199943295393190f,
+  -0.995553298765638470f,
+  0.093436335845747912f, -0.995625256380994310f, 0.092672673429913366f,
+  -0.995696628295663520f,
+  0.091908956497132696f, -0.995767414467659820f, 0.091145185496681130f,
+  -0.995837614855341610f,
+  0.090381360877865011f, -0.995907229417411720f, 0.089617483090022917f,
+  -0.995976258112917790f,
+  0.088853552582524684f, -0.996044700901251970f, 0.088089569804770507f,
+  -0.996112557742151130f,
+  0.087325535206192226f, -0.996179828595696870f, 0.086561449236251239f,
+  -0.996246513422315520f,
+  0.085797312344439880f, -0.996312612182778000f, 0.085033124980280414f,
+  -0.996378124838200210f,
+  0.084268887593324127f, -0.996443051350042630f, 0.083504600633152404f,
+  -0.996507391680110820f,
+  0.082740264549375803f, -0.996571145790554840f, 0.081975879791633108f,
+  -0.996634313643869900f,
+  0.081211446809592386f, -0.996696895202896060f, 0.080446966052950097f,
+  -0.996758890430818000f,
+  0.079682437971430126f, -0.996820299291165670f, 0.078917863014785095f,
+  -0.996881121747813850f,
+  0.078153241632794315f, -0.996941357764982160f, 0.077388574275265049f,
+  -0.997001007307235290f,
+  0.076623861392031617f, -0.997060070339482960f, 0.075859103432954503f,
+  -0.997118546826979980f,
+  0.075094300847921291f, -0.997176436735326190f, 0.074329454086845867f,
+  -0.997233740030466160f,
+  0.073564563599667454f, -0.997290456678690210f, 0.072799629836351618f,
+  -0.997346586646633230f,
+  0.072034653246889416f, -0.997402129901275300f, 0.071269634281296415f,
+  -0.997457086409941910f,
+  0.070504573389614009f, -0.997511456140303450f, 0.069739471021907376f,
+  -0.997565239060375750f,
+  0.068974327628266732f, -0.997618435138519550f, 0.068209143658806454f,
+  -0.997671044343441000f,
+  0.067443919563664106f, -0.997723066644191640f, 0.066678655793001543f,
+  -0.997774502010167820f,
+  0.065913352797003930f, -0.997825350411111640f, 0.065148011025878860f,
+  -0.997875611817110150f,
+  0.064382630929857410f, -0.997925286198596000f, 0.063617212959193190f,
+  -0.997974373526346990f,
+  0.062851757564161420f, -0.998022873771486240f, 0.062086265195060247f,
+  -0.998070786905482340f,
+  0.061320736302208648f, -0.998118112900149180f, 0.060555171335947781f,
+  -0.998164851727646240f,
+  0.059789570746640007f, -0.998211003360478190f, 0.059023934984667986f,
+  -0.998256567771495180f,
+  0.058258264500435732f, -0.998301544933892890f, 0.057492559744367684f,
+  -0.998345934821212370f,
+  0.056726821166907783f, -0.998389737407340160f, 0.055961049218520520f,
+  -0.998432952666508440f,
+  0.055195244349690031f, -0.998475580573294770f, 0.054429407010919147f,
+  -0.998517621102622210f,
+  0.053663537652730679f, -0.998559074229759310f, 0.052897636725665401f,
+  -0.998599939930320370f,
+  0.052131704680283317f, -0.998640218180265270f, 0.051365741967162731f,
+  -0.998679908955899090f,
+  0.050599749036899337f, -0.998719012233872940f, 0.049833726340107257f,
+  -0.998757527991183340f,
+  0.049067674327418126f, -0.998795456205172410f, 0.048301593449480172f,
+  -0.998832796853527990f,
+  0.047535484156959261f, -0.998869549914283560f, 0.046769346900537960f,
+  -0.998905715365818290f,
+  0.046003182130914644f, -0.998941293186856870f, 0.045236990298804750f,
+  -0.998976283356469820f,
+  0.044470771854938744f, -0.999010685854073380f, 0.043704527250063421f,
+  -0.999044500659429290f,
+  0.042938256934940959f, -0.999077727752645360f, 0.042171961360348002f,
+  -0.999110367114174890f,
+  0.041405640977076712f, -0.999142418724816910f, 0.040639296235933854f,
+  -0.999173882565716380f,
+  0.039872927587739845f, -0.999204758618363890f, 0.039106535483329839f,
+  -0.999235046864595850f,
+  0.038340120373552791f, -0.999264747286594420f, 0.037573682709270514f,
+  -0.999293859866887790f,
+  0.036807222941358991f, -0.999322384588349540f, 0.036040741520706299f,
+  -0.999350321434199440f,
+  0.035274238898213947f, -0.999377670388002850f, 0.034507715524795889f,
+  -0.999404431433671300f,
+  0.033741171851377642f, -0.999430604555461730f, 0.032974608328897315f,
+  -0.999456189737977340f,
+  0.032208025408304704f, -0.999481186966166950f, 0.031441423540560343f,
+  -0.999505596225325310f,
+  0.030674803176636581f, -0.999529417501093140f, 0.029908164767516655f,
+  -0.999552650779456990f,
+  0.029141508764193740f, -0.999575296046749220f, 0.028374835617672258f,
+  -0.999597353289648380f,
+  0.027608145778965820f, -0.999618822495178640f, 0.026841439699098527f,
+  -0.999639703650710200f,
+  0.026074717829104040f, -0.999659996743959220f, 0.025307980620024630f,
+  -0.999679701762987930f,
+  0.024541228522912264f, -0.999698818696204250f, 0.023774461988827676f,
+  -0.999717347532362190f,
+  0.023007681468839410f, -0.999735288260561680f, 0.022240887414024919f,
+  -0.999752640870248840f,
+  0.021474080275469605f, -0.999769405351215280f, 0.020707260504265912f,
+  -0.999785581693599210f,
+  0.019940428551514598f, -0.999801169887884260f, 0.019173584868322699f,
+  -0.999816169924900410f,
+  0.018406729905804820f, -0.999830581795823400f, 0.017639864115082195f,
+  -0.999844405492175240f,
+  0.016872987947281773f, -0.999857641005823860f, 0.016106101853537263f,
+  -0.999870288328982950f,
+  0.015339206284988220f, -0.999882347454212560f, 0.014572301692779104f,
+  -0.999893818374418490f,
+  0.013805388528060349f, -0.999904701082852900f, 0.013038467241987433f,
+  -0.999914995573113470f,
+  0.012271538285719944f, -0.999924701839144500f, 0.011504602110422875f,
+  -0.999933819875236000f,
+  0.010737659167264572f, -0.999942349676023910f, 0.009970709907418029f,
+  -0.999950291236490480f,
+  0.009203754782059960f, -0.999957644551963900f, 0.008436794242369860f,
+  -0.999964409618118280f,
+  0.007669828739531077f, -0.999970586430974140f, 0.006902858724729877f,
+  -0.999976174986897610f,
+  0.006135884649154515f, -0.999981175282601110f, 0.005368906963996303f,
+  -0.999985587315143200f,
+  0.004601926120448672f, -0.999989411081928400f, 0.003834942569706248f,
+  -0.999992646580707190f,
+  0.003067956762966138f, -0.999995293809576190f, 0.002300969151425887f,
+  -0.999997352766978210f,
+  0.001533980186284766f, -0.999998823451701880f, 0.000766990318742846f,
+  -0.999999705862882230f
+};
+    const float32_t cos_factors_2048[2048] = {
+  0.999999926465717890f, 0.999999338191525530f, 0.999998161643486980f,
+  0.999996396822294350f,
+  0.999994043728985820f, 0.999991102364945590f, 0.999987572731904080f,
+  0.999983454831937730f,
+  0.999978748667468830f, 0.999973454241265940f, 0.999967571556443780f,
+  0.999961100616462820f,
+  0.999954041425129780f, 0.999946393986597460f, 0.999938158305364590f,
+  0.999929334386276070f,
+  0.999919922234522750f, 0.999909921855641540f, 0.999899333255515390f,
+  0.999888156440373320f,
+  0.999876391416790410f, 0.999864038191687680f, 0.999851096772332190f,
+  0.999837567166337090f,
+  0.999823449381661570f, 0.999808743426610520f, 0.999793449309835270f,
+  0.999777567040332940f,
+  0.999761096627446610f, 0.999744038080865430f, 0.999726391410624470f,
+  0.999708156627104880f,
+  0.999689333741033640f, 0.999669922763483760f, 0.999649923705874240f,
+  0.999629336579970110f,
+  0.999608161397882110f, 0.999586398172067070f, 0.999564046915327740f,
+  0.999541107640812940f,
+  0.999517580362016990f, 0.999493465092780590f, 0.999468761847290050f,
+  0.999443470640077770f,
+  0.999417591486021720f, 0.999391124400346050f, 0.999364069398620550f,
+  0.999336426496761240f,
+  0.999308195711029470f, 0.999279377058032710f, 0.999249970554724420f,
+  0.999219976218403530f,
+  0.999189394066714920f, 0.999158224117649430f, 0.999126466389543390f,
+  0.999094120901079070f,
+  0.999061187671284600f, 0.999027666719533690f, 0.998993558065545680f,
+  0.998958861729386080f,
+  0.998923577731465780f, 0.998887706092541290f, 0.998851246833715180f,
+  0.998814199976435390f,
+  0.998776565542495610f, 0.998738343554035230f, 0.998699534033539280f,
+  0.998660137003838490f,
+  0.998620152488108870f, 0.998579580509872500f, 0.998538421092996730f,
+  0.998496674261694640f,
+  0.998454340040524800f, 0.998411418454391300f, 0.998367909528543820f,
+  0.998323813288577560f,
+  0.998279129760433200f, 0.998233858970396850f, 0.998188000945100300f,
+  0.998141555711520520f,
+  0.998094523296980010f, 0.998046903729146840f, 0.997998697036034390f,
+  0.997949903246001190f,
+  0.997900522387751620f, 0.997850554490335110f, 0.997799999583146470f,
+  0.997748857695925690f,
+  0.997697128858758500f, 0.997644813102075420f, 0.997591910456652630f,
+  0.997538420953611340f,
+  0.997484344624417930f, 0.997429681500884180f, 0.997374431615167150f,
+  0.997318594999768600f,
+  0.997262171687536170f, 0.997205161711661850f, 0.997147565105683480f,
+  0.997089381903483400f,
+  0.997030612139289450f, 0.996971255847674320f, 0.996911313063555740f,
+  0.996850783822196610f,
+  0.996789668159204560f, 0.996727966110532490f, 0.996665677712478160f,
+  0.996602803001684130f,
+  0.996539342015137940f, 0.996475294790172160f, 0.996410661364464100f,
+  0.996345441776035900f,
+  0.996279636063254650f, 0.996213244264832040f, 0.996146266419824620f,
+  0.996078702567633980f,
+  0.996010552748005870f, 0.995941817001031350f, 0.995872495367145730f,
+  0.995802587887129160f,
+  0.995732094602106430f, 0.995661015553546910f, 0.995589350783264600f,
+  0.995517100333418110f,
+  0.995444264246510340f, 0.995370842565388990f, 0.995296835333246090f,
+  0.995222242593618360f,
+  0.995147064390386470f, 0.995071300767776170f, 0.994994951770357020f,
+  0.994918017443043200f,
+  0.994840497831093180f, 0.994762392980109930f, 0.994683702936040250f,
+  0.994604427745175660f,
+  0.994524567454151740f, 0.994444122109948040f, 0.994363091759888570f,
+  0.994281476451641550f,
+  0.994199276233218910f, 0.994116491152977070f, 0.994033121259616400f,
+  0.993949166602181130f,
+  0.993864627230059750f, 0.993779503192984580f, 0.993693794541031790f,
+  0.993607501324621610f,
+  0.993520623594518090f, 0.993433161401829360f, 0.993345114798006910f,
+  0.993256483834846440f,
+  0.993167268564487230f, 0.993077469039412300f, 0.992987085312448390f,
+  0.992896117436765980f,
+  0.992804565465879140f, 0.992712429453645460f, 0.992619709454266140f,
+  0.992526405522286100f,
+  0.992432517712593660f, 0.992338046080420420f, 0.992242990681341700f,
+  0.992147351571276090f,
+  0.992051128806485720f, 0.991954322443575950f, 0.991856932539495470f,
+  0.991758959151536110f,
+  0.991660402337333210f, 0.991561262154865290f, 0.991461538662453790f,
+  0.991361231918763460f,
+  0.991260341982802440f, 0.991158868913921350f, 0.991056812771814340f,
+  0.990954173616518500f,
+  0.990850951508413620f, 0.990747146508222710f, 0.990642758677011570f,
+  0.990537788076188750f,
+  0.990432234767505970f, 0.990326098813057330f, 0.990219380275280000f,
+  0.990112079216953770f,
+  0.990004195701200910f, 0.989895729791486660f, 0.989786681551618640f,
+  0.989677051045747210f,
+  0.989566838338365120f, 0.989456043494307710f, 0.989344666578752640f,
+  0.989232707657220050f,
+  0.989120166795572690f, 0.989007044060015270f, 0.988893339517095130f,
+  0.988779053233701520f,
+  0.988664185277066230f, 0.988548735714763200f, 0.988432704614708340f,
+  0.988316092045159690f,
+  0.988198898074717610f, 0.988081122772324070f, 0.987962766207263420f,
+  0.987843828449161740f,
+  0.987724309567986960f, 0.987604209634049160f, 0.987483528717999710f,
+  0.987362266890832400f,
+  0.987240424223882250f, 0.987118000788826280f, 0.986994996657682980f,
+  0.986871411902812470f,
+  0.986747246596916590f, 0.986622500813038480f, 0.986497174624562880f,
+  0.986371268105216030f,
+  0.986244781329065460f, 0.986117714370520090f, 0.985990067304330140f,
+  0.985861840205586980f,
+  0.985733033149723490f, 0.985603646212513400f, 0.985473679470071810f,
+  0.985343132998854790f,
+  0.985212006875659350f, 0.985080301177623800f, 0.984948015982227030f,
+  0.984815151367289140f,
+  0.984681707410970940f, 0.984547684191773960f, 0.984413081788540700f,
+  0.984277900280454370f,
+  0.984142139747038570f, 0.984005800268157870f, 0.983868881924017220f,
+  0.983731384795162090f,
+  0.983593308962478650f, 0.983454654507193270f, 0.983315421510872810f,
+  0.983175610055424420f,
+  0.983035220223095640f, 0.982894252096474070f, 0.982752705758487830f,
+  0.982610581292404750f,
+  0.982467878781833170f, 0.982324598310721280f, 0.982180739963357090f,
+  0.982036303824369020f,
+  0.981891289978725100f, 0.981745698511732990f, 0.981599529509040720f,
+  0.981452783056635520f,
+  0.981305459240844670f, 0.981157558148334830f, 0.981009079866112630f,
+  0.980860024481523870f,
+  0.980710392082253970f, 0.980560182756327840f, 0.980409396592109910f,
+  0.980258033678303550f,
+  0.980106094103951770f, 0.979953577958436740f, 0.979800485331479790f,
+  0.979646816313141210f,
+  0.979492570993820810f, 0.979337749464256780f, 0.979182351815526930f,
+  0.979026378139047580f,
+  0.978869828526574120f, 0.978712703070200420f, 0.978555001862359550f,
+  0.978396724995823090f,
+  0.978237872563701090f, 0.978078444659442380f, 0.977918441376834370f,
+  0.977757862810002760f,
+  0.977596709053411890f, 0.977434980201864260f, 0.977272676350500860f,
+  0.977109797594800880f,
+  0.976946344030581670f, 0.976782315753998650f, 0.976617712861545640f,
+  0.976452535450054060f,
+  0.976286783616693630f, 0.976120457458971910f, 0.975953557074734300f,
+  0.975786082562163930f,
+  0.975618034019781750f, 0.975449411546446380f, 0.975280215241354220f,
+  0.975110445204038890f,
+  0.974940101534371830f, 0.974769184332561770f, 0.974597693699155050f,
+  0.974425629735034990f,
+  0.974252992541422500f, 0.974079782219875680f, 0.973905998872289570f,
+  0.973731642600896400f,
+  0.973556713508265560f, 0.973381211697303290f, 0.973205137271252800f,
+  0.973028490333694210f,
+  0.972851270988544180f, 0.972673479340056430f, 0.972495115492821190f,
+  0.972316179551765300f,
+  0.972136671622152230f, 0.971956591809581720f, 0.971775940219990140f,
+  0.971594716959650160f,
+  0.971412922135170940f, 0.971230555853497380f, 0.971047618221911100f,
+  0.970864109348029470f,
+  0.970680029339806130f, 0.970495378305530560f, 0.970310156353828110f,
+  0.970124363593660280f,
+  0.969938000134323960f, 0.969751066085452140f, 0.969563561557013180f,
+  0.969375486659311280f,
+  0.969186841502985950f, 0.968997626199012420f, 0.968807840858700970f,
+  0.968617485593697540f,
+  0.968426560515983190f, 0.968235065737874320f, 0.968043001372022260f,
+  0.967850367531413620f,
+  0.967657164329369880f, 0.967463391879547550f, 0.967269050295937790f,
+  0.967074139692867040f,
+  0.966878660184995910f, 0.966682611887320080f, 0.966485994915169840f,
+  0.966288809384209690f,
+  0.966091055410438830f, 0.965892733110190860f, 0.965693842600133690f,
+  0.965494383997269500f,
+  0.965294357418934660f, 0.965093762982799590f, 0.964892600806868890f,
+  0.964690871009481030f,
+  0.964488573709308410f, 0.964285709025357480f, 0.964082277076968140f,
+  0.963878277983814200f,
+  0.963673711865903230f, 0.963468578843575950f, 0.963262879037507070f,
+  0.963056612568704340f,
+  0.962849779558509030f, 0.962642380128595710f, 0.962434414400972100f,
+  0.962225882497979020f,
+  0.962016784542290560f, 0.961807120656913540f, 0.961596890965187860f,
+  0.961386095590786250f,
+  0.961174734657714080f, 0.960962808290309780f, 0.960750316613243950f,
+  0.960537259751520050f,
+  0.960323637830473920f, 0.960109450975773940f, 0.959894699313420530f,
+  0.959679382969746750f,
+  0.959463502071417510f, 0.959247056745430090f, 0.959030047119113660f,
+  0.958812473320129310f,
+  0.958594335476470220f, 0.958375633716461170f, 0.958156368168758820f,
+  0.957936538962351420f,
+  0.957716146226558870f, 0.957495190091032570f, 0.957273670685755200f,
+  0.957051588141040970f,
+  0.956828942587535370f, 0.956605734156215080f, 0.956381962978387730f,
+  0.956157629185692140f,
+  0.955932732910098280f, 0.955707274283906560f, 0.955481253439748770f,
+  0.955254670510586990f,
+  0.955027525629714160f, 0.954799818930753720f, 0.954571550547659630f,
+  0.954342720614716480f,
+  0.954113329266538800f, 0.953883376638071770f, 0.953652862864590500f,
+  0.953421788081700310f,
+  0.953190152425336670f, 0.952957956031764700f, 0.952725199037579570f,
+  0.952491881579706320f,
+  0.952258003795399600f, 0.952023565822243570f, 0.951788567798152130f,
+  0.951553009861368590f,
+  0.951316892150465550f, 0.951080214804345010f, 0.950842977962238160f,
+  0.950605181763705340f,
+  0.950366826348635780f, 0.950127911857248100f, 0.949888438430089300f,
+  0.949648406208035480f,
+  0.949407815332291570f, 0.949166665944390700f, 0.948924958186195160f,
+  0.948682692199895090f,
+  0.948439868128009620f, 0.948196486113385580f, 0.947952546299198670f,
+  0.947708048828952100f,
+  0.947462993846477700f, 0.947217381495934820f, 0.946971211921810880f,
+  0.946724485268921170f,
+  0.946477201682408680f, 0.946229361307743820f, 0.945980964290724760f,
+  0.945732010777477150f,
+  0.945482500914453740f, 0.945232434848435000f, 0.944981812726528150f,
+  0.944730634696167800f,
+  0.944478900905115550f, 0.944226611501459810f, 0.943973766633615980f,
+  0.943720366450326200f,
+  0.943466411100659320f, 0.943211900734010620f, 0.942956835500102120f,
+  0.942701215548981900f,
+  0.942445041031024890f, 0.942188312096931770f, 0.941931028897729620f,
+  0.941673191584771360f,
+  0.941414800309736340f, 0.941155855224629190f, 0.940896356481780830f,
+  0.940636304233847590f,
+  0.940375698633811540f, 0.940114539834980280f, 0.939852827990986680f,
+  0.939590563255789270f,
+  0.939327745783671400f, 0.939064375729241950f, 0.938800453247434770f,
+  0.938535978493508560f,
+  0.938270951623047190f, 0.938005372791958840f, 0.937739242156476970f,
+  0.937472559873159250f,
+  0.937205326098887960f, 0.936937540990869900f, 0.936669204706636170f,
+  0.936400317404042060f,
+  0.936130879241267030f, 0.935860890376814640f, 0.935590350969512370f,
+  0.935319261178511610f,
+  0.935047621163287430f, 0.934775431083638700f, 0.934502691099687870f,
+  0.934229401371880820f,
+  0.933955562060986730f, 0.933681173328098410f, 0.933406235334631520f,
+  0.933130748242325230f,
+  0.932854712213241120f, 0.932578127409764420f, 0.932300993994602760f,
+  0.932023312130786490f,
+  0.931745081981668720f, 0.931466303710925090f, 0.931186977482553750f,
+  0.930907103460875130f,
+  0.930626681810531760f, 0.930345712696488470f, 0.930064196284032360f,
+  0.929782132738772190f,
+  0.929499522226638560f, 0.929216364913884040f, 0.928932660967082820f,
+  0.928648410553130520f,
+  0.928363613839244370f, 0.928078270992963140f, 0.927792382182146320f,
+  0.927505947574975180f,
+  0.927218967339951790f, 0.926931441645899130f, 0.926643370661961230f,
+  0.926354754557602860f,
+  0.926065593502609310f, 0.925775887667086740f, 0.925485637221461490f,
+  0.925194842336480530f,
+  0.924903503183210910f, 0.924611619933039970f, 0.924319192757675160f,
+  0.924026221829143850f,
+  0.923732707319793290f, 0.923438649402290370f, 0.923144048249621930f,
+  0.922848904035094120f,
+  0.922553216932332830f, 0.922256987115283030f, 0.921960214758209220f,
+  0.921662900035694730f,
+  0.921365043122642340f, 0.921066644194273640f, 0.920767703426128790f,
+  0.920468220994067110f,
+  0.920168197074266340f, 0.919867631843222950f, 0.919566525477751530f,
+  0.919264878154985370f,
+  0.918962690052375630f, 0.918659961347691900f, 0.918356692219021720f,
+  0.918052882844770380f,
+  0.917748533403661250f, 0.917443644074735220f, 0.917138215037350710f,
+  0.916832246471183890f,
+  0.916525738556228210f, 0.916218691472794220f, 0.915911105401509880f,
+  0.915602980523320230f,
+  0.915294317019487050f, 0.914985115071589310f, 0.914675374861522390f,
+  0.914365096571498560f,
+  0.914054280384046570f, 0.913742926482011390f, 0.913431035048554720f,
+  0.913118606267154240f,
+  0.912805640321603500f, 0.912492137396012650f, 0.912178097674807180f,
+  0.911863521342728520f,
+  0.911548408584833990f, 0.911232759586496190f, 0.910916574533403360f,
+  0.910599853611558930f,
+  0.910282597007281760f, 0.909964804907205660f, 0.909646477498279540f,
+  0.909327614967767260f,
+  0.909008217503247450f, 0.908688285292613360f, 0.908367818524072890f,
+  0.908046817386148340f,
+  0.907725282067676440f, 0.907403212757808110f, 0.907080609646008450f,
+  0.906757472922056550f,
+  0.906433802776045460f, 0.906109599398381980f, 0.905784862979786550f,
+  0.905459593711293250f,
+  0.905133791784249690f, 0.904807457390316540f, 0.904480590721468250f,
+  0.904153191969991780f,
+  0.903825261328487510f, 0.903496798989868450f, 0.903167805147360720f,
+  0.902838279994502830f,
+  0.902508223725145940f, 0.902177636533453620f, 0.901846518613901750f,
+  0.901514870161278740f,
+  0.901182691370684520f, 0.900849982437531450f, 0.900516743557543520f,
+  0.900182974926756810f,
+  0.899848676741518580f, 0.899513849198487980f, 0.899178492494635330f,
+  0.898842606827242370f,
+  0.898506192393901950f, 0.898169249392518080f, 0.897831778021305650f,
+  0.897493778478790310f,
+  0.897155250963808550f, 0.896816195675507300f, 0.896476612813344120f,
+  0.896136502577086770f,
+  0.895795865166813530f, 0.895454700782912450f, 0.895113009626081760f,
+  0.894770791897329550f,
+  0.894428047797973800f, 0.894084777529641990f, 0.893740981294271040f,
+  0.893396659294107720f,
+  0.893051811731707450f, 0.892706438809935390f, 0.892360540731965360f,
+  0.892014117701280470f,
+  0.891667169921672280f, 0.891319697597241390f, 0.890971700932396860f,
+  0.890623180131855930f,
+  0.890274135400644600f, 0.889924566944096720f, 0.889574474967854580f,
+  0.889223859677868210f,
+  0.888872721280395630f, 0.888521059982002260f, 0.888168875989561730f,
+  0.887816169510254440f,
+  0.887462940751568840f, 0.887109189921300170f, 0.886754917227550840f,
+  0.886400122878730600f,
+  0.886044807083555600f, 0.885688970051048960f, 0.885332611990540590f,
+  0.884975733111666660f,
+  0.884618333624369920f, 0.884260413738899190f, 0.883901973665809470f,
+  0.883543013615961880f,
+  0.883183533800523390f, 0.882823534430966620f, 0.882463015719070150f,
+  0.882101977876917580f,
+  0.881740421116898320f, 0.881378345651706920f, 0.881015751694342870f,
+  0.880652639458111010f,
+  0.880289009156621010f, 0.879924861003786860f, 0.879560195213827890f,
+  0.879195012001267480f,
+  0.878829311580933360f, 0.878463094167957870f, 0.878096359977777130f,
+  0.877729109226131570f,
+  0.877361342129065140f, 0.876993058902925890f, 0.876624259764365310f,
+  0.876254944930338510f,
+  0.875885114618103810f, 0.875514769045222850f, 0.875143908429560360f,
+  0.874772532989284150f,
+  0.874400642942864790f, 0.874028238509075740f, 0.873655319906992630f,
+  0.873281887355994210f,
+  0.872907941075761080f, 0.872533481286276170f, 0.872158508207824480f,
+  0.871783022060993120f,
+  0.871407023066670950f, 0.871030511446048260f, 0.870653487420617430f,
+  0.870275951212171940f,
+  0.869897903042806340f, 0.869519343134916860f, 0.869140271711200560f,
+  0.868760688994655310f,
+  0.868380595208579800f, 0.867999990576573510f, 0.867618875322536230f,
+  0.867237249670668400f,
+  0.866855113845470430f, 0.866472468071743050f, 0.866089312574586770f,
+  0.865705647579402380f,
+  0.865321473311889800f, 0.864936789998049020f, 0.864551597864179340f,
+  0.864165897136879300f,
+  0.863779688043046720f, 0.863392970809878420f, 0.863005745664870320f,
+  0.862618012835816740f,
+  0.862229772550811240f, 0.861841025038245330f, 0.861451770526809320f,
+  0.861062009245491480f,
+  0.860671741423578380f, 0.860280967290654510f, 0.859889687076602290f,
+  0.859497901011601730f,
+  0.859105609326130450f, 0.858712812250963520f, 0.858319510017173440f,
+  0.857925702856129790f,
+  0.857531390999499150f, 0.857136574679244980f, 0.856741254127627470f,
+  0.856345429577203610f,
+  0.855949101260826910f, 0.855552269411646860f, 0.855154934263109620f,
+  0.854757096048957220f,
+  0.854358755003227440f, 0.853959911360254180f, 0.853560565354666840f,
+  0.853160717221390420f,
+  0.852760367195645300f, 0.852359515512947090f, 0.851958162409106380f,
+  0.851556308120228980f,
+  0.851153952882715340f, 0.850751096933260790f, 0.850347740508854980f,
+  0.849943883846782210f,
+  0.849539527184620890f, 0.849134670760243630f, 0.848729314811817130f,
+  0.848323459577801640f,
+  0.847917105296951410f, 0.847510252208314330f, 0.847102900551231500f,
+  0.846695050565337450f,
+  0.846286702490559710f, 0.845877856567119000f, 0.845468513035528830f,
+  0.845058672136595470f,
+  0.844648334111417820f, 0.844237499201387020f, 0.843826167648186740f,
+  0.843414339693792760f,
+  0.843002015580472940f, 0.842589195550786710f, 0.842175879847585570f,
+  0.841762068714012490f,
+  0.841347762393501950f, 0.840932961129779780f, 0.840517665166862550f,
+  0.840101874749058400f,
+  0.839685590120966110f, 0.839268811527475230f, 0.838851539213765760f,
+  0.838433773425308340f,
+  0.838015514407863820f, 0.837596762407483040f, 0.837177517670507300f,
+  0.836757780443567190f,
+  0.836337550973583530f, 0.835916829507766360f, 0.835495616293615350f,
+  0.835073911578919410f,
+  0.834651715611756440f, 0.834229028640493420f, 0.833805850913786340f,
+  0.833382182680579730f,
+  0.832958024190106670f, 0.832533375691888680f, 0.832108237435735590f,
+  0.831682609671745120f,
+  0.831256492650303210f, 0.830829886622083570f, 0.830402791838047550f,
+  0.829975208549443950f,
+  0.829547137007808910f, 0.829118577464965980f, 0.828689530173025820f,
+  0.828259995384385660f,
+  0.827829973351729920f, 0.827399464328029470f, 0.826968468566541600f,
+  0.826536986320809960f,
+  0.826105017844664610f, 0.825672563392221390f, 0.825239623217882250f,
+  0.824806197576334330f,
+  0.824372286722551250f, 0.823937890911791370f, 0.823503010399598500f,
+  0.823067645441801670f,
+  0.822631796294514990f, 0.822195463214137170f, 0.821758646457351750f,
+  0.821321346281126740f,
+  0.820883562942714580f, 0.820445296699652050f, 0.820006547809759680f,
+  0.819567316531142230f,
+  0.819127603122188240f, 0.818687407841569680f, 0.818246730948242070f,
+  0.817805572701444270f,
+  0.817363933360698460f, 0.816921813185809480f, 0.816479212436865390f,
+  0.816036131374236810f,
+  0.815592570258576790f, 0.815148529350820830f, 0.814704008912187080f,
+  0.814259009204175270f,
+  0.813813530488567190f, 0.813367573027426570f, 0.812921137083098770f,
+  0.812474222918210480f,
+  0.812026830795669730f, 0.811578960978665890f, 0.811130613730669190f,
+  0.810681789315430780f,
+  0.810232487996982330f, 0.809782710039636530f, 0.809332455707985950f,
+  0.808881725266903610f,
+  0.808430518981542720f, 0.807978837117336310f, 0.807526679939997160f,
+  0.807074047715517610f,
+  0.806620940710169650f, 0.806167359190504420f, 0.805713303423352230f,
+  0.805258773675822210f,
+  0.804803770215302920f, 0.804348293309460780f, 0.803892343226241260f,
+  0.803435920233868120f,
+  0.802979024600843250f, 0.802521656595946430f, 0.802063816488235440f,
+  0.801605504547046150f,
+  0.801146721041991360f, 0.800687466242961610f, 0.800227740420124790f,
+  0.799767543843925680f,
+  0.799306876785086160f, 0.798845739514604580f, 0.798384132303756380f,
+  0.797922055424093000f,
+  0.797459509147442460f, 0.796996493745908750f, 0.796533009491872000f,
+  0.796069056657987990f,
+  0.795604635517188070f, 0.795139746342679590f, 0.794674389407944550f,
+  0.794208564986740640f,
+  0.793742273353100210f, 0.793275514781330630f, 0.792808289546014120f,
+  0.792340597922007170f,
+  0.791872440184440470f, 0.791403816608719500f, 0.790934727470523290f,
+  0.790465173045804880f,
+  0.789995153610791090f, 0.789524669441982190f, 0.789053720816151880f,
+  0.788582308010347120f,
+  0.788110431301888070f, 0.787638090968367450f, 0.787165287287651010f,
+  0.786692020537876790f,
+  0.786218290997455660f, 0.785744098945070360f, 0.785269444659675850f,
+  0.784794328420499230f,
+  0.784318750507038920f, 0.783842711199065230f, 0.783366210776619720f,
+  0.782889249520015480f,
+  0.782411827709836530f, 0.781933945626937630f, 0.781455603552444590f,
+  0.780976801767753750f,
+  0.780497540554531910f, 0.780017820194715990f, 0.779537640970513260f,
+  0.779057003164400630f,
+  0.778575907059125050f, 0.778094352937702790f, 0.777612341083420030f,
+  0.777129871779831620f,
+  0.776646945310762060f, 0.776163561960304340f, 0.775679722012820650f,
+  0.775195425752941420f,
+  0.774710673465565550f, 0.774225465435860680f, 0.773739801949261840f,
+  0.773253683291472590f,
+  0.772767109748463850f, 0.772280081606474320f, 0.771792599152010150f,
+  0.771304662671844830f,
+  0.770816272453018540f, 0.770327428782838890f, 0.769838131948879840f,
+  0.769348382238982280f,
+  0.768858179941253270f, 0.768367525344066270f, 0.767876418736060610f,
+  0.767384860406141730f,
+  0.766892850643480670f, 0.766400389737514230f, 0.765907477977944340f,
+  0.765414115654738270f,
+  0.764920303058128410f, 0.764426040478612070f, 0.763931328206951090f,
+  0.763436166534172010f,
+  0.762940555751565720f, 0.762444496150687210f, 0.761947988023355390f,
+  0.761451031661653620f,
+  0.760953627357928150f, 0.760455775404789260f, 0.759957476095110330f,
+  0.759458729722028210f,
+  0.758959536578942440f, 0.758459896959515430f, 0.757959811157672300f,
+  0.757459279467600720f,
+  0.756958302183750490f, 0.756456879600833740f, 0.755955012013824420f,
+  0.755452699717958250f,
+  0.754949943008732640f, 0.754446742181906440f, 0.753943097533499640f,
+  0.753439009359793580f,
+  0.752934477957330150f, 0.752429503622912390f, 0.751924086653603550f,
+  0.751418227346727470f,
+  0.750911925999867890f, 0.750405182910869330f, 0.749897998377835330f,
+  0.749390372699129560f,
+  0.748882306173375150f, 0.748373799099454560f, 0.747864851776509410f,
+  0.747355464503940190f,
+  0.746845637581406540f, 0.746335371308826320f, 0.745824665986376090f,
+  0.745313521914490520f,
+  0.744801939393862630f, 0.744289918725443260f, 0.743777460210440890f,
+  0.743264564150321600f,
+  0.742751230846809050f, 0.742237460601884000f, 0.741723253717784140f,
+  0.741208610497004260f,
+  0.740693531242295760f, 0.740178016256666240f, 0.739662065843380010f,
+  0.739145680305957510f,
+  0.738628859948174840f, 0.738111605074064260f, 0.737593915987913570f,
+  0.737075792994265730f,
+  0.736557236397919150f, 0.736038246503927350f, 0.735518823617598900f,
+  0.734998968044496710f,
+  0.734478680090438370f, 0.733957960061495940f, 0.733436808263995710f,
+  0.732915225004517780f,
+  0.732393210589896040f, 0.731870765327218290f, 0.731347889523825570f,
+  0.730824583487312160f,
+  0.730300847525525490f, 0.729776681946566090f, 0.729252087058786970f,
+  0.728727063170793830f,
+  0.728201610591444610f, 0.727675729629849610f, 0.727149420595371020f,
+  0.726622683797622850f,
+  0.726095519546471000f, 0.725567928152032300f, 0.725039909924675370f,
+  0.724511465175019630f,
+  0.723982594213935520f, 0.723453297352544380f, 0.722923574902217700f,
+  0.722393427174577550f,
+  0.721862854481496340f, 0.721331857135096290f, 0.720800435447749190f,
+  0.720268589732077190f,
+  0.719736320300951030f, 0.719203627467491220f, 0.718670511545067230f,
+  0.718136972847297490f,
+  0.717603011688049080f, 0.717068628381437480f, 0.716533823241826680f,
+  0.715998596583828690f,
+  0.715462948722303760f, 0.714926879972359490f, 0.714390390649351390f,
+  0.713853481068882470f,
+  0.713316151546802610f, 0.712778402399208980f, 0.712240233942445510f,
+  0.711701646493102970f,
+  0.711162640368018350f, 0.710623215884275020f, 0.710083373359202800f,
+  0.709543113110376770f,
+  0.709002435455618250f, 0.708461340712994160f, 0.707919829200816310f,
+  0.707377901237642100f,
+  0.706835557142273860f, 0.706292797233758480f, 0.705749621831387790f,
+  0.705206031254697830f,
+  0.704662025823468930f, 0.704117605857725430f, 0.703572771677735580f,
+  0.703027523604011220f,
+  0.702481861957308000f, 0.701935787058624360f, 0.701389299229202230f,
+  0.700842398790526230f,
+  0.700295086064323780f, 0.699747361372564990f, 0.699199225037462120f,
+  0.698650677381469580f,
+  0.698101718727283880f, 0.697552349397843270f, 0.697002569716327460f,
+  0.696452380006157830f,
+  0.695901780590996830f, 0.695350771794747800f, 0.694799353941554900f,
+  0.694247527355803310f,
+  0.693695292362118350f, 0.693142649285365510f, 0.692589598450650380f,
+  0.692036140183318830f,
+  0.691482274808955850f, 0.690928002653386280f, 0.690373324042674040f,
+  0.689818239303122470f,
+  0.689262748761273470f, 0.688706852743907750f, 0.688150551578044830f,
+  0.687593845590942170f,
+  0.687036735110095660f, 0.686479220463238950f, 0.685921301978343670f,
+  0.685362979983618730f,
+  0.684804254807510620f, 0.684245126778703080f, 0.683685596226116690f,
+  0.683125663478908800f,
+  0.682565328866473250f, 0.682004592718440830f, 0.681443455364677990f,
+  0.680881917135287340f,
+  0.680319978360607200f, 0.679757639371212030f, 0.679194900497911200f,
+  0.678631762071749470f,
+  0.678068224424006600f, 0.677504287886197430f, 0.676939952790071240f,
+  0.676375219467611700f,
+  0.675810088251037060f, 0.675244559472799270f, 0.674678633465584540f,
+  0.674112310562312360f,
+  0.673545591096136100f, 0.672978475400442090f, 0.672410963808849900f,
+  0.671843056655211930f,
+  0.671274754273613490f, 0.670706056998372160f, 0.670136965164037760f,
+  0.669567479105392490f,
+  0.668997599157450270f, 0.668427325655456820f, 0.667856658934889440f,
+  0.667285599331456480f,
+  0.666714147181097670f, 0.666142302819983540f, 0.665570066584515560f,
+  0.664997438811325340f,
+  0.664424419837275180f, 0.663851009999457340f, 0.663277209635194100f,
+  0.662703019082037440f,
+  0.662128438677768720f, 0.661553468760399000f, 0.660978109668168060f,
+  0.660402361739545030f,
+  0.659826225313227430f, 0.659249700728141490f, 0.658672788323441890f,
+  0.658095488438511290f,
+  0.657517801412960120f, 0.656939727586627110f, 0.656361267299578000f,
+  0.655782420892106030f,
+  0.655203188704731930f, 0.654623571078202680f, 0.654043568353492640f,
+  0.653463180871802330f,
+  0.652882408974558960f, 0.652301253003415460f, 0.651719713300251020f,
+  0.651137790207170330f,
+  0.650555484066503990f, 0.649972795220807530f, 0.649389724012861770f,
+  0.648806270785672550f,
+  0.648222435882470420f, 0.647638219646710420f, 0.647053622422071650f,
+  0.646468644552457890f,
+  0.645883286381996440f, 0.645297548255038380f, 0.644711430516158420f,
+  0.644124933510154540f,
+  0.643538057582047850f, 0.642950803077082080f, 0.642363170340724320f,
+  0.641775159718663500f,
+  0.641186771556811250f, 0.640598006201301030f, 0.640008863998488440f,
+  0.639419345294950700f,
+  0.638829450437486400f, 0.638239179773115390f, 0.637648533649078810f,
+  0.637057512412838590f,
+  0.636466116412077180f, 0.635874345994697720f, 0.635282201508823530f,
+  0.634689683302797850f,
+  0.634096791725183740f, 0.633503527124764320f, 0.632909889850541860f,
+  0.632315880251737680f,
+  0.631721498677792370f, 0.631126745478365340f, 0.630531621003334600f,
+  0.629936125602796550f,
+  0.629340259627065750f, 0.628744023426674790f, 0.628147417352374120f,
+  0.627550441755131530f,
+  0.626953096986132770f, 0.626355383396779990f, 0.625757301338692900f,
+  0.625158851163707730f,
+  0.624560033223877320f, 0.623960847871470770f, 0.623361295458973340f,
+  0.622761376339086460f,
+  0.622161090864726930f, 0.621560439389027270f, 0.620959422265335180f,
+  0.620358039847213830f,
+  0.619756292488440660f, 0.619154180543008410f, 0.618551704365123860f,
+  0.617948864309208260f,
+  0.617345660729896940f, 0.616742093982038830f, 0.616138164420696910f,
+  0.615533872401147430f,
+  0.614929218278879590f, 0.614324202409595950f, 0.613718825149211830f,
+  0.613113086853854910f,
+  0.612506987879865570f, 0.611900528583796070f, 0.611293709322411010f,
+  0.610686530452686280f,
+  0.610078992331809620f, 0.609471095317180240f, 0.608862839766408200f,
+  0.608254226037314490f,
+  0.607645254487930830f, 0.607035925476499760f, 0.606426239361473550f,
+  0.605816196501515080f,
+  0.605205797255496500f, 0.604595041982500360f, 0.603983931041818020f,
+  0.603372464792950370f,
+  0.602760643595607220f, 0.602148467809707320f, 0.601535937795377730f,
+  0.600923053912954090f,
+  0.600309816522980430f, 0.599696225986208310f, 0.599082282663597310f,
+  0.598467986916314310f,
+  0.597853339105733910f, 0.597238339593437530f, 0.596622988741213330f,
+  0.596007286911056530f,
+  0.595391234465168730f, 0.594774831765957580f, 0.594158079176036800f,
+  0.593540977058226390f,
+  0.592923525775551410f, 0.592305725691242400f, 0.591687577168735550f,
+  0.591069080571671510f,
+  0.590450236263895920f, 0.589831044609458900f, 0.589211505972615070f,
+  0.588591620717822890f,
+  0.587971389209745120f, 0.587350811813247660f, 0.586729888893400500f,
+  0.586108620815476430f,
+  0.585487007944951450f, 0.584865050647504490f, 0.584242749289016980f,
+  0.583620104235572760f,
+  0.582997115853457700f, 0.582373784509160220f, 0.581750110569369760f,
+  0.581126094400977620f,
+  0.580501736371076600f, 0.579877036846960350f, 0.579251996196123550f,
+  0.578626614786261430f,
+  0.578000892985269910f, 0.577374831161244880f, 0.576748429682482520f,
+  0.576121688917478390f,
+  0.575494609234928230f, 0.574867191003726740f, 0.574239434592967890f,
+  0.573611340371944610f,
+  0.572982908710148680f, 0.572354139977270030f, 0.571725034543197120f,
+  0.571095592778016690f,
+  0.570465815052012990f, 0.569835701735668110f, 0.569205253199661200f,
+  0.568574469814869250f,
+  0.567943351952365670f, 0.567311899983420800f, 0.566680114279501710f,
+  0.566047995212271560f,
+  0.565415543153589770f, 0.564782758475511400f, 0.564149641550287680f,
+  0.563516192750364910f,
+  0.562882412448384550f, 0.562248301017183150f, 0.561613858829792420f,
+  0.560979086259438260f,
+  0.560343983679540860f, 0.559708551463714790f, 0.559072789985768480f,
+  0.558436699619704100f,
+  0.557800280739717100f, 0.557163533720196340f, 0.556526458935723720f,
+  0.555889056761073920f,
+  0.555251327571214090f, 0.554613271741304040f, 0.553974889646695610f,
+  0.553336181662932410f,
+  0.552697148165749770f, 0.552057789531074980f, 0.551418106135026060f,
+  0.550778098353912230f,
+  0.550137766564233630f, 0.549497111142680960f, 0.548856132466135290f,
+  0.548214830911667780f,
+  0.547573206856539870f, 0.546931260678202190f, 0.546288992754295210f,
+  0.545646403462648590f,
+  0.545003493181281160f, 0.544360262288400400f, 0.543716711162402390f,
+  0.543072840181871850f,
+  0.542428649725581360f, 0.541784140172491660f, 0.541139311901750910f,
+  0.540494165292695230f,
+  0.539848700724847700f, 0.539202918577918240f, 0.538556819231804210f,
+  0.537910403066588990f,
+  0.537263670462542530f, 0.536616621800121150f, 0.535969257459966710f,
+  0.535321577822907010f,
+  0.534673583269955510f, 0.534025274182310380f, 0.533376650941355560f,
+  0.532727713928658810f,
+  0.532078463525973540f, 0.531428900115236910f, 0.530779024078570250f,
+  0.530128835798278850f,
+  0.529478335656852090f, 0.528827524036961980f, 0.528176401321464370f,
+  0.527524967893398200f,
+  0.526873224135984700f, 0.526221170432628170f, 0.525568807166914680f,
+  0.524916134722612890f,
+  0.524263153483673470f, 0.523609863834228030f, 0.522956266158590140f,
+  0.522302360841254700f,
+  0.521648148266897090f, 0.520993628820373810f, 0.520338802886721960f,
+  0.519683670851158520f,
+  0.519028233099080970f, 0.518372490016066220f, 0.517716441987871150f,
+  0.517060089400432130f,
+  0.516403432639863990f, 0.515746472092461380f, 0.515089208144697270f,
+  0.514431641183222930f,
+  0.513773771594868030f, 0.513115599766640560f, 0.512457126085725800f,
+  0.511798350939487000f,
+  0.511139274715464390f, 0.510479897801375700f, 0.509820220585115560f,
+  0.509160243454754750f,
+  0.508499966798540810f, 0.507839391004897940f, 0.507178516462425290f,
+  0.506517343559898530f,
+  0.505855872686268860f, 0.505194104230662240f, 0.504532038582380380f,
+  0.503869676130898950f,
+  0.503207017265869030f, 0.502544062377115800f, 0.501880811854638400f,
+  0.501217266088609950f,
+  0.500553425469377640f, 0.499889290387461380f, 0.499224861233555030f,
+  0.498560138398525200f,
+  0.497895122273410930f, 0.497229813249424340f, 0.496564211717949340f,
+  0.495898318070542240f,
+  0.495232132698931350f, 0.494565655995016010f, 0.493898888350867430f,
+  0.493231830158728070f,
+  0.492564481811010650f, 0.491896843700299240f, 0.491228916219348330f,
+  0.490560699761082080f,
+  0.489892194718595300f, 0.489223401485152030f, 0.488554320454186230f,
+  0.487884952019301210f,
+  0.487215296574268820f, 0.486545354513030270f, 0.485875126229695420f,
+  0.485204612118541880f,
+  0.484533812574016120f, 0.483862727990732320f, 0.483191358763471910f,
+  0.482519705287184520f,
+  0.481847767956986080f, 0.481175547168160360f, 0.480503043316157670f,
+  0.479830256796594250f,
+  0.479157188005253310f, 0.478483837338084080f, 0.477810205191201040f,
+  0.477136291960884750f,
+  0.476462098043581310f, 0.475787623835901120f, 0.475112869734620470f,
+  0.474437836136679340f,
+  0.473762523439182850f, 0.473086932039400220f, 0.472411062334764100f,
+  0.471734914722871430f,
+  0.471058489601482610f, 0.470381787368520710f, 0.469704808422072460f,
+  0.469027553160387240f,
+  0.468350021981876530f, 0.467672215285114710f, 0.466994133468838110f,
+  0.466315776931944480f,
+  0.465637146073493770f, 0.464958241292706740f, 0.464279062988965760f,
+  0.463599611561814120f,
+  0.462919887410955130f, 0.462239890936253280f, 0.461559622537733190f,
+  0.460879082615578690f,
+  0.460198271570134270f, 0.459517189801903590f, 0.458835837711549120f,
+  0.458154215699893230f,
+  0.457472324167916110f, 0.456790163516757220f, 0.456107734147714220f,
+  0.455425036462242420f,
+  0.454742070861955450f, 0.454058837748624540f, 0.453375337524177750f,
+  0.452691570590700860f,
+  0.452007537350436530f, 0.451323238205783520f, 0.450638673559297760f,
+  0.449953843813690580f,
+  0.449268749371829920f, 0.448583390636739300f, 0.447897768011597360f,
+  0.447211881899738260f,
+  0.446525732704651400f, 0.445839320829980350f, 0.445152646679523590f,
+  0.444465710657234110f,
+  0.443778513167218280f, 0.443091054613736990f, 0.442403335401204130f,
+  0.441715355934187310f,
+  0.441027116617407340f, 0.440338617855737300f, 0.439649860054203420f,
+  0.438960843617984430f,
+  0.438271568952410480f, 0.437582036462964340f, 0.436892246555280470f,
+  0.436202199635143950f,
+  0.435511896108492170f, 0.434821336381412350f, 0.434130520860143310f,
+  0.433439449951074200f,
+  0.432748124060743760f, 0.432056543595841450f, 0.431364708963206440f,
+  0.430672620569826860f,
+  0.429980278822840570f, 0.429287684129534720f, 0.428594836897344400f,
+  0.427901737533854240f,
+  0.427208386446796370f, 0.426514784044051520f, 0.425820930733648350f,
+  0.425126826923762410f,
+  0.424432473022717420f, 0.423737869438983950f, 0.423043016581179100f,
+  0.422347914858067000f,
+  0.421652564678558380f, 0.420956966451709440f, 0.420261120586723050f,
+  0.419565027492946940f,
+  0.418868687579875110f, 0.418172101257146430f, 0.417475268934544340f,
+  0.416778191021997590f,
+  0.416080867929579320f, 0.415383300067506290f, 0.414685487846140010f,
+  0.413987431675985510f,
+  0.413289131967690960f, 0.412590589132048380f, 0.411891803579992220f,
+  0.411192775722600160f,
+  0.410493505971092520f, 0.409793994736831200f, 0.409094242431320920f,
+  0.408394249466208110f,
+  0.407694016253280170f, 0.406993543204466460f, 0.406292830731837470f,
+  0.405591879247603870f,
+  0.404890689164117750f, 0.404189260893870750f, 0.403487594849495310f,
+  0.402785691443763640f,
+  0.402083551089587040f, 0.401381174200016790f, 0.400678561188243350f,
+  0.399975712467595390f,
+  0.399272628451540930f, 0.398569309553686360f, 0.397865756187775750f,
+  0.397161968767691720f,
+  0.396457947707453960f, 0.395753693421220080f, 0.395049206323284880f,
+  0.394344486828079650f,
+  0.393639535350172880f, 0.392934352304269600f, 0.392228938105210370f,
+  0.391523293167972350f,
+  0.390817417907668610f, 0.390111312739546910f, 0.389404978078991100f,
+  0.388698414341519250f,
+  0.387991621942784910f, 0.387284601298575890f, 0.386577352824813980f,
+  0.385869876937555310f,
+  0.385162174052989970f, 0.384454244587440870f, 0.383746088957365010f,
+  0.383037707579352130f,
+  0.382329100870124510f, 0.381620269246537520f, 0.380911213125578130f,
+  0.380201932924366050f,
+  0.379492429060152740f, 0.378782701950320600f, 0.378072752012383990f,
+  0.377362579663988450f,
+  0.376652185322909620f, 0.375941569407054420f, 0.375230732334460030f,
+  0.374519674523293210f,
+  0.373808396391851370f, 0.373096898358560690f, 0.372385180841977360f,
+  0.371673244260786630f,
+  0.370961089033802040f, 0.370248715579966360f, 0.369536124318350760f,
+  0.368823315668153960f,
+  0.368110290048703050f, 0.367397047879452820f, 0.366683589579984930f,
+  0.365969915570008910f,
+  0.365256026269360380f, 0.364541922098002180f, 0.363827603476023610f,
+  0.363113070823639530f,
+  0.362398324561191310f, 0.361683365109145950f, 0.360968192888095290f,
+  0.360252808318756830f,
+  0.359537211821973180f, 0.358821403818710860f, 0.358105384730061760f,
+  0.357389154977241000f,
+  0.356672714981588260f, 0.355956065164567010f, 0.355239205947763370f,
+  0.354522137752887430f,
+  0.353804861001772160f, 0.353087376116372530f, 0.352369683518766630f,
+  0.351651783631154680f,
+  0.350933676875858360f, 0.350215363675321740f, 0.349496844452109600f,
+  0.348778119628908420f,
+  0.348059189628525780f, 0.347340054873889190f, 0.346620715788047320f,
+  0.345901172794169100f,
+  0.345181426315542610f, 0.344461476775576480f, 0.343741324597798600f,
+  0.343020970205855540f,
+  0.342300414023513690f, 0.341579656474657210f, 0.340858697983289440f,
+  0.340137538973531880f,
+  0.339416179869623410f, 0.338694621095921190f, 0.337972863076899830f,
+  0.337250906237150650f,
+  0.336528751001382350f, 0.335806397794420560f, 0.335083847041206580f,
+  0.334361099166798900f,
+  0.333638154596370920f, 0.332915013755212650f, 0.332191677068729320f,
+  0.331468144962440920f,
+  0.330744417861982890f, 0.330020496193105530f, 0.329296380381672800f,
+  0.328572070853663690f,
+  0.327847568035170960f, 0.327122872352400510f, 0.326397984231672660f,
+  0.325672904099419900f,
+  0.324947632382188430f, 0.324222169506637130f, 0.323496515899536760f,
+  0.322770671987770710f,
+  0.322044638198334620f, 0.321318414958334910f, 0.320592002694990330f,
+  0.319865401835630610f,
+  0.319138612807695900f, 0.318411636038737960f, 0.317684471956418020f,
+  0.316957120988508150f,
+  0.316229583562890490f, 0.315501860107556040f, 0.314773951050606070f,
+  0.314045856820250820f,
+  0.313317577844809070f, 0.312589114552708660f, 0.311860467372486130f,
+  0.311131636732785270f,
+  0.310402623062358880f, 0.309673426790066490f, 0.308944048344875710f,
+  0.308214488155861220f,
+  0.307484746652204160f, 0.306754824263192780f, 0.306024721418221900f,
+  0.305294438546791720f,
+  0.304563976078509050f, 0.303833334443086470f, 0.303102514070341060f,
+  0.302371515390196130f,
+  0.301640338832678880f, 0.300908984827921890f, 0.300177453806162120f,
+  0.299445746197739950f,
+  0.298713862433100390f, 0.297981802942791920f, 0.297249568157465890f,
+  0.296517158507877410f,
+  0.295784574424884370f, 0.295051816339446720f, 0.294318884682627570f,
+  0.293585779885591310f,
+  0.292852502379604810f, 0.292119052596036540f, 0.291385430966355720f,
+  0.290651637922133220f,
+  0.289917673895040860f, 0.289183539316850310f, 0.288449234619434170f,
+  0.287714760234765280f,
+  0.286980116594915570f, 0.286245304132057120f, 0.285510323278461380f,
+  0.284775174466498300f,
+  0.284039858128637360f, 0.283304374697445790f, 0.282568724605589740f,
+  0.281832908285833460f,
+  0.281096926171038320f, 0.280360778694163810f, 0.279624466288266700f,
+  0.278887989386500280f,
+  0.278151348422115090f, 0.277414543828458200f, 0.276677576038972420f,
+  0.275940445487197320f,
+  0.275203152606767370f, 0.274465697831413220f, 0.273728081594960650f,
+  0.272990304331329980f,
+  0.272252366474536660f, 0.271514268458690810f, 0.270776010717996010f,
+  0.270037593686750510f,
+  0.269299017799346230f, 0.268560283490267890f, 0.267821391194094320f,
+  0.267082341345496350f,
+  0.266343134379238180f, 0.265603770730176440f, 0.264864250833259320f,
+  0.264124575123527490f,
+  0.263384744036113390f, 0.262644758006240100f, 0.261904617469222560f,
+  0.261164322860466590f,
+  0.260423874615468010f, 0.259683273169813930f, 0.258942518959180580f,
+  0.258201612419334870f,
+  0.257460553986133210f, 0.256719344095520720f, 0.255977983183532380f,
+  0.255236471686291820f,
+  0.254494810040010790f, 0.253752998680989940f, 0.253011038045617980f,
+  0.252268928570370810f,
+  0.251526670691812780f, 0.250784264846594550f, 0.250041711471454650f,
+  0.249299011003218300f,
+  0.248556163878796620f, 0.247813170535187620f, 0.247070031409475370f,
+  0.246326746938829060f,
+  0.245583317560504000f, 0.244839743711840750f, 0.244096025830264210f,
+  0.243352164353284880f,
+  0.242608159718496890f, 0.241864012363579210f, 0.241119722726294730f,
+  0.240375291244489500f,
+  0.239630718356093560f, 0.238886004499120170f, 0.238141150111664870f,
+  0.237396155631906550f,
+  0.236651021498106460f, 0.235905748148607370f, 0.235160336021834860f,
+  0.234414785556295250f,
+  0.233669097190576820f, 0.232923271363349120f, 0.232177308513361770f,
+  0.231431209079445730f,
+  0.230684973500512310f, 0.229938602215552260f, 0.229192095663636740f,
+  0.228445454283916550f,
+  0.227698678515621170f, 0.226951768798059980f, 0.226204725570620270f,
+  0.225457549272768540f,
+  0.224710240344049570f, 0.223962799224085520f, 0.223215226352576960f,
+  0.222467522169301990f,
+  0.221719687114115240f, 0.220971721626949060f, 0.220223626147812460f,
+  0.219475401116790340f,
+  0.218727046974044600f, 0.217978564159812290f, 0.217229953114406790f,
+  0.216481214278216900f,
+  0.215732348091705940f, 0.214983354995412820f, 0.214234235429951100f,
+  0.213484989836008080f,
+  0.212735618654345870f, 0.211986122325800410f, 0.211236501291280710f,
+  0.210486755991769890f,
+  0.209736886868323370f, 0.208986894362070070f, 0.208236778914211470f,
+  0.207486540966020700f,
+  0.206736180958843660f, 0.205985699334098050f, 0.205235096533272380f,
+  0.204484372997927180f,
+  0.203733529169694010f, 0.202982565490274460f, 0.202231482401441620f,
+  0.201480280345037820f,
+  0.200728959762976140f, 0.199977521097239290f, 0.199225964789878890f,
+  0.198474291283016360f,
+  0.197722501018842030f, 0.196970594439614370f, 0.196218571987660850f,
+  0.195466434105377090f,
+  0.194714181235225990f, 0.193961813819739010f, 0.193209332301514080f,
+  0.192456737123216840f,
+  0.191704028727579940f, 0.190951207557401860f, 0.190198274055548120f,
+  0.189445228664950340f,
+  0.188692071828605260f, 0.187938803989575850f, 0.187185425590990440f,
+  0.186431937076041640f,
+  0.185678338887987790f, 0.184924631470150870f, 0.184170815265917720f,
+  0.183416890718739230f,
+  0.182662858272129360f, 0.181908718369666160f, 0.181154471454990920f,
+  0.180400117971807270f,
+  0.179645658363882100f, 0.178891093075044830f, 0.178136422549186320f,
+  0.177381647230260200f,
+  0.176626767562280960f, 0.175871783989325040f, 0.175116696955530060f,
+  0.174361506905093830f,
+  0.173606214282275410f, 0.172850819531394200f, 0.172095323096829040f,
+  0.171339725423019260f,
+  0.170584026954463700f, 0.169828228135719880f, 0.169072329411405180f,
+  0.168316331226194910f,
+  0.167560234024823590f, 0.166804038252083870f, 0.166047744352825850f,
+  0.165291352771957970f,
+  0.164534863954446110f, 0.163778278345312690f, 0.163021596389637810f,
+  0.162264818532558110f,
+  0.161507945219266150f, 0.160750976895011390f, 0.159993914005098350f,
+  0.159236756994887850f,
+  0.158479506309796100f, 0.157722162395293690f, 0.156964725696906750f,
+  0.156207196660216040f,
+  0.155449575730855880f, 0.154691863354515400f, 0.153934059976937460f,
+  0.153176166043917870f,
+  0.152418182001306500f, 0.151660108295005400f, 0.150901945370970040f,
+  0.150143693675208330f,
+  0.149385353653779810f, 0.148626925752796540f, 0.147868410418422360f,
+  0.147109808096871850f,
+  0.146351119234411440f, 0.145592344277358450f, 0.144833483672080240f,
+  0.144074537864995330f,
+  0.143315507302571590f, 0.142556392431327340f, 0.141797193697830530f,
+  0.141037911548697770f,
+  0.140278546430595420f, 0.139519098790238600f, 0.138759569074390380f,
+  0.137999957729862760f,
+  0.137240265203515700f, 0.136480491942256310f, 0.135720638393040080f,
+  0.134960705002868830f,
+  0.134200692218792020f, 0.133440600487905820f, 0.132680430257352130f,
+  0.131920181974319760f,
+  0.131159856086043410f, 0.130399453039802740f, 0.129638973282923540f,
+  0.128878417262776660f,
+  0.128117785426777150f, 0.127357078222385570f, 0.126596296097105960f,
+  0.125835439498487020f,
+  0.125074508874121300f, 0.124313504671644300f, 0.123552427338735370f,
+  0.122791277323116900f,
+  0.122030055072553410f, 0.121268761034852550f, 0.120507395657864240f,
+  0.119745959389479630f,
+  0.118984452677632520f, 0.118222875970297250f, 0.117461229715489990f,
+  0.116699514361267840f,
+  0.115937730355727850f, 0.115175878147008180f, 0.114413958183287050f,
+  0.113651970912781920f,
+  0.112889916783750470f, 0.112127796244489750f, 0.111365609743335190f,
+  0.110603357728661910f,
+  0.109841040648882680f, 0.109078658952449240f, 0.108316213087851300f,
+  0.107553703503615710f,
+  0.106791130648307380f, 0.106028494970528530f, 0.105265796918917650f,
+  0.104503036942150550f,
+  0.103740215488939480f, 0.102977333008032250f, 0.102214389948213370f,
+  0.101451386758302160f,
+  0.100688323887153970f, 0.099925201783659226f, 0.099162020896742573f,
+  0.098398781675363881f,
+  0.097635484568517339f, 0.096872130025230527f, 0.096108718494565468f,
+  0.095345250425617742f,
+  0.094581726267515473f, 0.093818146469420494f, 0.093054511480527333f,
+  0.092290821750062355f,
+  0.091527077727284981f, 0.090763279861485704f, 0.089999428601987341f,
+  0.089235524398144139f,
+  0.088471567699340822f, 0.087707558954993645f, 0.086943498614549489f,
+  0.086179387127484922f,
+  0.085415224943307277f, 0.084651012511553700f, 0.083886750281790226f,
+  0.083122438703613077f,
+  0.082358078226646619f, 0.081593669300544638f, 0.080829212374989468f,
+  0.080064707899690932f,
+  0.079300156324387569f, 0.078535558098845590f, 0.077770913672857989f,
+  0.077006223496245585f,
+  0.076241488018856149f, 0.075476707690563416f, 0.074711882961268378f,
+  0.073947014280897269f,
+  0.073182102099402888f, 0.072417146866763538f, 0.071652149032982254f,
+  0.070887109048087787f,
+  0.070122027362133646f, 0.069356904425197236f, 0.068591740687380900f,
+  0.067826536598810966f,
+  0.067061292609636836f, 0.066296009170032283f, 0.065530686730193397f,
+  0.064765325740339871f,
+  0.063999926650714078f, 0.063234489911580136f, 0.062469015973224969f,
+  0.061703505285957416f,
+  0.060937958300107238f, 0.060172375466026218f, 0.059406757234087247f,
+  0.058641104054683348f,
+  0.057875416378229017f, 0.057109694655158132f, 0.056343939335925283f,
+  0.055578150871004817f,
+  0.054812329710889909f, 0.054046476306093640f, 0.053280591107148056f,
+  0.052514674564603257f,
+  0.051748727129028414f, 0.050982749251010900f, 0.050216741381155325f,
+  0.049450703970084824f,
+  0.048684637468439020f, 0.047918542326875327f, 0.047152418996068000f,
+  0.046386267926707213f,
+  0.045620089569500123f, 0.044853884375169933f, 0.044087652794454979f,
+  0.043321395278109784f,
+  0.042555112276904117f, 0.041788804241622082f, 0.041022471623063397f,
+  0.040256114872041358f,
+  0.039489734439384118f, 0.038723330775933762f, 0.037956904332545366f,
+  0.037190455560088091f,
+  0.036423984909444228f, 0.035657492831508264f, 0.034890979777187955f,
+  0.034124446197403423f,
+  0.033357892543086159f, 0.032591319265180385f, 0.031824726814640963f,
+  0.031058115642434700f,
+  0.030291486199539423f, 0.029524838936943035f, 0.028758174305644590f,
+  0.027991492756653365f,
+  0.027224794740987910f, 0.026458080709677145f, 0.025691351113759395f,
+  0.024924606404281485f,
+  0.024157847032300020f, 0.023391073448879338f, 0.022624286105092803f,
+  0.021857485452021874f,
+  0.021090671940755180f, 0.020323846022389572f, 0.019557008148029204f,
+  0.018790158768784596f,
+  0.018023298335773701f, 0.017256427300120978f, 0.016489546112956454f,
+  0.015722655225417017f,
+  0.014955755088644378f, 0.014188846153786343f, 0.013421928871995907f,
+  0.012655003694430301f,
+  0.011888071072252072f, 0.011121131456628141f, 0.010354185298728884f,
+  0.009587233049729183f,
+  0.008820275160807512f, 0.008053312083144991f, 0.007286344267926684f,
+  0.006519372166339549f,
+  0.005752396229573737f, 0.004985416908821652f, 0.004218434655277024f,
+  0.003451449920135975f,
+  0.002684463154596083f, 0.001917474809855460f, 0.001150485337113809f,
+  0.000383495187571497f
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    const float32_t Weights_8192[16384] = {
+  1.000000000000000000f, -0.000000000000000000f, 0.999999981616429330f,
+    -0.000191747597310703f,
+  0.999999926465717890f, -0.000383495187571396f, 0.999999834547867670f,
+    -0.000575242763732066f,
+  0.999999705862882230f, -0.000766990318742704f, 0.999999540410766110f,
+    -0.000958737845553301f,
+  0.999999338191525530f, -0.001150485337113849f, 0.999999099205167830f,
+    -0.001342232786374338f,
+  0.999998823451701880f, -0.001533980186284766f, 0.999998510931137790f,
+    -0.001725727529795126f,
+  0.999998161643486980f, -0.001917474809855419f, 0.999997775588762350f,
+    -0.002109222019415644f,
+  0.999997352766978210f, -0.002300969151425805f, 0.999996893178149880f,
+    -0.002492716198835908f,
+  0.999996396822294350f, -0.002684463154595962f, 0.999995863699429940f,
+    -0.002876210011655979f,
+  0.999995293809576190f, -0.003067956762965976f, 0.999994687152754080f,
+    -0.003259703401475973f,
+  0.999994043728985820f, -0.003451449920135994f, 0.999993363538295150f,
+    -0.003643196311896068f,
+  0.999992646580707190f, -0.003834942569706228f, 0.999991892856248010f,
+    -0.004026688686516512f,
+  0.999991102364945590f, -0.004218434655276963f, 0.999990275106828920f,
+    -0.004410180468937631f,
+  0.999989411081928400f, -0.004601926120448571f, 0.999988510290275690f,
+    -0.004793671602759841f,
+  0.999987572731904080f, -0.004985416908821511f, 0.999986598406848000f,
+    -0.005177162031583651f,
+  0.999985587315143200f, -0.005368906963996343f, 0.999984539456826970f,
+    -0.005560651699009674f,
+  0.999983454831937730f, -0.005752396229573736f, 0.999982333440515350f,
+    -0.005944140548638633f,
+  0.999981175282601110f, -0.006135884649154475f, 0.999979980358237650f,
+    -0.006327628524071378f,
+  0.999978748667468830f, -0.006519372166339468f, 0.999977480210339940f,
+    -0.006711115568908879f,
+  0.999976174986897610f, -0.006902858724729756f, 0.999974832997189810f,
+    -0.007094601626752250f,
+  0.999973454241265940f, -0.007286344267926521f, 0.999972038719176730f,
+    -0.007478086641202744f,
+  0.999970586430974140f, -0.007669828739531097f, 0.999969097376711580f,
+    -0.007861570555861772f,
+  0.999967571556443780f, -0.008053312083144972f, 0.999966008970226920f,
+    -0.008245053314330906f,
+  0.999964409618118280f, -0.008436794242369799f, 0.999962773500176930f,
+    -0.008628534860211886f,
+  0.999961100616462820f, -0.008820275160807412f, 0.999959390967037450f,
+    -0.009012015137106633f,
+  0.999957644551963900f, -0.009203754782059819f, 0.999955861371306100f,
+    -0.009395494088617252f,
+  0.999954041425129780f, -0.009587233049729225f, 0.999952184713501780f,
+    -0.009778971658346044f,
+  0.999950291236490480f, -0.009970709907418031f, 0.999948360994165400f,
+    -0.010162447789895513f,
+  0.999946393986597460f, -0.010354185298728842f, 0.999944390213859060f,
+    -0.010545922426868378f,
+  0.999942349676023910f, -0.010737659167264491f, 0.999940272373166960f,
+    -0.010929395512867571f,
+  0.999938158305364590f, -0.011121131456628021f, 0.999936007472694620f,
+    -0.011312866991496258f,
+  0.999933819875236000f, -0.011504602110422714f, 0.999931595513069200f,
+    -0.011696336806357838f,
+  0.999929334386276070f, -0.011888071072252092f, 0.999927036494939640f,
+    -0.012079804901055957f,
+  0.999924701839144500f, -0.012271538285719925f, 0.999922330418976490f,
+    -0.012463271219194511f,
+  0.999919922234522750f, -0.012655003694430242f, 0.999917477285871770f,
+    -0.012846735704377662f,
+  0.999914995573113470f, -0.013038467241987334f, 0.999912477096339240f,
+    -0.013230198300209835f,
+  0.999909921855641540f, -0.013421928871995765f, 0.999907329851114300f,
+    -0.013613658950295740f,
+  0.999904701082852900f, -0.013805388528060391f, 0.999902035550953920f,
+    -0.013997117598240367f,
+  0.999899333255515390f, -0.014188846153786345f, 0.999896594196636680f,
+    -0.014380574187649006f,
+  0.999893818374418490f, -0.014572301692779064f, 0.999891005788962950f,
+    -0.014764028662127246f,
+  0.999888156440373320f, -0.014955755088644296f, 0.999885270328754520f,
+    -0.015147480965280987f,
+  0.999882347454212560f, -0.015339206284988100f, 0.999879387816854930f,
+    -0.015530931040716447f,
+  0.999876391416790410f, -0.015722655225416857f, 0.999873358254129260f,
+    -0.015914378832040183f,
+  0.999870288328982950f, -0.016106101853537287f, 0.999867181641464380f,
+    -0.016297824282859065f,
+  0.999864038191687680f, -0.016489546112956437f, 0.999860857979768540f,
+    -0.016681267336780332f,
+  0.999857641005823860f, -0.016872987947281710f, 0.999854387269971890f,
+    -0.017064707937411563f,
+  0.999851096772332190f, -0.017256427300120877f, 0.999847769513025900f,
+    -0.017448146028360693f,
+  0.999844405492175240f, -0.017639864115082053f, 0.999841004709904000f,
+    -0.017831581553236039f,
+  0.999837567166337090f, -0.018023298335773746f, 0.999834092861600960f,
+    -0.018215014455646290f,
+  0.999830581795823400f, -0.018406729905804820f, 0.999827033969133420f,
+    -0.018598444679200511f,
+  0.999823449381661570f, -0.018790158768784555f, 0.999819828033539420f,
+    -0.018981872167508178f,
+  0.999816169924900410f, -0.019173584868322623f, 0.999812475055878780f,
+    -0.019365296864179156f,
+  0.999808743426610520f, -0.019557008148029083f, 0.999804975037232870f,
+    -0.019748718712823729f,
+  0.999801169887884260f, -0.019940428551514441f, 0.999797327978704690f,
+    -0.020132137657052594f,
+  0.999793449309835270f, -0.020323846022389593f, 0.999789533881418780f,
+    -0.020515553640476875f,
+  0.999785581693599210f, -0.020707260504265895f, 0.999781592746521670f,
+    -0.020898966606708137f,
+  0.999777567040332940f, -0.021090671940755121f, 0.999773504575180990f,
+    -0.021282376499358387f,
+  0.999769405351215280f, -0.021474080275469508f, 0.999765269368586450f,
+    -0.021665783262040078f,
+  0.999761096627446610f, -0.021857485452021735f, 0.999756887127949080f,
+    -0.022049186838366135f,
+  0.999752640870248840f, -0.022240887414024961f, 0.999748357854501780f,
+    -0.022432587171949934f,
+  0.999744038080865430f, -0.022624286105092803f, 0.999739681549498660f,
+    -0.022815984206405345f,
+  0.999735288260561680f, -0.023007681468839369f, 0.999730858214216030f,
+    -0.023199377885346720f,
+  0.999726391410624470f, -0.023391073448879258f, 0.999721887849951310f,
+    -0.023582768152388894f,
+  0.999717347532362190f, -0.023774461988827555f, 0.999712770458023870f,
+    -0.023966154951147210f,
+  0.999708156627104880f, -0.024157847032299864f, 0.999703506039774650f,
+    -0.024349538225237534f,
+  0.999698818696204250f, -0.024541228522912288f, 0.999694094596566000f,
+    -0.024732917918276223f,
+  0.999689333741033640f, -0.024924606404281468f, 0.999684536129782140f,
+    -0.025116293973880186f,
+  0.999679701762987930f, -0.025307980620024571f, 0.999674830640828740f,
+    -0.025499666335666853f,
+  0.999669922763483760f, -0.025691351113759295f, 0.999664978131133310f,
+    -0.025883034947254198f,
+  0.999659996743959220f, -0.026074717829103901f, 0.999654978602144690f,
+    -0.026266399752260760f,
+  0.999649923705874240f, -0.026458080709677187f, 0.999644832055333610f,
+    -0.026649760694305618f,
+  0.999639703650710200f, -0.026841439699098531f, 0.999634538492192300f,
+    -0.027033117717008431f,
+  0.999629336579970110f, -0.027224794740987875f, 0.999624097914234570f,
+    -0.027416470763989436f,
+  0.999618822495178640f, -0.027608145778965740f, 0.999613510322995950f,
+    -0.027799819778869445f,
+  0.999608161397882110f, -0.027991492756653243f, 0.999602775720033530f,
+    -0.028183164705269874f,
+  0.999597353289648380f, -0.028374835617672099f, 0.999591894106925950f,
+    -0.028566505486812728f,
+  0.999586398172067070f, -0.028758174305644615f, 0.999580865485273700f,
+    -0.028949842067120635f,
+  0.999575296046749220f, -0.029141508764193722f, 0.999569689856698580f,
+    -0.029333174389816835f,
+  0.999564046915327740f, -0.029524838936942976f, 0.999558367222844300f,
+    -0.029716502398525191f,
+  0.999552650779456990f, -0.029908164767516555f, 0.999546897585375960f,
+    -0.030099826036870198f,
+  0.999541107640812940f, -0.030291486199539284f, 0.999535280945980540f,
+    -0.030483145248477009f,
+  0.999529417501093140f, -0.030674803176636626f, 0.999523517306366350f,
+    -0.030866459976971412f,
+  0.999517580362016990f, -0.031058115642434700f, 0.999511606668263440f,
+    -0.031249770165979861f,
+  0.999505596225325310f, -0.031441423540560301f, 0.999499549033423640f,
+    -0.031633075759129478f,
+  0.999493465092780590f, -0.031824726814640887f, 0.999487344403620080f,
+    -0.032016376700048060f,
+  0.999481186966166950f, -0.032208025408304586f, 0.999474992780647780f,
+    -0.032399672932364086f,
+  0.999468761847290050f, -0.032591319265180226f, 0.999462494166323160f,
+    -0.032782964399706724f,
+  0.999456189737977340f, -0.032974608328897335f, 0.999449848562484530f,
+    -0.033166251045705857f,
+  0.999443470640077770f, -0.033357892543086139f, 0.999437055970991530f,
+    -0.033549532813992068f,
+  0.999430604555461730f, -0.033741171851377580f, 0.999424116393725640f,
+    -0.033932809648196664f,
+  0.999417591486021720f, -0.034124446197403326f, 0.999411029832589780f,
+    -0.034316081491951651f,
+  0.999404431433671300f, -0.034507715524795750f, 0.999397796289508640f,
+    -0.034699348288889799f,
+  0.999391124400346050f, -0.034890979777188004f, 0.999384415766428560f,
+    -0.035082609982644619f,
+  0.999377670388002850f, -0.035274238898213947f, 0.999370888265317170f,
+    -0.035465866516850353f,
+  0.999364069398620550f, -0.035657492831508222f, 0.999357213788164000f,
+    -0.035849117835142018f,
+  0.999350321434199440f, -0.036040741520706229f, 0.999343392336980220f,
+    -0.036232363881155395f,
+  0.999336426496761240f, -0.036423984909444110f, 0.999329423913798420f,
+    -0.036615604598527030f,
+  0.999322384588349540f, -0.036807222941358832f, 0.999315308520673070f,
+    -0.036998839930894263f,
+  0.999308195711029470f, -0.037190455560088119f, 0.999301046159680070f,
+    -0.037382069821895229f,
+  0.999293859866887790f, -0.037573682709270494f, 0.999286636832916740f,
+    -0.037765294215168860f,
+  0.999279377058032710f, -0.037956904332545310f, 0.999272080542502610f,
+    -0.038148513054354891f,
+  0.999264747286594420f, -0.038340120373552694f, 0.999257377290578060f,
+    -0.038531726283093870f,
+  0.999249970554724420f, -0.038723330775933623f, 0.999242527079305830f,
+    -0.038914933845027193f,
+  0.999235046864595850f, -0.039106535483329888f, 0.999227529910869610f,
+    -0.039298135683797059f,
+  0.999219976218403530f, -0.039489734439384118f, 0.999212385787475290f,
+    -0.039681331743046527f,
+  0.999204758618363890f, -0.039872927587739811f, 0.999197094711349880f,
+    -0.040064521966419520f,
+  0.999189394066714920f, -0.040256114872041282f, 0.999181656684742350f,
+    -0.040447706297560782f,
+  0.999173882565716380f, -0.040639296235933736f, 0.999166071709923000f,
+    -0.040830884680115948f,
+  0.999158224117649430f, -0.041022471623063238f, 0.999150339789184110f,
+    -0.041214057057731519f,
+  0.999142418724816910f, -0.041405640977076739f, 0.999134460924839150f,
+    -0.041597223374054894f,
+  0.999126466389543390f, -0.041788804241622061f, 0.999118435119223490f,
+    -0.041980383572734356f,
+  0.999110367114174890f, -0.042171961360347947f, 0.999102262374694130f,
+    -0.042363537597419072f,
+  0.999094120901079070f, -0.042555112276904020f, 0.999085942693629270f,
+    -0.042746685391759132f,
+  0.999077727752645360f, -0.042938256934940820f, 0.999069476078429330f,
+    -0.043129826899405546f,
+  0.999061187671284600f, -0.043321395278109825f, 0.999052862531515930f,
+    -0.043512962064010237f,
+  0.999044500659429290f, -0.043704527250063421f, 0.999036102055332330f,
+    -0.043896090829226068f,
+  0.999027666719533690f, -0.044087652794454944f, 0.999019194652343460f,
+    -0.044279213138706849f,
+  0.999010685854073380f, -0.044470771854938668f, 0.999002140325035980f,
+    -0.044662328936107325f,
+  0.998993558065545680f, -0.044853884375169815f, 0.998984939075918010f,
+    -0.045045438165083197f,
+  0.998976283356469820f, -0.045236990298804590f, 0.998967590907519300f,
+    -0.045428540769291155f,
+  0.998958861729386080f, -0.045620089569500144f, 0.998950095822391250f,
+    -0.045811636692388844f,
+  0.998941293186856870f, -0.046003182130914623f, 0.998932453823106690f,
+    -0.046194725878034908f,
+  0.998923577731465780f, -0.046386267926707157f, 0.998914664912260440f,
+    -0.046577808269888943f,
+  0.998905715365818290f, -0.046769346900537863f, 0.998896729092468410f,
+    -0.046960883811611592f,
+  0.998887706092541290f, -0.047152418996067869f, 0.998878646366368690f,
+    -0.047343952446864478f,
+  0.998869549914283560f, -0.047535484156959303f, 0.998860416736620520f,
+    -0.047727014119310254f,
+  0.998851246833715180f, -0.047918542326875327f, 0.998842040205904840f,
+    -0.048110068772612591f,
+  0.998832796853527990f, -0.048301593449480144f, 0.998823516776924490f,
+    -0.048493116350436176f,
+  0.998814199976435390f, -0.048684637468438943f, 0.998804846452403420f,
+    -0.048876156796446760f,
+  0.998795456205172410f, -0.049067674327418015f, 0.998786029235087640f,
+    -0.049259190054311140f,
+  0.998776565542495610f, -0.049450703970084664f, 0.998767065127744380f,
+    -0.049642216067697156f,
+  0.998757527991183340f, -0.049833726340107277f, 0.998747954133162860f,
+    -0.050025234780273729f,
+  0.998738343554035230f, -0.050216741381155311f, 0.998728696254153720f,
+    -0.050408246135710856f,
+  0.998719012233872940f, -0.050599749036899282f, 0.998709291493549030f,
+    -0.050791250077679581f,
+  0.998699534033539280f, -0.050982749251010803f, 0.998689739854202620f,
+    -0.051174246549852080f,
+  0.998679908955899090f, -0.051365741967162593f, 0.998670041338990070f,
+    -0.051557235495901611f,
+  0.998660137003838490f, -0.051748727129028456f, 0.998650195950808280f,
+    -0.051940216859502536f,
+  0.998640218180265270f, -0.052131704680283324f, 0.998630203692576050f,
+    -0.052323190584330347f,
+  0.998620152488108870f, -0.052514674564603223f, 0.998610064567233340f,
+    -0.052706156614061632f,
+  0.998599939930320370f, -0.052897636725665324f, 0.998589778577742230f,
+    -0.053089114892374133f,
+  0.998579580509872500f, -0.053280591107147945f, 0.998569345727086110f,
+    -0.053472065362946727f,
+  0.998559074229759310f, -0.053663537652730520f, 0.998548766018269920f,
+    -0.053855007969459440f,
+  0.998538421092996730f, -0.054046476306093660f, 0.998528039454320230f,
+    -0.054237942655593452f,
+  0.998517621102622210f, -0.054429407010919133f, 0.998507166038285490f,
+    -0.054620869365031105f,
+  0.998496674261694640f, -0.054812329710889854f, 0.998486145773235360f,
+    -0.055003788041455920f,
+  0.998475580573294770f, -0.055195244349689934f, 0.998464978662261250f,
+    -0.055386698628552597f,
+  0.998454340040524800f, -0.055578150871004678f, 0.998443664708476340f,
+    -0.055769601070007030f,
+  0.998432952666508440f, -0.055961049218520569f, 0.998422203915015020f,
+    -0.056152495309506292f,
+  0.998411418454391300f, -0.056343939335925290f, 0.998400596285033640f,
+    -0.056535381290738700f,
+  0.998389737407340160f, -0.056726821166907748f, 0.998378841821709990f,
+    -0.056918258957393740f,
+  0.998367909528543820f, -0.057109694655158062f, 0.998356940528243420f,
+    -0.057301128253162158f,
+  0.998345934821212370f, -0.057492559744367566f, 0.998334892407855000f,
+    -0.057683989121735904f,
+  0.998323813288577560f, -0.057875416378228857f, 0.998312697463787260f,
+    -0.058066841506808194f,
+  0.998301544933892890f, -0.058258264500435752f, 0.998290355699304350f,
+    -0.058449685352073476f,
+  0.998279129760433200f, -0.058641104054683341f, 0.998267867117692110f,
+    -0.058832520601227435f,
+  0.998256567771495180f, -0.059023934984667931f, 0.998245231722257880f,
+    -0.059215347197967061f,
+  0.998233858970396850f, -0.059406757234087150f, 0.998222449516330550f,
+    -0.059598165085990591f,
+  0.998211003360478190f, -0.059789570746639868f, 0.998199520503260660f,
+    -0.059980974208997548f,
+  0.998188000945100300f, -0.060172375466026259f, 0.998176444686420530f,
+    -0.060363774510688743f,
+  0.998164851727646240f, -0.060555171335947788f, 0.998153222069203760f,
+    -0.060746565934766288f,
+  0.998141555711520520f, -0.060937958300107203f, 0.998129852655025630f,
+    -0.061129348424933588f,
+  0.998118112900149180f, -0.061320736302208578f, 0.998106336447323050f,
+    -0.061512121924895378f,
+  0.998094523296980010f, -0.061703505285957298f, 0.998082673449554590f,
+    -0.061894886378357716f,
+  0.998070786905482340f, -0.062086265195060088f, 0.998058863665200250f,
+    -0.062277641729027972f,
+  0.998046903729146840f, -0.062469015973224996f, 0.998034907097761770f,
+    -0.062660387920614874f,
+  0.998022873771486240f, -0.062851757564161406f, 0.998010803750762450f,
+    -0.063043124896828492f,
+  0.997998697036034390f, -0.063234489911580066f, 0.997986553627747020f,
+    -0.063425852601380228f,
+  0.997974373526346990f, -0.063617212959193106f, 0.997962156732281950f,
+    -0.063808570977982898f,
+  0.997949903246001190f, -0.063999926650713940f, 0.997937613067955250f,
+    -0.064191279970350637f,
+  0.997925286198596000f, -0.064382630929857465f, 0.997912922638376610f,
+    -0.064573979522198982f,
+  0.997900522387751620f, -0.064765325740339885f, 0.997888085447177110f,
+    -0.064956669577244872f,
+  0.997875611817110150f, -0.065148011025878833f, 0.997863101498009500f,
+    -0.065339350079206632f,
+  0.997850554490335110f, -0.065530686730193327f, 0.997837970794548280f,
+    -0.065722020971803990f,
+  0.997825350411111640f, -0.065913352797003805f, 0.997812693340489280f,
+    -0.066104682198758077f,
+  0.997799999583146470f, -0.066296009170032130f, 0.997787269139549960f,
+    -0.066487333703791451f,
+  0.997774502010167820f, -0.066678655793001557f, 0.997761698195469560f,
+    -0.066869975430628115f,
+  0.997748857695925690f, -0.067061292609636822f, 0.997735980512008620f,
+    -0.067252607322993499f,
+  0.997723066644191640f, -0.067443919563664051f, 0.997710116092949570f,
+    -0.067635229324614479f,
+  0.997697128858758500f, -0.067826536598810869f, 0.997684104942096030f,
+    -0.068017841379219388f,
+  0.997671044343441000f, -0.068209143658806329f, 0.997657947063273710f,
+    -0.068400443430538013f,
+  0.997644813102075420f, -0.068591740687380942f, 0.997631642460329320f,
+    -0.068783035422301630f,
+  0.997618435138519550f, -0.068974327628266746f, 0.997605191137131640f,
+    -0.069165617298242985f,
+  0.997591910456652630f, -0.069356904425197208f, 0.997578593097570800f,
+    -0.069548189002096306f,
+  0.997565239060375750f, -0.069739471021907307f, 0.997551848345558430f,
+    -0.069930750477597309f,
+  0.997538420953611340f, -0.070122027362133521f, 0.997524956885027960f,
+    -0.070313301668483250f,
+  0.997511456140303450f, -0.070504573389613856f, 0.997497918719934210f,
+    -0.070695842518492855f,
+  0.997484344624417930f, -0.070887109048087801f, 0.997470733854253670f,
+    -0.071078372971366405f,
+  0.997457086409941910f, -0.071269634281296401f, 0.997443402291984360f,
+    -0.071460892970845680f,
+  0.997429681500884180f, -0.071652149032982212f, 0.997415924037145960f,
+    -0.071843402460674027f,
+  0.997402129901275300f, -0.072034653246889332f, 0.997388299093779460f,
+    -0.072225901384596322f,
+  0.997374431615167150f, -0.072417146866763413f, 0.997360527465947940f,
+    -0.072608389686358993f,
+  0.997346586646633230f, -0.072799629836351673f, 0.997332609157735470f,
+    -0.072990867309710036f,
+  0.997318594999768600f, -0.073182102099402888f, 0.997304544173247990f,
+    -0.073373334198399032f,
+  0.997290456678690210f, -0.073564563599667426f, 0.997276332516613180f,
+    -0.073755790296177098f,
+  0.997262171687536170f, -0.073947014280897200f, 0.997247974191979860f,
+    -0.074138235546796979f,
+  0.997233740030466280f, -0.074329454086845756f, 0.997219469203518670f,
+    -0.074520669894013000f,
+  0.997205161711661850f, -0.074711882961268211f, 0.997190817555421940f,
+    -0.074903093281581082f,
+  0.997176436735326190f, -0.075094300847921305f, 0.997162019251903290f,
+    -0.075285505653258769f,
+  0.997147565105683480f, -0.075476707690563388f, 0.997133074297198110f,
+    -0.075667906952805231f,
+  0.997118546826979980f, -0.075859103432954447f, 0.997103982695563330f,
+    -0.076050297123981259f,
+  0.997089381903483400f, -0.076241488018856066f, 0.997074744451277310f,
+    -0.076432676110549283f,
+  0.997060070339482960f, -0.076623861392031492f, 0.997045359568640040f,
+    -0.076815043856273343f,
+  0.997030612139289450f, -0.077006223496245640f, 0.997015828051973310f,
+    -0.077197400304919200f,
+  0.997001007307235290f, -0.077388574275265049f, 0.996986149905620180f,
+    -0.077579745400254224f,
+  0.996971255847674320f, -0.077770913672857947f, 0.996956325133945280f,
+    -0.077962079086047492f,
+  0.996941357764982160f, -0.078153241632794232f, 0.996926353741335090f,
+    -0.078344401306069705f,
+  0.996911313063555740f, -0.078535558098845479f, 0.996896235732197210f,
+    -0.078726712004093299f,
+  0.996881121747813850f, -0.078917863014784942f, 0.996865971110961310f,
+    -0.079109011123892375f,
+  0.996850783822196610f, -0.079300156324387597f, 0.996835559882078170f,
+    -0.079491298609242769f,
+  0.996820299291165670f, -0.079682437971430126f, 0.996805002050020430f,
+    -0.079873574403921996f,
+  0.996789668159204560f, -0.080064707899690890f, 0.996774297619282050f,
+    -0.080255838451709319f,
+  0.996758890430818000f, -0.080446966052950014f, 0.996743446594378860f,
+    -0.080638090696385709f,
+  0.996727966110532490f, -0.080829212374989329f, 0.996712448979848010f,
+    -0.081020331081733857f,
+  0.996696895202896060f, -0.081211446809592441f, 0.996681304780248300f,
+    -0.081402559551538245f,
+  0.996665677712478160f, -0.081593669300544652f, 0.996650014000160070f,
+    -0.081784776049585076f,
+  0.996634313643869900f, -0.081975879791633066f, 0.996618576644185070f,
+    -0.082166980519662314f,
+  0.996602803001684130f, -0.082358078226646536f, 0.996586992716946950f,
+    -0.082549172905559673f,
+  0.996571145790554840f, -0.082740264549375692f, 0.996555262223090540f,
+    -0.082931353151068699f,
+  0.996539342015137940f, -0.083122438703612911f, 0.996523385167282450f,
+    -0.083313521199982685f,
+  0.996507391680110820f, -0.083504600633152432f, 0.996491361554210920f,
+    -0.083695676996096716f,
+  0.996475294790172160f, -0.083886750281790226f, 0.996459191388585410f,
+    -0.084077820483207694f,
+  0.996443051350042630f, -0.084268887593324071f, 0.996426874675137240f,
+    -0.084459951605114325f,
+  0.996410661364464100f, -0.084651012511553617f, 0.996394411418619290f,
+    -0.084842070305617134f,
+  0.996378124838200210f, -0.085033124980280275f, 0.996361801623805720f,
+    -0.085224176528518478f,
+  0.996345441776035900f, -0.085415224943307333f, 0.996329045295492380f,
+    -0.085606270217622529f,
+  0.996312612182778000f, -0.085797312344439894f, 0.996296142438496850f,
+    -0.085988351316735337f,
+  0.996279636063254650f, -0.086179387127484894f, 0.996263093057658140f,
+    -0.086370419769664752f,
+  0.996246513422315520f, -0.086561449236251170f, 0.996229897157836500f,
+    -0.086752475520220543f,
+  0.996213244264832040f, -0.086943498614549378f, 0.996196554743914220f,
+    -0.087134518512214307f,
+  0.996179828595696980f, -0.087325535206192059f, 0.996163065820794950f,
+    -0.087516548689459531f,
+  0.996146266419824620f, -0.087707558954993659f, 0.996129430393403740f,
+    -0.087898565995771588f,
+  0.996112557742151130f, -0.088089569804770507f, 0.996095648466687300f,
+    -0.088280570374967740f,
+  0.996078702567633980f, -0.088471567699340767f, 0.996061720045614000f,
+    -0.088662561770867149f,
+  0.996044700901251970f, -0.088853552582524600f, 0.996027645135173610f,
+    -0.089044540127290892f,
+  0.996010552748005870f, -0.089235524398144014f, 0.995993423740377360f,
+    -0.089426505388061961f,
+  0.995976258112917790f, -0.089617483090022959f, 0.995959055866258320f,
+    -0.089808457497005278f,
+  0.995941817001031350f, -0.089999428601987341f, 0.995924541517870800f,
+    -0.090190396397947695f,
+  0.995907229417411720f, -0.090381360877864983f, 0.995889880700290720f,
+    -0.090572322034717989f,
+  0.995872495367145730f, -0.090763279861485621f, 0.995855073418615790f,
+    -0.090954234351146926f,
+  0.995837614855341610f, -0.091145185496681005f, 0.995820119677964910f,
+    -0.091336133291067184f,
+  0.995802587887129160f, -0.091527077727284828f, 0.995785019483478750f,
+    -0.091718018798313455f,
+  0.995767414467659820f, -0.091908956497132724f, 0.995749772840319510f,
+    -0.092099890816722388f,
+  0.995732094602106430f, -0.092290821750062355f, 0.995714379753670610f,
+    -0.092481749290132600f,
+  0.995696628295663520f, -0.092672673429913310f, 0.995678840228737540f,
+    -0.092863594162384724f,
+  0.995661015553546910f, -0.093054511480527249f, 0.995643154270746900f,
+    -0.093245425377321375f,
+  0.995625256380994310f, -0.093436335845747787f, 0.995607321884947050f,
+    -0.093627242878787195f,
+  0.995589350783264600f, -0.093818146469420549f, 0.995571343076607770f,
+    -0.094009046610628838f,
+  0.995553298765638470f, -0.094199943295393204f, 0.995535217851020390f,
+    -0.094390836516694943f,
+  0.995517100333418110f, -0.094581726267515445f, 0.995498946213497770f,
+    -0.094772612540836243f,
+  0.995480755491926940f, -0.094963495329638992f, 0.995462528169374420f,
+    -0.095154374626905486f,
+  0.995444264246510340f, -0.095345250425617617f, 0.995425963724006160f,
+    -0.095536122718757471f,
+  0.995407626602534900f, -0.095726991499307162f, 0.995389252882770690f,
+    -0.095917856760249040f,
+  0.995370842565388990f, -0.096108718494565509f, 0.995352395651066810f,
+    -0.096299576695239128f,
+  0.995333912140482280f, -0.096490431355252593f, 0.995315392034315070f,
+    -0.096681282467588725f,
+  0.995296835333246090f, -0.096872130025230471f, 0.995278242037957670f,
+    -0.097062974021160917f,
+  0.995259612149133390f, -0.097253814448363271f, 0.995240945667458130f,
+    -0.097444651299820870f,
+  0.995222242593618360f, -0.097635484568517200f, 0.995203502928301510f,
+    -0.097826314247435861f,
+  0.995184726672196930f, -0.098017140329560604f, 0.995165913825994620f,
+    -0.098207962807875276f,
+  0.995147064390386470f, -0.098398781675363881f, 0.995128178366065490f,
+    -0.098589596925010584f,
+  0.995109255753726110f, -0.098780408549799623f, 0.995090296554064000f,
+    -0.098971216542715429f,
+  0.995071300767776170f, -0.099162020896742503f, 0.995052268395561050f,
+    -0.099352821604865540f,
+  0.995033199438118630f, -0.099543618660069319f, 0.995014093896149700f,
+    -0.099734412055338825f,
+  0.994994951770357020f, -0.099925201783659073f, 0.994975773061444140f,
+    -0.100115987838015310f,
+  0.994956557770116380f, -0.100306770211392860f, 0.994937305897080070f,
+    -0.100497548896777200f,
+  0.994918017443043200f, -0.100688323887153960f, 0.994898692408714870f,
+    -0.100879095175508860f,
+  0.994879330794805620f, -0.101069862754827820f, 0.994859932602027320f,
+    -0.101260626618096830f,
+  0.994840497831093180f, -0.101451386758302080f, 0.994821026482717860f,
+    -0.101642143168429830f,
+  0.994801518557617110f, -0.101832895841466530f, 0.994781974056508260f,
+    -0.102023644770398740f,
+  0.994762392980109930f, -0.102214389948213210f, 0.994742775329142010f,
+    -0.102405131367896720f,
+  0.994723121104325700f, -0.102595869022436280f, 0.994703430306383860f,
+    -0.102786602904819040f,
+  0.994683702936040250f, -0.102977333008032220f, 0.994663938994020390f,
+    -0.103168059325063230f,
+  0.994644138481050710f, -0.103358781848899610f, 0.994624301397859400f,
+    -0.103549500572529070f,
+  0.994604427745175660f, -0.103740215488939370f, 0.994584517523730340f,
+    -0.103930926591118510f,
+  0.994564570734255420f, -0.104121633872054590f, 0.994544587377484300f,
+    -0.104312337324735800f,
+  0.994524567454151740f, -0.104503036942150570f, 0.994504510964993700f,
+    -0.104693732717287390f,
+  0.994484417910747600f, -0.104884424643134970f, 0.994464288292152390f,
+    -0.105075112712682040f,
+  0.994444122109948040f, -0.105265796918917600f, 0.994423919364875950f,
+    -0.105456477254830710f,
+  0.994403680057679100f, -0.105647153713410620f, 0.994383404189101430f,
+    -0.105837826287646670f,
+  0.994363091759888570f, -0.106028494970528410f, 0.994342742770787270f,
+    -0.106219159755045480f,
+  0.994322357222545810f, -0.106409820634187680f, 0.994301935115913580f,
+    -0.106600477600944960f,
+  0.994281476451641550f, -0.106791130648307390f, 0.994260981230481790f,
+    -0.106981779769265230f,
+  0.994240449453187900f, -0.107172424956808840f, 0.994219881120514960f,
+    -0.107363066203928760f,
+  0.994199276233218910f, -0.107553703503615620f, 0.994178634792057590f,
+    -0.107744336848860280f,
+  0.994157956797789730f, -0.107934966232653650f, 0.994137242251175720f,
+    -0.108125591647986870f,
+  0.994116491152977070f, -0.108316213087851170f, 0.994095703503956930f,
+    -0.108506830545237920f,
+  0.994074879304879370f, -0.108697444013138720f, 0.994054018556510210f,
+    -0.108888053484545190f,
+  0.994033121259616400f, -0.109078658952449240f, 0.994012187414966220f,
+    -0.109269260409842780f,
+  0.993991217023329380f, -0.109459857849717980f, 0.993970210085476920f,
+    -0.109650451265067100f,
+  0.993949166602181130f, -0.109841040648882600f, 0.993928086574215830f,
+    -0.110031625994157000f,
+  0.993906970002356060f, -0.110222207293883060f, 0.993885816887378090f,
+    -0.110412784541053630f,
+  0.993864627230059750f, -0.110603357728661730f, 0.993843401031180180f,
+    -0.110793926849700560f,
+  0.993822138291519660f, -0.110984491897163390f, 0.993800839011860120f,
+    -0.111175052864043720f,
+  0.993779503192984580f, -0.111365609743335160f, 0.993758130835677430f,
+    -0.111556162528031480f,
+  0.993736721940724600f, -0.111746711211126590f, 0.993715276508913230f,
+    -0.111937255785614570f,
+  0.993693794541031790f, -0.112127796244489640f, 0.993672276037870010f,
+    -0.112318332580746170f,
+  0.993650721000219120f, -0.112508864787378690f, 0.993629129428871720f,
+    -0.112699392857381860f,
+  0.993607501324621610f, -0.112889916783750520f, 0.993585836688263950f,
+    -0.113080436559479620f,
+  0.993564135520595300f, -0.113270952177564350f, 0.993542397822413600f,
+    -0.113461463630999950f,
+  0.993520623594518090f, -0.113651970912781870f, 0.993498812837709360f,
+    -0.113842474015905710f,
+  0.993476965552789190f, -0.114032972933367200f, 0.993455081740560960f,
+    -0.114223467658162260f,
+  0.993433161401829360f, -0.114413958183286920f, 0.993411204537400060f,
+    -0.114604444501737420f,
+  0.993389211148080650f, -0.114794926606510080f, 0.993367181234679600f,
+    -0.114985404490601460f,
+  0.993345114798006910f, -0.115175878147008190f, 0.993323011838873950f,
+    -0.115366347568727140f,
+  0.993300872358093280f, -0.115556812748755260f, 0.993278696356479030f,
+    -0.115747273680089720f,
+  0.993256483834846440f, -0.115937730355727780f, 0.993234234794012290f,
+    -0.116128182768666930f,
+  0.993211949234794500f, -0.116318630911904750f, 0.993189627158012620f,
+    -0.116509074778439040f,
+  0.993167268564487230f, -0.116699514361267690f, 0.993144873455040430f,
+    -0.116889949653388780f,
+  0.993122441830495580f, -0.117080380647800590f, 0.993099973691677570f,
+    -0.117270807337501460f,
+  0.993077469039412300f, -0.117461229715489990f, 0.993054927874527320f,
+    -0.117651647774764860f,
+  0.993032350197851410f, -0.117842061508324980f, 0.993009736010214580f,
+    -0.118032470909169340f,
+  0.992987085312448390f, -0.118222875970297170f, 0.992964398105385610f,
+    -0.118413276684707790f,
+  0.992941674389860470f, -0.118603673045400720f, 0.992918914166708300f,
+    -0.118794065045375640f,
+  0.992896117436765980f, -0.118984452677632340f, 0.992873284200871730f,
+    -0.119174835935170880f,
+  0.992850414459865100f, -0.119365214810991350f, 0.992827508214586760f,
+    -0.119555589298094110f,
+  0.992804565465879140f, -0.119745959389479600f, 0.992781586214585570f,
+    -0.119936325078148470f,
+  0.992758570461551140f, -0.120126686357101500f, 0.992735518207621850f,
+    -0.120317043219339680f,
+  0.992712429453645460f, -0.120507395657864130f, 0.992689304200470750f,
+    -0.120697743665676110f,
+  0.992666142448948020f, -0.120888087235777080f, 0.992642944199928820f,
+    -0.121078426361168640f,
+  0.992619709454266140f, -0.121268761034852600f, 0.992596438212814290f,
+    -0.121459091249830840f,
+  0.992573130476428810f, -0.121649416999105530f, 0.992549786245966680f,
+    -0.121839738275678890f,
+  0.992526405522286100f, -0.122030055072553360f, 0.992502988306246950f,
+    -0.122220367382731540f,
+  0.992479534598709970f, -0.122410675199216200f, 0.992456044400537700f,
+    -0.122600978515010240f,
+  0.992432517712593660f, -0.122791277323116770f, 0.992408954535742850f,
+    -0.122981571616539050f,
+  0.992385354870851670f, -0.123171861388280480f, 0.992361718718787870f,
+    -0.123362146631344680f,
+  0.992338046080420420f, -0.123552427338735370f, 0.992314336956619640f,
+    -0.123742703503456510f,
+  0.992290591348257370f, -0.123932975118512160f, 0.992266809256206580f,
+    -0.124123242176906600f,
+  0.992242990681341700f, -0.124313504671644230f, 0.992219135624538450f,
+    -0.124503762595729660f,
+  0.992195244086673920f, -0.124694015942167640f, 0.992171316068626520f,
+    -0.124884264703963130f,
+  0.992147351571276090f, -0.125074508874121170f, 0.992123350595503720f,
+    -0.125264748445647060f,
+  0.992099313142191800f, -0.125454983411546230f, 0.992075239212224070f,
+    -0.125645213764824290f,
+  0.992051128806485720f, -0.125835439498487000f, 0.992026981925863360f,
+    -0.126025660605540320f,
+  0.992002798571244520f, -0.126215877078990350f, 0.991978578743518580f,
+    -0.126406088911843380f,
+  0.991954322443575950f, -0.126596296097105850f, 0.991930029672308480f,
+    -0.126786498627784410f,
+  0.991905700430609330f, -0.126976696496885870f, 0.991881334719373010f,
+    -0.127166889697417160f,
+  0.991856932539495470f, -0.127357078222385400f, 0.991832493891873780f,
+    -0.127547262064797970f,
+  0.991808018777406430f, -0.127737441217662310f, 0.991783507196993490f,
+    -0.127927615673986080f,
+  0.991758959151536110f, -0.128117785426777130f, 0.991734374641936810f,
+    -0.128307950469043420f,
+  0.991709753669099530f, -0.128498110793793170f, 0.991685096233929420f,
+    -0.128688266394034690f,
+  0.991660402337333210f, -0.128878417262776550f, 0.991635671980218740f,
+    -0.129068563393027410f,
+  0.991610905163495370f, -0.129258704777796140f, 0.991586101888073500f,
+    -0.129448841410091780f,
+  0.991561262154865290f, -0.129638973282923560f, 0.991536385964783880f,
+    -0.129829100389300930f,
+  0.991511473318743900f, -0.130019222722233350f, 0.991486524217661480f,
+    -0.130209340274730630f,
+  0.991461538662453790f, -0.130399453039802690f, 0.991436516654039420f,
+    -0.130589561010459650f,
+  0.991411458193338540f, -0.130779664179711710f, 0.991386363281272280f,
+    -0.130969762540569380f,
+  0.991361231918763460f, -0.131159856086043270f, 0.991336064106736140f,
+    -0.131349944809144190f,
+  0.991310859846115440f, -0.131540028702883120f, 0.991285619137828200f,
+    -0.131730107760271160f,
+  0.991260341982802440f, -0.131920181974319790f, 0.991235028381967420f,
+    -0.132110251338040360f,
+  0.991209678336254060f, -0.132300315844444650f, 0.991184291846594180f,
+    -0.132490375486544550f,
+  0.991158868913921350f, -0.132680430257352070f, 0.991133409539170170f,
+    -0.132870480149879430f,
+  0.991107913723276890f, -0.133060525157139060f, 0.991082381467178640f,
+    -0.133250565272143570f,
+  0.991056812771814340f, -0.133440600487905680f, 0.991031207638124130f,
+    -0.133630630797438340f,
+  0.991005566067049370f, -0.133820656193754720f, 0.990979888059532740f,
+    -0.134010676669868130f,
+  0.990954173616518500f, -0.134200692218792020f, 0.990928422738951990f,
+    -0.134390702833540070f,
+  0.990902635427780010f, -0.134580708507126170f, 0.990876811683950700f,
+    -0.134770709232564350f,
+  0.990850951508413620f, -0.134960705002868750f, 0.990825054902119470f,
+    -0.135150695811053850f,
+  0.990799121866020370f, -0.135340681650134210f, 0.990773152401069780f,
+    -0.135530662513124590f,
+  0.990747146508222710f, -0.135720638393039910f, 0.990721104188435180f,
+    -0.135910609282895330f,
+  0.990695025442664630f, -0.136100575175706200f, 0.990668910271870100f,
+    -0.136290536064487960f,
+  0.990642758677011570f, -0.136480491942256280f, 0.990616570659050620f,
+    -0.136670442802027090f,
+  0.990590346218950150f, -0.136860388636816380f, 0.990564085357674370f,
+    -0.137050329439640410f,
+  0.990537788076188750f, -0.137240265203515590f, 0.990511454375460290f,
+    -0.137430195921458550f,
+  0.990485084256457090f, -0.137620121586486040f, 0.990458677720148620f,
+    -0.137810042191615080f,
+  0.990432234767505970f, -0.137999957729862790f, 0.990405755399501260f,
+    -0.138189868194246560f,
+  0.990379239617108160f, -0.138379773577783890f, 0.990352687421301450f,
+    -0.138569673873492500f,
+  0.990326098813057330f, -0.138759569074390350f, 0.990299473793353590f,
+    -0.138949459173495490f,
+  0.990272812363169110f, -0.139139344163826200f, 0.990246114523483990f,
+    -0.139329224038400980f,
+  0.990219380275280000f, -0.139519098790238490f, 0.990192609619540030f,
+    -0.139708968412357550f,
+  0.990165802557248400f, -0.139898832897777210f, 0.990138959089390650f,
+    -0.140088692239516670f,
+  0.990112079216953770f, -0.140278546430595420f, 0.990085162940925970f,
+    -0.140468395464033000f,
+  0.990058210262297120f, -0.140658239332849210f, 0.990031221182058000f,
+    -0.140848078030064080f,
+  0.990004195701200910f, -0.141037911548697710f, 0.989977133820719610f,
+    -0.141227739881770510f,
+  0.989950035541608990f, -0.141417563022303020f, 0.989922900864865450f,
+    -0.141607380963316020f,
+  0.989895729791486660f, -0.141797193697830390f, 0.989868522322471580f,
+    -0.141987001218867290f,
+  0.989841278458820530f, -0.142176803519448030f, 0.989813998201535260f,
+    -0.142366600592594180f,
+  0.989786681551618640f, -0.142556392431327340f, 0.989759328510075200f,
+    -0.142746179028669460f,
+  0.989731939077910570f, -0.142935960377642670f, 0.989704513256131850f,
+    -0.143125736471269190f,
+  0.989677051045747210f, -0.143315507302571500f, 0.989649552447766530f,
+    -0.143505272864572290f,
+  0.989622017463200890f, -0.143695033150294470f, 0.989594446093062460f,
+    -0.143884788152760980f,
+  0.989566838338365120f, -0.144074537864995160f, 0.989539194200123930f,
+    -0.144264282280020440f,
+  0.989511513679355190f, -0.144454021390860470f, 0.989483796777076760f,
+    -0.144643755190539040f,
+  0.989456043494307710f, -0.144833483672080210f, 0.989428253832068230f,
+    -0.145023206828508220f,
+  0.989400427791380380f, -0.145212924652847460f, 0.989372565373267010f,
+    -0.145402637138122570f,
+  0.989344666578752640f, -0.145592344277358340f, 0.989316731408863000f,
+    -0.145782046063579860f,
+  0.989288759864625170f, -0.145971742489812210f, 0.989260751947067640f,
+    -0.146161433549080900f,
+  0.989232707657220050f, -0.146351119234411460f, 0.989204626996113780f,
+    -0.146540799538829760f,
+  0.989176509964781010f, -0.146730474455361750f, 0.989148356564255590f,
+    -0.146920143977033620f,
+  0.989120166795572690f, -0.147109808096871820f, 0.989091940659768800f,
+    -0.147299466807902850f,
+  0.989063678157881540f, -0.147489120103153570f, 0.989035379290950310f,
+    -0.147678767975650970f,
+  0.989007044060015270f, -0.147868410418422220f, 0.988978672466118480f,
+    -0.148058047424494720f,
+  0.988950264510302990f, -0.148247678986896030f, 0.988921820193613190f,
+    -0.148437305098653970f,
+  0.988893339517095130f, -0.148626925752796540f, 0.988864822481795640f,
+    -0.148816540942351920f,
+  0.988836269088763540f, -0.149006150660348450f, 0.988807679339048450f,
+    -0.149195754899814820f,
+  0.988779053233701520f, -0.149385353653779720f, 0.988750390773775360f,
+    -0.149574946915272230f,
+  0.988721691960323780f, -0.149764534677321510f, 0.988692956794401940f,
+    -0.149954116932956960f,
+  0.988664185277066230f, -0.150143693675208190f, 0.988635377409374790f,
+    -0.150333264897105000f,
+  0.988606533192386450f, -0.150522830591677400f, 0.988577652627162020f,
+    -0.150712390751955610f,
+  0.988548735714763200f, -0.150901945370970040f, 0.988519782456253270f,
+    -0.151091494441751300f,
+  0.988490792852696590f, -0.151281037957330220f, 0.988461766905159300f,
+    -0.151470575910737810f,
+  0.988432704614708340f, -0.151660108295005310f, 0.988403605982412390f,
+    -0.151849635103164180f,
+  0.988374471009341280f, -0.152039156328246050f, 0.988345299696566150f,
+    -0.152228671963282740f,
+  0.988316092045159690f, -0.152418182001306330f, 0.988286848056195820f,
+    -0.152607686435349050f,
+  0.988257567730749460f, -0.152797185258443440f, 0.988228251069897420f,
+    -0.152986678463622040f,
+  0.988198898074717610f, -0.153176166043917840f, 0.988169508746289060f,
+    -0.153365647992363880f,
+  0.988140083085692570f, -0.153555124301993450f, 0.988110621094009820f,
+    -0.153744594965840030f,
+  0.988081122772324070f, -0.153934059976937350f, 0.988051588121720110f,
+    -0.154123519328319360f,
+  0.988022017143283530f, -0.154312973013020100f, 0.987992409838101880f,
+    -0.154502421024073940f,
+  0.987962766207263420f, -0.154691863354515430f, 0.987933086251858380f,
+    -0.154881299997379320f,
+  0.987903369972977790f, -0.155070730945700510f, 0.987873617371714200f,
+    -0.155260156192514240f,
+  0.987843828449161740f, -0.155449575730855850f, 0.987814003206415550f,
+    -0.155638989553760900f,
+  0.987784141644572180f, -0.155828397654265230f, 0.987754243764729530f,
+    -0.156017800025404800f,
+  0.987724309567986960f, -0.156207196660215900f, 0.987694339055445130f,
+    -0.156396587551734880f,
+  0.987664332228205710f, -0.156585972692998430f, 0.987634289087372160f,
+    -0.156775352077043350f,
+  0.987604209634049160f, -0.156964725696906780f, 0.987574093869342360f,
+    -0.157154093545625900f,
+  0.987543941794359230f, -0.157343455616238250f, 0.987513753410208420f,
+    -0.157532811901781530f,
+  0.987483528717999710f, -0.157722162395293630f, 0.987453267718844560f,
+    -0.157911507089812660f,
+  0.987422970413855410f, -0.158100845978376980f, 0.987392636804146240f,
+    -0.158290179054025180f,
+  0.987362266890832400f, -0.158479506309795960f, 0.987331860675030430f,
+    -0.158668827738728310f,
+  0.987301418157858430f, -0.158858143333861450f, 0.987270939340435420f,
+    -0.159047453088234760f,
+  0.987240424223882250f, -0.159236756994887850f, 0.987209872809320820f,
+    -0.159426055046860580f,
+  0.987179285097874340f, -0.159615347237193060f, 0.987148661090667570f,
+    -0.159804633558925440f,
+  0.987118000788826280f, -0.159993914005098270f, 0.987087304193477900f,
+    -0.160183188568752220f,
+  0.987056571305750970f, -0.160372457242928280f, 0.987025802126775600f,
+    -0.160561720020667490f,
+  0.986994996657682980f, -0.160750976895011220f, 0.986964154899605650f,
+    -0.160940227859001080f,
+  0.986933276853677710f, -0.161129472905678810f, 0.986902362521034470f,
+    -0.161318712028086400f,
+  0.986871411902812470f, -0.161507945219266120f, 0.986840425000149680f,
+    -0.161697172472260400f,
+  0.986809401814185530f, -0.161886393780111830f, 0.986778342346060430f,
+    -0.162075609135863330f,
+  0.986747246596916590f, -0.162264818532558000f, 0.986716114567897100f,
+    -0.162454021963239190f,
+  0.986684946260146690f, -0.162643219420950310f, 0.986653741674811350f,
+    -0.162832410898735210f,
+  0.986622500813038480f, -0.163021596389637840f, 0.986591223675976400f,
+    -0.163210775886702380f,
+  0.986559910264775410f, -0.163399949382973230f, 0.986528560580586690f,
+    -0.163589116871495020f,
+  0.986497174624562880f, -0.163778278345312670f, 0.986465752397857940f,
+    -0.163967433797471170f,
+  0.986434293901627180f, -0.164156583221015810f, 0.986402799137027220f,
+    -0.164345726608992190f,
+  0.986371268105216030f, -0.164534863954446000f, 0.986339700807353000f,
+    -0.164723995250423170f,
+  0.986308097244598670f, -0.164913120489969890f, 0.986276457418115090f,
+    -0.165102239666132660f,
+  0.986244781329065460f, -0.165291352771958000f, 0.986213068978614490f,
+    -0.165480459800492780f,
+  0.986181320367928270f, -0.165669560744784120f, 0.986149535498173860f,
+    -0.165858655597879300f,
+  0.986117714370520090f, -0.166047744352825790f, 0.986085856986136820f,
+    -0.166236827002671420f,
+  0.986053963346195440f, -0.166425903540464100f, 0.986022033451868560f,
+    -0.166614973959252090f,
+  0.985990067304330140f, -0.166804038252083730f, 0.985958064904755460f,
+    -0.166993096412007710f,
+  0.985926026254321130f, -0.167182148432072940f, 0.985893951354205210f,
+    -0.167371194305328430f,
+  0.985861840205586980f, -0.167560234024823560f, 0.985829692809647050f,
+    -0.167749267583607890f,
+  0.985797509167567480f, -0.167938294974731170f, 0.985765289280531310f,
+    -0.168127316191243410f,
+  0.985733033149723490f, -0.168316331226194830f, 0.985700740776329850f,
+    -0.168505340072635900f,
+  0.985668412161537550f, -0.168694342723617330f, 0.985636047306535420f,
+    -0.168883339172189980f,
+  0.985603646212513400f, -0.169072329411405010f, 0.985571208880662740f,
+    -0.169261313434313830f,
+  0.985538735312176060f, -0.169450291233967960f, 0.985506225508247290f,
+    -0.169639262803419290f,
+  0.985473679470071810f, -0.169828228135719850f, 0.985441097198846210f,
+    -0.170017187223921950f,
+  0.985408478695768420f, -0.170206140061078070f, 0.985375823962037710f,
+    -0.170395086640240940f,
+  0.985343132998854790f, -0.170584026954463590f, 0.985310405807421570f,
+    -0.170772960996799230f,
+  0.985277642388941220f, -0.170961888760301220f, 0.985244842744618540f,
+    -0.171150810238023280f,
+  0.985212006875659350f, -0.171339725423019310f, 0.985179134783271130f,
+    -0.171528634308343420f,
+  0.985146226468662230f, -0.171717536887049970f, 0.985113281933042710f,
+    -0.171906433152193530f,
+  0.985080301177623800f, -0.172095323096829010f, 0.985047284203618200f,
+    -0.172284206714011370f,
+  0.985014231012239840f, -0.172473083996795950f, 0.984981141604703960f,
+    -0.172661954938238270f,
+  0.984948015982227030f, -0.172850819531394080f, 0.984914854146027200f,
+    -0.173039677769319360f,
+  0.984881656097323700f, -0.173228529645070320f, 0.984848421837337010f,
+    -0.173417375151703470f,
+  0.984815151367289140f, -0.173606214282275410f, 0.984781844688403350f,
+    -0.173795047029843160f,
+  0.984748501801904210f, -0.173983873387463820f, 0.984715122709017620f,
+    -0.174172693348194820f,
+  0.984681707410970940f, -0.174361506905093750f, 0.984648255908992630f,
+    -0.174550314051218510f,
+  0.984614768204312600f, -0.174739114779627200f, 0.984581244298162180f,
+    -0.174927909083378160f,
+  0.984547684191773960f, -0.175116696955529920f, 0.984514087886381840f,
+    -0.175305478389141320f,
+  0.984480455383220930f, -0.175494253377271430f, 0.984446786683527920f,
+    -0.175683021912979490f,
+  0.984413081788540700f, -0.175871783989325040f, 0.984379340699498510f,
+    -0.176060539599367820f,
+  0.984345563417641900f, -0.176249288736167880f, 0.984311749944212780f,
+    -0.176438031392785410f,
+  0.984277900280454370f, -0.176626767562280880f, 0.984244014427611110f,
+    -0.176815497237715000f,
+  0.984210092386929030f, -0.177004220412148750f, 0.984176134159655320f,
+    -0.177192937078643280f,
+  0.984142139747038570f, -0.177381647230260040f, 0.984108109150328540f,
+    -0.177570350860060710f,
+  0.984074042370776450f, -0.177759047961107170f, 0.984039939409634970f,
+    -0.177947738526461560f,
+  0.984005800268157870f, -0.178136422549186300f, 0.983971624947600270f,
+    -0.178325100022344000f,
+  0.983937413449218920f, -0.178513770938997510f, 0.983903165774271500f,
+    -0.178702435292209970f,
+  0.983868881924017220f, -0.178891093075044720f, 0.983834561899716630f,
+    -0.179079744280565390f,
+  0.983800205702631600f, -0.179268388901835750f, 0.983765813334025240f,
+    -0.179457026931919890f,
+  0.983731384795162090f, -0.179645658363882160f, 0.983696920087308140f,
+    -0.179834283190787090f,
+  0.983662419211730250f, -0.180022901405699510f, 0.983627882169697210f,
+    -0.180211513001684450f,
+  0.983593308962478650f, -0.180400117971807240f, 0.983558699591345900f,
+    -0.180588716309133340f,
+  0.983524054057571260f, -0.180777308006728590f, 0.983489372362428730f,
+    -0.180965893057658980f,
+  0.983454654507193270f, -0.181154471454990810f, 0.983419900493141540f,
+    -0.181343043191790540f,
+  0.983385110321551180f, -0.181531608261124970f, 0.983350283993701500f,
+    -0.181720166656061110f,
+  0.983315421510872810f, -0.181908718369666160f, 0.983280522874346970f,
+    -0.182097263395007650f,
+  0.983245588085407070f, -0.182285801725153300f, 0.983210617145337640f,
+    -0.182474333353171120f,
+  0.983175610055424420f, -0.182662858272129270f, 0.983140566816954500f,
+    -0.182851376475096330f,
+  0.983105487431216290f, -0.183039887955140950f, 0.983070371899499640f,
+    -0.183228392705332140f,
+  0.983035220223095640f, -0.183416890718739100f, 0.983000032403296590f,
+    -0.183605381988431270f,
+  0.982964808441396440f, -0.183793866507478450f, 0.982929548338690170f,
+    -0.183982344268950520f,
+  0.982894252096474070f, -0.184170815265917720f, 0.982858919716046110f,
+    -0.184359279491450510f,
+  0.982823551198705240f, -0.184547736938619620f, 0.982788146545751970f,
+    -0.184736187600495950f,
+  0.982752705758487830f, -0.184924631470150790f, 0.982717228838215990f,
+    -0.185113068540655540f,
+  0.982681715786240860f, -0.185301498805081900f, 0.982646166603868050f,
+    -0.185489922256501880f,
+  0.982610581292404750f, -0.185678338887987630f, 0.982574959853159240f,
+    -0.185866748692611660f,
+  0.982539302287441240f, -0.186055151663446630f, 0.982503608596561830f,
+    -0.186243547793565560f,
+  0.982467878781833170f, -0.186431937076041610f, 0.982432112844569110f,
+    -0.186620319503948280f,
+  0.982396310786084690f, -0.186808695070359270f, 0.982360472607696210f,
+    -0.186997063768348540f,
+  0.982324598310721280f, -0.187185425590990330f, 0.982288687896478830f,
+    -0.187373780531359110f,
+  0.982252741366289370f, -0.187562128582529600f, 0.982216758721474510f,
+    -0.187750469737576780f,
+  0.982180739963357090f, -0.187938803989575910f, 0.982144685093261580f,
+    -0.188127131331602420f,
+  0.982108594112513610f, -0.188315451756732120f, 0.982072467022440000f,
+    -0.188503765258040940f,
+  0.982036303824369020f, -0.188692071828605230f, 0.982000104519630490f,
+    -0.188880371461501380f,
+  0.981963869109555240f, -0.189068664149806190f, 0.981927597595475540f,
+    -0.189256949886596750f,
+  0.981891289978725100f, -0.189445228664950230f, 0.981854946260638630f,
+    -0.189633500477944190f,
+  0.981818566442552500f, -0.189821765318656410f, 0.981782150525804310f,
+    -0.190010023180164990f,
+  0.981745698511732990f, -0.190198274055548150f, 0.981709210401678800f,
+    -0.190386517937884470f,
+  0.981672686196983110f, -0.190574754820252740f, 0.981636125898989080f,
+    -0.190762984695732110f,
+  0.981599529509040720f, -0.190951207557401800f, 0.981562897028483650f,
+    -0.191139423398341450f,
+  0.981526228458664770f, -0.191327632211630900f, 0.981489523800932130f,
+    -0.191515833990350210f,
+  0.981452783056635520f, -0.191704028727579800f, 0.981416006227125550f,
+    -0.191892216416400220f,
+  0.981379193313754560f, -0.192080397049892440f, 0.981342344317876040f,
+    -0.192268570621137500f,
+  0.981305459240844670f, -0.192456737123216840f, 0.981268538084016710f,
+    -0.192644896549212100f,
+  0.981231580848749730f, -0.192833048892205230f, 0.981194587536402320f,
+    -0.193021194145278380f,
+  0.981157558148334830f, -0.193209332301513960f, 0.981120492685908730f,
+    -0.193397463353994740f,
+  0.981083391150486710f, -0.193585587295803610f, 0.981046253543432780f,
+    -0.193773704120023820f,
+  0.981009079866112630f, -0.193961813819738840f, 0.980971870119892840f,
+    -0.194149916388032450f,
+  0.980934624306141640f, -0.194338011817988600f, 0.980897342426228390f,
+    -0.194526100102691610f,
+  0.980860024481523870f, -0.194714181235225960f, 0.980822670473400100f,
+    -0.194902255208676520f,
+  0.980785280403230430f, -0.195090322016128250f, 0.980747854272389750f,
+    -0.195278381650666550f,
+  0.980710392082253970f, -0.195466434105376980f, 0.980672893834200530f,
+    -0.195654479373345370f,
+  0.980635359529608120f, -0.195842517447657850f, 0.980597789169856850f,
+    -0.196030548321400790f,
+  0.980560182756327840f, -0.196218571987660880f, 0.980522540290404090f,
+    -0.196406588439524970f,
+  0.980484861773469380f, -0.196594597670080220f, 0.980447147206909060f,
+    -0.196782599672414100f,
+  0.980409396592109910f, -0.196970594439614340f, 0.980371609930459800f,
+    -0.197158581964768880f,
+  0.980333787223347960f, -0.197346562240965920f, 0.980295928472165290f,
+    -0.197534535261294030f,
+  0.980258033678303550f, -0.197722501018841920f, 0.980220102843156080f,
+    -0.197910459506698670f,
+  0.980182135968117430f, -0.198098410717953560f, 0.980144133054583590f,
+    -0.198286354645696220f,
+  0.980106094103951770f, -0.198474291283016390f, 0.980068019117620650f,
+    -0.198662220623004200f,
+  0.980029908096990090f, -0.198850142658750090f, 0.979991761043461200f,
+    -0.199038057383344680f,
+  0.979953577958436740f, -0.199225964789878830f, 0.979915358843320480f,
+    -0.199413864871443770f,
+  0.979877103699517640f, -0.199601757621130970f, 0.979838812528434740f,
+    -0.199789643032032090f,
+  0.979800485331479790f, -0.199977521097239150f, 0.979762122110061750f,
+    -0.200165391809844440f,
+  0.979723722865591170f, -0.200353255162940450f, 0.979685287599479930f,
+    -0.200541111149619980f,
+  0.979646816313141210f, -0.200728959762976140f, 0.979608309007989450f,
+    -0.200916800996102230f,
+  0.979569765685440520f, -0.201104634842091900f, 0.979531186346911500f,
+    -0.201292461294039020f,
+  0.979492570993820810f, -0.201480280345037730f, 0.979453919627588210f,
+    -0.201668091988182530f,
+  0.979415232249634780f, -0.201855896216568050f, 0.979376508861383170f,
+    -0.202043693023289260f,
+  0.979337749464256780f, -0.202231482401441450f, 0.979298954059681040f,
+    -0.202419264344120160f,
+  0.979260122649082020f, -0.202607038844421130f, 0.979221255233887700f,
+    -0.202794805895440440f,
+  0.979182351815526930f, -0.202982565490274440f, 0.979143412395430230f,
+    -0.203170317622019790f,
+  0.979104436975029250f, -0.203358062283773320f, 0.979065425555756930f,
+    -0.203545799468632190f,
+  0.979026378139047580f, -0.203733529169693920f, 0.978987294726337050f,
+    -0.203921251380056120f,
+  0.978948175319062200f, -0.204108966092816870f, 0.978909019918661310f,
+    -0.204296673301074370f,
+  0.978869828526574120f, -0.204484372997927240f, 0.978830601144241470f,
+    -0.204672065176474210f,
+  0.978791337773105670f, -0.204859749829814420f, 0.978752038414610340f,
+    -0.205047426951047250f,
+  0.978712703070200420f, -0.205235096533272350f, 0.978673331741322210f,
+    -0.205422758569589610f,
+  0.978633924429423210f, -0.205610413053099240f, 0.978594481135952270f,
+    -0.205798059976901790f,
+  0.978555001862359550f, -0.205985699334097910f, 0.978515486610096910f,
+    -0.206173331117788710f,
+  0.978475935380616830f, -0.206360955321075510f, 0.978436348175373730f,
+    -0.206548571937059890f,
+  0.978396724995823090f, -0.206736180958843690f, 0.978357065843421640f,
+    -0.206923782379529100f,
+  0.978317370719627650f, -0.207111376192218560f, 0.978277639625900530f,
+    -0.207298962390014750f,
+  0.978237872563701090f, -0.207486540966020650f, 0.978198069534491400f,
+    -0.207674111913339570f,
+  0.978158230539735050f, -0.207861675225075070f, 0.978118355580896660f,
+    -0.208049230894330940f,
+  0.978078444659442380f, -0.208236778914211330f, 0.978038497776839600f,
+    -0.208424319277820600f,
+  0.977998514934557140f, -0.208611851978263490f, 0.977958496134064830f,
+    -0.208799377008644900f,
+  0.977918441376834370f, -0.208986894362070070f, 0.977878350664338150f,
+    -0.209174404031644580f,
+  0.977838223998050430f, -0.209361906010474160f, 0.977798061379446360f,
+    -0.209549400291664940f,
+  0.977757862810002760f, -0.209736886868323290f, 0.977717628291197460f,
+    -0.209924365733555880f,
+  0.977677357824509930f, -0.210111836880469610f, 0.977637051411420770f,
+    -0.210299300302171730f,
+  0.977596709053411890f, -0.210486755991769720f, 0.977556330751966460f,
+    -0.210674203942371440f,
+  0.977515916508569280f, -0.210861644147084860f, 0.977475466324706170f,
+    -0.211049076599018390f,
+  0.977434980201864260f, -0.211236501291280710f, 0.977394458141532250f,
+    -0.211423918216980670f,
+  0.977353900145199960f, -0.211611327369227550f, 0.977313306214358750f,
+    -0.211798728741130840f,
+  0.977272676350500860f, -0.211986122325800330f, 0.977232010555120320f,
+    -0.212173508116346080f,
+  0.977191308829712280f, -0.212360886105878420f, 0.977150571175773200f,
+    -0.212548256287508060f,
+  0.977109797594800880f, -0.212735618654345930f, 0.977068988088294450f,
+    -0.212922973199503180f,
+  0.977028142657754390f, -0.213110319916091360f, 0.976987261304682390f,
+    -0.213297658797222320f,
+  0.976946344030581670f, -0.213484989836008050f, 0.976905390836956490f,
+    -0.213672313025560970f,
+  0.976864401725312640f, -0.213859628358993750f, 0.976823376697157240f,
+    -0.214046935829419360f,
+  0.976782315753998650f, -0.214234235429950990f, 0.976741218897346550f,
+    -0.214421527153702160f,
+  0.976700086128711840f, -0.214608810993786760f, 0.976658917449606980f,
+    -0.214796086943318860f,
+  0.976617712861545640f, -0.214983354995412820f, 0.976576472366042610f,
+    -0.215170615143183390f,
+  0.976535195964614470f, -0.215357867379745550f, 0.976493883658778650f,
+    -0.215545111698214500f,
+  0.976452535450054060f, -0.215732348091705880f, 0.976411151339961040f,
+    -0.215919576553335490f,
+  0.976369731330021140f, -0.216106797076219520f, 0.976328275421757260f,
+    -0.216294009653474340f,
+  0.976286783616693630f, -0.216481214278216730f, 0.976245255916355800f,
+    -0.216668410943563730f,
+  0.976203692322270560f, -0.216855599642632620f, 0.976162092835966110f,
+    -0.217042780368540990f,
+  0.976120457458971910f, -0.217229953114406790f, 0.976078786192818850f,
+    -0.217417117873348190f,
+  0.976037079039039020f, -0.217604274638483640f, 0.975995335999165990f,
+    -0.217791423402931950f,
+  0.975953557074734300f, -0.217978564159812200f, 0.975911742267280170f,
+    -0.218165696902243800f,
+  0.975869891578341030f, -0.218352821623346320f, 0.975828005009455660f,
+    -0.218539938316239770f,
+  0.975786082562163930f, -0.218727046974044440f, 0.975744124238007270f,
+    -0.218914147589880840f,
+  0.975702130038528570f, -0.219101240156869800f, 0.975660099965271590f,
+    -0.219288324668132470f,
+  0.975618034019781750f, -0.219475401116790310f, 0.975575932203605720f,
+    -0.219662469495965050f,
+  0.975533794518291360f, -0.219849529798778700f, 0.975491620965388110f,
+    -0.220036582018353580f,
+  0.975449411546446380f, -0.220223626147812380f, 0.975407166263018270f,
+    -0.220410662180277940f,
+  0.975364885116656980f, -0.220597690108873510f, 0.975322568108916930f,
+    -0.220784709926722610f,
+  0.975280215241354220f, -0.220971721626949110f, 0.975237826515525820f,
+    -0.221158725202677010f,
+  0.975195401932990370f, -0.221345720647030810f, 0.975152941495307620f,
+    -0.221532707953135230f,
+  0.975110445204038890f, -0.221719687114115220f, 0.975067913060746470f,
+    -0.221906658123096100f,
+  0.975025345066994120f, -0.222093620973203510f, 0.974982741224347140f,
+    -0.222280575657563370f,
+  0.974940101534371830f, -0.222467522169301880f, 0.974897425998635820f,
+    -0.222654460501545500f,
+  0.974854714618708430f, -0.222841390647421120f, 0.974811967396159830f,
+    -0.223028312600055820f,
+  0.974769184332561770f, -0.223215226352576980f, 0.974726365429487320f,
+    -0.223402131898112370f,
+  0.974683510688510670f, -0.223589029229789990f, 0.974640620111207560f,
+    -0.223775918340738150f,
+  0.974597693699155050f, -0.223962799224085460f, 0.974554731453931230f,
+    -0.224149671872960870f,
+  0.974511733377115720f, -0.224336536280493600f, 0.974468699470289580f,
+    -0.224523392439813170f,
+  0.974425629735034990f, -0.224710240344049430f, 0.974382524172935470f,
+    -0.224897079986332490f,
+  0.974339382785575860f, -0.225083911359792830f, 0.974296205574542440f,
+    -0.225270734457561160f,
+  0.974252992541422500f, -0.225457549272768540f, 0.974209743687805220f,
+    -0.225644355798546330f,
+  0.974166459015280320f, -0.225831154028026170f, 0.974123138525439640f,
+    -0.226017943954340020f,
+  0.974079782219875680f, -0.226204725570620190f, 0.974036390100182610f,
+    -0.226391498869999240f,
+  0.973992962167955830f, -0.226578263845610000f, 0.973949498424792170f,
+    -0.226765020490585690f,
+  0.973905998872289570f, -0.226951768798059810f, 0.973862463512047300f,
+    -0.227138508761166170f,
+  0.973818892345666100f, -0.227325240373038860f, 0.973775285374748110f,
+    -0.227511963626812280f,
+  0.973731642600896400f, -0.227698678515621170f, 0.973687964025715670f,
+    -0.227885385032600530f,
+  0.973644249650811980f, -0.228072083170885730f, 0.973600499477792370f,
+    -0.228258772923612380f,
+  0.973556713508265560f, -0.228445454283916470f, 0.973512891743841370f,
+    -0.228632127244934230f,
+  0.973469034186131070f, -0.228818791799802220f, 0.973425140836747030f,
+    -0.229005447941657340f,
+  0.973381211697303290f, -0.229192095663636770f, 0.973337246769414910f,
+    -0.229378734958878010f,
+  0.973293246054698250f, -0.229565365820518870f, 0.973249209554771230f,
+    -0.229751988241697490f,
+  0.973205137271252800f, -0.229938602215552210f, 0.973161029205763530f,
+    -0.230125207735221850f,
+  0.973116885359925130f, -0.230311804793845440f, 0.973072705735360530f,
+    -0.230498393384562350f,
+  0.973028490333694210f, -0.230684973500512200f, 0.972984239156551740f,
+    -0.230871545134835020f,
+  0.972939952205560180f, -0.231058108280671110f, 0.972895629482347760f,
+    -0.231244662931161050f,
+  0.972851270988544180f, -0.231431209079445750f, 0.972806876725780370f,
+    -0.231617746718666470f,
+  0.972762446695688570f, -0.231804275841964780f, 0.972717980899902250f,
+    -0.231990796442482440f,
+  0.972673479340056430f, -0.232177308513361710f, 0.972628942017787270f,
+    -0.232363812047745030f,
+  0.972584368934732210f, -0.232550307038775240f, 0.972539760092530180f,
+    -0.232736793479595390f,
+  0.972495115492821190f, -0.232923271363348980f, 0.972450435137246830f,
+    -0.233109740683179690f,
+  0.972405719027449770f, -0.233296201432231590f, 0.972360967165074140f,
+    -0.233482653603649090f,
+  0.972316179551765300f, -0.233669097190576820f, 0.972271356189170040f,
+    -0.233855532186159840f,
+  0.972226497078936270f, -0.234041958583543430f, 0.972181602222713440f,
+    -0.234228376375873210f,
+  0.972136671622152230f, -0.234414785556295160f, 0.972091705278904430f,
+    -0.234601186117955550f,
+  0.972046703194623500f, -0.234787578054000970f, 0.972001665370963890f,
+    -0.234973961357578250f,
+  0.971956591809581720f, -0.235160336021834730f, 0.971911482512134000f,
+    -0.235346702039917840f,
+  0.971866337480279400f, -0.235533059404975490f, 0.971821156715677700f,
+    -0.235719408110155820f,
+  0.971775940219990140f, -0.235905748148607370f, 0.971730687994879160f,
+    -0.236092079513478910f,
+  0.971685400042008540f, -0.236278402197919570f, 0.971640076363043390f,
+    -0.236464716195078780f,
+  0.971594716959650160f, -0.236651021498106380f, 0.971549321833496630f,
+    -0.236837318100152380f,
+  0.971503890986251780f, -0.237023605994367200f, 0.971458424419585960f,
+    -0.237209885173901600f,
+  0.971412922135170940f, -0.237396155631906610f, 0.971367384134679490f,
+    -0.237582417361533570f,
+  0.971321810419786160f, -0.237768670355934190f, 0.971276200992166490f,
+    -0.237954914608260540f,
+  0.971230555853497380f, -0.238141150111664840f, 0.971184875005457030f,
+    -0.238327376859299810f,
+  0.971139158449725090f, -0.238513594844318420f, 0.971093406187982460f,
+    -0.238699804059873980f,
+  0.971047618221911100f, -0.238886004499120040f, 0.971001794553194690f,
+    -0.239072196155210610f,
+  0.970955935183517970f, -0.239258379021299980f, 0.970910040114567050f,
+    -0.239444553090542630f,
+  0.970864109348029470f, -0.239630718356093560f, 0.970818142885593870f,
+    -0.239816874811108000f,
+  0.970772140728950350f, -0.240003022448741500f, 0.970726102879790110f,
+    -0.240189161262149900f,
+  0.970680029339806130f, -0.240375291244489450f, 0.970633920110692160f,
+    -0.240561412388916650f,
+  0.970587775194143630f, -0.240747524688588430f, 0.970541594591857070f,
+    -0.240933628136661910f,
+  0.970495378305530560f, -0.241119722726294590f, 0.970449126336863090f,
+    -0.241305808450644370f,
+  0.970402838687555500f, -0.241491885302869330f, 0.970356515359309450f,
+    -0.241677953276128010f,
+  0.970310156353828110f, -0.241864012363579180f, 0.970263761672816140f,
+    -0.242050062558382070f,
+  0.970217331317979160f, -0.242236103853696010f, 0.970170865291024480f,
+    -0.242422136242680890f,
+  0.970124363593660280f, -0.242608159718496810f, 0.970077826227596420f,
+    -0.242794174274304220f,
+  0.970031253194543970f, -0.242980179903263870f, 0.969984644496215240f,
+    -0.243166176598536900f,
+  0.969938000134323960f, -0.243352164353284740f, 0.969891320110585100f,
+    -0.243538143160669130f,
+  0.969844604426714830f, -0.243724113013852160f, 0.969797853084430890f,
+    -0.243910073905996260f,
+  0.969751066085452140f, -0.244096025830264210f, 0.969704243431498860f,
+    -0.244281968779819030f,
+  0.969657385124292450f, -0.244467902747824150f, 0.969610491165555870f,
+    -0.244653827727443320f,
+  0.969563561557013180f, -0.244839743711840670f, 0.969516596300390000f,
+    -0.245025650694180470f,
+  0.969469595397413060f, -0.245211548667627540f, 0.969422558849810320f,
+    -0.245397437625346960f,
+  0.969375486659311280f, -0.245583317560504060f, 0.969328378827646660f,
+    -0.245769188466264580f,
+  0.969281235356548530f, -0.245955050335794590f, 0.969234056247750050f,
+    -0.246140903162260530f,
+  0.969186841502985950f, -0.246326746938829030f, 0.969139591123992280f,
+    -0.246512581658667210f,
+  0.969092305112506210f, -0.246698407314942410f, 0.969044983470266240f,
+    -0.246884223900822430f,
+  0.968997626199012420f, -0.247070031409475250f, 0.968950233300485800f,
+    -0.247255829834069300f,
+  0.968902804776428870f, -0.247441619167773270f, 0.968855340628585580f,
+    -0.247627399403756280f,
+  0.968807840858700970f, -0.247813170535187670f, 0.968760305468521430f,
+    -0.247998932555237110f,
+  0.968712734459794780f, -0.248184685457074780f, 0.968665127834270060f,
+    -0.248370429233870980f,
+  0.968617485593697540f, -0.248556163878796560f, 0.968569807739828930f,
+    -0.248741889385022480f,
+  0.968522094274417380f, -0.248927605745720150f, 0.968474345199216820f,
+    -0.249113312954061360f,
+  0.968426560515983190f, -0.249299011003218190f, 0.968378740226473300f,
+    -0.249484699886362960f,
+  0.968330884332445190f, -0.249670379596668550f, 0.968282992835658660f,
+    -0.249856050127307990f,
+  0.968235065737874320f, -0.250041711471454650f, 0.968187103040854420f,
+    -0.250227363622282370f,
+  0.968139104746362440f, -0.250413006572965220f, 0.968091070856162970f,
+    -0.250598640316677670f,
+  0.968043001372022260f, -0.250784264846594500f, 0.967994896295707670f,
+    -0.250969880155890720f,
+  0.967946755628987800f, -0.251155486237741920f, 0.967898579373632660f,
+    -0.251341083085323880f,
+  0.967850367531413620f, -0.251526670691812610f, 0.967802120104103270f,
+    -0.251712249050384700f,
+  0.967753837093475510f, -0.251897818154216970f, 0.967705518501305480f,
+    -0.252083377996486450f,
+  0.967657164329369880f, -0.252268928570370810f, 0.967608774579446500f,
+    -0.252454469869047740f,
+  0.967560349253314360f, -0.252640001885695520f, 0.967511888352754150f,
+    -0.252825524613492610f,
+  0.967463391879547550f, -0.253011038045617860f, 0.967414859835477480f,
+    -0.253196542175250560f,
+  0.967366292222328510f, -0.253382036995570160f, 0.967317689041886310f,
+    -0.253567522499756560f,
+  0.967269050295937790f, -0.253752998680989990f, 0.967220375986271420f,
+    -0.253938465532451090f,
+  0.967171666114676640f, -0.254123923047320620f, 0.967122920682944360f,
+    -0.254309371218780000f,
+  0.967074139692867040f, -0.254494810040010730f, 0.967025323146238010f,
+    -0.254680239504194830f,
+  0.966976471044852070f, -0.254865659604514570f, 0.966927583390505660f,
+    -0.255051070334152470f,
+  0.966878660184995910f, -0.255236471686291710f, 0.966829701430121810f,
+    -0.255421863654115460f,
+  0.966780707127683270f, -0.255607246230807380f, 0.966731677279481840f,
+    -0.255792619409551610f,
+  0.966682611887320080f, -0.255977983183532430f, 0.966633510953002100f,
+    -0.256163337545934460f,
+  0.966584374478333120f, -0.256348682489942910f, 0.966535202465119700f,
+    -0.256534018008743040f,
+  0.966485994915169840f, -0.256719344095520660f, 0.966436751830292650f,
+    -0.256904660743461910f,
+  0.966387473212298900f, -0.257089967945753120f, 0.966338159063000130f,
+    -0.257275265695581120f,
+  0.966288809384209690f, -0.257460553986133100f, 0.966239424177741890f,
+    -0.257645832810596390f,
+  0.966190003445412500f, -0.257831102162158990f, 0.966140547189038750f,
+    -0.258016362034009020f,
+  0.966091055410438830f, -0.258201612419334870f, 0.966041528111432400f,
+    -0.258386853311325600f,
+  0.965991965293840570f, -0.258572084703170340f, 0.965942366959485540f,
+    -0.258757306588058680f,
+  0.965892733110190860f, -0.258942518959180520f, 0.965843063747781510f,
+    -0.259127721809726150f,
+  0.965793358874083680f, -0.259312915132886230f, 0.965743618490924830f,
+    -0.259498098921851660f,
+  0.965693842600133690f, -0.259683273169813770f, 0.965644031203540590f,
+    -0.259868437869964270f,
+  0.965594184302976830f, -0.260053593015495190f, 0.965544301900275180f,
+    -0.260238738599598840f,
+  0.965494383997269500f, -0.260423874615468010f, 0.965444430595795430f,
+    -0.260609001056295750f,
+  0.965394441697689400f, -0.260794117915275510f, 0.965344417304789370f,
+    -0.260979225185601070f,
+  0.965294357418934660f, -0.261164322860466480f, 0.965244262041965780f,
+    -0.261349410933066350f,
+  0.965194131175724720f, -0.261534489396595520f, 0.965143964822054450f,
+    -0.261719558244249030f,
+  0.965093762982799590f, -0.261904617469222610f, 0.965043525659805890f,
+    -0.262089667064712040f,
+  0.964993252854920320f, -0.262274707023913590f, 0.964942944569991410f,
+    -0.262459737340023980f,
+  0.964892600806868890f, -0.262644758006240040f, 0.964842221567403620f,
+    -0.262829769015759160f,
+  0.964791806853447900f, -0.263014770361779000f, 0.964741356666855340f,
+    -0.263199762037497560f,
+  0.964690871009481030f, -0.263384744036113280f, 0.964640349883180930f,
+    -0.263569716350824880f,
+  0.964589793289812760f, -0.263754678974831350f, 0.964539201231235150f,
+    -0.263939631901332350f,
+  0.964488573709308410f, -0.264124575123527550f, 0.964437910725893910f,
+    -0.264309508634617110f,
+  0.964387212282854290f, -0.264494432427801630f, 0.964336478382053720f,
+    -0.264679346496281890f,
+  0.964285709025357480f, -0.264864250833259260f, 0.964234904214632200f,
+    -0.265049145431935250f,
+  0.964184063951745830f, -0.265234030285511790f, 0.964133188238567640f,
+    -0.265418905387191260f,
+  0.964082277076968140f, -0.265603770730176330f, 0.964031330468819280f,
+    -0.265788626307669920f,
+  0.963980348415994110f, -0.265973472112875590f, 0.963929330920367140f,
+    -0.266158308138996990f,
+  0.963878277983814200f, -0.266343134379238180f, 0.963827189608212340f,
+    -0.266527950826803690f,
+  0.963776065795439840f, -0.266712757474898370f, 0.963724906547376530f,
+    -0.266897554316727350f,
+  0.963673711865903230f, -0.267082341345496300f, 0.963622481752902220f,
+    -0.267267118554410930f,
+  0.963571216210257320f, -0.267451885936677620f, 0.963519915239853140f,
+    -0.267636643485503090f,
+  0.963468578843575950f, -0.267821391194094150f, 0.963417207023313350f,
+    -0.268006129055658290f,
+  0.963365799780954050f, -0.268190857063403180f, 0.963314357118388200f,
+    -0.268375575210536900f,
+  0.963262879037507070f, -0.268560283490267890f, 0.963211365540203480f,
+    -0.268744981895804980f,
+  0.963159816628371360f, -0.268929670420357260f, 0.963108232303906190f,
+    -0.269114349057134380f,
+  0.963056612568704340f, -0.269299017799346120f, 0.963004957424663850f,
+    -0.269483676640202840f,
+  0.962953266873683880f, -0.269668325572915090f, 0.962901540917665000f,
+    -0.269852964590693860f,
+  0.962849779558509030f, -0.270037593686750570f, 0.962797982798119010f,
+    -0.270222212854296870f,
+  0.962746150638399410f, -0.270406822086544820f, 0.962694283081255930f,
+    -0.270591421376706940f,
+  0.962642380128595710f, -0.270776010717996010f, 0.962590441782326890f,
+    -0.270960590103625170f,
+  0.962538468044359160f, -0.271145159526808010f, 0.962486458916603450f,
+    -0.271329718980758420f,
+  0.962434414400972100f, -0.271514268458690700f, 0.962382334499378380f,
+    -0.271698807953819510f,
+  0.962330219213737400f, -0.271883337459359720f, 0.962278068545965090f,
+    -0.272067856968526920f,
+  0.962225882497979020f, -0.272252366474536710f, 0.962173661071697880f,
+    -0.272436865970605240f,
+  0.962121404269041580f, -0.272621355449948980f, 0.962069112091931580f,
+    -0.272805834905784810f,
+  0.962016784542290560f, -0.272990304331329920f, 0.961964421622042320f,
+    -0.273174763719801930f,
+  0.961912023333112210f, -0.273359213064418680f, 0.961859589677426570f,
+    -0.273543652358398730f,
+  0.961807120656913540f, -0.273728081594960540f, 0.961754616273502010f,
+    -0.273912500767323260f,
+  0.961702076529122540f, -0.274096909868706380f, 0.961649501425706820f,
+    -0.274281308892329660f,
+  0.961596890965187860f, -0.274465697831413220f, 0.961544245149499990f,
+    -0.274650076679177680f,
+  0.961491563980579000f, -0.274834445428843940f, 0.961438847460361680f,
+    -0.275018804073633220f,
+  0.961386095590786250f, -0.275203152606767310f, 0.961333308373792270f,
+    -0.275387491021468140f,
+  0.961280485811320640f, -0.275571819310958140f, 0.961227627905313460f,
+    -0.275756137468460120f,
+  0.961174734657714080f, -0.275940445487197150f, 0.961121806070467380f,
+    -0.276124743360392830f,
+  0.961068842145519350f, -0.276309031081271080f, 0.961015842884817230f,
+    -0.276493308643055990f,
+  0.960962808290309780f, -0.276677576038972420f, 0.960909738363946770f,
+    -0.276861833262245280f,
+  0.960856633107679660f, -0.277046080306099900f, 0.960803492523460760f,
+    -0.277230317163762170f,
+  0.960750316613243950f, -0.277414543828458090f, 0.960697105378984450f,
+    -0.277598760293414290f,
+  0.960643858822638590f, -0.277782966551857690f, 0.960590576946164120f,
+    -0.277967162597015370f,
+  0.960537259751520050f, -0.278151348422115090f, 0.960483907240666790f,
+    -0.278335524020384920f,
+  0.960430519415565790f, -0.278519689385053060f, 0.960377096278180130f,
+    -0.278703844509348490f,
+  0.960323637830473920f, -0.278887989386500280f, 0.960270144074412800f,
+    -0.279072124009737800f,
+  0.960216615011963430f, -0.279256248372291180f, 0.960163050645094000f,
+    -0.279440362467390510f,
+  0.960109450975773940f, -0.279624466288266590f, 0.960055816005973890f,
+    -0.279808559828150390f,
+  0.960002145737665960f, -0.279992643080273220f, 0.959948440172823210f,
+    -0.280176716037866980f,
+  0.959894699313420530f, -0.280360778694163810f, 0.959840923161433770f,
+    -0.280544831042396250f,
+  0.959787111718839900f, -0.280728873075797190f, 0.959733264987617680f,
+    -0.280912904787600000f,
+  0.959679382969746750f, -0.281096926171038260f, 0.959625465667208190f,
+    -0.281280937219346110f,
+  0.959571513081984520f, -0.281464937925757940f, 0.959517525216059260f,
+    -0.281648928283508630f,
+  0.959463502071417510f, -0.281832908285833350f, 0.959409443650045550f,
+    -0.282016877925967640f,
+  0.959355349953930790f, -0.282200837197147560f, 0.959301220985062210f,
+    -0.282384786092609360f,
+  0.959247056745430090f, -0.282568724605589740f, 0.959192857237025740f,
+    -0.282752652729325930f,
+  0.959138622461841890f, -0.282936570457055390f, 0.959084352421872730f,
+    -0.283120477782015820f,
+  0.959030047119113660f, -0.283304374697445740f, 0.958975706555561080f,
+    -0.283488261196583550f,
+  0.958921330733213170f, -0.283672137272668430f, 0.958866919654069010f,
+    -0.283856002918939750f,
+  0.958812473320129310f, -0.284039858128637190f, 0.958757991733395710f,
+    -0.284223702895001040f,
+  0.958703474895871600f, -0.284407537211271880f, 0.958648922809561150f,
+    -0.284591361070690440f,
+  0.958594335476470220f, -0.284775174466498300f, 0.958539712898605730f,
+    -0.284958977391937040f,
+  0.958485055077976100f, -0.285142769840248670f, 0.958430362016590930f,
+    -0.285326551804675870f,
+  0.958375633716461170f, -0.285510323278461260f, 0.958320870179598880f,
+    -0.285694084254848320f,
+  0.958266071408017670f, -0.285877834727080620f, 0.958211237403732260f,
+    -0.286061574688402040f,
+  0.958156368168758820f, -0.286245304132057120f, 0.958101463705114730f,
+    -0.286429023051290700f,
+  0.958046524014818600f, -0.286612731439347790f, 0.957991549099890370f,
+    -0.286796429289474080f,
+  0.957936538962351420f, -0.286980116594915570f, 0.957881493604224370f,
+    -0.287163793348918390f,
+  0.957826413027532910f, -0.287347459544729510f, 0.957771297234302320f,
+    -0.287531115175595930f,
+  0.957716146226558870f, -0.287714760234765170f, 0.957660960006330610f,
+    -0.287898394715485170f,
+  0.957605738575646350f, -0.288082018611004130f, 0.957550481936536470f,
+    -0.288265631914570770f,
+  0.957495190091032570f, -0.288449234619434220f, 0.957439863041167680f,
+    -0.288632826718843830f,
+  0.957384500788975860f, -0.288816408206049480f, 0.957329103336492790f,
+    -0.288999979074301420f,
+  0.957273670685755200f, -0.289183539316850200f, 0.957218202838801210f,
+    -0.289367088926947010f,
+  0.957162699797670210f, -0.289550627897843030f, 0.957107161564402790f,
+    -0.289734156222790250f,
+  0.957051588141040970f, -0.289917673895040750f, 0.956995979529628230f,
+    -0.290101180907847090f,
+  0.956940335732208820f, -0.290284677254462330f, 0.956884656750828900f,
+    -0.290468162928139820f,
+  0.956828942587535370f, -0.290651637922133220f, 0.956773193244376930f,
+    -0.290835102229696830f,
+  0.956717408723403050f, -0.291018555844085090f, 0.956661589026665090f,
+    -0.291201998758552900f,
+  0.956605734156215080f, -0.291385430966355660f, 0.956549844114106820f,
+    -0.291568852460749040f,
+  0.956493918902395100f, -0.291752263234989260f, 0.956437958523136180f,
+    -0.291935663282332780f,
+  0.956381962978387730f, -0.292119052596036380f, 0.956325932270208230f,
+    -0.292302431169357560f,
+  0.956269866400658030f, -0.292485798995553880f, 0.956213765371798470f,
+    -0.292669156067883460f,
+  0.956157629185692140f, -0.292852502379604810f, 0.956101457844403040f,
+    -0.293035837923976810f,
+  0.956045251349996410f, -0.293219162694258630f, 0.955989009704538930f,
+    -0.293402476683710110f,
+  0.955932732910098280f, -0.293585779885591200f, 0.955876420968743590f,
+    -0.293769072293162400f,
+  0.955820073882545420f, -0.293952353899684660f, 0.955763691653575440f,
+    -0.294135624698419030f,
+  0.955707274283906560f, -0.294318884682627400f, 0.955650821775613330f,
+    -0.294502133845571670f,
+  0.955594334130771110f, -0.294685372180514330f, 0.955537811351456880f,
+    -0.294868599680718270f,
+  0.955481253439748770f, -0.295051816339446720f, 0.955424660397726330f,
+    -0.295235022149963220f,
+  0.955368032227470350f, -0.295418217105532010f, 0.955311368931062720f,
+    -0.295601401199417360f,
+  0.955254670510586990f, -0.295784574424884260f, 0.955197936968127710f,
+    -0.295967736775197890f,
+  0.955141168305770780f, -0.296150888243623790f, 0.955084364525603410f,
+    -0.296334028823428190f,
+  0.955027525629714160f, -0.296517158507877470f, 0.954970651620192790f,
+    -0.296700277290238350f,
+  0.954913742499130520f, -0.296883385163778270f, 0.954856798268619580f,
+    -0.297066482121764730f,
+  0.954799818930753720f, -0.297249568157465840f, 0.954742804487627940f,
+    -0.297432643264150030f,
+  0.954685754941338340f, -0.297615707435086200f, 0.954628670293982680f,
+    -0.297798760663543550f,
+  0.954571550547659630f, -0.297981802942791810f, 0.954514395704469500f,
+    -0.298164834266100850f,
+  0.954457205766513490f, -0.298347854626741400f, 0.954399980735894490f,
+    -0.298530864017984120f,
+  0.954342720614716480f, -0.298713862433100330f, 0.954285425405084650f,
+    -0.298896849865361800f,
+  0.954228095109105670f, -0.299079826308040480f, 0.954170729728887280f,
+    -0.299262791754408840f,
+  0.954113329266538800f, -0.299445746197739890f, 0.954055893724170660f,
+    -0.299628689631306790f,
+  0.953998423103894490f, -0.299811622048383350f, 0.953940917407823500f,
+    -0.299994543442243580f,
+  0.953883376638071770f, -0.300177453806161950f, 0.953825800796755050f,
+    -0.300360353133413530f,
+  0.953768189885990330f, -0.300543241417273450f, 0.953710543907895670f,
+    -0.300726118651017500f,
+  0.953652862864590500f, -0.300908984827921890f, 0.953595146758195680f,
+    -0.301091839941263100f,
+  0.953537395590833280f, -0.301274683984317950f, 0.953479609364626610f,
+    -0.301457516950363940f,
+  0.953421788081700310f, -0.301640338832678770f, 0.953363931744180330f,
+    -0.301823149624540650f,
+  0.953306040354193860f, -0.302005949319228080f, 0.953248113913869320f,
+    -0.302188737910019990f,
+  0.953190152425336670f, -0.302371515390195970f, 0.953132155890726750f,
+    -0.302554281753035610f,
+  0.953074124312172200f, -0.302737036991819140f, 0.953016057691806530f,
+    -0.302919781099827310f,
+  0.952957956031764700f, -0.303102514070341060f, 0.952899819334182880f,
+    -0.303285235896641750f,
+  0.952841647601198720f, -0.303467946572011320f, 0.952783440834950920f,
+    -0.303650646089731910f,
+  0.952725199037579570f, -0.303833334443086360f, 0.952666922211226170f,
+    -0.304016011625357570f,
+  0.952608610358033350f, -0.304198677629829110f, 0.952550263480144930f,
+    -0.304381332449784880f,
+  0.952491881579706320f, -0.304563976078509100f, 0.952433464658864030f,
+    -0.304746608509286530f,
+  0.952375012719765880f, -0.304929229735402370f, 0.952316525764560940f,
+    -0.305111839750142110f,
+  0.952258003795399600f, -0.305294438546791670f, 0.952199446814433580f,
+    -0.305477026118637420f,
+  0.952140854823815830f, -0.305659602458966120f, 0.952082227825700620f,
+    -0.305842167561065080f,
+  0.952023565822243570f, -0.306024721418221790f, 0.951964868815601380f,
+    -0.306207264023724220f,
+  0.951906136807932350f, -0.306389795370860920f, 0.951847369801395620f,
+    -0.306572315452920740f,
+  0.951788567798152130f, -0.306754824263192780f, 0.951729730800363830f,
+    -0.306937321794966910f,
+  0.951670858810193860f, -0.307119808041533100f, 0.951611951829806850f,
+    -0.307302282996181790f,
+  0.951553009861368590f, -0.307484746652204100f, 0.951494032907046370f,
+    -0.307667199002891190f,
+  0.951435020969008340f, -0.307849640041534870f, 0.951375974049424420f,
+    -0.308032069761427330f,
+  0.951316892150465550f, -0.308214488155861050f, 0.951257775274304000f,
+    -0.308396895218129190f,
+  0.951198623423113230f, -0.308579290941525090f, 0.951139436599068190f,
+    -0.308761675319342450f,
+  0.951080214804345010f, -0.308944048344875710f, 0.951020958041121080f,
+    -0.309126410011419440f,
+  0.950961666311575080f, -0.309308760312268730f, 0.950902339617887060f,
+    -0.309491099240719100f,
+  0.950842977962238160f, -0.309673426790066380f, 0.950783581346811070f,
+    -0.309855742953607070f,
+  0.950724149773789610f, -0.310038047724637890f, 0.950664683245358910f,
+    -0.310220341096455850f,
+  0.950605181763705340f, -0.310402623062358720f, 0.950545645331016600f,
+    -0.310584893615644450f,
+  0.950486073949481700f, -0.310767152749611470f, 0.950426467621290900f,
+    -0.310949400457558640f,
+  0.950366826348635780f, -0.311131636732785270f, 0.950307150133709260f,
+    -0.311313861568590920f,
+  0.950247438978705230f, -0.311496074958275910f, 0.950187692885819280f,
+    -0.311678276895140550f,
+  0.950127911857248100f, -0.311860467372486020f, 0.950068095895189590f,
+    -0.312042646383613510f,
+  0.950008245001843000f, -0.312224813921824880f, 0.949948359179409010f,
+    -0.312406969980422440f,
+  0.949888438430089300f, -0.312589114552708710f, 0.949828482756087110f,
+    -0.312771247631986770f,
+  0.949768492159606680f, -0.312953369211560200f, 0.949708466642853800f,
+    -0.313135479284732840f,
+  0.949648406208035480f, -0.313317577844809010f, 0.949588310857359950f,
+    -0.313499664885093510f,
+  0.949528180593036670f, -0.313681740398891520f, 0.949468015417276550f,
+    -0.313863804379508500f,
+  0.949407815332291570f, -0.314045856820250710f, 0.949347580340295210f,
+    -0.314227897714424440f,
+  0.949287310443502120f, -0.314409927055336660f, 0.949227005644128210f,
+    -0.314591944836294660f,
+  0.949166665944390700f, -0.314773951050606070f, 0.949106291346508260f,
+    -0.314955945691579140f,
+  0.949045881852700560f, -0.315137928752522440f, 0.948985437465188710f,
+    -0.315319900226744890f,
+  0.948924958186195160f, -0.315501860107555990f, 0.948864444017943340f,
+    -0.315683808388265650f,
+  0.948803894962658490f, -0.315865745062183960f, 0.948743311022566480f,
+    -0.316047670122621860f,
+  0.948682692199895090f, -0.316229583562890330f, 0.948622038496872990f,
+    -0.316411485376300980f,
+  0.948561349915730270f, -0.316593375556165850f, 0.948500626458698260f,
+    -0.316775254095797270f,
+  0.948439868128009620f, -0.316957120988508150f, 0.948379074925898120f,
+    -0.317138976227611780f,
+  0.948318246854599090f, -0.317320819806421740f, 0.948257383916349060f,
+    -0.317502651718252260f,
+  0.948196486113385580f, -0.317684471956417970f, 0.948135553447947980f,
+    -0.317866280514233660f,
+  0.948074585922276230f, -0.318048077385014950f, 0.948013583538612200f,
+    -0.318229862562077530f,
+  0.947952546299198670f, -0.318411636038737790f, 0.947891474206279840f,
+    -0.318593397808312420f,
+  0.947830367262101010f, -0.318775147864118480f, 0.947769225468909180f,
+    -0.318956886199473650f,
+  0.947708048828952100f, -0.319138612807695900f, 0.947646837344479300f,
+    -0.319320327682103610f,
+  0.947585591017741090f, -0.319502030816015690f, 0.947524309850989570f,
+    -0.319683722202751430f,
+  0.947462993846477700f, -0.319865401835630500f, 0.947401643006459900f,
+    -0.320047069707973140f,
+  0.947340257333192050f, -0.320228725813099860f, 0.947278836828930880f,
+    -0.320410370144331820f,
+  0.947217381495934820f, -0.320592002694990330f, 0.947155891336463270f,
+    -0.320773623458397330f,
+  0.947094366352777220f, -0.320955232427875210f, 0.947032806547138620f,
+    -0.321136829596746660f,
+  0.946971211921810880f, -0.321318414958334850f, 0.946909582479058760f,
+    -0.321499988505963510f,
+  0.946847918221148000f, -0.321681550232956580f, 0.946786219150346000f,
+    -0.321863100132638580f,
+  0.946724485268921170f, -0.322044638198334510f, 0.946662716579143360f,
+    -0.322226164423369600f,
+  0.946600913083283530f, -0.322407678801069850f, 0.946539074783614100f,
+    -0.322589181324761330f,
+  0.946477201682408680f, -0.322770671987770710f, 0.946415293781942110f,
+    -0.322952150783425260f,
+  0.946353351084490590f, -0.323133617705052330f, 0.946291373592331620f,
+    -0.323315072745979980f,
+  0.946229361307743820f, -0.323496515899536710f, 0.946167314233007370f,
+    -0.323677947159051240f,
+  0.946105232370403450f, -0.323859366517852850f, 0.946043115722214560f,
+    -0.324040773969271450f,
+  0.945980964290724760f, -0.324222169506636960f, 0.945918778078219110f,
+    -0.324403553123280230f,
+  0.945856557086983910f, -0.324584924812532150f, 0.945794301319306970f,
+    -0.324766284567724220f,
+  0.945732010777477150f, -0.324947632382188430f, 0.945669685463784710f,
+    -0.325128968249257080f,
+  0.945607325380521280f, -0.325310292162262930f, 0.945544930529979680f,
+    -0.325491604114539310f,
+  0.945482500914453740f, -0.325672904099419850f, 0.945420036536239070f,
+    -0.325854192110238580f,
+  0.945357537397632290f, -0.326035468140330240f, 0.945295003500931210f,
+    -0.326216732183029710f,
+  0.945232434848435000f, -0.326397984231672490f, 0.945169831442444150f,
+    -0.326579224279594400f,
+  0.945107193285260610f, -0.326760452320131730f, 0.945044520379187070f,
+    -0.326941668346621420f,
+  0.944981812726528150f, -0.327122872352400510f, 0.944919070329589220f,
+    -0.327304064330806670f,
+  0.944856293190677210f, -0.327485244275178000f, 0.944793481312100280f,
+    -0.327666412178853120f,
+  0.944730634696167800f, -0.327847568035170840f, 0.944667753345190490f,
+    -0.328028711837470680f,
+  0.944604837261480260f, -0.328209843579092500f, 0.944541886447350490f,
+    -0.328390963253376580f,
+  0.944478900905115550f, -0.328572070853663740f, 0.944415880637091250f,
+    -0.328753166373294990f,
+  0.944352825645594750f, -0.328934249805612200f, 0.944289735932944410f,
+    -0.329115321143957250f,
+  0.944226611501459810f, -0.329296380381672750f, 0.944163452353461770f,
+    -0.329477427512101740f,
+  0.944100258491272660f, -0.329658462528587490f, 0.944037029917215830f,
+    -0.329839485424473940f,
+  0.943973766633615980f, -0.330020496193105420f, 0.943910468642799150f,
+    -0.330201494827826570f,
+  0.943847135947092690f, -0.330382481321982780f, 0.943783768548825060f,
+    -0.330563455668919540f,
+  0.943720366450326200f, -0.330744417861982890f, 0.943656929653927220f,
+    -0.330925367894519540f,
+  0.943593458161960390f, -0.331106305759876430f, 0.943529951976759480f,
+    -0.331287231451400820f,
+  0.943466411100659320f, -0.331468144962440870f, 0.943402835535996240f,
+    -0.331649046286344670f,
+  0.943339225285107720f, -0.331829935416461110f, 0.943275580350332540f,
+    -0.332010812346139380f,
+  0.943211900734010620f, -0.332191677068729150f, 0.943148186438483420f,
+    -0.332372529577580620f,
+  0.943084437466093490f, -0.332553369866044220f, 0.943020653819184650f,
+    -0.332734197927471050f,
+  0.942956835500102120f, -0.332915013755212650f, 0.942892982511192250f,
+    -0.333095817342620780f,
+  0.942829094854802710f, -0.333276608683047930f, 0.942765172533282510f,
+    -0.333457387769846850f,
+  0.942701215548981900f, -0.333638154596370860f, 0.942637223904252530f,
+    -0.333818909155973620f,
+  0.942573197601446870f, -0.333999651442009380f, 0.942509136642919240f,
+    -0.334180381447832690f,
+  0.942445041031024890f, -0.334361099166798740f, 0.942380910768120470f,
+    -0.334541804592262900f,
+  0.942316745856563780f, -0.334722497717581220f, 0.942252546298714020f,
+    -0.334903178536110180f,
+  0.942188312096931770f, -0.335083847041206580f, 0.942124043253578570f,
+    -0.335264503226227810f,
+  0.942059739771017310f, -0.335445147084531600f, 0.941995401651612550f,
+    -0.335625778609476290f,
+  0.941931028897729620f, -0.335806397794420450f, 0.941866621511735280f,
+    -0.335987004632723350f,
+  0.941802179495997650f, -0.336167599117744520f, 0.941737702852886160f,
+    -0.336348181242844050f,
+  0.941673191584771360f, -0.336528751001382410f, 0.941608645694025250f,
+    -0.336709308386720580f,
+  0.941544065183020810f, -0.336889853392220050f, 0.941479450054132580f,
+    -0.337070386011242620f,
+  0.941414800309736340f, -0.337250906237150590f, 0.941350115952208970f,
+    -0.337431414063306840f,
+  0.941285396983928660f, -0.337611909483074620f, 0.941220643407275180f,
+    -0.337792392489817460f,
+  0.941155855224629190f, -0.337972863076899720f, 0.941091032438372780f,
+    -0.338153321237685930f,
+  0.941026175050889260f, -0.338333766965541130f, 0.940961283064563280f,
+    -0.338514200253830940f,
+  0.940896356481780830f, -0.338694621095921190f, 0.940831395304928870f,
+    -0.338875029485178450f,
+  0.940766399536396070f, -0.339055425414969640f, 0.940701369178571940f,
+    -0.339235808878661950f,
+  0.940636304233847590f, -0.339416179869623360f, 0.940571204704615190f,
+    -0.339596538381222110f,
+  0.940506070593268300f, -0.339776884406826850f, 0.940440901902201750f,
+    -0.339957217939806880f,
+  0.940375698633811540f, -0.340137538973531720f, 0.940310460790495070f,
+    -0.340317847501371670f,
+  0.940245188374650880f, -0.340498143516697160f, 0.940179881388678920f,
+    -0.340678427012879200f,
+  0.940114539834980280f, -0.340858697983289440f, 0.940049163715957370f,
+    -0.341038956421299720f,
+  0.939983753034014050f, -0.341219202320282360f, 0.939918307791555050f,
+    -0.341399435673610420f,
+  0.939852827990986680f, -0.341579656474657160f, 0.939787313634716570f,
+    -0.341759864716796310f,
+  0.939721764725153340f, -0.341940060393402190f, 0.939656181264707180f,
+    -0.342120243497849530f,
+  0.939590563255789270f, -0.342300414023513520f, 0.939524910700812230f,
+    -0.342480571963769800f,
+  0.939459223602189920f, -0.342660717311994380f, 0.939393501962337510f,
+    -0.342840850061563950f,
+  0.939327745783671400f, -0.343020970205855540f, 0.939261955068609210f,
+    -0.343201077738246540f,
+  0.939196129819569900f, -0.343381172652115040f, 0.939130270038973650f,
+    -0.343561254940839390f,
+  0.939064375729241950f, -0.343741324597798490f, 0.938998446892797540f,
+    -0.343921381616371700f,
+  0.938932483532064600f, -0.344101425989938810f, 0.938866485649468060f,
+    -0.344281457711880180f,
+  0.938800453247434770f, -0.344461476775576540f, 0.938734386328392460f,
+    -0.344641483174408960f,
+  0.938668284894770170f, -0.344821476901759290f, 0.938602148948998400f,
+    -0.345001457951009670f,
+  0.938535978493508560f, -0.345181426315542550f, 0.938469773530733800f,
+    -0.345361381988741220f,
+  0.938403534063108060f, -0.345541324963989090f, 0.938337260093066950f,
+    -0.345721255234670120f,
+  0.938270951623047190f, -0.345901172794168990f, 0.938204608655486490f,
+    -0.346081077635870430f,
+  0.938138231192824360f, -0.346260969753160010f, 0.938071819237501270f,
+    -0.346440849139423520f,
+  0.938005372791958840f, -0.346620715788047320f, 0.937938891858640320f,
+    -0.346800569692418290f,
+  0.937872376439989890f, -0.346980410845923680f, 0.937805826538453120f,
+    -0.347160239241951160f,
+  0.937739242156476970f, -0.347340054873889140f, 0.937672623296509470f,
+    -0.347519857735126110f,
+  0.937605969960999990f, -0.347699647819051380f, 0.937539282152399230f,
+    -0.347879425119054510f,
+  0.937472559873159250f, -0.348059189628525610f, 0.937405803125732960f,
+    -0.348238941340855260f,
+  0.937339011912574960f, -0.348418680249434560f, 0.937272186236140950f,
+    -0.348598406347654930f,
+  0.937205326098887960f, -0.348778119628908420f, 0.937138431503274140f,
+    -0.348957820086587490f,
+  0.937071502451759190f, -0.349137507714084970f, 0.937004538946803690f,
+    -0.349317182504794380f,
+  0.936937540990869900f, -0.349496844452109550f, 0.936870508586420960f,
+    -0.349676493549424760f,
+  0.936803441735921560f, -0.349856129790134920f, 0.936736340441837620f,
+    -0.350035753167635240f,
+  0.936669204706636170f, -0.350215363675321580f, 0.936602034532785570f,
+    -0.350394961306590150f,
+  0.936534829922755500f, -0.350574546054837510f, 0.936467590879016990f,
+    -0.350754117913461060f,
+  0.936400317404042060f, -0.350933676875858360f, 0.936333009500304180f,
+    -0.351113222935427460f,
+  0.936265667170278260f, -0.351292756085567090f, 0.936198290416440090f,
+    -0.351472276319676310f,
+  0.936130879241267030f, -0.351651783631154570f, 0.936063433647237540f,
+    -0.351831278013402030f,
+  0.935995953636831410f, -0.352010759459819080f, 0.935928439212529660f,
+    -0.352190227963806830f,
+  0.935860890376814640f, -0.352369683518766630f, 0.935793307132169900f,
+    -0.352549126118100460f,
+  0.935725689481080370f, -0.352728555755210730f, 0.935658037426032040f,
+    -0.352907972423500250f,
+  0.935590350969512370f, -0.353087376116372480f, 0.935522630114009930f,
+    -0.353266766827231240f,
+  0.935454874862014620f, -0.353446144549480810f, 0.935387085216017770f,
+    -0.353625509276525970f,
+  0.935319261178511610f, -0.353804861001772050f, 0.935251402751989920f,
+    -0.353984199718624770f,
+  0.935183509938947610f, -0.354163525420490340f, 0.935115582741880890f,
+    -0.354342838100775550f,
+  0.935047621163287430f, -0.354522137752887430f, 0.934979625205665800f,
+    -0.354701424370233830f,
+  0.934911594871516090f, -0.354880697946222790f, 0.934843530163339540f,
+    -0.355059958474262860f,
+  0.934775431083638700f, -0.355239205947763310f, 0.934707297634917440f,
+    -0.355418440360133650f,
+  0.934639129819680780f, -0.355597661704783850f, 0.934570927640435030f,
+    -0.355776869975124640f,
+  0.934502691099687870f, -0.355956065164566850f, 0.934434420199948050f,
+    -0.356135247266522130f,
+  0.934366114943725790f, -0.356314416274402410f, 0.934297775333532530f,
+    -0.356493572181620090f,
+  0.934229401371880820f, -0.356672714981588260f, 0.934160993061284530f,
+    -0.356851844667720300f,
+  0.934092550404258980f, -0.357030961233429980f, 0.934024073403320390f,
+    -0.357210064672131960f,
+  0.933955562060986730f, -0.357389154977240940f, 0.933887016379776890f,
+    -0.357568232142172260f,
+  0.933818436362210960f, -0.357747296160341900f, 0.933749822010810580f,
+    -0.357926347025166010f,
+  0.933681173328098410f, -0.358105384730061590f, 0.933612490316598540f,
+    -0.358284409268445850f,
+  0.933543772978836170f, -0.358463420633736540f, 0.933475021317337950f,
+    -0.358642418819351990f,
+  0.933406235334631520f, -0.358821403818710860f, 0.933337415033246190f,
+    -0.359000375625232460f,
+  0.933268560415712050f, -0.359179334232336500f, 0.933199671484560730f,
+    -0.359358279633443130f,
+  0.933130748242325230f, -0.359537211821973070f, 0.933061790691539380f,
+    -0.359716130791347570f,
+  0.932992798834738960f, -0.359895036534988110f, 0.932923772674460140f,
+    -0.360073929046317020f,
+  0.932854712213241120f, -0.360252808318756890f, 0.932785617453621100f,
+    -0.360431674345730700f,
+  0.932716488398140250f, -0.360610527120662270f, 0.932647325049340450f,
+    -0.360789366636975580f,
+  0.932578127409764420f, -0.360968192888095230f, 0.932508895481956590f,
+    -0.361147005867446250f,
+  0.932439629268462360f, -0.361325805568454280f, 0.932370328771828460f,
+    -0.361504591984545260f,
+  0.932300993994602760f, -0.361683365109145840f, 0.932231624939334540f,
+    -0.361862124935682980f,
+  0.932162221608574430f, -0.362040871457584180f, 0.932092784004874050f,
+    -0.362219604668277460f,
+  0.932023312130786490f, -0.362398324561191310f, 0.931953805988866010f,
+    -0.362577031129754760f,
+  0.931884265581668150f, -0.362755724367397230f, 0.931814690911749730f,
+    -0.362934404267548640f,
+  0.931745081981668720f, -0.363113070823639470f, 0.931675438793984620f,
+    -0.363291724029100760f,
+  0.931605761351257830f, -0.363470363877363760f, 0.931536049656050300f,
+    -0.363648990361860550f,
+  0.931466303710925090f, -0.363827603476023500f, 0.931396523518446600f,
+    -0.364006203213285470f,
+  0.931326709081180430f, -0.364184789567079890f, 0.931256860401693420f,
+    -0.364363362530840620f,
+  0.931186977482553750f, -0.364541922098002120f, 0.931117060326330790f,
+    -0.364720468261999280f,
+  0.931047108935595280f, -0.364899001016267320f, 0.930977123312918930f,
+    -0.365077520354242180f,
+  0.930907103460875130f, -0.365256026269360320f, 0.930837049382038150f,
+    -0.365434518755058390f,
+  0.930766961078983710f, -0.365612997804773850f, 0.930696838554288860f,
+    -0.365791463411944570f,
+  0.930626681810531760f, -0.365969915570008740f, 0.930556490850291800f,
+    -0.366148354272405330f,
+  0.930486265676149780f, -0.366326779512573590f, 0.930416006290687550f,
+    -0.366505191283953370f,
+  0.930345712696488470f, -0.366683589579984930f, 0.930275384896137150f,
+    -0.366861974394109060f,
+  0.930205022892219070f, -0.367040345719767180f, 0.930134626687321390f,
+    -0.367218703550400980f,
+  0.930064196284032360f, -0.367397047879452710f, 0.929993731684941480f,
+    -0.367575378700365330f,
+  0.929923232892639670f, -0.367753696006581980f, 0.929852699909718750f,
+    -0.367931999791546450f,
+  0.929782132738772190f, -0.368110290048703050f, 0.929711531382394370f,
+    -0.368288566771496570f,
+  0.929640895843181330f, -0.368466829953372320f, 0.929570226123729860f,
+    -0.368645079587776040f,
+  0.929499522226638560f, -0.368823315668153910f, 0.929428784154506800f,
+    -0.369001538187952780f,
+  0.929358011909935500f, -0.369179747140620020f, 0.929287205495526790f,
+    -0.369357942519603130f,
+  0.929216364913884040f, -0.369536124318350650f, 0.929145490167611720f,
+    -0.369714292530311240f,
+  0.929074581259315860f, -0.369892447148934100f, 0.929003638191603360f,
+    -0.370070588167669080f,
+  0.928932660967082820f, -0.370248715579966360f, 0.928861649588363700f,
+    -0.370426829379276790f,
+  0.928790604058057020f, -0.370604929559051670f, 0.928719524378774810f,
+    -0.370783016112742560f,
+  0.928648410553130520f, -0.370961089033801980f, 0.928577262583738850f,
+    -0.371139148315682570f,
+  0.928506080473215590f, -0.371317193951837540f, 0.928434864224177980f,
+    -0.371495225935720760f,
+  0.928363613839244370f, -0.371673244260786520f, 0.928292329321034670f,
+    -0.371851248920489490f,
+  0.928221010672169440f, -0.372029239908285010f, 0.928149657895271150f,
+    -0.372207217217628840f,
+  0.928078270992963140f, -0.372385180841977360f, 0.928006849967869970f,
+    -0.372563130774787250f,
+  0.927935394822617890f, -0.372741067009515760f, 0.927863905559833780f,
+    -0.372918989539620830f,
+  0.927792382182146320f, -0.373096898358560640f, 0.927720824692185200f,
+    -0.373274793459793970f,
+  0.927649233092581180f, -0.373452674836780300f, 0.927577607385966730f,
+    -0.373630542482979280f,
+  0.927505947574975180f, -0.373808396391851210f, 0.927434253662241300f,
+    -0.373986236556857030f,
+  0.927362525650401110f, -0.374164062971457930f, 0.927290763542091720f,
+    -0.374341875629115920f,
+  0.927218967339951790f, -0.374519674523293210f, 0.927147137046620880f,
+    -0.374697459647452600f,
+  0.927075272664740100f, -0.374875230995057540f, 0.927003374196951670f,
+    -0.375052988559571920f,
+  0.926931441645899130f, -0.375230732334459920f, 0.926859475014227160f,
+    -0.375408462313186590f,
+  0.926787474304581750f, -0.375586178489217220f, 0.926715439519610330f,
+    -0.375763880856017700f,
+  0.926643370661961230f, -0.375941569407054420f, 0.926571267734284330f,
+    -0.376119244135794340f,
+  0.926499130739230510f, -0.376296905035704790f, 0.926426959679452210f,
+    -0.376474552100253770f,
+  0.926354754557602860f, -0.376652185322909560f, 0.926282515376337210f,
+    -0.376829804697141280f,
+  0.926210242138311380f, -0.377007410216418260f, 0.926137934846182560f,
+    -0.377185001874210450f,
+  0.926065593502609310f, -0.377362579663988340f, 0.925993218110251480f,
+    -0.377540143579222940f,
+  0.925920808671770070f, -0.377717693613385640f, 0.925848365189827270f,
+    -0.377895229759948490f,
+  0.925775887667086740f, -0.378072752012383990f, 0.925703376106213230f,
+    -0.378250260364165200f,
+  0.925630830509872720f, -0.378427754808765560f, 0.925558250880732740f,
+    -0.378605235339659120f,
+  0.925485637221461490f, -0.378782701950320540f, 0.925412989534729060f,
+    -0.378960154634224720f,
+  0.925340307823206310f, -0.379137593384847320f, 0.925267592089565660f,
+    -0.379315018195664430f,
+  0.925194842336480530f, -0.379492429060152630f, 0.925122058566625880f,
+    -0.379669825971788940f,
+  0.925049240782677580f, -0.379847208924051160f, 0.924976388987313160f,
+    -0.380024577910417270f,
+  0.924903503183210910f, -0.380201932924366050f, 0.924830583373050800f,
+    -0.380379273959376600f,
+  0.924757629559513910f, -0.380556601008928520f, 0.924684641745282420f,
+    -0.380733914066502140f,
+  0.924611619933039970f, -0.380911213125578070f, 0.924538564125471420f,
+    -0.381088498179637520f,
+  0.924465474325262600f, -0.381265769222162380f, 0.924392350535101050f,
+    -0.381443026246634730f,
+  0.924319192757675160f, -0.381620269246537360f, 0.924246000995674890f,
+    -0.381797498215353640f,
+  0.924172775251791200f, -0.381974713146567220f, 0.924099515528716280f,
+    -0.382151914033662610f,
+  0.924026221829143850f, -0.382329100870124510f, 0.923952894155768640f,
+    -0.382506273649438230f,
+  0.923879532511286740f, -0.382683432365089780f, 0.923806136898395410f,
+    -0.382860577010565420f,
+  0.923732707319793290f, -0.383037707579352020f, 0.923659243778179980f,
+    -0.383214824064937180f,
+  0.923585746276256670f, -0.383391926460808660f, 0.923512214816725630f,
+    -0.383569014760454910f,
+  0.923438649402290370f, -0.383746088957365010f, 0.923365050035655720f,
+    -0.383923149045028390f,
+  0.923291416719527640f, -0.384100195016935040f, 0.923217749456613500f,
+    -0.384277226866575510f,
+  0.923144048249621930f, -0.384454244587440820f, 0.923070313101262420f,
+    -0.384631248173022580f,
+  0.922996544014246250f, -0.384808237616812880f, 0.922922740991285680f,
+    -0.384985212912304200f,
+  0.922848904035094120f, -0.385162174052989860f, 0.922775033148386380f,
+    -0.385339121032363340f,
+  0.922701128333878630f, -0.385516053843918850f, 0.922627189594287910f,
+    -0.385692972481151140f,
+  0.922553216932332830f, -0.385869876937555310f, 0.922479210350733210f,
+    -0.386046767206627170f,
+  0.922405169852209880f, -0.386223643281862980f, 0.922331095439485440f,
+    -0.386400505156759440f,
+  0.922256987115283030f, -0.386577352824813920f, 0.922182844882327600f,
+    -0.386754186279524180f,
+  0.922108668743345180f, -0.386931005514388580f, 0.922034458701062820f,
+    -0.387107810522905990f,
+  0.921960214758209220f, -0.387284601298575840f, 0.921885936917513970f,
+    -0.387461377834897870f,
+  0.921811625181708120f, -0.387638140125372730f, 0.921737279553523910f,
+    -0.387814888163501180f,
+  0.921662900035694730f, -0.387991621942784860f, 0.921588486630955490f,
+    -0.388168341456725740f,
+  0.921514039342042010f, -0.388345046698826250f, 0.921439558171691430f,
+    -0.388521737662589570f,
+  0.921365043122642340f, -0.388698414341519190f, 0.921290494197634540f,
+    -0.388875076729119250f,
+  0.921215911399408730f, -0.389051724818894380f, 0.921141294730707270f,
+    -0.389228358604349730f,
+  0.921066644194273640f, -0.389404978078990940f, 0.920991959792852310f,
+    -0.389581583236324300f,
+  0.920917241529189520f, -0.389758174069856410f, 0.920842489406032190f,
+    -0.389934750573094730f,
+  0.920767703426128790f, -0.390111312739546910f, 0.920692883592229120f,
+    -0.390287860562721190f,
+  0.920618029907083970f, -0.390464394036126590f, 0.920543142373445480f,
+    -0.390640913153272430f,
+  0.920468220994067110f, -0.390817417907668500f, 0.920393265771703550f,
+    -0.390993908292825380f,
+  0.920318276709110590f, -0.391170384302253870f, 0.920243253809045370f,
+    -0.391346845929465560f,
+  0.920168197074266340f, -0.391523293167972410f, 0.920093106507533180f,
+    -0.391699726011286940f,
+  0.920017982111606570f, -0.391876144452922350f, 0.919942823889248640f,
+    -0.392052548486392090f,
+  0.919867631843222950f, -0.392228938105210310f, 0.919792405976293860f,
+    -0.392405313302891690f,
+  0.919717146291227360f, -0.392581674072951470f, 0.919641852790790470f,
+    -0.392758020408905280f,
+  0.919566525477751530f, -0.392934352304269490f, 0.919491164354880100f,
+    -0.393110669752560760f,
+  0.919415769424947070f, -0.393286972747296400f, 0.919340340690724340f,
+    -0.393463261281994330f,
+  0.919264878154985370f, -0.393639535350172880f, 0.919189381820504470f,
+    -0.393815794945351020f,
+  0.919113851690057770f, -0.393992040061048100f, 0.919038287766422050f,
+    -0.394168270690784080f,
+  0.918962690052375630f, -0.394344486828079600f, 0.918887058550697970f,
+    -0.394520688466455600f,
+  0.918811393264170050f, -0.394696875599433560f, 0.918735694195573550f,
+    -0.394873048220535760f,
+  0.918659961347691900f, -0.395049206323284770f, 0.918584194723309540f,
+    -0.395225349901203670f,
+  0.918508394325212250f, -0.395401478947816350f, 0.918432560156186910f,
+    -0.395577593456646840f,
+  0.918356692219021720f, -0.395753693421220080f, 0.918280790516506130f,
+    -0.395929778835061250f,
+  0.918204855051430900f, -0.396105849691696270f, 0.918128885826588030f,
+    -0.396281905984651520f,
+  0.918052882844770380f, -0.396457947707453910f, 0.917976846108772730f,
+    -0.396633974853630830f,
+  0.917900775621390500f, -0.396809987416710310f, 0.917824671385420570f,
+    -0.396985985390220900f,
+  0.917748533403661250f, -0.397161968767691610f, 0.917672361678911860f,
+    -0.397337937542652060f,
+  0.917596156213972950f, -0.397513891708632330f, 0.917519917011646260f,
+    -0.397689831259163180f,
+  0.917443644074735220f, -0.397865756187775750f, 0.917367337406043930f,
+    -0.398041666488001770f,
+  0.917290997008377910f, -0.398217562153373560f, 0.917214622884544250f,
+    -0.398393443177423980f,
+  0.917138215037350710f, -0.398569309553686300f, 0.917061773469606820f,
+    -0.398745161275694430f,
+  0.916985298184123000f, -0.398920998336982910f, 0.916908789183710990f,
+    -0.399096820731086540f,
+  0.916832246471183890f, -0.399272628451540990f, 0.916755670049355990f,
+    -0.399448421491882140f,
+  0.916679059921042700f, -0.399624199845646790f, 0.916602416089060790f,
+    -0.399799963506371980f,
+  0.916525738556228210f, -0.399975712467595330f, 0.916449027325364150f,
+    -0.400151446722855130f,
+  0.916372282399289140f, -0.400327166265690090f, 0.916295503780824800f,
+    -0.400502871089639500f,
+  0.916218691472794220f, -0.400678561188243240f, 0.916141845478021350f,
+    -0.400854236555041650f,
+  0.916064965799331720f, -0.401029897183575620f, 0.915988052439551950f,
+    -0.401205543067386710f,
+  0.915911105401509880f, -0.401381174200016790f, 0.915834124688034710f,
+    -0.401556790575008540f,
+  0.915757110301956720f, -0.401732392185905010f, 0.915680062246107650f,
+    -0.401907979026249700f,
+  0.915602980523320230f, -0.402083551089586990f, 0.915525865136428530f,
+    -0.402259108369461490f,
+  0.915448716088267830f, -0.402434650859418430f, 0.915371533381674760f,
+    -0.402610178553003680f,
+  0.915294317019487050f, -0.402785691443763530f, 0.915217067004543860f,
+    -0.402961189525244900f,
+  0.915139783339685260f, -0.403136672790995300f, 0.915062466027752760f,
+    -0.403312141234562550f,
+  0.914985115071589310f, -0.403487594849495310f, 0.914907730474038730f,
+    -0.403663033629342640f,
+  0.914830312237946200f, -0.403838457567654070f, 0.914752860366158220f,
+    -0.404013866657979890f,
+  0.914675374861522390f, -0.404189260893870690f, 0.914597855726887790f,
+    -0.404364640268877810f,
+  0.914520302965104450f, -0.404540004776553000f, 0.914442716579023870f,
+    -0.404715354410448650f,
+  0.914365096571498560f, -0.404890689164117580f, 0.914287442945382440f,
+    -0.405066009031113340f,
+  0.914209755703530690f, -0.405241314004989860f, 0.914132034848799460f,
+    -0.405416604079301630f,
+  0.914054280384046570f, -0.405591879247603870f, 0.913976492312130630f,
+    -0.405767139503452060f,
+  0.913898670635911680f, -0.405942384840402510f, 0.913820815358251100f,
+    -0.406117615252011840f,
+  0.913742926482011390f, -0.406292830731837360f, 0.913665004010056350f,
+    -0.406468031273437000f,
+  0.913587047945250810f, -0.406643216870369030f, 0.913509058290461140f,
+    -0.406818387516192310f,
+  0.913431035048554720f, -0.406993543204466510f, 0.913352978222400250f,
+    -0.407168683928751550f,
+  0.913274887814867760f, -0.407343809682607970f, 0.913196763828828200f,
+    -0.407518920459596920f,
+  0.913118606267154240f, -0.407694016253280110f, 0.913040415132719160f,
+    -0.407869097057219800f,
+  0.912962190428398210f, -0.408044162864978690f, 0.912883932157067200f,
+    -0.408219213670120100f,
+  0.912805640321603500f, -0.408394249466208000f, 0.912727314924885900f,
+    -0.408569270246806780f,
+  0.912648955969793900f, -0.408744276005481360f, 0.912570563459208730f,
+    -0.408919266735797430f,
+  0.912492137396012650f, -0.409094242431320980f, 0.912413677783089020f,
+    -0.409269203085618590f,
+  0.912335184623322750f, -0.409444148692257590f, 0.912256657919599760f,
+    -0.409619079244805670f,
+  0.912178097674807180f, -0.409793994736831150f, 0.912099503891833470f,
+    -0.409968895161902880f,
+  0.912020876573568340f, -0.410143780513590240f, 0.911942215722902570f,
+    -0.410318650785463260f,
+  0.911863521342728520f, -0.410493505971092410f, 0.911784793435939430f,
+    -0.410668346064048730f,
+  0.911706032005429880f, -0.410843171057903910f, 0.911627237054095650f,
+    -0.411017980946230210f,
+  0.911548408584833990f, -0.411192775722600160f, 0.911469546600543020f,
+    -0.411367555380587220f,
+  0.911390651104122430f, -0.411542319913765220f, 0.911311722098472780f,
+    -0.411717069315708560f,
+  0.911232759586496190f, -0.411891803579992170f, 0.911153763571095900f,
+    -0.412066522700191560f,
+  0.911074734055176360f, -0.412241226669882890f, 0.910995671041643140f,
+    -0.412415915482642730f,
+  0.910916574533403360f, -0.412590589132048210f, 0.910837444533365010f,
+    -0.412765247611677270f,
+  0.910758281044437570f, -0.412939890915108080f, 0.910679084069531570f,
+    -0.413114519035919450f,
+  0.910599853611558930f, -0.413289131967690960f, 0.910520589673432750f,
+    -0.413463729704002410f,
+  0.910441292258067250f, -0.413638312238434500f, 0.910361961368377990f,
+    -0.413812879564568300f,
+  0.910282597007281760f, -0.413987431675985400f, 0.910203199177696540f,
+    -0.414161968566268080f,
+  0.910123767882541680f, -0.414336490228999100f, 0.910044303124737500f,
+    -0.414510996657761750f,
+  0.909964804907205660f, -0.414685487846140010f, 0.909885273232869160f,
+    -0.414859963787718330f,
+  0.909805708104652220f, -0.415034424476081630f, 0.909726109525480160f,
+    -0.415208869904815590f,
+  0.909646477498279540f, -0.415383300067506230f, 0.909566812025978330f,
+    -0.415557714957740410f,
+  0.909487113111505430f, -0.415732114569105360f, 0.909407380757791260f,
+    -0.415906498895188770f,
+  0.909327614967767260f, -0.416080867929579210f, 0.909247815744366310f,
+    -0.416255221665865480f,
+  0.909167983090522380f, -0.416429560097637150f, 0.909088117009170580f,
+    -0.416603883218484350f,
+  0.909008217503247450f, -0.416778191021997650f, 0.908928284575690640f,
+    -0.416952483501768170f,
+  0.908848318229439120f, -0.417126760651387870f, 0.908768318467432890f,
+    -0.417301022464448890f,
+  0.908688285292613360f, -0.417475268934544290f, 0.908608218707923190f,
+    -0.417649500055267410f,
+  0.908528118716306120f, -0.417823715820212270f, 0.908447985320707250f,
+    -0.417997916222973550f,
+  0.908367818524072890f, -0.418172101257146320f, 0.908287618329350450f,
+    -0.418346270916326260f,
+  0.908207384739488700f, -0.418520425194109700f, 0.908127117757437600f,
+    -0.418694564084093560f,
+  0.908046817386148340f, -0.418868687579875050f, 0.907966483628573350f,
+    -0.419042795675052370f,
+  0.907886116487666260f, -0.419216888363223910f, 0.907805715966381930f,
+    -0.419390965637988890f,
+  0.907725282067676440f, -0.419565027492946880f, 0.907644814794507200f,
+    -0.419739073921698180f,
+  0.907564314149832630f, -0.419913104917843620f, 0.907483780136612570f,
+    -0.420087120474984530f,
+  0.907403212757808110f, -0.420261120586722880f, 0.907322612016381420f,
+    -0.420435105246661170f,
+  0.907241977915295820f, -0.420609074448402510f, 0.907161310457516250f,
+    -0.420783028185550520f,
+  0.907080609646008450f, -0.420956966451709440f, 0.906999875483739610f,
+    -0.421130889240483970f,
+  0.906919107973678140f, -0.421304796545479640f, 0.906838307118793430f,
+    -0.421478688360302280f,
+  0.906757472922056550f, -0.421652564678558330f, 0.906676605386439460f,
+    -0.421826425493854910f,
+  0.906595704514915330f, -0.422000270799799680f, 0.906514770310458800f,
+    -0.422174100590000770f,
+  0.906433802776045460f, -0.422347914858067050f, 0.906352801914652400f,
+    -0.422521713597607820f,
+  0.906271767729257660f, -0.422695496802232950f, 0.906190700222840650f,
+    -0.422869264465553060f,
+  0.906109599398381980f, -0.423043016581179040f, 0.906028465258863600f,
+    -0.423216753142722610f,
+  0.905947297807268460f, -0.423390474143796050f, 0.905866097046580940f,
+    -0.423564179578011960f,
+  0.905784862979786550f, -0.423737869438983840f, 0.905703595609872010f,
+    -0.423911543720325580f,
+  0.905622294939825270f, -0.424085202415651560f, 0.905540960972635590f,
+    -0.424258845518576950f,
+  0.905459593711293250f, -0.424432473022717420f, 0.905378193158790090f,
+    -0.424606084921689110f,
+  0.905296759318118820f, -0.424779681209108810f, 0.905215292192273590f,
+    -0.424953261878593890f,
+  0.905133791784249690f, -0.425126826923762360f, 0.905052258097043590f,
+    -0.425300376338232640f,
+  0.904970691133653250f, -0.425473910115623800f, 0.904889090897077470f,
+    -0.425647428249555590f,
+  0.904807457390316540f, -0.425820930733648240f, 0.904725790616371930f,
+    -0.425994417561522400f,
+  0.904644090578246240f, -0.426167888726799620f, 0.904562357278943300f,
+    -0.426341344223101830f,
+  0.904480590721468250f, -0.426514784044051520f, 0.904398790908827350f,
+    -0.426688208183271860f,
+  0.904316957844028320f, -0.426861616634386430f, 0.904235091530079750f,
+    -0.427035009391019680f,
+  0.904153191969991780f, -0.427208386446796320f, 0.904071259166775440f,
+    -0.427381747795341770f,
+  0.903989293123443340f, -0.427555093430282080f, 0.903907293843009050f,
+    -0.427728423345243800f,
+  0.903825261328487510f, -0.427901737533854080f, 0.903743195582894620f,
+    -0.428075035989740730f,
+  0.903661096609247980f, -0.428248318706531960f, 0.903578964410566070f,
+    -0.428421585677856650f,
+  0.903496798989868450f, -0.428594836897344400f, 0.903414600350176290f,
+    -0.428768072358625070f,
+  0.903332368494511820f, -0.428941292055329490f, 0.903250103425898400f,
+    -0.429114495981088750f,
+  0.903167805147360720f, -0.429287684129534610f, 0.903085473661924600f,
+    -0.429460856494299490f,
+  0.903003108972617150f, -0.429634013069016380f, 0.902920711082466740f,
+    -0.429807153847318710f,
+  0.902838279994502830f, -0.429980278822840620f, 0.902755815711756120f,
+    -0.430153387989216870f,
+  0.902673318237258830f, -0.430326481340082610f, 0.902590787574043870f,
+    -0.430499558869073820f,
+  0.902508223725145940f, -0.430672620569826800f, 0.902425626693600380f,
+    -0.430845666435978660f,
+  0.902342996482444200f, -0.431018696461167030f, 0.902260333094715540f,
+    -0.431191710639029950f,
+  0.902177636533453620f, -0.431364708963206330f, 0.902094906801698900f,
+    -0.431537691427335500f,
+  0.902012143902493180f, -0.431710658025057260f, 0.901929347838879460f,
+    -0.431883608750012250f,
+  0.901846518613901750f, -0.432056543595841500f, 0.901763656230605730f,
+    -0.432229462556186720f,
+  0.901680760692037730f, -0.432402365624690140f, 0.901597832001245660f,
+    -0.432575252794994650f,
+  0.901514870161278740f, -0.432748124060743700f, 0.901431875175186970f,
+    -0.432920979415581280f,
+  0.901348847046022030f, -0.433093818853151960f, 0.901265785776836580f,
+    -0.433266642367100940f,
+  0.901182691370684520f, -0.433439449951074090f, 0.901099563830620950f,
+    -0.433612241598717580f,
+  0.901016403159702330f, -0.433785017303678520f, 0.900933209360986200f,
+    -0.433957777059604420f,
+  0.900849982437531450f, -0.434130520860143310f, 0.900766722392397860f,
+    -0.434303248698943990f,
+  0.900683429228646970f, -0.434475960569655650f, 0.900600102949340900f,
+    -0.434648656465928320f,
+  0.900516743557543520f, -0.434821336381412290f, 0.900433351056319830f,
+    -0.434994000309758710f,
+  0.900349925448735600f, -0.435166648244619260f, 0.900266466737858480f,
+    -0.435339280179646070f,
+  0.900182974926756810f, -0.435511896108492000f, 0.900099450018500450f,
+    -0.435684496024810460f,
+  0.900015892016160280f, -0.435857079922255470f, 0.899932300922808510f,
+    -0.436029647794481560f,
+  0.899848676741518580f, -0.436202199635143950f, 0.899765019475365140f,
+    -0.436374735437898340f,
+  0.899681329127423930f, -0.436547255196401200f, 0.899597605700772180f,
+    -0.436719758904309360f,
+  0.899513849198487980f, -0.436892246555280360f, 0.899430059623650860f,
+    -0.437064718142972370f,
+  0.899346236979341570f, -0.437237173661044090f, 0.899262381268642000f,
+    -0.437409613103154790f,
+  0.899178492494635330f, -0.437582036462964400f, 0.899094570660405770f,
+    -0.437754443734133410f,
+  0.899010615769039070f, -0.437926834910322860f, 0.898926627823621870f,
+    -0.438099209985194470f,
+  0.898842606827242370f, -0.438271568952410430f, 0.898758552782989440f,
+    -0.438443911805633690f,
+  0.898674465693953820f, -0.438616238538527660f, 0.898590345563227030f,
+    -0.438788549144756290f,
+  0.898506192393901950f, -0.438960843617984320f, 0.898422006189072530f,
+    -0.439133121951876930f,
+  0.898337786951834310f, -0.439305384140099950f, 0.898253534685283570f,
+    -0.439477630176319800f,
+  0.898169249392518080f, -0.439649860054203480f, 0.898084931076636780f,
+    -0.439822073767418500f,
+  0.898000579740739880f, -0.439994271309633260f, 0.897916195387928660f,
+    -0.440166452674516320f,
+  0.897831778021305650f, -0.440338617855737250f, 0.897747327643974690f,
+    -0.440510766846965940f,
+  0.897662844259040860f, -0.440682899641872900f, 0.897578327869610230f,
+    -0.440855016234129430f,
+  0.897493778478790310f, -0.441027116617407230f, 0.897409196089689720f,
+    -0.441199200785378660f,
+  0.897324580705418320f, -0.441371268731716670f, 0.897239932329087160f,
+    -0.441543320450094870f,
+  0.897155250963808550f, -0.441715355934187310f, 0.897070536612695870f,
+    -0.441887375177668850f,
+  0.896985789278863970f, -0.442059378174214700f, 0.896901008965428790f,
+    -0.442231364917500980f,
+  0.896816195675507300f, -0.442403335401204080f, 0.896731349412217880f,
+    -0.442575289619001170f,
+  0.896646470178680150f, -0.442747227564570020f, 0.896561557978014960f,
+    -0.442919149231588980f,
+  0.896476612813344120f, -0.443091054613736880f, 0.896391634687790820f,
+    -0.443262943704693320f,
+  0.896306623604479550f, -0.443434816498138480f, 0.896221579566536030f,
+    -0.443606672987752970f,
+  0.896136502577086770f, -0.443778513167218220f, 0.896051392639260150f,
+    -0.443950337030216140f,
+  0.895966249756185220f, -0.444122144570429200f, 0.895881073930992370f,
+    -0.444293935781540580f,
+  0.895795865166813530f, -0.444465710657234000f, 0.895710623466781320f,
+    -0.444637469191193790f,
+  0.895625348834030110f, -0.444809211377104880f, 0.895540041271694950f,
+    -0.444980937208652730f,
+  0.895454700782912450f, -0.445152646679523640f, 0.895369327370820310f,
+    -0.445324339783404190f,
+  0.895283921038557580f, -0.445496016513981740f, 0.895198481789264200f,
+    -0.445667676864944300f,
+  0.895113009626081760f, -0.445839320829980290f, 0.895027504552152630f,
+    -0.446010948402778940f,
+  0.894941966570620750f, -0.446182559577030070f, 0.894856395684631050f,
+    -0.446354154346423840f,
+  0.894770791897329550f, -0.446525732704651350f, 0.894685155211863980f,
+    -0.446697294645404090f,
+  0.894599485631382700f, -0.446868840162374160f, 0.894513783159035620f,
+    -0.447040369249254440f,
+  0.894428047797973800f, -0.447211881899738320f, 0.894342279551349480f,
+    -0.447383378107519600f,
+  0.894256478422316040f, -0.447554857866293010f, 0.894170644414028270f,
+    -0.447726321169753580f,
+  0.894084777529641990f, -0.447897768011597310f, 0.893998877772314240f,
+    -0.448069198385520400f,
+  0.893912945145203250f, -0.448240612285219890f, 0.893826979651468620f,
+    -0.448412009704393430f,
+  0.893740981294271040f, -0.448583390636739240f, 0.893654950076772540f,
+    -0.448754755075955970f,
+  0.893568886002135910f, -0.448926103015743260f, 0.893482789073525850f,
+    -0.449097434449801050f,
+  0.893396659294107720f, -0.449268749371829920f, 0.893310496667048200f,
+    -0.449440047775531150f,
+  0.893224301195515320f, -0.449611329654606540f, 0.893138072882678320f,
+    -0.449782595002758690f,
+  0.893051811731707450f, -0.449953843813690520f, 0.892965517745774370f,
+    -0.450125076081105690f,
+  0.892879190928051680f, -0.450296291798708610f, 0.892792831281713610f,
+    -0.450467490960204110f,
+  0.892706438809935390f, -0.450638673559297600f, 0.892620013515893150f,
+    -0.450809839589695280f,
+  0.892533555402764580f, -0.450980989045103860f, 0.892447064473728680f,
+    -0.451152121919230600f,
+  0.892360540731965360f, -0.451323238205783520f, 0.892273984180655840f,
+    -0.451494337898471100f,
+  0.892187394822982480f, -0.451665420991002490f, 0.892100772662129060f,
+    -0.451836487477087490f,
+  0.892014117701280470f, -0.452007537350436420f, 0.891927429943622510f,
+    -0.452178570604760350f,
+  0.891840709392342720f, -0.452349587233770890f, 0.891753956050629460f,
+    -0.452520587231180050f,
+  0.891667169921672280f, -0.452691570590700920f, 0.891580351008662290f,
+    -0.452862537306046750f,
+  0.891493499314791380f, -0.453033487370931580f, 0.891406614843252900f,
+    -0.453204420779070190f,
+  0.891319697597241390f, -0.453375337524177750f, 0.891232747579952520f,
+    -0.453546237599970090f,
+  0.891145764794583180f, -0.453717121000163870f, 0.891058749244331590f,
+    -0.453887987718476050f,
+  0.890971700932396860f, -0.454058837748624430f, 0.890884619861979530f,
+    -0.454229671084327320f,
+  0.890797506036281490f, -0.454400487719303580f, 0.890710359458505630f,
+    -0.454571287647272950f,
+  0.890623180131855930f, -0.454742070861955450f, 0.890535968059537830f,
+    -0.454912837357071940f,
+  0.890448723244757880f, -0.455083587126343840f, 0.890361445690723840f,
+    -0.455254320163493100f,
+  0.890274135400644600f, -0.455425036462242360f, 0.890186792377730240f,
+    -0.455595736016314980f,
+  0.890099416625192320f, -0.455766418819434640f, 0.890012008146243260f,
+    -0.455937084865326030f,
+  0.889924566944096720f, -0.456107734147714110f, 0.889837093021967900f,
+    -0.456278366660324620f,
+  0.889749586383072780f, -0.456448982396883920f, 0.889662047030628900f,
+    -0.456619581351118910f,
+  0.889574474967854580f, -0.456790163516757160f, 0.889486870197969900f,
+    -0.456960728887526980f,
+  0.889399232724195520f, -0.457131277457156980f, 0.889311562549753850f,
+    -0.457301809219376630f,
+  0.889223859677868210f, -0.457472324167916060f, 0.889136124111763240f,
+    -0.457642822296505770f,
+  0.889048355854664570f, -0.457813303598877170f, 0.888960554909799310f,
+    -0.457983768068762120f,
+  0.888872721280395630f, -0.458154215699893060f, 0.888784854969682850f,
+    -0.458324646486003240f,
+  0.888696955980891600f, -0.458495060420826270f, 0.888609024317253860f,
+    -0.458665457498096560f,
+  0.888521059982002260f, -0.458835837711549120f, 0.888433062978371320f,
+    -0.459006201054919630f,
+  0.888345033309596350f, -0.459176547521944090f, 0.888256970978913870f,
+    -0.459346877106359630f,
+  0.888168875989561730f, -0.459517189801903480f, 0.888080748344778900f,
+    -0.459687485602313870f,
+  0.887992588047805560f, -0.459857764501329540f, 0.887904395101883240f,
+    -0.460028026492689650f,
+  0.887816169510254440f, -0.460198271570134320f, 0.887727911276163020f,
+    -0.460368499727404010f,
+  0.887639620402853930f, -0.460538710958240010f, 0.887551296893573370f,
+    -0.460708905256384080f,
+  0.887462940751568840f, -0.460879082615578690f, 0.887374551980088850f,
+    -0.461049243029566900f,
+  0.887286130582383150f, -0.461219386492092380f, 0.887197676561702900f,
+    -0.461389512996899450f,
+  0.887109189921300170f, -0.461559622537733080f, 0.887020670664428360f,
+    -0.461729715108338770f,
+  0.886932118794342190f, -0.461899790702462730f, 0.886843534314297410f,
+    -0.462069849313851750f,
+  0.886754917227550840f, -0.462239890936253340f, 0.886666267537361000f,
+    -0.462409915563415430f,
+  0.886577585246987040f, -0.462579923189086810f, 0.886488870359689600f,
+    -0.462749913807016740f,
+  0.886400122878730600f, -0.462919887410955080f, 0.886311342807372780f,
+    -0.463089843994652530f,
+  0.886222530148880640f, -0.463259783551860150f, 0.886133684906519340f,
+    -0.463429706076329830f,
+  0.886044807083555600f, -0.463599611561814010f, 0.885955896683257030f,
+    -0.463769500002065630f,
+  0.885866953708892790f, -0.463939371390838520f, 0.885777978163732940f,
+    -0.464109225721886950f,
+  0.885688970051048960f, -0.464279062988965760f, 0.885599929374113360f,
+    -0.464448883185830660f,
+  0.885510856136199950f, -0.464618686306237820f, 0.885421750340583680f,
+    -0.464788472343943990f,
+  0.885332611990540590f, -0.464958241292706690f, 0.885243441089348270f,
+    -0.465127993146283950f,
+  0.885154237640285110f, -0.465297727898434600f, 0.885065001646630930f,
+    -0.465467445542917800f,
+  0.884975733111666660f, -0.465637146073493660f, 0.884886432038674560f,
+    -0.465806829483922710f,
+  0.884797098430937790f, -0.465976495767966180f, 0.884707732291741040f,
+    -0.466146144919385890f,
+  0.884618333624369920f, -0.466315776931944430f, 0.884528902432111460f,
+    -0.466485391799404900f,
+  0.884439438718253810f, -0.466654989515530920f, 0.884349942486086120f,
+    -0.466824570074086950f,
+  0.884260413738899190f, -0.466994133468838000f, 0.884170852479984500f,
+    -0.467163679693549770f,
+  0.884081258712634990f, -0.467333208741988420f, 0.883991632440144890f,
+    -0.467502720607920920f,
+  0.883901973665809470f, -0.467672215285114770f, 0.883812282392925090f,
+    -0.467841692767338170f,
+  0.883722558624789660f, -0.468011153048359830f, 0.883632802364701870f,
+    -0.468180596121949290f,
+  0.883543013615961880f, -0.468350021981876530f, 0.883453192381870920f,
+    -0.468519430621912310f,
+  0.883363338665731580f, -0.468688822035827900f, 0.883273452470847430f,
+    -0.468858196217395330f,
+  0.883183533800523390f, -0.469027553160387130f, 0.883093582658065370f,
+    -0.469196892858576580f,
+  0.883003599046780830f, -0.469366215305737520f, 0.882913582969978020f,
+    -0.469535520495644450f,
+  0.882823534430966620f, -0.469704808422072460f, 0.882733453433057650f,
+    -0.469874079078797360f,
+  0.882643339979562790f, -0.470043332459595620f, 0.882553194073795510f,
+    -0.470212568558244170f,
+  0.882463015719070150f, -0.470381787368520650f, 0.882372804918702290f,
+    -0.470550988884203550f,
+  0.882282561676008710f, -0.470720173099071600f, 0.882192285994307430f,
+    -0.470889340006904520f,
+  0.882101977876917580f, -0.471058489601482500f, 0.882011637327159590f,
+    -0.471227621876586340f,
+  0.881921264348355050f, -0.471396736825997640f, 0.881830858943826620f,
+    -0.471565834443498420f,
+  0.881740421116898320f, -0.471734914722871430f, 0.881649950870895260f,
+    -0.471903977657900210f,
+  0.881559448209143780f, -0.472073023242368660f, 0.881468913134971440f,
+    -0.472242051470061490f,
+  0.881378345651706920f, -0.472411062334764040f, 0.881287745762680100f,
+    -0.472580055830262250f,
+  0.881197113471222090f, -0.472749031950342790f, 0.881106448780665130f,
+    -0.472917990688792760f,
+  0.881015751694342870f, -0.473086932039400050f, 0.880925022215589880f,
+    -0.473255855995953320f,
+  0.880834260347742040f, -0.473424762552241530f, 0.880743466094136340f,
+    -0.473593651702054530f,
+  0.880652639458111010f, -0.473762523439182850f, 0.880561780443005700f,
+    -0.473931377757417450f,
+  0.880470889052160750f, -0.474100214650549970f, 0.880379965288918150f,
+    -0.474269034112372980f,
+  0.880289009156621010f, -0.474437836136679230f, 0.880198020658613190f,
+    -0.474606620717262560f,
+  0.880106999798240360f, -0.474775387847917120f, 0.880015946578849070f,
+    -0.474944137522437800f,
+  0.879924861003786860f, -0.475112869734620300f, 0.879833743076402940f,
+    -0.475281584478260740f,
+  0.879742592800047410f, -0.475450281747155870f, 0.879651410178071580f,
+    -0.475618961535103300f,
+  0.879560195213827890f, -0.475787623835901120f, 0.879468947910670210f,
+    -0.475956268643348060f,
+  0.879377668271953290f, -0.476124895951243580f, 0.879286356301033250f,
+    -0.476293505753387690f,
+  0.879195012001267480f, -0.476462098043581190f, 0.879103635376014330f,
+    -0.476630672815625320f,
+  0.879012226428633530f, -0.476799230063322090f, 0.878920785162485840f,
+    -0.476967769780474170f,
+  0.878829311580933360f, -0.477136291960884810f, 0.878737805687339390f,
+    -0.477304796598357890f,
+  0.878646267485068130f, -0.477473283686698060f, 0.878554696977485450f,
+    -0.477641753219710470f,
+  0.878463094167957870f, -0.477810205191200990f, 0.878371459059853480f,
+    -0.477978639594976160f,
+  0.878279791656541580f, -0.478147056424843010f, 0.878188091961392250f,
+    -0.478315455674609480f,
+  0.878096359977777130f, -0.478483837338083970f, 0.878004595709069080f,
+    -0.478652201409075500f,
+  0.877912799158641840f, -0.478820547881393890f, 0.877820970329870500f,
+    -0.478988876748849490f,
+  0.877729109226131570f, -0.479157188005253310f, 0.877637215850802230f,
+    -0.479325481644417070f,
+  0.877545290207261350f, -0.479493757660153010f, 0.877453332298888560f,
+    -0.479662016046274180f,
+  0.877361342129065140f, -0.479830256796594190f, 0.877269319701173170f,
+    -0.479998479904927280f,
+  0.877177265018595940f, -0.480166685365088390f, 0.877085178084718420f,
+    -0.480334873170893020f,
+  0.876993058902925890f, -0.480503043316157510f, 0.876900907476605650f,
+    -0.480671195794698640f,
+  0.876808723809145650f, -0.480839330600333960f, 0.876716507903935400f,
+    -0.481007447726881590f,
+  0.876624259764365310f, -0.481175547168160300f, 0.876531979393827100f,
+    -0.481343628917989710f,
+  0.876439666795713610f, -0.481511692970189860f, 0.876347321973419020f,
+    -0.481679739318581490f,
+  0.876254944930338510f, -0.481847767956986030f, 0.876162535669868460f,
+    -0.482015778879225590f,
+  0.876070094195406600f, -0.482183772079122720f, 0.875977620510351770f,
+    -0.482351747550500980f,
+  0.875885114618103810f, -0.482519705287184350f, 0.875792576522063880f,
+    -0.482687645282997460f,
+  0.875700006225634600f, -0.482855567531765670f, 0.875607403732219350f,
+    -0.483023472027314880f,
+  0.875514769045222850f, -0.483191358763471860f, 0.875422102168050940f,
+    -0.483359227734063810f,
+  0.875329403104110890f, -0.483527078932918740f, 0.875236671856810870f,
+    -0.483694912353865140f,
+  0.875143908429560360f, -0.483862727990732270f, 0.875051112825769970f,
+    -0.484030525837350010f,
+  0.874958285048851650f, -0.484198305887549030f, 0.874865425102218320f,
+    -0.484366068135160420f,
+  0.874772532989284150f, -0.484533812574016180f, 0.874679608713464510f,
+    -0.484701539197948670f,
+  0.874586652278176110f, -0.484869248000791060f, 0.874493663686836560f,
+    -0.485036938976377290f,
+  0.874400642942864790f, -0.485204612118541820f, 0.874307590049680950f,
+    -0.485372267421119770f,
+  0.874214505010706300f, -0.485539904877946960f, 0.874121387829363330f,
+    -0.485707524482859750f,
+  0.874028238509075740f, -0.485875126229695250f, 0.873935057053268240f,
+    -0.486042710112291330f,
+  0.873841843465366860f, -0.486210276124486420f, 0.873748597748798870f,
+    -0.486377824260119440f,
+  0.873655319906992630f, -0.486545354513030270f, 0.873562009943377850f,
+    -0.486712866877059170f,
+  0.873468667861384880f, -0.486880361346047340f, 0.873375293664446000f,
+    -0.487047837913836380f,
+  0.873281887355994210f, -0.487215296574268760f, 0.873188448939463790f,
+    -0.487382737321187360f,
+  0.873094978418290090f, -0.487550160148436000f, 0.873001475795909920f,
+    -0.487717565049858800f,
+  0.872907941075761080f, -0.487884952019301040f, 0.872814374261282390f,
+    -0.488052321050608250f,
+  0.872720775355914300f, -0.488219672137626790f, 0.872627144363097960f,
+    -0.488387005274203530f,
+  0.872533481286276170f, -0.488554320454186180f, 0.872439786128892280f,
+    -0.488721617671423080f,
+  0.872346058894391540f, -0.488888896919763170f, 0.872252299586219860f,
+    -0.489056158193056030f,
+  0.872158508207824480f, -0.489223401485151980f, 0.872064684762653860f,
+    -0.489390626789901920f,
+  0.871970829254157810f, -0.489557834101157440f, 0.871876941685786890f,
+    -0.489725023412770910f,
+  0.871783022060993120f, -0.489892194718595190f, 0.871689070383229740f,
+    -0.490059348012483850f,
+  0.871595086655950980f, -0.490226483288291160f, 0.871501070882612530f,
+    -0.490393600539871970f,
+  0.871407023066670950f, -0.490560699761082020f, 0.871312943211584030f,
+    -0.490727780945777400f,
+  0.871218831320811020f, -0.490894844087815090f, 0.871124687397811900f,
+    -0.491061889181052650f,
+  0.871030511446048260f, -0.491228916219348280f, 0.870936303468982760f,
+    -0.491395925196560780f,
+  0.870842063470078980f, -0.491562916106549900f, 0.870747791452801790f,
+    -0.491729888943175760f,
+  0.870653487420617430f, -0.491896843700299290f, 0.870559151376993250f,
+    -0.492063780371782000f,
+  0.870464783325397670f, -0.492230698951486020f, 0.870370383269300270f,
+    -0.492397599433274380f,
+  0.870275951212171940f, -0.492564481811010590f, 0.870181487157484560f,
+    -0.492731346078558840f,
+  0.870086991108711460f, -0.492898192229784040f, 0.869992463069326870f,
+    -0.493065020258551700f,
+  0.869897903042806340f, -0.493231830158727900f, 0.869803311032626650f,
+    -0.493398621924179770f,
+  0.869708687042265670f, -0.493565395548774770f, 0.869614031075202300f,
+    -0.493732151026381020f,
+  0.869519343134916860f, -0.493898888350867480f, 0.869424623224890890f,
+    -0.494065607516103570f,
+  0.869329871348606840f, -0.494232308515959670f, 0.869235087509548370f,
+    -0.494398991344306650f,
+  0.869140271711200560f, -0.494565655995015950f, 0.869045423957049530f,
+    -0.494732302461959870f,
+  0.868950544250582380f, -0.494898930739011260f, 0.868855632595287860f,
+    -0.495065540820043560f,
+  0.868760688994655310f, -0.495232132698931180f, 0.868665713452175690f,
+    -0.495398706369549020f,
+  0.868570705971340900f, -0.495565261825772540f, 0.868475666555644120f,
+    -0.495731799061477960f,
+  0.868380595208579800f, -0.495898318070542190f, 0.868285491933643350f,
+    -0.496064818846842890f,
+  0.868190356734331310f, -0.496231301384258250f, 0.868095189614141670f,
+    -0.496397765676667160f,
+  0.867999990576573510f, -0.496564211717949290f, 0.867904759625126920f,
+    -0.496730639501984760f,
+  0.867809496763303320f, -0.496897049022654470f, 0.867714201994605140f,
+    -0.497063440273840250f,
+  0.867618875322536230f, -0.497229813249424220f, 0.867523516750601460f,
+    -0.497396167943289280f,
+  0.867428126282306920f, -0.497562504349319150f, 0.867332703921159800f,
+    -0.497728822461397940f,
+  0.867237249670668400f, -0.497895122273410870f, 0.867141763534342470f,
+    -0.498061403779243410f,
+  0.867046245515692650f, -0.498227666972781870f, 0.866950695618230900f,
+    -0.498393911847913210f,
+  0.866855113845470430f, -0.498560138398525140f, 0.866759500200925400f,
+    -0.498726346618505900f,
+  0.866663854688111130f, -0.498892536501744590f, 0.866568177310544470f,
+    -0.499058708042130870f,
+  0.866472468071743050f, -0.499224861233555080f, 0.866376726975225830f,
+    -0.499390996069908170f,
+  0.866280954024512990f, -0.499557112545081840f, 0.866185149223125840f,
+    -0.499723210652968540f,
+  0.866089312574586770f, -0.499889290387461330f, 0.865993444082419520f,
+    -0.500055351742453860f,
+  0.865897543750148820f, -0.500221394711840680f, 0.865801611581300760f,
+    -0.500387419289516580f,
+  0.865705647579402380f, -0.500553425469377420f, 0.865609651747981990f,
+    -0.500719413245319880f,
+  0.865513624090569090f, -0.500885382611240710f, 0.865417564610694410f,
+    -0.501051333561038040f,
+  0.865321473311889800f, -0.501217266088609950f, 0.865225350197688200f,
+    -0.501383180187855770f,
+  0.865129195271623800f, -0.501549075852675390f, 0.865033008537231860f,
+    -0.501714953076969120f,
+  0.864936789998049020f, -0.501880811854638290f, 0.864840539657612870f,
+    -0.502046652179584660f,
+  0.864744257519462380f, -0.502212474045710790f, 0.864647943587137480f,
+    -0.502378277446919760f,
+  0.864551597864179340f, -0.502544062377115690f, 0.864455220354130360f,
+    -0.502709828830202990f,
+  0.864358811060534030f, -0.502875576800086990f, 0.864262369986934950f,
+    -0.503041306280673450f,
+  0.864165897136879300f, -0.503207017265868920f, 0.864069392513913790f,
+    -0.503372709749581040f,
+  0.863972856121586810f, -0.503538383725717580f, 0.863876287963447510f,
+    -0.503704039188187070f,
+  0.863779688043046720f, -0.503869676130898950f, 0.863683056363935830f,
+    -0.504035294547763190f,
+  0.863586392929668100f, -0.504200894432690340f, 0.863489697743797140f,
+    -0.504366475779592040f,
+  0.863392970809878420f, -0.504532038582380270f, 0.863296212131468230f,
+    -0.504697582834967570f,
+  0.863199421712124160f, -0.504863108531267590f, 0.863102599555404910f,
+    -0.505028615665194080f,
+  0.863005745664870320f, -0.505194104230662240f, 0.862908860044081400f,
+    -0.505359574221587280f,
+  0.862811942696600330f, -0.505525025631885390f, 0.862714993625990690f,
+    -0.505690458455473450f,
+  0.862618012835816740f, -0.505855872686268860f, 0.862521000329644520f,
+    -0.506021268318189720f,
+  0.862423956111040610f, -0.506186645345155230f, 0.862326880183573060f,
+    -0.506352003761084800f,
+  0.862229772550811240f, -0.506517343559898530f, 0.862132633216325380f,
+    -0.506682664735517600f,
+  0.862035462183687210f, -0.506847967281863210f, 0.861938259456469290f,
+    -0.507013251192858230f,
+  0.861841025038245330f, -0.507178516462425180f, 0.861743758932590700f,
+    -0.507343763084487920f,
+  0.861646461143081300f, -0.507508991052970870f, 0.861549131673294720f,
+    -0.507674200361798890f,
+  0.861451770526809320f, -0.507839391004897720f, 0.861354377707204910f,
+    -0.508004562976194010f,
+  0.861256953218062170f, -0.508169716269614600f, 0.861159497062963350f,
+    -0.508334850879087360f,
+  0.861062009245491480f, -0.508499966798540930f, 0.860964489769231010f,
+    -0.508665064021904030f,
+  0.860866938637767310f, -0.508830142543106990f, 0.860769355854687170f,
+    -0.508995202356080090f,
+  0.860671741423578380f, -0.509160243454754640f, 0.860574095348029980f,
+    -0.509325265833062480f,
+  0.860476417631632070f, -0.509490269484936360f, 0.860378708277976130f,
+    -0.509655254404309250f,
+  0.860280967290654510f, -0.509820220585115450f, 0.860183194673260990f,
+    -0.509985168021289460f,
+  0.860085390429390140f, -0.510150096706766810f, 0.859987554562638200f,
+    -0.510315006635483240f,
+  0.859889687076602290f, -0.510479897801375700f, 0.859791787974880650f,
+    -0.510644770198381610f,
+  0.859693857261072610f, -0.510809623820439040f, 0.859595894938779080f,
+    -0.510974458661486830f,
+  0.859497901011601730f, -0.511139274715464390f, 0.859399875483143450f,
+    -0.511304071976312000f,
+  0.859301818357008470f, -0.511468850437970300f, 0.859203729636801920f,
+    -0.511633610094381240f,
+  0.859105609326130450f, -0.511798350939486890f, 0.859007457428601520f,
+    -0.511963072967230200f,
+  0.858909273947823900f, -0.512127776171554690f, 0.858811058887407610f,
+    -0.512292460546404870f,
+  0.858712812250963520f, -0.512457126085725690f, 0.858614534042104190f,
+    -0.512621772783462990f,
+  0.858516224264442740f, -0.512786400633562960f, 0.858417882921593930f,
+    -0.512951009629972980f,
+  0.858319510017173440f, -0.513115599766640560f, 0.858221105554798250f,
+    -0.513280171037514220f,
+  0.858122669538086140f, -0.513444723436543460f, 0.858024201970656540f,
+    -0.513609256957677780f,
+  0.857925702856129790f, -0.513773771594868030f, 0.857827172198127430f,
+    -0.513938267342065380f,
+  0.857728610000272120f, -0.514102744193221660f, 0.857630016266187620f,
+    -0.514267202142289710f,
+  0.857531390999499150f, -0.514431641183222820f, 0.857432734203832700f,
+    -0.514596061309975040f,
+  0.857334045882815590f, -0.514760462516501200f, 0.857235326040076460f,
+    -0.514924844796756490f,
+  0.857136574679244980f, -0.515089208144697160f, 0.857037791803951680f,
+    -0.515253552554280180f,
+  0.856938977417828760f, -0.515417878019462930f, 0.856840131524509220f,
+    -0.515582184534203790f,
+  0.856741254127627470f, -0.515746472092461380f, 0.856642345230818840f,
+    -0.515910740688195650f,
+  0.856543404837719960f, -0.516074990315366630f, 0.856444432951968590f,
+    -0.516239220967935510f,
+  0.856345429577203610f, -0.516403432639863990f, 0.856246394717065210f,
+    -0.516567625325114350f,
+  0.856147328375194470f, -0.516731799017649870f, 0.856048230555233940f,
+    -0.516895953711434150f,
+  0.855949101260826910f, -0.517060089400431910f, 0.855849940495618240f,
+    -0.517224206078608310f,
+  0.855750748263253920f, -0.517388303739929060f, 0.855651524567380690f,
+    -0.517552382378360880f,
+  0.855552269411646860f, -0.517716441987871150f, 0.855452982799701830f,
+    -0.517880482562427690f,
+  0.855353664735196030f, -0.518044504095999340f, 0.855254315221780970f,
+    -0.518208506582555460f,
+  0.855154934263109620f, -0.518372490016066110f, 0.855055521862835950f,
+    -0.518536454390502220f,
+  0.854956078024614930f, -0.518700399699834950f, 0.854856602752102850f,
+    -0.518864325938036890f,
+  0.854757096048957220f, -0.519028233099080860f, 0.854657557918836460f,
+    -0.519192121176940250f,
+  0.854557988365400530f, -0.519355990165589640f, 0.854458387392310170f,
+    -0.519519840059003760f,
+  0.854358755003227440f, -0.519683670851158410f, 0.854259091201815530f,
+    -0.519847482536030190f,
+  0.854159395991738850f, -0.520011275107596040f, 0.854059669376662780f,
+    -0.520175048559833760f,
+  0.853959911360254180f, -0.520338802886721960f, 0.853860121946180770f,
+    -0.520502538082239670f,
+  0.853760301138111410f, -0.520666254140367160f, 0.853660448939716380f,
+    -0.520829951055084670f,
+  0.853560565354666840f, -0.520993628820373920f, 0.853460650386635320f,
+    -0.521157287430216610f,
+  0.853360704039295430f, -0.521320926878595660f, 0.853260726316321880f,
+    -0.521484547159494330f,
+  0.853160717221390420f, -0.521648148266897090f, 0.853060676758178320f,
+    -0.521811730194788550f,
+  0.852960604930363630f, -0.521975292937154390f, 0.852860501741625750f,
+    -0.522138836487980760f,
+  0.852760367195645300f, -0.522302360841254590f, 0.852660201296103760f,
+    -0.522465865990963780f,
+  0.852560004046684080f, -0.522629351931096610f, 0.852459775451070100f,
+    -0.522792818655642090f,
+  0.852359515512947090f, -0.522956266158590140f, 0.852259224236001090f,
+    -0.523119694433931250f,
+  0.852158901623919830f, -0.523283103475656430f, 0.852058547680391690f,
+    -0.523446493277757830f,
+  0.851958162409106380f, -0.523609863834227920f, 0.851857745813754840f,
+    -0.523773215139060170f,
+  0.851757297898029120f, -0.523936547186248600f, 0.851656818665622370f,
+    -0.524099859969787700f,
+  0.851556308120228980f, -0.524263153483673360f, 0.851455766265544310f,
+    -0.524426427721901400f,
+  0.851355193105265200f, -0.524589682678468950f, 0.851254588643089120f,
+    -0.524752918347373360f,
+  0.851153952882715340f, -0.524916134722613000f, 0.851053285827843790f,
+    -0.525079331798186780f,
+  0.850952587482175730f, -0.525242509568094710f, 0.850851857849413530f,
+    -0.525405668026336930f,
+  0.850751096933260790f, -0.525568807166914680f, 0.850650304737422090f,
+    -0.525731926983829760f,
+  0.850549481265603480f, -0.525895027471084630f, 0.850448626521511760f,
+    -0.526058108622682760f,
+  0.850347740508854980f, -0.526221170432628060f, 0.850246823231342710f,
+    -0.526384212894925100f,
+  0.850145874692685210f, -0.526547236003579440f, 0.850044894896594180f,
+    -0.526710239752597010f,
+  0.849943883846782210f, -0.526873224135984590f, 0.849842841546963320f,
+    -0.527036189147750080f,
+  0.849741768000852550f, -0.527199134781901280f, 0.849640663212165910f,
+    -0.527362061032447540f,
+  0.849539527184620890f, -0.527524967893398200f, 0.849438359921936060f,
+    -0.527687855358763720f,
+  0.849337161427830780f, -0.527850723422555230f, 0.849235931706025960f,
+    -0.528013572078784630f,
+  0.849134670760243630f, -0.528176401321464370f, 0.849033378594206800f,
+    -0.528339211144607690f,
+  0.848932055211639610f, -0.528502001542228480f, 0.848830700616267530f,
+    -0.528664772508341320f,
+  0.848729314811817130f, -0.528827524036961870f, 0.848627897802015860f,
+    -0.528990256122106040f,
+  0.848526449590592650f, -0.529152968757790610f, 0.848424970181277600f,
+    -0.529315661938033260f,
+  0.848323459577801640f, -0.529478335656851980f, 0.848221917783896990f,
+    -0.529640989908265910f,
+  0.848120344803297230f, -0.529803624686294610f, 0.848018740639736810f,
+    -0.529966239984958620f,
+  0.847917105296951410f, -0.530128835798278960f, 0.847815438778677930f,
+    -0.530291412120277310f,
+  0.847713741088654380f, -0.530453968944976320f, 0.847612012230619660f,
+    -0.530616506266399330f,
+  0.847510252208314330f, -0.530779024078570140f, 0.847408461025479730f,
+    -0.530941522375513620f,
+  0.847306638685858320f, -0.531104001151255000f, 0.847204785193194090f,
+    -0.531266460399820390f,
+  0.847102900551231500f, -0.531428900115236800f, 0.847000984763716880f,
+    -0.531591320291531670f,
+  0.846899037834397240f, -0.531753720922733320f, 0.846797059767020910f,
+    -0.531916102002870650f,
+  0.846695050565337450f, -0.532078463525973540f, 0.846593010233097190f,
+    -0.532240805486072220f,
+  0.846490938774052130f, -0.532403127877197900f, 0.846388836191954930f,
+    -0.532565430693382580f,
+  0.846286702490559710f, -0.532727713928658810f, 0.846184537673621560f,
+    -0.532889977577059800f,
+  0.846082341744897050f, -0.533052221632619450f, 0.845980114708143270f,
+    -0.533214446089372960f,
+  0.845877856567119000f, -0.533376650941355330f, 0.845775567325584010f,
+    -0.533538836182603120f,
+  0.845673246987299070f, -0.533701001807152960f, 0.845570895556026270f,
+    -0.533863147809042650f,
+  0.845468513035528830f, -0.534025274182310380f, 0.845366099429570970f,
+    -0.534187380920995380f,
+  0.845263654741918220f, -0.534349468019137520f, 0.845161178976337140f,
+    -0.534511535470777120f,
+  0.845058672136595470f, -0.534673583269955510f, 0.844956134226462210f,
+    -0.534835611410714560f,
+  0.844853565249707120f, -0.534997619887097150f, 0.844750965210101510f,
+    -0.535159608693146600f,
+  0.844648334111417820f, -0.535321577822907120f, 0.844545671957429240f,
+    -0.535483527270423370f,
+  0.844442978751910660f, -0.535645457029741090f, 0.844340254498637590f,
+    -0.535807367094906390f,
+  0.844237499201387020f, -0.535969257459966710f, 0.844134712863936930f,
+    -0.536131128118969460f,
+  0.844031895490066410f, -0.536292979065963180f, 0.843929047083555870f,
+    -0.536454810294997090f,
+  0.843826167648186740f, -0.536616621800121040f, 0.843723257187741660f,
+    -0.536778413575385920f,
+  0.843620315706004150f, -0.536940185614842910f, 0.843517343206759200f,
+    -0.537101937912544130f,
+  0.843414339693792760f, -0.537263670462542530f, 0.843311305170892140f,
+    -0.537425383258891550f,
+  0.843208239641845440f, -0.537587076295645390f, 0.843105143110442160f,
+    -0.537748749566859360f,
+  0.843002015580472940f, -0.537910403066588880f, 0.842898857055729310f,
+    -0.538072036788890600f,
+  0.842795667540004120f, -0.538233650727821700f, 0.842692447037091670f,
+    -0.538395244877439950f,
+  0.842589195550786710f, -0.538556819231804100f, 0.842485913084885630f,
+    -0.538718373784973560f,
+  0.842382599643185850f, -0.538879908531008420f, 0.842279255229485990f,
+    -0.539041423463969440f,
+  0.842175879847585570f, -0.539202918577918240f, 0.842072473501285560f,
+    -0.539364393866917040f,
+  0.841969036194387680f, -0.539525849325028890f, 0.841865567930695340f,
+    -0.539687284946317570f,
+  0.841762068714012490f, -0.539848700724847590f, 0.841658538548144760f,
+    -0.540010096654684020f,
+  0.841554977436898440f, -0.540171472729892850f, 0.841451385384081260f,
+    -0.540332828944540710f,
+  0.841347762393501950f, -0.540494165292695230f, 0.841244108468970580f,
+    -0.540655481768424150f,
+  0.841140423614298080f, -0.540816778365796670f, 0.841036707833296650f,
+    -0.540978055078882080f,
+  0.840932961129779780f, -0.541139311901750800f, 0.840829183507561640f,
+    -0.541300548828474120f,
+  0.840725374970458070f, -0.541461765853123440f, 0.840621535522285690f,
+    -0.541622962969771530f,
+  0.840517665166862550f, -0.541784140172491550f, 0.840413763908007480f,
+    -0.541945297455357360f,
+  0.840309831749540770f, -0.542106434812443920f, 0.840205868695283580f,
+    -0.542267552237826520f,
+  0.840101874749058400f, -0.542428649725581250f, 0.839997849914688840f,
+    -0.542589727269785270f,
+  0.839893794195999520f, -0.542750784864515890f, 0.839789707596816370f,
+    -0.542911822503851730f,
+  0.839685590120966110f, -0.543072840181871740f, 0.839581441772277120f,
+    -0.543233837892655890f,
+  0.839477262554578550f, -0.543394815630284800f, 0.839373052471700690f,
+    -0.543555773388839540f,
+  0.839268811527475230f, -0.543716711162402280f, 0.839164539725734680f,
+    -0.543877628945055980f,
+  0.839060237070312740f, -0.544038526730883820f, 0.838955903565044460f,
+    -0.544199404513970310f,
+  0.838851539213765760f, -0.544360262288400400f, 0.838747144020313920f,
+    -0.544521100048259600f,
+  0.838642717988527300f, -0.544681917787634530f, 0.838538261122245280f,
+    -0.544842715500612360f,
+  0.838433773425308340f, -0.545003493181281160f, 0.838329254901558300f,
+    -0.545164250823729320f,
+  0.838224705554838080f, -0.545324988422046460f, 0.838120125388991500f,
+    -0.545485705970322530f,
+  0.838015514407863820f, -0.545646403462648590f, 0.837910872615301170f,
+    -0.545807080893116140f,
+  0.837806200015150940f, -0.545967738255817570f, 0.837701496611261700f,
+    -0.546128375544845950f,
+  0.837596762407483040f, -0.546288992754295210f, 0.837491997407665890f,
+    -0.546449589878259650f,
+  0.837387201615661940f, -0.546610166910834860f, 0.837282375035324320f,
+    -0.546770723846116800f,
+  0.837177517670507300f, -0.546931260678202190f, 0.837072629525066000f,
+    -0.547091777401188530f,
+  0.836967710602857020f, -0.547252274009174090f, 0.836862760907737920f,
+    -0.547412750496257930f,
+  0.836757780443567190f, -0.547573206856539760f, 0.836652769214204950f,
+    -0.547733643084120090f,
+  0.836547727223512010f, -0.547894059173100190f, 0.836442654475350380f,
+    -0.548054455117581880f,
+  0.836337550973583530f, -0.548214830911667780f, 0.836232416722075600f,
+    -0.548375186549461600f,
+  0.836127251724692270f, -0.548535522025067390f, 0.836022055985299880f,
+    -0.548695837332590090f,
+  0.835916829507766360f, -0.548856132466135290f, 0.835811572295960700f,
+    -0.549016407419809390f,
+  0.835706284353752600f, -0.549176662187719660f, 0.835600965685013410f,
+    -0.549336896763974010f,
+  0.835495616293615350f, -0.549497111142680960f, 0.835390236183431890f,
+    -0.549657305317949870f,
+  0.835284825358337370f, -0.549817479283890910f, 0.835179383822207690f,
+    -0.549977633034614890f,
+  0.835073911578919410f, -0.550137766564233630f, 0.834968408632350450f,
+    -0.550297879866859190f,
+  0.834862874986380010f, -0.550457972936604810f, 0.834757310644888230f,
+    -0.550618045767584330f,
+  0.834651715611756440f, -0.550778098353912120f, 0.834546089890866870f,
+    -0.550938130689703880f,
+  0.834440433486103190f, -0.551098142769075430f, 0.834334746401350080f,
+    -0.551258134586143590f,
+  0.834229028640493420f, -0.551418106135026060f, 0.834123280207420100f,
+    -0.551578057409841000f,
+  0.834017501106018130f, -0.551737988404707340f, 0.833911691340176840f,
+    -0.551897899113745210f,
+  0.833805850913786340f, -0.552057789531074980f, 0.833699979830738290f,
+    -0.552217659650817930f,
+  0.833594078094925140f, -0.552377509467096070f, 0.833488145710240770f,
+    -0.552537338974032120f,
+  0.833382182680579730f, -0.552697148165749770f, 0.833276189009838240f,
+    -0.552856937036373290f,
+  0.833170164701913190f, -0.553016705580027470f, 0.833064109760702890f,
+    -0.553176453790838350f,
+  0.832958024190106670f, -0.553336181662932300f, 0.832851907994025090f,
+    -0.553495889190436570f,
+  0.832745761176359460f, -0.553655576367479310f, 0.832639583741012770f,
+    -0.553815243188189090f,
+  0.832533375691888680f, -0.553974889646695500f, 0.832427137032892280f,
+    -0.554134515737128910f,
+  0.832320867767929680f, -0.554294121453620000f, 0.832214567900907980f,
+    -0.554453706790300930f,
+  0.832108237435735590f, -0.554613271741304040f, 0.832001876376321950f,
+    -0.554772816300762470f,
+  0.831895484726577590f, -0.554932340462810370f, 0.831789062490414400f,
+    -0.555091844221582420f,
+  0.831682609671745120f, -0.555251327571213980f, 0.831576126274483740f,
+    -0.555410790505841630f,
+  0.831469612302545240f, -0.555570233019602180f, 0.831363067759845920f,
+    -0.555729655106633410f,
+  0.831256492650303210f, -0.555889056761073810f, 0.831149886977835540f,
+    -0.556048437977062600f,
+  0.831043250746362320f, -0.556207798748739930f, 0.830936583959804410f,
+    -0.556367139070246370f,
+  0.830829886622083570f, -0.556526458935723610f, 0.830723158737122880f,
+    -0.556685758339313890f,
+  0.830616400308846310f, -0.556845037275160100f, 0.830509611341179070f,
+    -0.557004295737405950f,
+  0.830402791838047550f, -0.557163533720196220f, 0.830295941803379070f,
+    -0.557322751217676160f,
+  0.830189061241102370f, -0.557481948223991550f, 0.830082150155146970f,
+    -0.557641124733289420f,
+  0.829975208549443950f, -0.557800280739716990f, 0.829868236427924840f,
+    -0.557959416237422960f,
+  0.829761233794523050f, -0.558118531220556100f, 0.829654200653172640f,
+    -0.558277625683266330f,
+  0.829547137007808910f, -0.558436699619704100f, 0.829440042862368170f,
+    -0.558595753024020760f,
+  0.829332918220788250f, -0.558754785890368310f, 0.829225763087007570f,
+    -0.558913798212899770f,
+  0.829118577464965980f, -0.559072789985768480f, 0.829011361358604430f,
+    -0.559231761203128900f,
+  0.828904114771864870f, -0.559390711859136140f, 0.828796837708690610f,
+    -0.559549641947945760f,
+  0.828689530173025820f, -0.559708551463714680f, 0.828582192168815790f,
+    -0.559867440400600210f,
+  0.828474823700007130f, -0.560026308752760380f, 0.828367424770547480f,
+    -0.560185156514354080f,
+  0.828259995384385660f, -0.560343983679540860f, 0.828152535545471410f,
+    -0.560502790242481060f,
+  0.828045045257755800f, -0.560661576197336030f, 0.827937524525190870f,
+    -0.560820341538267430f,
+  0.827829973351729920f, -0.560979086259438150f, 0.827722391741327220f,
+    -0.561137810355011420f,
+  0.827614779697938400f, -0.561296513819151470f, 0.827507137225519830f,
+    -0.561455196646023280f,
+  0.827399464328029470f, -0.561613858829792420f, 0.827291761009425810f,
+    -0.561772500364625340f,
+  0.827184027273669130f, -0.561931121244689470f, 0.827076263124720270f,
+    -0.562089721464152480f,
+  0.826968468566541600f, -0.562248301017183150f, 0.826860643603096190f,
+    -0.562406859897951140f,
+  0.826752788238348520f, -0.562565398100626560f, 0.826644902476264320f,
+    -0.562723915619380400f,
+  0.826536986320809960f, -0.562882412448384440f, 0.826429039775953500f,
+    -0.563040888581811230f,
+  0.826321062845663530f, -0.563199344013834090f, 0.826213055533910220f,
+    -0.563357778738627020f,
+  0.826105017844664610f, -0.563516192750364800f, 0.825996949781899080f,
+    -0.563674586043223070f,
+  0.825888851349586780f, -0.563832958611378170f, 0.825780722551702430f,
+    -0.563991310449006970f,
+  0.825672563392221390f, -0.564149641550287680f, 0.825564373875120490f,
+    -0.564307951909398640f,
+  0.825456154004377550f, -0.564466241520519500f, 0.825347903783971380f,
+    -0.564624510377830120f,
+  0.825239623217882250f, -0.564782758475511400f, 0.825131312310091070f,
+    -0.564940985807745210f,
+  0.825022971064580220f, -0.565099192368713980f, 0.824914599485333190f,
+    -0.565257378152600800f,
+  0.824806197576334330f, -0.565415543153589660f, 0.824697765341569470f,
+    -0.565573687365865330f,
+  0.824589302785025290f, -0.565731810783613120f, 0.824480809910689500f,
+    -0.565889913401019570f,
+  0.824372286722551250f, -0.566047995212271450f, 0.824263733224600560f,
+    -0.566206056211556730f,
+  0.824155149420828570f, -0.566364096393063840f, 0.824046535315227760f,
+    -0.566522115750982100f,
+  0.823937890911791370f, -0.566680114279501600f, 0.823829216214513990f,
+    -0.566838091972813320f,
+  0.823720511227391430f, -0.566996048825108680f, 0.823611775954420260f,
+    -0.567153984830580100f,
+  0.823503010399598500f, -0.567311899983420800f, 0.823394214566925080f,
+    -0.567469794277824510f,
+  0.823285388460400110f, -0.567627667707986230f, 0.823176532084024860f,
+    -0.567785520268101140f,
+  0.823067645441801670f, -0.567943351952365560f, 0.822958728537734000f,
+    -0.568101162754976460f,
+  0.822849781375826430f, -0.568258952670131490f, 0.822740803960084420f,
+    -0.568416721692029280f,
+  0.822631796294514990f, -0.568574469814869140f, 0.822522758383125940f,
+    -0.568732197032851050f,
+  0.822413690229926390f, -0.568889903340175860f, 0.822304591838926350f,
+    -0.569047588731045110f,
+  0.822195463214137170f, -0.569205253199661200f, 0.822086304359571090f,
+    -0.569362896740227220f,
+  0.821977115279241550f, -0.569520519346947140f, 0.821867895977163250f,
+    -0.569678121014025600f,
+  0.821758646457351750f, -0.569835701735668000f, 0.821649366723823940f,
+    -0.569993261506080540f,
+  0.821540056780597610f, -0.570150800319470300f, 0.821430716631691870f,
+    -0.570308318170044900f,
+  0.821321346281126740f, -0.570465815052012990f, 0.821211945732923550f,
+    -0.570623290959583750f,
+  0.821102514991104650f, -0.570780745886967260f, 0.820993054059693580f,
+    -0.570938179828374360f,
+  0.820883562942714580f, -0.571095592778016690f, 0.820774041644193650f,
+    -0.571252984730106660f,
+  0.820664490168157460f, -0.571410355678857230f, 0.820554908518633890f,
+    -0.571567705618482580f,
+  0.820445296699652050f, -0.571725034543197120f, 0.820335654715241840f,
+    -0.571882342447216590f,
+  0.820225982569434690f, -0.572039629324757050f, 0.820116280266262820f,
+    -0.572196895170035580f,
+  0.820006547809759680f, -0.572354139977269920f, 0.819896785203959810f,
+    -0.572511363740678790f,
+  0.819786992452898990f, -0.572668566454481160f, 0.819677169560613870f,
+    -0.572825748112897550f,
+  0.819567316531142230f, -0.572982908710148560f, 0.819457433368523280f,
+    -0.573140048240455950f,
+  0.819347520076796900f, -0.573297166698042200f, 0.819237576660004520f,
+    -0.573454264077130400f,
+  0.819127603122188240f, -0.573611340371944610f, 0.819017599467391500f,
+    -0.573768395576709560f,
+  0.818907565699658950f, -0.573925429685650750f, 0.818797501823036010f,
+    -0.574082442692994470f,
+  0.818687407841569680f, -0.574239434592967890f, 0.818577283759307610f,
+    -0.574396405379798750f,
+  0.818467129580298660f, -0.574553355047715760f, 0.818356945308593150f,
+    -0.574710283590948330f,
+  0.818246730948242070f, -0.574867191003726740f, 0.818136486503297730f,
+    -0.575024077280281710f,
+  0.818026211977813440f, -0.575180942414845080f, 0.817915907375843850f,
+    -0.575337786401649450f,
+  0.817805572701444270f, -0.575494609234928120f, 0.817695207958671680f,
+    -0.575651410908915140f,
+  0.817584813151583710f, -0.575808191417845340f, 0.817474388284239240f,
+    -0.575964950755954220f,
+  0.817363933360698460f, -0.576121688917478280f, 0.817253448385022340f,
+    -0.576278405896654910f,
+  0.817142933361272970f, -0.576435101687721830f, 0.817032388293513880f,
+    -0.576591776284917760f,
+  0.816921813185809480f, -0.576748429682482410f, 0.816811208042225290f,
+    -0.576905061874655960f,
+  0.816700572866827850f, -0.577061672855679440f, 0.816589907663684890f,
+    -0.577218262619794920f,
+  0.816479212436865390f, -0.577374831161244880f, 0.816368487190439200f,
+    -0.577531378474272720f,
+  0.816257731928477390f, -0.577687904553122800f, 0.816146946655052270f,
+    -0.577844409392039850f,
+  0.816036131374236810f, -0.578000892985269910f, 0.815925286090105510f,
+    -0.578157355327059360f,
+  0.815814410806733780f, -0.578313796411655590f, 0.815703505528198260f,
+    -0.578470216233306630f,
+  0.815592570258576790f, -0.578626614786261430f, 0.815481605001947770f,
+    -0.578782992064769690f,
+  0.815370609762391290f, -0.578939348063081780f, 0.815259584543988280f,
+    -0.579095682775449090f,
+  0.815148529350820830f, -0.579251996196123550f, 0.815037444186972220f,
+    -0.579408288319357870f,
+  0.814926329056526620f, -0.579564559139405630f, 0.814815183963569440f,
+    -0.579720808650521450f,
+  0.814704008912187080f, -0.579877036846960350f, 0.814592803906467270f,
+    -0.580033243722978150f,
+  0.814481568950498610f, -0.580189429272831680f, 0.814370304048371070f,
+    -0.580345593490778300f,
+  0.814259009204175270f, -0.580501736371076490f, 0.814147684422003360f,
+    -0.580657857907985300f,
+  0.814036329705948410f, -0.580813958095764530f, 0.813924945060104600f,
+    -0.580970036928674770f,
+  0.813813530488567190f, -0.581126094400977620f, 0.813702085995432700f,
+    -0.581282130506935000f,
+  0.813590611584798510f, -0.581438145240810170f, 0.813479107260763220f,
+    -0.581594138596866930f,
+  0.813367573027426570f, -0.581750110569369650f, 0.813256008888889380f,
+    -0.581906061152583810f,
+  0.813144414849253590f, -0.582061990340775440f, 0.813032790912622040f,
+    -0.582217898128211670f,
+  0.812921137083098770f, -0.582373784509160110f, 0.812809453364789270f,
+    -0.582529649477889320f,
+  0.812697739761799490f, -0.582685493028668460f, 0.812585996278237130f,
+    -0.582841315155767650f,
+  0.812474222918210480f, -0.582997115853457700f, 0.812362419685829230f,
+    -0.583152895116010430f,
+  0.812250586585203880f, -0.583308652937698290f, 0.812138723620446480f,
+    -0.583464389312794320f,
+  0.812026830795669730f, -0.583620104235572760f, 0.811914908114987790f,
+    -0.583775797700308070f,
+  0.811802955582515470f, -0.583931469701276180f, 0.811690973202369050f,
+    -0.584087120232753440f,
+  0.811578960978665890f, -0.584242749289016980f, 0.811466918915524250f,
+    -0.584398356864344600f,
+  0.811354847017063730f, -0.584553942953015330f, 0.811242745287404810f,
+    -0.584709507549308390f,
+  0.811130613730669190f, -0.584865050647504490f, 0.811018452350979470f,
+    -0.585020572241884530f,
+  0.810906261152459670f, -0.585176072326730410f, 0.810794040139234730f,
+    -0.585331550896324940f,
+  0.810681789315430780f, -0.585487007944951340f, 0.810569508685174630f,
+    -0.585642443466894420f,
+  0.810457198252594770f, -0.585797857456438860f, 0.810344858021820550f,
+    -0.585953249907870570f,
+  0.810232487996982330f, -0.586108620815476430f, 0.810120088182211600f,
+    -0.586263970173543590f,
+  0.810007658581641140f, -0.586419297976360500f, 0.809895199199404450f,
+    -0.586574604218216170f,
+  0.809782710039636530f, -0.586729888893400390f, 0.809670191106473090f,
+    -0.586885151996203950f,
+  0.809557642404051260f, -0.587040393520917970f, 0.809445063936509170f,
+    -0.587195613461834800f,
+  0.809332455707985950f, -0.587350811813247660f, 0.809219817722621750f,
+    -0.587505988569450020f,
+  0.809107149984558240f, -0.587661143724736660f, 0.808994452497937670f,
+    -0.587816277273402910f,
+  0.808881725266903610f, -0.587971389209745010f, 0.808768968295600850f,
+    -0.588126479528059850f,
+  0.808656181588174980f, -0.588281548222645220f, 0.808543365148773010f,
+    -0.588436595287799790f,
+  0.808430518981542720f, -0.588591620717822890f, 0.808317643090633250f,
+    -0.588746624507014540f,
+  0.808204737480194720f, -0.588901606649675720f, 0.808091802154378370f,
+    -0.589056567140108460f,
+  0.807978837117336310f, -0.589211505972614960f, 0.807865842373222120f,
+    -0.589366423141498790f,
+  0.807752817926190360f, -0.589521318641063940f, 0.807639763780396480f,
+    -0.589676192465615420f,
+  0.807526679939997160f, -0.589831044609458790f, 0.807413566409150190f,
+    -0.589985875066900920f,
+  0.807300423192014450f, -0.590140683832248820f, 0.807187250292749960f,
+    -0.590295470899810830f,
+  0.807074047715517610f, -0.590450236263895810f, 0.806960815464479730f,
+    -0.590604979918813330f,
+  0.806847553543799330f, -0.590759701858874160f, 0.806734261957640860f,
+    -0.590914402078389520f,
+  0.806620940710169650f, -0.591069080571671400f, 0.806507589805552260f,
+    -0.591223737333032910f,
+  0.806394209247956240f, -0.591378372356787580f, 0.806280799041550480f,
+    -0.591532985637249990f,
+  0.806167359190504420f, -0.591687577168735430f, 0.806053889698989060f,
+    -0.591842146945560140f,
+  0.805940390571176280f, -0.591996694962040990f, 0.805826861811239300f,
+    -0.592151221212495530f,
+  0.805713303423352230f, -0.592305725691242290f, 0.805599715411690060f,
+    -0.592460208392600830f,
+  0.805486097780429230f, -0.592614669310891130f, 0.805372450533747060f,
+    -0.592769108440434070f,
+  0.805258773675822210f, -0.592923525775551300f, 0.805145067210834230f,
+    -0.593077921310565470f,
+  0.805031331142963660f, -0.593232295039799800f, 0.804917565476392260f,
+    -0.593386646957578480f,
+  0.804803770215302920f, -0.593540977058226390f, 0.804689945363879500f,
+    -0.593695285336069190f,
+  0.804576090926307110f, -0.593849571785433630f, 0.804462206906771840f,
+    -0.594003836400646690f,
+  0.804348293309460780f, -0.594158079176036800f, 0.804234350138562260f,
+    -0.594312300105932830f,
+  0.804120377398265810f, -0.594466499184664430f, 0.804006375092761520f,
+    -0.594620676406562240f,
+  0.803892343226241260f, -0.594774831765957580f, 0.803778281802897570f,
+    -0.594928965257182420f,
+  0.803664190826924090f, -0.595083076874569960f, 0.803550070302515680f,
+    -0.595237166612453850f,
+  0.803435920233868120f, -0.595391234465168730f, 0.803321740625178580f,
+    -0.595545280427049790f,
+  0.803207531480644940f, -0.595699304492433360f, 0.803093292804466400f,
+    -0.595853306655656280f,
+  0.802979024600843250f, -0.596007286911056530f, 0.802864726873976700f,
+    -0.596161245252972540f,
+  0.802750399628069160f, -0.596315181675743710f, 0.802636042867324150f,
+    -0.596469096173710360f,
+  0.802521656595946430f, -0.596622988741213220f, 0.802407240818141300f,
+    -0.596776859372594390f,
+  0.802292795538115720f, -0.596930708062196500f, 0.802178320760077450f,
+    -0.597084534804362740f,
+  0.802063816488235440f, -0.597238339593437420f, 0.801949282726799770f,
+    -0.597392122423765710f,
+  0.801834719479981310f, -0.597545883289693160f, 0.801720126751992330f,
+    -0.597699622185566830f,
+  0.801605504547046150f, -0.597853339105733910f, 0.801490852869356950f,
+    -0.598007034044542700f,
+  0.801376171723140240f, -0.598160706996342270f, 0.801261461112612540f,
+    -0.598314357955482600f,
+  0.801146721041991360f, -0.598467986916314310f, 0.801031951515495330f,
+    -0.598621593873188920f,
+  0.800917152537344300f, -0.598775178820458720f, 0.800802324111759110f,
+    -0.598928741752476900f,
+  0.800687466242961610f, -0.599082282663597310f, 0.800572578935174860f,
+    -0.599235801548174570f,
+  0.800457662192622820f, -0.599389298400564540f, 0.800342716019530660f,
+    -0.599542773215123390f,
+  0.800227740420124790f, -0.599696225986208310f, 0.800112735398632370f,
+    -0.599849656708177250f,
+  0.799997700959281910f, -0.600003065375388940f, 0.799882637106302810f,
+    -0.600156451982203240f,
+  0.799767543843925680f, -0.600309816522980430f, 0.799652421176382240f,
+    -0.600463158992081580f,
+  0.799537269107905010f, -0.600616479383868970f, 0.799422087642728040f,
+    -0.600769777692705230f,
+  0.799306876785086160f, -0.600923053912954090f, 0.799191636539215210f,
+    -0.601076308038980160f,
+  0.799076366909352350f, -0.601229540065148500f, 0.798961067899735760f,
+    -0.601382749985825420f,
+  0.798845739514604580f, -0.601535937795377730f, 0.798730381758199210f,
+    -0.601689103488172950f,
+  0.798614994634760820f, -0.601842247058580030f, 0.798499578148532120f,
+    -0.601995368500968020f,
+  0.798384132303756380f, -0.602148467809707210f, 0.798268657104678430f,
+    -0.602301544979168550f,
+  0.798153152555543750f, -0.602454600003723750f, 0.798037618660599410f,
+    -0.602607632877745440f,
+  0.797922055424093000f, -0.602760643595607220f, 0.797806462850273570f,
+    -0.602913632151683030f,
+  0.797690840943391160f, -0.603066598540348160f, 0.797575189707696700f,
+    -0.603219542755978440f,
+  0.797459509147442460f, -0.603372464792950260f, 0.797343799266881700f,
+    -0.603525364645641550f,
+  0.797228060070268700f, -0.603678242308430370f, 0.797112291561858920f,
+    -0.603831097775695880f,
+  0.796996493745908750f, -0.603983931041818020f, 0.796880666626675780f,
+    -0.604136742101177520f,
+  0.796764810208418830f, -0.604289530948155960f, 0.796648924495397260f,
+    -0.604442297577135860f,
+  0.796533009491872000f, -0.604595041982500360f, 0.796417065202104980f,
+    -0.604747764158633410f,
+  0.796301091630359110f, -0.604900464099919820f, 0.796185088780898440f,
+    -0.605053141800745320f,
+  0.796069056657987990f, -0.605205797255496500f, 0.795952995265893910f,
+    -0.605358430458560530f,
+  0.795836904608883570f, -0.605511041404325550f, 0.795720784691225090f,
+    -0.605663630087180380f,
+  0.795604635517188070f, -0.605816196501514970f, 0.795488457091042990f,
+    -0.605968740641719680f,
+  0.795372249417061310f, -0.606121262502186120f, 0.795256012499515610f,
+    -0.606273762077306430f,
+  0.795139746342679590f, -0.606426239361473550f, 0.795023450950828050f,
+    -0.606578694349081290f,
+  0.794907126328237010f, -0.606731127034524480f, 0.794790772479183170f,
+    -0.606883537412198470f,
+  0.794674389407944550f, -0.607035925476499650f, 0.794557977118800380f,
+    -0.607188291221825160f,
+  0.794441535616030590f, -0.607340634642572930f, 0.794325064903916520f,
+    -0.607492955733141550f,
+  0.794208564986740640f, -0.607645254487930830f, 0.794092035868785960f,
+    -0.607797530901341140f,
+  0.793975477554337170f, -0.607949784967773630f, 0.793858890047679730f,
+    -0.608102016681630440f,
+  0.793742273353100210f, -0.608254226037314490f, 0.793625627474886300f,
+    -0.608406413029229150f,
+  0.793508952417326660f, -0.608558577651779450f, 0.793392248184711100f,
+    -0.608710719899370310f,
+  0.793275514781330630f, -0.608862839766408200f, 0.793158752211477140f,
+    -0.609014937247299830f,
+  0.793041960479443640f, -0.609167012336453210f, 0.792925139589524260f,
+    -0.609319065028276820f,
+  0.792808289546014120f, -0.609471095317180240f, 0.792691410353209450f,
+    -0.609623103197573730f,
+  0.792574502015407690f, -0.609775088663868430f, 0.792457564536907080f,
+    -0.609927051710476120f,
+  0.792340597922007170f, -0.610078992331809620f, 0.792223602175008310f,
+    -0.610230910522282620f,
+  0.792106577300212390f, -0.610382806276309480f, 0.791989523301921850f,
+    -0.610534679588305320f,
+  0.791872440184440470f, -0.610686530452686280f, 0.791755327952073150f,
+    -0.610838358863869170f,
+  0.791638186609125880f, -0.610990164816271660f, 0.791521016159905220f,
+    -0.611141948304312570f,
+  0.791403816608719500f, -0.611293709322410890f, 0.791286587959877830f,
+    -0.611445447864987000f,
+  0.791169330217690200f, -0.611597163926461910f, 0.791052043386467950f,
+    -0.611748857501257290f,
+  0.790934727470523290f, -0.611900528583796070f, 0.790817382474169770f,
+    -0.612052177168501470f,
+  0.790700008401721610f, -0.612203803249797950f, 0.790582605257494460f,
+    -0.612355406822110650f,
+  0.790465173045804880f, -0.612506987879865570f, 0.790347711770970520f,
+    -0.612658546417489290f,
+  0.790230221437310030f, -0.612810082429409710f, 0.790112702049143300f,
+    -0.612961595910055170f,
+  0.789995153610791090f, -0.613113086853854910f, 0.789877576126575280f,
+    -0.613264555255239040f,
+  0.789759969600819070f, -0.613416001108638590f, 0.789642334037846340f,
+    -0.613567424408485330f,
+  0.789524669441982190f, -0.613718825149211720f, 0.789406975817552930f,
+    -0.613870203325251330f,
+  0.789289253168885650f, -0.614021558931038380f, 0.789171501500308900f,
+    -0.614172891961007990f,
+  0.789053720816151880f, -0.614324202409595950f, 0.788935911120745240f,
+    -0.614475490271239040f,
+  0.788818072418420280f, -0.614626755540375050f, 0.788700204713509660f,
+    -0.614777998211442080f,
+  0.788582308010347120f, -0.614929218278879590f, 0.788464382313267540f,
+    -0.615080415737127460f,
+  0.788346427626606340f, -0.615231590580626820f, 0.788228443954700490f,
+    -0.615382742803819220f,
+  0.788110431301888070f, -0.615533872401147320f, 0.787992389672507950f,
+    -0.615684979367054570f,
+  0.787874319070900220f, -0.615836063695985090f, 0.787756219501406060f,
+    -0.615987125382383760f,
+  0.787638090968367450f, -0.616138164420696910f, 0.787519933476127810f,
+    -0.616289180805370980f,
+  0.787401747029031430f, -0.616440174530853650f, 0.787283531631423620f,
+    -0.616591145591593110f,
+  0.787165287287651010f, -0.616742093982038720f, 0.787047014002060790f,
+    -0.616893019696640680f,
+  0.786928711779001810f, -0.617043922729849760f, 0.786810380622823490f,
+    -0.617194803076117630f,
+  0.786692020537876790f, -0.617345660729896830f, 0.786573631528513230f,
+    -0.617496495685640910f,
+  0.786455213599085770f, -0.617647307937803870f, 0.786336766753948260f,
+    -0.617798097480841020f,
+  0.786218290997455660f, -0.617948864309208150f, 0.786099786333963930f,
+    -0.618099608417362000f,
+  0.785981252767830150f, -0.618250329799760250f, 0.785862690303412600f,
+    -0.618401028450860980f,
+  0.785744098945070360f, -0.618551704365123740f, 0.785625478697163700f,
+    -0.618702357537008530f,
+  0.785506829564053930f, -0.618852987960976320f, 0.785388151550103550f,
+    -0.619003595631488660f,
+  0.785269444659675850f, -0.619154180543008410f, 0.785150708897135560f,
+    -0.619304742689998690f,
+  0.785031944266848080f, -0.619455282066924020f, 0.784913150773180020f,
+    -0.619605798668249270f,
+  0.784794328420499230f, -0.619756292488440660f, 0.784675477213174320f,
+    -0.619906763521964720f,
+  0.784556597155575240f, -0.620057211763289100f, 0.784437688252072830f,
+    -0.620207637206882430f,
+  0.784318750507038920f, -0.620358039847213720f, 0.784199783924846570f,
+    -0.620508419678753360f,
+  0.784080788509869950f, -0.620658776695972140f, 0.783961764266484120f,
+    -0.620809110893341900f,
+  0.783842711199065230f, -0.620959422265335180f, 0.783723629311990470f,
+    -0.621109710806425630f,
+  0.783604518609638200f, -0.621259976511087550f, 0.783485379096387820f,
+    -0.621410219373796150f,
+  0.783366210776619720f, -0.621560439389027160f, 0.783247013654715380f,
+    -0.621710636551257690f,
+  0.783127787735057310f, -0.621860810854965360f, 0.783008533022029110f,
+    -0.622010962294628600f,
+  0.782889249520015480f, -0.622161090864726820f, 0.782769937233402050f,
+    -0.622311196559740320f,
+  0.782650596166575730f, -0.622461279374149970f, 0.782531226323924240f,
+    -0.622611339302437730f,
+  0.782411827709836530f, -0.622761376339086350f, 0.782292400328702400f,
+    -0.622911390478579460f,
+  0.782172944184913010f, -0.623061381715401260f, 0.782053459282860300f,
+    -0.623211350044037270f,
+  0.781933945626937630f, -0.623361295458973230f, 0.781814403221538830f,
+    -0.623511217954696440f,
+  0.781694832071059390f, -0.623661117525694530f, 0.781575232179895550f,
+    -0.623810994166456130f,
+  0.781455603552444590f, -0.623960847871470660f, 0.781335946193104870f,
+    -0.624110678635228510f,
+  0.781216260106276090f, -0.624260486452220650f, 0.781096545296358520f,
+    -0.624410271316939270f,
+  0.780976801767753750f, -0.624560033223877210f, 0.780857029524864580f,
+    -0.624709772167528100f,
+  0.780737228572094490f, -0.624859488142386340f, 0.780617398913848400f,
+    -0.625009181142947460f,
+  0.780497540554531910f, -0.625158851163707620f, 0.780377653498552040f,
+    -0.625308498199164010f,
+  0.780257737750316590f, -0.625458122243814360f, 0.780137793314234610f,
+    -0.625607723292157410f,
+  0.780017820194715990f, -0.625757301338692900f, 0.779897818396172000f,
+    -0.625906856377921090f,
+  0.779777787923014550f, -0.626056388404343520f, 0.779657728779656890f,
+    -0.626205897412462130f,
+  0.779537640970513260f, -0.626355383396779990f, 0.779417524499998900f,
+    -0.626504846351800810f,
+  0.779297379372530300f, -0.626654286272029350f, 0.779177205592524680f,
+    -0.626803703151971200f,
+  0.779057003164400630f, -0.626953096986132660f, 0.778936772092577500f,
+    -0.627102467769020900f,
+  0.778816512381475980f, -0.627251815495144080f, 0.778696224035517530f,
+    -0.627401140159011050f,
+  0.778575907059125050f, -0.627550441755131530f, 0.778455561456721900f,
+    -0.627699720278016240f,
+  0.778335187232733210f, -0.627848975722176460f, 0.778214784391584540f,
+    -0.627998208082124700f,
+  0.778094352937702790f, -0.628147417352374000f, 0.777973892875516100f,
+    -0.628296603527438320f,
+  0.777853404209453150f, -0.628445766601832710f, 0.777732886943944050f,
+    -0.628594906570072550f,
+  0.777612341083420030f, -0.628744023426674680f, 0.777491766632313010f,
+    -0.628893117166156480f,
+  0.777371163595056310f, -0.629042187783036000f, 0.777250531976084070f,
+    -0.629191235271832290f,
+  0.777129871779831620f, -0.629340259627065630f, 0.777009183010735290f,
+    -0.629489260843256630f,
+  0.776888465673232440f, -0.629638238914926980f, 0.776767719771761510f,
+    -0.629787193836599200f,
+  0.776646945310762060f, -0.629936125602796440f, 0.776526142294674430f,
+    -0.630085034208043180f,
+  0.776405310727940390f, -0.630233919646864370f, 0.776284450615002510f,
+    -0.630382781913785940f,
+  0.776163561960304340f, -0.630531621003334600f, 0.776042644768290770f,
+    -0.630680436910037940f,
+  0.775921699043407690f, -0.630829229628424470f, 0.775800724790101650f,
+    -0.630977999153023550f,
+  0.775679722012820650f, -0.631126745478365340f, 0.775558690716013580f,
+    -0.631275468598980760f,
+  0.775437630904130540f, -0.631424168509401860f, 0.775316542581622530f,
+    -0.631572845204161020f,
+  0.775195425752941420f, -0.631721498677792260f, 0.775074280422540450f,
+    -0.631870128924829850f,
+  0.774953106594873930f, -0.632018735939809060f, 0.774831904274396850f,
+    -0.632167319717265920f,
+  0.774710673465565550f, -0.632315880251737570f, 0.774589414172837550f,
+    -0.632464417537761840f,
+  0.774468126400670860f, -0.632612931569877410f, 0.774346810153525130f,
+    -0.632761422342624000f,
+  0.774225465435860680f, -0.632909889850541750f, 0.774104092252139050f,
+    -0.633058334088172140f,
+  0.773982690606822900f, -0.633206755050057190f, 0.773861260504375540f,
+    -0.633355152730739950f,
+  0.773739801949261840f, -0.633503527124764320f, 0.773618314945947460f,
+    -0.633651878226674900f,
+  0.773496799498899050f, -0.633800206031017280f, 0.773375255612584470f,
+    -0.633948510532337810f,
+  0.773253683291472590f, -0.634096791725183740f, 0.773132082540033070f,
+    -0.634245049604103330f,
+  0.773010453362736990f, -0.634393284163645490f, 0.772888795764056220f,
+    -0.634541495398360020f,
+  0.772767109748463850f, -0.634689683302797740f, 0.772645395320433860f,
+    -0.634837847871509990f,
+  0.772523652484441330f, -0.634985989099049460f, 0.772401881244962450f,
+    -0.635134106979969190f,
+  0.772280081606474320f, -0.635282201508823420f, 0.772158253573455240f,
+    -0.635430272680167160f,
+  0.772036397150384520f, -0.635578320488556110f, 0.771914512341742350f,
+    -0.635726344928547070f,
+  0.771792599152010150f, -0.635874345994697720f, 0.771670657585670330f,
+    -0.636022323681566300f,
+  0.771548687647206300f, -0.636170277983712170f, 0.771426689341102590f,
+    -0.636318208895695460f,
+  0.771304662671844830f, -0.636466116412077180f, 0.771182607643919330f,
+    -0.636614000527419120f,
+  0.771060524261813820f, -0.636761861236284200f, 0.770938412530016940f,
+    -0.636909698533235870f,
+  0.770816272453018540f, -0.637057512412838590f, 0.770694104035309140f,
+    -0.637205302869657600f,
+  0.770571907281380810f, -0.637353069898259130f, 0.770449682195725960f,
+    -0.637500813493210190f,
+  0.770327428782838890f, -0.637648533649078810f, 0.770205147047214210f,
+    -0.637796230360433540f,
+  0.770082836993347900f, -0.637943903621844060f, 0.769960498625737230f,
+    -0.638091553427880820f,
+  0.769838131948879840f, -0.638239179773115280f, 0.769715736967275130f,
+    -0.638386782652119570f,
+  0.769593313685422940f, -0.638534362059466790f, 0.769470862107824670f,
+    -0.638681917989730730f,
+  0.769348382238982280f, -0.638829450437486290f, 0.769225874083399260f,
+    -0.638976959397309140f,
+  0.769103337645579700f, -0.639124444863775730f, 0.768980772930028870f,
+    -0.639271906831463510f,
+  0.768858179941253270f, -0.639419345294950700f, 0.768735558683760310f,
+    -0.639566760248816310f,
+  0.768612909162058380f, -0.639714151687640450f, 0.768490231380656860f,
+    -0.639861519606003900f,
+  0.768367525344066270f, -0.640008863998488440f, 0.768244791056798330f,
+    -0.640156184859676510f,
+  0.768122028523365420f, -0.640303482184151670f, 0.767999237748281270f,
+    -0.640450755966498140f,
+  0.767876418736060610f, -0.640598006201301030f, 0.767753571491219030f,
+    -0.640745232883146440f,
+  0.767630696018273380f, -0.640892436006621380f, 0.767507792321741270f,
+    -0.641039615566313390f,
+  0.767384860406141730f, -0.641186771556811250f, 0.767261900275994500f,
+    -0.641333903972704290f,
+  0.767138911935820400f, -0.641481012808583160f, 0.767015895390141480f,
+    -0.641628098059038750f,
+  0.766892850643480670f, -0.641775159718663500f, 0.766769777700361920f,
+    -0.641922197782050170f,
+  0.766646676565310380f, -0.642069212243792540f, 0.766523547242852210f,
+    -0.642216203098485370f,
+  0.766400389737514230f, -0.642363170340724320f, 0.766277204053824710f,
+    -0.642510113965105710f,
+  0.766153990196312920f, -0.642657033966226860f, 0.766030748169509000f,
+    -0.642803930338685990f,
+  0.765907477977944340f, -0.642950803077082080f, 0.765784179626150970f,
+    -0.643097652176015110f,
+  0.765660853118662500f, -0.643244477630085850f, 0.765537498460013070f,
+    -0.643391279433895850f,
+  0.765414115654738270f, -0.643538057582047740f, 0.765290704707374370f,
+    -0.643684812069144850f,
+  0.765167265622458960f, -0.643831542889791390f, 0.765043798404530520f,
+    -0.643978250038592660f,
+  0.764920303058128410f, -0.644124933510154540f, 0.764796779587793460f,
+    -0.644271593299083790f,
+  0.764673227998067140f, -0.644418229399988380f, 0.764549648293492150f,
+    -0.644564841807476640f,
+  0.764426040478612070f, -0.644711430516158310f, 0.764302404557971720f,
+    -0.644857995520643710f,
+  0.764178740536116670f, -0.645004536815543930f, 0.764055048417593970f,
+    -0.645151054395471160f,
+  0.763931328206951090f, -0.645297548255038380f, 0.763807579908737160f,
+    -0.645444018388859230f,
+  0.763683803527501870f, -0.645590464791548690f, 0.763559999067796150f,
+    -0.645736887457722290f,
+  0.763436166534172010f, -0.645883286381996320f, 0.763312305931182380f,
+    -0.646029661558988330f,
+  0.763188417263381270f, -0.646176012983316280f, 0.763064500535323710f,
+    -0.646322340649599480f,
+  0.762940555751565720f, -0.646468644552457780f, 0.762816582916664430f,
+    -0.646614924686512050f,
+  0.762692582035177980f, -0.646761181046383920f, 0.762568553111665380f,
+    -0.646907413626696020f,
+  0.762444496150687210f, -0.647053622422071540f, 0.762320411156804270f,
+    -0.647199807427135230f,
+  0.762196298134578900f, -0.647345968636512060f, 0.762072157088574560f,
+    -0.647492106044828100f,
+  0.761947988023355390f, -0.647638219646710310f, 0.761823790943486960f,
+    -0.647784309436786440f,
+  0.761699565853535380f, -0.647930375409685340f, 0.761575312758068000f,
+    -0.648076417560036530f,
+  0.761451031661653620f, -0.648222435882470420f, 0.761326722568861360f,
+    -0.648368430371618290f,
+  0.761202385484261780f, -0.648514401022112440f, 0.761078020412426560f,
+    -0.648660347828585840f,
+  0.760953627357928150f, -0.648806270785672550f, 0.760829206325340010f,
+    -0.648952169888007300f,
+  0.760704757319236920f, -0.649098045130225950f, 0.760580280344194450f,
+    -0.649243896506964900f,
+  0.760455775404789260f, -0.649389724012861660f, 0.760331242505599030f,
+    -0.649535527642554730f,
+  0.760206681651202420f, -0.649681307390683190f, 0.760082092846179340f,
+    -0.649827063251887100f,
+  0.759957476095110330f, -0.649972795220807530f, 0.759832831402577400f,
+    -0.650118503292086200f,
+  0.759708158773163440f, -0.650264187460365850f, 0.759583458211452010f,
+    -0.650409847720290310f,
+  0.759458729722028210f, -0.650555484066503880f, 0.759333973309477940f,
+    -0.650701096493652040f,
+  0.759209188978388070f, -0.650846684996380880f, 0.759084376733346610f,
+    -0.650992249569337660f,
+  0.758959536578942440f, -0.651137790207170330f, 0.758834668519765660f,
+    -0.651283306904527740f,
+  0.758709772560407390f, -0.651428799656059820f, 0.758584848705459610f,
+    -0.651574268456416970f,
+  0.758459896959515430f, -0.651719713300250910f, 0.758334917327168960f,
+    -0.651865134182213920f,
+  0.758209909813015280f, -0.652010531096959500f, 0.758084874421650730f,
+    -0.652155904039141590f,
+  0.757959811157672300f, -0.652301253003415460f, 0.757834720025678310f,
+    -0.652446577984436730f,
+  0.757709601030268080f, -0.652591878976862440f, 0.757584454176041810f,
+    -0.652737155975350310f,
+  0.757459279467600720f, -0.652882408974558850f, 0.757334076909547130f,
+    -0.653027637969147530f,
+  0.757208846506484570f, -0.653172842953776760f, 0.757083588263017140f,
+    -0.653318023923107670f,
+  0.756958302183750490f, -0.653463180871802330f, 0.756832988273290820f,
+    -0.653608313794523890f,
+  0.756707646536245670f, -0.653753422685936060f, 0.756582276977223470f,
+    -0.653898507540703780f,
+  0.756456879600833740f, -0.654043568353492640f, 0.756331454411686920f,
+    -0.654188605118969040f,
+  0.756206001414394540f, -0.654333617831800440f, 0.756080520613569120f,
+    -0.654478606486655350f,
+  0.755955012013824420f, -0.654623571078202680f, 0.755829475619774760f,
+    -0.654768511601112600f,
+  0.755703911436035880f, -0.654913428050056030f, 0.755578319467224540f,
+    -0.655058320419704910f,
+  0.755452699717958250f, -0.655203188704731820f, 0.755327052192855670f,
+    -0.655348032899810470f,
+  0.755201376896536550f, -0.655492852999615350f, 0.755075673833621620f,
+    -0.655637648998821820f,
+  0.754949943008732640f, -0.655782420892106030f, 0.754824184426492350f,
+    -0.655927168674145360f,
+  0.754698398091524500f, -0.656071892339617600f, 0.754572584008453840f,
+    -0.656216591883201920f,
+  0.754446742181906440f, -0.656361267299578000f, 0.754320872616508820f,
+    -0.656505918583426550f,
+  0.754194975316889170f, -0.656650545729428940f, 0.754069050287676120f,
+    -0.656795148732268070f,
+  0.753943097533499640f, -0.656939727586627110f, 0.753817117058990790f,
+    -0.657084282287190180f,
+  0.753691108868781210f, -0.657228812828642540f, 0.753565072967504300f,
+    -0.657373319205670210f,
+  0.753439009359793580f, -0.657517801412960120f, 0.753312918050284330f,
+    -0.657662259445200070f,
+  0.753186799043612520f, -0.657806693297078640f, 0.753060652344415100f,
+    -0.657951102963285520f,
+  0.752934477957330150f, -0.658095488438511180f, 0.752808275886996950f,
+    -0.658239849717446870f,
+  0.752682046138055340f, -0.658384186794785050f, 0.752555788715146390f,
+    -0.658528499665218650f,
+  0.752429503622912390f, -0.658672788323441890f, 0.752303190865996400f,
+    -0.658817052764149480f,
+  0.752176850449042810f, -0.658961292982037320f, 0.752050482376696360f,
+    -0.659105508971802090f,
+  0.751924086653603550f, -0.659249700728141490f, 0.751797663284411550f,
+    -0.659393868245753860f,
+  0.751671212273768430f, -0.659538011519338660f, 0.751544733626323680f,
+    -0.659682130543596150f,
+  0.751418227346727470f, -0.659826225313227320f, 0.751291693439630870f,
+    -0.659970295822934540f,
+  0.751165131909686480f, -0.660114342067420480f, 0.751038542761547360f,
+    -0.660258364041389050f,
+  0.750911925999867890f, -0.660402361739545030f, 0.750785281629303690f,
+    -0.660546335156593890f,
+  0.750658609654510700f, -0.660690284287242300f, 0.750531910080146410f,
+    -0.660834209126197610f,
+  0.750405182910869330f, -0.660978109668168060f, 0.750278428151338720f,
+    -0.661121985907862860f,
+  0.750151645806215070f, -0.661265837839992270f, 0.750024835880159780f,
+    -0.661409665459266940f,
+  0.749897998377835330f, -0.661553468760398890f, 0.749771133303905100f,
+    -0.661697247738101010f,
+  0.749644240663033480f, -0.661841002387086870f, 0.749517320459886170f,
+    -0.661984732702070920f,
+  0.749390372699129560f, -0.662128438677768720f, 0.749263397385431130f,
+    -0.662272120308896590f,
+  0.749136394523459370f, -0.662415777590171780f, 0.749009364117883880f,
+    -0.662559410516312290f,
+  0.748882306173375150f, -0.662703019082037440f, 0.748755220694604760f,
+    -0.662846603282066900f,
+  0.748628107686245440f, -0.662990163111121470f, 0.748500967152970430f,
+    -0.663133698563923010f,
+  0.748373799099454560f, -0.663277209635194100f, 0.748246603530373420f,
+    -0.663420696319658280f,
+  0.748119380450403600f, -0.663564158612039770f, 0.747992129864222700f,
+    -0.663707596507064010f,
+  0.747864851776509410f, -0.663851009999457340f, 0.747737546191943330f,
+    -0.663994399083946640f,
+  0.747610213115205150f, -0.664137763755260010f, 0.747482852550976570f,
+    -0.664281104008126230f,
+  0.747355464503940190f, -0.664424419837275180f, 0.747228048978779920f,
+    -0.664567711237437520f,
+  0.747100605980180130f, -0.664710978203344790f, 0.746973135512826850f,
+    -0.664854220729729660f,
+  0.746845637581406540f, -0.664997438811325340f, 0.746718112190607130f,
+    -0.665140632442866140f,
+  0.746590559345117310f, -0.665283801619087180f, 0.746462979049626770f,
+    -0.665426946334724660f,
+  0.746335371308826320f, -0.665570066584515450f, 0.746207736127407760f,
+    -0.665713162363197550f,
+  0.746080073510063780f, -0.665856233665509720f, 0.745952383461488290f,
+    -0.665999280486191500f,
+  0.745824665986376090f, -0.666142302819983540f, 0.745696921089422760f,
+    -0.666285300661627280f,
+  0.745569148775325430f, -0.666428274005865240f, 0.745441349048781680f,
+    -0.666571222847440640f,
+  0.745313521914490520f, -0.666714147181097670f, 0.745185667377151640f,
+    -0.666857047001581220f,
+  0.745057785441466060f, -0.666999922303637470f, 0.744929876112135350f,
+    -0.667142773082013310f,
+  0.744801939393862630f, -0.667285599331456370f, 0.744673975291351710f,
+    -0.667428401046715520f,
+  0.744545983809307370f, -0.667571178222540310f, 0.744417964952435620f,
+    -0.667713930853681030f,
+  0.744289918725443260f, -0.667856658934889320f, 0.744161845133038180f,
+    -0.667999362460917400f,
+  0.744033744179929290f, -0.668142041426518450f, 0.743905615870826490f,
+    -0.668284695826446670f,
+  0.743777460210440890f, -0.668427325655456820f, 0.743649277203484060f,
+    -0.668569930908304970f,
+  0.743521066854669120f, -0.668712511579747980f, 0.743392829168709970f,
+    -0.668855067664543610f,
+  0.743264564150321600f, -0.668997599157450270f, 0.743136271804219820f,
+    -0.669140106053227600f,
+  0.743007952135121720f, -0.669282588346636010f, 0.742879605147745200f,
+    -0.669425046032436910f,
+  0.742751230846809050f, -0.669567479105392490f, 0.742622829237033490f,
+    -0.669709887560265840f,
+  0.742494400323139180f, -0.669852271391821020f, 0.742365944109848460f,
+    -0.669994630594823000f,
+  0.742237460601884000f, -0.670136965164037650f, 0.742108949803969910f,
+    -0.670279275094231800f,
+  0.741980411720831070f, -0.670421560380173090f, 0.741851846357193480f,
+    -0.670563821016630040f,
+  0.741723253717784140f, -0.670706056998372160f, 0.741594633807331150f,
+    -0.670848268320169640f,
+  0.741465986630563290f, -0.670990454976794220f, 0.741337312192210660f,
+    -0.671132616963017740f,
+  0.741208610497004260f, -0.671274754273613490f, 0.741079881549676080f,
+    -0.671416866903355450f,
+  0.740951125354959110f, -0.671558954847018330f, 0.740822341917587330f,
+    -0.671701018099378320f,
+  0.740693531242295760f, -0.671843056655211930f, 0.740564693333820250f,
+    -0.671985070509296900f,
+  0.740435828196898020f, -0.672127059656411730f, 0.740306935836266940f,
+    -0.672269024091335930f,
+  0.740178016256666240f, -0.672410963808849790f, 0.740049069462835550f,
+    -0.672552878803734710f,
+  0.739920095459516200f, -0.672694769070772860f, 0.739791094251449950f,
+    -0.672836634604747300f,
+  0.739662065843380010f, -0.672978475400442090f, 0.739533010240050250f,
+    -0.673120291452642070f,
+  0.739403927446205760f, -0.673262082756132970f, 0.739274817466592520f,
+    -0.673403849305701740f,
+  0.739145680305957510f, -0.673545591096136100f, 0.739016515969048720f,
+    -0.673687308122224330f,
+  0.738887324460615110f, -0.673829000378756040f, 0.738758105785406900f,
+    -0.673970667860521620f,
+  0.738628859948174840f, -0.674112310562312360f, 0.738499586953671130f,
+    -0.674253928478920410f,
+  0.738370286806648620f, -0.674395521605139050f, 0.738240959511861310f,
+    -0.674537089935762000f,
+  0.738111605074064260f, -0.674678633465584540f, 0.737982223498013570f,
+    -0.674820152189402170f,
+  0.737852814788465980f, -0.674961646102011930f, 0.737723378950179700f,
+    -0.675103115198211420f,
+  0.737593915987913570f, -0.675244559472799270f, 0.737464425906427580f,
+    -0.675385978920574840f,
+  0.737334908710482910f, -0.675527373536338520f, 0.737205364404841190f,
+    -0.675668743314891910f,
+  0.737075792994265730f, -0.675810088251036940f, 0.736946194483520280f,
+    -0.675951408339577010f,
+  0.736816568877369900f, -0.676092703575315920f, 0.736686916180580460f,
+    -0.676233973953058950f,
+  0.736557236397919150f, -0.676375219467611590f, 0.736427529534153690f,
+    -0.676516440113781090f,
+  0.736297795594053170f, -0.676657635886374950f, 0.736168034582387330f,
+    -0.676798806780201770f,
+  0.736038246503927350f, -0.676939952790071130f, 0.735908431363445190f,
+    -0.677081073910793530f,
+  0.735778589165713590f, -0.677222170137180330f, 0.735648719915506510f,
+    -0.677363241464043920f,
+  0.735518823617598900f, -0.677504287886197430f, 0.735388900276766730f,
+    -0.677645309398454910f,
+  0.735258949897786840f, -0.677786305995631500f, 0.735128972485437180f,
+    -0.677927277672543020f,
+  0.734998968044496710f, -0.678068224424006600f, 0.734868936579745170f,
+    -0.678209146244839860f,
+  0.734738878095963500f, -0.678350043129861470f, 0.734608792597933550f,
+    -0.678490915073891140f,
+  0.734478680090438370f, -0.678631762071749360f, 0.734348540578261600f,
+    -0.678772584118257690f,
+  0.734218374066188280f, -0.678913381208238410f, 0.734088180559004040f,
+    -0.679054153336514870f,
+  0.733957960061495940f, -0.679194900497911200f, 0.733827712578451700f,
+    -0.679335622687252560f,
+  0.733697438114660370f, -0.679476319899364970f, 0.733567136674911360f,
+    -0.679616992129075560f,
+  0.733436808263995710f, -0.679757639371212030f, 0.733306452886705260f,
+    -0.679898261620603290f,
+  0.733176070547832740f, -0.680038858872078930f, 0.733045661252172080f,
+    -0.680179431120469750f,
+  0.732915225004517780f, -0.680319978360607200f, 0.732784761809665790f,
+    -0.680460500587323880f,
+  0.732654271672412820f, -0.680600997795453020f, 0.732523754597556700f,
+    -0.680741469979829090f,
+  0.732393210589896040f, -0.680881917135287230f, 0.732262639654230770f,
+    -0.681022339256663670f,
+  0.732132041795361290f, -0.681162736338795430f, 0.732001417018089630f,
+    -0.681303108376520530f,
+  0.731870765327218290f, -0.681443455364677870f, 0.731740086727550980f,
+    -0.681583777298107480f,
+  0.731609381223892630f, -0.681724074171649710f, 0.731478648821048520f,
+    -0.681864345980146670f,
+  0.731347889523825570f, -0.682004592718440830f, 0.731217103337031270f,
+    -0.682144814381375640f,
+  0.731086290265474340f, -0.682285010963795570f, 0.730955450313964360f,
+    -0.682425182460546060f,
+  0.730824583487312160f, -0.682565328866473250f, 0.730693689790329000f,
+    -0.682705450176424590f,
+  0.730562769227827590f, -0.682845546385248080f, 0.730431821804621520f,
+    -0.682985617487792740f,
+  0.730300847525525490f, -0.683125663478908680f, 0.730169846395354870f,
+    -0.683265684353446700f,
+  0.730038818418926260f, -0.683405680106258680f, 0.729907763601057140f,
+    -0.683545650732197530f,
+  0.729776681946566090f, -0.683685596226116580f, 0.729645573460272480f,
+    -0.683825516582870720f,
+  0.729514438146997010f, -0.683965411797315400f, 0.729383276011561050f,
+    -0.684105281864307080f,
+  0.729252087058786970f, -0.684245126778703080f, 0.729120871293498230f,
+    -0.684384946535361750f,
+  0.728989628720519420f, -0.684524741129142300f, 0.728858359344675800f,
+    -0.684664510554904960f,
+  0.728727063170793830f, -0.684804254807510620f, 0.728595740203700770f,
+    -0.684943973881821490f,
+  0.728464390448225200f, -0.685083667772700360f, 0.728333013909196360f,
+    -0.685223336475011210f,
+  0.728201610591444610f, -0.685362979983618730f, 0.728070180499801210f,
+    -0.685502598293388550f,
+  0.727938723639098620f, -0.685642191399187470f, 0.727807240014169960f,
+    -0.685781759295883030f,
+  0.727675729629849610f, -0.685921301978343560f, 0.727544192490972800f,
+    -0.686060819441438710f,
+  0.727412628602375770f, -0.686200311680038590f, 0.727281037968895870f,
+    -0.686339778689014520f,
+  0.727149420595371020f, -0.686479220463238950f, 0.727017776486640680f,
+    -0.686618636997584630f,
+  0.726886105647544970f, -0.686758028286925890f, 0.726754408082925020f,
+    -0.686897394326137610f,
+  0.726622683797622850f, -0.687036735110095660f, 0.726490932796481910f,
+    -0.687176050633676820f,
+  0.726359155084346010f, -0.687315340891759050f, 0.726227350666060370f,
+    -0.687454605879221030f,
+  0.726095519546471000f, -0.687593845590942170f, 0.725963661730424930f,
+    -0.687733060021803230f,
+  0.725831777222770370f, -0.687872249166685550f, 0.725699866028356120f,
+    -0.688011413020471640f,
+  0.725567928152032300f, -0.688150551578044830f, 0.725435963598649810f,
+    -0.688289664834289330f,
+  0.725303972373060770f, -0.688428752784090440f, 0.725171954480117950f,
+    -0.688567815422334250f,
+  0.725039909924675370f, -0.688706852743907750f, 0.724907838711587820f,
+    -0.688845864743699020f,
+  0.724775740845711280f, -0.688984851416597040f, 0.724643616331902550f,
+    -0.689123812757491570f,
+  0.724511465175019630f, -0.689262748761273470f, 0.724379287379921190f,
+    -0.689401659422834270f,
+  0.724247082951467000f, -0.689540544737066830f, 0.724114851894517850f,
+    -0.689679404698864800f,
+  0.723982594213935520f, -0.689818239303122470f, 0.723850309914582880f,
+    -0.689957048544735390f,
+  0.723717999001323500f, -0.690095832418599950f, 0.723585661479022150f,
+    -0.690234590919613370f,
+  0.723453297352544380f, -0.690373324042674040f, 0.723320906626756970f,
+    -0.690512031782681060f,
+  0.723188489306527460f, -0.690650714134534600f, 0.723056045396724410f,
+    -0.690789371093135650f,
+  0.722923574902217700f, -0.690928002653386160f, 0.722791077827877550f,
+    -0.691066608810189220f,
+  0.722658554178575610f, -0.691205189558448450f, 0.722526003959184540f,
+    -0.691343744893068710f,
+  0.722393427174577550f, -0.691482274808955850f, 0.722260823829629310f,
+    -0.691620779301016290f,
+  0.722128193929215350f, -0.691759258364157750f, 0.721995537478211880f,
+    -0.691897711993288760f,
+  0.721862854481496340f, -0.692036140183318720f, 0.721730144943947160f,
+    -0.692174542929158140f,
+  0.721597408870443770f, -0.692312920225718220f, 0.721464646265866370f,
+    -0.692451272067911130f,
+  0.721331857135096290f, -0.692589598450650380f, 0.721199041483015720f,
+    -0.692727899368849820f,
+  0.721066199314508110f, -0.692866174817424630f, 0.720933330634457530f,
+    -0.693004424791290870f,
+  0.720800435447749190f, -0.693142649285365400f, 0.720667513759269520f,
+    -0.693280848294566040f,
+  0.720534565573905270f, -0.693419021813811760f, 0.720401590896544760f,
+    -0.693557169838022290f,
+  0.720268589732077190f, -0.693695292362118240f, 0.720135562085392420f,
+    -0.693833389381021350f,
+  0.720002507961381650f, -0.693971460889654000f, 0.719869427364936860f,
+    -0.694109506882939820f,
+  0.719736320300951030f, -0.694247527355803310f, 0.719603186774318120f,
+    -0.694385522303169740f,
+  0.719470026789932990f, -0.694523491719965520f, 0.719336840352691740f,
+    -0.694661435601117820f,
+  0.719203627467491220f, -0.694799353941554900f, 0.719070388139229190f,
+    -0.694937246736205830f,
+  0.718937122372804490f, -0.695075113980000880f, 0.718803830173116890f,
+    -0.695212955667870780f,
+  0.718670511545067230f, -0.695350771794747690f, 0.718537166493557370f,
+    -0.695488562355564440f,
+  0.718403795023489830f, -0.695626327345254870f, 0.718270397139768260f,
+    -0.695764066758753690f,
+  0.718136972847297490f, -0.695901780590996830f, 0.718003522150983180f,
+    -0.696039468836920690f,
+  0.717870045055731710f, -0.696177131491462990f, 0.717736541566450950f,
+    -0.696314768549562090f,
+  0.717603011688049080f, -0.696452380006157830f, 0.717469455425435830f,
+    -0.696589965856190370f,
+  0.717335872783521730f, -0.696727526094601200f, 0.717202263767218070f,
+    -0.696865060716332470f,
+  0.717068628381437480f, -0.697002569716327460f, 0.716934966631093130f,
+    -0.697140053089530420f,
+  0.716801278521099540f, -0.697277510830886520f, 0.716667564056371890f,
+    -0.697414942935341790f,
+  0.716533823241826680f, -0.697552349397843160f, 0.716400056082381000f,
+    -0.697689730213338800f,
+  0.716266262582953120f, -0.697827085376777290f, 0.716132442748462330f,
+    -0.697964414883108670f,
+  0.715998596583828690f, -0.698101718727283770f, 0.715864724093973500f,
+    -0.698238996904254280f,
+  0.715730825283818590f, -0.698376249408972920f, 0.715596900158287470f,
+    -0.698513476236393040f,
+  0.715462948722303760f, -0.698650677381469460f, 0.715328970980792620f,
+    -0.698787852839157670f,
+  0.715194966938680120f, -0.698925002604414150f, 0.715060936600893090f,
+    -0.699062126672196140f,
+  0.714926879972359490f, -0.699199225037462120f, 0.714792797058008240f,
+    -0.699336297695171140f,
+  0.714658687862769090f, -0.699473344640283770f, 0.714524552391572860f,
+    -0.699610365867761040f,
+  0.714390390649351390f, -0.699747361372564990f, 0.714256202641037510f,
+    -0.699884331149658760f,
+  0.714121988371564820f, -0.700021275194006250f, 0.713987747845867830f,
+    -0.700158193500572730f,
+  0.713853481068882470f, -0.700295086064323780f, 0.713719188045545240f,
+    -0.700431952880226420f,
+  0.713584868780793640f, -0.700568793943248340f, 0.713450523279566260f,
+    -0.700705609248358450f,
+  0.713316151546802610f, -0.700842398790526120f, 0.713181753587443180f,
+    -0.700979162564722370f,
+  0.713047329406429340f, -0.701115900565918660f, 0.712912879008703480f,
+    -0.701252612789087460f,
+  0.712778402399208980f, -0.701389299229202230f, 0.712643899582890210f,
+    -0.701525959881237340f,
+  0.712509370564692320f, -0.701662594740168450f, 0.712374815349561710f,
+    -0.701799203800971720f,
+  0.712240233942445510f, -0.701935787058624360f, 0.712105626348291890f,
+    -0.702072344508104630f,
+  0.711970992572050100f, -0.702208876144391870f, 0.711836332618670080f,
+    -0.702345381962465880f,
+  0.711701646493102970f, -0.702481861957308000f, 0.711566934200300700f,
+    -0.702618316123900130f,
+  0.711432195745216430f, -0.702754744457225300f, 0.711297431132803970f,
+    -0.702891146952267400f,
+  0.711162640368018350f, -0.703027523604011220f, 0.711027823455815280f,
+    -0.703163874407442770f,
+  0.710892980401151680f, -0.703300199357548730f, 0.710758111208985350f,
+    -0.703436498449316660f,
+  0.710623215884275020f, -0.703572771677735580f, 0.710488294431980470f,
+    -0.703709019037794810f,
+  0.710353346857062420f, -0.703845240524484940f, 0.710218373164482220f,
+    -0.703981436132797620f,
+  0.710083373359202800f, -0.704117605857725310f, 0.709948347446187400f,
+    -0.704253749694261470f,
+  0.709813295430400840f, -0.704389867637400410f, 0.709678217316808580f,
+    -0.704525959682137380f,
+  0.709543113110376770f, -0.704662025823468820f, 0.709407982816072980f,
+    -0.704798066056391950f,
+  0.709272826438865690f, -0.704934080375904880f, 0.709137643983724030f,
+    -0.705070068777006840f,
+  0.709002435455618250f, -0.705206031254697830f, 0.708867200859519820f,
+    -0.705341967803978840f,
+  0.708731940200400650f, -0.705477878419852100f, 0.708596653483234080f,
+    -0.705613763097320490f,
+  0.708461340712994160f, -0.705749621831387790f, 0.708326001894655890f,
+    -0.705885454617058980f,
+  0.708190637033195400f, -0.706021261449339740f, 0.708055246133589500f,
+    -0.706157042323237060f,
+  0.707919829200816310f, -0.706292797233758480f, 0.707784386239854620f,
+    -0.706428526175912790f,
+  0.707648917255684350f, -0.706564229144709510f, 0.707513422253286280f,
+    -0.706699906135159430f,
+  0.707377901237642100f, -0.706835557142273750f, 0.707242354213734710f,
+    -0.706971182161065360f,
+  0.707106781186547570f, -0.707106781186547460f, 0.706971182161065360f,
+    -0.707242354213734600f,
+  0.706835557142273860f, -0.707377901237642100f, 0.706699906135159430f,
+    -0.707513422253286170f,
+  0.706564229144709620f, -0.707648917255684350f, 0.706428526175912790f,
+    -0.707784386239854620f,
+  0.706292797233758480f, -0.707919829200816310f, 0.706157042323237060f,
+    -0.708055246133589500f,
+  0.706021261449339740f, -0.708190637033195290f, 0.705885454617058980f,
+    -0.708326001894655780f,
+  0.705749621831387790f, -0.708461340712994050f, 0.705613763097320490f,
+    -0.708596653483234080f,
+  0.705477878419852210f, -0.708731940200400650f, 0.705341967803978950f,
+    -0.708867200859519820f,
+  0.705206031254697830f, -0.709002435455618250f, 0.705070068777006840f,
+    -0.709137643983723920f,
+  0.704934080375904990f, -0.709272826438865580f, 0.704798066056391950f,
+    -0.709407982816072980f,
+  0.704662025823468930f, -0.709543113110376770f, 0.704525959682137380f,
+    -0.709678217316808470f,
+  0.704389867637400410f, -0.709813295430400840f, 0.704253749694261580f,
+    -0.709948347446187400f,
+  0.704117605857725430f, -0.710083373359202690f, 0.703981436132797730f,
+    -0.710218373164482220f,
+  0.703845240524484940f, -0.710353346857062310f, 0.703709019037794810f,
+    -0.710488294431980470f,
+  0.703572771677735580f, -0.710623215884275020f, 0.703436498449316770f,
+    -0.710758111208985350f,
+  0.703300199357548730f, -0.710892980401151680f, 0.703163874407442770f,
+    -0.711027823455815280f,
+  0.703027523604011220f, -0.711162640368018350f, 0.702891146952267400f,
+    -0.711297431132803970f,
+  0.702754744457225300f, -0.711432195745216430f, 0.702618316123900130f,
+    -0.711566934200300700f,
+  0.702481861957308000f, -0.711701646493102970f, 0.702345381962465880f,
+    -0.711836332618670080f,
+  0.702208876144391870f, -0.711970992572049990f, 0.702072344508104740f,
+    -0.712105626348291890f,
+  0.701935787058624360f, -0.712240233942445510f, 0.701799203800971720f,
+    -0.712374815349561710f,
+  0.701662594740168570f, -0.712509370564692320f, 0.701525959881237450f,
+    -0.712643899582890210f,
+  0.701389299229202230f, -0.712778402399208870f, 0.701252612789087460f,
+    -0.712912879008703370f,
+  0.701115900565918660f, -0.713047329406429230f, 0.700979162564722480f,
+    -0.713181753587443070f,
+  0.700842398790526230f, -0.713316151546802610f, 0.700705609248358450f,
+    -0.713450523279566150f,
+  0.700568793943248450f, -0.713584868780793520f, 0.700431952880226420f,
+    -0.713719188045545130f,
+  0.700295086064323780f, -0.713853481068882470f, 0.700158193500572730f,
+    -0.713987747845867830f,
+  0.700021275194006360f, -0.714121988371564710f, 0.699884331149658760f,
+    -0.714256202641037400f,
+  0.699747361372564990f, -0.714390390649351390f, 0.699610365867761040f,
+    -0.714524552391572860f,
+  0.699473344640283770f, -0.714658687862768980f, 0.699336297695171250f,
+    -0.714792797058008130f,
+  0.699199225037462120f, -0.714926879972359370f, 0.699062126672196140f,
+    -0.715060936600892980f,
+  0.698925002604414150f, -0.715194966938680010f, 0.698787852839157790f,
+    -0.715328970980792620f,
+  0.698650677381469580f, -0.715462948722303650f, 0.698513476236393040f,
+    -0.715596900158287360f,
+  0.698376249408972920f, -0.715730825283818590f, 0.698238996904254390f,
+    -0.715864724093973390f,
+  0.698101718727283880f, -0.715998596583828690f, 0.697964414883108790f,
+    -0.716132442748462330f,
+  0.697827085376777290f, -0.716266262582953120f, 0.697689730213338800f,
+    -0.716400056082380890f,
+  0.697552349397843270f, -0.716533823241826570f, 0.697414942935341790f,
+    -0.716667564056371890f,
+  0.697277510830886630f, -0.716801278521099540f, 0.697140053089530530f,
+    -0.716934966631093130f,
+  0.697002569716327460f, -0.717068628381437480f, 0.696865060716332470f,
+    -0.717202263767218070f,
+  0.696727526094601200f, -0.717335872783521730f, 0.696589965856190370f,
+    -0.717469455425435830f,
+  0.696452380006157830f, -0.717603011688049080f, 0.696314768549562200f,
+    -0.717736541566450840f,
+  0.696177131491462990f, -0.717870045055731710f, 0.696039468836920690f,
+    -0.718003522150983060f,
+  0.695901780590996830f, -0.718136972847297490f, 0.695764066758753800f,
+    -0.718270397139768260f,
+  0.695626327345254870f, -0.718403795023489720f, 0.695488562355564440f,
+    -0.718537166493557370f,
+  0.695350771794747800f, -0.718670511545067230f, 0.695212955667870890f,
+    -0.718803830173116890f,
+  0.695075113980000880f, -0.718937122372804380f, 0.694937246736205940f,
+    -0.719070388139229190f,
+  0.694799353941554900f, -0.719203627467491220f, 0.694661435601117930f,
+    -0.719336840352691740f,
+  0.694523491719965520f, -0.719470026789932990f, 0.694385522303169860f,
+    -0.719603186774318000f,
+  0.694247527355803310f, -0.719736320300951030f, 0.694109506882939820f,
+    -0.719869427364936860f,
+  0.693971460889654000f, -0.720002507961381650f, 0.693833389381021350f,
+    -0.720135562085392310f,
+  0.693695292362118350f, -0.720268589732077080f, 0.693557169838022400f,
+    -0.720401590896544760f,
+  0.693419021813811880f, -0.720534565573905270f, 0.693280848294566150f,
+    -0.720667513759269410f,
+  0.693142649285365510f, -0.720800435447749190f, 0.693004424791290870f,
+    -0.720933330634457530f,
+  0.692866174817424740f, -0.721066199314508110f, 0.692727899368849820f,
+    -0.721199041483015720f,
+  0.692589598450650380f, -0.721331857135096180f, 0.692451272067911240f,
+    -0.721464646265866370f,
+  0.692312920225718220f, -0.721597408870443660f, 0.692174542929158140f,
+    -0.721730144943947160f,
+  0.692036140183318830f, -0.721862854481496340f, 0.691897711993288760f,
+    -0.721995537478211880f,
+  0.691759258364157750f, -0.722128193929215350f, 0.691620779301016400f,
+    -0.722260823829629310f,
+  0.691482274808955850f, -0.722393427174577550f, 0.691343744893068820f,
+    -0.722526003959184430f,
+  0.691205189558448450f, -0.722658554178575610f, 0.691066608810189220f,
+    -0.722791077827877550f,
+  0.690928002653386280f, -0.722923574902217700f, 0.690789371093135760f,
+    -0.723056045396724410f,
+  0.690650714134534720f, -0.723188489306527350f, 0.690512031782681170f,
+    -0.723320906626756850f,
+  0.690373324042674040f, -0.723453297352544380f, 0.690234590919613370f,
+    -0.723585661479022040f,
+  0.690095832418599950f, -0.723717999001323390f, 0.689957048544735390f,
+    -0.723850309914582880f,
+  0.689818239303122470f, -0.723982594213935520f, 0.689679404698864800f,
+    -0.724114851894517850f,
+  0.689540544737066940f, -0.724247082951466890f, 0.689401659422834380f,
+    -0.724379287379921080f,
+  0.689262748761273470f, -0.724511465175019520f, 0.689123812757491680f,
+    -0.724643616331902550f,
+  0.688984851416597150f, -0.724775740845711280f, 0.688845864743699130f,
+    -0.724907838711587820f,
+  0.688706852743907750f, -0.725039909924675370f, 0.688567815422334360f,
+    -0.725171954480117840f,
+  0.688428752784090550f, -0.725303972373060660f, 0.688289664834289440f,
+    -0.725435963598649810f,
+  0.688150551578044830f, -0.725567928152032300f, 0.688011413020471640f,
+    -0.725699866028356120f,
+  0.687872249166685550f, -0.725831777222770370f, 0.687733060021803230f,
+    -0.725963661730424930f,
+  0.687593845590942170f, -0.726095519546470890f, 0.687454605879221030f,
+    -0.726227350666060260f,
+  0.687315340891759160f, -0.726359155084346010f, 0.687176050633676930f,
+    -0.726490932796481910f,
+  0.687036735110095660f, -0.726622683797622850f, 0.686897394326137610f,
+    -0.726754408082924910f,
+  0.686758028286925890f, -0.726886105647544970f, 0.686618636997584740f,
+    -0.727017776486640680f,
+  0.686479220463238950f, -0.727149420595371020f, 0.686339778689014630f,
+    -0.727281037968895760f,
+  0.686200311680038700f, -0.727412628602375770f, 0.686060819441438710f,
+    -0.727544192490972800f,
+  0.685921301978343670f, -0.727675729629849610f, 0.685781759295883030f,
+    -0.727807240014169960f,
+  0.685642191399187470f, -0.727938723639098620f, 0.685502598293388670f,
+    -0.728070180499801210f,
+  0.685362979983618730f, -0.728201610591444500f, 0.685223336475011210f,
+    -0.728333013909196360f,
+  0.685083667772700360f, -0.728464390448225200f, 0.684943973881821490f,
+    -0.728595740203700770f,
+  0.684804254807510620f, -0.728727063170793720f, 0.684664510554904960f,
+    -0.728858359344675690f,
+  0.684524741129142300f, -0.728989628720519310f, 0.684384946535361750f,
+    -0.729120871293498230f,
+  0.684245126778703080f, -0.729252087058786970f, 0.684105281864307080f,
+    -0.729383276011561050f,
+  0.683965411797315510f, -0.729514438146996900f, 0.683825516582870830f,
+    -0.729645573460272480f,
+  0.683685596226116690f, -0.729776681946565970f, 0.683545650732197530f,
+    -0.729907763601057140f,
+  0.683405680106258790f, -0.730038818418926150f, 0.683265684353446700f,
+    -0.730169846395354870f,
+  0.683125663478908800f, -0.730300847525525380f, 0.682985617487792850f,
+    -0.730431821804621520f,
+  0.682845546385248080f, -0.730562769227827590f, 0.682705450176424590f,
+    -0.730693689790328890f,
+  0.682565328866473250f, -0.730824583487312050f, 0.682425182460546060f,
+    -0.730955450313964360f,
+  0.682285010963795570f, -0.731086290265474230f, 0.682144814381375640f,
+    -0.731217103337031160f,
+  0.682004592718440830f, -0.731347889523825460f, 0.681864345980146780f,
+    -0.731478648821048520f,
+  0.681724074171649820f, -0.731609381223892520f, 0.681583777298107480f,
+    -0.731740086727550980f,
+  0.681443455364677990f, -0.731870765327218290f, 0.681303108376520530f,
+    -0.732001417018089520f,
+  0.681162736338795430f, -0.732132041795361290f, 0.681022339256663670f,
+    -0.732262639654230660f,
+  0.680881917135287340f, -0.732393210589896040f, 0.680741469979829090f,
+    -0.732523754597556590f,
+  0.680600997795453130f, -0.732654271672412820f, 0.680460500587323880f,
+    -0.732784761809665790f,
+  0.680319978360607200f, -0.732915225004517780f, 0.680179431120469750f,
+    -0.733045661252171970f,
+  0.680038858872079040f, -0.733176070547832740f, 0.679898261620603290f,
+    -0.733306452886705260f,
+  0.679757639371212030f, -0.733436808263995710f, 0.679616992129075560f,
+    -0.733567136674911360f,
+  0.679476319899365080f, -0.733697438114660260f, 0.679335622687252670f,
+    -0.733827712578451700f,
+  0.679194900497911200f, -0.733957960061495940f, 0.679054153336514870f,
+    -0.734088180559004040f,
+  0.678913381208238410f, -0.734218374066188170f, 0.678772584118257690f,
+    -0.734348540578261600f,
+  0.678631762071749470f, -0.734478680090438370f, 0.678490915073891250f,
+    -0.734608792597933550f,
+  0.678350043129861580f, -0.734738878095963390f, 0.678209146244839860f,
+    -0.734868936579745060f,
+  0.678068224424006600f, -0.734998968044496600f, 0.677927277672543130f,
+    -0.735128972485437180f,
+  0.677786305995631500f, -0.735258949897786730f, 0.677645309398454910f,
+    -0.735388900276766620f,
+  0.677504287886197430f, -0.735518823617598900f, 0.677363241464044030f,
+    -0.735648719915506400f,
+  0.677222170137180450f, -0.735778589165713480f, 0.677081073910793530f,
+    -0.735908431363445190f,
+  0.676939952790071240f, -0.736038246503927350f, 0.676798806780201770f,
+    -0.736168034582387330f,
+  0.676657635886374950f, -0.736297795594053060f, 0.676516440113781090f,
+    -0.736427529534153690f,
+  0.676375219467611700f, -0.736557236397919150f, 0.676233973953058950f,
+    -0.736686916180580460f,
+  0.676092703575316030f, -0.736816568877369790f, 0.675951408339577010f,
+    -0.736946194483520170f,
+  0.675810088251037060f, -0.737075792994265620f, 0.675668743314891910f,
+    -0.737205364404841190f,
+  0.675527373536338630f, -0.737334908710482790f, 0.675385978920574950f,
+    -0.737464425906427580f,
+  0.675244559472799270f, -0.737593915987913460f, 0.675103115198211530f,
+    -0.737723378950179590f,
+  0.674961646102012040f, -0.737852814788465980f, 0.674820152189402280f,
+    -0.737982223498013570f,
+  0.674678633465584540f, -0.738111605074064260f, 0.674537089935762110f,
+    -0.738240959511861310f,
+  0.674395521605139050f, -0.738370286806648510f, 0.674253928478920520f,
+    -0.738499586953671130f,
+  0.674112310562312360f, -0.738628859948174840f, 0.673970667860521620f,
+    -0.738758105785406900f,
+  0.673829000378756150f, -0.738887324460615110f, 0.673687308122224330f,
+    -0.739016515969048600f,
+  0.673545591096136100f, -0.739145680305957400f, 0.673403849305701850f,
+    -0.739274817466592520f,
+  0.673262082756132970f, -0.739403927446205760f, 0.673120291452642070f,
+    -0.739533010240050250f,
+  0.672978475400442090f, -0.739662065843379900f, 0.672836634604747410f,
+    -0.739791094251449950f,
+  0.672694769070772970f, -0.739920095459516090f, 0.672552878803734820f,
+    -0.740049069462835550f,
+  0.672410963808849900f, -0.740178016256666240f, 0.672269024091336040f,
+    -0.740306935836266940f,
+  0.672127059656411840f, -0.740435828196898020f, 0.671985070509296900f,
+    -0.740564693333820250f,
+  0.671843056655211930f, -0.740693531242295640f, 0.671701018099378320f,
+    -0.740822341917587330f,
+  0.671558954847018330f, -0.740951125354959110f, 0.671416866903355450f,
+    -0.741079881549676080f,
+  0.671274754273613490f, -0.741208610497004260f, 0.671132616963017850f,
+    -0.741337312192210660f,
+  0.670990454976794220f, -0.741465986630563290f, 0.670848268320169750f,
+    -0.741594633807331150f,
+  0.670706056998372160f, -0.741723253717784140f, 0.670563821016630040f,
+    -0.741851846357193480f,
+  0.670421560380173090f, -0.741980411720830960f, 0.670279275094231910f,
+    -0.742108949803969800f,
+  0.670136965164037760f, -0.742237460601884000f, 0.669994630594823000f,
+    -0.742365944109848460f,
+  0.669852271391821130f, -0.742494400323139180f, 0.669709887560265840f,
+    -0.742622829237033380f,
+  0.669567479105392490f, -0.742751230846809050f, 0.669425046032436910f,
+    -0.742879605147745090f,
+  0.669282588346636010f, -0.743007952135121720f, 0.669140106053227710f,
+    -0.743136271804219820f,
+  0.668997599157450270f, -0.743264564150321490f, 0.668855067664543610f,
+    -0.743392829168709970f,
+  0.668712511579748090f, -0.743521066854669120f, 0.668569930908305080f,
+    -0.743649277203484060f,
+  0.668427325655456820f, -0.743777460210440780f, 0.668284695826446670f,
+    -0.743905615870826490f,
+  0.668142041426518560f, -0.744033744179929180f, 0.667999362460917510f,
+    -0.744161845133038070f,
+  0.667856658934889440f, -0.744289918725443140f, 0.667713930853681140f,
+    -0.744417964952435620f,
+  0.667571178222540310f, -0.744545983809307250f, 0.667428401046715640f,
+    -0.744673975291351600f,
+  0.667285599331456480f, -0.744801939393862630f, 0.667142773082013310f,
+    -0.744929876112135350f,
+  0.666999922303637470f, -0.745057785441465950f, 0.666857047001581220f,
+    -0.745185667377151640f,
+  0.666714147181097670f, -0.745313521914490410f, 0.666571222847440750f,
+    -0.745441349048781680f,
+  0.666428274005865350f, -0.745569148775325430f, 0.666285300661627390f,
+    -0.745696921089422760f,
+  0.666142302819983540f, -0.745824665986375980f, 0.665999280486191500f,
+    -0.745952383461488180f,
+  0.665856233665509720f, -0.746080073510063780f, 0.665713162363197660f,
+    -0.746207736127407650f,
+  0.665570066584515560f, -0.746335371308826320f, 0.665426946334724660f,
+    -0.746462979049626770f,
+  0.665283801619087180f, -0.746590559345117310f, 0.665140632442866140f,
+    -0.746718112190607020f,
+  0.664997438811325340f, -0.746845637581406540f, 0.664854220729729660f,
+    -0.746973135512826740f,
+  0.664710978203344900f, -0.747100605980180130f, 0.664567711237437520f,
+    -0.747228048978779920f,
+  0.664424419837275180f, -0.747355464503940190f, 0.664281104008126230f,
+    -0.747482852550976570f,
+  0.664137763755260010f, -0.747610213115205150f, 0.663994399083946640f,
+    -0.747737546191943330f,
+  0.663851009999457340f, -0.747864851776509410f, 0.663707596507064120f,
+    -0.747992129864222700f,
+  0.663564158612039880f, -0.748119380450403490f, 0.663420696319658280f,
+    -0.748246603530373420f,
+  0.663277209635194100f, -0.748373799099454560f, 0.663133698563923010f,
+    -0.748500967152970430f,
+  0.662990163111121470f, -0.748628107686245330f, 0.662846603282066900f,
+    -0.748755220694604760f,
+  0.662703019082037440f, -0.748882306173375030f, 0.662559410516312400f,
+    -0.749009364117883770f,
+  0.662415777590171780f, -0.749136394523459260f, 0.662272120308896590f,
+    -0.749263397385431020f,
+  0.662128438677768720f, -0.749390372699129560f, 0.661984732702071030f,
+    -0.749517320459886170f,
+  0.661841002387086870f, -0.749644240663033480f, 0.661697247738101120f,
+    -0.749771133303904990f,
+  0.661553468760399000f, -0.749897998377835220f, 0.661409665459266940f,
+    -0.750024835880159780f,
+  0.661265837839992270f, -0.750151645806214960f, 0.661121985907862970f,
+    -0.750278428151338610f,
+  0.660978109668168060f, -0.750405182910869220f, 0.660834209126197610f,
+    -0.750531910080146410f,
+  0.660690284287242300f, -0.750658609654510590f, 0.660546335156593890f,
+    -0.750785281629303580f,
+  0.660402361739545030f, -0.750911925999867890f, 0.660258364041389050f,
+    -0.751038542761547250f,
+  0.660114342067420480f, -0.751165131909686370f, 0.659970295822934540f,
+    -0.751291693439630870f,
+  0.659826225313227430f, -0.751418227346727360f, 0.659682130543596150f,
+    -0.751544733626323570f,
+  0.659538011519338770f, -0.751671212273768430f, 0.659393868245753970f,
+    -0.751797663284411440f,
+  0.659249700728141490f, -0.751924086653603550f, 0.659105508971802200f,
+    -0.752050482376696360f,
+  0.658961292982037320f, -0.752176850449042700f, 0.658817052764149480f,
+    -0.752303190865996400f,
+  0.658672788323441890f, -0.752429503622912390f, 0.658528499665218760f,
+    -0.752555788715146390f,
+  0.658384186794785050f, -0.752682046138055230f, 0.658239849717446980f,
+    -0.752808275886996950f,
+  0.658095488438511290f, -0.752934477957330150f, 0.657951102963285630f,
+    -0.753060652344415100f,
+  0.657806693297078640f, -0.753186799043612410f, 0.657662259445200070f,
+    -0.753312918050284330f,
+  0.657517801412960120f, -0.753439009359793580f, 0.657373319205670210f,
+    -0.753565072967504190f,
+  0.657228812828642650f, -0.753691108868781210f, 0.657084282287190180f,
+    -0.753817117058990680f,
+  0.656939727586627110f, -0.753943097533499640f, 0.656795148732268070f,
+    -0.754069050287676120f,
+  0.656650545729429050f, -0.754194975316889170f, 0.656505918583426550f,
+    -0.754320872616508820f,
+  0.656361267299578000f, -0.754446742181906330f, 0.656216591883202030f,
+    -0.754572584008453840f,
+  0.656071892339617710f, -0.754698398091524390f, 0.655927168674145360f,
+    -0.754824184426492240f,
+  0.655782420892106030f, -0.754949943008732640f, 0.655637648998821820f,
+    -0.755075673833621510f,
+  0.655492852999615460f, -0.755201376896536550f, 0.655348032899810580f,
+    -0.755327052192855560f,
+  0.655203188704731930f, -0.755452699717958140f, 0.655058320419704910f,
+    -0.755578319467224540f,
+  0.654913428050056150f, -0.755703911436035880f, 0.654768511601112600f,
+    -0.755829475619774760f,
+  0.654623571078202680f, -0.755955012013824310f, 0.654478606486655350f,
+    -0.756080520613569120f,
+  0.654333617831800550f, -0.756206001414394540f, 0.654188605118969040f,
+    -0.756331454411686920f,
+  0.654043568353492640f, -0.756456879600833630f, 0.653898507540703890f,
+    -0.756582276977223470f,
+  0.653753422685936170f, -0.756707646536245670f, 0.653608313794523890f,
+    -0.756832988273290820f,
+  0.653463180871802330f, -0.756958302183750490f, 0.653318023923107670f,
+    -0.757083588263017140f,
+  0.653172842953776760f, -0.757208846506484460f, 0.653027637969147650f,
+    -0.757334076909547130f,
+  0.652882408974558960f, -0.757459279467600720f, 0.652737155975350420f,
+    -0.757584454176041810f,
+  0.652591878976862550f, -0.757709601030268080f, 0.652446577984436840f,
+    -0.757834720025678310f,
+  0.652301253003415460f, -0.757959811157672300f, 0.652155904039141700f,
+    -0.758084874421650620f,
+  0.652010531096959500f, -0.758209909813015280f, 0.651865134182214030f,
+    -0.758334917327168960f,
+  0.651719713300251020f, -0.758459896959515320f, 0.651574268456417080f,
+    -0.758584848705459500f,
+  0.651428799656059820f, -0.758709772560407390f, 0.651283306904527850f,
+    -0.758834668519765660f,
+  0.651137790207170330f, -0.758959536578942440f, 0.650992249569337660f,
+    -0.759084376733346500f,
+  0.650846684996380990f, -0.759209188978387960f, 0.650701096493652040f,
+    -0.759333973309477940f,
+  0.650555484066503990f, -0.759458729722028210f, 0.650409847720290420f,
+    -0.759583458211452010f,
+  0.650264187460365960f, -0.759708158773163440f, 0.650118503292086200f,
+    -0.759832831402577400f,
+  0.649972795220807530f, -0.759957476095110330f, 0.649827063251887100f,
+    -0.760082092846179220f,
+  0.649681307390683190f, -0.760206681651202420f, 0.649535527642554730f,
+    -0.760331242505599030f,
+  0.649389724012861770f, -0.760455775404789260f, 0.649243896506965010f,
+    -0.760580280344194340f,
+  0.649098045130226060f, -0.760704757319236920f, 0.648952169888007410f,
+    -0.760829206325340010f,
+  0.648806270785672550f, -0.760953627357928040f, 0.648660347828585840f,
+    -0.761078020412426560f,
+  0.648514401022112550f, -0.761202385484261780f, 0.648368430371618400f,
+    -0.761326722568861250f,
+  0.648222435882470420f, -0.761451031661653510f, 0.648076417560036530f,
+    -0.761575312758068000f,
+  0.647930375409685460f, -0.761699565853535270f, 0.647784309436786550f,
+    -0.761823790943486840f,
+  0.647638219646710420f, -0.761947988023355390f, 0.647492106044828100f,
+    -0.762072157088574560f,
+  0.647345968636512060f, -0.762196298134578900f, 0.647199807427135230f,
+    -0.762320411156804160f,
+  0.647053622422071650f, -0.762444496150687100f, 0.646907413626696020f,
+    -0.762568553111665380f,
+  0.646761181046383920f, -0.762692582035177870f, 0.646614924686512050f,
+    -0.762816582916664320f,
+  0.646468644552457890f, -0.762940555751565720f, 0.646322340649599590f,
+    -0.763064500535323710f,
+  0.646176012983316390f, -0.763188417263381270f, 0.646029661558988330f,
+    -0.763312305931182380f,
+  0.645883286381996440f, -0.763436166534172010f, 0.645736887457722290f,
+    -0.763559999067796150f,
+  0.645590464791548800f, -0.763683803527501870f, 0.645444018388859230f,
+    -0.763807579908737160f,
+  0.645297548255038380f, -0.763931328206951090f, 0.645151054395471270f,
+    -0.764055048417593860f,
+  0.645004536815544040f, -0.764178740536116670f, 0.644857995520643710f,
+    -0.764302404557971720f,
+  0.644711430516158420f, -0.764426040478612070f, 0.644564841807476750f,
+    -0.764549648293492150f,
+  0.644418229399988380f, -0.764673227998067140f, 0.644271593299083900f,
+    -0.764796779587793460f,
+  0.644124933510154540f, -0.764920303058128410f, 0.643978250038592660f,
+    -0.765043798404530410f,
+  0.643831542889791500f, -0.765167265622458960f, 0.643684812069144960f,
+    -0.765290704707374260f,
+  0.643538057582047850f, -0.765414115654738160f, 0.643391279433895960f,
+    -0.765537498460013070f,
+  0.643244477630085850f, -0.765660853118662390f, 0.643097652176015110f,
+    -0.765784179626150970f,
+  0.642950803077082080f, -0.765907477977944230f, 0.642803930338686100f,
+    -0.766030748169509000f,
+  0.642657033966226860f, -0.766153990196312810f, 0.642510113965105710f,
+    -0.766277204053824710f,
+  0.642363170340724320f, -0.766400389737514120f, 0.642216203098485370f,
+    -0.766523547242852100f,
+  0.642069212243792540f, -0.766646676565310380f, 0.641922197782050170f,
+    -0.766769777700361920f,
+  0.641775159718663500f, -0.766892850643480670f, 0.641628098059038860f,
+    -0.767015895390141480f,
+  0.641481012808583160f, -0.767138911935820400f, 0.641333903972704290f,
+    -0.767261900275994390f,
+  0.641186771556811250f, -0.767384860406141620f, 0.641039615566313390f,
+    -0.767507792321741270f,
+  0.640892436006621380f, -0.767630696018273270f, 0.640745232883146440f,
+    -0.767753571491219030f,
+  0.640598006201301030f, -0.767876418736060610f, 0.640450755966498140f,
+    -0.767999237748281270f,
+  0.640303482184151670f, -0.768122028523365310f, 0.640156184859676620f,
+    -0.768244791056798220f,
+  0.640008863998488440f, -0.768367525344066270f, 0.639861519606004010f,
+    -0.768490231380656750f,
+  0.639714151687640450f, -0.768612909162058270f, 0.639566760248816420f,
+    -0.768735558683760310f,
+  0.639419345294950700f, -0.768858179941253270f, 0.639271906831463510f,
+    -0.768980772930028870f,
+  0.639124444863775730f, -0.769103337645579590f, 0.638976959397309140f,
+    -0.769225874083399260f,
+  0.638829450437486400f, -0.769348382238982280f, 0.638681917989730840f,
+    -0.769470862107824560f,
+  0.638534362059466790f, -0.769593313685422940f, 0.638386782652119680f,
+    -0.769715736967275020f,
+  0.638239179773115390f, -0.769838131948879840f, 0.638091553427880930f,
+    -0.769960498625737230f,
+  0.637943903621844170f, -0.770082836993347900f, 0.637796230360433540f,
+    -0.770205147047214100f,
+  0.637648533649078810f, -0.770327428782838770f, 0.637500813493210310f,
+    -0.770449682195725960f,
+  0.637353069898259130f, -0.770571907281380700f, 0.637205302869657600f,
+    -0.770694104035309140f,
+  0.637057512412838590f, -0.770816272453018430f, 0.636909698533235870f,
+    -0.770938412530016940f,
+  0.636761861236284200f, -0.771060524261813710f, 0.636614000527419230f,
+    -0.771182607643919220f,
+  0.636466116412077180f, -0.771304662671844720f, 0.636318208895695570f,
+    -0.771426689341102590f,
+  0.636170277983712170f, -0.771548687647206300f, 0.636022323681566300f,
+    -0.771670657585670330f,
+  0.635874345994697720f, -0.771792599152010150f, 0.635726344928547180f,
+    -0.771914512341742350f,
+  0.635578320488556230f, -0.772036397150384410f, 0.635430272680167160f,
+    -0.772158253573455240f,
+  0.635282201508823530f, -0.772280081606474320f, 0.635134106979969300f,
+    -0.772401881244962340f,
+  0.634985989099049460f, -0.772523652484441330f, 0.634837847871510100f,
+    -0.772645395320433860f,
+  0.634689683302797850f, -0.772767109748463740f, 0.634541495398360130f,
+    -0.772888795764056220f,
+  0.634393284163645490f, -0.773010453362736990f, 0.634245049604103330f,
+    -0.773132082540033070f,
+  0.634096791725183740f, -0.773253683291472590f, 0.633948510532337810f,
+    -0.773375255612584470f,
+  0.633800206031017280f, -0.773496799498899050f, 0.633651878226674900f,
+    -0.773618314945947460f,
+  0.633503527124764320f, -0.773739801949261840f, 0.633355152730740060f,
+    -0.773861260504375540f,
+  0.633206755050057190f, -0.773982690606822790f, 0.633058334088172250f,
+    -0.774104092252138940f,
+  0.632909889850541860f, -0.774225465435860570f, 0.632761422342624000f,
+    -0.774346810153525020f,
+  0.632612931569877520f, -0.774468126400670860f, 0.632464417537761840f,
+    -0.774589414172837550f,
+  0.632315880251737680f, -0.774710673465565550f, 0.632167319717266030f,
+    -0.774831904274396850f,
+  0.632018735939809060f, -0.774953106594873820f, 0.631870128924829850f,
+    -0.775074280422540450f,
+  0.631721498677792370f, -0.775195425752941310f, 0.631572845204161130f,
+    -0.775316542581622410f,
+  0.631424168509401860f, -0.775437630904130430f, 0.631275468598980870f,
+    -0.775558690716013580f,
+  0.631126745478365340f, -0.775679722012820540f, 0.630977999153023660f,
+    -0.775800724790101540f,
+  0.630829229628424470f, -0.775921699043407580f, 0.630680436910038060f,
+    -0.776042644768290770f,
+  0.630531621003334600f, -0.776163561960304340f, 0.630382781913785940f,
+    -0.776284450615002400f,
+  0.630233919646864480f, -0.776405310727940390f, 0.630085034208043290f,
+    -0.776526142294674430f,
+  0.629936125602796550f, -0.776646945310762060f, 0.629787193836599200f,
+    -0.776767719771761510f,
+  0.629638238914927100f, -0.776888465673232440f, 0.629489260843256740f,
+    -0.777009183010735290f,
+  0.629340259627065750f, -0.777129871779831620f, 0.629191235271832410f,
+    -0.777250531976084070f,
+  0.629042187783036000f, -0.777371163595056200f, 0.628893117166156480f,
+    -0.777491766632312900f,
+  0.628744023426674790f, -0.777612341083419920f, 0.628594906570072660f,
+    -0.777732886943944050f,
+  0.628445766601832710f, -0.777853404209453040f, 0.628296603527438440f,
+    -0.777973892875515990f,
+  0.628147417352374120f, -0.778094352937702790f, 0.627998208082124810f,
+    -0.778214784391584420f,
+  0.627848975722176570f, -0.778335187232733090f, 0.627699720278016240f,
+    -0.778455561456721900f,
+  0.627550441755131530f, -0.778575907059124940f, 0.627401140159011160f,
+    -0.778696224035517530f,
+  0.627251815495144190f, -0.778816512381475870f, 0.627102467769021010f,
+    -0.778936772092577500f,
+  0.626953096986132770f, -0.779057003164400630f, 0.626803703151971310f,
+    -0.779177205592524680f,
+  0.626654286272029460f, -0.779297379372530300f, 0.626504846351800930f,
+    -0.779417524499998900f,
+  0.626355383396779990f, -0.779537640970513150f, 0.626205897412462130f,
+    -0.779657728779656780f,
+  0.626056388404343520f, -0.779777787923014440f, 0.625906856377921210f,
+    -0.779897818396171890f,
+  0.625757301338692900f, -0.780017820194715990f, 0.625607723292157410f,
+    -0.780137793314234500f,
+  0.625458122243814360f, -0.780257737750316590f, 0.625308498199164010f,
+    -0.780377653498552040f,
+  0.625158851163707730f, -0.780497540554531910f, 0.625009181142947460f,
+    -0.780617398913848290f,
+  0.624859488142386450f, -0.780737228572094380f, 0.624709772167528100f,
+    -0.780857029524864470f,
+  0.624560033223877320f, -0.780976801767753750f, 0.624410271316939380f,
+    -0.781096545296358410f,
+  0.624260486452220650f, -0.781216260106276090f, 0.624110678635228510f,
+    -0.781335946193104870f,
+  0.623960847871470770f, -0.781455603552444480f, 0.623810994166456130f,
+    -0.781575232179895550f,
+  0.623661117525694640f, -0.781694832071059390f, 0.623511217954696550f,
+    -0.781814403221538830f,
+  0.623361295458973340f, -0.781933945626937630f, 0.623211350044037270f,
+    -0.782053459282860300f,
+  0.623061381715401370f, -0.782172944184912900f, 0.622911390478579460f,
+    -0.782292400328702400f,
+  0.622761376339086460f, -0.782411827709836420f, 0.622611339302437730f,
+    -0.782531226323924240f,
+  0.622461279374150080f, -0.782650596166575730f, 0.622311196559740320f,
+    -0.782769937233402050f,
+  0.622161090864726930f, -0.782889249520015480f, 0.622010962294628600f,
+    -0.783008533022029110f,
+  0.621860810854965360f, -0.783127787735057310f, 0.621710636551257690f,
+    -0.783247013654715380f,
+  0.621560439389027270f, -0.783366210776619720f, 0.621410219373796150f,
+    -0.783485379096387820f,
+  0.621259976511087660f, -0.783604518609638200f, 0.621109710806425740f,
+    -0.783723629311990470f,
+  0.620959422265335180f, -0.783842711199065230f, 0.620809110893341900f,
+    -0.783961764266484010f,
+  0.620658776695972140f, -0.784080788509869950f, 0.620508419678753360f,
+    -0.784199783924846570f,
+  0.620358039847213830f, -0.784318750507038920f, 0.620207637206882430f,
+    -0.784437688252072720f,
+  0.620057211763289210f, -0.784556597155575240f, 0.619906763521964830f,
+    -0.784675477213174320f,
+  0.619756292488440660f, -0.784794328420499230f, 0.619605798668249390f,
+    -0.784913150773180020f,
+  0.619455282066924020f, -0.785031944266848080f, 0.619304742689998690f,
+    -0.785150708897135560f,
+  0.619154180543008410f, -0.785269444659675850f, 0.619003595631488770f,
+    -0.785388151550103550f,
+  0.618852987960976320f, -0.785506829564053930f, 0.618702357537008640f,
+    -0.785625478697163700f,
+  0.618551704365123860f, -0.785744098945070360f, 0.618401028450860980f,
+    -0.785862690303412600f,
+  0.618250329799760250f, -0.785981252767830150f, 0.618099608417362110f,
+    -0.786099786333963820f,
+  0.617948864309208260f, -0.786218290997455550f, 0.617798097480841140f,
+    -0.786336766753948260f,
+  0.617647307937803980f, -0.786455213599085770f, 0.617496495685640910f,
+    -0.786573631528513230f,
+  0.617345660729896940f, -0.786692020537876680f, 0.617194803076117630f,
+    -0.786810380622823490f,
+  0.617043922729849760f, -0.786928711779001700f, 0.616893019696640790f,
+    -0.787047014002060790f,
+  0.616742093982038830f, -0.787165287287650890f, 0.616591145591593230f,
+    -0.787283531631423620f,
+  0.616440174530853650f, -0.787401747029031320f, 0.616289180805370980f,
+    -0.787519933476127810f,
+  0.616138164420696910f, -0.787638090968367450f, 0.615987125382383870f,
+    -0.787756219501405950f,
+  0.615836063695985090f, -0.787874319070900110f, 0.615684979367054570f,
+    -0.787992389672507950f,
+  0.615533872401147430f, -0.788110431301888070f, 0.615382742803819330f,
+    -0.788228443954700490f,
+  0.615231590580626820f, -0.788346427626606230f, 0.615080415737127460f,
+    -0.788464382313267430f,
+  0.614929218278879590f, -0.788582308010347120f, 0.614777998211442190f,
+    -0.788700204713509660f,
+  0.614626755540375050f, -0.788818072418420170f, 0.614475490271239160f,
+    -0.788935911120745130f,
+  0.614324202409595950f, -0.789053720816151880f, 0.614172891961007990f,
+    -0.789171501500308790f,
+  0.614021558931038490f, -0.789289253168885650f, 0.613870203325251440f,
+    -0.789406975817552810f,
+  0.613718825149211830f, -0.789524669441982190f, 0.613567424408485330f,
+    -0.789642334037846340f,
+  0.613416001108638590f, -0.789759969600819070f, 0.613264555255239150f,
+    -0.789877576126575280f,
+  0.613113086853854910f, -0.789995153610791090f, 0.612961595910055170f,
+    -0.790112702049143300f,
+  0.612810082429409710f, -0.790230221437310030f, 0.612658546417489290f,
+    -0.790347711770970520f,
+  0.612506987879865570f, -0.790465173045804880f, 0.612355406822110760f,
+    -0.790582605257494460f,
+  0.612203803249798060f, -0.790700008401721610f, 0.612052177168501580f,
+    -0.790817382474169660f,
+  0.611900528583796070f, -0.790934727470523290f, 0.611748857501257400f,
+    -0.791052043386467950f,
+  0.611597163926462020f, -0.791169330217690090f, 0.611445447864987110f,
+    -0.791286587959877720f,
+  0.611293709322411010f, -0.791403816608719500f, 0.611141948304312570f,
+    -0.791521016159905220f,
+  0.610990164816271770f, -0.791638186609125770f, 0.610838358863869280f,
+    -0.791755327952073150f,
+  0.610686530452686280f, -0.791872440184440470f, 0.610534679588305320f,
+    -0.791989523301921850f,
+  0.610382806276309480f, -0.792106577300212390f, 0.610230910522282620f,
+    -0.792223602175008310f,
+  0.610078992331809620f, -0.792340597922007060f, 0.609927051710476230f,
+    -0.792457564536906970f,
+  0.609775088663868430f, -0.792574502015407580f, 0.609623103197573730f,
+    -0.792691410353209450f,
+  0.609471095317180240f, -0.792808289546014120f, 0.609319065028276820f,
+    -0.792925139589524260f,
+  0.609167012336453210f, -0.793041960479443640f, 0.609014937247299940f,
+    -0.793158752211477140f,
+  0.608862839766408200f, -0.793275514781330630f, 0.608710719899370420f,
+    -0.793392248184711100f,
+  0.608558577651779450f, -0.793508952417326660f, 0.608406413029229260f,
+    -0.793625627474886190f,
+  0.608254226037314490f, -0.793742273353100100f, 0.608102016681630550f,
+    -0.793858890047679620f,
+  0.607949784967773740f, -0.793975477554337170f, 0.607797530901341140f,
+    -0.794092035868785960f,
+  0.607645254487930830f, -0.794208564986740640f, 0.607492955733141660f,
+    -0.794325064903916520f,
+  0.607340634642572930f, -0.794441535616030590f, 0.607188291221825160f,
+    -0.794557977118800270f,
+  0.607035925476499760f, -0.794674389407944550f, 0.606883537412198580f,
+    -0.794790772479183170f,
+  0.606731127034524480f, -0.794907126328237010f, 0.606578694349081400f,
+    -0.795023450950828050f,
+  0.606426239361473550f, -0.795139746342679590f, 0.606273762077306430f,
+    -0.795256012499515500f,
+  0.606121262502186230f, -0.795372249417061190f, 0.605968740641719790f,
+    -0.795488457091042990f,
+  0.605816196501515080f, -0.795604635517188070f, 0.605663630087180490f,
+    -0.795720784691225090f,
+  0.605511041404325550f, -0.795836904608883460f, 0.605358430458560530f,
+    -0.795952995265893910f,
+  0.605205797255496500f, -0.796069056657987990f, 0.605053141800745430f,
+    -0.796185088780898440f,
+  0.604900464099919930f, -0.796301091630359110f, 0.604747764158633410f,
+    -0.796417065202104980f,
+  0.604595041982500360f, -0.796533009491872000f, 0.604442297577135970f,
+    -0.796648924495397150f,
+  0.604289530948156070f, -0.796764810208418720f, 0.604136742101177630f,
+    -0.796880666626675780f,
+  0.603983931041818020f, -0.796996493745908750f, 0.603831097775695880f,
+    -0.797112291561858920f,
+  0.603678242308430370f, -0.797228060070268700f, 0.603525364645641550f,
+    -0.797343799266881700f,
+  0.603372464792950370f, -0.797459509147442460f, 0.603219542755978440f,
+    -0.797575189707696590f,
+  0.603066598540348280f, -0.797690840943391040f, 0.602913632151683140f,
+    -0.797806462850273570f,
+  0.602760643595607220f, -0.797922055424093000f, 0.602607632877745550f,
+    -0.798037618660599410f,
+  0.602454600003723860f, -0.798153152555543750f, 0.602301544979168550f,
+    -0.798268657104678310f,
+  0.602148467809707320f, -0.798384132303756380f, 0.601995368500968130f,
+    -0.798499578148532010f,
+  0.601842247058580030f, -0.798614994634760820f, 0.601689103488173060f,
+    -0.798730381758199210f,
+  0.601535937795377730f, -0.798845739514604580f, 0.601382749985825420f,
+    -0.798961067899735760f,
+  0.601229540065148620f, -0.799076366909352350f, 0.601076308038980160f,
+    -0.799191636539215210f,
+  0.600923053912954090f, -0.799306876785086160f, 0.600769777692705230f,
+    -0.799422087642728040f,
+  0.600616479383868970f, -0.799537269107905010f, 0.600463158992081690f,
+    -0.799652421176382130f,
+  0.600309816522980430f, -0.799767543843925680f, 0.600156451982203350f,
+    -0.799882637106302810f,
+  0.600003065375389060f, -0.799997700959281910f, 0.599849656708177360f,
+    -0.800112735398632370f,
+  0.599696225986208310f, -0.800227740420124790f, 0.599542773215123390f,
+    -0.800342716019530660f,
+  0.599389298400564540f, -0.800457662192622710f, 0.599235801548174570f,
+    -0.800572578935174750f,
+  0.599082282663597310f, -0.800687466242961500f, 0.598928741752476900f,
+    -0.800802324111759110f,
+  0.598775178820458720f, -0.800917152537344300f, 0.598621593873188920f,
+    -0.801031951515495330f,
+  0.598467986916314310f, -0.801146721041991250f, 0.598314357955482600f,
+    -0.801261461112612540f,
+  0.598160706996342380f, -0.801376171723140130f, 0.598007034044542700f,
+    -0.801490852869356840f,
+  0.597853339105733910f, -0.801605504547046040f, 0.597699622185566830f,
+    -0.801720126751992330f,
+  0.597545883289693270f, -0.801834719479981310f, 0.597392122423765710f,
+    -0.801949282726799660f,
+  0.597238339593437530f, -0.802063816488235440f, 0.597084534804362740f,
+    -0.802178320760077450f,
+  0.596930708062196500f, -0.802292795538115720f, 0.596776859372594500f,
+    -0.802407240818141300f,
+  0.596622988741213330f, -0.802521656595946320f, 0.596469096173710360f,
+    -0.802636042867324150f,
+  0.596315181675743820f, -0.802750399628069160f, 0.596161245252972540f,
+    -0.802864726873976590f,
+  0.596007286911056530f, -0.802979024600843140f, 0.595853306655656390f,
+    -0.803093292804466400f,
+  0.595699304492433470f, -0.803207531480644830f, 0.595545280427049790f,
+    -0.803321740625178470f,
+  0.595391234465168730f, -0.803435920233868120f, 0.595237166612453850f,
+    -0.803550070302515570f,
+  0.595083076874569960f, -0.803664190826924090f, 0.594928965257182420f,
+    -0.803778281802897570f,
+  0.594774831765957580f, -0.803892343226241260f, 0.594620676406562240f,
+    -0.804006375092761520f,
+  0.594466499184664540f, -0.804120377398265700f, 0.594312300105932830f,
+    -0.804234350138562260f,
+  0.594158079176036800f, -0.804348293309460780f, 0.594003836400646690f,
+    -0.804462206906771840f,
+  0.593849571785433630f, -0.804576090926307000f, 0.593695285336069300f,
+    -0.804689945363879500f,
+  0.593540977058226390f, -0.804803770215302810f, 0.593386646957578480f,
+    -0.804917565476392150f,
+  0.593232295039799800f, -0.805031331142963660f, 0.593077921310565580f,
+    -0.805145067210834120f,
+  0.592923525775551410f, -0.805258773675822210f, 0.592769108440434070f,
+    -0.805372450533747060f,
+  0.592614669310891130f, -0.805486097780429120f, 0.592460208392600940f,
+    -0.805599715411689950f,
+  0.592305725691242400f, -0.805713303423352120f, 0.592151221212495640f,
+    -0.805826861811239300f,
+  0.591996694962040990f, -0.805940390571176280f, 0.591842146945560250f,
+    -0.806053889698988950f,
+  0.591687577168735550f, -0.806167359190504310f, 0.591532985637249990f,
+    -0.806280799041550370f,
+  0.591378372356787580f, -0.806394209247956240f, 0.591223737333032910f,
+    -0.806507589805552260f,
+  0.591069080571671510f, -0.806620940710169650f, 0.590914402078389520f,
+    -0.806734261957640750f,
+  0.590759701858874280f, -0.806847553543799220f, 0.590604979918813440f,
+    -0.806960815464479620f,
+  0.590450236263895920f, -0.807074047715517610f, 0.590295470899810940f,
+    -0.807187250292749850f,
+  0.590140683832248940f, -0.807300423192014450f, 0.589985875066900920f,
+    -0.807413566409150190f,
+  0.589831044609458900f, -0.807526679939997160f, 0.589676192465615420f,
+    -0.807639763780396370f,
+  0.589521318641063940f, -0.807752817926190360f, 0.589366423141498790f,
+    -0.807865842373222120f,
+  0.589211505972615070f, -0.807978837117336310f, 0.589056567140108460f,
+    -0.808091802154378260f,
+  0.588901606649675840f, -0.808204737480194720f, 0.588746624507014650f,
+    -0.808317643090633250f,
+  0.588591620717822890f, -0.808430518981542720f, 0.588436595287799900f,
+    -0.808543365148773010f,
+  0.588281548222645330f, -0.808656181588174980f, 0.588126479528059850f,
+    -0.808768968295600850f,
+  0.587971389209745120f, -0.808881725266903610f, 0.587816277273403020f,
+    -0.808994452497937560f,
+  0.587661143724736770f, -0.809107149984558130f, 0.587505988569450020f,
+    -0.809219817722621750f,
+  0.587350811813247660f, -0.809332455707985840f, 0.587195613461834910f,
+    -0.809445063936509170f,
+  0.587040393520918080f, -0.809557642404051260f, 0.586885151996203950f,
+    -0.809670191106473090f,
+  0.586729888893400500f, -0.809782710039636420f, 0.586574604218216280f,
+    -0.809895199199404450f,
+  0.586419297976360500f, -0.810007658581641140f, 0.586263970173543700f,
+    -0.810120088182211600f,
+  0.586108620815476430f, -0.810232487996982330f, 0.585953249907870680f,
+    -0.810344858021820550f,
+  0.585797857456438860f, -0.810457198252594770f, 0.585642443466894420f,
+    -0.810569508685174630f,
+  0.585487007944951450f, -0.810681789315430670f, 0.585331550896324940f,
+    -0.810794040139234730f,
+  0.585176072326730410f, -0.810906261152459670f, 0.585020572241884530f,
+    -0.811018452350979470f,
+  0.584865050647504490f, -0.811130613730669190f, 0.584709507549308500f,
+    -0.811242745287404810f,
+  0.584553942953015330f, -0.811354847017063730f, 0.584398356864344710f,
+    -0.811466918915524250f,
+  0.584242749289016980f, -0.811578960978665890f, 0.584087120232753550f,
+    -0.811690973202369050f,
+  0.583931469701276300f, -0.811802955582515360f, 0.583775797700308070f,
+    -0.811914908114987680f,
+  0.583620104235572760f, -0.812026830795669730f, 0.583464389312794430f,
+    -0.812138723620446480f,
+  0.583308652937698290f, -0.812250586585203880f, 0.583152895116010540f,
+    -0.812362419685829120f,
+  0.582997115853457700f, -0.812474222918210480f, 0.582841315155767650f,
+    -0.812585996278237020f,
+  0.582685493028668460f, -0.812697739761799490f, 0.582529649477889320f,
+    -0.812809453364789160f,
+  0.582373784509160220f, -0.812921137083098770f, 0.582217898128211790f,
+    -0.813032790912621930f,
+  0.582061990340775550f, -0.813144414849253590f, 0.581906061152583920f,
+    -0.813256008888889380f,
+  0.581750110569369760f, -0.813367573027426570f, 0.581594138596866930f,
+    -0.813479107260763220f,
+  0.581438145240810280f, -0.813590611584798510f, 0.581282130506935110f,
+    -0.813702085995432700f,
+  0.581126094400977620f, -0.813813530488567190f, 0.580970036928674880f,
+    -0.813924945060104490f,
+  0.580813958095764530f, -0.814036329705948300f, 0.580657857907985410f,
+    -0.814147684422003360f,
+  0.580501736371076600f, -0.814259009204175270f, 0.580345593490778300f,
+    -0.814370304048371070f,
+  0.580189429272831680f, -0.814481568950498610f, 0.580033243722978150f,
+    -0.814592803906467270f,
+  0.579877036846960350f, -0.814704008912187080f, 0.579720808650521560f,
+    -0.814815183963569330f,
+  0.579564559139405740f, -0.814926329056526620f, 0.579408288319357980f,
+    -0.815037444186972220f,
+  0.579251996196123550f, -0.815148529350820830f, 0.579095682775449210f,
+    -0.815259584543988280f,
+  0.578939348063081890f, -0.815370609762391290f, 0.578782992064769690f,
+    -0.815481605001947770f,
+  0.578626614786261430f, -0.815592570258576680f, 0.578470216233306740f,
+    -0.815703505528198260f,
+  0.578313796411655590f, -0.815814410806733780f, 0.578157355327059360f,
+    -0.815925286090105390f,
+  0.578000892985269910f, -0.816036131374236700f, 0.577844409392039850f,
+    -0.816146946655052160f,
+  0.577687904553122800f, -0.816257731928477390f, 0.577531378474272830f,
+    -0.816368487190439200f,
+  0.577374831161244880f, -0.816479212436865390f, 0.577218262619794920f,
+    -0.816589907663684890f,
+  0.577061672855679550f, -0.816700572866827850f, 0.576905061874655960f,
+    -0.816811208042225290f,
+  0.576748429682482520f, -0.816921813185809480f, 0.576591776284917870f,
+    -0.817032388293513880f,
+  0.576435101687721830f, -0.817142933361272970f, 0.576278405896654910f,
+    -0.817253448385022230f,
+  0.576121688917478390f, -0.817363933360698460f, 0.575964950755954330f,
+    -0.817474388284239240f,
+  0.575808191417845340f, -0.817584813151583710f, 0.575651410908915250f,
+    -0.817695207958671680f,
+  0.575494609234928230f, -0.817805572701444270f, 0.575337786401649560f,
+    -0.817915907375843740f,
+  0.575180942414845190f, -0.818026211977813440f, 0.575024077280281820f,
+    -0.818136486503297620f,
+  0.574867191003726740f, -0.818246730948241960f, 0.574710283590948450f,
+    -0.818356945308593150f,
+  0.574553355047715760f, -0.818467129580298660f, 0.574396405379798750f,
+    -0.818577283759307490f,
+  0.574239434592967890f, -0.818687407841569570f, 0.574082442692994470f,
+    -0.818797501823036010f,
+  0.573925429685650750f, -0.818907565699658950f, 0.573768395576709560f,
+    -0.819017599467391500f,
+  0.573611340371944610f, -0.819127603122188240f, 0.573454264077130400f,
+    -0.819237576660004520f,
+  0.573297166698042320f, -0.819347520076796900f, 0.573140048240456060f,
+    -0.819457433368523280f,
+  0.572982908710148680f, -0.819567316531142230f, 0.572825748112897550f,
+    -0.819677169560613760f,
+  0.572668566454481160f, -0.819786992452898990f, 0.572511363740678790f,
+    -0.819896785203959810f,
+  0.572354139977270030f, -0.820006547809759680f, 0.572196895170035580f,
+    -0.820116280266262710f,
+  0.572039629324757050f, -0.820225982569434690f, 0.571882342447216590f,
+    -0.820335654715241840f,
+  0.571725034543197120f, -0.820445296699652050f, 0.571567705618482580f,
+    -0.820554908518633890f,
+  0.571410355678857340f, -0.820664490168157460f, 0.571252984730106660f,
+    -0.820774041644193650f,
+  0.571095592778016690f, -0.820883562942714580f, 0.570938179828374360f,
+    -0.820993054059693470f,
+  0.570780745886967370f, -0.821102514991104650f, 0.570623290959583860f,
+    -0.821211945732923550f,
+  0.570465815052012990f, -0.821321346281126740f, 0.570308318170045010f,
+    -0.821430716631691760f,
+  0.570150800319470300f, -0.821540056780597610f, 0.569993261506080650f,
+    -0.821649366723823830f,
+  0.569835701735668110f, -0.821758646457351640f, 0.569678121014025710f,
+    -0.821867895977163140f,
+  0.569520519346947250f, -0.821977115279241550f, 0.569362896740227330f,
+    -0.822086304359571090f,
+  0.569205253199661200f, -0.822195463214137170f, 0.569047588731045220f,
+    -0.822304591838926350f,
+  0.568889903340175970f, -0.822413690229926390f, 0.568732197032851160f,
+    -0.822522758383125940f,
+  0.568574469814869250f, -0.822631796294514990f, 0.568416721692029390f,
+    -0.822740803960084420f,
+  0.568258952670131490f, -0.822849781375826320f, 0.568101162754976570f,
+    -0.822958728537734000f,
+  0.567943351952365670f, -0.823067645441801670f, 0.567785520268101250f,
+    -0.823176532084024860f,
+  0.567627667707986230f, -0.823285388460400110f, 0.567469794277824620f,
+    -0.823394214566925080f,
+  0.567311899983420800f, -0.823503010399598390f, 0.567153984830580100f,
+    -0.823611775954420260f,
+  0.566996048825108680f, -0.823720511227391320f, 0.566838091972813320f,
+    -0.823829216214513990f,
+  0.566680114279501710f, -0.823937890911791370f, 0.566522115750982100f,
+    -0.824046535315227760f,
+  0.566364096393063950f, -0.824155149420828570f, 0.566206056211556840f,
+    -0.824263733224600450f,
+  0.566047995212271560f, -0.824372286722551250f, 0.565889913401019570f,
+    -0.824480809910689500f,
+  0.565731810783613230f, -0.824589302785025290f, 0.565573687365865440f,
+    -0.824697765341569470f,
+  0.565415543153589770f, -0.824806197576334330f, 0.565257378152600910f,
+    -0.824914599485333080f,
+  0.565099192368714090f, -0.825022971064580220f, 0.564940985807745320f,
+    -0.825131312310090960f,
+  0.564782758475511400f, -0.825239623217882130f, 0.564624510377830120f,
+    -0.825347903783971380f,
+  0.564466241520519500f, -0.825456154004377440f, 0.564307951909398750f,
+    -0.825564373875120490f,
+  0.564149641550287680f, -0.825672563392221390f, 0.563991310449007080f,
+    -0.825780722551702430f,
+  0.563832958611378170f, -0.825888851349586780f, 0.563674586043223180f,
+    -0.825996949781898970f,
+  0.563516192750364910f, -0.826105017844664610f, 0.563357778738627020f,
+    -0.826213055533910110f,
+  0.563199344013834090f, -0.826321062845663420f, 0.563040888581811230f,
+    -0.826429039775953390f,
+  0.562882412448384550f, -0.826536986320809960f, 0.562723915619380400f,
+    -0.826644902476264210f,
+  0.562565398100626560f, -0.826752788238348520f, 0.562406859897951140f,
+    -0.826860643603096080f,
+  0.562248301017183150f, -0.826968468566541490f, 0.562089721464152480f,
+    -0.827076263124720270f,
+  0.561931121244689470f, -0.827184027273669020f, 0.561772500364625450f,
+    -0.827291761009425810f,
+  0.561613858829792420f, -0.827399464328029350f, 0.561455196646023280f,
+    -0.827507137225519830f,
+  0.561296513819151470f, -0.827614779697938400f, 0.561137810355011530f,
+    -0.827722391741327220f,
+  0.560979086259438260f, -0.827829973351729810f, 0.560820341538267540f,
+    -0.827937524525190870f,
+  0.560661576197336030f, -0.828045045257755800f, 0.560502790242481060f,
+    -0.828152535545471410f,
+  0.560343983679540860f, -0.828259995384385550f, 0.560185156514354080f,
+    -0.828367424770547480f,
+  0.560026308752760380f, -0.828474823700007130f, 0.559867440400600320f,
+    -0.828582192168815790f,
+  0.559708551463714790f, -0.828689530173025710f, 0.559549641947945870f,
+    -0.828796837708690610f,
+  0.559390711859136140f, -0.828904114771864870f, 0.559231761203129010f,
+    -0.829011361358604430f,
+  0.559072789985768480f, -0.829118577464965980f, 0.558913798212899770f,
+    -0.829225763087007570f,
+  0.558754785890368310f, -0.829332918220788250f, 0.558595753024020760f,
+    -0.829440042862368170f,
+  0.558436699619704100f, -0.829547137007808800f, 0.558277625683266330f,
+    -0.829654200653172640f,
+  0.558118531220556100f, -0.829761233794523050f, 0.557959416237422960f,
+    -0.829868236427924840f,
+  0.557800280739717100f, -0.829975208549443840f, 0.557641124733289420f,
+    -0.830082150155146970f,
+  0.557481948223991660f, -0.830189061241102370f, 0.557322751217676160f,
+    -0.830295941803379070f,
+  0.557163533720196340f, -0.830402791838047550f, 0.557004295737406060f,
+    -0.830509611341179070f,
+  0.556845037275160100f, -0.830616400308846200f, 0.556685758339313890f,
+    -0.830723158737122880f,
+  0.556526458935723720f, -0.830829886622083570f, 0.556367139070246490f,
+    -0.830936583959804410f,
+  0.556207798748739930f, -0.831043250746362320f, 0.556048437977062720f,
+    -0.831149886977835430f,
+  0.555889056761073920f, -0.831256492650303210f, 0.555729655106633520f,
+    -0.831363067759845920f,
+  0.555570233019602290f, -0.831469612302545240f, 0.555410790505841740f,
+    -0.831576126274483630f,
+  0.555251327571214090f, -0.831682609671745120f, 0.555091844221582420f,
+    -0.831789062490414400f,
+  0.554932340462810370f, -0.831895484726577590f, 0.554772816300762580f,
+    -0.832001876376321840f,
+  0.554613271741304040f, -0.832108237435735480f, 0.554453706790301040f,
+    -0.832214567900907980f,
+  0.554294121453620110f, -0.832320867767929680f, 0.554134515737128910f,
+    -0.832427137032892280f,
+  0.553974889646695610f, -0.832533375691888680f, 0.553815243188189090f,
+    -0.832639583741012770f,
+  0.553655576367479310f, -0.832745761176359460f, 0.553495889190436570f,
+    -0.832851907994024980f,
+  0.553336181662932410f, -0.832958024190106670f, 0.553176453790838460f,
+    -0.833064109760702890f,
+  0.553016705580027580f, -0.833170164701913190f, 0.552856937036373290f,
+    -0.833276189009838240f,
+  0.552697148165749770f, -0.833382182680579730f, 0.552537338974032120f,
+    -0.833488145710240770f,
+  0.552377509467096070f, -0.833594078094925140f, 0.552217659650817930f,
+    -0.833699979830738290f,
+  0.552057789531074980f, -0.833805850913786340f, 0.551897899113745320f,
+    -0.833911691340176730f,
+  0.551737988404707450f, -0.834017501106018130f, 0.551578057409841000f,
+    -0.834123280207419990f,
+  0.551418106135026060f, -0.834229028640493420f, 0.551258134586143700f,
+    -0.834334746401350080f,
+  0.551098142769075430f, -0.834440433486103190f, 0.550938130689703880f,
+    -0.834546089890866760f,
+  0.550778098353912230f, -0.834651715611756330f, 0.550618045767584330f,
+    -0.834757310644888230f,
+  0.550457972936604810f, -0.834862874986380010f, 0.550297879866859190f,
+    -0.834968408632350450f,
+  0.550137766564233630f, -0.835073911578919300f, 0.549977633034615000f,
+    -0.835179383822207580f,
+  0.549817479283891020f, -0.835284825358337370f, 0.549657305317949980f,
+    -0.835390236183431780f,
+  0.549497111142680960f, -0.835495616293615350f, 0.549336896763974010f,
+    -0.835600965685013410f,
+  0.549176662187719770f, -0.835706284353752600f, 0.549016407419809390f,
+    -0.835811572295960590f,
+  0.548856132466135290f, -0.835916829507766360f, 0.548695837332590090f,
+    -0.836022055985299880f,
+  0.548535522025067390f, -0.836127251724692160f, 0.548375186549461600f,
+    -0.836232416722075600f,
+  0.548214830911667780f, -0.836337550973583530f, 0.548054455117581880f,
+    -0.836442654475350380f,
+  0.547894059173100190f, -0.836547727223511890f, 0.547733643084120200f,
+    -0.836652769214204950f,
+  0.547573206856539870f, -0.836757780443567190f, 0.547412750496257930f,
+    -0.836862760907737810f,
+  0.547252274009174090f, -0.836967710602857020f, 0.547091777401188530f,
+    -0.837072629525066000f,
+  0.546931260678202190f, -0.837177517670507190f, 0.546770723846116800f,
+    -0.837282375035324320f,
+  0.546610166910834860f, -0.837387201615661940f, 0.546449589878259760f,
+    -0.837491997407665890f,
+  0.546288992754295210f, -0.837596762407483040f, 0.546128375544846060f,
+    -0.837701496611261700f,
+  0.545967738255817680f, -0.837806200015150940f, 0.545807080893116140f,
+    -0.837910872615301060f,
+  0.545646403462648590f, -0.838015514407863700f, 0.545485705970322530f,
+    -0.838120125388991500f,
+  0.545324988422046460f, -0.838224705554837970f, 0.545164250823729320f,
+    -0.838329254901558300f,
+  0.545003493181281160f, -0.838433773425308340f, 0.544842715500612470f,
+    -0.838538261122245170f,
+  0.544681917787634530f, -0.838642717988527300f, 0.544521100048259710f,
+    -0.838747144020313920f,
+  0.544360262288400400f, -0.838851539213765760f, 0.544199404513970420f,
+    -0.838955903565044350f,
+  0.544038526730883930f, -0.839060237070312630f, 0.543877628945055980f,
+    -0.839164539725734570f,
+  0.543716711162402390f, -0.839268811527475230f, 0.543555773388839650f,
+    -0.839373052471700690f,
+  0.543394815630284800f, -0.839477262554578550f, 0.543233837892656000f,
+    -0.839581441772277120f,
+  0.543072840181871850f, -0.839685590120966110f, 0.542911822503851730f,
+    -0.839789707596816260f,
+  0.542750784864516000f, -0.839893794195999410f, 0.542589727269785270f,
+    -0.839997849914688730f,
+  0.542428649725581360f, -0.840101874749058400f, 0.542267552237826520f,
+    -0.840205868695283580f,
+  0.542106434812444030f, -0.840309831749540770f, 0.541945297455357470f,
+    -0.840413763908007480f,
+  0.541784140172491660f, -0.840517665166862440f, 0.541622962969771640f,
+    -0.840621535522285690f,
+  0.541461765853123560f, -0.840725374970458070f, 0.541300548828474120f,
+    -0.840829183507561640f,
+  0.541139311901750910f, -0.840932961129779670f, 0.540978055078882190f,
+    -0.841036707833296650f,
+  0.540816778365796670f, -0.841140423614298080f, 0.540655481768424260f,
+    -0.841244108468970580f,
+  0.540494165292695230f, -0.841347762393501950f, 0.540332828944540820f,
+    -0.841451385384081260f,
+  0.540171472729892970f, -0.841554977436898330f, 0.540010096654684020f,
+    -0.841658538548144760f,
+  0.539848700724847700f, -0.841762068714012490f, 0.539687284946317570f,
+    -0.841865567930695340f,
+  0.539525849325029010f, -0.841969036194387680f, 0.539364393866917150f,
+    -0.842072473501285450f,
+  0.539202918577918240f, -0.842175879847585570f, 0.539041423463969550f,
+    -0.842279255229485880f,
+  0.538879908531008420f, -0.842382599643185960f, 0.538718373784973670f,
+    -0.842485913084885630f,
+  0.538556819231804210f, -0.842589195550786600f, 0.538395244877439950f,
+    -0.842692447037091560f,
+  0.538233650727821700f, -0.842795667540004120f, 0.538072036788890600f,
+    -0.842898857055729310f,
+  0.537910403066588990f, -0.843002015580472830f, 0.537748749566859470f,
+    -0.843105143110442050f,
+  0.537587076295645510f, -0.843208239641845440f, 0.537425383258891660f,
+    -0.843311305170892030f,
+  0.537263670462542530f, -0.843414339693792760f, 0.537101937912544240f,
+    -0.843517343206759080f,
+  0.536940185614843020f, -0.843620315706004040f, 0.536778413575385920f,
+    -0.843723257187741550f,
+  0.536616621800121150f, -0.843826167648186740f, 0.536454810294997090f,
+    -0.843929047083555870f,
+  0.536292979065963180f, -0.844031895490066410f, 0.536131128118969350f,
+    -0.844134712863936930f,
+  0.535969257459966710f, -0.844237499201387020f, 0.535807367094906620f,
+    -0.844340254498637590f,
+  0.535645457029741090f, -0.844442978751910660f, 0.535483527270423370f,
+    -0.844545671957429240f,
+  0.535321577822907010f, -0.844648334111417820f, 0.535159608693146720f,
+    -0.844750965210101510f,
+  0.534997619887097260f, -0.844853565249707010f, 0.534835611410714670f,
+    -0.844956134226462100f,
+  0.534673583269955510f, -0.845058672136595470f, 0.534511535470777010f,
+    -0.845161178976337140f,
+  0.534349468019137520f, -0.845263654741918220f, 0.534187380920995600f,
+    -0.845366099429570970f,
+  0.534025274182310380f, -0.845468513035528830f, 0.533863147809042650f,
+    -0.845570895556026270f,
+  0.533701001807152960f, -0.845673246987299070f, 0.533538836182603120f,
+    -0.845775567325583900f,
+  0.533376650941355560f, -0.845877856567118890f, 0.533214446089372960f,
+    -0.845980114708143270f,
+  0.533052221632619670f, -0.846082341744896940f, 0.532889977577059690f,
+    -0.846184537673621670f,
+  0.532727713928658810f, -0.846286702490559710f, 0.532565430693382580f,
+    -0.846388836191954930f,
+  0.532403127877198010f, -0.846490938774052020f, 0.532240805486072330f,
+    -0.846593010233097190f,
+  0.532078463525973540f, -0.846695050565337450f, 0.531916102002870760f,
+    -0.846797059767020910f,
+  0.531753720922733320f, -0.846899037834397350f, 0.531591320291531780f,
+    -0.847000984763716880f,
+  0.531428900115236910f, -0.847102900551231500f, 0.531266460399820390f,
+    -0.847204785193193980f,
+  0.531104001151255000f, -0.847306638685858320f, 0.530941522375513510f,
+    -0.847408461025479730f,
+  0.530779024078570250f, -0.847510252208314330f, 0.530616506266399450f,
+    -0.847612012230619660f,
+  0.530453968944976320f, -0.847713741088654270f, 0.530291412120277420f,
+    -0.847815438778677930f,
+  0.530128835798278850f, -0.847917105296951410f, 0.529966239984958620f,
+    -0.848018740639736810f,
+  0.529803624686294830f, -0.848120344803297120f, 0.529640989908265910f,
+    -0.848221917783896990f,
+  0.529478335656852090f, -0.848323459577801530f, 0.529315661938033140f,
+    -0.848424970181277600f,
+  0.529152968757790720f, -0.848526449590592650f, 0.528990256122106040f,
+    -0.848627897802015860f,
+  0.528827524036961980f, -0.848729314811817010f, 0.528664772508341540f,
+    -0.848830700616267530f,
+  0.528502001542228480f, -0.848932055211639610f, 0.528339211144607690f,
+    -0.849033378594206690f,
+  0.528176401321464370f, -0.849134670760243630f, 0.528013572078784740f,
+    -0.849235931706025960f,
+  0.527850723422555460f, -0.849337161427830670f, 0.527687855358763720f,
+    -0.849438359921935950f,
+  0.527524967893398200f, -0.849539527184620890f, 0.527362061032447430f,
+    -0.849640663212165910f,
+  0.527199134781901390f, -0.849741768000852440f, 0.527036189147750190f,
+    -0.849842841546963210f,
+  0.526873224135984700f, -0.849943883846782210f, 0.526710239752597010f,
+    -0.850044894896594070f,
+  0.526547236003579330f, -0.850145874692685210f, 0.526384212894925210f,
+    -0.850246823231342710f,
+  0.526221170432628170f, -0.850347740508854980f, 0.526058108622682760f,
+    -0.850448626521511650f,
+  0.525895027471084740f, -0.850549481265603370f, 0.525731926983829640f,
+    -0.850650304737422200f,
+  0.525568807166914680f, -0.850751096933260790f, 0.525405668026336810f,
+    -0.850851857849413640f,
+  0.525242509568094710f, -0.850952587482175730f, 0.525079331798186890f,
+    -0.851053285827843790f,
+  0.524916134722612890f, -0.851153952882715340f, 0.524752918347373360f,
+    -0.851254588643089120f,
+  0.524589682678468840f, -0.851355193105265200f, 0.524426427721901510f,
+    -0.851455766265544310f,
+  0.524263153483673470f, -0.851556308120228870f, 0.524099859969787810f,
+    -0.851656818665622370f,
+  0.523936547186248600f, -0.851757297898029120f, 0.523773215139060170f,
+    -0.851857745813754840f,
+  0.523609863834228030f, -0.851958162409106380f, 0.523446493277757940f,
+    -0.852058547680391580f,
+  0.523283103475656430f, -0.852158901623919830f, 0.523119694433931250f,
+    -0.852259224236001090f,
+  0.522956266158590140f, -0.852359515512947090f, 0.522792818655642200f,
+    -0.852459775451070100f,
+  0.522629351931096720f, -0.852560004046683970f, 0.522465865990963900f,
+    -0.852660201296103760f,
+  0.522302360841254700f, -0.852760367195645300f, 0.522138836487980650f,
+    -0.852860501741625860f,
+  0.521975292937154390f, -0.852960604930363630f, 0.521811730194788550f,
+    -0.853060676758178320f,
+  0.521648148266897090f, -0.853160717221390420f, 0.521484547159494550f,
+    -0.853260726316321770f,
+  0.521320926878595550f, -0.853360704039295430f, 0.521157287430216610f,
+    -0.853460650386635320f,
+  0.520993628820373810f, -0.853560565354666840f, 0.520829951055084780f,
+    -0.853660448939716270f,
+  0.520666254140367270f, -0.853760301138111300f, 0.520502538082239790f,
+    -0.853860121946180660f,
+  0.520338802886721960f, -0.853959911360254060f, 0.520175048559833760f,
+    -0.854059669376662780f,
+  0.520011275107596040f, -0.854159395991738730f, 0.519847482536030300f,
+    -0.854259091201815420f,
+  0.519683670851158520f, -0.854358755003227440f, 0.519519840059003870f,
+    -0.854458387392310060f,
+  0.519355990165589530f, -0.854557988365400530f, 0.519192121176940360f,
+    -0.854657557918836460f,
+  0.519028233099080970f, -0.854757096048957110f, 0.518864325938037000f,
+    -0.854856602752102850f,
+  0.518700399699835170f, -0.854956078024614820f, 0.518536454390502110f,
+    -0.855055521862835950f,
+  0.518372490016066220f, -0.855154934263109620f, 0.518208506582555460f,
+    -0.855254315221781080f,
+  0.518044504095999340f, -0.855353664735196030f, 0.517880482562427800f,
+    -0.855452982799701830f,
+  0.517716441987871150f, -0.855552269411646970f, 0.517552382378360990f,
+    -0.855651524567380690f,
+  0.517388303739929060f, -0.855750748263253920f, 0.517224206078608310f,
+    -0.855849940495618240f,
+  0.517060089400432130f, -0.855949101260826790f, 0.516895953711434260f,
+    -0.856048230555233820f,
+  0.516731799017649980f, -0.856147328375194470f, 0.516567625325114350f,
+    -0.856246394717065210f,
+  0.516403432639863990f, -0.856345429577203610f, 0.516239220967935620f,
+    -0.856444432951968480f,
+  0.516074990315366630f, -0.856543404837719960f, 0.515910740688195650f,
+    -0.856642345230818720f,
+  0.515746472092461380f, -0.856741254127627470f, 0.515582184534203790f,
+    -0.856840131524509220f,
+  0.515417878019463150f, -0.856938977417828650f, 0.515253552554280290f,
+    -0.857037791803951680f,
+  0.515089208144697270f, -0.857136574679244870f, 0.514924844796756490f,
+    -0.857235326040076460f,
+  0.514760462516501200f, -0.857334045882815590f, 0.514596061309975040f,
+    -0.857432734203832700f,
+  0.514431641183222930f, -0.857531390999499040f, 0.514267202142289830f,
+    -0.857630016266187620f,
+  0.514102744193221660f, -0.857728610000272120f, 0.513938267342065490f,
+    -0.857827172198127320f,
+  0.513773771594868030f, -0.857925702856129790f, 0.513609256957677900f,
+    -0.858024201970656540f,
+  0.513444723436543570f, -0.858122669538086020f, 0.513280171037514330f,
+    -0.858221105554798250f,
+  0.513115599766640560f, -0.858319510017173440f, 0.512951009629972860f,
+    -0.858417882921594040f,
+  0.512786400633563070f, -0.858516224264442740f, 0.512621772783463100f,
+    -0.858614534042104080f,
+  0.512457126085725800f, -0.858712812250963520f, 0.512292460546404980f,
+    -0.858811058887407500f,
+  0.512127776171554690f, -0.858909273947823900f, 0.511963072967230200f,
+    -0.859007457428601410f,
+  0.511798350939487000f, -0.859105609326130340f, 0.511633610094381350f,
+    -0.859203729636801920f,
+  0.511468850437970520f, -0.859301818357008360f, 0.511304071976311890f,
+    -0.859399875483143450f,
+  0.511139274715464390f, -0.859497901011601620f, 0.510974458661486720f,
+    -0.859595894938779080f,
+  0.510809623820439040f, -0.859693857261072610f, 0.510644770198381730f,
+    -0.859791787974880540f,
+  0.510479897801375700f, -0.859889687076602290f, 0.510315006635483350f,
+    -0.859987554562638200f,
+  0.510150096706766700f, -0.860085390429390140f, 0.509985168021289570f,
+    -0.860183194673260880f,
+  0.509820220585115560f, -0.860280967290654510f, 0.509655254404309250f,
+    -0.860378708277976130f,
+  0.509490269484936360f, -0.860476417631632070f, 0.509325265833062480f,
+    -0.860574095348029980f,
+  0.509160243454754750f, -0.860671741423578380f, 0.508995202356080310f,
+    -0.860769355854687060f,
+  0.508830142543106990f, -0.860866938637767310f, 0.508665064021904260f,
+    -0.860964489769230900f,
+  0.508499966798540810f, -0.861062009245491480f, 0.508334850879087470f,
+    -0.861159497062963350f,
+  0.508169716269614710f, -0.861256953218062060f, 0.508004562976194010f,
+    -0.861354377707204800f,
+  0.507839391004897940f, -0.861451770526809210f, 0.507674200361798890f,
+    -0.861549131673294720f,
+  0.507508991052970870f, -0.861646461143081300f, 0.507343763084487920f,
+    -0.861743758932590700f,
+  0.507178516462425290f, -0.861841025038245330f, 0.507013251192858340f,
+    -0.861938259456469180f,
+  0.506847967281863320f, -0.862035462183687210f, 0.506682664735517600f,
+    -0.862132633216325380f,
+  0.506517343559898530f, -0.862229772550811240f, 0.506352003761084800f,
+    -0.862326880183573060f,
+  0.506186645345155450f, -0.862423956111040500f, 0.506021268318189830f,
+    -0.862521000329644520f,
+  0.505855872686268860f, -0.862618012835816740f, 0.505690458455473340f,
+    -0.862714993625990690f,
+  0.505525025631885510f, -0.862811942696600330f, 0.505359574221587390f,
+    -0.862908860044081290f,
+  0.505194104230662240f, -0.863005745664870210f, 0.505028615665194300f,
+    -0.863102599555404800f,
+  0.504863108531267480f, -0.863199421712124160f, 0.504697582834967680f,
+    -0.863296212131468230f,
+  0.504532038582380380f, -0.863392970809878310f, 0.504366475779592150f,
+    -0.863489697743797140f,
+  0.504200894432690560f, -0.863586392929667990f, 0.504035294547763080f,
+    -0.863683056363935940f,
+  0.503869676130898950f, -0.863779688043046610f, 0.503704039188186960f,
+    -0.863876287963447510f,
+  0.503538383725717580f, -0.863972856121586700f, 0.503372709749581150f,
+    -0.864069392513913680f,
+  0.503207017265869030f, -0.864165897136879300f, 0.503041306280673450f,
+    -0.864262369986934950f,
+  0.502875576800086880f, -0.864358811060534030f, 0.502709828830203100f,
+    -0.864455220354130250f,
+  0.502544062377115800f, -0.864551597864179230f, 0.502378277446919870f,
+    -0.864647943587137480f,
+  0.502212474045710900f, -0.864744257519462380f, 0.502046652179584660f,
+    -0.864840539657612980f,
+  0.501880811854638400f, -0.864936789998049020f, 0.501714953076969230f,
+    -0.865033008537231750f,
+  0.501549075852675390f, -0.865129195271623690f, 0.501383180187855880f,
+    -0.865225350197688090f,
+  0.501217266088609950f, -0.865321473311889800f, 0.501051333561038040f,
+    -0.865417564610694410f,
+  0.500885382611240940f, -0.865513624090568980f, 0.500719413245319880f,
+    -0.865609651747981880f,
+  0.500553425469377640f, -0.865705647579402270f, 0.500387419289516580f,
+    -0.865801611581300760f,
+  0.500221394711840680f, -0.865897543750148820f, 0.500055351742453860f,
+    -0.865993444082419520f,
+  0.499889290387461380f, -0.866089312574586770f, 0.499723210652968710f,
+    -0.866185149223125730f,
+  0.499557112545081890f, -0.866280954024512990f, 0.499390996069908220f,
+    -0.866376726975225830f,
+  0.499224861233555030f, -0.866472468071743050f, 0.499058708042130930f,
+    -0.866568177310544360f,
+  0.498892536501744750f, -0.866663854688111020f, 0.498726346618505960f,
+    -0.866759500200925290f,
+  0.498560138398525200f, -0.866855113845470320f, 0.498393911847913150f,
+    -0.866950695618231020f,
+  0.498227666972781870f, -0.867046245515692650f, 0.498061403779243520f,
+    -0.867141763534342360f,
+  0.497895122273410930f, -0.867237249670668400f, 0.497728822461398100f,
+    -0.867332703921159690f,
+  0.497562504349319090f, -0.867428126282306920f, 0.497396167943289340f,
+    -0.867523516750601460f,
+  0.497229813249424340f, -0.867618875322536230f, 0.497063440273840310f,
+    -0.867714201994605140f,
+  0.496897049022654640f, -0.867809496763303210f, 0.496730639501984710f,
+    -0.867904759625126920f,
+  0.496564211717949340f, -0.867999990576573400f, 0.496397765676667160f,
+    -0.868095189614141670f,
+  0.496231301384258310f, -0.868190356734331310f, 0.496064818846843060f,
+    -0.868285491933643240f,
+  0.495898318070542240f, -0.868380595208579800f, 0.495731799061478020f,
+    -0.868475666555644120f,
+  0.495565261825772490f, -0.868570705971340900f, 0.495398706369549080f,
+    -0.868665713452175580f,
+  0.495232132698931350f, -0.868760688994655190f, 0.495065540820043610f,
+    -0.868855632595287750f,
+  0.494898930739011310f, -0.868950544250582380f, 0.494732302461959820f,
+    -0.869045423957049530f,
+  0.494565655995016010f, -0.869140271711200560f, 0.494398991344306760f,
+    -0.869235087509548250f,
+  0.494232308515959730f, -0.869329871348606730f, 0.494065607516103730f,
+    -0.869424623224890780f,
+  0.493898888350867430f, -0.869519343134916970f, 0.493732151026381070f,
+    -0.869614031075202300f,
+  0.493565395548774880f, -0.869708687042265560f, 0.493398621924179830f,
+    -0.869803311032626650f,
+  0.493231830158728070f, -0.869897903042806340f, 0.493065020258551650f,
+    -0.869992463069326870f,
+  0.492898192229784090f, -0.870086991108711350f, 0.492731346078558840f,
+    -0.870181487157484560f,
+  0.492564481811010650f, -0.870275951212171830f, 0.492397599433274550f,
+    -0.870370383269300160f,
+  0.492230698951486080f, -0.870464783325397670f, 0.492063780371782060f,
+    -0.870559151376993250f,
+  0.491896843700299240f, -0.870653487420617540f, 0.491729888943175820f,
+    -0.870747791452801790f,
+  0.491562916106550060f, -0.870842063470078860f, 0.491395925196560830f,
+    -0.870936303468982760f,
+  0.491228916219348330f, -0.871030511446048260f, 0.491061889181052590f,
+    -0.871124687397811900f,
+  0.490894844087815140f, -0.871218831320810900f, 0.490727780945777570f,
+    -0.871312943211583920f,
+  0.490560699761082080f, -0.871407023066670950f, 0.490393600539872130f,
+    -0.871501070882612530f,
+  0.490226483288291100f, -0.871595086655951090f, 0.490059348012483910f,
+    -0.871689070383229740f,
+  0.489892194718595300f, -0.871783022060993010f, 0.489725023412770970f,
+    -0.871876941685786890f,
+  0.489557834101157550f, -0.871970829254157700f, 0.489390626789901920f,
+    -0.872064684762653970f,
+  0.489223401485152030f, -0.872158508207824480f, 0.489056158193055980f,
+    -0.872252299586219860f,
+  0.488888896919763230f, -0.872346058894391540f, 0.488721617671423250f,
+    -0.872439786128892280f,
+  0.488554320454186230f, -0.872533481286276060f, 0.488387005274203590f,
+    -0.872627144363097960f,
+  0.488219672137626740f, -0.872720775355914300f, 0.488052321050608310f,
+    -0.872814374261282390f,
+  0.487884952019301210f, -0.872907941075760970f, 0.487717565049858860f,
+    -0.873001475795909920f,
+  0.487550160148436050f, -0.873094978418290090f, 0.487382737321187310f,
+    -0.873188448939463790f,
+  0.487215296574268820f, -0.873281887355994210f, 0.487047837913836550f,
+    -0.873375293664446000f,
+  0.486880361346047400f, -0.873468667861384880f, 0.486712866877059340f,
+    -0.873562009943377740f,
+  0.486545354513030270f, -0.873655319906992630f, 0.486377824260119500f,
+    -0.873748597748798870f,
+  0.486210276124486530f, -0.873841843465366750f, 0.486042710112291390f,
+    -0.873935057053268130f,
+  0.485875126229695420f, -0.874028238509075630f, 0.485707524482859750f,
+    -0.874121387829363330f,
+  0.485539904877947020f, -0.874214505010706300f, 0.485372267421119770f,
+    -0.874307590049680950f,
+  0.485204612118541880f, -0.874400642942864790f, 0.485036938976377450f,
+    -0.874493663686836450f,
+  0.484869248000791120f, -0.874586652278176110f, 0.484701539197948730f,
+    -0.874679608713464510f,
+  0.484533812574016120f, -0.874772532989284150f, 0.484366068135160480f,
+    -0.874865425102218210f,
+  0.484198305887549140f, -0.874958285048851540f, 0.484030525837350010f,
+    -0.875051112825769970f,
+  0.483862727990732320f, -0.875143908429560250f, 0.483694912353865080f,
+    -0.875236671856810870f,
+  0.483527078932918740f, -0.875329403104110780f, 0.483359227734063980f,
+    -0.875422102168050830f,
+  0.483191358763471910f, -0.875514769045222740f, 0.483023472027315050f,
+    -0.875607403732219240f,
+  0.482855567531765670f, -0.875700006225634600f, 0.482687645282997510f,
+    -0.875792576522063880f,
+  0.482519705287184520f, -0.875885114618103700f, 0.482351747550501030f,
+    -0.875977620510351660f,
+  0.482183772079122830f, -0.876070094195406600f, 0.482015778879225530f,
+    -0.876162535669868460f,
+  0.481847767956986080f, -0.876254944930338400f, 0.481679739318581490f,
+    -0.876347321973419020f,
+  0.481511692970189920f, -0.876439666795713610f, 0.481343628917989870f,
+    -0.876531979393827100f,
+  0.481175547168160360f, -0.876624259764365310f, 0.481007447726881640f,
+    -0.876716507903935400f,
+  0.480839330600333900f, -0.876808723809145760f, 0.480671195794698690f,
+    -0.876900907476605650f,
+  0.480503043316157670f, -0.876993058902925780f, 0.480334873170893070f,
+    -0.877085178084718310f,
+  0.480166685365088440f, -0.877177265018595940f, 0.479998479904927220f,
+    -0.877269319701173170f,
+  0.479830256796594250f, -0.877361342129065140f, 0.479662016046274340f,
+    -0.877453332298888560f,
+  0.479493757660153060f, -0.877545290207261240f, 0.479325481644417130f,
+    -0.877637215850802120f,
+  0.479157188005253310f, -0.877729109226131570f, 0.478988876748849550f,
+    -0.877820970329870500f,
+  0.478820547881394050f, -0.877912799158641730f, 0.478652201409075550f,
+    -0.878004595709069080f,
+  0.478483837338084080f, -0.878096359977777130f, 0.478315455674609480f,
+    -0.878188091961392250f,
+  0.478147056424843120f, -0.878279791656541460f, 0.477978639594976110f,
+    -0.878371459059853590f,
+  0.477810205191201040f, -0.878463094167957870f, 0.477641753219710590f,
+    -0.878554696977485340f,
+  0.477473283686698060f, -0.878646267485068130f, 0.477304796598358010f,
+    -0.878737805687339280f,
+  0.477136291960884750f, -0.878829311580933360f, 0.476967769780474230f,
+    -0.878920785162485840f,
+  0.476799230063322250f, -0.879012226428633410f, 0.476630672815625380f,
+    -0.879103635376014330f,
+  0.476462098043581310f, -0.879195012001267370f, 0.476293505753387750f,
+    -0.879286356301033250f,
+  0.476124895951243630f, -0.879377668271953180f, 0.475956268643348220f,
+    -0.879468947910670100f,
+  0.475787623835901120f, -0.879560195213827890f, 0.475618961535103410f,
+    -0.879651410178071470f,
+  0.475450281747155870f, -0.879742592800047410f, 0.475281584478260800f,
+    -0.879833743076402940f,
+  0.475112869734620470f, -0.879924861003786860f, 0.474944137522437860f,
+    -0.880015946578848960f,
+  0.474775387847917230f, -0.880106999798240360f, 0.474606620717262560f,
+    -0.880198020658613190f,
+  0.474437836136679340f, -0.880289009156620890f, 0.474269034112372920f,
+    -0.880379965288918260f,
+  0.474100214650550020f, -0.880470889052160750f, 0.473931377757417560f,
+    -0.880561780443005590f,
+  0.473762523439182850f, -0.880652639458111010f, 0.473593651702054640f,
+    -0.880743466094136230f,
+  0.473424762552241530f, -0.880834260347742040f, 0.473255855995953380f,
+    -0.880925022215589880f,
+  0.473086932039400220f, -0.881015751694342760f, 0.472917990688792760f,
+    -0.881106448780665130f,
+  0.472749031950342900f, -0.881197113471221980f, 0.472580055830262250f,
+    -0.881287745762680100f,
+  0.472411062334764100f, -0.881378345651706810f, 0.472242051470061650f,
+    -0.881468913134971330f,
+  0.472073023242368660f, -0.881559448209143780f, 0.471903977657900320f,
+    -0.881649950870895260f,
+  0.471734914722871430f, -0.881740421116898320f, 0.471565834443498480f,
+    -0.881830858943826620f,
+  0.471396736825997810f, -0.881921264348354940f, 0.471227621876586400f,
+    -0.882011637327159590f,
+  0.471058489601482610f, -0.882101977876917580f, 0.470889340006904520f,
+    -0.882192285994307430f,
+  0.470720173099071710f, -0.882282561676008600f, 0.470550988884203490f,
+    -0.882372804918702290f,
+  0.470381787368520710f, -0.882463015719070040f, 0.470212568558244280f,
+    -0.882553194073795400f,
+  0.470043332459595620f, -0.882643339979562790f, 0.469874079078797470f,
+    -0.882733453433057540f,
+  0.469704808422072460f, -0.882823534430966730f, 0.469535520495644510f,
+    -0.882913582969978020f,
+  0.469366215305737630f, -0.883003599046780720f, 0.469196892858576630f,
+    -0.883093582658065370f,
+  0.469027553160387240f, -0.883183533800523280f, 0.468858196217395330f,
+    -0.883273452470847430f,
+  0.468688822035827960f, -0.883363338665731580f, 0.468519430621912420f,
+    -0.883453192381870920f,
+  0.468350021981876530f, -0.883543013615961880f, 0.468180596121949400f,
+    -0.883632802364701760f,
+  0.468011153048359830f, -0.883722558624789660f, 0.467841692767338220f,
+    -0.883812282392925090f,
+  0.467672215285114710f, -0.883901973665809470f, 0.467502720607920920f,
+    -0.883991632440144890f,
+  0.467333208741988530f, -0.884081258712634990f, 0.467163679693549770f,
+    -0.884170852479984500f,
+  0.466994133468838110f, -0.884260413738899080f, 0.466824570074086950f,
+    -0.884349942486086120f,
+  0.466654989515530970f, -0.884439438718253700f, 0.466485391799405010f,
+    -0.884528902432111350f,
+  0.466315776931944480f, -0.884618333624369920f, 0.466146144919386000f,
+    -0.884707732291740930f,
+  0.465976495767966130f, -0.884797098430937790f, 0.465806829483922770f,
+    -0.884886432038674560f,
+  0.465637146073493770f, -0.884975733111666660f, 0.465467445542917800f,
+    -0.885065001646630930f,
+  0.465297727898434650f, -0.885154237640285110f, 0.465127993146283950f,
+    -0.885243441089348270f,
+  0.464958241292706740f, -0.885332611990540590f, 0.464788472343944160f,
+    -0.885421750340583570f,
+  0.464618686306237820f, -0.885510856136199950f, 0.464448883185830770f,
+    -0.885599929374113360f,
+  0.464279062988965760f, -0.885688970051048960f, 0.464109225721887010f,
+    -0.885777978163732940f,
+  0.463939371390838460f, -0.885866953708892790f, 0.463769500002065680f,
+    -0.885955896683257030f,
+  0.463599611561814120f, -0.886044807083555490f, 0.463429706076329880f,
+    -0.886133684906519340f,
+  0.463259783551860260f, -0.886222530148880640f, 0.463089843994652470f,
+    -0.886311342807372890f,
+  0.462919887410955130f, -0.886400122878730490f, 0.462749913807016850f,
+    -0.886488870359689600f,
+  0.462579923189086810f, -0.886577585246987040f, 0.462409915563415540f,
+    -0.886666267537360890f,
+  0.462239890936253280f, -0.886754917227550950f, 0.462069849313851810f,
+    -0.886843534314297300f,
+  0.461899790702462840f, -0.886932118794342080f, 0.461729715108338770f,
+    -0.887020670664428360f,
+  0.461559622537733190f, -0.887109189921300060f, 0.461389512996899450f,
+    -0.887197676561702900f,
+  0.461219386492092430f, -0.887286130582383150f, 0.461049243029567010f,
+    -0.887374551980088740f,
+  0.460879082615578690f, -0.887462940751568840f, 0.460708905256384190f,
+    -0.887551296893573370f,
+  0.460538710958240010f, -0.887639620402853930f, 0.460368499727404070f,
+    -0.887727911276163020f,
+  0.460198271570134270f, -0.887816169510254550f, 0.460028026492689700f,
+    -0.887904395101883240f,
+  0.459857764501329650f, -0.887992588047805560f, 0.459687485602313870f,
+    -0.888080748344778900f,
+  0.459517189801903590f, -0.888168875989561620f, 0.459346877106359570f,
+    -0.888256970978913870f,
+  0.459176547521944150f, -0.888345033309596240f, 0.459006201054919680f,
+    -0.888433062978371320f,
+  0.458835837711549120f, -0.888521059982002260f, 0.458665457498096670f,
+    -0.888609024317253750f,
+  0.458495060420826220f, -0.888696955980891710f, 0.458324646486003300f,
+    -0.888784854969682850f,
+  0.458154215699893230f, -0.888872721280395520f, 0.457983768068762180f,
+    -0.888960554909799310f,
+  0.457813303598877290f, -0.889048355854664570f, 0.457642822296505770f,
+    -0.889136124111763240f,
+  0.457472324167916110f, -0.889223859677868210f, 0.457301809219376800f,
+    -0.889311562549753850f,
+  0.457131277457156980f, -0.889399232724195520f, 0.456960728887527030f,
+    -0.889486870197969790f,
+  0.456790163516757220f, -0.889574474967854580f, 0.456619581351118960f,
+    -0.889662047030628790f,
+  0.456448982396883860f, -0.889749586383072890f, 0.456278366660324670f,
+    -0.889837093021967900f,
+  0.456107734147714220f, -0.889924566944096720f, 0.455937084865326030f,
+    -0.890012008146243260f,
+  0.455766418819434750f, -0.890099416625192210f, 0.455595736016314920f,
+    -0.890186792377730240f,
+  0.455425036462242420f, -0.890274135400644480f, 0.455254320163493210f,
+    -0.890361445690723730f,
+  0.455083587126343840f, -0.890448723244757880f, 0.454912837357072050f,
+    -0.890535968059537830f,
+  0.454742070861955450f, -0.890623180131855930f, 0.454571287647273000f,
+    -0.890710359458505520f,
+  0.454400487719303750f, -0.890797506036281490f, 0.454229671084327320f,
+    -0.890884619861979530f,
+  0.454058837748624540f, -0.890971700932396750f, 0.453887987718476050f,
+    -0.891058749244331590f,
+  0.453717121000163930f, -0.891145764794583180f, 0.453546237599970260f,
+    -0.891232747579952520f,
+  0.453375337524177750f, -0.891319697597241390f, 0.453204420779070300f,
+    -0.891406614843252900f,
+  0.453033487370931580f, -0.891493499314791380f, 0.452862537306046810f,
+    -0.891580351008662290f,
+  0.452691570590700860f, -0.891667169921672390f, 0.452520587231180100f,
+    -0.891753956050629460f,
+  0.452349587233771000f, -0.891840709392342720f, 0.452178570604760410f,
+    -0.891927429943622510f,
+  0.452007537350436530f, -0.892014117701280360f, 0.451836487477087430f,
+    -0.892100772662129170f,
+  0.451665420991002540f, -0.892187394822982480f, 0.451494337898471210f,
+    -0.892273984180655730f,
+  0.451323238205783520f, -0.892360540731965360f, 0.451152121919230710f,
+    -0.892447064473728680f,
+  0.450980989045103810f, -0.892533555402764690f, 0.450809839589695340f,
+    -0.892620013515893040f,
+  0.450638673559297760f, -0.892706438809935280f, 0.450467490960204110f,
+    -0.892792831281713610f,
+  0.450296291798708730f, -0.892879190928051680f, 0.450125076081105750f,
+    -0.892965517745774260f,
+  0.449953843813690580f, -0.893051811731707450f, 0.449782595002758860f,
+    -0.893138072882678210f,
+  0.449611329654606600f, -0.893224301195515320f, 0.449440047775531260f,
+    -0.893310496667048090f,
+  0.449268749371829920f, -0.893396659294107610f, 0.449097434449801100f,
+    -0.893482789073525850f,
+  0.448926103015743260f, -0.893568886002136020f, 0.448754755075956020f,
+    -0.893654950076772430f,
+  0.448583390636739300f, -0.893740981294271040f, 0.448412009704393430f,
+    -0.893826979651468620f,
+  0.448240612285220000f, -0.893912945145203250f, 0.448069198385520340f,
+    -0.893998877772314240f,
+  0.447897768011597310f, -0.894084777529641990f, 0.447726321169753750f,
+    -0.894170644414028270f,
+  0.447554857866293010f, -0.894256478422316040f, 0.447383378107519710f,
+    -0.894342279551349480f,
+  0.447211881899738260f, -0.894428047797973800f, 0.447040369249254500f,
+    -0.894513783159035620f,
+  0.446868840162374330f, -0.894599485631382580f, 0.446697294645404090f,
+    -0.894685155211863980f,
+  0.446525732704651400f, -0.894770791897329550f, 0.446354154346423840f,
+    -0.894856395684630930f,
+  0.446182559577030120f, -0.894941966570620750f, 0.446010948402779110f,
+    -0.895027504552152630f,
+  0.445839320829980350f, -0.895113009626081760f, 0.445667676864944350f,
+    -0.895198481789264200f,
+  0.445496016513981740f, -0.895283921038557580f, 0.445324339783404240f,
+    -0.895369327370820310f,
+  0.445152646679523590f, -0.895454700782912450f, 0.444980937208652780f,
+    -0.895540041271694840f,
+  0.444809211377105000f, -0.895625348834030000f, 0.444637469191193790f,
+    -0.895710623466781320f,
+  0.444465710657234110f, -0.895795865166813420f, 0.444293935781540580f,
+    -0.895881073930992370f,
+  0.444122144570429260f, -0.895966249756185110f, 0.443950337030216250f,
+    -0.896051392639260040f,
+  0.443778513167218220f, -0.896136502577086770f, 0.443606672987753080f,
+    -0.896221579566535920f,
+  0.443434816498138430f, -0.896306623604479660f, 0.443262943704693380f,
+    -0.896391634687790820f,
+  0.443091054613736990f, -0.896476612813344010f, 0.442919149231588980f,
+    -0.896561557978014960f,
+  0.442747227564570130f, -0.896646470178680150f, 0.442575289619001170f,
+    -0.896731349412217880f,
+  0.442403335401204130f, -0.896816195675507190f, 0.442231364917501090f,
+    -0.896901008965428680f,
+  0.442059378174214760f, -0.896985789278863970f, 0.441887375177668960f,
+    -0.897070536612695870f,
+  0.441715355934187310f, -0.897155250963808550f, 0.441543320450094920f,
+    -0.897239932329087050f,
+  0.441371268731716620f, -0.897324580705418320f, 0.441199200785378660f,
+    -0.897409196089689720f,
+  0.441027116617407340f, -0.897493778478790190f, 0.440855016234129430f,
+    -0.897578327869610230f,
+  0.440682899641873020f, -0.897662844259040750f, 0.440510766846965880f,
+    -0.897747327643974690f,
+  0.440338617855737300f, -0.897831778021305650f, 0.440166452674516480f,
+    -0.897916195387928550f,
+  0.439994271309633260f, -0.898000579740739880f, 0.439822073767418610f,
+    -0.898084931076636780f,
+  0.439649860054203420f, -0.898169249392518080f, 0.439477630176319860f,
+    -0.898253534685283570f,
+  0.439305384140100060f, -0.898337786951834190f, 0.439133121951876930f,
+    -0.898422006189072530f,
+  0.438960843617984430f, -0.898506192393901840f, 0.438788549144756290f,
+    -0.898590345563227030f,
+  0.438616238538527710f, -0.898674465693953820f, 0.438443911805633860f,
+    -0.898758552782989440f,
+  0.438271568952410480f, -0.898842606827242260f, 0.438099209985194580f,
+    -0.898926627823621870f,
+  0.437926834910322860f, -0.899010615769039070f, 0.437754443734133470f,
+    -0.899094570660405770f,
+  0.437582036462964340f, -0.899178492494635330f, 0.437409613103154850f,
+    -0.899262381268642000f,
+  0.437237173661044200f, -0.899346236979341460f, 0.437064718142972370f,
+    -0.899430059623650860f,
+  0.436892246555280470f, -0.899513849198487870f, 0.436719758904309310f,
+    -0.899597605700772180f,
+  0.436547255196401250f, -0.899681329127423930f, 0.436374735437898510f,
+    -0.899765019475365020f,
+  0.436202199635143950f, -0.899848676741518580f, 0.436029647794481670f,
+    -0.899932300922808400f,
+  0.435857079922255470f, -0.900015892016160280f, 0.435684496024810520f,
+    -0.900099450018500340f,
+  0.435511896108492170f, -0.900182974926756700f, 0.435339280179646070f,
+    -0.900266466737858480f,
+  0.435166648244619370f, -0.900349925448735600f, 0.434994000309758710f,
+    -0.900433351056319830f,
+  0.434821336381412350f, -0.900516743557543520f, 0.434648656465928430f,
+    -0.900600102949340790f,
+  0.434475960569655710f, -0.900683429228646860f, 0.434303248698944100f,
+    -0.900766722392397860f,
+  0.434130520860143310f, -0.900849982437531450f, 0.433957777059604480f,
+    -0.900933209360986200f,
+  0.433785017303678520f, -0.901016403159702330f, 0.433612241598717640f,
+    -0.901099563830620950f,
+  0.433439449951074200f, -0.901182691370684410f, 0.433266642367100940f,
+    -0.901265785776836580f,
+  0.433093818853152010f, -0.901348847046022030f, 0.432920979415581220f,
+    -0.901431875175186970f,
+  0.432748124060743760f, -0.901514870161278630f, 0.432575252794994810f,
+    -0.901597832001245660f,
+  0.432402365624690140f, -0.901680760692037730f, 0.432229462556186770f,
+    -0.901763656230605610f,
+  0.432056543595841450f, -0.901846518613901860f, 0.431883608750012300f,
+    -0.901929347838879350f,
+  0.431710658025057370f, -0.902012143902493070f, 0.431537691427335500f,
+    -0.902094906801698900f,
+  0.431364708963206440f, -0.902177636533453510f, 0.431191710639030000f,
+    -0.902260333094715540f,
+  0.431018696461167080f, -0.902342996482444200f, 0.430845666435978820f,
+    -0.902425626693600270f,
+  0.430672620569826860f, -0.902508223725145830f, 0.430499558869073930f,
+    -0.902590787574043870f,
+  0.430326481340082610f, -0.902673318237258830f, 0.430153387989216930f,
+    -0.902755815711756120f,
+  0.429980278822840570f, -0.902838279994502830f, 0.429807153847318770f,
+    -0.902920711082466630f,
+  0.429634013069016500f, -0.903003108972617040f, 0.429460856494299490f,
+    -0.903085473661924600f,
+  0.429287684129534720f, -0.903167805147360610f, 0.429114495981088690f,
+    -0.903250103425898400f,
+  0.428941292055329550f, -0.903332368494511820f, 0.428768072358625240f,
+    -0.903414600350176290f,
+  0.428594836897344400f, -0.903496798989868450f, 0.428421585677856760f,
+    -0.903578964410565950f,
+  0.428248318706531910f, -0.903661096609247980f, 0.428075035989740780f,
+    -0.903743195582894620f,
+  0.427901737533854240f, -0.903825261328487390f, 0.427728423345243860f,
+    -0.903907293843009050f,
+  0.427555093430282200f, -0.903989293123443340f, 0.427381747795341770f,
+    -0.904071259166775440f,
+  0.427208386446796370f, -0.904153191969991670f, 0.427035009391019790f,
+    -0.904235091530079750f,
+  0.426861616634386490f, -0.904316957844028320f, 0.426688208183271970f,
+    -0.904398790908827350f,
+  0.426514784044051520f, -0.904480590721468250f, 0.426341344223101880f,
+    -0.904562357278943190f,
+  0.426167888726799620f, -0.904644090578246240f, 0.425994417561522450f,
+    -0.904725790616371930f,
+  0.425820930733648300f, -0.904807457390316540f, 0.425647428249555590f,
+    -0.904889090897077470f,
+  0.425473910115623910f, -0.904970691133653250f, 0.425300376338232590f,
+    -0.905052258097043590f,
+  0.425126826923762410f, -0.905133791784249580f, 0.424953261878594060f,
+    -0.905215292192273480f,
+  0.424779681209108810f, -0.905296759318118820f, 0.424606084921689220f,
+    -0.905378193158789980f,
+  0.424432473022717420f, -0.905459593711293250f, 0.424258845518577010f,
+    -0.905540960972635480f,
+  0.424085202415651670f, -0.905622294939825160f, 0.423911543720325580f,
+    -0.905703595609872010f,
+  0.423737869438983950f, -0.905784862979786440f, 0.423564179578011960f,
+    -0.905866097046580940f,
+  0.423390474143796100f, -0.905947297807268460f, 0.423216753142722780f,
+    -0.906028465258863490f,
+  0.423043016581179100f, -0.906109599398381980f, 0.422869264465553170f,
+    -0.906190700222840540f,
+  0.422695496802232950f, -0.906271767729257660f, 0.422521713597607870f,
+    -0.906352801914652280f,
+  0.422347914858067000f, -0.906433802776045460f, 0.422174100590000820f,
+    -0.906514770310458800f,
+  0.422000270799799790f, -0.906595704514915330f, 0.421826425493854910f,
+    -0.906676605386439460f,
+  0.421652564678558380f, -0.906757472922056550f, 0.421478688360302220f,
+    -0.906838307118793540f,
+  0.421304796545479700f, -0.906919107973678030f, 0.421130889240484140f,
+    -0.906999875483739610f,
+  0.420956966451709440f, -0.907080609646008450f, 0.420783028185550630f,
+    -0.907161310457516250f,
+  0.420609074448402510f, -0.907241977915295930f, 0.420435105246661220f,
+    -0.907322612016381310f,
+  0.420261120586723050f, -0.907403212757808000f, 0.420087120474984590f,
+    -0.907483780136612570f,
+  0.419913104917843730f, -0.907564314149832520f, 0.419739073921698180f,
+    -0.907644814794507090f,
+  0.419565027492946940f, -0.907725282067676330f, 0.419390965637989050f,
+    -0.907805715966381820f,
+  0.419216888363223960f, -0.907886116487666150f, 0.419042795675052480f,
+    -0.907966483628573240f,
+  0.418868687579875110f, -0.908046817386148340f, 0.418694564084093610f,
+    -0.908127117757437600f,
+  0.418520425194109700f, -0.908207384739488700f, 0.418346270916326310f,
+    -0.908287618329350450f,
+  0.418172101257146430f, -0.908367818524072780f, 0.417997916222973550f,
+    -0.908447985320707250f,
+  0.417823715820212380f, -0.908528118716306120f, 0.417649500055267410f,
+    -0.908608218707923190f,
+  0.417475268934544340f, -0.908688285292613360f, 0.417301022464449060f,
+    -0.908768318467432780f,
+  0.417126760651387870f, -0.908848318229439120f, 0.416952483501768280f,
+    -0.908928284575690640f,
+  0.416778191021997590f, -0.909008217503247450f, 0.416603883218484410f,
+    -0.909088117009170580f,
+  0.416429560097637320f, -0.909167983090522270f, 0.416255221665865480f,
+    -0.909247815744366310f,
+  0.416080867929579320f, -0.909327614967767260f, 0.415906498895188770f,
+    -0.909407380757791260f,
+  0.415732114569105420f, -0.909487113111505430f, 0.415557714957740580f,
+    -0.909566812025978220f,
+  0.415383300067506290f, -0.909646477498279540f, 0.415208869904815650f,
+    -0.909726109525480160f,
+  0.415034424476081630f, -0.909805708104652220f, 0.414859963787718390f,
+    -0.909885273232869160f,
+  0.414685487846140010f, -0.909964804907205660f, 0.414510996657761810f,
+    -0.910044303124737390f,
+  0.414336490228999210f, -0.910123767882541570f, 0.414161968566268080f,
+    -0.910203199177696540f,
+  0.413987431675985510f, -0.910282597007281760f, 0.413812879564568300f,
+    -0.910361961368377990f,
+  0.413638312238434560f, -0.910441292258067140f, 0.413463729704002580f,
+    -0.910520589673432630f,
+  0.413289131967690960f, -0.910599853611558930f, 0.413114519035919560f,
+    -0.910679084069531570f,
+  0.412939890915108020f, -0.910758281044437570f, 0.412765247611677320f,
+    -0.910837444533365010f,
+  0.412590589132048380f, -0.910916574533403240f, 0.412415915482642730f,
+    -0.910995671041643140f,
+  0.412241226669883000f, -0.911074734055176250f, 0.412066522700191560f,
+    -0.911153763571095900f,
+  0.411891803579992220f, -0.911232759586496190f, 0.411717069315708670f,
+    -0.911311722098472670f,
+  0.411542319913765280f, -0.911390651104122320f, 0.411367555380587340f,
+    -0.911469546600543020f,
+  0.411192775722600160f, -0.911548408584833990f, 0.411017980946230270f,
+    -0.911627237054095650f,
+  0.410843171057903910f, -0.911706032005429880f, 0.410668346064048780f,
+    -0.911784793435939430f,
+  0.410493505971092520f, -0.911863521342728520f, 0.410318650785463260f,
+    -0.911942215722902570f,
+  0.410143780513590350f, -0.912020876573568230f, 0.409968895161902820f,
+    -0.912099503891833470f,
+  0.409793994736831200f, -0.912178097674807060f, 0.409619079244805840f,
+    -0.912256657919599650f,
+  0.409444148692257590f, -0.912335184623322750f, 0.409269203085618700f,
+    -0.912413677783089020f,
+  0.409094242431320920f, -0.912492137396012650f, 0.408919266735797480f,
+    -0.912570563459208730f,
+  0.408744276005481520f, -0.912648955969793900f, 0.408569270246806780f,
+    -0.912727314924885900f,
+  0.408394249466208110f, -0.912805640321603500f, 0.408219213670120100f,
+    -0.912883932157067200f,
+  0.408044162864978740f, -0.912962190428398100f, 0.407869097057219960f,
+    -0.913040415132719160f,
+  0.407694016253280170f, -0.913118606267154130f, 0.407518920459597030f,
+    -0.913196763828828200f,
+  0.407343809682607970f, -0.913274887814867760f, 0.407168683928751610f,
+    -0.913352978222400250f,
+  0.406993543204466460f, -0.913431035048554720f, 0.406818387516192370f,
+    -0.913509058290461140f,
+  0.406643216870369140f, -0.913587047945250810f, 0.406468031273437000f,
+    -0.913665004010056350f,
+  0.406292830731837470f, -0.913742926482011390f, 0.406117615252011790f,
+    -0.913820815358251100f,
+  0.405942384840402570f, -0.913898670635911680f, 0.405767139503452220f,
+    -0.913976492312130520f,
+  0.405591879247603870f, -0.914054280384046460f, 0.405416604079301750f,
+    -0.914132034848799460f,
+  0.405241314004989860f, -0.914209755703530690f, 0.405066009031113390f,
+    -0.914287442945382440f,
+  0.404890689164117750f, -0.914365096571498450f, 0.404715354410448650f,
+    -0.914442716579023870f,
+  0.404540004776553110f, -0.914520302965104450f, 0.404364640268877810f,
+    -0.914597855726887790f,
+  0.404189260893870750f, -0.914675374861522390f, 0.404013866657980060f,
+    -0.914752860366158100f,
+  0.403838457567654130f, -0.914830312237946090f, 0.403663033629342750f,
+    -0.914907730474038620f,
+  0.403487594849495310f, -0.914985115071589310f, 0.403312141234562660f,
+    -0.915062466027752760f,
+  0.403136672790995240f, -0.915139783339685260f, 0.402961189525244960f,
+    -0.915217067004543750f,
+  0.402785691443763640f, -0.915294317019487050f, 0.402610178553003680f,
+    -0.915371533381674760f,
+  0.402434650859418540f, -0.915448716088267830f, 0.402259108369461440f,
+    -0.915525865136428530f,
+  0.402083551089587040f, -0.915602980523320230f, 0.401907979026249860f,
+    -0.915680062246107650f,
+  0.401732392185905010f, -0.915757110301956720f, 0.401556790575008650f,
+    -0.915834124688034710f,
+  0.401381174200016790f, -0.915911105401509880f, 0.401205543067386760f,
+    -0.915988052439551840f,
+  0.401029897183575790f, -0.916064965799331610f, 0.400854236555041650f,
+    -0.916141845478021350f,
+  0.400678561188243350f, -0.916218691472794110f, 0.400502871089639500f,
+    -0.916295503780824800f,
+  0.400327166265690150f, -0.916372282399289140f, 0.400151446722855300f,
+    -0.916449027325364040f,
+  0.399975712467595390f, -0.916525738556228100f, 0.399799963506372090f,
+    -0.916602416089060680f,
+  0.399624199845646790f, -0.916679059921042700f, 0.399448421491882260f,
+    -0.916755670049355990f,
+  0.399272628451540930f, -0.916832246471183890f, 0.399096820731086600f,
+    -0.916908789183710990f,
+  0.398920998336983020f, -0.916985298184122890f, 0.398745161275694480f,
+    -0.917061773469606820f,
+  0.398569309553686360f, -0.917138215037350710f, 0.398393443177423920f,
+    -0.917214622884544250f,
+  0.398217562153373620f, -0.917290997008377910f, 0.398041666488001930f,
+    -0.917367337406043810f,
+  0.397865756187775750f, -0.917443644074735220f, 0.397689831259163240f,
+    -0.917519917011646260f,
+  0.397513891708632330f, -0.917596156213972950f, 0.397337937542652120f,
+    -0.917672361678911750f,
+  0.397161968767691720f, -0.917748533403661250f, 0.396985985390220900f,
+    -0.917824671385420570f,
+  0.396809987416710420f, -0.917900775621390390f, 0.396633974853630830f,
+    -0.917976846108772730f,
+  0.396457947707453960f, -0.918052882844770380f, 0.396281905984651680f,
+    -0.918128885826587910f,
+  0.396105849691696320f, -0.918204855051430900f, 0.395929778835061360f,
+    -0.918280790516506130f,
+  0.395753693421220080f, -0.918356692219021720f, 0.395577593456646950f,
+    -0.918432560156186790f,
+  0.395401478947816300f, -0.918508394325212250f, 0.395225349901203730f,
+    -0.918584194723309540f,
+  0.395049206323284880f, -0.918659961347691900f, 0.394873048220535760f,
+    -0.918735694195573550f,
+  0.394696875599433670f, -0.918811393264169940f, 0.394520688466455550f,
+    -0.918887058550697970f,
+  0.394344486828079650f, -0.918962690052375630f, 0.394168270690784250f,
+    -0.919038287766421940f,
+  0.393992040061048100f, -0.919113851690057770f, 0.393815794945351130f,
+    -0.919189381820504470f,
+  0.393639535350172880f, -0.919264878154985250f, 0.393463261281994380f,
+    -0.919340340690724230f,
+  0.393286972747296570f, -0.919415769424946960f, 0.393110669752560760f,
+    -0.919491164354880100f,
+  0.392934352304269600f, -0.919566525477751530f, 0.392758020408905280f,
+    -0.919641852790790470f,
+  0.392581674072951530f, -0.919717146291227360f, 0.392405313302891860f,
+    -0.919792405976293750f,
+  0.392228938105210370f, -0.919867631843222950f, 0.392052548486392200f,
+    -0.919942823889248640f,
+  0.391876144452922350f, -0.920017982111606570f, 0.391699726011287050f,
+    -0.920093106507533070f,
+  0.391523293167972350f, -0.920168197074266450f, 0.391346845929465610f,
+    -0.920243253809045370f,
+  0.391170384302253980f, -0.920318276709110480f, 0.390993908292825380f,
+    -0.920393265771703550f,
+  0.390817417907668610f, -0.920468220994067110f, 0.390640913153272370f,
+    -0.920543142373445480f,
+  0.390464394036126650f, -0.920618029907083860f, 0.390287860562721360f,
+    -0.920692883592229010f,
+  0.390111312739546910f, -0.920767703426128790f, 0.389934750573094790f,
+    -0.920842489406032080f,
+  0.389758174069856410f, -0.920917241529189520f, 0.389581583236324360f,
+    -0.920991959792852310f,
+  0.389404978078991100f, -0.921066644194273530f, 0.389228358604349730f,
+    -0.921141294730707270f,
+  0.389051724818894500f, -0.921215911399408730f, 0.388875076729119250f,
+    -0.921290494197634540f,
+  0.388698414341519250f, -0.921365043122642340f, 0.388521737662589740f,
+    -0.921439558171691320f,
+  0.388345046698826300f, -0.921514039342041900f, 0.388168341456725850f,
+    -0.921588486630955380f,
+  0.387991621942784910f, -0.921662900035694730f, 0.387814888163501290f,
+    -0.921737279553523800f,
+  0.387638140125372680f, -0.921811625181708120f, 0.387461377834897920f,
+    -0.921885936917513970f,
+  0.387284601298575890f, -0.921960214758209110f, 0.387107810522905990f,
+    -0.922034458701062820f,
+  0.386931005514388690f, -0.922108668743345070f, 0.386754186279524130f,
+    -0.922182844882327600f,
+  0.386577352824813980f, -0.922256987115283030f, 0.386400505156759610f,
+    -0.922331095439485330f,
+  0.386223643281862980f, -0.922405169852209880f, 0.386046767206627280f,
+    -0.922479210350733100f,
+  0.385869876937555310f, -0.922553216932332830f, 0.385692972481151200f,
+    -0.922627189594287800f,
+  0.385516053843919020f, -0.922701128333878520f, 0.385339121032363340f,
+    -0.922775033148386380f,
+  0.385162174052989970f, -0.922848904035094120f, 0.384985212912304200f,
+    -0.922922740991285680f,
+  0.384808237616812930f, -0.922996544014246250f, 0.384631248173022740f,
+    -0.923070313101262420f,
+  0.384454244587440870f, -0.923144048249621820f, 0.384277226866575620f,
+    -0.923217749456613500f,
+  0.384100195016935040f, -0.923291416719527640f, 0.383923149045028500f,
+    -0.923365050035655610f,
+  0.383746088957365010f, -0.923438649402290370f, 0.383569014760454960f,
+    -0.923512214816725520f,
+  0.383391926460808770f, -0.923585746276256560f, 0.383214824064937180f,
+    -0.923659243778179980f,
+  0.383037707579352130f, -0.923732707319793180f, 0.382860577010565360f,
+    -0.923806136898395410f,
+  0.382683432365089840f, -0.923879532511286740f, 0.382506273649438400f,
+    -0.923952894155768640f,
+  0.382329100870124510f, -0.924026221829143850f, 0.382151914033662720f,
+    -0.924099515528716280f,
+  0.381974713146567220f, -0.924172775251791200f, 0.381797498215353690f,
+    -0.924246000995674890f,
+  0.381620269246537520f, -0.924319192757675160f, 0.381443026246634730f,
+    -0.924392350535101050f,
+  0.381265769222162490f, -0.924465474325262600f, 0.381088498179637520f,
+    -0.924538564125471420f,
+  0.380911213125578130f, -0.924611619933039970f, 0.380733914066502090f,
+    -0.924684641745282530f,
+  0.380556601008928570f, -0.924757629559513910f, 0.380379273959376710f,
+    -0.924830583373050800f,
+  0.380201932924366050f, -0.924903503183210910f, 0.380024577910417380f,
+    -0.924976388987313050f,
+  0.379847208924051110f, -0.925049240782677580f, 0.379669825971789000f,
+    -0.925122058566625770f,
+  0.379492429060152740f, -0.925194842336480420f, 0.379315018195664430f,
+    -0.925267592089565550f,
+  0.379137593384847430f, -0.925340307823206200f, 0.378960154634224720f,
+    -0.925412989534729060f,
+  0.378782701950320600f, -0.925485637221461490f, 0.378605235339659290f,
+    -0.925558250880732620f,
+  0.378427754808765620f, -0.925630830509872720f, 0.378250260364165310f,
+    -0.925703376106213120f,
+  0.378072752012383990f, -0.925775887667086740f, 0.377895229759948550f,
+    -0.925848365189827270f,
+  0.377717693613385810f, -0.925920808671769960f, 0.377540143579222940f,
+    -0.925993218110251480f,
+  0.377362579663988450f, -0.926065593502609310f, 0.377185001874210450f,
+    -0.926137934846182560f,
+  0.377007410216418310f, -0.926210242138311270f, 0.376829804697141220f,
+    -0.926282515376337210f,
+  0.376652185322909620f, -0.926354754557602860f, 0.376474552100253880f,
+    -0.926426959679452100f,
+  0.376296905035704790f, -0.926499130739230510f, 0.376119244135794390f,
+    -0.926571267734284220f,
+  0.375941569407054420f, -0.926643370661961230f, 0.375763880856017750f,
+    -0.926715439519610330f,
+  0.375586178489217330f, -0.926787474304581750f, 0.375408462313186590f,
+    -0.926859475014227160f,
+  0.375230732334460030f, -0.926931441645899130f, 0.375052988559571860f,
+    -0.927003374196951670f,
+  0.374875230995057600f, -0.927075272664740100f, 0.374697459647452770f,
+    -0.927147137046620880f,
+  0.374519674523293210f, -0.927218967339951790f, 0.374341875629116030f,
+    -0.927290763542091720f,
+  0.374164062971457990f, -0.927362525650401110f, 0.373986236556857090f,
+    -0.927434253662241300f,
+  0.373808396391851370f, -0.927505947574975180f, 0.373630542482979280f,
+    -0.927577607385966730f,
+  0.373452674836780410f, -0.927649233092581180f, 0.373274793459794030f,
+    -0.927720824692185200f,
+  0.373096898358560690f, -0.927792382182146320f, 0.372918989539620770f,
+    -0.927863905559833780f,
+  0.372741067009515810f, -0.927935394822617890f, 0.372563130774787370f,
+    -0.928006849967869970f,
+  0.372385180841977360f, -0.928078270992963140f, 0.372207217217628950f,
+    -0.928149657895271150f,
+  0.372029239908284960f, -0.928221010672169440f, 0.371851248920489540f,
+    -0.928292329321034560f,
+  0.371673244260786630f, -0.928363613839244370f, 0.371495225935720760f,
+    -0.928434864224177980f,
+  0.371317193951837600f, -0.928506080473215480f, 0.371139148315682510f,
+    -0.928577262583738850f,
+  0.370961089033802040f, -0.928648410553130520f, 0.370783016112742720f,
+    -0.928719524378774700f,
+  0.370604929559051670f, -0.928790604058057020f, 0.370426829379276900f,
+    -0.928861649588363700f,
+  0.370248715579966360f, -0.928932660967082820f, 0.370070588167669130f,
+    -0.929003638191603360f,
+  0.369892447148934270f, -0.929074581259315750f, 0.369714292530311240f,
+    -0.929145490167611720f,
+  0.369536124318350760f, -0.929216364913883930f, 0.369357942519603190f,
+    -0.929287205495526790f,
+  0.369179747140620070f, -0.929358011909935500f, 0.369001538187952780f,
+    -0.929428784154506800f,
+  0.368823315668153960f, -0.929499522226638560f, 0.368645079587776150f,
+    -0.929570226123729860f,
+  0.368466829953372320f, -0.929640895843181330f, 0.368288566771496680f,
+    -0.929711531382394370f,
+  0.368110290048703050f, -0.929782132738772190f, 0.367931999791546500f,
+    -0.929852699909718750f,
+  0.367753696006582090f, -0.929923232892639560f, 0.367575378700365330f,
+    -0.929993731684941480f,
+  0.367397047879452820f, -0.930064196284032360f, 0.367218703550400930f,
+    -0.930134626687321390f,
+  0.367040345719767240f, -0.930205022892219070f, 0.366861974394109220f,
+    -0.930275384896137040f,
+  0.366683589579984930f, -0.930345712696488470f, 0.366505191283953480f,
+    -0.930416006290687550f,
+  0.366326779512573590f, -0.930486265676149780f, 0.366148354272405390f,
+    -0.930556490850291800f,
+  0.365969915570008910f, -0.930626681810531650f, 0.365791463411944570f,
+    -0.930696838554288860f,
+  0.365612997804773960f, -0.930766961078983710f, 0.365434518755058390f,
+    -0.930837049382038150f,
+  0.365256026269360380f, -0.930907103460875020f, 0.365077520354242180f,
+    -0.930977123312918930f,
+  0.364899001016267380f, -0.931047108935595170f, 0.364720468261999390f,
+    -0.931117060326330790f,
+  0.364541922098002180f, -0.931186977482553750f, 0.364363362530840730f,
+    -0.931256860401693420f,
+  0.364184789567079840f, -0.931326709081180430f, 0.364006203213285530f,
+    -0.931396523518446600f,
+  0.363827603476023610f, -0.931466303710925090f, 0.363648990361860550f,
+    -0.931536049656050300f,
+  0.363470363877363870f, -0.931605761351257830f, 0.363291724029100700f,
+    -0.931675438793984620f,
+  0.363113070823639530f, -0.931745081981668720f, 0.362934404267548750f,
+    -0.931814690911749620f,
+  0.362755724367397230f, -0.931884265581668150f, 0.362577031129754870f,
+    -0.931953805988865900f,
+  0.362398324561191310f, -0.932023312130786490f, 0.362219604668277570f,
+    -0.932092784004874050f,
+  0.362040871457584350f, -0.932162221608574320f, 0.361862124935682980f,
+    -0.932231624939334540f,
+  0.361683365109145950f, -0.932300993994602640f, 0.361504591984545260f,
+    -0.932370328771828460f,
+  0.361325805568454340f, -0.932439629268462360f, 0.361147005867446190f,
+    -0.932508895481956700f,
+  0.360968192888095290f, -0.932578127409764420f, 0.360789366636975690f,
+    -0.932647325049340340f,
+  0.360610527120662270f, -0.932716488398140250f, 0.360431674345730810f,
+    -0.932785617453620990f,
+  0.360252808318756830f, -0.932854712213241230f, 0.360073929046317080f,
+    -0.932923772674460140f,
+  0.359895036534988280f, -0.932992798834738850f, 0.359716130791347570f,
+    -0.933061790691539380f,
+  0.359537211821973180f, -0.933130748242325110f, 0.359358279633443080f,
+    -0.933199671484560730f,
+  0.359179334232336560f, -0.933268560415712050f, 0.359000375625232630f,
+    -0.933337415033246080f,
+  0.358821403818710920f, -0.933406235334631520f, 0.358642418819352100f,
+    -0.933475021317337950f,
+  0.358463420633736540f, -0.933543772978836170f, 0.358284409268445900f,
+    -0.933612490316598540f,
+  0.358105384730061760f, -0.933681173328098300f, 0.357926347025166070f,
+    -0.933749822010810580f,
+  0.357747296160342010f, -0.933818436362210960f, 0.357568232142172260f,
+    -0.933887016379776890f,
+  0.357389154977241000f, -0.933955562060986730f, 0.357210064672131900f,
+    -0.934024073403320500f,
+  0.357030961233430030f, -0.934092550404258870f, 0.356851844667720410f,
+    -0.934160993061284420f,
+  0.356672714981588260f, -0.934229401371880820f, 0.356493572181620200f,
+    -0.934297775333532530f,
+  0.356314416274402360f, -0.934366114943725900f, 0.356135247266522180f,
+    -0.934434420199948050f,
+  0.355956065164567010f, -0.934502691099687870f, 0.355776869975124640f,
+    -0.934570927640435030f,
+  0.355597661704783960f, -0.934639129819680780f, 0.355418440360133590f,
+    -0.934707297634917440f,
+  0.355239205947763370f, -0.934775431083638700f, 0.355059958474263030f,
+    -0.934843530163339430f,
+  0.354880697946222790f, -0.934911594871516090f, 0.354701424370233940f,
+    -0.934979625205665800f,
+  0.354522137752887430f, -0.935047621163287430f, 0.354342838100775600f,
+    -0.935115582741880890f,
+  0.354163525420490510f, -0.935183509938947500f, 0.353984199718624830f,
+    -0.935251402751989810f,
+  0.353804861001772160f, -0.935319261178511500f, 0.353625509276525970f,
+    -0.935387085216017770f,
+  0.353446144549480870f, -0.935454874862014620f, 0.353266766827231180f,
+    -0.935522630114009930f,
+  0.353087376116372530f, -0.935590350969512370f, 0.352907972423500360f,
+    -0.935658037426032040f,
+  0.352728555755210730f, -0.935725689481080370f, 0.352549126118100580f,
+    -0.935793307132169900f,
+  0.352369683518766630f, -0.935860890376814640f, 0.352190227963806890f,
+    -0.935928439212529660f,
+  0.352010759459819240f, -0.935995953636831300f, 0.351831278013402030f,
+    -0.936063433647237540f,
+  0.351651783631154680f, -0.936130879241266920f, 0.351472276319676260f,
+    -0.936198290416440090f,
+  0.351292756085567150f, -0.936265667170278260f, 0.351113222935427630f,
+    -0.936333009500304180f,
+  0.350933676875858360f, -0.936400317404042060f, 0.350754117913461170f,
+    -0.936467590879016880f,
+  0.350574546054837570f, -0.936534829922755500f, 0.350394961306590200f,
+    -0.936602034532785570f,
+  0.350215363675321740f, -0.936669204706636060f, 0.350035753167635300f,
+    -0.936736340441837620f,
+  0.349856129790135030f, -0.936803441735921560f, 0.349676493549424760f,
+    -0.936870508586420960f,
+  0.349496844452109600f, -0.936937540990869900f, 0.349317182504794320f,
+    -0.937004538946803690f,
+  0.349137507714085030f, -0.937071502451759190f, 0.348957820086587600f,
+    -0.937138431503274140f,
+  0.348778119628908420f, -0.937205326098887960f, 0.348598406347655040f,
+    -0.937272186236140950f,
+  0.348418680249434510f, -0.937339011912574960f, 0.348238941340855310f,
+    -0.937405803125732850f,
+  0.348059189628525780f, -0.937472559873159140f, 0.347879425119054510f,
+    -0.937539282152399230f,
+  0.347699647819051490f, -0.937605969960999990f, 0.347519857735126110f,
+    -0.937672623296509470f,
+  0.347340054873889190f, -0.937739242156476970f, 0.347160239241951330f,
+    -0.937805826538453010f,
+  0.346980410845923680f, -0.937872376439989890f, 0.346800569692418400f,
+    -0.937938891858640210f,
+  0.346620715788047320f, -0.938005372791958840f, 0.346440849139423580f,
+    -0.938071819237501160f,
+  0.346260969753160170f, -0.938138231192824360f, 0.346081077635870480f,
+    -0.938204608655486490f,
+  0.345901172794169100f, -0.938270951623047080f, 0.345721255234670120f,
+    -0.938337260093066950f,
+  0.345541324963989150f, -0.938403534063108060f, 0.345361381988741170f,
+    -0.938469773530733800f,
+  0.345181426315542610f, -0.938535978493508560f, 0.345001457951009780f,
+    -0.938602148948998290f,
+  0.344821476901759290f, -0.938668284894770170f, 0.344641483174409070f,
+    -0.938734386328392460f,
+  0.344461476775576480f, -0.938800453247434770f, 0.344281457711880230f,
+    -0.938866485649468060f,
+  0.344101425989938980f, -0.938932483532064490f, 0.343921381616371700f,
+    -0.938998446892797540f,
+  0.343741324597798600f, -0.939064375729241950f, 0.343561254940839330f,
+    -0.939130270038973650f,
+  0.343381172652115100f, -0.939196129819569900f, 0.343201077738246710f,
+    -0.939261955068609100f,
+  0.343020970205855540f, -0.939327745783671400f, 0.342840850061564060f,
+    -0.939393501962337510f,
+  0.342660717311994380f, -0.939459223602189920f, 0.342480571963769850f,
+    -0.939524910700812120f,
+  0.342300414023513690f, -0.939590563255789160f, 0.342120243497849590f,
+    -0.939656181264707070f,
+  0.341940060393402300f, -0.939721764725153340f, 0.341759864716796310f,
+    -0.939787313634716570f,
+  0.341579656474657210f, -0.939852827990986680f, 0.341399435673610360f,
+    -0.939918307791555050f,
+  0.341219202320282410f, -0.939983753034013940f, 0.341038956421299830f,
+    -0.940049163715957370f,
+  0.340858697983289440f, -0.940114539834980280f, 0.340678427012879310f,
+    -0.940179881388678810f,
+  0.340498143516697100f, -0.940245188374650880f, 0.340317847501371730f,
+    -0.940310460790495070f,
+  0.340137538973531880f, -0.940375698633811540f, 0.339957217939806880f,
+    -0.940440901902201750f,
+  0.339776884406826960f, -0.940506070593268300f, 0.339596538381222060f,
+    -0.940571204704615190f,
+  0.339416179869623410f, -0.940636304233847590f, 0.339235808878662120f,
+    -0.940701369178571940f,
+  0.339055425414969640f, -0.940766399536396070f, 0.338875029485178560f,
+    -0.940831395304928870f,
+  0.338694621095921190f, -0.940896356481780830f, 0.338514200253831000f,
+    -0.940961283064563280f,
+  0.338333766965541290f, -0.941026175050889260f, 0.338153321237685990f,
+    -0.941091032438372780f,
+  0.337972863076899830f, -0.941155855224629190f, 0.337792392489817460f,
+    -0.941220643407275180f,
+  0.337611909483074680f, -0.941285396983928660f, 0.337431414063306790f,
+    -0.941350115952208970f,
+  0.337250906237150650f, -0.941414800309736230f, 0.337070386011242730f,
+    -0.941479450054132580f,
+  0.336889853392220050f, -0.941544065183020810f, 0.336709308386720700f,
+    -0.941608645694025140f,
+  0.336528751001382350f, -0.941673191584771360f, 0.336348181242844100f,
+    -0.941737702852886160f,
+  0.336167599117744690f, -0.941802179495997650f, 0.335987004632723350f,
+    -0.941866621511735280f,
+  0.335806397794420560f, -0.941931028897729510f, 0.335625778609476230f,
+    -0.941995401651612550f,
+  0.335445147084531660f, -0.942059739771017310f, 0.335264503226227970f,
+    -0.942124043253578460f,
+  0.335083847041206580f, -0.942188312096931770f, 0.334903178536110290f,
+    -0.942252546298714020f,
+  0.334722497717581220f, -0.942316745856563780f, 0.334541804592262960f,
+    -0.942380910768120470f,
+  0.334361099166798900f, -0.942445041031024890f, 0.334180381447832740f,
+    -0.942509136642919240f,
+  0.333999651442009490f, -0.942573197601446870f, 0.333818909155973620f,
+    -0.942637223904252530f,
+  0.333638154596370920f, -0.942701215548981900f, 0.333457387769846790f,
+    -0.942765172533282510f,
+  0.333276608683047980f, -0.942829094854802710f, 0.333095817342620890f,
+    -0.942892982511192130f,
+  0.332915013755212650f, -0.942956835500102120f, 0.332734197927471160f,
+    -0.943020653819184650f,
+  0.332553369866044220f, -0.943084437466093490f, 0.332372529577580680f,
+    -0.943148186438483420f,
+  0.332191677068729320f, -0.943211900734010620f, 0.332010812346139380f,
+    -0.943275580350332540f,
+  0.331829935416461220f, -0.943339225285107720f, 0.331649046286344620f,
+    -0.943402835535996240f,
+  0.331468144962440920f, -0.943466411100659320f, 0.331287231451400990f,
+    -0.943529951976759370f,
+  0.331106305759876430f, -0.943593458161960390f, 0.330925367894519650f,
+    -0.943656929653927110f,
+  0.330744417861982890f, -0.943720366450326200f, 0.330563455668919590f,
+    -0.943783768548825060f,
+  0.330382481321982950f, -0.943847135947092690f, 0.330201494827826620f,
+    -0.943910468642799150f,
+  0.330020496193105530f, -0.943973766633615980f, 0.329839485424473940f,
+    -0.944037029917215830f,
+  0.329658462528587550f, -0.944100258491272660f, 0.329477427512101680f,
+    -0.944163452353461770f,
+  0.329296380381672800f, -0.944226611501459810f, 0.329115321143957360f,
+    -0.944289735932944410f,
+  0.328934249805612200f, -0.944352825645594750f, 0.328753166373295100f,
+    -0.944415880637091250f,
+  0.328572070853663690f, -0.944478900905115550f, 0.328390963253376630f,
+    -0.944541886447350380f,
+  0.328209843579092660f, -0.944604837261480260f, 0.328028711837470730f,
+    -0.944667753345190490f,
+  0.327847568035170960f, -0.944730634696167800f, 0.327666412178853060f,
+    -0.944793481312100280f,
+  0.327485244275178060f, -0.944856293190677210f, 0.327304064330806830f,
+    -0.944919070329589220f,
+  0.327122872352400510f, -0.944981812726528150f, 0.326941668346621530f,
+    -0.945044520379187070f,
+  0.326760452320131790f, -0.945107193285260610f, 0.326579224279594460f,
+    -0.945169831442444150f,
+  0.326397984231672660f, -0.945232434848434890f, 0.326216732183029770f,
+    -0.945295003500931100f,
+  0.326035468140330350f, -0.945357537397632290f, 0.325854192110238580f,
+    -0.945420036536239070f,
+  0.325672904099419900f, -0.945482500914453740f, 0.325491604114539260f,
+    -0.945544930529979680f,
+  0.325310292162262980f, -0.945607325380521280f, 0.325128968249257190f,
+    -0.945669685463784710f,
+  0.324947632382188430f, -0.945732010777477150f, 0.324766284567724330f,
+    -0.945794301319306860f,
+  0.324584924812532150f, -0.945856557086983910f, 0.324403553123280290f,
+    -0.945918778078219110f,
+  0.324222169506637130f, -0.945980964290724760f, 0.324040773969271450f,
+    -0.946043115722214560f,
+  0.323859366517852960f, -0.946105232370403340f, 0.323677947159051180f,
+    -0.946167314233007370f,
+  0.323496515899536760f, -0.946229361307743820f, 0.323315072745980150f,
+    -0.946291373592331510f,
+  0.323133617705052330f, -0.946353351084490590f, 0.322952150783425370f,
+    -0.946415293781942110f,
+  0.322770671987770710f, -0.946477201682408680f, 0.322589181324761390f,
+    -0.946539074783614100f,
+  0.322407678801070020f, -0.946600913083283530f, 0.322226164423369650f,
+    -0.946662716579143360f,
+  0.322044638198334620f, -0.946724485268921170f, 0.321863100132638580f,
+    -0.946786219150346000f,
+  0.321681550232956640f, -0.946847918221148000f, 0.321499988505963450f,
+    -0.946909582479058760f,
+  0.321318414958334910f, -0.946971211921810880f, 0.321136829596746780f,
+    -0.947032806547138620f,
+  0.320955232427875210f, -0.947094366352777220f, 0.320773623458397440f,
+    -0.947155891336463270f,
+  0.320592002694990330f, -0.947217381495934820f, 0.320410370144331880f,
+    -0.947278836828930880f,
+  0.320228725813100020f, -0.947340257333191940f, 0.320047069707973140f,
+    -0.947401643006459900f,
+  0.319865401835630610f, -0.947462993846477700f, 0.319683722202751370f,
+    -0.947524309850989570f,
+  0.319502030816015750f, -0.947585591017741090f, 0.319320327682103720f,
+    -0.947646837344479190f,
+  0.319138612807695900f, -0.947708048828952100f, 0.318956886199473770f,
+    -0.947769225468909180f,
+  0.318775147864118480f, -0.947830367262101010f, 0.318593397808312470f,
+    -0.947891474206279730f,
+  0.318411636038737960f, -0.947952546299198560f, 0.318229862562077580f,
+    -0.948013583538612200f,
+  0.318048077385015060f, -0.948074585922276230f, 0.317866280514233660f,
+    -0.948135553447947980f,
+  0.317684471956418020f, -0.948196486113385580f, 0.317502651718252260f,
+    -0.948257383916349060f,
+  0.317320819806421790f, -0.948318246854599090f, 0.317138976227611890f,
+    -0.948379074925898120f,
+  0.316957120988508150f, -0.948439868128009620f, 0.316775254095797380f,
+    -0.948500626458698260f,
+  0.316593375556165850f, -0.948561349915730270f, 0.316411485376301090f,
+    -0.948622038496872990f,
+  0.316229583562890490f, -0.948682692199895090f, 0.316047670122621860f,
+    -0.948743311022566480f,
+  0.315865745062184070f, -0.948803894962658380f, 0.315683808388265600f,
+    -0.948864444017943340f,
+  0.315501860107556040f, -0.948924958186195160f, 0.315319900226745050f,
+    -0.948985437465188710f,
+  0.315137928752522440f, -0.949045881852700560f, 0.314955945691579250f,
+    -0.949106291346508260f,
+  0.314773951050606070f, -0.949166665944390700f, 0.314591944836294710f,
+    -0.949227005644128210f,
+  0.314409927055336820f, -0.949287310443502010f, 0.314227897714424500f,
+    -0.949347580340295210f,
+  0.314045856820250820f, -0.949407815332291460f, 0.313863804379508500f,
+    -0.949468015417276550f,
+  0.313681740398891570f, -0.949528180593036670f, 0.313499664885093450f,
+    -0.949588310857359950f,
+  0.313317577844809070f, -0.949648406208035480f, 0.313135479284732950f,
+    -0.949708466642853800f,
+  0.312953369211560200f, -0.949768492159606680f, 0.312771247631986880f,
+    -0.949828482756087000f,
+  0.312589114552708660f, -0.949888438430089300f, 0.312406969980422500f,
+    -0.949948359179409010f,
+  0.312224813921825050f, -0.950008245001843000f, 0.312042646383613510f,
+    -0.950068095895189590f,
+  0.311860467372486130f, -0.950127911857248100f, 0.311678276895140550f,
+    -0.950187692885819280f,
+  0.311496074958275970f, -0.950247438978705230f, 0.311313861568591090f,
+    -0.950307150133709140f,
+  0.311131636732785270f, -0.950366826348635780f, 0.310949400457558760f,
+    -0.950426467621290900f,
+  0.310767152749611470f, -0.950486073949481700f, 0.310584893615644560f,
+    -0.950545645331016600f,
+  0.310402623062358880f, -0.950605181763705230f, 0.310220341096455910f,
+    -0.950664683245358910f,
+  0.310038047724638000f, -0.950724149773789610f, 0.309855742953607130f,
+    -0.950783581346811070f,
+  0.309673426790066490f, -0.950842977962238160f, 0.309491099240719050f,
+    -0.950902339617887060f,
+  0.309308760312268780f, -0.950961666311575080f, 0.309126410011419550f,
+    -0.951020958041121080f,
+  0.308944048344875710f, -0.951080214804345010f, 0.308761675319342570f,
+    -0.951139436599068190f,
+  0.308579290941525030f, -0.951198623423113230f, 0.308396895218129240f,
+    -0.951257775274304000f,
+  0.308214488155861220f, -0.951316892150465550f, 0.308032069761427330f,
+    -0.951375974049424420f,
+  0.307849640041534980f, -0.951435020969008340f, 0.307667199002891190f,
+    -0.951494032907046370f,
+  0.307484746652204160f, -0.951553009861368590f, 0.307302282996181950f,
+    -0.951611951829806730f,
+  0.307119808041533100f, -0.951670858810193860f, 0.306937321794967020f,
+    -0.951729730800363720f,
+  0.306754824263192780f, -0.951788567798152130f, 0.306572315452920800f,
+    -0.951847369801395620f,
+  0.306389795370861080f, -0.951906136807932230f, 0.306207264023724280f,
+    -0.951964868815601380f,
+  0.306024721418221900f, -0.952023565822243570f, 0.305842167561065080f,
+    -0.952082227825700620f,
+  0.305659602458966230f, -0.952140854823815830f, 0.305477026118637360f,
+    -0.952199446814433580f,
+  0.305294438546791720f, -0.952258003795399600f, 0.305111839750142220f,
+    -0.952316525764560830f,
+  0.304929229735402430f, -0.952375012719765880f, 0.304746608509286640f,
+    -0.952433464658864030f,
+  0.304563976078509050f, -0.952491881579706320f, 0.304381332449784940f,
+    -0.952550263480144930f,
+  0.304198677629829270f, -0.952608610358033240f, 0.304016011625357570f,
+    -0.952666922211226170f,
+  0.303833334443086470f, -0.952725199037579570f, 0.303650646089731910f,
+    -0.952783440834950920f,
+  0.303467946572011370f, -0.952841647601198720f, 0.303285235896641910f,
+    -0.952899819334182880f,
+  0.303102514070341060f, -0.952957956031764700f, 0.302919781099827420f,
+    -0.953016057691806530f,
+  0.302737036991819140f, -0.953074124312172200f, 0.302554281753035670f,
+    -0.953132155890726750f,
+  0.302371515390196130f, -0.953190152425336560f, 0.302188737910020040f,
+    -0.953248113913869320f,
+  0.302005949319228200f, -0.953306040354193750f, 0.301823149624540650f,
+    -0.953363931744180330f,
+  0.301640338832678880f, -0.953421788081700310f, 0.301457516950363940f,
+    -0.953479609364626610f,
+  0.301274683984318000f, -0.953537395590833280f, 0.301091839941263210f,
+    -0.953595146758195680f,
+  0.300908984827921890f, -0.953652862864590500f, 0.300726118651017620f,
+    -0.953710543907895560f,
+  0.300543241417273400f, -0.953768189885990330f, 0.300360353133413580f,
+    -0.953825800796755050f,
+  0.300177453806162120f, -0.953883376638071770f, 0.299994543442243580f,
+    -0.953940917407823500f,
+  0.299811622048383460f, -0.953998423103894490f, 0.299628689631306790f,
+    -0.954055893724170660f,
+  0.299445746197739950f, -0.954113329266538800f, 0.299262791754409010f,
+    -0.954170729728887280f,
+  0.299079826308040480f, -0.954228095109105670f, 0.298896849865361910f,
+    -0.954285425405084650f,
+  0.298713862433100390f, -0.954342720614716480f, 0.298530864017984230f,
+    -0.954399980735894490f,
+  0.298347854626741570f, -0.954457205766513490f, 0.298164834266100910f,
+    -0.954514395704469500f,
+  0.297981802942791920f, -0.954571550547659630f, 0.297798760663543550f,
+    -0.954628670293982680f,
+  0.297615707435086310f, -0.954685754941338340f, 0.297432643264150030f,
+    -0.954742804487627940f,
+  0.297249568157465890f, -0.954799818930753720f, 0.297066482121764840f,
+    -0.954856798268619580f,
+  0.296883385163778270f, -0.954913742499130520f, 0.296700277290238460f,
+    -0.954970651620192790f,
+  0.296517158507877410f, -0.955027525629714160f, 0.296334028823428240f,
+    -0.955084364525603410f,
+  0.296150888243623960f, -0.955141168305770670f, 0.295967736775197890f,
+    -0.955197936968127710f,
+  0.295784574424884370f, -0.955254670510586990f, 0.295601401199417360f,
+    -0.955311368931062720f,
+  0.295418217105532070f, -0.955368032227470240f, 0.295235022149963390f,
+    -0.955424660397726330f,
+  0.295051816339446720f, -0.955481253439748770f, 0.294868599680718380f,
+    -0.955537811351456770f,
+  0.294685372180514330f, -0.955594334130771110f, 0.294502133845571720f,
+    -0.955650821775613220f,
+  0.294318884682627570f, -0.955707274283906560f, 0.294135624698419080f,
+    -0.955763691653575440f,
+  0.293952353899684770f, -0.955820073882545420f, 0.293769072293162400f,
+    -0.955876420968743590f,
+  0.293585779885591310f, -0.955932732910098170f, 0.293402476683710060f,
+    -0.955989009704538930f,
+  0.293219162694258680f, -0.956045251349996410f, 0.293035837923976920f,
+    -0.956101457844403040f,
+  0.292852502379604810f, -0.956157629185692140f, 0.292669156067883570f,
+    -0.956213765371798470f,
+  0.292485798995553830f, -0.956269866400658140f, 0.292302431169357610f,
+    -0.956325932270208230f,
+  0.292119052596036540f, -0.956381962978387620f, 0.291935663282332780f,
+    -0.956437958523136180f,
+  0.291752263234989370f, -0.956493918902394990f, 0.291568852460749040f,
+    -0.956549844114106820f,
+  0.291385430966355720f, -0.956605734156215080f, 0.291201998758553020f,
+    -0.956661589026664980f,
+  0.291018555844085090f, -0.956717408723403050f, 0.290835102229696940f,
+    -0.956773193244376930f,
+  0.290651637922133220f, -0.956828942587535370f, 0.290468162928139870f,
+    -0.956884656750828900f,
+  0.290284677254462330f, -0.956940335732208940f, 0.290101180907847140f,
+    -0.956995979529628230f,
+  0.289917673895040860f, -0.957051588141040970f, 0.289734156222790250f,
+    -0.957107161564402790f,
+  0.289550627897843140f, -0.957162699797670100f, 0.289367088926946960f,
+    -0.957218202838801210f,
+  0.289183539316850310f, -0.957273670685755200f, 0.288999979074301530f,
+    -0.957329103336492790f,
+  0.288816408206049480f, -0.957384500788975860f, 0.288632826718843940f,
+    -0.957439863041167570f,
+  0.288449234619434170f, -0.957495190091032570f, 0.288265631914570830f,
+    -0.957550481936536470f,
+  0.288082018611004300f, -0.957605738575646240f, 0.287898394715485170f,
+    -0.957660960006330610f,
+  0.287714760234765280f, -0.957716146226558870f, 0.287531115175595930f,
+    -0.957771297234302320f,
+  0.287347459544729570f, -0.957826413027532910f, 0.287163793348918560f,
+    -0.957881493604224250f,
+  0.286980116594915570f, -0.957936538962351420f, 0.286796429289474190f,
+    -0.957991549099890370f,
+  0.286612731439347790f, -0.958046524014818600f, 0.286429023051290750f,
+    -0.958101463705114620f,
+  0.286245304132057120f, -0.958156368168758820f, 0.286061574688402100f,
+    -0.958211237403732260f,
+  0.285877834727080730f, -0.958266071408017670f, 0.285694084254848320f,
+    -0.958320870179598880f,
+  0.285510323278461380f, -0.958375633716461170f, 0.285326551804675810f,
+    -0.958430362016591040f,
+  0.285142769840248720f, -0.958485055077976100f, 0.284958977391937150f,
+    -0.958539712898605730f,
+  0.284775174466498300f, -0.958594335476470220f, 0.284591361070690550f,
+    -0.958648922809561040f,
+  0.284407537211271820f, -0.958703474895871600f, 0.284223702895001100f,
+    -0.958757991733395710f,
+  0.284039858128637360f, -0.958812473320129200f, 0.283856002918939750f,
+    -0.958866919654069010f,
+  0.283672137272668550f, -0.958921330733213060f, 0.283488261196583550f,
+    -0.958975706555561080f,
+  0.283304374697445790f, -0.959030047119113550f, 0.283120477782015990f,
+    -0.959084352421872730f,
+  0.282936570457055390f, -0.959138622461841890f, 0.282752652729326040f,
+    -0.959192857237025740f,
+  0.282568724605589740f, -0.959247056745430090f, 0.282384786092609420f,
+    -0.959301220985062210f,
+  0.282200837197147500f, -0.959355349953930790f, 0.282016877925967690f,
+    -0.959409443650045550f,
+  0.281832908285833460f, -0.959463502071417510f, 0.281648928283508680f,
+    -0.959517525216059260f,
+  0.281464937925758050f, -0.959571513081984520f, 0.281280937219346110f,
+    -0.959625465667208300f,
+  0.281096926171038320f, -0.959679382969746750f, 0.280912904787600120f,
+    -0.959733264987617680f,
+  0.280728873075797190f, -0.959787111718839900f, 0.280544831042396360f,
+    -0.959840923161433660f,
+  0.280360778694163810f, -0.959894699313420530f, 0.280176716037867040f,
+    -0.959948440172823210f,
+  0.279992643080273380f, -0.960002145737665850f, 0.279808559828150390f,
+    -0.960055816005973890f,
+  0.279624466288266700f, -0.960109450975773940f, 0.279440362467390510f,
+    -0.960163050645094000f,
+  0.279256248372291240f, -0.960216615011963430f, 0.279072124009737970f,
+    -0.960270144074412800f,
+  0.278887989386500280f, -0.960323637830473920f, 0.278703844509348600f,
+    -0.960377096278180130f,
+  0.278519689385053060f, -0.960430519415565790f, 0.278335524020384970f,
+    -0.960483907240666790f,
+  0.278151348422115090f, -0.960537259751520050f, 0.277967162597015430f,
+    -0.960590576946164120f,
+  0.277782966551857800f, -0.960643858822638470f, 0.277598760293414290f,
+    -0.960697105378984450f,
+  0.277414543828458200f, -0.960750316613243950f, 0.277230317163762120f,
+    -0.960803492523460760f,
+  0.277046080306099950f, -0.960856633107679660f, 0.276861833262245390f,
+    -0.960909738363946770f,
+  0.276677576038972420f, -0.960962808290309780f, 0.276493308643056100f,
+    -0.961015842884817230f,
+  0.276309031081271030f, -0.961068842145519350f, 0.276124743360392890f,
+    -0.961121806070467380f,
+  0.275940445487197320f, -0.961174734657714080f, 0.275756137468460120f,
+    -0.961227627905313460f,
+  0.275571819310958250f, -0.961280485811320640f, 0.275387491021468140f,
+    -0.961333308373792270f,
+  0.275203152606767370f, -0.961386095590786250f, 0.275018804073633380f,
+    -0.961438847460361570f,
+  0.274834445428843940f, -0.961491563980579000f, 0.274650076679177790f,
+    -0.961544245149499990f,
+  0.274465697831413220f, -0.961596890965187860f, 0.274281308892329710f,
+    -0.961649501425706820f,
+  0.274096909868706330f, -0.961702076529122540f, 0.273912500767323320f,
+    -0.961754616273502010f,
+  0.273728081594960650f, -0.961807120656913540f, 0.273543652358398730f,
+    -0.961859589677426570f,
+  0.273359213064418790f, -0.961912023333112100f, 0.273174763719801870f,
+    -0.961964421622042320f,
+  0.272990304331329980f, -0.962016784542290560f, 0.272805834905784920f,
+    -0.962069112091931580f,
+  0.272621355449948980f, -0.962121404269041580f, 0.272436865970605350f,
+    -0.962173661071697770f,
+  0.272252366474536660f, -0.962225882497979020f, 0.272067856968526980f,
+    -0.962278068545965090f,
+  0.271883337459359890f, -0.962330219213737400f, 0.271698807953819510f,
+    -0.962382334499378380f,
+  0.271514268458690810f, -0.962434414400971990f, 0.271329718980758420f,
+    -0.962486458916603450f,
+  0.271145159526808070f, -0.962538468044359160f, 0.270960590103625330f,
+    -0.962590441782326780f,
+  0.270776010717996010f, -0.962642380128595710f, 0.270591421376707050f,
+    -0.962694283081255930f,
+  0.270406822086544820f, -0.962746150638399410f, 0.270222212854296930f,
+    -0.962797982798119010f,
+  0.270037593686750510f, -0.962849779558509030f, 0.269852964590693910f,
+    -0.962901540917665000f,
+  0.269668325572915200f, -0.962953266873683880f, 0.269483676640202840f,
+    -0.963004957424663850f,
+  0.269299017799346230f, -0.963056612568704340f, 0.269114349057134330f,
+    -0.963108232303906190f,
+  0.268929670420357310f, -0.963159816628371360f, 0.268744981895805090f,
+    -0.963211365540203480f,
+  0.268560283490267890f, -0.963262879037507070f, 0.268375575210537010f,
+    -0.963314357118388090f,
+  0.268190857063403180f, -0.963365799780954050f, 0.268006129055658350f,
+    -0.963417207023313350f,
+  0.267821391194094320f, -0.963468578843575950f, 0.267636643485503090f,
+    -0.963519915239853140f,
+  0.267451885936677740f, -0.963571216210257210f, 0.267267118554410930f,
+    -0.963622481752902220f,
+  0.267082341345496350f, -0.963673711865903230f, 0.266897554316727510f,
+    -0.963724906547376410f,
+  0.266712757474898420f, -0.963776065795439840f, 0.266527950826803810f,
+    -0.963827189608212340f,
+  0.266343134379238180f, -0.963878277983814200f, 0.266158308138997050f,
+    -0.963929330920367140f,
+  0.265973472112875530f, -0.963980348415994110f, 0.265788626307669970f,
+    -0.964031330468819280f,
+  0.265603770730176440f, -0.964082277076968140f, 0.265418905387191260f,
+    -0.964133188238567640f,
+  0.265234030285511900f, -0.964184063951745720f, 0.265049145431935200f,
+    -0.964234904214632200f,
+  0.264864250833259320f, -0.964285709025357370f, 0.264679346496282050f,
+    -0.964336478382053720f,
+  0.264494432427801630f, -0.964387212282854290f, 0.264309508634617220f,
+    -0.964437910725893910f,
+  0.264124575123527490f, -0.964488573709308410f, 0.263939631901332410f,
+    -0.964539201231235150f,
+  0.263754678974831510f, -0.964589793289812650f, 0.263569716350824880f,
+    -0.964640349883180930f,
+  0.263384744036113390f, -0.964690871009480920f, 0.263199762037497560f,
+    -0.964741356666855340f,
+  0.263014770361779060f, -0.964791806853447900f, 0.262829769015759330f,
+    -0.964842221567403510f,
+  0.262644758006240100f, -0.964892600806868890f, 0.262459737340024090f,
+    -0.964942944569991410f,
+  0.262274707023913590f, -0.964993252854920320f, 0.262089667064712100f,
+    -0.965043525659805890f,
+  0.261904617469222560f, -0.965093762982799590f, 0.261719558244249080f,
+    -0.965143964822054450f,
+  0.261534489396595630f, -0.965194131175724720f, 0.261349410933066350f,
+    -0.965244262041965780f,
+  0.261164322860466590f, -0.965294357418934660f, 0.260979225185601020f,
+    -0.965344417304789370f,
+  0.260794117915275570f, -0.965394441697689400f, 0.260609001056295920f,
+    -0.965444430595795430f,
+  0.260423874615468010f, -0.965494383997269500f, 0.260238738599598950f,
+    -0.965544301900275070f,
+  0.260053593015495130f, -0.965594184302976830f, 0.259868437869964330f,
+    -0.965644031203540590f,
+  0.259683273169813930f, -0.965693842600133690f, 0.259498098921851660f,
+    -0.965743618490924830f,
+  0.259312915132886350f, -0.965793358874083570f, 0.259127721809726150f,
+    -0.965843063747781510f,
+  0.258942518959180580f, -0.965892733110190860f, 0.258757306588058840f,
+    -0.965942366959485540f,
+  0.258572084703170390f, -0.965991965293840570f, 0.258386853311325710f,
+    -0.966041528111432400f,
+  0.258201612419334870f, -0.966091055410438830f, 0.258016362034009070f,
+    -0.966140547189038750f,
+  0.257831102162158930f, -0.966190003445412620f, 0.257645832810596440f,
+    -0.966239424177741890f,
+  0.257460553986133210f, -0.966288809384209580f, 0.257275265695581120f,
+    -0.966338159063000130f,
+  0.257089967945753230f, -0.966387473212298790f, 0.256904660743461850f,
+    -0.966436751830292650f,
+  0.256719344095520720f, -0.966485994915169840f, 0.256534018008743200f,
+    -0.966535202465119700f,
+  0.256348682489942910f, -0.966584374478333120f, 0.256163337545934570f,
+    -0.966633510953002100f,
+  0.255977983183532380f, -0.966682611887320190f, 0.255792619409551670f,
+    -0.966731677279481840f,
+  0.255607246230807550f, -0.966780707127683270f, 0.255421863654115460f,
+    -0.966829701430121810f,
+  0.255236471686291820f, -0.966878660184995910f, 0.255051070334152530f,
+    -0.966927583390505660f,
+  0.254865659604514630f, -0.966976471044852070f, 0.254680239504194990f,
+    -0.967025323146237900f,
+  0.254494810040010790f, -0.967074139692867040f, 0.254309371218780110f,
+    -0.967122920682944360f,
+  0.254123923047320620f, -0.967171666114676640f, 0.253938465532451140f,
+    -0.967220375986271310f,
+  0.253752998680989940f, -0.967269050295937790f, 0.253567522499756610f,
+    -0.967317689041886310f,
+  0.253382036995570270f, -0.967366292222328510f, 0.253196542175250560f,
+    -0.967414859835477480f,
+  0.253011038045617980f, -0.967463391879547440f, 0.252825524613492610f,
+    -0.967511888352754150f,
+  0.252640001885695580f, -0.967560349253314360f, 0.252454469869047900f,
+    -0.967608774579446380f,
+  0.252268928570370810f, -0.967657164329369880f, 0.252083377996486560f,
+    -0.967705518501305480f,
+  0.251897818154216910f, -0.967753837093475510f, 0.251712249050384750f,
+    -0.967802120104103270f,
+  0.251526670691812780f, -0.967850367531413620f, 0.251341083085323880f,
+    -0.967898579373632660f,
+  0.251155486237742030f, -0.967946755628987800f, 0.250969880155890720f,
+    -0.967994896295707670f,
+  0.250784264846594550f, -0.968043001372022260f, 0.250598640316677830f,
+    -0.968091070856162970f,
+  0.250413006572965280f, -0.968139104746362330f, 0.250227363622282540f,
+    -0.968187103040854420f,
+  0.250041711471454650f, -0.968235065737874320f, 0.249856050127308050f,
+    -0.968282992835658660f,
+  0.249670379596668520f, -0.968330884332445300f, 0.249484699886363010f,
+    -0.968378740226473300f,
+  0.249299011003218300f, -0.968426560515983190f, 0.249113312954061360f,
+    -0.968474345199216820f,
+  0.248927605745720260f, -0.968522094274417270f, 0.248741889385022420f,
+    -0.968569807739828930f,
+  0.248556163878796620f, -0.968617485593697540f, 0.248370429233871150f,
+    -0.968665127834269950f,
+  0.248184685457074780f, -0.968712734459794780f, 0.247998932555237220f,
+    -0.968760305468521430f,
+  0.247813170535187620f, -0.968807840858700970f, 0.247627399403756330f,
+    -0.968855340628585580f,
+  0.247441619167773440f, -0.968902804776428870f, 0.247255829834069320f,
+    -0.968950233300485800f,
+  0.247070031409475370f, -0.968997626199012310f, 0.246884223900822430f,
+    -0.969044983470266240f,
+  0.246698407314942500f, -0.969092305112506100f, 0.246512581658667380f,
+    -0.969139591123992280f,
+  0.246326746938829060f, -0.969186841502985950f, 0.246140903162260640f,
+    -0.969234056247750050f,
+  0.245955050335794590f, -0.969281235356548530f, 0.245769188466264670f,
+    -0.969328378827646660f,
+  0.245583317560504000f, -0.969375486659311280f, 0.245397437625346990f,
+    -0.969422558849810320f,
+  0.245211548667627680f, -0.969469595397412950f, 0.245025650694180470f,
+    -0.969516596300390000f,
+  0.244839743711840750f, -0.969563561557013180f, 0.244653827727443320f,
+    -0.969610491165555870f,
+  0.244467902747824210f, -0.969657385124292450f, 0.244281968779819170f,
+    -0.969704243431498750f,
+  0.244096025830264210f, -0.969751066085452140f, 0.243910073905996370f,
+    -0.969797853084430890f,
+  0.243724113013852130f, -0.969844604426714830f, 0.243538143160669180f,
+    -0.969891320110585100f,
+  0.243352164353284880f, -0.969938000134323960f, 0.243166176598536930f,
+    -0.969984644496215240f,
+  0.242980179903263980f, -0.970031253194543970f, 0.242794174274304190f,
+    -0.970077826227596420f,
+  0.242608159718496890f, -0.970124363593660280f, 0.242422136242681050f,
+    -0.970170865291024360f,
+  0.242236103853696040f, -0.970217331317979160f, 0.242050062558382180f,
+    -0.970263761672816140f,
+  0.241864012363579210f, -0.970310156353828110f, 0.241677953276128090f,
+    -0.970356515359309450f,
+  0.241491885302869300f, -0.970402838687555500f, 0.241305808450644390f,
+    -0.970449126336863090f,
+  0.241119722726294730f, -0.970495378305530450f, 0.240933628136661910f,
+    -0.970541594591857070f,
+  0.240747524688588540f, -0.970587775194143630f, 0.240561412388916620f,
+    -0.970633920110692160f,
+  0.240375291244489500f, -0.970680029339806130f, 0.240189161262150040f,
+    -0.970726102879790110f,
+  0.240003022448741500f, -0.970772140728950350f, 0.239816874811108110f,
+    -0.970818142885593870f,
+  0.239630718356093560f, -0.970864109348029470f, 0.239444553090542720f,
+    -0.970910040114567050f,
+  0.239258379021300120f, -0.970955935183517970f, 0.239072196155210660f,
+    -0.971001794553194690f,
+  0.238886004499120170f, -0.971047618221911100f, 0.238699804059873950f,
+    -0.971093406187982460f,
+  0.238513594844318500f, -0.971139158449725090f, 0.238327376859299970f,
+    -0.971184875005457030f,
+  0.238141150111664870f, -0.971230555853497380f, 0.237954914608260650f,
+    -0.971276200992166490f,
+  0.237768670355934210f, -0.971321810419786160f, 0.237582417361533650f,
+    -0.971367384134679490f,
+  0.237396155631906550f, -0.971412922135170940f, 0.237209885173901620f,
+    -0.971458424419585960f,
+  0.237023605994367340f, -0.971503890986251780f, 0.236837318100152380f,
+    -0.971549321833496630f,
+  0.236651021498106460f, -0.971594716959650160f, 0.236464716195078750f,
+    -0.971640076363043390f,
+  0.236278402197919620f, -0.971685400042008540f, 0.236092079513479050f,
+    -0.971730687994879160f,
+  0.235905748148607370f, -0.971775940219990140f, 0.235719408110155930f,
+    -0.971821156715677700f,
+  0.235533059404975460f, -0.971866337480279400f, 0.235346702039917920f,
+    -0.971911482512134000f,
+  0.235160336021834860f, -0.971956591809581600f, 0.234973961357578310f,
+    -0.972001665370963890f,
+  0.234787578054001080f, -0.972046703194623380f, 0.234601186117955550f,
+    -0.972091705278904430f,
+  0.234414785556295250f, -0.972136671622152120f, 0.234228376375873380f,
+    -0.972181602222713440f,
+  0.234041958583543460f, -0.972226497078936270f, 0.233855532186159950f,
+    -0.972271356189170040f,
+  0.233669097190576820f, -0.972316179551765300f, 0.233482653603649170f,
+    -0.972360967165074140f,
+  0.233296201432231560f, -0.972405719027449770f, 0.233109740683179740f,
+    -0.972450435137246830f,
+  0.232923271363349120f, -0.972495115492821190f, 0.232736793479595420f,
+    -0.972539760092530180f,
+  0.232550307038775330f, -0.972584368934732210f, 0.232363812047745010f,
+    -0.972628942017787270f,
+  0.232177308513361770f, -0.972673479340056430f, 0.231990796442482580f,
+    -0.972717980899902250f,
+  0.231804275841964780f, -0.972762446695688570f, 0.231617746718666580f,
+    -0.972806876725780370f,
+  0.231431209079445730f, -0.972851270988544180f, 0.231244662931161110f,
+    -0.972895629482347760f,
+  0.231058108280671280f, -0.972939952205560070f, 0.230871545134835070f,
+    -0.972984239156551740f,
+  0.230684973500512310f, -0.973028490333694100f, 0.230498393384562320f,
+    -0.973072705735360530f,
+  0.230311804793845530f, -0.973116885359925130f, 0.230125207735222020f,
+    -0.973161029205763530f,
+  0.229938602215552260f, -0.973205137271252800f, 0.229751988241697600f,
+    -0.973249209554771120f,
+  0.229565365820518870f, -0.973293246054698250f, 0.229378734958878120f,
+    -0.973337246769414800f,
+  0.229192095663636740f, -0.973381211697303290f, 0.229005447941657390f,
+    -0.973425140836747030f,
+  0.228818791799802360f, -0.973469034186130950f, 0.228632127244934230f,
+    -0.973512891743841370f,
+  0.228445454283916550f, -0.973556713508265560f, 0.228258772923612350f,
+    -0.973600499477792370f,
+  0.228072083170885790f, -0.973644249650811870f, 0.227885385032600700f,
+    -0.973687964025715670f,
+  0.227698678515621170f, -0.973731642600896400f, 0.227511963626812390f,
+    -0.973775285374748000f,
+  0.227325240373038830f, -0.973818892345666100f, 0.227138508761166260f,
+    -0.973862463512047300f,
+  0.226951768798059980f, -0.973905998872289460f, 0.226765020490585720f,
+    -0.973949498424792170f,
+  0.226578263845610110f, -0.973992962167955830f, 0.226391498869999210f,
+    -0.974036390100182610f,
+  0.226204725570620270f, -0.974079782219875680f, 0.226017943954340190f,
+    -0.974123138525439520f,
+  0.225831154028026200f, -0.974166459015280320f, 0.225644355798546440f,
+    -0.974209743687805110f,
+  0.225457549272768540f, -0.974252992541422500f, 0.225270734457561240f,
+    -0.974296205574542330f,
+  0.225083911359792780f, -0.974339382785575860f, 0.224897079986332540f,
+    -0.974382524172935470f,
+  0.224710240344049570f, -0.974425629735034990f, 0.224523392439813170f,
+    -0.974468699470289580f,
+  0.224336536280493690f, -0.974511733377115720f, 0.224149671872960840f,
+    -0.974554731453931230f,
+  0.223962799224085520f, -0.974597693699155050f, 0.223775918340738290f,
+    -0.974640620111207560f,
+  0.223589029229790020f, -0.974683510688510670f, 0.223402131898112480f,
+    -0.974726365429487320f,
+  0.223215226352576960f, -0.974769184332561770f, 0.223028312600055870f,
+    -0.974811967396159830f,
+  0.222841390647421280f, -0.974854714618708430f, 0.222654460501545550f,
+    -0.974897425998635820f,
+  0.222467522169301990f, -0.974940101534371720f, 0.222280575657563370f,
+    -0.974982741224347140f,
+  0.222093620973203590f, -0.975025345066994120f, 0.221906658123096260f,
+    -0.975067913060746360f,
+  0.221719687114115240f, -0.975110445204038890f, 0.221532707953135340f,
+    -0.975152941495307620f,
+  0.221345720647030810f, -0.975195401932990370f, 0.221158725202677100f,
+    -0.975237826515525820f,
+  0.220971721626949060f, -0.975280215241354220f, 0.220784709926722670f,
+    -0.975322568108916930f,
+  0.220597690108873650f, -0.975364885116656870f, 0.220410662180277940f,
+    -0.975407166263018270f,
+  0.220223626147812460f, -0.975449411546446380f, 0.220036582018353550f,
+    -0.975491620965388110f,
+  0.219849529798778750f, -0.975533794518291360f, 0.219662469495965180f,
+    -0.975575932203605610f,
+  0.219475401116790340f, -0.975618034019781750f, 0.219288324668132580f,
+    -0.975660099965271590f,
+  0.219101240156869770f, -0.975702130038528570f, 0.218914147589880900f,
+    -0.975744124238007270f,
+  0.218727046974044600f, -0.975786082562163930f, 0.218539938316239830f,
+    -0.975828005009455550f,
+  0.218352821623346430f, -0.975869891578341030f, 0.218165696902243770f,
+    -0.975911742267280170f,
+  0.217978564159812290f, -0.975953557074734300f, 0.217791423402932120f,
+    -0.975995335999165880f,
+  0.217604274638483670f, -0.976037079039039020f, 0.217417117873348300f,
+    -0.976078786192818850f,
+  0.217229953114406790f, -0.976120457458971910f, 0.217042780368541080f,
+    -0.976162092835966110f,
+  0.216855599642632570f, -0.976203692322270560f, 0.216668410943563790f,
+    -0.976245255916355800f,
+  0.216481214278216900f, -0.976286783616693630f, 0.216294009653474370f,
+    -0.976328275421757260f,
+  0.216106797076219600f, -0.976369731330021140f, 0.215919576553335460f,
+    -0.976411151339961040f,
+  0.215732348091705940f, -0.976452535450054060f, 0.215545111698214660f,
+    -0.976493883658778540f,
+  0.215357867379745550f, -0.976535195964614470f, 0.215170615143183500f,
+    -0.976576472366042610f,
+  0.214983354995412820f, -0.976617712861545640f, 0.214796086943318920f,
+    -0.976658917449606980f,
+  0.214608810993786920f, -0.976700086128711840f, 0.214421527153702190f,
+    -0.976741218897346550f,
+  0.214234235429951100f, -0.976782315753998650f, 0.214046935829419330f,
+    -0.976823376697157240f,
+  0.213859628358993830f, -0.976864401725312640f, 0.213672313025561140f,
+    -0.976905390836956490f,
+  0.213484989836008080f, -0.976946344030581560f, 0.213297658797222430f,
+    -0.976987261304682390f,
+  0.213110319916091360f, -0.977028142657754390f, 0.212922973199503260f,
+    -0.977068988088294450f,
+  0.212735618654345870f, -0.977109797594800880f, 0.212548256287508120f,
+    -0.977150571175773200f,
+  0.212360886105878580f, -0.977191308829712280f, 0.212173508116346080f,
+    -0.977232010555120320f,
+  0.211986122325800410f, -0.977272676350500860f, 0.211798728741130820f,
+    -0.977313306214358750f,
+  0.211611327369227610f, -0.977353900145199960f, 0.211423918216980810f,
+    -0.977394458141532250f,
+  0.211236501291280710f, -0.977434980201864260f, 0.211049076599018500f,
+    -0.977475466324706050f,
+  0.210861644147084830f, -0.977515916508569280f, 0.210674203942371490f,
+    -0.977556330751966460f,
+  0.210486755991769890f, -0.977596709053411780f, 0.210299300302171750f,
+    -0.977637051411420770f,
+  0.210111836880469720f, -0.977677357824509930f, 0.209924365733555860f,
+    -0.977717628291197570f,
+  0.209736886868323370f, -0.977757862810002760f, 0.209549400291665110f,
+    -0.977798061379446360f,
+  0.209361906010474190f, -0.977838223998050430f, 0.209174404031644700f,
+    -0.977878350664338150f,
+  0.208986894362070070f, -0.977918441376834370f, 0.208799377008644980f,
+    -0.977958496134064830f,
+  0.208611851978263460f, -0.977998514934557140f, 0.208424319277820650f,
+    -0.978038497776839600f,
+  0.208236778914211470f, -0.978078444659442380f, 0.208049230894330940f,
+    -0.978118355580896660f,
+  0.207861675225075150f, -0.978158230539735050f, 0.207674111913339540f,
+    -0.978198069534491400f,
+  0.207486540966020700f, -0.978237872563701090f, 0.207298962390014880f,
+    -0.978277639625900420f,
+  0.207111376192218560f, -0.978317370719627650f, 0.206923782379529210f,
+    -0.978357065843421640f,
+  0.206736180958843660f, -0.978396724995823090f, 0.206548571937059940f,
+    -0.978436348175373730f,
+  0.206360955321075680f, -0.978475935380616830f, 0.206173331117788770f,
+    -0.978515486610096910f,
+  0.205985699334098050f, -0.978555001862359550f, 0.205798059976901760f,
+    -0.978594481135952270f,
+  0.205610413053099320f, -0.978633924429423100f, 0.205422758569589780f,
+    -0.978673331741322210f,
+  0.205235096533272380f, -0.978712703070200420f, 0.205047426951047380f,
+    -0.978752038414610340f,
+  0.204859749829814420f, -0.978791337773105670f, 0.204672065176474290f,
+    -0.978830601144241470f,
+  0.204484372997927180f, -0.978869828526574120f, 0.204296673301074430f,
+    -0.978909019918661310f,
+  0.204108966092817010f, -0.978948175319062200f, 0.203921251380056150f,
+    -0.978987294726337050f,
+  0.203733529169694010f, -0.979026378139047580f, 0.203545799468632190f,
+    -0.979065425555756930f,
+  0.203358062283773370f, -0.979104436975029250f, 0.203170317622019920f,
+    -0.979143412395430230f,
+  0.202982565490274460f, -0.979182351815526930f, 0.202794805895440550f,
+    -0.979221255233887700f,
+  0.202607038844421110f, -0.979260122649082020f, 0.202419264344120220f,
+    -0.979298954059681040f,
+  0.202231482401441620f, -0.979337749464256780f, 0.202043693023289280f,
+    -0.979376508861383170f,
+  0.201855896216568160f, -0.979415232249634780f, 0.201668091988182500f,
+    -0.979453919627588210f,
+  0.201480280345037820f, -0.979492570993820700f, 0.201292461294039190f,
+    -0.979531186346911390f,
+  0.201104634842091960f, -0.979569765685440520f, 0.200916800996102370f,
+    -0.979608309007989450f,
+  0.200728959762976140f, -0.979646816313141210f, 0.200541111149620090f,
+    -0.979685287599479930f,
+  0.200353255162940420f, -0.979723722865591170f, 0.200165391809844500f,
+    -0.979762122110061640f,
+  0.199977521097239290f, -0.979800485331479680f, 0.199789643032032120f,
+    -0.979838812528434740f,
+  0.199601757621131050f, -0.979877103699517640f, 0.199413864871443750f,
+    -0.979915358843320480f,
+  0.199225964789878890f, -0.979953577958436740f, 0.199038057383344820f,
+    -0.979991761043461200f,
+  0.198850142658750120f, -0.980029908096989980f, 0.198662220623004320f,
+    -0.980068019117620650f,
+  0.198474291283016360f, -0.980106094103951770f, 0.198286354645696270f,
+    -0.980144133054583590f,
+  0.198098410717953730f, -0.980182135968117320f, 0.197910459506698720f,
+    -0.980220102843155970f,
+  0.197722501018842030f, -0.980258033678303550f, 0.197534535261294000f,
+    -0.980295928472165290f,
+  0.197346562240966000f, -0.980333787223347960f, 0.197158581964769040f,
+    -0.980371609930459690f,
+  0.196970594439614370f, -0.980409396592109910f, 0.196782599672414240f,
+    -0.980447147206909060f,
+  0.196594597670080220f, -0.980484861773469380f, 0.196406588439525050f,
+    -0.980522540290404090f,
+  0.196218571987660850f, -0.980560182756327950f, 0.196030548321400880f,
+    -0.980597789169856850f,
+  0.195842517447657990f, -0.980635359529608120f, 0.195654479373345370f,
+    -0.980672893834200530f,
+  0.195466434105377090f, -0.980710392082253970f, 0.195278381650666520f,
+    -0.980747854272389750f,
+  0.195090322016128330f, -0.980785280403230430f, 0.194902255208676660f,
+    -0.980822670473399990f,
+  0.194714181235225990f, -0.980860024481523870f, 0.194526100102691720f,
+    -0.980897342426228390f,
+  0.194338011817988600f, -0.980934624306141640f, 0.194149916388032530f,
+    -0.980971870119892840f,
+  0.193961813819739010f, -0.981009079866112630f, 0.193773704120023840f,
+    -0.981046253543432780f,
+  0.193585587295803750f, -0.981083391150486590f, 0.193397463353994740f,
+    -0.981120492685908730f,
+  0.193209332301514080f, -0.981157558148334830f, 0.193021194145278320f,
+    -0.981194587536402320f,
+  0.192833048892205290f, -0.981231580848749730f, 0.192644896549212240f,
+    -0.981268538084016710f,
+  0.192456737123216840f, -0.981305459240844670f, 0.192268570621137590f,
+    -0.981342344317875930f,
+  0.192080397049892380f, -0.981379193313754560f, 0.191892216416400310f,
+    -0.981416006227125550f,
+  0.191704028727579940f, -0.981452783056635520f, 0.191515833990350240f,
+    -0.981489523800932130f,
+  0.191327632211630990f, -0.981526228458664660f, 0.191139423398341420f,
+    -0.981562897028483650f,
+  0.190951207557401860f, -0.981599529509040720f, 0.190762984695732250f,
+    -0.981636125898989080f,
+  0.190574754820252800f, -0.981672686196983110f, 0.190386517937884580f,
+    -0.981709210401678800f,
+  0.190198274055548120f, -0.981745698511732990f, 0.190010023180165050f,
+    -0.981782150525804310f,
+  0.189821765318656580f, -0.981818566442552500f, 0.189633500477944220f,
+    -0.981854946260638630f,
+  0.189445228664950340f, -0.981891289978724990f, 0.189256949886596720f,
+    -0.981927597595475540f,
+  0.189068664149806280f, -0.981963869109555240f, 0.188880371461501330f,
+    -0.982000104519630490f,
+  0.188692071828605260f, -0.982036303824369020f, 0.188503765258041080f,
+    -0.982072467022439890f,
+  0.188315451756732120f, -0.982108594112513610f, 0.188127131331602530f,
+    -0.982144685093261580f,
+  0.187938803989575850f, -0.982180739963357200f, 0.187750469737576840f,
+    -0.982216758721474510f,
+  0.187562128582529740f, -0.982252741366289370f, 0.187373780531359110f,
+    -0.982288687896478830f,
+  0.187185425590990440f, -0.982324598310721160f, 0.186997063768348510f,
+    -0.982360472607696210f,
+  0.186808695070359330f, -0.982396310786084690f, 0.186620319503948420f,
+    -0.982432112844569110f,
+  0.186431937076041640f, -0.982467878781833170f, 0.186243547793565670f,
+    -0.982503608596561720f,
+  0.186055151663446630f, -0.982539302287441240f, 0.185866748692611720f,
+    -0.982574959853159240f,
+  0.185678338887987790f, -0.982610581292404750f, 0.185489922256501900f,
+    -0.982646166603868050f,
+  0.185301498805082040f, -0.982681715786240860f, 0.185113068540655510f,
+    -0.982717228838215990f,
+  0.184924631470150870f, -0.982752705758487830f, 0.184736187600495930f,
+    -0.982788146545751970f,
+  0.184547736938619640f, -0.982823551198705240f, 0.184359279491450640f,
+    -0.982858919716046110f,
+  0.184170815265917720f, -0.982894252096474070f, 0.183982344268950600f,
+    -0.982929548338690060f,
+  0.183793866507478390f, -0.982964808441396440f, 0.183605381988431350f,
+    -0.983000032403296590f,
+  0.183416890718739230f, -0.983035220223095640f, 0.183228392705332140f,
+    -0.983070371899499640f,
+  0.183039887955141060f, -0.983105487431216290f, 0.182851376475096310f,
+    -0.983140566816954500f,
+  0.182662858272129360f, -0.983175610055424420f, 0.182474333353171260f,
+    -0.983210617145337640f,
+  0.182285801725153320f, -0.983245588085407070f, 0.182097263395007760f,
+    -0.983280522874346970f,
+  0.181908718369666160f, -0.983315421510872810f, 0.181720166656061170f,
+    -0.983350283993701500f,
+  0.181531608261125130f, -0.983385110321551180f, 0.181343043191790590f,
+    -0.983419900493141540f,
+  0.181154471454990920f, -0.983454654507193270f, 0.180965893057658980f,
+    -0.983489372362428730f,
+  0.180777308006728670f, -0.983524054057571260f, 0.180588716309133280f,
+    -0.983558699591345900f,
+  0.180400117971807270f, -0.983593308962478650f, 0.180211513001684590f,
+    -0.983627882169697210f,
+  0.180022901405699510f, -0.983662419211730250f, 0.179834283190787180f,
+    -0.983696920087308020f,
+  0.179645658363882100f, -0.983731384795162090f, 0.179457026931919950f,
+    -0.983765813334025240f,
+  0.179268388901835880f, -0.983800205702631490f, 0.179079744280565390f,
+    -0.983834561899716630f,
+  0.178891093075044830f, -0.983868881924017220f, 0.178702435292209940f,
+    -0.983903165774271500f,
+  0.178513770938997590f, -0.983937413449218920f, 0.178325100022344140f,
+    -0.983971624947600270f,
+  0.178136422549186320f, -0.984005800268157870f, 0.177947738526461670f,
+    -0.984039939409634970f,
+  0.177759047961107140f, -0.984074042370776450f, 0.177570350860060790f,
+    -0.984108109150328540f,
+  0.177381647230260200f, -0.984142139747038570f, 0.177192937078643310f,
+    -0.984176134159655320f,
+  0.177004220412148860f, -0.984210092386929030f, 0.176815497237715000f,
+    -0.984244014427611110f,
+  0.176626767562280960f, -0.984277900280454370f, 0.176438031392785350f,
+    -0.984311749944212780f,
+  0.176249288736167940f, -0.984345563417641900f, 0.176060539599367960f,
+    -0.984379340699498510f,
+  0.175871783989325040f, -0.984413081788540700f, 0.175683021912979580f,
+    -0.984446786683527920f,
+  0.175494253377271400f, -0.984480455383220930f, 0.175305478389141370f,
+    -0.984514087886381840f,
+  0.175116696955530060f, -0.984547684191773960f, 0.174927909083378160f,
+    -0.984581244298162180f,
+  0.174739114779627310f, -0.984614768204312600f, 0.174550314051218490f,
+    -0.984648255908992630f,
+  0.174361506905093830f, -0.984681707410970940f, 0.174172693348194960f,
+    -0.984715122709017620f,
+  0.173983873387463850f, -0.984748501801904210f, 0.173795047029843270f,
+    -0.984781844688403350f,
+  0.173606214282275410f, -0.984815151367289140f, 0.173417375151703520f,
+    -0.984848421837337010f,
+  0.173228529645070490f, -0.984881656097323700f, 0.173039677769319390f,
+    -0.984914854146027200f,
+  0.172850819531394200f, -0.984948015982227030f, 0.172661954938238270f,
+    -0.984981141604703960f,
+  0.172473083996796030f, -0.985014231012239840f, 0.172284206714011350f,
+    -0.985047284203618200f,
+  0.172095323096829040f, -0.985080301177623800f, 0.171906433152193700f,
+    -0.985113281933042590f,
+  0.171717536887049970f, -0.985146226468662230f, 0.171528634308343500f,
+    -0.985179134783271020f,
+  0.171339725423019260f, -0.985212006875659460f, 0.171150810238023340f,
+    -0.985244842744618540f,
+  0.170961888760301360f, -0.985277642388941220f, 0.170772960996799230f,
+    -0.985310405807421570f,
+  0.170584026954463700f, -0.985343132998854790f, 0.170395086640240920f,
+    -0.985375823962037710f,
+  0.170206140061078120f, -0.985408478695768420f, 0.170017187223922090f,
+    -0.985441097198846210f,
+  0.169828228135719880f, -0.985473679470071810f, 0.169639262803419400f,
+    -0.985506225508247290f,
+  0.169450291233967930f, -0.985538735312176060f, 0.169261313434313890f,
+    -0.985571208880662740f,
+  0.169072329411405180f, -0.985603646212513400f, 0.168883339172190010f,
+    -0.985636047306535420f,
+  0.168694342723617440f, -0.985668412161537550f, 0.168505340072635900f,
+    -0.985700740776329850f,
+  0.168316331226194910f, -0.985733033149723490f, 0.168127316191243350f,
+    -0.985765289280531310f,
+  0.167938294974731230f, -0.985797509167567370f, 0.167749267583608030f,
+    -0.985829692809647050f,
+  0.167560234024823590f, -0.985861840205586980f, 0.167371194305328540f,
+    -0.985893951354205210f,
+  0.167182148432072880f, -0.985926026254321130f, 0.166993096412007770f,
+    -0.985958064904755460f,
+  0.166804038252083870f, -0.985990067304330030f, 0.166614973959252090f,
+    -0.986022033451868560f,
+  0.166425903540464220f, -0.986053963346195440f, 0.166236827002671390f,
+    -0.986085856986136820f,
+  0.166047744352825850f, -0.986117714370520090f, 0.165858655597879430f,
+    -0.986149535498173860f,
+  0.165669560744784140f, -0.986181320367928270f, 0.165480459800492890f,
+    -0.986213068978614490f,
+  0.165291352771957970f, -0.986244781329065460f, 0.165102239666132720f,
+    -0.986276457418114980f,
+  0.164913120489970090f, -0.986308097244598670f, 0.164723995250423190f,
+    -0.986339700807353000f,
+  0.164534863954446110f, -0.986371268105216030f, 0.164345726608992190f,
+    -0.986402799137027220f,
+  0.164156583221015890f, -0.986434293901627070f, 0.163967433797471110f,
+    -0.986465752397857940f,
+  0.163778278345312690f, -0.986497174624562880f, 0.163589116871495160f,
+    -0.986528560580586690f,
+  0.163399949382973230f, -0.986559910264775410f, 0.163210775886702460f,
+    -0.986591223675976400f,
+  0.163021596389637810f, -0.986622500813038480f, 0.162832410898735260f,
+    -0.986653741674811350f,
+  0.162643219420950450f, -0.986684946260146690f, 0.162454021963239190f,
+    -0.986716114567897100f,
+  0.162264818532558110f, -0.986747246596916480f, 0.162075609135863330f,
+    -0.986778342346060430f,
+  0.161886393780111910f, -0.986809401814185420f, 0.161697172472260540f,
+    -0.986840425000149680f,
+  0.161507945219266150f, -0.986871411902812470f, 0.161318712028086540f,
+    -0.986902362521034470f,
+  0.161129472905678780f, -0.986933276853677710f, 0.160940227859001140f,
+    -0.986964154899605650f,
+  0.160750976895011390f, -0.986994996657682870f, 0.160561720020667510f,
+    -0.987025802126775600f,
+  0.160372457242928400f, -0.987056571305750970f, 0.160183188568752240f,
+    -0.987087304193477900f,
+  0.159993914005098350f, -0.987118000788826280f, 0.159804633558925380f,
+    -0.987148661090667570f,
+  0.159615347237193090f, -0.987179285097874340f, 0.159426055046860750f,
+    -0.987209872809320820f,
+  0.159236756994887850f, -0.987240424223882250f, 0.159047453088234840f,
+    -0.987270939340435420f,
+  0.158858143333861390f, -0.987301418157858430f, 0.158668827738728370f,
+    -0.987331860675030430f,
+  0.158479506309796100f, -0.987362266890832400f, 0.158290179054025180f,
+    -0.987392636804146240f,
+  0.158100845978377090f, -0.987422970413855410f, 0.157911507089812640f,
+    -0.987453267718844560f,
+  0.157722162395293690f, -0.987483528717999710f, 0.157532811901781670f,
+    -0.987513753410208420f,
+  0.157343455616238280f, -0.987543941794359230f, 0.157154093545626010f,
+    -0.987574093869342360f,
+  0.156964725696906750f, -0.987604209634049160f, 0.156775352077043430f,
+    -0.987634289087372160f,
+  0.156585972692998590f, -0.987664332228205710f, 0.156396587551734940f,
+    -0.987694339055445130f,
+  0.156207196660216040f, -0.987724309567986960f, 0.156017800025404830f,
+    -0.987754243764729530f,
+  0.155828397654265320f, -0.987784141644572180f, 0.155638989553760850f,
+    -0.987814003206415550f,
+  0.155449575730855880f, -0.987843828449161740f, 0.155260156192514380f,
+    -0.987873617371714200f,
+  0.155070730945700510f, -0.987903369972977790f, 0.154881299997379400f,
+    -0.987933086251858380f,
+  0.154691863354515400f, -0.987962766207263420f, 0.154502421024073990f,
+    -0.987992409838101880f,
+  0.154312973013020240f, -0.988022017143283530f, 0.154123519328319360f,
+    -0.988051588121720110f,
+  0.153934059976937460f, -0.988081122772324070f, 0.153744594965840000f,
+    -0.988110621094009820f,
+  0.153555124301993500f, -0.988140083085692570f, 0.153365647992364020f,
+    -0.988169508746289060f,
+  0.153176166043917870f, -0.988198898074717610f, 0.152986678463622160f,
+    -0.988228251069897420f,
+  0.152797185258443410f, -0.988257567730749460f, 0.152607686435349140f,
+    -0.988286848056195710f,
+  0.152418182001306500f, -0.988316092045159690f, 0.152228671963282770f,
+    -0.988345299696566150f,
+  0.152039156328246160f, -0.988374471009341280f, 0.151849635103164180f,
+    -0.988403605982412390f,
+  0.151660108295005400f, -0.988432704614708340f, 0.151470575910737760f,
+    -0.988461766905159300f,
+  0.151281037957330250f, -0.988490792852696590f, 0.151091494441751430f,
+    -0.988519782456253270f,
+  0.150901945370970040f, -0.988548735714763200f, 0.150712390751955720f,
+    -0.988577652627162020f,
+  0.150522830591677370f, -0.988606533192386450f, 0.150333264897105050f,
+    -0.988635377409374790f,
+  0.150143693675208330f, -0.988664185277066230f, 0.149954116932956990f,
+    -0.988692956794401940f,
+  0.149764534677321620f, -0.988721691960323780f, 0.149574946915272210f,
+    -0.988750390773775360f,
+  0.149385353653779810f, -0.988779053233701520f, 0.149195754899814960f,
+    -0.988807679339048340f,
+  0.149006150660348470f, -0.988836269088763540f, 0.148816540942352030f,
+    -0.988864822481795640f,
+  0.148626925752796540f, -0.988893339517095130f, 0.148437305098654050f,
+    -0.988921820193613190f,
+  0.148247678986896200f, -0.988950264510302990f, 0.148058047424494740f,
+    -0.988978672466118480f,
+  0.147868410418422360f, -0.989007044060015270f, 0.147678767975650970f,
+    -0.989035379290950310f,
+  0.147489120103153680f, -0.989063678157881540f, 0.147299466807902820f,
+    -0.989091940659768800f,
+  0.147109808096871850f, -0.989120166795572690f, 0.146920143977033760f,
+    -0.989148356564255590f,
+  0.146730474455361750f, -0.989176509964781010f, 0.146540799538829870f,
+    -0.989204626996113780f,
+  0.146351119234411440f, -0.989232707657220050f, 0.146161433549080950f,
+    -0.989260751947067640f,
+  0.145971742489812370f, -0.989288759864625170f, 0.145782046063579860f,
+    -0.989316731408863000f,
+  0.145592344277358450f, -0.989344666578752640f, 0.145402637138122540f,
+    -0.989372565373267010f,
+  0.145212924652847520f, -0.989400427791380380f, 0.145023206828508360f,
+    -0.989428253832068230f,
+  0.144833483672080240f, -0.989456043494307710f, 0.144643755190539150f,
+    -0.989483796777076760f,
+  0.144454021390860440f, -0.989511513679355190f, 0.144264282280020530f,
+    -0.989539194200123930f,
+  0.144074537864995330f, -0.989566838338365120f, 0.143884788152761010f,
+    -0.989594446093062460f,
+  0.143695033150294580f, -0.989622017463200780f, 0.143505272864572290f,
+    -0.989649552447766530f,
+  0.143315507302571590f, -0.989677051045747210f, 0.143125736471269140f,
+    -0.989704513256131850f,
+  0.142935960377642700f, -0.989731939077910570f, 0.142746179028669620f,
+    -0.989759328510075200f,
+  0.142556392431327340f, -0.989786681551618640f, 0.142366600592594260f,
+    -0.989813998201535260f,
+  0.142176803519448000f, -0.989841278458820530f, 0.141987001218867340f,
+    -0.989868522322471580f,
+  0.141797193697830530f, -0.989895729791486660f, 0.141607380963316020f,
+    -0.989922900864865450f,
+  0.141417563022303130f, -0.989950035541608990f, 0.141227739881770480f,
+    -0.989977133820719610f,
+  0.141037911548697770f, -0.990004195701200910f, 0.140848078030064220f,
+    -0.990031221182058000f,
+  0.140658239332849240f, -0.990058210262297120f, 0.140468395464033110f,
+    -0.990085162940925970f,
+  0.140278546430595420f, -0.990112079216953770f, 0.140088692239516780f,
+    -0.990138959089390650f,
+  0.139898832897777380f, -0.990165802557248400f, 0.139708968412357580f,
+    -0.990192609619540030f,
+  0.139519098790238600f, -0.990219380275280000f, 0.139329224038400980f,
+    -0.990246114523483990f,
+  0.139139344163826280f, -0.990272812363169110f, 0.138949459173495440f,
+    -0.990299473793353590f,
+  0.138759569074390380f, -0.990326098813057330f, 0.138569673873492640f,
+    -0.990352687421301340f,
+  0.138379773577783890f, -0.990379239617108160f, 0.138189868194246640f,
+    -0.990405755399501260f,
+  0.137999957729862760f, -0.990432234767505970f, 0.137810042191615130f,
+    -0.990458677720148620f,
+  0.137620121586486180f, -0.990485084256456980f, 0.137430195921458550f,
+    -0.990511454375460290f,
+  0.137240265203515700f, -0.990537788076188750f, 0.137050329439640380f,
+    -0.990564085357674370f,
+  0.136860388636816430f, -0.990590346218950150f, 0.136670442802027230f,
+    -0.990616570659050620f,
+  0.136480491942256310f, -0.990642758677011570f, 0.136290536064488070f,
+    -0.990668910271869980f,
+  0.136100575175706200f, -0.990695025442664630f, 0.135910609282895440f,
+    -0.990721104188435180f,
+  0.135720638393040080f, -0.990747146508222710f, 0.135530662513124620f,
+    -0.990773152401069780f,
+  0.135340681650134330f, -0.990799121866020370f, 0.135150695811053850f,
+    -0.990825054902119470f,
+  0.134960705002868830f, -0.990850951508413620f, 0.134770709232564290f,
+    -0.990876811683950810f,
+  0.134580708507126220f, -0.990902635427780010f, 0.134390702833540240f,
+    -0.990928422738951990f,
+  0.134200692218792020f, -0.990954173616518500f, 0.134010676669868210f,
+    -0.990979888059532740f,
+  0.133820656193754690f, -0.991005566067049370f, 0.133630630797438390f,
+    -0.991031207638124130f,
+  0.133440600487905820f, -0.991056812771814340f, 0.133250565272143570f,
+    -0.991082381467178640f,
+  0.133060525157139180f, -0.991107913723276780f, 0.132870480149879400f,
+    -0.991133409539170170f,
+  0.132680430257352130f, -0.991158868913921350f, 0.132490375486544710f,
+    -0.991184291846594180f,
+  0.132300315844444680f, -0.991209678336254060f, 0.132110251338040470f,
+    -0.991235028381967420f,
+  0.131920181974319760f, -0.991260341982802440f, 0.131730107760271280f,
+    -0.991285619137828200f,
+  0.131540028702883280f, -0.991310859846115440f, 0.131349944809144220f,
+    -0.991336064106736140f,
+  0.131159856086043410f, -0.991361231918763460f, 0.130969762540569380f,
+    -0.991386363281272280f,
+  0.130779664179711790f, -0.991411458193338540f, 0.130589561010459600f,
+    -0.991436516654039420f,
+  0.130399453039802740f, -0.991461538662453790f, 0.130209340274730770f,
+    -0.991486524217661480f,
+  0.130019222722233350f, -0.991511473318743900f, 0.129829100389301010f,
+    -0.991536385964783880f,
+  0.129638973282923540f, -0.991561262154865290f, 0.129448841410091830f,
+    -0.991586101888073500f,
+  0.129258704777796270f, -0.991610905163495370f, 0.129068563393027410f,
+    -0.991635671980218740f,
+  0.128878417262776660f, -0.991660402337333210f, 0.128688266394034690f,
+    -0.991685096233929530f,
+  0.128498110793793220f, -0.991709753669099530f, 0.128307950469043590f,
+    -0.991734374641936810f,
+  0.128117785426777150f, -0.991758959151536110f, 0.127927615673986190f,
+    -0.991783507196993490f,
+  0.127737441217662280f, -0.991808018777406430f, 0.127547262064798050f,
+    -0.991832493891873780f,
+  0.127357078222385570f, -0.991856932539495360f, 0.127166889697417180f,
+    -0.991881334719373010f,
+  0.126976696496885980f, -0.991905700430609330f, 0.126786498627784430f,
+    -0.991930029672308480f,
+  0.126596296097105960f, -0.991954322443575950f, 0.126406088911843320f,
+    -0.991978578743518580f,
+  0.126215877078990400f, -0.992002798571244520f, 0.126025660605540460f,
+    -0.992026981925863360f,
+  0.125835439498487020f, -0.992051128806485720f, 0.125645213764824380f,
+    -0.992075239212224070f,
+  0.125454983411546210f, -0.992099313142191800f, 0.125264748445647110f,
+    -0.992123350595503720f,
+  0.125074508874121300f, -0.992147351571276090f, 0.124884264703963150f,
+    -0.992171316068626520f,
+  0.124694015942167770f, -0.992195244086673920f, 0.124503762595729650f,
+    -0.992219135624538450f,
+  0.124313504671644300f, -0.992242990681341700f, 0.124123242176906760f,
+    -0.992266809256206580f,
+  0.123932975118512200f, -0.992290591348257370f, 0.123742703503456630f,
+    -0.992314336956619640f,
+  0.123552427338735370f, -0.992338046080420420f, 0.123362146631344750f,
+    -0.992361718718787870f,
+  0.123171861388280650f, -0.992385354870851670f, 0.122981571616539080f,
+    -0.992408954535742850f,
+  0.122791277323116900f, -0.992432517712593550f, 0.122600978515010240f,
+    -0.992456044400537700f,
+  0.122410675199216280f, -0.992479534598709970f, 0.122220367382731500f,
+    -0.992502988306246950f,
+  0.122030055072553410f, -0.992526405522286100f, 0.121839738275679020f,
+    -0.992549786245966570f,
+  0.121649416999105540f, -0.992573130476428810f, 0.121459091249830950f,
+    -0.992596438212814290f,
+  0.121268761034852550f, -0.992619709454266140f, 0.121078426361168710f,
+    -0.992642944199928820f,
+  0.120888087235777220f, -0.992666142448948020f, 0.120697743665676120f,
+    -0.992689304200470750f,
+  0.120507395657864240f, -0.992712429453645460f, 0.120317043219339670f,
+    -0.992735518207621850f,
+  0.120126686357101580f, -0.992758570461551140f, 0.119936325078148620f,
+    -0.992781586214585570f,
+  0.119745959389479630f, -0.992804565465879140f, 0.119555589298094230f,
+    -0.992827508214586760f,
+  0.119365214810991350f, -0.992850414459865100f, 0.119174835935170960f,
+    -0.992873284200871730f,
+  0.118984452677632520f, -0.992896117436765980f, 0.118794065045375670f,
+    -0.992918914166708300f,
+  0.118603673045400840f, -0.992941674389860470f, 0.118413276684707770f,
+    -0.992964398105385610f,
+  0.118222875970297250f, -0.992987085312448390f, 0.118032470909169300f,
+    -0.993009736010214580f,
+  0.117842061508325020f, -0.993032350197851410f, 0.117651647774765000f,
+    -0.993054927874527320f,
+  0.117461229715489990f, -0.993077469039412300f, 0.117270807337501560f,
+    -0.993099973691677570f,
+  0.117080380647800550f, -0.993122441830495580f, 0.116889949653388850f,
+    -0.993144873455040430f,
+  0.116699514361267840f, -0.993167268564487230f, 0.116509074778439050f,
+    -0.993189627158012620f,
+  0.116318630911904880f, -0.993211949234794500f, 0.116128182768666920f,
+    -0.993234234794012290f,
+  0.115937730355727850f, -0.993256483834846440f, 0.115747273680089870f,
+    -0.993278696356479030f,
+  0.115556812748755290f, -0.993300872358093280f, 0.115366347568727250f,
+    -0.993323011838873950f,
+  0.115175878147008180f, -0.993345114798006910f, 0.114985404490601530f,
+    -0.993367181234679600f,
+  0.114794926606510250f, -0.993389211148080650f, 0.114604444501737460f,
+    -0.993411204537400060f,
+  0.114413958183287050f, -0.993433161401829360f, 0.114223467658162260f,
+    -0.993455081740560960f,
+  0.114032972933367300f, -0.993476965552789190f, 0.113842474015905660f,
+    -0.993498812837709360f,
+  0.113651970912781920f, -0.993520623594518090f, 0.113461463631000080f,
+    -0.993542397822413600f,
+  0.113270952177564360f, -0.993564135520595300f, 0.113080436559479720f,
+    -0.993585836688263950f,
+  0.112889916783750470f, -0.993607501324621610f, 0.112699392857381910f,
+    -0.993629129428871720f,
+  0.112508864787378830f, -0.993650721000219120f, 0.112318332580746190f,
+    -0.993672276037870010f,
+  0.112127796244489750f, -0.993693794541031680f, 0.111937255785614560f,
+    -0.993715276508913230f,
+  0.111746711211126660f, -0.993736721940724600f, 0.111556162528031630f,
+    -0.993758130835677430f,
+  0.111365609743335190f, -0.993779503192984580f, 0.111175052864043830f,
+    -0.993800839011860120f,
+  0.110984491897163380f, -0.993822138291519660f, 0.110793926849700630f,
+    -0.993843401031180180f,
+  0.110603357728661910f, -0.993864627230059750f, 0.110412784541053660f,
+    -0.993885816887378090f,
+  0.110222207293883180f, -0.993906970002356060f, 0.110031625994157000f,
+    -0.993928086574215830f,
+  0.109841040648882680f, -0.993949166602181130f, 0.109650451265067080f,
+    -0.993970210085476920f,
+  0.109459857849718030f, -0.993991217023329380f, 0.109269260409842920f,
+    -0.994012187414966220f,
+  0.109078658952449240f, -0.994033121259616400f, 0.108888053484545310f,
+    -0.994054018556510210f,
+  0.108697444013138670f, -0.994074879304879370f, 0.108506830545237980f,
+    -0.994095703503956930f,
+  0.108316213087851300f, -0.994116491152977070f, 0.108125591647986880f,
+    -0.994137242251175720f,
+  0.107934966232653760f, -0.994157956797789730f, 0.107744336848860260f,
+    -0.994178634792057590f,
+  0.107553703503615710f, -0.994199276233218910f, 0.107363066203928920f,
+    -0.994219881120514850f,
+  0.107172424956808870f, -0.994240449453187900f, 0.106981779769265340f,
+    -0.994260981230481790f,
+  0.106791130648307380f, -0.994281476451641550f, 0.106600477600945030f,
+    -0.994301935115913580f,
+  0.106409820634187840f, -0.994322357222545810f, 0.106219159755045520f,
+    -0.994342742770787270f,
+  0.106028494970528530f, -0.994363091759888570f, 0.105837826287646670f,
+    -0.994383404189101430f,
+  0.105647153713410700f, -0.994403680057679100f, 0.105456477254830660f,
+    -0.994423919364875950f,
+  0.105265796918917650f, -0.994444122109948040f, 0.105075112712682180f,
+    -0.994464288292152390f,
+  0.104884424643134970f, -0.994484417910747600f, 0.104693732717287500f,
+    -0.994504510964993590f,
+  0.104503036942150550f, -0.994524567454151740f, 0.104312337324735870f,
+    -0.994544587377484300f,
+  0.104121633872054730f, -0.994564570734255420f, 0.103930926591118540f,
+    -0.994584517523730340f,
+  0.103740215488939480f, -0.994604427745175660f, 0.103549500572529040f,
+    -0.994624301397859400f,
+  0.103358781848899700f, -0.994644138481050710f, 0.103168059325063390f,
+    -0.994663938994020280f,
+  0.102977333008032250f, -0.994683702936040250f, 0.102786602904819150f,
+    -0.994703430306383860f,
+  0.102595869022436280f, -0.994723121104325700f, 0.102405131367896790f,
+    -0.994742775329142010f,
+  0.102214389948213370f, -0.994762392980109930f, 0.102023644770398800f,
+    -0.994781974056508260f,
+  0.101832895841466670f, -0.994801518557617110f, 0.101642143168429830f,
+    -0.994821026482717860f,
+  0.101451386758302160f, -0.994840497831093180f, 0.101260626618096800f,
+    -0.994859932602027320f,
+  0.101069862754827880f, -0.994879330794805620f, 0.100879095175509010f,
+    -0.994898692408714870f,
+  0.100688323887153970f, -0.994918017443043200f, 0.100497548896777310f,
+    -0.994937305897080070f,
+  0.100306770211392820f, -0.994956557770116380f, 0.100115987838015370f,
+    -0.994975773061444140f,
+  0.099925201783659226f, -0.994994951770357020f, 0.099734412055338839f,
+    -0.995014093896149700f,
+  0.099543618660069444f, -0.995033199438118630f, 0.099352821604865513f,
+    -0.995052268395561160f,
+  0.099162020896742573f, -0.995071300767776170f, 0.098971216542715582f,
+    -0.995090296554063890f,
+  0.098780408549799664f, -0.995109255753726110f, 0.098589596925010708f,
+    -0.995128178366065490f,
+  0.098398781675363881f, -0.995147064390386470f, 0.098207962807875346f,
+    -0.995165913825994620f,
+  0.098017140329560770f, -0.995184726672196820f, 0.097826314247435903f,
+    -0.995203502928301510f,
+  0.097635484568517339f, -0.995222242593618240f, 0.097444651299820870f,
+    -0.995240945667458130f,
+  0.097253814448363354f, -0.995259612149133390f, 0.097062974021160875f,
+    -0.995278242037957670f,
+  0.096872130025230527f, -0.995296835333246090f, 0.096681282467588864f,
+    -0.995315392034315070f,
+  0.096490431355252607f, -0.995333912140482280f, 0.096299576695239225f,
+    -0.995352395651066810f,
+  0.096108718494565468f, -0.995370842565388990f, 0.095917856760249096f,
+    -0.995389252882770690f,
+  0.095726991499307315f, -0.995407626602534900f, 0.095536122718757485f,
+    -0.995425963724006160f,
+  0.095345250425617742f, -0.995444264246510340f, 0.095154374626905472f,
+    -0.995462528169374420f,
+  0.094963495329639061f, -0.995480755491926940f, 0.094772612540836410f,
+    -0.995498946213497770f,
+  0.094581726267515473f, -0.995517100333418110f, 0.094390836516695067f,
+    -0.995535217851020390f,
+  0.094199943295393190f, -0.995553298765638470f, 0.094009046610628907f,
+    -0.995571343076607770f,
+  0.093818146469420494f, -0.995589350783264600f, 0.093627242878787237f,
+    -0.995607321884947050f,
+  0.093436335845747912f, -0.995625256380994310f, 0.093245425377321389f,
+    -0.995643154270746900f,
+  0.093054511480527333f, -0.995661015553546910f, 0.092863594162384697f,
+    -0.995678840228737540f,
+  0.092672673429913366f, -0.995696628295663520f, 0.092481749290132753f,
+    -0.995714379753670610f,
+  0.092290821750062355f, -0.995732094602106430f, 0.092099890816722485f,
+    -0.995749772840319400f,
+  0.091908956497132696f, -0.995767414467659820f, 0.091718018798313525f,
+    -0.995785019483478750f,
+  0.091527077727284981f, -0.995802587887129160f, 0.091336133291067212f,
+    -0.995820119677964910f,
+  0.091145185496681130f, -0.995837614855341610f, 0.090954234351146898f,
+    -0.995855073418615790f,
+  0.090763279861485704f, -0.995872495367145730f, 0.090572322034718156f,
+    -0.995889880700290720f,
+  0.090381360877865011f, -0.995907229417411720f, 0.090190396397947820f,
+    -0.995924541517870690f,
+  0.089999428601987341f, -0.995941817001031350f, 0.089808457497005362f,
+    -0.995959055866258320f,
+  0.089617483090022917f, -0.995976258112917790f, 0.089426505388062016f,
+    -0.995993423740377360f,
+  0.089235524398144139f, -0.996010552748005870f, 0.089044540127290905f,
+    -0.996027645135173610f,
+  0.088853552582524684f, -0.996044700901251970f, 0.088662561770867121f,
+    -0.996061720045614000f,
+  0.088471567699340822f, -0.996078702567633980f, 0.088280570374967879f,
+    -0.996095648466687300f,
+  0.088089569804770507f, -0.996112557742151130f, 0.087898565995771685f,
+    -0.996129430393403740f,
+  0.087707558954993645f, -0.996146266419824620f, 0.087516548689459586f,
+    -0.996163065820794950f,
+  0.087325535206192226f, -0.996179828595696870f, 0.087134518512214321f,
+    -0.996196554743914220f,
+  0.086943498614549489f, -0.996213244264832040f, 0.086752475520220515f,
+    -0.996229897157836500f,
+  0.086561449236251239f, -0.996246513422315520f, 0.086370419769664919f,
+    -0.996263093057658030f,
+  0.086179387127484922f, -0.996279636063254650f, 0.085988351316735448f,
+    -0.996296142438496850f,
+  0.085797312344439880f, -0.996312612182778000f, 0.085606270217622613f,
+    -0.996329045295492380f,
+  0.085415224943307277f, -0.996345441776035900f, 0.085224176528518519f,
+    -0.996361801623805720f,
+  0.085033124980280414f, -0.996378124838200210f, 0.084842070305617148f,
+    -0.996394411418619290f,
+  0.084651012511553700f, -0.996410661364464100f, 0.084459951605114297f,
+    -0.996426874675137240f,
+  0.084268887593324127f, -0.996443051350042630f, 0.084077820483207846f,
+    -0.996459191388585410f,
+  0.083886750281790226f, -0.996475294790172160f, 0.083695676996096827f,
+    -0.996491361554210920f,
+  0.083504600633152404f, -0.996507391680110820f, 0.083313521199982740f,
+    -0.996523385167282450f,
+  0.083122438703613077f, -0.996539342015137940f, 0.082931353151068726f,
+    -0.996555262223090540f,
+  0.082740264549375803f, -0.996571145790554840f, 0.082549172905559659f,
+    -0.996586992716946950f,
+  0.082358078226646619f, -0.996602803001684130f, 0.082166980519662466f,
+    -0.996618576644185070f,
+  0.081975879791633108f, -0.996634313643869900f, 0.081784776049585201f,
+    -0.996650014000160070f,
+  0.081593669300544638f, -0.996665677712478160f, 0.081402559551538328f,
+    -0.996681304780248300f,
+  0.081211446809592386f, -0.996696895202896060f, 0.081020331081733912f,
+    -0.996712448979848010f,
+  0.080829212374989468f, -0.996727966110532490f, 0.080638090696385709f,
+    -0.996743446594378860f,
+  0.080446966052950097f, -0.996758890430818000f, 0.080255838451709291f,
+    -0.996774297619282050f,
+  0.080064707899690932f, -0.996789668159204560f, 0.079873574403922148f,
+    -0.996805002050020320f,
+  0.079682437971430126f, -0.996820299291165670f, 0.079491298609242866f,
+    -0.996835559882078170f,
+  0.079300156324387569f, -0.996850783822196610f, 0.079109011123892431f,
+    -0.996865971110961310f,
+  0.078917863014785095f, -0.996881121747813850f, 0.078726712004093313f,
+    -0.996896235732197210f,
+  0.078535558098845590f, -0.996911313063555740f, 0.078344401306069678f,
+    -0.996926353741335090f,
+  0.078153241632794315f, -0.996941357764982160f, 0.077962079086047645f,
+    -0.996956325133945280f,
+  0.077770913672857989f, -0.996971255847674320f, 0.077579745400254363f,
+    -0.996986149905620180f,
+  0.077388574275265049f, -0.997001007307235290f, 0.077197400304919297f,
+    -0.997015828051973310f,
+  0.077006223496245585f, -0.997030612139289450f, 0.076815043856273399f,
+    -0.997045359568640040f,
+  0.076623861392031617f, -0.997060070339482960f, 0.076432676110549283f,
+    -0.997074744451277310f,
+  0.076241488018856149f, -0.997089381903483400f, 0.076050297123981231f,
+    -0.997103982695563330f,
+  0.075859103432954503f, -0.997118546826979980f, 0.075667906952805383f,
+    -0.997133074297198110f,
+  0.075476707690563416f, -0.997147565105683480f, 0.075285505653258880f,
+    -0.997162019251903290f,
+  0.075094300847921291f, -0.997176436735326190f, 0.074903093281581137f,
+    -0.997190817555421940f,
+  0.074711882961268378f, -0.997205161711661850f, 0.074520669894013014f,
+    -0.997219469203518670f,
+  0.074329454086845867f, -0.997233740030466160f, 0.074138235546796952f,
+    -0.997247974191979860f,
+  0.073947014280897269f, -0.997262171687536170f, 0.073755790296177265f,
+    -0.997276332516613180f,
+  0.073564563599667454f, -0.997290456678690210f, 0.073373334198399157f,
+    -0.997304544173247990f,
+  0.073182102099402888f, -0.997318594999768600f, 0.072990867309710133f,
+    -0.997332609157735470f,
+  0.072799629836351618f, -0.997346586646633230f, 0.072608389686359048f,
+    -0.997360527465947940f,
+  0.072417146866763538f, -0.997374431615167030f, 0.072225901384596336f,
+    -0.997388299093779460f,
+  0.072034653246889416f, -0.997402129901275300f, 0.071843402460674000f,
+    -0.997415924037145960f,
+  0.071652149032982254f, -0.997429681500884180f, 0.071460892970845832f,
+    -0.997443402291984360f,
+  0.071269634281296415f, -0.997457086409941910f, 0.071078372971366502f,
+    -0.997470733854253670f,
+  0.070887109048087787f, -0.997484344624417930f, 0.070695842518492924f,
+    -0.997497918719934210f,
+  0.070504573389614009f, -0.997511456140303450f, 0.070313301668483263f,
+    -0.997524956885027960f,
+  0.070122027362133646f, -0.997538420953611230f, 0.069930750477597295f,
+    -0.997551848345558430f,
+  0.069739471021907376f, -0.997565239060375750f, 0.069548189002096472f,
+    -0.997578593097570800f,
+  0.069356904425197236f, -0.997591910456652630f, 0.069165617298243109f,
+    -0.997605191137131640f,
+  0.068974327628266732f, -0.997618435138519550f, 0.068783035422301728f,
+    -0.997631642460329320f,
+  0.068591740687380900f, -0.997644813102075420f, 0.068400443430538069f,
+    -0.997657947063273710f,
+  0.068209143658806454f, -0.997671044343441000f, 0.068017841379219388f,
+    -0.997684104942096030f,
+  0.067826536598810966f, -0.997697128858758500f, 0.067635229324614451f,
+    -0.997710116092949570f,
+  0.067443919563664106f, -0.997723066644191640f, 0.067252607322993652f,
+    -0.997735980512008620f,
+  0.067061292609636836f, -0.997748857695925690f, 0.066869975430628226f,
+    -0.997761698195469560f,
+  0.066678655793001543f, -0.997774502010167820f, 0.066487333703791507f,
+    -0.997787269139549960f,
+  0.066296009170032283f, -0.997799999583146470f, 0.066104682198758091f,
+    -0.997812693340489280f,
+  0.065913352797003930f, -0.997825350411111640f, 0.065722020971803977f,
+    -0.997837970794548280f,
+  0.065530686730193397f, -0.997850554490335110f, 0.065339350079206798f,
+    -0.997863101498009500f,
+  0.065148011025878860f, -0.997875611817110150f, 0.064956669577245010f,
+    -0.997888085447177110f,
+  0.064765325740339871f, -0.997900522387751620f, 0.064573979522199065f,
+    -0.997912922638376610f,
+  0.064382630929857410f, -0.997925286198596000f, 0.064191279970350679f,
+    -0.997937613067955250f,
+  0.063999926650714078f, -0.997949903246001190f, 0.063808570977982898f,
+    -0.997962156732281950f,
+  0.063617212959193190f, -0.997974373526346990f, 0.063425852601380200f,
+    -0.997986553627747020f,
+  0.063234489911580136f, -0.997998697036034390f, 0.063043124896828631f,
+    -0.998010803750762450f,
+  0.062851757564161420f, -0.998022873771486240f, 0.062660387920614985f,
+    -0.998034907097761770f,
+  0.062469015973224969f, -0.998046903729146840f, 0.062277641729028041f,
+    -0.998058863665200250f,
+  0.062086265195060247f, -0.998070786905482340f, 0.061894886378357744f,
+    -0.998082673449554590f,
+  0.061703505285957416f, -0.998094523296980010f, 0.061512121924895365f,
+    -0.998106336447323050f,
+  0.061320736302208648f, -0.998118112900149180f, 0.061129348424933755f,
+    -0.998129852655025520f,
+  0.060937958300107238f, -0.998141555711520520f, 0.060746565934766412f,
+    -0.998153222069203650f,
+  0.060555171335947781f, -0.998164851727646240f, 0.060363774510688827f,
+    -0.998176444686420530f,
+  0.060172375466026218f, -0.998188000945100300f, 0.059980974208997596f,
+    -0.998199520503260660f,
+  0.059789570746640007f, -0.998211003360478190f, 0.059598165085990598f,
+    -0.998222449516330550f,
+  0.059406757234087247f, -0.998233858970396850f, 0.059215347197967026f,
+    -0.998245231722257880f,
+  0.059023934984667986f, -0.998256567771495180f, 0.058832520601227581f,
+    -0.998267867117692110f,
+  0.058641104054683348f, -0.998279129760433200f, 0.058449685352073573f,
+    -0.998290355699304350f,
+  0.058258264500435732f, -0.998301544933892890f, 0.058066841506808263f,
+    -0.998312697463787260f,
+  0.057875416378229017f, -0.998323813288577560f, 0.057683989121735932f,
+    -0.998334892407855000f,
+  0.057492559744367684f, -0.998345934821212370f, 0.057301128253162144f,
+    -0.998356940528243420f,
+  0.057109694655158132f, -0.998367909528543820f, 0.056918258957393907f,
+    -0.998378841821709990f,
+  0.056726821166907783f, -0.998389737407340160f, 0.056535381290738825f,
+    -0.998400596285033640f,
+  0.056343939335925283f, -0.998411418454391300f, 0.056152495309506383f,
+    -0.998422203915015020f,
+  0.055961049218520520f, -0.998432952666508440f, 0.055769601070007072f,
+    -0.998443664708476340f,
+  0.055578150871004817f, -0.998454340040524800f, 0.055386698628552604f,
+    -0.998464978662261250f,
+  0.055195244349690031f, -0.998475580573294770f, 0.055003788041455885f,
+    -0.998486145773235360f,
+  0.054812329710889909f, -0.998496674261694640f, 0.054620869365031251f,
+    -0.998507166038285490f,
+  0.054429407010919147f, -0.998517621102622210f, 0.054237942655593556f,
+    -0.998528039454320230f,
+  0.054046476306093640f, -0.998538421092996730f, 0.053855007969459509f,
+    -0.998548766018269920f,
+  0.053663537652730679f, -0.998559074229759310f, 0.053472065362946755f,
+    -0.998569345727086110f,
+  0.053280591107148056f, -0.998579580509872500f, 0.053089114892374119f,
+    -0.998589778577742230f,
+  0.052897636725665401f, -0.998599939930320370f, 0.052706156614061798f,
+    -0.998610064567233340f,
+  0.052514674564603257f, -0.998620152488108870f, 0.052323190584330471f,
+    -0.998630203692576050f,
+  0.052131704680283317f, -0.998640218180265270f, 0.051940216859502626f,
+    -0.998650195950808280f,
+  0.051748727129028414f, -0.998660137003838490f, 0.051557235495901653f,
+    -0.998670041338990070f,
+  0.051365741967162731f, -0.998679908955899090f, 0.051174246549852087f,
+    -0.998689739854202620f,
+  0.050982749251010900f, -0.998699534033539280f, 0.050791250077679546f,
+    -0.998709291493549030f,
+  0.050599749036899337f, -0.998719012233872940f, 0.050408246135710995f,
+    -0.998728696254153720f,
+  0.050216741381155325f, -0.998738343554035230f, 0.050025234780273840f,
+    -0.998747954133162860f,
+  0.049833726340107257f, -0.998757527991183340f, 0.049642216067697226f,
+    -0.998767065127744380f,
+  0.049450703970084824f, -0.998776565542495610f, 0.049259190054311168f,
+    -0.998786029235087640f,
+  0.049067674327418126f, -0.998795456205172410f, 0.048876156796446746f,
+    -0.998804846452403420f,
+  0.048684637468439020f, -0.998814199976435390f, 0.048493116350436342f,
+    -0.998823516776924380f,
+  0.048301593449480172f, -0.998832796853527990f, 0.048110068772612716f,
+    -0.998842040205904840f,
+  0.047918542326875327f, -0.998851246833715180f, 0.047727014119310344f,
+    -0.998860416736620520f,
+  0.047535484156959261f, -0.998869549914283560f, 0.047343952446864526f,
+    -0.998878646366368690f,
+  0.047152418996068000f, -0.998887706092541290f, 0.046960883811611599f,
+    -0.998896729092468410f,
+  0.046769346900537960f, -0.998905715365818290f, 0.046577808269888908f,
+    -0.998914664912260440f,
+  0.046386267926707213f, -0.998923577731465780f, 0.046194725878035046f,
+    -0.998932453823106690f,
+  0.046003182130914644f, -0.998941293186856870f, 0.045811636692388955f,
+    -0.998950095822391250f,
+  0.045620089569500123f, -0.998958861729386080f, 0.045428540769291224f,
+    -0.998967590907519300f,
+  0.045236990298804750f, -0.998976283356469820f, 0.045045438165083225f,
+    -0.998984939075918010f,
+  0.044853884375169933f, -0.998993558065545680f, 0.044662328936107311f,
+    -0.999002140325035980f,
+  0.044470771854938744f, -0.999010685854073380f, 0.044279213138707016f,
+    -0.999019194652343460f,
+  0.044087652794454979f, -0.999027666719533690f, 0.043896090829226200f,
+    -0.999036102055332330f,
+  0.043704527250063421f, -0.999044500659429290f, 0.043512962064010327f,
+    -0.999052862531515930f,
+  0.043321395278109784f, -0.999061187671284600f, 0.043129826899405595f,
+    -0.999069476078429330f,
+  0.042938256934940959f, -0.999077727752645360f, 0.042746685391759139f,
+    -0.999085942693629270f,
+  0.042555112276904117f, -0.999094120901079070f, 0.042363537597419038f,
+    -0.999102262374694130f,
+  0.042171961360348002f, -0.999110367114174890f, 0.041980383572734502f,
+    -0.999118435119223490f,
+  0.041788804241622082f, -0.999126466389543390f, 0.041597223374055005f,
+    -0.999134460924839150f,
+  0.041405640977076712f, -0.999142418724816910f, 0.041214057057731589f,
+    -0.999150339789184110f,
+  0.041022471623063397f, -0.999158224117649430f, 0.040830884680115968f,
+    -0.999166071709923000f,
+  0.040639296235933854f, -0.999173882565716380f, 0.040447706297560768f,
+    -0.999181656684742350f,
+  0.040256114872041358f, -0.999189394066714920f, 0.040064521966419686f,
+    -0.999197094711349880f,
+  0.039872927587739845f, -0.999204758618363890f, 0.039681331743046659f,
+    -0.999212385787475290f,
+  0.039489734439384118f, -0.999219976218403530f, 0.039298135683797149f,
+    -0.999227529910869610f,
+  0.039106535483329839f, -0.999235046864595850f, 0.038914933845027241f,
+    -0.999242527079305830f,
+  0.038723330775933762f, -0.999249970554724420f, 0.038531726283093877f,
+    -0.999257377290578060f,
+  0.038340120373552791f, -0.999264747286594420f, 0.038148513054354856f,
+    -0.999272080542502610f,
+  0.037956904332545366f, -0.999279377058032710f, 0.037765294215169005f,
+    -0.999286636832916740f,
+  0.037573682709270514f, -0.999293859866887790f, 0.037382069821895340f,
+    -0.999301046159680070f,
+  0.037190455560088091f, -0.999308195711029470f, 0.036998839930894332f,
+    -0.999315308520673070f,
+  0.036807222941358991f, -0.999322384588349540f, 0.036615604598527057f,
+    -0.999329423913798420f,
+  0.036423984909444228f, -0.999336426496761240f, 0.036232363881155374f,
+    -0.999343392336980220f,
+  0.036040741520706299f, -0.999350321434199440f, 0.035849117835142184f,
+    -0.999357213788164000f,
+  0.035657492831508264f, -0.999364069398620550f, 0.035465866516850478f,
+    -0.999370888265317060f,
+  0.035274238898213947f, -0.999377670388002850f, 0.035082609982644702f,
+    -0.999384415766428560f,
+  0.034890979777187955f, -0.999391124400346050f, 0.034699348288889847f,
+    -0.999397796289508640f,
+  0.034507715524795889f, -0.999404431433671300f, 0.034316081491951658f,
+    -0.999411029832589780f,
+  0.034124446197403423f, -0.999417591486021720f, 0.033932809648196623f,
+    -0.999424116393725640f,
+  0.033741171851377642f, -0.999430604555461730f, 0.033549532813992221f,
+    -0.999437055970991530f,
+  0.033357892543086159f, -0.999443470640077770f, 0.033166251045705968f,
+    -0.999449848562484530f,
+  0.032974608328897315f, -0.999456189737977340f, 0.032782964399706793f,
+    -0.999462494166323160f,
+  0.032591319265180385f, -0.999468761847290050f, 0.032399672932364114f,
+    -0.999474992780647780f,
+  0.032208025408304704f, -0.999481186966166950f, 0.032016376700048046f,
+    -0.999487344403620080f,
+  0.031824726814640963f, -0.999493465092780590f, 0.031633075759129645f,
+    -0.999499549033423640f,
+  0.031441423540560343f, -0.999505596225325310f, 0.031249770165979990f,
+    -0.999511606668263440f,
+  0.031058115642434700f, -0.999517580362016990f, 0.030866459976971503f,
+    -0.999523517306366350f,
+  0.030674803176636581f, -0.999529417501093140f, 0.030483145248477058f,
+    -0.999535280945980540f,
+  0.030291486199539423f, -0.999541107640812940f, 0.030099826036870208f,
+    -0.999546897585375960f,
+  0.029908164767516655f, -0.999552650779456990f, 0.029716502398525156f,
+    -0.999558367222844300f,
+  0.029524838936943035f, -0.999564046915327740f, 0.029333174389816984f,
+    -0.999569689856698580f,
+  0.029141508764193740f, -0.999575296046749220f, 0.028949842067120746f,
+    -0.999580865485273700f,
+  0.028758174305644590f, -0.999586398172067070f, 0.028566505486812797f,
+    -0.999591894106925950f,
+  0.028374835617672258f, -0.999597353289648380f, 0.028183164705269902f,
+    -0.999602775720033530f,
+  0.027991492756653365f, -0.999608161397882110f, 0.027799819778869434f,
+    -0.999613510322995950f,
+  0.027608145778965820f, -0.999618822495178640f, 0.027416470763989606f,
+    -0.999624097914234570f,
+  0.027224794740987910f, -0.999629336579970110f, 0.027033117717008563f,
+    -0.999634538492192300f,
+  0.026841439699098527f, -0.999639703650710200f, 0.026649760694305708f,
+    -0.999644832055333610f,
+  0.026458080709677145f, -0.999649923705874240f, 0.026266399752260809f,
+    -0.999654978602144690f,
+  0.026074717829104040f, -0.999659996743959220f, 0.025883034947254208f,
+    -0.999664978131133310f,
+  0.025691351113759395f, -0.999669922763483760f, 0.025499666335666818f,
+    -0.999674830640828740f,
+  0.025307980620024630f, -0.999679701762987930f, 0.025116293973880335f,
+    -0.999684536129782140f,
+  0.024924606404281485f, -0.999689333741033640f, 0.024732917918276334f,
+    -0.999694094596566000f,
+  0.024541228522912264f, -0.999698818696204250f, 0.024349538225237600f,
+    -0.999703506039774650f,
+  0.024157847032300020f, -0.999708156627104880f, 0.023966154951147241f,
+    -0.999712770458023870f,
+  0.023774461988827676f, -0.999717347532362190f, 0.023582768152388880f,
+    -0.999721887849951310f,
+  0.023391073448879338f, -0.999726391410624470f, 0.023199377885346890f,
+    -0.999730858214216030f,
+  0.023007681468839410f, -0.999735288260561680f, 0.022815984206405477f,
+    -0.999739681549498660f,
+  0.022624286105092803f, -0.999744038080865430f, 0.022432587171950024f,
+    -0.999748357854501780f,
+  0.022240887414024919f, -0.999752640870248840f, 0.022049186838366180f,
+    -0.999756887127949080f,
+  0.021857485452021874f, -0.999761096627446610f, 0.021665783262040089f,
+    -0.999765269368586450f,
+  0.021474080275469605f, -0.999769405351215280f, 0.021282376499358355f,
+    -0.999773504575180990f,
+  0.021090671940755180f, -0.999777567040332940f, 0.020898966606708289f,
+    -0.999781592746521670f,
+  0.020707260504265912f, -0.999785581693599210f, 0.020515553640476986f,
+    -0.999789533881418780f,
+  0.020323846022389572f, -0.999793449309835270f, 0.020132137657052664f,
+    -0.999797327978704690f,
+  0.019940428551514598f, -0.999801169887884260f, 0.019748718712823757f,
+    -0.999804975037232870f,
+  0.019557008148029204f, -0.999808743426610520f, 0.019365296864179146f,
+    -0.999812475055878780f,
+  0.019173584868322699f, -0.999816169924900410f, 0.018981872167508348f,
+    -0.999819828033539420f,
+  0.018790158768784596f, -0.999823449381661570f, 0.018598444679200642f,
+    -0.999827033969133420f,
+  0.018406729905804820f, -0.999830581795823400f, 0.018215014455646376f,
+    -0.999834092861600960f,
+  0.018023298335773701f, -0.999837567166337090f, 0.017831581553236088f,
+    -0.999841004709904000f,
+  0.017639864115082195f, -0.999844405492175240f, 0.017448146028360704f,
+    -0.999847769513025900f,
+  0.017256427300120978f, -0.999851096772332190f, 0.017064707937411529f,
+    -0.999854387269971890f,
+  0.016872987947281773f, -0.999857641005823860f, 0.016681267336780482f,
+    -0.999860857979768540f,
+  0.016489546112956454f, -0.999864038191687680f, 0.016297824282859176f,
+    -0.999867181641464380f,
+  0.016106101853537263f, -0.999870288328982950f, 0.015914378832040249f,
+    -0.999873358254129260f,
+  0.015722655225417017f, -0.999876391416790410f, 0.015530931040716478f,
+    -0.999879387816854930f,
+  0.015339206284988220f, -0.999882347454212560f, 0.015147480965280975f,
+    -0.999885270328754520f,
+  0.014955755088644378f, -0.999888156440373320f, 0.014764028662127416f,
+    -0.999891005788962950f,
+  0.014572301692779104f, -0.999893818374418490f, 0.014380574187649138f,
+    -0.999896594196636680f,
+  0.014188846153786343f, -0.999899333255515390f, 0.013997117598240459f,
+    -0.999902035550953920f,
+  0.013805388528060349f, -0.999904701082852900f, 0.013613658950295789f,
+    -0.999907329851114300f,
+  0.013421928871995907f, -0.999909921855641540f, 0.013230198300209845f,
+    -0.999912477096339240f,
+  0.013038467241987433f, -0.999914995573113470f, 0.012846735704377631f,
+    -0.999917477285871770f,
+  0.012655003694430301f, -0.999919922234522750f, 0.012463271219194662f,
+    -0.999922330418976490f,
+  0.012271538285719944f, -0.999924701839144500f, 0.012079804901056066f,
+    -0.999927036494939640f,
+  0.011888071072252072f, -0.999929334386276070f, 0.011696336806357907f,
+    -0.999931595513069200f,
+  0.011504602110422875f, -0.999933819875236000f, 0.011312866991496287f,
+    -0.999936007472694620f,
+  0.011121131456628141f, -0.999938158305364590f, 0.010929395512867561f,
+    -0.999940272373166960f,
+  0.010737659167264572f, -0.999942349676023910f, 0.010545922426868548f,
+    -0.999944390213859060f,
+  0.010354185298728884f, -0.999946393986597460f, 0.010162447789895645f,
+    -0.999948360994165400f,
+  0.009970709907418029f, -0.999950291236490480f, 0.009778971658346134f,
+    -0.999952184713501780f,
+  0.009587233049729183f, -0.999954041425129780f, 0.009395494088617302f,
+    -0.999955861371306100f,
+  0.009203754782059960f, -0.999957644551963900f, 0.009012015137106642f,
+    -0.999959390967037450f,
+  0.008820275160807512f, -0.999961100616462820f, 0.008628534860211857f,
+    -0.999962773500176930f,
+  0.008436794242369860f, -0.999964409618118280f, 0.008245053314331058f,
+    -0.999966008970226920f,
+  0.008053312083144991f, -0.999967571556443780f, 0.007861570555861883f,
+    -0.999969097376711580f,
+  0.007669828739531077f, -0.999970586430974140f, 0.007478086641202815f,
+    -0.999972038719176730f,
+  0.007286344267926684f, -0.999973454241265940f, 0.007094601626752279f,
+    -0.999974832997189810f,
+  0.006902858724729877f, -0.999976174986897610f, 0.006711115568908869f,
+    -0.999977480210339940f,
+  0.006519372166339549f, -0.999978748667468830f, 0.006327628524071549f,
+    -0.999979980358237650f,
+  0.006135884649154515f, -0.999981175282601110f, 0.005944140548638765f,
+    -0.999982333440515350f,
+  0.005752396229573737f, -0.999983454831937730f, 0.005560651699009764f,
+    -0.999984539456826970f,
+  0.005368906963996303f, -0.999985587315143200f, 0.005177162031583702f,
+    -0.999986598406848000f,
+  0.004985416908821652f, -0.999987572731904080f, 0.004793671602759852f,
+    -0.999988510290275690f,
+  0.004601926120448672f, -0.999989411081928400f, 0.004410180468937601f,
+    -0.999990275106828920f,
+  0.004218434655277024f, -0.999991102364945590f, 0.004026688686516664f,
+    -0.999991892856248010f,
+  0.003834942569706248f, -0.999992646580707190f, 0.003643196311896179f,
+    -0.999993363538295150f,
+  0.003451449920135975f, -0.999994043728985820f, 0.003259703401476044f,
+    -0.999994687152754080f,
+  0.003067956762966138f, -0.999995293809576190f, 0.002876210011656010f,
+    -0.999995863699429940f,
+  0.002684463154596083f, -0.999996396822294350f, 0.002492716198835898f,
+    -0.999996893178149880f,
+  0.002300969151425887f, -0.999997352766978210f, 0.002109222019415816f,
+    -0.999997775588762350f,
+  0.001917474809855460f, -0.999998161643486980f, 0.001725727529795258f,
+    -0.999998510931137790f,
+  0.001533980186284766f, -0.999998823451701880f, 0.001342232786374430f,
+    -0.999999099205167830f,
+  0.001150485337113809f, -0.999999338191525530f, 0.000958737845553352f,
+    -0.999999540410766110f,
+  0.000766990318742846f, -0.999999705862882230f, 0.000575242763732077f,
+    -0.999999834547867670f,
+  0.000383495187571497f, -0.999999926465717890f, 0.000191747597310674f,
+    -0.999999981616429330f
+};
+
+    const float32_t cos_factors_8192[8192] = {
+  1.999999990808214700f, 1.999999917273932200f, 1.999999770205369800f,
+    1.999999549602533100f,
+  1.999999255465430200f, 1.999998887794072000f, 1.999998446588471700f,
+    1.999997931848645600f,
+  1.999997343574612800f, 1.999996681766395000f, 1.999995946424016200f,
+    1.999995137547503600f,
+  1.999994255136887000f, 1.999993299192198700f, 1.999992269713474200f,
+    1.999991166700750800f,
+  1.999989990154069600f, 1.999988740073473500f, 1.999987416459008600f,
+    1.999986019310723500f,
+  1.999984548628669600f, 1.999983004412901000f, 1.999981386663474400f,
+    1.999979695380449400f,
+  1.999977930563888100f, 1.999976092213855400f, 1.999974180330418700f,
+    1.999972194913648900f,
+  1.999970135963618400f, 1.999968003480403000f, 1.999965797464081200f,
+    1.999963517914734100f,
+  1.999961164832445800f, 1.999958738217302300f, 1.999956238069392900f,
+    1.999953664388809800f,
+  1.999951017175647600f, 1.999948296430003500f, 1.999945502151977600f,
+    1.999942634341672600f,
+  1.999939692999193900f, 1.999936678124649700f, 1.999933589718150700f,
+    1.999930427779810900f,
+  1.999927192309745900f, 1.999923883308075200f, 1.999920500774920300f,
+    1.999917044710405500f,
+  1.999913515114657900f, 1.999909911987807200f, 1.999906235329986100f,
+    1.999902485141329400f,
+  1.999898661421975400f, 1.999894764172064600f, 1.999890793391740000f,
+    1.999886749081147800f,
+  1.999882631240436700f, 1.999878439869758200f, 1.999874174969266300f,
+    1.999869836539117700f,
+  1.999865424579472000f, 1.999860939090491600f, 1.999856380072341000f,
+    1.999851747525188200f,
+  1.999847041449203300f, 1.999842261844559700f, 1.999837408711432600f,
+    1.999832482050000900f,
+  1.999827481860445300f, 1.999822408142949900f, 1.999817260897701400f,
+    1.999812040124888700f,
+  1.999806745824704000f, 1.999801377997341800f, 1.999795936642999600f,
+    1.999790421761877400f,
+  1.999784833354177900f, 1.999779171420106700f, 1.999773435959872000f,
+    1.999767626973684400f,
+  1.999761744461757700f, 1.999755788424308200f, 1.999749758861554900f,
+    1.999743655773719400f,
+  1.999737479161026100f, 1.999731229023702200f, 1.999724905361977200f,
+    1.999718508176084000f,
+  1.999712037466257600f, 1.999705493232735800f, 1.999698875475759600f,
+    1.999692184195571900f,
+  1.999685419392419000f, 1.999678581066549400f, 1.999671669218214600f,
+    1.999664683847668800f,
+  1.999657624955168700f, 1.999650492540973900f, 1.999643286605346800f,
+    1.999636007148552400f,
+  1.999628654170857900f, 1.999621227672533800f, 1.999613727653853500f,
+    1.999606154115092500f,
+  1.999598507056529000f, 1.999590786478444600f, 1.999582992381123000f,
+    1.999575124764850800f,
+  1.999567183629917100f, 1.999559168976613900f, 1.999551080805236100f,
+    1.999542919116081000f,
+  1.999534683909448600f, 1.999526375185641800f, 1.999517992944965800f,
+    1.999509537187729200f,
+  1.999501007914242600f, 1.999492405124819700f, 1.999483728819776900f,
+    1.999474978999432800f,
+  1.999466155664109600f, 1.999457258814131500f, 1.999448288449825500f,
+    1.999439244571521700f,
+  1.999430127179552500f, 1.999420936274252800f, 1.999411671855960900f,
+    1.999402333925017300f,
+  1.999392922481765500f, 1.999383437526551300f, 1.999373879059723500f,
+    1.999364247081633500f,
+  1.999354541592635500f, 1.999344762593086500f, 1.999334910083345700f,
+    1.999324984063775700f,
+  1.999314984534741100f, 1.999304911496609700f, 1.999294764949752100f,
+    1.999284544894541100f,
+  1.999274251331352400f, 1.999263884260564600f, 1.999253443682558900f,
+    1.999242929597719200f,
+  1.999232342006432000f, 1.999221680909086400f, 1.999210946306074500f,
+    1.999200138197791100f,
+  1.999189256584633600f, 1.999178301467001900f, 1.999167272845298900f,
+    1.999156170719930100f,
+  1.999144995091303600f, 1.999133745959830600f, 1.999122423325924200f,
+    1.999111027190001000f,
+  1.999099557552479900f, 1.999088014413782800f, 1.999076397774334000f,
+    1.999064707634560700f,
+  1.999052943994892300f, 1.999041106855761900f, 1.999029196217604100f,
+    1.999017212080857400f,
+  1.999005154445962200f, 1.998993023313361700f, 1.998980818683502100f,
+    1.998968540556831800f,
+  1.998956188933802800f, 1.998943763814868800f, 1.998931265200486900f,
+    1.998918693091116200f,
+  1.998906047487219600f, 1.998893328389261400f, 1.998880535797709700f,
+    1.998867669713034500f,
+  1.998854730135709400f, 1.998841717066209400f, 1.998828630505013400f,
+    1.998815470452602400f,
+  1.998802236909460500f, 1.998788929876074100f, 1.998775549352932400f,
+    1.998762095340527400f,
+  1.998748567839354000f, 1.998734966849909000f, 1.998721292372693100f,
+    1.998707544408208700f,
+  1.998693722956961500f, 1.998679828019459300f, 1.998665859596213500f,
+    1.998651817687737300f,
+  1.998637702294547000f, 1.998623513417161700f, 1.998609251056103100f,
+    1.998594915211895600f,
+  1.998580505885066100f, 1.998566023076144600f, 1.998551466785663400f,
+    1.998536837014157900f,
+  1.998522133762165900f, 1.998507357030227900f, 1.998492506818887200f,
+    1.998477583128690100f,
+  1.998462585960185000f, 1.998447515313923400f, 1.998432371190459500f,
+    1.998417153590349900f,
+  1.998401862514154200f, 1.998386497962434800f, 1.998371059935756300f,
+    1.998355548434686400f,
+  1.998339963459795400f, 1.998324305011656600f, 1.998308573090845200f,
+    1.998292767697940100f,
+  1.998276888833522300f, 1.998260936498175400f, 1.998244910692486000f,
+    1.998228811417043700f,
+  1.998212638672439900f, 1.998196392459269400f, 1.998180072778129600f,
+    1.998163679629620500f,
+  1.998147213014344900f, 1.998130672932908000f, 1.998114059385918400f,
+    1.998097372373986300f,
+  1.998080611897725700f, 1.998063777957752600f, 1.998046870554686100f,
+    1.998029889689147700f,
+  1.998012835361761900f, 1.997995707573155600f, 1.997978506323958600f,
+    1.997961231614803200f,
+  1.997943883446324800f, 1.997926461819161000f, 1.997908966733952500f,
+    1.997891398191342400f,
+  1.997873756191977000f, 1.997856040736504500f, 1.997838251825576400f,
+    1.997820389459846700f,
+  1.997802453639972300f, 1.997784444366612600f, 1.997766361640429800f,
+    1.997748205462088500f,
+  1.997729975832256600f, 1.997711672751604200f, 1.997693296220804000f,
+    1.997674846240532000f,
+  1.997656322811466500f, 1.997637725934288300f, 1.997619055609681600f,
+    1.997600311838332500f,
+  1.997581494620930300f, 1.997562603958166600f, 1.997543639850736200f,
+    1.997524602299336500f,
+  1.997505491304667000f, 1.997486306867430900f, 1.997467048988333000f,
+    1.997447717668082000f,
+  1.997428312907388200f, 1.997408834706965000f, 1.997389283067528800f,
+    1.997369657989798400f,
+  1.997349959474495200f, 1.997330187522343700f, 1.997310342134070800f,
+    1.997290423310406100f,
+  1.997270431052081900f, 1.997250365359833200f, 1.997230226234397900f,
+    1.997210013676516700f,
+  1.997189727686932400f, 1.997169368266390900f, 1.997148935415640600f,
+    1.997128429135433400f,
+  1.997107849426522600f, 1.997087196289665000f, 1.997066469725620200f,
+    1.997045669735150000f,
+  1.997024796319019300f, 1.997003849477995600f, 1.996982829212848900f,
+    1.996961735524351900f,
+  1.996940568413280600f, 1.996919327880412900f, 1.996898013926530000f,
+    1.996876626552415400f,
+  1.996855165758855600f, 1.996833631546639300f, 1.996812023916558800f,
+    1.996790342869408000f,
+  1.996768588405984300f, 1.996746760527087700f, 1.996724859233520500f,
+    1.996702884526087900f,
+  1.996680836405598100f, 1.996658714872861800f, 1.996636519928692000f,
+    1.996614251573904900f,
+  1.996591909809319400f, 1.996569494635756600f, 1.996547006054041100f,
+    1.996524444064999400f,
+  1.996501808669461000f, 1.996479099868258400f, 1.996456317662226300f,
+    1.996433462052202600f,
+  1.996410533039027400f, 1.996387530623543900f, 1.996364454806597500f,
+    1.996341305589037100f,
+  1.996318082971713500f, 1.996294786955480800f, 1.996271417541195300f,
+    1.996247974729716200f,
+  1.996224458521905600f, 1.996200868918628100f, 1.996177205920750800f,
+    1.996153469529144100f,
+  1.996129659744680300f, 1.996105776568235100f, 1.996081820000686500f,
+    1.996057790042915500f,
+  1.996033686695805300f, 1.996009509960242400f, 1.995985259837115500f,
+    1.995960936327316300f,
+  1.995936539431739000f, 1.995912069151280800f, 1.995887525486841300f,
+    1.995862908439323100f,
+  1.995838218009630800f, 1.995813454198672700f, 1.995788617007359100f,
+    1.995763706436603200f,
+  1.995738722487320600f, 1.995713665160430600f, 1.995688534456853800f,
+    1.995663330377514400f,
+  1.995638052923339300f, 1.995612702095257400f, 1.995587277894201400f,
+    1.995561780321105600f,
+  1.995536209376907600f, 1.995510565062547800f, 1.995484847378968600f,
+    1.995459056327116000f,
+  1.995433191907938000f, 1.995407254122385700f, 1.995381242971412600f,
+    1.995355158455975200f,
+  1.995329000577032800f, 1.995302769335546500f, 1.995276464732481200f,
+    1.995250086768804100f,
+  1.995223635445484900f, 1.995197110763496000f, 1.995170512723813100f,
+    1.995143841327413400f,
+  1.995117096575278200f, 1.995090278468390600f, 1.995063387007736600f,
+    1.995036422194304700f,
+  1.995009384029086800f, 1.994982272513076600f, 1.994955087647271000f,
+    1.994927829432669800f,
+  1.994900497870274900f, 1.994873092961091200f, 1.994845614706126400f,
+    1.994818063106391000f,
+  1.994790438162897600f, 1.994762739876662100f, 1.994734968248702800f,
+    1.994707123280041100f,
+  1.994679204971700100f, 1.994651213324707000f, 1.994623148340090700f,
+    1.994595010018883000f,
+  1.994566798362118300f, 1.994538513370834200f, 1.994510155046070700f,
+    1.994481723388870100f,
+  1.994453218400277900f, 1.994424640081342100f, 1.994395988433113700f,
+    1.994367263456646100f,
+  1.994338465152995000f, 1.994309593523219600f, 1.994280648568381500f,
+    1.994251630289544600f,
+  1.994222538687776100f, 1.994193373764145500f, 1.994164135519725000f,
+    1.994134823955589800f,
+  1.994105439072817700f, 1.994075980872488800f, 1.994046449355686200f,
+    1.994016844523496000f,
+  1.993987166377006600f, 1.993957414917308700f, 1.993927590145496900f,
+    1.993897692062667200f,
+  1.993867720669919400f, 1.993837675968354700f, 1.993807557959078600f,
+    1.993777366643197900f,
+  1.993747102021822900f, 1.993716764096066200f, 1.993686352867043200f,
+    1.993655868335872300f,
+  1.993625310503674100f, 1.993594679371572200f, 1.993563974940692800f,
+    1.993533197212164800f,
+  1.993502346187119700f, 1.993471421866692200f, 1.993440424252018900f,
+    1.993409353344239600f,
+  1.993378209144496700f, 1.993346991653935300f, 1.993315700873703200f,
+    1.993284336804950900f,
+  1.993252899448831400f, 1.993221388806500900f, 1.993189804879117500f,
+    1.993158147667842800f,
+  1.993126417173840500f, 1.993094613398277400f, 1.993062736342323000f,
+    1.993030786007148800f,
+  1.992998762393930000f, 1.992966665503844000f, 1.992934495338070800f,
+    1.992902251897793000f,
+  1.992869935184196300f, 1.992837545198469000f, 1.992805081941801700f,
+    1.992772545415388200f,
+  1.992739935620424700f, 1.992707252558110200f, 1.992674496229646500f,
+    1.992641666636237700f,
+  1.992608763779091000f, 1.992575787659416100f, 1.992542738278425300f,
+    1.992509615637334100f,
+  1.992476419737359900f, 1.992443150579723500f, 1.992409808165648100f,
+    1.992376392496359300f,
+  1.992342903573086000f, 1.992309341397059600f, 1.992275705969513800f,
+    1.992241997291685400f,
+  1.992208215364813700f, 1.992174360190140900f, 1.992140431768911500f,
+    1.992106430102373400f,
+  1.992072355191776300f, 1.992038207038373300f, 1.992003985643419700f,
+    1.991969691008174100f,
+  1.991935323133897000f, 1.991900882021852200f, 1.991866367673306200f,
+    1.991831780089527500f,
+  1.991797119271788300f, 1.991762385221362600f, 1.991727577939527600f,
+    1.991692697427563300f,
+  1.991657743686751700f, 1.991622716718378400f, 1.991587616523731000f,
+    1.991552443104099800f,
+  1.991517196460778500f, 1.991481876595062800f, 1.991446483508251500f,
+    1.991411017201645500f,
+  1.991375477676549100f, 1.991339864934268800f, 1.991304178976114100f,
+    1.991268419803397200f,
+  1.991232587417432600f, 1.991196681819537900f, 1.991160703011033200f,
+    1.991124650993241400f,
+  1.991088525767488200f, 1.991052327335101300f, 1.991016055697411900f,
+    1.990979710855753900f,
+  1.990943292811463000f, 1.990906801565878600f, 1.990870237120342400f,
+    1.990833599476198800f,
+  1.990796888634794400f, 1.990760104597479400f, 1.990723247365606200f,
+    1.990686316940529800f,
+  1.990649313323608100f, 1.990612236516201300f, 1.990575086519673200f,
+    1.990537863335389400f,
+  1.990500566964718400f, 1.990463197409031700f, 1.990425754669703100f,
+    1.990388238748109100f,
+  1.990350649645629600f, 1.990312987363646000f, 1.990275251903543600f,
+    1.990237443266709400f,
+  1.990199561454533600f, 1.990161606468409300f, 1.990123578309731700f,
+    1.990085476979899000f,
+  1.990047302480312300f, 1.990009054812374800f, 1.989970733977493000f,
+    1.989932339977075900f,
+  1.989893872812535000f, 1.989855332485284800f, 1.989816718996742200f,
+    1.989778032348326700f,
+  1.989739272541461100f, 1.989700439577570400f, 1.989661533458082100f,
+    1.989622554184426800f,
+  1.989583501758037700f, 1.989544376180350600f, 1.989505177452804100f,
+    1.989465905576839600f,
+  1.989426560553900500f, 1.989387142385433900f, 1.989347651072888900f,
+    1.989308086617717500f,
+  1.989268449021374300f, 1.989228738285316900f, 1.989188954411005100f,
+    1.989149097399901500f,
+  1.989109167253472000f, 1.989069163973184300f, 1.989029087560509700f,
+    1.988988938016921000f,
+  1.988948715343894900f, 1.988908419542910100f, 1.988868050615448100f,
+    1.988827608562993200f,
+  1.988787093387032600f, 1.988746505089055600f, 1.988705843670554500f,
+    1.988665109133024500f,
+  1.988624301477963200f, 1.988583420706871100f, 1.988542466821251000f,
+    1.988501439822608900f,
+  1.988460339712453200f, 1.988419166492295000f, 1.988377920163648000f,
+    1.988336600728029000f,
+  1.988295208186956700f, 1.988253742541953800f, 1.988212203794544000f,
+    1.988170591946255100f,
+  1.988128906998616800f, 1.988087148953161700f, 1.988045317811425700f,
+    1.988003413574946000f,
+  1.987961436245263800f, 1.987919385823922400f, 1.987877262312467600f,
+    1.987835065712448600f,
+  1.987792796025416500f, 1.987750453252925500f, 1.987708037396532800f,
+    1.987665548457797400f,
+  1.987622986438281700f, 1.987580351339550700f, 1.987537643163171700f,
+    1.987494861910715100f,
+  1.987452007583754100f, 1.987409080183863800f, 1.987366079712622900f,
+    1.987323006171612500f,
+  1.987279859562415900f, 1.987236639886619700f, 1.987193347145813000f,
+    1.987149981341587400f,
+  1.987106542475537400f, 1.987063030549260300f, 1.987019445564355700f,
+    1.986975787522426100f,
+  1.986932056425076800f, 1.986888252273915500f, 1.986844375070552900f,
+    1.986800424816602200f,
+  1.986756401513679400f, 1.986712305163403000f, 1.986668135767394300f,
+    1.986623893327277500f,
+  1.986579577844678900f, 1.986535189321228000f, 1.986490727758556800f,
+    1.986446193158300400f,
+  1.986401585522095600f, 1.986356904851583000f, 1.986312151148405200f,
+    1.986267324414207500f,
+  1.986222424650638400f, 1.986177451859348200f, 1.986132406041990900f,
+    1.986087287200222700f,
+  1.986042095335702300f, 1.985996830450091200f, 1.985951492545054100f,
+    1.985906081622257300f,
+  1.985860597683371000f, 1.985815040730067200f, 1.985769410764020900f,
+    1.985723707786909900f,
+  1.985677931800414500f, 1.985632082806217900f, 1.985586160806005700f,
+    1.985540165801466200f,
+  1.985494097794290800f, 1.985447956786173100f, 1.985401742778809500f,
+    1.985355455773899500f,
+  1.985309095773144500f, 1.985262662778249300f, 1.985216156790921000f,
+    1.985169577812869500f,
+  1.985122925845807400f, 1.985076200891450000f, 1.985029402951515200f,
+    1.984982532027723700f,
+  1.984935588121798700f, 1.984888571235466200f, 1.984841481370454900f,
+    1.984794318528496200f,
+  1.984747082711324100f, 1.984699773920675300f, 1.984652392158289500f,
+    1.984604937425908300f,
+  1.984557409725276700f, 1.984509809058142300f, 1.984462135426255000f,
+    1.984414388831367900f,
+  1.984366569275236400f, 1.984318676759618400f, 1.984270711286275200f,
+    1.984222672856969800f,
+  1.984174561473469200f, 1.984126377137541700f, 1.984078119850959200f,
+    1.984029789615495900f,
+  1.983981386432928800f, 1.983932910305037400f, 1.983884361233604100f,
+    1.983835739220414000f,
+  1.983787044267254700f, 1.983738276375916800f, 1.983689435548192900f,
+    1.983640521785879200f,
+  1.983591535090773800f, 1.983542475464678000f, 1.983493342909395500f,
+    1.983444137426732600f,
+  1.983394859018498900f, 1.983345507686505900f, 1.983296083432567900f,
+    1.983246586258502700f,
+  1.983197016166129400f, 1.983147373157271300f, 1.983097657233753100f,
+    1.983047868397403100f,
+  1.982998006650051400f, 1.982948071993531700f, 1.982898064429679900f,
+    1.982847983960334600f,
+  1.982797830587336800f, 1.982747604312531200f, 1.982697305137763700f,
+    1.982646933064884200f,
+  1.982596488095744300f, 1.982545970232199000f, 1.982495379476105800f,
+    1.982444715829324600f,
+  1.982393979293718200f, 1.982343169871152000f, 1.982292287563494300f,
+    1.982241332372615600f,
+  1.982190304300389400f, 1.982139203348692200f, 1.982088029519402300f,
+    1.982036782814401900f,
+  1.981985463235574700f, 1.981934070784807400f, 1.981882605463990200f,
+    1.981831067275015000f,
+  1.981779456219776600f, 1.981727772300172500f, 1.981676015518103500f,
+    1.981624185875472000f,
+  1.981572283374183800f, 1.981520308016147200f, 1.981468259803273300f,
+    1.981416138737475800f,
+  1.981363944820670800f, 1.981311678054777500f, 1.981259338441717400f,
+    1.981206925983415300f,
+  1.981154440681797800f, 1.981101882538794900f, 1.981049251556338900f,
+    1.980996547736364900f,
+  1.980943771080810700f, 1.980890921591616600f, 1.980837999270726100f,
+    1.980785004120084700f,
+  1.980731936141640900f, 1.980678795337345900f, 1.980625581709153600f,
+    1.980572295259020600f,
+  1.980518935988905700f, 1.980465503900771000f, 1.980411998996581200f,
+    1.980358421278303200f,
+  1.980304770747907300f, 1.980251047407365600f, 1.980197251258653900f,
+    1.980143382303749500f,
+  1.980089440544633600f, 1.980035425983289300f, 1.979981338621702200f,
+    1.979927178461861500f,
+  1.979872945505758000f, 1.979818639755386100f, 1.979764261212742400f,
+    1.979709809879825800f,
+  1.979655285758638900f, 1.979600688851186100f, 1.979546019159474900f,
+    1.979491276685515300f,
+  1.979436461431320000f, 1.979381573398904400f, 1.979326612590286400f,
+    1.979271579007487100f,
+  1.979216472652529900f, 1.979161293527440500f, 1.979106041634248100f,
+    1.979050716974983800f,
+  1.978995319551682100f, 1.978939849366379700f, 1.978884306421115900f,
+    1.978828690717932900f,
+  1.978773002258875600f, 1.978717241045991700f, 1.978661407081331100f,
+    1.978605500366946700f,
+  1.978549520904894000f, 1.978493468697231300f, 1.978437343746019600f,
+    1.978381146053322000f,
+  1.978324875621205300f, 1.978268532451738200f, 1.978212116546992100f,
+    1.978155627909041300f,
+  1.978099066539962900f, 1.978042432441836400f, 1.977985725616743900f,
+    1.977928946066770600f,
+  1.977872093794004200f, 1.977815168800534500f, 1.977758171088455100f,
+    1.977701100659861300f,
+  1.977643957516851400f, 1.977586741661526500f, 1.977529453095990200f,
+    1.977472091822348700f,
+  1.977414657842711200f, 1.977357151159189400f, 1.977299571773897700f,
+    1.977241919688953000f,
+  1.977184194906475000f, 1.977126397428586000f, 1.977068527257411300f,
+    1.977010584395078300f,
+  1.976952568843717700f, 1.976894480605462500f, 1.976836319682448300f,
+    1.976778086076813600f,
+  1.976719779790699500f, 1.976661400826249500f, 1.976602949185610500f,
+    1.976544424870931400f,
+  1.976485827884363800f, 1.976427158228062100f, 1.976368415904183900f,
+    1.976309600914888400f,
+  1.976250713262338600f, 1.976191752948699200f, 1.976132719976138000f,
+    1.976073614346825800f,
+  1.976014436062935700f, 1.975955185126643300f, 1.975895861540127200f,
+    1.975836465305568400f,
+  1.975776996425151000f, 1.975717454901061400f, 1.975657840735488800f,
+    1.975598153930624900f,
+  1.975538394488664200f, 1.975478562411804100f, 1.975418657702244300f,
+    1.975358680362187400f,
+  1.975298630393838500f, 1.975238507799405500f, 1.975178312581099100f,
+    1.975118044741132300f,
+  1.975057704281721000f, 1.974997291205083700f, 1.974936805513442000f,
+    1.974876247209019100f,
+  1.974815616294042200f, 1.974754912770740200f, 1.974694136641345300f,
+    1.974633287908091500f,
+  1.974572366573216400f, 1.974511372638960000f, 1.974450306107564900f,
+    1.974389166981275900f,
+  1.974327955262341400f, 1.974266670953011400f, 1.974205314055540000f,
+    1.974143884572182400f,
+  1.974082382505197400f, 1.974020807856846400f, 1.973959160629393100f,
+    1.973897440825104200f,
+  1.973835648446248900f, 1.973773783495099500f, 1.973711845973930000f,
+    1.973649835885018100f,
+  1.973587753230643400f, 1.973525598013088800f, 1.973463370234639600f,
+    1.973401069897583200f,
+  1.973338697004211100f, 1.973276251556815600f, 1.973213733557693400f,
+    1.973151143009142800f,
+  1.973088479913465100f, 1.973025744272964200f, 1.972962936089946800f,
+    1.972900055366722000f,
+  1.972837102105601900f, 1.972774076308901200f, 1.972710977978936900f,
+    1.972647807118029300f,
+  1.972584563728500700f, 1.972521247812676600f, 1.972457859372884500f,
+    1.972394398411455800f,
+  1.972330864930723200f, 1.972267258933022600f, 1.972203580420693000f,
+    1.972139829396075200f,
+  1.972076005861513700f, 1.972012109819354600f, 1.971948141271947500f,
+    1.971884100221644300f,
+  1.971819986670799500f, 1.971755800621770400f, 1.971691542076916800f,
+    1.971627211038601500f,
+  1.971562807509189800f, 1.971498331491049700f, 1.971433782986551400f,
+    1.971369161998068400f,
+  1.971304468527976800f, 1.971239702578655000f, 1.971174864152484400f,
+    1.971109953251848600f,
+  1.971044969879134600f, 1.970979914036731500f, 1.970914785727030800f,
+    1.970849584952427900f,
+  1.970784311715319400f, 1.970718966018105500f, 1.970653547863188600f,
+    1.970588057252973900f,
+  1.970522494189869800f, 1.970456858676286300f, 1.970391150714636800f,
+    1.970325370307337100f,
+  1.970259517456806100f, 1.970193592165464700f, 1.970127594435737000f,
+    1.970061524270049400f,
+  1.969995381670831100f, 1.969929166640514100f, 1.969862879181532700f,
+    1.969796519296324300f,
+  1.969730086987328900f, 1.969663582256988600f, 1.969597005107748900f,
+    1.969530355542057800f,
+  1.969463633562365400f, 1.969396839171125200f, 1.969329972370792700f,
+    1.969263033163826800f,
+  1.969196021552688500f, 1.969128937539841500f, 1.969061781127752400f,
+    1.968994552318890300f,
+  1.968927251115727200f, 1.968859877520737300f, 1.968792431536398000f,
+    1.968724913165188900f,
+  1.968657322409592500f, 1.968589659272094000f, 1.968521923755181000f,
+    1.968454115861344000f,
+  1.968386235593076300f, 1.968318282952873600f, 1.968250257943234200f,
+    1.968182160566659000f,
+  1.968113990825652200f, 1.968045748722719900f, 1.967977434260371300f,
+    1.967909047441118100f,
+  1.967840588267474500f, 1.967772056741957900f, 1.967703452867087800f,
+    1.967634776645386600f,
+  1.967566028079379200f, 1.967497207171593500f, 1.967428313924559600f,
+    1.967359348340810700f,
+  1.967290310422882700f, 1.967221200173313400f, 1.967152017594644200f,
+    1.967082762689418500f,
+  1.967013435460182700f, 1.966944035909485600f, 1.966874564039879300f,
+    1.966805019853917500f,
+  1.966735403354157500f, 1.966665714543159000f, 1.966595953423483800f,
+    1.966526119997697100f,
+  1.966456214268366600f, 1.966386236238062200f, 1.966316185909357200f,
+    1.966246063284826700f,
+  1.966175868367049400f, 1.966105601158605600f, 1.966035261662079300f,
+    1.965964849880056600f,
+  1.965894365815126000f, 1.965823809469879400f, 1.965753180846910900f,
+    1.965682479948817100f,
+  1.965611706778197700f, 1.965540861337654600f, 1.965469943629792700f,
+    1.965398953657219600f,
+  1.965327891422544900f, 1.965256756928382100f, 1.965185550177345900f,
+    1.965114271172054800f,
+  1.965042919915129400f, 1.964971496409193100f, 1.964900000656872000f,
+    1.964828432660794500f,
+  1.964756792423592200f, 1.964685079947899200f, 1.964613295236352000f,
+    1.964541438291590000f,
+  1.964469509116255000f, 1.964397507712991800f, 1.964325434084447600f,
+    1.964253288233272400f,
+  1.964181070162119000f, 1.964108779873642100f, 1.964036417370500300f,
+    1.963963982655353400f,
+  1.963891475730865400f, 1.963818896599701400f, 1.963746245264530700f,
+    1.963673521728023900f,
+  1.963600725992855200f, 1.963527858061700600f, 1.963454917937239800f,
+    1.963381905622154400f,
+  1.963308821119128700f, 1.963235664430850200f, 1.963162435560008100f,
+    1.963089134509295300f,
+  1.963015761281406800f, 1.962942315879040000f, 1.962868798304895400f,
+    1.962795208561676200f,
+  1.962721546652088200f, 1.962647812578839400f, 1.962574006344640900f,
+    1.962500127952206300f,
+  1.962426177404252200f, 1.962352154703497200f, 1.962278059852663000f,
+    1.962203892854473800f,
+  1.962129653711656800f, 1.962055342426941400f, 1.961980959003059500f,
+    1.961906503442746300f,
+  1.961831975748739200f, 1.961757375923778700f, 1.961682703970607100f,
+    1.961607959891970200f,
+  1.961533143690616000f, 1.961458255369295400f, 1.961383294930761700f,
+    1.961308262377770900f,
+  1.961233157713082200f, 1.961157980939456400f, 1.961082732059657800f,
+    1.961007411076453000f,
+  1.960932017992611500f, 1.960856552810905200f, 1.960781015534108800f,
+    1.960705406164999300f,
+  1.960629724706357100f, 1.960553971160964500f, 1.960478145531606700f,
+    1.960402247821071900f,
+  1.960326278032150200f, 1.960250236167635100f, 1.960174122230322400f,
+    1.960097936223010400f,
+  1.960021678148500500f, 1.959945348009596500f, 1.959868945809104500f,
+    1.959792471549834000f,
+  1.959715925234596600f, 1.959639306866206600f, 1.959562616447480900f,
+    1.959485853981239600f,
+  1.959409019470304700f, 1.959332112917501400f, 1.959255134325657000f,
+    1.959178083697602300f,
+  1.959100961036169800f, 1.959023766344195200f, 1.958946499624516700f,
+    1.958869160879975500f,
+  1.958791750113414700f, 1.958714267327680500f, 1.958636712525621900f,
+    1.958559085710090500f,
+  1.958481386883940100f, 1.958403616050027600f, 1.958325773211212300f,
+    1.958247858370356400f,
+  1.958169871530324600f, 1.958091812693984400f, 1.958013681864205500f,
+    1.957935479043860600f,
+  1.957857204235825100f, 1.957778857442976900f, 1.957700438668196700f,
+    1.957621947914367500f,
+  1.957543385184375300f, 1.957464750481108700f, 1.957386043807458800f,
+    1.957307265166319500f,
+  1.957228414560587200f, 1.957149491993160900f, 1.957070497466942400f,
+    1.956991430984836400f,
+  1.956912292549749500f, 1.956833082164591600f, 1.956753799832275300f,
+    1.956674445555715000f,
+  1.956595019337829000f, 1.956515521181537000f, 1.956435951089762200f,
+    1.956356309065430100f,
+  1.956276595111468900f, 1.956196809230809500f, 1.956116951426385600f,
+    1.956037021701132900f,
+  1.955957020057990500f, 1.955876946499899700f, 1.955796801029804800f,
+    1.955716583650652000f,
+  1.955636294365391300f, 1.955555933176974300f, 1.955475500088355900f,
+    1.955394995102493100f,
+  1.955314418222346100f, 1.955233769450877200f, 1.955153048791052000f,
+    1.955072256245838000f,
+  1.954991391818206000f, 1.954910455511129000f, 1.954829447327582900f,
+    1.954748367270545900f,
+  1.954667215342999600f, 1.954585991547927100f, 1.954504695888315000f,
+    1.954423328367152600f,
+  1.954341888987431100f, 1.954260377752145000f, 1.954178794664291200f,
+    1.954097139726869600f,
+  1.954015412942881900f, 1.953933614315333200f, 1.953851743847231100f,
+    1.953769801541585400f,
+  1.953687787401409400f, 1.953605701429718100f, 1.953523543629529700f,
+    1.953441314003864900f,
+  1.953359012555747200f, 1.953276639288202400f, 1.953194194204259200f,
+    1.953111677306948800f,
+  1.953029088599305100f, 1.952946428084364900f, 1.952863695765167100f,
+    1.952780891644753500f,
+  1.952698015726169100f, 1.952615068012460300f, 1.952532048506677300f,
+    1.952448957211872200f,
+  1.952365794131100300f, 1.952282559267419100f, 1.952199252623889200f,
+    1.952115874203572900f,
+  1.952032424009536600f, 1.951948902044847900f, 1.951865308312577900f,
+    1.951781642815800100f,
+  1.951697905557590700f, 1.951614096541028500f, 1.951530215769194700f,
+    1.951446263245173500f,
+  1.951362238972051500f, 1.951278142952918200f, 1.951193975190865600f,
+    1.951109735688987900f,
+  1.951025424450382900f, 1.950941041478150100f, 1.950856586775392200f,
+    1.950772060345214300f,
+  1.950687462190724200f, 1.950602792315032200f, 1.950518050721251600f,
+    1.950433237412498000f,
+  1.950348352391889600f, 1.950263395662547700f, 1.950178367227595900f,
+    1.950093267090159800f,
+  1.950008095253369200f, 1.949922851720355100f, 1.949837536494251700f,
+    1.949752149578196000f,
+  1.949666690975327100f, 1.949581160688787400f, 1.949495558721721500f,
+    1.949409885077276500f,
+  1.949324139758602700f, 1.949238322768852800f, 1.949152434111181700f,
+    1.949066473788747300f,
+  1.948980441804710300f, 1.948894338162233900f, 1.948808162864483600f,
+    1.948721915914628100f,
+  1.948635597315838200f, 1.948549207071288000f, 1.948462745184153400f,
+    1.948376211657613500f,
+  1.948289606494849800f, 1.948202929699046800f, 1.948116181273391100f,
+    1.948029361221072400f,
+  1.947942469545282500f, 1.947855506249216700f, 1.947768471336071700f,
+    1.947681364809048100f,
+  1.947594186671348000f, 1.947506936926177300f, 1.947419615576743600f,
+    1.947332222626257500f,
+  1.947244758077932200f, 1.947157221934983500f, 1.947069614200629900f,
+    1.946981934878092300f,
+  1.946894183970594900f, 1.946806361481363500f, 1.946718467413627300f,
+    1.946630501770618000f,
+  1.946542464555569800f, 1.946454355771719300f, 1.946366175422306500f,
+    1.946277923510573200f,
+  1.946189600039764300f, 1.946101205013127000f, 1.946012738433911600f,
+    1.945924200305370700f,
+  1.945835590630759400f, 1.945746909413335900f, 1.945658156656360700f,
+    1.945569332363096700f,
+  1.945480436536810100f, 1.945391469180769200f, 1.945302430298244900f,
+    1.945213319892511200f,
+  1.945124137966844200f, 1.945034884524523100f, 1.944945559568829200f,
+    1.944856163103046800f,
+  1.944766695130463000f, 1.944677155654366900f, 1.944587544678050900f,
+    1.944497862204809900f,
+  1.944408108237940700f, 1.944318282780743900f, 1.944228385836521700f,
+    1.944138417408579400f,
+  1.944048377500225100f, 1.943958266114769200f, 1.943868083255524800f,
+    1.943777828925807600f,
+  1.943687503128936200f, 1.943597105868231500f, 1.943506637147017300f,
+    1.943416096968619400f,
+  1.943325485336367300f, 1.943234802253592400f, 1.943144047723628400f,
+    1.943053221749812400f,
+  1.942962324335484100f, 1.942871355483985200f, 1.942780315198660200f,
+    1.942689203482856900f,
+  1.942598020339924700f, 1.942506765773216500f, 1.942415439786087300f,
+    1.942324042381895000f,
+  1.942232573564000000f, 1.942141033335765400f, 1.942049421700556600f,
+    1.941957738661741900f,
+  1.941865984222692900f, 1.941774158386782200f, 1.941682261157386700f,
+    1.941590292537884700f,
+  1.941498252531658200f, 1.941406141142090600f, 1.941313958372568900f,
+    1.941221704226482500f,
+  1.941129378707223000f, 1.941036981818185400f, 1.940944513562766300f,
+    1.940851973944365900f,
+  1.940759362966386600f, 1.940666680632233200f, 1.940573926945313700f,
+    1.940481101909038200f,
+  1.940388205526819600f, 1.940295237802073500f, 1.940202198738217900f,
+    1.940109088338673600f,
+  1.940015906606864300f, 1.939922653546215500f, 1.939829329160156500f,
+    1.939735933452118000f,
+  1.939642466425534300f, 1.939548928083841800f, 1.939455318430479500f,
+    1.939361637468889100f,
+  1.939267885202515400f, 1.939174061634805000f, 1.939080166769207700f,
+    1.938986200609175600f,
+  1.938892163158163700f, 1.938798054419629500f, 1.938703874397032800f,
+    1.938609623093837000f,
+  1.938515300513506700f, 1.938420906659510600f, 1.938326441535318500f,
+    1.938231905144404400f,
+  1.938137297490243500f, 1.938042618576314400f, 1.937947868406098500f,
+    1.937853046983079300f,
+  1.937758154310742900f, 1.937663190392578500f, 1.937568155232077600f,
+    1.937473048832734500f,
+  1.937377871198045600f, 1.937282622331510500f, 1.937187302236631500f,
+    1.937091910916912900f,
+  1.936996448375861900f, 1.936900914616988900f, 1.936805309643805800f,
+    1.936709633459828200f,
+  1.936613886068573500f, 1.936518067473562300f, 1.936422177678317300f,
+    1.936326216686364400f,
+  1.936230184501231500f, 1.936134081126449800f, 1.936037906565552400f,
+    1.935941660822075600f,
+  1.935845343899558000f, 1.935748955801540800f, 1.935652496531568000f,
+    1.935555966093186300f,
+  1.935459364489944500f, 1.935362691725394500f, 1.935265947803090900f,
+    1.935169132726590500f,
+  1.935072246499453000f, 1.934975289125240500f, 1.934878260607517900f,
+    1.934781160949852600f,
+  1.934683990155814800f, 1.934586748228977100f, 1.934489435172914900f,
+    1.934392050991206300f,
+  1.934294595687431300f, 1.934197069265173500f, 1.934099471728018700f,
+    1.934001803079554700f,
+  1.933904063323373300f, 1.933806252463067500f, 1.933708370502233800f,
+    1.933610417444471000f,
+  1.933512393293380600f, 1.933414298052566600f, 1.933316131725635800f,
+    1.933217894316197300f,
+  1.933119585827862900f, 1.933021206264247600f, 1.932922755628968100f,
+    1.932824233925644300f,
+  1.932725641157898600f, 1.932626977329356100f, 1.932528242443643900f,
+    1.932429436504392800f,
+  1.932330559515235100f, 1.932231611479806800f, 1.932132592401745400f,
+    1.932033502284691700f,
+  1.931934341132289100f, 1.931835108948183300f, 1.931735805736022800f,
+    1.931636431499459000f,
+  1.931536986242145200f, 1.931437469967737900f, 1.931337882679895900f,
+    1.931238224382281000f,
+  1.931138495078557300f, 1.931038694772391200f, 1.930938823467452500f,
+    1.930838881167413100f,
+  1.930738867875947400f, 1.930638783596732700f, 1.930538628333448900f,
+    1.930438402089778200f,
+  1.930338104869405900f, 1.930237736676019500f, 1.930137297513309300f,
+    1.930036787384968200f,
+  1.929936206294691400f, 1.929835554246177400f, 1.929734831243126600f,
+    1.929634037289242400f,
+  1.929533172388230700f, 1.929432236543799900f, 1.929331229759661200f,
+    1.929230152039528500f,
+  1.929129003387117800f, 1.929027783806148300f, 1.928926493300341400f,
+    1.928825131873421500f,
+  1.928723699529115000f, 1.928622196271151800f, 1.928520622103263400f,
+    1.928418977029184600f,
+  1.928317261052652700f, 1.928215474177407100f, 1.928113616407190600f,
+    1.928011687745748300f,
+  1.927909688196827400f, 1.927807617764178300f, 1.927705476451554000f,
+    1.927603264262709900f,
+  1.927500981201404100f, 1.927398627271397000f, 1.927296202476451900f,
+    1.927193706820335100f,
+  1.927091140306814500f, 1.926988502939661400f, 1.926885794722649600f,
+    1.926783015659555300f,
+  1.926680165754157500f, 1.926577245010237400f, 1.926474253431579500f,
+    1.926371191021970100f,
+  1.926268057785198700f, 1.926164853725057300f, 1.926061578845340600f,
+    1.925958233149845000f,
+  1.925854816642371000f, 1.925751329326720600f, 1.925647771206698600f,
+    1.925544142286112800f,
+  1.925440442568773000f, 1.925336672058492300f, 1.925232830759086000f,
+    1.925128918674371900f,
+  1.925024935808170600f, 1.924920882164305300f, 1.924816757746601800f,
+    1.924712562558888100f,
+  1.924608296604995800f, 1.924503959888757900f, 1.924399552414010700f,
+    1.924295074184593000f,
+  1.924190525204346300f, 1.924085905477114400f, 1.923981215006744100f,
+    1.923876453797084300f,
+  1.923771621851986700f, 1.923666719175306100f, 1.923561745770898900f,
+    1.923456701642625200f,
+  1.923351586794346900f, 1.923246401229928600f, 1.923141144953238300f,
+    1.923035817968145300f,
+  1.922930420278522500f, 1.922824951888245000f, 1.922719412801190600f,
+    1.922613803021239600f,
+  1.922508122552275100f, 1.922402371398182600f, 1.922296549562850100f,
+    1.922190657050168800f,
+  1.922084693864031700f, 1.921978660008334600f, 1.921872555486976700f,
+    1.921766380303858500f,
+  1.921660134462884100f, 1.921553817967959900f, 1.921447430822994500f,
+    1.921340973031900000f,
+  1.921234444598590100f, 1.921127845526981600f, 1.921021175820994100f,
+    1.920914435484549100f,
+  1.920807624521571700f, 1.920700742935988600f, 1.920593790731729600f,
+    1.920486767912727300f,
+  1.920379674482916500f, 1.920272510446234400f, 1.920165275806621400f,
+    1.920057970568020100f,
+  1.919950594734376000f, 1.919843148309637000f, 1.919735631297753400f,
+    1.919628043702678300f,
+  1.919520385528367300f, 1.919412656778779000f, 1.919304857457874200f,
+    1.919196987569616200f,
+  1.919089047117971100f, 1.918981036106907700f, 1.918872954540397300f,
+    1.918764802422413500f,
+  1.918656579756932800f, 1.918548286547934400f, 1.918439922799399800f,
+    1.918331488515313300f,
+  1.918222983699661600f, 1.918114408356434300f, 1.918005762489623400f,
+    1.917897046103223200f,
+  1.917788259201231200f, 1.917679401787647100f, 1.917570473866473200f,
+    1.917461475441714500f,
+  1.917352406517378600f, 1.917243267097475700f, 1.917134057186018300f,
+    1.917024776787022100f,
+  1.916915425904504700f, 1.916806004542486800f, 1.916696512704991500f,
+    1.916586950396044400f,
+  1.916477317619674100f, 1.916367614379911100f, 1.916257840680788900f,
+    1.916147996526343700f,
+  1.916038081920614400f, 1.915928096867641800f, 1.915818041371470000f,
+    1.915707915436145200f,
+  1.915597719065716700f, 1.915487452264236000f, 1.915377115035757200f,
+    1.915266707384337200f,
+  1.915156229314035200f, 1.915045680828913400f, 1.914935061933036300f,
+    1.914824372630470800f,
+  1.914713612925287100f, 1.914602782821557000f, 1.914491882323355700f,
+    1.914380911434760500f,
+  1.914269870159851700f, 1.914158758502712000f, 1.914047576467426500f,
+    1.913936324058083100f,
+  1.913825001278772100f, 1.913713608133586600f, 1.913602144626622500f,
+    1.913490610761977600f,
+  1.913379006543752800f, 1.913267331976051400f, 1.913155587062979500f,
+    1.913043771808645700f,
+  1.912931886217160900f, 1.912819930292639000f, 1.912707904039196300f,
+    1.912595807460951500f,
+  1.912483640562026200f, 1.912371403346544400f, 1.912259095818632700f,
+    1.912146717982420500f,
+  1.912034269842039600f, 1.911921751401624200f, 1.911809162665311500f,
+    1.911696503637241100f,
+  1.911583774321554700f, 1.911470974722397500f, 1.911358104843916500f,
+    1.911245164690262000f,
+  1.911132154265586100f, 1.911019073574044200f, 1.910905922619793800f,
+    1.910792701406995000f,
+  1.910679409939810600f, 1.910566048222406300f, 1.910452616258949900f,
+    1.910339114053611900f,
+  1.910225541610565800f, 1.910111898933986900f, 1.909998186028053700f,
+    1.909884402896947100f,
+  1.909770549544850500f, 1.909656625975950200f, 1.909542632194434700f,
+    1.909428568204495100f,
+  1.909314434010325400f, 1.909200229616121700f, 1.909085955026083200f,
+    1.908971610244411600f,
+  1.908857195275310800f, 1.908742710122987700f, 1.908628154791651300f,
+    1.908513529285513500f,
+  1.908398833608789100f, 1.908284067765694900f, 1.908169231760450400f,
+    1.908054325597278200f,
+  1.907939349280402400f, 1.907824302814050900f, 1.907709186202453600f,
+    1.907593999449842800f,
+  1.907478742560453600f, 1.907363415538523700f, 1.907248018388293400f,
+    1.907132551114005600f,
+  1.907017013719905600f, 1.906901406210241200f, 1.906785728589263300f,
+    1.906669980861224900f,
+  1.906554163030381500f, 1.906438275100991600f, 1.906322317077316300f,
+    1.906206288963618700f,
+  1.906090190764164700f, 1.905974022483223300f, 1.905857784125065500f,
+    1.905741475693964800f,
+  1.905625097194197900f, 1.905508648630043700f, 1.905392130005783400f,
+    1.905275541325701400f,
+  1.905158882594083900f, 1.905042153815220700f, 1.904925354993402900f,
+    1.904808486132925300f,
+  1.904691547238084800f, 1.904574538313180700f, 1.904457459362515200f,
+    1.904340310390393100f,
+  1.904223091401121600f, 1.904105802399010300f, 1.903988443388371600f,
+    1.903871014373520700f,
+  1.903753515358774800f, 1.903635946348454500f, 1.903518307346881800f,
+    1.903400598358382600f,
+  1.903282819387284200f, 1.903164970437917400f, 1.903047051514615000f,
+    1.902929062621712600f,
+  1.902811003763547900f, 1.902692874944462300f, 1.902574676168798700f,
+    1.902456407440902700f,
+  1.902338068765123200f, 1.902219660145810800f, 1.902101181587319000f,
+    1.901982633094004200f,
+  1.901864014670225000f, 1.901745326320342500f, 1.901626568048721000f,
+    1.901507739859726200f,
+  1.901388841757727600f, 1.901269873747096600f, 1.901150835832207100f,
+    1.901031728017436300f,
+  1.900912550307162700f, 1.900793302705768900f, 1.900673985217638900f,
+    1.900554597847159400f,
+  1.900435140598720500f, 1.900315613476714100f, 1.900196016485534700f,
+    1.900076349629579600f,
+  1.899956612913248800f, 1.899836806340944300f, 1.899716929917071500f,
+    1.899596983646037600f,
+  1.899476967532252900f, 1.899356881580129800f, 1.899236725794083600f,
+    1.899116500178532200f,
+  1.898996204737895900f, 1.898875839476597700f, 1.898755404399062900f,
+    1.898634899509719500f,
+  1.898514324812998300f, 1.898393680313332600f, 1.898272966015157800f,
+    1.898152181922912600f,
+  1.898031328041037700f, 1.897910404373976500f, 1.897789410926175000f,
+    1.897668347702081900f,
+  1.897547214706148300f, 1.897426011942827900f, 1.897304739416577200f,
+    1.897183397131854600f,
+  1.897061985093121800f, 1.896940503304842800f, 1.896818951771484000f,
+    1.896697330497514800f,
+  1.896575639487406300f, 1.896453878745633100f, 1.896332048276672100f,
+    1.896210148085002400f,
+  1.896088178175106200f, 1.895966138551467700f, 1.895844029218574100f,
+    1.895721850180915000f,
+  1.895599601442982600f, 1.895477283009271400f, 1.895354894884279100f,
+    1.895232437072505300f,
+  1.895109909578452500f, 1.894987312406625700f, 1.894864645561532100f,
+    1.894741909047682500f,
+  1.894619102869589100f, 1.894496227031767100f, 1.894373281538734400f,
+    1.894250266395011600f,
+  1.894127181605121100f, 1.894004027173588700f, 1.893880803104942600f,
+    1.893757509403713100f,
+  1.893634146074433500f, 1.893510713121639300f, 1.893387210549869000f,
+    1.893263638363663400f,
+  1.893139996567565900f, 1.893016285166122500f, 1.892892504163881600f,
+    1.892768653565394300f,
+  1.892644733375214300f, 1.892520743597897700f, 1.892396684238003300f,
+    1.892272555300092300f,
+  1.892148356788728700f, 1.892024088708479200f, 1.891899751063912200f,
+    1.891775343859599400f,
+  1.891650867100115300f, 1.891526320790036100f, 1.891401704933941100f,
+    1.891277019536412400f,
+  1.891152264602033800f, 1.891027440135392600f, 1.890902546141078000f,
+    1.890777582623682300f,
+  1.890652549587799700f, 1.890527447038027300f, 1.890402274978965100f,
+    1.890277033415215200f,
+  1.890151722351382200f, 1.890026341792073500f, 1.889900891741899100f,
+    1.889775372205471300f,
+  1.889649783187405100f, 1.889524124692318200f, 1.889398396724830500f,
+    1.889272599289564900f,
+  1.889146732391146400f, 1.889020796034202700f, 1.888894790223364600f,
+    1.888768714963264400f,
+  1.888642570258537700f, 1.888516356113822700f, 1.888390072533759700f,
+    1.888263719522991900f,
+  1.888137297086165000f, 1.888010805227927000f, 1.887884243952928600f,
+    1.887757613265823400f,
+  1.887630913171267000f, 1.887504143673917700f, 1.887377304778437000f,
+    1.887250396489487800f,
+  1.887123418811736500f, 1.886996371749851700f, 1.886869255308504200f,
+    1.886742069492368000f,
+  1.886614814306119400f, 1.886487489754437300f, 1.886360095842002600f,
+    1.886232632573499700f,
+  1.886105099953614900f, 1.885977497987037000f, 1.885849826678457800f,
+    1.885722086032571200f,
+  1.885594276054074300f, 1.885466396747665700f, 1.885338448118047700f,
+    1.885210430169924200f,
+  1.885082342908002400f, 1.884954186336991400f, 1.884825960461603100f,
+    1.884697665286552400f,
+  1.884569300816556000f, 1.884440867056333700f, 1.884312364010607600f,
+    1.884183791684102400f,
+  1.884055150081545200f, 1.883926439207665800f, 1.883797659067196800f,
+    1.883668809664872600f,
+  1.883539891005431100f, 1.883410903093611900f, 1.883281845934157800f,
+    1.883152719531813800f,
+  1.883023523891327300f, 1.882894259017448900f, 1.882764924914930700f,
+    1.882635521588528400f,
+  1.882506049042999700f, 1.882376507283104900f, 1.882246896313606800f,
+    1.882117216139270700f,
+  1.881987466764865100f, 1.881857648195159900f, 1.881727760434928500f,
+    1.881597803488946500f,
+  1.881467777361992100f, 1.881337682058845700f, 1.881207517584290600f,
+    1.881077283943112900f,
+  1.880946981140100500f, 1.880816609180044700f, 1.880686168067738500f,
+    1.880555657807977800f,
+  1.880425078405561600f, 1.880294429865290600f, 1.880163712191968300f,
+    1.880032925390400900f,
+  1.879902069465397200f, 1.879771144421768200f, 1.879640150264327600f,
+    1.879509086997891900f,
+  1.879377954627279700f, 1.879246753157312700f, 1.879115482592814500f,
+    1.878984142938611600f,
+  1.878852734199532900f, 1.878721256380410100f, 1.878589709486077300f,
+    1.878458093521370800f,
+  1.878326408491130200f, 1.878194654400196600f, 1.878062831253414900f,
+    1.877930939055631100f,
+  1.877798977811695200f, 1.877666947526458700f, 1.877534848204775800f,
+    1.877402679851504000f,
+  1.877270442471502100f, 1.877138136069632400f, 1.877005760650759500f,
+    1.876873316219750200f,
+  1.876740802781474500f, 1.876608220340804100f, 1.876475568902614000f,
+    1.876342848471781200f,
+  1.876210059053185600f, 1.876077200651709500f, 1.875944273272237800f,
+    1.875811276919657500f,
+  1.875678211598858800f, 1.875545077314734000f, 1.875411874072178100f,
+    1.875278601876088700f,
+  1.875145260731365700f, 1.875011850642911600f, 1.874878371615631900f,
+    1.874744823654434000f,
+  1.874611206764227800f, 1.874477520949926500f, 1.874343766216444800f,
+    1.874209942568701100f,
+  1.874076050011615400f, 1.873942088550110400f, 1.873808058189111700f,
+    1.873673958933546900f,
+  1.873539790788347100f, 1.873405553758444600f, 1.873271247848775400f,
+    1.873136873064277000f,
+  1.873002429409890600f, 1.872867916890558900f, 1.872733335511227700f,
+    1.872598685276845000f,
+  1.872463966192361900f, 1.872329178262731200f, 1.872194321492908700f,
+    1.872059395887852900f,
+  1.871924401452524700f, 1.871789338191887100f, 1.871654206110906500f,
+    1.871519005214550700f,
+  1.871383735507791100f, 1.871248396995601300f, 1.871112989682956800f,
+    1.870977513574836500f,
+  1.870841968676221400f, 1.870706354992095000f, 1.870570672527443600f,
+    1.870434921287255700f,
+  1.870299101276522400f, 1.870163212500237900f, 1.870027254963397800f,
+    1.869891228671001200f,
+  1.869755133628049600f, 1.869618969839546500f, 1.869482737310498100f,
+    1.869346436045913800f,
+  1.869210066050804600f, 1.869073627330184700f, 1.868937119889070300f,
+    1.868800543732480600f,
+  1.868663898865437200f, 1.868527185292963700f, 1.868390403020087100f,
+    1.868253552051836200f,
+  1.868116632393243000f, 1.867979644049341200f, 1.867842587025167800f,
+    1.867705461325761800f,
+  1.867568266956164800f, 1.867431003921421500f, 1.867293672226578300f,
+    1.867156271876684500f,
+  1.867018802876792200f, 1.866881265231955500f, 1.866743658947231300f,
+    1.866605984027679000f,
+  1.866468240478360600f, 1.866330428304340300f, 1.866192547510685300f,
+    1.866054598102465000f,
+  1.865916580084751500f, 1.865778493462619100f, 1.865640338241145100f,
+    1.865502114425408900f,
+  1.865363822020492700f, 1.865225461031480900f, 1.865087031463460900f,
+    1.864948533321522300f,
+  1.864809966610757400f, 1.864671331336260600f, 1.864532627503129100f,
+    1.864393855116463200f,
+  1.864255014181364500f, 1.864116104702938000f, 1.863977126686291200f,
+    1.863838080136534000f,
+  1.863698965058778300f, 1.863559781458139300f, 1.863420529339734100f,
+    1.863281208708683000f,
+  1.863141819570107900f, 1.863002361929134500f, 1.862862835790889400f,
+    1.862723241160503300f,
+  1.862583578043108100f, 1.862443846443839300f, 1.862304046367834200f,
+    1.862164177820232700f,
+  1.862024240806177800f, 1.861884235330814300f, 1.861744161399289600f,
+    1.861604019016754200f,
+  1.861463808188360500f, 1.861323528919263800f, 1.861183181214621600f,
+    1.861042765079594200f,
+  1.860902280519344500f, 1.860761727539037300f, 1.860621106143840500f,
+    1.860480416338924600f,
+  1.860339658129461800f, 1.860198831520627900f, 1.860057936517600700f,
+    1.859916973125560000f,
+  1.859775941349689000f, 1.859634841195173100f, 1.859493672667199800f,
+    1.859352435770959900f,
+  1.859211130511645900f, 1.859069756894453400f, 1.858928314924580300f,
+    1.858786804607227100f,
+  1.858645225947596300f, 1.858503578950893900f, 1.858361863622327400f,
+    1.858220079967107600f,
+  1.858078227990447300f, 1.857936307697561900f, 1.857794319093669900f,
+    1.857652262183991000f,
+  1.857510136973749000f, 1.857367943468169100f, 1.857225681672479300f,
+    1.857083351591910300f,
+  1.856940953231694900f, 1.856798486597069000f, 1.856655951693270600f,
+    1.856513348525540300f,
+  1.856370677099121100f, 1.856227937419258700f, 1.856085129491201100f,
+    1.855942253320199200f,
+  1.855799308911506100f, 1.855656296270377300f, 1.855513215402071000f,
+    1.855370066311848000f,
+  1.855226849004971500f, 1.855083563486706900f, 1.854940209762322700f,
+    1.854796787837089500f,
+  1.854653297716280400f, 1.854509739405171300f, 1.854366112909040300f,
+    1.854222418233168400f,
+  1.854078655382838300f, 1.853934824363336200f, 1.853790925179950500f,
+    1.853646957837971500f,
+  1.853502922342692600f, 1.853358818699409900f, 1.853214646913421200f,
+    1.853070406990027500f,
+  1.852926098934532200f, 1.852781722752241000f, 1.852637278448462200f,
+    1.852492766028506400f,
+  1.852348185497687300f, 1.852203536861320600f, 1.852058820124724300f,
+    1.851914035293219700f,
+  1.851769182372129600f, 1.851624261366780400f, 1.851479272282500000f,
+    1.851334215124619300f,
+  1.851189089898471800f, 1.851043896609393400f, 1.850898635262721900f,
+    1.850753305863798800f,
+  1.850607908417967200f, 1.850462442930572900f, 1.850316909406964200f,
+    1.850171307852492200f,
+  1.850025638272510000f, 1.849879900672373600f, 1.849734095057441200f,
+    1.849588221433073700f,
+  1.849442279804634600f, 1.849296270177489800f, 1.849150192557007300f,
+    1.849004046948558200f,
+  1.848857833357515900f, 1.848711551789256300f, 1.848565202249157400f,
+    1.848418784742600400f,
+  1.848272299274968500f, 1.848125745851647800f, 1.847979124478026100f,
+    1.847832435159495000f,
+  1.847685677901447200f, 1.847538852709279100f, 1.847391959588388300f,
+    1.847244998544176300f,
+  1.847097969582046200f, 1.846950872707404000f, 1.846803707925657600f,
+    1.846656475242218300f,
+  1.846509174662499300f, 1.846361806191916000f, 1.846214369835887500f,
+    1.846066865599834000f,
+  1.845919293489179000f, 1.845771653509348200f, 1.845623945665770100f,
+    1.845476169963875500f,
+  1.845328326409097400f, 1.845180415006871800f, 1.845032435762637100f,
+    1.844884388681833800f,
+  1.844736273769905300f, 1.844588091032297400f, 1.844439840474458200f,
+    1.844291522101838800f,
+  1.844143135919891900f, 1.843994681934073600f, 1.843846160149842200f,
+    1.843697570572658200f,
+  1.843548913207985000f, 1.843400188061288000f, 1.843251395138035800f,
+    1.843102534443698900f,
+  1.842953605983750400f, 1.842804609763666100f, 1.842655545788924000f,
+    1.842506414065004900f,
+  1.842357214597392100f, 1.842207947391570900f, 1.842058612453029600f,
+    1.841909209787258900f,
+  1.841759739399751800f, 1.841610201296003800f, 1.841460595481513100f,
+    1.841310921961780500f,
+  1.841161180742308500f, 1.841011371828603200f, 1.840861495226172600f,
+    1.840711550940526700f,
+  1.840561538977179200f, 1.840411459341645400f, 1.840261312039443100f,
+    1.840111097076092800f,
+  1.839960814457117600f, 1.839810464188043100f, 1.839660046274397100f,
+    1.839509560721709800f,
+  1.839359007535514400f, 1.839208386721346500f, 1.839057698284743500f,
+    1.838906942231246100f,
+  1.838756118566397200f, 1.838605227295741800f, 1.838454268424828400f,
+    1.838303241959206700f,
+  1.838152147904429800f, 1.838000986266052900f, 1.837849757049633900f,
+    1.837698460260732900f,
+  1.837547095904912700f, 1.837395663987738700f, 1.837244164514778600f,
+    1.837092597491602100f,
+  1.836940962923782700f, 1.836789260816895000f, 1.836637491176516600f,
+    1.836485654008228200f,
+  1.836333749317611700f, 1.836181777110252900f, 1.836029737391738700f,
+    1.835877630167659800f,
+  1.835725455443608200f, 1.835573213225179400f, 1.835420903517970500f,
+    1.835268526327581900f,
+  1.835116081659615700f, 1.834963569519677100f, 1.834810989913373500f,
+    1.834658342846314800f,
+  1.834505628324113200f, 1.834352846352383700f, 1.834199996936744000f,
+    1.834047080082813300f,
+  1.833894095796214400f, 1.833741044082571900f, 1.833587924947513100f,
+    1.833434738396668000f,
+  1.833281484435668400f, 1.833128163070149300f, 1.832974774305747600f,
+    1.832821318148103500f,
+  1.832667794602858400f, 1.832514203675657600f, 1.832360545372147900f,
+    1.832206819697979000f,
+  1.832053026658802700f, 1.831899166260273700f, 1.831745238508049300f,
+    1.831591243407788300f,
+  1.831437180965153100f, 1.831283051185808300f, 1.831128854075420500f,
+    1.830974589639659000f,
+  1.830820257884196100f, 1.830665858814705600f, 1.830511392436864800f,
+    1.830356858756352800f,
+  1.830202257778851300f, 1.830047589510044500f, 1.829892853955619200f,
+    1.829738051121264600f,
+  1.829583181012672400f, 1.829428243635536500f, 1.829273238995553700f,
+    1.829118167098423100f,
+  1.828963027949846100f, 1.828807821555527000f, 1.828652547921171900f,
+    1.828497207052490100f,
+  1.828341798955192900f, 1.828186323634994200f, 1.828030781097610400f,
+    1.827875171348760400f,
+  1.827719494394165500f, 1.827563750239549400f, 1.827407938890638600f,
+    1.827252060353161500f,
+  1.827096114632849700f, 1.826940101735436500f, 1.826784021666658400f,
+    1.826627874432253700f,
+  1.826471660037963800f, 1.826315378489531800f, 1.826159029792704400f,
+    1.826002613953229500f,
+  1.825846130976858100f, 1.825689580869344100f, 1.825532963636443000f,
+    1.825376279283913200f,
+  1.825219527817515800f, 1.825062709243013800f, 1.824905823566173000f,
+    1.824748870792761900f,
+  1.824591850928550800f, 1.824434763979313300f, 1.824277609950824700f,
+    1.824120388848863300f,
+  1.823963100679209600f, 1.823805745447646600f, 1.823648323159960100f,
+    1.823490833821937600f,
+  1.823333277439369600f, 1.823175654018049300f, 1.823017963563772000f,
+    1.822860206082335300f,
+  1.822702381579539800f, 1.822544490061187800f, 1.822386531533084900f,
+    1.822228506001038800f,
+  1.822070413470859600f, 1.821912253948359700f, 1.821754027439354400f,
+    1.821595733949661100f,
+  1.821437373485099900f, 1.821278946051493100f, 1.821120451654665700f,
+    1.820961890300445400f,
+  1.820803261994661500f, 1.820644566743146800f, 1.820485804551735800f,
+    1.820326975426265600f,
+  1.820168079372576300f, 1.820009116396509800f, 1.819850086503910700f,
+    1.819690989700625900f,
+  1.819531825992505500f, 1.819372595385401000f, 1.819213297885166900f,
+    1.819053933497660300f,
+  1.818894502228740600f, 1.818735004084269600f, 1.818575439070111200f,
+    1.818415807192132600f,
+  1.818256108456203000f, 1.818096342868193800f, 1.817936510433979300f,
+    1.817776611159436000f,
+  1.817616645050443000f, 1.817456612112881900f, 1.817296512352636300f,
+    1.817136345775592900f,
+  1.816976112387640700f, 1.816815812194670700f, 1.816655445202576700f,
+    1.816495011417255300f,
+  1.816334510844604700f, 1.816173943490526400f, 1.816013309360923900f,
+    1.815852608461703300f,
+  1.815691840798773000f, 1.815531006378043900f, 1.815370105205429600f,
+    1.815209137286846200f,
+  1.815048102628211500f, 1.814887001235446600f, 1.814725833114474700f,
+    1.814564598271221300f,
+  1.814403296711615000f, 1.814241928441585800f, 1.814080493467067300f,
+    1.813918991793994900f,
+  1.813757423428306000f, 1.813595788375941700f, 1.813434086642844400f,
+    1.813272318234959700f,
+  1.813110483158235400f, 1.812948581418621500f, 1.812786613022070700f,
+    1.812624577974538000f,
+  1.812462476281981200f, 1.812300307950360300f, 1.812138072985637800f,
+    1.811975771393778300f,
+  1.811813403180749300f, 1.811650968352521000f, 1.811488466915065000f,
+    1.811325898874356800f,
+  1.811163264236372900f, 1.811000563007093100f, 1.810837795192499400f,
+    1.810674960798576600f,
+  1.810512059831311400f, 1.810349092296693400f, 1.810186058200714100f,
+    1.810022957549368000f,
+  1.809859790348652200f, 1.809696556604565300f, 1.809533256323109200f,
+    1.809369889510288100f,
+  1.809206456172108200f, 1.809042956314578900f, 1.808879389943711200f,
+    1.808715757065519200f,
+  1.808552057686019200f, 1.808388291811230000f, 1.808224459447172800f,
+    1.808060560599871200f,
+  1.807896595275351200f, 1.807732563479641300f, 1.807568465218772900f,
+    1.807404300498778800f,
+  1.807240069325695400f, 1.807075771705560800f, 1.806911407644415700f,
+    1.806746977148303300f,
+  1.806582480223269500f, 1.806417916875362000f, 1.806253287110631600f,
+    1.806088590935131000f,
+  1.805923828354915900f, 1.805758999376044100f, 1.805594104004575800f,
+    1.805429142246573600f,
+  1.805264114108102900f, 1.805099019595231200f, 1.804933858714028700f,
+    1.804768631470567500f,
+  1.804603337870923000f, 1.804437977921172300f, 1.804272551627395400f,
+    1.804107058995674500f,
+  1.803941500032094200f, 1.803775874742741500f, 1.803610183133706400f,
+    1.803444425211080400f,
+  1.803278600980958300f, 1.803112710449436900f, 1.802946753622615400f,
+    1.802780730506595700f,
+  1.802614641107481900f, 1.802448485431380900f, 1.802282263484401300f,
+    1.802115975272655000f,
+  1.801949620802255600f, 1.801783200079319900f, 1.801616713109966300f,
+    1.801450159900316300f,
+  1.801283540456493700f, 1.801116854784624400f, 1.800950102890836800f,
+    1.800783284781262200f,
+  1.800616400462033800f, 1.800449449939287800f, 1.800282433219162000f,
+    1.800115350307797600f,
+  1.799948201211337500f, 1.799780985935927300f, 1.799613704487715200f,
+    1.799446356872851400f,
+  1.799278943097489100f, 1.799111463167783400f, 1.798943917089892000f,
+    1.798776304869975200f,
+  1.798608626514195800f, 1.798440882028718500f, 1.798273071419711000f,
+    1.798105194693343500f,
+  1.797937251855787700f, 1.797769242913218800f, 1.797601167871813800f,
+    1.797433026737752700f,
+  1.797264819517217200f, 1.797096546216391900f, 1.796928206841463800f,
+    1.796759801398622100f,
+  1.796591329894058800f, 1.796422792333968000f, 1.796254188724546500f,
+    1.796085519071992900f,
+  1.795916783382509200f, 1.795747981662299200f, 1.795579113917569200f,
+    1.795410180154527900f,
+  1.795241180379386800f, 1.795072114598359200f, 1.794902982817661500f,
+    1.794733785043511900f,
+  1.794564521282131300f, 1.794395191539743400f, 1.794225795822573600f,
+    1.794056334136850300f,
+  1.793886806488804100f, 1.793717212884667900f, 1.793547553330677300f,
+    1.793377827833070100f,
+  1.793208036398086900f, 1.793038179031970000f, 1.792868255740965000f,
+    1.792698266531319400f,
+  1.792528211409282900f, 1.792358090381108300f, 1.792187903453050100f,
+    1.792017650631366100f,
+  1.791847331922315600f, 1.791676947332161000f, 1.791506496867166600f,
+    1.791335980533599300f,
+  1.791165398337728900f, 1.790994750285827000f, 1.790824036384167900f,
+    1.790653256639028100f,
+  1.790482411056686800f, 1.790311499643425500f, 1.790140522405528200f,
+    1.789969479349281100f,
+  1.789798370480973000f, 1.789627195806895200f, 1.789455955333341100f,
+    1.789284649066606800f,
+  1.789113277012990900f, 1.788941839178794100f, 1.788770335570319700f,
+    1.788598766193873600f,
+  1.788427131055763600f, 1.788255430162300400f, 1.788083663519796800f,
+    1.787911831134568300f,
+  1.787739933012932900f, 1.787567969161210300f, 1.787395939585723500f,
+    1.787223844292797500f,
+  1.787051683288759500f, 1.786879456579939700f, 1.786707164172670200f,
+    1.786534806073285700f,
+  1.786362382288123400f, 1.786189892823522700f, 1.786017337685825700f,
+    1.785844716881376700f,
+  1.785672030416522300f, 1.785499278297612000f, 1.785326460530997300f,
+    1.785153577123032000f,
+  1.784980628080072900f, 1.784807613408478300f, 1.784634533114609800f,
+    1.784461387204831400f,
+  1.784288175685508700f, 1.784114898563010200f, 1.783941555843707100f,
+    1.783768147533972200f,
+  1.783594673640181800f, 1.783421134168713800f, 1.783247529125948900f,
+    1.783073858518269700f,
+  1.782900122352062000f, 1.782726320633713200f, 1.782552453369613800f,
+    1.782378520566156200f,
+  1.782204522229735600f, 1.782030458366749200f, 1.781856328983596900f,
+    1.781682134086680900f,
+  1.781507873682406200f, 1.781333547777179200f, 1.781159156377410100f,
+    1.780984699489510200f,
+  1.780810177119894100f, 1.780635589274978600f, 1.780460935961182300f,
+    1.780286217184927000f,
+  1.780111432952636600f, 1.779936583270737400f, 1.779761668145658300f,
+    1.779586687583830200f,
+  1.779411641591686500f, 1.779236530175663600f, 1.779061353342199500f,
+    1.778886111097735000f,
+  1.778710803448713400f, 1.778535430401580100f, 1.778359991962783000f,
+    1.778184488138772900f,
+  1.778008918936002000f, 1.777833284360925900f, 1.777657584420002000f,
+    1.777481819119690200f,
+  1.777305988466453000f, 1.777130092466755200f, 1.776954131127064200f,
+    1.776778104453849100f,
+  1.776602012453582400f, 1.776425855132738100f, 1.776249632497793200f,
+    1.776073344555227000f,
+  1.775896991311520800f, 1.775720572773158900f, 1.775544088946627600f,
+    1.775367539838415700f,
+  1.775190925455014400f, 1.775014245802917200f, 1.774837500888620400f,
+    1.774660690718622000f,
+  1.774483815299423100f, 1.774306874637527000f, 1.774129868739439100f,
+    1.773952797611667100f,
+  1.773775661260722100f, 1.773598459693116500f, 1.773421192915365400f,
+    1.773243860933986400f,
+  1.773066463755499800f, 1.772889001386427800f, 1.772711473833295200f,
+    1.772533881102629000f,
+  1.772356223200959100f, 1.772178500134817100f, 1.772000711910737700f,
+    1.771822858535257600f,
+  1.771644940014915700f, 1.771466956356254000f, 1.771288907565816000f,
+    1.771110793650148500f,
+  1.770932614615799800f, 1.770754370469321400f, 1.770576061217266500f,
+    1.770397686866191300f,
+  1.770219247422653700f, 1.770040742893215000f, 1.769862173284438000f,
+    1.769683538602888000f,
+  1.769504838855133100f, 1.769326074047743700f, 1.769147244187292200f,
+    1.768968349280353800f,
+  1.768789389333506000f, 1.768610364353328600f, 1.768431274346403900f,
+    1.768252119319316400f,
+  1.768072899278653200f, 1.767893614231003800f, 1.767714264182959500f,
+    1.767534849141115100f,
+  1.767355369112067100f, 1.767175824102414000f, 1.766996214118757800f,
+    1.766816539167701800f,
+  1.766636799255852300f, 1.766456994389817600f, 1.766277124576209000f,
+    1.766097189821639300f,
+  1.765917190132724600f, 1.765737125516083000f, 1.765556995978334800f,
+    1.765376801526102700f,
+  1.765196542166012100f, 1.765016217904690900f, 1.764835828748768400f,
+    1.764655374704877700f,
+  1.764474855779653200f, 1.764294271979732100f, 1.764113623311754000f,
+    1.763932909782361100f,
+  1.763752131398197200f, 1.763571288165909400f, 1.763390380092146400f,
+    1.763209407183560200f,
+  1.763028369446804500f, 1.762847266888535100f, 1.762666099515411100f,
+    1.762484867334093400f,
+  1.762303570351245300f, 1.762122208573532600f, 1.761940782007623600f,
+    1.761759290660188400f,
+  1.761577734537900500f, 1.761396113647435000f, 1.761214427995469100f,
+    1.761032677588683800f,
+  1.760850862433760700f, 1.760668982537384900f, 1.760487037906243600f,
+    1.760305028547026500f,
+  1.760122954466425600f, 1.759940815671135100f, 1.759758612167851700f,
+    1.759576343963274600f,
+  1.759394011064105100f, 1.759211613477047200f, 1.759029151208807400f,
+    1.758846624266093800f,
+  1.758664032655617500f, 1.758481376384092500f, 1.758298655458233600f,
+    1.758115869884759700f,
+  1.757933019670390800f, 1.757750104821850000f, 1.757567125345862700f,
+    1.757384081249156100f,
+  1.757200972538460700f, 1.757017799220508500f, 1.756834561302034400f,
+    1.756651258789775800f,
+  1.756467891690471700f, 1.756284460010864200f, 1.756100963757697900f,
+    1.755917402937718900f,
+  1.755733777557676500f, 1.755550087624322000f, 1.755366333144409200f,
+    1.755182514124693900f,
+  1.754998630571935200f, 1.754814682492893600f, 1.754630669894332600f,
+    1.754446592783017500f,
+  1.754262451165716300f, 1.754078245049199600f, 1.753893974440240000f,
+    1.753709639345612600f,
+  1.753525239772095100f, 1.753340775726466700f, 1.753156247215510400f,
+    1.752971654246010300f,
+  1.752786996824753600f, 1.752602274958529500f, 1.752417488654129700f,
+    1.752232637918348200f,
+  1.752047722757981600f, 1.751862743179828600f, 1.751677699190690400f,
+    1.751492590797370600f,
+  1.751307418006674800f, 1.751122180825411800f, 1.750936879260391700f,
+    1.750751513318427700f,
+  1.750566083006335600f, 1.750380588330932500f, 1.750195029299038900f,
+    1.750009405917477100f,
+  1.749823718193071800f, 1.749637966132650900f, 1.749452149743043100f,
+    1.749266269031080700f,
+  1.749080324003598100f, 1.748894314667431800f, 1.748708241029421000f,
+    1.748522103096407300f,
+  1.748335900875233900f, 1.748149634372747200f, 1.747963303595795500f,
+    1.747776908551230000f,
+  1.747590449245904000f, 1.747403925686672500f, 1.747217337880393900f,
+    1.747030685833928200f,
+  1.746843969554138200f, 1.746657189047889200f, 1.746470344322048200f,
+    1.746283435383485100f,
+  1.746096462239072000f, 1.745909424895683200f, 1.745722323360195900f,
+    1.745535157639489100f,
+  1.745347927740444200f, 1.745160633669945200f, 1.744973275434878300f,
+    1.744785853042132300f,
+  1.744598366498598200f, 1.744410815811169300f, 1.744223200986741100f,
+    1.744035522032211900f,
+  1.743847778954482000f, 1.743659971760454200f, 1.743472100457033700f,
+    1.743284165051127700f,
+  1.743096165549646400f, 1.742908101959502100f, 1.742719974287608900f,
+    1.742531782540884100f,
+  1.742343526726246800f, 1.742155206850618800f, 1.741966822920923800f,
+    1.741778374944088000f,
+  1.741589862927040800f, 1.741401286876712800f, 1.741212646800037300f,
+    1.741023942703950200f,
+  1.740835174595389600f, 1.740646342481295900f, 1.740457446368612000f,
+    1.740268486264283200f,
+  1.740079462175256900f, 1.739890374108482600f, 1.739701222070913200f,
+    1.739512006069502800f,
+  1.739322726111208500f, 1.739133382202989500f, 1.738943974351807600f,
+    1.738754502564626700f,
+  1.738564966848413100f, 1.738375367210135400f, 1.738185703656765200f,
+    1.737995976195275000f,
+  1.737806184832640900f, 1.737616329575841300f, 1.737426410431856200f,
+    1.737236427407668800f,
+  1.737046380510263800f, 1.736856269746629000f, 1.736666095123754000f,
+    1.736475856648631400f,
+  1.736285554328254900f, 1.736095188169622500f, 1.735904758179732400f,
+    1.735714264365586700f,
+  1.735523706734189100f, 1.735333085292545900f, 1.735142400047666100f,
+    1.734951651006560100f,
+  1.734760838176241400f, 1.734569961563725600f, 1.734379021176030600f,
+    1.734188017020177100f,
+  1.733996949103187500f, 1.733805817432086900f, 1.733614622013902600f,
+    1.733423362855664100f,
+  1.733232039964403900f, 1.733040653347156300f, 1.732849203010957900f,
+    1.732657688962847600f,
+  1.732466111209867200f, 1.732274469759060200f, 1.732082764617472800f,
+    1.731890995792153600f,
+  1.731699163290153100f, 1.731507267118524500f, 1.731315307284323700f,
+    1.731123283794607800f,
+  1.730931196656437600f, 1.730739045876875200f, 1.730546831462985500f,
+    1.730354553421835600f,
+  1.730162211760495300f, 1.729969806486036500f, 1.729777337605533000f,
+    1.729584805126061400f,
+  1.729392209054700900f, 1.729199549398532400f, 1.729006826164639400f,
+    1.728814039360108100f,
+  1.728621188992026400f, 1.728428275067485100f, 1.728235297593577100f,
+    1.728042256577397200f,
+  1.727849152026043500f, 1.727655983946615700f, 1.727462752346216000f,
+    1.727269457231948900f,
+  1.727076098610921500f, 1.726882676490243000f, 1.726689190877025000f,
+    1.726495641778381200f,
+  1.726302029201427900f, 1.726108353153283900f, 1.725914613641069900f,
+    1.725720810671909300f,
+  1.725526944252927700f, 1.725333014391252900f, 1.725139021094015200f,
+    1.724944964368347000f,
+  1.724750844221383500f, 1.724556660660261800f, 1.724362413692121400f,
+    1.724168103324104300f,
+  1.723973729563354600f, 1.723779292417019200f, 1.723584791892246700f,
+    1.723390227996188600f,
+  1.723195600735998100f, 1.723000910118831300f, 1.722806156151846400f,
+    1.722611338842204000f,
+  1.722416458197066900f, 1.722221514223600100f, 1.722026506928971500f,
+    1.721831436320350800f,
+  1.721636302404910200f, 1.721441105189824000f, 1.721245844682269600f,
+    1.721050520889425600f,
+  1.720855133818473900f, 1.720659683476597900f, 1.720464169870984200f,
+    1.720268593008821100f,
+  1.720072952897299100f, 1.719877249543611900f, 1.719681482954954500f,
+    1.719485653138524800f,
+  1.719289760101522900f, 1.719093803851151400f, 1.718897784394614900f,
+    1.718701701739120400f,
+  1.718505555891877400f, 1.718309346860097600f, 1.718113074650995200f,
+    1.717916739271786500f,
+  1.717720340729689700f, 1.717523879031926500f, 1.717327354185719900f,
+    1.717130766198295700f,
+  1.716934115076881800f, 1.716737400828708400f, 1.716540623461008100f,
+    1.716343782981016200f,
+  1.716146879395969500f, 1.715949912713108100f, 1.715752882939673300f,
+    1.715555790082909900f,
+  1.715358634150064000f, 1.715161415148384500f, 1.714964133085122900f,
+    1.714766787967532600f,
+  1.714569379802868900f, 1.714371908598390800f, 1.714174374361358000f,
+    1.713976777099033700f,
+  1.713779116818682900f, 1.713581393527573000f, 1.713383607232973600f,
+    1.713185757942156800f,
+  1.712987845662396800f, 1.712789870400970700f, 1.712591832165157200f,
+    1.712393730962237500f,
+  1.712195566799495500f, 1.711997339684216700f, 1.711799049623689900f,
+    1.711600696625205300f,
+  1.711402280696055800f, 1.711203801843536700f, 1.711005260074945200f,
+    1.710806655397581600f,
+  1.710607987818747700f, 1.710409257345748100f, 1.710210463985889500f,
+    1.710011607746480600f,
+  1.709812688634833300f, 1.709613706658261100f, 1.709414661824080000f,
+    1.709215554139608400f,
+  1.709016383612166600f, 1.708817150249077900f, 1.708617854057667300f,
+    1.708418495045262300f,
+  1.708219073219193300f, 1.708019588586791700f, 1.707820041155392500f,
+    1.707620430932332400f,
+  1.707420757924950300f, 1.707221022140587900f, 1.707021223586588700f,
+    1.706821362270298600f,
+  1.706621438199066300f, 1.706421451380242000f, 1.706221401821179200f,
+    1.706021289529232800f,
+  1.705821114511760300f, 1.705620876776121600f, 1.705420576329679000f,
+    1.705220213179796900f,
+  1.705019787333842200f, 1.704819298799183700f, 1.704618747583193100f,
+    1.704418133693243800f,
+  1.704217457136711900f, 1.704016717920976000f, 1.703815916053416300f,
+    1.703615051541415900f,
+  1.703414124392360000f, 1.703213134613636100f, 1.703012082212634000f,
+    1.702810967196746000f,
+  1.702609789573366300f, 1.702408549349891500f, 1.702207246533721000f,
+    1.702005881132255800f,
+  1.701804453152900000f, 1.701602962603059100f, 1.701401409490141300f,
+    1.701199793821557300f,
+  1.700998115604720000f, 1.700796374847044300f, 1.700594571555948100f,
+    1.700392705738850400f,
+  1.700190777403173700f, 1.699988786556342300f, 1.699786733205783000f,
+    1.699584617358924400f,
+  1.699382439023197700f, 1.699180198206036600f, 1.698977894914877100f,
+    1.698775529157156700f,
+  1.698573100940316400f, 1.698370610271798800f, 1.698168057159048700f,
+    1.697965441609513300f,
+  1.697762763630642700f, 1.697560023229888200f, 1.697357220414704500f,
+    1.697154355192547900f,
+  1.696951427570877000f, 1.696748437557152900f, 1.696545385158839200f,
+    1.696342270383401200f,
+  1.696139093238307400f, 1.695935853731027600f, 1.695732551869034300f,
+    1.695529187659802400f,
+  1.695325761110809200f, 1.695122272229534000f, 1.694918721023458600f,
+    1.694715107500066800f,
+  1.694511431666845000f, 1.694307693531282000f, 1.694103893100868100f,
+    1.693900030383096900f,
+  1.693696105385463800f, 1.693492118115466500f, 1.693288068580604900f,
+    1.693083956788381500f,
+  1.692879782746300700f, 1.692675546461869900f, 1.692471247942597600f,
+    1.692266887195995600f,
+  1.692062464229577600f, 1.691857979050859900f, 1.691653431667360600f,
+    1.691448822086600400f,
+  1.691244150316102000f, 1.691039416363390800f, 1.690834620235994300f,
+    1.690629761941442100f,
+  1.690424841487266700f, 1.690219858881001800f, 1.690014814130184300f,
+    1.689809707242353200f,
+  1.689604538225049700f, 1.689399307085817300f, 1.689194013832201500f,
+    1.688988658471750600f,
+  1.688783241012014700f, 1.688577761460546800f, 1.688372219824901400f,
+    1.688166616112636100f,
+  1.687960950331309800f, 1.687755222488484600f, 1.687549432591724400f,
+    1.687343580648595700f,
+  1.687137666666667100f, 1.686931690653509000f, 1.686725652616694900f,
+    1.686519552563800400f,
+  1.686313390502403000f, 1.686107166440082600f, 1.685900880384421800f,
+    1.685694532343004600f,
+  1.685488122323418400f, 1.685281650333251900f, 1.685075116380096800f,
+    1.684868520471546600f,
+  1.684661862615197000f, 1.684455142818646700f, 1.684248361089495800f,
+    1.684041517435347400f,
+  1.683834611863806100f, 1.683627644382479800f, 1.683420614998977900f,
+    1.683213523720911800f,
+  1.683006370555896400f, 1.682799155511547600f, 1.682591878595484300f,
+    1.682384539815327400f,
+  1.682177139178700400f, 1.681969676693228600f, 1.681762152366539600f,
+    1.681554566206263900f,
+  1.681346918220033800f, 1.681139208415483700f, 1.680931436800250600f,
+    1.680723603381973500f,
+  1.680515708168294200f, 1.680307751166856300f, 1.680099732385305300f,
+    1.679891651831290100f,
+  1.679683509512460900f, 1.679475305436470600f, 1.679267039610974300f,
+    1.679058712043629300f,
+  1.678850322742095200f, 1.678641871714033900f, 1.678433358967109400f,
+    1.678224784508988400f,
+  1.678016148347339300f, 1.677807450489833300f, 1.677598690944143400f,
+    1.677389869717945000f,
+  1.677180986818916300f, 1.676972042254736900f, 1.676763036033089600f,
+    1.676553968161658600f,
+  1.676344838648130600f, 1.676135647500194700f, 1.675926394725542700f,
+    1.675717080331867900f,
+  1.675507704326866200f, 1.675298266718235900f, 1.675088767513677200f,
+    1.674879206720892900f,
+  1.674669584347587800f, 1.674459900401469700f, 1.674250154890247300f,
+    1.674040347821632800f,
+  1.673830479203340000f, 1.673620549043085500f, 1.673410557348587600f,
+    1.673200504127567000f,
+  1.672990389387746700f, 1.672780213136852300f, 1.672569975382611300f,
+    1.672359676132753500f,
+  1.672149315395010900f, 1.671938893177118000f, 1.671728409486811500f,
+    1.671517864331830000f,
+  1.671307257719914800f, 1.671096589658809500f, 1.670885860156259300f,
+    1.670675069220012500f,
+  1.670464216857819200f, 1.670253303077431800f, 1.670042327886605200f,
+    1.669831291293095900f,
+  1.669620193304663500f, 1.669409033929069500f, 1.669197813174077200f,
+    1.668986531047453000f,
+  1.668775187556965000f, 1.668563782710383600f, 1.668352316515481700f,
+    1.668140788980034400f,
+  1.667929200111818400f, 1.667717549918614100f, 1.667505838408202700f,
+    1.667294065588368100f,
+  1.667082231466896900f, 1.666870336051577800f, 1.666658379350201000f,
+    1.666446361370560000f,
+  1.666234282120450100f, 1.666022141607668600f, 1.665809939840015500f,
+    1.665597676825292700f,
+  1.665385352571304500f, 1.665172967085857700f, 1.664960520376761000f,
+    1.664748012451825200f,
+  1.664535443318863900f, 1.664322812985692600f, 1.664110121460129000f,
+    1.663897368749993400f,
+  1.663684554863107800f, 1.663471679807296800f, 1.663258743590387400f,
+    1.663045746220208600f,
+  1.662832687704591800f, 1.662619568051370500f, 1.662406387268380100f,
+    1.662193145363459100f,
+  1.661979842344447600f, 1.661766478219188300f, 1.661553052995526000f,
+    1.661339566681307600f,
+  1.661126019284382200f, 1.660912410812601900f, 1.660698741273819700f,
+    1.660485010675892400f,
+  1.660271219026677700f, 1.660057366334036300f, 1.659843452605831200f,
+    1.659629477849926800f,
+  1.659415442074190900f, 1.659201345286492900f, 1.658987187494704200f,
+    1.658772968706699000f,
+  1.658558688930353400f, 1.658344348173546300f, 1.658129946444157700f,
+    1.657915483750071100f,
+  1.657700960099171200f, 1.657486375499345900f, 1.657271729958484500f,
+    1.657057023484479000f,
+  1.656842256085223800f, 1.656627427768615000f, 1.656412538542551200f,
+    1.656197588414933600f,
+  1.655982577393664700f, 1.655767505486650500f, 1.655552372701798200f,
+    1.655337179047017700f,
+  1.655121924530220900f, 1.654906609159322500f, 1.654691232942238500f,
+    1.654475795886888300f,
+  1.654260298001192200f, 1.654044739293073900f, 1.653829119770458900f,
+    1.653613439441274500f,
+  1.653397698313451300f, 1.653181896394921000f, 1.652966033693617800f,
+    1.652750110217479100f,
+  1.652534125974443000f, 1.652318080972451400f, 1.652101975219447200f,
+    1.651885808723375900f,
+  1.651669581492185300f, 1.651453293533826000f, 1.651236944856249600f,
+    1.651020535467411200f,
+  1.650804065375267400f, 1.650587534587776700f, 1.650370943112901000f,
+    1.650154290958603300f,
+  1.649937578132849400f, 1.649720804643607400f, 1.649503970498847200f,
+    1.649287075706541200f,
+  1.649070120274664000f, 1.648853104211192700f, 1.648636027524106100f,
+    1.648418890221385400f,
+  1.648201692311014300f, 1.647984433800978600f, 1.647767114699266100f,
+    1.647549735013867000f,
+  1.647332294752774200f, 1.647114793923981600f, 1.646897232535486500f,
+    1.646679610595287900f,
+  1.646461928111387300f, 1.646244185091788400f, 1.646026381544496400f,
+    1.645808517477519700f,
+  1.645590592898868600f, 1.645372607816555400f, 1.645154562238594800f,
+    1.644936456173004000f,
+  1.644718289627801600f, 1.644500062611009300f, 1.644281775130650900f,
+    1.644063427194751600f,
+  1.643845018811340300f, 1.643626549988446200f, 1.643408020734102600f,
+    1.643189431056343700f,
+  1.642970780963206800f, 1.642752070462730800f, 1.642533299562957100f,
+    1.642314468271929300f,
+  1.642095576597693200f, 1.641876624548297000f, 1.641657612131790500f,
+    1.641438539356226500f,
+  1.641219406229659700f, 1.641000212760146800f, 1.640780958955747200f,
+    1.640561644824521700f,
+  1.640342270374534500f, 1.640122835613851100f, 1.639903340550539200f,
+    1.639683785192669600f,
+  1.639464169548314100f, 1.639244493625547900f, 1.639024757432447500f,
+    1.638804960977092100f,
+  1.638585104267562800f, 1.638365187311943400f, 1.638145210118319400f,
+    1.637925172694778800f,
+  1.637705075049411800f, 1.637484917190310800f, 1.637264699125570200f,
+    1.637044420863286600f,
+  1.636824082411559600f, 1.636603683778490100f, 1.636383224972181500f,
+    1.636162706000739300f,
+  1.635942126872271800f, 1.635721487594888400f, 1.635500788176702100f,
+    1.635280028625826900f,
+  1.635059208950379700f, 1.634838329158479200f, 1.634617389258246700f,
+    1.634396389257805700f,
+  1.634175329165281400f, 1.633954208988801700f, 1.633733028736496400f,
+    1.633511788416498000f,
+  1.633290488036940500f, 1.633069127605960800f, 1.632847707131697600f,
+    1.632626226622291700f,
+  1.632404686085886300f, 1.632183085530627200f, 1.631961424964661700f,
+    1.631739704396139900f,
+  1.631517923833213400f, 1.631296083284036900f, 1.631074182756766300f,
+    1.630852222259560700f,
+  1.630630201800580900f, 1.630408121387990000f, 1.630185981029953000f,
+    1.629963780734637400f,
+  1.629741520510213000f, 1.629519200364851800f, 1.629296820306727700f,
+    1.629074380344017100f,
+  1.628851880484898200f, 1.628629320737551700f, 1.628406701110161100f,
+    1.628184021610910700f,
+  1.627961282247988300f, 1.627738483029583100f, 1.627515623963887000f,
+    1.627292705059093700f,
+  1.627069726323399500f, 1.626846687765002700f, 1.626623589392103500f,
+    1.626400431212904800f,
+  1.626177213235611400f, 1.625953935468430500f, 1.625730597919571300f,
+    1.625507200597245500f,
+  1.625283743509666300f, 1.625060226665050000f, 1.624836650071614500f,
+    1.624613013737580000f,
+  1.624389317671169500f, 1.624165561880607000f, 1.623941746374119500f,
+    1.623717871159936300f,
+  1.623493936246288300f, 1.623269941641409400f, 1.623045887353534900f,
+    1.622821773390902700f,
+  1.622597599761753000f, 1.622373366474327800f, 1.622149073536871800f,
+    1.621924720957631300f,
+  1.621700308744855200f, 1.621475836906794500f, 1.621251305451702400f,
+    1.621026714387834300f,
+  1.620802063723447700f, 1.620577353466802700f, 1.620352583626160500f,
+    1.620127754209786100f,
+  1.619902865225945300f, 1.619677916682906700f, 1.619452908588941300f,
+    1.619227840952321800f,
+  1.619002713781323200f, 1.618777527084222800f, 1.618552280869300300f,
+    1.618326975144837000f,
+  1.618101609919117200f, 1.617876185200426600f, 1.617650700997053500f,
+    1.617425157317288200f,
+  1.617199554169423500f, 1.616973891561754200f, 1.616748169502577200f,
+    1.616522388000191500f,
+  1.616296547062898500f, 1.616070646699001800f, 1.615844686916807300f,
+    1.615618667724622700f,
+  1.615392589130757900f, 1.615166451143525300f, 1.614940253771239400f,
+    1.614713997022216900f,
+  1.614487680904776600f, 1.614261305427239200f, 1.614034870597928400f,
+    1.613808376425168900f,
+  1.613581822917288900f, 1.613355210082617800f, 1.613128537929487500f,
+    1.612901806466232200f,
+  1.612675015701188000f, 1.612448165642693400f, 1.612221256299089200f,
+    1.611994287678718100f,
+  1.611767259789925100f, 1.611540172641057200f, 1.611313026240463800f,
+    1.611085820596496600f,
+  1.610858555717509200f, 1.610631231611857800f, 1.610403848287899700f,
+    1.610176405753995800f,
+  1.609948904018508200f, 1.609721343089801600f, 1.609493722976242900f,
+    1.609266043686200700f,
+  1.609038305228046400f, 1.608810507610153100f, 1.608582650840896200f,
+    1.608354734928653800f,
+  1.608126759881805400f, 1.607898725708732900f, 1.607670632417820500f,
+    1.607442480017454700f,
+  1.607214268516024000f, 1.606985997921919000f, 1.606757668243532500f,
+    1.606529279489259600f,
+  1.606300831667497600f, 1.606072324786645500f, 1.605843758855105300f,
+    1.605615133881280700f,
+  1.605386449873577300f, 1.605157706840403300f, 1.604928904790168700f,
+    1.604700043731286200f,
+  1.604471123672170500f, 1.604242144621237800f, 1.604013106586907400f,
+    1.603784009577600100f,
+  1.603554853601739700f, 1.603325638667751000f, 1.603096364784061900f,
+    1.602867031959102100f,
+  1.602637640201303400f, 1.602408189519099800f, 1.602178679920927900f,
+    1.601949111415226000f,
+  1.601719484010434300f, 1.601489797714996000f, 1.601260052537355700f,
+    1.601030248485960900f,
+  1.600800385569260300f, 1.600570463795705700f, 1.600340483173750400f,
+    1.600110443711850300f,
+  1.599880345418463100f, 1.599650188302049100f, 1.599419972371070500f,
+    1.599189697633991400f,
+  1.598959364099278700f, 1.598728971775401000f, 1.598498520670828900f,
+    1.598268010794035900f,
+  1.598037442153496900f, 1.597806814757689200f, 1.597576128615092200f,
+    1.597345383734188000f,
+  1.597114580123460100f, 1.596883717791394800f, 1.596652796746479600f,
+    1.596421816997205500f,
+  1.596190778552064800f, 1.595959681419551800f, 1.595728525608163700f,
+    1.595497311126399300f,
+  1.595266037982759500f, 1.595034706185747500f, 1.594803315743869000f,
+    1.594571866665631700f,
+  1.594340358959544800f, 1.594108792634120600f, 1.593877167697873100f,
+    1.593645484159318200f,
+  1.593413742026974500f, 1.593181941309362400f, 1.592950082015004700f,
+    1.592718164152426000f,
+  1.592486187730153300f, 1.592254152756715600f, 1.592022059240644400f,
+    1.591789907190473100f,
+  1.591557696614737100f, 1.591325427521974100f, 1.591093099920724200f,
+    1.590860713819529400f,
+  1.590628269226933600f, 1.590395766151483400f, 1.590163204601727100f,
+    1.589930584586215500f,
+  1.589697906113501000f, 1.589465169192139100f, 1.589232373830686400f,
+    1.588999520037702300f,
+  1.588766607821748200f, 1.588533637191387400f, 1.588300608155185600f,
+    1.588067520721711000f,
+  1.587834374899533400f, 1.587601170697224600f, 1.587367908123358900f,
+    1.587134587186513000f,
+  1.586901207895265300f, 1.586667770258196600f, 1.586434274283889500f,
+    1.586200719980929200f,
+  1.585967107357902700f, 1.585733436423399000f, 1.585499707186010200f,
+    1.585265919654329300f,
+  1.585032073836952100f, 1.584798169742476400f, 1.584564207379502500f,
+    1.584330186756632200f,
+  1.584096107882470000f, 1.583861970765622100f, 1.583627775414697000f,
+    1.583393521838305700f,
+  1.583159210045060900f, 1.582924840043577400f, 1.582690411842472700f,
+    1.582455925450365600f,
+  1.582221380875877800f, 1.581986778127632700f, 1.581752117214255900f,
+    1.581517398144375800f,
+  1.581282620926621300f, 1.581047785569625400f, 1.580812892082021900f,
+    1.580577940472447200f,
+  1.580342930749539800f, 1.580107862921940700f, 1.579872736998292100f,
+    1.579637552987239100f,
+  1.579402310897428900f, 1.579167010737510600f, 1.578931652516135700f,
+    1.578696236241957200f,
+  1.578460761923630800f, 1.578225229569814700f, 1.577989639189168100f,
+    1.577753990790353500f,
+  1.577518284382034800f, 1.577282519972878200f, 1.577046697571552000f,
+    1.576810817186727000f,
+  1.576574878827075700f, 1.576338882501273000f, 1.576102828217995600f,
+    1.575866715985922500f,
+  1.575630545813735200f, 1.575394317710116600f, 1.575158031683752300f,
+    1.574921687743330300f,
+  1.574685285897539800f, 1.574448826155072400f, 1.574212308524622500f,
+    1.573975733014886000f,
+  1.573739099634561500f, 1.573502408392348600f, 1.573265659296950300f,
+    1.573028852357070800f,
+  1.572791987581417100f, 1.572555064978698100f, 1.572318084557624800f,
+    1.572081046326909900f,
+  1.571843950295269000f, 1.571606796471419100f, 1.571369584864080100f,
+    1.571132315481973200f,
+  1.570894988333822400f, 1.570657603428353300f, 1.570420160774294000f,
+    1.570182660380374600f,
+  1.569945102255327200f, 1.569707486407886600f, 1.569469812846788500f,
+    1.569232081580771900f,
+  1.568994292618577400f, 1.568756445968948000f, 1.568518541640628400f,
+    1.568280579642366000f,
+  1.568042559982909500f, 1.567804482671010500f, 1.567566347715422500f,
+    1.567328155124900800f,
+  1.567089904908203200f, 1.566851597074089500f, 1.566613231631321500f,
+    1.566374808588663300f,
+  1.566136327954881000f, 1.565897789738742900f, 1.565659193949019400f,
+    1.565420540594482800f,
+  1.565181829683907700f, 1.564943061226071100f, 1.564704235229751500f,
+    1.564465351703730400f,
+  1.564226410656790000f, 1.563987412097716200f, 1.563748356035296000f,
+    1.563509242478319000f,
+  1.563270071435576500f, 1.563030842915862100f, 1.562791556927971800f,
+    1.562552213480703300f,
+  1.562312812582856500f, 1.562073354243233700f, 1.561833838470639200f,
+    1.561594265273878800f,
+  1.561354634661761300f, 1.561114946643096900f, 1.560875201226698900f,
+    1.560635398421381400f,
+  1.560395538235961800f, 1.560155620679258400f, 1.559915645760092900f,
+    1.559675613487288200f,
+  1.559435523869669500f, 1.559195376916064700f, 1.558955172635302800f,
+    1.558714911036215700f,
+  1.558474592127637100f, 1.558234215918402600f, 1.557993782417350400f,
+    1.557753291633320500f,
+  1.557512743575155000f, 1.557272138251698300f, 1.557031475671796400f,
+    1.556790755844298400f,
+  1.556549978778054300f, 1.556309144481917300f, 1.556068252964741600f,
+    1.555827304235384500f,
+  1.555586298302704900f, 1.555345235175563900f, 1.555104114862824600f,
+    1.554862937373352500f,
+  1.554621702716015000f, 1.554380410899681300f, 1.554139061933223200f,
+    1.553897655825514600f,
+  1.553656192585431100f, 1.553414672221850700f, 1.553173094743653300f,
+    1.552931460159721100f,
+  1.552689768478938500f, 1.552448019710191300f, 1.552206213862368500f,
+    1.551964350944360100f,
+  1.551722430965059000f, 1.551480453933359800f, 1.551238419858159700f,
+    1.550996328748356800f,
+  1.550754180612852900f, 1.550511975460550500f, 1.550269713300355100f,
+    1.550027394141174000f,
+  1.549785017991916400f, 1.549542584861493900f, 1.549300094758820000f,
+    1.549057547692810600f,
+  1.548814943672383300f, 1.548572282706457900f, 1.548329564803956300f,
+    1.548086789973802700f,
+  1.547843958224923000f, 1.547601069566245900f, 1.547358124006701400f,
+    1.547115121555221700f,
+  1.546872062220741700f, 1.546628946012197800f, 1.546385772938528600f,
+    1.546142543008675300f,
+  1.545899256231580300f, 1.545655912616188800f, 1.545412512171447700f,
+    1.545169054906306200f,
+  1.544925540829715600f, 1.544681969950629300f, 1.544438342278002600f,
+    1.544194657820792800f,
+  1.543950916587959700f, 1.543707118588464800f, 1.543463263831272000f,
+    1.543219352325347200f,
+  1.542975384079658300f, 1.542731359103175300f, 1.542487277404870100f,
+    1.542243138993717000f,
+  1.541998943878692300f, 1.541754692068774600f, 1.541510383572944000f,
+    1.541266018400183200f,
+  1.541021596559476700f, 1.540777118059811100f, 1.540532582910175500f,
+    1.540287991119560600f,
+  1.540043342696959100f, 1.539798637651366400f, 1.539553875991779300f,
+    1.539309057727197300f,
+  1.539064182866621400f, 1.538819251419055100f, 1.538574263393503800f,
+    1.538329218798974800f,
+  1.538084117644477900f, 1.537838959939025200f, 1.537593745691629500f,
+    1.537348474911307300f,
+  1.537103147607076200f, 1.536857763787956400f, 1.536612323462969800f,
+    1.536366826641140800f,
+  1.536121273331495300f, 1.535875663543061700f, 1.535629997284870400f,
+    1.535384274565953600f,
+  1.535138495395346400f, 1.534892659782085100f, 1.534646767735208000f,
+    1.534400819263756400f,
+  1.534154814376772700f, 1.533908753083302200f, 1.533662635392391700f,
+    1.533416461313090100f,
+  1.533170230854448400f, 1.532923944025520200f, 1.532677600835360600f,
+    1.532431201293027000f,
+  1.532184745407578500f, 1.531938233188077100f, 1.531691664643585900f,
+    1.531445039783170500f,
+  1.531198358615898800f, 1.530951621150840700f, 1.530704827397067800f,
+    1.530457977363654000f,
+  1.530211071059675200f, 1.529964108494209700f, 1.529717089676337500f,
+    1.529470014615140800f,
+  1.529222883319703700f, 1.528975695799112500f, 1.528728452062455600f,
+    1.528481152118823700f,
+  1.528233795977309400f, 1.527986383647006500f, 1.527738915137012400f,
+    1.527491390456425600f,
+  1.527243809614346600f, 1.526996172619878900f, 1.526748479482126700f,
+    1.526500730210197200f,
+  1.526252924813199500f, 1.526005063300244900f, 1.525757145680446200f,
+    1.525509171962918800f,
+  1.525261142156779900f, 1.525013056271149000f, 1.524764914315147200f,
+    1.524516716297898300f,
+  1.524268462228527900f, 1.524020152116163200f, 1.523771785969934000f,
+    1.523523363798972000f,
+  1.523274885612411200f, 1.523026351419387100f, 1.522777761229038100f,
+    1.522529115050503600f,
+  1.522280412892925900f, 1.522031654765448900f, 1.521782840677218700f,
+    1.521533970637383800f,
+  1.521285044655094300f, 1.521036062739502300f, 1.520787024899762100f,
+    1.520537931145030400f,
+  1.520288781484465700f, 1.520039575927228500f, 1.519790314482481100f,
+    1.519540997159388300f,
+  1.519291623967116600f, 1.519042194914835200f, 1.518792710011714500f,
+    1.518543169266927600f,
+  1.518293572689648900f, 1.518043920289055900f, 1.517794212074327500f,
+    1.517544448054644500f,
+  1.517294628239190400f, 1.517044752637150000f, 1.516794821257710500f,
+    1.516544834110061600f,
+  1.516294791203394200f, 1.516044692546901800f, 1.515794538149779700f,
+    1.515544328021225500f,
+  1.515294062170438700f, 1.515043740606620800f, 1.514793363338975600f,
+    1.514542930376708600f,
+  1.514292441729027300f, 1.514041897405141700f, 1.513791297414263800f,
+    1.513540641765606800f,
+  1.513289930468387300f, 1.513039163531823000f, 1.512788340965133500f,
+    1.512537462777541200f,
+  1.512286528978270300f, 1.512035539576546600f, 1.511784494581598600f,
+    1.511533394002656100f,
+  1.511282237848951400f, 1.511031026129719100f, 1.510779758854195400f,
+    1.510528436031618900f,
+  1.510277057671229400f, 1.510025623782270000f, 1.509774134373984800f,
+    1.509522589455620600f,
+  1.509270989036425800f, 1.509019333125651200f, 1.508767621732549400f,
+    1.508515854866375100f,
+  1.508264032536385000f, 1.508012154751837700f, 1.507760221521994700f,
+    1.507508232856118200f,
+  1.507256188763473200f, 1.507004089253327000f, 1.506751934334948000f,
+    1.506499724017607900f,
+  1.506247458310579400f, 1.505995137223137500f, 1.505742760764559300f,
+    1.505490328944124200f,
+  1.505237841771113200f, 1.504985299254809800f, 1.504732701404498900f,
+    1.504480048229468000f,
+  1.504227339739006500f, 1.503974575942405700f, 1.503721756848958700f,
+    1.503468882467961600f,
+  1.503215952808711500f, 1.502962967880507600f, 1.502709927692651900f,
+    1.502456832254447600f,
+  1.502203681575200700f, 1.501950475664218600f, 1.501697214530810700f,
+    1.501443898184289200f,
+  1.501190526633967600f, 1.500937099889161600f, 1.500683617959188900f,
+    1.500430080853369500f,
+  1.500176488581024900f, 1.499922841151479600f, 1.499669138574058800f,
+    1.499415380858090800f,
+  1.499161568012905300f, 1.498907700047834600f, 1.498653776972212600f,
+    1.498399798795375000f,
+  1.498145765526660300f, 1.497891677175408500f, 1.497637533750961300f,
+    1.497383335262663300f,
+  1.497129081719860400f, 1.496874773131900800f, 1.496620409508134800f,
+    1.496365990857914600f,
+  1.496111517190594300f, 1.495856988515530400f, 1.495602404842080800f,
+    1.495347766179606400f,
+  1.495093072537469100f, 1.494838323925033400f, 1.494583520351665500f,
+    1.494328661826734200f,
+  1.494073748359609600f, 1.493818779959664300f, 1.493563756636272500f,
+    1.493308678398810800f,
+  1.493053545256657800f, 1.492798357219194100f, 1.492543114295801900f,
+    1.492287816495866200f,
+  1.492032463828773200f, 1.491777056303911700f, 1.491521593930672100f,
+    1.491266076718446900f,
+  1.491010504676631500f, 1.490754877814621800f, 1.490499196141816600f,
+    1.490243459667616600f,
+  1.489987668401424800f, 1.489731822352645500f, 1.489475921530685900f,
+    1.489219965944954300f,
+  1.488963955604861500f, 1.488707890519820600f, 1.488451770699245900f,
+    1.488195596152554800f,
+  1.487939366889165600f, 1.487683082918499300f, 1.487426744249978400f,
+    1.487170350893028500f,
+  1.486913902857075700f, 1.486657400151549600f, 1.486400842785880100f,
+    1.486144230769501000f,
+  1.485887564111846500f, 1.485630842822354100f, 1.485374066910462500f,
+    1.485117236385612200f,
+  1.484860351257246500f, 1.484603411534810300f, 1.484346417227750700f,
+    1.484089368345516300f,
+  1.483832264897558400f, 1.483575106893329600f, 1.483317894342285100f,
+    1.483060627253882000f,
+  1.482803305637578900f, 1.482545929502837100f, 1.482288498859119400f,
+    1.482031013715890700f,
+  1.481773474082618300f, 1.481515879968770900f, 1.481258231383819800f,
+    1.481000528337237800f,
+  1.480742770838499900f, 1.480484958897083200f, 1.480227092522466500f,
+    1.479969171724131200f,
+  1.479711196511560100f, 1.479453166894238100f, 1.479195082881652200f,
+    1.478936944483291600f,
+  1.478678751708647000f, 1.478420504567211900f, 1.478162203068481100f,
+    1.477903847221951400f,
+  1.477645437037121900f, 1.477386972523493800f, 1.477128453690569800f,
+    1.476869880547855300f,
+  1.476611253104856700f, 1.476352571371083700f, 1.476093835356046700f,
+    1.475835045069259000f,
+  1.475576200520235500f, 1.475317301718493300f, 1.475058348673551100f,
+    1.474799341394929900f,
+  1.474540279892153000f, 1.474281164174744900f, 1.474021994252233000f,
+    1.473762770134145800f,
+  1.473503491830014300f, 1.473244159349371700f, 1.472984772701752900f,
+    1.472725331896694400f,
+  1.472465836943735600f, 1.472206287852416900f, 1.471946684632281500f,
+    1.471687027292874400f,
+  1.471427315843742100f, 1.471167550294433700f, 1.470907730654499800f,
+    1.470647856933493300f,
+  1.470387929140969200f, 1.470127947286484100f, 1.469867911379596900f,
+    1.469607821429868500f,
+  1.469347677446861500f, 1.469087479440140300f, 1.468827227419272200f,
+    1.468566921393825700f,
+  1.468306561373371900f, 1.468046147367482600f, 1.467785679385733300f,
+    1.467525157437700200f,
+  1.467264581532962100f, 1.467003951681099800f, 1.466743267891695800f,
+    1.466482530174334500f,
+  1.466221738538602500f, 1.465960892994088800f, 1.465699993550383400f,
+    1.465439040217079400f,
+  1.465178033003770700f, 1.464916971920054100f, 1.464655856975527900f,
+    1.464394688179792900f,
+  1.464133465542451200f, 1.463872189073107500f, 1.463610858781367900f,
+    1.463349474676840700f,
+  1.463088036769136600f, 1.462826545067867700f, 1.462564999582648600f,
+    1.462303400323095000f,
+  1.462041747298825900f, 1.461780040519460800f, 1.461518279994622200f,
+    1.461256465733934400f,
+  1.460994597747023600f, 1.460732676043517800f, 1.460470700633046800f,
+    1.460208671525243400f,
+  1.459946588729741100f, 1.459684452256176300f, 1.459422262114186800f,
+    1.459160018313412400f,
+  1.458897720863495500f, 1.458635369774079500f, 1.458372965054810700f,
+    1.458110506715337000f,
+  1.457847994765308200f, 1.457585429214375700f, 1.457322810072193800f,
+    1.457060137348418000f,
+  1.456797411052706200f, 1.456534631194717800f, 1.456271797784114900f,
+    1.456008910830560500f,
+  1.455745970343720800f, 1.455482976333263100f, 1.455219928808857200f,
+    1.454956827780174100f,
+  1.454693673256887600f, 1.454430465248673300f, 1.454167203765208000f,
+    1.453903888816171900f,
+  1.453640520411245900f, 1.453377098560113100f, 1.453113623272459100f,
+    1.452850094557971000f,
+  1.452586512426338000f, 1.452322876887251400f, 1.452059187950404100f,
+    1.451795445625491300f,
+  1.451531649922210200f, 1.451267800850259500f, 1.451003898419340500f,
+    1.450739942639155800f,
+  1.450475933519410400f, 1.450211871069811300f, 1.449947755300067500f,
+    1.449683586219889400f,
+  1.449419363838989800f, 1.449155088167083600f, 1.448890759213887100f,
+    1.448626376989119400f,
+  1.448361941502500900f, 1.448097452763754000f, 1.447832910782603100f,
+    1.447568315568775100f,
+  1.447303667131997900f, 1.447038965482002200f, 1.446774210628520200f,
+    1.446509402581286400f,
+  1.446244541350036700f, 1.445979626944509300f, 1.445714659374444500f,
+    1.445449638649584500f,
+  1.445184564779673500f, 1.444919437774456700f, 1.444654257643682900f,
+    1.444389024397101600f,
+  1.444123738044464900f, 1.443858398595526400f, 1.443593006060042100f,
+    1.443327560447769600f,
+  1.443062061768468400f, 1.442796510031900500f, 1.442530905247829200f,
+    1.442265247426020200f,
+  1.441999536576240800f, 1.441733772708260600f, 1.441467955831850800f,
+    1.441202085956784900f,
+  1.440936163092837900f, 1.440670187249787600f, 1.440404158437412500f,
+    1.440138076665494100f,
+  1.439871941943815300f, 1.439605754282161400f, 1.439339513690319100f,
+    1.439073220178077400f,
+  1.438806873755226900f, 1.438540474431560600f, 1.438274022216873500f,
+    1.438007517120961900f,
+  1.437740959153624500f, 1.437474348324662100f, 1.437207684643876800f,
+    1.436940968121073600f,
+  1.436674198766058500f, 1.436407376588640000f, 1.436140501598628400f,
+    1.435873573805835900f,
+  1.435606593220076600f, 1.435339559851166500f, 1.435072473708924000f,
+    1.434805334803169100f,
+  1.434538143143723200f, 1.434270898740410700f, 1.434003601603057300f,
+    1.433736251741490700f,
+  1.433468849165540500f, 1.433201393885038500f, 1.432933885909818000f,
+    1.432666325249714700f,
+  1.432398711914566200f, 1.432131045914211600f, 1.431863327258492400f,
+    1.431595555957251700f,
+  1.431327732020334800f, 1.431059855457588600f, 1.430791926278862400f,
+    1.430523944494007400f,
+  1.430255910112876000f, 1.429987823145323100f, 1.429719683601205800f,
+    1.429451491490382900f,
+  1.429183246822714800f, 1.428914949608064200f, 1.428646599856295400f,
+    1.428378197577275100f,
+  1.428109742780871800f, 1.427841235476955400f, 1.427572675675398600f,
+    1.427304063386075200f,
+  1.427035398618861500f, 1.426766681383635500f, 1.426497911690277000f,
+    1.426229089548668200f,
+  1.425960214968693000f, 1.425691287960236600f, 1.425422308533187200f,
+    1.425153276697434000f,
+  1.424884192462868800f, 1.424615055839385300f, 1.424345866836878200f,
+    1.424076625465245500f,
+  1.423807331734385800f, 1.423537985654200800f, 1.423268587234593400f,
+    1.422999136485468600f,
+  1.422729633416733200f, 1.422460078038296300f, 1.422190470360068300f,
+    1.421920810391962500f,
+  1.421651098143893000f, 1.421381333625776600f, 1.421111516847531700f,
+    1.420841647819078600f,
+  1.420571726550339700f, 1.420301753051239400f, 1.420031727331703800f,
+    1.419761649401660500f,
+  1.419491519271040000f, 1.419221336949774100f, 1.418951102447796800f,
+    1.418680815775043500f,
+  1.418410476941452100f, 1.418140085956961900f, 1.417869642831514700f,
+    1.417599147575054000f,
+  1.417328600197524900f, 1.417058000708874700f, 1.416787349119052600f,
+    1.416516645438009600f,
+  1.416245889675698900f, 1.415975081842075300f, 1.415704221947095700f,
+    1.415433310000718600f,
+  1.415162346012905000f, 1.414891329993617200f, 1.414620261952819600f,
+    1.414349141900479000f,
+  1.414077969846563500f, 1.413806745801043500f, 1.413535469773890700f,
+    1.413264141775079300f,
+  1.412992761814585400f, 1.412721329902386900f, 1.412449846048463600f,
+    1.412178310262796900f,
+  1.411906722555370500f, 1.411635082936170100f, 1.411363391415182900f,
+    1.411091648002398500f,
+  1.410819852707807700f, 1.410548005541404100f, 1.410276106513182400f,
+    1.410004155633139500f,
+  1.409732152911274500f, 1.409460098357588200f, 1.409187991982083100f,
+    1.408915833794763800f,
+  1.408643623805636800f, 1.408371362024710500f, 1.408099048461995300f,
+    1.407826683127503000f,
+  1.407554266031248100f, 1.407281797183246500f, 1.407009276593515800f,
+    1.406736704272076400f,
+  1.406464080228949600f, 1.406191404474159000f, 1.405918677017730100f,
+    1.405645897869690400f,
+  1.405373067040069300f, 1.405100184538898000f, 1.404827250376209400f,
+    1.404554264562038400f,
+  1.404281227106422400f, 1.404008138019399800f, 1.403734997311011600f,
+    1.403461804991300100f,
+  1.403188561070310100f, 1.402915265558087700f, 1.402641918464681400f,
+    1.402368519800141200f,
+  1.402095069574519800f, 1.401821567797870300f, 1.401548014480249000f,
+    1.401274409631713600f,
+  1.401000753262323900f, 1.400727045382141400f, 1.400453286001229800f,
+    1.400179475129653700f,
+  1.399905612777481200f, 1.399631698954780800f, 1.399357733671623900f,
+    1.399083716938083600f,
+  1.398809648764234100f, 1.398535529160152400f, 1.398261358135917300f,
+    1.397987135701609200f,
+  1.397712861867310300f, 1.397438536643105000f, 1.397164160039079200f,
+    1.396889732065321300f,
+  1.396615252731921100f, 1.396340722048970300f, 1.396066140026562800f,
+    1.395791506674794100f,
+  1.395516822003761700f, 1.395242086023564800f, 1.394967298744304900f,
+    1.394692460176085300f,
+  1.394417570329010700f, 1.394142629213188000f, 1.393867636838725900f,
+    1.393592593215735600f,
+  1.393317498354329300f, 1.393042352264621600f, 1.392767154956728400f,
+    1.392491906440768600f,
+  1.392216606726861800f, 1.391941255825130100f, 1.391665853745697400f,
+    1.391390400498689700f,
+  1.391114896094234100f, 1.390839340542460600f, 1.390563733853500200f,
+    1.390288076037486500f,
+  1.390012367104554600f, 1.389736607064841100f, 1.389460795928485500f,
+    1.389184933705628300f,
+  1.388909020406412100f, 1.388633056040981600f, 1.388357040619483200f,
+    1.388080974152065200f,
+  1.387804856648877600f, 1.387528688120072600f, 1.387252468575804100f,
+    1.386976198026228100f,
+  1.386699876481501900f, 1.386423503951785200f, 1.386147080447239600f,
+    1.385870605978028100f,
+  1.385594080554316100f, 1.385317504186270900f, 1.385040876884061000f,
+    1.384764198657857200f,
+  1.384487469517832200f, 1.384210689474160600f, 1.383933858537019100f,
+    1.383656976716585600f,
+  1.383380044023040400f, 1.383103060466565300f, 1.382826026057344600f,
+    1.382548940805563800f,
+  1.382271804721410600f, 1.381994617815074400f, 1.381717380096746800f,
+    1.381440091576620700f,
+  1.381162752264891500f, 1.380885362171756300f, 1.380607921307413400f,
+    1.380330429682064000f,
+  1.380052887305910400f, 1.379775294189157000f, 1.379497650342010400f,
+    1.379219955774678700f,
+  1.378942210497371600f, 1.378664414520301500f, 1.378386567853681700f,
+    1.378108670507728300f,
+  1.377830722492658500f, 1.377552723818691500f, 1.377274674496048700f,
+    1.376996574534953300f,
+  1.376718423945630000f, 1.376440222738305700f, 1.376161970923209400f,
+    1.375883668510570900f,
+  1.375605315510623200f, 1.375326911933600200f, 1.375048457789738400f,
+    1.374769953089275400f,
+  1.374491397842451100f, 1.374212792059507100f, 1.373934135750687100f,
+    1.373655428926236400f,
+  1.373376671596402400f, 1.373097863771434200f, 1.372819005461582500f,
+    1.372540096677100200f,
+  1.372261137428242300f, 1.371982127725264800f, 1.371703067578426700f,
+    1.371423956997988000f,
+  1.371144795994210500f, 1.370865584577358300f, 1.370586322757697500f,
+    1.370307010545495500f,
+  1.370027647951022100f, 1.369748234984548000f, 1.369468771656347200f,
+    1.369189257976694200f,
+  1.368909693955866000f, 1.368630079604142000f, 1.368350414931802000f,
+    1.368070699949128800f,
+  1.367790934666406600f, 1.367511119093921800f, 1.367231253241962200f,
+    1.366951337120818000f,
+  1.366671370740780500f, 1.366391354112143500f, 1.366111287245202400f,
+    1.365831170150254300f,
+  1.365551002837598600f, 1.365270785317536100f, 1.364990517600369400f,
+    1.364710199696403300f,
+  1.364429831615944200f, 1.364149413369300600f, 1.363868944966782900f,
+    1.363588426418702600f,
+  1.363307857735373900f, 1.363027238927112300f, 1.362746570004235400f,
+    1.362465850977062900f,
+  1.362185081855915600f, 1.361904262651116900f, 1.361623393372991300f,
+    1.361342474031866000f,
+  1.361061504638069400f, 1.360780485201932300f, 1.360499415733786400f,
+    1.360218296243966200f,
+  1.359937126742807300f, 1.359655907240648000f, 1.359374637747827700f,
+    1.359093318274687800f,
+  1.358811948831571500f, 1.358530529428824400f, 1.358249060076792900f,
+    1.357967540785826300f,
+  1.357685971566275200f, 1.357404352428492000f, 1.357122683382830900f,
+    1.356840964439648200f,
+  1.356559195609301700f, 1.356277376902151900f, 1.355995508328559500f,
+    1.355713589898888800f,
+  1.355431621623504700f, 1.355149603512774400f, 1.354867535577067200f,
+    1.354585417826753800f,
+  1.354303250272206500f, 1.354021032923800300f, 1.353738765791911100f,
+    1.353456448886917200f,
+  1.353174082219199100f, 1.352891665799137900f, 1.352609199637117500f,
+    1.352326683743523300f,
+  1.352044118128742600f, 1.351761502803164900f, 1.351478837777180700f,
+    1.351196123061183100f,
+  1.350913358665566400f, 1.350630544600727200f, 1.350347680877063800f,
+    1.350064767504976400f,
+  1.349781804494866600f, 1.349498791857138400f, 1.349215729602197400f,
+    1.348932617740450600f,
+  1.348649456282307700f, 1.348366245238179500f, 1.348082984618478800f,
+    1.347799674433620500f,
+  1.347516314694020800f, 1.347232905410098200f, 1.346949446592273100f,
+    1.346665938250967100f,
+  1.346382380396604000f, 1.346098773039609700f, 1.345815116190411300f,
+    1.345531409859438200f,
+  1.345247654057121700f, 1.344963848793894200f, 1.344679994080190800f,
+    1.344396089926448000f,
+  1.344112136343103900f, 1.343828133340598800f, 1.343544080929374800f,
+    1.343259979119875600f,
+  1.342975827922546600f, 1.342691627347835500f, 1.342407377406191500f,
+    1.342123078108065700f,
+  1.341838729463910900f, 1.341554331484181600f, 1.341269884179334700f,
+    1.340985387559828100f,
+  1.340700841636122400f, 1.340416246418678800f, 1.340131601917961900f,
+    1.339846908144436600f,
+  1.339562165108570700f, 1.339277372820833400f, 1.338992531291695500f,
+    1.338707640531629800f,
+  1.338422700551110900f, 1.338137711360615200f, 1.337852672970621300f,
+    1.337567585391608900f,
+  1.337282448634059800f, 1.336997262708457900f, 1.336712027625288600f,
+    1.336426743395039000f,
+  1.336141410028198500f, 1.335856027535258000f, 1.335570595926709700f,
+    1.335285115213048500f,
+  1.334999585404770700f, 1.334714006512374400f, 1.334428378546359500f,
+    1.334142701517227600f,
+  1.333856975435482300f, 1.333571200311629100f, 1.333285376156174700f,
+    1.332999502979628700f,
+  1.332713580792501500f, 1.332427609605305400f, 1.332141589428554900f,
+    1.331855520272766200f,
+  1.331569402148457400f, 1.331283235066148100f, 1.330997019036359800f,
+    1.330710754069615700f,
+  1.330424440176441300f, 1.330138077367363200f, 1.329851665652910500f,
+    1.329565205043613800f,
+  1.329278695550004700f, 1.328992137182618100f, 1.328705529951989400f,
+    1.328418873868656900f,
+  1.328132168943159800f, 1.327845415186039000f, 1.327558612607838500f,
+    1.327271761219102500f,
+  1.326984861030378000f, 1.326697912052213500f, 1.326410914295159400f,
+    1.326123867769767500f,
+  1.325836772486591800f, 1.325549628456188100f, 1.325262435689113600f,
+    1.324975194195928000f,
+  1.324687903987191900f, 1.324400565073468300f, 1.324113177465321900f,
+    1.323825741173318700f,
+  1.323538256208027800f, 1.323250722580018500f, 1.322963140299862500f,
+    1.322675509378133900f,
+  1.322387829825407700f, 1.322100101652261100f, 1.321812324869273500f,
+    1.321524499487024800f,
+  1.321236625516098100f, 1.320948702967077400f, 1.320660731850549000f,
+    1.320372712177100700f,
+  1.320084643957322400f, 1.319796527201805300f, 1.319508361921142500f,
+    1.319220148125929100f,
+  1.318931885826762000f, 1.318643575034239800f, 1.318355215758962900f,
+    1.318066808011533200f,
+  1.317778351802554800f, 1.317489847142633300f, 1.317201294042376300f,
+    1.316912692512393300f,
+  1.316624042563294900f, 1.316335344205694200f, 1.316046597450205800f,
+    1.315757802307445900f,
+  1.315468958788033000f, 1.315180066902586800f, 1.314891126661728900f,
+    1.314602138076083300f,
+  1.314313101156274800f, 1.314024015912930600f, 1.313734882356679900f,
+    1.313445700498152800f,
+  1.313156470347981900f, 1.312867191916801100f, 1.312577865215246900f,
+    1.312288490253956900f,
+  1.311999067043570200f, 1.311709595594728000f, 1.311420075918073900f,
+    1.311130508024252400f,
+  1.310840891923910100f, 1.310551227627695400f, 1.310261515146258200f,
+    1.309971754490250700f,
+  1.309681945670326400f, 1.309392088697140900f, 1.309102183581351200f,
+    1.308812230333616500f,
+  1.308522228964597500f, 1.308232179484956500f, 1.307942081905358000f,
+    1.307651936236467800f,
+  1.307361742488954300f, 1.307071500673486800f, 1.306781210800736200f,
+    1.306490872881376200f,
+  1.306200486926081700f, 1.305910052945529200f, 1.305619570950396800f,
+    1.305329040951365100f,
+  1.305038462959116100f, 1.304747836984333300f, 1.304457163037702200f,
+    1.304166441129910300f,
+  1.303875671271646400f, 1.303584853473601200f, 1.303293987746467300f,
+    1.303003074100939100f,
+  1.302712112547712800f, 1.302421103097485900f, 1.302130045760958100f,
+    1.301838940548830600f,
+  1.301547787471806900f, 1.301256586540591600f, 1.300965337765891600f,
+    1.300674041158414800f,
+  1.300382696728871400f, 1.300091304487973800f, 1.299799864446435200f,
+    1.299508376614971500f,
+  1.299216841004299200f, 1.298925257625137800f, 1.298633626488207500f,
+    1.298341947604231300f,
+  1.298050220983932900f, 1.297758446638038700f, 1.297466624577275900f,
+    1.297174754812374400f,
+  1.296882837354065100f, 1.296590872213081200f, 1.296298859400157700f,
+    1.296006798926030200f,
+  1.295714690801437600f, 1.295422535037119800f, 1.295130331643818500f,
+    1.294838080632277000f,
+  1.294545782013240900f, 1.294253435797456900f, 1.293961041995673700f,
+    1.293668600618642000f,
+  1.293376111677113900f, 1.293083575181843500f, 1.292790991143586200f,
+    1.292498359573099700f,
+  1.292205680481143500f, 1.291912953878477900f, 1.291620179775866400f,
+    1.291327358184073200f,
+  1.291034489113864100f, 1.290741572576007400f, 1.290448608581273000f,
+    1.290155597140431700f,
+  1.289862538264257700f, 1.289569431963524900f, 1.289276278249010600f,
+    1.288983077131493000f,
+  1.288689828621752300f, 1.288396532730570400f, 1.288103189468731400f,
+    1.287809798847019800f,
+  1.287516360876223500f, 1.287222875567130900f, 1.286929342930532800f,
+    1.286635762977221800f,
+  1.286342135717991600f, 1.286048461163638000f, 1.285754739324958900f,
+    1.285460970212753500f,
+  1.285167153837822900f, 1.284873290210969900f, 1.284579379342998700f,
+    1.284285421244715900f,
+  1.283991415926929400f, 1.283697363400448900f, 1.283403263676086100f,
+    1.283109116764654000f,
+  1.282814922676967400f, 1.282520681423843000f, 1.282226393016099500f,
+    1.281932057464557000f,
+  1.281637674780037100f, 1.281343244973363700f, 1.281048768055361900f,
+    1.280754244036858900f,
+  1.280459672928683500f, 1.280165054741666300f, 1.279870389486639400f,
+    1.279575677174437100f,
+  1.279280917815894600f, 1.278986111421849900f, 1.278691258003142000f,
+    1.278396357570611900f,
+  1.278101410135101800f, 1.277806415707456700f, 1.277511374298522200f,
+    1.277216285919146500f,
+  1.276921150580179200f, 1.276625968292471000f, 1.276330739066875400f,
+    1.276035462914247000f,
+  1.275740139845442400f, 1.275444769871319600f, 1.275149353002738700f,
+    1.274853889250561200f,
+  1.274558378625650200f, 1.274262821138871300f, 1.273967216801090900f,
+    1.273671565623178100f,
+  1.273375867616002300f, 1.273080122790436000f, 1.272784331157352800f,
+    1.272488492727628100f,
+  1.272192607512139300f, 1.271896675521764900f, 1.271600696767385400f,
+    1.271304671259883200f,
+  1.271008599010142500f, 1.270712480029048800f, 1.270416314327489800f,
+    1.270120101916354600f,
+  1.269823842806533800f, 1.269527537008920300f, 1.269231184534408200f,
+    1.268934785393893700f,
+  1.268638339598274500f, 1.268341847158450200f, 1.268045308085321800f,
+    1.267748722389792100f,
+  1.267452090082765900f, 1.267155411175149500f, 1.266858685677851000f,
+    1.266561913601780100f,
+  1.266265094957848000f, 1.265968229756968100f, 1.265671318010055400f,
+    1.265374359728026500f,
+  1.265077354921799300f, 1.264780303602294200f, 1.264483205780432700f,
+    1.264186061467138500f,
+  1.263888870673336400f, 1.263591633409954000f, 1.263294349687918800f,
+    1.262997019518161700f,
+  1.262699642911614600f, 1.262402219879211300f, 1.262104750431887000f,
+    1.261807234580578900f,
+  1.261509672336225600f, 1.261212063709767900f, 1.260914408712147800f,
+    1.260616707354309500f,
+  1.260318959647198400f, 1.260021165601761900f, 1.259723325228949000f,
+    1.259425438539710300f,
+  1.259127505544998600f, 1.258829526255768000f, 1.258531500682973800f,
+    1.258233428837574300f,
+  1.257935310730528000f, 1.257637146372796400f, 1.257338935775342200f,
+    1.257040678949129500f,
+  1.256742375905124400f, 1.256444026654294400f, 1.256145631207609400f,
+    1.255847189576040100f,
+  1.255548701770560000f, 1.255250167802143000f, 1.254951587681765600f,
+    1.254652961420405600f,
+  1.254354289029042900f, 1.254055570518658500f, 1.253756805900235700f,
+    1.253457995184759300f,
+  1.253159138383215200f, 1.252860235506592100f, 1.252561286565879300f,
+    1.252262291572068900f,
+  1.251963250536153500f, 1.251664163469128300f, 1.251365030381989700f,
+    1.251065851285736200f,
+  1.250766626191367500f, 1.250467355109885500f, 1.250168038052293500f,
+    1.249868675029596200f,
+  1.249569266052800800f, 1.249269811132915200f, 1.248970310280950200f,
+    1.248670763507917100f,
+  1.248371170824829300f, 1.248071532242702100f, 1.247771847772552300f,
+    1.247472117425398700f,
+  1.247172341212261500f, 1.246872519144162300f, 1.246572651232124700f,
+    1.246272737487174300f,
+  1.245972777920338000f, 1.245672772542644400f, 1.245372721365123600f,
+    1.245072624398807900f,
+  1.244772481654731000f, 1.244472293143928300f, 1.244172058877436800f,
+    1.243871778866295400f,
+  1.243571453121544000f, 1.243271081654225400f, 1.242970664475383100f,
+    1.242670201596062700f,
+  1.242369693027311200f, 1.242069138780177400f, 1.241768538865712000f,
+    1.241467893294967200f,
+  1.241167202078996800f, 1.240866465228856100f, 1.240565682755603100f,
+    1.240264854670295900f,
+  1.239963980983995300f, 1.239663061707763700f, 1.239362096852665300f,
+    1.239061086429765300f,
+  1.238760030450130900f, 1.238458928924831600f, 1.238157781864937400f,
+    1.237856589281521000f,
+  1.237555351185656500f, 1.237254067588419400f, 1.236952738500886900f,
+    1.236651363934138300f,
+  1.236349943899254000f, 1.236048478407316500f, 1.235746967469409900f,
+    1.235445411096619500f,
+  1.235143809300033300f, 1.234842162090739700f, 1.234540469479829900f,
+    1.234238731478396000f,
+  1.233936948097532400f, 1.233635119348334400f, 1.233333245241899200f,
+    1.233031325789326400f,
+  1.232729361001716500f, 1.232427350890172000f, 1.232125295465796600f,
+    1.231823194739696300f,
+  1.231521048722978200f, 1.231218857426751700f, 1.230916620862127400f,
+    1.230614339040217800f,
+  1.230312011972136500f, 1.230009639668999500f, 1.229707222141924100f,
+    1.229404759402029400f,
+  1.229102251460436400f, 1.228799698328266700f, 1.228497100016644900f,
+    1.228194456536696500f,
+  1.227891767899548700f, 1.227589034116330700f, 1.227286255198173100f,
+    1.226983431156208200f,
+  1.226680562001569900f, 1.226377647745394000f, 1.226074688398817600f,
+    1.225771683972980200f,
+  1.225468634479021500f, 1.225165539928084300f, 1.224862400331312400f,
+    1.224559215699851500f,
+  1.224255986044848500f, 1.223952711377453100f, 1.223649391708814700f,
+    1.223346027050086400f,
+  1.223042617412421600f, 1.222739162806975900f, 1.222435663244906700f,
+    1.222132118737372400f,
+  1.221828529295533800f, 1.221524894930552800f, 1.221221215653593100f,
+    1.220917491475820500f,
+  1.220613722408401900f, 1.220309908462505800f, 1.220006049649302800f,
+    1.219702145979964600f,
+  1.219398197465665400f, 1.219094204117580300f, 1.218790165946886100f,
+    1.218486082964761500f,
+  1.218181955182386500f, 1.217877782610943700f, 1.217573565261616000f,
+    1.217269303145589000f,
+  1.216964996274049400f, 1.216660644658185600f, 1.216356248309187600f,
+    1.216051807238247800f,
+  1.215747321456559300f, 1.215442790975316700f, 1.215138215805717300f,
+    1.214833595958959300f,
+  1.214528931446242600f, 1.214224222278769100f, 1.213919468467741900f,
+    1.213614670024366000f,
+  1.213309826959847700f, 1.213004939285395400f, 1.212700007012219100f,
+    1.212395030151530300f,
+  1.212090008714541600f, 1.211784942712468300f, 1.211479832156526800f,
+    1.211174677057934800f,
+  1.210869477427912300f, 1.210564233277680500f, 1.210258944618462200f,
+    1.209953611461482200f,
+  1.209648233817966600f, 1.209342811699143600f, 1.209037345116242400f,
+    1.208731834080493800f,
+  1.208426278603131200f, 1.208120678695388600f, 1.207815034368502100f,
+    1.207509345633709600f,
+  1.207203612502250300f, 1.206897834985365000f, 1.206592013094296200f,
+    1.206286146840288300f,
+  1.205980236234587100f, 1.205674281288440000f, 1.205368282013096200f,
+    1.205062238419806200f,
+  1.204756150519822300f, 1.204450018324398900f, 1.204143841844791200f,
+    1.203837621092256800f,
+  1.203531356078054100f, 1.203225046813444000f, 1.202918693309688300f,
+    1.202612295578050900f,
+  1.202305853629797500f, 1.201999367476194400f, 1.201692837128510700f,
+    1.201386262598016500f,
+  1.201079643895983700f, 1.200772981033685800f, 1.200466274022397900f,
+    1.200159522873396800f,
+  1.199852727597960700f, 1.199545888207369700f, 1.199239004712905300f,
+    1.198932077125851100f,
+  1.198625105457491700f, 1.198318089719113200f, 1.198011029922004400f,
+    1.197703926077454200f,
+  1.197396778196754700f, 1.197089586291198500f, 1.196782350372080300f,
+    1.196475070450696100f,
+  1.196167746538343600f, 1.195860378646322700f, 1.195552966785933900f,
+    1.195245510968480300f,
+  1.194938011205265900f, 1.194630467507596500f, 1.194322879886780000f,
+    1.194015248354125100f,
+  1.193707572920943000f, 1.193399853598545500f, 1.193092090398246900f,
+    1.192784283331362700f,
+  1.192476432409210100f, 1.192168537643107900f, 1.191860599044376500f,
+    1.191552616624337800f,
+  1.191244590394315400f, 1.190936520365635000f, 1.190628406549622900f,
+    1.190320248957608100f,
+  1.190012047600920200f, 1.189703802490891000f, 1.189395513638853900f,
+    1.189087181056143900f,
+  1.188778804754097300f, 1.188470384744052100f, 1.188161921037348400f,
+    1.187853413645327100f,
+  1.187544862579331500f, 1.187236267850706000f, 1.186927629470796900f,
+    1.186618947450951600f,
+  1.186310221802519900f, 1.186001452536852300f, 1.185692639665301600f,
+    1.185383783199222000f,
+  1.185074883149969100f, 1.184765939528900500f, 1.184456952347374900f,
+    1.184147921616753200f,
+  1.183838847348397400f, 1.183529729553671500f, 1.183220568243940300f,
+    1.182911363430571200f,
+  1.182602115124932900f, 1.182292823338395100f, 1.181983488082330300f,
+    1.181674109368111300f,
+  1.181364687207113100f, 1.181055221610712400f, 1.180745712590287400f,
+    1.180436160157217800f,
+  1.180126564322885100f, 1.179816925098671900f, 1.179507242495962900f,
+    1.179197516526144600f,
+  1.178887747200604300f, 1.178577934530731700f, 1.178268078527917200f,
+    1.177958179203553800f,
+  1.177648236569035300f, 1.177338250635757700f, 1.177028221415118200f,
+    1.176718148918515700f,
+  1.176408033157350300f, 1.176097874143024600f, 1.175787671886942000f,
+    1.175477426400507700f,
+  1.175167137695128900f, 1.174856805782213500f, 1.174546430673171900f,
+    1.174236012379415600f,
+  1.173925550912357800f, 1.173615046283413200f, 1.173304498503998400f,
+    1.172993907585530900f,
+  1.172683273539430800f, 1.172372596377118800f, 1.172061876110017700f,
+    1.171751112749551900f,
+  1.171440306307147200f, 1.171129456794231200f, 1.170818564222232800f,
+    1.170507628602582800f,
+  1.170196649946713100f, 1.169885628266057900f, 1.169574563572052300f,
+    1.169263455876133200f,
+  1.168952305189739200f, 1.168641111524310700f, 1.168329874891289400f,
+    1.168018595302118000f,
+  1.167707272768241800f, 1.167395907301107100f, 1.167084498912162300f,
+    1.166773047612856400f,
+  1.166461553414641000f, 1.166150016328968600f, 1.165838436367293800f,
+    1.165526813541072100f,
+  1.165215147861761400f, 1.164903439340820900f, 1.164591687989710500f,
+    1.164279893819892800f,
+  1.163968056842831700f, 1.163656177069992500f, 1.163344254512841800f,
+    1.163032289182848800f,
+  1.162720281091483000f, 1.162408230250216100f, 1.162096136670521600f,
+    1.161784000363874000f,
+  1.161471821341749900f, 1.161159599615627000f, 1.160847335196984800f,
+    1.160535028097304600f,
+  1.160222678328068700f, 1.159910285900761700f, 1.159597850826869200f,
+    1.159285373117878500f,
+  1.158972852785278500f, 1.158660289840559800f, 1.158347684295214300f,
+    1.158035036160735900f,
+  1.157722345448619400f, 1.157409612170361600f, 1.157096836337461000f,
+    1.156784017961417500f,
+  1.156471157053732300f, 1.156158253625908700f, 1.155845307689450800f,
+    1.155532319255865300f,
+  1.155219288336659400f, 1.154906214943342700f, 1.154593099087426000f,
+    1.154279940780421400f,
+  1.153966740033842900f, 1.153653496859206000f, 1.153340211268028000f,
+    1.153026883271827300f,
+  1.152713512882124400f, 1.152400100110440700f, 1.152086644968299400f,
+    1.151773147467225300f,
+  1.151459607618745300f, 1.151146025434387000f, 1.150832400925680100f,
+    1.150518734104155400f,
+  1.150205024981345800f, 1.149891273568785400f, 1.149577479878009800f,
+    1.149263643920556800f,
+  1.148949765707964600f, 1.148635845251773800f, 1.148321882563526400f,
+    1.148007877654766200f,
+  1.147693830537038100f, 1.147379741221888500f, 1.147065609720865600f,
+    1.146751436045519300f,
+  1.146437220207400700f, 1.146122962218062600f, 1.145808662089060000f,
+    1.145494319831947800f,
+  1.145179935458284100f, 1.144865508979627800f, 1.144551040407539400f,
+    1.144236529753581000f,
+  1.143921977029316500f, 1.143607382246310600f, 1.143292745416130600f,
+    1.142978066550344400f,
+  1.142663345660522000f, 1.142348582758234900f, 1.142033777855056000f,
+    1.141718930962559500f,
+  1.141404042092321500f, 1.141089111255919800f, 1.140774138464933700f,
+    1.140459123730943200f,
+  1.140144067065530700f, 1.139828968480280300f, 1.139513827986776900f,
+    1.139198645596607400f,
+  1.138883421321360600f, 1.138568155172625700f, 1.138252847161994400f,
+    1.137937497301059600f,
+  1.137622105601416000f, 1.137306672074659900f, 1.136991196732388200f,
+    1.136675679586200500f,
+  1.136360120647697200f, 1.136044519928480800f, 1.135728877440154800f,
+    1.135413193194324800f,
+  1.135097467202597100f, 1.134781699476580300f, 1.134465890027884300f,
+    1.134150038868120500f,
+  1.133834146008902100f, 1.133518211461843200f, 1.133202235238559800f,
+    1.132886217350669500f,
+  1.132570157809791500f, 1.132254056627546300f, 1.131937913815556300f,
+    1.131621729385444900f,
+  1.131305503348837300f, 1.130989235717360100f, 1.130672926502642100f,
+    1.130356575716312500f,
+  1.130040183370002900f, 1.129723749475346000f, 1.129407274043976200f,
+    1.129090757087529500f,
+  1.128774198617643200f, 1.128457598645956600f, 1.128140957184109700f,
+    1.127824274243744500f,
+  1.127507549836505000f, 1.127190783974035800f, 1.126873976667983800f,
+    1.126557127929996800f,
+  1.126240237771724700f, 1.125923306204818400f, 1.125606333240930700f,
+    1.125289318891715900f,
+  1.124972263168829500f, 1.124655166083928800f, 1.124338027648672500f,
+    1.124020847874721100f,
+  1.123703626773736100f, 1.123386364357381200f, 1.123069060637320600f,
+    1.122751715625221400f,
+  1.122434329332750800f, 1.122116901771578400f, 1.121799432953375600f,
+    1.121481922889814300f,
+  1.121164371592568300f, 1.120846779073313400f, 1.120529145343726500f,
+    1.120211470415486200f,
+  1.119893754300272300f, 1.119575997009766300f, 1.119258198555651300f,
+    1.118940358949611900f,
+  1.118622478203333800f, 1.118304556328505200f, 1.117986593336814700f,
+    1.117668589239953200f,
+  1.117350544049612300f, 1.117032457777486200f, 1.116714330435269600f,
+    1.116396162034659600f,
+  1.116077952587353600f, 1.115759702105052000f, 1.115441410599455500f,
+    1.115123078082267000f,
+  1.114804704565190500f, 1.114486290059931900f, 1.114167834578198200f,
+    1.113849338131698300f,
+  1.113530800732142100f, 1.113212222391241500f, 1.112893603120710000f,
+    1.112574942932261600f,
+  1.112256241837613000f, 1.111937499848481900f, 1.111618716976587700f,
+    1.111299893233650600f,
+  1.110981028631393700f, 1.110662123181539900f, 1.110343176895814500f,
+    1.110024189785944900f,
+  1.109705161863658600f, 1.109386093140686000f, 1.109066983628758100f,
+    1.108747833339607200f,
+  1.108428642284968100f, 1.108109410476576300f, 1.107790137926169200f,
+    1.107470824645485600f,
+  1.107151470646265300f, 1.106832075940250600f, 1.106512640539184100f,
+    1.106193164454811100f,
+  1.105873647698877300f, 1.105554090283131100f, 1.105234492219321100f,
+    1.104914853519198400f,
+  1.104595174194514800f, 1.104275454257024300f, 1.103955693718482200f,
+    1.103635892590644900f,
+  1.103316050885270600f, 1.102996168614119000f, 1.102676245788951400f,
+    1.102356282421530300f,
+  1.102036278523620000f, 1.101716234106985700f, 1.101396149183395000f,
+    1.101076023764616400f,
+  1.100755857862419700f, 1.100435651488577100f, 1.100115404654861100f,
+    1.099795117373046200f,
+  1.099474789654909100f, 1.099154421512226600f, 1.098834012956778200f,
+    1.098513564000344300f,
+  1.098193074654706800f, 1.097872544931649100f, 1.097551974842956500f,
+    1.097231364400415000f,
+  1.096910713615813200f, 1.096590022500939700f, 1.096269291067585700f,
+    1.095948519327543800f,
+  1.095627707292607700f, 1.095306854974572800f, 1.094985962385235800f,
+    1.094665029536395100f,
+  1.094344056439850600f, 1.094023043107403200f, 1.093701989550856000f,
+    1.093380895782013000f,
+  1.093059761812680100f, 1.092738587654664300f, 1.092417373319774200f,
+    1.092096118819820200f,
+  1.091774824166613600f, 1.091453489371968100f, 1.091132114447697300f,
+    1.090810699405617900f,
+  1.090489244257547300f, 1.090167749015304300f, 1.089846213690709900f,
+    1.089524638295585400f,
+  1.089203022841754400f, 1.088881367341041800f, 1.088559671805274100f,
+    1.088237936246279100f,
+  1.087916160675885800f, 1.087594345105925300f, 1.087272489548229700f,
+    1.086950594014632700f,
+  1.086628658516969500f, 1.086306683067076900f, 1.085984667676792600f,
+    1.085662612357956500f,
+  1.085340517122409800f, 1.085018381981994500f, 1.084696206948555300f,
+    1.084373992033937000f,
+  1.084051737249986900f, 1.083729442608553300f, 1.083407108121486000f,
+    1.083084733800636200f,
+  1.082762319657857100f, 1.082439865705002500f, 1.082117371953928300f,
+    1.081794838416491700f,
+  1.081472265104551200f, 1.081149652029967000f, 1.080826999204601100f,
+    1.080504306640315500f,
+  1.080181574348975500f, 1.079858802342446900f, 1.079535990632596800f,
+    1.079213139231294500f,
+  1.078890248150409700f, 1.078567317401815100f, 1.078244346997383300f,
+    1.077921336948988600f,
+  1.077598287268508400f, 1.077275197967819000f, 1.076952069058800400f,
+    1.076628900553332700f,
+  1.076305692463297900f, 1.075982444800579700f, 1.075659157577062200f,
+    1.075335830804633000f,
+  1.075012464495178800f, 1.074689058660589700f, 1.074365613312755900f,
+    1.074042128463569500f,
+  1.073718604124924500f, 1.073395040308715400f, 1.073071437026839500f,
+    1.072747794291194300f,
+  1.072424112113678600f, 1.072100390506194500f, 1.071776629480643500f,
+    1.071452829048929800f,
+  1.071128989222958500f, 1.070805110014635900f, 1.070481191435870500f,
+    1.070157233498571600f,
+  1.069833236214650800f, 1.069509199596019800f, 1.069185123654592600f,
+    1.068861008402285200f,
+  1.068536853851013600f, 1.068212660012696700f, 1.067888426899253500f,
+    1.067564154522606000f,
+  1.067239842894676100f, 1.066915492027387600f, 1.066591101932666800f,
+    1.066266672622439700f,
+  1.065942204108635300f, 1.065617696403183400f, 1.065293149518014500f,
+    1.064968563465062100f,
+  1.064643938256259400f, 1.064319273903543000f, 1.063994570418849400f,
+    1.063669827814116300f,
+  1.063345046101285000f, 1.063020225292295300f, 1.062695365399091200f,
+    1.062370466433616400f,
+  1.062045528407815900f, 1.061720551333637600f, 1.061395535223029500f,
+    1.061070480087941800f,
+  1.060745385940325500f, 1.060420252792134000f, 1.060095080655320900f,
+    1.059769869541841800f,
+  1.059444619463654400f, 1.059119330432716700f, 1.058794002460989000f,
+    1.058468635560432500f,
+  1.058143229743009600f, 1.057817785020685100f, 1.057492301405424500f,
+    1.057166778909195000f,
+  1.056841217543965200f, 1.056515617321704500f, 1.056189978254385100f,
+    1.055864300353978900f,
+  1.055538583632461100f, 1.055212828101807200f, 1.054887033773993300f,
+    1.054561200660999200f,
+  1.054235328774803900f, 1.053909418127389400f, 1.053583468730738200f,
+    1.053257480596834700f,
+  1.052931453737664600f, 1.052605388165214700f, 1.052279283891473600f,
+    1.051953140928431100f,
+  1.051626959288079100f, 1.051300738982409800f, 1.050974480023417500f,
+    1.050648182423098000f,
+  1.050321846193448000f, 1.049995471346466300f, 1.049669057894152800f,
+    1.049342605848508200f,
+  1.049016115221536000f, 1.048689586025239700f, 1.048363018271625300f,
+    1.048036411972699500f,
+  1.047709767140470500f, 1.047383083786948700f, 1.047056361924144400f,
+    1.046729601564071200f,
+  1.046402802718742400f, 1.046075965400174300f, 1.045749089620383200f,
+    1.045422175391386800f,
+  1.045095222725206200f, 1.044768231633861100f, 1.044441202129375200f,
+    1.044114134223771900f,
+  1.043787027929076000f, 1.043459883257315400f, 1.043132700220517300f,
+    1.042805478830712200f,
+  1.042478219099930400f, 1.042150921040204200f, 1.041823584663568200f,
+    1.041496209982056600f,
+  1.041168797007707000f, 1.040841345752557200f, 1.040513856228645800f,
+    1.040186328448014800f,
+  1.039858762422705600f, 1.039531158164762400f, 1.039203515686230000f,
+    1.038875834999155100f,
+  1.038548116115585800f, 1.038220359047570500f, 1.037892563807160800f,
+    1.037564730406408200f,
+  1.037236858857366600f, 1.036908949172090900f, 1.036581001362636600f,
+    1.036253015441062700f,
+  1.035924991419427100f, 1.035596929309791300f, 1.035268829124216700f,
+    1.034940690874766300f,
+  1.034612514573505700f, 1.034284300232500000f, 1.033956047863817500f,
+    1.033627757479526700f,
+  1.033299429091697700f, 1.032971062712402700f, 1.032642658353714300f,
+    1.032314216027707700f,
+  1.031985735746457900f, 1.031657217522042900f, 1.031328661366541300f,
+    1.031000067292032300f,
+  1.030671435310598600f, 1.030342765434322200f, 1.030014057675287900f,
+    1.029685312045581100f,
+  1.029356528557288300f, 1.029027707222499100f, 1.028698848053302100f,
+    1.028369951061789600f,
+  1.028041016260053500f, 1.027712043660187600f, 1.027383033274288400f,
+    1.027053985114451100f,
+  1.026724899192775300f, 1.026395775521359500f, 1.026066614112305600f,
+    1.025737414977715200f,
+  1.025408178129692000f, 1.025078903580341600f, 1.024749591341769700f,
+    1.024420241426085200f,
+  1.024090853845396800f, 1.023761428611814600f, 1.023431965737451800f,
+    1.023102465234420700f,
+  1.022772927114837100f, 1.022443351390816400f, 1.022113738074476300f,
+    1.021784087177936000f,
+  1.021454398713315600f, 1.021124672692737000f, 1.020794909128323000f,
+    1.020465108032198300f,
+  1.020135269416488700f, 1.019805393293321100f, 1.019475479674824900f,
+    1.019145528573129000f,
+  1.018815540000365800f, 1.018485513968667500f, 1.018155450490168000f,
+    1.017825349577003300f,
+  1.017495211241309800f, 1.017165035495226400f, 1.016834822350892300f,
+    1.016504571820448000f,
+  1.016174283916036800f, 1.015843958649801600f, 1.015513596033888400f,
+    1.015183196080442900f,
+  1.014852758801613200f, 1.014522284209548900f, 1.014191772316400000f,
+    1.013861223134318900f,
+  1.013530636675459100f, 1.013200012951974700f, 1.012869351976022300f,
+    1.012538653759758900f,
+  1.012207918315344300f, 1.011877145654937400f, 1.011546335790700600f,
+    1.011215488734796800f,
+  1.010884604499389800f, 1.010553683096645900f, 1.010222724538731600f,
+    1.009891728837815700f,
+  1.009560696006067900f, 1.009229626055658800f, 1.008898518998761800f,
+    1.008567374847549900f,
+  1.008236193614199000f, 1.007904975310885300f, 1.007573719949786700f,
+    1.007242427543082900f,
+  1.006911098102953900f, 1.006579731641582500f, 1.006248328171152100f,
+    1.005916887703846500f,
+  1.005585410251852700f, 1.005253895827357800f, 1.004922344442551000f,
+    1.004590756109621900f,
+  1.004259130840762700f, 1.003927468648166100f, 1.003595769544025900f,
+    1.003264033540538500f,
+  1.002932260649900000f, 1.002600450884309800f, 1.002268604255967200f,
+    1.001936720777072400f,
+  1.001604800459829000f, 1.001272843316440000f, 1.000940849359111000f,
+    1.000608818600048100f,
+  1.000276751051459200f, 0.999944646725553720f, 0.999612505634541740f,
+    0.999280327790635690f,
+  0.998948113206048590f, 0.998615861892994560f, 0.998283573863690270f,
+    0.997951249130352380f,
+  0.997618887705200020f, 0.997286489600452630f, 0.996954054828332210f,
+    0.996621583401061110f,
+  0.996289075330862860f, 0.995956530629963810f, 0.995623949310589620f,
+    0.995291331384969390f,
+  0.994958676865332010f, 0.994625985763907820f, 0.994293258092929790f,
+    0.993960493864630480f,
+  0.993627693091245660f, 0.993294855785010760f, 0.992961981958163210f,
+    0.992629071622942340f,
+  0.992296124791587690f, 0.991963141476341460f, 0.991630121689446090f,
+    0.991297065443145440f,
+  0.990963972749685840f, 0.990630843621313260f, 0.990297678070276800f,
+    0.989964476108825210f,
+  0.989631237749210020f, 0.989297963003683330f, 0.988964651884498000f,
+    0.988631304403909890f,
+  0.988297920574174430f, 0.987964500407549910f, 0.987631043916294970f,
+    0.987297551112669370f,
+  0.986964022008935520f, 0.986630456617355380f, 0.986296854950194260f,
+    0.985963217019717120f,
+  0.985629542838190490f, 0.985295832417883540f, 0.984962085771065030f,
+    0.984628302910006580f,
+  0.984294483846980150f, 0.983960628594258810f, 0.983626737164118190f,
+    0.983292809568833910f,
+  0.982958845820684270f, 0.982624845931947320f, 0.982290809914904140f,
+    0.981956737781835790f,
+  0.981622629545024770f, 0.981288485216756160f, 0.980954304809314670f,
+    0.980620088334987930f,
+  0.980285835806063770f, 0.979951547234831130f, 0.979617222633581860f,
+    0.979282862014607240f,
+  0.978948465390201530f, 0.978614032772659240f, 0.978279564174275860f,
+    0.977945059607349900f,
+  0.977610519084179290f, 0.977275942617064740f, 0.976941330218307540f,
+    0.976606681900209830f,
+  0.976271997675076550f, 0.975937277555212310f, 0.975602521552924600f,
+    0.975267729680520560f,
+  0.974932901950310350f, 0.974598038374604350f, 0.974263138965714040f,
+    0.973928203735953460f,
+  0.973593232697636530f, 0.973258225863079970f, 0.972923183244600480f,
+    0.972588104854516410f,
+  0.972252990705148370f, 0.971917840808816710f, 0.971582655177844700f,
+    0.971247433824555920f,
+  0.970912176761274950f, 0.970576884000329040f, 0.970241555554045230f,
+    0.969906191434753320f,
+  0.969570791654783330f, 0.969235356226466500f, 0.968899885162136650f,
+    0.968564378474127350f,
+  0.968228836174775060f, 0.967893258276415700f, 0.967557644791388500f,
+    0.967221995732032490f,
+  0.966886311110688230f, 0.966550590939698640f, 0.966214835231406500f,
+    0.965879043998157160f,
+  0.965543217252296420f, 0.965207355006171270f, 0.964871457272131190f,
+    0.964535524062525410f,
+  0.964199555389706030f, 0.963863551266025300f, 0.963527511703836660f,
+    0.963191436715496120f,
+  0.962855326313359350f, 0.962519180509785130f, 0.962182999317132030f,
+    0.961846782747760140f,
+  0.961510530814032040f, 0.961174243528309820f, 0.960837920902958720f,
+    0.960501562950343390f,
+  0.960165169682831830f, 0.959828741112791590f, 0.959492277252591900f,
+    0.959155778114604400f,
+  0.958819243711200310f, 0.958482674054753960f, 0.958146069157639560f,
+    0.957809429032232760f,
+  0.957472753690911670f, 0.957136043146054050f, 0.956799297410040440f,
+    0.956462516495251940f,
+  0.956125700414070300f, 0.955788849178880300f, 0.955451962802066120f,
+    0.955115041296014880f,
+  0.954778084673113870f, 0.954441092945751630f, 0.954104066126319150f,
+    0.953767004227207060f,
+  0.953429907260809120f, 0.953092775239518630f, 0.952755608175731570f,
+    0.952418406081844360f,
+  0.952081168970254520f, 0.951743896853362140f, 0.951406589743566950f,
+    0.951069247653271500f,
+  0.950731870594878510f, 0.950394458580791970f, 0.950057011623418380f,
+    0.949719529735163940f,
+  0.949382012928437600f, 0.949044461215648560f, 0.948706874609207220f,
+    0.948369253121526420f,
+  0.948031596765018910f, 0.947693905552099870f, 0.947356179495185020f,
+    0.947018418606691230f,
+  0.946680622899037650f, 0.946342792384643360f, 0.946004927075930090f,
+    0.945667026985319680f,
+  0.945329092125236190f, 0.944991122508104350f, 0.944653118146349890f,
+    0.944315079052401090f,
+  0.943977005238685770f, 0.943638896717634900f, 0.943300753501679190f,
+    0.942962575603250920f,
+  0.942624363034784580f, 0.942286115808714690f, 0.941947833937478270f,
+    0.941609517433512730f,
+  0.941271166309256450f, 0.940932780577150460f, 0.940594360249635500f,
+    0.940255905339155150f,
+  0.939917415858152920f, 0.939578891819073720f, 0.939240333234364950f,
+    0.938901740116473540f,
+  0.938563112477849630f, 0.938224450330942590f, 0.937885753688204820f,
+    0.937547022562088990f,
+  0.937208256965048840f, 0.936869456909540490f, 0.936530622408019990f,
+    0.936191753472946030f,
+  0.935852850116777430f, 0.935513912351974450f, 0.935174940190999560f,
+    0.934835933646314900f,
+  0.934496892730385720f, 0.934157817455677160f, 0.933818707834655590f,
+    0.933479563879790030f,
+  0.933140385603548840f, 0.932801173018403480f, 0.932461926136825660f,
+    0.932122644971287830f,
+  0.931783329534265240f, 0.931443979838232900f, 0.931104595895668410f,
+    0.930765177719049210f,
+  0.930425725320855430f, 0.930086238713567440f, 0.929746717909666790f,
+    0.929407162921637610f,
+  0.929067573761963250f, 0.928727950443130500f, 0.928388292977625930f,
+    0.928048601377937210f,
+  0.927708875656554800f, 0.927369115825968480f, 0.927029321898671270f,
+    0.926689493887155820f,
+  0.926349631803916270f, 0.926009735661449170f, 0.925669805472250860f,
+    0.925329841248820340f,
+  0.924989843003656610f, 0.924649810749260110f, 0.924309744498133750f,
+    0.923969644262779830f,
+  0.923629510055703820f, 0.923289341889410480f, 0.922949139776407800f,
+    0.922608903729203570f,
+  0.922268633760306990f, 0.921928329882229390f, 0.921587992107482210f,
+    0.921247620448579440f,
+  0.920907214918035070f, 0.920566775528364410f, 0.920226302292085460f,
+    0.919885795221715540f,
+  0.919545254329774850f, 0.919204679628783720f, 0.918864071131263780f,
+    0.918523428849739030f,
+  0.918182752796733110f, 0.917842042984772340f, 0.917501299426383480f,
+    0.917160522134094160f,
+  0.916819711120434700f, 0.916478866397934850f, 0.916137987979127270f,
+    0.915797075876544350f,
+  0.915456130102721200f, 0.915115150670193110f, 0.914774137591496510f,
+    0.914433090879170130f,
+  0.914092010545752620f, 0.913750896603785280f, 0.913409749065809520f,
+    0.913068567944367970f,
+  0.912727353252005710f, 0.912386105001267270f, 0.912044823204700370f,
+    0.911703507874852440f,
+  0.911362159024272310f, 0.911020776665511290f, 0.910679360811120000f,
+    0.910337911473652390f,
+  0.909996428665661990f, 0.909654912399703860f, 0.909313362688335290f,
+    0.908971779544113350f,
+  0.908630162979597760f, 0.908288513007348140f, 0.907946829639926790f,
+    0.907605112889895870f,
+  0.907263362769819000f, 0.906921579292262250f, 0.906579762469791110f,
+    0.906237912314974080f,
+  0.905896028840379560f, 0.905554112058577170f, 0.905212161982139160f,
+    0.904870178623637170f,
+  0.904528161995645670f, 0.904186112110739510f, 0.903844028981494190f,
+    0.903501912620488070f,
+  0.903159763040298880f, 0.902817580253507450f, 0.902475364272694370f,
+    0.902133115110441470f,
+  0.901790832779333250f, 0.901448517291953520f, 0.901106168660889110f,
+    0.900763786898726380f,
+  0.900421372018054500f, 0.900078924031462610f, 0.899736442951541320f,
+    0.899393928790883420f,
+  0.899051381562081310f, 0.898708801277730340f, 0.898366187950425780f,
+    0.898023541592764210f,
+  0.897680862217344440f, 0.897338149836764960f, 0.896995404463627350f,
+    0.896652626110532870f,
+  0.896309814790084090f, 0.895966970514885940f, 0.895624093297543110f,
+    0.895281183150662960f,
+  0.894938240086852970f, 0.894595264118721810f, 0.894252255258880410f,
+    0.893909213519939460f,
+  0.893566138914512420f, 0.893223031455212530f, 0.892879891154655380f,
+    0.892536718025457090f,
+  0.892193512080234670f, 0.891850273331607600f, 0.891507001792195000f,
+    0.891163697474618880f,
+  0.890820360391500920f, 0.890476990555464480f, 0.890133587979135000f,
+    0.889790152675137610f,
+  0.889446684656100330f, 0.889103183934650930f, 0.888759650523418650f,
+    0.888416084435035060f,
+  0.888072485682131150f, 0.887728854277341050f, 0.887385190233298650f,
+    0.887041493562639060f,
+  0.886697764277999840f, 0.886354002392018110f, 0.886010207917333760f,
+    0.885666380866586560f,
+  0.885322521252418610f, 0.884978629087472270f, 0.884634704384391180f,
+    0.884290747155821230f,
+  0.883946757414407980f, 0.883602735172799640f, 0.883258680443644530f,
+    0.882914593239592320f,
+  0.882570473573294660f, 0.882226321457403320f, 0.881882136904572400f,
+    0.881537919927456340f,
+  0.881193670538710450f, 0.880849388750992610f, 0.880505074576960370f,
+    0.880160728029273920f,
+  0.879816349120593590f, 0.879471937863580690f, 0.879127494270899090f,
+    0.878783018355212220f,
+  0.878438510129186170f, 0.878093969605486800f, 0.877749396796782770f,
+    0.877404791715742370f,
+  0.877060154375035710f, 0.876715484787334630f, 0.876370782965310900f,
+    0.876026048921639160f,
+  0.875681282668993700f, 0.875336484220050390f, 0.874991653587487090f,
+    0.874646790783981660f,
+  0.874301895822214290f, 0.873956968714865500f, 0.873612009474616810f,
+    0.873267018114152300f,
+  0.872921994646155390f, 0.872576939083312460f, 0.872231851438309840f,
+    0.871886731723835020f,
+  0.871541579952577750f, 0.871196396137227660f, 0.870851180290476810f,
+    0.870505932425017060f,
+  0.870160652553543020f, 0.869815340688749220f, 0.869469996843331370f,
+    0.869124621029987670f,
+  0.868779213261415610f, 0.868433773550315810f, 0.868088301909388680f,
+    0.867742798351335720f,
+  0.867397262888861100f, 0.867051695534668210f, 0.866706096301463340f,
+    0.866360465201952980f,
+  0.866014802248844420f, 0.865669107454847490f, 0.865323380832671800f,
+    0.864977622395029290f,
+  0.864631832154632240f, 0.864286010124194040f, 0.863940156316430170f,
+    0.863594270744056040f,
+  0.863248353419789670f, 0.862902404356348570f, 0.862556423566453230f,
+    0.862210411062823810f,
+  0.861864366858181910f, 0.861518290965251340f, 0.861172183396755500f,
+    0.860826044165420630f,
+  0.860479873283972910f, 0.860133670765139580f, 0.859787436621650360f,
+    0.859441170866234390f,
+  0.859094873511623840f, 0.858748544570550610f, 0.858402184055747750f,
+    0.858055791979950740f,
+  0.857709368355894840f, 0.857362913196317630f, 0.857016426513956930f,
+    0.856669908321551650f,
+  0.856323358631843170f, 0.855976777457572280f, 0.855630164811482460f,
+    0.855283520706317080f,
+  0.854936845154821930f, 0.854590138169742830f, 0.854243399763827020f,
+    0.853896629949823630f,
+  0.853549828740481690f, 0.853202996148552880f, 0.852856132186788910f,
+    0.852509236867942440f,
+  0.852162310204768740f, 0.851815352210022470f, 0.851468362896461110f,
+    0.851121342276842110f,
+  0.850774290363923820f, 0.850427207170467380f, 0.850080092709233130f,
+    0.849732946992984290f,
+  0.849385770034483680f, 0.849038561846496730f, 0.848691322441788910f,
+    0.848344051833126780f,
+  0.847996750033279350f, 0.847649417055015060f, 0.847302052911105160f,
+    0.846954657614320980f,
+  0.846607231177434640f, 0.846259773613221020f, 0.845912284934454140f,
+    0.845564765153910990f,
+  0.845217214284368690f, 0.844869632338605130f, 0.844522019329400630f,
+    0.844174375269535320f,
+  0.843826700171791620f, 0.843478994048952440f, 0.843131256913801420f,
+    0.842783488779124570f,
+  0.842435689657707650f, 0.842087859562339000f, 0.841739998505806610f,
+    0.841392106500900900f,
+  0.841044183560412770f, 0.840696229697133760f, 0.840348244923857960f,
+    0.840000229253379030f,
+  0.839652182698493290f, 0.839304105271996950f, 0.838955996986687550f,
+    0.838607857855364740f,
+  0.838259687890827830f, 0.837911487105878820f, 0.837563255513319780f,
+    0.837214993125953600f,
+  0.836866699956585690f, 0.836518376018021260f, 0.836170021323067610f,
+    0.835821635884532730f,
+  0.835473219715225040f, 0.835124772827955830f, 0.834776295235535540f,
+    0.834427786950777460f,
+  0.834079247986494690f, 0.833730678355502630f, 0.833382078070616820f,
+    0.833033447144653880f,
+  0.832684785590432690f, 0.832336093420771970f, 0.831987370648492710f,
+    0.831638617286416190f,
+  0.831289833347364620f, 0.830941018844162600f, 0.830592173789634240f,
+    0.830243298196606360f,
+  0.829894392077905720f, 0.829545455446360270f, 0.829196488314800080f,
+    0.828847490696055010f,
+  0.828498462602957340f, 0.828149404048339590f, 0.827800315045035150f,
+    0.827451195605879990f,
+  0.827102045743709160f, 0.826752865471360950f, 0.826403654801672770f,
+    0.826054413747485010f,
+  0.825705142321637720f, 0.825355840536972420f, 0.825006508406332490f,
+    0.824657145942561230f,
+  0.824307753158504460f, 0.823958330067008030f, 0.823608876680918760f,
+    0.823259393013085820f,
+  0.822909879076357930f, 0.822560334883586490f, 0.822210760447622980f,
+    0.821861155781319800f,
+  0.821511520897531660f, 0.821161855809112830f, 0.820812160528920360f,
+    0.820462435069811090f,
+  0.820112679444643060f, 0.819762893666276530f, 0.819413077747571440f,
+    0.819063231701390170f,
+  0.818713355540594880f, 0.818363449278050270f, 0.818013512926620940f,
+    0.817663546499172720f,
+  0.817313550008573640f, 0.816963523467691410f, 0.816613466889396070f,
+    0.816263380286557980f,
+  0.815913263672048310f, 0.815563117058740630f, 0.815212940459508210f,
+    0.814862733887226740f,
+  0.814512497354771830f, 0.814162230875020380f, 0.813811934460851430f,
+    0.813461608125143560f,
+  0.813111251880778150f, 0.812760865740636440f, 0.812410449717600570f,
+    0.812060003824555230f,
+  0.811709528074384460f, 0.811359022479975040f, 0.811008487054213360f,
+    0.810657921809988410f,
+  0.810307326760189020f, 0.809956701917705080f, 0.809606047295428950f,
+    0.809255362906252440f,
+  0.808904648763069890f, 0.808553904878775760f, 0.808203131266265420f,
+    0.807852327938436750f,
+  0.807501494908186900f, 0.807150632188415760f, 0.806799739792023240f,
+    0.806448817731910130f,
+  0.806097866020979660f, 0.805746884672134620f, 0.805395873698280360f,
+    0.805044833112322000f,
+  0.804693762927166100f, 0.804342663155721230f, 0.803991533810895500f,
+    0.803640374905599810f,
+  0.803289186452744390f, 0.802937968465242240f, 0.802586720956006250f,
+    0.802235443937950320f,
+  0.801884137423990890f, 0.801532801427043530f, 0.801181435960026780f,
+    0.800830041035858750f,
+  0.800478616667459010f, 0.800127162867749210f, 0.799775679649650460f,
+    0.799424167026086540f,
+  0.799072625009981330f, 0.798721053614259490f, 0.798369452851848020f,
+    0.798017822735673680f,
+  0.797666163278665570f, 0.797314474493752810f, 0.796962756393865600f,
+    0.796611008991936490f,
+  0.796259232300897350f, 0.795907426333682830f, 0.795555591103226930f,
+    0.795203726622466520f,
+  0.794851832904338360f, 0.794499909961779990f, 0.794147957807731400f,
+    0.793795976455132220f,
+  0.793443965916924570f, 0.793091926206050400f, 0.792739857335452710f,
+    0.792387759318077150f,
+  0.792035632166868230f, 0.791683475894773720f, 0.791331290514740830f,
+    0.790979076039718180f,
+  0.790626832482656310f, 0.790274559856505520f, 0.789922258174218570f,
+    0.789569927448748320f,
+  0.789217567693048520f, 0.788865178920075130f, 0.788512761142783790f,
+    0.788160314374132590f,
+  0.787807838627079260f, 0.787455333914584220f, 0.787102800249607550f,
+    0.786750237645110430f,
+  0.786397646114056490f, 0.786045025669408700f, 0.785692376324132690f,
+    0.785339698091194080f,
+  0.784986990983559170f, 0.784634255014197040f, 0.784281490196075850f,
+    0.783928696542166680f,
+  0.783575874065440270f, 0.783223022778868350f, 0.782870142695425320f,
+    0.782517233828084580f,
+  0.782164296189822530f, 0.781811329793615120f, 0.781458334652439630f,
+    0.781105310779275470f,
+  0.780752258187101480f, 0.780399176888899150f, 0.780046066897649550f,
+    0.779692928226336290f,
+  0.779339760887942880f, 0.778986564895453810f, 0.778633340261856040f,
+    0.778280087000135730f,
+  0.777926805123281830f, 0.777573494644283050f, 0.777220155576129220f,
+    0.776866787931812410f,
+  0.776513391724324210f, 0.776159966966658680f, 0.775806513671809860f,
+    0.775453031852772920f,
+  0.775099521522545020f, 0.774745982694123090f, 0.774392415380506400f,
+    0.774038819594694230f,
+  0.773685195349686940f, 0.773331542658487140f, 0.772977861534096640f,
+    0.772624151989520280f,
+  0.772270414037761980f, 0.771916647691828660f, 0.771562852964726710f,
+    0.771209029869463940f,
+  0.770855178419050050f, 0.770501298626494410f, 0.770147390504808960f,
+    0.769793454067005500f,
+  0.769439489326096850f, 0.769085496295098040f, 0.768731474987023660f,
+    0.768377425414890850f,
+  0.768023347591716640f, 0.767669241530518850f, 0.767315107244318060f,
+    0.766960944746133740f,
+  0.766606754048988260f, 0.766252535165903970f, 0.765898288109903900f,
+    0.765544012894013530f,
+  0.765189709531257760f, 0.764835378034664170f, 0.764481018417259680f,
+    0.764126630692073870f,
+  0.763772214872136200f, 0.763417770970477140f, 0.763063299000129260f,
+    0.762708798974124800f,
+  0.762354270905498450f, 0.761999714807284790f, 0.761645130692519490f,
+    0.761290518574240350f,
+  0.760935878465484720f, 0.760581210379292380f, 0.760226514328703140f,
+    0.759871790326757670f,
+  0.759517038386499090f, 0.759162258520969860f, 0.758807450743214760f,
+    0.758452615066278920f,
+  0.758097751503208020f, 0.757742860067050380f, 0.757387940770853360f,
+    0.757032993627667290f,
+  0.756678018650541630f, 0.756323015852528700f, 0.755967985246680520f,
+    0.755612926846050080f,
+  0.755257840663692730f, 0.754902726712663120f, 0.754547585006018600f,
+    0.754192415556816380f,
+  0.753837218378114460f, 0.753481993482973400f, 0.753126740884452970f,
+    0.752771460595615500f,
+  0.752416152629523330f, 0.752060816999239660f, 0.751705453717829930f,
+    0.751350062798359140f,
+  0.750994644253894730f, 0.750639198097504010f, 0.750283724342255320f,
+    0.749928223001219310f,
+  0.749572694087465850f, 0.749217137614067500f, 0.748861553594096340f,
+    0.748505942040627040f,
+  0.748150302966733790f, 0.747794636385492150f, 0.747438942309979870f,
+    0.747083220753273820f,
+  0.746727471728453770f, 0.746371695248599140f, 0.746015891326790470f,
+    0.745660059976110400f,
+  0.745304201209641030f, 0.744948315040467210f, 0.744592401481673270f,
+    0.744236460546344850f,
+  0.743880492247569580f, 0.743524496598434670f, 0.743168473612029980f,
+    0.742812423301444810f,
+  0.742456345679769810f, 0.742100240760097840f, 0.741744108555520860f,
+    0.741387949079133860f,
+  0.741031762344030790f, 0.740675548363308620f, 0.740319307150063780f,
+    0.739963038717393880f,
+  0.739606743078398690f, 0.739250420246177380f, 0.738894070233831800f,
+    0.738537693054463370f,
+  0.738181288721174830f, 0.737824857247070810f, 0.737468398645255490f,
+    0.737111912928835710f,
+  0.736755400110918000f, 0.736398860204609870f, 0.736042293223021060f,
+    0.735685699179260850f,
+  0.735329078086440880f, 0.734972429957672760f, 0.734615754806068890f,
+    0.734259052644744230f,
+  0.733902323486812610f, 0.733545567345390890f, 0.733188784233595240f,
+    0.732831974164544150f,
+  0.732475137151356370f, 0.732118273207151170f, 0.731761382345050280f,
+    0.731404464578174760f,
+  0.731047519919648340f, 0.730690548382594280f, 0.730333549980137110f,
+    0.729976524725403530f,
+  0.729619472631519270f, 0.729262393711613280f, 0.728905287978813600f,
+    0.728548155446249730f,
+  0.728190996127053180f, 0.727833810034354990f, 0.727476597181288540f,
+    0.727119357580987220f,
+  0.726762091246585200f, 0.726404798191218950f, 0.726047478428024420f,
+    0.725690131970139980f,
+  0.725332758830703360f, 0.724975359022855150f, 0.724617932559735390f,
+    0.724260479454485130f,
+  0.723902999720247850f, 0.723545493370166160f, 0.723187960417385530f,
+    0.722830400875050790f,
+  0.722472814756308090f, 0.722115202074305680f, 0.721757562842191060f,
+    0.721399897073114470f,
+  0.721042204780225960f, 0.720684485976676230f, 0.720326740675618530f,
+    0.719968968890205230f,
+  0.719611170633591480f, 0.719253345918932090f, 0.718895494759382860f,
+    0.718537617168101610f,
+  0.718179713158245800f, 0.717821782742975370f, 0.717463825935449550f,
+    0.717105842748830160f,
+  0.716747833196278770f, 0.716389797290958090f, 0.716031735046032900f,
+    0.715673646474667140f,
+  0.715315531590027700f, 0.714957390405280950f, 0.714599222933594240f,
+    0.714241029188137260f,
+  0.713882809182079030f, 0.713524562928591010f, 0.713166290440844450f,
+    0.712807991732011590f,
+  0.712449666815266890f, 0.712091315703784260f, 0.711732938410739810f,
+    0.711374534949309800f,
+  0.711016105332671340f, 0.710657649574003460f, 0.710299167686484930f,
+    0.709940659683296890f,
+  0.709582125577619790f, 0.709223565382636760f, 0.708864979111530680f,
+    0.708506366777485130f,
+  0.708147728393686340f, 0.707789063973319310f, 0.707430373529572170f,
+    0.707071657075632460f,
+  0.706712914624688770f, 0.706354146189931750f, 0.705995351784551530f,
+    0.705636531421740880f,
+  0.705277685114692020f, 0.704918812876598410f, 0.704559914720655490f,
+    0.704200990660058150f,
+  0.703842040708003820f, 0.703483064877689630f, 0.703124063182313690f,
+    0.702765035635076310f,
+  0.702405982249177160f, 0.702046903037818250f, 0.701687798014201110f,
+    0.701328667191529980f,
+  0.700969510583008600f, 0.700610328201841660f, 0.700251120061236020f,
+    0.699891886174398130f,
+  0.699532626554536630f, 0.699173341214860190f, 0.698814030168578240f,
+    0.698454693428902320f,
+  0.698095331009043640f, 0.697735942922215520f, 0.697376529181631400f,
+    0.697017089800505250f,
+  0.696657624792053730f, 0.696298134169492380f, 0.695938617946039510f,
+    0.695579076134912990f,
+  0.695219508749331800f, 0.694859915802517050f, 0.694500297307689140f,
+    0.694140653278070950f,
+  0.693780983726884790f, 0.693421288667355530f, 0.693061568112707690f,
+    0.692701822076166820f,
+  0.692342050570960430f, 0.691982253610315510f, 0.691622431207461700f,
+    0.691262583375628180f,
+  0.690902710128045050f, 0.690542811477944610f, 0.690182887438558710f,
+    0.689822938023121220f,
+  0.689462963244866330f, 0.689102963117028790f, 0.688742937652845550f,
+    0.688382886865552930f,
+  0.688022810768389670f, 0.687662709374594510f, 0.687302582697406850f,
+    0.686942430750068330f,
+  0.686582253545819920f, 0.686222051097905130f, 0.685861823419566700f,
+    0.685501570524050140f,
+  0.685141292424600310f, 0.684780989134463280f, 0.684420660666887120f,
+    0.684060307035119440f,
+  0.683699928252410110f, 0.683339524332008840f, 0.682979095287166160f,
+    0.682618641131135020f,
+  0.682258161877167370f, 0.681897657538517720f, 0.681537128128440470f,
+    0.681176573660190910f,
+  0.680815994147026320f, 0.680455389602203310f, 0.680094760038981280f,
+    0.679734105470619080f,
+  0.679373425910376310f, 0.679012721371515250f, 0.678651991867297080f,
+    0.678291237410985510f,
+  0.677930458015843620f, 0.677569653695137220f, 0.677208824462131490f,
+    0.676847970330092700f,
+  0.676487091312289350f, 0.676126187421989040f, 0.675765258672461950f,
+    0.675404305076978020f,
+  0.675043326648808170f, 0.674682323401225250f, 0.674321295347501510f,
+    0.673960242500911690f,
+  0.673599164874730370f, 0.673238062482232950f, 0.672876935336696900f,
+    0.672515783451398950f,
+  0.672154606839618470f, 0.671793405514634180f, 0.671432179489727110f,
+    0.671070928778178090f,
+  0.670709653393269050f, 0.670348353348283690f, 0.669987028656505170f,
+    0.669625679331219300f,
+  0.669264305385711360f, 0.668902906833267590f, 0.668541483687176590f,
+    0.668180035960725840f,
+  0.667818563667205600f, 0.667457066819905800f, 0.667095545432117240f,
+    0.666733999517132860f,
+  0.666372429088244790f, 0.666010834158747840f, 0.665649214741936390f,
+    0.665287570851105680f,
+  0.664925902499553190f, 0.664564209700575500f, 0.664202492467472090f,
+    0.663840750813541210f,
+  0.663478984752084110f, 0.663117194296401260f, 0.662755379459794350f,
+    0.662393540255567070f,
+  0.662031676697022450f, 0.661669788797465960f, 0.661307876570202740f,
+    0.660945940028538900f,
+  0.660583979185782600f, 0.660221994055241400f, 0.659859984650225110f,
+    0.659497950984043510f,
+  0.659135893070007080f, 0.658773810921428500f, 0.658411704551619570f,
+    0.658049573973894850f,
+  0.657687419201568260f, 0.657325240247955020f, 0.656963037126372160f,
+    0.656600809850135910f,
+  0.656238558432565400f, 0.655876282886978410f, 0.655513983226695960f,
+    0.655151659465038060f,
+  0.654789311615326050f, 0.654426939690883280f, 0.654064543705032310f,
+    0.653702123671098150f,
+  0.653339679602405470f, 0.652977211512280050f, 0.652614719414049580f,
+    0.652252203321041060f,
+  0.651889663246583930f, 0.651527099204007310f, 0.651164511206641320f,
+    0.650801899267818060f,
+  0.650439263400868990f, 0.650076603619127890f, 0.649713919935928420f,
+    0.649351212364604910f,
+  0.648988480918494040f, 0.648625725610931460f, 0.648262946455255510f,
+    0.647900143464803730f,
+  0.647537316652916140f, 0.647174466032932490f, 0.646811591618193350f,
+    0.646448693422041360f,
+  0.646085771457818310f, 0.645722825738868860f, 0.645359856278536980f,
+    0.644996863090167570f,
+  0.644633846187107620f, 0.644270805582703550f, 0.643907741290304040f,
+    0.643544653323257610f,
+  0.643181541694913480f, 0.642818406418622980f, 0.642455247507736860f,
+    0.642092064975608220f,
+  0.641728858835589830f, 0.641365629101035340f, 0.641002375785300500f,
+    0.640639098901740200f,
+  0.640275798463712080f, 0.639912474484572560f, 0.639549126977681070f,
+    0.639185755956396480f,
+  0.638822361434078330f, 0.638458943424088490f, 0.638095501939787920f,
+    0.637732036994540290f,
+  0.637368548601708660f, 0.637005036774657030f, 0.636641501526751590f,
+    0.636277942871357530f,
+  0.635914360821842830f, 0.635550755391574910f, 0.635187126593922070f,
+    0.634823474442254840f,
+  0.634459798949942640f, 0.634096100130357660f, 0.633732377996871770f,
+    0.633368632562857470f,
+  0.633004863841689520f, 0.632641071846741790f, 0.632277256591390780f,
+    0.631913418089012020f,
+  0.631549556352983710f, 0.631185671396683470f, 0.630821763233490040f,
+    0.630457831876783950f,
+  0.630093877339945260f, 0.629729899636356280f, 0.629365898779399080f,
+    0.629001874782456500f,
+  0.628637827658913300f, 0.628273757422153860f, 0.627909664085564810f,
+    0.627545547662532230f,
+  0.627181408166443410f, 0.626817245610687520f, 0.626453060008652860f,
+    0.626088851373730380f,
+  0.625724619719310480f, 0.625360365058784670f, 0.624996087405546350f,
+    0.624631786772988030f,
+  0.624267463174504880f, 0.623903116623491180f, 0.623538747133343780f,
+    0.623174354717459190f,
+  0.622809939389234460f, 0.622445501162069090f, 0.622081040049361490f,
+    0.621716556064512820f,
+  0.621352049220923570f, 0.620987519531995270f, 0.620622967011131400f,
+    0.620258391671734690f,
+  0.619893793527210410f, 0.619529172590963410f, 0.619164528876399280f,
+    0.618799862396925750f,
+  0.618435173165949760f, 0.618070461196880800f, 0.617705726503127720f,
+    0.617340969098100430f,
+  0.616976188995210780f, 0.616611386207870040f, 0.616246560749491690f,
+    0.615881712633488340f,
+  0.615516841873275490f, 0.615151948482267840f, 0.614787032473881110f,
+    0.614422093861533010f,
+  0.614057132658640590f, 0.613692148878623000f, 0.613327142534899510f,
+    0.612962113640889710f,
+  0.612597062210015750f, 0.612231988255698470f, 0.611866891791361560f,
+    0.611501772830428060f,
+  0.611136631386322020f, 0.610771467472469460f, 0.610406281102295440f,
+    0.610041072289227990f,
+  0.609675841046694030f, 0.609310587388121830f, 0.608945311326941520f,
+    0.608580012876582370f,
+  0.608214692050476290f, 0.607849348862054220f, 0.607483983324749510f,
+    0.607118595451995420f,
+  0.606753185257225550f, 0.606387752753876020f, 0.606022297955381760f,
+    0.605656820875180360f,
+  0.605291321526709060f, 0.604925799923405670f, 0.604560256078710220f,
+    0.604194690006061960f,
+  0.603829101718902580f, 0.603463491230673220f, 0.603097858554815790f,
+    0.602732203704774650f,
+  0.602366526693992930f, 0.602000827535916330f, 0.601635106243990190f,
+    0.601269362831660550f,
+  0.600903597312375640f, 0.600537809699582810f, 0.600172000006731770f,
+    0.599806168247271620f,
+  0.599440314434653620f, 0.599074438582328780f, 0.598708540703749010f,
+    0.598342620812368000f,
+  0.597976678921638860f, 0.597610715045016950f, 0.597244729195957500f,
+    0.596878721387916090f,
+  0.596512691634350830f, 0.596146639948718640f, 0.595780566344478960f,
+    0.595414470835091030f,
+  0.595048353434014630f, 0.594682214154711790f, 0.594316053010643270f,
+    0.593949870015273000f,
+  0.593583665182063740f, 0.593217438524479500f, 0.592851190055986300f,
+    0.592484919790049140f,
+  0.592118627740135460f, 0.591752313919712170f, 0.591385978342248260f,
+    0.591019621021212420f,
+  0.590653241970074180f, 0.590286841202305120f, 0.589920418731375800f,
+    0.589553974570759530f,
+  0.589187508733928890f, 0.588821021234357310f, 0.588454512085520460f,
+    0.588087981300892900f,
+  0.587721428893951850f, 0.587354854878173850f, 0.586988259267036350f,
+    0.586621642074019120f,
+  0.586255003312600500f, 0.585888342996261690f, 0.585521661138483250f,
+    0.585154957752746730f,
+  0.584788232852535560f, 0.584421486451332410f, 0.584054718562622140f,
+    0.583687929199888990f,
+  0.583321118376619710f, 0.582954286106300290f, 0.582587432402417840f,
+    0.582220557278461340f,
+  0.581853660747918780f, 0.581486742824280810f, 0.581119803521037650f,
+    0.580752842851679940f,
+  0.580385860829700780f, 0.580018857468592270f, 0.579651832781848730f,
+    0.579284786782964360f,
+  0.578917719485433800f, 0.578550630902754050f, 0.578183521048421080f,
+    0.577816389935933090f,
+  0.577449237578788300f, 0.577082063990485340f, 0.576714869184524860f,
+    0.576347653174406840f,
+  0.575980415973633590f, 0.575613157595706530f, 0.575245878054129520f,
+    0.574878577362406000f,
+  0.574511255534040030f, 0.574143912582537940f, 0.573776548521405030f,
+    0.573409163364148930f,
+  0.573041757124277180f, 0.572674329815297640f, 0.572306881450720390f,
+    0.571939412044054740f,
+  0.571571921608812320f, 0.571204410158504090f, 0.570836877706642270f,
+    0.570469324266740570f,
+  0.570101749852312100f, 0.569734154476872480f, 0.569366538153936560f,
+    0.568998900897020210f,
+  0.568631242719641270f, 0.568263563635316600f, 0.567895863657565500f,
+    0.567528142799906490f,
+  0.567160401075860410f, 0.566792638498947680f, 0.566424855082689470f,
+    0.566057050840608870f,
+  0.565689225786228160f, 0.565321379933072190f, 0.564953513294665140f,
+    0.564585625884531870f,
+  0.564217717716199550f, 0.563849788803194140f, 0.563481839159044150f,
+    0.563113868797277870f,
+  0.562745877731423820f, 0.562377865975012940f, 0.562009833541575080f,
+    0.561641780444642640f,
+  0.561273706697747450f, 0.560905612314422150f, 0.560537497308201240f,
+    0.560169361692618440f,
+  0.559801205481210040f, 0.559433028687510990f, 0.559064831325059240f,
+    0.558696613407391630f,
+  0.558328374948046320f, 0.557960115960563050f, 0.557591836458480870f,
+    0.557223536455341280f,
+  0.556855215964685120f, 0.556486875000054000f, 0.556118513574991650f,
+    0.555750131703040880f,
+  0.555381729397746880f, 0.555013306672654360f, 0.554644863541308600f,
+    0.554276400017257090f,
+  0.553907916114046440f, 0.553539411845225590f, 0.553170887224342820f,
+    0.552802342264947400f,
+  0.552433776980590490f, 0.552065191384822350f, 0.551696585491195710f,
+    0.551327959313262280f,
+  0.550959312864576220f, 0.550590646158691240f, 0.550221959209161620f,
+    0.549853252029543830f,
+  0.549484524633393480f, 0.549115777034268170f, 0.548747009245725500f,
+    0.548378221281323520f,
+  0.548009413154622370f, 0.547640584879181100f, 0.547271736468561530f,
+    0.546902867936324590f,
+  0.546533979296032200f, 0.546165070561248080f, 0.545796141745535150f,
+    0.545427192862458780f,
+  0.545058223925583670f, 0.544689234948475210f, 0.544320225944701200f,
+    0.543951196927828010f,
+  0.543582147911424560f, 0.543213078909059120f, 0.542843989934301940f,
+    0.542474881000723050f,
+  0.542105752121893050f, 0.541736603311384620f, 0.541367434582769480f,
+    0.540998245949621760f,
+  0.540629037425515050f, 0.540259809024023600f, 0.539890560758723770f,
+    0.539521292643190930f,
+  0.539152004691002770f, 0.538782696915736770f, 0.538413369330970610f,
+    0.538044021950284450f,
+  0.537674654787257180f, 0.537305267855470390f, 0.536935861168504670f,
+    0.536566434739941920f,
+  0.536196988583365510f, 0.535827522712358230f, 0.535458037140505110f,
+    0.535088531881390050f,
+  0.534719006948599860f, 0.534349462355720230f, 0.533979898116337950f,
+    0.533610314244041710f,
+  0.533240710752419080f, 0.532871087655060300f, 0.532501444965554960f,
+    0.532131782697493170f,
+  0.531762100864467290f, 0.531392399480068670f, 0.531022678557890980f,
+    0.530652938111527360f,
+  0.530283178154571710f, 0.529913398700619820f, 0.529543599763266700f,
+    0.529173781356109600f,
+  0.528803943492745180f, 0.528434086186771010f, 0.528064209451786560f,
+    0.527694313301390160f,
+  0.527324397749182720f, 0.526954462808764120f, 0.526584508493736840f,
+    0.526214534817702310f,
+  0.525844541794263210f, 0.525474529437023890f, 0.525104497759587900f,
+    0.524734446775560910f,
+  0.524364376498548390f, 0.523994286942156220f, 0.523624178119992400f,
+    0.523254050045663940f,
+  0.522883902732780290f, 0.522513736194950230f, 0.522143550445783310f,
+    0.521773345498891090f,
+  0.521403121367884030f, 0.521032878066375100f, 0.520662615607976660f,
+    0.520292334006301820f,
+  0.519922033274965560f, 0.519551713427582000f, 0.519181374477767470f,
+    0.518811016439137520f,
+  0.518440639325310040f, 0.518070243149902240f, 0.517699827926532130f,
+    0.517329393668819580f,
+  0.516958940390383700f, 0.516588468104845820f, 0.516217976825826600f,
+    0.515847466566947580f,
+  0.515476937341832310f, 0.515106389164103120f, 0.514735822047384990f,
+    0.514365236005302040f,
+  0.513994631051479240f, 0.513624007199543600f, 0.513253364463121090f,
+    0.512882702855839920f,
+  0.512512022391327980f, 0.512141323083213470f, 0.511770604945127050f,
+    0.511399867990697920f,
+  0.511029112233557960f, 0.510658337687338040f, 0.510287544365671140f,
+    0.509916732282189920f,
+  0.509545901450527690f, 0.509175051884319660f, 0.508804183597200140f,
+    0.508433296602805670f,
+  0.508062390914772230f, 0.507691466546736580f, 0.507320523512337470f,
+    0.506949561825212450f,
+  0.506578581499001590f, 0.506207582547344550f, 0.505836564983881190f,
+    0.505465528822253710f,
+  0.505094474076103310f, 0.504723400759073290f, 0.504352308884806750f,
+    0.503981198466947000f,
+  0.503610069519139780f, 0.503238922055029400f, 0.502867756088262840f,
+    0.502496571632486070f,
+  0.502125368701347050f, 0.501754147308493770f, 0.501382907467574190f,
+    0.501011649192238950f,
+  0.500640372496137020f, 0.500269077392920150f, 0.499897763896239410f,
+    0.499526432019746450f,
+  0.499155081777094940f, 0.498783713181937540f, 0.498412326247929250f,
+    0.498040920988724490f,
+  0.497669497417978280f, 0.497298055549347750f, 0.496926595396488870f,
+    0.496555116973059980f,
+  0.496183620292718900f, 0.495812105369124070f, 0.495440572215935850f,
+    0.495069020846813650f,
+  0.494697451275419140f, 0.494325863515413130f, 0.493954257580458580f,
+    0.493582633484217940f,
+  0.493210991240354450f, 0.492839330862533120f, 0.492467652364417970f,
+    0.492095955759675460f,
+  0.491724241061971320f, 0.491352508284972070f, 0.490980757442346090f,
+    0.490608988547760690f,
+  0.490237201614885710f, 0.489865396657390210f, 0.489493573688943970f,
+    0.489121732723218740f,
+  0.488749873773885120f, 0.488377996854616250f, 0.488006101979084450f,
+    0.487634189160962910f,
+  0.487262258413926560f, 0.486890309751649490f, 0.486518343187807900f,
+    0.486146358736077200f,
+  0.485774356410135000f, 0.485402336223658360f, 0.485030298190324950f,
+    0.484658242323814380f,
+  0.484286168637805270f, 0.483914077145978560f, 0.483541967862014480f,
+    0.483169840799594130f,
+  0.482797695972400300f, 0.482425533394114920f, 0.482053353078422120f,
+    0.481681155039005550f,
+  0.481308939289549380f, 0.480936705843739820f, 0.480564454715261990f,
+    0.480192185917803270f,
+  0.479819899465050160f, 0.479447595370691370f, 0.479075273648415010f,
+    0.478702934311909910f,
+  0.478330577374866780f, 0.477958202850975230f, 0.477585810753927250f,
+    0.477213401097414220f,
+  0.476840973895128200f, 0.476468529160763100f, 0.476096066908011760f,
+    0.475723587150569390f,
+  0.475351089902130650f, 0.474978575176390750f, 0.474606042987046840f,
+    0.474233493347795020f,
+  0.473860926272333670f, 0.473488341774360670f, 0.473115739867574380f,
+    0.472743120565675250f,
+  0.472370483882362520f, 0.471997829831337810f, 0.471625158426301700f,
+    0.471252469680957190f,
+  0.470879763609006460f, 0.470507040224152460f, 0.470134299540099940f,
+    0.469761541570552780f,
+  0.469388766329217000f, 0.469015973829798090f, 0.468643164086002100f,
+    0.468270337111537040f,
+  0.467897492920109850f, 0.467524631525429830f, 0.467151752941205530f,
+    0.466778857181146260f,
+  0.466405944258963200f, 0.466033014188366350f, 0.465660066983068220f,
+    0.465287102656780530f,
+  0.464914121223215740f, 0.464541122696088100f, 0.464168107089110940f,
+    0.463795074415999760f,
+  0.463422024690469060f, 0.463048957926235630f, 0.462675874137015720f,
+    0.462302773336526080f,
+  0.461929655538485470f, 0.461556520756611410f, 0.461183369004623920f,
+    0.460810200296242310f,
+  0.460437014645186440f, 0.460063812065178160f, 0.459690592569938270f,
+    0.459317356173189750f,
+  0.458944102888655060f, 0.458570832730057170f, 0.458197545711121090f,
+    0.457824241845570630f,
+  0.457450921147131930f, 0.457077583629530550f, 0.456704229306492570f,
+    0.456330858191746010f,
+  0.455957470299017840f, 0.455584065642037350f, 0.455210644234532610f,
+    0.454837206090234200f,
+  0.454463751222871910f, 0.454090279646176210f, 0.453716791373879380f,
+    0.453343286419712720f,
+  0.452969764797409750f, 0.452596226520703360f, 0.452222671603327130f,
+    0.451849100059016350f,
+  0.451475511901505420f, 0.451101907144530910f, 0.450728285801828830f,
+    0.450354647887135640f,
+  0.449980993414189900f, 0.449607322396728900f, 0.449233634848492320f,
+    0.448859930783219170f,
+  0.448486210214649020f, 0.448112473156523420f, 0.447738719622582710f,
+    0.447364949626569590f,
+  0.446991163182225700f, 0.446617360303294910f, 0.446243541003520480f,
+    0.445869705296646270f,
+  0.445495853196417930f, 0.445121984716580210f, 0.444748099870879880f,
+    0.444374198673063330f,
+  0.444000281136877280f, 0.443626347276070590f, 0.443252397104390790f,
+    0.442878430635587910f,
+  0.442504447883411090f, 0.442130448861610240f, 0.441756433583937120f,
+    0.441382402064142250f,
+  0.441008354315978680f, 0.440634290353198510f, 0.440260210189554690f,
+    0.439886113838801880f,
+  0.439512001314693700f, 0.439137872630986080f, 0.438763727801433690f,
+    0.438389566839793740f,
+  0.438015389759822630f, 0.437641196575277220f, 0.437266987299916590f,
+    0.436892761947498260f,
+  0.436518520531782470f, 0.436144263066528480f, 0.435769989565496290f,
+    0.435395700042447710f,
+  0.435021394511143410f, 0.434647072985346380f, 0.434272735478819010f,
+    0.433898382005324050f,
+  0.433524012578626440f, 0.433149627212489670f, 0.432775225920679740f,
+    0.432400808716961900f,
+  0.432026375615101930f, 0.431651926628867530f, 0.431277461772025310f,
+    0.430902981058344070f,
+  0.430528484501591540f, 0.430153972115537800f, 0.429779443913952170f,
+    0.429404899910604490f,
+  0.429030340119266550f, 0.428655764553708960f, 0.428281173227704760f,
+    0.427906566155026040f,
+  0.427531943349445720f, 0.427157304824738350f, 0.426782650594677570f,
+    0.426407980673039090f,
+  0.426033295073598160f, 0.425658593810130330f, 0.425283876896413280f,
+    0.424909144346223290f,
+  0.424534396173339160f, 0.424159632391538870f, 0.423784853014600950f,
+    0.423410058056305830f,
+  0.423035247530432810f, 0.422660421450763490f, 0.422285579831078230f,
+    0.421910722685159720f,
+  0.421535850026790060f, 0.421160961869751720f, 0.420786058227829220f,
+    0.420411139114805770f,
+  0.420036204544466940f, 0.419661254530597550f, 0.419286289086983070f,
+    0.418911308227410740f,
+  0.418536311965666650f, 0.418161300315539220f, 0.417786273290816130f,
+    0.417411230905285650f,
+  0.417036173172737830f, 0.416661100106961610f, 0.416286011721748230f,
+    0.415910908030888200f,
+  0.415535789048172620f, 0.415160654787394280f, 0.414785505262345030f,
+    0.414410340486818910f,
+  0.414035160474608700f, 0.413659965239509710f, 0.413284754795316230f,
+    0.412909529155823300f,
+  0.412534288334827750f, 0.412159032346125280f, 0.411783761203513790f,
+    0.411408474920790520f,
+  0.411033173511753220f, 0.410657856990201580f, 0.410282525369933980f,
+    0.409907178664751180f,
+  0.409531816888453190f, 0.409156440054840590f, 0.408781048177715660f,
+    0.408405641270879690f,
+  0.408030219348136270f, 0.407654782423288010f, 0.407279330510138260f,
+    0.406903863622492260f,
+  0.406528381774153900f, 0.406152884978929480f, 0.405777373250624070f,
+    0.405401846603045010f,
+  0.405026305049998980f, 0.404650748605293040f, 0.404275177282736260f,
+    0.403899591096136380f,
+  0.403523990059303620f, 0.403148374186047210f, 0.402772743490177110f,
+    0.402397097985504990f,
+  0.402021437685841480f, 0.401645762604999350f, 0.401270072756790610f,
+    0.400894368155027990f,
+  0.400518648813525830f, 0.400142914746097480f, 0.399767165966558420f,
+    0.399391402488723400f,
+  0.399015624326407800f, 0.398639831493428740f, 0.398264024003602220f,
+    0.397888201870746420f,
+  0.397512365108678430f, 0.397136513731217500f, 0.396760647752182230f,
+    0.396384767185391620f,
+  0.396008872044666730f, 0.395632962343827170f, 0.395257038096694990f,
+    0.394881099317091370f,
+  0.394505146018838130f, 0.394129178215758820f, 0.393753195921675850f,
+    0.393377199150413860f,
+  0.393001187915796750f, 0.392625162231649010f, 0.392249122111796800f,
+    0.391873067570065240f,
+  0.391496998620281590f, 0.391120915276272410f, 0.390744817551864850f,
+    0.390368705460887750f,
+  0.389992579017168830f, 0.389616438234538010f, 0.389240283126824070f,
+    0.388864113707858060f,
+  0.388487929991470140f, 0.388111731991491180f, 0.387735519721753690f,
+    0.387359293196089140f,
+  0.386983052428331030f, 0.386606797432312350f, 0.386230528221866430f,
+    0.385854244810828530f,
+  0.385477947213032580f, 0.385101635442314900f, 0.384725309512510880f,
+    0.384348969437456610f,
+  0.383972615230989860f, 0.383596246906947210f, 0.383219864479167560f,
+    0.382843467961488940f,
+  0.382467057367749940f, 0.382090632711791060f, 0.381714194007451380f,
+    0.381337741268572390f,
+  0.380961274508994250f, 0.380584793742559550f, 0.380208298983109930f,
+    0.379831790244487540f,
+  0.379455267540536490f, 0.379078730885099520f, 0.378702180292021630f,
+    0.378325615775147170f,
+  0.377949037348320800f, 0.377572445025389230f, 0.377195838820197690f,
+    0.376819218746593910f,
+  0.376442584818424570f, 0.376065937049537060f, 0.375689275453780500f,
+    0.375312600045002780f,
+  0.374935910837054080f, 0.374559207843783660f, 0.374182491079041500f,
+    0.373805760556679190f,
+  0.373429016290547200f, 0.373052258294498230f, 0.372675486582383640f,
+    0.372298701168057190f,
+  0.371921902065371730f, 0.371545089288180640f, 0.371168262850339210f,
+    0.370791422765701320f,
+  0.370414569048123140f, 0.370037701711460170f, 0.369660820769568240f,
+    0.369283926236305070f,
+  0.368907018125527120f, 0.368530096451093140f, 0.368153161226860980f,
+    0.367776212466689010f,
+  0.367399250184437480f, 0.367022274393965340f, 0.366645285109133750f,
+    0.366268282343803150f,
+  0.365891266111834370f, 0.365514236427090080f, 0.365137193303431750f,
+    0.364760136754723020f,
+  0.364383066794826350f, 0.364005983437606320f, 0.363628886696926890f,
+    0.363251776586652310f,
+  0.362874653120648700f, 0.362497516312780990f, 0.362120366176916230f,
+    0.361743202726920790f,
+  0.361366025976661450f, 0.360988835940006750f, 0.360611632630824020f,
+    0.360234416062982840f,
+  0.359857186250351960f, 0.359479943206800550f, 0.359102686946199680f,
+    0.358725417482419150f,
+  0.358348134829330870f, 0.357970839000806010f, 0.357593530010716310f,
+    0.357216207872935120f,
+  0.356838872601334680f, 0.356461524209789380f, 0.356084162712172360f,
+    0.355706788122359060f,
+  0.355329400454223950f, 0.354951999721642100f, 0.354574585938490280f,
+    0.354197159118644080f,
+  0.353819719275981330f, 0.353442266424378930f, 0.353064800577714280f,
+    0.352687321749866610f,
+  0.352309829954713830f, 0.351932325206136210f, 0.351554807518012990f,
+    0.351177276904224070f,
+  0.350799733378650890f, 0.350422176955173910f, 0.350044607647675640f,
+    0.349667025470037810f,
+  0.349289430436142520f, 0.348911822559873850f, 0.348534201855114360f,
+    0.348156568335749040f,
+  0.347778922015661520f, 0.347401262908737570f, 0.347023591028862320f,
+    0.346645906389921150f,
+  0.346268209005801410f, 0.345890498890388980f, 0.345512776057572080f,
+    0.345135040521238170f,
+  0.344757292295274910f, 0.344379531393571970f, 0.344001757830017680f,
+    0.343623971618502560f,
+  0.343246172772916250f, 0.342868361307148980f, 0.342490537235092600f,
+    0.342112700570637750f,
+  0.341734851327677280f, 0.341356989520103240f, 0.340979115161808070f,
+    0.340601228266685980f,
+  0.340223328848629880f, 0.339845416921535030f, 0.339467492499295200f,
+    0.339089555595806560f,
+  0.338711606224964210f, 0.338333644400663940f, 0.337955670136803170f,
+    0.337577683447278010f,
+  0.337199684345986910f, 0.336821672846827290f, 0.336443648963697160f,
+    0.336065612710496290f,
+  0.335687564101123050f, 0.335309503149478110f, 0.334931429869461230f,
+    0.334553344274972690f,
+  0.334175246379914470f, 0.333797136198187240f, 0.333419013743693980f,
+    0.333040879030336690f,
+  0.332662732072017800f, 0.332284572882641680f, 0.331906401476111280f,
+    0.331528217866331690f,
+  0.331150022067206780f, 0.330771814092642610f, 0.330393593956544440f,
+    0.330015361672817750f,
+  0.329637117255370090f, 0.329258860718107450f, 0.328880592074938190f,
+    0.328502311339769700f,
+  0.328124018526509800f, 0.327745713649068180f, 0.327367396721353070f,
+    0.326989067757275040f,
+  0.326610726770743760f, 0.326232373775669270f, 0.325854008785963320f,
+    0.325475631815536570f,
+  0.325097242878301660f, 0.324718841988170470f, 0.324340429159055250f,
+    0.323962004404870050f,
+  0.323583567739527570f, 0.323205119176942720f, 0.322826658731029110f,
+    0.322448186415702550f,
+  0.322069702244877910f, 0.321691206232470550f, 0.321312698392397570f,
+    0.320934178738574720f,
+  0.320555647284919980f, 0.320177104045350440f, 0.319798549033783570f,
+    0.319419982264138650f,
+  0.319041403750333630f, 0.318662813506288670f, 0.318284211545923010f,
+    0.317905597883156250f,
+  0.317526972531909870f, 0.317148335506103940f, 0.316769686819660780f,
+    0.316391026486501690f,
+  0.316012354520548600f, 0.315633670935725030f, 0.315254975745953180f,
+    0.314876268965157470f,
+  0.314497550607261090f, 0.314118820686189180f, 0.313740079215866160f,
+    0.313361326210216840f,
+  0.312982561683167790f, 0.312603785648644220f, 0.312224998120573420f,
+    0.311846199112882030f,
+  0.311467388639496860f, 0.311088566714346650f, 0.310709733351358600f,
+    0.310330888564462340f,
+  0.309952032367586390f, 0.309573164774659850f, 0.309194285799613390f,
+    0.308815395456376430f,
+  0.308436493758880660f, 0.308057580721056660f, 0.307678656356835560f,
+    0.307299720680150270f,
+  0.306920773704932260f, 0.306541815445115160f, 0.306162845914631390f,
+    0.305783865127415400f,
+  0.305404873097400780f, 0.305025869838521590f, 0.304646855364713530f,
+    0.304267829689911010f,
+  0.303888792828050650f, 0.303509744793068030f, 0.303130685598899270f,
+    0.302751615259482190f,
+  0.302372533788753170f, 0.301993441200650910f, 0.301614337509113100f,
+    0.301235222728077840f,
+  0.300856096871485010f, 0.300476959953273060f, 0.300097811987382670f,
+    0.299718652987753580f,
+  0.299339482968325970f, 0.298960301943041680f, 0.298581109925841300f,
+    0.298201906930667390f,
+  0.297822692971461410f, 0.297443468062166820f, 0.297064232216726120f,
+    0.296684985449082390f,
+  0.296305727773180260f, 0.295926459202963120f, 0.295547179752376430f,
+    0.295167889435364820f,
+  0.294788588265873170f, 0.294409276257848300f, 0.294029953425235520f,
+    0.293650619781982260f,
+  0.293271275342035120f, 0.292891920119341120f, 0.292512554127848930f,
+    0.292133177381505850f,
+  0.291753789894261320f, 0.291374391680063520f, 0.290994982752862730f,
+    0.290615563126608250f,
+  0.290236132815249790f, 0.289856691832738880f, 0.289477240193025510f,
+    0.289097777910061970f,
+  0.288718304997799550f, 0.288338821470189910f, 0.287959327341186510f,
+    0.287579822624741350f,
+  0.287200307334808670f, 0.286820781485341620f, 0.286441245090293950f,
+    0.286061698163620930f,
+  0.285682140719276560f, 0.285302572771216960f, 0.284922994333397350f,
+    0.284543405419773240f,
+  0.284163806044301910f, 0.283784196220939370f, 0.283404575963643550f,
+    0.283024945286371230f,
+  0.282645304203081090f, 0.282265652727731130f, 0.281885990874279570f,
+    0.281506318656686290f,
+  0.281126636088910030f, 0.280746943184911340f, 0.280367239958650150f,
+    0.279987526424086530f,
+  0.279607802595182420f, 0.279228068485898210f, 0.278848324110196550f,
+    0.278468569482039130f,
+  0.278088804615388040f, 0.277709029524206950f, 0.277329244222458250f,
+    0.276949448724106480f,
+  0.276569643043115150f, 0.276189827193448200f, 0.275810001189071290f,
+    0.275430165043948570f,
+  0.275050318772046500f, 0.274670462387330010f, 0.274290595903766200f,
+    0.273910719335321300f,
+  0.273530832695961790f, 0.273150935999655950f, 0.272771029260370560f,
+    0.272391112492074590f,
+  0.272011185708736060f, 0.271631248924323390f, 0.271251302152806570f,
+    0.270871345408154380f,
+  0.270491378704337540f, 0.270111402055325910f, 0.269731415475089780f,
+    0.269351418977600950f,
+  0.268971412576829990f, 0.268591396286749500f, 0.268211370121331170f,
+    0.267831334094547010f,
+  0.267451288220370730f, 0.267071232512774700f, 0.266691166985733360f,
+    0.266311091653219700f,
+  0.265931006529208920f, 0.265550911627675250f, 0.265170806962593210f,
+    0.264790692547939020f,
+  0.264410568397687560f, 0.264030434525815760f, 0.263650290946299660f,
+    0.263270137673115630f,
+  0.262889974720241610f, 0.262509802101654310f, 0.262129619831332370f,
+    0.261749427923253670f,
+  0.261369226391396310f, 0.260989015249740050f, 0.260608794512263380f,
+    0.260228564192946710f,
+  0.259848324305769600f, 0.259468074864711960f, 0.259087815883755400f,
+    0.258707547376880010f,
+  0.258327269358068100f, 0.257946981841300490f, 0.257566684840560170f,
+    0.257186378369829110f,
+  0.256806062443089680f, 0.256425737074325920f, 0.256045402277520320f,
+    0.255665058066657680f,
+  0.255284704455721660f, 0.254904341458696390f, 0.254523969089567590f,
+    0.254143587362319620f,
+  0.253763196290938850f, 0.253382795889410710f, 0.253002386171721110f,
+    0.252621967151857420f,
+  0.252241538843805680f, 0.251861101261554090f, 0.251480654419089730f,
+    0.251100198330400150f,
+  0.250719733009474530f, 0.250339258470300590f, 0.249958774726868170f,
+    0.249578281793165680f,
+  0.249197779683183660f, 0.248817268410911650f, 0.248436747990339490f,
+    0.248056218435458720f,
+  0.247675679760259450f, 0.247295131978733870f, 0.246914575104873220f,
+    0.246534009152669040f,
+  0.246153434136114490f, 0.245772850069201410f, 0.245392256965923620f,
+    0.245011654840274010f,
+  0.244631043706245800f, 0.244250423577833860f, 0.243869794469031620f,
+    0.243489156393834590f,
+  0.243108509366237320f, 0.242727853400234670f, 0.242347188509823150f,
+    0.241966514708997830f,
+  0.241585832011755900f, 0.241205140432093070f, 0.240824439984007180f,
+    0.240443730681495050f,
+  0.240063012538553830f, 0.239682285569182310f, 0.239301549787377890f,
+    0.238920805207139960f,
+  0.238540051842467020f, 0.238159289707357810f, 0.237778518815812740f,
+    0.237397739181830820f,
+  0.237016950819413100f, 0.236636153742559610f, 0.236255347965270780f,
+    0.235874533501548580f,
+  0.235493710365393630f, 0.235112878570808560f, 0.234732038131795020f,
+    0.234351189062355030f,
+  0.233970331376492150f, 0.233589465088208580f, 0.233208590211508550f,
+    0.232827706760394850f,
+  0.232446814748872410f, 0.232065914190945020f, 0.231685005100616930f,
+    0.231304087491893930f,
+  0.230923161378780380f, 0.230542226775282770f, 0.230161283695406500f,
+    0.229780332153157300f,
+  0.229399372162542610f, 0.229018403737568290f, 0.228637426892242400f,
+    0.228256441640571880f,
+  0.227875447996564060f, 0.227494445974227850f, 0.227113435587570770f,
+    0.226732416850602300f,
+  0.226351389777330990f, 0.225970354381765690f, 0.225589310677916880f,
+    0.225208258679793520f,
+  0.224827198401406690f, 0.224446129856766040f, 0.224065053059883250f,
+    0.223683968024768950f,
+  0.223302874765434120f, 0.222921773295891380f, 0.222540663630151820f,
+    0.222159545782228660f,
+  0.221778419766134050f, 0.221397285595880480f, 0.221016143285482050f,
+    0.220634992848951380f,
+  0.220253834300303180f, 0.219872667653551100f, 0.219491492922709110f,
+    0.219110310121792800f,
+  0.218729119264816280f, 0.218347920365795780f, 0.217966713438746380f,
+    0.217585498497683580f,
+  0.217204275556624420f, 0.216823044629584520f, 0.216441805730581500f,
+    0.216060558873631570f,
+  0.215679304072752960f, 0.215298041341962870f, 0.214916770695278810f,
+    0.214535492146719880f,
+  0.214154205710303750f, 0.213772911400050090f, 0.213391609229977570f,
+    0.213010299214105140f,
+  0.212628981366453330f, 0.212247655701041290f, 0.211866322231890090f,
+    0.211484980973019880f,
+  0.211103631938451000f, 0.210722275142205480f, 0.210340910598303870f,
+    0.209959538320768660f,
+  0.209578158323621420f, 0.209196770620883960f, 0.208815375226579670f,
+    0.208433972154730530f,
+  0.208052561419360520f, 0.207671143034492080f, 0.207289717014149830f,
+    0.206908283372357230f,
+  0.206526842123138070f, 0.206145393280517730f, 0.205763936858520150f,
+    0.205382472871171230f,
+  0.205001001332495910f, 0.204619522256519300f, 0.204238035657268250f,
+    0.203856541548768030f,
+  0.203475039945045950f, 0.203093530860128300f, 0.202712014308041620f,
+    0.202330490302814110f,
+  0.201948958858472420f, 0.201567419989045200f, 0.201185873708560170f,
+    0.200804320031045230f,
+  0.200422758970529910f, 0.200041190541042220f, 0.199659614756612230f,
+    0.199278031631268500f,
+  0.198896441179041650f, 0.198514843413961220f, 0.198133238350057030f,
+    0.197751626001360480f,
+  0.197370006381901520f, 0.196988379505712050f, 0.196606745386822960f,
+    0.196225104039265410f,
+  0.195843455477072190f, 0.195461799714274460f, 0.195080136764905570f,
+    0.194698466642997730f,
+  0.194316789362583340f, 0.193935104937696560f, 0.193553413382369890f,
+    0.193171714710637930f,
+  0.192790008936534220f, 0.192408296074092570f, 0.192026576137348330f,
+    0.191644849140335360f,
+  0.191263115097089540f, 0.190881374021645320f, 0.190499625928039040f,
+    0.190117870830306100f,
+  0.189736108742482030f, 0.189354339678604100f, 0.188972563652707950f,
+    0.188590780678831250f,
+  0.188208990771010640f, 0.187827193943283040f, 0.187445390209686870f,
+    0.187063579584259070f,
+  0.186681762081038650f, 0.186299937714063470f, 0.185918106497371700f,
+    0.185536268445003070f,
+  0.185154423570995760f, 0.184772571889390000f, 0.184390713414225000f,
+    0.184008848159540110f,
+  0.183626976139376310f, 0.183245097367773090f, 0.182863211858771880f,
+    0.182481319626412670f,
+  0.182099420684737420f, 0.181717515047787020f, 0.181335602729602590f,
+    0.180953683744226880f,
+  0.180571758105701030f, 0.180189825828068250f, 0.179807886925370670f,
+    0.179425941411650660f,
+  0.179043989300952110f, 0.178662030607317450f, 0.178280065344791100f,
+    0.177898093527416370f,
+  0.177516115169236820f, 0.177134130284297610f, 0.176752138886642350f,
+    0.176370140990316640f,
+  0.175988136609365020f, 0.175606125757832240f, 0.175224108449764660f,
+    0.174842084699207030f,
+  0.174460054520206240f, 0.174078017926807490f, 0.173695974933058080f,
+    0.173313925553004180f,
+  0.172931869800692250f, 0.172549807690170230f, 0.172167739235484620f,
+    0.171785664450683800f,
+  0.171403583349815180f, 0.171021495946926340f, 0.170639402256066410f,
+    0.170257302291283000f,
+  0.169875196066625710f, 0.169493083596143100f, 0.169110964893883830f,
+    0.168728839973898290f,
+  0.168346708850235140f, 0.167964571536945220f, 0.167582428048078130f,
+    0.167200278397683750f,
+  0.166818122599813570f, 0.166435960668517400f, 0.166053792617847200f,
+    0.165671618461853270f,
+  0.165289438214587970f, 0.164907251890102520f, 0.164525059502448390f,
+    0.164142861065678550f,
+  0.163760656593844480f, 0.163378446100999640f, 0.162996229601196390f,
+    0.162614007108487250f,
+  0.162231778636926370f, 0.161849544200566300f, 0.161467303813461580f,
+    0.161085057489665670f,
+  0.160702805243232240f, 0.160320547088216470f, 0.159938283038672050f,
+    0.159556013108654580f,
+  0.159173737312218650f, 0.158791455663418930f, 0.158409168176311760f,
+    0.158026874864951870f,
+  0.157644575743395960f, 0.157262270825699210f, 0.156879960125918730f,
+    0.156497643658110590f,
+  0.156115321436331000f, 0.155732993474637760f, 0.155350659787087090f,
+    0.154968320387737170f,
+  0.154585975290645110f, 0.154203624509868190f, 0.153821268059465250f,
+    0.153438905953493550f,
+  0.153056538206012340f, 0.152674164831079730f, 0.152291785842754070f,
+    0.151909401255095250f,
+  0.151527011082161540f, 0.151144615338013210f, 0.150762214036709470f,
+    0.150379807192309620f,
+  0.149997394818874590f, 0.149614976930463660f, 0.149232553541138180f,
+    0.148850124664957870f,
+  0.148467690315984390f, 0.148085250508278370f, 0.147702805255900570f,
+    0.147320354572913260f,
+  0.146937898473377210f, 0.146555436971355090f, 0.146172970080908520f,
+    0.145790497816099230f,
+  0.145408020190990560f, 0.145025537219644170f, 0.144643048916123810f,
+    0.144260555294492000f,
+  0.143878056368811510f, 0.143495552153146630f, 0.143113042661560050f,
+    0.142730527908116440f,
+  0.142348007906879320f, 0.141965482671912420f, 0.141582952217280980f,
+    0.141200416557048680f,
+  0.140817875705281120f, 0.140435329676042390f, 0.140052778483398480f,
+    0.139670222141414250f,
+  0.139287660664154770f, 0.138905094065686600f, 0.138522522360074780f,
+    0.138139945561386200f,
+  0.137757363683686740f, 0.137374776741042340f, 0.136992184747520560f,
+    0.136609587717187310f,
+  0.136226985664110460f, 0.135844378602356760f, 0.135461766545993150f,
+    0.135079149509088060f,
+  0.134696527505708320f, 0.134313900549922760f, 0.133931268655799020f,
+    0.133548631837404950f,
+  0.133165990108809860f, 0.132783343484081580f, 0.132400691977289760f,
+    0.132018035602502530f,
+  0.131635374373789940f, 0.131252708305220960f, 0.130870037410864640f,
+    0.130487361704791580f,
+  0.130104681201070800f, 0.129721995913773260f, 0.129339305856968730f,
+    0.128956611044727220f,
+  0.128573911491120210f, 0.128191207210217570f, 0.127808498216091110f,
+    0.127425784522811530f,
+  0.127043066144449680f, 0.126660343095077900f, 0.126277615388766920f,
+    0.125894883039589430f,
+  0.125512146061616980f, 0.125129404468921260f, 0.124746658275575490f,
+    0.124363907495651240f,
+  0.123981152143222060f, 0.123598392232359880f, 0.123215627777138580f,
+    0.122832858791630880f,
+  0.122450085289909640f, 0.122067307286049230f, 0.121684524794122440f,
+    0.121301737828203960f,
+  0.120918946402367330f, 0.120536150530686250f, 0.120153350227235940f,
+    0.119770545506089950f,
+  0.119387736381323830f, 0.119004922867011920f, 0.118622104977228730f,
+    0.118239282726050290f,
+  0.117856456127550970f, 0.117473625195807100f, 0.117090789944893860f,
+    0.116707950388886520f,
+  0.116325106541861910f, 0.115942258417895240f, 0.115559406031063570f,
+    0.115176549395442460f,
+  0.114793688525109290f, 0.114410823434140360f, 0.114027954136612060f,
+    0.113645080646602280f,
+  0.113262202978187320f, 0.112879321145445350f, 0.112496435162453430f,
+    0.112113545043288730f,
+  0.111730650802029900f, 0.111347752452754000f, 0.110964850009539970f,
+    0.110581943486465610f,
+  0.110199032897608850f, 0.109816118257049110f, 0.109433199578864170f,
+    0.109050276877133770f,
+  0.108667350165936400f, 0.108284419459350770f, 0.107901484771457020f,
+    0.107518546116333660f,
+  0.107135603508061170f, 0.106752656960718350f, 0.106369706488385940f,
+    0.105986752105143480f,
+  0.105603793825070680f, 0.105220831662248700f, 0.104837865630757090f,
+    0.104454895744677270f,
+  0.104071922018089540f, 0.103688944465074300f, 0.103305963099713400f,
+    0.102922977936087120f,
+  0.102539988988277600f, 0.102156996270365800f, 0.101773999796432830f,
+    0.101390999580561250f,
+  0.101007995636832020f, 0.100624987979327970f, 0.100241976622130760f,
+    0.099858961579322170f,
+  0.099475942864985456f, 0.099092920493202258f, 0.098709894478056073f,
+    0.098326864833628791f,
+  0.097943831574004214f, 0.097560794713264939f, 0.097177754265493674f,
+    0.096794710244774623f,
+  0.096411662665190329f, 0.096028611540825232f, 0.095645556885762609f,
+    0.095262498714085819f,
+  0.094879437039879722f, 0.094496371877227495f, 0.094113303240214247f,
+    0.093730231142923864f,
+  0.093347155599440373f, 0.092964076623849271f, 0.092580994230234359f,
+    0.092197908432681386f,
+  0.091814819245274432f, 0.091431726682099479f, 0.091048630757241303f,
+    0.090665531484784803f,
+  0.090282428878816323f, 0.089899322953420582f, 0.089516213722684160f,
+    0.089133101200692441f,
+  0.088749985401530951f, 0.088366866339286629f, 0.087983744028044805f,
+    0.087600618481892656f,
+  0.087217489714916191f, 0.086834357741201490f, 0.086451222574836131f,
+    0.086068084229906014f,
+  0.085684942720498897f, 0.085301798060701386f, 0.084918650264600160f,
+    0.084535499346283349f,
+  0.084152345319837438f, 0.083769188199350780f, 0.083386027998910095f,
+    0.083002864732603973f,
+  0.082619698414519799f, 0.082236529058745025f, 0.081853356679368619f,
+    0.081470181290477811f,
+  0.081087002906161790f, 0.080703821540508452f, 0.080320637207605849f,
+    0.079937449921543474f,
+  0.079554259696409127f, 0.079171066546292510f, 0.078787870485282088f,
+    0.078404671527466441f,
+  0.078021469686935602f, 0.077638264977777913f, 0.077255057414083589f,
+    0.076871847009941652f,
+  0.076488633779441206f, 0.076105417736672773f, 0.075722198895725248f,
+    0.075338977270689375f,
+  0.074955752875654230f, 0.074572525724710764f, 0.074189295831948693f,
+    0.073806063211457842f,
+  0.073422827877329483f, 0.073039589843653177f, 0.072656349124520389f,
+    0.072273105734021334f,
+  0.071889859686246352f, 0.071506610995287156f, 0.071123359675233852f,
+    0.070740105740178361f,
+  0.070356849204211397f, 0.069973590081423773f, 0.069590328385907715f,
+    0.069207064131753759f,
+  0.068823797333054326f, 0.068440528003900616f, 0.068057256158383886f,
+    0.067673981810596848f,
+  0.067290704974630494f, 0.066907425664577733f, 0.066524143894529736f,
+    0.066140859678579578f,
+  0.065757573030819083f, 0.065374283965340146f, 0.064990992496236119f,
+    0.064607698637598646f,
+  0.064224402403521202f, 0.063841103808096086f, 0.063457802865415636f,
+    0.063074499589573618f,
+  0.062691193994662109f, 0.062307886094775049f, 0.061924575904005130f,
+    0.061541263436445129f,
+  0.061157948706189229f, 0.060774631727329942f, 0.060391312513961619f,
+    0.060007991080177375f,
+  0.059624667440070382f, 0.059241341607735261f, 0.058858013597264912f,
+    0.058474683422754095f,
+  0.058091351098295878f, 0.057708016637985186f, 0.057324680055915692f,
+    0.056941341366181127f,
+  0.056558000582876661f, 0.056174657720095743f, 0.055791312791933681f,
+    0.055407965812484541f,
+  0.055024616795842439f, 0.054641265756102911f, 0.054257912707359794f,
+    0.053874557663708772f,
+  0.053491200639244271f, 0.053107841648060788f, 0.052724480704254229f,
+    0.052341117821918783f,
+  0.051957753015150501f, 0.051574386298044173f, 0.051191017684694640f,
+    0.050807647189198162f,
+  0.050424274825649297f, 0.050040900608144430f, 0.049657524550778251f,
+    0.049274146667647289f,
+  0.048890766972846805f, 0.048507385480472134f, 0.048124002204620014f,
+    0.047740617159385448f,
+  0.047357230358865306f, 0.046973841817155179f, 0.046590451548350717f,
+    0.046207059566548990f,
+  0.045823665885845313f, 0.045440270520336883f, 0.045056873484119603f,
+    0.044673474791289434f,
+  0.044290074455943754f, 0.043906672492178188f, 0.043523268914090238f,
+    0.043139863735776100f,
+  0.042756456971332048f, 0.042373048634855741f, 0.041989638740443119f,
+    0.041606227302191955f,
+  0.041222814334198304f, 0.040839399850560058f, 0.040455983865373815f,
+    0.040072566392736257f,
+  0.039689147446745419f, 0.039305727041497644f, 0.038922305191091085f,
+    0.038538881909622631f,
+  0.038155457211189216f, 0.037772031109889144f, 0.037388603619819022f,
+    0.037005174755077273f,
+  0.036621744529761024f, 0.036238312957967478f, 0.035854880053795196f,
+    0.035471445831341021f,
+  0.035088010304703626f, 0.034704573487980395f, 0.034321135395268765f,
+    0.033937696040667535f,
+  0.033554255438273790f, 0.033170813602186440f, 0.032787370546502645f,
+    0.032403926285321405f,
+  0.032020480832740429f, 0.031637034202857461f, 0.031253586409771626f,
+    0.030870137467580314f,
+  0.030486687390382738f, 0.030103236192276818f, 0.029719783887360508f,
+    0.029336330489733147f,
+  0.028952876013492331f, 0.028569420472737472f, 0.028185963881566689f,
+    0.027802506254078142f,
+  0.027419047604371360f, 0.027035587946544135f, 0.026652127294696067f,
+    0.026268665662925468f,
+  0.025885203065330677f, 0.025501739516011413f, 0.025118275029065638f,
+    0.024734809618593138f,
+  0.024351343298691951f, 0.023967876083461924f, 0.023584407987001611f,
+    0.023200939023409587f,
+  0.022817469206785804f, 0.022433998551228459f, 0.022050527070837558f,
+    0.021667054779711814f,
+  0.021283581691949955f, 0.020900107821652084f, 0.020516633182916549f,
+    0.020133157789843505f,
+  0.019749681656531803f, 0.019366204797080316f, 0.018982727225589285f,
+    0.018599248956157190f,
+  0.018215770002884327f, 0.017832290379869671f, 0.017448810101212228f,
+    0.017065329181012358f,
+  0.016681847633368677f, 0.016298365472381587f, 0.015914882712149747f,
+    0.015531399366773606f,
+  0.015147915450352307f, 0.014764430976985016f, 0.014380945960772247f,
+    0.013997460415812761f,
+  0.013613974356207112f, 0.013230487796054543f, 0.012847000749454314f,
+    0.012463513230507034f,
+  0.012080025253311559f, 0.011696536831968529f, 0.011313047980577277f,
+    0.010929558713237145f,
+  0.010546069044048827f, 0.010162578987111254f, 0.009779088556525145f,
+    0.009395597766389905f,
+  0.009012106630804949f, 0.008628615163871038f, 0.008245123379687167f,
+    0.007861631292354124f,
+  0.007478138915970929f, 0.007094646264638386f, 0.006711153352455981f,
+    0.006327660193523208f,
+  0.005944166801940901f, 0.005560673191808128f, 0.005177179377225743f,
+    0.004793685372293270f,
+  0.004410191191110246f, 0.004026696847777542f, 0.003643202356394263f,
+    0.003259707731061291f,
+  0.002876212985878184f, 0.002492718134944503f, 0.002109223192361147f,
+    0.001725728172227238f,
+  0.001342233088643682f, 0.000958737955710053f, 0.000575242787525925f,
+    0.000191747598192208f
+};
+  #endif
+
+/**
+  @brief  Weights Table
+ */
+
+/**
+  @par
+  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for(i = 0; i< N; i++)
+  { 
+    weights[(2*i)]   =  cos(i*c);
+    weights[(2*i)+1] = -sin(i*c);
+  } </pre>
+  @par
+  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Converted the output to q15 format by multiplying with 2^31 and saturated if required.
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is <code>2*N</code>.
+ */
+
+/**
+  @par
+  cosFactor tables are generated using the formula : <pre> cos_factors[n] = 2 * cos((2n+1)*pi/(4*N)) </pre>
+  @par
+  C command to generate the table
+  <pre>
+  for (i = 0; i< N; i++)
+  {
+    cos_factors[i] = 2 * cos((2*i+1)*c/2);
+  } </pre>
+  @par
+  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Then converted to q15 format by multiplying with 2^31 and saturated if required.
+*/
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+
+    const q15_t __ALIGNED(4) WeightsQ15_128[256] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7fe9, (q15_t)0xfb4a,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f87, (q15_t)0xf505,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7ed5, (q15_t)0xeec7,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7dd6, (q15_t)0xe893,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7c89, (q15_t)0xe26d,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7aef, (q15_t)0xdc5a,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7909, (q15_t)0xd65d,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x76d9, (q15_t)0xd079,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x745f, (q15_t)0xcab3,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x719e, (q15_t)0xc50e,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6e96, (q15_t)0xbf8d,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6b4a, (q15_t)0xba33,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x67bd, (q15_t)0xb505,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x63ef, (q15_t)0xb005,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x5fe3, (q15_t)0xab36,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5b9d, (q15_t)0xa69c,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x571d, (q15_t)0xa239,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5269, (q15_t)0x9e0f,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4d81, (q15_t)0x9a23,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4869, (q15_t)0x9674,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4325, (q15_t)0x9307,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3db8, (q15_t)0x8fdd,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3824, (q15_t)0x8cf9,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x326e, (q15_t)0x8a5b,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2c98, (q15_t)0x8806,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x26a8, (q15_t)0x85fb,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x209f, (q15_t)0x843b,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1a82, (q15_t)0x82c7,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x1455, (q15_t)0x81a1,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1139, (q15_t)0x812b, (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xe1b, (q15_t)0x80c8,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xafb, (q15_t)0x8079, (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x7d9, (q15_t)0x803e,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x324, (q15_t)0x800a, (q15_t)0x192, (q15_t)0x8003
+};
+    const q15_t __ALIGNED(4) cos_factorsQ15_128[128] = {
+  (q15_t)0x7fff, (q15_t)0x7ffa, (q15_t)0x7ff0, (q15_t)0x7fe1, (q15_t)0x7fce, (q15_t)0x7fb5, (q15_t)0x7f97, (q15_t)0x7f75,
+  (q15_t)0x7f4d, (q15_t)0x7f21, (q15_t)0x7ef0, (q15_t)0x7eba, (q15_t)0x7e7f, (q15_t)0x7e3f, (q15_t)0x7dfa, (q15_t)0x7db0,
+  (q15_t)0x7d62, (q15_t)0x7d0f, (q15_t)0x7cb7, (q15_t)0x7c5a, (q15_t)0x7bf8, (q15_t)0x7b92, (q15_t)0x7b26, (q15_t)0x7ab6,
+  (q15_t)0x7a42, (q15_t)0x79c8, (q15_t)0x794a, (q15_t)0x78c7, (q15_t)0x7840, (q15_t)0x77b4, (q15_t)0x7723, (q15_t)0x768e,
+  (q15_t)0x75f4, (q15_t)0x7555, (q15_t)0x74b2, (q15_t)0x740b, (q15_t)0x735f, (q15_t)0x72af, (q15_t)0x71fa, (q15_t)0x7141,
+  (q15_t)0x7083, (q15_t)0x6fc1, (q15_t)0x6efb, (q15_t)0x6e30, (q15_t)0x6d62, (q15_t)0x6c8f, (q15_t)0x6bb8, (q15_t)0x6adc,
+  (q15_t)0x69fd, (q15_t)0x6919, (q15_t)0x6832, (q15_t)0x6746, (q15_t)0x6657, (q15_t)0x6563, (q15_t)0x646c, (q15_t)0x6371,
+  (q15_t)0x6271, (q15_t)0x616f, (q15_t)0x6068, (q15_t)0x5f5e, (q15_t)0x5e50, (q15_t)0x5d3e, (q15_t)0x5c29, (q15_t)0x5b10,
+  (q15_t)0x59f3, (q15_t)0x58d4, (q15_t)0x57b0, (q15_t)0x568a, (q15_t)0x5560, (q15_t)0x5433, (q15_t)0x5302, (q15_t)0x51ce,
+  (q15_t)0x5097, (q15_t)0x4f5e, (q15_t)0x4e21, (q15_t)0x4ce1, (q15_t)0x4b9e, (q15_t)0x4a58, (q15_t)0x490f, (q15_t)0x47c3,
+  (q15_t)0x4675, (q15_t)0x4524, (q15_t)0x43d0, (q15_t)0x427a, (q15_t)0x4121, (q15_t)0x3fc5, (q15_t)0x3e68, (q15_t)0x3d07,
+  (q15_t)0x3ba5, (q15_t)0x3a40, (q15_t)0x38d8, (q15_t)0x376f, (q15_t)0x3604, (q15_t)0x3496, (q15_t)0x3326, (q15_t)0x31b5,
+  (q15_t)0x3041, (q15_t)0x2ecc, (q15_t)0x2d55, (q15_t)0x2bdc, (q15_t)0x2a61, (q15_t)0x28e5, (q15_t)0x2767, (q15_t)0x25e8,
+  (q15_t)0x2467, (q15_t)0x22e5, (q15_t)0x2161, (q15_t)0x1fdc, (q15_t)0x1e56, (q15_t)0x1ccf, (q15_t)0x1b47, (q15_t)0x19bd,
+  (q15_t)0x1833, (q15_t)0x16a8, (q15_t)0x151b, (q15_t)0x138e, (q15_t)0x1201, (q15_t)0x1072, (q15_t)0xee3, (q15_t)0xd53,
+  (q15_t)0xbc3, (q15_t)0xa33, (q15_t)0x8a2, (q15_t)0x710, (q15_t)0x57f, (q15_t)0x3ed, (q15_t)0x25b, (q15_t)0xc9
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+    const q15_t __ALIGNED(4) WeightsQ15_512[1024] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7ffe, (q15_t)0xfed3,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff8, (q15_t)0xfd41,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fed, (q15_t)0xfbaf,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fdd, (q15_t)0xfa1d,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fc8, (q15_t)0xf88b,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fae, (q15_t)0xf6fa,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f8f, (q15_t)0xf569,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f6b, (q15_t)0xf3d9,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f43, (q15_t)0xf249,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f15, (q15_t)0xf0b9,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7ee3, (q15_t)0xef2a,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eab, (q15_t)0xed9c,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e6f, (q15_t)0xec0e,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e2e, (q15_t)0xea81,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7de8, (q15_t)0xe8f6,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7d9d, (q15_t)0xe76a,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d4e, (q15_t)0xe5e0,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7cf9, (q15_t)0xe457,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7ca0, (q15_t)0xe2cf,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c42, (q15_t)0xe148,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bdf, (q15_t)0xdfc2,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b77, (q15_t)0xde3e,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b0b, (q15_t)0xdcbb,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7a9a, (q15_t)0xdb39,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a24, (q15_t)0xd9b8,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79a9, (q15_t)0xd839,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x792a, (q15_t)0xd6bc,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78a6, (q15_t)0xd540,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x781d, (q15_t)0xd3c6,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x7790, (q15_t)0xd24d,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x76fe, (q15_t)0xd0d7,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7668, (q15_t)0xcf62,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75cc, (q15_t)0xcdef,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x752d, (q15_t)0xcc7e,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x7489, (q15_t)0xcb0e,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x73e0, (q15_t)0xc9a1,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7333, (q15_t)0xc836,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x7282, (q15_t)0xc6ce,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71cc, (q15_t)0xc567,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7112, (q15_t)0xc403,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7053, (q15_t)0xc2a0,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6f90, (q15_t)0xc141,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ec9, (q15_t)0xbfe3,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6dfd, (q15_t)0xbe89,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d2d, (q15_t)0xbd30,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c59, (q15_t)0xbbdb,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6b81, (q15_t)0xba88,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6aa5, (q15_t)0xb937,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69c4, (q15_t)0xb7ea,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x68e0, (q15_t)0xb69f,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x67f7, (q15_t)0xb557,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x670b, (q15_t)0xb411,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x661a, (q15_t)0xb2cf,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6526, (q15_t)0xb190,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x642d, (q15_t)0xb054,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6331, (q15_t)0xaf1b,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6231, (q15_t)0xade4,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x612d, (q15_t)0xacb2,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6026, (q15_t)0xab82,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f1a, (q15_t)0xaa55,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e0b, (q15_t)0xa92c,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5cf9, (q15_t)0xa807,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5be3, (q15_t)0xa6e4,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5ac9, (q15_t)0xa5c5,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ac, (q15_t)0xa4aa,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x588b, (q15_t)0xa392,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x5767, (q15_t)0xa27d,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5640, (q15_t)0xa16d,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x5515, (q15_t)0xa060,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x53e7, (q15_t)0x9f56,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52b5, (q15_t)0x9e50,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x5181, (q15_t)0x9d4e,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5049, (q15_t)0x9c50,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f0f, (q15_t)0x9b56,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4dd1, (q15_t)0x9a60,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4c90, (q15_t)0x996d,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b4c, (q15_t)0x987e,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a06, (q15_t)0x9794,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48bc, (q15_t)0x96ad,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x4770, (q15_t)0x95cb,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4621, (q15_t)0x94ed,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x44cf, (q15_t)0x9412,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x437b, (q15_t)0x933c,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4224, (q15_t)0x926a,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x40ca, (q15_t)0x919d,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3f6e, (q15_t)0x90d3,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e10, (q15_t)0x900e,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3caf, (q15_t)0x8f4d,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b4c, (q15_t)0x8e91,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x39e6, (q15_t)0x8dd9,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x387e, (q15_t)0x8d25,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3714, (q15_t)0x8c76,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35a8, (q15_t)0x8bcb,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x343a, (q15_t)0x8b25,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x32ca, (q15_t)0x8a83,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x3158, (q15_t)0x89e5,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x2fe4, (q15_t)0x894d,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2e6e, (q15_t)0x88b9,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2cf7, (q15_t)0x8829,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2b7d, (q15_t)0x879e,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a02, (q15_t)0x8718,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x2886, (q15_t)0x8696,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2707, (q15_t)0x8619,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x2588, (q15_t)0x85a1,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2407, (q15_t)0x852d,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x2284, (q15_t)0x84be,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2100, (q15_t)0x8454,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1f7b, (q15_t)0x83ef,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1df5, (q15_t)0x838f,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1c6d, (q15_t)0x8333,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1ae4, (q15_t)0x82dc,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x195b, (q15_t)0x828a,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x17d0, (q15_t)0x823d,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x1645, (q15_t)0x81f4,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x14b8, (q15_t)0x81b1,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x132b, (q15_t)0x8172,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x119d, (q15_t)0x8138,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x100e, (q15_t)0x8103,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xe7f, (q15_t)0x80d3,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xcef, (q15_t)0x80a8,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xb5f, (q15_t)0x8082,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa33, (q15_t)0x8069, (q15_t)0x9ce, (q15_t)0x8061,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x83d, (q15_t)0x8044,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x775, (q15_t)0x8038, (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6ac, (q15_t)0x802d,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x51a, (q15_t)0x801b,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x451, (q15_t)0x8013, (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x388, (q15_t)0x800d,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x1f6, (q15_t)0x8004,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x12d, (q15_t)0x8002, (q15_t)0xc9, (q15_t)0x8001, (q15_t)0x64, (q15_t)0x8001
+};
+
+    const q15_t __ALIGNED(4) cos_factorsQ15_512[512] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ff9, (q15_t)0x7ff7,
+  (q15_t)0x7ff4, (q15_t)0x7ff2, (q15_t)0x7fee, (q15_t)0x7feb, (q15_t)0x7fe7, (q15_t)0x7fe3, (q15_t)0x7fdf, (q15_t)0x7fda,
+  (q15_t)0x7fd6, (q15_t)0x7fd0, (q15_t)0x7fcb, (q15_t)0x7fc5, (q15_t)0x7fbf, (q15_t)0x7fb8, (q15_t)0x7fb1, (q15_t)0x7faa,
+  (q15_t)0x7fa3, (q15_t)0x7f9b, (q15_t)0x7f93, (q15_t)0x7f8b, (q15_t)0x7f82, (q15_t)0x7f79, (q15_t)0x7f70, (q15_t)0x7f67,
+  (q15_t)0x7f5d, (q15_t)0x7f53, (q15_t)0x7f48, (q15_t)0x7f3d, (q15_t)0x7f32, (q15_t)0x7f27, (q15_t)0x7f1b, (q15_t)0x7f0f,
+  (q15_t)0x7f03, (q15_t)0x7ef6, (q15_t)0x7ee9, (q15_t)0x7edc, (q15_t)0x7ecf, (q15_t)0x7ec1, (q15_t)0x7eb3, (q15_t)0x7ea4,
+  (q15_t)0x7e95, (q15_t)0x7e86, (q15_t)0x7e77, (q15_t)0x7e67, (q15_t)0x7e57, (q15_t)0x7e47, (q15_t)0x7e37, (q15_t)0x7e26,
+  (q15_t)0x7e14, (q15_t)0x7e03, (q15_t)0x7df1, (q15_t)0x7ddf, (q15_t)0x7dcd, (q15_t)0x7dba, (q15_t)0x7da7, (q15_t)0x7d94,
+  (q15_t)0x7d80, (q15_t)0x7d6c, (q15_t)0x7d58, (q15_t)0x7d43, (q15_t)0x7d2f, (q15_t)0x7d19, (q15_t)0x7d04, (q15_t)0x7cee,
+  (q15_t)0x7cd8, (q15_t)0x7cc2, (q15_t)0x7cab, (q15_t)0x7c94, (q15_t)0x7c7d, (q15_t)0x7c66, (q15_t)0x7c4e, (q15_t)0x7c36,
+  (q15_t)0x7c1d, (q15_t)0x7c05, (q15_t)0x7beb, (q15_t)0x7bd2, (q15_t)0x7bb9, (q15_t)0x7b9f, (q15_t)0x7b84, (q15_t)0x7b6a,
+  (q15_t)0x7b4f, (q15_t)0x7b34, (q15_t)0x7b19, (q15_t)0x7afd, (q15_t)0x7ae1, (q15_t)0x7ac5, (q15_t)0x7aa8, (q15_t)0x7a8b,
+  (q15_t)0x7a6e, (q15_t)0x7a50, (q15_t)0x7a33, (q15_t)0x7a15, (q15_t)0x79f6, (q15_t)0x79d8, (q15_t)0x79b9, (q15_t)0x7999,
+  (q15_t)0x797a, (q15_t)0x795a, (q15_t)0x793a, (q15_t)0x7919, (q15_t)0x78f9, (q15_t)0x78d8, (q15_t)0x78b6, (q15_t)0x7895,
+  (q15_t)0x7873, (q15_t)0x7851, (q15_t)0x782e, (q15_t)0x780c, (q15_t)0x77e9, (q15_t)0x77c5, (q15_t)0x77a2, (q15_t)0x777e,
+  (q15_t)0x775a, (q15_t)0x7735, (q15_t)0x7710, (q15_t)0x76eb, (q15_t)0x76c6, (q15_t)0x76a0, (q15_t)0x767b, (q15_t)0x7654,
+  (q15_t)0x762e, (q15_t)0x7607, (q15_t)0x75e0, (q15_t)0x75b9, (q15_t)0x7591, (q15_t)0x7569, (q15_t)0x7541, (q15_t)0x7519,
+  (q15_t)0x74f0, (q15_t)0x74c7, (q15_t)0x749e, (q15_t)0x7474, (q15_t)0x744a, (q15_t)0x7420, (q15_t)0x73f6, (q15_t)0x73cb,
+  (q15_t)0x73a0, (q15_t)0x7375, (q15_t)0x7349, (q15_t)0x731d, (q15_t)0x72f1, (q15_t)0x72c5, (q15_t)0x7298, (q15_t)0x726b,
+  (q15_t)0x723e, (q15_t)0x7211, (q15_t)0x71e3, (q15_t)0x71b5, (q15_t)0x7186, (q15_t)0x7158, (q15_t)0x7129, (q15_t)0x70fa,
+  (q15_t)0x70cb, (q15_t)0x709b, (q15_t)0x706b, (q15_t)0x703b, (q15_t)0x700a, (q15_t)0x6fda, (q15_t)0x6fa9, (q15_t)0x6f77,
+  (q15_t)0x6f46, (q15_t)0x6f14, (q15_t)0x6ee2, (q15_t)0x6eaf, (q15_t)0x6e7d, (q15_t)0x6e4a, (q15_t)0x6e17, (q15_t)0x6de3,
+  (q15_t)0x6db0, (q15_t)0x6d7c, (q15_t)0x6d48, (q15_t)0x6d13, (q15_t)0x6cde, (q15_t)0x6ca9, (q15_t)0x6c74, (q15_t)0x6c3f,
+  (q15_t)0x6c09, (q15_t)0x6bd3, (q15_t)0x6b9c, (q15_t)0x6b66, (q15_t)0x6b2f, (q15_t)0x6af8, (q15_t)0x6ac1, (q15_t)0x6a89,
+  (q15_t)0x6a51, (q15_t)0x6a19, (q15_t)0x69e1, (q15_t)0x69a8, (q15_t)0x696f, (q15_t)0x6936, (q15_t)0x68fd, (q15_t)0x68c3,
+  (q15_t)0x6889, (q15_t)0x684f, (q15_t)0x6815, (q15_t)0x67da, (q15_t)0x679f, (q15_t)0x6764, (q15_t)0x6729, (q15_t)0x66ed,
+  (q15_t)0x66b1, (q15_t)0x6675, (q15_t)0x6639, (q15_t)0x65fc, (q15_t)0x65bf, (q15_t)0x6582, (q15_t)0x6545, (q15_t)0x6507,
+  (q15_t)0x64c9, (q15_t)0x648b, (q15_t)0x644d, (q15_t)0x640e, (q15_t)0x63cf, (q15_t)0x6390, (q15_t)0x6351, (q15_t)0x6311,
+  (q15_t)0x62d2, (q15_t)0x6292, (q15_t)0x6251, (q15_t)0x6211, (q15_t)0x61d0, (q15_t)0x618f, (q15_t)0x614e, (q15_t)0x610d,
+  (q15_t)0x60cb, (q15_t)0x6089, (q15_t)0x6047, (q15_t)0x6004, (q15_t)0x5fc2, (q15_t)0x5f7f, (q15_t)0x5f3c, (q15_t)0x5ef9,
+  (q15_t)0x5eb5, (q15_t)0x5e71, (q15_t)0x5e2d, (q15_t)0x5de9, (q15_t)0x5da5, (q15_t)0x5d60, (q15_t)0x5d1b, (q15_t)0x5cd6,
+  (q15_t)0x5c91, (q15_t)0x5c4b, (q15_t)0x5c06, (q15_t)0x5bc0, (q15_t)0x5b79, (q15_t)0x5b33, (q15_t)0x5aec, (q15_t)0x5aa5,
+  (q15_t)0x5a5e, (q15_t)0x5a17, (q15_t)0x59d0, (q15_t)0x5988, (q15_t)0x5940, (q15_t)0x58f8, (q15_t)0x58af, (q15_t)0x5867,
+  (q15_t)0x581e, (q15_t)0x57d5, (q15_t)0x578c, (q15_t)0x5742, (q15_t)0x56f9, (q15_t)0x56af, (q15_t)0x5665, (q15_t)0x561a,
+  (q15_t)0x55d0, (q15_t)0x5585, (q15_t)0x553a, (q15_t)0x54ef, (q15_t)0x54a4, (q15_t)0x5458, (q15_t)0x540d, (q15_t)0x53c1,
+  (q15_t)0x5375, (q15_t)0x5328, (q15_t)0x52dc, (q15_t)0x528f, (q15_t)0x5242, (q15_t)0x51f5, (q15_t)0x51a8, (q15_t)0x515a,
+  (q15_t)0x510c, (q15_t)0x50bf, (q15_t)0x5070, (q15_t)0x5022, (q15_t)0x4fd4, (q15_t)0x4f85, (q15_t)0x4f36, (q15_t)0x4ee7,
+  (q15_t)0x4e98, (q15_t)0x4e48, (q15_t)0x4df9, (q15_t)0x4da9, (q15_t)0x4d59, (q15_t)0x4d09, (q15_t)0x4cb8, (q15_t)0x4c68,
+  (q15_t)0x4c17, (q15_t)0x4bc6, (q15_t)0x4b75, (q15_t)0x4b24, (q15_t)0x4ad2, (q15_t)0x4a81, (q15_t)0x4a2f, (q15_t)0x49dd,
+  (q15_t)0x498a, (q15_t)0x4938, (q15_t)0x48e6, (q15_t)0x4893, (q15_t)0x4840, (q15_t)0x47ed, (q15_t)0x479a, (q15_t)0x4746,
+  (q15_t)0x46f3, (q15_t)0x469f, (q15_t)0x464b, (q15_t)0x45f7, (q15_t)0x45a3, (q15_t)0x454e, (q15_t)0x44fa, (q15_t)0x44a5,
+  (q15_t)0x4450, (q15_t)0x43fb, (q15_t)0x43a5, (q15_t)0x4350, (q15_t)0x42fa, (q15_t)0x42a5, (q15_t)0x424f, (q15_t)0x41f9,
+  (q15_t)0x41a2, (q15_t)0x414c, (q15_t)0x40f6, (q15_t)0x409f, (q15_t)0x4048, (q15_t)0x3ff1, (q15_t)0x3f9a, (q15_t)0x3f43,
+  (q15_t)0x3eeb, (q15_t)0x3e93, (q15_t)0x3e3c, (q15_t)0x3de4, (q15_t)0x3d8c, (q15_t)0x3d33, (q15_t)0x3cdb, (q15_t)0x3c83,
+  (q15_t)0x3c2a, (q15_t)0x3bd1, (q15_t)0x3b78, (q15_t)0x3b1f, (q15_t)0x3ac6, (q15_t)0x3a6c, (q15_t)0x3a13, (q15_t)0x39b9,
+  (q15_t)0x395f, (q15_t)0x3906, (q15_t)0x38ab, (q15_t)0x3851, (q15_t)0x37f7, (q15_t)0x379c, (q15_t)0x3742, (q15_t)0x36e7,
+  (q15_t)0x368c, (q15_t)0x3631, (q15_t)0x35d6, (q15_t)0x357b, (q15_t)0x351f, (q15_t)0x34c4, (q15_t)0x3468, (q15_t)0x340c,
+  (q15_t)0x33b0, (q15_t)0x3354, (q15_t)0x32f8, (q15_t)0x329c, (q15_t)0x3240, (q15_t)0x31e3, (q15_t)0x3186, (q15_t)0x312a,
+  (q15_t)0x30cd, (q15_t)0x3070, (q15_t)0x3013, (q15_t)0x2fb5, (q15_t)0x2f58, (q15_t)0x2efb, (q15_t)0x2e9d, (q15_t)0x2e3f,
+  (q15_t)0x2de2, (q15_t)0x2d84, (q15_t)0x2d26, (q15_t)0x2cc8, (q15_t)0x2c69, (q15_t)0x2c0b, (q15_t)0x2bad, (q15_t)0x2b4e,
+  (q15_t)0x2aef, (q15_t)0x2a91, (q15_t)0x2a32, (q15_t)0x29d3, (q15_t)0x2974, (q15_t)0x2915, (q15_t)0x28b5, (q15_t)0x2856,
+  (q15_t)0x27f6, (q15_t)0x2797, (q15_t)0x2737, (q15_t)0x26d8, (q15_t)0x2678, (q15_t)0x2618, (q15_t)0x25b8, (q15_t)0x2558,
+  (q15_t)0x24f7, (q15_t)0x2497, (q15_t)0x2437, (q15_t)0x23d6, (q15_t)0x2376, (q15_t)0x2315, (q15_t)0x22b4, (q15_t)0x2254,
+  (q15_t)0x21f3, (q15_t)0x2192, (q15_t)0x2131, (q15_t)0x20d0, (q15_t)0x206e, (q15_t)0x200d, (q15_t)0x1fac, (q15_t)0x1f4a,
+  (q15_t)0x1ee9, (q15_t)0x1e87, (q15_t)0x1e25, (q15_t)0x1dc4, (q15_t)0x1d62, (q15_t)0x1d00, (q15_t)0x1c9e, (q15_t)0x1c3c,
+  (q15_t)0x1bda, (q15_t)0x1b78, (q15_t)0x1b16, (q15_t)0x1ab3, (q15_t)0x1a51, (q15_t)0x19ef, (q15_t)0x198c, (q15_t)0x192a,
+  (q15_t)0x18c7, (q15_t)0x1864, (q15_t)0x1802, (q15_t)0x179f, (q15_t)0x173c, (q15_t)0x16d9, (q15_t)0x1676, (q15_t)0x1613,
+  (q15_t)0x15b0, (q15_t)0x154d, (q15_t)0x14ea, (q15_t)0x1487, (q15_t)0x1423, (q15_t)0x13c0, (q15_t)0x135d, (q15_t)0x12f9,
+  (q15_t)0x1296, (q15_t)0x1232, (q15_t)0x11cf, (q15_t)0x116b, (q15_t)0x1108, (q15_t)0x10a4, (q15_t)0x1040, (q15_t)0xfdd,
+  (q15_t)0xf79, (q15_t)0xf15, (q15_t)0xeb1, (q15_t)0xe4d, (q15_t)0xde9, (q15_t)0xd85, (q15_t)0xd21, (q15_t)0xcbd,
+  (q15_t)0xc59, (q15_t)0xbf5, (q15_t)0xb91, (q15_t)0xb2d, (q15_t)0xac9, (q15_t)0xa65, (q15_t)0xa00, (q15_t)0x99c,
+  (q15_t)0x938, (q15_t)0x8d4, (q15_t)0x86f, (q15_t)0x80b, (q15_t)0x7a7, (q15_t)0x742, (q15_t)0x6de, (q15_t)0x67a,
+  (q15_t)0x615, (q15_t)0x5b1, (q15_t)0x54c, (q15_t)0x4e8, (q15_t)0x483, (q15_t)0x41f, (q15_t)0x3ba, (q15_t)0x356,
+  (q15_t)0x2f1, (q15_t)0x28d, (q15_t)0x228, (q15_t)0x1c4, (q15_t)0x15f, (q15_t)0xfb, (q15_t)0x96, (q15_t)0x32
+};
+
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+    const q15_t __ALIGNED(4) WeightsQ15_2048[4096] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffb5,
+  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff51,
+  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeec,
+  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffd, (q15_t)0xfe88,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe23,
+  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffa, (q15_t)0xfdbe,
+  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff8, (q15_t)0xfd5a,
+  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff6, (q15_t)0xfcf5,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfc91,
+  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc2c,
+  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbc8,
+  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7fea, (q15_t)0xfb64,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe6, (q15_t)0xfaff,
+  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe2, (q15_t)0xfa9b,
+  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fde, (q15_t)0xfa36,
+  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fd9, (q15_t)0xf9d2,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd4, (q15_t)0xf96d,
+  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fcf, (q15_t)0xf909,
+  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fc9, (q15_t)0xf8a5,
+  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc3, (q15_t)0xf840,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbd, (q15_t)0xf7dc,
+  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb7, (q15_t)0xf778,
+  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb0, (q15_t)0xf713,
+  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7fa9, (q15_t)0xf6af,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa1, (q15_t)0xf64b,
+  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f99, (q15_t)0xf5e7,
+  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f91, (q15_t)0xf582,
+  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f89, (q15_t)0xf51e,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f80, (q15_t)0xf4ba,
+  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f77, (q15_t)0xf456,
+  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f6e, (q15_t)0xf3f2,
+  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f64, (q15_t)0xf38e,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5a, (q15_t)0xf32a,
+  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f50, (q15_t)0xf2c6,
+  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f45, (q15_t)0xf262,
+  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3b, (q15_t)0xf1fe,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f2f, (q15_t)0xf19a,
+  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f24, (q15_t)0xf136,
+  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f18, (q15_t)0xf0d2,
+  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0c, (q15_t)0xf06e,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f00, (q15_t)0xf00b,
+  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef3, (q15_t)0xefa7,
+  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee6, (q15_t)0xef43,
+  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7ed9, (q15_t)0xeedf,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ecb, (q15_t)0xee7c,
+  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ebd, (q15_t)0xee18,
+  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eaf, (q15_t)0xedb5,
+  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea1, (q15_t)0xed51,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e92, (q15_t)0xecee,
+  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e83, (q15_t)0xec8a,
+  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e73, (q15_t)0xec27,
+  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e63, (q15_t)0xebc4,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e53, (q15_t)0xeb61,
+  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e43, (q15_t)0xeafd,
+  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e32, (q15_t)0xea9a,
+  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e21, (q15_t)0xea37,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e10, (q15_t)0xe9d4,
+  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7dff, (q15_t)0xe971,
+  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7ded, (q15_t)0xe90e,
+  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dda, (q15_t)0xe8ab,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dc8, (q15_t)0xe849,
+  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db5, (q15_t)0xe7e6,
+  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da2, (q15_t)0xe783,
+  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d8f, (q15_t)0xe720,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7b, (q15_t)0xe6be,
+  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d67, (q15_t)0xe65b,
+  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d53, (q15_t)0xe5f9,
+  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d3e, (q15_t)0xe596,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d29, (q15_t)0xe534,
+  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d14, (q15_t)0xe4d2,
+  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7cff, (q15_t)0xe470,
+  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ce9, (q15_t)0xe40e,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd3, (q15_t)0xe3ab,
+  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cbc, (q15_t)0xe349,
+  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7ca6, (q15_t)0xe2e8,
+  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c8f, (q15_t)0xe286,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c77, (q15_t)0xe224,
+  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c60, (q15_t)0xe1c2,
+  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c48, (q15_t)0xe160,
+  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c30, (q15_t)0xe0ff,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c17, (q15_t)0xe09d,
+  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7bfe, (q15_t)0xe03c,
+  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7be5, (q15_t)0xdfdb,
+  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bcc, (q15_t)0xdf79,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb2, (q15_t)0xdf18,
+  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b98, (q15_t)0xdeb7,
+  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b7e, (q15_t)0xde56,
+  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b63, (q15_t)0xddf5,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b48, (q15_t)0xdd94,
+  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b2d, (q15_t)0xdd33,
+  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b12, (q15_t)0xdcd3,
+  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7af6, (q15_t)0xdc72,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7ada, (q15_t)0xdc12,
+  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7abd, (q15_t)0xdbb1,
+  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa1, (q15_t)0xdb51,
+  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a84, (q15_t)0xdaf1,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a67, (q15_t)0xda90,
+  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a49, (q15_t)0xda30,
+  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a2b, (q15_t)0xd9d0,
+  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a0d, (q15_t)0xd970,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79ef, (q15_t)0xd911,
+  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d0, (q15_t)0xd8b1,
+  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b1, (q15_t)0xd851,
+  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7992, (q15_t)0xd7f2,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7972, (q15_t)0xd792,
+  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7952, (q15_t)0xd733,
+  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7932, (q15_t)0xd6d4,
+  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7911, (q15_t)0xd675,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f1, (q15_t)0xd615,
+  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78cf, (q15_t)0xd5b7,
+  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78ae, (q15_t)0xd558,
+  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x788c, (q15_t)0xd4f9,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x786b, (q15_t)0xd49a,
+  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x7848, (q15_t)0xd43c,
+  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x7826, (q15_t)0xd3dd,
+  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x7803, (q15_t)0xd37f,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e0, (q15_t)0xd321,
+  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77bc, (q15_t)0xd2c3,
+  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x7799, (q15_t)0xd265,
+  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x7775, (q15_t)0xd207,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7751, (q15_t)0xd1a9,
+  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x772c, (q15_t)0xd14b,
+  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x7707, (q15_t)0xd0ee,
+  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e2, (q15_t)0xd091,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76bd, (q15_t)0xd033,
+  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x7697, (q15_t)0xcfd6,
+  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7671, (q15_t)0xcf79,
+  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x764b, (q15_t)0xcf1c,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x7624, (q15_t)0xcebf,
+  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x75fd, (q15_t)0xce62,
+  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75d6, (q15_t)0xce06,
+  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75af, (q15_t)0xcda9,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x7587, (q15_t)0xcd4d,
+  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x755f, (q15_t)0xccf1,
+  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x7537, (q15_t)0xcc95,
+  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x750f, (q15_t)0xcc39,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74e6, (q15_t)0xcbdd,
+  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74bd, (q15_t)0xcb81,
+  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x7493, (q15_t)0xcb25,
+  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x746a, (q15_t)0xcaca,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7440, (q15_t)0xca6e,
+  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x7415, (q15_t)0xca13,
+  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73eb, (q15_t)0xc9b8,
+  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c0, (q15_t)0xc95d,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x7395, (q15_t)0xc902,
+  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x736a, (q15_t)0xc8a8,
+  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x733e, (q15_t)0xc84d,
+  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x7312, (q15_t)0xc7f3,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72e6, (q15_t)0xc798,
+  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72ba, (q15_t)0xc73e,
+  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x728d, (q15_t)0xc6e4,
+  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7260, (q15_t)0xc68a,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x7233, (q15_t)0xc630,
+  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x7205, (q15_t)0xc5d7,
+  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71d7, (q15_t)0xc57d,
+  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71a9, (q15_t)0xc524,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x717b, (q15_t)0xc4cb,
+  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x714c, (q15_t)0xc472,
+  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x711d, (q15_t)0xc419,
+  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70ee, (q15_t)0xc3c0,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70bf, (q15_t)0xc367,
+  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x708f, (q15_t)0xc30f,
+  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x705f, (q15_t)0xc2b7,
+  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x702f, (q15_t)0xc25e,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x6ffe, (q15_t)0xc206,
+  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fcd, (q15_t)0xc1ae,
+  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6f9c, (q15_t)0xc157,
+  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f6b, (q15_t)0xc0ff,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f39, (q15_t)0xc0a8,
+  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f07, (q15_t)0xc050,
+  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6ed5, (q15_t)0xbff9,
+  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6ea3, (q15_t)0xbfa2,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e70, (q15_t)0xbf4b,
+  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e3d, (q15_t)0xbef5,
+  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e0a, (q15_t)0xbe9e,
+  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6dd6, (q15_t)0xbe48,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6da3, (q15_t)0xbdf2,
+  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d6f, (q15_t)0xbd9c,
+  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d3a, (q15_t)0xbd46,
+  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d06, (q15_t)0xbcf0,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cd1, (q15_t)0xbc9b,
+  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6c9c, (q15_t)0xbc45,
+  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c67, (q15_t)0xbbf0,
+  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c31, (q15_t)0xbb9b,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6bfb, (q15_t)0xbb46,
+  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bc5, (q15_t)0xbaf1,
+  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b8f, (q15_t)0xba9d,
+  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b58, (q15_t)0xba48,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b21, (q15_t)0xb9f4,
+  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6aea, (q15_t)0xb9a0,
+  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6ab3, (q15_t)0xb94c,
+  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a7b, (q15_t)0xb8f8,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a43, (q15_t)0xb8a5,
+  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a0b, (q15_t)0xb852,
+  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69d3, (q15_t)0xb7fe,
+  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x699a, (q15_t)0xb7ab,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x6961, (q15_t)0xb758,
+  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6928, (q15_t)0xb706,
+  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68ee, (q15_t)0xb6b3,
+  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68b5, (q15_t)0xb661,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x687b, (q15_t)0xb60f,
+  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x6840, (q15_t)0xb5bd,
+  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6806, (q15_t)0xb56b,
+  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67cb, (q15_t)0xb519,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x6790, (q15_t)0xb4c8,
+  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6755, (q15_t)0xb477,
+  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x671a, (q15_t)0xb426,
+  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66de, (q15_t)0xb3d5,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66a2, (q15_t)0xb384,
+  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6666, (q15_t)0xb334,
+  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6629, (q15_t)0xb2e3,
+  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65ed, (q15_t)0xb293,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65b0, (q15_t)0xb243,
+  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x6573, (q15_t)0xb1f3,
+  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6535, (q15_t)0xb1a4,
+  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x64f7, (q15_t)0xb154,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64ba, (q15_t)0xb105,
+  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x647b, (q15_t)0xb0b6,
+  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x643d, (q15_t)0xb067,
+  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x63fe, (q15_t)0xb019,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63c0, (q15_t)0xafca,
+  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x6380, (q15_t)0xaf7c,
+  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x6341, (q15_t)0xaf2e,
+  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x6301, (q15_t)0xaee0,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62c2, (q15_t)0xae92,
+  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x6282, (q15_t)0xae45,
+  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x6241, (q15_t)0xadf8,
+  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x6201, (q15_t)0xadab,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61c0, (q15_t)0xad5e,
+  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x617f, (q15_t)0xad11,
+  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x613e, (q15_t)0xacc5,
+  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x60fc, (q15_t)0xac78,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60ba, (q15_t)0xac2c,
+  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6078, (q15_t)0xabe0,
+  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6036, (q15_t)0xab95,
+  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x5ff4, (q15_t)0xab49,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fb1, (q15_t)0xaafe,
+  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f6e, (q15_t)0xaab3,
+  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f2b, (q15_t)0xaa68,
+  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ee8, (q15_t)0xaa1d,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5ea4, (q15_t)0xa9d3,
+  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e60, (q15_t)0xa989,
+  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e1c, (q15_t)0xa93f,
+  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5dd8, (q15_t)0xa8f5,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5d94, (q15_t)0xa8ab,
+  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d4f, (q15_t)0xa862,
+  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d0a, (q15_t)0xa819,
+  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cc5, (q15_t)0xa7d0,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c80, (q15_t)0xa787,
+  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c3a, (q15_t)0xa73f,
+  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5bf4, (q15_t)0xa6f6,
+  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bae, (q15_t)0xa6ae,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b68, (q15_t)0xa666,
+  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b21, (q15_t)0xa61f,
+  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5adb, (q15_t)0xa5d7,
+  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5a94, (q15_t)0xa590,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a4d, (q15_t)0xa549,
+  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a05, (q15_t)0xa502,
+  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59be, (q15_t)0xa4bb,
+  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5976, (q15_t)0xa475,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x592e, (q15_t)0xa42f,
+  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58e6, (q15_t)0xa3e9,
+  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x589d, (q15_t)0xa3a3,
+  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5855, (q15_t)0xa35e,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x580c, (q15_t)0xa318,
+  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57c3, (q15_t)0xa2d3,
+  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5779, (q15_t)0xa28f,
+  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x5730, (q15_t)0xa24a,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56e6, (q15_t)0xa206,
+  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x569c, (q15_t)0xa1c1,
+  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5652, (q15_t)0xa17e,
+  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5608, (q15_t)0xa13a,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55bd, (q15_t)0xa0f6,
+  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5572, (q15_t)0xa0b3,
+  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5528, (q15_t)0xa070,
+  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54dc, (q15_t)0xa02d,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x5491, (q15_t)0x9feb,
+  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5445, (q15_t)0x9fa9,
+  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x53fa, (q15_t)0x9f67,
+  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53ae, (q15_t)0x9f25,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5362, (q15_t)0x9ee3,
+  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5315, (q15_t)0x9ea2,
+  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52c9, (q15_t)0x9e61,
+  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x527c, (q15_t)0x9e20,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x522f, (q15_t)0x9ddf,
+  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51e2, (q15_t)0x9d9f,
+  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x5194, (q15_t)0x9d5e,
+  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5147, (q15_t)0x9d1e,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x50f9, (q15_t)0x9cdf,
+  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ab, (q15_t)0x9c9f,
+  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x505d, (q15_t)0x9c60,
+  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x500f, (q15_t)0x9c21,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fc0, (q15_t)0x9be2,
+  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f71, (q15_t)0x9ba4,
+  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f22, (q15_t)0x9b65,
+  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ed3, (q15_t)0x9b27,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e84, (q15_t)0x9aea,
+  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e34, (q15_t)0x9aac,
+  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4de5, (q15_t)0x9a6f,
+  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4d95, (q15_t)0x9a32,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d45, (q15_t)0x99f5,
+  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4cf5, (q15_t)0x99b8,
+  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4ca4, (q15_t)0x997c,
+  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c54, (q15_t)0x9940,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c03, (q15_t)0x9904,
+  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bb2, (q15_t)0x98c9,
+  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b61, (q15_t)0x988d,
+  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b0f, (q15_t)0x9852,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4abe, (q15_t)0x9817,
+  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a6c, (q15_t)0x97dd,
+  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a1a, (q15_t)0x97a2,
+  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49c8, (q15_t)0x9768,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4976, (q15_t)0x972f,
+  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4923, (q15_t)0x96f5,
+  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48d1, (q15_t)0x96bc,
+  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x487e, (q15_t)0x9683,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x482b, (q15_t)0x964a,
+  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47d8, (q15_t)0x9611,
+  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4785, (q15_t)0x95d9,
+  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4731, (q15_t)0x95a1,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46de, (q15_t)0x9569,
+  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x468a, (q15_t)0x9532,
+  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4636, (q15_t)0x94fa,
+  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45e2, (q15_t)0x94c3,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x458d, (q15_t)0x948d,
+  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4539, (q15_t)0x9456,
+  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44e4, (q15_t)0x9420,
+  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x4490, (q15_t)0x93ea,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x443b, (q15_t)0x93b4,
+  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43e5, (q15_t)0x937f,
+  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x4390, (q15_t)0x9349,
+  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x433b, (q15_t)0x9314,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42e5, (q15_t)0x92e0,
+  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x428f, (q15_t)0x92ab,
+  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4239, (q15_t)0x9277,
+  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41e3, (q15_t)0x9243,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x418d, (q15_t)0x9210,
+  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4136, (q15_t)0x91dc,
+  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40e0, (q15_t)0x91a9,
+  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4089, (q15_t)0x9177,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4032, (q15_t)0x9144,
+  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fdb, (q15_t)0x9112,
+  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f84, (q15_t)0x90e0,
+  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f2d, (q15_t)0x90ae,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ed5, (q15_t)0x907c,
+  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e7d, (q15_t)0x904b,
+  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e26, (q15_t)0x901a,
+  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dce, (q15_t)0x8fea,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d76, (q15_t)0x8fb9,
+  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d1d, (q15_t)0x8f89,
+  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cc5, (q15_t)0x8f59,
+  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c6c, (q15_t)0x8f2a,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c14, (q15_t)0x8efa,
+  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bbb, (q15_t)0x8ecb,
+  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b62, (q15_t)0x8e9c,
+  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b09, (q15_t)0x8e6e,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3aaf, (q15_t)0x8e40,
+  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a56, (q15_t)0x8e12,
+  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x39fd, (q15_t)0x8de4,
+  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39a3, (q15_t)0x8db7,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x3949, (q15_t)0x8d8a,
+  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x38ef, (q15_t)0x8d5d,
+  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x3895, (q15_t)0x8d30,
+  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x383b, (q15_t)0x8d04,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37e0, (q15_t)0x8cd8,
+  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3786, (q15_t)0x8cac,
+  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x372b, (q15_t)0x8c81,
+  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36d0, (q15_t)0x8c55,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3675, (q15_t)0x8c2a,
+  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x361a, (q15_t)0x8c00,
+  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35bf, (q15_t)0x8bd5,
+  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3564, (q15_t)0x8bab,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x3508, (q15_t)0x8b82,
+  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34ad, (q15_t)0x8b58,
+  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3451, (q15_t)0x8b2f,
+  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x33f5, (q15_t)0x8b06,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x3399, (q15_t)0x8add,
+  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x333d, (q15_t)0x8ab5,
+  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32e1, (q15_t)0x8a8d,
+  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3285, (q15_t)0x8a65,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x3228, (q15_t)0x8a3d,
+  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31cc, (q15_t)0x8a16,
+  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x316f, (q15_t)0x89ef,
+  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3112, (q15_t)0x89c8,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30b6, (q15_t)0x89a2,
+  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x3059, (q15_t)0x897c,
+  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x2ffb, (q15_t)0x8956,
+  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2f9e, (q15_t)0x8931,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f41, (q15_t)0x890b,
+  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ee3, (q15_t)0x88e6,
+  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e86, (q15_t)0x88c2,
+  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e28, (q15_t)0x889d,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2dca, (q15_t)0x8879,
+  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d6c, (q15_t)0x8855,
+  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d0e, (q15_t)0x8832,
+  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cb0, (q15_t)0x880f,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c52, (q15_t)0x87ec,
+  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2bf3, (q15_t)0x87c9,
+  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2b95, (q15_t)0x87a7,
+  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b36, (q15_t)0x8784,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ad8, (q15_t)0x8763,
+  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a79, (q15_t)0x8741,
+  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a1a, (q15_t)0x8720,
+  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29bb, (q15_t)0x86ff,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x295c, (q15_t)0x86de,
+  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x28fd, (q15_t)0x86be,
+  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x289d, (q15_t)0x869e,
+  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x283e, (q15_t)0x867e,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27df, (q15_t)0x865f,
+  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x277f, (q15_t)0x8640,
+  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x271f, (q15_t)0x8621,
+  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26c0, (q15_t)0x8602,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2660, (q15_t)0x85e4,
+  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2600, (q15_t)0x85c6,
+  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25a0, (q15_t)0x85a8,
+  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2540, (q15_t)0x858b,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24df, (q15_t)0x856e,
+  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x247f, (q15_t)0x8551,
+  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x241f, (q15_t)0x8534,
+  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23be, (q15_t)0x8518,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x235e, (q15_t)0x84fc,
+  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x22fd, (q15_t)0x84e1,
+  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x229c, (q15_t)0x84c5,
+  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x223b, (q15_t)0x84aa,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21da, (q15_t)0x848f,
+  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x2179, (q15_t)0x8475,
+  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x2118, (q15_t)0x845b,
+  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20b7, (q15_t)0x8441,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2056, (q15_t)0x8427,
+  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x1ff5, (q15_t)0x840e,
+  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1f93, (q15_t)0x83f5,
+  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f32, (q15_t)0x83dd,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ed0, (q15_t)0x83c4,
+  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e6f, (q15_t)0x83ac,
+  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e0d, (q15_t)0x8394,
+  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dab, (q15_t)0x837d,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d49, (q15_t)0x8366,
+  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1ce8, (q15_t)0x834f,
+  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c86, (q15_t)0x8338,
+  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c24, (q15_t)0x8322,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bc1, (q15_t)0x830c,
+  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b5f, (q15_t)0x82f7,
+  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1afd, (q15_t)0x82e1,
+  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1a9b, (q15_t)0x82cc,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a38, (q15_t)0x82b7,
+  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19d6, (q15_t)0x82a3,
+  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1973, (q15_t)0x828f,
+  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1911, (q15_t)0x827b,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18ae, (q15_t)0x8268,
+  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x184c, (q15_t)0x8254,
+  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17e9, (q15_t)0x8241,
+  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1786, (q15_t)0x822f,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1723, (q15_t)0x821c,
+  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16c0, (q15_t)0x820a,
+  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x165d, (q15_t)0x81f9,
+  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x15fa, (q15_t)0x81e7,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x1597, (q15_t)0x81d6,
+  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1534, (q15_t)0x81c5,
+  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14d1, (q15_t)0x81b5,
+  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x146e, (q15_t)0x81a5,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x140b, (q15_t)0x8195,
+  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13a7, (q15_t)0x8185,
+  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1344, (q15_t)0x8176,
+  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12e0, (q15_t)0x8167,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x127d, (q15_t)0x8158,
+  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x1219, (q15_t)0x814a,
+  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11b6, (q15_t)0x813c,
+  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1152, (q15_t)0x812e,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x10ef, (q15_t)0x8121,
+  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x108b, (q15_t)0x8113,
+  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x1027, (q15_t)0x8107,
+  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfc4, (q15_t)0x80fa,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf60, (q15_t)0x80ee,
+  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xefc, (q15_t)0x80e2,
+  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xe98, (q15_t)0x80d6,
+  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe34, (q15_t)0x80cb,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xdd0, (q15_t)0x80c0,
+  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd6c, (q15_t)0x80b5,
+  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd08, (q15_t)0x80ab,
+  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xca4, (q15_t)0x80a1,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc40, (q15_t)0x8097,
+  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbdc, (q15_t)0x808e,
+  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb78, (q15_t)0x8084,
+  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb14, (q15_t)0x807b,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xab0, (q15_t)0x8073,
+  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa4c, (q15_t)0x806b,
+  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9e7, (q15_t)0x8063,
+  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x983, (q15_t)0x805b,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x951, (q15_t)0x8057, (q15_t)0x938, (q15_t)0x8056, (q15_t)0x91f, (q15_t)0x8054,
+  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8bb, (q15_t)0x804d,
+  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x888, (q15_t)0x8049, (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x856, (q15_t)0x8046,
+  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x824, (q15_t)0x8043, (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x7f2, (q15_t)0x8040,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x78e, (q15_t)0x803a,
+  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x742, (q15_t)0x8035, (q15_t)0x729, (q15_t)0x8034,
+  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6c5, (q15_t)0x802e,
+  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x693, (q15_t)0x802c, (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x660, (q15_t)0x8029,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x615, (q15_t)0x8026, (q15_t)0x5fc, (q15_t)0x8024,
+  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x598, (q15_t)0x8020,
+  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x565, (q15_t)0x801e, (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x533, (q15_t)0x801c,
+  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4cf, (q15_t)0x8018,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x483, (q15_t)0x8015, (q15_t)0x46a, (q15_t)0x8014,
+  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x438, (q15_t)0x8012, (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x406, (q15_t)0x8011,
+  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3a1, (q15_t)0x800e,
+  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x356, (q15_t)0x800c, (q15_t)0x33d, (q15_t)0x800b,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2d8, (q15_t)0x8009,
+  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x274, (q15_t)0x8007,
+  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x242, (q15_t)0x8006, (q15_t)0x228, (q15_t)0x8005, (q15_t)0x20f, (q15_t)0x8005,
+  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1ab, (q15_t)0x8003,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x178, (q15_t)0x8003, (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x146, (q15_t)0x8002,
+  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x114, (q15_t)0x8002, (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xe2, (q15_t)0x8001,
+  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xaf, (q15_t)0x8001, (q15_t)0x96, (q15_t)0x8001, (q15_t)0x7d, (q15_t)0x8001,
+  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x32, (q15_t)0x8001, (q15_t)0x19, (q15_t)0x8001
+};
+    const q15_t __ALIGNED(4) cos_factorsQ15_2048[2048] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd,
+  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa,
+  (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6,
+  (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff1, (q15_t)0x7ff0,
+  (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7fea,
+  (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe3, (q15_t)0x7fe2,
+  (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fda, (q15_t)0x7fd9,
+  (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd0, (q15_t)0x7fce,
+  (q15_t)0x7fcd, (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc4, (q15_t)0x7fc3,
+  (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fbe, (q15_t)0x7fbc, (q15_t)0x7fbb, (q15_t)0x7fb9, (q15_t)0x7fb7, (q15_t)0x7fb6,
+  (q15_t)0x7fb4, (q15_t)0x7fb2, (q15_t)0x7fb1, (q15_t)0x7faf, (q15_t)0x7fad, (q15_t)0x7fab, (q15_t)0x7fa9, (q15_t)0x7fa8,
+  (q15_t)0x7fa6, (q15_t)0x7fa4, (q15_t)0x7fa2, (q15_t)0x7fa0, (q15_t)0x7f9e, (q15_t)0x7f9c, (q15_t)0x7f9a, (q15_t)0x7f98,
+  (q15_t)0x7f96, (q15_t)0x7f94, (q15_t)0x7f92, (q15_t)0x7f90, (q15_t)0x7f8e, (q15_t)0x7f8c, (q15_t)0x7f8a, (q15_t)0x7f88,
+  (q15_t)0x7f86, (q15_t)0x7f83, (q15_t)0x7f81, (q15_t)0x7f7f, (q15_t)0x7f7d, (q15_t)0x7f7b, (q15_t)0x7f78, (q15_t)0x7f76,
+  (q15_t)0x7f74, (q15_t)0x7f71, (q15_t)0x7f6f, (q15_t)0x7f6d, (q15_t)0x7f6a, (q15_t)0x7f68, (q15_t)0x7f65, (q15_t)0x7f63,
+  (q15_t)0x7f60, (q15_t)0x7f5e, (q15_t)0x7f5b, (q15_t)0x7f59, (q15_t)0x7f56, (q15_t)0x7f54, (q15_t)0x7f51, (q15_t)0x7f4f,
+  (q15_t)0x7f4c, (q15_t)0x7f49, (q15_t)0x7f47, (q15_t)0x7f44, (q15_t)0x7f41, (q15_t)0x7f3f, (q15_t)0x7f3c, (q15_t)0x7f39,
+  (q15_t)0x7f36, (q15_t)0x7f34, (q15_t)0x7f31, (q15_t)0x7f2e, (q15_t)0x7f2b, (q15_t)0x7f28, (q15_t)0x7f25, (q15_t)0x7f23,
+  (q15_t)0x7f20, (q15_t)0x7f1d, (q15_t)0x7f1a, (q15_t)0x7f17, (q15_t)0x7f14, (q15_t)0x7f11, (q15_t)0x7f0e, (q15_t)0x7f0b,
+  (q15_t)0x7f08, (q15_t)0x7f04, (q15_t)0x7f01, (q15_t)0x7efe, (q15_t)0x7efb, (q15_t)0x7ef8, (q15_t)0x7ef5, (q15_t)0x7ef1,
+  (q15_t)0x7eee, (q15_t)0x7eeb, (q15_t)0x7ee8, (q15_t)0x7ee4, (q15_t)0x7ee1, (q15_t)0x7ede, (q15_t)0x7eda, (q15_t)0x7ed7,
+  (q15_t)0x7ed4, (q15_t)0x7ed0, (q15_t)0x7ecd, (q15_t)0x7ec9, (q15_t)0x7ec6, (q15_t)0x7ec3, (q15_t)0x7ebf, (q15_t)0x7ebb,
+  (q15_t)0x7eb8, (q15_t)0x7eb4, (q15_t)0x7eb1, (q15_t)0x7ead, (q15_t)0x7eaa, (q15_t)0x7ea6, (q15_t)0x7ea2, (q15_t)0x7e9f,
+  (q15_t)0x7e9b, (q15_t)0x7e97, (q15_t)0x7e94, (q15_t)0x7e90, (q15_t)0x7e8c, (q15_t)0x7e88, (q15_t)0x7e84, (q15_t)0x7e81,
+  (q15_t)0x7e7d, (q15_t)0x7e79, (q15_t)0x7e75, (q15_t)0x7e71, (q15_t)0x7e6d, (q15_t)0x7e69, (q15_t)0x7e65, (q15_t)0x7e61,
+  (q15_t)0x7e5d, (q15_t)0x7e59, (q15_t)0x7e55, (q15_t)0x7e51, (q15_t)0x7e4d, (q15_t)0x7e49, (q15_t)0x7e45, (q15_t)0x7e41,
+  (q15_t)0x7e3d, (q15_t)0x7e39, (q15_t)0x7e34, (q15_t)0x7e30, (q15_t)0x7e2c, (q15_t)0x7e28, (q15_t)0x7e24, (q15_t)0x7e1f,
+  (q15_t)0x7e1b, (q15_t)0x7e17, (q15_t)0x7e12, (q15_t)0x7e0e, (q15_t)0x7e0a, (q15_t)0x7e05, (q15_t)0x7e01, (q15_t)0x7dfc,
+  (q15_t)0x7df8, (q15_t)0x7df3, (q15_t)0x7def, (q15_t)0x7dea, (q15_t)0x7de6, (q15_t)0x7de1, (q15_t)0x7ddd, (q15_t)0x7dd8,
+  (q15_t)0x7dd4, (q15_t)0x7dcf, (q15_t)0x7dca, (q15_t)0x7dc6, (q15_t)0x7dc1, (q15_t)0x7dbc, (q15_t)0x7db8, (q15_t)0x7db3,
+  (q15_t)0x7dae, (q15_t)0x7da9, (q15_t)0x7da5, (q15_t)0x7da0, (q15_t)0x7d9b, (q15_t)0x7d96, (q15_t)0x7d91, (q15_t)0x7d8c,
+  (q15_t)0x7d87, (q15_t)0x7d82, (q15_t)0x7d7e, (q15_t)0x7d79, (q15_t)0x7d74, (q15_t)0x7d6f, (q15_t)0x7d6a, (q15_t)0x7d65,
+  (q15_t)0x7d60, (q15_t)0x7d5a, (q15_t)0x7d55, (q15_t)0x7d50, (q15_t)0x7d4b, (q15_t)0x7d46, (q15_t)0x7d41, (q15_t)0x7d3c,
+  (q15_t)0x7d36, (q15_t)0x7d31, (q15_t)0x7d2c, (q15_t)0x7d27, (q15_t)0x7d21, (q15_t)0x7d1c, (q15_t)0x7d17, (q15_t)0x7d11,
+  (q15_t)0x7d0c, (q15_t)0x7d07, (q15_t)0x7d01, (q15_t)0x7cfc, (q15_t)0x7cf6, (q15_t)0x7cf1, (q15_t)0x7cec, (q15_t)0x7ce6,
+  (q15_t)0x7ce1, (q15_t)0x7cdb, (q15_t)0x7cd5, (q15_t)0x7cd0, (q15_t)0x7cca, (q15_t)0x7cc5, (q15_t)0x7cbf, (q15_t)0x7cb9,
+  (q15_t)0x7cb4, (q15_t)0x7cae, (q15_t)0x7ca8, (q15_t)0x7ca3, (q15_t)0x7c9d, (q15_t)0x7c97, (q15_t)0x7c91, (q15_t)0x7c8c,
+  (q15_t)0x7c86, (q15_t)0x7c80, (q15_t)0x7c7a, (q15_t)0x7c74, (q15_t)0x7c6e, (q15_t)0x7c69, (q15_t)0x7c63, (q15_t)0x7c5d,
+  (q15_t)0x7c57, (q15_t)0x7c51, (q15_t)0x7c4b, (q15_t)0x7c45, (q15_t)0x7c3f, (q15_t)0x7c39, (q15_t)0x7c33, (q15_t)0x7c2d,
+  (q15_t)0x7c26, (q15_t)0x7c20, (q15_t)0x7c1a, (q15_t)0x7c14, (q15_t)0x7c0e, (q15_t)0x7c08, (q15_t)0x7c01, (q15_t)0x7bfb,
+  (q15_t)0x7bf5, (q15_t)0x7bef, (q15_t)0x7be8, (q15_t)0x7be2, (q15_t)0x7bdc, (q15_t)0x7bd5, (q15_t)0x7bcf, (q15_t)0x7bc9,
+  (q15_t)0x7bc2, (q15_t)0x7bbc, (q15_t)0x7bb5, (q15_t)0x7baf, (q15_t)0x7ba8, (q15_t)0x7ba2, (q15_t)0x7b9b, (q15_t)0x7b95,
+  (q15_t)0x7b8e, (q15_t)0x7b88, (q15_t)0x7b81, (q15_t)0x7b7a, (q15_t)0x7b74, (q15_t)0x7b6d, (q15_t)0x7b67, (q15_t)0x7b60,
+  (q15_t)0x7b59, (q15_t)0x7b52, (q15_t)0x7b4c, (q15_t)0x7b45, (q15_t)0x7b3e, (q15_t)0x7b37, (q15_t)0x7b31, (q15_t)0x7b2a,
+  (q15_t)0x7b23, (q15_t)0x7b1c, (q15_t)0x7b15, (q15_t)0x7b0e, (q15_t)0x7b07, (q15_t)0x7b00, (q15_t)0x7af9, (q15_t)0x7af2,
+  (q15_t)0x7aeb, (q15_t)0x7ae4, (q15_t)0x7add, (q15_t)0x7ad6, (q15_t)0x7acf, (q15_t)0x7ac8, (q15_t)0x7ac1, (q15_t)0x7aba,
+  (q15_t)0x7ab3, (q15_t)0x7aac, (q15_t)0x7aa4, (q15_t)0x7a9d, (q15_t)0x7a96, (q15_t)0x7a8f, (q15_t)0x7a87, (q15_t)0x7a80,
+  (q15_t)0x7a79, (q15_t)0x7a72, (q15_t)0x7a6a, (q15_t)0x7a63, (q15_t)0x7a5c, (q15_t)0x7a54, (q15_t)0x7a4d, (q15_t)0x7a45,
+  (q15_t)0x7a3e, (q15_t)0x7a36, (q15_t)0x7a2f, (q15_t)0x7a27, (q15_t)0x7a20, (q15_t)0x7a18, (q15_t)0x7a11, (q15_t)0x7a09,
+  (q15_t)0x7a02, (q15_t)0x79fa, (q15_t)0x79f2, (q15_t)0x79eb, (q15_t)0x79e3, (q15_t)0x79db, (q15_t)0x79d4, (q15_t)0x79cc,
+  (q15_t)0x79c4, (q15_t)0x79bc, (q15_t)0x79b5, (q15_t)0x79ad, (q15_t)0x79a5, (q15_t)0x799d, (q15_t)0x7995, (q15_t)0x798e,
+  (q15_t)0x7986, (q15_t)0x797e, (q15_t)0x7976, (q15_t)0x796e, (q15_t)0x7966, (q15_t)0x795e, (q15_t)0x7956, (q15_t)0x794e,
+  (q15_t)0x7946, (q15_t)0x793e, (q15_t)0x7936, (q15_t)0x792e, (q15_t)0x7926, (q15_t)0x791e, (q15_t)0x7915, (q15_t)0x790d,
+  (q15_t)0x7905, (q15_t)0x78fd, (q15_t)0x78f5, (q15_t)0x78ec, (q15_t)0x78e4, (q15_t)0x78dc, (q15_t)0x78d4, (q15_t)0x78cb,
+  (q15_t)0x78c3, (q15_t)0x78bb, (q15_t)0x78b2, (q15_t)0x78aa, (q15_t)0x78a2, (q15_t)0x7899, (q15_t)0x7891, (q15_t)0x7888,
+  (q15_t)0x7880, (q15_t)0x7877, (q15_t)0x786f, (q15_t)0x7866, (q15_t)0x785e, (q15_t)0x7855, (q15_t)0x784d, (q15_t)0x7844,
+  (q15_t)0x783b, (q15_t)0x7833, (q15_t)0x782a, (q15_t)0x7821, (q15_t)0x7819, (q15_t)0x7810, (q15_t)0x7807, (q15_t)0x77ff,
+  (q15_t)0x77f6, (q15_t)0x77ed, (q15_t)0x77e4, (q15_t)0x77db, (q15_t)0x77d3, (q15_t)0x77ca, (q15_t)0x77c1, (q15_t)0x77b8,
+  (q15_t)0x77af, (q15_t)0x77a6, (q15_t)0x779d, (q15_t)0x7794, (q15_t)0x778b, (q15_t)0x7782, (q15_t)0x7779, (q15_t)0x7770,
+  (q15_t)0x7767, (q15_t)0x775e, (q15_t)0x7755, (q15_t)0x774c, (q15_t)0x7743, (q15_t)0x773a, (q15_t)0x7731, (q15_t)0x7727,
+  (q15_t)0x771e, (q15_t)0x7715, (q15_t)0x770c, (q15_t)0x7703, (q15_t)0x76f9, (q15_t)0x76f0, (q15_t)0x76e7, (q15_t)0x76dd,
+  (q15_t)0x76d4, (q15_t)0x76cb, (q15_t)0x76c1, (q15_t)0x76b8, (q15_t)0x76af, (q15_t)0x76a5, (q15_t)0x769c, (q15_t)0x7692,
+  (q15_t)0x7689, (q15_t)0x767f, (q15_t)0x7676, (q15_t)0x766c, (q15_t)0x7663, (q15_t)0x7659, (q15_t)0x7650, (q15_t)0x7646,
+  (q15_t)0x763c, (q15_t)0x7633, (q15_t)0x7629, (q15_t)0x761f, (q15_t)0x7616, (q15_t)0x760c, (q15_t)0x7602, (q15_t)0x75f9,
+  (q15_t)0x75ef, (q15_t)0x75e5, (q15_t)0x75db, (q15_t)0x75d1, (q15_t)0x75c8, (q15_t)0x75be, (q15_t)0x75b4, (q15_t)0x75aa,
+  (q15_t)0x75a0, (q15_t)0x7596, (q15_t)0x758c, (q15_t)0x7582, (q15_t)0x7578, (q15_t)0x756e, (q15_t)0x7564, (q15_t)0x755a,
+  (q15_t)0x7550, (q15_t)0x7546, (q15_t)0x753c, (q15_t)0x7532, (q15_t)0x7528, (q15_t)0x751e, (q15_t)0x7514, (q15_t)0x7509,
+  (q15_t)0x74ff, (q15_t)0x74f5, (q15_t)0x74eb, (q15_t)0x74e1, (q15_t)0x74d6, (q15_t)0x74cc, (q15_t)0x74c2, (q15_t)0x74b7,
+  (q15_t)0x74ad, (q15_t)0x74a3, (q15_t)0x7498, (q15_t)0x748e, (q15_t)0x7484, (q15_t)0x7479, (q15_t)0x746f, (q15_t)0x7464,
+  (q15_t)0x745a, (q15_t)0x744f, (q15_t)0x7445, (q15_t)0x743a, (q15_t)0x7430, (q15_t)0x7425, (q15_t)0x741b, (q15_t)0x7410,
+  (q15_t)0x7406, (q15_t)0x73fb, (q15_t)0x73f0, (q15_t)0x73e6, (q15_t)0x73db, (q15_t)0x73d0, (q15_t)0x73c6, (q15_t)0x73bb,
+  (q15_t)0x73b0, (q15_t)0x73a5, (q15_t)0x739b, (q15_t)0x7390, (q15_t)0x7385, (q15_t)0x737a, (q15_t)0x736f, (q15_t)0x7364,
+  (q15_t)0x7359, (q15_t)0x734f, (q15_t)0x7344, (q15_t)0x7339, (q15_t)0x732e, (q15_t)0x7323, (q15_t)0x7318, (q15_t)0x730d,
+  (q15_t)0x7302, (q15_t)0x72f7, (q15_t)0x72ec, (q15_t)0x72e1, (q15_t)0x72d5, (q15_t)0x72ca, (q15_t)0x72bf, (q15_t)0x72b4,
+  (q15_t)0x72a9, (q15_t)0x729e, (q15_t)0x7293, (q15_t)0x7287, (q15_t)0x727c, (q15_t)0x7271, (q15_t)0x7266, (q15_t)0x725a,
+  (q15_t)0x724f, (q15_t)0x7244, (q15_t)0x7238, (q15_t)0x722d, (q15_t)0x7222, (q15_t)0x7216, (q15_t)0x720b, (q15_t)0x71ff,
+  (q15_t)0x71f4, (q15_t)0x71e9, (q15_t)0x71dd, (q15_t)0x71d2, (q15_t)0x71c6, (q15_t)0x71bb, (q15_t)0x71af, (q15_t)0x71a3,
+  (q15_t)0x7198, (q15_t)0x718c, (q15_t)0x7181, (q15_t)0x7175, (q15_t)0x7169, (q15_t)0x715e, (q15_t)0x7152, (q15_t)0x7146,
+  (q15_t)0x713b, (q15_t)0x712f, (q15_t)0x7123, (q15_t)0x7117, (q15_t)0x710c, (q15_t)0x7100, (q15_t)0x70f4, (q15_t)0x70e8,
+  (q15_t)0x70dc, (q15_t)0x70d1, (q15_t)0x70c5, (q15_t)0x70b9, (q15_t)0x70ad, (q15_t)0x70a1, (q15_t)0x7095, (q15_t)0x7089,
+  (q15_t)0x707d, (q15_t)0x7071, (q15_t)0x7065, (q15_t)0x7059, (q15_t)0x704d, (q15_t)0x7041, (q15_t)0x7035, (q15_t)0x7029,
+  (q15_t)0x701d, (q15_t)0x7010, (q15_t)0x7004, (q15_t)0x6ff8, (q15_t)0x6fec, (q15_t)0x6fe0, (q15_t)0x6fd3, (q15_t)0x6fc7,
+  (q15_t)0x6fbb, (q15_t)0x6faf, (q15_t)0x6fa2, (q15_t)0x6f96, (q15_t)0x6f8a, (q15_t)0x6f7d, (q15_t)0x6f71, (q15_t)0x6f65,
+  (q15_t)0x6f58, (q15_t)0x6f4c, (q15_t)0x6f3f, (q15_t)0x6f33, (q15_t)0x6f27, (q15_t)0x6f1a, (q15_t)0x6f0e, (q15_t)0x6f01,
+  (q15_t)0x6ef5, (q15_t)0x6ee8, (q15_t)0x6edc, (q15_t)0x6ecf, (q15_t)0x6ec2, (q15_t)0x6eb6, (q15_t)0x6ea9, (q15_t)0x6e9c,
+  (q15_t)0x6e90, (q15_t)0x6e83, (q15_t)0x6e76, (q15_t)0x6e6a, (q15_t)0x6e5d, (q15_t)0x6e50, (q15_t)0x6e44, (q15_t)0x6e37,
+  (q15_t)0x6e2a, (q15_t)0x6e1d, (q15_t)0x6e10, (q15_t)0x6e04, (q15_t)0x6df7, (q15_t)0x6dea, (q15_t)0x6ddd, (q15_t)0x6dd0,
+  (q15_t)0x6dc3, (q15_t)0x6db6, (q15_t)0x6da9, (q15_t)0x6d9c, (q15_t)0x6d8f, (q15_t)0x6d82, (q15_t)0x6d75, (q15_t)0x6d68,
+  (q15_t)0x6d5b, (q15_t)0x6d4e, (q15_t)0x6d41, (q15_t)0x6d34, (q15_t)0x6d27, (q15_t)0x6d1a, (q15_t)0x6d0c, (q15_t)0x6cff,
+  (q15_t)0x6cf2, (q15_t)0x6ce5, (q15_t)0x6cd8, (q15_t)0x6cca, (q15_t)0x6cbd, (q15_t)0x6cb0, (q15_t)0x6ca3, (q15_t)0x6c95,
+  (q15_t)0x6c88, (q15_t)0x6c7b, (q15_t)0x6c6d, (q15_t)0x6c60, (q15_t)0x6c53, (q15_t)0x6c45, (q15_t)0x6c38, (q15_t)0x6c2a,
+  (q15_t)0x6c1d, (q15_t)0x6c0f, (q15_t)0x6c02, (q15_t)0x6bf5, (q15_t)0x6be7, (q15_t)0x6bd9, (q15_t)0x6bcc, (q15_t)0x6bbe,
+  (q15_t)0x6bb1, (q15_t)0x6ba3, (q15_t)0x6b96, (q15_t)0x6b88, (q15_t)0x6b7a, (q15_t)0x6b6d, (q15_t)0x6b5f, (q15_t)0x6b51,
+  (q15_t)0x6b44, (q15_t)0x6b36, (q15_t)0x6b28, (q15_t)0x6b1a, (q15_t)0x6b0d, (q15_t)0x6aff, (q15_t)0x6af1, (q15_t)0x6ae3,
+  (q15_t)0x6ad5, (q15_t)0x6ac8, (q15_t)0x6aba, (q15_t)0x6aac, (q15_t)0x6a9e, (q15_t)0x6a90, (q15_t)0x6a82, (q15_t)0x6a74,
+  (q15_t)0x6a66, (q15_t)0x6a58, (q15_t)0x6a4a, (q15_t)0x6a3c, (q15_t)0x6a2e, (q15_t)0x6a20, (q15_t)0x6a12, (q15_t)0x6a04,
+  (q15_t)0x69f6, (q15_t)0x69e8, (q15_t)0x69da, (q15_t)0x69cb, (q15_t)0x69bd, (q15_t)0x69af, (q15_t)0x69a1, (q15_t)0x6993,
+  (q15_t)0x6985, (q15_t)0x6976, (q15_t)0x6968, (q15_t)0x695a, (q15_t)0x694b, (q15_t)0x693d, (q15_t)0x692f, (q15_t)0x6921,
+  (q15_t)0x6912, (q15_t)0x6904, (q15_t)0x68f5, (q15_t)0x68e7, (q15_t)0x68d9, (q15_t)0x68ca, (q15_t)0x68bc, (q15_t)0x68ad,
+  (q15_t)0x689f, (q15_t)0x6890, (q15_t)0x6882, (q15_t)0x6873, (q15_t)0x6865, (q15_t)0x6856, (q15_t)0x6848, (q15_t)0x6839,
+  (q15_t)0x682b, (q15_t)0x681c, (q15_t)0x680d, (q15_t)0x67ff, (q15_t)0x67f0, (q15_t)0x67e1, (q15_t)0x67d3, (q15_t)0x67c4,
+  (q15_t)0x67b5, (q15_t)0x67a6, (q15_t)0x6798, (q15_t)0x6789, (q15_t)0x677a, (q15_t)0x676b, (q15_t)0x675d, (q15_t)0x674e,
+  (q15_t)0x673f, (q15_t)0x6730, (q15_t)0x6721, (q15_t)0x6712, (q15_t)0x6703, (q15_t)0x66f4, (q15_t)0x66e5, (q15_t)0x66d6,
+  (q15_t)0x66c8, (q15_t)0x66b9, (q15_t)0x66aa, (q15_t)0x669b, (q15_t)0x668b, (q15_t)0x667c, (q15_t)0x666d, (q15_t)0x665e,
+  (q15_t)0x664f, (q15_t)0x6640, (q15_t)0x6631, (q15_t)0x6622, (q15_t)0x6613, (q15_t)0x6603, (q15_t)0x65f4, (q15_t)0x65e5,
+  (q15_t)0x65d6, (q15_t)0x65c7, (q15_t)0x65b7, (q15_t)0x65a8, (q15_t)0x6599, (q15_t)0x658a, (q15_t)0x657a, (q15_t)0x656b,
+  (q15_t)0x655c, (q15_t)0x654c, (q15_t)0x653d, (q15_t)0x652d, (q15_t)0x651e, (q15_t)0x650f, (q15_t)0x64ff, (q15_t)0x64f0,
+  (q15_t)0x64e0, (q15_t)0x64d1, (q15_t)0x64c1, (q15_t)0x64b2, (q15_t)0x64a2, (q15_t)0x6493, (q15_t)0x6483, (q15_t)0x6474,
+  (q15_t)0x6464, (q15_t)0x6454, (q15_t)0x6445, (q15_t)0x6435, (q15_t)0x6426, (q15_t)0x6416, (q15_t)0x6406, (q15_t)0x63f7,
+  (q15_t)0x63e7, (q15_t)0x63d7, (q15_t)0x63c7, (q15_t)0x63b8, (q15_t)0x63a8, (q15_t)0x6398, (q15_t)0x6388, (q15_t)0x6378,
+  (q15_t)0x6369, (q15_t)0x6359, (q15_t)0x6349, (q15_t)0x6339, (q15_t)0x6329, (q15_t)0x6319, (q15_t)0x6309, (q15_t)0x62f9,
+  (q15_t)0x62ea, (q15_t)0x62da, (q15_t)0x62ca, (q15_t)0x62ba, (q15_t)0x62aa, (q15_t)0x629a, (q15_t)0x628a, (q15_t)0x627a,
+  (q15_t)0x6269, (q15_t)0x6259, (q15_t)0x6249, (q15_t)0x6239, (q15_t)0x6229, (q15_t)0x6219, (q15_t)0x6209, (q15_t)0x61f9,
+  (q15_t)0x61e8, (q15_t)0x61d8, (q15_t)0x61c8, (q15_t)0x61b8, (q15_t)0x61a8, (q15_t)0x6197, (q15_t)0x6187, (q15_t)0x6177,
+  (q15_t)0x6166, (q15_t)0x6156, (q15_t)0x6146, (q15_t)0x6135, (q15_t)0x6125, (q15_t)0x6115, (q15_t)0x6104, (q15_t)0x60f4,
+  (q15_t)0x60e4, (q15_t)0x60d3, (q15_t)0x60c3, (q15_t)0x60b2, (q15_t)0x60a2, (q15_t)0x6091, (q15_t)0x6081, (q15_t)0x6070,
+  (q15_t)0x6060, (q15_t)0x604f, (q15_t)0x603f, (q15_t)0x602e, (q15_t)0x601d, (q15_t)0x600d, (q15_t)0x5ffc, (q15_t)0x5fec,
+  (q15_t)0x5fdb, (q15_t)0x5fca, (q15_t)0x5fba, (q15_t)0x5fa9, (q15_t)0x5f98, (q15_t)0x5f87, (q15_t)0x5f77, (q15_t)0x5f66,
+  (q15_t)0x5f55, (q15_t)0x5f44, (q15_t)0x5f34, (q15_t)0x5f23, (q15_t)0x5f12, (q15_t)0x5f01, (q15_t)0x5ef0, (q15_t)0x5edf,
+  (q15_t)0x5ecf, (q15_t)0x5ebe, (q15_t)0x5ead, (q15_t)0x5e9c, (q15_t)0x5e8b, (q15_t)0x5e7a, (q15_t)0x5e69, (q15_t)0x5e58,
+  (q15_t)0x5e47, (q15_t)0x5e36, (q15_t)0x5e25, (q15_t)0x5e14, (q15_t)0x5e03, (q15_t)0x5df2, (q15_t)0x5de1, (q15_t)0x5dd0,
+  (q15_t)0x5dbf, (q15_t)0x5dad, (q15_t)0x5d9c, (q15_t)0x5d8b, (q15_t)0x5d7a, (q15_t)0x5d69, (q15_t)0x5d58, (q15_t)0x5d46,
+  (q15_t)0x5d35, (q15_t)0x5d24, (q15_t)0x5d13, (q15_t)0x5d01, (q15_t)0x5cf0, (q15_t)0x5cdf, (q15_t)0x5cce, (q15_t)0x5cbc,
+  (q15_t)0x5cab, (q15_t)0x5c9a, (q15_t)0x5c88, (q15_t)0x5c77, (q15_t)0x5c66, (q15_t)0x5c54, (q15_t)0x5c43, (q15_t)0x5c31,
+  (q15_t)0x5c20, (q15_t)0x5c0e, (q15_t)0x5bfd, (q15_t)0x5beb, (q15_t)0x5bda, (q15_t)0x5bc8, (q15_t)0x5bb7, (q15_t)0x5ba5,
+  (q15_t)0x5b94, (q15_t)0x5b82, (q15_t)0x5b71, (q15_t)0x5b5f, (q15_t)0x5b4d, (q15_t)0x5b3c, (q15_t)0x5b2a, (q15_t)0x5b19,
+  (q15_t)0x5b07, (q15_t)0x5af5, (q15_t)0x5ae4, (q15_t)0x5ad2, (q15_t)0x5ac0, (q15_t)0x5aae, (q15_t)0x5a9d, (q15_t)0x5a8b,
+  (q15_t)0x5a79, (q15_t)0x5a67, (q15_t)0x5a56, (q15_t)0x5a44, (q15_t)0x5a32, (q15_t)0x5a20, (q15_t)0x5a0e, (q15_t)0x59fc,
+  (q15_t)0x59ea, (q15_t)0x59d9, (q15_t)0x59c7, (q15_t)0x59b5, (q15_t)0x59a3, (q15_t)0x5991, (q15_t)0x597f, (q15_t)0x596d,
+  (q15_t)0x595b, (q15_t)0x5949, (q15_t)0x5937, (q15_t)0x5925, (q15_t)0x5913, (q15_t)0x5901, (q15_t)0x58ef, (q15_t)0x58dd,
+  (q15_t)0x58cb, (q15_t)0x58b8, (q15_t)0x58a6, (q15_t)0x5894, (q15_t)0x5882, (q15_t)0x5870, (q15_t)0x585e, (q15_t)0x584b,
+  (q15_t)0x5839, (q15_t)0x5827, (q15_t)0x5815, (q15_t)0x5803, (q15_t)0x57f0, (q15_t)0x57de, (q15_t)0x57cc, (q15_t)0x57b9,
+  (q15_t)0x57a7, (q15_t)0x5795, (q15_t)0x5783, (q15_t)0x5770, (q15_t)0x575e, (q15_t)0x574b, (q15_t)0x5739, (q15_t)0x5727,
+  (q15_t)0x5714, (q15_t)0x5702, (q15_t)0x56ef, (q15_t)0x56dd, (q15_t)0x56ca, (q15_t)0x56b8, (q15_t)0x56a5, (q15_t)0x5693,
+  (q15_t)0x5680, (q15_t)0x566e, (q15_t)0x565b, (q15_t)0x5649, (q15_t)0x5636, (q15_t)0x5624, (q15_t)0x5611, (q15_t)0x55fe,
+  (q15_t)0x55ec, (q15_t)0x55d9, (q15_t)0x55c7, (q15_t)0x55b4, (q15_t)0x55a1, (q15_t)0x558f, (q15_t)0x557c, (q15_t)0x5569,
+  (q15_t)0x5556, (q15_t)0x5544, (q15_t)0x5531, (q15_t)0x551e, (q15_t)0x550b, (q15_t)0x54f9, (q15_t)0x54e6, (q15_t)0x54d3,
+  (q15_t)0x54c0, (q15_t)0x54ad, (q15_t)0x549a, (q15_t)0x5488, (q15_t)0x5475, (q15_t)0x5462, (q15_t)0x544f, (q15_t)0x543c,
+  (q15_t)0x5429, (q15_t)0x5416, (q15_t)0x5403, (q15_t)0x53f0, (q15_t)0x53dd, (q15_t)0x53ca, (q15_t)0x53b7, (q15_t)0x53a4,
+  (q15_t)0x5391, (q15_t)0x537e, (q15_t)0x536b, (q15_t)0x5358, (q15_t)0x5345, (q15_t)0x5332, (q15_t)0x531f, (q15_t)0x530c,
+  (q15_t)0x52f8, (q15_t)0x52e5, (q15_t)0x52d2, (q15_t)0x52bf, (q15_t)0x52ac, (q15_t)0x5299, (q15_t)0x5285, (q15_t)0x5272,
+  (q15_t)0x525f, (q15_t)0x524c, (q15_t)0x5238, (q15_t)0x5225, (q15_t)0x5212, (q15_t)0x51ff, (q15_t)0x51eb, (q15_t)0x51d8,
+  (q15_t)0x51c5, (q15_t)0x51b1, (q15_t)0x519e, (q15_t)0x518b, (q15_t)0x5177, (q15_t)0x5164, (q15_t)0x5150, (q15_t)0x513d,
+  (q15_t)0x512a, (q15_t)0x5116, (q15_t)0x5103, (q15_t)0x50ef, (q15_t)0x50dc, (q15_t)0x50c8, (q15_t)0x50b5, (q15_t)0x50a1,
+  (q15_t)0x508e, (q15_t)0x507a, (q15_t)0x5067, (q15_t)0x5053, (q15_t)0x503f, (q15_t)0x502c, (q15_t)0x5018, (q15_t)0x5005,
+  (q15_t)0x4ff1, (q15_t)0x4fdd, (q15_t)0x4fca, (q15_t)0x4fb6, (q15_t)0x4fa2, (q15_t)0x4f8f, (q15_t)0x4f7b, (q15_t)0x4f67,
+  (q15_t)0x4f54, (q15_t)0x4f40, (q15_t)0x4f2c, (q15_t)0x4f18, (q15_t)0x4f05, (q15_t)0x4ef1, (q15_t)0x4edd, (q15_t)0x4ec9,
+  (q15_t)0x4eb6, (q15_t)0x4ea2, (q15_t)0x4e8e, (q15_t)0x4e7a, (q15_t)0x4e66, (q15_t)0x4e52, (q15_t)0x4e3e, (q15_t)0x4e2a,
+  (q15_t)0x4e17, (q15_t)0x4e03, (q15_t)0x4def, (q15_t)0x4ddb, (q15_t)0x4dc7, (q15_t)0x4db3, (q15_t)0x4d9f, (q15_t)0x4d8b,
+  (q15_t)0x4d77, (q15_t)0x4d63, (q15_t)0x4d4f, (q15_t)0x4d3b, (q15_t)0x4d27, (q15_t)0x4d13, (q15_t)0x4cff, (q15_t)0x4ceb,
+  (q15_t)0x4cd6, (q15_t)0x4cc2, (q15_t)0x4cae, (q15_t)0x4c9a, (q15_t)0x4c86, (q15_t)0x4c72, (q15_t)0x4c5e, (q15_t)0x4c49,
+  (q15_t)0x4c35, (q15_t)0x4c21, (q15_t)0x4c0d, (q15_t)0x4bf9, (q15_t)0x4be4, (q15_t)0x4bd0, (q15_t)0x4bbc, (q15_t)0x4ba8,
+  (q15_t)0x4b93, (q15_t)0x4b7f, (q15_t)0x4b6b, (q15_t)0x4b56, (q15_t)0x4b42, (q15_t)0x4b2e, (q15_t)0x4b19, (q15_t)0x4b05,
+  (q15_t)0x4af1, (q15_t)0x4adc, (q15_t)0x4ac8, (q15_t)0x4ab4, (q15_t)0x4a9f, (q15_t)0x4a8b, (q15_t)0x4a76, (q15_t)0x4a62,
+  (q15_t)0x4a4d, (q15_t)0x4a39, (q15_t)0x4a24, (q15_t)0x4a10, (q15_t)0x49fb, (q15_t)0x49e7, (q15_t)0x49d2, (q15_t)0x49be,
+  (q15_t)0x49a9, (q15_t)0x4995, (q15_t)0x4980, (q15_t)0x496c, (q15_t)0x4957, (q15_t)0x4942, (q15_t)0x492e, (q15_t)0x4919,
+  (q15_t)0x4905, (q15_t)0x48f0, (q15_t)0x48db, (q15_t)0x48c7, (q15_t)0x48b2, (q15_t)0x489d, (q15_t)0x4888, (q15_t)0x4874,
+  (q15_t)0x485f, (q15_t)0x484a, (q15_t)0x4836, (q15_t)0x4821, (q15_t)0x480c, (q15_t)0x47f7, (q15_t)0x47e2, (q15_t)0x47ce,
+  (q15_t)0x47b9, (q15_t)0x47a4, (q15_t)0x478f, (q15_t)0x477a, (q15_t)0x4765, (q15_t)0x4751, (q15_t)0x473c, (q15_t)0x4727,
+  (q15_t)0x4712, (q15_t)0x46fd, (q15_t)0x46e8, (q15_t)0x46d3, (q15_t)0x46be, (q15_t)0x46a9, (q15_t)0x4694, (q15_t)0x467f,
+  (q15_t)0x466a, (q15_t)0x4655, (q15_t)0x4640, (q15_t)0x462b, (q15_t)0x4616, (q15_t)0x4601, (q15_t)0x45ec, (q15_t)0x45d7,
+  (q15_t)0x45c2, (q15_t)0x45ad, (q15_t)0x4598, (q15_t)0x4583, (q15_t)0x456e, (q15_t)0x4559, (q15_t)0x4544, (q15_t)0x452e,
+  (q15_t)0x4519, (q15_t)0x4504, (q15_t)0x44ef, (q15_t)0x44da, (q15_t)0x44c5, (q15_t)0x44af, (q15_t)0x449a, (q15_t)0x4485,
+  (q15_t)0x4470, (q15_t)0x445a, (q15_t)0x4445, (q15_t)0x4430, (q15_t)0x441b, (q15_t)0x4405, (q15_t)0x43f0, (q15_t)0x43db,
+  (q15_t)0x43c5, (q15_t)0x43b0, (q15_t)0x439b, (q15_t)0x4385, (q15_t)0x4370, (q15_t)0x435b, (q15_t)0x4345, (q15_t)0x4330,
+  (q15_t)0x431b, (q15_t)0x4305, (q15_t)0x42f0, (q15_t)0x42da, (q15_t)0x42c5, (q15_t)0x42af, (q15_t)0x429a, (q15_t)0x4284,
+  (q15_t)0x426f, (q15_t)0x425a, (q15_t)0x4244, (q15_t)0x422f, (q15_t)0x4219, (q15_t)0x4203, (q15_t)0x41ee, (q15_t)0x41d8,
+  (q15_t)0x41c3, (q15_t)0x41ad, (q15_t)0x4198, (q15_t)0x4182, (q15_t)0x416d, (q15_t)0x4157, (q15_t)0x4141, (q15_t)0x412c,
+  (q15_t)0x4116, (q15_t)0x4100, (q15_t)0x40eb, (q15_t)0x40d5, (q15_t)0x40bf, (q15_t)0x40aa, (q15_t)0x4094, (q15_t)0x407e,
+  (q15_t)0x4069, (q15_t)0x4053, (q15_t)0x403d, (q15_t)0x4027, (q15_t)0x4012, (q15_t)0x3ffc, (q15_t)0x3fe6, (q15_t)0x3fd0,
+  (q15_t)0x3fbb, (q15_t)0x3fa5, (q15_t)0x3f8f, (q15_t)0x3f79, (q15_t)0x3f63, (q15_t)0x3f4d, (q15_t)0x3f38, (q15_t)0x3f22,
+  (q15_t)0x3f0c, (q15_t)0x3ef6, (q15_t)0x3ee0, (q15_t)0x3eca, (q15_t)0x3eb4, (q15_t)0x3e9e, (q15_t)0x3e88, (q15_t)0x3e73,
+  (q15_t)0x3e5d, (q15_t)0x3e47, (q15_t)0x3e31, (q15_t)0x3e1b, (q15_t)0x3e05, (q15_t)0x3def, (q15_t)0x3dd9, (q15_t)0x3dc3,
+  (q15_t)0x3dad, (q15_t)0x3d97, (q15_t)0x3d81, (q15_t)0x3d6b, (q15_t)0x3d55, (q15_t)0x3d3e, (q15_t)0x3d28, (q15_t)0x3d12,
+  (q15_t)0x3cfc, (q15_t)0x3ce6, (q15_t)0x3cd0, (q15_t)0x3cba, (q15_t)0x3ca4, (q15_t)0x3c8e, (q15_t)0x3c77, (q15_t)0x3c61,
+  (q15_t)0x3c4b, (q15_t)0x3c35, (q15_t)0x3c1f, (q15_t)0x3c09, (q15_t)0x3bf2, (q15_t)0x3bdc, (q15_t)0x3bc6, (q15_t)0x3bb0,
+  (q15_t)0x3b99, (q15_t)0x3b83, (q15_t)0x3b6d, (q15_t)0x3b57, (q15_t)0x3b40, (q15_t)0x3b2a, (q15_t)0x3b14, (q15_t)0x3afe,
+  (q15_t)0x3ae7, (q15_t)0x3ad1, (q15_t)0x3abb, (q15_t)0x3aa4, (q15_t)0x3a8e, (q15_t)0x3a78, (q15_t)0x3a61, (q15_t)0x3a4b,
+  (q15_t)0x3a34, (q15_t)0x3a1e, (q15_t)0x3a08, (q15_t)0x39f1, (q15_t)0x39db, (q15_t)0x39c4, (q15_t)0x39ae, (q15_t)0x3998,
+  (q15_t)0x3981, (q15_t)0x396b, (q15_t)0x3954, (q15_t)0x393e, (q15_t)0x3927, (q15_t)0x3911, (q15_t)0x38fa, (q15_t)0x38e4,
+  (q15_t)0x38cd, (q15_t)0x38b7, (q15_t)0x38a0, (q15_t)0x388a, (q15_t)0x3873, (q15_t)0x385d, (q15_t)0x3846, (q15_t)0x382f,
+  (q15_t)0x3819, (q15_t)0x3802, (q15_t)0x37ec, (q15_t)0x37d5, (q15_t)0x37be, (q15_t)0x37a8, (q15_t)0x3791, (q15_t)0x377a,
+  (q15_t)0x3764, (q15_t)0x374d, (q15_t)0x3736, (q15_t)0x3720, (q15_t)0x3709, (q15_t)0x36f2, (q15_t)0x36dc, (q15_t)0x36c5,
+  (q15_t)0x36ae, (q15_t)0x3698, (q15_t)0x3681, (q15_t)0x366a, (q15_t)0x3653, (q15_t)0x363d, (q15_t)0x3626, (q15_t)0x360f,
+  (q15_t)0x35f8, (q15_t)0x35e1, (q15_t)0x35cb, (q15_t)0x35b4, (q15_t)0x359d, (q15_t)0x3586, (q15_t)0x356f, (q15_t)0x3558,
+  (q15_t)0x3542, (q15_t)0x352b, (q15_t)0x3514, (q15_t)0x34fd, (q15_t)0x34e6, (q15_t)0x34cf, (q15_t)0x34b8, (q15_t)0x34a1,
+  (q15_t)0x348b, (q15_t)0x3474, (q15_t)0x345d, (q15_t)0x3446, (q15_t)0x342f, (q15_t)0x3418, (q15_t)0x3401, (q15_t)0x33ea,
+  (q15_t)0x33d3, (q15_t)0x33bc, (q15_t)0x33a5, (q15_t)0x338e, (q15_t)0x3377, (q15_t)0x3360, (q15_t)0x3349, (q15_t)0x3332,
+  (q15_t)0x331b, (q15_t)0x3304, (q15_t)0x32ed, (q15_t)0x32d6, (q15_t)0x32bf, (q15_t)0x32a8, (q15_t)0x3290, (q15_t)0x3279,
+  (q15_t)0x3262, (q15_t)0x324b, (q15_t)0x3234, (q15_t)0x321d, (q15_t)0x3206, (q15_t)0x31ef, (q15_t)0x31d8, (q15_t)0x31c0,
+  (q15_t)0x31a9, (q15_t)0x3192, (q15_t)0x317b, (q15_t)0x3164, (q15_t)0x314c, (q15_t)0x3135, (q15_t)0x311e, (q15_t)0x3107,
+  (q15_t)0x30f0, (q15_t)0x30d8, (q15_t)0x30c1, (q15_t)0x30aa, (q15_t)0x3093, (q15_t)0x307b, (q15_t)0x3064, (q15_t)0x304d,
+  (q15_t)0x3036, (q15_t)0x301e, (q15_t)0x3007, (q15_t)0x2ff0, (q15_t)0x2fd8, (q15_t)0x2fc1, (q15_t)0x2faa, (q15_t)0x2f92,
+  (q15_t)0x2f7b, (q15_t)0x2f64, (q15_t)0x2f4c, (q15_t)0x2f35, (q15_t)0x2f1e, (q15_t)0x2f06, (q15_t)0x2eef, (q15_t)0x2ed8,
+  (q15_t)0x2ec0, (q15_t)0x2ea9, (q15_t)0x2e91, (q15_t)0x2e7a, (q15_t)0x2e63, (q15_t)0x2e4b, (q15_t)0x2e34, (q15_t)0x2e1c,
+  (q15_t)0x2e05, (q15_t)0x2ded, (q15_t)0x2dd6, (q15_t)0x2dbe, (q15_t)0x2da7, (q15_t)0x2d8f, (q15_t)0x2d78, (q15_t)0x2d60,
+  (q15_t)0x2d49, (q15_t)0x2d31, (q15_t)0x2d1a, (q15_t)0x2d02, (q15_t)0x2ceb, (q15_t)0x2cd3, (q15_t)0x2cbc, (q15_t)0x2ca4,
+  (q15_t)0x2c8d, (q15_t)0x2c75, (q15_t)0x2c5e, (q15_t)0x2c46, (q15_t)0x2c2e, (q15_t)0x2c17, (q15_t)0x2bff, (q15_t)0x2be8,
+  (q15_t)0x2bd0, (q15_t)0x2bb8, (q15_t)0x2ba1, (q15_t)0x2b89, (q15_t)0x2b71, (q15_t)0x2b5a, (q15_t)0x2b42, (q15_t)0x2b2b,
+  (q15_t)0x2b13, (q15_t)0x2afb, (q15_t)0x2ae4, (q15_t)0x2acc, (q15_t)0x2ab4, (q15_t)0x2a9c, (q15_t)0x2a85, (q15_t)0x2a6d,
+  (q15_t)0x2a55, (q15_t)0x2a3e, (q15_t)0x2a26, (q15_t)0x2a0e, (q15_t)0x29f6, (q15_t)0x29df, (q15_t)0x29c7, (q15_t)0x29af,
+  (q15_t)0x2997, (q15_t)0x2980, (q15_t)0x2968, (q15_t)0x2950, (q15_t)0x2938, (q15_t)0x2920, (q15_t)0x2909, (q15_t)0x28f1,
+  (q15_t)0x28d9, (q15_t)0x28c1, (q15_t)0x28a9, (q15_t)0x2892, (q15_t)0x287a, (q15_t)0x2862, (q15_t)0x284a, (q15_t)0x2832,
+  (q15_t)0x281a, (q15_t)0x2802, (q15_t)0x27eb, (q15_t)0x27d3, (q15_t)0x27bb, (q15_t)0x27a3, (q15_t)0x278b, (q15_t)0x2773,
+  (q15_t)0x275b, (q15_t)0x2743, (q15_t)0x272b, (q15_t)0x2713, (q15_t)0x26fb, (q15_t)0x26e4, (q15_t)0x26cc, (q15_t)0x26b4,
+  (q15_t)0x269c, (q15_t)0x2684, (q15_t)0x266c, (q15_t)0x2654, (q15_t)0x263c, (q15_t)0x2624, (q15_t)0x260c, (q15_t)0x25f4,
+  (q15_t)0x25dc, (q15_t)0x25c4, (q15_t)0x25ac, (q15_t)0x2594, (q15_t)0x257c, (q15_t)0x2564, (q15_t)0x254c, (q15_t)0x2534,
+  (q15_t)0x251c, (q15_t)0x2503, (q15_t)0x24eb, (q15_t)0x24d3, (q15_t)0x24bb, (q15_t)0x24a3, (q15_t)0x248b, (q15_t)0x2473,
+  (q15_t)0x245b, (q15_t)0x2443, (q15_t)0x242b, (q15_t)0x2413, (q15_t)0x23fa, (q15_t)0x23e2, (q15_t)0x23ca, (q15_t)0x23b2,
+  (q15_t)0x239a, (q15_t)0x2382, (q15_t)0x236a, (q15_t)0x2352, (q15_t)0x2339, (q15_t)0x2321, (q15_t)0x2309, (q15_t)0x22f1,
+  (q15_t)0x22d9, (q15_t)0x22c0, (q15_t)0x22a8, (q15_t)0x2290, (q15_t)0x2278, (q15_t)0x2260, (q15_t)0x2247, (q15_t)0x222f,
+  (q15_t)0x2217, (q15_t)0x21ff, (q15_t)0x21e7, (q15_t)0x21ce, (q15_t)0x21b6, (q15_t)0x219e, (q15_t)0x2186, (q15_t)0x216d,
+  (q15_t)0x2155, (q15_t)0x213d, (q15_t)0x2125, (q15_t)0x210c, (q15_t)0x20f4, (q15_t)0x20dc, (q15_t)0x20c3, (q15_t)0x20ab,
+  (q15_t)0x2093, (q15_t)0x207a, (q15_t)0x2062, (q15_t)0x204a, (q15_t)0x2032, (q15_t)0x2019, (q15_t)0x2001, (q15_t)0x1fe9,
+  (q15_t)0x1fd0, (q15_t)0x1fb8, (q15_t)0x1f9f, (q15_t)0x1f87, (q15_t)0x1f6f, (q15_t)0x1f56, (q15_t)0x1f3e, (q15_t)0x1f26,
+  (q15_t)0x1f0d, (q15_t)0x1ef5, (q15_t)0x1edd, (q15_t)0x1ec4, (q15_t)0x1eac, (q15_t)0x1e93, (q15_t)0x1e7b, (q15_t)0x1e62,
+  (q15_t)0x1e4a, (q15_t)0x1e32, (q15_t)0x1e19, (q15_t)0x1e01, (q15_t)0x1de8, (q15_t)0x1dd0, (q15_t)0x1db7, (q15_t)0x1d9f,
+  (q15_t)0x1d87, (q15_t)0x1d6e, (q15_t)0x1d56, (q15_t)0x1d3d, (q15_t)0x1d25, (q15_t)0x1d0c, (q15_t)0x1cf4, (q15_t)0x1cdb,
+  (q15_t)0x1cc3, (q15_t)0x1caa, (q15_t)0x1c92, (q15_t)0x1c79, (q15_t)0x1c61, (q15_t)0x1c48, (q15_t)0x1c30, (q15_t)0x1c17,
+  (q15_t)0x1bff, (q15_t)0x1be6, (q15_t)0x1bce, (q15_t)0x1bb5, (q15_t)0x1b9d, (q15_t)0x1b84, (q15_t)0x1b6c, (q15_t)0x1b53,
+  (q15_t)0x1b3a, (q15_t)0x1b22, (q15_t)0x1b09, (q15_t)0x1af1, (q15_t)0x1ad8, (q15_t)0x1ac0, (q15_t)0x1aa7, (q15_t)0x1a8e,
+  (q15_t)0x1a76, (q15_t)0x1a5d, (q15_t)0x1a45, (q15_t)0x1a2c, (q15_t)0x1a13, (q15_t)0x19fb, (q15_t)0x19e2, (q15_t)0x19ca,
+  (q15_t)0x19b1, (q15_t)0x1998, (q15_t)0x1980, (q15_t)0x1967, (q15_t)0x194e, (q15_t)0x1936, (q15_t)0x191d, (q15_t)0x1905,
+  (q15_t)0x18ec, (q15_t)0x18d3, (q15_t)0x18bb, (q15_t)0x18a2, (q15_t)0x1889, (q15_t)0x1871, (q15_t)0x1858, (q15_t)0x183f,
+  (q15_t)0x1827, (q15_t)0x180e, (q15_t)0x17f5, (q15_t)0x17dd, (q15_t)0x17c4, (q15_t)0x17ab, (q15_t)0x1792, (q15_t)0x177a,
+  (q15_t)0x1761, (q15_t)0x1748, (q15_t)0x1730, (q15_t)0x1717, (q15_t)0x16fe, (q15_t)0x16e5, (q15_t)0x16cd, (q15_t)0x16b4,
+  (q15_t)0x169b, (q15_t)0x1682, (q15_t)0x166a, (q15_t)0x1651, (q15_t)0x1638, (q15_t)0x161f, (q15_t)0x1607, (q15_t)0x15ee,
+  (q15_t)0x15d5, (q15_t)0x15bc, (q15_t)0x15a4, (q15_t)0x158b, (q15_t)0x1572, (q15_t)0x1559, (q15_t)0x1541, (q15_t)0x1528,
+  (q15_t)0x150f, (q15_t)0x14f6, (q15_t)0x14dd, (q15_t)0x14c5, (q15_t)0x14ac, (q15_t)0x1493, (q15_t)0x147a, (q15_t)0x1461,
+  (q15_t)0x1449, (q15_t)0x1430, (q15_t)0x1417, (q15_t)0x13fe, (q15_t)0x13e5, (q15_t)0x13cc, (q15_t)0x13b4, (q15_t)0x139b,
+  (q15_t)0x1382, (q15_t)0x1369, (q15_t)0x1350, (q15_t)0x1337, (q15_t)0x131f, (q15_t)0x1306, (q15_t)0x12ed, (q15_t)0x12d4,
+  (q15_t)0x12bb, (q15_t)0x12a2, (q15_t)0x1289, (q15_t)0x1271, (q15_t)0x1258, (q15_t)0x123f, (q15_t)0x1226, (q15_t)0x120d,
+  (q15_t)0x11f4, (q15_t)0x11db, (q15_t)0x11c2, (q15_t)0x11a9, (q15_t)0x1191, (q15_t)0x1178, (q15_t)0x115f, (q15_t)0x1146,
+  (q15_t)0x112d, (q15_t)0x1114, (q15_t)0x10fb, (q15_t)0x10e2, (q15_t)0x10c9, (q15_t)0x10b0, (q15_t)0x1098, (q15_t)0x107f,
+  (q15_t)0x1066, (q15_t)0x104d, (q15_t)0x1034, (q15_t)0x101b, (q15_t)0x1002, (q15_t)0xfe9, (q15_t)0xfd0, (q15_t)0xfb7,
+  (q15_t)0xf9e, (q15_t)0xf85, (q15_t)0xf6c, (q15_t)0xf53, (q15_t)0xf3a, (q15_t)0xf21, (q15_t)0xf08, (q15_t)0xef0,
+  (q15_t)0xed7, (q15_t)0xebe, (q15_t)0xea5, (q15_t)0xe8c, (q15_t)0xe73, (q15_t)0xe5a, (q15_t)0xe41, (q15_t)0xe28,
+  (q15_t)0xe0f, (q15_t)0xdf6, (q15_t)0xddd, (q15_t)0xdc4, (q15_t)0xdab, (q15_t)0xd92, (q15_t)0xd79, (q15_t)0xd60,
+  (q15_t)0xd47, (q15_t)0xd2e, (q15_t)0xd15, (q15_t)0xcfc, (q15_t)0xce3, (q15_t)0xcca, (q15_t)0xcb1, (q15_t)0xc98,
+  (q15_t)0xc7f, (q15_t)0xc66, (q15_t)0xc4d, (q15_t)0xc34, (q15_t)0xc1b, (q15_t)0xc02, (q15_t)0xbe9, (q15_t)0xbd0,
+  (q15_t)0xbb7, (q15_t)0xb9e, (q15_t)0xb85, (q15_t)0xb6c, (q15_t)0xb53, (q15_t)0xb3a, (q15_t)0xb20, (q15_t)0xb07,
+  (q15_t)0xaee, (q15_t)0xad5, (q15_t)0xabc, (q15_t)0xaa3, (q15_t)0xa8a, (q15_t)0xa71, (q15_t)0xa58, (q15_t)0xa3f,
+  (q15_t)0xa26, (q15_t)0xa0d, (q15_t)0x9f4, (q15_t)0x9db, (q15_t)0x9c2, (q15_t)0x9a9, (q15_t)0x990, (q15_t)0x977,
+  (q15_t)0x95e, (q15_t)0x944, (q15_t)0x92b, (q15_t)0x912, (q15_t)0x8f9, (q15_t)0x8e0, (q15_t)0x8c7, (q15_t)0x8ae,
+  (q15_t)0x895, (q15_t)0x87c, (q15_t)0x863, (q15_t)0x84a, (q15_t)0x831, (q15_t)0x818, (q15_t)0x7fe, (q15_t)0x7e5,
+  (q15_t)0x7cc, (q15_t)0x7b3, (q15_t)0x79a, (q15_t)0x781, (q15_t)0x768, (q15_t)0x74f, (q15_t)0x736, (q15_t)0x71d,
+  (q15_t)0x704, (q15_t)0x6ea, (q15_t)0x6d1, (q15_t)0x6b8, (q15_t)0x69f, (q15_t)0x686, (q15_t)0x66d, (q15_t)0x654,
+  (q15_t)0x63b, (q15_t)0x622, (q15_t)0x609, (q15_t)0x5ef, (q15_t)0x5d6, (q15_t)0x5bd, (q15_t)0x5a4, (q15_t)0x58b,
+  (q15_t)0x572, (q15_t)0x559, (q15_t)0x540, (q15_t)0x527, (q15_t)0x50d, (q15_t)0x4f4, (q15_t)0x4db, (q15_t)0x4c2,
+  (q15_t)0x4a9, (q15_t)0x490, (q15_t)0x477, (q15_t)0x45e, (q15_t)0x445, (q15_t)0x42b, (q15_t)0x412, (q15_t)0x3f9,
+  (q15_t)0x3e0, (q15_t)0x3c7, (q15_t)0x3ae, (q15_t)0x395, (q15_t)0x37c, (q15_t)0x362, (q15_t)0x349, (q15_t)0x330,
+  (q15_t)0x317, (q15_t)0x2fe, (q15_t)0x2e5, (q15_t)0x2cc, (q15_t)0x2b3, (q15_t)0x299, (q15_t)0x280, (q15_t)0x267,
+  (q15_t)0x24e, (q15_t)0x235, (q15_t)0x21c, (q15_t)0x203, (q15_t)0x1ea, (q15_t)0x1d0, (q15_t)0x1b7, (q15_t)0x19e,
+  (q15_t)0x185, (q15_t)0x16c, (q15_t)0x153, (q15_t)0x13a, (q15_t)0x121, (q15_t)0x107, (q15_t)0xee, (q15_t)0xd5,
+  (q15_t)0xbc, (q15_t)0xa3, (q15_t)0x8a, (q15_t)0x71, (q15_t)0x57, (q15_t)0x3e, (q15_t)0x25, (q15_t)0xc
+
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    const q15_t __ALIGNED(4) WeightsQ15_8192[16384] = {
+  (q15_t)0x7fff, (q15_t)0x0, (q15_t)0x7fff, (q15_t)0xfffa, (q15_t)0x7fff, (q15_t)0xfff4, (q15_t)0x7fff, (q15_t)0xffee,
+  (q15_t)0x7fff, (q15_t)0xffe7, (q15_t)0x7fff, (q15_t)0xffe1, (q15_t)0x7fff, (q15_t)0xffdb, (q15_t)0x7fff, (q15_t)0xffd5,
+  (q15_t)0x7fff, (q15_t)0xffce, (q15_t)0x7fff, (q15_t)0xffc8, (q15_t)0x7fff, (q15_t)0xffc2, (q15_t)0x7fff, (q15_t)0xffbb,
+  (q15_t)0x7fff, (q15_t)0xffb5, (q15_t)0x7fff, (q15_t)0xffaf, (q15_t)0x7fff, (q15_t)0xffa9, (q15_t)0x7fff, (q15_t)0xffa2,
+  (q15_t)0x7fff, (q15_t)0xff9c, (q15_t)0x7fff, (q15_t)0xff96, (q15_t)0x7fff, (q15_t)0xff8f, (q15_t)0x7fff, (q15_t)0xff89,
+  (q15_t)0x7fff, (q15_t)0xff83, (q15_t)0x7fff, (q15_t)0xff7d, (q15_t)0x7fff, (q15_t)0xff76, (q15_t)0x7fff, (q15_t)0xff70,
+  (q15_t)0x7fff, (q15_t)0xff6a, (q15_t)0x7fff, (q15_t)0xff63, (q15_t)0x7fff, (q15_t)0xff5d, (q15_t)0x7fff, (q15_t)0xff57,
+  (q15_t)0x7fff, (q15_t)0xff51, (q15_t)0x7fff, (q15_t)0xff4a, (q15_t)0x7fff, (q15_t)0xff44, (q15_t)0x7fff, (q15_t)0xff3e,
+  (q15_t)0x7fff, (q15_t)0xff37, (q15_t)0x7fff, (q15_t)0xff31, (q15_t)0x7fff, (q15_t)0xff2b, (q15_t)0x7fff, (q15_t)0xff25,
+  (q15_t)0x7fff, (q15_t)0xff1e, (q15_t)0x7fff, (q15_t)0xff18, (q15_t)0x7fff, (q15_t)0xff12, (q15_t)0x7fff, (q15_t)0xff0b,
+  (q15_t)0x7fff, (q15_t)0xff05, (q15_t)0x7ffe, (q15_t)0xfeff, (q15_t)0x7ffe, (q15_t)0xfef9, (q15_t)0x7ffe, (q15_t)0xfef2,
+  (q15_t)0x7ffe, (q15_t)0xfeec, (q15_t)0x7ffe, (q15_t)0xfee6, (q15_t)0x7ffe, (q15_t)0xfedf, (q15_t)0x7ffe, (q15_t)0xfed9,
+  (q15_t)0x7ffe, (q15_t)0xfed3, (q15_t)0x7ffe, (q15_t)0xfecd, (q15_t)0x7ffe, (q15_t)0xfec6, (q15_t)0x7ffe, (q15_t)0xfec0,
+  (q15_t)0x7ffe, (q15_t)0xfeba, (q15_t)0x7ffe, (q15_t)0xfeb3, (q15_t)0x7ffe, (q15_t)0xfead, (q15_t)0x7ffe, (q15_t)0xfea7,
+  (q15_t)0x7ffe, (q15_t)0xfea1, (q15_t)0x7ffe, (q15_t)0xfe9a, (q15_t)0x7ffd, (q15_t)0xfe94, (q15_t)0x7ffd, (q15_t)0xfe8e,
+  (q15_t)0x7ffd, (q15_t)0xfe88, (q15_t)0x7ffd, (q15_t)0xfe81, (q15_t)0x7ffd, (q15_t)0xfe7b, (q15_t)0x7ffd, (q15_t)0xfe75,
+  (q15_t)0x7ffd, (q15_t)0xfe6e, (q15_t)0x7ffd, (q15_t)0xfe68, (q15_t)0x7ffd, (q15_t)0xfe62, (q15_t)0x7ffd, (q15_t)0xfe5c,
+  (q15_t)0x7ffd, (q15_t)0xfe55, (q15_t)0x7ffd, (q15_t)0xfe4f, (q15_t)0x7ffd, (q15_t)0xfe49, (q15_t)0x7ffc, (q15_t)0xfe42,
+  (q15_t)0x7ffc, (q15_t)0xfe3c, (q15_t)0x7ffc, (q15_t)0xfe36, (q15_t)0x7ffc, (q15_t)0xfe30, (q15_t)0x7ffc, (q15_t)0xfe29,
+  (q15_t)0x7ffc, (q15_t)0xfe23, (q15_t)0x7ffc, (q15_t)0xfe1d, (q15_t)0x7ffc, (q15_t)0xfe16, (q15_t)0x7ffc, (q15_t)0xfe10,
+  (q15_t)0x7ffc, (q15_t)0xfe0a, (q15_t)0x7ffc, (q15_t)0xfe04, (q15_t)0x7ffb, (q15_t)0xfdfd, (q15_t)0x7ffb, (q15_t)0xfdf7,
+  (q15_t)0x7ffb, (q15_t)0xfdf1, (q15_t)0x7ffb, (q15_t)0xfdea, (q15_t)0x7ffb, (q15_t)0xfde4, (q15_t)0x7ffb, (q15_t)0xfdde,
+  (q15_t)0x7ffb, (q15_t)0xfdd8, (q15_t)0x7ffb, (q15_t)0xfdd1, (q15_t)0x7ffb, (q15_t)0xfdcb, (q15_t)0x7ffb, (q15_t)0xfdc5,
+  (q15_t)0x7ffa, (q15_t)0xfdbe, (q15_t)0x7ffa, (q15_t)0xfdb8, (q15_t)0x7ffa, (q15_t)0xfdb2, (q15_t)0x7ffa, (q15_t)0xfdac,
+  (q15_t)0x7ffa, (q15_t)0xfda5, (q15_t)0x7ffa, (q15_t)0xfd9f, (q15_t)0x7ffa, (q15_t)0xfd99, (q15_t)0x7ffa, (q15_t)0xfd93,
+  (q15_t)0x7ff9, (q15_t)0xfd8c, (q15_t)0x7ff9, (q15_t)0xfd86, (q15_t)0x7ff9, (q15_t)0xfd80, (q15_t)0x7ff9, (q15_t)0xfd79,
+  (q15_t)0x7ff9, (q15_t)0xfd73, (q15_t)0x7ff9, (q15_t)0xfd6d, (q15_t)0x7ff9, (q15_t)0xfd67, (q15_t)0x7ff9, (q15_t)0xfd60,
+  (q15_t)0x7ff8, (q15_t)0xfd5a, (q15_t)0x7ff8, (q15_t)0xfd54, (q15_t)0x7ff8, (q15_t)0xfd4d, (q15_t)0x7ff8, (q15_t)0xfd47,
+  (q15_t)0x7ff8, (q15_t)0xfd41, (q15_t)0x7ff8, (q15_t)0xfd3b, (q15_t)0x7ff8, (q15_t)0xfd34, (q15_t)0x7ff8, (q15_t)0xfd2e,
+  (q15_t)0x7ff7, (q15_t)0xfd28, (q15_t)0x7ff7, (q15_t)0xfd21, (q15_t)0x7ff7, (q15_t)0xfd1b, (q15_t)0x7ff7, (q15_t)0xfd15,
+  (q15_t)0x7ff7, (q15_t)0xfd0f, (q15_t)0x7ff7, (q15_t)0xfd08, (q15_t)0x7ff7, (q15_t)0xfd02, (q15_t)0x7ff6, (q15_t)0xfcfc,
+  (q15_t)0x7ff6, (q15_t)0xfcf5, (q15_t)0x7ff6, (q15_t)0xfcef, (q15_t)0x7ff6, (q15_t)0xfce9, (q15_t)0x7ff6, (q15_t)0xfce3,
+  (q15_t)0x7ff6, (q15_t)0xfcdc, (q15_t)0x7ff5, (q15_t)0xfcd6, (q15_t)0x7ff5, (q15_t)0xfcd0, (q15_t)0x7ff5, (q15_t)0xfcc9,
+  (q15_t)0x7ff5, (q15_t)0xfcc3, (q15_t)0x7ff5, (q15_t)0xfcbd, (q15_t)0x7ff5, (q15_t)0xfcb7, (q15_t)0x7ff5, (q15_t)0xfcb0,
+  (q15_t)0x7ff4, (q15_t)0xfcaa, (q15_t)0x7ff4, (q15_t)0xfca4, (q15_t)0x7ff4, (q15_t)0xfc9e, (q15_t)0x7ff4, (q15_t)0xfc97,
+  (q15_t)0x7ff4, (q15_t)0xfc91, (q15_t)0x7ff4, (q15_t)0xfc8b, (q15_t)0x7ff3, (q15_t)0xfc84, (q15_t)0x7ff3, (q15_t)0xfc7e,
+  (q15_t)0x7ff3, (q15_t)0xfc78, (q15_t)0x7ff3, (q15_t)0xfc72, (q15_t)0x7ff3, (q15_t)0xfc6b, (q15_t)0x7ff2, (q15_t)0xfc65,
+  (q15_t)0x7ff2, (q15_t)0xfc5f, (q15_t)0x7ff2, (q15_t)0xfc58, (q15_t)0x7ff2, (q15_t)0xfc52, (q15_t)0x7ff2, (q15_t)0xfc4c,
+  (q15_t)0x7ff2, (q15_t)0xfc46, (q15_t)0x7ff1, (q15_t)0xfc3f, (q15_t)0x7ff1, (q15_t)0xfc39, (q15_t)0x7ff1, (q15_t)0xfc33,
+  (q15_t)0x7ff1, (q15_t)0xfc2c, (q15_t)0x7ff1, (q15_t)0xfc26, (q15_t)0x7ff0, (q15_t)0xfc20, (q15_t)0x7ff0, (q15_t)0xfc1a,
+  (q15_t)0x7ff0, (q15_t)0xfc13, (q15_t)0x7ff0, (q15_t)0xfc0d, (q15_t)0x7ff0, (q15_t)0xfc07, (q15_t)0x7fef, (q15_t)0xfc01,
+  (q15_t)0x7fef, (q15_t)0xfbfa, (q15_t)0x7fef, (q15_t)0xfbf4, (q15_t)0x7fef, (q15_t)0xfbee, (q15_t)0x7fef, (q15_t)0xfbe7,
+  (q15_t)0x7fee, (q15_t)0xfbe1, (q15_t)0x7fee, (q15_t)0xfbdb, (q15_t)0x7fee, (q15_t)0xfbd5, (q15_t)0x7fee, (q15_t)0xfbce,
+  (q15_t)0x7fee, (q15_t)0xfbc8, (q15_t)0x7fed, (q15_t)0xfbc2, (q15_t)0x7fed, (q15_t)0xfbbb, (q15_t)0x7fed, (q15_t)0xfbb5,
+  (q15_t)0x7fed, (q15_t)0xfbaf, (q15_t)0x7fed, (q15_t)0xfba9, (q15_t)0x7fec, (q15_t)0xfba2, (q15_t)0x7fec, (q15_t)0xfb9c,
+  (q15_t)0x7fec, (q15_t)0xfb96, (q15_t)0x7fec, (q15_t)0xfb8f, (q15_t)0x7fec, (q15_t)0xfb89, (q15_t)0x7feb, (q15_t)0xfb83,
+  (q15_t)0x7feb, (q15_t)0xfb7d, (q15_t)0x7feb, (q15_t)0xfb76, (q15_t)0x7feb, (q15_t)0xfb70, (q15_t)0x7fea, (q15_t)0xfb6a,
+  (q15_t)0x7fea, (q15_t)0xfb64, (q15_t)0x7fea, (q15_t)0xfb5d, (q15_t)0x7fea, (q15_t)0xfb57, (q15_t)0x7fea, (q15_t)0xfb51,
+  (q15_t)0x7fe9, (q15_t)0xfb4a, (q15_t)0x7fe9, (q15_t)0xfb44, (q15_t)0x7fe9, (q15_t)0xfb3e, (q15_t)0x7fe9, (q15_t)0xfb38,
+  (q15_t)0x7fe8, (q15_t)0xfb31, (q15_t)0x7fe8, (q15_t)0xfb2b, (q15_t)0x7fe8, (q15_t)0xfb25, (q15_t)0x7fe8, (q15_t)0xfb1e,
+  (q15_t)0x7fe7, (q15_t)0xfb18, (q15_t)0x7fe7, (q15_t)0xfb12, (q15_t)0x7fe7, (q15_t)0xfb0c, (q15_t)0x7fe7, (q15_t)0xfb05,
+  (q15_t)0x7fe6, (q15_t)0xfaff, (q15_t)0x7fe6, (q15_t)0xfaf9, (q15_t)0x7fe6, (q15_t)0xfaf3, (q15_t)0x7fe6, (q15_t)0xfaec,
+  (q15_t)0x7fe5, (q15_t)0xfae6, (q15_t)0x7fe5, (q15_t)0xfae0, (q15_t)0x7fe5, (q15_t)0xfad9, (q15_t)0x7fe5, (q15_t)0xfad3,
+  (q15_t)0x7fe4, (q15_t)0xfacd, (q15_t)0x7fe4, (q15_t)0xfac7, (q15_t)0x7fe4, (q15_t)0xfac0, (q15_t)0x7fe4, (q15_t)0xfaba,
+  (q15_t)0x7fe3, (q15_t)0xfab4, (q15_t)0x7fe3, (q15_t)0xfaad, (q15_t)0x7fe3, (q15_t)0xfaa7, (q15_t)0x7fe3, (q15_t)0xfaa1,
+  (q15_t)0x7fe2, (q15_t)0xfa9b, (q15_t)0x7fe2, (q15_t)0xfa94, (q15_t)0x7fe2, (q15_t)0xfa8e, (q15_t)0x7fe2, (q15_t)0xfa88,
+  (q15_t)0x7fe1, (q15_t)0xfa81, (q15_t)0x7fe1, (q15_t)0xfa7b, (q15_t)0x7fe1, (q15_t)0xfa75, (q15_t)0x7fe0, (q15_t)0xfa6f,
+  (q15_t)0x7fe0, (q15_t)0xfa68, (q15_t)0x7fe0, (q15_t)0xfa62, (q15_t)0x7fe0, (q15_t)0xfa5c, (q15_t)0x7fdf, (q15_t)0xfa56,
+  (q15_t)0x7fdf, (q15_t)0xfa4f, (q15_t)0x7fdf, (q15_t)0xfa49, (q15_t)0x7fdf, (q15_t)0xfa43, (q15_t)0x7fde, (q15_t)0xfa3c,
+  (q15_t)0x7fde, (q15_t)0xfa36, (q15_t)0x7fde, (q15_t)0xfa30, (q15_t)0x7fdd, (q15_t)0xfa2a, (q15_t)0x7fdd, (q15_t)0xfa23,
+  (q15_t)0x7fdd, (q15_t)0xfa1d, (q15_t)0x7fdd, (q15_t)0xfa17, (q15_t)0x7fdc, (q15_t)0xfa11, (q15_t)0x7fdc, (q15_t)0xfa0a,
+  (q15_t)0x7fdc, (q15_t)0xfa04, (q15_t)0x7fdb, (q15_t)0xf9fe, (q15_t)0x7fdb, (q15_t)0xf9f7, (q15_t)0x7fdb, (q15_t)0xf9f1,
+  (q15_t)0x7fda, (q15_t)0xf9eb, (q15_t)0x7fda, (q15_t)0xf9e5, (q15_t)0x7fda, (q15_t)0xf9de, (q15_t)0x7fda, (q15_t)0xf9d8,
+  (q15_t)0x7fd9, (q15_t)0xf9d2, (q15_t)0x7fd9, (q15_t)0xf9cb, (q15_t)0x7fd9, (q15_t)0xf9c5, (q15_t)0x7fd8, (q15_t)0xf9bf,
+  (q15_t)0x7fd8, (q15_t)0xf9b9, (q15_t)0x7fd8, (q15_t)0xf9b2, (q15_t)0x7fd7, (q15_t)0xf9ac, (q15_t)0x7fd7, (q15_t)0xf9a6,
+  (q15_t)0x7fd7, (q15_t)0xf9a0, (q15_t)0x7fd6, (q15_t)0xf999, (q15_t)0x7fd6, (q15_t)0xf993, (q15_t)0x7fd6, (q15_t)0xf98d,
+  (q15_t)0x7fd6, (q15_t)0xf986, (q15_t)0x7fd5, (q15_t)0xf980, (q15_t)0x7fd5, (q15_t)0xf97a, (q15_t)0x7fd5, (q15_t)0xf974,
+  (q15_t)0x7fd4, (q15_t)0xf96d, (q15_t)0x7fd4, (q15_t)0xf967, (q15_t)0x7fd4, (q15_t)0xf961, (q15_t)0x7fd3, (q15_t)0xf95b,
+  (q15_t)0x7fd3, (q15_t)0xf954, (q15_t)0x7fd3, (q15_t)0xf94e, (q15_t)0x7fd2, (q15_t)0xf948, (q15_t)0x7fd2, (q15_t)0xf941,
+  (q15_t)0x7fd2, (q15_t)0xf93b, (q15_t)0x7fd1, (q15_t)0xf935, (q15_t)0x7fd1, (q15_t)0xf92f, (q15_t)0x7fd1, (q15_t)0xf928,
+  (q15_t)0x7fd0, (q15_t)0xf922, (q15_t)0x7fd0, (q15_t)0xf91c, (q15_t)0x7fd0, (q15_t)0xf916, (q15_t)0x7fcf, (q15_t)0xf90f,
+  (q15_t)0x7fcf, (q15_t)0xf909, (q15_t)0x7fcf, (q15_t)0xf903, (q15_t)0x7fce, (q15_t)0xf8fc, (q15_t)0x7fce, (q15_t)0xf8f6,
+  (q15_t)0x7fce, (q15_t)0xf8f0, (q15_t)0x7fcd, (q15_t)0xf8ea, (q15_t)0x7fcd, (q15_t)0xf8e3, (q15_t)0x7fcd, (q15_t)0xf8dd,
+  (q15_t)0x7fcc, (q15_t)0xf8d7, (q15_t)0x7fcc, (q15_t)0xf8d0, (q15_t)0x7fcb, (q15_t)0xf8ca, (q15_t)0x7fcb, (q15_t)0xf8c4,
+  (q15_t)0x7fcb, (q15_t)0xf8be, (q15_t)0x7fca, (q15_t)0xf8b7, (q15_t)0x7fca, (q15_t)0xf8b1, (q15_t)0x7fca, (q15_t)0xf8ab,
+  (q15_t)0x7fc9, (q15_t)0xf8a5, (q15_t)0x7fc9, (q15_t)0xf89e, (q15_t)0x7fc9, (q15_t)0xf898, (q15_t)0x7fc8, (q15_t)0xf892,
+  (q15_t)0x7fc8, (q15_t)0xf88b, (q15_t)0x7fc7, (q15_t)0xf885, (q15_t)0x7fc7, (q15_t)0xf87f, (q15_t)0x7fc7, (q15_t)0xf879,
+  (q15_t)0x7fc6, (q15_t)0xf872, (q15_t)0x7fc6, (q15_t)0xf86c, (q15_t)0x7fc6, (q15_t)0xf866, (q15_t)0x7fc5, (q15_t)0xf860,
+  (q15_t)0x7fc5, (q15_t)0xf859, (q15_t)0x7fc5, (q15_t)0xf853, (q15_t)0x7fc4, (q15_t)0xf84d, (q15_t)0x7fc4, (q15_t)0xf846,
+  (q15_t)0x7fc3, (q15_t)0xf840, (q15_t)0x7fc3, (q15_t)0xf83a, (q15_t)0x7fc3, (q15_t)0xf834, (q15_t)0x7fc2, (q15_t)0xf82d,
+  (q15_t)0x7fc2, (q15_t)0xf827, (q15_t)0x7fc1, (q15_t)0xf821, (q15_t)0x7fc1, (q15_t)0xf81b, (q15_t)0x7fc1, (q15_t)0xf814,
+  (q15_t)0x7fc0, (q15_t)0xf80e, (q15_t)0x7fc0, (q15_t)0xf808, (q15_t)0x7fc0, (q15_t)0xf802, (q15_t)0x7fbf, (q15_t)0xf7fb,
+  (q15_t)0x7fbf, (q15_t)0xf7f5, (q15_t)0x7fbe, (q15_t)0xf7ef, (q15_t)0x7fbe, (q15_t)0xf7e8, (q15_t)0x7fbe, (q15_t)0xf7e2,
+  (q15_t)0x7fbd, (q15_t)0xf7dc, (q15_t)0x7fbd, (q15_t)0xf7d6, (q15_t)0x7fbc, (q15_t)0xf7cf, (q15_t)0x7fbc, (q15_t)0xf7c9,
+  (q15_t)0x7fbc, (q15_t)0xf7c3, (q15_t)0x7fbb, (q15_t)0xf7bd, (q15_t)0x7fbb, (q15_t)0xf7b6, (q15_t)0x7fba, (q15_t)0xf7b0,
+  (q15_t)0x7fba, (q15_t)0xf7aa, (q15_t)0x7fb9, (q15_t)0xf7a3, (q15_t)0x7fb9, (q15_t)0xf79d, (q15_t)0x7fb9, (q15_t)0xf797,
+  (q15_t)0x7fb8, (q15_t)0xf791, (q15_t)0x7fb8, (q15_t)0xf78a, (q15_t)0x7fb7, (q15_t)0xf784, (q15_t)0x7fb7, (q15_t)0xf77e,
+  (q15_t)0x7fb7, (q15_t)0xf778, (q15_t)0x7fb6, (q15_t)0xf771, (q15_t)0x7fb6, (q15_t)0xf76b, (q15_t)0x7fb5, (q15_t)0xf765,
+  (q15_t)0x7fb5, (q15_t)0xf75e, (q15_t)0x7fb4, (q15_t)0xf758, (q15_t)0x7fb4, (q15_t)0xf752, (q15_t)0x7fb4, (q15_t)0xf74c,
+  (q15_t)0x7fb3, (q15_t)0xf745, (q15_t)0x7fb3, (q15_t)0xf73f, (q15_t)0x7fb2, (q15_t)0xf739, (q15_t)0x7fb2, (q15_t)0xf733,
+  (q15_t)0x7fb1, (q15_t)0xf72c, (q15_t)0x7fb1, (q15_t)0xf726, (q15_t)0x7fb1, (q15_t)0xf720, (q15_t)0x7fb0, (q15_t)0xf71a,
+  (q15_t)0x7fb0, (q15_t)0xf713, (q15_t)0x7faf, (q15_t)0xf70d, (q15_t)0x7faf, (q15_t)0xf707, (q15_t)0x7fae, (q15_t)0xf700,
+  (q15_t)0x7fae, (q15_t)0xf6fa, (q15_t)0x7fae, (q15_t)0xf6f4, (q15_t)0x7fad, (q15_t)0xf6ee, (q15_t)0x7fad, (q15_t)0xf6e7,
+  (q15_t)0x7fac, (q15_t)0xf6e1, (q15_t)0x7fac, (q15_t)0xf6db, (q15_t)0x7fab, (q15_t)0xf6d5, (q15_t)0x7fab, (q15_t)0xf6ce,
+  (q15_t)0x7faa, (q15_t)0xf6c8, (q15_t)0x7faa, (q15_t)0xf6c2, (q15_t)0x7fa9, (q15_t)0xf6bc, (q15_t)0x7fa9, (q15_t)0xf6b5,
+  (q15_t)0x7fa9, (q15_t)0xf6af, (q15_t)0x7fa8, (q15_t)0xf6a9, (q15_t)0x7fa8, (q15_t)0xf6a2, (q15_t)0x7fa7, (q15_t)0xf69c,
+  (q15_t)0x7fa7, (q15_t)0xf696, (q15_t)0x7fa6, (q15_t)0xf690, (q15_t)0x7fa6, (q15_t)0xf689, (q15_t)0x7fa5, (q15_t)0xf683,
+  (q15_t)0x7fa5, (q15_t)0xf67d, (q15_t)0x7fa4, (q15_t)0xf677, (q15_t)0x7fa4, (q15_t)0xf670, (q15_t)0x7fa3, (q15_t)0xf66a,
+  (q15_t)0x7fa3, (q15_t)0xf664, (q15_t)0x7fa3, (q15_t)0xf65e, (q15_t)0x7fa2, (q15_t)0xf657, (q15_t)0x7fa2, (q15_t)0xf651,
+  (q15_t)0x7fa1, (q15_t)0xf64b, (q15_t)0x7fa1, (q15_t)0xf644, (q15_t)0x7fa0, (q15_t)0xf63e, (q15_t)0x7fa0, (q15_t)0xf638,
+  (q15_t)0x7f9f, (q15_t)0xf632, (q15_t)0x7f9f, (q15_t)0xf62b, (q15_t)0x7f9e, (q15_t)0xf625, (q15_t)0x7f9e, (q15_t)0xf61f,
+  (q15_t)0x7f9d, (q15_t)0xf619, (q15_t)0x7f9d, (q15_t)0xf612, (q15_t)0x7f9c, (q15_t)0xf60c, (q15_t)0x7f9c, (q15_t)0xf606,
+  (q15_t)0x7f9b, (q15_t)0xf600, (q15_t)0x7f9b, (q15_t)0xf5f9, (q15_t)0x7f9a, (q15_t)0xf5f3, (q15_t)0x7f9a, (q15_t)0xf5ed,
+  (q15_t)0x7f99, (q15_t)0xf5e7, (q15_t)0x7f99, (q15_t)0xf5e0, (q15_t)0x7f98, (q15_t)0xf5da, (q15_t)0x7f98, (q15_t)0xf5d4,
+  (q15_t)0x7f97, (q15_t)0xf5cd, (q15_t)0x7f97, (q15_t)0xf5c7, (q15_t)0x7f96, (q15_t)0xf5c1, (q15_t)0x7f96, (q15_t)0xf5bb,
+  (q15_t)0x7f95, (q15_t)0xf5b4, (q15_t)0x7f95, (q15_t)0xf5ae, (q15_t)0x7f94, (q15_t)0xf5a8, (q15_t)0x7f94, (q15_t)0xf5a2,
+  (q15_t)0x7f93, (q15_t)0xf59b, (q15_t)0x7f93, (q15_t)0xf595, (q15_t)0x7f92, (q15_t)0xf58f, (q15_t)0x7f92, (q15_t)0xf589,
+  (q15_t)0x7f91, (q15_t)0xf582, (q15_t)0x7f91, (q15_t)0xf57c, (q15_t)0x7f90, (q15_t)0xf576, (q15_t)0x7f90, (q15_t)0xf570,
+  (q15_t)0x7f8f, (q15_t)0xf569, (q15_t)0x7f8f, (q15_t)0xf563, (q15_t)0x7f8e, (q15_t)0xf55d, (q15_t)0x7f8e, (q15_t)0xf556,
+  (q15_t)0x7f8d, (q15_t)0xf550, (q15_t)0x7f8d, (q15_t)0xf54a, (q15_t)0x7f8c, (q15_t)0xf544, (q15_t)0x7f8b, (q15_t)0xf53d,
+  (q15_t)0x7f8b, (q15_t)0xf537, (q15_t)0x7f8a, (q15_t)0xf531, (q15_t)0x7f8a, (q15_t)0xf52b, (q15_t)0x7f89, (q15_t)0xf524,
+  (q15_t)0x7f89, (q15_t)0xf51e, (q15_t)0x7f88, (q15_t)0xf518, (q15_t)0x7f88, (q15_t)0xf512, (q15_t)0x7f87, (q15_t)0xf50b,
+  (q15_t)0x7f87, (q15_t)0xf505, (q15_t)0x7f86, (q15_t)0xf4ff, (q15_t)0x7f86, (q15_t)0xf4f9, (q15_t)0x7f85, (q15_t)0xf4f2,
+  (q15_t)0x7f85, (q15_t)0xf4ec, (q15_t)0x7f84, (q15_t)0xf4e6, (q15_t)0x7f83, (q15_t)0xf4e0, (q15_t)0x7f83, (q15_t)0xf4d9,
+  (q15_t)0x7f82, (q15_t)0xf4d3, (q15_t)0x7f82, (q15_t)0xf4cd, (q15_t)0x7f81, (q15_t)0xf4c6, (q15_t)0x7f81, (q15_t)0xf4c0,
+  (q15_t)0x7f80, (q15_t)0xf4ba, (q15_t)0x7f80, (q15_t)0xf4b4, (q15_t)0x7f7f, (q15_t)0xf4ad, (q15_t)0x7f7e, (q15_t)0xf4a7,
+  (q15_t)0x7f7e, (q15_t)0xf4a1, (q15_t)0x7f7d, (q15_t)0xf49b, (q15_t)0x7f7d, (q15_t)0xf494, (q15_t)0x7f7c, (q15_t)0xf48e,
+  (q15_t)0x7f7c, (q15_t)0xf488, (q15_t)0x7f7b, (q15_t)0xf482, (q15_t)0x7f7b, (q15_t)0xf47b, (q15_t)0x7f7a, (q15_t)0xf475,
+  (q15_t)0x7f79, (q15_t)0xf46f, (q15_t)0x7f79, (q15_t)0xf469, (q15_t)0x7f78, (q15_t)0xf462, (q15_t)0x7f78, (q15_t)0xf45c,
+  (q15_t)0x7f77, (q15_t)0xf456, (q15_t)0x7f77, (q15_t)0xf450, (q15_t)0x7f76, (q15_t)0xf449, (q15_t)0x7f75, (q15_t)0xf443,
+  (q15_t)0x7f75, (q15_t)0xf43d, (q15_t)0x7f74, (q15_t)0xf437, (q15_t)0x7f74, (q15_t)0xf430, (q15_t)0x7f73, (q15_t)0xf42a,
+  (q15_t)0x7f72, (q15_t)0xf424, (q15_t)0x7f72, (q15_t)0xf41e, (q15_t)0x7f71, (q15_t)0xf417, (q15_t)0x7f71, (q15_t)0xf411,
+  (q15_t)0x7f70, (q15_t)0xf40b, (q15_t)0x7f70, (q15_t)0xf405, (q15_t)0x7f6f, (q15_t)0xf3fe, (q15_t)0x7f6e, (q15_t)0xf3f8,
+  (q15_t)0x7f6e, (q15_t)0xf3f2, (q15_t)0x7f6d, (q15_t)0xf3ec, (q15_t)0x7f6d, (q15_t)0xf3e5, (q15_t)0x7f6c, (q15_t)0xf3df,
+  (q15_t)0x7f6b, (q15_t)0xf3d9, (q15_t)0x7f6b, (q15_t)0xf3d2, (q15_t)0x7f6a, (q15_t)0xf3cc, (q15_t)0x7f6a, (q15_t)0xf3c6,
+  (q15_t)0x7f69, (q15_t)0xf3c0, (q15_t)0x7f68, (q15_t)0xf3b9, (q15_t)0x7f68, (q15_t)0xf3b3, (q15_t)0x7f67, (q15_t)0xf3ad,
+  (q15_t)0x7f67, (q15_t)0xf3a7, (q15_t)0x7f66, (q15_t)0xf3a0, (q15_t)0x7f65, (q15_t)0xf39a, (q15_t)0x7f65, (q15_t)0xf394,
+  (q15_t)0x7f64, (q15_t)0xf38e, (q15_t)0x7f64, (q15_t)0xf387, (q15_t)0x7f63, (q15_t)0xf381, (q15_t)0x7f62, (q15_t)0xf37b,
+  (q15_t)0x7f62, (q15_t)0xf375, (q15_t)0x7f61, (q15_t)0xf36e, (q15_t)0x7f60, (q15_t)0xf368, (q15_t)0x7f60, (q15_t)0xf362,
+  (q15_t)0x7f5f, (q15_t)0xf35c, (q15_t)0x7f5f, (q15_t)0xf355, (q15_t)0x7f5e, (q15_t)0xf34f, (q15_t)0x7f5d, (q15_t)0xf349,
+  (q15_t)0x7f5d, (q15_t)0xf343, (q15_t)0x7f5c, (q15_t)0xf33c, (q15_t)0x7f5b, (q15_t)0xf336, (q15_t)0x7f5b, (q15_t)0xf330,
+  (q15_t)0x7f5a, (q15_t)0xf32a, (q15_t)0x7f5a, (q15_t)0xf323, (q15_t)0x7f59, (q15_t)0xf31d, (q15_t)0x7f58, (q15_t)0xf317,
+  (q15_t)0x7f58, (q15_t)0xf311, (q15_t)0x7f57, (q15_t)0xf30a, (q15_t)0x7f56, (q15_t)0xf304, (q15_t)0x7f56, (q15_t)0xf2fe,
+  (q15_t)0x7f55, (q15_t)0xf2f8, (q15_t)0x7f55, (q15_t)0xf2f1, (q15_t)0x7f54, (q15_t)0xf2eb, (q15_t)0x7f53, (q15_t)0xf2e5,
+  (q15_t)0x7f53, (q15_t)0xf2df, (q15_t)0x7f52, (q15_t)0xf2d8, (q15_t)0x7f51, (q15_t)0xf2d2, (q15_t)0x7f51, (q15_t)0xf2cc,
+  (q15_t)0x7f50, (q15_t)0xf2c6, (q15_t)0x7f4f, (q15_t)0xf2bf, (q15_t)0x7f4f, (q15_t)0xf2b9, (q15_t)0x7f4e, (q15_t)0xf2b3,
+  (q15_t)0x7f4d, (q15_t)0xf2ad, (q15_t)0x7f4d, (q15_t)0xf2a6, (q15_t)0x7f4c, (q15_t)0xf2a0, (q15_t)0x7f4b, (q15_t)0xf29a,
+  (q15_t)0x7f4b, (q15_t)0xf294, (q15_t)0x7f4a, (q15_t)0xf28d, (q15_t)0x7f49, (q15_t)0xf287, (q15_t)0x7f49, (q15_t)0xf281,
+  (q15_t)0x7f48, (q15_t)0xf27b, (q15_t)0x7f47, (q15_t)0xf274, (q15_t)0x7f47, (q15_t)0xf26e, (q15_t)0x7f46, (q15_t)0xf268,
+  (q15_t)0x7f45, (q15_t)0xf262, (q15_t)0x7f45, (q15_t)0xf25b, (q15_t)0x7f44, (q15_t)0xf255, (q15_t)0x7f43, (q15_t)0xf24f,
+  (q15_t)0x7f43, (q15_t)0xf249, (q15_t)0x7f42, (q15_t)0xf242, (q15_t)0x7f41, (q15_t)0xf23c, (q15_t)0x7f41, (q15_t)0xf236,
+  (q15_t)0x7f40, (q15_t)0xf230, (q15_t)0x7f3f, (q15_t)0xf229, (q15_t)0x7f3f, (q15_t)0xf223, (q15_t)0x7f3e, (q15_t)0xf21d,
+  (q15_t)0x7f3d, (q15_t)0xf217, (q15_t)0x7f3d, (q15_t)0xf210, (q15_t)0x7f3c, (q15_t)0xf20a, (q15_t)0x7f3b, (q15_t)0xf204,
+  (q15_t)0x7f3b, (q15_t)0xf1fe, (q15_t)0x7f3a, (q15_t)0xf1f7, (q15_t)0x7f39, (q15_t)0xf1f1, (q15_t)0x7f39, (q15_t)0xf1eb,
+  (q15_t)0x7f38, (q15_t)0xf1e5, (q15_t)0x7f37, (q15_t)0xf1de, (q15_t)0x7f36, (q15_t)0xf1d8, (q15_t)0x7f36, (q15_t)0xf1d2,
+  (q15_t)0x7f35, (q15_t)0xf1cc, (q15_t)0x7f34, (q15_t)0xf1c6, (q15_t)0x7f34, (q15_t)0xf1bf, (q15_t)0x7f33, (q15_t)0xf1b9,
+  (q15_t)0x7f32, (q15_t)0xf1b3, (q15_t)0x7f32, (q15_t)0xf1ad, (q15_t)0x7f31, (q15_t)0xf1a6, (q15_t)0x7f30, (q15_t)0xf1a0,
+  (q15_t)0x7f2f, (q15_t)0xf19a, (q15_t)0x7f2f, (q15_t)0xf194, (q15_t)0x7f2e, (q15_t)0xf18d, (q15_t)0x7f2d, (q15_t)0xf187,
+  (q15_t)0x7f2d, (q15_t)0xf181, (q15_t)0x7f2c, (q15_t)0xf17b, (q15_t)0x7f2b, (q15_t)0xf174, (q15_t)0x7f2a, (q15_t)0xf16e,
+  (q15_t)0x7f2a, (q15_t)0xf168, (q15_t)0x7f29, (q15_t)0xf162, (q15_t)0x7f28, (q15_t)0xf15b, (q15_t)0x7f28, (q15_t)0xf155,
+  (q15_t)0x7f27, (q15_t)0xf14f, (q15_t)0x7f26, (q15_t)0xf149, (q15_t)0x7f25, (q15_t)0xf142, (q15_t)0x7f25, (q15_t)0xf13c,
+  (q15_t)0x7f24, (q15_t)0xf136, (q15_t)0x7f23, (q15_t)0xf130, (q15_t)0x7f23, (q15_t)0xf129, (q15_t)0x7f22, (q15_t)0xf123,
+  (q15_t)0x7f21, (q15_t)0xf11d, (q15_t)0x7f20, (q15_t)0xf117, (q15_t)0x7f20, (q15_t)0xf110, (q15_t)0x7f1f, (q15_t)0xf10a,
+  (q15_t)0x7f1e, (q15_t)0xf104, (q15_t)0x7f1d, (q15_t)0xf0fe, (q15_t)0x7f1d, (q15_t)0xf0f8, (q15_t)0x7f1c, (q15_t)0xf0f1,
+  (q15_t)0x7f1b, (q15_t)0xf0eb, (q15_t)0x7f1a, (q15_t)0xf0e5, (q15_t)0x7f1a, (q15_t)0xf0df, (q15_t)0x7f19, (q15_t)0xf0d8,
+  (q15_t)0x7f18, (q15_t)0xf0d2, (q15_t)0x7f17, (q15_t)0xf0cc, (q15_t)0x7f17, (q15_t)0xf0c6, (q15_t)0x7f16, (q15_t)0xf0bf,
+  (q15_t)0x7f15, (q15_t)0xf0b9, (q15_t)0x7f14, (q15_t)0xf0b3, (q15_t)0x7f14, (q15_t)0xf0ad, (q15_t)0x7f13, (q15_t)0xf0a6,
+  (q15_t)0x7f12, (q15_t)0xf0a0, (q15_t)0x7f11, (q15_t)0xf09a, (q15_t)0x7f11, (q15_t)0xf094, (q15_t)0x7f10, (q15_t)0xf08d,
+  (q15_t)0x7f0f, (q15_t)0xf087, (q15_t)0x7f0e, (q15_t)0xf081, (q15_t)0x7f0e, (q15_t)0xf07b, (q15_t)0x7f0d, (q15_t)0xf075,
+  (q15_t)0x7f0c, (q15_t)0xf06e, (q15_t)0x7f0b, (q15_t)0xf068, (q15_t)0x7f0b, (q15_t)0xf062, (q15_t)0x7f0a, (q15_t)0xf05c,
+  (q15_t)0x7f09, (q15_t)0xf055, (q15_t)0x7f08, (q15_t)0xf04f, (q15_t)0x7f08, (q15_t)0xf049, (q15_t)0x7f07, (q15_t)0xf043,
+  (q15_t)0x7f06, (q15_t)0xf03c, (q15_t)0x7f05, (q15_t)0xf036, (q15_t)0x7f04, (q15_t)0xf030, (q15_t)0x7f04, (q15_t)0xf02a,
+  (q15_t)0x7f03, (q15_t)0xf023, (q15_t)0x7f02, (q15_t)0xf01d, (q15_t)0x7f01, (q15_t)0xf017, (q15_t)0x7f01, (q15_t)0xf011,
+  (q15_t)0x7f00, (q15_t)0xf00b, (q15_t)0x7eff, (q15_t)0xf004, (q15_t)0x7efe, (q15_t)0xeffe, (q15_t)0x7efd, (q15_t)0xeff8,
+  (q15_t)0x7efd, (q15_t)0xeff2, (q15_t)0x7efc, (q15_t)0xefeb, (q15_t)0x7efb, (q15_t)0xefe5, (q15_t)0x7efa, (q15_t)0xefdf,
+  (q15_t)0x7ef9, (q15_t)0xefd9, (q15_t)0x7ef9, (q15_t)0xefd2, (q15_t)0x7ef8, (q15_t)0xefcc, (q15_t)0x7ef7, (q15_t)0xefc6,
+  (q15_t)0x7ef6, (q15_t)0xefc0, (q15_t)0x7ef5, (q15_t)0xefb9, (q15_t)0x7ef5, (q15_t)0xefb3, (q15_t)0x7ef4, (q15_t)0xefad,
+  (q15_t)0x7ef3, (q15_t)0xefa7, (q15_t)0x7ef2, (q15_t)0xefa1, (q15_t)0x7ef1, (q15_t)0xef9a, (q15_t)0x7ef1, (q15_t)0xef94,
+  (q15_t)0x7ef0, (q15_t)0xef8e, (q15_t)0x7eef, (q15_t)0xef88, (q15_t)0x7eee, (q15_t)0xef81, (q15_t)0x7eed, (q15_t)0xef7b,
+  (q15_t)0x7eed, (q15_t)0xef75, (q15_t)0x7eec, (q15_t)0xef6f, (q15_t)0x7eeb, (q15_t)0xef68, (q15_t)0x7eea, (q15_t)0xef62,
+  (q15_t)0x7ee9, (q15_t)0xef5c, (q15_t)0x7ee9, (q15_t)0xef56, (q15_t)0x7ee8, (q15_t)0xef50, (q15_t)0x7ee7, (q15_t)0xef49,
+  (q15_t)0x7ee6, (q15_t)0xef43, (q15_t)0x7ee5, (q15_t)0xef3d, (q15_t)0x7ee4, (q15_t)0xef37, (q15_t)0x7ee4, (q15_t)0xef30,
+  (q15_t)0x7ee3, (q15_t)0xef2a, (q15_t)0x7ee2, (q15_t)0xef24, (q15_t)0x7ee1, (q15_t)0xef1e, (q15_t)0x7ee0, (q15_t)0xef18,
+  (q15_t)0x7edf, (q15_t)0xef11, (q15_t)0x7edf, (q15_t)0xef0b, (q15_t)0x7ede, (q15_t)0xef05, (q15_t)0x7edd, (q15_t)0xeeff,
+  (q15_t)0x7edc, (q15_t)0xeef8, (q15_t)0x7edb, (q15_t)0xeef2, (q15_t)0x7eda, (q15_t)0xeeec, (q15_t)0x7eda, (q15_t)0xeee6,
+  (q15_t)0x7ed9, (q15_t)0xeedf, (q15_t)0x7ed8, (q15_t)0xeed9, (q15_t)0x7ed7, (q15_t)0xeed3, (q15_t)0x7ed6, (q15_t)0xeecd,
+  (q15_t)0x7ed5, (q15_t)0xeec7, (q15_t)0x7ed5, (q15_t)0xeec0, (q15_t)0x7ed4, (q15_t)0xeeba, (q15_t)0x7ed3, (q15_t)0xeeb4,
+  (q15_t)0x7ed2, (q15_t)0xeeae, (q15_t)0x7ed1, (q15_t)0xeea7, (q15_t)0x7ed0, (q15_t)0xeea1, (q15_t)0x7ecf, (q15_t)0xee9b,
+  (q15_t)0x7ecf, (q15_t)0xee95, (q15_t)0x7ece, (q15_t)0xee8f, (q15_t)0x7ecd, (q15_t)0xee88, (q15_t)0x7ecc, (q15_t)0xee82,
+  (q15_t)0x7ecb, (q15_t)0xee7c, (q15_t)0x7eca, (q15_t)0xee76, (q15_t)0x7ec9, (q15_t)0xee6f, (q15_t)0x7ec9, (q15_t)0xee69,
+  (q15_t)0x7ec8, (q15_t)0xee63, (q15_t)0x7ec7, (q15_t)0xee5d, (q15_t)0x7ec6, (q15_t)0xee57, (q15_t)0x7ec5, (q15_t)0xee50,
+  (q15_t)0x7ec4, (q15_t)0xee4a, (q15_t)0x7ec3, (q15_t)0xee44, (q15_t)0x7ec3, (q15_t)0xee3e, (q15_t)0x7ec2, (q15_t)0xee37,
+  (q15_t)0x7ec1, (q15_t)0xee31, (q15_t)0x7ec0, (q15_t)0xee2b, (q15_t)0x7ebf, (q15_t)0xee25, (q15_t)0x7ebe, (q15_t)0xee1f,
+  (q15_t)0x7ebd, (q15_t)0xee18, (q15_t)0x7ebc, (q15_t)0xee12, (q15_t)0x7ebb, (q15_t)0xee0c, (q15_t)0x7ebb, (q15_t)0xee06,
+  (q15_t)0x7eba, (q15_t)0xedff, (q15_t)0x7eb9, (q15_t)0xedf9, (q15_t)0x7eb8, (q15_t)0xedf3, (q15_t)0x7eb7, (q15_t)0xeded,
+  (q15_t)0x7eb6, (q15_t)0xede7, (q15_t)0x7eb5, (q15_t)0xede0, (q15_t)0x7eb4, (q15_t)0xedda, (q15_t)0x7eb4, (q15_t)0xedd4,
+  (q15_t)0x7eb3, (q15_t)0xedce, (q15_t)0x7eb2, (q15_t)0xedc7, (q15_t)0x7eb1, (q15_t)0xedc1, (q15_t)0x7eb0, (q15_t)0xedbb,
+  (q15_t)0x7eaf, (q15_t)0xedb5, (q15_t)0x7eae, (q15_t)0xedaf, (q15_t)0x7ead, (q15_t)0xeda8, (q15_t)0x7eac, (q15_t)0xeda2,
+  (q15_t)0x7eab, (q15_t)0xed9c, (q15_t)0x7eab, (q15_t)0xed96, (q15_t)0x7eaa, (q15_t)0xed8f, (q15_t)0x7ea9, (q15_t)0xed89,
+  (q15_t)0x7ea8, (q15_t)0xed83, (q15_t)0x7ea7, (q15_t)0xed7d, (q15_t)0x7ea6, (q15_t)0xed77, (q15_t)0x7ea5, (q15_t)0xed70,
+  (q15_t)0x7ea4, (q15_t)0xed6a, (q15_t)0x7ea3, (q15_t)0xed64, (q15_t)0x7ea2, (q15_t)0xed5e, (q15_t)0x7ea1, (q15_t)0xed58,
+  (q15_t)0x7ea1, (q15_t)0xed51, (q15_t)0x7ea0, (q15_t)0xed4b, (q15_t)0x7e9f, (q15_t)0xed45, (q15_t)0x7e9e, (q15_t)0xed3f,
+  (q15_t)0x7e9d, (q15_t)0xed38, (q15_t)0x7e9c, (q15_t)0xed32, (q15_t)0x7e9b, (q15_t)0xed2c, (q15_t)0x7e9a, (q15_t)0xed26,
+  (q15_t)0x7e99, (q15_t)0xed20, (q15_t)0x7e98, (q15_t)0xed19, (q15_t)0x7e97, (q15_t)0xed13, (q15_t)0x7e96, (q15_t)0xed0d,
+  (q15_t)0x7e95, (q15_t)0xed07, (q15_t)0x7e94, (q15_t)0xed01, (q15_t)0x7e94, (q15_t)0xecfa, (q15_t)0x7e93, (q15_t)0xecf4,
+  (q15_t)0x7e92, (q15_t)0xecee, (q15_t)0x7e91, (q15_t)0xece8, (q15_t)0x7e90, (q15_t)0xece1, (q15_t)0x7e8f, (q15_t)0xecdb,
+  (q15_t)0x7e8e, (q15_t)0xecd5, (q15_t)0x7e8d, (q15_t)0xeccf, (q15_t)0x7e8c, (q15_t)0xecc9, (q15_t)0x7e8b, (q15_t)0xecc2,
+  (q15_t)0x7e8a, (q15_t)0xecbc, (q15_t)0x7e89, (q15_t)0xecb6, (q15_t)0x7e88, (q15_t)0xecb0, (q15_t)0x7e87, (q15_t)0xecaa,
+  (q15_t)0x7e86, (q15_t)0xeca3, (q15_t)0x7e85, (q15_t)0xec9d, (q15_t)0x7e84, (q15_t)0xec97, (q15_t)0x7e84, (q15_t)0xec91,
+  (q15_t)0x7e83, (q15_t)0xec8a, (q15_t)0x7e82, (q15_t)0xec84, (q15_t)0x7e81, (q15_t)0xec7e, (q15_t)0x7e80, (q15_t)0xec78,
+  (q15_t)0x7e7f, (q15_t)0xec72, (q15_t)0x7e7e, (q15_t)0xec6b, (q15_t)0x7e7d, (q15_t)0xec65, (q15_t)0x7e7c, (q15_t)0xec5f,
+  (q15_t)0x7e7b, (q15_t)0xec59, (q15_t)0x7e7a, (q15_t)0xec53, (q15_t)0x7e79, (q15_t)0xec4c, (q15_t)0x7e78, (q15_t)0xec46,
+  (q15_t)0x7e77, (q15_t)0xec40, (q15_t)0x7e76, (q15_t)0xec3a, (q15_t)0x7e75, (q15_t)0xec34, (q15_t)0x7e74, (q15_t)0xec2d,
+  (q15_t)0x7e73, (q15_t)0xec27, (q15_t)0x7e72, (q15_t)0xec21, (q15_t)0x7e71, (q15_t)0xec1b, (q15_t)0x7e70, (q15_t)0xec15,
+  (q15_t)0x7e6f, (q15_t)0xec0e, (q15_t)0x7e6e, (q15_t)0xec08, (q15_t)0x7e6d, (q15_t)0xec02, (q15_t)0x7e6c, (q15_t)0xebfc,
+  (q15_t)0x7e6b, (q15_t)0xebf5, (q15_t)0x7e6a, (q15_t)0xebef, (q15_t)0x7e69, (q15_t)0xebe9, (q15_t)0x7e68, (q15_t)0xebe3,
+  (q15_t)0x7e67, (q15_t)0xebdd, (q15_t)0x7e66, (q15_t)0xebd6, (q15_t)0x7e65, (q15_t)0xebd0, (q15_t)0x7e64, (q15_t)0xebca,
+  (q15_t)0x7e63, (q15_t)0xebc4, (q15_t)0x7e62, (q15_t)0xebbe, (q15_t)0x7e61, (q15_t)0xebb7, (q15_t)0x7e60, (q15_t)0xebb1,
+  (q15_t)0x7e5f, (q15_t)0xebab, (q15_t)0x7e5e, (q15_t)0xeba5, (q15_t)0x7e5d, (q15_t)0xeb9f, (q15_t)0x7e5c, (q15_t)0xeb98,
+  (q15_t)0x7e5b, (q15_t)0xeb92, (q15_t)0x7e5a, (q15_t)0xeb8c, (q15_t)0x7e59, (q15_t)0xeb86, (q15_t)0x7e58, (q15_t)0xeb80,
+  (q15_t)0x7e57, (q15_t)0xeb79, (q15_t)0x7e56, (q15_t)0xeb73, (q15_t)0x7e55, (q15_t)0xeb6d, (q15_t)0x7e54, (q15_t)0xeb67,
+  (q15_t)0x7e53, (q15_t)0xeb61, (q15_t)0x7e52, (q15_t)0xeb5a, (q15_t)0x7e51, (q15_t)0xeb54, (q15_t)0x7e50, (q15_t)0xeb4e,
+  (q15_t)0x7e4f, (q15_t)0xeb48, (q15_t)0x7e4e, (q15_t)0xeb42, (q15_t)0x7e4d, (q15_t)0xeb3b, (q15_t)0x7e4c, (q15_t)0xeb35,
+  (q15_t)0x7e4b, (q15_t)0xeb2f, (q15_t)0x7e4a, (q15_t)0xeb29, (q15_t)0x7e49, (q15_t)0xeb23, (q15_t)0x7e48, (q15_t)0xeb1c,
+  (q15_t)0x7e47, (q15_t)0xeb16, (q15_t)0x7e46, (q15_t)0xeb10, (q15_t)0x7e45, (q15_t)0xeb0a, (q15_t)0x7e44, (q15_t)0xeb04,
+  (q15_t)0x7e43, (q15_t)0xeafd, (q15_t)0x7e42, (q15_t)0xeaf7, (q15_t)0x7e41, (q15_t)0xeaf1, (q15_t)0x7e40, (q15_t)0xeaeb,
+  (q15_t)0x7e3f, (q15_t)0xeae5, (q15_t)0x7e3e, (q15_t)0xeade, (q15_t)0x7e3d, (q15_t)0xead8, (q15_t)0x7e3c, (q15_t)0xead2,
+  (q15_t)0x7e3b, (q15_t)0xeacc, (q15_t)0x7e3a, (q15_t)0xeac6, (q15_t)0x7e39, (q15_t)0xeabf, (q15_t)0x7e38, (q15_t)0xeab9,
+  (q15_t)0x7e37, (q15_t)0xeab3, (q15_t)0x7e35, (q15_t)0xeaad, (q15_t)0x7e34, (q15_t)0xeaa7, (q15_t)0x7e33, (q15_t)0xeaa0,
+  (q15_t)0x7e32, (q15_t)0xea9a, (q15_t)0x7e31, (q15_t)0xea94, (q15_t)0x7e30, (q15_t)0xea8e, (q15_t)0x7e2f, (q15_t)0xea88,
+  (q15_t)0x7e2e, (q15_t)0xea81, (q15_t)0x7e2d, (q15_t)0xea7b, (q15_t)0x7e2c, (q15_t)0xea75, (q15_t)0x7e2b, (q15_t)0xea6f,
+  (q15_t)0x7e2a, (q15_t)0xea69, (q15_t)0x7e29, (q15_t)0xea63, (q15_t)0x7e28, (q15_t)0xea5c, (q15_t)0x7e27, (q15_t)0xea56,
+  (q15_t)0x7e26, (q15_t)0xea50, (q15_t)0x7e25, (q15_t)0xea4a, (q15_t)0x7e24, (q15_t)0xea44, (q15_t)0x7e22, (q15_t)0xea3d,
+  (q15_t)0x7e21, (q15_t)0xea37, (q15_t)0x7e20, (q15_t)0xea31, (q15_t)0x7e1f, (q15_t)0xea2b, (q15_t)0x7e1e, (q15_t)0xea25,
+  (q15_t)0x7e1d, (q15_t)0xea1e, (q15_t)0x7e1c, (q15_t)0xea18, (q15_t)0x7e1b, (q15_t)0xea12, (q15_t)0x7e1a, (q15_t)0xea0c,
+  (q15_t)0x7e19, (q15_t)0xea06, (q15_t)0x7e18, (q15_t)0xe9ff, (q15_t)0x7e17, (q15_t)0xe9f9, (q15_t)0x7e16, (q15_t)0xe9f3,
+  (q15_t)0x7e14, (q15_t)0xe9ed, (q15_t)0x7e13, (q15_t)0xe9e7, (q15_t)0x7e12, (q15_t)0xe9e1, (q15_t)0x7e11, (q15_t)0xe9da,
+  (q15_t)0x7e10, (q15_t)0xe9d4, (q15_t)0x7e0f, (q15_t)0xe9ce, (q15_t)0x7e0e, (q15_t)0xe9c8, (q15_t)0x7e0d, (q15_t)0xe9c2,
+  (q15_t)0x7e0c, (q15_t)0xe9bb, (q15_t)0x7e0b, (q15_t)0xe9b5, (q15_t)0x7e0a, (q15_t)0xe9af, (q15_t)0x7e08, (q15_t)0xe9a9,
+  (q15_t)0x7e07, (q15_t)0xe9a3, (q15_t)0x7e06, (q15_t)0xe99c, (q15_t)0x7e05, (q15_t)0xe996, (q15_t)0x7e04, (q15_t)0xe990,
+  (q15_t)0x7e03, (q15_t)0xe98a, (q15_t)0x7e02, (q15_t)0xe984, (q15_t)0x7e01, (q15_t)0xe97e, (q15_t)0x7e00, (q15_t)0xe977,
+  (q15_t)0x7dff, (q15_t)0xe971, (q15_t)0x7dfd, (q15_t)0xe96b, (q15_t)0x7dfc, (q15_t)0xe965, (q15_t)0x7dfb, (q15_t)0xe95f,
+  (q15_t)0x7dfa, (q15_t)0xe958, (q15_t)0x7df9, (q15_t)0xe952, (q15_t)0x7df8, (q15_t)0xe94c, (q15_t)0x7df7, (q15_t)0xe946,
+  (q15_t)0x7df6, (q15_t)0xe940, (q15_t)0x7df5, (q15_t)0xe93a, (q15_t)0x7df3, (q15_t)0xe933, (q15_t)0x7df2, (q15_t)0xe92d,
+  (q15_t)0x7df1, (q15_t)0xe927, (q15_t)0x7df0, (q15_t)0xe921, (q15_t)0x7def, (q15_t)0xe91b, (q15_t)0x7dee, (q15_t)0xe914,
+  (q15_t)0x7ded, (q15_t)0xe90e, (q15_t)0x7dec, (q15_t)0xe908, (q15_t)0x7dea, (q15_t)0xe902, (q15_t)0x7de9, (q15_t)0xe8fc,
+  (q15_t)0x7de8, (q15_t)0xe8f6, (q15_t)0x7de7, (q15_t)0xe8ef, (q15_t)0x7de6, (q15_t)0xe8e9, (q15_t)0x7de5, (q15_t)0xe8e3,
+  (q15_t)0x7de4, (q15_t)0xe8dd, (q15_t)0x7de2, (q15_t)0xe8d7, (q15_t)0x7de1, (q15_t)0xe8d0, (q15_t)0x7de0, (q15_t)0xe8ca,
+  (q15_t)0x7ddf, (q15_t)0xe8c4, (q15_t)0x7dde, (q15_t)0xe8be, (q15_t)0x7ddd, (q15_t)0xe8b8, (q15_t)0x7ddc, (q15_t)0xe8b2,
+  (q15_t)0x7dda, (q15_t)0xe8ab, (q15_t)0x7dd9, (q15_t)0xe8a5, (q15_t)0x7dd8, (q15_t)0xe89f, (q15_t)0x7dd7, (q15_t)0xe899,
+  (q15_t)0x7dd6, (q15_t)0xe893, (q15_t)0x7dd5, (q15_t)0xe88c, (q15_t)0x7dd4, (q15_t)0xe886, (q15_t)0x7dd2, (q15_t)0xe880,
+  (q15_t)0x7dd1, (q15_t)0xe87a, (q15_t)0x7dd0, (q15_t)0xe874, (q15_t)0x7dcf, (q15_t)0xe86e, (q15_t)0x7dce, (q15_t)0xe867,
+  (q15_t)0x7dcd, (q15_t)0xe861, (q15_t)0x7dcc, (q15_t)0xe85b, (q15_t)0x7dca, (q15_t)0xe855, (q15_t)0x7dc9, (q15_t)0xe84f,
+  (q15_t)0x7dc8, (q15_t)0xe849, (q15_t)0x7dc7, (q15_t)0xe842, (q15_t)0x7dc6, (q15_t)0xe83c, (q15_t)0x7dc5, (q15_t)0xe836,
+  (q15_t)0x7dc3, (q15_t)0xe830, (q15_t)0x7dc2, (q15_t)0xe82a, (q15_t)0x7dc1, (q15_t)0xe823, (q15_t)0x7dc0, (q15_t)0xe81d,
+  (q15_t)0x7dbf, (q15_t)0xe817, (q15_t)0x7dbd, (q15_t)0xe811, (q15_t)0x7dbc, (q15_t)0xe80b, (q15_t)0x7dbb, (q15_t)0xe805,
+  (q15_t)0x7dba, (q15_t)0xe7fe, (q15_t)0x7db9, (q15_t)0xe7f8, (q15_t)0x7db8, (q15_t)0xe7f2, (q15_t)0x7db6, (q15_t)0xe7ec,
+  (q15_t)0x7db5, (q15_t)0xe7e6, (q15_t)0x7db4, (q15_t)0xe7e0, (q15_t)0x7db3, (q15_t)0xe7d9, (q15_t)0x7db2, (q15_t)0xe7d3,
+  (q15_t)0x7db0, (q15_t)0xe7cd, (q15_t)0x7daf, (q15_t)0xe7c7, (q15_t)0x7dae, (q15_t)0xe7c1, (q15_t)0x7dad, (q15_t)0xe7bb,
+  (q15_t)0x7dac, (q15_t)0xe7b4, (q15_t)0x7dab, (q15_t)0xe7ae, (q15_t)0x7da9, (q15_t)0xe7a8, (q15_t)0x7da8, (q15_t)0xe7a2,
+  (q15_t)0x7da7, (q15_t)0xe79c, (q15_t)0x7da6, (q15_t)0xe796, (q15_t)0x7da5, (q15_t)0xe78f, (q15_t)0x7da3, (q15_t)0xe789,
+  (q15_t)0x7da2, (q15_t)0xe783, (q15_t)0x7da1, (q15_t)0xe77d, (q15_t)0x7da0, (q15_t)0xe777, (q15_t)0x7d9f, (q15_t)0xe771,
+  (q15_t)0x7d9d, (q15_t)0xe76a, (q15_t)0x7d9c, (q15_t)0xe764, (q15_t)0x7d9b, (q15_t)0xe75e, (q15_t)0x7d9a, (q15_t)0xe758,
+  (q15_t)0x7d98, (q15_t)0xe752, (q15_t)0x7d97, (q15_t)0xe74c, (q15_t)0x7d96, (q15_t)0xe745, (q15_t)0x7d95, (q15_t)0xe73f,
+  (q15_t)0x7d94, (q15_t)0xe739, (q15_t)0x7d92, (q15_t)0xe733, (q15_t)0x7d91, (q15_t)0xe72d, (q15_t)0x7d90, (q15_t)0xe727,
+  (q15_t)0x7d8f, (q15_t)0xe720, (q15_t)0x7d8e, (q15_t)0xe71a, (q15_t)0x7d8c, (q15_t)0xe714, (q15_t)0x7d8b, (q15_t)0xe70e,
+  (q15_t)0x7d8a, (q15_t)0xe708, (q15_t)0x7d89, (q15_t)0xe702, (q15_t)0x7d87, (q15_t)0xe6fb, (q15_t)0x7d86, (q15_t)0xe6f5,
+  (q15_t)0x7d85, (q15_t)0xe6ef, (q15_t)0x7d84, (q15_t)0xe6e9, (q15_t)0x7d82, (q15_t)0xe6e3, (q15_t)0x7d81, (q15_t)0xe6dd,
+  (q15_t)0x7d80, (q15_t)0xe6d6, (q15_t)0x7d7f, (q15_t)0xe6d0, (q15_t)0x7d7e, (q15_t)0xe6ca, (q15_t)0x7d7c, (q15_t)0xe6c4,
+  (q15_t)0x7d7b, (q15_t)0xe6be, (q15_t)0x7d7a, (q15_t)0xe6b8, (q15_t)0x7d79, (q15_t)0xe6b2, (q15_t)0x7d77, (q15_t)0xe6ab,
+  (q15_t)0x7d76, (q15_t)0xe6a5, (q15_t)0x7d75, (q15_t)0xe69f, (q15_t)0x7d74, (q15_t)0xe699, (q15_t)0x7d72, (q15_t)0xe693,
+  (q15_t)0x7d71, (q15_t)0xe68d, (q15_t)0x7d70, (q15_t)0xe686, (q15_t)0x7d6f, (q15_t)0xe680, (q15_t)0x7d6d, (q15_t)0xe67a,
+  (q15_t)0x7d6c, (q15_t)0xe674, (q15_t)0x7d6b, (q15_t)0xe66e, (q15_t)0x7d6a, (q15_t)0xe668, (q15_t)0x7d68, (q15_t)0xe661,
+  (q15_t)0x7d67, (q15_t)0xe65b, (q15_t)0x7d66, (q15_t)0xe655, (q15_t)0x7d65, (q15_t)0xe64f, (q15_t)0x7d63, (q15_t)0xe649,
+  (q15_t)0x7d62, (q15_t)0xe643, (q15_t)0x7d61, (q15_t)0xe63d, (q15_t)0x7d60, (q15_t)0xe636, (q15_t)0x7d5e, (q15_t)0xe630,
+  (q15_t)0x7d5d, (q15_t)0xe62a, (q15_t)0x7d5c, (q15_t)0xe624, (q15_t)0x7d5a, (q15_t)0xe61e, (q15_t)0x7d59, (q15_t)0xe618,
+  (q15_t)0x7d58, (q15_t)0xe611, (q15_t)0x7d57, (q15_t)0xe60b, (q15_t)0x7d55, (q15_t)0xe605, (q15_t)0x7d54, (q15_t)0xe5ff,
+  (q15_t)0x7d53, (q15_t)0xe5f9, (q15_t)0x7d52, (q15_t)0xe5f3, (q15_t)0x7d50, (q15_t)0xe5ed, (q15_t)0x7d4f, (q15_t)0xe5e6,
+  (q15_t)0x7d4e, (q15_t)0xe5e0, (q15_t)0x7d4c, (q15_t)0xe5da, (q15_t)0x7d4b, (q15_t)0xe5d4, (q15_t)0x7d4a, (q15_t)0xe5ce,
+  (q15_t)0x7d49, (q15_t)0xe5c8, (q15_t)0x7d47, (q15_t)0xe5c2, (q15_t)0x7d46, (q15_t)0xe5bb, (q15_t)0x7d45, (q15_t)0xe5b5,
+  (q15_t)0x7d43, (q15_t)0xe5af, (q15_t)0x7d42, (q15_t)0xe5a9, (q15_t)0x7d41, (q15_t)0xe5a3, (q15_t)0x7d3f, (q15_t)0xe59d,
+  (q15_t)0x7d3e, (q15_t)0xe596, (q15_t)0x7d3d, (q15_t)0xe590, (q15_t)0x7d3c, (q15_t)0xe58a, (q15_t)0x7d3a, (q15_t)0xe584,
+  (q15_t)0x7d39, (q15_t)0xe57e, (q15_t)0x7d38, (q15_t)0xe578, (q15_t)0x7d36, (q15_t)0xe572, (q15_t)0x7d35, (q15_t)0xe56b,
+  (q15_t)0x7d34, (q15_t)0xe565, (q15_t)0x7d32, (q15_t)0xe55f, (q15_t)0x7d31, (q15_t)0xe559, (q15_t)0x7d30, (q15_t)0xe553,
+  (q15_t)0x7d2f, (q15_t)0xe54d, (q15_t)0x7d2d, (q15_t)0xe547, (q15_t)0x7d2c, (q15_t)0xe540, (q15_t)0x7d2b, (q15_t)0xe53a,
+  (q15_t)0x7d29, (q15_t)0xe534, (q15_t)0x7d28, (q15_t)0xe52e, (q15_t)0x7d27, (q15_t)0xe528, (q15_t)0x7d25, (q15_t)0xe522,
+  (q15_t)0x7d24, (q15_t)0xe51c, (q15_t)0x7d23, (q15_t)0xe515, (q15_t)0x7d21, (q15_t)0xe50f, (q15_t)0x7d20, (q15_t)0xe509,
+  (q15_t)0x7d1f, (q15_t)0xe503, (q15_t)0x7d1d, (q15_t)0xe4fd, (q15_t)0x7d1c, (q15_t)0xe4f7, (q15_t)0x7d1b, (q15_t)0xe4f1,
+  (q15_t)0x7d19, (q15_t)0xe4ea, (q15_t)0x7d18, (q15_t)0xe4e4, (q15_t)0x7d17, (q15_t)0xe4de, (q15_t)0x7d15, (q15_t)0xe4d8,
+  (q15_t)0x7d14, (q15_t)0xe4d2, (q15_t)0x7d13, (q15_t)0xe4cc, (q15_t)0x7d11, (q15_t)0xe4c6, (q15_t)0x7d10, (q15_t)0xe4bf,
+  (q15_t)0x7d0f, (q15_t)0xe4b9, (q15_t)0x7d0d, (q15_t)0xe4b3, (q15_t)0x7d0c, (q15_t)0xe4ad, (q15_t)0x7d0b, (q15_t)0xe4a7,
+  (q15_t)0x7d09, (q15_t)0xe4a1, (q15_t)0x7d08, (q15_t)0xe49b, (q15_t)0x7d07, (q15_t)0xe494, (q15_t)0x7d05, (q15_t)0xe48e,
+  (q15_t)0x7d04, (q15_t)0xe488, (q15_t)0x7d03, (q15_t)0xe482, (q15_t)0x7d01, (q15_t)0xe47c, (q15_t)0x7d00, (q15_t)0xe476,
+  (q15_t)0x7cff, (q15_t)0xe470, (q15_t)0x7cfd, (q15_t)0xe46a, (q15_t)0x7cfc, (q15_t)0xe463, (q15_t)0x7cfb, (q15_t)0xe45d,
+  (q15_t)0x7cf9, (q15_t)0xe457, (q15_t)0x7cf8, (q15_t)0xe451, (q15_t)0x7cf6, (q15_t)0xe44b, (q15_t)0x7cf5, (q15_t)0xe445,
+  (q15_t)0x7cf4, (q15_t)0xe43f, (q15_t)0x7cf2, (q15_t)0xe438, (q15_t)0x7cf1, (q15_t)0xe432, (q15_t)0x7cf0, (q15_t)0xe42c,
+  (q15_t)0x7cee, (q15_t)0xe426, (q15_t)0x7ced, (q15_t)0xe420, (q15_t)0x7cec, (q15_t)0xe41a, (q15_t)0x7cea, (q15_t)0xe414,
+  (q15_t)0x7ce9, (q15_t)0xe40e, (q15_t)0x7ce7, (q15_t)0xe407, (q15_t)0x7ce6, (q15_t)0xe401, (q15_t)0x7ce5, (q15_t)0xe3fb,
+  (q15_t)0x7ce3, (q15_t)0xe3f5, (q15_t)0x7ce2, (q15_t)0xe3ef, (q15_t)0x7ce1, (q15_t)0xe3e9, (q15_t)0x7cdf, (q15_t)0xe3e3,
+  (q15_t)0x7cde, (q15_t)0xe3dc, (q15_t)0x7cdc, (q15_t)0xe3d6, (q15_t)0x7cdb, (q15_t)0xe3d0, (q15_t)0x7cda, (q15_t)0xe3ca,
+  (q15_t)0x7cd8, (q15_t)0xe3c4, (q15_t)0x7cd7, (q15_t)0xe3be, (q15_t)0x7cd5, (q15_t)0xe3b8, (q15_t)0x7cd4, (q15_t)0xe3b2,
+  (q15_t)0x7cd3, (q15_t)0xe3ab, (q15_t)0x7cd1, (q15_t)0xe3a5, (q15_t)0x7cd0, (q15_t)0xe39f, (q15_t)0x7ccf, (q15_t)0xe399,
+  (q15_t)0x7ccd, (q15_t)0xe393, (q15_t)0x7ccc, (q15_t)0xe38d, (q15_t)0x7cca, (q15_t)0xe387, (q15_t)0x7cc9, (q15_t)0xe381,
+  (q15_t)0x7cc8, (q15_t)0xe37a, (q15_t)0x7cc6, (q15_t)0xe374, (q15_t)0x7cc5, (q15_t)0xe36e, (q15_t)0x7cc3, (q15_t)0xe368,
+  (q15_t)0x7cc2, (q15_t)0xe362, (q15_t)0x7cc1, (q15_t)0xe35c, (q15_t)0x7cbf, (q15_t)0xe356, (q15_t)0x7cbe, (q15_t)0xe350,
+  (q15_t)0x7cbc, (q15_t)0xe349, (q15_t)0x7cbb, (q15_t)0xe343, (q15_t)0x7cb9, (q15_t)0xe33d, (q15_t)0x7cb8, (q15_t)0xe337,
+  (q15_t)0x7cb7, (q15_t)0xe331, (q15_t)0x7cb5, (q15_t)0xe32b, (q15_t)0x7cb4, (q15_t)0xe325, (q15_t)0x7cb2, (q15_t)0xe31f,
+  (q15_t)0x7cb1, (q15_t)0xe318, (q15_t)0x7cb0, (q15_t)0xe312, (q15_t)0x7cae, (q15_t)0xe30c, (q15_t)0x7cad, (q15_t)0xe306,
+  (q15_t)0x7cab, (q15_t)0xe300, (q15_t)0x7caa, (q15_t)0xe2fa, (q15_t)0x7ca8, (q15_t)0xe2f4, (q15_t)0x7ca7, (q15_t)0xe2ee,
+  (q15_t)0x7ca6, (q15_t)0xe2e8, (q15_t)0x7ca4, (q15_t)0xe2e1, (q15_t)0x7ca3, (q15_t)0xe2db, (q15_t)0x7ca1, (q15_t)0xe2d5,
+  (q15_t)0x7ca0, (q15_t)0xe2cf, (q15_t)0x7c9e, (q15_t)0xe2c9, (q15_t)0x7c9d, (q15_t)0xe2c3, (q15_t)0x7c9c, (q15_t)0xe2bd,
+  (q15_t)0x7c9a, (q15_t)0xe2b7, (q15_t)0x7c99, (q15_t)0xe2b0, (q15_t)0x7c97, (q15_t)0xe2aa, (q15_t)0x7c96, (q15_t)0xe2a4,
+  (q15_t)0x7c94, (q15_t)0xe29e, (q15_t)0x7c93, (q15_t)0xe298, (q15_t)0x7c91, (q15_t)0xe292, (q15_t)0x7c90, (q15_t)0xe28c,
+  (q15_t)0x7c8f, (q15_t)0xe286, (q15_t)0x7c8d, (q15_t)0xe280, (q15_t)0x7c8c, (q15_t)0xe279, (q15_t)0x7c8a, (q15_t)0xe273,
+  (q15_t)0x7c89, (q15_t)0xe26d, (q15_t)0x7c87, (q15_t)0xe267, (q15_t)0x7c86, (q15_t)0xe261, (q15_t)0x7c84, (q15_t)0xe25b,
+  (q15_t)0x7c83, (q15_t)0xe255, (q15_t)0x7c82, (q15_t)0xe24f, (q15_t)0x7c80, (q15_t)0xe249, (q15_t)0x7c7f, (q15_t)0xe242,
+  (q15_t)0x7c7d, (q15_t)0xe23c, (q15_t)0x7c7c, (q15_t)0xe236, (q15_t)0x7c7a, (q15_t)0xe230, (q15_t)0x7c79, (q15_t)0xe22a,
+  (q15_t)0x7c77, (q15_t)0xe224, (q15_t)0x7c76, (q15_t)0xe21e, (q15_t)0x7c74, (q15_t)0xe218, (q15_t)0x7c73, (q15_t)0xe212,
+  (q15_t)0x7c71, (q15_t)0xe20b, (q15_t)0x7c70, (q15_t)0xe205, (q15_t)0x7c6e, (q15_t)0xe1ff, (q15_t)0x7c6d, (q15_t)0xe1f9,
+  (q15_t)0x7c6c, (q15_t)0xe1f3, (q15_t)0x7c6a, (q15_t)0xe1ed, (q15_t)0x7c69, (q15_t)0xe1e7, (q15_t)0x7c67, (q15_t)0xe1e1,
+  (q15_t)0x7c66, (q15_t)0xe1db, (q15_t)0x7c64, (q15_t)0xe1d4, (q15_t)0x7c63, (q15_t)0xe1ce, (q15_t)0x7c61, (q15_t)0xe1c8,
+  (q15_t)0x7c60, (q15_t)0xe1c2, (q15_t)0x7c5e, (q15_t)0xe1bc, (q15_t)0x7c5d, (q15_t)0xe1b6, (q15_t)0x7c5b, (q15_t)0xe1b0,
+  (q15_t)0x7c5a, (q15_t)0xe1aa, (q15_t)0x7c58, (q15_t)0xe1a4, (q15_t)0x7c57, (q15_t)0xe19e, (q15_t)0x7c55, (q15_t)0xe197,
+  (q15_t)0x7c54, (q15_t)0xe191, (q15_t)0x7c52, (q15_t)0xe18b, (q15_t)0x7c51, (q15_t)0xe185, (q15_t)0x7c4f, (q15_t)0xe17f,
+  (q15_t)0x7c4e, (q15_t)0xe179, (q15_t)0x7c4c, (q15_t)0xe173, (q15_t)0x7c4b, (q15_t)0xe16d, (q15_t)0x7c49, (q15_t)0xe167,
+  (q15_t)0x7c48, (q15_t)0xe160, (q15_t)0x7c46, (q15_t)0xe15a, (q15_t)0x7c45, (q15_t)0xe154, (q15_t)0x7c43, (q15_t)0xe14e,
+  (q15_t)0x7c42, (q15_t)0xe148, (q15_t)0x7c40, (q15_t)0xe142, (q15_t)0x7c3f, (q15_t)0xe13c, (q15_t)0x7c3d, (q15_t)0xe136,
+  (q15_t)0x7c3c, (q15_t)0xe130, (q15_t)0x7c3a, (q15_t)0xe12a, (q15_t)0x7c39, (q15_t)0xe123, (q15_t)0x7c37, (q15_t)0xe11d,
+  (q15_t)0x7c36, (q15_t)0xe117, (q15_t)0x7c34, (q15_t)0xe111, (q15_t)0x7c33, (q15_t)0xe10b, (q15_t)0x7c31, (q15_t)0xe105,
+  (q15_t)0x7c30, (q15_t)0xe0ff, (q15_t)0x7c2e, (q15_t)0xe0f9, (q15_t)0x7c2d, (q15_t)0xe0f3, (q15_t)0x7c2b, (q15_t)0xe0ed,
+  (q15_t)0x7c29, (q15_t)0xe0e7, (q15_t)0x7c28, (q15_t)0xe0e0, (q15_t)0x7c26, (q15_t)0xe0da, (q15_t)0x7c25, (q15_t)0xe0d4,
+  (q15_t)0x7c23, (q15_t)0xe0ce, (q15_t)0x7c22, (q15_t)0xe0c8, (q15_t)0x7c20, (q15_t)0xe0c2, (q15_t)0x7c1f, (q15_t)0xe0bc,
+  (q15_t)0x7c1d, (q15_t)0xe0b6, (q15_t)0x7c1c, (q15_t)0xe0b0, (q15_t)0x7c1a, (q15_t)0xe0aa, (q15_t)0x7c19, (q15_t)0xe0a3,
+  (q15_t)0x7c17, (q15_t)0xe09d, (q15_t)0x7c16, (q15_t)0xe097, (q15_t)0x7c14, (q15_t)0xe091, (q15_t)0x7c12, (q15_t)0xe08b,
+  (q15_t)0x7c11, (q15_t)0xe085, (q15_t)0x7c0f, (q15_t)0xe07f, (q15_t)0x7c0e, (q15_t)0xe079, (q15_t)0x7c0c, (q15_t)0xe073,
+  (q15_t)0x7c0b, (q15_t)0xe06d, (q15_t)0x7c09, (q15_t)0xe067, (q15_t)0x7c08, (q15_t)0xe061, (q15_t)0x7c06, (q15_t)0xe05a,
+  (q15_t)0x7c05, (q15_t)0xe054, (q15_t)0x7c03, (q15_t)0xe04e, (q15_t)0x7c01, (q15_t)0xe048, (q15_t)0x7c00, (q15_t)0xe042,
+  (q15_t)0x7bfe, (q15_t)0xe03c, (q15_t)0x7bfd, (q15_t)0xe036, (q15_t)0x7bfb, (q15_t)0xe030, (q15_t)0x7bfa, (q15_t)0xe02a,
+  (q15_t)0x7bf8, (q15_t)0xe024, (q15_t)0x7bf6, (q15_t)0xe01e, (q15_t)0x7bf5, (q15_t)0xe017, (q15_t)0x7bf3, (q15_t)0xe011,
+  (q15_t)0x7bf2, (q15_t)0xe00b, (q15_t)0x7bf0, (q15_t)0xe005, (q15_t)0x7bef, (q15_t)0xdfff, (q15_t)0x7bed, (q15_t)0xdff9,
+  (q15_t)0x7beb, (q15_t)0xdff3, (q15_t)0x7bea, (q15_t)0xdfed, (q15_t)0x7be8, (q15_t)0xdfe7, (q15_t)0x7be7, (q15_t)0xdfe1,
+  (q15_t)0x7be5, (q15_t)0xdfdb, (q15_t)0x7be4, (q15_t)0xdfd5, (q15_t)0x7be2, (q15_t)0xdfce, (q15_t)0x7be0, (q15_t)0xdfc8,
+  (q15_t)0x7bdf, (q15_t)0xdfc2, (q15_t)0x7bdd, (q15_t)0xdfbc, (q15_t)0x7bdc, (q15_t)0xdfb6, (q15_t)0x7bda, (q15_t)0xdfb0,
+  (q15_t)0x7bd9, (q15_t)0xdfaa, (q15_t)0x7bd7, (q15_t)0xdfa4, (q15_t)0x7bd5, (q15_t)0xdf9e, (q15_t)0x7bd4, (q15_t)0xdf98,
+  (q15_t)0x7bd2, (q15_t)0xdf92, (q15_t)0x7bd1, (q15_t)0xdf8c, (q15_t)0x7bcf, (q15_t)0xdf86, (q15_t)0x7bcd, (q15_t)0xdf7f,
+  (q15_t)0x7bcc, (q15_t)0xdf79, (q15_t)0x7bca, (q15_t)0xdf73, (q15_t)0x7bc9, (q15_t)0xdf6d, (q15_t)0x7bc7, (q15_t)0xdf67,
+  (q15_t)0x7bc5, (q15_t)0xdf61, (q15_t)0x7bc4, (q15_t)0xdf5b, (q15_t)0x7bc2, (q15_t)0xdf55, (q15_t)0x7bc1, (q15_t)0xdf4f,
+  (q15_t)0x7bbf, (q15_t)0xdf49, (q15_t)0x7bbd, (q15_t)0xdf43, (q15_t)0x7bbc, (q15_t)0xdf3d, (q15_t)0x7bba, (q15_t)0xdf37,
+  (q15_t)0x7bb9, (q15_t)0xdf30, (q15_t)0x7bb7, (q15_t)0xdf2a, (q15_t)0x7bb5, (q15_t)0xdf24, (q15_t)0x7bb4, (q15_t)0xdf1e,
+  (q15_t)0x7bb2, (q15_t)0xdf18, (q15_t)0x7bb0, (q15_t)0xdf12, (q15_t)0x7baf, (q15_t)0xdf0c, (q15_t)0x7bad, (q15_t)0xdf06,
+  (q15_t)0x7bac, (q15_t)0xdf00, (q15_t)0x7baa, (q15_t)0xdefa, (q15_t)0x7ba8, (q15_t)0xdef4, (q15_t)0x7ba7, (q15_t)0xdeee,
+  (q15_t)0x7ba5, (q15_t)0xdee8, (q15_t)0x7ba3, (q15_t)0xdee2, (q15_t)0x7ba2, (q15_t)0xdedb, (q15_t)0x7ba0, (q15_t)0xded5,
+  (q15_t)0x7b9f, (q15_t)0xdecf, (q15_t)0x7b9d, (q15_t)0xdec9, (q15_t)0x7b9b, (q15_t)0xdec3, (q15_t)0x7b9a, (q15_t)0xdebd,
+  (q15_t)0x7b98, (q15_t)0xdeb7, (q15_t)0x7b96, (q15_t)0xdeb1, (q15_t)0x7b95, (q15_t)0xdeab, (q15_t)0x7b93, (q15_t)0xdea5,
+  (q15_t)0x7b92, (q15_t)0xde9f, (q15_t)0x7b90, (q15_t)0xde99, (q15_t)0x7b8e, (q15_t)0xde93, (q15_t)0x7b8d, (q15_t)0xde8d,
+  (q15_t)0x7b8b, (q15_t)0xde87, (q15_t)0x7b89, (q15_t)0xde80, (q15_t)0x7b88, (q15_t)0xde7a, (q15_t)0x7b86, (q15_t)0xde74,
+  (q15_t)0x7b84, (q15_t)0xde6e, (q15_t)0x7b83, (q15_t)0xde68, (q15_t)0x7b81, (q15_t)0xde62, (q15_t)0x7b7f, (q15_t)0xde5c,
+  (q15_t)0x7b7e, (q15_t)0xde56, (q15_t)0x7b7c, (q15_t)0xde50, (q15_t)0x7b7a, (q15_t)0xde4a, (q15_t)0x7b79, (q15_t)0xde44,
+  (q15_t)0x7b77, (q15_t)0xde3e, (q15_t)0x7b76, (q15_t)0xde38, (q15_t)0x7b74, (q15_t)0xde32, (q15_t)0x7b72, (q15_t)0xde2c,
+  (q15_t)0x7b71, (q15_t)0xde26, (q15_t)0x7b6f, (q15_t)0xde1f, (q15_t)0x7b6d, (q15_t)0xde19, (q15_t)0x7b6c, (q15_t)0xde13,
+  (q15_t)0x7b6a, (q15_t)0xde0d, (q15_t)0x7b68, (q15_t)0xde07, (q15_t)0x7b67, (q15_t)0xde01, (q15_t)0x7b65, (q15_t)0xddfb,
+  (q15_t)0x7b63, (q15_t)0xddf5, (q15_t)0x7b62, (q15_t)0xddef, (q15_t)0x7b60, (q15_t)0xdde9, (q15_t)0x7b5e, (q15_t)0xdde3,
+  (q15_t)0x7b5d, (q15_t)0xdddd, (q15_t)0x7b5b, (q15_t)0xddd7, (q15_t)0x7b59, (q15_t)0xddd1, (q15_t)0x7b57, (q15_t)0xddcb,
+  (q15_t)0x7b56, (q15_t)0xddc5, (q15_t)0x7b54, (q15_t)0xddbf, (q15_t)0x7b52, (q15_t)0xddb9, (q15_t)0x7b51, (q15_t)0xddb2,
+  (q15_t)0x7b4f, (q15_t)0xddac, (q15_t)0x7b4d, (q15_t)0xdda6, (q15_t)0x7b4c, (q15_t)0xdda0, (q15_t)0x7b4a, (q15_t)0xdd9a,
+  (q15_t)0x7b48, (q15_t)0xdd94, (q15_t)0x7b47, (q15_t)0xdd8e, (q15_t)0x7b45, (q15_t)0xdd88, (q15_t)0x7b43, (q15_t)0xdd82,
+  (q15_t)0x7b42, (q15_t)0xdd7c, (q15_t)0x7b40, (q15_t)0xdd76, (q15_t)0x7b3e, (q15_t)0xdd70, (q15_t)0x7b3c, (q15_t)0xdd6a,
+  (q15_t)0x7b3b, (q15_t)0xdd64, (q15_t)0x7b39, (q15_t)0xdd5e, (q15_t)0x7b37, (q15_t)0xdd58, (q15_t)0x7b36, (q15_t)0xdd52,
+  (q15_t)0x7b34, (q15_t)0xdd4c, (q15_t)0x7b32, (q15_t)0xdd46, (q15_t)0x7b31, (q15_t)0xdd40, (q15_t)0x7b2f, (q15_t)0xdd39,
+  (q15_t)0x7b2d, (q15_t)0xdd33, (q15_t)0x7b2b, (q15_t)0xdd2d, (q15_t)0x7b2a, (q15_t)0xdd27, (q15_t)0x7b28, (q15_t)0xdd21,
+  (q15_t)0x7b26, (q15_t)0xdd1b, (q15_t)0x7b25, (q15_t)0xdd15, (q15_t)0x7b23, (q15_t)0xdd0f, (q15_t)0x7b21, (q15_t)0xdd09,
+  (q15_t)0x7b1f, (q15_t)0xdd03, (q15_t)0x7b1e, (q15_t)0xdcfd, (q15_t)0x7b1c, (q15_t)0xdcf7, (q15_t)0x7b1a, (q15_t)0xdcf1,
+  (q15_t)0x7b19, (q15_t)0xdceb, (q15_t)0x7b17, (q15_t)0xdce5, (q15_t)0x7b15, (q15_t)0xdcdf, (q15_t)0x7b13, (q15_t)0xdcd9,
+  (q15_t)0x7b12, (q15_t)0xdcd3, (q15_t)0x7b10, (q15_t)0xdccd, (q15_t)0x7b0e, (q15_t)0xdcc7, (q15_t)0x7b0c, (q15_t)0xdcc1,
+  (q15_t)0x7b0b, (q15_t)0xdcbb, (q15_t)0x7b09, (q15_t)0xdcb5, (q15_t)0x7b07, (q15_t)0xdcae, (q15_t)0x7b06, (q15_t)0xdca8,
+  (q15_t)0x7b04, (q15_t)0xdca2, (q15_t)0x7b02, (q15_t)0xdc9c, (q15_t)0x7b00, (q15_t)0xdc96, (q15_t)0x7aff, (q15_t)0xdc90,
+  (q15_t)0x7afd, (q15_t)0xdc8a, (q15_t)0x7afb, (q15_t)0xdc84, (q15_t)0x7af9, (q15_t)0xdc7e, (q15_t)0x7af8, (q15_t)0xdc78,
+  (q15_t)0x7af6, (q15_t)0xdc72, (q15_t)0x7af4, (q15_t)0xdc6c, (q15_t)0x7af2, (q15_t)0xdc66, (q15_t)0x7af1, (q15_t)0xdc60,
+  (q15_t)0x7aef, (q15_t)0xdc5a, (q15_t)0x7aed, (q15_t)0xdc54, (q15_t)0x7aeb, (q15_t)0xdc4e, (q15_t)0x7aea, (q15_t)0xdc48,
+  (q15_t)0x7ae8, (q15_t)0xdc42, (q15_t)0x7ae6, (q15_t)0xdc3c, (q15_t)0x7ae4, (q15_t)0xdc36, (q15_t)0x7ae3, (q15_t)0xdc30,
+  (q15_t)0x7ae1, (q15_t)0xdc2a, (q15_t)0x7adf, (q15_t)0xdc24, (q15_t)0x7add, (q15_t)0xdc1e, (q15_t)0x7adc, (q15_t)0xdc18,
+  (q15_t)0x7ada, (q15_t)0xdc12, (q15_t)0x7ad8, (q15_t)0xdc0c, (q15_t)0x7ad6, (q15_t)0xdc06, (q15_t)0x7ad5, (q15_t)0xdbff,
+  (q15_t)0x7ad3, (q15_t)0xdbf9, (q15_t)0x7ad1, (q15_t)0xdbf3, (q15_t)0x7acf, (q15_t)0xdbed, (q15_t)0x7acd, (q15_t)0xdbe7,
+  (q15_t)0x7acc, (q15_t)0xdbe1, (q15_t)0x7aca, (q15_t)0xdbdb, (q15_t)0x7ac8, (q15_t)0xdbd5, (q15_t)0x7ac6, (q15_t)0xdbcf,
+  (q15_t)0x7ac5, (q15_t)0xdbc9, (q15_t)0x7ac3, (q15_t)0xdbc3, (q15_t)0x7ac1, (q15_t)0xdbbd, (q15_t)0x7abf, (q15_t)0xdbb7,
+  (q15_t)0x7abd, (q15_t)0xdbb1, (q15_t)0x7abc, (q15_t)0xdbab, (q15_t)0x7aba, (q15_t)0xdba5, (q15_t)0x7ab8, (q15_t)0xdb9f,
+  (q15_t)0x7ab6, (q15_t)0xdb99, (q15_t)0x7ab5, (q15_t)0xdb93, (q15_t)0x7ab3, (q15_t)0xdb8d, (q15_t)0x7ab1, (q15_t)0xdb87,
+  (q15_t)0x7aaf, (q15_t)0xdb81, (q15_t)0x7aad, (q15_t)0xdb7b, (q15_t)0x7aac, (q15_t)0xdb75, (q15_t)0x7aaa, (q15_t)0xdb6f,
+  (q15_t)0x7aa8, (q15_t)0xdb69, (q15_t)0x7aa6, (q15_t)0xdb63, (q15_t)0x7aa4, (q15_t)0xdb5d, (q15_t)0x7aa3, (q15_t)0xdb57,
+  (q15_t)0x7aa1, (q15_t)0xdb51, (q15_t)0x7a9f, (q15_t)0xdb4b, (q15_t)0x7a9d, (q15_t)0xdb45, (q15_t)0x7a9b, (q15_t)0xdb3f,
+  (q15_t)0x7a9a, (q15_t)0xdb39, (q15_t)0x7a98, (q15_t)0xdb33, (q15_t)0x7a96, (q15_t)0xdb2d, (q15_t)0x7a94, (q15_t)0xdb27,
+  (q15_t)0x7a92, (q15_t)0xdb21, (q15_t)0x7a91, (q15_t)0xdb1b, (q15_t)0x7a8f, (q15_t)0xdb15, (q15_t)0x7a8d, (q15_t)0xdb0f,
+  (q15_t)0x7a8b, (q15_t)0xdb09, (q15_t)0x7a89, (q15_t)0xdb03, (q15_t)0x7a87, (q15_t)0xdafd, (q15_t)0x7a86, (q15_t)0xdaf7,
+  (q15_t)0x7a84, (q15_t)0xdaf1, (q15_t)0x7a82, (q15_t)0xdaea, (q15_t)0x7a80, (q15_t)0xdae4, (q15_t)0x7a7e, (q15_t)0xdade,
+  (q15_t)0x7a7d, (q15_t)0xdad8, (q15_t)0x7a7b, (q15_t)0xdad2, (q15_t)0x7a79, (q15_t)0xdacc, (q15_t)0x7a77, (q15_t)0xdac6,
+  (q15_t)0x7a75, (q15_t)0xdac0, (q15_t)0x7a73, (q15_t)0xdaba, (q15_t)0x7a72, (q15_t)0xdab4, (q15_t)0x7a70, (q15_t)0xdaae,
+  (q15_t)0x7a6e, (q15_t)0xdaa8, (q15_t)0x7a6c, (q15_t)0xdaa2, (q15_t)0x7a6a, (q15_t)0xda9c, (q15_t)0x7a68, (q15_t)0xda96,
+  (q15_t)0x7a67, (q15_t)0xda90, (q15_t)0x7a65, (q15_t)0xda8a, (q15_t)0x7a63, (q15_t)0xda84, (q15_t)0x7a61, (q15_t)0xda7e,
+  (q15_t)0x7a5f, (q15_t)0xda78, (q15_t)0x7a5d, (q15_t)0xda72, (q15_t)0x7a5c, (q15_t)0xda6c, (q15_t)0x7a5a, (q15_t)0xda66,
+  (q15_t)0x7a58, (q15_t)0xda60, (q15_t)0x7a56, (q15_t)0xda5a, (q15_t)0x7a54, (q15_t)0xda54, (q15_t)0x7a52, (q15_t)0xda4e,
+  (q15_t)0x7a50, (q15_t)0xda48, (q15_t)0x7a4f, (q15_t)0xda42, (q15_t)0x7a4d, (q15_t)0xda3c, (q15_t)0x7a4b, (q15_t)0xda36,
+  (q15_t)0x7a49, (q15_t)0xda30, (q15_t)0x7a47, (q15_t)0xda2a, (q15_t)0x7a45, (q15_t)0xda24, (q15_t)0x7a43, (q15_t)0xda1e,
+  (q15_t)0x7a42, (q15_t)0xda18, (q15_t)0x7a40, (q15_t)0xda12, (q15_t)0x7a3e, (q15_t)0xda0c, (q15_t)0x7a3c, (q15_t)0xda06,
+  (q15_t)0x7a3a, (q15_t)0xda00, (q15_t)0x7a38, (q15_t)0xd9fa, (q15_t)0x7a36, (q15_t)0xd9f4, (q15_t)0x7a35, (q15_t)0xd9ee,
+  (q15_t)0x7a33, (q15_t)0xd9e8, (q15_t)0x7a31, (q15_t)0xd9e2, (q15_t)0x7a2f, (q15_t)0xd9dc, (q15_t)0x7a2d, (q15_t)0xd9d6,
+  (q15_t)0x7a2b, (q15_t)0xd9d0, (q15_t)0x7a29, (q15_t)0xd9ca, (q15_t)0x7a27, (q15_t)0xd9c4, (q15_t)0x7a26, (q15_t)0xd9be,
+  (q15_t)0x7a24, (q15_t)0xd9b8, (q15_t)0x7a22, (q15_t)0xd9b2, (q15_t)0x7a20, (q15_t)0xd9ac, (q15_t)0x7a1e, (q15_t)0xd9a6,
+  (q15_t)0x7a1c, (q15_t)0xd9a0, (q15_t)0x7a1a, (q15_t)0xd99a, (q15_t)0x7a18, (q15_t)0xd994, (q15_t)0x7a16, (q15_t)0xd98e,
+  (q15_t)0x7a15, (q15_t)0xd988, (q15_t)0x7a13, (q15_t)0xd982, (q15_t)0x7a11, (q15_t)0xd97c, (q15_t)0x7a0f, (q15_t)0xd976,
+  (q15_t)0x7a0d, (q15_t)0xd970, (q15_t)0x7a0b, (q15_t)0xd96a, (q15_t)0x7a09, (q15_t)0xd964, (q15_t)0x7a07, (q15_t)0xd95e,
+  (q15_t)0x7a05, (q15_t)0xd958, (q15_t)0x7a04, (q15_t)0xd952, (q15_t)0x7a02, (q15_t)0xd94c, (q15_t)0x7a00, (q15_t)0xd946,
+  (q15_t)0x79fe, (q15_t)0xd940, (q15_t)0x79fc, (q15_t)0xd93a, (q15_t)0x79fa, (q15_t)0xd934, (q15_t)0x79f8, (q15_t)0xd92e,
+  (q15_t)0x79f6, (q15_t)0xd928, (q15_t)0x79f4, (q15_t)0xd922, (q15_t)0x79f2, (q15_t)0xd91c, (q15_t)0x79f0, (q15_t)0xd917,
+  (q15_t)0x79ef, (q15_t)0xd911, (q15_t)0x79ed, (q15_t)0xd90b, (q15_t)0x79eb, (q15_t)0xd905, (q15_t)0x79e9, (q15_t)0xd8ff,
+  (q15_t)0x79e7, (q15_t)0xd8f9, (q15_t)0x79e5, (q15_t)0xd8f3, (q15_t)0x79e3, (q15_t)0xd8ed, (q15_t)0x79e1, (q15_t)0xd8e7,
+  (q15_t)0x79df, (q15_t)0xd8e1, (q15_t)0x79dd, (q15_t)0xd8db, (q15_t)0x79db, (q15_t)0xd8d5, (q15_t)0x79d9, (q15_t)0xd8cf,
+  (q15_t)0x79d8, (q15_t)0xd8c9, (q15_t)0x79d6, (q15_t)0xd8c3, (q15_t)0x79d4, (q15_t)0xd8bd, (q15_t)0x79d2, (q15_t)0xd8b7,
+  (q15_t)0x79d0, (q15_t)0xd8b1, (q15_t)0x79ce, (q15_t)0xd8ab, (q15_t)0x79cc, (q15_t)0xd8a5, (q15_t)0x79ca, (q15_t)0xd89f,
+  (q15_t)0x79c8, (q15_t)0xd899, (q15_t)0x79c6, (q15_t)0xd893, (q15_t)0x79c4, (q15_t)0xd88d, (q15_t)0x79c2, (q15_t)0xd887,
+  (q15_t)0x79c0, (q15_t)0xd881, (q15_t)0x79be, (q15_t)0xd87b, (q15_t)0x79bc, (q15_t)0xd875, (q15_t)0x79bb, (q15_t)0xd86f,
+  (q15_t)0x79b9, (q15_t)0xd869, (q15_t)0x79b7, (q15_t)0xd863, (q15_t)0x79b5, (q15_t)0xd85d, (q15_t)0x79b3, (q15_t)0xd857,
+  (q15_t)0x79b1, (q15_t)0xd851, (q15_t)0x79af, (q15_t)0xd84b, (q15_t)0x79ad, (q15_t)0xd845, (q15_t)0x79ab, (q15_t)0xd83f,
+  (q15_t)0x79a9, (q15_t)0xd839, (q15_t)0x79a7, (q15_t)0xd833, (q15_t)0x79a5, (q15_t)0xd82d, (q15_t)0x79a3, (q15_t)0xd827,
+  (q15_t)0x79a1, (q15_t)0xd821, (q15_t)0x799f, (q15_t)0xd81b, (q15_t)0x799d, (q15_t)0xd815, (q15_t)0x799b, (q15_t)0xd80f,
+  (q15_t)0x7999, (q15_t)0xd80a, (q15_t)0x7997, (q15_t)0xd804, (q15_t)0x7995, (q15_t)0xd7fe, (q15_t)0x7993, (q15_t)0xd7f8,
+  (q15_t)0x7992, (q15_t)0xd7f2, (q15_t)0x7990, (q15_t)0xd7ec, (q15_t)0x798e, (q15_t)0xd7e6, (q15_t)0x798c, (q15_t)0xd7e0,
+  (q15_t)0x798a, (q15_t)0xd7da, (q15_t)0x7988, (q15_t)0xd7d4, (q15_t)0x7986, (q15_t)0xd7ce, (q15_t)0x7984, (q15_t)0xd7c8,
+  (q15_t)0x7982, (q15_t)0xd7c2, (q15_t)0x7980, (q15_t)0xd7bc, (q15_t)0x797e, (q15_t)0xd7b6, (q15_t)0x797c, (q15_t)0xd7b0,
+  (q15_t)0x797a, (q15_t)0xd7aa, (q15_t)0x7978, (q15_t)0xd7a4, (q15_t)0x7976, (q15_t)0xd79e, (q15_t)0x7974, (q15_t)0xd798,
+  (q15_t)0x7972, (q15_t)0xd792, (q15_t)0x7970, (q15_t)0xd78c, (q15_t)0x796e, (q15_t)0xd786, (q15_t)0x796c, (q15_t)0xd780,
+  (q15_t)0x796a, (q15_t)0xd77a, (q15_t)0x7968, (q15_t)0xd774, (q15_t)0x7966, (q15_t)0xd76e, (q15_t)0x7964, (q15_t)0xd768,
+  (q15_t)0x7962, (q15_t)0xd763, (q15_t)0x7960, (q15_t)0xd75d, (q15_t)0x795e, (q15_t)0xd757, (q15_t)0x795c, (q15_t)0xd751,
+  (q15_t)0x795a, (q15_t)0xd74b, (q15_t)0x7958, (q15_t)0xd745, (q15_t)0x7956, (q15_t)0xd73f, (q15_t)0x7954, (q15_t)0xd739,
+  (q15_t)0x7952, (q15_t)0xd733, (q15_t)0x7950, (q15_t)0xd72d, (q15_t)0x794e, (q15_t)0xd727, (q15_t)0x794c, (q15_t)0xd721,
+  (q15_t)0x794a, (q15_t)0xd71b, (q15_t)0x7948, (q15_t)0xd715, (q15_t)0x7946, (q15_t)0xd70f, (q15_t)0x7944, (q15_t)0xd709,
+  (q15_t)0x7942, (q15_t)0xd703, (q15_t)0x7940, (q15_t)0xd6fd, (q15_t)0x793e, (q15_t)0xd6f7, (q15_t)0x793c, (q15_t)0xd6f1,
+  (q15_t)0x793a, (q15_t)0xd6eb, (q15_t)0x7938, (q15_t)0xd6e5, (q15_t)0x7936, (q15_t)0xd6e0, (q15_t)0x7934, (q15_t)0xd6da,
+  (q15_t)0x7932, (q15_t)0xd6d4, (q15_t)0x7930, (q15_t)0xd6ce, (q15_t)0x792e, (q15_t)0xd6c8, (q15_t)0x792c, (q15_t)0xd6c2,
+  (q15_t)0x792a, (q15_t)0xd6bc, (q15_t)0x7928, (q15_t)0xd6b6, (q15_t)0x7926, (q15_t)0xd6b0, (q15_t)0x7924, (q15_t)0xd6aa,
+  (q15_t)0x7922, (q15_t)0xd6a4, (q15_t)0x7920, (q15_t)0xd69e, (q15_t)0x791e, (q15_t)0xd698, (q15_t)0x791c, (q15_t)0xd692,
+  (q15_t)0x7919, (q15_t)0xd68c, (q15_t)0x7917, (q15_t)0xd686, (q15_t)0x7915, (q15_t)0xd680, (q15_t)0x7913, (q15_t)0xd67a,
+  (q15_t)0x7911, (q15_t)0xd675, (q15_t)0x790f, (q15_t)0xd66f, (q15_t)0x790d, (q15_t)0xd669, (q15_t)0x790b, (q15_t)0xd663,
+  (q15_t)0x7909, (q15_t)0xd65d, (q15_t)0x7907, (q15_t)0xd657, (q15_t)0x7905, (q15_t)0xd651, (q15_t)0x7903, (q15_t)0xd64b,
+  (q15_t)0x7901, (q15_t)0xd645, (q15_t)0x78ff, (q15_t)0xd63f, (q15_t)0x78fd, (q15_t)0xd639, (q15_t)0x78fb, (q15_t)0xd633,
+  (q15_t)0x78f9, (q15_t)0xd62d, (q15_t)0x78f7, (q15_t)0xd627, (q15_t)0x78f5, (q15_t)0xd621, (q15_t)0x78f3, (q15_t)0xd61b,
+  (q15_t)0x78f1, (q15_t)0xd615, (q15_t)0x78ee, (q15_t)0xd610, (q15_t)0x78ec, (q15_t)0xd60a, (q15_t)0x78ea, (q15_t)0xd604,
+  (q15_t)0x78e8, (q15_t)0xd5fe, (q15_t)0x78e6, (q15_t)0xd5f8, (q15_t)0x78e4, (q15_t)0xd5f2, (q15_t)0x78e2, (q15_t)0xd5ec,
+  (q15_t)0x78e0, (q15_t)0xd5e6, (q15_t)0x78de, (q15_t)0xd5e0, (q15_t)0x78dc, (q15_t)0xd5da, (q15_t)0x78da, (q15_t)0xd5d4,
+  (q15_t)0x78d8, (q15_t)0xd5ce, (q15_t)0x78d6, (q15_t)0xd5c8, (q15_t)0x78d4, (q15_t)0xd5c2, (q15_t)0x78d2, (q15_t)0xd5bc,
+  (q15_t)0x78cf, (q15_t)0xd5b7, (q15_t)0x78cd, (q15_t)0xd5b1, (q15_t)0x78cb, (q15_t)0xd5ab, (q15_t)0x78c9, (q15_t)0xd5a5,
+  (q15_t)0x78c7, (q15_t)0xd59f, (q15_t)0x78c5, (q15_t)0xd599, (q15_t)0x78c3, (q15_t)0xd593, (q15_t)0x78c1, (q15_t)0xd58d,
+  (q15_t)0x78bf, (q15_t)0xd587, (q15_t)0x78bd, (q15_t)0xd581, (q15_t)0x78bb, (q15_t)0xd57b, (q15_t)0x78b9, (q15_t)0xd575,
+  (q15_t)0x78b6, (q15_t)0xd56f, (q15_t)0x78b4, (q15_t)0xd569, (q15_t)0x78b2, (q15_t)0xd564, (q15_t)0x78b0, (q15_t)0xd55e,
+  (q15_t)0x78ae, (q15_t)0xd558, (q15_t)0x78ac, (q15_t)0xd552, (q15_t)0x78aa, (q15_t)0xd54c, (q15_t)0x78a8, (q15_t)0xd546,
+  (q15_t)0x78a6, (q15_t)0xd540, (q15_t)0x78a4, (q15_t)0xd53a, (q15_t)0x78a2, (q15_t)0xd534, (q15_t)0x789f, (q15_t)0xd52e,
+  (q15_t)0x789d, (q15_t)0xd528, (q15_t)0x789b, (q15_t)0xd522, (q15_t)0x7899, (q15_t)0xd51c, (q15_t)0x7897, (q15_t)0xd517,
+  (q15_t)0x7895, (q15_t)0xd511, (q15_t)0x7893, (q15_t)0xd50b, (q15_t)0x7891, (q15_t)0xd505, (q15_t)0x788f, (q15_t)0xd4ff,
+  (q15_t)0x788c, (q15_t)0xd4f9, (q15_t)0x788a, (q15_t)0xd4f3, (q15_t)0x7888, (q15_t)0xd4ed, (q15_t)0x7886, (q15_t)0xd4e7,
+  (q15_t)0x7884, (q15_t)0xd4e1, (q15_t)0x7882, (q15_t)0xd4db, (q15_t)0x7880, (q15_t)0xd4d5, (q15_t)0x787e, (q15_t)0xd4d0,
+  (q15_t)0x787c, (q15_t)0xd4ca, (q15_t)0x7879, (q15_t)0xd4c4, (q15_t)0x7877, (q15_t)0xd4be, (q15_t)0x7875, (q15_t)0xd4b8,
+  (q15_t)0x7873, (q15_t)0xd4b2, (q15_t)0x7871, (q15_t)0xd4ac, (q15_t)0x786f, (q15_t)0xd4a6, (q15_t)0x786d, (q15_t)0xd4a0,
+  (q15_t)0x786b, (q15_t)0xd49a, (q15_t)0x7868, (q15_t)0xd494, (q15_t)0x7866, (q15_t)0xd48f, (q15_t)0x7864, (q15_t)0xd489,
+  (q15_t)0x7862, (q15_t)0xd483, (q15_t)0x7860, (q15_t)0xd47d, (q15_t)0x785e, (q15_t)0xd477, (q15_t)0x785c, (q15_t)0xd471,
+  (q15_t)0x7859, (q15_t)0xd46b, (q15_t)0x7857, (q15_t)0xd465, (q15_t)0x7855, (q15_t)0xd45f, (q15_t)0x7853, (q15_t)0xd459,
+  (q15_t)0x7851, (q15_t)0xd453, (q15_t)0x784f, (q15_t)0xd44e, (q15_t)0x784d, (q15_t)0xd448, (q15_t)0x784a, (q15_t)0xd442,
+  (q15_t)0x7848, (q15_t)0xd43c, (q15_t)0x7846, (q15_t)0xd436, (q15_t)0x7844, (q15_t)0xd430, (q15_t)0x7842, (q15_t)0xd42a,
+  (q15_t)0x7840, (q15_t)0xd424, (q15_t)0x783e, (q15_t)0xd41e, (q15_t)0x783b, (q15_t)0xd418, (q15_t)0x7839, (q15_t)0xd412,
+  (q15_t)0x7837, (q15_t)0xd40d, (q15_t)0x7835, (q15_t)0xd407, (q15_t)0x7833, (q15_t)0xd401, (q15_t)0x7831, (q15_t)0xd3fb,
+  (q15_t)0x782e, (q15_t)0xd3f5, (q15_t)0x782c, (q15_t)0xd3ef, (q15_t)0x782a, (q15_t)0xd3e9, (q15_t)0x7828, (q15_t)0xd3e3,
+  (q15_t)0x7826, (q15_t)0xd3dd, (q15_t)0x7824, (q15_t)0xd3d7, (q15_t)0x7821, (q15_t)0xd3d2, (q15_t)0x781f, (q15_t)0xd3cc,
+  (q15_t)0x781d, (q15_t)0xd3c6, (q15_t)0x781b, (q15_t)0xd3c0, (q15_t)0x7819, (q15_t)0xd3ba, (q15_t)0x7817, (q15_t)0xd3b4,
+  (q15_t)0x7814, (q15_t)0xd3ae, (q15_t)0x7812, (q15_t)0xd3a8, (q15_t)0x7810, (q15_t)0xd3a2, (q15_t)0x780e, (q15_t)0xd39d,
+  (q15_t)0x780c, (q15_t)0xd397, (q15_t)0x780a, (q15_t)0xd391, (q15_t)0x7807, (q15_t)0xd38b, (q15_t)0x7805, (q15_t)0xd385,
+  (q15_t)0x7803, (q15_t)0xd37f, (q15_t)0x7801, (q15_t)0xd379, (q15_t)0x77ff, (q15_t)0xd373, (q15_t)0x77fc, (q15_t)0xd36d,
+  (q15_t)0x77fa, (q15_t)0xd368, (q15_t)0x77f8, (q15_t)0xd362, (q15_t)0x77f6, (q15_t)0xd35c, (q15_t)0x77f4, (q15_t)0xd356,
+  (q15_t)0x77f1, (q15_t)0xd350, (q15_t)0x77ef, (q15_t)0xd34a, (q15_t)0x77ed, (q15_t)0xd344, (q15_t)0x77eb, (q15_t)0xd33e,
+  (q15_t)0x77e9, (q15_t)0xd338, (q15_t)0x77e6, (q15_t)0xd333, (q15_t)0x77e4, (q15_t)0xd32d, (q15_t)0x77e2, (q15_t)0xd327,
+  (q15_t)0x77e0, (q15_t)0xd321, (q15_t)0x77de, (q15_t)0xd31b, (q15_t)0x77db, (q15_t)0xd315, (q15_t)0x77d9, (q15_t)0xd30f,
+  (q15_t)0x77d7, (q15_t)0xd309, (q15_t)0x77d5, (q15_t)0xd303, (q15_t)0x77d3, (q15_t)0xd2fe, (q15_t)0x77d0, (q15_t)0xd2f8,
+  (q15_t)0x77ce, (q15_t)0xd2f2, (q15_t)0x77cc, (q15_t)0xd2ec, (q15_t)0x77ca, (q15_t)0xd2e6, (q15_t)0x77c8, (q15_t)0xd2e0,
+  (q15_t)0x77c5, (q15_t)0xd2da, (q15_t)0x77c3, (q15_t)0xd2d4, (q15_t)0x77c1, (q15_t)0xd2cf, (q15_t)0x77bf, (q15_t)0xd2c9,
+  (q15_t)0x77bc, (q15_t)0xd2c3, (q15_t)0x77ba, (q15_t)0xd2bd, (q15_t)0x77b8, (q15_t)0xd2b7, (q15_t)0x77b6, (q15_t)0xd2b1,
+  (q15_t)0x77b4, (q15_t)0xd2ab, (q15_t)0x77b1, (q15_t)0xd2a5, (q15_t)0x77af, (q15_t)0xd2a0, (q15_t)0x77ad, (q15_t)0xd29a,
+  (q15_t)0x77ab, (q15_t)0xd294, (q15_t)0x77a8, (q15_t)0xd28e, (q15_t)0x77a6, (q15_t)0xd288, (q15_t)0x77a4, (q15_t)0xd282,
+  (q15_t)0x77a2, (q15_t)0xd27c, (q15_t)0x77a0, (q15_t)0xd276, (q15_t)0x779d, (q15_t)0xd271, (q15_t)0x779b, (q15_t)0xd26b,
+  (q15_t)0x7799, (q15_t)0xd265, (q15_t)0x7797, (q15_t)0xd25f, (q15_t)0x7794, (q15_t)0xd259, (q15_t)0x7792, (q15_t)0xd253,
+  (q15_t)0x7790, (q15_t)0xd24d, (q15_t)0x778e, (q15_t)0xd247, (q15_t)0x778b, (q15_t)0xd242, (q15_t)0x7789, (q15_t)0xd23c,
+  (q15_t)0x7787, (q15_t)0xd236, (q15_t)0x7785, (q15_t)0xd230, (q15_t)0x7782, (q15_t)0xd22a, (q15_t)0x7780, (q15_t)0xd224,
+  (q15_t)0x777e, (q15_t)0xd21e, (q15_t)0x777c, (q15_t)0xd219, (q15_t)0x7779, (q15_t)0xd213, (q15_t)0x7777, (q15_t)0xd20d,
+  (q15_t)0x7775, (q15_t)0xd207, (q15_t)0x7773, (q15_t)0xd201, (q15_t)0x7770, (q15_t)0xd1fb, (q15_t)0x776e, (q15_t)0xd1f5,
+  (q15_t)0x776c, (q15_t)0xd1ef, (q15_t)0x776a, (q15_t)0xd1ea, (q15_t)0x7767, (q15_t)0xd1e4, (q15_t)0x7765, (q15_t)0xd1de,
+  (q15_t)0x7763, (q15_t)0xd1d8, (q15_t)0x7760, (q15_t)0xd1d2, (q15_t)0x775e, (q15_t)0xd1cc, (q15_t)0x775c, (q15_t)0xd1c6,
+  (q15_t)0x775a, (q15_t)0xd1c1, (q15_t)0x7757, (q15_t)0xd1bb, (q15_t)0x7755, (q15_t)0xd1b5, (q15_t)0x7753, (q15_t)0xd1af,
+  (q15_t)0x7751, (q15_t)0xd1a9, (q15_t)0x774e, (q15_t)0xd1a3, (q15_t)0x774c, (q15_t)0xd19d, (q15_t)0x774a, (q15_t)0xd198,
+  (q15_t)0x7747, (q15_t)0xd192, (q15_t)0x7745, (q15_t)0xd18c, (q15_t)0x7743, (q15_t)0xd186, (q15_t)0x7741, (q15_t)0xd180,
+  (q15_t)0x773e, (q15_t)0xd17a, (q15_t)0x773c, (q15_t)0xd174, (q15_t)0x773a, (q15_t)0xd16f, (q15_t)0x7738, (q15_t)0xd169,
+  (q15_t)0x7735, (q15_t)0xd163, (q15_t)0x7733, (q15_t)0xd15d, (q15_t)0x7731, (q15_t)0xd157, (q15_t)0x772e, (q15_t)0xd151,
+  (q15_t)0x772c, (q15_t)0xd14b, (q15_t)0x772a, (q15_t)0xd146, (q15_t)0x7727, (q15_t)0xd140, (q15_t)0x7725, (q15_t)0xd13a,
+  (q15_t)0x7723, (q15_t)0xd134, (q15_t)0x7721, (q15_t)0xd12e, (q15_t)0x771e, (q15_t)0xd128, (q15_t)0x771c, (q15_t)0xd123,
+  (q15_t)0x771a, (q15_t)0xd11d, (q15_t)0x7717, (q15_t)0xd117, (q15_t)0x7715, (q15_t)0xd111, (q15_t)0x7713, (q15_t)0xd10b,
+  (q15_t)0x7710, (q15_t)0xd105, (q15_t)0x770e, (q15_t)0xd0ff, (q15_t)0x770c, (q15_t)0xd0fa, (q15_t)0x770a, (q15_t)0xd0f4,
+  (q15_t)0x7707, (q15_t)0xd0ee, (q15_t)0x7705, (q15_t)0xd0e8, (q15_t)0x7703, (q15_t)0xd0e2, (q15_t)0x7700, (q15_t)0xd0dc,
+  (q15_t)0x76fe, (q15_t)0xd0d7, (q15_t)0x76fc, (q15_t)0xd0d1, (q15_t)0x76f9, (q15_t)0xd0cb, (q15_t)0x76f7, (q15_t)0xd0c5,
+  (q15_t)0x76f5, (q15_t)0xd0bf, (q15_t)0x76f2, (q15_t)0xd0b9, (q15_t)0x76f0, (q15_t)0xd0b4, (q15_t)0x76ee, (q15_t)0xd0ae,
+  (q15_t)0x76eb, (q15_t)0xd0a8, (q15_t)0x76e9, (q15_t)0xd0a2, (q15_t)0x76e7, (q15_t)0xd09c, (q15_t)0x76e4, (q15_t)0xd096,
+  (q15_t)0x76e2, (q15_t)0xd091, (q15_t)0x76e0, (q15_t)0xd08b, (q15_t)0x76dd, (q15_t)0xd085, (q15_t)0x76db, (q15_t)0xd07f,
+  (q15_t)0x76d9, (q15_t)0xd079, (q15_t)0x76d6, (q15_t)0xd073, (q15_t)0x76d4, (q15_t)0xd06e, (q15_t)0x76d2, (q15_t)0xd068,
+  (q15_t)0x76cf, (q15_t)0xd062, (q15_t)0x76cd, (q15_t)0xd05c, (q15_t)0x76cb, (q15_t)0xd056, (q15_t)0x76c8, (q15_t)0xd050,
+  (q15_t)0x76c6, (q15_t)0xd04b, (q15_t)0x76c4, (q15_t)0xd045, (q15_t)0x76c1, (q15_t)0xd03f, (q15_t)0x76bf, (q15_t)0xd039,
+  (q15_t)0x76bd, (q15_t)0xd033, (q15_t)0x76ba, (q15_t)0xd02d, (q15_t)0x76b8, (q15_t)0xd028, (q15_t)0x76b6, (q15_t)0xd022,
+  (q15_t)0x76b3, (q15_t)0xd01c, (q15_t)0x76b1, (q15_t)0xd016, (q15_t)0x76af, (q15_t)0xd010, (q15_t)0x76ac, (q15_t)0xd00a,
+  (q15_t)0x76aa, (q15_t)0xd005, (q15_t)0x76a8, (q15_t)0xcfff, (q15_t)0x76a5, (q15_t)0xcff9, (q15_t)0x76a3, (q15_t)0xcff3,
+  (q15_t)0x76a0, (q15_t)0xcfed, (q15_t)0x769e, (q15_t)0xcfe7, (q15_t)0x769c, (q15_t)0xcfe2, (q15_t)0x7699, (q15_t)0xcfdc,
+  (q15_t)0x7697, (q15_t)0xcfd6, (q15_t)0x7695, (q15_t)0xcfd0, (q15_t)0x7692, (q15_t)0xcfca, (q15_t)0x7690, (q15_t)0xcfc5,
+  (q15_t)0x768e, (q15_t)0xcfbf, (q15_t)0x768b, (q15_t)0xcfb9, (q15_t)0x7689, (q15_t)0xcfb3, (q15_t)0x7686, (q15_t)0xcfad,
+  (q15_t)0x7684, (q15_t)0xcfa7, (q15_t)0x7682, (q15_t)0xcfa2, (q15_t)0x767f, (q15_t)0xcf9c, (q15_t)0x767d, (q15_t)0xcf96,
+  (q15_t)0x767b, (q15_t)0xcf90, (q15_t)0x7678, (q15_t)0xcf8a, (q15_t)0x7676, (q15_t)0xcf85, (q15_t)0x7673, (q15_t)0xcf7f,
+  (q15_t)0x7671, (q15_t)0xcf79, (q15_t)0x766f, (q15_t)0xcf73, (q15_t)0x766c, (q15_t)0xcf6d, (q15_t)0x766a, (q15_t)0xcf67,
+  (q15_t)0x7668, (q15_t)0xcf62, (q15_t)0x7665, (q15_t)0xcf5c, (q15_t)0x7663, (q15_t)0xcf56, (q15_t)0x7660, (q15_t)0xcf50,
+  (q15_t)0x765e, (q15_t)0xcf4a, (q15_t)0x765c, (q15_t)0xcf45, (q15_t)0x7659, (q15_t)0xcf3f, (q15_t)0x7657, (q15_t)0xcf39,
+  (q15_t)0x7654, (q15_t)0xcf33, (q15_t)0x7652, (q15_t)0xcf2d, (q15_t)0x7650, (q15_t)0xcf28, (q15_t)0x764d, (q15_t)0xcf22,
+  (q15_t)0x764b, (q15_t)0xcf1c, (q15_t)0x7648, (q15_t)0xcf16, (q15_t)0x7646, (q15_t)0xcf10, (q15_t)0x7644, (q15_t)0xcf0b,
+  (q15_t)0x7641, (q15_t)0xcf05, (q15_t)0x763f, (q15_t)0xceff, (q15_t)0x763c, (q15_t)0xcef9, (q15_t)0x763a, (q15_t)0xcef3,
+  (q15_t)0x7638, (q15_t)0xceee, (q15_t)0x7635, (q15_t)0xcee8, (q15_t)0x7633, (q15_t)0xcee2, (q15_t)0x7630, (q15_t)0xcedc,
+  (q15_t)0x762e, (q15_t)0xced6, (q15_t)0x762b, (q15_t)0xced1, (q15_t)0x7629, (q15_t)0xcecb, (q15_t)0x7627, (q15_t)0xcec5,
+  (q15_t)0x7624, (q15_t)0xcebf, (q15_t)0x7622, (q15_t)0xceb9, (q15_t)0x761f, (q15_t)0xceb4, (q15_t)0x761d, (q15_t)0xceae,
+  (q15_t)0x761b, (q15_t)0xcea8, (q15_t)0x7618, (q15_t)0xcea2, (q15_t)0x7616, (q15_t)0xce9c, (q15_t)0x7613, (q15_t)0xce97,
+  (q15_t)0x7611, (q15_t)0xce91, (q15_t)0x760e, (q15_t)0xce8b, (q15_t)0x760c, (q15_t)0xce85, (q15_t)0x760a, (q15_t)0xce7f,
+  (q15_t)0x7607, (q15_t)0xce7a, (q15_t)0x7605, (q15_t)0xce74, (q15_t)0x7602, (q15_t)0xce6e, (q15_t)0x7600, (q15_t)0xce68,
+  (q15_t)0x75fd, (q15_t)0xce62, (q15_t)0x75fb, (q15_t)0xce5d, (q15_t)0x75f9, (q15_t)0xce57, (q15_t)0x75f6, (q15_t)0xce51,
+  (q15_t)0x75f4, (q15_t)0xce4b, (q15_t)0x75f1, (q15_t)0xce45, (q15_t)0x75ef, (q15_t)0xce40, (q15_t)0x75ec, (q15_t)0xce3a,
+  (q15_t)0x75ea, (q15_t)0xce34, (q15_t)0x75e7, (q15_t)0xce2e, (q15_t)0x75e5, (q15_t)0xce28, (q15_t)0x75e3, (q15_t)0xce23,
+  (q15_t)0x75e0, (q15_t)0xce1d, (q15_t)0x75de, (q15_t)0xce17, (q15_t)0x75db, (q15_t)0xce11, (q15_t)0x75d9, (q15_t)0xce0c,
+  (q15_t)0x75d6, (q15_t)0xce06, (q15_t)0x75d4, (q15_t)0xce00, (q15_t)0x75d1, (q15_t)0xcdfa, (q15_t)0x75cf, (q15_t)0xcdf4,
+  (q15_t)0x75cc, (q15_t)0xcdef, (q15_t)0x75ca, (q15_t)0xcde9, (q15_t)0x75c8, (q15_t)0xcde3, (q15_t)0x75c5, (q15_t)0xcddd,
+  (q15_t)0x75c3, (q15_t)0xcdd8, (q15_t)0x75c0, (q15_t)0xcdd2, (q15_t)0x75be, (q15_t)0xcdcc, (q15_t)0x75bb, (q15_t)0xcdc6,
+  (q15_t)0x75b9, (q15_t)0xcdc0, (q15_t)0x75b6, (q15_t)0xcdbb, (q15_t)0x75b4, (q15_t)0xcdb5, (q15_t)0x75b1, (q15_t)0xcdaf,
+  (q15_t)0x75af, (q15_t)0xcda9, (q15_t)0x75ac, (q15_t)0xcda3, (q15_t)0x75aa, (q15_t)0xcd9e, (q15_t)0x75a7, (q15_t)0xcd98,
+  (q15_t)0x75a5, (q15_t)0xcd92, (q15_t)0x75a3, (q15_t)0xcd8c, (q15_t)0x75a0, (q15_t)0xcd87, (q15_t)0x759e, (q15_t)0xcd81,
+  (q15_t)0x759b, (q15_t)0xcd7b, (q15_t)0x7599, (q15_t)0xcd75, (q15_t)0x7596, (q15_t)0xcd70, (q15_t)0x7594, (q15_t)0xcd6a,
+  (q15_t)0x7591, (q15_t)0xcd64, (q15_t)0x758f, (q15_t)0xcd5e, (q15_t)0x758c, (q15_t)0xcd58, (q15_t)0x758a, (q15_t)0xcd53,
+  (q15_t)0x7587, (q15_t)0xcd4d, (q15_t)0x7585, (q15_t)0xcd47, (q15_t)0x7582, (q15_t)0xcd41, (q15_t)0x7580, (q15_t)0xcd3c,
+  (q15_t)0x757d, (q15_t)0xcd36, (q15_t)0x757b, (q15_t)0xcd30, (q15_t)0x7578, (q15_t)0xcd2a, (q15_t)0x7576, (q15_t)0xcd25,
+  (q15_t)0x7573, (q15_t)0xcd1f, (q15_t)0x7571, (q15_t)0xcd19, (q15_t)0x756e, (q15_t)0xcd13, (q15_t)0x756c, (q15_t)0xcd0d,
+  (q15_t)0x7569, (q15_t)0xcd08, (q15_t)0x7567, (q15_t)0xcd02, (q15_t)0x7564, (q15_t)0xccfc, (q15_t)0x7562, (q15_t)0xccf6,
+  (q15_t)0x755f, (q15_t)0xccf1, (q15_t)0x755d, (q15_t)0xcceb, (q15_t)0x755a, (q15_t)0xcce5, (q15_t)0x7558, (q15_t)0xccdf,
+  (q15_t)0x7555, (q15_t)0xccda, (q15_t)0x7553, (q15_t)0xccd4, (q15_t)0x7550, (q15_t)0xccce, (q15_t)0x754e, (q15_t)0xccc8,
+  (q15_t)0x754b, (q15_t)0xccc3, (q15_t)0x7549, (q15_t)0xccbd, (q15_t)0x7546, (q15_t)0xccb7, (q15_t)0x7544, (q15_t)0xccb1,
+  (q15_t)0x7541, (q15_t)0xccac, (q15_t)0x753f, (q15_t)0xcca6, (q15_t)0x753c, (q15_t)0xcca0, (q15_t)0x753a, (q15_t)0xcc9a,
+  (q15_t)0x7537, (q15_t)0xcc95, (q15_t)0x7535, (q15_t)0xcc8f, (q15_t)0x7532, (q15_t)0xcc89, (q15_t)0x752f, (q15_t)0xcc83,
+  (q15_t)0x752d, (q15_t)0xcc7e, (q15_t)0x752a, (q15_t)0xcc78, (q15_t)0x7528, (q15_t)0xcc72, (q15_t)0x7525, (q15_t)0xcc6c,
+  (q15_t)0x7523, (q15_t)0xcc67, (q15_t)0x7520, (q15_t)0xcc61, (q15_t)0x751e, (q15_t)0xcc5b, (q15_t)0x751b, (q15_t)0xcc55,
+  (q15_t)0x7519, (q15_t)0xcc50, (q15_t)0x7516, (q15_t)0xcc4a, (q15_t)0x7514, (q15_t)0xcc44, (q15_t)0x7511, (q15_t)0xcc3e,
+  (q15_t)0x750f, (q15_t)0xcc39, (q15_t)0x750c, (q15_t)0xcc33, (q15_t)0x7509, (q15_t)0xcc2d, (q15_t)0x7507, (q15_t)0xcc27,
+  (q15_t)0x7504, (q15_t)0xcc22, (q15_t)0x7502, (q15_t)0xcc1c, (q15_t)0x74ff, (q15_t)0xcc16, (q15_t)0x74fd, (q15_t)0xcc10,
+  (q15_t)0x74fa, (q15_t)0xcc0b, (q15_t)0x74f8, (q15_t)0xcc05, (q15_t)0x74f5, (q15_t)0xcbff, (q15_t)0x74f2, (q15_t)0xcbf9,
+  (q15_t)0x74f0, (q15_t)0xcbf4, (q15_t)0x74ed, (q15_t)0xcbee, (q15_t)0x74eb, (q15_t)0xcbe8, (q15_t)0x74e8, (q15_t)0xcbe2,
+  (q15_t)0x74e6, (q15_t)0xcbdd, (q15_t)0x74e3, (q15_t)0xcbd7, (q15_t)0x74e1, (q15_t)0xcbd1, (q15_t)0x74de, (q15_t)0xcbcb,
+  (q15_t)0x74db, (q15_t)0xcbc6, (q15_t)0x74d9, (q15_t)0xcbc0, (q15_t)0x74d6, (q15_t)0xcbba, (q15_t)0x74d4, (q15_t)0xcbb5,
+  (q15_t)0x74d1, (q15_t)0xcbaf, (q15_t)0x74cf, (q15_t)0xcba9, (q15_t)0x74cc, (q15_t)0xcba3, (q15_t)0x74c9, (q15_t)0xcb9e,
+  (q15_t)0x74c7, (q15_t)0xcb98, (q15_t)0x74c4, (q15_t)0xcb92, (q15_t)0x74c2, (q15_t)0xcb8c, (q15_t)0x74bf, (q15_t)0xcb87,
+  (q15_t)0x74bd, (q15_t)0xcb81, (q15_t)0x74ba, (q15_t)0xcb7b, (q15_t)0x74b7, (q15_t)0xcb75, (q15_t)0x74b5, (q15_t)0xcb70,
+  (q15_t)0x74b2, (q15_t)0xcb6a, (q15_t)0x74b0, (q15_t)0xcb64, (q15_t)0x74ad, (q15_t)0xcb5f, (q15_t)0x74ab, (q15_t)0xcb59,
+  (q15_t)0x74a8, (q15_t)0xcb53, (q15_t)0x74a5, (q15_t)0xcb4d, (q15_t)0x74a3, (q15_t)0xcb48, (q15_t)0x74a0, (q15_t)0xcb42,
+  (q15_t)0x749e, (q15_t)0xcb3c, (q15_t)0x749b, (q15_t)0xcb36, (q15_t)0x7498, (q15_t)0xcb31, (q15_t)0x7496, (q15_t)0xcb2b,
+  (q15_t)0x7493, (q15_t)0xcb25, (q15_t)0x7491, (q15_t)0xcb20, (q15_t)0x748e, (q15_t)0xcb1a, (q15_t)0x748b, (q15_t)0xcb14,
+  (q15_t)0x7489, (q15_t)0xcb0e, (q15_t)0x7486, (q15_t)0xcb09, (q15_t)0x7484, (q15_t)0xcb03, (q15_t)0x7481, (q15_t)0xcafd,
+  (q15_t)0x747e, (q15_t)0xcaf8, (q15_t)0x747c, (q15_t)0xcaf2, (q15_t)0x7479, (q15_t)0xcaec, (q15_t)0x7477, (q15_t)0xcae6,
+  (q15_t)0x7474, (q15_t)0xcae1, (q15_t)0x7471, (q15_t)0xcadb, (q15_t)0x746f, (q15_t)0xcad5, (q15_t)0x746c, (q15_t)0xcad0,
+  (q15_t)0x746a, (q15_t)0xcaca, (q15_t)0x7467, (q15_t)0xcac4, (q15_t)0x7464, (q15_t)0xcabe, (q15_t)0x7462, (q15_t)0xcab9,
+  (q15_t)0x745f, (q15_t)0xcab3, (q15_t)0x745c, (q15_t)0xcaad, (q15_t)0x745a, (q15_t)0xcaa8, (q15_t)0x7457, (q15_t)0xcaa2,
+  (q15_t)0x7455, (q15_t)0xca9c, (q15_t)0x7452, (q15_t)0xca96, (q15_t)0x744f, (q15_t)0xca91, (q15_t)0x744d, (q15_t)0xca8b,
+  (q15_t)0x744a, (q15_t)0xca85, (q15_t)0x7448, (q15_t)0xca80, (q15_t)0x7445, (q15_t)0xca7a, (q15_t)0x7442, (q15_t)0xca74,
+  (q15_t)0x7440, (q15_t)0xca6e, (q15_t)0x743d, (q15_t)0xca69, (q15_t)0x743a, (q15_t)0xca63, (q15_t)0x7438, (q15_t)0xca5d,
+  (q15_t)0x7435, (q15_t)0xca58, (q15_t)0x7432, (q15_t)0xca52, (q15_t)0x7430, (q15_t)0xca4c, (q15_t)0x742d, (q15_t)0xca46,
+  (q15_t)0x742b, (q15_t)0xca41, (q15_t)0x7428, (q15_t)0xca3b, (q15_t)0x7425, (q15_t)0xca35, (q15_t)0x7423, (q15_t)0xca30,
+  (q15_t)0x7420, (q15_t)0xca2a, (q15_t)0x741d, (q15_t)0xca24, (q15_t)0x741b, (q15_t)0xca1f, (q15_t)0x7418, (q15_t)0xca19,
+  (q15_t)0x7415, (q15_t)0xca13, (q15_t)0x7413, (q15_t)0xca0d, (q15_t)0x7410, (q15_t)0xca08, (q15_t)0x740d, (q15_t)0xca02,
+  (q15_t)0x740b, (q15_t)0xc9fc, (q15_t)0x7408, (q15_t)0xc9f7, (q15_t)0x7406, (q15_t)0xc9f1, (q15_t)0x7403, (q15_t)0xc9eb,
+  (q15_t)0x7400, (q15_t)0xc9e6, (q15_t)0x73fe, (q15_t)0xc9e0, (q15_t)0x73fb, (q15_t)0xc9da, (q15_t)0x73f8, (q15_t)0xc9d5,
+  (q15_t)0x73f6, (q15_t)0xc9cf, (q15_t)0x73f3, (q15_t)0xc9c9, (q15_t)0x73f0, (q15_t)0xc9c3, (q15_t)0x73ee, (q15_t)0xc9be,
+  (q15_t)0x73eb, (q15_t)0xc9b8, (q15_t)0x73e8, (q15_t)0xc9b2, (q15_t)0x73e6, (q15_t)0xc9ad, (q15_t)0x73e3, (q15_t)0xc9a7,
+  (q15_t)0x73e0, (q15_t)0xc9a1, (q15_t)0x73de, (q15_t)0xc99c, (q15_t)0x73db, (q15_t)0xc996, (q15_t)0x73d8, (q15_t)0xc990,
+  (q15_t)0x73d6, (q15_t)0xc98b, (q15_t)0x73d3, (q15_t)0xc985, (q15_t)0x73d0, (q15_t)0xc97f, (q15_t)0x73ce, (q15_t)0xc97a,
+  (q15_t)0x73cb, (q15_t)0xc974, (q15_t)0x73c8, (q15_t)0xc96e, (q15_t)0x73c6, (q15_t)0xc968, (q15_t)0x73c3, (q15_t)0xc963,
+  (q15_t)0x73c0, (q15_t)0xc95d, (q15_t)0x73bd, (q15_t)0xc957, (q15_t)0x73bb, (q15_t)0xc952, (q15_t)0x73b8, (q15_t)0xc94c,
+  (q15_t)0x73b5, (q15_t)0xc946, (q15_t)0x73b3, (q15_t)0xc941, (q15_t)0x73b0, (q15_t)0xc93b, (q15_t)0x73ad, (q15_t)0xc935,
+  (q15_t)0x73ab, (q15_t)0xc930, (q15_t)0x73a8, (q15_t)0xc92a, (q15_t)0x73a5, (q15_t)0xc924, (q15_t)0x73a3, (q15_t)0xc91f,
+  (q15_t)0x73a0, (q15_t)0xc919, (q15_t)0x739d, (q15_t)0xc913, (q15_t)0x739b, (q15_t)0xc90e, (q15_t)0x7398, (q15_t)0xc908,
+  (q15_t)0x7395, (q15_t)0xc902, (q15_t)0x7392, (q15_t)0xc8fd, (q15_t)0x7390, (q15_t)0xc8f7, (q15_t)0x738d, (q15_t)0xc8f1,
+  (q15_t)0x738a, (q15_t)0xc8ec, (q15_t)0x7388, (q15_t)0xc8e6, (q15_t)0x7385, (q15_t)0xc8e0, (q15_t)0x7382, (q15_t)0xc8db,
+  (q15_t)0x737f, (q15_t)0xc8d5, (q15_t)0x737d, (q15_t)0xc8cf, (q15_t)0x737a, (q15_t)0xc8ca, (q15_t)0x7377, (q15_t)0xc8c4,
+  (q15_t)0x7375, (q15_t)0xc8be, (q15_t)0x7372, (q15_t)0xc8b9, (q15_t)0x736f, (q15_t)0xc8b3, (q15_t)0x736c, (q15_t)0xc8ad,
+  (q15_t)0x736a, (q15_t)0xc8a8, (q15_t)0x7367, (q15_t)0xc8a2, (q15_t)0x7364, (q15_t)0xc89c, (q15_t)0x7362, (q15_t)0xc897,
+  (q15_t)0x735f, (q15_t)0xc891, (q15_t)0x735c, (q15_t)0xc88b, (q15_t)0x7359, (q15_t)0xc886, (q15_t)0x7357, (q15_t)0xc880,
+  (q15_t)0x7354, (q15_t)0xc87a, (q15_t)0x7351, (q15_t)0xc875, (q15_t)0x734f, (q15_t)0xc86f, (q15_t)0x734c, (q15_t)0xc869,
+  (q15_t)0x7349, (q15_t)0xc864, (q15_t)0x7346, (q15_t)0xc85e, (q15_t)0x7344, (q15_t)0xc858, (q15_t)0x7341, (q15_t)0xc853,
+  (q15_t)0x733e, (q15_t)0xc84d, (q15_t)0x733b, (q15_t)0xc847, (q15_t)0x7339, (q15_t)0xc842, (q15_t)0x7336, (q15_t)0xc83c,
+  (q15_t)0x7333, (q15_t)0xc836, (q15_t)0x7330, (q15_t)0xc831, (q15_t)0x732e, (q15_t)0xc82b, (q15_t)0x732b, (q15_t)0xc825,
+  (q15_t)0x7328, (q15_t)0xc820, (q15_t)0x7326, (q15_t)0xc81a, (q15_t)0x7323, (q15_t)0xc814, (q15_t)0x7320, (q15_t)0xc80f,
+  (q15_t)0x731d, (q15_t)0xc809, (q15_t)0x731b, (q15_t)0xc803, (q15_t)0x7318, (q15_t)0xc7fe, (q15_t)0x7315, (q15_t)0xc7f8,
+  (q15_t)0x7312, (q15_t)0xc7f3, (q15_t)0x7310, (q15_t)0xc7ed, (q15_t)0x730d, (q15_t)0xc7e7, (q15_t)0x730a, (q15_t)0xc7e2,
+  (q15_t)0x7307, (q15_t)0xc7dc, (q15_t)0x7305, (q15_t)0xc7d6, (q15_t)0x7302, (q15_t)0xc7d1, (q15_t)0x72ff, (q15_t)0xc7cb,
+  (q15_t)0x72fc, (q15_t)0xc7c5, (q15_t)0x72f9, (q15_t)0xc7c0, (q15_t)0x72f7, (q15_t)0xc7ba, (q15_t)0x72f4, (q15_t)0xc7b4,
+  (q15_t)0x72f1, (q15_t)0xc7af, (q15_t)0x72ee, (q15_t)0xc7a9, (q15_t)0x72ec, (q15_t)0xc7a3, (q15_t)0x72e9, (q15_t)0xc79e,
+  (q15_t)0x72e6, (q15_t)0xc798, (q15_t)0x72e3, (q15_t)0xc793, (q15_t)0x72e1, (q15_t)0xc78d, (q15_t)0x72de, (q15_t)0xc787,
+  (q15_t)0x72db, (q15_t)0xc782, (q15_t)0x72d8, (q15_t)0xc77c, (q15_t)0x72d5, (q15_t)0xc776, (q15_t)0x72d3, (q15_t)0xc771,
+  (q15_t)0x72d0, (q15_t)0xc76b, (q15_t)0x72cd, (q15_t)0xc765, (q15_t)0x72ca, (q15_t)0xc760, (q15_t)0x72c8, (q15_t)0xc75a,
+  (q15_t)0x72c5, (q15_t)0xc755, (q15_t)0x72c2, (q15_t)0xc74f, (q15_t)0x72bf, (q15_t)0xc749, (q15_t)0x72bc, (q15_t)0xc744,
+  (q15_t)0x72ba, (q15_t)0xc73e, (q15_t)0x72b7, (q15_t)0xc738, (q15_t)0x72b4, (q15_t)0xc733, (q15_t)0x72b1, (q15_t)0xc72d,
+  (q15_t)0x72af, (q15_t)0xc728, (q15_t)0x72ac, (q15_t)0xc722, (q15_t)0x72a9, (q15_t)0xc71c, (q15_t)0x72a6, (q15_t)0xc717,
+  (q15_t)0x72a3, (q15_t)0xc711, (q15_t)0x72a1, (q15_t)0xc70b, (q15_t)0x729e, (q15_t)0xc706, (q15_t)0x729b, (q15_t)0xc700,
+  (q15_t)0x7298, (q15_t)0xc6fa, (q15_t)0x7295, (q15_t)0xc6f5, (q15_t)0x7293, (q15_t)0xc6ef, (q15_t)0x7290, (q15_t)0xc6ea,
+  (q15_t)0x728d, (q15_t)0xc6e4, (q15_t)0x728a, (q15_t)0xc6de, (q15_t)0x7287, (q15_t)0xc6d9, (q15_t)0x7285, (q15_t)0xc6d3,
+  (q15_t)0x7282, (q15_t)0xc6ce, (q15_t)0x727f, (q15_t)0xc6c8, (q15_t)0x727c, (q15_t)0xc6c2, (q15_t)0x7279, (q15_t)0xc6bd,
+  (q15_t)0x7276, (q15_t)0xc6b7, (q15_t)0x7274, (q15_t)0xc6b1, (q15_t)0x7271, (q15_t)0xc6ac, (q15_t)0x726e, (q15_t)0xc6a6,
+  (q15_t)0x726b, (q15_t)0xc6a1, (q15_t)0x7268, (q15_t)0xc69b, (q15_t)0x7266, (q15_t)0xc695, (q15_t)0x7263, (q15_t)0xc690,
+  (q15_t)0x7260, (q15_t)0xc68a, (q15_t)0x725d, (q15_t)0xc684, (q15_t)0x725a, (q15_t)0xc67f, (q15_t)0x7257, (q15_t)0xc679,
+  (q15_t)0x7255, (q15_t)0xc674, (q15_t)0x7252, (q15_t)0xc66e, (q15_t)0x724f, (q15_t)0xc668, (q15_t)0x724c, (q15_t)0xc663,
+  (q15_t)0x7249, (q15_t)0xc65d, (q15_t)0x7247, (q15_t)0xc658, (q15_t)0x7244, (q15_t)0xc652, (q15_t)0x7241, (q15_t)0xc64c,
+  (q15_t)0x723e, (q15_t)0xc647, (q15_t)0x723b, (q15_t)0xc641, (q15_t)0x7238, (q15_t)0xc63c, (q15_t)0x7236, (q15_t)0xc636,
+  (q15_t)0x7233, (q15_t)0xc630, (q15_t)0x7230, (q15_t)0xc62b, (q15_t)0x722d, (q15_t)0xc625, (q15_t)0x722a, (q15_t)0xc620,
+  (q15_t)0x7227, (q15_t)0xc61a, (q15_t)0x7224, (q15_t)0xc614, (q15_t)0x7222, (q15_t)0xc60f, (q15_t)0x721f, (q15_t)0xc609,
+  (q15_t)0x721c, (q15_t)0xc603, (q15_t)0x7219, (q15_t)0xc5fe, (q15_t)0x7216, (q15_t)0xc5f8, (q15_t)0x7213, (q15_t)0xc5f3,
+  (q15_t)0x7211, (q15_t)0xc5ed, (q15_t)0x720e, (q15_t)0xc5e7, (q15_t)0x720b, (q15_t)0xc5e2, (q15_t)0x7208, (q15_t)0xc5dc,
+  (q15_t)0x7205, (q15_t)0xc5d7, (q15_t)0x7202, (q15_t)0xc5d1, (q15_t)0x71ff, (q15_t)0xc5cc, (q15_t)0x71fd, (q15_t)0xc5c6,
+  (q15_t)0x71fa, (q15_t)0xc5c0, (q15_t)0x71f7, (q15_t)0xc5bb, (q15_t)0x71f4, (q15_t)0xc5b5, (q15_t)0x71f1, (q15_t)0xc5b0,
+  (q15_t)0x71ee, (q15_t)0xc5aa, (q15_t)0x71eb, (q15_t)0xc5a4, (q15_t)0x71e9, (q15_t)0xc59f, (q15_t)0x71e6, (q15_t)0xc599,
+  (q15_t)0x71e3, (q15_t)0xc594, (q15_t)0x71e0, (q15_t)0xc58e, (q15_t)0x71dd, (q15_t)0xc588, (q15_t)0x71da, (q15_t)0xc583,
+  (q15_t)0x71d7, (q15_t)0xc57d, (q15_t)0x71d4, (q15_t)0xc578, (q15_t)0x71d2, (q15_t)0xc572, (q15_t)0x71cf, (q15_t)0xc56c,
+  (q15_t)0x71cc, (q15_t)0xc567, (q15_t)0x71c9, (q15_t)0xc561, (q15_t)0x71c6, (q15_t)0xc55c, (q15_t)0x71c3, (q15_t)0xc556,
+  (q15_t)0x71c0, (q15_t)0xc551, (q15_t)0x71bd, (q15_t)0xc54b, (q15_t)0x71bb, (q15_t)0xc545, (q15_t)0x71b8, (q15_t)0xc540,
+  (q15_t)0x71b5, (q15_t)0xc53a, (q15_t)0x71b2, (q15_t)0xc535, (q15_t)0x71af, (q15_t)0xc52f, (q15_t)0x71ac, (q15_t)0xc529,
+  (q15_t)0x71a9, (q15_t)0xc524, (q15_t)0x71a6, (q15_t)0xc51e, (q15_t)0x71a3, (q15_t)0xc519, (q15_t)0x71a1, (q15_t)0xc513,
+  (q15_t)0x719e, (q15_t)0xc50e, (q15_t)0x719b, (q15_t)0xc508, (q15_t)0x7198, (q15_t)0xc502, (q15_t)0x7195, (q15_t)0xc4fd,
+  (q15_t)0x7192, (q15_t)0xc4f7, (q15_t)0x718f, (q15_t)0xc4f2, (q15_t)0x718c, (q15_t)0xc4ec, (q15_t)0x7189, (q15_t)0xc4e7,
+  (q15_t)0x7186, (q15_t)0xc4e1, (q15_t)0x7184, (q15_t)0xc4db, (q15_t)0x7181, (q15_t)0xc4d6, (q15_t)0x717e, (q15_t)0xc4d0,
+  (q15_t)0x717b, (q15_t)0xc4cb, (q15_t)0x7178, (q15_t)0xc4c5, (q15_t)0x7175, (q15_t)0xc4c0, (q15_t)0x7172, (q15_t)0xc4ba,
+  (q15_t)0x716f, (q15_t)0xc4b4, (q15_t)0x716c, (q15_t)0xc4af, (q15_t)0x7169, (q15_t)0xc4a9, (q15_t)0x7167, (q15_t)0xc4a4,
+  (q15_t)0x7164, (q15_t)0xc49e, (q15_t)0x7161, (q15_t)0xc499, (q15_t)0x715e, (q15_t)0xc493, (q15_t)0x715b, (q15_t)0xc48d,
+  (q15_t)0x7158, (q15_t)0xc488, (q15_t)0x7155, (q15_t)0xc482, (q15_t)0x7152, (q15_t)0xc47d, (q15_t)0x714f, (q15_t)0xc477,
+  (q15_t)0x714c, (q15_t)0xc472, (q15_t)0x7149, (q15_t)0xc46c, (q15_t)0x7146, (q15_t)0xc467, (q15_t)0x7143, (q15_t)0xc461,
+  (q15_t)0x7141, (q15_t)0xc45b, (q15_t)0x713e, (q15_t)0xc456, (q15_t)0x713b, (q15_t)0xc450, (q15_t)0x7138, (q15_t)0xc44b,
+  (q15_t)0x7135, (q15_t)0xc445, (q15_t)0x7132, (q15_t)0xc440, (q15_t)0x712f, (q15_t)0xc43a, (q15_t)0x712c, (q15_t)0xc434,
+  (q15_t)0x7129, (q15_t)0xc42f, (q15_t)0x7126, (q15_t)0xc429, (q15_t)0x7123, (q15_t)0xc424, (q15_t)0x7120, (q15_t)0xc41e,
+  (q15_t)0x711d, (q15_t)0xc419, (q15_t)0x711a, (q15_t)0xc413, (q15_t)0x7117, (q15_t)0xc40e, (q15_t)0x7114, (q15_t)0xc408,
+  (q15_t)0x7112, (q15_t)0xc403, (q15_t)0x710f, (q15_t)0xc3fd, (q15_t)0x710c, (q15_t)0xc3f7, (q15_t)0x7109, (q15_t)0xc3f2,
+  (q15_t)0x7106, (q15_t)0xc3ec, (q15_t)0x7103, (q15_t)0xc3e7, (q15_t)0x7100, (q15_t)0xc3e1, (q15_t)0x70fd, (q15_t)0xc3dc,
+  (q15_t)0x70fa, (q15_t)0xc3d6, (q15_t)0x70f7, (q15_t)0xc3d1, (q15_t)0x70f4, (q15_t)0xc3cb, (q15_t)0x70f1, (q15_t)0xc3c5,
+  (q15_t)0x70ee, (q15_t)0xc3c0, (q15_t)0x70eb, (q15_t)0xc3ba, (q15_t)0x70e8, (q15_t)0xc3b5, (q15_t)0x70e5, (q15_t)0xc3af,
+  (q15_t)0x70e2, (q15_t)0xc3aa, (q15_t)0x70df, (q15_t)0xc3a4, (q15_t)0x70dc, (q15_t)0xc39f, (q15_t)0x70d9, (q15_t)0xc399,
+  (q15_t)0x70d6, (q15_t)0xc394, (q15_t)0x70d3, (q15_t)0xc38e, (q15_t)0x70d1, (q15_t)0xc389, (q15_t)0x70ce, (q15_t)0xc383,
+  (q15_t)0x70cb, (q15_t)0xc37d, (q15_t)0x70c8, (q15_t)0xc378, (q15_t)0x70c5, (q15_t)0xc372, (q15_t)0x70c2, (q15_t)0xc36d,
+  (q15_t)0x70bf, (q15_t)0xc367, (q15_t)0x70bc, (q15_t)0xc362, (q15_t)0x70b9, (q15_t)0xc35c, (q15_t)0x70b6, (q15_t)0xc357,
+  (q15_t)0x70b3, (q15_t)0xc351, (q15_t)0x70b0, (q15_t)0xc34c, (q15_t)0x70ad, (q15_t)0xc346, (q15_t)0x70aa, (q15_t)0xc341,
+  (q15_t)0x70a7, (q15_t)0xc33b, (q15_t)0x70a4, (q15_t)0xc336, (q15_t)0x70a1, (q15_t)0xc330, (q15_t)0x709e, (q15_t)0xc32a,
+  (q15_t)0x709b, (q15_t)0xc325, (q15_t)0x7098, (q15_t)0xc31f, (q15_t)0x7095, (q15_t)0xc31a, (q15_t)0x7092, (q15_t)0xc314,
+  (q15_t)0x708f, (q15_t)0xc30f, (q15_t)0x708c, (q15_t)0xc309, (q15_t)0x7089, (q15_t)0xc304, (q15_t)0x7086, (q15_t)0xc2fe,
+  (q15_t)0x7083, (q15_t)0xc2f9, (q15_t)0x7080, (q15_t)0xc2f3, (q15_t)0x707d, (q15_t)0xc2ee, (q15_t)0x707a, (q15_t)0xc2e8,
+  (q15_t)0x7077, (q15_t)0xc2e3, (q15_t)0x7074, (q15_t)0xc2dd, (q15_t)0x7071, (q15_t)0xc2d8, (q15_t)0x706e, (q15_t)0xc2d2,
+  (q15_t)0x706b, (q15_t)0xc2cd, (q15_t)0x7068, (q15_t)0xc2c7, (q15_t)0x7065, (q15_t)0xc2c2, (q15_t)0x7062, (q15_t)0xc2bc,
+  (q15_t)0x705f, (q15_t)0xc2b7, (q15_t)0x705c, (q15_t)0xc2b1, (q15_t)0x7059, (q15_t)0xc2ab, (q15_t)0x7056, (q15_t)0xc2a6,
+  (q15_t)0x7053, (q15_t)0xc2a0, (q15_t)0x7050, (q15_t)0xc29b, (q15_t)0x704d, (q15_t)0xc295, (q15_t)0x704a, (q15_t)0xc290,
+  (q15_t)0x7047, (q15_t)0xc28a, (q15_t)0x7044, (q15_t)0xc285, (q15_t)0x7041, (q15_t)0xc27f, (q15_t)0x703e, (q15_t)0xc27a,
+  (q15_t)0x703b, (q15_t)0xc274, (q15_t)0x7038, (q15_t)0xc26f, (q15_t)0x7035, (q15_t)0xc269, (q15_t)0x7032, (q15_t)0xc264,
+  (q15_t)0x702f, (q15_t)0xc25e, (q15_t)0x702c, (q15_t)0xc259, (q15_t)0x7029, (q15_t)0xc253, (q15_t)0x7026, (q15_t)0xc24e,
+  (q15_t)0x7023, (q15_t)0xc248, (q15_t)0x7020, (q15_t)0xc243, (q15_t)0x701d, (q15_t)0xc23d, (q15_t)0x7019, (q15_t)0xc238,
+  (q15_t)0x7016, (q15_t)0xc232, (q15_t)0x7013, (q15_t)0xc22d, (q15_t)0x7010, (q15_t)0xc227, (q15_t)0x700d, (q15_t)0xc222,
+  (q15_t)0x700a, (q15_t)0xc21c, (q15_t)0x7007, (q15_t)0xc217, (q15_t)0x7004, (q15_t)0xc211, (q15_t)0x7001, (q15_t)0xc20c,
+  (q15_t)0x6ffe, (q15_t)0xc206, (q15_t)0x6ffb, (q15_t)0xc201, (q15_t)0x6ff8, (q15_t)0xc1fb, (q15_t)0x6ff5, (q15_t)0xc1f6,
+  (q15_t)0x6ff2, (q15_t)0xc1f0, (q15_t)0x6fef, (q15_t)0xc1eb, (q15_t)0x6fec, (q15_t)0xc1e5, (q15_t)0x6fe9, (q15_t)0xc1e0,
+  (q15_t)0x6fe6, (q15_t)0xc1da, (q15_t)0x6fe3, (q15_t)0xc1d5, (q15_t)0x6fe0, (q15_t)0xc1cf, (q15_t)0x6fdd, (q15_t)0xc1ca,
+  (q15_t)0x6fda, (q15_t)0xc1c4, (q15_t)0x6fd6, (q15_t)0xc1bf, (q15_t)0x6fd3, (q15_t)0xc1b9, (q15_t)0x6fd0, (q15_t)0xc1b4,
+  (q15_t)0x6fcd, (q15_t)0xc1ae, (q15_t)0x6fca, (q15_t)0xc1a9, (q15_t)0x6fc7, (q15_t)0xc1a3, (q15_t)0x6fc4, (q15_t)0xc19e,
+  (q15_t)0x6fc1, (q15_t)0xc198, (q15_t)0x6fbe, (q15_t)0xc193, (q15_t)0x6fbb, (q15_t)0xc18d, (q15_t)0x6fb8, (q15_t)0xc188,
+  (q15_t)0x6fb5, (q15_t)0xc183, (q15_t)0x6fb2, (q15_t)0xc17d, (q15_t)0x6faf, (q15_t)0xc178, (q15_t)0x6fac, (q15_t)0xc172,
+  (q15_t)0x6fa9, (q15_t)0xc16d, (q15_t)0x6fa5, (q15_t)0xc167, (q15_t)0x6fa2, (q15_t)0xc162, (q15_t)0x6f9f, (q15_t)0xc15c,
+  (q15_t)0x6f9c, (q15_t)0xc157, (q15_t)0x6f99, (q15_t)0xc151, (q15_t)0x6f96, (q15_t)0xc14c, (q15_t)0x6f93, (q15_t)0xc146,
+  (q15_t)0x6f90, (q15_t)0xc141, (q15_t)0x6f8d, (q15_t)0xc13b, (q15_t)0x6f8a, (q15_t)0xc136, (q15_t)0x6f87, (q15_t)0xc130,
+  (q15_t)0x6f84, (q15_t)0xc12b, (q15_t)0x6f81, (q15_t)0xc125, (q15_t)0x6f7d, (q15_t)0xc120, (q15_t)0x6f7a, (q15_t)0xc11a,
+  (q15_t)0x6f77, (q15_t)0xc115, (q15_t)0x6f74, (q15_t)0xc10f, (q15_t)0x6f71, (q15_t)0xc10a, (q15_t)0x6f6e, (q15_t)0xc105,
+  (q15_t)0x6f6b, (q15_t)0xc0ff, (q15_t)0x6f68, (q15_t)0xc0fa, (q15_t)0x6f65, (q15_t)0xc0f4, (q15_t)0x6f62, (q15_t)0xc0ef,
+  (q15_t)0x6f5f, (q15_t)0xc0e9, (q15_t)0x6f5b, (q15_t)0xc0e4, (q15_t)0x6f58, (q15_t)0xc0de, (q15_t)0x6f55, (q15_t)0xc0d9,
+  (q15_t)0x6f52, (q15_t)0xc0d3, (q15_t)0x6f4f, (q15_t)0xc0ce, (q15_t)0x6f4c, (q15_t)0xc0c8, (q15_t)0x6f49, (q15_t)0xc0c3,
+  (q15_t)0x6f46, (q15_t)0xc0bd, (q15_t)0x6f43, (q15_t)0xc0b8, (q15_t)0x6f3f, (q15_t)0xc0b3, (q15_t)0x6f3c, (q15_t)0xc0ad,
+  (q15_t)0x6f39, (q15_t)0xc0a8, (q15_t)0x6f36, (q15_t)0xc0a2, (q15_t)0x6f33, (q15_t)0xc09d, (q15_t)0x6f30, (q15_t)0xc097,
+  (q15_t)0x6f2d, (q15_t)0xc092, (q15_t)0x6f2a, (q15_t)0xc08c, (q15_t)0x6f27, (q15_t)0xc087, (q15_t)0x6f23, (q15_t)0xc081,
+  (q15_t)0x6f20, (q15_t)0xc07c, (q15_t)0x6f1d, (q15_t)0xc077, (q15_t)0x6f1a, (q15_t)0xc071, (q15_t)0x6f17, (q15_t)0xc06c,
+  (q15_t)0x6f14, (q15_t)0xc066, (q15_t)0x6f11, (q15_t)0xc061, (q15_t)0x6f0e, (q15_t)0xc05b, (q15_t)0x6f0b, (q15_t)0xc056,
+  (q15_t)0x6f07, (q15_t)0xc050, (q15_t)0x6f04, (q15_t)0xc04b, (q15_t)0x6f01, (q15_t)0xc045, (q15_t)0x6efe, (q15_t)0xc040,
+  (q15_t)0x6efb, (q15_t)0xc03b, (q15_t)0x6ef8, (q15_t)0xc035, (q15_t)0x6ef5, (q15_t)0xc030, (q15_t)0x6ef1, (q15_t)0xc02a,
+  (q15_t)0x6eee, (q15_t)0xc025, (q15_t)0x6eeb, (q15_t)0xc01f, (q15_t)0x6ee8, (q15_t)0xc01a, (q15_t)0x6ee5, (q15_t)0xc014,
+  (q15_t)0x6ee2, (q15_t)0xc00f, (q15_t)0x6edf, (q15_t)0xc00a, (q15_t)0x6edc, (q15_t)0xc004, (q15_t)0x6ed8, (q15_t)0xbfff,
+  (q15_t)0x6ed5, (q15_t)0xbff9, (q15_t)0x6ed2, (q15_t)0xbff4, (q15_t)0x6ecf, (q15_t)0xbfee, (q15_t)0x6ecc, (q15_t)0xbfe9,
+  (q15_t)0x6ec9, (q15_t)0xbfe3, (q15_t)0x6ec6, (q15_t)0xbfde, (q15_t)0x6ec2, (q15_t)0xbfd9, (q15_t)0x6ebf, (q15_t)0xbfd3,
+  (q15_t)0x6ebc, (q15_t)0xbfce, (q15_t)0x6eb9, (q15_t)0xbfc8, (q15_t)0x6eb6, (q15_t)0xbfc3, (q15_t)0x6eb3, (q15_t)0xbfbd,
+  (q15_t)0x6eaf, (q15_t)0xbfb8, (q15_t)0x6eac, (q15_t)0xbfb3, (q15_t)0x6ea9, (q15_t)0xbfad, (q15_t)0x6ea6, (q15_t)0xbfa8,
+  (q15_t)0x6ea3, (q15_t)0xbfa2, (q15_t)0x6ea0, (q15_t)0xbf9d, (q15_t)0x6e9c, (q15_t)0xbf97, (q15_t)0x6e99, (q15_t)0xbf92,
+  (q15_t)0x6e96, (q15_t)0xbf8d, (q15_t)0x6e93, (q15_t)0xbf87, (q15_t)0x6e90, (q15_t)0xbf82, (q15_t)0x6e8d, (q15_t)0xbf7c,
+  (q15_t)0x6e89, (q15_t)0xbf77, (q15_t)0x6e86, (q15_t)0xbf71, (q15_t)0x6e83, (q15_t)0xbf6c, (q15_t)0x6e80, (q15_t)0xbf67,
+  (q15_t)0x6e7d, (q15_t)0xbf61, (q15_t)0x6e7a, (q15_t)0xbf5c, (q15_t)0x6e76, (q15_t)0xbf56, (q15_t)0x6e73, (q15_t)0xbf51,
+  (q15_t)0x6e70, (q15_t)0xbf4b, (q15_t)0x6e6d, (q15_t)0xbf46, (q15_t)0x6e6a, (q15_t)0xbf41, (q15_t)0x6e67, (q15_t)0xbf3b,
+  (q15_t)0x6e63, (q15_t)0xbf36, (q15_t)0x6e60, (q15_t)0xbf30, (q15_t)0x6e5d, (q15_t)0xbf2b, (q15_t)0x6e5a, (q15_t)0xbf26,
+  (q15_t)0x6e57, (q15_t)0xbf20, (q15_t)0x6e53, (q15_t)0xbf1b, (q15_t)0x6e50, (q15_t)0xbf15, (q15_t)0x6e4d, (q15_t)0xbf10,
+  (q15_t)0x6e4a, (q15_t)0xbf0a, (q15_t)0x6e47, (q15_t)0xbf05, (q15_t)0x6e44, (q15_t)0xbf00, (q15_t)0x6e40, (q15_t)0xbefa,
+  (q15_t)0x6e3d, (q15_t)0xbef5, (q15_t)0x6e3a, (q15_t)0xbeef, (q15_t)0x6e37, (q15_t)0xbeea, (q15_t)0x6e34, (q15_t)0xbee5,
+  (q15_t)0x6e30, (q15_t)0xbedf, (q15_t)0x6e2d, (q15_t)0xbeda, (q15_t)0x6e2a, (q15_t)0xbed4, (q15_t)0x6e27, (q15_t)0xbecf,
+  (q15_t)0x6e24, (q15_t)0xbeca, (q15_t)0x6e20, (q15_t)0xbec4, (q15_t)0x6e1d, (q15_t)0xbebf, (q15_t)0x6e1a, (q15_t)0xbeb9,
+  (q15_t)0x6e17, (q15_t)0xbeb4, (q15_t)0x6e14, (q15_t)0xbeae, (q15_t)0x6e10, (q15_t)0xbea9, (q15_t)0x6e0d, (q15_t)0xbea4,
+  (q15_t)0x6e0a, (q15_t)0xbe9e, (q15_t)0x6e07, (q15_t)0xbe99, (q15_t)0x6e04, (q15_t)0xbe93, (q15_t)0x6e00, (q15_t)0xbe8e,
+  (q15_t)0x6dfd, (q15_t)0xbe89, (q15_t)0x6dfa, (q15_t)0xbe83, (q15_t)0x6df7, (q15_t)0xbe7e, (q15_t)0x6df3, (q15_t)0xbe78,
+  (q15_t)0x6df0, (q15_t)0xbe73, (q15_t)0x6ded, (q15_t)0xbe6e, (q15_t)0x6dea, (q15_t)0xbe68, (q15_t)0x6de7, (q15_t)0xbe63,
+  (q15_t)0x6de3, (q15_t)0xbe5e, (q15_t)0x6de0, (q15_t)0xbe58, (q15_t)0x6ddd, (q15_t)0xbe53, (q15_t)0x6dda, (q15_t)0xbe4d,
+  (q15_t)0x6dd6, (q15_t)0xbe48, (q15_t)0x6dd3, (q15_t)0xbe43, (q15_t)0x6dd0, (q15_t)0xbe3d, (q15_t)0x6dcd, (q15_t)0xbe38,
+  (q15_t)0x6dca, (q15_t)0xbe32, (q15_t)0x6dc6, (q15_t)0xbe2d, (q15_t)0x6dc3, (q15_t)0xbe28, (q15_t)0x6dc0, (q15_t)0xbe22,
+  (q15_t)0x6dbd, (q15_t)0xbe1d, (q15_t)0x6db9, (q15_t)0xbe17, (q15_t)0x6db6, (q15_t)0xbe12, (q15_t)0x6db3, (q15_t)0xbe0d,
+  (q15_t)0x6db0, (q15_t)0xbe07, (q15_t)0x6dac, (q15_t)0xbe02, (q15_t)0x6da9, (q15_t)0xbdfd, (q15_t)0x6da6, (q15_t)0xbdf7,
+  (q15_t)0x6da3, (q15_t)0xbdf2, (q15_t)0x6d9f, (q15_t)0xbdec, (q15_t)0x6d9c, (q15_t)0xbde7, (q15_t)0x6d99, (q15_t)0xbde2,
+  (q15_t)0x6d96, (q15_t)0xbddc, (q15_t)0x6d92, (q15_t)0xbdd7, (q15_t)0x6d8f, (q15_t)0xbdd1, (q15_t)0x6d8c, (q15_t)0xbdcc,
+  (q15_t)0x6d89, (q15_t)0xbdc7, (q15_t)0x6d85, (q15_t)0xbdc1, (q15_t)0x6d82, (q15_t)0xbdbc, (q15_t)0x6d7f, (q15_t)0xbdb7,
+  (q15_t)0x6d7c, (q15_t)0xbdb1, (q15_t)0x6d78, (q15_t)0xbdac, (q15_t)0x6d75, (q15_t)0xbda6, (q15_t)0x6d72, (q15_t)0xbda1,
+  (q15_t)0x6d6f, (q15_t)0xbd9c, (q15_t)0x6d6b, (q15_t)0xbd96, (q15_t)0x6d68, (q15_t)0xbd91, (q15_t)0x6d65, (q15_t)0xbd8c,
+  (q15_t)0x6d62, (q15_t)0xbd86, (q15_t)0x6d5e, (q15_t)0xbd81, (q15_t)0x6d5b, (q15_t)0xbd7c, (q15_t)0x6d58, (q15_t)0xbd76,
+  (q15_t)0x6d55, (q15_t)0xbd71, (q15_t)0x6d51, (q15_t)0xbd6b, (q15_t)0x6d4e, (q15_t)0xbd66, (q15_t)0x6d4b, (q15_t)0xbd61,
+  (q15_t)0x6d48, (q15_t)0xbd5b, (q15_t)0x6d44, (q15_t)0xbd56, (q15_t)0x6d41, (q15_t)0xbd51, (q15_t)0x6d3e, (q15_t)0xbd4b,
+  (q15_t)0x6d3a, (q15_t)0xbd46, (q15_t)0x6d37, (q15_t)0xbd40, (q15_t)0x6d34, (q15_t)0xbd3b, (q15_t)0x6d31, (q15_t)0xbd36,
+  (q15_t)0x6d2d, (q15_t)0xbd30, (q15_t)0x6d2a, (q15_t)0xbd2b, (q15_t)0x6d27, (q15_t)0xbd26, (q15_t)0x6d23, (q15_t)0xbd20,
+  (q15_t)0x6d20, (q15_t)0xbd1b, (q15_t)0x6d1d, (q15_t)0xbd16, (q15_t)0x6d1a, (q15_t)0xbd10, (q15_t)0x6d16, (q15_t)0xbd0b,
+  (q15_t)0x6d13, (q15_t)0xbd06, (q15_t)0x6d10, (q15_t)0xbd00, (q15_t)0x6d0c, (q15_t)0xbcfb, (q15_t)0x6d09, (q15_t)0xbcf5,
+  (q15_t)0x6d06, (q15_t)0xbcf0, (q15_t)0x6d03, (q15_t)0xbceb, (q15_t)0x6cff, (q15_t)0xbce5, (q15_t)0x6cfc, (q15_t)0xbce0,
+  (q15_t)0x6cf9, (q15_t)0xbcdb, (q15_t)0x6cf5, (q15_t)0xbcd5, (q15_t)0x6cf2, (q15_t)0xbcd0, (q15_t)0x6cef, (q15_t)0xbccb,
+  (q15_t)0x6cec, (q15_t)0xbcc5, (q15_t)0x6ce8, (q15_t)0xbcc0, (q15_t)0x6ce5, (q15_t)0xbcbb, (q15_t)0x6ce2, (q15_t)0xbcb5,
+  (q15_t)0x6cde, (q15_t)0xbcb0, (q15_t)0x6cdb, (q15_t)0xbcab, (q15_t)0x6cd8, (q15_t)0xbca5, (q15_t)0x6cd4, (q15_t)0xbca0,
+  (q15_t)0x6cd1, (q15_t)0xbc9b, (q15_t)0x6cce, (q15_t)0xbc95, (q15_t)0x6cca, (q15_t)0xbc90, (q15_t)0x6cc7, (q15_t)0xbc8b,
+  (q15_t)0x6cc4, (q15_t)0xbc85, (q15_t)0x6cc1, (q15_t)0xbc80, (q15_t)0x6cbd, (q15_t)0xbc7b, (q15_t)0x6cba, (q15_t)0xbc75,
+  (q15_t)0x6cb7, (q15_t)0xbc70, (q15_t)0x6cb3, (q15_t)0xbc6b, (q15_t)0x6cb0, (q15_t)0xbc65, (q15_t)0x6cad, (q15_t)0xbc60,
+  (q15_t)0x6ca9, (q15_t)0xbc5b, (q15_t)0x6ca6, (q15_t)0xbc55, (q15_t)0x6ca3, (q15_t)0xbc50, (q15_t)0x6c9f, (q15_t)0xbc4b,
+  (q15_t)0x6c9c, (q15_t)0xbc45, (q15_t)0x6c99, (q15_t)0xbc40, (q15_t)0x6c95, (q15_t)0xbc3b, (q15_t)0x6c92, (q15_t)0xbc35,
+  (q15_t)0x6c8f, (q15_t)0xbc30, (q15_t)0x6c8b, (q15_t)0xbc2b, (q15_t)0x6c88, (q15_t)0xbc25, (q15_t)0x6c85, (q15_t)0xbc20,
+  (q15_t)0x6c81, (q15_t)0xbc1b, (q15_t)0x6c7e, (q15_t)0xbc15, (q15_t)0x6c7b, (q15_t)0xbc10, (q15_t)0x6c77, (q15_t)0xbc0b,
+  (q15_t)0x6c74, (q15_t)0xbc05, (q15_t)0x6c71, (q15_t)0xbc00, (q15_t)0x6c6d, (q15_t)0xbbfb, (q15_t)0x6c6a, (q15_t)0xbbf5,
+  (q15_t)0x6c67, (q15_t)0xbbf0, (q15_t)0x6c63, (q15_t)0xbbeb, (q15_t)0x6c60, (q15_t)0xbbe5, (q15_t)0x6c5d, (q15_t)0xbbe0,
+  (q15_t)0x6c59, (q15_t)0xbbdb, (q15_t)0x6c56, (q15_t)0xbbd5, (q15_t)0x6c53, (q15_t)0xbbd0, (q15_t)0x6c4f, (q15_t)0xbbcb,
+  (q15_t)0x6c4c, (q15_t)0xbbc5, (q15_t)0x6c49, (q15_t)0xbbc0, (q15_t)0x6c45, (q15_t)0xbbbb, (q15_t)0x6c42, (q15_t)0xbbb5,
+  (q15_t)0x6c3f, (q15_t)0xbbb0, (q15_t)0x6c3b, (q15_t)0xbbab, (q15_t)0x6c38, (q15_t)0xbba6, (q15_t)0x6c34, (q15_t)0xbba0,
+  (q15_t)0x6c31, (q15_t)0xbb9b, (q15_t)0x6c2e, (q15_t)0xbb96, (q15_t)0x6c2a, (q15_t)0xbb90, (q15_t)0x6c27, (q15_t)0xbb8b,
+  (q15_t)0x6c24, (q15_t)0xbb86, (q15_t)0x6c20, (q15_t)0xbb80, (q15_t)0x6c1d, (q15_t)0xbb7b, (q15_t)0x6c1a, (q15_t)0xbb76,
+  (q15_t)0x6c16, (q15_t)0xbb70, (q15_t)0x6c13, (q15_t)0xbb6b, (q15_t)0x6c0f, (q15_t)0xbb66, (q15_t)0x6c0c, (q15_t)0xbb61,
+  (q15_t)0x6c09, (q15_t)0xbb5b, (q15_t)0x6c05, (q15_t)0xbb56, (q15_t)0x6c02, (q15_t)0xbb51, (q15_t)0x6bff, (q15_t)0xbb4b,
+  (q15_t)0x6bfb, (q15_t)0xbb46, (q15_t)0x6bf8, (q15_t)0xbb41, (q15_t)0x6bf5, (q15_t)0xbb3b, (q15_t)0x6bf1, (q15_t)0xbb36,
+  (q15_t)0x6bee, (q15_t)0xbb31, (q15_t)0x6bea, (q15_t)0xbb2c, (q15_t)0x6be7, (q15_t)0xbb26, (q15_t)0x6be4, (q15_t)0xbb21,
+  (q15_t)0x6be0, (q15_t)0xbb1c, (q15_t)0x6bdd, (q15_t)0xbb16, (q15_t)0x6bd9, (q15_t)0xbb11, (q15_t)0x6bd6, (q15_t)0xbb0c,
+  (q15_t)0x6bd3, (q15_t)0xbb06, (q15_t)0x6bcf, (q15_t)0xbb01, (q15_t)0x6bcc, (q15_t)0xbafc, (q15_t)0x6bc9, (q15_t)0xbaf7,
+  (q15_t)0x6bc5, (q15_t)0xbaf1, (q15_t)0x6bc2, (q15_t)0xbaec, (q15_t)0x6bbe, (q15_t)0xbae7, (q15_t)0x6bbb, (q15_t)0xbae1,
+  (q15_t)0x6bb8, (q15_t)0xbadc, (q15_t)0x6bb4, (q15_t)0xbad7, (q15_t)0x6bb1, (q15_t)0xbad2, (q15_t)0x6bad, (q15_t)0xbacc,
+  (q15_t)0x6baa, (q15_t)0xbac7, (q15_t)0x6ba7, (q15_t)0xbac2, (q15_t)0x6ba3, (q15_t)0xbabc, (q15_t)0x6ba0, (q15_t)0xbab7,
+  (q15_t)0x6b9c, (q15_t)0xbab2, (q15_t)0x6b99, (q15_t)0xbaad, (q15_t)0x6b96, (q15_t)0xbaa7, (q15_t)0x6b92, (q15_t)0xbaa2,
+  (q15_t)0x6b8f, (q15_t)0xba9d, (q15_t)0x6b8b, (q15_t)0xba97, (q15_t)0x6b88, (q15_t)0xba92, (q15_t)0x6b85, (q15_t)0xba8d,
+  (q15_t)0x6b81, (q15_t)0xba88, (q15_t)0x6b7e, (q15_t)0xba82, (q15_t)0x6b7a, (q15_t)0xba7d, (q15_t)0x6b77, (q15_t)0xba78,
+  (q15_t)0x6b73, (q15_t)0xba73, (q15_t)0x6b70, (q15_t)0xba6d, (q15_t)0x6b6d, (q15_t)0xba68, (q15_t)0x6b69, (q15_t)0xba63,
+  (q15_t)0x6b66, (q15_t)0xba5d, (q15_t)0x6b62, (q15_t)0xba58, (q15_t)0x6b5f, (q15_t)0xba53, (q15_t)0x6b5c, (q15_t)0xba4e,
+  (q15_t)0x6b58, (q15_t)0xba48, (q15_t)0x6b55, (q15_t)0xba43, (q15_t)0x6b51, (q15_t)0xba3e, (q15_t)0x6b4e, (q15_t)0xba39,
+  (q15_t)0x6b4a, (q15_t)0xba33, (q15_t)0x6b47, (q15_t)0xba2e, (q15_t)0x6b44, (q15_t)0xba29, (q15_t)0x6b40, (q15_t)0xba23,
+  (q15_t)0x6b3d, (q15_t)0xba1e, (q15_t)0x6b39, (q15_t)0xba19, (q15_t)0x6b36, (q15_t)0xba14, (q15_t)0x6b32, (q15_t)0xba0e,
+  (q15_t)0x6b2f, (q15_t)0xba09, (q15_t)0x6b2c, (q15_t)0xba04, (q15_t)0x6b28, (q15_t)0xb9ff, (q15_t)0x6b25, (q15_t)0xb9f9,
+  (q15_t)0x6b21, (q15_t)0xb9f4, (q15_t)0x6b1e, (q15_t)0xb9ef, (q15_t)0x6b1a, (q15_t)0xb9ea, (q15_t)0x6b17, (q15_t)0xb9e4,
+  (q15_t)0x6b13, (q15_t)0xb9df, (q15_t)0x6b10, (q15_t)0xb9da, (q15_t)0x6b0d, (q15_t)0xb9d5, (q15_t)0x6b09, (q15_t)0xb9cf,
+  (q15_t)0x6b06, (q15_t)0xb9ca, (q15_t)0x6b02, (q15_t)0xb9c5, (q15_t)0x6aff, (q15_t)0xb9c0, (q15_t)0x6afb, (q15_t)0xb9ba,
+  (q15_t)0x6af8, (q15_t)0xb9b5, (q15_t)0x6af4, (q15_t)0xb9b0, (q15_t)0x6af1, (q15_t)0xb9ab, (q15_t)0x6aee, (q15_t)0xb9a5,
+  (q15_t)0x6aea, (q15_t)0xb9a0, (q15_t)0x6ae7, (q15_t)0xb99b, (q15_t)0x6ae3, (q15_t)0xb996, (q15_t)0x6ae0, (q15_t)0xb990,
+  (q15_t)0x6adc, (q15_t)0xb98b, (q15_t)0x6ad9, (q15_t)0xb986, (q15_t)0x6ad5, (q15_t)0xb981, (q15_t)0x6ad2, (q15_t)0xb97b,
+  (q15_t)0x6ace, (q15_t)0xb976, (q15_t)0x6acb, (q15_t)0xb971, (q15_t)0x6ac8, (q15_t)0xb96c, (q15_t)0x6ac4, (q15_t)0xb966,
+  (q15_t)0x6ac1, (q15_t)0xb961, (q15_t)0x6abd, (q15_t)0xb95c, (q15_t)0x6aba, (q15_t)0xb957, (q15_t)0x6ab6, (q15_t)0xb951,
+  (q15_t)0x6ab3, (q15_t)0xb94c, (q15_t)0x6aaf, (q15_t)0xb947, (q15_t)0x6aac, (q15_t)0xb942, (q15_t)0x6aa8, (q15_t)0xb93c,
+  (q15_t)0x6aa5, (q15_t)0xb937, (q15_t)0x6aa1, (q15_t)0xb932, (q15_t)0x6a9e, (q15_t)0xb92d, (q15_t)0x6a9a, (q15_t)0xb928,
+  (q15_t)0x6a97, (q15_t)0xb922, (q15_t)0x6a93, (q15_t)0xb91d, (q15_t)0x6a90, (q15_t)0xb918, (q15_t)0x6a8c, (q15_t)0xb913,
+  (q15_t)0x6a89, (q15_t)0xb90d, (q15_t)0x6a86, (q15_t)0xb908, (q15_t)0x6a82, (q15_t)0xb903, (q15_t)0x6a7f, (q15_t)0xb8fe,
+  (q15_t)0x6a7b, (q15_t)0xb8f8, (q15_t)0x6a78, (q15_t)0xb8f3, (q15_t)0x6a74, (q15_t)0xb8ee, (q15_t)0x6a71, (q15_t)0xb8e9,
+  (q15_t)0x6a6d, (q15_t)0xb8e4, (q15_t)0x6a6a, (q15_t)0xb8de, (q15_t)0x6a66, (q15_t)0xb8d9, (q15_t)0x6a63, (q15_t)0xb8d4,
+  (q15_t)0x6a5f, (q15_t)0xb8cf, (q15_t)0x6a5c, (q15_t)0xb8c9, (q15_t)0x6a58, (q15_t)0xb8c4, (q15_t)0x6a55, (q15_t)0xb8bf,
+  (q15_t)0x6a51, (q15_t)0xb8ba, (q15_t)0x6a4e, (q15_t)0xb8b5, (q15_t)0x6a4a, (q15_t)0xb8af, (q15_t)0x6a47, (q15_t)0xb8aa,
+  (q15_t)0x6a43, (q15_t)0xb8a5, (q15_t)0x6a40, (q15_t)0xb8a0, (q15_t)0x6a3c, (q15_t)0xb89b, (q15_t)0x6a39, (q15_t)0xb895,
+  (q15_t)0x6a35, (q15_t)0xb890, (q15_t)0x6a32, (q15_t)0xb88b, (q15_t)0x6a2e, (q15_t)0xb886, (q15_t)0x6a2b, (q15_t)0xb880,
+  (q15_t)0x6a27, (q15_t)0xb87b, (q15_t)0x6a24, (q15_t)0xb876, (q15_t)0x6a20, (q15_t)0xb871, (q15_t)0x6a1d, (q15_t)0xb86c,
+  (q15_t)0x6a19, (q15_t)0xb866, (q15_t)0x6a16, (q15_t)0xb861, (q15_t)0x6a12, (q15_t)0xb85c, (q15_t)0x6a0e, (q15_t)0xb857,
+  (q15_t)0x6a0b, (q15_t)0xb852, (q15_t)0x6a07, (q15_t)0xb84c, (q15_t)0x6a04, (q15_t)0xb847, (q15_t)0x6a00, (q15_t)0xb842,
+  (q15_t)0x69fd, (q15_t)0xb83d, (q15_t)0x69f9, (q15_t)0xb838, (q15_t)0x69f6, (q15_t)0xb832, (q15_t)0x69f2, (q15_t)0xb82d,
+  (q15_t)0x69ef, (q15_t)0xb828, (q15_t)0x69eb, (q15_t)0xb823, (q15_t)0x69e8, (q15_t)0xb81e, (q15_t)0x69e4, (q15_t)0xb818,
+  (q15_t)0x69e1, (q15_t)0xb813, (q15_t)0x69dd, (q15_t)0xb80e, (q15_t)0x69da, (q15_t)0xb809, (q15_t)0x69d6, (q15_t)0xb804,
+  (q15_t)0x69d3, (q15_t)0xb7fe, (q15_t)0x69cf, (q15_t)0xb7f9, (q15_t)0x69cb, (q15_t)0xb7f4, (q15_t)0x69c8, (q15_t)0xb7ef,
+  (q15_t)0x69c4, (q15_t)0xb7ea, (q15_t)0x69c1, (q15_t)0xb7e4, (q15_t)0x69bd, (q15_t)0xb7df, (q15_t)0x69ba, (q15_t)0xb7da,
+  (q15_t)0x69b6, (q15_t)0xb7d5, (q15_t)0x69b3, (q15_t)0xb7d0, (q15_t)0x69af, (q15_t)0xb7ca, (q15_t)0x69ac, (q15_t)0xb7c5,
+  (q15_t)0x69a8, (q15_t)0xb7c0, (q15_t)0x69a5, (q15_t)0xb7bb, (q15_t)0x69a1, (q15_t)0xb7b6, (q15_t)0x699d, (q15_t)0xb7b1,
+  (q15_t)0x699a, (q15_t)0xb7ab, (q15_t)0x6996, (q15_t)0xb7a6, (q15_t)0x6993, (q15_t)0xb7a1, (q15_t)0x698f, (q15_t)0xb79c,
+  (q15_t)0x698c, (q15_t)0xb797, (q15_t)0x6988, (q15_t)0xb791, (q15_t)0x6985, (q15_t)0xb78c, (q15_t)0x6981, (q15_t)0xb787,
+  (q15_t)0x697d, (q15_t)0xb782, (q15_t)0x697a, (q15_t)0xb77d, (q15_t)0x6976, (q15_t)0xb778, (q15_t)0x6973, (q15_t)0xb772,
+  (q15_t)0x696f, (q15_t)0xb76d, (q15_t)0x696c, (q15_t)0xb768, (q15_t)0x6968, (q15_t)0xb763, (q15_t)0x6964, (q15_t)0xb75e,
+  (q15_t)0x6961, (q15_t)0xb758, (q15_t)0x695d, (q15_t)0xb753, (q15_t)0x695a, (q15_t)0xb74e, (q15_t)0x6956, (q15_t)0xb749,
+  (q15_t)0x6953, (q15_t)0xb744, (q15_t)0x694f, (q15_t)0xb73f, (q15_t)0x694b, (q15_t)0xb739, (q15_t)0x6948, (q15_t)0xb734,
+  (q15_t)0x6944, (q15_t)0xb72f, (q15_t)0x6941, (q15_t)0xb72a, (q15_t)0x693d, (q15_t)0xb725, (q15_t)0x693a, (q15_t)0xb720,
+  (q15_t)0x6936, (q15_t)0xb71a, (q15_t)0x6932, (q15_t)0xb715, (q15_t)0x692f, (q15_t)0xb710, (q15_t)0x692b, (q15_t)0xb70b,
+  (q15_t)0x6928, (q15_t)0xb706, (q15_t)0x6924, (q15_t)0xb701, (q15_t)0x6921, (q15_t)0xb6fb, (q15_t)0x691d, (q15_t)0xb6f6,
+  (q15_t)0x6919, (q15_t)0xb6f1, (q15_t)0x6916, (q15_t)0xb6ec, (q15_t)0x6912, (q15_t)0xb6e7, (q15_t)0x690f, (q15_t)0xb6e2,
+  (q15_t)0x690b, (q15_t)0xb6dd, (q15_t)0x6907, (q15_t)0xb6d7, (q15_t)0x6904, (q15_t)0xb6d2, (q15_t)0x6900, (q15_t)0xb6cd,
+  (q15_t)0x68fd, (q15_t)0xb6c8, (q15_t)0x68f9, (q15_t)0xb6c3, (q15_t)0x68f5, (q15_t)0xb6be, (q15_t)0x68f2, (q15_t)0xb6b8,
+  (q15_t)0x68ee, (q15_t)0xb6b3, (q15_t)0x68eb, (q15_t)0xb6ae, (q15_t)0x68e7, (q15_t)0xb6a9, (q15_t)0x68e3, (q15_t)0xb6a4,
+  (q15_t)0x68e0, (q15_t)0xb69f, (q15_t)0x68dc, (q15_t)0xb69a, (q15_t)0x68d9, (q15_t)0xb694, (q15_t)0x68d5, (q15_t)0xb68f,
+  (q15_t)0x68d1, (q15_t)0xb68a, (q15_t)0x68ce, (q15_t)0xb685, (q15_t)0x68ca, (q15_t)0xb680, (q15_t)0x68c7, (q15_t)0xb67b,
+  (q15_t)0x68c3, (q15_t)0xb676, (q15_t)0x68bf, (q15_t)0xb670, (q15_t)0x68bc, (q15_t)0xb66b, (q15_t)0x68b8, (q15_t)0xb666,
+  (q15_t)0x68b5, (q15_t)0xb661, (q15_t)0x68b1, (q15_t)0xb65c, (q15_t)0x68ad, (q15_t)0xb657, (q15_t)0x68aa, (q15_t)0xb652,
+  (q15_t)0x68a6, (q15_t)0xb64c, (q15_t)0x68a3, (q15_t)0xb647, (q15_t)0x689f, (q15_t)0xb642, (q15_t)0x689b, (q15_t)0xb63d,
+  (q15_t)0x6898, (q15_t)0xb638, (q15_t)0x6894, (q15_t)0xb633, (q15_t)0x6890, (q15_t)0xb62e, (q15_t)0x688d, (q15_t)0xb628,
+  (q15_t)0x6889, (q15_t)0xb623, (q15_t)0x6886, (q15_t)0xb61e, (q15_t)0x6882, (q15_t)0xb619, (q15_t)0x687e, (q15_t)0xb614,
+  (q15_t)0x687b, (q15_t)0xb60f, (q15_t)0x6877, (q15_t)0xb60a, (q15_t)0x6873, (q15_t)0xb605, (q15_t)0x6870, (q15_t)0xb5ff,
+  (q15_t)0x686c, (q15_t)0xb5fa, (q15_t)0x6868, (q15_t)0xb5f5, (q15_t)0x6865, (q15_t)0xb5f0, (q15_t)0x6861, (q15_t)0xb5eb,
+  (q15_t)0x685e, (q15_t)0xb5e6, (q15_t)0x685a, (q15_t)0xb5e1, (q15_t)0x6856, (q15_t)0xb5dc, (q15_t)0x6853, (q15_t)0xb5d6,
+  (q15_t)0x684f, (q15_t)0xb5d1, (q15_t)0x684b, (q15_t)0xb5cc, (q15_t)0x6848, (q15_t)0xb5c7, (q15_t)0x6844, (q15_t)0xb5c2,
+  (q15_t)0x6840, (q15_t)0xb5bd, (q15_t)0x683d, (q15_t)0xb5b8, (q15_t)0x6839, (q15_t)0xb5b3, (q15_t)0x6835, (q15_t)0xb5ae,
+  (q15_t)0x6832, (q15_t)0xb5a8, (q15_t)0x682e, (q15_t)0xb5a3, (q15_t)0x682b, (q15_t)0xb59e, (q15_t)0x6827, (q15_t)0xb599,
+  (q15_t)0x6823, (q15_t)0xb594, (q15_t)0x6820, (q15_t)0xb58f, (q15_t)0x681c, (q15_t)0xb58a, (q15_t)0x6818, (q15_t)0xb585,
+  (q15_t)0x6815, (q15_t)0xb57f, (q15_t)0x6811, (q15_t)0xb57a, (q15_t)0x680d, (q15_t)0xb575, (q15_t)0x680a, (q15_t)0xb570,
+  (q15_t)0x6806, (q15_t)0xb56b, (q15_t)0x6802, (q15_t)0xb566, (q15_t)0x67ff, (q15_t)0xb561, (q15_t)0x67fb, (q15_t)0xb55c,
+  (q15_t)0x67f7, (q15_t)0xb557, (q15_t)0x67f4, (q15_t)0xb552, (q15_t)0x67f0, (q15_t)0xb54c, (q15_t)0x67ec, (q15_t)0xb547,
+  (q15_t)0x67e9, (q15_t)0xb542, (q15_t)0x67e5, (q15_t)0xb53d, (q15_t)0x67e1, (q15_t)0xb538, (q15_t)0x67de, (q15_t)0xb533,
+  (q15_t)0x67da, (q15_t)0xb52e, (q15_t)0x67d6, (q15_t)0xb529, (q15_t)0x67d3, (q15_t)0xb524, (q15_t)0x67cf, (q15_t)0xb51f,
+  (q15_t)0x67cb, (q15_t)0xb519, (q15_t)0x67c8, (q15_t)0xb514, (q15_t)0x67c4, (q15_t)0xb50f, (q15_t)0x67c0, (q15_t)0xb50a,
+  (q15_t)0x67bd, (q15_t)0xb505, (q15_t)0x67b9, (q15_t)0xb500, (q15_t)0x67b5, (q15_t)0xb4fb, (q15_t)0x67b2, (q15_t)0xb4f6,
+  (q15_t)0x67ae, (q15_t)0xb4f1, (q15_t)0x67aa, (q15_t)0xb4ec, (q15_t)0x67a6, (q15_t)0xb4e7, (q15_t)0x67a3, (q15_t)0xb4e1,
+  (q15_t)0x679f, (q15_t)0xb4dc, (q15_t)0x679b, (q15_t)0xb4d7, (q15_t)0x6798, (q15_t)0xb4d2, (q15_t)0x6794, (q15_t)0xb4cd,
+  (q15_t)0x6790, (q15_t)0xb4c8, (q15_t)0x678d, (q15_t)0xb4c3, (q15_t)0x6789, (q15_t)0xb4be, (q15_t)0x6785, (q15_t)0xb4b9,
+  (q15_t)0x6782, (q15_t)0xb4b4, (q15_t)0x677e, (q15_t)0xb4af, (q15_t)0x677a, (q15_t)0xb4aa, (q15_t)0x6776, (q15_t)0xb4a4,
+  (q15_t)0x6773, (q15_t)0xb49f, (q15_t)0x676f, (q15_t)0xb49a, (q15_t)0x676b, (q15_t)0xb495, (q15_t)0x6768, (q15_t)0xb490,
+  (q15_t)0x6764, (q15_t)0xb48b, (q15_t)0x6760, (q15_t)0xb486, (q15_t)0x675d, (q15_t)0xb481, (q15_t)0x6759, (q15_t)0xb47c,
+  (q15_t)0x6755, (q15_t)0xb477, (q15_t)0x6751, (q15_t)0xb472, (q15_t)0x674e, (q15_t)0xb46d, (q15_t)0x674a, (q15_t)0xb468,
+  (q15_t)0x6746, (q15_t)0xb462, (q15_t)0x6743, (q15_t)0xb45d, (q15_t)0x673f, (q15_t)0xb458, (q15_t)0x673b, (q15_t)0xb453,
+  (q15_t)0x6737, (q15_t)0xb44e, (q15_t)0x6734, (q15_t)0xb449, (q15_t)0x6730, (q15_t)0xb444, (q15_t)0x672c, (q15_t)0xb43f,
+  (q15_t)0x6729, (q15_t)0xb43a, (q15_t)0x6725, (q15_t)0xb435, (q15_t)0x6721, (q15_t)0xb430, (q15_t)0x671d, (q15_t)0xb42b,
+  (q15_t)0x671a, (q15_t)0xb426, (q15_t)0x6716, (q15_t)0xb421, (q15_t)0x6712, (q15_t)0xb41c, (q15_t)0x670e, (q15_t)0xb417,
+  (q15_t)0x670b, (q15_t)0xb411, (q15_t)0x6707, (q15_t)0xb40c, (q15_t)0x6703, (q15_t)0xb407, (q15_t)0x6700, (q15_t)0xb402,
+  (q15_t)0x66fc, (q15_t)0xb3fd, (q15_t)0x66f8, (q15_t)0xb3f8, (q15_t)0x66f4, (q15_t)0xb3f3, (q15_t)0x66f1, (q15_t)0xb3ee,
+  (q15_t)0x66ed, (q15_t)0xb3e9, (q15_t)0x66e9, (q15_t)0xb3e4, (q15_t)0x66e5, (q15_t)0xb3df, (q15_t)0x66e2, (q15_t)0xb3da,
+  (q15_t)0x66de, (q15_t)0xb3d5, (q15_t)0x66da, (q15_t)0xb3d0, (q15_t)0x66d6, (q15_t)0xb3cb, (q15_t)0x66d3, (q15_t)0xb3c6,
+  (q15_t)0x66cf, (q15_t)0xb3c1, (q15_t)0x66cb, (q15_t)0xb3bc, (q15_t)0x66c8, (q15_t)0xb3b7, (q15_t)0x66c4, (q15_t)0xb3b1,
+  (q15_t)0x66c0, (q15_t)0xb3ac, (q15_t)0x66bc, (q15_t)0xb3a7, (q15_t)0x66b9, (q15_t)0xb3a2, (q15_t)0x66b5, (q15_t)0xb39d,
+  (q15_t)0x66b1, (q15_t)0xb398, (q15_t)0x66ad, (q15_t)0xb393, (q15_t)0x66aa, (q15_t)0xb38e, (q15_t)0x66a6, (q15_t)0xb389,
+  (q15_t)0x66a2, (q15_t)0xb384, (q15_t)0x669e, (q15_t)0xb37f, (q15_t)0x669b, (q15_t)0xb37a, (q15_t)0x6697, (q15_t)0xb375,
+  (q15_t)0x6693, (q15_t)0xb370, (q15_t)0x668f, (q15_t)0xb36b, (q15_t)0x668b, (q15_t)0xb366, (q15_t)0x6688, (q15_t)0xb361,
+  (q15_t)0x6684, (q15_t)0xb35c, (q15_t)0x6680, (q15_t)0xb357, (q15_t)0x667c, (q15_t)0xb352, (q15_t)0x6679, (q15_t)0xb34d,
+  (q15_t)0x6675, (q15_t)0xb348, (q15_t)0x6671, (q15_t)0xb343, (q15_t)0x666d, (q15_t)0xb33e, (q15_t)0x666a, (q15_t)0xb339,
+  (q15_t)0x6666, (q15_t)0xb334, (q15_t)0x6662, (q15_t)0xb32f, (q15_t)0x665e, (q15_t)0xb32a, (q15_t)0x665b, (q15_t)0xb325,
+  (q15_t)0x6657, (q15_t)0xb31f, (q15_t)0x6653, (q15_t)0xb31a, (q15_t)0x664f, (q15_t)0xb315, (q15_t)0x664b, (q15_t)0xb310,
+  (q15_t)0x6648, (q15_t)0xb30b, (q15_t)0x6644, (q15_t)0xb306, (q15_t)0x6640, (q15_t)0xb301, (q15_t)0x663c, (q15_t)0xb2fc,
+  (q15_t)0x6639, (q15_t)0xb2f7, (q15_t)0x6635, (q15_t)0xb2f2, (q15_t)0x6631, (q15_t)0xb2ed, (q15_t)0x662d, (q15_t)0xb2e8,
+  (q15_t)0x6629, (q15_t)0xb2e3, (q15_t)0x6626, (q15_t)0xb2de, (q15_t)0x6622, (q15_t)0xb2d9, (q15_t)0x661e, (q15_t)0xb2d4,
+  (q15_t)0x661a, (q15_t)0xb2cf, (q15_t)0x6616, (q15_t)0xb2ca, (q15_t)0x6613, (q15_t)0xb2c5, (q15_t)0x660f, (q15_t)0xb2c0,
+  (q15_t)0x660b, (q15_t)0xb2bb, (q15_t)0x6607, (q15_t)0xb2b6, (q15_t)0x6603, (q15_t)0xb2b1, (q15_t)0x6600, (q15_t)0xb2ac,
+  (q15_t)0x65fc, (q15_t)0xb2a7, (q15_t)0x65f8, (q15_t)0xb2a2, (q15_t)0x65f4, (q15_t)0xb29d, (q15_t)0x65f0, (q15_t)0xb298,
+  (q15_t)0x65ed, (q15_t)0xb293, (q15_t)0x65e9, (q15_t)0xb28e, (q15_t)0x65e5, (q15_t)0xb289, (q15_t)0x65e1, (q15_t)0xb284,
+  (q15_t)0x65dd, (q15_t)0xb27f, (q15_t)0x65da, (q15_t)0xb27a, (q15_t)0x65d6, (q15_t)0xb275, (q15_t)0x65d2, (q15_t)0xb270,
+  (q15_t)0x65ce, (q15_t)0xb26b, (q15_t)0x65ca, (q15_t)0xb266, (q15_t)0x65c7, (q15_t)0xb261, (q15_t)0x65c3, (q15_t)0xb25c,
+  (q15_t)0x65bf, (q15_t)0xb257, (q15_t)0x65bb, (q15_t)0xb252, (q15_t)0x65b7, (q15_t)0xb24d, (q15_t)0x65b4, (q15_t)0xb248,
+  (q15_t)0x65b0, (q15_t)0xb243, (q15_t)0x65ac, (q15_t)0xb23e, (q15_t)0x65a8, (q15_t)0xb239, (q15_t)0x65a4, (q15_t)0xb234,
+  (q15_t)0x65a0, (q15_t)0xb22f, (q15_t)0x659d, (q15_t)0xb22a, (q15_t)0x6599, (q15_t)0xb225, (q15_t)0x6595, (q15_t)0xb220,
+  (q15_t)0x6591, (q15_t)0xb21b, (q15_t)0x658d, (q15_t)0xb216, (q15_t)0x658a, (q15_t)0xb211, (q15_t)0x6586, (q15_t)0xb20c,
+  (q15_t)0x6582, (q15_t)0xb207, (q15_t)0x657e, (q15_t)0xb202, (q15_t)0x657a, (q15_t)0xb1fd, (q15_t)0x6576, (q15_t)0xb1f8,
+  (q15_t)0x6573, (q15_t)0xb1f3, (q15_t)0x656f, (q15_t)0xb1ee, (q15_t)0x656b, (q15_t)0xb1e9, (q15_t)0x6567, (q15_t)0xb1e4,
+  (q15_t)0x6563, (q15_t)0xb1df, (q15_t)0x655f, (q15_t)0xb1da, (q15_t)0x655c, (q15_t)0xb1d6, (q15_t)0x6558, (q15_t)0xb1d1,
+  (q15_t)0x6554, (q15_t)0xb1cc, (q15_t)0x6550, (q15_t)0xb1c7, (q15_t)0x654c, (q15_t)0xb1c2, (q15_t)0x6548, (q15_t)0xb1bd,
+  (q15_t)0x6545, (q15_t)0xb1b8, (q15_t)0x6541, (q15_t)0xb1b3, (q15_t)0x653d, (q15_t)0xb1ae, (q15_t)0x6539, (q15_t)0xb1a9,
+  (q15_t)0x6535, (q15_t)0xb1a4, (q15_t)0x6531, (q15_t)0xb19f, (q15_t)0x652d, (q15_t)0xb19a, (q15_t)0x652a, (q15_t)0xb195,
+  (q15_t)0x6526, (q15_t)0xb190, (q15_t)0x6522, (q15_t)0xb18b, (q15_t)0x651e, (q15_t)0xb186, (q15_t)0x651a, (q15_t)0xb181,
+  (q15_t)0x6516, (q15_t)0xb17c, (q15_t)0x6513, (q15_t)0xb177, (q15_t)0x650f, (q15_t)0xb172, (q15_t)0x650b, (q15_t)0xb16d,
+  (q15_t)0x6507, (q15_t)0xb168, (q15_t)0x6503, (q15_t)0xb163, (q15_t)0x64ff, (q15_t)0xb15e, (q15_t)0x64fb, (q15_t)0xb159,
+  (q15_t)0x64f7, (q15_t)0xb154, (q15_t)0x64f4, (q15_t)0xb14f, (q15_t)0x64f0, (q15_t)0xb14a, (q15_t)0x64ec, (q15_t)0xb146,
+  (q15_t)0x64e8, (q15_t)0xb141, (q15_t)0x64e4, (q15_t)0xb13c, (q15_t)0x64e0, (q15_t)0xb137, (q15_t)0x64dc, (q15_t)0xb132,
+  (q15_t)0x64d9, (q15_t)0xb12d, (q15_t)0x64d5, (q15_t)0xb128, (q15_t)0x64d1, (q15_t)0xb123, (q15_t)0x64cd, (q15_t)0xb11e,
+  (q15_t)0x64c9, (q15_t)0xb119, (q15_t)0x64c5, (q15_t)0xb114, (q15_t)0x64c1, (q15_t)0xb10f, (q15_t)0x64bd, (q15_t)0xb10a,
+  (q15_t)0x64ba, (q15_t)0xb105, (q15_t)0x64b6, (q15_t)0xb100, (q15_t)0x64b2, (q15_t)0xb0fb, (q15_t)0x64ae, (q15_t)0xb0f6,
+  (q15_t)0x64aa, (q15_t)0xb0f1, (q15_t)0x64a6, (q15_t)0xb0ec, (q15_t)0x64a2, (q15_t)0xb0e8, (q15_t)0x649e, (q15_t)0xb0e3,
+  (q15_t)0x649b, (q15_t)0xb0de, (q15_t)0x6497, (q15_t)0xb0d9, (q15_t)0x6493, (q15_t)0xb0d4, (q15_t)0x648f, (q15_t)0xb0cf,
+  (q15_t)0x648b, (q15_t)0xb0ca, (q15_t)0x6487, (q15_t)0xb0c5, (q15_t)0x6483, (q15_t)0xb0c0, (q15_t)0x647f, (q15_t)0xb0bb,
+  (q15_t)0x647b, (q15_t)0xb0b6, (q15_t)0x6478, (q15_t)0xb0b1, (q15_t)0x6474, (q15_t)0xb0ac, (q15_t)0x6470, (q15_t)0xb0a7,
+  (q15_t)0x646c, (q15_t)0xb0a2, (q15_t)0x6468, (q15_t)0xb09e, (q15_t)0x6464, (q15_t)0xb099, (q15_t)0x6460, (q15_t)0xb094,
+  (q15_t)0x645c, (q15_t)0xb08f, (q15_t)0x6458, (q15_t)0xb08a, (q15_t)0x6454, (q15_t)0xb085, (q15_t)0x6451, (q15_t)0xb080,
+  (q15_t)0x644d, (q15_t)0xb07b, (q15_t)0x6449, (q15_t)0xb076, (q15_t)0x6445, (q15_t)0xb071, (q15_t)0x6441, (q15_t)0xb06c,
+  (q15_t)0x643d, (q15_t)0xb067, (q15_t)0x6439, (q15_t)0xb062, (q15_t)0x6435, (q15_t)0xb05e, (q15_t)0x6431, (q15_t)0xb059,
+  (q15_t)0x642d, (q15_t)0xb054, (q15_t)0x6429, (q15_t)0xb04f, (q15_t)0x6426, (q15_t)0xb04a, (q15_t)0x6422, (q15_t)0xb045,
+  (q15_t)0x641e, (q15_t)0xb040, (q15_t)0x641a, (q15_t)0xb03b, (q15_t)0x6416, (q15_t)0xb036, (q15_t)0x6412, (q15_t)0xb031,
+  (q15_t)0x640e, (q15_t)0xb02c, (q15_t)0x640a, (q15_t)0xb027, (q15_t)0x6406, (q15_t)0xb023, (q15_t)0x6402, (q15_t)0xb01e,
+  (q15_t)0x63fe, (q15_t)0xb019, (q15_t)0x63fa, (q15_t)0xb014, (q15_t)0x63f7, (q15_t)0xb00f, (q15_t)0x63f3, (q15_t)0xb00a,
+  (q15_t)0x63ef, (q15_t)0xb005, (q15_t)0x63eb, (q15_t)0xb000, (q15_t)0x63e7, (q15_t)0xaffb, (q15_t)0x63e3, (q15_t)0xaff6,
+  (q15_t)0x63df, (q15_t)0xaff1, (q15_t)0x63db, (q15_t)0xafed, (q15_t)0x63d7, (q15_t)0xafe8, (q15_t)0x63d3, (q15_t)0xafe3,
+  (q15_t)0x63cf, (q15_t)0xafde, (q15_t)0x63cb, (q15_t)0xafd9, (q15_t)0x63c7, (q15_t)0xafd4, (q15_t)0x63c3, (q15_t)0xafcf,
+  (q15_t)0x63c0, (q15_t)0xafca, (q15_t)0x63bc, (q15_t)0xafc5, (q15_t)0x63b8, (q15_t)0xafc1, (q15_t)0x63b4, (q15_t)0xafbc,
+  (q15_t)0x63b0, (q15_t)0xafb7, (q15_t)0x63ac, (q15_t)0xafb2, (q15_t)0x63a8, (q15_t)0xafad, (q15_t)0x63a4, (q15_t)0xafa8,
+  (q15_t)0x63a0, (q15_t)0xafa3, (q15_t)0x639c, (q15_t)0xaf9e, (q15_t)0x6398, (q15_t)0xaf99, (q15_t)0x6394, (q15_t)0xaf94,
+  (q15_t)0x6390, (q15_t)0xaf90, (q15_t)0x638c, (q15_t)0xaf8b, (q15_t)0x6388, (q15_t)0xaf86, (q15_t)0x6384, (q15_t)0xaf81,
+  (q15_t)0x6380, (q15_t)0xaf7c, (q15_t)0x637c, (q15_t)0xaf77, (q15_t)0x6378, (q15_t)0xaf72, (q15_t)0x6375, (q15_t)0xaf6d,
+  (q15_t)0x6371, (q15_t)0xaf69, (q15_t)0x636d, (q15_t)0xaf64, (q15_t)0x6369, (q15_t)0xaf5f, (q15_t)0x6365, (q15_t)0xaf5a,
+  (q15_t)0x6361, (q15_t)0xaf55, (q15_t)0x635d, (q15_t)0xaf50, (q15_t)0x6359, (q15_t)0xaf4b, (q15_t)0x6355, (q15_t)0xaf46,
+  (q15_t)0x6351, (q15_t)0xaf41, (q15_t)0x634d, (q15_t)0xaf3d, (q15_t)0x6349, (q15_t)0xaf38, (q15_t)0x6345, (q15_t)0xaf33,
+  (q15_t)0x6341, (q15_t)0xaf2e, (q15_t)0x633d, (q15_t)0xaf29, (q15_t)0x6339, (q15_t)0xaf24, (q15_t)0x6335, (q15_t)0xaf1f,
+  (q15_t)0x6331, (q15_t)0xaf1b, (q15_t)0x632d, (q15_t)0xaf16, (q15_t)0x6329, (q15_t)0xaf11, (q15_t)0x6325, (q15_t)0xaf0c,
+  (q15_t)0x6321, (q15_t)0xaf07, (q15_t)0x631d, (q15_t)0xaf02, (q15_t)0x6319, (q15_t)0xaefd, (q15_t)0x6315, (q15_t)0xaef8,
+  (q15_t)0x6311, (q15_t)0xaef4, (q15_t)0x630d, (q15_t)0xaeef, (q15_t)0x6309, (q15_t)0xaeea, (q15_t)0x6305, (q15_t)0xaee5,
+  (q15_t)0x6301, (q15_t)0xaee0, (q15_t)0x62fd, (q15_t)0xaedb, (q15_t)0x62f9, (q15_t)0xaed6, (q15_t)0x62f5, (q15_t)0xaed2,
+  (q15_t)0x62f2, (q15_t)0xaecd, (q15_t)0x62ee, (q15_t)0xaec8, (q15_t)0x62ea, (q15_t)0xaec3, (q15_t)0x62e6, (q15_t)0xaebe,
+  (q15_t)0x62e2, (q15_t)0xaeb9, (q15_t)0x62de, (q15_t)0xaeb4, (q15_t)0x62da, (q15_t)0xaeb0, (q15_t)0x62d6, (q15_t)0xaeab,
+  (q15_t)0x62d2, (q15_t)0xaea6, (q15_t)0x62ce, (q15_t)0xaea1, (q15_t)0x62ca, (q15_t)0xae9c, (q15_t)0x62c6, (q15_t)0xae97,
+  (q15_t)0x62c2, (q15_t)0xae92, (q15_t)0x62be, (q15_t)0xae8e, (q15_t)0x62ba, (q15_t)0xae89, (q15_t)0x62b6, (q15_t)0xae84,
+  (q15_t)0x62b2, (q15_t)0xae7f, (q15_t)0x62ae, (q15_t)0xae7a, (q15_t)0x62aa, (q15_t)0xae75, (q15_t)0x62a6, (q15_t)0xae71,
+  (q15_t)0x62a2, (q15_t)0xae6c, (q15_t)0x629e, (q15_t)0xae67, (q15_t)0x629a, (q15_t)0xae62, (q15_t)0x6296, (q15_t)0xae5d,
+  (q15_t)0x6292, (q15_t)0xae58, (q15_t)0x628e, (q15_t)0xae54, (q15_t)0x628a, (q15_t)0xae4f, (q15_t)0x6286, (q15_t)0xae4a,
+  (q15_t)0x6282, (q15_t)0xae45, (q15_t)0x627e, (q15_t)0xae40, (q15_t)0x627a, (q15_t)0xae3b, (q15_t)0x6275, (q15_t)0xae37,
+  (q15_t)0x6271, (q15_t)0xae32, (q15_t)0x626d, (q15_t)0xae2d, (q15_t)0x6269, (q15_t)0xae28, (q15_t)0x6265, (q15_t)0xae23,
+  (q15_t)0x6261, (q15_t)0xae1e, (q15_t)0x625d, (q15_t)0xae1a, (q15_t)0x6259, (q15_t)0xae15, (q15_t)0x6255, (q15_t)0xae10,
+  (q15_t)0x6251, (q15_t)0xae0b, (q15_t)0x624d, (q15_t)0xae06, (q15_t)0x6249, (q15_t)0xae01, (q15_t)0x6245, (q15_t)0xadfd,
+  (q15_t)0x6241, (q15_t)0xadf8, (q15_t)0x623d, (q15_t)0xadf3, (q15_t)0x6239, (q15_t)0xadee, (q15_t)0x6235, (q15_t)0xade9,
+  (q15_t)0x6231, (q15_t)0xade4, (q15_t)0x622d, (q15_t)0xade0, (q15_t)0x6229, (q15_t)0xaddb, (q15_t)0x6225, (q15_t)0xadd6,
+  (q15_t)0x6221, (q15_t)0xadd1, (q15_t)0x621d, (q15_t)0xadcc, (q15_t)0x6219, (q15_t)0xadc8, (q15_t)0x6215, (q15_t)0xadc3,
+  (q15_t)0x6211, (q15_t)0xadbe, (q15_t)0x620d, (q15_t)0xadb9, (q15_t)0x6209, (q15_t)0xadb4, (q15_t)0x6205, (q15_t)0xadaf,
+  (q15_t)0x6201, (q15_t)0xadab, (q15_t)0x61fd, (q15_t)0xada6, (q15_t)0x61f9, (q15_t)0xada1, (q15_t)0x61f5, (q15_t)0xad9c,
+  (q15_t)0x61f1, (q15_t)0xad97, (q15_t)0x61ec, (q15_t)0xad93, (q15_t)0x61e8, (q15_t)0xad8e, (q15_t)0x61e4, (q15_t)0xad89,
+  (q15_t)0x61e0, (q15_t)0xad84, (q15_t)0x61dc, (q15_t)0xad7f, (q15_t)0x61d8, (q15_t)0xad7b, (q15_t)0x61d4, (q15_t)0xad76,
+  (q15_t)0x61d0, (q15_t)0xad71, (q15_t)0x61cc, (q15_t)0xad6c, (q15_t)0x61c8, (q15_t)0xad67, (q15_t)0x61c4, (q15_t)0xad63,
+  (q15_t)0x61c0, (q15_t)0xad5e, (q15_t)0x61bc, (q15_t)0xad59, (q15_t)0x61b8, (q15_t)0xad54, (q15_t)0x61b4, (q15_t)0xad4f,
+  (q15_t)0x61b0, (q15_t)0xad4b, (q15_t)0x61ac, (q15_t)0xad46, (q15_t)0x61a8, (q15_t)0xad41, (q15_t)0x61a3, (q15_t)0xad3c,
+  (q15_t)0x619f, (q15_t)0xad37, (q15_t)0x619b, (q15_t)0xad33, (q15_t)0x6197, (q15_t)0xad2e, (q15_t)0x6193, (q15_t)0xad29,
+  (q15_t)0x618f, (q15_t)0xad24, (q15_t)0x618b, (q15_t)0xad1f, (q15_t)0x6187, (q15_t)0xad1b, (q15_t)0x6183, (q15_t)0xad16,
+  (q15_t)0x617f, (q15_t)0xad11, (q15_t)0x617b, (q15_t)0xad0c, (q15_t)0x6177, (q15_t)0xad08, (q15_t)0x6173, (q15_t)0xad03,
+  (q15_t)0x616f, (q15_t)0xacfe, (q15_t)0x616b, (q15_t)0xacf9, (q15_t)0x6166, (q15_t)0xacf4, (q15_t)0x6162, (q15_t)0xacf0,
+  (q15_t)0x615e, (q15_t)0xaceb, (q15_t)0x615a, (q15_t)0xace6, (q15_t)0x6156, (q15_t)0xace1, (q15_t)0x6152, (q15_t)0xacdd,
+  (q15_t)0x614e, (q15_t)0xacd8, (q15_t)0x614a, (q15_t)0xacd3, (q15_t)0x6146, (q15_t)0xacce, (q15_t)0x6142, (q15_t)0xacc9,
+  (q15_t)0x613e, (q15_t)0xacc5, (q15_t)0x613a, (q15_t)0xacc0, (q15_t)0x6135, (q15_t)0xacbb, (q15_t)0x6131, (q15_t)0xacb6,
+  (q15_t)0x612d, (q15_t)0xacb2, (q15_t)0x6129, (q15_t)0xacad, (q15_t)0x6125, (q15_t)0xaca8, (q15_t)0x6121, (q15_t)0xaca3,
+  (q15_t)0x611d, (q15_t)0xac9e, (q15_t)0x6119, (q15_t)0xac9a, (q15_t)0x6115, (q15_t)0xac95, (q15_t)0x6111, (q15_t)0xac90,
+  (q15_t)0x610d, (q15_t)0xac8b, (q15_t)0x6108, (q15_t)0xac87, (q15_t)0x6104, (q15_t)0xac82, (q15_t)0x6100, (q15_t)0xac7d,
+  (q15_t)0x60fc, (q15_t)0xac78, (q15_t)0x60f8, (q15_t)0xac74, (q15_t)0x60f4, (q15_t)0xac6f, (q15_t)0x60f0, (q15_t)0xac6a,
+  (q15_t)0x60ec, (q15_t)0xac65, (q15_t)0x60e8, (q15_t)0xac61, (q15_t)0x60e4, (q15_t)0xac5c, (q15_t)0x60df, (q15_t)0xac57,
+  (q15_t)0x60db, (q15_t)0xac52, (q15_t)0x60d7, (q15_t)0xac4e, (q15_t)0x60d3, (q15_t)0xac49, (q15_t)0x60cf, (q15_t)0xac44,
+  (q15_t)0x60cb, (q15_t)0xac3f, (q15_t)0x60c7, (q15_t)0xac3b, (q15_t)0x60c3, (q15_t)0xac36, (q15_t)0x60bf, (q15_t)0xac31,
+  (q15_t)0x60ba, (q15_t)0xac2c, (q15_t)0x60b6, (q15_t)0xac28, (q15_t)0x60b2, (q15_t)0xac23, (q15_t)0x60ae, (q15_t)0xac1e,
+  (q15_t)0x60aa, (q15_t)0xac19, (q15_t)0x60a6, (q15_t)0xac15, (q15_t)0x60a2, (q15_t)0xac10, (q15_t)0x609e, (q15_t)0xac0b,
+  (q15_t)0x6099, (q15_t)0xac06, (q15_t)0x6095, (q15_t)0xac02, (q15_t)0x6091, (q15_t)0xabfd, (q15_t)0x608d, (q15_t)0xabf8,
+  (q15_t)0x6089, (q15_t)0xabf3, (q15_t)0x6085, (q15_t)0xabef, (q15_t)0x6081, (q15_t)0xabea, (q15_t)0x607d, (q15_t)0xabe5,
+  (q15_t)0x6078, (q15_t)0xabe0, (q15_t)0x6074, (q15_t)0xabdc, (q15_t)0x6070, (q15_t)0xabd7, (q15_t)0x606c, (q15_t)0xabd2,
+  (q15_t)0x6068, (q15_t)0xabcd, (q15_t)0x6064, (q15_t)0xabc9, (q15_t)0x6060, (q15_t)0xabc4, (q15_t)0x605c, (q15_t)0xabbf,
+  (q15_t)0x6057, (q15_t)0xabbb, (q15_t)0x6053, (q15_t)0xabb6, (q15_t)0x604f, (q15_t)0xabb1, (q15_t)0x604b, (q15_t)0xabac,
+  (q15_t)0x6047, (q15_t)0xaba8, (q15_t)0x6043, (q15_t)0xaba3, (q15_t)0x603f, (q15_t)0xab9e, (q15_t)0x603a, (q15_t)0xab99,
+  (q15_t)0x6036, (q15_t)0xab95, (q15_t)0x6032, (q15_t)0xab90, (q15_t)0x602e, (q15_t)0xab8b, (q15_t)0x602a, (q15_t)0xab87,
+  (q15_t)0x6026, (q15_t)0xab82, (q15_t)0x6022, (q15_t)0xab7d, (q15_t)0x601d, (q15_t)0xab78, (q15_t)0x6019, (q15_t)0xab74,
+  (q15_t)0x6015, (q15_t)0xab6f, (q15_t)0x6011, (q15_t)0xab6a, (q15_t)0x600d, (q15_t)0xab66, (q15_t)0x6009, (q15_t)0xab61,
+  (q15_t)0x6004, (q15_t)0xab5c, (q15_t)0x6000, (q15_t)0xab57, (q15_t)0x5ffc, (q15_t)0xab53, (q15_t)0x5ff8, (q15_t)0xab4e,
+  (q15_t)0x5ff4, (q15_t)0xab49, (q15_t)0x5ff0, (q15_t)0xab45, (q15_t)0x5fec, (q15_t)0xab40, (q15_t)0x5fe7, (q15_t)0xab3b,
+  (q15_t)0x5fe3, (q15_t)0xab36, (q15_t)0x5fdf, (q15_t)0xab32, (q15_t)0x5fdb, (q15_t)0xab2d, (q15_t)0x5fd7, (q15_t)0xab28,
+  (q15_t)0x5fd3, (q15_t)0xab24, (q15_t)0x5fce, (q15_t)0xab1f, (q15_t)0x5fca, (q15_t)0xab1a, (q15_t)0x5fc6, (q15_t)0xab16,
+  (q15_t)0x5fc2, (q15_t)0xab11, (q15_t)0x5fbe, (q15_t)0xab0c, (q15_t)0x5fba, (q15_t)0xab07, (q15_t)0x5fb5, (q15_t)0xab03,
+  (q15_t)0x5fb1, (q15_t)0xaafe, (q15_t)0x5fad, (q15_t)0xaaf9, (q15_t)0x5fa9, (q15_t)0xaaf5, (q15_t)0x5fa5, (q15_t)0xaaf0,
+  (q15_t)0x5fa0, (q15_t)0xaaeb, (q15_t)0x5f9c, (q15_t)0xaae7, (q15_t)0x5f98, (q15_t)0xaae2, (q15_t)0x5f94, (q15_t)0xaadd,
+  (q15_t)0x5f90, (q15_t)0xaad8, (q15_t)0x5f8c, (q15_t)0xaad4, (q15_t)0x5f87, (q15_t)0xaacf, (q15_t)0x5f83, (q15_t)0xaaca,
+  (q15_t)0x5f7f, (q15_t)0xaac6, (q15_t)0x5f7b, (q15_t)0xaac1, (q15_t)0x5f77, (q15_t)0xaabc, (q15_t)0x5f72, (q15_t)0xaab8,
+  (q15_t)0x5f6e, (q15_t)0xaab3, (q15_t)0x5f6a, (q15_t)0xaaae, (q15_t)0x5f66, (q15_t)0xaaaa, (q15_t)0x5f62, (q15_t)0xaaa5,
+  (q15_t)0x5f5e, (q15_t)0xaaa0, (q15_t)0x5f59, (q15_t)0xaa9c, (q15_t)0x5f55, (q15_t)0xaa97, (q15_t)0x5f51, (q15_t)0xaa92,
+  (q15_t)0x5f4d, (q15_t)0xaa8e, (q15_t)0x5f49, (q15_t)0xaa89, (q15_t)0x5f44, (q15_t)0xaa84, (q15_t)0x5f40, (q15_t)0xaa7f,
+  (q15_t)0x5f3c, (q15_t)0xaa7b, (q15_t)0x5f38, (q15_t)0xaa76, (q15_t)0x5f34, (q15_t)0xaa71, (q15_t)0x5f2f, (q15_t)0xaa6d,
+  (q15_t)0x5f2b, (q15_t)0xaa68, (q15_t)0x5f27, (q15_t)0xaa63, (q15_t)0x5f23, (q15_t)0xaa5f, (q15_t)0x5f1f, (q15_t)0xaa5a,
+  (q15_t)0x5f1a, (q15_t)0xaa55, (q15_t)0x5f16, (q15_t)0xaa51, (q15_t)0x5f12, (q15_t)0xaa4c, (q15_t)0x5f0e, (q15_t)0xaa47,
+  (q15_t)0x5f0a, (q15_t)0xaa43, (q15_t)0x5f05, (q15_t)0xaa3e, (q15_t)0x5f01, (q15_t)0xaa39, (q15_t)0x5efd, (q15_t)0xaa35,
+  (q15_t)0x5ef9, (q15_t)0xaa30, (q15_t)0x5ef5, (q15_t)0xaa2b, (q15_t)0x5ef0, (q15_t)0xaa27, (q15_t)0x5eec, (q15_t)0xaa22,
+  (q15_t)0x5ee8, (q15_t)0xaa1d, (q15_t)0x5ee4, (q15_t)0xaa19, (q15_t)0x5edf, (q15_t)0xaa14, (q15_t)0x5edb, (q15_t)0xaa10,
+  (q15_t)0x5ed7, (q15_t)0xaa0b, (q15_t)0x5ed3, (q15_t)0xaa06, (q15_t)0x5ecf, (q15_t)0xaa02, (q15_t)0x5eca, (q15_t)0xa9fd,
+  (q15_t)0x5ec6, (q15_t)0xa9f8, (q15_t)0x5ec2, (q15_t)0xa9f4, (q15_t)0x5ebe, (q15_t)0xa9ef, (q15_t)0x5eb9, (q15_t)0xa9ea,
+  (q15_t)0x5eb5, (q15_t)0xa9e6, (q15_t)0x5eb1, (q15_t)0xa9e1, (q15_t)0x5ead, (q15_t)0xa9dc, (q15_t)0x5ea9, (q15_t)0xa9d8,
+  (q15_t)0x5ea4, (q15_t)0xa9d3, (q15_t)0x5ea0, (q15_t)0xa9ce, (q15_t)0x5e9c, (q15_t)0xa9ca, (q15_t)0x5e98, (q15_t)0xa9c5,
+  (q15_t)0x5e93, (q15_t)0xa9c0, (q15_t)0x5e8f, (q15_t)0xa9bc, (q15_t)0x5e8b, (q15_t)0xa9b7, (q15_t)0x5e87, (q15_t)0xa9b3,
+  (q15_t)0x5e82, (q15_t)0xa9ae, (q15_t)0x5e7e, (q15_t)0xa9a9, (q15_t)0x5e7a, (q15_t)0xa9a5, (q15_t)0x5e76, (q15_t)0xa9a0,
+  (q15_t)0x5e71, (q15_t)0xa99b, (q15_t)0x5e6d, (q15_t)0xa997, (q15_t)0x5e69, (q15_t)0xa992, (q15_t)0x5e65, (q15_t)0xa98d,
+  (q15_t)0x5e60, (q15_t)0xa989, (q15_t)0x5e5c, (q15_t)0xa984, (q15_t)0x5e58, (q15_t)0xa980, (q15_t)0x5e54, (q15_t)0xa97b,
+  (q15_t)0x5e50, (q15_t)0xa976, (q15_t)0x5e4b, (q15_t)0xa972, (q15_t)0x5e47, (q15_t)0xa96d, (q15_t)0x5e43, (q15_t)0xa968,
+  (q15_t)0x5e3f, (q15_t)0xa964, (q15_t)0x5e3a, (q15_t)0xa95f, (q15_t)0x5e36, (q15_t)0xa95b, (q15_t)0x5e32, (q15_t)0xa956,
+  (q15_t)0x5e2d, (q15_t)0xa951, (q15_t)0x5e29, (q15_t)0xa94d, (q15_t)0x5e25, (q15_t)0xa948, (q15_t)0x5e21, (q15_t)0xa943,
+  (q15_t)0x5e1c, (q15_t)0xa93f, (q15_t)0x5e18, (q15_t)0xa93a, (q15_t)0x5e14, (q15_t)0xa936, (q15_t)0x5e10, (q15_t)0xa931,
+  (q15_t)0x5e0b, (q15_t)0xa92c, (q15_t)0x5e07, (q15_t)0xa928, (q15_t)0x5e03, (q15_t)0xa923, (q15_t)0x5dff, (q15_t)0xa91e,
+  (q15_t)0x5dfa, (q15_t)0xa91a, (q15_t)0x5df6, (q15_t)0xa915, (q15_t)0x5df2, (q15_t)0xa911, (q15_t)0x5dee, (q15_t)0xa90c,
+  (q15_t)0x5de9, (q15_t)0xa907, (q15_t)0x5de5, (q15_t)0xa903, (q15_t)0x5de1, (q15_t)0xa8fe, (q15_t)0x5ddc, (q15_t)0xa8fa,
+  (q15_t)0x5dd8, (q15_t)0xa8f5, (q15_t)0x5dd4, (q15_t)0xa8f0, (q15_t)0x5dd0, (q15_t)0xa8ec, (q15_t)0x5dcb, (q15_t)0xa8e7,
+  (q15_t)0x5dc7, (q15_t)0xa8e3, (q15_t)0x5dc3, (q15_t)0xa8de, (q15_t)0x5dbf, (q15_t)0xa8d9, (q15_t)0x5dba, (q15_t)0xa8d5,
+  (q15_t)0x5db6, (q15_t)0xa8d0, (q15_t)0x5db2, (q15_t)0xa8cc, (q15_t)0x5dad, (q15_t)0xa8c7, (q15_t)0x5da9, (q15_t)0xa8c2,
+  (q15_t)0x5da5, (q15_t)0xa8be, (q15_t)0x5da1, (q15_t)0xa8b9, (q15_t)0x5d9c, (q15_t)0xa8b5, (q15_t)0x5d98, (q15_t)0xa8b0,
+  (q15_t)0x5d94, (q15_t)0xa8ab, (q15_t)0x5d8f, (q15_t)0xa8a7, (q15_t)0x5d8b, (q15_t)0xa8a2, (q15_t)0x5d87, (q15_t)0xa89e,
+  (q15_t)0x5d83, (q15_t)0xa899, (q15_t)0x5d7e, (q15_t)0xa894, (q15_t)0x5d7a, (q15_t)0xa890, (q15_t)0x5d76, (q15_t)0xa88b,
+  (q15_t)0x5d71, (q15_t)0xa887, (q15_t)0x5d6d, (q15_t)0xa882, (q15_t)0x5d69, (q15_t)0xa87d, (q15_t)0x5d65, (q15_t)0xa879,
+  (q15_t)0x5d60, (q15_t)0xa874, (q15_t)0x5d5c, (q15_t)0xa870, (q15_t)0x5d58, (q15_t)0xa86b, (q15_t)0x5d53, (q15_t)0xa867,
+  (q15_t)0x5d4f, (q15_t)0xa862, (q15_t)0x5d4b, (q15_t)0xa85d, (q15_t)0x5d46, (q15_t)0xa859, (q15_t)0x5d42, (q15_t)0xa854,
+  (q15_t)0x5d3e, (q15_t)0xa850, (q15_t)0x5d3a, (q15_t)0xa84b, (q15_t)0x5d35, (q15_t)0xa847, (q15_t)0x5d31, (q15_t)0xa842,
+  (q15_t)0x5d2d, (q15_t)0xa83d, (q15_t)0x5d28, (q15_t)0xa839, (q15_t)0x5d24, (q15_t)0xa834, (q15_t)0x5d20, (q15_t)0xa830,
+  (q15_t)0x5d1b, (q15_t)0xa82b, (q15_t)0x5d17, (q15_t)0xa827, (q15_t)0x5d13, (q15_t)0xa822, (q15_t)0x5d0e, (q15_t)0xa81d,
+  (q15_t)0x5d0a, (q15_t)0xa819, (q15_t)0x5d06, (q15_t)0xa814, (q15_t)0x5d01, (q15_t)0xa810, (q15_t)0x5cfd, (q15_t)0xa80b,
+  (q15_t)0x5cf9, (q15_t)0xa807, (q15_t)0x5cf5, (q15_t)0xa802, (q15_t)0x5cf0, (q15_t)0xa7fd, (q15_t)0x5cec, (q15_t)0xa7f9,
+  (q15_t)0x5ce8, (q15_t)0xa7f4, (q15_t)0x5ce3, (q15_t)0xa7f0, (q15_t)0x5cdf, (q15_t)0xa7eb, (q15_t)0x5cdb, (q15_t)0xa7e7,
+  (q15_t)0x5cd6, (q15_t)0xa7e2, (q15_t)0x5cd2, (q15_t)0xa7de, (q15_t)0x5cce, (q15_t)0xa7d9, (q15_t)0x5cc9, (q15_t)0xa7d4,
+  (q15_t)0x5cc5, (q15_t)0xa7d0, (q15_t)0x5cc1, (q15_t)0xa7cb, (q15_t)0x5cbc, (q15_t)0xa7c7, (q15_t)0x5cb8, (q15_t)0xa7c2,
+  (q15_t)0x5cb4, (q15_t)0xa7be, (q15_t)0x5caf, (q15_t)0xa7b9, (q15_t)0x5cab, (q15_t)0xa7b5, (q15_t)0x5ca7, (q15_t)0xa7b0,
+  (q15_t)0x5ca2, (q15_t)0xa7ab, (q15_t)0x5c9e, (q15_t)0xa7a7, (q15_t)0x5c9a, (q15_t)0xa7a2, (q15_t)0x5c95, (q15_t)0xa79e,
+  (q15_t)0x5c91, (q15_t)0xa799, (q15_t)0x5c8d, (q15_t)0xa795, (q15_t)0x5c88, (q15_t)0xa790, (q15_t)0x5c84, (q15_t)0xa78c,
+  (q15_t)0x5c80, (q15_t)0xa787, (q15_t)0x5c7b, (q15_t)0xa783, (q15_t)0x5c77, (q15_t)0xa77e, (q15_t)0x5c73, (q15_t)0xa779,
+  (q15_t)0x5c6e, (q15_t)0xa775, (q15_t)0x5c6a, (q15_t)0xa770, (q15_t)0x5c66, (q15_t)0xa76c, (q15_t)0x5c61, (q15_t)0xa767,
+  (q15_t)0x5c5d, (q15_t)0xa763, (q15_t)0x5c58, (q15_t)0xa75e, (q15_t)0x5c54, (q15_t)0xa75a, (q15_t)0x5c50, (q15_t)0xa755,
+  (q15_t)0x5c4b, (q15_t)0xa751, (q15_t)0x5c47, (q15_t)0xa74c, (q15_t)0x5c43, (q15_t)0xa748, (q15_t)0x5c3e, (q15_t)0xa743,
+  (q15_t)0x5c3a, (q15_t)0xa73f, (q15_t)0x5c36, (q15_t)0xa73a, (q15_t)0x5c31, (q15_t)0xa735, (q15_t)0x5c2d, (q15_t)0xa731,
+  (q15_t)0x5c29, (q15_t)0xa72c, (q15_t)0x5c24, (q15_t)0xa728, (q15_t)0x5c20, (q15_t)0xa723, (q15_t)0x5c1b, (q15_t)0xa71f,
+  (q15_t)0x5c17, (q15_t)0xa71a, (q15_t)0x5c13, (q15_t)0xa716, (q15_t)0x5c0e, (q15_t)0xa711, (q15_t)0x5c0a, (q15_t)0xa70d,
+  (q15_t)0x5c06, (q15_t)0xa708, (q15_t)0x5c01, (q15_t)0xa704, (q15_t)0x5bfd, (q15_t)0xa6ff, (q15_t)0x5bf9, (q15_t)0xa6fb,
+  (q15_t)0x5bf4, (q15_t)0xa6f6, (q15_t)0x5bf0, (q15_t)0xa6f2, (q15_t)0x5beb, (q15_t)0xa6ed, (q15_t)0x5be7, (q15_t)0xa6e9,
+  (q15_t)0x5be3, (q15_t)0xa6e4, (q15_t)0x5bde, (q15_t)0xa6e0, (q15_t)0x5bda, (q15_t)0xa6db, (q15_t)0x5bd6, (q15_t)0xa6d7,
+  (q15_t)0x5bd1, (q15_t)0xa6d2, (q15_t)0x5bcd, (q15_t)0xa6ce, (q15_t)0x5bc8, (q15_t)0xa6c9, (q15_t)0x5bc4, (q15_t)0xa6c5,
+  (q15_t)0x5bc0, (q15_t)0xa6c0, (q15_t)0x5bbb, (q15_t)0xa6bc, (q15_t)0x5bb7, (q15_t)0xa6b7, (q15_t)0x5bb2, (q15_t)0xa6b3,
+  (q15_t)0x5bae, (q15_t)0xa6ae, (q15_t)0x5baa, (q15_t)0xa6aa, (q15_t)0x5ba5, (q15_t)0xa6a5, (q15_t)0x5ba1, (q15_t)0xa6a1,
+  (q15_t)0x5b9d, (q15_t)0xa69c, (q15_t)0x5b98, (q15_t)0xa698, (q15_t)0x5b94, (q15_t)0xa693, (q15_t)0x5b8f, (q15_t)0xa68f,
+  (q15_t)0x5b8b, (q15_t)0xa68a, (q15_t)0x5b87, (q15_t)0xa686, (q15_t)0x5b82, (q15_t)0xa681, (q15_t)0x5b7e, (q15_t)0xa67d,
+  (q15_t)0x5b79, (q15_t)0xa678, (q15_t)0x5b75, (q15_t)0xa674, (q15_t)0x5b71, (q15_t)0xa66f, (q15_t)0x5b6c, (q15_t)0xa66b,
+  (q15_t)0x5b68, (q15_t)0xa666, (q15_t)0x5b63, (q15_t)0xa662, (q15_t)0x5b5f, (q15_t)0xa65d, (q15_t)0x5b5b, (q15_t)0xa659,
+  (q15_t)0x5b56, (q15_t)0xa654, (q15_t)0x5b52, (q15_t)0xa650, (q15_t)0x5b4d, (q15_t)0xa64b, (q15_t)0x5b49, (q15_t)0xa647,
+  (q15_t)0x5b45, (q15_t)0xa642, (q15_t)0x5b40, (q15_t)0xa63e, (q15_t)0x5b3c, (q15_t)0xa639, (q15_t)0x5b37, (q15_t)0xa635,
+  (q15_t)0x5b33, (q15_t)0xa630, (q15_t)0x5b2f, (q15_t)0xa62c, (q15_t)0x5b2a, (q15_t)0xa627, (q15_t)0x5b26, (q15_t)0xa623,
+  (q15_t)0x5b21, (q15_t)0xa61f, (q15_t)0x5b1d, (q15_t)0xa61a, (q15_t)0x5b19, (q15_t)0xa616, (q15_t)0x5b14, (q15_t)0xa611,
+  (q15_t)0x5b10, (q15_t)0xa60d, (q15_t)0x5b0b, (q15_t)0xa608, (q15_t)0x5b07, (q15_t)0xa604, (q15_t)0x5b02, (q15_t)0xa5ff,
+  (q15_t)0x5afe, (q15_t)0xa5fb, (q15_t)0x5afa, (q15_t)0xa5f6, (q15_t)0x5af5, (q15_t)0xa5f2, (q15_t)0x5af1, (q15_t)0xa5ed,
+  (q15_t)0x5aec, (q15_t)0xa5e9, (q15_t)0x5ae8, (q15_t)0xa5e4, (q15_t)0x5ae4, (q15_t)0xa5e0, (q15_t)0x5adf, (q15_t)0xa5dc,
+  (q15_t)0x5adb, (q15_t)0xa5d7, (q15_t)0x5ad6, (q15_t)0xa5d3, (q15_t)0x5ad2, (q15_t)0xa5ce, (q15_t)0x5acd, (q15_t)0xa5ca,
+  (q15_t)0x5ac9, (q15_t)0xa5c5, (q15_t)0x5ac5, (q15_t)0xa5c1, (q15_t)0x5ac0, (q15_t)0xa5bc, (q15_t)0x5abc, (q15_t)0xa5b8,
+  (q15_t)0x5ab7, (q15_t)0xa5b3, (q15_t)0x5ab3, (q15_t)0xa5af, (q15_t)0x5aae, (q15_t)0xa5aa, (q15_t)0x5aaa, (q15_t)0xa5a6,
+  (q15_t)0x5aa5, (q15_t)0xa5a2, (q15_t)0x5aa1, (q15_t)0xa59d, (q15_t)0x5a9d, (q15_t)0xa599, (q15_t)0x5a98, (q15_t)0xa594,
+  (q15_t)0x5a94, (q15_t)0xa590, (q15_t)0x5a8f, (q15_t)0xa58b, (q15_t)0x5a8b, (q15_t)0xa587, (q15_t)0x5a86, (q15_t)0xa582,
+  (q15_t)0x5a82, (q15_t)0xa57e, (q15_t)0x5a7e, (q15_t)0xa57a, (q15_t)0x5a79, (q15_t)0xa575, (q15_t)0x5a75, (q15_t)0xa571,
+  (q15_t)0x5a70, (q15_t)0xa56c, (q15_t)0x5a6c, (q15_t)0xa568, (q15_t)0x5a67, (q15_t)0xa563, (q15_t)0x5a63, (q15_t)0xa55f,
+  (q15_t)0x5a5e, (q15_t)0xa55b, (q15_t)0x5a5a, (q15_t)0xa556, (q15_t)0x5a56, (q15_t)0xa552, (q15_t)0x5a51, (q15_t)0xa54d,
+  (q15_t)0x5a4d, (q15_t)0xa549, (q15_t)0x5a48, (q15_t)0xa544, (q15_t)0x5a44, (q15_t)0xa540, (q15_t)0x5a3f, (q15_t)0xa53b,
+  (q15_t)0x5a3b, (q15_t)0xa537, (q15_t)0x5a36, (q15_t)0xa533, (q15_t)0x5a32, (q15_t)0xa52e, (q15_t)0x5a2d, (q15_t)0xa52a,
+  (q15_t)0x5a29, (q15_t)0xa525, (q15_t)0x5a24, (q15_t)0xa521, (q15_t)0x5a20, (q15_t)0xa51c, (q15_t)0x5a1c, (q15_t)0xa518,
+  (q15_t)0x5a17, (q15_t)0xa514, (q15_t)0x5a13, (q15_t)0xa50f, (q15_t)0x5a0e, (q15_t)0xa50b, (q15_t)0x5a0a, (q15_t)0xa506,
+  (q15_t)0x5a05, (q15_t)0xa502, (q15_t)0x5a01, (q15_t)0xa4fe, (q15_t)0x59fc, (q15_t)0xa4f9, (q15_t)0x59f8, (q15_t)0xa4f5,
+  (q15_t)0x59f3, (q15_t)0xa4f0, (q15_t)0x59ef, (q15_t)0xa4ec, (q15_t)0x59ea, (q15_t)0xa4e7, (q15_t)0x59e6, (q15_t)0xa4e3,
+  (q15_t)0x59e1, (q15_t)0xa4df, (q15_t)0x59dd, (q15_t)0xa4da, (q15_t)0x59d9, (q15_t)0xa4d6, (q15_t)0x59d4, (q15_t)0xa4d1,
+  (q15_t)0x59d0, (q15_t)0xa4cd, (q15_t)0x59cb, (q15_t)0xa4c9, (q15_t)0x59c7, (q15_t)0xa4c4, (q15_t)0x59c2, (q15_t)0xa4c0,
+  (q15_t)0x59be, (q15_t)0xa4bb, (q15_t)0x59b9, (q15_t)0xa4b7, (q15_t)0x59b5, (q15_t)0xa4b3, (q15_t)0x59b0, (q15_t)0xa4ae,
+  (q15_t)0x59ac, (q15_t)0xa4aa, (q15_t)0x59a7, (q15_t)0xa4a5, (q15_t)0x59a3, (q15_t)0xa4a1, (q15_t)0x599e, (q15_t)0xa49d,
+  (q15_t)0x599a, (q15_t)0xa498, (q15_t)0x5995, (q15_t)0xa494, (q15_t)0x5991, (q15_t)0xa48f, (q15_t)0x598c, (q15_t)0xa48b,
+  (q15_t)0x5988, (q15_t)0xa487, (q15_t)0x5983, (q15_t)0xa482, (q15_t)0x597f, (q15_t)0xa47e, (q15_t)0x597a, (q15_t)0xa479,
+  (q15_t)0x5976, (q15_t)0xa475, (q15_t)0x5971, (q15_t)0xa471, (q15_t)0x596d, (q15_t)0xa46c, (q15_t)0x5968, (q15_t)0xa468,
+  (q15_t)0x5964, (q15_t)0xa463, (q15_t)0x595f, (q15_t)0xa45f, (q15_t)0x595b, (q15_t)0xa45b, (q15_t)0x5956, (q15_t)0xa456,
+  (q15_t)0x5952, (q15_t)0xa452, (q15_t)0x594d, (q15_t)0xa44e, (q15_t)0x5949, (q15_t)0xa449, (q15_t)0x5944, (q15_t)0xa445,
+  (q15_t)0x5940, (q15_t)0xa440, (q15_t)0x593b, (q15_t)0xa43c, (q15_t)0x5937, (q15_t)0xa438, (q15_t)0x5932, (q15_t)0xa433,
+  (q15_t)0x592e, (q15_t)0xa42f, (q15_t)0x5929, (q15_t)0xa42a, (q15_t)0x5925, (q15_t)0xa426, (q15_t)0x5920, (q15_t)0xa422,
+  (q15_t)0x591c, (q15_t)0xa41d, (q15_t)0x5917, (q15_t)0xa419, (q15_t)0x5913, (q15_t)0xa415, (q15_t)0x590e, (q15_t)0xa410,
+  (q15_t)0x590a, (q15_t)0xa40c, (q15_t)0x5905, (q15_t)0xa407, (q15_t)0x5901, (q15_t)0xa403, (q15_t)0x58fc, (q15_t)0xa3ff,
+  (q15_t)0x58f8, (q15_t)0xa3fa, (q15_t)0x58f3, (q15_t)0xa3f6, (q15_t)0x58ef, (q15_t)0xa3f2, (q15_t)0x58ea, (q15_t)0xa3ed,
+  (q15_t)0x58e6, (q15_t)0xa3e9, (q15_t)0x58e1, (q15_t)0xa3e5, (q15_t)0x58dd, (q15_t)0xa3e0, (q15_t)0x58d8, (q15_t)0xa3dc,
+  (q15_t)0x58d4, (q15_t)0xa3d7, (q15_t)0x58cf, (q15_t)0xa3d3, (q15_t)0x58cb, (q15_t)0xa3cf, (q15_t)0x58c6, (q15_t)0xa3ca,
+  (q15_t)0x58c1, (q15_t)0xa3c6, (q15_t)0x58bd, (q15_t)0xa3c2, (q15_t)0x58b8, (q15_t)0xa3bd, (q15_t)0x58b4, (q15_t)0xa3b9,
+  (q15_t)0x58af, (q15_t)0xa3b5, (q15_t)0x58ab, (q15_t)0xa3b0, (q15_t)0x58a6, (q15_t)0xa3ac, (q15_t)0x58a2, (q15_t)0xa3a8,
+  (q15_t)0x589d, (q15_t)0xa3a3, (q15_t)0x5899, (q15_t)0xa39f, (q15_t)0x5894, (q15_t)0xa39a, (q15_t)0x5890, (q15_t)0xa396,
+  (q15_t)0x588b, (q15_t)0xa392, (q15_t)0x5887, (q15_t)0xa38d, (q15_t)0x5882, (q15_t)0xa389, (q15_t)0x587d, (q15_t)0xa385,
+  (q15_t)0x5879, (q15_t)0xa380, (q15_t)0x5874, (q15_t)0xa37c, (q15_t)0x5870, (q15_t)0xa378, (q15_t)0x586b, (q15_t)0xa373,
+  (q15_t)0x5867, (q15_t)0xa36f, (q15_t)0x5862, (q15_t)0xa36b, (q15_t)0x585e, (q15_t)0xa366, (q15_t)0x5859, (q15_t)0xa362,
+  (q15_t)0x5855, (q15_t)0xa35e, (q15_t)0x5850, (q15_t)0xa359, (q15_t)0x584b, (q15_t)0xa355, (q15_t)0x5847, (q15_t)0xa351,
+  (q15_t)0x5842, (q15_t)0xa34c, (q15_t)0x583e, (q15_t)0xa348, (q15_t)0x5839, (q15_t)0xa344, (q15_t)0x5835, (q15_t)0xa33f,
+  (q15_t)0x5830, (q15_t)0xa33b, (q15_t)0x582c, (q15_t)0xa337, (q15_t)0x5827, (q15_t)0xa332, (q15_t)0x5822, (q15_t)0xa32e,
+  (q15_t)0x581e, (q15_t)0xa32a, (q15_t)0x5819, (q15_t)0xa325, (q15_t)0x5815, (q15_t)0xa321, (q15_t)0x5810, (q15_t)0xa31d,
+  (q15_t)0x580c, (q15_t)0xa318, (q15_t)0x5807, (q15_t)0xa314, (q15_t)0x5803, (q15_t)0xa310, (q15_t)0x57fe, (q15_t)0xa30b,
+  (q15_t)0x57f9, (q15_t)0xa307, (q15_t)0x57f5, (q15_t)0xa303, (q15_t)0x57f0, (q15_t)0xa2ff, (q15_t)0x57ec, (q15_t)0xa2fa,
+  (q15_t)0x57e7, (q15_t)0xa2f6, (q15_t)0x57e3, (q15_t)0xa2f2, (q15_t)0x57de, (q15_t)0xa2ed, (q15_t)0x57d9, (q15_t)0xa2e9,
+  (q15_t)0x57d5, (q15_t)0xa2e5, (q15_t)0x57d0, (q15_t)0xa2e0, (q15_t)0x57cc, (q15_t)0xa2dc, (q15_t)0x57c7, (q15_t)0xa2d8,
+  (q15_t)0x57c3, (q15_t)0xa2d3, (q15_t)0x57be, (q15_t)0xa2cf, (q15_t)0x57b9, (q15_t)0xa2cb, (q15_t)0x57b5, (q15_t)0xa2c6,
+  (q15_t)0x57b0, (q15_t)0xa2c2, (q15_t)0x57ac, (q15_t)0xa2be, (q15_t)0x57a7, (q15_t)0xa2ba, (q15_t)0x57a3, (q15_t)0xa2b5,
+  (q15_t)0x579e, (q15_t)0xa2b1, (q15_t)0x5799, (q15_t)0xa2ad, (q15_t)0x5795, (q15_t)0xa2a8, (q15_t)0x5790, (q15_t)0xa2a4,
+  (q15_t)0x578c, (q15_t)0xa2a0, (q15_t)0x5787, (q15_t)0xa29b, (q15_t)0x5783, (q15_t)0xa297, (q15_t)0x577e, (q15_t)0xa293,
+  (q15_t)0x5779, (q15_t)0xa28f, (q15_t)0x5775, (q15_t)0xa28a, (q15_t)0x5770, (q15_t)0xa286, (q15_t)0x576c, (q15_t)0xa282,
+  (q15_t)0x5767, (q15_t)0xa27d, (q15_t)0x5762, (q15_t)0xa279, (q15_t)0x575e, (q15_t)0xa275, (q15_t)0x5759, (q15_t)0xa271,
+  (q15_t)0x5755, (q15_t)0xa26c, (q15_t)0x5750, (q15_t)0xa268, (q15_t)0x574b, (q15_t)0xa264, (q15_t)0x5747, (q15_t)0xa25f,
+  (q15_t)0x5742, (q15_t)0xa25b, (q15_t)0x573e, (q15_t)0xa257, (q15_t)0x5739, (q15_t)0xa253, (q15_t)0x5734, (q15_t)0xa24e,
+  (q15_t)0x5730, (q15_t)0xa24a, (q15_t)0x572b, (q15_t)0xa246, (q15_t)0x5727, (q15_t)0xa241, (q15_t)0x5722, (q15_t)0xa23d,
+  (q15_t)0x571d, (q15_t)0xa239, (q15_t)0x5719, (q15_t)0xa235, (q15_t)0x5714, (q15_t)0xa230, (q15_t)0x5710, (q15_t)0xa22c,
+  (q15_t)0x570b, (q15_t)0xa228, (q15_t)0x5706, (q15_t)0xa224, (q15_t)0x5702, (q15_t)0xa21f, (q15_t)0x56fd, (q15_t)0xa21b,
+  (q15_t)0x56f9, (q15_t)0xa217, (q15_t)0x56f4, (q15_t)0xa212, (q15_t)0x56ef, (q15_t)0xa20e, (q15_t)0x56eb, (q15_t)0xa20a,
+  (q15_t)0x56e6, (q15_t)0xa206, (q15_t)0x56e2, (q15_t)0xa201, (q15_t)0x56dd, (q15_t)0xa1fd, (q15_t)0x56d8, (q15_t)0xa1f9,
+  (q15_t)0x56d4, (q15_t)0xa1f5, (q15_t)0x56cf, (q15_t)0xa1f0, (q15_t)0x56ca, (q15_t)0xa1ec, (q15_t)0x56c6, (q15_t)0xa1e8,
+  (q15_t)0x56c1, (q15_t)0xa1e4, (q15_t)0x56bd, (q15_t)0xa1df, (q15_t)0x56b8, (q15_t)0xa1db, (q15_t)0x56b3, (q15_t)0xa1d7,
+  (q15_t)0x56af, (q15_t)0xa1d3, (q15_t)0x56aa, (q15_t)0xa1ce, (q15_t)0x56a5, (q15_t)0xa1ca, (q15_t)0x56a1, (q15_t)0xa1c6,
+  (q15_t)0x569c, (q15_t)0xa1c1, (q15_t)0x5698, (q15_t)0xa1bd, (q15_t)0x5693, (q15_t)0xa1b9, (q15_t)0x568e, (q15_t)0xa1b5,
+  (q15_t)0x568a, (q15_t)0xa1b0, (q15_t)0x5685, (q15_t)0xa1ac, (q15_t)0x5680, (q15_t)0xa1a8, (q15_t)0x567c, (q15_t)0xa1a4,
+  (q15_t)0x5677, (q15_t)0xa1a0, (q15_t)0x5673, (q15_t)0xa19b, (q15_t)0x566e, (q15_t)0xa197, (q15_t)0x5669, (q15_t)0xa193,
+  (q15_t)0x5665, (q15_t)0xa18f, (q15_t)0x5660, (q15_t)0xa18a, (q15_t)0x565b, (q15_t)0xa186, (q15_t)0x5657, (q15_t)0xa182,
+  (q15_t)0x5652, (q15_t)0xa17e, (q15_t)0x564d, (q15_t)0xa179, (q15_t)0x5649, (q15_t)0xa175, (q15_t)0x5644, (q15_t)0xa171,
+  (q15_t)0x5640, (q15_t)0xa16d, (q15_t)0x563b, (q15_t)0xa168, (q15_t)0x5636, (q15_t)0xa164, (q15_t)0x5632, (q15_t)0xa160,
+  (q15_t)0x562d, (q15_t)0xa15c, (q15_t)0x5628, (q15_t)0xa157, (q15_t)0x5624, (q15_t)0xa153, (q15_t)0x561f, (q15_t)0xa14f,
+  (q15_t)0x561a, (q15_t)0xa14b, (q15_t)0x5616, (q15_t)0xa147, (q15_t)0x5611, (q15_t)0xa142, (q15_t)0x560c, (q15_t)0xa13e,
+  (q15_t)0x5608, (q15_t)0xa13a, (q15_t)0x5603, (q15_t)0xa136, (q15_t)0x55fe, (q15_t)0xa131, (q15_t)0x55fa, (q15_t)0xa12d,
+  (q15_t)0x55f5, (q15_t)0xa129, (q15_t)0x55f0, (q15_t)0xa125, (q15_t)0x55ec, (q15_t)0xa121, (q15_t)0x55e7, (q15_t)0xa11c,
+  (q15_t)0x55e3, (q15_t)0xa118, (q15_t)0x55de, (q15_t)0xa114, (q15_t)0x55d9, (q15_t)0xa110, (q15_t)0x55d5, (q15_t)0xa10b,
+  (q15_t)0x55d0, (q15_t)0xa107, (q15_t)0x55cb, (q15_t)0xa103, (q15_t)0x55c7, (q15_t)0xa0ff, (q15_t)0x55c2, (q15_t)0xa0fb,
+  (q15_t)0x55bd, (q15_t)0xa0f6, (q15_t)0x55b9, (q15_t)0xa0f2, (q15_t)0x55b4, (q15_t)0xa0ee, (q15_t)0x55af, (q15_t)0xa0ea,
+  (q15_t)0x55ab, (q15_t)0xa0e6, (q15_t)0x55a6, (q15_t)0xa0e1, (q15_t)0x55a1, (q15_t)0xa0dd, (q15_t)0x559d, (q15_t)0xa0d9,
+  (q15_t)0x5598, (q15_t)0xa0d5, (q15_t)0x5593, (q15_t)0xa0d1, (q15_t)0x558f, (q15_t)0xa0cc, (q15_t)0x558a, (q15_t)0xa0c8,
+  (q15_t)0x5585, (q15_t)0xa0c4, (q15_t)0x5581, (q15_t)0xa0c0, (q15_t)0x557c, (q15_t)0xa0bc, (q15_t)0x5577, (q15_t)0xa0b7,
+  (q15_t)0x5572, (q15_t)0xa0b3, (q15_t)0x556e, (q15_t)0xa0af, (q15_t)0x5569, (q15_t)0xa0ab, (q15_t)0x5564, (q15_t)0xa0a7,
+  (q15_t)0x5560, (q15_t)0xa0a2, (q15_t)0x555b, (q15_t)0xa09e, (q15_t)0x5556, (q15_t)0xa09a, (q15_t)0x5552, (q15_t)0xa096,
+  (q15_t)0x554d, (q15_t)0xa092, (q15_t)0x5548, (q15_t)0xa08e, (q15_t)0x5544, (q15_t)0xa089, (q15_t)0x553f, (q15_t)0xa085,
+  (q15_t)0x553a, (q15_t)0xa081, (q15_t)0x5536, (q15_t)0xa07d, (q15_t)0x5531, (q15_t)0xa079, (q15_t)0x552c, (q15_t)0xa074,
+  (q15_t)0x5528, (q15_t)0xa070, (q15_t)0x5523, (q15_t)0xa06c, (q15_t)0x551e, (q15_t)0xa068, (q15_t)0x5519, (q15_t)0xa064,
+  (q15_t)0x5515, (q15_t)0xa060, (q15_t)0x5510, (q15_t)0xa05b, (q15_t)0x550b, (q15_t)0xa057, (q15_t)0x5507, (q15_t)0xa053,
+  (q15_t)0x5502, (q15_t)0xa04f, (q15_t)0x54fd, (q15_t)0xa04b, (q15_t)0x54f9, (q15_t)0xa046, (q15_t)0x54f4, (q15_t)0xa042,
+  (q15_t)0x54ef, (q15_t)0xa03e, (q15_t)0x54ea, (q15_t)0xa03a, (q15_t)0x54e6, (q15_t)0xa036, (q15_t)0x54e1, (q15_t)0xa032,
+  (q15_t)0x54dc, (q15_t)0xa02d, (q15_t)0x54d8, (q15_t)0xa029, (q15_t)0x54d3, (q15_t)0xa025, (q15_t)0x54ce, (q15_t)0xa021,
+  (q15_t)0x54ca, (q15_t)0xa01d, (q15_t)0x54c5, (q15_t)0xa019, (q15_t)0x54c0, (q15_t)0xa014, (q15_t)0x54bb, (q15_t)0xa010,
+  (q15_t)0x54b7, (q15_t)0xa00c, (q15_t)0x54b2, (q15_t)0xa008, (q15_t)0x54ad, (q15_t)0xa004, (q15_t)0x54a9, (q15_t)0xa000,
+  (q15_t)0x54a4, (q15_t)0x9ffc, (q15_t)0x549f, (q15_t)0x9ff7, (q15_t)0x549a, (q15_t)0x9ff3, (q15_t)0x5496, (q15_t)0x9fef,
+  (q15_t)0x5491, (q15_t)0x9feb, (q15_t)0x548c, (q15_t)0x9fe7, (q15_t)0x5488, (q15_t)0x9fe3, (q15_t)0x5483, (q15_t)0x9fde,
+  (q15_t)0x547e, (q15_t)0x9fda, (q15_t)0x5479, (q15_t)0x9fd6, (q15_t)0x5475, (q15_t)0x9fd2, (q15_t)0x5470, (q15_t)0x9fce,
+  (q15_t)0x546b, (q15_t)0x9fca, (q15_t)0x5467, (q15_t)0x9fc6, (q15_t)0x5462, (q15_t)0x9fc1, (q15_t)0x545d, (q15_t)0x9fbd,
+  (q15_t)0x5458, (q15_t)0x9fb9, (q15_t)0x5454, (q15_t)0x9fb5, (q15_t)0x544f, (q15_t)0x9fb1, (q15_t)0x544a, (q15_t)0x9fad,
+  (q15_t)0x5445, (q15_t)0x9fa9, (q15_t)0x5441, (q15_t)0x9fa4, (q15_t)0x543c, (q15_t)0x9fa0, (q15_t)0x5437, (q15_t)0x9f9c,
+  (q15_t)0x5433, (q15_t)0x9f98, (q15_t)0x542e, (q15_t)0x9f94, (q15_t)0x5429, (q15_t)0x9f90, (q15_t)0x5424, (q15_t)0x9f8c,
+  (q15_t)0x5420, (q15_t)0x9f88, (q15_t)0x541b, (q15_t)0x9f83, (q15_t)0x5416, (q15_t)0x9f7f, (q15_t)0x5411, (q15_t)0x9f7b,
+  (q15_t)0x540d, (q15_t)0x9f77, (q15_t)0x5408, (q15_t)0x9f73, (q15_t)0x5403, (q15_t)0x9f6f, (q15_t)0x53fe, (q15_t)0x9f6b,
+  (q15_t)0x53fa, (q15_t)0x9f67, (q15_t)0x53f5, (q15_t)0x9f62, (q15_t)0x53f0, (q15_t)0x9f5e, (q15_t)0x53eb, (q15_t)0x9f5a,
+  (q15_t)0x53e7, (q15_t)0x9f56, (q15_t)0x53e2, (q15_t)0x9f52, (q15_t)0x53dd, (q15_t)0x9f4e, (q15_t)0x53d8, (q15_t)0x9f4a,
+  (q15_t)0x53d4, (q15_t)0x9f46, (q15_t)0x53cf, (q15_t)0x9f41, (q15_t)0x53ca, (q15_t)0x9f3d, (q15_t)0x53c5, (q15_t)0x9f39,
+  (q15_t)0x53c1, (q15_t)0x9f35, (q15_t)0x53bc, (q15_t)0x9f31, (q15_t)0x53b7, (q15_t)0x9f2d, (q15_t)0x53b2, (q15_t)0x9f29,
+  (q15_t)0x53ae, (q15_t)0x9f25, (q15_t)0x53a9, (q15_t)0x9f21, (q15_t)0x53a4, (q15_t)0x9f1c, (q15_t)0x539f, (q15_t)0x9f18,
+  (q15_t)0x539b, (q15_t)0x9f14, (q15_t)0x5396, (q15_t)0x9f10, (q15_t)0x5391, (q15_t)0x9f0c, (q15_t)0x538c, (q15_t)0x9f08,
+  (q15_t)0x5388, (q15_t)0x9f04, (q15_t)0x5383, (q15_t)0x9f00, (q15_t)0x537e, (q15_t)0x9efc, (q15_t)0x5379, (q15_t)0x9ef8,
+  (q15_t)0x5375, (q15_t)0x9ef3, (q15_t)0x5370, (q15_t)0x9eef, (q15_t)0x536b, (q15_t)0x9eeb, (q15_t)0x5366, (q15_t)0x9ee7,
+  (q15_t)0x5362, (q15_t)0x9ee3, (q15_t)0x535d, (q15_t)0x9edf, (q15_t)0x5358, (q15_t)0x9edb, (q15_t)0x5353, (q15_t)0x9ed7,
+  (q15_t)0x534e, (q15_t)0x9ed3, (q15_t)0x534a, (q15_t)0x9ecf, (q15_t)0x5345, (q15_t)0x9ecb, (q15_t)0x5340, (q15_t)0x9ec6,
+  (q15_t)0x533b, (q15_t)0x9ec2, (q15_t)0x5337, (q15_t)0x9ebe, (q15_t)0x5332, (q15_t)0x9eba, (q15_t)0x532d, (q15_t)0x9eb6,
+  (q15_t)0x5328, (q15_t)0x9eb2, (q15_t)0x5323, (q15_t)0x9eae, (q15_t)0x531f, (q15_t)0x9eaa, (q15_t)0x531a, (q15_t)0x9ea6,
+  (q15_t)0x5315, (q15_t)0x9ea2, (q15_t)0x5310, (q15_t)0x9e9e, (q15_t)0x530c, (q15_t)0x9e9a, (q15_t)0x5307, (q15_t)0x9e95,
+  (q15_t)0x5302, (q15_t)0x9e91, (q15_t)0x52fd, (q15_t)0x9e8d, (q15_t)0x52f8, (q15_t)0x9e89, (q15_t)0x52f4, (q15_t)0x9e85,
+  (q15_t)0x52ef, (q15_t)0x9e81, (q15_t)0x52ea, (q15_t)0x9e7d, (q15_t)0x52e5, (q15_t)0x9e79, (q15_t)0x52e1, (q15_t)0x9e75,
+  (q15_t)0x52dc, (q15_t)0x9e71, (q15_t)0x52d7, (q15_t)0x9e6d, (q15_t)0x52d2, (q15_t)0x9e69, (q15_t)0x52cd, (q15_t)0x9e65,
+  (q15_t)0x52c9, (q15_t)0x9e61, (q15_t)0x52c4, (q15_t)0x9e5d, (q15_t)0x52bf, (q15_t)0x9e58, (q15_t)0x52ba, (q15_t)0x9e54,
+  (q15_t)0x52b5, (q15_t)0x9e50, (q15_t)0x52b1, (q15_t)0x9e4c, (q15_t)0x52ac, (q15_t)0x9e48, (q15_t)0x52a7, (q15_t)0x9e44,
+  (q15_t)0x52a2, (q15_t)0x9e40, (q15_t)0x529d, (q15_t)0x9e3c, (q15_t)0x5299, (q15_t)0x9e38, (q15_t)0x5294, (q15_t)0x9e34,
+  (q15_t)0x528f, (q15_t)0x9e30, (q15_t)0x528a, (q15_t)0x9e2c, (q15_t)0x5285, (q15_t)0x9e28, (q15_t)0x5281, (q15_t)0x9e24,
+  (q15_t)0x527c, (q15_t)0x9e20, (q15_t)0x5277, (q15_t)0x9e1c, (q15_t)0x5272, (q15_t)0x9e18, (q15_t)0x526d, (q15_t)0x9e14,
+  (q15_t)0x5269, (q15_t)0x9e0f, (q15_t)0x5264, (q15_t)0x9e0b, (q15_t)0x525f, (q15_t)0x9e07, (q15_t)0x525a, (q15_t)0x9e03,
+  (q15_t)0x5255, (q15_t)0x9dff, (q15_t)0x5251, (q15_t)0x9dfb, (q15_t)0x524c, (q15_t)0x9df7, (q15_t)0x5247, (q15_t)0x9df3,
+  (q15_t)0x5242, (q15_t)0x9def, (q15_t)0x523d, (q15_t)0x9deb, (q15_t)0x5238, (q15_t)0x9de7, (q15_t)0x5234, (q15_t)0x9de3,
+  (q15_t)0x522f, (q15_t)0x9ddf, (q15_t)0x522a, (q15_t)0x9ddb, (q15_t)0x5225, (q15_t)0x9dd7, (q15_t)0x5220, (q15_t)0x9dd3,
+  (q15_t)0x521c, (q15_t)0x9dcf, (q15_t)0x5217, (q15_t)0x9dcb, (q15_t)0x5212, (q15_t)0x9dc7, (q15_t)0x520d, (q15_t)0x9dc3,
+  (q15_t)0x5208, (q15_t)0x9dbf, (q15_t)0x5203, (q15_t)0x9dbb, (q15_t)0x51ff, (q15_t)0x9db7, (q15_t)0x51fa, (q15_t)0x9db3,
+  (q15_t)0x51f5, (q15_t)0x9daf, (q15_t)0x51f0, (q15_t)0x9dab, (q15_t)0x51eb, (q15_t)0x9da7, (q15_t)0x51e6, (q15_t)0x9da3,
+  (q15_t)0x51e2, (q15_t)0x9d9f, (q15_t)0x51dd, (q15_t)0x9d9b, (q15_t)0x51d8, (q15_t)0x9d97, (q15_t)0x51d3, (q15_t)0x9d93,
+  (q15_t)0x51ce, (q15_t)0x9d8f, (q15_t)0x51c9, (q15_t)0x9d8b, (q15_t)0x51c5, (q15_t)0x9d86, (q15_t)0x51c0, (q15_t)0x9d82,
+  (q15_t)0x51bb, (q15_t)0x9d7e, (q15_t)0x51b6, (q15_t)0x9d7a, (q15_t)0x51b1, (q15_t)0x9d76, (q15_t)0x51ac, (q15_t)0x9d72,
+  (q15_t)0x51a8, (q15_t)0x9d6e, (q15_t)0x51a3, (q15_t)0x9d6a, (q15_t)0x519e, (q15_t)0x9d66, (q15_t)0x5199, (q15_t)0x9d62,
+  (q15_t)0x5194, (q15_t)0x9d5e, (q15_t)0x518f, (q15_t)0x9d5a, (q15_t)0x518b, (q15_t)0x9d56, (q15_t)0x5186, (q15_t)0x9d52,
+  (q15_t)0x5181, (q15_t)0x9d4e, (q15_t)0x517c, (q15_t)0x9d4a, (q15_t)0x5177, (q15_t)0x9d46, (q15_t)0x5172, (q15_t)0x9d42,
+  (q15_t)0x516e, (q15_t)0x9d3e, (q15_t)0x5169, (q15_t)0x9d3a, (q15_t)0x5164, (q15_t)0x9d36, (q15_t)0x515f, (q15_t)0x9d32,
+  (q15_t)0x515a, (q15_t)0x9d2e, (q15_t)0x5155, (q15_t)0x9d2a, (q15_t)0x5150, (q15_t)0x9d26, (q15_t)0x514c, (q15_t)0x9d22,
+  (q15_t)0x5147, (q15_t)0x9d1e, (q15_t)0x5142, (q15_t)0x9d1a, (q15_t)0x513d, (q15_t)0x9d16, (q15_t)0x5138, (q15_t)0x9d12,
+  (q15_t)0x5133, (q15_t)0x9d0e, (q15_t)0x512e, (q15_t)0x9d0b, (q15_t)0x512a, (q15_t)0x9d07, (q15_t)0x5125, (q15_t)0x9d03,
+  (q15_t)0x5120, (q15_t)0x9cff, (q15_t)0x511b, (q15_t)0x9cfb, (q15_t)0x5116, (q15_t)0x9cf7, (q15_t)0x5111, (q15_t)0x9cf3,
+  (q15_t)0x510c, (q15_t)0x9cef, (q15_t)0x5108, (q15_t)0x9ceb, (q15_t)0x5103, (q15_t)0x9ce7, (q15_t)0x50fe, (q15_t)0x9ce3,
+  (q15_t)0x50f9, (q15_t)0x9cdf, (q15_t)0x50f4, (q15_t)0x9cdb, (q15_t)0x50ef, (q15_t)0x9cd7, (q15_t)0x50ea, (q15_t)0x9cd3,
+  (q15_t)0x50e5, (q15_t)0x9ccf, (q15_t)0x50e1, (q15_t)0x9ccb, (q15_t)0x50dc, (q15_t)0x9cc7, (q15_t)0x50d7, (q15_t)0x9cc3,
+  (q15_t)0x50d2, (q15_t)0x9cbf, (q15_t)0x50cd, (q15_t)0x9cbb, (q15_t)0x50c8, (q15_t)0x9cb7, (q15_t)0x50c3, (q15_t)0x9cb3,
+  (q15_t)0x50bf, (q15_t)0x9caf, (q15_t)0x50ba, (q15_t)0x9cab, (q15_t)0x50b5, (q15_t)0x9ca7, (q15_t)0x50b0, (q15_t)0x9ca3,
+  (q15_t)0x50ab, (q15_t)0x9c9f, (q15_t)0x50a6, (q15_t)0x9c9b, (q15_t)0x50a1, (q15_t)0x9c97, (q15_t)0x509c, (q15_t)0x9c93,
+  (q15_t)0x5097, (q15_t)0x9c8f, (q15_t)0x5093, (q15_t)0x9c8b, (q15_t)0x508e, (q15_t)0x9c88, (q15_t)0x5089, (q15_t)0x9c84,
+  (q15_t)0x5084, (q15_t)0x9c80, (q15_t)0x507f, (q15_t)0x9c7c, (q15_t)0x507a, (q15_t)0x9c78, (q15_t)0x5075, (q15_t)0x9c74,
+  (q15_t)0x5070, (q15_t)0x9c70, (q15_t)0x506c, (q15_t)0x9c6c, (q15_t)0x5067, (q15_t)0x9c68, (q15_t)0x5062, (q15_t)0x9c64,
+  (q15_t)0x505d, (q15_t)0x9c60, (q15_t)0x5058, (q15_t)0x9c5c, (q15_t)0x5053, (q15_t)0x9c58, (q15_t)0x504e, (q15_t)0x9c54,
+  (q15_t)0x5049, (q15_t)0x9c50, (q15_t)0x5044, (q15_t)0x9c4c, (q15_t)0x503f, (q15_t)0x9c48, (q15_t)0x503b, (q15_t)0x9c44,
+  (q15_t)0x5036, (q15_t)0x9c40, (q15_t)0x5031, (q15_t)0x9c3d, (q15_t)0x502c, (q15_t)0x9c39, (q15_t)0x5027, (q15_t)0x9c35,
+  (q15_t)0x5022, (q15_t)0x9c31, (q15_t)0x501d, (q15_t)0x9c2d, (q15_t)0x5018, (q15_t)0x9c29, (q15_t)0x5013, (q15_t)0x9c25,
+  (q15_t)0x500f, (q15_t)0x9c21, (q15_t)0x500a, (q15_t)0x9c1d, (q15_t)0x5005, (q15_t)0x9c19, (q15_t)0x5000, (q15_t)0x9c15,
+  (q15_t)0x4ffb, (q15_t)0x9c11, (q15_t)0x4ff6, (q15_t)0x9c0d, (q15_t)0x4ff1, (q15_t)0x9c09, (q15_t)0x4fec, (q15_t)0x9c06,
+  (q15_t)0x4fe7, (q15_t)0x9c02, (q15_t)0x4fe2, (q15_t)0x9bfe, (q15_t)0x4fdd, (q15_t)0x9bfa, (q15_t)0x4fd9, (q15_t)0x9bf6,
+  (q15_t)0x4fd4, (q15_t)0x9bf2, (q15_t)0x4fcf, (q15_t)0x9bee, (q15_t)0x4fca, (q15_t)0x9bea, (q15_t)0x4fc5, (q15_t)0x9be6,
+  (q15_t)0x4fc0, (q15_t)0x9be2, (q15_t)0x4fbb, (q15_t)0x9bde, (q15_t)0x4fb6, (q15_t)0x9bda, (q15_t)0x4fb1, (q15_t)0x9bd7,
+  (q15_t)0x4fac, (q15_t)0x9bd3, (q15_t)0x4fa7, (q15_t)0x9bcf, (q15_t)0x4fa2, (q15_t)0x9bcb, (q15_t)0x4f9e, (q15_t)0x9bc7,
+  (q15_t)0x4f99, (q15_t)0x9bc3, (q15_t)0x4f94, (q15_t)0x9bbf, (q15_t)0x4f8f, (q15_t)0x9bbb, (q15_t)0x4f8a, (q15_t)0x9bb7,
+  (q15_t)0x4f85, (q15_t)0x9bb3, (q15_t)0x4f80, (q15_t)0x9baf, (q15_t)0x4f7b, (q15_t)0x9bac, (q15_t)0x4f76, (q15_t)0x9ba8,
+  (q15_t)0x4f71, (q15_t)0x9ba4, (q15_t)0x4f6c, (q15_t)0x9ba0, (q15_t)0x4f67, (q15_t)0x9b9c, (q15_t)0x4f62, (q15_t)0x9b98,
+  (q15_t)0x4f5e, (q15_t)0x9b94, (q15_t)0x4f59, (q15_t)0x9b90, (q15_t)0x4f54, (q15_t)0x9b8c, (q15_t)0x4f4f, (q15_t)0x9b88,
+  (q15_t)0x4f4a, (q15_t)0x9b85, (q15_t)0x4f45, (q15_t)0x9b81, (q15_t)0x4f40, (q15_t)0x9b7d, (q15_t)0x4f3b, (q15_t)0x9b79,
+  (q15_t)0x4f36, (q15_t)0x9b75, (q15_t)0x4f31, (q15_t)0x9b71, (q15_t)0x4f2c, (q15_t)0x9b6d, (q15_t)0x4f27, (q15_t)0x9b69,
+  (q15_t)0x4f22, (q15_t)0x9b65, (q15_t)0x4f1d, (q15_t)0x9b62, (q15_t)0x4f18, (q15_t)0x9b5e, (q15_t)0x4f14, (q15_t)0x9b5a,
+  (q15_t)0x4f0f, (q15_t)0x9b56, (q15_t)0x4f0a, (q15_t)0x9b52, (q15_t)0x4f05, (q15_t)0x9b4e, (q15_t)0x4f00, (q15_t)0x9b4a,
+  (q15_t)0x4efb, (q15_t)0x9b46, (q15_t)0x4ef6, (q15_t)0x9b43, (q15_t)0x4ef1, (q15_t)0x9b3f, (q15_t)0x4eec, (q15_t)0x9b3b,
+  (q15_t)0x4ee7, (q15_t)0x9b37, (q15_t)0x4ee2, (q15_t)0x9b33, (q15_t)0x4edd, (q15_t)0x9b2f, (q15_t)0x4ed8, (q15_t)0x9b2b,
+  (q15_t)0x4ed3, (q15_t)0x9b27, (q15_t)0x4ece, (q15_t)0x9b24, (q15_t)0x4ec9, (q15_t)0x9b20, (q15_t)0x4ec4, (q15_t)0x9b1c,
+  (q15_t)0x4ebf, (q15_t)0x9b18, (q15_t)0x4eba, (q15_t)0x9b14, (q15_t)0x4eb6, (q15_t)0x9b10, (q15_t)0x4eb1, (q15_t)0x9b0c,
+  (q15_t)0x4eac, (q15_t)0x9b09, (q15_t)0x4ea7, (q15_t)0x9b05, (q15_t)0x4ea2, (q15_t)0x9b01, (q15_t)0x4e9d, (q15_t)0x9afd,
+  (q15_t)0x4e98, (q15_t)0x9af9, (q15_t)0x4e93, (q15_t)0x9af5, (q15_t)0x4e8e, (q15_t)0x9af1, (q15_t)0x4e89, (q15_t)0x9aed,
+  (q15_t)0x4e84, (q15_t)0x9aea, (q15_t)0x4e7f, (q15_t)0x9ae6, (q15_t)0x4e7a, (q15_t)0x9ae2, (q15_t)0x4e75, (q15_t)0x9ade,
+  (q15_t)0x4e70, (q15_t)0x9ada, (q15_t)0x4e6b, (q15_t)0x9ad6, (q15_t)0x4e66, (q15_t)0x9ad3, (q15_t)0x4e61, (q15_t)0x9acf,
+  (q15_t)0x4e5c, (q15_t)0x9acb, (q15_t)0x4e57, (q15_t)0x9ac7, (q15_t)0x4e52, (q15_t)0x9ac3, (q15_t)0x4e4d, (q15_t)0x9abf,
+  (q15_t)0x4e48, (q15_t)0x9abb, (q15_t)0x4e43, (q15_t)0x9ab8, (q15_t)0x4e3e, (q15_t)0x9ab4, (q15_t)0x4e39, (q15_t)0x9ab0,
+  (q15_t)0x4e34, (q15_t)0x9aac, (q15_t)0x4e2f, (q15_t)0x9aa8, (q15_t)0x4e2a, (q15_t)0x9aa4, (q15_t)0x4e26, (q15_t)0x9aa1,
+  (q15_t)0x4e21, (q15_t)0x9a9d, (q15_t)0x4e1c, (q15_t)0x9a99, (q15_t)0x4e17, (q15_t)0x9a95, (q15_t)0x4e12, (q15_t)0x9a91,
+  (q15_t)0x4e0d, (q15_t)0x9a8d, (q15_t)0x4e08, (q15_t)0x9a8a, (q15_t)0x4e03, (q15_t)0x9a86, (q15_t)0x4dfe, (q15_t)0x9a82,
+  (q15_t)0x4df9, (q15_t)0x9a7e, (q15_t)0x4df4, (q15_t)0x9a7a, (q15_t)0x4def, (q15_t)0x9a76, (q15_t)0x4dea, (q15_t)0x9a73,
+  (q15_t)0x4de5, (q15_t)0x9a6f, (q15_t)0x4de0, (q15_t)0x9a6b, (q15_t)0x4ddb, (q15_t)0x9a67, (q15_t)0x4dd6, (q15_t)0x9a63,
+  (q15_t)0x4dd1, (q15_t)0x9a60, (q15_t)0x4dcc, (q15_t)0x9a5c, (q15_t)0x4dc7, (q15_t)0x9a58, (q15_t)0x4dc2, (q15_t)0x9a54,
+  (q15_t)0x4dbd, (q15_t)0x9a50, (q15_t)0x4db8, (q15_t)0x9a4c, (q15_t)0x4db3, (q15_t)0x9a49, (q15_t)0x4dae, (q15_t)0x9a45,
+  (q15_t)0x4da9, (q15_t)0x9a41, (q15_t)0x4da4, (q15_t)0x9a3d, (q15_t)0x4d9f, (q15_t)0x9a39, (q15_t)0x4d9a, (q15_t)0x9a36,
+  (q15_t)0x4d95, (q15_t)0x9a32, (q15_t)0x4d90, (q15_t)0x9a2e, (q15_t)0x4d8b, (q15_t)0x9a2a, (q15_t)0x4d86, (q15_t)0x9a26,
+  (q15_t)0x4d81, (q15_t)0x9a23, (q15_t)0x4d7c, (q15_t)0x9a1f, (q15_t)0x4d77, (q15_t)0x9a1b, (q15_t)0x4d72, (q15_t)0x9a17,
+  (q15_t)0x4d6d, (q15_t)0x9a13, (q15_t)0x4d68, (q15_t)0x9a10, (q15_t)0x4d63, (q15_t)0x9a0c, (q15_t)0x4d5e, (q15_t)0x9a08,
+  (q15_t)0x4d59, (q15_t)0x9a04, (q15_t)0x4d54, (q15_t)0x9a00, (q15_t)0x4d4f, (q15_t)0x99fd, (q15_t)0x4d4a, (q15_t)0x99f9,
+  (q15_t)0x4d45, (q15_t)0x99f5, (q15_t)0x4d40, (q15_t)0x99f1, (q15_t)0x4d3b, (q15_t)0x99ed, (q15_t)0x4d36, (q15_t)0x99ea,
+  (q15_t)0x4d31, (q15_t)0x99e6, (q15_t)0x4d2c, (q15_t)0x99e2, (q15_t)0x4d27, (q15_t)0x99de, (q15_t)0x4d22, (q15_t)0x99da,
+  (q15_t)0x4d1d, (q15_t)0x99d7, (q15_t)0x4d18, (q15_t)0x99d3, (q15_t)0x4d13, (q15_t)0x99cf, (q15_t)0x4d0e, (q15_t)0x99cb,
+  (q15_t)0x4d09, (q15_t)0x99c7, (q15_t)0x4d04, (q15_t)0x99c4, (q15_t)0x4cff, (q15_t)0x99c0, (q15_t)0x4cfa, (q15_t)0x99bc,
+  (q15_t)0x4cf5, (q15_t)0x99b8, (q15_t)0x4cf0, (q15_t)0x99b5, (q15_t)0x4ceb, (q15_t)0x99b1, (q15_t)0x4ce6, (q15_t)0x99ad,
+  (q15_t)0x4ce1, (q15_t)0x99a9, (q15_t)0x4cdb, (q15_t)0x99a5, (q15_t)0x4cd6, (q15_t)0x99a2, (q15_t)0x4cd1, (q15_t)0x999e,
+  (q15_t)0x4ccc, (q15_t)0x999a, (q15_t)0x4cc7, (q15_t)0x9996, (q15_t)0x4cc2, (q15_t)0x9993, (q15_t)0x4cbd, (q15_t)0x998f,
+  (q15_t)0x4cb8, (q15_t)0x998b, (q15_t)0x4cb3, (q15_t)0x9987, (q15_t)0x4cae, (q15_t)0x9984, (q15_t)0x4ca9, (q15_t)0x9980,
+  (q15_t)0x4ca4, (q15_t)0x997c, (q15_t)0x4c9f, (q15_t)0x9978, (q15_t)0x4c9a, (q15_t)0x9975, (q15_t)0x4c95, (q15_t)0x9971,
+  (q15_t)0x4c90, (q15_t)0x996d, (q15_t)0x4c8b, (q15_t)0x9969, (q15_t)0x4c86, (q15_t)0x9965, (q15_t)0x4c81, (q15_t)0x9962,
+  (q15_t)0x4c7c, (q15_t)0x995e, (q15_t)0x4c77, (q15_t)0x995a, (q15_t)0x4c72, (q15_t)0x9956, (q15_t)0x4c6d, (q15_t)0x9953,
+  (q15_t)0x4c68, (q15_t)0x994f, (q15_t)0x4c63, (q15_t)0x994b, (q15_t)0x4c5e, (q15_t)0x9947, (q15_t)0x4c59, (q15_t)0x9944,
+  (q15_t)0x4c54, (q15_t)0x9940, (q15_t)0x4c4f, (q15_t)0x993c, (q15_t)0x4c49, (q15_t)0x9938, (q15_t)0x4c44, (q15_t)0x9935,
+  (q15_t)0x4c3f, (q15_t)0x9931, (q15_t)0x4c3a, (q15_t)0x992d, (q15_t)0x4c35, (q15_t)0x992a, (q15_t)0x4c30, (q15_t)0x9926,
+  (q15_t)0x4c2b, (q15_t)0x9922, (q15_t)0x4c26, (q15_t)0x991e, (q15_t)0x4c21, (q15_t)0x991b, (q15_t)0x4c1c, (q15_t)0x9917,
+  (q15_t)0x4c17, (q15_t)0x9913, (q15_t)0x4c12, (q15_t)0x990f, (q15_t)0x4c0d, (q15_t)0x990c, (q15_t)0x4c08, (q15_t)0x9908,
+  (q15_t)0x4c03, (q15_t)0x9904, (q15_t)0x4bfe, (q15_t)0x9900, (q15_t)0x4bf9, (q15_t)0x98fd, (q15_t)0x4bf4, (q15_t)0x98f9,
+  (q15_t)0x4bef, (q15_t)0x98f5, (q15_t)0x4be9, (q15_t)0x98f2, (q15_t)0x4be4, (q15_t)0x98ee, (q15_t)0x4bdf, (q15_t)0x98ea,
+  (q15_t)0x4bda, (q15_t)0x98e6, (q15_t)0x4bd5, (q15_t)0x98e3, (q15_t)0x4bd0, (q15_t)0x98df, (q15_t)0x4bcb, (q15_t)0x98db,
+  (q15_t)0x4bc6, (q15_t)0x98d7, (q15_t)0x4bc1, (q15_t)0x98d4, (q15_t)0x4bbc, (q15_t)0x98d0, (q15_t)0x4bb7, (q15_t)0x98cc,
+  (q15_t)0x4bb2, (q15_t)0x98c9, (q15_t)0x4bad, (q15_t)0x98c5, (q15_t)0x4ba8, (q15_t)0x98c1, (q15_t)0x4ba3, (q15_t)0x98bd,
+  (q15_t)0x4b9e, (q15_t)0x98ba, (q15_t)0x4b98, (q15_t)0x98b6, (q15_t)0x4b93, (q15_t)0x98b2, (q15_t)0x4b8e, (q15_t)0x98af,
+  (q15_t)0x4b89, (q15_t)0x98ab, (q15_t)0x4b84, (q15_t)0x98a7, (q15_t)0x4b7f, (q15_t)0x98a3, (q15_t)0x4b7a, (q15_t)0x98a0,
+  (q15_t)0x4b75, (q15_t)0x989c, (q15_t)0x4b70, (q15_t)0x9898, (q15_t)0x4b6b, (q15_t)0x9895, (q15_t)0x4b66, (q15_t)0x9891,
+  (q15_t)0x4b61, (q15_t)0x988d, (q15_t)0x4b5c, (q15_t)0x988a, (q15_t)0x4b56, (q15_t)0x9886, (q15_t)0x4b51, (q15_t)0x9882,
+  (q15_t)0x4b4c, (q15_t)0x987e, (q15_t)0x4b47, (q15_t)0x987b, (q15_t)0x4b42, (q15_t)0x9877, (q15_t)0x4b3d, (q15_t)0x9873,
+  (q15_t)0x4b38, (q15_t)0x9870, (q15_t)0x4b33, (q15_t)0x986c, (q15_t)0x4b2e, (q15_t)0x9868, (q15_t)0x4b29, (q15_t)0x9865,
+  (q15_t)0x4b24, (q15_t)0x9861, (q15_t)0x4b1f, (q15_t)0x985d, (q15_t)0x4b19, (q15_t)0x985a, (q15_t)0x4b14, (q15_t)0x9856,
+  (q15_t)0x4b0f, (q15_t)0x9852, (q15_t)0x4b0a, (q15_t)0x984e, (q15_t)0x4b05, (q15_t)0x984b, (q15_t)0x4b00, (q15_t)0x9847,
+  (q15_t)0x4afb, (q15_t)0x9843, (q15_t)0x4af6, (q15_t)0x9840, (q15_t)0x4af1, (q15_t)0x983c, (q15_t)0x4aec, (q15_t)0x9838,
+  (q15_t)0x4ae7, (q15_t)0x9835, (q15_t)0x4ae1, (q15_t)0x9831, (q15_t)0x4adc, (q15_t)0x982d, (q15_t)0x4ad7, (q15_t)0x982a,
+  (q15_t)0x4ad2, (q15_t)0x9826, (q15_t)0x4acd, (q15_t)0x9822, (q15_t)0x4ac8, (q15_t)0x981f, (q15_t)0x4ac3, (q15_t)0x981b,
+  (q15_t)0x4abe, (q15_t)0x9817, (q15_t)0x4ab9, (q15_t)0x9814, (q15_t)0x4ab4, (q15_t)0x9810, (q15_t)0x4aae, (q15_t)0x980c,
+  (q15_t)0x4aa9, (q15_t)0x9809, (q15_t)0x4aa4, (q15_t)0x9805, (q15_t)0x4a9f, (q15_t)0x9801, (q15_t)0x4a9a, (q15_t)0x97fe,
+  (q15_t)0x4a95, (q15_t)0x97fa, (q15_t)0x4a90, (q15_t)0x97f6, (q15_t)0x4a8b, (q15_t)0x97f3, (q15_t)0x4a86, (q15_t)0x97ef,
+  (q15_t)0x4a81, (q15_t)0x97eb, (q15_t)0x4a7b, (q15_t)0x97e8, (q15_t)0x4a76, (q15_t)0x97e4, (q15_t)0x4a71, (q15_t)0x97e0,
+  (q15_t)0x4a6c, (q15_t)0x97dd, (q15_t)0x4a67, (q15_t)0x97d9, (q15_t)0x4a62, (q15_t)0x97d5, (q15_t)0x4a5d, (q15_t)0x97d2,
+  (q15_t)0x4a58, (q15_t)0x97ce, (q15_t)0x4a52, (q15_t)0x97cb, (q15_t)0x4a4d, (q15_t)0x97c7, (q15_t)0x4a48, (q15_t)0x97c3,
+  (q15_t)0x4a43, (q15_t)0x97c0, (q15_t)0x4a3e, (q15_t)0x97bc, (q15_t)0x4a39, (q15_t)0x97b8, (q15_t)0x4a34, (q15_t)0x97b5,
+  (q15_t)0x4a2f, (q15_t)0x97b1, (q15_t)0x4a2a, (q15_t)0x97ad, (q15_t)0x4a24, (q15_t)0x97aa, (q15_t)0x4a1f, (q15_t)0x97a6,
+  (q15_t)0x4a1a, (q15_t)0x97a2, (q15_t)0x4a15, (q15_t)0x979f, (q15_t)0x4a10, (q15_t)0x979b, (q15_t)0x4a0b, (q15_t)0x9798,
+  (q15_t)0x4a06, (q15_t)0x9794, (q15_t)0x4a01, (q15_t)0x9790, (q15_t)0x49fb, (q15_t)0x978d, (q15_t)0x49f6, (q15_t)0x9789,
+  (q15_t)0x49f1, (q15_t)0x9785, (q15_t)0x49ec, (q15_t)0x9782, (q15_t)0x49e7, (q15_t)0x977e, (q15_t)0x49e2, (q15_t)0x977a,
+  (q15_t)0x49dd, (q15_t)0x9777, (q15_t)0x49d8, (q15_t)0x9773, (q15_t)0x49d2, (q15_t)0x9770, (q15_t)0x49cd, (q15_t)0x976c,
+  (q15_t)0x49c8, (q15_t)0x9768, (q15_t)0x49c3, (q15_t)0x9765, (q15_t)0x49be, (q15_t)0x9761, (q15_t)0x49b9, (q15_t)0x975d,
+  (q15_t)0x49b4, (q15_t)0x975a, (q15_t)0x49ae, (q15_t)0x9756, (q15_t)0x49a9, (q15_t)0x9753, (q15_t)0x49a4, (q15_t)0x974f,
+  (q15_t)0x499f, (q15_t)0x974b, (q15_t)0x499a, (q15_t)0x9748, (q15_t)0x4995, (q15_t)0x9744, (q15_t)0x4990, (q15_t)0x9741,
+  (q15_t)0x498a, (q15_t)0x973d, (q15_t)0x4985, (q15_t)0x9739, (q15_t)0x4980, (q15_t)0x9736, (q15_t)0x497b, (q15_t)0x9732,
+  (q15_t)0x4976, (q15_t)0x972f, (q15_t)0x4971, (q15_t)0x972b, (q15_t)0x496c, (q15_t)0x9727, (q15_t)0x4966, (q15_t)0x9724,
+  (q15_t)0x4961, (q15_t)0x9720, (q15_t)0x495c, (q15_t)0x971d, (q15_t)0x4957, (q15_t)0x9719, (q15_t)0x4952, (q15_t)0x9715,
+  (q15_t)0x494d, (q15_t)0x9712, (q15_t)0x4948, (q15_t)0x970e, (q15_t)0x4942, (q15_t)0x970b, (q15_t)0x493d, (q15_t)0x9707,
+  (q15_t)0x4938, (q15_t)0x9703, (q15_t)0x4933, (q15_t)0x9700, (q15_t)0x492e, (q15_t)0x96fc, (q15_t)0x4929, (q15_t)0x96f9,
+  (q15_t)0x4923, (q15_t)0x96f5, (q15_t)0x491e, (q15_t)0x96f1, (q15_t)0x4919, (q15_t)0x96ee, (q15_t)0x4914, (q15_t)0x96ea,
+  (q15_t)0x490f, (q15_t)0x96e7, (q15_t)0x490a, (q15_t)0x96e3, (q15_t)0x4905, (q15_t)0x96df, (q15_t)0x48ff, (q15_t)0x96dc,
+  (q15_t)0x48fa, (q15_t)0x96d8, (q15_t)0x48f5, (q15_t)0x96d5, (q15_t)0x48f0, (q15_t)0x96d1, (q15_t)0x48eb, (q15_t)0x96ce,
+  (q15_t)0x48e6, (q15_t)0x96ca, (q15_t)0x48e0, (q15_t)0x96c6, (q15_t)0x48db, (q15_t)0x96c3, (q15_t)0x48d6, (q15_t)0x96bf,
+  (q15_t)0x48d1, (q15_t)0x96bc, (q15_t)0x48cc, (q15_t)0x96b8, (q15_t)0x48c7, (q15_t)0x96b5, (q15_t)0x48c1, (q15_t)0x96b1,
+  (q15_t)0x48bc, (q15_t)0x96ad, (q15_t)0x48b7, (q15_t)0x96aa, (q15_t)0x48b2, (q15_t)0x96a6, (q15_t)0x48ad, (q15_t)0x96a3,
+  (q15_t)0x48a8, (q15_t)0x969f, (q15_t)0x48a2, (q15_t)0x969c, (q15_t)0x489d, (q15_t)0x9698, (q15_t)0x4898, (q15_t)0x9694,
+  (q15_t)0x4893, (q15_t)0x9691, (q15_t)0x488e, (q15_t)0x968d, (q15_t)0x4888, (q15_t)0x968a, (q15_t)0x4883, (q15_t)0x9686,
+  (q15_t)0x487e, (q15_t)0x9683, (q15_t)0x4879, (q15_t)0x967f, (q15_t)0x4874, (q15_t)0x967b, (q15_t)0x486f, (q15_t)0x9678,
+  (q15_t)0x4869, (q15_t)0x9674, (q15_t)0x4864, (q15_t)0x9671, (q15_t)0x485f, (q15_t)0x966d, (q15_t)0x485a, (q15_t)0x966a,
+  (q15_t)0x4855, (q15_t)0x9666, (q15_t)0x484f, (q15_t)0x9663, (q15_t)0x484a, (q15_t)0x965f, (q15_t)0x4845, (q15_t)0x965b,
+  (q15_t)0x4840, (q15_t)0x9658, (q15_t)0x483b, (q15_t)0x9654, (q15_t)0x4836, (q15_t)0x9651, (q15_t)0x4830, (q15_t)0x964d,
+  (q15_t)0x482b, (q15_t)0x964a, (q15_t)0x4826, (q15_t)0x9646, (q15_t)0x4821, (q15_t)0x9643, (q15_t)0x481c, (q15_t)0x963f,
+  (q15_t)0x4816, (q15_t)0x963c, (q15_t)0x4811, (q15_t)0x9638, (q15_t)0x480c, (q15_t)0x9635, (q15_t)0x4807, (q15_t)0x9631,
+  (q15_t)0x4802, (q15_t)0x962d, (q15_t)0x47fc, (q15_t)0x962a, (q15_t)0x47f7, (q15_t)0x9626, (q15_t)0x47f2, (q15_t)0x9623,
+  (q15_t)0x47ed, (q15_t)0x961f, (q15_t)0x47e8, (q15_t)0x961c, (q15_t)0x47e2, (q15_t)0x9618, (q15_t)0x47dd, (q15_t)0x9615,
+  (q15_t)0x47d8, (q15_t)0x9611, (q15_t)0x47d3, (q15_t)0x960e, (q15_t)0x47ce, (q15_t)0x960a, (q15_t)0x47c8, (q15_t)0x9607,
+  (q15_t)0x47c3, (q15_t)0x9603, (q15_t)0x47be, (q15_t)0x9600, (q15_t)0x47b9, (q15_t)0x95fc, (q15_t)0x47b4, (q15_t)0x95f9,
+  (q15_t)0x47ae, (q15_t)0x95f5, (q15_t)0x47a9, (q15_t)0x95f2, (q15_t)0x47a4, (q15_t)0x95ee, (q15_t)0x479f, (q15_t)0x95ea,
+  (q15_t)0x479a, (q15_t)0x95e7, (q15_t)0x4794, (q15_t)0x95e3, (q15_t)0x478f, (q15_t)0x95e0, (q15_t)0x478a, (q15_t)0x95dc,
+  (q15_t)0x4785, (q15_t)0x95d9, (q15_t)0x4780, (q15_t)0x95d5, (q15_t)0x477a, (q15_t)0x95d2, (q15_t)0x4775, (q15_t)0x95ce,
+  (q15_t)0x4770, (q15_t)0x95cb, (q15_t)0x476b, (q15_t)0x95c7, (q15_t)0x4765, (q15_t)0x95c4, (q15_t)0x4760, (q15_t)0x95c0,
+  (q15_t)0x475b, (q15_t)0x95bd, (q15_t)0x4756, (q15_t)0x95b9, (q15_t)0x4751, (q15_t)0x95b6, (q15_t)0x474b, (q15_t)0x95b2,
+  (q15_t)0x4746, (q15_t)0x95af, (q15_t)0x4741, (q15_t)0x95ab, (q15_t)0x473c, (q15_t)0x95a8, (q15_t)0x4737, (q15_t)0x95a4,
+  (q15_t)0x4731, (q15_t)0x95a1, (q15_t)0x472c, (q15_t)0x959d, (q15_t)0x4727, (q15_t)0x959a, (q15_t)0x4722, (q15_t)0x9596,
+  (q15_t)0x471c, (q15_t)0x9593, (q15_t)0x4717, (q15_t)0x958f, (q15_t)0x4712, (q15_t)0x958c, (q15_t)0x470d, (q15_t)0x9588,
+  (q15_t)0x4708, (q15_t)0x9585, (q15_t)0x4702, (q15_t)0x9581, (q15_t)0x46fd, (q15_t)0x957e, (q15_t)0x46f8, (q15_t)0x957a,
+  (q15_t)0x46f3, (q15_t)0x9577, (q15_t)0x46ed, (q15_t)0x9574, (q15_t)0x46e8, (q15_t)0x9570, (q15_t)0x46e3, (q15_t)0x956d,
+  (q15_t)0x46de, (q15_t)0x9569, (q15_t)0x46d8, (q15_t)0x9566, (q15_t)0x46d3, (q15_t)0x9562, (q15_t)0x46ce, (q15_t)0x955f,
+  (q15_t)0x46c9, (q15_t)0x955b, (q15_t)0x46c4, (q15_t)0x9558, (q15_t)0x46be, (q15_t)0x9554, (q15_t)0x46b9, (q15_t)0x9551,
+  (q15_t)0x46b4, (q15_t)0x954d, (q15_t)0x46af, (q15_t)0x954a, (q15_t)0x46a9, (q15_t)0x9546, (q15_t)0x46a4, (q15_t)0x9543,
+  (q15_t)0x469f, (q15_t)0x953f, (q15_t)0x469a, (q15_t)0x953c, (q15_t)0x4694, (q15_t)0x9538, (q15_t)0x468f, (q15_t)0x9535,
+  (q15_t)0x468a, (q15_t)0x9532, (q15_t)0x4685, (q15_t)0x952e, (q15_t)0x467f, (q15_t)0x952b, (q15_t)0x467a, (q15_t)0x9527,
+  (q15_t)0x4675, (q15_t)0x9524, (q15_t)0x4670, (q15_t)0x9520, (q15_t)0x466a, (q15_t)0x951d, (q15_t)0x4665, (q15_t)0x9519,
+  (q15_t)0x4660, (q15_t)0x9516, (q15_t)0x465b, (q15_t)0x9512, (q15_t)0x4655, (q15_t)0x950f, (q15_t)0x4650, (q15_t)0x950c,
+  (q15_t)0x464b, (q15_t)0x9508, (q15_t)0x4646, (q15_t)0x9505, (q15_t)0x4640, (q15_t)0x9501, (q15_t)0x463b, (q15_t)0x94fe,
+  (q15_t)0x4636, (q15_t)0x94fa, (q15_t)0x4631, (q15_t)0x94f7, (q15_t)0x462b, (q15_t)0x94f3, (q15_t)0x4626, (q15_t)0x94f0,
+  (q15_t)0x4621, (q15_t)0x94ed, (q15_t)0x461c, (q15_t)0x94e9, (q15_t)0x4616, (q15_t)0x94e6, (q15_t)0x4611, (q15_t)0x94e2,
+  (q15_t)0x460c, (q15_t)0x94df, (q15_t)0x4607, (q15_t)0x94db, (q15_t)0x4601, (q15_t)0x94d8, (q15_t)0x45fc, (q15_t)0x94d4,
+  (q15_t)0x45f7, (q15_t)0x94d1, (q15_t)0x45f2, (q15_t)0x94ce, (q15_t)0x45ec, (q15_t)0x94ca, (q15_t)0x45e7, (q15_t)0x94c7,
+  (q15_t)0x45e2, (q15_t)0x94c3, (q15_t)0x45dd, (q15_t)0x94c0, (q15_t)0x45d7, (q15_t)0x94bc, (q15_t)0x45d2, (q15_t)0x94b9,
+  (q15_t)0x45cd, (q15_t)0x94b6, (q15_t)0x45c7, (q15_t)0x94b2, (q15_t)0x45c2, (q15_t)0x94af, (q15_t)0x45bd, (q15_t)0x94ab,
+  (q15_t)0x45b8, (q15_t)0x94a8, (q15_t)0x45b2, (q15_t)0x94a4, (q15_t)0x45ad, (q15_t)0x94a1, (q15_t)0x45a8, (q15_t)0x949e,
+  (q15_t)0x45a3, (q15_t)0x949a, (q15_t)0x459d, (q15_t)0x9497, (q15_t)0x4598, (q15_t)0x9493, (q15_t)0x4593, (q15_t)0x9490,
+  (q15_t)0x458d, (q15_t)0x948d, (q15_t)0x4588, (q15_t)0x9489, (q15_t)0x4583, (q15_t)0x9486, (q15_t)0x457e, (q15_t)0x9482,
+  (q15_t)0x4578, (q15_t)0x947f, (q15_t)0x4573, (q15_t)0x947b, (q15_t)0x456e, (q15_t)0x9478, (q15_t)0x4569, (q15_t)0x9475,
+  (q15_t)0x4563, (q15_t)0x9471, (q15_t)0x455e, (q15_t)0x946e, (q15_t)0x4559, (q15_t)0x946a, (q15_t)0x4553, (q15_t)0x9467,
+  (q15_t)0x454e, (q15_t)0x9464, (q15_t)0x4549, (q15_t)0x9460, (q15_t)0x4544, (q15_t)0x945d, (q15_t)0x453e, (q15_t)0x9459,
+  (q15_t)0x4539, (q15_t)0x9456, (q15_t)0x4534, (q15_t)0x9453, (q15_t)0x452e, (q15_t)0x944f, (q15_t)0x4529, (q15_t)0x944c,
+  (q15_t)0x4524, (q15_t)0x9448, (q15_t)0x451f, (q15_t)0x9445, (q15_t)0x4519, (q15_t)0x9442, (q15_t)0x4514, (q15_t)0x943e,
+  (q15_t)0x450f, (q15_t)0x943b, (q15_t)0x4509, (q15_t)0x9437, (q15_t)0x4504, (q15_t)0x9434, (q15_t)0x44ff, (q15_t)0x9431,
+  (q15_t)0x44fa, (q15_t)0x942d, (q15_t)0x44f4, (q15_t)0x942a, (q15_t)0x44ef, (q15_t)0x9427, (q15_t)0x44ea, (q15_t)0x9423,
+  (q15_t)0x44e4, (q15_t)0x9420, (q15_t)0x44df, (q15_t)0x941c, (q15_t)0x44da, (q15_t)0x9419, (q15_t)0x44d4, (q15_t)0x9416,
+  (q15_t)0x44cf, (q15_t)0x9412, (q15_t)0x44ca, (q15_t)0x940f, (q15_t)0x44c5, (q15_t)0x940b, (q15_t)0x44bf, (q15_t)0x9408,
+  (q15_t)0x44ba, (q15_t)0x9405, (q15_t)0x44b5, (q15_t)0x9401, (q15_t)0x44af, (q15_t)0x93fe, (q15_t)0x44aa, (q15_t)0x93fb,
+  (q15_t)0x44a5, (q15_t)0x93f7, (q15_t)0x449f, (q15_t)0x93f4, (q15_t)0x449a, (q15_t)0x93f1, (q15_t)0x4495, (q15_t)0x93ed,
+  (q15_t)0x4490, (q15_t)0x93ea, (q15_t)0x448a, (q15_t)0x93e6, (q15_t)0x4485, (q15_t)0x93e3, (q15_t)0x4480, (q15_t)0x93e0,
+  (q15_t)0x447a, (q15_t)0x93dc, (q15_t)0x4475, (q15_t)0x93d9, (q15_t)0x4470, (q15_t)0x93d6, (q15_t)0x446a, (q15_t)0x93d2,
+  (q15_t)0x4465, (q15_t)0x93cf, (q15_t)0x4460, (q15_t)0x93cc, (q15_t)0x445a, (q15_t)0x93c8, (q15_t)0x4455, (q15_t)0x93c5,
+  (q15_t)0x4450, (q15_t)0x93c1, (q15_t)0x444b, (q15_t)0x93be, (q15_t)0x4445, (q15_t)0x93bb, (q15_t)0x4440, (q15_t)0x93b7,
+  (q15_t)0x443b, (q15_t)0x93b4, (q15_t)0x4435, (q15_t)0x93b1, (q15_t)0x4430, (q15_t)0x93ad, (q15_t)0x442b, (q15_t)0x93aa,
+  (q15_t)0x4425, (q15_t)0x93a7, (q15_t)0x4420, (q15_t)0x93a3, (q15_t)0x441b, (q15_t)0x93a0, (q15_t)0x4415, (q15_t)0x939d,
+  (q15_t)0x4410, (q15_t)0x9399, (q15_t)0x440b, (q15_t)0x9396, (q15_t)0x4405, (q15_t)0x9393, (q15_t)0x4400, (q15_t)0x938f,
+  (q15_t)0x43fb, (q15_t)0x938c, (q15_t)0x43f5, (q15_t)0x9389, (q15_t)0x43f0, (q15_t)0x9385, (q15_t)0x43eb, (q15_t)0x9382,
+  (q15_t)0x43e5, (q15_t)0x937f, (q15_t)0x43e0, (q15_t)0x937b, (q15_t)0x43db, (q15_t)0x9378, (q15_t)0x43d5, (q15_t)0x9375,
+  (q15_t)0x43d0, (q15_t)0x9371, (q15_t)0x43cb, (q15_t)0x936e, (q15_t)0x43c5, (q15_t)0x936b, (q15_t)0x43c0, (q15_t)0x9367,
+  (q15_t)0x43bb, (q15_t)0x9364, (q15_t)0x43b5, (q15_t)0x9361, (q15_t)0x43b0, (q15_t)0x935d, (q15_t)0x43ab, (q15_t)0x935a,
+  (q15_t)0x43a5, (q15_t)0x9357, (q15_t)0x43a0, (q15_t)0x9353, (q15_t)0x439b, (q15_t)0x9350, (q15_t)0x4395, (q15_t)0x934d,
+  (q15_t)0x4390, (q15_t)0x9349, (q15_t)0x438b, (q15_t)0x9346, (q15_t)0x4385, (q15_t)0x9343, (q15_t)0x4380, (q15_t)0x933f,
+  (q15_t)0x437b, (q15_t)0x933c, (q15_t)0x4375, (q15_t)0x9339, (q15_t)0x4370, (q15_t)0x9336, (q15_t)0x436b, (q15_t)0x9332,
+  (q15_t)0x4365, (q15_t)0x932f, (q15_t)0x4360, (q15_t)0x932c, (q15_t)0x435b, (q15_t)0x9328, (q15_t)0x4355, (q15_t)0x9325,
+  (q15_t)0x4350, (q15_t)0x9322, (q15_t)0x434b, (q15_t)0x931e, (q15_t)0x4345, (q15_t)0x931b, (q15_t)0x4340, (q15_t)0x9318,
+  (q15_t)0x433b, (q15_t)0x9314, (q15_t)0x4335, (q15_t)0x9311, (q15_t)0x4330, (q15_t)0x930e, (q15_t)0x432b, (q15_t)0x930b,
+  (q15_t)0x4325, (q15_t)0x9307, (q15_t)0x4320, (q15_t)0x9304, (q15_t)0x431b, (q15_t)0x9301, (q15_t)0x4315, (q15_t)0x92fd,
+  (q15_t)0x4310, (q15_t)0x92fa, (q15_t)0x430b, (q15_t)0x92f7, (q15_t)0x4305, (q15_t)0x92f4, (q15_t)0x4300, (q15_t)0x92f0,
+  (q15_t)0x42fa, (q15_t)0x92ed, (q15_t)0x42f5, (q15_t)0x92ea, (q15_t)0x42f0, (q15_t)0x92e6, (q15_t)0x42ea, (q15_t)0x92e3,
+  (q15_t)0x42e5, (q15_t)0x92e0, (q15_t)0x42e0, (q15_t)0x92dd, (q15_t)0x42da, (q15_t)0x92d9, (q15_t)0x42d5, (q15_t)0x92d6,
+  (q15_t)0x42d0, (q15_t)0x92d3, (q15_t)0x42ca, (q15_t)0x92cf, (q15_t)0x42c5, (q15_t)0x92cc, (q15_t)0x42c0, (q15_t)0x92c9,
+  (q15_t)0x42ba, (q15_t)0x92c6, (q15_t)0x42b5, (q15_t)0x92c2, (q15_t)0x42af, (q15_t)0x92bf, (q15_t)0x42aa, (q15_t)0x92bc,
+  (q15_t)0x42a5, (q15_t)0x92b8, (q15_t)0x429f, (q15_t)0x92b5, (q15_t)0x429a, (q15_t)0x92b2, (q15_t)0x4295, (q15_t)0x92af,
+  (q15_t)0x428f, (q15_t)0x92ab, (q15_t)0x428a, (q15_t)0x92a8, (q15_t)0x4284, (q15_t)0x92a5, (q15_t)0x427f, (q15_t)0x92a2,
+  (q15_t)0x427a, (q15_t)0x929e, (q15_t)0x4274, (q15_t)0x929b, (q15_t)0x426f, (q15_t)0x9298, (q15_t)0x426a, (q15_t)0x9295,
+  (q15_t)0x4264, (q15_t)0x9291, (q15_t)0x425f, (q15_t)0x928e, (q15_t)0x425a, (q15_t)0x928b, (q15_t)0x4254, (q15_t)0x9288,
+  (q15_t)0x424f, (q15_t)0x9284, (q15_t)0x4249, (q15_t)0x9281, (q15_t)0x4244, (q15_t)0x927e, (q15_t)0x423f, (q15_t)0x927b,
+  (q15_t)0x4239, (q15_t)0x9277, (q15_t)0x4234, (q15_t)0x9274, (q15_t)0x422f, (q15_t)0x9271, (q15_t)0x4229, (q15_t)0x926e,
+  (q15_t)0x4224, (q15_t)0x926a, (q15_t)0x421e, (q15_t)0x9267, (q15_t)0x4219, (q15_t)0x9264, (q15_t)0x4214, (q15_t)0x9261,
+  (q15_t)0x420e, (q15_t)0x925d, (q15_t)0x4209, (q15_t)0x925a, (q15_t)0x4203, (q15_t)0x9257, (q15_t)0x41fe, (q15_t)0x9254,
+  (q15_t)0x41f9, (q15_t)0x9250, (q15_t)0x41f3, (q15_t)0x924d, (q15_t)0x41ee, (q15_t)0x924a, (q15_t)0x41e9, (q15_t)0x9247,
+  (q15_t)0x41e3, (q15_t)0x9243, (q15_t)0x41de, (q15_t)0x9240, (q15_t)0x41d8, (q15_t)0x923d, (q15_t)0x41d3, (q15_t)0x923a,
+  (q15_t)0x41ce, (q15_t)0x9236, (q15_t)0x41c8, (q15_t)0x9233, (q15_t)0x41c3, (q15_t)0x9230, (q15_t)0x41bd, (q15_t)0x922d,
+  (q15_t)0x41b8, (q15_t)0x922a, (q15_t)0x41b3, (q15_t)0x9226, (q15_t)0x41ad, (q15_t)0x9223, (q15_t)0x41a8, (q15_t)0x9220,
+  (q15_t)0x41a2, (q15_t)0x921d, (q15_t)0x419d, (q15_t)0x9219, (q15_t)0x4198, (q15_t)0x9216, (q15_t)0x4192, (q15_t)0x9213,
+  (q15_t)0x418d, (q15_t)0x9210, (q15_t)0x4188, (q15_t)0x920d, (q15_t)0x4182, (q15_t)0x9209, (q15_t)0x417d, (q15_t)0x9206,
+  (q15_t)0x4177, (q15_t)0x9203, (q15_t)0x4172, (q15_t)0x9200, (q15_t)0x416d, (q15_t)0x91fc, (q15_t)0x4167, (q15_t)0x91f9,
+  (q15_t)0x4162, (q15_t)0x91f6, (q15_t)0x415c, (q15_t)0x91f3, (q15_t)0x4157, (q15_t)0x91f0, (q15_t)0x4152, (q15_t)0x91ec,
+  (q15_t)0x414c, (q15_t)0x91e9, (q15_t)0x4147, (q15_t)0x91e6, (q15_t)0x4141, (q15_t)0x91e3, (q15_t)0x413c, (q15_t)0x91e0,
+  (q15_t)0x4136, (q15_t)0x91dc, (q15_t)0x4131, (q15_t)0x91d9, (q15_t)0x412c, (q15_t)0x91d6, (q15_t)0x4126, (q15_t)0x91d3,
+  (q15_t)0x4121, (q15_t)0x91d0, (q15_t)0x411b, (q15_t)0x91cc, (q15_t)0x4116, (q15_t)0x91c9, (q15_t)0x4111, (q15_t)0x91c6,
+  (q15_t)0x410b, (q15_t)0x91c3, (q15_t)0x4106, (q15_t)0x91c0, (q15_t)0x4100, (q15_t)0x91bc, (q15_t)0x40fb, (q15_t)0x91b9,
+  (q15_t)0x40f6, (q15_t)0x91b6, (q15_t)0x40f0, (q15_t)0x91b3, (q15_t)0x40eb, (q15_t)0x91b0, (q15_t)0x40e5, (q15_t)0x91ad,
+  (q15_t)0x40e0, (q15_t)0x91a9, (q15_t)0x40da, (q15_t)0x91a6, (q15_t)0x40d5, (q15_t)0x91a3, (q15_t)0x40d0, (q15_t)0x91a0,
+  (q15_t)0x40ca, (q15_t)0x919d, (q15_t)0x40c5, (q15_t)0x9199, (q15_t)0x40bf, (q15_t)0x9196, (q15_t)0x40ba, (q15_t)0x9193,
+  (q15_t)0x40b5, (q15_t)0x9190, (q15_t)0x40af, (q15_t)0x918d, (q15_t)0x40aa, (q15_t)0x918a, (q15_t)0x40a4, (q15_t)0x9186,
+  (q15_t)0x409f, (q15_t)0x9183, (q15_t)0x4099, (q15_t)0x9180, (q15_t)0x4094, (q15_t)0x917d, (q15_t)0x408f, (q15_t)0x917a,
+  (q15_t)0x4089, (q15_t)0x9177, (q15_t)0x4084, (q15_t)0x9173, (q15_t)0x407e, (q15_t)0x9170, (q15_t)0x4079, (q15_t)0x916d,
+  (q15_t)0x4073, (q15_t)0x916a, (q15_t)0x406e, (q15_t)0x9167, (q15_t)0x4069, (q15_t)0x9164, (q15_t)0x4063, (q15_t)0x9160,
+  (q15_t)0x405e, (q15_t)0x915d, (q15_t)0x4058, (q15_t)0x915a, (q15_t)0x4053, (q15_t)0x9157, (q15_t)0x404d, (q15_t)0x9154,
+  (q15_t)0x4048, (q15_t)0x9151, (q15_t)0x4043, (q15_t)0x914d, (q15_t)0x403d, (q15_t)0x914a, (q15_t)0x4038, (q15_t)0x9147,
+  (q15_t)0x4032, (q15_t)0x9144, (q15_t)0x402d, (q15_t)0x9141, (q15_t)0x4027, (q15_t)0x913e, (q15_t)0x4022, (q15_t)0x913a,
+  (q15_t)0x401d, (q15_t)0x9137, (q15_t)0x4017, (q15_t)0x9134, (q15_t)0x4012, (q15_t)0x9131, (q15_t)0x400c, (q15_t)0x912e,
+  (q15_t)0x4007, (q15_t)0x912b, (q15_t)0x4001, (q15_t)0x9128, (q15_t)0x3ffc, (q15_t)0x9124, (q15_t)0x3ff6, (q15_t)0x9121,
+  (q15_t)0x3ff1, (q15_t)0x911e, (q15_t)0x3fec, (q15_t)0x911b, (q15_t)0x3fe6, (q15_t)0x9118, (q15_t)0x3fe1, (q15_t)0x9115,
+  (q15_t)0x3fdb, (q15_t)0x9112, (q15_t)0x3fd6, (q15_t)0x910f, (q15_t)0x3fd0, (q15_t)0x910b, (q15_t)0x3fcb, (q15_t)0x9108,
+  (q15_t)0x3fc5, (q15_t)0x9105, (q15_t)0x3fc0, (q15_t)0x9102, (q15_t)0x3fbb, (q15_t)0x90ff, (q15_t)0x3fb5, (q15_t)0x90fc,
+  (q15_t)0x3fb0, (q15_t)0x90f9, (q15_t)0x3faa, (q15_t)0x90f5, (q15_t)0x3fa5, (q15_t)0x90f2, (q15_t)0x3f9f, (q15_t)0x90ef,
+  (q15_t)0x3f9a, (q15_t)0x90ec, (q15_t)0x3f94, (q15_t)0x90e9, (q15_t)0x3f8f, (q15_t)0x90e6, (q15_t)0x3f89, (q15_t)0x90e3,
+  (q15_t)0x3f84, (q15_t)0x90e0, (q15_t)0x3f7f, (q15_t)0x90dd, (q15_t)0x3f79, (q15_t)0x90d9, (q15_t)0x3f74, (q15_t)0x90d6,
+  (q15_t)0x3f6e, (q15_t)0x90d3, (q15_t)0x3f69, (q15_t)0x90d0, (q15_t)0x3f63, (q15_t)0x90cd, (q15_t)0x3f5e, (q15_t)0x90ca,
+  (q15_t)0x3f58, (q15_t)0x90c7, (q15_t)0x3f53, (q15_t)0x90c4, (q15_t)0x3f4d, (q15_t)0x90c1, (q15_t)0x3f48, (q15_t)0x90bd,
+  (q15_t)0x3f43, (q15_t)0x90ba, (q15_t)0x3f3d, (q15_t)0x90b7, (q15_t)0x3f38, (q15_t)0x90b4, (q15_t)0x3f32, (q15_t)0x90b1,
+  (q15_t)0x3f2d, (q15_t)0x90ae, (q15_t)0x3f27, (q15_t)0x90ab, (q15_t)0x3f22, (q15_t)0x90a8, (q15_t)0x3f1c, (q15_t)0x90a5,
+  (q15_t)0x3f17, (q15_t)0x90a1, (q15_t)0x3f11, (q15_t)0x909e, (q15_t)0x3f0c, (q15_t)0x909b, (q15_t)0x3f06, (q15_t)0x9098,
+  (q15_t)0x3f01, (q15_t)0x9095, (q15_t)0x3efb, (q15_t)0x9092, (q15_t)0x3ef6, (q15_t)0x908f, (q15_t)0x3ef1, (q15_t)0x908c,
+  (q15_t)0x3eeb, (q15_t)0x9089, (q15_t)0x3ee6, (q15_t)0x9086, (q15_t)0x3ee0, (q15_t)0x9083, (q15_t)0x3edb, (q15_t)0x907f,
+  (q15_t)0x3ed5, (q15_t)0x907c, (q15_t)0x3ed0, (q15_t)0x9079, (q15_t)0x3eca, (q15_t)0x9076, (q15_t)0x3ec5, (q15_t)0x9073,
+  (q15_t)0x3ebf, (q15_t)0x9070, (q15_t)0x3eba, (q15_t)0x906d, (q15_t)0x3eb4, (q15_t)0x906a, (q15_t)0x3eaf, (q15_t)0x9067,
+  (q15_t)0x3ea9, (q15_t)0x9064, (q15_t)0x3ea4, (q15_t)0x9061, (q15_t)0x3e9e, (q15_t)0x905e, (q15_t)0x3e99, (q15_t)0x905b,
+  (q15_t)0x3e93, (q15_t)0x9057, (q15_t)0x3e8e, (q15_t)0x9054, (q15_t)0x3e88, (q15_t)0x9051, (q15_t)0x3e83, (q15_t)0x904e,
+  (q15_t)0x3e7d, (q15_t)0x904b, (q15_t)0x3e78, (q15_t)0x9048, (q15_t)0x3e73, (q15_t)0x9045, (q15_t)0x3e6d, (q15_t)0x9042,
+  (q15_t)0x3e68, (q15_t)0x903f, (q15_t)0x3e62, (q15_t)0x903c, (q15_t)0x3e5d, (q15_t)0x9039, (q15_t)0x3e57, (q15_t)0x9036,
+  (q15_t)0x3e52, (q15_t)0x9033, (q15_t)0x3e4c, (q15_t)0x9030, (q15_t)0x3e47, (q15_t)0x902d, (q15_t)0x3e41, (q15_t)0x902a,
+  (q15_t)0x3e3c, (q15_t)0x9026, (q15_t)0x3e36, (q15_t)0x9023, (q15_t)0x3e31, (q15_t)0x9020, (q15_t)0x3e2b, (q15_t)0x901d,
+  (q15_t)0x3e26, (q15_t)0x901a, (q15_t)0x3e20, (q15_t)0x9017, (q15_t)0x3e1b, (q15_t)0x9014, (q15_t)0x3e15, (q15_t)0x9011,
+  (q15_t)0x3e10, (q15_t)0x900e, (q15_t)0x3e0a, (q15_t)0x900b, (q15_t)0x3e05, (q15_t)0x9008, (q15_t)0x3dff, (q15_t)0x9005,
+  (q15_t)0x3dfa, (q15_t)0x9002, (q15_t)0x3df4, (q15_t)0x8fff, (q15_t)0x3def, (q15_t)0x8ffc, (q15_t)0x3de9, (q15_t)0x8ff9,
+  (q15_t)0x3de4, (q15_t)0x8ff6, (q15_t)0x3dde, (q15_t)0x8ff3, (q15_t)0x3dd9, (q15_t)0x8ff0, (q15_t)0x3dd3, (q15_t)0x8fed,
+  (q15_t)0x3dce, (q15_t)0x8fea, (q15_t)0x3dc8, (q15_t)0x8fe7, (q15_t)0x3dc3, (q15_t)0x8fe3, (q15_t)0x3dbd, (q15_t)0x8fe0,
+  (q15_t)0x3db8, (q15_t)0x8fdd, (q15_t)0x3db2, (q15_t)0x8fda, (q15_t)0x3dad, (q15_t)0x8fd7, (q15_t)0x3da7, (q15_t)0x8fd4,
+  (q15_t)0x3da2, (q15_t)0x8fd1, (q15_t)0x3d9c, (q15_t)0x8fce, (q15_t)0x3d97, (q15_t)0x8fcb, (q15_t)0x3d91, (q15_t)0x8fc8,
+  (q15_t)0x3d8c, (q15_t)0x8fc5, (q15_t)0x3d86, (q15_t)0x8fc2, (q15_t)0x3d81, (q15_t)0x8fbf, (q15_t)0x3d7b, (q15_t)0x8fbc,
+  (q15_t)0x3d76, (q15_t)0x8fb9, (q15_t)0x3d70, (q15_t)0x8fb6, (q15_t)0x3d6b, (q15_t)0x8fb3, (q15_t)0x3d65, (q15_t)0x8fb0,
+  (q15_t)0x3d60, (q15_t)0x8fad, (q15_t)0x3d5a, (q15_t)0x8faa, (q15_t)0x3d55, (q15_t)0x8fa7, (q15_t)0x3d4f, (q15_t)0x8fa4,
+  (q15_t)0x3d49, (q15_t)0x8fa1, (q15_t)0x3d44, (q15_t)0x8f9e, (q15_t)0x3d3e, (q15_t)0x8f9b, (q15_t)0x3d39, (q15_t)0x8f98,
+  (q15_t)0x3d33, (q15_t)0x8f95, (q15_t)0x3d2e, (q15_t)0x8f92, (q15_t)0x3d28, (q15_t)0x8f8f, (q15_t)0x3d23, (q15_t)0x8f8c,
+  (q15_t)0x3d1d, (q15_t)0x8f89, (q15_t)0x3d18, (q15_t)0x8f86, (q15_t)0x3d12, (q15_t)0x8f83, (q15_t)0x3d0d, (q15_t)0x8f80,
+  (q15_t)0x3d07, (q15_t)0x8f7d, (q15_t)0x3d02, (q15_t)0x8f7a, (q15_t)0x3cfc, (q15_t)0x8f77, (q15_t)0x3cf7, (q15_t)0x8f74,
+  (q15_t)0x3cf1, (q15_t)0x8f71, (q15_t)0x3cec, (q15_t)0x8f6e, (q15_t)0x3ce6, (q15_t)0x8f6b, (q15_t)0x3ce1, (q15_t)0x8f68,
+  (q15_t)0x3cdb, (q15_t)0x8f65, (q15_t)0x3cd6, (q15_t)0x8f62, (q15_t)0x3cd0, (q15_t)0x8f5f, (q15_t)0x3cca, (q15_t)0x8f5c,
+  (q15_t)0x3cc5, (q15_t)0x8f59, (q15_t)0x3cbf, (q15_t)0x8f56, (q15_t)0x3cba, (q15_t)0x8f53, (q15_t)0x3cb4, (q15_t)0x8f50,
+  (q15_t)0x3caf, (q15_t)0x8f4d, (q15_t)0x3ca9, (q15_t)0x8f4a, (q15_t)0x3ca4, (q15_t)0x8f47, (q15_t)0x3c9e, (q15_t)0x8f44,
+  (q15_t)0x3c99, (q15_t)0x8f41, (q15_t)0x3c93, (q15_t)0x8f3e, (q15_t)0x3c8e, (q15_t)0x8f3b, (q15_t)0x3c88, (q15_t)0x8f38,
+  (q15_t)0x3c83, (q15_t)0x8f35, (q15_t)0x3c7d, (q15_t)0x8f32, (q15_t)0x3c77, (q15_t)0x8f2f, (q15_t)0x3c72, (q15_t)0x8f2d,
+  (q15_t)0x3c6c, (q15_t)0x8f2a, (q15_t)0x3c67, (q15_t)0x8f27, (q15_t)0x3c61, (q15_t)0x8f24, (q15_t)0x3c5c, (q15_t)0x8f21,
+  (q15_t)0x3c56, (q15_t)0x8f1e, (q15_t)0x3c51, (q15_t)0x8f1b, (q15_t)0x3c4b, (q15_t)0x8f18, (q15_t)0x3c46, (q15_t)0x8f15,
+  (q15_t)0x3c40, (q15_t)0x8f12, (q15_t)0x3c3b, (q15_t)0x8f0f, (q15_t)0x3c35, (q15_t)0x8f0c, (q15_t)0x3c2f, (q15_t)0x8f09,
+  (q15_t)0x3c2a, (q15_t)0x8f06, (q15_t)0x3c24, (q15_t)0x8f03, (q15_t)0x3c1f, (q15_t)0x8f00, (q15_t)0x3c19, (q15_t)0x8efd,
+  (q15_t)0x3c14, (q15_t)0x8efa, (q15_t)0x3c0e, (q15_t)0x8ef7, (q15_t)0x3c09, (q15_t)0x8ef4, (q15_t)0x3c03, (q15_t)0x8ef1,
+  (q15_t)0x3bfd, (q15_t)0x8eee, (q15_t)0x3bf8, (q15_t)0x8eec, (q15_t)0x3bf2, (q15_t)0x8ee9, (q15_t)0x3bed, (q15_t)0x8ee6,
+  (q15_t)0x3be7, (q15_t)0x8ee3, (q15_t)0x3be2, (q15_t)0x8ee0, (q15_t)0x3bdc, (q15_t)0x8edd, (q15_t)0x3bd7, (q15_t)0x8eda,
+  (q15_t)0x3bd1, (q15_t)0x8ed7, (q15_t)0x3bcc, (q15_t)0x8ed4, (q15_t)0x3bc6, (q15_t)0x8ed1, (q15_t)0x3bc0, (q15_t)0x8ece,
+  (q15_t)0x3bbb, (q15_t)0x8ecb, (q15_t)0x3bb5, (q15_t)0x8ec8, (q15_t)0x3bb0, (q15_t)0x8ec5, (q15_t)0x3baa, (q15_t)0x8ec2,
+  (q15_t)0x3ba5, (q15_t)0x8ebf, (q15_t)0x3b9f, (q15_t)0x8ebd, (q15_t)0x3b99, (q15_t)0x8eba, (q15_t)0x3b94, (q15_t)0x8eb7,
+  (q15_t)0x3b8e, (q15_t)0x8eb4, (q15_t)0x3b89, (q15_t)0x8eb1, (q15_t)0x3b83, (q15_t)0x8eae, (q15_t)0x3b7e, (q15_t)0x8eab,
+  (q15_t)0x3b78, (q15_t)0x8ea8, (q15_t)0x3b73, (q15_t)0x8ea5, (q15_t)0x3b6d, (q15_t)0x8ea2, (q15_t)0x3b67, (q15_t)0x8e9f,
+  (q15_t)0x3b62, (q15_t)0x8e9c, (q15_t)0x3b5c, (q15_t)0x8e99, (q15_t)0x3b57, (q15_t)0x8e97, (q15_t)0x3b51, (q15_t)0x8e94,
+  (q15_t)0x3b4c, (q15_t)0x8e91, (q15_t)0x3b46, (q15_t)0x8e8e, (q15_t)0x3b40, (q15_t)0x8e8b, (q15_t)0x3b3b, (q15_t)0x8e88,
+  (q15_t)0x3b35, (q15_t)0x8e85, (q15_t)0x3b30, (q15_t)0x8e82, (q15_t)0x3b2a, (q15_t)0x8e7f, (q15_t)0x3b25, (q15_t)0x8e7c,
+  (q15_t)0x3b1f, (q15_t)0x8e7a, (q15_t)0x3b19, (q15_t)0x8e77, (q15_t)0x3b14, (q15_t)0x8e74, (q15_t)0x3b0e, (q15_t)0x8e71,
+  (q15_t)0x3b09, (q15_t)0x8e6e, (q15_t)0x3b03, (q15_t)0x8e6b, (q15_t)0x3afe, (q15_t)0x8e68, (q15_t)0x3af8, (q15_t)0x8e65,
+  (q15_t)0x3af2, (q15_t)0x8e62, (q15_t)0x3aed, (q15_t)0x8e5f, (q15_t)0x3ae7, (q15_t)0x8e5d, (q15_t)0x3ae2, (q15_t)0x8e5a,
+  (q15_t)0x3adc, (q15_t)0x8e57, (q15_t)0x3ad7, (q15_t)0x8e54, (q15_t)0x3ad1, (q15_t)0x8e51, (q15_t)0x3acb, (q15_t)0x8e4e,
+  (q15_t)0x3ac6, (q15_t)0x8e4b, (q15_t)0x3ac0, (q15_t)0x8e48, (q15_t)0x3abb, (q15_t)0x8e45, (q15_t)0x3ab5, (q15_t)0x8e43,
+  (q15_t)0x3aaf, (q15_t)0x8e40, (q15_t)0x3aaa, (q15_t)0x8e3d, (q15_t)0x3aa4, (q15_t)0x8e3a, (q15_t)0x3a9f, (q15_t)0x8e37,
+  (q15_t)0x3a99, (q15_t)0x8e34, (q15_t)0x3a94, (q15_t)0x8e31, (q15_t)0x3a8e, (q15_t)0x8e2e, (q15_t)0x3a88, (q15_t)0x8e2c,
+  (q15_t)0x3a83, (q15_t)0x8e29, (q15_t)0x3a7d, (q15_t)0x8e26, (q15_t)0x3a78, (q15_t)0x8e23, (q15_t)0x3a72, (q15_t)0x8e20,
+  (q15_t)0x3a6c, (q15_t)0x8e1d, (q15_t)0x3a67, (q15_t)0x8e1a, (q15_t)0x3a61, (q15_t)0x8e17, (q15_t)0x3a5c, (q15_t)0x8e15,
+  (q15_t)0x3a56, (q15_t)0x8e12, (q15_t)0x3a50, (q15_t)0x8e0f, (q15_t)0x3a4b, (q15_t)0x8e0c, (q15_t)0x3a45, (q15_t)0x8e09,
+  (q15_t)0x3a40, (q15_t)0x8e06, (q15_t)0x3a3a, (q15_t)0x8e03, (q15_t)0x3a34, (q15_t)0x8e01, (q15_t)0x3a2f, (q15_t)0x8dfe,
+  (q15_t)0x3a29, (q15_t)0x8dfb, (q15_t)0x3a24, (q15_t)0x8df8, (q15_t)0x3a1e, (q15_t)0x8df5, (q15_t)0x3a19, (q15_t)0x8df2,
+  (q15_t)0x3a13, (q15_t)0x8def, (q15_t)0x3a0d, (q15_t)0x8ded, (q15_t)0x3a08, (q15_t)0x8dea, (q15_t)0x3a02, (q15_t)0x8de7,
+  (q15_t)0x39fd, (q15_t)0x8de4, (q15_t)0x39f7, (q15_t)0x8de1, (q15_t)0x39f1, (q15_t)0x8dde, (q15_t)0x39ec, (q15_t)0x8ddc,
+  (q15_t)0x39e6, (q15_t)0x8dd9, (q15_t)0x39e0, (q15_t)0x8dd6, (q15_t)0x39db, (q15_t)0x8dd3, (q15_t)0x39d5, (q15_t)0x8dd0,
+  (q15_t)0x39d0, (q15_t)0x8dcd, (q15_t)0x39ca, (q15_t)0x8dca, (q15_t)0x39c4, (q15_t)0x8dc8, (q15_t)0x39bf, (q15_t)0x8dc5,
+  (q15_t)0x39b9, (q15_t)0x8dc2, (q15_t)0x39b4, (q15_t)0x8dbf, (q15_t)0x39ae, (q15_t)0x8dbc, (q15_t)0x39a8, (q15_t)0x8db9,
+  (q15_t)0x39a3, (q15_t)0x8db7, (q15_t)0x399d, (q15_t)0x8db4, (q15_t)0x3998, (q15_t)0x8db1, (q15_t)0x3992, (q15_t)0x8dae,
+  (q15_t)0x398c, (q15_t)0x8dab, (q15_t)0x3987, (q15_t)0x8da9, (q15_t)0x3981, (q15_t)0x8da6, (q15_t)0x397c, (q15_t)0x8da3,
+  (q15_t)0x3976, (q15_t)0x8da0, (q15_t)0x3970, (q15_t)0x8d9d, (q15_t)0x396b, (q15_t)0x8d9a, (q15_t)0x3965, (q15_t)0x8d98,
+  (q15_t)0x395f, (q15_t)0x8d95, (q15_t)0x395a, (q15_t)0x8d92, (q15_t)0x3954, (q15_t)0x8d8f, (q15_t)0x394f, (q15_t)0x8d8c,
+  (q15_t)0x3949, (q15_t)0x8d8a, (q15_t)0x3943, (q15_t)0x8d87, (q15_t)0x393e, (q15_t)0x8d84, (q15_t)0x3938, (q15_t)0x8d81,
+  (q15_t)0x3932, (q15_t)0x8d7e, (q15_t)0x392d, (q15_t)0x8d7b, (q15_t)0x3927, (q15_t)0x8d79, (q15_t)0x3922, (q15_t)0x8d76,
+  (q15_t)0x391c, (q15_t)0x8d73, (q15_t)0x3916, (q15_t)0x8d70, (q15_t)0x3911, (q15_t)0x8d6d, (q15_t)0x390b, (q15_t)0x8d6b,
+  (q15_t)0x3906, (q15_t)0x8d68, (q15_t)0x3900, (q15_t)0x8d65, (q15_t)0x38fa, (q15_t)0x8d62, (q15_t)0x38f5, (q15_t)0x8d5f,
+  (q15_t)0x38ef, (q15_t)0x8d5d, (q15_t)0x38e9, (q15_t)0x8d5a, (q15_t)0x38e4, (q15_t)0x8d57, (q15_t)0x38de, (q15_t)0x8d54,
+  (q15_t)0x38d8, (q15_t)0x8d51, (q15_t)0x38d3, (q15_t)0x8d4f, (q15_t)0x38cd, (q15_t)0x8d4c, (q15_t)0x38c8, (q15_t)0x8d49,
+  (q15_t)0x38c2, (q15_t)0x8d46, (q15_t)0x38bc, (q15_t)0x8d44, (q15_t)0x38b7, (q15_t)0x8d41, (q15_t)0x38b1, (q15_t)0x8d3e,
+  (q15_t)0x38ab, (q15_t)0x8d3b, (q15_t)0x38a6, (q15_t)0x8d38, (q15_t)0x38a0, (q15_t)0x8d36, (q15_t)0x389b, (q15_t)0x8d33,
+  (q15_t)0x3895, (q15_t)0x8d30, (q15_t)0x388f, (q15_t)0x8d2d, (q15_t)0x388a, (q15_t)0x8d2b, (q15_t)0x3884, (q15_t)0x8d28,
+  (q15_t)0x387e, (q15_t)0x8d25, (q15_t)0x3879, (q15_t)0x8d22, (q15_t)0x3873, (q15_t)0x8d1f, (q15_t)0x386d, (q15_t)0x8d1d,
+  (q15_t)0x3868, (q15_t)0x8d1a, (q15_t)0x3862, (q15_t)0x8d17, (q15_t)0x385d, (q15_t)0x8d14, (q15_t)0x3857, (q15_t)0x8d12,
+  (q15_t)0x3851, (q15_t)0x8d0f, (q15_t)0x384c, (q15_t)0x8d0c, (q15_t)0x3846, (q15_t)0x8d09, (q15_t)0x3840, (q15_t)0x8d07,
+  (q15_t)0x383b, (q15_t)0x8d04, (q15_t)0x3835, (q15_t)0x8d01, (q15_t)0x382f, (q15_t)0x8cfe, (q15_t)0x382a, (q15_t)0x8cfb,
+  (q15_t)0x3824, (q15_t)0x8cf9, (q15_t)0x381e, (q15_t)0x8cf6, (q15_t)0x3819, (q15_t)0x8cf3, (q15_t)0x3813, (q15_t)0x8cf0,
+  (q15_t)0x380d, (q15_t)0x8cee, (q15_t)0x3808, (q15_t)0x8ceb, (q15_t)0x3802, (q15_t)0x8ce8, (q15_t)0x37fd, (q15_t)0x8ce5,
+  (q15_t)0x37f7, (q15_t)0x8ce3, (q15_t)0x37f1, (q15_t)0x8ce0, (q15_t)0x37ec, (q15_t)0x8cdd, (q15_t)0x37e6, (q15_t)0x8cda,
+  (q15_t)0x37e0, (q15_t)0x8cd8, (q15_t)0x37db, (q15_t)0x8cd5, (q15_t)0x37d5, (q15_t)0x8cd2, (q15_t)0x37cf, (q15_t)0x8cd0,
+  (q15_t)0x37ca, (q15_t)0x8ccd, (q15_t)0x37c4, (q15_t)0x8cca, (q15_t)0x37be, (q15_t)0x8cc7, (q15_t)0x37b9, (q15_t)0x8cc5,
+  (q15_t)0x37b3, (q15_t)0x8cc2, (q15_t)0x37ad, (q15_t)0x8cbf, (q15_t)0x37a8, (q15_t)0x8cbc, (q15_t)0x37a2, (q15_t)0x8cba,
+  (q15_t)0x379c, (q15_t)0x8cb7, (q15_t)0x3797, (q15_t)0x8cb4, (q15_t)0x3791, (q15_t)0x8cb1, (q15_t)0x378b, (q15_t)0x8caf,
+  (q15_t)0x3786, (q15_t)0x8cac, (q15_t)0x3780, (q15_t)0x8ca9, (q15_t)0x377a, (q15_t)0x8ca7, (q15_t)0x3775, (q15_t)0x8ca4,
+  (q15_t)0x376f, (q15_t)0x8ca1, (q15_t)0x3769, (q15_t)0x8c9e, (q15_t)0x3764, (q15_t)0x8c9c, (q15_t)0x375e, (q15_t)0x8c99,
+  (q15_t)0x3758, (q15_t)0x8c96, (q15_t)0x3753, (q15_t)0x8c94, (q15_t)0x374d, (q15_t)0x8c91, (q15_t)0x3747, (q15_t)0x8c8e,
+  (q15_t)0x3742, (q15_t)0x8c8b, (q15_t)0x373c, (q15_t)0x8c89, (q15_t)0x3736, (q15_t)0x8c86, (q15_t)0x3731, (q15_t)0x8c83,
+  (q15_t)0x372b, (q15_t)0x8c81, (q15_t)0x3725, (q15_t)0x8c7e, (q15_t)0x3720, (q15_t)0x8c7b, (q15_t)0x371a, (q15_t)0x8c78,
+  (q15_t)0x3714, (q15_t)0x8c76, (q15_t)0x370f, (q15_t)0x8c73, (q15_t)0x3709, (q15_t)0x8c70, (q15_t)0x3703, (q15_t)0x8c6e,
+  (q15_t)0x36fe, (q15_t)0x8c6b, (q15_t)0x36f8, (q15_t)0x8c68, (q15_t)0x36f2, (q15_t)0x8c65, (q15_t)0x36ed, (q15_t)0x8c63,
+  (q15_t)0x36e7, (q15_t)0x8c60, (q15_t)0x36e1, (q15_t)0x8c5d, (q15_t)0x36dc, (q15_t)0x8c5b, (q15_t)0x36d6, (q15_t)0x8c58,
+  (q15_t)0x36d0, (q15_t)0x8c55, (q15_t)0x36cb, (q15_t)0x8c53, (q15_t)0x36c5, (q15_t)0x8c50, (q15_t)0x36bf, (q15_t)0x8c4d,
+  (q15_t)0x36ba, (q15_t)0x8c4b, (q15_t)0x36b4, (q15_t)0x8c48, (q15_t)0x36ae, (q15_t)0x8c45, (q15_t)0x36a9, (q15_t)0x8c43,
+  (q15_t)0x36a3, (q15_t)0x8c40, (q15_t)0x369d, (q15_t)0x8c3d, (q15_t)0x3698, (q15_t)0x8c3a, (q15_t)0x3692, (q15_t)0x8c38,
+  (q15_t)0x368c, (q15_t)0x8c35, (q15_t)0x3686, (q15_t)0x8c32, (q15_t)0x3681, (q15_t)0x8c30, (q15_t)0x367b, (q15_t)0x8c2d,
+  (q15_t)0x3675, (q15_t)0x8c2a, (q15_t)0x3670, (q15_t)0x8c28, (q15_t)0x366a, (q15_t)0x8c25, (q15_t)0x3664, (q15_t)0x8c22,
+  (q15_t)0x365f, (q15_t)0x8c20, (q15_t)0x3659, (q15_t)0x8c1d, (q15_t)0x3653, (q15_t)0x8c1a, (q15_t)0x364e, (q15_t)0x8c18,
+  (q15_t)0x3648, (q15_t)0x8c15, (q15_t)0x3642, (q15_t)0x8c12, (q15_t)0x363d, (q15_t)0x8c10, (q15_t)0x3637, (q15_t)0x8c0d,
+  (q15_t)0x3631, (q15_t)0x8c0a, (q15_t)0x362b, (q15_t)0x8c08, (q15_t)0x3626, (q15_t)0x8c05, (q15_t)0x3620, (q15_t)0x8c02,
+  (q15_t)0x361a, (q15_t)0x8c00, (q15_t)0x3615, (q15_t)0x8bfd, (q15_t)0x360f, (q15_t)0x8bfa, (q15_t)0x3609, (q15_t)0x8bf8,
+  (q15_t)0x3604, (q15_t)0x8bf5, (q15_t)0x35fe, (q15_t)0x8bf3, (q15_t)0x35f8, (q15_t)0x8bf0, (q15_t)0x35f3, (q15_t)0x8bed,
+  (q15_t)0x35ed, (q15_t)0x8beb, (q15_t)0x35e7, (q15_t)0x8be8, (q15_t)0x35e1, (q15_t)0x8be5, (q15_t)0x35dc, (q15_t)0x8be3,
+  (q15_t)0x35d6, (q15_t)0x8be0, (q15_t)0x35d0, (q15_t)0x8bdd, (q15_t)0x35cb, (q15_t)0x8bdb, (q15_t)0x35c5, (q15_t)0x8bd8,
+  (q15_t)0x35bf, (q15_t)0x8bd5, (q15_t)0x35ba, (q15_t)0x8bd3, (q15_t)0x35b4, (q15_t)0x8bd0, (q15_t)0x35ae, (q15_t)0x8bce,
+  (q15_t)0x35a8, (q15_t)0x8bcb, (q15_t)0x35a3, (q15_t)0x8bc8, (q15_t)0x359d, (q15_t)0x8bc6, (q15_t)0x3597, (q15_t)0x8bc3,
+  (q15_t)0x3592, (q15_t)0x8bc0, (q15_t)0x358c, (q15_t)0x8bbe, (q15_t)0x3586, (q15_t)0x8bbb, (q15_t)0x3580, (q15_t)0x8bb8,
+  (q15_t)0x357b, (q15_t)0x8bb6, (q15_t)0x3575, (q15_t)0x8bb3, (q15_t)0x356f, (q15_t)0x8bb1, (q15_t)0x356a, (q15_t)0x8bae,
+  (q15_t)0x3564, (q15_t)0x8bab, (q15_t)0x355e, (q15_t)0x8ba9, (q15_t)0x3558, (q15_t)0x8ba6, (q15_t)0x3553, (q15_t)0x8ba4,
+  (q15_t)0x354d, (q15_t)0x8ba1, (q15_t)0x3547, (q15_t)0x8b9e, (q15_t)0x3542, (q15_t)0x8b9c, (q15_t)0x353c, (q15_t)0x8b99,
+  (q15_t)0x3536, (q15_t)0x8b96, (q15_t)0x3530, (q15_t)0x8b94, (q15_t)0x352b, (q15_t)0x8b91, (q15_t)0x3525, (q15_t)0x8b8f,
+  (q15_t)0x351f, (q15_t)0x8b8c, (q15_t)0x351a, (q15_t)0x8b89, (q15_t)0x3514, (q15_t)0x8b87, (q15_t)0x350e, (q15_t)0x8b84,
+  (q15_t)0x3508, (q15_t)0x8b82, (q15_t)0x3503, (q15_t)0x8b7f, (q15_t)0x34fd, (q15_t)0x8b7c, (q15_t)0x34f7, (q15_t)0x8b7a,
+  (q15_t)0x34f2, (q15_t)0x8b77, (q15_t)0x34ec, (q15_t)0x8b75, (q15_t)0x34e6, (q15_t)0x8b72, (q15_t)0x34e0, (q15_t)0x8b6f,
+  (q15_t)0x34db, (q15_t)0x8b6d, (q15_t)0x34d5, (q15_t)0x8b6a, (q15_t)0x34cf, (q15_t)0x8b68, (q15_t)0x34ca, (q15_t)0x8b65,
+  (q15_t)0x34c4, (q15_t)0x8b62, (q15_t)0x34be, (q15_t)0x8b60, (q15_t)0x34b8, (q15_t)0x8b5d, (q15_t)0x34b3, (q15_t)0x8b5b,
+  (q15_t)0x34ad, (q15_t)0x8b58, (q15_t)0x34a7, (q15_t)0x8b55, (q15_t)0x34a1, (q15_t)0x8b53, (q15_t)0x349c, (q15_t)0x8b50,
+  (q15_t)0x3496, (q15_t)0x8b4e, (q15_t)0x3490, (q15_t)0x8b4b, (q15_t)0x348b, (q15_t)0x8b49, (q15_t)0x3485, (q15_t)0x8b46,
+  (q15_t)0x347f, (q15_t)0x8b43, (q15_t)0x3479, (q15_t)0x8b41, (q15_t)0x3474, (q15_t)0x8b3e, (q15_t)0x346e, (q15_t)0x8b3c,
+  (q15_t)0x3468, (q15_t)0x8b39, (q15_t)0x3462, (q15_t)0x8b37, (q15_t)0x345d, (q15_t)0x8b34, (q15_t)0x3457, (q15_t)0x8b31,
+  (q15_t)0x3451, (q15_t)0x8b2f, (q15_t)0x344b, (q15_t)0x8b2c, (q15_t)0x3446, (q15_t)0x8b2a, (q15_t)0x3440, (q15_t)0x8b27,
+  (q15_t)0x343a, (q15_t)0x8b25, (q15_t)0x3435, (q15_t)0x8b22, (q15_t)0x342f, (q15_t)0x8b1f, (q15_t)0x3429, (q15_t)0x8b1d,
+  (q15_t)0x3423, (q15_t)0x8b1a, (q15_t)0x341e, (q15_t)0x8b18, (q15_t)0x3418, (q15_t)0x8b15, (q15_t)0x3412, (q15_t)0x8b13,
+  (q15_t)0x340c, (q15_t)0x8b10, (q15_t)0x3407, (q15_t)0x8b0e, (q15_t)0x3401, (q15_t)0x8b0b, (q15_t)0x33fb, (q15_t)0x8b08,
+  (q15_t)0x33f5, (q15_t)0x8b06, (q15_t)0x33f0, (q15_t)0x8b03, (q15_t)0x33ea, (q15_t)0x8b01, (q15_t)0x33e4, (q15_t)0x8afe,
+  (q15_t)0x33de, (q15_t)0x8afc, (q15_t)0x33d9, (q15_t)0x8af9, (q15_t)0x33d3, (q15_t)0x8af7, (q15_t)0x33cd, (q15_t)0x8af4,
+  (q15_t)0x33c7, (q15_t)0x8af1, (q15_t)0x33c2, (q15_t)0x8aef, (q15_t)0x33bc, (q15_t)0x8aec, (q15_t)0x33b6, (q15_t)0x8aea,
+  (q15_t)0x33b0, (q15_t)0x8ae7, (q15_t)0x33ab, (q15_t)0x8ae5, (q15_t)0x33a5, (q15_t)0x8ae2, (q15_t)0x339f, (q15_t)0x8ae0,
+  (q15_t)0x3399, (q15_t)0x8add, (q15_t)0x3394, (q15_t)0x8adb, (q15_t)0x338e, (q15_t)0x8ad8, (q15_t)0x3388, (q15_t)0x8ad6,
+  (q15_t)0x3382, (q15_t)0x8ad3, (q15_t)0x337d, (q15_t)0x8ad1, (q15_t)0x3377, (q15_t)0x8ace, (q15_t)0x3371, (q15_t)0x8acb,
+  (q15_t)0x336b, (q15_t)0x8ac9, (q15_t)0x3366, (q15_t)0x8ac6, (q15_t)0x3360, (q15_t)0x8ac4, (q15_t)0x335a, (q15_t)0x8ac1,
+  (q15_t)0x3354, (q15_t)0x8abf, (q15_t)0x334f, (q15_t)0x8abc, (q15_t)0x3349, (q15_t)0x8aba, (q15_t)0x3343, (q15_t)0x8ab7,
+  (q15_t)0x333d, (q15_t)0x8ab5, (q15_t)0x3338, (q15_t)0x8ab2, (q15_t)0x3332, (q15_t)0x8ab0, (q15_t)0x332c, (q15_t)0x8aad,
+  (q15_t)0x3326, (q15_t)0x8aab, (q15_t)0x3321, (q15_t)0x8aa8, (q15_t)0x331b, (q15_t)0x8aa6, (q15_t)0x3315, (q15_t)0x8aa3,
+  (q15_t)0x330f, (q15_t)0x8aa1, (q15_t)0x330a, (q15_t)0x8a9e, (q15_t)0x3304, (q15_t)0x8a9c, (q15_t)0x32fe, (q15_t)0x8a99,
+  (q15_t)0x32f8, (q15_t)0x8a97, (q15_t)0x32f3, (q15_t)0x8a94, (q15_t)0x32ed, (q15_t)0x8a92, (q15_t)0x32e7, (q15_t)0x8a8f,
+  (q15_t)0x32e1, (q15_t)0x8a8d, (q15_t)0x32db, (q15_t)0x8a8a, (q15_t)0x32d6, (q15_t)0x8a88, (q15_t)0x32d0, (q15_t)0x8a85,
+  (q15_t)0x32ca, (q15_t)0x8a83, (q15_t)0x32c4, (q15_t)0x8a80, (q15_t)0x32bf, (q15_t)0x8a7e, (q15_t)0x32b9, (q15_t)0x8a7b,
+  (q15_t)0x32b3, (q15_t)0x8a79, (q15_t)0x32ad, (q15_t)0x8a76, (q15_t)0x32a8, (q15_t)0x8a74, (q15_t)0x32a2, (q15_t)0x8a71,
+  (q15_t)0x329c, (q15_t)0x8a6f, (q15_t)0x3296, (q15_t)0x8a6c, (q15_t)0x3290, (q15_t)0x8a6a, (q15_t)0x328b, (q15_t)0x8a67,
+  (q15_t)0x3285, (q15_t)0x8a65, (q15_t)0x327f, (q15_t)0x8a62, (q15_t)0x3279, (q15_t)0x8a60, (q15_t)0x3274, (q15_t)0x8a5d,
+  (q15_t)0x326e, (q15_t)0x8a5b, (q15_t)0x3268, (q15_t)0x8a59, (q15_t)0x3262, (q15_t)0x8a56, (q15_t)0x325d, (q15_t)0x8a54,
+  (q15_t)0x3257, (q15_t)0x8a51, (q15_t)0x3251, (q15_t)0x8a4f, (q15_t)0x324b, (q15_t)0x8a4c, (q15_t)0x3245, (q15_t)0x8a4a,
+  (q15_t)0x3240, (q15_t)0x8a47, (q15_t)0x323a, (q15_t)0x8a45, (q15_t)0x3234, (q15_t)0x8a42, (q15_t)0x322e, (q15_t)0x8a40,
+  (q15_t)0x3228, (q15_t)0x8a3d, (q15_t)0x3223, (q15_t)0x8a3b, (q15_t)0x321d, (q15_t)0x8a38, (q15_t)0x3217, (q15_t)0x8a36,
+  (q15_t)0x3211, (q15_t)0x8a34, (q15_t)0x320c, (q15_t)0x8a31, (q15_t)0x3206, (q15_t)0x8a2f, (q15_t)0x3200, (q15_t)0x8a2c,
+  (q15_t)0x31fa, (q15_t)0x8a2a, (q15_t)0x31f4, (q15_t)0x8a27, (q15_t)0x31ef, (q15_t)0x8a25, (q15_t)0x31e9, (q15_t)0x8a22,
+  (q15_t)0x31e3, (q15_t)0x8a20, (q15_t)0x31dd, (q15_t)0x8a1d, (q15_t)0x31d8, (q15_t)0x8a1b, (q15_t)0x31d2, (q15_t)0x8a19,
+  (q15_t)0x31cc, (q15_t)0x8a16, (q15_t)0x31c6, (q15_t)0x8a14, (q15_t)0x31c0, (q15_t)0x8a11, (q15_t)0x31bb, (q15_t)0x8a0f,
+  (q15_t)0x31b5, (q15_t)0x8a0c, (q15_t)0x31af, (q15_t)0x8a0a, (q15_t)0x31a9, (q15_t)0x8a07, (q15_t)0x31a3, (q15_t)0x8a05,
+  (q15_t)0x319e, (q15_t)0x8a03, (q15_t)0x3198, (q15_t)0x8a00, (q15_t)0x3192, (q15_t)0x89fe, (q15_t)0x318c, (q15_t)0x89fb,
+  (q15_t)0x3186, (q15_t)0x89f9, (q15_t)0x3181, (q15_t)0x89f6, (q15_t)0x317b, (q15_t)0x89f4, (q15_t)0x3175, (q15_t)0x89f2,
+  (q15_t)0x316f, (q15_t)0x89ef, (q15_t)0x3169, (q15_t)0x89ed, (q15_t)0x3164, (q15_t)0x89ea, (q15_t)0x315e, (q15_t)0x89e8,
+  (q15_t)0x3158, (q15_t)0x89e5, (q15_t)0x3152, (q15_t)0x89e3, (q15_t)0x314c, (q15_t)0x89e1, (q15_t)0x3147, (q15_t)0x89de,
+  (q15_t)0x3141, (q15_t)0x89dc, (q15_t)0x313b, (q15_t)0x89d9, (q15_t)0x3135, (q15_t)0x89d7, (q15_t)0x312f, (q15_t)0x89d5,
+  (q15_t)0x312a, (q15_t)0x89d2, (q15_t)0x3124, (q15_t)0x89d0, (q15_t)0x311e, (q15_t)0x89cd, (q15_t)0x3118, (q15_t)0x89cb,
+  (q15_t)0x3112, (q15_t)0x89c8, (q15_t)0x310d, (q15_t)0x89c6, (q15_t)0x3107, (q15_t)0x89c4, (q15_t)0x3101, (q15_t)0x89c1,
+  (q15_t)0x30fb, (q15_t)0x89bf, (q15_t)0x30f5, (q15_t)0x89bc, (q15_t)0x30f0, (q15_t)0x89ba, (q15_t)0x30ea, (q15_t)0x89b8,
+  (q15_t)0x30e4, (q15_t)0x89b5, (q15_t)0x30de, (q15_t)0x89b3, (q15_t)0x30d8, (q15_t)0x89b0, (q15_t)0x30d3, (q15_t)0x89ae,
+  (q15_t)0x30cd, (q15_t)0x89ac, (q15_t)0x30c7, (q15_t)0x89a9, (q15_t)0x30c1, (q15_t)0x89a7, (q15_t)0x30bb, (q15_t)0x89a4,
+  (q15_t)0x30b6, (q15_t)0x89a2, (q15_t)0x30b0, (q15_t)0x89a0, (q15_t)0x30aa, (q15_t)0x899d, (q15_t)0x30a4, (q15_t)0x899b,
+  (q15_t)0x309e, (q15_t)0x8998, (q15_t)0x3099, (q15_t)0x8996, (q15_t)0x3093, (q15_t)0x8994, (q15_t)0x308d, (q15_t)0x8991,
+  (q15_t)0x3087, (q15_t)0x898f, (q15_t)0x3081, (q15_t)0x898d, (q15_t)0x307b, (q15_t)0x898a, (q15_t)0x3076, (q15_t)0x8988,
+  (q15_t)0x3070, (q15_t)0x8985, (q15_t)0x306a, (q15_t)0x8983, (q15_t)0x3064, (q15_t)0x8981, (q15_t)0x305e, (q15_t)0x897e,
+  (q15_t)0x3059, (q15_t)0x897c, (q15_t)0x3053, (q15_t)0x897a, (q15_t)0x304d, (q15_t)0x8977, (q15_t)0x3047, (q15_t)0x8975,
+  (q15_t)0x3041, (q15_t)0x8972, (q15_t)0x303b, (q15_t)0x8970, (q15_t)0x3036, (q15_t)0x896e, (q15_t)0x3030, (q15_t)0x896b,
+  (q15_t)0x302a, (q15_t)0x8969, (q15_t)0x3024, (q15_t)0x8967, (q15_t)0x301e, (q15_t)0x8964, (q15_t)0x3019, (q15_t)0x8962,
+  (q15_t)0x3013, (q15_t)0x8960, (q15_t)0x300d, (q15_t)0x895d, (q15_t)0x3007, (q15_t)0x895b, (q15_t)0x3001, (q15_t)0x8958,
+  (q15_t)0x2ffb, (q15_t)0x8956, (q15_t)0x2ff6, (q15_t)0x8954, (q15_t)0x2ff0, (q15_t)0x8951, (q15_t)0x2fea, (q15_t)0x894f,
+  (q15_t)0x2fe4, (q15_t)0x894d, (q15_t)0x2fde, (q15_t)0x894a, (q15_t)0x2fd8, (q15_t)0x8948, (q15_t)0x2fd3, (q15_t)0x8946,
+  (q15_t)0x2fcd, (q15_t)0x8943, (q15_t)0x2fc7, (q15_t)0x8941, (q15_t)0x2fc1, (q15_t)0x893f, (q15_t)0x2fbb, (q15_t)0x893c,
+  (q15_t)0x2fb5, (q15_t)0x893a, (q15_t)0x2fb0, (q15_t)0x8938, (q15_t)0x2faa, (q15_t)0x8935, (q15_t)0x2fa4, (q15_t)0x8933,
+  (q15_t)0x2f9e, (q15_t)0x8931, (q15_t)0x2f98, (q15_t)0x892e, (q15_t)0x2f92, (q15_t)0x892c, (q15_t)0x2f8d, (q15_t)0x892a,
+  (q15_t)0x2f87, (q15_t)0x8927, (q15_t)0x2f81, (q15_t)0x8925, (q15_t)0x2f7b, (q15_t)0x8923, (q15_t)0x2f75, (q15_t)0x8920,
+  (q15_t)0x2f6f, (q15_t)0x891e, (q15_t)0x2f6a, (q15_t)0x891c, (q15_t)0x2f64, (q15_t)0x8919, (q15_t)0x2f5e, (q15_t)0x8917,
+  (q15_t)0x2f58, (q15_t)0x8915, (q15_t)0x2f52, (q15_t)0x8912, (q15_t)0x2f4c, (q15_t)0x8910, (q15_t)0x2f47, (q15_t)0x890e,
+  (q15_t)0x2f41, (q15_t)0x890b, (q15_t)0x2f3b, (q15_t)0x8909, (q15_t)0x2f35, (q15_t)0x8907, (q15_t)0x2f2f, (q15_t)0x8904,
+  (q15_t)0x2f29, (q15_t)0x8902, (q15_t)0x2f24, (q15_t)0x8900, (q15_t)0x2f1e, (q15_t)0x88fd, (q15_t)0x2f18, (q15_t)0x88fb,
+  (q15_t)0x2f12, (q15_t)0x88f9, (q15_t)0x2f0c, (q15_t)0x88f6, (q15_t)0x2f06, (q15_t)0x88f4, (q15_t)0x2f01, (q15_t)0x88f2,
+  (q15_t)0x2efb, (q15_t)0x88f0, (q15_t)0x2ef5, (q15_t)0x88ed, (q15_t)0x2eef, (q15_t)0x88eb, (q15_t)0x2ee9, (q15_t)0x88e9,
+  (q15_t)0x2ee3, (q15_t)0x88e6, (q15_t)0x2edd, (q15_t)0x88e4, (q15_t)0x2ed8, (q15_t)0x88e2, (q15_t)0x2ed2, (q15_t)0x88df,
+  (q15_t)0x2ecc, (q15_t)0x88dd, (q15_t)0x2ec6, (q15_t)0x88db, (q15_t)0x2ec0, (q15_t)0x88d9, (q15_t)0x2eba, (q15_t)0x88d6,
+  (q15_t)0x2eb5, (q15_t)0x88d4, (q15_t)0x2eaf, (q15_t)0x88d2, (q15_t)0x2ea9, (q15_t)0x88cf, (q15_t)0x2ea3, (q15_t)0x88cd,
+  (q15_t)0x2e9d, (q15_t)0x88cb, (q15_t)0x2e97, (q15_t)0x88c8, (q15_t)0x2e91, (q15_t)0x88c6, (q15_t)0x2e8c, (q15_t)0x88c4,
+  (q15_t)0x2e86, (q15_t)0x88c2, (q15_t)0x2e80, (q15_t)0x88bf, (q15_t)0x2e7a, (q15_t)0x88bd, (q15_t)0x2e74, (q15_t)0x88bb,
+  (q15_t)0x2e6e, (q15_t)0x88b9, (q15_t)0x2e68, (q15_t)0x88b6, (q15_t)0x2e63, (q15_t)0x88b4, (q15_t)0x2e5d, (q15_t)0x88b2,
+  (q15_t)0x2e57, (q15_t)0x88af, (q15_t)0x2e51, (q15_t)0x88ad, (q15_t)0x2e4b, (q15_t)0x88ab, (q15_t)0x2e45, (q15_t)0x88a9,
+  (q15_t)0x2e3f, (q15_t)0x88a6, (q15_t)0x2e3a, (q15_t)0x88a4, (q15_t)0x2e34, (q15_t)0x88a2, (q15_t)0x2e2e, (q15_t)0x88a0,
+  (q15_t)0x2e28, (q15_t)0x889d, (q15_t)0x2e22, (q15_t)0x889b, (q15_t)0x2e1c, (q15_t)0x8899, (q15_t)0x2e16, (q15_t)0x8896,
+  (q15_t)0x2e11, (q15_t)0x8894, (q15_t)0x2e0b, (q15_t)0x8892, (q15_t)0x2e05, (q15_t)0x8890, (q15_t)0x2dff, (q15_t)0x888d,
+  (q15_t)0x2df9, (q15_t)0x888b, (q15_t)0x2df3, (q15_t)0x8889, (q15_t)0x2ded, (q15_t)0x8887, (q15_t)0x2de7, (q15_t)0x8884,
+  (q15_t)0x2de2, (q15_t)0x8882, (q15_t)0x2ddc, (q15_t)0x8880, (q15_t)0x2dd6, (q15_t)0x887e, (q15_t)0x2dd0, (q15_t)0x887b,
+  (q15_t)0x2dca, (q15_t)0x8879, (q15_t)0x2dc4, (q15_t)0x8877, (q15_t)0x2dbe, (q15_t)0x8875, (q15_t)0x2db9, (q15_t)0x8872,
+  (q15_t)0x2db3, (q15_t)0x8870, (q15_t)0x2dad, (q15_t)0x886e, (q15_t)0x2da7, (q15_t)0x886c, (q15_t)0x2da1, (q15_t)0x8869,
+  (q15_t)0x2d9b, (q15_t)0x8867, (q15_t)0x2d95, (q15_t)0x8865, (q15_t)0x2d8f, (q15_t)0x8863, (q15_t)0x2d8a, (q15_t)0x8860,
+  (q15_t)0x2d84, (q15_t)0x885e, (q15_t)0x2d7e, (q15_t)0x885c, (q15_t)0x2d78, (q15_t)0x885a, (q15_t)0x2d72, (q15_t)0x8858,
+  (q15_t)0x2d6c, (q15_t)0x8855, (q15_t)0x2d66, (q15_t)0x8853, (q15_t)0x2d60, (q15_t)0x8851, (q15_t)0x2d5b, (q15_t)0x884f,
+  (q15_t)0x2d55, (q15_t)0x884c, (q15_t)0x2d4f, (q15_t)0x884a, (q15_t)0x2d49, (q15_t)0x8848, (q15_t)0x2d43, (q15_t)0x8846,
+  (q15_t)0x2d3d, (q15_t)0x8844, (q15_t)0x2d37, (q15_t)0x8841, (q15_t)0x2d31, (q15_t)0x883f, (q15_t)0x2d2c, (q15_t)0x883d,
+  (q15_t)0x2d26, (q15_t)0x883b, (q15_t)0x2d20, (q15_t)0x8838, (q15_t)0x2d1a, (q15_t)0x8836, (q15_t)0x2d14, (q15_t)0x8834,
+  (q15_t)0x2d0e, (q15_t)0x8832, (q15_t)0x2d08, (q15_t)0x8830, (q15_t)0x2d02, (q15_t)0x882d, (q15_t)0x2cfd, (q15_t)0x882b,
+  (q15_t)0x2cf7, (q15_t)0x8829, (q15_t)0x2cf1, (q15_t)0x8827, (q15_t)0x2ceb, (q15_t)0x8825, (q15_t)0x2ce5, (q15_t)0x8822,
+  (q15_t)0x2cdf, (q15_t)0x8820, (q15_t)0x2cd9, (q15_t)0x881e, (q15_t)0x2cd3, (q15_t)0x881c, (q15_t)0x2ccd, (q15_t)0x881a,
+  (q15_t)0x2cc8, (q15_t)0x8817, (q15_t)0x2cc2, (q15_t)0x8815, (q15_t)0x2cbc, (q15_t)0x8813, (q15_t)0x2cb6, (q15_t)0x8811,
+  (q15_t)0x2cb0, (q15_t)0x880f, (q15_t)0x2caa, (q15_t)0x880c, (q15_t)0x2ca4, (q15_t)0x880a, (q15_t)0x2c9e, (q15_t)0x8808,
+  (q15_t)0x2c98, (q15_t)0x8806, (q15_t)0x2c93, (q15_t)0x8804, (q15_t)0x2c8d, (q15_t)0x8801, (q15_t)0x2c87, (q15_t)0x87ff,
+  (q15_t)0x2c81, (q15_t)0x87fd, (q15_t)0x2c7b, (q15_t)0x87fb, (q15_t)0x2c75, (q15_t)0x87f9, (q15_t)0x2c6f, (q15_t)0x87f6,
+  (q15_t)0x2c69, (q15_t)0x87f4, (q15_t)0x2c63, (q15_t)0x87f2, (q15_t)0x2c5e, (q15_t)0x87f0, (q15_t)0x2c58, (q15_t)0x87ee,
+  (q15_t)0x2c52, (q15_t)0x87ec, (q15_t)0x2c4c, (q15_t)0x87e9, (q15_t)0x2c46, (q15_t)0x87e7, (q15_t)0x2c40, (q15_t)0x87e5,
+  (q15_t)0x2c3a, (q15_t)0x87e3, (q15_t)0x2c34, (q15_t)0x87e1, (q15_t)0x2c2e, (q15_t)0x87df, (q15_t)0x2c29, (q15_t)0x87dc,
+  (q15_t)0x2c23, (q15_t)0x87da, (q15_t)0x2c1d, (q15_t)0x87d8, (q15_t)0x2c17, (q15_t)0x87d6, (q15_t)0x2c11, (q15_t)0x87d4,
+  (q15_t)0x2c0b, (q15_t)0x87d2, (q15_t)0x2c05, (q15_t)0x87cf, (q15_t)0x2bff, (q15_t)0x87cd, (q15_t)0x2bf9, (q15_t)0x87cb,
+  (q15_t)0x2bf3, (q15_t)0x87c9, (q15_t)0x2bee, (q15_t)0x87c7, (q15_t)0x2be8, (q15_t)0x87c5, (q15_t)0x2be2, (q15_t)0x87c2,
+  (q15_t)0x2bdc, (q15_t)0x87c0, (q15_t)0x2bd6, (q15_t)0x87be, (q15_t)0x2bd0, (q15_t)0x87bc, (q15_t)0x2bca, (q15_t)0x87ba,
+  (q15_t)0x2bc4, (q15_t)0x87b8, (q15_t)0x2bbe, (q15_t)0x87b6, (q15_t)0x2bb8, (q15_t)0x87b3, (q15_t)0x2bb2, (q15_t)0x87b1,
+  (q15_t)0x2bad, (q15_t)0x87af, (q15_t)0x2ba7, (q15_t)0x87ad, (q15_t)0x2ba1, (q15_t)0x87ab, (q15_t)0x2b9b, (q15_t)0x87a9,
+  (q15_t)0x2b95, (q15_t)0x87a7, (q15_t)0x2b8f, (q15_t)0x87a4, (q15_t)0x2b89, (q15_t)0x87a2, (q15_t)0x2b83, (q15_t)0x87a0,
+  (q15_t)0x2b7d, (q15_t)0x879e, (q15_t)0x2b77, (q15_t)0x879c, (q15_t)0x2b71, (q15_t)0x879a, (q15_t)0x2b6c, (q15_t)0x8798,
+  (q15_t)0x2b66, (q15_t)0x8795, (q15_t)0x2b60, (q15_t)0x8793, (q15_t)0x2b5a, (q15_t)0x8791, (q15_t)0x2b54, (q15_t)0x878f,
+  (q15_t)0x2b4e, (q15_t)0x878d, (q15_t)0x2b48, (q15_t)0x878b, (q15_t)0x2b42, (q15_t)0x8789, (q15_t)0x2b3c, (q15_t)0x8787,
+  (q15_t)0x2b36, (q15_t)0x8784, (q15_t)0x2b30, (q15_t)0x8782, (q15_t)0x2b2b, (q15_t)0x8780, (q15_t)0x2b25, (q15_t)0x877e,
+  (q15_t)0x2b1f, (q15_t)0x877c, (q15_t)0x2b19, (q15_t)0x877a, (q15_t)0x2b13, (q15_t)0x8778, (q15_t)0x2b0d, (q15_t)0x8776,
+  (q15_t)0x2b07, (q15_t)0x8774, (q15_t)0x2b01, (q15_t)0x8771, (q15_t)0x2afb, (q15_t)0x876f, (q15_t)0x2af5, (q15_t)0x876d,
+  (q15_t)0x2aef, (q15_t)0x876b, (q15_t)0x2ae9, (q15_t)0x8769, (q15_t)0x2ae4, (q15_t)0x8767, (q15_t)0x2ade, (q15_t)0x8765,
+  (q15_t)0x2ad8, (q15_t)0x8763, (q15_t)0x2ad2, (q15_t)0x8761, (q15_t)0x2acc, (q15_t)0x875e, (q15_t)0x2ac6, (q15_t)0x875c,
+  (q15_t)0x2ac0, (q15_t)0x875a, (q15_t)0x2aba, (q15_t)0x8758, (q15_t)0x2ab4, (q15_t)0x8756, (q15_t)0x2aae, (q15_t)0x8754,
+  (q15_t)0x2aa8, (q15_t)0x8752, (q15_t)0x2aa2, (q15_t)0x8750, (q15_t)0x2a9c, (q15_t)0x874e, (q15_t)0x2a97, (q15_t)0x874c,
+  (q15_t)0x2a91, (q15_t)0x874a, (q15_t)0x2a8b, (q15_t)0x8747, (q15_t)0x2a85, (q15_t)0x8745, (q15_t)0x2a7f, (q15_t)0x8743,
+  (q15_t)0x2a79, (q15_t)0x8741, (q15_t)0x2a73, (q15_t)0x873f, (q15_t)0x2a6d, (q15_t)0x873d, (q15_t)0x2a67, (q15_t)0x873b,
+  (q15_t)0x2a61, (q15_t)0x8739, (q15_t)0x2a5b, (q15_t)0x8737, (q15_t)0x2a55, (q15_t)0x8735, (q15_t)0x2a4f, (q15_t)0x8733,
+  (q15_t)0x2a49, (q15_t)0x8731, (q15_t)0x2a44, (q15_t)0x872e, (q15_t)0x2a3e, (q15_t)0x872c, (q15_t)0x2a38, (q15_t)0x872a,
+  (q15_t)0x2a32, (q15_t)0x8728, (q15_t)0x2a2c, (q15_t)0x8726, (q15_t)0x2a26, (q15_t)0x8724, (q15_t)0x2a20, (q15_t)0x8722,
+  (q15_t)0x2a1a, (q15_t)0x8720, (q15_t)0x2a14, (q15_t)0x871e, (q15_t)0x2a0e, (q15_t)0x871c, (q15_t)0x2a08, (q15_t)0x871a,
+  (q15_t)0x2a02, (q15_t)0x8718, (q15_t)0x29fc, (q15_t)0x8716, (q15_t)0x29f6, (q15_t)0x8714, (q15_t)0x29f0, (q15_t)0x8712,
+  (q15_t)0x29eb, (q15_t)0x870f, (q15_t)0x29e5, (q15_t)0x870d, (q15_t)0x29df, (q15_t)0x870b, (q15_t)0x29d9, (q15_t)0x8709,
+  (q15_t)0x29d3, (q15_t)0x8707, (q15_t)0x29cd, (q15_t)0x8705, (q15_t)0x29c7, (q15_t)0x8703, (q15_t)0x29c1, (q15_t)0x8701,
+  (q15_t)0x29bb, (q15_t)0x86ff, (q15_t)0x29b5, (q15_t)0x86fd, (q15_t)0x29af, (q15_t)0x86fb, (q15_t)0x29a9, (q15_t)0x86f9,
+  (q15_t)0x29a3, (q15_t)0x86f7, (q15_t)0x299d, (q15_t)0x86f5, (q15_t)0x2997, (q15_t)0x86f3, (q15_t)0x2991, (q15_t)0x86f1,
+  (q15_t)0x298b, (q15_t)0x86ef, (q15_t)0x2986, (q15_t)0x86ed, (q15_t)0x2980, (q15_t)0x86eb, (q15_t)0x297a, (q15_t)0x86e9,
+  (q15_t)0x2974, (q15_t)0x86e7, (q15_t)0x296e, (q15_t)0x86e4, (q15_t)0x2968, (q15_t)0x86e2, (q15_t)0x2962, (q15_t)0x86e0,
+  (q15_t)0x295c, (q15_t)0x86de, (q15_t)0x2956, (q15_t)0x86dc, (q15_t)0x2950, (q15_t)0x86da, (q15_t)0x294a, (q15_t)0x86d8,
+  (q15_t)0x2944, (q15_t)0x86d6, (q15_t)0x293e, (q15_t)0x86d4, (q15_t)0x2938, (q15_t)0x86d2, (q15_t)0x2932, (q15_t)0x86d0,
+  (q15_t)0x292c, (q15_t)0x86ce, (q15_t)0x2926, (q15_t)0x86cc, (q15_t)0x2920, (q15_t)0x86ca, (q15_t)0x291b, (q15_t)0x86c8,
+  (q15_t)0x2915, (q15_t)0x86c6, (q15_t)0x290f, (q15_t)0x86c4, (q15_t)0x2909, (q15_t)0x86c2, (q15_t)0x2903, (q15_t)0x86c0,
+  (q15_t)0x28fd, (q15_t)0x86be, (q15_t)0x28f7, (q15_t)0x86bc, (q15_t)0x28f1, (q15_t)0x86ba, (q15_t)0x28eb, (q15_t)0x86b8,
+  (q15_t)0x28e5, (q15_t)0x86b6, (q15_t)0x28df, (q15_t)0x86b4, (q15_t)0x28d9, (q15_t)0x86b2, (q15_t)0x28d3, (q15_t)0x86b0,
+  (q15_t)0x28cd, (q15_t)0x86ae, (q15_t)0x28c7, (q15_t)0x86ac, (q15_t)0x28c1, (q15_t)0x86aa, (q15_t)0x28bb, (q15_t)0x86a8,
+  (q15_t)0x28b5, (q15_t)0x86a6, (q15_t)0x28af, (q15_t)0x86a4, (q15_t)0x28a9, (q15_t)0x86a2, (q15_t)0x28a3, (q15_t)0x86a0,
+  (q15_t)0x289d, (q15_t)0x869e, (q15_t)0x2898, (q15_t)0x869c, (q15_t)0x2892, (q15_t)0x869a, (q15_t)0x288c, (q15_t)0x8698,
+  (q15_t)0x2886, (q15_t)0x8696, (q15_t)0x2880, (q15_t)0x8694, (q15_t)0x287a, (q15_t)0x8692, (q15_t)0x2874, (q15_t)0x8690,
+  (q15_t)0x286e, (q15_t)0x868e, (q15_t)0x2868, (q15_t)0x868c, (q15_t)0x2862, (q15_t)0x868a, (q15_t)0x285c, (q15_t)0x8688,
+  (q15_t)0x2856, (q15_t)0x8686, (q15_t)0x2850, (q15_t)0x8684, (q15_t)0x284a, (q15_t)0x8682, (q15_t)0x2844, (q15_t)0x8680,
+  (q15_t)0x283e, (q15_t)0x867e, (q15_t)0x2838, (q15_t)0x867c, (q15_t)0x2832, (q15_t)0x867a, (q15_t)0x282c, (q15_t)0x8678,
+  (q15_t)0x2826, (q15_t)0x8676, (q15_t)0x2820, (q15_t)0x8674, (q15_t)0x281a, (q15_t)0x8672, (q15_t)0x2814, (q15_t)0x8670,
+  (q15_t)0x280e, (q15_t)0x866e, (q15_t)0x2808, (q15_t)0x866d, (q15_t)0x2802, (q15_t)0x866b, (q15_t)0x27fc, (q15_t)0x8669,
+  (q15_t)0x27f6, (q15_t)0x8667, (q15_t)0x27f1, (q15_t)0x8665, (q15_t)0x27eb, (q15_t)0x8663, (q15_t)0x27e5, (q15_t)0x8661,
+  (q15_t)0x27df, (q15_t)0x865f, (q15_t)0x27d9, (q15_t)0x865d, (q15_t)0x27d3, (q15_t)0x865b, (q15_t)0x27cd, (q15_t)0x8659,
+  (q15_t)0x27c7, (q15_t)0x8657, (q15_t)0x27c1, (q15_t)0x8655, (q15_t)0x27bb, (q15_t)0x8653, (q15_t)0x27b5, (q15_t)0x8651,
+  (q15_t)0x27af, (q15_t)0x864f, (q15_t)0x27a9, (q15_t)0x864d, (q15_t)0x27a3, (q15_t)0x864b, (q15_t)0x279d, (q15_t)0x8649,
+  (q15_t)0x2797, (q15_t)0x8647, (q15_t)0x2791, (q15_t)0x8645, (q15_t)0x278b, (q15_t)0x8644, (q15_t)0x2785, (q15_t)0x8642,
+  (q15_t)0x277f, (q15_t)0x8640, (q15_t)0x2779, (q15_t)0x863e, (q15_t)0x2773, (q15_t)0x863c, (q15_t)0x276d, (q15_t)0x863a,
+  (q15_t)0x2767, (q15_t)0x8638, (q15_t)0x2761, (q15_t)0x8636, (q15_t)0x275b, (q15_t)0x8634, (q15_t)0x2755, (q15_t)0x8632,
+  (q15_t)0x274f, (q15_t)0x8630, (q15_t)0x2749, (q15_t)0x862e, (q15_t)0x2743, (q15_t)0x862c, (q15_t)0x273d, (q15_t)0x862a,
+  (q15_t)0x2737, (q15_t)0x8628, (q15_t)0x2731, (q15_t)0x8627, (q15_t)0x272b, (q15_t)0x8625, (q15_t)0x2725, (q15_t)0x8623,
+  (q15_t)0x271f, (q15_t)0x8621, (q15_t)0x2719, (q15_t)0x861f, (q15_t)0x2713, (q15_t)0x861d, (q15_t)0x270d, (q15_t)0x861b,
+  (q15_t)0x2707, (q15_t)0x8619, (q15_t)0x2701, (q15_t)0x8617, (q15_t)0x26fb, (q15_t)0x8615, (q15_t)0x26f5, (q15_t)0x8613,
+  (q15_t)0x26ef, (q15_t)0x8611, (q15_t)0x26e9, (q15_t)0x8610, (q15_t)0x26e4, (q15_t)0x860e, (q15_t)0x26de, (q15_t)0x860c,
+  (q15_t)0x26d8, (q15_t)0x860a, (q15_t)0x26d2, (q15_t)0x8608, (q15_t)0x26cc, (q15_t)0x8606, (q15_t)0x26c6, (q15_t)0x8604,
+  (q15_t)0x26c0, (q15_t)0x8602, (q15_t)0x26ba, (q15_t)0x8600, (q15_t)0x26b4, (q15_t)0x85fe, (q15_t)0x26ae, (q15_t)0x85fc,
+  (q15_t)0x26a8, (q15_t)0x85fb, (q15_t)0x26a2, (q15_t)0x85f9, (q15_t)0x269c, (q15_t)0x85f7, (q15_t)0x2696, (q15_t)0x85f5,
+  (q15_t)0x2690, (q15_t)0x85f3, (q15_t)0x268a, (q15_t)0x85f1, (q15_t)0x2684, (q15_t)0x85ef, (q15_t)0x267e, (q15_t)0x85ed,
+  (q15_t)0x2678, (q15_t)0x85eb, (q15_t)0x2672, (q15_t)0x85ea, (q15_t)0x266c, (q15_t)0x85e8, (q15_t)0x2666, (q15_t)0x85e6,
+  (q15_t)0x2660, (q15_t)0x85e4, (q15_t)0x265a, (q15_t)0x85e2, (q15_t)0x2654, (q15_t)0x85e0, (q15_t)0x264e, (q15_t)0x85de,
+  (q15_t)0x2648, (q15_t)0x85dc, (q15_t)0x2642, (q15_t)0x85da, (q15_t)0x263c, (q15_t)0x85d9, (q15_t)0x2636, (q15_t)0x85d7,
+  (q15_t)0x2630, (q15_t)0x85d5, (q15_t)0x262a, (q15_t)0x85d3, (q15_t)0x2624, (q15_t)0x85d1, (q15_t)0x261e, (q15_t)0x85cf,
+  (q15_t)0x2618, (q15_t)0x85cd, (q15_t)0x2612, (q15_t)0x85cb, (q15_t)0x260c, (q15_t)0x85ca, (q15_t)0x2606, (q15_t)0x85c8,
+  (q15_t)0x2600, (q15_t)0x85c6, (q15_t)0x25fa, (q15_t)0x85c4, (q15_t)0x25f4, (q15_t)0x85c2, (q15_t)0x25ee, (q15_t)0x85c0,
+  (q15_t)0x25e8, (q15_t)0x85be, (q15_t)0x25e2, (q15_t)0x85bd, (q15_t)0x25dc, (q15_t)0x85bb, (q15_t)0x25d6, (q15_t)0x85b9,
+  (q15_t)0x25d0, (q15_t)0x85b7, (q15_t)0x25ca, (q15_t)0x85b5, (q15_t)0x25c4, (q15_t)0x85b3, (q15_t)0x25be, (q15_t)0x85b1,
+  (q15_t)0x25b8, (q15_t)0x85b0, (q15_t)0x25b2, (q15_t)0x85ae, (q15_t)0x25ac, (q15_t)0x85ac, (q15_t)0x25a6, (q15_t)0x85aa,
+  (q15_t)0x25a0, (q15_t)0x85a8, (q15_t)0x259a, (q15_t)0x85a6, (q15_t)0x2594, (q15_t)0x85a4, (q15_t)0x258e, (q15_t)0x85a3,
+  (q15_t)0x2588, (q15_t)0x85a1, (q15_t)0x2582, (q15_t)0x859f, (q15_t)0x257c, (q15_t)0x859d, (q15_t)0x2576, (q15_t)0x859b,
+  (q15_t)0x2570, (q15_t)0x8599, (q15_t)0x256a, (q15_t)0x8598, (q15_t)0x2564, (q15_t)0x8596, (q15_t)0x255e, (q15_t)0x8594,
+  (q15_t)0x2558, (q15_t)0x8592, (q15_t)0x2552, (q15_t)0x8590, (q15_t)0x254c, (q15_t)0x858e, (q15_t)0x2546, (q15_t)0x858d,
+  (q15_t)0x2540, (q15_t)0x858b, (q15_t)0x253a, (q15_t)0x8589, (q15_t)0x2534, (q15_t)0x8587, (q15_t)0x252e, (q15_t)0x8585,
+  (q15_t)0x2528, (q15_t)0x8583, (q15_t)0x2522, (q15_t)0x8582, (q15_t)0x251c, (q15_t)0x8580, (q15_t)0x2516, (q15_t)0x857e,
+  (q15_t)0x250f, (q15_t)0x857c, (q15_t)0x2509, (q15_t)0x857a, (q15_t)0x2503, (q15_t)0x8579, (q15_t)0x24fd, (q15_t)0x8577,
+  (q15_t)0x24f7, (q15_t)0x8575, (q15_t)0x24f1, (q15_t)0x8573, (q15_t)0x24eb, (q15_t)0x8571, (q15_t)0x24e5, (q15_t)0x856f,
+  (q15_t)0x24df, (q15_t)0x856e, (q15_t)0x24d9, (q15_t)0x856c, (q15_t)0x24d3, (q15_t)0x856a, (q15_t)0x24cd, (q15_t)0x8568,
+  (q15_t)0x24c7, (q15_t)0x8566, (q15_t)0x24c1, (q15_t)0x8565, (q15_t)0x24bb, (q15_t)0x8563, (q15_t)0x24b5, (q15_t)0x8561,
+  (q15_t)0x24af, (q15_t)0x855f, (q15_t)0x24a9, (q15_t)0x855d, (q15_t)0x24a3, (q15_t)0x855c, (q15_t)0x249d, (q15_t)0x855a,
+  (q15_t)0x2497, (q15_t)0x8558, (q15_t)0x2491, (q15_t)0x8556, (q15_t)0x248b, (q15_t)0x8554, (q15_t)0x2485, (q15_t)0x8553,
+  (q15_t)0x247f, (q15_t)0x8551, (q15_t)0x2479, (q15_t)0x854f, (q15_t)0x2473, (q15_t)0x854d, (q15_t)0x246d, (q15_t)0x854b,
+  (q15_t)0x2467, (q15_t)0x854a, (q15_t)0x2461, (q15_t)0x8548, (q15_t)0x245b, (q15_t)0x8546, (q15_t)0x2455, (q15_t)0x8544,
+  (q15_t)0x244f, (q15_t)0x8543, (q15_t)0x2449, (q15_t)0x8541, (q15_t)0x2443, (q15_t)0x853f, (q15_t)0x243d, (q15_t)0x853d,
+  (q15_t)0x2437, (q15_t)0x853b, (q15_t)0x2431, (q15_t)0x853a, (q15_t)0x242b, (q15_t)0x8538, (q15_t)0x2425, (q15_t)0x8536,
+  (q15_t)0x241f, (q15_t)0x8534, (q15_t)0x2419, (q15_t)0x8533, (q15_t)0x2413, (q15_t)0x8531, (q15_t)0x240d, (q15_t)0x852f,
+  (q15_t)0x2407, (q15_t)0x852d, (q15_t)0x2401, (q15_t)0x852b, (q15_t)0x23fa, (q15_t)0x852a, (q15_t)0x23f4, (q15_t)0x8528,
+  (q15_t)0x23ee, (q15_t)0x8526, (q15_t)0x23e8, (q15_t)0x8524, (q15_t)0x23e2, (q15_t)0x8523, (q15_t)0x23dc, (q15_t)0x8521,
+  (q15_t)0x23d6, (q15_t)0x851f, (q15_t)0x23d0, (q15_t)0x851d, (q15_t)0x23ca, (q15_t)0x851c, (q15_t)0x23c4, (q15_t)0x851a,
+  (q15_t)0x23be, (q15_t)0x8518, (q15_t)0x23b8, (q15_t)0x8516, (q15_t)0x23b2, (q15_t)0x8515, (q15_t)0x23ac, (q15_t)0x8513,
+  (q15_t)0x23a6, (q15_t)0x8511, (q15_t)0x23a0, (q15_t)0x850f, (q15_t)0x239a, (q15_t)0x850e, (q15_t)0x2394, (q15_t)0x850c,
+  (q15_t)0x238e, (q15_t)0x850a, (q15_t)0x2388, (q15_t)0x8508, (q15_t)0x2382, (q15_t)0x8507, (q15_t)0x237c, (q15_t)0x8505,
+  (q15_t)0x2376, (q15_t)0x8503, (q15_t)0x2370, (q15_t)0x8501, (q15_t)0x236a, (q15_t)0x8500, (q15_t)0x2364, (q15_t)0x84fe,
+  (q15_t)0x235e, (q15_t)0x84fc, (q15_t)0x2358, (q15_t)0x84fa, (q15_t)0x2352, (q15_t)0x84f9, (q15_t)0x234b, (q15_t)0x84f7,
+  (q15_t)0x2345, (q15_t)0x84f5, (q15_t)0x233f, (q15_t)0x84f4, (q15_t)0x2339, (q15_t)0x84f2, (q15_t)0x2333, (q15_t)0x84f0,
+  (q15_t)0x232d, (q15_t)0x84ee, (q15_t)0x2327, (q15_t)0x84ed, (q15_t)0x2321, (q15_t)0x84eb, (q15_t)0x231b, (q15_t)0x84e9,
+  (q15_t)0x2315, (q15_t)0x84e7, (q15_t)0x230f, (q15_t)0x84e6, (q15_t)0x2309, (q15_t)0x84e4, (q15_t)0x2303, (q15_t)0x84e2,
+  (q15_t)0x22fd, (q15_t)0x84e1, (q15_t)0x22f7, (q15_t)0x84df, (q15_t)0x22f1, (q15_t)0x84dd, (q15_t)0x22eb, (q15_t)0x84db,
+  (q15_t)0x22e5, (q15_t)0x84da, (q15_t)0x22df, (q15_t)0x84d8, (q15_t)0x22d9, (q15_t)0x84d6, (q15_t)0x22d3, (q15_t)0x84d5,
+  (q15_t)0x22cd, (q15_t)0x84d3, (q15_t)0x22c7, (q15_t)0x84d1, (q15_t)0x22c0, (q15_t)0x84cf, (q15_t)0x22ba, (q15_t)0x84ce,
+  (q15_t)0x22b4, (q15_t)0x84cc, (q15_t)0x22ae, (q15_t)0x84ca, (q15_t)0x22a8, (q15_t)0x84c9, (q15_t)0x22a2, (q15_t)0x84c7,
+  (q15_t)0x229c, (q15_t)0x84c5, (q15_t)0x2296, (q15_t)0x84c4, (q15_t)0x2290, (q15_t)0x84c2, (q15_t)0x228a, (q15_t)0x84c0,
+  (q15_t)0x2284, (q15_t)0x84be, (q15_t)0x227e, (q15_t)0x84bd, (q15_t)0x2278, (q15_t)0x84bb, (q15_t)0x2272, (q15_t)0x84b9,
+  (q15_t)0x226c, (q15_t)0x84b8, (q15_t)0x2266, (q15_t)0x84b6, (q15_t)0x2260, (q15_t)0x84b4, (q15_t)0x225a, (q15_t)0x84b3,
+  (q15_t)0x2254, (q15_t)0x84b1, (q15_t)0x224e, (q15_t)0x84af, (q15_t)0x2247, (q15_t)0x84ae, (q15_t)0x2241, (q15_t)0x84ac,
+  (q15_t)0x223b, (q15_t)0x84aa, (q15_t)0x2235, (q15_t)0x84a9, (q15_t)0x222f, (q15_t)0x84a7, (q15_t)0x2229, (q15_t)0x84a5,
+  (q15_t)0x2223, (q15_t)0x84a3, (q15_t)0x221d, (q15_t)0x84a2, (q15_t)0x2217, (q15_t)0x84a0, (q15_t)0x2211, (q15_t)0x849e,
+  (q15_t)0x220b, (q15_t)0x849d, (q15_t)0x2205, (q15_t)0x849b, (q15_t)0x21ff, (q15_t)0x8499, (q15_t)0x21f9, (q15_t)0x8498,
+  (q15_t)0x21f3, (q15_t)0x8496, (q15_t)0x21ed, (q15_t)0x8494, (q15_t)0x21e7, (q15_t)0x8493, (q15_t)0x21e1, (q15_t)0x8491,
+  (q15_t)0x21da, (q15_t)0x848f, (q15_t)0x21d4, (q15_t)0x848e, (q15_t)0x21ce, (q15_t)0x848c, (q15_t)0x21c8, (q15_t)0x848a,
+  (q15_t)0x21c2, (q15_t)0x8489, (q15_t)0x21bc, (q15_t)0x8487, (q15_t)0x21b6, (q15_t)0x8486, (q15_t)0x21b0, (q15_t)0x8484,
+  (q15_t)0x21aa, (q15_t)0x8482, (q15_t)0x21a4, (q15_t)0x8481, (q15_t)0x219e, (q15_t)0x847f, (q15_t)0x2198, (q15_t)0x847d,
+  (q15_t)0x2192, (q15_t)0x847c, (q15_t)0x218c, (q15_t)0x847a, (q15_t)0x2186, (q15_t)0x8478, (q15_t)0x2180, (q15_t)0x8477,
+  (q15_t)0x2179, (q15_t)0x8475, (q15_t)0x2173, (q15_t)0x8473, (q15_t)0x216d, (q15_t)0x8472, (q15_t)0x2167, (q15_t)0x8470,
+  (q15_t)0x2161, (q15_t)0x846e, (q15_t)0x215b, (q15_t)0x846d, (q15_t)0x2155, (q15_t)0x846b, (q15_t)0x214f, (q15_t)0x846a,
+  (q15_t)0x2149, (q15_t)0x8468, (q15_t)0x2143, (q15_t)0x8466, (q15_t)0x213d, (q15_t)0x8465, (q15_t)0x2137, (q15_t)0x8463,
+  (q15_t)0x2131, (q15_t)0x8461, (q15_t)0x212b, (q15_t)0x8460, (q15_t)0x2125, (q15_t)0x845e, (q15_t)0x211e, (q15_t)0x845d,
+  (q15_t)0x2118, (q15_t)0x845b, (q15_t)0x2112, (q15_t)0x8459, (q15_t)0x210c, (q15_t)0x8458, (q15_t)0x2106, (q15_t)0x8456,
+  (q15_t)0x2100, (q15_t)0x8454, (q15_t)0x20fa, (q15_t)0x8453, (q15_t)0x20f4, (q15_t)0x8451, (q15_t)0x20ee, (q15_t)0x8450,
+  (q15_t)0x20e8, (q15_t)0x844e, (q15_t)0x20e2, (q15_t)0x844c, (q15_t)0x20dc, (q15_t)0x844b, (q15_t)0x20d6, (q15_t)0x8449,
+  (q15_t)0x20d0, (q15_t)0x8447, (q15_t)0x20c9, (q15_t)0x8446, (q15_t)0x20c3, (q15_t)0x8444, (q15_t)0x20bd, (q15_t)0x8443,
+  (q15_t)0x20b7, (q15_t)0x8441, (q15_t)0x20b1, (q15_t)0x843f, (q15_t)0x20ab, (q15_t)0x843e, (q15_t)0x20a5, (q15_t)0x843c,
+  (q15_t)0x209f, (q15_t)0x843b, (q15_t)0x2099, (q15_t)0x8439, (q15_t)0x2093, (q15_t)0x8437, (q15_t)0x208d, (q15_t)0x8436,
+  (q15_t)0x2087, (q15_t)0x8434, (q15_t)0x2081, (q15_t)0x8433, (q15_t)0x207a, (q15_t)0x8431, (q15_t)0x2074, (q15_t)0x842f,
+  (q15_t)0x206e, (q15_t)0x842e, (q15_t)0x2068, (q15_t)0x842c, (q15_t)0x2062, (q15_t)0x842b, (q15_t)0x205c, (q15_t)0x8429,
+  (q15_t)0x2056, (q15_t)0x8427, (q15_t)0x2050, (q15_t)0x8426, (q15_t)0x204a, (q15_t)0x8424, (q15_t)0x2044, (q15_t)0x8423,
+  (q15_t)0x203e, (q15_t)0x8421, (q15_t)0x2038, (q15_t)0x8420, (q15_t)0x2032, (q15_t)0x841e, (q15_t)0x202b, (q15_t)0x841c,
+  (q15_t)0x2025, (q15_t)0x841b, (q15_t)0x201f, (q15_t)0x8419, (q15_t)0x2019, (q15_t)0x8418, (q15_t)0x2013, (q15_t)0x8416,
+  (q15_t)0x200d, (q15_t)0x8415, (q15_t)0x2007, (q15_t)0x8413, (q15_t)0x2001, (q15_t)0x8411, (q15_t)0x1ffb, (q15_t)0x8410,
+  (q15_t)0x1ff5, (q15_t)0x840e, (q15_t)0x1fef, (q15_t)0x840d, (q15_t)0x1fe9, (q15_t)0x840b, (q15_t)0x1fe2, (q15_t)0x840a,
+  (q15_t)0x1fdc, (q15_t)0x8408, (q15_t)0x1fd6, (q15_t)0x8406, (q15_t)0x1fd0, (q15_t)0x8405, (q15_t)0x1fca, (q15_t)0x8403,
+  (q15_t)0x1fc4, (q15_t)0x8402, (q15_t)0x1fbe, (q15_t)0x8400, (q15_t)0x1fb8, (q15_t)0x83ff, (q15_t)0x1fb2, (q15_t)0x83fd,
+  (q15_t)0x1fac, (q15_t)0x83fb, (q15_t)0x1fa6, (q15_t)0x83fa, (q15_t)0x1f9f, (q15_t)0x83f8, (q15_t)0x1f99, (q15_t)0x83f7,
+  (q15_t)0x1f93, (q15_t)0x83f5, (q15_t)0x1f8d, (q15_t)0x83f4, (q15_t)0x1f87, (q15_t)0x83f2, (q15_t)0x1f81, (q15_t)0x83f1,
+  (q15_t)0x1f7b, (q15_t)0x83ef, (q15_t)0x1f75, (q15_t)0x83ee, (q15_t)0x1f6f, (q15_t)0x83ec, (q15_t)0x1f69, (q15_t)0x83ea,
+  (q15_t)0x1f63, (q15_t)0x83e9, (q15_t)0x1f5d, (q15_t)0x83e7, (q15_t)0x1f56, (q15_t)0x83e6, (q15_t)0x1f50, (q15_t)0x83e4,
+  (q15_t)0x1f4a, (q15_t)0x83e3, (q15_t)0x1f44, (q15_t)0x83e1, (q15_t)0x1f3e, (q15_t)0x83e0, (q15_t)0x1f38, (q15_t)0x83de,
+  (q15_t)0x1f32, (q15_t)0x83dd, (q15_t)0x1f2c, (q15_t)0x83db, (q15_t)0x1f26, (q15_t)0x83da, (q15_t)0x1f20, (q15_t)0x83d8,
+  (q15_t)0x1f19, (q15_t)0x83d7, (q15_t)0x1f13, (q15_t)0x83d5, (q15_t)0x1f0d, (q15_t)0x83d3, (q15_t)0x1f07, (q15_t)0x83d2,
+  (q15_t)0x1f01, (q15_t)0x83d0, (q15_t)0x1efb, (q15_t)0x83cf, (q15_t)0x1ef5, (q15_t)0x83cd, (q15_t)0x1eef, (q15_t)0x83cc,
+  (q15_t)0x1ee9, (q15_t)0x83ca, (q15_t)0x1ee3, (q15_t)0x83c9, (q15_t)0x1edd, (q15_t)0x83c7, (q15_t)0x1ed6, (q15_t)0x83c6,
+  (q15_t)0x1ed0, (q15_t)0x83c4, (q15_t)0x1eca, (q15_t)0x83c3, (q15_t)0x1ec4, (q15_t)0x83c1, (q15_t)0x1ebe, (q15_t)0x83c0,
+  (q15_t)0x1eb8, (q15_t)0x83be, (q15_t)0x1eb2, (q15_t)0x83bd, (q15_t)0x1eac, (q15_t)0x83bb, (q15_t)0x1ea6, (q15_t)0x83ba,
+  (q15_t)0x1ea0, (q15_t)0x83b8, (q15_t)0x1e99, (q15_t)0x83b7, (q15_t)0x1e93, (q15_t)0x83b5, (q15_t)0x1e8d, (q15_t)0x83b4,
+  (q15_t)0x1e87, (q15_t)0x83b2, (q15_t)0x1e81, (q15_t)0x83b1, (q15_t)0x1e7b, (q15_t)0x83af, (q15_t)0x1e75, (q15_t)0x83ae,
+  (q15_t)0x1e6f, (q15_t)0x83ac, (q15_t)0x1e69, (q15_t)0x83ab, (q15_t)0x1e62, (q15_t)0x83a9, (q15_t)0x1e5c, (q15_t)0x83a8,
+  (q15_t)0x1e56, (q15_t)0x83a6, (q15_t)0x1e50, (q15_t)0x83a5, (q15_t)0x1e4a, (q15_t)0x83a3, (q15_t)0x1e44, (q15_t)0x83a2,
+  (q15_t)0x1e3e, (q15_t)0x83a0, (q15_t)0x1e38, (q15_t)0x839f, (q15_t)0x1e32, (q15_t)0x839d, (q15_t)0x1e2c, (q15_t)0x839c,
+  (q15_t)0x1e25, (q15_t)0x839a, (q15_t)0x1e1f, (q15_t)0x8399, (q15_t)0x1e19, (q15_t)0x8397, (q15_t)0x1e13, (q15_t)0x8396,
+  (q15_t)0x1e0d, (q15_t)0x8394, (q15_t)0x1e07, (q15_t)0x8393, (q15_t)0x1e01, (q15_t)0x8392, (q15_t)0x1dfb, (q15_t)0x8390,
+  (q15_t)0x1df5, (q15_t)0x838f, (q15_t)0x1dee, (q15_t)0x838d, (q15_t)0x1de8, (q15_t)0x838c, (q15_t)0x1de2, (q15_t)0x838a,
+  (q15_t)0x1ddc, (q15_t)0x8389, (q15_t)0x1dd6, (q15_t)0x8387, (q15_t)0x1dd0, (q15_t)0x8386, (q15_t)0x1dca, (q15_t)0x8384,
+  (q15_t)0x1dc4, (q15_t)0x8383, (q15_t)0x1dbe, (q15_t)0x8381, (q15_t)0x1db7, (q15_t)0x8380, (q15_t)0x1db1, (q15_t)0x837e,
+  (q15_t)0x1dab, (q15_t)0x837d, (q15_t)0x1da5, (q15_t)0x837c, (q15_t)0x1d9f, (q15_t)0x837a, (q15_t)0x1d99, (q15_t)0x8379,
+  (q15_t)0x1d93, (q15_t)0x8377, (q15_t)0x1d8d, (q15_t)0x8376, (q15_t)0x1d87, (q15_t)0x8374, (q15_t)0x1d80, (q15_t)0x8373,
+  (q15_t)0x1d7a, (q15_t)0x8371, (q15_t)0x1d74, (q15_t)0x8370, (q15_t)0x1d6e, (q15_t)0x836f, (q15_t)0x1d68, (q15_t)0x836d,
+  (q15_t)0x1d62, (q15_t)0x836c, (q15_t)0x1d5c, (q15_t)0x836a, (q15_t)0x1d56, (q15_t)0x8369, (q15_t)0x1d50, (q15_t)0x8367,
+  (q15_t)0x1d49, (q15_t)0x8366, (q15_t)0x1d43, (q15_t)0x8364, (q15_t)0x1d3d, (q15_t)0x8363, (q15_t)0x1d37, (q15_t)0x8362,
+  (q15_t)0x1d31, (q15_t)0x8360, (q15_t)0x1d2b, (q15_t)0x835f, (q15_t)0x1d25, (q15_t)0x835d, (q15_t)0x1d1f, (q15_t)0x835c,
+  (q15_t)0x1d18, (q15_t)0x835a, (q15_t)0x1d12, (q15_t)0x8359, (q15_t)0x1d0c, (q15_t)0x8358, (q15_t)0x1d06, (q15_t)0x8356,
+  (q15_t)0x1d00, (q15_t)0x8355, (q15_t)0x1cfa, (q15_t)0x8353, (q15_t)0x1cf4, (q15_t)0x8352, (q15_t)0x1cee, (q15_t)0x8350,
+  (q15_t)0x1ce8, (q15_t)0x834f, (q15_t)0x1ce1, (q15_t)0x834e, (q15_t)0x1cdb, (q15_t)0x834c, (q15_t)0x1cd5, (q15_t)0x834b,
+  (q15_t)0x1ccf, (q15_t)0x8349, (q15_t)0x1cc9, (q15_t)0x8348, (q15_t)0x1cc3, (q15_t)0x8347, (q15_t)0x1cbd, (q15_t)0x8345,
+  (q15_t)0x1cb7, (q15_t)0x8344, (q15_t)0x1cb0, (q15_t)0x8342, (q15_t)0x1caa, (q15_t)0x8341, (q15_t)0x1ca4, (q15_t)0x833f,
+  (q15_t)0x1c9e, (q15_t)0x833e, (q15_t)0x1c98, (q15_t)0x833d, (q15_t)0x1c92, (q15_t)0x833b, (q15_t)0x1c8c, (q15_t)0x833a,
+  (q15_t)0x1c86, (q15_t)0x8338, (q15_t)0x1c7f, (q15_t)0x8337, (q15_t)0x1c79, (q15_t)0x8336, (q15_t)0x1c73, (q15_t)0x8334,
+  (q15_t)0x1c6d, (q15_t)0x8333, (q15_t)0x1c67, (q15_t)0x8331, (q15_t)0x1c61, (q15_t)0x8330, (q15_t)0x1c5b, (q15_t)0x832f,
+  (q15_t)0x1c55, (q15_t)0x832d, (q15_t)0x1c4e, (q15_t)0x832c, (q15_t)0x1c48, (q15_t)0x832b, (q15_t)0x1c42, (q15_t)0x8329,
+  (q15_t)0x1c3c, (q15_t)0x8328, (q15_t)0x1c36, (q15_t)0x8326, (q15_t)0x1c30, (q15_t)0x8325, (q15_t)0x1c2a, (q15_t)0x8324,
+  (q15_t)0x1c24, (q15_t)0x8322, (q15_t)0x1c1d, (q15_t)0x8321, (q15_t)0x1c17, (q15_t)0x831f, (q15_t)0x1c11, (q15_t)0x831e,
+  (q15_t)0x1c0b, (q15_t)0x831d, (q15_t)0x1c05, (q15_t)0x831b, (q15_t)0x1bff, (q15_t)0x831a, (q15_t)0x1bf9, (q15_t)0x8319,
+  (q15_t)0x1bf2, (q15_t)0x8317, (q15_t)0x1bec, (q15_t)0x8316, (q15_t)0x1be6, (q15_t)0x8314, (q15_t)0x1be0, (q15_t)0x8313,
+  (q15_t)0x1bda, (q15_t)0x8312, (q15_t)0x1bd4, (q15_t)0x8310, (q15_t)0x1bce, (q15_t)0x830f, (q15_t)0x1bc8, (q15_t)0x830e,
+  (q15_t)0x1bc1, (q15_t)0x830c, (q15_t)0x1bbb, (q15_t)0x830b, (q15_t)0x1bb5, (q15_t)0x830a, (q15_t)0x1baf, (q15_t)0x8308,
+  (q15_t)0x1ba9, (q15_t)0x8307, (q15_t)0x1ba3, (q15_t)0x8305, (q15_t)0x1b9d, (q15_t)0x8304, (q15_t)0x1b96, (q15_t)0x8303,
+  (q15_t)0x1b90, (q15_t)0x8301, (q15_t)0x1b8a, (q15_t)0x8300, (q15_t)0x1b84, (q15_t)0x82ff, (q15_t)0x1b7e, (q15_t)0x82fd,
+  (q15_t)0x1b78, (q15_t)0x82fc, (q15_t)0x1b72, (q15_t)0x82fb, (q15_t)0x1b6c, (q15_t)0x82f9, (q15_t)0x1b65, (q15_t)0x82f8,
+  (q15_t)0x1b5f, (q15_t)0x82f7, (q15_t)0x1b59, (q15_t)0x82f5, (q15_t)0x1b53, (q15_t)0x82f4, (q15_t)0x1b4d, (q15_t)0x82f3,
+  (q15_t)0x1b47, (q15_t)0x82f1, (q15_t)0x1b41, (q15_t)0x82f0, (q15_t)0x1b3a, (q15_t)0x82ef, (q15_t)0x1b34, (q15_t)0x82ed,
+  (q15_t)0x1b2e, (q15_t)0x82ec, (q15_t)0x1b28, (q15_t)0x82eb, (q15_t)0x1b22, (q15_t)0x82e9, (q15_t)0x1b1c, (q15_t)0x82e8,
+  (q15_t)0x1b16, (q15_t)0x82e7, (q15_t)0x1b0f, (q15_t)0x82e5, (q15_t)0x1b09, (q15_t)0x82e4, (q15_t)0x1b03, (q15_t)0x82e3,
+  (q15_t)0x1afd, (q15_t)0x82e1, (q15_t)0x1af7, (q15_t)0x82e0, (q15_t)0x1af1, (q15_t)0x82df, (q15_t)0x1aeb, (q15_t)0x82dd,
+  (q15_t)0x1ae4, (q15_t)0x82dc, (q15_t)0x1ade, (q15_t)0x82db, (q15_t)0x1ad8, (q15_t)0x82d9, (q15_t)0x1ad2, (q15_t)0x82d8,
+  (q15_t)0x1acc, (q15_t)0x82d7, (q15_t)0x1ac6, (q15_t)0x82d5, (q15_t)0x1ac0, (q15_t)0x82d4, (q15_t)0x1ab9, (q15_t)0x82d3,
+  (q15_t)0x1ab3, (q15_t)0x82d1, (q15_t)0x1aad, (q15_t)0x82d0, (q15_t)0x1aa7, (q15_t)0x82cf, (q15_t)0x1aa1, (q15_t)0x82ce,
+  (q15_t)0x1a9b, (q15_t)0x82cc, (q15_t)0x1a95, (q15_t)0x82cb, (q15_t)0x1a8e, (q15_t)0x82ca, (q15_t)0x1a88, (q15_t)0x82c8,
+  (q15_t)0x1a82, (q15_t)0x82c7, (q15_t)0x1a7c, (q15_t)0x82c6, (q15_t)0x1a76, (q15_t)0x82c4, (q15_t)0x1a70, (q15_t)0x82c3,
+  (q15_t)0x1a6a, (q15_t)0x82c2, (q15_t)0x1a63, (q15_t)0x82c1, (q15_t)0x1a5d, (q15_t)0x82bf, (q15_t)0x1a57, (q15_t)0x82be,
+  (q15_t)0x1a51, (q15_t)0x82bd, (q15_t)0x1a4b, (q15_t)0x82bb, (q15_t)0x1a45, (q15_t)0x82ba, (q15_t)0x1a3e, (q15_t)0x82b9,
+  (q15_t)0x1a38, (q15_t)0x82b7, (q15_t)0x1a32, (q15_t)0x82b6, (q15_t)0x1a2c, (q15_t)0x82b5, (q15_t)0x1a26, (q15_t)0x82b4,
+  (q15_t)0x1a20, (q15_t)0x82b2, (q15_t)0x1a1a, (q15_t)0x82b1, (q15_t)0x1a13, (q15_t)0x82b0, (q15_t)0x1a0d, (q15_t)0x82ae,
+  (q15_t)0x1a07, (q15_t)0x82ad, (q15_t)0x1a01, (q15_t)0x82ac, (q15_t)0x19fb, (q15_t)0x82ab, (q15_t)0x19f5, (q15_t)0x82a9,
+  (q15_t)0x19ef, (q15_t)0x82a8, (q15_t)0x19e8, (q15_t)0x82a7, (q15_t)0x19e2, (q15_t)0x82a6, (q15_t)0x19dc, (q15_t)0x82a4,
+  (q15_t)0x19d6, (q15_t)0x82a3, (q15_t)0x19d0, (q15_t)0x82a2, (q15_t)0x19ca, (q15_t)0x82a0, (q15_t)0x19c3, (q15_t)0x829f,
+  (q15_t)0x19bd, (q15_t)0x829e, (q15_t)0x19b7, (q15_t)0x829d, (q15_t)0x19b1, (q15_t)0x829b, (q15_t)0x19ab, (q15_t)0x829a,
+  (q15_t)0x19a5, (q15_t)0x8299, (q15_t)0x199f, (q15_t)0x8298, (q15_t)0x1998, (q15_t)0x8296, (q15_t)0x1992, (q15_t)0x8295,
+  (q15_t)0x198c, (q15_t)0x8294, (q15_t)0x1986, (q15_t)0x8293, (q15_t)0x1980, (q15_t)0x8291, (q15_t)0x197a, (q15_t)0x8290,
+  (q15_t)0x1973, (q15_t)0x828f, (q15_t)0x196d, (q15_t)0x828e, (q15_t)0x1967, (q15_t)0x828c, (q15_t)0x1961, (q15_t)0x828b,
+  (q15_t)0x195b, (q15_t)0x828a, (q15_t)0x1955, (q15_t)0x8289, (q15_t)0x194e, (q15_t)0x8287, (q15_t)0x1948, (q15_t)0x8286,
+  (q15_t)0x1942, (q15_t)0x8285, (q15_t)0x193c, (q15_t)0x8284, (q15_t)0x1936, (q15_t)0x8282, (q15_t)0x1930, (q15_t)0x8281,
+  (q15_t)0x192a, (q15_t)0x8280, (q15_t)0x1923, (q15_t)0x827f, (q15_t)0x191d, (q15_t)0x827e, (q15_t)0x1917, (q15_t)0x827c,
+  (q15_t)0x1911, (q15_t)0x827b, (q15_t)0x190b, (q15_t)0x827a, (q15_t)0x1905, (q15_t)0x8279, (q15_t)0x18fe, (q15_t)0x8277,
+  (q15_t)0x18f8, (q15_t)0x8276, (q15_t)0x18f2, (q15_t)0x8275, (q15_t)0x18ec, (q15_t)0x8274, (q15_t)0x18e6, (q15_t)0x8272,
+  (q15_t)0x18e0, (q15_t)0x8271, (q15_t)0x18d9, (q15_t)0x8270, (q15_t)0x18d3, (q15_t)0x826f, (q15_t)0x18cd, (q15_t)0x826e,
+  (q15_t)0x18c7, (q15_t)0x826c, (q15_t)0x18c1, (q15_t)0x826b, (q15_t)0x18bb, (q15_t)0x826a, (q15_t)0x18b4, (q15_t)0x8269,
+  (q15_t)0x18ae, (q15_t)0x8268, (q15_t)0x18a8, (q15_t)0x8266, (q15_t)0x18a2, (q15_t)0x8265, (q15_t)0x189c, (q15_t)0x8264,
+  (q15_t)0x1896, (q15_t)0x8263, (q15_t)0x188f, (q15_t)0x8261, (q15_t)0x1889, (q15_t)0x8260, (q15_t)0x1883, (q15_t)0x825f,
+  (q15_t)0x187d, (q15_t)0x825e, (q15_t)0x1877, (q15_t)0x825d, (q15_t)0x1871, (q15_t)0x825b, (q15_t)0x186a, (q15_t)0x825a,
+  (q15_t)0x1864, (q15_t)0x8259, (q15_t)0x185e, (q15_t)0x8258, (q15_t)0x1858, (q15_t)0x8257, (q15_t)0x1852, (q15_t)0x8255,
+  (q15_t)0x184c, (q15_t)0x8254, (q15_t)0x1845, (q15_t)0x8253, (q15_t)0x183f, (q15_t)0x8252, (q15_t)0x1839, (q15_t)0x8251,
+  (q15_t)0x1833, (q15_t)0x8250, (q15_t)0x182d, (q15_t)0x824e, (q15_t)0x1827, (q15_t)0x824d, (q15_t)0x1820, (q15_t)0x824c,
+  (q15_t)0x181a, (q15_t)0x824b, (q15_t)0x1814, (q15_t)0x824a, (q15_t)0x180e, (q15_t)0x8248, (q15_t)0x1808, (q15_t)0x8247,
+  (q15_t)0x1802, (q15_t)0x8246, (q15_t)0x17fb, (q15_t)0x8245, (q15_t)0x17f5, (q15_t)0x8244, (q15_t)0x17ef, (q15_t)0x8243,
+  (q15_t)0x17e9, (q15_t)0x8241, (q15_t)0x17e3, (q15_t)0x8240, (q15_t)0x17dd, (q15_t)0x823f, (q15_t)0x17d6, (q15_t)0x823e,
+  (q15_t)0x17d0, (q15_t)0x823d, (q15_t)0x17ca, (q15_t)0x823b, (q15_t)0x17c4, (q15_t)0x823a, (q15_t)0x17be, (q15_t)0x8239,
+  (q15_t)0x17b7, (q15_t)0x8238, (q15_t)0x17b1, (q15_t)0x8237, (q15_t)0x17ab, (q15_t)0x8236, (q15_t)0x17a5, (q15_t)0x8234,
+  (q15_t)0x179f, (q15_t)0x8233, (q15_t)0x1799, (q15_t)0x8232, (q15_t)0x1792, (q15_t)0x8231, (q15_t)0x178c, (q15_t)0x8230,
+  (q15_t)0x1786, (q15_t)0x822f, (q15_t)0x1780, (q15_t)0x822e, (q15_t)0x177a, (q15_t)0x822c, (q15_t)0x1774, (q15_t)0x822b,
+  (q15_t)0x176d, (q15_t)0x822a, (q15_t)0x1767, (q15_t)0x8229, (q15_t)0x1761, (q15_t)0x8228, (q15_t)0x175b, (q15_t)0x8227,
+  (q15_t)0x1755, (q15_t)0x8226, (q15_t)0x174e, (q15_t)0x8224, (q15_t)0x1748, (q15_t)0x8223, (q15_t)0x1742, (q15_t)0x8222,
+  (q15_t)0x173c, (q15_t)0x8221, (q15_t)0x1736, (q15_t)0x8220, (q15_t)0x1730, (q15_t)0x821f, (q15_t)0x1729, (q15_t)0x821e,
+  (q15_t)0x1723, (q15_t)0x821c, (q15_t)0x171d, (q15_t)0x821b, (q15_t)0x1717, (q15_t)0x821a, (q15_t)0x1711, (q15_t)0x8219,
+  (q15_t)0x170a, (q15_t)0x8218, (q15_t)0x1704, (q15_t)0x8217, (q15_t)0x16fe, (q15_t)0x8216, (q15_t)0x16f8, (q15_t)0x8214,
+  (q15_t)0x16f2, (q15_t)0x8213, (q15_t)0x16ec, (q15_t)0x8212, (q15_t)0x16e5, (q15_t)0x8211, (q15_t)0x16df, (q15_t)0x8210,
+  (q15_t)0x16d9, (q15_t)0x820f, (q15_t)0x16d3, (q15_t)0x820e, (q15_t)0x16cd, (q15_t)0x820d, (q15_t)0x16c6, (q15_t)0x820b,
+  (q15_t)0x16c0, (q15_t)0x820a, (q15_t)0x16ba, (q15_t)0x8209, (q15_t)0x16b4, (q15_t)0x8208, (q15_t)0x16ae, (q15_t)0x8207,
+  (q15_t)0x16a8, (q15_t)0x8206, (q15_t)0x16a1, (q15_t)0x8205, (q15_t)0x169b, (q15_t)0x8204, (q15_t)0x1695, (q15_t)0x8203,
+  (q15_t)0x168f, (q15_t)0x8201, (q15_t)0x1689, (q15_t)0x8200, (q15_t)0x1682, (q15_t)0x81ff, (q15_t)0x167c, (q15_t)0x81fe,
+  (q15_t)0x1676, (q15_t)0x81fd, (q15_t)0x1670, (q15_t)0x81fc, (q15_t)0x166a, (q15_t)0x81fb, (q15_t)0x1664, (q15_t)0x81fa,
+  (q15_t)0x165d, (q15_t)0x81f9, (q15_t)0x1657, (q15_t)0x81f8, (q15_t)0x1651, (q15_t)0x81f6, (q15_t)0x164b, (q15_t)0x81f5,
+  (q15_t)0x1645, (q15_t)0x81f4, (q15_t)0x163e, (q15_t)0x81f3, (q15_t)0x1638, (q15_t)0x81f2, (q15_t)0x1632, (q15_t)0x81f1,
+  (q15_t)0x162c, (q15_t)0x81f0, (q15_t)0x1626, (q15_t)0x81ef, (q15_t)0x161f, (q15_t)0x81ee, (q15_t)0x1619, (q15_t)0x81ed,
+  (q15_t)0x1613, (q15_t)0x81ec, (q15_t)0x160d, (q15_t)0x81ea, (q15_t)0x1607, (q15_t)0x81e9, (q15_t)0x1601, (q15_t)0x81e8,
+  (q15_t)0x15fa, (q15_t)0x81e7, (q15_t)0x15f4, (q15_t)0x81e6, (q15_t)0x15ee, (q15_t)0x81e5, (q15_t)0x15e8, (q15_t)0x81e4,
+  (q15_t)0x15e2, (q15_t)0x81e3, (q15_t)0x15db, (q15_t)0x81e2, (q15_t)0x15d5, (q15_t)0x81e1, (q15_t)0x15cf, (q15_t)0x81e0,
+  (q15_t)0x15c9, (q15_t)0x81df, (q15_t)0x15c3, (q15_t)0x81de, (q15_t)0x15bc, (q15_t)0x81dc, (q15_t)0x15b6, (q15_t)0x81db,
+  (q15_t)0x15b0, (q15_t)0x81da, (q15_t)0x15aa, (q15_t)0x81d9, (q15_t)0x15a4, (q15_t)0x81d8, (q15_t)0x159d, (q15_t)0x81d7,
+  (q15_t)0x1597, (q15_t)0x81d6, (q15_t)0x1591, (q15_t)0x81d5, (q15_t)0x158b, (q15_t)0x81d4, (q15_t)0x1585, (q15_t)0x81d3,
+  (q15_t)0x157f, (q15_t)0x81d2, (q15_t)0x1578, (q15_t)0x81d1, (q15_t)0x1572, (q15_t)0x81d0, (q15_t)0x156c, (q15_t)0x81cf,
+  (q15_t)0x1566, (q15_t)0x81ce, (q15_t)0x1560, (q15_t)0x81cd, (q15_t)0x1559, (q15_t)0x81cc, (q15_t)0x1553, (q15_t)0x81cb,
+  (q15_t)0x154d, (q15_t)0x81c9, (q15_t)0x1547, (q15_t)0x81c8, (q15_t)0x1541, (q15_t)0x81c7, (q15_t)0x153a, (q15_t)0x81c6,
+  (q15_t)0x1534, (q15_t)0x81c5, (q15_t)0x152e, (q15_t)0x81c4, (q15_t)0x1528, (q15_t)0x81c3, (q15_t)0x1522, (q15_t)0x81c2,
+  (q15_t)0x151b, (q15_t)0x81c1, (q15_t)0x1515, (q15_t)0x81c0, (q15_t)0x150f, (q15_t)0x81bf, (q15_t)0x1509, (q15_t)0x81be,
+  (q15_t)0x1503, (q15_t)0x81bd, (q15_t)0x14fc, (q15_t)0x81bc, (q15_t)0x14f6, (q15_t)0x81bb, (q15_t)0x14f0, (q15_t)0x81ba,
+  (q15_t)0x14ea, (q15_t)0x81b9, (q15_t)0x14e4, (q15_t)0x81b8, (q15_t)0x14dd, (q15_t)0x81b7, (q15_t)0x14d7, (q15_t)0x81b6,
+  (q15_t)0x14d1, (q15_t)0x81b5, (q15_t)0x14cb, (q15_t)0x81b4, (q15_t)0x14c5, (q15_t)0x81b3, (q15_t)0x14be, (q15_t)0x81b2,
+  (q15_t)0x14b8, (q15_t)0x81b1, (q15_t)0x14b2, (q15_t)0x81b0, (q15_t)0x14ac, (q15_t)0x81af, (q15_t)0x14a6, (q15_t)0x81ae,
+  (q15_t)0x149f, (q15_t)0x81ad, (q15_t)0x1499, (q15_t)0x81ac, (q15_t)0x1493, (q15_t)0x81ab, (q15_t)0x148d, (q15_t)0x81aa,
+  (q15_t)0x1487, (q15_t)0x81a9, (q15_t)0x1480, (q15_t)0x81a8, (q15_t)0x147a, (q15_t)0x81a7, (q15_t)0x1474, (q15_t)0x81a6,
+  (q15_t)0x146e, (q15_t)0x81a5, (q15_t)0x1468, (q15_t)0x81a4, (q15_t)0x1461, (q15_t)0x81a3, (q15_t)0x145b, (q15_t)0x81a2,
+  (q15_t)0x1455, (q15_t)0x81a1, (q15_t)0x144f, (q15_t)0x81a0, (q15_t)0x1449, (q15_t)0x819f, (q15_t)0x1442, (q15_t)0x819e,
+  (q15_t)0x143c, (q15_t)0x819d, (q15_t)0x1436, (q15_t)0x819c, (q15_t)0x1430, (q15_t)0x819b, (q15_t)0x142a, (q15_t)0x819a,
+  (q15_t)0x1423, (q15_t)0x8199, (q15_t)0x141d, (q15_t)0x8198, (q15_t)0x1417, (q15_t)0x8197, (q15_t)0x1411, (q15_t)0x8196,
+  (q15_t)0x140b, (q15_t)0x8195, (q15_t)0x1404, (q15_t)0x8194, (q15_t)0x13fe, (q15_t)0x8193, (q15_t)0x13f8, (q15_t)0x8192,
+  (q15_t)0x13f2, (q15_t)0x8191, (q15_t)0x13eb, (q15_t)0x8190, (q15_t)0x13e5, (q15_t)0x818f, (q15_t)0x13df, (q15_t)0x818e,
+  (q15_t)0x13d9, (q15_t)0x818d, (q15_t)0x13d3, (q15_t)0x818c, (q15_t)0x13cc, (q15_t)0x818b, (q15_t)0x13c6, (q15_t)0x818a,
+  (q15_t)0x13c0, (q15_t)0x8189, (q15_t)0x13ba, (q15_t)0x8188, (q15_t)0x13b4, (q15_t)0x8187, (q15_t)0x13ad, (q15_t)0x8186,
+  (q15_t)0x13a7, (q15_t)0x8185, (q15_t)0x13a1, (q15_t)0x8184, (q15_t)0x139b, (q15_t)0x8183, (q15_t)0x1395, (q15_t)0x8182,
+  (q15_t)0x138e, (q15_t)0x8181, (q15_t)0x1388, (q15_t)0x8180, (q15_t)0x1382, (q15_t)0x817f, (q15_t)0x137c, (q15_t)0x817e,
+  (q15_t)0x1376, (q15_t)0x817d, (q15_t)0x136f, (q15_t)0x817c, (q15_t)0x1369, (q15_t)0x817c, (q15_t)0x1363, (q15_t)0x817b,
+  (q15_t)0x135d, (q15_t)0x817a, (q15_t)0x1356, (q15_t)0x8179, (q15_t)0x1350, (q15_t)0x8178, (q15_t)0x134a, (q15_t)0x8177,
+  (q15_t)0x1344, (q15_t)0x8176, (q15_t)0x133e, (q15_t)0x8175, (q15_t)0x1337, (q15_t)0x8174, (q15_t)0x1331, (q15_t)0x8173,
+  (q15_t)0x132b, (q15_t)0x8172, (q15_t)0x1325, (q15_t)0x8171, (q15_t)0x131f, (q15_t)0x8170, (q15_t)0x1318, (q15_t)0x816f,
+  (q15_t)0x1312, (q15_t)0x816e, (q15_t)0x130c, (q15_t)0x816d, (q15_t)0x1306, (q15_t)0x816c, (q15_t)0x12ff, (q15_t)0x816c,
+  (q15_t)0x12f9, (q15_t)0x816b, (q15_t)0x12f3, (q15_t)0x816a, (q15_t)0x12ed, (q15_t)0x8169, (q15_t)0x12e7, (q15_t)0x8168,
+  (q15_t)0x12e0, (q15_t)0x8167, (q15_t)0x12da, (q15_t)0x8166, (q15_t)0x12d4, (q15_t)0x8165, (q15_t)0x12ce, (q15_t)0x8164,
+  (q15_t)0x12c8, (q15_t)0x8163, (q15_t)0x12c1, (q15_t)0x8162, (q15_t)0x12bb, (q15_t)0x8161, (q15_t)0x12b5, (q15_t)0x8160,
+  (q15_t)0x12af, (q15_t)0x815f, (q15_t)0x12a8, (q15_t)0x815f, (q15_t)0x12a2, (q15_t)0x815e, (q15_t)0x129c, (q15_t)0x815d,
+  (q15_t)0x1296, (q15_t)0x815c, (q15_t)0x1290, (q15_t)0x815b, (q15_t)0x1289, (q15_t)0x815a, (q15_t)0x1283, (q15_t)0x8159,
+  (q15_t)0x127d, (q15_t)0x8158, (q15_t)0x1277, (q15_t)0x8157, (q15_t)0x1271, (q15_t)0x8156, (q15_t)0x126a, (q15_t)0x8155,
+  (q15_t)0x1264, (q15_t)0x8155, (q15_t)0x125e, (q15_t)0x8154, (q15_t)0x1258, (q15_t)0x8153, (q15_t)0x1251, (q15_t)0x8152,
+  (q15_t)0x124b, (q15_t)0x8151, (q15_t)0x1245, (q15_t)0x8150, (q15_t)0x123f, (q15_t)0x814f, (q15_t)0x1239, (q15_t)0x814e,
+  (q15_t)0x1232, (q15_t)0x814d, (q15_t)0x122c, (q15_t)0x814c, (q15_t)0x1226, (q15_t)0x814c, (q15_t)0x1220, (q15_t)0x814b,
+  (q15_t)0x1219, (q15_t)0x814a, (q15_t)0x1213, (q15_t)0x8149, (q15_t)0x120d, (q15_t)0x8148, (q15_t)0x1207, (q15_t)0x8147,
+  (q15_t)0x1201, (q15_t)0x8146, (q15_t)0x11fa, (q15_t)0x8145, (q15_t)0x11f4, (q15_t)0x8145, (q15_t)0x11ee, (q15_t)0x8144,
+  (q15_t)0x11e8, (q15_t)0x8143, (q15_t)0x11e1, (q15_t)0x8142, (q15_t)0x11db, (q15_t)0x8141, (q15_t)0x11d5, (q15_t)0x8140,
+  (q15_t)0x11cf, (q15_t)0x813f, (q15_t)0x11c9, (q15_t)0x813e, (q15_t)0x11c2, (q15_t)0x813d, (q15_t)0x11bc, (q15_t)0x813d,
+  (q15_t)0x11b6, (q15_t)0x813c, (q15_t)0x11b0, (q15_t)0x813b, (q15_t)0x11a9, (q15_t)0x813a, (q15_t)0x11a3, (q15_t)0x8139,
+  (q15_t)0x119d, (q15_t)0x8138, (q15_t)0x1197, (q15_t)0x8137, (q15_t)0x1191, (q15_t)0x8137, (q15_t)0x118a, (q15_t)0x8136,
+  (q15_t)0x1184, (q15_t)0x8135, (q15_t)0x117e, (q15_t)0x8134, (q15_t)0x1178, (q15_t)0x8133, (q15_t)0x1171, (q15_t)0x8132,
+  (q15_t)0x116b, (q15_t)0x8131, (q15_t)0x1165, (q15_t)0x8131, (q15_t)0x115f, (q15_t)0x8130, (q15_t)0x1159, (q15_t)0x812f,
+  (q15_t)0x1152, (q15_t)0x812e, (q15_t)0x114c, (q15_t)0x812d, (q15_t)0x1146, (q15_t)0x812c, (q15_t)0x1140, (q15_t)0x812b,
+  (q15_t)0x1139, (q15_t)0x812b, (q15_t)0x1133, (q15_t)0x812a, (q15_t)0x112d, (q15_t)0x8129, (q15_t)0x1127, (q15_t)0x8128,
+  (q15_t)0x1121, (q15_t)0x8127, (q15_t)0x111a, (q15_t)0x8126, (q15_t)0x1114, (q15_t)0x8126, (q15_t)0x110e, (q15_t)0x8125,
+  (q15_t)0x1108, (q15_t)0x8124, (q15_t)0x1101, (q15_t)0x8123, (q15_t)0x10fb, (q15_t)0x8122, (q15_t)0x10f5, (q15_t)0x8121,
+  (q15_t)0x10ef, (q15_t)0x8121, (q15_t)0x10e8, (q15_t)0x8120, (q15_t)0x10e2, (q15_t)0x811f, (q15_t)0x10dc, (q15_t)0x811e,
+  (q15_t)0x10d6, (q15_t)0x811d, (q15_t)0x10d0, (q15_t)0x811c, (q15_t)0x10c9, (q15_t)0x811c, (q15_t)0x10c3, (q15_t)0x811b,
+  (q15_t)0x10bd, (q15_t)0x811a, (q15_t)0x10b7, (q15_t)0x8119, (q15_t)0x10b0, (q15_t)0x8118, (q15_t)0x10aa, (q15_t)0x8117,
+  (q15_t)0x10a4, (q15_t)0x8117, (q15_t)0x109e, (q15_t)0x8116, (q15_t)0x1098, (q15_t)0x8115, (q15_t)0x1091, (q15_t)0x8114,
+  (q15_t)0x108b, (q15_t)0x8113, (q15_t)0x1085, (q15_t)0x8113, (q15_t)0x107f, (q15_t)0x8112, (q15_t)0x1078, (q15_t)0x8111,
+  (q15_t)0x1072, (q15_t)0x8110, (q15_t)0x106c, (q15_t)0x810f, (q15_t)0x1066, (q15_t)0x810f, (q15_t)0x105f, (q15_t)0x810e,
+  (q15_t)0x1059, (q15_t)0x810d, (q15_t)0x1053, (q15_t)0x810c, (q15_t)0x104d, (q15_t)0x810b, (q15_t)0x1047, (q15_t)0x810b,
+  (q15_t)0x1040, (q15_t)0x810a, (q15_t)0x103a, (q15_t)0x8109, (q15_t)0x1034, (q15_t)0x8108, (q15_t)0x102e, (q15_t)0x8107,
+  (q15_t)0x1027, (q15_t)0x8107, (q15_t)0x1021, (q15_t)0x8106, (q15_t)0x101b, (q15_t)0x8105, (q15_t)0x1015, (q15_t)0x8104,
+  (q15_t)0x100e, (q15_t)0x8103, (q15_t)0x1008, (q15_t)0x8103, (q15_t)0x1002, (q15_t)0x8102, (q15_t)0xffc, (q15_t)0x8101,
+  (q15_t)0xff5, (q15_t)0x8100, (q15_t)0xfef, (q15_t)0x80ff, (q15_t)0xfe9, (q15_t)0x80ff, (q15_t)0xfe3, (q15_t)0x80fe,
+  (q15_t)0xfdd, (q15_t)0x80fd, (q15_t)0xfd6, (q15_t)0x80fc, (q15_t)0xfd0, (q15_t)0x80fc, (q15_t)0xfca, (q15_t)0x80fb,
+  (q15_t)0xfc4, (q15_t)0x80fa, (q15_t)0xfbd, (q15_t)0x80f9, (q15_t)0xfb7, (q15_t)0x80f8, (q15_t)0xfb1, (q15_t)0x80f8,
+  (q15_t)0xfab, (q15_t)0x80f7, (q15_t)0xfa4, (q15_t)0x80f6, (q15_t)0xf9e, (q15_t)0x80f5, (q15_t)0xf98, (q15_t)0x80f5,
+  (q15_t)0xf92, (q15_t)0x80f4, (q15_t)0xf8b, (q15_t)0x80f3, (q15_t)0xf85, (q15_t)0x80f2, (q15_t)0xf7f, (q15_t)0x80f2,
+  (q15_t)0xf79, (q15_t)0x80f1, (q15_t)0xf73, (q15_t)0x80f0, (q15_t)0xf6c, (q15_t)0x80ef, (q15_t)0xf66, (q15_t)0x80ef,
+  (q15_t)0xf60, (q15_t)0x80ee, (q15_t)0xf5a, (q15_t)0x80ed, (q15_t)0xf53, (q15_t)0x80ec, (q15_t)0xf4d, (q15_t)0x80ec,
+  (q15_t)0xf47, (q15_t)0x80eb, (q15_t)0xf41, (q15_t)0x80ea, (q15_t)0xf3a, (q15_t)0x80e9, (q15_t)0xf34, (q15_t)0x80e9,
+  (q15_t)0xf2e, (q15_t)0x80e8, (q15_t)0xf28, (q15_t)0x80e7, (q15_t)0xf21, (q15_t)0x80e6, (q15_t)0xf1b, (q15_t)0x80e6,
+  (q15_t)0xf15, (q15_t)0x80e5, (q15_t)0xf0f, (q15_t)0x80e4, (q15_t)0xf08, (q15_t)0x80e3, (q15_t)0xf02, (q15_t)0x80e3,
+  (q15_t)0xefc, (q15_t)0x80e2, (q15_t)0xef6, (q15_t)0x80e1, (q15_t)0xef0, (q15_t)0x80e0, (q15_t)0xee9, (q15_t)0x80e0,
+  (q15_t)0xee3, (q15_t)0x80df, (q15_t)0xedd, (q15_t)0x80de, (q15_t)0xed7, (q15_t)0x80dd, (q15_t)0xed0, (q15_t)0x80dd,
+  (q15_t)0xeca, (q15_t)0x80dc, (q15_t)0xec4, (q15_t)0x80db, (q15_t)0xebe, (q15_t)0x80db, (q15_t)0xeb7, (q15_t)0x80da,
+  (q15_t)0xeb1, (q15_t)0x80d9, (q15_t)0xeab, (q15_t)0x80d8, (q15_t)0xea5, (q15_t)0x80d8, (q15_t)0xe9e, (q15_t)0x80d7,
+  (q15_t)0xe98, (q15_t)0x80d6, (q15_t)0xe92, (q15_t)0x80d6, (q15_t)0xe8c, (q15_t)0x80d5, (q15_t)0xe85, (q15_t)0x80d4,
+  (q15_t)0xe7f, (q15_t)0x80d3, (q15_t)0xe79, (q15_t)0x80d3, (q15_t)0xe73, (q15_t)0x80d2, (q15_t)0xe6c, (q15_t)0x80d1,
+  (q15_t)0xe66, (q15_t)0x80d1, (q15_t)0xe60, (q15_t)0x80d0, (q15_t)0xe5a, (q15_t)0x80cf, (q15_t)0xe53, (q15_t)0x80ce,
+  (q15_t)0xe4d, (q15_t)0x80ce, (q15_t)0xe47, (q15_t)0x80cd, (q15_t)0xe41, (q15_t)0x80cc, (q15_t)0xe3a, (q15_t)0x80cc,
+  (q15_t)0xe34, (q15_t)0x80cb, (q15_t)0xe2e, (q15_t)0x80ca, (q15_t)0xe28, (q15_t)0x80ca, (q15_t)0xe22, (q15_t)0x80c9,
+  (q15_t)0xe1b, (q15_t)0x80c8, (q15_t)0xe15, (q15_t)0x80c7, (q15_t)0xe0f, (q15_t)0x80c7, (q15_t)0xe09, (q15_t)0x80c6,
+  (q15_t)0xe02, (q15_t)0x80c5, (q15_t)0xdfc, (q15_t)0x80c5, (q15_t)0xdf6, (q15_t)0x80c4, (q15_t)0xdf0, (q15_t)0x80c3,
+  (q15_t)0xde9, (q15_t)0x80c3, (q15_t)0xde3, (q15_t)0x80c2, (q15_t)0xddd, (q15_t)0x80c1, (q15_t)0xdd7, (q15_t)0x80c1,
+  (q15_t)0xdd0, (q15_t)0x80c0, (q15_t)0xdca, (q15_t)0x80bf, (q15_t)0xdc4, (q15_t)0x80bf, (q15_t)0xdbe, (q15_t)0x80be,
+  (q15_t)0xdb7, (q15_t)0x80bd, (q15_t)0xdb1, (q15_t)0x80bd, (q15_t)0xdab, (q15_t)0x80bc, (q15_t)0xda5, (q15_t)0x80bb,
+  (q15_t)0xd9e, (q15_t)0x80bb, (q15_t)0xd98, (q15_t)0x80ba, (q15_t)0xd92, (q15_t)0x80b9, (q15_t)0xd8c, (q15_t)0x80b9,
+  (q15_t)0xd85, (q15_t)0x80b8, (q15_t)0xd7f, (q15_t)0x80b7, (q15_t)0xd79, (q15_t)0x80b7, (q15_t)0xd73, (q15_t)0x80b6,
+  (q15_t)0xd6c, (q15_t)0x80b5, (q15_t)0xd66, (q15_t)0x80b5, (q15_t)0xd60, (q15_t)0x80b4, (q15_t)0xd5a, (q15_t)0x80b3,
+  (q15_t)0xd53, (q15_t)0x80b3, (q15_t)0xd4d, (q15_t)0x80b2, (q15_t)0xd47, (q15_t)0x80b1, (q15_t)0xd41, (q15_t)0x80b1,
+  (q15_t)0xd3a, (q15_t)0x80b0, (q15_t)0xd34, (q15_t)0x80af, (q15_t)0xd2e, (q15_t)0x80af, (q15_t)0xd28, (q15_t)0x80ae,
+  (q15_t)0xd21, (q15_t)0x80ad, (q15_t)0xd1b, (q15_t)0x80ad, (q15_t)0xd15, (q15_t)0x80ac, (q15_t)0xd0f, (q15_t)0x80ab,
+  (q15_t)0xd08, (q15_t)0x80ab, (q15_t)0xd02, (q15_t)0x80aa, (q15_t)0xcfc, (q15_t)0x80aa, (q15_t)0xcf6, (q15_t)0x80a9,
+  (q15_t)0xcef, (q15_t)0x80a8, (q15_t)0xce9, (q15_t)0x80a8, (q15_t)0xce3, (q15_t)0x80a7, (q15_t)0xcdd, (q15_t)0x80a6,
+  (q15_t)0xcd6, (q15_t)0x80a6, (q15_t)0xcd0, (q15_t)0x80a5, (q15_t)0xcca, (q15_t)0x80a5, (q15_t)0xcc4, (q15_t)0x80a4,
+  (q15_t)0xcbd, (q15_t)0x80a3, (q15_t)0xcb7, (q15_t)0x80a3, (q15_t)0xcb1, (q15_t)0x80a2, (q15_t)0xcab, (q15_t)0x80a1,
+  (q15_t)0xca4, (q15_t)0x80a1, (q15_t)0xc9e, (q15_t)0x80a0, (q15_t)0xc98, (q15_t)0x80a0, (q15_t)0xc92, (q15_t)0x809f,
+  (q15_t)0xc8b, (q15_t)0x809e, (q15_t)0xc85, (q15_t)0x809e, (q15_t)0xc7f, (q15_t)0x809d, (q15_t)0xc79, (q15_t)0x809c,
+  (q15_t)0xc72, (q15_t)0x809c, (q15_t)0xc6c, (q15_t)0x809b, (q15_t)0xc66, (q15_t)0x809b, (q15_t)0xc60, (q15_t)0x809a,
+  (q15_t)0xc59, (q15_t)0x8099, (q15_t)0xc53, (q15_t)0x8099, (q15_t)0xc4d, (q15_t)0x8098, (q15_t)0xc47, (q15_t)0x8098,
+  (q15_t)0xc40, (q15_t)0x8097, (q15_t)0xc3a, (q15_t)0x8096, (q15_t)0xc34, (q15_t)0x8096, (q15_t)0xc2e, (q15_t)0x8095,
+  (q15_t)0xc27, (q15_t)0x8095, (q15_t)0xc21, (q15_t)0x8094, (q15_t)0xc1b, (q15_t)0x8093, (q15_t)0xc14, (q15_t)0x8093,
+  (q15_t)0xc0e, (q15_t)0x8092, (q15_t)0xc08, (q15_t)0x8092, (q15_t)0xc02, (q15_t)0x8091, (q15_t)0xbfb, (q15_t)0x8090,
+  (q15_t)0xbf5, (q15_t)0x8090, (q15_t)0xbef, (q15_t)0x808f, (q15_t)0xbe9, (q15_t)0x808f, (q15_t)0xbe2, (q15_t)0x808e,
+  (q15_t)0xbdc, (q15_t)0x808e, (q15_t)0xbd6, (q15_t)0x808d, (q15_t)0xbd0, (q15_t)0x808c, (q15_t)0xbc9, (q15_t)0x808c,
+  (q15_t)0xbc3, (q15_t)0x808b, (q15_t)0xbbd, (q15_t)0x808b, (q15_t)0xbb7, (q15_t)0x808a, (q15_t)0xbb0, (q15_t)0x8089,
+  (q15_t)0xbaa, (q15_t)0x8089, (q15_t)0xba4, (q15_t)0x8088, (q15_t)0xb9e, (q15_t)0x8088, (q15_t)0xb97, (q15_t)0x8087,
+  (q15_t)0xb91, (q15_t)0x8087, (q15_t)0xb8b, (q15_t)0x8086, (q15_t)0xb85, (q15_t)0x8085, (q15_t)0xb7e, (q15_t)0x8085,
+  (q15_t)0xb78, (q15_t)0x8084, (q15_t)0xb72, (q15_t)0x8084, (q15_t)0xb6c, (q15_t)0x8083, (q15_t)0xb65, (q15_t)0x8083,
+  (q15_t)0xb5f, (q15_t)0x8082, (q15_t)0xb59, (q15_t)0x8082, (q15_t)0xb53, (q15_t)0x8081, (q15_t)0xb4c, (q15_t)0x8080,
+  (q15_t)0xb46, (q15_t)0x8080, (q15_t)0xb40, (q15_t)0x807f, (q15_t)0xb3a, (q15_t)0x807f, (q15_t)0xb33, (q15_t)0x807e,
+  (q15_t)0xb2d, (q15_t)0x807e, (q15_t)0xb27, (q15_t)0x807d, (q15_t)0xb20, (q15_t)0x807d, (q15_t)0xb1a, (q15_t)0x807c,
+  (q15_t)0xb14, (q15_t)0x807b, (q15_t)0xb0e, (q15_t)0x807b, (q15_t)0xb07, (q15_t)0x807a, (q15_t)0xb01, (q15_t)0x807a,
+  (q15_t)0xafb, (q15_t)0x8079, (q15_t)0xaf5, (q15_t)0x8079, (q15_t)0xaee, (q15_t)0x8078, (q15_t)0xae8, (q15_t)0x8078,
+  (q15_t)0xae2, (q15_t)0x8077, (q15_t)0xadc, (q15_t)0x8077, (q15_t)0xad5, (q15_t)0x8076, (q15_t)0xacf, (q15_t)0x8076,
+  (q15_t)0xac9, (q15_t)0x8075, (q15_t)0xac3, (q15_t)0x8075, (q15_t)0xabc, (q15_t)0x8074, (q15_t)0xab6, (q15_t)0x8073,
+  (q15_t)0xab0, (q15_t)0x8073, (q15_t)0xaaa, (q15_t)0x8072, (q15_t)0xaa3, (q15_t)0x8072, (q15_t)0xa9d, (q15_t)0x8071,
+  (q15_t)0xa97, (q15_t)0x8071, (q15_t)0xa90, (q15_t)0x8070, (q15_t)0xa8a, (q15_t)0x8070, (q15_t)0xa84, (q15_t)0x806f,
+  (q15_t)0xa7e, (q15_t)0x806f, (q15_t)0xa77, (q15_t)0x806e, (q15_t)0xa71, (q15_t)0x806e, (q15_t)0xa6b, (q15_t)0x806d,
+  (q15_t)0xa65, (q15_t)0x806d, (q15_t)0xa5e, (q15_t)0x806c, (q15_t)0xa58, (q15_t)0x806c, (q15_t)0xa52, (q15_t)0x806b,
+  (q15_t)0xa4c, (q15_t)0x806b, (q15_t)0xa45, (q15_t)0x806a, (q15_t)0xa3f, (q15_t)0x806a, (q15_t)0xa39, (q15_t)0x8069,
+  (q15_t)0xa33, (q15_t)0x8069, (q15_t)0xa2c, (q15_t)0x8068, (q15_t)0xa26, (q15_t)0x8068, (q15_t)0xa20, (q15_t)0x8067,
+  (q15_t)0xa19, (q15_t)0x8067, (q15_t)0xa13, (q15_t)0x8066, (q15_t)0xa0d, (q15_t)0x8066, (q15_t)0xa07, (q15_t)0x8065,
+  (q15_t)0xa00, (q15_t)0x8065, (q15_t)0x9fa, (q15_t)0x8064, (q15_t)0x9f4, (q15_t)0x8064, (q15_t)0x9ee, (q15_t)0x8063,
+  (q15_t)0x9e7, (q15_t)0x8063, (q15_t)0x9e1, (q15_t)0x8062, (q15_t)0x9db, (q15_t)0x8062, (q15_t)0x9d5, (q15_t)0x8061,
+  (q15_t)0x9ce, (q15_t)0x8061, (q15_t)0x9c8, (q15_t)0x8060, (q15_t)0x9c2, (q15_t)0x8060, (q15_t)0x9bc, (q15_t)0x805f,
+  (q15_t)0x9b5, (q15_t)0x805f, (q15_t)0x9af, (q15_t)0x805e, (q15_t)0x9a9, (q15_t)0x805e, (q15_t)0x9a2, (q15_t)0x805d,
+  (q15_t)0x99c, (q15_t)0x805d, (q15_t)0x996, (q15_t)0x805d, (q15_t)0x990, (q15_t)0x805c, (q15_t)0x989, (q15_t)0x805c,
+  (q15_t)0x983, (q15_t)0x805b, (q15_t)0x97d, (q15_t)0x805b, (q15_t)0x977, (q15_t)0x805a, (q15_t)0x970, (q15_t)0x805a,
+  (q15_t)0x96a, (q15_t)0x8059, (q15_t)0x964, (q15_t)0x8059, (q15_t)0x95e, (q15_t)0x8058, (q15_t)0x957, (q15_t)0x8058,
+  (q15_t)0x951, (q15_t)0x8057, (q15_t)0x94b, (q15_t)0x8057, (q15_t)0x944, (q15_t)0x8057, (q15_t)0x93e, (q15_t)0x8056,
+  (q15_t)0x938, (q15_t)0x8056, (q15_t)0x932, (q15_t)0x8055, (q15_t)0x92b, (q15_t)0x8055, (q15_t)0x925, (q15_t)0x8054,
+  (q15_t)0x91f, (q15_t)0x8054, (q15_t)0x919, (q15_t)0x8053, (q15_t)0x912, (q15_t)0x8053, (q15_t)0x90c, (q15_t)0x8052,
+  (q15_t)0x906, (q15_t)0x8052, (q15_t)0x900, (q15_t)0x8052, (q15_t)0x8f9, (q15_t)0x8051, (q15_t)0x8f3, (q15_t)0x8051,
+  (q15_t)0x8ed, (q15_t)0x8050, (q15_t)0x8e6, (q15_t)0x8050, (q15_t)0x8e0, (q15_t)0x804f, (q15_t)0x8da, (q15_t)0x804f,
+  (q15_t)0x8d4, (q15_t)0x804f, (q15_t)0x8cd, (q15_t)0x804e, (q15_t)0x8c7, (q15_t)0x804e, (q15_t)0x8c1, (q15_t)0x804d,
+  (q15_t)0x8bb, (q15_t)0x804d, (q15_t)0x8b4, (q15_t)0x804c, (q15_t)0x8ae, (q15_t)0x804c, (q15_t)0x8a8, (q15_t)0x804c,
+  (q15_t)0x8a2, (q15_t)0x804b, (q15_t)0x89b, (q15_t)0x804b, (q15_t)0x895, (q15_t)0x804a, (q15_t)0x88f, (q15_t)0x804a,
+  (q15_t)0x888, (q15_t)0x8049, (q15_t)0x882, (q15_t)0x8049, (q15_t)0x87c, (q15_t)0x8049, (q15_t)0x876, (q15_t)0x8048,
+  (q15_t)0x86f, (q15_t)0x8048, (q15_t)0x869, (q15_t)0x8047, (q15_t)0x863, (q15_t)0x8047, (q15_t)0x85d, (q15_t)0x8047,
+  (q15_t)0x856, (q15_t)0x8046, (q15_t)0x850, (q15_t)0x8046, (q15_t)0x84a, (q15_t)0x8045, (q15_t)0x843, (q15_t)0x8045,
+  (q15_t)0x83d, (q15_t)0x8044, (q15_t)0x837, (q15_t)0x8044, (q15_t)0x831, (q15_t)0x8044, (q15_t)0x82a, (q15_t)0x8043,
+  (q15_t)0x824, (q15_t)0x8043, (q15_t)0x81e, (q15_t)0x8042, (q15_t)0x818, (q15_t)0x8042, (q15_t)0x811, (q15_t)0x8042,
+  (q15_t)0x80b, (q15_t)0x8041, (q15_t)0x805, (q15_t)0x8041, (q15_t)0x7fe, (q15_t)0x8040, (q15_t)0x7f8, (q15_t)0x8040,
+  (q15_t)0x7f2, (q15_t)0x8040, (q15_t)0x7ec, (q15_t)0x803f, (q15_t)0x7e5, (q15_t)0x803f, (q15_t)0x7df, (q15_t)0x803f,
+  (q15_t)0x7d9, (q15_t)0x803e, (q15_t)0x7d3, (q15_t)0x803e, (q15_t)0x7cc, (q15_t)0x803d, (q15_t)0x7c6, (q15_t)0x803d,
+  (q15_t)0x7c0, (q15_t)0x803d, (q15_t)0x7ba, (q15_t)0x803c, (q15_t)0x7b3, (q15_t)0x803c, (q15_t)0x7ad, (q15_t)0x803b,
+  (q15_t)0x7a7, (q15_t)0x803b, (q15_t)0x7a0, (q15_t)0x803b, (q15_t)0x79a, (q15_t)0x803a, (q15_t)0x794, (q15_t)0x803a,
+  (q15_t)0x78e, (q15_t)0x803a, (q15_t)0x787, (q15_t)0x8039, (q15_t)0x781, (q15_t)0x8039, (q15_t)0x77b, (q15_t)0x8039,
+  (q15_t)0x775, (q15_t)0x8038, (q15_t)0x76e, (q15_t)0x8038, (q15_t)0x768, (q15_t)0x8037, (q15_t)0x762, (q15_t)0x8037,
+  (q15_t)0x75b, (q15_t)0x8037, (q15_t)0x755, (q15_t)0x8036, (q15_t)0x74f, (q15_t)0x8036, (q15_t)0x749, (q15_t)0x8036,
+  (q15_t)0x742, (q15_t)0x8035, (q15_t)0x73c, (q15_t)0x8035, (q15_t)0x736, (q15_t)0x8035, (q15_t)0x730, (q15_t)0x8034,
+  (q15_t)0x729, (q15_t)0x8034, (q15_t)0x723, (q15_t)0x8033, (q15_t)0x71d, (q15_t)0x8033, (q15_t)0x716, (q15_t)0x8033,
+  (q15_t)0x710, (q15_t)0x8032, (q15_t)0x70a, (q15_t)0x8032, (q15_t)0x704, (q15_t)0x8032, (q15_t)0x6fd, (q15_t)0x8031,
+  (q15_t)0x6f7, (q15_t)0x8031, (q15_t)0x6f1, (q15_t)0x8031, (q15_t)0x6ea, (q15_t)0x8030, (q15_t)0x6e4, (q15_t)0x8030,
+  (q15_t)0x6de, (q15_t)0x8030, (q15_t)0x6d8, (q15_t)0x802f, (q15_t)0x6d1, (q15_t)0x802f, (q15_t)0x6cb, (q15_t)0x802f,
+  (q15_t)0x6c5, (q15_t)0x802e, (q15_t)0x6bf, (q15_t)0x802e, (q15_t)0x6b8, (q15_t)0x802e, (q15_t)0x6b2, (q15_t)0x802d,
+  (q15_t)0x6ac, (q15_t)0x802d, (q15_t)0x6a5, (q15_t)0x802d, (q15_t)0x69f, (q15_t)0x802c, (q15_t)0x699, (q15_t)0x802c,
+  (q15_t)0x693, (q15_t)0x802c, (q15_t)0x68c, (q15_t)0x802b, (q15_t)0x686, (q15_t)0x802b, (q15_t)0x680, (q15_t)0x802b,
+  (q15_t)0x67a, (q15_t)0x802a, (q15_t)0x673, (q15_t)0x802a, (q15_t)0x66d, (q15_t)0x802a, (q15_t)0x667, (q15_t)0x802a,
+  (q15_t)0x660, (q15_t)0x8029, (q15_t)0x65a, (q15_t)0x8029, (q15_t)0x654, (q15_t)0x8029, (q15_t)0x64e, (q15_t)0x8028,
+  (q15_t)0x647, (q15_t)0x8028, (q15_t)0x641, (q15_t)0x8028, (q15_t)0x63b, (q15_t)0x8027, (q15_t)0x635, (q15_t)0x8027,
+  (q15_t)0x62e, (q15_t)0x8027, (q15_t)0x628, (q15_t)0x8026, (q15_t)0x622, (q15_t)0x8026, (q15_t)0x61b, (q15_t)0x8026,
+  (q15_t)0x615, (q15_t)0x8026, (q15_t)0x60f, (q15_t)0x8025, (q15_t)0x609, (q15_t)0x8025, (q15_t)0x602, (q15_t)0x8025,
+  (q15_t)0x5fc, (q15_t)0x8024, (q15_t)0x5f6, (q15_t)0x8024, (q15_t)0x5ef, (q15_t)0x8024, (q15_t)0x5e9, (q15_t)0x8023,
+  (q15_t)0x5e3, (q15_t)0x8023, (q15_t)0x5dd, (q15_t)0x8023, (q15_t)0x5d6, (q15_t)0x8023, (q15_t)0x5d0, (q15_t)0x8022,
+  (q15_t)0x5ca, (q15_t)0x8022, (q15_t)0x5c4, (q15_t)0x8022, (q15_t)0x5bd, (q15_t)0x8021, (q15_t)0x5b7, (q15_t)0x8021,
+  (q15_t)0x5b1, (q15_t)0x8021, (q15_t)0x5aa, (q15_t)0x8021, (q15_t)0x5a4, (q15_t)0x8020, (q15_t)0x59e, (q15_t)0x8020,
+  (q15_t)0x598, (q15_t)0x8020, (q15_t)0x591, (q15_t)0x8020, (q15_t)0x58b, (q15_t)0x801f, (q15_t)0x585, (q15_t)0x801f,
+  (q15_t)0x57f, (q15_t)0x801f, (q15_t)0x578, (q15_t)0x801e, (q15_t)0x572, (q15_t)0x801e, (q15_t)0x56c, (q15_t)0x801e,
+  (q15_t)0x565, (q15_t)0x801e, (q15_t)0x55f, (q15_t)0x801d, (q15_t)0x559, (q15_t)0x801d, (q15_t)0x553, (q15_t)0x801d,
+  (q15_t)0x54c, (q15_t)0x801d, (q15_t)0x546, (q15_t)0x801c, (q15_t)0x540, (q15_t)0x801c, (q15_t)0x539, (q15_t)0x801c,
+  (q15_t)0x533, (q15_t)0x801c, (q15_t)0x52d, (q15_t)0x801b, (q15_t)0x527, (q15_t)0x801b, (q15_t)0x520, (q15_t)0x801b,
+  (q15_t)0x51a, (q15_t)0x801b, (q15_t)0x514, (q15_t)0x801a, (q15_t)0x50d, (q15_t)0x801a, (q15_t)0x507, (q15_t)0x801a,
+  (q15_t)0x501, (q15_t)0x801a, (q15_t)0x4fb, (q15_t)0x8019, (q15_t)0x4f4, (q15_t)0x8019, (q15_t)0x4ee, (q15_t)0x8019,
+  (q15_t)0x4e8, (q15_t)0x8019, (q15_t)0x4e2, (q15_t)0x8018, (q15_t)0x4db, (q15_t)0x8018, (q15_t)0x4d5, (q15_t)0x8018,
+  (q15_t)0x4cf, (q15_t)0x8018, (q15_t)0x4c8, (q15_t)0x8017, (q15_t)0x4c2, (q15_t)0x8017, (q15_t)0x4bc, (q15_t)0x8017,
+  (q15_t)0x4b6, (q15_t)0x8017, (q15_t)0x4af, (q15_t)0x8016, (q15_t)0x4a9, (q15_t)0x8016, (q15_t)0x4a3, (q15_t)0x8016,
+  (q15_t)0x49c, (q15_t)0x8016, (q15_t)0x496, (q15_t)0x8016, (q15_t)0x490, (q15_t)0x8015, (q15_t)0x48a, (q15_t)0x8015,
+  (q15_t)0x483, (q15_t)0x8015, (q15_t)0x47d, (q15_t)0x8015, (q15_t)0x477, (q15_t)0x8014, (q15_t)0x471, (q15_t)0x8014,
+  (q15_t)0x46a, (q15_t)0x8014, (q15_t)0x464, (q15_t)0x8014, (q15_t)0x45e, (q15_t)0x8014, (q15_t)0x457, (q15_t)0x8013,
+  (q15_t)0x451, (q15_t)0x8013, (q15_t)0x44b, (q15_t)0x8013, (q15_t)0x445, (q15_t)0x8013, (q15_t)0x43e, (q15_t)0x8013,
+  (q15_t)0x438, (q15_t)0x8012, (q15_t)0x432, (q15_t)0x8012, (q15_t)0x42b, (q15_t)0x8012, (q15_t)0x425, (q15_t)0x8012,
+  (q15_t)0x41f, (q15_t)0x8012, (q15_t)0x419, (q15_t)0x8011, (q15_t)0x412, (q15_t)0x8011, (q15_t)0x40c, (q15_t)0x8011,
+  (q15_t)0x406, (q15_t)0x8011, (q15_t)0x3ff, (q15_t)0x8011, (q15_t)0x3f9, (q15_t)0x8010, (q15_t)0x3f3, (q15_t)0x8010,
+  (q15_t)0x3ed, (q15_t)0x8010, (q15_t)0x3e6, (q15_t)0x8010, (q15_t)0x3e0, (q15_t)0x8010, (q15_t)0x3da, (q15_t)0x800f,
+  (q15_t)0x3d4, (q15_t)0x800f, (q15_t)0x3cd, (q15_t)0x800f, (q15_t)0x3c7, (q15_t)0x800f, (q15_t)0x3c1, (q15_t)0x800f,
+  (q15_t)0x3ba, (q15_t)0x800e, (q15_t)0x3b4, (q15_t)0x800e, (q15_t)0x3ae, (q15_t)0x800e, (q15_t)0x3a8, (q15_t)0x800e,
+  (q15_t)0x3a1, (q15_t)0x800e, (q15_t)0x39b, (q15_t)0x800e, (q15_t)0x395, (q15_t)0x800d, (q15_t)0x38e, (q15_t)0x800d,
+  (q15_t)0x388, (q15_t)0x800d, (q15_t)0x382, (q15_t)0x800d, (q15_t)0x37c, (q15_t)0x800d, (q15_t)0x375, (q15_t)0x800c,
+  (q15_t)0x36f, (q15_t)0x800c, (q15_t)0x369, (q15_t)0x800c, (q15_t)0x362, (q15_t)0x800c, (q15_t)0x35c, (q15_t)0x800c,
+  (q15_t)0x356, (q15_t)0x800c, (q15_t)0x350, (q15_t)0x800b, (q15_t)0x349, (q15_t)0x800b, (q15_t)0x343, (q15_t)0x800b,
+  (q15_t)0x33d, (q15_t)0x800b, (q15_t)0x337, (q15_t)0x800b, (q15_t)0x330, (q15_t)0x800b, (q15_t)0x32a, (q15_t)0x800b,
+  (q15_t)0x324, (q15_t)0x800a, (q15_t)0x31d, (q15_t)0x800a, (q15_t)0x317, (q15_t)0x800a, (q15_t)0x311, (q15_t)0x800a,
+  (q15_t)0x30b, (q15_t)0x800a, (q15_t)0x304, (q15_t)0x800a, (q15_t)0x2fe, (q15_t)0x8009, (q15_t)0x2f8, (q15_t)0x8009,
+  (q15_t)0x2f1, (q15_t)0x8009, (q15_t)0x2eb, (q15_t)0x8009, (q15_t)0x2e5, (q15_t)0x8009, (q15_t)0x2df, (q15_t)0x8009,
+  (q15_t)0x2d8, (q15_t)0x8009, (q15_t)0x2d2, (q15_t)0x8008, (q15_t)0x2cc, (q15_t)0x8008, (q15_t)0x2c5, (q15_t)0x8008,
+  (q15_t)0x2bf, (q15_t)0x8008, (q15_t)0x2b9, (q15_t)0x8008, (q15_t)0x2b3, (q15_t)0x8008, (q15_t)0x2ac, (q15_t)0x8008,
+  (q15_t)0x2a6, (q15_t)0x8008, (q15_t)0x2a0, (q15_t)0x8007, (q15_t)0x299, (q15_t)0x8007, (q15_t)0x293, (q15_t)0x8007,
+  (q15_t)0x28d, (q15_t)0x8007, (q15_t)0x287, (q15_t)0x8007, (q15_t)0x280, (q15_t)0x8007, (q15_t)0x27a, (q15_t)0x8007,
+  (q15_t)0x274, (q15_t)0x8007, (q15_t)0x26d, (q15_t)0x8006, (q15_t)0x267, (q15_t)0x8006, (q15_t)0x261, (q15_t)0x8006,
+  (q15_t)0x25b, (q15_t)0x8006, (q15_t)0x254, (q15_t)0x8006, (q15_t)0x24e, (q15_t)0x8006, (q15_t)0x248, (q15_t)0x8006,
+  (q15_t)0x242, (q15_t)0x8006, (q15_t)0x23b, (q15_t)0x8005, (q15_t)0x235, (q15_t)0x8005, (q15_t)0x22f, (q15_t)0x8005,
+  (q15_t)0x228, (q15_t)0x8005, (q15_t)0x222, (q15_t)0x8005, (q15_t)0x21c, (q15_t)0x8005, (q15_t)0x216, (q15_t)0x8005,
+  (q15_t)0x20f, (q15_t)0x8005, (q15_t)0x209, (q15_t)0x8005, (q15_t)0x203, (q15_t)0x8005, (q15_t)0x1fc, (q15_t)0x8004,
+  (q15_t)0x1f6, (q15_t)0x8004, (q15_t)0x1f0, (q15_t)0x8004, (q15_t)0x1ea, (q15_t)0x8004, (q15_t)0x1e3, (q15_t)0x8004,
+  (q15_t)0x1dd, (q15_t)0x8004, (q15_t)0x1d7, (q15_t)0x8004, (q15_t)0x1d0, (q15_t)0x8004, (q15_t)0x1ca, (q15_t)0x8004,
+  (q15_t)0x1c4, (q15_t)0x8004, (q15_t)0x1be, (q15_t)0x8004, (q15_t)0x1b7, (q15_t)0x8003, (q15_t)0x1b1, (q15_t)0x8003,
+  (q15_t)0x1ab, (q15_t)0x8003, (q15_t)0x1a4, (q15_t)0x8003, (q15_t)0x19e, (q15_t)0x8003, (q15_t)0x198, (q15_t)0x8003,
+  (q15_t)0x192, (q15_t)0x8003, (q15_t)0x18b, (q15_t)0x8003, (q15_t)0x185, (q15_t)0x8003, (q15_t)0x17f, (q15_t)0x8003,
+  (q15_t)0x178, (q15_t)0x8003, (q15_t)0x172, (q15_t)0x8003, (q15_t)0x16c, (q15_t)0x8003, (q15_t)0x166, (q15_t)0x8002,
+  (q15_t)0x15f, (q15_t)0x8002, (q15_t)0x159, (q15_t)0x8002, (q15_t)0x153, (q15_t)0x8002, (q15_t)0x14d, (q15_t)0x8002,
+  (q15_t)0x146, (q15_t)0x8002, (q15_t)0x140, (q15_t)0x8002, (q15_t)0x13a, (q15_t)0x8002, (q15_t)0x133, (q15_t)0x8002,
+  (q15_t)0x12d, (q15_t)0x8002, (q15_t)0x127, (q15_t)0x8002, (q15_t)0x121, (q15_t)0x8002, (q15_t)0x11a, (q15_t)0x8002,
+  (q15_t)0x114, (q15_t)0x8002, (q15_t)0x10e, (q15_t)0x8002, (q15_t)0x107, (q15_t)0x8002, (q15_t)0x101, (q15_t)0x8002,
+  (q15_t)0xfb, (q15_t)0x8001, (q15_t)0xf5, (q15_t)0x8001, (q15_t)0xee, (q15_t)0x8001, (q15_t)0xe8, (q15_t)0x8001,
+  (q15_t)0xe2, (q15_t)0x8001, (q15_t)0xdb, (q15_t)0x8001, (q15_t)0xd5, (q15_t)0x8001, (q15_t)0xcf, (q15_t)0x8001,
+  (q15_t)0xc9, (q15_t)0x8001, (q15_t)0xc2, (q15_t)0x8001, (q15_t)0xbc, (q15_t)0x8001, (q15_t)0xb6, (q15_t)0x8001,
+  (q15_t)0xaf, (q15_t)0x8001, (q15_t)0xa9, (q15_t)0x8001, (q15_t)0xa3, (q15_t)0x8001, (q15_t)0x9d, (q15_t)0x8001,
+  (q15_t)0x96, (q15_t)0x8001, (q15_t)0x90, (q15_t)0x8001, (q15_t)0x8a, (q15_t)0x8001, (q15_t)0x83, (q15_t)0x8001,
+  (q15_t)0x7d, (q15_t)0x8001, (q15_t)0x77, (q15_t)0x8001, (q15_t)0x71, (q15_t)0x8001, (q15_t)0x6a, (q15_t)0x8001,
+  (q15_t)0x64, (q15_t)0x8001, (q15_t)0x5e, (q15_t)0x8001, (q15_t)0x57, (q15_t)0x8001, (q15_t)0x51, (q15_t)0x8001,
+  (q15_t)0x4b, (q15_t)0x8001, (q15_t)0x45, (q15_t)0x8001, (q15_t)0x3e, (q15_t)0x8001, (q15_t)0x38, (q15_t)0x8001,
+  (q15_t)0x32, (q15_t)0x8001, (q15_t)0x2b, (q15_t)0x8001, (q15_t)0x25, (q15_t)0x8001, (q15_t)0x1f, (q15_t)0x8001,
+  (q15_t)0x19, (q15_t)0x8001, (q15_t)0x12, (q15_t)0x8001, (q15_t)0xc, (q15_t)0x8001, (q15_t)0x6, (q15_t)0x8001
+};
+
+    const q15_t __ALIGNED(4) cos_factorsQ15_8192[8192] = {
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff, (q15_t)0x7fff,
+  (q15_t)0x7fff, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
+  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffe,
+  (q15_t)0x7ffe, (q15_t)0x7ffe, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd,
+  (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffd, (q15_t)0x7ffc,
+  (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc, (q15_t)0x7ffc,
+  (q15_t)0x7ffc, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb,
+  (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffb, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa,
+  (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ffa, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9,
+  (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff9, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8,
+  (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff8, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff7,
+  (q15_t)0x7ff7, (q15_t)0x7ff7, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6, (q15_t)0x7ff6,
+  (q15_t)0x7ff6, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff5, (q15_t)0x7ff4,
+  (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff4, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3,
+  (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff3, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2, (q15_t)0x7ff2,
+  (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff1, (q15_t)0x7ff0, (q15_t)0x7ff0,
+  (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7ff0, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef, (q15_t)0x7fef,
+  (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fee, (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fed,
+  (q15_t)0x7fed, (q15_t)0x7fed, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7fec, (q15_t)0x7feb, (q15_t)0x7feb,
+  (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7feb, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fea, (q15_t)0x7fe9,
+  (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe9, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8, (q15_t)0x7fe8,
+  (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe7, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6, (q15_t)0x7fe6,
+  (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe5, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4, (q15_t)0x7fe4,
+  (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe3, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe2, (q15_t)0x7fe1,
+  (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe1, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fe0, (q15_t)0x7fdf, (q15_t)0x7fdf,
+  (q15_t)0x7fdf, (q15_t)0x7fdf, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fde, (q15_t)0x7fdd, (q15_t)0x7fdd,
+  (q15_t)0x7fdd, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdc, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb, (q15_t)0x7fdb,
+  (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fda, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd9, (q15_t)0x7fd8, (q15_t)0x7fd8,
+  (q15_t)0x7fd8, (q15_t)0x7fd8, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd7, (q15_t)0x7fd6, (q15_t)0x7fd6, (q15_t)0x7fd6,
+  (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd5, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd4, (q15_t)0x7fd3, (q15_t)0x7fd3,
+  (q15_t)0x7fd3, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd2, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd1, (q15_t)0x7fd0,
+  (q15_t)0x7fd0, (q15_t)0x7fd0, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fcf, (q15_t)0x7fce, (q15_t)0x7fce, (q15_t)0x7fce,
+  (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcd, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcc, (q15_t)0x7fcb, (q15_t)0x7fcb,
+  (q15_t)0x7fcb, (q15_t)0x7fca, (q15_t)0x7fca, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc9, (q15_t)0x7fc8, (q15_t)0x7fc8,
+  (q15_t)0x7fc8, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc7, (q15_t)0x7fc6, (q15_t)0x7fc6, (q15_t)0x7fc5, (q15_t)0x7fc5,
+  (q15_t)0x7fc5, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc4, (q15_t)0x7fc3, (q15_t)0x7fc3, (q15_t)0x7fc2, (q15_t)0x7fc2,
+  (q15_t)0x7fc2, (q15_t)0x7fc1, (q15_t)0x7fc1, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fc0, (q15_t)0x7fbf, (q15_t)0x7fbf,
+  (q15_t)0x7fbf, (q15_t)0x7fbe, (q15_t)0x7fbe, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbd, (q15_t)0x7fbc, (q15_t)0x7fbc,
+  (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fbb, (q15_t)0x7fba, (q15_t)0x7fba, (q15_t)0x7fb9, (q15_t)0x7fb9, (q15_t)0x7fb8,
+  (q15_t)0x7fb8, (q15_t)0x7fb8, (q15_t)0x7fb7, (q15_t)0x7fb7, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb6, (q15_t)0x7fb5,
+  (q15_t)0x7fb5, (q15_t)0x7fb4, (q15_t)0x7fb4, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb3, (q15_t)0x7fb2, (q15_t)0x7fb2,
+  (q15_t)0x7fb1, (q15_t)0x7fb1, (q15_t)0x7fb0, (q15_t)0x7fb0, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7faf, (q15_t)0x7fae,
+  (q15_t)0x7fae, (q15_t)0x7fad, (q15_t)0x7fad, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fac, (q15_t)0x7fab, (q15_t)0x7fab,
+  (q15_t)0x7faa, (q15_t)0x7faa, (q15_t)0x7fa9, (q15_t)0x7fa9, (q15_t)0x7fa8, (q15_t)0x7fa8, (q15_t)0x7fa7, (q15_t)0x7fa7,
+  (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa6, (q15_t)0x7fa5, (q15_t)0x7fa5, (q15_t)0x7fa4, (q15_t)0x7fa4, (q15_t)0x7fa3,
+  (q15_t)0x7fa3, (q15_t)0x7fa2, (q15_t)0x7fa2, (q15_t)0x7fa1, (q15_t)0x7fa1, (q15_t)0x7fa0, (q15_t)0x7fa0, (q15_t)0x7f9f,
+  (q15_t)0x7f9f, (q15_t)0x7f9e, (q15_t)0x7f9e, (q15_t)0x7f9d, (q15_t)0x7f9d, (q15_t)0x7f9c, (q15_t)0x7f9c, (q15_t)0x7f9c,
+  (q15_t)0x7f9b, (q15_t)0x7f9b, (q15_t)0x7f9a, (q15_t)0x7f9a, (q15_t)0x7f99, (q15_t)0x7f99, (q15_t)0x7f98, (q15_t)0x7f98,
+  (q15_t)0x7f97, (q15_t)0x7f97, (q15_t)0x7f96, (q15_t)0x7f96, (q15_t)0x7f95, (q15_t)0x7f95, (q15_t)0x7f94, (q15_t)0x7f94,
+  (q15_t)0x7f93, (q15_t)0x7f92, (q15_t)0x7f92, (q15_t)0x7f91, (q15_t)0x7f91, (q15_t)0x7f90, (q15_t)0x7f90, (q15_t)0x7f8f,
+  (q15_t)0x7f8f, (q15_t)0x7f8e, (q15_t)0x7f8e, (q15_t)0x7f8d, (q15_t)0x7f8d, (q15_t)0x7f8c, (q15_t)0x7f8c, (q15_t)0x7f8b,
+  (q15_t)0x7f8b, (q15_t)0x7f8a, (q15_t)0x7f8a, (q15_t)0x7f89, (q15_t)0x7f89, (q15_t)0x7f88, (q15_t)0x7f87, (q15_t)0x7f87,
+  (q15_t)0x7f86, (q15_t)0x7f86, (q15_t)0x7f85, (q15_t)0x7f85, (q15_t)0x7f84, (q15_t)0x7f84, (q15_t)0x7f83, (q15_t)0x7f83,
+  (q15_t)0x7f82, (q15_t)0x7f81, (q15_t)0x7f81, (q15_t)0x7f80, (q15_t)0x7f80, (q15_t)0x7f7f, (q15_t)0x7f7f, (q15_t)0x7f7e,
+  (q15_t)0x7f7e, (q15_t)0x7f7d, (q15_t)0x7f7c, (q15_t)0x7f7c, (q15_t)0x7f7b, (q15_t)0x7f7b, (q15_t)0x7f7a, (q15_t)0x7f7a,
+  (q15_t)0x7f79, (q15_t)0x7f79, (q15_t)0x7f78, (q15_t)0x7f77, (q15_t)0x7f77, (q15_t)0x7f76, (q15_t)0x7f76, (q15_t)0x7f75,
+  (q15_t)0x7f75, (q15_t)0x7f74, (q15_t)0x7f73, (q15_t)0x7f73, (q15_t)0x7f72, (q15_t)0x7f72, (q15_t)0x7f71, (q15_t)0x7f70,
+  (q15_t)0x7f70, (q15_t)0x7f6f, (q15_t)0x7f6f, (q15_t)0x7f6e, (q15_t)0x7f6d, (q15_t)0x7f6d, (q15_t)0x7f6c, (q15_t)0x7f6c,
+  (q15_t)0x7f6b, (q15_t)0x7f6b, (q15_t)0x7f6a, (q15_t)0x7f69, (q15_t)0x7f69, (q15_t)0x7f68, (q15_t)0x7f68, (q15_t)0x7f67,
+  (q15_t)0x7f66, (q15_t)0x7f66, (q15_t)0x7f65, (q15_t)0x7f64, (q15_t)0x7f64, (q15_t)0x7f63, (q15_t)0x7f63, (q15_t)0x7f62,
+  (q15_t)0x7f61, (q15_t)0x7f61, (q15_t)0x7f60, (q15_t)0x7f60, (q15_t)0x7f5f, (q15_t)0x7f5e, (q15_t)0x7f5e, (q15_t)0x7f5d,
+  (q15_t)0x7f5c, (q15_t)0x7f5c, (q15_t)0x7f5b, (q15_t)0x7f5b, (q15_t)0x7f5a, (q15_t)0x7f59, (q15_t)0x7f59, (q15_t)0x7f58,
+  (q15_t)0x7f57, (q15_t)0x7f57, (q15_t)0x7f56, (q15_t)0x7f55, (q15_t)0x7f55, (q15_t)0x7f54, (q15_t)0x7f54, (q15_t)0x7f53,
+  (q15_t)0x7f52, (q15_t)0x7f52, (q15_t)0x7f51, (q15_t)0x7f50, (q15_t)0x7f50, (q15_t)0x7f4f, (q15_t)0x7f4e, (q15_t)0x7f4e,
+  (q15_t)0x7f4d, (q15_t)0x7f4c, (q15_t)0x7f4c, (q15_t)0x7f4b, (q15_t)0x7f4a, (q15_t)0x7f4a, (q15_t)0x7f49, (q15_t)0x7f48,
+  (q15_t)0x7f48, (q15_t)0x7f47, (q15_t)0x7f46, (q15_t)0x7f46, (q15_t)0x7f45, (q15_t)0x7f44, (q15_t)0x7f44, (q15_t)0x7f43,
+  (q15_t)0x7f42, (q15_t)0x7f42, (q15_t)0x7f41, (q15_t)0x7f40, (q15_t)0x7f40, (q15_t)0x7f3f, (q15_t)0x7f3e, (q15_t)0x7f3e,
+  (q15_t)0x7f3d, (q15_t)0x7f3c, (q15_t)0x7f3c, (q15_t)0x7f3b, (q15_t)0x7f3a, (q15_t)0x7f3a, (q15_t)0x7f39, (q15_t)0x7f38,
+  (q15_t)0x7f37, (q15_t)0x7f37, (q15_t)0x7f36, (q15_t)0x7f35, (q15_t)0x7f35, (q15_t)0x7f34, (q15_t)0x7f33, (q15_t)0x7f33,
+  (q15_t)0x7f32, (q15_t)0x7f31, (q15_t)0x7f31, (q15_t)0x7f30, (q15_t)0x7f2f, (q15_t)0x7f2e, (q15_t)0x7f2e, (q15_t)0x7f2d,
+  (q15_t)0x7f2c, (q15_t)0x7f2c, (q15_t)0x7f2b, (q15_t)0x7f2a, (q15_t)0x7f29, (q15_t)0x7f29, (q15_t)0x7f28, (q15_t)0x7f27,
+  (q15_t)0x7f27, (q15_t)0x7f26, (q15_t)0x7f25, (q15_t)0x7f24, (q15_t)0x7f24, (q15_t)0x7f23, (q15_t)0x7f22, (q15_t)0x7f21,
+  (q15_t)0x7f21, (q15_t)0x7f20, (q15_t)0x7f1f, (q15_t)0x7f1f, (q15_t)0x7f1e, (q15_t)0x7f1d, (q15_t)0x7f1c, (q15_t)0x7f1c,
+  (q15_t)0x7f1b, (q15_t)0x7f1a, (q15_t)0x7f19, (q15_t)0x7f19, (q15_t)0x7f18, (q15_t)0x7f17, (q15_t)0x7f16, (q15_t)0x7f16,
+  (q15_t)0x7f15, (q15_t)0x7f14, (q15_t)0x7f13, (q15_t)0x7f13, (q15_t)0x7f12, (q15_t)0x7f11, (q15_t)0x7f10, (q15_t)0x7f10,
+  (q15_t)0x7f0f, (q15_t)0x7f0e, (q15_t)0x7f0d, (q15_t)0x7f0d, (q15_t)0x7f0c, (q15_t)0x7f0b, (q15_t)0x7f0a, (q15_t)0x7f09,
+  (q15_t)0x7f09, (q15_t)0x7f08, (q15_t)0x7f07, (q15_t)0x7f06, (q15_t)0x7f06, (q15_t)0x7f05, (q15_t)0x7f04, (q15_t)0x7f03,
+  (q15_t)0x7f02, (q15_t)0x7f02, (q15_t)0x7f01, (q15_t)0x7f00, (q15_t)0x7eff, (q15_t)0x7eff, (q15_t)0x7efe, (q15_t)0x7efd,
+  (q15_t)0x7efc, (q15_t)0x7efb, (q15_t)0x7efb, (q15_t)0x7efa, (q15_t)0x7ef9, (q15_t)0x7ef8, (q15_t)0x7ef7, (q15_t)0x7ef7,
+  (q15_t)0x7ef6, (q15_t)0x7ef5, (q15_t)0x7ef4, (q15_t)0x7ef3, (q15_t)0x7ef3, (q15_t)0x7ef2, (q15_t)0x7ef1, (q15_t)0x7ef0,
+  (q15_t)0x7eef, (q15_t)0x7eef, (q15_t)0x7eee, (q15_t)0x7eed, (q15_t)0x7eec, (q15_t)0x7eeb, (q15_t)0x7eeb, (q15_t)0x7eea,
+  (q15_t)0x7ee9, (q15_t)0x7ee8, (q15_t)0x7ee7, (q15_t)0x7ee6, (q15_t)0x7ee6, (q15_t)0x7ee5, (q15_t)0x7ee4, (q15_t)0x7ee3,
+  (q15_t)0x7ee2, (q15_t)0x7ee2, (q15_t)0x7ee1, (q15_t)0x7ee0, (q15_t)0x7edf, (q15_t)0x7ede, (q15_t)0x7edd, (q15_t)0x7edd,
+  (q15_t)0x7edc, (q15_t)0x7edb, (q15_t)0x7eda, (q15_t)0x7ed9, (q15_t)0x7ed8, (q15_t)0x7ed8, (q15_t)0x7ed7, (q15_t)0x7ed6,
+  (q15_t)0x7ed5, (q15_t)0x7ed4, (q15_t)0x7ed3, (q15_t)0x7ed2, (q15_t)0x7ed2, (q15_t)0x7ed1, (q15_t)0x7ed0, (q15_t)0x7ecf,
+  (q15_t)0x7ece, (q15_t)0x7ecd, (q15_t)0x7ecc, (q15_t)0x7ecc, (q15_t)0x7ecb, (q15_t)0x7eca, (q15_t)0x7ec9, (q15_t)0x7ec8,
+  (q15_t)0x7ec7, (q15_t)0x7ec6, (q15_t)0x7ec6, (q15_t)0x7ec5, (q15_t)0x7ec4, (q15_t)0x7ec3, (q15_t)0x7ec2, (q15_t)0x7ec1,
+  (q15_t)0x7ec0, (q15_t)0x7ebf, (q15_t)0x7ebf, (q15_t)0x7ebe, (q15_t)0x7ebd, (q15_t)0x7ebc, (q15_t)0x7ebb, (q15_t)0x7eba,
+  (q15_t)0x7eb9, (q15_t)0x7eb8, (q15_t)0x7eb8, (q15_t)0x7eb7, (q15_t)0x7eb6, (q15_t)0x7eb5, (q15_t)0x7eb4, (q15_t)0x7eb3,
+  (q15_t)0x7eb2, (q15_t)0x7eb1, (q15_t)0x7eb0, (q15_t)0x7eaf, (q15_t)0x7eaf, (q15_t)0x7eae, (q15_t)0x7ead, (q15_t)0x7eac,
+  (q15_t)0x7eab, (q15_t)0x7eaa, (q15_t)0x7ea9, (q15_t)0x7ea8, (q15_t)0x7ea7, (q15_t)0x7ea6, (q15_t)0x7ea6, (q15_t)0x7ea5,
+  (q15_t)0x7ea4, (q15_t)0x7ea3, (q15_t)0x7ea2, (q15_t)0x7ea1, (q15_t)0x7ea0, (q15_t)0x7e9f, (q15_t)0x7e9e, (q15_t)0x7e9d,
+  (q15_t)0x7e9c, (q15_t)0x7e9b, (q15_t)0x7e9b, (q15_t)0x7e9a, (q15_t)0x7e99, (q15_t)0x7e98, (q15_t)0x7e97, (q15_t)0x7e96,
+  (q15_t)0x7e95, (q15_t)0x7e94, (q15_t)0x7e93, (q15_t)0x7e92, (q15_t)0x7e91, (q15_t)0x7e90, (q15_t)0x7e8f, (q15_t)0x7e8e,
+  (q15_t)0x7e8d, (q15_t)0x7e8d, (q15_t)0x7e8c, (q15_t)0x7e8b, (q15_t)0x7e8a, (q15_t)0x7e89, (q15_t)0x7e88, (q15_t)0x7e87,
+  (q15_t)0x7e86, (q15_t)0x7e85, (q15_t)0x7e84, (q15_t)0x7e83, (q15_t)0x7e82, (q15_t)0x7e81, (q15_t)0x7e80, (q15_t)0x7e7f,
+  (q15_t)0x7e7e, (q15_t)0x7e7d, (q15_t)0x7e7c, (q15_t)0x7e7b, (q15_t)0x7e7a, (q15_t)0x7e79, (q15_t)0x7e78, (q15_t)0x7e77,
+  (q15_t)0x7e77, (q15_t)0x7e76, (q15_t)0x7e75, (q15_t)0x7e74, (q15_t)0x7e73, (q15_t)0x7e72, (q15_t)0x7e71, (q15_t)0x7e70,
+  (q15_t)0x7e6f, (q15_t)0x7e6e, (q15_t)0x7e6d, (q15_t)0x7e6c, (q15_t)0x7e6b, (q15_t)0x7e6a, (q15_t)0x7e69, (q15_t)0x7e68,
+  (q15_t)0x7e67, (q15_t)0x7e66, (q15_t)0x7e65, (q15_t)0x7e64, (q15_t)0x7e63, (q15_t)0x7e62, (q15_t)0x7e61, (q15_t)0x7e60,
+  (q15_t)0x7e5f, (q15_t)0x7e5e, (q15_t)0x7e5d, (q15_t)0x7e5c, (q15_t)0x7e5b, (q15_t)0x7e5a, (q15_t)0x7e59, (q15_t)0x7e58,
+  (q15_t)0x7e57, (q15_t)0x7e56, (q15_t)0x7e55, (q15_t)0x7e54, (q15_t)0x7e53, (q15_t)0x7e52, (q15_t)0x7e51, (q15_t)0x7e50,
+  (q15_t)0x7e4f, (q15_t)0x7e4e, (q15_t)0x7e4d, (q15_t)0x7e4c, (q15_t)0x7e4b, (q15_t)0x7e4a, (q15_t)0x7e49, (q15_t)0x7e48,
+  (q15_t)0x7e47, (q15_t)0x7e46, (q15_t)0x7e45, (q15_t)0x7e43, (q15_t)0x7e42, (q15_t)0x7e41, (q15_t)0x7e40, (q15_t)0x7e3f,
+  (q15_t)0x7e3e, (q15_t)0x7e3d, (q15_t)0x7e3c, (q15_t)0x7e3b, (q15_t)0x7e3a, (q15_t)0x7e39, (q15_t)0x7e38, (q15_t)0x7e37,
+  (q15_t)0x7e36, (q15_t)0x7e35, (q15_t)0x7e34, (q15_t)0x7e33, (q15_t)0x7e32, (q15_t)0x7e31, (q15_t)0x7e30, (q15_t)0x7e2f,
+  (q15_t)0x7e2e, (q15_t)0x7e2d, (q15_t)0x7e2b, (q15_t)0x7e2a, (q15_t)0x7e29, (q15_t)0x7e28, (q15_t)0x7e27, (q15_t)0x7e26,
+  (q15_t)0x7e25, (q15_t)0x7e24, (q15_t)0x7e23, (q15_t)0x7e22, (q15_t)0x7e21, (q15_t)0x7e20, (q15_t)0x7e1f, (q15_t)0x7e1e,
+  (q15_t)0x7e1d, (q15_t)0x7e1b, (q15_t)0x7e1a, (q15_t)0x7e19, (q15_t)0x7e18, (q15_t)0x7e17, (q15_t)0x7e16, (q15_t)0x7e15,
+  (q15_t)0x7e14, (q15_t)0x7e13, (q15_t)0x7e12, (q15_t)0x7e11, (q15_t)0x7e10, (q15_t)0x7e0e, (q15_t)0x7e0d, (q15_t)0x7e0c,
+  (q15_t)0x7e0b, (q15_t)0x7e0a, (q15_t)0x7e09, (q15_t)0x7e08, (q15_t)0x7e07, (q15_t)0x7e06, (q15_t)0x7e05, (q15_t)0x7e04,
+  (q15_t)0x7e02, (q15_t)0x7e01, (q15_t)0x7e00, (q15_t)0x7dff, (q15_t)0x7dfe, (q15_t)0x7dfd, (q15_t)0x7dfc, (q15_t)0x7dfb,
+  (q15_t)0x7dfa, (q15_t)0x7df8, (q15_t)0x7df7, (q15_t)0x7df6, (q15_t)0x7df5, (q15_t)0x7df4, (q15_t)0x7df3, (q15_t)0x7df2,
+  (q15_t)0x7df1, (q15_t)0x7def, (q15_t)0x7dee, (q15_t)0x7ded, (q15_t)0x7dec, (q15_t)0x7deb, (q15_t)0x7dea, (q15_t)0x7de9,
+  (q15_t)0x7de8, (q15_t)0x7de6, (q15_t)0x7de5, (q15_t)0x7de4, (q15_t)0x7de3, (q15_t)0x7de2, (q15_t)0x7de1, (q15_t)0x7de0,
+  (q15_t)0x7dde, (q15_t)0x7ddd, (q15_t)0x7ddc, (q15_t)0x7ddb, (q15_t)0x7dda, (q15_t)0x7dd9, (q15_t)0x7dd8, (q15_t)0x7dd6,
+  (q15_t)0x7dd5, (q15_t)0x7dd4, (q15_t)0x7dd3, (q15_t)0x7dd2, (q15_t)0x7dd1, (q15_t)0x7dd0, (q15_t)0x7dce, (q15_t)0x7dcd,
+  (q15_t)0x7dcc, (q15_t)0x7dcb, (q15_t)0x7dca, (q15_t)0x7dc9, (q15_t)0x7dc7, (q15_t)0x7dc6, (q15_t)0x7dc5, (q15_t)0x7dc4,
+  (q15_t)0x7dc3, (q15_t)0x7dc2, (q15_t)0x7dc0, (q15_t)0x7dbf, (q15_t)0x7dbe, (q15_t)0x7dbd, (q15_t)0x7dbc, (q15_t)0x7dbb,
+  (q15_t)0x7db9, (q15_t)0x7db8, (q15_t)0x7db7, (q15_t)0x7db6, (q15_t)0x7db5, (q15_t)0x7db3, (q15_t)0x7db2, (q15_t)0x7db1,
+  (q15_t)0x7db0, (q15_t)0x7daf, (q15_t)0x7dae, (q15_t)0x7dac, (q15_t)0x7dab, (q15_t)0x7daa, (q15_t)0x7da9, (q15_t)0x7da8,
+  (q15_t)0x7da6, (q15_t)0x7da5, (q15_t)0x7da4, (q15_t)0x7da3, (q15_t)0x7da2, (q15_t)0x7da0, (q15_t)0x7d9f, (q15_t)0x7d9e,
+  (q15_t)0x7d9d, (q15_t)0x7d9c, (q15_t)0x7d9a, (q15_t)0x7d99, (q15_t)0x7d98, (q15_t)0x7d97, (q15_t)0x7d95, (q15_t)0x7d94,
+  (q15_t)0x7d93, (q15_t)0x7d92, (q15_t)0x7d91, (q15_t)0x7d8f, (q15_t)0x7d8e, (q15_t)0x7d8d, (q15_t)0x7d8c, (q15_t)0x7d8a,
+  (q15_t)0x7d89, (q15_t)0x7d88, (q15_t)0x7d87, (q15_t)0x7d86, (q15_t)0x7d84, (q15_t)0x7d83, (q15_t)0x7d82, (q15_t)0x7d81,
+  (q15_t)0x7d7f, (q15_t)0x7d7e, (q15_t)0x7d7d, (q15_t)0x7d7c, (q15_t)0x7d7a, (q15_t)0x7d79, (q15_t)0x7d78, (q15_t)0x7d77,
+  (q15_t)0x7d75, (q15_t)0x7d74, (q15_t)0x7d73, (q15_t)0x7d72, (q15_t)0x7d70, (q15_t)0x7d6f, (q15_t)0x7d6e, (q15_t)0x7d6d,
+  (q15_t)0x7d6b, (q15_t)0x7d6a, (q15_t)0x7d69, (q15_t)0x7d68, (q15_t)0x7d66, (q15_t)0x7d65, (q15_t)0x7d64, (q15_t)0x7d63,
+  (q15_t)0x7d61, (q15_t)0x7d60, (q15_t)0x7d5f, (q15_t)0x7d5e, (q15_t)0x7d5c, (q15_t)0x7d5b, (q15_t)0x7d5a, (q15_t)0x7d59,
+  (q15_t)0x7d57, (q15_t)0x7d56, (q15_t)0x7d55, (q15_t)0x7d53, (q15_t)0x7d52, (q15_t)0x7d51, (q15_t)0x7d50, (q15_t)0x7d4e,
+  (q15_t)0x7d4d, (q15_t)0x7d4c, (q15_t)0x7d4a, (q15_t)0x7d49, (q15_t)0x7d48, (q15_t)0x7d47, (q15_t)0x7d45, (q15_t)0x7d44,
+  (q15_t)0x7d43, (q15_t)0x7d41, (q15_t)0x7d40, (q15_t)0x7d3f, (q15_t)0x7d3e, (q15_t)0x7d3c, (q15_t)0x7d3b, (q15_t)0x7d3a,
+  (q15_t)0x7d38, (q15_t)0x7d37, (q15_t)0x7d36, (q15_t)0x7d34, (q15_t)0x7d33, (q15_t)0x7d32, (q15_t)0x7d31, (q15_t)0x7d2f,
+  (q15_t)0x7d2e, (q15_t)0x7d2d, (q15_t)0x7d2b, (q15_t)0x7d2a, (q15_t)0x7d29, (q15_t)0x7d27, (q15_t)0x7d26, (q15_t)0x7d25,
+  (q15_t)0x7d23, (q15_t)0x7d22, (q15_t)0x7d21, (q15_t)0x7d1f, (q15_t)0x7d1e, (q15_t)0x7d1d, (q15_t)0x7d1b, (q15_t)0x7d1a,
+  (q15_t)0x7d19, (q15_t)0x7d17, (q15_t)0x7d16, (q15_t)0x7d15, (q15_t)0x7d13, (q15_t)0x7d12, (q15_t)0x7d11, (q15_t)0x7d0f,
+  (q15_t)0x7d0e, (q15_t)0x7d0d, (q15_t)0x7d0b, (q15_t)0x7d0a, (q15_t)0x7d09, (q15_t)0x7d07, (q15_t)0x7d06, (q15_t)0x7d05,
+  (q15_t)0x7d03, (q15_t)0x7d02, (q15_t)0x7d01, (q15_t)0x7cff, (q15_t)0x7cfe, (q15_t)0x7cfd, (q15_t)0x7cfb, (q15_t)0x7cfa,
+  (q15_t)0x7cf9, (q15_t)0x7cf7, (q15_t)0x7cf6, (q15_t)0x7cf4, (q15_t)0x7cf3, (q15_t)0x7cf2, (q15_t)0x7cf0, (q15_t)0x7cef,
+  (q15_t)0x7cee, (q15_t)0x7cec, (q15_t)0x7ceb, (q15_t)0x7ce9, (q15_t)0x7ce8, (q15_t)0x7ce7, (q15_t)0x7ce5, (q15_t)0x7ce4,
+  (q15_t)0x7ce3, (q15_t)0x7ce1, (q15_t)0x7ce0, (q15_t)0x7cde, (q15_t)0x7cdd, (q15_t)0x7cdc, (q15_t)0x7cda, (q15_t)0x7cd9,
+  (q15_t)0x7cd8, (q15_t)0x7cd6, (q15_t)0x7cd5, (q15_t)0x7cd3, (q15_t)0x7cd2, (q15_t)0x7cd1, (q15_t)0x7ccf, (q15_t)0x7cce,
+  (q15_t)0x7ccc, (q15_t)0x7ccb, (q15_t)0x7cca, (q15_t)0x7cc8, (q15_t)0x7cc7, (q15_t)0x7cc5, (q15_t)0x7cc4, (q15_t)0x7cc3,
+  (q15_t)0x7cc1, (q15_t)0x7cc0, (q15_t)0x7cbe, (q15_t)0x7cbd, (q15_t)0x7cbc, (q15_t)0x7cba, (q15_t)0x7cb9, (q15_t)0x7cb7,
+  (q15_t)0x7cb6, (q15_t)0x7cb5, (q15_t)0x7cb3, (q15_t)0x7cb2, (q15_t)0x7cb0, (q15_t)0x7caf, (q15_t)0x7cad, (q15_t)0x7cac,
+  (q15_t)0x7cab, (q15_t)0x7ca9, (q15_t)0x7ca8, (q15_t)0x7ca6, (q15_t)0x7ca5, (q15_t)0x7ca3, (q15_t)0x7ca2, (q15_t)0x7ca1,
+  (q15_t)0x7c9f, (q15_t)0x7c9e, (q15_t)0x7c9c, (q15_t)0x7c9b, (q15_t)0x7c99, (q15_t)0x7c98, (q15_t)0x7c97, (q15_t)0x7c95,
+  (q15_t)0x7c94, (q15_t)0x7c92, (q15_t)0x7c91, (q15_t)0x7c8f, (q15_t)0x7c8e, (q15_t)0x7c8c, (q15_t)0x7c8b, (q15_t)0x7c8a,
+  (q15_t)0x7c88, (q15_t)0x7c87, (q15_t)0x7c85, (q15_t)0x7c84, (q15_t)0x7c82, (q15_t)0x7c81, (q15_t)0x7c7f, (q15_t)0x7c7e,
+  (q15_t)0x7c7c, (q15_t)0x7c7b, (q15_t)0x7c79, (q15_t)0x7c78, (q15_t)0x7c77, (q15_t)0x7c75, (q15_t)0x7c74, (q15_t)0x7c72,
+  (q15_t)0x7c71, (q15_t)0x7c6f, (q15_t)0x7c6e, (q15_t)0x7c6c, (q15_t)0x7c6b, (q15_t)0x7c69, (q15_t)0x7c68, (q15_t)0x7c66,
+  (q15_t)0x7c65, (q15_t)0x7c63, (q15_t)0x7c62, (q15_t)0x7c60, (q15_t)0x7c5f, (q15_t)0x7c5d, (q15_t)0x7c5c, (q15_t)0x7c5a,
+  (q15_t)0x7c59, (q15_t)0x7c58, (q15_t)0x7c56, (q15_t)0x7c55, (q15_t)0x7c53, (q15_t)0x7c52, (q15_t)0x7c50, (q15_t)0x7c4f,
+  (q15_t)0x7c4d, (q15_t)0x7c4c, (q15_t)0x7c4a, (q15_t)0x7c49, (q15_t)0x7c47, (q15_t)0x7c46, (q15_t)0x7c44, (q15_t)0x7c43,
+  (q15_t)0x7c41, (q15_t)0x7c3f, (q15_t)0x7c3e, (q15_t)0x7c3c, (q15_t)0x7c3b, (q15_t)0x7c39, (q15_t)0x7c38, (q15_t)0x7c36,
+  (q15_t)0x7c35, (q15_t)0x7c33, (q15_t)0x7c32, (q15_t)0x7c30, (q15_t)0x7c2f, (q15_t)0x7c2d, (q15_t)0x7c2c, (q15_t)0x7c2a,
+  (q15_t)0x7c29, (q15_t)0x7c27, (q15_t)0x7c26, (q15_t)0x7c24, (q15_t)0x7c23, (q15_t)0x7c21, (q15_t)0x7c20, (q15_t)0x7c1e,
+  (q15_t)0x7c1c, (q15_t)0x7c1b, (q15_t)0x7c19, (q15_t)0x7c18, (q15_t)0x7c16, (q15_t)0x7c15, (q15_t)0x7c13, (q15_t)0x7c12,
+  (q15_t)0x7c10, (q15_t)0x7c0f, (q15_t)0x7c0d, (q15_t)0x7c0b, (q15_t)0x7c0a, (q15_t)0x7c08, (q15_t)0x7c07, (q15_t)0x7c05,
+  (q15_t)0x7c04, (q15_t)0x7c02, (q15_t)0x7c01, (q15_t)0x7bff, (q15_t)0x7bfd, (q15_t)0x7bfc, (q15_t)0x7bfa, (q15_t)0x7bf9,
+  (q15_t)0x7bf7, (q15_t)0x7bf6, (q15_t)0x7bf4, (q15_t)0x7bf3, (q15_t)0x7bf1, (q15_t)0x7bef, (q15_t)0x7bee, (q15_t)0x7bec,
+  (q15_t)0x7beb, (q15_t)0x7be9, (q15_t)0x7be8, (q15_t)0x7be6, (q15_t)0x7be4, (q15_t)0x7be3, (q15_t)0x7be1, (q15_t)0x7be0,
+  (q15_t)0x7bde, (q15_t)0x7bdc, (q15_t)0x7bdb, (q15_t)0x7bd9, (q15_t)0x7bd8, (q15_t)0x7bd6, (q15_t)0x7bd5, (q15_t)0x7bd3,
+  (q15_t)0x7bd1, (q15_t)0x7bd0, (q15_t)0x7bce, (q15_t)0x7bcd, (q15_t)0x7bcb, (q15_t)0x7bc9, (q15_t)0x7bc8, (q15_t)0x7bc6,
+  (q15_t)0x7bc5, (q15_t)0x7bc3, (q15_t)0x7bc1, (q15_t)0x7bc0, (q15_t)0x7bbe, (q15_t)0x7bbd, (q15_t)0x7bbb, (q15_t)0x7bb9,
+  (q15_t)0x7bb8, (q15_t)0x7bb6, (q15_t)0x7bb5, (q15_t)0x7bb3, (q15_t)0x7bb1, (q15_t)0x7bb0, (q15_t)0x7bae, (q15_t)0x7bac,
+  (q15_t)0x7bab, (q15_t)0x7ba9, (q15_t)0x7ba8, (q15_t)0x7ba6, (q15_t)0x7ba4, (q15_t)0x7ba3, (q15_t)0x7ba1, (q15_t)0x7b9f,
+  (q15_t)0x7b9e, (q15_t)0x7b9c, (q15_t)0x7b9b, (q15_t)0x7b99, (q15_t)0x7b97, (q15_t)0x7b96, (q15_t)0x7b94, (q15_t)0x7b92,
+  (q15_t)0x7b91, (q15_t)0x7b8f, (q15_t)0x7b8d, (q15_t)0x7b8c, (q15_t)0x7b8a, (q15_t)0x7b89, (q15_t)0x7b87, (q15_t)0x7b85,
+  (q15_t)0x7b84, (q15_t)0x7b82, (q15_t)0x7b80, (q15_t)0x7b7f, (q15_t)0x7b7d, (q15_t)0x7b7b, (q15_t)0x7b7a, (q15_t)0x7b78,
+  (q15_t)0x7b76, (q15_t)0x7b75, (q15_t)0x7b73, (q15_t)0x7b71, (q15_t)0x7b70, (q15_t)0x7b6e, (q15_t)0x7b6c, (q15_t)0x7b6b,
+  (q15_t)0x7b69, (q15_t)0x7b67, (q15_t)0x7b66, (q15_t)0x7b64, (q15_t)0x7b62, (q15_t)0x7b61, (q15_t)0x7b5f, (q15_t)0x7b5d,
+  (q15_t)0x7b5c, (q15_t)0x7b5a, (q15_t)0x7b58, (q15_t)0x7b57, (q15_t)0x7b55, (q15_t)0x7b53, (q15_t)0x7b52, (q15_t)0x7b50,
+  (q15_t)0x7b4e, (q15_t)0x7b4d, (q15_t)0x7b4b, (q15_t)0x7b49, (q15_t)0x7b47, (q15_t)0x7b46, (q15_t)0x7b44, (q15_t)0x7b42,
+  (q15_t)0x7b41, (q15_t)0x7b3f, (q15_t)0x7b3d, (q15_t)0x7b3c, (q15_t)0x7b3a, (q15_t)0x7b38, (q15_t)0x7b37, (q15_t)0x7b35,
+  (q15_t)0x7b33, (q15_t)0x7b31, (q15_t)0x7b30, (q15_t)0x7b2e, (q15_t)0x7b2c, (q15_t)0x7b2b, (q15_t)0x7b29, (q15_t)0x7b27,
+  (q15_t)0x7b25, (q15_t)0x7b24, (q15_t)0x7b22, (q15_t)0x7b20, (q15_t)0x7b1f, (q15_t)0x7b1d, (q15_t)0x7b1b, (q15_t)0x7b19,
+  (q15_t)0x7b18, (q15_t)0x7b16, (q15_t)0x7b14, (q15_t)0x7b13, (q15_t)0x7b11, (q15_t)0x7b0f, (q15_t)0x7b0d, (q15_t)0x7b0c,
+  (q15_t)0x7b0a, (q15_t)0x7b08, (q15_t)0x7b06, (q15_t)0x7b05, (q15_t)0x7b03, (q15_t)0x7b01, (q15_t)0x7aff, (q15_t)0x7afe,
+  (q15_t)0x7afc, (q15_t)0x7afa, (q15_t)0x7af8, (q15_t)0x7af7, (q15_t)0x7af5, (q15_t)0x7af3, (q15_t)0x7af2, (q15_t)0x7af0,
+  (q15_t)0x7aee, (q15_t)0x7aec, (q15_t)0x7aeb, (q15_t)0x7ae9, (q15_t)0x7ae7, (q15_t)0x7ae5, (q15_t)0x7ae3, (q15_t)0x7ae2,
+  (q15_t)0x7ae0, (q15_t)0x7ade, (q15_t)0x7adc, (q15_t)0x7adb, (q15_t)0x7ad9, (q15_t)0x7ad7, (q15_t)0x7ad5, (q15_t)0x7ad4,
+  (q15_t)0x7ad2, (q15_t)0x7ad0, (q15_t)0x7ace, (q15_t)0x7acd, (q15_t)0x7acb, (q15_t)0x7ac9, (q15_t)0x7ac7, (q15_t)0x7ac5,
+  (q15_t)0x7ac4, (q15_t)0x7ac2, (q15_t)0x7ac0, (q15_t)0x7abe, (q15_t)0x7abd, (q15_t)0x7abb, (q15_t)0x7ab9, (q15_t)0x7ab7,
+  (q15_t)0x7ab5, (q15_t)0x7ab4, (q15_t)0x7ab2, (q15_t)0x7ab0, (q15_t)0x7aae, (q15_t)0x7aac, (q15_t)0x7aab, (q15_t)0x7aa9,
+  (q15_t)0x7aa7, (q15_t)0x7aa5, (q15_t)0x7aa3, (q15_t)0x7aa2, (q15_t)0x7aa0, (q15_t)0x7a9e, (q15_t)0x7a9c, (q15_t)0x7a9a,
+  (q15_t)0x7a99, (q15_t)0x7a97, (q15_t)0x7a95, (q15_t)0x7a93, (q15_t)0x7a91, (q15_t)0x7a90, (q15_t)0x7a8e, (q15_t)0x7a8c,
+  (q15_t)0x7a8a, (q15_t)0x7a88, (q15_t)0x7a87, (q15_t)0x7a85, (q15_t)0x7a83, (q15_t)0x7a81, (q15_t)0x7a7f, (q15_t)0x7a7d,
+  (q15_t)0x7a7c, (q15_t)0x7a7a, (q15_t)0x7a78, (q15_t)0x7a76, (q15_t)0x7a74, (q15_t)0x7a72, (q15_t)0x7a71, (q15_t)0x7a6f,
+  (q15_t)0x7a6d, (q15_t)0x7a6b, (q15_t)0x7a69, (q15_t)0x7a67, (q15_t)0x7a66, (q15_t)0x7a64, (q15_t)0x7a62, (q15_t)0x7a60,
+  (q15_t)0x7a5e, (q15_t)0x7a5c, (q15_t)0x7a5b, (q15_t)0x7a59, (q15_t)0x7a57, (q15_t)0x7a55, (q15_t)0x7a53, (q15_t)0x7a51,
+  (q15_t)0x7a4f, (q15_t)0x7a4e, (q15_t)0x7a4c, (q15_t)0x7a4a, (q15_t)0x7a48, (q15_t)0x7a46, (q15_t)0x7a44, (q15_t)0x7a42,
+  (q15_t)0x7a41, (q15_t)0x7a3f, (q15_t)0x7a3d, (q15_t)0x7a3b, (q15_t)0x7a39, (q15_t)0x7a37, (q15_t)0x7a35, (q15_t)0x7a34,
+  (q15_t)0x7a32, (q15_t)0x7a30, (q15_t)0x7a2e, (q15_t)0x7a2c, (q15_t)0x7a2a, (q15_t)0x7a28, (q15_t)0x7a26, (q15_t)0x7a25,
+  (q15_t)0x7a23, (q15_t)0x7a21, (q15_t)0x7a1f, (q15_t)0x7a1d, (q15_t)0x7a1b, (q15_t)0x7a19, (q15_t)0x7a17, (q15_t)0x7a16,
+  (q15_t)0x7a14, (q15_t)0x7a12, (q15_t)0x7a10, (q15_t)0x7a0e, (q15_t)0x7a0c, (q15_t)0x7a0a, (q15_t)0x7a08, (q15_t)0x7a06,
+  (q15_t)0x7a04, (q15_t)0x7a03, (q15_t)0x7a01, (q15_t)0x79ff, (q15_t)0x79fd, (q15_t)0x79fb, (q15_t)0x79f9, (q15_t)0x79f7,
+  (q15_t)0x79f5, (q15_t)0x79f3, (q15_t)0x79f1, (q15_t)0x79f0, (q15_t)0x79ee, (q15_t)0x79ec, (q15_t)0x79ea, (q15_t)0x79e8,
+  (q15_t)0x79e6, (q15_t)0x79e4, (q15_t)0x79e2, (q15_t)0x79e0, (q15_t)0x79de, (q15_t)0x79dc, (q15_t)0x79da, (q15_t)0x79d9,
+  (q15_t)0x79d7, (q15_t)0x79d5, (q15_t)0x79d3, (q15_t)0x79d1, (q15_t)0x79cf, (q15_t)0x79cd, (q15_t)0x79cb, (q15_t)0x79c9,
+  (q15_t)0x79c7, (q15_t)0x79c5, (q15_t)0x79c3, (q15_t)0x79c1, (q15_t)0x79bf, (q15_t)0x79bd, (q15_t)0x79bc, (q15_t)0x79ba,
+  (q15_t)0x79b8, (q15_t)0x79b6, (q15_t)0x79b4, (q15_t)0x79b2, (q15_t)0x79b0, (q15_t)0x79ae, (q15_t)0x79ac, (q15_t)0x79aa,
+  (q15_t)0x79a8, (q15_t)0x79a6, (q15_t)0x79a4, (q15_t)0x79a2, (q15_t)0x79a0, (q15_t)0x799e, (q15_t)0x799c, (q15_t)0x799a,
+  (q15_t)0x7998, (q15_t)0x7996, (q15_t)0x7994, (q15_t)0x7992, (q15_t)0x7991, (q15_t)0x798f, (q15_t)0x798d, (q15_t)0x798b,
+  (q15_t)0x7989, (q15_t)0x7987, (q15_t)0x7985, (q15_t)0x7983, (q15_t)0x7981, (q15_t)0x797f, (q15_t)0x797d, (q15_t)0x797b,
+  (q15_t)0x7979, (q15_t)0x7977, (q15_t)0x7975, (q15_t)0x7973, (q15_t)0x7971, (q15_t)0x796f, (q15_t)0x796d, (q15_t)0x796b,
+  (q15_t)0x7969, (q15_t)0x7967, (q15_t)0x7965, (q15_t)0x7963, (q15_t)0x7961, (q15_t)0x795f, (q15_t)0x795d, (q15_t)0x795b,
+  (q15_t)0x7959, (q15_t)0x7957, (q15_t)0x7955, (q15_t)0x7953, (q15_t)0x7951, (q15_t)0x794f, (q15_t)0x794d, (q15_t)0x794b,
+  (q15_t)0x7949, (q15_t)0x7947, (q15_t)0x7945, (q15_t)0x7943, (q15_t)0x7941, (q15_t)0x793f, (q15_t)0x793d, (q15_t)0x793b,
+  (q15_t)0x7939, (q15_t)0x7937, (q15_t)0x7935, (q15_t)0x7933, (q15_t)0x7931, (q15_t)0x792f, (q15_t)0x792d, (q15_t)0x792b,
+  (q15_t)0x7929, (q15_t)0x7927, (q15_t)0x7925, (q15_t)0x7923, (q15_t)0x7921, (q15_t)0x791f, (q15_t)0x791d, (q15_t)0x791a,
+  (q15_t)0x7918, (q15_t)0x7916, (q15_t)0x7914, (q15_t)0x7912, (q15_t)0x7910, (q15_t)0x790e, (q15_t)0x790c, (q15_t)0x790a,
+  (q15_t)0x7908, (q15_t)0x7906, (q15_t)0x7904, (q15_t)0x7902, (q15_t)0x7900, (q15_t)0x78fe, (q15_t)0x78fc, (q15_t)0x78fa,
+  (q15_t)0x78f8, (q15_t)0x78f6, (q15_t)0x78f4, (q15_t)0x78f2, (q15_t)0x78f0, (q15_t)0x78ed, (q15_t)0x78eb, (q15_t)0x78e9,
+  (q15_t)0x78e7, (q15_t)0x78e5, (q15_t)0x78e3, (q15_t)0x78e1, (q15_t)0x78df, (q15_t)0x78dd, (q15_t)0x78db, (q15_t)0x78d9,
+  (q15_t)0x78d7, (q15_t)0x78d5, (q15_t)0x78d3, (q15_t)0x78d1, (q15_t)0x78ce, (q15_t)0x78cc, (q15_t)0x78ca, (q15_t)0x78c8,
+  (q15_t)0x78c6, (q15_t)0x78c4, (q15_t)0x78c2, (q15_t)0x78c0, (q15_t)0x78be, (q15_t)0x78bc, (q15_t)0x78ba, (q15_t)0x78b8,
+  (q15_t)0x78b5, (q15_t)0x78b3, (q15_t)0x78b1, (q15_t)0x78af, (q15_t)0x78ad, (q15_t)0x78ab, (q15_t)0x78a9, (q15_t)0x78a7,
+  (q15_t)0x78a5, (q15_t)0x78a3, (q15_t)0x78a0, (q15_t)0x789e, (q15_t)0x789c, (q15_t)0x789a, (q15_t)0x7898, (q15_t)0x7896,
+  (q15_t)0x7894, (q15_t)0x7892, (q15_t)0x7890, (q15_t)0x788e, (q15_t)0x788b, (q15_t)0x7889, (q15_t)0x7887, (q15_t)0x7885,
+  (q15_t)0x7883, (q15_t)0x7881, (q15_t)0x787f, (q15_t)0x787d, (q15_t)0x787a, (q15_t)0x7878, (q15_t)0x7876, (q15_t)0x7874,
+  (q15_t)0x7872, (q15_t)0x7870, (q15_t)0x786e, (q15_t)0x786c, (q15_t)0x7869, (q15_t)0x7867, (q15_t)0x7865, (q15_t)0x7863,
+  (q15_t)0x7861, (q15_t)0x785f, (q15_t)0x785d, (q15_t)0x785b, (q15_t)0x7858, (q15_t)0x7856, (q15_t)0x7854, (q15_t)0x7852,
+  (q15_t)0x7850, (q15_t)0x784e, (q15_t)0x784c, (q15_t)0x7849, (q15_t)0x7847, (q15_t)0x7845, (q15_t)0x7843, (q15_t)0x7841,
+  (q15_t)0x783f, (q15_t)0x783c, (q15_t)0x783a, (q15_t)0x7838, (q15_t)0x7836, (q15_t)0x7834, (q15_t)0x7832, (q15_t)0x7830,
+  (q15_t)0x782d, (q15_t)0x782b, (q15_t)0x7829, (q15_t)0x7827, (q15_t)0x7825, (q15_t)0x7823, (q15_t)0x7820, (q15_t)0x781e,
+  (q15_t)0x781c, (q15_t)0x781a, (q15_t)0x7818, (q15_t)0x7816, (q15_t)0x7813, (q15_t)0x7811, (q15_t)0x780f, (q15_t)0x780d,
+  (q15_t)0x780b, (q15_t)0x7808, (q15_t)0x7806, (q15_t)0x7804, (q15_t)0x7802, (q15_t)0x7800, (q15_t)0x77fe, (q15_t)0x77fb,
+  (q15_t)0x77f9, (q15_t)0x77f7, (q15_t)0x77f5, (q15_t)0x77f3, (q15_t)0x77f0, (q15_t)0x77ee, (q15_t)0x77ec, (q15_t)0x77ea,
+  (q15_t)0x77e8, (q15_t)0x77e5, (q15_t)0x77e3, (q15_t)0x77e1, (q15_t)0x77df, (q15_t)0x77dd, (q15_t)0x77da, (q15_t)0x77d8,
+  (q15_t)0x77d6, (q15_t)0x77d4, (q15_t)0x77d2, (q15_t)0x77cf, (q15_t)0x77cd, (q15_t)0x77cb, (q15_t)0x77c9, (q15_t)0x77c6,
+  (q15_t)0x77c4, (q15_t)0x77c2, (q15_t)0x77c0, (q15_t)0x77be, (q15_t)0x77bb, (q15_t)0x77b9, (q15_t)0x77b7, (q15_t)0x77b5,
+  (q15_t)0x77b2, (q15_t)0x77b0, (q15_t)0x77ae, (q15_t)0x77ac, (q15_t)0x77aa, (q15_t)0x77a7, (q15_t)0x77a5, (q15_t)0x77a3,
+  (q15_t)0x77a1, (q15_t)0x779e, (q15_t)0x779c, (q15_t)0x779a, (q15_t)0x7798, (q15_t)0x7795, (q15_t)0x7793, (q15_t)0x7791,
+  (q15_t)0x778f, (q15_t)0x778c, (q15_t)0x778a, (q15_t)0x7788, (q15_t)0x7786, (q15_t)0x7783, (q15_t)0x7781, (q15_t)0x777f,
+  (q15_t)0x777d, (q15_t)0x777a, (q15_t)0x7778, (q15_t)0x7776, (q15_t)0x7774, (q15_t)0x7771, (q15_t)0x776f, (q15_t)0x776d,
+  (q15_t)0x776b, (q15_t)0x7768, (q15_t)0x7766, (q15_t)0x7764, (q15_t)0x7762, (q15_t)0x775f, (q15_t)0x775d, (q15_t)0x775b,
+  (q15_t)0x7759, (q15_t)0x7756, (q15_t)0x7754, (q15_t)0x7752, (q15_t)0x774f, (q15_t)0x774d, (q15_t)0x774b, (q15_t)0x7749,
+  (q15_t)0x7746, (q15_t)0x7744, (q15_t)0x7742, (q15_t)0x773f, (q15_t)0x773d, (q15_t)0x773b, (q15_t)0x7739, (q15_t)0x7736,
+  (q15_t)0x7734, (q15_t)0x7732, (q15_t)0x772f, (q15_t)0x772d, (q15_t)0x772b, (q15_t)0x7729, (q15_t)0x7726, (q15_t)0x7724,
+  (q15_t)0x7722, (q15_t)0x771f, (q15_t)0x771d, (q15_t)0x771b, (q15_t)0x7719, (q15_t)0x7716, (q15_t)0x7714, (q15_t)0x7712,
+  (q15_t)0x770f, (q15_t)0x770d, (q15_t)0x770b, (q15_t)0x7708, (q15_t)0x7706, (q15_t)0x7704, (q15_t)0x7701, (q15_t)0x76ff,
+  (q15_t)0x76fd, (q15_t)0x76fa, (q15_t)0x76f8, (q15_t)0x76f6, (q15_t)0x76f4, (q15_t)0x76f1, (q15_t)0x76ef, (q15_t)0x76ed,
+  (q15_t)0x76ea, (q15_t)0x76e8, (q15_t)0x76e6, (q15_t)0x76e3, (q15_t)0x76e1, (q15_t)0x76df, (q15_t)0x76dc, (q15_t)0x76da,
+  (q15_t)0x76d8, (q15_t)0x76d5, (q15_t)0x76d3, (q15_t)0x76d1, (q15_t)0x76ce, (q15_t)0x76cc, (q15_t)0x76ca, (q15_t)0x76c7,
+  (q15_t)0x76c5, (q15_t)0x76c3, (q15_t)0x76c0, (q15_t)0x76be, (q15_t)0x76bc, (q15_t)0x76b9, (q15_t)0x76b7, (q15_t)0x76b4,
+  (q15_t)0x76b2, (q15_t)0x76b0, (q15_t)0x76ad, (q15_t)0x76ab, (q15_t)0x76a9, (q15_t)0x76a6, (q15_t)0x76a4, (q15_t)0x76a2,
+  (q15_t)0x769f, (q15_t)0x769d, (q15_t)0x769b, (q15_t)0x7698, (q15_t)0x7696, (q15_t)0x7693, (q15_t)0x7691, (q15_t)0x768f,
+  (q15_t)0x768c, (q15_t)0x768a, (q15_t)0x7688, (q15_t)0x7685, (q15_t)0x7683, (q15_t)0x7681, (q15_t)0x767e, (q15_t)0x767c,
+  (q15_t)0x7679, (q15_t)0x7677, (q15_t)0x7675, (q15_t)0x7672, (q15_t)0x7670, (q15_t)0x766d, (q15_t)0x766b, (q15_t)0x7669,
+  (q15_t)0x7666, (q15_t)0x7664, (q15_t)0x7662, (q15_t)0x765f, (q15_t)0x765d, (q15_t)0x765a, (q15_t)0x7658, (q15_t)0x7656,
+  (q15_t)0x7653, (q15_t)0x7651, (q15_t)0x764e, (q15_t)0x764c, (q15_t)0x764a, (q15_t)0x7647, (q15_t)0x7645, (q15_t)0x7642,
+  (q15_t)0x7640, (q15_t)0x763e, (q15_t)0x763b, (q15_t)0x7639, (q15_t)0x7636, (q15_t)0x7634, (q15_t)0x7632, (q15_t)0x762f,
+  (q15_t)0x762d, (q15_t)0x762a, (q15_t)0x7628, (q15_t)0x7625, (q15_t)0x7623, (q15_t)0x7621, (q15_t)0x761e, (q15_t)0x761c,
+  (q15_t)0x7619, (q15_t)0x7617, (q15_t)0x7615, (q15_t)0x7612, (q15_t)0x7610, (q15_t)0x760d, (q15_t)0x760b, (q15_t)0x7608,
+  (q15_t)0x7606, (q15_t)0x7604, (q15_t)0x7601, (q15_t)0x75ff, (q15_t)0x75fc, (q15_t)0x75fa, (q15_t)0x75f7, (q15_t)0x75f5,
+  (q15_t)0x75f2, (q15_t)0x75f0, (q15_t)0x75ee, (q15_t)0x75eb, (q15_t)0x75e9, (q15_t)0x75e6, (q15_t)0x75e4, (q15_t)0x75e1,
+  (q15_t)0x75df, (q15_t)0x75dc, (q15_t)0x75da, (q15_t)0x75d8, (q15_t)0x75d5, (q15_t)0x75d3, (q15_t)0x75d0, (q15_t)0x75ce,
+  (q15_t)0x75cb, (q15_t)0x75c9, (q15_t)0x75c6, (q15_t)0x75c4, (q15_t)0x75c1, (q15_t)0x75bf, (q15_t)0x75bc, (q15_t)0x75ba,
+  (q15_t)0x75b8, (q15_t)0x75b5, (q15_t)0x75b3, (q15_t)0x75b0, (q15_t)0x75ae, (q15_t)0x75ab, (q15_t)0x75a9, (q15_t)0x75a6,
+  (q15_t)0x75a4, (q15_t)0x75a1, (q15_t)0x759f, (q15_t)0x759c, (q15_t)0x759a, (q15_t)0x7597, (q15_t)0x7595, (q15_t)0x7592,
+  (q15_t)0x7590, (q15_t)0x758d, (q15_t)0x758b, (q15_t)0x7588, (q15_t)0x7586, (q15_t)0x7584, (q15_t)0x7581, (q15_t)0x757f,
+  (q15_t)0x757c, (q15_t)0x757a, (q15_t)0x7577, (q15_t)0x7575, (q15_t)0x7572, (q15_t)0x7570, (q15_t)0x756d, (q15_t)0x756b,
+  (q15_t)0x7568, (q15_t)0x7566, (q15_t)0x7563, (q15_t)0x7561, (q15_t)0x755e, (q15_t)0x755c, (q15_t)0x7559, (q15_t)0x7556,
+  (q15_t)0x7554, (q15_t)0x7551, (q15_t)0x754f, (q15_t)0x754c, (q15_t)0x754a, (q15_t)0x7547, (q15_t)0x7545, (q15_t)0x7542,
+  (q15_t)0x7540, (q15_t)0x753d, (q15_t)0x753b, (q15_t)0x7538, (q15_t)0x7536, (q15_t)0x7533, (q15_t)0x7531, (q15_t)0x752e,
+  (q15_t)0x752c, (q15_t)0x7529, (q15_t)0x7527, (q15_t)0x7524, (q15_t)0x7522, (q15_t)0x751f, (q15_t)0x751c, (q15_t)0x751a,
+  (q15_t)0x7517, (q15_t)0x7515, (q15_t)0x7512, (q15_t)0x7510, (q15_t)0x750d, (q15_t)0x750b, (q15_t)0x7508, (q15_t)0x7506,
+  (q15_t)0x7503, (q15_t)0x7501, (q15_t)0x74fe, (q15_t)0x74fb, (q15_t)0x74f9, (q15_t)0x74f6, (q15_t)0x74f4, (q15_t)0x74f1,
+  (q15_t)0x74ef, (q15_t)0x74ec, (q15_t)0x74ea, (q15_t)0x74e7, (q15_t)0x74e4, (q15_t)0x74e2, (q15_t)0x74df, (q15_t)0x74dd,
+  (q15_t)0x74da, (q15_t)0x74d8, (q15_t)0x74d5, (q15_t)0x74d2, (q15_t)0x74d0, (q15_t)0x74cd, (q15_t)0x74cb, (q15_t)0x74c8,
+  (q15_t)0x74c6, (q15_t)0x74c3, (q15_t)0x74c0, (q15_t)0x74be, (q15_t)0x74bb, (q15_t)0x74b9, (q15_t)0x74b6, (q15_t)0x74b4,
+  (q15_t)0x74b1, (q15_t)0x74ae, (q15_t)0x74ac, (q15_t)0x74a9, (q15_t)0x74a7, (q15_t)0x74a4, (q15_t)0x74a1, (q15_t)0x749f,
+  (q15_t)0x749c, (q15_t)0x749a, (q15_t)0x7497, (q15_t)0x7495, (q15_t)0x7492, (q15_t)0x748f, (q15_t)0x748d, (q15_t)0x748a,
+  (q15_t)0x7488, (q15_t)0x7485, (q15_t)0x7482, (q15_t)0x7480, (q15_t)0x747d, (q15_t)0x747b, (q15_t)0x7478, (q15_t)0x7475,
+  (q15_t)0x7473, (q15_t)0x7470, (q15_t)0x746d, (q15_t)0x746b, (q15_t)0x7468, (q15_t)0x7466, (q15_t)0x7463, (q15_t)0x7460,
+  (q15_t)0x745e, (q15_t)0x745b, (q15_t)0x7459, (q15_t)0x7456, (q15_t)0x7453, (q15_t)0x7451, (q15_t)0x744e, (q15_t)0x744b,
+  (q15_t)0x7449, (q15_t)0x7446, (q15_t)0x7444, (q15_t)0x7441, (q15_t)0x743e, (q15_t)0x743c, (q15_t)0x7439, (q15_t)0x7436,
+  (q15_t)0x7434, (q15_t)0x7431, (q15_t)0x742f, (q15_t)0x742c, (q15_t)0x7429, (q15_t)0x7427, (q15_t)0x7424, (q15_t)0x7421,
+  (q15_t)0x741f, (q15_t)0x741c, (q15_t)0x7419, (q15_t)0x7417, (q15_t)0x7414, (q15_t)0x7411, (q15_t)0x740f, (q15_t)0x740c,
+  (q15_t)0x740a, (q15_t)0x7407, (q15_t)0x7404, (q15_t)0x7402, (q15_t)0x73ff, (q15_t)0x73fc, (q15_t)0x73fa, (q15_t)0x73f7,
+  (q15_t)0x73f4, (q15_t)0x73f2, (q15_t)0x73ef, (q15_t)0x73ec, (q15_t)0x73ea, (q15_t)0x73e7, (q15_t)0x73e4, (q15_t)0x73e2,
+  (q15_t)0x73df, (q15_t)0x73dc, (q15_t)0x73da, (q15_t)0x73d7, (q15_t)0x73d4, (q15_t)0x73d2, (q15_t)0x73cf, (q15_t)0x73cc,
+  (q15_t)0x73ca, (q15_t)0x73c7, (q15_t)0x73c4, (q15_t)0x73c1, (q15_t)0x73bf, (q15_t)0x73bc, (q15_t)0x73b9, (q15_t)0x73b7,
+  (q15_t)0x73b4, (q15_t)0x73b1, (q15_t)0x73af, (q15_t)0x73ac, (q15_t)0x73a9, (q15_t)0x73a7, (q15_t)0x73a4, (q15_t)0x73a1,
+  (q15_t)0x739f, (q15_t)0x739c, (q15_t)0x7399, (q15_t)0x7396, (q15_t)0x7394, (q15_t)0x7391, (q15_t)0x738e, (q15_t)0x738c,
+  (q15_t)0x7389, (q15_t)0x7386, (q15_t)0x7384, (q15_t)0x7381, (q15_t)0x737e, (q15_t)0x737b, (q15_t)0x7379, (q15_t)0x7376,
+  (q15_t)0x7373, (q15_t)0x7371, (q15_t)0x736e, (q15_t)0x736b, (q15_t)0x7368, (q15_t)0x7366, (q15_t)0x7363, (q15_t)0x7360,
+  (q15_t)0x735e, (q15_t)0x735b, (q15_t)0x7358, (q15_t)0x7355, (q15_t)0x7353, (q15_t)0x7350, (q15_t)0x734d, (q15_t)0x734a,
+  (q15_t)0x7348, (q15_t)0x7345, (q15_t)0x7342, (q15_t)0x7340, (q15_t)0x733d, (q15_t)0x733a, (q15_t)0x7337, (q15_t)0x7335,
+  (q15_t)0x7332, (q15_t)0x732f, (q15_t)0x732c, (q15_t)0x732a, (q15_t)0x7327, (q15_t)0x7324, (q15_t)0x7321, (q15_t)0x731f,
+  (q15_t)0x731c, (q15_t)0x7319, (q15_t)0x7316, (q15_t)0x7314, (q15_t)0x7311, (q15_t)0x730e, (q15_t)0x730b, (q15_t)0x7309,
+  (q15_t)0x7306, (q15_t)0x7303, (q15_t)0x7300, (q15_t)0x72fe, (q15_t)0x72fb, (q15_t)0x72f8, (q15_t)0x72f5, (q15_t)0x72f3,
+  (q15_t)0x72f0, (q15_t)0x72ed, (q15_t)0x72ea, (q15_t)0x72e8, (q15_t)0x72e5, (q15_t)0x72e2, (q15_t)0x72df, (q15_t)0x72dc,
+  (q15_t)0x72da, (q15_t)0x72d7, (q15_t)0x72d4, (q15_t)0x72d1, (q15_t)0x72cf, (q15_t)0x72cc, (q15_t)0x72c9, (q15_t)0x72c6,
+  (q15_t)0x72c3, (q15_t)0x72c1, (q15_t)0x72be, (q15_t)0x72bb, (q15_t)0x72b8, (q15_t)0x72b5, (q15_t)0x72b3, (q15_t)0x72b0,
+  (q15_t)0x72ad, (q15_t)0x72aa, (q15_t)0x72a8, (q15_t)0x72a5, (q15_t)0x72a2, (q15_t)0x729f, (q15_t)0x729c, (q15_t)0x729a,
+  (q15_t)0x7297, (q15_t)0x7294, (q15_t)0x7291, (q15_t)0x728e, (q15_t)0x728c, (q15_t)0x7289, (q15_t)0x7286, (q15_t)0x7283,
+  (q15_t)0x7280, (q15_t)0x727e, (q15_t)0x727b, (q15_t)0x7278, (q15_t)0x7275, (q15_t)0x7272, (q15_t)0x726f, (q15_t)0x726d,
+  (q15_t)0x726a, (q15_t)0x7267, (q15_t)0x7264, (q15_t)0x7261, (q15_t)0x725f, (q15_t)0x725c, (q15_t)0x7259, (q15_t)0x7256,
+  (q15_t)0x7253, (q15_t)0x7250, (q15_t)0x724e, (q15_t)0x724b, (q15_t)0x7248, (q15_t)0x7245, (q15_t)0x7242, (q15_t)0x723f,
+  (q15_t)0x723d, (q15_t)0x723a, (q15_t)0x7237, (q15_t)0x7234, (q15_t)0x7231, (q15_t)0x722e, (q15_t)0x722c, (q15_t)0x7229,
+  (q15_t)0x7226, (q15_t)0x7223, (q15_t)0x7220, (q15_t)0x721d, (q15_t)0x721b, (q15_t)0x7218, (q15_t)0x7215, (q15_t)0x7212,
+  (q15_t)0x720f, (q15_t)0x720c, (q15_t)0x7209, (q15_t)0x7207, (q15_t)0x7204, (q15_t)0x7201, (q15_t)0x71fe, (q15_t)0x71fb,
+  (q15_t)0x71f8, (q15_t)0x71f5, (q15_t)0x71f3, (q15_t)0x71f0, (q15_t)0x71ed, (q15_t)0x71ea, (q15_t)0x71e7, (q15_t)0x71e4,
+  (q15_t)0x71e1, (q15_t)0x71df, (q15_t)0x71dc, (q15_t)0x71d9, (q15_t)0x71d6, (q15_t)0x71d3, (q15_t)0x71d0, (q15_t)0x71cd,
+  (q15_t)0x71ca, (q15_t)0x71c8, (q15_t)0x71c5, (q15_t)0x71c2, (q15_t)0x71bf, (q15_t)0x71bc, (q15_t)0x71b9, (q15_t)0x71b6,
+  (q15_t)0x71b3, (q15_t)0x71b0, (q15_t)0x71ae, (q15_t)0x71ab, (q15_t)0x71a8, (q15_t)0x71a5, (q15_t)0x71a2, (q15_t)0x719f,
+  (q15_t)0x719c, (q15_t)0x7199, (q15_t)0x7196, (q15_t)0x7194, (q15_t)0x7191, (q15_t)0x718e, (q15_t)0x718b, (q15_t)0x7188,
+  (q15_t)0x7185, (q15_t)0x7182, (q15_t)0x717f, (q15_t)0x717c, (q15_t)0x7179, (q15_t)0x7177, (q15_t)0x7174, (q15_t)0x7171,
+  (q15_t)0x716e, (q15_t)0x716b, (q15_t)0x7168, (q15_t)0x7165, (q15_t)0x7162, (q15_t)0x715f, (q15_t)0x715c, (q15_t)0x7159,
+  (q15_t)0x7156, (q15_t)0x7154, (q15_t)0x7151, (q15_t)0x714e, (q15_t)0x714b, (q15_t)0x7148, (q15_t)0x7145, (q15_t)0x7142,
+  (q15_t)0x713f, (q15_t)0x713c, (q15_t)0x7139, (q15_t)0x7136, (q15_t)0x7133, (q15_t)0x7130, (q15_t)0x712d, (q15_t)0x712b,
+  (q15_t)0x7128, (q15_t)0x7125, (q15_t)0x7122, (q15_t)0x711f, (q15_t)0x711c, (q15_t)0x7119, (q15_t)0x7116, (q15_t)0x7113,
+  (q15_t)0x7110, (q15_t)0x710d, (q15_t)0x710a, (q15_t)0x7107, (q15_t)0x7104, (q15_t)0x7101, (q15_t)0x70fe, (q15_t)0x70fb,
+  (q15_t)0x70f8, (q15_t)0x70f6, (q15_t)0x70f3, (q15_t)0x70f0, (q15_t)0x70ed, (q15_t)0x70ea, (q15_t)0x70e7, (q15_t)0x70e4,
+  (q15_t)0x70e1, (q15_t)0x70de, (q15_t)0x70db, (q15_t)0x70d8, (q15_t)0x70d5, (q15_t)0x70d2, (q15_t)0x70cf, (q15_t)0x70cc,
+  (q15_t)0x70c9, (q15_t)0x70c6, (q15_t)0x70c3, (q15_t)0x70c0, (q15_t)0x70bd, (q15_t)0x70ba, (q15_t)0x70b7, (q15_t)0x70b4,
+  (q15_t)0x70b1, (q15_t)0x70ae, (q15_t)0x70ab, (q15_t)0x70a8, (q15_t)0x70a5, (q15_t)0x70a2, (q15_t)0x709f, (q15_t)0x709c,
+  (q15_t)0x7099, (q15_t)0x7096, (q15_t)0x7093, (q15_t)0x7090, (q15_t)0x708d, (q15_t)0x708a, (q15_t)0x7087, (q15_t)0x7084,
+  (q15_t)0x7081, (q15_t)0x707e, (q15_t)0x707b, (q15_t)0x7078, (q15_t)0x7075, (q15_t)0x7072, (q15_t)0x706f, (q15_t)0x706c,
+  (q15_t)0x7069, (q15_t)0x7066, (q15_t)0x7063, (q15_t)0x7060, (q15_t)0x705d, (q15_t)0x705a, (q15_t)0x7057, (q15_t)0x7054,
+  (q15_t)0x7051, (q15_t)0x704e, (q15_t)0x704b, (q15_t)0x7048, (q15_t)0x7045, (q15_t)0x7042, (q15_t)0x703f, (q15_t)0x703c,
+  (q15_t)0x7039, (q15_t)0x7036, (q15_t)0x7033, (q15_t)0x7030, (q15_t)0x702d, (q15_t)0x702a, (q15_t)0x7027, (q15_t)0x7024,
+  (q15_t)0x7021, (q15_t)0x701e, (q15_t)0x701b, (q15_t)0x7018, (q15_t)0x7015, (q15_t)0x7012, (q15_t)0x700f, (q15_t)0x700c,
+  (q15_t)0x7009, (q15_t)0x7006, (q15_t)0x7003, (q15_t)0x7000, (q15_t)0x6ffd, (q15_t)0x6ffa, (q15_t)0x6ff7, (q15_t)0x6ff3,
+  (q15_t)0x6ff0, (q15_t)0x6fed, (q15_t)0x6fea, (q15_t)0x6fe7, (q15_t)0x6fe4, (q15_t)0x6fe1, (q15_t)0x6fde, (q15_t)0x6fdb,
+  (q15_t)0x6fd8, (q15_t)0x6fd5, (q15_t)0x6fd2, (q15_t)0x6fcf, (q15_t)0x6fcc, (q15_t)0x6fc9, (q15_t)0x6fc6, (q15_t)0x6fc3,
+  (q15_t)0x6fc0, (q15_t)0x6fbc, (q15_t)0x6fb9, (q15_t)0x6fb6, (q15_t)0x6fb3, (q15_t)0x6fb0, (q15_t)0x6fad, (q15_t)0x6faa,
+  (q15_t)0x6fa7, (q15_t)0x6fa4, (q15_t)0x6fa1, (q15_t)0x6f9e, (q15_t)0x6f9b, (q15_t)0x6f98, (q15_t)0x6f95, (q15_t)0x6f91,
+  (q15_t)0x6f8e, (q15_t)0x6f8b, (q15_t)0x6f88, (q15_t)0x6f85, (q15_t)0x6f82, (q15_t)0x6f7f, (q15_t)0x6f7c, (q15_t)0x6f79,
+  (q15_t)0x6f76, (q15_t)0x6f73, (q15_t)0x6f70, (q15_t)0x6f6c, (q15_t)0x6f69, (q15_t)0x6f66, (q15_t)0x6f63, (q15_t)0x6f60,
+  (q15_t)0x6f5d, (q15_t)0x6f5a, (q15_t)0x6f57, (q15_t)0x6f54, (q15_t)0x6f51, (q15_t)0x6f4d, (q15_t)0x6f4a, (q15_t)0x6f47,
+  (q15_t)0x6f44, (q15_t)0x6f41, (q15_t)0x6f3e, (q15_t)0x6f3b, (q15_t)0x6f38, (q15_t)0x6f35, (q15_t)0x6f31, (q15_t)0x6f2e,
+  (q15_t)0x6f2b, (q15_t)0x6f28, (q15_t)0x6f25, (q15_t)0x6f22, (q15_t)0x6f1f, (q15_t)0x6f1c, (q15_t)0x6f19, (q15_t)0x6f15,
+  (q15_t)0x6f12, (q15_t)0x6f0f, (q15_t)0x6f0c, (q15_t)0x6f09, (q15_t)0x6f06, (q15_t)0x6f03, (q15_t)0x6f00, (q15_t)0x6efc,
+  (q15_t)0x6ef9, (q15_t)0x6ef6, (q15_t)0x6ef3, (q15_t)0x6ef0, (q15_t)0x6eed, (q15_t)0x6eea, (q15_t)0x6ee7, (q15_t)0x6ee3,
+  (q15_t)0x6ee0, (q15_t)0x6edd, (q15_t)0x6eda, (q15_t)0x6ed7, (q15_t)0x6ed4, (q15_t)0x6ed1, (q15_t)0x6ecd, (q15_t)0x6eca,
+  (q15_t)0x6ec7, (q15_t)0x6ec4, (q15_t)0x6ec1, (q15_t)0x6ebe, (q15_t)0x6eba, (q15_t)0x6eb7, (q15_t)0x6eb4, (q15_t)0x6eb1,
+  (q15_t)0x6eae, (q15_t)0x6eab, (q15_t)0x6ea8, (q15_t)0x6ea4, (q15_t)0x6ea1, (q15_t)0x6e9e, (q15_t)0x6e9b, (q15_t)0x6e98,
+  (q15_t)0x6e95, (q15_t)0x6e91, (q15_t)0x6e8e, (q15_t)0x6e8b, (q15_t)0x6e88, (q15_t)0x6e85, (q15_t)0x6e82, (q15_t)0x6e7e,
+  (q15_t)0x6e7b, (q15_t)0x6e78, (q15_t)0x6e75, (q15_t)0x6e72, (q15_t)0x6e6f, (q15_t)0x6e6b, (q15_t)0x6e68, (q15_t)0x6e65,
+  (q15_t)0x6e62, (q15_t)0x6e5f, (q15_t)0x6e5b, (q15_t)0x6e58, (q15_t)0x6e55, (q15_t)0x6e52, (q15_t)0x6e4f, (q15_t)0x6e4c,
+  (q15_t)0x6e48, (q15_t)0x6e45, (q15_t)0x6e42, (q15_t)0x6e3f, (q15_t)0x6e3c, (q15_t)0x6e38, (q15_t)0x6e35, (q15_t)0x6e32,
+  (q15_t)0x6e2f, (q15_t)0x6e2c, (q15_t)0x6e28, (q15_t)0x6e25, (q15_t)0x6e22, (q15_t)0x6e1f, (q15_t)0x6e1c, (q15_t)0x6e18,
+  (q15_t)0x6e15, (q15_t)0x6e12, (q15_t)0x6e0f, (q15_t)0x6e0c, (q15_t)0x6e08, (q15_t)0x6e05, (q15_t)0x6e02, (q15_t)0x6dff,
+  (q15_t)0x6dfb, (q15_t)0x6df8, (q15_t)0x6df5, (q15_t)0x6df2, (q15_t)0x6def, (q15_t)0x6deb, (q15_t)0x6de8, (q15_t)0x6de5,
+  (q15_t)0x6de2, (q15_t)0x6ddf, (q15_t)0x6ddb, (q15_t)0x6dd8, (q15_t)0x6dd5, (q15_t)0x6dd2, (q15_t)0x6dce, (q15_t)0x6dcb,
+  (q15_t)0x6dc8, (q15_t)0x6dc5, (q15_t)0x6dc1, (q15_t)0x6dbe, (q15_t)0x6dbb, (q15_t)0x6db8, (q15_t)0x6db5, (q15_t)0x6db1,
+  (q15_t)0x6dae, (q15_t)0x6dab, (q15_t)0x6da8, (q15_t)0x6da4, (q15_t)0x6da1, (q15_t)0x6d9e, (q15_t)0x6d9b, (q15_t)0x6d97,
+  (q15_t)0x6d94, (q15_t)0x6d91, (q15_t)0x6d8e, (q15_t)0x6d8a, (q15_t)0x6d87, (q15_t)0x6d84, (q15_t)0x6d81, (q15_t)0x6d7d,
+  (q15_t)0x6d7a, (q15_t)0x6d77, (q15_t)0x6d74, (q15_t)0x6d70, (q15_t)0x6d6d, (q15_t)0x6d6a, (q15_t)0x6d67, (q15_t)0x6d63,
+  (q15_t)0x6d60, (q15_t)0x6d5d, (q15_t)0x6d59, (q15_t)0x6d56, (q15_t)0x6d53, (q15_t)0x6d50, (q15_t)0x6d4c, (q15_t)0x6d49,
+  (q15_t)0x6d46, (q15_t)0x6d43, (q15_t)0x6d3f, (q15_t)0x6d3c, (q15_t)0x6d39, (q15_t)0x6d36, (q15_t)0x6d32, (q15_t)0x6d2f,
+  (q15_t)0x6d2c, (q15_t)0x6d28, (q15_t)0x6d25, (q15_t)0x6d22, (q15_t)0x6d1f, (q15_t)0x6d1b, (q15_t)0x6d18, (q15_t)0x6d15,
+  (q15_t)0x6d11, (q15_t)0x6d0e, (q15_t)0x6d0b, (q15_t)0x6d08, (q15_t)0x6d04, (q15_t)0x6d01, (q15_t)0x6cfe, (q15_t)0x6cfa,
+  (q15_t)0x6cf7, (q15_t)0x6cf4, (q15_t)0x6cf0, (q15_t)0x6ced, (q15_t)0x6cea, (q15_t)0x6ce7, (q15_t)0x6ce3, (q15_t)0x6ce0,
+  (q15_t)0x6cdd, (q15_t)0x6cd9, (q15_t)0x6cd6, (q15_t)0x6cd3, (q15_t)0x6ccf, (q15_t)0x6ccc, (q15_t)0x6cc9, (q15_t)0x6cc5,
+  (q15_t)0x6cc2, (q15_t)0x6cbf, (q15_t)0x6cbc, (q15_t)0x6cb8, (q15_t)0x6cb5, (q15_t)0x6cb2, (q15_t)0x6cae, (q15_t)0x6cab,
+  (q15_t)0x6ca8, (q15_t)0x6ca4, (q15_t)0x6ca1, (q15_t)0x6c9e, (q15_t)0x6c9a, (q15_t)0x6c97, (q15_t)0x6c94, (q15_t)0x6c90,
+  (q15_t)0x6c8d, (q15_t)0x6c8a, (q15_t)0x6c86, (q15_t)0x6c83, (q15_t)0x6c80, (q15_t)0x6c7c, (q15_t)0x6c79, (q15_t)0x6c76,
+  (q15_t)0x6c72, (q15_t)0x6c6f, (q15_t)0x6c6c, (q15_t)0x6c68, (q15_t)0x6c65, (q15_t)0x6c62, (q15_t)0x6c5e, (q15_t)0x6c5b,
+  (q15_t)0x6c58, (q15_t)0x6c54, (q15_t)0x6c51, (q15_t)0x6c4e, (q15_t)0x6c4a, (q15_t)0x6c47, (q15_t)0x6c44, (q15_t)0x6c40,
+  (q15_t)0x6c3d, (q15_t)0x6c39, (q15_t)0x6c36, (q15_t)0x6c33, (q15_t)0x6c2f, (q15_t)0x6c2c, (q15_t)0x6c29, (q15_t)0x6c25,
+  (q15_t)0x6c22, (q15_t)0x6c1f, (q15_t)0x6c1b, (q15_t)0x6c18, (q15_t)0x6c15, (q15_t)0x6c11, (q15_t)0x6c0e, (q15_t)0x6c0a,
+  (q15_t)0x6c07, (q15_t)0x6c04, (q15_t)0x6c00, (q15_t)0x6bfd, (q15_t)0x6bfa, (q15_t)0x6bf6, (q15_t)0x6bf3, (q15_t)0x6bef,
+  (q15_t)0x6bec, (q15_t)0x6be9, (q15_t)0x6be5, (q15_t)0x6be2, (q15_t)0x6bdf, (q15_t)0x6bdb, (q15_t)0x6bd8, (q15_t)0x6bd4,
+  (q15_t)0x6bd1, (q15_t)0x6bce, (q15_t)0x6bca, (q15_t)0x6bc7, (q15_t)0x6bc3, (q15_t)0x6bc0, (q15_t)0x6bbd, (q15_t)0x6bb9,
+  (q15_t)0x6bb6, (q15_t)0x6bb2, (q15_t)0x6baf, (q15_t)0x6bac, (q15_t)0x6ba8, (q15_t)0x6ba5, (q15_t)0x6ba1, (q15_t)0x6b9e,
+  (q15_t)0x6b9b, (q15_t)0x6b97, (q15_t)0x6b94, (q15_t)0x6b90, (q15_t)0x6b8d, (q15_t)0x6b8a, (q15_t)0x6b86, (q15_t)0x6b83,
+  (q15_t)0x6b7f, (q15_t)0x6b7c, (q15_t)0x6b79, (q15_t)0x6b75, (q15_t)0x6b72, (q15_t)0x6b6e, (q15_t)0x6b6b, (q15_t)0x6b68,
+  (q15_t)0x6b64, (q15_t)0x6b61, (q15_t)0x6b5d, (q15_t)0x6b5a, (q15_t)0x6b56, (q15_t)0x6b53, (q15_t)0x6b50, (q15_t)0x6b4c,
+  (q15_t)0x6b49, (q15_t)0x6b45, (q15_t)0x6b42, (q15_t)0x6b3e, (q15_t)0x6b3b, (q15_t)0x6b38, (q15_t)0x6b34, (q15_t)0x6b31,
+  (q15_t)0x6b2d, (q15_t)0x6b2a, (q15_t)0x6b26, (q15_t)0x6b23, (q15_t)0x6b20, (q15_t)0x6b1c, (q15_t)0x6b19, (q15_t)0x6b15,
+  (q15_t)0x6b12, (q15_t)0x6b0e, (q15_t)0x6b0b, (q15_t)0x6b07, (q15_t)0x6b04, (q15_t)0x6b01, (q15_t)0x6afd, (q15_t)0x6afa,
+  (q15_t)0x6af6, (q15_t)0x6af3, (q15_t)0x6aef, (q15_t)0x6aec, (q15_t)0x6ae8, (q15_t)0x6ae5, (q15_t)0x6ae1, (q15_t)0x6ade,
+  (q15_t)0x6adb, (q15_t)0x6ad7, (q15_t)0x6ad4, (q15_t)0x6ad0, (q15_t)0x6acd, (q15_t)0x6ac9, (q15_t)0x6ac6, (q15_t)0x6ac2,
+  (q15_t)0x6abf, (q15_t)0x6abb, (q15_t)0x6ab8, (q15_t)0x6ab4, (q15_t)0x6ab1, (q15_t)0x6aae, (q15_t)0x6aaa, (q15_t)0x6aa7,
+  (q15_t)0x6aa3, (q15_t)0x6aa0, (q15_t)0x6a9c, (q15_t)0x6a99, (q15_t)0x6a95, (q15_t)0x6a92, (q15_t)0x6a8e, (q15_t)0x6a8b,
+  (q15_t)0x6a87, (q15_t)0x6a84, (q15_t)0x6a80, (q15_t)0x6a7d, (q15_t)0x6a79, (q15_t)0x6a76, (q15_t)0x6a72, (q15_t)0x6a6f,
+  (q15_t)0x6a6b, (q15_t)0x6a68, (q15_t)0x6a64, (q15_t)0x6a61, (q15_t)0x6a5d, (q15_t)0x6a5a, (q15_t)0x6a56, (q15_t)0x6a53,
+  (q15_t)0x6a4f, (q15_t)0x6a4c, (q15_t)0x6a48, (q15_t)0x6a45, (q15_t)0x6a41, (q15_t)0x6a3e, (q15_t)0x6a3a, (q15_t)0x6a37,
+  (q15_t)0x6a33, (q15_t)0x6a30, (q15_t)0x6a2c, (q15_t)0x6a29, (q15_t)0x6a25, (q15_t)0x6a22, (q15_t)0x6a1e, (q15_t)0x6a1b,
+  (q15_t)0x6a17, (q15_t)0x6a14, (q15_t)0x6a10, (q15_t)0x6a0d, (q15_t)0x6a09, (q15_t)0x6a06, (q15_t)0x6a02, (q15_t)0x69ff,
+  (q15_t)0x69fb, (q15_t)0x69f8, (q15_t)0x69f4, (q15_t)0x69f1, (q15_t)0x69ed, (q15_t)0x69e9, (q15_t)0x69e6, (q15_t)0x69e2,
+  (q15_t)0x69df, (q15_t)0x69db, (q15_t)0x69d8, (q15_t)0x69d4, (q15_t)0x69d1, (q15_t)0x69cd, (q15_t)0x69ca, (q15_t)0x69c6,
+  (q15_t)0x69c3, (q15_t)0x69bf, (q15_t)0x69bc, (q15_t)0x69b8, (q15_t)0x69b4, (q15_t)0x69b1, (q15_t)0x69ad, (q15_t)0x69aa,
+  (q15_t)0x69a6, (q15_t)0x69a3, (q15_t)0x699f, (q15_t)0x699c, (q15_t)0x6998, (q15_t)0x6995, (q15_t)0x6991, (q15_t)0x698d,
+  (q15_t)0x698a, (q15_t)0x6986, (q15_t)0x6983, (q15_t)0x697f, (q15_t)0x697c, (q15_t)0x6978, (q15_t)0x6975, (q15_t)0x6971,
+  (q15_t)0x696d, (q15_t)0x696a, (q15_t)0x6966, (q15_t)0x6963, (q15_t)0x695f, (q15_t)0x695c, (q15_t)0x6958, (q15_t)0x6954,
+  (q15_t)0x6951, (q15_t)0x694d, (q15_t)0x694a, (q15_t)0x6946, (q15_t)0x6943, (q15_t)0x693f, (q15_t)0x693b, (q15_t)0x6938,
+  (q15_t)0x6934, (q15_t)0x6931, (q15_t)0x692d, (q15_t)0x692a, (q15_t)0x6926, (q15_t)0x6922, (q15_t)0x691f, (q15_t)0x691b,
+  (q15_t)0x6918, (q15_t)0x6914, (q15_t)0x6910, (q15_t)0x690d, (q15_t)0x6909, (q15_t)0x6906, (q15_t)0x6902, (q15_t)0x68fe,
+  (q15_t)0x68fb, (q15_t)0x68f7, (q15_t)0x68f4, (q15_t)0x68f0, (q15_t)0x68ec, (q15_t)0x68e9, (q15_t)0x68e5, (q15_t)0x68e2,
+  (q15_t)0x68de, (q15_t)0x68da, (q15_t)0x68d7, (q15_t)0x68d3, (q15_t)0x68d0, (q15_t)0x68cc, (q15_t)0x68c8, (q15_t)0x68c5,
+  (q15_t)0x68c1, (q15_t)0x68be, (q15_t)0x68ba, (q15_t)0x68b6, (q15_t)0x68b3, (q15_t)0x68af, (q15_t)0x68ac, (q15_t)0x68a8,
+  (q15_t)0x68a4, (q15_t)0x68a1, (q15_t)0x689d, (q15_t)0x6899, (q15_t)0x6896, (q15_t)0x6892, (q15_t)0x688f, (q15_t)0x688b,
+  (q15_t)0x6887, (q15_t)0x6884, (q15_t)0x6880, (q15_t)0x687c, (q15_t)0x6879, (q15_t)0x6875, (q15_t)0x6872, (q15_t)0x686e,
+  (q15_t)0x686a, (q15_t)0x6867, (q15_t)0x6863, (q15_t)0x685f, (q15_t)0x685c, (q15_t)0x6858, (q15_t)0x6854, (q15_t)0x6851,
+  (q15_t)0x684d, (q15_t)0x684a, (q15_t)0x6846, (q15_t)0x6842, (q15_t)0x683f, (q15_t)0x683b, (q15_t)0x6837, (q15_t)0x6834,
+  (q15_t)0x6830, (q15_t)0x682c, (q15_t)0x6829, (q15_t)0x6825, (q15_t)0x6821, (q15_t)0x681e, (q15_t)0x681a, (q15_t)0x6816,
+  (q15_t)0x6813, (q15_t)0x680f, (q15_t)0x680b, (q15_t)0x6808, (q15_t)0x6804, (q15_t)0x6800, (q15_t)0x67fd, (q15_t)0x67f9,
+  (q15_t)0x67f5, (q15_t)0x67f2, (q15_t)0x67ee, (q15_t)0x67ea, (q15_t)0x67e7, (q15_t)0x67e3, (q15_t)0x67df, (q15_t)0x67dc,
+  (q15_t)0x67d8, (q15_t)0x67d4, (q15_t)0x67d1, (q15_t)0x67cd, (q15_t)0x67c9, (q15_t)0x67c6, (q15_t)0x67c2, (q15_t)0x67be,
+  (q15_t)0x67bb, (q15_t)0x67b7, (q15_t)0x67b3, (q15_t)0x67b0, (q15_t)0x67ac, (q15_t)0x67a8, (q15_t)0x67a5, (q15_t)0x67a1,
+  (q15_t)0x679d, (q15_t)0x679a, (q15_t)0x6796, (q15_t)0x6792, (q15_t)0x678e, (q15_t)0x678b, (q15_t)0x6787, (q15_t)0x6783,
+  (q15_t)0x6780, (q15_t)0x677c, (q15_t)0x6778, (q15_t)0x6775, (q15_t)0x6771, (q15_t)0x676d, (q15_t)0x6769, (q15_t)0x6766,
+  (q15_t)0x6762, (q15_t)0x675e, (q15_t)0x675b, (q15_t)0x6757, (q15_t)0x6753, (q15_t)0x6750, (q15_t)0x674c, (q15_t)0x6748,
+  (q15_t)0x6744, (q15_t)0x6741, (q15_t)0x673d, (q15_t)0x6739, (q15_t)0x6736, (q15_t)0x6732, (q15_t)0x672e, (q15_t)0x672a,
+  (q15_t)0x6727, (q15_t)0x6723, (q15_t)0x671f, (q15_t)0x671c, (q15_t)0x6718, (q15_t)0x6714, (q15_t)0x6710, (q15_t)0x670d,
+  (q15_t)0x6709, (q15_t)0x6705, (q15_t)0x6701, (q15_t)0x66fe, (q15_t)0x66fa, (q15_t)0x66f6, (q15_t)0x66f3, (q15_t)0x66ef,
+  (q15_t)0x66eb, (q15_t)0x66e7, (q15_t)0x66e4, (q15_t)0x66e0, (q15_t)0x66dc, (q15_t)0x66d8, (q15_t)0x66d5, (q15_t)0x66d1,
+  (q15_t)0x66cd, (q15_t)0x66c9, (q15_t)0x66c6, (q15_t)0x66c2, (q15_t)0x66be, (q15_t)0x66ba, (q15_t)0x66b7, (q15_t)0x66b3,
+  (q15_t)0x66af, (q15_t)0x66ab, (q15_t)0x66a8, (q15_t)0x66a4, (q15_t)0x66a0, (q15_t)0x669c, (q15_t)0x6699, (q15_t)0x6695,
+  (q15_t)0x6691, (q15_t)0x668d, (q15_t)0x668a, (q15_t)0x6686, (q15_t)0x6682, (q15_t)0x667e, (q15_t)0x667b, (q15_t)0x6677,
+  (q15_t)0x6673, (q15_t)0x666f, (q15_t)0x666b, (q15_t)0x6668, (q15_t)0x6664, (q15_t)0x6660, (q15_t)0x665c, (q15_t)0x6659,
+  (q15_t)0x6655, (q15_t)0x6651, (q15_t)0x664d, (q15_t)0x664a, (q15_t)0x6646, (q15_t)0x6642, (q15_t)0x663e, (q15_t)0x663a,
+  (q15_t)0x6637, (q15_t)0x6633, (q15_t)0x662f, (q15_t)0x662b, (q15_t)0x6627, (q15_t)0x6624, (q15_t)0x6620, (q15_t)0x661c,
+  (q15_t)0x6618, (q15_t)0x6615, (q15_t)0x6611, (q15_t)0x660d, (q15_t)0x6609, (q15_t)0x6605, (q15_t)0x6602, (q15_t)0x65fe,
+  (q15_t)0x65fa, (q15_t)0x65f6, (q15_t)0x65f2, (q15_t)0x65ef, (q15_t)0x65eb, (q15_t)0x65e7, (q15_t)0x65e3, (q15_t)0x65df,
+  (q15_t)0x65dc, (q15_t)0x65d8, (q15_t)0x65d4, (q15_t)0x65d0, (q15_t)0x65cc, (q15_t)0x65c9, (q15_t)0x65c5, (q15_t)0x65c1,
+  (q15_t)0x65bd, (q15_t)0x65b9, (q15_t)0x65b5, (q15_t)0x65b2, (q15_t)0x65ae, (q15_t)0x65aa, (q15_t)0x65a6, (q15_t)0x65a2,
+  (q15_t)0x659f, (q15_t)0x659b, (q15_t)0x6597, (q15_t)0x6593, (q15_t)0x658f, (q15_t)0x658b, (q15_t)0x6588, (q15_t)0x6584,
+  (q15_t)0x6580, (q15_t)0x657c, (q15_t)0x6578, (q15_t)0x6574, (q15_t)0x6571, (q15_t)0x656d, (q15_t)0x6569, (q15_t)0x6565,
+  (q15_t)0x6561, (q15_t)0x655d, (q15_t)0x655a, (q15_t)0x6556, (q15_t)0x6552, (q15_t)0x654e, (q15_t)0x654a, (q15_t)0x6546,
+  (q15_t)0x6543, (q15_t)0x653f, (q15_t)0x653b, (q15_t)0x6537, (q15_t)0x6533, (q15_t)0x652f, (q15_t)0x652c, (q15_t)0x6528,
+  (q15_t)0x6524, (q15_t)0x6520, (q15_t)0x651c, (q15_t)0x6518, (q15_t)0x6514, (q15_t)0x6511, (q15_t)0x650d, (q15_t)0x6509,
+  (q15_t)0x6505, (q15_t)0x6501, (q15_t)0x64fd, (q15_t)0x64f9, (q15_t)0x64f6, (q15_t)0x64f2, (q15_t)0x64ee, (q15_t)0x64ea,
+  (q15_t)0x64e6, (q15_t)0x64e2, (q15_t)0x64de, (q15_t)0x64db, (q15_t)0x64d7, (q15_t)0x64d3, (q15_t)0x64cf, (q15_t)0x64cb,
+  (q15_t)0x64c7, (q15_t)0x64c3, (q15_t)0x64bf, (q15_t)0x64bc, (q15_t)0x64b8, (q15_t)0x64b4, (q15_t)0x64b0, (q15_t)0x64ac,
+  (q15_t)0x64a8, (q15_t)0x64a4, (q15_t)0x64a0, (q15_t)0x649c, (q15_t)0x6499, (q15_t)0x6495, (q15_t)0x6491, (q15_t)0x648d,
+  (q15_t)0x6489, (q15_t)0x6485, (q15_t)0x6481, (q15_t)0x647d, (q15_t)0x6479, (q15_t)0x6476, (q15_t)0x6472, (q15_t)0x646e,
+  (q15_t)0x646a, (q15_t)0x6466, (q15_t)0x6462, (q15_t)0x645e, (q15_t)0x645a, (q15_t)0x6456, (q15_t)0x6453, (q15_t)0x644f,
+  (q15_t)0x644b, (q15_t)0x6447, (q15_t)0x6443, (q15_t)0x643f, (q15_t)0x643b, (q15_t)0x6437, (q15_t)0x6433, (q15_t)0x642f,
+  (q15_t)0x642b, (q15_t)0x6428, (q15_t)0x6424, (q15_t)0x6420, (q15_t)0x641c, (q15_t)0x6418, (q15_t)0x6414, (q15_t)0x6410,
+  (q15_t)0x640c, (q15_t)0x6408, (q15_t)0x6404, (q15_t)0x6400, (q15_t)0x63fc, (q15_t)0x63f9, (q15_t)0x63f5, (q15_t)0x63f1,
+  (q15_t)0x63ed, (q15_t)0x63e9, (q15_t)0x63e5, (q15_t)0x63e1, (q15_t)0x63dd, (q15_t)0x63d9, (q15_t)0x63d5, (q15_t)0x63d1,
+  (q15_t)0x63cd, (q15_t)0x63c9, (q15_t)0x63c5, (q15_t)0x63c1, (q15_t)0x63be, (q15_t)0x63ba, (q15_t)0x63b6, (q15_t)0x63b2,
+  (q15_t)0x63ae, (q15_t)0x63aa, (q15_t)0x63a6, (q15_t)0x63a2, (q15_t)0x639e, (q15_t)0x639a, (q15_t)0x6396, (q15_t)0x6392,
+  (q15_t)0x638e, (q15_t)0x638a, (q15_t)0x6386, (q15_t)0x6382, (q15_t)0x637e, (q15_t)0x637a, (q15_t)0x6377, (q15_t)0x6373,
+  (q15_t)0x636f, (q15_t)0x636b, (q15_t)0x6367, (q15_t)0x6363, (q15_t)0x635f, (q15_t)0x635b, (q15_t)0x6357, (q15_t)0x6353,
+  (q15_t)0x634f, (q15_t)0x634b, (q15_t)0x6347, (q15_t)0x6343, (q15_t)0x633f, (q15_t)0x633b, (q15_t)0x6337, (q15_t)0x6333,
+  (q15_t)0x632f, (q15_t)0x632b, (q15_t)0x6327, (q15_t)0x6323, (q15_t)0x631f, (q15_t)0x631b, (q15_t)0x6317, (q15_t)0x6313,
+  (q15_t)0x630f, (q15_t)0x630b, (q15_t)0x6307, (q15_t)0x6303, (q15_t)0x62ff, (q15_t)0x62fb, (q15_t)0x62f7, (q15_t)0x62f3,
+  (q15_t)0x62f0, (q15_t)0x62ec, (q15_t)0x62e8, (q15_t)0x62e4, (q15_t)0x62e0, (q15_t)0x62dc, (q15_t)0x62d8, (q15_t)0x62d4,
+  (q15_t)0x62d0, (q15_t)0x62cc, (q15_t)0x62c8, (q15_t)0x62c4, (q15_t)0x62c0, (q15_t)0x62bc, (q15_t)0x62b8, (q15_t)0x62b4,
+  (q15_t)0x62b0, (q15_t)0x62ac, (q15_t)0x62a8, (q15_t)0x62a4, (q15_t)0x62a0, (q15_t)0x629c, (q15_t)0x6298, (q15_t)0x6294,
+  (q15_t)0x6290, (q15_t)0x628c, (q15_t)0x6288, (q15_t)0x6284, (q15_t)0x6280, (q15_t)0x627c, (q15_t)0x6278, (q15_t)0x6273,
+  (q15_t)0x626f, (q15_t)0x626b, (q15_t)0x6267, (q15_t)0x6263, (q15_t)0x625f, (q15_t)0x625b, (q15_t)0x6257, (q15_t)0x6253,
+  (q15_t)0x624f, (q15_t)0x624b, (q15_t)0x6247, (q15_t)0x6243, (q15_t)0x623f, (q15_t)0x623b, (q15_t)0x6237, (q15_t)0x6233,
+  (q15_t)0x622f, (q15_t)0x622b, (q15_t)0x6227, (q15_t)0x6223, (q15_t)0x621f, (q15_t)0x621b, (q15_t)0x6217, (q15_t)0x6213,
+  (q15_t)0x620f, (q15_t)0x620b, (q15_t)0x6207, (q15_t)0x6203, (q15_t)0x61ff, (q15_t)0x61fb, (q15_t)0x61f7, (q15_t)0x61f3,
+  (q15_t)0x61ee, (q15_t)0x61ea, (q15_t)0x61e6, (q15_t)0x61e2, (q15_t)0x61de, (q15_t)0x61da, (q15_t)0x61d6, (q15_t)0x61d2,
+  (q15_t)0x61ce, (q15_t)0x61ca, (q15_t)0x61c6, (q15_t)0x61c2, (q15_t)0x61be, (q15_t)0x61ba, (q15_t)0x61b6, (q15_t)0x61b2,
+  (q15_t)0x61ae, (q15_t)0x61aa, (q15_t)0x61a6, (q15_t)0x61a1, (q15_t)0x619d, (q15_t)0x6199, (q15_t)0x6195, (q15_t)0x6191,
+  (q15_t)0x618d, (q15_t)0x6189, (q15_t)0x6185, (q15_t)0x6181, (q15_t)0x617d, (q15_t)0x6179, (q15_t)0x6175, (q15_t)0x6171,
+  (q15_t)0x616d, (q15_t)0x6168, (q15_t)0x6164, (q15_t)0x6160, (q15_t)0x615c, (q15_t)0x6158, (q15_t)0x6154, (q15_t)0x6150,
+  (q15_t)0x614c, (q15_t)0x6148, (q15_t)0x6144, (q15_t)0x6140, (q15_t)0x613c, (q15_t)0x6137, (q15_t)0x6133, (q15_t)0x612f,
+  (q15_t)0x612b, (q15_t)0x6127, (q15_t)0x6123, (q15_t)0x611f, (q15_t)0x611b, (q15_t)0x6117, (q15_t)0x6113, (q15_t)0x610f,
+  (q15_t)0x610a, (q15_t)0x6106, (q15_t)0x6102, (q15_t)0x60fe, (q15_t)0x60fa, (q15_t)0x60f6, (q15_t)0x60f2, (q15_t)0x60ee,
+  (q15_t)0x60ea, (q15_t)0x60e6, (q15_t)0x60e1, (q15_t)0x60dd, (q15_t)0x60d9, (q15_t)0x60d5, (q15_t)0x60d1, (q15_t)0x60cd,
+  (q15_t)0x60c9, (q15_t)0x60c5, (q15_t)0x60c1, (q15_t)0x60bc, (q15_t)0x60b8, (q15_t)0x60b4, (q15_t)0x60b0, (q15_t)0x60ac,
+  (q15_t)0x60a8, (q15_t)0x60a4, (q15_t)0x60a0, (q15_t)0x609c, (q15_t)0x6097, (q15_t)0x6093, (q15_t)0x608f, (q15_t)0x608b,
+  (q15_t)0x6087, (q15_t)0x6083, (q15_t)0x607f, (q15_t)0x607b, (q15_t)0x6076, (q15_t)0x6072, (q15_t)0x606e, (q15_t)0x606a,
+  (q15_t)0x6066, (q15_t)0x6062, (q15_t)0x605e, (q15_t)0x6059, (q15_t)0x6055, (q15_t)0x6051, (q15_t)0x604d, (q15_t)0x6049,
+  (q15_t)0x6045, (q15_t)0x6041, (q15_t)0x603c, (q15_t)0x6038, (q15_t)0x6034, (q15_t)0x6030, (q15_t)0x602c, (q15_t)0x6028,
+  (q15_t)0x6024, (q15_t)0x601f, (q15_t)0x601b, (q15_t)0x6017, (q15_t)0x6013, (q15_t)0x600f, (q15_t)0x600b, (q15_t)0x6007,
+  (q15_t)0x6002, (q15_t)0x5ffe, (q15_t)0x5ffa, (q15_t)0x5ff6, (q15_t)0x5ff2, (q15_t)0x5fee, (q15_t)0x5fe9, (q15_t)0x5fe5,
+  (q15_t)0x5fe1, (q15_t)0x5fdd, (q15_t)0x5fd9, (q15_t)0x5fd5, (q15_t)0x5fd0, (q15_t)0x5fcc, (q15_t)0x5fc8, (q15_t)0x5fc4,
+  (q15_t)0x5fc0, (q15_t)0x5fbc, (q15_t)0x5fb7, (q15_t)0x5fb3, (q15_t)0x5faf, (q15_t)0x5fab, (q15_t)0x5fa7, (q15_t)0x5fa3,
+  (q15_t)0x5f9e, (q15_t)0x5f9a, (q15_t)0x5f96, (q15_t)0x5f92, (q15_t)0x5f8e, (q15_t)0x5f8a, (q15_t)0x5f85, (q15_t)0x5f81,
+  (q15_t)0x5f7d, (q15_t)0x5f79, (q15_t)0x5f75, (q15_t)0x5f70, (q15_t)0x5f6c, (q15_t)0x5f68, (q15_t)0x5f64, (q15_t)0x5f60,
+  (q15_t)0x5f5b, (q15_t)0x5f57, (q15_t)0x5f53, (q15_t)0x5f4f, (q15_t)0x5f4b, (q15_t)0x5f46, (q15_t)0x5f42, (q15_t)0x5f3e,
+  (q15_t)0x5f3a, (q15_t)0x5f36, (q15_t)0x5f31, (q15_t)0x5f2d, (q15_t)0x5f29, (q15_t)0x5f25, (q15_t)0x5f21, (q15_t)0x5f1c,
+  (q15_t)0x5f18, (q15_t)0x5f14, (q15_t)0x5f10, (q15_t)0x5f0c, (q15_t)0x5f07, (q15_t)0x5f03, (q15_t)0x5eff, (q15_t)0x5efb,
+  (q15_t)0x5ef7, (q15_t)0x5ef2, (q15_t)0x5eee, (q15_t)0x5eea, (q15_t)0x5ee6, (q15_t)0x5ee2, (q15_t)0x5edd, (q15_t)0x5ed9,
+  (q15_t)0x5ed5, (q15_t)0x5ed1, (q15_t)0x5ecc, (q15_t)0x5ec8, (q15_t)0x5ec4, (q15_t)0x5ec0, (q15_t)0x5ebc, (q15_t)0x5eb7,
+  (q15_t)0x5eb3, (q15_t)0x5eaf, (q15_t)0x5eab, (q15_t)0x5ea6, (q15_t)0x5ea2, (q15_t)0x5e9e, (q15_t)0x5e9a, (q15_t)0x5e95,
+  (q15_t)0x5e91, (q15_t)0x5e8d, (q15_t)0x5e89, (q15_t)0x5e85, (q15_t)0x5e80, (q15_t)0x5e7c, (q15_t)0x5e78, (q15_t)0x5e74,
+  (q15_t)0x5e6f, (q15_t)0x5e6b, (q15_t)0x5e67, (q15_t)0x5e63, (q15_t)0x5e5e, (q15_t)0x5e5a, (q15_t)0x5e56, (q15_t)0x5e52,
+  (q15_t)0x5e4d, (q15_t)0x5e49, (q15_t)0x5e45, (q15_t)0x5e41, (q15_t)0x5e3c, (q15_t)0x5e38, (q15_t)0x5e34, (q15_t)0x5e30,
+  (q15_t)0x5e2b, (q15_t)0x5e27, (q15_t)0x5e23, (q15_t)0x5e1f, (q15_t)0x5e1a, (q15_t)0x5e16, (q15_t)0x5e12, (q15_t)0x5e0e,
+  (q15_t)0x5e09, (q15_t)0x5e05, (q15_t)0x5e01, (q15_t)0x5dfd, (q15_t)0x5df8, (q15_t)0x5df4, (q15_t)0x5df0, (q15_t)0x5deb,
+  (q15_t)0x5de7, (q15_t)0x5de3, (q15_t)0x5ddf, (q15_t)0x5dda, (q15_t)0x5dd6, (q15_t)0x5dd2, (q15_t)0x5dce, (q15_t)0x5dc9,
+  (q15_t)0x5dc5, (q15_t)0x5dc1, (q15_t)0x5dbc, (q15_t)0x5db8, (q15_t)0x5db4, (q15_t)0x5db0, (q15_t)0x5dab, (q15_t)0x5da7,
+  (q15_t)0x5da3, (q15_t)0x5d9e, (q15_t)0x5d9a, (q15_t)0x5d96, (q15_t)0x5d92, (q15_t)0x5d8d, (q15_t)0x5d89, (q15_t)0x5d85,
+  (q15_t)0x5d80, (q15_t)0x5d7c, (q15_t)0x5d78, (q15_t)0x5d74, (q15_t)0x5d6f, (q15_t)0x5d6b, (q15_t)0x5d67, (q15_t)0x5d62,
+  (q15_t)0x5d5e, (q15_t)0x5d5a, (q15_t)0x5d55, (q15_t)0x5d51, (q15_t)0x5d4d, (q15_t)0x5d49, (q15_t)0x5d44, (q15_t)0x5d40,
+  (q15_t)0x5d3c, (q15_t)0x5d37, (q15_t)0x5d33, (q15_t)0x5d2f, (q15_t)0x5d2a, (q15_t)0x5d26, (q15_t)0x5d22, (q15_t)0x5d1e,
+  (q15_t)0x5d19, (q15_t)0x5d15, (q15_t)0x5d11, (q15_t)0x5d0c, (q15_t)0x5d08, (q15_t)0x5d04, (q15_t)0x5cff, (q15_t)0x5cfb,
+  (q15_t)0x5cf7, (q15_t)0x5cf2, (q15_t)0x5cee, (q15_t)0x5cea, (q15_t)0x5ce5, (q15_t)0x5ce1, (q15_t)0x5cdd, (q15_t)0x5cd8,
+  (q15_t)0x5cd4, (q15_t)0x5cd0, (q15_t)0x5ccb, (q15_t)0x5cc7, (q15_t)0x5cc3, (q15_t)0x5cbe, (q15_t)0x5cba, (q15_t)0x5cb6,
+  (q15_t)0x5cb1, (q15_t)0x5cad, (q15_t)0x5ca9, (q15_t)0x5ca4, (q15_t)0x5ca0, (q15_t)0x5c9c, (q15_t)0x5c97, (q15_t)0x5c93,
+  (q15_t)0x5c8f, (q15_t)0x5c8a, (q15_t)0x5c86, (q15_t)0x5c82, (q15_t)0x5c7d, (q15_t)0x5c79, (q15_t)0x5c75, (q15_t)0x5c70,
+  (q15_t)0x5c6c, (q15_t)0x5c68, (q15_t)0x5c63, (q15_t)0x5c5f, (q15_t)0x5c5b, (q15_t)0x5c56, (q15_t)0x5c52, (q15_t)0x5c4e,
+  (q15_t)0x5c49, (q15_t)0x5c45, (q15_t)0x5c41, (q15_t)0x5c3c, (q15_t)0x5c38, (q15_t)0x5c33, (q15_t)0x5c2f, (q15_t)0x5c2b,
+  (q15_t)0x5c26, (q15_t)0x5c22, (q15_t)0x5c1e, (q15_t)0x5c19, (q15_t)0x5c15, (q15_t)0x5c11, (q15_t)0x5c0c, (q15_t)0x5c08,
+  (q15_t)0x5c03, (q15_t)0x5bff, (q15_t)0x5bfb, (q15_t)0x5bf6, (q15_t)0x5bf2, (q15_t)0x5bee, (q15_t)0x5be9, (q15_t)0x5be5,
+  (q15_t)0x5be0, (q15_t)0x5bdc, (q15_t)0x5bd8, (q15_t)0x5bd3, (q15_t)0x5bcf, (q15_t)0x5bcb, (q15_t)0x5bc6, (q15_t)0x5bc2,
+  (q15_t)0x5bbd, (q15_t)0x5bb9, (q15_t)0x5bb5, (q15_t)0x5bb0, (q15_t)0x5bac, (q15_t)0x5ba8, (q15_t)0x5ba3, (q15_t)0x5b9f,
+  (q15_t)0x5b9a, (q15_t)0x5b96, (q15_t)0x5b92, (q15_t)0x5b8d, (q15_t)0x5b89, (q15_t)0x5b84, (q15_t)0x5b80, (q15_t)0x5b7c,
+  (q15_t)0x5b77, (q15_t)0x5b73, (q15_t)0x5b6e, (q15_t)0x5b6a, (q15_t)0x5b66, (q15_t)0x5b61, (q15_t)0x5b5d, (q15_t)0x5b58,
+  (q15_t)0x5b54, (q15_t)0x5b50, (q15_t)0x5b4b, (q15_t)0x5b47, (q15_t)0x5b42, (q15_t)0x5b3e, (q15_t)0x5b3a, (q15_t)0x5b35,
+  (q15_t)0x5b31, (q15_t)0x5b2c, (q15_t)0x5b28, (q15_t)0x5b24, (q15_t)0x5b1f, (q15_t)0x5b1b, (q15_t)0x5b16, (q15_t)0x5b12,
+  (q15_t)0x5b0e, (q15_t)0x5b09, (q15_t)0x5b05, (q15_t)0x5b00, (q15_t)0x5afc, (q15_t)0x5af7, (q15_t)0x5af3, (q15_t)0x5aef,
+  (q15_t)0x5aea, (q15_t)0x5ae6, (q15_t)0x5ae1, (q15_t)0x5add, (q15_t)0x5ad8, (q15_t)0x5ad4, (q15_t)0x5ad0, (q15_t)0x5acb,
+  (q15_t)0x5ac7, (q15_t)0x5ac2, (q15_t)0x5abe, (q15_t)0x5ab9, (q15_t)0x5ab5, (q15_t)0x5ab1, (q15_t)0x5aac, (q15_t)0x5aa8,
+  (q15_t)0x5aa3, (q15_t)0x5a9f, (q15_t)0x5a9a, (q15_t)0x5a96, (q15_t)0x5a92, (q15_t)0x5a8d, (q15_t)0x5a89, (q15_t)0x5a84,
+  (q15_t)0x5a80, (q15_t)0x5a7b, (q15_t)0x5a77, (q15_t)0x5a72, (q15_t)0x5a6e, (q15_t)0x5a6a, (q15_t)0x5a65, (q15_t)0x5a61,
+  (q15_t)0x5a5c, (q15_t)0x5a58, (q15_t)0x5a53, (q15_t)0x5a4f, (q15_t)0x5a4a, (q15_t)0x5a46, (q15_t)0x5a41, (q15_t)0x5a3d,
+  (q15_t)0x5a39, (q15_t)0x5a34, (q15_t)0x5a30, (q15_t)0x5a2b, (q15_t)0x5a27, (q15_t)0x5a22, (q15_t)0x5a1e, (q15_t)0x5a19,
+  (q15_t)0x5a15, (q15_t)0x5a10, (q15_t)0x5a0c, (q15_t)0x5a07, (q15_t)0x5a03, (q15_t)0x59ff, (q15_t)0x59fa, (q15_t)0x59f6,
+  (q15_t)0x59f1, (q15_t)0x59ed, (q15_t)0x59e8, (q15_t)0x59e4, (q15_t)0x59df, (q15_t)0x59db, (q15_t)0x59d6, (q15_t)0x59d2,
+  (q15_t)0x59cd, (q15_t)0x59c9, (q15_t)0x59c4, (q15_t)0x59c0, (q15_t)0x59bb, (q15_t)0x59b7, (q15_t)0x59b2, (q15_t)0x59ae,
+  (q15_t)0x59a9, (q15_t)0x59a5, (q15_t)0x59a1, (q15_t)0x599c, (q15_t)0x5998, (q15_t)0x5993, (q15_t)0x598f, (q15_t)0x598a,
+  (q15_t)0x5986, (q15_t)0x5981, (q15_t)0x597d, (q15_t)0x5978, (q15_t)0x5974, (q15_t)0x596f, (q15_t)0x596b, (q15_t)0x5966,
+  (q15_t)0x5962, (q15_t)0x595d, (q15_t)0x5959, (q15_t)0x5954, (q15_t)0x5950, (q15_t)0x594b, (q15_t)0x5947, (q15_t)0x5942,
+  (q15_t)0x593e, (q15_t)0x5939, (q15_t)0x5935, (q15_t)0x5930, (q15_t)0x592c, (q15_t)0x5927, (q15_t)0x5923, (q15_t)0x591e,
+  (q15_t)0x591a, (q15_t)0x5915, (q15_t)0x5911, (q15_t)0x590c, (q15_t)0x5908, (q15_t)0x5903, (q15_t)0x58fe, (q15_t)0x58fa,
+  (q15_t)0x58f5, (q15_t)0x58f1, (q15_t)0x58ec, (q15_t)0x58e8, (q15_t)0x58e3, (q15_t)0x58df, (q15_t)0x58da, (q15_t)0x58d6,
+  (q15_t)0x58d1, (q15_t)0x58cd, (q15_t)0x58c8, (q15_t)0x58c4, (q15_t)0x58bf, (q15_t)0x58bb, (q15_t)0x58b6, (q15_t)0x58b2,
+  (q15_t)0x58ad, (q15_t)0x58a9, (q15_t)0x58a4, (q15_t)0x589f, (q15_t)0x589b, (q15_t)0x5896, (q15_t)0x5892, (q15_t)0x588d,
+  (q15_t)0x5889, (q15_t)0x5884, (q15_t)0x5880, (q15_t)0x587b, (q15_t)0x5877, (q15_t)0x5872, (q15_t)0x586e, (q15_t)0x5869,
+  (q15_t)0x5864, (q15_t)0x5860, (q15_t)0x585b, (q15_t)0x5857, (q15_t)0x5852, (q15_t)0x584e, (q15_t)0x5849, (q15_t)0x5845,
+  (q15_t)0x5840, (q15_t)0x583c, (q15_t)0x5837, (q15_t)0x5832, (q15_t)0x582e, (q15_t)0x5829, (q15_t)0x5825, (q15_t)0x5820,
+  (q15_t)0x581c, (q15_t)0x5817, (q15_t)0x5813, (q15_t)0x580e, (q15_t)0x5809, (q15_t)0x5805, (q15_t)0x5800, (q15_t)0x57fc,
+  (q15_t)0x57f7, (q15_t)0x57f3, (q15_t)0x57ee, (q15_t)0x57e9, (q15_t)0x57e5, (q15_t)0x57e0, (q15_t)0x57dc, (q15_t)0x57d7,
+  (q15_t)0x57d3, (q15_t)0x57ce, (q15_t)0x57c9, (q15_t)0x57c5, (q15_t)0x57c0, (q15_t)0x57bc, (q15_t)0x57b7, (q15_t)0x57b3,
+  (q15_t)0x57ae, (q15_t)0x57a9, (q15_t)0x57a5, (q15_t)0x57a0, (q15_t)0x579c, (q15_t)0x5797, (q15_t)0x5793, (q15_t)0x578e,
+  (q15_t)0x5789, (q15_t)0x5785, (q15_t)0x5780, (q15_t)0x577c, (q15_t)0x5777, (q15_t)0x5772, (q15_t)0x576e, (q15_t)0x5769,
+  (q15_t)0x5765, (q15_t)0x5760, (q15_t)0x575c, (q15_t)0x5757, (q15_t)0x5752, (q15_t)0x574e, (q15_t)0x5749, (q15_t)0x5745,
+  (q15_t)0x5740, (q15_t)0x573b, (q15_t)0x5737, (q15_t)0x5732, (q15_t)0x572e, (q15_t)0x5729, (q15_t)0x5724, (q15_t)0x5720,
+  (q15_t)0x571b, (q15_t)0x5717, (q15_t)0x5712, (q15_t)0x570d, (q15_t)0x5709, (q15_t)0x5704, (q15_t)0x56ff, (q15_t)0x56fb,
+  (q15_t)0x56f6, (q15_t)0x56f2, (q15_t)0x56ed, (q15_t)0x56e8, (q15_t)0x56e4, (q15_t)0x56df, (q15_t)0x56db, (q15_t)0x56d6,
+  (q15_t)0x56d1, (q15_t)0x56cd, (q15_t)0x56c8, (q15_t)0x56c4, (q15_t)0x56bf, (q15_t)0x56ba, (q15_t)0x56b6, (q15_t)0x56b1,
+  (q15_t)0x56ac, (q15_t)0x56a8, (q15_t)0x56a3, (q15_t)0x569f, (q15_t)0x569a, (q15_t)0x5695, (q15_t)0x5691, (q15_t)0x568c,
+  (q15_t)0x5687, (q15_t)0x5683, (q15_t)0x567e, (q15_t)0x5679, (q15_t)0x5675, (q15_t)0x5670, (q15_t)0x566c, (q15_t)0x5667,
+  (q15_t)0x5662, (q15_t)0x565e, (q15_t)0x5659, (q15_t)0x5654, (q15_t)0x5650, (q15_t)0x564b, (q15_t)0x5646, (q15_t)0x5642,
+  (q15_t)0x563d, (q15_t)0x5639, (q15_t)0x5634, (q15_t)0x562f, (q15_t)0x562b, (q15_t)0x5626, (q15_t)0x5621, (q15_t)0x561d,
+  (q15_t)0x5618, (q15_t)0x5613, (q15_t)0x560f, (q15_t)0x560a, (q15_t)0x5605, (q15_t)0x5601, (q15_t)0x55fc, (q15_t)0x55f7,
+  (q15_t)0x55f3, (q15_t)0x55ee, (q15_t)0x55ea, (q15_t)0x55e5, (q15_t)0x55e0, (q15_t)0x55dc, (q15_t)0x55d7, (q15_t)0x55d2,
+  (q15_t)0x55ce, (q15_t)0x55c9, (q15_t)0x55c4, (q15_t)0x55c0, (q15_t)0x55bb, (q15_t)0x55b6, (q15_t)0x55b2, (q15_t)0x55ad,
+  (q15_t)0x55a8, (q15_t)0x55a4, (q15_t)0x559f, (q15_t)0x559a, (q15_t)0x5596, (q15_t)0x5591, (q15_t)0x558c, (q15_t)0x5588,
+  (q15_t)0x5583, (q15_t)0x557e, (q15_t)0x5579, (q15_t)0x5575, (q15_t)0x5570, (q15_t)0x556b, (q15_t)0x5567, (q15_t)0x5562,
+  (q15_t)0x555d, (q15_t)0x5559, (q15_t)0x5554, (q15_t)0x554f, (q15_t)0x554b, (q15_t)0x5546, (q15_t)0x5541, (q15_t)0x553d,
+  (q15_t)0x5538, (q15_t)0x5533, (q15_t)0x552f, (q15_t)0x552a, (q15_t)0x5525, (q15_t)0x5520, (q15_t)0x551c, (q15_t)0x5517,
+  (q15_t)0x5512, (q15_t)0x550e, (q15_t)0x5509, (q15_t)0x5504, (q15_t)0x5500, (q15_t)0x54fb, (q15_t)0x54f6, (q15_t)0x54f2,
+  (q15_t)0x54ed, (q15_t)0x54e8, (q15_t)0x54e3, (q15_t)0x54df, (q15_t)0x54da, (q15_t)0x54d5, (q15_t)0x54d1, (q15_t)0x54cc,
+  (q15_t)0x54c7, (q15_t)0x54c2, (q15_t)0x54be, (q15_t)0x54b9, (q15_t)0x54b4, (q15_t)0x54b0, (q15_t)0x54ab, (q15_t)0x54a6,
+  (q15_t)0x54a2, (q15_t)0x549d, (q15_t)0x5498, (q15_t)0x5493, (q15_t)0x548f, (q15_t)0x548a, (q15_t)0x5485, (q15_t)0x5480,
+  (q15_t)0x547c, (q15_t)0x5477, (q15_t)0x5472, (q15_t)0x546e, (q15_t)0x5469, (q15_t)0x5464, (q15_t)0x545f, (q15_t)0x545b,
+  (q15_t)0x5456, (q15_t)0x5451, (q15_t)0x544d, (q15_t)0x5448, (q15_t)0x5443, (q15_t)0x543e, (q15_t)0x543a, (q15_t)0x5435,
+  (q15_t)0x5430, (q15_t)0x542b, (q15_t)0x5427, (q15_t)0x5422, (q15_t)0x541d, (q15_t)0x5418, (q15_t)0x5414, (q15_t)0x540f,
+  (q15_t)0x540a, (q15_t)0x5406, (q15_t)0x5401, (q15_t)0x53fc, (q15_t)0x53f7, (q15_t)0x53f3, (q15_t)0x53ee, (q15_t)0x53e9,
+  (q15_t)0x53e4, (q15_t)0x53e0, (q15_t)0x53db, (q15_t)0x53d6, (q15_t)0x53d1, (q15_t)0x53cd, (q15_t)0x53c8, (q15_t)0x53c3,
+  (q15_t)0x53be, (q15_t)0x53ba, (q15_t)0x53b5, (q15_t)0x53b0, (q15_t)0x53ab, (q15_t)0x53a7, (q15_t)0x53a2, (q15_t)0x539d,
+  (q15_t)0x5398, (q15_t)0x5394, (q15_t)0x538f, (q15_t)0x538a, (q15_t)0x5385, (q15_t)0x5380, (q15_t)0x537c, (q15_t)0x5377,
+  (q15_t)0x5372, (q15_t)0x536d, (q15_t)0x5369, (q15_t)0x5364, (q15_t)0x535f, (q15_t)0x535a, (q15_t)0x5356, (q15_t)0x5351,
+  (q15_t)0x534c, (q15_t)0x5347, (q15_t)0x5343, (q15_t)0x533e, (q15_t)0x5339, (q15_t)0x5334, (q15_t)0x532f, (q15_t)0x532b,
+  (q15_t)0x5326, (q15_t)0x5321, (q15_t)0x531c, (q15_t)0x5318, (q15_t)0x5313, (q15_t)0x530e, (q15_t)0x5309, (q15_t)0x5304,
+  (q15_t)0x5300, (q15_t)0x52fb, (q15_t)0x52f6, (q15_t)0x52f1, (q15_t)0x52ec, (q15_t)0x52e8, (q15_t)0x52e3, (q15_t)0x52de,
+  (q15_t)0x52d9, (q15_t)0x52d5, (q15_t)0x52d0, (q15_t)0x52cb, (q15_t)0x52c6, (q15_t)0x52c1, (q15_t)0x52bd, (q15_t)0x52b8,
+  (q15_t)0x52b3, (q15_t)0x52ae, (q15_t)0x52a9, (q15_t)0x52a5, (q15_t)0x52a0, (q15_t)0x529b, (q15_t)0x5296, (q15_t)0x5291,
+  (q15_t)0x528d, (q15_t)0x5288, (q15_t)0x5283, (q15_t)0x527e, (q15_t)0x5279, (q15_t)0x5275, (q15_t)0x5270, (q15_t)0x526b,
+  (q15_t)0x5266, (q15_t)0x5261, (q15_t)0x525d, (q15_t)0x5258, (q15_t)0x5253, (q15_t)0x524e, (q15_t)0x5249, (q15_t)0x5244,
+  (q15_t)0x5240, (q15_t)0x523b, (q15_t)0x5236, (q15_t)0x5231, (q15_t)0x522c, (q15_t)0x5228, (q15_t)0x5223, (q15_t)0x521e,
+  (q15_t)0x5219, (q15_t)0x5214, (q15_t)0x520f, (q15_t)0x520b, (q15_t)0x5206, (q15_t)0x5201, (q15_t)0x51fc, (q15_t)0x51f7,
+  (q15_t)0x51f3, (q15_t)0x51ee, (q15_t)0x51e9, (q15_t)0x51e4, (q15_t)0x51df, (q15_t)0x51da, (q15_t)0x51d6, (q15_t)0x51d1,
+  (q15_t)0x51cc, (q15_t)0x51c7, (q15_t)0x51c2, (q15_t)0x51bd, (q15_t)0x51b9, (q15_t)0x51b4, (q15_t)0x51af, (q15_t)0x51aa,
+  (q15_t)0x51a5, (q15_t)0x51a0, (q15_t)0x519c, (q15_t)0x5197, (q15_t)0x5192, (q15_t)0x518d, (q15_t)0x5188, (q15_t)0x5183,
+  (q15_t)0x517e, (q15_t)0x517a, (q15_t)0x5175, (q15_t)0x5170, (q15_t)0x516b, (q15_t)0x5166, (q15_t)0x5161, (q15_t)0x515d,
+  (q15_t)0x5158, (q15_t)0x5153, (q15_t)0x514e, (q15_t)0x5149, (q15_t)0x5144, (q15_t)0x513f, (q15_t)0x513b, (q15_t)0x5136,
+  (q15_t)0x5131, (q15_t)0x512c, (q15_t)0x5127, (q15_t)0x5122, (q15_t)0x511d, (q15_t)0x5119, (q15_t)0x5114, (q15_t)0x510f,
+  (q15_t)0x510a, (q15_t)0x5105, (q15_t)0x5100, (q15_t)0x50fb, (q15_t)0x50f7, (q15_t)0x50f2, (q15_t)0x50ed, (q15_t)0x50e8,
+  (q15_t)0x50e3, (q15_t)0x50de, (q15_t)0x50d9, (q15_t)0x50d4, (q15_t)0x50d0, (q15_t)0x50cb, (q15_t)0x50c6, (q15_t)0x50c1,
+  (q15_t)0x50bc, (q15_t)0x50b7, (q15_t)0x50b2, (q15_t)0x50ad, (q15_t)0x50a9, (q15_t)0x50a4, (q15_t)0x509f, (q15_t)0x509a,
+  (q15_t)0x5095, (q15_t)0x5090, (q15_t)0x508b, (q15_t)0x5086, (q15_t)0x5082, (q15_t)0x507d, (q15_t)0x5078, (q15_t)0x5073,
+  (q15_t)0x506e, (q15_t)0x5069, (q15_t)0x5064, (q15_t)0x505f, (q15_t)0x505a, (q15_t)0x5056, (q15_t)0x5051, (q15_t)0x504c,
+  (q15_t)0x5047, (q15_t)0x5042, (q15_t)0x503d, (q15_t)0x5038, (q15_t)0x5033, (q15_t)0x502e, (q15_t)0x5029, (q15_t)0x5025,
+  (q15_t)0x5020, (q15_t)0x501b, (q15_t)0x5016, (q15_t)0x5011, (q15_t)0x500c, (q15_t)0x5007, (q15_t)0x5002, (q15_t)0x4ffd,
+  (q15_t)0x4ff8, (q15_t)0x4ff4, (q15_t)0x4fef, (q15_t)0x4fea, (q15_t)0x4fe5, (q15_t)0x4fe0, (q15_t)0x4fdb, (q15_t)0x4fd6,
+  (q15_t)0x4fd1, (q15_t)0x4fcc, (q15_t)0x4fc7, (q15_t)0x4fc2, (q15_t)0x4fbe, (q15_t)0x4fb9, (q15_t)0x4fb4, (q15_t)0x4faf,
+  (q15_t)0x4faa, (q15_t)0x4fa5, (q15_t)0x4fa0, (q15_t)0x4f9b, (q15_t)0x4f96, (q15_t)0x4f91, (q15_t)0x4f8c, (q15_t)0x4f87,
+  (q15_t)0x4f82, (q15_t)0x4f7e, (q15_t)0x4f79, (q15_t)0x4f74, (q15_t)0x4f6f, (q15_t)0x4f6a, (q15_t)0x4f65, (q15_t)0x4f60,
+  (q15_t)0x4f5b, (q15_t)0x4f56, (q15_t)0x4f51, (q15_t)0x4f4c, (q15_t)0x4f47, (q15_t)0x4f42, (q15_t)0x4f3d, (q15_t)0x4f39,
+  (q15_t)0x4f34, (q15_t)0x4f2f, (q15_t)0x4f2a, (q15_t)0x4f25, (q15_t)0x4f20, (q15_t)0x4f1b, (q15_t)0x4f16, (q15_t)0x4f11,
+  (q15_t)0x4f0c, (q15_t)0x4f07, (q15_t)0x4f02, (q15_t)0x4efd, (q15_t)0x4ef8, (q15_t)0x4ef3, (q15_t)0x4eee, (q15_t)0x4ee9,
+  (q15_t)0x4ee5, (q15_t)0x4ee0, (q15_t)0x4edb, (q15_t)0x4ed6, (q15_t)0x4ed1, (q15_t)0x4ecc, (q15_t)0x4ec7, (q15_t)0x4ec2,
+  (q15_t)0x4ebd, (q15_t)0x4eb8, (q15_t)0x4eb3, (q15_t)0x4eae, (q15_t)0x4ea9, (q15_t)0x4ea4, (q15_t)0x4e9f, (q15_t)0x4e9a,
+  (q15_t)0x4e95, (q15_t)0x4e90, (q15_t)0x4e8b, (q15_t)0x4e86, (q15_t)0x4e81, (q15_t)0x4e7c, (q15_t)0x4e78, (q15_t)0x4e73,
+  (q15_t)0x4e6e, (q15_t)0x4e69, (q15_t)0x4e64, (q15_t)0x4e5f, (q15_t)0x4e5a, (q15_t)0x4e55, (q15_t)0x4e50, (q15_t)0x4e4b,
+  (q15_t)0x4e46, (q15_t)0x4e41, (q15_t)0x4e3c, (q15_t)0x4e37, (q15_t)0x4e32, (q15_t)0x4e2d, (q15_t)0x4e28, (q15_t)0x4e23,
+  (q15_t)0x4e1e, (q15_t)0x4e19, (q15_t)0x4e14, (q15_t)0x4e0f, (q15_t)0x4e0a, (q15_t)0x4e05, (q15_t)0x4e00, (q15_t)0x4dfb,
+  (q15_t)0x4df6, (q15_t)0x4df1, (q15_t)0x4dec, (q15_t)0x4de7, (q15_t)0x4de2, (q15_t)0x4ddd, (q15_t)0x4dd8, (q15_t)0x4dd3,
+  (q15_t)0x4dce, (q15_t)0x4dc9, (q15_t)0x4dc4, (q15_t)0x4dbf, (q15_t)0x4dba, (q15_t)0x4db5, (q15_t)0x4db0, (q15_t)0x4dab,
+  (q15_t)0x4da6, (q15_t)0x4da1, (q15_t)0x4d9c, (q15_t)0x4d97, (q15_t)0x4d92, (q15_t)0x4d8d, (q15_t)0x4d88, (q15_t)0x4d83,
+  (q15_t)0x4d7e, (q15_t)0x4d79, (q15_t)0x4d74, (q15_t)0x4d6f, (q15_t)0x4d6a, (q15_t)0x4d65, (q15_t)0x4d60, (q15_t)0x4d5b,
+  (q15_t)0x4d56, (q15_t)0x4d51, (q15_t)0x4d4c, (q15_t)0x4d47, (q15_t)0x4d42, (q15_t)0x4d3d, (q15_t)0x4d38, (q15_t)0x4d33,
+  (q15_t)0x4d2e, (q15_t)0x4d29, (q15_t)0x4d24, (q15_t)0x4d1f, (q15_t)0x4d1a, (q15_t)0x4d15, (q15_t)0x4d10, (q15_t)0x4d0b,
+  (q15_t)0x4d06, (q15_t)0x4d01, (q15_t)0x4cfc, (q15_t)0x4cf7, (q15_t)0x4cf2, (q15_t)0x4ced, (q15_t)0x4ce8, (q15_t)0x4ce3,
+  (q15_t)0x4cde, (q15_t)0x4cd9, (q15_t)0x4cd4, (q15_t)0x4ccf, (q15_t)0x4cca, (q15_t)0x4cc5, (q15_t)0x4cc0, (q15_t)0x4cbb,
+  (q15_t)0x4cb6, (q15_t)0x4cb1, (q15_t)0x4cac, (q15_t)0x4ca7, (q15_t)0x4ca2, (q15_t)0x4c9d, (q15_t)0x4c98, (q15_t)0x4c93,
+  (q15_t)0x4c8e, (q15_t)0x4c88, (q15_t)0x4c83, (q15_t)0x4c7e, (q15_t)0x4c79, (q15_t)0x4c74, (q15_t)0x4c6f, (q15_t)0x4c6a,
+  (q15_t)0x4c65, (q15_t)0x4c60, (q15_t)0x4c5b, (q15_t)0x4c56, (q15_t)0x4c51, (q15_t)0x4c4c, (q15_t)0x4c47, (q15_t)0x4c42,
+  (q15_t)0x4c3d, (q15_t)0x4c38, (q15_t)0x4c33, (q15_t)0x4c2e, (q15_t)0x4c29, (q15_t)0x4c24, (q15_t)0x4c1f, (q15_t)0x4c1a,
+  (q15_t)0x4c14, (q15_t)0x4c0f, (q15_t)0x4c0a, (q15_t)0x4c05, (q15_t)0x4c00, (q15_t)0x4bfb, (q15_t)0x4bf6, (q15_t)0x4bf1,
+  (q15_t)0x4bec, (q15_t)0x4be7, (q15_t)0x4be2, (q15_t)0x4bdd, (q15_t)0x4bd8, (q15_t)0x4bd3, (q15_t)0x4bce, (q15_t)0x4bc9,
+  (q15_t)0x4bc4, (q15_t)0x4bbe, (q15_t)0x4bb9, (q15_t)0x4bb4, (q15_t)0x4baf, (q15_t)0x4baa, (q15_t)0x4ba5, (q15_t)0x4ba0,
+  (q15_t)0x4b9b, (q15_t)0x4b96, (q15_t)0x4b91, (q15_t)0x4b8c, (q15_t)0x4b87, (q15_t)0x4b82, (q15_t)0x4b7d, (q15_t)0x4b77,
+  (q15_t)0x4b72, (q15_t)0x4b6d, (q15_t)0x4b68, (q15_t)0x4b63, (q15_t)0x4b5e, (q15_t)0x4b59, (q15_t)0x4b54, (q15_t)0x4b4f,
+  (q15_t)0x4b4a, (q15_t)0x4b45, (q15_t)0x4b40, (q15_t)0x4b3b, (q15_t)0x4b35, (q15_t)0x4b30, (q15_t)0x4b2b, (q15_t)0x4b26,
+  (q15_t)0x4b21, (q15_t)0x4b1c, (q15_t)0x4b17, (q15_t)0x4b12, (q15_t)0x4b0d, (q15_t)0x4b08, (q15_t)0x4b03, (q15_t)0x4afd,
+  (q15_t)0x4af8, (q15_t)0x4af3, (q15_t)0x4aee, (q15_t)0x4ae9, (q15_t)0x4ae4, (q15_t)0x4adf, (q15_t)0x4ada, (q15_t)0x4ad5,
+  (q15_t)0x4ad0, (q15_t)0x4acb, (q15_t)0x4ac5, (q15_t)0x4ac0, (q15_t)0x4abb, (q15_t)0x4ab6, (q15_t)0x4ab1, (q15_t)0x4aac,
+  (q15_t)0x4aa7, (q15_t)0x4aa2, (q15_t)0x4a9d, (q15_t)0x4a97, (q15_t)0x4a92, (q15_t)0x4a8d, (q15_t)0x4a88, (q15_t)0x4a83,
+  (q15_t)0x4a7e, (q15_t)0x4a79, (q15_t)0x4a74, (q15_t)0x4a6f, (q15_t)0x4a6a, (q15_t)0x4a64, (q15_t)0x4a5f, (q15_t)0x4a5a,
+  (q15_t)0x4a55, (q15_t)0x4a50, (q15_t)0x4a4b, (q15_t)0x4a46, (q15_t)0x4a41, (q15_t)0x4a3b, (q15_t)0x4a36, (q15_t)0x4a31,
+  (q15_t)0x4a2c, (q15_t)0x4a27, (q15_t)0x4a22, (q15_t)0x4a1d, (q15_t)0x4a18, (q15_t)0x4a12, (q15_t)0x4a0d, (q15_t)0x4a08,
+  (q15_t)0x4a03, (q15_t)0x49fe, (q15_t)0x49f9, (q15_t)0x49f4, (q15_t)0x49ef, (q15_t)0x49e9, (q15_t)0x49e4, (q15_t)0x49df,
+  (q15_t)0x49da, (q15_t)0x49d5, (q15_t)0x49d0, (q15_t)0x49cb, (q15_t)0x49c6, (q15_t)0x49c0, (q15_t)0x49bb, (q15_t)0x49b6,
+  (q15_t)0x49b1, (q15_t)0x49ac, (q15_t)0x49a7, (q15_t)0x49a2, (q15_t)0x499c, (q15_t)0x4997, (q15_t)0x4992, (q15_t)0x498d,
+  (q15_t)0x4988, (q15_t)0x4983, (q15_t)0x497e, (q15_t)0x4978, (q15_t)0x4973, (q15_t)0x496e, (q15_t)0x4969, (q15_t)0x4964,
+  (q15_t)0x495f, (q15_t)0x495a, (q15_t)0x4954, (q15_t)0x494f, (q15_t)0x494a, (q15_t)0x4945, (q15_t)0x4940, (q15_t)0x493b,
+  (q15_t)0x4936, (q15_t)0x4930, (q15_t)0x492b, (q15_t)0x4926, (q15_t)0x4921, (q15_t)0x491c, (q15_t)0x4917, (q15_t)0x4911,
+  (q15_t)0x490c, (q15_t)0x4907, (q15_t)0x4902, (q15_t)0x48fd, (q15_t)0x48f8, (q15_t)0x48f2, (q15_t)0x48ed, (q15_t)0x48e8,
+  (q15_t)0x48e3, (q15_t)0x48de, (q15_t)0x48d9, (q15_t)0x48d3, (q15_t)0x48ce, (q15_t)0x48c9, (q15_t)0x48c4, (q15_t)0x48bf,
+  (q15_t)0x48ba, (q15_t)0x48b4, (q15_t)0x48af, (q15_t)0x48aa, (q15_t)0x48a5, (q15_t)0x48a0, (q15_t)0x489b, (q15_t)0x4895,
+  (q15_t)0x4890, (q15_t)0x488b, (q15_t)0x4886, (q15_t)0x4881, (q15_t)0x487c, (q15_t)0x4876, (q15_t)0x4871, (q15_t)0x486c,
+  (q15_t)0x4867, (q15_t)0x4862, (q15_t)0x485c, (q15_t)0x4857, (q15_t)0x4852, (q15_t)0x484d, (q15_t)0x4848, (q15_t)0x4843,
+  (q15_t)0x483d, (q15_t)0x4838, (q15_t)0x4833, (q15_t)0x482e, (q15_t)0x4829, (q15_t)0x4823, (q15_t)0x481e, (q15_t)0x4819,
+  (q15_t)0x4814, (q15_t)0x480f, (q15_t)0x4809, (q15_t)0x4804, (q15_t)0x47ff, (q15_t)0x47fa, (q15_t)0x47f5, (q15_t)0x47ef,
+  (q15_t)0x47ea, (q15_t)0x47e5, (q15_t)0x47e0, (q15_t)0x47db, (q15_t)0x47d5, (q15_t)0x47d0, (q15_t)0x47cb, (q15_t)0x47c6,
+  (q15_t)0x47c1, (q15_t)0x47bb, (q15_t)0x47b6, (q15_t)0x47b1, (q15_t)0x47ac, (q15_t)0x47a7, (q15_t)0x47a1, (q15_t)0x479c,
+  (q15_t)0x4797, (q15_t)0x4792, (q15_t)0x478d, (q15_t)0x4787, (q15_t)0x4782, (q15_t)0x477d, (q15_t)0x4778, (q15_t)0x4773,
+  (q15_t)0x476d, (q15_t)0x4768, (q15_t)0x4763, (q15_t)0x475e, (q15_t)0x4758, (q15_t)0x4753, (q15_t)0x474e, (q15_t)0x4749,
+  (q15_t)0x4744, (q15_t)0x473e, (q15_t)0x4739, (q15_t)0x4734, (q15_t)0x472f, (q15_t)0x4729, (q15_t)0x4724, (q15_t)0x471f,
+  (q15_t)0x471a, (q15_t)0x4715, (q15_t)0x470f, (q15_t)0x470a, (q15_t)0x4705, (q15_t)0x4700, (q15_t)0x46fa, (q15_t)0x46f5,
+  (q15_t)0x46f0, (q15_t)0x46eb, (q15_t)0x46e6, (q15_t)0x46e0, (q15_t)0x46db, (q15_t)0x46d6, (q15_t)0x46d1, (q15_t)0x46cb,
+  (q15_t)0x46c6, (q15_t)0x46c1, (q15_t)0x46bc, (q15_t)0x46b6, (q15_t)0x46b1, (q15_t)0x46ac, (q15_t)0x46a7, (q15_t)0x46a1,
+  (q15_t)0x469c, (q15_t)0x4697, (q15_t)0x4692, (q15_t)0x468d, (q15_t)0x4687, (q15_t)0x4682, (q15_t)0x467d, (q15_t)0x4678,
+  (q15_t)0x4672, (q15_t)0x466d, (q15_t)0x4668, (q15_t)0x4663, (q15_t)0x465d, (q15_t)0x4658, (q15_t)0x4653, (q15_t)0x464e,
+  (q15_t)0x4648, (q15_t)0x4643, (q15_t)0x463e, (q15_t)0x4639, (q15_t)0x4633, (q15_t)0x462e, (q15_t)0x4629, (q15_t)0x4624,
+  (q15_t)0x461e, (q15_t)0x4619, (q15_t)0x4614, (q15_t)0x460e, (q15_t)0x4609, (q15_t)0x4604, (q15_t)0x45ff, (q15_t)0x45f9,
+  (q15_t)0x45f4, (q15_t)0x45ef, (q15_t)0x45ea, (q15_t)0x45e4, (q15_t)0x45df, (q15_t)0x45da, (q15_t)0x45d5, (q15_t)0x45cf,
+  (q15_t)0x45ca, (q15_t)0x45c5, (q15_t)0x45c0, (q15_t)0x45ba, (q15_t)0x45b5, (q15_t)0x45b0, (q15_t)0x45aa, (q15_t)0x45a5,
+  (q15_t)0x45a0, (q15_t)0x459b, (q15_t)0x4595, (q15_t)0x4590, (q15_t)0x458b, (q15_t)0x4586, (q15_t)0x4580, (q15_t)0x457b,
+  (q15_t)0x4576, (q15_t)0x4570, (q15_t)0x456b, (q15_t)0x4566, (q15_t)0x4561, (q15_t)0x455b, (q15_t)0x4556, (q15_t)0x4551,
+  (q15_t)0x454b, (q15_t)0x4546, (q15_t)0x4541, (q15_t)0x453c, (q15_t)0x4536, (q15_t)0x4531, (q15_t)0x452c, (q15_t)0x4526,
+  (q15_t)0x4521, (q15_t)0x451c, (q15_t)0x4517, (q15_t)0x4511, (q15_t)0x450c, (q15_t)0x4507, (q15_t)0x4501, (q15_t)0x44fc,
+  (q15_t)0x44f7, (q15_t)0x44f2, (q15_t)0x44ec, (q15_t)0x44e7, (q15_t)0x44e2, (q15_t)0x44dc, (q15_t)0x44d7, (q15_t)0x44d2,
+  (q15_t)0x44cd, (q15_t)0x44c7, (q15_t)0x44c2, (q15_t)0x44bd, (q15_t)0x44b7, (q15_t)0x44b2, (q15_t)0x44ad, (q15_t)0x44a7,
+  (q15_t)0x44a2, (q15_t)0x449d, (q15_t)0x4497, (q15_t)0x4492, (q15_t)0x448d, (q15_t)0x4488, (q15_t)0x4482, (q15_t)0x447d,
+  (q15_t)0x4478, (q15_t)0x4472, (q15_t)0x446d, (q15_t)0x4468, (q15_t)0x4462, (q15_t)0x445d, (q15_t)0x4458, (q15_t)0x4452,
+  (q15_t)0x444d, (q15_t)0x4448, (q15_t)0x4443, (q15_t)0x443d, (q15_t)0x4438, (q15_t)0x4433, (q15_t)0x442d, (q15_t)0x4428,
+  (q15_t)0x4423, (q15_t)0x441d, (q15_t)0x4418, (q15_t)0x4413, (q15_t)0x440d, (q15_t)0x4408, (q15_t)0x4403, (q15_t)0x43fd,
+  (q15_t)0x43f8, (q15_t)0x43f3, (q15_t)0x43ed, (q15_t)0x43e8, (q15_t)0x43e3, (q15_t)0x43dd, (q15_t)0x43d8, (q15_t)0x43d3,
+  (q15_t)0x43cd, (q15_t)0x43c8, (q15_t)0x43c3, (q15_t)0x43bd, (q15_t)0x43b8, (q15_t)0x43b3, (q15_t)0x43ad, (q15_t)0x43a8,
+  (q15_t)0x43a3, (q15_t)0x439d, (q15_t)0x4398, (q15_t)0x4393, (q15_t)0x438d, (q15_t)0x4388, (q15_t)0x4383, (q15_t)0x437d,
+  (q15_t)0x4378, (q15_t)0x4373, (q15_t)0x436d, (q15_t)0x4368, (q15_t)0x4363, (q15_t)0x435d, (q15_t)0x4358, (q15_t)0x4353,
+  (q15_t)0x434d, (q15_t)0x4348, (q15_t)0x4343, (q15_t)0x433d, (q15_t)0x4338, (q15_t)0x4333, (q15_t)0x432d, (q15_t)0x4328,
+  (q15_t)0x4323, (q15_t)0x431d, (q15_t)0x4318, (q15_t)0x4313, (q15_t)0x430d, (q15_t)0x4308, (q15_t)0x4302, (q15_t)0x42fd,
+  (q15_t)0x42f8, (q15_t)0x42f2, (q15_t)0x42ed, (q15_t)0x42e8, (q15_t)0x42e2, (q15_t)0x42dd, (q15_t)0x42d8, (q15_t)0x42d2,
+  (q15_t)0x42cd, (q15_t)0x42c8, (q15_t)0x42c2, (q15_t)0x42bd, (q15_t)0x42b7, (q15_t)0x42b2, (q15_t)0x42ad, (q15_t)0x42a7,
+  (q15_t)0x42a2, (q15_t)0x429d, (q15_t)0x4297, (q15_t)0x4292, (q15_t)0x428d, (q15_t)0x4287, (q15_t)0x4282, (q15_t)0x427c,
+  (q15_t)0x4277, (q15_t)0x4272, (q15_t)0x426c, (q15_t)0x4267, (q15_t)0x4262, (q15_t)0x425c, (q15_t)0x4257, (q15_t)0x4251,
+  (q15_t)0x424c, (q15_t)0x4247, (q15_t)0x4241, (q15_t)0x423c, (q15_t)0x4237, (q15_t)0x4231, (q15_t)0x422c, (q15_t)0x4226,
+  (q15_t)0x4221, (q15_t)0x421c, (q15_t)0x4216, (q15_t)0x4211, (q15_t)0x420c, (q15_t)0x4206, (q15_t)0x4201, (q15_t)0x41fb,
+  (q15_t)0x41f6, (q15_t)0x41f1, (q15_t)0x41eb, (q15_t)0x41e6, (q15_t)0x41e0, (q15_t)0x41db, (q15_t)0x41d6, (q15_t)0x41d0,
+  (q15_t)0x41cb, (q15_t)0x41c6, (q15_t)0x41c0, (q15_t)0x41bb, (q15_t)0x41b5, (q15_t)0x41b0, (q15_t)0x41ab, (q15_t)0x41a5,
+  (q15_t)0x41a0, (q15_t)0x419a, (q15_t)0x4195, (q15_t)0x4190, (q15_t)0x418a, (q15_t)0x4185, (q15_t)0x417f, (q15_t)0x417a,
+  (q15_t)0x4175, (q15_t)0x416f, (q15_t)0x416a, (q15_t)0x4164, (q15_t)0x415f, (q15_t)0x415a, (q15_t)0x4154, (q15_t)0x414f,
+  (q15_t)0x4149, (q15_t)0x4144, (q15_t)0x413f, (q15_t)0x4139, (q15_t)0x4134, (q15_t)0x412e, (q15_t)0x4129, (q15_t)0x4124,
+  (q15_t)0x411e, (q15_t)0x4119, (q15_t)0x4113, (q15_t)0x410e, (q15_t)0x4108, (q15_t)0x4103, (q15_t)0x40fe, (q15_t)0x40f8,
+  (q15_t)0x40f3, (q15_t)0x40ed, (q15_t)0x40e8, (q15_t)0x40e3, (q15_t)0x40dd, (q15_t)0x40d8, (q15_t)0x40d2, (q15_t)0x40cd,
+  (q15_t)0x40c8, (q15_t)0x40c2, (q15_t)0x40bd, (q15_t)0x40b7, (q15_t)0x40b2, (q15_t)0x40ac, (q15_t)0x40a7, (q15_t)0x40a2,
+  (q15_t)0x409c, (q15_t)0x4097, (q15_t)0x4091, (q15_t)0x408c, (q15_t)0x4086, (q15_t)0x4081, (q15_t)0x407c, (q15_t)0x4076,
+  (q15_t)0x4071, (q15_t)0x406b, (q15_t)0x4066, (q15_t)0x4060, (q15_t)0x405b, (q15_t)0x4056, (q15_t)0x4050, (q15_t)0x404b,
+  (q15_t)0x4045, (q15_t)0x4040, (q15_t)0x403a, (q15_t)0x4035, (q15_t)0x4030, (q15_t)0x402a, (q15_t)0x4025, (q15_t)0x401f,
+  (q15_t)0x401a, (q15_t)0x4014, (q15_t)0x400f, (q15_t)0x4009, (q15_t)0x4004, (q15_t)0x3fff, (q15_t)0x3ff9, (q15_t)0x3ff4,
+  (q15_t)0x3fee, (q15_t)0x3fe9, (q15_t)0x3fe3, (q15_t)0x3fde, (q15_t)0x3fd8, (q15_t)0x3fd3, (q15_t)0x3fce, (q15_t)0x3fc8,
+  (q15_t)0x3fc3, (q15_t)0x3fbd, (q15_t)0x3fb8, (q15_t)0x3fb2, (q15_t)0x3fad, (q15_t)0x3fa7, (q15_t)0x3fa2, (q15_t)0x3f9d,
+  (q15_t)0x3f97, (q15_t)0x3f92, (q15_t)0x3f8c, (q15_t)0x3f87, (q15_t)0x3f81, (q15_t)0x3f7c, (q15_t)0x3f76, (q15_t)0x3f71,
+  (q15_t)0x3f6b, (q15_t)0x3f66, (q15_t)0x3f61, (q15_t)0x3f5b, (q15_t)0x3f56, (q15_t)0x3f50, (q15_t)0x3f4b, (q15_t)0x3f45,
+  (q15_t)0x3f40, (q15_t)0x3f3a, (q15_t)0x3f35, (q15_t)0x3f2f, (q15_t)0x3f2a, (q15_t)0x3f24, (q15_t)0x3f1f, (q15_t)0x3f1a,
+  (q15_t)0x3f14, (q15_t)0x3f0f, (q15_t)0x3f09, (q15_t)0x3f04, (q15_t)0x3efe, (q15_t)0x3ef9, (q15_t)0x3ef3, (q15_t)0x3eee,
+  (q15_t)0x3ee8, (q15_t)0x3ee3, (q15_t)0x3edd, (q15_t)0x3ed8, (q15_t)0x3ed2, (q15_t)0x3ecd, (q15_t)0x3ec7, (q15_t)0x3ec2,
+  (q15_t)0x3ebd, (q15_t)0x3eb7, (q15_t)0x3eb2, (q15_t)0x3eac, (q15_t)0x3ea7, (q15_t)0x3ea1, (q15_t)0x3e9c, (q15_t)0x3e96,
+  (q15_t)0x3e91, (q15_t)0x3e8b, (q15_t)0x3e86, (q15_t)0x3e80, (q15_t)0x3e7b, (q15_t)0x3e75, (q15_t)0x3e70, (q15_t)0x3e6a,
+  (q15_t)0x3e65, (q15_t)0x3e5f, (q15_t)0x3e5a, (q15_t)0x3e54, (q15_t)0x3e4f, (q15_t)0x3e49, (q15_t)0x3e44, (q15_t)0x3e3e,
+  (q15_t)0x3e39, (q15_t)0x3e33, (q15_t)0x3e2e, (q15_t)0x3e28, (q15_t)0x3e23, (q15_t)0x3e1d, (q15_t)0x3e18, (q15_t)0x3e12,
+  (q15_t)0x3e0d, (q15_t)0x3e07, (q15_t)0x3e02, (q15_t)0x3dfc, (q15_t)0x3df7, (q15_t)0x3df1, (q15_t)0x3dec, (q15_t)0x3de6,
+  (q15_t)0x3de1, (q15_t)0x3ddb, (q15_t)0x3dd6, (q15_t)0x3dd0, (q15_t)0x3dcb, (q15_t)0x3dc5, (q15_t)0x3dc0, (q15_t)0x3dba,
+  (q15_t)0x3db5, (q15_t)0x3daf, (q15_t)0x3daa, (q15_t)0x3da4, (q15_t)0x3d9f, (q15_t)0x3d99, (q15_t)0x3d94, (q15_t)0x3d8e,
+  (q15_t)0x3d89, (q15_t)0x3d83, (q15_t)0x3d7e, (q15_t)0x3d78, (q15_t)0x3d73, (q15_t)0x3d6d, (q15_t)0x3d68, (q15_t)0x3d62,
+  (q15_t)0x3d5d, (q15_t)0x3d57, (q15_t)0x3d52, (q15_t)0x3d4c, (q15_t)0x3d47, (q15_t)0x3d41, (q15_t)0x3d3c, (q15_t)0x3d36,
+  (q15_t)0x3d31, (q15_t)0x3d2b, (q15_t)0x3d26, (q15_t)0x3d20, (q15_t)0x3d1b, (q15_t)0x3d15, (q15_t)0x3d10, (q15_t)0x3d0a,
+  (q15_t)0x3d04, (q15_t)0x3cff, (q15_t)0x3cf9, (q15_t)0x3cf4, (q15_t)0x3cee, (q15_t)0x3ce9, (q15_t)0x3ce3, (q15_t)0x3cde,
+  (q15_t)0x3cd8, (q15_t)0x3cd3, (q15_t)0x3ccd, (q15_t)0x3cc8, (q15_t)0x3cc2, (q15_t)0x3cbd, (q15_t)0x3cb7, (q15_t)0x3cb2,
+  (q15_t)0x3cac, (q15_t)0x3ca7, (q15_t)0x3ca1, (q15_t)0x3c9b, (q15_t)0x3c96, (q15_t)0x3c90, (q15_t)0x3c8b, (q15_t)0x3c85,
+  (q15_t)0x3c80, (q15_t)0x3c7a, (q15_t)0x3c75, (q15_t)0x3c6f, (q15_t)0x3c6a, (q15_t)0x3c64, (q15_t)0x3c5f, (q15_t)0x3c59,
+  (q15_t)0x3c53, (q15_t)0x3c4e, (q15_t)0x3c48, (q15_t)0x3c43, (q15_t)0x3c3d, (q15_t)0x3c38, (q15_t)0x3c32, (q15_t)0x3c2d,
+  (q15_t)0x3c27, (q15_t)0x3c22, (q15_t)0x3c1c, (q15_t)0x3c16, (q15_t)0x3c11, (q15_t)0x3c0b, (q15_t)0x3c06, (q15_t)0x3c00,
+  (q15_t)0x3bfb, (q15_t)0x3bf5, (q15_t)0x3bf0, (q15_t)0x3bea, (q15_t)0x3be5, (q15_t)0x3bdf, (q15_t)0x3bd9, (q15_t)0x3bd4,
+  (q15_t)0x3bce, (q15_t)0x3bc9, (q15_t)0x3bc3, (q15_t)0x3bbe, (q15_t)0x3bb8, (q15_t)0x3bb3, (q15_t)0x3bad, (q15_t)0x3ba7,
+  (q15_t)0x3ba2, (q15_t)0x3b9c, (q15_t)0x3b97, (q15_t)0x3b91, (q15_t)0x3b8c, (q15_t)0x3b86, (q15_t)0x3b80, (q15_t)0x3b7b,
+  (q15_t)0x3b75, (q15_t)0x3b70, (q15_t)0x3b6a, (q15_t)0x3b65, (q15_t)0x3b5f, (q15_t)0x3b5a, (q15_t)0x3b54, (q15_t)0x3b4e,
+  (q15_t)0x3b49, (q15_t)0x3b43, (q15_t)0x3b3e, (q15_t)0x3b38, (q15_t)0x3b33, (q15_t)0x3b2d, (q15_t)0x3b27, (q15_t)0x3b22,
+  (q15_t)0x3b1c, (q15_t)0x3b17, (q15_t)0x3b11, (q15_t)0x3b0c, (q15_t)0x3b06, (q15_t)0x3b00, (q15_t)0x3afb, (q15_t)0x3af5,
+  (q15_t)0x3af0, (q15_t)0x3aea, (q15_t)0x3ae4, (q15_t)0x3adf, (q15_t)0x3ad9, (q15_t)0x3ad4, (q15_t)0x3ace, (q15_t)0x3ac9,
+  (q15_t)0x3ac3, (q15_t)0x3abd, (q15_t)0x3ab8, (q15_t)0x3ab2, (q15_t)0x3aad, (q15_t)0x3aa7, (q15_t)0x3aa2, (q15_t)0x3a9c,
+  (q15_t)0x3a96, (q15_t)0x3a91, (q15_t)0x3a8b, (q15_t)0x3a86, (q15_t)0x3a80, (q15_t)0x3a7a, (q15_t)0x3a75, (q15_t)0x3a6f,
+  (q15_t)0x3a6a, (q15_t)0x3a64, (q15_t)0x3a5e, (q15_t)0x3a59, (q15_t)0x3a53, (q15_t)0x3a4e, (q15_t)0x3a48, (q15_t)0x3a42,
+  (q15_t)0x3a3d, (q15_t)0x3a37, (q15_t)0x3a32, (q15_t)0x3a2c, (q15_t)0x3a26, (q15_t)0x3a21, (q15_t)0x3a1b, (q15_t)0x3a16,
+  (q15_t)0x3a10, (q15_t)0x3a0b, (q15_t)0x3a05, (q15_t)0x39ff, (q15_t)0x39fa, (q15_t)0x39f4, (q15_t)0x39ee, (q15_t)0x39e9,
+  (q15_t)0x39e3, (q15_t)0x39de, (q15_t)0x39d8, (q15_t)0x39d2, (q15_t)0x39cd, (q15_t)0x39c7, (q15_t)0x39c2, (q15_t)0x39bc,
+  (q15_t)0x39b6, (q15_t)0x39b1, (q15_t)0x39ab, (q15_t)0x39a6, (q15_t)0x39a0, (q15_t)0x399a, (q15_t)0x3995, (q15_t)0x398f,
+  (q15_t)0x398a, (q15_t)0x3984, (q15_t)0x397e, (q15_t)0x3979, (q15_t)0x3973, (q15_t)0x396d, (q15_t)0x3968, (q15_t)0x3962,
+  (q15_t)0x395d, (q15_t)0x3957, (q15_t)0x3951, (q15_t)0x394c, (q15_t)0x3946, (q15_t)0x3941, (q15_t)0x393b, (q15_t)0x3935,
+  (q15_t)0x3930, (q15_t)0x392a, (q15_t)0x3924, (q15_t)0x391f, (q15_t)0x3919, (q15_t)0x3914, (q15_t)0x390e, (q15_t)0x3908,
+  (q15_t)0x3903, (q15_t)0x38fd, (q15_t)0x38f7, (q15_t)0x38f2, (q15_t)0x38ec, (q15_t)0x38e7, (q15_t)0x38e1, (q15_t)0x38db,
+  (q15_t)0x38d6, (q15_t)0x38d0, (q15_t)0x38ca, (q15_t)0x38c5, (q15_t)0x38bf, (q15_t)0x38ba, (q15_t)0x38b4, (q15_t)0x38ae,
+  (q15_t)0x38a9, (q15_t)0x38a3, (q15_t)0x389d, (q15_t)0x3898, (q15_t)0x3892, (q15_t)0x388c, (q15_t)0x3887, (q15_t)0x3881,
+  (q15_t)0x387c, (q15_t)0x3876, (q15_t)0x3870, (q15_t)0x386b, (q15_t)0x3865, (q15_t)0x385f, (q15_t)0x385a, (q15_t)0x3854,
+  (q15_t)0x384e, (q15_t)0x3849, (q15_t)0x3843, (q15_t)0x383d, (q15_t)0x3838, (q15_t)0x3832, (q15_t)0x382d, (q15_t)0x3827,
+  (q15_t)0x3821, (q15_t)0x381c, (q15_t)0x3816, (q15_t)0x3810, (q15_t)0x380b, (q15_t)0x3805, (q15_t)0x37ff, (q15_t)0x37fa,
+  (q15_t)0x37f4, (q15_t)0x37ee, (q15_t)0x37e9, (q15_t)0x37e3, (q15_t)0x37dd, (q15_t)0x37d8, (q15_t)0x37d2, (q15_t)0x37cc,
+  (q15_t)0x37c7, (q15_t)0x37c1, (q15_t)0x37bc, (q15_t)0x37b6, (q15_t)0x37b0, (q15_t)0x37ab, (q15_t)0x37a5, (q15_t)0x379f,
+  (q15_t)0x379a, (q15_t)0x3794, (q15_t)0x378e, (q15_t)0x3789, (q15_t)0x3783, (q15_t)0x377d, (q15_t)0x3778, (q15_t)0x3772,
+  (q15_t)0x376c, (q15_t)0x3767, (q15_t)0x3761, (q15_t)0x375b, (q15_t)0x3756, (q15_t)0x3750, (q15_t)0x374a, (q15_t)0x3745,
+  (q15_t)0x373f, (q15_t)0x3739, (q15_t)0x3734, (q15_t)0x372e, (q15_t)0x3728, (q15_t)0x3723, (q15_t)0x371d, (q15_t)0x3717,
+  (q15_t)0x3712, (q15_t)0x370c, (q15_t)0x3706, (q15_t)0x3701, (q15_t)0x36fb, (q15_t)0x36f5, (q15_t)0x36f0, (q15_t)0x36ea,
+  (q15_t)0x36e4, (q15_t)0x36df, (q15_t)0x36d9, (q15_t)0x36d3, (q15_t)0x36ce, (q15_t)0x36c8, (q15_t)0x36c2, (q15_t)0x36bc,
+  (q15_t)0x36b7, (q15_t)0x36b1, (q15_t)0x36ab, (q15_t)0x36a6, (q15_t)0x36a0, (q15_t)0x369a, (q15_t)0x3695, (q15_t)0x368f,
+  (q15_t)0x3689, (q15_t)0x3684, (q15_t)0x367e, (q15_t)0x3678, (q15_t)0x3673, (q15_t)0x366d, (q15_t)0x3667, (q15_t)0x3662,
+  (q15_t)0x365c, (q15_t)0x3656, (q15_t)0x3650, (q15_t)0x364b, (q15_t)0x3645, (q15_t)0x363f, (q15_t)0x363a, (q15_t)0x3634,
+  (q15_t)0x362e, (q15_t)0x3629, (q15_t)0x3623, (q15_t)0x361d, (q15_t)0x3618, (q15_t)0x3612, (q15_t)0x360c, (q15_t)0x3606,
+  (q15_t)0x3601, (q15_t)0x35fb, (q15_t)0x35f5, (q15_t)0x35f0, (q15_t)0x35ea, (q15_t)0x35e4, (q15_t)0x35df, (q15_t)0x35d9,
+  (q15_t)0x35d3, (q15_t)0x35cd, (q15_t)0x35c8, (q15_t)0x35c2, (q15_t)0x35bc, (q15_t)0x35b7, (q15_t)0x35b1, (q15_t)0x35ab,
+  (q15_t)0x35a6, (q15_t)0x35a0, (q15_t)0x359a, (q15_t)0x3594, (q15_t)0x358f, (q15_t)0x3589, (q15_t)0x3583, (q15_t)0x357e,
+  (q15_t)0x3578, (q15_t)0x3572, (q15_t)0x356c, (q15_t)0x3567, (q15_t)0x3561, (q15_t)0x355b, (q15_t)0x3556, (q15_t)0x3550,
+  (q15_t)0x354a, (q15_t)0x3544, (q15_t)0x353f, (q15_t)0x3539, (q15_t)0x3533, (q15_t)0x352e, (q15_t)0x3528, (q15_t)0x3522,
+  (q15_t)0x351c, (q15_t)0x3517, (q15_t)0x3511, (q15_t)0x350b, (q15_t)0x3506, (q15_t)0x3500, (q15_t)0x34fa, (q15_t)0x34f4,
+  (q15_t)0x34ef, (q15_t)0x34e9, (q15_t)0x34e3, (q15_t)0x34de, (q15_t)0x34d8, (q15_t)0x34d2, (q15_t)0x34cc, (q15_t)0x34c7,
+  (q15_t)0x34c1, (q15_t)0x34bb, (q15_t)0x34b6, (q15_t)0x34b0, (q15_t)0x34aa, (q15_t)0x34a4, (q15_t)0x349f, (q15_t)0x3499,
+  (q15_t)0x3493, (q15_t)0x348d, (q15_t)0x3488, (q15_t)0x3482, (q15_t)0x347c, (q15_t)0x3476, (q15_t)0x3471, (q15_t)0x346b,
+  (q15_t)0x3465, (q15_t)0x3460, (q15_t)0x345a, (q15_t)0x3454, (q15_t)0x344e, (q15_t)0x3449, (q15_t)0x3443, (q15_t)0x343d,
+  (q15_t)0x3437, (q15_t)0x3432, (q15_t)0x342c, (q15_t)0x3426, (q15_t)0x3420, (q15_t)0x341b, (q15_t)0x3415, (q15_t)0x340f,
+  (q15_t)0x340a, (q15_t)0x3404, (q15_t)0x33fe, (q15_t)0x33f8, (q15_t)0x33f3, (q15_t)0x33ed, (q15_t)0x33e7, (q15_t)0x33e1,
+  (q15_t)0x33dc, (q15_t)0x33d6, (q15_t)0x33d0, (q15_t)0x33ca, (q15_t)0x33c5, (q15_t)0x33bf, (q15_t)0x33b9, (q15_t)0x33b3,
+  (q15_t)0x33ae, (q15_t)0x33a8, (q15_t)0x33a2, (q15_t)0x339c, (q15_t)0x3397, (q15_t)0x3391, (q15_t)0x338b, (q15_t)0x3385,
+  (q15_t)0x3380, (q15_t)0x337a, (q15_t)0x3374, (q15_t)0x336e, (q15_t)0x3369, (q15_t)0x3363, (q15_t)0x335d, (q15_t)0x3357,
+  (q15_t)0x3352, (q15_t)0x334c, (q15_t)0x3346, (q15_t)0x3340, (q15_t)0x333b, (q15_t)0x3335, (q15_t)0x332f, (q15_t)0x3329,
+  (q15_t)0x3324, (q15_t)0x331e, (q15_t)0x3318, (q15_t)0x3312, (q15_t)0x330c, (q15_t)0x3307, (q15_t)0x3301, (q15_t)0x32fb,
+  (q15_t)0x32f5, (q15_t)0x32f0, (q15_t)0x32ea, (q15_t)0x32e4, (q15_t)0x32de, (q15_t)0x32d9, (q15_t)0x32d3, (q15_t)0x32cd,
+  (q15_t)0x32c7, (q15_t)0x32c2, (q15_t)0x32bc, (q15_t)0x32b6, (q15_t)0x32b0, (q15_t)0x32aa, (q15_t)0x32a5, (q15_t)0x329f,
+  (q15_t)0x3299, (q15_t)0x3293, (q15_t)0x328e, (q15_t)0x3288, (q15_t)0x3282, (q15_t)0x327c, (q15_t)0x3276, (q15_t)0x3271,
+  (q15_t)0x326b, (q15_t)0x3265, (q15_t)0x325f, (q15_t)0x325a, (q15_t)0x3254, (q15_t)0x324e, (q15_t)0x3248, (q15_t)0x3243,
+  (q15_t)0x323d, (q15_t)0x3237, (q15_t)0x3231, (q15_t)0x322b, (q15_t)0x3226, (q15_t)0x3220, (q15_t)0x321a, (q15_t)0x3214,
+  (q15_t)0x320e, (q15_t)0x3209, (q15_t)0x3203, (q15_t)0x31fd, (q15_t)0x31f7, (q15_t)0x31f2, (q15_t)0x31ec, (q15_t)0x31e6,
+  (q15_t)0x31e0, (q15_t)0x31da, (q15_t)0x31d5, (q15_t)0x31cf, (q15_t)0x31c9, (q15_t)0x31c3, (q15_t)0x31bd, (q15_t)0x31b8,
+  (q15_t)0x31b2, (q15_t)0x31ac, (q15_t)0x31a6, (q15_t)0x31a1, (q15_t)0x319b, (q15_t)0x3195, (q15_t)0x318f, (q15_t)0x3189,
+  (q15_t)0x3184, (q15_t)0x317e, (q15_t)0x3178, (q15_t)0x3172, (q15_t)0x316c, (q15_t)0x3167, (q15_t)0x3161, (q15_t)0x315b,
+  (q15_t)0x3155, (q15_t)0x314f, (q15_t)0x314a, (q15_t)0x3144, (q15_t)0x313e, (q15_t)0x3138, (q15_t)0x3132, (q15_t)0x312d,
+  (q15_t)0x3127, (q15_t)0x3121, (q15_t)0x311b, (q15_t)0x3115, (q15_t)0x3110, (q15_t)0x310a, (q15_t)0x3104, (q15_t)0x30fe,
+  (q15_t)0x30f8, (q15_t)0x30f3, (q15_t)0x30ed, (q15_t)0x30e7, (q15_t)0x30e1, (q15_t)0x30db, (q15_t)0x30d6, (q15_t)0x30d0,
+  (q15_t)0x30ca, (q15_t)0x30c4, (q15_t)0x30be, (q15_t)0x30b8, (q15_t)0x30b3, (q15_t)0x30ad, (q15_t)0x30a7, (q15_t)0x30a1,
+  (q15_t)0x309b, (q15_t)0x3096, (q15_t)0x3090, (q15_t)0x308a, (q15_t)0x3084, (q15_t)0x307e, (q15_t)0x3079, (q15_t)0x3073,
+  (q15_t)0x306d, (q15_t)0x3067, (q15_t)0x3061, (q15_t)0x305b, (q15_t)0x3056, (q15_t)0x3050, (q15_t)0x304a, (q15_t)0x3044,
+  (q15_t)0x303e, (q15_t)0x3039, (q15_t)0x3033, (q15_t)0x302d, (q15_t)0x3027, (q15_t)0x3021, (q15_t)0x301b, (q15_t)0x3016,
+  (q15_t)0x3010, (q15_t)0x300a, (q15_t)0x3004, (q15_t)0x2ffe, (q15_t)0x2ff8, (q15_t)0x2ff3, (q15_t)0x2fed, (q15_t)0x2fe7,
+  (q15_t)0x2fe1, (q15_t)0x2fdb, (q15_t)0x2fd6, (q15_t)0x2fd0, (q15_t)0x2fca, (q15_t)0x2fc4, (q15_t)0x2fbe, (q15_t)0x2fb8,
+  (q15_t)0x2fb3, (q15_t)0x2fad, (q15_t)0x2fa7, (q15_t)0x2fa1, (q15_t)0x2f9b, (q15_t)0x2f95, (q15_t)0x2f90, (q15_t)0x2f8a,
+  (q15_t)0x2f84, (q15_t)0x2f7e, (q15_t)0x2f78, (q15_t)0x2f72, (q15_t)0x2f6d, (q15_t)0x2f67, (q15_t)0x2f61, (q15_t)0x2f5b,
+  (q15_t)0x2f55, (q15_t)0x2f4f, (q15_t)0x2f4a, (q15_t)0x2f44, (q15_t)0x2f3e, (q15_t)0x2f38, (q15_t)0x2f32, (q15_t)0x2f2c,
+  (q15_t)0x2f27, (q15_t)0x2f21, (q15_t)0x2f1b, (q15_t)0x2f15, (q15_t)0x2f0f, (q15_t)0x2f09, (q15_t)0x2f03, (q15_t)0x2efe,
+  (q15_t)0x2ef8, (q15_t)0x2ef2, (q15_t)0x2eec, (q15_t)0x2ee6, (q15_t)0x2ee0, (q15_t)0x2edb, (q15_t)0x2ed5, (q15_t)0x2ecf,
+  (q15_t)0x2ec9, (q15_t)0x2ec3, (q15_t)0x2ebd, (q15_t)0x2eb7, (q15_t)0x2eb2, (q15_t)0x2eac, (q15_t)0x2ea6, (q15_t)0x2ea0,
+  (q15_t)0x2e9a, (q15_t)0x2e94, (q15_t)0x2e8e, (q15_t)0x2e89, (q15_t)0x2e83, (q15_t)0x2e7d, (q15_t)0x2e77, (q15_t)0x2e71,
+  (q15_t)0x2e6b, (q15_t)0x2e65, (q15_t)0x2e60, (q15_t)0x2e5a, (q15_t)0x2e54, (q15_t)0x2e4e, (q15_t)0x2e48, (q15_t)0x2e42,
+  (q15_t)0x2e3c, (q15_t)0x2e37, (q15_t)0x2e31, (q15_t)0x2e2b, (q15_t)0x2e25, (q15_t)0x2e1f, (q15_t)0x2e19, (q15_t)0x2e13,
+  (q15_t)0x2e0e, (q15_t)0x2e08, (q15_t)0x2e02, (q15_t)0x2dfc, (q15_t)0x2df6, (q15_t)0x2df0, (q15_t)0x2dea, (q15_t)0x2de5,
+  (q15_t)0x2ddf, (q15_t)0x2dd9, (q15_t)0x2dd3, (q15_t)0x2dcd, (q15_t)0x2dc7, (q15_t)0x2dc1, (q15_t)0x2dbb, (q15_t)0x2db6,
+  (q15_t)0x2db0, (q15_t)0x2daa, (q15_t)0x2da4, (q15_t)0x2d9e, (q15_t)0x2d98, (q15_t)0x2d92, (q15_t)0x2d8d, (q15_t)0x2d87,
+  (q15_t)0x2d81, (q15_t)0x2d7b, (q15_t)0x2d75, (q15_t)0x2d6f, (q15_t)0x2d69, (q15_t)0x2d63, (q15_t)0x2d5e, (q15_t)0x2d58,
+  (q15_t)0x2d52, (q15_t)0x2d4c, (q15_t)0x2d46, (q15_t)0x2d40, (q15_t)0x2d3a, (q15_t)0x2d34, (q15_t)0x2d2f, (q15_t)0x2d29,
+  (q15_t)0x2d23, (q15_t)0x2d1d, (q15_t)0x2d17, (q15_t)0x2d11, (q15_t)0x2d0b, (q15_t)0x2d05, (q15_t)0x2cff, (q15_t)0x2cfa,
+  (q15_t)0x2cf4, (q15_t)0x2cee, (q15_t)0x2ce8, (q15_t)0x2ce2, (q15_t)0x2cdc, (q15_t)0x2cd6, (q15_t)0x2cd0, (q15_t)0x2ccb,
+  (q15_t)0x2cc5, (q15_t)0x2cbf, (q15_t)0x2cb9, (q15_t)0x2cb3, (q15_t)0x2cad, (q15_t)0x2ca7, (q15_t)0x2ca1, (q15_t)0x2c9b,
+  (q15_t)0x2c96, (q15_t)0x2c90, (q15_t)0x2c8a, (q15_t)0x2c84, (q15_t)0x2c7e, (q15_t)0x2c78, (q15_t)0x2c72, (q15_t)0x2c6c,
+  (q15_t)0x2c66, (q15_t)0x2c61, (q15_t)0x2c5b, (q15_t)0x2c55, (q15_t)0x2c4f, (q15_t)0x2c49, (q15_t)0x2c43, (q15_t)0x2c3d,
+  (q15_t)0x2c37, (q15_t)0x2c31, (q15_t)0x2c2b, (q15_t)0x2c26, (q15_t)0x2c20, (q15_t)0x2c1a, (q15_t)0x2c14, (q15_t)0x2c0e,
+  (q15_t)0x2c08, (q15_t)0x2c02, (q15_t)0x2bfc, (q15_t)0x2bf6, (q15_t)0x2bf0, (q15_t)0x2beb, (q15_t)0x2be5, (q15_t)0x2bdf,
+  (q15_t)0x2bd9, (q15_t)0x2bd3, (q15_t)0x2bcd, (q15_t)0x2bc7, (q15_t)0x2bc1, (q15_t)0x2bbb, (q15_t)0x2bb5, (q15_t)0x2bb0,
+  (q15_t)0x2baa, (q15_t)0x2ba4, (q15_t)0x2b9e, (q15_t)0x2b98, (q15_t)0x2b92, (q15_t)0x2b8c, (q15_t)0x2b86, (q15_t)0x2b80,
+  (q15_t)0x2b7a, (q15_t)0x2b74, (q15_t)0x2b6f, (q15_t)0x2b69, (q15_t)0x2b63, (q15_t)0x2b5d, (q15_t)0x2b57, (q15_t)0x2b51,
+  (q15_t)0x2b4b, (q15_t)0x2b45, (q15_t)0x2b3f, (q15_t)0x2b39, (q15_t)0x2b33, (q15_t)0x2b2d, (q15_t)0x2b28, (q15_t)0x2b22,
+  (q15_t)0x2b1c, (q15_t)0x2b16, (q15_t)0x2b10, (q15_t)0x2b0a, (q15_t)0x2b04, (q15_t)0x2afe, (q15_t)0x2af8, (q15_t)0x2af2,
+  (q15_t)0x2aec, (q15_t)0x2ae6, (q15_t)0x2ae1, (q15_t)0x2adb, (q15_t)0x2ad5, (q15_t)0x2acf, (q15_t)0x2ac9, (q15_t)0x2ac3,
+  (q15_t)0x2abd, (q15_t)0x2ab7, (q15_t)0x2ab1, (q15_t)0x2aab, (q15_t)0x2aa5, (q15_t)0x2a9f, (q15_t)0x2a99, (q15_t)0x2a94,
+  (q15_t)0x2a8e, (q15_t)0x2a88, (q15_t)0x2a82, (q15_t)0x2a7c, (q15_t)0x2a76, (q15_t)0x2a70, (q15_t)0x2a6a, (q15_t)0x2a64,
+  (q15_t)0x2a5e, (q15_t)0x2a58, (q15_t)0x2a52, (q15_t)0x2a4c, (q15_t)0x2a47, (q15_t)0x2a41, (q15_t)0x2a3b, (q15_t)0x2a35,
+  (q15_t)0x2a2f, (q15_t)0x2a29, (q15_t)0x2a23, (q15_t)0x2a1d, (q15_t)0x2a17, (q15_t)0x2a11, (q15_t)0x2a0b, (q15_t)0x2a05,
+  (q15_t)0x29ff, (q15_t)0x29f9, (q15_t)0x29f3, (q15_t)0x29ee, (q15_t)0x29e8, (q15_t)0x29e2, (q15_t)0x29dc, (q15_t)0x29d6,
+  (q15_t)0x29d0, (q15_t)0x29ca, (q15_t)0x29c4, (q15_t)0x29be, (q15_t)0x29b8, (q15_t)0x29b2, (q15_t)0x29ac, (q15_t)0x29a6,
+  (q15_t)0x29a0, (q15_t)0x299a, (q15_t)0x2994, (q15_t)0x298e, (q15_t)0x2989, (q15_t)0x2983, (q15_t)0x297d, (q15_t)0x2977,
+  (q15_t)0x2971, (q15_t)0x296b, (q15_t)0x2965, (q15_t)0x295f, (q15_t)0x2959, (q15_t)0x2953, (q15_t)0x294d, (q15_t)0x2947,
+  (q15_t)0x2941, (q15_t)0x293b, (q15_t)0x2935, (q15_t)0x292f, (q15_t)0x2929, (q15_t)0x2923, (q15_t)0x291d, (q15_t)0x2918,
+  (q15_t)0x2912, (q15_t)0x290c, (q15_t)0x2906, (q15_t)0x2900, (q15_t)0x28fa, (q15_t)0x28f4, (q15_t)0x28ee, (q15_t)0x28e8,
+  (q15_t)0x28e2, (q15_t)0x28dc, (q15_t)0x28d6, (q15_t)0x28d0, (q15_t)0x28ca, (q15_t)0x28c4, (q15_t)0x28be, (q15_t)0x28b8,
+  (q15_t)0x28b2, (q15_t)0x28ac, (q15_t)0x28a6, (q15_t)0x28a0, (q15_t)0x289a, (q15_t)0x2895, (q15_t)0x288f, (q15_t)0x2889,
+  (q15_t)0x2883, (q15_t)0x287d, (q15_t)0x2877, (q15_t)0x2871, (q15_t)0x286b, (q15_t)0x2865, (q15_t)0x285f, (q15_t)0x2859,
+  (q15_t)0x2853, (q15_t)0x284d, (q15_t)0x2847, (q15_t)0x2841, (q15_t)0x283b, (q15_t)0x2835, (q15_t)0x282f, (q15_t)0x2829,
+  (q15_t)0x2823, (q15_t)0x281d, (q15_t)0x2817, (q15_t)0x2811, (q15_t)0x280b, (q15_t)0x2805, (q15_t)0x27ff, (q15_t)0x27f9,
+  (q15_t)0x27f3, (q15_t)0x27ee, (q15_t)0x27e8, (q15_t)0x27e2, (q15_t)0x27dc, (q15_t)0x27d6, (q15_t)0x27d0, (q15_t)0x27ca,
+  (q15_t)0x27c4, (q15_t)0x27be, (q15_t)0x27b8, (q15_t)0x27b2, (q15_t)0x27ac, (q15_t)0x27a6, (q15_t)0x27a0, (q15_t)0x279a,
+  (q15_t)0x2794, (q15_t)0x278e, (q15_t)0x2788, (q15_t)0x2782, (q15_t)0x277c, (q15_t)0x2776, (q15_t)0x2770, (q15_t)0x276a,
+  (q15_t)0x2764, (q15_t)0x275e, (q15_t)0x2758, (q15_t)0x2752, (q15_t)0x274c, (q15_t)0x2746, (q15_t)0x2740, (q15_t)0x273a,
+  (q15_t)0x2734, (q15_t)0x272e, (q15_t)0x2728, (q15_t)0x2722, (q15_t)0x271c, (q15_t)0x2716, (q15_t)0x2710, (q15_t)0x270a,
+  (q15_t)0x2704, (q15_t)0x26fe, (q15_t)0x26f8, (q15_t)0x26f2, (q15_t)0x26ec, (q15_t)0x26e7, (q15_t)0x26e1, (q15_t)0x26db,
+  (q15_t)0x26d5, (q15_t)0x26cf, (q15_t)0x26c9, (q15_t)0x26c3, (q15_t)0x26bd, (q15_t)0x26b7, (q15_t)0x26b1, (q15_t)0x26ab,
+  (q15_t)0x26a5, (q15_t)0x269f, (q15_t)0x2699, (q15_t)0x2693, (q15_t)0x268d, (q15_t)0x2687, (q15_t)0x2681, (q15_t)0x267b,
+  (q15_t)0x2675, (q15_t)0x266f, (q15_t)0x2669, (q15_t)0x2663, (q15_t)0x265d, (q15_t)0x2657, (q15_t)0x2651, (q15_t)0x264b,
+  (q15_t)0x2645, (q15_t)0x263f, (q15_t)0x2639, (q15_t)0x2633, (q15_t)0x262d, (q15_t)0x2627, (q15_t)0x2621, (q15_t)0x261b,
+  (q15_t)0x2615, (q15_t)0x260f, (q15_t)0x2609, (q15_t)0x2603, (q15_t)0x25fd, (q15_t)0x25f7, (q15_t)0x25f1, (q15_t)0x25eb,
+  (q15_t)0x25e5, (q15_t)0x25df, (q15_t)0x25d9, (q15_t)0x25d3, (q15_t)0x25cd, (q15_t)0x25c7, (q15_t)0x25c1, (q15_t)0x25bb,
+  (q15_t)0x25b5, (q15_t)0x25af, (q15_t)0x25a9, (q15_t)0x25a3, (q15_t)0x259d, (q15_t)0x2597, (q15_t)0x2591, (q15_t)0x258b,
+  (q15_t)0x2585, (q15_t)0x257f, (q15_t)0x2579, (q15_t)0x2573, (q15_t)0x256d, (q15_t)0x2567, (q15_t)0x2561, (q15_t)0x255b,
+  (q15_t)0x2555, (q15_t)0x254f, (q15_t)0x2549, (q15_t)0x2543, (q15_t)0x253d, (q15_t)0x2537, (q15_t)0x2531, (q15_t)0x252b,
+  (q15_t)0x2525, (q15_t)0x251f, (q15_t)0x2519, (q15_t)0x2513, (q15_t)0x250c, (q15_t)0x2506, (q15_t)0x2500, (q15_t)0x24fa,
+  (q15_t)0x24f4, (q15_t)0x24ee, (q15_t)0x24e8, (q15_t)0x24e2, (q15_t)0x24dc, (q15_t)0x24d6, (q15_t)0x24d0, (q15_t)0x24ca,
+  (q15_t)0x24c4, (q15_t)0x24be, (q15_t)0x24b8, (q15_t)0x24b2, (q15_t)0x24ac, (q15_t)0x24a6, (q15_t)0x24a0, (q15_t)0x249a,
+  (q15_t)0x2494, (q15_t)0x248e, (q15_t)0x2488, (q15_t)0x2482, (q15_t)0x247c, (q15_t)0x2476, (q15_t)0x2470, (q15_t)0x246a,
+  (q15_t)0x2464, (q15_t)0x245e, (q15_t)0x2458, (q15_t)0x2452, (q15_t)0x244c, (q15_t)0x2446, (q15_t)0x2440, (q15_t)0x243a,
+  (q15_t)0x2434, (q15_t)0x242e, (q15_t)0x2428, (q15_t)0x2422, (q15_t)0x241c, (q15_t)0x2416, (q15_t)0x2410, (q15_t)0x240a,
+  (q15_t)0x2404, (q15_t)0x23fd, (q15_t)0x23f7, (q15_t)0x23f1, (q15_t)0x23eb, (q15_t)0x23e5, (q15_t)0x23df, (q15_t)0x23d9,
+  (q15_t)0x23d3, (q15_t)0x23cd, (q15_t)0x23c7, (q15_t)0x23c1, (q15_t)0x23bb, (q15_t)0x23b5, (q15_t)0x23af, (q15_t)0x23a9,
+  (q15_t)0x23a3, (q15_t)0x239d, (q15_t)0x2397, (q15_t)0x2391, (q15_t)0x238b, (q15_t)0x2385, (q15_t)0x237f, (q15_t)0x2379,
+  (q15_t)0x2373, (q15_t)0x236d, (q15_t)0x2367, (q15_t)0x2361, (q15_t)0x235b, (q15_t)0x2355, (q15_t)0x234e, (q15_t)0x2348,
+  (q15_t)0x2342, (q15_t)0x233c, (q15_t)0x2336, (q15_t)0x2330, (q15_t)0x232a, (q15_t)0x2324, (q15_t)0x231e, (q15_t)0x2318,
+  (q15_t)0x2312, (q15_t)0x230c, (q15_t)0x2306, (q15_t)0x2300, (q15_t)0x22fa, (q15_t)0x22f4, (q15_t)0x22ee, (q15_t)0x22e8,
+  (q15_t)0x22e2, (q15_t)0x22dc, (q15_t)0x22d6, (q15_t)0x22d0, (q15_t)0x22ca, (q15_t)0x22c4, (q15_t)0x22bd, (q15_t)0x22b7,
+  (q15_t)0x22b1, (q15_t)0x22ab, (q15_t)0x22a5, (q15_t)0x229f, (q15_t)0x2299, (q15_t)0x2293, (q15_t)0x228d, (q15_t)0x2287,
+  (q15_t)0x2281, (q15_t)0x227b, (q15_t)0x2275, (q15_t)0x226f, (q15_t)0x2269, (q15_t)0x2263, (q15_t)0x225d, (q15_t)0x2257,
+  (q15_t)0x2251, (q15_t)0x224a, (q15_t)0x2244, (q15_t)0x223e, (q15_t)0x2238, (q15_t)0x2232, (q15_t)0x222c, (q15_t)0x2226,
+  (q15_t)0x2220, (q15_t)0x221a, (q15_t)0x2214, (q15_t)0x220e, (q15_t)0x2208, (q15_t)0x2202, (q15_t)0x21fc, (q15_t)0x21f6,
+  (q15_t)0x21f0, (q15_t)0x21ea, (q15_t)0x21e4, (q15_t)0x21dd, (q15_t)0x21d7, (q15_t)0x21d1, (q15_t)0x21cb, (q15_t)0x21c5,
+  (q15_t)0x21bf, (q15_t)0x21b9, (q15_t)0x21b3, (q15_t)0x21ad, (q15_t)0x21a7, (q15_t)0x21a1, (q15_t)0x219b, (q15_t)0x2195,
+  (q15_t)0x218f, (q15_t)0x2189, (q15_t)0x2183, (q15_t)0x217c, (q15_t)0x2176, (q15_t)0x2170, (q15_t)0x216a, (q15_t)0x2164,
+  (q15_t)0x215e, (q15_t)0x2158, (q15_t)0x2152, (q15_t)0x214c, (q15_t)0x2146, (q15_t)0x2140, (q15_t)0x213a, (q15_t)0x2134,
+  (q15_t)0x212e, (q15_t)0x2128, (q15_t)0x2121, (q15_t)0x211b, (q15_t)0x2115, (q15_t)0x210f, (q15_t)0x2109, (q15_t)0x2103,
+  (q15_t)0x20fd, (q15_t)0x20f7, (q15_t)0x20f1, (q15_t)0x20eb, (q15_t)0x20e5, (q15_t)0x20df, (q15_t)0x20d9, (q15_t)0x20d3,
+  (q15_t)0x20cc, (q15_t)0x20c6, (q15_t)0x20c0, (q15_t)0x20ba, (q15_t)0x20b4, (q15_t)0x20ae, (q15_t)0x20a8, (q15_t)0x20a2,
+  (q15_t)0x209c, (q15_t)0x2096, (q15_t)0x2090, (q15_t)0x208a, (q15_t)0x2084, (q15_t)0x207e, (q15_t)0x2077, (q15_t)0x2071,
+  (q15_t)0x206b, (q15_t)0x2065, (q15_t)0x205f, (q15_t)0x2059, (q15_t)0x2053, (q15_t)0x204d, (q15_t)0x2047, (q15_t)0x2041,
+  (q15_t)0x203b, (q15_t)0x2035, (q15_t)0x202e, (q15_t)0x2028, (q15_t)0x2022, (q15_t)0x201c, (q15_t)0x2016, (q15_t)0x2010,
+  (q15_t)0x200a, (q15_t)0x2004, (q15_t)0x1ffe, (q15_t)0x1ff8, (q15_t)0x1ff2, (q15_t)0x1fec, (q15_t)0x1fe5, (q15_t)0x1fdf,
+  (q15_t)0x1fd9, (q15_t)0x1fd3, (q15_t)0x1fcd, (q15_t)0x1fc7, (q15_t)0x1fc1, (q15_t)0x1fbb, (q15_t)0x1fb5, (q15_t)0x1faf,
+  (q15_t)0x1fa9, (q15_t)0x1fa3, (q15_t)0x1f9c, (q15_t)0x1f96, (q15_t)0x1f90, (q15_t)0x1f8a, (q15_t)0x1f84, (q15_t)0x1f7e,
+  (q15_t)0x1f78, (q15_t)0x1f72, (q15_t)0x1f6c, (q15_t)0x1f66, (q15_t)0x1f60, (q15_t)0x1f59, (q15_t)0x1f53, (q15_t)0x1f4d,
+  (q15_t)0x1f47, (q15_t)0x1f41, (q15_t)0x1f3b, (q15_t)0x1f35, (q15_t)0x1f2f, (q15_t)0x1f29, (q15_t)0x1f23, (q15_t)0x1f1d,
+  (q15_t)0x1f16, (q15_t)0x1f10, (q15_t)0x1f0a, (q15_t)0x1f04, (q15_t)0x1efe, (q15_t)0x1ef8, (q15_t)0x1ef2, (q15_t)0x1eec,
+  (q15_t)0x1ee6, (q15_t)0x1ee0, (q15_t)0x1ed9, (q15_t)0x1ed3, (q15_t)0x1ecd, (q15_t)0x1ec7, (q15_t)0x1ec1, (q15_t)0x1ebb,
+  (q15_t)0x1eb5, (q15_t)0x1eaf, (q15_t)0x1ea9, (q15_t)0x1ea3, (q15_t)0x1e9c, (q15_t)0x1e96, (q15_t)0x1e90, (q15_t)0x1e8a,
+  (q15_t)0x1e84, (q15_t)0x1e7e, (q15_t)0x1e78, (q15_t)0x1e72, (q15_t)0x1e6c, (q15_t)0x1e66, (q15_t)0x1e5f, (q15_t)0x1e59,
+  (q15_t)0x1e53, (q15_t)0x1e4d, (q15_t)0x1e47, (q15_t)0x1e41, (q15_t)0x1e3b, (q15_t)0x1e35, (q15_t)0x1e2f, (q15_t)0x1e29,
+  (q15_t)0x1e22, (q15_t)0x1e1c, (q15_t)0x1e16, (q15_t)0x1e10, (q15_t)0x1e0a, (q15_t)0x1e04, (q15_t)0x1dfe, (q15_t)0x1df8,
+  (q15_t)0x1df2, (q15_t)0x1deb, (q15_t)0x1de5, (q15_t)0x1ddf, (q15_t)0x1dd9, (q15_t)0x1dd3, (q15_t)0x1dcd, (q15_t)0x1dc7,
+  (q15_t)0x1dc1, (q15_t)0x1dbb, (q15_t)0x1db4, (q15_t)0x1dae, (q15_t)0x1da8, (q15_t)0x1da2, (q15_t)0x1d9c, (q15_t)0x1d96,
+  (q15_t)0x1d90, (q15_t)0x1d8a, (q15_t)0x1d84, (q15_t)0x1d7d, (q15_t)0x1d77, (q15_t)0x1d71, (q15_t)0x1d6b, (q15_t)0x1d65,
+  (q15_t)0x1d5f, (q15_t)0x1d59, (q15_t)0x1d53, (q15_t)0x1d4c, (q15_t)0x1d46, (q15_t)0x1d40, (q15_t)0x1d3a, (q15_t)0x1d34,
+  (q15_t)0x1d2e, (q15_t)0x1d28, (q15_t)0x1d22, (q15_t)0x1d1c, (q15_t)0x1d15, (q15_t)0x1d0f, (q15_t)0x1d09, (q15_t)0x1d03,
+  (q15_t)0x1cfd, (q15_t)0x1cf7, (q15_t)0x1cf1, (q15_t)0x1ceb, (q15_t)0x1ce4, (q15_t)0x1cde, (q15_t)0x1cd8, (q15_t)0x1cd2,
+  (q15_t)0x1ccc, (q15_t)0x1cc6, (q15_t)0x1cc0, (q15_t)0x1cba, (q15_t)0x1cb3, (q15_t)0x1cad, (q15_t)0x1ca7, (q15_t)0x1ca1,
+  (q15_t)0x1c9b, (q15_t)0x1c95, (q15_t)0x1c8f, (q15_t)0x1c89, (q15_t)0x1c83, (q15_t)0x1c7c, (q15_t)0x1c76, (q15_t)0x1c70,
+  (q15_t)0x1c6a, (q15_t)0x1c64, (q15_t)0x1c5e, (q15_t)0x1c58, (q15_t)0x1c51, (q15_t)0x1c4b, (q15_t)0x1c45, (q15_t)0x1c3f,
+  (q15_t)0x1c39, (q15_t)0x1c33, (q15_t)0x1c2d, (q15_t)0x1c27, (q15_t)0x1c20, (q15_t)0x1c1a, (q15_t)0x1c14, (q15_t)0x1c0e,
+  (q15_t)0x1c08, (q15_t)0x1c02, (q15_t)0x1bfc, (q15_t)0x1bf6, (q15_t)0x1bef, (q15_t)0x1be9, (q15_t)0x1be3, (q15_t)0x1bdd,
+  (q15_t)0x1bd7, (q15_t)0x1bd1, (q15_t)0x1bcb, (q15_t)0x1bc4, (q15_t)0x1bbe, (q15_t)0x1bb8, (q15_t)0x1bb2, (q15_t)0x1bac,
+  (q15_t)0x1ba6, (q15_t)0x1ba0, (q15_t)0x1b9a, (q15_t)0x1b93, (q15_t)0x1b8d, (q15_t)0x1b87, (q15_t)0x1b81, (q15_t)0x1b7b,
+  (q15_t)0x1b75, (q15_t)0x1b6f, (q15_t)0x1b68, (q15_t)0x1b62, (q15_t)0x1b5c, (q15_t)0x1b56, (q15_t)0x1b50, (q15_t)0x1b4a,
+  (q15_t)0x1b44, (q15_t)0x1b3d, (q15_t)0x1b37, (q15_t)0x1b31, (q15_t)0x1b2b, (q15_t)0x1b25, (q15_t)0x1b1f, (q15_t)0x1b19,
+  (q15_t)0x1b13, (q15_t)0x1b0c, (q15_t)0x1b06, (q15_t)0x1b00, (q15_t)0x1afa, (q15_t)0x1af4, (q15_t)0x1aee, (q15_t)0x1ae8,
+  (q15_t)0x1ae1, (q15_t)0x1adb, (q15_t)0x1ad5, (q15_t)0x1acf, (q15_t)0x1ac9, (q15_t)0x1ac3, (q15_t)0x1abd, (q15_t)0x1ab6,
+  (q15_t)0x1ab0, (q15_t)0x1aaa, (q15_t)0x1aa4, (q15_t)0x1a9e, (q15_t)0x1a98, (q15_t)0x1a91, (q15_t)0x1a8b, (q15_t)0x1a85,
+  (q15_t)0x1a7f, (q15_t)0x1a79, (q15_t)0x1a73, (q15_t)0x1a6d, (q15_t)0x1a66, (q15_t)0x1a60, (q15_t)0x1a5a, (q15_t)0x1a54,
+  (q15_t)0x1a4e, (q15_t)0x1a48, (q15_t)0x1a42, (q15_t)0x1a3b, (q15_t)0x1a35, (q15_t)0x1a2f, (q15_t)0x1a29, (q15_t)0x1a23,
+  (q15_t)0x1a1d, (q15_t)0x1a17, (q15_t)0x1a10, (q15_t)0x1a0a, (q15_t)0x1a04, (q15_t)0x19fe, (q15_t)0x19f8, (q15_t)0x19f2,
+  (q15_t)0x19eb, (q15_t)0x19e5, (q15_t)0x19df, (q15_t)0x19d9, (q15_t)0x19d3, (q15_t)0x19cd, (q15_t)0x19c7, (q15_t)0x19c0,
+  (q15_t)0x19ba, (q15_t)0x19b4, (q15_t)0x19ae, (q15_t)0x19a8, (q15_t)0x19a2, (q15_t)0x199b, (q15_t)0x1995, (q15_t)0x198f,
+  (q15_t)0x1989, (q15_t)0x1983, (q15_t)0x197d, (q15_t)0x1977, (q15_t)0x1970, (q15_t)0x196a, (q15_t)0x1964, (q15_t)0x195e,
+  (q15_t)0x1958, (q15_t)0x1952, (q15_t)0x194b, (q15_t)0x1945, (q15_t)0x193f, (q15_t)0x1939, (q15_t)0x1933, (q15_t)0x192d,
+  (q15_t)0x1926, (q15_t)0x1920, (q15_t)0x191a, (q15_t)0x1914, (q15_t)0x190e, (q15_t)0x1908, (q15_t)0x1901, (q15_t)0x18fb,
+  (q15_t)0x18f5, (q15_t)0x18ef, (q15_t)0x18e9, (q15_t)0x18e3, (q15_t)0x18dc, (q15_t)0x18d6, (q15_t)0x18d0, (q15_t)0x18ca,
+  (q15_t)0x18c4, (q15_t)0x18be, (q15_t)0x18b8, (q15_t)0x18b1, (q15_t)0x18ab, (q15_t)0x18a5, (q15_t)0x189f, (q15_t)0x1899,
+  (q15_t)0x1893, (q15_t)0x188c, (q15_t)0x1886, (q15_t)0x1880, (q15_t)0x187a, (q15_t)0x1874, (q15_t)0x186e, (q15_t)0x1867,
+  (q15_t)0x1861, (q15_t)0x185b, (q15_t)0x1855, (q15_t)0x184f, (q15_t)0x1848, (q15_t)0x1842, (q15_t)0x183c, (q15_t)0x1836,
+  (q15_t)0x1830, (q15_t)0x182a, (q15_t)0x1823, (q15_t)0x181d, (q15_t)0x1817, (q15_t)0x1811, (q15_t)0x180b, (q15_t)0x1805,
+  (q15_t)0x17fe, (q15_t)0x17f8, (q15_t)0x17f2, (q15_t)0x17ec, (q15_t)0x17e6, (q15_t)0x17e0, (q15_t)0x17d9, (q15_t)0x17d3,
+  (q15_t)0x17cd, (q15_t)0x17c7, (q15_t)0x17c1, (q15_t)0x17bb, (q15_t)0x17b4, (q15_t)0x17ae, (q15_t)0x17a8, (q15_t)0x17a2,
+  (q15_t)0x179c, (q15_t)0x1795, (q15_t)0x178f, (q15_t)0x1789, (q15_t)0x1783, (q15_t)0x177d, (q15_t)0x1777, (q15_t)0x1770,
+  (q15_t)0x176a, (q15_t)0x1764, (q15_t)0x175e, (q15_t)0x1758, (q15_t)0x1752, (q15_t)0x174b, (q15_t)0x1745, (q15_t)0x173f,
+  (q15_t)0x1739, (q15_t)0x1733, (q15_t)0x172c, (q15_t)0x1726, (q15_t)0x1720, (q15_t)0x171a, (q15_t)0x1714, (q15_t)0x170e,
+  (q15_t)0x1707, (q15_t)0x1701, (q15_t)0x16fb, (q15_t)0x16f5, (q15_t)0x16ef, (q15_t)0x16e8, (q15_t)0x16e2, (q15_t)0x16dc,
+  (q15_t)0x16d6, (q15_t)0x16d0, (q15_t)0x16ca, (q15_t)0x16c3, (q15_t)0x16bd, (q15_t)0x16b7, (q15_t)0x16b1, (q15_t)0x16ab,
+  (q15_t)0x16a4, (q15_t)0x169e, (q15_t)0x1698, (q15_t)0x1692, (q15_t)0x168c, (q15_t)0x1686, (q15_t)0x167f, (q15_t)0x1679,
+  (q15_t)0x1673, (q15_t)0x166d, (q15_t)0x1667, (q15_t)0x1660, (q15_t)0x165a, (q15_t)0x1654, (q15_t)0x164e, (q15_t)0x1648,
+  (q15_t)0x1642, (q15_t)0x163b, (q15_t)0x1635, (q15_t)0x162f, (q15_t)0x1629, (q15_t)0x1623, (q15_t)0x161c, (q15_t)0x1616,
+  (q15_t)0x1610, (q15_t)0x160a, (q15_t)0x1604, (q15_t)0x15fd, (q15_t)0x15f7, (q15_t)0x15f1, (q15_t)0x15eb, (q15_t)0x15e5,
+  (q15_t)0x15de, (q15_t)0x15d8, (q15_t)0x15d2, (q15_t)0x15cc, (q15_t)0x15c6, (q15_t)0x15c0, (q15_t)0x15b9, (q15_t)0x15b3,
+  (q15_t)0x15ad, (q15_t)0x15a7, (q15_t)0x15a1, (q15_t)0x159a, (q15_t)0x1594, (q15_t)0x158e, (q15_t)0x1588, (q15_t)0x1582,
+  (q15_t)0x157b, (q15_t)0x1575, (q15_t)0x156f, (q15_t)0x1569, (q15_t)0x1563, (q15_t)0x155c, (q15_t)0x1556, (q15_t)0x1550,
+  (q15_t)0x154a, (q15_t)0x1544, (q15_t)0x153d, (q15_t)0x1537, (q15_t)0x1531, (q15_t)0x152b, (q15_t)0x1525, (q15_t)0x151e,
+  (q15_t)0x1518, (q15_t)0x1512, (q15_t)0x150c, (q15_t)0x1506, (q15_t)0x14ff, (q15_t)0x14f9, (q15_t)0x14f3, (q15_t)0x14ed,
+  (q15_t)0x14e7, (q15_t)0x14e0, (q15_t)0x14da, (q15_t)0x14d4, (q15_t)0x14ce, (q15_t)0x14c8, (q15_t)0x14c1, (q15_t)0x14bb,
+  (q15_t)0x14b5, (q15_t)0x14af, (q15_t)0x14a9, (q15_t)0x14a2, (q15_t)0x149c, (q15_t)0x1496, (q15_t)0x1490, (q15_t)0x148a,
+  (q15_t)0x1483, (q15_t)0x147d, (q15_t)0x1477, (q15_t)0x1471, (q15_t)0x146b, (q15_t)0x1464, (q15_t)0x145e, (q15_t)0x1458,
+  (q15_t)0x1452, (q15_t)0x144c, (q15_t)0x1445, (q15_t)0x143f, (q15_t)0x1439, (q15_t)0x1433, (q15_t)0x142d, (q15_t)0x1426,
+  (q15_t)0x1420, (q15_t)0x141a, (q15_t)0x1414, (q15_t)0x140e, (q15_t)0x1407, (q15_t)0x1401, (q15_t)0x13fb, (q15_t)0x13f5,
+  (q15_t)0x13ef, (q15_t)0x13e8, (q15_t)0x13e2, (q15_t)0x13dc, (q15_t)0x13d6, (q15_t)0x13d0, (q15_t)0x13c9, (q15_t)0x13c3,
+  (q15_t)0x13bd, (q15_t)0x13b7, (q15_t)0x13b1, (q15_t)0x13aa, (q15_t)0x13a4, (q15_t)0x139e, (q15_t)0x1398, (q15_t)0x1391,
+  (q15_t)0x138b, (q15_t)0x1385, (q15_t)0x137f, (q15_t)0x1379, (q15_t)0x1372, (q15_t)0x136c, (q15_t)0x1366, (q15_t)0x1360,
+  (q15_t)0x135a, (q15_t)0x1353, (q15_t)0x134d, (q15_t)0x1347, (q15_t)0x1341, (q15_t)0x133b, (q15_t)0x1334, (q15_t)0x132e,
+  (q15_t)0x1328, (q15_t)0x1322, (q15_t)0x131b, (q15_t)0x1315, (q15_t)0x130f, (q15_t)0x1309, (q15_t)0x1303, (q15_t)0x12fc,
+  (q15_t)0x12f6, (q15_t)0x12f0, (q15_t)0x12ea, (q15_t)0x12e4, (q15_t)0x12dd, (q15_t)0x12d7, (q15_t)0x12d1, (q15_t)0x12cb,
+  (q15_t)0x12c4, (q15_t)0x12be, (q15_t)0x12b8, (q15_t)0x12b2, (q15_t)0x12ac, (q15_t)0x12a5, (q15_t)0x129f, (q15_t)0x1299,
+  (q15_t)0x1293, (q15_t)0x128d, (q15_t)0x1286, (q15_t)0x1280, (q15_t)0x127a, (q15_t)0x1274, (q15_t)0x126d, (q15_t)0x1267,
+  (q15_t)0x1261, (q15_t)0x125b, (q15_t)0x1255, (q15_t)0x124e, (q15_t)0x1248, (q15_t)0x1242, (q15_t)0x123c, (q15_t)0x1235,
+  (q15_t)0x122f, (q15_t)0x1229, (q15_t)0x1223, (q15_t)0x121d, (q15_t)0x1216, (q15_t)0x1210, (q15_t)0x120a, (q15_t)0x1204,
+  (q15_t)0x11fd, (q15_t)0x11f7, (q15_t)0x11f1, (q15_t)0x11eb, (q15_t)0x11e5, (q15_t)0x11de, (q15_t)0x11d8, (q15_t)0x11d2,
+  (q15_t)0x11cc, (q15_t)0x11c5, (q15_t)0x11bf, (q15_t)0x11b9, (q15_t)0x11b3, (q15_t)0x11ad, (q15_t)0x11a6, (q15_t)0x11a0,
+  (q15_t)0x119a, (q15_t)0x1194, (q15_t)0x118d, (q15_t)0x1187, (q15_t)0x1181, (q15_t)0x117b, (q15_t)0x1175, (q15_t)0x116e,
+  (q15_t)0x1168, (q15_t)0x1162, (q15_t)0x115c, (q15_t)0x1155, (q15_t)0x114f, (q15_t)0x1149, (q15_t)0x1143, (q15_t)0x113d,
+  (q15_t)0x1136, (q15_t)0x1130, (q15_t)0x112a, (q15_t)0x1124, (q15_t)0x111d, (q15_t)0x1117, (q15_t)0x1111, (q15_t)0x110b,
+  (q15_t)0x1105, (q15_t)0x10fe, (q15_t)0x10f8, (q15_t)0x10f2, (q15_t)0x10ec, (q15_t)0x10e5, (q15_t)0x10df, (q15_t)0x10d9,
+  (q15_t)0x10d3, (q15_t)0x10cc, (q15_t)0x10c6, (q15_t)0x10c0, (q15_t)0x10ba, (q15_t)0x10b4, (q15_t)0x10ad, (q15_t)0x10a7,
+  (q15_t)0x10a1, (q15_t)0x109b, (q15_t)0x1094, (q15_t)0x108e, (q15_t)0x1088, (q15_t)0x1082, (q15_t)0x107b, (q15_t)0x1075,
+  (q15_t)0x106f, (q15_t)0x1069, (q15_t)0x1063, (q15_t)0x105c, (q15_t)0x1056, (q15_t)0x1050, (q15_t)0x104a, (q15_t)0x1043,
+  (q15_t)0x103d, (q15_t)0x1037, (q15_t)0x1031, (q15_t)0x102a, (q15_t)0x1024, (q15_t)0x101e, (q15_t)0x1018, (q15_t)0x1012,
+  (q15_t)0x100b, (q15_t)0x1005, (q15_t)0xfff, (q15_t)0xff9, (q15_t)0xff2, (q15_t)0xfec, (q15_t)0xfe6, (q15_t)0xfe0,
+  (q15_t)0xfd9, (q15_t)0xfd3, (q15_t)0xfcd, (q15_t)0xfc7, (q15_t)0xfc0, (q15_t)0xfba, (q15_t)0xfb4, (q15_t)0xfae,
+  (q15_t)0xfa8, (q15_t)0xfa1, (q15_t)0xf9b, (q15_t)0xf95, (q15_t)0xf8f, (q15_t)0xf88, (q15_t)0xf82, (q15_t)0xf7c,
+  (q15_t)0xf76, (q15_t)0xf6f, (q15_t)0xf69, (q15_t)0xf63, (q15_t)0xf5d, (q15_t)0xf56, (q15_t)0xf50, (q15_t)0xf4a,
+  (q15_t)0xf44, (q15_t)0xf3e, (q15_t)0xf37, (q15_t)0xf31, (q15_t)0xf2b, (q15_t)0xf25, (q15_t)0xf1e, (q15_t)0xf18,
+  (q15_t)0xf12, (q15_t)0xf0c, (q15_t)0xf05, (q15_t)0xeff, (q15_t)0xef9, (q15_t)0xef3, (q15_t)0xeec, (q15_t)0xee6,
+  (q15_t)0xee0, (q15_t)0xeda, (q15_t)0xed3, (q15_t)0xecd, (q15_t)0xec7, (q15_t)0xec1, (q15_t)0xeba, (q15_t)0xeb4,
+  (q15_t)0xeae, (q15_t)0xea8, (q15_t)0xea1, (q15_t)0xe9b, (q15_t)0xe95, (q15_t)0xe8f, (q15_t)0xe89, (q15_t)0xe82,
+  (q15_t)0xe7c, (q15_t)0xe76, (q15_t)0xe70, (q15_t)0xe69, (q15_t)0xe63, (q15_t)0xe5d, (q15_t)0xe57, (q15_t)0xe50,
+  (q15_t)0xe4a, (q15_t)0xe44, (q15_t)0xe3e, (q15_t)0xe37, (q15_t)0xe31, (q15_t)0xe2b, (q15_t)0xe25, (q15_t)0xe1e,
+  (q15_t)0xe18, (q15_t)0xe12, (q15_t)0xe0c, (q15_t)0xe05, (q15_t)0xdff, (q15_t)0xdf9, (q15_t)0xdf3, (q15_t)0xdec,
+  (q15_t)0xde6, (q15_t)0xde0, (q15_t)0xdda, (q15_t)0xdd3, (q15_t)0xdcd, (q15_t)0xdc7, (q15_t)0xdc1, (q15_t)0xdba,
+  (q15_t)0xdb4, (q15_t)0xdae, (q15_t)0xda8, (q15_t)0xda1, (q15_t)0xd9b, (q15_t)0xd95, (q15_t)0xd8f, (q15_t)0xd88,
+  (q15_t)0xd82, (q15_t)0xd7c, (q15_t)0xd76, (q15_t)0xd6f, (q15_t)0xd69, (q15_t)0xd63, (q15_t)0xd5d, (q15_t)0xd56,
+  (q15_t)0xd50, (q15_t)0xd4a, (q15_t)0xd44, (q15_t)0xd3d, (q15_t)0xd37, (q15_t)0xd31, (q15_t)0xd2b, (q15_t)0xd24,
+  (q15_t)0xd1e, (q15_t)0xd18, (q15_t)0xd12, (q15_t)0xd0b, (q15_t)0xd05, (q15_t)0xcff, (q15_t)0xcf9, (q15_t)0xcf2,
+  (q15_t)0xcec, (q15_t)0xce6, (q15_t)0xce0, (q15_t)0xcd9, (q15_t)0xcd3, (q15_t)0xccd, (q15_t)0xcc7, (q15_t)0xcc0,
+  (q15_t)0xcba, (q15_t)0xcb4, (q15_t)0xcae, (q15_t)0xca7, (q15_t)0xca1, (q15_t)0xc9b, (q15_t)0xc95, (q15_t)0xc8e,
+  (q15_t)0xc88, (q15_t)0xc82, (q15_t)0xc7c, (q15_t)0xc75, (q15_t)0xc6f, (q15_t)0xc69, (q15_t)0xc63, (q15_t)0xc5c,
+  (q15_t)0xc56, (q15_t)0xc50, (q15_t)0xc4a, (q15_t)0xc43, (q15_t)0xc3d, (q15_t)0xc37, (q15_t)0xc31, (q15_t)0xc2a,
+  (q15_t)0xc24, (q15_t)0xc1e, (q15_t)0xc18, (q15_t)0xc11, (q15_t)0xc0b, (q15_t)0xc05, (q15_t)0xbff, (q15_t)0xbf8,
+  (q15_t)0xbf2, (q15_t)0xbec, (q15_t)0xbe6, (q15_t)0xbdf, (q15_t)0xbd9, (q15_t)0xbd3, (q15_t)0xbcd, (q15_t)0xbc6,
+  (q15_t)0xbc0, (q15_t)0xbba, (q15_t)0xbb4, (q15_t)0xbad, (q15_t)0xba7, (q15_t)0xba1, (q15_t)0xb9b, (q15_t)0xb94,
+  (q15_t)0xb8e, (q15_t)0xb88, (q15_t)0xb81, (q15_t)0xb7b, (q15_t)0xb75, (q15_t)0xb6f, (q15_t)0xb68, (q15_t)0xb62,
+  (q15_t)0xb5c, (q15_t)0xb56, (q15_t)0xb4f, (q15_t)0xb49, (q15_t)0xb43, (q15_t)0xb3d, (q15_t)0xb36, (q15_t)0xb30,
+  (q15_t)0xb2a, (q15_t)0xb24, (q15_t)0xb1d, (q15_t)0xb17, (q15_t)0xb11, (q15_t)0xb0b, (q15_t)0xb04, (q15_t)0xafe,
+  (q15_t)0xaf8, (q15_t)0xaf2, (q15_t)0xaeb, (q15_t)0xae5, (q15_t)0xadf, (q15_t)0xad8, (q15_t)0xad2, (q15_t)0xacc,
+  (q15_t)0xac6, (q15_t)0xabf, (q15_t)0xab9, (q15_t)0xab3, (q15_t)0xaad, (q15_t)0xaa6, (q15_t)0xaa0, (q15_t)0xa9a,
+  (q15_t)0xa94, (q15_t)0xa8d, (q15_t)0xa87, (q15_t)0xa81, (q15_t)0xa7b, (q15_t)0xa74, (q15_t)0xa6e, (q15_t)0xa68,
+  (q15_t)0xa62, (q15_t)0xa5b, (q15_t)0xa55, (q15_t)0xa4f, (q15_t)0xa48, (q15_t)0xa42, (q15_t)0xa3c, (q15_t)0xa36,
+  (q15_t)0xa2f, (q15_t)0xa29, (q15_t)0xa23, (q15_t)0xa1d, (q15_t)0xa16, (q15_t)0xa10, (q15_t)0xa0a, (q15_t)0xa04,
+  (q15_t)0x9fd, (q15_t)0x9f7, (q15_t)0x9f1, (q15_t)0x9eb, (q15_t)0x9e4, (q15_t)0x9de, (q15_t)0x9d8, (q15_t)0x9d1,
+  (q15_t)0x9cb, (q15_t)0x9c5, (q15_t)0x9bf, (q15_t)0x9b8, (q15_t)0x9b2, (q15_t)0x9ac, (q15_t)0x9a6, (q15_t)0x99f,
+  (q15_t)0x999, (q15_t)0x993, (q15_t)0x98d, (q15_t)0x986, (q15_t)0x980, (q15_t)0x97a, (q15_t)0x973, (q15_t)0x96d,
+  (q15_t)0x967, (q15_t)0x961, (q15_t)0x95a, (q15_t)0x954, (q15_t)0x94e, (q15_t)0x948, (q15_t)0x941, (q15_t)0x93b,
+  (q15_t)0x935, (q15_t)0x92f, (q15_t)0x928, (q15_t)0x922, (q15_t)0x91c, (q15_t)0x915, (q15_t)0x90f, (q15_t)0x909,
+  (q15_t)0x903, (q15_t)0x8fc, (q15_t)0x8f6, (q15_t)0x8f0, (q15_t)0x8ea, (q15_t)0x8e3, (q15_t)0x8dd, (q15_t)0x8d7,
+  (q15_t)0x8d1, (q15_t)0x8ca, (q15_t)0x8c4, (q15_t)0x8be, (q15_t)0x8b7, (q15_t)0x8b1, (q15_t)0x8ab, (q15_t)0x8a5,
+  (q15_t)0x89e, (q15_t)0x898, (q15_t)0x892, (q15_t)0x88c, (q15_t)0x885, (q15_t)0x87f, (q15_t)0x879, (q15_t)0x872,
+  (q15_t)0x86c, (q15_t)0x866, (q15_t)0x860, (q15_t)0x859, (q15_t)0x853, (q15_t)0x84d, (q15_t)0x847, (q15_t)0x840,
+  (q15_t)0x83a, (q15_t)0x834, (q15_t)0x82e, (q15_t)0x827, (q15_t)0x821, (q15_t)0x81b, (q15_t)0x814, (q15_t)0x80e,
+  (q15_t)0x808, (q15_t)0x802, (q15_t)0x7fb, (q15_t)0x7f5, (q15_t)0x7ef, (q15_t)0x7e9, (q15_t)0x7e2, (q15_t)0x7dc,
+  (q15_t)0x7d6, (q15_t)0x7cf, (q15_t)0x7c9, (q15_t)0x7c3, (q15_t)0x7bd, (q15_t)0x7b6, (q15_t)0x7b0, (q15_t)0x7aa,
+  (q15_t)0x7a4, (q15_t)0x79d, (q15_t)0x797, (q15_t)0x791, (q15_t)0x78a, (q15_t)0x784, (q15_t)0x77e, (q15_t)0x778,
+  (q15_t)0x771, (q15_t)0x76b, (q15_t)0x765, (q15_t)0x75f, (q15_t)0x758, (q15_t)0x752, (q15_t)0x74c, (q15_t)0x745,
+  (q15_t)0x73f, (q15_t)0x739, (q15_t)0x733, (q15_t)0x72c, (q15_t)0x726, (q15_t)0x720, (q15_t)0x71a, (q15_t)0x713,
+  (q15_t)0x70d, (q15_t)0x707, (q15_t)0x700, (q15_t)0x6fa, (q15_t)0x6f4, (q15_t)0x6ee, (q15_t)0x6e7, (q15_t)0x6e1,
+  (q15_t)0x6db, (q15_t)0x6d5, (q15_t)0x6ce, (q15_t)0x6c8, (q15_t)0x6c2, (q15_t)0x6bb, (q15_t)0x6b5, (q15_t)0x6af,
+  (q15_t)0x6a9, (q15_t)0x6a2, (q15_t)0x69c, (q15_t)0x696, (q15_t)0x690, (q15_t)0x689, (q15_t)0x683, (q15_t)0x67d,
+  (q15_t)0x676, (q15_t)0x670, (q15_t)0x66a, (q15_t)0x664, (q15_t)0x65d, (q15_t)0x657, (q15_t)0x651, (q15_t)0x64a,
+  (q15_t)0x644, (q15_t)0x63e, (q15_t)0x638, (q15_t)0x631, (q15_t)0x62b, (q15_t)0x625, (q15_t)0x61f, (q15_t)0x618,
+  (q15_t)0x612, (q15_t)0x60c, (q15_t)0x605, (q15_t)0x5ff, (q15_t)0x5f9, (q15_t)0x5f3, (q15_t)0x5ec, (q15_t)0x5e6,
+  (q15_t)0x5e0, (q15_t)0x5da, (q15_t)0x5d3, (q15_t)0x5cd, (q15_t)0x5c7, (q15_t)0x5c0, (q15_t)0x5ba, (q15_t)0x5b4,
+  (q15_t)0x5ae, (q15_t)0x5a7, (q15_t)0x5a1, (q15_t)0x59b, (q15_t)0x594, (q15_t)0x58e, (q15_t)0x588, (q15_t)0x582,
+  (q15_t)0x57b, (q15_t)0x575, (q15_t)0x56f, (q15_t)0x569, (q15_t)0x562, (q15_t)0x55c, (q15_t)0x556, (q15_t)0x54f,
+  (q15_t)0x549, (q15_t)0x543, (q15_t)0x53d, (q15_t)0x536, (q15_t)0x530, (q15_t)0x52a, (q15_t)0x523, (q15_t)0x51d,
+  (q15_t)0x517, (q15_t)0x511, (q15_t)0x50a, (q15_t)0x504, (q15_t)0x4fe, (q15_t)0x4f8, (q15_t)0x4f1, (q15_t)0x4eb,
+  (q15_t)0x4e5, (q15_t)0x4de, (q15_t)0x4d8, (q15_t)0x4d2, (q15_t)0x4cc, (q15_t)0x4c5, (q15_t)0x4bf, (q15_t)0x4b9,
+  (q15_t)0x4b2, (q15_t)0x4ac, (q15_t)0x4a6, (q15_t)0x4a0, (q15_t)0x499, (q15_t)0x493, (q15_t)0x48d, (q15_t)0x487,
+  (q15_t)0x480, (q15_t)0x47a, (q15_t)0x474, (q15_t)0x46d, (q15_t)0x467, (q15_t)0x461, (q15_t)0x45b, (q15_t)0x454,
+  (q15_t)0x44e, (q15_t)0x448, (q15_t)0x441, (q15_t)0x43b, (q15_t)0x435, (q15_t)0x42f, (q15_t)0x428, (q15_t)0x422,
+  (q15_t)0x41c, (q15_t)0x415, (q15_t)0x40f, (q15_t)0x409, (q15_t)0x403, (q15_t)0x3fc, (q15_t)0x3f6, (q15_t)0x3f0,
+  (q15_t)0x3ea, (q15_t)0x3e3, (q15_t)0x3dd, (q15_t)0x3d7, (q15_t)0x3d0, (q15_t)0x3ca, (q15_t)0x3c4, (q15_t)0x3be,
+  (q15_t)0x3b7, (q15_t)0x3b1, (q15_t)0x3ab, (q15_t)0x3a4, (q15_t)0x39e, (q15_t)0x398, (q15_t)0x392, (q15_t)0x38b,
+  (q15_t)0x385, (q15_t)0x37f, (q15_t)0x378, (q15_t)0x372, (q15_t)0x36c, (q15_t)0x366, (q15_t)0x35f, (q15_t)0x359,
+  (q15_t)0x353, (q15_t)0x34c, (q15_t)0x346, (q15_t)0x340, (q15_t)0x33a, (q15_t)0x333, (q15_t)0x32d, (q15_t)0x327,
+  (q15_t)0x321, (q15_t)0x31a, (q15_t)0x314, (q15_t)0x30e, (q15_t)0x307, (q15_t)0x301, (q15_t)0x2fb, (q15_t)0x2f5,
+  (q15_t)0x2ee, (q15_t)0x2e8, (q15_t)0x2e2, (q15_t)0x2db, (q15_t)0x2d5, (q15_t)0x2cf, (q15_t)0x2c9, (q15_t)0x2c2,
+  (q15_t)0x2bc, (q15_t)0x2b6, (q15_t)0x2af, (q15_t)0x2a9, (q15_t)0x2a3, (q15_t)0x29d, (q15_t)0x296, (q15_t)0x290,
+  (q15_t)0x28a, (q15_t)0x283, (q15_t)0x27d, (q15_t)0x277, (q15_t)0x271, (q15_t)0x26a, (q15_t)0x264, (q15_t)0x25e,
+  (q15_t)0x258, (q15_t)0x251, (q15_t)0x24b, (q15_t)0x245, (q15_t)0x23e, (q15_t)0x238, (q15_t)0x232, (q15_t)0x22c,
+  (q15_t)0x225, (q15_t)0x21f, (q15_t)0x219, (q15_t)0x212, (q15_t)0x20c, (q15_t)0x206, (q15_t)0x200, (q15_t)0x1f9,
+  (q15_t)0x1f3, (q15_t)0x1ed, (q15_t)0x1e6, (q15_t)0x1e0, (q15_t)0x1da, (q15_t)0x1d4, (q15_t)0x1cd, (q15_t)0x1c7,
+  (q15_t)0x1c1, (q15_t)0x1ba, (q15_t)0x1b4, (q15_t)0x1ae, (q15_t)0x1a8, (q15_t)0x1a1, (q15_t)0x19b, (q15_t)0x195,
+  (q15_t)0x18e, (q15_t)0x188, (q15_t)0x182, (q15_t)0x17c, (q15_t)0x175, (q15_t)0x16f, (q15_t)0x169, (q15_t)0x162,
+  (q15_t)0x15c, (q15_t)0x156, (q15_t)0x150, (q15_t)0x149, (q15_t)0x143, (q15_t)0x13d, (q15_t)0x137, (q15_t)0x130,
+  (q15_t)0x12a, (q15_t)0x124, (q15_t)0x11d, (q15_t)0x117, (q15_t)0x111, (q15_t)0x10b, (q15_t)0x104, (q15_t)0xfe,
+  (q15_t)0xf8, (q15_t)0xf1, (q15_t)0xeb, (q15_t)0xe5, (q15_t)0xdf, (q15_t)0xd8, (q15_t)0xd2, (q15_t)0xcc,
+  (q15_t)0xc5, (q15_t)0xbf, (q15_t)0xb9, (q15_t)0xb3, (q15_t)0xac, (q15_t)0xa6, (q15_t)0xa0, (q15_t)0x99,
+  (q15_t)0x93, (q15_t)0x8d, (q15_t)0x87, (q15_t)0x80, (q15_t)0x7a, (q15_t)0x74, (q15_t)0x6d, (q15_t)0x67,
+  (q15_t)0x61, (q15_t)0x5b, (q15_t)0x54, (q15_t)0x4e, (q15_t)0x48, (q15_t)0x41, (q15_t)0x3b, (q15_t)0x35,
+  (q15_t)0x2f, (q15_t)0x28, (q15_t)0x22, (q15_t)0x1c, (q15_t)0x15, (q15_t)0xf, (q15_t)0x9, (q15_t)0x3
+};
+  #endif
+
+/**
+  @par
+  Weights tables are generated using the formula : <pre>weights[n] = e^(-j*n*pi/(2*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for (i = 0; i< N; i++)
+  {
+    weights[(2*i)]   =  cos(i*c);
+    weights[(2*i)+1] = -sin(i*c);
+  } </pre>
+  @par
+  where <code>N</code> is the Number of weights to be calculated and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Convert the output to q31 format by multiplying with 2^31 and saturated if required.
+  @par
+  In the tables below the real and imaginary values are placed alternatively, hence the
+  array length is <code>2*N</code>.
+ */
+
+/**
+  @par
+  cosFactor tables are generated using the formula : <pre>cos_factors[n] = 2 * cos((2n+1)*pi/(4*N))</pre>
+  @par
+  C command to generate the table
+  <pre>
+  for (i = 0; i< N; i++)
+  {
+    cos_factors[i] = 2 * cos((2*i+1)*c/2);
+  } </pre>
+  @par
+  where <code>N</code> is the number of factors to generate and <code>c</code> is <code>pi/(2*N)</code>
+  @par
+  Then converted to q31 format by multiplying with 2^31 and saturated if required.
+*/
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)  
+    const q31_t WeightsQ31_128[256] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f872bf3, (q31_t)0xf50497fb,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7dd6668f, (q31_t)0xe8922622,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7c894bde, (q31_t)0xe26cb01b,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7aef6323, (q31_t)0xdc597781,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x7909a92d, (q31_t)0xd65c3b7b,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x76d94989, (q31_t)0xd078ad9e,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x745f9dd1, (q31_t)0xcab26fa9,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x719e2cd2, (q31_t)0xc50d1149,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6b4af279, (q31_t)0xba32ca71,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x67bd0fbd, (q31_t)0xb5049368,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x63ef3290, (q31_t)0xb0049ab3,
+  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5b9d1154, (q31_t)0xa69b9b68,
+  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x571deefa, (q31_t)0xa2386284,
+  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x5269126e, (q31_t)0x9e0effc1,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4d8162c4, (q31_t)0x9a22042d,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4869e665, (q31_t)0x9673db94,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4325c135, (q31_t)0x9306cb04,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3db832a6, (q31_t)0x8fdcef66,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x382493b0, (q31_t)0x8cf83c30,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x326e54c7, (q31_t)0x8a5a7a31,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2c98fbba, (q31_t)0x88054677,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x26a82186, (q31_t)0x85fa1153,
+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x209f701c, (q31_t)0x843a1d70,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1a82a026, (q31_t)0x82c67f14,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x145576b1, (q31_t)0x81a01b6d,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a,
+  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x07d95b9e, (q31_t)0x803daa6a,
+  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x01921d20, (q31_t)0x800277a6
+};
+    const q31_t cos_factorsQ31_128[128] = {
+  (q31_t)0x7fff6216, (q31_t)0x7ffa72d1, (q31_t)0x7ff09478, (q31_t)0x7fe1c76b, (q31_t)0x7fce0c3e, (q31_t)0x7fb563b3,
+  (q31_t)0x7f97cebd, (q31_t)0x7f754e80,
+  (q31_t)0x7f4de451, (q31_t)0x7f2191b4, (q31_t)0x7ef05860, (q31_t)0x7eba3a39, (q31_t)0x7e7f3957, (q31_t)0x7e3f57ff,
+  (q31_t)0x7dfa98a8, (q31_t)0x7db0fdf8,
+  (q31_t)0x7d628ac6, (q31_t)0x7d0f4218, (q31_t)0x7cb72724, (q31_t)0x7c5a3d50, (q31_t)0x7bf88830, (q31_t)0x7b920b89,
+  (q31_t)0x7b26cb4f, (q31_t)0x7ab6cba4,
+  (q31_t)0x7a4210d8, (q31_t)0x79c89f6e, (q31_t)0x794a7c12, (q31_t)0x78c7aba2, (q31_t)0x78403329, (q31_t)0x77b417df,
+  (q31_t)0x77235f2d, (q31_t)0x768e0ea6,
+  (q31_t)0x75f42c0b, (q31_t)0x7555bd4c, (q31_t)0x74b2c884, (q31_t)0x740b53fb, (q31_t)0x735f6626, (q31_t)0x72af05a7,
+  (q31_t)0x71fa3949, (q31_t)0x71410805,
+  (q31_t)0x708378ff, (q31_t)0x6fc19385, (q31_t)0x6efb5f12, (q31_t)0x6e30e34a, (q31_t)0x6d6227fa, (q31_t)0x6c8f351c,
+  (q31_t)0x6bb812d1, (q31_t)0x6adcc964,
+  (q31_t)0x69fd614a, (q31_t)0x6919e320, (q31_t)0x683257ab, (q31_t)0x6746c7d8, (q31_t)0x66573cbb, (q31_t)0x6563bf92,
+  (q31_t)0x646c59bf, (q31_t)0x637114cc,
+  (q31_t)0x6271fa69, (q31_t)0x616f146c, (q31_t)0x60686ccf, (q31_t)0x5f5e0db3, (q31_t)0x5e50015d, (q31_t)0x5d3e5237,
+  (q31_t)0x5c290acc, (q31_t)0x5b1035cf,
+  (q31_t)0x59f3de12, (q31_t)0x58d40e8c, (q31_t)0x57b0d256, (q31_t)0x568a34a9, (q31_t)0x556040e2, (q31_t)0x5433027d,
+  (q31_t)0x53028518, (q31_t)0x51ced46e,
+  (q31_t)0x5097fc5e, (q31_t)0x4f5e08e3, (q31_t)0x4e210617, (q31_t)0x4ce10034, (q31_t)0x4b9e0390, (q31_t)0x4a581c9e,
+  (q31_t)0x490f57ee, (q31_t)0x47c3c22f,
+  (q31_t)0x46756828, (q31_t)0x452456bd, (q31_t)0x43d09aed, (q31_t)0x427a41d0, (q31_t)0x4121589b, (q31_t)0x3fc5ec98,
+  (q31_t)0x3e680b2c, (q31_t)0x3d07c1d6,
+  (q31_t)0x3ba51e29, (q31_t)0x3a402dd2, (q31_t)0x38d8fe93, (q31_t)0x376f9e46, (q31_t)0x36041ad9, (q31_t)0x34968250,
+  (q31_t)0x3326e2c3, (q31_t)0x31b54a5e,
+  (q31_t)0x3041c761, (q31_t)0x2ecc681e, (q31_t)0x2d553afc, (q31_t)0x2bdc4e6f, (q31_t)0x2a61b101, (q31_t)0x28e5714b,
+  (q31_t)0x27679df4, (q31_t)0x25e845b6,
+  (q31_t)0x24677758, (q31_t)0x22e541af, (q31_t)0x2161b3a0, (q31_t)0x1fdcdc1b, (q31_t)0x1e56ca1e, (q31_t)0x1ccf8cb3,
+  (q31_t)0x1b4732ef, (q31_t)0x19bdcbf3,
+  (q31_t)0x183366e9, (q31_t)0x16a81305, (q31_t)0x151bdf86, (q31_t)0x138edbb1, (q31_t)0x120116d5, (q31_t)0x1072a048,
+  (q31_t)0xee38766, (q31_t)0xd53db92,
+  (q31_t)0xbc3ac35, (q31_t)0xa3308bd, (q31_t)0x8a2009a, (q31_t)0x710a345, (q31_t)0x57f0035, (q31_t)0x3ed26e6, (q31_t)0x25b26d7,
+  (q31_t)0xc90f88
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512) 
+    const q31_t WeightsQ31_512[1024] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff871a2, (q31_t)0xfd40565c,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fed5791, (q31_t)0xfbae5e89,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fc85854, (q31_t)0xf88afe42,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f434563, (q31_t)0xf2482c8a,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7ee34636, (q31_t)0xef29b243,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eabef2c, (q31_t)0xed9b66b2,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7de8a670, (q31_t)0xe8f50273,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c4242f2, (q31_t)0xe14794ba,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b77ada8, (q31_t)0xde3d4964,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a24256f, (q31_t)0xd9b7c094,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79a98715, (q31_t)0xd838c82d,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x792a37fe, (q31_t)0xd6bb585e,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78a63d11, (q31_t)0xd53f7fda,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x781d9b65, (q31_t)0xd3c54d47,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x7790583e, (q31_t)0xd24ccf39,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x76fe790e, (q31_t)0xd0d61434,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x76680376, (q31_t)0xcf612aaa,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ccfd42, (q31_t)0xcdee20fc,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x752d6c6c, (q31_t)0xcc7d0578,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x7489571c, (q31_t)0xcb0de658,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x7333b883, (q31_t)0xc835d5d0,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72823c67, (q31_t)0xc6cd0079,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71cc5626, (q31_t)0xc5665fa9,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71120cc5, (q31_t)0xc4020133,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70536771, (q31_t)0xc29ff2d4,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6f906d84, (q31_t)0xc1404233,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd,
+  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6b81a3cd, (q31_t)0xba87246d,
+  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6aa551e9, (q31_t)0xb936bfa4,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69c4e37a, (q31_t)0xb7e9157a,
+  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x68e06129, (q31_t)0xb69e32cd,
+  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x67f7d3c5, (q31_t)0xb556245e,
+  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x670b4444, (q31_t)0xb410f6d3,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5,
+  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x6526438f, (q31_t)0xb18f7071,
+  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x642de50d, (q31_t)0xb0533055,
+  (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x6331a9d4, (q31_t)0xaf1a0293,
+  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x62319b9d, (q31_t)0xade3f33e,
+  (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x612dc447, (q31_t)0xacb10e4b,
+  (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x60262dd6, (q31_t)0xab815f8d,
+  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e0bec6e, (q31_t)0xa92bd367,
+  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5cf95638, (q31_t)0xa8060d08,
+  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2,
+  (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5ac973b5, (q31_t)0xa5c4b855,
+  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59ac3cfd, (q31_t)0xa4a94043,
+  (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x588b9140, (q31_t)0xa3914da8,
+  (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x57677b9d, (q31_t)0xa27ceb4f,
+  (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x56400758, (q31_t)0xa16c23e1,
+  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x55153fd4, (q31_t)0xa05f01e1,
+  (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x53e73097, (q31_t)0x9f558fb0,
+  (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52b5e546, (q31_t)0x9e4fd78a,
+  (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x518169a5, (q31_t)0x9d4de385,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x5049c999, (q31_t)0x9c4fbd93,
+  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f0f1126, (q31_t)0x9b556f81,
+  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5,
+  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4c9087b1, (q31_t)0x996c816f,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b4ccf4d, (q31_t)0x987df449,
+  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a062fbd, (q31_t)0x979364b5,
+  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48bcb599, (q31_t)0x96acdbbe,
+  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47706d93, (q31_t)0x95ca6247,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x4621647d, (q31_t)0x94ec010b,
+  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x44cfa740, (q31_t)0x9411c09e,
+  (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x437b42e1, (q31_t)0x933ba968,
+  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x42244481, (q31_t)0x9269c3ac,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x40cab958, (q31_t)0x919c1781,
+  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4,
+  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e10320d, (q31_t)0x900d8b69,
+  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3caf50da, (q31_t)0x8f4cbadb,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b4c18ba, (q31_t)0x8e904298,
+  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x39e6975e, (q31_t)0x8dd829e4,
+  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x387eda8e, (q31_t)0x8d2477d8,
+  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3714f02a, (q31_t)0x8c753362,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35a8e625, (q31_t)0x8bca6343,
+  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x343aca87, (q31_t)0x8b240e11,
+  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x32caab6f, (q31_t)0x8a823a36,
+  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x3158970e, (q31_t)0x89e4edef,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c,
+  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2e6ec792, (q31_t)0x88b80432,
+  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2cf72939, (q31_t)0x88287256,
+  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2b7dcf17, (q31_t)0x879d7f41,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a02c7b8, (q31_t)0x8717304e,
+  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x288621b9, (q31_t)0x86958aac,
+  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2707ebc7, (q31_t)0x86189359,
+  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x2588349d, (q31_t)0x85a04f28,
+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x24070b08, (q31_t)0x852cc2bb,
+  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22847de0, (q31_t)0x84bdf286,
+  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21009c0c, (q31_t)0x8453e2cf,
+  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1f7b7481, (q31_t)0x83ee97ad,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1df5163f, (q31_t)0x838e1507,
+  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1c6d9053, (q31_t)0x83325e97,
+  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5,
+  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x195b49ea, (q31_t)0x8289644b,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x17d0a7bc, (q31_t)0x823c26f3,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16451a83, (q31_t)0x81f3c2d7,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x14b8b17f, (q31_t)0x81b03ac2,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x132b7bf9, (q31_t)0x8171914e,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x119d8941, (q31_t)0x8137c8e6,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x100ee8ad, (q31_t)0x8102e3c4,
+  (q31_t)0x0fab272b, (q31_t)0x80f66e3c, (q31_t)0x0f475bff, (q31_t)0x80ea4712, (q31_t)0x0ee38766, (q31_t)0x80de6e4c, (q31_t)0x0e7fa99e, (q31_t)0x80d2e3f2,
+  (q31_t)0x0e1bc2e4, (q31_t)0x80c7a80a, (q31_t)0x0db7d376, (q31_t)0x80bcba9d, (q31_t)0x0d53db92, (q31_t)0x80b21baf, (q31_t)0x0cefdb76, (q31_t)0x80a7cb49,
+  (q31_t)0x0c8bd35e, (q31_t)0x809dc971, (q31_t)0x0c27c389, (q31_t)0x8094162c, (q31_t)0x0bc3ac35, (q31_t)0x808ab180, (q31_t)0x0b5f8d9f, (q31_t)0x80819b74,
+  (q31_t)0x0afb6805, (q31_t)0x8078d40d, (q31_t)0x0a973ba5, (q31_t)0x80705b50, (q31_t)0x0a3308bd, (q31_t)0x80683143, (q31_t)0x09cecf89, (q31_t)0x806055eb,
+  (q31_t)0x096a9049, (q31_t)0x8058c94c, (q31_t)0x09064b3a, (q31_t)0x80518b6b, (q31_t)0x08a2009a, (q31_t)0x804a9c4d, (q31_t)0x083db0a7, (q31_t)0x8043fbf6,
+  (q31_t)0x07d95b9e, (q31_t)0x803daa6a, (q31_t)0x077501be, (q31_t)0x8037a7ac, (q31_t)0x0710a345, (q31_t)0x8031f3c2, (q31_t)0x06ac406f, (q31_t)0x802c8ead,
+  (q31_t)0x0647d97c, (q31_t)0x80277872, (q31_t)0x05e36ea9, (q31_t)0x8022b114, (q31_t)0x057f0035, (q31_t)0x801e3895, (q31_t)0x051a8e5c, (q31_t)0x801a0ef8,
+  (q31_t)0x04b6195d, (q31_t)0x80163440, (q31_t)0x0451a177, (q31_t)0x8012a86f, (q31_t)0x03ed26e6, (q31_t)0x800f6b88, (q31_t)0x0388a9ea, (q31_t)0x800c7d8c,
+  (q31_t)0x03242abf, (q31_t)0x8009de7e, (q31_t)0x02bfa9a4, (q31_t)0x80078e5e, (q31_t)0x025b26d7, (q31_t)0x80058d2f, (q31_t)0x01f6a297, (q31_t)0x8003daf1,
+  (q31_t)0x01921d20, (q31_t)0x800277a6, (q31_t)0x012d96b1, (q31_t)0x8001634e, (q31_t)0x00c90f88, (q31_t)0x80009dea, (q31_t)0x006487e3, (q31_t)0x8000277a
+};
+    const q31_t cos_factorsQ31_512[512] = {
+  (q31_t)0x7ffff621, (q31_t)0x7fffa72c, (q31_t)0x7fff0943, (q31_t)0x7ffe1c65, (q31_t)0x7ffce093, (q31_t)0x7ffb55ce,
+  (q31_t)0x7ff97c18, (q31_t)0x7ff75370,
+  (q31_t)0x7ff4dbd9, (q31_t)0x7ff21553, (q31_t)0x7feeffe1, (q31_t)0x7feb9b85, (q31_t)0x7fe7e841, (q31_t)0x7fe3e616,
+  (q31_t)0x7fdf9508, (q31_t)0x7fdaf519,
+  (q31_t)0x7fd6064c, (q31_t)0x7fd0c8a3, (q31_t)0x7fcb3c23, (q31_t)0x7fc560cf, (q31_t)0x7fbf36aa, (q31_t)0x7fb8bdb8,
+  (q31_t)0x7fb1f5fc, (q31_t)0x7faadf7c,
+  (q31_t)0x7fa37a3c, (q31_t)0x7f9bc640, (q31_t)0x7f93c38c, (q31_t)0x7f8b7227, (q31_t)0x7f82d214, (q31_t)0x7f79e35a,
+  (q31_t)0x7f70a5fe, (q31_t)0x7f671a05,
+  (q31_t)0x7f5d3f75, (q31_t)0x7f531655, (q31_t)0x7f489eaa, (q31_t)0x7f3dd87c, (q31_t)0x7f32c3d1, (q31_t)0x7f2760af,
+  (q31_t)0x7f1baf1e, (q31_t)0x7f0faf25,
+  (q31_t)0x7f0360cb, (q31_t)0x7ef6c418, (q31_t)0x7ee9d914, (q31_t)0x7edc9fc6, (q31_t)0x7ecf1837, (q31_t)0x7ec14270,
+  (q31_t)0x7eb31e78, (q31_t)0x7ea4ac58,
+  (q31_t)0x7e95ec1a, (q31_t)0x7e86ddc6, (q31_t)0x7e778166, (q31_t)0x7e67d703, (q31_t)0x7e57dea7, (q31_t)0x7e47985b,
+  (q31_t)0x7e37042a, (q31_t)0x7e26221f,
+  (q31_t)0x7e14f242, (q31_t)0x7e0374a0, (q31_t)0x7df1a942, (q31_t)0x7ddf9034, (q31_t)0x7dcd2981, (q31_t)0x7dba7534,
+  (q31_t)0x7da77359, (q31_t)0x7d9423fc,
+  (q31_t)0x7d808728, (q31_t)0x7d6c9ce9, (q31_t)0x7d58654d, (q31_t)0x7d43e05e, (q31_t)0x7d2f0e2b, (q31_t)0x7d19eebf,
+  (q31_t)0x7d048228, (q31_t)0x7ceec873,
+  (q31_t)0x7cd8c1ae, (q31_t)0x7cc26de5, (q31_t)0x7cabcd28, (q31_t)0x7c94df83, (q31_t)0x7c7da505, (q31_t)0x7c661dbc,
+  (q31_t)0x7c4e49b7, (q31_t)0x7c362904,
+  (q31_t)0x7c1dbbb3, (q31_t)0x7c0501d2, (q31_t)0x7bebfb70, (q31_t)0x7bd2a89e, (q31_t)0x7bb9096b, (q31_t)0x7b9f1de6,
+  (q31_t)0x7b84e61f, (q31_t)0x7b6a6227,
+  (q31_t)0x7b4f920e, (q31_t)0x7b3475e5, (q31_t)0x7b190dbc, (q31_t)0x7afd59a4, (q31_t)0x7ae159ae, (q31_t)0x7ac50dec,
+  (q31_t)0x7aa8766f, (q31_t)0x7a8b9348,
+  (q31_t)0x7a6e648a, (q31_t)0x7a50ea47, (q31_t)0x7a332490, (q31_t)0x7a151378, (q31_t)0x79f6b711, (q31_t)0x79d80f6f,
+  (q31_t)0x79b91ca4, (q31_t)0x7999dec4,
+  (q31_t)0x797a55e0, (q31_t)0x795a820e, (q31_t)0x793a6361, (q31_t)0x7919f9ec, (q31_t)0x78f945c3, (q31_t)0x78d846fb,
+  (q31_t)0x78b6fda8, (q31_t)0x789569df,
+  (q31_t)0x78738bb3, (q31_t)0x7851633b, (q31_t)0x782ef08b, (q31_t)0x780c33b8, (q31_t)0x77e92cd9, (q31_t)0x77c5dc01,
+  (q31_t)0x77a24148, (q31_t)0x777e5cc3,
+  (q31_t)0x775a2e89, (q31_t)0x7735b6af, (q31_t)0x7710f54c, (q31_t)0x76ebea77, (q31_t)0x76c69647, (q31_t)0x76a0f8d2,
+  (q31_t)0x767b1231, (q31_t)0x7654e279,
+  (q31_t)0x762e69c4, (q31_t)0x7607a828, (q31_t)0x75e09dbd, (q31_t)0x75b94a9c, (q31_t)0x7591aedd, (q31_t)0x7569ca99,
+  (q31_t)0x75419de7, (q31_t)0x751928e0,
+  (q31_t)0x74f06b9e, (q31_t)0x74c7663a, (q31_t)0x749e18cd, (q31_t)0x74748371, (q31_t)0x744aa63f, (q31_t)0x74208150,
+  (q31_t)0x73f614c0, (q31_t)0x73cb60a8,
+  (q31_t)0x73a06522, (q31_t)0x73752249, (q31_t)0x73499838, (q31_t)0x731dc70a, (q31_t)0x72f1aed9, (q31_t)0x72c54fc1,
+  (q31_t)0x7298a9dd, (q31_t)0x726bbd48,
+  (q31_t)0x723e8a20, (q31_t)0x7211107e, (q31_t)0x71e35080, (q31_t)0x71b54a41, (q31_t)0x7186fdde, (q31_t)0x71586b74,
+  (q31_t)0x7129931f, (q31_t)0x70fa74fc,
+  (q31_t)0x70cb1128, (q31_t)0x709b67c0, (q31_t)0x706b78e3, (q31_t)0x703b44ad, (q31_t)0x700acb3c, (q31_t)0x6fda0cae,
+  (q31_t)0x6fa90921, (q31_t)0x6f77c0b3,
+  (q31_t)0x6f463383, (q31_t)0x6f1461b0, (q31_t)0x6ee24b57, (q31_t)0x6eaff099, (q31_t)0x6e7d5193, (q31_t)0x6e4a6e66,
+  (q31_t)0x6e174730, (q31_t)0x6de3dc11,
+  (q31_t)0x6db02d29, (q31_t)0x6d7c3a98, (q31_t)0x6d48047e, (q31_t)0x6d138afb, (q31_t)0x6cdece2f, (q31_t)0x6ca9ce3b,
+  (q31_t)0x6c748b3f, (q31_t)0x6c3f055d,
+  (q31_t)0x6c093cb6, (q31_t)0x6bd3316a, (q31_t)0x6b9ce39b, (q31_t)0x6b66536b, (q31_t)0x6b2f80fb, (q31_t)0x6af86c6c,
+  (q31_t)0x6ac115e2, (q31_t)0x6a897d7d,
+  (q31_t)0x6a51a361, (q31_t)0x6a1987b0, (q31_t)0x69e12a8c, (q31_t)0x69a88c19, (q31_t)0x696fac78, (q31_t)0x69368bce,
+  (q31_t)0x68fd2a3d, (q31_t)0x68c387e9,
+  (q31_t)0x6889a4f6, (q31_t)0x684f8186, (q31_t)0x68151dbe, (q31_t)0x67da79c3, (q31_t)0x679f95b7, (q31_t)0x676471c0,
+  (q31_t)0x67290e02, (q31_t)0x66ed6aa1,
+  (q31_t)0x66b187c3, (q31_t)0x6675658c, (q31_t)0x66390422, (q31_t)0x65fc63a9, (q31_t)0x65bf8447, (q31_t)0x65826622,
+  (q31_t)0x6545095f, (q31_t)0x65076e25,
+  (q31_t)0x64c99498, (q31_t)0x648b7ce0, (q31_t)0x644d2722, (q31_t)0x640e9386, (q31_t)0x63cfc231, (q31_t)0x6390b34a,
+  (q31_t)0x635166f9, (q31_t)0x6311dd64,
+  (q31_t)0x62d216b3, (q31_t)0x6292130c, (q31_t)0x6251d298, (q31_t)0x6211557e, (q31_t)0x61d09be5, (q31_t)0x618fa5f7,
+  (q31_t)0x614e73da, (q31_t)0x610d05b7,
+  (q31_t)0x60cb5bb7, (q31_t)0x60897601, (q31_t)0x604754bf, (q31_t)0x6004f819, (q31_t)0x5fc26038, (q31_t)0x5f7f8d46,
+  (q31_t)0x5f3c7f6b, (q31_t)0x5ef936d1,
+  (q31_t)0x5eb5b3a2, (q31_t)0x5e71f606, (q31_t)0x5e2dfe29, (q31_t)0x5de9cc33, (q31_t)0x5da5604f, (q31_t)0x5d60baa7,
+  (q31_t)0x5d1bdb65, (q31_t)0x5cd6c2b5,
+  (q31_t)0x5c9170bf, (q31_t)0x5c4be5b0, (q31_t)0x5c0621b2, (q31_t)0x5bc024f0, (q31_t)0x5b79ef96, (q31_t)0x5b3381ce,
+  (q31_t)0x5aecdbc5, (q31_t)0x5aa5fda5,
+  (q31_t)0x5a5ee79a, (q31_t)0x5a1799d1, (q31_t)0x59d01475, (q31_t)0x598857b2, (q31_t)0x594063b5, (q31_t)0x58f838a9,
+  (q31_t)0x58afd6bd, (q31_t)0x58673e1b,
+  (q31_t)0x581e6ef1, (q31_t)0x57d5696d, (q31_t)0x578c2dba, (q31_t)0x5742bc06, (q31_t)0x56f9147e, (q31_t)0x56af3750,
+  (q31_t)0x566524aa, (q31_t)0x561adcb9,
+  (q31_t)0x55d05faa, (q31_t)0x5585adad, (q31_t)0x553ac6ee, (q31_t)0x54efab9c, (q31_t)0x54a45be6, (q31_t)0x5458d7f9,
+  (q31_t)0x540d2005, (q31_t)0x53c13439,
+  (q31_t)0x537514c2, (q31_t)0x5328c1d0, (q31_t)0x52dc3b92, (q31_t)0x528f8238, (q31_t)0x524295f0, (q31_t)0x51f576ea,
+  (q31_t)0x51a82555, (q31_t)0x515aa162,
+  (q31_t)0x510ceb40, (q31_t)0x50bf031f, (q31_t)0x5070e92f, (q31_t)0x50229da1, (q31_t)0x4fd420a4, (q31_t)0x4f857269,
+  (q31_t)0x4f369320, (q31_t)0x4ee782fb,
+  (q31_t)0x4e984229, (q31_t)0x4e48d0dd, (q31_t)0x4df92f46, (q31_t)0x4da95d96, (q31_t)0x4d595bfe, (q31_t)0x4d092ab0,
+  (q31_t)0x4cb8c9dd, (q31_t)0x4c6839b7,
+  (q31_t)0x4c177a6e, (q31_t)0x4bc68c36, (q31_t)0x4b756f40, (q31_t)0x4b2423be, (q31_t)0x4ad2a9e2, (q31_t)0x4a8101de,
+  (q31_t)0x4a2f2be6, (q31_t)0x49dd282a,
+  (q31_t)0x498af6df, (q31_t)0x49389836, (q31_t)0x48e60c62, (q31_t)0x48935397, (q31_t)0x48406e08, (q31_t)0x47ed5be6,
+  (q31_t)0x479a1d67, (q31_t)0x4746b2bc,
+  (q31_t)0x46f31c1a, (q31_t)0x469f59b4, (q31_t)0x464b6bbe, (q31_t)0x45f7526b, (q31_t)0x45a30df0, (q31_t)0x454e9e80,
+  (q31_t)0x44fa0450, (q31_t)0x44a53f93,
+  (q31_t)0x4450507e, (q31_t)0x43fb3746, (q31_t)0x43a5f41e, (q31_t)0x4350873c, (q31_t)0x42faf0d4, (q31_t)0x42a5311b,
+  (q31_t)0x424f4845, (q31_t)0x41f93689,
+  (q31_t)0x41a2fc1a, (q31_t)0x414c992f, (q31_t)0x40f60dfb, (q31_t)0x409f5ab6, (q31_t)0x40487f94, (q31_t)0x3ff17cca,
+  (q31_t)0x3f9a5290, (q31_t)0x3f430119,
+  (q31_t)0x3eeb889c, (q31_t)0x3e93e950, (q31_t)0x3e3c2369, (q31_t)0x3de4371f, (q31_t)0x3d8c24a8, (q31_t)0x3d33ec39,
+  (q31_t)0x3cdb8e09, (q31_t)0x3c830a50,
+  (q31_t)0x3c2a6142, (q31_t)0x3bd19318, (q31_t)0x3b78a007, (q31_t)0x3b1f8848, (q31_t)0x3ac64c0f, (q31_t)0x3a6ceb96,
+  (q31_t)0x3a136712, (q31_t)0x39b9bebc,
+  (q31_t)0x395ff2c9, (q31_t)0x39060373, (q31_t)0x38abf0ef, (q31_t)0x3851bb77, (q31_t)0x37f76341, (q31_t)0x379ce885,
+  (q31_t)0x37424b7b, (q31_t)0x36e78c5b,
+  (q31_t)0x368cab5c, (q31_t)0x3631a8b8, (q31_t)0x35d684a6, (q31_t)0x357b3f5d, (q31_t)0x351fd918, (q31_t)0x34c4520d,
+  (q31_t)0x3468aa76, (q31_t)0x340ce28b,
+  (q31_t)0x33b0fa84, (q31_t)0x3354f29b, (q31_t)0x32f8cb07, (q31_t)0x329c8402, (q31_t)0x32401dc6, (q31_t)0x31e39889,
+  (q31_t)0x3186f487, (q31_t)0x312a31f8,
+  (q31_t)0x30cd5115, (q31_t)0x30705217, (q31_t)0x30133539, (q31_t)0x2fb5fab2, (q31_t)0x2f58a2be, (q31_t)0x2efb2d95,
+  (q31_t)0x2e9d9b70, (q31_t)0x2e3fec8b,
+  (q31_t)0x2de2211e, (q31_t)0x2d843964, (q31_t)0x2d263596, (q31_t)0x2cc815ee, (q31_t)0x2c69daa6, (q31_t)0x2c0b83fa,
+  (q31_t)0x2bad1221, (q31_t)0x2b4e8558,
+  (q31_t)0x2aefddd8, (q31_t)0x2a911bdc, (q31_t)0x2a323f9e, (q31_t)0x29d34958, (q31_t)0x29743946, (q31_t)0x29150fa1,
+  (q31_t)0x28b5cca5, (q31_t)0x2856708d,
+  (q31_t)0x27f6fb92, (q31_t)0x27976df1, (q31_t)0x2737c7e3, (q31_t)0x26d809a5, (q31_t)0x26783370, (q31_t)0x26184581,
+  (q31_t)0x25b84012, (q31_t)0x2558235f,
+  (q31_t)0x24f7efa2, (q31_t)0x2497a517, (q31_t)0x243743fa, (q31_t)0x23d6cc87, (q31_t)0x23763ef7, (q31_t)0x23159b88,
+  (q31_t)0x22b4e274, (q31_t)0x225413f8,
+  (q31_t)0x21f3304f, (q31_t)0x219237b5, (q31_t)0x21312a65, (q31_t)0x20d0089c, (q31_t)0x206ed295, (q31_t)0x200d888d,
+  (q31_t)0x1fac2abf, (q31_t)0x1f4ab968,
+  (q31_t)0x1ee934c3, (q31_t)0x1e879d0d, (q31_t)0x1e25f282, (q31_t)0x1dc4355e, (q31_t)0x1d6265dd, (q31_t)0x1d00843d,
+  (q31_t)0x1c9e90b8, (q31_t)0x1c3c8b8c,
+  (q31_t)0x1bda74f6, (q31_t)0x1b784d30, (q31_t)0x1b161479, (q31_t)0x1ab3cb0d, (q31_t)0x1a517128, (q31_t)0x19ef0707,
+  (q31_t)0x198c8ce7, (q31_t)0x192a0304,
+  (q31_t)0x18c7699b, (q31_t)0x1864c0ea, (q31_t)0x1802092c, (q31_t)0x179f429f, (q31_t)0x173c6d80, (q31_t)0x16d98a0c,
+  (q31_t)0x1676987f, (q31_t)0x16139918,
+  (q31_t)0x15b08c12, (q31_t)0x154d71aa, (q31_t)0x14ea4a1f, (q31_t)0x148715ae, (q31_t)0x1423d492, (q31_t)0x13c0870a,
+  (q31_t)0x135d2d53, (q31_t)0x12f9c7aa,
+  (q31_t)0x1296564d, (q31_t)0x1232d979, (q31_t)0x11cf516a, (q31_t)0x116bbe60, (q31_t)0x11082096, (q31_t)0x10a4784b,
+  (q31_t)0x1040c5bb, (q31_t)0xfdd0926,
+  (q31_t)0xf7942c7, (q31_t)0xf1572dc, (q31_t)0xeb199a4, (q31_t)0xe4db75b, (q31_t)0xde9cc40, (q31_t)0xd85d88f, (q31_t)0xd21dc87,
+  (q31_t)0xcbdd865,
+  (q31_t)0xc59cc68, (q31_t)0xbf5b8cb, (q31_t)0xb919dcf, (q31_t)0xb2d7baf, (q31_t)0xac952aa, (q31_t)0xa6522fe, (q31_t)0xa00ece8,
+  (q31_t)0x99cb0a7,
+  (q31_t)0x9386e78, (q31_t)0x8d42699, (q31_t)0x86fd947, (q31_t)0x80b86c2, (q31_t)0x7a72f45, (q31_t)0x742d311, (q31_t)0x6de7262,
+  (q31_t)0x67a0d76,
+  (q31_t)0x615a48b, (q31_t)0x5b137df, (q31_t)0x54cc7b1, (q31_t)0x4e8543e, (q31_t)0x483ddc3, (q31_t)0x41f6480, (q31_t)0x3bae8b2,
+  (q31_t)0x3566a96,
+  (q31_t)0x2f1ea6c, (q31_t)0x28d6870, (q31_t)0x228e4e2, (q31_t)0x1c45ffe, (q31_t)0x15fda03, (q31_t)0xfb5330, (q31_t)0x96cbc1,
+  (q31_t)0x3243f5
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048) 
+    const q31_t WeightsQ31_2048[4096] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7fffe9cb, (q31_t)0xffb49a12,
+  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff8719, (q31_t)0xff501258,
+  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a,
+  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffdd4d7, (q31_t)0xfe870467,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffc8549, (q31_t)0xfe227eac,
+  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18,
+  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff8f954, (q31_t)0xfd5976e9,
+  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4319d, (q31_t)0xfc9075af,
+  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1575d, (q31_t)0xfc2bf821,
+  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0,
+  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feab61a, (q31_t)0xfb630459,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b,
+  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3,
+  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fde7471, (q31_t)0xfa35ac9f,
+  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed,
+  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fcf6ce8, (q31_t)0xf908750a,
+  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574,
+  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc3dda9, (q31_t)0xf83fba68,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423,
+  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb7132b, (q31_t)0xf77712e5,
+  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb037bf, (q31_t)0xf712c6ea,
+  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8,
+  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc,
+  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f91b694, (q31_t)0xf581d07b,
+  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f895182, (q31_t)0xf51da273,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f809dc5, (q31_t)0xf4b97b21,
+  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f779b62, (q31_t)0xf4555ac5,
+  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a,
+  (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5abc8a, (q31_t)0xf32925d3,
+  (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1, (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f507fc7, (q31_t)0xf2c523b2,
+  (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f45f47b, (q31_t)0xf26129ba,
+  (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f409164, (q31_t)0xf22f2fe1, (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f2ff263, (q31_t)0xf1994f3d,
+  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f247ba5, (q31_t)0xf1356f32,
+  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f18b679, (q31_t)0xf0d19848,
+  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f0040f6, (q31_t)0xf00a06c8,
+  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef390ae, (q31_t)0xefa64cae,
+  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee69217, (q31_t)0xef429caa,
+  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7ed94538, (q31_t)0xeedef6f9,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9,
+  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88,
+  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eaf8943, (q31_t)0xedb44642,
+  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea1039b, (q31_t)0xed50cc46,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e922fd6, (q31_t)0xeced5dd0,
+  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e830dff, (q31_t)0xec89fb1e,
+  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e739e1d, (q31_t)0xec26a46d,
+  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e63e03b, (q31_t)0xebc359fb,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e53d462, (q31_t)0xeb601c04,
+  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e437a9c, (q31_t)0xeafceac6,
+  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e32d2f4, (q31_t)0xea99c67e,
+  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e21dd73, (q31_t)0xea36af69,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5,
+  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7dff0911, (q31_t)0xe970a9ce,
+  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2,
+  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7ddafdce, (q31_t)0xe8aadbde,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dc883b4, (q31_t)0xe8480a5d,
+  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db5bc02, (q31_t)0xe7e5477f,
+  (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da2a6c6, (q31_t)0xe782937e,
+  (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d8f4409, (q31_t)0xe71fee99,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7b93da, (q31_t)0xe6bd590d,
+  (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d679642, (q31_t)0xe65ad315,
+  (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d534b50, (q31_t)0xe5f85cef,
+  (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d29cd8c, (q31_t)0xe533a10a,
+  (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6,
+  (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7cff1af5, (q31_t)0xe46f2745,
+  (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd333f3, (q31_t)0xe3aaf184,
+  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cbcccec, (q31_t)0xe348f0bd,
+  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7ca618f3, (q31_t)0xe2e701ac,
+  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c8f1817, (q31_t)0xe285248d,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c77ca65, (q31_t)0xe223599e,
+  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c602fec, (q31_t)0xe1c1a11b,
+  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f,
+  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c3014de, (q31_t)0xe0fe6848,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c179467, (q31_t)0xe09ce871,
+  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7bfec765, (q31_t)0xe03b7bf6,
+  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7be5ade6, (q31_t)0xdfda2314,
+  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bcc47fa, (q31_t)0xdf78de07,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a,
+  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b989719, (q31_t)0xdeb69059,
+  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b7e4c45, (q31_t)0xde558831,
+  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b63b543, (q31_t)0xddf494ce,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b48d225, (q31_t)0xdd93b66a,
+  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43,
+  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1227d3, (q31_t)0xdcd23993,
+  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7af660c2, (q31_t)0xdc719b96,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7ada4dd8, (q31_t)0xdc111388,
+  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4,
+  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa144bc, (q31_t)0xdb504626,
+  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a844eae, (q31_t)0xdaf00149,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a670d0d, (q31_t)0xda8fd349,
+  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a497feb, (q31_t)0xda2fbc61,
+  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd,
+  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79ef1436, (q31_t)0xd910048a,
+  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d059c8, (q31_t)0xd8b04c52,
+  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b15435, (q31_t)0xd850ac5a,
+  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x79920392, (q31_t)0xd7f124dd,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x797267f2, (q31_t)0xd791b616,
+  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79528167, (q31_t)0xd732603f,
+  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79325006, (q31_t)0xd6d32393,
+  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7911d3e2, (q31_t)0xd674004e,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f10d0f, (q31_t)0xd614f6a9,
+  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78cffba3, (q31_t)0xd5b606e0,
+  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78ae9fb0, (q31_t)0xd557312d,
+  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x788cf94c, (q31_t)0xd4f875ca,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x786b088c, (q31_t)0xd499d4f2,
+  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x7848cd83, (q31_t)0xd43b4ee0,
+  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x78264849, (q31_t)0xd3dce3cd,
+  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780378f1, (q31_t)0xd37e93f4,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e05f91, (q31_t)0xd3205f8f,
+  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8,
+  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77994f11, (q31_t)0xd2644a0a,
+  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x7775581d, (q31_t)0xd206695d,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x77511778, (q31_t)0xd1a8a50d,
+  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x772c8d3a, (q31_t)0xd14afd52,
+  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x7707b979, (q31_t)0xd0ed7267,
+  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e29c4b, (q31_t)0xd0900486,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76bd35c7, (q31_t)0xd032b3e7,
+  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x76978605, (q31_t)0xcfd580c6,
+  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x76718d1c, (q31_t)0xcf786b5a,
+  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x764b4b23, (q31_t)0xcf1b73de,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x7624c031, (q31_t)0xcebe9a8a,
+  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x75fdec60, (q31_t)0xce61df99,
+  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75d6cfc5, (q31_t)0xce054343,
+  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x7587bc98, (q31_t)0xcd4c674d,
+  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x755fc635, (q31_t)0xccf0281f,
+  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x7537876c, (q31_t)0xcc940871,
+  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x750f0054, (q31_t)0xcc38087b,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74e63108, (q31_t)0xcbdc2876,
+  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74bd199f, (q31_t)0xcb80689a,
+  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x7493ba34, (q31_t)0xcb24c921,
+  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x746a12df, (q31_t)0xcac94a42,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x744023bc, (q31_t)0xca6dec37,
+  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x7415ece2, (q31_t)0xca12af37,
+  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a,
+  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c0a878, (q31_t)0xc95c993a,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x73959b1b, (q31_t)0xc901c0ae,
+  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x736a4671, (q31_t)0xc8a70a0e,
+  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x733eaa96, (q31_t)0xc84c7593,
+  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x7312c7a5, (q31_t)0xc7f20373,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72e69db7, (q31_t)0xc797b3e7,
+  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72ba2cea, (q31_t)0xc73d8727,
+  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x728d7557, (q31_t)0xc6e37d69,
+  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7260771b, (q31_t)0xc68996e7,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x72333251, (q31_t)0xc62fd3d6,
+  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x7205a716, (q31_t)0xc5d6346f,
+  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71d7d585, (q31_t)0xc57cb8e9,
+  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71a9bdba, (q31_t)0xc523617a,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b,
+  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x714cbbeb, (q31_t)0xc4711fc2,
+  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x711dd220, (q31_t)0xc41835e6,
+  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70eea28e, (q31_t)0xc3bf70fd,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70bf2d53, (q31_t)0xc366d140,
+  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x708f728b, (q31_t)0xc30e56e4,
+  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x705f7255, (q31_t)0xc2b6021f,
+  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x702f2ccd, (q31_t)0xc25dd329,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x6ffea212, (q31_t)0xc205ca38,
+  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fcdd241, (q31_t)0xc1ade781,
+  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d,
+  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f39c57d, (q31_t)0xc0a726df,
+  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f07e285, (q31_t)0xc04fdf32,
+  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6ed5bb10, (q31_t)0xbff8bece,
+  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba,
+  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e3daaf8, (q31_t)0xbef44b74,
+  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e,
+  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6da336dc, (q31_t)0xbdf14135,
+  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad,
+  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a,
+  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d066215, (q31_t)0xbcefa5b0,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5,
+  (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c,
+  (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c67300b, (q31_t)0xbbef7e7c,
+  (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c319975, (q31_t)0xbb9a6fc7,
+  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6bfbc021, (q31_t)0xbb458b43,
+  (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bc5a431, (q31_t)0xbaf0d125,
+  (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0,
+  (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b58a503, (q31_t)0xba47dce8,
+  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b21c208, (q31_t)0xb9f3a332,
+  (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2,
+  (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6ab335f4, (q31_t)0xb94bb19b,
+  (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a43a29a, (q31_t)0xb8a46e78,
+  (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a2794c1, (q31_t)0xb87ab922, (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a0b7689, (q31_t)0xb8510ed4,
+  (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69ef47f6, (q31_t)0xb8276f93, (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69d3090e, (q31_t)0xb7fddb67,
+  (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69b6b9d3, (q31_t)0xb7d45255, (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x699a5a4c, (q31_t)0xb7aad465,
+  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x697dea7b, (q31_t)0xb781619c, (q31_t)0x696fac78, (q31_t)0xb76cac69, (q31_t)0x69616a65, (q31_t)0xb757fa01,
+  (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x6944da10, (q31_t)0xb72e9d9b, (q31_t)0x69368bce, (q31_t)0xb719f39e, (q31_t)0x6928397e, (q31_t)0xb7054c6f,
+  (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x690b88b5, (q31_t)0xb6dc0685, (q31_t)0x68fd2a3d, (q31_t)0xb6c767ca, (q31_t)0x68eec7b9, (q31_t)0xb6b2cbe2,
+  (q31_t)0x68e06129, (q31_t)0xb69e32cd, (q31_t)0x68d1f68f, (q31_t)0xb6899c8d, (q31_t)0x68c387e9, (q31_t)0xb6750921, (q31_t)0x68b5153a, (q31_t)0xb660788c,
+  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x689823bf, (q31_t)0xb6375fe5, (q31_t)0x6889a4f6, (q31_t)0xb622d7d6, (q31_t)0x687b2224, (q31_t)0xb60e529f,
+  (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x685e106c, (q31_t)0xb5e550c1, (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x6840ee9b, (q31_t)0xb5bc5a50,
+  (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x6823bcb7, (q31_t)0xb5936f53, (q31_t)0x68151dbe, (q31_t)0xb57efe22, (q31_t)0x68067ac3, (q31_t)0xb56a8fd0,
+  (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67e928c5, (q31_t)0xb541bbcd, (q31_t)0x67da79c3, (q31_t)0xb52d561e, (q31_t)0x67cbc6c0, (q31_t)0xb518f351,
+  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67ae54ba, (q31_t)0xb4f03663, (q31_t)0x679f95b7, (q31_t)0xb4dbdc42, (q31_t)0x6790d2b6, (q31_t)0xb4c78507,
+  (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x677340ba, (q31_t)0xb49edf45, (q31_t)0x676471c0, (q31_t)0xb48a90c0, (q31_t)0x67559eca, (q31_t)0xb4764523,
+  (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x6737ecea, (q31_t)0xb44db6a8, (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x671a2b20, (q31_t)0xb42533d8,
+  (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x66fc596f, (q31_t)0xb3fcbcbb, (q31_t)0x66ed6aa1, (q31_t)0xb3e88592, (q31_t)0x66de77dc, (q31_t)0xb3d45157,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66c0866d, (q31_t)0xb3abf1b2, (q31_t)0x66b187c3, (q31_t)0xb397c649, (q31_t)0x66a28524, (q31_t)0xb3839dd3,
+  (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x66847408, (q31_t)0xb35b55bf, (q31_t)0x6675658c, (q31_t)0xb3473623, (q31_t)0x6666531d, (q31_t)0xb333197c,
+  (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x66482267, (q31_t)0xb30ae912, (q31_t)0x66390422, (q31_t)0xb2f6d550, (q31_t)0x6629e1ec, (q31_t)0xb2e2c486,
+  (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5, (q31_t)0x660b91af, (q31_t)0xb2baabde, (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65ed31b5, (q31_t)0xb2929f21,
+  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65cec204, (q31_t)0xb26a9e54, (q31_t)0x65bf8447, (q31_t)0xb256a26a, (q31_t)0x65b0429f, (q31_t)0xb242a97e,
+  (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x6591b38c, (q31_t)0xb21ac0a6, (q31_t)0x65826622, (q31_t)0xb206d0ba, (q31_t)0x657314cf, (q31_t)0xb1f2e3d0,
+  (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x6554666d, (q31_t)0xb1cb1304, (q31_t)0x6545095f, (q31_t)0xb1b72f23, (q31_t)0x6535a86b, (q31_t)0xb1a34e47,
+  (q31_t)0x6526438f, (q31_t)0xb18f7071, (q31_t)0x6516dacd, (q31_t)0xb17b95a0, (q31_t)0x65076e25, (q31_t)0xb167bdd7, (q31_t)0x64f7fd98, (q31_t)0xb153e915,
+  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64d910d1, (q31_t)0xb12c48ab, (q31_t)0x64c99498, (q31_t)0xb1187d05, (q31_t)0x64ba147d, (q31_t)0xb104b46a,
+  (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x649b08a0, (q31_t)0xb0dd2c56, (q31_t)0x648b7ce0, (q31_t)0xb0c96ce0, (q31_t)0x647bed3f, (q31_t)0xb0b5b077,
+  (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x645cc260, (q31_t)0xb08e40d2, (q31_t)0x644d2722, (q31_t)0xb07a8d97, (q31_t)0x643d8806, (q31_t)0xb066dd6d,
+  (q31_t)0x642de50d, (q31_t)0xb0533055, (q31_t)0x641e3e38, (q31_t)0xb03f864f, (q31_t)0x640e9386, (q31_t)0xb02bdf5c, (q31_t)0x63fee4f8, (q31_t)0xb0183b7d,
+  (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63df7c4d, (q31_t)0xaff0fcfe, (q31_t)0x63cfc231, (q31_t)0xafdd625f, (q31_t)0x63c0043b, (q31_t)0xafc9cad7,
+  (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x63a07cc7, (q31_t)0xafa2a50f, (q31_t)0x6390b34a, (q31_t)0xaf8f16d1, (q31_t)0x6380e5f6, (q31_t)0xaf7b8bac,
+  (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x63613fcd, (q31_t)0xaf547eb3, (q31_t)0x635166f9, (q31_t)0xaf40fce1, (q31_t)0x63418a50, (q31_t)0xaf2d7e2b,
+  (q31_t)0x6331a9d4, (q31_t)0xaf1a0293, (q31_t)0x6321c585, (q31_t)0xaf068a1a, (q31_t)0x6311dd64, (q31_t)0xaef314c0, (q31_t)0x6301f171, (q31_t)0xaedfa285,
+  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62e20e17, (q31_t)0xaeb8c774, (q31_t)0x62d216b3, (q31_t)0xaea55e9e, (q31_t)0x62c21b7e, (q31_t)0xae91f8eb,
+  (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x62a219aa, (q31_t)0xae6b36f0, (q31_t)0x6292130c, (q31_t)0xae57daab, (q31_t)0x628208a1, (q31_t)0xae44818b,
+  (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x6261e866, (q31_t)0xae1dd8c0, (q31_t)0x6251d298, (q31_t)0xae0a8916, (q31_t)0x6241b8ff, (q31_t)0xadf73c96,
+  (q31_t)0x62319b9d, (q31_t)0xade3f33e, (q31_t)0x62217a72, (q31_t)0xadd0ad12, (q31_t)0x6211557e, (q31_t)0xadbd6a10, (q31_t)0x62012cc2, (q31_t)0xadaa2a3b,
+  (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61e0cff5, (q31_t)0xad83b416, (q31_t)0x61d09be5, (q31_t)0xad707dc8, (q31_t)0x61c06410, (q31_t)0xad5d4aaa,
+  (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x619fe918, (q31_t)0xad36edfc, (q31_t)0x618fa5f7, (q31_t)0xad23c46e, (q31_t)0x617f5f12, (q31_t)0xad109e12,
+  (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x615ec603, (q31_t)0xacea5af2, (q31_t)0x614e73da, (q31_t)0xacd73e30, (q31_t)0x613e1df0, (q31_t)0xacc424a3,
+  (q31_t)0x612dc447, (q31_t)0xacb10e4b, (q31_t)0x611d66de, (q31_t)0xac9dfb29, (q31_t)0x610d05b7, (q31_t)0xac8aeb3e, (q31_t)0x60fca0d2, (q31_t)0xac77de8b,
+  (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60dbcbd1, (q31_t)0xac51cecf, (q31_t)0x60cb5bb7, (q31_t)0xac3ecbc7, (q31_t)0x60bae7e1, (q31_t)0xac2bcbfa,
+  (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x6099f505, (q31_t)0xac05d613, (q31_t)0x60897601, (q31_t)0xabf2dffb, (q31_t)0x6078f344, (q31_t)0xabdfed1f,
+  (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x6057e2a2, (q31_t)0xabba1125, (q31_t)0x604754bf, (q31_t)0xaba72807, (q31_t)0x6036c325, (q31_t)0xab944229,
+  (q31_t)0x60262dd6, (q31_t)0xab815f8d, (q31_t)0x601594d1, (q31_t)0xab6e8032, (q31_t)0x6004f819, (q31_t)0xab5ba41a, (q31_t)0x5ff457ad, (q31_t)0xab48cb46,
+  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fd30bbc, (q31_t)0xab23236a, (q31_t)0x5fc26038, (q31_t)0xab105464, (q31_t)0x5fb1b104, (q31_t)0xaafd88a4,
+  (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f90478a, (q31_t)0xaad7fafb, (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f6ecf53, (q31_t)0xaab27a73,
+  (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f4d4865, (q31_t)0xaa8d0713, (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0,
+  (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f0a0e77, (q31_t)0xaa4247e1, (q31_t)0x5ef936d1, (q31_t)0xaa2fa056, (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92, (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e,
+  (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e82eae5, (q31_t)0xa9ad6855, (q31_t)0x5e71f606, (q31_t)0xa99adb56, (q31_t)0x5e60fd84, (q31_t)0xa98851ac,
+  (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e3f0194, (q31_t)0xa9634858, (q31_t)0x5e2dfe29, (q31_t)0xa950c8b0, (q31_t)0x5e1cf71c, (q31_t)0xa93e4c5f,
+  (q31_t)0x5e0bec6e, (q31_t)0xa92bd367, (q31_t)0x5dfade20, (q31_t)0xa9195dc7, (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97,
+  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2, (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5d943c4e, (q31_t)0xa8aae280,
+  (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d71e979, (q31_t)0xa88629a5, (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d4f883b, (q31_t)0xa8617e48,
+  (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d2d189a, (q31_t)0xa83ce06e, (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d0a9a9a, (q31_t)0xa818501c,
+  (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59, (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cc57394, (q31_t)0xa7cf582a,
+  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5ca2ca99, (q31_t)0xa7aaf094, (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c801354, (q31_t)0xa786969e,
+  (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c5d4dcc, (q31_t)0xa7624a4d, (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c3a7a05, (q31_t)0xa73e0ba5,
+  (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5c179806, (q31_t)0xa719daae, (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5bf4a7d2, (q31_t)0xa6f5b76d,
+  (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2, (q31_t)0x5bd1a971, (q31_t)0xa6d1a1e7, (q31_t)0x5bc024f0, (q31_t)0xa6bf9c4b, (q31_t)0x5bae9ce7, (q31_t)0xa6ad9a21,
+  (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b8b8239, (q31_t)0xa689a022, (q31_t)0x5b79ef96, (q31_t)0xa677a84e, (q31_t)0x5b68596d, (q31_t)0xa665b3ee,
+  (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b452288, (q31_t)0xa641d58c, (q31_t)0x5b3381ce, (q31_t)0xa62feb8b, (q31_t)0x5b21dd90, (q31_t)0xa61e0501,
+  (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5afe8a8b, (q31_t)0xa5fa4252, (q31_t)0x5aecdbc5, (q31_t)0xa5e8662f, (q31_t)0x5adb297d, (q31_t)0xa5d68d85,
+  (q31_t)0x5ac973b5, (q31_t)0xa5c4b855, (q31_t)0x5ab7ba6c, (q31_t)0xa5b2e6a0, (q31_t)0x5aa5fda5, (q31_t)0xa5a11866, (q31_t)0x5a943d5e, (q31_t)0xa58f4da8,
+  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a70b258, (q31_t)0xa56bc2a2, (q31_t)0x5a5ee79a, (q31_t)0xa55a025b, (q31_t)0x5a4d1960, (q31_t)0xa5484594,
+  (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x5a29727b, (q31_t)0xa524d683, (q31_t)0x5a1799d1, (q31_t)0xa513243b, (q31_t)0x5a05bdae, (q31_t)0xa5017575,
+  (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59e1faff, (q31_t)0xa4de2270, (q31_t)0x59d01475, (q31_t)0xa4cc7e32, (q31_t)0x59be2a74, (q31_t)0xa4badd78,
+  (q31_t)0x59ac3cfd, (q31_t)0xa4a94043, (q31_t)0x599a4c12, (q31_t)0xa497a693, (q31_t)0x598857b2, (q31_t)0xa486106a, (q31_t)0x59765fde, (q31_t)0xa4747dc7,
+  (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x595265df, (q31_t)0xa4516319, (q31_t)0x594063b5, (q31_t)0xa43fdb10, (q31_t)0x592e5e19, (q31_t)0xa42e568f,
+  (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x590a4893, (q31_t)0xa40b582e, (q31_t)0x58f838a9, (q31_t)0xa3f9de4e, (q31_t)0x58e62552, (q31_t)0xa3e867fa,
+  (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x58c1f45b, (q31_t)0xa3c585fb, (q31_t)0x58afd6bd, (q31_t)0xa3b41a50, (q31_t)0x589db5b3, (q31_t)0xa3a2b234,
+  (q31_t)0x588b9140, (q31_t)0xa3914da8, (q31_t)0x58796962, (q31_t)0xa37fecac, (q31_t)0x58673e1b, (q31_t)0xa36e8f41, (q31_t)0x58550f6c, (q31_t)0xa35d3567,
+  (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x5830a7d6, (q31_t)0xa33a8c6c, (q31_t)0x581e6ef1, (q31_t)0xa3293d4b, (q31_t)0x580c32a7, (q31_t)0xa317f1bf,
+  (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57e7afe4, (q31_t)0xa2f56566, (q31_t)0x57d5696d, (q31_t)0xa2e4249b, (q31_t)0x57c31f92, (q31_t)0xa2d2e766,
+  (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x579e81b8, (q31_t)0xa2b077c5, (q31_t)0x578c2dba, (q31_t)0xa29f4559, (q31_t)0x5779d65b, (q31_t)0xa28e1687,
+  (q31_t)0x57677b9d, (q31_t)0xa27ceb4f, (q31_t)0x57551d80, (q31_t)0xa26bc3b2, (q31_t)0x5742bc06, (q31_t)0xa25a9fb1, (q31_t)0x5730572e, (q31_t)0xa2497f4c,
+  (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x570b8369, (q31_t)0xa2274959, (q31_t)0x56f9147e, (q31_t)0xa21633cd, (q31_t)0x56e6a239, (q31_t)0xa20521e0,
+  (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x56c1b3a1, (q31_t)0xa1e308e4, (q31_t)0x56af3750, (q31_t)0xa1d201d7, (q31_t)0x569cb7a8, (q31_t)0xa1c0fe6c,
+  (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x5677ae54, (q31_t)0xa19f027c, (q31_t)0x566524aa, (q31_t)0xa18e09fa, (q31_t)0x565297ab, (q31_t)0xa17d151b,
+  (q31_t)0x56400758, (q31_t)0xa16c23e1, (q31_t)0x562d73b2, (q31_t)0xa15b364d, (q31_t)0x561adcb9, (q31_t)0xa14a4c5e, (q31_t)0x5608426e, (q31_t)0xa1396617,
+  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55e303e6, (q31_t)0xa117a47e, (q31_t)0x55d05faa, (q31_t)0xa106c92f, (q31_t)0x55bdb81f, (q31_t)0xa0f5f189,
+  (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x55985f20, (q31_t)0xa0d44d3b, (q31_t)0x5585adad, (q31_t)0xa0c38095, (q31_t)0x5572f8ed, (q31_t)0xa0b2b79b,
+  (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x554d858d, (q31_t)0xa09130ad, (q31_t)0x553ac6ee, (q31_t)0xa08072ba, (q31_t)0x55280505, (q31_t)0xa06fb876,
+  (q31_t)0x55153fd4, (q31_t)0xa05f01e1, (q31_t)0x5502775c, (q31_t)0xa04e4efc, (q31_t)0x54efab9c, (q31_t)0xa03d9fc8, (q31_t)0x54dcdc96, (q31_t)0xa02cf444,
+  (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x54b734ba, (q31_t)0xa00ba853, (q31_t)0x54a45be6, (q31_t)0x9ffb07e7, (q31_t)0x54917fce, (q31_t)0x9fea6b2f,
+  (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x546bbdd7, (q31_t)0x9fc93cdb, (q31_t)0x5458d7f9, (q31_t)0x9fb8ab41, (q31_t)0x5445eedb, (q31_t)0x9fa81d5e,
+  (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x542012e1, (q31_t)0x9f870cbc, (q31_t)0x540d2005, (q31_t)0x9f7689ff, (q31_t)0x53fa29ed, (q31_t)0x9f660afb,
+  (q31_t)0x53e73097, (q31_t)0x9f558fb0, (q31_t)0x53d43406, (q31_t)0x9f45181f, (q31_t)0x53c13439, (q31_t)0x9f34a449, (q31_t)0x53ae3131, (q31_t)0x9f24342f,
+  (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x53882175, (q31_t)0x9f035f2e, (q31_t)0x537514c2, (q31_t)0x9ef2fa49, (q31_t)0x536204d7, (q31_t)0x9ee29922,
+  (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x533bdb5d, (q31_t)0x9ec1e210, (q31_t)0x5328c1d0, (q31_t)0x9eb18c26, (q31_t)0x5315a50e, (q31_t)0x9ea139fd,
+  (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52ef61ee, (q31_t)0x9e80a0ee, (q31_t)0x52dc3b92, (q31_t)0x9e705a09, (q31_t)0x52c91204, (q31_t)0x9e6016e8,
+  (q31_t)0x52b5e546, (q31_t)0x9e4fd78a, (q31_t)0x52a2b556, (q31_t)0x9e3f9bf0, (q31_t)0x528f8238, (q31_t)0x9e2f641b, (q31_t)0x527c4bea, (q31_t)0x9e1f300b,
+  (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x5255d5c5, (q31_t)0x9dfed33e, (q31_t)0x524295f0, (q31_t)0x9deeaa82, (q31_t)0x522f52ee, (q31_t)0x9dde858e,
+  (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x5208c36a, (q31_t)0x9dbe4701, (q31_t)0x51f576ea, (q31_t)0x9dae2d68, (q31_t)0x51e22740, (q31_t)0x9d9e179a,
+  (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x51bb7e75, (q31_t)0x9d7df75f, (q31_t)0x51a82555, (q31_t)0x9d6decf4, (q31_t)0x5194c910, (q31_t)0x9d5de656,
+  (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x516e0715, (q31_t)0x9d3de482, (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5147388c, (q31_t)0x9d1df1e9,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f, (q31_t)0x510ceb40, (q31_t)0x9cee229c, (q31_t)0x50f975e6, (q31_t)0x9cde3a7b,
+  (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x50d281d5, (q31_t)0x9cbe75b0, (q31_t)0x50bf031f, (q31_t)0x9cae9907, (q31_t)0x50ab814d, (q31_t)0x9c9ec033,
+  (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x50847454, (q31_t)0x9c7f1a0a, (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x505d5af1, (q31_t)0x9c5f8339,
+  (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x50363529, (q31_t)0x9c3ffbc5, (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x500f0302, (q31_t)0x9c2083b3,
+  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4fe7c483, (q31_t)0x9c011b08, (q31_t)0x4fd420a4, (q31_t)0x9bf16c7a, (q31_t)0x4fc079b1, (q31_t)0x9be1c1c8,
+  (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4f992293, (q31_t)0x9bc277fa, (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f71bf2e, (q31_t)0x9ba33da0,
+  (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1, (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f22d3aa, (q31_t)0x9b64f760,
+  (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f,
+  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4eac16eb, (q31_t)0x9b080268, (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e846a60, (q31_t)0x9ae92533,
+  (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795, (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e34ecfc, (q31_t)0x9aab9993,
+  (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74,
+  (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4d9561ac, (q31_t)0x9a313dfc,
+  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d455422, (q31_t)0x99f46e51,
+  (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4cf516ee, (q31_t)0x99b7dd99,
+  (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8,
+  (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c540e4e, (q31_t)0x993f7993,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c034345, (q31_t)0x9903a691,
+  (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bb24958, (q31_t)0x98c81316,
+  (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b6120bb, (q31_t)0x988cbf46,
+  (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b0fc99d, (q31_t)0x9851ab46,
+  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4abe4433, (q31_t)0x9816d73b,
+  (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a6c90ad, (q31_t)0x97dc4349,
+  (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94,
+  (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49c8a01b, (q31_t)0x9767dc41,
+  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x49766373, (q31_t)0x972e0971,
+  (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x4923f97b, (q31_t)0x96f4774b,
+  (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48d16265, (q31_t)0x96bb25f0,
+  (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x487e9e64, (q31_t)0x96821585,
+  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x48552b9b, (q31_t)0x9665a5b4, (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x482badab, (q31_t)0x9649462d,
+  (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x48022499, (q31_t)0x962cf6f2, (q31_t)0x47ed5be6, (q31_t)0x961ed574, (q31_t)0x47d8906d, (q31_t)0x9610b80a,
+  (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47aef12c, (q31_t)0x95f48977, (q31_t)0x479a1d67, (q31_t)0x95e67850, (q31_t)0x478546de, (q31_t)0x95d86b3f,
+  (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x475b9188, (q31_t)0x95bc5d66, (q31_t)0x4746b2bc, (q31_t)0x95ae5c9f, (q31_t)0x4731d131, (q31_t)0x95a05ff0,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x470805df, (q31_t)0x958472e2, (q31_t)0x46f31c1a, (q31_t)0x95768283, (q31_t)0x46de2f99, (q31_t)0x9568963f,
+  (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46b44e65, (q31_t)0x954cca0c, (q31_t)0x469f59b4, (q31_t)0x953eea1e, (q31_t)0x468a624a, (q31_t)0x95310e4e,
+  (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x46606b4e, (q31_t)0x95156308, (q31_t)0x464b6bbe, (q31_t)0x95079394, (q31_t)0x46366978, (q31_t)0x94f9c83f,
+  (q31_t)0x4621647d, (q31_t)0x94ec010b, (q31_t)0x460c5cce, (q31_t)0x94de3df8, (q31_t)0x45f7526b, (q31_t)0x94d07f05, (q31_t)0x45e24556, (q31_t)0x94c2c435,
+  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x45b82318, (q31_t)0x94a75afd, (q31_t)0x45a30df0, (q31_t)0x9499ac95, (q31_t)0x458df619, (q31_t)0x948c0252,
+  (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x4563be60, (q31_t)0x9470ba39, (q31_t)0x454e9e80, (q31_t)0x94631c65, (q31_t)0x45397bf4, (q31_t)0x945582b7,
+  (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x450f2edb, (q31_t)0x943a5bcf, (q31_t)0x44fa0450, (q31_t)0x942cce96, (q31_t)0x44e4d71c, (q31_t)0x941f4585,
+  (q31_t)0x44cfa740, (q31_t)0x9411c09e, (q31_t)0x44ba74bd, (q31_t)0x94043fdf, (q31_t)0x44a53f93, (q31_t)0x93f6c34a, (q31_t)0x449007c4, (q31_t)0x93e94adf,
+  (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x44659039, (q31_t)0x93ce668b, (q31_t)0x4450507e, (q31_t)0x93c0faa3, (q31_t)0x443b0e21, (q31_t)0x93b392e6,
+  (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x44108184, (q31_t)0x9398cff5, (q31_t)0x43fb3746, (q31_t)0x938b74c1, (q31_t)0x43e5ea68, (q31_t)0x937e1dbb,
+  (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x43bb48d4, (q31_t)0x93637c3d, (q31_t)0x43a5f41e, (q31_t)0x935631c5, (q31_t)0x43909ccd, (q31_t)0x9348eb7e,
+  (q31_t)0x437b42e1, (q31_t)0x933ba968, (q31_t)0x4365e65b, (q31_t)0x932e6b84, (q31_t)0x4350873c, (q31_t)0x932131d1, (q31_t)0x433b2585, (q31_t)0x9313fc51,
+  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x43105a50, (q31_t)0x92f99deb, (q31_t)0x42faf0d4, (q31_t)0x92ec7505, (q31_t)0x42e584c3, (q31_t)0x92df5054,
+  (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x42baa4e6, (q31_t)0x92c51392, (q31_t)0x42a5311b, (q31_t)0x92b7fb82, (q31_t)0x428fbabe, (q31_t)0x92aae7a8,
+  (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x4264c653, (q31_t)0x9290cc9b, (q31_t)0x424f4845, (q31_t)0x9283c568, (q31_t)0x4239c7aa, (q31_t)0x9276c26d,
+  (q31_t)0x42244481, (q31_t)0x9269c3ac, (q31_t)0x420ebecb, (q31_t)0x925cc924, (q31_t)0x41f93689, (q31_t)0x924fd2d7, (q31_t)0x41e3abbc, (q31_t)0x9242e0c4,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x41b88e84, (q31_t)0x9229094f, (q31_t)0x41a2fc1a, (q31_t)0x921c23ef, (q31_t)0x418d6729, (q31_t)0x920f42cb,
+  (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x416235b2, (q31_t)0x91f58d3b, (q31_t)0x414c992f, (q31_t)0x91e8b8d0, (q31_t)0x4136fa27, (q31_t)0x91dbe8a4,
+  (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x410bb48c, (q31_t)0x91c25508, (q31_t)0x40f60dfb, (q31_t)0x91b5919a, (q31_t)0x40e064ea, (q31_t)0x91a8d26d,
+  (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40b50b46, (q31_t)0x918f60d6, (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4089a7a8, (q31_t)0x91760047,
+  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x405e3a16, (q31_t)0x915cb0c3, (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x4032c297, (q31_t)0x91437250,
+  (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fdbb5ec, (q31_t)0x911128a8,
+  (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fb020ce, (q31_t)0x90f81d7b, (q31_t)0x3f9a5290, (q31_t)0x90eb9e50, (q31_t)0x3f8481dd, (q31_t)0x90df236e,
+  (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4, (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f430119, (q31_t)0x90b9cc7d, (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0,
+  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ed5a46b, (q31_t)0x907be6be,
+  (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e7dfb73, (q31_t)0x904aaf86,
+  (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e52187f, (q31_t)0x90322dbf, (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e262bee, (q31_t)0x9019bd36,
+  (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3dce3614, (q31_t)0x8fe90fec,
+  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7,
+  (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d1dd835, (q31_t)0x8f8884e4,
+  (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cc5709e, (q31_t)0x8f58a761,
+  (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c143130, (q31_t)0x8ef9bcf2,
+  (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bbb59c7, (q31_t)0x8ecab040,
+  (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b625d86, (q31_t)0x8e9be963,
+  (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b093ca3, (q31_t)0x8e6d6877,
+  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b,
+  (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a568dd4, (q31_t)0x8e1138ea,
+  (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x39fd0056, (q31_t)0x8de38a80,
+  (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39a34f13, (q31_t)0x8db6227a,
+  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x39497a43, (q31_t)0x8d8900f3,
+  (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x38ef821c, (q31_t)0x8d5c2609,
+  (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x389566d6, (q31_t)0x8d2f91d5,
+  (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x383b28a9, (q31_t)0x8d034474,
+  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01,
+  (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37864477, (q31_t)0x8cab7e98,
+  (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x372b9ee3, (q31_t)0x8c800652,
+  (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5, (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36d0d746, (q31_t)0x8c54d54c,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36a366c6, (q31_t)0x8c3f5788, (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3675edd9, (q31_t)0x8c29eb9f,
+  (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36486c86, (q31_t)0x8c149192, (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x361ae2d3, (q31_t)0x8bff4966,
+  (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35ed50c9, (q31_t)0x8bea131e, (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc,
+  (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x359213c9, (q31_t)0x8bbfdc44, (q31_t)0x357b3f5d, (q31_t)0x8bb559c1, (q31_t)0x356468e2, (q31_t)0x8baadbba,
+  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x3536b5be, (q31_t)0x8b95ed21, (q31_t)0x351fd918, (q31_t)0x8b8b7c8f, (q31_t)0x3508fa66, (q31_t)0x8b81107b,
+  (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34db36df, (q31_t)0x8b6c45cc, (q31_t)0x34c4520d, (q31_t)0x8b61e733, (q31_t)0x34ad6b32, (q31_t)0x8b578d18,
+  (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x347f9766, (q31_t)0x8b42e661, (q31_t)0x3468aa76, (q31_t)0x8b3899c6, (q31_t)0x3451bb81, (q31_t)0x8b2e51ab,
+  (q31_t)0x343aca87, (q31_t)0x8b240e11, (q31_t)0x3423d78a, (q31_t)0x8b19cef8, (q31_t)0x340ce28b, (q31_t)0x8b0f9462, (q31_t)0x33f5eb89, (q31_t)0x8b055e4d,
+  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x33c7f785, (q31_t)0x8af0ffac, (q31_t)0x33b0fa84, (q31_t)0x8ae6d720, (q31_t)0x3399fb85, (q31_t)0x8adcb318,
+  (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x336bf78f, (q31_t)0x8ac87894, (q31_t)0x3354f29b, (q31_t)0x8abe6219, (q31_t)0x333debab, (q31_t)0x8ab45024,
+  (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x330fd7e1, (q31_t)0x8aa039cb, (q31_t)0x32f8cb07, (q31_t)0x8a963567, (q31_t)0x32e1bc36, (q31_t)0x8a8c358b,
+  (q31_t)0x32caab6f, (q31_t)0x8a823a36, (q31_t)0x32b398b3, (q31_t)0x8a784368, (q31_t)0x329c8402, (q31_t)0x8a6e5123, (q31_t)0x32856d5e, (q31_t)0x8a646365,
+  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x32573a3f, (q31_t)0x8a509585, (q31_t)0x32401dc6, (q31_t)0x8a46b564, (q31_t)0x3228ff5c, (q31_t)0x8a3cd9cc,
+  (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x31fabcbd, (q31_t)0x8a29303b, (q31_t)0x31e39889, (q31_t)0x8a1f6243, (q31_t)0x31cc7269, (q31_t)0x8a1598d6,
+  (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x319e2067, (q31_t)0x8a0213a0, (q31_t)0x3186f487, (q31_t)0x89f857d8, (q31_t)0x316fc6be, (q31_t)0x89eea09d,
+  (q31_t)0x3158970e, (q31_t)0x89e4edef, (q31_t)0x31416576, (q31_t)0x89db3fcf, (q31_t)0x312a31f8, (q31_t)0x89d1963c, (q31_t)0x3112fc95, (q31_t)0x89c7f138,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30e48c22, (q31_t)0x89b4b4dd, (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30b61426, (q31_t)0x89a18ac0,
+  (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x30590dab, (q31_t)0x897b6d4c,
+  (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x2ffbe95d, (q31_t)0x895598f3,
+  (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2f9ea775, (q31_t)0x89300dce,
+  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f41482e, (q31_t)0x890acbf2,
+  (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378,
+  (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e863267, (q31_t)0x88c12475,
+  (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e287c5a, (q31_t)0x889cbf01,
+  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2dcaa9d5, (q31_t)0x8878a332,
+  (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d6cbb10, (q31_t)0x8854d11e,
+  (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d0eb046, (q31_t)0x883148db,
+  (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cb089b1, (q31_t)0x880e0a7f,
+  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c52478a, (q31_t)0x87eb1621,
+  (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5,
+  (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2b957173, (q31_t)0x87a60bb1,
+  (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ad82fd2, (q31_t)0x87622a35,
+  (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a796740, (q31_t)0x8740a907,
+  (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a1a847b, (q31_t)0x871f7255,
+  (q31_t)0x2a02c7b8, (q31_t)0x8717304e, (q31_t)0x29eb0957, (q31_t)0x870ef2f1, (q31_t)0x29d34958, (q31_t)0x8706ba3d, (q31_t)0x29bb87bc, (q31_t)0x86fe8633,
+  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x298bffb2, (q31_t)0x86ee2c1e, (q31_t)0x29743946, (q31_t)0x86e60614, (q31_t)0x295c7140, (q31_t)0x86dde4b5,
+  (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x292cdc6d, (q31_t)0x86cdaffa, (q31_t)0x29150fa1, (q31_t)0x86c59c9f, (q31_t)0x28fd4140, (q31_t)0x86bd8df0,
+  (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x28cd9fc1, (q31_t)0x86ad7e99, (q31_t)0x28b5cca5, (q31_t)0x86a57df2, (q31_t)0x289df7f8, (q31_t)0x869d81f8,
+  (q31_t)0x288621b9, (q31_t)0x86958aac, (q31_t)0x286e49ea, (q31_t)0x868d980e, (q31_t)0x2856708d, (q31_t)0x8685aa20, (q31_t)0x283e95a1, (q31_t)0x867dc0e0,
+  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x280edb23, (q31_t)0x866dfc6e, (q31_t)0x27f6fb92, (q31_t)0x8666213c, (q31_t)0x27df1a77, (q31_t)0x865e4abb,
+  (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27af53a6, (q31_t)0x864eabcb, (q31_t)0x27976df1, (q31_t)0x8646e35c, (q31_t)0x277f86b5, (q31_t)0x863f1f9e,
+  (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x274fb3ae, (q31_t)0x862fa638, (q31_t)0x2737c7e3, (q31_t)0x8627f091, (q31_t)0x271fda96, (q31_t)0x86203f9c,
+  (q31_t)0x2707ebc7, (q31_t)0x86189359, (q31_t)0x26effb76, (q31_t)0x8610ebca, (q31_t)0x26d809a5, (q31_t)0x860948ef, (q31_t)0x26c01655, (q31_t)0x8601aac7,
+  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26902b39, (q31_t)0x85f27c93, (q31_t)0x26783370, (q31_t)0x85eaec88, (q31_t)0x26603a2c, (q31_t)0x85e36132,
+  (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x26304333, (q31_t)0x85d458a6, (q31_t)0x26184581, (q31_t)0x85ccdb70, (q31_t)0x26004657, (q31_t)0x85c562f1,
+  (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x25d0439f, (q31_t)0x85b68015, (q31_t)0x25b84012, (q31_t)0x85af15b9, (q31_t)0x25a03b11, (q31_t)0x85a7b015,
+  (q31_t)0x2588349d, (q31_t)0x85a04f28, (q31_t)0x25702cb7, (q31_t)0x8598f2f3, (q31_t)0x2558235f, (q31_t)0x85919b76, (q31_t)0x25401896, (q31_t)0x858a48b1,
+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x250ffeb7, (q31_t)0x857bb152, (q31_t)0x24f7efa2, (q31_t)0x85746cb8, (q31_t)0x24dfdf20, (q31_t)0x856d2cd7,
+  (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24afb9da, (q31_t)0x855ebb44, (q31_t)0x2497a517, (q31_t)0x85578991, (q31_t)0x247f8eec, (q31_t)0x85505c99,
+  (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x244f5e5c, (q31_t)0x854210db, (q31_t)0x243743fa, (q31_t)0x853af214, (q31_t)0x241f2833, (q31_t)0x8533d809,
+  (q31_t)0x24070b08, (q31_t)0x852cc2bb, (q31_t)0x23eeec78, (q31_t)0x8525b228, (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23beab33, (q31_t)0x85179f39,
+  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x238e646a, (q31_t)0x85099f3e, (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x235e1826, (q31_t)0x84fbb239,
+  (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x232dc66d, (q31_t)0x84edd82d, (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x22fd6f48, (q31_t)0x84e0111b,
+  (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22cd12bd, (q31_t)0x84d25d06, (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0,
+  (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x226c4996, (q31_t)0x84b72ddb, (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x223bdd08, (q31_t)0x84a9b2ca,
+  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21daf41d, (q31_t)0x848ef5b7,
+  (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x2179f64f, (q31_t)0x847484ca,
+  (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x2118e3dc, (q31_t)0x845a6012,
+  (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20b7bcfe, (q31_t)0x844087a0,
+  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x205681f1, (q31_t)0x8426fb84,
+  (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x1ff532f2, (q31_t)0x840dbbcc,
+  (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1f93d03c, (q31_t)0x83f4c889,
+  (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f325a0b, (q31_t)0x83dc21cb,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0,
+  (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e6f342c, (q31_t)0x83abba17,
+  (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e0d84f5, (q31_t)0x8393f940,
+  (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dabc334, (q31_t)0x837c8528,
+  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d49ef26, (q31_t)0x83655ddf,
+  (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1ce80906, (q31_t)0x834e8373,
+  (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c861113, (q31_t)0x8337f5f1,
+  (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c240786, (q31_t)0x8321b568,
+  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6,
+  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b5fc097, (q31_t)0x82f61b77,
+  (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1afd83ad, (q31_t)0x82e0c22a,
+  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1a9b361d, (q31_t)0x82cbb60b,
+  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a38d823, (q31_t)0x82b6f727,
+  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19d669fc, (q31_t)0x82a2858c,
+  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x1973ebe6, (q31_t)0x828e6146,
+  (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x19115e1c, (q31_t)0x827a8a61,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18aec0db, (q31_t)0x826700e9,
+  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x184c1461, (q31_t)0x8253c4eb,
+  (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17e958ea, (q31_t)0x8240d673,
+  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x17868eb3, (q31_t)0x822e358b,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x1723b5f9, (q31_t)0x821be240,
+  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16c0cef9, (q31_t)0x8209dc9e,
+  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x165dd9f0, (q31_t)0x81f824ae,
+  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x15fad71b, (q31_t)0x81e6ba7c,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x1597c6b7, (q31_t)0x81d59e13,
+  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x1534a901, (q31_t)0x81c4cf7d,
+  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14d17e36, (q31_t)0x81b44ec4,
+  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x146e4694, (q31_t)0x81a41bf4,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x140b0258, (q31_t)0x81943715,
+  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13a7b1bf, (q31_t)0x8184a032,
+  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x13445505, (q31_t)0x81755754,
+  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12e0ec6a, (q31_t)0x81665c84,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x127d7829, (q31_t)0x8157afcd,
+  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x1219f880, (q31_t)0x81495136,
+  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11b66dad, (q31_t)0x813b40ca,
+  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x1152d7ed, (q31_t)0x812d7e8f,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x10ef377d, (q31_t)0x81200a90,
+  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x108b8c9b, (q31_t)0x8112e4d4,
+  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x1027d784, (q31_t)0x81060d63,
+  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfc41876, (q31_t)0x80f98446,
+  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf604faf, (q31_t)0x80ed4984,
+  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xefc7d6b, (q31_t)0x80e15d24,
+  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e,
+  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe34bd66, (q31_t)0x80ca6fa9,
+  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c,
+  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd6cda53, (q31_t)0x80b4bc0e,
+  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd08dc3f, (q31_t)0x80aa5806,
+  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xca4d620, (q31_t)0x80a04289,
+  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc40c835, (q31_t)0x80967b9f,
+  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbdcb2bb, (q31_t)0x808d034c,
+  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb7895f0, (q31_t)0x8083d998,
+  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb147211, (q31_t)0x807afe87,
+  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xab0475c, (q31_t)0x8072721f,
+  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa4c1610, (q31_t)0x806a3466,
+  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9e7de6a, (q31_t)0x80624560,
+  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x983a0a7, (q31_t)0x805aa512,
+  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x91f5d06, (q31_t)0x80535381,
+  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8bb13c5, (q31_t)0x804c50b2,
+  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x856c520, (q31_t)0x80459ca9,
+  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x7f27157, (q31_t)0x803f376a,
+  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x78e18a7, (q31_t)0x803920f8,
+  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x729bb4e, (q31_t)0x80335959,
+  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6c5598a, (q31_t)0x802de08e,
+  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x660f398, (q31_t)0x8028b69c,
+  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x5fc89b8, (q31_t)0x8023db86,
+  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5981c26, (q31_t)0x801f4f4f,
+  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x533ab20, (q31_t)0x801b11fa,
+  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4cf36e5, (q31_t)0x80172388,
+  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x46abfb3, (q31_t)0x801383fe,
+  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x40645c7, (q31_t)0x8010335c,
+  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3a1c960, (q31_t)0x800d31a5,
+  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x33d4abb, (q31_t)0x800a7edb,
+  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2d8ca16, (q31_t)0x80081b00,
+  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x27447b0, (q31_t)0x80060614,
+  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x20fc3c6, (q31_t)0x8004401a,
+  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1ab3e97, (q31_t)0x8002c912,
+  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x146b860, (q31_t)0x8001a0fd,
+  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0xe23160, (q31_t)0x8000c7dc,
+  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x7da9d4, (q31_t)0x80003daf,
+  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x1921fb, (q31_t)0x80000278
+};
+     const q31_t cos_factorsQ31_2048[2048] = {
+  (q31_t)0x7fffff62, (q31_t)0x7ffffa73, (q31_t)0x7ffff094, (q31_t)0x7fffe1c6, (q31_t)0x7fffce09, (q31_t)0x7fffb55c,
+  (q31_t)0x7fff97c1, (q31_t)0x7fff7536,
+  (q31_t)0x7fff4dbb, (q31_t)0x7fff2151, (q31_t)0x7ffeeff8, (q31_t)0x7ffeb9b0, (q31_t)0x7ffe7e79, (q31_t)0x7ffe3e52,
+  (q31_t)0x7ffdf93c, (q31_t)0x7ffdaf37,
+  (q31_t)0x7ffd6042, (q31_t)0x7ffd0c5f, (q31_t)0x7ffcb38c, (q31_t)0x7ffc55ca, (q31_t)0x7ffbf319, (q31_t)0x7ffb8b78,
+  (q31_t)0x7ffb1ee9, (q31_t)0x7ffaad6a,
+  (q31_t)0x7ffa36fc, (q31_t)0x7ff9bba0, (q31_t)0x7ff93b54, (q31_t)0x7ff8b619, (q31_t)0x7ff82bef, (q31_t)0x7ff79cd6,
+  (q31_t)0x7ff708ce, (q31_t)0x7ff66fd7,
+  (q31_t)0x7ff5d1f1, (q31_t)0x7ff52f1d, (q31_t)0x7ff48759, (q31_t)0x7ff3daa6, (q31_t)0x7ff32905, (q31_t)0x7ff27275,
+  (q31_t)0x7ff1b6f6, (q31_t)0x7ff0f688,
+  (q31_t)0x7ff0312c, (q31_t)0x7fef66e1, (q31_t)0x7fee97a7, (q31_t)0x7fedc37e, (q31_t)0x7fecea67, (q31_t)0x7fec0c62,
+  (q31_t)0x7feb296d, (q31_t)0x7fea418b,
+  (q31_t)0x7fe954ba, (q31_t)0x7fe862fa, (q31_t)0x7fe76c4c, (q31_t)0x7fe670b0, (q31_t)0x7fe57025, (q31_t)0x7fe46aac,
+  (q31_t)0x7fe36045, (q31_t)0x7fe250ef,
+  (q31_t)0x7fe13cac, (q31_t)0x7fe0237a, (q31_t)0x7fdf055a, (q31_t)0x7fdde24d, (q31_t)0x7fdcba51, (q31_t)0x7fdb8d67,
+  (q31_t)0x7fda5b8f, (q31_t)0x7fd924ca,
+  (q31_t)0x7fd7e917, (q31_t)0x7fd6a875, (q31_t)0x7fd562e7, (q31_t)0x7fd4186a, (q31_t)0x7fd2c900, (q31_t)0x7fd174a8,
+  (q31_t)0x7fd01b63, (q31_t)0x7fcebd31,
+  (q31_t)0x7fcd5a11, (q31_t)0x7fcbf203, (q31_t)0x7fca8508, (q31_t)0x7fc91320, (q31_t)0x7fc79c4b, (q31_t)0x7fc62089,
+  (q31_t)0x7fc49fda, (q31_t)0x7fc31a3d,
+  (q31_t)0x7fc18fb4, (q31_t)0x7fc0003e, (q31_t)0x7fbe6bdb, (q31_t)0x7fbcd28b, (q31_t)0x7fbb344e, (q31_t)0x7fb99125,
+  (q31_t)0x7fb7e90f, (q31_t)0x7fb63c0d,
+  (q31_t)0x7fb48a1e, (q31_t)0x7fb2d343, (q31_t)0x7fb1177b, (q31_t)0x7faf56c7, (q31_t)0x7fad9127, (q31_t)0x7fabc69b,
+  (q31_t)0x7fa9f723, (q31_t)0x7fa822bf,
+  (q31_t)0x7fa6496e, (q31_t)0x7fa46b32, (q31_t)0x7fa2880b, (q31_t)0x7fa09ff7, (q31_t)0x7f9eb2f8, (q31_t)0x7f9cc10d,
+  (q31_t)0x7f9aca37, (q31_t)0x7f98ce76,
+  (q31_t)0x7f96cdc9, (q31_t)0x7f94c831, (q31_t)0x7f92bdad, (q31_t)0x7f90ae3f, (q31_t)0x7f8e99e6, (q31_t)0x7f8c80a1,
+  (q31_t)0x7f8a6272, (q31_t)0x7f883f58,
+  (q31_t)0x7f861753, (q31_t)0x7f83ea64, (q31_t)0x7f81b88a, (q31_t)0x7f7f81c6, (q31_t)0x7f7d4617, (q31_t)0x7f7b057e,
+  (q31_t)0x7f78bffb, (q31_t)0x7f76758e,
+  (q31_t)0x7f742637, (q31_t)0x7f71d1f6, (q31_t)0x7f6f78cb, (q31_t)0x7f6d1ab6, (q31_t)0x7f6ab7b8, (q31_t)0x7f684fd0,
+  (q31_t)0x7f65e2ff, (q31_t)0x7f637144,
+  (q31_t)0x7f60faa0, (q31_t)0x7f5e7f13, (q31_t)0x7f5bfe9d, (q31_t)0x7f59793e, (q31_t)0x7f56eef5, (q31_t)0x7f545fc5,
+  (q31_t)0x7f51cbab, (q31_t)0x7f4f32a9,
+  (q31_t)0x7f4c94be, (q31_t)0x7f49f1eb, (q31_t)0x7f474a30, (q31_t)0x7f449d8c, (q31_t)0x7f41ec01, (q31_t)0x7f3f358d,
+  (q31_t)0x7f3c7a31, (q31_t)0x7f39b9ee,
+  (q31_t)0x7f36f4c3, (q31_t)0x7f342ab1, (q31_t)0x7f315bb7, (q31_t)0x7f2e87d6, (q31_t)0x7f2baf0d, (q31_t)0x7f28d15d,
+  (q31_t)0x7f25eec7, (q31_t)0x7f230749,
+  (q31_t)0x7f201ae5, (q31_t)0x7f1d299a, (q31_t)0x7f1a3368, (q31_t)0x7f173850, (q31_t)0x7f143852, (q31_t)0x7f11336d,
+  (q31_t)0x7f0e29a3, (q31_t)0x7f0b1af2,
+  (q31_t)0x7f08075c, (q31_t)0x7f04eedf, (q31_t)0x7f01d17d, (q31_t)0x7efeaf36, (q31_t)0x7efb8809, (q31_t)0x7ef85bf7,
+  (q31_t)0x7ef52b00, (q31_t)0x7ef1f524,
+  (q31_t)0x7eeeba62, (q31_t)0x7eeb7abc, (q31_t)0x7ee83632, (q31_t)0x7ee4ecc3, (q31_t)0x7ee19e6f, (q31_t)0x7ede4b38,
+  (q31_t)0x7edaf31c, (q31_t)0x7ed7961c,
+  (q31_t)0x7ed43438, (q31_t)0x7ed0cd70, (q31_t)0x7ecd61c5, (q31_t)0x7ec9f137, (q31_t)0x7ec67bc5, (q31_t)0x7ec3016f,
+  (q31_t)0x7ebf8237, (q31_t)0x7ebbfe1c,
+  (q31_t)0x7eb8751e, (q31_t)0x7eb4e73d, (q31_t)0x7eb1547a, (q31_t)0x7eadbcd4, (q31_t)0x7eaa204c, (q31_t)0x7ea67ee2,
+  (q31_t)0x7ea2d896, (q31_t)0x7e9f2d68,
+  (q31_t)0x7e9b7d58, (q31_t)0x7e97c867, (q31_t)0x7e940e94, (q31_t)0x7e904fe0, (q31_t)0x7e8c8c4b, (q31_t)0x7e88c3d5,
+  (q31_t)0x7e84f67e, (q31_t)0x7e812447,
+  (q31_t)0x7e7d4d2f, (q31_t)0x7e797136, (q31_t)0x7e75905d, (q31_t)0x7e71aaa4, (q31_t)0x7e6dc00c, (q31_t)0x7e69d093,
+  (q31_t)0x7e65dc3b, (q31_t)0x7e61e303,
+  (q31_t)0x7e5de4ec, (q31_t)0x7e59e1f5, (q31_t)0x7e55da20, (q31_t)0x7e51cd6c, (q31_t)0x7e4dbbd9, (q31_t)0x7e49a567,
+  (q31_t)0x7e458a17, (q31_t)0x7e4169e9,
+  (q31_t)0x7e3d44dd, (q31_t)0x7e391af3, (q31_t)0x7e34ec2b, (q31_t)0x7e30b885, (q31_t)0x7e2c8002, (q31_t)0x7e2842a2,
+  (q31_t)0x7e240064, (q31_t)0x7e1fb94a,
+  (q31_t)0x7e1b6d53, (q31_t)0x7e171c7f, (q31_t)0x7e12c6ce, (q31_t)0x7e0e6c42, (q31_t)0x7e0a0cd9, (q31_t)0x7e05a894,
+  (q31_t)0x7e013f74, (q31_t)0x7dfcd178,
+  (q31_t)0x7df85ea0, (q31_t)0x7df3e6ee, (q31_t)0x7def6a60, (q31_t)0x7deae8f7, (q31_t)0x7de662b3, (q31_t)0x7de1d795,
+  (q31_t)0x7ddd479d, (q31_t)0x7dd8b2ca,
+  (q31_t)0x7dd4191d, (q31_t)0x7dcf7a96, (q31_t)0x7dcad736, (q31_t)0x7dc62efc, (q31_t)0x7dc181e8, (q31_t)0x7dbccffc,
+  (q31_t)0x7db81936, (q31_t)0x7db35d98,
+  (q31_t)0x7dae9d21, (q31_t)0x7da9d7d2, (q31_t)0x7da50dab, (q31_t)0x7da03eab, (q31_t)0x7d9b6ad3, (q31_t)0x7d969224,
+  (q31_t)0x7d91b49e, (q31_t)0x7d8cd240,
+  (q31_t)0x7d87eb0a, (q31_t)0x7d82fefe, (q31_t)0x7d7e0e1c, (q31_t)0x7d791862, (q31_t)0x7d741dd2, (q31_t)0x7d6f1e6c,
+  (q31_t)0x7d6a1a31, (q31_t)0x7d65111f,
+  (q31_t)0x7d600338, (q31_t)0x7d5af07b, (q31_t)0x7d55d8e9, (q31_t)0x7d50bc82, (q31_t)0x7d4b9b46, (q31_t)0x7d467536,
+  (q31_t)0x7d414a51, (q31_t)0x7d3c1a98,
+  (q31_t)0x7d36e60b, (q31_t)0x7d31acaa, (q31_t)0x7d2c6e76, (q31_t)0x7d272b6e, (q31_t)0x7d21e393, (q31_t)0x7d1c96e5,
+  (q31_t)0x7d174564, (q31_t)0x7d11ef11,
+  (q31_t)0x7d0c93eb, (q31_t)0x7d0733f3, (q31_t)0x7d01cf29, (q31_t)0x7cfc658d, (q31_t)0x7cf6f720, (q31_t)0x7cf183e1,
+  (q31_t)0x7cec0bd1, (q31_t)0x7ce68ef0,
+  (q31_t)0x7ce10d3f, (q31_t)0x7cdb86bd, (q31_t)0x7cd5fb6a, (q31_t)0x7cd06b48, (q31_t)0x7ccad656, (q31_t)0x7cc53c94,
+  (q31_t)0x7cbf9e03, (q31_t)0x7cb9faa2,
+  (q31_t)0x7cb45272, (q31_t)0x7caea574, (q31_t)0x7ca8f3a7, (q31_t)0x7ca33d0c, (q31_t)0x7c9d81a3, (q31_t)0x7c97c16b,
+  (q31_t)0x7c91fc66, (q31_t)0x7c8c3294,
+  (q31_t)0x7c8663f4, (q31_t)0x7c809088, (q31_t)0x7c7ab84e, (q31_t)0x7c74db48, (q31_t)0x7c6ef976, (q31_t)0x7c6912d7,
+  (q31_t)0x7c63276d, (q31_t)0x7c5d3737,
+  (q31_t)0x7c574236, (q31_t)0x7c514869, (q31_t)0x7c4b49d2, (q31_t)0x7c45466f, (q31_t)0x7c3f3e42, (q31_t)0x7c39314b,
+  (q31_t)0x7c331f8a, (q31_t)0x7c2d08ff,
+  (q31_t)0x7c26edab, (q31_t)0x7c20cd8d, (q31_t)0x7c1aa8a6, (q31_t)0x7c147ef6, (q31_t)0x7c0e507e, (q31_t)0x7c081d3d,
+  (q31_t)0x7c01e534, (q31_t)0x7bfba863,
+  (q31_t)0x7bf566cb, (q31_t)0x7bef206b, (q31_t)0x7be8d544, (q31_t)0x7be28556, (q31_t)0x7bdc30a1, (q31_t)0x7bd5d726,
+  (q31_t)0x7bcf78e5, (q31_t)0x7bc915dd,
+  (q31_t)0x7bc2ae10, (q31_t)0x7bbc417e, (q31_t)0x7bb5d026, (q31_t)0x7baf5a09, (q31_t)0x7ba8df28, (q31_t)0x7ba25f82,
+  (q31_t)0x7b9bdb18, (q31_t)0x7b9551ea,
+  (q31_t)0x7b8ec3f8, (q31_t)0x7b883143, (q31_t)0x7b8199ca, (q31_t)0x7b7afd8f, (q31_t)0x7b745c91, (q31_t)0x7b6db6d0,
+  (q31_t)0x7b670c4d, (q31_t)0x7b605d09,
+  (q31_t)0x7b59a902, (q31_t)0x7b52f03a, (q31_t)0x7b4c32b1, (q31_t)0x7b457068, (q31_t)0x7b3ea95d, (q31_t)0x7b37dd92,
+  (q31_t)0x7b310d07, (q31_t)0x7b2a37bc,
+  (q31_t)0x7b235db2, (q31_t)0x7b1c7ee8, (q31_t)0x7b159b5f, (q31_t)0x7b0eb318, (q31_t)0x7b07c612, (q31_t)0x7b00d44d,
+  (q31_t)0x7af9ddcb, (q31_t)0x7af2e28b,
+  (q31_t)0x7aebe28d, (q31_t)0x7ae4ddd2, (q31_t)0x7addd45b, (q31_t)0x7ad6c626, (q31_t)0x7acfb336, (q31_t)0x7ac89b89,
+  (q31_t)0x7ac17f20, (q31_t)0x7aba5dfc,
+  (q31_t)0x7ab3381d, (q31_t)0x7aac0d82, (q31_t)0x7aa4de2d, (q31_t)0x7a9daa1d, (q31_t)0x7a967153, (q31_t)0x7a8f33d0,
+  (q31_t)0x7a87f192, (q31_t)0x7a80aa9c,
+  (q31_t)0x7a795eec, (q31_t)0x7a720e84, (q31_t)0x7a6ab963, (q31_t)0x7a635f8a, (q31_t)0x7a5c00f9, (q31_t)0x7a549db0,
+  (q31_t)0x7a4d35b0, (q31_t)0x7a45c8f9,
+  (q31_t)0x7a3e578b, (q31_t)0x7a36e166, (q31_t)0x7a2f668c, (q31_t)0x7a27e6fb, (q31_t)0x7a2062b5, (q31_t)0x7a18d9b9,
+  (q31_t)0x7a114c09, (q31_t)0x7a09b9a4,
+  (q31_t)0x7a02228a, (q31_t)0x79fa86bc, (q31_t)0x79f2e63a, (q31_t)0x79eb4105, (q31_t)0x79e3971c, (q31_t)0x79dbe880,
+  (q31_t)0x79d43532, (q31_t)0x79cc7d31,
+  (q31_t)0x79c4c07e, (q31_t)0x79bcff19, (q31_t)0x79b53903, (q31_t)0x79ad6e3c, (q31_t)0x79a59ec3, (q31_t)0x799dca9a,
+  (q31_t)0x7995f1c1, (q31_t)0x798e1438,
+  (q31_t)0x798631ff, (q31_t)0x797e4b16, (q31_t)0x79765f7f, (q31_t)0x796e6f39, (q31_t)0x79667a44, (q31_t)0x795e80a1,
+  (q31_t)0x79568250, (q31_t)0x794e7f52,
+  (q31_t)0x794677a6, (q31_t)0x793e6b4e, (q31_t)0x79365a49, (q31_t)0x792e4497, (q31_t)0x79262a3a, (q31_t)0x791e0b31,
+  (q31_t)0x7915e77c, (q31_t)0x790dbf1d,
+  (q31_t)0x79059212, (q31_t)0x78fd605d, (q31_t)0x78f529fe, (q31_t)0x78eceef6, (q31_t)0x78e4af44, (q31_t)0x78dc6ae8,
+  (q31_t)0x78d421e4, (q31_t)0x78cbd437,
+  (q31_t)0x78c381e2, (q31_t)0x78bb2ae5, (q31_t)0x78b2cf41, (q31_t)0x78aa6ef5, (q31_t)0x78a20a03, (q31_t)0x7899a06a,
+  (q31_t)0x7891322a, (q31_t)0x7888bf45,
+  (q31_t)0x788047ba, (q31_t)0x7877cb89, (q31_t)0x786f4ab4, (q31_t)0x7866c53a, (q31_t)0x785e3b1c, (q31_t)0x7855ac5a,
+  (q31_t)0x784d18f4, (q31_t)0x784480ea,
+  (q31_t)0x783be43e, (q31_t)0x783342ef, (q31_t)0x782a9cfe, (q31_t)0x7821f26b, (q31_t)0x78194336, (q31_t)0x78108f60,
+  (q31_t)0x7807d6e9, (q31_t)0x77ff19d1,
+  (q31_t)0x77f65819, (q31_t)0x77ed91c0, (q31_t)0x77e4c6c9, (q31_t)0x77dbf732, (q31_t)0x77d322fc, (q31_t)0x77ca4a27,
+  (q31_t)0x77c16cb4, (q31_t)0x77b88aa3,
+  (q31_t)0x77afa3f5, (q31_t)0x77a6b8a9, (q31_t)0x779dc8c0, (q31_t)0x7794d43b, (q31_t)0x778bdb19, (q31_t)0x7782dd5c,
+  (q31_t)0x7779db03, (q31_t)0x7770d40f,
+  (q31_t)0x7767c880, (q31_t)0x775eb857, (q31_t)0x7755a394, (q31_t)0x774c8a36, (q31_t)0x77436c40, (q31_t)0x773a49b0,
+  (q31_t)0x77312287, (q31_t)0x7727f6c6,
+  (q31_t)0x771ec66e, (q31_t)0x7715917d, (q31_t)0x770c57f5, (q31_t)0x770319d6, (q31_t)0x76f9d721, (q31_t)0x76f08fd5,
+  (q31_t)0x76e743f4, (q31_t)0x76ddf37c,
+  (q31_t)0x76d49e70, (q31_t)0x76cb44cf, (q31_t)0x76c1e699, (q31_t)0x76b883d0, (q31_t)0x76af1c72, (q31_t)0x76a5b082,
+  (q31_t)0x769c3ffe, (q31_t)0x7692cae8,
+  (q31_t)0x7689513f, (q31_t)0x767fd304, (q31_t)0x76765038, (q31_t)0x766cc8db, (q31_t)0x76633ced, (q31_t)0x7659ac6f,
+  (q31_t)0x76501760, (q31_t)0x76467dc2,
+  (q31_t)0x763cdf94, (q31_t)0x76333cd8, (q31_t)0x7629958c, (q31_t)0x761fe9b3, (q31_t)0x7616394c, (q31_t)0x760c8457,
+  (q31_t)0x7602cad5, (q31_t)0x75f90cc7,
+  (q31_t)0x75ef4a2c, (q31_t)0x75e58305, (q31_t)0x75dbb753, (q31_t)0x75d1e715, (q31_t)0x75c8124d, (q31_t)0x75be38fa,
+  (q31_t)0x75b45b1d, (q31_t)0x75aa78b6,
+  (q31_t)0x75a091c6, (q31_t)0x7596a64d, (q31_t)0x758cb64c, (q31_t)0x7582c1c2, (q31_t)0x7578c8b0, (q31_t)0x756ecb18,
+  (q31_t)0x7564c8f8, (q31_t)0x755ac251,
+  (q31_t)0x7550b725, (q31_t)0x7546a772, (q31_t)0x753c933a, (q31_t)0x75327a7d, (q31_t)0x75285d3b, (q31_t)0x751e3b75,
+  (q31_t)0x7514152b, (q31_t)0x7509ea5d,
+  (q31_t)0x74ffbb0d, (q31_t)0x74f58739, (q31_t)0x74eb4ee3, (q31_t)0x74e1120c, (q31_t)0x74d6d0b2, (q31_t)0x74cc8ad8,
+  (q31_t)0x74c2407d, (q31_t)0x74b7f1a1,
+  (q31_t)0x74ad9e46, (q31_t)0x74a3466b, (q31_t)0x7498ea11, (q31_t)0x748e8938, (q31_t)0x748423e0, (q31_t)0x7479ba0b,
+  (q31_t)0x746f4bb8, (q31_t)0x7464d8e8,
+  (q31_t)0x745a619b, (q31_t)0x744fe5d2, (q31_t)0x7445658d, (q31_t)0x743ae0cc, (q31_t)0x74305790, (q31_t)0x7425c9da,
+  (q31_t)0x741b37a9, (q31_t)0x7410a0fe,
+  (q31_t)0x740605d9, (q31_t)0x73fb663c, (q31_t)0x73f0c226, (q31_t)0x73e61997, (q31_t)0x73db6c91, (q31_t)0x73d0bb13,
+  (q31_t)0x73c6051f, (q31_t)0x73bb4ab3,
+  (q31_t)0x73b08bd1, (q31_t)0x73a5c87a, (q31_t)0x739b00ad, (q31_t)0x7390346b, (q31_t)0x738563b5, (q31_t)0x737a8e8a,
+  (q31_t)0x736fb4ec, (q31_t)0x7364d6da,
+  (q31_t)0x7359f456, (q31_t)0x734f0d5f, (q31_t)0x734421f6, (q31_t)0x7339321b, (q31_t)0x732e3dcf, (q31_t)0x73234512,
+  (q31_t)0x731847e5, (q31_t)0x730d4648,
+  (q31_t)0x7302403c, (q31_t)0x72f735c0, (q31_t)0x72ec26d6, (q31_t)0x72e1137d, (q31_t)0x72d5fbb7, (q31_t)0x72cadf83,
+  (q31_t)0x72bfbee3, (q31_t)0x72b499d6,
+  (q31_t)0x72a9705c, (q31_t)0x729e4277, (q31_t)0x72931027, (q31_t)0x7287d96c, (q31_t)0x727c9e47, (q31_t)0x72715eb8,
+  (q31_t)0x72661abf, (q31_t)0x725ad25d,
+  (q31_t)0x724f8593, (q31_t)0x72443460, (q31_t)0x7238dec5, (q31_t)0x722d84c4, (q31_t)0x7222265b, (q31_t)0x7216c38c,
+  (q31_t)0x720b5c57, (q31_t)0x71fff0bc,
+  (q31_t)0x71f480bc, (q31_t)0x71e90c57, (q31_t)0x71dd938f, (q31_t)0x71d21662, (q31_t)0x71c694d2, (q31_t)0x71bb0edf,
+  (q31_t)0x71af848a, (q31_t)0x71a3f5d2,
+  (q31_t)0x719862b9, (q31_t)0x718ccb3f, (q31_t)0x71812f65, (q31_t)0x71758f29, (q31_t)0x7169ea8f, (q31_t)0x715e4194,
+  (q31_t)0x7152943b, (q31_t)0x7146e284,
+  (q31_t)0x713b2c6e, (q31_t)0x712f71fb, (q31_t)0x7123b32b, (q31_t)0x7117effe, (q31_t)0x710c2875, (q31_t)0x71005c90,
+  (q31_t)0x70f48c50, (q31_t)0x70e8b7b5,
+  (q31_t)0x70dcdec0, (q31_t)0x70d10171, (q31_t)0x70c51fc8, (q31_t)0x70b939c7, (q31_t)0x70ad4f6d, (q31_t)0x70a160ba,
+  (q31_t)0x70956db1, (q31_t)0x70897650,
+  (q31_t)0x707d7a98, (q31_t)0x70717a8a, (q31_t)0x70657626, (q31_t)0x70596d6d, (q31_t)0x704d6060, (q31_t)0x70414efd,
+  (q31_t)0x70353947, (q31_t)0x70291f3e,
+  (q31_t)0x701d00e1, (q31_t)0x7010de32, (q31_t)0x7004b731, (q31_t)0x6ff88bde, (q31_t)0x6fec5c3b, (q31_t)0x6fe02846,
+  (q31_t)0x6fd3f001, (q31_t)0x6fc7b36d,
+  (q31_t)0x6fbb728a, (q31_t)0x6faf2d57, (q31_t)0x6fa2e3d7, (q31_t)0x6f969608, (q31_t)0x6f8a43ed, (q31_t)0x6f7ded84,
+  (q31_t)0x6f7192cf, (q31_t)0x6f6533ce,
+  (q31_t)0x6f58d082, (q31_t)0x6f4c68eb, (q31_t)0x6f3ffd09, (q31_t)0x6f338cde, (q31_t)0x6f271868, (q31_t)0x6f1a9faa,
+  (q31_t)0x6f0e22a3, (q31_t)0x6f01a155,
+  (q31_t)0x6ef51bbe, (q31_t)0x6ee891e1, (q31_t)0x6edc03bc, (q31_t)0x6ecf7152, (q31_t)0x6ec2daa2, (q31_t)0x6eb63fad,
+  (q31_t)0x6ea9a073, (q31_t)0x6e9cfcf5,
+  (q31_t)0x6e905534, (q31_t)0x6e83a92f, (q31_t)0x6e76f8e7, (q31_t)0x6e6a445d, (q31_t)0x6e5d8b91, (q31_t)0x6e50ce84,
+  (q31_t)0x6e440d37, (q31_t)0x6e3747a9,
+  (q31_t)0x6e2a7ddb, (q31_t)0x6e1dafce, (q31_t)0x6e10dd82, (q31_t)0x6e0406f8, (q31_t)0x6df72c30, (q31_t)0x6dea4d2b,
+  (q31_t)0x6ddd69e9, (q31_t)0x6dd0826a,
+  (q31_t)0x6dc396b0, (q31_t)0x6db6a6ba, (q31_t)0x6da9b28a, (q31_t)0x6d9cba1f, (q31_t)0x6d8fbd7a, (q31_t)0x6d82bc9d,
+  (q31_t)0x6d75b786, (q31_t)0x6d68ae37,
+  (q31_t)0x6d5ba0b0, (q31_t)0x6d4e8ef2, (q31_t)0x6d4178fd, (q31_t)0x6d345ed1, (q31_t)0x6d274070, (q31_t)0x6d1a1dda,
+  (q31_t)0x6d0cf70f, (q31_t)0x6cffcc0f,
+  (q31_t)0x6cf29cdc, (q31_t)0x6ce56975, (q31_t)0x6cd831dc, (q31_t)0x6ccaf610, (q31_t)0x6cbdb613, (q31_t)0x6cb071e4,
+  (q31_t)0x6ca32985, (q31_t)0x6c95dcf6,
+  (q31_t)0x6c888c36, (q31_t)0x6c7b3748, (q31_t)0x6c6dde2b, (q31_t)0x6c6080e0, (q31_t)0x6c531f67, (q31_t)0x6c45b9c1,
+  (q31_t)0x6c384fef, (q31_t)0x6c2ae1f0,
+  (q31_t)0x6c1d6fc6, (q31_t)0x6c0ff971, (q31_t)0x6c027ef1, (q31_t)0x6bf50047, (q31_t)0x6be77d74, (q31_t)0x6bd9f677,
+  (q31_t)0x6bcc6b53, (q31_t)0x6bbedc06,
+  (q31_t)0x6bb14892, (q31_t)0x6ba3b0f7, (q31_t)0x6b961536, (q31_t)0x6b88754f, (q31_t)0x6b7ad142, (q31_t)0x6b6d2911,
+  (q31_t)0x6b5f7cbc, (q31_t)0x6b51cc42,
+  (q31_t)0x6b4417a6, (q31_t)0x6b365ee7, (q31_t)0x6b28a206, (q31_t)0x6b1ae103, (q31_t)0x6b0d1bdf, (q31_t)0x6aff529a,
+  (q31_t)0x6af18536, (q31_t)0x6ae3b3b2,
+  (q31_t)0x6ad5de0f, (q31_t)0x6ac8044e, (q31_t)0x6aba266e, (q31_t)0x6aac4472, (q31_t)0x6a9e5e58, (q31_t)0x6a907423,
+  (q31_t)0x6a8285d1, (q31_t)0x6a749365,
+  (q31_t)0x6a669cdd, (q31_t)0x6a58a23c, (q31_t)0x6a4aa381, (q31_t)0x6a3ca0ad, (q31_t)0x6a2e99c0, (q31_t)0x6a208ebb,
+  (q31_t)0x6a127f9f, (q31_t)0x6a046c6c,
+  (q31_t)0x69f65523, (q31_t)0x69e839c4, (q31_t)0x69da1a50, (q31_t)0x69cbf6c7, (q31_t)0x69bdcf29, (q31_t)0x69afa378,
+  (q31_t)0x69a173b5, (q31_t)0x69933fde,
+  (q31_t)0x698507f6, (q31_t)0x6976cbfc, (q31_t)0x69688bf1, (q31_t)0x695a47d6, (q31_t)0x694bffab, (q31_t)0x693db371,
+  (q31_t)0x692f6328, (q31_t)0x69210ed1,
+  (q31_t)0x6912b66c, (q31_t)0x690459fb, (q31_t)0x68f5f97d, (q31_t)0x68e794f3, (q31_t)0x68d92c5d, (q31_t)0x68cabfbd,
+  (q31_t)0x68bc4f13, (q31_t)0x68adda5f,
+  (q31_t)0x689f61a1, (q31_t)0x6890e4dc, (q31_t)0x6882640e, (q31_t)0x6873df38, (q31_t)0x6865565c, (q31_t)0x6856c979,
+  (q31_t)0x68483891, (q31_t)0x6839a3a4,
+  (q31_t)0x682b0ab1, (q31_t)0x681c6dbb, (q31_t)0x680dccc1, (q31_t)0x67ff27c4, (q31_t)0x67f07ec5, (q31_t)0x67e1d1c4,
+  (q31_t)0x67d320c1, (q31_t)0x67c46bbe,
+  (q31_t)0x67b5b2bb, (q31_t)0x67a6f5b8, (q31_t)0x679834b6, (q31_t)0x67896fb6, (q31_t)0x677aa6b8, (q31_t)0x676bd9bd,
+  (q31_t)0x675d08c4, (q31_t)0x674e33d0,
+  (q31_t)0x673f5ae0, (q31_t)0x67307df5, (q31_t)0x67219d10, (q31_t)0x6712b831, (q31_t)0x6703cf58, (q31_t)0x66f4e287,
+  (q31_t)0x66e5f1be, (q31_t)0x66d6fcfd,
+  (q31_t)0x66c80445, (q31_t)0x66b90797, (q31_t)0x66aa06f3, (q31_t)0x669b0259, (q31_t)0x668bf9cb, (q31_t)0x667ced49,
+  (q31_t)0x666ddcd3, (q31_t)0x665ec86b,
+  (q31_t)0x664fb010, (q31_t)0x664093c3, (q31_t)0x66317385, (q31_t)0x66224f56, (q31_t)0x66132738, (q31_t)0x6603fb2a,
+  (q31_t)0x65f4cb2d, (q31_t)0x65e59742,
+  (q31_t)0x65d65f69, (q31_t)0x65c723a3, (q31_t)0x65b7e3f1, (q31_t)0x65a8a052, (q31_t)0x659958c9, (q31_t)0x658a0d54,
+  (q31_t)0x657abdf6, (q31_t)0x656b6aae,
+  (q31_t)0x655c137d, (q31_t)0x654cb863, (q31_t)0x653d5962, (q31_t)0x652df679, (q31_t)0x651e8faa, (q31_t)0x650f24f5,
+  (q31_t)0x64ffb65b, (q31_t)0x64f043dc,
+  (q31_t)0x64e0cd78, (q31_t)0x64d15331, (q31_t)0x64c1d507, (q31_t)0x64b252fa, (q31_t)0x64a2cd0c, (q31_t)0x6493433c,
+  (q31_t)0x6483b58c, (q31_t)0x647423fb,
+  (q31_t)0x64648e8c, (q31_t)0x6454f53d, (q31_t)0x64455810, (q31_t)0x6435b706, (q31_t)0x6426121e, (q31_t)0x6416695a,
+  (q31_t)0x6406bcba, (q31_t)0x63f70c3f,
+  (q31_t)0x63e757ea, (q31_t)0x63d79fba, (q31_t)0x63c7e3b1, (q31_t)0x63b823cf, (q31_t)0x63a86015, (q31_t)0x63989884,
+  (q31_t)0x6388cd1b, (q31_t)0x6378fddc,
+  (q31_t)0x63692ac7, (q31_t)0x635953dd, (q31_t)0x6349791f, (q31_t)0x63399a8d, (q31_t)0x6329b827, (q31_t)0x6319d1ef,
+  (q31_t)0x6309e7e4, (q31_t)0x62f9fa09,
+  (q31_t)0x62ea085c, (q31_t)0x62da12df, (q31_t)0x62ca1992, (q31_t)0x62ba1c77, (q31_t)0x62aa1b8d, (q31_t)0x629a16d5,
+  (q31_t)0x628a0e50, (q31_t)0x627a01fe,
+  (q31_t)0x6269f1e1, (q31_t)0x6259ddf8, (q31_t)0x6249c645, (q31_t)0x6239aac7, (q31_t)0x62298b81, (q31_t)0x62196871,
+  (q31_t)0x62094199, (q31_t)0x61f916f9,
+  (q31_t)0x61e8e893, (q31_t)0x61d8b666, (q31_t)0x61c88074, (q31_t)0x61b846bc, (q31_t)0x61a80940, (q31_t)0x6197c800,
+  (q31_t)0x618782fd, (q31_t)0x61773a37,
+  (q31_t)0x6166edb0, (q31_t)0x61569d67, (q31_t)0x6146495d, (q31_t)0x6135f193, (q31_t)0x6125960a, (q31_t)0x611536c2,
+  (q31_t)0x6104d3bc, (q31_t)0x60f46cf9,
+  (q31_t)0x60e40278, (q31_t)0x60d3943b, (q31_t)0x60c32243, (q31_t)0x60b2ac8f, (q31_t)0x60a23322, (q31_t)0x6091b5fa,
+  (q31_t)0x60813519, (q31_t)0x6070b080,
+  (q31_t)0x6060282f, (q31_t)0x604f9c27, (q31_t)0x603f0c69, (q31_t)0x602e78f4, (q31_t)0x601de1ca, (q31_t)0x600d46ec,
+  (q31_t)0x5ffca859, (q31_t)0x5fec0613,
+  (q31_t)0x5fdb601b, (q31_t)0x5fcab670, (q31_t)0x5fba0914, (q31_t)0x5fa95807, (q31_t)0x5f98a34a, (q31_t)0x5f87eade,
+  (q31_t)0x5f772ec2, (q31_t)0x5f666ef9,
+  (q31_t)0x5f55ab82, (q31_t)0x5f44e45e, (q31_t)0x5f34198e, (q31_t)0x5f234b12, (q31_t)0x5f1278eb, (q31_t)0x5f01a31a,
+  (q31_t)0x5ef0c99f, (q31_t)0x5edfec7b,
+  (q31_t)0x5ecf0baf, (q31_t)0x5ebe273b, (q31_t)0x5ead3f1f, (q31_t)0x5e9c535e, (q31_t)0x5e8b63f7, (q31_t)0x5e7a70ea,
+  (q31_t)0x5e697a39, (q31_t)0x5e587fe5,
+  (q31_t)0x5e4781ed, (q31_t)0x5e368053, (q31_t)0x5e257b17, (q31_t)0x5e147239, (q31_t)0x5e0365bb, (q31_t)0x5df2559e,
+  (q31_t)0x5de141e1, (q31_t)0x5dd02a85,
+  (q31_t)0x5dbf0f8c, (q31_t)0x5dadf0f5, (q31_t)0x5d9ccec2, (q31_t)0x5d8ba8f3, (q31_t)0x5d7a7f88, (q31_t)0x5d695283,
+  (q31_t)0x5d5821e4, (q31_t)0x5d46edac,
+  (q31_t)0x5d35b5db, (q31_t)0x5d247a72, (q31_t)0x5d133b72, (q31_t)0x5d01f8dc, (q31_t)0x5cf0b2af, (q31_t)0x5cdf68ed,
+  (q31_t)0x5cce1b97, (q31_t)0x5cbccaac,
+  (q31_t)0x5cab762f, (q31_t)0x5c9a1e1e, (q31_t)0x5c88c27c, (q31_t)0x5c776348, (q31_t)0x5c660084, (q31_t)0x5c549a30,
+  (q31_t)0x5c43304d, (q31_t)0x5c31c2db,
+  (q31_t)0x5c2051db, (q31_t)0x5c0edd4e, (q31_t)0x5bfd6534, (q31_t)0x5bebe98e, (q31_t)0x5bda6a5d, (q31_t)0x5bc8e7a2,
+  (q31_t)0x5bb7615d, (q31_t)0x5ba5d78e,
+  (q31_t)0x5b944a37, (q31_t)0x5b82b958, (q31_t)0x5b7124f2, (q31_t)0x5b5f8d06, (q31_t)0x5b4df193, (q31_t)0x5b3c529c,
+  (q31_t)0x5b2ab020, (q31_t)0x5b190a20,
+  (q31_t)0x5b07609d, (q31_t)0x5af5b398, (q31_t)0x5ae40311, (q31_t)0x5ad24f09, (q31_t)0x5ac09781, (q31_t)0x5aaedc78,
+  (q31_t)0x5a9d1df1, (q31_t)0x5a8b5bec,
+  (q31_t)0x5a799669, (q31_t)0x5a67cd69, (q31_t)0x5a5600ec, (q31_t)0x5a4430f5, (q31_t)0x5a325d82, (q31_t)0x5a208695,
+  (q31_t)0x5a0eac2e, (q31_t)0x59fcce4f,
+  (q31_t)0x59eaecf8, (q31_t)0x59d90829, (q31_t)0x59c71fe3, (q31_t)0x59b53427, (q31_t)0x59a344f6, (q31_t)0x59915250,
+  (q31_t)0x597f5c36, (q31_t)0x596d62a9,
+  (q31_t)0x595b65aa, (q31_t)0x59496538, (q31_t)0x59376155, (q31_t)0x59255a02, (q31_t)0x59134f3e, (q31_t)0x5901410c,
+  (q31_t)0x58ef2f6b, (q31_t)0x58dd1a5d,
+  (q31_t)0x58cb01e1, (q31_t)0x58b8e5f9, (q31_t)0x58a6c6a5, (q31_t)0x5894a3e7, (q31_t)0x58827dbe, (q31_t)0x5870542c,
+  (q31_t)0x585e2730, (q31_t)0x584bf6cd,
+  (q31_t)0x5839c302, (q31_t)0x58278bd1, (q31_t)0x58155139, (q31_t)0x5803133c, (q31_t)0x57f0d1da, (q31_t)0x57de8d15,
+  (q31_t)0x57cc44ec, (q31_t)0x57b9f960,
+  (q31_t)0x57a7aa73, (q31_t)0x57955825, (q31_t)0x57830276, (q31_t)0x5770a968, (q31_t)0x575e4cfa, (q31_t)0x574bed2f,
+  (q31_t)0x57398a05, (q31_t)0x5727237f,
+  (q31_t)0x5714b99d, (q31_t)0x57024c5f, (q31_t)0x56efdbc7, (q31_t)0x56dd67d4, (q31_t)0x56caf088, (q31_t)0x56b875e4,
+  (q31_t)0x56a5f7e7, (q31_t)0x56937694,
+  (q31_t)0x5680f1ea, (q31_t)0x566e69ea, (q31_t)0x565bde95, (q31_t)0x56494fec, (q31_t)0x5636bdef, (q31_t)0x5624289f,
+  (q31_t)0x56118ffe, (q31_t)0x55fef40a,
+  (q31_t)0x55ec54c6, (q31_t)0x55d9b232, (q31_t)0x55c70c4f, (q31_t)0x55b4631d, (q31_t)0x55a1b69d, (q31_t)0x558f06d0,
+  (q31_t)0x557c53b6, (q31_t)0x55699d51,
+  (q31_t)0x5556e3a1, (q31_t)0x554426a7, (q31_t)0x55316663, (q31_t)0x551ea2d6, (q31_t)0x550bdc01, (q31_t)0x54f911e5,
+  (q31_t)0x54e64482, (q31_t)0x54d373d9,
+  (q31_t)0x54c09feb, (q31_t)0x54adc8b8, (q31_t)0x549aee42, (q31_t)0x54881089, (q31_t)0x54752f8d, (q31_t)0x54624b50,
+  (q31_t)0x544f63d2, (q31_t)0x543c7914,
+  (q31_t)0x54298b17, (q31_t)0x541699db, (q31_t)0x5403a561, (q31_t)0x53f0adaa, (q31_t)0x53ddb2b6, (q31_t)0x53cab486,
+  (q31_t)0x53b7b31c, (q31_t)0x53a4ae77,
+  (q31_t)0x5391a699, (q31_t)0x537e9b82, (q31_t)0x536b8d33, (q31_t)0x53587bad, (q31_t)0x534566f0, (q31_t)0x53324efd,
+  (q31_t)0x531f33d5, (q31_t)0x530c1579,
+  (q31_t)0x52f8f3e9, (q31_t)0x52e5cf27, (q31_t)0x52d2a732, (q31_t)0x52bf7c0b, (q31_t)0x52ac4db4, (q31_t)0x52991c2d,
+  (q31_t)0x5285e777, (q31_t)0x5272af92,
+  (q31_t)0x525f7480, (q31_t)0x524c3640, (q31_t)0x5238f4d4, (q31_t)0x5225b03d, (q31_t)0x5212687b, (q31_t)0x51ff1d8f,
+  (q31_t)0x51ebcf7a, (q31_t)0x51d87e3c,
+  (q31_t)0x51c529d7, (q31_t)0x51b1d24a, (q31_t)0x519e7797, (q31_t)0x518b19bf, (q31_t)0x5177b8c2, (q31_t)0x516454a0,
+  (q31_t)0x5150ed5c, (q31_t)0x513d82f4,
+  (q31_t)0x512a156b, (q31_t)0x5116a4c1, (q31_t)0x510330f7, (q31_t)0x50efba0d, (q31_t)0x50dc4005, (q31_t)0x50c8c2de,
+  (q31_t)0x50b5429a, (q31_t)0x50a1bf39,
+  (q31_t)0x508e38bd, (q31_t)0x507aaf25, (q31_t)0x50672273, (q31_t)0x505392a8, (q31_t)0x503fffc4, (q31_t)0x502c69c8,
+  (q31_t)0x5018d0b4, (q31_t)0x5005348a,
+  (q31_t)0x4ff1954b, (q31_t)0x4fddf2f6, (q31_t)0x4fca4d8d, (q31_t)0x4fb6a510, (q31_t)0x4fa2f981, (q31_t)0x4f8f4ae0,
+  (q31_t)0x4f7b992d, (q31_t)0x4f67e46a,
+  (q31_t)0x4f542c98, (q31_t)0x4f4071b6, (q31_t)0x4f2cb3c7, (q31_t)0x4f18f2c9, (q31_t)0x4f052ec0, (q31_t)0x4ef167aa,
+  (q31_t)0x4edd9d89, (q31_t)0x4ec9d05e,
+  (q31_t)0x4eb60029, (q31_t)0x4ea22ceb, (q31_t)0x4e8e56a5, (q31_t)0x4e7a7d58, (q31_t)0x4e66a105, (q31_t)0x4e52c1ab,
+  (q31_t)0x4e3edf4d, (q31_t)0x4e2af9ea,
+  (q31_t)0x4e171184, (q31_t)0x4e03261b, (q31_t)0x4def37b0, (q31_t)0x4ddb4644, (q31_t)0x4dc751d8, (q31_t)0x4db35a6c,
+  (q31_t)0x4d9f6001, (q31_t)0x4d8b6298,
+  (q31_t)0x4d776231, (q31_t)0x4d635ece, (q31_t)0x4d4f5870, (q31_t)0x4d3b4f16, (q31_t)0x4d2742c2, (q31_t)0x4d133374,
+  (q31_t)0x4cff212e, (q31_t)0x4ceb0bf0,
+  (q31_t)0x4cd6f3bb, (q31_t)0x4cc2d88f, (q31_t)0x4caeba6e, (q31_t)0x4c9a9958, (q31_t)0x4c86754e, (q31_t)0x4c724e50,
+  (q31_t)0x4c5e2460, (q31_t)0x4c49f77f,
+  (q31_t)0x4c35c7ac, (q31_t)0x4c2194e9, (q31_t)0x4c0d5f37, (q31_t)0x4bf92697, (q31_t)0x4be4eb08, (q31_t)0x4bd0ac8d,
+  (q31_t)0x4bbc6b25, (q31_t)0x4ba826d1,
+  (q31_t)0x4b93df93, (q31_t)0x4b7f956b, (q31_t)0x4b6b485a, (q31_t)0x4b56f861, (q31_t)0x4b42a580, (q31_t)0x4b2e4fb8,
+  (q31_t)0x4b19f70a, (q31_t)0x4b059b77,
+  (q31_t)0x4af13d00, (q31_t)0x4adcdba5, (q31_t)0x4ac87767, (q31_t)0x4ab41046, (q31_t)0x4a9fa645, (q31_t)0x4a8b3963,
+  (q31_t)0x4a76c9a2, (q31_t)0x4a625701,
+  (q31_t)0x4a4de182, (q31_t)0x4a396926, (q31_t)0x4a24edee, (q31_t)0x4a106fda, (q31_t)0x49fbeeea, (q31_t)0x49e76b21,
+  (q31_t)0x49d2e47e, (q31_t)0x49be5b02,
+  (q31_t)0x49a9ceaf, (q31_t)0x49953f84, (q31_t)0x4980ad84, (q31_t)0x496c18ae, (q31_t)0x49578103, (q31_t)0x4942e684,
+  (q31_t)0x492e4933, (q31_t)0x4919a90f,
+  (q31_t)0x4905061a, (q31_t)0x48f06054, (q31_t)0x48dbb7be, (q31_t)0x48c70c59, (q31_t)0x48b25e25, (q31_t)0x489dad25,
+  (q31_t)0x4888f957, (q31_t)0x487442be,
+  (q31_t)0x485f8959, (q31_t)0x484acd2a, (q31_t)0x48360e32, (q31_t)0x48214c71, (q31_t)0x480c87e8, (q31_t)0x47f7c099,
+  (q31_t)0x47e2f682, (q31_t)0x47ce29a7,
+  (q31_t)0x47b95a06, (q31_t)0x47a487a2, (q31_t)0x478fb27b, (q31_t)0x477ada91, (q31_t)0x4765ffe6, (q31_t)0x4751227a,
+  (q31_t)0x473c424e, (q31_t)0x47275f63,
+  (q31_t)0x471279ba, (q31_t)0x46fd9154, (q31_t)0x46e8a631, (q31_t)0x46d3b852, (q31_t)0x46bec7b8, (q31_t)0x46a9d464,
+  (q31_t)0x4694de56, (q31_t)0x467fe590,
+  (q31_t)0x466aea12, (q31_t)0x4655ebdd, (q31_t)0x4640eaf2, (q31_t)0x462be751, (q31_t)0x4616e0fc, (q31_t)0x4601d7f3,
+  (q31_t)0x45eccc37, (q31_t)0x45d7bdc9,
+  (q31_t)0x45c2acaa, (q31_t)0x45ad98da, (q31_t)0x4598825a, (q31_t)0x4583692c, (q31_t)0x456e4d4f, (q31_t)0x45592ec6,
+  (q31_t)0x45440d90, (q31_t)0x452ee9ae,
+  (q31_t)0x4519c321, (q31_t)0x450499eb, (q31_t)0x44ef6e0b, (q31_t)0x44da3f83, (q31_t)0x44c50e53, (q31_t)0x44afda7d,
+  (q31_t)0x449aa400, (q31_t)0x44856adf,
+  (q31_t)0x44702f19, (q31_t)0x445af0b0, (q31_t)0x4445afa4, (q31_t)0x44306bf6, (q31_t)0x441b25a8, (q31_t)0x4405dcb9,
+  (q31_t)0x43f0912b, (q31_t)0x43db42fe,
+  (q31_t)0x43c5f234, (q31_t)0x43b09ecc, (q31_t)0x439b48c9, (q31_t)0x4385f02a, (q31_t)0x437094f1, (q31_t)0x435b371f,
+  (q31_t)0x4345d6b3, (q31_t)0x433073b0,
+  (q31_t)0x431b0e15, (q31_t)0x4305a5e5, (q31_t)0x42f03b1e, (q31_t)0x42dacdc3, (q31_t)0x42c55dd4, (q31_t)0x42afeb53,
+  (q31_t)0x429a763f, (q31_t)0x4284fe99,
+  (q31_t)0x426f8463, (q31_t)0x425a079e, (q31_t)0x42448849, (q31_t)0x422f0667, (q31_t)0x421981f7, (q31_t)0x4203fafb,
+  (q31_t)0x41ee7174, (q31_t)0x41d8e561,
+  (q31_t)0x41c356c5, (q31_t)0x41adc5a0, (q31_t)0x419831f3, (q31_t)0x41829bbe, (q31_t)0x416d0302, (q31_t)0x415767c1,
+  (q31_t)0x4141c9fb, (q31_t)0x412c29b1,
+  (q31_t)0x411686e4, (q31_t)0x4100e194, (q31_t)0x40eb39c3, (q31_t)0x40d58f71, (q31_t)0x40bfe29f, (q31_t)0x40aa334e,
+  (q31_t)0x4094817f, (q31_t)0x407ecd32,
+  (q31_t)0x40691669, (q31_t)0x40535d24, (q31_t)0x403da165, (q31_t)0x4027e32b, (q31_t)0x40122278, (q31_t)0x3ffc5f4d,
+  (q31_t)0x3fe699aa, (q31_t)0x3fd0d191,
+  (q31_t)0x3fbb0702, (q31_t)0x3fa539fd, (q31_t)0x3f8f6a85, (q31_t)0x3f799899, (q31_t)0x3f63c43b, (q31_t)0x3f4ded6b,
+  (q31_t)0x3f38142a, (q31_t)0x3f22387a,
+  (q31_t)0x3f0c5a5a, (q31_t)0x3ef679cc, (q31_t)0x3ee096d1, (q31_t)0x3ecab169, (q31_t)0x3eb4c995, (q31_t)0x3e9edf57,
+  (q31_t)0x3e88f2ae, (q31_t)0x3e73039d,
+  (q31_t)0x3e5d1222, (q31_t)0x3e471e41, (q31_t)0x3e3127f9, (q31_t)0x3e1b2f4a, (q31_t)0x3e053437, (q31_t)0x3def36c0,
+  (q31_t)0x3dd936e6, (q31_t)0x3dc334a9,
+  (q31_t)0x3dad300b, (q31_t)0x3d97290b, (q31_t)0x3d811fac, (q31_t)0x3d6b13ee, (q31_t)0x3d5505d2, (q31_t)0x3d3ef559,
+  (q31_t)0x3d28e282, (q31_t)0x3d12cd51,
+  (q31_t)0x3cfcb5c4, (q31_t)0x3ce69bde, (q31_t)0x3cd07f9f, (q31_t)0x3cba6107, (q31_t)0x3ca44018, (q31_t)0x3c8e1cd3,
+  (q31_t)0x3c77f737, (q31_t)0x3c61cf48,
+  (q31_t)0x3c4ba504, (q31_t)0x3c35786d, (q31_t)0x3c1f4983, (q31_t)0x3c091849, (q31_t)0x3bf2e4be, (q31_t)0x3bdcaee3,
+  (q31_t)0x3bc676b9, (q31_t)0x3bb03c42,
+  (q31_t)0x3b99ff7d, (q31_t)0x3b83c06c, (q31_t)0x3b6d7f10, (q31_t)0x3b573b69, (q31_t)0x3b40f579, (q31_t)0x3b2aad3f,
+  (q31_t)0x3b1462be, (q31_t)0x3afe15f6,
+  (q31_t)0x3ae7c6e7, (q31_t)0x3ad17593, (q31_t)0x3abb21fb, (q31_t)0x3aa4cc1e, (q31_t)0x3a8e7400, (q31_t)0x3a78199f,
+  (q31_t)0x3a61bcfd, (q31_t)0x3a4b5e1b,
+  (q31_t)0x3a34fcf9, (q31_t)0x3a1e9999, (q31_t)0x3a0833fc, (q31_t)0x39f1cc21, (q31_t)0x39db620b, (q31_t)0x39c4f5ba,
+  (q31_t)0x39ae872f, (q31_t)0x3998166a,
+  (q31_t)0x3981a36d, (q31_t)0x396b2e38, (q31_t)0x3954b6cd, (q31_t)0x393e3d2c, (q31_t)0x3927c155, (q31_t)0x3911434b,
+  (q31_t)0x38fac30e, (q31_t)0x38e4409e,
+  (q31_t)0x38cdbbfc, (q31_t)0x38b7352a, (q31_t)0x38a0ac29, (q31_t)0x388a20f8, (q31_t)0x38739399, (q31_t)0x385d040d,
+  (q31_t)0x38467255, (q31_t)0x382fde72,
+  (q31_t)0x38194864, (q31_t)0x3802b02c, (q31_t)0x37ec15cb, (q31_t)0x37d57943, (q31_t)0x37beda93, (q31_t)0x37a839be,
+  (q31_t)0x379196c3, (q31_t)0x377af1a3,
+  (q31_t)0x37644a60, (q31_t)0x374da0fa, (q31_t)0x3736f573, (q31_t)0x372047ca, (q31_t)0x37099802, (q31_t)0x36f2e61a,
+  (q31_t)0x36dc3214, (q31_t)0x36c57bf0,
+  (q31_t)0x36aec3b0, (q31_t)0x36980954, (q31_t)0x36814cde, (q31_t)0x366a8e4d, (q31_t)0x3653cda3, (q31_t)0x363d0ae2,
+  (q31_t)0x36264609, (q31_t)0x360f7f19,
+  (q31_t)0x35f8b614, (q31_t)0x35e1eafa, (q31_t)0x35cb1dcc, (q31_t)0x35b44e8c, (q31_t)0x359d7d39, (q31_t)0x3586a9d5,
+  (q31_t)0x356fd461, (q31_t)0x3558fcde,
+  (q31_t)0x3542234c, (q31_t)0x352b47ad, (q31_t)0x35146a00, (q31_t)0x34fd8a48, (q31_t)0x34e6a885, (q31_t)0x34cfc4b7,
+  (q31_t)0x34b8dee1, (q31_t)0x34a1f702,
+  (q31_t)0x348b0d1c, (q31_t)0x3474212f, (q31_t)0x345d333c, (q31_t)0x34464345, (q31_t)0x342f5149, (q31_t)0x34185d4b,
+  (q31_t)0x3401674a, (q31_t)0x33ea6f48,
+  (q31_t)0x33d37546, (q31_t)0x33bc7944, (q31_t)0x33a57b44, (q31_t)0x338e7b46, (q31_t)0x3377794b, (q31_t)0x33607554,
+  (q31_t)0x33496f62, (q31_t)0x33326776,
+  (q31_t)0x331b5d91, (q31_t)0x330451b3, (q31_t)0x32ed43de, (q31_t)0x32d63412, (q31_t)0x32bf2250, (q31_t)0x32a80e99,
+  (q31_t)0x3290f8ef, (q31_t)0x3279e151,
+  (q31_t)0x3262c7c1, (q31_t)0x324bac40, (q31_t)0x32348ecf, (q31_t)0x321d6f6e, (q31_t)0x32064e1e, (q31_t)0x31ef2ae1,
+  (q31_t)0x31d805b7, (q31_t)0x31c0dea1,
+  (q31_t)0x31a9b5a0, (q31_t)0x31928ab4, (q31_t)0x317b5de0, (q31_t)0x31642f23, (q31_t)0x314cfe7f, (q31_t)0x3135cbf4,
+  (q31_t)0x311e9783, (q31_t)0x3107612e,
+  (q31_t)0x30f028f4, (q31_t)0x30d8eed8, (q31_t)0x30c1b2da, (q31_t)0x30aa74fa, (q31_t)0x3093353a, (q31_t)0x307bf39b,
+  (q31_t)0x3064b01d, (q31_t)0x304d6ac1,
+  (q31_t)0x30362389, (q31_t)0x301eda75, (q31_t)0x30078f86, (q31_t)0x2ff042bd, (q31_t)0x2fd8f41b, (q31_t)0x2fc1a3a0,
+  (q31_t)0x2faa514f, (q31_t)0x2f92fd26,
+  (q31_t)0x2f7ba729, (q31_t)0x2f644f56, (q31_t)0x2f4cf5b0, (q31_t)0x2f359a37, (q31_t)0x2f1e3ced, (q31_t)0x2f06ddd1,
+  (q31_t)0x2eef7ce5, (q31_t)0x2ed81a29,
+  (q31_t)0x2ec0b5a0, (q31_t)0x2ea94f49, (q31_t)0x2e91e725, (q31_t)0x2e7a7d36, (q31_t)0x2e63117c, (q31_t)0x2e4ba3f8,
+  (q31_t)0x2e3434ac, (q31_t)0x2e1cc397,
+  (q31_t)0x2e0550bb, (q31_t)0x2deddc19, (q31_t)0x2dd665b2, (q31_t)0x2dbeed86, (q31_t)0x2da77397, (q31_t)0x2d8ff7e5,
+  (q31_t)0x2d787a72, (q31_t)0x2d60fb3e,
+  (q31_t)0x2d497a4a, (q31_t)0x2d31f797, (q31_t)0x2d1a7325, (q31_t)0x2d02ecf7, (q31_t)0x2ceb650d, (q31_t)0x2cd3db67,
+  (q31_t)0x2cbc5006, (q31_t)0x2ca4c2ed,
+  (q31_t)0x2c8d341a, (q31_t)0x2c75a390, (q31_t)0x2c5e114f, (q31_t)0x2c467d58, (q31_t)0x2c2ee7ad, (q31_t)0x2c17504d,
+  (q31_t)0x2bffb73a, (q31_t)0x2be81c74,
+  (q31_t)0x2bd07ffe, (q31_t)0x2bb8e1d7, (q31_t)0x2ba14200, (q31_t)0x2b89a07b, (q31_t)0x2b71fd48, (q31_t)0x2b5a5868,
+  (q31_t)0x2b42b1dd, (q31_t)0x2b2b09a6,
+  (q31_t)0x2b135fc6, (q31_t)0x2afbb43c, (q31_t)0x2ae4070a, (q31_t)0x2acc5831, (q31_t)0x2ab4a7b1, (q31_t)0x2a9cf58c,
+  (q31_t)0x2a8541c3, (q31_t)0x2a6d8c55,
+  (q31_t)0x2a55d545, (q31_t)0x2a3e1c93, (q31_t)0x2a266240, (q31_t)0x2a0ea64d, (q31_t)0x29f6e8bb, (q31_t)0x29df298b,
+  (q31_t)0x29c768be, (q31_t)0x29afa654,
+  (q31_t)0x2997e24f, (q31_t)0x29801caf, (q31_t)0x29685576, (q31_t)0x29508ca4, (q31_t)0x2938c23a, (q31_t)0x2920f63a,
+  (q31_t)0x290928a3, (q31_t)0x28f15978,
+  (q31_t)0x28d988b8, (q31_t)0x28c1b666, (q31_t)0x28a9e281, (q31_t)0x28920d0a, (q31_t)0x287a3604, (q31_t)0x28625d6d,
+  (q31_t)0x284a8349, (q31_t)0x2832a796,
+  (q31_t)0x281aca57, (q31_t)0x2802eb8c, (q31_t)0x27eb0b36, (q31_t)0x27d32956, (q31_t)0x27bb45ed, (q31_t)0x27a360fc,
+  (q31_t)0x278b7a84, (q31_t)0x27739285,
+  (q31_t)0x275ba901, (q31_t)0x2743bdf9, (q31_t)0x272bd16d, (q31_t)0x2713e35f, (q31_t)0x26fbf3ce, (q31_t)0x26e402bd,
+  (q31_t)0x26cc102d, (q31_t)0x26b41c1d,
+  (q31_t)0x269c268f, (q31_t)0x26842f84, (q31_t)0x266c36fe, (q31_t)0x26543cfb, (q31_t)0x263c417f, (q31_t)0x26244489,
+  (q31_t)0x260c461b, (q31_t)0x25f44635,
+  (q31_t)0x25dc44d9, (q31_t)0x25c44207, (q31_t)0x25ac3dc0, (q31_t)0x25943806, (q31_t)0x257c30d8, (q31_t)0x25642839,
+  (q31_t)0x254c1e28, (q31_t)0x253412a8,
+  (q31_t)0x251c05b8, (q31_t)0x2503f75a, (q31_t)0x24ebe78f, (q31_t)0x24d3d657, (q31_t)0x24bbc3b4, (q31_t)0x24a3afa6,
+  (q31_t)0x248b9a2f, (q31_t)0x2473834f,
+  (q31_t)0x245b6b07, (q31_t)0x24435158, (q31_t)0x242b3644, (q31_t)0x241319ca, (q31_t)0x23fafbec, (q31_t)0x23e2dcac,
+  (q31_t)0x23cabc09, (q31_t)0x23b29a05,
+  (q31_t)0x239a76a0, (q31_t)0x238251dd, (q31_t)0x236a2bba, (q31_t)0x2352043b, (q31_t)0x2339db5e, (q31_t)0x2321b126,
+  (q31_t)0x23098593, (q31_t)0x22f158a7,
+  (q31_t)0x22d92a61, (q31_t)0x22c0fac4, (q31_t)0x22a8c9cf, (q31_t)0x22909785, (q31_t)0x227863e5, (q31_t)0x22602ef1,
+  (q31_t)0x2247f8aa, (q31_t)0x222fc111,
+  (q31_t)0x22178826, (q31_t)0x21ff4dea, (q31_t)0x21e71260, (q31_t)0x21ced586, (q31_t)0x21b6975f, (q31_t)0x219e57eb,
+  (q31_t)0x2186172b, (q31_t)0x216dd521,
+  (q31_t)0x215591cc, (q31_t)0x213d4d2f, (q31_t)0x21250749, (q31_t)0x210cc01d, (q31_t)0x20f477aa, (q31_t)0x20dc2df2,
+  (q31_t)0x20c3e2f5, (q31_t)0x20ab96b5,
+  (q31_t)0x20934933, (q31_t)0x207afa6f, (q31_t)0x2062aa6b, (q31_t)0x204a5927, (q31_t)0x203206a4, (q31_t)0x2019b2e4,
+  (q31_t)0x20015de7, (q31_t)0x1fe907ae,
+  (q31_t)0x1fd0b03a, (q31_t)0x1fb8578b, (q31_t)0x1f9ffda4, (q31_t)0x1f87a285, (q31_t)0x1f6f462f, (q31_t)0x1f56e8a2,
+  (q31_t)0x1f3e89e0, (q31_t)0x1f2629ea,
+  (q31_t)0x1f0dc8c0, (q31_t)0x1ef56664, (q31_t)0x1edd02d6, (q31_t)0x1ec49e17, (q31_t)0x1eac3829, (q31_t)0x1e93d10c,
+  (q31_t)0x1e7b68c2, (q31_t)0x1e62ff4a,
+  (q31_t)0x1e4a94a7, (q31_t)0x1e3228d9, (q31_t)0x1e19bbe0, (q31_t)0x1e014dbf, (q31_t)0x1de8de75, (q31_t)0x1dd06e04,
+  (q31_t)0x1db7fc6d, (q31_t)0x1d9f89b1,
+  (q31_t)0x1d8715d0, (q31_t)0x1d6ea0cc, (q31_t)0x1d562aa6, (q31_t)0x1d3db35e, (q31_t)0x1d253af5, (q31_t)0x1d0cc16c,
+  (q31_t)0x1cf446c5, (q31_t)0x1cdbcb00,
+  (q31_t)0x1cc34e1f, (q31_t)0x1caad021, (q31_t)0x1c925109, (q31_t)0x1c79d0d6, (q31_t)0x1c614f8b, (q31_t)0x1c48cd27,
+  (q31_t)0x1c3049ac, (q31_t)0x1c17c51b,
+  (q31_t)0x1bff3f75, (q31_t)0x1be6b8ba, (q31_t)0x1bce30ec, (q31_t)0x1bb5a80c, (q31_t)0x1b9d1e1a, (q31_t)0x1b849317,
+  (q31_t)0x1b6c0705, (q31_t)0x1b5379e5,
+  (q31_t)0x1b3aebb6, (q31_t)0x1b225c7b, (q31_t)0x1b09cc34, (q31_t)0x1af13ae3, (q31_t)0x1ad8a887, (q31_t)0x1ac01522,
+  (q31_t)0x1aa780b6, (q31_t)0x1a8eeb42,
+  (q31_t)0x1a7654c8, (q31_t)0x1a5dbd49, (q31_t)0x1a4524c6, (q31_t)0x1a2c8b3f, (q31_t)0x1a13f0b6, (q31_t)0x19fb552c,
+  (q31_t)0x19e2b8a2, (q31_t)0x19ca1b17,
+  (q31_t)0x19b17c8f, (q31_t)0x1998dd09, (q31_t)0x19803c86, (q31_t)0x19679b07, (q31_t)0x194ef88e, (q31_t)0x1936551b,
+  (q31_t)0x191db0af, (q31_t)0x19050b4b,
+  (q31_t)0x18ec64f0, (q31_t)0x18d3bda0, (q31_t)0x18bb155a, (q31_t)0x18a26c20, (q31_t)0x1889c1f3, (q31_t)0x187116d4,
+  (q31_t)0x18586ac3, (q31_t)0x183fbdc3,
+  (q31_t)0x18270fd3, (q31_t)0x180e60f4, (q31_t)0x17f5b129, (q31_t)0x17dd0070, (q31_t)0x17c44ecd, (q31_t)0x17ab9c3e,
+  (q31_t)0x1792e8c6, (q31_t)0x177a3466,
+  (q31_t)0x17617f1d, (q31_t)0x1748c8ee, (q31_t)0x173011d9, (q31_t)0x171759df, (q31_t)0x16fea102, (q31_t)0x16e5e741,
+  (q31_t)0x16cd2c9f, (q31_t)0x16b4711b,
+  (q31_t)0x169bb4b7, (q31_t)0x1682f774, (q31_t)0x166a3953, (q31_t)0x16517a55, (q31_t)0x1638ba7a, (q31_t)0x161ff9c4,
+  (q31_t)0x16073834, (q31_t)0x15ee75cb,
+  (q31_t)0x15d5b288, (q31_t)0x15bcee6f, (q31_t)0x15a4297f, (q31_t)0x158b63b9, (q31_t)0x15729d1f, (q31_t)0x1559d5b1,
+  (q31_t)0x15410d70, (q31_t)0x1528445d,
+  (q31_t)0x150f7a7a, (q31_t)0x14f6afc7, (q31_t)0x14dde445, (q31_t)0x14c517f4, (q31_t)0x14ac4ad7, (q31_t)0x14937cee,
+  (q31_t)0x147aae3a, (q31_t)0x1461debc,
+  (q31_t)0x14490e74, (q31_t)0x14303d65, (q31_t)0x14176b8e, (q31_t)0x13fe98f1, (q31_t)0x13e5c58e, (q31_t)0x13ccf167,
+  (q31_t)0x13b41c7d, (q31_t)0x139b46d0,
+  (q31_t)0x13827062, (q31_t)0x13699933, (q31_t)0x1350c144, (q31_t)0x1337e897, (q31_t)0x131f0f2c, (q31_t)0x13063505,
+  (q31_t)0x12ed5a21, (q31_t)0x12d47e83,
+  (q31_t)0x12bba22b, (q31_t)0x12a2c51b, (q31_t)0x1289e752, (q31_t)0x127108d2, (q31_t)0x1258299c, (q31_t)0x123f49b2,
+  (q31_t)0x12266913, (q31_t)0x120d87c1,
+  (q31_t)0x11f4a5bd, (q31_t)0x11dbc307, (q31_t)0x11c2dfa2, (q31_t)0x11a9fb8d, (q31_t)0x119116c9, (q31_t)0x11783159,
+  (q31_t)0x115f4b3c, (q31_t)0x11466473,
+  (q31_t)0x112d7d00, (q31_t)0x111494e4, (q31_t)0x10fbac1e, (q31_t)0x10e2c2b2, (q31_t)0x10c9d89e, (q31_t)0x10b0ede5,
+  (q31_t)0x10980287, (q31_t)0x107f1686,
+  (q31_t)0x106629e1, (q31_t)0x104d3c9b, (q31_t)0x10344eb4, (q31_t)0x101b602d, (q31_t)0x10027107, (q31_t)0xfe98143,
+  (q31_t)0xfd090e1, (q31_t)0xfb79fe4,
+  (q31_t)0xf9eae4c, (q31_t)0xf85bc19, (q31_t)0xf6cc94e, (q31_t)0xf53d5ea, (q31_t)0xf3ae1ee, (q31_t)0xf21ed5d, (q31_t)0xf08f836,
+  (q31_t)0xef0027b,
+  (q31_t)0xed70c2c, (q31_t)0xebe154b, (q31_t)0xea51dd8, (q31_t)0xe8c25d5, (q31_t)0xe732d42, (q31_t)0xe5a3421, (q31_t)0xe413a72,
+  (q31_t)0xe284036,
+  (q31_t)0xe0f456f, (q31_t)0xdf64a1c, (q31_t)0xddd4e40, (q31_t)0xdc451dc, (q31_t)0xdab54ef, (q31_t)0xd92577b, (q31_t)0xd795982,
+  (q31_t)0xd605b03,
+  (q31_t)0xd475c00, (q31_t)0xd2e5c7b, (q31_t)0xd155c73, (q31_t)0xcfc5bea, (q31_t)0xce35ae1, (q31_t)0xcca5959, (q31_t)0xcb15752,
+  (q31_t)0xc9854cf,
+  (q31_t)0xc7f51cf, (q31_t)0xc664e53, (q31_t)0xc4d4a5d, (q31_t)0xc3445ee, (q31_t)0xc1b4107, (q31_t)0xc023ba7, (q31_t)0xbe935d2,
+  (q31_t)0xbd02f87,
+  (q31_t)0xbb728c7, (q31_t)0xb9e2193, (q31_t)0xb8519ed, (q31_t)0xb6c11d5, (q31_t)0xb53094d, (q31_t)0xb3a0055, (q31_t)0xb20f6ee,
+  (q31_t)0xb07ed19,
+  (q31_t)0xaeee2d7, (q31_t)0xad5d829, (q31_t)0xabccd11, (q31_t)0xaa3c18e, (q31_t)0xa8ab5a2, (q31_t)0xa71a94f, (q31_t)0xa589c94,
+  (q31_t)0xa3f8f73,
+  (q31_t)0xa2681ed, (q31_t)0xa0d7403, (q31_t)0x9f465b5, (q31_t)0x9db5706, (q31_t)0x9c247f5, (q31_t)0x9a93884, (q31_t)0x99028b3,
+  (q31_t)0x9771884,
+  (q31_t)0x95e07f8, (q31_t)0x944f70f, (q31_t)0x92be5ca, (q31_t)0x912d42c, (q31_t)0x8f9c233, (q31_t)0x8e0afe2, (q31_t)0x8c79d3a,
+  (q31_t)0x8ae8a3a,
+  (q31_t)0x89576e5, (q31_t)0x87c633c, (q31_t)0x8634f3e, (q31_t)0x84a3aee, (q31_t)0x831264c, (q31_t)0x8181159, (q31_t)0x7fefc16,
+  (q31_t)0x7e5e685,
+  (q31_t)0x7ccd0a5, (q31_t)0x7b3ba78, (q31_t)0x79aa400, (q31_t)0x7818d3c, (q31_t)0x768762e, (q31_t)0x74f5ed7, (q31_t)0x7364738,
+  (q31_t)0x71d2f52,
+  (q31_t)0x7041726, (q31_t)0x6eafeb4, (q31_t)0x6d1e5fe, (q31_t)0x6b8cd05, (q31_t)0x69fb3c9, (q31_t)0x6869a4c, (q31_t)0x66d808f,
+  (q31_t)0x6546692,
+  (q31_t)0x63b4c57, (q31_t)0x62231de, (q31_t)0x6091729, (q31_t)0x5effc38, (q31_t)0x5d6e10c, (q31_t)0x5bdc5a7, (q31_t)0x5a4aa09,
+  (q31_t)0x58b8e34,
+  (q31_t)0x5727228, (q31_t)0x55955e6, (q31_t)0x540396f, (q31_t)0x5271cc4, (q31_t)0x50dffe7, (q31_t)0x4f4e2d8, (q31_t)0x4dbc597,
+  (q31_t)0x4c2a827,
+  (q31_t)0x4a98a88, (q31_t)0x4906cbb, (q31_t)0x4774ec1, (q31_t)0x45e309a, (q31_t)0x4451249, (q31_t)0x42bf3cd, (q31_t)0x412d528,
+  (q31_t)0x3f9b65b,
+  (q31_t)0x3e09767, (q31_t)0x3c7784d, (q31_t)0x3ae590d, (q31_t)0x39539a9, (q31_t)0x37c1a22, (q31_t)0x362fa78, (q31_t)0x349daac,
+  (q31_t)0x330bac1,
+  (q31_t)0x3179ab5, (q31_t)0x2fe7a8c, (q31_t)0x2e55a44, (q31_t)0x2cc39e1, (q31_t)0x2b31961, (q31_t)0x299f8c7, (q31_t)0x280d813,
+  (q31_t)0x267b747,
+  (q31_t)0x24e9662, (q31_t)0x2357567, (q31_t)0x21c5457, (q31_t)0x2033331, (q31_t)0x1ea11f7, (q31_t)0x1d0f0ab, (q31_t)0x1b7cf4d,
+  (q31_t)0x19eaddd,
+  (q31_t)0x1858c5e, (q31_t)0x16c6ad0, (q31_t)0x1534934, (q31_t)0x13a278a, (q31_t)0x12105d5, (q31_t)0x107e414, (q31_t)0xeec249,
+  (q31_t)0xd5a075,
+  (q31_t)0xbc7e99, (q31_t)0xa35cb5, (q31_t)0x8a3acb, (q31_t)0x7118dc, (q31_t)0x57f6e9, (q31_t)0x3ed4f2, (q31_t)0x25b2f8,
+  (q31_t)0xc90fe
+};
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192) 
+    const q31_t WeightsQ31_8192[16384] = {
+  (q31_t)0x7fffffff, (q31_t)0x00000000, (q31_t)0x7fffffd9, (q31_t)0xfff9b781, (q31_t)0x7fffff62, (q31_t)0xfff36f02, (q31_t)0x7ffffe9d, (q31_t)0xffed2684,
+  (q31_t)0x7ffffd88, (q31_t)0xffe6de05, (q31_t)0x7ffffc25, (q31_t)0xffe09586, (q31_t)0x7ffffa73, (q31_t)0xffda4d08, (q31_t)0x7ffff872, (q31_t)0xffd40489,
+  (q31_t)0x7ffff621, (q31_t)0xffcdbc0b, (q31_t)0x7ffff382, (q31_t)0xffc7738c, (q31_t)0x7ffff094, (q31_t)0xffc12b0e, (q31_t)0x7fffed57, (q31_t)0xffbae290,
+  (q31_t)0x7fffe9cb, (q31_t)0xffb49a12, (q31_t)0x7fffe5f0, (q31_t)0xffae5195, (q31_t)0x7fffe1c6, (q31_t)0xffa80917, (q31_t)0x7fffdd4d, (q31_t)0xffa1c09a,
+  (q31_t)0x7fffd886, (q31_t)0xff9b781d, (q31_t)0x7fffd36f, (q31_t)0xff952fa0, (q31_t)0x7fffce09, (q31_t)0xff8ee724, (q31_t)0x7fffc854, (q31_t)0xff889ea7,
+  (q31_t)0x7fffc251, (q31_t)0xff82562c, (q31_t)0x7fffbbfe, (q31_t)0xff7c0db0, (q31_t)0x7fffb55c, (q31_t)0xff75c535, (q31_t)0x7fffae6c, (q31_t)0xff6f7cba,
+  (q31_t)0x7fffa72c, (q31_t)0xff69343f, (q31_t)0x7fff9f9e, (q31_t)0xff62ebc5, (q31_t)0x7fff97c1, (q31_t)0xff5ca34b, (q31_t)0x7fff8f94, (q31_t)0xff565ad1,
+  (q31_t)0x7fff8719, (q31_t)0xff501258, (q31_t)0x7fff7e4f, (q31_t)0xff49c9df, (q31_t)0x7fff7536, (q31_t)0xff438167, (q31_t)0x7fff6bcd, (q31_t)0xff3d38ef,
+  (q31_t)0x7fff6216, (q31_t)0xff36f078, (q31_t)0x7fff5810, (q31_t)0xff30a801, (q31_t)0x7fff4dbb, (q31_t)0xff2a5f8b, (q31_t)0x7fff4317, (q31_t)0xff241715,
+  (q31_t)0x7fff3824, (q31_t)0xff1dcea0, (q31_t)0x7fff2ce2, (q31_t)0xff17862b, (q31_t)0x7fff2151, (q31_t)0xff113db7, (q31_t)0x7fff1572, (q31_t)0xff0af543,
+  (q31_t)0x7fff0943, (q31_t)0xff04acd0, (q31_t)0x7ffefcc5, (q31_t)0xfefe645e, (q31_t)0x7ffeeff8, (q31_t)0xfef81bec, (q31_t)0x7ffee2dd, (q31_t)0xfef1d37b,
+  (q31_t)0x7ffed572, (q31_t)0xfeeb8b0a, (q31_t)0x7ffec7b9, (q31_t)0xfee5429a, (q31_t)0x7ffeb9b0, (q31_t)0xfedefa2b, (q31_t)0x7ffeab59, (q31_t)0xfed8b1bd,
+  (q31_t)0x7ffe9cb2, (q31_t)0xfed2694f, (q31_t)0x7ffe8dbd, (q31_t)0xfecc20e2, (q31_t)0x7ffe7e79, (q31_t)0xfec5d876, (q31_t)0x7ffe6ee5, (q31_t)0xfebf900a,
+  (q31_t)0x7ffe5f03, (q31_t)0xfeb947a0, (q31_t)0x7ffe4ed2, (q31_t)0xfeb2ff36, (q31_t)0x7ffe3e52, (q31_t)0xfeacb6cc, (q31_t)0x7ffe2d83, (q31_t)0xfea66e64,
+  (q31_t)0x7ffe1c65, (q31_t)0xfea025fd, (q31_t)0x7ffe0af8, (q31_t)0xfe99dd96, (q31_t)0x7ffdf93c, (q31_t)0xfe939530, (q31_t)0x7ffde731, (q31_t)0xfe8d4ccb,
+  (q31_t)0x7ffdd4d7, (q31_t)0xfe870467, (q31_t)0x7ffdc22e, (q31_t)0xfe80bc04, (q31_t)0x7ffdaf37, (q31_t)0xfe7a73a2, (q31_t)0x7ffd9bf0, (q31_t)0xfe742b41,
+  (q31_t)0x7ffd885a, (q31_t)0xfe6de2e0, (q31_t)0x7ffd7476, (q31_t)0xfe679a81, (q31_t)0x7ffd6042, (q31_t)0xfe615223, (q31_t)0x7ffd4bc0, (q31_t)0xfe5b09c5,
+  (q31_t)0x7ffd36ee, (q31_t)0xfe54c169, (q31_t)0x7ffd21ce, (q31_t)0xfe4e790d, (q31_t)0x7ffd0c5f, (q31_t)0xfe4830b3, (q31_t)0x7ffcf6a0, (q31_t)0xfe41e85a,
+  (q31_t)0x7ffce093, (q31_t)0xfe3ba002, (q31_t)0x7ffcca37, (q31_t)0xfe3557ab, (q31_t)0x7ffcb38c, (q31_t)0xfe2f0f55, (q31_t)0x7ffc9c92, (q31_t)0xfe28c700,
+  (q31_t)0x7ffc8549, (q31_t)0xfe227eac, (q31_t)0x7ffc6db1, (q31_t)0xfe1c365a, (q31_t)0x7ffc55ca, (q31_t)0xfe15ee09, (q31_t)0x7ffc3d94, (q31_t)0xfe0fa5b8,
+  (q31_t)0x7ffc250f, (q31_t)0xfe095d69, (q31_t)0x7ffc0c3b, (q31_t)0xfe03151c, (q31_t)0x7ffbf319, (q31_t)0xfdfccccf, (q31_t)0x7ffbd9a7, (q31_t)0xfdf68484,
+  (q31_t)0x7ffbbfe6, (q31_t)0xfdf03c3a, (q31_t)0x7ffba5d7, (q31_t)0xfde9f3f1, (q31_t)0x7ffb8b78, (q31_t)0xfde3aba9, (q31_t)0x7ffb70cb, (q31_t)0xfddd6363,
+  (q31_t)0x7ffb55ce, (q31_t)0xfdd71b1e, (q31_t)0x7ffb3a83, (q31_t)0xfdd0d2db, (q31_t)0x7ffb1ee9, (q31_t)0xfdca8a99, (q31_t)0x7ffb0300, (q31_t)0xfdc44258,
+  (q31_t)0x7ffae6c7, (q31_t)0xfdbdfa18, (q31_t)0x7ffaca40, (q31_t)0xfdb7b1da, (q31_t)0x7ffaad6a, (q31_t)0xfdb1699e, (q31_t)0x7ffa9045, (q31_t)0xfdab2162,
+  (q31_t)0x7ffa72d1, (q31_t)0xfda4d929, (q31_t)0x7ffa550e, (q31_t)0xfd9e90f0, (q31_t)0x7ffa36fc, (q31_t)0xfd9848b9, (q31_t)0x7ffa189c, (q31_t)0xfd920084,
+  (q31_t)0x7ff9f9ec, (q31_t)0xfd8bb850, (q31_t)0x7ff9daed, (q31_t)0xfd85701e, (q31_t)0x7ff9bba0, (q31_t)0xfd7f27ed, (q31_t)0x7ff99c03, (q31_t)0xfd78dfbd,
+  (q31_t)0x7ff97c18, (q31_t)0xfd729790, (q31_t)0x7ff95bdd, (q31_t)0xfd6c4f64, (q31_t)0x7ff93b54, (q31_t)0xfd660739, (q31_t)0x7ff91a7b, (q31_t)0xfd5fbf10,
+  (q31_t)0x7ff8f954, (q31_t)0xfd5976e9, (q31_t)0x7ff8d7de, (q31_t)0xfd532ec3, (q31_t)0x7ff8b619, (q31_t)0xfd4ce69f, (q31_t)0x7ff89405, (q31_t)0xfd469e7c,
+  (q31_t)0x7ff871a2, (q31_t)0xfd40565c, (q31_t)0x7ff84ef0, (q31_t)0xfd3a0e3d, (q31_t)0x7ff82bef, (q31_t)0xfd33c61f, (q31_t)0x7ff8089f, (q31_t)0xfd2d7e04,
+  (q31_t)0x7ff7e500, (q31_t)0xfd2735ea, (q31_t)0x7ff7c113, (q31_t)0xfd20edd2, (q31_t)0x7ff79cd6, (q31_t)0xfd1aa5bc, (q31_t)0x7ff7784a, (q31_t)0xfd145da7,
+  (q31_t)0x7ff75370, (q31_t)0xfd0e1594, (q31_t)0x7ff72e46, (q31_t)0xfd07cd83, (q31_t)0x7ff708ce, (q31_t)0xfd018574, (q31_t)0x7ff6e307, (q31_t)0xfcfb3d67,
+  (q31_t)0x7ff6bcf0, (q31_t)0xfcf4f55c, (q31_t)0x7ff6968b, (q31_t)0xfceead52, (q31_t)0x7ff66fd7, (q31_t)0xfce8654b, (q31_t)0x7ff648d4, (q31_t)0xfce21d45,
+  (q31_t)0x7ff62182, (q31_t)0xfcdbd541, (q31_t)0x7ff5f9e1, (q31_t)0xfcd58d3f, (q31_t)0x7ff5d1f1, (q31_t)0xfccf453f, (q31_t)0x7ff5a9b2, (q31_t)0xfcc8fd41,
+  (q31_t)0x7ff58125, (q31_t)0xfcc2b545, (q31_t)0x7ff55848, (q31_t)0xfcbc6d4c, (q31_t)0x7ff52f1d, (q31_t)0xfcb62554, (q31_t)0x7ff505a2, (q31_t)0xfcafdd5e,
+  (q31_t)0x7ff4dbd9, (q31_t)0xfca9956a, (q31_t)0x7ff4b1c0, (q31_t)0xfca34d78, (q31_t)0x7ff48759, (q31_t)0xfc9d0588, (q31_t)0x7ff45ca3, (q31_t)0xfc96bd9b,
+  (q31_t)0x7ff4319d, (q31_t)0xfc9075af, (q31_t)0x7ff40649, (q31_t)0xfc8a2dc6, (q31_t)0x7ff3daa6, (q31_t)0xfc83e5de, (q31_t)0x7ff3aeb4, (q31_t)0xfc7d9df9,
+  (q31_t)0x7ff38274, (q31_t)0xfc775616, (q31_t)0x7ff355e4, (q31_t)0xfc710e36, (q31_t)0x7ff32905, (q31_t)0xfc6ac657, (q31_t)0x7ff2fbd7, (q31_t)0xfc647e7b,
+  (q31_t)0x7ff2ce5b, (q31_t)0xfc5e36a0, (q31_t)0x7ff2a08f, (q31_t)0xfc57eec9, (q31_t)0x7ff27275, (q31_t)0xfc51a6f3, (q31_t)0x7ff2440b, (q31_t)0xfc4b5f20,
+  (q31_t)0x7ff21553, (q31_t)0xfc45174e, (q31_t)0x7ff1e64c, (q31_t)0xfc3ecf80, (q31_t)0x7ff1b6f6, (q31_t)0xfc3887b3, (q31_t)0x7ff18751, (q31_t)0xfc323fe9,
+  (q31_t)0x7ff1575d, (q31_t)0xfc2bf821, (q31_t)0x7ff1271a, (q31_t)0xfc25b05c, (q31_t)0x7ff0f688, (q31_t)0xfc1f6899, (q31_t)0x7ff0c5a7, (q31_t)0xfc1920d8,
+  (q31_t)0x7ff09478, (q31_t)0xfc12d91a, (q31_t)0x7ff062f9, (q31_t)0xfc0c915e, (q31_t)0x7ff0312c, (q31_t)0xfc0649a5, (q31_t)0x7fefff0f, (q31_t)0xfc0001ee,
+  (q31_t)0x7fefcca4, (q31_t)0xfbf9ba39, (q31_t)0x7fef99ea, (q31_t)0xfbf37287, (q31_t)0x7fef66e1, (q31_t)0xfbed2ad8, (q31_t)0x7fef3388, (q31_t)0xfbe6e32b,
+  (q31_t)0x7feeffe1, (q31_t)0xfbe09b80, (q31_t)0x7feecbec, (q31_t)0xfbda53d8, (q31_t)0x7fee97a7, (q31_t)0xfbd40c33, (q31_t)0x7fee6313, (q31_t)0xfbcdc490,
+  (q31_t)0x7fee2e30, (q31_t)0xfbc77cf0, (q31_t)0x7fedf8ff, (q31_t)0xfbc13552, (q31_t)0x7fedc37e, (q31_t)0xfbbaedb7, (q31_t)0x7fed8daf, (q31_t)0xfbb4a61f,
+  (q31_t)0x7fed5791, (q31_t)0xfbae5e89, (q31_t)0x7fed2123, (q31_t)0xfba816f6, (q31_t)0x7fecea67, (q31_t)0xfba1cf66, (q31_t)0x7fecb35c, (q31_t)0xfb9b87d8,
+  (q31_t)0x7fec7c02, (q31_t)0xfb95404d, (q31_t)0x7fec4459, (q31_t)0xfb8ef8c5, (q31_t)0x7fec0c62, (q31_t)0xfb88b13f, (q31_t)0x7febd41b, (q31_t)0xfb8269bd,
+  (q31_t)0x7feb9b85, (q31_t)0xfb7c223d, (q31_t)0x7feb62a1, (q31_t)0xfb75dac0, (q31_t)0x7feb296d, (q31_t)0xfb6f9345, (q31_t)0x7feaefeb, (q31_t)0xfb694bce,
+  (q31_t)0x7feab61a, (q31_t)0xfb630459, (q31_t)0x7fea7bfa, (q31_t)0xfb5cbce7, (q31_t)0x7fea418b, (q31_t)0xfb567578, (q31_t)0x7fea06cd, (q31_t)0xfb502e0c,
+  (q31_t)0x7fe9cbc0, (q31_t)0xfb49e6a3, (q31_t)0x7fe99064, (q31_t)0xfb439f3c, (q31_t)0x7fe954ba, (q31_t)0xfb3d57d9, (q31_t)0x7fe918c0, (q31_t)0xfb371078,
+  (q31_t)0x7fe8dc78, (q31_t)0xfb30c91b, (q31_t)0x7fe89fe0, (q31_t)0xfb2a81c0, (q31_t)0x7fe862fa, (q31_t)0xfb243a69, (q31_t)0x7fe825c5, (q31_t)0xfb1df314,
+  (q31_t)0x7fe7e841, (q31_t)0xfb17abc2, (q31_t)0x7fe7aa6e, (q31_t)0xfb116474, (q31_t)0x7fe76c4c, (q31_t)0xfb0b1d28, (q31_t)0x7fe72ddb, (q31_t)0xfb04d5e0,
+  (q31_t)0x7fe6ef1c, (q31_t)0xfafe8e9b, (q31_t)0x7fe6b00d, (q31_t)0xfaf84758, (q31_t)0x7fe670b0, (q31_t)0xfaf20019, (q31_t)0x7fe63103, (q31_t)0xfaebb8dd,
+  (q31_t)0x7fe5f108, (q31_t)0xfae571a4, (q31_t)0x7fe5b0be, (q31_t)0xfadf2a6e, (q31_t)0x7fe57025, (q31_t)0xfad8e33c, (q31_t)0x7fe52f3d, (q31_t)0xfad29c0c,
+  (q31_t)0x7fe4ee06, (q31_t)0xfacc54e0, (q31_t)0x7fe4ac81, (q31_t)0xfac60db7, (q31_t)0x7fe46aac, (q31_t)0xfabfc691, (q31_t)0x7fe42889, (q31_t)0xfab97f6e,
+  (q31_t)0x7fe3e616, (q31_t)0xfab3384f, (q31_t)0x7fe3a355, (q31_t)0xfaacf133, (q31_t)0x7fe36045, (q31_t)0xfaa6aa1a, (q31_t)0x7fe31ce6, (q31_t)0xfaa06305,
+  (q31_t)0x7fe2d938, (q31_t)0xfa9a1bf3, (q31_t)0x7fe2953b, (q31_t)0xfa93d4e4, (q31_t)0x7fe250ef, (q31_t)0xfa8d8dd8, (q31_t)0x7fe20c55, (q31_t)0xfa8746d0,
+  (q31_t)0x7fe1c76b, (q31_t)0xfa80ffcb, (q31_t)0x7fe18233, (q31_t)0xfa7ab8ca, (q31_t)0x7fe13cac, (q31_t)0xfa7471cc, (q31_t)0x7fe0f6d6, (q31_t)0xfa6e2ad1,
+  (q31_t)0x7fe0b0b1, (q31_t)0xfa67e3da, (q31_t)0x7fe06a3d, (q31_t)0xfa619ce7, (q31_t)0x7fe0237a, (q31_t)0xfa5b55f7, (q31_t)0x7fdfdc69, (q31_t)0xfa550f0a,
+  (q31_t)0x7fdf9508, (q31_t)0xfa4ec821, (q31_t)0x7fdf4d59, (q31_t)0xfa48813b, (q31_t)0x7fdf055a, (q31_t)0xfa423a59, (q31_t)0x7fdebd0d, (q31_t)0xfa3bf37a,
+  (q31_t)0x7fde7471, (q31_t)0xfa35ac9f, (q31_t)0x7fde2b86, (q31_t)0xfa2f65c8, (q31_t)0x7fdde24d, (q31_t)0xfa291ef4, (q31_t)0x7fdd98c4, (q31_t)0xfa22d823,
+  (q31_t)0x7fdd4eec, (q31_t)0xfa1c9157, (q31_t)0x7fdd04c6, (q31_t)0xfa164a8e, (q31_t)0x7fdcba51, (q31_t)0xfa1003c8, (q31_t)0x7fdc6f8d, (q31_t)0xfa09bd06,
+  (q31_t)0x7fdc247a, (q31_t)0xfa037648, (q31_t)0x7fdbd918, (q31_t)0xf9fd2f8e, (q31_t)0x7fdb8d67, (q31_t)0xf9f6e8d7, (q31_t)0x7fdb4167, (q31_t)0xf9f0a224,
+  (q31_t)0x7fdaf519, (q31_t)0xf9ea5b75, (q31_t)0x7fdaa87c, (q31_t)0xf9e414ca, (q31_t)0x7fda5b8f, (q31_t)0xf9ddce22, (q31_t)0x7fda0e54, (q31_t)0xf9d7877e,
+  (q31_t)0x7fd9c0ca, (q31_t)0xf9d140de, (q31_t)0x7fd972f2, (q31_t)0xf9cafa42, (q31_t)0x7fd924ca, (q31_t)0xf9c4b3a9, (q31_t)0x7fd8d653, (q31_t)0xf9be6d15,
+  (q31_t)0x7fd8878e, (q31_t)0xf9b82684, (q31_t)0x7fd8387a, (q31_t)0xf9b1dff7, (q31_t)0x7fd7e917, (q31_t)0xf9ab996e, (q31_t)0x7fd79965, (q31_t)0xf9a552e9,
+  (q31_t)0x7fd74964, (q31_t)0xf99f0c68, (q31_t)0x7fd6f914, (q31_t)0xf998c5ea, (q31_t)0x7fd6a875, (q31_t)0xf9927f71, (q31_t)0x7fd65788, (q31_t)0xf98c38fc,
+  (q31_t)0x7fd6064c, (q31_t)0xf985f28a, (q31_t)0x7fd5b4c1, (q31_t)0xf97fac1d, (q31_t)0x7fd562e7, (q31_t)0xf97965b4, (q31_t)0x7fd510be, (q31_t)0xf9731f4e,
+  (q31_t)0x7fd4be46, (q31_t)0xf96cd8ed, (q31_t)0x7fd46b80, (q31_t)0xf9669290, (q31_t)0x7fd4186a, (q31_t)0xf9604c37, (q31_t)0x7fd3c506, (q31_t)0xf95a05e2,
+  (q31_t)0x7fd37153, (q31_t)0xf953bf91, (q31_t)0x7fd31d51, (q31_t)0xf94d7944, (q31_t)0x7fd2c900, (q31_t)0xf94732fb, (q31_t)0x7fd27460, (q31_t)0xf940ecb7,
+  (q31_t)0x7fd21f72, (q31_t)0xf93aa676, (q31_t)0x7fd1ca35, (q31_t)0xf934603a, (q31_t)0x7fd174a8, (q31_t)0xf92e1a02, (q31_t)0x7fd11ecd, (q31_t)0xf927d3ce,
+  (q31_t)0x7fd0c8a3, (q31_t)0xf9218d9e, (q31_t)0x7fd0722b, (q31_t)0xf91b4773, (q31_t)0x7fd01b63, (q31_t)0xf915014c, (q31_t)0x7fcfc44d, (q31_t)0xf90ebb29,
+  (q31_t)0x7fcf6ce8, (q31_t)0xf908750a, (q31_t)0x7fcf1533, (q31_t)0xf9022ef0, (q31_t)0x7fcebd31, (q31_t)0xf8fbe8da, (q31_t)0x7fce64df, (q31_t)0xf8f5a2c9,
+  (q31_t)0x7fce0c3e, (q31_t)0xf8ef5cbb, (q31_t)0x7fcdb34f, (q31_t)0xf8e916b2, (q31_t)0x7fcd5a11, (q31_t)0xf8e2d0ae, (q31_t)0x7fcd0083, (q31_t)0xf8dc8aae,
+  (q31_t)0x7fcca6a7, (q31_t)0xf8d644b2, (q31_t)0x7fcc4c7d, (q31_t)0xf8cffebb, (q31_t)0x7fcbf203, (q31_t)0xf8c9b8c8, (q31_t)0x7fcb973b, (q31_t)0xf8c372d9,
+  (q31_t)0x7fcb3c23, (q31_t)0xf8bd2cef, (q31_t)0x7fcae0bd, (q31_t)0xf8b6e70a, (q31_t)0x7fca8508, (q31_t)0xf8b0a129, (q31_t)0x7fca2905, (q31_t)0xf8aa5b4c,
+  (q31_t)0x7fc9ccb2, (q31_t)0xf8a41574, (q31_t)0x7fc97011, (q31_t)0xf89dcfa1, (q31_t)0x7fc91320, (q31_t)0xf89789d2, (q31_t)0x7fc8b5e1, (q31_t)0xf8914407,
+  (q31_t)0x7fc85854, (q31_t)0xf88afe42, (q31_t)0x7fc7fa77, (q31_t)0xf884b880, (q31_t)0x7fc79c4b, (q31_t)0xf87e72c4, (q31_t)0x7fc73dd1, (q31_t)0xf8782d0c,
+  (q31_t)0x7fc6df08, (q31_t)0xf871e759, (q31_t)0x7fc67ff0, (q31_t)0xf86ba1aa, (q31_t)0x7fc62089, (q31_t)0xf8655c00, (q31_t)0x7fc5c0d3, (q31_t)0xf85f165b,
+  (q31_t)0x7fc560cf, (q31_t)0xf858d0bb, (q31_t)0x7fc5007c, (q31_t)0xf8528b1f, (q31_t)0x7fc49fda, (q31_t)0xf84c4588, (q31_t)0x7fc43ee9, (q31_t)0xf845fff5,
+  (q31_t)0x7fc3dda9, (q31_t)0xf83fba68, (q31_t)0x7fc37c1b, (q31_t)0xf83974df, (q31_t)0x7fc31a3d, (q31_t)0xf8332f5b, (q31_t)0x7fc2b811, (q31_t)0xf82ce9dc,
+  (q31_t)0x7fc25596, (q31_t)0xf826a462, (q31_t)0x7fc1f2cc, (q31_t)0xf8205eec, (q31_t)0x7fc18fb4, (q31_t)0xf81a197b, (q31_t)0x7fc12c4d, (q31_t)0xf813d410,
+  (q31_t)0x7fc0c896, (q31_t)0xf80d8ea9, (q31_t)0x7fc06491, (q31_t)0xf8074947, (q31_t)0x7fc0003e, (q31_t)0xf80103ea, (q31_t)0x7fbf9b9b, (q31_t)0xf7fabe92,
+  (q31_t)0x7fbf36aa, (q31_t)0xf7f4793e, (q31_t)0x7fbed16a, (q31_t)0xf7ee33f0, (q31_t)0x7fbe6bdb, (q31_t)0xf7e7eea7, (q31_t)0x7fbe05fd, (q31_t)0xf7e1a963,
+  (q31_t)0x7fbd9fd0, (q31_t)0xf7db6423, (q31_t)0x7fbd3955, (q31_t)0xf7d51ee9, (q31_t)0x7fbcd28b, (q31_t)0xf7ced9b4, (q31_t)0x7fbc6b72, (q31_t)0xf7c89484,
+  (q31_t)0x7fbc040a, (q31_t)0xf7c24f59, (q31_t)0x7fbb9c53, (q31_t)0xf7bc0a33, (q31_t)0x7fbb344e, (q31_t)0xf7b5c512, (q31_t)0x7fbacbfa, (q31_t)0xf7af7ff6,
+  (q31_t)0x7fba6357, (q31_t)0xf7a93ae0, (q31_t)0x7fb9fa65, (q31_t)0xf7a2f5ce, (q31_t)0x7fb99125, (q31_t)0xf79cb0c2, (q31_t)0x7fb92796, (q31_t)0xf7966bbb,
+  (q31_t)0x7fb8bdb8, (q31_t)0xf79026b9, (q31_t)0x7fb8538b, (q31_t)0xf789e1bc, (q31_t)0x7fb7e90f, (q31_t)0xf7839cc4, (q31_t)0x7fb77e45, (q31_t)0xf77d57d2,
+  (q31_t)0x7fb7132b, (q31_t)0xf77712e5, (q31_t)0x7fb6a7c3, (q31_t)0xf770cdfd, (q31_t)0x7fb63c0d, (q31_t)0xf76a891b, (q31_t)0x7fb5d007, (q31_t)0xf764443d,
+  (q31_t)0x7fb563b3, (q31_t)0xf75dff66, (q31_t)0x7fb4f710, (q31_t)0xf757ba93, (q31_t)0x7fb48a1e, (q31_t)0xf75175c6, (q31_t)0x7fb41cdd, (q31_t)0xf74b30fe,
+  (q31_t)0x7fb3af4e, (q31_t)0xf744ec3b, (q31_t)0x7fb34170, (q31_t)0xf73ea77e, (q31_t)0x7fb2d343, (q31_t)0xf73862c6, (q31_t)0x7fb264c7, (q31_t)0xf7321e14,
+  (q31_t)0x7fb1f5fc, (q31_t)0xf72bd967, (q31_t)0x7fb186e3, (q31_t)0xf72594c0, (q31_t)0x7fb1177b, (q31_t)0xf71f501e, (q31_t)0x7fb0a7c4, (q31_t)0xf7190b81,
+  (q31_t)0x7fb037bf, (q31_t)0xf712c6ea, (q31_t)0x7fafc76a, (q31_t)0xf70c8259, (q31_t)0x7faf56c7, (q31_t)0xf7063dcd, (q31_t)0x7faee5d5, (q31_t)0xf6fff946,
+  (q31_t)0x7fae7495, (q31_t)0xf6f9b4c6, (q31_t)0x7fae0305, (q31_t)0xf6f3704a, (q31_t)0x7fad9127, (q31_t)0xf6ed2bd4, (q31_t)0x7fad1efa, (q31_t)0xf6e6e764,
+  (q31_t)0x7facac7f, (q31_t)0xf6e0a2fa, (q31_t)0x7fac39b4, (q31_t)0xf6da5e95, (q31_t)0x7fabc69b, (q31_t)0xf6d41a36, (q31_t)0x7fab5333, (q31_t)0xf6cdd5dc,
+  (q31_t)0x7faadf7c, (q31_t)0xf6c79188, (q31_t)0x7faa6b77, (q31_t)0xf6c14d3a, (q31_t)0x7fa9f723, (q31_t)0xf6bb08f1, (q31_t)0x7fa98280, (q31_t)0xf6b4c4ae,
+  (q31_t)0x7fa90d8e, (q31_t)0xf6ae8071, (q31_t)0x7fa8984e, (q31_t)0xf6a83c3a, (q31_t)0x7fa822bf, (q31_t)0xf6a1f808, (q31_t)0x7fa7ace1, (q31_t)0xf69bb3dd,
+  (q31_t)0x7fa736b4, (q31_t)0xf6956fb7, (q31_t)0x7fa6c039, (q31_t)0xf68f2b96, (q31_t)0x7fa6496e, (q31_t)0xf688e77c, (q31_t)0x7fa5d256, (q31_t)0xf682a367,
+  (q31_t)0x7fa55aee, (q31_t)0xf67c5f59, (q31_t)0x7fa4e338, (q31_t)0xf6761b50, (q31_t)0x7fa46b32, (q31_t)0xf66fd74d, (q31_t)0x7fa3f2df, (q31_t)0xf6699350,
+  (q31_t)0x7fa37a3c, (q31_t)0xf6634f59, (q31_t)0x7fa3014b, (q31_t)0xf65d0b68, (q31_t)0x7fa2880b, (q31_t)0xf656c77c, (q31_t)0x7fa20e7c, (q31_t)0xf6508397,
+  (q31_t)0x7fa1949e, (q31_t)0xf64a3fb8, (q31_t)0x7fa11a72, (q31_t)0xf643fbdf, (q31_t)0x7fa09ff7, (q31_t)0xf63db80b, (q31_t)0x7fa0252e, (q31_t)0xf637743e,
+  (q31_t)0x7f9faa15, (q31_t)0xf6313077, (q31_t)0x7f9f2eae, (q31_t)0xf62aecb5, (q31_t)0x7f9eb2f8, (q31_t)0xf624a8fa, (q31_t)0x7f9e36f4, (q31_t)0xf61e6545,
+  (q31_t)0x7f9dbaa0, (q31_t)0xf6182196, (q31_t)0x7f9d3dfe, (q31_t)0xf611dded, (q31_t)0x7f9cc10d, (q31_t)0xf60b9a4b, (q31_t)0x7f9c43ce, (q31_t)0xf60556ae,
+  (q31_t)0x7f9bc640, (q31_t)0xf5ff1318, (q31_t)0x7f9b4863, (q31_t)0xf5f8cf87, (q31_t)0x7f9aca37, (q31_t)0xf5f28bfd, (q31_t)0x7f9a4bbd, (q31_t)0xf5ec4879,
+  (q31_t)0x7f99ccf4, (q31_t)0xf5e604fc, (q31_t)0x7f994ddc, (q31_t)0xf5dfc184, (q31_t)0x7f98ce76, (q31_t)0xf5d97e13, (q31_t)0x7f984ec1, (q31_t)0xf5d33aa8,
+  (q31_t)0x7f97cebd, (q31_t)0xf5ccf743, (q31_t)0x7f974e6a, (q31_t)0xf5c6b3e5, (q31_t)0x7f96cdc9, (q31_t)0xf5c0708d, (q31_t)0x7f964cd9, (q31_t)0xf5ba2d3b,
+  (q31_t)0x7f95cb9a, (q31_t)0xf5b3e9f0, (q31_t)0x7f954a0d, (q31_t)0xf5ada6ab, (q31_t)0x7f94c831, (q31_t)0xf5a7636c, (q31_t)0x7f944606, (q31_t)0xf5a12034,
+  (q31_t)0x7f93c38c, (q31_t)0xf59add02, (q31_t)0x7f9340c4, (q31_t)0xf59499d6, (q31_t)0x7f92bdad, (q31_t)0xf58e56b1, (q31_t)0x7f923a48, (q31_t)0xf5881393,
+  (q31_t)0x7f91b694, (q31_t)0xf581d07b, (q31_t)0x7f913291, (q31_t)0xf57b8d69, (q31_t)0x7f90ae3f, (q31_t)0xf5754a5e, (q31_t)0x7f90299f, (q31_t)0xf56f0759,
+  (q31_t)0x7f8fa4b0, (q31_t)0xf568c45b, (q31_t)0x7f8f1f72, (q31_t)0xf5628163, (q31_t)0x7f8e99e6, (q31_t)0xf55c3e72, (q31_t)0x7f8e140a, (q31_t)0xf555fb88,
+  (q31_t)0x7f8d8de1, (q31_t)0xf54fb8a4, (q31_t)0x7f8d0768, (q31_t)0xf54975c6, (q31_t)0x7f8c80a1, (q31_t)0xf54332ef, (q31_t)0x7f8bf98b, (q31_t)0xf53cf01f,
+  (q31_t)0x7f8b7227, (q31_t)0xf536ad56, (q31_t)0x7f8aea74, (q31_t)0xf5306a93, (q31_t)0x7f8a6272, (q31_t)0xf52a27d7, (q31_t)0x7f89da21, (q31_t)0xf523e521,
+  (q31_t)0x7f895182, (q31_t)0xf51da273, (q31_t)0x7f88c894, (q31_t)0xf5175fca, (q31_t)0x7f883f58, (q31_t)0xf5111d29, (q31_t)0x7f87b5cd, (q31_t)0xf50ada8f,
+  (q31_t)0x7f872bf3, (q31_t)0xf50497fb, (q31_t)0x7f86a1ca, (q31_t)0xf4fe556e, (q31_t)0x7f861753, (q31_t)0xf4f812e7, (q31_t)0x7f858c8d, (q31_t)0xf4f1d068,
+  (q31_t)0x7f850179, (q31_t)0xf4eb8def, (q31_t)0x7f847616, (q31_t)0xf4e54b7d, (q31_t)0x7f83ea64, (q31_t)0xf4df0912, (q31_t)0x7f835e64, (q31_t)0xf4d8c6ae,
+  (q31_t)0x7f82d214, (q31_t)0xf4d28451, (q31_t)0x7f824577, (q31_t)0xf4cc41fb, (q31_t)0x7f81b88a, (q31_t)0xf4c5ffab, (q31_t)0x7f812b4f, (q31_t)0xf4bfbd63,
+  (q31_t)0x7f809dc5, (q31_t)0xf4b97b21, (q31_t)0x7f800fed, (q31_t)0xf4b338e7, (q31_t)0x7f7f81c6, (q31_t)0xf4acf6b3, (q31_t)0x7f7ef350, (q31_t)0xf4a6b486,
+  (q31_t)0x7f7e648c, (q31_t)0xf4a07261, (q31_t)0x7f7dd579, (q31_t)0xf49a3042, (q31_t)0x7f7d4617, (q31_t)0xf493ee2b, (q31_t)0x7f7cb667, (q31_t)0xf48dac1a,
+  (q31_t)0x7f7c2668, (q31_t)0xf4876a10, (q31_t)0x7f7b961b, (q31_t)0xf481280e, (q31_t)0x7f7b057e, (q31_t)0xf47ae613, (q31_t)0x7f7a7494, (q31_t)0xf474a41f,
+  (q31_t)0x7f79e35a, (q31_t)0xf46e6231, (q31_t)0x7f7951d2, (q31_t)0xf468204b, (q31_t)0x7f78bffb, (q31_t)0xf461de6d, (q31_t)0x7f782dd6, (q31_t)0xf45b9c95,
+  (q31_t)0x7f779b62, (q31_t)0xf4555ac5, (q31_t)0x7f77089f, (q31_t)0xf44f18fb, (q31_t)0x7f76758e, (q31_t)0xf448d739, (q31_t)0x7f75e22e, (q31_t)0xf442957e,
+  (q31_t)0x7f754e80, (q31_t)0xf43c53cb, (q31_t)0x7f74ba83, (q31_t)0xf436121e, (q31_t)0x7f742637, (q31_t)0xf42fd079, (q31_t)0x7f73919d, (q31_t)0xf4298edc,
+  (q31_t)0x7f72fcb4, (q31_t)0xf4234d45, (q31_t)0x7f72677c, (q31_t)0xf41d0bb6, (q31_t)0x7f71d1f6, (q31_t)0xf416ca2e, (q31_t)0x7f713c21, (q31_t)0xf41088ae,
+  (q31_t)0x7f70a5fe, (q31_t)0xf40a4735, (q31_t)0x7f700f8c, (q31_t)0xf40405c3, (q31_t)0x7f6f78cb, (q31_t)0xf3fdc459, (q31_t)0x7f6ee1bc, (q31_t)0xf3f782f6,
+  (q31_t)0x7f6e4a5e, (q31_t)0xf3f1419a, (q31_t)0x7f6db2b1, (q31_t)0xf3eb0046, (q31_t)0x7f6d1ab6, (q31_t)0xf3e4bef9, (q31_t)0x7f6c826d, (q31_t)0xf3de7db4,
+  (q31_t)0x7f6be9d4, (q31_t)0xf3d83c77, (q31_t)0x7f6b50ed, (q31_t)0xf3d1fb40, (q31_t)0x7f6ab7b8, (q31_t)0xf3cbba12, (q31_t)0x7f6a1e34, (q31_t)0xf3c578eb,
+  (q31_t)0x7f698461, (q31_t)0xf3bf37cb, (q31_t)0x7f68ea40, (q31_t)0xf3b8f6b3, (q31_t)0x7f684fd0, (q31_t)0xf3b2b5a3, (q31_t)0x7f67b512, (q31_t)0xf3ac749a,
+  (q31_t)0x7f671a05, (q31_t)0xf3a63398, (q31_t)0x7f667ea9, (q31_t)0xf39ff29f, (q31_t)0x7f65e2ff, (q31_t)0xf399b1ad, (q31_t)0x7f654706, (q31_t)0xf39370c2,
+  (q31_t)0x7f64aabf, (q31_t)0xf38d2fe0, (q31_t)0x7f640e29, (q31_t)0xf386ef05, (q31_t)0x7f637144, (q31_t)0xf380ae31, (q31_t)0x7f62d411, (q31_t)0xf37a6d66,
+  (q31_t)0x7f62368f, (q31_t)0xf3742ca2, (q31_t)0x7f6198bf, (q31_t)0xf36debe6, (q31_t)0x7f60faa0, (q31_t)0xf367ab31, (q31_t)0x7f605c33, (q31_t)0xf3616a85,
+  (q31_t)0x7f5fbd77, (q31_t)0xf35b29e0, (q31_t)0x7f5f1e6c, (q31_t)0xf354e943, (q31_t)0x7f5e7f13, (q31_t)0xf34ea8ae, (q31_t)0x7f5ddf6b, (q31_t)0xf3486820,
+  (q31_t)0x7f5d3f75, (q31_t)0xf342279b, (q31_t)0x7f5c9f30, (q31_t)0xf33be71d, (q31_t)0x7f5bfe9d, (q31_t)0xf335a6a7, (q31_t)0x7f5b5dbb, (q31_t)0xf32f6639,
+  (q31_t)0x7f5abc8a, (q31_t)0xf32925d3, (q31_t)0x7f5a1b0b, (q31_t)0xf322e575, (q31_t)0x7f59793e, (q31_t)0xf31ca51f, (q31_t)0x7f58d721, (q31_t)0xf31664d1,
+  (q31_t)0x7f5834b7, (q31_t)0xf310248a, (q31_t)0x7f5791fd, (q31_t)0xf309e44c, (q31_t)0x7f56eef5, (q31_t)0xf303a416, (q31_t)0x7f564b9f, (q31_t)0xf2fd63e8,
+  (q31_t)0x7f55a7fa, (q31_t)0xf2f723c1, (q31_t)0x7f550407, (q31_t)0xf2f0e3a3, (q31_t)0x7f545fc5, (q31_t)0xf2eaa38d, (q31_t)0x7f53bb34, (q31_t)0xf2e4637f,
+  (q31_t)0x7f531655, (q31_t)0xf2de2379, (q31_t)0x7f527127, (q31_t)0xf2d7e37b, (q31_t)0x7f51cbab, (q31_t)0xf2d1a385, (q31_t)0x7f5125e0, (q31_t)0xf2cb6398,
+  (q31_t)0x7f507fc7, (q31_t)0xf2c523b2, (q31_t)0x7f4fd95f, (q31_t)0xf2bee3d5, (q31_t)0x7f4f32a9, (q31_t)0xf2b8a400, (q31_t)0x7f4e8ba4, (q31_t)0xf2b26433,
+  (q31_t)0x7f4de451, (q31_t)0xf2ac246e, (q31_t)0x7f4d3caf, (q31_t)0xf2a5e4b1, (q31_t)0x7f4c94be, (q31_t)0xf29fa4fd, (q31_t)0x7f4bec7f, (q31_t)0xf2996551,
+  (q31_t)0x7f4b43f2, (q31_t)0xf29325ad, (q31_t)0x7f4a9b16, (q31_t)0xf28ce612, (q31_t)0x7f49f1eb, (q31_t)0xf286a67e, (q31_t)0x7f494872, (q31_t)0xf28066f4,
+  (q31_t)0x7f489eaa, (q31_t)0xf27a2771, (q31_t)0x7f47f494, (q31_t)0xf273e7f7, (q31_t)0x7f474a30, (q31_t)0xf26da885, (q31_t)0x7f469f7d, (q31_t)0xf267691b,
+  (q31_t)0x7f45f47b, (q31_t)0xf26129ba, (q31_t)0x7f45492b, (q31_t)0xf25aea61, (q31_t)0x7f449d8c, (q31_t)0xf254ab11, (q31_t)0x7f43f19f, (q31_t)0xf24e6bc9,
+  (q31_t)0x7f434563, (q31_t)0xf2482c8a, (q31_t)0x7f4298d9, (q31_t)0xf241ed53, (q31_t)0x7f41ec01, (q31_t)0xf23bae24, (q31_t)0x7f413ed9, (q31_t)0xf2356efe,
+  (q31_t)0x7f409164, (q31_t)0xf22f2fe1, (q31_t)0x7f3fe3a0, (q31_t)0xf228f0cc, (q31_t)0x7f3f358d, (q31_t)0xf222b1c0, (q31_t)0x7f3e872c, (q31_t)0xf21c72bc,
+  (q31_t)0x7f3dd87c, (q31_t)0xf21633c0, (q31_t)0x7f3d297e, (q31_t)0xf20ff4ce, (q31_t)0x7f3c7a31, (q31_t)0xf209b5e4, (q31_t)0x7f3bca96, (q31_t)0xf2037702,
+  (q31_t)0x7f3b1aad, (q31_t)0xf1fd3829, (q31_t)0x7f3a6a75, (q31_t)0xf1f6f959, (q31_t)0x7f39b9ee, (q31_t)0xf1f0ba91, (q31_t)0x7f390919, (q31_t)0xf1ea7bd2,
+  (q31_t)0x7f3857f6, (q31_t)0xf1e43d1c, (q31_t)0x7f37a684, (q31_t)0xf1ddfe6f, (q31_t)0x7f36f4c3, (q31_t)0xf1d7bfca, (q31_t)0x7f3642b4, (q31_t)0xf1d1812e,
+  (q31_t)0x7f359057, (q31_t)0xf1cb429a, (q31_t)0x7f34ddab, (q31_t)0xf1c50410, (q31_t)0x7f342ab1, (q31_t)0xf1bec58e, (q31_t)0x7f337768, (q31_t)0xf1b88715,
+  (q31_t)0x7f32c3d1, (q31_t)0xf1b248a5, (q31_t)0x7f320feb, (q31_t)0xf1ac0a3e, (q31_t)0x7f315bb7, (q31_t)0xf1a5cbdf, (q31_t)0x7f30a734, (q31_t)0xf19f8d89,
+  (q31_t)0x7f2ff263, (q31_t)0xf1994f3d, (q31_t)0x7f2f3d44, (q31_t)0xf19310f9, (q31_t)0x7f2e87d6, (q31_t)0xf18cd2be, (q31_t)0x7f2dd219, (q31_t)0xf186948c,
+  (q31_t)0x7f2d1c0e, (q31_t)0xf1805662, (q31_t)0x7f2c65b5, (q31_t)0xf17a1842, (q31_t)0x7f2baf0d, (q31_t)0xf173da2b, (q31_t)0x7f2af817, (q31_t)0xf16d9c1d,
+  (q31_t)0x7f2a40d2, (q31_t)0xf1675e17, (q31_t)0x7f29893f, (q31_t)0xf161201b, (q31_t)0x7f28d15d, (q31_t)0xf15ae228, (q31_t)0x7f28192d, (q31_t)0xf154a43d,
+  (q31_t)0x7f2760af, (q31_t)0xf14e665c, (q31_t)0x7f26a7e2, (q31_t)0xf1482884, (q31_t)0x7f25eec7, (q31_t)0xf141eab5, (q31_t)0x7f25355d, (q31_t)0xf13bacef,
+  (q31_t)0x7f247ba5, (q31_t)0xf1356f32, (q31_t)0x7f23c19e, (q31_t)0xf12f317e, (q31_t)0x7f230749, (q31_t)0xf128f3d4, (q31_t)0x7f224ca6, (q31_t)0xf122b632,
+  (q31_t)0x7f2191b4, (q31_t)0xf11c789a, (q31_t)0x7f20d674, (q31_t)0xf1163b0b, (q31_t)0x7f201ae5, (q31_t)0xf10ffd85, (q31_t)0x7f1f5f08, (q31_t)0xf109c009,
+  (q31_t)0x7f1ea2dc, (q31_t)0xf1038295, (q31_t)0x7f1de662, (q31_t)0xf0fd452b, (q31_t)0x7f1d299a, (q31_t)0xf0f707ca, (q31_t)0x7f1c6c83, (q31_t)0xf0f0ca72,
+  (q31_t)0x7f1baf1e, (q31_t)0xf0ea8d24, (q31_t)0x7f1af16a, (q31_t)0xf0e44fdf, (q31_t)0x7f1a3368, (q31_t)0xf0de12a3, (q31_t)0x7f197518, (q31_t)0xf0d7d571,
+  (q31_t)0x7f18b679, (q31_t)0xf0d19848, (q31_t)0x7f17f78c, (q31_t)0xf0cb5b28, (q31_t)0x7f173850, (q31_t)0xf0c51e12, (q31_t)0x7f1678c6, (q31_t)0xf0bee105,
+  (q31_t)0x7f15b8ee, (q31_t)0xf0b8a401, (q31_t)0x7f14f8c7, (q31_t)0xf0b26707, (q31_t)0x7f143852, (q31_t)0xf0ac2a16, (q31_t)0x7f13778e, (q31_t)0xf0a5ed2f,
+  (q31_t)0x7f12b67c, (q31_t)0xf09fb051, (q31_t)0x7f11f51c, (q31_t)0xf099737d, (q31_t)0x7f11336d, (q31_t)0xf09336b2, (q31_t)0x7f107170, (q31_t)0xf08cf9f1,
+  (q31_t)0x7f0faf25, (q31_t)0xf086bd39, (q31_t)0x7f0eec8b, (q31_t)0xf080808b, (q31_t)0x7f0e29a3, (q31_t)0xf07a43e7, (q31_t)0x7f0d666c, (q31_t)0xf074074c,
+  (q31_t)0x7f0ca2e7, (q31_t)0xf06dcaba, (q31_t)0x7f0bdf14, (q31_t)0xf0678e32, (q31_t)0x7f0b1af2, (q31_t)0xf06151b4, (q31_t)0x7f0a5682, (q31_t)0xf05b1540,
+  (q31_t)0x7f0991c4, (q31_t)0xf054d8d5, (q31_t)0x7f08ccb7, (q31_t)0xf04e9c73, (q31_t)0x7f08075c, (q31_t)0xf048601c, (q31_t)0x7f0741b2, (q31_t)0xf04223ce,
+  (q31_t)0x7f067bba, (q31_t)0xf03be78a, (q31_t)0x7f05b574, (q31_t)0xf035ab4f, (q31_t)0x7f04eedf, (q31_t)0xf02f6f1f, (q31_t)0x7f0427fc, (q31_t)0xf02932f8,
+  (q31_t)0x7f0360cb, (q31_t)0xf022f6da, (q31_t)0x7f02994b, (q31_t)0xf01cbac7, (q31_t)0x7f01d17d, (q31_t)0xf0167ebd, (q31_t)0x7f010961, (q31_t)0xf01042be,
+  (q31_t)0x7f0040f6, (q31_t)0xf00a06c8, (q31_t)0x7eff783d, (q31_t)0xf003cadc, (q31_t)0x7efeaf36, (q31_t)0xeffd8ef9, (q31_t)0x7efde5e0, (q31_t)0xeff75321,
+  (q31_t)0x7efd1c3c, (q31_t)0xeff11753, (q31_t)0x7efc524a, (q31_t)0xefeadb8e, (q31_t)0x7efb8809, (q31_t)0xefe49fd3, (q31_t)0x7efabd7a, (q31_t)0xefde6423,
+  (q31_t)0x7ef9f29d, (q31_t)0xefd8287c, (q31_t)0x7ef92771, (q31_t)0xefd1ecdf, (q31_t)0x7ef85bf7, (q31_t)0xefcbb14c, (q31_t)0x7ef7902f, (q31_t)0xefc575c3,
+  (q31_t)0x7ef6c418, (q31_t)0xefbf3a45, (q31_t)0x7ef5f7b3, (q31_t)0xefb8fed0, (q31_t)0x7ef52b00, (q31_t)0xefb2c365, (q31_t)0x7ef45dfe, (q31_t)0xefac8804,
+  (q31_t)0x7ef390ae, (q31_t)0xefa64cae, (q31_t)0x7ef2c310, (q31_t)0xefa01161, (q31_t)0x7ef1f524, (q31_t)0xef99d61f, (q31_t)0x7ef126e9, (q31_t)0xef939ae6,
+  (q31_t)0x7ef05860, (q31_t)0xef8d5fb8, (q31_t)0x7eef8988, (q31_t)0xef872494, (q31_t)0x7eeeba62, (q31_t)0xef80e97a, (q31_t)0x7eedeaee, (q31_t)0xef7aae6b,
+  (q31_t)0x7eed1b2c, (q31_t)0xef747365, (q31_t)0x7eec4b1b, (q31_t)0xef6e386a, (q31_t)0x7eeb7abc, (q31_t)0xef67fd79, (q31_t)0x7eeaaa0f, (q31_t)0xef61c292,
+  (q31_t)0x7ee9d914, (q31_t)0xef5b87b5, (q31_t)0x7ee907ca, (q31_t)0xef554ce3, (q31_t)0x7ee83632, (q31_t)0xef4f121b, (q31_t)0x7ee7644c, (q31_t)0xef48d75d,
+  (q31_t)0x7ee69217, (q31_t)0xef429caa, (q31_t)0x7ee5bf94, (q31_t)0xef3c6201, (q31_t)0x7ee4ecc3, (q31_t)0xef362762, (q31_t)0x7ee419a3, (q31_t)0xef2feccd,
+  (q31_t)0x7ee34636, (q31_t)0xef29b243, (q31_t)0x7ee2727a, (q31_t)0xef2377c4, (q31_t)0x7ee19e6f, (q31_t)0xef1d3d4e, (q31_t)0x7ee0ca17, (q31_t)0xef1702e4,
+  (q31_t)0x7edff570, (q31_t)0xef10c883, (q31_t)0x7edf207b, (q31_t)0xef0a8e2d, (q31_t)0x7ede4b38, (q31_t)0xef0453e2, (q31_t)0x7edd75a6, (q31_t)0xeefe19a1,
+  (q31_t)0x7edc9fc6, (q31_t)0xeef7df6a, (q31_t)0x7edbc998, (q31_t)0xeef1a53e, (q31_t)0x7edaf31c, (q31_t)0xeeeb6b1c, (q31_t)0x7eda1c51, (q31_t)0xeee53105,
+  (q31_t)0x7ed94538, (q31_t)0xeedef6f9, (q31_t)0x7ed86dd1, (q31_t)0xeed8bcf7, (q31_t)0x7ed7961c, (q31_t)0xeed28300, (q31_t)0x7ed6be18, (q31_t)0xeecc4913,
+  (q31_t)0x7ed5e5c6, (q31_t)0xeec60f31, (q31_t)0x7ed50d26, (q31_t)0xeebfd55a, (q31_t)0x7ed43438, (q31_t)0xeeb99b8d, (q31_t)0x7ed35afb, (q31_t)0xeeb361cb,
+  (q31_t)0x7ed28171, (q31_t)0xeead2813, (q31_t)0x7ed1a798, (q31_t)0xeea6ee66, (q31_t)0x7ed0cd70, (q31_t)0xeea0b4c4, (q31_t)0x7ecff2fb, (q31_t)0xee9a7b2d,
+  (q31_t)0x7ecf1837, (q31_t)0xee9441a0, (q31_t)0x7ece3d25, (q31_t)0xee8e081e, (q31_t)0x7ecd61c5, (q31_t)0xee87cea7, (q31_t)0x7ecc8617, (q31_t)0xee81953b,
+  (q31_t)0x7ecbaa1a, (q31_t)0xee7b5bd9, (q31_t)0x7ecacdd0, (q31_t)0xee752283, (q31_t)0x7ec9f137, (q31_t)0xee6ee937, (q31_t)0x7ec9144f, (q31_t)0xee68aff6,
+  (q31_t)0x7ec8371a, (q31_t)0xee6276bf, (q31_t)0x7ec75996, (q31_t)0xee5c3d94, (q31_t)0x7ec67bc5, (q31_t)0xee560473, (q31_t)0x7ec59da5, (q31_t)0xee4fcb5e,
+  (q31_t)0x7ec4bf36, (q31_t)0xee499253, (q31_t)0x7ec3e07a, (q31_t)0xee435953, (q31_t)0x7ec3016f, (q31_t)0xee3d205e, (q31_t)0x7ec22217, (q31_t)0xee36e775,
+  (q31_t)0x7ec14270, (q31_t)0xee30ae96, (q31_t)0x7ec0627a, (q31_t)0xee2a75c2, (q31_t)0x7ebf8237, (q31_t)0xee243cf9, (q31_t)0x7ebea1a6, (q31_t)0xee1e043b,
+  (q31_t)0x7ebdc0c6, (q31_t)0xee17cb88, (q31_t)0x7ebcdf98, (q31_t)0xee1192e0, (q31_t)0x7ebbfe1c, (q31_t)0xee0b5a43, (q31_t)0x7ebb1c52, (q31_t)0xee0521b2,
+  (q31_t)0x7eba3a39, (q31_t)0xedfee92b, (q31_t)0x7eb957d2, (q31_t)0xedf8b0b0, (q31_t)0x7eb8751e, (q31_t)0xedf2783f, (q31_t)0x7eb7921b, (q31_t)0xedec3fda,
+  (q31_t)0x7eb6aeca, (q31_t)0xede60780, (q31_t)0x7eb5cb2a, (q31_t)0xeddfcf31, (q31_t)0x7eb4e73d, (q31_t)0xedd996ed, (q31_t)0x7eb40301, (q31_t)0xedd35eb5,
+  (q31_t)0x7eb31e78, (q31_t)0xedcd2687, (q31_t)0x7eb239a0, (q31_t)0xedc6ee65, (q31_t)0x7eb1547a, (q31_t)0xedc0b64e, (q31_t)0x7eb06f05, (q31_t)0xedba7e43,
+  (q31_t)0x7eaf8943, (q31_t)0xedb44642, (q31_t)0x7eaea333, (q31_t)0xedae0e4d, (q31_t)0x7eadbcd4, (q31_t)0xeda7d664, (q31_t)0x7eacd627, (q31_t)0xeda19e85,
+  (q31_t)0x7eabef2c, (q31_t)0xed9b66b2, (q31_t)0x7eab07e3, (q31_t)0xed952eea, (q31_t)0x7eaa204c, (q31_t)0xed8ef72e, (q31_t)0x7ea93867, (q31_t)0xed88bf7d,
+  (q31_t)0x7ea85033, (q31_t)0xed8287d7, (q31_t)0x7ea767b2, (q31_t)0xed7c503d, (q31_t)0x7ea67ee2, (q31_t)0xed7618ae, (q31_t)0x7ea595c4, (q31_t)0xed6fe12b,
+  (q31_t)0x7ea4ac58, (q31_t)0xed69a9b3, (q31_t)0x7ea3c29e, (q31_t)0xed637246, (q31_t)0x7ea2d896, (q31_t)0xed5d3ae5, (q31_t)0x7ea1ee3f, (q31_t)0xed570390,
+  (q31_t)0x7ea1039b, (q31_t)0xed50cc46, (q31_t)0x7ea018a8, (q31_t)0xed4a9507, (q31_t)0x7e9f2d68, (q31_t)0xed445dd5, (q31_t)0x7e9e41d9, (q31_t)0xed3e26ad,
+  (q31_t)0x7e9d55fc, (q31_t)0xed37ef91, (q31_t)0x7e9c69d1, (q31_t)0xed31b881, (q31_t)0x7e9b7d58, (q31_t)0xed2b817d, (q31_t)0x7e9a9091, (q31_t)0xed254a84,
+  (q31_t)0x7e99a37c, (q31_t)0xed1f1396, (q31_t)0x7e98b618, (q31_t)0xed18dcb5, (q31_t)0x7e97c867, (q31_t)0xed12a5df, (q31_t)0x7e96da67, (q31_t)0xed0c6f14,
+  (q31_t)0x7e95ec1a, (q31_t)0xed063856, (q31_t)0x7e94fd7e, (q31_t)0xed0001a3, (q31_t)0x7e940e94, (q31_t)0xecf9cafb, (q31_t)0x7e931f5c, (q31_t)0xecf39460,
+  (q31_t)0x7e922fd6, (q31_t)0xeced5dd0, (q31_t)0x7e914002, (q31_t)0xece7274c, (q31_t)0x7e904fe0, (q31_t)0xece0f0d4, (q31_t)0x7e8f5f70, (q31_t)0xecdaba67,
+  (q31_t)0x7e8e6eb2, (q31_t)0xecd48407, (q31_t)0x7e8d7da6, (q31_t)0xecce4db2, (q31_t)0x7e8c8c4b, (q31_t)0xecc81769, (q31_t)0x7e8b9aa3, (q31_t)0xecc1e12c,
+  (q31_t)0x7e8aa8ac, (q31_t)0xecbbaafb, (q31_t)0x7e89b668, (q31_t)0xecb574d5, (q31_t)0x7e88c3d5, (q31_t)0xecaf3ebc, (q31_t)0x7e87d0f5, (q31_t)0xeca908ae,
+  (q31_t)0x7e86ddc6, (q31_t)0xeca2d2ad, (q31_t)0x7e85ea49, (q31_t)0xec9c9cb7, (q31_t)0x7e84f67e, (q31_t)0xec9666cd, (q31_t)0x7e840265, (q31_t)0xec9030f0,
+  (q31_t)0x7e830dff, (q31_t)0xec89fb1e, (q31_t)0x7e82194a, (q31_t)0xec83c558, (q31_t)0x7e812447, (q31_t)0xec7d8f9e, (q31_t)0x7e802ef6, (q31_t)0xec7759f1,
+  (q31_t)0x7e7f3957, (q31_t)0xec71244f, (q31_t)0x7e7e436a, (q31_t)0xec6aeeba, (q31_t)0x7e7d4d2f, (q31_t)0xec64b930, (q31_t)0x7e7c56a5, (q31_t)0xec5e83b3,
+  (q31_t)0x7e7b5fce, (q31_t)0xec584e41, (q31_t)0x7e7a68a9, (q31_t)0xec5218dc, (q31_t)0x7e797136, (q31_t)0xec4be383, (q31_t)0x7e787975, (q31_t)0xec45ae36,
+  (q31_t)0x7e778166, (q31_t)0xec3f78f6, (q31_t)0x7e768908, (q31_t)0xec3943c1, (q31_t)0x7e75905d, (q31_t)0xec330e99, (q31_t)0x7e749764, (q31_t)0xec2cd97d,
+  (q31_t)0x7e739e1d, (q31_t)0xec26a46d, (q31_t)0x7e72a488, (q31_t)0xec206f69, (q31_t)0x7e71aaa4, (q31_t)0xec1a3a72, (q31_t)0x7e70b073, (q31_t)0xec140587,
+  (q31_t)0x7e6fb5f4, (q31_t)0xec0dd0a8, (q31_t)0x7e6ebb27, (q31_t)0xec079bd6, (q31_t)0x7e6dc00c, (q31_t)0xec01670f, (q31_t)0x7e6cc4a2, (q31_t)0xebfb3256,
+  (q31_t)0x7e6bc8eb, (q31_t)0xebf4fda8, (q31_t)0x7e6acce6, (q31_t)0xebeec907, (q31_t)0x7e69d093, (q31_t)0xebe89472, (q31_t)0x7e68d3f2, (q31_t)0xebe25fea,
+  (q31_t)0x7e67d703, (q31_t)0xebdc2b6e, (q31_t)0x7e66d9c6, (q31_t)0xebd5f6fe, (q31_t)0x7e65dc3b, (q31_t)0xebcfc29b, (q31_t)0x7e64de62, (q31_t)0xebc98e45,
+  (q31_t)0x7e63e03b, (q31_t)0xebc359fb, (q31_t)0x7e62e1c6, (q31_t)0xebbd25bd, (q31_t)0x7e61e303, (q31_t)0xebb6f18c, (q31_t)0x7e60e3f2, (q31_t)0xebb0bd67,
+  (q31_t)0x7e5fe493, (q31_t)0xebaa894f, (q31_t)0x7e5ee4e6, (q31_t)0xeba45543, (q31_t)0x7e5de4ec, (q31_t)0xeb9e2144, (q31_t)0x7e5ce4a3, (q31_t)0xeb97ed52,
+  (q31_t)0x7e5be40c, (q31_t)0xeb91b96c, (q31_t)0x7e5ae328, (q31_t)0xeb8b8593, (q31_t)0x7e59e1f5, (q31_t)0xeb8551c6, (q31_t)0x7e58e075, (q31_t)0xeb7f1e06,
+  (q31_t)0x7e57dea7, (q31_t)0xeb78ea52, (q31_t)0x7e56dc8a, (q31_t)0xeb72b6ac, (q31_t)0x7e55da20, (q31_t)0xeb6c8312, (q31_t)0x7e54d768, (q31_t)0xeb664f84,
+  (q31_t)0x7e53d462, (q31_t)0xeb601c04, (q31_t)0x7e52d10e, (q31_t)0xeb59e890, (q31_t)0x7e51cd6c, (q31_t)0xeb53b529, (q31_t)0x7e50c97c, (q31_t)0xeb4d81ce,
+  (q31_t)0x7e4fc53e, (q31_t)0xeb474e81, (q31_t)0x7e4ec0b2, (q31_t)0xeb411b40, (q31_t)0x7e4dbbd9, (q31_t)0xeb3ae80c, (q31_t)0x7e4cb6b1, (q31_t)0xeb34b4e4,
+  (q31_t)0x7e4bb13c, (q31_t)0xeb2e81ca, (q31_t)0x7e4aab78, (q31_t)0xeb284ebc, (q31_t)0x7e49a567, (q31_t)0xeb221bbb, (q31_t)0x7e489f08, (q31_t)0xeb1be8c8,
+  (q31_t)0x7e47985b, (q31_t)0xeb15b5e1, (q31_t)0x7e469160, (q31_t)0xeb0f8307, (q31_t)0x7e458a17, (q31_t)0xeb095039, (q31_t)0x7e448281, (q31_t)0xeb031d79,
+  (q31_t)0x7e437a9c, (q31_t)0xeafceac6, (q31_t)0x7e427269, (q31_t)0xeaf6b81f, (q31_t)0x7e4169e9, (q31_t)0xeaf08586, (q31_t)0x7e40611b, (q31_t)0xeaea52fa,
+  (q31_t)0x7e3f57ff, (q31_t)0xeae4207a, (q31_t)0x7e3e4e95, (q31_t)0xeaddee08, (q31_t)0x7e3d44dd, (q31_t)0xead7bba3, (q31_t)0x7e3c3ad7, (q31_t)0xead1894b,
+  (q31_t)0x7e3b3083, (q31_t)0xeacb56ff, (q31_t)0x7e3a25e2, (q31_t)0xeac524c1, (q31_t)0x7e391af3, (q31_t)0xeabef290, (q31_t)0x7e380fb5, (q31_t)0xeab8c06c,
+  (q31_t)0x7e37042a, (q31_t)0xeab28e56, (q31_t)0x7e35f851, (q31_t)0xeaac5c4c, (q31_t)0x7e34ec2b, (q31_t)0xeaa62a4f, (q31_t)0x7e33dfb6, (q31_t)0xea9ff860,
+  (q31_t)0x7e32d2f4, (q31_t)0xea99c67e, (q31_t)0x7e31c5e3, (q31_t)0xea9394a9, (q31_t)0x7e30b885, (q31_t)0xea8d62e1, (q31_t)0x7e2faad9, (q31_t)0xea873127,
+  (q31_t)0x7e2e9cdf, (q31_t)0xea80ff7a, (q31_t)0x7e2d8e97, (q31_t)0xea7acdda, (q31_t)0x7e2c8002, (q31_t)0xea749c47, (q31_t)0x7e2b711f, (q31_t)0xea6e6ac2,
+  (q31_t)0x7e2a61ed, (q31_t)0xea683949, (q31_t)0x7e29526e, (q31_t)0xea6207df, (q31_t)0x7e2842a2, (q31_t)0xea5bd681, (q31_t)0x7e273287, (q31_t)0xea55a531,
+  (q31_t)0x7e26221f, (q31_t)0xea4f73ee, (q31_t)0x7e251168, (q31_t)0xea4942b9, (q31_t)0x7e240064, (q31_t)0xea431191, (q31_t)0x7e22ef12, (q31_t)0xea3ce077,
+  (q31_t)0x7e21dd73, (q31_t)0xea36af69, (q31_t)0x7e20cb85, (q31_t)0xea307e6a, (q31_t)0x7e1fb94a, (q31_t)0xea2a4d78, (q31_t)0x7e1ea6c1, (q31_t)0xea241c93,
+  (q31_t)0x7e1d93ea, (q31_t)0xea1debbb, (q31_t)0x7e1c80c5, (q31_t)0xea17baf2, (q31_t)0x7e1b6d53, (q31_t)0xea118a35, (q31_t)0x7e1a5992, (q31_t)0xea0b5987,
+  (q31_t)0x7e194584, (q31_t)0xea0528e5, (q31_t)0x7e183128, (q31_t)0xe9fef852, (q31_t)0x7e171c7f, (q31_t)0xe9f8c7cc, (q31_t)0x7e160787, (q31_t)0xe9f29753,
+  (q31_t)0x7e14f242, (q31_t)0xe9ec66e8, (q31_t)0x7e13dcaf, (q31_t)0xe9e6368b, (q31_t)0x7e12c6ce, (q31_t)0xe9e0063c, (q31_t)0x7e11b0a0, (q31_t)0xe9d9d5fa,
+  (q31_t)0x7e109a24, (q31_t)0xe9d3a5c5, (q31_t)0x7e0f835a, (q31_t)0xe9cd759f, (q31_t)0x7e0e6c42, (q31_t)0xe9c74586, (q31_t)0x7e0d54dc, (q31_t)0xe9c1157a,
+  (q31_t)0x7e0c3d29, (q31_t)0xe9bae57d, (q31_t)0x7e0b2528, (q31_t)0xe9b4b58d, (q31_t)0x7e0a0cd9, (q31_t)0xe9ae85ab, (q31_t)0x7e08f43d, (q31_t)0xe9a855d7,
+  (q31_t)0x7e07db52, (q31_t)0xe9a22610, (q31_t)0x7e06c21a, (q31_t)0xe99bf658, (q31_t)0x7e05a894, (q31_t)0xe995c6ad, (q31_t)0x7e048ec1, (q31_t)0xe98f9710,
+  (q31_t)0x7e0374a0, (q31_t)0xe9896781, (q31_t)0x7e025a31, (q31_t)0xe98337ff, (q31_t)0x7e013f74, (q31_t)0xe97d088c, (q31_t)0x7e00246a, (q31_t)0xe976d926,
+  (q31_t)0x7dff0911, (q31_t)0xe970a9ce, (q31_t)0x7dfded6c, (q31_t)0xe96a7a85, (q31_t)0x7dfcd178, (q31_t)0xe9644b49, (q31_t)0x7dfbb537, (q31_t)0xe95e1c1b,
+  (q31_t)0x7dfa98a8, (q31_t)0xe957ecfb, (q31_t)0x7df97bcb, (q31_t)0xe951bde9, (q31_t)0x7df85ea0, (q31_t)0xe94b8ee5, (q31_t)0x7df74128, (q31_t)0xe9455fef,
+  (q31_t)0x7df62362, (q31_t)0xe93f3107, (q31_t)0x7df5054f, (q31_t)0xe939022d, (q31_t)0x7df3e6ee, (q31_t)0xe932d361, (q31_t)0x7df2c83f, (q31_t)0xe92ca4a4,
+  (q31_t)0x7df1a942, (q31_t)0xe92675f4, (q31_t)0x7df089f8, (q31_t)0xe9204752, (q31_t)0x7def6a60, (q31_t)0xe91a18bf, (q31_t)0x7dee4a7a, (q31_t)0xe913ea39,
+  (q31_t)0x7ded2a47, (q31_t)0xe90dbbc2, (q31_t)0x7dec09c6, (q31_t)0xe9078d59, (q31_t)0x7deae8f7, (q31_t)0xe9015efe, (q31_t)0x7de9c7da, (q31_t)0xe8fb30b1,
+  (q31_t)0x7de8a670, (q31_t)0xe8f50273, (q31_t)0x7de784b9, (q31_t)0xe8eed443, (q31_t)0x7de662b3, (q31_t)0xe8e8a621, (q31_t)0x7de54060, (q31_t)0xe8e2780d,
+  (q31_t)0x7de41dc0, (q31_t)0xe8dc4a07, (q31_t)0x7de2fad1, (q31_t)0xe8d61c10, (q31_t)0x7de1d795, (q31_t)0xe8cfee27, (q31_t)0x7de0b40b, (q31_t)0xe8c9c04c,
+  (q31_t)0x7ddf9034, (q31_t)0xe8c39280, (q31_t)0x7dde6c0f, (q31_t)0xe8bd64c2, (q31_t)0x7ddd479d, (q31_t)0xe8b73712, (q31_t)0x7ddc22dc, (q31_t)0xe8b10971,
+  (q31_t)0x7ddafdce, (q31_t)0xe8aadbde, (q31_t)0x7dd9d873, (q31_t)0xe8a4ae59, (q31_t)0x7dd8b2ca, (q31_t)0xe89e80e3, (q31_t)0x7dd78cd3, (q31_t)0xe898537b,
+  (q31_t)0x7dd6668f, (q31_t)0xe8922622, (q31_t)0x7dd53ffc, (q31_t)0xe88bf8d7, (q31_t)0x7dd4191d, (q31_t)0xe885cb9a, (q31_t)0x7dd2f1f0, (q31_t)0xe87f9e6c,
+  (q31_t)0x7dd1ca75, (q31_t)0xe879714d, (q31_t)0x7dd0a2ac, (q31_t)0xe873443c, (q31_t)0x7dcf7a96, (q31_t)0xe86d173a, (q31_t)0x7dce5232, (q31_t)0xe866ea46,
+  (q31_t)0x7dcd2981, (q31_t)0xe860bd61, (q31_t)0x7dcc0082, (q31_t)0xe85a908a, (q31_t)0x7dcad736, (q31_t)0xe85463c2, (q31_t)0x7dc9ad9c, (q31_t)0xe84e3708,
+  (q31_t)0x7dc883b4, (q31_t)0xe8480a5d, (q31_t)0x7dc7597f, (q31_t)0xe841ddc1, (q31_t)0x7dc62efc, (q31_t)0xe83bb133, (q31_t)0x7dc5042b, (q31_t)0xe83584b4,
+  (q31_t)0x7dc3d90d, (q31_t)0xe82f5844, (q31_t)0x7dc2ada2, (q31_t)0xe8292be3, (q31_t)0x7dc181e8, (q31_t)0xe822ff90, (q31_t)0x7dc055e2, (q31_t)0xe81cd34b,
+  (q31_t)0x7dbf298d, (q31_t)0xe816a716, (q31_t)0x7dbdfceb, (q31_t)0xe8107aef, (q31_t)0x7dbccffc, (q31_t)0xe80a4ed7, (q31_t)0x7dbba2bf, (q31_t)0xe80422ce,
+  (q31_t)0x7dba7534, (q31_t)0xe7fdf6d4, (q31_t)0x7db9475c, (q31_t)0xe7f7cae8, (q31_t)0x7db81936, (q31_t)0xe7f19f0c, (q31_t)0x7db6eac3, (q31_t)0xe7eb733e,
+  (q31_t)0x7db5bc02, (q31_t)0xe7e5477f, (q31_t)0x7db48cf4, (q31_t)0xe7df1bcf, (q31_t)0x7db35d98, (q31_t)0xe7d8f02d, (q31_t)0x7db22def, (q31_t)0xe7d2c49b,
+  (q31_t)0x7db0fdf8, (q31_t)0xe7cc9917, (q31_t)0x7dafcdb3, (q31_t)0xe7c66da3, (q31_t)0x7dae9d21, (q31_t)0xe7c0423d, (q31_t)0x7dad6c42, (q31_t)0xe7ba16e7,
+  (q31_t)0x7dac3b15, (q31_t)0xe7b3eb9f, (q31_t)0x7dab099a, (q31_t)0xe7adc066, (q31_t)0x7da9d7d2, (q31_t)0xe7a7953d, (q31_t)0x7da8a5bc, (q31_t)0xe7a16a22,
+  (q31_t)0x7da77359, (q31_t)0xe79b3f16, (q31_t)0x7da640a9, (q31_t)0xe795141a, (q31_t)0x7da50dab, (q31_t)0xe78ee92c, (q31_t)0x7da3da5f, (q31_t)0xe788be4e,
+  (q31_t)0x7da2a6c6, (q31_t)0xe782937e, (q31_t)0x7da172df, (q31_t)0xe77c68be, (q31_t)0x7da03eab, (q31_t)0xe7763e0d, (q31_t)0x7d9f0a29, (q31_t)0xe770136b,
+  (q31_t)0x7d9dd55a, (q31_t)0xe769e8d8, (q31_t)0x7d9ca03e, (q31_t)0xe763be55, (q31_t)0x7d9b6ad3, (q31_t)0xe75d93e0, (q31_t)0x7d9a351c, (q31_t)0xe757697b,
+  (q31_t)0x7d98ff17, (q31_t)0xe7513f25, (q31_t)0x7d97c8c4, (q31_t)0xe74b14de, (q31_t)0x7d969224, (q31_t)0xe744eaa6, (q31_t)0x7d955b37, (q31_t)0xe73ec07e,
+  (q31_t)0x7d9423fc, (q31_t)0xe7389665, (q31_t)0x7d92ec73, (q31_t)0xe7326c5b, (q31_t)0x7d91b49e, (q31_t)0xe72c4260, (q31_t)0x7d907c7a, (q31_t)0xe7261875,
+  (q31_t)0x7d8f4409, (q31_t)0xe71fee99, (q31_t)0x7d8e0b4b, (q31_t)0xe719c4cd, (q31_t)0x7d8cd240, (q31_t)0xe7139b10, (q31_t)0x7d8b98e6, (q31_t)0xe70d7162,
+  (q31_t)0x7d8a5f40, (q31_t)0xe70747c4, (q31_t)0x7d89254c, (q31_t)0xe7011e35, (q31_t)0x7d87eb0a, (q31_t)0xe6faf4b5, (q31_t)0x7d86b07c, (q31_t)0xe6f4cb45,
+  (q31_t)0x7d85759f, (q31_t)0xe6eea1e4, (q31_t)0x7d843a76, (q31_t)0xe6e87893, (q31_t)0x7d82fefe, (q31_t)0xe6e24f51, (q31_t)0x7d81c33a, (q31_t)0xe6dc261f,
+  (q31_t)0x7d808728, (q31_t)0xe6d5fcfc, (q31_t)0x7d7f4ac8, (q31_t)0xe6cfd3e9, (q31_t)0x7d7e0e1c, (q31_t)0xe6c9aae5, (q31_t)0x7d7cd121, (q31_t)0xe6c381f1,
+  (q31_t)0x7d7b93da, (q31_t)0xe6bd590d, (q31_t)0x7d7a5645, (q31_t)0xe6b73038, (q31_t)0x7d791862, (q31_t)0xe6b10772, (q31_t)0x7d77da32, (q31_t)0xe6aadebc,
+  (q31_t)0x7d769bb5, (q31_t)0xe6a4b616, (q31_t)0x7d755cea, (q31_t)0xe69e8d80, (q31_t)0x7d741dd2, (q31_t)0xe69864f9, (q31_t)0x7d72de6d, (q31_t)0xe6923c82,
+  (q31_t)0x7d719eba, (q31_t)0xe68c141a, (q31_t)0x7d705eba, (q31_t)0xe685ebc2, (q31_t)0x7d6f1e6c, (q31_t)0xe67fc37a, (q31_t)0x7d6dddd2, (q31_t)0xe6799b42,
+  (q31_t)0x7d6c9ce9, (q31_t)0xe6737319, (q31_t)0x7d6b5bb4, (q31_t)0xe66d4b01, (q31_t)0x7d6a1a31, (q31_t)0xe66722f7, (q31_t)0x7d68d860, (q31_t)0xe660fafe,
+  (q31_t)0x7d679642, (q31_t)0xe65ad315, (q31_t)0x7d6653d7, (q31_t)0xe654ab3b, (q31_t)0x7d65111f, (q31_t)0xe64e8371, (q31_t)0x7d63ce19, (q31_t)0xe6485bb7,
+  (q31_t)0x7d628ac6, (q31_t)0xe642340d, (q31_t)0x7d614725, (q31_t)0xe63c0c73, (q31_t)0x7d600338, (q31_t)0xe635e4e9, (q31_t)0x7d5ebefc, (q31_t)0xe62fbd6e,
+  (q31_t)0x7d5d7a74, (q31_t)0xe6299604, (q31_t)0x7d5c359e, (q31_t)0xe6236ea9, (q31_t)0x7d5af07b, (q31_t)0xe61d475e, (q31_t)0x7d59ab0a, (q31_t)0xe6172024,
+  (q31_t)0x7d58654d, (q31_t)0xe610f8f9, (q31_t)0x7d571f41, (q31_t)0xe60ad1de, (q31_t)0x7d55d8e9, (q31_t)0xe604aad4, (q31_t)0x7d549243, (q31_t)0xe5fe83d9,
+  (q31_t)0x7d534b50, (q31_t)0xe5f85cef, (q31_t)0x7d520410, (q31_t)0xe5f23614, (q31_t)0x7d50bc82, (q31_t)0xe5ec0f4a, (q31_t)0x7d4f74a7, (q31_t)0xe5e5e88f,
+  (q31_t)0x7d4e2c7f, (q31_t)0xe5dfc1e5, (q31_t)0x7d4ce409, (q31_t)0xe5d99b4b, (q31_t)0x7d4b9b46, (q31_t)0xe5d374c1, (q31_t)0x7d4a5236, (q31_t)0xe5cd4e47,
+  (q31_t)0x7d4908d9, (q31_t)0xe5c727dd, (q31_t)0x7d47bf2e, (q31_t)0xe5c10184, (q31_t)0x7d467536, (q31_t)0xe5badb3a, (q31_t)0x7d452af1, (q31_t)0xe5b4b501,
+  (q31_t)0x7d43e05e, (q31_t)0xe5ae8ed8, (q31_t)0x7d42957e, (q31_t)0xe5a868bf, (q31_t)0x7d414a51, (q31_t)0xe5a242b7, (q31_t)0x7d3ffed7, (q31_t)0xe59c1cbf,
+  (q31_t)0x7d3eb30f, (q31_t)0xe595f6d7, (q31_t)0x7d3d66fa, (q31_t)0xe58fd0ff, (q31_t)0x7d3c1a98, (q31_t)0xe589ab38, (q31_t)0x7d3acde9, (q31_t)0xe5838581,
+  (q31_t)0x7d3980ec, (q31_t)0xe57d5fda, (q31_t)0x7d3833a2, (q31_t)0xe5773a44, (q31_t)0x7d36e60b, (q31_t)0xe57114be, (q31_t)0x7d359827, (q31_t)0xe56aef49,
+  (q31_t)0x7d3449f5, (q31_t)0xe564c9e3, (q31_t)0x7d32fb76, (q31_t)0xe55ea48f, (q31_t)0x7d31acaa, (q31_t)0xe5587f4a, (q31_t)0x7d305d91, (q31_t)0xe5525a17,
+  (q31_t)0x7d2f0e2b, (q31_t)0xe54c34f3, (q31_t)0x7d2dbe77, (q31_t)0xe5460fe0, (q31_t)0x7d2c6e76, (q31_t)0xe53feade, (q31_t)0x7d2b1e28, (q31_t)0xe539c5ec,
+  (q31_t)0x7d29cd8c, (q31_t)0xe533a10a, (q31_t)0x7d287ca4, (q31_t)0xe52d7c39, (q31_t)0x7d272b6e, (q31_t)0xe5275779, (q31_t)0x7d25d9eb, (q31_t)0xe52132c9,
+  (q31_t)0x7d24881b, (q31_t)0xe51b0e2a, (q31_t)0x7d2335fe, (q31_t)0xe514e99b, (q31_t)0x7d21e393, (q31_t)0xe50ec51d, (q31_t)0x7d2090db, (q31_t)0xe508a0b0,
+  (q31_t)0x7d1f3dd6, (q31_t)0xe5027c53, (q31_t)0x7d1dea84, (q31_t)0xe4fc5807, (q31_t)0x7d1c96e5, (q31_t)0xe4f633cc, (q31_t)0x7d1b42f9, (q31_t)0xe4f00fa1,
+  (q31_t)0x7d19eebf, (q31_t)0xe4e9eb87, (q31_t)0x7d189a38, (q31_t)0xe4e3c77d, (q31_t)0x7d174564, (q31_t)0xe4dda385, (q31_t)0x7d15f043, (q31_t)0xe4d77f9d,
+  (q31_t)0x7d149ad5, (q31_t)0xe4d15bc6, (q31_t)0x7d134519, (q31_t)0xe4cb37ff, (q31_t)0x7d11ef11, (q31_t)0xe4c5144a, (q31_t)0x7d1098bb, (q31_t)0xe4bef0a5,
+  (q31_t)0x7d0f4218, (q31_t)0xe4b8cd11, (q31_t)0x7d0deb28, (q31_t)0xe4b2a98e, (q31_t)0x7d0c93eb, (q31_t)0xe4ac861b, (q31_t)0x7d0b3c60, (q31_t)0xe4a662ba,
+  (q31_t)0x7d09e489, (q31_t)0xe4a03f69, (q31_t)0x7d088c64, (q31_t)0xe49a1c29, (q31_t)0x7d0733f3, (q31_t)0xe493f8fb, (q31_t)0x7d05db34, (q31_t)0xe48dd5dd,
+  (q31_t)0x7d048228, (q31_t)0xe487b2d0, (q31_t)0x7d0328cf, (q31_t)0xe4818fd4, (q31_t)0x7d01cf29, (q31_t)0xe47b6ce9, (q31_t)0x7d007535, (q31_t)0xe4754a0e,
+  (q31_t)0x7cff1af5, (q31_t)0xe46f2745, (q31_t)0x7cfdc068, (q31_t)0xe469048d, (q31_t)0x7cfc658d, (q31_t)0xe462e1e6, (q31_t)0x7cfb0a65, (q31_t)0xe45cbf50,
+  (q31_t)0x7cf9aef0, (q31_t)0xe4569ccb, (q31_t)0x7cf8532f, (q31_t)0xe4507a57, (q31_t)0x7cf6f720, (q31_t)0xe44a57f4, (q31_t)0x7cf59ac4, (q31_t)0xe44435a2,
+  (q31_t)0x7cf43e1a, (q31_t)0xe43e1362, (q31_t)0x7cf2e124, (q31_t)0xe437f132, (q31_t)0x7cf183e1, (q31_t)0xe431cf14, (q31_t)0x7cf02651, (q31_t)0xe42bad07,
+  (q31_t)0x7ceec873, (q31_t)0xe4258b0a, (q31_t)0x7ced6a49, (q31_t)0xe41f6920, (q31_t)0x7cec0bd1, (q31_t)0xe4194746, (q31_t)0x7ceaad0c, (q31_t)0xe413257d,
+  (q31_t)0x7ce94dfb, (q31_t)0xe40d03c6, (q31_t)0x7ce7ee9c, (q31_t)0xe406e220, (q31_t)0x7ce68ef0, (q31_t)0xe400c08b, (q31_t)0x7ce52ef7, (q31_t)0xe3fa9f08,
+  (q31_t)0x7ce3ceb2, (q31_t)0xe3f47d96, (q31_t)0x7ce26e1f, (q31_t)0xe3ee5c35, (q31_t)0x7ce10d3f, (q31_t)0xe3e83ae5, (q31_t)0x7cdfac12, (q31_t)0xe3e219a7,
+  (q31_t)0x7cde4a98, (q31_t)0xe3dbf87a, (q31_t)0x7cdce8d1, (q31_t)0xe3d5d75e, (q31_t)0x7cdb86bd, (q31_t)0xe3cfb654, (q31_t)0x7cda245c, (q31_t)0xe3c9955b,
+  (q31_t)0x7cd8c1ae, (q31_t)0xe3c37474, (q31_t)0x7cd75eb3, (q31_t)0xe3bd539e, (q31_t)0x7cd5fb6a, (q31_t)0xe3b732d9, (q31_t)0x7cd497d5, (q31_t)0xe3b11226,
+  (q31_t)0x7cd333f3, (q31_t)0xe3aaf184, (q31_t)0x7cd1cfc4, (q31_t)0xe3a4d0f4, (q31_t)0x7cd06b48, (q31_t)0xe39eb075, (q31_t)0x7ccf067f, (q31_t)0xe3989008,
+  (q31_t)0x7ccda169, (q31_t)0xe3926fad, (q31_t)0x7ccc3c06, (q31_t)0xe38c4f63, (q31_t)0x7ccad656, (q31_t)0xe3862f2a, (q31_t)0x7cc97059, (q31_t)0xe3800f03,
+  (q31_t)0x7cc80a0f, (q31_t)0xe379eeed, (q31_t)0x7cc6a378, (q31_t)0xe373ceea, (q31_t)0x7cc53c94, (q31_t)0xe36daef7, (q31_t)0x7cc3d563, (q31_t)0xe3678f17,
+  (q31_t)0x7cc26de5, (q31_t)0xe3616f48, (q31_t)0x7cc1061a, (q31_t)0xe35b4f8b, (q31_t)0x7cbf9e03, (q31_t)0xe3552fdf, (q31_t)0x7cbe359e, (q31_t)0xe34f1045,
+  (q31_t)0x7cbcccec, (q31_t)0xe348f0bd, (q31_t)0x7cbb63ee, (q31_t)0xe342d146, (q31_t)0x7cb9faa2, (q31_t)0xe33cb1e1, (q31_t)0x7cb8910a, (q31_t)0xe336928e,
+  (q31_t)0x7cb72724, (q31_t)0xe330734d, (q31_t)0x7cb5bcf2, (q31_t)0xe32a541d, (q31_t)0x7cb45272, (q31_t)0xe3243500, (q31_t)0x7cb2e7a6, (q31_t)0xe31e15f4,
+  (q31_t)0x7cb17c8d, (q31_t)0xe317f6fa, (q31_t)0x7cb01127, (q31_t)0xe311d811, (q31_t)0x7caea574, (q31_t)0xe30bb93b, (q31_t)0x7cad3974, (q31_t)0xe3059a76,
+  (q31_t)0x7cabcd28, (q31_t)0xe2ff7bc3, (q31_t)0x7caa608e, (q31_t)0xe2f95d23, (q31_t)0x7ca8f3a7, (q31_t)0xe2f33e94, (q31_t)0x7ca78674, (q31_t)0xe2ed2017,
+  (q31_t)0x7ca618f3, (q31_t)0xe2e701ac, (q31_t)0x7ca4ab26, (q31_t)0xe2e0e352, (q31_t)0x7ca33d0c, (q31_t)0xe2dac50b, (q31_t)0x7ca1cea5, (q31_t)0xe2d4a6d6,
+  (q31_t)0x7ca05ff1, (q31_t)0xe2ce88b3, (q31_t)0x7c9ef0f0, (q31_t)0xe2c86aa2, (q31_t)0x7c9d81a3, (q31_t)0xe2c24ca2, (q31_t)0x7c9c1208, (q31_t)0xe2bc2eb5,
+  (q31_t)0x7c9aa221, (q31_t)0xe2b610da, (q31_t)0x7c9931ec, (q31_t)0xe2aff311, (q31_t)0x7c97c16b, (q31_t)0xe2a9d55a, (q31_t)0x7c96509d, (q31_t)0xe2a3b7b5,
+  (q31_t)0x7c94df83, (q31_t)0xe29d9a23, (q31_t)0x7c936e1b, (q31_t)0xe2977ca2, (q31_t)0x7c91fc66, (q31_t)0xe2915f34, (q31_t)0x7c908a65, (q31_t)0xe28b41d7,
+  (q31_t)0x7c8f1817, (q31_t)0xe285248d, (q31_t)0x7c8da57c, (q31_t)0xe27f0755, (q31_t)0x7c8c3294, (q31_t)0xe278ea30, (q31_t)0x7c8abf5f, (q31_t)0xe272cd1c,
+  (q31_t)0x7c894bde, (q31_t)0xe26cb01b, (q31_t)0x7c87d810, (q31_t)0xe266932c, (q31_t)0x7c8663f4, (q31_t)0xe260764f, (q31_t)0x7c84ef8c, (q31_t)0xe25a5984,
+  (q31_t)0x7c837ad8, (q31_t)0xe2543ccc, (q31_t)0x7c8205d6, (q31_t)0xe24e2026, (q31_t)0x7c809088, (q31_t)0xe2480393, (q31_t)0x7c7f1aed, (q31_t)0xe241e711,
+  (q31_t)0x7c7da505, (q31_t)0xe23bcaa2, (q31_t)0x7c7c2ed0, (q31_t)0xe235ae46, (q31_t)0x7c7ab84e, (q31_t)0xe22f91fc, (q31_t)0x7c794180, (q31_t)0xe22975c4,
+  (q31_t)0x7c77ca65, (q31_t)0xe223599e, (q31_t)0x7c7652fd, (q31_t)0xe21d3d8b, (q31_t)0x7c74db48, (q31_t)0xe217218b, (q31_t)0x7c736347, (q31_t)0xe211059d,
+  (q31_t)0x7c71eaf9, (q31_t)0xe20ae9c1, (q31_t)0x7c70725e, (q31_t)0xe204cdf8, (q31_t)0x7c6ef976, (q31_t)0xe1feb241, (q31_t)0x7c6d8041, (q31_t)0xe1f8969d,
+  (q31_t)0x7c6c06c0, (q31_t)0xe1f27b0b, (q31_t)0x7c6a8cf2, (q31_t)0xe1ec5f8c, (q31_t)0x7c6912d7, (q31_t)0xe1e64420, (q31_t)0x7c679870, (q31_t)0xe1e028c6,
+  (q31_t)0x7c661dbc, (q31_t)0xe1da0d7e, (q31_t)0x7c64a2bb, (q31_t)0xe1d3f24a, (q31_t)0x7c63276d, (q31_t)0xe1cdd727, (q31_t)0x7c61abd3, (q31_t)0xe1c7bc18,
+  (q31_t)0x7c602fec, (q31_t)0xe1c1a11b, (q31_t)0x7c5eb3b8, (q31_t)0xe1bb8631, (q31_t)0x7c5d3737, (q31_t)0xe1b56b59, (q31_t)0x7c5bba6a, (q31_t)0xe1af5094,
+  (q31_t)0x7c5a3d50, (q31_t)0xe1a935e2, (q31_t)0x7c58bfe9, (q31_t)0xe1a31b42, (q31_t)0x7c574236, (q31_t)0xe19d00b6, (q31_t)0x7c55c436, (q31_t)0xe196e63c,
+  (q31_t)0x7c5445e9, (q31_t)0xe190cbd4, (q31_t)0x7c52c74f, (q31_t)0xe18ab180, (q31_t)0x7c514869, (q31_t)0xe184973e, (q31_t)0x7c4fc936, (q31_t)0xe17e7d0f,
+  (q31_t)0x7c4e49b7, (q31_t)0xe17862f3, (q31_t)0x7c4cc9ea, (q31_t)0xe17248ea, (q31_t)0x7c4b49d2, (q31_t)0xe16c2ef4, (q31_t)0x7c49c96c, (q31_t)0xe1661510,
+  (q31_t)0x7c4848ba, (q31_t)0xe15ffb3f, (q31_t)0x7c46c7bb, (q31_t)0xe159e182, (q31_t)0x7c45466f, (q31_t)0xe153c7d7, (q31_t)0x7c43c4d7, (q31_t)0xe14dae3f,
+  (q31_t)0x7c4242f2, (q31_t)0xe14794ba, (q31_t)0x7c40c0c1, (q31_t)0xe1417b48, (q31_t)0x7c3f3e42, (q31_t)0xe13b61e9, (q31_t)0x7c3dbb78, (q31_t)0xe135489d,
+  (q31_t)0x7c3c3860, (q31_t)0xe12f2f63, (q31_t)0x7c3ab4fc, (q31_t)0xe129163d, (q31_t)0x7c39314b, (q31_t)0xe122fd2a, (q31_t)0x7c37ad4e, (q31_t)0xe11ce42a,
+  (q31_t)0x7c362904, (q31_t)0xe116cb3d, (q31_t)0x7c34a46d, (q31_t)0xe110b263, (q31_t)0x7c331f8a, (q31_t)0xe10a999c, (q31_t)0x7c319a5a, (q31_t)0xe10480e9,
+  (q31_t)0x7c3014de, (q31_t)0xe0fe6848, (q31_t)0x7c2e8f15, (q31_t)0xe0f84fbb, (q31_t)0x7c2d08ff, (q31_t)0xe0f23740, (q31_t)0x7c2b829d, (q31_t)0xe0ec1ed9,
+  (q31_t)0x7c29fbee, (q31_t)0xe0e60685, (q31_t)0x7c2874f3, (q31_t)0xe0dfee44, (q31_t)0x7c26edab, (q31_t)0xe0d9d616, (q31_t)0x7c256616, (q31_t)0xe0d3bdfc,
+  (q31_t)0x7c23de35, (q31_t)0xe0cda5f5, (q31_t)0x7c225607, (q31_t)0xe0c78e01, (q31_t)0x7c20cd8d, (q31_t)0xe0c17620, (q31_t)0x7c1f44c6, (q31_t)0xe0bb5e53,
+  (q31_t)0x7c1dbbb3, (q31_t)0xe0b54698, (q31_t)0x7c1c3253, (q31_t)0xe0af2ef2, (q31_t)0x7c1aa8a6, (q31_t)0xe0a9175e, (q31_t)0x7c191ead, (q31_t)0xe0a2ffde,
+  (q31_t)0x7c179467, (q31_t)0xe09ce871, (q31_t)0x7c1609d5, (q31_t)0xe096d117, (q31_t)0x7c147ef6, (q31_t)0xe090b9d1, (q31_t)0x7c12f3cb, (q31_t)0xe08aa29f,
+  (q31_t)0x7c116853, (q31_t)0xe0848b7f, (q31_t)0x7c0fdc8f, (q31_t)0xe07e7473, (q31_t)0x7c0e507e, (q31_t)0xe0785d7b, (q31_t)0x7c0cc421, (q31_t)0xe0724696,
+  (q31_t)0x7c0b3777, (q31_t)0xe06c2fc4, (q31_t)0x7c09aa80, (q31_t)0xe0661906, (q31_t)0x7c081d3d, (q31_t)0xe060025c, (q31_t)0x7c068fae, (q31_t)0xe059ebc5,
+  (q31_t)0x7c0501d2, (q31_t)0xe053d541, (q31_t)0x7c0373a9, (q31_t)0xe04dbed1, (q31_t)0x7c01e534, (q31_t)0xe047a875, (q31_t)0x7c005673, (q31_t)0xe041922c,
+  (q31_t)0x7bfec765, (q31_t)0xe03b7bf6, (q31_t)0x7bfd380a, (q31_t)0xe03565d5, (q31_t)0x7bfba863, (q31_t)0xe02f4fc6, (q31_t)0x7bfa1870, (q31_t)0xe02939cc,
+  (q31_t)0x7bf88830, (q31_t)0xe02323e5, (q31_t)0x7bf6f7a4, (q31_t)0xe01d0e12, (q31_t)0x7bf566cb, (q31_t)0xe016f852, (q31_t)0x7bf3d5a6, (q31_t)0xe010e2a7,
+  (q31_t)0x7bf24434, (q31_t)0xe00acd0e, (q31_t)0x7bf0b276, (q31_t)0xe004b78a, (q31_t)0x7bef206b, (q31_t)0xdffea219, (q31_t)0x7bed8e14, (q31_t)0xdff88cbc,
+  (q31_t)0x7bebfb70, (q31_t)0xdff27773, (q31_t)0x7bea6880, (q31_t)0xdfec623e, (q31_t)0x7be8d544, (q31_t)0xdfe64d1c, (q31_t)0x7be741bb, (q31_t)0xdfe0380e,
+  (q31_t)0x7be5ade6, (q31_t)0xdfda2314, (q31_t)0x7be419c4, (q31_t)0xdfd40e2e, (q31_t)0x7be28556, (q31_t)0xdfcdf95c, (q31_t)0x7be0f09b, (q31_t)0xdfc7e49d,
+  (q31_t)0x7bdf5b94, (q31_t)0xdfc1cff3, (q31_t)0x7bddc641, (q31_t)0xdfbbbb5c, (q31_t)0x7bdc30a1, (q31_t)0xdfb5a6d9, (q31_t)0x7bda9ab5, (q31_t)0xdfaf926a,
+  (q31_t)0x7bd9047c, (q31_t)0xdfa97e0f, (q31_t)0x7bd76df7, (q31_t)0xdfa369c8, (q31_t)0x7bd5d726, (q31_t)0xdf9d5595, (q31_t)0x7bd44008, (q31_t)0xdf974176,
+  (q31_t)0x7bd2a89e, (q31_t)0xdf912d6b, (q31_t)0x7bd110e8, (q31_t)0xdf8b1974, (q31_t)0x7bcf78e5, (q31_t)0xdf850591, (q31_t)0x7bcde095, (q31_t)0xdf7ef1c2,
+  (q31_t)0x7bcc47fa, (q31_t)0xdf78de07, (q31_t)0x7bcaaf12, (q31_t)0xdf72ca60, (q31_t)0x7bc915dd, (q31_t)0xdf6cb6cd, (q31_t)0x7bc77c5d, (q31_t)0xdf66a34e,
+  (q31_t)0x7bc5e290, (q31_t)0xdf608fe4, (q31_t)0x7bc44876, (q31_t)0xdf5a7c8d, (q31_t)0x7bc2ae10, (q31_t)0xdf54694b, (q31_t)0x7bc1135e, (q31_t)0xdf4e561c,
+  (q31_t)0x7bbf7860, (q31_t)0xdf484302, (q31_t)0x7bbddd15, (q31_t)0xdf422ffd, (q31_t)0x7bbc417e, (q31_t)0xdf3c1d0b, (q31_t)0x7bbaa59a, (q31_t)0xdf360a2d,
+  (q31_t)0x7bb9096b, (q31_t)0xdf2ff764, (q31_t)0x7bb76cef, (q31_t)0xdf29e4af, (q31_t)0x7bb5d026, (q31_t)0xdf23d20e, (q31_t)0x7bb43311, (q31_t)0xdf1dbf82,
+  (q31_t)0x7bb295b0, (q31_t)0xdf17ad0a, (q31_t)0x7bb0f803, (q31_t)0xdf119aa6, (q31_t)0x7baf5a09, (q31_t)0xdf0b8856, (q31_t)0x7badbbc3, (q31_t)0xdf05761b,
+  (q31_t)0x7bac1d31, (q31_t)0xdeff63f4, (q31_t)0x7baa7e53, (q31_t)0xdef951e2, (q31_t)0x7ba8df28, (q31_t)0xdef33fe3, (q31_t)0x7ba73fb1, (q31_t)0xdeed2dfa,
+  (q31_t)0x7ba59fee, (q31_t)0xdee71c24, (q31_t)0x7ba3ffde, (q31_t)0xdee10a63, (q31_t)0x7ba25f82, (q31_t)0xdedaf8b7, (q31_t)0x7ba0beda, (q31_t)0xded4e71f,
+  (q31_t)0x7b9f1de6, (q31_t)0xdeced59b, (q31_t)0x7b9d7ca5, (q31_t)0xdec8c42c, (q31_t)0x7b9bdb18, (q31_t)0xdec2b2d1, (q31_t)0x7b9a393f, (q31_t)0xdebca18b,
+  (q31_t)0x7b989719, (q31_t)0xdeb69059, (q31_t)0x7b96f4a8, (q31_t)0xdeb07f3c, (q31_t)0x7b9551ea, (q31_t)0xdeaa6e34, (q31_t)0x7b93aee0, (q31_t)0xdea45d40,
+  (q31_t)0x7b920b89, (q31_t)0xde9e4c60, (q31_t)0x7b9067e7, (q31_t)0xde983b95, (q31_t)0x7b8ec3f8, (q31_t)0xde922adf, (q31_t)0x7b8d1fbd, (q31_t)0xde8c1a3e,
+  (q31_t)0x7b8b7b36, (q31_t)0xde8609b1, (q31_t)0x7b89d662, (q31_t)0xde7ff938, (q31_t)0x7b883143, (q31_t)0xde79e8d5, (q31_t)0x7b868bd7, (q31_t)0xde73d886,
+  (q31_t)0x7b84e61f, (q31_t)0xde6dc84b, (q31_t)0x7b83401b, (q31_t)0xde67b826, (q31_t)0x7b8199ca, (q31_t)0xde61a815, (q31_t)0x7b7ff32e, (q31_t)0xde5b9819,
+  (q31_t)0x7b7e4c45, (q31_t)0xde558831, (q31_t)0x7b7ca510, (q31_t)0xde4f785f, (q31_t)0x7b7afd8f, (q31_t)0xde4968a1, (q31_t)0x7b7955c2, (q31_t)0xde4358f8,
+  (q31_t)0x7b77ada8, (q31_t)0xde3d4964, (q31_t)0x7b760542, (q31_t)0xde3739e4, (q31_t)0x7b745c91, (q31_t)0xde312a7a, (q31_t)0x7b72b393, (q31_t)0xde2b1b24,
+  (q31_t)0x7b710a49, (q31_t)0xde250be3, (q31_t)0x7b6f60b2, (q31_t)0xde1efcb7, (q31_t)0x7b6db6d0, (q31_t)0xde18eda0, (q31_t)0x7b6c0ca2, (q31_t)0xde12de9e,
+  (q31_t)0x7b6a6227, (q31_t)0xde0ccfb1, (q31_t)0x7b68b760, (q31_t)0xde06c0d9, (q31_t)0x7b670c4d, (q31_t)0xde00b216, (q31_t)0x7b6560ee, (q31_t)0xddfaa367,
+  (q31_t)0x7b63b543, (q31_t)0xddf494ce, (q31_t)0x7b62094c, (q31_t)0xddee8649, (q31_t)0x7b605d09, (q31_t)0xdde877da, (q31_t)0x7b5eb079, (q31_t)0xdde26980,
+  (q31_t)0x7b5d039e, (q31_t)0xdddc5b3b, (q31_t)0x7b5b5676, (q31_t)0xddd64d0a, (q31_t)0x7b59a902, (q31_t)0xddd03eef, (q31_t)0x7b57fb42, (q31_t)0xddca30e9,
+  (q31_t)0x7b564d36, (q31_t)0xddc422f8, (q31_t)0x7b549ede, (q31_t)0xddbe151d, (q31_t)0x7b52f03a, (q31_t)0xddb80756, (q31_t)0x7b51414a, (q31_t)0xddb1f9a4,
+  (q31_t)0x7b4f920e, (q31_t)0xddabec08, (q31_t)0x7b4de286, (q31_t)0xdda5de81, (q31_t)0x7b4c32b1, (q31_t)0xdd9fd10f, (q31_t)0x7b4a8291, (q31_t)0xdd99c3b2,
+  (q31_t)0x7b48d225, (q31_t)0xdd93b66a, (q31_t)0x7b47216c, (q31_t)0xdd8da938, (q31_t)0x7b457068, (q31_t)0xdd879c1b, (q31_t)0x7b43bf17, (q31_t)0xdd818f13,
+  (q31_t)0x7b420d7a, (q31_t)0xdd7b8220, (q31_t)0x7b405b92, (q31_t)0xdd757543, (q31_t)0x7b3ea95d, (q31_t)0xdd6f687b, (q31_t)0x7b3cf6dc, (q31_t)0xdd695bc9,
+  (q31_t)0x7b3b4410, (q31_t)0xdd634f2b, (q31_t)0x7b3990f7, (q31_t)0xdd5d42a3, (q31_t)0x7b37dd92, (q31_t)0xdd573631, (q31_t)0x7b3629e1, (q31_t)0xdd5129d4,
+  (q31_t)0x7b3475e5, (q31_t)0xdd4b1d8c, (q31_t)0x7b32c19c, (q31_t)0xdd451159, (q31_t)0x7b310d07, (q31_t)0xdd3f053c, (q31_t)0x7b2f5826, (q31_t)0xdd38f935,
+  (q31_t)0x7b2da2fa, (q31_t)0xdd32ed43, (q31_t)0x7b2bed81, (q31_t)0xdd2ce166, (q31_t)0x7b2a37bc, (q31_t)0xdd26d59f, (q31_t)0x7b2881ac, (q31_t)0xdd20c9ed,
+  (q31_t)0x7b26cb4f, (q31_t)0xdd1abe51, (q31_t)0x7b2514a6, (q31_t)0xdd14b2ca, (q31_t)0x7b235db2, (q31_t)0xdd0ea759, (q31_t)0x7b21a671, (q31_t)0xdd089bfe,
+  (q31_t)0x7b1feee5, (q31_t)0xdd0290b8, (q31_t)0x7b1e370d, (q31_t)0xdcfc8588, (q31_t)0x7b1c7ee8, (q31_t)0xdcf67a6d, (q31_t)0x7b1ac678, (q31_t)0xdcf06f68,
+  (q31_t)0x7b190dbc, (q31_t)0xdcea6478, (q31_t)0x7b1754b3, (q31_t)0xdce4599e, (q31_t)0x7b159b5f, (q31_t)0xdcde4eda, (q31_t)0x7b13e1bf, (q31_t)0xdcd8442b,
+  (q31_t)0x7b1227d3, (q31_t)0xdcd23993, (q31_t)0x7b106d9b, (q31_t)0xdccc2f0f, (q31_t)0x7b0eb318, (q31_t)0xdcc624a2, (q31_t)0x7b0cf848, (q31_t)0xdcc01a4a,
+  (q31_t)0x7b0b3d2c, (q31_t)0xdcba1008, (q31_t)0x7b0981c5, (q31_t)0xdcb405dc, (q31_t)0x7b07c612, (q31_t)0xdcadfbc5, (q31_t)0x7b060a12, (q31_t)0xdca7f1c5,
+  (q31_t)0x7b044dc7, (q31_t)0xdca1e7da, (q31_t)0x7b029130, (q31_t)0xdc9bde05, (q31_t)0x7b00d44d, (q31_t)0xdc95d446, (q31_t)0x7aff171e, (q31_t)0xdc8fca9c,
+  (q31_t)0x7afd59a4, (q31_t)0xdc89c109, (q31_t)0x7afb9bdd, (q31_t)0xdc83b78b, (q31_t)0x7af9ddcb, (q31_t)0xdc7dae23, (q31_t)0x7af81f6c, (q31_t)0xdc77a4d2,
+  (q31_t)0x7af660c2, (q31_t)0xdc719b96, (q31_t)0x7af4a1cc, (q31_t)0xdc6b9270, (q31_t)0x7af2e28b, (q31_t)0xdc658960, (q31_t)0x7af122fd, (q31_t)0xdc5f8066,
+  (q31_t)0x7aef6323, (q31_t)0xdc597781, (q31_t)0x7aeda2fe, (q31_t)0xdc536eb3, (q31_t)0x7aebe28d, (q31_t)0xdc4d65fb, (q31_t)0x7aea21d0, (q31_t)0xdc475d59,
+  (q31_t)0x7ae860c7, (q31_t)0xdc4154cd, (q31_t)0x7ae69f73, (q31_t)0xdc3b4c57, (q31_t)0x7ae4ddd2, (q31_t)0xdc3543f7, (q31_t)0x7ae31be6, (q31_t)0xdc2f3bad,
+  (q31_t)0x7ae159ae, (q31_t)0xdc293379, (q31_t)0x7adf972a, (q31_t)0xdc232b5c, (q31_t)0x7addd45b, (q31_t)0xdc1d2354, (q31_t)0x7adc113f, (q31_t)0xdc171b63,
+  (q31_t)0x7ada4dd8, (q31_t)0xdc111388, (q31_t)0x7ad88a25, (q31_t)0xdc0b0bc2, (q31_t)0x7ad6c626, (q31_t)0xdc050414, (q31_t)0x7ad501dc, (q31_t)0xdbfefc7b,
+  (q31_t)0x7ad33d45, (q31_t)0xdbf8f4f8, (q31_t)0x7ad17863, (q31_t)0xdbf2ed8c, (q31_t)0x7acfb336, (q31_t)0xdbece636, (q31_t)0x7acdedbc, (q31_t)0xdbe6def6,
+  (q31_t)0x7acc27f7, (q31_t)0xdbe0d7cd, (q31_t)0x7aca61e6, (q31_t)0xdbdad0b9, (q31_t)0x7ac89b89, (q31_t)0xdbd4c9bc, (q31_t)0x7ac6d4e0, (q31_t)0xdbcec2d6,
+  (q31_t)0x7ac50dec, (q31_t)0xdbc8bc06, (q31_t)0x7ac346ac, (q31_t)0xdbc2b54c, (q31_t)0x7ac17f20, (q31_t)0xdbbcaea8, (q31_t)0x7abfb749, (q31_t)0xdbb6a81b,
+  (q31_t)0x7abdef25, (q31_t)0xdbb0a1a4, (q31_t)0x7abc26b7, (q31_t)0xdbaa9b43, (q31_t)0x7aba5dfc, (q31_t)0xdba494f9, (q31_t)0x7ab894f6, (q31_t)0xdb9e8ec6,
+  (q31_t)0x7ab6cba4, (q31_t)0xdb9888a8, (q31_t)0x7ab50206, (q31_t)0xdb9282a2, (q31_t)0x7ab3381d, (q31_t)0xdb8c7cb1, (q31_t)0x7ab16de7, (q31_t)0xdb8676d8,
+  (q31_t)0x7aafa367, (q31_t)0xdb807114, (q31_t)0x7aadd89a, (q31_t)0xdb7a6b68, (q31_t)0x7aac0d82, (q31_t)0xdb7465d1, (q31_t)0x7aaa421e, (q31_t)0xdb6e6052,
+  (q31_t)0x7aa8766f, (q31_t)0xdb685ae9, (q31_t)0x7aa6aa74, (q31_t)0xdb625596, (q31_t)0x7aa4de2d, (q31_t)0xdb5c505a, (q31_t)0x7aa3119a, (q31_t)0xdb564b35,
+  (q31_t)0x7aa144bc, (q31_t)0xdb504626, (q31_t)0x7a9f7793, (q31_t)0xdb4a412e, (q31_t)0x7a9daa1d, (q31_t)0xdb443c4c, (q31_t)0x7a9bdc5c, (q31_t)0xdb3e3781,
+  (q31_t)0x7a9a0e50, (q31_t)0xdb3832cd, (q31_t)0x7a983ff7, (q31_t)0xdb322e30, (q31_t)0x7a967153, (q31_t)0xdb2c29a9, (q31_t)0x7a94a264, (q31_t)0xdb262539,
+  (q31_t)0x7a92d329, (q31_t)0xdb2020e0, (q31_t)0x7a9103a2, (q31_t)0xdb1a1c9d, (q31_t)0x7a8f33d0, (q31_t)0xdb141871, (q31_t)0x7a8d63b2, (q31_t)0xdb0e145c,
+  (q31_t)0x7a8b9348, (q31_t)0xdb08105e, (q31_t)0x7a89c293, (q31_t)0xdb020c77, (q31_t)0x7a87f192, (q31_t)0xdafc08a6, (q31_t)0x7a862046, (q31_t)0xdaf604ec,
+  (q31_t)0x7a844eae, (q31_t)0xdaf00149, (q31_t)0x7a827ccb, (q31_t)0xdae9fdbd, (q31_t)0x7a80aa9c, (q31_t)0xdae3fa48, (q31_t)0x7a7ed821, (q31_t)0xdaddf6ea,
+  (q31_t)0x7a7d055b, (q31_t)0xdad7f3a2, (q31_t)0x7a7b3249, (q31_t)0xdad1f072, (q31_t)0x7a795eec, (q31_t)0xdacbed58, (q31_t)0x7a778b43, (q31_t)0xdac5ea56,
+  (q31_t)0x7a75b74f, (q31_t)0xdabfe76a, (q31_t)0x7a73e30f, (q31_t)0xdab9e495, (q31_t)0x7a720e84, (q31_t)0xdab3e1d8, (q31_t)0x7a7039ad, (q31_t)0xdaaddf31,
+  (q31_t)0x7a6e648a, (q31_t)0xdaa7dca1, (q31_t)0x7a6c8f1c, (q31_t)0xdaa1da29, (q31_t)0x7a6ab963, (q31_t)0xda9bd7c7, (q31_t)0x7a68e35e, (q31_t)0xda95d57d,
+  (q31_t)0x7a670d0d, (q31_t)0xda8fd349, (q31_t)0x7a653671, (q31_t)0xda89d12d, (q31_t)0x7a635f8a, (q31_t)0xda83cf28, (q31_t)0x7a618857, (q31_t)0xda7dcd3a,
+  (q31_t)0x7a5fb0d8, (q31_t)0xda77cb63, (q31_t)0x7a5dd90e, (q31_t)0xda71c9a3, (q31_t)0x7a5c00f9, (q31_t)0xda6bc7fa, (q31_t)0x7a5a2898, (q31_t)0xda65c669,
+  (q31_t)0x7a584feb, (q31_t)0xda5fc4ef, (q31_t)0x7a5676f3, (q31_t)0xda59c38c, (q31_t)0x7a549db0, (q31_t)0xda53c240, (q31_t)0x7a52c421, (q31_t)0xda4dc10b,
+  (q31_t)0x7a50ea47, (q31_t)0xda47bfee, (q31_t)0x7a4f1021, (q31_t)0xda41bee8, (q31_t)0x7a4d35b0, (q31_t)0xda3bbdf9, (q31_t)0x7a4b5af3, (q31_t)0xda35bd22,
+  (q31_t)0x7a497feb, (q31_t)0xda2fbc61, (q31_t)0x7a47a498, (q31_t)0xda29bbb9, (q31_t)0x7a45c8f9, (q31_t)0xda23bb27, (q31_t)0x7a43ed0e, (q31_t)0xda1dbaad,
+  (q31_t)0x7a4210d8, (q31_t)0xda17ba4a, (q31_t)0x7a403457, (q31_t)0xda11b9ff, (q31_t)0x7a3e578b, (q31_t)0xda0bb9cb, (q31_t)0x7a3c7a73, (q31_t)0xda05b9ae,
+  (q31_t)0x7a3a9d0f, (q31_t)0xd9ffb9a9, (q31_t)0x7a38bf60, (q31_t)0xd9f9b9bb, (q31_t)0x7a36e166, (q31_t)0xd9f3b9e5, (q31_t)0x7a350321, (q31_t)0xd9edba26,
+  (q31_t)0x7a332490, (q31_t)0xd9e7ba7f, (q31_t)0x7a3145b3, (q31_t)0xd9e1baef, (q31_t)0x7a2f668c, (q31_t)0xd9dbbb77, (q31_t)0x7a2d8719, (q31_t)0xd9d5bc16,
+  (q31_t)0x7a2ba75a, (q31_t)0xd9cfbccd, (q31_t)0x7a29c750, (q31_t)0xd9c9bd9b, (q31_t)0x7a27e6fb, (q31_t)0xd9c3be81, (q31_t)0x7a26065b, (q31_t)0xd9bdbf7e,
+  (q31_t)0x7a24256f, (q31_t)0xd9b7c094, (q31_t)0x7a224437, (q31_t)0xd9b1c1c0, (q31_t)0x7a2062b5, (q31_t)0xd9abc305, (q31_t)0x7a1e80e7, (q31_t)0xd9a5c461,
+  (q31_t)0x7a1c9ece, (q31_t)0xd99fc5d4, (q31_t)0x7a1abc69, (q31_t)0xd999c75f, (q31_t)0x7a18d9b9, (q31_t)0xd993c902, (q31_t)0x7a16f6be, (q31_t)0xd98dcabd,
+  (q31_t)0x7a151378, (q31_t)0xd987cc90, (q31_t)0x7a132fe6, (q31_t)0xd981ce7a, (q31_t)0x7a114c09, (q31_t)0xd97bd07c, (q31_t)0x7a0f67e0, (q31_t)0xd975d295,
+  (q31_t)0x7a0d836d, (q31_t)0xd96fd4c7, (q31_t)0x7a0b9eae, (q31_t)0xd969d710, (q31_t)0x7a09b9a4, (q31_t)0xd963d971, (q31_t)0x7a07d44e, (q31_t)0xd95ddbea,
+  (q31_t)0x7a05eead, (q31_t)0xd957de7a, (q31_t)0x7a0408c1, (q31_t)0xd951e123, (q31_t)0x7a02228a, (q31_t)0xd94be3e3, (q31_t)0x7a003c07, (q31_t)0xd945e6bb,
+  (q31_t)0x79fe5539, (q31_t)0xd93fe9ab, (q31_t)0x79fc6e20, (q31_t)0xd939ecb3, (q31_t)0x79fa86bc, (q31_t)0xd933efd3, (q31_t)0x79f89f0c, (q31_t)0xd92df30b,
+  (q31_t)0x79f6b711, (q31_t)0xd927f65b, (q31_t)0x79f4cecb, (q31_t)0xd921f9c3, (q31_t)0x79f2e63a, (q31_t)0xd91bfd43, (q31_t)0x79f0fd5d, (q31_t)0xd91600da,
+  (q31_t)0x79ef1436, (q31_t)0xd910048a, (q31_t)0x79ed2ac3, (q31_t)0xd90a0852, (q31_t)0x79eb4105, (q31_t)0xd9040c32, (q31_t)0x79e956fb, (q31_t)0xd8fe1029,
+  (q31_t)0x79e76ca7, (q31_t)0xd8f81439, (q31_t)0x79e58207, (q31_t)0xd8f21861, (q31_t)0x79e3971c, (q31_t)0xd8ec1ca1, (q31_t)0x79e1abe6, (q31_t)0xd8e620fa,
+  (q31_t)0x79dfc064, (q31_t)0xd8e0256a, (q31_t)0x79ddd498, (q31_t)0xd8da29f2, (q31_t)0x79dbe880, (q31_t)0xd8d42e93, (q31_t)0x79d9fc1d, (q31_t)0xd8ce334c,
+  (q31_t)0x79d80f6f, (q31_t)0xd8c8381d, (q31_t)0x79d62276, (q31_t)0xd8c23d06, (q31_t)0x79d43532, (q31_t)0xd8bc4207, (q31_t)0x79d247a2, (q31_t)0xd8b64720,
+  (q31_t)0x79d059c8, (q31_t)0xd8b04c52, (q31_t)0x79ce6ba2, (q31_t)0xd8aa519c, (q31_t)0x79cc7d31, (q31_t)0xd8a456ff, (q31_t)0x79ca8e75, (q31_t)0xd89e5c79,
+  (q31_t)0x79c89f6e, (q31_t)0xd898620c, (q31_t)0x79c6b01b, (q31_t)0xd89267b7, (q31_t)0x79c4c07e, (q31_t)0xd88c6d7b, (q31_t)0x79c2d095, (q31_t)0xd8867356,
+  (q31_t)0x79c0e062, (q31_t)0xd880794b, (q31_t)0x79beefe3, (q31_t)0xd87a7f57, (q31_t)0x79bcff19, (q31_t)0xd874857c, (q31_t)0x79bb0e04, (q31_t)0xd86e8bb9,
+  (q31_t)0x79b91ca4, (q31_t)0xd868920f, (q31_t)0x79b72af9, (q31_t)0xd862987d, (q31_t)0x79b53903, (q31_t)0xd85c9f04, (q31_t)0x79b346c2, (q31_t)0xd856a5a3,
+  (q31_t)0x79b15435, (q31_t)0xd850ac5a, (q31_t)0x79af615e, (q31_t)0xd84ab32a, (q31_t)0x79ad6e3c, (q31_t)0xd844ba13, (q31_t)0x79ab7ace, (q31_t)0xd83ec114,
+  (q31_t)0x79a98715, (q31_t)0xd838c82d, (q31_t)0x79a79312, (q31_t)0xd832cf5f, (q31_t)0x79a59ec3, (q31_t)0xd82cd6aa, (q31_t)0x79a3aa29, (q31_t)0xd826de0d,
+  (q31_t)0x79a1b545, (q31_t)0xd820e589, (q31_t)0x799fc015, (q31_t)0xd81aed1d, (q31_t)0x799dca9a, (q31_t)0xd814f4ca, (q31_t)0x799bd4d4, (q31_t)0xd80efc8f,
+  (q31_t)0x7999dec4, (q31_t)0xd809046e, (q31_t)0x7997e868, (q31_t)0xd8030c64, (q31_t)0x7995f1c1, (q31_t)0xd7fd1474, (q31_t)0x7993facf, (q31_t)0xd7f71c9c,
+  (q31_t)0x79920392, (q31_t)0xd7f124dd, (q31_t)0x79900c0a, (q31_t)0xd7eb2d37, (q31_t)0x798e1438, (q31_t)0xd7e535a9, (q31_t)0x798c1c1a, (q31_t)0xd7df3e34,
+  (q31_t)0x798a23b1, (q31_t)0xd7d946d8, (q31_t)0x79882afd, (q31_t)0xd7d34f94, (q31_t)0x798631ff, (q31_t)0xd7cd586a, (q31_t)0x798438b5, (q31_t)0xd7c76158,
+  (q31_t)0x79823f20, (q31_t)0xd7c16a5f, (q31_t)0x79804541, (q31_t)0xd7bb737f, (q31_t)0x797e4b16, (q31_t)0xd7b57cb7, (q31_t)0x797c50a1, (q31_t)0xd7af8609,
+  (q31_t)0x797a55e0, (q31_t)0xd7a98f73, (q31_t)0x79785ad5, (q31_t)0xd7a398f6, (q31_t)0x79765f7f, (q31_t)0xd79da293, (q31_t)0x797463de, (q31_t)0xd797ac48,
+  (q31_t)0x797267f2, (q31_t)0xd791b616, (q31_t)0x79706bbb, (q31_t)0xd78bbffc, (q31_t)0x796e6f39, (q31_t)0xd785c9fc, (q31_t)0x796c726c, (q31_t)0xd77fd415,
+  (q31_t)0x796a7554, (q31_t)0xd779de47, (q31_t)0x796877f1, (q31_t)0xd773e892, (q31_t)0x79667a44, (q31_t)0xd76df2f6, (q31_t)0x79647c4c, (q31_t)0xd767fd72,
+  (q31_t)0x79627e08, (q31_t)0xd7620808, (q31_t)0x79607f7a, (q31_t)0xd75c12b7, (q31_t)0x795e80a1, (q31_t)0xd7561d7f, (q31_t)0x795c817d, (q31_t)0xd7502860,
+  (q31_t)0x795a820e, (q31_t)0xd74a335b, (q31_t)0x79588255, (q31_t)0xd7443e6e, (q31_t)0x79568250, (q31_t)0xd73e499a, (q31_t)0x79548201, (q31_t)0xd73854e0,
+  (q31_t)0x79528167, (q31_t)0xd732603f, (q31_t)0x79508082, (q31_t)0xd72c6bb6, (q31_t)0x794e7f52, (q31_t)0xd7267748, (q31_t)0x794c7dd7, (q31_t)0xd72082f2,
+  (q31_t)0x794a7c12, (q31_t)0xd71a8eb5, (q31_t)0x79487a01, (q31_t)0xd7149a92, (q31_t)0x794677a6, (q31_t)0xd70ea688, (q31_t)0x79447500, (q31_t)0xd708b297,
+  (q31_t)0x79427210, (q31_t)0xd702bec0, (q31_t)0x79406ed4, (q31_t)0xd6fccb01, (q31_t)0x793e6b4e, (q31_t)0xd6f6d75d, (q31_t)0x793c677d, (q31_t)0xd6f0e3d1,
+  (q31_t)0x793a6361, (q31_t)0xd6eaf05f, (q31_t)0x79385efa, (q31_t)0xd6e4fd06, (q31_t)0x79365a49, (q31_t)0xd6df09c6, (q31_t)0x7934554d, (q31_t)0xd6d916a0,
+  (q31_t)0x79325006, (q31_t)0xd6d32393, (q31_t)0x79304a74, (q31_t)0xd6cd30a0, (q31_t)0x792e4497, (q31_t)0xd6c73dc6, (q31_t)0x792c3e70, (q31_t)0xd6c14b05,
+  (q31_t)0x792a37fe, (q31_t)0xd6bb585e, (q31_t)0x79283141, (q31_t)0xd6b565d0, (q31_t)0x79262a3a, (q31_t)0xd6af735c, (q31_t)0x792422e8, (q31_t)0xd6a98101,
+  (q31_t)0x79221b4b, (q31_t)0xd6a38ec0, (q31_t)0x79201363, (q31_t)0xd69d9c98, (q31_t)0x791e0b31, (q31_t)0xd697aa8a, (q31_t)0x791c02b4, (q31_t)0xd691b895,
+  (q31_t)0x7919f9ec, (q31_t)0xd68bc6ba, (q31_t)0x7917f0d9, (q31_t)0xd685d4f9, (q31_t)0x7915e77c, (q31_t)0xd67fe351, (q31_t)0x7913ddd4, (q31_t)0xd679f1c2,
+  (q31_t)0x7911d3e2, (q31_t)0xd674004e, (q31_t)0x790fc9a4, (q31_t)0xd66e0ef2, (q31_t)0x790dbf1d, (q31_t)0xd6681db1, (q31_t)0x790bb44a, (q31_t)0xd6622c89,
+  (q31_t)0x7909a92d, (q31_t)0xd65c3b7b, (q31_t)0x79079dc5, (q31_t)0xd6564a87, (q31_t)0x79059212, (q31_t)0xd65059ac, (q31_t)0x79038615, (q31_t)0xd64a68eb,
+  (q31_t)0x790179cd, (q31_t)0xd6447844, (q31_t)0x78ff6d3b, (q31_t)0xd63e87b6, (q31_t)0x78fd605d, (q31_t)0xd6389742, (q31_t)0x78fb5336, (q31_t)0xd632a6e8,
+  (q31_t)0x78f945c3, (q31_t)0xd62cb6a8, (q31_t)0x78f73806, (q31_t)0xd626c681, (q31_t)0x78f529fe, (q31_t)0xd620d675, (q31_t)0x78f31bac, (q31_t)0xd61ae682,
+  (q31_t)0x78f10d0f, (q31_t)0xd614f6a9, (q31_t)0x78eefe28, (q31_t)0xd60f06ea, (q31_t)0x78eceef6, (q31_t)0xd6091745, (q31_t)0x78eadf79, (q31_t)0xd60327b9,
+  (q31_t)0x78e8cfb2, (q31_t)0xd5fd3848, (q31_t)0x78e6bfa0, (q31_t)0xd5f748f0, (q31_t)0x78e4af44, (q31_t)0xd5f159b3, (q31_t)0x78e29e9d, (q31_t)0xd5eb6a8f,
+  (q31_t)0x78e08dab, (q31_t)0xd5e57b85, (q31_t)0x78de7c6f, (q31_t)0xd5df8c96, (q31_t)0x78dc6ae8, (q31_t)0xd5d99dc0, (q31_t)0x78da5917, (q31_t)0xd5d3af04,
+  (q31_t)0x78d846fb, (q31_t)0xd5cdc062, (q31_t)0x78d63495, (q31_t)0xd5c7d1db, (q31_t)0x78d421e4, (q31_t)0xd5c1e36d, (q31_t)0x78d20ee9, (q31_t)0xd5bbf519,
+  (q31_t)0x78cffba3, (q31_t)0xd5b606e0, (q31_t)0x78cde812, (q31_t)0xd5b018c0, (q31_t)0x78cbd437, (q31_t)0xd5aa2abb, (q31_t)0x78c9c012, (q31_t)0xd5a43cd0,
+  (q31_t)0x78c7aba2, (q31_t)0xd59e4eff, (q31_t)0x78c596e7, (q31_t)0xd5986148, (q31_t)0x78c381e2, (q31_t)0xd59273ab, (q31_t)0x78c16c93, (q31_t)0xd58c8628,
+  (q31_t)0x78bf56f9, (q31_t)0xd58698c0, (q31_t)0x78bd4114, (q31_t)0xd580ab72, (q31_t)0x78bb2ae5, (q31_t)0xd57abe3d, (q31_t)0x78b9146c, (q31_t)0xd574d124,
+  (q31_t)0x78b6fda8, (q31_t)0xd56ee424, (q31_t)0x78b4e69a, (q31_t)0xd568f73f, (q31_t)0x78b2cf41, (q31_t)0xd5630a74, (q31_t)0x78b0b79e, (q31_t)0xd55d1dc3,
+  (q31_t)0x78ae9fb0, (q31_t)0xd557312d, (q31_t)0x78ac8778, (q31_t)0xd55144b0, (q31_t)0x78aa6ef5, (q31_t)0xd54b584f, (q31_t)0x78a85628, (q31_t)0xd5456c07,
+  (q31_t)0x78a63d11, (q31_t)0xd53f7fda, (q31_t)0x78a423af, (q31_t)0xd53993c7, (q31_t)0x78a20a03, (q31_t)0xd533a7cf, (q31_t)0x789ff00c, (q31_t)0xd52dbbf1,
+  (q31_t)0x789dd5cb, (q31_t)0xd527d02e, (q31_t)0x789bbb3f, (q31_t)0xd521e484, (q31_t)0x7899a06a, (q31_t)0xd51bf8f6, (q31_t)0x78978549, (q31_t)0xd5160d82,
+  (q31_t)0x789569df, (q31_t)0xd5102228, (q31_t)0x78934e2a, (q31_t)0xd50a36e9, (q31_t)0x7891322a, (q31_t)0xd5044bc4, (q31_t)0x788f15e0, (q31_t)0xd4fe60ba,
+  (q31_t)0x788cf94c, (q31_t)0xd4f875ca, (q31_t)0x788adc6e, (q31_t)0xd4f28af5, (q31_t)0x7888bf45, (q31_t)0xd4eca03a, (q31_t)0x7886a1d1, (q31_t)0xd4e6b59a,
+  (q31_t)0x78848414, (q31_t)0xd4e0cb15, (q31_t)0x7882660c, (q31_t)0xd4dae0aa, (q31_t)0x788047ba, (q31_t)0xd4d4f65a, (q31_t)0x787e291d, (q31_t)0xd4cf0c24,
+  (q31_t)0x787c0a36, (q31_t)0xd4c92209, (q31_t)0x7879eb05, (q31_t)0xd4c33809, (q31_t)0x7877cb89, (q31_t)0xd4bd4e23, (q31_t)0x7875abc3, (q31_t)0xd4b76458,
+  (q31_t)0x78738bb3, (q31_t)0xd4b17aa8, (q31_t)0x78716b59, (q31_t)0xd4ab9112, (q31_t)0x786f4ab4, (q31_t)0xd4a5a798, (q31_t)0x786d29c5, (q31_t)0xd49fbe37,
+  (q31_t)0x786b088c, (q31_t)0xd499d4f2, (q31_t)0x7868e708, (q31_t)0xd493ebc8, (q31_t)0x7866c53a, (q31_t)0xd48e02b8, (q31_t)0x7864a322, (q31_t)0xd48819c3,
+  (q31_t)0x786280bf, (q31_t)0xd48230e9, (q31_t)0x78605e13, (q31_t)0xd47c4829, (q31_t)0x785e3b1c, (q31_t)0xd4765f85, (q31_t)0x785c17db, (q31_t)0xd47076fb,
+  (q31_t)0x7859f44f, (q31_t)0xd46a8e8d, (q31_t)0x7857d079, (q31_t)0xd464a639, (q31_t)0x7855ac5a, (q31_t)0xd45ebe00, (q31_t)0x785387ef, (q31_t)0xd458d5e2,
+  (q31_t)0x7851633b, (q31_t)0xd452eddf, (q31_t)0x784f3e3c, (q31_t)0xd44d05f6, (q31_t)0x784d18f4, (q31_t)0xd4471e29, (q31_t)0x784af361, (q31_t)0xd4413677,
+  (q31_t)0x7848cd83, (q31_t)0xd43b4ee0, (q31_t)0x7846a75c, (q31_t)0xd4356763, (q31_t)0x784480ea, (q31_t)0xd42f8002, (q31_t)0x78425a2f, (q31_t)0xd42998bc,
+  (q31_t)0x78403329, (q31_t)0xd423b191, (q31_t)0x783e0bd9, (q31_t)0xd41dca81, (q31_t)0x783be43e, (q31_t)0xd417e38c, (q31_t)0x7839bc5a, (q31_t)0xd411fcb2,
+  (q31_t)0x7837942b, (q31_t)0xd40c15f3, (q31_t)0x78356bb2, (q31_t)0xd4062f4f, (q31_t)0x783342ef, (q31_t)0xd40048c6, (q31_t)0x783119e2, (q31_t)0xd3fa6259,
+  (q31_t)0x782ef08b, (q31_t)0xd3f47c06, (q31_t)0x782cc6ea, (q31_t)0xd3ee95cf, (q31_t)0x782a9cfe, (q31_t)0xd3e8afb3, (q31_t)0x782872c8, (q31_t)0xd3e2c9b2,
+  (q31_t)0x78264849, (q31_t)0xd3dce3cd, (q31_t)0x78241d7f, (q31_t)0xd3d6fe03, (q31_t)0x7821f26b, (q31_t)0xd3d11853, (q31_t)0x781fc70d, (q31_t)0xd3cb32c0,
+  (q31_t)0x781d9b65, (q31_t)0xd3c54d47, (q31_t)0x781b6f72, (q31_t)0xd3bf67ea, (q31_t)0x78194336, (q31_t)0xd3b982a8, (q31_t)0x781716b0, (q31_t)0xd3b39d81,
+  (q31_t)0x7814e9df, (q31_t)0xd3adb876, (q31_t)0x7812bcc4, (q31_t)0xd3a7d385, (q31_t)0x78108f60, (q31_t)0xd3a1eeb1, (q31_t)0x780e61b1, (q31_t)0xd39c09f7,
+  (q31_t)0x780c33b8, (q31_t)0xd396255a, (q31_t)0x780a0575, (q31_t)0xd39040d7, (q31_t)0x7807d6e9, (q31_t)0xd38a5c70, (q31_t)0x7805a812, (q31_t)0xd3847824,
+  (q31_t)0x780378f1, (q31_t)0xd37e93f4, (q31_t)0x78014986, (q31_t)0xd378afdf, (q31_t)0x77ff19d1, (q31_t)0xd372cbe6, (q31_t)0x77fce9d2, (q31_t)0xd36ce808,
+  (q31_t)0x77fab989, (q31_t)0xd3670446, (q31_t)0x77f888f6, (q31_t)0xd361209f, (q31_t)0x77f65819, (q31_t)0xd35b3d13, (q31_t)0x77f426f2, (q31_t)0xd35559a4,
+  (q31_t)0x77f1f581, (q31_t)0xd34f764f, (q31_t)0x77efc3c5, (q31_t)0xd3499317, (q31_t)0x77ed91c0, (q31_t)0xd343affa, (q31_t)0x77eb5f71, (q31_t)0xd33dccf8,
+  (q31_t)0x77e92cd9, (q31_t)0xd337ea12, (q31_t)0x77e6f9f6, (q31_t)0xd3320748, (q31_t)0x77e4c6c9, (q31_t)0xd32c2499, (q31_t)0x77e29352, (q31_t)0xd3264206,
+  (q31_t)0x77e05f91, (q31_t)0xd3205f8f, (q31_t)0x77de2b86, (q31_t)0xd31a7d33, (q31_t)0x77dbf732, (q31_t)0xd3149af3, (q31_t)0x77d9c293, (q31_t)0xd30eb8cf,
+  (q31_t)0x77d78daa, (q31_t)0xd308d6c7, (q31_t)0x77d55878, (q31_t)0xd302f4da, (q31_t)0x77d322fc, (q31_t)0xd2fd1309, (q31_t)0x77d0ed35, (q31_t)0xd2f73154,
+  (q31_t)0x77ceb725, (q31_t)0xd2f14fba, (q31_t)0x77cc80cb, (q31_t)0xd2eb6e3c, (q31_t)0x77ca4a27, (q31_t)0xd2e58cdb, (q31_t)0x77c81339, (q31_t)0xd2dfab95,
+  (q31_t)0x77c5dc01, (q31_t)0xd2d9ca6a, (q31_t)0x77c3a47f, (q31_t)0xd2d3e95c, (q31_t)0x77c16cb4, (q31_t)0xd2ce0869, (q31_t)0x77bf349f, (q31_t)0xd2c82793,
+  (q31_t)0x77bcfc3f, (q31_t)0xd2c246d8, (q31_t)0x77bac396, (q31_t)0xd2bc6639, (q31_t)0x77b88aa3, (q31_t)0xd2b685b6, (q31_t)0x77b65166, (q31_t)0xd2b0a54f,
+  (q31_t)0x77b417df, (q31_t)0xd2aac504, (q31_t)0x77b1de0f, (q31_t)0xd2a4e4d5, (q31_t)0x77afa3f5, (q31_t)0xd29f04c2, (q31_t)0x77ad6990, (q31_t)0xd29924cb,
+  (q31_t)0x77ab2ee2, (q31_t)0xd29344f0, (q31_t)0x77a8f3ea, (q31_t)0xd28d6531, (q31_t)0x77a6b8a9, (q31_t)0xd287858e, (q31_t)0x77a47d1d, (q31_t)0xd281a607,
+  (q31_t)0x77a24148, (q31_t)0xd27bc69c, (q31_t)0x77a00529, (q31_t)0xd275e74d, (q31_t)0x779dc8c0, (q31_t)0xd270081b, (q31_t)0x779b8c0e, (q31_t)0xd26a2904,
+  (q31_t)0x77994f11, (q31_t)0xd2644a0a, (q31_t)0x779711cb, (q31_t)0xd25e6b2b, (q31_t)0x7794d43b, (q31_t)0xd2588c69, (q31_t)0x77929661, (q31_t)0xd252adc3,
+  (q31_t)0x7790583e, (q31_t)0xd24ccf39, (q31_t)0x778e19d0, (q31_t)0xd246f0cb, (q31_t)0x778bdb19, (q31_t)0xd241127a, (q31_t)0x77899c19, (q31_t)0xd23b3444,
+  (q31_t)0x77875cce, (q31_t)0xd235562b, (q31_t)0x77851d3a, (q31_t)0xd22f782f, (q31_t)0x7782dd5c, (q31_t)0xd2299a4e, (q31_t)0x77809d35, (q31_t)0xd223bc8a,
+  (q31_t)0x777e5cc3, (q31_t)0xd21ddee2, (q31_t)0x777c1c08, (q31_t)0xd2180156, (q31_t)0x7779db03, (q31_t)0xd21223e7, (q31_t)0x777799b5, (q31_t)0xd20c4694,
+  (q31_t)0x7775581d, (q31_t)0xd206695d, (q31_t)0x7773163b, (q31_t)0xd2008c43, (q31_t)0x7770d40f, (q31_t)0xd1faaf45, (q31_t)0x776e919a, (q31_t)0xd1f4d263,
+  (q31_t)0x776c4edb, (q31_t)0xd1eef59e, (q31_t)0x776a0bd3, (q31_t)0xd1e918f5, (q31_t)0x7767c880, (q31_t)0xd1e33c69, (q31_t)0x776584e5, (q31_t)0xd1dd5ff9,
+  (q31_t)0x776340ff, (q31_t)0xd1d783a6, (q31_t)0x7760fcd0, (q31_t)0xd1d1a76f, (q31_t)0x775eb857, (q31_t)0xd1cbcb54, (q31_t)0x775c7395, (q31_t)0xd1c5ef56,
+  (q31_t)0x775a2e89, (q31_t)0xd1c01375, (q31_t)0x7757e933, (q31_t)0xd1ba37b0, (q31_t)0x7755a394, (q31_t)0xd1b45c08, (q31_t)0x77535dab, (q31_t)0xd1ae807c,
+  (q31_t)0x77511778, (q31_t)0xd1a8a50d, (q31_t)0x774ed0fc, (q31_t)0xd1a2c9ba, (q31_t)0x774c8a36, (q31_t)0xd19cee84, (q31_t)0x774a4327, (q31_t)0xd197136b,
+  (q31_t)0x7747fbce, (q31_t)0xd191386e, (q31_t)0x7745b42c, (q31_t)0xd18b5d8e, (q31_t)0x77436c40, (q31_t)0xd18582ca, (q31_t)0x7741240a, (q31_t)0xd17fa823,
+  (q31_t)0x773edb8b, (q31_t)0xd179cd99, (q31_t)0x773c92c2, (q31_t)0xd173f32c, (q31_t)0x773a49b0, (q31_t)0xd16e18db, (q31_t)0x77380054, (q31_t)0xd1683ea7,
+  (q31_t)0x7735b6af, (q31_t)0xd1626490, (q31_t)0x77336cc0, (q31_t)0xd15c8a95, (q31_t)0x77312287, (q31_t)0xd156b0b7, (q31_t)0x772ed805, (q31_t)0xd150d6f6,
+  (q31_t)0x772c8d3a, (q31_t)0xd14afd52, (q31_t)0x772a4225, (q31_t)0xd14523cb, (q31_t)0x7727f6c6, (q31_t)0xd13f4a60, (q31_t)0x7725ab1f, (q31_t)0xd1397113,
+  (q31_t)0x77235f2d, (q31_t)0xd13397e2, (q31_t)0x772112f2, (q31_t)0xd12dbece, (q31_t)0x771ec66e, (q31_t)0xd127e5d7, (q31_t)0x771c79a0, (q31_t)0xd1220cfc,
+  (q31_t)0x771a2c88, (q31_t)0xd11c343f, (q31_t)0x7717df27, (q31_t)0xd1165b9f, (q31_t)0x7715917d, (q31_t)0xd110831b, (q31_t)0x77134389, (q31_t)0xd10aaab5,
+  (q31_t)0x7710f54c, (q31_t)0xd104d26b, (q31_t)0x770ea6c5, (q31_t)0xd0fefa3f, (q31_t)0x770c57f5, (q31_t)0xd0f9222f, (q31_t)0x770a08dc, (q31_t)0xd0f34a3d,
+  (q31_t)0x7707b979, (q31_t)0xd0ed7267, (q31_t)0x770569cc, (q31_t)0xd0e79aaf, (q31_t)0x770319d6, (q31_t)0xd0e1c313, (q31_t)0x7700c997, (q31_t)0xd0dbeb95,
+  (q31_t)0x76fe790e, (q31_t)0xd0d61434, (q31_t)0x76fc283c, (q31_t)0xd0d03cf0, (q31_t)0x76f9d721, (q31_t)0xd0ca65c9, (q31_t)0x76f785bc, (q31_t)0xd0c48ebf,
+  (q31_t)0x76f5340e, (q31_t)0xd0beb7d2, (q31_t)0x76f2e216, (q31_t)0xd0b8e102, (q31_t)0x76f08fd5, (q31_t)0xd0b30a50, (q31_t)0x76ee3d4b, (q31_t)0xd0ad33ba,
+  (q31_t)0x76ebea77, (q31_t)0xd0a75d42, (q31_t)0x76e9975a, (q31_t)0xd0a186e7, (q31_t)0x76e743f4, (q31_t)0xd09bb0aa, (q31_t)0x76e4f044, (q31_t)0xd095da89,
+  (q31_t)0x76e29c4b, (q31_t)0xd0900486, (q31_t)0x76e04808, (q31_t)0xd08a2ea0, (q31_t)0x76ddf37c, (q31_t)0xd08458d7, (q31_t)0x76db9ea7, (q31_t)0xd07e832c,
+  (q31_t)0x76d94989, (q31_t)0xd078ad9e, (q31_t)0x76d6f421, (q31_t)0xd072d82d, (q31_t)0x76d49e70, (q31_t)0xd06d02da, (q31_t)0x76d24876, (q31_t)0xd0672da3,
+  (q31_t)0x76cff232, (q31_t)0xd061588b, (q31_t)0x76cd9ba5, (q31_t)0xd05b838f, (q31_t)0x76cb44cf, (q31_t)0xd055aeb1, (q31_t)0x76c8edb0, (q31_t)0xd04fd9f1,
+  (q31_t)0x76c69647, (q31_t)0xd04a054e, (q31_t)0x76c43e95, (q31_t)0xd04430c8, (q31_t)0x76c1e699, (q31_t)0xd03e5c60, (q31_t)0x76bf8e55, (q31_t)0xd0388815,
+  (q31_t)0x76bd35c7, (q31_t)0xd032b3e7, (q31_t)0x76badcf0, (q31_t)0xd02cdfd8, (q31_t)0x76b883d0, (q31_t)0xd0270be5, (q31_t)0x76b62a66, (q31_t)0xd0213810,
+  (q31_t)0x76b3d0b4, (q31_t)0xd01b6459, (q31_t)0x76b176b8, (q31_t)0xd01590bf, (q31_t)0x76af1c72, (q31_t)0xd00fbd43, (q31_t)0x76acc1e4, (q31_t)0xd009e9e4,
+  (q31_t)0x76aa670d, (q31_t)0xd00416a3, (q31_t)0x76a80bec, (q31_t)0xcffe4380, (q31_t)0x76a5b082, (q31_t)0xcff8707a, (q31_t)0x76a354cf, (q31_t)0xcff29d92,
+  (q31_t)0x76a0f8d2, (q31_t)0xcfeccac7, (q31_t)0x769e9c8d, (q31_t)0xcfe6f81a, (q31_t)0x769c3ffe, (q31_t)0xcfe1258b, (q31_t)0x7699e326, (q31_t)0xcfdb531a,
+  (q31_t)0x76978605, (q31_t)0xcfd580c6, (q31_t)0x7695289b, (q31_t)0xcfcfae8f, (q31_t)0x7692cae8, (q31_t)0xcfc9dc77, (q31_t)0x76906ceb, (q31_t)0xcfc40a7c,
+  (q31_t)0x768e0ea6, (q31_t)0xcfbe389f, (q31_t)0x768bb017, (q31_t)0xcfb866e0, (q31_t)0x7689513f, (q31_t)0xcfb2953f, (q31_t)0x7686f21e, (q31_t)0xcfacc3bb,
+  (q31_t)0x768492b4, (q31_t)0xcfa6f255, (q31_t)0x76823301, (q31_t)0xcfa1210d, (q31_t)0x767fd304, (q31_t)0xcf9b4fe3, (q31_t)0x767d72bf, (q31_t)0xcf957ed7,
+  (q31_t)0x767b1231, (q31_t)0xcf8fade9, (q31_t)0x7678b159, (q31_t)0xcf89dd18, (q31_t)0x76765038, (q31_t)0xcf840c65, (q31_t)0x7673eecf, (q31_t)0xcf7e3bd1,
+  (q31_t)0x76718d1c, (q31_t)0xcf786b5a, (q31_t)0x766f2b20, (q31_t)0xcf729b01, (q31_t)0x766cc8db, (q31_t)0xcf6ccac6, (q31_t)0x766a664d, (q31_t)0xcf66faa9,
+  (q31_t)0x76680376, (q31_t)0xcf612aaa, (q31_t)0x7665a056, (q31_t)0xcf5b5ac9, (q31_t)0x76633ced, (q31_t)0xcf558b06, (q31_t)0x7660d93b, (q31_t)0xcf4fbb61,
+  (q31_t)0x765e7540, (q31_t)0xcf49ebda, (q31_t)0x765c10fc, (q31_t)0xcf441c71, (q31_t)0x7659ac6f, (q31_t)0xcf3e4d26, (q31_t)0x76574798, (q31_t)0xcf387dfa,
+  (q31_t)0x7654e279, (q31_t)0xcf32aeeb, (q31_t)0x76527d11, (q31_t)0xcf2cdffa, (q31_t)0x76501760, (q31_t)0xcf271128, (q31_t)0x764db166, (q31_t)0xcf214274,
+  (q31_t)0x764b4b23, (q31_t)0xcf1b73de, (q31_t)0x7648e497, (q31_t)0xcf15a566, (q31_t)0x76467dc2, (q31_t)0xcf0fd70c, (q31_t)0x764416a4, (q31_t)0xcf0a08d0,
+  (q31_t)0x7641af3d, (q31_t)0xcf043ab3, (q31_t)0x763f478d, (q31_t)0xcefe6cb3, (q31_t)0x763cdf94, (q31_t)0xcef89ed2, (q31_t)0x763a7752, (q31_t)0xcef2d110,
+  (q31_t)0x76380ec8, (q31_t)0xceed036b, (q31_t)0x7635a5f4, (q31_t)0xcee735e5, (q31_t)0x76333cd8, (q31_t)0xcee1687d, (q31_t)0x7630d372, (q31_t)0xcedb9b33,
+  (q31_t)0x762e69c4, (q31_t)0xced5ce08, (q31_t)0x762bffcd, (q31_t)0xced000fb, (q31_t)0x7629958c, (q31_t)0xceca340c, (q31_t)0x76272b03, (q31_t)0xcec4673c,
+  (q31_t)0x7624c031, (q31_t)0xcebe9a8a, (q31_t)0x76225517, (q31_t)0xceb8cdf7, (q31_t)0x761fe9b3, (q31_t)0xceb30181, (q31_t)0x761d7e06, (q31_t)0xcead352b,
+  (q31_t)0x761b1211, (q31_t)0xcea768f2, (q31_t)0x7618a5d3, (q31_t)0xcea19cd8, (q31_t)0x7616394c, (q31_t)0xce9bd0dd, (q31_t)0x7613cc7c, (q31_t)0xce960500,
+  (q31_t)0x76115f63, (q31_t)0xce903942, (q31_t)0x760ef201, (q31_t)0xce8a6da2, (q31_t)0x760c8457, (q31_t)0xce84a220, (q31_t)0x760a1664, (q31_t)0xce7ed6bd,
+  (q31_t)0x7607a828, (q31_t)0xce790b79, (q31_t)0x760539a3, (q31_t)0xce734053, (q31_t)0x7602cad5, (q31_t)0xce6d754c, (q31_t)0x76005bbf, (q31_t)0xce67aa63,
+  (q31_t)0x75fdec60, (q31_t)0xce61df99, (q31_t)0x75fb7cb8, (q31_t)0xce5c14ed, (q31_t)0x75f90cc7, (q31_t)0xce564a60, (q31_t)0x75f69c8d, (q31_t)0xce507ff2,
+  (q31_t)0x75f42c0b, (q31_t)0xce4ab5a2, (q31_t)0x75f1bb40, (q31_t)0xce44eb71, (q31_t)0x75ef4a2c, (q31_t)0xce3f215f, (q31_t)0x75ecd8cf, (q31_t)0xce39576c,
+  (q31_t)0x75ea672a, (q31_t)0xce338d97, (q31_t)0x75e7f53c, (q31_t)0xce2dc3e1, (q31_t)0x75e58305, (q31_t)0xce27fa49, (q31_t)0x75e31086, (q31_t)0xce2230d0,
+  (q31_t)0x75e09dbd, (q31_t)0xce1c6777, (q31_t)0x75de2aac, (q31_t)0xce169e3b, (q31_t)0x75dbb753, (q31_t)0xce10d51f, (q31_t)0x75d943b0, (q31_t)0xce0b0c21,
+  (q31_t)0x75d6cfc5, (q31_t)0xce054343, (q31_t)0x75d45b92, (q31_t)0xcdff7a83, (q31_t)0x75d1e715, (q31_t)0xcdf9b1e2, (q31_t)0x75cf7250, (q31_t)0xcdf3e95f,
+  (q31_t)0x75ccfd42, (q31_t)0xcdee20fc, (q31_t)0x75ca87ec, (q31_t)0xcde858b8, (q31_t)0x75c8124d, (q31_t)0xcde29092, (q31_t)0x75c59c65, (q31_t)0xcddcc88b,
+  (q31_t)0x75c32634, (q31_t)0xcdd700a4, (q31_t)0x75c0afbb, (q31_t)0xcdd138db, (q31_t)0x75be38fa, (q31_t)0xcdcb7131, (q31_t)0x75bbc1ef, (q31_t)0xcdc5a9a6,
+  (q31_t)0x75b94a9c, (q31_t)0xcdbfe23a, (q31_t)0x75b6d301, (q31_t)0xcdba1aee, (q31_t)0x75b45b1d, (q31_t)0xcdb453c0, (q31_t)0x75b1e2f0, (q31_t)0xcdae8cb1,
+  (q31_t)0x75af6a7b, (q31_t)0xcda8c5c1, (q31_t)0x75acf1bd, (q31_t)0xcda2fef0, (q31_t)0x75aa78b6, (q31_t)0xcd9d383f, (q31_t)0x75a7ff67, (q31_t)0xcd9771ac,
+  (q31_t)0x75a585cf, (q31_t)0xcd91ab39, (q31_t)0x75a30bef, (q31_t)0xcd8be4e4, (q31_t)0x75a091c6, (q31_t)0xcd861eaf, (q31_t)0x759e1755, (q31_t)0xcd805899,
+  (q31_t)0x759b9c9b, (q31_t)0xcd7a92a2, (q31_t)0x75992198, (q31_t)0xcd74ccca, (q31_t)0x7596a64d, (q31_t)0xcd6f0711, (q31_t)0x75942ab9, (q31_t)0xcd694178,
+  (q31_t)0x7591aedd, (q31_t)0xcd637bfe, (q31_t)0x758f32b9, (q31_t)0xcd5db6a3, (q31_t)0x758cb64c, (q31_t)0xcd57f167, (q31_t)0x758a3996, (q31_t)0xcd522c4a,
+  (q31_t)0x7587bc98, (q31_t)0xcd4c674d, (q31_t)0x75853f51, (q31_t)0xcd46a26f, (q31_t)0x7582c1c2, (q31_t)0xcd40ddb0, (q31_t)0x758043ea, (q31_t)0xcd3b1911,
+  (q31_t)0x757dc5ca, (q31_t)0xcd355491, (q31_t)0x757b4762, (q31_t)0xcd2f9030, (q31_t)0x7578c8b0, (q31_t)0xcd29cbee, (q31_t)0x757649b7, (q31_t)0xcd2407cc,
+  (q31_t)0x7573ca75, (q31_t)0xcd1e43ca, (q31_t)0x75714aea, (q31_t)0xcd187fe6, (q31_t)0x756ecb18, (q31_t)0xcd12bc22, (q31_t)0x756c4afc, (q31_t)0xcd0cf87e,
+  (q31_t)0x7569ca99, (q31_t)0xcd0734f9, (q31_t)0x756749ec, (q31_t)0xcd017193, (q31_t)0x7564c8f8, (q31_t)0xccfbae4d, (q31_t)0x756247bb, (q31_t)0xccf5eb26,
+  (q31_t)0x755fc635, (q31_t)0xccf0281f, (q31_t)0x755d4467, (q31_t)0xccea6538, (q31_t)0x755ac251, (q31_t)0xcce4a26f, (q31_t)0x75583ff3, (q31_t)0xccdedfc7,
+  (q31_t)0x7555bd4c, (q31_t)0xccd91d3d, (q31_t)0x75533a5c, (q31_t)0xccd35ad4, (q31_t)0x7550b725, (q31_t)0xcccd988a, (q31_t)0x754e33a4, (q31_t)0xccc7d65f,
+  (q31_t)0x754bafdc, (q31_t)0xccc21455, (q31_t)0x75492bcb, (q31_t)0xccbc5269, (q31_t)0x7546a772, (q31_t)0xccb6909e, (q31_t)0x754422d0, (q31_t)0xccb0cef2,
+  (q31_t)0x75419de7, (q31_t)0xccab0d65, (q31_t)0x753f18b4, (q31_t)0xcca54bf9, (q31_t)0x753c933a, (q31_t)0xcc9f8aac, (q31_t)0x753a0d77, (q31_t)0xcc99c97e,
+  (q31_t)0x7537876c, (q31_t)0xcc940871, (q31_t)0x75350118, (q31_t)0xcc8e4783, (q31_t)0x75327a7d, (q31_t)0xcc8886b5, (q31_t)0x752ff399, (q31_t)0xcc82c607,
+  (q31_t)0x752d6c6c, (q31_t)0xcc7d0578, (q31_t)0x752ae4f8, (q31_t)0xcc774509, (q31_t)0x75285d3b, (q31_t)0xcc7184ba, (q31_t)0x7525d536, (q31_t)0xcc6bc48b,
+  (q31_t)0x75234ce8, (q31_t)0xcc66047b, (q31_t)0x7520c453, (q31_t)0xcc60448c, (q31_t)0x751e3b75, (q31_t)0xcc5a84bc, (q31_t)0x751bb24f, (q31_t)0xcc54c50c,
+  (q31_t)0x751928e0, (q31_t)0xcc4f057c, (q31_t)0x75169f2a, (q31_t)0xcc49460c, (q31_t)0x7514152b, (q31_t)0xcc4386bc, (q31_t)0x75118ae4, (q31_t)0xcc3dc78b,
+  (q31_t)0x750f0054, (q31_t)0xcc38087b, (q31_t)0x750c757d, (q31_t)0xcc32498a, (q31_t)0x7509ea5d, (q31_t)0xcc2c8aba, (q31_t)0x75075ef5, (q31_t)0xcc26cc09,
+  (q31_t)0x7504d345, (q31_t)0xcc210d79, (q31_t)0x7502474d, (q31_t)0xcc1b4f08, (q31_t)0x74ffbb0d, (q31_t)0xcc1590b8, (q31_t)0x74fd2e84, (q31_t)0xcc0fd287,
+  (q31_t)0x74faa1b3, (q31_t)0xcc0a1477, (q31_t)0x74f8149a, (q31_t)0xcc045686, (q31_t)0x74f58739, (q31_t)0xcbfe98b6, (q31_t)0x74f2f990, (q31_t)0xcbf8db05,
+  (q31_t)0x74f06b9e, (q31_t)0xcbf31d75, (q31_t)0x74eddd65, (q31_t)0xcbed6005, (q31_t)0x74eb4ee3, (q31_t)0xcbe7a2b5, (q31_t)0x74e8c01a, (q31_t)0xcbe1e585,
+  (q31_t)0x74e63108, (q31_t)0xcbdc2876, (q31_t)0x74e3a1ae, (q31_t)0xcbd66b86, (q31_t)0x74e1120c, (q31_t)0xcbd0aeb7, (q31_t)0x74de8221, (q31_t)0xcbcaf208,
+  (q31_t)0x74dbf1ef, (q31_t)0xcbc53579, (q31_t)0x74d96175, (q31_t)0xcbbf790a, (q31_t)0x74d6d0b2, (q31_t)0xcbb9bcbb, (q31_t)0x74d43fa8, (q31_t)0xcbb4008d,
+  (q31_t)0x74d1ae55, (q31_t)0xcbae447f, (q31_t)0x74cf1cbb, (q31_t)0xcba88891, (q31_t)0x74cc8ad8, (q31_t)0xcba2ccc4, (q31_t)0x74c9f8ad, (q31_t)0xcb9d1117,
+  (q31_t)0x74c7663a, (q31_t)0xcb97558a, (q31_t)0x74c4d380, (q31_t)0xcb919a1d, (q31_t)0x74c2407d, (q31_t)0xcb8bded1, (q31_t)0x74bfad32, (q31_t)0xcb8623a5,
+  (q31_t)0x74bd199f, (q31_t)0xcb80689a, (q31_t)0x74ba85c4, (q31_t)0xcb7aadaf, (q31_t)0x74b7f1a1, (q31_t)0xcb74f2e4, (q31_t)0x74b55d36, (q31_t)0xcb6f383a,
+  (q31_t)0x74b2c884, (q31_t)0xcb697db0, (q31_t)0x74b03389, (q31_t)0xcb63c347, (q31_t)0x74ad9e46, (q31_t)0xcb5e08fe, (q31_t)0x74ab08bb, (q31_t)0xcb584ed6,
+  (q31_t)0x74a872e8, (q31_t)0xcb5294ce, (q31_t)0x74a5dccd, (q31_t)0xcb4cdae6, (q31_t)0x74a3466b, (q31_t)0xcb47211f, (q31_t)0x74a0afc0, (q31_t)0xcb416779,
+  (q31_t)0x749e18cd, (q31_t)0xcb3badf3, (q31_t)0x749b8193, (q31_t)0xcb35f48d, (q31_t)0x7498ea11, (q31_t)0xcb303b49, (q31_t)0x74965246, (q31_t)0xcb2a8224,
+  (q31_t)0x7493ba34, (q31_t)0xcb24c921, (q31_t)0x749121da, (q31_t)0xcb1f103e, (q31_t)0x748e8938, (q31_t)0xcb19577b, (q31_t)0x748bf04d, (q31_t)0xcb139ed9,
+  (q31_t)0x7489571c, (q31_t)0xcb0de658, (q31_t)0x7486bda2, (q31_t)0xcb082df8, (q31_t)0x748423e0, (q31_t)0xcb0275b8, (q31_t)0x748189d7, (q31_t)0xcafcbd99,
+  (q31_t)0x747eef85, (q31_t)0xcaf7059a, (q31_t)0x747c54ec, (q31_t)0xcaf14dbd, (q31_t)0x7479ba0b, (q31_t)0xcaeb9600, (q31_t)0x74771ee2, (q31_t)0xcae5de64,
+  (q31_t)0x74748371, (q31_t)0xcae026e8, (q31_t)0x7471e7b8, (q31_t)0xcada6f8d, (q31_t)0x746f4bb8, (q31_t)0xcad4b853, (q31_t)0x746caf70, (q31_t)0xcacf013a,
+  (q31_t)0x746a12df, (q31_t)0xcac94a42, (q31_t)0x74677608, (q31_t)0xcac3936b, (q31_t)0x7464d8e8, (q31_t)0xcabddcb4, (q31_t)0x74623b80, (q31_t)0xcab8261e,
+  (q31_t)0x745f9dd1, (q31_t)0xcab26fa9, (q31_t)0x745cffda, (q31_t)0xcaacb955, (q31_t)0x745a619b, (q31_t)0xcaa70322, (q31_t)0x7457c314, (q31_t)0xcaa14d10,
+  (q31_t)0x74552446, (q31_t)0xca9b971e, (q31_t)0x74528530, (q31_t)0xca95e14e, (q31_t)0x744fe5d2, (q31_t)0xca902b9f, (q31_t)0x744d462c, (q31_t)0xca8a7610,
+  (q31_t)0x744aa63f, (q31_t)0xca84c0a3, (q31_t)0x7448060a, (q31_t)0xca7f0b56, (q31_t)0x7445658d, (q31_t)0xca79562b, (q31_t)0x7442c4c8, (q31_t)0xca73a120,
+  (q31_t)0x744023bc, (q31_t)0xca6dec37, (q31_t)0x743d8268, (q31_t)0xca68376e, (q31_t)0x743ae0cc, (q31_t)0xca6282c7, (q31_t)0x74383ee9, (q31_t)0xca5cce40,
+  (q31_t)0x74359cbd, (q31_t)0xca5719db, (q31_t)0x7432fa4b, (q31_t)0xca516597, (q31_t)0x74305790, (q31_t)0xca4bb174, (q31_t)0x742db48e, (q31_t)0xca45fd72,
+  (q31_t)0x742b1144, (q31_t)0xca404992, (q31_t)0x74286db3, (q31_t)0xca3a95d2, (q31_t)0x7425c9da, (q31_t)0xca34e234, (q31_t)0x742325b9, (q31_t)0xca2f2eb6,
+  (q31_t)0x74208150, (q31_t)0xca297b5a, (q31_t)0x741ddca0, (q31_t)0xca23c820, (q31_t)0x741b37a9, (q31_t)0xca1e1506, (q31_t)0x74189269, (q31_t)0xca18620e,
+  (q31_t)0x7415ece2, (q31_t)0xca12af37, (q31_t)0x74134714, (q31_t)0xca0cfc81, (q31_t)0x7410a0fe, (q31_t)0xca0749ec, (q31_t)0x740dfaa0, (q31_t)0xca019779,
+  (q31_t)0x740b53fb, (q31_t)0xc9fbe527, (q31_t)0x7408ad0e, (q31_t)0xc9f632f6, (q31_t)0x740605d9, (q31_t)0xc9f080e7, (q31_t)0x74035e5d, (q31_t)0xc9eacef9,
+  (q31_t)0x7400b69a, (q31_t)0xc9e51d2d, (q31_t)0x73fe0e8f, (q31_t)0xc9df6b81, (q31_t)0x73fb663c, (q31_t)0xc9d9b9f7, (q31_t)0x73f8bda2, (q31_t)0xc9d4088f,
+  (q31_t)0x73f614c0, (q31_t)0xc9ce5748, (q31_t)0x73f36b97, (q31_t)0xc9c8a622, (q31_t)0x73f0c226, (q31_t)0xc9c2f51e, (q31_t)0x73ee186e, (q31_t)0xc9bd443c,
+  (q31_t)0x73eb6e6e, (q31_t)0xc9b7937a, (q31_t)0x73e8c426, (q31_t)0xc9b1e2db, (q31_t)0x73e61997, (q31_t)0xc9ac325d, (q31_t)0x73e36ec1, (q31_t)0xc9a68200,
+  (q31_t)0x73e0c3a3, (q31_t)0xc9a0d1c5, (q31_t)0x73de183e, (q31_t)0xc99b21ab, (q31_t)0x73db6c91, (q31_t)0xc99571b3, (q31_t)0x73d8c09d, (q31_t)0xc98fc1dc,
+  (q31_t)0x73d61461, (q31_t)0xc98a1227, (q31_t)0x73d367de, (q31_t)0xc9846294, (q31_t)0x73d0bb13, (q31_t)0xc97eb322, (q31_t)0x73ce0e01, (q31_t)0xc97903d2,
+  (q31_t)0x73cb60a8, (q31_t)0xc97354a4, (q31_t)0x73c8b307, (q31_t)0xc96da597, (q31_t)0x73c6051f, (q31_t)0xc967f6ac, (q31_t)0x73c356ef, (q31_t)0xc96247e2,
+  (q31_t)0x73c0a878, (q31_t)0xc95c993a, (q31_t)0x73bdf9b9, (q31_t)0xc956eab4, (q31_t)0x73bb4ab3, (q31_t)0xc9513c50, (q31_t)0x73b89b66, (q31_t)0xc94b8e0d,
+  (q31_t)0x73b5ebd1, (q31_t)0xc945dfec, (q31_t)0x73b33bf5, (q31_t)0xc94031ed, (q31_t)0x73b08bd1, (q31_t)0xc93a8410, (q31_t)0x73addb67, (q31_t)0xc934d654,
+  (q31_t)0x73ab2ab4, (q31_t)0xc92f28ba, (q31_t)0x73a879bb, (q31_t)0xc9297b42, (q31_t)0x73a5c87a, (q31_t)0xc923cdec, (q31_t)0x73a316f2, (q31_t)0xc91e20b8,
+  (q31_t)0x73a06522, (q31_t)0xc91873a5, (q31_t)0x739db30b, (q31_t)0xc912c6b5, (q31_t)0x739b00ad, (q31_t)0xc90d19e6, (q31_t)0x73984e07, (q31_t)0xc9076d39,
+  (q31_t)0x73959b1b, (q31_t)0xc901c0ae, (q31_t)0x7392e7e6, (q31_t)0xc8fc1445, (q31_t)0x7390346b, (q31_t)0xc8f667fe, (q31_t)0x738d80a8, (q31_t)0xc8f0bbd9,
+  (q31_t)0x738acc9e, (q31_t)0xc8eb0fd6, (q31_t)0x7388184d, (q31_t)0xc8e563f5, (q31_t)0x738563b5, (q31_t)0xc8dfb836, (q31_t)0x7382aed5, (q31_t)0xc8da0c99,
+  (q31_t)0x737ff9ae, (q31_t)0xc8d4611d, (q31_t)0x737d4440, (q31_t)0xc8ceb5c4, (q31_t)0x737a8e8a, (q31_t)0xc8c90a8d, (q31_t)0x7377d88d, (q31_t)0xc8c35f78,
+  (q31_t)0x73752249, (q31_t)0xc8bdb485, (q31_t)0x73726bbe, (q31_t)0xc8b809b4, (q31_t)0x736fb4ec, (q31_t)0xc8b25f06, (q31_t)0x736cfdd2, (q31_t)0xc8acb479,
+  (q31_t)0x736a4671, (q31_t)0xc8a70a0e, (q31_t)0x73678ec9, (q31_t)0xc8a15fc6, (q31_t)0x7364d6da, (q31_t)0xc89bb5a0, (q31_t)0x73621ea4, (q31_t)0xc8960b9c,
+  (q31_t)0x735f6626, (q31_t)0xc89061ba, (q31_t)0x735cad61, (q31_t)0xc88ab7fa, (q31_t)0x7359f456, (q31_t)0xc8850e5d, (q31_t)0x73573b03, (q31_t)0xc87f64e2,
+  (q31_t)0x73548168, (q31_t)0xc879bb89, (q31_t)0x7351c787, (q31_t)0xc8741252, (q31_t)0x734f0d5f, (q31_t)0xc86e693d, (q31_t)0x734c52ef, (q31_t)0xc868c04b,
+  (q31_t)0x73499838, (q31_t)0xc863177b, (q31_t)0x7346dd3a, (q31_t)0xc85d6ece, (q31_t)0x734421f6, (q31_t)0xc857c642, (q31_t)0x7341666a, (q31_t)0xc8521dd9,
+  (q31_t)0x733eaa96, (q31_t)0xc84c7593, (q31_t)0x733bee7c, (q31_t)0xc846cd6e, (q31_t)0x7339321b, (q31_t)0xc841256d, (q31_t)0x73367572, (q31_t)0xc83b7d8d,
+  (q31_t)0x7333b883, (q31_t)0xc835d5d0, (q31_t)0x7330fb4d, (q31_t)0xc8302e35, (q31_t)0x732e3dcf, (q31_t)0xc82a86bd, (q31_t)0x732b800a, (q31_t)0xc824df67,
+  (q31_t)0x7328c1ff, (q31_t)0xc81f3834, (q31_t)0x732603ac, (q31_t)0xc8199123, (q31_t)0x73234512, (q31_t)0xc813ea35, (q31_t)0x73208632, (q31_t)0xc80e4369,
+  (q31_t)0x731dc70a, (q31_t)0xc8089cbf, (q31_t)0x731b079b, (q31_t)0xc802f638, (q31_t)0x731847e5, (q31_t)0xc7fd4fd4, (q31_t)0x731587e8, (q31_t)0xc7f7a992,
+  (q31_t)0x7312c7a5, (q31_t)0xc7f20373, (q31_t)0x7310071a, (q31_t)0xc7ec5d76, (q31_t)0x730d4648, (q31_t)0xc7e6b79c, (q31_t)0x730a8530, (q31_t)0xc7e111e5,
+  (q31_t)0x7307c3d0, (q31_t)0xc7db6c50, (q31_t)0x73050229, (q31_t)0xc7d5c6de, (q31_t)0x7302403c, (q31_t)0xc7d0218e, (q31_t)0x72ff7e07, (q31_t)0xc7ca7c61,
+  (q31_t)0x72fcbb8c, (q31_t)0xc7c4d757, (q31_t)0x72f9f8c9, (q31_t)0xc7bf3270, (q31_t)0x72f735c0, (q31_t)0xc7b98dab, (q31_t)0x72f47270, (q31_t)0xc7b3e909,
+  (q31_t)0x72f1aed9, (q31_t)0xc7ae4489, (q31_t)0x72eeeafb, (q31_t)0xc7a8a02c, (q31_t)0x72ec26d6, (q31_t)0xc7a2fbf3, (q31_t)0x72e9626a, (q31_t)0xc79d57db,
+  (q31_t)0x72e69db7, (q31_t)0xc797b3e7, (q31_t)0x72e3d8be, (q31_t)0xc7921015, (q31_t)0x72e1137d, (q31_t)0xc78c6c67, (q31_t)0x72de4df6, (q31_t)0xc786c8db,
+  (q31_t)0x72db8828, (q31_t)0xc7812572, (q31_t)0x72d8c213, (q31_t)0xc77b822b, (q31_t)0x72d5fbb7, (q31_t)0xc775df08, (q31_t)0x72d33514, (q31_t)0xc7703c08,
+  (q31_t)0x72d06e2b, (q31_t)0xc76a992a, (q31_t)0x72cda6fb, (q31_t)0xc764f66f, (q31_t)0x72cadf83, (q31_t)0xc75f53d7, (q31_t)0x72c817c6, (q31_t)0xc759b163,
+  (q31_t)0x72c54fc1, (q31_t)0xc7540f11, (q31_t)0x72c28775, (q31_t)0xc74e6ce2, (q31_t)0x72bfbee3, (q31_t)0xc748cad6, (q31_t)0x72bcf60a, (q31_t)0xc74328ed,
+  (q31_t)0x72ba2cea, (q31_t)0xc73d8727, (q31_t)0x72b76383, (q31_t)0xc737e584, (q31_t)0x72b499d6, (q31_t)0xc7324404, (q31_t)0x72b1cfe1, (q31_t)0xc72ca2a7,
+  (q31_t)0x72af05a7, (q31_t)0xc727016d, (q31_t)0x72ac3b25, (q31_t)0xc7216056, (q31_t)0x72a9705c, (q31_t)0xc71bbf62, (q31_t)0x72a6a54d, (q31_t)0xc7161e92,
+  (q31_t)0x72a3d9f7, (q31_t)0xc7107de4, (q31_t)0x72a10e5b, (q31_t)0xc70add5a, (q31_t)0x729e4277, (q31_t)0xc7053cf2, (q31_t)0x729b764d, (q31_t)0xc6ff9cae,
+  (q31_t)0x7298a9dd, (q31_t)0xc6f9fc8d, (q31_t)0x7295dd25, (q31_t)0xc6f45c8f, (q31_t)0x72931027, (q31_t)0xc6eebcb5, (q31_t)0x729042e3, (q31_t)0xc6e91cfd,
+  (q31_t)0x728d7557, (q31_t)0xc6e37d69, (q31_t)0x728aa785, (q31_t)0xc6ddddf8, (q31_t)0x7287d96c, (q31_t)0xc6d83eab, (q31_t)0x72850b0d, (q31_t)0xc6d29f80,
+  (q31_t)0x72823c67, (q31_t)0xc6cd0079, (q31_t)0x727f6d7a, (q31_t)0xc6c76195, (q31_t)0x727c9e47, (q31_t)0xc6c1c2d4, (q31_t)0x7279cecd, (q31_t)0xc6bc2437,
+  (q31_t)0x7276ff0d, (q31_t)0xc6b685bd, (q31_t)0x72742f05, (q31_t)0xc6b0e767, (q31_t)0x72715eb8, (q31_t)0xc6ab4933, (q31_t)0x726e8e23, (q31_t)0xc6a5ab23,
+  (q31_t)0x726bbd48, (q31_t)0xc6a00d37, (q31_t)0x7268ec27, (q31_t)0xc69a6f6e, (q31_t)0x72661abf, (q31_t)0xc694d1c8, (q31_t)0x72634910, (q31_t)0xc68f3446,
+  (q31_t)0x7260771b, (q31_t)0xc68996e7, (q31_t)0x725da4df, (q31_t)0xc683f9ab, (q31_t)0x725ad25d, (q31_t)0xc67e5c93, (q31_t)0x7257ff94, (q31_t)0xc678bf9f,
+  (q31_t)0x72552c85, (q31_t)0xc67322ce, (q31_t)0x7252592f, (q31_t)0xc66d8620, (q31_t)0x724f8593, (q31_t)0xc667e996, (q31_t)0x724cb1b0, (q31_t)0xc6624d30,
+  (q31_t)0x7249dd86, (q31_t)0xc65cb0ed, (q31_t)0x72470916, (q31_t)0xc65714cd, (q31_t)0x72443460, (q31_t)0xc65178d1, (q31_t)0x72415f63, (q31_t)0xc64bdcf9,
+  (q31_t)0x723e8a20, (q31_t)0xc6464144, (q31_t)0x723bb496, (q31_t)0xc640a5b3, (q31_t)0x7238dec5, (q31_t)0xc63b0a46, (q31_t)0x723608af, (q31_t)0xc6356efc,
+  (q31_t)0x72333251, (q31_t)0xc62fd3d6, (q31_t)0x72305bae, (q31_t)0xc62a38d4, (q31_t)0x722d84c4, (q31_t)0xc6249df5, (q31_t)0x722aad93, (q31_t)0xc61f033a,
+  (q31_t)0x7227d61c, (q31_t)0xc61968a2, (q31_t)0x7224fe5f, (q31_t)0xc613ce2f, (q31_t)0x7222265b, (q31_t)0xc60e33df, (q31_t)0x721f4e11, (q31_t)0xc60899b2,
+  (q31_t)0x721c7580, (q31_t)0xc602ffaa, (q31_t)0x72199ca9, (q31_t)0xc5fd65c5, (q31_t)0x7216c38c, (q31_t)0xc5f7cc04, (q31_t)0x7213ea28, (q31_t)0xc5f23267,
+  (q31_t)0x7211107e, (q31_t)0xc5ec98ee, (q31_t)0x720e368d, (q31_t)0xc5e6ff98, (q31_t)0x720b5c57, (q31_t)0xc5e16667, (q31_t)0x720881d9, (q31_t)0xc5dbcd59,
+  (q31_t)0x7205a716, (q31_t)0xc5d6346f, (q31_t)0x7202cc0c, (q31_t)0xc5d09ba9, (q31_t)0x71fff0bc, (q31_t)0xc5cb0307, (q31_t)0x71fd1525, (q31_t)0xc5c56a89,
+  (q31_t)0x71fa3949, (q31_t)0xc5bfd22e, (q31_t)0x71f75d25, (q31_t)0xc5ba39f8, (q31_t)0x71f480bc, (q31_t)0xc5b4a1e5, (q31_t)0x71f1a40c, (q31_t)0xc5af09f7,
+  (q31_t)0x71eec716, (q31_t)0xc5a9722c, (q31_t)0x71ebe9da, (q31_t)0xc5a3da86, (q31_t)0x71e90c57, (q31_t)0xc59e4303, (q31_t)0x71e62e8f, (q31_t)0xc598aba5,
+  (q31_t)0x71e35080, (q31_t)0xc593146a, (q31_t)0x71e0722a, (q31_t)0xc58d7d54, (q31_t)0x71dd938f, (q31_t)0xc587e661, (q31_t)0x71dab4ad, (q31_t)0xc5824f93,
+  (q31_t)0x71d7d585, (q31_t)0xc57cb8e9, (q31_t)0x71d4f617, (q31_t)0xc5772263, (q31_t)0x71d21662, (q31_t)0xc5718c00, (q31_t)0x71cf3667, (q31_t)0xc56bf5c2,
+  (q31_t)0x71cc5626, (q31_t)0xc5665fa9, (q31_t)0x71c9759f, (q31_t)0xc560c9b3, (q31_t)0x71c694d2, (q31_t)0xc55b33e2, (q31_t)0x71c3b3bf, (q31_t)0xc5559e34,
+  (q31_t)0x71c0d265, (q31_t)0xc55008ab, (q31_t)0x71bdf0c5, (q31_t)0xc54a7346, (q31_t)0x71bb0edf, (q31_t)0xc544de05, (q31_t)0x71b82cb3, (q31_t)0xc53f48e9,
+  (q31_t)0x71b54a41, (q31_t)0xc539b3f1, (q31_t)0x71b26788, (q31_t)0xc5341f1d, (q31_t)0x71af848a, (q31_t)0xc52e8a6d, (q31_t)0x71aca145, (q31_t)0xc528f5e1,
+  (q31_t)0x71a9bdba, (q31_t)0xc523617a, (q31_t)0x71a6d9e9, (q31_t)0xc51dcd37, (q31_t)0x71a3f5d2, (q31_t)0xc5183919, (q31_t)0x71a11175, (q31_t)0xc512a51f,
+  (q31_t)0x719e2cd2, (q31_t)0xc50d1149, (q31_t)0x719b47e9, (q31_t)0xc5077d97, (q31_t)0x719862b9, (q31_t)0xc501ea0a, (q31_t)0x71957d44, (q31_t)0xc4fc56a2,
+  (q31_t)0x71929789, (q31_t)0xc4f6c35d, (q31_t)0x718fb187, (q31_t)0xc4f1303d, (q31_t)0x718ccb3f, (q31_t)0xc4eb9d42, (q31_t)0x7189e4b2, (q31_t)0xc4e60a6b,
+  (q31_t)0x7186fdde, (q31_t)0xc4e077b8, (q31_t)0x718416c4, (q31_t)0xc4dae52a, (q31_t)0x71812f65, (q31_t)0xc4d552c1, (q31_t)0x717e47bf, (q31_t)0xc4cfc07c,
+  (q31_t)0x717b5fd3, (q31_t)0xc4ca2e5b, (q31_t)0x717877a1, (q31_t)0xc4c49c5f, (q31_t)0x71758f29, (q31_t)0xc4bf0a87, (q31_t)0x7172a66c, (q31_t)0xc4b978d4,
+  (q31_t)0x716fbd68, (q31_t)0xc4b3e746, (q31_t)0x716cd41e, (q31_t)0xc4ae55dc, (q31_t)0x7169ea8f, (q31_t)0xc4a8c497, (q31_t)0x716700b9, (q31_t)0xc4a33376,
+  (q31_t)0x7164169d, (q31_t)0xc49da27a, (q31_t)0x71612c3c, (q31_t)0xc49811a3, (q31_t)0x715e4194, (q31_t)0xc49280f0, (q31_t)0x715b56a7, (q31_t)0xc48cf062,
+  (q31_t)0x71586b74, (q31_t)0xc4875ff9, (q31_t)0x71557ffa, (q31_t)0xc481cfb4, (q31_t)0x7152943b, (q31_t)0xc47c3f94, (q31_t)0x714fa836, (q31_t)0xc476af98,
+  (q31_t)0x714cbbeb, (q31_t)0xc4711fc2, (q31_t)0x7149cf5a, (q31_t)0xc46b9010, (q31_t)0x7146e284, (q31_t)0xc4660083, (q31_t)0x7143f567, (q31_t)0xc460711b,
+  (q31_t)0x71410805, (q31_t)0xc45ae1d7, (q31_t)0x713e1a5c, (q31_t)0xc45552b8, (q31_t)0x713b2c6e, (q31_t)0xc44fc3be, (q31_t)0x71383e3a, (q31_t)0xc44a34e9,
+  (q31_t)0x71354fc0, (q31_t)0xc444a639, (q31_t)0x71326101, (q31_t)0xc43f17ad, (q31_t)0x712f71fb, (q31_t)0xc4398947, (q31_t)0x712c82b0, (q31_t)0xc433fb05,
+  (q31_t)0x7129931f, (q31_t)0xc42e6ce8, (q31_t)0x7126a348, (q31_t)0xc428def0, (q31_t)0x7123b32b, (q31_t)0xc423511d, (q31_t)0x7120c2c8, (q31_t)0xc41dc36f,
+  (q31_t)0x711dd220, (q31_t)0xc41835e6, (q31_t)0x711ae132, (q31_t)0xc412a882, (q31_t)0x7117effe, (q31_t)0xc40d1b42, (q31_t)0x7114fe84, (q31_t)0xc4078e28,
+  (q31_t)0x71120cc5, (q31_t)0xc4020133, (q31_t)0x710f1ac0, (q31_t)0xc3fc7462, (q31_t)0x710c2875, (q31_t)0xc3f6e7b7, (q31_t)0x710935e4, (q31_t)0xc3f15b31,
+  (q31_t)0x7106430e, (q31_t)0xc3ebced0, (q31_t)0x71034ff2, (q31_t)0xc3e64294, (q31_t)0x71005c90, (q31_t)0xc3e0b67d, (q31_t)0x70fd68e9, (q31_t)0xc3db2a8b,
+  (q31_t)0x70fa74fc, (q31_t)0xc3d59ebe, (q31_t)0x70f780c9, (q31_t)0xc3d01316, (q31_t)0x70f48c50, (q31_t)0xc3ca8793, (q31_t)0x70f19792, (q31_t)0xc3c4fc36,
+  (q31_t)0x70eea28e, (q31_t)0xc3bf70fd, (q31_t)0x70ebad45, (q31_t)0xc3b9e5ea, (q31_t)0x70e8b7b5, (q31_t)0xc3b45afc, (q31_t)0x70e5c1e1, (q31_t)0xc3aed034,
+  (q31_t)0x70e2cbc6, (q31_t)0xc3a94590, (q31_t)0x70dfd566, (q31_t)0xc3a3bb12, (q31_t)0x70dcdec0, (q31_t)0xc39e30b8, (q31_t)0x70d9e7d5, (q31_t)0xc398a685,
+  (q31_t)0x70d6f0a4, (q31_t)0xc3931c76, (q31_t)0x70d3f92d, (q31_t)0xc38d928d, (q31_t)0x70d10171, (q31_t)0xc38808c9, (q31_t)0x70ce096f, (q31_t)0xc3827f2a,
+  (q31_t)0x70cb1128, (q31_t)0xc37cf5b0, (q31_t)0x70c8189b, (q31_t)0xc3776c5c, (q31_t)0x70c51fc8, (q31_t)0xc371e32d, (q31_t)0x70c226b0, (q31_t)0xc36c5a24,
+  (q31_t)0x70bf2d53, (q31_t)0xc366d140, (q31_t)0x70bc33b0, (q31_t)0xc3614881, (q31_t)0x70b939c7, (q31_t)0xc35bbfe8, (q31_t)0x70b63f99, (q31_t)0xc3563774,
+  (q31_t)0x70b34525, (q31_t)0xc350af26, (q31_t)0x70b04a6b, (q31_t)0xc34b26fc, (q31_t)0x70ad4f6d, (q31_t)0xc3459ef9, (q31_t)0x70aa5428, (q31_t)0xc340171b,
+  (q31_t)0x70a7589f, (q31_t)0xc33a8f62, (q31_t)0x70a45ccf, (q31_t)0xc33507cf, (q31_t)0x70a160ba, (q31_t)0xc32f8061, (q31_t)0x709e6460, (q31_t)0xc329f919,
+  (q31_t)0x709b67c0, (q31_t)0xc32471f7, (q31_t)0x70986adb, (q31_t)0xc31eeaf9, (q31_t)0x70956db1, (q31_t)0xc3196422, (q31_t)0x70927041, (q31_t)0xc313dd70,
+  (q31_t)0x708f728b, (q31_t)0xc30e56e4, (q31_t)0x708c7490, (q31_t)0xc308d07d, (q31_t)0x70897650, (q31_t)0xc3034a3c, (q31_t)0x708677ca, (q31_t)0xc2fdc420,
+  (q31_t)0x708378ff, (q31_t)0xc2f83e2a, (q31_t)0x708079ee, (q31_t)0xc2f2b85a, (q31_t)0x707d7a98, (q31_t)0xc2ed32af, (q31_t)0x707a7afd, (q31_t)0xc2e7ad2a,
+  (q31_t)0x70777b1c, (q31_t)0xc2e227cb, (q31_t)0x70747af6, (q31_t)0xc2dca291, (q31_t)0x70717a8a, (q31_t)0xc2d71d7e, (q31_t)0x706e79d9, (q31_t)0xc2d1988f,
+  (q31_t)0x706b78e3, (q31_t)0xc2cc13c7, (q31_t)0x706877a7, (q31_t)0xc2c68f24, (q31_t)0x70657626, (q31_t)0xc2c10aa7, (q31_t)0x70627460, (q31_t)0xc2bb8650,
+  (q31_t)0x705f7255, (q31_t)0xc2b6021f, (q31_t)0x705c7004, (q31_t)0xc2b07e14, (q31_t)0x70596d6d, (q31_t)0xc2aafa2e, (q31_t)0x70566a92, (q31_t)0xc2a5766e,
+  (q31_t)0x70536771, (q31_t)0xc29ff2d4, (q31_t)0x7050640b, (q31_t)0xc29a6f60, (q31_t)0x704d6060, (q31_t)0xc294ec12, (q31_t)0x704a5c6f, (q31_t)0xc28f68e9,
+  (q31_t)0x70475839, (q31_t)0xc289e5e7, (q31_t)0x704453be, (q31_t)0xc284630a, (q31_t)0x70414efd, (q31_t)0xc27ee054, (q31_t)0x703e49f8, (q31_t)0xc2795dc3,
+  (q31_t)0x703b44ad, (q31_t)0xc273db58, (q31_t)0x70383f1d, (q31_t)0xc26e5913, (q31_t)0x70353947, (q31_t)0xc268d6f5, (q31_t)0x7032332d, (q31_t)0xc26354fc,
+  (q31_t)0x702f2ccd, (q31_t)0xc25dd329, (q31_t)0x702c2628, (q31_t)0xc258517c, (q31_t)0x70291f3e, (q31_t)0xc252cff5, (q31_t)0x7026180e, (q31_t)0xc24d4e95,
+  (q31_t)0x7023109a, (q31_t)0xc247cd5a, (q31_t)0x702008e0, (q31_t)0xc2424c46, (q31_t)0x701d00e1, (q31_t)0xc23ccb57, (q31_t)0x7019f89d, (q31_t)0xc2374a8f,
+  (q31_t)0x7016f014, (q31_t)0xc231c9ec, (q31_t)0x7013e746, (q31_t)0xc22c4970, (q31_t)0x7010de32, (q31_t)0xc226c91a, (q31_t)0x700dd4da, (q31_t)0xc22148ea,
+  (q31_t)0x700acb3c, (q31_t)0xc21bc8e1, (q31_t)0x7007c159, (q31_t)0xc21648fd, (q31_t)0x7004b731, (q31_t)0xc210c940, (q31_t)0x7001acc4, (q31_t)0xc20b49a9,
+  (q31_t)0x6ffea212, (q31_t)0xc205ca38, (q31_t)0x6ffb971b, (q31_t)0xc2004aed, (q31_t)0x6ff88bde, (q31_t)0xc1facbc9, (q31_t)0x6ff5805d, (q31_t)0xc1f54cca,
+  (q31_t)0x6ff27497, (q31_t)0xc1efcdf3, (q31_t)0x6fef688b, (q31_t)0xc1ea4f41, (q31_t)0x6fec5c3b, (q31_t)0xc1e4d0b6, (q31_t)0x6fe94fa5, (q31_t)0xc1df5251,
+  (q31_t)0x6fe642ca, (q31_t)0xc1d9d412, (q31_t)0x6fe335ab, (q31_t)0xc1d455f9, (q31_t)0x6fe02846, (q31_t)0xc1ced807, (q31_t)0x6fdd1a9c, (q31_t)0xc1c95a3c,
+  (q31_t)0x6fda0cae, (q31_t)0xc1c3dc97, (q31_t)0x6fd6fe7a, (q31_t)0xc1be5f18, (q31_t)0x6fd3f001, (q31_t)0xc1b8e1bf, (q31_t)0x6fd0e144, (q31_t)0xc1b3648d,
+  (q31_t)0x6fcdd241, (q31_t)0xc1ade781, (q31_t)0x6fcac2fa, (q31_t)0xc1a86a9c, (q31_t)0x6fc7b36d, (q31_t)0xc1a2edde, (q31_t)0x6fc4a39c, (q31_t)0xc19d7145,
+  (q31_t)0x6fc19385, (q31_t)0xc197f4d4, (q31_t)0x6fbe832a, (q31_t)0xc1927888, (q31_t)0x6fbb728a, (q31_t)0xc18cfc63, (q31_t)0x6fb861a4, (q31_t)0xc1878065,
+  (q31_t)0x6fb5507a, (q31_t)0xc182048d, (q31_t)0x6fb23f0b, (q31_t)0xc17c88dc, (q31_t)0x6faf2d57, (q31_t)0xc1770d52, (q31_t)0x6fac1b5f, (q31_t)0xc17191ee,
+  (q31_t)0x6fa90921, (q31_t)0xc16c16b0, (q31_t)0x6fa5f69e, (q31_t)0xc1669b99, (q31_t)0x6fa2e3d7, (q31_t)0xc16120a9, (q31_t)0x6f9fd0cb, (q31_t)0xc15ba5df,
+  (q31_t)0x6f9cbd79, (q31_t)0xc1562b3d, (q31_t)0x6f99a9e3, (q31_t)0xc150b0c0, (q31_t)0x6f969608, (q31_t)0xc14b366b, (q31_t)0x6f9381e9, (q31_t)0xc145bc3c,
+  (q31_t)0x6f906d84, (q31_t)0xc1404233, (q31_t)0x6f8d58db, (q31_t)0xc13ac852, (q31_t)0x6f8a43ed, (q31_t)0xc1354e97, (q31_t)0x6f872eba, (q31_t)0xc12fd503,
+  (q31_t)0x6f841942, (q31_t)0xc12a5b95, (q31_t)0x6f810386, (q31_t)0xc124e24f, (q31_t)0x6f7ded84, (q31_t)0xc11f692f, (q31_t)0x6f7ad73e, (q31_t)0xc119f036,
+  (q31_t)0x6f77c0b3, (q31_t)0xc1147764, (q31_t)0x6f74a9e4, (q31_t)0xc10efeb8, (q31_t)0x6f7192cf, (q31_t)0xc1098634, (q31_t)0x6f6e7b76, (q31_t)0xc1040dd6,
+  (q31_t)0x6f6b63d8, (q31_t)0xc0fe959f, (q31_t)0x6f684bf6, (q31_t)0xc0f91d8f, (q31_t)0x6f6533ce, (q31_t)0xc0f3a5a6, (q31_t)0x6f621b62, (q31_t)0xc0ee2de3,
+  (q31_t)0x6f5f02b2, (q31_t)0xc0e8b648, (q31_t)0x6f5be9bc, (q31_t)0xc0e33ed4, (q31_t)0x6f58d082, (q31_t)0xc0ddc786, (q31_t)0x6f55b703, (q31_t)0xc0d8505f,
+  (q31_t)0x6f529d40, (q31_t)0xc0d2d960, (q31_t)0x6f4f8338, (q31_t)0xc0cd6287, (q31_t)0x6f4c68eb, (q31_t)0xc0c7ebd6, (q31_t)0x6f494e5a, (q31_t)0xc0c2754b,
+  (q31_t)0x6f463383, (q31_t)0xc0bcfee7, (q31_t)0x6f431869, (q31_t)0xc0b788ab, (q31_t)0x6f3ffd09, (q31_t)0xc0b21295, (q31_t)0x6f3ce165, (q31_t)0xc0ac9ca6,
+  (q31_t)0x6f39c57d, (q31_t)0xc0a726df, (q31_t)0x6f36a94f, (q31_t)0xc0a1b13e, (q31_t)0x6f338cde, (q31_t)0xc09c3bc5, (q31_t)0x6f307027, (q31_t)0xc096c673,
+  (q31_t)0x6f2d532c, (q31_t)0xc0915148, (q31_t)0x6f2a35ed, (q31_t)0xc08bdc44, (q31_t)0x6f271868, (q31_t)0xc0866767, (q31_t)0x6f23faa0, (q31_t)0xc080f2b1,
+  (q31_t)0x6f20dc92, (q31_t)0xc07b7e23, (q31_t)0x6f1dbe41, (q31_t)0xc07609bb, (q31_t)0x6f1a9faa, (q31_t)0xc070957b, (q31_t)0x6f1780cf, (q31_t)0xc06b2162,
+  (q31_t)0x6f1461b0, (q31_t)0xc065ad70, (q31_t)0x6f11424c, (q31_t)0xc06039a6, (q31_t)0x6f0e22a3, (q31_t)0xc05ac603, (q31_t)0x6f0b02b6, (q31_t)0xc0555287,
+  (q31_t)0x6f07e285, (q31_t)0xc04fdf32, (q31_t)0x6f04c20f, (q31_t)0xc04a6c05, (q31_t)0x6f01a155, (q31_t)0xc044f8fe, (q31_t)0x6efe8056, (q31_t)0xc03f8620,
+  (q31_t)0x6efb5f12, (q31_t)0xc03a1368, (q31_t)0x6ef83d8a, (q31_t)0xc034a0d8, (q31_t)0x6ef51bbe, (q31_t)0xc02f2e6f, (q31_t)0x6ef1f9ad, (q31_t)0xc029bc2e,
+  (q31_t)0x6eeed758, (q31_t)0xc0244a14, (q31_t)0x6eebb4bf, (q31_t)0xc01ed821, (q31_t)0x6ee891e1, (q31_t)0xc0196656, (q31_t)0x6ee56ebe, (q31_t)0xc013f4b2,
+  (q31_t)0x6ee24b57, (q31_t)0xc00e8336, (q31_t)0x6edf27ac, (q31_t)0xc00911e1, (q31_t)0x6edc03bc, (q31_t)0xc003a0b3, (q31_t)0x6ed8df88, (q31_t)0xbffe2fad,
+  (q31_t)0x6ed5bb10, (q31_t)0xbff8bece, (q31_t)0x6ed29653, (q31_t)0xbff34e17, (q31_t)0x6ecf7152, (q31_t)0xbfeddd88, (q31_t)0x6ecc4c0d, (q31_t)0xbfe86d20,
+  (q31_t)0x6ec92683, (q31_t)0xbfe2fcdf, (q31_t)0x6ec600b5, (q31_t)0xbfdd8cc6, (q31_t)0x6ec2daa2, (q31_t)0xbfd81cd5, (q31_t)0x6ebfb44b, (q31_t)0xbfd2ad0b,
+  (q31_t)0x6ebc8db0, (q31_t)0xbfcd3d69, (q31_t)0x6eb966d1, (q31_t)0xbfc7cdee, (q31_t)0x6eb63fad, (q31_t)0xbfc25e9b, (q31_t)0x6eb31845, (q31_t)0xbfbcef70,
+  (q31_t)0x6eaff099, (q31_t)0xbfb7806c, (q31_t)0x6eacc8a8, (q31_t)0xbfb21190, (q31_t)0x6ea9a073, (q31_t)0xbfaca2dc, (q31_t)0x6ea677fa, (q31_t)0xbfa7344f,
+  (q31_t)0x6ea34f3d, (q31_t)0xbfa1c5ea, (q31_t)0x6ea0263b, (q31_t)0xbf9c57ac, (q31_t)0x6e9cfcf5, (q31_t)0xbf96e997, (q31_t)0x6e99d36b, (q31_t)0xbf917ba9,
+  (q31_t)0x6e96a99d, (q31_t)0xbf8c0de3, (q31_t)0x6e937f8a, (q31_t)0xbf86a044, (q31_t)0x6e905534, (q31_t)0xbf8132ce, (q31_t)0x6e8d2a99, (q31_t)0xbf7bc57f,
+  (q31_t)0x6e89ffb9, (q31_t)0xbf765858, (q31_t)0x6e86d496, (q31_t)0xbf70eb59, (q31_t)0x6e83a92f, (q31_t)0xbf6b7e81, (q31_t)0x6e807d83, (q31_t)0xbf6611d2,
+  (q31_t)0x6e7d5193, (q31_t)0xbf60a54a, (q31_t)0x6e7a255f, (q31_t)0xbf5b38ea, (q31_t)0x6e76f8e7, (q31_t)0xbf55ccb2, (q31_t)0x6e73cc2b, (q31_t)0xbf5060a2,
+  (q31_t)0x6e709f2a, (q31_t)0xbf4af4ba, (q31_t)0x6e6d71e6, (q31_t)0xbf4588fa, (q31_t)0x6e6a445d, (q31_t)0xbf401d61, (q31_t)0x6e671690, (q31_t)0xbf3ab1f1,
+  (q31_t)0x6e63e87f, (q31_t)0xbf3546a8, (q31_t)0x6e60ba2a, (q31_t)0xbf2fdb88, (q31_t)0x6e5d8b91, (q31_t)0xbf2a708f, (q31_t)0x6e5a5cb4, (q31_t)0xbf2505bf,
+  (q31_t)0x6e572d93, (q31_t)0xbf1f9b16, (q31_t)0x6e53fe2e, (q31_t)0xbf1a3096, (q31_t)0x6e50ce84, (q31_t)0xbf14c63d, (q31_t)0x6e4d9e97, (q31_t)0xbf0f5c0d,
+  (q31_t)0x6e4a6e66, (q31_t)0xbf09f205, (q31_t)0x6e473df0, (q31_t)0xbf048824, (q31_t)0x6e440d37, (q31_t)0xbeff1e6c, (q31_t)0x6e40dc39, (q31_t)0xbef9b4dc,
+  (q31_t)0x6e3daaf8, (q31_t)0xbef44b74, (q31_t)0x6e3a7972, (q31_t)0xbeeee234, (q31_t)0x6e3747a9, (q31_t)0xbee9791c, (q31_t)0x6e34159b, (q31_t)0xbee4102d,
+  (q31_t)0x6e30e34a, (q31_t)0xbedea765, (q31_t)0x6e2db0b4, (q31_t)0xbed93ec6, (q31_t)0x6e2a7ddb, (q31_t)0xbed3d64f, (q31_t)0x6e274abe, (q31_t)0xbece6e00,
+  (q31_t)0x6e24175c, (q31_t)0xbec905d9, (q31_t)0x6e20e3b7, (q31_t)0xbec39ddb, (q31_t)0x6e1dafce, (q31_t)0xbebe3605, (q31_t)0x6e1a7ba1, (q31_t)0xbeb8ce57,
+  (q31_t)0x6e174730, (q31_t)0xbeb366d1, (q31_t)0x6e14127b, (q31_t)0xbeadff74, (q31_t)0x6e10dd82, (q31_t)0xbea8983f, (q31_t)0x6e0da845, (q31_t)0xbea33132,
+  (q31_t)0x6e0a72c5, (q31_t)0xbe9dca4e, (q31_t)0x6e073d00, (q31_t)0xbe986391, (q31_t)0x6e0406f8, (q31_t)0xbe92fcfe, (q31_t)0x6e00d0ac, (q31_t)0xbe8d9692,
+  (q31_t)0x6dfd9a1c, (q31_t)0xbe88304f, (q31_t)0x6dfa6348, (q31_t)0xbe82ca35, (q31_t)0x6df72c30, (q31_t)0xbe7d6442, (q31_t)0x6df3f4d4, (q31_t)0xbe77fe78,
+  (q31_t)0x6df0bd35, (q31_t)0xbe7298d7, (q31_t)0x6ded8552, (q31_t)0xbe6d335e, (q31_t)0x6dea4d2b, (q31_t)0xbe67ce0d, (q31_t)0x6de714c0, (q31_t)0xbe6268e5,
+  (q31_t)0x6de3dc11, (q31_t)0xbe5d03e6, (q31_t)0x6de0a31f, (q31_t)0xbe579f0f, (q31_t)0x6ddd69e9, (q31_t)0xbe523a60, (q31_t)0x6dda306f, (q31_t)0xbe4cd5da,
+  (q31_t)0x6dd6f6b1, (q31_t)0xbe47717c, (q31_t)0x6dd3bcaf, (q31_t)0xbe420d47, (q31_t)0x6dd0826a, (q31_t)0xbe3ca93b, (q31_t)0x6dcd47e1, (q31_t)0xbe374557,
+  (q31_t)0x6dca0d14, (q31_t)0xbe31e19b, (q31_t)0x6dc6d204, (q31_t)0xbe2c7e09, (q31_t)0x6dc396b0, (q31_t)0xbe271a9f, (q31_t)0x6dc05b18, (q31_t)0xbe21b75d,
+  (q31_t)0x6dbd1f3c, (q31_t)0xbe1c5444, (q31_t)0x6db9e31d, (q31_t)0xbe16f154, (q31_t)0x6db6a6ba, (q31_t)0xbe118e8c, (q31_t)0x6db36a14, (q31_t)0xbe0c2bed,
+  (q31_t)0x6db02d29, (q31_t)0xbe06c977, (q31_t)0x6daceffb, (q31_t)0xbe01672a, (q31_t)0x6da9b28a, (q31_t)0xbdfc0505, (q31_t)0x6da674d5, (q31_t)0xbdf6a309,
+  (q31_t)0x6da336dc, (q31_t)0xbdf14135, (q31_t)0x6d9ff89f, (q31_t)0xbdebdf8b, (q31_t)0x6d9cba1f, (q31_t)0xbde67e09, (q31_t)0x6d997b5b, (q31_t)0xbde11cb0,
+  (q31_t)0x6d963c54, (q31_t)0xbddbbb7f, (q31_t)0x6d92fd09, (q31_t)0xbdd65a78, (q31_t)0x6d8fbd7a, (q31_t)0xbdd0f999, (q31_t)0x6d8c7da8, (q31_t)0xbdcb98e3,
+  (q31_t)0x6d893d93, (q31_t)0xbdc63856, (q31_t)0x6d85fd39, (q31_t)0xbdc0d7f2, (q31_t)0x6d82bc9d, (q31_t)0xbdbb77b7, (q31_t)0x6d7f7bbc, (q31_t)0xbdb617a4,
+  (q31_t)0x6d7c3a98, (q31_t)0xbdb0b7bb, (q31_t)0x6d78f931, (q31_t)0xbdab57fa, (q31_t)0x6d75b786, (q31_t)0xbda5f862, (q31_t)0x6d727597, (q31_t)0xbda098f3,
+  (q31_t)0x6d6f3365, (q31_t)0xbd9b39ad, (q31_t)0x6d6bf0f0, (q31_t)0xbd95da91, (q31_t)0x6d68ae37, (q31_t)0xbd907b9d, (q31_t)0x6d656b3a, (q31_t)0xbd8b1cd2,
+  (q31_t)0x6d6227fa, (q31_t)0xbd85be30, (q31_t)0x6d5ee477, (q31_t)0xbd805fb7, (q31_t)0x6d5ba0b0, (q31_t)0xbd7b0167, (q31_t)0x6d585ca6, (q31_t)0xbd75a340,
+  (q31_t)0x6d551858, (q31_t)0xbd704542, (q31_t)0x6d51d3c6, (q31_t)0xbd6ae76d, (q31_t)0x6d4e8ef2, (q31_t)0xbd6589c1, (q31_t)0x6d4b49da, (q31_t)0xbd602c3f,
+  (q31_t)0x6d48047e, (q31_t)0xbd5acee5, (q31_t)0x6d44bedf, (q31_t)0xbd5571b5, (q31_t)0x6d4178fd, (q31_t)0xbd5014ad, (q31_t)0x6d3e32d7, (q31_t)0xbd4ab7cf,
+  (q31_t)0x6d3aec6e, (q31_t)0xbd455b1a, (q31_t)0x6d37a5c1, (q31_t)0xbd3ffe8e, (q31_t)0x6d345ed1, (q31_t)0xbd3aa22c, (q31_t)0x6d31179e, (q31_t)0xbd3545f2,
+  (q31_t)0x6d2dd027, (q31_t)0xbd2fe9e2, (q31_t)0x6d2a886e, (q31_t)0xbd2a8dfb, (q31_t)0x6d274070, (q31_t)0xbd25323d, (q31_t)0x6d23f830, (q31_t)0xbd1fd6a8,
+  (q31_t)0x6d20afac, (q31_t)0xbd1a7b3d, (q31_t)0x6d1d66e4, (q31_t)0xbd151ffb, (q31_t)0x6d1a1dda, (q31_t)0xbd0fc4e2, (q31_t)0x6d16d48c, (q31_t)0xbd0a69f2,
+  (q31_t)0x6d138afb, (q31_t)0xbd050f2c, (q31_t)0x6d104126, (q31_t)0xbcffb48f, (q31_t)0x6d0cf70f, (q31_t)0xbcfa5a1b, (q31_t)0x6d09acb4, (q31_t)0xbcf4ffd1,
+  (q31_t)0x6d066215, (q31_t)0xbcefa5b0, (q31_t)0x6d031734, (q31_t)0xbcea4bb9, (q31_t)0x6cffcc0f, (q31_t)0xbce4f1eb, (q31_t)0x6cfc80a7, (q31_t)0xbcdf9846,
+  (q31_t)0x6cf934fc, (q31_t)0xbcda3ecb, (q31_t)0x6cf5e90d, (q31_t)0xbcd4e579, (q31_t)0x6cf29cdc, (q31_t)0xbccf8c50, (q31_t)0x6cef5067, (q31_t)0xbcca3351,
+  (q31_t)0x6cec03af, (q31_t)0xbcc4da7b, (q31_t)0x6ce8b6b4, (q31_t)0xbcbf81cf, (q31_t)0x6ce56975, (q31_t)0xbcba294d, (q31_t)0x6ce21bf4, (q31_t)0xbcb4d0f4,
+  (q31_t)0x6cdece2f, (q31_t)0xbcaf78c4, (q31_t)0x6cdb8027, (q31_t)0xbcaa20be, (q31_t)0x6cd831dc, (q31_t)0xbca4c8e1, (q31_t)0x6cd4e34e, (q31_t)0xbc9f712e,
+  (q31_t)0x6cd1947c, (q31_t)0xbc9a19a5, (q31_t)0x6cce4568, (q31_t)0xbc94c245, (q31_t)0x6ccaf610, (q31_t)0xbc8f6b0f, (q31_t)0x6cc7a676, (q31_t)0xbc8a1402,
+  (q31_t)0x6cc45698, (q31_t)0xbc84bd1f, (q31_t)0x6cc10677, (q31_t)0xbc7f6665, (q31_t)0x6cbdb613, (q31_t)0xbc7a0fd6, (q31_t)0x6cba656c, (q31_t)0xbc74b96f,
+  (q31_t)0x6cb71482, (q31_t)0xbc6f6333, (q31_t)0x6cb3c355, (q31_t)0xbc6a0d20, (q31_t)0x6cb071e4, (q31_t)0xbc64b737, (q31_t)0x6cad2031, (q31_t)0xbc5f6177,
+  (q31_t)0x6ca9ce3b, (q31_t)0xbc5a0be2, (q31_t)0x6ca67c01, (q31_t)0xbc54b676, (q31_t)0x6ca32985, (q31_t)0xbc4f6134, (q31_t)0x6c9fd6c6, (q31_t)0xbc4a0c1b,
+  (q31_t)0x6c9c83c3, (q31_t)0xbc44b72c, (q31_t)0x6c99307e, (q31_t)0xbc3f6267, (q31_t)0x6c95dcf6, (q31_t)0xbc3a0dcc, (q31_t)0x6c92892a, (q31_t)0xbc34b95b,
+  (q31_t)0x6c8f351c, (q31_t)0xbc2f6513, (q31_t)0x6c8be0cb, (q31_t)0xbc2a10f6, (q31_t)0x6c888c36, (q31_t)0xbc24bd02, (q31_t)0x6c85375f, (q31_t)0xbc1f6938,
+  (q31_t)0x6c81e245, (q31_t)0xbc1a1598, (q31_t)0x6c7e8ce8, (q31_t)0xbc14c221, (q31_t)0x6c7b3748, (q31_t)0xbc0f6ed5, (q31_t)0x6c77e165, (q31_t)0xbc0a1bb3,
+  (q31_t)0x6c748b3f, (q31_t)0xbc04c8ba, (q31_t)0x6c7134d7, (q31_t)0xbbff75ec, (q31_t)0x6c6dde2b, (q31_t)0xbbfa2347, (q31_t)0x6c6a873d, (q31_t)0xbbf4d0cc,
+  (q31_t)0x6c67300b, (q31_t)0xbbef7e7c, (q31_t)0x6c63d897, (q31_t)0xbbea2c55, (q31_t)0x6c6080e0, (q31_t)0xbbe4da58, (q31_t)0x6c5d28e6, (q31_t)0xbbdf8885,
+  (q31_t)0x6c59d0a9, (q31_t)0xbbda36dd, (q31_t)0x6c56782a, (q31_t)0xbbd4e55e, (q31_t)0x6c531f67, (q31_t)0xbbcf940a, (q31_t)0x6c4fc662, (q31_t)0xbbca42df,
+  (q31_t)0x6c4c6d1a, (q31_t)0xbbc4f1df, (q31_t)0x6c49138f, (q31_t)0xbbbfa108, (q31_t)0x6c45b9c1, (q31_t)0xbbba505c, (q31_t)0x6c425fb1, (q31_t)0xbbb4ffda,
+  (q31_t)0x6c3f055d, (q31_t)0xbbafaf82, (q31_t)0x6c3baac7, (q31_t)0xbbaa5f54, (q31_t)0x6c384fef, (q31_t)0xbba50f50, (q31_t)0x6c34f4d3, (q31_t)0xbb9fbf77,
+  (q31_t)0x6c319975, (q31_t)0xbb9a6fc7, (q31_t)0x6c2e3dd4, (q31_t)0xbb952042, (q31_t)0x6c2ae1f0, (q31_t)0xbb8fd0e7, (q31_t)0x6c2785ca, (q31_t)0xbb8a81b6,
+  (q31_t)0x6c242960, (q31_t)0xbb8532b0, (q31_t)0x6c20ccb4, (q31_t)0xbb7fe3d3, (q31_t)0x6c1d6fc6, (q31_t)0xbb7a9521, (q31_t)0x6c1a1295, (q31_t)0xbb754699,
+  (q31_t)0x6c16b521, (q31_t)0xbb6ff83c, (q31_t)0x6c13576a, (q31_t)0xbb6aaa09, (q31_t)0x6c0ff971, (q31_t)0xbb655c00, (q31_t)0x6c0c9b35, (q31_t)0xbb600e21,
+  (q31_t)0x6c093cb6, (q31_t)0xbb5ac06d, (q31_t)0x6c05ddf5, (q31_t)0xbb5572e3, (q31_t)0x6c027ef1, (q31_t)0xbb502583, (q31_t)0x6bff1faa, (q31_t)0xbb4ad84e,
+  (q31_t)0x6bfbc021, (q31_t)0xbb458b43, (q31_t)0x6bf86055, (q31_t)0xbb403e63, (q31_t)0x6bf50047, (q31_t)0xbb3af1ad, (q31_t)0x6bf19ff6, (q31_t)0xbb35a521,
+  (q31_t)0x6bee3f62, (q31_t)0xbb3058c0, (q31_t)0x6beade8c, (q31_t)0xbb2b0c8a, (q31_t)0x6be77d74, (q31_t)0xbb25c07d, (q31_t)0x6be41c18, (q31_t)0xbb20749c,
+  (q31_t)0x6be0ba7b, (q31_t)0xbb1b28e4, (q31_t)0x6bdd589a, (q31_t)0xbb15dd57, (q31_t)0x6bd9f677, (q31_t)0xbb1091f5, (q31_t)0x6bd69412, (q31_t)0xbb0b46bd,
+  (q31_t)0x6bd3316a, (q31_t)0xbb05fbb0, (q31_t)0x6bcfce80, (q31_t)0xbb00b0ce, (q31_t)0x6bcc6b53, (q31_t)0xbafb6615, (q31_t)0x6bc907e3, (q31_t)0xbaf61b88,
+  (q31_t)0x6bc5a431, (q31_t)0xbaf0d125, (q31_t)0x6bc2403d, (q31_t)0xbaeb86ed, (q31_t)0x6bbedc06, (q31_t)0xbae63cdf, (q31_t)0x6bbb778d, (q31_t)0xbae0f2fc,
+  (q31_t)0x6bb812d1, (q31_t)0xbadba943, (q31_t)0x6bb4add3, (q31_t)0xbad65fb5, (q31_t)0x6bb14892, (q31_t)0xbad11652, (q31_t)0x6bade30f, (q31_t)0xbacbcd1a,
+  (q31_t)0x6baa7d49, (q31_t)0xbac6840c, (q31_t)0x6ba71741, (q31_t)0xbac13b29, (q31_t)0x6ba3b0f7, (q31_t)0xbabbf270, (q31_t)0x6ba04a6a, (q31_t)0xbab6a9e3,
+  (q31_t)0x6b9ce39b, (q31_t)0xbab16180, (q31_t)0x6b997c8a, (q31_t)0xbaac1948, (q31_t)0x6b961536, (q31_t)0xbaa6d13a, (q31_t)0x6b92ada0, (q31_t)0xbaa18958,
+  (q31_t)0x6b8f45c7, (q31_t)0xba9c41a0, (q31_t)0x6b8bddac, (q31_t)0xba96fa13, (q31_t)0x6b88754f, (q31_t)0xba91b2b1, (q31_t)0x6b850caf, (q31_t)0xba8c6b79,
+  (q31_t)0x6b81a3cd, (q31_t)0xba87246d, (q31_t)0x6b7e3aa9, (q31_t)0xba81dd8b, (q31_t)0x6b7ad142, (q31_t)0xba7c96d4, (q31_t)0x6b776799, (q31_t)0xba775048,
+  (q31_t)0x6b73fdae, (q31_t)0xba7209e7, (q31_t)0x6b709381, (q31_t)0xba6cc3b1, (q31_t)0x6b6d2911, (q31_t)0xba677da6, (q31_t)0x6b69be5f, (q31_t)0xba6237c5,
+  (q31_t)0x6b66536b, (q31_t)0xba5cf210, (q31_t)0x6b62e834, (q31_t)0xba57ac86, (q31_t)0x6b5f7cbc, (q31_t)0xba526726, (q31_t)0x6b5c1101, (q31_t)0xba4d21f2,
+  (q31_t)0x6b58a503, (q31_t)0xba47dce8, (q31_t)0x6b5538c4, (q31_t)0xba42980a, (q31_t)0x6b51cc42, (q31_t)0xba3d5356, (q31_t)0x6b4e5f7f, (q31_t)0xba380ece,
+  (q31_t)0x6b4af279, (q31_t)0xba32ca71, (q31_t)0x6b478530, (q31_t)0xba2d863e, (q31_t)0x6b4417a6, (q31_t)0xba284237, (q31_t)0x6b40a9d9, (q31_t)0xba22fe5b,
+  (q31_t)0x6b3d3bcb, (q31_t)0xba1dbaaa, (q31_t)0x6b39cd7a, (q31_t)0xba187724, (q31_t)0x6b365ee7, (q31_t)0xba1333c9, (q31_t)0x6b32f012, (q31_t)0xba0df099,
+  (q31_t)0x6b2f80fb, (q31_t)0xba08ad95, (q31_t)0x6b2c11a1, (q31_t)0xba036abb, (q31_t)0x6b28a206, (q31_t)0xb9fe280d, (q31_t)0x6b253228, (q31_t)0xb9f8e58a,
+  (q31_t)0x6b21c208, (q31_t)0xb9f3a332, (q31_t)0x6b1e51a7, (q31_t)0xb9ee6106, (q31_t)0x6b1ae103, (q31_t)0xb9e91f04, (q31_t)0x6b17701d, (q31_t)0xb9e3dd2e,
+  (q31_t)0x6b13fef5, (q31_t)0xb9de9b83, (q31_t)0x6b108d8b, (q31_t)0xb9d95a03, (q31_t)0x6b0d1bdf, (q31_t)0xb9d418af, (q31_t)0x6b09a9f1, (q31_t)0xb9ced786,
+  (q31_t)0x6b0637c1, (q31_t)0xb9c99688, (q31_t)0x6b02c54f, (q31_t)0xb9c455b6, (q31_t)0x6aff529a, (q31_t)0xb9bf150e, (q31_t)0x6afbdfa4, (q31_t)0xb9b9d493,
+  (q31_t)0x6af86c6c, (q31_t)0xb9b49442, (q31_t)0x6af4f8f2, (q31_t)0xb9af541d, (q31_t)0x6af18536, (q31_t)0xb9aa1423, (q31_t)0x6aee1138, (q31_t)0xb9a4d455,
+  (q31_t)0x6aea9cf8, (q31_t)0xb99f94b2, (q31_t)0x6ae72876, (q31_t)0xb99a553a, (q31_t)0x6ae3b3b2, (q31_t)0xb99515ee, (q31_t)0x6ae03eac, (q31_t)0xb98fd6cd,
+  (q31_t)0x6adcc964, (q31_t)0xb98a97d8, (q31_t)0x6ad953db, (q31_t)0xb985590e, (q31_t)0x6ad5de0f, (q31_t)0xb9801a70, (q31_t)0x6ad26802, (q31_t)0xb97adbfd,
+  (q31_t)0x6acef1b2, (q31_t)0xb9759db6, (q31_t)0x6acb7b21, (q31_t)0xb9705f9a, (q31_t)0x6ac8044e, (q31_t)0xb96b21aa, (q31_t)0x6ac48d39, (q31_t)0xb965e3e5,
+  (q31_t)0x6ac115e2, (q31_t)0xb960a64c, (q31_t)0x6abd9e49, (q31_t)0xb95b68de, (q31_t)0x6aba266e, (q31_t)0xb9562b9c, (q31_t)0x6ab6ae52, (q31_t)0xb950ee86,
+  (q31_t)0x6ab335f4, (q31_t)0xb94bb19b, (q31_t)0x6aafbd54, (q31_t)0xb94674dc, (q31_t)0x6aac4472, (q31_t)0xb9413848, (q31_t)0x6aa8cb4e, (q31_t)0xb93bfbe0,
+  (q31_t)0x6aa551e9, (q31_t)0xb936bfa4, (q31_t)0x6aa1d841, (q31_t)0xb9318393, (q31_t)0x6a9e5e58, (q31_t)0xb92c47ae, (q31_t)0x6a9ae42e, (q31_t)0xb9270bf5,
+  (q31_t)0x6a9769c1, (q31_t)0xb921d067, (q31_t)0x6a93ef13, (q31_t)0xb91c9505, (q31_t)0x6a907423, (q31_t)0xb91759cf, (q31_t)0x6a8cf8f1, (q31_t)0xb9121ec5,
+  (q31_t)0x6a897d7d, (q31_t)0xb90ce3e6, (q31_t)0x6a8601c8, (q31_t)0xb907a933, (q31_t)0x6a8285d1, (q31_t)0xb9026eac, (q31_t)0x6a7f0999, (q31_t)0xb8fd3451,
+  (q31_t)0x6a7b8d1e, (q31_t)0xb8f7fa21, (q31_t)0x6a781062, (q31_t)0xb8f2c01d, (q31_t)0x6a749365, (q31_t)0xb8ed8646, (q31_t)0x6a711625, (q31_t)0xb8e84c99,
+  (q31_t)0x6a6d98a4, (q31_t)0xb8e31319, (q31_t)0x6a6a1ae2, (q31_t)0xb8ddd9c5, (q31_t)0x6a669cdd, (q31_t)0xb8d8a09d, (q31_t)0x6a631e97, (q31_t)0xb8d367a0,
+  (q31_t)0x6a5fa010, (q31_t)0xb8ce2ecf, (q31_t)0x6a5c2147, (q31_t)0xb8c8f62b, (q31_t)0x6a58a23c, (q31_t)0xb8c3bdb2, (q31_t)0x6a5522ef, (q31_t)0xb8be8565,
+  (q31_t)0x6a51a361, (q31_t)0xb8b94d44, (q31_t)0x6a4e2392, (q31_t)0xb8b4154f, (q31_t)0x6a4aa381, (q31_t)0xb8aedd86, (q31_t)0x6a47232e, (q31_t)0xb8a9a5e9,
+  (q31_t)0x6a43a29a, (q31_t)0xb8a46e78, (q31_t)0x6a4021c4, (q31_t)0xb89f3733, (q31_t)0x6a3ca0ad, (q31_t)0xb89a001a, (q31_t)0x6a391f54, (q31_t)0xb894c92d,
+  (q31_t)0x6a359db9, (q31_t)0xb88f926d, (q31_t)0x6a321bdd, (q31_t)0xb88a5bd8, (q31_t)0x6a2e99c0, (q31_t)0xb885256f, (q31_t)0x6a2b1761, (q31_t)0xb87fef33,
+  (q31_t)0x6a2794c1, (q31_t)0xb87ab922, (q31_t)0x6a2411df, (q31_t)0xb875833e, (q31_t)0x6a208ebb, (q31_t)0xb8704d85, (q31_t)0x6a1d0b57, (q31_t)0xb86b17f9,
+  (q31_t)0x6a1987b0, (q31_t)0xb865e299, (q31_t)0x6a1603c8, (q31_t)0xb860ad66, (q31_t)0x6a127f9f, (q31_t)0xb85b785e, (q31_t)0x6a0efb35, (q31_t)0xb8564383,
+  (q31_t)0x6a0b7689, (q31_t)0xb8510ed4, (q31_t)0x6a07f19b, (q31_t)0xb84bda51, (q31_t)0x6a046c6c, (q31_t)0xb846a5fa, (q31_t)0x6a00e6fc, (q31_t)0xb84171cf,
+  (q31_t)0x69fd614a, (q31_t)0xb83c3dd1, (q31_t)0x69f9db57, (q31_t)0xb83709ff, (q31_t)0x69f65523, (q31_t)0xb831d659, (q31_t)0x69f2cead, (q31_t)0xb82ca2e0,
+  (q31_t)0x69ef47f6, (q31_t)0xb8276f93, (q31_t)0x69ebc0fe, (q31_t)0xb8223c72, (q31_t)0x69e839c4, (q31_t)0xb81d097e, (q31_t)0x69e4b249, (q31_t)0xb817d6b6,
+  (q31_t)0x69e12a8c, (q31_t)0xb812a41a, (q31_t)0x69dda28f, (q31_t)0xb80d71aa, (q31_t)0x69da1a50, (q31_t)0xb8083f67, (q31_t)0x69d691cf, (q31_t)0xb8030d51,
+  (q31_t)0x69d3090e, (q31_t)0xb7fddb67, (q31_t)0x69cf800b, (q31_t)0xb7f8a9a9, (q31_t)0x69cbf6c7, (q31_t)0xb7f37818, (q31_t)0x69c86d41, (q31_t)0xb7ee46b3,
+  (q31_t)0x69c4e37a, (q31_t)0xb7e9157a, (q31_t)0x69c15973, (q31_t)0xb7e3e46e, (q31_t)0x69bdcf29, (q31_t)0xb7deb38f, (q31_t)0x69ba449f, (q31_t)0xb7d982dc,
+  (q31_t)0x69b6b9d3, (q31_t)0xb7d45255, (q31_t)0x69b32ec7, (q31_t)0xb7cf21fb, (q31_t)0x69afa378, (q31_t)0xb7c9f1ce, (q31_t)0x69ac17e9, (q31_t)0xb7c4c1cd,
+  (q31_t)0x69a88c19, (q31_t)0xb7bf91f8, (q31_t)0x69a50007, (q31_t)0xb7ba6251, (q31_t)0x69a173b5, (q31_t)0xb7b532d6, (q31_t)0x699de721, (q31_t)0xb7b00387,
+  (q31_t)0x699a5a4c, (q31_t)0xb7aad465, (q31_t)0x6996cd35, (q31_t)0xb7a5a570, (q31_t)0x69933fde, (q31_t)0xb7a076a7, (q31_t)0x698fb246, (q31_t)0xb79b480b,
+  (q31_t)0x698c246c, (q31_t)0xb796199b, (q31_t)0x69889651, (q31_t)0xb790eb58, (q31_t)0x698507f6, (q31_t)0xb78bbd42, (q31_t)0x69817959, (q31_t)0xb7868f59,
+  (q31_t)0x697dea7b, (q31_t)0xb781619c, (q31_t)0x697a5b5c, (q31_t)0xb77c340c, (q31_t)0x6976cbfc, (q31_t)0xb77706a9, (q31_t)0x69733c5b, (q31_t)0xb771d972,
+  (q31_t)0x696fac78, (q31_t)0xb76cac69, (q31_t)0x696c1c55, (q31_t)0xb7677f8c, (q31_t)0x69688bf1, (q31_t)0xb76252db, (q31_t)0x6964fb4c, (q31_t)0xb75d2658,
+  (q31_t)0x69616a65, (q31_t)0xb757fa01, (q31_t)0x695dd93e, (q31_t)0xb752cdd8, (q31_t)0x695a47d6, (q31_t)0xb74da1db, (q31_t)0x6956b62d, (q31_t)0xb748760b,
+  (q31_t)0x69532442, (q31_t)0xb7434a67, (q31_t)0x694f9217, (q31_t)0xb73e1ef1, (q31_t)0x694bffab, (q31_t)0xb738f3a7, (q31_t)0x69486cfe, (q31_t)0xb733c88b,
+  (q31_t)0x6944da10, (q31_t)0xb72e9d9b, (q31_t)0x694146e1, (q31_t)0xb72972d8, (q31_t)0x693db371, (q31_t)0xb7244842, (q31_t)0x693a1fc0, (q31_t)0xb71f1dd9,
+  (q31_t)0x69368bce, (q31_t)0xb719f39e, (q31_t)0x6932f79b, (q31_t)0xb714c98e, (q31_t)0x692f6328, (q31_t)0xb70f9fac, (q31_t)0x692bce73, (q31_t)0xb70a75f7,
+  (q31_t)0x6928397e, (q31_t)0xb7054c6f, (q31_t)0x6924a448, (q31_t)0xb7002314, (q31_t)0x69210ed1, (q31_t)0xb6faf9e6, (q31_t)0x691d7919, (q31_t)0xb6f5d0e5,
+  (q31_t)0x6919e320, (q31_t)0xb6f0a812, (q31_t)0x69164ce7, (q31_t)0xb6eb7f6b, (q31_t)0x6912b66c, (q31_t)0xb6e656f1, (q31_t)0x690f1fb1, (q31_t)0xb6e12ea4,
+  (q31_t)0x690b88b5, (q31_t)0xb6dc0685, (q31_t)0x6907f178, (q31_t)0xb6d6de92, (q31_t)0x690459fb, (q31_t)0xb6d1b6cd, (q31_t)0x6900c23c, (q31_t)0xb6cc8f35,
+  (q31_t)0x68fd2a3d, (q31_t)0xb6c767ca, (q31_t)0x68f991fd, (q31_t)0xb6c2408c, (q31_t)0x68f5f97d, (q31_t)0xb6bd197c, (q31_t)0x68f260bb, (q31_t)0xb6b7f298,
+  (q31_t)0x68eec7b9, (q31_t)0xb6b2cbe2, (q31_t)0x68eb2e76, (q31_t)0xb6ada559, (q31_t)0x68e794f3, (q31_t)0xb6a87efd, (q31_t)0x68e3fb2e, (q31_t)0xb6a358ce,
+  (q31_t)0x68e06129, (q31_t)0xb69e32cd, (q31_t)0x68dcc6e4, (q31_t)0xb6990cf9, (q31_t)0x68d92c5d, (q31_t)0xb693e752, (q31_t)0x68d59196, (q31_t)0xb68ec1d9,
+  (q31_t)0x68d1f68f, (q31_t)0xb6899c8d, (q31_t)0x68ce5b46, (q31_t)0xb684776e, (q31_t)0x68cabfbd, (q31_t)0xb67f527c, (q31_t)0x68c723f3, (q31_t)0xb67a2db8,
+  (q31_t)0x68c387e9, (q31_t)0xb6750921, (q31_t)0x68bfeb9e, (q31_t)0xb66fe4b8, (q31_t)0x68bc4f13, (q31_t)0xb66ac07c, (q31_t)0x68b8b247, (q31_t)0xb6659c6d,
+  (q31_t)0x68b5153a, (q31_t)0xb660788c, (q31_t)0x68b177ed, (q31_t)0xb65b54d8, (q31_t)0x68adda5f, (q31_t)0xb6563151, (q31_t)0x68aa3c90, (q31_t)0xb6510df8,
+  (q31_t)0x68a69e81, (q31_t)0xb64beacd, (q31_t)0x68a30031, (q31_t)0xb646c7ce, (q31_t)0x689f61a1, (q31_t)0xb641a4fe, (q31_t)0x689bc2d1, (q31_t)0xb63c825b,
+  (q31_t)0x689823bf, (q31_t)0xb6375fe5, (q31_t)0x6894846e, (q31_t)0xb6323d9d, (q31_t)0x6890e4dc, (q31_t)0xb62d1b82, (q31_t)0x688d4509, (q31_t)0xb627f995,
+  (q31_t)0x6889a4f6, (q31_t)0xb622d7d6, (q31_t)0x688604a2, (q31_t)0xb61db644, (q31_t)0x6882640e, (q31_t)0xb61894df, (q31_t)0x687ec339, (q31_t)0xb61373a9,
+  (q31_t)0x687b2224, (q31_t)0xb60e529f, (q31_t)0x687780ce, (q31_t)0xb60931c4, (q31_t)0x6873df38, (q31_t)0xb6041116, (q31_t)0x68703d62, (q31_t)0xb5fef095,
+  (q31_t)0x686c9b4b, (q31_t)0xb5f9d043, (q31_t)0x6868f8f4, (q31_t)0xb5f4b01e, (q31_t)0x6865565c, (q31_t)0xb5ef9026, (q31_t)0x6861b384, (q31_t)0xb5ea705d,
+  (q31_t)0x685e106c, (q31_t)0xb5e550c1, (q31_t)0x685a6d13, (q31_t)0xb5e03153, (q31_t)0x6856c979, (q31_t)0xb5db1212, (q31_t)0x685325a0, (q31_t)0xb5d5f2ff,
+  (q31_t)0x684f8186, (q31_t)0xb5d0d41a, (q31_t)0x684bdd2c, (q31_t)0xb5cbb563, (q31_t)0x68483891, (q31_t)0xb5c696da, (q31_t)0x684493b6, (q31_t)0xb5c1787e,
+  (q31_t)0x6840ee9b, (q31_t)0xb5bc5a50, (q31_t)0x683d493f, (q31_t)0xb5b73c50, (q31_t)0x6839a3a4, (q31_t)0xb5b21e7e, (q31_t)0x6835fdc7, (q31_t)0xb5ad00d9,
+  (q31_t)0x683257ab, (q31_t)0xb5a7e362, (q31_t)0x682eb14e, (q31_t)0xb5a2c61a, (q31_t)0x682b0ab1, (q31_t)0xb59da8ff, (q31_t)0x682763d4, (q31_t)0xb5988c12,
+  (q31_t)0x6823bcb7, (q31_t)0xb5936f53, (q31_t)0x68201559, (q31_t)0xb58e52c2, (q31_t)0x681c6dbb, (q31_t)0xb589365e, (q31_t)0x6818c5dd, (q31_t)0xb5841a29,
+  (q31_t)0x68151dbe, (q31_t)0xb57efe22, (q31_t)0x68117560, (q31_t)0xb579e248, (q31_t)0x680dccc1, (q31_t)0xb574c69d, (q31_t)0x680a23e2, (q31_t)0xb56fab1f,
+  (q31_t)0x68067ac3, (q31_t)0xb56a8fd0, (q31_t)0x6802d164, (q31_t)0xb56574ae, (q31_t)0x67ff27c4, (q31_t)0xb56059bb, (q31_t)0x67fb7de5, (q31_t)0xb55b3ef5,
+  (q31_t)0x67f7d3c5, (q31_t)0xb556245e, (q31_t)0x67f42965, (q31_t)0xb55109f5, (q31_t)0x67f07ec5, (q31_t)0xb54befba, (q31_t)0x67ecd3e5, (q31_t)0xb546d5ac,
+  (q31_t)0x67e928c5, (q31_t)0xb541bbcd, (q31_t)0x67e57d64, (q31_t)0xb53ca21c, (q31_t)0x67e1d1c4, (q31_t)0xb5378899, (q31_t)0x67de25e3, (q31_t)0xb5326f45,
+  (q31_t)0x67da79c3, (q31_t)0xb52d561e, (q31_t)0x67d6cd62, (q31_t)0xb5283d26, (q31_t)0x67d320c1, (q31_t)0xb523245b, (q31_t)0x67cf73e1, (q31_t)0xb51e0bbf,
+  (q31_t)0x67cbc6c0, (q31_t)0xb518f351, (q31_t)0x67c8195f, (q31_t)0xb513db12, (q31_t)0x67c46bbe, (q31_t)0xb50ec300, (q31_t)0x67c0bddd, (q31_t)0xb509ab1d,
+  (q31_t)0x67bd0fbd, (q31_t)0xb5049368, (q31_t)0x67b9615c, (q31_t)0xb4ff7be1, (q31_t)0x67b5b2bb, (q31_t)0xb4fa6489, (q31_t)0x67b203da, (q31_t)0xb4f54d5f,
+  (q31_t)0x67ae54ba, (q31_t)0xb4f03663, (q31_t)0x67aaa559, (q31_t)0xb4eb1f95, (q31_t)0x67a6f5b8, (q31_t)0xb4e608f6, (q31_t)0x67a345d8, (q31_t)0xb4e0f285,
+  (q31_t)0x679f95b7, (q31_t)0xb4dbdc42, (q31_t)0x679be557, (q31_t)0xb4d6c62e, (q31_t)0x679834b6, (q31_t)0xb4d1b048, (q31_t)0x679483d6, (q31_t)0xb4cc9a90,
+  (q31_t)0x6790d2b6, (q31_t)0xb4c78507, (q31_t)0x678d2156, (q31_t)0xb4c26fad, (q31_t)0x67896fb6, (q31_t)0xb4bd5a80, (q31_t)0x6785bdd6, (q31_t)0xb4b84582,
+  (q31_t)0x67820bb7, (q31_t)0xb4b330b3, (q31_t)0x677e5957, (q31_t)0xb4ae1c12, (q31_t)0x677aa6b8, (q31_t)0xb4a9079f, (q31_t)0x6776f3d9, (q31_t)0xb4a3f35b,
+  (q31_t)0x677340ba, (q31_t)0xb49edf45, (q31_t)0x676f8d5b, (q31_t)0xb499cb5e, (q31_t)0x676bd9bd, (q31_t)0xb494b7a6, (q31_t)0x676825de, (q31_t)0xb48fa41c,
+  (q31_t)0x676471c0, (q31_t)0xb48a90c0, (q31_t)0x6760bd62, (q31_t)0xb4857d93, (q31_t)0x675d08c4, (q31_t)0xb4806a95, (q31_t)0x675953e7, (q31_t)0xb47b57c5,
+  (q31_t)0x67559eca, (q31_t)0xb4764523, (q31_t)0x6751e96d, (q31_t)0xb47132b1, (q31_t)0x674e33d0, (q31_t)0xb46c206d, (q31_t)0x674a7df4, (q31_t)0xb4670e57,
+  (q31_t)0x6746c7d8, (q31_t)0xb461fc70, (q31_t)0x6743117c, (q31_t)0xb45ceab8, (q31_t)0x673f5ae0, (q31_t)0xb457d92f, (q31_t)0x673ba405, (q31_t)0xb452c7d4,
+  (q31_t)0x6737ecea, (q31_t)0xb44db6a8, (q31_t)0x67343590, (q31_t)0xb448a5aa, (q31_t)0x67307df5, (q31_t)0xb44394db, (q31_t)0x672cc61c, (q31_t)0xb43e843b,
+  (q31_t)0x67290e02, (q31_t)0xb43973ca, (q31_t)0x672555a9, (q31_t)0xb4346387, (q31_t)0x67219d10, (q31_t)0xb42f5373, (q31_t)0x671de438, (q31_t)0xb42a438e,
+  (q31_t)0x671a2b20, (q31_t)0xb42533d8, (q31_t)0x671671c8, (q31_t)0xb4202451, (q31_t)0x6712b831, (q31_t)0xb41b14f8, (q31_t)0x670efe5a, (q31_t)0xb41605ce,
+  (q31_t)0x670b4444, (q31_t)0xb410f6d3, (q31_t)0x670789ee, (q31_t)0xb40be807, (q31_t)0x6703cf58, (q31_t)0xb406d969, (q31_t)0x67001483, (q31_t)0xb401cafb,
+  (q31_t)0x66fc596f, (q31_t)0xb3fcbcbb, (q31_t)0x66f89e1b, (q31_t)0xb3f7aeaa, (q31_t)0x66f4e287, (q31_t)0xb3f2a0c9, (q31_t)0x66f126b4, (q31_t)0xb3ed9316,
+  (q31_t)0x66ed6aa1, (q31_t)0xb3e88592, (q31_t)0x66e9ae4f, (q31_t)0xb3e3783d, (q31_t)0x66e5f1be, (q31_t)0xb3de6b17, (q31_t)0x66e234ed, (q31_t)0xb3d95e1f,
+  (q31_t)0x66de77dc, (q31_t)0xb3d45157, (q31_t)0x66daba8c, (q31_t)0xb3cf44be, (q31_t)0x66d6fcfd, (q31_t)0xb3ca3854, (q31_t)0x66d33f2e, (q31_t)0xb3c52c19,
+  (q31_t)0x66cf8120, (q31_t)0xb3c0200c, (q31_t)0x66cbc2d2, (q31_t)0xb3bb142f, (q31_t)0x66c80445, (q31_t)0xb3b60881, (q31_t)0x66c44579, (q31_t)0xb3b0fd02,
+  (q31_t)0x66c0866d, (q31_t)0xb3abf1b2, (q31_t)0x66bcc721, (q31_t)0xb3a6e691, (q31_t)0x66b90797, (q31_t)0xb3a1dba0, (q31_t)0x66b547cd, (q31_t)0xb39cd0dd,
+  (q31_t)0x66b187c3, (q31_t)0xb397c649, (q31_t)0x66adc77b, (q31_t)0xb392bbe5, (q31_t)0x66aa06f3, (q31_t)0xb38db1b0, (q31_t)0x66a6462b, (q31_t)0xb388a7aa,
+  (q31_t)0x66a28524, (q31_t)0xb3839dd3, (q31_t)0x669ec3de, (q31_t)0xb37e942b, (q31_t)0x669b0259, (q31_t)0xb3798ab2, (q31_t)0x66974095, (q31_t)0xb3748169,
+  (q31_t)0x66937e91, (q31_t)0xb36f784f, (q31_t)0x668fbc4e, (q31_t)0xb36a6f64, (q31_t)0x668bf9cb, (q31_t)0xb36566a8, (q31_t)0x66883709, (q31_t)0xb3605e1c,
+  (q31_t)0x66847408, (q31_t)0xb35b55bf, (q31_t)0x6680b0c8, (q31_t)0xb3564d91, (q31_t)0x667ced49, (q31_t)0xb3514592, (q31_t)0x6679298a, (q31_t)0xb34c3dc3,
+  (q31_t)0x6675658c, (q31_t)0xb3473623, (q31_t)0x6671a14f, (q31_t)0xb3422eb2, (q31_t)0x666ddcd3, (q31_t)0xb33d2771, (q31_t)0x666a1818, (q31_t)0xb338205f,
+  (q31_t)0x6666531d, (q31_t)0xb333197c, (q31_t)0x66628de4, (q31_t)0xb32e12c9, (q31_t)0x665ec86b, (q31_t)0xb3290c45, (q31_t)0x665b02b3, (q31_t)0xb32405f1,
+  (q31_t)0x66573cbb, (q31_t)0xb31effcc, (q31_t)0x66537685, (q31_t)0xb319f9d6, (q31_t)0x664fb010, (q31_t)0xb314f410, (q31_t)0x664be95b, (q31_t)0xb30fee79,
+  (q31_t)0x66482267, (q31_t)0xb30ae912, (q31_t)0x66445b35, (q31_t)0xb305e3da, (q31_t)0x664093c3, (q31_t)0xb300ded2, (q31_t)0x663ccc12, (q31_t)0xb2fbd9f9,
+  (q31_t)0x66390422, (q31_t)0xb2f6d550, (q31_t)0x66353bf3, (q31_t)0xb2f1d0d6, (q31_t)0x66317385, (q31_t)0xb2eccc8c, (q31_t)0x662daad8, (q31_t)0xb2e7c871,
+  (q31_t)0x6629e1ec, (q31_t)0xb2e2c486, (q31_t)0x662618c1, (q31_t)0xb2ddc0ca, (q31_t)0x66224f56, (q31_t)0xb2d8bd3e, (q31_t)0x661e85ad, (q31_t)0xb2d3b9e2,
+  (q31_t)0x661abbc5, (q31_t)0xb2ceb6b5, (q31_t)0x6616f19e, (q31_t)0xb2c9b3b8, (q31_t)0x66132738, (q31_t)0xb2c4b0ea, (q31_t)0x660f5c93, (q31_t)0xb2bfae4c,
+  (q31_t)0x660b91af, (q31_t)0xb2baabde, (q31_t)0x6607c68c, (q31_t)0xb2b5a99f, (q31_t)0x6603fb2a, (q31_t)0xb2b0a790, (q31_t)0x66002f89, (q31_t)0xb2aba5b1,
+  (q31_t)0x65fc63a9, (q31_t)0xb2a6a402, (q31_t)0x65f8978b, (q31_t)0xb2a1a282, (q31_t)0x65f4cb2d, (q31_t)0xb29ca132, (q31_t)0x65f0fe91, (q31_t)0xb297a011,
+  (q31_t)0x65ed31b5, (q31_t)0xb2929f21, (q31_t)0x65e9649b, (q31_t)0xb28d9e60, (q31_t)0x65e59742, (q31_t)0xb2889dcf, (q31_t)0x65e1c9aa, (q31_t)0xb2839d6d,
+  (q31_t)0x65ddfbd3, (q31_t)0xb27e9d3c, (q31_t)0x65da2dbd, (q31_t)0xb2799d3a, (q31_t)0x65d65f69, (q31_t)0xb2749d68, (q31_t)0x65d290d6, (q31_t)0xb26f9dc6,
+  (q31_t)0x65cec204, (q31_t)0xb26a9e54, (q31_t)0x65caf2f3, (q31_t)0xb2659f12, (q31_t)0x65c723a3, (q31_t)0xb2609fff, (q31_t)0x65c35415, (q31_t)0xb25ba11d,
+  (q31_t)0x65bf8447, (q31_t)0xb256a26a, (q31_t)0x65bbb43b, (q31_t)0xb251a3e7, (q31_t)0x65b7e3f1, (q31_t)0xb24ca594, (q31_t)0x65b41367, (q31_t)0xb247a771,
+  (q31_t)0x65b0429f, (q31_t)0xb242a97e, (q31_t)0x65ac7198, (q31_t)0xb23dabbb, (q31_t)0x65a8a052, (q31_t)0xb238ae28, (q31_t)0x65a4cece, (q31_t)0xb233b0c5,
+  (q31_t)0x65a0fd0b, (q31_t)0xb22eb392, (q31_t)0x659d2b09, (q31_t)0xb229b68f, (q31_t)0x659958c9, (q31_t)0xb224b9bc, (q31_t)0x6595864a, (q31_t)0xb21fbd19,
+  (q31_t)0x6591b38c, (q31_t)0xb21ac0a6, (q31_t)0x658de08f, (q31_t)0xb215c463, (q31_t)0x658a0d54, (q31_t)0xb210c850, (q31_t)0x658639db, (q31_t)0xb20bcc6d,
+  (q31_t)0x65826622, (q31_t)0xb206d0ba, (q31_t)0x657e922b, (q31_t)0xb201d537, (q31_t)0x657abdf6, (q31_t)0xb1fcd9e5, (q31_t)0x6576e982, (q31_t)0xb1f7dec2,
+  (q31_t)0x657314cf, (q31_t)0xb1f2e3d0, (q31_t)0x656f3fde, (q31_t)0xb1ede90e, (q31_t)0x656b6aae, (q31_t)0xb1e8ee7c, (q31_t)0x6567953f, (q31_t)0xb1e3f41a,
+  (q31_t)0x6563bf92, (q31_t)0xb1def9e9, (q31_t)0x655fe9a7, (q31_t)0xb1d9ffe7, (q31_t)0x655c137d, (q31_t)0xb1d50616, (q31_t)0x65583d14, (q31_t)0xb1d00c75,
+  (q31_t)0x6554666d, (q31_t)0xb1cb1304, (q31_t)0x65508f87, (q31_t)0xb1c619c3, (q31_t)0x654cb863, (q31_t)0xb1c120b3, (q31_t)0x6548e101, (q31_t)0xb1bc27d3,
+  (q31_t)0x6545095f, (q31_t)0xb1b72f23, (q31_t)0x65413180, (q31_t)0xb1b236a4, (q31_t)0x653d5962, (q31_t)0xb1ad3e55, (q31_t)0x65398105, (q31_t)0xb1a84636,
+  (q31_t)0x6535a86b, (q31_t)0xb1a34e47, (q31_t)0x6531cf91, (q31_t)0xb19e5689, (q31_t)0x652df679, (q31_t)0xb1995efb, (q31_t)0x652a1d23, (q31_t)0xb194679e,
+  (q31_t)0x6526438f, (q31_t)0xb18f7071, (q31_t)0x652269bc, (q31_t)0xb18a7974, (q31_t)0x651e8faa, (q31_t)0xb18582a8, (q31_t)0x651ab55b, (q31_t)0xb1808c0c,
+  (q31_t)0x6516dacd, (q31_t)0xb17b95a0, (q31_t)0x65130000, (q31_t)0xb1769f65, (q31_t)0x650f24f5, (q31_t)0xb171a95b, (q31_t)0x650b49ac, (q31_t)0xb16cb380,
+  (q31_t)0x65076e25, (q31_t)0xb167bdd7, (q31_t)0x6503925f, (q31_t)0xb162c85d, (q31_t)0x64ffb65b, (q31_t)0xb15dd315, (q31_t)0x64fbda18, (q31_t)0xb158ddfd,
+  (q31_t)0x64f7fd98, (q31_t)0xb153e915, (q31_t)0x64f420d9, (q31_t)0xb14ef45e, (q31_t)0x64f043dc, (q31_t)0xb149ffd7, (q31_t)0x64ec66a0, (q31_t)0xb1450b81,
+  (q31_t)0x64e88926, (q31_t)0xb140175b, (q31_t)0x64e4ab6e, (q31_t)0xb13b2367, (q31_t)0x64e0cd78, (q31_t)0xb1362fa2, (q31_t)0x64dcef44, (q31_t)0xb1313c0e,
+  (q31_t)0x64d910d1, (q31_t)0xb12c48ab, (q31_t)0x64d53220, (q31_t)0xb1275579, (q31_t)0x64d15331, (q31_t)0xb1226277, (q31_t)0x64cd7404, (q31_t)0xb11d6fa6,
+  (q31_t)0x64c99498, (q31_t)0xb1187d05, (q31_t)0x64c5b4ef, (q31_t)0xb1138a95, (q31_t)0x64c1d507, (q31_t)0xb10e9856, (q31_t)0x64bdf4e1, (q31_t)0xb109a648,
+  (q31_t)0x64ba147d, (q31_t)0xb104b46a, (q31_t)0x64b633da, (q31_t)0xb0ffc2bd, (q31_t)0x64b252fa, (q31_t)0xb0fad140, (q31_t)0x64ae71dc, (q31_t)0xb0f5dff5,
+  (q31_t)0x64aa907f, (q31_t)0xb0f0eeda, (q31_t)0x64a6aee4, (q31_t)0xb0ebfdf0, (q31_t)0x64a2cd0c, (q31_t)0xb0e70d37, (q31_t)0x649eeaf5, (q31_t)0xb0e21cae,
+  (q31_t)0x649b08a0, (q31_t)0xb0dd2c56, (q31_t)0x6497260d, (q31_t)0xb0d83c2f, (q31_t)0x6493433c, (q31_t)0xb0d34c39, (q31_t)0x648f602d, (q31_t)0xb0ce5c74,
+  (q31_t)0x648b7ce0, (q31_t)0xb0c96ce0, (q31_t)0x64879955, (q31_t)0xb0c47d7c, (q31_t)0x6483b58c, (q31_t)0xb0bf8e4a, (q31_t)0x647fd185, (q31_t)0xb0ba9f48,
+  (q31_t)0x647bed3f, (q31_t)0xb0b5b077, (q31_t)0x647808bc, (q31_t)0xb0b0c1d7, (q31_t)0x647423fb, (q31_t)0xb0abd368, (q31_t)0x64703efc, (q31_t)0xb0a6e52a,
+  (q31_t)0x646c59bf, (q31_t)0xb0a1f71d, (q31_t)0x64687444, (q31_t)0xb09d0941, (q31_t)0x64648e8c, (q31_t)0xb0981b96, (q31_t)0x6460a895, (q31_t)0xb0932e1b,
+  (q31_t)0x645cc260, (q31_t)0xb08e40d2, (q31_t)0x6458dbed, (q31_t)0xb08953ba, (q31_t)0x6454f53d, (q31_t)0xb08466d3, (q31_t)0x64510e4e, (q31_t)0xb07f7a1c,
+  (q31_t)0x644d2722, (q31_t)0xb07a8d97, (q31_t)0x64493fb8, (q31_t)0xb075a143, (q31_t)0x64455810, (q31_t)0xb070b520, (q31_t)0x6441702a, (q31_t)0xb06bc92e,
+  (q31_t)0x643d8806, (q31_t)0xb066dd6d, (q31_t)0x64399fa5, (q31_t)0xb061f1de, (q31_t)0x6435b706, (q31_t)0xb05d067f, (q31_t)0x6431ce28, (q31_t)0xb0581b51,
+  (q31_t)0x642de50d, (q31_t)0xb0533055, (q31_t)0x6429fbb5, (q31_t)0xb04e458a, (q31_t)0x6426121e, (q31_t)0xb0495af0, (q31_t)0x6422284a, (q31_t)0xb0447087,
+  (q31_t)0x641e3e38, (q31_t)0xb03f864f, (q31_t)0x641a53e8, (q31_t)0xb03a9c49, (q31_t)0x6416695a, (q31_t)0xb035b273, (q31_t)0x64127e8f, (q31_t)0xb030c8cf,
+  (q31_t)0x640e9386, (q31_t)0xb02bdf5c, (q31_t)0x640aa83f, (q31_t)0xb026f61b, (q31_t)0x6406bcba, (q31_t)0xb0220d0a, (q31_t)0x6402d0f8, (q31_t)0xb01d242b,
+  (q31_t)0x63fee4f8, (q31_t)0xb0183b7d, (q31_t)0x63faf8bb, (q31_t)0xb0135301, (q31_t)0x63f70c3f, (q31_t)0xb00e6ab5, (q31_t)0x63f31f86, (q31_t)0xb009829c,
+  (q31_t)0x63ef3290, (q31_t)0xb0049ab3, (q31_t)0x63eb455c, (q31_t)0xafffb2fc, (q31_t)0x63e757ea, (q31_t)0xaffacb76, (q31_t)0x63e36a3a, (q31_t)0xaff5e421,
+  (q31_t)0x63df7c4d, (q31_t)0xaff0fcfe, (q31_t)0x63db8e22, (q31_t)0xafec160c, (q31_t)0x63d79fba, (q31_t)0xafe72f4c, (q31_t)0x63d3b114, (q31_t)0xafe248bd,
+  (q31_t)0x63cfc231, (q31_t)0xafdd625f, (q31_t)0x63cbd310, (q31_t)0xafd87c33, (q31_t)0x63c7e3b1, (q31_t)0xafd39638, (q31_t)0x63c3f415, (q31_t)0xafceb06f,
+  (q31_t)0x63c0043b, (q31_t)0xafc9cad7, (q31_t)0x63bc1424, (q31_t)0xafc4e571, (q31_t)0x63b823cf, (q31_t)0xafc0003c, (q31_t)0x63b4333d, (q31_t)0xafbb1b39,
+  (q31_t)0x63b0426d, (q31_t)0xafb63667, (q31_t)0x63ac5160, (q31_t)0xafb151c7, (q31_t)0x63a86015, (q31_t)0xafac6d58, (q31_t)0x63a46e8d, (q31_t)0xafa7891b,
+  (q31_t)0x63a07cc7, (q31_t)0xafa2a50f, (q31_t)0x639c8ac4, (q31_t)0xaf9dc135, (q31_t)0x63989884, (q31_t)0xaf98dd8d, (q31_t)0x6394a606, (q31_t)0xaf93fa16,
+  (q31_t)0x6390b34a, (q31_t)0xaf8f16d1, (q31_t)0x638cc051, (q31_t)0xaf8a33bd, (q31_t)0x6388cd1b, (q31_t)0xaf8550db, (q31_t)0x6384d9a7, (q31_t)0xaf806e2b,
+  (q31_t)0x6380e5f6, (q31_t)0xaf7b8bac, (q31_t)0x637cf208, (q31_t)0xaf76a95f, (q31_t)0x6378fddc, (q31_t)0xaf71c743, (q31_t)0x63750973, (q31_t)0xaf6ce55a,
+  (q31_t)0x637114cc, (q31_t)0xaf6803a2, (q31_t)0x636d1fe9, (q31_t)0xaf63221c, (q31_t)0x63692ac7, (q31_t)0xaf5e40c7, (q31_t)0x63653569, (q31_t)0xaf595fa4,
+  (q31_t)0x63613fcd, (q31_t)0xaf547eb3, (q31_t)0x635d49f4, (q31_t)0xaf4f9df4, (q31_t)0x635953dd, (q31_t)0xaf4abd66, (q31_t)0x63555d8a, (q31_t)0xaf45dd0b,
+  (q31_t)0x635166f9, (q31_t)0xaf40fce1, (q31_t)0x634d702b, (q31_t)0xaf3c1ce9, (q31_t)0x6349791f, (q31_t)0xaf373d22, (q31_t)0x634581d6, (q31_t)0xaf325d8e,
+  (q31_t)0x63418a50, (q31_t)0xaf2d7e2b, (q31_t)0x633d928d, (q31_t)0xaf289efa, (q31_t)0x63399a8d, (q31_t)0xaf23bffb, (q31_t)0x6335a24f, (q31_t)0xaf1ee12e,
+  (q31_t)0x6331a9d4, (q31_t)0xaf1a0293, (q31_t)0x632db11c, (q31_t)0xaf15242a, (q31_t)0x6329b827, (q31_t)0xaf1045f3, (q31_t)0x6325bef5, (q31_t)0xaf0b67ed,
+  (q31_t)0x6321c585, (q31_t)0xaf068a1a, (q31_t)0x631dcbd9, (q31_t)0xaf01ac78, (q31_t)0x6319d1ef, (q31_t)0xaefccf09, (q31_t)0x6315d7c8, (q31_t)0xaef7f1cb,
+  (q31_t)0x6311dd64, (q31_t)0xaef314c0, (q31_t)0x630de2c3, (q31_t)0xaeee37e6, (q31_t)0x6309e7e4, (q31_t)0xaee95b3f, (q31_t)0x6305ecc9, (q31_t)0xaee47ec9,
+  (q31_t)0x6301f171, (q31_t)0xaedfa285, (q31_t)0x62fdf5db, (q31_t)0xaedac674, (q31_t)0x62f9fa09, (q31_t)0xaed5ea95, (q31_t)0x62f5fdf9, (q31_t)0xaed10ee7,
+  (q31_t)0x62f201ac, (q31_t)0xaecc336c, (q31_t)0x62ee0523, (q31_t)0xaec75823, (q31_t)0x62ea085c, (q31_t)0xaec27d0c, (q31_t)0x62e60b58, (q31_t)0xaebda227,
+  (q31_t)0x62e20e17, (q31_t)0xaeb8c774, (q31_t)0x62de109a, (q31_t)0xaeb3ecf3, (q31_t)0x62da12df, (q31_t)0xaeaf12a4, (q31_t)0x62d614e7, (q31_t)0xaeaa3888,
+  (q31_t)0x62d216b3, (q31_t)0xaea55e9e, (q31_t)0x62ce1841, (q31_t)0xaea084e6, (q31_t)0x62ca1992, (q31_t)0xae9bab60, (q31_t)0x62c61aa7, (q31_t)0xae96d20c,
+  (q31_t)0x62c21b7e, (q31_t)0xae91f8eb, (q31_t)0x62be1c19, (q31_t)0xae8d1ffb, (q31_t)0x62ba1c77, (q31_t)0xae88473e, (q31_t)0x62b61c98, (q31_t)0xae836eb4,
+  (q31_t)0x62b21c7b, (q31_t)0xae7e965b, (q31_t)0x62ae1c23, (q31_t)0xae79be35, (q31_t)0x62aa1b8d, (q31_t)0xae74e641, (q31_t)0x62a61aba, (q31_t)0xae700e80,
+  (q31_t)0x62a219aa, (q31_t)0xae6b36f0, (q31_t)0x629e185e, (q31_t)0xae665f93, (q31_t)0x629a16d5, (q31_t)0xae618869, (q31_t)0x6296150f, (q31_t)0xae5cb171,
+  (q31_t)0x6292130c, (q31_t)0xae57daab, (q31_t)0x628e10cc, (q31_t)0xae530417, (q31_t)0x628a0e50, (q31_t)0xae4e2db6, (q31_t)0x62860b97, (q31_t)0xae495787,
+  (q31_t)0x628208a1, (q31_t)0xae44818b, (q31_t)0x627e056e, (q31_t)0xae3fabc1, (q31_t)0x627a01fe, (q31_t)0xae3ad629, (q31_t)0x6275fe52, (q31_t)0xae3600c4,
+  (q31_t)0x6271fa69, (q31_t)0xae312b92, (q31_t)0x626df643, (q31_t)0xae2c5691, (q31_t)0x6269f1e1, (q31_t)0xae2781c4, (q31_t)0x6265ed42, (q31_t)0xae22ad29,
+  (q31_t)0x6261e866, (q31_t)0xae1dd8c0, (q31_t)0x625de34e, (q31_t)0xae19048a, (q31_t)0x6259ddf8, (q31_t)0xae143086, (q31_t)0x6255d866, (q31_t)0xae0f5cb5,
+  (q31_t)0x6251d298, (q31_t)0xae0a8916, (q31_t)0x624dcc8d, (q31_t)0xae05b5aa, (q31_t)0x6249c645, (q31_t)0xae00e271, (q31_t)0x6245bfc0, (q31_t)0xadfc0f6a,
+  (q31_t)0x6241b8ff, (q31_t)0xadf73c96, (q31_t)0x623db202, (q31_t)0xadf269f4, (q31_t)0x6239aac7, (q31_t)0xaded9785, (q31_t)0x6235a351, (q31_t)0xade8c548,
+  (q31_t)0x62319b9d, (q31_t)0xade3f33e, (q31_t)0x622d93ad, (q31_t)0xaddf2167, (q31_t)0x62298b81, (q31_t)0xadda4fc3, (q31_t)0x62258317, (q31_t)0xadd57e51,
+  (q31_t)0x62217a72, (q31_t)0xadd0ad12, (q31_t)0x621d7190, (q31_t)0xadcbdc05, (q31_t)0x62196871, (q31_t)0xadc70b2c, (q31_t)0x62155f16, (q31_t)0xadc23a85,
+  (q31_t)0x6211557e, (q31_t)0xadbd6a10, (q31_t)0x620d4baa, (q31_t)0xadb899cf, (q31_t)0x62094199, (q31_t)0xadb3c9c0, (q31_t)0x6205374c, (q31_t)0xadaef9e4,
+  (q31_t)0x62012cc2, (q31_t)0xadaa2a3b, (q31_t)0x61fd21fc, (q31_t)0xada55ac4, (q31_t)0x61f916f9, (q31_t)0xada08b80, (q31_t)0x61f50bba, (q31_t)0xad9bbc70,
+  (q31_t)0x61f1003f, (q31_t)0xad96ed92, (q31_t)0x61ecf487, (q31_t)0xad921ee6, (q31_t)0x61e8e893, (q31_t)0xad8d506e, (q31_t)0x61e4dc62, (q31_t)0xad888229,
+  (q31_t)0x61e0cff5, (q31_t)0xad83b416, (q31_t)0x61dcc34c, (q31_t)0xad7ee636, (q31_t)0x61d8b666, (q31_t)0xad7a1889, (q31_t)0x61d4a944, (q31_t)0xad754b0f,
+  (q31_t)0x61d09be5, (q31_t)0xad707dc8, (q31_t)0x61cc8e4b, (q31_t)0xad6bb0b4, (q31_t)0x61c88074, (q31_t)0xad66e3d3, (q31_t)0x61c47260, (q31_t)0xad621725,
+  (q31_t)0x61c06410, (q31_t)0xad5d4aaa, (q31_t)0x61bc5584, (q31_t)0xad587e61, (q31_t)0x61b846bc, (q31_t)0xad53b24c, (q31_t)0x61b437b7, (q31_t)0xad4ee66a,
+  (q31_t)0x61b02876, (q31_t)0xad4a1aba, (q31_t)0x61ac18f9, (q31_t)0xad454f3e, (q31_t)0x61a80940, (q31_t)0xad4083f5, (q31_t)0x61a3f94a, (q31_t)0xad3bb8df,
+  (q31_t)0x619fe918, (q31_t)0xad36edfc, (q31_t)0x619bd8aa, (q31_t)0xad32234b, (q31_t)0x6197c800, (q31_t)0xad2d58ce, (q31_t)0x6193b719, (q31_t)0xad288e85,
+  (q31_t)0x618fa5f7, (q31_t)0xad23c46e, (q31_t)0x618b9498, (q31_t)0xad1efa8a, (q31_t)0x618782fd, (q31_t)0xad1a30d9, (q31_t)0x61837126, (q31_t)0xad15675c,
+  (q31_t)0x617f5f12, (q31_t)0xad109e12, (q31_t)0x617b4cc3, (q31_t)0xad0bd4fb, (q31_t)0x61773a37, (q31_t)0xad070c17, (q31_t)0x61732770, (q31_t)0xad024366,
+  (q31_t)0x616f146c, (q31_t)0xacfd7ae8, (q31_t)0x616b012c, (q31_t)0xacf8b29e, (q31_t)0x6166edb0, (q31_t)0xacf3ea87, (q31_t)0x6162d9f8, (q31_t)0xacef22a3,
+  (q31_t)0x615ec603, (q31_t)0xacea5af2, (q31_t)0x615ab1d3, (q31_t)0xace59375, (q31_t)0x61569d67, (q31_t)0xace0cc2b, (q31_t)0x615288be, (q31_t)0xacdc0514,
+  (q31_t)0x614e73da, (q31_t)0xacd73e30, (q31_t)0x614a5eba, (q31_t)0xacd27780, (q31_t)0x6146495d, (q31_t)0xaccdb103, (q31_t)0x614233c5, (q31_t)0xacc8eab9,
+  (q31_t)0x613e1df0, (q31_t)0xacc424a3, (q31_t)0x613a07e0, (q31_t)0xacbf5ec0, (q31_t)0x6135f193, (q31_t)0xacba9910, (q31_t)0x6131db0b, (q31_t)0xacb5d394,
+  (q31_t)0x612dc447, (q31_t)0xacb10e4b, (q31_t)0x6129ad46, (q31_t)0xacac4935, (q31_t)0x6125960a, (q31_t)0xaca78453, (q31_t)0x61217e92, (q31_t)0xaca2bfa4,
+  (q31_t)0x611d66de, (q31_t)0xac9dfb29, (q31_t)0x61194eee, (q31_t)0xac9936e1, (q31_t)0x611536c2, (q31_t)0xac9472cd, (q31_t)0x61111e5b, (q31_t)0xac8faeec,
+  (q31_t)0x610d05b7, (q31_t)0xac8aeb3e, (q31_t)0x6108ecd8, (q31_t)0xac8627c4, (q31_t)0x6104d3bc, (q31_t)0xac81647e, (q31_t)0x6100ba65, (q31_t)0xac7ca16b,
+  (q31_t)0x60fca0d2, (q31_t)0xac77de8b, (q31_t)0x60f88703, (q31_t)0xac731bdf, (q31_t)0x60f46cf9, (q31_t)0xac6e5967, (q31_t)0x60f052b2, (q31_t)0xac699722,
+  (q31_t)0x60ec3830, (q31_t)0xac64d510, (q31_t)0x60e81d72, (q31_t)0xac601333, (q31_t)0x60e40278, (q31_t)0xac5b5189, (q31_t)0x60dfe743, (q31_t)0xac569012,
+  (q31_t)0x60dbcbd1, (q31_t)0xac51cecf, (q31_t)0x60d7b024, (q31_t)0xac4d0dc0, (q31_t)0x60d3943b, (q31_t)0xac484ce4, (q31_t)0x60cf7817, (q31_t)0xac438c3c,
+  (q31_t)0x60cb5bb7, (q31_t)0xac3ecbc7, (q31_t)0x60c73f1b, (q31_t)0xac3a0b87, (q31_t)0x60c32243, (q31_t)0xac354b7a, (q31_t)0x60bf0530, (q31_t)0xac308ba0,
+  (q31_t)0x60bae7e1, (q31_t)0xac2bcbfa, (q31_t)0x60b6ca56, (q31_t)0xac270c88, (q31_t)0x60b2ac8f, (q31_t)0xac224d4a, (q31_t)0x60ae8e8d, (q31_t)0xac1d8e40,
+  (q31_t)0x60aa7050, (q31_t)0xac18cf69, (q31_t)0x60a651d7, (q31_t)0xac1410c6, (q31_t)0x60a23322, (q31_t)0xac0f5256, (q31_t)0x609e1431, (q31_t)0xac0a941b,
+  (q31_t)0x6099f505, (q31_t)0xac05d613, (q31_t)0x6095d59d, (q31_t)0xac01183f, (q31_t)0x6091b5fa, (q31_t)0xabfc5a9f, (q31_t)0x608d961b, (q31_t)0xabf79d33,
+  (q31_t)0x60897601, (q31_t)0xabf2dffb, (q31_t)0x608555ab, (q31_t)0xabee22f6, (q31_t)0x60813519, (q31_t)0xabe96625, (q31_t)0x607d144c, (q31_t)0xabe4a988,
+  (q31_t)0x6078f344, (q31_t)0xabdfed1f, (q31_t)0x6074d200, (q31_t)0xabdb30ea, (q31_t)0x6070b080, (q31_t)0xabd674e9, (q31_t)0x606c8ec5, (q31_t)0xabd1b91c,
+  (q31_t)0x60686ccf, (q31_t)0xabccfd83, (q31_t)0x60644a9d, (q31_t)0xabc8421d, (q31_t)0x6060282f, (q31_t)0xabc386ec, (q31_t)0x605c0587, (q31_t)0xabbecbee,
+  (q31_t)0x6057e2a2, (q31_t)0xabba1125, (q31_t)0x6053bf82, (q31_t)0xabb5568f, (q31_t)0x604f9c27, (q31_t)0xabb09c2e, (q31_t)0x604b7891, (q31_t)0xababe200,
+  (q31_t)0x604754bf, (q31_t)0xaba72807, (q31_t)0x604330b1, (q31_t)0xaba26e41, (q31_t)0x603f0c69, (q31_t)0xab9db4b0, (q31_t)0x603ae7e5, (q31_t)0xab98fb52,
+  (q31_t)0x6036c325, (q31_t)0xab944229, (q31_t)0x60329e2a, (q31_t)0xab8f8934, (q31_t)0x602e78f4, (q31_t)0xab8ad073, (q31_t)0x602a5383, (q31_t)0xab8617e6,
+  (q31_t)0x60262dd6, (q31_t)0xab815f8d, (q31_t)0x602207ee, (q31_t)0xab7ca768, (q31_t)0x601de1ca, (q31_t)0xab77ef77, (q31_t)0x6019bb6b, (q31_t)0xab7337bb,
+  (q31_t)0x601594d1, (q31_t)0xab6e8032, (q31_t)0x60116dfc, (q31_t)0xab69c8de, (q31_t)0x600d46ec, (q31_t)0xab6511be, (q31_t)0x60091fa0, (q31_t)0xab605ad2,
+  (q31_t)0x6004f819, (q31_t)0xab5ba41a, (q31_t)0x6000d057, (q31_t)0xab56ed97, (q31_t)0x5ffca859, (q31_t)0xab523748, (q31_t)0x5ff88021, (q31_t)0xab4d812d,
+  (q31_t)0x5ff457ad, (q31_t)0xab48cb46, (q31_t)0x5ff02efe, (q31_t)0xab441593, (q31_t)0x5fec0613, (q31_t)0xab3f6015, (q31_t)0x5fe7dcee, (q31_t)0xab3aaacb,
+  (q31_t)0x5fe3b38d, (q31_t)0xab35f5b5, (q31_t)0x5fdf89f2, (q31_t)0xab3140d4, (q31_t)0x5fdb601b, (q31_t)0xab2c8c27, (q31_t)0x5fd73609, (q31_t)0xab27d7ae,
+  (q31_t)0x5fd30bbc, (q31_t)0xab23236a, (q31_t)0x5fcee133, (q31_t)0xab1e6f5a, (q31_t)0x5fcab670, (q31_t)0xab19bb7e, (q31_t)0x5fc68b72, (q31_t)0xab1507d7,
+  (q31_t)0x5fc26038, (q31_t)0xab105464, (q31_t)0x5fbe34c4, (q31_t)0xab0ba125, (q31_t)0x5fba0914, (q31_t)0xab06ee1b, (q31_t)0x5fb5dd29, (q31_t)0xab023b46,
+  (q31_t)0x5fb1b104, (q31_t)0xaafd88a4, (q31_t)0x5fad84a3, (q31_t)0xaaf8d637, (q31_t)0x5fa95807, (q31_t)0xaaf423ff, (q31_t)0x5fa52b31, (q31_t)0xaaef71fb,
+  (q31_t)0x5fa0fe1f, (q31_t)0xaaeac02c, (q31_t)0x5f9cd0d2, (q31_t)0xaae60e91, (q31_t)0x5f98a34a, (q31_t)0xaae15d2a, (q31_t)0x5f947588, (q31_t)0xaadcabf8,
+  (q31_t)0x5f90478a, (q31_t)0xaad7fafb, (q31_t)0x5f8c1951, (q31_t)0xaad34a32, (q31_t)0x5f87eade, (q31_t)0xaace999d, (q31_t)0x5f83bc2f, (q31_t)0xaac9e93e,
+  (q31_t)0x5f7f8d46, (q31_t)0xaac53912, (q31_t)0x5f7b5e22, (q31_t)0xaac0891c, (q31_t)0x5f772ec2, (q31_t)0xaabbd959, (q31_t)0x5f72ff28, (q31_t)0xaab729cc,
+  (q31_t)0x5f6ecf53, (q31_t)0xaab27a73, (q31_t)0x5f6a9f44, (q31_t)0xaaadcb4f, (q31_t)0x5f666ef9, (q31_t)0xaaa91c5f, (q31_t)0x5f623e73, (q31_t)0xaaa46da4,
+  (q31_t)0x5f5e0db3, (q31_t)0xaa9fbf1e, (q31_t)0x5f59dcb8, (q31_t)0xaa9b10cc, (q31_t)0x5f55ab82, (q31_t)0xaa9662af, (q31_t)0x5f517a11, (q31_t)0xaa91b4c7,
+  (q31_t)0x5f4d4865, (q31_t)0xaa8d0713, (q31_t)0x5f49167f, (q31_t)0xaa885994, (q31_t)0x5f44e45e, (q31_t)0xaa83ac4a, (q31_t)0x5f40b202, (q31_t)0xaa7eff34,
+  (q31_t)0x5f3c7f6b, (q31_t)0xaa7a5253, (q31_t)0x5f384c9a, (q31_t)0xaa75a5a8, (q31_t)0x5f34198e, (q31_t)0xaa70f930, (q31_t)0x5f2fe647, (q31_t)0xaa6c4cee,
+  (q31_t)0x5f2bb2c5, (q31_t)0xaa67a0e0, (q31_t)0x5f277f09, (q31_t)0xaa62f507, (q31_t)0x5f234b12, (q31_t)0xaa5e4963, (q31_t)0x5f1f16e0, (q31_t)0xaa599df4,
+  (q31_t)0x5f1ae274, (q31_t)0xaa54f2ba, (q31_t)0x5f16adcc, (q31_t)0xaa5047b4, (q31_t)0x5f1278eb, (q31_t)0xaa4b9ce3, (q31_t)0x5f0e43ce, (q31_t)0xaa46f248,
+  (q31_t)0x5f0a0e77, (q31_t)0xaa4247e1, (q31_t)0x5f05d8e6, (q31_t)0xaa3d9daf, (q31_t)0x5f01a31a, (q31_t)0xaa38f3b1, (q31_t)0x5efd6d13, (q31_t)0xaa3449e9,
+  (q31_t)0x5ef936d1, (q31_t)0xaa2fa056, (q31_t)0x5ef50055, (q31_t)0xaa2af6f7, (q31_t)0x5ef0c99f, (q31_t)0xaa264dce, (q31_t)0x5eec92ae, (q31_t)0xaa21a4d9,
+  (q31_t)0x5ee85b82, (q31_t)0xaa1cfc1a, (q31_t)0x5ee4241c, (q31_t)0xaa18538f, (q31_t)0x5edfec7b, (q31_t)0xaa13ab3a, (q31_t)0x5edbb49f, (q31_t)0xaa0f0319,
+  (q31_t)0x5ed77c8a, (q31_t)0xaa0a5b2e, (q31_t)0x5ed34439, (q31_t)0xaa05b377, (q31_t)0x5ecf0baf, (q31_t)0xaa010bf6, (q31_t)0x5ecad2e9, (q31_t)0xa9fc64a9,
+  (q31_t)0x5ec699e9, (q31_t)0xa9f7bd92, (q31_t)0x5ec260af, (q31_t)0xa9f316b0, (q31_t)0x5ebe273b, (q31_t)0xa9ee7002, (q31_t)0x5eb9ed8b, (q31_t)0xa9e9c98a,
+  (q31_t)0x5eb5b3a2, (q31_t)0xa9e52347, (q31_t)0x5eb1797e, (q31_t)0xa9e07d39, (q31_t)0x5ead3f1f, (q31_t)0xa9dbd761, (q31_t)0x5ea90487, (q31_t)0xa9d731bd,
+  (q31_t)0x5ea4c9b3, (q31_t)0xa9d28c4e, (q31_t)0x5ea08ea6, (q31_t)0xa9cde715, (q31_t)0x5e9c535e, (q31_t)0xa9c94211, (q31_t)0x5e9817dc, (q31_t)0xa9c49d42,
+  (q31_t)0x5e93dc1f, (q31_t)0xa9bff8a8, (q31_t)0x5e8fa028, (q31_t)0xa9bb5444, (q31_t)0x5e8b63f7, (q31_t)0xa9b6b014, (q31_t)0x5e87278b, (q31_t)0xa9b20c1a,
+  (q31_t)0x5e82eae5, (q31_t)0xa9ad6855, (q31_t)0x5e7eae05, (q31_t)0xa9a8c4c5, (q31_t)0x5e7a70ea, (q31_t)0xa9a4216b, (q31_t)0x5e763395, (q31_t)0xa99f7e46,
+  (q31_t)0x5e71f606, (q31_t)0xa99adb56, (q31_t)0x5e6db83d, (q31_t)0xa996389b, (q31_t)0x5e697a39, (q31_t)0xa9919616, (q31_t)0x5e653bfc, (q31_t)0xa98cf3c6,
+  (q31_t)0x5e60fd84, (q31_t)0xa98851ac, (q31_t)0x5e5cbed1, (q31_t)0xa983afc6, (q31_t)0x5e587fe5, (q31_t)0xa97f0e16, (q31_t)0x5e5440be, (q31_t)0xa97a6c9c,
+  (q31_t)0x5e50015d, (q31_t)0xa975cb57, (q31_t)0x5e4bc1c2, (q31_t)0xa9712a47, (q31_t)0x5e4781ed, (q31_t)0xa96c896c, (q31_t)0x5e4341de, (q31_t)0xa967e8c7,
+  (q31_t)0x5e3f0194, (q31_t)0xa9634858, (q31_t)0x5e3ac110, (q31_t)0xa95ea81d, (q31_t)0x5e368053, (q31_t)0xa95a0819, (q31_t)0x5e323f5b, (q31_t)0xa9556849,
+  (q31_t)0x5e2dfe29, (q31_t)0xa950c8b0, (q31_t)0x5e29bcbd, (q31_t)0xa94c294b, (q31_t)0x5e257b17, (q31_t)0xa9478a1c, (q31_t)0x5e213936, (q31_t)0xa942eb23,
+  (q31_t)0x5e1cf71c, (q31_t)0xa93e4c5f, (q31_t)0x5e18b4c8, (q31_t)0xa939add1, (q31_t)0x5e147239, (q31_t)0xa9350f78, (q31_t)0x5e102f71, (q31_t)0xa9307155,
+  (q31_t)0x5e0bec6e, (q31_t)0xa92bd367, (q31_t)0x5e07a932, (q31_t)0xa92735af, (q31_t)0x5e0365bb, (q31_t)0xa922982c, (q31_t)0x5dff220b, (q31_t)0xa91dfadf,
+  (q31_t)0x5dfade20, (q31_t)0xa9195dc7, (q31_t)0x5df699fc, (q31_t)0xa914c0e6, (q31_t)0x5df2559e, (q31_t)0xa9102439, (q31_t)0x5dee1105, (q31_t)0xa90b87c3,
+  (q31_t)0x5de9cc33, (q31_t)0xa906eb82, (q31_t)0x5de58727, (q31_t)0xa9024f76, (q31_t)0x5de141e1, (q31_t)0xa8fdb3a1, (q31_t)0x5ddcfc61, (q31_t)0xa8f91801,
+  (q31_t)0x5dd8b6a7, (q31_t)0xa8f47c97, (q31_t)0x5dd470b3, (q31_t)0xa8efe162, (q31_t)0x5dd02a85, (q31_t)0xa8eb4663, (q31_t)0x5dcbe41d, (q31_t)0xa8e6ab9a,
+  (q31_t)0x5dc79d7c, (q31_t)0xa8e21106, (q31_t)0x5dc356a1, (q31_t)0xa8dd76a9, (q31_t)0x5dbf0f8c, (q31_t)0xa8d8dc81, (q31_t)0x5dbac83d, (q31_t)0xa8d4428f,
+  (q31_t)0x5db680b4, (q31_t)0xa8cfa8d2, (q31_t)0x5db238f1, (q31_t)0xa8cb0f4b, (q31_t)0x5dadf0f5, (q31_t)0xa8c675fb, (q31_t)0x5da9a8bf, (q31_t)0xa8c1dce0,
+  (q31_t)0x5da5604f, (q31_t)0xa8bd43fa, (q31_t)0x5da117a5, (q31_t)0xa8b8ab4b, (q31_t)0x5d9ccec2, (q31_t)0xa8b412d1, (q31_t)0x5d9885a5, (q31_t)0xa8af7a8e,
+  (q31_t)0x5d943c4e, (q31_t)0xa8aae280, (q31_t)0x5d8ff2bd, (q31_t)0xa8a64aa8, (q31_t)0x5d8ba8f3, (q31_t)0xa8a1b306, (q31_t)0x5d875eef, (q31_t)0xa89d1b99,
+  (q31_t)0x5d8314b1, (q31_t)0xa8988463, (q31_t)0x5d7eca39, (q31_t)0xa893ed63, (q31_t)0x5d7a7f88, (q31_t)0xa88f5698, (q31_t)0x5d76349d, (q31_t)0xa88ac004,
+  (q31_t)0x5d71e979, (q31_t)0xa88629a5, (q31_t)0x5d6d9e1b, (q31_t)0xa881937c, (q31_t)0x5d695283, (q31_t)0xa87cfd8a, (q31_t)0x5d6506b2, (q31_t)0xa87867cd,
+  (q31_t)0x5d60baa7, (q31_t)0xa873d246, (q31_t)0x5d5c6e62, (q31_t)0xa86f3cf6, (q31_t)0x5d5821e4, (q31_t)0xa86aa7db, (q31_t)0x5d53d52d, (q31_t)0xa86612f6,
+  (q31_t)0x5d4f883b, (q31_t)0xa8617e48, (q31_t)0x5d4b3b10, (q31_t)0xa85ce9cf, (q31_t)0x5d46edac, (q31_t)0xa858558d, (q31_t)0x5d42a00e, (q31_t)0xa853c180,
+  (q31_t)0x5d3e5237, (q31_t)0xa84f2daa, (q31_t)0x5d3a0426, (q31_t)0xa84a9a0a, (q31_t)0x5d35b5db, (q31_t)0xa84606a0, (q31_t)0x5d316757, (q31_t)0xa841736c,
+  (q31_t)0x5d2d189a, (q31_t)0xa83ce06e, (q31_t)0x5d28c9a3, (q31_t)0xa8384da6, (q31_t)0x5d247a72, (q31_t)0xa833bb14, (q31_t)0x5d202b09, (q31_t)0xa82f28b9,
+  (q31_t)0x5d1bdb65, (q31_t)0xa82a9693, (q31_t)0x5d178b89, (q31_t)0xa82604a4, (q31_t)0x5d133b72, (q31_t)0xa82172eb, (q31_t)0x5d0eeb23, (q31_t)0xa81ce169,
+  (q31_t)0x5d0a9a9a, (q31_t)0xa818501c, (q31_t)0x5d0649d7, (q31_t)0xa813bf06, (q31_t)0x5d01f8dc, (q31_t)0xa80f2e26, (q31_t)0x5cfda7a7, (q31_t)0xa80a9d7c,
+  (q31_t)0x5cf95638, (q31_t)0xa8060d08, (q31_t)0x5cf50490, (q31_t)0xa8017ccb, (q31_t)0x5cf0b2af, (q31_t)0xa7fcecc4, (q31_t)0x5cec6095, (q31_t)0xa7f85cf3,
+  (q31_t)0x5ce80e41, (q31_t)0xa7f3cd59, (q31_t)0x5ce3bbb4, (q31_t)0xa7ef3df5, (q31_t)0x5cdf68ed, (q31_t)0xa7eaaec7, (q31_t)0x5cdb15ed, (q31_t)0xa7e61fd0,
+  (q31_t)0x5cd6c2b5, (q31_t)0xa7e1910f, (q31_t)0x5cd26f42, (q31_t)0xa7dd0284, (q31_t)0x5cce1b97, (q31_t)0xa7d8742f, (q31_t)0x5cc9c7b2, (q31_t)0xa7d3e611,
+  (q31_t)0x5cc57394, (q31_t)0xa7cf582a, (q31_t)0x5cc11f3d, (q31_t)0xa7caca79, (q31_t)0x5cbccaac, (q31_t)0xa7c63cfe, (q31_t)0x5cb875e3, (q31_t)0xa7c1afb9,
+  (q31_t)0x5cb420e0, (q31_t)0xa7bd22ac, (q31_t)0x5cafcba4, (q31_t)0xa7b895d4, (q31_t)0x5cab762f, (q31_t)0xa7b40933, (q31_t)0x5ca72080, (q31_t)0xa7af7cc8,
+  (q31_t)0x5ca2ca99, (q31_t)0xa7aaf094, (q31_t)0x5c9e7478, (q31_t)0xa7a66497, (q31_t)0x5c9a1e1e, (q31_t)0xa7a1d8d0, (q31_t)0x5c95c78b, (q31_t)0xa79d4d3f,
+  (q31_t)0x5c9170bf, (q31_t)0xa798c1e5, (q31_t)0x5c8d19ba, (q31_t)0xa79436c1, (q31_t)0x5c88c27c, (q31_t)0xa78fabd4, (q31_t)0x5c846b05, (q31_t)0xa78b211e,
+  (q31_t)0x5c801354, (q31_t)0xa786969e, (q31_t)0x5c7bbb6b, (q31_t)0xa7820c55, (q31_t)0x5c776348, (q31_t)0xa77d8242, (q31_t)0x5c730aed, (q31_t)0xa778f866,
+  (q31_t)0x5c6eb258, (q31_t)0xa7746ec0, (q31_t)0x5c6a598b, (q31_t)0xa76fe551, (q31_t)0x5c660084, (q31_t)0xa76b5c19, (q31_t)0x5c61a745, (q31_t)0xa766d317,
+  (q31_t)0x5c5d4dcc, (q31_t)0xa7624a4d, (q31_t)0x5c58f41a, (q31_t)0xa75dc1b8, (q31_t)0x5c549a30, (q31_t)0xa759395b, (q31_t)0x5c50400d, (q31_t)0xa754b134,
+  (q31_t)0x5c4be5b0, (q31_t)0xa7502943, (q31_t)0x5c478b1b, (q31_t)0xa74ba18a, (q31_t)0x5c43304d, (q31_t)0xa7471a07, (q31_t)0x5c3ed545, (q31_t)0xa74292bb,
+  (q31_t)0x5c3a7a05, (q31_t)0xa73e0ba5, (q31_t)0x5c361e8c, (q31_t)0xa73984c7, (q31_t)0x5c31c2db, (q31_t)0xa734fe1f, (q31_t)0x5c2d66f0, (q31_t)0xa73077ae,
+  (q31_t)0x5c290acc, (q31_t)0xa72bf174, (q31_t)0x5c24ae70, (q31_t)0xa7276b70, (q31_t)0x5c2051db, (q31_t)0xa722e5a3, (q31_t)0x5c1bf50d, (q31_t)0xa71e600d,
+  (q31_t)0x5c179806, (q31_t)0xa719daae, (q31_t)0x5c133ac6, (q31_t)0xa7155586, (q31_t)0x5c0edd4e, (q31_t)0xa710d095, (q31_t)0x5c0a7f9c, (q31_t)0xa70c4bda,
+  (q31_t)0x5c0621b2, (q31_t)0xa707c757, (q31_t)0x5c01c38f, (q31_t)0xa703430a, (q31_t)0x5bfd6534, (q31_t)0xa6febef4, (q31_t)0x5bf906a0, (q31_t)0xa6fa3b15,
+  (q31_t)0x5bf4a7d2, (q31_t)0xa6f5b76d, (q31_t)0x5bf048cd, (q31_t)0xa6f133fc, (q31_t)0x5bebe98e, (q31_t)0xa6ecb0c2, (q31_t)0x5be78a17, (q31_t)0xa6e82dbe,
+  (q31_t)0x5be32a67, (q31_t)0xa6e3aaf2, (q31_t)0x5bdeca7f, (q31_t)0xa6df285d, (q31_t)0x5bda6a5d, (q31_t)0xa6daa5fe, (q31_t)0x5bd60a03, (q31_t)0xa6d623d7,
+  (q31_t)0x5bd1a971, (q31_t)0xa6d1a1e7, (q31_t)0x5bcd48a6, (q31_t)0xa6cd202d, (q31_t)0x5bc8e7a2, (q31_t)0xa6c89eab, (q31_t)0x5bc48666, (q31_t)0xa6c41d60,
+  (q31_t)0x5bc024f0, (q31_t)0xa6bf9c4b, (q31_t)0x5bbbc343, (q31_t)0xa6bb1b6e, (q31_t)0x5bb7615d, (q31_t)0xa6b69ac8, (q31_t)0x5bb2ff3e, (q31_t)0xa6b21a59,
+  (q31_t)0x5bae9ce7, (q31_t)0xa6ad9a21, (q31_t)0x5baa3a57, (q31_t)0xa6a91a20, (q31_t)0x5ba5d78e, (q31_t)0xa6a49a56, (q31_t)0x5ba1748d, (q31_t)0xa6a01ac4,
+  (q31_t)0x5b9d1154, (q31_t)0xa69b9b68, (q31_t)0x5b98ade2, (q31_t)0xa6971c44, (q31_t)0x5b944a37, (q31_t)0xa6929d57, (q31_t)0x5b8fe654, (q31_t)0xa68e1ea1,
+  (q31_t)0x5b8b8239, (q31_t)0xa689a022, (q31_t)0x5b871de5, (q31_t)0xa68521da, (q31_t)0x5b82b958, (q31_t)0xa680a3ca, (q31_t)0x5b7e5493, (q31_t)0xa67c25f0,
+  (q31_t)0x5b79ef96, (q31_t)0xa677a84e, (q31_t)0x5b758a60, (q31_t)0xa6732ae3, (q31_t)0x5b7124f2, (q31_t)0xa66eadb0, (q31_t)0x5b6cbf4c, (q31_t)0xa66a30b3,
+  (q31_t)0x5b68596d, (q31_t)0xa665b3ee, (q31_t)0x5b63f355, (q31_t)0xa6613760, (q31_t)0x5b5f8d06, (q31_t)0xa65cbb0a, (q31_t)0x5b5b267e, (q31_t)0xa6583eeb,
+  (q31_t)0x5b56bfbd, (q31_t)0xa653c303, (q31_t)0x5b5258c4, (q31_t)0xa64f4752, (q31_t)0x5b4df193, (q31_t)0xa64acbd9, (q31_t)0x5b498a2a, (q31_t)0xa6465097,
+  (q31_t)0x5b452288, (q31_t)0xa641d58c, (q31_t)0x5b40baae, (q31_t)0xa63d5ab9, (q31_t)0x5b3c529c, (q31_t)0xa638e01d, (q31_t)0x5b37ea51, (q31_t)0xa63465b9,
+  (q31_t)0x5b3381ce, (q31_t)0xa62feb8b, (q31_t)0x5b2f1913, (q31_t)0xa62b7196, (q31_t)0x5b2ab020, (q31_t)0xa626f7d7, (q31_t)0x5b2646f4, (q31_t)0xa6227e50,
+  (q31_t)0x5b21dd90, (q31_t)0xa61e0501, (q31_t)0x5b1d73f4, (q31_t)0xa6198be9, (q31_t)0x5b190a20, (q31_t)0xa6151308, (q31_t)0x5b14a014, (q31_t)0xa6109a5f,
+  (q31_t)0x5b1035cf, (q31_t)0xa60c21ee, (q31_t)0x5b0bcb52, (q31_t)0xa607a9b4, (q31_t)0x5b07609d, (q31_t)0xa60331b1, (q31_t)0x5b02f5b0, (q31_t)0xa5feb9e6,
+  (q31_t)0x5afe8a8b, (q31_t)0xa5fa4252, (q31_t)0x5afa1f2e, (q31_t)0xa5f5caf6, (q31_t)0x5af5b398, (q31_t)0xa5f153d2, (q31_t)0x5af147ca, (q31_t)0xa5ecdce5,
+  (q31_t)0x5aecdbc5, (q31_t)0xa5e8662f, (q31_t)0x5ae86f87, (q31_t)0xa5e3efb1, (q31_t)0x5ae40311, (q31_t)0xa5df796b, (q31_t)0x5adf9663, (q31_t)0xa5db035c,
+  (q31_t)0x5adb297d, (q31_t)0xa5d68d85, (q31_t)0x5ad6bc5f, (q31_t)0xa5d217e6, (q31_t)0x5ad24f09, (q31_t)0xa5cda27e, (q31_t)0x5acde17b, (q31_t)0xa5c92d4e,
+  (q31_t)0x5ac973b5, (q31_t)0xa5c4b855, (q31_t)0x5ac505b7, (q31_t)0xa5c04395, (q31_t)0x5ac09781, (q31_t)0xa5bbcf0b, (q31_t)0x5abc2912, (q31_t)0xa5b75aba,
+  (q31_t)0x5ab7ba6c, (q31_t)0xa5b2e6a0, (q31_t)0x5ab34b8e, (q31_t)0xa5ae72be, (q31_t)0x5aaedc78, (q31_t)0xa5a9ff14, (q31_t)0x5aaa6d2b, (q31_t)0xa5a58ba1,
+  (q31_t)0x5aa5fda5, (q31_t)0xa5a11866, (q31_t)0x5aa18de7, (q31_t)0xa59ca563, (q31_t)0x5a9d1df1, (q31_t)0xa5983297, (q31_t)0x5a98adc4, (q31_t)0xa593c004,
+  (q31_t)0x5a943d5e, (q31_t)0xa58f4da8, (q31_t)0x5a8fccc1, (q31_t)0xa58adb84, (q31_t)0x5a8b5bec, (q31_t)0xa5866997, (q31_t)0x5a86eadf, (q31_t)0xa581f7e3,
+  (q31_t)0x5a82799a, (q31_t)0xa57d8666, (q31_t)0x5a7e081d, (q31_t)0xa5791521, (q31_t)0x5a799669, (q31_t)0xa574a414, (q31_t)0x5a75247c, (q31_t)0xa570333f,
+  (q31_t)0x5a70b258, (q31_t)0xa56bc2a2, (q31_t)0x5a6c3ffc, (q31_t)0xa567523c, (q31_t)0x5a67cd69, (q31_t)0xa562e20f, (q31_t)0x5a635a9d, (q31_t)0xa55e7219,
+  (q31_t)0x5a5ee79a, (q31_t)0xa55a025b, (q31_t)0x5a5a745f, (q31_t)0xa55592d5, (q31_t)0x5a5600ec, (q31_t)0xa5512388, (q31_t)0x5a518d42, (q31_t)0xa54cb472,
+  (q31_t)0x5a4d1960, (q31_t)0xa5484594, (q31_t)0x5a48a546, (q31_t)0xa543d6ee, (q31_t)0x5a4430f5, (q31_t)0xa53f687f, (q31_t)0x5a3fbc6b, (q31_t)0xa53afa49,
+  (q31_t)0x5a3b47ab, (q31_t)0xa5368c4b, (q31_t)0x5a36d2b2, (q31_t)0xa5321e85, (q31_t)0x5a325d82, (q31_t)0xa52db0f7, (q31_t)0x5a2de81a, (q31_t)0xa52943a1,
+  (q31_t)0x5a29727b, (q31_t)0xa524d683, (q31_t)0x5a24fca4, (q31_t)0xa520699d, (q31_t)0x5a208695, (q31_t)0xa51bfcef, (q31_t)0x5a1c104f, (q31_t)0xa5179079,
+  (q31_t)0x5a1799d1, (q31_t)0xa513243b, (q31_t)0x5a13231b, (q31_t)0xa50eb836, (q31_t)0x5a0eac2e, (q31_t)0xa50a4c68, (q31_t)0x5a0a350a, (q31_t)0xa505e0d2,
+  (q31_t)0x5a05bdae, (q31_t)0xa5017575, (q31_t)0x5a01461a, (q31_t)0xa4fd0a50, (q31_t)0x59fcce4f, (q31_t)0xa4f89f63, (q31_t)0x59f8564c, (q31_t)0xa4f434ae,
+  (q31_t)0x59f3de12, (q31_t)0xa4efca31, (q31_t)0x59ef65a1, (q31_t)0xa4eb5fec, (q31_t)0x59eaecf8, (q31_t)0xa4e6f5e0, (q31_t)0x59e67417, (q31_t)0xa4e28c0c,
+  (q31_t)0x59e1faff, (q31_t)0xa4de2270, (q31_t)0x59dd81b0, (q31_t)0xa4d9b90c, (q31_t)0x59d90829, (q31_t)0xa4d54fe0, (q31_t)0x59d48e6a, (q31_t)0xa4d0e6ed,
+  (q31_t)0x59d01475, (q31_t)0xa4cc7e32, (q31_t)0x59cb9a47, (q31_t)0xa4c815af, (q31_t)0x59c71fe3, (q31_t)0xa4c3ad64, (q31_t)0x59c2a547, (q31_t)0xa4bf4552,
+  (q31_t)0x59be2a74, (q31_t)0xa4badd78, (q31_t)0x59b9af69, (q31_t)0xa4b675d6, (q31_t)0x59b53427, (q31_t)0xa4b20e6d, (q31_t)0x59b0b8ae, (q31_t)0xa4ada73c,
+  (q31_t)0x59ac3cfd, (q31_t)0xa4a94043, (q31_t)0x59a7c115, (q31_t)0xa4a4d982, (q31_t)0x59a344f6, (q31_t)0xa4a072fa, (q31_t)0x599ec8a0, (q31_t)0xa49c0cab,
+  (q31_t)0x599a4c12, (q31_t)0xa497a693, (q31_t)0x5995cf4d, (q31_t)0xa49340b4, (q31_t)0x59915250, (q31_t)0xa48edb0e, (q31_t)0x598cd51d, (q31_t)0xa48a75a0,
+  (q31_t)0x598857b2, (q31_t)0xa486106a, (q31_t)0x5983da10, (q31_t)0xa481ab6d, (q31_t)0x597f5c36, (q31_t)0xa47d46a8, (q31_t)0x597ade26, (q31_t)0xa478e21b,
+  (q31_t)0x59765fde, (q31_t)0xa4747dc7, (q31_t)0x5971e15f, (q31_t)0xa47019ac, (q31_t)0x596d62a9, (q31_t)0xa46bb5c9, (q31_t)0x5968e3bc, (q31_t)0xa467521e,
+  (q31_t)0x59646498, (q31_t)0xa462eeac, (q31_t)0x595fe53c, (q31_t)0xa45e8b73, (q31_t)0x595b65aa, (q31_t)0xa45a2872, (q31_t)0x5956e5e0, (q31_t)0xa455c5a9,
+  (q31_t)0x595265df, (q31_t)0xa4516319, (q31_t)0x594de5a7, (q31_t)0xa44d00c2, (q31_t)0x59496538, (q31_t)0xa4489ea3, (q31_t)0x5944e492, (q31_t)0xa4443cbd,
+  (q31_t)0x594063b5, (q31_t)0xa43fdb10, (q31_t)0x593be2a0, (q31_t)0xa43b799a, (q31_t)0x59376155, (q31_t)0xa437185e, (q31_t)0x5932dfd3, (q31_t)0xa432b75a,
+  (q31_t)0x592e5e19, (q31_t)0xa42e568f, (q31_t)0x5929dc29, (q31_t)0xa429f5fd, (q31_t)0x59255a02, (q31_t)0xa42595a3, (q31_t)0x5920d7a3, (q31_t)0xa4213581,
+  (q31_t)0x591c550e, (q31_t)0xa41cd599, (q31_t)0x5917d242, (q31_t)0xa41875e9, (q31_t)0x59134f3e, (q31_t)0xa4141672, (q31_t)0x590ecc04, (q31_t)0xa40fb733,
+  (q31_t)0x590a4893, (q31_t)0xa40b582e, (q31_t)0x5905c4eb, (q31_t)0xa406f960, (q31_t)0x5901410c, (q31_t)0xa4029acc, (q31_t)0x58fcbcf6, (q31_t)0xa3fe3c71,
+  (q31_t)0x58f838a9, (q31_t)0xa3f9de4e, (q31_t)0x58f3b426, (q31_t)0xa3f58064, (q31_t)0x58ef2f6b, (q31_t)0xa3f122b2, (q31_t)0x58eaaa7a, (q31_t)0xa3ecc53a,
+  (q31_t)0x58e62552, (q31_t)0xa3e867fa, (q31_t)0x58e19ff3, (q31_t)0xa3e40af3, (q31_t)0x58dd1a5d, (q31_t)0xa3dfae25, (q31_t)0x58d89490, (q31_t)0xa3db5190,
+  (q31_t)0x58d40e8c, (q31_t)0xa3d6f534, (q31_t)0x58cf8852, (q31_t)0xa3d29910, (q31_t)0x58cb01e1, (q31_t)0xa3ce3d25, (q31_t)0x58c67b39, (q31_t)0xa3c9e174,
+  (q31_t)0x58c1f45b, (q31_t)0xa3c585fb, (q31_t)0x58bd6d45, (q31_t)0xa3c12abb, (q31_t)0x58b8e5f9, (q31_t)0xa3bccfb3, (q31_t)0x58b45e76, (q31_t)0xa3b874e5,
+  (q31_t)0x58afd6bd, (q31_t)0xa3b41a50, (q31_t)0x58ab4ecc, (q31_t)0xa3afbff3, (q31_t)0x58a6c6a5, (q31_t)0xa3ab65d0, (q31_t)0x58a23e48, (q31_t)0xa3a70be6,
+  (q31_t)0x589db5b3, (q31_t)0xa3a2b234, (q31_t)0x58992ce9, (q31_t)0xa39e58bb, (q31_t)0x5894a3e7, (q31_t)0xa399ff7c, (q31_t)0x58901aaf, (q31_t)0xa395a675,
+  (q31_t)0x588b9140, (q31_t)0xa3914da8, (q31_t)0x5887079a, (q31_t)0xa38cf513, (q31_t)0x58827dbe, (q31_t)0xa3889cb8, (q31_t)0x587df3ab, (q31_t)0xa3844495,
+  (q31_t)0x58796962, (q31_t)0xa37fecac, (q31_t)0x5874dee2, (q31_t)0xa37b94fb, (q31_t)0x5870542c, (q31_t)0xa3773d84, (q31_t)0x586bc93f, (q31_t)0xa372e646,
+  (q31_t)0x58673e1b, (q31_t)0xa36e8f41, (q31_t)0x5862b2c1, (q31_t)0xa36a3875, (q31_t)0x585e2730, (q31_t)0xa365e1e2, (q31_t)0x58599b69, (q31_t)0xa3618b88,
+  (q31_t)0x58550f6c, (q31_t)0xa35d3567, (q31_t)0x58508338, (q31_t)0xa358df80, (q31_t)0x584bf6cd, (q31_t)0xa35489d1, (q31_t)0x58476a2c, (q31_t)0xa350345c,
+  (q31_t)0x5842dd54, (q31_t)0xa34bdf20, (q31_t)0x583e5047, (q31_t)0xa3478a1d, (q31_t)0x5839c302, (q31_t)0xa3433554, (q31_t)0x58353587, (q31_t)0xa33ee0c3,
+  (q31_t)0x5830a7d6, (q31_t)0xa33a8c6c, (q31_t)0x582c19ef, (q31_t)0xa336384e, (q31_t)0x58278bd1, (q31_t)0xa331e469, (q31_t)0x5822fd7c, (q31_t)0xa32d90be,
+  (q31_t)0x581e6ef1, (q31_t)0xa3293d4b, (q31_t)0x5819e030, (q31_t)0xa324ea13, (q31_t)0x58155139, (q31_t)0xa3209713, (q31_t)0x5810c20b, (q31_t)0xa31c444c,
+  (q31_t)0x580c32a7, (q31_t)0xa317f1bf, (q31_t)0x5807a30d, (q31_t)0xa3139f6b, (q31_t)0x5803133c, (q31_t)0xa30f4d51, (q31_t)0x57fe8335, (q31_t)0xa30afb70,
+  (q31_t)0x57f9f2f8, (q31_t)0xa306a9c8, (q31_t)0x57f56284, (q31_t)0xa3025859, (q31_t)0x57f0d1da, (q31_t)0xa2fe0724, (q31_t)0x57ec40fa, (q31_t)0xa2f9b629,
+  (q31_t)0x57e7afe4, (q31_t)0xa2f56566, (q31_t)0x57e31e97, (q31_t)0xa2f114dd, (q31_t)0x57de8d15, (q31_t)0xa2ecc48e, (q31_t)0x57d9fb5c, (q31_t)0xa2e87477,
+  (q31_t)0x57d5696d, (q31_t)0xa2e4249b, (q31_t)0x57d0d747, (q31_t)0xa2dfd4f7, (q31_t)0x57cc44ec, (q31_t)0xa2db858e, (q31_t)0x57c7b25a, (q31_t)0xa2d7365d,
+  (q31_t)0x57c31f92, (q31_t)0xa2d2e766, (q31_t)0x57be8c94, (q31_t)0xa2ce98a9, (q31_t)0x57b9f960, (q31_t)0xa2ca4a25, (q31_t)0x57b565f6, (q31_t)0xa2c5fbda,
+  (q31_t)0x57b0d256, (q31_t)0xa2c1adc9, (q31_t)0x57ac3e80, (q31_t)0xa2bd5ff2, (q31_t)0x57a7aa73, (q31_t)0xa2b91254, (q31_t)0x57a31631, (q31_t)0xa2b4c4f0,
+  (q31_t)0x579e81b8, (q31_t)0xa2b077c5, (q31_t)0x5799ed0a, (q31_t)0xa2ac2ad3, (q31_t)0x57955825, (q31_t)0xa2a7de1c, (q31_t)0x5790c30a, (q31_t)0xa2a3919e,
+  (q31_t)0x578c2dba, (q31_t)0xa29f4559, (q31_t)0x57879833, (q31_t)0xa29af94e, (q31_t)0x57830276, (q31_t)0xa296ad7d, (q31_t)0x577e6c84, (q31_t)0xa29261e5,
+  (q31_t)0x5779d65b, (q31_t)0xa28e1687, (q31_t)0x57753ffc, (q31_t)0xa289cb63, (q31_t)0x5770a968, (q31_t)0xa2858078, (q31_t)0x576c129d, (q31_t)0xa28135c7,
+  (q31_t)0x57677b9d, (q31_t)0xa27ceb4f, (q31_t)0x5762e467, (q31_t)0xa278a111, (q31_t)0x575e4cfa, (q31_t)0xa274570d, (q31_t)0x5759b558, (q31_t)0xa2700d43,
+  (q31_t)0x57551d80, (q31_t)0xa26bc3b2, (q31_t)0x57508572, (q31_t)0xa2677a5b, (q31_t)0x574bed2f, (q31_t)0xa263313e, (q31_t)0x574754b5, (q31_t)0xa25ee85b,
+  (q31_t)0x5742bc06, (q31_t)0xa25a9fb1, (q31_t)0x573e2320, (q31_t)0xa2565741, (q31_t)0x57398a05, (q31_t)0xa2520f0b, (q31_t)0x5734f0b5, (q31_t)0xa24dc70f,
+  (q31_t)0x5730572e, (q31_t)0xa2497f4c, (q31_t)0x572bbd71, (q31_t)0xa24537c3, (q31_t)0x5727237f, (q31_t)0xa240f074, (q31_t)0x57228957, (q31_t)0xa23ca95f,
+  (q31_t)0x571deefa, (q31_t)0xa2386284, (q31_t)0x57195466, (q31_t)0xa2341be3, (q31_t)0x5714b99d, (q31_t)0xa22fd57b, (q31_t)0x57101e9e, (q31_t)0xa22b8f4d,
+  (q31_t)0x570b8369, (q31_t)0xa2274959, (q31_t)0x5706e7ff, (q31_t)0xa223039f, (q31_t)0x57024c5f, (q31_t)0xa21ebe1f, (q31_t)0x56fdb08a, (q31_t)0xa21a78d9,
+  (q31_t)0x56f9147e, (q31_t)0xa21633cd, (q31_t)0x56f4783d, (q31_t)0xa211eefb, (q31_t)0x56efdbc7, (q31_t)0xa20daa62, (q31_t)0x56eb3f1a, (q31_t)0xa2096604,
+  (q31_t)0x56e6a239, (q31_t)0xa20521e0, (q31_t)0x56e20521, (q31_t)0xa200ddf5, (q31_t)0x56dd67d4, (q31_t)0xa1fc9a45, (q31_t)0x56d8ca51, (q31_t)0xa1f856ce,
+  (q31_t)0x56d42c99, (q31_t)0xa1f41392, (q31_t)0x56cf8eab, (q31_t)0xa1efd08f, (q31_t)0x56caf088, (q31_t)0xa1eb8dc7, (q31_t)0x56c6522f, (q31_t)0xa1e74b38,
+  (q31_t)0x56c1b3a1, (q31_t)0xa1e308e4, (q31_t)0x56bd14dd, (q31_t)0xa1dec6ca, (q31_t)0x56b875e4, (q31_t)0xa1da84e9, (q31_t)0x56b3d6b5, (q31_t)0xa1d64343,
+  (q31_t)0x56af3750, (q31_t)0xa1d201d7, (q31_t)0x56aa97b7, (q31_t)0xa1cdc0a5, (q31_t)0x56a5f7e7, (q31_t)0xa1c97fad, (q31_t)0x56a157e3, (q31_t)0xa1c53ef0,
+  (q31_t)0x569cb7a8, (q31_t)0xa1c0fe6c, (q31_t)0x56981739, (q31_t)0xa1bcbe22, (q31_t)0x56937694, (q31_t)0xa1b87e13, (q31_t)0x568ed5b9, (q31_t)0xa1b43e3e,
+  (q31_t)0x568a34a9, (q31_t)0xa1affea3, (q31_t)0x56859364, (q31_t)0xa1abbf42, (q31_t)0x5680f1ea, (q31_t)0xa1a7801b, (q31_t)0x567c503a, (q31_t)0xa1a3412f,
+  (q31_t)0x5677ae54, (q31_t)0xa19f027c, (q31_t)0x56730c3a, (q31_t)0xa19ac404, (q31_t)0x566e69ea, (q31_t)0xa19685c7, (q31_t)0x5669c765, (q31_t)0xa19247c3,
+  (q31_t)0x566524aa, (q31_t)0xa18e09fa, (q31_t)0x566081ba, (q31_t)0xa189cc6b, (q31_t)0x565bde95, (q31_t)0xa1858f16, (q31_t)0x56573b3b, (q31_t)0xa18151fb,
+  (q31_t)0x565297ab, (q31_t)0xa17d151b, (q31_t)0x564df3e6, (q31_t)0xa178d875, (q31_t)0x56494fec, (q31_t)0xa1749c09, (q31_t)0x5644abbc, (q31_t)0xa1705fd8,
+  (q31_t)0x56400758, (q31_t)0xa16c23e1, (q31_t)0x563b62be, (q31_t)0xa167e824, (q31_t)0x5636bdef, (q31_t)0xa163aca2, (q31_t)0x563218eb, (q31_t)0xa15f715a,
+  (q31_t)0x562d73b2, (q31_t)0xa15b364d, (q31_t)0x5628ce43, (q31_t)0xa156fb79, (q31_t)0x5624289f, (q31_t)0xa152c0e1, (q31_t)0x561f82c7, (q31_t)0xa14e8682,
+  (q31_t)0x561adcb9, (q31_t)0xa14a4c5e, (q31_t)0x56163676, (q31_t)0xa1461275, (q31_t)0x56118ffe, (q31_t)0xa141d8c5, (q31_t)0x560ce950, (q31_t)0xa13d9f51,
+  (q31_t)0x5608426e, (q31_t)0xa1396617, (q31_t)0x56039b57, (q31_t)0xa1352d17, (q31_t)0x55fef40a, (q31_t)0xa130f451, (q31_t)0x55fa4c89, (q31_t)0xa12cbbc7,
+  (q31_t)0x55f5a4d2, (q31_t)0xa1288376, (q31_t)0x55f0fce7, (q31_t)0xa1244b61, (q31_t)0x55ec54c6, (q31_t)0xa1201385, (q31_t)0x55e7ac71, (q31_t)0xa11bdbe4,
+  (q31_t)0x55e303e6, (q31_t)0xa117a47e, (q31_t)0x55de5b27, (q31_t)0xa1136d52, (q31_t)0x55d9b232, (q31_t)0xa10f3661, (q31_t)0x55d50909, (q31_t)0xa10affab,
+  (q31_t)0x55d05faa, (q31_t)0xa106c92f, (q31_t)0x55cbb617, (q31_t)0xa10292ed, (q31_t)0x55c70c4f, (q31_t)0xa0fe5ce6, (q31_t)0x55c26251, (q31_t)0xa0fa271a,
+  (q31_t)0x55bdb81f, (q31_t)0xa0f5f189, (q31_t)0x55b90db8, (q31_t)0xa0f1bc32, (q31_t)0x55b4631d, (q31_t)0xa0ed8715, (q31_t)0x55afb84c, (q31_t)0xa0e95234,
+  (q31_t)0x55ab0d46, (q31_t)0xa0e51d8c, (q31_t)0x55a6620c, (q31_t)0xa0e0e920, (q31_t)0x55a1b69d, (q31_t)0xa0dcb4ee, (q31_t)0x559d0af9, (q31_t)0xa0d880f7,
+  (q31_t)0x55985f20, (q31_t)0xa0d44d3b, (q31_t)0x5593b312, (q31_t)0xa0d019b9, (q31_t)0x558f06d0, (q31_t)0xa0cbe672, (q31_t)0x558a5a58, (q31_t)0xa0c7b366,
+  (q31_t)0x5585adad, (q31_t)0xa0c38095, (q31_t)0x558100cc, (q31_t)0xa0bf4dfe, (q31_t)0x557c53b6, (q31_t)0xa0bb1ba2, (q31_t)0x5577a66c, (q31_t)0xa0b6e981,
+  (q31_t)0x5572f8ed, (q31_t)0xa0b2b79b, (q31_t)0x556e4b39, (q31_t)0xa0ae85ef, (q31_t)0x55699d51, (q31_t)0xa0aa547e, (q31_t)0x5564ef34, (q31_t)0xa0a62348,
+  (q31_t)0x556040e2, (q31_t)0xa0a1f24d, (q31_t)0x555b925c, (q31_t)0xa09dc18d, (q31_t)0x5556e3a1, (q31_t)0xa0999107, (q31_t)0x555234b1, (q31_t)0xa09560bc,
+  (q31_t)0x554d858d, (q31_t)0xa09130ad, (q31_t)0x5548d634, (q31_t)0xa08d00d8, (q31_t)0x554426a7, (q31_t)0xa088d13e, (q31_t)0x553f76e4, (q31_t)0xa084a1de,
+  (q31_t)0x553ac6ee, (q31_t)0xa08072ba, (q31_t)0x553616c2, (q31_t)0xa07c43d1, (q31_t)0x55316663, (q31_t)0xa0781522, (q31_t)0x552cb5ce, (q31_t)0xa073e6af,
+  (q31_t)0x55280505, (q31_t)0xa06fb876, (q31_t)0x55235408, (q31_t)0xa06b8a78, (q31_t)0x551ea2d6, (q31_t)0xa0675cb6, (q31_t)0x5519f16f, (q31_t)0xa0632f2e,
+  (q31_t)0x55153fd4, (q31_t)0xa05f01e1, (q31_t)0x55108e05, (q31_t)0xa05ad4cf, (q31_t)0x550bdc01, (q31_t)0xa056a7f9, (q31_t)0x550729c9, (q31_t)0xa0527b5d,
+  (q31_t)0x5502775c, (q31_t)0xa04e4efc, (q31_t)0x54fdc4ba, (q31_t)0xa04a22d7, (q31_t)0x54f911e5, (q31_t)0xa045f6ec, (q31_t)0x54f45edb, (q31_t)0xa041cb3c,
+  (q31_t)0x54efab9c, (q31_t)0xa03d9fc8, (q31_t)0x54eaf829, (q31_t)0xa039748e, (q31_t)0x54e64482, (q31_t)0xa0354990, (q31_t)0x54e190a6, (q31_t)0xa0311ecd,
+  (q31_t)0x54dcdc96, (q31_t)0xa02cf444, (q31_t)0x54d82852, (q31_t)0xa028c9f7, (q31_t)0x54d373d9, (q31_t)0xa0249fe5, (q31_t)0x54cebf2c, (q31_t)0xa020760e,
+  (q31_t)0x54ca0a4b, (q31_t)0xa01c4c73, (q31_t)0x54c55535, (q31_t)0xa0182312, (q31_t)0x54c09feb, (q31_t)0xa013f9ed, (q31_t)0x54bbea6d, (q31_t)0xa00fd102,
+  (q31_t)0x54b734ba, (q31_t)0xa00ba853, (q31_t)0x54b27ed3, (q31_t)0xa0077fdf, (q31_t)0x54adc8b8, (q31_t)0xa00357a7, (q31_t)0x54a91269, (q31_t)0x9fff2fa9,
+  (q31_t)0x54a45be6, (q31_t)0x9ffb07e7, (q31_t)0x549fa52e, (q31_t)0x9ff6e060, (q31_t)0x549aee42, (q31_t)0x9ff2b914, (q31_t)0x54963722, (q31_t)0x9fee9204,
+  (q31_t)0x54917fce, (q31_t)0x9fea6b2f, (q31_t)0x548cc845, (q31_t)0x9fe64495, (q31_t)0x54881089, (q31_t)0x9fe21e36, (q31_t)0x54835898, (q31_t)0x9fddf812,
+  (q31_t)0x547ea073, (q31_t)0x9fd9d22a, (q31_t)0x5479e81a, (q31_t)0x9fd5ac7d, (q31_t)0x54752f8d, (q31_t)0x9fd1870c, (q31_t)0x547076cc, (q31_t)0x9fcd61d6,
+  (q31_t)0x546bbdd7, (q31_t)0x9fc93cdb, (q31_t)0x546704ae, (q31_t)0x9fc5181b, (q31_t)0x54624b50, (q31_t)0x9fc0f397, (q31_t)0x545d91bf, (q31_t)0x9fbccf4f,
+  (q31_t)0x5458d7f9, (q31_t)0x9fb8ab41, (q31_t)0x54541e00, (q31_t)0x9fb4876f, (q31_t)0x544f63d2, (q31_t)0x9fb063d9, (q31_t)0x544aa971, (q31_t)0x9fac407e,
+  (q31_t)0x5445eedb, (q31_t)0x9fa81d5e, (q31_t)0x54413412, (q31_t)0x9fa3fa79, (q31_t)0x543c7914, (q31_t)0x9f9fd7d1, (q31_t)0x5437bde3, (q31_t)0x9f9bb563,
+  (q31_t)0x5433027d, (q31_t)0x9f979331, (q31_t)0x542e46e4, (q31_t)0x9f93713b, (q31_t)0x54298b17, (q31_t)0x9f8f4f80, (q31_t)0x5424cf16, (q31_t)0x9f8b2e00,
+  (q31_t)0x542012e1, (q31_t)0x9f870cbc, (q31_t)0x541b5678, (q31_t)0x9f82ebb4, (q31_t)0x541699db, (q31_t)0x9f7ecae7, (q31_t)0x5411dd0a, (q31_t)0x9f7aaa55,
+  (q31_t)0x540d2005, (q31_t)0x9f7689ff, (q31_t)0x540862cd, (q31_t)0x9f7269e5, (q31_t)0x5403a561, (q31_t)0x9f6e4a06, (q31_t)0x53fee7c1, (q31_t)0x9f6a2a63,
+  (q31_t)0x53fa29ed, (q31_t)0x9f660afb, (q31_t)0x53f56be5, (q31_t)0x9f61ebcf, (q31_t)0x53f0adaa, (q31_t)0x9f5dccde, (q31_t)0x53ebef3a, (q31_t)0x9f59ae29,
+  (q31_t)0x53e73097, (q31_t)0x9f558fb0, (q31_t)0x53e271c0, (q31_t)0x9f517173, (q31_t)0x53ddb2b6, (q31_t)0x9f4d5371, (q31_t)0x53d8f378, (q31_t)0x9f4935aa,
+  (q31_t)0x53d43406, (q31_t)0x9f45181f, (q31_t)0x53cf7460, (q31_t)0x9f40fad0, (q31_t)0x53cab486, (q31_t)0x9f3cddbd, (q31_t)0x53c5f479, (q31_t)0x9f38c0e5,
+  (q31_t)0x53c13439, (q31_t)0x9f34a449, (q31_t)0x53bc73c4, (q31_t)0x9f3087e9, (q31_t)0x53b7b31c, (q31_t)0x9f2c6bc5, (q31_t)0x53b2f240, (q31_t)0x9f284fdc,
+  (q31_t)0x53ae3131, (q31_t)0x9f24342f, (q31_t)0x53a96fee, (q31_t)0x9f2018bd, (q31_t)0x53a4ae77, (q31_t)0x9f1bfd88, (q31_t)0x539feccd, (q31_t)0x9f17e28e,
+  (q31_t)0x539b2af0, (q31_t)0x9f13c7d0, (q31_t)0x539668de, (q31_t)0x9f0fad4e, (q31_t)0x5391a699, (q31_t)0x9f0b9307, (q31_t)0x538ce421, (q31_t)0x9f0778fd,
+  (q31_t)0x53882175, (q31_t)0x9f035f2e, (q31_t)0x53835e95, (q31_t)0x9eff459b, (q31_t)0x537e9b82, (q31_t)0x9efb2c44, (q31_t)0x5379d83c, (q31_t)0x9ef71328,
+  (q31_t)0x537514c2, (q31_t)0x9ef2fa49, (q31_t)0x53705114, (q31_t)0x9eeee1a5, (q31_t)0x536b8d33, (q31_t)0x9eeac93e, (q31_t)0x5366c91f, (q31_t)0x9ee6b112,
+  (q31_t)0x536204d7, (q31_t)0x9ee29922, (q31_t)0x535d405c, (q31_t)0x9ede816e, (q31_t)0x53587bad, (q31_t)0x9eda69f6, (q31_t)0x5353b6cb, (q31_t)0x9ed652ba,
+  (q31_t)0x534ef1b5, (q31_t)0x9ed23bb9, (q31_t)0x534a2c6c, (q31_t)0x9ece24f5, (q31_t)0x534566f0, (q31_t)0x9eca0e6d, (q31_t)0x5340a140, (q31_t)0x9ec5f820,
+  (q31_t)0x533bdb5d, (q31_t)0x9ec1e210, (q31_t)0x53371547, (q31_t)0x9ebdcc3b, (q31_t)0x53324efd, (q31_t)0x9eb9b6a3, (q31_t)0x532d8880, (q31_t)0x9eb5a146,
+  (q31_t)0x5328c1d0, (q31_t)0x9eb18c26, (q31_t)0x5323faec, (q31_t)0x9ead7742, (q31_t)0x531f33d5, (q31_t)0x9ea96299, (q31_t)0x531a6c8b, (q31_t)0x9ea54e2d,
+  (q31_t)0x5315a50e, (q31_t)0x9ea139fd, (q31_t)0x5310dd5d, (q31_t)0x9e9d2608, (q31_t)0x530c1579, (q31_t)0x9e991250, (q31_t)0x53074d62, (q31_t)0x9e94fed4,
+  (q31_t)0x53028518, (q31_t)0x9e90eb94, (q31_t)0x52fdbc9a, (q31_t)0x9e8cd890, (q31_t)0x52f8f3e9, (q31_t)0x9e88c5c9, (q31_t)0x52f42b05, (q31_t)0x9e84b33d,
+  (q31_t)0x52ef61ee, (q31_t)0x9e80a0ee, (q31_t)0x52ea98a4, (q31_t)0x9e7c8eda, (q31_t)0x52e5cf27, (q31_t)0x9e787d03, (q31_t)0x52e10576, (q31_t)0x9e746b68,
+  (q31_t)0x52dc3b92, (q31_t)0x9e705a09, (q31_t)0x52d7717b, (q31_t)0x9e6c48e7, (q31_t)0x52d2a732, (q31_t)0x9e683800, (q31_t)0x52cddcb5, (q31_t)0x9e642756,
+  (q31_t)0x52c91204, (q31_t)0x9e6016e8, (q31_t)0x52c44721, (q31_t)0x9e5c06b6, (q31_t)0x52bf7c0b, (q31_t)0x9e57f6c0, (q31_t)0x52bab0c2, (q31_t)0x9e53e707,
+  (q31_t)0x52b5e546, (q31_t)0x9e4fd78a, (q31_t)0x52b11996, (q31_t)0x9e4bc849, (q31_t)0x52ac4db4, (q31_t)0x9e47b944, (q31_t)0x52a7819f, (q31_t)0x9e43aa7c,
+  (q31_t)0x52a2b556, (q31_t)0x9e3f9bf0, (q31_t)0x529de8db, (q31_t)0x9e3b8da0, (q31_t)0x52991c2d, (q31_t)0x9e377f8c, (q31_t)0x52944f4c, (q31_t)0x9e3371b5,
+  (q31_t)0x528f8238, (q31_t)0x9e2f641b, (q31_t)0x528ab4f1, (q31_t)0x9e2b56bc, (q31_t)0x5285e777, (q31_t)0x9e27499a, (q31_t)0x528119ca, (q31_t)0x9e233cb4,
+  (q31_t)0x527c4bea, (q31_t)0x9e1f300b, (q31_t)0x52777dd7, (q31_t)0x9e1b239e, (q31_t)0x5272af92, (q31_t)0x9e17176d, (q31_t)0x526de11a, (q31_t)0x9e130b79,
+  (q31_t)0x5269126e, (q31_t)0x9e0effc1, (q31_t)0x52644390, (q31_t)0x9e0af446, (q31_t)0x525f7480, (q31_t)0x9e06e907, (q31_t)0x525aa53c, (q31_t)0x9e02de04,
+  (q31_t)0x5255d5c5, (q31_t)0x9dfed33e, (q31_t)0x5251061c, (q31_t)0x9dfac8b4, (q31_t)0x524c3640, (q31_t)0x9df6be67, (q31_t)0x52476631, (q31_t)0x9df2b456,
+  (q31_t)0x524295f0, (q31_t)0x9deeaa82, (q31_t)0x523dc57b, (q31_t)0x9deaa0ea, (q31_t)0x5238f4d4, (q31_t)0x9de6978f, (q31_t)0x523423fb, (q31_t)0x9de28e70,
+  (q31_t)0x522f52ee, (q31_t)0x9dde858e, (q31_t)0x522a81af, (q31_t)0x9dda7ce9, (q31_t)0x5225b03d, (q31_t)0x9dd6747f, (q31_t)0x5220de99, (q31_t)0x9dd26c53,
+  (q31_t)0x521c0cc2, (q31_t)0x9dce6463, (q31_t)0x52173ab8, (q31_t)0x9dca5caf, (q31_t)0x5212687b, (q31_t)0x9dc65539, (q31_t)0x520d960c, (q31_t)0x9dc24dfe,
+  (q31_t)0x5208c36a, (q31_t)0x9dbe4701, (q31_t)0x5203f096, (q31_t)0x9dba4040, (q31_t)0x51ff1d8f, (q31_t)0x9db639bb, (q31_t)0x51fa4a56, (q31_t)0x9db23373,
+  (q31_t)0x51f576ea, (q31_t)0x9dae2d68, (q31_t)0x51f0a34b, (q31_t)0x9daa279a, (q31_t)0x51ebcf7a, (q31_t)0x9da62208, (q31_t)0x51e6fb76, (q31_t)0x9da21cb2,
+  (q31_t)0x51e22740, (q31_t)0x9d9e179a, (q31_t)0x51dd52d7, (q31_t)0x9d9a12be, (q31_t)0x51d87e3c, (q31_t)0x9d960e1f, (q31_t)0x51d3a96f, (q31_t)0x9d9209bd,
+  (q31_t)0x51ced46e, (q31_t)0x9d8e0597, (q31_t)0x51c9ff3c, (q31_t)0x9d8a01ae, (q31_t)0x51c529d7, (q31_t)0x9d85fe02, (q31_t)0x51c0543f, (q31_t)0x9d81fa92,
+  (q31_t)0x51bb7e75, (q31_t)0x9d7df75f, (q31_t)0x51b6a879, (q31_t)0x9d79f469, (q31_t)0x51b1d24a, (q31_t)0x9d75f1b0, (q31_t)0x51acfbe9, (q31_t)0x9d71ef34,
+  (q31_t)0x51a82555, (q31_t)0x9d6decf4, (q31_t)0x51a34e8f, (q31_t)0x9d69eaf1, (q31_t)0x519e7797, (q31_t)0x9d65e92b, (q31_t)0x5199a06d, (q31_t)0x9d61e7a2,
+  (q31_t)0x5194c910, (q31_t)0x9d5de656, (q31_t)0x518ff180, (q31_t)0x9d59e546, (q31_t)0x518b19bf, (q31_t)0x9d55e473, (q31_t)0x518641cb, (q31_t)0x9d51e3dd,
+  (q31_t)0x518169a5, (q31_t)0x9d4de385, (q31_t)0x517c914c, (q31_t)0x9d49e368, (q31_t)0x5177b8c2, (q31_t)0x9d45e389, (q31_t)0x5172e005, (q31_t)0x9d41e3e7,
+  (q31_t)0x516e0715, (q31_t)0x9d3de482, (q31_t)0x51692df4, (q31_t)0x9d39e559, (q31_t)0x516454a0, (q31_t)0x9d35e66e, (q31_t)0x515f7b1a, (q31_t)0x9d31e7bf,
+  (q31_t)0x515aa162, (q31_t)0x9d2de94d, (q31_t)0x5155c778, (q31_t)0x9d29eb19, (q31_t)0x5150ed5c, (q31_t)0x9d25ed21, (q31_t)0x514c130d, (q31_t)0x9d21ef66,
+  (q31_t)0x5147388c, (q31_t)0x9d1df1e9, (q31_t)0x51425dd9, (q31_t)0x9d19f4a8, (q31_t)0x513d82f4, (q31_t)0x9d15f7a4, (q31_t)0x5138a7dd, (q31_t)0x9d11fadd,
+  (q31_t)0x5133cc94, (q31_t)0x9d0dfe54, (q31_t)0x512ef119, (q31_t)0x9d0a0207, (q31_t)0x512a156b, (q31_t)0x9d0605f7, (q31_t)0x5125398c, (q31_t)0x9d020a25,
+  (q31_t)0x51205d7b, (q31_t)0x9cfe0e8f, (q31_t)0x511b8137, (q31_t)0x9cfa1337, (q31_t)0x5116a4c1, (q31_t)0x9cf6181c, (q31_t)0x5111c81a, (q31_t)0x9cf21d3d,
+  (q31_t)0x510ceb40, (q31_t)0x9cee229c, (q31_t)0x51080e35, (q31_t)0x9cea2838, (q31_t)0x510330f7, (q31_t)0x9ce62e11, (q31_t)0x50fe5388, (q31_t)0x9ce23427,
+  (q31_t)0x50f975e6, (q31_t)0x9cde3a7b, (q31_t)0x50f49813, (q31_t)0x9cda410b, (q31_t)0x50efba0d, (q31_t)0x9cd647d9, (q31_t)0x50eadbd6, (q31_t)0x9cd24ee4,
+  (q31_t)0x50e5fd6d, (q31_t)0x9cce562c, (q31_t)0x50e11ed2, (q31_t)0x9cca5db1, (q31_t)0x50dc4005, (q31_t)0x9cc66573, (q31_t)0x50d76106, (q31_t)0x9cc26d73,
+  (q31_t)0x50d281d5, (q31_t)0x9cbe75b0, (q31_t)0x50cda272, (q31_t)0x9cba7e2a, (q31_t)0x50c8c2de, (q31_t)0x9cb686e1, (q31_t)0x50c3e317, (q31_t)0x9cb28fd5,
+  (q31_t)0x50bf031f, (q31_t)0x9cae9907, (q31_t)0x50ba22f5, (q31_t)0x9caaa276, (q31_t)0x50b5429a, (q31_t)0x9ca6ac23, (q31_t)0x50b0620c, (q31_t)0x9ca2b60c,
+  (q31_t)0x50ab814d, (q31_t)0x9c9ec033, (q31_t)0x50a6a05c, (q31_t)0x9c9aca97, (q31_t)0x50a1bf39, (q31_t)0x9c96d539, (q31_t)0x509cdde4, (q31_t)0x9c92e017,
+  (q31_t)0x5097fc5e, (q31_t)0x9c8eeb34, (q31_t)0x50931aa6, (q31_t)0x9c8af68d, (q31_t)0x508e38bd, (q31_t)0x9c870224, (q31_t)0x508956a1, (q31_t)0x9c830df8,
+  (q31_t)0x50847454, (q31_t)0x9c7f1a0a, (q31_t)0x507f91d5, (q31_t)0x9c7b2659, (q31_t)0x507aaf25, (q31_t)0x9c7732e5, (q31_t)0x5075cc43, (q31_t)0x9c733faf,
+  (q31_t)0x5070e92f, (q31_t)0x9c6f4cb6, (q31_t)0x506c05ea, (q31_t)0x9c6b59fa, (q31_t)0x50672273, (q31_t)0x9c67677c, (q31_t)0x50623ecb, (q31_t)0x9c63753c,
+  (q31_t)0x505d5af1, (q31_t)0x9c5f8339, (q31_t)0x505876e5, (q31_t)0x9c5b9173, (q31_t)0x505392a8, (q31_t)0x9c579feb, (q31_t)0x504eae39, (q31_t)0x9c53aea0,
+  (q31_t)0x5049c999, (q31_t)0x9c4fbd93, (q31_t)0x5044e4c7, (q31_t)0x9c4bccc3, (q31_t)0x503fffc4, (q31_t)0x9c47dc31, (q31_t)0x503b1a8f, (q31_t)0x9c43ebdc,
+  (q31_t)0x50363529, (q31_t)0x9c3ffbc5, (q31_t)0x50314f91, (q31_t)0x9c3c0beb, (q31_t)0x502c69c8, (q31_t)0x9c381c4f, (q31_t)0x502783cd, (q31_t)0x9c342cf0,
+  (q31_t)0x50229da1, (q31_t)0x9c303dcf, (q31_t)0x501db743, (q31_t)0x9c2c4eec, (q31_t)0x5018d0b4, (q31_t)0x9c286046, (q31_t)0x5013e9f4, (q31_t)0x9c2471de,
+  (q31_t)0x500f0302, (q31_t)0x9c2083b3, (q31_t)0x500a1bdf, (q31_t)0x9c1c95c6, (q31_t)0x5005348a, (q31_t)0x9c18a816, (q31_t)0x50004d04, (q31_t)0x9c14baa4,
+  (q31_t)0x4ffb654d, (q31_t)0x9c10cd70, (q31_t)0x4ff67d64, (q31_t)0x9c0ce07a, (q31_t)0x4ff1954b, (q31_t)0x9c08f3c1, (q31_t)0x4fecacff, (q31_t)0x9c050745,
+  (q31_t)0x4fe7c483, (q31_t)0x9c011b08, (q31_t)0x4fe2dbd5, (q31_t)0x9bfd2f08, (q31_t)0x4fddf2f6, (q31_t)0x9bf94346, (q31_t)0x4fd909e5, (q31_t)0x9bf557c1,
+  (q31_t)0x4fd420a4, (q31_t)0x9bf16c7a, (q31_t)0x4fcf3731, (q31_t)0x9bed8171, (q31_t)0x4fca4d8d, (q31_t)0x9be996a6, (q31_t)0x4fc563b7, (q31_t)0x9be5ac18,
+  (q31_t)0x4fc079b1, (q31_t)0x9be1c1c8, (q31_t)0x4fbb8f79, (q31_t)0x9bddd7b6, (q31_t)0x4fb6a510, (q31_t)0x9bd9ede2, (q31_t)0x4fb1ba76, (q31_t)0x9bd6044b,
+  (q31_t)0x4faccfab, (q31_t)0x9bd21af3, (q31_t)0x4fa7e4af, (q31_t)0x9bce31d8, (q31_t)0x4fa2f981, (q31_t)0x9bca48fa, (q31_t)0x4f9e0e22, (q31_t)0x9bc6605b,
+  (q31_t)0x4f992293, (q31_t)0x9bc277fa, (q31_t)0x4f9436d2, (q31_t)0x9bbe8fd6, (q31_t)0x4f8f4ae0, (q31_t)0x9bbaa7f0, (q31_t)0x4f8a5ebd, (q31_t)0x9bb6c048,
+  (q31_t)0x4f857269, (q31_t)0x9bb2d8de, (q31_t)0x4f8085e4, (q31_t)0x9baef1b2, (q31_t)0x4f7b992d, (q31_t)0x9bab0ac3, (q31_t)0x4f76ac46, (q31_t)0x9ba72413,
+  (q31_t)0x4f71bf2e, (q31_t)0x9ba33da0, (q31_t)0x4f6cd1e5, (q31_t)0x9b9f576b, (q31_t)0x4f67e46a, (q31_t)0x9b9b7174, (q31_t)0x4f62f6bf, (q31_t)0x9b978bbc,
+  (q31_t)0x4f5e08e3, (q31_t)0x9b93a641, (q31_t)0x4f591ad6, (q31_t)0x9b8fc104, (q31_t)0x4f542c98, (q31_t)0x9b8bdc05, (q31_t)0x4f4f3e29, (q31_t)0x9b87f744,
+  (q31_t)0x4f4a4f89, (q31_t)0x9b8412c1, (q31_t)0x4f4560b8, (q31_t)0x9b802e7b, (q31_t)0x4f4071b6, (q31_t)0x9b7c4a74, (q31_t)0x4f3b8284, (q31_t)0x9b7866ab,
+  (q31_t)0x4f369320, (q31_t)0x9b748320, (q31_t)0x4f31a38c, (q31_t)0x9b709fd3, (q31_t)0x4f2cb3c7, (q31_t)0x9b6cbcc4, (q31_t)0x4f27c3d1, (q31_t)0x9b68d9f3,
+  (q31_t)0x4f22d3aa, (q31_t)0x9b64f760, (q31_t)0x4f1de352, (q31_t)0x9b61150b, (q31_t)0x4f18f2c9, (q31_t)0x9b5d32f4, (q31_t)0x4f140210, (q31_t)0x9b59511c,
+  (q31_t)0x4f0f1126, (q31_t)0x9b556f81, (q31_t)0x4f0a200b, (q31_t)0x9b518e24, (q31_t)0x4f052ec0, (q31_t)0x9b4dad06, (q31_t)0x4f003d43, (q31_t)0x9b49cc26,
+  (q31_t)0x4efb4b96, (q31_t)0x9b45eb83, (q31_t)0x4ef659b8, (q31_t)0x9b420b1f, (q31_t)0x4ef167aa, (q31_t)0x9b3e2af9, (q31_t)0x4eec756b, (q31_t)0x9b3a4b11,
+  (q31_t)0x4ee782fb, (q31_t)0x9b366b68, (q31_t)0x4ee2905a, (q31_t)0x9b328bfc, (q31_t)0x4edd9d89, (q31_t)0x9b2eaccf, (q31_t)0x4ed8aa87, (q31_t)0x9b2acde0,
+  (q31_t)0x4ed3b755, (q31_t)0x9b26ef2f, (q31_t)0x4ecec3f2, (q31_t)0x9b2310bc, (q31_t)0x4ec9d05e, (q31_t)0x9b1f3288, (q31_t)0x4ec4dc99, (q31_t)0x9b1b5492,
+  (q31_t)0x4ebfe8a5, (q31_t)0x9b1776da, (q31_t)0x4ebaf47f, (q31_t)0x9b139960, (q31_t)0x4eb60029, (q31_t)0x9b0fbc24, (q31_t)0x4eb10ba2, (q31_t)0x9b0bdf27,
+  (q31_t)0x4eac16eb, (q31_t)0x9b080268, (q31_t)0x4ea72203, (q31_t)0x9b0425e8, (q31_t)0x4ea22ceb, (q31_t)0x9b0049a5, (q31_t)0x4e9d37a3, (q31_t)0x9afc6da1,
+  (q31_t)0x4e984229, (q31_t)0x9af891db, (q31_t)0x4e934c80, (q31_t)0x9af4b654, (q31_t)0x4e8e56a5, (q31_t)0x9af0db0b, (q31_t)0x4e89609b, (q31_t)0x9aed0000,
+  (q31_t)0x4e846a60, (q31_t)0x9ae92533, (q31_t)0x4e7f73f4, (q31_t)0x9ae54aa5, (q31_t)0x4e7a7d58, (q31_t)0x9ae17056, (q31_t)0x4e75868c, (q31_t)0x9add9644,
+  (q31_t)0x4e708f8f, (q31_t)0x9ad9bc71, (q31_t)0x4e6b9862, (q31_t)0x9ad5e2dd, (q31_t)0x4e66a105, (q31_t)0x9ad20987, (q31_t)0x4e61a977, (q31_t)0x9ace306f,
+  (q31_t)0x4e5cb1b9, (q31_t)0x9aca5795, (q31_t)0x4e57b9ca, (q31_t)0x9ac67efb, (q31_t)0x4e52c1ab, (q31_t)0x9ac2a69e, (q31_t)0x4e4dc95c, (q31_t)0x9abece80,
+  (q31_t)0x4e48d0dd, (q31_t)0x9abaf6a1, (q31_t)0x4e43d82d, (q31_t)0x9ab71eff, (q31_t)0x4e3edf4d, (q31_t)0x9ab3479d, (q31_t)0x4e39e63d, (q31_t)0x9aaf7079,
+  (q31_t)0x4e34ecfc, (q31_t)0x9aab9993, (q31_t)0x4e2ff38b, (q31_t)0x9aa7c2ec, (q31_t)0x4e2af9ea, (q31_t)0x9aa3ec83, (q31_t)0x4e260019, (q31_t)0x9aa01659,
+  (q31_t)0x4e210617, (q31_t)0x9a9c406e, (q31_t)0x4e1c0be6, (q31_t)0x9a986ac1, (q31_t)0x4e171184, (q31_t)0x9a949552, (q31_t)0x4e1216f2, (q31_t)0x9a90c022,
+  (q31_t)0x4e0d1c30, (q31_t)0x9a8ceb31, (q31_t)0x4e08213e, (q31_t)0x9a89167e, (q31_t)0x4e03261b, (q31_t)0x9a85420a, (q31_t)0x4dfe2ac9, (q31_t)0x9a816dd5,
+  (q31_t)0x4df92f46, (q31_t)0x9a7d99de, (q31_t)0x4df43393, (q31_t)0x9a79c625, (q31_t)0x4def37b0, (q31_t)0x9a75f2ac, (q31_t)0x4dea3b9d, (q31_t)0x9a721f71,
+  (q31_t)0x4de53f5a, (q31_t)0x9a6e4c74, (q31_t)0x4de042e7, (q31_t)0x9a6a79b6, (q31_t)0x4ddb4644, (q31_t)0x9a66a737, (q31_t)0x4dd64971, (q31_t)0x9a62d4f7,
+  (q31_t)0x4dd14c6e, (q31_t)0x9a5f02f5, (q31_t)0x4dcc4f3b, (q31_t)0x9a5b3132, (q31_t)0x4dc751d8, (q31_t)0x9a575fae, (q31_t)0x4dc25445, (q31_t)0x9a538e68,
+  (q31_t)0x4dbd5682, (q31_t)0x9a4fbd61, (q31_t)0x4db8588f, (q31_t)0x9a4bec99, (q31_t)0x4db35a6c, (q31_t)0x9a481c0f, (q31_t)0x4dae5c19, (q31_t)0x9a444bc5,
+  (q31_t)0x4da95d96, (q31_t)0x9a407bb9, (q31_t)0x4da45ee3, (q31_t)0x9a3cabeb, (q31_t)0x4d9f6001, (q31_t)0x9a38dc5d, (q31_t)0x4d9a60ee, (q31_t)0x9a350d0d,
+  (q31_t)0x4d9561ac, (q31_t)0x9a313dfc, (q31_t)0x4d90623a, (q31_t)0x9a2d6f2a, (q31_t)0x4d8b6298, (q31_t)0x9a29a097, (q31_t)0x4d8662c6, (q31_t)0x9a25d243,
+  (q31_t)0x4d8162c4, (q31_t)0x9a22042d, (q31_t)0x4d7c6293, (q31_t)0x9a1e3656, (q31_t)0x4d776231, (q31_t)0x9a1a68be, (q31_t)0x4d7261a0, (q31_t)0x9a169b65,
+  (q31_t)0x4d6d60df, (q31_t)0x9a12ce4b, (q31_t)0x4d685fef, (q31_t)0x9a0f016f, (q31_t)0x4d635ece, (q31_t)0x9a0b34d3, (q31_t)0x4d5e5d7e, (q31_t)0x9a076875,
+  (q31_t)0x4d595bfe, (q31_t)0x9a039c57, (q31_t)0x4d545a4f, (q31_t)0x99ffd077, (q31_t)0x4d4f5870, (q31_t)0x99fc04d6, (q31_t)0x4d4a5661, (q31_t)0x99f83974,
+  (q31_t)0x4d455422, (q31_t)0x99f46e51, (q31_t)0x4d4051b4, (q31_t)0x99f0a36d, (q31_t)0x4d3b4f16, (q31_t)0x99ecd8c8, (q31_t)0x4d364c48, (q31_t)0x99e90e62,
+  (q31_t)0x4d31494b, (q31_t)0x99e5443b, (q31_t)0x4d2c461e, (q31_t)0x99e17a53, (q31_t)0x4d2742c2, (q31_t)0x99ddb0aa, (q31_t)0x4d223f36, (q31_t)0x99d9e73f,
+  (q31_t)0x4d1d3b7a, (q31_t)0x99d61e14, (q31_t)0x4d18378f, (q31_t)0x99d25528, (q31_t)0x4d133374, (q31_t)0x99ce8c7b, (q31_t)0x4d0e2f2a, (q31_t)0x99cac40d,
+  (q31_t)0x4d092ab0, (q31_t)0x99c6fbde, (q31_t)0x4d042607, (q31_t)0x99c333ee, (q31_t)0x4cff212e, (q31_t)0x99bf6c3d, (q31_t)0x4cfa1c26, (q31_t)0x99bba4cb,
+  (q31_t)0x4cf516ee, (q31_t)0x99b7dd99, (q31_t)0x4cf01187, (q31_t)0x99b416a5, (q31_t)0x4ceb0bf0, (q31_t)0x99b04ff0, (q31_t)0x4ce6062a, (q31_t)0x99ac897b,
+  (q31_t)0x4ce10034, (q31_t)0x99a8c345, (q31_t)0x4cdbfa0f, (q31_t)0x99a4fd4d, (q31_t)0x4cd6f3bb, (q31_t)0x99a13795, (q31_t)0x4cd1ed37, (q31_t)0x999d721c,
+  (q31_t)0x4ccce684, (q31_t)0x9999ace3, (q31_t)0x4cc7dfa1, (q31_t)0x9995e7e8, (q31_t)0x4cc2d88f, (q31_t)0x9992232d, (q31_t)0x4cbdd14e, (q31_t)0x998e5eb1,
+  (q31_t)0x4cb8c9dd, (q31_t)0x998a9a74, (q31_t)0x4cb3c23d, (q31_t)0x9986d676, (q31_t)0x4caeba6e, (q31_t)0x998312b7, (q31_t)0x4ca9b26f, (q31_t)0x997f4f38,
+  (q31_t)0x4ca4aa41, (q31_t)0x997b8bf8, (q31_t)0x4c9fa1e4, (q31_t)0x9977c8f7, (q31_t)0x4c9a9958, (q31_t)0x99740635, (q31_t)0x4c95909c, (q31_t)0x997043b2,
+  (q31_t)0x4c9087b1, (q31_t)0x996c816f, (q31_t)0x4c8b7e97, (q31_t)0x9968bf6b, (q31_t)0x4c86754e, (q31_t)0x9964fda7, (q31_t)0x4c816bd5, (q31_t)0x99613c22,
+  (q31_t)0x4c7c622d, (q31_t)0x995d7adc, (q31_t)0x4c775856, (q31_t)0x9959b9d5, (q31_t)0x4c724e50, (q31_t)0x9955f90d, (q31_t)0x4c6d441b, (q31_t)0x99523885,
+  (q31_t)0x4c6839b7, (q31_t)0x994e783d, (q31_t)0x4c632f23, (q31_t)0x994ab833, (q31_t)0x4c5e2460, (q31_t)0x9946f869, (q31_t)0x4c59196f, (q31_t)0x994338df,
+  (q31_t)0x4c540e4e, (q31_t)0x993f7993, (q31_t)0x4c4f02fe, (q31_t)0x993bba87, (q31_t)0x4c49f77f, (q31_t)0x9937fbbb, (q31_t)0x4c44ebd1, (q31_t)0x99343d2e,
+  (q31_t)0x4c3fdff4, (q31_t)0x99307ee0, (q31_t)0x4c3ad3e7, (q31_t)0x992cc0d2, (q31_t)0x4c35c7ac, (q31_t)0x99290303, (q31_t)0x4c30bb42, (q31_t)0x99254574,
+  (q31_t)0x4c2baea9, (q31_t)0x99218824, (q31_t)0x4c26a1e1, (q31_t)0x991dcb13, (q31_t)0x4c2194e9, (q31_t)0x991a0e42, (q31_t)0x4c1c87c3, (q31_t)0x991651b1,
+  (q31_t)0x4c177a6e, (q31_t)0x9912955f, (q31_t)0x4c126cea, (q31_t)0x990ed94c, (q31_t)0x4c0d5f37, (q31_t)0x990b1d79, (q31_t)0x4c085156, (q31_t)0x990761e5,
+  (q31_t)0x4c034345, (q31_t)0x9903a691, (q31_t)0x4bfe3505, (q31_t)0x98ffeb7d, (q31_t)0x4bf92697, (q31_t)0x98fc30a8, (q31_t)0x4bf417f9, (q31_t)0x98f87612,
+  (q31_t)0x4bef092d, (q31_t)0x98f4bbbc, (q31_t)0x4be9fa32, (q31_t)0x98f101a6, (q31_t)0x4be4eb08, (q31_t)0x98ed47cf, (q31_t)0x4bdfdbaf, (q31_t)0x98e98e38,
+  (q31_t)0x4bdacc28, (q31_t)0x98e5d4e0, (q31_t)0x4bd5bc72, (q31_t)0x98e21bc8, (q31_t)0x4bd0ac8d, (q31_t)0x98de62f0, (q31_t)0x4bcb9c79, (q31_t)0x98daaa57,
+  (q31_t)0x4bc68c36, (q31_t)0x98d6f1fe, (q31_t)0x4bc17bc5, (q31_t)0x98d339e4, (q31_t)0x4bbc6b25, (q31_t)0x98cf820b, (q31_t)0x4bb75a56, (q31_t)0x98cbca70,
+  (q31_t)0x4bb24958, (q31_t)0x98c81316, (q31_t)0x4bad382c, (q31_t)0x98c45bfb, (q31_t)0x4ba826d1, (q31_t)0x98c0a520, (q31_t)0x4ba31548, (q31_t)0x98bcee84,
+  (q31_t)0x4b9e0390, (q31_t)0x98b93828, (q31_t)0x4b98f1a9, (q31_t)0x98b5820c, (q31_t)0x4b93df93, (q31_t)0x98b1cc30, (q31_t)0x4b8ecd4f, (q31_t)0x98ae1693,
+  (q31_t)0x4b89badd, (q31_t)0x98aa6136, (q31_t)0x4b84a83b, (q31_t)0x98a6ac19, (q31_t)0x4b7f956b, (q31_t)0x98a2f73c, (q31_t)0x4b7a826d, (q31_t)0x989f429e,
+  (q31_t)0x4b756f40, (q31_t)0x989b8e40, (q31_t)0x4b705be4, (q31_t)0x9897da22, (q31_t)0x4b6b485a, (q31_t)0x98942643, (q31_t)0x4b6634a2, (q31_t)0x989072a5,
+  (q31_t)0x4b6120bb, (q31_t)0x988cbf46, (q31_t)0x4b5c0ca5, (q31_t)0x98890c27, (q31_t)0x4b56f861, (q31_t)0x98855948, (q31_t)0x4b51e3ee, (q31_t)0x9881a6a9,
+  (q31_t)0x4b4ccf4d, (q31_t)0x987df449, (q31_t)0x4b47ba7e, (q31_t)0x987a422a, (q31_t)0x4b42a580, (q31_t)0x9876904a, (q31_t)0x4b3d9053, (q31_t)0x9872deaa,
+  (q31_t)0x4b387af9, (q31_t)0x986f2d4a, (q31_t)0x4b336570, (q31_t)0x986b7c2a, (q31_t)0x4b2e4fb8, (q31_t)0x9867cb4a, (q31_t)0x4b2939d2, (q31_t)0x98641aa9,
+  (q31_t)0x4b2423be, (q31_t)0x98606a49, (q31_t)0x4b1f0d7b, (q31_t)0x985cba28, (q31_t)0x4b19f70a, (q31_t)0x98590a48, (q31_t)0x4b14e06b, (q31_t)0x98555aa7,
+  (q31_t)0x4b0fc99d, (q31_t)0x9851ab46, (q31_t)0x4b0ab2a1, (q31_t)0x984dfc26, (q31_t)0x4b059b77, (q31_t)0x984a4d45, (q31_t)0x4b00841f, (q31_t)0x98469ea4,
+  (q31_t)0x4afb6c98, (q31_t)0x9842f043, (q31_t)0x4af654e3, (q31_t)0x983f4223, (q31_t)0x4af13d00, (q31_t)0x983b9442, (q31_t)0x4aec24ee, (q31_t)0x9837e6a1,
+  (q31_t)0x4ae70caf, (q31_t)0x98343940, (q31_t)0x4ae1f441, (q31_t)0x98308c1f, (q31_t)0x4adcdba5, (q31_t)0x982cdf3f, (q31_t)0x4ad7c2da, (q31_t)0x9829329e,
+  (q31_t)0x4ad2a9e2, (q31_t)0x9825863d, (q31_t)0x4acd90bb, (q31_t)0x9821da1d, (q31_t)0x4ac87767, (q31_t)0x981e2e3c, (q31_t)0x4ac35de4, (q31_t)0x981a829c,
+  (q31_t)0x4abe4433, (q31_t)0x9816d73b, (q31_t)0x4ab92a54, (q31_t)0x98132c1b, (q31_t)0x4ab41046, (q31_t)0x980f813b, (q31_t)0x4aaef60b, (q31_t)0x980bd69b,
+  (q31_t)0x4aa9dba2, (q31_t)0x98082c3b, (q31_t)0x4aa4c10b, (q31_t)0x9804821b, (q31_t)0x4a9fa645, (q31_t)0x9800d83c, (q31_t)0x4a9a8b52, (q31_t)0x97fd2e9c,
+  (q31_t)0x4a957030, (q31_t)0x97f9853d, (q31_t)0x4a9054e1, (q31_t)0x97f5dc1e, (q31_t)0x4a8b3963, (q31_t)0x97f2333f, (q31_t)0x4a861db8, (q31_t)0x97ee8aa0,
+  (q31_t)0x4a8101de, (q31_t)0x97eae242, (q31_t)0x4a7be5d7, (q31_t)0x97e73a23, (q31_t)0x4a76c9a2, (q31_t)0x97e39245, (q31_t)0x4a71ad3e, (q31_t)0x97dfeaa7,
+  (q31_t)0x4a6c90ad, (q31_t)0x97dc4349, (q31_t)0x4a6773ee, (q31_t)0x97d89c2c, (q31_t)0x4a625701, (q31_t)0x97d4f54f, (q31_t)0x4a5d39e6, (q31_t)0x97d14eb2,
+  (q31_t)0x4a581c9e, (q31_t)0x97cda855, (q31_t)0x4a52ff27, (q31_t)0x97ca0239, (q31_t)0x4a4de182, (q31_t)0x97c65c5c, (q31_t)0x4a48c3b0, (q31_t)0x97c2b6c1,
+  (q31_t)0x4a43a5b0, (q31_t)0x97bf1165, (q31_t)0x4a3e8782, (q31_t)0x97bb6c4a, (q31_t)0x4a396926, (q31_t)0x97b7c76f, (q31_t)0x4a344a9d, (q31_t)0x97b422d4,
+  (q31_t)0x4a2f2be6, (q31_t)0x97b07e7a, (q31_t)0x4a2a0d01, (q31_t)0x97acda60, (q31_t)0x4a24edee, (q31_t)0x97a93687, (q31_t)0x4a1fcead, (q31_t)0x97a592ed,
+  (q31_t)0x4a1aaf3f, (q31_t)0x97a1ef94, (q31_t)0x4a158fa3, (q31_t)0x979e4c7c, (q31_t)0x4a106fda, (q31_t)0x979aa9a4, (q31_t)0x4a0b4fe2, (q31_t)0x9797070c,
+  (q31_t)0x4a062fbd, (q31_t)0x979364b5, (q31_t)0x4a010f6b, (q31_t)0x978fc29e, (q31_t)0x49fbeeea, (q31_t)0x978c20c8, (q31_t)0x49f6ce3c, (q31_t)0x97887f32,
+  (q31_t)0x49f1ad61, (q31_t)0x9784dddc, (q31_t)0x49ec8c57, (q31_t)0x97813cc7, (q31_t)0x49e76b21, (q31_t)0x977d9bf2, (q31_t)0x49e249bc, (q31_t)0x9779fb5e,
+  (q31_t)0x49dd282a, (q31_t)0x97765b0a, (q31_t)0x49d8066b, (q31_t)0x9772baf7, (q31_t)0x49d2e47e, (q31_t)0x976f1b24, (q31_t)0x49cdc263, (q31_t)0x976b7b92,
+  (q31_t)0x49c8a01b, (q31_t)0x9767dc41, (q31_t)0x49c37da5, (q31_t)0x97643d2f, (q31_t)0x49be5b02, (q31_t)0x97609e5f, (q31_t)0x49b93832, (q31_t)0x975cffcf,
+  (q31_t)0x49b41533, (q31_t)0x9759617f, (q31_t)0x49aef208, (q31_t)0x9755c370, (q31_t)0x49a9ceaf, (q31_t)0x975225a1, (q31_t)0x49a4ab28, (q31_t)0x974e8813,
+  (q31_t)0x499f8774, (q31_t)0x974aeac6, (q31_t)0x499a6393, (q31_t)0x97474db9, (q31_t)0x49953f84, (q31_t)0x9743b0ed, (q31_t)0x49901b48, (q31_t)0x97401462,
+  (q31_t)0x498af6df, (q31_t)0x973c7817, (q31_t)0x4985d248, (q31_t)0x9738dc0d, (q31_t)0x4980ad84, (q31_t)0x97354043, (q31_t)0x497b8892, (q31_t)0x9731a4ba,
+  (q31_t)0x49766373, (q31_t)0x972e0971, (q31_t)0x49713e27, (q31_t)0x972a6e6a, (q31_t)0x496c18ae, (q31_t)0x9726d3a3, (q31_t)0x4966f307, (q31_t)0x9723391c,
+  (q31_t)0x4961cd33, (q31_t)0x971f9ed7, (q31_t)0x495ca732, (q31_t)0x971c04d2, (q31_t)0x49578103, (q31_t)0x97186b0d, (q31_t)0x49525aa7, (q31_t)0x9714d18a,
+  (q31_t)0x494d341e, (q31_t)0x97113847, (q31_t)0x49480d68, (q31_t)0x970d9f45, (q31_t)0x4942e684, (q31_t)0x970a0683, (q31_t)0x493dbf74, (q31_t)0x97066e03,
+  (q31_t)0x49389836, (q31_t)0x9702d5c3, (q31_t)0x493370cb, (q31_t)0x96ff3dc4, (q31_t)0x492e4933, (q31_t)0x96fba605, (q31_t)0x4929216e, (q31_t)0x96f80e88,
+  (q31_t)0x4923f97b, (q31_t)0x96f4774b, (q31_t)0x491ed15c, (q31_t)0x96f0e04f, (q31_t)0x4919a90f, (q31_t)0x96ed4994, (q31_t)0x49148095, (q31_t)0x96e9b319,
+  (q31_t)0x490f57ee, (q31_t)0x96e61ce0, (q31_t)0x490a2f1b, (q31_t)0x96e286e7, (q31_t)0x4905061a, (q31_t)0x96def12f, (q31_t)0x48ffdcec, (q31_t)0x96db5bb8,
+  (q31_t)0x48fab391, (q31_t)0x96d7c682, (q31_t)0x48f58a09, (q31_t)0x96d4318d, (q31_t)0x48f06054, (q31_t)0x96d09cd8, (q31_t)0x48eb3672, (q31_t)0x96cd0865,
+  (q31_t)0x48e60c62, (q31_t)0x96c97432, (q31_t)0x48e0e227, (q31_t)0x96c5e040, (q31_t)0x48dbb7be, (q31_t)0x96c24c8f, (q31_t)0x48d68d28, (q31_t)0x96beb91f,
+  (q31_t)0x48d16265, (q31_t)0x96bb25f0, (q31_t)0x48cc3775, (q31_t)0x96b79302, (q31_t)0x48c70c59, (q31_t)0x96b40055, (q31_t)0x48c1e10f, (q31_t)0x96b06de9,
+  (q31_t)0x48bcb599, (q31_t)0x96acdbbe, (q31_t)0x48b789f5, (q31_t)0x96a949d3, (q31_t)0x48b25e25, (q31_t)0x96a5b82a, (q31_t)0x48ad3228, (q31_t)0x96a226c2,
+  (q31_t)0x48a805ff, (q31_t)0x969e959b, (q31_t)0x48a2d9a8, (q31_t)0x969b04b4, (q31_t)0x489dad25, (q31_t)0x9697740f, (q31_t)0x48988074, (q31_t)0x9693e3ab,
+  (q31_t)0x48935397, (q31_t)0x96905388, (q31_t)0x488e268e, (q31_t)0x968cc3a5, (q31_t)0x4888f957, (q31_t)0x96893404, (q31_t)0x4883cbf4, (q31_t)0x9685a4a4,
+  (q31_t)0x487e9e64, (q31_t)0x96821585, (q31_t)0x487970a7, (q31_t)0x967e86a7, (q31_t)0x487442be, (q31_t)0x967af80a, (q31_t)0x486f14a8, (q31_t)0x967769af,
+  (q31_t)0x4869e665, (q31_t)0x9673db94, (q31_t)0x4864b7f5, (q31_t)0x96704dba, (q31_t)0x485f8959, (q31_t)0x966cc022, (q31_t)0x485a5a90, (q31_t)0x966932cb,
+  (q31_t)0x48552b9b, (q31_t)0x9665a5b4, (q31_t)0x484ffc79, (q31_t)0x966218df, (q31_t)0x484acd2a, (q31_t)0x965e8c4b, (q31_t)0x48459daf, (q31_t)0x965afff9,
+  (q31_t)0x48406e08, (q31_t)0x965773e7, (q31_t)0x483b3e33, (q31_t)0x9653e817, (q31_t)0x48360e32, (q31_t)0x96505c88, (q31_t)0x4830de05, (q31_t)0x964cd139,
+  (q31_t)0x482badab, (q31_t)0x9649462d, (q31_t)0x48267d24, (q31_t)0x9645bb61, (q31_t)0x48214c71, (q31_t)0x964230d7, (q31_t)0x481c1b92, (q31_t)0x963ea68d,
+  (q31_t)0x4816ea86, (q31_t)0x963b1c86, (q31_t)0x4811b94d, (q31_t)0x963792bf, (q31_t)0x480c87e8, (q31_t)0x96340939, (q31_t)0x48075657, (q31_t)0x96307ff5,
+  (q31_t)0x48022499, (q31_t)0x962cf6f2, (q31_t)0x47fcf2af, (q31_t)0x96296e31, (q31_t)0x47f7c099, (q31_t)0x9625e5b0, (q31_t)0x47f28e56, (q31_t)0x96225d71,
+  (q31_t)0x47ed5be6, (q31_t)0x961ed574, (q31_t)0x47e8294a, (q31_t)0x961b4db7, (q31_t)0x47e2f682, (q31_t)0x9617c63c, (q31_t)0x47ddc38e, (q31_t)0x96143f02,
+  (q31_t)0x47d8906d, (q31_t)0x9610b80a, (q31_t)0x47d35d20, (q31_t)0x960d3153, (q31_t)0x47ce29a7, (q31_t)0x9609aadd, (q31_t)0x47c8f601, (q31_t)0x960624a9,
+  (q31_t)0x47c3c22f, (q31_t)0x96029eb6, (q31_t)0x47be8e31, (q31_t)0x95ff1904, (q31_t)0x47b95a06, (q31_t)0x95fb9394, (q31_t)0x47b425af, (q31_t)0x95f80e65,
+  (q31_t)0x47aef12c, (q31_t)0x95f48977, (q31_t)0x47a9bc7d, (q31_t)0x95f104cb, (q31_t)0x47a487a2, (q31_t)0x95ed8061, (q31_t)0x479f529a, (q31_t)0x95e9fc38,
+  (q31_t)0x479a1d67, (q31_t)0x95e67850, (q31_t)0x4794e807, (q31_t)0x95e2f4a9, (q31_t)0x478fb27b, (q31_t)0x95df7145, (q31_t)0x478a7cc2, (q31_t)0x95dbee21,
+  (q31_t)0x478546de, (q31_t)0x95d86b3f, (q31_t)0x478010cd, (q31_t)0x95d4e89f, (q31_t)0x477ada91, (q31_t)0x95d16640, (q31_t)0x4775a428, (q31_t)0x95cde423,
+  (q31_t)0x47706d93, (q31_t)0x95ca6247, (q31_t)0x476b36d3, (q31_t)0x95c6e0ac, (q31_t)0x4765ffe6, (q31_t)0x95c35f53, (q31_t)0x4760c8cd, (q31_t)0x95bfde3c,
+  (q31_t)0x475b9188, (q31_t)0x95bc5d66, (q31_t)0x47565a17, (q31_t)0x95b8dcd2, (q31_t)0x4751227a, (q31_t)0x95b55c7f, (q31_t)0x474beab1, (q31_t)0x95b1dc6e,
+  (q31_t)0x4746b2bc, (q31_t)0x95ae5c9f, (q31_t)0x47417a9b, (q31_t)0x95aadd11, (q31_t)0x473c424e, (q31_t)0x95a75dc4, (q31_t)0x473709d5, (q31_t)0x95a3deb9,
+  (q31_t)0x4731d131, (q31_t)0x95a05ff0, (q31_t)0x472c9860, (q31_t)0x959ce169, (q31_t)0x47275f63, (q31_t)0x95996323, (q31_t)0x4722263b, (q31_t)0x9595e51e,
+  (q31_t)0x471cece7, (q31_t)0x9592675c, (q31_t)0x4717b367, (q31_t)0x958ee9db, (q31_t)0x471279ba, (q31_t)0x958b6c9b, (q31_t)0x470d3fe3, (q31_t)0x9587ef9e,
+  (q31_t)0x470805df, (q31_t)0x958472e2, (q31_t)0x4702cbaf, (q31_t)0x9580f667, (q31_t)0x46fd9154, (q31_t)0x957d7a2f, (q31_t)0x46f856cd, (q31_t)0x9579fe38,
+  (q31_t)0x46f31c1a, (q31_t)0x95768283, (q31_t)0x46ede13b, (q31_t)0x9573070f, (q31_t)0x46e8a631, (q31_t)0x956f8bdd, (q31_t)0x46e36afb, (q31_t)0x956c10ed,
+  (q31_t)0x46de2f99, (q31_t)0x9568963f, (q31_t)0x46d8f40b, (q31_t)0x95651bd2, (q31_t)0x46d3b852, (q31_t)0x9561a1a8, (q31_t)0x46ce7c6d, (q31_t)0x955e27bf,
+  (q31_t)0x46c9405c, (q31_t)0x955aae17, (q31_t)0x46c40420, (q31_t)0x955734b2, (q31_t)0x46bec7b8, (q31_t)0x9553bb8e, (q31_t)0x46b98b24, (q31_t)0x955042ac,
+  (q31_t)0x46b44e65, (q31_t)0x954cca0c, (q31_t)0x46af117a, (q31_t)0x954951ae, (q31_t)0x46a9d464, (q31_t)0x9545d992, (q31_t)0x46a49722, (q31_t)0x954261b7,
+  (q31_t)0x469f59b4, (q31_t)0x953eea1e, (q31_t)0x469a1c1b, (q31_t)0x953b72c7, (q31_t)0x4694de56, (q31_t)0x9537fbb2, (q31_t)0x468fa066, (q31_t)0x953484df,
+  (q31_t)0x468a624a, (q31_t)0x95310e4e, (q31_t)0x46852403, (q31_t)0x952d97fe, (q31_t)0x467fe590, (q31_t)0x952a21f1, (q31_t)0x467aa6f2, (q31_t)0x9526ac25,
+  (q31_t)0x46756828, (q31_t)0x9523369c, (q31_t)0x46702933, (q31_t)0x951fc154, (q31_t)0x466aea12, (q31_t)0x951c4c4e, (q31_t)0x4665aac6, (q31_t)0x9518d78a,
+  (q31_t)0x46606b4e, (q31_t)0x95156308, (q31_t)0x465b2bab, (q31_t)0x9511eec8, (q31_t)0x4655ebdd, (q31_t)0x950e7aca, (q31_t)0x4650abe3, (q31_t)0x950b070e,
+  (q31_t)0x464b6bbe, (q31_t)0x95079394, (q31_t)0x46462b6d, (q31_t)0x9504205c, (q31_t)0x4640eaf2, (q31_t)0x9500ad66, (q31_t)0x463baa4a, (q31_t)0x94fd3ab1,
+  (q31_t)0x46366978, (q31_t)0x94f9c83f, (q31_t)0x4631287a, (q31_t)0x94f6560f, (q31_t)0x462be751, (q31_t)0x94f2e421, (q31_t)0x4626a5fd, (q31_t)0x94ef7275,
+  (q31_t)0x4621647d, (q31_t)0x94ec010b, (q31_t)0x461c22d2, (q31_t)0x94e88fe3, (q31_t)0x4616e0fc, (q31_t)0x94e51efd, (q31_t)0x46119efa, (q31_t)0x94e1ae59,
+  (q31_t)0x460c5cce, (q31_t)0x94de3df8, (q31_t)0x46071a76, (q31_t)0x94dacdd8, (q31_t)0x4601d7f3, (q31_t)0x94d75dfa, (q31_t)0x45fc9545, (q31_t)0x94d3ee5f,
+  (q31_t)0x45f7526b, (q31_t)0x94d07f05, (q31_t)0x45f20f67, (q31_t)0x94cd0fee, (q31_t)0x45eccc37, (q31_t)0x94c9a119, (q31_t)0x45e788dc, (q31_t)0x94c63286,
+  (q31_t)0x45e24556, (q31_t)0x94c2c435, (q31_t)0x45dd01a5, (q31_t)0x94bf5627, (q31_t)0x45d7bdc9, (q31_t)0x94bbe85a, (q31_t)0x45d279c2, (q31_t)0x94b87ad0,
+  (q31_t)0x45cd358f, (q31_t)0x94b50d87, (q31_t)0x45c7f132, (q31_t)0x94b1a081, (q31_t)0x45c2acaa, (q31_t)0x94ae33be, (q31_t)0x45bd67f6, (q31_t)0x94aac73c,
+  (q31_t)0x45b82318, (q31_t)0x94a75afd, (q31_t)0x45b2de0e, (q31_t)0x94a3eeff, (q31_t)0x45ad98da, (q31_t)0x94a08344, (q31_t)0x45a8537a, (q31_t)0x949d17cc,
+  (q31_t)0x45a30df0, (q31_t)0x9499ac95, (q31_t)0x459dc83b, (q31_t)0x949641a1, (q31_t)0x4598825a, (q31_t)0x9492d6ef, (q31_t)0x45933c4f, (q31_t)0x948f6c7f,
+  (q31_t)0x458df619, (q31_t)0x948c0252, (q31_t)0x4588afb8, (q31_t)0x94889867, (q31_t)0x4583692c, (q31_t)0x94852ebe, (q31_t)0x457e2275, (q31_t)0x9481c557,
+  (q31_t)0x4578db93, (q31_t)0x947e5c33, (q31_t)0x45739487, (q31_t)0x947af351, (q31_t)0x456e4d4f, (q31_t)0x94778ab1, (q31_t)0x456905ed, (q31_t)0x94742254,
+  (q31_t)0x4563be60, (q31_t)0x9470ba39, (q31_t)0x455e76a8, (q31_t)0x946d5260, (q31_t)0x45592ec6, (q31_t)0x9469eaca, (q31_t)0x4553e6b8, (q31_t)0x94668376,
+  (q31_t)0x454e9e80, (q31_t)0x94631c65, (q31_t)0x4549561d, (q31_t)0x945fb596, (q31_t)0x45440d90, (q31_t)0x945c4f09, (q31_t)0x453ec4d7, (q31_t)0x9458e8bf,
+  (q31_t)0x45397bf4, (q31_t)0x945582b7, (q31_t)0x453432e6, (q31_t)0x94521cf1, (q31_t)0x452ee9ae, (q31_t)0x944eb76e, (q31_t)0x4529a04b, (q31_t)0x944b522d,
+  (q31_t)0x452456bd, (q31_t)0x9447ed2f, (q31_t)0x451f0d04, (q31_t)0x94448873, (q31_t)0x4519c321, (q31_t)0x944123fa, (q31_t)0x45147913, (q31_t)0x943dbfc3,
+  (q31_t)0x450f2edb, (q31_t)0x943a5bcf, (q31_t)0x4509e478, (q31_t)0x9436f81d, (q31_t)0x450499eb, (q31_t)0x943394ad, (q31_t)0x44ff4f32, (q31_t)0x94303180,
+  (q31_t)0x44fa0450, (q31_t)0x942cce96, (q31_t)0x44f4b943, (q31_t)0x94296bee, (q31_t)0x44ef6e0b, (q31_t)0x94260989, (q31_t)0x44ea22a9, (q31_t)0x9422a766,
+  (q31_t)0x44e4d71c, (q31_t)0x941f4585, (q31_t)0x44df8b64, (q31_t)0x941be3e8, (q31_t)0x44da3f83, (q31_t)0x9418828c, (q31_t)0x44d4f376, (q31_t)0x94152174,
+  (q31_t)0x44cfa740, (q31_t)0x9411c09e, (q31_t)0x44ca5adf, (q31_t)0x940e600a, (q31_t)0x44c50e53, (q31_t)0x940affb9, (q31_t)0x44bfc19d, (q31_t)0x94079fab,
+  (q31_t)0x44ba74bd, (q31_t)0x94043fdf, (q31_t)0x44b527b2, (q31_t)0x9400e056, (q31_t)0x44afda7d, (q31_t)0x93fd810f, (q31_t)0x44aa8d1d, (q31_t)0x93fa220b,
+  (q31_t)0x44a53f93, (q31_t)0x93f6c34a, (q31_t)0x449ff1df, (q31_t)0x93f364cb, (q31_t)0x449aa400, (q31_t)0x93f0068f, (q31_t)0x449555f7, (q31_t)0x93eca896,
+  (q31_t)0x449007c4, (q31_t)0x93e94adf, (q31_t)0x448ab967, (q31_t)0x93e5ed6b, (q31_t)0x44856adf, (q31_t)0x93e2903a, (q31_t)0x44801c2d, (q31_t)0x93df334c,
+  (q31_t)0x447acd50, (q31_t)0x93dbd6a0, (q31_t)0x44757e4a, (q31_t)0x93d87a36, (q31_t)0x44702f19, (q31_t)0x93d51e10, (q31_t)0x446adfbe, (q31_t)0x93d1c22c,
+  (q31_t)0x44659039, (q31_t)0x93ce668b, (q31_t)0x44604089, (q31_t)0x93cb0b2d, (q31_t)0x445af0b0, (q31_t)0x93c7b011, (q31_t)0x4455a0ac, (q31_t)0x93c45539,
+  (q31_t)0x4450507e, (q31_t)0x93c0faa3, (q31_t)0x444b0026, (q31_t)0x93bda04f, (q31_t)0x4445afa4, (q31_t)0x93ba463f, (q31_t)0x44405ef8, (q31_t)0x93b6ec71,
+  (q31_t)0x443b0e21, (q31_t)0x93b392e6, (q31_t)0x4435bd21, (q31_t)0x93b0399e, (q31_t)0x44306bf6, (q31_t)0x93ace099, (q31_t)0x442b1aa2, (q31_t)0x93a987d6,
+  (q31_t)0x4425c923, (q31_t)0x93a62f57, (q31_t)0x4420777b, (q31_t)0x93a2d71a, (q31_t)0x441b25a8, (q31_t)0x939f7f20, (q31_t)0x4415d3ab, (q31_t)0x939c2769,
+  (q31_t)0x44108184, (q31_t)0x9398cff5, (q31_t)0x440b2f34, (q31_t)0x939578c3, (q31_t)0x4405dcb9, (q31_t)0x939221d5, (q31_t)0x44008a14, (q31_t)0x938ecb29,
+  (q31_t)0x43fb3746, (q31_t)0x938b74c1, (q31_t)0x43f5e44d, (q31_t)0x93881e9b, (q31_t)0x43f0912b, (q31_t)0x9384c8b8, (q31_t)0x43eb3ddf, (q31_t)0x93817318,
+  (q31_t)0x43e5ea68, (q31_t)0x937e1dbb, (q31_t)0x43e096c8, (q31_t)0x937ac8a1, (q31_t)0x43db42fe, (q31_t)0x937773ca, (q31_t)0x43d5ef0a, (q31_t)0x93741f35,
+  (q31_t)0x43d09aed, (q31_t)0x9370cae4, (q31_t)0x43cb46a5, (q31_t)0x936d76d6, (q31_t)0x43c5f234, (q31_t)0x936a230a, (q31_t)0x43c09d99, (q31_t)0x9366cf82,
+  (q31_t)0x43bb48d4, (q31_t)0x93637c3d, (q31_t)0x43b5f3e5, (q31_t)0x9360293a, (q31_t)0x43b09ecc, (q31_t)0x935cd67b, (q31_t)0x43ab498a, (q31_t)0x935983ff,
+  (q31_t)0x43a5f41e, (q31_t)0x935631c5, (q31_t)0x43a09e89, (q31_t)0x9352dfcf, (q31_t)0x439b48c9, (q31_t)0x934f8e1c, (q31_t)0x4395f2e0, (q31_t)0x934c3cab,
+  (q31_t)0x43909ccd, (q31_t)0x9348eb7e, (q31_t)0x438b4691, (q31_t)0x93459a94, (q31_t)0x4385f02a, (q31_t)0x934249ed, (q31_t)0x4380999b, (q31_t)0x933ef989,
+  (q31_t)0x437b42e1, (q31_t)0x933ba968, (q31_t)0x4375ebfe, (q31_t)0x9338598a, (q31_t)0x437094f1, (q31_t)0x933509f0, (q31_t)0x436b3dbb, (q31_t)0x9331ba98,
+  (q31_t)0x4365e65b, (q31_t)0x932e6b84, (q31_t)0x43608ed2, (q31_t)0x932b1cb2, (q31_t)0x435b371f, (q31_t)0x9327ce24, (q31_t)0x4355df42, (q31_t)0x93247fd9,
+  (q31_t)0x4350873c, (q31_t)0x932131d1, (q31_t)0x434b2f0c, (q31_t)0x931de40c, (q31_t)0x4345d6b3, (q31_t)0x931a968b, (q31_t)0x43407e31, (q31_t)0x9317494c,
+  (q31_t)0x433b2585, (q31_t)0x9313fc51, (q31_t)0x4335ccaf, (q31_t)0x9310af99, (q31_t)0x433073b0, (q31_t)0x930d6324, (q31_t)0x432b1a87, (q31_t)0x930a16f3,
+  (q31_t)0x4325c135, (q31_t)0x9306cb04, (q31_t)0x432067ba, (q31_t)0x93037f59, (q31_t)0x431b0e15, (q31_t)0x930033f1, (q31_t)0x4315b447, (q31_t)0x92fce8cc,
+  (q31_t)0x43105a50, (q31_t)0x92f99deb, (q31_t)0x430b002f, (q31_t)0x92f6534c, (q31_t)0x4305a5e5, (q31_t)0x92f308f1, (q31_t)0x43004b71, (q31_t)0x92efbeda,
+  (q31_t)0x42faf0d4, (q31_t)0x92ec7505, (q31_t)0x42f5960e, (q31_t)0x92e92b74, (q31_t)0x42f03b1e, (q31_t)0x92e5e226, (q31_t)0x42eae005, (q31_t)0x92e2991c,
+  (q31_t)0x42e584c3, (q31_t)0x92df5054, (q31_t)0x42e02958, (q31_t)0x92dc07d0, (q31_t)0x42dacdc3, (q31_t)0x92d8bf90, (q31_t)0x42d57205, (q31_t)0x92d57792,
+  (q31_t)0x42d0161e, (q31_t)0x92d22fd9, (q31_t)0x42caba0e, (q31_t)0x92cee862, (q31_t)0x42c55dd4, (q31_t)0x92cba12f, (q31_t)0x42c00172, (q31_t)0x92c85a3f,
+  (q31_t)0x42baa4e6, (q31_t)0x92c51392, (q31_t)0x42b54831, (q31_t)0x92c1cd29, (q31_t)0x42afeb53, (q31_t)0x92be8703, (q31_t)0x42aa8e4b, (q31_t)0x92bb4121,
+  (q31_t)0x42a5311b, (q31_t)0x92b7fb82, (q31_t)0x429fd3c1, (q31_t)0x92b4b626, (q31_t)0x429a763f, (q31_t)0x92b1710e, (q31_t)0x42951893, (q31_t)0x92ae2c3a,
+  (q31_t)0x428fbabe, (q31_t)0x92aae7a8, (q31_t)0x428a5cc0, (q31_t)0x92a7a35a, (q31_t)0x4284fe99, (q31_t)0x92a45f50, (q31_t)0x427fa049, (q31_t)0x92a11b89,
+  (q31_t)0x427a41d0, (q31_t)0x929dd806, (q31_t)0x4274e32e, (q31_t)0x929a94c6, (q31_t)0x426f8463, (q31_t)0x929751c9, (q31_t)0x426a256f, (q31_t)0x92940f10,
+  (q31_t)0x4264c653, (q31_t)0x9290cc9b, (q31_t)0x425f670d, (q31_t)0x928d8a69, (q31_t)0x425a079e, (q31_t)0x928a487a, (q31_t)0x4254a806, (q31_t)0x928706cf,
+  (q31_t)0x424f4845, (q31_t)0x9283c568, (q31_t)0x4249e85c, (q31_t)0x92808444, (q31_t)0x42448849, (q31_t)0x927d4363, (q31_t)0x423f280e, (q31_t)0x927a02c7,
+  (q31_t)0x4239c7aa, (q31_t)0x9276c26d, (q31_t)0x4234671d, (q31_t)0x92738258, (q31_t)0x422f0667, (q31_t)0x92704286, (q31_t)0x4229a588, (q31_t)0x926d02f7,
+  (q31_t)0x42244481, (q31_t)0x9269c3ac, (q31_t)0x421ee350, (q31_t)0x926684a5, (q31_t)0x421981f7, (q31_t)0x926345e1, (q31_t)0x42142075, (q31_t)0x92600761,
+  (q31_t)0x420ebecb, (q31_t)0x925cc924, (q31_t)0x42095cf7, (q31_t)0x92598b2b, (q31_t)0x4203fafb, (q31_t)0x92564d76, (q31_t)0x41fe98d6, (q31_t)0x92531005,
+  (q31_t)0x41f93689, (q31_t)0x924fd2d7, (q31_t)0x41f3d413, (q31_t)0x924c95ec, (q31_t)0x41ee7174, (q31_t)0x92495946, (q31_t)0x41e90eac, (q31_t)0x92461ce3,
+  (q31_t)0x41e3abbc, (q31_t)0x9242e0c4, (q31_t)0x41de48a3, (q31_t)0x923fa4e8, (q31_t)0x41d8e561, (q31_t)0x923c6950, (q31_t)0x41d381f7, (q31_t)0x92392dfc,
+  (q31_t)0x41ce1e65, (q31_t)0x9235f2ec, (q31_t)0x41c8baa9, (q31_t)0x9232b81f, (q31_t)0x41c356c5, (q31_t)0x922f7d96, (q31_t)0x41bdf2b9, (q31_t)0x922c4351,
+  (q31_t)0x41b88e84, (q31_t)0x9229094f, (q31_t)0x41b32a26, (q31_t)0x9225cf91, (q31_t)0x41adc5a0, (q31_t)0x92229617, (q31_t)0x41a860f1, (q31_t)0x921f5ce1,
+  (q31_t)0x41a2fc1a, (q31_t)0x921c23ef, (q31_t)0x419d971b, (q31_t)0x9218eb40, (q31_t)0x419831f3, (q31_t)0x9215b2d5, (q31_t)0x4192cca2, (q31_t)0x92127aae,
+  (q31_t)0x418d6729, (q31_t)0x920f42cb, (q31_t)0x41880188, (q31_t)0x920c0b2c, (q31_t)0x41829bbe, (q31_t)0x9208d3d0, (q31_t)0x417d35cb, (q31_t)0x92059cb8,
+  (q31_t)0x4177cfb1, (q31_t)0x920265e4, (q31_t)0x4172696e, (q31_t)0x91ff2f54, (q31_t)0x416d0302, (q31_t)0x91fbf908, (q31_t)0x41679c6f, (q31_t)0x91f8c300,
+  (q31_t)0x416235b2, (q31_t)0x91f58d3b, (q31_t)0x415ccece, (q31_t)0x91f257bb, (q31_t)0x415767c1, (q31_t)0x91ef227e, (q31_t)0x4152008c, (q31_t)0x91ebed85,
+  (q31_t)0x414c992f, (q31_t)0x91e8b8d0, (q31_t)0x414731a9, (q31_t)0x91e5845f, (q31_t)0x4141c9fb, (q31_t)0x91e25032, (q31_t)0x413c6225, (q31_t)0x91df1c49,
+  (q31_t)0x4136fa27, (q31_t)0x91dbe8a4, (q31_t)0x41319200, (q31_t)0x91d8b542, (q31_t)0x412c29b1, (q31_t)0x91d58225, (q31_t)0x4126c13a, (q31_t)0x91d24f4c,
+  (q31_t)0x4121589b, (q31_t)0x91cf1cb6, (q31_t)0x411befd3, (q31_t)0x91cbea65, (q31_t)0x411686e4, (q31_t)0x91c8b857, (q31_t)0x41111dcc, (q31_t)0x91c5868e,
+  (q31_t)0x410bb48c, (q31_t)0x91c25508, (q31_t)0x41064b24, (q31_t)0x91bf23c7, (q31_t)0x4100e194, (q31_t)0x91bbf2c9, (q31_t)0x40fb77dc, (q31_t)0x91b8c210,
+  (q31_t)0x40f60dfb, (q31_t)0x91b5919a, (q31_t)0x40f0a3f3, (q31_t)0x91b26169, (q31_t)0x40eb39c3, (q31_t)0x91af317c, (q31_t)0x40e5cf6a, (q31_t)0x91ac01d2,
+  (q31_t)0x40e064ea, (q31_t)0x91a8d26d, (q31_t)0x40dafa41, (q31_t)0x91a5a34c, (q31_t)0x40d58f71, (q31_t)0x91a2746f, (q31_t)0x40d02478, (q31_t)0x919f45d6,
+  (q31_t)0x40cab958, (q31_t)0x919c1781, (q31_t)0x40c54e0f, (q31_t)0x9198e970, (q31_t)0x40bfe29f, (q31_t)0x9195bba3, (q31_t)0x40ba7706, (q31_t)0x91928e1a,
+  (q31_t)0x40b50b46, (q31_t)0x918f60d6, (q31_t)0x40af9f5e, (q31_t)0x918c33d5, (q31_t)0x40aa334e, (q31_t)0x91890719, (q31_t)0x40a4c716, (q31_t)0x9185daa1,
+  (q31_t)0x409f5ab6, (q31_t)0x9182ae6d, (q31_t)0x4099ee2e, (q31_t)0x917f827d, (q31_t)0x4094817f, (q31_t)0x917c56d1, (q31_t)0x408f14a7, (q31_t)0x91792b6a,
+  (q31_t)0x4089a7a8, (q31_t)0x91760047, (q31_t)0x40843a81, (q31_t)0x9172d567, (q31_t)0x407ecd32, (q31_t)0x916faacc, (q31_t)0x40795fbc, (q31_t)0x916c8076,
+  (q31_t)0x4073f21d, (q31_t)0x91695663, (q31_t)0x406e8457, (q31_t)0x91662c95, (q31_t)0x40691669, (q31_t)0x9163030b, (q31_t)0x4063a854, (q31_t)0x915fd9c5,
+  (q31_t)0x405e3a16, (q31_t)0x915cb0c3, (q31_t)0x4058cbb1, (q31_t)0x91598806, (q31_t)0x40535d24, (q31_t)0x91565f8d, (q31_t)0x404dee70, (q31_t)0x91533758,
+  (q31_t)0x40487f94, (q31_t)0x91500f67, (q31_t)0x40431090, (q31_t)0x914ce7bb, (q31_t)0x403da165, (q31_t)0x9149c053, (q31_t)0x40383212, (q31_t)0x9146992f,
+  (q31_t)0x4032c297, (q31_t)0x91437250, (q31_t)0x402d52f5, (q31_t)0x91404bb5, (q31_t)0x4027e32b, (q31_t)0x913d255e, (q31_t)0x4022733a, (q31_t)0x9139ff4b,
+  (q31_t)0x401d0321, (q31_t)0x9136d97d, (q31_t)0x401792e0, (q31_t)0x9133b3f3, (q31_t)0x40122278, (q31_t)0x91308eae, (q31_t)0x400cb1e9, (q31_t)0x912d69ad,
+  (q31_t)0x40074132, (q31_t)0x912a44f0, (q31_t)0x4001d053, (q31_t)0x91272078, (q31_t)0x3ffc5f4d, (q31_t)0x9123fc44, (q31_t)0x3ff6ee1f, (q31_t)0x9120d854,
+  (q31_t)0x3ff17cca, (q31_t)0x911db4a9, (q31_t)0x3fec0b4e, (q31_t)0x911a9142, (q31_t)0x3fe699aa, (q31_t)0x91176e1f, (q31_t)0x3fe127df, (q31_t)0x91144b41,
+  (q31_t)0x3fdbb5ec, (q31_t)0x911128a8, (q31_t)0x3fd643d2, (q31_t)0x910e0653, (q31_t)0x3fd0d191, (q31_t)0x910ae442, (q31_t)0x3fcb5f28, (q31_t)0x9107c276,
+  (q31_t)0x3fc5ec98, (q31_t)0x9104a0ee, (q31_t)0x3fc079e0, (q31_t)0x91017faa, (q31_t)0x3fbb0702, (q31_t)0x90fe5eab, (q31_t)0x3fb593fb, (q31_t)0x90fb3df1,
+  (q31_t)0x3fb020ce, (q31_t)0x90f81d7b, (q31_t)0x3faaad79, (q31_t)0x90f4fd4a, (q31_t)0x3fa539fd, (q31_t)0x90f1dd5d, (q31_t)0x3f9fc65a, (q31_t)0x90eebdb4,
+  (q31_t)0x3f9a5290, (q31_t)0x90eb9e50, (q31_t)0x3f94de9e, (q31_t)0x90e87f31, (q31_t)0x3f8f6a85, (q31_t)0x90e56056, (q31_t)0x3f89f645, (q31_t)0x90e241bf,
+  (q31_t)0x3f8481dd, (q31_t)0x90df236e, (q31_t)0x3f7f0d4f, (q31_t)0x90dc0560, (q31_t)0x3f799899, (q31_t)0x90d8e798, (q31_t)0x3f7423bc, (q31_t)0x90d5ca13,
+  (q31_t)0x3f6eaeb8, (q31_t)0x90d2acd4, (q31_t)0x3f69398d, (q31_t)0x90cf8fd9, (q31_t)0x3f63c43b, (q31_t)0x90cc7322, (q31_t)0x3f5e4ec2, (q31_t)0x90c956b1,
+  (q31_t)0x3f58d921, (q31_t)0x90c63a83, (q31_t)0x3f53635a, (q31_t)0x90c31e9b, (q31_t)0x3f4ded6b, (q31_t)0x90c002f7, (q31_t)0x3f487755, (q31_t)0x90bce797,
+  (q31_t)0x3f430119, (q31_t)0x90b9cc7d, (q31_t)0x3f3d8ab5, (q31_t)0x90b6b1a6, (q31_t)0x3f38142a, (q31_t)0x90b39715, (q31_t)0x3f329d79, (q31_t)0x90b07cc8,
+  (q31_t)0x3f2d26a0, (q31_t)0x90ad62c0, (q31_t)0x3f27afa1, (q31_t)0x90aa48fd, (q31_t)0x3f22387a, (q31_t)0x90a72f7e, (q31_t)0x3f1cc12c, (q31_t)0x90a41644,
+  (q31_t)0x3f1749b8, (q31_t)0x90a0fd4e, (q31_t)0x3f11d21d, (q31_t)0x909de49e, (q31_t)0x3f0c5a5a, (q31_t)0x909acc32, (q31_t)0x3f06e271, (q31_t)0x9097b40a,
+  (q31_t)0x3f016a61, (q31_t)0x90949c28, (q31_t)0x3efbf22a, (q31_t)0x9091848a, (q31_t)0x3ef679cc, (q31_t)0x908e6d31, (q31_t)0x3ef10148, (q31_t)0x908b561c,
+  (q31_t)0x3eeb889c, (q31_t)0x90883f4d, (q31_t)0x3ee60fca, (q31_t)0x908528c2, (q31_t)0x3ee096d1, (q31_t)0x9082127c, (q31_t)0x3edb1db1, (q31_t)0x907efc7a,
+  (q31_t)0x3ed5a46b, (q31_t)0x907be6be, (q31_t)0x3ed02afd, (q31_t)0x9078d146, (q31_t)0x3ecab169, (q31_t)0x9075bc13, (q31_t)0x3ec537ae, (q31_t)0x9072a725,
+  (q31_t)0x3ebfbdcd, (q31_t)0x906f927c, (q31_t)0x3eba43c4, (q31_t)0x906c7e17, (q31_t)0x3eb4c995, (q31_t)0x906969f8, (q31_t)0x3eaf4f40, (q31_t)0x9066561d,
+  (q31_t)0x3ea9d4c3, (q31_t)0x90634287, (q31_t)0x3ea45a21, (q31_t)0x90602f35, (q31_t)0x3e9edf57, (q31_t)0x905d1c29, (q31_t)0x3e996467, (q31_t)0x905a0962,
+  (q31_t)0x3e93e950, (q31_t)0x9056f6df, (q31_t)0x3e8e6e12, (q31_t)0x9053e4a1, (q31_t)0x3e88f2ae, (q31_t)0x9050d2a9, (q31_t)0x3e837724, (q31_t)0x904dc0f5,
+  (q31_t)0x3e7dfb73, (q31_t)0x904aaf86, (q31_t)0x3e787f9b, (q31_t)0x90479e5c, (q31_t)0x3e73039d, (q31_t)0x90448d76, (q31_t)0x3e6d8778, (q31_t)0x90417cd6,
+  (q31_t)0x3e680b2c, (q31_t)0x903e6c7b, (q31_t)0x3e628ebb, (q31_t)0x903b5c64, (q31_t)0x3e5d1222, (q31_t)0x90384c93, (q31_t)0x3e579564, (q31_t)0x90353d06,
+  (q31_t)0x3e52187f, (q31_t)0x90322dbf, (q31_t)0x3e4c9b73, (q31_t)0x902f1ebc, (q31_t)0x3e471e41, (q31_t)0x902c0fff, (q31_t)0x3e41a0e8, (q31_t)0x90290186,
+  (q31_t)0x3e3c2369, (q31_t)0x9025f352, (q31_t)0x3e36a5c4, (q31_t)0x9022e564, (q31_t)0x3e3127f9, (q31_t)0x901fd7ba, (q31_t)0x3e2baa07, (q31_t)0x901cca55,
+  (q31_t)0x3e262bee, (q31_t)0x9019bd36, (q31_t)0x3e20adaf, (q31_t)0x9016b05b, (q31_t)0x3e1b2f4a, (q31_t)0x9013a3c5, (q31_t)0x3e15b0bf, (q31_t)0x90109775,
+  (q31_t)0x3e10320d, (q31_t)0x900d8b69, (q31_t)0x3e0ab336, (q31_t)0x900a7fa3, (q31_t)0x3e053437, (q31_t)0x90077422, (q31_t)0x3dffb513, (q31_t)0x900468e5,
+  (q31_t)0x3dfa35c8, (q31_t)0x90015dee, (q31_t)0x3df4b657, (q31_t)0x8ffe533c, (q31_t)0x3def36c0, (q31_t)0x8ffb48cf, (q31_t)0x3de9b703, (q31_t)0x8ff83ea7,
+  (q31_t)0x3de4371f, (q31_t)0x8ff534c4, (q31_t)0x3ddeb716, (q31_t)0x8ff22b26, (q31_t)0x3dd936e6, (q31_t)0x8fef21ce, (q31_t)0x3dd3b690, (q31_t)0x8fec18ba,
+  (q31_t)0x3dce3614, (q31_t)0x8fe90fec, (q31_t)0x3dc8b571, (q31_t)0x8fe60763, (q31_t)0x3dc334a9, (q31_t)0x8fe2ff1f, (q31_t)0x3dbdb3ba, (q31_t)0x8fdff720,
+  (q31_t)0x3db832a6, (q31_t)0x8fdcef66, (q31_t)0x3db2b16b, (q31_t)0x8fd9e7f2, (q31_t)0x3dad300b, (q31_t)0x8fd6e0c2, (q31_t)0x3da7ae84, (q31_t)0x8fd3d9d8,
+  (q31_t)0x3da22cd7, (q31_t)0x8fd0d333, (q31_t)0x3d9cab04, (q31_t)0x8fcdccd3, (q31_t)0x3d97290b, (q31_t)0x8fcac6b9, (q31_t)0x3d91a6ed, (q31_t)0x8fc7c0e3,
+  (q31_t)0x3d8c24a8, (q31_t)0x8fc4bb53, (q31_t)0x3d86a23d, (q31_t)0x8fc1b608, (q31_t)0x3d811fac, (q31_t)0x8fbeb103, (q31_t)0x3d7b9cf6, (q31_t)0x8fbbac42,
+  (q31_t)0x3d761a19, (q31_t)0x8fb8a7c7, (q31_t)0x3d709717, (q31_t)0x8fb5a391, (q31_t)0x3d6b13ee, (q31_t)0x8fb29fa0, (q31_t)0x3d6590a0, (q31_t)0x8faf9bf5,
+  (q31_t)0x3d600d2c, (q31_t)0x8fac988f, (q31_t)0x3d5a8992, (q31_t)0x8fa9956e, (q31_t)0x3d5505d2, (q31_t)0x8fa69293, (q31_t)0x3d4f81ec, (q31_t)0x8fa38ffc,
+  (q31_t)0x3d49fde1, (q31_t)0x8fa08dab, (q31_t)0x3d4479b0, (q31_t)0x8f9d8ba0, (q31_t)0x3d3ef559, (q31_t)0x8f9a89da, (q31_t)0x3d3970dc, (q31_t)0x8f978859,
+  (q31_t)0x3d33ec39, (q31_t)0x8f94871d, (q31_t)0x3d2e6771, (q31_t)0x8f918627, (q31_t)0x3d28e282, (q31_t)0x8f8e8576, (q31_t)0x3d235d6f, (q31_t)0x8f8b850a,
+  (q31_t)0x3d1dd835, (q31_t)0x8f8884e4, (q31_t)0x3d1852d6, (q31_t)0x8f858503, (q31_t)0x3d12cd51, (q31_t)0x8f828568, (q31_t)0x3d0d47a6, (q31_t)0x8f7f8612,
+  (q31_t)0x3d07c1d6, (q31_t)0x8f7c8701, (q31_t)0x3d023be0, (q31_t)0x8f798836, (q31_t)0x3cfcb5c4, (q31_t)0x8f7689b0, (q31_t)0x3cf72f83, (q31_t)0x8f738b70,
+  (q31_t)0x3cf1a91c, (q31_t)0x8f708d75, (q31_t)0x3cec2290, (q31_t)0x8f6d8fbf, (q31_t)0x3ce69bde, (q31_t)0x8f6a924f, (q31_t)0x3ce11507, (q31_t)0x8f679525,
+  (q31_t)0x3cdb8e09, (q31_t)0x8f649840, (q31_t)0x3cd606e7, (q31_t)0x8f619ba0, (q31_t)0x3cd07f9f, (q31_t)0x8f5e9f46, (q31_t)0x3ccaf831, (q31_t)0x8f5ba331,
+  (q31_t)0x3cc5709e, (q31_t)0x8f58a761, (q31_t)0x3cbfe8e5, (q31_t)0x8f55abd8, (q31_t)0x3cba6107, (q31_t)0x8f52b093, (q31_t)0x3cb4d904, (q31_t)0x8f4fb595,
+  (q31_t)0x3caf50da, (q31_t)0x8f4cbadb, (q31_t)0x3ca9c88c, (q31_t)0x8f49c067, (q31_t)0x3ca44018, (q31_t)0x8f46c639, (q31_t)0x3c9eb77f, (q31_t)0x8f43cc50,
+  (q31_t)0x3c992ec0, (q31_t)0x8f40d2ad, (q31_t)0x3c93a5dc, (q31_t)0x8f3dd950, (q31_t)0x3c8e1cd3, (q31_t)0x8f3ae038, (q31_t)0x3c8893a4, (q31_t)0x8f37e765,
+  (q31_t)0x3c830a50, (q31_t)0x8f34eed8, (q31_t)0x3c7d80d6, (q31_t)0x8f31f691, (q31_t)0x3c77f737, (q31_t)0x8f2efe8f, (q31_t)0x3c726d73, (q31_t)0x8f2c06d3,
+  (q31_t)0x3c6ce38a, (q31_t)0x8f290f5c, (q31_t)0x3c67597b, (q31_t)0x8f26182b, (q31_t)0x3c61cf48, (q31_t)0x8f232140, (q31_t)0x3c5c44ee, (q31_t)0x8f202a9a,
+  (q31_t)0x3c56ba70, (q31_t)0x8f1d343a, (q31_t)0x3c512fcc, (q31_t)0x8f1a3e1f, (q31_t)0x3c4ba504, (q31_t)0x8f17484b, (q31_t)0x3c461a16, (q31_t)0x8f1452bb,
+  (q31_t)0x3c408f03, (q31_t)0x8f115d72, (q31_t)0x3c3b03ca, (q31_t)0x8f0e686e, (q31_t)0x3c35786d, (q31_t)0x8f0b73b0, (q31_t)0x3c2fecea, (q31_t)0x8f087f37,
+  (q31_t)0x3c2a6142, (q31_t)0x8f058b04, (q31_t)0x3c24d575, (q31_t)0x8f029717, (q31_t)0x3c1f4983, (q31_t)0x8effa370, (q31_t)0x3c19bd6c, (q31_t)0x8efcb00e,
+  (q31_t)0x3c143130, (q31_t)0x8ef9bcf2, (q31_t)0x3c0ea4cf, (q31_t)0x8ef6ca1c, (q31_t)0x3c091849, (q31_t)0x8ef3d78b, (q31_t)0x3c038b9e, (q31_t)0x8ef0e540,
+  (q31_t)0x3bfdfecd, (q31_t)0x8eedf33b, (q31_t)0x3bf871d8, (q31_t)0x8eeb017c, (q31_t)0x3bf2e4be, (q31_t)0x8ee81002, (q31_t)0x3bed577e, (q31_t)0x8ee51ece,
+  (q31_t)0x3be7ca1a, (q31_t)0x8ee22de0, (q31_t)0x3be23c91, (q31_t)0x8edf3d38, (q31_t)0x3bdcaee3, (q31_t)0x8edc4cd5, (q31_t)0x3bd72110, (q31_t)0x8ed95cb8,
+  (q31_t)0x3bd19318, (q31_t)0x8ed66ce1, (q31_t)0x3bcc04fb, (q31_t)0x8ed37d50, (q31_t)0x3bc676b9, (q31_t)0x8ed08e05, (q31_t)0x3bc0e853, (q31_t)0x8ecd9eff,
+  (q31_t)0x3bbb59c7, (q31_t)0x8ecab040, (q31_t)0x3bb5cb17, (q31_t)0x8ec7c1c6, (q31_t)0x3bb03c42, (q31_t)0x8ec4d392, (q31_t)0x3baaad48, (q31_t)0x8ec1e5a4,
+  (q31_t)0x3ba51e29, (q31_t)0x8ebef7fb, (q31_t)0x3b9f8ee5, (q31_t)0x8ebc0a99, (q31_t)0x3b99ff7d, (q31_t)0x8eb91d7c, (q31_t)0x3b946ff0, (q31_t)0x8eb630a6,
+  (q31_t)0x3b8ee03e, (q31_t)0x8eb34415, (q31_t)0x3b895068, (q31_t)0x8eb057ca, (q31_t)0x3b83c06c, (q31_t)0x8ead6bc5, (q31_t)0x3b7e304c, (q31_t)0x8eaa8006,
+  (q31_t)0x3b78a007, (q31_t)0x8ea7948c, (q31_t)0x3b730f9e, (q31_t)0x8ea4a959, (q31_t)0x3b6d7f10, (q31_t)0x8ea1be6c, (q31_t)0x3b67ee5d, (q31_t)0x8e9ed3c4,
+  (q31_t)0x3b625d86, (q31_t)0x8e9be963, (q31_t)0x3b5ccc8a, (q31_t)0x8e98ff47, (q31_t)0x3b573b69, (q31_t)0x8e961571, (q31_t)0x3b51aa24, (q31_t)0x8e932be2,
+  (q31_t)0x3b4c18ba, (q31_t)0x8e904298, (q31_t)0x3b46872c, (q31_t)0x8e8d5994, (q31_t)0x3b40f579, (q31_t)0x8e8a70d7, (q31_t)0x3b3b63a1, (q31_t)0x8e87885f,
+  (q31_t)0x3b35d1a5, (q31_t)0x8e84a02d, (q31_t)0x3b303f84, (q31_t)0x8e81b841, (q31_t)0x3b2aad3f, (q31_t)0x8e7ed09b, (q31_t)0x3b251ad6, (q31_t)0x8e7be93c,
+  (q31_t)0x3b1f8848, (q31_t)0x8e790222, (q31_t)0x3b19f595, (q31_t)0x8e761b4e, (q31_t)0x3b1462be, (q31_t)0x8e7334c1, (q31_t)0x3b0ecfc3, (q31_t)0x8e704e79,
+  (q31_t)0x3b093ca3, (q31_t)0x8e6d6877, (q31_t)0x3b03a95e, (q31_t)0x8e6a82bc, (q31_t)0x3afe15f6, (q31_t)0x8e679d47, (q31_t)0x3af88269, (q31_t)0x8e64b817,
+  (q31_t)0x3af2eeb7, (q31_t)0x8e61d32e, (q31_t)0x3aed5ae1, (q31_t)0x8e5eee8b, (q31_t)0x3ae7c6e7, (q31_t)0x8e5c0a2e, (q31_t)0x3ae232c9, (q31_t)0x8e592617,
+  (q31_t)0x3adc9e86, (q31_t)0x8e564246, (q31_t)0x3ad70a1f, (q31_t)0x8e535ebb, (q31_t)0x3ad17593, (q31_t)0x8e507b76, (q31_t)0x3acbe0e3, (q31_t)0x8e4d9878,
+  (q31_t)0x3ac64c0f, (q31_t)0x8e4ab5bf, (q31_t)0x3ac0b717, (q31_t)0x8e47d34d, (q31_t)0x3abb21fb, (q31_t)0x8e44f121, (q31_t)0x3ab58cba, (q31_t)0x8e420f3b,
+  (q31_t)0x3aaff755, (q31_t)0x8e3f2d9b, (q31_t)0x3aaa61cc, (q31_t)0x8e3c4c41, (q31_t)0x3aa4cc1e, (q31_t)0x8e396b2e, (q31_t)0x3a9f364d, (q31_t)0x8e368a61,
+  (q31_t)0x3a99a057, (q31_t)0x8e33a9da, (q31_t)0x3a940a3e, (q31_t)0x8e30c999, (q31_t)0x3a8e7400, (q31_t)0x8e2de99e, (q31_t)0x3a88dd9d, (q31_t)0x8e2b09e9,
+  (q31_t)0x3a834717, (q31_t)0x8e282a7b, (q31_t)0x3a7db06d, (q31_t)0x8e254b53, (q31_t)0x3a78199f, (q31_t)0x8e226c71, (q31_t)0x3a7282ac, (q31_t)0x8e1f8dd6,
+  (q31_t)0x3a6ceb96, (q31_t)0x8e1caf80, (q31_t)0x3a67545b, (q31_t)0x8e19d171, (q31_t)0x3a61bcfd, (q31_t)0x8e16f3a9, (q31_t)0x3a5c257a, (q31_t)0x8e141626,
+  (q31_t)0x3a568dd4, (q31_t)0x8e1138ea, (q31_t)0x3a50f609, (q31_t)0x8e0e5bf4, (q31_t)0x3a4b5e1b, (q31_t)0x8e0b7f44, (q31_t)0x3a45c608, (q31_t)0x8e08a2db,
+  (q31_t)0x3a402dd2, (q31_t)0x8e05c6b7, (q31_t)0x3a3a9577, (q31_t)0x8e02eadb, (q31_t)0x3a34fcf9, (q31_t)0x8e000f44, (q31_t)0x3a2f6457, (q31_t)0x8dfd33f4,
+  (q31_t)0x3a29cb91, (q31_t)0x8dfa58ea, (q31_t)0x3a2432a7, (q31_t)0x8df77e27, (q31_t)0x3a1e9999, (q31_t)0x8df4a3a9, (q31_t)0x3a190068, (q31_t)0x8df1c973,
+  (q31_t)0x3a136712, (q31_t)0x8deeef82, (q31_t)0x3a0dcd99, (q31_t)0x8dec15d8, (q31_t)0x3a0833fc, (q31_t)0x8de93c74, (q31_t)0x3a029a3b, (q31_t)0x8de66357,
+  (q31_t)0x39fd0056, (q31_t)0x8de38a80, (q31_t)0x39f7664e, (q31_t)0x8de0b1ef, (q31_t)0x39f1cc21, (q31_t)0x8dddd9a5, (q31_t)0x39ec31d1, (q31_t)0x8ddb01a1,
+  (q31_t)0x39e6975e, (q31_t)0x8dd829e4, (q31_t)0x39e0fcc6, (q31_t)0x8dd5526d, (q31_t)0x39db620b, (q31_t)0x8dd27b3c, (q31_t)0x39d5c72c, (q31_t)0x8dcfa452,
+  (q31_t)0x39d02c2a, (q31_t)0x8dcccdaf, (q31_t)0x39ca9104, (q31_t)0x8dc9f751, (q31_t)0x39c4f5ba, (q31_t)0x8dc7213b, (q31_t)0x39bf5a4d, (q31_t)0x8dc44b6a,
+  (q31_t)0x39b9bebc, (q31_t)0x8dc175e0, (q31_t)0x39b42307, (q31_t)0x8dbea09d, (q31_t)0x39ae872f, (q31_t)0x8dbbcba0, (q31_t)0x39a8eb33, (q31_t)0x8db8f6ea,
+  (q31_t)0x39a34f13, (q31_t)0x8db6227a, (q31_t)0x399db2d0, (q31_t)0x8db34e50, (q31_t)0x3998166a, (q31_t)0x8db07a6d, (q31_t)0x399279e0, (q31_t)0x8dada6d1,
+  (q31_t)0x398cdd32, (q31_t)0x8daad37b, (q31_t)0x39874061, (q31_t)0x8da8006c, (q31_t)0x3981a36d, (q31_t)0x8da52da3, (q31_t)0x397c0655, (q31_t)0x8da25b21,
+  (q31_t)0x39766919, (q31_t)0x8d9f88e5, (q31_t)0x3970cbba, (q31_t)0x8d9cb6f0, (q31_t)0x396b2e38, (q31_t)0x8d99e541, (q31_t)0x39659092, (q31_t)0x8d9713d9,
+  (q31_t)0x395ff2c9, (q31_t)0x8d9442b8, (q31_t)0x395a54dd, (q31_t)0x8d9171dd, (q31_t)0x3954b6cd, (q31_t)0x8d8ea148, (q31_t)0x394f1899, (q31_t)0x8d8bd0fb,
+  (q31_t)0x39497a43, (q31_t)0x8d8900f3, (q31_t)0x3943dbc9, (q31_t)0x8d863133, (q31_t)0x393e3d2c, (q31_t)0x8d8361b9, (q31_t)0x39389e6b, (q31_t)0x8d809286,
+  (q31_t)0x3932ff87, (q31_t)0x8d7dc399, (q31_t)0x392d6080, (q31_t)0x8d7af4f3, (q31_t)0x3927c155, (q31_t)0x8d782694, (q31_t)0x39222208, (q31_t)0x8d75587b,
+  (q31_t)0x391c8297, (q31_t)0x8d728aa9, (q31_t)0x3916e303, (q31_t)0x8d6fbd1d, (q31_t)0x3911434b, (q31_t)0x8d6cefd9, (q31_t)0x390ba371, (q31_t)0x8d6a22db,
+  (q31_t)0x39060373, (q31_t)0x8d675623, (q31_t)0x39006352, (q31_t)0x8d6489b3, (q31_t)0x38fac30e, (q31_t)0x8d61bd89, (q31_t)0x38f522a6, (q31_t)0x8d5ef1a5,
+  (q31_t)0x38ef821c, (q31_t)0x8d5c2609, (q31_t)0x38e9e16e, (q31_t)0x8d595ab3, (q31_t)0x38e4409e, (q31_t)0x8d568fa4, (q31_t)0x38de9faa, (q31_t)0x8d53c4db,
+  (q31_t)0x38d8fe93, (q31_t)0x8d50fa59, (q31_t)0x38d35d59, (q31_t)0x8d4e301f, (q31_t)0x38cdbbfc, (q31_t)0x8d4b662a, (q31_t)0x38c81a7c, (q31_t)0x8d489c7d,
+  (q31_t)0x38c278d9, (q31_t)0x8d45d316, (q31_t)0x38bcd713, (q31_t)0x8d4309f6, (q31_t)0x38b7352a, (q31_t)0x8d40411d, (q31_t)0x38b1931e, (q31_t)0x8d3d788b,
+  (q31_t)0x38abf0ef, (q31_t)0x8d3ab03f, (q31_t)0x38a64e9d, (q31_t)0x8d37e83a, (q31_t)0x38a0ac29, (q31_t)0x8d35207d, (q31_t)0x389b0991, (q31_t)0x8d325905,
+  (q31_t)0x389566d6, (q31_t)0x8d2f91d5, (q31_t)0x388fc3f8, (q31_t)0x8d2ccaec, (q31_t)0x388a20f8, (q31_t)0x8d2a0449, (q31_t)0x38847dd5, (q31_t)0x8d273ded,
+  (q31_t)0x387eda8e, (q31_t)0x8d2477d8, (q31_t)0x38793725, (q31_t)0x8d21b20a, (q31_t)0x38739399, (q31_t)0x8d1eec83, (q31_t)0x386defeb, (q31_t)0x8d1c2742,
+  (q31_t)0x38684c19, (q31_t)0x8d196249, (q31_t)0x3862a825, (q31_t)0x8d169d96, (q31_t)0x385d040d, (q31_t)0x8d13d92a, (q31_t)0x38575fd4, (q31_t)0x8d111505,
+  (q31_t)0x3851bb77, (q31_t)0x8d0e5127, (q31_t)0x384c16f7, (q31_t)0x8d0b8d90, (q31_t)0x38467255, (q31_t)0x8d08ca40, (q31_t)0x3840cd90, (q31_t)0x8d060737,
+  (q31_t)0x383b28a9, (q31_t)0x8d034474, (q31_t)0x3835839f, (q31_t)0x8d0081f9, (q31_t)0x382fde72, (q31_t)0x8cfdbfc4, (q31_t)0x382a3922, (q31_t)0x8cfafdd7,
+  (q31_t)0x382493b0, (q31_t)0x8cf83c30, (q31_t)0x381eee1b, (q31_t)0x8cf57ad0, (q31_t)0x38194864, (q31_t)0x8cf2b9b8, (q31_t)0x3813a28a, (q31_t)0x8ceff8e6,
+  (q31_t)0x380dfc8d, (q31_t)0x8ced385b, (q31_t)0x3808566e, (q31_t)0x8cea7818, (q31_t)0x3802b02c, (q31_t)0x8ce7b81b, (q31_t)0x37fd09c8, (q31_t)0x8ce4f865,
+  (q31_t)0x37f76341, (q31_t)0x8ce238f6, (q31_t)0x37f1bc97, (q31_t)0x8cdf79ce, (q31_t)0x37ec15cb, (q31_t)0x8cdcbaee, (q31_t)0x37e66edd, (q31_t)0x8cd9fc54,
+  (q31_t)0x37e0c7cc, (q31_t)0x8cd73e01, (q31_t)0x37db2099, (q31_t)0x8cd47ff6, (q31_t)0x37d57943, (q31_t)0x8cd1c231, (q31_t)0x37cfd1cb, (q31_t)0x8ccf04b3,
+  (q31_t)0x37ca2a30, (q31_t)0x8ccc477d, (q31_t)0x37c48273, (q31_t)0x8cc98a8e, (q31_t)0x37beda93, (q31_t)0x8cc6cde5, (q31_t)0x37b93292, (q31_t)0x8cc41184,
+  (q31_t)0x37b38a6d, (q31_t)0x8cc1556a, (q31_t)0x37ade227, (q31_t)0x8cbe9996, (q31_t)0x37a839be, (q31_t)0x8cbbde0a, (q31_t)0x37a29132, (q31_t)0x8cb922c6,
+  (q31_t)0x379ce885, (q31_t)0x8cb667c8, (q31_t)0x37973fb5, (q31_t)0x8cb3ad11, (q31_t)0x379196c3, (q31_t)0x8cb0f2a1, (q31_t)0x378bedae, (q31_t)0x8cae3879,
+  (q31_t)0x37864477, (q31_t)0x8cab7e98, (q31_t)0x37809b1e, (q31_t)0x8ca8c4fd, (q31_t)0x377af1a3, (q31_t)0x8ca60baa, (q31_t)0x37754806, (q31_t)0x8ca3529f,
+  (q31_t)0x376f9e46, (q31_t)0x8ca099da, (q31_t)0x3769f464, (q31_t)0x8c9de15c, (q31_t)0x37644a60, (q31_t)0x8c9b2926, (q31_t)0x375ea03a, (q31_t)0x8c987137,
+  (q31_t)0x3758f5f2, (q31_t)0x8c95b98f, (q31_t)0x37534b87, (q31_t)0x8c93022e, (q31_t)0x374da0fa, (q31_t)0x8c904b14, (q31_t)0x3747f64c, (q31_t)0x8c8d9442,
+  (q31_t)0x37424b7b, (q31_t)0x8c8addb7, (q31_t)0x373ca088, (q31_t)0x8c882773, (q31_t)0x3736f573, (q31_t)0x8c857176, (q31_t)0x37314a3c, (q31_t)0x8c82bbc0,
+  (q31_t)0x372b9ee3, (q31_t)0x8c800652, (q31_t)0x3725f367, (q31_t)0x8c7d512b, (q31_t)0x372047ca, (q31_t)0x8c7a9c4b, (q31_t)0x371a9c0b, (q31_t)0x8c77e7b3,
+  (q31_t)0x3714f02a, (q31_t)0x8c753362, (q31_t)0x370f4427, (q31_t)0x8c727f58, (q31_t)0x37099802, (q31_t)0x8c6fcb95, (q31_t)0x3703ebbb, (q31_t)0x8c6d181a,
+  (q31_t)0x36fe3f52, (q31_t)0x8c6a64e5, (q31_t)0x36f892c7, (q31_t)0x8c67b1f9, (q31_t)0x36f2e61a, (q31_t)0x8c64ff53, (q31_t)0x36ed394b, (q31_t)0x8c624cf5,
+  (q31_t)0x36e78c5b, (q31_t)0x8c5f9ade, (q31_t)0x36e1df48, (q31_t)0x8c5ce90e, (q31_t)0x36dc3214, (q31_t)0x8c5a3786, (q31_t)0x36d684be, (q31_t)0x8c578645,
+  (q31_t)0x36d0d746, (q31_t)0x8c54d54c, (q31_t)0x36cb29ac, (q31_t)0x8c522499, (q31_t)0x36c57bf0, (q31_t)0x8c4f742f, (q31_t)0x36bfce13, (q31_t)0x8c4cc40b,
+  (q31_t)0x36ba2014, (q31_t)0x8c4a142f, (q31_t)0x36b471f3, (q31_t)0x8c47649a, (q31_t)0x36aec3b0, (q31_t)0x8c44b54d, (q31_t)0x36a9154c, (q31_t)0x8c420647,
+  (q31_t)0x36a366c6, (q31_t)0x8c3f5788, (q31_t)0x369db81e, (q31_t)0x8c3ca911, (q31_t)0x36980954, (q31_t)0x8c39fae1, (q31_t)0x36925a69, (q31_t)0x8c374cf9,
+  (q31_t)0x368cab5c, (q31_t)0x8c349f58, (q31_t)0x3686fc2e, (q31_t)0x8c31f1ff, (q31_t)0x36814cde, (q31_t)0x8c2f44ed, (q31_t)0x367b9d6c, (q31_t)0x8c2c9822,
+  (q31_t)0x3675edd9, (q31_t)0x8c29eb9f, (q31_t)0x36703e24, (q31_t)0x8c273f63, (q31_t)0x366a8e4d, (q31_t)0x8c24936f, (q31_t)0x3664de55, (q31_t)0x8c21e7c2,
+  (q31_t)0x365f2e3b, (q31_t)0x8c1f3c5d, (q31_t)0x36597e00, (q31_t)0x8c1c913f, (q31_t)0x3653cda3, (q31_t)0x8c19e669, (q31_t)0x364e1d25, (q31_t)0x8c173bda,
+  (q31_t)0x36486c86, (q31_t)0x8c149192, (q31_t)0x3642bbc4, (q31_t)0x8c11e792, (q31_t)0x363d0ae2, (q31_t)0x8c0f3dda, (q31_t)0x363759de, (q31_t)0x8c0c9469,
+  (q31_t)0x3631a8b8, (q31_t)0x8c09eb40, (q31_t)0x362bf771, (q31_t)0x8c07425e, (q31_t)0x36264609, (q31_t)0x8c0499c4, (q31_t)0x3620947f, (q31_t)0x8c01f171,
+  (q31_t)0x361ae2d3, (q31_t)0x8bff4966, (q31_t)0x36153107, (q31_t)0x8bfca1a3, (q31_t)0x360f7f19, (q31_t)0x8bf9fa27, (q31_t)0x3609cd0a, (q31_t)0x8bf752f2,
+  (q31_t)0x36041ad9, (q31_t)0x8bf4ac05, (q31_t)0x35fe6887, (q31_t)0x8bf20560, (q31_t)0x35f8b614, (q31_t)0x8bef5f02, (q31_t)0x35f3037f, (q31_t)0x8becb8ec,
+  (q31_t)0x35ed50c9, (q31_t)0x8bea131e, (q31_t)0x35e79df2, (q31_t)0x8be76d97, (q31_t)0x35e1eafa, (q31_t)0x8be4c857, (q31_t)0x35dc37e0, (q31_t)0x8be22360,
+  (q31_t)0x35d684a6, (q31_t)0x8bdf7eb0, (q31_t)0x35d0d14a, (q31_t)0x8bdcda47, (q31_t)0x35cb1dcc, (q31_t)0x8bda3626, (q31_t)0x35c56a2e, (q31_t)0x8bd7924d,
+  (q31_t)0x35bfb66e, (q31_t)0x8bd4eebc, (q31_t)0x35ba028e, (q31_t)0x8bd24b72, (q31_t)0x35b44e8c, (q31_t)0x8bcfa870, (q31_t)0x35ae9a69, (q31_t)0x8bcd05b5,
+  (q31_t)0x35a8e625, (q31_t)0x8bca6343, (q31_t)0x35a331c0, (q31_t)0x8bc7c117, (q31_t)0x359d7d39, (q31_t)0x8bc51f34, (q31_t)0x3597c892, (q31_t)0x8bc27d98,
+  (q31_t)0x359213c9, (q31_t)0x8bbfdc44, (q31_t)0x358c5ee0, (q31_t)0x8bbd3b38, (q31_t)0x3586a9d5, (q31_t)0x8bba9a73, (q31_t)0x3580f4aa, (q31_t)0x8bb7f9f6,
+  (q31_t)0x357b3f5d, (q31_t)0x8bb559c1, (q31_t)0x357589f0, (q31_t)0x8bb2b9d4, (q31_t)0x356fd461, (q31_t)0x8bb01a2e, (q31_t)0x356a1eb2, (q31_t)0x8bad7ad0,
+  (q31_t)0x356468e2, (q31_t)0x8baadbba, (q31_t)0x355eb2f0, (q31_t)0x8ba83cec, (q31_t)0x3558fcde, (q31_t)0x8ba59e65, (q31_t)0x355346ab, (q31_t)0x8ba30026,
+  (q31_t)0x354d9057, (q31_t)0x8ba0622f, (q31_t)0x3547d9e2, (q31_t)0x8b9dc480, (q31_t)0x3542234c, (q31_t)0x8b9b2718, (q31_t)0x353c6c95, (q31_t)0x8b9889f8,
+  (q31_t)0x3536b5be, (q31_t)0x8b95ed21, (q31_t)0x3530fec6, (q31_t)0x8b935090, (q31_t)0x352b47ad, (q31_t)0x8b90b448, (q31_t)0x35259073, (q31_t)0x8b8e1848,
+  (q31_t)0x351fd918, (q31_t)0x8b8b7c8f, (q31_t)0x351a219c, (q31_t)0x8b88e11e, (q31_t)0x35146a00, (q31_t)0x8b8645f5, (q31_t)0x350eb243, (q31_t)0x8b83ab14,
+  (q31_t)0x3508fa66, (q31_t)0x8b81107b, (q31_t)0x35034267, (q31_t)0x8b7e7629, (q31_t)0x34fd8a48, (q31_t)0x8b7bdc20, (q31_t)0x34f7d208, (q31_t)0x8b79425e,
+  (q31_t)0x34f219a8, (q31_t)0x8b76a8e4, (q31_t)0x34ec6127, (q31_t)0x8b740fb3, (q31_t)0x34e6a885, (q31_t)0x8b7176c8, (q31_t)0x34e0efc2, (q31_t)0x8b6ede26,
+  (q31_t)0x34db36df, (q31_t)0x8b6c45cc, (q31_t)0x34d57ddc, (q31_t)0x8b69adba, (q31_t)0x34cfc4b7, (q31_t)0x8b6715ef, (q31_t)0x34ca0b73, (q31_t)0x8b647e6d,
+  (q31_t)0x34c4520d, (q31_t)0x8b61e733, (q31_t)0x34be9887, (q31_t)0x8b5f5040, (q31_t)0x34b8dee1, (q31_t)0x8b5cb995, (q31_t)0x34b3251a, (q31_t)0x8b5a2333,
+  (q31_t)0x34ad6b32, (q31_t)0x8b578d18, (q31_t)0x34a7b12a, (q31_t)0x8b54f745, (q31_t)0x34a1f702, (q31_t)0x8b5261ba, (q31_t)0x349c3cb9, (q31_t)0x8b4fcc77,
+  (q31_t)0x34968250, (q31_t)0x8b4d377c, (q31_t)0x3490c7c6, (q31_t)0x8b4aa2ca, (q31_t)0x348b0d1c, (q31_t)0x8b480e5f, (q31_t)0x34855251, (q31_t)0x8b457a3c,
+  (q31_t)0x347f9766, (q31_t)0x8b42e661, (q31_t)0x3479dc5b, (q31_t)0x8b4052ce, (q31_t)0x3474212f, (q31_t)0x8b3dbf83, (q31_t)0x346e65e3, (q31_t)0x8b3b2c80,
+  (q31_t)0x3468aa76, (q31_t)0x8b3899c6, (q31_t)0x3462eee9, (q31_t)0x8b360753, (q31_t)0x345d333c, (q31_t)0x8b337528, (q31_t)0x3457776f, (q31_t)0x8b30e345,
+  (q31_t)0x3451bb81, (q31_t)0x8b2e51ab, (q31_t)0x344bff73, (q31_t)0x8b2bc058, (q31_t)0x34464345, (q31_t)0x8b292f4e, (q31_t)0x344086f6, (q31_t)0x8b269e8b,
+  (q31_t)0x343aca87, (q31_t)0x8b240e11, (q31_t)0x34350df8, (q31_t)0x8b217ddf, (q31_t)0x342f5149, (q31_t)0x8b1eedf4, (q31_t)0x3429947a, (q31_t)0x8b1c5e52,
+  (q31_t)0x3423d78a, (q31_t)0x8b19cef8, (q31_t)0x341e1a7b, (q31_t)0x8b173fe6, (q31_t)0x34185d4b, (q31_t)0x8b14b11d, (q31_t)0x34129ffb, (q31_t)0x8b12229b,
+  (q31_t)0x340ce28b, (q31_t)0x8b0f9462, (q31_t)0x340724fb, (q31_t)0x8b0d0670, (q31_t)0x3401674a, (q31_t)0x8b0a78c7, (q31_t)0x33fba97a, (q31_t)0x8b07eb66,
+  (q31_t)0x33f5eb89, (q31_t)0x8b055e4d, (q31_t)0x33f02d79, (q31_t)0x8b02d17c, (q31_t)0x33ea6f48, (q31_t)0x8b0044f3, (q31_t)0x33e4b0f8, (q31_t)0x8afdb8b3,
+  (q31_t)0x33def287, (q31_t)0x8afb2cbb, (q31_t)0x33d933f7, (q31_t)0x8af8a10b, (q31_t)0x33d37546, (q31_t)0x8af615a3, (q31_t)0x33cdb676, (q31_t)0x8af38a83,
+  (q31_t)0x33c7f785, (q31_t)0x8af0ffac, (q31_t)0x33c23875, (q31_t)0x8aee751c, (q31_t)0x33bc7944, (q31_t)0x8aebead5, (q31_t)0x33b6b9f4, (q31_t)0x8ae960d6,
+  (q31_t)0x33b0fa84, (q31_t)0x8ae6d720, (q31_t)0x33ab3af4, (q31_t)0x8ae44db1, (q31_t)0x33a57b44, (q31_t)0x8ae1c48b, (q31_t)0x339fbb74, (q31_t)0x8adf3bad,
+  (q31_t)0x3399fb85, (q31_t)0x8adcb318, (q31_t)0x33943b75, (q31_t)0x8ada2aca, (q31_t)0x338e7b46, (q31_t)0x8ad7a2c5, (q31_t)0x3388baf7, (q31_t)0x8ad51b08,
+  (q31_t)0x3382fa88, (q31_t)0x8ad29394, (q31_t)0x337d39f9, (q31_t)0x8ad00c67, (q31_t)0x3377794b, (q31_t)0x8acd8583, (q31_t)0x3371b87d, (q31_t)0x8acafee8,
+  (q31_t)0x336bf78f, (q31_t)0x8ac87894, (q31_t)0x33663682, (q31_t)0x8ac5f289, (q31_t)0x33607554, (q31_t)0x8ac36cc6, (q31_t)0x335ab407, (q31_t)0x8ac0e74c,
+  (q31_t)0x3354f29b, (q31_t)0x8abe6219, (q31_t)0x334f310e, (q31_t)0x8abbdd30, (q31_t)0x33496f62, (q31_t)0x8ab9588e, (q31_t)0x3343ad97, (q31_t)0x8ab6d435,
+  (q31_t)0x333debab, (q31_t)0x8ab45024, (q31_t)0x333829a1, (q31_t)0x8ab1cc5c, (q31_t)0x33326776, (q31_t)0x8aaf48db, (q31_t)0x332ca52c, (q31_t)0x8aacc5a4,
+  (q31_t)0x3326e2c3, (q31_t)0x8aaa42b4, (q31_t)0x33212039, (q31_t)0x8aa7c00d, (q31_t)0x331b5d91, (q31_t)0x8aa53daf, (q31_t)0x33159ac8, (q31_t)0x8aa2bb99,
+  (q31_t)0x330fd7e1, (q31_t)0x8aa039cb, (q31_t)0x330a14da, (q31_t)0x8a9db845, (q31_t)0x330451b3, (q31_t)0x8a9b3708, (q31_t)0x32fe8e6d, (q31_t)0x8a98b614,
+  (q31_t)0x32f8cb07, (q31_t)0x8a963567, (q31_t)0x32f30782, (q31_t)0x8a93b504, (q31_t)0x32ed43de, (q31_t)0x8a9134e8, (q31_t)0x32e7801a, (q31_t)0x8a8eb516,
+  (q31_t)0x32e1bc36, (q31_t)0x8a8c358b, (q31_t)0x32dbf834, (q31_t)0x8a89b649, (q31_t)0x32d63412, (q31_t)0x8a873750, (q31_t)0x32d06fd0, (q31_t)0x8a84b89e,
+  (q31_t)0x32caab6f, (q31_t)0x8a823a36, (q31_t)0x32c4e6ef, (q31_t)0x8a7fbc16, (q31_t)0x32bf2250, (q31_t)0x8a7d3e3e, (q31_t)0x32b95d91, (q31_t)0x8a7ac0af,
+  (q31_t)0x32b398b3, (q31_t)0x8a784368, (q31_t)0x32add3b6, (q31_t)0x8a75c66a, (q31_t)0x32a80e99, (q31_t)0x8a7349b4, (q31_t)0x32a2495d, (q31_t)0x8a70cd47,
+  (q31_t)0x329c8402, (q31_t)0x8a6e5123, (q31_t)0x3296be88, (q31_t)0x8a6bd547, (q31_t)0x3290f8ef, (q31_t)0x8a6959b3, (q31_t)0x328b3336, (q31_t)0x8a66de68,
+  (q31_t)0x32856d5e, (q31_t)0x8a646365, (q31_t)0x327fa767, (q31_t)0x8a61e8ab, (q31_t)0x3279e151, (q31_t)0x8a5f6e3a, (q31_t)0x32741b1c, (q31_t)0x8a5cf411,
+  (q31_t)0x326e54c7, (q31_t)0x8a5a7a31, (q31_t)0x32688e54, (q31_t)0x8a580099, (q31_t)0x3262c7c1, (q31_t)0x8a55874a, (q31_t)0x325d0110, (q31_t)0x8a530e43,
+  (q31_t)0x32573a3f, (q31_t)0x8a509585, (q31_t)0x3251734f, (q31_t)0x8a4e1d10, (q31_t)0x324bac40, (q31_t)0x8a4ba4e3, (q31_t)0x3245e512, (q31_t)0x8a492cff,
+  (q31_t)0x32401dc6, (q31_t)0x8a46b564, (q31_t)0x323a565a, (q31_t)0x8a443e11, (q31_t)0x32348ecf, (q31_t)0x8a41c706, (q31_t)0x322ec725, (q31_t)0x8a3f5045,
+  (q31_t)0x3228ff5c, (q31_t)0x8a3cd9cc, (q31_t)0x32233775, (q31_t)0x8a3a639b, (q31_t)0x321d6f6e, (q31_t)0x8a37edb3, (q31_t)0x3217a748, (q31_t)0x8a357814,
+  (q31_t)0x3211df04, (q31_t)0x8a3302be, (q31_t)0x320c16a1, (q31_t)0x8a308db0, (q31_t)0x32064e1e, (q31_t)0x8a2e18eb, (q31_t)0x3200857d, (q31_t)0x8a2ba46e,
+  (q31_t)0x31fabcbd, (q31_t)0x8a29303b, (q31_t)0x31f4f3df, (q31_t)0x8a26bc50, (q31_t)0x31ef2ae1, (q31_t)0x8a2448ad, (q31_t)0x31e961c5, (q31_t)0x8a21d554,
+  (q31_t)0x31e39889, (q31_t)0x8a1f6243, (q31_t)0x31ddcf30, (q31_t)0x8a1cef7a, (q31_t)0x31d805b7, (q31_t)0x8a1a7cfb, (q31_t)0x31d23c1f, (q31_t)0x8a180ac4,
+  (q31_t)0x31cc7269, (q31_t)0x8a1598d6, (q31_t)0x31c6a894, (q31_t)0x8a132731, (q31_t)0x31c0dea1, (q31_t)0x8a10b5d4, (q31_t)0x31bb148f, (q31_t)0x8a0e44c0,
+  (q31_t)0x31b54a5e, (q31_t)0x8a0bd3f5, (q31_t)0x31af800e, (q31_t)0x8a096373, (q31_t)0x31a9b5a0, (q31_t)0x8a06f339, (q31_t)0x31a3eb13, (q31_t)0x8a048348,
+  (q31_t)0x319e2067, (q31_t)0x8a0213a0, (q31_t)0x3198559d, (q31_t)0x89ffa441, (q31_t)0x31928ab4, (q31_t)0x89fd352b, (q31_t)0x318cbfad, (q31_t)0x89fac65d,
+  (q31_t)0x3186f487, (q31_t)0x89f857d8, (q31_t)0x31812943, (q31_t)0x89f5e99c, (q31_t)0x317b5de0, (q31_t)0x89f37ba9, (q31_t)0x3175925e, (q31_t)0x89f10dff,
+  (q31_t)0x316fc6be, (q31_t)0x89eea09d, (q31_t)0x3169fb00, (q31_t)0x89ec3384, (q31_t)0x31642f23, (q31_t)0x89e9c6b4, (q31_t)0x315e6328, (q31_t)0x89e75a2d,
+  (q31_t)0x3158970e, (q31_t)0x89e4edef, (q31_t)0x3152cad5, (q31_t)0x89e281fa, (q31_t)0x314cfe7f, (q31_t)0x89e0164d, (q31_t)0x31473209, (q31_t)0x89ddaae9,
+  (q31_t)0x31416576, (q31_t)0x89db3fcf, (q31_t)0x313b98c4, (q31_t)0x89d8d4fd, (q31_t)0x3135cbf4, (q31_t)0x89d66a74, (q31_t)0x312fff05, (q31_t)0x89d40033,
+  (q31_t)0x312a31f8, (q31_t)0x89d1963c, (q31_t)0x312464cd, (q31_t)0x89cf2c8e, (q31_t)0x311e9783, (q31_t)0x89ccc328, (q31_t)0x3118ca1b, (q31_t)0x89ca5a0c,
+  (q31_t)0x3112fc95, (q31_t)0x89c7f138, (q31_t)0x310d2ef0, (q31_t)0x89c588ae, (q31_t)0x3107612e, (q31_t)0x89c3206c, (q31_t)0x3101934d, (q31_t)0x89c0b873,
+  (q31_t)0x30fbc54d, (q31_t)0x89be50c3, (q31_t)0x30f5f730, (q31_t)0x89bbe95c, (q31_t)0x30f028f4, (q31_t)0x89b9823e, (q31_t)0x30ea5a9a, (q31_t)0x89b71b69,
+  (q31_t)0x30e48c22, (q31_t)0x89b4b4dd, (q31_t)0x30debd8c, (q31_t)0x89b24e9a, (q31_t)0x30d8eed8, (q31_t)0x89afe8a0, (q31_t)0x30d32006, (q31_t)0x89ad82ef,
+  (q31_t)0x30cd5115, (q31_t)0x89ab1d87, (q31_t)0x30c78206, (q31_t)0x89a8b868, (q31_t)0x30c1b2da, (q31_t)0x89a65391, (q31_t)0x30bbe38f, (q31_t)0x89a3ef04,
+  (q31_t)0x30b61426, (q31_t)0x89a18ac0, (q31_t)0x30b0449f, (q31_t)0x899f26c5, (q31_t)0x30aa74fa, (q31_t)0x899cc313, (q31_t)0x30a4a537, (q31_t)0x899a5faa,
+  (q31_t)0x309ed556, (q31_t)0x8997fc8a, (q31_t)0x30990557, (q31_t)0x899599b3, (q31_t)0x3093353a, (q31_t)0x89933725, (q31_t)0x308d64ff, (q31_t)0x8990d4e0,
+  (q31_t)0x308794a6, (q31_t)0x898e72e4, (q31_t)0x3081c42f, (q31_t)0x898c1131, (q31_t)0x307bf39b, (q31_t)0x8989afc8, (q31_t)0x307622e8, (q31_t)0x89874ea7,
+  (q31_t)0x30705217, (q31_t)0x8984edcf, (q31_t)0x306a8129, (q31_t)0x89828d41, (q31_t)0x3064b01d, (q31_t)0x89802cfc, (q31_t)0x305edef3, (q31_t)0x897dccff,
+  (q31_t)0x30590dab, (q31_t)0x897b6d4c, (q31_t)0x30533c45, (q31_t)0x89790de2, (q31_t)0x304d6ac1, (q31_t)0x8976aec1, (q31_t)0x30479920, (q31_t)0x89744fe9,
+  (q31_t)0x3041c761, (q31_t)0x8971f15a, (q31_t)0x303bf584, (q31_t)0x896f9315, (q31_t)0x30362389, (q31_t)0x896d3518, (q31_t)0x30305171, (q31_t)0x896ad765,
+  (q31_t)0x302a7f3a, (q31_t)0x896879fb, (q31_t)0x3024ace6, (q31_t)0x89661cda, (q31_t)0x301eda75, (q31_t)0x8963c002, (q31_t)0x301907e6, (q31_t)0x89616373,
+  (q31_t)0x30133539, (q31_t)0x895f072e, (q31_t)0x300d626e, (q31_t)0x895cab31, (q31_t)0x30078f86, (q31_t)0x895a4f7e, (q31_t)0x3001bc80, (q31_t)0x8957f414,
+  (q31_t)0x2ffbe95d, (q31_t)0x895598f3, (q31_t)0x2ff6161c, (q31_t)0x89533e1c, (q31_t)0x2ff042bd, (q31_t)0x8950e38e, (q31_t)0x2fea6f41, (q31_t)0x894e8948,
+  (q31_t)0x2fe49ba7, (q31_t)0x894c2f4c, (q31_t)0x2fdec7f0, (q31_t)0x8949d59a, (q31_t)0x2fd8f41b, (q31_t)0x89477c30, (q31_t)0x2fd32028, (q31_t)0x89452310,
+  (q31_t)0x2fcd4c19, (q31_t)0x8942ca39, (q31_t)0x2fc777eb, (q31_t)0x894071ab, (q31_t)0x2fc1a3a0, (q31_t)0x893e1967, (q31_t)0x2fbbcf38, (q31_t)0x893bc16b,
+  (q31_t)0x2fb5fab2, (q31_t)0x893969b9, (q31_t)0x2fb0260f, (q31_t)0x89371250, (q31_t)0x2faa514f, (q31_t)0x8934bb31, (q31_t)0x2fa47c71, (q31_t)0x8932645b,
+  (q31_t)0x2f9ea775, (q31_t)0x89300dce, (q31_t)0x2f98d25d, (q31_t)0x892db78a, (q31_t)0x2f92fd26, (q31_t)0x892b6190, (q31_t)0x2f8d27d3, (q31_t)0x89290bdf,
+  (q31_t)0x2f875262, (q31_t)0x8926b677, (q31_t)0x2f817cd4, (q31_t)0x89246159, (q31_t)0x2f7ba729, (q31_t)0x89220c84, (q31_t)0x2f75d160, (q31_t)0x891fb7f8,
+  (q31_t)0x2f6ffb7a, (q31_t)0x891d63b5, (q31_t)0x2f6a2577, (q31_t)0x891b0fbc, (q31_t)0x2f644f56, (q31_t)0x8918bc0c, (q31_t)0x2f5e7919, (q31_t)0x891668a6,
+  (q31_t)0x2f58a2be, (q31_t)0x89141589, (q31_t)0x2f52cc46, (q31_t)0x8911c2b5, (q31_t)0x2f4cf5b0, (q31_t)0x890f702b, (q31_t)0x2f471efe, (q31_t)0x890d1dea,
+  (q31_t)0x2f41482e, (q31_t)0x890acbf2, (q31_t)0x2f3b7141, (q31_t)0x89087a44, (q31_t)0x2f359a37, (q31_t)0x890628df, (q31_t)0x2f2fc310, (q31_t)0x8903d7c4,
+  (q31_t)0x2f29ebcc, (q31_t)0x890186f2, (q31_t)0x2f24146b, (q31_t)0x88ff3669, (q31_t)0x2f1e3ced, (q31_t)0x88fce62a, (q31_t)0x2f186551, (q31_t)0x88fa9634,
+  (q31_t)0x2f128d99, (q31_t)0x88f84687, (q31_t)0x2f0cb5c3, (q31_t)0x88f5f724, (q31_t)0x2f06ddd1, (q31_t)0x88f3a80b, (q31_t)0x2f0105c1, (q31_t)0x88f1593b,
+  (q31_t)0x2efb2d95, (q31_t)0x88ef0ab4, (q31_t)0x2ef5554b, (q31_t)0x88ecbc77, (q31_t)0x2eef7ce5, (q31_t)0x88ea6e83, (q31_t)0x2ee9a461, (q31_t)0x88e820d9,
+  (q31_t)0x2ee3cbc1, (q31_t)0x88e5d378, (q31_t)0x2eddf304, (q31_t)0x88e38660, (q31_t)0x2ed81a29, (q31_t)0x88e13992, (q31_t)0x2ed24132, (q31_t)0x88deed0e,
+  (q31_t)0x2ecc681e, (q31_t)0x88dca0d3, (q31_t)0x2ec68eed, (q31_t)0x88da54e1, (q31_t)0x2ec0b5a0, (q31_t)0x88d8093a, (q31_t)0x2ebadc35, (q31_t)0x88d5bddb,
+  (q31_t)0x2eb502ae, (q31_t)0x88d372c6, (q31_t)0x2eaf290a, (q31_t)0x88d127fb, (q31_t)0x2ea94f49, (q31_t)0x88cedd79, (q31_t)0x2ea3756b, (q31_t)0x88cc9340,
+  (q31_t)0x2e9d9b70, (q31_t)0x88ca4951, (q31_t)0x2e97c159, (q31_t)0x88c7ffac, (q31_t)0x2e91e725, (q31_t)0x88c5b650, (q31_t)0x2e8c0cd4, (q31_t)0x88c36d3e,
+  (q31_t)0x2e863267, (q31_t)0x88c12475, (q31_t)0x2e8057dd, (q31_t)0x88bedbf6, (q31_t)0x2e7a7d36, (q31_t)0x88bc93c0, (q31_t)0x2e74a272, (q31_t)0x88ba4bd4,
+  (q31_t)0x2e6ec792, (q31_t)0x88b80432, (q31_t)0x2e68ec95, (q31_t)0x88b5bcd9, (q31_t)0x2e63117c, (q31_t)0x88b375ca, (q31_t)0x2e5d3646, (q31_t)0x88b12f04,
+  (q31_t)0x2e575af3, (q31_t)0x88aee888, (q31_t)0x2e517f84, (q31_t)0x88aca255, (q31_t)0x2e4ba3f8, (q31_t)0x88aa5c6c, (q31_t)0x2e45c850, (q31_t)0x88a816cd,
+  (q31_t)0x2e3fec8b, (q31_t)0x88a5d177, (q31_t)0x2e3a10aa, (q31_t)0x88a38c6b, (q31_t)0x2e3434ac, (q31_t)0x88a147a9, (q31_t)0x2e2e5891, (q31_t)0x889f0330,
+  (q31_t)0x2e287c5a, (q31_t)0x889cbf01, (q31_t)0x2e22a007, (q31_t)0x889a7b1b, (q31_t)0x2e1cc397, (q31_t)0x88983780, (q31_t)0x2e16e70b, (q31_t)0x8895f42d,
+  (q31_t)0x2e110a62, (q31_t)0x8893b125, (q31_t)0x2e0b2d9d, (q31_t)0x88916e66, (q31_t)0x2e0550bb, (q31_t)0x888f2bf1, (q31_t)0x2dff73bd, (q31_t)0x888ce9c5,
+  (q31_t)0x2df996a3, (q31_t)0x888aa7e3, (q31_t)0x2df3b96c, (q31_t)0x8888664b, (q31_t)0x2deddc19, (q31_t)0x888624fd, (q31_t)0x2de7feaa, (q31_t)0x8883e3f8,
+  (q31_t)0x2de2211e, (q31_t)0x8881a33d, (q31_t)0x2ddc4376, (q31_t)0x887f62cb, (q31_t)0x2dd665b2, (q31_t)0x887d22a4, (q31_t)0x2dd087d1, (q31_t)0x887ae2c6,
+  (q31_t)0x2dcaa9d5, (q31_t)0x8878a332, (q31_t)0x2dc4cbbc, (q31_t)0x887663e7, (q31_t)0x2dbeed86, (q31_t)0x887424e7, (q31_t)0x2db90f35, (q31_t)0x8871e630,
+  (q31_t)0x2db330c7, (q31_t)0x886fa7c2, (q31_t)0x2dad523d, (q31_t)0x886d699f, (q31_t)0x2da77397, (q31_t)0x886b2bc5, (q31_t)0x2da194d5, (q31_t)0x8868ee35,
+  (q31_t)0x2d9bb5f6, (q31_t)0x8866b0ef, (q31_t)0x2d95d6fc, (q31_t)0x886473f2, (q31_t)0x2d8ff7e5, (q31_t)0x88623740, (q31_t)0x2d8a18b3, (q31_t)0x885ffad7,
+  (q31_t)0x2d843964, (q31_t)0x885dbeb8, (q31_t)0x2d7e59f9, (q31_t)0x885b82e3, (q31_t)0x2d787a72, (q31_t)0x88594757, (q31_t)0x2d729acf, (q31_t)0x88570c16,
+  (q31_t)0x2d6cbb10, (q31_t)0x8854d11e, (q31_t)0x2d66db35, (q31_t)0x88529670, (q31_t)0x2d60fb3e, (q31_t)0x88505c0b, (q31_t)0x2d5b1b2b, (q31_t)0x884e21f1,
+  (q31_t)0x2d553afc, (q31_t)0x884be821, (q31_t)0x2d4f5ab1, (q31_t)0x8849ae9a, (q31_t)0x2d497a4a, (q31_t)0x8847755d, (q31_t)0x2d4399c7, (q31_t)0x88453c6a,
+  (q31_t)0x2d3db928, (q31_t)0x884303c1, (q31_t)0x2d37d86d, (q31_t)0x8840cb61, (q31_t)0x2d31f797, (q31_t)0x883e934c, (q31_t)0x2d2c16a4, (q31_t)0x883c5b81,
+  (q31_t)0x2d263596, (q31_t)0x883a23ff, (q31_t)0x2d20546b, (q31_t)0x8837ecc7, (q31_t)0x2d1a7325, (q31_t)0x8835b5d9, (q31_t)0x2d1491c4, (q31_t)0x88337f35,
+  (q31_t)0x2d0eb046, (q31_t)0x883148db, (q31_t)0x2d08ceac, (q31_t)0x882f12cb, (q31_t)0x2d02ecf7, (q31_t)0x882cdd04, (q31_t)0x2cfd0b26, (q31_t)0x882aa788,
+  (q31_t)0x2cf72939, (q31_t)0x88287256, (q31_t)0x2cf14731, (q31_t)0x88263d6d, (q31_t)0x2ceb650d, (q31_t)0x882408ce, (q31_t)0x2ce582cd, (q31_t)0x8821d47a,
+  (q31_t)0x2cdfa071, (q31_t)0x881fa06f, (q31_t)0x2cd9bdfa, (q31_t)0x881d6cae, (q31_t)0x2cd3db67, (q31_t)0x881b3937, (q31_t)0x2ccdf8b8, (q31_t)0x8819060a,
+  (q31_t)0x2cc815ee, (q31_t)0x8816d327, (q31_t)0x2cc23308, (q31_t)0x8814a08f, (q31_t)0x2cbc5006, (q31_t)0x88126e40, (q31_t)0x2cb66ce9, (q31_t)0x88103c3b,
+  (q31_t)0x2cb089b1, (q31_t)0x880e0a7f, (q31_t)0x2caaa65c, (q31_t)0x880bd90e, (q31_t)0x2ca4c2ed, (q31_t)0x8809a7e7, (q31_t)0x2c9edf61, (q31_t)0x8807770a,
+  (q31_t)0x2c98fbba, (q31_t)0x88054677, (q31_t)0x2c9317f8, (q31_t)0x8803162e, (q31_t)0x2c8d341a, (q31_t)0x8800e62f, (q31_t)0x2c875021, (q31_t)0x87feb67a,
+  (q31_t)0x2c816c0c, (q31_t)0x87fc870f, (q31_t)0x2c7b87dc, (q31_t)0x87fa57ee, (q31_t)0x2c75a390, (q31_t)0x87f82917, (q31_t)0x2c6fbf29, (q31_t)0x87f5fa8b,
+  (q31_t)0x2c69daa6, (q31_t)0x87f3cc48, (q31_t)0x2c63f609, (q31_t)0x87f19e4f, (q31_t)0x2c5e114f, (q31_t)0x87ef70a0, (q31_t)0x2c582c7b, (q31_t)0x87ed433c,
+  (q31_t)0x2c52478a, (q31_t)0x87eb1621, (q31_t)0x2c4c627f, (q31_t)0x87e8e950, (q31_t)0x2c467d58, (q31_t)0x87e6bcca, (q31_t)0x2c409816, (q31_t)0x87e4908e,
+  (q31_t)0x2c3ab2b9, (q31_t)0x87e2649b, (q31_t)0x2c34cd40, (q31_t)0x87e038f3, (q31_t)0x2c2ee7ad, (q31_t)0x87de0d95, (q31_t)0x2c2901fd, (q31_t)0x87dbe281,
+  (q31_t)0x2c231c33, (q31_t)0x87d9b7b7, (q31_t)0x2c1d364e, (q31_t)0x87d78d38, (q31_t)0x2c17504d, (q31_t)0x87d56302, (q31_t)0x2c116a31, (q31_t)0x87d33916,
+  (q31_t)0x2c0b83fa, (q31_t)0x87d10f75, (q31_t)0x2c059da7, (q31_t)0x87cee61e, (q31_t)0x2bffb73a, (q31_t)0x87ccbd11, (q31_t)0x2bf9d0b1, (q31_t)0x87ca944e,
+  (q31_t)0x2bf3ea0d, (q31_t)0x87c86bd5, (q31_t)0x2bee034e, (q31_t)0x87c643a6, (q31_t)0x2be81c74, (q31_t)0x87c41bc2, (q31_t)0x2be2357f, (q31_t)0x87c1f427,
+  (q31_t)0x2bdc4e6f, (q31_t)0x87bfccd7, (q31_t)0x2bd66744, (q31_t)0x87bda5d1, (q31_t)0x2bd07ffe, (q31_t)0x87bb7f16, (q31_t)0x2bca989d, (q31_t)0x87b958a4,
+  (q31_t)0x2bc4b120, (q31_t)0x87b7327d, (q31_t)0x2bbec989, (q31_t)0x87b50c9f, (q31_t)0x2bb8e1d7, (q31_t)0x87b2e70c, (q31_t)0x2bb2fa0a, (q31_t)0x87b0c1c4,
+  (q31_t)0x2bad1221, (q31_t)0x87ae9cc5, (q31_t)0x2ba72a1e, (q31_t)0x87ac7811, (q31_t)0x2ba14200, (q31_t)0x87aa53a6, (q31_t)0x2b9b59c7, (q31_t)0x87a82f87,
+  (q31_t)0x2b957173, (q31_t)0x87a60bb1, (q31_t)0x2b8f8905, (q31_t)0x87a3e825, (q31_t)0x2b89a07b, (q31_t)0x87a1c4e4, (q31_t)0x2b83b7d7, (q31_t)0x879fa1ed,
+  (q31_t)0x2b7dcf17, (q31_t)0x879d7f41, (q31_t)0x2b77e63d, (q31_t)0x879b5cde, (q31_t)0x2b71fd48, (q31_t)0x87993ac6, (q31_t)0x2b6c1438, (q31_t)0x879718f8,
+  (q31_t)0x2b662b0e, (q31_t)0x8794f774, (q31_t)0x2b6041c9, (q31_t)0x8792d63b, (q31_t)0x2b5a5868, (q31_t)0x8790b54c, (q31_t)0x2b546eee, (q31_t)0x878e94a7,
+  (q31_t)0x2b4e8558, (q31_t)0x878c744d, (q31_t)0x2b489ba8, (q31_t)0x878a543d, (q31_t)0x2b42b1dd, (q31_t)0x87883477, (q31_t)0x2b3cc7f7, (q31_t)0x878614fb,
+  (q31_t)0x2b36ddf7, (q31_t)0x8783f5ca, (q31_t)0x2b30f3dc, (q31_t)0x8781d6e3, (q31_t)0x2b2b09a6, (q31_t)0x877fb846, (q31_t)0x2b251f56, (q31_t)0x877d99f4,
+  (q31_t)0x2b1f34eb, (q31_t)0x877b7bec, (q31_t)0x2b194a66, (q31_t)0x87795e2f, (q31_t)0x2b135fc6, (q31_t)0x877740bb, (q31_t)0x2b0d750b, (q31_t)0x87752392,
+  (q31_t)0x2b078a36, (q31_t)0x877306b4, (q31_t)0x2b019f46, (q31_t)0x8770ea20, (q31_t)0x2afbb43c, (q31_t)0x876ecdd6, (q31_t)0x2af5c917, (q31_t)0x876cb1d6,
+  (q31_t)0x2aefddd8, (q31_t)0x876a9621, (q31_t)0x2ae9f27e, (q31_t)0x87687ab7, (q31_t)0x2ae4070a, (q31_t)0x87665f96, (q31_t)0x2ade1b7c, (q31_t)0x876444c1,
+  (q31_t)0x2ad82fd2, (q31_t)0x87622a35, (q31_t)0x2ad2440f, (q31_t)0x87600ff4, (q31_t)0x2acc5831, (q31_t)0x875df5fd, (q31_t)0x2ac66c39, (q31_t)0x875bdc51,
+  (q31_t)0x2ac08026, (q31_t)0x8759c2ef, (q31_t)0x2aba93f9, (q31_t)0x8757a9d8, (q31_t)0x2ab4a7b1, (q31_t)0x8755910b, (q31_t)0x2aaebb50, (q31_t)0x87537888,
+  (q31_t)0x2aa8ced3, (q31_t)0x87516050, (q31_t)0x2aa2e23d, (q31_t)0x874f4862, (q31_t)0x2a9cf58c, (q31_t)0x874d30bf, (q31_t)0x2a9708c1, (q31_t)0x874b1966,
+  (q31_t)0x2a911bdc, (q31_t)0x87490258, (q31_t)0x2a8b2edc, (q31_t)0x8746eb94, (q31_t)0x2a8541c3, (q31_t)0x8744d51b, (q31_t)0x2a7f548e, (q31_t)0x8742beec,
+  (q31_t)0x2a796740, (q31_t)0x8740a907, (q31_t)0x2a7379d8, (q31_t)0x873e936d, (q31_t)0x2a6d8c55, (q31_t)0x873c7e1e, (q31_t)0x2a679eb8, (q31_t)0x873a6919,
+  (q31_t)0x2a61b101, (q31_t)0x8738545e, (q31_t)0x2a5bc330, (q31_t)0x87363fee, (q31_t)0x2a55d545, (q31_t)0x87342bc9, (q31_t)0x2a4fe740, (q31_t)0x873217ee,
+  (q31_t)0x2a49f920, (q31_t)0x8730045d, (q31_t)0x2a440ae7, (q31_t)0x872df117, (q31_t)0x2a3e1c93, (q31_t)0x872bde1c, (q31_t)0x2a382e25, (q31_t)0x8729cb6b,
+  (q31_t)0x2a323f9e, (q31_t)0x8727b905, (q31_t)0x2a2c50fc, (q31_t)0x8725a6e9, (q31_t)0x2a266240, (q31_t)0x87239518, (q31_t)0x2a20736a, (q31_t)0x87218391,
+  (q31_t)0x2a1a847b, (q31_t)0x871f7255, (q31_t)0x2a149571, (q31_t)0x871d6163, (q31_t)0x2a0ea64d, (q31_t)0x871b50bc, (q31_t)0x2a08b710, (q31_t)0x87194060,
+  (q31_t)0x2a02c7b8, (q31_t)0x8717304e, (q31_t)0x29fcd847, (q31_t)0x87152087, (q31_t)0x29f6e8bb, (q31_t)0x8713110a, (q31_t)0x29f0f916, (q31_t)0x871101d8,
+  (q31_t)0x29eb0957, (q31_t)0x870ef2f1, (q31_t)0x29e5197e, (q31_t)0x870ce454, (q31_t)0x29df298b, (q31_t)0x870ad602, (q31_t)0x29d9397f, (q31_t)0x8708c7fa,
+  (q31_t)0x29d34958, (q31_t)0x8706ba3d, (q31_t)0x29cd5918, (q31_t)0x8704acca, (q31_t)0x29c768be, (q31_t)0x87029fa3, (q31_t)0x29c1784a, (q31_t)0x870092c5,
+  (q31_t)0x29bb87bc, (q31_t)0x86fe8633, (q31_t)0x29b59715, (q31_t)0x86fc79eb, (q31_t)0x29afa654, (q31_t)0x86fa6dee, (q31_t)0x29a9b579, (q31_t)0x86f8623b,
+  (q31_t)0x29a3c485, (q31_t)0x86f656d3, (q31_t)0x299dd377, (q31_t)0x86f44bb6, (q31_t)0x2997e24f, (q31_t)0x86f240e3, (q31_t)0x2991f10e, (q31_t)0x86f0365c,
+  (q31_t)0x298bffb2, (q31_t)0x86ee2c1e, (q31_t)0x29860e3e, (q31_t)0x86ec222c, (q31_t)0x29801caf, (q31_t)0x86ea1884, (q31_t)0x297a2b07, (q31_t)0x86e80f27,
+  (q31_t)0x29743946, (q31_t)0x86e60614, (q31_t)0x296e476b, (q31_t)0x86e3fd4c, (q31_t)0x29685576, (q31_t)0x86e1f4cf, (q31_t)0x29626368, (q31_t)0x86dfec9d,
+  (q31_t)0x295c7140, (q31_t)0x86dde4b5, (q31_t)0x29567eff, (q31_t)0x86dbdd18, (q31_t)0x29508ca4, (q31_t)0x86d9d5c6, (q31_t)0x294a9a30, (q31_t)0x86d7cebf,
+  (q31_t)0x2944a7a2, (q31_t)0x86d5c802, (q31_t)0x293eb4fb, (q31_t)0x86d3c190, (q31_t)0x2938c23a, (q31_t)0x86d1bb69, (q31_t)0x2932cf60, (q31_t)0x86cfb58c,
+  (q31_t)0x292cdc6d, (q31_t)0x86cdaffa, (q31_t)0x2926e960, (q31_t)0x86cbaab3, (q31_t)0x2920f63a, (q31_t)0x86c9a5b7, (q31_t)0x291b02fa, (q31_t)0x86c7a106,
+  (q31_t)0x29150fa1, (q31_t)0x86c59c9f, (q31_t)0x290f1c2f, (q31_t)0x86c39883, (q31_t)0x290928a3, (q31_t)0x86c194b2, (q31_t)0x290334ff, (q31_t)0x86bf912c,
+  (q31_t)0x28fd4140, (q31_t)0x86bd8df0, (q31_t)0x28f74d69, (q31_t)0x86bb8b00, (q31_t)0x28f15978, (q31_t)0x86b9885a, (q31_t)0x28eb656e, (q31_t)0x86b785ff,
+  (q31_t)0x28e5714b, (q31_t)0x86b583ee, (q31_t)0x28df7d0e, (q31_t)0x86b38229, (q31_t)0x28d988b8, (q31_t)0x86b180ae, (q31_t)0x28d3944a, (q31_t)0x86af7f7e,
+  (q31_t)0x28cd9fc1, (q31_t)0x86ad7e99, (q31_t)0x28c7ab20, (q31_t)0x86ab7dff, (q31_t)0x28c1b666, (q31_t)0x86a97db0, (q31_t)0x28bbc192, (q31_t)0x86a77dab,
+  (q31_t)0x28b5cca5, (q31_t)0x86a57df2, (q31_t)0x28afd7a0, (q31_t)0x86a37e83, (q31_t)0x28a9e281, (q31_t)0x86a17f5f, (q31_t)0x28a3ed49, (q31_t)0x869f8086,
+  (q31_t)0x289df7f8, (q31_t)0x869d81f8, (q31_t)0x2898028e, (q31_t)0x869b83b4, (q31_t)0x28920d0a, (q31_t)0x869985bc, (q31_t)0x288c176e, (q31_t)0x8697880f,
+  (q31_t)0x288621b9, (q31_t)0x86958aac, (q31_t)0x28802beb, (q31_t)0x86938d94, (q31_t)0x287a3604, (q31_t)0x869190c7, (q31_t)0x28744004, (q31_t)0x868f9445,
+  (q31_t)0x286e49ea, (q31_t)0x868d980e, (q31_t)0x286853b8, (q31_t)0x868b9c22, (q31_t)0x28625d6d, (q31_t)0x8689a081, (q31_t)0x285c670a, (q31_t)0x8687a52b,
+  (q31_t)0x2856708d, (q31_t)0x8685aa20, (q31_t)0x285079f7, (q31_t)0x8683af5f, (q31_t)0x284a8349, (q31_t)0x8681b4ea, (q31_t)0x28448c81, (q31_t)0x867fbabf,
+  (q31_t)0x283e95a1, (q31_t)0x867dc0e0, (q31_t)0x28389ea8, (q31_t)0x867bc74b, (q31_t)0x2832a796, (q31_t)0x8679ce01, (q31_t)0x282cb06c, (q31_t)0x8677d503,
+  (q31_t)0x2826b928, (q31_t)0x8675dc4f, (q31_t)0x2820c1cc, (q31_t)0x8673e3e6, (q31_t)0x281aca57, (q31_t)0x8671ebc8, (q31_t)0x2814d2c9, (q31_t)0x866ff3f6,
+  (q31_t)0x280edb23, (q31_t)0x866dfc6e, (q31_t)0x2808e364, (q31_t)0x866c0531, (q31_t)0x2802eb8c, (q31_t)0x866a0e3f, (q31_t)0x27fcf39c, (q31_t)0x86681798,
+  (q31_t)0x27f6fb92, (q31_t)0x8666213c, (q31_t)0x27f10371, (q31_t)0x86642b2c, (q31_t)0x27eb0b36, (q31_t)0x86623566, (q31_t)0x27e512e3, (q31_t)0x86603feb,
+  (q31_t)0x27df1a77, (q31_t)0x865e4abb, (q31_t)0x27d921f3, (q31_t)0x865c55d7, (q31_t)0x27d32956, (q31_t)0x865a613d, (q31_t)0x27cd30a1, (q31_t)0x86586cee,
+  (q31_t)0x27c737d3, (q31_t)0x865678eb, (q31_t)0x27c13eec, (q31_t)0x86548532, (q31_t)0x27bb45ed, (q31_t)0x865291c4, (q31_t)0x27b54cd6, (q31_t)0x86509ea2,
+  (q31_t)0x27af53a6, (q31_t)0x864eabcb, (q31_t)0x27a95a5d, (q31_t)0x864cb93e, (q31_t)0x27a360fc, (q31_t)0x864ac6fd, (q31_t)0x279d6783, (q31_t)0x8648d507,
+  (q31_t)0x27976df1, (q31_t)0x8646e35c, (q31_t)0x27917447, (q31_t)0x8644f1fc, (q31_t)0x278b7a84, (q31_t)0x864300e7, (q31_t)0x278580a9, (q31_t)0x8641101d,
+  (q31_t)0x277f86b5, (q31_t)0x863f1f9e, (q31_t)0x27798caa, (q31_t)0x863d2f6b, (q31_t)0x27739285, (q31_t)0x863b3f82, (q31_t)0x276d9849, (q31_t)0x86394fe5,
+  (q31_t)0x27679df4, (q31_t)0x86376092, (q31_t)0x2761a387, (q31_t)0x8635718b, (q31_t)0x275ba901, (q31_t)0x863382cf, (q31_t)0x2755ae64, (q31_t)0x8631945e,
+  (q31_t)0x274fb3ae, (q31_t)0x862fa638, (q31_t)0x2749b8e0, (q31_t)0x862db85e, (q31_t)0x2743bdf9, (q31_t)0x862bcace, (q31_t)0x273dc2fa, (q31_t)0x8629dd8a,
+  (q31_t)0x2737c7e3, (q31_t)0x8627f091, (q31_t)0x2731ccb4, (q31_t)0x862603e3, (q31_t)0x272bd16d, (q31_t)0x86241780, (q31_t)0x2725d60e, (q31_t)0x86222b68,
+  (q31_t)0x271fda96, (q31_t)0x86203f9c, (q31_t)0x2719df06, (q31_t)0x861e541a, (q31_t)0x2713e35f, (q31_t)0x861c68e4, (q31_t)0x270de79f, (q31_t)0x861a7df9,
+  (q31_t)0x2707ebc7, (q31_t)0x86189359, (q31_t)0x2701efd7, (q31_t)0x8616a905, (q31_t)0x26fbf3ce, (q31_t)0x8614befb, (q31_t)0x26f5f7ae, (q31_t)0x8612d53d,
+  (q31_t)0x26effb76, (q31_t)0x8610ebca, (q31_t)0x26e9ff26, (q31_t)0x860f02a3, (q31_t)0x26e402bd, (q31_t)0x860d19c6, (q31_t)0x26de063d, (q31_t)0x860b3135,
+  (q31_t)0x26d809a5, (q31_t)0x860948ef, (q31_t)0x26d20cf5, (q31_t)0x860760f4, (q31_t)0x26cc102d, (q31_t)0x86057944, (q31_t)0x26c6134d, (q31_t)0x860391e0,
+  (q31_t)0x26c01655, (q31_t)0x8601aac7, (q31_t)0x26ba1945, (q31_t)0x85ffc3f9, (q31_t)0x26b41c1d, (q31_t)0x85fddd76, (q31_t)0x26ae1edd, (q31_t)0x85fbf73f,
+  (q31_t)0x26a82186, (q31_t)0x85fa1153, (q31_t)0x26a22416, (q31_t)0x85f82bb2, (q31_t)0x269c268f, (q31_t)0x85f6465c, (q31_t)0x269628f0, (q31_t)0x85f46152,
+  (q31_t)0x26902b39, (q31_t)0x85f27c93, (q31_t)0x268a2d6b, (q31_t)0x85f09820, (q31_t)0x26842f84, (q31_t)0x85eeb3f7, (q31_t)0x267e3186, (q31_t)0x85ecd01a,
+  (q31_t)0x26783370, (q31_t)0x85eaec88, (q31_t)0x26723543, (q31_t)0x85e90942, (q31_t)0x266c36fe, (q31_t)0x85e72647, (q31_t)0x266638a1, (q31_t)0x85e54397,
+  (q31_t)0x26603a2c, (q31_t)0x85e36132, (q31_t)0x265a3b9f, (q31_t)0x85e17f19, (q31_t)0x26543cfb, (q31_t)0x85df9d4b, (q31_t)0x264e3e40, (q31_t)0x85ddbbc9,
+  (q31_t)0x26483f6c, (q31_t)0x85dbda91, (q31_t)0x26424082, (q31_t)0x85d9f9a5, (q31_t)0x263c417f, (q31_t)0x85d81905, (q31_t)0x26364265, (q31_t)0x85d638b0,
+  (q31_t)0x26304333, (q31_t)0x85d458a6, (q31_t)0x262a43ea, (q31_t)0x85d278e7, (q31_t)0x26244489, (q31_t)0x85d09974, (q31_t)0x261e4511, (q31_t)0x85ceba4d,
+  (q31_t)0x26184581, (q31_t)0x85ccdb70, (q31_t)0x261245da, (q31_t)0x85cafcdf, (q31_t)0x260c461b, (q31_t)0x85c91e9a, (q31_t)0x26064645, (q31_t)0x85c740a0,
+  (q31_t)0x26004657, (q31_t)0x85c562f1, (q31_t)0x25fa4652, (q31_t)0x85c3858d, (q31_t)0x25f44635, (q31_t)0x85c1a875, (q31_t)0x25ee4601, (q31_t)0x85bfcba9,
+  (q31_t)0x25e845b6, (q31_t)0x85bdef28, (q31_t)0x25e24553, (q31_t)0x85bc12f2, (q31_t)0x25dc44d9, (q31_t)0x85ba3707, (q31_t)0x25d64447, (q31_t)0x85b85b68,
+  (q31_t)0x25d0439f, (q31_t)0x85b68015, (q31_t)0x25ca42de, (q31_t)0x85b4a50d, (q31_t)0x25c44207, (q31_t)0x85b2ca50, (q31_t)0x25be4118, (q31_t)0x85b0efdf,
+  (q31_t)0x25b84012, (q31_t)0x85af15b9, (q31_t)0x25b23ef5, (q31_t)0x85ad3bdf, (q31_t)0x25ac3dc0, (q31_t)0x85ab6250, (q31_t)0x25a63c74, (q31_t)0x85a9890d,
+  (q31_t)0x25a03b11, (q31_t)0x85a7b015, (q31_t)0x259a3997, (q31_t)0x85a5d768, (q31_t)0x25943806, (q31_t)0x85a3ff07, (q31_t)0x258e365d, (q31_t)0x85a226f2,
+  (q31_t)0x2588349d, (q31_t)0x85a04f28, (q31_t)0x258232c6, (q31_t)0x859e77a9, (q31_t)0x257c30d8, (q31_t)0x859ca076, (q31_t)0x25762ed3, (q31_t)0x859ac98f,
+  (q31_t)0x25702cb7, (q31_t)0x8598f2f3, (q31_t)0x256a2a83, (q31_t)0x85971ca2, (q31_t)0x25642839, (q31_t)0x8595469d, (q31_t)0x255e25d7, (q31_t)0x859370e4,
+  (q31_t)0x2558235f, (q31_t)0x85919b76, (q31_t)0x255220cf, (q31_t)0x858fc653, (q31_t)0x254c1e28, (q31_t)0x858df17c, (q31_t)0x25461b6b, (q31_t)0x858c1cf1,
+  (q31_t)0x25401896, (q31_t)0x858a48b1, (q31_t)0x253a15aa, (q31_t)0x858874bd, (q31_t)0x253412a8, (q31_t)0x8586a114, (q31_t)0x252e0f8e, (q31_t)0x8584cdb7,
+  (q31_t)0x25280c5e, (q31_t)0x8582faa5, (q31_t)0x25220916, (q31_t)0x858127df, (q31_t)0x251c05b8, (q31_t)0x857f5564, (q31_t)0x25160243, (q31_t)0x857d8335,
+  (q31_t)0x250ffeb7, (q31_t)0x857bb152, (q31_t)0x2509fb14, (q31_t)0x8579dfba, (q31_t)0x2503f75a, (q31_t)0x85780e6e, (q31_t)0x24fdf389, (q31_t)0x85763d6d,
+  (q31_t)0x24f7efa2, (q31_t)0x85746cb8, (q31_t)0x24f1eba4, (q31_t)0x85729c4e, (q31_t)0x24ebe78f, (q31_t)0x8570cc30, (q31_t)0x24e5e363, (q31_t)0x856efc5e,
+  (q31_t)0x24dfdf20, (q31_t)0x856d2cd7, (q31_t)0x24d9dac7, (q31_t)0x856b5d9c, (q31_t)0x24d3d657, (q31_t)0x85698ead, (q31_t)0x24cdd1d0, (q31_t)0x8567c009,
+  (q31_t)0x24c7cd33, (q31_t)0x8565f1b0, (q31_t)0x24c1c87f, (q31_t)0x856423a4, (q31_t)0x24bbc3b4, (q31_t)0x856255e3, (q31_t)0x24b5bed2, (q31_t)0x8560886d,
+  (q31_t)0x24afb9da, (q31_t)0x855ebb44, (q31_t)0x24a9b4cb, (q31_t)0x855cee66, (q31_t)0x24a3afa6, (q31_t)0x855b21d3, (q31_t)0x249daa6a, (q31_t)0x8559558c,
+  (q31_t)0x2497a517, (q31_t)0x85578991, (q31_t)0x24919fae, (q31_t)0x8555bde2, (q31_t)0x248b9a2f, (q31_t)0x8553f27e, (q31_t)0x24859498, (q31_t)0x85522766,
+  (q31_t)0x247f8eec, (q31_t)0x85505c99, (q31_t)0x24798928, (q31_t)0x854e9219, (q31_t)0x2473834f, (q31_t)0x854cc7e3, (q31_t)0x246d7d5e, (q31_t)0x854afdfa,
+  (q31_t)0x24677758, (q31_t)0x8549345c, (q31_t)0x2461713a, (q31_t)0x85476b0a, (q31_t)0x245b6b07, (q31_t)0x8545a204, (q31_t)0x245564bd, (q31_t)0x8543d949,
+  (q31_t)0x244f5e5c, (q31_t)0x854210db, (q31_t)0x244957e5, (q31_t)0x854048b7, (q31_t)0x24435158, (q31_t)0x853e80e0, (q31_t)0x243d4ab4, (q31_t)0x853cb954,
+  (q31_t)0x243743fa, (q31_t)0x853af214, (q31_t)0x24313d2a, (q31_t)0x85392b20, (q31_t)0x242b3644, (q31_t)0x85376477, (q31_t)0x24252f47, (q31_t)0x85359e1a,
+  (q31_t)0x241f2833, (q31_t)0x8533d809, (q31_t)0x2419210a, (q31_t)0x85321244, (q31_t)0x241319ca, (q31_t)0x85304cca, (q31_t)0x240d1274, (q31_t)0x852e879d,
+  (q31_t)0x24070b08, (q31_t)0x852cc2bb, (q31_t)0x24010385, (q31_t)0x852afe24, (q31_t)0x23fafbec, (q31_t)0x852939da, (q31_t)0x23f4f43e, (q31_t)0x852775db,
+  (q31_t)0x23eeec78, (q31_t)0x8525b228, (q31_t)0x23e8e49d, (q31_t)0x8523eec1, (q31_t)0x23e2dcac, (q31_t)0x85222ba5, (q31_t)0x23dcd4a4, (q31_t)0x852068d6,
+  (q31_t)0x23d6cc87, (q31_t)0x851ea652, (q31_t)0x23d0c453, (q31_t)0x851ce41a, (q31_t)0x23cabc09, (q31_t)0x851b222e, (q31_t)0x23c4b3a9, (q31_t)0x8519608d,
+  (q31_t)0x23beab33, (q31_t)0x85179f39, (q31_t)0x23b8a2a7, (q31_t)0x8515de30, (q31_t)0x23b29a05, (q31_t)0x85141d73, (q31_t)0x23ac914d, (q31_t)0x85125d02,
+  (q31_t)0x23a6887f, (q31_t)0x85109cdd, (q31_t)0x23a07f9a, (q31_t)0x850edd03, (q31_t)0x239a76a0, (q31_t)0x850d1d75, (q31_t)0x23946d90, (q31_t)0x850b5e34,
+  (q31_t)0x238e646a, (q31_t)0x85099f3e, (q31_t)0x23885b2e, (q31_t)0x8507e094, (q31_t)0x238251dd, (q31_t)0x85062235, (q31_t)0x237c4875, (q31_t)0x85046423,
+  (q31_t)0x23763ef7, (q31_t)0x8502a65c, (q31_t)0x23703564, (q31_t)0x8500e8e2, (q31_t)0x236a2bba, (q31_t)0x84ff2bb3, (q31_t)0x236421fb, (q31_t)0x84fd6ed0,
+  (q31_t)0x235e1826, (q31_t)0x84fbb239, (q31_t)0x23580e3b, (q31_t)0x84f9f5ee, (q31_t)0x2352043b, (q31_t)0x84f839ee, (q31_t)0x234bfa24, (q31_t)0x84f67e3b,
+  (q31_t)0x2345eff8, (q31_t)0x84f4c2d4, (q31_t)0x233fe5b6, (q31_t)0x84f307b8, (q31_t)0x2339db5e, (q31_t)0x84f14ce8, (q31_t)0x2333d0f1, (q31_t)0x84ef9265,
+  (q31_t)0x232dc66d, (q31_t)0x84edd82d, (q31_t)0x2327bbd5, (q31_t)0x84ec1e41, (q31_t)0x2321b126, (q31_t)0x84ea64a1, (q31_t)0x231ba662, (q31_t)0x84e8ab4d,
+  (q31_t)0x23159b88, (q31_t)0x84e6f244, (q31_t)0x230f9098, (q31_t)0x84e53988, (q31_t)0x23098593, (q31_t)0x84e38118, (q31_t)0x23037a78, (q31_t)0x84e1c8f3,
+  (q31_t)0x22fd6f48, (q31_t)0x84e0111b, (q31_t)0x22f76402, (q31_t)0x84de598f, (q31_t)0x22f158a7, (q31_t)0x84dca24e, (q31_t)0x22eb4d36, (q31_t)0x84daeb5a,
+  (q31_t)0x22e541af, (q31_t)0x84d934b1, (q31_t)0x22df3613, (q31_t)0x84d77e54, (q31_t)0x22d92a61, (q31_t)0x84d5c844, (q31_t)0x22d31e9a, (q31_t)0x84d4127f,
+  (q31_t)0x22cd12bd, (q31_t)0x84d25d06, (q31_t)0x22c706cb, (q31_t)0x84d0a7da, (q31_t)0x22c0fac4, (q31_t)0x84cef2f9, (q31_t)0x22baeea7, (q31_t)0x84cd3e64,
+  (q31_t)0x22b4e274, (q31_t)0x84cb8a1b, (q31_t)0x22aed62c, (q31_t)0x84c9d61f, (q31_t)0x22a8c9cf, (q31_t)0x84c8226e, (q31_t)0x22a2bd5d, (q31_t)0x84c66f09,
+  (q31_t)0x229cb0d5, (q31_t)0x84c4bbf0, (q31_t)0x2296a437, (q31_t)0x84c30924, (q31_t)0x22909785, (q31_t)0x84c156a3, (q31_t)0x228a8abd, (q31_t)0x84bfa46e,
+  (q31_t)0x22847de0, (q31_t)0x84bdf286, (q31_t)0x227e70ed, (q31_t)0x84bc40e9, (q31_t)0x227863e5, (q31_t)0x84ba8f98, (q31_t)0x227256c8, (q31_t)0x84b8de94,
+  (q31_t)0x226c4996, (q31_t)0x84b72ddb, (q31_t)0x22663c4e, (q31_t)0x84b57d6f, (q31_t)0x22602ef1, (q31_t)0x84b3cd4f, (q31_t)0x225a217f, (q31_t)0x84b21d7a,
+  (q31_t)0x225413f8, (q31_t)0x84b06df2, (q31_t)0x224e065c, (q31_t)0x84aebeb6, (q31_t)0x2247f8aa, (q31_t)0x84ad0fc6, (q31_t)0x2241eae3, (q31_t)0x84ab6122,
+  (q31_t)0x223bdd08, (q31_t)0x84a9b2ca, (q31_t)0x2235cf17, (q31_t)0x84a804be, (q31_t)0x222fc111, (q31_t)0x84a656fe, (q31_t)0x2229b2f6, (q31_t)0x84a4a98a,
+  (q31_t)0x2223a4c5, (q31_t)0x84a2fc62, (q31_t)0x221d9680, (q31_t)0x84a14f87, (q31_t)0x22178826, (q31_t)0x849fa2f7, (q31_t)0x221179b7, (q31_t)0x849df6b4,
+  (q31_t)0x220b6b32, (q31_t)0x849c4abd, (q31_t)0x22055c99, (q31_t)0x849a9f12, (q31_t)0x21ff4dea, (q31_t)0x8498f3b3, (q31_t)0x21f93f27, (q31_t)0x849748a0,
+  (q31_t)0x21f3304f, (q31_t)0x84959dd9, (q31_t)0x21ed2162, (q31_t)0x8493f35e, (q31_t)0x21e71260, (q31_t)0x84924930, (q31_t)0x21e10349, (q31_t)0x84909f4e,
+  (q31_t)0x21daf41d, (q31_t)0x848ef5b7, (q31_t)0x21d4e4dc, (q31_t)0x848d4c6d, (q31_t)0x21ced586, (q31_t)0x848ba36f, (q31_t)0x21c8c61c, (q31_t)0x8489fabe,
+  (q31_t)0x21c2b69c, (q31_t)0x84885258, (q31_t)0x21bca708, (q31_t)0x8486aa3e, (q31_t)0x21b6975f, (q31_t)0x84850271, (q31_t)0x21b087a1, (q31_t)0x84835af0,
+  (q31_t)0x21aa77cf, (q31_t)0x8481b3bb, (q31_t)0x21a467e7, (q31_t)0x84800cd2, (q31_t)0x219e57eb, (q31_t)0x847e6636, (q31_t)0x219847da, (q31_t)0x847cbfe5,
+  (q31_t)0x219237b5, (q31_t)0x847b19e1, (q31_t)0x218c277a, (q31_t)0x84797429, (q31_t)0x2186172b, (q31_t)0x8477cebd, (q31_t)0x218006c8, (q31_t)0x8476299e,
+  (q31_t)0x2179f64f, (q31_t)0x847484ca, (q31_t)0x2173e5c2, (q31_t)0x8472e043, (q31_t)0x216dd521, (q31_t)0x84713c08, (q31_t)0x2167c46b, (q31_t)0x846f9819,
+  (q31_t)0x2161b3a0, (q31_t)0x846df477, (q31_t)0x215ba2c0, (q31_t)0x846c5120, (q31_t)0x215591cc, (q31_t)0x846aae16, (q31_t)0x214f80c4, (q31_t)0x84690b58,
+  (q31_t)0x21496fa7, (q31_t)0x846768e7, (q31_t)0x21435e75, (q31_t)0x8465c6c1, (q31_t)0x213d4d2f, (q31_t)0x846424e8, (q31_t)0x21373bd4, (q31_t)0x8462835b,
+  (q31_t)0x21312a65, (q31_t)0x8460e21a, (q31_t)0x212b18e1, (q31_t)0x845f4126, (q31_t)0x21250749, (q31_t)0x845da07e, (q31_t)0x211ef59d, (q31_t)0x845c0022,
+  (q31_t)0x2118e3dc, (q31_t)0x845a6012, (q31_t)0x2112d206, (q31_t)0x8458c04f, (q31_t)0x210cc01d, (q31_t)0x845720d8, (q31_t)0x2106ae1e, (q31_t)0x845581ad,
+  (q31_t)0x21009c0c, (q31_t)0x8453e2cf, (q31_t)0x20fa89e5, (q31_t)0x8452443d, (q31_t)0x20f477aa, (q31_t)0x8450a5f7, (q31_t)0x20ee655a, (q31_t)0x844f07fd,
+  (q31_t)0x20e852f6, (q31_t)0x844d6a50, (q31_t)0x20e2407e, (q31_t)0x844bccef, (q31_t)0x20dc2df2, (q31_t)0x844a2fda, (q31_t)0x20d61b51, (q31_t)0x84489311,
+  (q31_t)0x20d0089c, (q31_t)0x8446f695, (q31_t)0x20c9f5d3, (q31_t)0x84455a66, (q31_t)0x20c3e2f5, (q31_t)0x8443be82, (q31_t)0x20bdd003, (q31_t)0x844222eb,
+  (q31_t)0x20b7bcfe, (q31_t)0x844087a0, (q31_t)0x20b1a9e4, (q31_t)0x843eeca2, (q31_t)0x20ab96b5, (q31_t)0x843d51f0, (q31_t)0x20a58373, (q31_t)0x843bb78a,
+  (q31_t)0x209f701c, (q31_t)0x843a1d70, (q31_t)0x20995cb2, (q31_t)0x843883a3, (q31_t)0x20934933, (q31_t)0x8436ea23, (q31_t)0x208d35a0, (q31_t)0x843550ee,
+  (q31_t)0x208721f9, (q31_t)0x8433b806, (q31_t)0x20810e3e, (q31_t)0x84321f6b, (q31_t)0x207afa6f, (q31_t)0x8430871b, (q31_t)0x2074e68c, (q31_t)0x842eef18,
+  (q31_t)0x206ed295, (q31_t)0x842d5762, (q31_t)0x2068be8a, (q31_t)0x842bbff8, (q31_t)0x2062aa6b, (q31_t)0x842a28da, (q31_t)0x205c9638, (q31_t)0x84289209,
+  (q31_t)0x205681f1, (q31_t)0x8426fb84, (q31_t)0x20506d96, (q31_t)0x8425654b, (q31_t)0x204a5927, (q31_t)0x8423cf5f, (q31_t)0x204444a4, (q31_t)0x842239bf,
+  (q31_t)0x203e300d, (q31_t)0x8420a46c, (q31_t)0x20381b63, (q31_t)0x841f0f65, (q31_t)0x203206a4, (q31_t)0x841d7aaa, (q31_t)0x202bf1d2, (q31_t)0x841be63c,
+  (q31_t)0x2025dcec, (q31_t)0x841a521a, (q31_t)0x201fc7f2, (q31_t)0x8418be45, (q31_t)0x2019b2e4, (q31_t)0x84172abc, (q31_t)0x20139dc2, (q31_t)0x84159780,
+  (q31_t)0x200d888d, (q31_t)0x84140490, (q31_t)0x20077344, (q31_t)0x841271ec, (q31_t)0x20015de7, (q31_t)0x8410df95, (q31_t)0x1ffb4876, (q31_t)0x840f4d8a,
+  (q31_t)0x1ff532f2, (q31_t)0x840dbbcc, (q31_t)0x1fef1d59, (q31_t)0x840c2a5a, (q31_t)0x1fe907ae, (q31_t)0x840a9935, (q31_t)0x1fe2f1ee, (q31_t)0x8409085c,
+  (q31_t)0x1fdcdc1b, (q31_t)0x840777d0, (q31_t)0x1fd6c634, (q31_t)0x8405e790, (q31_t)0x1fd0b03a, (q31_t)0x8404579d, (q31_t)0x1fca9a2b, (q31_t)0x8402c7f6,
+  (q31_t)0x1fc4840a, (q31_t)0x8401389b, (q31_t)0x1fbe6dd4, (q31_t)0x83ffa98d, (q31_t)0x1fb8578b, (q31_t)0x83fe1acc, (q31_t)0x1fb2412f, (q31_t)0x83fc8c57,
+  (q31_t)0x1fac2abf, (q31_t)0x83fafe2e, (q31_t)0x1fa6143b, (q31_t)0x83f97052, (q31_t)0x1f9ffda4, (q31_t)0x83f7e2c3, (q31_t)0x1f99e6fa, (q31_t)0x83f65580,
+  (q31_t)0x1f93d03c, (q31_t)0x83f4c889, (q31_t)0x1f8db96a, (q31_t)0x83f33bdf, (q31_t)0x1f87a285, (q31_t)0x83f1af82, (q31_t)0x1f818b8d, (q31_t)0x83f02371,
+  (q31_t)0x1f7b7481, (q31_t)0x83ee97ad, (q31_t)0x1f755d61, (q31_t)0x83ed0c35, (q31_t)0x1f6f462f, (q31_t)0x83eb810a, (q31_t)0x1f692ee9, (q31_t)0x83e9f62b,
+  (q31_t)0x1f63178f, (q31_t)0x83e86b99, (q31_t)0x1f5d0022, (q31_t)0x83e6e153, (q31_t)0x1f56e8a2, (q31_t)0x83e5575a, (q31_t)0x1f50d10e, (q31_t)0x83e3cdad,
+  (q31_t)0x1f4ab968, (q31_t)0x83e2444d, (q31_t)0x1f44a1ad, (q31_t)0x83e0bb3a, (q31_t)0x1f3e89e0, (q31_t)0x83df3273, (q31_t)0x1f3871ff, (q31_t)0x83dda9f9,
+  (q31_t)0x1f325a0b, (q31_t)0x83dc21cb, (q31_t)0x1f2c4204, (q31_t)0x83da99ea, (q31_t)0x1f2629ea, (q31_t)0x83d91255, (q31_t)0x1f2011bc, (q31_t)0x83d78b0d,
+  (q31_t)0x1f19f97b, (q31_t)0x83d60412, (q31_t)0x1f13e127, (q31_t)0x83d47d63, (q31_t)0x1f0dc8c0, (q31_t)0x83d2f701, (q31_t)0x1f07b045, (q31_t)0x83d170eb,
+  (q31_t)0x1f0197b8, (q31_t)0x83cfeb22, (q31_t)0x1efb7f17, (q31_t)0x83ce65a6, (q31_t)0x1ef56664, (q31_t)0x83cce076, (q31_t)0x1eef4d9d, (q31_t)0x83cb5b93,
+  (q31_t)0x1ee934c3, (q31_t)0x83c9d6fc, (q31_t)0x1ee31bd6, (q31_t)0x83c852b2, (q31_t)0x1edd02d6, (q31_t)0x83c6ceb5, (q31_t)0x1ed6e9c3, (q31_t)0x83c54b04,
+  (q31_t)0x1ed0d09d, (q31_t)0x83c3c7a0, (q31_t)0x1ecab763, (q31_t)0x83c24488, (q31_t)0x1ec49e17, (q31_t)0x83c0c1be, (q31_t)0x1ebe84b8, (q31_t)0x83bf3f3f,
+  (q31_t)0x1eb86b46, (q31_t)0x83bdbd0e, (q31_t)0x1eb251c1, (q31_t)0x83bc3b29, (q31_t)0x1eac3829, (q31_t)0x83bab991, (q31_t)0x1ea61e7e, (q31_t)0x83b93845,
+  (q31_t)0x1ea004c1, (q31_t)0x83b7b746, (q31_t)0x1e99eaf0, (q31_t)0x83b63694, (q31_t)0x1e93d10c, (q31_t)0x83b4b62e, (q31_t)0x1e8db716, (q31_t)0x83b33616,
+  (q31_t)0x1e879d0d, (q31_t)0x83b1b649, (q31_t)0x1e8182f1, (q31_t)0x83b036ca, (q31_t)0x1e7b68c2, (q31_t)0x83aeb797, (q31_t)0x1e754e80, (q31_t)0x83ad38b1,
+  (q31_t)0x1e6f342c, (q31_t)0x83abba17, (q31_t)0x1e6919c4, (q31_t)0x83aa3bca, (q31_t)0x1e62ff4a, (q31_t)0x83a8bdca, (q31_t)0x1e5ce4be, (q31_t)0x83a74017,
+  (q31_t)0x1e56ca1e, (q31_t)0x83a5c2b0, (q31_t)0x1e50af6c, (q31_t)0x83a44596, (q31_t)0x1e4a94a7, (q31_t)0x83a2c8c9, (q31_t)0x1e4479cf, (q31_t)0x83a14c48,
+  (q31_t)0x1e3e5ee5, (q31_t)0x839fd014, (q31_t)0x1e3843e8, (q31_t)0x839e542d, (q31_t)0x1e3228d9, (q31_t)0x839cd893, (q31_t)0x1e2c0db6, (q31_t)0x839b5d45,
+  (q31_t)0x1e25f282, (q31_t)0x8399e244, (q31_t)0x1e1fd73a, (q31_t)0x83986790, (q31_t)0x1e19bbe0, (q31_t)0x8396ed29, (q31_t)0x1e13a074, (q31_t)0x8395730e,
+  (q31_t)0x1e0d84f5, (q31_t)0x8393f940, (q31_t)0x1e076963, (q31_t)0x83927fbf, (q31_t)0x1e014dbf, (q31_t)0x8391068a, (q31_t)0x1dfb3208, (q31_t)0x838f8da2,
+  (q31_t)0x1df5163f, (q31_t)0x838e1507, (q31_t)0x1deefa63, (q31_t)0x838c9cb9, (q31_t)0x1de8de75, (q31_t)0x838b24b8, (q31_t)0x1de2c275, (q31_t)0x8389ad03,
+  (q31_t)0x1ddca662, (q31_t)0x8388359b, (q31_t)0x1dd68a3c, (q31_t)0x8386be80, (q31_t)0x1dd06e04, (q31_t)0x838547b2, (q31_t)0x1dca51ba, (q31_t)0x8383d130,
+  (q31_t)0x1dc4355e, (q31_t)0x83825afb, (q31_t)0x1dbe18ef, (q31_t)0x8380e513, (q31_t)0x1db7fc6d, (q31_t)0x837f6f78, (q31_t)0x1db1dfda, (q31_t)0x837dfa2a,
+  (q31_t)0x1dabc334, (q31_t)0x837c8528, (q31_t)0x1da5a67c, (q31_t)0x837b1074, (q31_t)0x1d9f89b1, (q31_t)0x83799c0c, (q31_t)0x1d996cd4, (q31_t)0x837827f0,
+  (q31_t)0x1d934fe5, (q31_t)0x8376b422, (q31_t)0x1d8d32e4, (q31_t)0x837540a1, (q31_t)0x1d8715d0, (q31_t)0x8373cd6c, (q31_t)0x1d80f8ab, (q31_t)0x83725a84,
+  (q31_t)0x1d7adb73, (q31_t)0x8370e7e9, (q31_t)0x1d74be29, (q31_t)0x836f759b, (q31_t)0x1d6ea0cc, (q31_t)0x836e039a, (q31_t)0x1d68835e, (q31_t)0x836c91e5,
+  (q31_t)0x1d6265dd, (q31_t)0x836b207d, (q31_t)0x1d5c484b, (q31_t)0x8369af63, (q31_t)0x1d562aa6, (q31_t)0x83683e95, (q31_t)0x1d500cef, (q31_t)0x8366ce14,
+  (q31_t)0x1d49ef26, (q31_t)0x83655ddf, (q31_t)0x1d43d14b, (q31_t)0x8363edf8, (q31_t)0x1d3db35e, (q31_t)0x83627e5d, (q31_t)0x1d37955e, (q31_t)0x83610f10,
+  (q31_t)0x1d31774d, (q31_t)0x835fa00f, (q31_t)0x1d2b592a, (q31_t)0x835e315b, (q31_t)0x1d253af5, (q31_t)0x835cc2f4, (q31_t)0x1d1f1cae, (q31_t)0x835b54da,
+  (q31_t)0x1d18fe54, (q31_t)0x8359e70d, (q31_t)0x1d12dfe9, (q31_t)0x8358798c, (q31_t)0x1d0cc16c, (q31_t)0x83570c59, (q31_t)0x1d06a2dd, (q31_t)0x83559f72,
+  (q31_t)0x1d00843d, (q31_t)0x835432d8, (q31_t)0x1cfa658a, (q31_t)0x8352c68c, (q31_t)0x1cf446c5, (q31_t)0x83515a8c, (q31_t)0x1cee27ef, (q31_t)0x834feed9,
+  (q31_t)0x1ce80906, (q31_t)0x834e8373, (q31_t)0x1ce1ea0c, (q31_t)0x834d185a, (q31_t)0x1cdbcb00, (q31_t)0x834bad8e, (q31_t)0x1cd5abe3, (q31_t)0x834a430e,
+  (q31_t)0x1ccf8cb3, (q31_t)0x8348d8dc, (q31_t)0x1cc96d72, (q31_t)0x83476ef6, (q31_t)0x1cc34e1f, (q31_t)0x8346055e, (q31_t)0x1cbd2eba, (q31_t)0x83449c12,
+  (q31_t)0x1cb70f43, (q31_t)0x83433314, (q31_t)0x1cb0efbb, (q31_t)0x8341ca62, (q31_t)0x1caad021, (q31_t)0x834061fd, (q31_t)0x1ca4b075, (q31_t)0x833ef9e6,
+  (q31_t)0x1c9e90b8, (q31_t)0x833d921b, (q31_t)0x1c9870e9, (q31_t)0x833c2a9d, (q31_t)0x1c925109, (q31_t)0x833ac36c, (q31_t)0x1c8c3116, (q31_t)0x83395c88,
+  (q31_t)0x1c861113, (q31_t)0x8337f5f1, (q31_t)0x1c7ff0fd, (q31_t)0x83368fa7, (q31_t)0x1c79d0d6, (q31_t)0x833529aa, (q31_t)0x1c73b09d, (q31_t)0x8333c3fa,
+  (q31_t)0x1c6d9053, (q31_t)0x83325e97, (q31_t)0x1c676ff8, (q31_t)0x8330f981, (q31_t)0x1c614f8b, (q31_t)0x832f94b8, (q31_t)0x1c5b2f0c, (q31_t)0x832e303c,
+  (q31_t)0x1c550e7c, (q31_t)0x832ccc0d, (q31_t)0x1c4eedda, (q31_t)0x832b682b, (q31_t)0x1c48cd27, (q31_t)0x832a0496, (q31_t)0x1c42ac62, (q31_t)0x8328a14d,
+  (q31_t)0x1c3c8b8c, (q31_t)0x83273e52, (q31_t)0x1c366aa5, (q31_t)0x8325dba4, (q31_t)0x1c3049ac, (q31_t)0x83247943, (q31_t)0x1c2a28a2, (q31_t)0x8323172f,
+  (q31_t)0x1c240786, (q31_t)0x8321b568, (q31_t)0x1c1de659, (q31_t)0x832053ee, (q31_t)0x1c17c51b, (q31_t)0x831ef2c1, (q31_t)0x1c11a3cb, (q31_t)0x831d91e1,
+  (q31_t)0x1c0b826a, (q31_t)0x831c314e, (q31_t)0x1c0560f8, (q31_t)0x831ad109, (q31_t)0x1bff3f75, (q31_t)0x83197110, (q31_t)0x1bf91de0, (q31_t)0x83181164,
+  (q31_t)0x1bf2fc3a, (q31_t)0x8316b205, (q31_t)0x1becda83, (q31_t)0x831552f4, (q31_t)0x1be6b8ba, (q31_t)0x8313f42f, (q31_t)0x1be096e0, (q31_t)0x831295b7,
+  (q31_t)0x1bda74f6, (q31_t)0x8311378d, (q31_t)0x1bd452f9, (q31_t)0x830fd9af, (q31_t)0x1bce30ec, (q31_t)0x830e7c1f, (q31_t)0x1bc80ece, (q31_t)0x830d1edc,
+  (q31_t)0x1bc1ec9e, (q31_t)0x830bc1e6, (q31_t)0x1bbbca5e, (q31_t)0x830a653c, (q31_t)0x1bb5a80c, (q31_t)0x830908e0, (q31_t)0x1baf85a9, (q31_t)0x8307acd1,
+  (q31_t)0x1ba96335, (q31_t)0x83065110, (q31_t)0x1ba340b0, (q31_t)0x8304f59b, (q31_t)0x1b9d1e1a, (q31_t)0x83039a73, (q31_t)0x1b96fb73, (q31_t)0x83023f98,
+  (q31_t)0x1b90d8bb, (q31_t)0x8300e50b, (q31_t)0x1b8ab5f2, (q31_t)0x82ff8acb, (q31_t)0x1b849317, (q31_t)0x82fe30d7, (q31_t)0x1b7e702c, (q31_t)0x82fcd731,
+  (q31_t)0x1b784d30, (q31_t)0x82fb7dd8, (q31_t)0x1b722a23, (q31_t)0x82fa24cc, (q31_t)0x1b6c0705, (q31_t)0x82f8cc0d, (q31_t)0x1b65e3d7, (q31_t)0x82f7739c,
+  (q31_t)0x1b5fc097, (q31_t)0x82f61b77, (q31_t)0x1b599d46, (q31_t)0x82f4c3a0, (q31_t)0x1b5379e5, (q31_t)0x82f36c15, (q31_t)0x1b4d5672, (q31_t)0x82f214d8,
+  (q31_t)0x1b4732ef, (q31_t)0x82f0bde8, (q31_t)0x1b410f5b, (q31_t)0x82ef6745, (q31_t)0x1b3aebb6, (q31_t)0x82ee10ef, (q31_t)0x1b34c801, (q31_t)0x82ecbae7,
+  (q31_t)0x1b2ea43a, (q31_t)0x82eb652b, (q31_t)0x1b288063, (q31_t)0x82ea0fbd, (q31_t)0x1b225c7b, (q31_t)0x82e8ba9c, (q31_t)0x1b1c3883, (q31_t)0x82e765c8,
+  (q31_t)0x1b161479, (q31_t)0x82e61141, (q31_t)0x1b0ff05f, (q31_t)0x82e4bd07, (q31_t)0x1b09cc34, (q31_t)0x82e3691b, (q31_t)0x1b03a7f9, (q31_t)0x82e2157c,
+  (q31_t)0x1afd83ad, (q31_t)0x82e0c22a, (q31_t)0x1af75f50, (q31_t)0x82df6f25, (q31_t)0x1af13ae3, (q31_t)0x82de1c6d, (q31_t)0x1aeb1665, (q31_t)0x82dcca02,
+  (q31_t)0x1ae4f1d6, (q31_t)0x82db77e5, (q31_t)0x1adecd37, (q31_t)0x82da2615, (q31_t)0x1ad8a887, (q31_t)0x82d8d492, (q31_t)0x1ad283c7, (q31_t)0x82d7835c,
+  (q31_t)0x1acc5ef6, (q31_t)0x82d63274, (q31_t)0x1ac63a14, (q31_t)0x82d4e1d8, (q31_t)0x1ac01522, (q31_t)0x82d3918a, (q31_t)0x1ab9f020, (q31_t)0x82d24189,
+  (q31_t)0x1ab3cb0d, (q31_t)0x82d0f1d5, (q31_t)0x1aada5e9, (q31_t)0x82cfa26f, (q31_t)0x1aa780b6, (q31_t)0x82ce5356, (q31_t)0x1aa15b71, (q31_t)0x82cd048a,
+  (q31_t)0x1a9b361d, (q31_t)0x82cbb60b, (q31_t)0x1a9510b7, (q31_t)0x82ca67d9, (q31_t)0x1a8eeb42, (q31_t)0x82c919f5, (q31_t)0x1a88c5bc, (q31_t)0x82c7cc5e,
+  (q31_t)0x1a82a026, (q31_t)0x82c67f14, (q31_t)0x1a7c7a7f, (q31_t)0x82c53217, (q31_t)0x1a7654c8, (q31_t)0x82c3e568, (q31_t)0x1a702f01, (q31_t)0x82c29906,
+  (q31_t)0x1a6a0929, (q31_t)0x82c14cf1, (q31_t)0x1a63e341, (q31_t)0x82c00129, (q31_t)0x1a5dbd49, (q31_t)0x82beb5af, (q31_t)0x1a579741, (q31_t)0x82bd6a82,
+  (q31_t)0x1a517128, (q31_t)0x82bc1fa2, (q31_t)0x1a4b4aff, (q31_t)0x82bad50f, (q31_t)0x1a4524c6, (q31_t)0x82b98aca, (q31_t)0x1a3efe7c, (q31_t)0x82b840d2,
+  (q31_t)0x1a38d823, (q31_t)0x82b6f727, (q31_t)0x1a32b1b9, (q31_t)0x82b5adca, (q31_t)0x1a2c8b3f, (q31_t)0x82b464ba, (q31_t)0x1a2664b5, (q31_t)0x82b31bf7,
+  (q31_t)0x1a203e1b, (q31_t)0x82b1d381, (q31_t)0x1a1a1771, (q31_t)0x82b08b59, (q31_t)0x1a13f0b6, (q31_t)0x82af437e, (q31_t)0x1a0dc9ec, (q31_t)0x82adfbf0,
+  (q31_t)0x1a07a311, (q31_t)0x82acb4b0, (q31_t)0x1a017c27, (q31_t)0x82ab6dbd, (q31_t)0x19fb552c, (q31_t)0x82aa2717, (q31_t)0x19f52e22, (q31_t)0x82a8e0bf,
+  (q31_t)0x19ef0707, (q31_t)0x82a79ab3, (q31_t)0x19e8dfdc, (q31_t)0x82a654f6, (q31_t)0x19e2b8a2, (q31_t)0x82a50f85, (q31_t)0x19dc9157, (q31_t)0x82a3ca62,
+  (q31_t)0x19d669fc, (q31_t)0x82a2858c, (q31_t)0x19d04292, (q31_t)0x82a14104, (q31_t)0x19ca1b17, (q31_t)0x829ffcc8, (q31_t)0x19c3f38d, (q31_t)0x829eb8db,
+  (q31_t)0x19bdcbf3, (q31_t)0x829d753a, (q31_t)0x19b7a449, (q31_t)0x829c31e7, (q31_t)0x19b17c8f, (q31_t)0x829aeee1, (q31_t)0x19ab54c5, (q31_t)0x8299ac29,
+  (q31_t)0x19a52ceb, (q31_t)0x829869be, (q31_t)0x199f0502, (q31_t)0x829727a0, (q31_t)0x1998dd09, (q31_t)0x8295e5cf, (q31_t)0x1992b4ff, (q31_t)0x8294a44c,
+  (q31_t)0x198c8ce7, (q31_t)0x82936317, (q31_t)0x198664be, (q31_t)0x8292222e, (q31_t)0x19803c86, (q31_t)0x8290e194, (q31_t)0x197a143e, (q31_t)0x828fa146,
+  (q31_t)0x1973ebe6, (q31_t)0x828e6146, (q31_t)0x196dc37e, (q31_t)0x828d2193, (q31_t)0x19679b07, (q31_t)0x828be22e, (q31_t)0x19617280, (q31_t)0x828aa316,
+  (q31_t)0x195b49ea, (q31_t)0x8289644b, (q31_t)0x19552144, (q31_t)0x828825ce, (q31_t)0x194ef88e, (q31_t)0x8286e79e, (q31_t)0x1948cfc8, (q31_t)0x8285a9bb,
+  (q31_t)0x1942a6f3, (q31_t)0x82846c26, (q31_t)0x193c7e0f, (q31_t)0x82832edf, (q31_t)0x1936551b, (q31_t)0x8281f1e4, (q31_t)0x19302c17, (q31_t)0x8280b538,
+  (q31_t)0x192a0304, (q31_t)0x827f78d8, (q31_t)0x1923d9e1, (q31_t)0x827e3cc6, (q31_t)0x191db0af, (q31_t)0x827d0102, (q31_t)0x1917876d, (q31_t)0x827bc58a,
+  (q31_t)0x19115e1c, (q31_t)0x827a8a61, (q31_t)0x190b34bb, (q31_t)0x82794f84, (q31_t)0x19050b4b, (q31_t)0x827814f6, (q31_t)0x18fee1cb, (q31_t)0x8276dab4,
+  (q31_t)0x18f8b83c, (q31_t)0x8275a0c0, (q31_t)0x18f28e9e, (q31_t)0x8274671a, (q31_t)0x18ec64f0, (q31_t)0x82732dc0, (q31_t)0x18e63b33, (q31_t)0x8271f4b5,
+  (q31_t)0x18e01167, (q31_t)0x8270bbf7, (q31_t)0x18d9e78b, (q31_t)0x826f8386, (q31_t)0x18d3bda0, (q31_t)0x826e4b62, (q31_t)0x18cd93a5, (q31_t)0x826d138d,
+  (q31_t)0x18c7699b, (q31_t)0x826bdc04, (q31_t)0x18c13f82, (q31_t)0x826aa4c9, (q31_t)0x18bb155a, (q31_t)0x82696ddc, (q31_t)0x18b4eb22, (q31_t)0x8268373c,
+  (q31_t)0x18aec0db, (q31_t)0x826700e9, (q31_t)0x18a89685, (q31_t)0x8265cae4, (q31_t)0x18a26c20, (q31_t)0x8264952d, (q31_t)0x189c41ab, (q31_t)0x82635fc2,
+  (q31_t)0x18961728, (q31_t)0x82622aa6, (q31_t)0x188fec95, (q31_t)0x8260f5d7, (q31_t)0x1889c1f3, (q31_t)0x825fc155, (q31_t)0x18839742, (q31_t)0x825e8d21,
+  (q31_t)0x187d6c82, (q31_t)0x825d593a, (q31_t)0x187741b2, (q31_t)0x825c25a1, (q31_t)0x187116d4, (q31_t)0x825af255, (q31_t)0x186aebe6, (q31_t)0x8259bf57,
+  (q31_t)0x1864c0ea, (q31_t)0x82588ca7, (q31_t)0x185e95de, (q31_t)0x82575a44, (q31_t)0x18586ac3, (q31_t)0x8256282e, (q31_t)0x18523f9a, (q31_t)0x8254f666,
+  (q31_t)0x184c1461, (q31_t)0x8253c4eb, (q31_t)0x1845e919, (q31_t)0x825293be, (q31_t)0x183fbdc3, (q31_t)0x825162df, (q31_t)0x1839925d, (q31_t)0x8250324d,
+  (q31_t)0x183366e9, (q31_t)0x824f0208, (q31_t)0x182d3b65, (q31_t)0x824dd211, (q31_t)0x18270fd3, (q31_t)0x824ca268, (q31_t)0x1820e431, (q31_t)0x824b730c,
+  (q31_t)0x181ab881, (q31_t)0x824a43fe, (q31_t)0x18148cc2, (q31_t)0x8249153d, (q31_t)0x180e60f4, (q31_t)0x8247e6ca, (q31_t)0x18083518, (q31_t)0x8246b8a4,
+  (q31_t)0x1802092c, (q31_t)0x82458acc, (q31_t)0x17fbdd32, (q31_t)0x82445d41, (q31_t)0x17f5b129, (q31_t)0x82433004, (q31_t)0x17ef8511, (q31_t)0x82420315,
+  (q31_t)0x17e958ea, (q31_t)0x8240d673, (q31_t)0x17e32cb5, (q31_t)0x823faa1e, (q31_t)0x17dd0070, (q31_t)0x823e7e18, (q31_t)0x17d6d41d, (q31_t)0x823d525e,
+  (q31_t)0x17d0a7bc, (q31_t)0x823c26f3, (q31_t)0x17ca7b4c, (q31_t)0x823afbd5, (q31_t)0x17c44ecd, (q31_t)0x8239d104, (q31_t)0x17be223f, (q31_t)0x8238a681,
+  (q31_t)0x17b7f5a3, (q31_t)0x82377c4c, (q31_t)0x17b1c8f8, (q31_t)0x82365264, (q31_t)0x17ab9c3e, (q31_t)0x823528ca, (q31_t)0x17a56f76, (q31_t)0x8233ff7e,
+  (q31_t)0x179f429f, (q31_t)0x8232d67f, (q31_t)0x179915ba, (q31_t)0x8231adce, (q31_t)0x1792e8c6, (q31_t)0x8230856a, (q31_t)0x178cbbc4, (q31_t)0x822f5d54,
+  (q31_t)0x17868eb3, (q31_t)0x822e358b, (q31_t)0x17806194, (q31_t)0x822d0e10, (q31_t)0x177a3466, (q31_t)0x822be6e3, (q31_t)0x17740729, (q31_t)0x822ac004,
+  (q31_t)0x176dd9de, (q31_t)0x82299971, (q31_t)0x1767ac85, (q31_t)0x8228732d, (q31_t)0x17617f1d, (q31_t)0x82274d36, (q31_t)0x175b51a7, (q31_t)0x8226278d,
+  (q31_t)0x17552422, (q31_t)0x82250232, (q31_t)0x174ef68f, (q31_t)0x8223dd24, (q31_t)0x1748c8ee, (q31_t)0x8222b863, (q31_t)0x17429b3e, (q31_t)0x822193f1,
+  (q31_t)0x173c6d80, (q31_t)0x82206fcc, (q31_t)0x17363fb4, (q31_t)0x821f4bf5, (q31_t)0x173011d9, (q31_t)0x821e286b, (q31_t)0x1729e3f0, (q31_t)0x821d052f,
+  (q31_t)0x1723b5f9, (q31_t)0x821be240, (q31_t)0x171d87f3, (q31_t)0x821abfa0, (q31_t)0x171759df, (q31_t)0x82199d4d, (q31_t)0x17112bbd, (q31_t)0x82187b47,
+  (q31_t)0x170afd8d, (q31_t)0x82175990, (q31_t)0x1704cf4f, (q31_t)0x82163826, (q31_t)0x16fea102, (q31_t)0x82151709, (q31_t)0x16f872a7, (q31_t)0x8213f63a,
+  (q31_t)0x16f2443e, (q31_t)0x8212d5b9, (q31_t)0x16ec15c7, (q31_t)0x8211b586, (q31_t)0x16e5e741, (q31_t)0x821095a0, (q31_t)0x16dfb8ae, (q31_t)0x820f7608,
+  (q31_t)0x16d98a0c, (q31_t)0x820e56be, (q31_t)0x16d35b5c, (q31_t)0x820d37c1, (q31_t)0x16cd2c9f, (q31_t)0x820c1912, (q31_t)0x16c6fdd3, (q31_t)0x820afab1,
+  (q31_t)0x16c0cef9, (q31_t)0x8209dc9e, (q31_t)0x16baa011, (q31_t)0x8208bed8, (q31_t)0x16b4711b, (q31_t)0x8207a160, (q31_t)0x16ae4217, (q31_t)0x82068435,
+  (q31_t)0x16a81305, (q31_t)0x82056758, (q31_t)0x16a1e3e5, (q31_t)0x82044ac9, (q31_t)0x169bb4b7, (q31_t)0x82032e88, (q31_t)0x1695857b, (q31_t)0x82021294,
+  (q31_t)0x168f5632, (q31_t)0x8200f6ef, (q31_t)0x168926da, (q31_t)0x81ffdb96, (q31_t)0x1682f774, (q31_t)0x81fec08c, (q31_t)0x167cc801, (q31_t)0x81fda5cf,
+  (q31_t)0x1676987f, (q31_t)0x81fc8b60, (q31_t)0x167068f0, (q31_t)0x81fb713f, (q31_t)0x166a3953, (q31_t)0x81fa576c, (q31_t)0x166409a8, (q31_t)0x81f93de6,
+  (q31_t)0x165dd9f0, (q31_t)0x81f824ae, (q31_t)0x1657aa29, (q31_t)0x81f70bc3, (q31_t)0x16517a55, (q31_t)0x81f5f327, (q31_t)0x164b4a73, (q31_t)0x81f4dad8,
+  (q31_t)0x16451a83, (q31_t)0x81f3c2d7, (q31_t)0x163eea86, (q31_t)0x81f2ab24, (q31_t)0x1638ba7a, (q31_t)0x81f193be, (q31_t)0x16328a61, (q31_t)0x81f07ca6,
+  (q31_t)0x162c5a3b, (q31_t)0x81ef65dc, (q31_t)0x16262a06, (q31_t)0x81ee4f60, (q31_t)0x161ff9c4, (q31_t)0x81ed3932, (q31_t)0x1619c975, (q31_t)0x81ec2351,
+  (q31_t)0x16139918, (q31_t)0x81eb0dbe, (q31_t)0x160d68ad, (q31_t)0x81e9f879, (q31_t)0x16073834, (q31_t)0x81e8e381, (q31_t)0x160107ae, (q31_t)0x81e7ced8,
+  (q31_t)0x15fad71b, (q31_t)0x81e6ba7c, (q31_t)0x15f4a679, (q31_t)0x81e5a66e, (q31_t)0x15ee75cb, (q31_t)0x81e492ad, (q31_t)0x15e8450e, (q31_t)0x81e37f3b,
+  (q31_t)0x15e21445, (q31_t)0x81e26c16, (q31_t)0x15dbe36d, (q31_t)0x81e1593f, (q31_t)0x15d5b288, (q31_t)0x81e046b6, (q31_t)0x15cf8196, (q31_t)0x81df347b,
+  (q31_t)0x15c95097, (q31_t)0x81de228d, (q31_t)0x15c31f89, (q31_t)0x81dd10ee, (q31_t)0x15bcee6f, (q31_t)0x81dbff9c, (q31_t)0x15b6bd47, (q31_t)0x81daee98,
+  (q31_t)0x15b08c12, (q31_t)0x81d9dde1, (q31_t)0x15aa5acf, (q31_t)0x81d8cd79, (q31_t)0x15a4297f, (q31_t)0x81d7bd5e, (q31_t)0x159df821, (q31_t)0x81d6ad92,
+  (q31_t)0x1597c6b7, (q31_t)0x81d59e13, (q31_t)0x1591953e, (q31_t)0x81d48ee1, (q31_t)0x158b63b9, (q31_t)0x81d37ffe, (q31_t)0x15853226, (q31_t)0x81d27169,
+  (q31_t)0x157f0086, (q31_t)0x81d16321, (q31_t)0x1578ced9, (q31_t)0x81d05527, (q31_t)0x15729d1f, (q31_t)0x81cf477b, (q31_t)0x156c6b57, (q31_t)0x81ce3a1d,
+  (q31_t)0x15663982, (q31_t)0x81cd2d0c, (q31_t)0x156007a0, (q31_t)0x81cc204a, (q31_t)0x1559d5b1, (q31_t)0x81cb13d5, (q31_t)0x1553a3b4, (q31_t)0x81ca07af,
+  (q31_t)0x154d71aa, (q31_t)0x81c8fbd6, (q31_t)0x15473f94, (q31_t)0x81c7f04b, (q31_t)0x15410d70, (q31_t)0x81c6e50d, (q31_t)0x153adb3f, (q31_t)0x81c5da1e,
+  (q31_t)0x1534a901, (q31_t)0x81c4cf7d, (q31_t)0x152e76b5, (q31_t)0x81c3c529, (q31_t)0x1528445d, (q31_t)0x81c2bb23, (q31_t)0x152211f8, (q31_t)0x81c1b16b,
+  (q31_t)0x151bdf86, (q31_t)0x81c0a801, (q31_t)0x1515ad06, (q31_t)0x81bf9ee5, (q31_t)0x150f7a7a, (q31_t)0x81be9617, (q31_t)0x150947e1, (q31_t)0x81bd8d97,
+  (q31_t)0x1503153a, (q31_t)0x81bc8564, (q31_t)0x14fce287, (q31_t)0x81bb7d7f, (q31_t)0x14f6afc7, (q31_t)0x81ba75e9, (q31_t)0x14f07cf9, (q31_t)0x81b96ea0,
+  (q31_t)0x14ea4a1f, (q31_t)0x81b867a5, (q31_t)0x14e41738, (q31_t)0x81b760f8, (q31_t)0x14dde445, (q31_t)0x81b65a99, (q31_t)0x14d7b144, (q31_t)0x81b55488,
+  (q31_t)0x14d17e36, (q31_t)0x81b44ec4, (q31_t)0x14cb4b1c, (q31_t)0x81b3494f, (q31_t)0x14c517f4, (q31_t)0x81b24427, (q31_t)0x14bee4c0, (q31_t)0x81b13f4e,
+  (q31_t)0x14b8b17f, (q31_t)0x81b03ac2, (q31_t)0x14b27e32, (q31_t)0x81af3684, (q31_t)0x14ac4ad7, (q31_t)0x81ae3294, (q31_t)0x14a61770, (q31_t)0x81ad2ef2,
+  (q31_t)0x149fe3fc, (q31_t)0x81ac2b9e, (q31_t)0x1499b07c, (q31_t)0x81ab2898, (q31_t)0x14937cee, (q31_t)0x81aa25e0, (q31_t)0x148d4954, (q31_t)0x81a92376,
+  (q31_t)0x148715ae, (q31_t)0x81a82159, (q31_t)0x1480e1fa, (q31_t)0x81a71f8b, (q31_t)0x147aae3a, (q31_t)0x81a61e0b, (q31_t)0x14747a6d, (q31_t)0x81a51cd8,
+  (q31_t)0x146e4694, (q31_t)0x81a41bf4, (q31_t)0x146812ae, (q31_t)0x81a31b5d, (q31_t)0x1461debc, (q31_t)0x81a21b14, (q31_t)0x145baabd, (q31_t)0x81a11b1a,
+  (q31_t)0x145576b1, (q31_t)0x81a01b6d, (q31_t)0x144f4299, (q31_t)0x819f1c0e, (q31_t)0x14490e74, (q31_t)0x819e1cfd, (q31_t)0x1442da43, (q31_t)0x819d1e3a,
+  (q31_t)0x143ca605, (q31_t)0x819c1fc5, (q31_t)0x143671bb, (q31_t)0x819b219e, (q31_t)0x14303d65, (q31_t)0x819a23c5, (q31_t)0x142a0902, (q31_t)0x8199263a,
+  (q31_t)0x1423d492, (q31_t)0x819828fd, (q31_t)0x141da016, (q31_t)0x81972c0e, (q31_t)0x14176b8e, (q31_t)0x81962f6d, (q31_t)0x141136f9, (q31_t)0x8195331a,
+  (q31_t)0x140b0258, (q31_t)0x81943715, (q31_t)0x1404cdaa, (q31_t)0x81933b5e, (q31_t)0x13fe98f1, (q31_t)0x81923ff4, (q31_t)0x13f8642a, (q31_t)0x819144d9,
+  (q31_t)0x13f22f58, (q31_t)0x81904a0c, (q31_t)0x13ebfa79, (q31_t)0x818f4f8d, (q31_t)0x13e5c58e, (q31_t)0x818e555c, (q31_t)0x13df9097, (q31_t)0x818d5b78,
+  (q31_t)0x13d95b93, (q31_t)0x818c61e3, (q31_t)0x13d32683, (q31_t)0x818b689c, (q31_t)0x13ccf167, (q31_t)0x818a6fa3, (q31_t)0x13c6bc3f, (q31_t)0x818976f8,
+  (q31_t)0x13c0870a, (q31_t)0x81887e9a, (q31_t)0x13ba51ca, (q31_t)0x8187868b, (q31_t)0x13b41c7d, (q31_t)0x81868eca, (q31_t)0x13ade724, (q31_t)0x81859757,
+  (q31_t)0x13a7b1bf, (q31_t)0x8184a032, (q31_t)0x13a17c4d, (q31_t)0x8183a95b, (q31_t)0x139b46d0, (q31_t)0x8182b2d1, (q31_t)0x13951146, (q31_t)0x8181bc96,
+  (q31_t)0x138edbb1, (q31_t)0x8180c6a9, (q31_t)0x1388a60f, (q31_t)0x817fd10a, (q31_t)0x13827062, (q31_t)0x817edbb9, (q31_t)0x137c3aa8, (q31_t)0x817de6b6,
+  (q31_t)0x137604e2, (q31_t)0x817cf201, (q31_t)0x136fcf10, (q31_t)0x817bfd9b, (q31_t)0x13699933, (q31_t)0x817b0982, (q31_t)0x13636349, (q31_t)0x817a15b7,
+  (q31_t)0x135d2d53, (q31_t)0x8179223a, (q31_t)0x1356f752, (q31_t)0x81782f0b, (q31_t)0x1350c144, (q31_t)0x81773c2b, (q31_t)0x134a8b2b, (q31_t)0x81764998,
+  (q31_t)0x13445505, (q31_t)0x81755754, (q31_t)0x133e1ed4, (q31_t)0x8174655d, (q31_t)0x1337e897, (q31_t)0x817373b5, (q31_t)0x1331b24e, (q31_t)0x8172825a,
+  (q31_t)0x132b7bf9, (q31_t)0x8171914e, (q31_t)0x13254599, (q31_t)0x8170a090, (q31_t)0x131f0f2c, (q31_t)0x816fb020, (q31_t)0x1318d8b4, (q31_t)0x816ebffe,
+  (q31_t)0x1312a230, (q31_t)0x816dd02a, (q31_t)0x130c6ba0, (q31_t)0x816ce0a4, (q31_t)0x13063505, (q31_t)0x816bf16c, (q31_t)0x12fffe5d, (q31_t)0x816b0282,
+  (q31_t)0x12f9c7aa, (q31_t)0x816a13e6, (q31_t)0x12f390ec, (q31_t)0x81692599, (q31_t)0x12ed5a21, (q31_t)0x81683799, (q31_t)0x12e7234b, (q31_t)0x816749e8,
+  (q31_t)0x12e0ec6a, (q31_t)0x81665c84, (q31_t)0x12dab57c, (q31_t)0x81656f6f, (q31_t)0x12d47e83, (q31_t)0x816482a8, (q31_t)0x12ce477f, (q31_t)0x8163962f,
+  (q31_t)0x12c8106f, (q31_t)0x8162aa04, (q31_t)0x12c1d953, (q31_t)0x8161be27, (q31_t)0x12bba22b, (q31_t)0x8160d298, (q31_t)0x12b56af9, (q31_t)0x815fe758,
+  (q31_t)0x12af33ba, (q31_t)0x815efc65, (q31_t)0x12a8fc70, (q31_t)0x815e11c1, (q31_t)0x12a2c51b, (q31_t)0x815d276a, (q31_t)0x129c8dba, (q31_t)0x815c3d62,
+  (q31_t)0x1296564d, (q31_t)0x815b53a8, (q31_t)0x12901ed5, (q31_t)0x815a6a3c, (q31_t)0x1289e752, (q31_t)0x8159811e, (q31_t)0x1283afc3, (q31_t)0x8158984e,
+  (q31_t)0x127d7829, (q31_t)0x8157afcd, (q31_t)0x12774083, (q31_t)0x8156c799, (q31_t)0x127108d2, (q31_t)0x8155dfb4, (q31_t)0x126ad116, (q31_t)0x8154f81d,
+  (q31_t)0x1264994e, (q31_t)0x815410d4, (q31_t)0x125e617b, (q31_t)0x815329d9, (q31_t)0x1258299c, (q31_t)0x8152432c, (q31_t)0x1251f1b3, (q31_t)0x81515ccd,
+  (q31_t)0x124bb9be, (q31_t)0x815076bd, (q31_t)0x124581bd, (q31_t)0x814f90fb, (q31_t)0x123f49b2, (q31_t)0x814eab86, (q31_t)0x1239119b, (q31_t)0x814dc660,
+  (q31_t)0x1232d979, (q31_t)0x814ce188, (q31_t)0x122ca14b, (q31_t)0x814bfcff, (q31_t)0x12266913, (q31_t)0x814b18c3, (q31_t)0x122030cf, (q31_t)0x814a34d6,
+  (q31_t)0x1219f880, (q31_t)0x81495136, (q31_t)0x1213c026, (q31_t)0x81486de5, (q31_t)0x120d87c1, (q31_t)0x81478ae2, (q31_t)0x12074f50, (q31_t)0x8146a82e,
+  (q31_t)0x120116d5, (q31_t)0x8145c5c7, (q31_t)0x11fade4e, (q31_t)0x8144e3ae, (q31_t)0x11f4a5bd, (q31_t)0x814401e4, (q31_t)0x11ee6d20, (q31_t)0x81432068,
+  (q31_t)0x11e83478, (q31_t)0x81423f3a, (q31_t)0x11e1fbc5, (q31_t)0x81415e5a, (q31_t)0x11dbc307, (q31_t)0x81407dc9, (q31_t)0x11d58a3e, (q31_t)0x813f9d86,
+  (q31_t)0x11cf516a, (q31_t)0x813ebd90, (q31_t)0x11c9188b, (q31_t)0x813ddde9, (q31_t)0x11c2dfa2, (q31_t)0x813cfe91, (q31_t)0x11bca6ad, (q31_t)0x813c1f86,
+  (q31_t)0x11b66dad, (q31_t)0x813b40ca, (q31_t)0x11b034a2, (q31_t)0x813a625b, (q31_t)0x11a9fb8d, (q31_t)0x8139843b, (q31_t)0x11a3c26c, (q31_t)0x8138a66a,
+  (q31_t)0x119d8941, (q31_t)0x8137c8e6, (q31_t)0x1197500a, (q31_t)0x8136ebb1, (q31_t)0x119116c9, (q31_t)0x81360ec9, (q31_t)0x118add7d, (q31_t)0x81353230,
+  (q31_t)0x1184a427, (q31_t)0x813455e6, (q31_t)0x117e6ac5, (q31_t)0x813379e9, (q31_t)0x11783159, (q31_t)0x81329e3b, (q31_t)0x1171f7e2, (q31_t)0x8131c2db,
+  (q31_t)0x116bbe60, (q31_t)0x8130e7c9, (q31_t)0x116584d3, (q31_t)0x81300d05, (q31_t)0x115f4b3c, (q31_t)0x812f3290, (q31_t)0x1159119a, (q31_t)0x812e5868,
+  (q31_t)0x1152d7ed, (q31_t)0x812d7e8f, (q31_t)0x114c9e35, (q31_t)0x812ca505, (q31_t)0x11466473, (q31_t)0x812bcbc8, (q31_t)0x11402aa6, (q31_t)0x812af2da,
+  (q31_t)0x1139f0cf, (q31_t)0x812a1a3a, (q31_t)0x1133b6ed, (q31_t)0x812941e8, (q31_t)0x112d7d00, (q31_t)0x812869e4, (q31_t)0x11274309, (q31_t)0x8127922f,
+  (q31_t)0x11210907, (q31_t)0x8126bac8, (q31_t)0x111acefb, (q31_t)0x8125e3af, (q31_t)0x111494e4, (q31_t)0x81250ce4, (q31_t)0x110e5ac2, (q31_t)0x81243668,
+  (q31_t)0x11082096, (q31_t)0x8123603a, (q31_t)0x1101e65f, (q31_t)0x81228a5a, (q31_t)0x10fbac1e, (q31_t)0x8121b4c8, (q31_t)0x10f571d3, (q31_t)0x8120df85,
+  (q31_t)0x10ef377d, (q31_t)0x81200a90, (q31_t)0x10e8fd1c, (q31_t)0x811f35e9, (q31_t)0x10e2c2b2, (q31_t)0x811e6191, (q31_t)0x10dc883c, (q31_t)0x811d8d86,
+  (q31_t)0x10d64dbd, (q31_t)0x811cb9ca, (q31_t)0x10d01333, (q31_t)0x811be65d, (q31_t)0x10c9d89e, (q31_t)0x811b133d, (q31_t)0x10c39dff, (q31_t)0x811a406c,
+  (q31_t)0x10bd6356, (q31_t)0x81196de9, (q31_t)0x10b728a3, (q31_t)0x81189bb4, (q31_t)0x10b0ede5, (q31_t)0x8117c9ce, (q31_t)0x10aab31d, (q31_t)0x8116f836,
+  (q31_t)0x10a4784b, (q31_t)0x811626ec, (q31_t)0x109e3d6e, (q31_t)0x811555f1, (q31_t)0x10980287, (q31_t)0x81148544, (q31_t)0x1091c796, (q31_t)0x8113b4e5,
+  (q31_t)0x108b8c9b, (q31_t)0x8112e4d4, (q31_t)0x10855195, (q31_t)0x81121512, (q31_t)0x107f1686, (q31_t)0x8111459e, (q31_t)0x1078db6c, (q31_t)0x81107678,
+  (q31_t)0x1072a048, (q31_t)0x810fa7a0, (q31_t)0x106c651a, (q31_t)0x810ed917, (q31_t)0x106629e1, (q31_t)0x810e0adc, (q31_t)0x105fee9f, (q31_t)0x810d3cf0,
+  (q31_t)0x1059b352, (q31_t)0x810c6f52, (q31_t)0x105377fc, (q31_t)0x810ba202, (q31_t)0x104d3c9b, (q31_t)0x810ad500, (q31_t)0x10470130, (q31_t)0x810a084d,
+  (q31_t)0x1040c5bb, (q31_t)0x81093be8, (q31_t)0x103a8a3d, (q31_t)0x81086fd1, (q31_t)0x10344eb4, (q31_t)0x8107a409, (q31_t)0x102e1321, (q31_t)0x8106d88f,
+  (q31_t)0x1027d784, (q31_t)0x81060d63, (q31_t)0x10219bdd, (q31_t)0x81054286, (q31_t)0x101b602d, (q31_t)0x810477f7, (q31_t)0x10152472, (q31_t)0x8103adb6,
+  (q31_t)0x100ee8ad, (q31_t)0x8102e3c4, (q31_t)0x1008acdf, (q31_t)0x81021a20, (q31_t)0x10027107, (q31_t)0x810150ca, (q31_t)0xffc3524, (q31_t)0x810087c3,
+  (q31_t)0xff5f938, (q31_t)0x80ffbf0a, (q31_t)0xfefbd42, (q31_t)0x80fef69f, (q31_t)0xfe98143, (q31_t)0x80fe2e83, (q31_t)0xfe34539, (q31_t)0x80fd66b5,
+  (q31_t)0xfdd0926, (q31_t)0x80fc9f35, (q31_t)0xfd6cd08, (q31_t)0x80fbd804, (q31_t)0xfd090e1, (q31_t)0x80fb1121, (q31_t)0xfca54b1, (q31_t)0x80fa4a8c,
+  (q31_t)0xfc41876, (q31_t)0x80f98446, (q31_t)0xfbddc32, (q31_t)0x80f8be4e, (q31_t)0xfb79fe4, (q31_t)0x80f7f8a4, (q31_t)0xfb1638d, (q31_t)0x80f73349,
+  (q31_t)0xfab272b, (q31_t)0x80f66e3c, (q31_t)0xfa4eac0, (q31_t)0x80f5a97e, (q31_t)0xf9eae4c, (q31_t)0x80f4e50e, (q31_t)0xf9871ce, (q31_t)0x80f420ec,
+  (q31_t)0xf923546, (q31_t)0x80f35d19, (q31_t)0xf8bf8b4, (q31_t)0x80f29994, (q31_t)0xf85bc19, (q31_t)0x80f1d65d, (q31_t)0xf7f7f75, (q31_t)0x80f11375,
+  (q31_t)0xf7942c7, (q31_t)0x80f050db, (q31_t)0xf73060f, (q31_t)0x80ef8e90, (q31_t)0xf6cc94e, (q31_t)0x80eecc93, (q31_t)0xf668c83, (q31_t)0x80ee0ae4,
+  (q31_t)0xf604faf, (q31_t)0x80ed4984, (q31_t)0xf5a12d1, (q31_t)0x80ec8872, (q31_t)0xf53d5ea, (q31_t)0x80ebc7ae, (q31_t)0xf4d98f9, (q31_t)0x80eb0739,
+  (q31_t)0xf475bff, (q31_t)0x80ea4712, (q31_t)0xf411efb, (q31_t)0x80e9873a, (q31_t)0xf3ae1ee, (q31_t)0x80e8c7b0, (q31_t)0xf34a4d8, (q31_t)0x80e80874,
+  (q31_t)0xf2e67b8, (q31_t)0x80e74987, (q31_t)0xf282a8f, (q31_t)0x80e68ae8, (q31_t)0xf21ed5d, (q31_t)0x80e5cc98, (q31_t)0xf1bb021, (q31_t)0x80e50e96,
+  (q31_t)0xf1572dc, (q31_t)0x80e450e2, (q31_t)0xf0f358e, (q31_t)0x80e3937d, (q31_t)0xf08f836, (q31_t)0x80e2d666, (q31_t)0xf02bad5, (q31_t)0x80e2199e,
+  (q31_t)0xefc7d6b, (q31_t)0x80e15d24, (q31_t)0xef63ff7, (q31_t)0x80e0a0f8, (q31_t)0xef0027b, (q31_t)0x80dfe51b, (q31_t)0xee9c4f5, (q31_t)0x80df298c,
+  (q31_t)0xee38766, (q31_t)0x80de6e4c, (q31_t)0xedd49ce, (q31_t)0x80ddb35a, (q31_t)0xed70c2c, (q31_t)0x80dcf8b7, (q31_t)0xed0ce82, (q31_t)0x80dc3e62,
+  (q31_t)0xeca90ce, (q31_t)0x80db845b, (q31_t)0xec45311, (q31_t)0x80dacaa3, (q31_t)0xebe154b, (q31_t)0x80da1139, (q31_t)0xeb7d77c, (q31_t)0x80d9581e,
+  (q31_t)0xeb199a4, (q31_t)0x80d89f51, (q31_t)0xeab5bc3, (q31_t)0x80d7e6d3, (q31_t)0xea51dd8, (q31_t)0x80d72ea3, (q31_t)0xe9edfe5, (q31_t)0x80d676c1,
+  (q31_t)0xe98a1e9, (q31_t)0x80d5bf2e, (q31_t)0xe9263e3, (q31_t)0x80d507e9, (q31_t)0xe8c25d5, (q31_t)0x80d450f3, (q31_t)0xe85e7be, (q31_t)0x80d39a4b,
+  (q31_t)0xe7fa99e, (q31_t)0x80d2e3f2, (q31_t)0xe796b74, (q31_t)0x80d22de7, (q31_t)0xe732d42, (q31_t)0x80d1782a, (q31_t)0xe6cef07, (q31_t)0x80d0c2bc,
+  (q31_t)0xe66b0c3, (q31_t)0x80d00d9d, (q31_t)0xe607277, (q31_t)0x80cf58cc, (q31_t)0xe5a3421, (q31_t)0x80cea449, (q31_t)0xe53f5c2, (q31_t)0x80cdf015,
+  (q31_t)0xe4db75b, (q31_t)0x80cd3c2f, (q31_t)0xe4778eb, (q31_t)0x80cc8898, (q31_t)0xe413a72, (q31_t)0x80cbd54f, (q31_t)0xe3afbf0, (q31_t)0x80cb2255,
+  (q31_t)0xe34bd66, (q31_t)0x80ca6fa9, (q31_t)0xe2e7ed2, (q31_t)0x80c9bd4c, (q31_t)0xe284036, (q31_t)0x80c90b3d, (q31_t)0xe220191, (q31_t)0x80c8597c,
+  (q31_t)0xe1bc2e4, (q31_t)0x80c7a80a, (q31_t)0xe15842e, (q31_t)0x80c6f6e7, (q31_t)0xe0f456f, (q31_t)0x80c64612, (q31_t)0xe0906a7, (q31_t)0x80c5958b,
+  (q31_t)0xe02c7d7, (q31_t)0x80c4e553, (q31_t)0xdfc88fe, (q31_t)0x80c4356a, (q31_t)0xdf64a1c, (q31_t)0x80c385cf, (q31_t)0xdf00b32, (q31_t)0x80c2d682,
+  (q31_t)0xde9cc40, (q31_t)0x80c22784, (q31_t)0xde38d44, (q31_t)0x80c178d4, (q31_t)0xddd4e40, (q31_t)0x80c0ca73, (q31_t)0xdd70f34, (q31_t)0x80c01c60,
+  (q31_t)0xdd0d01f, (q31_t)0x80bf6e9c, (q31_t)0xdca9102, (q31_t)0x80bec127, (q31_t)0xdc451dc, (q31_t)0x80be13ff, (q31_t)0xdbe12ad, (q31_t)0x80bd6727,
+  (q31_t)0xdb7d376, (q31_t)0x80bcba9d, (q31_t)0xdb19437, (q31_t)0x80bc0e61, (q31_t)0xdab54ef, (q31_t)0x80bb6274, (q31_t)0xda5159f, (q31_t)0x80bab6d5,
+  (q31_t)0xd9ed646, (q31_t)0x80ba0b85, (q31_t)0xd9896e5, (q31_t)0x80b96083, (q31_t)0xd92577b, (q31_t)0x80b8b5d0, (q31_t)0xd8c1809, (q31_t)0x80b80b6c,
+  (q31_t)0xd85d88f, (q31_t)0x80b76156, (q31_t)0xd7f990c, (q31_t)0x80b6b78e, (q31_t)0xd795982, (q31_t)0x80b60e15, (q31_t)0xd7319ee, (q31_t)0x80b564ea,
+  (q31_t)0xd6cda53, (q31_t)0x80b4bc0e, (q31_t)0xd669aaf, (q31_t)0x80b41381, (q31_t)0xd605b03, (q31_t)0x80b36b42, (q31_t)0xd5a1b4f, (q31_t)0x80b2c351,
+  (q31_t)0xd53db92, (q31_t)0x80b21baf, (q31_t)0xd4d9bcd, (q31_t)0x80b1745c, (q31_t)0xd475c00, (q31_t)0x80b0cd57, (q31_t)0xd411c2b, (q31_t)0x80b026a1,
+  (q31_t)0xd3adc4e, (q31_t)0x80af8039, (q31_t)0xd349c68, (q31_t)0x80aeda20, (q31_t)0xd2e5c7b, (q31_t)0x80ae3455, (q31_t)0xd281c85, (q31_t)0x80ad8ed9,
+  (q31_t)0xd21dc87, (q31_t)0x80ace9ab, (q31_t)0xd1b9c81, (q31_t)0x80ac44cc, (q31_t)0xd155c73, (q31_t)0x80aba03b, (q31_t)0xd0f1c5d, (q31_t)0x80aafbf9,
+  (q31_t)0xd08dc3f, (q31_t)0x80aa5806, (q31_t)0xd029c18, (q31_t)0x80a9b461, (q31_t)0xcfc5bea, (q31_t)0x80a9110b, (q31_t)0xcf61bb4, (q31_t)0x80a86e03,
+  (q31_t)0xcefdb76, (q31_t)0x80a7cb49, (q31_t)0xce99b2f, (q31_t)0x80a728df, (q31_t)0xce35ae1, (q31_t)0x80a686c2, (q31_t)0xcdd1a8b, (q31_t)0x80a5e4f5,
+  (q31_t)0xcd6da2d, (q31_t)0x80a54376, (q31_t)0xcd099c7, (q31_t)0x80a4a245, (q31_t)0xcca5959, (q31_t)0x80a40163, (q31_t)0xcc418e3, (q31_t)0x80a360d0,
+  (q31_t)0xcbdd865, (q31_t)0x80a2c08b, (q31_t)0xcb797e0, (q31_t)0x80a22095, (q31_t)0xcb15752, (q31_t)0x80a180ed, (q31_t)0xcab16bd, (q31_t)0x80a0e194,
+  (q31_t)0xca4d620, (q31_t)0x80a04289, (q31_t)0xc9e957b, (q31_t)0x809fa3cd, (q31_t)0xc9854cf, (q31_t)0x809f0560, (q31_t)0xc92141a, (q31_t)0x809e6741,
+  (q31_t)0xc8bd35e, (q31_t)0x809dc971, (q31_t)0xc85929a, (q31_t)0x809d2bef, (q31_t)0xc7f51cf, (q31_t)0x809c8ebc, (q31_t)0xc7910fb, (q31_t)0x809bf1d7,
+  (q31_t)0xc72d020, (q31_t)0x809b5541, (q31_t)0xc6c8f3e, (q31_t)0x809ab8fa, (q31_t)0xc664e53, (q31_t)0x809a1d01, (q31_t)0xc600d61, (q31_t)0x80998157,
+  (q31_t)0xc59cc68, (q31_t)0x8098e5fb, (q31_t)0xc538b66, (q31_t)0x80984aee, (q31_t)0xc4d4a5d, (q31_t)0x8097b030, (q31_t)0xc47094d, (q31_t)0x809715c0,
+  (q31_t)0xc40c835, (q31_t)0x80967b9f, (q31_t)0xc3a8715, (q31_t)0x8095e1cc, (q31_t)0xc3445ee, (q31_t)0x80954848, (q31_t)0xc2e04c0, (q31_t)0x8094af13,
+  (q31_t)0xc27c389, (q31_t)0x8094162c, (q31_t)0xc21824c, (q31_t)0x80937d93, (q31_t)0xc1b4107, (q31_t)0x8092e54a, (q31_t)0xc14ffba, (q31_t)0x80924d4f,
+  (q31_t)0xc0ebe66, (q31_t)0x8091b5a2, (q31_t)0xc087d0a, (q31_t)0x80911e44, (q31_t)0xc023ba7, (q31_t)0x80908735, (q31_t)0xbfbfa3d, (q31_t)0x808ff074,
+  (q31_t)0xbf5b8cb, (q31_t)0x808f5a02, (q31_t)0xbef7752, (q31_t)0x808ec3df, (q31_t)0xbe935d2, (q31_t)0x808e2e0a, (q31_t)0xbe2f44a, (q31_t)0x808d9884,
+  (q31_t)0xbdcb2bb, (q31_t)0x808d034c, (q31_t)0xbd67124, (q31_t)0x808c6e63, (q31_t)0xbd02f87, (q31_t)0x808bd9c9, (q31_t)0xbc9ede2, (q31_t)0x808b457d,
+  (q31_t)0xbc3ac35, (q31_t)0x808ab180, (q31_t)0xbbd6a82, (q31_t)0x808a1dd2, (q31_t)0xbb728c7, (q31_t)0x80898a72, (q31_t)0xbb0e705, (q31_t)0x8088f761,
+  (q31_t)0xbaaa53b, (q31_t)0x8088649e, (q31_t)0xba4636b, (q31_t)0x8087d22a, (q31_t)0xb9e2193, (q31_t)0x80874005, (q31_t)0xb97dfb5, (q31_t)0x8086ae2e,
+  (q31_t)0xb919dcf, (q31_t)0x80861ca6, (q31_t)0xb8b5be1, (q31_t)0x80858b6c, (q31_t)0xb8519ed, (q31_t)0x8084fa82, (q31_t)0xb7ed7f2, (q31_t)0x808469e5,
+  (q31_t)0xb7895f0, (q31_t)0x8083d998, (q31_t)0xb7253e6, (q31_t)0x80834999, (q31_t)0xb6c11d5, (q31_t)0x8082b9e9, (q31_t)0xb65cfbe, (q31_t)0x80822a87,
+  (q31_t)0xb5f8d9f, (q31_t)0x80819b74, (q31_t)0xb594b7a, (q31_t)0x80810cb0, (q31_t)0xb53094d, (q31_t)0x80807e3a, (q31_t)0xb4cc719, (q31_t)0x807ff013,
+  (q31_t)0xb4684df, (q31_t)0x807f623b, (q31_t)0xb40429d, (q31_t)0x807ed4b1, (q31_t)0xb3a0055, (q31_t)0x807e4776, (q31_t)0xb33be05, (q31_t)0x807dba89,
+  (q31_t)0xb2d7baf, (q31_t)0x807d2dec, (q31_t)0xb273952, (q31_t)0x807ca19c, (q31_t)0xb20f6ee, (q31_t)0x807c159c, (q31_t)0xb1ab483, (q31_t)0x807b89ea,
+  (q31_t)0xb147211, (q31_t)0x807afe87, (q31_t)0xb0e2f98, (q31_t)0x807a7373, (q31_t)0xb07ed19, (q31_t)0x8079e8ad, (q31_t)0xb01aa92, (q31_t)0x80795e36,
+  (q31_t)0xafb6805, (q31_t)0x8078d40d, (q31_t)0xaf52571, (q31_t)0x80784a33, (q31_t)0xaeee2d7, (q31_t)0x8077c0a8, (q31_t)0xae8a036, (q31_t)0x8077376c,
+  (q31_t)0xae25d8d, (q31_t)0x8076ae7e, (q31_t)0xadc1adf, (q31_t)0x807625df, (q31_t)0xad5d829, (q31_t)0x80759d8e, (q31_t)0xacf956d, (q31_t)0x8075158c,
+  (q31_t)0xac952aa, (q31_t)0x80748dd9, (q31_t)0xac30fe1, (q31_t)0x80740675, (q31_t)0xabccd11, (q31_t)0x80737f5f, (q31_t)0xab68a3a, (q31_t)0x8072f898,
+  (q31_t)0xab0475c, (q31_t)0x8072721f, (q31_t)0xaaa0478, (q31_t)0x8071ebf6, (q31_t)0xaa3c18e, (q31_t)0x8071661a, (q31_t)0xa9d7e9d, (q31_t)0x8070e08e,
+  (q31_t)0xa973ba5, (q31_t)0x80705b50, (q31_t)0xa90f8a7, (q31_t)0x806fd661, (q31_t)0xa8ab5a2, (q31_t)0x806f51c1, (q31_t)0xa847297, (q31_t)0x806ecd6f,
+  (q31_t)0xa7e2f85, (q31_t)0x806e496c, (q31_t)0xa77ec6d, (q31_t)0x806dc5b8, (q31_t)0xa71a94f, (q31_t)0x806d4253, (q31_t)0xa6b662a, (q31_t)0x806cbf3c,
+  (q31_t)0xa6522fe, (q31_t)0x806c3c74, (q31_t)0xa5edfcc, (q31_t)0x806bb9fa, (q31_t)0xa589c94, (q31_t)0x806b37cf, (q31_t)0xa525955, (q31_t)0x806ab5f3,
+  (q31_t)0xa4c1610, (q31_t)0x806a3466, (q31_t)0xa45d2c5, (q31_t)0x8069b327, (q31_t)0xa3f8f73, (q31_t)0x80693237, (q31_t)0xa394c1b, (q31_t)0x8068b196,
+  (q31_t)0xa3308bd, (q31_t)0x80683143, (q31_t)0xa2cc558, (q31_t)0x8067b13f, (q31_t)0xa2681ed, (q31_t)0x8067318a, (q31_t)0xa203e7c, (q31_t)0x8066b224,
+  (q31_t)0xa19fb04, (q31_t)0x8066330c, (q31_t)0xa13b787, (q31_t)0x8065b443, (q31_t)0xa0d7403, (q31_t)0x806535c9, (q31_t)0xa073079, (q31_t)0x8064b79d,
+  (q31_t)0xa00ece8, (q31_t)0x806439c0, (q31_t)0x9faa952, (q31_t)0x8063bc32, (q31_t)0x9f465b5, (q31_t)0x80633ef3, (q31_t)0x9ee2213, (q31_t)0x8062c202,
+  (q31_t)0x9e7de6a, (q31_t)0x80624560, (q31_t)0x9e19abb, (q31_t)0x8061c90c, (q31_t)0x9db5706, (q31_t)0x80614d08, (q31_t)0x9d5134b, (q31_t)0x8060d152,
+  (q31_t)0x9cecf89, (q31_t)0x806055eb, (q31_t)0x9c88bc2, (q31_t)0x805fdad2, (q31_t)0x9c247f5, (q31_t)0x805f6009, (q31_t)0x9bc0421, (q31_t)0x805ee58e,
+  (q31_t)0x9b5c048, (q31_t)0x805e6b62, (q31_t)0x9af7c69, (q31_t)0x805df184, (q31_t)0x9a93884, (q31_t)0x805d77f5, (q31_t)0x9a2f498, (q31_t)0x805cfeb5,
+  (q31_t)0x99cb0a7, (q31_t)0x805c85c4, (q31_t)0x9966cb0, (q31_t)0x805c0d21, (q31_t)0x99028b3, (q31_t)0x805b94ce, (q31_t)0x989e4b0, (q31_t)0x805b1cc8,
+  (q31_t)0x983a0a7, (q31_t)0x805aa512, (q31_t)0x97d5c99, (q31_t)0x805a2daa, (q31_t)0x9771884, (q31_t)0x8059b692, (q31_t)0x970d46a, (q31_t)0x80593fc7,
+  (q31_t)0x96a9049, (q31_t)0x8058c94c, (q31_t)0x9644c23, (q31_t)0x8058531f, (q31_t)0x95e07f8, (q31_t)0x8057dd41, (q31_t)0x957c3c6, (q31_t)0x805767b2,
+  (q31_t)0x9517f8f, (q31_t)0x8056f272, (q31_t)0x94b3b52, (q31_t)0x80567d80, (q31_t)0x944f70f, (q31_t)0x805608dd, (q31_t)0x93eb2c6, (q31_t)0x80559489,
+  (q31_t)0x9386e78, (q31_t)0x80552084, (q31_t)0x9322a24, (q31_t)0x8054accd, (q31_t)0x92be5ca, (q31_t)0x80543965, (q31_t)0x925a16b, (q31_t)0x8053c64c,
+  (q31_t)0x91f5d06, (q31_t)0x80535381, (q31_t)0x919189c, (q31_t)0x8052e106, (q31_t)0x912d42c, (q31_t)0x80526ed9, (q31_t)0x90c8fb6, (q31_t)0x8051fcfb,
+  (q31_t)0x9064b3a, (q31_t)0x80518b6b, (q31_t)0x90006ba, (q31_t)0x80511a2b, (q31_t)0x8f9c233, (q31_t)0x8050a939, (q31_t)0x8f37da7, (q31_t)0x80503896,
+  (q31_t)0x8ed3916, (q31_t)0x804fc841, (q31_t)0x8e6f47f, (q31_t)0x804f583c, (q31_t)0x8e0afe2, (q31_t)0x804ee885, (q31_t)0x8da6b40, (q31_t)0x804e791d,
+  (q31_t)0x8d42699, (q31_t)0x804e0a04, (q31_t)0x8cde1ec, (q31_t)0x804d9b39, (q31_t)0x8c79d3a, (q31_t)0x804d2cbd, (q31_t)0x8c15882, (q31_t)0x804cbe90,
+  (q31_t)0x8bb13c5, (q31_t)0x804c50b2, (q31_t)0x8b4cf02, (q31_t)0x804be323, (q31_t)0x8ae8a3a, (q31_t)0x804b75e2, (q31_t)0x8a8456d, (q31_t)0x804b08f0,
+  (q31_t)0x8a2009a, (q31_t)0x804a9c4d, (q31_t)0x89bbbc3, (q31_t)0x804a2ff9, (q31_t)0x89576e5, (q31_t)0x8049c3f3, (q31_t)0x88f3203, (q31_t)0x8049583d,
+  (q31_t)0x888ed1b, (q31_t)0x8048ecd5, (q31_t)0x882a82e, (q31_t)0x804881bb, (q31_t)0x87c633c, (q31_t)0x804816f1, (q31_t)0x8761e44, (q31_t)0x8047ac75,
+  (q31_t)0x86fd947, (q31_t)0x80474248, (q31_t)0x8699445, (q31_t)0x8046d86a, (q31_t)0x8634f3e, (q31_t)0x80466edb, (q31_t)0x85d0a32, (q31_t)0x8046059b,
+  (q31_t)0x856c520, (q31_t)0x80459ca9, (q31_t)0x850800a, (q31_t)0x80453406, (q31_t)0x84a3aee, (q31_t)0x8044cbb2, (q31_t)0x843f5cd, (q31_t)0x804463ad,
+  (q31_t)0x83db0a7, (q31_t)0x8043fbf6, (q31_t)0x8376b7c, (q31_t)0x8043948e, (q31_t)0x831264c, (q31_t)0x80432d75, (q31_t)0x82ae117, (q31_t)0x8042c6ab,
+  (q31_t)0x8249bdd, (q31_t)0x80426030, (q31_t)0x81e569d, (q31_t)0x8041fa03, (q31_t)0x8181159, (q31_t)0x80419425, (q31_t)0x811cc10, (q31_t)0x80412e96,
+  (q31_t)0x80b86c2, (q31_t)0x8040c956, (q31_t)0x805416e, (q31_t)0x80406465, (q31_t)0x7fefc16, (q31_t)0x803fffc2, (q31_t)0x7f8b6b9, (q31_t)0x803f9b6f,
+  (q31_t)0x7f27157, (q31_t)0x803f376a, (q31_t)0x7ec2bf0, (q31_t)0x803ed3b3, (q31_t)0x7e5e685, (q31_t)0x803e704c, (q31_t)0x7dfa114, (q31_t)0x803e0d34,
+  (q31_t)0x7d95b9e, (q31_t)0x803daa6a, (q31_t)0x7d31624, (q31_t)0x803d47ef, (q31_t)0x7ccd0a5, (q31_t)0x803ce5c3, (q31_t)0x7c68b21, (q31_t)0x803c83e5,
+  (q31_t)0x7c04598, (q31_t)0x803c2257, (q31_t)0x7ba000b, (q31_t)0x803bc117, (q31_t)0x7b3ba78, (q31_t)0x803b6026, (q31_t)0x7ad74e1, (q31_t)0x803aff84,
+  (q31_t)0x7a72f45, (q31_t)0x803a9f31, (q31_t)0x7a0e9a5, (q31_t)0x803a3f2d, (q31_t)0x79aa400, (q31_t)0x8039df77, (q31_t)0x7945e56, (q31_t)0x80398010,
+  (q31_t)0x78e18a7, (q31_t)0x803920f8, (q31_t)0x787d2f4, (q31_t)0x8038c22f, (q31_t)0x7818d3c, (q31_t)0x803863b5, (q31_t)0x77b4780, (q31_t)0x80380589,
+  (q31_t)0x77501be, (q31_t)0x8037a7ac, (q31_t)0x76ebbf9, (q31_t)0x80374a1f, (q31_t)0x768762e, (q31_t)0x8036ece0, (q31_t)0x762305f, (q31_t)0x80368fef,
+  (q31_t)0x75bea8c, (q31_t)0x8036334e, (q31_t)0x755a4b4, (q31_t)0x8035d6fb, (q31_t)0x74f5ed7, (q31_t)0x80357af8, (q31_t)0x74918f6, (q31_t)0x80351f43,
+  (q31_t)0x742d311, (q31_t)0x8034c3dd, (q31_t)0x73c8d27, (q31_t)0x803468c5, (q31_t)0x7364738, (q31_t)0x80340dfd, (q31_t)0x7300145, (q31_t)0x8033b383,
+  (q31_t)0x729bb4e, (q31_t)0x80335959, (q31_t)0x7237552, (q31_t)0x8032ff7d, (q31_t)0x71d2f52, (q31_t)0x8032a5ef, (q31_t)0x716e94e, (q31_t)0x80324cb1,
+  (q31_t)0x710a345, (q31_t)0x8031f3c2, (q31_t)0x70a5d37, (q31_t)0x80319b21, (q31_t)0x7041726, (q31_t)0x803142cf, (q31_t)0x6fdd110, (q31_t)0x8030eacd,
+  (q31_t)0x6f78af6, (q31_t)0x80309318, (q31_t)0x6f144d7, (q31_t)0x80303bb3, (q31_t)0x6eafeb4, (q31_t)0x802fe49d, (q31_t)0x6e4b88d, (q31_t)0x802f8dd5,
+  (q31_t)0x6de7262, (q31_t)0x802f375d, (q31_t)0x6d82c32, (q31_t)0x802ee133, (q31_t)0x6d1e5fe, (q31_t)0x802e8b58, (q31_t)0x6cb9fc6, (q31_t)0x802e35cb,
+  (q31_t)0x6c5598a, (q31_t)0x802de08e, (q31_t)0x6bf1349, (q31_t)0x802d8ba0, (q31_t)0x6b8cd05, (q31_t)0x802d3700, (q31_t)0x6b286bc, (q31_t)0x802ce2af,
+  (q31_t)0x6ac406f, (q31_t)0x802c8ead, (q31_t)0x6a5fa1e, (q31_t)0x802c3afa, (q31_t)0x69fb3c9, (q31_t)0x802be796, (q31_t)0x6996d70, (q31_t)0x802b9480,
+  (q31_t)0x6932713, (q31_t)0x802b41ba, (q31_t)0x68ce0b2, (q31_t)0x802aef42, (q31_t)0x6869a4c, (q31_t)0x802a9d19, (q31_t)0x68053e3, (q31_t)0x802a4b3f,
+  (q31_t)0x67a0d76, (q31_t)0x8029f9b4, (q31_t)0x673c704, (q31_t)0x8029a878, (q31_t)0x66d808f, (q31_t)0x8029578b, (q31_t)0x6673a16, (q31_t)0x802906ec,
+  (q31_t)0x660f398, (q31_t)0x8028b69c, (q31_t)0x65aad17, (q31_t)0x8028669b, (q31_t)0x6546692, (q31_t)0x802816e9, (q31_t)0x64e2009, (q31_t)0x8027c786,
+  (q31_t)0x647d97c, (q31_t)0x80277872, (q31_t)0x64192eb, (q31_t)0x802729ad, (q31_t)0x63b4c57, (q31_t)0x8026db36, (q31_t)0x63505be, (q31_t)0x80268d0e,
+  (q31_t)0x62ebf22, (q31_t)0x80263f36, (q31_t)0x6287882, (q31_t)0x8025f1ac, (q31_t)0x62231de, (q31_t)0x8025a471, (q31_t)0x61beb36, (q31_t)0x80255784,
+  (q31_t)0x615a48b, (q31_t)0x80250ae7, (q31_t)0x60f5ddc, (q31_t)0x8024be99, (q31_t)0x6091729, (q31_t)0x80247299, (q31_t)0x602d072, (q31_t)0x802426e8,
+  (q31_t)0x5fc89b8, (q31_t)0x8023db86, (q31_t)0x5f642fa, (q31_t)0x80239073, (q31_t)0x5effc38, (q31_t)0x802345af, (q31_t)0x5e9b572, (q31_t)0x8022fb3a,
+  (q31_t)0x5e36ea9, (q31_t)0x8022b114, (q31_t)0x5dd27dd, (q31_t)0x8022673c, (q31_t)0x5d6e10c, (q31_t)0x80221db3, (q31_t)0x5d09a38, (q31_t)0x8021d47a,
+  (q31_t)0x5ca5361, (q31_t)0x80218b8f, (q31_t)0x5c40c86, (q31_t)0x802142f3, (q31_t)0x5bdc5a7, (q31_t)0x8020faa6, (q31_t)0x5b77ec5, (q31_t)0x8020b2a7,
+  (q31_t)0x5b137df, (q31_t)0x80206af8, (q31_t)0x5aaf0f6, (q31_t)0x80202397, (q31_t)0x5a4aa09, (q31_t)0x801fdc86, (q31_t)0x59e6319, (q31_t)0x801f95c3,
+  (q31_t)0x5981c26, (q31_t)0x801f4f4f, (q31_t)0x591d52f, (q31_t)0x801f092a, (q31_t)0x58b8e34, (q31_t)0x801ec354, (q31_t)0x5854736, (q31_t)0x801e7dcd,
+  (q31_t)0x57f0035, (q31_t)0x801e3895, (q31_t)0x578b930, (q31_t)0x801df3ab, (q31_t)0x5727228, (q31_t)0x801daf11, (q31_t)0x56c2b1c, (q31_t)0x801d6ac5,
+  (q31_t)0x565e40d, (q31_t)0x801d26c8, (q31_t)0x55f9cfb, (q31_t)0x801ce31a, (q31_t)0x55955e6, (q31_t)0x801c9fbb, (q31_t)0x5530ecd, (q31_t)0x801c5cab,
+  (q31_t)0x54cc7b1, (q31_t)0x801c19ea, (q31_t)0x5468092, (q31_t)0x801bd777, (q31_t)0x540396f, (q31_t)0x801b9554, (q31_t)0x539f249, (q31_t)0x801b537f,
+  (q31_t)0x533ab20, (q31_t)0x801b11fa, (q31_t)0x52d63f4, (q31_t)0x801ad0c3, (q31_t)0x5271cc4, (q31_t)0x801a8fdb, (q31_t)0x520d592, (q31_t)0x801a4f42,
+  (q31_t)0x51a8e5c, (q31_t)0x801a0ef8, (q31_t)0x5144723, (q31_t)0x8019cefd, (q31_t)0x50dffe7, (q31_t)0x80198f50, (q31_t)0x507b8a8, (q31_t)0x80194ff3,
+  (q31_t)0x5017165, (q31_t)0x801910e4, (q31_t)0x4fb2a20, (q31_t)0x8018d225, (q31_t)0x4f4e2d8, (q31_t)0x801893b4, (q31_t)0x4ee9b8c, (q31_t)0x80185592,
+  (q31_t)0x4e8543e, (q31_t)0x801817bf, (q31_t)0x4e20cec, (q31_t)0x8017da3b, (q31_t)0x4dbc597, (q31_t)0x80179d06, (q31_t)0x4d57e40, (q31_t)0x80176020,
+  (q31_t)0x4cf36e5, (q31_t)0x80172388, (q31_t)0x4c8ef88, (q31_t)0x8016e740, (q31_t)0x4c2a827, (q31_t)0x8016ab46, (q31_t)0x4bc60c4, (q31_t)0x80166f9c,
+  (q31_t)0x4b6195d, (q31_t)0x80163440, (q31_t)0x4afd1f4, (q31_t)0x8015f933, (q31_t)0x4a98a88, (q31_t)0x8015be75, (q31_t)0x4a34319, (q31_t)0x80158406,
+  (q31_t)0x49cfba7, (q31_t)0x801549e6, (q31_t)0x496b432, (q31_t)0x80151015, (q31_t)0x4906cbb, (q31_t)0x8014d693, (q31_t)0x48a2540, (q31_t)0x80149d5f,
+  (q31_t)0x483ddc3, (q31_t)0x8014647b, (q31_t)0x47d9643, (q31_t)0x80142be5, (q31_t)0x4774ec1, (q31_t)0x8013f39e, (q31_t)0x471073b, (q31_t)0x8013bba7,
+  (q31_t)0x46abfb3, (q31_t)0x801383fe, (q31_t)0x4647828, (q31_t)0x80134ca4, (q31_t)0x45e309a, (q31_t)0x80131599, (q31_t)0x457e90a, (q31_t)0x8012dedd,
+  (q31_t)0x451a177, (q31_t)0x8012a86f, (q31_t)0x44b59e1, (q31_t)0x80127251, (q31_t)0x4451249, (q31_t)0x80123c82, (q31_t)0x43ecaae, (q31_t)0x80120701,
+  (q31_t)0x4388310, (q31_t)0x8011d1d0, (q31_t)0x4323b70, (q31_t)0x80119ced, (q31_t)0x42bf3cd, (q31_t)0x80116859, (q31_t)0x425ac28, (q31_t)0x80113414,
+  (q31_t)0x41f6480, (q31_t)0x8011001f, (q31_t)0x4191cd5, (q31_t)0x8010cc78, (q31_t)0x412d528, (q31_t)0x8010991f, (q31_t)0x40c8d79, (q31_t)0x80106616,
+  (q31_t)0x40645c7, (q31_t)0x8010335c, (q31_t)0x3fffe12, (q31_t)0x801000f1, (q31_t)0x3f9b65b, (q31_t)0x800fced4, (q31_t)0x3f36ea2, (q31_t)0x800f9d07,
+  (q31_t)0x3ed26e6, (q31_t)0x800f6b88, (q31_t)0x3e6df28, (q31_t)0x800f3a59, (q31_t)0x3e09767, (q31_t)0x800f0978, (q31_t)0x3da4fa4, (q31_t)0x800ed8e6,
+  (q31_t)0x3d407df, (q31_t)0x800ea8a3, (q31_t)0x3cdc017, (q31_t)0x800e78af, (q31_t)0x3c7784d, (q31_t)0x800e490a, (q31_t)0x3c13080, (q31_t)0x800e19b4,
+  (q31_t)0x3bae8b2, (q31_t)0x800deaad, (q31_t)0x3b4a0e0, (q31_t)0x800dbbf5, (q31_t)0x3ae590d, (q31_t)0x800d8d8b, (q31_t)0x3a81137, (q31_t)0x800d5f71,
+  (q31_t)0x3a1c960, (q31_t)0x800d31a5, (q31_t)0x39b8185, (q31_t)0x800d0429, (q31_t)0x39539a9, (q31_t)0x800cd6fb, (q31_t)0x38ef1ca, (q31_t)0x800caa1c,
+  (q31_t)0x388a9ea, (q31_t)0x800c7d8c, (q31_t)0x3826207, (q31_t)0x800c514c, (q31_t)0x37c1a22, (q31_t)0x800c255a, (q31_t)0x375d23a, (q31_t)0x800bf9b7,
+  (q31_t)0x36f8a51, (q31_t)0x800bce63, (q31_t)0x3694265, (q31_t)0x800ba35d, (q31_t)0x362fa78, (q31_t)0x800b78a7, (q31_t)0x35cb288, (q31_t)0x800b4e40,
+  (q31_t)0x3566a96, (q31_t)0x800b2427, (q31_t)0x35022a2, (q31_t)0x800afa5e, (q31_t)0x349daac, (q31_t)0x800ad0e3, (q31_t)0x34392b4, (q31_t)0x800aa7b8,
+  (q31_t)0x33d4abb, (q31_t)0x800a7edb, (q31_t)0x33702bf, (q31_t)0x800a564e, (q31_t)0x330bac1, (q31_t)0x800a2e0f, (q31_t)0x32a72c1, (q31_t)0x800a061f,
+  (q31_t)0x3242abf, (q31_t)0x8009de7e, (q31_t)0x31de2bb, (q31_t)0x8009b72c, (q31_t)0x3179ab5, (q31_t)0x80099029, (q31_t)0x31152ae, (q31_t)0x80096975,
+  (q31_t)0x30b0aa4, (q31_t)0x80094310, (q31_t)0x304c299, (q31_t)0x80091cf9, (q31_t)0x2fe7a8c, (q31_t)0x8008f732, (q31_t)0x2f8327d, (q31_t)0x8008d1ba,
+  (q31_t)0x2f1ea6c, (q31_t)0x8008ac90, (q31_t)0x2eba259, (q31_t)0x800887b6, (q31_t)0x2e55a44, (q31_t)0x8008632a, (q31_t)0x2df122e, (q31_t)0x80083eed,
+  (q31_t)0x2d8ca16, (q31_t)0x80081b00, (q31_t)0x2d281fc, (q31_t)0x8007f761, (q31_t)0x2cc39e1, (q31_t)0x8007d411, (q31_t)0x2c5f1c3, (q31_t)0x8007b110,
+  (q31_t)0x2bfa9a4, (q31_t)0x80078e5e, (q31_t)0x2b96184, (q31_t)0x80076bfb, (q31_t)0x2b31961, (q31_t)0x800749e7, (q31_t)0x2acd13d, (q31_t)0x80072822,
+  (q31_t)0x2a68917, (q31_t)0x800706ac, (q31_t)0x2a040f0, (q31_t)0x8006e585, (q31_t)0x299f8c7, (q31_t)0x8006c4ac, (q31_t)0x293b09c, (q31_t)0x8006a423,
+  (q31_t)0x28d6870, (q31_t)0x800683e8, (q31_t)0x2872043, (q31_t)0x800663fd, (q31_t)0x280d813, (q31_t)0x80064460, (q31_t)0x27a8fe2, (q31_t)0x80062513,
+  (q31_t)0x27447b0, (q31_t)0x80060614, (q31_t)0x26dff7c, (q31_t)0x8005e764, (q31_t)0x267b747, (q31_t)0x8005c904, (q31_t)0x2616f10, (q31_t)0x8005aaf2,
+  (q31_t)0x25b26d7, (q31_t)0x80058d2f, (q31_t)0x254de9e, (q31_t)0x80056fbb, (q31_t)0x24e9662, (q31_t)0x80055296, (q31_t)0x2484e26, (q31_t)0x800535c0,
+  (q31_t)0x24205e8, (q31_t)0x80051939, (q31_t)0x23bbda8, (q31_t)0x8004fd00, (q31_t)0x2357567, (q31_t)0x8004e117, (q31_t)0x22f2d25, (q31_t)0x8004c57d,
+  (q31_t)0x228e4e2, (q31_t)0x8004aa32, (q31_t)0x2229c9d, (q31_t)0x80048f35, (q31_t)0x21c5457, (q31_t)0x80047488, (q31_t)0x2160c0f, (q31_t)0x80045a29,
+  (q31_t)0x20fc3c6, (q31_t)0x8004401a, (q31_t)0x2097b7c, (q31_t)0x80042659, (q31_t)0x2033331, (q31_t)0x80040ce7, (q31_t)0x1fceae4, (q31_t)0x8003f3c5,
+  (q31_t)0x1f6a297, (q31_t)0x8003daf1, (q31_t)0x1f05a48, (q31_t)0x8003c26c, (q31_t)0x1ea11f7, (q31_t)0x8003aa36, (q31_t)0x1e3c9a6, (q31_t)0x8003924f,
+  (q31_t)0x1dd8154, (q31_t)0x80037ab7, (q31_t)0x1d73900, (q31_t)0x8003636e, (q31_t)0x1d0f0ab, (q31_t)0x80034c74, (q31_t)0x1caa855, (q31_t)0x800335c9,
+  (q31_t)0x1c45ffe, (q31_t)0x80031f6d, (q31_t)0x1be17a6, (q31_t)0x80030960, (q31_t)0x1b7cf4d, (q31_t)0x8002f3a1, (q31_t)0x1b186f3, (q31_t)0x8002de32,
+  (q31_t)0x1ab3e97, (q31_t)0x8002c912, (q31_t)0x1a4f63b, (q31_t)0x8002b440, (q31_t)0x19eaddd, (q31_t)0x80029fbe, (q31_t)0x198657f, (q31_t)0x80028b8a,
+  (q31_t)0x1921d20, (q31_t)0x800277a6, (q31_t)0x18bd4bf, (q31_t)0x80026410, (q31_t)0x1858c5e, (q31_t)0x800250c9, (q31_t)0x17f43fc, (q31_t)0x80023dd2,
+  (q31_t)0x178fb99, (q31_t)0x80022b29, (q31_t)0x172b335, (q31_t)0x800218cf, (q31_t)0x16c6ad0, (q31_t)0x800206c4, (q31_t)0x166226a, (q31_t)0x8001f508,
+  (q31_t)0x15fda03, (q31_t)0x8001e39b, (q31_t)0x159919c, (q31_t)0x8001d27d, (q31_t)0x1534934, (q31_t)0x8001c1ae, (q31_t)0x14d00ca, (q31_t)0x8001b12e,
+  (q31_t)0x146b860, (q31_t)0x8001a0fd, (q31_t)0x1406ff6, (q31_t)0x8001911b, (q31_t)0x13a278a, (q31_t)0x80018187, (q31_t)0x133df1e, (q31_t)0x80017243,
+  (q31_t)0x12d96b1, (q31_t)0x8001634e, (q31_t)0x1274e43, (q31_t)0x800154a7, (q31_t)0x12105d5, (q31_t)0x80014650, (q31_t)0x11abd66, (q31_t)0x80013847,
+  (q31_t)0x11474f6, (q31_t)0x80012a8e, (q31_t)0x10e2c85, (q31_t)0x80011d23, (q31_t)0x107e414, (q31_t)0x80011008, (q31_t)0x1019ba2, (q31_t)0x8001033b,
+  (q31_t)0x0fb5330, (q31_t)0x8000f6bd, (q31_t)0x0f50abd, (q31_t)0x8000ea8e, (q31_t)0x0eec249, (q31_t)0x8000deaf, (q31_t)0x0e879d5, (q31_t)0x8000d31e,
+  (q31_t)0x0e23160, (q31_t)0x8000c7dc, (q31_t)0x0dbe8eb, (q31_t)0x8000bce9, (q31_t)0x0d5a075, (q31_t)0x8000b245, (q31_t)0x0cf57ff, (q31_t)0x8000a7f0,
+  (q31_t)0x0c90f88, (q31_t)0x80009dea, (q31_t)0x0c2c711, (q31_t)0x80009433, (q31_t)0x0bc7e99, (q31_t)0x80008aca, (q31_t)0x0b63621, (q31_t)0x800081b1,
+  (q31_t)0x0afeda8, (q31_t)0x800078e7, (q31_t)0x0a9a52f, (q31_t)0x8000706c, (q31_t)0x0a35cb5, (q31_t)0x8000683f, (q31_t)0x09d143b, (q31_t)0x80006062,
+  (q31_t)0x096cbc1, (q31_t)0x800058d4, (q31_t)0x0908346, (q31_t)0x80005194, (q31_t)0x08a3acb, (q31_t)0x80004aa4, (q31_t)0x083f250, (q31_t)0x80004402,
+  (q31_t)0x07da9d4, (q31_t)0x80003daf, (q31_t)0x0776159, (q31_t)0x800037ac, (q31_t)0x07118dc, (q31_t)0x800031f7, (q31_t)0x06ad060, (q31_t)0x80002c91,
+  (q31_t)0x06487e3, (q31_t)0x8000277a, (q31_t)0x05e3f66, (q31_t)0x800022b3, (q31_t)0x057f6e9, (q31_t)0x80001e3a, (q31_t)0x051ae6b, (q31_t)0x80001a10,
+  (q31_t)0x04b65ee, (q31_t)0x80001635, (q31_t)0x0451d70, (q31_t)0x800012a9, (q31_t)0x03ed4f2, (q31_t)0x80000f6c, (q31_t)0x0388c74, (q31_t)0x80000c7e,
+  (q31_t)0x03243f5, (q31_t)0x800009df, (q31_t)0x02bfb77, (q31_t)0x8000078e, (q31_t)0x025b2f8, (q31_t)0x8000058d, (q31_t)0x01f6a7a, (q31_t)0x800003db,
+  (q31_t)0x01921fb, (q31_t)0x80000278, (q31_t)0x012d97c, (q31_t)0x80000163, (q31_t)0x00c90fe, (q31_t)0x8000009e, (q31_t)0x006487f, (q31_t)0x80000027
+};
+    const q31_t cos_factorsQ31_8192[8192] = {
+  (q31_t)0x7ffffff6, (q31_t)0x7fffffa7, (q31_t)0x7fffff09, (q31_t)0x7ffffe1c, (q31_t)0x7ffffce1, (q31_t)0x7ffffb56, (q31_t)0x7ffff97c, (q31_t)0x7ffff753,
+  (q31_t)0x7ffff4dc, (q31_t)0x7ffff215, (q31_t)0x7fffef00, (q31_t)0x7fffeb9b, (q31_t)0x7fffe7e8, (q31_t)0x7fffe3e5, (q31_t)0x7fffdf94, (q31_t)0x7fffdaf3,
+  (q31_t)0x7fffd604, (q31_t)0x7fffd0c6, (q31_t)0x7fffcb39, (q31_t)0x7fffc55c, (q31_t)0x7fffbf31, (q31_t)0x7fffb8b7, (q31_t)0x7fffb1ee, (q31_t)0x7fffaad6,
+  (q31_t)0x7fffa36f, (q31_t)0x7fff9bb9, (q31_t)0x7fff93b4, (q31_t)0x7fff8b61, (q31_t)0x7fff82be, (q31_t)0x7fff79cc, (q31_t)0x7fff708b, (q31_t)0x7fff66fc,
+  (q31_t)0x7fff5d1d, (q31_t)0x7fff52ef, (q31_t)0x7fff4873, (q31_t)0x7fff3da8, (q31_t)0x7fff328d, (q31_t)0x7fff2724, (q31_t)0x7fff1b6b, (q31_t)0x7fff0f64,
+  (q31_t)0x7fff030e, (q31_t)0x7ffef669, (q31_t)0x7ffee975, (q31_t)0x7ffedc31, (q31_t)0x7ffece9f, (q31_t)0x7ffec0be, (q31_t)0x7ffeb28e, (q31_t)0x7ffea40f,
+  (q31_t)0x7ffe9542, (q31_t)0x7ffe8625, (q31_t)0x7ffe76b9, (q31_t)0x7ffe66fe, (q31_t)0x7ffe56f5, (q31_t)0x7ffe469c, (q31_t)0x7ffe35f4, (q31_t)0x7ffe24fe,
+  (q31_t)0x7ffe13b8, (q31_t)0x7ffe0224, (q31_t)0x7ffdf040, (q31_t)0x7ffdde0e, (q31_t)0x7ffdcb8d, (q31_t)0x7ffdb8bc, (q31_t)0x7ffda59d, (q31_t)0x7ffd922f,
+  (q31_t)0x7ffd7e72, (q31_t)0x7ffd6a66, (q31_t)0x7ffd560b, (q31_t)0x7ffd4161, (q31_t)0x7ffd2c68, (q31_t)0x7ffd1720, (q31_t)0x7ffd0189, (q31_t)0x7ffceba4,
+  (q31_t)0x7ffcd56f, (q31_t)0x7ffcbeeb, (q31_t)0x7ffca819, (q31_t)0x7ffc90f7, (q31_t)0x7ffc7987, (q31_t)0x7ffc61c7, (q31_t)0x7ffc49b9, (q31_t)0x7ffc315b,
+  (q31_t)0x7ffc18af, (q31_t)0x7ffbffb4, (q31_t)0x7ffbe66a, (q31_t)0x7ffbccd0, (q31_t)0x7ffbb2e8, (q31_t)0x7ffb98b1, (q31_t)0x7ffb7e2b, (q31_t)0x7ffb6356,
+  (q31_t)0x7ffb4833, (q31_t)0x7ffb2cc0, (q31_t)0x7ffb10fe, (q31_t)0x7ffaf4ed, (q31_t)0x7ffad88e, (q31_t)0x7ffabbdf, (q31_t)0x7ffa9ee2, (q31_t)0x7ffa8195,
+  (q31_t)0x7ffa63fa, (q31_t)0x7ffa460f, (q31_t)0x7ffa27d6, (q31_t)0x7ffa094e, (q31_t)0x7ff9ea76, (q31_t)0x7ff9cb50, (q31_t)0x7ff9abdb, (q31_t)0x7ff98c17,
+  (q31_t)0x7ff96c04, (q31_t)0x7ff94ba2, (q31_t)0x7ff92af1, (q31_t)0x7ff909f2, (q31_t)0x7ff8e8a3, (q31_t)0x7ff8c705, (q31_t)0x7ff8a519, (q31_t)0x7ff882dd,
+  (q31_t)0x7ff86053, (q31_t)0x7ff83d79, (q31_t)0x7ff81a51, (q31_t)0x7ff7f6da, (q31_t)0x7ff7d313, (q31_t)0x7ff7aefe, (q31_t)0x7ff78a9a, (q31_t)0x7ff765e7,
+  (q31_t)0x7ff740e5, (q31_t)0x7ff71b94, (q31_t)0x7ff6f5f4, (q31_t)0x7ff6d005, (q31_t)0x7ff6a9c8, (q31_t)0x7ff6833b, (q31_t)0x7ff65c5f, (q31_t)0x7ff63535,
+  (q31_t)0x7ff60dbb, (q31_t)0x7ff5e5f3, (q31_t)0x7ff5bddc, (q31_t)0x7ff59576, (q31_t)0x7ff56cc0, (q31_t)0x7ff543bc, (q31_t)0x7ff51a69, (q31_t)0x7ff4f0c7,
+  (q31_t)0x7ff4c6d6, (q31_t)0x7ff49c96, (q31_t)0x7ff47208, (q31_t)0x7ff4472a, (q31_t)0x7ff41bfd, (q31_t)0x7ff3f082, (q31_t)0x7ff3c4b7, (q31_t)0x7ff3989e,
+  (q31_t)0x7ff36c36, (q31_t)0x7ff33f7e, (q31_t)0x7ff31278, (q31_t)0x7ff2e523, (q31_t)0x7ff2b77f, (q31_t)0x7ff2898c, (q31_t)0x7ff25b4a, (q31_t)0x7ff22cb9,
+  (q31_t)0x7ff1fdd9, (q31_t)0x7ff1ceab, (q31_t)0x7ff19f2d, (q31_t)0x7ff16f61, (q31_t)0x7ff13f45, (q31_t)0x7ff10edb, (q31_t)0x7ff0de22, (q31_t)0x7ff0ad19,
+  (q31_t)0x7ff07bc2, (q31_t)0x7ff04a1c, (q31_t)0x7ff01827, (q31_t)0x7fefe5e4, (q31_t)0x7fefb351, (q31_t)0x7fef806f, (q31_t)0x7fef4d3e, (q31_t)0x7fef19bf,
+  (q31_t)0x7feee5f0, (q31_t)0x7feeb1d3, (q31_t)0x7fee7d67, (q31_t)0x7fee48ac, (q31_t)0x7fee13a1, (q31_t)0x7fedde48, (q31_t)0x7feda8a0, (q31_t)0x7fed72aa,
+  (q31_t)0x7fed3c64, (q31_t)0x7fed05cf, (q31_t)0x7fecceec, (q31_t)0x7fec97b9, (q31_t)0x7fec6038, (q31_t)0x7fec2867, (q31_t)0x7febf048, (q31_t)0x7febb7da,
+  (q31_t)0x7feb7f1d, (q31_t)0x7feb4611, (q31_t)0x7feb0cb6, (q31_t)0x7fead30c, (q31_t)0x7fea9914, (q31_t)0x7fea5ecc, (q31_t)0x7fea2436, (q31_t)0x7fe9e950,
+  (q31_t)0x7fe9ae1c, (q31_t)0x7fe97299, (q31_t)0x7fe936c7, (q31_t)0x7fe8faa6, (q31_t)0x7fe8be36, (q31_t)0x7fe88177, (q31_t)0x7fe84469, (q31_t)0x7fe8070d,
+  (q31_t)0x7fe7c961, (q31_t)0x7fe78b67, (q31_t)0x7fe74d1e, (q31_t)0x7fe70e85, (q31_t)0x7fe6cf9e, (q31_t)0x7fe69068, (q31_t)0x7fe650e3, (q31_t)0x7fe61110,
+  (q31_t)0x7fe5d0ed, (q31_t)0x7fe5907b, (q31_t)0x7fe54fbb, (q31_t)0x7fe50eac, (q31_t)0x7fe4cd4d, (q31_t)0x7fe48ba0, (q31_t)0x7fe449a4, (q31_t)0x7fe40759,
+  (q31_t)0x7fe3c4bf, (q31_t)0x7fe381d7, (q31_t)0x7fe33e9f, (q31_t)0x7fe2fb19, (q31_t)0x7fe2b743, (q31_t)0x7fe2731f, (q31_t)0x7fe22eac, (q31_t)0x7fe1e9ea,
+  (q31_t)0x7fe1a4d9, (q31_t)0x7fe15f79, (q31_t)0x7fe119cb, (q31_t)0x7fe0d3cd, (q31_t)0x7fe08d81, (q31_t)0x7fe046e5, (q31_t)0x7fdffffb, (q31_t)0x7fdfb8c2,
+  (q31_t)0x7fdf713a, (q31_t)0x7fdf2963, (q31_t)0x7fdee13e, (q31_t)0x7fde98c9, (q31_t)0x7fde5006, (q31_t)0x7fde06f3, (q31_t)0x7fddbd92, (q31_t)0x7fdd73e2,
+  (q31_t)0x7fdd29e3, (q31_t)0x7fdcdf95, (q31_t)0x7fdc94f9, (q31_t)0x7fdc4a0d, (q31_t)0x7fdbfed3, (q31_t)0x7fdbb349, (q31_t)0x7fdb6771, (q31_t)0x7fdb1b4a,
+  (q31_t)0x7fdaced4, (q31_t)0x7fda820f, (q31_t)0x7fda34fc, (q31_t)0x7fd9e799, (q31_t)0x7fd999e8, (q31_t)0x7fd94be8, (q31_t)0x7fd8fd98, (q31_t)0x7fd8aefa,
+  (q31_t)0x7fd8600e, (q31_t)0x7fd810d2, (q31_t)0x7fd7c147, (q31_t)0x7fd7716e, (q31_t)0x7fd72146, (q31_t)0x7fd6d0cf, (q31_t)0x7fd68009, (q31_t)0x7fd62ef4,
+  (q31_t)0x7fd5dd90, (q31_t)0x7fd58bdd, (q31_t)0x7fd539dc, (q31_t)0x7fd4e78c, (q31_t)0x7fd494ed, (q31_t)0x7fd441ff, (q31_t)0x7fd3eec2, (q31_t)0x7fd39b36,
+  (q31_t)0x7fd3475c, (q31_t)0x7fd2f332, (q31_t)0x7fd29eba, (q31_t)0x7fd249f3, (q31_t)0x7fd1f4dd, (q31_t)0x7fd19f78, (q31_t)0x7fd149c5, (q31_t)0x7fd0f3c2,
+  (q31_t)0x7fd09d71, (q31_t)0x7fd046d1, (q31_t)0x7fcfefe2, (q31_t)0x7fcf98a4, (q31_t)0x7fcf4117, (q31_t)0x7fcee93c, (q31_t)0x7fce9112, (q31_t)0x7fce3898,
+  (q31_t)0x7fcddfd0, (q31_t)0x7fcd86b9, (q31_t)0x7fcd2d54, (q31_t)0x7fccd39f, (q31_t)0x7fcc799c, (q31_t)0x7fcc1f4a, (q31_t)0x7fcbc4a9, (q31_t)0x7fcb69b9,
+  (q31_t)0x7fcb0e7a, (q31_t)0x7fcab2ed, (q31_t)0x7fca5710, (q31_t)0x7fc9fae5, (q31_t)0x7fc99e6b, (q31_t)0x7fc941a2, (q31_t)0x7fc8e48b, (q31_t)0x7fc88724,
+  (q31_t)0x7fc8296f, (q31_t)0x7fc7cb6b, (q31_t)0x7fc76d18, (q31_t)0x7fc70e76, (q31_t)0x7fc6af86, (q31_t)0x7fc65046, (q31_t)0x7fc5f0b8, (q31_t)0x7fc590db,
+  (q31_t)0x7fc530af, (q31_t)0x7fc4d035, (q31_t)0x7fc46f6b, (q31_t)0x7fc40e53, (q31_t)0x7fc3acec, (q31_t)0x7fc34b36, (q31_t)0x7fc2e931, (q31_t)0x7fc286de,
+  (q31_t)0x7fc2243b, (q31_t)0x7fc1c14a, (q31_t)0x7fc15e0a, (q31_t)0x7fc0fa7b, (q31_t)0x7fc0969e, (q31_t)0x7fc03271, (q31_t)0x7fbfcdf6, (q31_t)0x7fbf692c,
+  (q31_t)0x7fbf0414, (q31_t)0x7fbe9eac, (q31_t)0x7fbe38f6, (q31_t)0x7fbdd2f0, (q31_t)0x7fbd6c9c, (q31_t)0x7fbd05fa, (q31_t)0x7fbc9f08, (q31_t)0x7fbc37c8,
+  (q31_t)0x7fbbd039, (q31_t)0x7fbb685b, (q31_t)0x7fbb002e, (q31_t)0x7fba97b2, (q31_t)0x7fba2ee8, (q31_t)0x7fb9c5cf, (q31_t)0x7fb95c67, (q31_t)0x7fb8f2b0,
+  (q31_t)0x7fb888ab, (q31_t)0x7fb81e57, (q31_t)0x7fb7b3b4, (q31_t)0x7fb748c2, (q31_t)0x7fb6dd81, (q31_t)0x7fb671f2, (q31_t)0x7fb60614, (q31_t)0x7fb599e7,
+  (q31_t)0x7fb52d6b, (q31_t)0x7fb4c0a1, (q31_t)0x7fb45387, (q31_t)0x7fb3e61f, (q31_t)0x7fb37869, (q31_t)0x7fb30a63, (q31_t)0x7fb29c0f, (q31_t)0x7fb22d6c,
+  (q31_t)0x7fb1be7a, (q31_t)0x7fb14f39, (q31_t)0x7fb0dfaa, (q31_t)0x7fb06fcb, (q31_t)0x7fafff9e, (q31_t)0x7faf8f23, (q31_t)0x7faf1e58, (q31_t)0x7faead3f,
+  (q31_t)0x7fae3bd7, (q31_t)0x7fadca20, (q31_t)0x7fad581b, (q31_t)0x7face5c6, (q31_t)0x7fac7323, (q31_t)0x7fac0031, (q31_t)0x7fab8cf1, (q31_t)0x7fab1962,
+  (q31_t)0x7faaa584, (q31_t)0x7faa3157, (q31_t)0x7fa9bcdb, (q31_t)0x7fa94811, (q31_t)0x7fa8d2f8, (q31_t)0x7fa85d90, (q31_t)0x7fa7e7d9, (q31_t)0x7fa771d4,
+  (q31_t)0x7fa6fb80, (q31_t)0x7fa684dd, (q31_t)0x7fa60dec, (q31_t)0x7fa596ac, (q31_t)0x7fa51f1d, (q31_t)0x7fa4a73f, (q31_t)0x7fa42f12, (q31_t)0x7fa3b697,
+  (q31_t)0x7fa33dcd, (q31_t)0x7fa2c4b5, (q31_t)0x7fa24b4d, (q31_t)0x7fa1d197, (q31_t)0x7fa15792, (q31_t)0x7fa0dd3f, (q31_t)0x7fa0629c, (q31_t)0x7f9fe7ab,
+  (q31_t)0x7f9f6c6b, (q31_t)0x7f9ef0dd, (q31_t)0x7f9e7500, (q31_t)0x7f9df8d4, (q31_t)0x7f9d7c59, (q31_t)0x7f9cff90, (q31_t)0x7f9c8278, (q31_t)0x7f9c0511,
+  (q31_t)0x7f9b875b, (q31_t)0x7f9b0957, (q31_t)0x7f9a8b04, (q31_t)0x7f9a0c62, (q31_t)0x7f998d72, (q31_t)0x7f990e33, (q31_t)0x7f988ea5, (q31_t)0x7f980ec8,
+  (q31_t)0x7f978e9d, (q31_t)0x7f970e23, (q31_t)0x7f968d5b, (q31_t)0x7f960c43, (q31_t)0x7f958add, (q31_t)0x7f950929, (q31_t)0x7f948725, (q31_t)0x7f9404d3,
+  (q31_t)0x7f938232, (q31_t)0x7f92ff43, (q31_t)0x7f927c04, (q31_t)0x7f91f878, (q31_t)0x7f91749c, (q31_t)0x7f90f072, (q31_t)0x7f906bf9, (q31_t)0x7f8fe731,
+  (q31_t)0x7f8f621b, (q31_t)0x7f8edcb6, (q31_t)0x7f8e5702, (q31_t)0x7f8dd0ff, (q31_t)0x7f8d4aae, (q31_t)0x7f8cc40f, (q31_t)0x7f8c3d20, (q31_t)0x7f8bb5e3,
+  (q31_t)0x7f8b2e57, (q31_t)0x7f8aa67d, (q31_t)0x7f8a1e54, (q31_t)0x7f8995dc, (q31_t)0x7f890d15, (q31_t)0x7f888400, (q31_t)0x7f87fa9c, (q31_t)0x7f8770ea,
+  (q31_t)0x7f86e6e9, (q31_t)0x7f865c99, (q31_t)0x7f85d1fa, (q31_t)0x7f85470d, (q31_t)0x7f84bbd1, (q31_t)0x7f843047, (q31_t)0x7f83a46e, (q31_t)0x7f831846,
+  (q31_t)0x7f828bcf, (q31_t)0x7f81ff0a, (q31_t)0x7f8171f6, (q31_t)0x7f80e494, (q31_t)0x7f8056e3, (q31_t)0x7f7fc8e3, (q31_t)0x7f7f3a95, (q31_t)0x7f7eabf8,
+  (q31_t)0x7f7e1d0c, (q31_t)0x7f7d8dd2, (q31_t)0x7f7cfe49, (q31_t)0x7f7c6e71, (q31_t)0x7f7bde4b, (q31_t)0x7f7b4dd6, (q31_t)0x7f7abd13, (q31_t)0x7f7a2c01,
+  (q31_t)0x7f799aa0, (q31_t)0x7f7908f0, (q31_t)0x7f7876f2, (q31_t)0x7f77e4a6, (q31_t)0x7f77520a, (q31_t)0x7f76bf21, (q31_t)0x7f762be8, (q31_t)0x7f759861,
+  (q31_t)0x7f75048b, (q31_t)0x7f747067, (q31_t)0x7f73dbf4, (q31_t)0x7f734732, (q31_t)0x7f72b222, (q31_t)0x7f721cc3, (q31_t)0x7f718715, (q31_t)0x7f70f119,
+  (q31_t)0x7f705ace, (q31_t)0x7f6fc435, (q31_t)0x7f6f2d4d, (q31_t)0x7f6e9617, (q31_t)0x7f6dfe91, (q31_t)0x7f6d66be, (q31_t)0x7f6cce9b, (q31_t)0x7f6c362a,
+  (q31_t)0x7f6b9d6b, (q31_t)0x7f6b045d, (q31_t)0x7f6a6b00, (q31_t)0x7f69d154, (q31_t)0x7f69375a, (q31_t)0x7f689d12, (q31_t)0x7f68027b, (q31_t)0x7f676795,
+  (q31_t)0x7f66cc61, (q31_t)0x7f6630de, (q31_t)0x7f65950c, (q31_t)0x7f64f8ec, (q31_t)0x7f645c7d, (q31_t)0x7f63bfc0, (q31_t)0x7f6322b4, (q31_t)0x7f62855a,
+  (q31_t)0x7f61e7b1, (q31_t)0x7f6149b9, (q31_t)0x7f60ab73, (q31_t)0x7f600cdf, (q31_t)0x7f5f6dfb, (q31_t)0x7f5ecec9, (q31_t)0x7f5e2f49, (q31_t)0x7f5d8f7a,
+  (q31_t)0x7f5cef5c, (q31_t)0x7f5c4ef0, (q31_t)0x7f5bae36, (q31_t)0x7f5b0d2c, (q31_t)0x7f5a6bd5, (q31_t)0x7f59ca2e, (q31_t)0x7f592839, (q31_t)0x7f5885f6,
+  (q31_t)0x7f57e364, (q31_t)0x7f574083, (q31_t)0x7f569d54, (q31_t)0x7f55f9d6, (q31_t)0x7f55560a, (q31_t)0x7f54b1ef, (q31_t)0x7f540d86, (q31_t)0x7f5368ce,
+  (q31_t)0x7f52c3c8, (q31_t)0x7f521e73, (q31_t)0x7f5178cf, (q31_t)0x7f50d2dd, (q31_t)0x7f502c9d, (q31_t)0x7f4f860e, (q31_t)0x7f4edf30, (q31_t)0x7f4e3804,
+  (q31_t)0x7f4d9089, (q31_t)0x7f4ce8c0, (q31_t)0x7f4c40a8, (q31_t)0x7f4b9842, (q31_t)0x7f4aef8d, (q31_t)0x7f4a468a, (q31_t)0x7f499d38, (q31_t)0x7f48f398,
+  (q31_t)0x7f4849a9, (q31_t)0x7f479f6c, (q31_t)0x7f46f4e0, (q31_t)0x7f464a06, (q31_t)0x7f459edd, (q31_t)0x7f44f365, (q31_t)0x7f44479f, (q31_t)0x7f439b8b,
+  (q31_t)0x7f42ef28, (q31_t)0x7f424277, (q31_t)0x7f419577, (q31_t)0x7f40e828, (q31_t)0x7f403a8b, (q31_t)0x7f3f8ca0, (q31_t)0x7f3ede66, (q31_t)0x7f3e2fde,
+  (q31_t)0x7f3d8107, (q31_t)0x7f3cd1e2, (q31_t)0x7f3c226e, (q31_t)0x7f3b72ab, (q31_t)0x7f3ac29b, (q31_t)0x7f3a123b, (q31_t)0x7f39618e, (q31_t)0x7f38b091,
+  (q31_t)0x7f37ff47, (q31_t)0x7f374dad, (q31_t)0x7f369bc6, (q31_t)0x7f35e990, (q31_t)0x7f35370b, (q31_t)0x7f348438, (q31_t)0x7f33d116, (q31_t)0x7f331da6,
+  (q31_t)0x7f3269e8, (q31_t)0x7f31b5db, (q31_t)0x7f31017f, (q31_t)0x7f304cd6, (q31_t)0x7f2f97dd, (q31_t)0x7f2ee296, (q31_t)0x7f2e2d01, (q31_t)0x7f2d771e,
+  (q31_t)0x7f2cc0eb, (q31_t)0x7f2c0a6b, (q31_t)0x7f2b539c, (q31_t)0x7f2a9c7e, (q31_t)0x7f29e512, (q31_t)0x7f292d58, (q31_t)0x7f28754f, (q31_t)0x7f27bcf8,
+  (q31_t)0x7f270452, (q31_t)0x7f264b5e, (q31_t)0x7f25921c, (q31_t)0x7f24d88b, (q31_t)0x7f241eab, (q31_t)0x7f23647e, (q31_t)0x7f22aa01, (q31_t)0x7f21ef37,
+  (q31_t)0x7f21341e, (q31_t)0x7f2078b6, (q31_t)0x7f1fbd00, (q31_t)0x7f1f00fc, (q31_t)0x7f1e44a9, (q31_t)0x7f1d8808, (q31_t)0x7f1ccb18, (q31_t)0x7f1c0dda,
+  (q31_t)0x7f1b504e, (q31_t)0x7f1a9273, (q31_t)0x7f19d44a, (q31_t)0x7f1915d2, (q31_t)0x7f18570c, (q31_t)0x7f1797f8, (q31_t)0x7f16d895, (q31_t)0x7f1618e4,
+  (q31_t)0x7f1558e4, (q31_t)0x7f149896, (q31_t)0x7f13d7fa, (q31_t)0x7f13170f, (q31_t)0x7f1255d6, (q31_t)0x7f11944f, (q31_t)0x7f10d279, (q31_t)0x7f101054,
+  (q31_t)0x7f0f4de2, (q31_t)0x7f0e8b21, (q31_t)0x7f0dc811, (q31_t)0x7f0d04b3, (q31_t)0x7f0c4107, (q31_t)0x7f0b7d0d, (q31_t)0x7f0ab8c4, (q31_t)0x7f09f42d,
+  (q31_t)0x7f092f47, (q31_t)0x7f086a13, (q31_t)0x7f07a491, (q31_t)0x7f06dec0, (q31_t)0x7f0618a1, (q31_t)0x7f055233, (q31_t)0x7f048b78, (q31_t)0x7f03c46d,
+  (q31_t)0x7f02fd15, (q31_t)0x7f02356e, (q31_t)0x7f016d79, (q31_t)0x7f00a535, (q31_t)0x7effdca4, (q31_t)0x7eff13c3, (q31_t)0x7efe4a95, (q31_t)0x7efd8118,
+  (q31_t)0x7efcb74d, (q31_t)0x7efbed33, (q31_t)0x7efb22cb, (q31_t)0x7efa5815, (q31_t)0x7ef98d11, (q31_t)0x7ef8c1be, (q31_t)0x7ef7f61d, (q31_t)0x7ef72a2d,
+  (q31_t)0x7ef65def, (q31_t)0x7ef59163, (q31_t)0x7ef4c489, (q31_t)0x7ef3f760, (q31_t)0x7ef329e9, (q31_t)0x7ef25c24, (q31_t)0x7ef18e10, (q31_t)0x7ef0bfae,
+  (q31_t)0x7eeff0fe, (q31_t)0x7eef21ff, (q31_t)0x7eee52b2, (q31_t)0x7eed8317, (q31_t)0x7eecb32d, (q31_t)0x7eebe2f6, (q31_t)0x7eeb1270, (q31_t)0x7eea419b,
+  (q31_t)0x7ee97079, (q31_t)0x7ee89f08, (q31_t)0x7ee7cd49, (q31_t)0x7ee6fb3b, (q31_t)0x7ee628df, (q31_t)0x7ee55635, (q31_t)0x7ee4833d, (q31_t)0x7ee3aff6,
+  (q31_t)0x7ee2dc61, (q31_t)0x7ee2087e, (q31_t)0x7ee1344d, (q31_t)0x7ee05fcd, (q31_t)0x7edf8aff, (q31_t)0x7edeb5e3, (q31_t)0x7edde079, (q31_t)0x7edd0ac0,
+  (q31_t)0x7edc34b9, (q31_t)0x7edb5e64, (q31_t)0x7eda87c0, (q31_t)0x7ed9b0ce, (q31_t)0x7ed8d98e, (q31_t)0x7ed80200, (q31_t)0x7ed72a24, (q31_t)0x7ed651f9,
+  (q31_t)0x7ed57980, (q31_t)0x7ed4a0b9, (q31_t)0x7ed3c7a3, (q31_t)0x7ed2ee40, (q31_t)0x7ed2148e, (q31_t)0x7ed13a8e, (q31_t)0x7ed0603f, (q31_t)0x7ecf85a3,
+  (q31_t)0x7eceaab8, (q31_t)0x7ecdcf7f, (q31_t)0x7eccf3f8, (q31_t)0x7ecc1822, (q31_t)0x7ecb3bff, (q31_t)0x7eca5f8d, (q31_t)0x7ec982cd, (q31_t)0x7ec8a5bf,
+  (q31_t)0x7ec7c862, (q31_t)0x7ec6eab7, (q31_t)0x7ec60cbe, (q31_t)0x7ec52e77, (q31_t)0x7ec44fe2, (q31_t)0x7ec370fe, (q31_t)0x7ec291cd, (q31_t)0x7ec1b24d,
+  (q31_t)0x7ec0d27f, (q31_t)0x7ebff263, (q31_t)0x7ebf11f8, (q31_t)0x7ebe313f, (q31_t)0x7ebd5039, (q31_t)0x7ebc6ee4, (q31_t)0x7ebb8d40, (q31_t)0x7ebaab4f,
+  (q31_t)0x7eb9c910, (q31_t)0x7eb8e682, (q31_t)0x7eb803a6, (q31_t)0x7eb7207c, (q31_t)0x7eb63d04, (q31_t)0x7eb5593d, (q31_t)0x7eb47529, (q31_t)0x7eb390c6,
+  (q31_t)0x7eb2ac15, (q31_t)0x7eb1c716, (q31_t)0x7eb0e1c9, (q31_t)0x7eaffc2e, (q31_t)0x7eaf1645, (q31_t)0x7eae300d, (q31_t)0x7ead4987, (q31_t)0x7eac62b3,
+  (q31_t)0x7eab7b91, (q31_t)0x7eaa9421, (q31_t)0x7ea9ac63, (q31_t)0x7ea8c457, (q31_t)0x7ea7dbfc, (q31_t)0x7ea6f353, (q31_t)0x7ea60a5d, (q31_t)0x7ea52118,
+  (q31_t)0x7ea43785, (q31_t)0x7ea34da4, (q31_t)0x7ea26374, (q31_t)0x7ea178f7, (q31_t)0x7ea08e2b, (q31_t)0x7e9fa312, (q31_t)0x7e9eb7aa, (q31_t)0x7e9dcbf4,
+  (q31_t)0x7e9cdff0, (q31_t)0x7e9bf39e, (q31_t)0x7e9b06fe, (q31_t)0x7e9a1a10, (q31_t)0x7e992cd4, (q31_t)0x7e983f49, (q31_t)0x7e975171, (q31_t)0x7e96634a,
+  (q31_t)0x7e9574d6, (q31_t)0x7e948613, (q31_t)0x7e939702, (q31_t)0x7e92a7a3, (q31_t)0x7e91b7f6, (q31_t)0x7e90c7fb, (q31_t)0x7e8fd7b2, (q31_t)0x7e8ee71b,
+  (q31_t)0x7e8df636, (q31_t)0x7e8d0502, (q31_t)0x7e8c1381, (q31_t)0x7e8b21b1, (q31_t)0x7e8a2f94, (q31_t)0x7e893d28, (q31_t)0x7e884a6f, (q31_t)0x7e875767,
+  (q31_t)0x7e866411, (q31_t)0x7e85706d, (q31_t)0x7e847c7c, (q31_t)0x7e83883c, (q31_t)0x7e8293ae, (q31_t)0x7e819ed2, (q31_t)0x7e80a9a8, (q31_t)0x7e7fb430,
+  (q31_t)0x7e7ebe6a, (q31_t)0x7e7dc856, (q31_t)0x7e7cd1f4, (q31_t)0x7e7bdb44, (q31_t)0x7e7ae446, (q31_t)0x7e79ecf9, (q31_t)0x7e78f55f, (q31_t)0x7e77fd77,
+  (q31_t)0x7e770541, (q31_t)0x7e760cbd, (q31_t)0x7e7513ea, (q31_t)0x7e741aca, (q31_t)0x7e73215c, (q31_t)0x7e7227a0, (q31_t)0x7e712d96, (q31_t)0x7e70333d,
+  (q31_t)0x7e6f3897, (q31_t)0x7e6e3da3, (q31_t)0x7e6d4261, (q31_t)0x7e6c46d1, (q31_t)0x7e6b4af2, (q31_t)0x7e6a4ec6, (q31_t)0x7e69524c, (q31_t)0x7e685584,
+  (q31_t)0x7e67586e, (q31_t)0x7e665b0a, (q31_t)0x7e655d58, (q31_t)0x7e645f58, (q31_t)0x7e63610a, (q31_t)0x7e62626e, (q31_t)0x7e616384, (q31_t)0x7e60644c,
+  (q31_t)0x7e5f64c7, (q31_t)0x7e5e64f3, (q31_t)0x7e5d64d1, (q31_t)0x7e5c6461, (q31_t)0x7e5b63a4, (q31_t)0x7e5a6298, (q31_t)0x7e59613f, (q31_t)0x7e585f97,
+  (q31_t)0x7e575da2, (q31_t)0x7e565b5f, (q31_t)0x7e5558ce, (q31_t)0x7e5455ef, (q31_t)0x7e5352c1, (q31_t)0x7e524f46, (q31_t)0x7e514b7e, (q31_t)0x7e504767,
+  (q31_t)0x7e4f4302, (q31_t)0x7e4e3e4f, (q31_t)0x7e4d394f, (q31_t)0x7e4c3400, (q31_t)0x7e4b2e64, (q31_t)0x7e4a287a, (q31_t)0x7e492241, (q31_t)0x7e481bbb,
+  (q31_t)0x7e4714e7, (q31_t)0x7e460dc5, (q31_t)0x7e450656, (q31_t)0x7e43fe98, (q31_t)0x7e42f68c, (q31_t)0x7e41ee33, (q31_t)0x7e40e58c, (q31_t)0x7e3fdc97,
+  (q31_t)0x7e3ed353, (q31_t)0x7e3dc9c3, (q31_t)0x7e3cbfe4, (q31_t)0x7e3bb5b7, (q31_t)0x7e3aab3c, (q31_t)0x7e39a074, (q31_t)0x7e38955e, (q31_t)0x7e3789fa,
+  (q31_t)0x7e367e48, (q31_t)0x7e357248, (q31_t)0x7e3465fa, (q31_t)0x7e33595e, (q31_t)0x7e324c75, (q31_t)0x7e313f3e, (q31_t)0x7e3031b9, (q31_t)0x7e2f23e6,
+  (q31_t)0x7e2e15c5, (q31_t)0x7e2d0756, (q31_t)0x7e2bf89a, (q31_t)0x7e2ae990, (q31_t)0x7e29da38, (q31_t)0x7e28ca92, (q31_t)0x7e27ba9e, (q31_t)0x7e26aa5d,
+  (q31_t)0x7e2599cd, (q31_t)0x7e2488f0, (q31_t)0x7e2377c5, (q31_t)0x7e22664c, (q31_t)0x7e215486, (q31_t)0x7e204271, (q31_t)0x7e1f300f, (q31_t)0x7e1e1d5f,
+  (q31_t)0x7e1d0a61, (q31_t)0x7e1bf716, (q31_t)0x7e1ae37c, (q31_t)0x7e19cf95, (q31_t)0x7e18bb60, (q31_t)0x7e17a6dd, (q31_t)0x7e16920d, (q31_t)0x7e157cee,
+  (q31_t)0x7e146782, (q31_t)0x7e1351c9, (q31_t)0x7e123bc1, (q31_t)0x7e11256c, (q31_t)0x7e100ec8, (q31_t)0x7e0ef7d7, (q31_t)0x7e0de099, (q31_t)0x7e0cc90c,
+  (q31_t)0x7e0bb132, (q31_t)0x7e0a990a, (q31_t)0x7e098095, (q31_t)0x7e0867d1, (q31_t)0x7e074ec0, (q31_t)0x7e063561, (q31_t)0x7e051bb4, (q31_t)0x7e0401ba,
+  (q31_t)0x7e02e772, (q31_t)0x7e01ccdc, (q31_t)0x7e00b1f9, (q31_t)0x7dff96c7, (q31_t)0x7dfe7b48, (q31_t)0x7dfd5f7b, (q31_t)0x7dfc4361, (q31_t)0x7dfb26f9,
+  (q31_t)0x7dfa0a43, (q31_t)0x7df8ed3f, (q31_t)0x7df7cfee, (q31_t)0x7df6b24f, (q31_t)0x7df59462, (q31_t)0x7df47628, (q31_t)0x7df357a0, (q31_t)0x7df238ca,
+  (q31_t)0x7df119a7, (q31_t)0x7deffa35, (q31_t)0x7deeda77, (q31_t)0x7dedba6a, (q31_t)0x7dec9a10, (q31_t)0x7deb7968, (q31_t)0x7dea5872, (q31_t)0x7de9372f,
+  (q31_t)0x7de8159e, (q31_t)0x7de6f3c0, (q31_t)0x7de5d193, (q31_t)0x7de4af1a, (q31_t)0x7de38c52, (q31_t)0x7de2693d, (q31_t)0x7de145da, (q31_t)0x7de02229,
+  (q31_t)0x7ddefe2b, (q31_t)0x7dddd9e0, (q31_t)0x7ddcb546, (q31_t)0x7ddb905f, (q31_t)0x7dda6b2a, (q31_t)0x7dd945a8, (q31_t)0x7dd81fd8, (q31_t)0x7dd6f9ba,
+  (q31_t)0x7dd5d34f, (q31_t)0x7dd4ac96, (q31_t)0x7dd38590, (q31_t)0x7dd25e3c, (q31_t)0x7dd1369a, (q31_t)0x7dd00eab, (q31_t)0x7dcee66e, (q31_t)0x7dcdbde3,
+  (q31_t)0x7dcc950b, (q31_t)0x7dcb6be6, (q31_t)0x7dca4272, (q31_t)0x7dc918b1, (q31_t)0x7dc7eea3, (q31_t)0x7dc6c447, (q31_t)0x7dc5999d, (q31_t)0x7dc46ea6,
+  (q31_t)0x7dc34361, (q31_t)0x7dc217cf, (q31_t)0x7dc0ebef, (q31_t)0x7dbfbfc1, (q31_t)0x7dbe9346, (q31_t)0x7dbd667d, (q31_t)0x7dbc3967, (q31_t)0x7dbb0c03,
+  (q31_t)0x7db9de52, (q31_t)0x7db8b053, (q31_t)0x7db78207, (q31_t)0x7db6536d, (q31_t)0x7db52485, (q31_t)0x7db3f550, (q31_t)0x7db2c5cd, (q31_t)0x7db195fd,
+  (q31_t)0x7db065df, (q31_t)0x7daf3574, (q31_t)0x7dae04bb, (q31_t)0x7dacd3b5, (q31_t)0x7daba261, (q31_t)0x7daa70c0, (q31_t)0x7da93ed1, (q31_t)0x7da80c95,
+  (q31_t)0x7da6da0b, (q31_t)0x7da5a733, (q31_t)0x7da4740e, (q31_t)0x7da3409c, (q31_t)0x7da20cdc, (q31_t)0x7da0d8cf, (q31_t)0x7d9fa474, (q31_t)0x7d9e6fcb,
+  (q31_t)0x7d9d3ad6, (q31_t)0x7d9c0592, (q31_t)0x7d9ad001, (q31_t)0x7d999a23, (q31_t)0x7d9863f7, (q31_t)0x7d972d7e, (q31_t)0x7d95f6b7, (q31_t)0x7d94bfa3,
+  (q31_t)0x7d938841, (q31_t)0x7d925092, (q31_t)0x7d911896, (q31_t)0x7d8fe04c, (q31_t)0x7d8ea7b4, (q31_t)0x7d8d6ecf, (q31_t)0x7d8c359d, (q31_t)0x7d8afc1d,
+  (q31_t)0x7d89c250, (q31_t)0x7d888835, (q31_t)0x7d874dcd, (q31_t)0x7d861317, (q31_t)0x7d84d814, (q31_t)0x7d839cc4, (q31_t)0x7d826126, (q31_t)0x7d81253a,
+  (q31_t)0x7d7fe902, (q31_t)0x7d7eac7c, (q31_t)0x7d7d6fa8, (q31_t)0x7d7c3287, (q31_t)0x7d7af519, (q31_t)0x7d79b75d, (q31_t)0x7d787954, (q31_t)0x7d773afd,
+  (q31_t)0x7d75fc59, (q31_t)0x7d74bd68, (q31_t)0x7d737e29, (q31_t)0x7d723e9d, (q31_t)0x7d70fec4, (q31_t)0x7d6fbe9d, (q31_t)0x7d6e7e29, (q31_t)0x7d6d3d67,
+  (q31_t)0x7d6bfc58, (q31_t)0x7d6abafc, (q31_t)0x7d697952, (q31_t)0x7d68375b, (q31_t)0x7d66f517, (q31_t)0x7d65b285, (q31_t)0x7d646fa6, (q31_t)0x7d632c79,
+  (q31_t)0x7d61e8ff, (q31_t)0x7d60a538, (q31_t)0x7d5f6124, (q31_t)0x7d5e1cc2, (q31_t)0x7d5cd813, (q31_t)0x7d5b9316, (q31_t)0x7d5a4dcc, (q31_t)0x7d590835,
+  (q31_t)0x7d57c251, (q31_t)0x7d567c1f, (q31_t)0x7d5535a0, (q31_t)0x7d53eed3, (q31_t)0x7d52a7ba, (q31_t)0x7d516053, (q31_t)0x7d50189e, (q31_t)0x7d4ed09d,
+  (q31_t)0x7d4d884e, (q31_t)0x7d4c3fb1, (q31_t)0x7d4af6c8, (q31_t)0x7d49ad91, (q31_t)0x7d48640d, (q31_t)0x7d471a3c, (q31_t)0x7d45d01d, (q31_t)0x7d4485b1,
+  (q31_t)0x7d433af8, (q31_t)0x7d41eff1, (q31_t)0x7d40a49e, (q31_t)0x7d3f58fd, (q31_t)0x7d3e0d0e, (q31_t)0x7d3cc0d3, (q31_t)0x7d3b744a, (q31_t)0x7d3a2774,
+  (q31_t)0x7d38da51, (q31_t)0x7d378ce0, (q31_t)0x7d363f23, (q31_t)0x7d34f118, (q31_t)0x7d33a2bf, (q31_t)0x7d32541a, (q31_t)0x7d310527, (q31_t)0x7d2fb5e7,
+  (q31_t)0x7d2e665a, (q31_t)0x7d2d1680, (q31_t)0x7d2bc659, (q31_t)0x7d2a75e4, (q31_t)0x7d292522, (q31_t)0x7d27d413, (q31_t)0x7d2682b6, (q31_t)0x7d25310d,
+  (q31_t)0x7d23df16, (q31_t)0x7d228cd2, (q31_t)0x7d213a41, (q31_t)0x7d1fe762, (q31_t)0x7d1e9437, (q31_t)0x7d1d40be, (q31_t)0x7d1becf8, (q31_t)0x7d1a98e5,
+  (q31_t)0x7d194485, (q31_t)0x7d17efd8, (q31_t)0x7d169add, (q31_t)0x7d154595, (q31_t)0x7d13f001, (q31_t)0x7d129a1f, (q31_t)0x7d1143ef, (q31_t)0x7d0fed73,
+  (q31_t)0x7d0e96aa, (q31_t)0x7d0d3f93, (q31_t)0x7d0be82f, (q31_t)0x7d0a907e, (q31_t)0x7d093880, (q31_t)0x7d07e035, (q31_t)0x7d06879d, (q31_t)0x7d052eb8,
+  (q31_t)0x7d03d585, (q31_t)0x7d027c05, (q31_t)0x7d012239, (q31_t)0x7cffc81f, (q31_t)0x7cfe6db8, (q31_t)0x7cfd1304, (q31_t)0x7cfbb803, (q31_t)0x7cfa5cb4,
+  (q31_t)0x7cf90119, (q31_t)0x7cf7a531, (q31_t)0x7cf648fb, (q31_t)0x7cf4ec79, (q31_t)0x7cf38fa9, (q31_t)0x7cf2328c, (q31_t)0x7cf0d522, (q31_t)0x7cef776b,
+  (q31_t)0x7cee1967, (q31_t)0x7cecbb16, (q31_t)0x7ceb5c78, (q31_t)0x7ce9fd8d, (q31_t)0x7ce89e55, (q31_t)0x7ce73ed0, (q31_t)0x7ce5defd, (q31_t)0x7ce47ede,
+  (q31_t)0x7ce31e72, (q31_t)0x7ce1bdb8, (q31_t)0x7ce05cb2, (q31_t)0x7cdefb5e, (q31_t)0x7cdd99be, (q31_t)0x7cdc37d0, (q31_t)0x7cdad596, (q31_t)0x7cd9730e,
+  (q31_t)0x7cd8103a, (q31_t)0x7cd6ad18, (q31_t)0x7cd549aa, (q31_t)0x7cd3e5ee, (q31_t)0x7cd281e5, (q31_t)0x7cd11d90, (q31_t)0x7ccfb8ed, (q31_t)0x7cce53fe,
+  (q31_t)0x7ccceec1, (q31_t)0x7ccb8937, (q31_t)0x7cca2361, (q31_t)0x7cc8bd3d, (q31_t)0x7cc756cd, (q31_t)0x7cc5f010, (q31_t)0x7cc48905, (q31_t)0x7cc321ae,
+  (q31_t)0x7cc1ba09, (q31_t)0x7cc05218, (q31_t)0x7cbee9da, (q31_t)0x7cbd814f, (q31_t)0x7cbc1877, (q31_t)0x7cbaaf51, (q31_t)0x7cb945df, (q31_t)0x7cb7dc20,
+  (q31_t)0x7cb67215, (q31_t)0x7cb507bc, (q31_t)0x7cb39d16, (q31_t)0x7cb23223, (q31_t)0x7cb0c6e4, (q31_t)0x7caf5b57, (q31_t)0x7cadef7e, (q31_t)0x7cac8358,
+  (q31_t)0x7cab16e4, (q31_t)0x7ca9aa24, (q31_t)0x7ca83d17, (q31_t)0x7ca6cfbd, (q31_t)0x7ca56216, (q31_t)0x7ca3f423, (q31_t)0x7ca285e2, (q31_t)0x7ca11755,
+  (q31_t)0x7c9fa87a, (q31_t)0x7c9e3953, (q31_t)0x7c9cc9df, (q31_t)0x7c9b5a1e, (q31_t)0x7c99ea10, (q31_t)0x7c9879b6, (q31_t)0x7c97090e, (q31_t)0x7c95981a,
+  (q31_t)0x7c9426d8, (q31_t)0x7c92b54a, (q31_t)0x7c91436f, (q31_t)0x7c8fd148, (q31_t)0x7c8e5ed3, (q31_t)0x7c8cec12, (q31_t)0x7c8b7903, (q31_t)0x7c8a05a8,
+  (q31_t)0x7c889200, (q31_t)0x7c871e0c, (q31_t)0x7c85a9ca, (q31_t)0x7c84353c, (q31_t)0x7c82c060, (q31_t)0x7c814b39, (q31_t)0x7c7fd5c4, (q31_t)0x7c7e6002,
+  (q31_t)0x7c7ce9f4, (q31_t)0x7c7b7399, (q31_t)0x7c79fcf1, (q31_t)0x7c7885fc, (q31_t)0x7c770eba, (q31_t)0x7c75972c, (q31_t)0x7c741f51, (q31_t)0x7c72a729,
+  (q31_t)0x7c712eb5, (q31_t)0x7c6fb5f3, (q31_t)0x7c6e3ce5, (q31_t)0x7c6cc38a, (q31_t)0x7c6b49e3, (q31_t)0x7c69cfee, (q31_t)0x7c6855ad, (q31_t)0x7c66db1f,
+  (q31_t)0x7c656045, (q31_t)0x7c63e51e, (q31_t)0x7c6269aa, (q31_t)0x7c60ede9, (q31_t)0x7c5f71db, (q31_t)0x7c5df581, (q31_t)0x7c5c78da, (q31_t)0x7c5afbe6,
+  (q31_t)0x7c597ea6, (q31_t)0x7c580119, (q31_t)0x7c56833f, (q31_t)0x7c550519, (q31_t)0x7c5386a6, (q31_t)0x7c5207e6, (q31_t)0x7c5088d9, (q31_t)0x7c4f0980,
+  (q31_t)0x7c4d89da, (q31_t)0x7c4c09e8, (q31_t)0x7c4a89a8, (q31_t)0x7c49091c, (q31_t)0x7c478844, (q31_t)0x7c46071f, (q31_t)0x7c4485ad, (q31_t)0x7c4303ee,
+  (q31_t)0x7c4181e3, (q31_t)0x7c3fff8b, (q31_t)0x7c3e7ce7, (q31_t)0x7c3cf9f5, (q31_t)0x7c3b76b8, (q31_t)0x7c39f32d, (q31_t)0x7c386f56, (q31_t)0x7c36eb33,
+  (q31_t)0x7c3566c2, (q31_t)0x7c33e205, (q31_t)0x7c325cfc, (q31_t)0x7c30d7a6, (q31_t)0x7c2f5203, (q31_t)0x7c2dcc14, (q31_t)0x7c2c45d8, (q31_t)0x7c2abf4f,
+  (q31_t)0x7c29387a, (q31_t)0x7c27b158, (q31_t)0x7c2629ea, (q31_t)0x7c24a22f, (q31_t)0x7c231a28, (q31_t)0x7c2191d4, (q31_t)0x7c200933, (q31_t)0x7c1e8046,
+  (q31_t)0x7c1cf70c, (q31_t)0x7c1b6d86, (q31_t)0x7c19e3b3, (q31_t)0x7c185994, (q31_t)0x7c16cf28, (q31_t)0x7c15446f, (q31_t)0x7c13b96a, (q31_t)0x7c122e19,
+  (q31_t)0x7c10a27b, (q31_t)0x7c0f1690, (q31_t)0x7c0d8a59, (q31_t)0x7c0bfdd5, (q31_t)0x7c0a7105, (q31_t)0x7c08e3e8, (q31_t)0x7c07567f, (q31_t)0x7c05c8c9,
+  (q31_t)0x7c043ac7, (q31_t)0x7c02ac78, (q31_t)0x7c011ddd, (q31_t)0x7bff8ef5, (q31_t)0x7bfdffc1, (q31_t)0x7bfc7041, (q31_t)0x7bfae073, (q31_t)0x7bf9505a,
+  (q31_t)0x7bf7bff4, (q31_t)0x7bf62f41, (q31_t)0x7bf49e42, (q31_t)0x7bf30cf6, (q31_t)0x7bf17b5e, (q31_t)0x7befe97a, (q31_t)0x7bee5749, (q31_t)0x7becc4cc,
+  (q31_t)0x7beb3202, (q31_t)0x7be99eec, (q31_t)0x7be80b89, (q31_t)0x7be677da, (q31_t)0x7be4e3df, (q31_t)0x7be34f97, (q31_t)0x7be1bb02, (q31_t)0x7be02621,
+  (q31_t)0x7bde90f4, (q31_t)0x7bdcfb7b, (q31_t)0x7bdb65b5, (q31_t)0x7bd9cfa2, (q31_t)0x7bd83944, (q31_t)0x7bd6a298, (q31_t)0x7bd50ba1, (q31_t)0x7bd3745d,
+  (q31_t)0x7bd1dccc, (q31_t)0x7bd044f0, (q31_t)0x7bceacc7, (q31_t)0x7bcd1451, (q31_t)0x7bcb7b8f, (q31_t)0x7bc9e281, (q31_t)0x7bc84927, (q31_t)0x7bc6af80,
+  (q31_t)0x7bc5158c, (q31_t)0x7bc37b4d, (q31_t)0x7bc1e0c1, (q31_t)0x7bc045e9, (q31_t)0x7bbeaac4, (q31_t)0x7bbd0f53, (q31_t)0x7bbb7396, (q31_t)0x7bb9d78c,
+  (q31_t)0x7bb83b36, (q31_t)0x7bb69e94, (q31_t)0x7bb501a5, (q31_t)0x7bb3646a, (q31_t)0x7bb1c6e3, (q31_t)0x7bb02910, (q31_t)0x7bae8af0, (q31_t)0x7bacec84,
+  (q31_t)0x7bab4dcc, (q31_t)0x7ba9aec7, (q31_t)0x7ba80f76, (q31_t)0x7ba66fd9, (q31_t)0x7ba4cfef, (q31_t)0x7ba32fba, (q31_t)0x7ba18f38, (q31_t)0x7b9fee69,
+  (q31_t)0x7b9e4d4f, (q31_t)0x7b9cabe8, (q31_t)0x7b9b0a35, (q31_t)0x7b996836, (q31_t)0x7b97c5ea, (q31_t)0x7b962352, (q31_t)0x7b94806e, (q31_t)0x7b92dd3e,
+  (q31_t)0x7b9139c2, (q31_t)0x7b8f95f9, (q31_t)0x7b8df1e4, (q31_t)0x7b8c4d83, (q31_t)0x7b8aa8d6, (q31_t)0x7b8903dc, (q31_t)0x7b875e96, (q31_t)0x7b85b904,
+  (q31_t)0x7b841326, (q31_t)0x7b826cfc, (q31_t)0x7b80c686, (q31_t)0x7b7f1fc3, (q31_t)0x7b7d78b4, (q31_t)0x7b7bd159, (q31_t)0x7b7a29b2, (q31_t)0x7b7881be,
+  (q31_t)0x7b76d97f, (q31_t)0x7b7530f3, (q31_t)0x7b73881b, (q31_t)0x7b71def7, (q31_t)0x7b703587, (q31_t)0x7b6e8bcb, (q31_t)0x7b6ce1c2, (q31_t)0x7b6b376e,
+  (q31_t)0x7b698ccd, (q31_t)0x7b67e1e0, (q31_t)0x7b6636a7, (q31_t)0x7b648b22, (q31_t)0x7b62df51, (q31_t)0x7b613334, (q31_t)0x7b5f86ca, (q31_t)0x7b5dda15,
+  (q31_t)0x7b5c2d13, (q31_t)0x7b5a7fc6, (q31_t)0x7b58d22c, (q31_t)0x7b572446, (q31_t)0x7b557614, (q31_t)0x7b53c796, (q31_t)0x7b5218cc, (q31_t)0x7b5069b6,
+  (q31_t)0x7b4eba53, (q31_t)0x7b4d0aa5, (q31_t)0x7b4b5aab, (q31_t)0x7b49aa64, (q31_t)0x7b47f9d2, (q31_t)0x7b4648f3, (q31_t)0x7b4497c9, (q31_t)0x7b42e652,
+  (q31_t)0x7b413490, (q31_t)0x7b3f8281, (q31_t)0x7b3dd026, (q31_t)0x7b3c1d80, (q31_t)0x7b3a6a8d, (q31_t)0x7b38b74e, (q31_t)0x7b3703c3, (q31_t)0x7b354fed,
+  (q31_t)0x7b339bca, (q31_t)0x7b31e75b, (q31_t)0x7b3032a0, (q31_t)0x7b2e7d9a, (q31_t)0x7b2cc847, (q31_t)0x7b2b12a8, (q31_t)0x7b295cbe, (q31_t)0x7b27a687,
+  (q31_t)0x7b25f004, (q31_t)0x7b243936, (q31_t)0x7b22821b, (q31_t)0x7b20cab5, (q31_t)0x7b1f1302, (q31_t)0x7b1d5b04, (q31_t)0x7b1ba2b9, (q31_t)0x7b19ea23,
+  (q31_t)0x7b183141, (q31_t)0x7b167813, (q31_t)0x7b14be99, (q31_t)0x7b1304d3, (q31_t)0x7b114ac1, (q31_t)0x7b0f9063, (q31_t)0x7b0dd5b9, (q31_t)0x7b0c1ac4,
+  (q31_t)0x7b0a5f82, (q31_t)0x7b08a3f5, (q31_t)0x7b06e81b, (q31_t)0x7b052bf6, (q31_t)0x7b036f85, (q31_t)0x7b01b2c8, (q31_t)0x7afff5bf, (q31_t)0x7afe386a,
+  (q31_t)0x7afc7aca, (q31_t)0x7afabcdd, (q31_t)0x7af8fea5, (q31_t)0x7af74021, (q31_t)0x7af58151, (q31_t)0x7af3c235, (q31_t)0x7af202cd, (q31_t)0x7af0431a,
+  (q31_t)0x7aee831a, (q31_t)0x7aecc2cf, (q31_t)0x7aeb0238, (q31_t)0x7ae94155, (q31_t)0x7ae78026, (q31_t)0x7ae5beac, (q31_t)0x7ae3fce6, (q31_t)0x7ae23ad4,
+  (q31_t)0x7ae07876, (q31_t)0x7adeb5cc, (q31_t)0x7adcf2d6, (q31_t)0x7adb2f95, (q31_t)0x7ad96c08, (q31_t)0x7ad7a82f, (q31_t)0x7ad5e40a, (q31_t)0x7ad41f9a,
+  (q31_t)0x7ad25ade, (q31_t)0x7ad095d6, (q31_t)0x7aced082, (q31_t)0x7acd0ae3, (q31_t)0x7acb44f8, (q31_t)0x7ac97ec1, (q31_t)0x7ac7b83e, (q31_t)0x7ac5f170,
+  (q31_t)0x7ac42a55, (q31_t)0x7ac262ef, (q31_t)0x7ac09b3e, (q31_t)0x7abed341, (q31_t)0x7abd0af7, (q31_t)0x7abb4263, (q31_t)0x7ab97982, (q31_t)0x7ab7b056,
+  (q31_t)0x7ab5e6de, (q31_t)0x7ab41d1b, (q31_t)0x7ab2530b, (q31_t)0x7ab088b0, (q31_t)0x7aaebe0a, (q31_t)0x7aacf318, (q31_t)0x7aab27da, (q31_t)0x7aa95c50,
+  (q31_t)0x7aa7907b, (q31_t)0x7aa5c45a, (q31_t)0x7aa3f7ed, (q31_t)0x7aa22b35, (q31_t)0x7aa05e31, (q31_t)0x7a9e90e1, (q31_t)0x7a9cc346, (q31_t)0x7a9af55f,
+  (q31_t)0x7a99272d, (q31_t)0x7a9758af, (q31_t)0x7a9589e5, (q31_t)0x7a93bad0, (q31_t)0x7a91eb6f, (q31_t)0x7a901bc2, (q31_t)0x7a8e4bca, (q31_t)0x7a8c7b87,
+  (q31_t)0x7a8aaaf7, (q31_t)0x7a88da1c, (q31_t)0x7a8708f6, (q31_t)0x7a853784, (q31_t)0x7a8365c6, (q31_t)0x7a8193bd, (q31_t)0x7a7fc168, (q31_t)0x7a7deec8,
+  (q31_t)0x7a7c1bdc, (q31_t)0x7a7a48a4, (q31_t)0x7a787521, (q31_t)0x7a76a153, (q31_t)0x7a74cd38, (q31_t)0x7a72f8d3, (q31_t)0x7a712422, (q31_t)0x7a6f4f25,
+  (q31_t)0x7a6d79dd, (q31_t)0x7a6ba449, (q31_t)0x7a69ce6a, (q31_t)0x7a67f83f, (q31_t)0x7a6621c9, (q31_t)0x7a644b07, (q31_t)0x7a6273fa, (q31_t)0x7a609ca1,
+  (q31_t)0x7a5ec4fc, (q31_t)0x7a5ced0d, (q31_t)0x7a5b14d1, (q31_t)0x7a593c4b, (q31_t)0x7a576379, (q31_t)0x7a558a5b, (q31_t)0x7a53b0f2, (q31_t)0x7a51d73d,
+  (q31_t)0x7a4ffd3d, (q31_t)0x7a4e22f2, (q31_t)0x7a4c485b, (q31_t)0x7a4a6d78, (q31_t)0x7a48924b, (q31_t)0x7a46b6d1, (q31_t)0x7a44db0d, (q31_t)0x7a42fefd,
+  (q31_t)0x7a4122a1, (q31_t)0x7a3f45fa, (q31_t)0x7a3d6908, (q31_t)0x7a3b8bca, (q31_t)0x7a39ae41, (q31_t)0x7a37d06d, (q31_t)0x7a35f24d, (q31_t)0x7a3413e2,
+  (q31_t)0x7a32352b, (q31_t)0x7a305629, (q31_t)0x7a2e76dc, (q31_t)0x7a2c9743, (q31_t)0x7a2ab75f, (q31_t)0x7a28d72f, (q31_t)0x7a26f6b4, (q31_t)0x7a2515ee,
+  (q31_t)0x7a2334dd, (q31_t)0x7a215380, (q31_t)0x7a1f71d7, (q31_t)0x7a1d8fe4, (q31_t)0x7a1bada5, (q31_t)0x7a19cb1b, (q31_t)0x7a17e845, (q31_t)0x7a160524,
+  (q31_t)0x7a1421b8, (q31_t)0x7a123e01, (q31_t)0x7a1059fe, (q31_t)0x7a0e75b0, (q31_t)0x7a0c9117, (q31_t)0x7a0aac32, (q31_t)0x7a08c702, (q31_t)0x7a06e187,
+  (q31_t)0x7a04fbc1, (q31_t)0x7a0315af, (q31_t)0x7a012f52, (q31_t)0x79ff48aa, (q31_t)0x79fd61b6, (q31_t)0x79fb7a77, (q31_t)0x79f992ed, (q31_t)0x79f7ab18,
+  (q31_t)0x79f5c2f8, (q31_t)0x79f3da8c, (q31_t)0x79f1f1d5, (q31_t)0x79f008d3, (q31_t)0x79ee1f86, (q31_t)0x79ec35ed, (q31_t)0x79ea4c09, (q31_t)0x79e861da,
+  (q31_t)0x79e67760, (q31_t)0x79e48c9b, (q31_t)0x79e2a18a, (q31_t)0x79e0b62e, (q31_t)0x79deca87, (q31_t)0x79dcde95, (q31_t)0x79daf258, (q31_t)0x79d905d0,
+  (q31_t)0x79d718fc, (q31_t)0x79d52bdd, (q31_t)0x79d33e73, (q31_t)0x79d150be, (q31_t)0x79cf62be, (q31_t)0x79cd7473, (q31_t)0x79cb85dc, (q31_t)0x79c996fb,
+  (q31_t)0x79c7a7ce, (q31_t)0x79c5b856, (q31_t)0x79c3c893, (q31_t)0x79c1d885, (q31_t)0x79bfe82c, (q31_t)0x79bdf788, (q31_t)0x79bc0698, (q31_t)0x79ba155e,
+  (q31_t)0x79b823d8, (q31_t)0x79b63207, (q31_t)0x79b43fec, (q31_t)0x79b24d85, (q31_t)0x79b05ad3, (q31_t)0x79ae67d6, (q31_t)0x79ac748e, (q31_t)0x79aa80fb,
+  (q31_t)0x79a88d1d, (q31_t)0x79a698f4, (q31_t)0x79a4a480, (q31_t)0x79a2afc1, (q31_t)0x79a0bab6, (q31_t)0x799ec561, (q31_t)0x799ccfc1, (q31_t)0x799ad9d5,
+  (q31_t)0x7998e39f, (q31_t)0x7996ed1e, (q31_t)0x7994f651, (q31_t)0x7992ff3a, (q31_t)0x799107d8, (q31_t)0x798f102a, (q31_t)0x798d1832, (q31_t)0x798b1fef,
+  (q31_t)0x79892761, (q31_t)0x79872e87, (q31_t)0x79853563, (q31_t)0x79833bf4, (q31_t)0x7981423a, (q31_t)0x797f4835, (q31_t)0x797d4de5, (q31_t)0x797b534a,
+  (q31_t)0x79795864, (q31_t)0x79775d33, (q31_t)0x797561b8, (q31_t)0x797365f1, (q31_t)0x797169df, (q31_t)0x796f6d83, (q31_t)0x796d70dc, (q31_t)0x796b73e9,
+  (q31_t)0x796976ac, (q31_t)0x79677924, (q31_t)0x79657b51, (q31_t)0x79637d33, (q31_t)0x79617eca, (q31_t)0x795f8017, (q31_t)0x795d8118, (q31_t)0x795b81cf,
+  (q31_t)0x7959823b, (q31_t)0x7957825c, (q31_t)0x79558232, (q31_t)0x795381bd, (q31_t)0x795180fe, (q31_t)0x794f7ff3, (q31_t)0x794d7e9e, (q31_t)0x794b7cfe,
+  (q31_t)0x79497b13, (q31_t)0x794778dd, (q31_t)0x7945765d, (q31_t)0x79437391, (q31_t)0x7941707b, (q31_t)0x793f6d1a, (q31_t)0x793d696f, (q31_t)0x793b6578,
+  (q31_t)0x79396137, (q31_t)0x79375cab, (q31_t)0x793557d4, (q31_t)0x793352b2, (q31_t)0x79314d46, (q31_t)0x792f478f, (q31_t)0x792d418d, (q31_t)0x792b3b40,
+  (q31_t)0x792934a9, (q31_t)0x79272dc7, (q31_t)0x7925269a, (q31_t)0x79231f22, (q31_t)0x79211760, (q31_t)0x791f0f53, (q31_t)0x791d06fb, (q31_t)0x791afe59,
+  (q31_t)0x7918f56c, (q31_t)0x7916ec34, (q31_t)0x7914e2b2, (q31_t)0x7912d8e4, (q31_t)0x7910cecc, (q31_t)0x790ec46a, (q31_t)0x790cb9bd, (q31_t)0x790aaec5,
+  (q31_t)0x7908a382, (q31_t)0x790697f5, (q31_t)0x79048c1d, (q31_t)0x79027ffa, (q31_t)0x7900738d, (q31_t)0x78fe66d5, (q31_t)0x78fc59d3, (q31_t)0x78fa4c86,
+  (q31_t)0x78f83eee, (q31_t)0x78f6310c, (q31_t)0x78f422df, (q31_t)0x78f21467, (q31_t)0x78f005a5, (q31_t)0x78edf698, (q31_t)0x78ebe741, (q31_t)0x78e9d79f,
+  (q31_t)0x78e7c7b2, (q31_t)0x78e5b77b, (q31_t)0x78e3a6f9, (q31_t)0x78e1962d, (q31_t)0x78df8516, (q31_t)0x78dd73b5, (q31_t)0x78db6209, (q31_t)0x78d95012,
+  (q31_t)0x78d73dd1, (q31_t)0x78d52b46, (q31_t)0x78d31870, (q31_t)0x78d1054f, (q31_t)0x78cef1e4, (q31_t)0x78ccde2e, (q31_t)0x78caca2e, (q31_t)0x78c8b5e3,
+  (q31_t)0x78c6a14e, (q31_t)0x78c48c6e, (q31_t)0x78c27744, (q31_t)0x78c061cf, (q31_t)0x78be4c10, (q31_t)0x78bc3606, (q31_t)0x78ba1fb2, (q31_t)0x78b80913,
+  (q31_t)0x78b5f22a, (q31_t)0x78b3daf7, (q31_t)0x78b1c379, (q31_t)0x78afabb0, (q31_t)0x78ad939d, (q31_t)0x78ab7b40, (q31_t)0x78a96298, (q31_t)0x78a749a6,
+  (q31_t)0x78a53069, (q31_t)0x78a316e2, (q31_t)0x78a0fd11, (q31_t)0x789ee2f5, (q31_t)0x789cc88f, (q31_t)0x789aadde, (q31_t)0x789892e3, (q31_t)0x7896779d,
+  (q31_t)0x78945c0d, (q31_t)0x78924033, (q31_t)0x7890240e, (q31_t)0x788e07a0, (q31_t)0x788beae6, (q31_t)0x7889cde2, (q31_t)0x7887b094, (q31_t)0x788592fc,
+  (q31_t)0x78837519, (q31_t)0x788156ec, (q31_t)0x787f3875, (q31_t)0x787d19b3, (q31_t)0x787afaa7, (q31_t)0x7878db50, (q31_t)0x7876bbb0, (q31_t)0x78749bc5,
+  (q31_t)0x78727b8f, (q31_t)0x78705b10, (q31_t)0x786e3a46, (q31_t)0x786c1932, (q31_t)0x7869f7d3, (q31_t)0x7867d62a, (q31_t)0x7865b437, (q31_t)0x786391fa,
+  (q31_t)0x78616f72, (q31_t)0x785f4ca1, (q31_t)0x785d2984, (q31_t)0x785b061e, (q31_t)0x7858e26e, (q31_t)0x7856be73, (q31_t)0x78549a2e, (q31_t)0x7852759e,
+  (q31_t)0x785050c5, (q31_t)0x784e2ba1, (q31_t)0x784c0633, (q31_t)0x7849e07b, (q31_t)0x7847ba79, (q31_t)0x7845942c, (q31_t)0x78436d96, (q31_t)0x784146b5,
+  (q31_t)0x783f1f8a, (q31_t)0x783cf815, (q31_t)0x783ad055, (q31_t)0x7838a84c, (q31_t)0x78367ff8, (q31_t)0x7834575a, (q31_t)0x78322e72, (q31_t)0x78300540,
+  (q31_t)0x782ddbc4, (q31_t)0x782bb1fd, (q31_t)0x782987ed, (q31_t)0x78275d92, (q31_t)0x782532ed, (q31_t)0x782307fe, (q31_t)0x7820dcc5, (q31_t)0x781eb142,
+  (q31_t)0x781c8575, (q31_t)0x781a595d, (q31_t)0x78182cfc, (q31_t)0x78160051, (q31_t)0x7813d35b, (q31_t)0x7811a61b, (q31_t)0x780f7892, (q31_t)0x780d4abe,
+  (q31_t)0x780b1ca0, (q31_t)0x7808ee38, (q31_t)0x7806bf86, (q31_t)0x7804908a, (q31_t)0x78026145, (q31_t)0x780031b5, (q31_t)0x77fe01db, (q31_t)0x77fbd1b6,
+  (q31_t)0x77f9a148, (q31_t)0x77f77090, (q31_t)0x77f53f8e, (q31_t)0x77f30e42, (q31_t)0x77f0dcac, (q31_t)0x77eeaacc, (q31_t)0x77ec78a2, (q31_t)0x77ea462e,
+  (q31_t)0x77e81370, (q31_t)0x77e5e068, (q31_t)0x77e3ad17, (q31_t)0x77e1797b, (q31_t)0x77df4595, (q31_t)0x77dd1165, (q31_t)0x77dadcec, (q31_t)0x77d8a828,
+  (q31_t)0x77d6731a, (q31_t)0x77d43dc3, (q31_t)0x77d20822, (q31_t)0x77cfd236, (q31_t)0x77cd9c01, (q31_t)0x77cb6582, (q31_t)0x77c92eb9, (q31_t)0x77c6f7a6,
+  (q31_t)0x77c4c04a, (q31_t)0x77c288a3, (q31_t)0x77c050b2, (q31_t)0x77be1878, (q31_t)0x77bbdff4, (q31_t)0x77b9a726, (q31_t)0x77b76e0e, (q31_t)0x77b534ac,
+  (q31_t)0x77b2fb00, (q31_t)0x77b0c10b, (q31_t)0x77ae86cc, (q31_t)0x77ac4c43, (q31_t)0x77aa1170, (q31_t)0x77a7d653, (q31_t)0x77a59aec, (q31_t)0x77a35f3c,
+  (q31_t)0x77a12342, (q31_t)0x779ee6fe, (q31_t)0x779caa70, (q31_t)0x779a6d99, (q31_t)0x77983077, (q31_t)0x7795f30c, (q31_t)0x7793b557, (q31_t)0x77917759,
+  (q31_t)0x778f3910, (q31_t)0x778cfa7e, (q31_t)0x778abba2, (q31_t)0x77887c7d, (q31_t)0x77863d0d, (q31_t)0x7783fd54, (q31_t)0x7781bd52, (q31_t)0x777f7d05,
+  (q31_t)0x777d3c6f, (q31_t)0x777afb8f, (q31_t)0x7778ba65, (q31_t)0x777678f2, (q31_t)0x77743735, (q31_t)0x7771f52e, (q31_t)0x776fb2de, (q31_t)0x776d7044,
+  (q31_t)0x776b2d60, (q31_t)0x7768ea33, (q31_t)0x7766a6bc, (q31_t)0x776462fb, (q31_t)0x77621ef1, (q31_t)0x775fda9d, (q31_t)0x775d95ff, (q31_t)0x775b5118,
+  (q31_t)0x77590be7, (q31_t)0x7756c66c, (q31_t)0x775480a8, (q31_t)0x77523a9b, (q31_t)0x774ff443, (q31_t)0x774dada2, (q31_t)0x774b66b8, (q31_t)0x77491f84,
+  (q31_t)0x7746d806, (q31_t)0x7744903f, (q31_t)0x7742482e, (q31_t)0x773fffd4, (q31_t)0x773db730, (q31_t)0x773b6e42, (q31_t)0x7739250b, (q31_t)0x7736db8b,
+  (q31_t)0x773491c0, (q31_t)0x773247ad, (q31_t)0x772ffd50, (q31_t)0x772db2a9, (q31_t)0x772b67b9, (q31_t)0x77291c7f, (q31_t)0x7726d0fc, (q31_t)0x7724852f,
+  (q31_t)0x77223919, (q31_t)0x771fecb9, (q31_t)0x771da010, (q31_t)0x771b531d, (q31_t)0x771905e1, (q31_t)0x7716b85b, (q31_t)0x77146a8c, (q31_t)0x77121c74,
+  (q31_t)0x770fce12, (q31_t)0x770d7f66, (q31_t)0x770b3072, (q31_t)0x7708e133, (q31_t)0x770691ab, (q31_t)0x770441da, (q31_t)0x7701f1c0, (q31_t)0x76ffa15c,
+  (q31_t)0x76fd50ae, (q31_t)0x76faffb8, (q31_t)0x76f8ae78, (q31_t)0x76f65cee, (q31_t)0x76f40b1b, (q31_t)0x76f1b8ff, (q31_t)0x76ef6699, (q31_t)0x76ed13ea,
+  (q31_t)0x76eac0f2, (q31_t)0x76e86db0, (q31_t)0x76e61a25, (q31_t)0x76e3c650, (q31_t)0x76e17233, (q31_t)0x76df1dcb, (q31_t)0x76dcc91b, (q31_t)0x76da7421,
+  (q31_t)0x76d81ede, (q31_t)0x76d5c952, (q31_t)0x76d3737c, (q31_t)0x76d11d5d, (q31_t)0x76cec6f5, (q31_t)0x76cc7043, (q31_t)0x76ca1948, (q31_t)0x76c7c204,
+  (q31_t)0x76c56a77, (q31_t)0x76c312a0, (q31_t)0x76c0ba80, (q31_t)0x76be6217, (q31_t)0x76bc0965, (q31_t)0x76b9b069, (q31_t)0x76b75724, (q31_t)0x76b4fd96,
+  (q31_t)0x76b2a3bf, (q31_t)0x76b0499e, (q31_t)0x76adef34, (q31_t)0x76ab9481, (q31_t)0x76a93985, (q31_t)0x76a6de40, (q31_t)0x76a482b1, (q31_t)0x76a226da,
+  (q31_t)0x769fcab9, (q31_t)0x769d6e4f, (q31_t)0x769b119b, (q31_t)0x7698b49f, (q31_t)0x76965759, (q31_t)0x7693f9ca, (q31_t)0x76919bf3, (q31_t)0x768f3dd2,
+  (q31_t)0x768cdf67, (q31_t)0x768a80b4, (q31_t)0x768821b8, (q31_t)0x7685c272, (q31_t)0x768362e4, (q31_t)0x7681030c, (q31_t)0x767ea2eb, (q31_t)0x767c4281,
+  (q31_t)0x7679e1ce, (q31_t)0x767780d2, (q31_t)0x76751f8d, (q31_t)0x7672bdfe, (q31_t)0x76705c27, (q31_t)0x766dfa07, (q31_t)0x766b979d, (q31_t)0x766934eb,
+  (q31_t)0x7666d1ef, (q31_t)0x76646eab, (q31_t)0x76620b1d, (q31_t)0x765fa747, (q31_t)0x765d4327, (q31_t)0x765adebe, (q31_t)0x76587a0d, (q31_t)0x76561512,
+  (q31_t)0x7653afce, (q31_t)0x76514a42, (q31_t)0x764ee46c, (q31_t)0x764c7e4d, (q31_t)0x764a17e6, (q31_t)0x7647b135, (q31_t)0x76454a3c, (q31_t)0x7642e2f9,
+  (q31_t)0x76407b6e, (q31_t)0x763e139a, (q31_t)0x763bab7c, (q31_t)0x76394316, (q31_t)0x7636da67, (q31_t)0x7634716f, (q31_t)0x7632082e, (q31_t)0x762f9ea4,
+  (q31_t)0x762d34d1, (q31_t)0x762acab6, (q31_t)0x76286051, (q31_t)0x7625f5a3, (q31_t)0x76238aad, (q31_t)0x76211f6e, (q31_t)0x761eb3e6, (q31_t)0x761c4815,
+  (q31_t)0x7619dbfb, (q31_t)0x76176f98, (q31_t)0x761502ed, (q31_t)0x761295f9, (q31_t)0x761028bb, (q31_t)0x760dbb35, (q31_t)0x760b4d67, (q31_t)0x7608df4f,
+  (q31_t)0x760670ee, (q31_t)0x76040245, (q31_t)0x76019353, (q31_t)0x75ff2418, (q31_t)0x75fcb495, (q31_t)0x75fa44c8, (q31_t)0x75f7d4b3, (q31_t)0x75f56455,
+  (q31_t)0x75f2f3ae, (q31_t)0x75f082bf, (q31_t)0x75ee1187, (q31_t)0x75eba006, (q31_t)0x75e92e3c, (q31_t)0x75e6bc2a, (q31_t)0x75e449ce, (q31_t)0x75e1d72b,
+  (q31_t)0x75df643e, (q31_t)0x75dcf109, (q31_t)0x75da7d8b, (q31_t)0x75d809c4, (q31_t)0x75d595b4, (q31_t)0x75d3215c, (q31_t)0x75d0acbc, (q31_t)0x75ce37d2,
+  (q31_t)0x75cbc2a0, (q31_t)0x75c94d25, (q31_t)0x75c6d762, (q31_t)0x75c46156, (q31_t)0x75c1eb01, (q31_t)0x75bf7464, (q31_t)0x75bcfd7e, (q31_t)0x75ba864f,
+  (q31_t)0x75b80ed8, (q31_t)0x75b59718, (q31_t)0x75b31f0f, (q31_t)0x75b0a6be, (q31_t)0x75ae2e25, (q31_t)0x75abb542, (q31_t)0x75a93c18, (q31_t)0x75a6c2a4,
+  (q31_t)0x75a448e8, (q31_t)0x75a1cee4, (q31_t)0x759f5496, (q31_t)0x759cda01, (q31_t)0x759a5f22, (q31_t)0x7597e3fc, (q31_t)0x7595688c, (q31_t)0x7592ecd4,
+  (q31_t)0x759070d4, (q31_t)0x758df48b, (q31_t)0x758b77fa, (q31_t)0x7588fb20, (q31_t)0x75867dfd, (q31_t)0x75840093, (q31_t)0x758182df, (q31_t)0x757f04e3,
+  (q31_t)0x757c869f, (q31_t)0x757a0812, (q31_t)0x7577893d, (q31_t)0x75750a1f, (q31_t)0x75728ab9, (q31_t)0x75700b0a, (q31_t)0x756d8b13, (q31_t)0x756b0ad3,
+  (q31_t)0x75688a4b, (q31_t)0x7566097b, (q31_t)0x75638862, (q31_t)0x75610701, (q31_t)0x755e8557, (q31_t)0x755c0365, (q31_t)0x7559812b, (q31_t)0x7556fea8,
+  (q31_t)0x75547bdd, (q31_t)0x7551f8c9, (q31_t)0x754f756e, (q31_t)0x754cf1c9, (q31_t)0x754a6ddd, (q31_t)0x7547e9a8, (q31_t)0x7545652a, (q31_t)0x7542e065,
+  (q31_t)0x75405b57, (q31_t)0x753dd600, (q31_t)0x753b5061, (q31_t)0x7538ca7b, (q31_t)0x7536444b, (q31_t)0x7533bdd4, (q31_t)0x75313714, (q31_t)0x752eb00c,
+  (q31_t)0x752c28bb, (q31_t)0x7529a122, (q31_t)0x75271941, (q31_t)0x75249118, (q31_t)0x752208a7, (q31_t)0x751f7fed, (q31_t)0x751cf6eb, (q31_t)0x751a6da0,
+  (q31_t)0x7517e40e, (q31_t)0x75155a33, (q31_t)0x7512d010, (q31_t)0x751045a5, (q31_t)0x750dbaf2, (q31_t)0x750b2ff6, (q31_t)0x7508a4b2, (q31_t)0x75061926,
+  (q31_t)0x75038d52, (q31_t)0x75010136, (q31_t)0x74fe74d1, (q31_t)0x74fbe825, (q31_t)0x74f95b30, (q31_t)0x74f6cdf3, (q31_t)0x74f4406d, (q31_t)0x74f1b2a0,
+  (q31_t)0x74ef248b, (q31_t)0x74ec962d, (q31_t)0x74ea0787, (q31_t)0x74e7789a, (q31_t)0x74e4e964, (q31_t)0x74e259e6, (q31_t)0x74dfca20, (q31_t)0x74dd3a11,
+  (q31_t)0x74daa9bb, (q31_t)0x74d8191d, (q31_t)0x74d58836, (q31_t)0x74d2f708, (q31_t)0x74d06591, (q31_t)0x74cdd3d2, (q31_t)0x74cb41cc, (q31_t)0x74c8af7d,
+  (q31_t)0x74c61ce6, (q31_t)0x74c38a07, (q31_t)0x74c0f6e0, (q31_t)0x74be6372, (q31_t)0x74bbcfbb, (q31_t)0x74b93bbc, (q31_t)0x74b6a775, (q31_t)0x74b412e6,
+  (q31_t)0x74b17e0f, (q31_t)0x74aee8f0, (q31_t)0x74ac5389, (q31_t)0x74a9bddb, (q31_t)0x74a727e4, (q31_t)0x74a491a5, (q31_t)0x74a1fb1e, (q31_t)0x749f6450,
+  (q31_t)0x749ccd39, (q31_t)0x749a35db, (q31_t)0x74979e34, (q31_t)0x74950646, (q31_t)0x74926e10, (q31_t)0x748fd592, (q31_t)0x748d3ccb, (q31_t)0x748aa3be,
+  (q31_t)0x74880a68, (q31_t)0x748570ca, (q31_t)0x7482d6e4, (q31_t)0x74803cb7, (q31_t)0x747da242, (q31_t)0x747b0784, (q31_t)0x74786c7f, (q31_t)0x7475d132,
+  (q31_t)0x7473359e, (q31_t)0x747099c1, (q31_t)0x746dfd9d, (q31_t)0x746b6131, (q31_t)0x7468c47c, (q31_t)0x74662781, (q31_t)0x74638a3d, (q31_t)0x7460ecb2,
+  (q31_t)0x745e4ede, (q31_t)0x745bb0c3, (q31_t)0x74591261, (q31_t)0x745673b6, (q31_t)0x7453d4c4, (q31_t)0x7451358a, (q31_t)0x744e9608, (q31_t)0x744bf63e,
+  (q31_t)0x7449562d, (q31_t)0x7446b5d4, (q31_t)0x74441533, (q31_t)0x7441744b, (q31_t)0x743ed31b, (q31_t)0x743c31a3, (q31_t)0x74398fe3, (q31_t)0x7436eddc,
+  (q31_t)0x74344b8d, (q31_t)0x7431a8f6, (q31_t)0x742f0618, (q31_t)0x742c62f2, (q31_t)0x7429bf84, (q31_t)0x74271bcf, (q31_t)0x742477d2, (q31_t)0x7421d38e,
+  (q31_t)0x741f2f01, (q31_t)0x741c8a2d, (q31_t)0x7419e512, (q31_t)0x74173faf, (q31_t)0x74149a04, (q31_t)0x7411f412, (q31_t)0x740f4dd8, (q31_t)0x740ca756,
+  (q31_t)0x740a008d, (q31_t)0x7407597d, (q31_t)0x7404b224, (q31_t)0x74020a85, (q31_t)0x73ff629d, (q31_t)0x73fcba6e, (q31_t)0x73fa11f8, (q31_t)0x73f7693a,
+  (q31_t)0x73f4c034, (q31_t)0x73f216e7, (q31_t)0x73ef6d53, (q31_t)0x73ecc377, (q31_t)0x73ea1953, (q31_t)0x73e76ee8, (q31_t)0x73e4c435, (q31_t)0x73e2193b,
+  (q31_t)0x73df6df9, (q31_t)0x73dcc270, (q31_t)0x73da16a0, (q31_t)0x73d76a88, (q31_t)0x73d4be28, (q31_t)0x73d21182, (q31_t)0x73cf6493, (q31_t)0x73ccb75d,
+  (q31_t)0x73ca09e0, (q31_t)0x73c75c1c, (q31_t)0x73c4ae10, (q31_t)0x73c1ffbc, (q31_t)0x73bf5121, (q31_t)0x73bca23f, (q31_t)0x73b9f315, (q31_t)0x73b743a4,
+  (q31_t)0x73b493ec, (q31_t)0x73b1e3ec, (q31_t)0x73af33a5, (q31_t)0x73ac8316, (q31_t)0x73a9d240, (q31_t)0x73a72123, (q31_t)0x73a46fbf, (q31_t)0x73a1be13,
+  (q31_t)0x739f0c20, (q31_t)0x739c59e5, (q31_t)0x7399a763, (q31_t)0x7396f49a, (q31_t)0x73944189, (q31_t)0x73918e32, (q31_t)0x738eda93, (q31_t)0x738c26ac,
+  (q31_t)0x7389727f, (q31_t)0x7386be0a, (q31_t)0x7384094e, (q31_t)0x7381544a, (q31_t)0x737e9f00, (q31_t)0x737be96e, (q31_t)0x73793395, (q31_t)0x73767d74,
+  (q31_t)0x7373c70d, (q31_t)0x7371105e, (q31_t)0x736e5968, (q31_t)0x736ba22b, (q31_t)0x7368eaa6, (q31_t)0x736632db, (q31_t)0x73637ac8, (q31_t)0x7360c26e,
+  (q31_t)0x735e09cd, (q31_t)0x735b50e4, (q31_t)0x735897b5, (q31_t)0x7355de3e, (q31_t)0x73532481, (q31_t)0x73506a7c, (q31_t)0x734db030, (q31_t)0x734af59d,
+  (q31_t)0x73483ac2, (q31_t)0x73457fa1, (q31_t)0x7342c438, (q31_t)0x73400889, (q31_t)0x733d4c92, (q31_t)0x733a9054, (q31_t)0x7337d3d0, (q31_t)0x73351704,
+  (q31_t)0x733259f1, (q31_t)0x732f9c97, (q31_t)0x732cdef6, (q31_t)0x732a210d, (q31_t)0x732762de, (q31_t)0x7324a468, (q31_t)0x7321e5ab, (q31_t)0x731f26a7,
+  (q31_t)0x731c675b, (q31_t)0x7319a7c9, (q31_t)0x7316e7f0, (q31_t)0x731427cf, (q31_t)0x73116768, (q31_t)0x730ea6ba, (q31_t)0x730be5c5, (q31_t)0x73092489,
+  (q31_t)0x73066306, (q31_t)0x7303a13b, (q31_t)0x7300df2a, (q31_t)0x72fe1cd2, (q31_t)0x72fb5a34, (q31_t)0x72f8974e, (q31_t)0x72f5d421, (q31_t)0x72f310ad,
+  (q31_t)0x72f04cf3, (q31_t)0x72ed88f1, (q31_t)0x72eac4a9, (q31_t)0x72e8001a, (q31_t)0x72e53b44, (q31_t)0x72e27627, (q31_t)0x72dfb0c3, (q31_t)0x72dceb18,
+  (q31_t)0x72da2526, (q31_t)0x72d75eee, (q31_t)0x72d4986f, (q31_t)0x72d1d1a9, (q31_t)0x72cf0a9c, (q31_t)0x72cc4348, (q31_t)0x72c97bad, (q31_t)0x72c6b3cc,
+  (q31_t)0x72c3eba4, (q31_t)0x72c12335, (q31_t)0x72be5a7f, (q31_t)0x72bb9183, (q31_t)0x72b8c83f, (q31_t)0x72b5feb5, (q31_t)0x72b334e4, (q31_t)0x72b06acd,
+  (q31_t)0x72ada06f, (q31_t)0x72aad5c9, (q31_t)0x72a80ade, (q31_t)0x72a53fab, (q31_t)0x72a27432, (q31_t)0x729fa872, (q31_t)0x729cdc6b, (q31_t)0x729a101e,
+  (q31_t)0x7297438a, (q31_t)0x729476af, (q31_t)0x7291a98e, (q31_t)0x728edc26, (q31_t)0x728c0e77, (q31_t)0x72894082, (q31_t)0x72867245, (q31_t)0x7283a3c3,
+  (q31_t)0x7280d4f9, (q31_t)0x727e05e9, (q31_t)0x727b3693, (q31_t)0x727866f6, (q31_t)0x72759712, (q31_t)0x7272c6e7, (q31_t)0x726ff676, (q31_t)0x726d25bf,
+  (q31_t)0x726a54c1, (q31_t)0x7267837c, (q31_t)0x7264b1f0, (q31_t)0x7261e01e, (q31_t)0x725f0e06, (q31_t)0x725c3ba7, (q31_t)0x72596901, (q31_t)0x72569615,
+  (q31_t)0x7253c2e3, (q31_t)0x7250ef6a, (q31_t)0x724e1baa, (q31_t)0x724b47a4, (q31_t)0x72487357, (q31_t)0x72459ec4, (q31_t)0x7242c9ea, (q31_t)0x723ff4ca,
+  (q31_t)0x723d1f63, (q31_t)0x723a49b6, (q31_t)0x723773c3, (q31_t)0x72349d89, (q31_t)0x7231c708, (q31_t)0x722ef041, (q31_t)0x722c1934, (q31_t)0x722941e0,
+  (q31_t)0x72266a46, (q31_t)0x72239266, (q31_t)0x7220ba3f, (q31_t)0x721de1d1, (q31_t)0x721b091d, (q31_t)0x72183023, (q31_t)0x721556e3, (q31_t)0x72127d5c,
+  (q31_t)0x720fa38e, (q31_t)0x720cc97b, (q31_t)0x7209ef21, (q31_t)0x72071480, (q31_t)0x7204399a, (q31_t)0x72015e6d, (q31_t)0x71fe82f9, (q31_t)0x71fba740,
+  (q31_t)0x71f8cb40, (q31_t)0x71f5eefa, (q31_t)0x71f3126d, (q31_t)0x71f0359a, (q31_t)0x71ed5881, (q31_t)0x71ea7b22, (q31_t)0x71e79d7c, (q31_t)0x71e4bf90,
+  (q31_t)0x71e1e15e, (q31_t)0x71df02e5, (q31_t)0x71dc2427, (q31_t)0x71d94522, (q31_t)0x71d665d6, (q31_t)0x71d38645, (q31_t)0x71d0a66d, (q31_t)0x71cdc650,
+  (q31_t)0x71cae5ec, (q31_t)0x71c80542, (q31_t)0x71c52451, (q31_t)0x71c2431b, (q31_t)0x71bf619e, (q31_t)0x71bc7fdb, (q31_t)0x71b99dd2, (q31_t)0x71b6bb83,
+  (q31_t)0x71b3d8ed, (q31_t)0x71b0f612, (q31_t)0x71ae12f0, (q31_t)0x71ab2f89, (q31_t)0x71a84bdb, (q31_t)0x71a567e7, (q31_t)0x71a283ad, (q31_t)0x719f9f2c,
+  (q31_t)0x719cba66, (q31_t)0x7199d55a, (q31_t)0x7196f008, (q31_t)0x71940a6f, (q31_t)0x71912490, (q31_t)0x718e3e6c, (q31_t)0x718b5801, (q31_t)0x71887151,
+  (q31_t)0x71858a5a, (q31_t)0x7182a31d, (q31_t)0x717fbb9a, (q31_t)0x717cd3d2, (q31_t)0x7179ebc3, (q31_t)0x7177036e, (q31_t)0x71741ad3, (q31_t)0x717131f3,
+  (q31_t)0x716e48cc, (q31_t)0x716b5f5f, (q31_t)0x716875ad, (q31_t)0x71658bb4, (q31_t)0x7162a175, (q31_t)0x715fb6f1, (q31_t)0x715ccc26, (q31_t)0x7159e116,
+  (q31_t)0x7156f5c0, (q31_t)0x71540a24, (q31_t)0x71511e42, (q31_t)0x714e321a, (q31_t)0x714b45ac, (q31_t)0x714858f8, (q31_t)0x71456bfe, (q31_t)0x71427ebf,
+  (q31_t)0x713f9139, (q31_t)0x713ca36e, (q31_t)0x7139b55d, (q31_t)0x7136c706, (q31_t)0x7133d869, (q31_t)0x7130e987, (q31_t)0x712dfa5e, (q31_t)0x712b0af0,
+  (q31_t)0x71281b3c, (q31_t)0x71252b42, (q31_t)0x71223b02, (q31_t)0x711f4a7d, (q31_t)0x711c59b2, (q31_t)0x711968a1, (q31_t)0x7116774a, (q31_t)0x711385ad,
+  (q31_t)0x711093cb, (q31_t)0x710da1a3, (q31_t)0x710aaf35, (q31_t)0x7107bc82, (q31_t)0x7104c989, (q31_t)0x7101d64a, (q31_t)0x70fee2c5, (q31_t)0x70fbeefb,
+  (q31_t)0x70f8faeb, (q31_t)0x70f60695, (q31_t)0x70f311fa, (q31_t)0x70f01d19, (q31_t)0x70ed27f2, (q31_t)0x70ea3286, (q31_t)0x70e73cd4, (q31_t)0x70e446dc,
+  (q31_t)0x70e1509f, (q31_t)0x70de5a1c, (q31_t)0x70db6353, (q31_t)0x70d86c45, (q31_t)0x70d574f1, (q31_t)0x70d27d58, (q31_t)0x70cf8579, (q31_t)0x70cc8d54,
+  (q31_t)0x70c994ea, (q31_t)0x70c69c3a, (q31_t)0x70c3a345, (q31_t)0x70c0aa0a, (q31_t)0x70bdb08a, (q31_t)0x70bab6c4, (q31_t)0x70b7bcb8, (q31_t)0x70b4c267,
+  (q31_t)0x70b1c7d1, (q31_t)0x70aeccf5, (q31_t)0x70abd1d3, (q31_t)0x70a8d66c, (q31_t)0x70a5dac0, (q31_t)0x70a2dece, (q31_t)0x709fe296, (q31_t)0x709ce619,
+  (q31_t)0x7099e957, (q31_t)0x7096ec4f, (q31_t)0x7093ef01, (q31_t)0x7090f16e, (q31_t)0x708df396, (q31_t)0x708af579, (q31_t)0x7087f715, (q31_t)0x7084f86d,
+  (q31_t)0x7081f97f, (q31_t)0x707efa4c, (q31_t)0x707bfad3, (q31_t)0x7078fb15, (q31_t)0x7075fb11, (q31_t)0x7072fac9, (q31_t)0x706ffa3a, (q31_t)0x706cf967,
+  (q31_t)0x7069f84e, (q31_t)0x7066f6f0, (q31_t)0x7063f54c, (q31_t)0x7060f363, (q31_t)0x705df135, (q31_t)0x705aeec1, (q31_t)0x7057ec08, (q31_t)0x7054e90a,
+  (q31_t)0x7051e5c7, (q31_t)0x704ee23e, (q31_t)0x704bde70, (q31_t)0x7048da5d, (q31_t)0x7045d604, (q31_t)0x7042d166, (q31_t)0x703fcc83, (q31_t)0x703cc75b,
+  (q31_t)0x7039c1ed, (q31_t)0x7036bc3b, (q31_t)0x7033b643, (q31_t)0x7030b005, (q31_t)0x702da983, (q31_t)0x702aa2bb, (q31_t)0x70279baf, (q31_t)0x7024945d,
+  (q31_t)0x70218cc6, (q31_t)0x701e84e9, (q31_t)0x701b7cc8, (q31_t)0x70187461, (q31_t)0x70156bb5, (q31_t)0x701262c4, (q31_t)0x700f598e, (q31_t)0x700c5013,
+  (q31_t)0x70094653, (q31_t)0x70063c4e, (q31_t)0x70033203, (q31_t)0x70002774, (q31_t)0x6ffd1c9f, (q31_t)0x6ffa1185, (q31_t)0x6ff70626, (q31_t)0x6ff3fa82,
+  (q31_t)0x6ff0ee99, (q31_t)0x6fede26b, (q31_t)0x6fead5f8, (q31_t)0x6fe7c940, (q31_t)0x6fe4bc43, (q31_t)0x6fe1af01, (q31_t)0x6fdea17a, (q31_t)0x6fdb93ae,
+  (q31_t)0x6fd8859d, (q31_t)0x6fd57746, (q31_t)0x6fd268ab, (q31_t)0x6fcf59cb, (q31_t)0x6fcc4aa6, (q31_t)0x6fc93b3c, (q31_t)0x6fc62b8d, (q31_t)0x6fc31b99,
+  (q31_t)0x6fc00b60, (q31_t)0x6fbcfae2, (q31_t)0x6fb9ea20, (q31_t)0x6fb6d918, (q31_t)0x6fb3c7cb, (q31_t)0x6fb0b63a, (q31_t)0x6fada464, (q31_t)0x6faa9248,
+  (q31_t)0x6fa77fe8, (q31_t)0x6fa46d43, (q31_t)0x6fa15a59, (q31_t)0x6f9e472b, (q31_t)0x6f9b33b7, (q31_t)0x6f981fff, (q31_t)0x6f950c01, (q31_t)0x6f91f7bf,
+  (q31_t)0x6f8ee338, (q31_t)0x6f8bce6c, (q31_t)0x6f88b95c, (q31_t)0x6f85a407, (q31_t)0x6f828e6c, (q31_t)0x6f7f788d, (q31_t)0x6f7c626a, (q31_t)0x6f794c01,
+  (q31_t)0x6f763554, (q31_t)0x6f731e62, (q31_t)0x6f70072b, (q31_t)0x6f6cefb0, (q31_t)0x6f69d7f0, (q31_t)0x6f66bfeb, (q31_t)0x6f63a7a1, (q31_t)0x6f608f13,
+  (q31_t)0x6f5d7640, (q31_t)0x6f5a5d28, (q31_t)0x6f5743cb, (q31_t)0x6f542a2a, (q31_t)0x6f511044, (q31_t)0x6f4df61a, (q31_t)0x6f4adbab, (q31_t)0x6f47c0f7,
+  (q31_t)0x6f44a5ff, (q31_t)0x6f418ac2, (q31_t)0x6f3e6f40, (q31_t)0x6f3b537a, (q31_t)0x6f38376f, (q31_t)0x6f351b1f, (q31_t)0x6f31fe8b, (q31_t)0x6f2ee1b2,
+  (q31_t)0x6f2bc495, (q31_t)0x6f28a733, (q31_t)0x6f25898d, (q31_t)0x6f226ba2, (q31_t)0x6f1f4d72, (q31_t)0x6f1c2efe, (q31_t)0x6f191045, (q31_t)0x6f15f148,
+  (q31_t)0x6f12d206, (q31_t)0x6f0fb280, (q31_t)0x6f0c92b6, (q31_t)0x6f0972a6, (q31_t)0x6f065253, (q31_t)0x6f0331ba, (q31_t)0x6f0010de, (q31_t)0x6efcefbd,
+  (q31_t)0x6ef9ce57, (q31_t)0x6ef6acad, (q31_t)0x6ef38abe, (q31_t)0x6ef0688b, (q31_t)0x6eed4614, (q31_t)0x6eea2358, (q31_t)0x6ee70058, (q31_t)0x6ee3dd13,
+  (q31_t)0x6ee0b98a, (q31_t)0x6edd95bd, (q31_t)0x6eda71ab, (q31_t)0x6ed74d55, (q31_t)0x6ed428ba, (q31_t)0x6ed103db, (q31_t)0x6ecddeb8, (q31_t)0x6ecab950,
+  (q31_t)0x6ec793a4, (q31_t)0x6ec46db4, (q31_t)0x6ec1477f, (q31_t)0x6ebe2106, (q31_t)0x6ebafa49, (q31_t)0x6eb7d347, (q31_t)0x6eb4ac02, (q31_t)0x6eb18477,
+  (q31_t)0x6eae5ca9, (q31_t)0x6eab3496, (q31_t)0x6ea80c3f, (q31_t)0x6ea4e3a4, (q31_t)0x6ea1bac4, (q31_t)0x6e9e91a1, (q31_t)0x6e9b6839, (q31_t)0x6e983e8d,
+  (q31_t)0x6e95149c, (q31_t)0x6e91ea67, (q31_t)0x6e8ebfef, (q31_t)0x6e8b9532, (q31_t)0x6e886a30, (q31_t)0x6e853eeb, (q31_t)0x6e821361, (q31_t)0x6e7ee794,
+  (q31_t)0x6e7bbb82, (q31_t)0x6e788f2c, (q31_t)0x6e756291, (q31_t)0x6e7235b3, (q31_t)0x6e6f0890, (q31_t)0x6e6bdb2a, (q31_t)0x6e68ad7f, (q31_t)0x6e657f90,
+  (q31_t)0x6e62515d, (q31_t)0x6e5f22e6, (q31_t)0x6e5bf42b, (q31_t)0x6e58c52c, (q31_t)0x6e5595e9, (q31_t)0x6e526662, (q31_t)0x6e4f3696, (q31_t)0x6e4c0687,
+  (q31_t)0x6e48d633, (q31_t)0x6e45a59c, (q31_t)0x6e4274c1, (q31_t)0x6e3f43a1, (q31_t)0x6e3c123e, (q31_t)0x6e38e096, (q31_t)0x6e35aeab, (q31_t)0x6e327c7b,
+  (q31_t)0x6e2f4a08, (q31_t)0x6e2c1750, (q31_t)0x6e28e455, (q31_t)0x6e25b115, (q31_t)0x6e227d92, (q31_t)0x6e1f49cb, (q31_t)0x6e1c15c0, (q31_t)0x6e18e171,
+  (q31_t)0x6e15acde, (q31_t)0x6e127807, (q31_t)0x6e0f42ec, (q31_t)0x6e0c0d8e, (q31_t)0x6e08d7eb, (q31_t)0x6e05a205, (q31_t)0x6e026bda, (q31_t)0x6dff356c,
+  (q31_t)0x6dfbfeba, (q31_t)0x6df8c7c4, (q31_t)0x6df5908b, (q31_t)0x6df2590d, (q31_t)0x6def214c, (q31_t)0x6debe947, (q31_t)0x6de8b0fe, (q31_t)0x6de57871,
+  (q31_t)0x6de23fa0, (q31_t)0x6ddf068c, (q31_t)0x6ddbcd34, (q31_t)0x6dd89398, (q31_t)0x6dd559b9, (q31_t)0x6dd21f95, (q31_t)0x6dcee52e, (q31_t)0x6dcbaa83,
+  (q31_t)0x6dc86f95, (q31_t)0x6dc53462, (q31_t)0x6dc1f8ec, (q31_t)0x6dbebd33, (q31_t)0x6dbb8135, (q31_t)0x6db844f4, (q31_t)0x6db5086f, (q31_t)0x6db1cba7,
+  (q31_t)0x6dae8e9b, (q31_t)0x6dab514b, (q31_t)0x6da813b8, (q31_t)0x6da4d5e1, (q31_t)0x6da197c6, (q31_t)0x6d9e5968, (q31_t)0x6d9b1ac6, (q31_t)0x6d97dbe0,
+  (q31_t)0x6d949cb7, (q31_t)0x6d915d4a, (q31_t)0x6d8e1d9a, (q31_t)0x6d8adda6, (q31_t)0x6d879d6e, (q31_t)0x6d845cf3, (q31_t)0x6d811c35, (q31_t)0x6d7ddb33,
+  (q31_t)0x6d7a99ed, (q31_t)0x6d775864, (q31_t)0x6d741697, (q31_t)0x6d70d487, (q31_t)0x6d6d9233, (q31_t)0x6d6a4f9c, (q31_t)0x6d670cc1, (q31_t)0x6d63c9a3,
+  (q31_t)0x6d608641, (q31_t)0x6d5d429c, (q31_t)0x6d59feb3, (q31_t)0x6d56ba87, (q31_t)0x6d537617, (q31_t)0x6d503164, (q31_t)0x6d4cec6e, (q31_t)0x6d49a734,
+  (q31_t)0x6d4661b7, (q31_t)0x6d431bf6, (q31_t)0x6d3fd5f2, (q31_t)0x6d3c8fab, (q31_t)0x6d394920, (q31_t)0x6d360252, (q31_t)0x6d32bb40, (q31_t)0x6d2f73eb,
+  (q31_t)0x6d2c2c53, (q31_t)0x6d28e477, (q31_t)0x6d259c58, (q31_t)0x6d2253f6, (q31_t)0x6d1f0b50, (q31_t)0x6d1bc267, (q31_t)0x6d18793b, (q31_t)0x6d152fcc,
+  (q31_t)0x6d11e619, (q31_t)0x6d0e9c23, (q31_t)0x6d0b51e9, (q31_t)0x6d08076d, (q31_t)0x6d04bcad, (q31_t)0x6d0171aa, (q31_t)0x6cfe2663, (q31_t)0x6cfadada,
+  (q31_t)0x6cf78f0d, (q31_t)0x6cf442fd, (q31_t)0x6cf0f6aa, (q31_t)0x6cedaa13, (q31_t)0x6cea5d3a, (q31_t)0x6ce7101d, (q31_t)0x6ce3c2bd, (q31_t)0x6ce0751a,
+  (q31_t)0x6cdd2733, (q31_t)0x6cd9d90a, (q31_t)0x6cd68a9d, (q31_t)0x6cd33bed, (q31_t)0x6ccfecfa, (q31_t)0x6ccc9dc4, (q31_t)0x6cc94e4b, (q31_t)0x6cc5fe8f,
+  (q31_t)0x6cc2ae90, (q31_t)0x6cbf5e4d, (q31_t)0x6cbc0dc8, (q31_t)0x6cb8bcff, (q31_t)0x6cb56bf4, (q31_t)0x6cb21aa5, (q31_t)0x6caec913, (q31_t)0x6cab773e,
+  (q31_t)0x6ca82527, (q31_t)0x6ca4d2cc, (q31_t)0x6ca1802e, (q31_t)0x6c9e2d4d, (q31_t)0x6c9ada29, (q31_t)0x6c9786c2, (q31_t)0x6c943318, (q31_t)0x6c90df2c,
+  (q31_t)0x6c8d8afc, (q31_t)0x6c8a3689, (q31_t)0x6c86e1d3, (q31_t)0x6c838cdb, (q31_t)0x6c80379f, (q31_t)0x6c7ce220, (q31_t)0x6c798c5f, (q31_t)0x6c76365b,
+  (q31_t)0x6c72e013, (q31_t)0x6c6f8989, (q31_t)0x6c6c32bc, (q31_t)0x6c68dbac, (q31_t)0x6c658459, (q31_t)0x6c622cc4, (q31_t)0x6c5ed4eb, (q31_t)0x6c5b7cd0,
+  (q31_t)0x6c582472, (q31_t)0x6c54cbd1, (q31_t)0x6c5172ed, (q31_t)0x6c4e19c6, (q31_t)0x6c4ac05d, (q31_t)0x6c4766b0, (q31_t)0x6c440cc1, (q31_t)0x6c40b28f,
+  (q31_t)0x6c3d581b, (q31_t)0x6c39fd63, (q31_t)0x6c36a269, (q31_t)0x6c33472c, (q31_t)0x6c2febad, (q31_t)0x6c2c8fea, (q31_t)0x6c2933e5, (q31_t)0x6c25d79d,
+  (q31_t)0x6c227b13, (q31_t)0x6c1f1e45, (q31_t)0x6c1bc136, (q31_t)0x6c1863e3, (q31_t)0x6c15064e, (q31_t)0x6c11a876, (q31_t)0x6c0e4a5b, (q31_t)0x6c0aebfe,
+  (q31_t)0x6c078d5e, (q31_t)0x6c042e7b, (q31_t)0x6c00cf56, (q31_t)0x6bfd6fee, (q31_t)0x6bfa1044, (q31_t)0x6bf6b056, (q31_t)0x6bf35027, (q31_t)0x6befefb5,
+  (q31_t)0x6bec8f00, (q31_t)0x6be92e08, (q31_t)0x6be5ccce, (q31_t)0x6be26b52, (q31_t)0x6bdf0993, (q31_t)0x6bdba791, (q31_t)0x6bd8454d, (q31_t)0x6bd4e2c6,
+  (q31_t)0x6bd17ffd, (q31_t)0x6bce1cf1, (q31_t)0x6bcab9a3, (q31_t)0x6bc75613, (q31_t)0x6bc3f23f, (q31_t)0x6bc08e2a, (q31_t)0x6bbd29d2, (q31_t)0x6bb9c537,
+  (q31_t)0x6bb6605a, (q31_t)0x6bb2fb3b, (q31_t)0x6baf95d9, (q31_t)0x6bac3034, (q31_t)0x6ba8ca4e, (q31_t)0x6ba56425, (q31_t)0x6ba1fdb9, (q31_t)0x6b9e970b,
+  (q31_t)0x6b9b301b, (q31_t)0x6b97c8e8, (q31_t)0x6b946173, (q31_t)0x6b90f9bc, (q31_t)0x6b8d91c2, (q31_t)0x6b8a2986, (q31_t)0x6b86c107, (q31_t)0x6b835846,
+  (q31_t)0x6b7fef43, (q31_t)0x6b7c85fe, (q31_t)0x6b791c76, (q31_t)0x6b75b2ac, (q31_t)0x6b7248a0, (q31_t)0x6b6ede51, (q31_t)0x6b6b73c0, (q31_t)0x6b6808ed,
+  (q31_t)0x6b649dd8, (q31_t)0x6b613280, (q31_t)0x6b5dc6e6, (q31_t)0x6b5a5b0a, (q31_t)0x6b56eeec, (q31_t)0x6b53828b, (q31_t)0x6b5015e9, (q31_t)0x6b4ca904,
+  (q31_t)0x6b493bdd, (q31_t)0x6b45ce73, (q31_t)0x6b4260c8, (q31_t)0x6b3ef2da, (q31_t)0x6b3b84ab, (q31_t)0x6b381639, (q31_t)0x6b34a785, (q31_t)0x6b31388e,
+  (q31_t)0x6b2dc956, (q31_t)0x6b2a59dc, (q31_t)0x6b26ea1f, (q31_t)0x6b237a21, (q31_t)0x6b2009e0, (q31_t)0x6b1c995d, (q31_t)0x6b192898, (q31_t)0x6b15b791,
+  (q31_t)0x6b124648, (q31_t)0x6b0ed4bd, (q31_t)0x6b0b62f0, (q31_t)0x6b07f0e1, (q31_t)0x6b047e90, (q31_t)0x6b010bfd, (q31_t)0x6afd9928, (q31_t)0x6afa2610,
+  (q31_t)0x6af6b2b7, (q31_t)0x6af33f1c, (q31_t)0x6aefcb3f, (q31_t)0x6aec5720, (q31_t)0x6ae8e2bf, (q31_t)0x6ae56e1c, (q31_t)0x6ae1f937, (q31_t)0x6ade8410,
+  (q31_t)0x6adb0ea8, (q31_t)0x6ad798fd, (q31_t)0x6ad42311, (q31_t)0x6ad0ace2, (q31_t)0x6acd3672, (q31_t)0x6ac9bfc0, (q31_t)0x6ac648cb, (q31_t)0x6ac2d195,
+  (q31_t)0x6abf5a1e, (q31_t)0x6abbe264, (q31_t)0x6ab86a68, (q31_t)0x6ab4f22b, (q31_t)0x6ab179ac, (q31_t)0x6aae00eb, (q31_t)0x6aaa87e8, (q31_t)0x6aa70ea4,
+  (q31_t)0x6aa3951d, (q31_t)0x6aa01b55, (q31_t)0x6a9ca14b, (q31_t)0x6a992700, (q31_t)0x6a95ac72, (q31_t)0x6a9231a3, (q31_t)0x6a8eb692, (q31_t)0x6a8b3b3f,
+  (q31_t)0x6a87bfab, (q31_t)0x6a8443d5, (q31_t)0x6a80c7bd, (q31_t)0x6a7d4b64, (q31_t)0x6a79cec8, (q31_t)0x6a7651ec, (q31_t)0x6a72d4cd, (q31_t)0x6a6f576d,
+  (q31_t)0x6a6bd9cb, (q31_t)0x6a685be8, (q31_t)0x6a64ddc2, (q31_t)0x6a615f5c, (q31_t)0x6a5de0b3, (q31_t)0x6a5a61c9, (q31_t)0x6a56e29e, (q31_t)0x6a536331,
+  (q31_t)0x6a4fe382, (q31_t)0x6a4c6391, (q31_t)0x6a48e360, (q31_t)0x6a4562ec, (q31_t)0x6a41e237, (q31_t)0x6a3e6140, (q31_t)0x6a3ae008, (q31_t)0x6a375e8f,
+  (q31_t)0x6a33dcd4, (q31_t)0x6a305ad7, (q31_t)0x6a2cd899, (q31_t)0x6a295619, (q31_t)0x6a25d358, (q31_t)0x6a225055, (q31_t)0x6a1ecd11, (q31_t)0x6a1b498c,
+  (q31_t)0x6a17c5c5, (q31_t)0x6a1441bc, (q31_t)0x6a10bd72, (q31_t)0x6a0d38e7, (q31_t)0x6a09b41a, (q31_t)0x6a062f0c, (q31_t)0x6a02a9bc, (q31_t)0x69ff242b,
+  (q31_t)0x69fb9e59, (q31_t)0x69f81845, (q31_t)0x69f491f0, (q31_t)0x69f10b5a, (q31_t)0x69ed8482, (q31_t)0x69e9fd69, (q31_t)0x69e6760f, (q31_t)0x69e2ee73,
+  (q31_t)0x69df6696, (q31_t)0x69dbde77, (q31_t)0x69d85618, (q31_t)0x69d4cd77, (q31_t)0x69d14494, (q31_t)0x69cdbb71, (q31_t)0x69ca320c, (q31_t)0x69c6a866,
+  (q31_t)0x69c31e7f, (q31_t)0x69bf9456, (q31_t)0x69bc09ec, (q31_t)0x69b87f41, (q31_t)0x69b4f455, (q31_t)0x69b16928, (q31_t)0x69adddb9, (q31_t)0x69aa5209,
+  (q31_t)0x69a6c618, (q31_t)0x69a339e6, (q31_t)0x699fad73, (q31_t)0x699c20be, (q31_t)0x699893c9, (q31_t)0x69950692, (q31_t)0x6991791a, (q31_t)0x698deb61,
+  (q31_t)0x698a5d67, (q31_t)0x6986cf2c, (q31_t)0x698340af, (q31_t)0x697fb1f2, (q31_t)0x697c22f3, (q31_t)0x697893b4, (q31_t)0x69750433, (q31_t)0x69717472,
+  (q31_t)0x696de46f, (q31_t)0x696a542b, (q31_t)0x6966c3a6, (q31_t)0x696332e1, (q31_t)0x695fa1da, (q31_t)0x695c1092, (q31_t)0x69587f09, (q31_t)0x6954ed40,
+  (q31_t)0x69515b35, (q31_t)0x694dc8e9, (q31_t)0x694a365c, (q31_t)0x6946a38f, (q31_t)0x69431080, (q31_t)0x693f7d31, (q31_t)0x693be9a0, (q31_t)0x693855cf,
+  (q31_t)0x6934c1bd, (q31_t)0x69312d6a, (q31_t)0x692d98d6, (q31_t)0x692a0401, (q31_t)0x69266eeb, (q31_t)0x6922d995, (q31_t)0x691f43fd, (q31_t)0x691bae25,
+  (q31_t)0x6918180c, (q31_t)0x691481b2, (q31_t)0x6910eb17, (q31_t)0x690d543b, (q31_t)0x6909bd1f, (q31_t)0x690625c2, (q31_t)0x69028e24, (q31_t)0x68fef645,
+  (q31_t)0x68fb5e25, (q31_t)0x68f7c5c5, (q31_t)0x68f42d24, (q31_t)0x68f09442, (q31_t)0x68ecfb20, (q31_t)0x68e961bd, (q31_t)0x68e5c819, (q31_t)0x68e22e34,
+  (q31_t)0x68de940f, (q31_t)0x68daf9a9, (q31_t)0x68d75f02, (q31_t)0x68d3c41b, (q31_t)0x68d028f2, (q31_t)0x68cc8d8a, (q31_t)0x68c8f1e0, (q31_t)0x68c555f6,
+  (q31_t)0x68c1b9cc, (q31_t)0x68be1d61, (q31_t)0x68ba80b5, (q31_t)0x68b6e3c8, (q31_t)0x68b3469b, (q31_t)0x68afa92e, (q31_t)0x68ac0b7f, (q31_t)0x68a86d91,
+  (q31_t)0x68a4cf61, (q31_t)0x68a130f1, (q31_t)0x689d9241, (q31_t)0x6899f350, (q31_t)0x6896541f, (q31_t)0x6892b4ad, (q31_t)0x688f14fa, (q31_t)0x688b7507,
+  (q31_t)0x6887d4d4, (q31_t)0x68843460, (q31_t)0x688093ab, (q31_t)0x687cf2b6, (q31_t)0x68795181, (q31_t)0x6875b00b, (q31_t)0x68720e55, (q31_t)0x686e6c5e,
+  (q31_t)0x686aca27, (q31_t)0x686727b0, (q31_t)0x686384f8, (q31_t)0x685fe200, (q31_t)0x685c3ec7, (q31_t)0x68589b4e, (q31_t)0x6854f795, (q31_t)0x6851539b,
+  (q31_t)0x684daf61, (q31_t)0x684a0ae6, (q31_t)0x6846662c, (q31_t)0x6842c131, (q31_t)0x683f1bf5, (q31_t)0x683b7679, (q31_t)0x6837d0bd, (q31_t)0x68342ac1,
+  (q31_t)0x68308485, (q31_t)0x682cde08, (q31_t)0x6829374b, (q31_t)0x6825904d, (q31_t)0x6821e910, (q31_t)0x681e4192, (q31_t)0x681a99d4, (q31_t)0x6816f1d6,
+  (q31_t)0x68134997, (q31_t)0x680fa118, (q31_t)0x680bf85a, (q31_t)0x68084f5a, (q31_t)0x6804a61b, (q31_t)0x6800fc9c, (q31_t)0x67fd52dc, (q31_t)0x67f9a8dd,
+  (q31_t)0x67f5fe9d, (q31_t)0x67f2541d, (q31_t)0x67eea95d, (q31_t)0x67eafe5d, (q31_t)0x67e7531c, (q31_t)0x67e3a79c, (q31_t)0x67dffbdc, (q31_t)0x67dc4fdb,
+  (q31_t)0x67d8a39a, (q31_t)0x67d4f71a, (q31_t)0x67d14a59, (q31_t)0x67cd9d58, (q31_t)0x67c9f017, (q31_t)0x67c64297, (q31_t)0x67c294d6, (q31_t)0x67bee6d5,
+  (q31_t)0x67bb3894, (q31_t)0x67b78a13, (q31_t)0x67b3db53, (q31_t)0x67b02c52, (q31_t)0x67ac7d11, (q31_t)0x67a8cd91, (q31_t)0x67a51dd0, (q31_t)0x67a16dcf,
+  (q31_t)0x679dbd8f, (q31_t)0x679a0d0f, (q31_t)0x67965c4e, (q31_t)0x6792ab4e, (q31_t)0x678efa0e, (q31_t)0x678b488e, (q31_t)0x678796ce, (q31_t)0x6783e4cf,
+  (q31_t)0x6780328f, (q31_t)0x677c8010, (q31_t)0x6778cd50, (q31_t)0x67751a51, (q31_t)0x67716713, (q31_t)0x676db394, (q31_t)0x6769ffd5, (q31_t)0x67664bd7,
+  (q31_t)0x67629799, (q31_t)0x675ee31b, (q31_t)0x675b2e5e, (q31_t)0x67577960, (q31_t)0x6753c423, (q31_t)0x67500ea7, (q31_t)0x674c58ea, (q31_t)0x6748a2ee,
+  (q31_t)0x6744ecb2, (q31_t)0x67413636, (q31_t)0x673d7f7b, (q31_t)0x6739c880, (q31_t)0x67361145, (q31_t)0x673259ca, (q31_t)0x672ea210, (q31_t)0x672aea17,
+  (q31_t)0x672731dd, (q31_t)0x67237964, (q31_t)0x671fc0ac, (q31_t)0x671c07b4, (q31_t)0x67184e7c, (q31_t)0x67149504, (q31_t)0x6710db4d, (q31_t)0x670d2157,
+  (q31_t)0x67096721, (q31_t)0x6705acab, (q31_t)0x6701f1f6, (q31_t)0x66fe3701, (q31_t)0x66fa7bcd, (q31_t)0x66f6c059, (q31_t)0x66f304a6, (q31_t)0x66ef48b3,
+  (q31_t)0x66eb8c80, (q31_t)0x66e7d00f, (q31_t)0x66e4135d, (q31_t)0x66e0566c, (q31_t)0x66dc993c, (q31_t)0x66d8dbcd, (q31_t)0x66d51e1d, (q31_t)0x66d1602f,
+  (q31_t)0x66cda201, (q31_t)0x66c9e393, (q31_t)0x66c624e7, (q31_t)0x66c265fa, (q31_t)0x66bea6cf, (q31_t)0x66bae764, (q31_t)0x66b727ba, (q31_t)0x66b367d0,
+  (q31_t)0x66afa7a7, (q31_t)0x66abe73f, (q31_t)0x66a82697, (q31_t)0x66a465b0, (q31_t)0x66a0a489, (q31_t)0x669ce324, (q31_t)0x6699217f, (q31_t)0x66955f9b,
+  (q31_t)0x66919d77, (q31_t)0x668ddb14, (q31_t)0x668a1872, (q31_t)0x66865591, (q31_t)0x66829270, (q31_t)0x667ecf11, (q31_t)0x667b0b72, (q31_t)0x66774793,
+  (q31_t)0x66738376, (q31_t)0x666fbf19, (q31_t)0x666bfa7d, (q31_t)0x666835a2, (q31_t)0x66647088, (q31_t)0x6660ab2f, (q31_t)0x665ce596, (q31_t)0x66591fbf,
+  (q31_t)0x665559a8, (q31_t)0x66519352, (q31_t)0x664dccbd, (q31_t)0x664a05e9, (q31_t)0x66463ed6, (q31_t)0x66427784, (q31_t)0x663eaff2, (q31_t)0x663ae822,
+  (q31_t)0x66372012, (q31_t)0x663357c4, (q31_t)0x662f8f36, (q31_t)0x662bc66a, (q31_t)0x6627fd5e, (q31_t)0x66243413, (q31_t)0x66206a8a, (q31_t)0x661ca0c1,
+  (q31_t)0x6618d6b9, (q31_t)0x66150c73, (q31_t)0x661141ed, (q31_t)0x660d7729, (q31_t)0x6609ac25, (q31_t)0x6605e0e3, (q31_t)0x66021561, (q31_t)0x65fe49a1,
+  (q31_t)0x65fa7da2, (q31_t)0x65f6b164, (q31_t)0x65f2e4e7, (q31_t)0x65ef182b, (q31_t)0x65eb4b30, (q31_t)0x65e77df6, (q31_t)0x65e3b07e, (q31_t)0x65dfe2c6,
+  (q31_t)0x65dc14d0, (q31_t)0x65d8469b, (q31_t)0x65d47827, (q31_t)0x65d0a975, (q31_t)0x65ccda83, (q31_t)0x65c90b53, (q31_t)0x65c53be4, (q31_t)0x65c16c36,
+  (q31_t)0x65bd9c49, (q31_t)0x65b9cc1e, (q31_t)0x65b5fbb4, (q31_t)0x65b22b0b, (q31_t)0x65ae5a23, (q31_t)0x65aa88fd, (q31_t)0x65a6b798, (q31_t)0x65a2e5f4,
+  (q31_t)0x659f1412, (q31_t)0x659b41f1, (q31_t)0x65976f91, (q31_t)0x65939cf3, (q31_t)0x658fca15, (q31_t)0x658bf6fa, (q31_t)0x6588239f, (q31_t)0x65845006,
+  (q31_t)0x65807c2f, (q31_t)0x657ca818, (q31_t)0x6578d3c4, (q31_t)0x6574ff30, (q31_t)0x65712a5e, (q31_t)0x656d554d, (q31_t)0x65697ffe, (q31_t)0x6565aa71,
+  (q31_t)0x6561d4a4, (q31_t)0x655dfe99, (q31_t)0x655a2850, (q31_t)0x655651c8, (q31_t)0x65527b02, (q31_t)0x654ea3fd, (q31_t)0x654accba, (q31_t)0x6546f538,
+  (q31_t)0x65431d77, (q31_t)0x653f4579, (q31_t)0x653b6d3b, (q31_t)0x653794c0, (q31_t)0x6533bc06, (q31_t)0x652fe30d, (q31_t)0x652c09d6, (q31_t)0x65283061,
+  (q31_t)0x652456ad, (q31_t)0x65207cbb, (q31_t)0x651ca28a, (q31_t)0x6518c81b, (q31_t)0x6514ed6e, (q31_t)0x65111283, (q31_t)0x650d3759, (q31_t)0x65095bf0,
+  (q31_t)0x6505804a, (q31_t)0x6501a465, (q31_t)0x64fdc841, (q31_t)0x64f9ebe0, (q31_t)0x64f60f40, (q31_t)0x64f23262, (q31_t)0x64ee5546, (q31_t)0x64ea77eb,
+  (q31_t)0x64e69a52, (q31_t)0x64e2bc7b, (q31_t)0x64dede66, (q31_t)0x64db0012, (q31_t)0x64d72180, (q31_t)0x64d342b0, (q31_t)0x64cf63a2, (q31_t)0x64cb8456,
+  (q31_t)0x64c7a4cb, (q31_t)0x64c3c502, (q31_t)0x64bfe4fc, (q31_t)0x64bc04b6, (q31_t)0x64b82433, (q31_t)0x64b44372, (q31_t)0x64b06273, (q31_t)0x64ac8135,
+  (q31_t)0x64a89fba, (q31_t)0x64a4be00, (q31_t)0x64a0dc08, (q31_t)0x649cf9d2, (q31_t)0x6499175e, (q31_t)0x649534ac, (q31_t)0x649151bc, (q31_t)0x648d6e8e,
+  (q31_t)0x64898b22, (q31_t)0x6485a778, (q31_t)0x6481c390, (q31_t)0x647ddf6a, (q31_t)0x6479fb06, (q31_t)0x64761664, (q31_t)0x64723184, (q31_t)0x646e4c66,
+  (q31_t)0x646a670a, (q31_t)0x64668170, (q31_t)0x64629b98, (q31_t)0x645eb582, (q31_t)0x645acf2e, (q31_t)0x6456e89d, (q31_t)0x645301cd, (q31_t)0x644f1ac0,
+  (q31_t)0x644b3375, (q31_t)0x64474bec, (q31_t)0x64436425, (q31_t)0x643f7c20, (q31_t)0x643b93dd, (q31_t)0x6437ab5d, (q31_t)0x6433c29f, (q31_t)0x642fd9a3,
+  (q31_t)0x642bf069, (q31_t)0x642806f1, (q31_t)0x64241d3c, (q31_t)0x64203348, (q31_t)0x641c4917, (q31_t)0x64185ea9, (q31_t)0x641473fc, (q31_t)0x64108912,
+  (q31_t)0x640c9dea, (q31_t)0x6408b284, (q31_t)0x6404c6e1, (q31_t)0x6400db00, (q31_t)0x63fceee1, (q31_t)0x63f90285, (q31_t)0x63f515eb, (q31_t)0x63f12913,
+  (q31_t)0x63ed3bfd, (q31_t)0x63e94eaa, (q31_t)0x63e5611a, (q31_t)0x63e1734b, (q31_t)0x63dd853f, (q31_t)0x63d996f6, (q31_t)0x63d5a86f, (q31_t)0x63d1b9aa,
+  (q31_t)0x63cdcaa8, (q31_t)0x63c9db68, (q31_t)0x63c5ebeb, (q31_t)0x63c1fc30, (q31_t)0x63be0c37, (q31_t)0x63ba1c01, (q31_t)0x63b62b8e, (q31_t)0x63b23add,
+  (q31_t)0x63ae49ee, (q31_t)0x63aa58c2, (q31_t)0x63a66759, (q31_t)0x63a275b2, (q31_t)0x639e83cd, (q31_t)0x639a91ac, (q31_t)0x63969f4c, (q31_t)0x6392acaf,
+  (q31_t)0x638eb9d5, (q31_t)0x638ac6be, (q31_t)0x6386d369, (q31_t)0x6382dfd6, (q31_t)0x637eec07, (q31_t)0x637af7fa, (q31_t)0x637703af, (q31_t)0x63730f27,
+  (q31_t)0x636f1a62, (q31_t)0x636b2560, (q31_t)0x63673020, (q31_t)0x63633aa3, (q31_t)0x635f44e8, (q31_t)0x635b4ef0, (q31_t)0x635758bb, (q31_t)0x63536249,
+  (q31_t)0x634f6b99, (q31_t)0x634b74ad, (q31_t)0x63477d82, (q31_t)0x6343861b, (q31_t)0x633f8e76, (q31_t)0x633b9695, (q31_t)0x63379e76, (q31_t)0x6333a619,
+  (q31_t)0x632fad80, (q31_t)0x632bb4a9, (q31_t)0x6327bb96, (q31_t)0x6323c245, (q31_t)0x631fc8b7, (q31_t)0x631bceeb, (q31_t)0x6317d4e3, (q31_t)0x6313da9e,
+  (q31_t)0x630fe01b, (q31_t)0x630be55b, (q31_t)0x6307ea5e, (q31_t)0x6303ef25, (q31_t)0x62fff3ae, (q31_t)0x62fbf7fa, (q31_t)0x62f7fc08, (q31_t)0x62f3ffda,
+  (q31_t)0x62f0036f, (q31_t)0x62ec06c7, (q31_t)0x62e809e2, (q31_t)0x62e40cbf, (q31_t)0x62e00f60, (q31_t)0x62dc11c4, (q31_t)0x62d813eb, (q31_t)0x62d415d4,
+  (q31_t)0x62d01781, (q31_t)0x62cc18f1, (q31_t)0x62c81a24, (q31_t)0x62c41b1a, (q31_t)0x62c01bd3, (q31_t)0x62bc1c4f, (q31_t)0x62b81c8f, (q31_t)0x62b41c91,
+  (q31_t)0x62b01c57, (q31_t)0x62ac1bdf, (q31_t)0x62a81b2b, (q31_t)0x62a41a3a, (q31_t)0x62a0190c, (q31_t)0x629c17a1, (q31_t)0x629815fa, (q31_t)0x62941415,
+  (q31_t)0x629011f4, (q31_t)0x628c0f96, (q31_t)0x62880cfb, (q31_t)0x62840a23, (q31_t)0x6280070f, (q31_t)0x627c03be, (q31_t)0x62780030, (q31_t)0x6273fc65,
+  (q31_t)0x626ff85e, (q31_t)0x626bf41a, (q31_t)0x6267ef99, (q31_t)0x6263eadc, (q31_t)0x625fe5e1, (q31_t)0x625be0ab, (q31_t)0x6257db37, (q31_t)0x6253d587,
+  (q31_t)0x624fcf9a, (q31_t)0x624bc970, (q31_t)0x6247c30a, (q31_t)0x6243bc68, (q31_t)0x623fb588, (q31_t)0x623bae6c, (q31_t)0x6237a714, (q31_t)0x62339f7e,
+  (q31_t)0x622f97ad, (q31_t)0x622b8f9e, (q31_t)0x62278754, (q31_t)0x62237ecc, (q31_t)0x621f7608, (q31_t)0x621b6d08, (q31_t)0x621763cb, (q31_t)0x62135a51,
+  (q31_t)0x620f509b, (q31_t)0x620b46a9, (q31_t)0x62073c7a, (q31_t)0x6203320e, (q31_t)0x61ff2766, (q31_t)0x61fb1c82, (q31_t)0x61f71161, (q31_t)0x61f30604,
+  (q31_t)0x61eefa6b, (q31_t)0x61eaee95, (q31_t)0x61e6e282, (q31_t)0x61e2d633, (q31_t)0x61dec9a8, (q31_t)0x61dabce0, (q31_t)0x61d6afdd, (q31_t)0x61d2a29c,
+  (q31_t)0x61ce9520, (q31_t)0x61ca8767, (q31_t)0x61c67971, (q31_t)0x61c26b40, (q31_t)0x61be5cd2, (q31_t)0x61ba4e28, (q31_t)0x61b63f41, (q31_t)0x61b2301e,
+  (q31_t)0x61ae20bf, (q31_t)0x61aa1124, (q31_t)0x61a6014d, (q31_t)0x61a1f139, (q31_t)0x619de0e9, (q31_t)0x6199d05d, (q31_t)0x6195bf94, (q31_t)0x6191ae90,
+  (q31_t)0x618d9d4f, (q31_t)0x61898bd2, (q31_t)0x61857a19, (q31_t)0x61816824, (q31_t)0x617d55f2, (q31_t)0x61794385, (q31_t)0x617530db, (q31_t)0x61711df5,
+  (q31_t)0x616d0ad3, (q31_t)0x6168f775, (q31_t)0x6164e3db, (q31_t)0x6160d005, (q31_t)0x615cbbf3, (q31_t)0x6158a7a4, (q31_t)0x6154931a, (q31_t)0x61507e54,
+  (q31_t)0x614c6951, (q31_t)0x61485413, (q31_t)0x61443e98, (q31_t)0x614028e2, (q31_t)0x613c12f0, (q31_t)0x6137fcc1, (q31_t)0x6133e657, (q31_t)0x612fcfb0,
+  (q31_t)0x612bb8ce, (q31_t)0x6127a1b0, (q31_t)0x61238a56, (q31_t)0x611f72c0, (q31_t)0x611b5aee, (q31_t)0x611742e0, (q31_t)0x61132a96, (q31_t)0x610f1210,
+  (q31_t)0x610af94f, (q31_t)0x6106e051, (q31_t)0x6102c718, (q31_t)0x60feada3, (q31_t)0x60fa93f2, (q31_t)0x60f67a05, (q31_t)0x60f25fdd, (q31_t)0x60ee4579,
+  (q31_t)0x60ea2ad8, (q31_t)0x60e60ffd, (q31_t)0x60e1f4e5, (q31_t)0x60ddd991, (q31_t)0x60d9be02, (q31_t)0x60d5a237, (q31_t)0x60d18631, (q31_t)0x60cd69ee,
+  (q31_t)0x60c94d70, (q31_t)0x60c530b6, (q31_t)0x60c113c1, (q31_t)0x60bcf690, (q31_t)0x60b8d923, (q31_t)0x60b4bb7a, (q31_t)0x60b09d96, (q31_t)0x60ac7f76,
+  (q31_t)0x60a8611b, (q31_t)0x60a44284, (q31_t)0x60a023b1, (q31_t)0x609c04a3, (q31_t)0x6097e559, (q31_t)0x6093c5d3, (q31_t)0x608fa612, (q31_t)0x608b8616,
+  (q31_t)0x608765dd, (q31_t)0x6083456a, (q31_t)0x607f24ba, (q31_t)0x607b03d0, (q31_t)0x6076e2a9, (q31_t)0x6072c148, (q31_t)0x606e9faa, (q31_t)0x606a7dd2,
+  (q31_t)0x60665bbd, (q31_t)0x6062396e, (q31_t)0x605e16e2, (q31_t)0x6059f41c, (q31_t)0x6055d11a, (q31_t)0x6051addc, (q31_t)0x604d8a63, (q31_t)0x604966af,
+  (q31_t)0x604542bf, (q31_t)0x60411e94, (q31_t)0x603cfa2e, (q31_t)0x6038d58c, (q31_t)0x6034b0af, (q31_t)0x60308b97, (q31_t)0x602c6643, (q31_t)0x602840b4,
+  (q31_t)0x60241ae9, (q31_t)0x601ff4e3, (q31_t)0x601bcea2, (q31_t)0x6017a826, (q31_t)0x6013816e, (q31_t)0x600f5a7b, (q31_t)0x600b334d, (q31_t)0x60070be4,
+  (q31_t)0x6002e43f, (q31_t)0x5ffebc5f, (q31_t)0x5ffa9444, (q31_t)0x5ff66bee, (q31_t)0x5ff2435d, (q31_t)0x5fee1a90, (q31_t)0x5fe9f188, (q31_t)0x5fe5c845,
+  (q31_t)0x5fe19ec7, (q31_t)0x5fdd750e, (q31_t)0x5fd94b19, (q31_t)0x5fd520ea, (q31_t)0x5fd0f67f, (q31_t)0x5fcccbd9, (q31_t)0x5fc8a0f8, (q31_t)0x5fc475dc,
+  (q31_t)0x5fc04a85, (q31_t)0x5fbc1ef3, (q31_t)0x5fb7f326, (q31_t)0x5fb3c71e, (q31_t)0x5faf9adb, (q31_t)0x5fab6e5d, (q31_t)0x5fa741a3, (q31_t)0x5fa314af,
+  (q31_t)0x5f9ee780, (q31_t)0x5f9aba16, (q31_t)0x5f968c70, (q31_t)0x5f925e90, (q31_t)0x5f8e3075, (q31_t)0x5f8a021f, (q31_t)0x5f85d38e, (q31_t)0x5f81a4c2,
+  (q31_t)0x5f7d75bb, (q31_t)0x5f794679, (q31_t)0x5f7516fd, (q31_t)0x5f70e745, (q31_t)0x5f6cb753, (q31_t)0x5f688726, (q31_t)0x5f6456be, (q31_t)0x5f60261b,
+  (q31_t)0x5f5bf53d, (q31_t)0x5f57c424, (q31_t)0x5f5392d1, (q31_t)0x5f4f6143, (q31_t)0x5f4b2f7a, (q31_t)0x5f46fd76, (q31_t)0x5f42cb37, (q31_t)0x5f3e98be,
+  (q31_t)0x5f3a660a, (q31_t)0x5f36331b, (q31_t)0x5f31fff1, (q31_t)0x5f2dcc8d, (q31_t)0x5f2998ee, (q31_t)0x5f256515, (q31_t)0x5f213100, (q31_t)0x5f1cfcb1,
+  (q31_t)0x5f18c827, (q31_t)0x5f149363, (q31_t)0x5f105e64, (q31_t)0x5f0c292a, (q31_t)0x5f07f3b6, (q31_t)0x5f03be07, (q31_t)0x5eff881d, (q31_t)0x5efb51f9,
+  (q31_t)0x5ef71b9b, (q31_t)0x5ef2e501, (q31_t)0x5eeeae2d, (q31_t)0x5eea771f, (q31_t)0x5ee63fd6, (q31_t)0x5ee20853, (q31_t)0x5eddd094, (q31_t)0x5ed9989c,
+  (q31_t)0x5ed56069, (q31_t)0x5ed127fb, (q31_t)0x5eccef53, (q31_t)0x5ec8b671, (q31_t)0x5ec47d54, (q31_t)0x5ec043fc, (q31_t)0x5ebc0a6a, (q31_t)0x5eb7d09e,
+  (q31_t)0x5eb39697, (q31_t)0x5eaf5c56, (q31_t)0x5eab21da, (q31_t)0x5ea6e724, (q31_t)0x5ea2ac34, (q31_t)0x5e9e7109, (q31_t)0x5e9a35a4, (q31_t)0x5e95fa05,
+  (q31_t)0x5e91be2b, (q31_t)0x5e8d8217, (q31_t)0x5e8945c8, (q31_t)0x5e85093f, (q31_t)0x5e80cc7c, (q31_t)0x5e7c8f7f, (q31_t)0x5e785247, (q31_t)0x5e7414d5,
+  (q31_t)0x5e6fd729, (q31_t)0x5e6b9943, (q31_t)0x5e675b22, (q31_t)0x5e631cc7, (q31_t)0x5e5ede32, (q31_t)0x5e5a9f62, (q31_t)0x5e566059, (q31_t)0x5e522115,
+  (q31_t)0x5e4de197, (q31_t)0x5e49a1df, (q31_t)0x5e4561ed, (q31_t)0x5e4121c0, (q31_t)0x5e3ce15a, (q31_t)0x5e38a0b9, (q31_t)0x5e345fde, (q31_t)0x5e301ec9,
+  (q31_t)0x5e2bdd7a, (q31_t)0x5e279bf1, (q31_t)0x5e235a2e, (q31_t)0x5e1f1830, (q31_t)0x5e1ad5f9, (q31_t)0x5e169388, (q31_t)0x5e1250dc, (q31_t)0x5e0e0df7,
+  (q31_t)0x5e09cad7, (q31_t)0x5e05877e, (q31_t)0x5e0143ea, (q31_t)0x5dfd001d, (q31_t)0x5df8bc15, (q31_t)0x5df477d4, (q31_t)0x5df03359, (q31_t)0x5debeea3,
+  (q31_t)0x5de7a9b4, (q31_t)0x5de3648b, (q31_t)0x5ddf1f28, (q31_t)0x5ddad98b, (q31_t)0x5dd693b4, (q31_t)0x5dd24da3, (q31_t)0x5dce0759, (q31_t)0x5dc9c0d4,
+  (q31_t)0x5dc57a16, (q31_t)0x5dc1331d, (q31_t)0x5dbcebeb, (q31_t)0x5db8a480, (q31_t)0x5db45cda, (q31_t)0x5db014fa, (q31_t)0x5dabcce1, (q31_t)0x5da7848e,
+  (q31_t)0x5da33c01, (q31_t)0x5d9ef33b, (q31_t)0x5d9aaa3a, (q31_t)0x5d966100, (q31_t)0x5d92178d, (q31_t)0x5d8dcddf, (q31_t)0x5d8983f8, (q31_t)0x5d8539d7,
+  (q31_t)0x5d80ef7c, (q31_t)0x5d7ca4e8, (q31_t)0x5d785a1a, (q31_t)0x5d740f12, (q31_t)0x5d6fc3d1, (q31_t)0x5d6b7856, (q31_t)0x5d672ca2, (q31_t)0x5d62e0b4,
+  (q31_t)0x5d5e948c, (q31_t)0x5d5a482a, (q31_t)0x5d55fb90, (q31_t)0x5d51aebb, (q31_t)0x5d4d61ad, (q31_t)0x5d491465, (q31_t)0x5d44c6e4, (q31_t)0x5d40792a,
+  (q31_t)0x5d3c2b35, (q31_t)0x5d37dd08, (q31_t)0x5d338ea0, (q31_t)0x5d2f4000, (q31_t)0x5d2af125, (q31_t)0x5d26a212, (q31_t)0x5d2252c5, (q31_t)0x5d1e033e,
+  (q31_t)0x5d19b37e, (q31_t)0x5d156385, (q31_t)0x5d111352, (q31_t)0x5d0cc2e5, (q31_t)0x5d087240, (q31_t)0x5d042161, (q31_t)0x5cffd048, (q31_t)0x5cfb7ef7,
+  (q31_t)0x5cf72d6b, (q31_t)0x5cf2dba7, (q31_t)0x5cee89a9, (q31_t)0x5cea3772, (q31_t)0x5ce5e501, (q31_t)0x5ce19258, (q31_t)0x5cdd3f75, (q31_t)0x5cd8ec58,
+  (q31_t)0x5cd49903, (q31_t)0x5cd04574, (q31_t)0x5ccbf1ab, (q31_t)0x5cc79daa, (q31_t)0x5cc3496f, (q31_t)0x5cbef4fc, (q31_t)0x5cbaa04f, (q31_t)0x5cb64b68,
+  (q31_t)0x5cb1f649, (q31_t)0x5cada0f0, (q31_t)0x5ca94b5e, (q31_t)0x5ca4f594, (q31_t)0x5ca09f8f, (q31_t)0x5c9c4952, (q31_t)0x5c97f2dc, (q31_t)0x5c939c2c,
+  (q31_t)0x5c8f4544, (q31_t)0x5c8aee22, (q31_t)0x5c8696c7, (q31_t)0x5c823f34, (q31_t)0x5c7de767, (q31_t)0x5c798f61, (q31_t)0x5c753722, (q31_t)0x5c70deaa,
+  (q31_t)0x5c6c85f9, (q31_t)0x5c682d0f, (q31_t)0x5c63d3eb, (q31_t)0x5c5f7a8f, (q31_t)0x5c5b20fa, (q31_t)0x5c56c72c, (q31_t)0x5c526d25, (q31_t)0x5c4e12e5,
+  (q31_t)0x5c49b86d, (q31_t)0x5c455dbb, (q31_t)0x5c4102d0, (q31_t)0x5c3ca7ad, (q31_t)0x5c384c50, (q31_t)0x5c33f0bb, (q31_t)0x5c2f94ec, (q31_t)0x5c2b38e5,
+  (q31_t)0x5c26dca5, (q31_t)0x5c22802c, (q31_t)0x5c1e237b, (q31_t)0x5c19c690, (q31_t)0x5c15696d, (q31_t)0x5c110c11, (q31_t)0x5c0cae7c, (q31_t)0x5c0850ae,
+  (q31_t)0x5c03f2a8, (q31_t)0x5bff9469, (q31_t)0x5bfb35f1, (q31_t)0x5bf6d740, (q31_t)0x5bf27857, (q31_t)0x5bee1935, (q31_t)0x5be9b9da, (q31_t)0x5be55a46,
+  (q31_t)0x5be0fa7a, (q31_t)0x5bdc9a75, (q31_t)0x5bd83a37, (q31_t)0x5bd3d9c1, (q31_t)0x5bcf7912, (q31_t)0x5bcb182b, (q31_t)0x5bc6b70b, (q31_t)0x5bc255b2,
+  (q31_t)0x5bbdf421, (q31_t)0x5bb99257, (q31_t)0x5bb53054, (q31_t)0x5bb0ce19, (q31_t)0x5bac6ba6, (q31_t)0x5ba808f9, (q31_t)0x5ba3a615, (q31_t)0x5b9f42f7,
+  (q31_t)0x5b9adfa2, (q31_t)0x5b967c13, (q31_t)0x5b92184d, (q31_t)0x5b8db44d, (q31_t)0x5b895016, (q31_t)0x5b84eba6, (q31_t)0x5b8086fd, (q31_t)0x5b7c221c,
+  (q31_t)0x5b77bd02, (q31_t)0x5b7357b0, (q31_t)0x5b6ef226, (q31_t)0x5b6a8c63, (q31_t)0x5b662668, (q31_t)0x5b61c035, (q31_t)0x5b5d59c9, (q31_t)0x5b58f324,
+  (q31_t)0x5b548c48, (q31_t)0x5b502533, (q31_t)0x5b4bbde6, (q31_t)0x5b475660, (q31_t)0x5b42eea2, (q31_t)0x5b3e86ac, (q31_t)0x5b3a1e7e, (q31_t)0x5b35b617,
+  (q31_t)0x5b314d78, (q31_t)0x5b2ce4a1, (q31_t)0x5b287b91, (q31_t)0x5b241249, (q31_t)0x5b1fa8c9, (q31_t)0x5b1b3f11, (q31_t)0x5b16d521, (q31_t)0x5b126af8,
+  (q31_t)0x5b0e0098, (q31_t)0x5b0995ff, (q31_t)0x5b052b2e, (q31_t)0x5b00c025, (q31_t)0x5afc54e3, (q31_t)0x5af7e96a, (q31_t)0x5af37db8, (q31_t)0x5aef11cf,
+  (q31_t)0x5aeaa5ad, (q31_t)0x5ae63953, (q31_t)0x5ae1ccc1, (q31_t)0x5add5ff7, (q31_t)0x5ad8f2f5, (q31_t)0x5ad485bb, (q31_t)0x5ad01849, (q31_t)0x5acbaa9f,
+  (q31_t)0x5ac73cbd, (q31_t)0x5ac2cea3, (q31_t)0x5abe6050, (q31_t)0x5ab9f1c6, (q31_t)0x5ab58304, (q31_t)0x5ab1140a, (q31_t)0x5aaca4d8, (q31_t)0x5aa8356f,
+  (q31_t)0x5aa3c5cd, (q31_t)0x5a9f55f3, (q31_t)0x5a9ae5e2, (q31_t)0x5a967598, (q31_t)0x5a920517, (q31_t)0x5a8d945d, (q31_t)0x5a89236c, (q31_t)0x5a84b243,
+  (q31_t)0x5a8040e3, (q31_t)0x5a7bcf4a, (q31_t)0x5a775d7a, (q31_t)0x5a72eb71, (q31_t)0x5a6e7931, (q31_t)0x5a6a06ba, (q31_t)0x5a65940a, (q31_t)0x5a612123,
+  (q31_t)0x5a5cae04, (q31_t)0x5a583aad, (q31_t)0x5a53c71e, (q31_t)0x5a4f5358, (q31_t)0x5a4adf5a, (q31_t)0x5a466b24, (q31_t)0x5a41f6b7, (q31_t)0x5a3d8212,
+  (q31_t)0x5a390d35, (q31_t)0x5a349821, (q31_t)0x5a3022d5, (q31_t)0x5a2bad51, (q31_t)0x5a273796, (q31_t)0x5a22c1a3, (q31_t)0x5a1e4b79, (q31_t)0x5a19d517,
+  (q31_t)0x5a155e7d, (q31_t)0x5a10e7ac, (q31_t)0x5a0c70a3, (q31_t)0x5a07f963, (q31_t)0x5a0381eb, (q31_t)0x59ff0a3c, (q31_t)0x59fa9255, (q31_t)0x59f61a36,
+  (q31_t)0x59f1a1e0, (q31_t)0x59ed2953, (q31_t)0x59e8b08e, (q31_t)0x59e43792, (q31_t)0x59dfbe5e, (q31_t)0x59db44f3, (q31_t)0x59d6cb50, (q31_t)0x59d25176,
+  (q31_t)0x59cdd765, (q31_t)0x59c95d1c, (q31_t)0x59c4e29c, (q31_t)0x59c067e4, (q31_t)0x59bbecf5, (q31_t)0x59b771cf, (q31_t)0x59b2f671, (q31_t)0x59ae7add,
+  (q31_t)0x59a9ff10, (q31_t)0x59a5830d, (q31_t)0x59a106d2, (q31_t)0x599c8a60, (q31_t)0x59980db6, (q31_t)0x599390d5, (q31_t)0x598f13bd, (q31_t)0x598a966e,
+  (q31_t)0x598618e8, (q31_t)0x59819b2a, (q31_t)0x597d1d35, (q31_t)0x59789f09, (q31_t)0x597420a6, (q31_t)0x596fa20b, (q31_t)0x596b233a, (q31_t)0x5966a431,
+  (q31_t)0x596224f1, (q31_t)0x595da57a, (q31_t)0x595925cc, (q31_t)0x5954a5e6, (q31_t)0x595025ca, (q31_t)0x594ba576, (q31_t)0x594724ec, (q31_t)0x5942a42a,
+  (q31_t)0x593e2331, (q31_t)0x5939a202, (q31_t)0x5935209b, (q31_t)0x59309efd, (q31_t)0x592c1d28, (q31_t)0x59279b1c, (q31_t)0x592318d9, (q31_t)0x591e9660,
+  (q31_t)0x591a13af, (q31_t)0x591590c7, (q31_t)0x59110da8, (q31_t)0x590c8a53, (q31_t)0x590806c6, (q31_t)0x59038302, (q31_t)0x58feff08, (q31_t)0x58fa7ad7,
+  (q31_t)0x58f5f66e, (q31_t)0x58f171cf, (q31_t)0x58ececf9, (q31_t)0x58e867ed, (q31_t)0x58e3e2a9, (q31_t)0x58df5d2e, (q31_t)0x58dad77d, (q31_t)0x58d65195,
+  (q31_t)0x58d1cb76, (q31_t)0x58cd4520, (q31_t)0x58c8be94, (q31_t)0x58c437d1, (q31_t)0x58bfb0d7, (q31_t)0x58bb29a6, (q31_t)0x58b6a23e, (q31_t)0x58b21aa0,
+  (q31_t)0x58ad92cb, (q31_t)0x58a90ac0, (q31_t)0x58a4827d, (q31_t)0x589ffa04, (q31_t)0x589b7155, (q31_t)0x5896e86f, (q31_t)0x58925f52, (q31_t)0x588dd5fe,
+  (q31_t)0x58894c74, (q31_t)0x5884c2b3, (q31_t)0x588038bb, (q31_t)0x587bae8d, (q31_t)0x58772429, (q31_t)0x5872998e, (q31_t)0x586e0ebc, (q31_t)0x586983b4,
+  (q31_t)0x5864f875, (q31_t)0x58606d00, (q31_t)0x585be154, (q31_t)0x58575571, (q31_t)0x5852c958, (q31_t)0x584e3d09, (q31_t)0x5849b083, (q31_t)0x584523c7,
+  (q31_t)0x584096d4, (q31_t)0x583c09ab, (q31_t)0x58377c4c, (q31_t)0x5832eeb6, (q31_t)0x582e60e9, (q31_t)0x5829d2e6, (q31_t)0x582544ad, (q31_t)0x5820b63e,
+  (q31_t)0x581c2798, (q31_t)0x581798bb, (q31_t)0x581309a9, (q31_t)0x580e7a60, (q31_t)0x5809eae1, (q31_t)0x58055b2b, (q31_t)0x5800cb3f, (q31_t)0x57fc3b1d,
+  (q31_t)0x57f7aac5, (q31_t)0x57f31a36, (q31_t)0x57ee8971, (q31_t)0x57e9f876, (q31_t)0x57e56744, (q31_t)0x57e0d5dd, (q31_t)0x57dc443f, (q31_t)0x57d7b26b,
+  (q31_t)0x57d32061, (q31_t)0x57ce8e20, (q31_t)0x57c9fbaa, (q31_t)0x57c568fd, (q31_t)0x57c0d61a, (q31_t)0x57bc4301, (q31_t)0x57b7afb2, (q31_t)0x57b31c2d,
+  (q31_t)0x57ae8872, (q31_t)0x57a9f480, (q31_t)0x57a56059, (q31_t)0x57a0cbfb, (q31_t)0x579c3768, (q31_t)0x5797a29e, (q31_t)0x57930d9e, (q31_t)0x578e7869,
+  (q31_t)0x5789e2fd, (q31_t)0x57854d5b, (q31_t)0x5780b784, (q31_t)0x577c2176, (q31_t)0x57778b32, (q31_t)0x5772f4b9, (q31_t)0x576e5e09, (q31_t)0x5769c724,
+  (q31_t)0x57653009, (q31_t)0x576098b7, (q31_t)0x575c0130, (q31_t)0x57576973, (q31_t)0x5752d180, (q31_t)0x574e3957, (q31_t)0x5749a0f9, (q31_t)0x57450864,
+  (q31_t)0x57406f9a, (q31_t)0x573bd69a, (q31_t)0x57373d64, (q31_t)0x5732a3f8, (q31_t)0x572e0a56, (q31_t)0x5729707f, (q31_t)0x5724d672, (q31_t)0x57203c2f,
+  (q31_t)0x571ba1b7, (q31_t)0x57170708, (q31_t)0x57126c24, (q31_t)0x570dd10a, (q31_t)0x570935bb, (q31_t)0x57049a36, (q31_t)0x56fffe7b, (q31_t)0x56fb628b,
+  (q31_t)0x56f6c664, (q31_t)0x56f22a09, (q31_t)0x56ed8d77, (q31_t)0x56e8f0b0, (q31_t)0x56e453b4, (q31_t)0x56dfb681, (q31_t)0x56db1919, (q31_t)0x56d67b7c,
+  (q31_t)0x56d1dda9, (q31_t)0x56cd3fa1, (q31_t)0x56c8a162, (q31_t)0x56c402ef, (q31_t)0x56bf6446, (q31_t)0x56bac567, (q31_t)0x56b62653, (q31_t)0x56b18709,
+  (q31_t)0x56ace78a, (q31_t)0x56a847d6, (q31_t)0x56a3a7ec, (q31_t)0x569f07cc, (q31_t)0x569a6777, (q31_t)0x5695c6ed, (q31_t)0x5691262d, (q31_t)0x568c8538,
+  (q31_t)0x5687e40e, (q31_t)0x568342ae, (q31_t)0x567ea118, (q31_t)0x5679ff4e, (q31_t)0x56755d4e, (q31_t)0x5670bb19, (q31_t)0x566c18ae, (q31_t)0x5667760e,
+  (q31_t)0x5662d339, (q31_t)0x565e302e, (q31_t)0x56598cee, (q31_t)0x5654e979, (q31_t)0x565045cf, (q31_t)0x564ba1f0, (q31_t)0x5646fddb, (q31_t)0x56425991,
+  (q31_t)0x563db512, (q31_t)0x5639105d, (q31_t)0x56346b74, (q31_t)0x562fc655, (q31_t)0x562b2101, (q31_t)0x56267b78, (q31_t)0x5621d5ba, (q31_t)0x561d2fc6,
+  (q31_t)0x5618899e, (q31_t)0x5613e340, (q31_t)0x560f3cae, (q31_t)0x560a95e6, (q31_t)0x5605eee9, (q31_t)0x560147b7, (q31_t)0x55fca050, (q31_t)0x55f7f8b4,
+  (q31_t)0x55f350e3, (q31_t)0x55eea8dd, (q31_t)0x55ea00a2, (q31_t)0x55e55832, (q31_t)0x55e0af8d, (q31_t)0x55dc06b3, (q31_t)0x55d75da4, (q31_t)0x55d2b460,
+  (q31_t)0x55ce0ae7, (q31_t)0x55c96139, (q31_t)0x55c4b757, (q31_t)0x55c00d3f, (q31_t)0x55bb62f3, (q31_t)0x55b6b871, (q31_t)0x55b20dbb, (q31_t)0x55ad62d0,
+  (q31_t)0x55a8b7b0, (q31_t)0x55a40c5b, (q31_t)0x559f60d1, (q31_t)0x559ab513, (q31_t)0x55960920, (q31_t)0x55915cf8, (q31_t)0x558cb09b, (q31_t)0x55880409,
+  (q31_t)0x55835743, (q31_t)0x557eaa48, (q31_t)0x5579fd18, (q31_t)0x55754fb3, (q31_t)0x5570a21a, (q31_t)0x556bf44c, (q31_t)0x55674649, (q31_t)0x55629812,
+  (q31_t)0x555de9a6, (q31_t)0x55593b05, (q31_t)0x55548c30, (q31_t)0x554fdd26, (q31_t)0x554b2de7, (q31_t)0x55467e74, (q31_t)0x5541cecc, (q31_t)0x553d1ef0,
+  (q31_t)0x55386edf, (q31_t)0x5533be99, (q31_t)0x552f0e1f, (q31_t)0x552a5d70, (q31_t)0x5525ac8d, (q31_t)0x5520fb75, (q31_t)0x551c4a29, (q31_t)0x551798a8,
+  (q31_t)0x5512e6f3, (q31_t)0x550e3509, (q31_t)0x550982eb, (q31_t)0x5504d099, (q31_t)0x55001e12, (q31_t)0x54fb6b56, (q31_t)0x54f6b866, (q31_t)0x54f20542,
+  (q31_t)0x54ed51e9, (q31_t)0x54e89e5c, (q31_t)0x54e3ea9a, (q31_t)0x54df36a5, (q31_t)0x54da827a, (q31_t)0x54d5ce1c, (q31_t)0x54d11989, (q31_t)0x54cc64c2,
+  (q31_t)0x54c7afc6, (q31_t)0x54c2fa96, (q31_t)0x54be4532, (q31_t)0x54b98f9a, (q31_t)0x54b4d9cd, (q31_t)0x54b023cc, (q31_t)0x54ab6d97, (q31_t)0x54a6b72e,
+  (q31_t)0x54a20090, (q31_t)0x549d49bf, (q31_t)0x549892b9, (q31_t)0x5493db7f, (q31_t)0x548f2410, (q31_t)0x548a6c6e, (q31_t)0x5485b497, (q31_t)0x5480fc8c,
+  (q31_t)0x547c444d, (q31_t)0x54778bda, (q31_t)0x5472d333, (q31_t)0x546e1a58, (q31_t)0x54696149, (q31_t)0x5464a805, (q31_t)0x545fee8e, (q31_t)0x545b34e3,
+  (q31_t)0x54567b03, (q31_t)0x5451c0f0, (q31_t)0x544d06a8, (q31_t)0x54484c2d, (q31_t)0x5443917d, (q31_t)0x543ed699, (q31_t)0x543a1b82, (q31_t)0x54356037,
+  (q31_t)0x5430a4b7, (q31_t)0x542be904, (q31_t)0x54272d1d, (q31_t)0x54227102, (q31_t)0x541db4b3, (q31_t)0x5418f830, (q31_t)0x54143b79, (q31_t)0x540f7e8e,
+  (q31_t)0x540ac170, (q31_t)0x5406041d, (q31_t)0x54014697, (q31_t)0x53fc88dd, (q31_t)0x53f7caef, (q31_t)0x53f30cce, (q31_t)0x53ee4e78, (q31_t)0x53e98fef,
+  (q31_t)0x53e4d132, (q31_t)0x53e01242, (q31_t)0x53db531d, (q31_t)0x53d693c5, (q31_t)0x53d1d439, (q31_t)0x53cd147a, (q31_t)0x53c85486, (q31_t)0x53c3945f,
+  (q31_t)0x53bed405, (q31_t)0x53ba1377, (q31_t)0x53b552b5, (q31_t)0x53b091bf, (q31_t)0x53abd096, (q31_t)0x53a70f39, (q31_t)0x53a24da9, (q31_t)0x539d8be5,
+  (q31_t)0x5398c9ed, (q31_t)0x539407c2, (q31_t)0x538f4564, (q31_t)0x538a82d1, (q31_t)0x5385c00c, (q31_t)0x5380fd12, (q31_t)0x537c39e6, (q31_t)0x53777685,
+  (q31_t)0x5372b2f2, (q31_t)0x536def2a, (q31_t)0x53692b30, (q31_t)0x53646701, (q31_t)0x535fa2a0, (q31_t)0x535ade0b, (q31_t)0x53561942, (q31_t)0x53515447,
+  (q31_t)0x534c8f17, (q31_t)0x5347c9b5, (q31_t)0x5343041f, (q31_t)0x533e3e55, (q31_t)0x53397859, (q31_t)0x5334b229, (q31_t)0x532febc5, (q31_t)0x532b252f,
+  (q31_t)0x53265e65, (q31_t)0x53219767, (q31_t)0x531cd037, (q31_t)0x531808d3, (q31_t)0x5313413c, (q31_t)0x530e7972, (q31_t)0x5309b174, (q31_t)0x5304e943,
+  (q31_t)0x530020df, (q31_t)0x52fb5848, (q31_t)0x52f68f7e, (q31_t)0x52f1c680, (q31_t)0x52ecfd4f, (q31_t)0x52e833ec, (q31_t)0x52e36a55, (q31_t)0x52dea08a,
+  (q31_t)0x52d9d68d, (q31_t)0x52d50c5d, (q31_t)0x52d041f9, (q31_t)0x52cb7763, (q31_t)0x52c6ac99, (q31_t)0x52c1e19d, (q31_t)0x52bd166d, (q31_t)0x52b84b0a,
+  (q31_t)0x52b37f74, (q31_t)0x52aeb3ac, (q31_t)0x52a9e7b0, (q31_t)0x52a51b81, (q31_t)0x52a04f1f, (q31_t)0x529b828a, (q31_t)0x5296b5c3, (q31_t)0x5291e8c8,
+  (q31_t)0x528d1b9b, (q31_t)0x52884e3a, (q31_t)0x528380a7, (q31_t)0x527eb2e0, (q31_t)0x5279e4e7, (q31_t)0x527516bb, (q31_t)0x5270485c, (q31_t)0x526b79ca,
+  (q31_t)0x5266ab06, (q31_t)0x5261dc0e, (q31_t)0x525d0ce4, (q31_t)0x52583d87, (q31_t)0x52536df7, (q31_t)0x524e9e34, (q31_t)0x5249ce3f, (q31_t)0x5244fe17,
+  (q31_t)0x52402dbc, (q31_t)0x523b5d2e, (q31_t)0x52368c6e, (q31_t)0x5231bb7b, (q31_t)0x522cea55, (q31_t)0x522818fc, (q31_t)0x52234771, (q31_t)0x521e75b3,
+  (q31_t)0x5219a3c3, (q31_t)0x5214d1a0, (q31_t)0x520fff4a, (q31_t)0x520b2cc2, (q31_t)0x52065a07, (q31_t)0x52018719, (q31_t)0x51fcb3f9, (q31_t)0x51f7e0a6,
+  (q31_t)0x51f30d21, (q31_t)0x51ee3969, (q31_t)0x51e9657e, (q31_t)0x51e49162, (q31_t)0x51dfbd12, (q31_t)0x51dae890, (q31_t)0x51d613dc, (q31_t)0x51d13ef5,
+  (q31_t)0x51cc69db, (q31_t)0x51c79490, (q31_t)0x51c2bf11, (q31_t)0x51bde960, (q31_t)0x51b9137d, (q31_t)0x51b43d68, (q31_t)0x51af6720, (q31_t)0x51aa90a5,
+  (q31_t)0x51a5b9f9, (q31_t)0x51a0e31a, (q31_t)0x519c0c08, (q31_t)0x519734c4, (q31_t)0x51925d4e, (q31_t)0x518d85a6, (q31_t)0x5188adcb, (q31_t)0x5183d5be,
+  (q31_t)0x517efd7f, (q31_t)0x517a250d, (q31_t)0x51754c69, (q31_t)0x51707393, (q31_t)0x516b9a8b, (q31_t)0x5166c150, (q31_t)0x5161e7e4, (q31_t)0x515d0e45,
+  (q31_t)0x51583473, (q31_t)0x51535a70, (q31_t)0x514e803b, (q31_t)0x5149a5d3, (q31_t)0x5144cb39, (q31_t)0x513ff06d, (q31_t)0x513b156f, (q31_t)0x51363a3f,
+  (q31_t)0x51315edd, (q31_t)0x512c8348, (q31_t)0x5127a782, (q31_t)0x5122cb8a, (q31_t)0x511def5f, (q31_t)0x51191302, (q31_t)0x51143674, (q31_t)0x510f59b3,
+  (q31_t)0x510a7cc1, (q31_t)0x51059f9c, (q31_t)0x5100c246, (q31_t)0x50fbe4bd, (q31_t)0x50f70703, (q31_t)0x50f22916, (q31_t)0x50ed4af8, (q31_t)0x50e86ca8,
+  (q31_t)0x50e38e25, (q31_t)0x50deaf71, (q31_t)0x50d9d08b, (q31_t)0x50d4f173, (q31_t)0x50d0122a, (q31_t)0x50cb32ae, (q31_t)0x50c65301, (q31_t)0x50c17322,
+  (q31_t)0x50bc9311, (q31_t)0x50b7b2ce, (q31_t)0x50b2d259, (q31_t)0x50adf1b3, (q31_t)0x50a910db, (q31_t)0x50a42fd1, (q31_t)0x509f4e95, (q31_t)0x509a6d28,
+  (q31_t)0x50958b88, (q31_t)0x5090a9b8, (q31_t)0x508bc7b5, (q31_t)0x5086e581, (q31_t)0x5082031b, (q31_t)0x507d2083, (q31_t)0x50783dba, (q31_t)0x50735abf,
+  (q31_t)0x506e7793, (q31_t)0x50699435, (q31_t)0x5064b0a5, (q31_t)0x505fcce4, (q31_t)0x505ae8f1, (q31_t)0x505604cd, (q31_t)0x50512077, (q31_t)0x504c3bef,
+  (q31_t)0x50475736, (q31_t)0x5042724c, (q31_t)0x503d8d30, (q31_t)0x5038a7e2, (q31_t)0x5033c263, (q31_t)0x502edcb2, (q31_t)0x5029f6d1, (q31_t)0x502510bd,
+  (q31_t)0x50202a78, (q31_t)0x501b4402, (q31_t)0x50165d5a, (q31_t)0x50117681, (q31_t)0x500c8f77, (q31_t)0x5007a83b, (q31_t)0x5002c0cd, (q31_t)0x4ffdd92f,
+  (q31_t)0x4ff8f15f, (q31_t)0x4ff4095e, (q31_t)0x4fef212b, (q31_t)0x4fea38c7, (q31_t)0x4fe55032, (q31_t)0x4fe0676c, (q31_t)0x4fdb7e74, (q31_t)0x4fd6954b,
+  (q31_t)0x4fd1abf0, (q31_t)0x4fccc265, (q31_t)0x4fc7d8a8, (q31_t)0x4fc2eeba, (q31_t)0x4fbe049b, (q31_t)0x4fb91a4b, (q31_t)0x4fb42fc9, (q31_t)0x4faf4517,
+  (q31_t)0x4faa5a33, (q31_t)0x4fa56f1e, (q31_t)0x4fa083d8, (q31_t)0x4f9b9861, (q31_t)0x4f96acb8, (q31_t)0x4f91c0df, (q31_t)0x4f8cd4d4, (q31_t)0x4f87e899,
+  (q31_t)0x4f82fc2c, (q31_t)0x4f7e0f8f, (q31_t)0x4f7922c0, (q31_t)0x4f7435c0, (q31_t)0x4f6f488f, (q31_t)0x4f6a5b2e, (q31_t)0x4f656d9b, (q31_t)0x4f607fd7,
+  (q31_t)0x4f5b91e3, (q31_t)0x4f56a3bd, (q31_t)0x4f51b566, (q31_t)0x4f4cc6df, (q31_t)0x4f47d827, (q31_t)0x4f42e93d, (q31_t)0x4f3dfa23, (q31_t)0x4f390ad8,
+  (q31_t)0x4f341b5c, (q31_t)0x4f2f2baf, (q31_t)0x4f2a3bd2, (q31_t)0x4f254bc3, (q31_t)0x4f205b84, (q31_t)0x4f1b6b14, (q31_t)0x4f167a73, (q31_t)0x4f1189a1,
+  (q31_t)0x4f0c989f, (q31_t)0x4f07a76b, (q31_t)0x4f02b608, (q31_t)0x4efdc473, (q31_t)0x4ef8d2ad, (q31_t)0x4ef3e0b7, (q31_t)0x4eeeee90, (q31_t)0x4ee9fc39,
+  (q31_t)0x4ee509b1, (q31_t)0x4ee016f8, (q31_t)0x4edb240e, (q31_t)0x4ed630f4, (q31_t)0x4ed13da9, (q31_t)0x4ecc4a2e, (q31_t)0x4ec75682, (q31_t)0x4ec262a5,
+  (q31_t)0x4ebd6e98, (q31_t)0x4eb87a5a, (q31_t)0x4eb385ec, (q31_t)0x4eae914d, (q31_t)0x4ea99c7d, (q31_t)0x4ea4a77d, (q31_t)0x4e9fb24d, (q31_t)0x4e9abcec,
+  (q31_t)0x4e95c75b, (q31_t)0x4e90d199, (q31_t)0x4e8bdba6, (q31_t)0x4e86e583, (q31_t)0x4e81ef30, (q31_t)0x4e7cf8ac, (q31_t)0x4e7801f8, (q31_t)0x4e730b14,
+  (q31_t)0x4e6e13ff, (q31_t)0x4e691cba, (q31_t)0x4e642544, (q31_t)0x4e5f2d9e, (q31_t)0x4e5a35c7, (q31_t)0x4e553dc1, (q31_t)0x4e50458a, (q31_t)0x4e4b4d22,
+  (q31_t)0x4e46548b, (q31_t)0x4e415bc3, (q31_t)0x4e3c62cb, (q31_t)0x4e3769a2, (q31_t)0x4e32704a, (q31_t)0x4e2d76c1, (q31_t)0x4e287d08, (q31_t)0x4e23831e,
+  (q31_t)0x4e1e8905, (q31_t)0x4e198ebb, (q31_t)0x4e149441, (q31_t)0x4e0f9997, (q31_t)0x4e0a9ebd, (q31_t)0x4e05a3b2, (q31_t)0x4e00a878, (q31_t)0x4dfbad0d,
+  (q31_t)0x4df6b173, (q31_t)0x4df1b5a8, (q31_t)0x4decb9ad, (q31_t)0x4de7bd82, (q31_t)0x4de2c127, (q31_t)0x4dddc49c, (q31_t)0x4dd8c7e1, (q31_t)0x4dd3caf6,
+  (q31_t)0x4dcecdda, (q31_t)0x4dc9d08f, (q31_t)0x4dc4d314, (q31_t)0x4dbfd569, (q31_t)0x4dbad78e, (q31_t)0x4db5d983, (q31_t)0x4db0db48, (q31_t)0x4dabdcdd,
+  (q31_t)0x4da6de43, (q31_t)0x4da1df78, (q31_t)0x4d9ce07d, (q31_t)0x4d97e153, (q31_t)0x4d92e1f9, (q31_t)0x4d8de26f, (q31_t)0x4d88e2b5, (q31_t)0x4d83e2cb,
+  (q31_t)0x4d7ee2b1, (q31_t)0x4d79e268, (q31_t)0x4d74e1ef, (q31_t)0x4d6fe146, (q31_t)0x4d6ae06d, (q31_t)0x4d65df64, (q31_t)0x4d60de2c, (q31_t)0x4d5bdcc4,
+  (q31_t)0x4d56db2d, (q31_t)0x4d51d965, (q31_t)0x4d4cd76e, (q31_t)0x4d47d547, (q31_t)0x4d42d2f1, (q31_t)0x4d3dd06b, (q31_t)0x4d38cdb5, (q31_t)0x4d33cad0,
+  (q31_t)0x4d2ec7bb, (q31_t)0x4d29c476, (q31_t)0x4d24c102, (q31_t)0x4d1fbd5e, (q31_t)0x4d1ab98b, (q31_t)0x4d15b588, (q31_t)0x4d10b155, (q31_t)0x4d0bacf3,
+  (q31_t)0x4d06a862, (q31_t)0x4d01a3a0, (q31_t)0x4cfc9eb0, (q31_t)0x4cf79990, (q31_t)0x4cf29440, (q31_t)0x4ced8ec1, (q31_t)0x4ce88913, (q31_t)0x4ce38335,
+  (q31_t)0x4cde7d28, (q31_t)0x4cd976eb, (q31_t)0x4cd4707f, (q31_t)0x4ccf69e3, (q31_t)0x4cca6318, (q31_t)0x4cc55c1e, (q31_t)0x4cc054f4, (q31_t)0x4cbb4d9b,
+  (q31_t)0x4cb64613, (q31_t)0x4cb13e5b, (q31_t)0x4cac3674, (q31_t)0x4ca72e5e, (q31_t)0x4ca22619, (q31_t)0x4c9d1da4, (q31_t)0x4c981500, (q31_t)0x4c930c2d,
+  (q31_t)0x4c8e032a, (q31_t)0x4c88f9f8, (q31_t)0x4c83f097, (q31_t)0x4c7ee707, (q31_t)0x4c79dd48, (q31_t)0x4c74d359, (q31_t)0x4c6fc93b, (q31_t)0x4c6abeef,
+  (q31_t)0x4c65b473, (q31_t)0x4c60a9c8, (q31_t)0x4c5b9eed, (q31_t)0x4c5693e4, (q31_t)0x4c5188ac, (q31_t)0x4c4c7d44, (q31_t)0x4c4771ae, (q31_t)0x4c4265e8,
+  (q31_t)0x4c3d59f3, (q31_t)0x4c384dd0, (q31_t)0x4c33417d, (q31_t)0x4c2e34fb, (q31_t)0x4c29284b, (q31_t)0x4c241b6b, (q31_t)0x4c1f0e5c, (q31_t)0x4c1a011f,
+  (q31_t)0x4c14f3b2, (q31_t)0x4c0fe617, (q31_t)0x4c0ad84c, (q31_t)0x4c05ca53, (q31_t)0x4c00bc2b, (q31_t)0x4bfbadd4, (q31_t)0x4bf69f4e, (q31_t)0x4bf19099,
+  (q31_t)0x4bec81b5, (q31_t)0x4be772a3, (q31_t)0x4be26362, (q31_t)0x4bdd53f2, (q31_t)0x4bd84453, (q31_t)0x4bd33485, (q31_t)0x4bce2488, (q31_t)0x4bc9145d,
+  (q31_t)0x4bc40403, (q31_t)0x4bbef37b, (q31_t)0x4bb9e2c3, (q31_t)0x4bb4d1dd, (q31_t)0x4bafc0c8, (q31_t)0x4baaaf85, (q31_t)0x4ba59e12, (q31_t)0x4ba08c72,
+  (q31_t)0x4b9b7aa2, (q31_t)0x4b9668a4, (q31_t)0x4b915677, (q31_t)0x4b8c441c, (q31_t)0x4b873192, (q31_t)0x4b821ed9, (q31_t)0x4b7d0bf2, (q31_t)0x4b77f8dc,
+  (q31_t)0x4b72e598, (q31_t)0x4b6dd225, (q31_t)0x4b68be84, (q31_t)0x4b63aab4, (q31_t)0x4b5e96b6, (q31_t)0x4b598289, (q31_t)0x4b546e2d, (q31_t)0x4b4f59a4,
+  (q31_t)0x4b4a44eb, (q31_t)0x4b453005, (q31_t)0x4b401aef, (q31_t)0x4b3b05ac, (q31_t)0x4b35f03a, (q31_t)0x4b30da9a, (q31_t)0x4b2bc4cb, (q31_t)0x4b26aece,
+  (q31_t)0x4b2198a2, (q31_t)0x4b1c8248, (q31_t)0x4b176bc0, (q31_t)0x4b12550a, (q31_t)0x4b0d3e25, (q31_t)0x4b082712, (q31_t)0x4b030fd1, (q31_t)0x4afdf861,
+  (q31_t)0x4af8e0c3, (q31_t)0x4af3c8f7, (q31_t)0x4aeeb0fd, (q31_t)0x4ae998d4, (q31_t)0x4ae4807d, (q31_t)0x4adf67f8, (q31_t)0x4ada4f45, (q31_t)0x4ad53664,
+  (q31_t)0x4ad01d54, (q31_t)0x4acb0417, (q31_t)0x4ac5eaab, (q31_t)0x4ac0d111, (q31_t)0x4abbb749, (q31_t)0x4ab69d53, (q31_t)0x4ab1832f, (q31_t)0x4aac68dc,
+  (q31_t)0x4aa74e5c, (q31_t)0x4aa233ae, (q31_t)0x4a9d18d1, (q31_t)0x4a97fdc7, (q31_t)0x4a92e28e, (q31_t)0x4a8dc728, (q31_t)0x4a88ab93, (q31_t)0x4a838fd1,
+  (q31_t)0x4a7e73e0, (q31_t)0x4a7957c2, (q31_t)0x4a743b76, (q31_t)0x4a6f1efc, (q31_t)0x4a6a0253, (q31_t)0x4a64e57d, (q31_t)0x4a5fc879, (q31_t)0x4a5aab48,
+  (q31_t)0x4a558de8, (q31_t)0x4a50705a, (q31_t)0x4a4b529f, (q31_t)0x4a4634b6, (q31_t)0x4a41169f, (q31_t)0x4a3bf85a, (q31_t)0x4a36d9e7, (q31_t)0x4a31bb47,
+  (q31_t)0x4a2c9c79, (q31_t)0x4a277d7d, (q31_t)0x4a225e53, (q31_t)0x4a1d3efc, (q31_t)0x4a181f77, (q31_t)0x4a12ffc4, (q31_t)0x4a0ddfe4, (q31_t)0x4a08bfd5,
+  (q31_t)0x4a039f9a, (q31_t)0x49fe7f30, (q31_t)0x49f95e99, (q31_t)0x49f43dd4, (q31_t)0x49ef1ce2, (q31_t)0x49e9fbc2, (q31_t)0x49e4da74, (q31_t)0x49dfb8f9,
+  (q31_t)0x49da9750, (q31_t)0x49d5757a, (q31_t)0x49d05376, (q31_t)0x49cb3145, (q31_t)0x49c60ee6, (q31_t)0x49c0ec59, (q31_t)0x49bbc9a0, (q31_t)0x49b6a6b8,
+  (q31_t)0x49b183a3, (q31_t)0x49ac6061, (q31_t)0x49a73cf1, (q31_t)0x49a21954, (q31_t)0x499cf589, (q31_t)0x4997d191, (q31_t)0x4992ad6c, (q31_t)0x498d8919,
+  (q31_t)0x49886499, (q31_t)0x49833fec, (q31_t)0x497e1b11, (q31_t)0x4978f609, (q31_t)0x4973d0d3, (q31_t)0x496eab70, (q31_t)0x496985e0, (q31_t)0x49646023,
+  (q31_t)0x495f3a38, (q31_t)0x495a1420, (q31_t)0x4954eddb, (q31_t)0x494fc768, (q31_t)0x494aa0c9, (q31_t)0x494579fc, (q31_t)0x49405302, (q31_t)0x493b2bdb,
+  (q31_t)0x49360486, (q31_t)0x4930dd05, (q31_t)0x492bb556, (q31_t)0x49268d7a, (q31_t)0x49216571, (q31_t)0x491c3d3b, (q31_t)0x491714d8, (q31_t)0x4911ec47,
+  (q31_t)0x490cc38a, (q31_t)0x49079aa0, (q31_t)0x49027188, (q31_t)0x48fd4844, (q31_t)0x48f81ed2, (q31_t)0x48f2f534, (q31_t)0x48edcb68, (q31_t)0x48e8a170,
+  (q31_t)0x48e3774a, (q31_t)0x48de4cf8, (q31_t)0x48d92278, (q31_t)0x48d3f7cc, (q31_t)0x48ceccf3, (q31_t)0x48c9a1ed, (q31_t)0x48c476b9, (q31_t)0x48bf4b59,
+  (q31_t)0x48ba1fcd, (q31_t)0x48b4f413, (q31_t)0x48afc82c, (q31_t)0x48aa9c19, (q31_t)0x48a56fd9, (q31_t)0x48a0436c, (q31_t)0x489b16d2, (q31_t)0x4895ea0b,
+  (q31_t)0x4890bd18, (q31_t)0x488b8ff8, (q31_t)0x488662ab, (q31_t)0x48813531, (q31_t)0x487c078b, (q31_t)0x4876d9b8, (q31_t)0x4871abb8, (q31_t)0x486c7d8c,
+  (q31_t)0x48674f33, (q31_t)0x486220ad, (q31_t)0x485cf1fa, (q31_t)0x4857c31b, (q31_t)0x48529410, (q31_t)0x484d64d7, (q31_t)0x48483572, (q31_t)0x484305e1,
+  (q31_t)0x483dd623, (q31_t)0x4838a638, (q31_t)0x48337621, (q31_t)0x482e45dd, (q31_t)0x4829156d, (q31_t)0x4823e4d0, (q31_t)0x481eb407, (q31_t)0x48198311,
+  (q31_t)0x481451ef, (q31_t)0x480f20a0, (q31_t)0x4809ef25, (q31_t)0x4804bd7e, (q31_t)0x47ff8baa, (q31_t)0x47fa59a9, (q31_t)0x47f5277d, (q31_t)0x47eff523,
+  (q31_t)0x47eac29e, (q31_t)0x47e58fec, (q31_t)0x47e05d0e, (q31_t)0x47db2a03, (q31_t)0x47d5f6cc, (q31_t)0x47d0c369, (q31_t)0x47cb8fd9, (q31_t)0x47c65c1d,
+  (q31_t)0x47c12835, (q31_t)0x47bbf421, (q31_t)0x47b6bfe0, (q31_t)0x47b18b74, (q31_t)0x47ac56da, (q31_t)0x47a72215, (q31_t)0x47a1ed24, (q31_t)0x479cb806,
+  (q31_t)0x479782bc, (q31_t)0x47924d46, (q31_t)0x478d17a4, (q31_t)0x4787e1d6, (q31_t)0x4782abdb, (q31_t)0x477d75b5, (q31_t)0x47783f62, (q31_t)0x477308e3,
+  (q31_t)0x476dd239, (q31_t)0x47689b62, (q31_t)0x4763645f, (q31_t)0x475e2d30, (q31_t)0x4758f5d5, (q31_t)0x4753be4e, (q31_t)0x474e869b, (q31_t)0x47494ebc,
+  (q31_t)0x474416b1, (q31_t)0x473ede7a, (q31_t)0x4739a617, (q31_t)0x47346d89, (q31_t)0x472f34ce, (q31_t)0x4729fbe7, (q31_t)0x4724c2d5, (q31_t)0x471f8996,
+  (q31_t)0x471a502c, (q31_t)0x47151696, (q31_t)0x470fdcd4, (q31_t)0x470aa2e6, (q31_t)0x470568cd, (q31_t)0x47002e87, (q31_t)0x46faf416, (q31_t)0x46f5b979,
+  (q31_t)0x46f07eb0, (q31_t)0x46eb43bc, (q31_t)0x46e6089b, (q31_t)0x46e0cd4f, (q31_t)0x46db91d8, (q31_t)0x46d65634, (q31_t)0x46d11a65, (q31_t)0x46cbde6a,
+  (q31_t)0x46c6a244, (q31_t)0x46c165f1, (q31_t)0x46bc2974, (q31_t)0x46b6ecca, (q31_t)0x46b1aff5, (q31_t)0x46ac72f4, (q31_t)0x46a735c8, (q31_t)0x46a1f870,
+  (q31_t)0x469cbaed, (q31_t)0x46977d3e, (q31_t)0x46923f63, (q31_t)0x468d015d, (q31_t)0x4687c32c, (q31_t)0x468284cf, (q31_t)0x467d4646, (q31_t)0x46780792,
+  (q31_t)0x4672c8b3, (q31_t)0x466d89a8, (q31_t)0x46684a71, (q31_t)0x46630b0f, (q31_t)0x465dcb82, (q31_t)0x46588bc9, (q31_t)0x46534be5, (q31_t)0x464e0bd6,
+  (q31_t)0x4648cb9b, (q31_t)0x46438b35, (q31_t)0x463e4aa3, (q31_t)0x463909e7, (q31_t)0x4633c8fe, (q31_t)0x462e87eb, (q31_t)0x462946ac, (q31_t)0x46240542,
+  (q31_t)0x461ec3ad, (q31_t)0x461981ec, (q31_t)0x46144001, (q31_t)0x460efde9, (q31_t)0x4609bba7, (q31_t)0x4604793a, (q31_t)0x45ff36a1, (q31_t)0x45f9f3dd,
+  (q31_t)0x45f4b0ee, (q31_t)0x45ef6dd4, (q31_t)0x45ea2a8f, (q31_t)0x45e4e71f, (q31_t)0x45dfa383, (q31_t)0x45da5fbc, (q31_t)0x45d51bcb, (q31_t)0x45cfd7ae,
+  (q31_t)0x45ca9366, (q31_t)0x45c54ef3, (q31_t)0x45c00a55, (q31_t)0x45bac58c, (q31_t)0x45b58098, (q31_t)0x45b03b79, (q31_t)0x45aaf630, (q31_t)0x45a5b0bb,
+  (q31_t)0x45a06b1b, (q31_t)0x459b2550, (q31_t)0x4595df5a, (q31_t)0x45909939, (q31_t)0x458b52ee, (q31_t)0x45860c77, (q31_t)0x4580c5d6, (q31_t)0x457b7f0a,
+  (q31_t)0x45763813, (q31_t)0x4570f0f1, (q31_t)0x456ba9a4, (q31_t)0x4566622c, (q31_t)0x45611a8a, (q31_t)0x455bd2bc, (q31_t)0x45568ac4, (q31_t)0x455142a2,
+  (q31_t)0x454bfa54, (q31_t)0x4546b1dc, (q31_t)0x45416939, (q31_t)0x453c206b, (q31_t)0x4536d773, (q31_t)0x45318e4f, (q31_t)0x452c4502, (q31_t)0x4526fb89,
+  (q31_t)0x4521b1e6, (q31_t)0x451c6818, (q31_t)0x45171e20, (q31_t)0x4511d3fd, (q31_t)0x450c89af, (q31_t)0x45073f37, (q31_t)0x4501f494, (q31_t)0x44fca9c6,
+  (q31_t)0x44f75ecf, (q31_t)0x44f213ac, (q31_t)0x44ecc85f, (q31_t)0x44e77ce7, (q31_t)0x44e23145, (q31_t)0x44dce579, (q31_t)0x44d79982, (q31_t)0x44d24d60,
+  (q31_t)0x44cd0114, (q31_t)0x44c7b49e, (q31_t)0x44c267fd, (q31_t)0x44bd1b32, (q31_t)0x44b7ce3c, (q31_t)0x44b2811c, (q31_t)0x44ad33d2, (q31_t)0x44a7e65d,
+  (q31_t)0x44a298be, (q31_t)0x449d4af5, (q31_t)0x4497fd01, (q31_t)0x4492aee3, (q31_t)0x448d609b, (q31_t)0x44881228, (q31_t)0x4482c38b, (q31_t)0x447d74c4,
+  (q31_t)0x447825d2, (q31_t)0x4472d6b7, (q31_t)0x446d8771, (q31_t)0x44683801, (q31_t)0x4462e866, (q31_t)0x445d98a2, (q31_t)0x445848b3, (q31_t)0x4452f89b,
+  (q31_t)0x444da858, (q31_t)0x444857ea, (q31_t)0x44430753, (q31_t)0x443db692, (q31_t)0x443865a7, (q31_t)0x44331491, (q31_t)0x442dc351, (q31_t)0x442871e8,
+  (q31_t)0x44232054, (q31_t)0x441dce96, (q31_t)0x44187caf, (q31_t)0x44132a9d, (q31_t)0x440dd861, (q31_t)0x440885fc, (q31_t)0x4403336c, (q31_t)0x43fde0b2,
+  (q31_t)0x43f88dcf, (q31_t)0x43f33ac1, (q31_t)0x43ede78a, (q31_t)0x43e89429, (q31_t)0x43e3409d, (q31_t)0x43ddece8, (q31_t)0x43d8990a, (q31_t)0x43d34501,
+  (q31_t)0x43cdf0ce, (q31_t)0x43c89c72, (q31_t)0x43c347eb, (q31_t)0x43bdf33b, (q31_t)0x43b89e62, (q31_t)0x43b3495e, (q31_t)0x43adf431, (q31_t)0x43a89ed9,
+  (q31_t)0x43a34959, (q31_t)0x439df3ae, (q31_t)0x43989dda, (q31_t)0x439347dc, (q31_t)0x438df1b4, (q31_t)0x43889b63, (q31_t)0x438344e8, (q31_t)0x437dee43,
+  (q31_t)0x43789775, (q31_t)0x4373407d, (q31_t)0x436de95b, (q31_t)0x43689210, (q31_t)0x43633a9c, (q31_t)0x435de2fd, (q31_t)0x43588b36, (q31_t)0x43533344,
+  (q31_t)0x434ddb29, (q31_t)0x434882e5, (q31_t)0x43432a77, (q31_t)0x433dd1e0, (q31_t)0x4338791f, (q31_t)0x43332035, (q31_t)0x432dc721, (q31_t)0x43286de4,
+  (q31_t)0x4323147d, (q31_t)0x431dbaed, (q31_t)0x43186133, (q31_t)0x43130751, (q31_t)0x430dad44, (q31_t)0x4308530f, (q31_t)0x4302f8b0, (q31_t)0x42fd9e28,
+  (q31_t)0x42f84376, (q31_t)0x42f2e89b, (q31_t)0x42ed8d97, (q31_t)0x42e83269, (q31_t)0x42e2d713, (q31_t)0x42dd7b93, (q31_t)0x42d81fe9, (q31_t)0x42d2c417,
+  (q31_t)0x42cd681b, (q31_t)0x42c80bf6, (q31_t)0x42c2afa8, (q31_t)0x42bd5331, (q31_t)0x42b7f690, (q31_t)0x42b299c7, (q31_t)0x42ad3cd4, (q31_t)0x42a7dfb8,
+  (q31_t)0x42a28273, (q31_t)0x429d2505, (q31_t)0x4297c76e, (q31_t)0x429269ae, (q31_t)0x428d0bc4, (q31_t)0x4287adb2, (q31_t)0x42824f76, (q31_t)0x427cf112,
+  (q31_t)0x42779285, (q31_t)0x427233ce, (q31_t)0x426cd4ef, (q31_t)0x426775e6, (q31_t)0x426216b5, (q31_t)0x425cb75a, (q31_t)0x425757d7, (q31_t)0x4251f82b,
+  (q31_t)0x424c9856, (q31_t)0x42473858, (q31_t)0x4241d831, (q31_t)0x423c77e1, (q31_t)0x42371769, (q31_t)0x4231b6c7, (q31_t)0x422c55fd, (q31_t)0x4226f50a,
+  (q31_t)0x422193ee, (q31_t)0x421c32a9, (q31_t)0x4216d13c, (q31_t)0x42116fa5, (q31_t)0x420c0de6, (q31_t)0x4206abfe, (q31_t)0x420149ee, (q31_t)0x41fbe7b5,
+  (q31_t)0x41f68553, (q31_t)0x41f122c8, (q31_t)0x41ebc015, (q31_t)0x41e65d39, (q31_t)0x41e0fa35, (q31_t)0x41db9707, (q31_t)0x41d633b1, (q31_t)0x41d0d033,
+  (q31_t)0x41cb6c8c, (q31_t)0x41c608bc, (q31_t)0x41c0a4c4, (q31_t)0x41bb40a3, (q31_t)0x41b5dc5a, (q31_t)0x41b077e8, (q31_t)0x41ab134e, (q31_t)0x41a5ae8b,
+  (q31_t)0x41a049a0, (q31_t)0x419ae48c, (q31_t)0x41957f4f, (q31_t)0x419019eb, (q31_t)0x418ab45d, (q31_t)0x41854ea8, (q31_t)0x417fe8ca, (q31_t)0x417a82c3,
+  (q31_t)0x41751c94, (q31_t)0x416fb63d, (q31_t)0x416a4fbd, (q31_t)0x4164e916, (q31_t)0x415f8245, (q31_t)0x415a1b4d, (q31_t)0x4154b42c, (q31_t)0x414f4ce2,
+  (q31_t)0x4149e571, (q31_t)0x41447dd7, (q31_t)0x413f1615, (q31_t)0x4139ae2b, (q31_t)0x41344618, (q31_t)0x412edddd, (q31_t)0x4129757b, (q31_t)0x41240cef,
+  (q31_t)0x411ea43c, (q31_t)0x41193b61, (q31_t)0x4113d25d, (q31_t)0x410e6931, (q31_t)0x4108ffdd, (q31_t)0x41039661, (q31_t)0x40fe2cbd, (q31_t)0x40f8c2f1,
+  (q31_t)0x40f358fc, (q31_t)0x40edeee0, (q31_t)0x40e8849b, (q31_t)0x40e31a2f, (q31_t)0x40ddaf9b, (q31_t)0x40d844de, (q31_t)0x40d2d9f9, (q31_t)0x40cd6eed,
+  (q31_t)0x40c803b8, (q31_t)0x40c2985c, (q31_t)0x40bd2cd8, (q31_t)0x40b7c12b, (q31_t)0x40b25557, (q31_t)0x40ace95b, (q31_t)0x40a77d37, (q31_t)0x40a210eb,
+  (q31_t)0x409ca477, (q31_t)0x409737dc, (q31_t)0x4091cb18, (q31_t)0x408c5e2d, (q31_t)0x4086f11a, (q31_t)0x408183df, (q31_t)0x407c167c, (q31_t)0x4076a8f1,
+  (q31_t)0x40713b3f, (q31_t)0x406bcd65, (q31_t)0x40665f63, (q31_t)0x4060f13a, (q31_t)0x405b82e9, (q31_t)0x40561470, (q31_t)0x4050a5cf, (q31_t)0x404b3707,
+  (q31_t)0x4045c817, (q31_t)0x404058ff, (q31_t)0x403ae9c0, (q31_t)0x40357a59, (q31_t)0x40300acb, (q31_t)0x402a9b15, (q31_t)0x40252b37, (q31_t)0x401fbb32,
+  (q31_t)0x401a4b05, (q31_t)0x4014dab1, (q31_t)0x400f6a35, (q31_t)0x4009f992, (q31_t)0x400488c7, (q31_t)0x3fff17d5, (q31_t)0x3ff9a6bb, (q31_t)0x3ff4357a,
+  (q31_t)0x3feec411, (q31_t)0x3fe95281, (q31_t)0x3fe3e0c9, (q31_t)0x3fde6eeb, (q31_t)0x3fd8fce4, (q31_t)0x3fd38ab6, (q31_t)0x3fce1861, (q31_t)0x3fc8a5e5,
+  (q31_t)0x3fc33341, (q31_t)0x3fbdc076, (q31_t)0x3fb84d83, (q31_t)0x3fb2da6a, (q31_t)0x3fad6729, (q31_t)0x3fa7f3c0, (q31_t)0x3fa28031, (q31_t)0x3f9d0c7a,
+  (q31_t)0x3f97989c, (q31_t)0x3f922496, (q31_t)0x3f8cb06a, (q31_t)0x3f873c16, (q31_t)0x3f81c79b, (q31_t)0x3f7c52f9, (q31_t)0x3f76de30, (q31_t)0x3f71693f,
+  (q31_t)0x3f6bf428, (q31_t)0x3f667ee9, (q31_t)0x3f610983, (q31_t)0x3f5b93f6, (q31_t)0x3f561e42, (q31_t)0x3f50a867, (q31_t)0x3f4b3265, (q31_t)0x3f45bc3c,
+  (q31_t)0x3f4045ec, (q31_t)0x3f3acf75, (q31_t)0x3f3558d7, (q31_t)0x3f2fe211, (q31_t)0x3f2a6b25, (q31_t)0x3f24f412, (q31_t)0x3f1f7cd8, (q31_t)0x3f1a0577,
+  (q31_t)0x3f148def, (q31_t)0x3f0f1640, (q31_t)0x3f099e6b, (q31_t)0x3f04266e, (q31_t)0x3efeae4a, (q31_t)0x3ef93600, (q31_t)0x3ef3bd8f, (q31_t)0x3eee44f7,
+  (q31_t)0x3ee8cc38, (q31_t)0x3ee35352, (q31_t)0x3eddda46, (q31_t)0x3ed86113, (q31_t)0x3ed2e7b9, (q31_t)0x3ecd6e38, (q31_t)0x3ec7f491, (q31_t)0x3ec27ac2,
+  (q31_t)0x3ebd00cd, (q31_t)0x3eb786b2, (q31_t)0x3eb20c6f, (q31_t)0x3eac9206, (q31_t)0x3ea71777, (q31_t)0x3ea19cc1, (q31_t)0x3e9c21e4, (q31_t)0x3e96a6e0,
+  (q31_t)0x3e912bb6, (q31_t)0x3e8bb065, (q31_t)0x3e8634ee, (q31_t)0x3e80b950, (q31_t)0x3e7b3d8c, (q31_t)0x3e75c1a1, (q31_t)0x3e70458f, (q31_t)0x3e6ac957,
+  (q31_t)0x3e654cf8, (q31_t)0x3e5fd073, (q31_t)0x3e5a53c8, (q31_t)0x3e54d6f6, (q31_t)0x3e4f59fe, (q31_t)0x3e49dcdf, (q31_t)0x3e445f99, (q31_t)0x3e3ee22e,
+  (q31_t)0x3e39649c, (q31_t)0x3e33e6e3, (q31_t)0x3e2e6904, (q31_t)0x3e28eaff, (q31_t)0x3e236cd4, (q31_t)0x3e1dee82, (q31_t)0x3e18700a, (q31_t)0x3e12f16b,
+  (q31_t)0x3e0d72a6, (q31_t)0x3e07f3bb, (q31_t)0x3e0274aa, (q31_t)0x3dfcf572, (q31_t)0x3df77615, (q31_t)0x3df1f691, (q31_t)0x3dec76e6, (q31_t)0x3de6f716,
+  (q31_t)0x3de1771f, (q31_t)0x3ddbf703, (q31_t)0x3dd676c0, (q31_t)0x3dd0f656, (q31_t)0x3dcb75c7, (q31_t)0x3dc5f512, (q31_t)0x3dc07436, (q31_t)0x3dbaf335,
+  (q31_t)0x3db5720d, (q31_t)0x3daff0c0, (q31_t)0x3daa6f4c, (q31_t)0x3da4edb2, (q31_t)0x3d9f6bf2, (q31_t)0x3d99ea0d, (q31_t)0x3d946801, (q31_t)0x3d8ee5cf,
+  (q31_t)0x3d896377, (q31_t)0x3d83e0f9, (q31_t)0x3d7e5e56, (q31_t)0x3d78db8c, (q31_t)0x3d73589d, (q31_t)0x3d6dd587, (q31_t)0x3d68524c, (q31_t)0x3d62ceeb,
+  (q31_t)0x3d5d4b64, (q31_t)0x3d57c7b7, (q31_t)0x3d5243e4, (q31_t)0x3d4cbfeb, (q31_t)0x3d473bcd, (q31_t)0x3d41b789, (q31_t)0x3d3c331f, (q31_t)0x3d36ae8f,
+  (q31_t)0x3d3129da, (q31_t)0x3d2ba4fe, (q31_t)0x3d261ffd, (q31_t)0x3d209ad7, (q31_t)0x3d1b158a, (q31_t)0x3d159018, (q31_t)0x3d100a80, (q31_t)0x3d0a84c3,
+  (q31_t)0x3d04fee0, (q31_t)0x3cff78d7, (q31_t)0x3cf9f2a9, (q31_t)0x3cf46c55, (q31_t)0x3ceee5db, (q31_t)0x3ce95f3c, (q31_t)0x3ce3d877, (q31_t)0x3cde518d,
+  (q31_t)0x3cd8ca7d, (q31_t)0x3cd34347, (q31_t)0x3ccdbbed, (q31_t)0x3cc8346c, (q31_t)0x3cc2acc6, (q31_t)0x3cbd24fb, (q31_t)0x3cb79d0a, (q31_t)0x3cb214f4,
+  (q31_t)0x3cac8cb8, (q31_t)0x3ca70457, (q31_t)0x3ca17bd0, (q31_t)0x3c9bf324, (q31_t)0x3c966a53, (q31_t)0x3c90e15c, (q31_t)0x3c8b5840, (q31_t)0x3c85cefe,
+  (q31_t)0x3c804598, (q31_t)0x3c7abc0c, (q31_t)0x3c75325a, (q31_t)0x3c6fa883, (q31_t)0x3c6a1e87, (q31_t)0x3c649466, (q31_t)0x3c5f0a20, (q31_t)0x3c597fb4,
+  (q31_t)0x3c53f523, (q31_t)0x3c4e6a6d, (q31_t)0x3c48df91, (q31_t)0x3c435491, (q31_t)0x3c3dc96b, (q31_t)0x3c383e20, (q31_t)0x3c32b2b0, (q31_t)0x3c2d271b,
+  (q31_t)0x3c279b61, (q31_t)0x3c220f81, (q31_t)0x3c1c837d, (q31_t)0x3c16f753, (q31_t)0x3c116b04, (q31_t)0x3c0bde91, (q31_t)0x3c0651f8, (q31_t)0x3c00c53a,
+  (q31_t)0x3bfb3857, (q31_t)0x3bf5ab50, (q31_t)0x3bf01e23, (q31_t)0x3bea90d1, (q31_t)0x3be5035a, (q31_t)0x3bdf75bf, (q31_t)0x3bd9e7fe, (q31_t)0x3bd45a19,
+  (q31_t)0x3bcecc0e, (q31_t)0x3bc93ddf, (q31_t)0x3bc3af8b, (q31_t)0x3bbe2112, (q31_t)0x3bb89274, (q31_t)0x3bb303b1, (q31_t)0x3bad74c9, (q31_t)0x3ba7e5bd,
+  (q31_t)0x3ba2568c, (q31_t)0x3b9cc736, (q31_t)0x3b9737bb, (q31_t)0x3b91a81c, (q31_t)0x3b8c1857, (q31_t)0x3b86886e, (q31_t)0x3b80f861, (q31_t)0x3b7b682e,
+  (q31_t)0x3b75d7d7, (q31_t)0x3b70475c, (q31_t)0x3b6ab6bb, (q31_t)0x3b6525f6, (q31_t)0x3b5f950c, (q31_t)0x3b5a03fe, (q31_t)0x3b5472cb, (q31_t)0x3b4ee173,
+  (q31_t)0x3b494ff7, (q31_t)0x3b43be57, (q31_t)0x3b3e2c91, (q31_t)0x3b389aa8, (q31_t)0x3b330899, (q31_t)0x3b2d7666, (q31_t)0x3b27e40f, (q31_t)0x3b225193,
+  (q31_t)0x3b1cbef3, (q31_t)0x3b172c2e, (q31_t)0x3b119945, (q31_t)0x3b0c0637, (q31_t)0x3b067305, (q31_t)0x3b00dfaf, (q31_t)0x3afb4c34, (q31_t)0x3af5b894,
+  (q31_t)0x3af024d1, (q31_t)0x3aea90e9, (q31_t)0x3ae4fcdc, (q31_t)0x3adf68ac, (q31_t)0x3ad9d457, (q31_t)0x3ad43fdd, (q31_t)0x3aceab40, (q31_t)0x3ac9167e,
+  (q31_t)0x3ac38198, (q31_t)0x3abdec8d, (q31_t)0x3ab8575f, (q31_t)0x3ab2c20c, (q31_t)0x3aad2c95, (q31_t)0x3aa796fa, (q31_t)0x3aa2013a, (q31_t)0x3a9c6b57,
+  (q31_t)0x3a96d54f, (q31_t)0x3a913f23, (q31_t)0x3a8ba8d3, (q31_t)0x3a86125f, (q31_t)0x3a807bc7, (q31_t)0x3a7ae50a, (q31_t)0x3a754e2a, (q31_t)0x3a6fb726,
+  (q31_t)0x3a6a1ffd, (q31_t)0x3a6488b1, (q31_t)0x3a5ef140, (q31_t)0x3a5959ab, (q31_t)0x3a53c1f3, (q31_t)0x3a4e2a16, (q31_t)0x3a489216, (q31_t)0x3a42f9f2,
+  (q31_t)0x3a3d61a9, (q31_t)0x3a37c93d, (q31_t)0x3a3230ad, (q31_t)0x3a2c97f9, (q31_t)0x3a26ff21, (q31_t)0x3a216625, (q31_t)0x3a1bcd05, (q31_t)0x3a1633c1,
+  (q31_t)0x3a109a5a, (q31_t)0x3a0b00cf, (q31_t)0x3a056720, (q31_t)0x39ffcd4d, (q31_t)0x39fa3356, (q31_t)0x39f4993c, (q31_t)0x39eefefe, (q31_t)0x39e9649c,
+  (q31_t)0x39e3ca17, (q31_t)0x39de2f6d, (q31_t)0x39d894a0, (q31_t)0x39d2f9b0, (q31_t)0x39cd5e9b, (q31_t)0x39c7c363, (q31_t)0x39c22808, (q31_t)0x39bc8c89,
+  (q31_t)0x39b6f0e6, (q31_t)0x39b1551f, (q31_t)0x39abb935, (q31_t)0x39a61d28, (q31_t)0x39a080f6, (q31_t)0x399ae4a2, (q31_t)0x39954829, (q31_t)0x398fab8e,
+  (q31_t)0x398a0ece, (q31_t)0x398471ec, (q31_t)0x397ed4e5, (q31_t)0x397937bc, (q31_t)0x39739a6e, (q31_t)0x396dfcfe, (q31_t)0x39685f6a, (q31_t)0x3962c1b2,
+  (q31_t)0x395d23d7, (q31_t)0x395785d9, (q31_t)0x3951e7b8, (q31_t)0x394c4973, (q31_t)0x3946ab0a, (q31_t)0x39410c7f, (q31_t)0x393b6dd0, (q31_t)0x3935cefd,
+  (q31_t)0x39303008, (q31_t)0x392a90ef, (q31_t)0x3924f1b3, (q31_t)0x391f5254, (q31_t)0x3919b2d1, (q31_t)0x3914132b, (q31_t)0x390e7362, (q31_t)0x3908d376,
+  (q31_t)0x39033367, (q31_t)0x38fd9334, (q31_t)0x38f7f2de, (q31_t)0x38f25266, (q31_t)0x38ecb1ca, (q31_t)0x38e7110a, (q31_t)0x38e17028, (q31_t)0x38dbcf23,
+  (q31_t)0x38d62dfb, (q31_t)0x38d08caf, (q31_t)0x38caeb41, (q31_t)0x38c549af, (q31_t)0x38bfa7fb, (q31_t)0x38ba0623, (q31_t)0x38b46429, (q31_t)0x38aec20b,
+  (q31_t)0x38a91fcb, (q31_t)0x38a37d67, (q31_t)0x389ddae1, (q31_t)0x38983838, (q31_t)0x3892956c, (q31_t)0x388cf27d, (q31_t)0x38874f6b, (q31_t)0x3881ac36,
+  (q31_t)0x387c08de, (q31_t)0x38766564, (q31_t)0x3870c1c6, (q31_t)0x386b1e06, (q31_t)0x38657a23, (q31_t)0x385fd61d, (q31_t)0x385a31f5, (q31_t)0x38548daa,
+  (q31_t)0x384ee93b, (q31_t)0x384944ab, (q31_t)0x38439ff7, (q31_t)0x383dfb21, (q31_t)0x38385628, (q31_t)0x3832b10d, (q31_t)0x382d0bce, (q31_t)0x3827666d,
+  (q31_t)0x3821c0ea, (q31_t)0x381c1b44, (q31_t)0x3816757b, (q31_t)0x3810cf90, (q31_t)0x380b2982, (q31_t)0x38058351, (q31_t)0x37ffdcfe, (q31_t)0x37fa3688,
+  (q31_t)0x37f48ff0, (q31_t)0x37eee936, (q31_t)0x37e94259, (q31_t)0x37e39b59, (q31_t)0x37ddf437, (q31_t)0x37d84cf2, (q31_t)0x37d2a58b, (q31_t)0x37ccfe02,
+  (q31_t)0x37c75656, (q31_t)0x37c1ae87, (q31_t)0x37bc0697, (q31_t)0x37b65e84, (q31_t)0x37b0b64e, (q31_t)0x37ab0df6, (q31_t)0x37a5657c, (q31_t)0x379fbce0,
+  (q31_t)0x379a1421, (q31_t)0x37946b40, (q31_t)0x378ec23d, (q31_t)0x37891917, (q31_t)0x37836fcf, (q31_t)0x377dc665, (q31_t)0x37781cd9, (q31_t)0x3772732a,
+  (q31_t)0x376cc959, (q31_t)0x37671f66, (q31_t)0x37617551, (q31_t)0x375bcb1a, (q31_t)0x375620c1, (q31_t)0x37507645, (q31_t)0x374acba7, (q31_t)0x374520e7,
+  (q31_t)0x373f7606, (q31_t)0x3739cb02, (q31_t)0x37341fdc, (q31_t)0x372e7493, (q31_t)0x3728c929, (q31_t)0x37231d9d, (q31_t)0x371d71ef, (q31_t)0x3717c61f,
+  (q31_t)0x37121a2d, (q31_t)0x370c6e19, (q31_t)0x3706c1e2, (q31_t)0x3701158a, (q31_t)0x36fb6910, (q31_t)0x36f5bc75, (q31_t)0x36f00fb7, (q31_t)0x36ea62d7,
+  (q31_t)0x36e4b5d6, (q31_t)0x36df08b2, (q31_t)0x36d95b6d, (q31_t)0x36d3ae06, (q31_t)0x36ce007d, (q31_t)0x36c852d2, (q31_t)0x36c2a506, (q31_t)0x36bcf718,
+  (q31_t)0x36b74908, (q31_t)0x36b19ad6, (q31_t)0x36abec82, (q31_t)0x36a63e0d, (q31_t)0x36a08f76, (q31_t)0x369ae0bd, (q31_t)0x369531e3, (q31_t)0x368f82e7,
+  (q31_t)0x3689d3c9, (q31_t)0x3684248a, (q31_t)0x367e7529, (q31_t)0x3678c5a7, (q31_t)0x36731602, (q31_t)0x366d663d, (q31_t)0x3667b655, (q31_t)0x3662064c,
+  (q31_t)0x365c5622, (q31_t)0x3656a5d6, (q31_t)0x3650f569, (q31_t)0x364b44da, (q31_t)0x36459429, (q31_t)0x363fe357, (q31_t)0x363a3264, (q31_t)0x3634814f,
+  (q31_t)0x362ed019, (q31_t)0x36291ec1, (q31_t)0x36236d48, (q31_t)0x361dbbad, (q31_t)0x361809f1, (q31_t)0x36125814, (q31_t)0x360ca615, (q31_t)0x3606f3f5,
+  (q31_t)0x360141b4, (q31_t)0x35fb8f52, (q31_t)0x35f5dcce, (q31_t)0x35f02a28, (q31_t)0x35ea7762, (q31_t)0x35e4c47a, (q31_t)0x35df1171, (q31_t)0x35d95e47,
+  (q31_t)0x35d3aafc, (q31_t)0x35cdf78f, (q31_t)0x35c84401, (q31_t)0x35c29052, (q31_t)0x35bcdc82, (q31_t)0x35b72891, (q31_t)0x35b1747e, (q31_t)0x35abc04b,
+  (q31_t)0x35a60bf6, (q31_t)0x35a05781, (q31_t)0x359aa2ea, (q31_t)0x3594ee32, (q31_t)0x358f3959, (q31_t)0x3589845f, (q31_t)0x3583cf44, (q31_t)0x357e1a08,
+  (q31_t)0x357864ab, (q31_t)0x3572af2d, (q31_t)0x356cf98e, (q31_t)0x356743ce, (q31_t)0x35618ded, (q31_t)0x355bd7eb, (q31_t)0x355621c9, (q31_t)0x35506b85,
+  (q31_t)0x354ab520, (q31_t)0x3544fe9b, (q31_t)0x353f47f5, (q31_t)0x3539912e, (q31_t)0x3533da46, (q31_t)0x352e233d, (q31_t)0x35286c14, (q31_t)0x3522b4c9,
+  (q31_t)0x351cfd5e, (q31_t)0x351745d2, (q31_t)0x35118e26, (q31_t)0x350bd658, (q31_t)0x35061e6a, (q31_t)0x3500665c, (q31_t)0x34faae2c, (q31_t)0x34f4f5dc,
+  (q31_t)0x34ef3d6b, (q31_t)0x34e984da, (q31_t)0x34e3cc28, (q31_t)0x34de1355, (q31_t)0x34d85a62, (q31_t)0x34d2a14e, (q31_t)0x34cce819, (q31_t)0x34c72ec4,
+  (q31_t)0x34c1754e, (q31_t)0x34bbbbb8, (q31_t)0x34b60202, (q31_t)0x34b0482a, (q31_t)0x34aa8e33, (q31_t)0x34a4d41a, (q31_t)0x349f19e2, (q31_t)0x34995f88,
+  (q31_t)0x3493a50f, (q31_t)0x348dea75, (q31_t)0x34882fba, (q31_t)0x348274e0, (q31_t)0x347cb9e4, (q31_t)0x3476fec9, (q31_t)0x3471438d, (q31_t)0x346b8830,
+  (q31_t)0x3465ccb4, (q31_t)0x34601117, (q31_t)0x345a5559, (q31_t)0x3454997c, (q31_t)0x344edd7e, (q31_t)0x34492160, (q31_t)0x34436521, (q31_t)0x343da8c3,
+  (q31_t)0x3437ec44, (q31_t)0x34322fa5, (q31_t)0x342c72e6, (q31_t)0x3426b606, (q31_t)0x3420f907, (q31_t)0x341b3be7, (q31_t)0x34157ea7, (q31_t)0x340fc147,
+  (q31_t)0x340a03c7, (q31_t)0x34044626, (q31_t)0x33fe8866, (q31_t)0x33f8ca86, (q31_t)0x33f30c85, (q31_t)0x33ed4e65, (q31_t)0x33e79024, (q31_t)0x33e1d1c4,
+  (q31_t)0x33dc1343, (q31_t)0x33d654a2, (q31_t)0x33d095e2, (q31_t)0x33cad701, (q31_t)0x33c51801, (q31_t)0x33bf58e1, (q31_t)0x33b999a0, (q31_t)0x33b3da40,
+  (q31_t)0x33ae1ac0, (q31_t)0x33a85b20, (q31_t)0x33a29b60, (q31_t)0x339cdb81, (q31_t)0x33971b81, (q31_t)0x33915b62, (q31_t)0x338b9b22, (q31_t)0x3385dac4,
+  (q31_t)0x33801a45, (q31_t)0x337a59a6, (q31_t)0x337498e8, (q31_t)0x336ed80a, (q31_t)0x3369170c, (q31_t)0x336355ef, (q31_t)0x335d94b2, (q31_t)0x3357d355,
+  (q31_t)0x335211d8, (q31_t)0x334c503c, (q31_t)0x33468e80, (q31_t)0x3340cca5, (q31_t)0x333b0aaa, (q31_t)0x3335488f, (q31_t)0x332f8655, (q31_t)0x3329c3fb,
+  (q31_t)0x33240182, (q31_t)0x331e3ee9, (q31_t)0x33187c31, (q31_t)0x3312b959, (q31_t)0x330cf661, (q31_t)0x3307334a, (q31_t)0x33017014, (q31_t)0x32fbacbe,
+  (q31_t)0x32f5e948, (q31_t)0x32f025b4, (q31_t)0x32ea61ff, (q31_t)0x32e49e2c, (q31_t)0x32deda39, (q31_t)0x32d91626, (q31_t)0x32d351f5, (q31_t)0x32cd8da4,
+  (q31_t)0x32c7c933, (q31_t)0x32c204a3, (q31_t)0x32bc3ff4, (q31_t)0x32b67b26, (q31_t)0x32b0b638, (q31_t)0x32aaf12b, (q31_t)0x32a52bff, (q31_t)0x329f66b4,
+  (q31_t)0x3299a149, (q31_t)0x3293dbbf, (q31_t)0x328e1616, (q31_t)0x3288504e, (q31_t)0x32828a67, (q31_t)0x327cc460, (q31_t)0x3276fe3a, (q31_t)0x327137f6,
+  (q31_t)0x326b7192, (q31_t)0x3265ab0f, (q31_t)0x325fe46c, (q31_t)0x325a1dab, (q31_t)0x325456cb, (q31_t)0x324e8fcc, (q31_t)0x3248c8ad, (q31_t)0x32430170,
+  (q31_t)0x323d3a14, (q31_t)0x32377298, (q31_t)0x3231aafe, (q31_t)0x322be345, (q31_t)0x32261b6c, (q31_t)0x32205375, (q31_t)0x321a8b5f, (q31_t)0x3214c32a,
+  (q31_t)0x320efad6, (q31_t)0x32093263, (q31_t)0x320369d2, (q31_t)0x31fda121, (q31_t)0x31f7d852, (q31_t)0x31f20f64, (q31_t)0x31ec4657, (q31_t)0x31e67d2b,
+  (q31_t)0x31e0b3e0, (q31_t)0x31daea77, (q31_t)0x31d520ef, (q31_t)0x31cf5748, (q31_t)0x31c98d83, (q31_t)0x31c3c39e, (q31_t)0x31bdf99b, (q31_t)0x31b82f7a,
+  (q31_t)0x31b2653a, (q31_t)0x31ac9adb, (q31_t)0x31a6d05d, (q31_t)0x31a105c1, (q31_t)0x319b3b06, (q31_t)0x3195702d, (q31_t)0x318fa535, (q31_t)0x3189da1e,
+  (q31_t)0x31840ee9, (q31_t)0x317e4395, (q31_t)0x31787823, (q31_t)0x3172ac92, (q31_t)0x316ce0e3, (q31_t)0x31671515, (q31_t)0x31614929, (q31_t)0x315b7d1e,
+  (q31_t)0x3155b0f5, (q31_t)0x314fe4ae, (q31_t)0x314a1848, (q31_t)0x31444bc3, (q31_t)0x313e7f21, (q31_t)0x3138b260, (q31_t)0x3132e580, (q31_t)0x312d1882,
+  (q31_t)0x31274b66, (q31_t)0x31217e2c, (q31_t)0x311bb0d3, (q31_t)0x3115e35c, (q31_t)0x311015c6, (q31_t)0x310a4813, (q31_t)0x31047a41, (q31_t)0x30feac51,
+  (q31_t)0x30f8de42, (q31_t)0x30f31016, (q31_t)0x30ed41cb, (q31_t)0x30e77362, (q31_t)0x30e1a4db, (q31_t)0x30dbd636, (q31_t)0x30d60772, (q31_t)0x30d03891,
+  (q31_t)0x30ca6991, (q31_t)0x30c49a74, (q31_t)0x30becb38, (q31_t)0x30b8fbde, (q31_t)0x30b32c66, (q31_t)0x30ad5cd0, (q31_t)0x30a78d1c, (q31_t)0x30a1bd4a,
+  (q31_t)0x309bed5a, (q31_t)0x30961d4c, (q31_t)0x30904d20, (q31_t)0x308a7cd6, (q31_t)0x3084ac6e, (q31_t)0x307edbe9, (q31_t)0x30790b45, (q31_t)0x30733a83,
+  (q31_t)0x306d69a4, (q31_t)0x306798a7, (q31_t)0x3061c78b, (q31_t)0x305bf652, (q31_t)0x305624fb, (q31_t)0x30505387, (q31_t)0x304a81f4, (q31_t)0x3044b044,
+  (q31_t)0x303ede76, (q31_t)0x30390c8a, (q31_t)0x30333a80, (q31_t)0x302d6859, (q31_t)0x30279614, (q31_t)0x3021c3b1, (q31_t)0x301bf131, (q31_t)0x30161e93,
+  (q31_t)0x30104bd7, (q31_t)0x300a78fe, (q31_t)0x3004a607, (q31_t)0x2ffed2f2, (q31_t)0x2ff8ffc0, (q31_t)0x2ff32c70, (q31_t)0x2fed5902, (q31_t)0x2fe78577,
+  (q31_t)0x2fe1b1cf, (q31_t)0x2fdbde09, (q31_t)0x2fd60a25, (q31_t)0x2fd03624, (q31_t)0x2fca6206, (q31_t)0x2fc48dc9, (q31_t)0x2fbeb970, (q31_t)0x2fb8e4f9,
+  (q31_t)0x2fb31064, (q31_t)0x2fad3bb3, (q31_t)0x2fa766e3, (q31_t)0x2fa191f7, (q31_t)0x2f9bbced, (q31_t)0x2f95e7c5, (q31_t)0x2f901280, (q31_t)0x2f8a3d1e,
+  (q31_t)0x2f84679f, (q31_t)0x2f7e9202, (q31_t)0x2f78bc48, (q31_t)0x2f72e671, (q31_t)0x2f6d107c, (q31_t)0x2f673a6a, (q31_t)0x2f61643b, (q31_t)0x2f5b8def,
+  (q31_t)0x2f55b785, (q31_t)0x2f4fe0ff, (q31_t)0x2f4a0a5b, (q31_t)0x2f44339a, (q31_t)0x2f3e5cbb, (q31_t)0x2f3885c0, (q31_t)0x2f32aea8, (q31_t)0x2f2cd772,
+  (q31_t)0x2f27001f, (q31_t)0x2f2128af, (q31_t)0x2f1b5122, (q31_t)0x2f157979, (q31_t)0x2f0fa1b2, (q31_t)0x2f09c9ce, (q31_t)0x2f03f1cd, (q31_t)0x2efe19ae,
+  (q31_t)0x2ef84173, (q31_t)0x2ef2691b, (q31_t)0x2eec90a7, (q31_t)0x2ee6b815, (q31_t)0x2ee0df66, (q31_t)0x2edb069a, (q31_t)0x2ed52db1, (q31_t)0x2ecf54ac,
+  (q31_t)0x2ec97b89, (q31_t)0x2ec3a24a, (q31_t)0x2ebdc8ee, (q31_t)0x2eb7ef75, (q31_t)0x2eb215df, (q31_t)0x2eac3c2d, (q31_t)0x2ea6625d, (q31_t)0x2ea08871,
+  (q31_t)0x2e9aae68, (q31_t)0x2e94d443, (q31_t)0x2e8efa00, (q31_t)0x2e891fa1, (q31_t)0x2e834525, (q31_t)0x2e7d6a8d, (q31_t)0x2e778fd8, (q31_t)0x2e71b506,
+  (q31_t)0x2e6bda17, (q31_t)0x2e65ff0c, (q31_t)0x2e6023e5, (q31_t)0x2e5a48a0, (q31_t)0x2e546d3f, (q31_t)0x2e4e91c2, (q31_t)0x2e48b628, (q31_t)0x2e42da71,
+  (q31_t)0x2e3cfe9e, (q31_t)0x2e3722ae, (q31_t)0x2e3146a2, (q31_t)0x2e2b6a79, (q31_t)0x2e258e34, (q31_t)0x2e1fb1d3, (q31_t)0x2e19d554, (q31_t)0x2e13f8ba,
+  (q31_t)0x2e0e1c03, (q31_t)0x2e083f30, (q31_t)0x2e026240, (q31_t)0x2dfc8534, (q31_t)0x2df6a80b, (q31_t)0x2df0cac6, (q31_t)0x2deaed65, (q31_t)0x2de50fe8,
+  (q31_t)0x2ddf324e, (q31_t)0x2dd95498, (q31_t)0x2dd376c5, (q31_t)0x2dcd98d7, (q31_t)0x2dc7bacc, (q31_t)0x2dc1dca4, (q31_t)0x2dbbfe61, (q31_t)0x2db62001,
+  (q31_t)0x2db04186, (q31_t)0x2daa62ee, (q31_t)0x2da4843a, (q31_t)0x2d9ea569, (q31_t)0x2d98c67d, (q31_t)0x2d92e774, (q31_t)0x2d8d084f, (q31_t)0x2d87290f,
+  (q31_t)0x2d8149b2, (q31_t)0x2d7b6a39, (q31_t)0x2d758aa4, (q31_t)0x2d6faaf3, (q31_t)0x2d69cb26, (q31_t)0x2d63eb3d, (q31_t)0x2d5e0b38, (q31_t)0x2d582b17,
+  (q31_t)0x2d524ada, (q31_t)0x2d4c6a81, (q31_t)0x2d468a0c, (q31_t)0x2d40a97b, (q31_t)0x2d3ac8ce, (q31_t)0x2d34e805, (q31_t)0x2d2f0721, (q31_t)0x2d292620,
+  (q31_t)0x2d234504, (q31_t)0x2d1d63cc, (q31_t)0x2d178278, (q31_t)0x2d11a108, (q31_t)0x2d0bbf7d, (q31_t)0x2d05ddd5, (q31_t)0x2cfffc12, (q31_t)0x2cfa1a33,
+  (q31_t)0x2cf43839, (q31_t)0x2cee5622, (q31_t)0x2ce873f0, (q31_t)0x2ce291a2, (q31_t)0x2cdcaf39, (q31_t)0x2cd6ccb4, (q31_t)0x2cd0ea13, (q31_t)0x2ccb0756,
+  (q31_t)0x2cc5247e, (q31_t)0x2cbf418b, (q31_t)0x2cb95e7b, (q31_t)0x2cb37b51, (q31_t)0x2cad980a, (q31_t)0x2ca7b4a8, (q31_t)0x2ca1d12a, (q31_t)0x2c9bed91,
+  (q31_t)0x2c9609dd, (q31_t)0x2c90260d, (q31_t)0x2c8a4221, (q31_t)0x2c845e1a, (q31_t)0x2c7e79f7, (q31_t)0x2c7895b9, (q31_t)0x2c72b160, (q31_t)0x2c6ccceb,
+  (q31_t)0x2c66e85b, (q31_t)0x2c6103af, (q31_t)0x2c5b1ee8, (q31_t)0x2c553a06, (q31_t)0x2c4f5508, (q31_t)0x2c496fef, (q31_t)0x2c438abb, (q31_t)0x2c3da56b,
+  (q31_t)0x2c37c000, (q31_t)0x2c31da7a, (q31_t)0x2c2bf4d8, (q31_t)0x2c260f1c, (q31_t)0x2c202944, (q31_t)0x2c1a4351, (q31_t)0x2c145d42, (q31_t)0x2c0e7719,
+  (q31_t)0x2c0890d4, (q31_t)0x2c02aa74, (q31_t)0x2bfcc3f9, (q31_t)0x2bf6dd63, (q31_t)0x2bf0f6b1, (q31_t)0x2beb0fe5, (q31_t)0x2be528fd, (q31_t)0x2bdf41fb,
+  (q31_t)0x2bd95add, (q31_t)0x2bd373a4, (q31_t)0x2bcd8c51, (q31_t)0x2bc7a4e2, (q31_t)0x2bc1bd58, (q31_t)0x2bbbd5b3, (q31_t)0x2bb5edf4, (q31_t)0x2bb00619,
+  (q31_t)0x2baa1e23, (q31_t)0x2ba43613, (q31_t)0x2b9e4de7, (q31_t)0x2b9865a1, (q31_t)0x2b927d3f, (q31_t)0x2b8c94c3, (q31_t)0x2b86ac2c, (q31_t)0x2b80c37a,
+  (q31_t)0x2b7adaae, (q31_t)0x2b74f1c6, (q31_t)0x2b6f08c4, (q31_t)0x2b691fa6, (q31_t)0x2b63366f, (q31_t)0x2b5d4d1c, (q31_t)0x2b5763ae, (q31_t)0x2b517a26,
+  (q31_t)0x2b4b9083, (q31_t)0x2b45a6c6, (q31_t)0x2b3fbced, (q31_t)0x2b39d2fa, (q31_t)0x2b33e8ed, (q31_t)0x2b2dfec5, (q31_t)0x2b281482, (q31_t)0x2b222a24,
+  (q31_t)0x2b1c3fac, (q31_t)0x2b165519, (q31_t)0x2b106a6c, (q31_t)0x2b0a7fa4, (q31_t)0x2b0494c2, (q31_t)0x2afea9c5, (q31_t)0x2af8bead, (q31_t)0x2af2d37b,
+  (q31_t)0x2aece82f, (q31_t)0x2ae6fcc8, (q31_t)0x2ae11146, (q31_t)0x2adb25aa, (q31_t)0x2ad539f4, (q31_t)0x2acf4e23, (q31_t)0x2ac96238, (q31_t)0x2ac37633,
+  (q31_t)0x2abd8a13, (q31_t)0x2ab79dd8, (q31_t)0x2ab1b184, (q31_t)0x2aabc515, (q31_t)0x2aa5d88b, (q31_t)0x2a9febe8, (q31_t)0x2a99ff2a, (q31_t)0x2a941252,
+  (q31_t)0x2a8e255f, (q31_t)0x2a883853, (q31_t)0x2a824b2c, (q31_t)0x2a7c5deb, (q31_t)0x2a76708f, (q31_t)0x2a70831a, (q31_t)0x2a6a958a, (q31_t)0x2a64a7e0,
+  (q31_t)0x2a5eba1c, (q31_t)0x2a58cc3e, (q31_t)0x2a52de46, (q31_t)0x2a4cf033, (q31_t)0x2a470207, (q31_t)0x2a4113c0, (q31_t)0x2a3b2560, (q31_t)0x2a3536e5,
+  (q31_t)0x2a2f4850, (q31_t)0x2a2959a1, (q31_t)0x2a236ad9, (q31_t)0x2a1d7bf6, (q31_t)0x2a178cf9, (q31_t)0x2a119de2, (q31_t)0x2a0baeb2, (q31_t)0x2a05bf67,
+  (q31_t)0x29ffd003, (q31_t)0x29f9e084, (q31_t)0x29f3f0ec, (q31_t)0x29ee013a, (q31_t)0x29e8116e, (q31_t)0x29e22188, (q31_t)0x29dc3188, (q31_t)0x29d6416f,
+  (q31_t)0x29d0513b, (q31_t)0x29ca60ee, (q31_t)0x29c47087, (q31_t)0x29be8007, (q31_t)0x29b88f6c, (q31_t)0x29b29eb8, (q31_t)0x29acadea, (q31_t)0x29a6bd02,
+  (q31_t)0x29a0cc01, (q31_t)0x299adae6, (q31_t)0x2994e9b1, (q31_t)0x298ef863, (q31_t)0x298906fb, (q31_t)0x2983157a, (q31_t)0x297d23df, (q31_t)0x2977322a,
+  (q31_t)0x2971405b, (q31_t)0x296b4e74, (q31_t)0x29655c72, (q31_t)0x295f6a57, (q31_t)0x29597823, (q31_t)0x295385d5, (q31_t)0x294d936d, (q31_t)0x2947a0ec,
+  (q31_t)0x2941ae52, (q31_t)0x293bbb9e, (q31_t)0x2935c8d1, (q31_t)0x292fd5ea, (q31_t)0x2929e2ea, (q31_t)0x2923efd0, (q31_t)0x291dfc9d, (q31_t)0x29180951,
+  (q31_t)0x291215eb, (q31_t)0x290c226c, (q31_t)0x29062ed4, (q31_t)0x29003b23, (q31_t)0x28fa4758, (q31_t)0x28f45374, (q31_t)0x28ee5f76, (q31_t)0x28e86b5f,
+  (q31_t)0x28e27730, (q31_t)0x28dc82e6, (q31_t)0x28d68e84, (q31_t)0x28d09a09, (q31_t)0x28caa574, (q31_t)0x28c4b0c6, (q31_t)0x28bebbff, (q31_t)0x28b8c71f,
+  (q31_t)0x28b2d226, (q31_t)0x28acdd13, (q31_t)0x28a6e7e8, (q31_t)0x28a0f2a3, (q31_t)0x289afd46, (q31_t)0x289507cf, (q31_t)0x288f123f, (q31_t)0x28891c97,
+  (q31_t)0x288326d5, (q31_t)0x287d30fa, (q31_t)0x28773b07, (q31_t)0x287144fa, (q31_t)0x286b4ed5, (q31_t)0x28655896, (q31_t)0x285f623f, (q31_t)0x28596bce,
+  (q31_t)0x28537545, (q31_t)0x284d7ea3, (q31_t)0x284787e8, (q31_t)0x28419114, (q31_t)0x283b9a28, (q31_t)0x2835a322, (q31_t)0x282fac04, (q31_t)0x2829b4cd,
+  (q31_t)0x2823bd7d, (q31_t)0x281dc615, (q31_t)0x2817ce93, (q31_t)0x2811d6f9, (q31_t)0x280bdf46, (q31_t)0x2805e77b, (q31_t)0x27ffef97, (q31_t)0x27f9f79a,
+  (q31_t)0x27f3ff85, (q31_t)0x27ee0756, (q31_t)0x27e80f10, (q31_t)0x27e216b0, (q31_t)0x27dc1e38, (q31_t)0x27d625a8, (q31_t)0x27d02cff, (q31_t)0x27ca343d,
+  (q31_t)0x27c43b63, (q31_t)0x27be4270, (q31_t)0x27b84965, (q31_t)0x27b25041, (q31_t)0x27ac5705, (q31_t)0x27a65db0, (q31_t)0x27a06443, (q31_t)0x279a6abd,
+  (q31_t)0x2794711f, (q31_t)0x278e7768, (q31_t)0x27887d99, (q31_t)0x278283b2, (q31_t)0x277c89b3, (q31_t)0x27768f9b, (q31_t)0x2770956a, (q31_t)0x276a9b21,
+  (q31_t)0x2764a0c0, (q31_t)0x275ea647, (q31_t)0x2758abb6, (q31_t)0x2752b10c, (q31_t)0x274cb64a, (q31_t)0x2746bb6f, (q31_t)0x2740c07d, (q31_t)0x273ac572,
+  (q31_t)0x2734ca4f, (q31_t)0x272ecf14, (q31_t)0x2728d3c0, (q31_t)0x2722d855, (q31_t)0x271cdcd1, (q31_t)0x2716e136, (q31_t)0x2710e582, (q31_t)0x270ae9b6,
+  (q31_t)0x2704edd2, (q31_t)0x26fef1d5, (q31_t)0x26f8f5c1, (q31_t)0x26f2f995, (q31_t)0x26ecfd51, (q31_t)0x26e700f5, (q31_t)0x26e10480, (q31_t)0x26db07f4,
+  (q31_t)0x26d50b50, (q31_t)0x26cf0e94, (q31_t)0x26c911c0, (q31_t)0x26c314d4, (q31_t)0x26bd17d0, (q31_t)0x26b71ab4, (q31_t)0x26b11d80, (q31_t)0x26ab2034,
+  (q31_t)0x26a522d1, (q31_t)0x269f2556, (q31_t)0x269927c3, (q31_t)0x26932a18, (q31_t)0x268d2c55, (q31_t)0x26872e7b, (q31_t)0x26813088, (q31_t)0x267b327e,
+  (q31_t)0x2675345d, (q31_t)0x266f3623, (q31_t)0x266937d2, (q31_t)0x26633969, (q31_t)0x265d3ae9, (q31_t)0x26573c50, (q31_t)0x26513da1, (q31_t)0x264b3ed9,
+  (q31_t)0x26453ffa, (q31_t)0x263f4103, (q31_t)0x263941f5, (q31_t)0x263342cf, (q31_t)0x262d4392, (q31_t)0x2627443d, (q31_t)0x262144d0, (q31_t)0x261b454c,
+  (q31_t)0x261545b0, (q31_t)0x260f45fd, (q31_t)0x26094633, (q31_t)0x26034651, (q31_t)0x25fd4657, (q31_t)0x25f74646, (q31_t)0x25f1461e, (q31_t)0x25eb45de,
+  (q31_t)0x25e54587, (q31_t)0x25df4519, (q31_t)0x25d94493, (q31_t)0x25d343f6, (q31_t)0x25cd4341, (q31_t)0x25c74276, (q31_t)0x25c14192, (q31_t)0x25bb4098,
+  (q31_t)0x25b53f86, (q31_t)0x25af3e5d, (q31_t)0x25a93d1d, (q31_t)0x25a33bc6, (q31_t)0x259d3a57, (q31_t)0x259738d1, (q31_t)0x25913734, (q31_t)0x258b3580,
+  (q31_t)0x258533b5, (q31_t)0x257f31d2, (q31_t)0x25792fd8, (q31_t)0x25732dc8, (q31_t)0x256d2ba0, (q31_t)0x25672961, (q31_t)0x2561270b, (q31_t)0x255b249e,
+  (q31_t)0x2555221a, (q31_t)0x254f1f7e, (q31_t)0x25491ccc, (q31_t)0x25431a03, (q31_t)0x253d1723, (q31_t)0x2537142c, (q31_t)0x2531111e, (q31_t)0x252b0df9,
+  (q31_t)0x25250abd, (q31_t)0x251f076a, (q31_t)0x25190400, (q31_t)0x25130080, (q31_t)0x250cfce8, (q31_t)0x2506f93a, (q31_t)0x2500f574, (q31_t)0x24faf198,
+  (q31_t)0x24f4eda6, (q31_t)0x24eee99c, (q31_t)0x24e8e57c, (q31_t)0x24e2e144, (q31_t)0x24dcdcf6, (q31_t)0x24d6d892, (q31_t)0x24d0d416, (q31_t)0x24cacf84,
+  (q31_t)0x24c4cadb, (q31_t)0x24bec61c, (q31_t)0x24b8c146, (q31_t)0x24b2bc59, (q31_t)0x24acb756, (q31_t)0x24a6b23b, (q31_t)0x24a0ad0b, (q31_t)0x249aa7c4,
+  (q31_t)0x2494a266, (q31_t)0x248e9cf1, (q31_t)0x24889766, (q31_t)0x248291c5, (q31_t)0x247c8c0d, (q31_t)0x2476863e, (q31_t)0x24708059, (q31_t)0x246a7a5e,
+  (q31_t)0x2464744c, (q31_t)0x245e6e23, (q31_t)0x245867e4, (q31_t)0x2452618f, (q31_t)0x244c5b24, (q31_t)0x244654a1, (q31_t)0x24404e09, (q31_t)0x243a475a,
+  (q31_t)0x24344095, (q31_t)0x242e39ba, (q31_t)0x242832c8, (q31_t)0x24222bc0, (q31_t)0x241c24a1, (q31_t)0x24161d6d, (q31_t)0x24101622, (q31_t)0x240a0ec1,
+  (q31_t)0x24040749, (q31_t)0x23fdffbc, (q31_t)0x23f7f818, (q31_t)0x23f1f05e, (q31_t)0x23ebe88e, (q31_t)0x23e5e0a7, (q31_t)0x23dfd8ab, (q31_t)0x23d9d098,
+  (q31_t)0x23d3c86f, (q31_t)0x23cdc031, (q31_t)0x23c7b7dc, (q31_t)0x23c1af71, (q31_t)0x23bba6f0, (q31_t)0x23b59e59, (q31_t)0x23af95ac, (q31_t)0x23a98ce8,
+  (q31_t)0x23a3840f, (q31_t)0x239d7b20, (q31_t)0x2397721b, (q31_t)0x23916900, (q31_t)0x238b5fcf, (q31_t)0x23855688, (q31_t)0x237f4d2b, (q31_t)0x237943b9,
+  (q31_t)0x23733a30, (q31_t)0x236d3092, (q31_t)0x236726dd, (q31_t)0x23611d13, (q31_t)0x235b1333, (q31_t)0x2355093e, (q31_t)0x234eff32, (q31_t)0x2348f511,
+  (q31_t)0x2342eada, (q31_t)0x233ce08d, (q31_t)0x2336d62a, (q31_t)0x2330cbb2, (q31_t)0x232ac124, (q31_t)0x2324b680, (q31_t)0x231eabc7, (q31_t)0x2318a0f8,
+  (q31_t)0x23129613, (q31_t)0x230c8b19, (q31_t)0x23068009, (q31_t)0x230074e3, (q31_t)0x22fa69a8, (q31_t)0x22f45e57, (q31_t)0x22ee52f1, (q31_t)0x22e84775,
+  (q31_t)0x22e23be4, (q31_t)0x22dc303d, (q31_t)0x22d62480, (q31_t)0x22d018ae, (q31_t)0x22ca0cc7, (q31_t)0x22c400ca, (q31_t)0x22bdf4b8, (q31_t)0x22b7e890,
+  (q31_t)0x22b1dc53, (q31_t)0x22abd001, (q31_t)0x22a5c399, (q31_t)0x229fb71b, (q31_t)0x2299aa89, (q31_t)0x22939de1, (q31_t)0x228d9123, (q31_t)0x22878451,
+  (q31_t)0x22817769, (q31_t)0x227b6a6c, (q31_t)0x22755d59, (q31_t)0x226f5032, (q31_t)0x226942f5, (q31_t)0x226335a2, (q31_t)0x225d283b, (q31_t)0x22571abe,
+  (q31_t)0x22510d2d, (q31_t)0x224aff86, (q31_t)0x2244f1c9, (q31_t)0x223ee3f8, (q31_t)0x2238d612, (q31_t)0x2232c816, (q31_t)0x222cba06, (q31_t)0x2226abe0,
+  (q31_t)0x22209da5, (q31_t)0x221a8f56, (q31_t)0x221480f1, (q31_t)0x220e7277, (q31_t)0x220863e8, (q31_t)0x22025544, (q31_t)0x21fc468b, (q31_t)0x21f637be,
+  (q31_t)0x21f028db, (q31_t)0x21ea19e3, (q31_t)0x21e40ad7, (q31_t)0x21ddfbb5, (q31_t)0x21d7ec7f, (q31_t)0x21d1dd34, (q31_t)0x21cbcdd3, (q31_t)0x21c5be5e,
+  (q31_t)0x21bfaed5, (q31_t)0x21b99f36, (q31_t)0x21b38f83, (q31_t)0x21ad7fba, (q31_t)0x21a76fdd, (q31_t)0x21a15fec, (q31_t)0x219b4fe5, (q31_t)0x21953fca,
+  (q31_t)0x218f2f9a, (q31_t)0x21891f55, (q31_t)0x21830efc, (q31_t)0x217cfe8e, (q31_t)0x2176ee0b, (q31_t)0x2170dd74, (q31_t)0x216accc8, (q31_t)0x2164bc08,
+  (q31_t)0x215eab33, (q31_t)0x21589a49, (q31_t)0x2152894b, (q31_t)0x214c7838, (q31_t)0x21466710, (q31_t)0x214055d4, (q31_t)0x213a4484, (q31_t)0x2134331f,
+  (q31_t)0x212e21a6, (q31_t)0x21281018, (q31_t)0x2121fe76, (q31_t)0x211becbf, (q31_t)0x2115daf4, (q31_t)0x210fc914, (q31_t)0x2109b720, (q31_t)0x2103a518,
+  (q31_t)0x20fd92fb, (q31_t)0x20f780ca, (q31_t)0x20f16e84, (q31_t)0x20eb5c2b, (q31_t)0x20e549bd, (q31_t)0x20df373a, (q31_t)0x20d924a4, (q31_t)0x20d311f9,
+  (q31_t)0x20ccff3a, (q31_t)0x20c6ec66, (q31_t)0x20c0d97f, (q31_t)0x20bac683, (q31_t)0x20b4b373, (q31_t)0x20aea04f, (q31_t)0x20a88d17, (q31_t)0x20a279ca,
+  (q31_t)0x209c666a, (q31_t)0x209652f5, (q31_t)0x20903f6c, (q31_t)0x208a2bcf, (q31_t)0x2084181e, (q31_t)0x207e0459, (q31_t)0x2077f080, (q31_t)0x2071dc93,
+  (q31_t)0x206bc892, (q31_t)0x2065b47d, (q31_t)0x205fa054, (q31_t)0x20598c17, (q31_t)0x205377c6, (q31_t)0x204d6361, (q31_t)0x20474ee8, (q31_t)0x20413a5b,
+  (q31_t)0x203b25bb, (q31_t)0x20351106, (q31_t)0x202efc3e, (q31_t)0x2028e761, (q31_t)0x2022d271, (q31_t)0x201cbd6d, (q31_t)0x2016a856, (q31_t)0x2010932a,
+  (q31_t)0x200a7deb, (q31_t)0x20046898, (q31_t)0x1ffe5331, (q31_t)0x1ff83db6, (q31_t)0x1ff22828, (q31_t)0x1fec1286, (q31_t)0x1fe5fcd0, (q31_t)0x1fdfe707,
+  (q31_t)0x1fd9d12a, (q31_t)0x1fd3bb39, (q31_t)0x1fcda535, (q31_t)0x1fc78f1d, (q31_t)0x1fc178f1, (q31_t)0x1fbb62b2, (q31_t)0x1fb54c60, (q31_t)0x1faf35f9,
+  (q31_t)0x1fa91f80, (q31_t)0x1fa308f2, (q31_t)0x1f9cf252, (q31_t)0x1f96db9d, (q31_t)0x1f90c4d5, (q31_t)0x1f8aadfa, (q31_t)0x1f84970b, (q31_t)0x1f7e8009,
+  (q31_t)0x1f7868f4, (q31_t)0x1f7251ca, (q31_t)0x1f6c3a8e, (q31_t)0x1f66233e, (q31_t)0x1f600bdb, (q31_t)0x1f59f465, (q31_t)0x1f53dcdb, (q31_t)0x1f4dc53d,
+  (q31_t)0x1f47ad8d, (q31_t)0x1f4195c9, (q31_t)0x1f3b7df2, (q31_t)0x1f356608, (q31_t)0x1f2f4e0a, (q31_t)0x1f2935f9, (q31_t)0x1f231dd5, (q31_t)0x1f1d059e,
+  (q31_t)0x1f16ed54, (q31_t)0x1f10d4f6, (q31_t)0x1f0abc85, (q31_t)0x1f04a401, (q31_t)0x1efe8b6a, (q31_t)0x1ef872c0, (q31_t)0x1ef25a03, (q31_t)0x1eec4132,
+  (q31_t)0x1ee6284f, (q31_t)0x1ee00f58, (q31_t)0x1ed9f64f, (q31_t)0x1ed3dd32, (q31_t)0x1ecdc402, (q31_t)0x1ec7aac0, (q31_t)0x1ec1916a, (q31_t)0x1ebb7802,
+  (q31_t)0x1eb55e86, (q31_t)0x1eaf44f8, (q31_t)0x1ea92b56, (q31_t)0x1ea311a2, (q31_t)0x1e9cf7db, (q31_t)0x1e96de01, (q31_t)0x1e90c414, (q31_t)0x1e8aaa14,
+  (q31_t)0x1e849001, (q31_t)0x1e7e75dc, (q31_t)0x1e785ba3, (q31_t)0x1e724158, (q31_t)0x1e6c26fa, (q31_t)0x1e660c8a, (q31_t)0x1e5ff206, (q31_t)0x1e59d770,
+  (q31_t)0x1e53bcc7, (q31_t)0x1e4da20c, (q31_t)0x1e47873d, (q31_t)0x1e416c5d, (q31_t)0x1e3b5169, (q31_t)0x1e353663, (q31_t)0x1e2f1b4a, (q31_t)0x1e29001e,
+  (q31_t)0x1e22e4e0, (q31_t)0x1e1cc990, (q31_t)0x1e16ae2c, (q31_t)0x1e1092b6, (q31_t)0x1e0a772e, (q31_t)0x1e045b93, (q31_t)0x1dfe3fe6, (q31_t)0x1df82426,
+  (q31_t)0x1df20853, (q31_t)0x1debec6f, (q31_t)0x1de5d077, (q31_t)0x1ddfb46e, (q31_t)0x1dd99851, (q31_t)0x1dd37c23, (q31_t)0x1dcd5fe2, (q31_t)0x1dc7438e,
+  (q31_t)0x1dc12729, (q31_t)0x1dbb0ab0, (q31_t)0x1db4ee26, (q31_t)0x1daed189, (q31_t)0x1da8b4da, (q31_t)0x1da29819, (q31_t)0x1d9c7b45, (q31_t)0x1d965e5f,
+  (q31_t)0x1d904167, (q31_t)0x1d8a245c, (q31_t)0x1d840740, (q31_t)0x1d7dea11, (q31_t)0x1d77ccd0, (q31_t)0x1d71af7d, (q31_t)0x1d6b9217, (q31_t)0x1d6574a0,
+  (q31_t)0x1d5f5716, (q31_t)0x1d59397a, (q31_t)0x1d531bcc, (q31_t)0x1d4cfe0d, (q31_t)0x1d46e03a, (q31_t)0x1d40c256, (q31_t)0x1d3aa460, (q31_t)0x1d348658,
+  (q31_t)0x1d2e683e, (q31_t)0x1d284a12, (q31_t)0x1d222bd3, (q31_t)0x1d1c0d83, (q31_t)0x1d15ef21, (q31_t)0x1d0fd0ad, (q31_t)0x1d09b227, (q31_t)0x1d03938f,
+  (q31_t)0x1cfd74e5, (q31_t)0x1cf7562a, (q31_t)0x1cf1375c, (q31_t)0x1ceb187d, (q31_t)0x1ce4f98c, (q31_t)0x1cdeda89, (q31_t)0x1cd8bb74, (q31_t)0x1cd29c4d,
+  (q31_t)0x1ccc7d15, (q31_t)0x1cc65dca, (q31_t)0x1cc03e6e, (q31_t)0x1cba1f01, (q31_t)0x1cb3ff81, (q31_t)0x1caddff0, (q31_t)0x1ca7c04d, (q31_t)0x1ca1a099,
+  (q31_t)0x1c9b80d3, (q31_t)0x1c9560fb, (q31_t)0x1c8f4112, (q31_t)0x1c892117, (q31_t)0x1c83010a, (q31_t)0x1c7ce0ec, (q31_t)0x1c76c0bc, (q31_t)0x1c70a07b,
+  (q31_t)0x1c6a8028, (q31_t)0x1c645fc3, (q31_t)0x1c5e3f4d, (q31_t)0x1c581ec6, (q31_t)0x1c51fe2d, (q31_t)0x1c4bdd83, (q31_t)0x1c45bcc7, (q31_t)0x1c3f9bf9,
+  (q31_t)0x1c397b1b, (q31_t)0x1c335a2b, (q31_t)0x1c2d3929, (q31_t)0x1c271816, (q31_t)0x1c20f6f2, (q31_t)0x1c1ad5bc, (q31_t)0x1c14b475, (q31_t)0x1c0e931d,
+  (q31_t)0x1c0871b4, (q31_t)0x1c025039, (q31_t)0x1bfc2ead, (q31_t)0x1bf60d0f, (q31_t)0x1befeb60, (q31_t)0x1be9c9a1, (q31_t)0x1be3a7cf, (q31_t)0x1bdd85ed,
+  (q31_t)0x1bd763fa, (q31_t)0x1bd141f5, (q31_t)0x1bcb1fdf, (q31_t)0x1bc4fdb8, (q31_t)0x1bbedb80, (q31_t)0x1bb8b937, (q31_t)0x1bb296dc, (q31_t)0x1bac7471,
+  (q31_t)0x1ba651f5, (q31_t)0x1ba02f67, (q31_t)0x1b9a0cc8, (q31_t)0x1b93ea19, (q31_t)0x1b8dc758, (q31_t)0x1b87a487, (q31_t)0x1b8181a4, (q31_t)0x1b7b5eb0,
+  (q31_t)0x1b753bac, (q31_t)0x1b6f1897, (q31_t)0x1b68f570, (q31_t)0x1b62d239, (q31_t)0x1b5caef1, (q31_t)0x1b568b98, (q31_t)0x1b50682e, (q31_t)0x1b4a44b3,
+  (q31_t)0x1b442127, (q31_t)0x1b3dfd8b, (q31_t)0x1b37d9de, (q31_t)0x1b31b620, (q31_t)0x1b2b9251, (q31_t)0x1b256e71, (q31_t)0x1b1f4a81, (q31_t)0x1b192680,
+  (q31_t)0x1b13026e, (q31_t)0x1b0cde4c, (q31_t)0x1b06ba19, (q31_t)0x1b0095d5, (q31_t)0x1afa7180, (q31_t)0x1af44d1b, (q31_t)0x1aee28a6, (q31_t)0x1ae8041f,
+  (q31_t)0x1ae1df88, (q31_t)0x1adbbae1, (q31_t)0x1ad59629, (q31_t)0x1acf7160, (q31_t)0x1ac94c87, (q31_t)0x1ac3279d, (q31_t)0x1abd02a3, (q31_t)0x1ab6dd98,
+  (q31_t)0x1ab0b87d, (q31_t)0x1aaa9352, (q31_t)0x1aa46e16, (q31_t)0x1a9e48c9, (q31_t)0x1a98236c, (q31_t)0x1a91fdff, (q31_t)0x1a8bd881, (q31_t)0x1a85b2f3,
+  (q31_t)0x1a7f8d54, (q31_t)0x1a7967a6, (q31_t)0x1a7341e6, (q31_t)0x1a6d1c17, (q31_t)0x1a66f637, (q31_t)0x1a60d047, (q31_t)0x1a5aaa47, (q31_t)0x1a548436,
+  (q31_t)0x1a4e5e15, (q31_t)0x1a4837e4, (q31_t)0x1a4211a3, (q31_t)0x1a3beb52, (q31_t)0x1a35c4f0, (q31_t)0x1a2f9e7e, (q31_t)0x1a2977fc, (q31_t)0x1a23516a,
+  (q31_t)0x1a1d2ac8, (q31_t)0x1a170416, (q31_t)0x1a10dd53, (q31_t)0x1a0ab681, (q31_t)0x1a048f9e, (q31_t)0x19fe68ac, (q31_t)0x19f841a9, (q31_t)0x19f21a96,
+  (q31_t)0x19ebf374, (q31_t)0x19e5cc41, (q31_t)0x19dfa4fe, (q31_t)0x19d97dac, (q31_t)0x19d35649, (q31_t)0x19cd2ed7, (q31_t)0x19c70754, (q31_t)0x19c0dfc2,
+  (q31_t)0x19bab820, (q31_t)0x19b4906e, (q31_t)0x19ae68ac, (q31_t)0x19a840da, (q31_t)0x19a218f9, (q31_t)0x199bf107, (q31_t)0x1995c906, (q31_t)0x198fa0f5,
+  (q31_t)0x198978d4, (q31_t)0x198350a4, (q31_t)0x197d2864, (q31_t)0x19770014, (q31_t)0x1970d7b4, (q31_t)0x196aaf45, (q31_t)0x196486c6, (q31_t)0x195e5e37,
+  (q31_t)0x19583599, (q31_t)0x19520ceb, (q31_t)0x194be42d, (q31_t)0x1945bb60, (q31_t)0x193f9283, (q31_t)0x19396997, (q31_t)0x1933409b, (q31_t)0x192d178f,
+  (q31_t)0x1926ee74, (q31_t)0x1920c54a, (q31_t)0x191a9c10, (q31_t)0x191472c6, (q31_t)0x190e496d, (q31_t)0x19082005, (q31_t)0x1901f68d, (q31_t)0x18fbcd06,
+  (q31_t)0x18f5a36f, (q31_t)0x18ef79c9, (q31_t)0x18e95014, (q31_t)0x18e3264f, (q31_t)0x18dcfc7b, (q31_t)0x18d6d297, (q31_t)0x18d0a8a4, (q31_t)0x18ca7ea2,
+  (q31_t)0x18c45491, (q31_t)0x18be2a70, (q31_t)0x18b80040, (q31_t)0x18b1d601, (q31_t)0x18ababb2, (q31_t)0x18a58154, (q31_t)0x189f56e8, (q31_t)0x18992c6b,
+  (q31_t)0x189301e0, (q31_t)0x188cd746, (q31_t)0x1886ac9c, (q31_t)0x188081e4, (q31_t)0x187a571c, (q31_t)0x18742c45, (q31_t)0x186e015f, (q31_t)0x1867d66a,
+  (q31_t)0x1861ab66, (q31_t)0x185b8053, (q31_t)0x18555530, (q31_t)0x184f29ff, (q31_t)0x1848febf, (q31_t)0x1842d370, (q31_t)0x183ca812, (q31_t)0x18367ca5,
+  (q31_t)0x18305129, (q31_t)0x182a259e, (q31_t)0x1823fa04, (q31_t)0x181dce5b, (q31_t)0x1817a2a4, (q31_t)0x181176dd, (q31_t)0x180b4b08, (q31_t)0x18051f24,
+  (q31_t)0x17fef331, (q31_t)0x17f8c72f, (q31_t)0x17f29b1e, (q31_t)0x17ec6eff, (q31_t)0x17e642d1, (q31_t)0x17e01694, (q31_t)0x17d9ea49, (q31_t)0x17d3bdee,
+  (q31_t)0x17cd9186, (q31_t)0x17c7650e, (q31_t)0x17c13888, (q31_t)0x17bb0bf3, (q31_t)0x17b4df4f, (q31_t)0x17aeb29d, (q31_t)0x17a885dc, (q31_t)0x17a2590d,
+  (q31_t)0x179c2c2f, (q31_t)0x1795ff42, (q31_t)0x178fd247, (q31_t)0x1789a53d, (q31_t)0x17837825, (q31_t)0x177d4afe, (q31_t)0x17771dc9, (q31_t)0x1770f086,
+  (q31_t)0x176ac333, (q31_t)0x176495d3, (q31_t)0x175e6864, (q31_t)0x17583ae7, (q31_t)0x17520d5b, (q31_t)0x174bdfc1, (q31_t)0x1745b218, (q31_t)0x173f8461,
+  (q31_t)0x1739569c, (q31_t)0x173328c8, (q31_t)0x172cfae6, (q31_t)0x1726ccf6, (q31_t)0x17209ef8, (q31_t)0x171a70eb, (q31_t)0x171442d0, (q31_t)0x170e14a7,
+  (q31_t)0x1707e670, (q31_t)0x1701b82a, (q31_t)0x16fb89d6, (q31_t)0x16f55b74, (q31_t)0x16ef2d04, (q31_t)0x16e8fe86, (q31_t)0x16e2cff9, (q31_t)0x16dca15f,
+  (q31_t)0x16d672b6, (q31_t)0x16d043ff, (q31_t)0x16ca153a, (q31_t)0x16c3e667, (q31_t)0x16bdb787, (q31_t)0x16b78898, (q31_t)0x16b1599b, (q31_t)0x16ab2a90,
+  (q31_t)0x16a4fb77, (q31_t)0x169ecc50, (q31_t)0x16989d1b, (q31_t)0x16926dd8, (q31_t)0x168c3e87, (q31_t)0x16860f29, (q31_t)0x167fdfbc, (q31_t)0x1679b042,
+  (q31_t)0x167380ba, (q31_t)0x166d5123, (q31_t)0x1667217f, (q31_t)0x1660f1ce, (q31_t)0x165ac20e, (q31_t)0x16549241, (q31_t)0x164e6266, (q31_t)0x1648327d,
+  (q31_t)0x16420286, (q31_t)0x163bd282, (q31_t)0x1635a270, (q31_t)0x162f7250, (q31_t)0x16294222, (q31_t)0x162311e7, (q31_t)0x161ce19e, (q31_t)0x1616b148,
+  (q31_t)0x161080e4, (q31_t)0x160a5072, (q31_t)0x16041ff3, (q31_t)0x15fdef66, (q31_t)0x15f7becc, (q31_t)0x15f18e24, (q31_t)0x15eb5d6e, (q31_t)0x15e52cab,
+  (q31_t)0x15defbdb, (q31_t)0x15d8cafd, (q31_t)0x15d29a11, (q31_t)0x15cc6918, (q31_t)0x15c63812, (q31_t)0x15c006fe, (q31_t)0x15b9d5dd, (q31_t)0x15b3a4ae,
+  (q31_t)0x15ad7372, (q31_t)0x15a74228, (q31_t)0x15a110d2, (q31_t)0x159adf6e, (q31_t)0x1594adfc, (q31_t)0x158e7c7d, (q31_t)0x15884af1, (q31_t)0x15821958,
+  (q31_t)0x157be7b1, (q31_t)0x1575b5fe, (q31_t)0x156f843c, (q31_t)0x1569526e, (q31_t)0x15632093, (q31_t)0x155ceeaa, (q31_t)0x1556bcb4, (q31_t)0x15508ab1,
+  (q31_t)0x154a58a1, (q31_t)0x15442683, (q31_t)0x153df459, (q31_t)0x1537c221, (q31_t)0x15318fdd, (q31_t)0x152b5d8b, (q31_t)0x15252b2c, (q31_t)0x151ef8c0,
+  (q31_t)0x1518c648, (q31_t)0x151293c2, (q31_t)0x150c612f, (q31_t)0x15062e8f, (q31_t)0x14fffbe2, (q31_t)0x14f9c928, (q31_t)0x14f39662, (q31_t)0x14ed638e,
+  (q31_t)0x14e730ae, (q31_t)0x14e0fdc0, (q31_t)0x14dacac6, (q31_t)0x14d497bf, (q31_t)0x14ce64ab, (q31_t)0x14c8318a, (q31_t)0x14c1fe5c, (q31_t)0x14bbcb22,
+  (q31_t)0x14b597da, (q31_t)0x14af6486, (q31_t)0x14a93125, (q31_t)0x14a2fdb8, (q31_t)0x149cca3e, (q31_t)0x149696b7, (q31_t)0x14906323, (q31_t)0x148a2f82,
+  (q31_t)0x1483fbd5, (q31_t)0x147dc81c, (q31_t)0x14779455, (q31_t)0x14716082, (q31_t)0x146b2ca3, (q31_t)0x1464f8b7, (q31_t)0x145ec4be, (q31_t)0x145890b9,
+  (q31_t)0x14525ca7, (q31_t)0x144c2888, (q31_t)0x1445f45d, (q31_t)0x143fc026, (q31_t)0x14398be2, (q31_t)0x14335792, (q31_t)0x142d2335, (q31_t)0x1426eecb,
+  (q31_t)0x1420ba56, (q31_t)0x141a85d3, (q31_t)0x14145145, (q31_t)0x140e1caa, (q31_t)0x1407e803, (q31_t)0x1401b34f, (q31_t)0x13fb7e8f, (q31_t)0x13f549c3,
+  (q31_t)0x13ef14ea, (q31_t)0x13e8e005, (q31_t)0x13e2ab14, (q31_t)0x13dc7616, (q31_t)0x13d6410d, (q31_t)0x13d00bf7, (q31_t)0x13c9d6d4, (q31_t)0x13c3a1a6,
+  (q31_t)0x13bd6c6b, (q31_t)0x13b73725, (q31_t)0x13b101d2, (q31_t)0x13aacc73, (q31_t)0x13a49707, (q31_t)0x139e6190, (q31_t)0x13982c0d, (q31_t)0x1391f67d,
+  (q31_t)0x138bc0e1, (q31_t)0x13858b3a, (q31_t)0x137f5586, (q31_t)0x13791fc6, (q31_t)0x1372e9fb, (q31_t)0x136cb423, (q31_t)0x13667e3f, (q31_t)0x13604850,
+  (q31_t)0x135a1254, (q31_t)0x1353dc4c, (q31_t)0x134da639, (q31_t)0x1347701a, (q31_t)0x134139ee, (q31_t)0x133b03b7, (q31_t)0x1334cd74, (q31_t)0x132e9725,
+  (q31_t)0x132860ca, (q31_t)0x13222a64, (q31_t)0x131bf3f2, (q31_t)0x1315bd73, (q31_t)0x130f86ea, (q31_t)0x13095054, (q31_t)0x130319b3, (q31_t)0x12fce305,
+  (q31_t)0x12f6ac4d, (q31_t)0x12f07588, (q31_t)0x12ea3eb8, (q31_t)0x12e407dc, (q31_t)0x12ddd0f4, (q31_t)0x12d79a01, (q31_t)0x12d16303, (q31_t)0x12cb2bf8,
+  (q31_t)0x12c4f4e2, (q31_t)0x12bebdc1, (q31_t)0x12b88693, (q31_t)0x12b24f5b, (q31_t)0x12ac1817, (q31_t)0x12a5e0c7, (q31_t)0x129fa96c, (q31_t)0x12997205,
+  (q31_t)0x12933a93, (q31_t)0x128d0315, (q31_t)0x1286cb8c, (q31_t)0x128093f7, (q31_t)0x127a5c57, (q31_t)0x127424ac, (q31_t)0x126decf5, (q31_t)0x1267b533,
+  (q31_t)0x12617d66, (q31_t)0x125b458d, (q31_t)0x12550da9, (q31_t)0x124ed5ba, (q31_t)0x12489dbf, (q31_t)0x124265b9, (q31_t)0x123c2da8, (q31_t)0x1235f58b,
+  (q31_t)0x122fbd63, (q31_t)0x12298530, (q31_t)0x12234cf2, (q31_t)0x121d14a9, (q31_t)0x1216dc54, (q31_t)0x1210a3f5, (q31_t)0x120a6b8a, (q31_t)0x12043314,
+  (q31_t)0x11fdfa93, (q31_t)0x11f7c207, (q31_t)0x11f18970, (q31_t)0x11eb50cd, (q31_t)0x11e51820, (q31_t)0x11dedf68, (q31_t)0x11d8a6a4, (q31_t)0x11d26dd6,
+  (q31_t)0x11cc34fc, (q31_t)0x11c5fc18, (q31_t)0x11bfc329, (q31_t)0x11b98a2e, (q31_t)0x11b35129, (q31_t)0x11ad1819, (q31_t)0x11a6defe, (q31_t)0x11a0a5d8,
+  (q31_t)0x119a6ca7, (q31_t)0x1194336b, (q31_t)0x118dfa25, (q31_t)0x1187c0d3, (q31_t)0x11818777, (q31_t)0x117b4e10, (q31_t)0x1175149e, (q31_t)0x116edb22,
+  (q31_t)0x1168a19b, (q31_t)0x11626809, (q31_t)0x115c2e6c, (q31_t)0x1155f4c4, (q31_t)0x114fbb12, (q31_t)0x11498156, (q31_t)0x1143478e, (q31_t)0x113d0dbc,
+  (q31_t)0x1136d3df, (q31_t)0x113099f8, (q31_t)0x112a6006, (q31_t)0x11242609, (q31_t)0x111dec02, (q31_t)0x1117b1f0, (q31_t)0x111177d4, (q31_t)0x110b3dad,
+  (q31_t)0x1105037c, (q31_t)0x10fec940, (q31_t)0x10f88efa, (q31_t)0x10f254a9, (q31_t)0x10ec1a4e, (q31_t)0x10e5dfe8, (q31_t)0x10dfa578, (q31_t)0x10d96afe,
+  (q31_t)0x10d33079, (q31_t)0x10ccf5ea, (q31_t)0x10c6bb50, (q31_t)0x10c080ac, (q31_t)0x10ba45fe, (q31_t)0x10b40b45, (q31_t)0x10add082, (q31_t)0x10a795b5,
+  (q31_t)0x10a15ade, (q31_t)0x109b1ffc, (q31_t)0x1094e510, (q31_t)0x108eaa1a, (q31_t)0x10886f19, (q31_t)0x1082340f, (q31_t)0x107bf8fa, (q31_t)0x1075bddb,
+  (q31_t)0x106f82b2, (q31_t)0x1069477f, (q31_t)0x10630c41, (q31_t)0x105cd0fa, (q31_t)0x105695a8, (q31_t)0x10505a4d, (q31_t)0x104a1ee7, (q31_t)0x1043e377,
+  (q31_t)0x103da7fd, (q31_t)0x10376c79, (q31_t)0x103130ec, (q31_t)0x102af554, (q31_t)0x1024b9b2, (q31_t)0x101e7e06, (q31_t)0x10184251, (q31_t)0x10120691,
+  (q31_t)0x100bcac7, (q31_t)0x10058ef4, (q31_t)0xfff5317, (q31_t)0xff91730, (q31_t)0xff2db3e, (q31_t)0xfec9f44, (q31_t)0xfe6633f, (q31_t)0xfe02730,
+  (q31_t)0xfd9eb18, (q31_t)0xfd3aef6, (q31_t)0xfcd72ca, (q31_t)0xfc73695, (q31_t)0xfc0fa55, (q31_t)0xfbabe0c, (q31_t)0xfb481ba, (q31_t)0xfae455d,
+  (q31_t)0xfa808f7, (q31_t)0xfa1cc87, (q31_t)0xf9b900e, (q31_t)0xf95538b, (q31_t)0xf8f16fe, (q31_t)0xf88da68, (q31_t)0xf829dc8, (q31_t)0xf7c611f,
+  (q31_t)0xf76246c, (q31_t)0xf6fe7af, (q31_t)0xf69aae9, (q31_t)0xf636e1a, (q31_t)0xf5d3141, (q31_t)0xf56f45e, (q31_t)0xf50b773, (q31_t)0xf4a7a7d,
+  (q31_t)0xf443d7e, (q31_t)0xf3e0076, (q31_t)0xf37c365, (q31_t)0xf318649, (q31_t)0xf2b4925, (q31_t)0xf250bf7, (q31_t)0xf1ecec0, (q31_t)0xf189180,
+  (q31_t)0xf125436, (q31_t)0xf0c16e3, (q31_t)0xf05d987, (q31_t)0xeff9c21, (q31_t)0xef95eb2, (q31_t)0xef3213a, (q31_t)0xeece3b9, (q31_t)0xee6a62f,
+  (q31_t)0xee0689b, (q31_t)0xeda2afe, (q31_t)0xed3ed58, (q31_t)0xecdafa9, (q31_t)0xec771f1, (q31_t)0xec1342f, (q31_t)0xebaf665, (q31_t)0xeb4b891,
+  (q31_t)0xeae7ab4, (q31_t)0xea83ccf, (q31_t)0xea1fee0, (q31_t)0xe9bc0e8, (q31_t)0xe9582e7, (q31_t)0xe8f44dd, (q31_t)0xe8906cb, (q31_t)0xe82c8af,
+  (q31_t)0xe7c8a8a, (q31_t)0xe764c5c, (q31_t)0xe700e26, (q31_t)0xe69cfe6, (q31_t)0xe63919e, (q31_t)0xe5d534d, (q31_t)0xe5714f3, (q31_t)0xe50d690,
+  (q31_t)0xe4a9824, (q31_t)0xe4459af, (q31_t)0xe3e1b32, (q31_t)0xe37dcac, (q31_t)0xe319e1d, (q31_t)0xe2b5f85, (q31_t)0xe2520e5, (q31_t)0xe1ee23c,
+  (q31_t)0xe18a38a, (q31_t)0xe1264cf, (q31_t)0xe0c260c, (q31_t)0xe05e740, (q31_t)0xdffa86b, (q31_t)0xdf9698e, (q31_t)0xdf32aa8, (q31_t)0xdecebba,
+  (q31_t)0xde6acc3, (q31_t)0xde06dc3, (q31_t)0xdda2ebb, (q31_t)0xdd3efab, (q31_t)0xdcdb091, (q31_t)0xdc77170, (q31_t)0xdc13245, (q31_t)0xdbaf313,
+  (q31_t)0xdb4b3d7, (q31_t)0xdae7494, (q31_t)0xda83548, (q31_t)0xda1f5f3, (q31_t)0xd9bb696, (q31_t)0xd957731, (q31_t)0xd8f37c3, (q31_t)0xd88f84d,
+  (q31_t)0xd82b8cf, (q31_t)0xd7c7948, (q31_t)0xd7639b9, (q31_t)0xd6ffa22, (q31_t)0xd69ba82, (q31_t)0xd637ada, (q31_t)0xd5d3b2a, (q31_t)0xd56fb71,
+  (q31_t)0xd50bbb1, (q31_t)0xd4a7be8, (q31_t)0xd443c17, (q31_t)0xd3dfc3e, (q31_t)0xd37bc5c, (q31_t)0xd317c73, (q31_t)0xd2b3c81, (q31_t)0xd24fc87,
+  (q31_t)0xd1ebc85, (q31_t)0xd187c7b, (q31_t)0xd123c69, (q31_t)0xd0bfc4f, (q31_t)0xd05bc2d, (q31_t)0xcff7c02, (q31_t)0xcf93bd0, (q31_t)0xcf2fb96,
+  (q31_t)0xcecbb53, (q31_t)0xce67b09, (q31_t)0xce03ab7, (q31_t)0xcd9fa5d, (q31_t)0xcd3b9fb, (q31_t)0xccd7991, (q31_t)0xcc7391f, (q31_t)0xcc0f8a5,
+  (q31_t)0xcbab824, (q31_t)0xcb4779a, (q31_t)0xcae3709, (q31_t)0xca7f670, (q31_t)0xca1b5cf, (q31_t)0xc9b7526, (q31_t)0xc953475, (q31_t)0xc8ef3bd,
+  (q31_t)0xc88b2fd, (q31_t)0xc827235, (q31_t)0xc7c3166, (q31_t)0xc75f08f, (q31_t)0xc6fafb0, (q31_t)0xc696ec9, (q31_t)0xc632ddb, (q31_t)0xc5cece5,
+  (q31_t)0xc56abe8, (q31_t)0xc506ae3, (q31_t)0xc4a29d6, (q31_t)0xc43e8c2, (q31_t)0xc3da7a6, (q31_t)0xc376683, (q31_t)0xc312558, (q31_t)0xc2ae425,
+  (q31_t)0xc24a2eb, (q31_t)0xc1e61aa, (q31_t)0xc182061, (q31_t)0xc11df11, (q31_t)0xc0b9db9, (q31_t)0xc055c5a, (q31_t)0xbff1af3, (q31_t)0xbf8d985,
+  (q31_t)0xbf29810, (q31_t)0xbec5693, (q31_t)0xbe6150f, (q31_t)0xbdfd383, (q31_t)0xbd991f0, (q31_t)0xbd35056, (q31_t)0xbcd0eb5, (q31_t)0xbc6cd0c,
+  (q31_t)0xbc08b5c, (q31_t)0xbba49a5, (q31_t)0xbb407e7, (q31_t)0xbadc621, (q31_t)0xba78454, (q31_t)0xba14280, (q31_t)0xb9b00a5, (q31_t)0xb94bec2,
+  (q31_t)0xb8e7cd9, (q31_t)0xb883ae8, (q31_t)0xb81f8f0, (q31_t)0xb7bb6f2, (q31_t)0xb7574ec, (q31_t)0xb6f32df, (q31_t)0xb68f0cb, (q31_t)0xb62aeaf,
+  (q31_t)0xb5c6c8d, (q31_t)0xb562a64, (q31_t)0xb4fe834, (q31_t)0xb49a5fd, (q31_t)0xb4363bf, (q31_t)0xb3d217a, (q31_t)0xb36df2e, (q31_t)0xb309cdb,
+  (q31_t)0xb2a5a81, (q31_t)0xb241820, (q31_t)0xb1dd5b9, (q31_t)0xb17934b, (q31_t)0xb1150d5, (q31_t)0xb0b0e59, (q31_t)0xb04cbd6, (q31_t)0xafe894d,
+  (q31_t)0xaf846bc, (q31_t)0xaf20425, (q31_t)0xaebc187, (q31_t)0xae57ee2, (q31_t)0xadf3c37, (q31_t)0xad8f985, (q31_t)0xad2b6cc, (q31_t)0xacc740c,
+  (q31_t)0xac63146, (q31_t)0xabfee79, (q31_t)0xab9aba6, (q31_t)0xab368cc, (q31_t)0xaad25eb, (q31_t)0xaa6e304, (q31_t)0xaa0a016, (q31_t)0xa9a5d22,
+  (q31_t)0xa941a27, (q31_t)0xa8dd725, (q31_t)0xa87941d, (q31_t)0xa81510f, (q31_t)0xa7b0dfa, (q31_t)0xa74cadf, (q31_t)0xa6e87bd, (q31_t)0xa684495,
+  (q31_t)0xa620166, (q31_t)0xa5bbe31, (q31_t)0xa557af5, (q31_t)0xa4f37b3, (q31_t)0xa48f46b, (q31_t)0xa42b11d, (q31_t)0xa3c6dc8, (q31_t)0xa362a6d,
+  (q31_t)0xa2fe70b, (q31_t)0xa29a3a3, (q31_t)0xa236035, (q31_t)0xa1d1cc1, (q31_t)0xa16d946, (q31_t)0xa1095c6, (q31_t)0xa0a523f, (q31_t)0xa040eb1,
+  (q31_t)0x9fdcb1e, (q31_t)0x9f78784, (q31_t)0x9f143e5, (q31_t)0x9eb003f, (q31_t)0x9e4bc93, (q31_t)0x9de78e1, (q31_t)0x9d83529, (q31_t)0x9d1f16b,
+  (q31_t)0x9cbada7, (q31_t)0x9c569dc, (q31_t)0x9bf260c, (q31_t)0x9b8e236, (q31_t)0x9b29e59, (q31_t)0x9ac5a77, (q31_t)0x9a6168f, (q31_t)0x99fd2a0,
+  (q31_t)0x9998eac, (q31_t)0x9934ab2, (q31_t)0x98d06b2, (q31_t)0x986c2ac, (q31_t)0x9807ea1, (q31_t)0x97a3a8f, (q31_t)0x973f678, (q31_t)0x96db25a,
+  (q31_t)0x9676e37, (q31_t)0x9612a0e, (q31_t)0x95ae5e0, (q31_t)0x954a1ab, (q31_t)0x94e5d71, (q31_t)0x9481931, (q31_t)0x941d4eb, (q31_t)0x93b90a0,
+  (q31_t)0x9354c4f, (q31_t)0x92f07f8, (q31_t)0x928c39b, (q31_t)0x9227f39, (q31_t)0x91c3ad2, (q31_t)0x915f664, (q31_t)0x90fb1f1, (q31_t)0x9096d79,
+  (q31_t)0x90328fb, (q31_t)0x8fce477, (q31_t)0x8f69fee, (q31_t)0x8f05b5f, (q31_t)0x8ea16cb, (q31_t)0x8e3d231, (q31_t)0x8dd8d92, (q31_t)0x8d748ed,
+  (q31_t)0x8d10443, (q31_t)0x8cabf93, (q31_t)0x8c47ade, (q31_t)0x8be3624, (q31_t)0x8b7f164, (q31_t)0x8b1ac9f, (q31_t)0x8ab67d4, (q31_t)0x8a52304,
+  (q31_t)0x89ede2f, (q31_t)0x8989955, (q31_t)0x8925475, (q31_t)0x88c0f90, (q31_t)0x885caa5, (q31_t)0x87f85b5, (q31_t)0x87940c1, (q31_t)0x872fbc6,
+  (q31_t)0x86cb6c7, (q31_t)0x86671c2, (q31_t)0x8602cb9, (q31_t)0x859e7aa, (q31_t)0x853a296, (q31_t)0x84d5d7d, (q31_t)0x847185e, (q31_t)0x840d33b,
+  (q31_t)0x83a8e12, (q31_t)0x83448e5, (q31_t)0x82e03b2, (q31_t)0x827be7a, (q31_t)0x821793e, (q31_t)0x81b33fc, (q31_t)0x814eeb5, (q31_t)0x80ea969,
+  (q31_t)0x8086419, (q31_t)0x8021ec3, (q31_t)0x7fbd968, (q31_t)0x7f59409, (q31_t)0x7ef4ea4, (q31_t)0x7e9093b, (q31_t)0x7e2c3cd, (q31_t)0x7dc7e5a,
+  (q31_t)0x7d638e2, (q31_t)0x7cff365, (q31_t)0x7c9ade4, (q31_t)0x7c3685d, (q31_t)0x7bd22d2, (q31_t)0x7b6dd42, (q31_t)0x7b097ad, (q31_t)0x7aa5214,
+  (q31_t)0x7a40c76, (q31_t)0x79dc6d3, (q31_t)0x797812b, (q31_t)0x7913b7f, (q31_t)0x78af5ce, (q31_t)0x784b019, (q31_t)0x77e6a5e, (q31_t)0x77824a0,
+  (q31_t)0x771dedc, (q31_t)0x76b9914, (q31_t)0x7655347, (q31_t)0x75f0d76, (q31_t)0x758c7a1, (q31_t)0x75281c6, (q31_t)0x74c3be7, (q31_t)0x745f604,
+  (q31_t)0x73fb01c, (q31_t)0x7396a30, (q31_t)0x733243f, (q31_t)0x72cde4a, (q31_t)0x7269851, (q31_t)0x7205253, (q31_t)0x71a0c50, (q31_t)0x713c64a,
+  (q31_t)0x70d803f, (q31_t)0x7073a2f, (q31_t)0x700f41b, (q31_t)0x6faae03, (q31_t)0x6f467e7, (q31_t)0x6ee21c6, (q31_t)0x6e7dba1, (q31_t)0x6e19578,
+  (q31_t)0x6db4f4a, (q31_t)0x6d50919, (q31_t)0x6cec2e3, (q31_t)0x6c87ca9, (q31_t)0x6c2366a, (q31_t)0x6bbf028, (q31_t)0x6b5a9e1, (q31_t)0x6af6396,
+  (q31_t)0x6a91d47, (q31_t)0x6a2d6f4, (q31_t)0x69c909d, (q31_t)0x6964a42, (q31_t)0x69003e3, (q31_t)0x689bd80, (q31_t)0x6837718, (q31_t)0x67d30ad,
+  (q31_t)0x676ea3d, (q31_t)0x670a3ca, (q31_t)0x66a5d53, (q31_t)0x66416d8, (q31_t)0x65dd058, (q31_t)0x65789d5, (q31_t)0x651434e, (q31_t)0x64afcc3,
+  (q31_t)0x644b634, (q31_t)0x63e6fa2, (q31_t)0x638290b, (q31_t)0x631e271, (q31_t)0x62b9bd3, (q31_t)0x6255531, (q31_t)0x61f0e8b, (q31_t)0x618c7e1,
+  (q31_t)0x6128134, (q31_t)0x60c3a83, (q31_t)0x605f3ce, (q31_t)0x5ffad15, (q31_t)0x5f96659, (q31_t)0x5f31f99, (q31_t)0x5ecd8d6, (q31_t)0x5e6920e,
+  (q31_t)0x5e04b43, (q31_t)0x5da0475, (q31_t)0x5d3bda3, (q31_t)0x5cd76cd, (q31_t)0x5c72ff4, (q31_t)0x5c0e917, (q31_t)0x5baa237, (q31_t)0x5b45b53,
+  (q31_t)0x5ae146b, (q31_t)0x5a7cd80, (q31_t)0x5a18692, (q31_t)0x59b3fa0, (q31_t)0x594f8aa, (q31_t)0x58eb1b2, (q31_t)0x5886ab5, (q31_t)0x58223b6,
+  (q31_t)0x57bdcb3, (q31_t)0x57595ac, (q31_t)0x56f4ea2, (q31_t)0x5690795, (q31_t)0x562c085, (q31_t)0x55c7971, (q31_t)0x556325a, (q31_t)0x54feb3f,
+  (q31_t)0x549a422, (q31_t)0x5435d01, (q31_t)0x53d15dd, (q31_t)0x536ceb5, (q31_t)0x530878a, (q31_t)0x52a405d, (q31_t)0x523f92c, (q31_t)0x51db1f7,
+  (q31_t)0x5176ac0, (q31_t)0x5112385, (q31_t)0x50adc48, (q31_t)0x5049507, (q31_t)0x4fe4dc3, (q31_t)0x4f8067c, (q31_t)0x4f1bf32, (q31_t)0x4eb77e5,
+  (q31_t)0x4e53095, (q31_t)0x4dee942, (q31_t)0x4d8a1ec, (q31_t)0x4d25a93, (q31_t)0x4cc1337, (q31_t)0x4c5cbd8, (q31_t)0x4bf8476, (q31_t)0x4b93d11,
+  (q31_t)0x4b2f5a9, (q31_t)0x4acae3e, (q31_t)0x4a666d1, (q31_t)0x4a01f60, (q31_t)0x499d7ed, (q31_t)0x4939077, (q31_t)0x48d48fe, (q31_t)0x4870182,
+  (q31_t)0x480ba04, (q31_t)0x47a7282, (q31_t)0x4742afe, (q31_t)0x46de377, (q31_t)0x4679bee, (q31_t)0x4615461, (q31_t)0x45b0cd2, (q31_t)0x454c541,
+  (q31_t)0x44e7dac, (q31_t)0x4483615, (q31_t)0x441ee7c, (q31_t)0x43ba6df, (q31_t)0x4355f40, (q31_t)0x42f179f, (q31_t)0x428cffb, (q31_t)0x4228854,
+  (q31_t)0x41c40ab, (q31_t)0x415f8ff, (q31_t)0x40fb151, (q31_t)0x40969a0, (q31_t)0x40321ed, (q31_t)0x3fcda37, (q31_t)0x3f6927f, (q31_t)0x3f04ac4,
+  (q31_t)0x3ea0307, (q31_t)0x3e3bb48, (q31_t)0x3dd7386, (q31_t)0x3d72bc2, (q31_t)0x3d0e3fb, (q31_t)0x3ca9c32, (q31_t)0x3c45467, (q31_t)0x3be0c99,
+  (q31_t)0x3b7c4c9, (q31_t)0x3b17cf7, (q31_t)0x3ab3523, (q31_t)0x3a4ed4c, (q31_t)0x39ea573, (q31_t)0x3985d97, (q31_t)0x39215ba, (q31_t)0x38bcdda,
+  (q31_t)0x38585f8, (q31_t)0x37f3e14, (q31_t)0x378f62e, (q31_t)0x372ae46, (q31_t)0x36c665b, (q31_t)0x3661e6f, (q31_t)0x35fd680, (q31_t)0x3598e8f,
+  (q31_t)0x353469c, (q31_t)0x34cfea8, (q31_t)0x346b6b1, (q31_t)0x3406eb8, (q31_t)0x33a26bd, (q31_t)0x333dec0, (q31_t)0x32d96c1, (q31_t)0x3274ec0,
+  (q31_t)0x32106bd, (q31_t)0x31abeb9, (q31_t)0x31476b2, (q31_t)0x30e2ea9, (q31_t)0x307e69f, (q31_t)0x3019e93, (q31_t)0x2fb5684, (q31_t)0x2f50e74,
+  (q31_t)0x2eec663, (q31_t)0x2e87e4f, (q31_t)0x2e2363a, (q31_t)0x2dbee22, (q31_t)0x2d5a609, (q31_t)0x2cf5def, (q31_t)0x2c915d2, (q31_t)0x2c2cdb4,
+  (q31_t)0x2bc8594, (q31_t)0x2b63d73, (q31_t)0x2aff54f, (q31_t)0x2a9ad2a, (q31_t)0x2a36504, (q31_t)0x29d1cdc, (q31_t)0x296d4b2, (q31_t)0x2908c87,
+  (q31_t)0x28a445a, (q31_t)0x283fc2b, (q31_t)0x27db3fb, (q31_t)0x2776bc9, (q31_t)0x2712396, (q31_t)0x26adb62, (q31_t)0x264932b, (q31_t)0x25e4af4,
+  (q31_t)0x25802bb, (q31_t)0x251ba80, (q31_t)0x24b7244, (q31_t)0x2452a07, (q31_t)0x23ee1c8, (q31_t)0x2389988, (q31_t)0x2325147, (q31_t)0x22c0904,
+  (q31_t)0x225c0bf, (q31_t)0x21f787a, (q31_t)0x2193033, (q31_t)0x212e7eb, (q31_t)0x20c9fa1, (q31_t)0x2065757, (q31_t)0x2000f0b, (q31_t)0x1f9c6be,
+  (q31_t)0x1f37e6f, (q31_t)0x1ed3620, (q31_t)0x1e6edcf, (q31_t)0x1e0a57d, (q31_t)0x1da5d2a, (q31_t)0x1d414d6, (q31_t)0x1cdcc80, (q31_t)0x1c7842a,
+  (q31_t)0x1c13bd2, (q31_t)0x1baf37a, (q31_t)0x1b4ab20, (q31_t)0x1ae62c5, (q31_t)0x1a81a69, (q31_t)0x1a1d20c, (q31_t)0x19b89ae, (q31_t)0x1954150,
+  (q31_t)0x18ef8f0, (q31_t)0x188b08f, (q31_t)0x182682d, (q31_t)0x17c1fcb, (q31_t)0x175d767, (q31_t)0x16f8f03, (q31_t)0x169469d, (q31_t)0x162fe37,
+  (q31_t)0x15cb5d0, (q31_t)0x1566d68, (q31_t)0x15024ff, (q31_t)0x149dc96, (q31_t)0x143942b, (q31_t)0x13d4bc0, (q31_t)0x1370354, (q31_t)0x130bae7,
+  (q31_t)0x12a727a, (q31_t)0x1242a0c, (q31_t)0x11de19d, (q31_t)0x117992e, (q31_t)0x11150be, (q31_t)0x10b084d, (q31_t)0x104bfdb, (q31_t)0xfe7769,
+  (q31_t)0xf82ef6, (q31_t)0xf1e683, (q31_t)0xeb9e0f, (q31_t)0xe5559b, (q31_t)0xdf0d26, (q31_t)0xd8c4b0, (q31_t)0xd27c3a, (q31_t)0xcc33c3,
+  (q31_t)0xc5eb4c, (q31_t)0xbfa2d5, (q31_t)0xb95a5d, (q31_t)0xb311e4, (q31_t)0xacc96b, (q31_t)0xa680f2, (q31_t)0xa03878, (q31_t)0x99effe,
+  (q31_t)0x93a784, (q31_t)0x8d5f09, (q31_t)0x87168e, (q31_t)0x80ce12, (q31_t)0x7a8597, (q31_t)0x743d1a, (q31_t)0x6df49e, (q31_t)0x67ac21,
+  (q31_t)0x6163a5, (q31_t)0x5b1b27, (q31_t)0x54d2aa, (q31_t)0x4e8a2c, (q31_t)0x4841af, (q31_t)0x41f931, (q31_t)0x3bb0b3, (q31_t)0x356835,
+  (q31_t)0x2f1fb6, (q31_t)0x28d738, (q31_t)0x228eb9, (q31_t)0x1c463b, (q31_t)0x15fdbc, (q31_t)0xfb53d, (q31_t)0x96cbe, (q31_t)0x3243f
+};
+  #endif
+
+/**
+  @} end of DCT4_IDCT4_Table group
+ */
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
+/**
+  @brief  Q15 table for reciprocal
+*/
+const q15_t __ALIGNED(4) armRecipTableQ15[64] = {
+ 0x7F03, 0x7D13, 0x7B31, 0x795E, 0x7798, 0x75E0,
+ 0x7434, 0x7294, 0x70FF, 0x6F76, 0x6DF6, 0x6C82,
+ 0x6B16, 0x69B5, 0x685C, 0x670C, 0x65C4, 0x6484,
+ 0x634C, 0x621C, 0x60F3, 0x5FD0, 0x5EB5, 0x5DA0,
+ 0x5C91, 0x5B88, 0x5A85, 0x5988, 0x5890, 0x579E,
+ 0x56B0, 0x55C8, 0x54E4, 0x5405, 0x532B, 0x5255,
+ 0x5183, 0x50B6, 0x4FEC, 0x4F26, 0x4E64, 0x4DA6,
+ 0x4CEC, 0x4C34, 0x4B81, 0x4AD0, 0x4A23, 0x4978,
+ 0x48D1, 0x482D, 0x478C, 0x46ED, 0x4651, 0x45B8,
+ 0x4521, 0x448D, 0x43FC, 0x436C, 0x42DF, 0x4255,
+ 0x41CC, 0x4146, 0x40C2, 0x4040
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
+
+/**
+  @brief  Q31 table for reciprocal
+*/
+const q31_t armRecipTableQ31[64] = {
+  0x7F03F03F, 0x7D137420, 0x7B31E739, 0x795E9F94, 0x7798FD29, 0x75E06928,
+  0x7434554D, 0x72943B4B, 0x70FF9C40, 0x6F760031, 0x6DF6F593, 0x6C8210E3,
+  0x6B16EC3A, 0x69B526F6, 0x685C655F, 0x670C505D, 0x65C4952D, 0x6484E519,
+  0x634CF53E, 0x621C7E4F, 0x60F33C61, 0x5FD0EEB3, 0x5EB55785, 0x5DA03BEB,
+  0x5C9163A1, 0x5B8898E6, 0x5A85A85A, 0x598860DF, 0x58909373, 0x579E1318,
+  0x56B0B4B8, 0x55C84F0B, 0x54E4BA80, 0x5405D124, 0x532B6E8F, 0x52556FD0,
+  0x5183B35A, 0x50B618F3, 0x4FEC81A2, 0x4F26CFA2, 0x4E64E64E, 0x4DA6AA1D,
+  0x4CEC008B, 0x4C34D010, 0x4B810016, 0x4AD078EF, 0x4A2323C4, 0x4978EA96,
+  0x48D1B827, 0x482D77FE, 0x478C1657, 0x46ED801D, 0x4651A2E5, 0x45B86CE2,
+  0x4521CCE1, 0x448DB244, 0x43FC0CFA, 0x436CCD78, 0x42DFE4B4, 0x42554426,
+  0x41CCDDB6, 0x4146A3C6, 0x40C28923, 0x40408102
+};
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+/**
+  @par
+  Example code for the generation of the floating-point sine table:
+  <pre>
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  }</pre>
+ @par
+  where PI value is  3.14159265358979
+ */
+const float32_t sinTable_f32[FAST_MATH_TABLE_SIZE + 1] = {
+   0.00000000f, 0.01227154f, 0.02454123f, 0.03680722f, 0.04906767f, 0.06132074f,
+   0.07356456f, 0.08579731f, 0.09801714f, 0.11022221f, 0.12241068f, 0.13458071f,
+   0.14673047f, 0.15885814f, 0.17096189f, 0.18303989f, 0.19509032f, 0.20711138f,
+   0.21910124f, 0.23105811f, 0.24298018f, 0.25486566f, 0.26671276f, 0.27851969f,
+   0.29028468f, 0.30200595f, 0.31368174f, 0.32531029f, 0.33688985f, 0.34841868f,
+   0.35989504f, 0.37131719f, 0.38268343f, 0.39399204f, 0.40524131f, 0.41642956f,
+   0.42755509f, 0.43861624f, 0.44961133f, 0.46053871f, 0.47139674f, 0.48218377f,
+   0.49289819f, 0.50353838f, 0.51410274f, 0.52458968f, 0.53499762f, 0.54532499f,
+   0.55557023f, 0.56573181f, 0.57580819f, 0.58579786f, 0.59569930f, 0.60551104f,
+   0.61523159f, 0.62485949f, 0.63439328f, 0.64383154f, 0.65317284f, 0.66241578f,
+   0.67155895f, 0.68060100f, 0.68954054f, 0.69837625f, 0.70710678f, 0.71573083f,
+   0.72424708f, 0.73265427f, 0.74095113f, 0.74913639f, 0.75720885f, 0.76516727f,
+   0.77301045f, 0.78073723f, 0.78834643f, 0.79583690f, 0.80320753f, 0.81045720f,
+   0.81758481f, 0.82458930f, 0.83146961f, 0.83822471f, 0.84485357f, 0.85135519f,
+   0.85772861f, 0.86397286f, 0.87008699f, 0.87607009f, 0.88192126f, 0.88763962f,
+   0.89322430f, 0.89867447f, 0.90398929f, 0.90916798f, 0.91420976f, 0.91911385f,
+   0.92387953f, 0.92850608f, 0.93299280f, 0.93733901f, 0.94154407f, 0.94560733f,
+   0.94952818f, 0.95330604f, 0.95694034f, 0.96043052f, 0.96377607f, 0.96697647f,
+   0.97003125f, 0.97293995f, 0.97570213f, 0.97831737f, 0.98078528f, 0.98310549f,
+   0.98527764f, 0.98730142f, 0.98917651f, 0.99090264f, 0.99247953f, 0.99390697f,
+   0.99518473f, 0.99631261f, 0.99729046f, 0.99811811f, 0.99879546f, 0.99932238f,
+   0.99969882f, 0.99992470f, 1.00000000f, 0.99992470f, 0.99969882f, 0.99932238f,
+   0.99879546f, 0.99811811f, 0.99729046f, 0.99631261f, 0.99518473f, 0.99390697f,
+   0.99247953f, 0.99090264f, 0.98917651f, 0.98730142f, 0.98527764f, 0.98310549f,
+   0.98078528f, 0.97831737f, 0.97570213f, 0.97293995f, 0.97003125f, 0.96697647f,
+   0.96377607f, 0.96043052f, 0.95694034f, 0.95330604f, 0.94952818f, 0.94560733f,
+   0.94154407f, 0.93733901f, 0.93299280f, 0.92850608f, 0.92387953f, 0.91911385f,
+   0.91420976f, 0.90916798f, 0.90398929f, 0.89867447f, 0.89322430f, 0.88763962f,
+   0.88192126f, 0.87607009f, 0.87008699f, 0.86397286f, 0.85772861f, 0.85135519f,
+   0.84485357f, 0.83822471f, 0.83146961f, 0.82458930f, 0.81758481f, 0.81045720f,
+   0.80320753f, 0.79583690f, 0.78834643f, 0.78073723f, 0.77301045f, 0.76516727f,
+   0.75720885f, 0.74913639f, 0.74095113f, 0.73265427f, 0.72424708f, 0.71573083f,
+   0.70710678f, 0.69837625f, 0.68954054f, 0.68060100f, 0.67155895f, 0.66241578f,
+   0.65317284f, 0.64383154f, 0.63439328f, 0.62485949f, 0.61523159f, 0.60551104f,
+   0.59569930f, 0.58579786f, 0.57580819f, 0.56573181f, 0.55557023f, 0.54532499f,
+   0.53499762f, 0.52458968f, 0.51410274f, 0.50353838f, 0.49289819f, 0.48218377f,
+   0.47139674f, 0.46053871f, 0.44961133f, 0.43861624f, 0.42755509f, 0.41642956f,
+   0.40524131f, 0.39399204f, 0.38268343f, 0.37131719f, 0.35989504f, 0.34841868f,
+   0.33688985f, 0.32531029f, 0.31368174f, 0.30200595f, 0.29028468f, 0.27851969f,
+   0.26671276f, 0.25486566f, 0.24298018f, 0.23105811f, 0.21910124f, 0.20711138f,
+   0.19509032f, 0.18303989f, 0.17096189f, 0.15885814f, 0.14673047f, 0.13458071f,
+   0.12241068f, 0.11022221f, 0.09801714f, 0.08579731f, 0.07356456f, 0.06132074f,
+   0.04906767f, 0.03680722f, 0.02454123f, 0.01227154f, 0.00000000f, -0.01227154f,
+   -0.02454123f, -0.03680722f, -0.04906767f, -0.06132074f, -0.07356456f,
+   -0.08579731f, -0.09801714f, -0.11022221f, -0.12241068f, -0.13458071f,
+   -0.14673047f, -0.15885814f, -0.17096189f, -0.18303989f, -0.19509032f,
+   -0.20711138f, -0.21910124f, -0.23105811f, -0.24298018f, -0.25486566f,
+   -0.26671276f, -0.27851969f, -0.29028468f, -0.30200595f, -0.31368174f,
+   -0.32531029f, -0.33688985f, -0.34841868f, -0.35989504f, -0.37131719f,
+   -0.38268343f, -0.39399204f, -0.40524131f, -0.41642956f, -0.42755509f,
+   -0.43861624f, -0.44961133f, -0.46053871f, -0.47139674f, -0.48218377f,
+   -0.49289819f, -0.50353838f, -0.51410274f, -0.52458968f, -0.53499762f,
+   -0.54532499f, -0.55557023f, -0.56573181f, -0.57580819f, -0.58579786f,
+   -0.59569930f, -0.60551104f, -0.61523159f, -0.62485949f, -0.63439328f,
+   -0.64383154f, -0.65317284f, -0.66241578f, -0.67155895f, -0.68060100f,
+   -0.68954054f, -0.69837625f, -0.70710678f, -0.71573083f, -0.72424708f,
+   -0.73265427f, -0.74095113f, -0.74913639f, -0.75720885f, -0.76516727f,
+   -0.77301045f, -0.78073723f, -0.78834643f, -0.79583690f, -0.80320753f,
+   -0.81045720f, -0.81758481f, -0.82458930f, -0.83146961f, -0.83822471f,
+   -0.84485357f, -0.85135519f, -0.85772861f, -0.86397286f, -0.87008699f,
+   -0.87607009f, -0.88192126f, -0.88763962f, -0.89322430f, -0.89867447f,
+   -0.90398929f, -0.90916798f, -0.91420976f, -0.91911385f, -0.92387953f,
+   -0.92850608f, -0.93299280f, -0.93733901f, -0.94154407f, -0.94560733f,
+   -0.94952818f, -0.95330604f, -0.95694034f, -0.96043052f, -0.96377607f,
+   -0.96697647f, -0.97003125f, -0.97293995f, -0.97570213f, -0.97831737f,
+   -0.98078528f, -0.98310549f, -0.98527764f, -0.98730142f, -0.98917651f,
+   -0.99090264f, -0.99247953f, -0.99390697f, -0.99518473f, -0.99631261f,
+   -0.99729046f, -0.99811811f, -0.99879546f, -0.99932238f, -0.99969882f,
+   -0.99992470f, -1.00000000f, -0.99992470f, -0.99969882f, -0.99932238f,
+   -0.99879546f, -0.99811811f, -0.99729046f, -0.99631261f, -0.99518473f,
+   -0.99390697f, -0.99247953f, -0.99090264f, -0.98917651f, -0.98730142f,
+   -0.98527764f, -0.98310549f, -0.98078528f, -0.97831737f, -0.97570213f,
+   -0.97293995f, -0.97003125f, -0.96697647f, -0.96377607f, -0.96043052f,
+   -0.95694034f, -0.95330604f, -0.94952818f, -0.94560733f, -0.94154407f,
+   -0.93733901f, -0.93299280f, -0.92850608f, -0.92387953f, -0.91911385f,
+   -0.91420976f, -0.90916798f, -0.90398929f, -0.89867447f, -0.89322430f,
+   -0.88763962f, -0.88192126f, -0.87607009f, -0.87008699f, -0.86397286f,
+   -0.85772861f, -0.85135519f, -0.84485357f, -0.83822471f, -0.83146961f,
+   -0.82458930f, -0.81758481f, -0.81045720f, -0.80320753f, -0.79583690f,
+   -0.78834643f, -0.78073723f, -0.77301045f, -0.76516727f, -0.75720885f,
+   -0.74913639f, -0.74095113f, -0.73265427f, -0.72424708f, -0.71573083f,
+   -0.70710678f, -0.69837625f, -0.68954054f, -0.68060100f, -0.67155895f,
+   -0.66241578f, -0.65317284f, -0.64383154f, -0.63439328f, -0.62485949f,
+   -0.61523159f, -0.60551104f, -0.59569930f, -0.58579786f, -0.57580819f,
+   -0.56573181f, -0.55557023f, -0.54532499f, -0.53499762f, -0.52458968f,
+   -0.51410274f, -0.50353838f, -0.49289819f, -0.48218377f, -0.47139674f,
+   -0.46053871f, -0.44961133f, -0.43861624f, -0.42755509f, -0.41642956f,
+   -0.40524131f, -0.39399204f, -0.38268343f, -0.37131719f, -0.35989504f,
+   -0.34841868f, -0.33688985f, -0.32531029f, -0.31368174f, -0.30200595f,
+   -0.29028468f, -0.27851969f, -0.26671276f, -0.25486566f, -0.24298018f,
+   -0.23105811f, -0.21910124f, -0.20711138f, -0.19509032f, -0.18303989f,
+   -0.17096189f, -0.15885814f, -0.14673047f, -0.13458071f, -0.12241068f,
+   -0.11022221f, -0.09801714f, -0.08579731f, -0.07356456f, -0.06132074f,
+   -0.04906767f, -0.03680722f, -0.02454123f, -0.01227154f, -0.00000000f
+};
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+/**
+  @par
+  Table values are in Q31 (1.31 fixed-point format) and generation is done in
+  three steps.  First, generate sin values in floating point:
+  <pre>
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  } </pre>
+  where PI value is 3.14159265358979
+ @par
+  Second, convert floating-point to Q31 (Fixed point):
+ 	(sinTable[i] * pow(2, 31))
+ @par
+  Finally, round to the nearest integer value:
+  	sinTable[i] += (sinTable[i] > 0 ? 0.5 : -0.5);
+ */
+const q31_t sinTable_q31[FAST_MATH_TABLE_SIZE + 1] = {
+	0L, 26352928L, 52701887L, 79042909L, 105372028L, 131685278L, 157978697L,
+	184248325L, 210490206L, 236700388L, 262874923L, 289009871L, 315101295L,
+	341145265L, 367137861L, 393075166L, 418953276L, 444768294L, 470516330L,
+	496193509L, 521795963L, 547319836L, 572761285L, 598116479L, 623381598L,
+	648552838L, 673626408L, 698598533L, 723465451L, 748223418L, 772868706L,
+	797397602L, 821806413L, 846091463L, 870249095L, 894275671L, 918167572L,
+	941921200L, 965532978L, 988999351L, 1012316784L, 1035481766L, 1058490808L,
+	1081340445L, 1104027237L, 1126547765L, 1148898640L, 1171076495L, 1193077991L,
+	1214899813L, 1236538675L, 1257991320L, 1279254516L, 1300325060L, 1321199781L,
+	1341875533L, 1362349204L, 1382617710L, 1402678000L, 1422527051L, 1442161874L,
+	1461579514L, 1480777044L, 1499751576L, 1518500250L, 1537020244L, 1555308768L,
+	1573363068L, 1591180426L, 1608758157L, 1626093616L, 1643184191L, 1660027308L,
+	1676620432L, 1692961062L, 1709046739L, 1724875040L, 1740443581L, 1755750017L,
+	1770792044L, 1785567396L, 1800073849L, 1814309216L, 1828271356L, 1841958164L,
+	1855367581L, 1868497586L, 1881346202L, 1893911494L, 1906191570L, 1918184581L,
+	1929888720L, 1941302225L, 1952423377L, 1963250501L, 1973781967L, 1984016189L,
+	1993951625L, 2003586779L, 2012920201L, 2021950484L, 2030676269L, 2039096241L,
+	2047209133L, 2055013723L, 2062508835L, 2069693342L, 2076566160L, 2083126254L,
+	2089372638L, 2095304370L, 2100920556L, 2106220352L, 2111202959L, 2115867626L,
+	2120213651L, 2124240380L, 2127947206L, 2131333572L, 2134398966L, 2137142927L,
+	2139565043L, 2141664948L, 2143442326L, 2144896910L, 2146028480L, 2146836866L,
+	2147321946L, 2147483647L, 2147321946L, 2146836866L, 2146028480L, 2144896910L,
+	2143442326L, 2141664948L, 2139565043L, 2137142927L, 2134398966L, 2131333572L,
+	2127947206L, 2124240380L, 2120213651L, 2115867626L, 2111202959L, 2106220352L,
+	2100920556L, 2095304370L, 2089372638L, 2083126254L, 2076566160L, 2069693342L,
+	2062508835L, 2055013723L, 2047209133L, 2039096241L, 2030676269L, 2021950484L,
+	2012920201L, 2003586779L, 1993951625L, 1984016189L, 1973781967L, 1963250501L,
+	1952423377L, 1941302225L, 1929888720L, 1918184581L, 1906191570L, 1893911494L,
+	1881346202L, 1868497586L, 1855367581L, 1841958164L, 1828271356L, 1814309216L,
+	1800073849L, 1785567396L, 1770792044L, 1755750017L, 1740443581L, 1724875040L,
+	1709046739L, 1692961062L, 1676620432L, 1660027308L, 1643184191L, 1626093616L,
+	1608758157L, 1591180426L, 1573363068L, 1555308768L, 1537020244L, 1518500250L,
+	1499751576L, 1480777044L, 1461579514L, 1442161874L, 1422527051L, 1402678000L,
+	1382617710L, 1362349204L, 1341875533L, 1321199781L, 1300325060L, 1279254516L,
+	1257991320L, 1236538675L, 1214899813L, 1193077991L, 1171076495L, 1148898640L,
+	1126547765L, 1104027237L, 1081340445L, 1058490808L, 1035481766L, 1012316784L,
+	988999351L, 965532978L, 941921200L, 918167572L, 894275671L, 870249095L,
+	846091463L, 821806413L, 797397602L, 772868706L, 748223418L, 723465451L,
+	698598533L, 673626408L, 648552838L, 623381598L, 598116479L, 572761285L,
+	547319836L, 521795963L, 496193509L, 470516330L, 444768294L, 418953276L,
+	393075166L, 367137861L, 341145265L, 315101295L, 289009871L, 262874923L,
+	236700388L, 210490206L, 184248325L, 157978697L, 131685278L, 105372028L,
+	79042909L, 52701887L, 26352928L, 0L, -26352928L, -52701887L, -79042909L,
+	-105372028L, -131685278L, -157978697L, -184248325L, -210490206L, -236700388L,
+	-262874923L, -289009871L, -315101295L, -341145265L, -367137861L, -393075166L,
+	-418953276L, -444768294L, -470516330L, -496193509L, -521795963L, -547319836L,
+	-572761285L, -598116479L, -623381598L, -648552838L, -673626408L, -698598533L,
+	-723465451L, -748223418L, -772868706L, -797397602L, -821806413L, -846091463L,
+	-870249095L, -894275671L, -918167572L, -941921200L, -965532978L, -988999351L,
+	-1012316784L, -1035481766L, -1058490808L, -1081340445L, -1104027237L,
+	-1126547765L, -1148898640L, -1171076495L, -1193077991L, -1214899813L,
+	-1236538675L, -1257991320L, -1279254516L, -1300325060L, -1321199781L,
+	-1341875533L, -1362349204L, -1382617710L, -1402678000L, -1422527051L,
+	-1442161874L, -1461579514L, -1480777044L, -1499751576L, -1518500250L,
+	-1537020244L, -1555308768L, -1573363068L, -1591180426L, -1608758157L,
+	-1626093616L, -1643184191L, -1660027308L, -1676620432L, -1692961062L,
+	-1709046739L, -1724875040L, -1740443581L, -1755750017L, -1770792044L,
+	-1785567396L, -1800073849L, -1814309216L, -1828271356L, -1841958164L,
+	-1855367581L, -1868497586L, -1881346202L, -1893911494L, -1906191570L,
+	-1918184581L, -1929888720L, -1941302225L, -1952423377L, -1963250501L,
+	-1973781967L, -1984016189L, -1993951625L, -2003586779L, -2012920201L,
+	-2021950484L, -2030676269L, -2039096241L, -2047209133L, -2055013723L,
+	-2062508835L, -2069693342L, -2076566160L, -2083126254L, -2089372638L,
+	-2095304370L, -2100920556L, -2106220352L, -2111202959L, -2115867626L,
+	-2120213651L, -2124240380L, -2127947206L, -2131333572L, -2134398966L,
+	-2137142927L, -2139565043L, -2141664948L, -2143442326L, -2144896910L,
+	-2146028480L, -2146836866L, -2147321946L, (q31_t)0x80000000, -2147321946L,
+	-2146836866L, -2146028480L, -2144896910L, -2143442326L, -2141664948L,
+	-2139565043L, -2137142927L, -2134398966L, -2131333572L, -2127947206L,
+	-2124240380L, -2120213651L, -2115867626L, -2111202959L, -2106220352L,
+	-2100920556L, -2095304370L, -2089372638L, -2083126254L, -2076566160L,
+	-2069693342L, -2062508835L, -2055013723L, -2047209133L, -2039096241L,
+	-2030676269L, -2021950484L, -2012920201L, -2003586779L, -1993951625L,
+	-1984016189L, -1973781967L, -1963250501L, -1952423377L, -1941302225L,
+	-1929888720L, -1918184581L, -1906191570L, -1893911494L, -1881346202L,
+	-1868497586L, -1855367581L, -1841958164L, -1828271356L, -1814309216L,
+	-1800073849L, -1785567396L, -1770792044L, -1755750017L, -1740443581L,
+	-1724875040L, -1709046739L, -1692961062L, -1676620432L, -1660027308L,
+	-1643184191L, -1626093616L, -1608758157L, -1591180426L, -1573363068L,
+	-1555308768L, -1537020244L, -1518500250L, -1499751576L, -1480777044L,
+	-1461579514L, -1442161874L, -1422527051L, -1402678000L, -1382617710L,
+	-1362349204L, -1341875533L, -1321199781L, -1300325060L, -1279254516L,
+	-1257991320L, -1236538675L, -1214899813L, -1193077991L, -1171076495L,
+	-1148898640L, -1126547765L, -1104027237L, -1081340445L, -1058490808L,
+	-1035481766L, -1012316784L, -988999351L, -965532978L, -941921200L,
+	-918167572L, -894275671L, -870249095L, -846091463L, -821806413L, -797397602L,
+	-772868706L, -748223418L, -723465451L, -698598533L, -673626408L, -648552838L,
+	-623381598L, -598116479L, -572761285L, -547319836L, -521795963L, -496193509L,
+	-470516330L, -444768294L, -418953276L, -393075166L, -367137861L, -341145265L,
+	-315101295L, -289009871L, -262874923L, -236700388L, -210490206L, -184248325L,
+	-157978697L, -131685278L, -105372028L, -79042909L, -52701887L, -26352928L, 0
+};
+
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
+/**
+  @par
+  Table values are in Q15 (1.15 fixed-point format) and generation is done in
+  three steps.  First,  generate sin values in floating point:
+  <pre>
+  tableSize = 512;
+  for (n = 0; n < (tableSize + 1); n++)
+  {
+ 	sinTable[n] = sin(2*PI*n/tableSize);
+  } </pre>
+  where PI value is  3.14159265358979
+ @par
+  Second, convert floating-point to Q15 (Fixed point):
+ 	(sinTable[i] * pow(2, 15))
+ @par
+  Finally, round to the nearest integer value:
+  	sinTable[i] += (sinTable[i] > 0 ? 0.5 :-0.5);
+ */
+const q15_t sinTable_q15[FAST_MATH_TABLE_SIZE + 1] = {
+	0, 402, 804, 1206, 1608, 2009, 2411, 2811, 3212, 3612, 4011, 4410, 4808,
+	5205, 5602, 5998, 6393, 6787, 7180, 7571, 7962, 8351, 8740, 9127, 9512,
+	9896, 10279, 10660, 11039, 11417, 11793, 12167, 12540, 12910, 13279,
+	13646, 14010, 14373, 14733, 15091, 15447, 15800, 16151, 16500, 16846,
+	17190, 17531, 17869, 18205, 18538, 18868, 19195, 19520, 19841, 20160,
+	20475, 20788, 21097, 21403, 21706, 22006, 22302, 22595, 22884, 23170,
+	23453, 23732, 24008, 24279, 24548, 24812, 25073, 25330, 25583, 25833,
+	26078, 26320, 26557, 26791, 27020, 27246, 27467, 27684, 27897, 28106,
+	28311, 28511, 28707, 28899, 29086, 29269, 29448, 29622, 29792, 29957,
+	30118, 30274, 30425, 30572, 30715, 30853, 30986, 31114, 31238, 31357,
+	31471, 31581, 31686, 31786, 31881, 31972, 32058, 32138, 32214, 32286,
+	32352, 32413, 32470, 32522, 32568, 32610, 32647, 32679, 32706, 32729,
+	32746, 32758, 32766, 32767, 32766, 32758, 32746, 32729, 32706, 32679,
+	32647, 32610, 32568, 32522, 32470, 32413, 32352, 32286, 32214, 32138,
+	32058, 31972, 31881, 31786, 31686, 31581, 31471, 31357, 31238, 31114,
+	30986, 30853, 30715, 30572, 30425, 30274, 30118, 29957, 29792, 29622,
+	29448, 29269, 29086, 28899, 28707, 28511, 28311, 28106, 27897, 27684,
+	27467, 27246, 27020, 26791, 26557, 26320, 26078, 25833, 25583, 25330,
+	25073, 24812, 24548, 24279, 24008, 23732, 23453, 23170, 22884, 22595,
+	22302, 22006, 21706, 21403, 21097, 20788, 20475, 20160, 19841, 19520,
+	19195, 18868, 18538, 18205, 17869, 17531, 17190, 16846, 16500, 16151,
+	15800, 15447, 15091, 14733, 14373, 14010, 13646, 13279, 12910, 12540,
+	12167, 11793, 11417, 11039, 10660, 10279, 9896, 9512, 9127, 8740, 8351,
+	7962, 7571, 7180, 6787, 6393, 5998, 5602, 5205, 4808, 4410, 4011, 3612,
+	3212, 2811, 2411, 2009, 1608, 1206, 804, 402, 0, -402, -804, -1206,
+	-1608, -2009, -2411, -2811, -3212, -3612, -4011, -4410, -4808, -5205,
+	-5602, -5998, -6393, -6787, -7180, -7571, -7962, -8351, -8740, -9127,
+	-9512, -9896, -10279, -10660, -11039, -11417, -11793, -12167, -12540,
+	-12910, -13279, -13646, -14010, -14373, -14733, -15091, -15447, -15800,
+	-16151, -16500, -16846, -17190, -17531, -17869, -18205, -18538, -18868,
+	-19195, -19520, -19841, -20160, -20475, -20788, -21097, -21403, -21706,
+	-22006, -22302, -22595, -22884, -23170, -23453, -23732, -24008, -24279,
+	-24548, -24812, -25073, -25330, -25583, -25833, -26078, -26320, -26557,
+	-26791, -27020, -27246, -27467, -27684, -27897, -28106, -28311, -28511,
+	-28707, -28899, -29086, -29269, -29448, -29622, -29792, -29957, -30118,
+	-30274, -30425, -30572, -30715, -30853, -30986, -31114, -31238, -31357,
+	-31471, -31581, -31686, -31786, -31881, -31972, -32058, -32138, -32214,
+	-32286, -32352, -32413, -32470, -32522, -32568, -32610, -32647, -32679,
+	-32706, -32729, -32746, -32758, -32766, -32768, -32766, -32758, -32746,
+	-32729, -32706, -32679, -32647, -32610, -32568, -32522, -32470, -32413,
+	-32352, -32286, -32214, -32138, -32058, -31972, -31881, -31786, -31686,
+	-31581, -31471, -31357, -31238, -31114, -30986, -30853, -30715, -30572,
+	-30425, -30274, -30118, -29957, -29792, -29622, -29448, -29269, -29086,
+	-28899, -28707, -28511, -28311, -28106, -27897, -27684, -27467, -27246,
+	-27020, -26791, -26557, -26320, -26078, -25833, -25583, -25330, -25073,
+	-24812, -24548, -24279, -24008, -23732, -23453, -23170, -22884, -22595,
+	-22302, -22006, -21706, -21403, -21097, -20788, -20475, -20160, -19841,
+	-19520, -19195, -18868, -18538, -18205, -17869, -17531, -17190, -16846,
+	-16500, -16151, -15800, -15447, -15091, -14733, -14373, -14010, -13646,
+	-13279, -12910, -12540, -12167, -11793, -11417, -11039, -10660, -10279,
+	-9896, -9512, -9127, -8740, -8351, -7962, -7571, -7180, -6787, -6393,
+	-5998, -5602, -5205, -4808, -4410, -4011, -3612, -3212, -2811, -2411,
+	-2009, -1608, -1206, -804, -402, 0
+};
+#endif /* defined(ARM_ALL_FAST_TABLES) */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+     #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE)
+const q31_t sqrtTable_Q31[256] = {
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x5ffffffe, 0x7ffffffa, 0x5e88c596, 0x7a39e2ff,
+    0x5d2238d8, 0x74dfa6b1, 0x5bcb268e, 0x6fe69562,
+    0x5a827998, 0x6b454dba, 0x5947373a, 0x66f39063,
+    0x58187bf8, 0x62ea1669, 0x56f578e6, 0x5f226e5f,
+    0x55dd714e, 0x5b96df40, 0x54cfb8b0, 0x58424fca,
+    0x53cbb102, 0x552031c7, 0x52d0c92c, 0x522c7048,
+    0x51de7bb2, 0x4f6360a9, 0x50f44d86, 0x4cc1b594,
+    0x5011cd0a, 0x4a4473f6, 0x4f36911a, 0x47e8e962,
+    0x4e62384e, 0x45aca3d0, 0x4d946838, 0x438d6a6a,
+    0x4cccccca, 0x41893746, 0x4c0b17c0, 0x3f9e31fa,
+    0x4b4f0022, 0x3dcaaac3, 0x4a9841ce, 0x3c0d1660,
+    0x49e69d14, 0x3a640a53, 0x4939d654, 0x38ce39a6,
+    0x4891b5b2, 0x374a720b, 0x47ee06ba, 0x35d7993c,
+    0x474e9830, 0x3474aacc, 0x46b33bc0, 0x3320b60c,
+    0x461bc5d2, 0x31dadc4f, 0x45880d4c, 0x30a24f3c,
+    0x44f7eb6a, 0x2f764f6a, 0x446b3b92, 0x2e562b0b,
+    0x43e1db32, 0x2d413cc9, 0x435ba98a, 0x2c36eab0,
+    0x42d887a4, 0x2b36a542, 0x42585824, 0x2a3fe69b,
+    0x41daff34, 0x295231b0, 0x41606266, 0x286d118d,
+    0x40e868a4, 0x279018c3, 0x4072fa10, 0x26bae0c8,
+    0x3ffffffe, 0x25ed0979, 0x3f8f64d2, 0x25263894,
+    0x3f2113f8, 0x24661958, 0x3eb4f9d8, 0x23ac5c10,
+    0x3e4b03ba, 0x22f8b5bb, 0x3de31fc4, 0x224adfba,
+    0x3d7d3cee, 0x21a2977a, 0x3d194ae8, 0x20ff9e30,
+    0x3cb73a24, 0x2061b89a, 0x3c56fbba, 0x1fc8aebb,
+    0x3bf88166, 0x1f344ba6, 0x3b9bbd80, 0x1ea45d4b,
+    0x3b40a2f0, 0x1e18b448, 0x3ae7252e, 0x1d9123b9,
+    0x3a8f382c, 0x1d0d8113, 0x3a38d062, 0x1c8da3fb,
+    0x39e3e2b6, 0x1c116628, 0x39906482, 0x1b98a33c,
+    0x393e4b8a, 0x1b2338aa, 0x38ed8df6, 0x1ab1059a,
+    0x389e2250, 0x1a41eace, 0x384fff7a, 0x19d5ca89,
+    0x38031cb2, 0x196c887b, 0x37b77184, 0x190609a9,
+    0x376cf5ce, 0x18a2345b, 0x3723a1ba, 0x1840f00a,
+    0x36db6db6, 0x17e22550, 0x36945276, 0x1785bdd2,
+    0x364e48f4, 0x172ba43e, 0x36094a64, 0x16d3c42c,
+    0x35c55036, 0x167e0a1f, 0x35825414, 0x162a6372,
+    0x35404fde, 0x15d8be4d, 0x34ff3dac, 0x1589099d,
+    0x34bf17c4, 0x153b3508, 0x347fd89e, 0x14ef30e4,
+    0x34417ade, 0x14a4ee2a, 0x3403f956, 0x145c5e76,
+    0x33c74f02, 0x141573fa, 0x338b7706, 0x13d02171,
+    0x33506cae, 0x138c5a28, 0x33162b6a, 0x134a11e6,
+    0x32dcaed0, 0x13093cee, 0x32a3f294, 0x12c9cffa,
+    0x326bf292, 0x128bc034, 0x3234aac0, 0x124f0330,
+    0x31fe1736, 0x12138ee5, 0x31c83428, 0x11d959b0,
+    0x3192fde6, 0x11a05a45, 0x315e70de, 0x116887b5,
+    0x312a8994, 0x1131d960, 0x30f744aa, 0x10fc46fd,
+    0x30c49ed6, 0x10c7c88b, 0x309294ea, 0x10945653,
+    0x306123cc, 0x1061e8e6, 0x30304878, 0x10307919
+};
+     #endif /* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
+
+     #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE)
+const q15_t sqrtTable_Q15[256] = {
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+    0x5fff, 0x7fff, 0x5e88, 0x7a39,
+    0x5d22, 0x74df, 0x5bcb, 0x6fe6,
+    0x5a82, 0x6b45, 0x5947, 0x66f3,
+    0x5818, 0x62ea, 0x56f5, 0x5f22,
+    0x55dd, 0x5b96, 0x54cf, 0x5842,
+    0x53cb, 0x5520, 0x52d0, 0x522c,
+    0x51de, 0x4f63, 0x50f4, 0x4cc1,
+    0x5011, 0x4a44, 0x4f36, 0x47e8,
+    0x4e62, 0x45ac, 0x4d94, 0x438d,
+    0x4ccc, 0x4189, 0x4c0b, 0x3f9e,
+    0x4b4f, 0x3dca, 0x4a98, 0x3c0d,
+    0x49e6, 0x3a64, 0x4939, 0x38ce,
+    0x4891, 0x374a, 0x47ee, 0x35d7,
+    0x474e, 0x3474, 0x46b3, 0x3320,
+    0x461b, 0x31da, 0x4588, 0x30a2,
+    0x44f7, 0x2f76, 0x446b, 0x2e56,
+    0x43e1, 0x2d41, 0x435b, 0x2c36,
+    0x42d8, 0x2b36, 0x4258, 0x2a3f,
+    0x41da, 0x2952, 0x4160, 0x286d,
+    0x40e8, 0x2790, 0x4072, 0x26ba,
+    0x3fff, 0x25ed, 0x3f8f, 0x2526,
+    0x3f21, 0x2466, 0x3eb4, 0x23ac,
+    0x3e4b, 0x22f8, 0x3de3, 0x224a,
+    0x3d7d, 0x21a2, 0x3d19, 0x20ff,
+    0x3cb7, 0x2061, 0x3c56, 0x1fc8,
+    0x3bf8, 0x1f34, 0x3b9b, 0x1ea4,
+    0x3b40, 0x1e18, 0x3ae7, 0x1d91,
+    0x3a8f, 0x1d0d, 0x3a38, 0x1c8d,
+    0x39e3, 0x1c11, 0x3990, 0x1b98,
+    0x393e, 0x1b23, 0x38ed, 0x1ab1,
+    0x389e, 0x1a41, 0x384f, 0x19d5,
+    0x3803, 0x196c, 0x37b7, 0x1906,
+    0x376c, 0x18a2, 0x3723, 0x1840,
+    0x36db, 0x17e2, 0x3694, 0x1785,
+    0x364e, 0x172b, 0x3609, 0x16d3,
+    0x35c5, 0x167e, 0x3582, 0x162a,
+    0x3540, 0x15d8, 0x34ff, 0x1589,
+    0x34bf, 0x153b, 0x347f, 0x14ef,
+    0x3441, 0x14a4, 0x3403, 0x145c,
+    0x33c7, 0x1415, 0x338b, 0x13d0,
+    0x3350, 0x138c, 0x3316, 0x134a,
+    0x32dc, 0x1309, 0x32a3, 0x12c9,
+    0x326b, 0x128b, 0x3234, 0x124f,
+    0x31fe, 0x1213, 0x31c8, 0x11d9,
+    0x3192, 0x11a0, 0x315e, 0x1168,
+    0x312a, 0x1131, 0x30f7, 0x10fc,
+    0x30c4, 0x10c7, 0x3092, 0x1094,
+    0x3061, 0x1061, 0x3030, 0x1030
+};
+     #endif
+#endif /* defined(ARM_MATH_MVEI) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31)
+/*
+ClearAll[tofix];
+tofix[q_][a_] := With[{r = Round[a*2^q]},
+   If[r > (2^q - 1), 2^q - 1, r]
+   ];
+
+(* For q = format, 2^nb is length of the table *)
+With[{q = 15, nb = 4, q12quarter = 16^^2000},
+  With[{shift = Echo[q - nb]},
+   Table[tofix[q][1.0/Sqrt[1.0*i/2^q]/8.0], {i, 2^(q - 2), 
+     2^q + q12quarter - 1, 2^shift}]]
+  ] // CopyToClipboard
+
+*/
+const q31_t sqrt_initial_lut_q31[32]={536870912, 506166750, 480191942, 457845052, 438353264, 421156193, \
+405836263, 392075079, 379625062, 368290407, 357913941, 348367849, \
+339546978, 331363921, 323745341, 316629190, 309962566, 303700050, \
+297802400, 292235509, 286969573, 281978417, 277238947, 272730696, \
+268435456, 264336964, 260420644, 256673389, 253083375, 249639903, \
+246333269, 243154642};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15)
+const q15_t sqrt_initial_lut_q15[16]={8192, 7327, 6689, 6193, 5793, 5461, 5181, 4940, 4730, 4544, 4379, \
+4230, 4096, 3974, 3862, 3759};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15) */
+
+
+#endif /* #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES) */
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+const float32_t exp_tab[8] = {
+    (1.f),
+    (0.0416598916054f),
+    (0.500000596046f),
+    (0.0014122662833f),
+    (1.00000011921f),
+    (0.00833693705499f),
+    (0.166665703058f),
+    (0.000195780929062f),
+};
+
+const float32_t __logf_lut_f32[8] = {
+    -2.295614848256274,         /*p0*/
+    -2.470711633419806,         /*p4*/
+    -5.686926051100417,         /*p2*/
+    -0.165253547131978,         /*p6*/
+    +5.175912446351073,         /*p1*/
+    +0.844006986174912,         /*p5*/
+    +4.584458825456749,         /*p3*/
+    +0.014127821926000          /*p7*/
+};
+
+#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+#if (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM))  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+/* haming weight LUT for bytes */
+#define B2(n) n, n + 1, n + 1, n + 2
+#define B4(n) B2(n) , B2(n + 1), B2(n + 1), B2(n + 2)
+#define B6(n) B4(n) , B4(n + 1), B4(n + 1), B4(n + 2)
+
+// Lookup table that store the reverse of each table 
+const unsigned char hwLUT[256] = { B6(0), B6(1), B6(1), B6(2) };
+
+#endif /* (defined(ARM_MATH_MVEI) || defined(ARM_MATH_HELIUM)) */
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables_f16.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables_f16.c
new file mode 100755
index 00000000..ef14c84b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_common_tables_f16.c
@@ -0,0 +1,12586 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_common_tables_f16.c
+ * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math_types_f16.h"
+/**
+  @ingroup ComplexFFT
+ */
+
+/**
+  @addtogroup CFFT_CIFFT Complex FFT Tables
+  @{
+ */
+
+
+/**
+  @brief  Floating-point Twiddle factors Table Generation
+*/
+
+/* F16 */
+#if !defined(__CC_ARM)
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include "arm_common_tables_f16.h"
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 16  and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_16[32] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_32)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 32  and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_32[64] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f
+};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 64  and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_64[128] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.098017140f,  (float16_t)0.995184727f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.290284677f,  (float16_t)0.956940336f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.471396737f,  (float16_t)0.881921264f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.634393284f,  (float16_t)0.773010453f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.773010453f,  (float16_t)0.634393284f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.881921264f,  (float16_t)0.471396737f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.956940336f,  (float16_t)0.290284677f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-0.995184727f,  (float16_t)0.098017140f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.995184727f, (float16_t)-0.098017140f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.956940336f, (float16_t)-0.290284677f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.881921264f, (float16_t)-0.471396737f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.773010453f, (float16_t)-0.634393284f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.634393284f, (float16_t)-0.773010453f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.471396737f, (float16_t)-0.881921264f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.290284677f, (float16_t)-0.956940336f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.098017140f, (float16_t)-0.995184727f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_128)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 128 and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+
+const float16_t twiddleCoefF16_128[256] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.049067674f,  (float16_t)0.998795456f,
+   (float16_t)-0.098017140f,  (float16_t)0.995184727f,
+   (float16_t)-0.146730474f,  (float16_t)0.989176510f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.242980180f,  (float16_t)0.970031253f,
+   (float16_t)-0.290284677f,  (float16_t)0.956940336f,
+   (float16_t)-0.336889853f,  (float16_t)0.941544065f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.427555093f,  (float16_t)0.903989293f,
+   (float16_t)-0.471396737f,  (float16_t)0.881921264f,
+   (float16_t)-0.514102744f,  (float16_t)0.857728610f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.595699304f,  (float16_t)0.803207531f,
+   (float16_t)-0.634393284f,  (float16_t)0.773010453f,
+   (float16_t)-0.671558955f,  (float16_t)0.740951125f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.740951125f,  (float16_t)0.671558955f,
+   (float16_t)-0.773010453f,  (float16_t)0.634393284f,
+   (float16_t)-0.803207531f,  (float16_t)0.595699304f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.857728610f,  (float16_t)0.514102744f,
+   (float16_t)-0.881921264f,  (float16_t)0.471396737f,
+   (float16_t)-0.903989293f,  (float16_t)0.427555093f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.941544065f,  (float16_t)0.336889853f,
+   (float16_t)-0.956940336f,  (float16_t)0.290284677f,
+   (float16_t)-0.970031253f,  (float16_t)0.242980180f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-0.989176510f,  (float16_t)0.146730474f,
+   (float16_t)-0.995184727f,  (float16_t)0.098017140f,
+   (float16_t)-0.998795456f,  (float16_t)0.049067674f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.998795456f, (float16_t)-0.049067674f,
+   (float16_t)-0.995184727f, (float16_t)-0.098017140f,
+   (float16_t)-0.989176510f, (float16_t)-0.146730474f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.970031253f, (float16_t)-0.242980180f,
+   (float16_t)-0.956940336f, (float16_t)-0.290284677f,
+   (float16_t)-0.941544065f, (float16_t)-0.336889853f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.903989293f, (float16_t)-0.427555093f,
+   (float16_t)-0.881921264f, (float16_t)-0.471396737f,
+   (float16_t)-0.857728610f, (float16_t)-0.514102744f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.803207531f, (float16_t)-0.595699304f,
+   (float16_t)-0.773010453f, (float16_t)-0.634393284f,
+   (float16_t)-0.740951125f, (float16_t)-0.671558955f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.671558955f, (float16_t)-0.740951125f,
+   (float16_t)-0.634393284f, (float16_t)-0.773010453f,
+   (float16_t)-0.595699304f, (float16_t)-0.803207531f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.514102744f, (float16_t)-0.857728610f,
+   (float16_t)-0.471396737f, (float16_t)-0.881921264f,
+   (float16_t)-0.427555093f, (float16_t)-0.903989293f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.336889853f, (float16_t)-0.941544065f,
+   (float16_t)-0.290284677f, (float16_t)-0.956940336f,
+   (float16_t)-0.242980180f, (float16_t)-0.970031253f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.146730474f, (float16_t)-0.989176510f,
+   (float16_t)-0.098017140f, (float16_t)-0.995184727f,
+   (float16_t)-0.049067674f, (float16_t)-0.998795456f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 256 and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_256[512] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.024541229f,  (float16_t)0.999698819f,
+   (float16_t)-0.049067674f,  (float16_t)0.998795456f,
+   (float16_t)-0.073564564f,  (float16_t)0.997290457f,
+   (float16_t)-0.098017140f,  (float16_t)0.995184727f,
+   (float16_t)-0.122410675f,  (float16_t)0.992479535f,
+   (float16_t)-0.146730474f,  (float16_t)0.989176510f,
+   (float16_t)-0.170961889f,  (float16_t)0.985277642f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.219101240f,  (float16_t)0.975702130f,
+   (float16_t)-0.242980180f,  (float16_t)0.970031253f,
+   (float16_t)-0.266712757f,  (float16_t)0.963776066f,
+   (float16_t)-0.290284677f,  (float16_t)0.956940336f,
+   (float16_t)-0.313681740f,  (float16_t)0.949528181f,
+   (float16_t)-0.336889853f,  (float16_t)0.941544065f,
+   (float16_t)-0.359895037f,  (float16_t)0.932992799f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.405241314f,  (float16_t)0.914209756f,
+   (float16_t)-0.427555093f,  (float16_t)0.903989293f,
+   (float16_t)-0.449611330f,  (float16_t)0.893224301f,
+   (float16_t)-0.471396737f,  (float16_t)0.881921264f,
+   (float16_t)-0.492898192f,  (float16_t)0.870086991f,
+   (float16_t)-0.514102744f,  (float16_t)0.857728610f,
+   (float16_t)-0.534997620f,  (float16_t)0.844853565f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.575808191f,  (float16_t)0.817584813f,
+   (float16_t)-0.595699304f,  (float16_t)0.803207531f,
+   (float16_t)-0.615231591f,  (float16_t)0.788346428f,
+   (float16_t)-0.634393284f,  (float16_t)0.773010453f,
+   (float16_t)-0.653172843f,  (float16_t)0.757208847f,
+   (float16_t)-0.671558955f,  (float16_t)0.740951125f,
+   (float16_t)-0.689540545f,  (float16_t)0.724247083f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.724247083f,  (float16_t)0.689540545f,
+   (float16_t)-0.740951125f,  (float16_t)0.671558955f,
+   (float16_t)-0.757208847f,  (float16_t)0.653172843f,
+   (float16_t)-0.773010453f,  (float16_t)0.634393284f,
+   (float16_t)-0.788346428f,  (float16_t)0.615231591f,
+   (float16_t)-0.803207531f,  (float16_t)0.595699304f,
+   (float16_t)-0.817584813f,  (float16_t)0.575808191f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.844853565f,  (float16_t)0.534997620f,
+   (float16_t)-0.857728610f,  (float16_t)0.514102744f,
+   (float16_t)-0.870086991f,  (float16_t)0.492898192f,
+   (float16_t)-0.881921264f,  (float16_t)0.471396737f,
+   (float16_t)-0.893224301f,  (float16_t)0.449611330f,
+   (float16_t)-0.903989293f,  (float16_t)0.427555093f,
+   (float16_t)-0.914209756f,  (float16_t)0.405241314f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.932992799f,  (float16_t)0.359895037f,
+   (float16_t)-0.941544065f,  (float16_t)0.336889853f,
+   (float16_t)-0.949528181f,  (float16_t)0.313681740f,
+   (float16_t)-0.956940336f,  (float16_t)0.290284677f,
+   (float16_t)-0.963776066f,  (float16_t)0.266712757f,
+   (float16_t)-0.970031253f,  (float16_t)0.242980180f,
+   (float16_t)-0.975702130f,  (float16_t)0.219101240f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-0.985277642f,  (float16_t)0.170961889f,
+   (float16_t)-0.989176510f,  (float16_t)0.146730474f,
+   (float16_t)-0.992479535f,  (float16_t)0.122410675f,
+   (float16_t)-0.995184727f,  (float16_t)0.098017140f,
+   (float16_t)-0.997290457f,  (float16_t)0.073564564f,
+   (float16_t)-0.998795456f,  (float16_t)0.049067674f,
+   (float16_t)-0.999698819f,  (float16_t)0.024541229f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.999698819f, (float16_t)-0.024541229f,
+   (float16_t)-0.998795456f, (float16_t)-0.049067674f,
+   (float16_t)-0.997290457f, (float16_t)-0.073564564f,
+   (float16_t)-0.995184727f, (float16_t)-0.098017140f,
+   (float16_t)-0.992479535f, (float16_t)-0.122410675f,
+   (float16_t)-0.989176510f, (float16_t)-0.146730474f,
+   (float16_t)-0.985277642f, (float16_t)-0.170961889f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.975702130f, (float16_t)-0.219101240f,
+   (float16_t)-0.970031253f, (float16_t)-0.242980180f,
+   (float16_t)-0.963776066f, (float16_t)-0.266712757f,
+   (float16_t)-0.956940336f, (float16_t)-0.290284677f,
+   (float16_t)-0.949528181f, (float16_t)-0.313681740f,
+   (float16_t)-0.941544065f, (float16_t)-0.336889853f,
+   (float16_t)-0.932992799f, (float16_t)-0.359895037f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.914209756f, (float16_t)-0.405241314f,
+   (float16_t)-0.903989293f, (float16_t)-0.427555093f,
+   (float16_t)-0.893224301f, (float16_t)-0.449611330f,
+   (float16_t)-0.881921264f, (float16_t)-0.471396737f,
+   (float16_t)-0.870086991f, (float16_t)-0.492898192f,
+   (float16_t)-0.857728610f, (float16_t)-0.514102744f,
+   (float16_t)-0.844853565f, (float16_t)-0.534997620f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.817584813f, (float16_t)-0.575808191f,
+   (float16_t)-0.803207531f, (float16_t)-0.595699304f,
+   (float16_t)-0.788346428f, (float16_t)-0.615231591f,
+   (float16_t)-0.773010453f, (float16_t)-0.634393284f,
+   (float16_t)-0.757208847f, (float16_t)-0.653172843f,
+   (float16_t)-0.740951125f, (float16_t)-0.671558955f,
+   (float16_t)-0.724247083f, (float16_t)-0.689540545f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.689540545f, (float16_t)-0.724247083f,
+   (float16_t)-0.671558955f, (float16_t)-0.740951125f,
+   (float16_t)-0.653172843f, (float16_t)-0.757208847f,
+   (float16_t)-0.634393284f, (float16_t)-0.773010453f,
+   (float16_t)-0.615231591f, (float16_t)-0.788346428f,
+   (float16_t)-0.595699304f, (float16_t)-0.803207531f,
+   (float16_t)-0.575808191f, (float16_t)-0.817584813f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.534997620f, (float16_t)-0.844853565f,
+   (float16_t)-0.514102744f, (float16_t)-0.857728610f,
+   (float16_t)-0.492898192f, (float16_t)-0.870086991f,
+   (float16_t)-0.471396737f, (float16_t)-0.881921264f,
+   (float16_t)-0.449611330f, (float16_t)-0.893224301f,
+   (float16_t)-0.427555093f, (float16_t)-0.903989293f,
+   (float16_t)-0.405241314f, (float16_t)-0.914209756f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.359895037f, (float16_t)-0.932992799f,
+   (float16_t)-0.336889853f, (float16_t)-0.941544065f,
+   (float16_t)-0.313681740f, (float16_t)-0.949528181f,
+   (float16_t)-0.290284677f, (float16_t)-0.956940336f,
+   (float16_t)-0.266712757f, (float16_t)-0.963776066f,
+   (float16_t)-0.242980180f, (float16_t)-0.970031253f,
+   (float16_t)-0.219101240f, (float16_t)-0.975702130f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.170961889f, (float16_t)-0.985277642f,
+   (float16_t)-0.146730474f, (float16_t)-0.989176510f,
+   (float16_t)-0.122410675f, (float16_t)-0.992479535f,
+   (float16_t)-0.098017140f, (float16_t)-0.995184727f,
+   (float16_t)-0.073564564f, (float16_t)-0.997290457f,
+   (float16_t)-0.049067674f, (float16_t)-0.998795456f,
+   (float16_t)-0.024541229f, (float16_t)-0.999698819f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_512)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 512 and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_512[1024] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.012271538f,  (float16_t)0.999924702f,
+   (float16_t)-0.024541229f,  (float16_t)0.999698819f,
+   (float16_t)-0.036807223f,  (float16_t)0.999322385f,
+   (float16_t)-0.049067674f,  (float16_t)0.998795456f,
+   (float16_t)-0.061320736f,  (float16_t)0.998118113f,
+   (float16_t)-0.073564564f,  (float16_t)0.997290457f,
+   (float16_t)-0.085797312f,  (float16_t)0.996312612f,
+   (float16_t)-0.098017140f,  (float16_t)0.995184727f,
+   (float16_t)-0.110222207f,  (float16_t)0.993906970f,
+   (float16_t)-0.122410675f,  (float16_t)0.992479535f,
+   (float16_t)-0.134580709f,  (float16_t)0.990902635f,
+   (float16_t)-0.146730474f,  (float16_t)0.989176510f,
+   (float16_t)-0.158858143f,  (float16_t)0.987301418f,
+   (float16_t)-0.170961889f,  (float16_t)0.985277642f,
+   (float16_t)-0.183039888f,  (float16_t)0.983105487f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.207111376f,  (float16_t)0.978317371f,
+   (float16_t)-0.219101240f,  (float16_t)0.975702130f,
+   (float16_t)-0.231058108f,  (float16_t)0.972939952f,
+   (float16_t)-0.242980180f,  (float16_t)0.970031253f,
+   (float16_t)-0.254865660f,  (float16_t)0.966976471f,
+   (float16_t)-0.266712757f,  (float16_t)0.963776066f,
+   (float16_t)-0.278519689f,  (float16_t)0.960430519f,
+   (float16_t)-0.290284677f,  (float16_t)0.956940336f,
+   (float16_t)-0.302005949f,  (float16_t)0.953306040f,
+   (float16_t)-0.313681740f,  (float16_t)0.949528181f,
+   (float16_t)-0.325310292f,  (float16_t)0.945607325f,
+   (float16_t)-0.336889853f,  (float16_t)0.941544065f,
+   (float16_t)-0.348418680f,  (float16_t)0.937339012f,
+   (float16_t)-0.359895037f,  (float16_t)0.932992799f,
+   (float16_t)-0.371317194f,  (float16_t)0.928506080f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.393992040f,  (float16_t)0.919113852f,
+   (float16_t)-0.405241314f,  (float16_t)0.914209756f,
+   (float16_t)-0.416429560f,  (float16_t)0.909167983f,
+   (float16_t)-0.427555093f,  (float16_t)0.903989293f,
+   (float16_t)-0.438616239f,  (float16_t)0.898674466f,
+   (float16_t)-0.449611330f,  (float16_t)0.893224301f,
+   (float16_t)-0.460538711f,  (float16_t)0.887639620f,
+   (float16_t)-0.471396737f,  (float16_t)0.881921264f,
+   (float16_t)-0.482183772f,  (float16_t)0.876070094f,
+   (float16_t)-0.492898192f,  (float16_t)0.870086991f,
+   (float16_t)-0.503538384f,  (float16_t)0.863972856f,
+   (float16_t)-0.514102744f,  (float16_t)0.857728610f,
+   (float16_t)-0.524589683f,  (float16_t)0.851355193f,
+   (float16_t)-0.534997620f,  (float16_t)0.844853565f,
+   (float16_t)-0.545324988f,  (float16_t)0.838224706f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.565731811f,  (float16_t)0.824589303f,
+   (float16_t)-0.575808191f,  (float16_t)0.817584813f,
+   (float16_t)-0.585797857f,  (float16_t)0.810457198f,
+   (float16_t)-0.595699304f,  (float16_t)0.803207531f,
+   (float16_t)-0.605511041f,  (float16_t)0.795836905f,
+   (float16_t)-0.615231591f,  (float16_t)0.788346428f,
+   (float16_t)-0.624859488f,  (float16_t)0.780737229f,
+   (float16_t)-0.634393284f,  (float16_t)0.773010453f,
+   (float16_t)-0.643831543f,  (float16_t)0.765167266f,
+   (float16_t)-0.653172843f,  (float16_t)0.757208847f,
+   (float16_t)-0.662415778f,  (float16_t)0.749136395f,
+   (float16_t)-0.671558955f,  (float16_t)0.740951125f,
+   (float16_t)-0.680600998f,  (float16_t)0.732654272f,
+   (float16_t)-0.689540545f,  (float16_t)0.724247083f,
+   (float16_t)-0.698376249f,  (float16_t)0.715730825f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.715730825f,  (float16_t)0.698376249f,
+   (float16_t)-0.724247083f,  (float16_t)0.689540545f,
+   (float16_t)-0.732654272f,  (float16_t)0.680600998f,
+   (float16_t)-0.740951125f,  (float16_t)0.671558955f,
+   (float16_t)-0.749136395f,  (float16_t)0.662415778f,
+   (float16_t)-0.757208847f,  (float16_t)0.653172843f,
+   (float16_t)-0.765167266f,  (float16_t)0.643831543f,
+   (float16_t)-0.773010453f,  (float16_t)0.634393284f,
+   (float16_t)-0.780737229f,  (float16_t)0.624859488f,
+   (float16_t)-0.788346428f,  (float16_t)0.615231591f,
+   (float16_t)-0.795836905f,  (float16_t)0.605511041f,
+   (float16_t)-0.803207531f,  (float16_t)0.595699304f,
+   (float16_t)-0.810457198f,  (float16_t)0.585797857f,
+   (float16_t)-0.817584813f,  (float16_t)0.575808191f,
+   (float16_t)-0.824589303f,  (float16_t)0.565731811f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.838224706f,  (float16_t)0.545324988f,
+   (float16_t)-0.844853565f,  (float16_t)0.534997620f,
+   (float16_t)-0.851355193f,  (float16_t)0.524589683f,
+   (float16_t)-0.857728610f,  (float16_t)0.514102744f,
+   (float16_t)-0.863972856f,  (float16_t)0.503538384f,
+   (float16_t)-0.870086991f,  (float16_t)0.492898192f,
+   (float16_t)-0.876070094f,  (float16_t)0.482183772f,
+   (float16_t)-0.881921264f,  (float16_t)0.471396737f,
+   (float16_t)-0.887639620f,  (float16_t)0.460538711f,
+   (float16_t)-0.893224301f,  (float16_t)0.449611330f,
+   (float16_t)-0.898674466f,  (float16_t)0.438616239f,
+   (float16_t)-0.903989293f,  (float16_t)0.427555093f,
+   (float16_t)-0.909167983f,  (float16_t)0.416429560f,
+   (float16_t)-0.914209756f,  (float16_t)0.405241314f,
+   (float16_t)-0.919113852f,  (float16_t)0.393992040f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.928506080f,  (float16_t)0.371317194f,
+   (float16_t)-0.932992799f,  (float16_t)0.359895037f,
+   (float16_t)-0.937339012f,  (float16_t)0.348418680f,
+   (float16_t)-0.941544065f,  (float16_t)0.336889853f,
+   (float16_t)-0.945607325f,  (float16_t)0.325310292f,
+   (float16_t)-0.949528181f,  (float16_t)0.313681740f,
+   (float16_t)-0.953306040f,  (float16_t)0.302005949f,
+   (float16_t)-0.956940336f,  (float16_t)0.290284677f,
+   (float16_t)-0.960430519f,  (float16_t)0.278519689f,
+   (float16_t)-0.963776066f,  (float16_t)0.266712757f,
+   (float16_t)-0.966976471f,  (float16_t)0.254865660f,
+   (float16_t)-0.970031253f,  (float16_t)0.242980180f,
+   (float16_t)-0.972939952f,  (float16_t)0.231058108f,
+   (float16_t)-0.975702130f,  (float16_t)0.219101240f,
+   (float16_t)-0.978317371f,  (float16_t)0.207111376f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-0.983105487f,  (float16_t)0.183039888f,
+   (float16_t)-0.985277642f,  (float16_t)0.170961889f,
+   (float16_t)-0.987301418f,  (float16_t)0.158858143f,
+   (float16_t)-0.989176510f,  (float16_t)0.146730474f,
+   (float16_t)-0.990902635f,  (float16_t)0.134580709f,
+   (float16_t)-0.992479535f,  (float16_t)0.122410675f,
+   (float16_t)-0.993906970f,  (float16_t)0.110222207f,
+   (float16_t)-0.995184727f,  (float16_t)0.098017140f,
+   (float16_t)-0.996312612f,  (float16_t)0.085797312f,
+   (float16_t)-0.997290457f,  (float16_t)0.073564564f,
+   (float16_t)-0.998118113f,  (float16_t)0.061320736f,
+   (float16_t)-0.998795456f,  (float16_t)0.049067674f,
+   (float16_t)-0.999322385f,  (float16_t)0.036807223f,
+   (float16_t)-0.999698819f,  (float16_t)0.024541229f,
+   (float16_t)-0.999924702f,  (float16_t)0.012271538f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.999924702f, (float16_t)-0.012271538f,
+   (float16_t)-0.999698819f, (float16_t)-0.024541229f,
+   (float16_t)-0.999322385f, (float16_t)-0.036807223f,
+   (float16_t)-0.998795456f, (float16_t)-0.049067674f,
+   (float16_t)-0.998118113f, (float16_t)-0.061320736f,
+   (float16_t)-0.997290457f, (float16_t)-0.073564564f,
+   (float16_t)-0.996312612f, (float16_t)-0.085797312f,
+   (float16_t)-0.995184727f, (float16_t)-0.098017140f,
+   (float16_t)-0.993906970f, (float16_t)-0.110222207f,
+   (float16_t)-0.992479535f, (float16_t)-0.122410675f,
+   (float16_t)-0.990902635f, (float16_t)-0.134580709f,
+   (float16_t)-0.989176510f, (float16_t)-0.146730474f,
+   (float16_t)-0.987301418f, (float16_t)-0.158858143f,
+   (float16_t)-0.985277642f, (float16_t)-0.170961889f,
+   (float16_t)-0.983105487f, (float16_t)-0.183039888f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.978317371f, (float16_t)-0.207111376f,
+   (float16_t)-0.975702130f, (float16_t)-0.219101240f,
+   (float16_t)-0.972939952f, (float16_t)-0.231058108f,
+   (float16_t)-0.970031253f, (float16_t)-0.242980180f,
+   (float16_t)-0.966976471f, (float16_t)-0.254865660f,
+   (float16_t)-0.963776066f, (float16_t)-0.266712757f,
+   (float16_t)-0.960430519f, (float16_t)-0.278519689f,
+   (float16_t)-0.956940336f, (float16_t)-0.290284677f,
+   (float16_t)-0.953306040f, (float16_t)-0.302005949f,
+   (float16_t)-0.949528181f, (float16_t)-0.313681740f,
+   (float16_t)-0.945607325f, (float16_t)-0.325310292f,
+   (float16_t)-0.941544065f, (float16_t)-0.336889853f,
+   (float16_t)-0.937339012f, (float16_t)-0.348418680f,
+   (float16_t)-0.932992799f, (float16_t)-0.359895037f,
+   (float16_t)-0.928506080f, (float16_t)-0.371317194f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.919113852f, (float16_t)-0.393992040f,
+   (float16_t)-0.914209756f, (float16_t)-0.405241314f,
+   (float16_t)-0.909167983f, (float16_t)-0.416429560f,
+   (float16_t)-0.903989293f, (float16_t)-0.427555093f,
+   (float16_t)-0.898674466f, (float16_t)-0.438616239f,
+   (float16_t)-0.893224301f, (float16_t)-0.449611330f,
+   (float16_t)-0.887639620f, (float16_t)-0.460538711f,
+   (float16_t)-0.881921264f, (float16_t)-0.471396737f,
+   (float16_t)-0.876070094f, (float16_t)-0.482183772f,
+   (float16_t)-0.870086991f, (float16_t)-0.492898192f,
+   (float16_t)-0.863972856f, (float16_t)-0.503538384f,
+   (float16_t)-0.857728610f, (float16_t)-0.514102744f,
+   (float16_t)-0.851355193f, (float16_t)-0.524589683f,
+   (float16_t)-0.844853565f, (float16_t)-0.534997620f,
+   (float16_t)-0.838224706f, (float16_t)-0.545324988f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.824589303f, (float16_t)-0.565731811f,
+   (float16_t)-0.817584813f, (float16_t)-0.575808191f,
+   (float16_t)-0.810457198f, (float16_t)-0.585797857f,
+   (float16_t)-0.803207531f, (float16_t)-0.595699304f,
+   (float16_t)-0.795836905f, (float16_t)-0.605511041f,
+   (float16_t)-0.788346428f, (float16_t)-0.615231591f,
+   (float16_t)-0.780737229f, (float16_t)-0.624859488f,
+   (float16_t)-0.773010453f, (float16_t)-0.634393284f,
+   (float16_t)-0.765167266f, (float16_t)-0.643831543f,
+   (float16_t)-0.757208847f, (float16_t)-0.653172843f,
+   (float16_t)-0.749136395f, (float16_t)-0.662415778f,
+   (float16_t)-0.740951125f, (float16_t)-0.671558955f,
+   (float16_t)-0.732654272f, (float16_t)-0.680600998f,
+   (float16_t)-0.724247083f, (float16_t)-0.689540545f,
+   (float16_t)-0.715730825f, (float16_t)-0.698376249f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.698376249f, (float16_t)-0.715730825f,
+   (float16_t)-0.689540545f, (float16_t)-0.724247083f,
+   (float16_t)-0.680600998f, (float16_t)-0.732654272f,
+   (float16_t)-0.671558955f, (float16_t)-0.740951125f,
+   (float16_t)-0.662415778f, (float16_t)-0.749136395f,
+   (float16_t)-0.653172843f, (float16_t)-0.757208847f,
+   (float16_t)-0.643831543f, (float16_t)-0.765167266f,
+   (float16_t)-0.634393284f, (float16_t)-0.773010453f,
+   (float16_t)-0.624859488f, (float16_t)-0.780737229f,
+   (float16_t)-0.615231591f, (float16_t)-0.788346428f,
+   (float16_t)-0.605511041f, (float16_t)-0.795836905f,
+   (float16_t)-0.595699304f, (float16_t)-0.803207531f,
+   (float16_t)-0.585797857f, (float16_t)-0.810457198f,
+   (float16_t)-0.575808191f, (float16_t)-0.817584813f,
+   (float16_t)-0.565731811f, (float16_t)-0.824589303f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.545324988f, (float16_t)-0.838224706f,
+   (float16_t)-0.534997620f, (float16_t)-0.844853565f,
+   (float16_t)-0.524589683f, (float16_t)-0.851355193f,
+   (float16_t)-0.514102744f, (float16_t)-0.857728610f,
+   (float16_t)-0.503538384f, (float16_t)-0.863972856f,
+   (float16_t)-0.492898192f, (float16_t)-0.870086991f,
+   (float16_t)-0.482183772f, (float16_t)-0.876070094f,
+   (float16_t)-0.471396737f, (float16_t)-0.881921264f,
+   (float16_t)-0.460538711f, (float16_t)-0.887639620f,
+   (float16_t)-0.449611330f, (float16_t)-0.893224301f,
+   (float16_t)-0.438616239f, (float16_t)-0.898674466f,
+   (float16_t)-0.427555093f, (float16_t)-0.903989293f,
+   (float16_t)-0.416429560f, (float16_t)-0.909167983f,
+   (float16_t)-0.405241314f, (float16_t)-0.914209756f,
+   (float16_t)-0.393992040f, (float16_t)-0.919113852f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.371317194f, (float16_t)-0.928506080f,
+   (float16_t)-0.359895037f, (float16_t)-0.932992799f,
+   (float16_t)-0.348418680f, (float16_t)-0.937339012f,
+   (float16_t)-0.336889853f, (float16_t)-0.941544065f,
+   (float16_t)-0.325310292f, (float16_t)-0.945607325f,
+   (float16_t)-0.313681740f, (float16_t)-0.949528181f,
+   (float16_t)-0.302005949f, (float16_t)-0.953306040f,
+   (float16_t)-0.290284677f, (float16_t)-0.956940336f,
+   (float16_t)-0.278519689f, (float16_t)-0.960430519f,
+   (float16_t)-0.266712757f, (float16_t)-0.963776066f,
+   (float16_t)-0.254865660f, (float16_t)-0.966976471f,
+   (float16_t)-0.242980180f, (float16_t)-0.970031253f,
+   (float16_t)-0.231058108f, (float16_t)-0.972939952f,
+   (float16_t)-0.219101240f, (float16_t)-0.975702130f,
+   (float16_t)-0.207111376f, (float16_t)-0.978317371f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.183039888f, (float16_t)-0.983105487f,
+   (float16_t)-0.170961889f, (float16_t)-0.985277642f,
+   (float16_t)-0.158858143f, (float16_t)-0.987301418f,
+   (float16_t)-0.146730474f, (float16_t)-0.989176510f,
+   (float16_t)-0.134580709f, (float16_t)-0.990902635f,
+   (float16_t)-0.122410675f, (float16_t)-0.992479535f,
+   (float16_t)-0.110222207f, (float16_t)-0.993906970f,
+   (float16_t)-0.098017140f, (float16_t)-0.995184727f,
+   (float16_t)-0.085797312f, (float16_t)-0.996312612f,
+   (float16_t)-0.073564564f, (float16_t)-0.997290457f,
+   (float16_t)-0.061320736f, (float16_t)-0.998118113f,
+   (float16_t)-0.049067674f, (float16_t)-0.998795456f,
+   (float16_t)-0.036807223f, (float16_t)-0.999322385f,
+   (float16_t)-0.024541229f, (float16_t)-0.999698819f,
+   (float16_t)-0.012271538f, (float16_t)-0.999924702f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f
+};
+
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 1024  and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_1024[2048] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999981175f,  (float16_t)0.006135885f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)0.999830582f,  (float16_t)0.018406730f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999529418f,  (float16_t)0.030674803f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.999077728f,  (float16_t)0.042938257f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.998475581f,  (float16_t)0.055195244f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.997723067f,  (float16_t)0.067443920f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.996820299f,  (float16_t)0.079682438f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.995767414f,  (float16_t)0.091908956f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.994564571f,  (float16_t)0.104121634f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.993211949f,  (float16_t)0.116318631f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.991709754f,  (float16_t)0.128498111f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.990058210f,  (float16_t)0.140658239f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.988257568f,  (float16_t)0.152797185f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.986308097f,  (float16_t)0.164913120f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.984210092f,  (float16_t)0.177004220f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.981963869f,  (float16_t)0.189068664f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.979569766f,  (float16_t)0.201104635f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.977028143f,  (float16_t)0.213110320f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.974339383f,  (float16_t)0.225083911f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.971503891f,  (float16_t)0.237023606f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.968522094f,  (float16_t)0.248927606f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.965394442f,  (float16_t)0.260794118f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.962121404f,  (float16_t)0.272621355f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.958703475f,  (float16_t)0.284407537f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.955141168f,  (float16_t)0.296150888f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.951435021f,  (float16_t)0.307849640f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.947585591f,  (float16_t)0.319502031f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.943593458f,  (float16_t)0.331106306f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.939459224f,  (float16_t)0.342660717f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.935183510f,  (float16_t)0.354163525f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.930766961f,  (float16_t)0.365612998f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.926210242f,  (float16_t)0.377007410f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.921514039f,  (float16_t)0.388345047f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.916679060f,  (float16_t)0.399624200f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.911706032f,  (float16_t)0.410843171f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.906595705f,  (float16_t)0.422000271f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.901348847f,  (float16_t)0.433093819f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.895966250f,  (float16_t)0.444122145f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.890448723f,  (float16_t)0.455083587f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.884797098f,  (float16_t)0.465976496f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.879012226f,  (float16_t)0.476799230f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.873094978f,  (float16_t)0.487550160f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.867046246f,  (float16_t)0.498227667f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.860866939f,  (float16_t)0.508830143f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.854557988f,  (float16_t)0.519355990f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.848120345f,  (float16_t)0.529803625f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.841554977f,  (float16_t)0.540171473f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.834862875f,  (float16_t)0.550457973f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.828045045f,  (float16_t)0.560661576f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.821102515f,  (float16_t)0.570780746f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.814036330f,  (float16_t)0.580813958f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.806847554f,  (float16_t)0.590759702f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.799537269f,  (float16_t)0.600616479f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.792106577f,  (float16_t)0.610382806f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.784556597f,  (float16_t)0.620057212f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.776888466f,  (float16_t)0.629638239f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.769103338f,  (float16_t)0.639124445f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.761202385f,  (float16_t)0.648514401f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.753186799f,  (float16_t)0.657806693f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.745057785f,  (float16_t)0.666999922f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.736816569f,  (float16_t)0.676092704f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.728464390f,  (float16_t)0.685083668f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.720002508f,  (float16_t)0.693971461f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.711432196f,  (float16_t)0.702754744f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.702754744f,  (float16_t)0.711432196f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.693971461f,  (float16_t)0.720002508f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.685083668f,  (float16_t)0.728464390f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.676092704f,  (float16_t)0.736816569f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.666999922f,  (float16_t)0.745057785f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.657806693f,  (float16_t)0.753186799f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.648514401f,  (float16_t)0.761202385f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.639124445f,  (float16_t)0.769103338f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.629638239f,  (float16_t)0.776888466f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.620057212f,  (float16_t)0.784556597f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.610382806f,  (float16_t)0.792106577f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.600616479f,  (float16_t)0.799537269f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.590759702f,  (float16_t)0.806847554f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.580813958f,  (float16_t)0.814036330f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.570780746f,  (float16_t)0.821102515f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.560661576f,  (float16_t)0.828045045f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.550457973f,  (float16_t)0.834862875f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.540171473f,  (float16_t)0.841554977f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.529803625f,  (float16_t)0.848120345f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.519355990f,  (float16_t)0.854557988f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.508830143f,  (float16_t)0.860866939f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.498227667f,  (float16_t)0.867046246f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.487550160f,  (float16_t)0.873094978f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.476799230f,  (float16_t)0.879012226f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.465976496f,  (float16_t)0.884797098f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.455083587f,  (float16_t)0.890448723f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.444122145f,  (float16_t)0.895966250f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.433093819f,  (float16_t)0.901348847f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.422000271f,  (float16_t)0.906595705f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.410843171f,  (float16_t)0.911706032f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.399624200f,  (float16_t)0.916679060f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.388345047f,  (float16_t)0.921514039f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.377007410f,  (float16_t)0.926210242f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.365612998f,  (float16_t)0.930766961f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.354163525f,  (float16_t)0.935183510f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.342660717f,  (float16_t)0.939459224f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.331106306f,  (float16_t)0.943593458f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.319502031f,  (float16_t)0.947585591f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.307849640f,  (float16_t)0.951435021f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.296150888f,  (float16_t)0.955141168f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.284407537f,  (float16_t)0.958703475f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.272621355f,  (float16_t)0.962121404f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.260794118f,  (float16_t)0.965394442f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.248927606f,  (float16_t)0.968522094f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.237023606f,  (float16_t)0.971503891f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.225083911f,  (float16_t)0.974339383f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.213110320f,  (float16_t)0.977028143f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.201104635f,  (float16_t)0.979569766f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.189068664f,  (float16_t)0.981963869f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.177004220f,  (float16_t)0.984210092f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.164913120f,  (float16_t)0.986308097f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.152797185f,  (float16_t)0.988257568f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.140658239f,  (float16_t)0.990058210f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.128498111f,  (float16_t)0.991709754f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.116318631f,  (float16_t)0.993211949f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.104121634f,  (float16_t)0.994564571f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.091908956f,  (float16_t)0.995767414f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.079682438f,  (float16_t)0.996820299f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.067443920f,  (float16_t)0.997723067f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.055195244f,  (float16_t)0.998475581f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.042938257f,  (float16_t)0.999077728f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.030674803f,  (float16_t)0.999529418f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.018406730f,  (float16_t)0.999830582f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.006135885f,  (float16_t)0.999981175f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.006135885f,  (float16_t)0.999981175f,
+   (float16_t)-0.012271538f,  (float16_t)0.999924702f,
+   (float16_t)-0.018406730f,  (float16_t)0.999830582f,
+   (float16_t)-0.024541229f,  (float16_t)0.999698819f,
+   (float16_t)-0.030674803f,  (float16_t)0.999529418f,
+   (float16_t)-0.036807223f,  (float16_t)0.999322385f,
+   (float16_t)-0.042938257f,  (float16_t)0.999077728f,
+   (float16_t)-0.049067674f,  (float16_t)0.998795456f,
+   (float16_t)-0.055195244f,  (float16_t)0.998475581f,
+   (float16_t)-0.061320736f,  (float16_t)0.998118113f,
+   (float16_t)-0.067443920f,  (float16_t)0.997723067f,
+   (float16_t)-0.073564564f,  (float16_t)0.997290457f,
+   (float16_t)-0.079682438f,  (float16_t)0.996820299f,
+   (float16_t)-0.085797312f,  (float16_t)0.996312612f,
+   (float16_t)-0.091908956f,  (float16_t)0.995767414f,
+   (float16_t)-0.098017140f,  (float16_t)0.995184727f,
+   (float16_t)-0.104121634f,  (float16_t)0.994564571f,
+   (float16_t)-0.110222207f,  (float16_t)0.993906970f,
+   (float16_t)-0.116318631f,  (float16_t)0.993211949f,
+   (float16_t)-0.122410675f,  (float16_t)0.992479535f,
+   (float16_t)-0.128498111f,  (float16_t)0.991709754f,
+   (float16_t)-0.134580709f,  (float16_t)0.990902635f,
+   (float16_t)-0.140658239f,  (float16_t)0.990058210f,
+   (float16_t)-0.146730474f,  (float16_t)0.989176510f,
+   (float16_t)-0.152797185f,  (float16_t)0.988257568f,
+   (float16_t)-0.158858143f,  (float16_t)0.987301418f,
+   (float16_t)-0.164913120f,  (float16_t)0.986308097f,
+   (float16_t)-0.170961889f,  (float16_t)0.985277642f,
+   (float16_t)-0.177004220f,  (float16_t)0.984210092f,
+   (float16_t)-0.183039888f,  (float16_t)0.983105487f,
+   (float16_t)-0.189068664f,  (float16_t)0.981963869f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.201104635f,  (float16_t)0.979569766f,
+   (float16_t)-0.207111376f,  (float16_t)0.978317371f,
+   (float16_t)-0.213110320f,  (float16_t)0.977028143f,
+   (float16_t)-0.219101240f,  (float16_t)0.975702130f,
+   (float16_t)-0.225083911f,  (float16_t)0.974339383f,
+   (float16_t)-0.231058108f,  (float16_t)0.972939952f,
+   (float16_t)-0.237023606f,  (float16_t)0.971503891f,
+   (float16_t)-0.242980180f,  (float16_t)0.970031253f,
+   (float16_t)-0.248927606f,  (float16_t)0.968522094f,
+   (float16_t)-0.254865660f,  (float16_t)0.966976471f,
+   (float16_t)-0.260794118f,  (float16_t)0.965394442f,
+   (float16_t)-0.266712757f,  (float16_t)0.963776066f,
+   (float16_t)-0.272621355f,  (float16_t)0.962121404f,
+   (float16_t)-0.278519689f,  (float16_t)0.960430519f,
+   (float16_t)-0.284407537f,  (float16_t)0.958703475f,
+   (float16_t)-0.290284677f,  (float16_t)0.956940336f,
+   (float16_t)-0.296150888f,  (float16_t)0.955141168f,
+   (float16_t)-0.302005949f,  (float16_t)0.953306040f,
+   (float16_t)-0.307849640f,  (float16_t)0.951435021f,
+   (float16_t)-0.313681740f,  (float16_t)0.949528181f,
+   (float16_t)-0.319502031f,  (float16_t)0.947585591f,
+   (float16_t)-0.325310292f,  (float16_t)0.945607325f,
+   (float16_t)-0.331106306f,  (float16_t)0.943593458f,
+   (float16_t)-0.336889853f,  (float16_t)0.941544065f,
+   (float16_t)-0.342660717f,  (float16_t)0.939459224f,
+   (float16_t)-0.348418680f,  (float16_t)0.937339012f,
+   (float16_t)-0.354163525f,  (float16_t)0.935183510f,
+   (float16_t)-0.359895037f,  (float16_t)0.932992799f,
+   (float16_t)-0.365612998f,  (float16_t)0.930766961f,
+   (float16_t)-0.371317194f,  (float16_t)0.928506080f,
+   (float16_t)-0.377007410f,  (float16_t)0.926210242f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.388345047f,  (float16_t)0.921514039f,
+   (float16_t)-0.393992040f,  (float16_t)0.919113852f,
+   (float16_t)-0.399624200f,  (float16_t)0.916679060f,
+   (float16_t)-0.405241314f,  (float16_t)0.914209756f,
+   (float16_t)-0.410843171f,  (float16_t)0.911706032f,
+   (float16_t)-0.416429560f,  (float16_t)0.909167983f,
+   (float16_t)-0.422000271f,  (float16_t)0.906595705f,
+   (float16_t)-0.427555093f,  (float16_t)0.903989293f,
+   (float16_t)-0.433093819f,  (float16_t)0.901348847f,
+   (float16_t)-0.438616239f,  (float16_t)0.898674466f,
+   (float16_t)-0.444122145f,  (float16_t)0.895966250f,
+   (float16_t)-0.449611330f,  (float16_t)0.893224301f,
+   (float16_t)-0.455083587f,  (float16_t)0.890448723f,
+   (float16_t)-0.460538711f,  (float16_t)0.887639620f,
+   (float16_t)-0.465976496f,  (float16_t)0.884797098f,
+   (float16_t)-0.471396737f,  (float16_t)0.881921264f,
+   (float16_t)-0.476799230f,  (float16_t)0.879012226f,
+   (float16_t)-0.482183772f,  (float16_t)0.876070094f,
+   (float16_t)-0.487550160f,  (float16_t)0.873094978f,
+   (float16_t)-0.492898192f,  (float16_t)0.870086991f,
+   (float16_t)-0.498227667f,  (float16_t)0.867046246f,
+   (float16_t)-0.503538384f,  (float16_t)0.863972856f,
+   (float16_t)-0.508830143f,  (float16_t)0.860866939f,
+   (float16_t)-0.514102744f,  (float16_t)0.857728610f,
+   (float16_t)-0.519355990f,  (float16_t)0.854557988f,
+   (float16_t)-0.524589683f,  (float16_t)0.851355193f,
+   (float16_t)-0.529803625f,  (float16_t)0.848120345f,
+   (float16_t)-0.534997620f,  (float16_t)0.844853565f,
+   (float16_t)-0.540171473f,  (float16_t)0.841554977f,
+   (float16_t)-0.545324988f,  (float16_t)0.838224706f,
+   (float16_t)-0.550457973f,  (float16_t)0.834862875f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.560661576f,  (float16_t)0.828045045f,
+   (float16_t)-0.565731811f,  (float16_t)0.824589303f,
+   (float16_t)-0.570780746f,  (float16_t)0.821102515f,
+   (float16_t)-0.575808191f,  (float16_t)0.817584813f,
+   (float16_t)-0.580813958f,  (float16_t)0.814036330f,
+   (float16_t)-0.585797857f,  (float16_t)0.810457198f,
+   (float16_t)-0.590759702f,  (float16_t)0.806847554f,
+   (float16_t)-0.595699304f,  (float16_t)0.803207531f,
+   (float16_t)-0.600616479f,  (float16_t)0.799537269f,
+   (float16_t)-0.605511041f,  (float16_t)0.795836905f,
+   (float16_t)-0.610382806f,  (float16_t)0.792106577f,
+   (float16_t)-0.615231591f,  (float16_t)0.788346428f,
+   (float16_t)-0.620057212f,  (float16_t)0.784556597f,
+   (float16_t)-0.624859488f,  (float16_t)0.780737229f,
+   (float16_t)-0.629638239f,  (float16_t)0.776888466f,
+   (float16_t)-0.634393284f,  (float16_t)0.773010453f,
+   (float16_t)-0.639124445f,  (float16_t)0.769103338f,
+   (float16_t)-0.643831543f,  (float16_t)0.765167266f,
+   (float16_t)-0.648514401f,  (float16_t)0.761202385f,
+   (float16_t)-0.653172843f,  (float16_t)0.757208847f,
+   (float16_t)-0.657806693f,  (float16_t)0.753186799f,
+   (float16_t)-0.662415778f,  (float16_t)0.749136395f,
+   (float16_t)-0.666999922f,  (float16_t)0.745057785f,
+   (float16_t)-0.671558955f,  (float16_t)0.740951125f,
+   (float16_t)-0.676092704f,  (float16_t)0.736816569f,
+   (float16_t)-0.680600998f,  (float16_t)0.732654272f,
+   (float16_t)-0.685083668f,  (float16_t)0.728464390f,
+   (float16_t)-0.689540545f,  (float16_t)0.724247083f,
+   (float16_t)-0.693971461f,  (float16_t)0.720002508f,
+   (float16_t)-0.698376249f,  (float16_t)0.715730825f,
+   (float16_t)-0.702754744f,  (float16_t)0.711432196f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.711432196f,  (float16_t)0.702754744f,
+   (float16_t)-0.715730825f,  (float16_t)0.698376249f,
+   (float16_t)-0.720002508f,  (float16_t)0.693971461f,
+   (float16_t)-0.724247083f,  (float16_t)0.689540545f,
+   (float16_t)-0.728464390f,  (float16_t)0.685083668f,
+   (float16_t)-0.732654272f,  (float16_t)0.680600998f,
+   (float16_t)-0.736816569f,  (float16_t)0.676092704f,
+   (float16_t)-0.740951125f,  (float16_t)0.671558955f,
+   (float16_t)-0.745057785f,  (float16_t)0.666999922f,
+   (float16_t)-0.749136395f,  (float16_t)0.662415778f,
+   (float16_t)-0.753186799f,  (float16_t)0.657806693f,
+   (float16_t)-0.757208847f,  (float16_t)0.653172843f,
+   (float16_t)-0.761202385f,  (float16_t)0.648514401f,
+   (float16_t)-0.765167266f,  (float16_t)0.643831543f,
+   (float16_t)-0.769103338f,  (float16_t)0.639124445f,
+   (float16_t)-0.773010453f,  (float16_t)0.634393284f,
+   (float16_t)-0.776888466f,  (float16_t)0.629638239f,
+   (float16_t)-0.780737229f,  (float16_t)0.624859488f,
+   (float16_t)-0.784556597f,  (float16_t)0.620057212f,
+   (float16_t)-0.788346428f,  (float16_t)0.615231591f,
+   (float16_t)-0.792106577f,  (float16_t)0.610382806f,
+   (float16_t)-0.795836905f,  (float16_t)0.605511041f,
+   (float16_t)-0.799537269f,  (float16_t)0.600616479f,
+   (float16_t)-0.803207531f,  (float16_t)0.595699304f,
+   (float16_t)-0.806847554f,  (float16_t)0.590759702f,
+   (float16_t)-0.810457198f,  (float16_t)0.585797857f,
+   (float16_t)-0.814036330f,  (float16_t)0.580813958f,
+   (float16_t)-0.817584813f,  (float16_t)0.575808191f,
+   (float16_t)-0.821102515f,  (float16_t)0.570780746f,
+   (float16_t)-0.824589303f,  (float16_t)0.565731811f,
+   (float16_t)-0.828045045f,  (float16_t)0.560661576f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.834862875f,  (float16_t)0.550457973f,
+   (float16_t)-0.838224706f,  (float16_t)0.545324988f,
+   (float16_t)-0.841554977f,  (float16_t)0.540171473f,
+   (float16_t)-0.844853565f,  (float16_t)0.534997620f,
+   (float16_t)-0.848120345f,  (float16_t)0.529803625f,
+   (float16_t)-0.851355193f,  (float16_t)0.524589683f,
+   (float16_t)-0.854557988f,  (float16_t)0.519355990f,
+   (float16_t)-0.857728610f,  (float16_t)0.514102744f,
+   (float16_t)-0.860866939f,  (float16_t)0.508830143f,
+   (float16_t)-0.863972856f,  (float16_t)0.503538384f,
+   (float16_t)-0.867046246f,  (float16_t)0.498227667f,
+   (float16_t)-0.870086991f,  (float16_t)0.492898192f,
+   (float16_t)-0.873094978f,  (float16_t)0.487550160f,
+   (float16_t)-0.876070094f,  (float16_t)0.482183772f,
+   (float16_t)-0.879012226f,  (float16_t)0.476799230f,
+   (float16_t)-0.881921264f,  (float16_t)0.471396737f,
+   (float16_t)-0.884797098f,  (float16_t)0.465976496f,
+   (float16_t)-0.887639620f,  (float16_t)0.460538711f,
+   (float16_t)-0.890448723f,  (float16_t)0.455083587f,
+   (float16_t)-0.893224301f,  (float16_t)0.449611330f,
+   (float16_t)-0.895966250f,  (float16_t)0.444122145f,
+   (float16_t)-0.898674466f,  (float16_t)0.438616239f,
+   (float16_t)-0.901348847f,  (float16_t)0.433093819f,
+   (float16_t)-0.903989293f,  (float16_t)0.427555093f,
+   (float16_t)-0.906595705f,  (float16_t)0.422000271f,
+   (float16_t)-0.909167983f,  (float16_t)0.416429560f,
+   (float16_t)-0.911706032f,  (float16_t)0.410843171f,
+   (float16_t)-0.914209756f,  (float16_t)0.405241314f,
+   (float16_t)-0.916679060f,  (float16_t)0.399624200f,
+   (float16_t)-0.919113852f,  (float16_t)0.393992040f,
+   (float16_t)-0.921514039f,  (float16_t)0.388345047f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.926210242f,  (float16_t)0.377007410f,
+   (float16_t)-0.928506080f,  (float16_t)0.371317194f,
+   (float16_t)-0.930766961f,  (float16_t)0.365612998f,
+   (float16_t)-0.932992799f,  (float16_t)0.359895037f,
+   (float16_t)-0.935183510f,  (float16_t)0.354163525f,
+   (float16_t)-0.937339012f,  (float16_t)0.348418680f,
+   (float16_t)-0.939459224f,  (float16_t)0.342660717f,
+   (float16_t)-0.941544065f,  (float16_t)0.336889853f,
+   (float16_t)-0.943593458f,  (float16_t)0.331106306f,
+   (float16_t)-0.945607325f,  (float16_t)0.325310292f,
+   (float16_t)-0.947585591f,  (float16_t)0.319502031f,
+   (float16_t)-0.949528181f,  (float16_t)0.313681740f,
+   (float16_t)-0.951435021f,  (float16_t)0.307849640f,
+   (float16_t)-0.953306040f,  (float16_t)0.302005949f,
+   (float16_t)-0.955141168f,  (float16_t)0.296150888f,
+   (float16_t)-0.956940336f,  (float16_t)0.290284677f,
+   (float16_t)-0.958703475f,  (float16_t)0.284407537f,
+   (float16_t)-0.960430519f,  (float16_t)0.278519689f,
+   (float16_t)-0.962121404f,  (float16_t)0.272621355f,
+   (float16_t)-0.963776066f,  (float16_t)0.266712757f,
+   (float16_t)-0.965394442f,  (float16_t)0.260794118f,
+   (float16_t)-0.966976471f,  (float16_t)0.254865660f,
+   (float16_t)-0.968522094f,  (float16_t)0.248927606f,
+   (float16_t)-0.970031253f,  (float16_t)0.242980180f,
+   (float16_t)-0.971503891f,  (float16_t)0.237023606f,
+   (float16_t)-0.972939952f,  (float16_t)0.231058108f,
+   (float16_t)-0.974339383f,  (float16_t)0.225083911f,
+   (float16_t)-0.975702130f,  (float16_t)0.219101240f,
+   (float16_t)-0.977028143f,  (float16_t)0.213110320f,
+   (float16_t)-0.978317371f,  (float16_t)0.207111376f,
+   (float16_t)-0.979569766f,  (float16_t)0.201104635f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-0.981963869f,  (float16_t)0.189068664f,
+   (float16_t)-0.983105487f,  (float16_t)0.183039888f,
+   (float16_t)-0.984210092f,  (float16_t)0.177004220f,
+   (float16_t)-0.985277642f,  (float16_t)0.170961889f,
+   (float16_t)-0.986308097f,  (float16_t)0.164913120f,
+   (float16_t)-0.987301418f,  (float16_t)0.158858143f,
+   (float16_t)-0.988257568f,  (float16_t)0.152797185f,
+   (float16_t)-0.989176510f,  (float16_t)0.146730474f,
+   (float16_t)-0.990058210f,  (float16_t)0.140658239f,
+   (float16_t)-0.990902635f,  (float16_t)0.134580709f,
+   (float16_t)-0.991709754f,  (float16_t)0.128498111f,
+   (float16_t)-0.992479535f,  (float16_t)0.122410675f,
+   (float16_t)-0.993211949f,  (float16_t)0.116318631f,
+   (float16_t)-0.993906970f,  (float16_t)0.110222207f,
+   (float16_t)-0.994564571f,  (float16_t)0.104121634f,
+   (float16_t)-0.995184727f,  (float16_t)0.098017140f,
+   (float16_t)-0.995767414f,  (float16_t)0.091908956f,
+   (float16_t)-0.996312612f,  (float16_t)0.085797312f,
+   (float16_t)-0.996820299f,  (float16_t)0.079682438f,
+   (float16_t)-0.997290457f,  (float16_t)0.073564564f,
+   (float16_t)-0.997723067f,  (float16_t)0.067443920f,
+   (float16_t)-0.998118113f,  (float16_t)0.061320736f,
+   (float16_t)-0.998475581f,  (float16_t)0.055195244f,
+   (float16_t)-0.998795456f,  (float16_t)0.049067674f,
+   (float16_t)-0.999077728f,  (float16_t)0.042938257f,
+   (float16_t)-0.999322385f,  (float16_t)0.036807223f,
+   (float16_t)-0.999529418f,  (float16_t)0.030674803f,
+   (float16_t)-0.999698819f,  (float16_t)0.024541229f,
+   (float16_t)-0.999830582f,  (float16_t)0.018406730f,
+   (float16_t)-0.999924702f,  (float16_t)0.012271538f,
+   (float16_t)-0.999981175f,  (float16_t)0.006135885f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.999981175f, (float16_t)-0.006135885f,
+   (float16_t)-0.999924702f, (float16_t)-0.012271538f,
+   (float16_t)-0.999830582f, (float16_t)-0.018406730f,
+   (float16_t)-0.999698819f, (float16_t)-0.024541229f,
+   (float16_t)-0.999529418f, (float16_t)-0.030674803f,
+   (float16_t)-0.999322385f, (float16_t)-0.036807223f,
+   (float16_t)-0.999077728f, (float16_t)-0.042938257f,
+   (float16_t)-0.998795456f, (float16_t)-0.049067674f,
+   (float16_t)-0.998475581f, (float16_t)-0.055195244f,
+   (float16_t)-0.998118113f, (float16_t)-0.061320736f,
+   (float16_t)-0.997723067f, (float16_t)-0.067443920f,
+   (float16_t)-0.997290457f, (float16_t)-0.073564564f,
+   (float16_t)-0.996820299f, (float16_t)-0.079682438f,
+   (float16_t)-0.996312612f, (float16_t)-0.085797312f,
+   (float16_t)-0.995767414f, (float16_t)-0.091908956f,
+   (float16_t)-0.995184727f, (float16_t)-0.098017140f,
+   (float16_t)-0.994564571f, (float16_t)-0.104121634f,
+   (float16_t)-0.993906970f, (float16_t)-0.110222207f,
+   (float16_t)-0.993211949f, (float16_t)-0.116318631f,
+   (float16_t)-0.992479535f, (float16_t)-0.122410675f,
+   (float16_t)-0.991709754f, (float16_t)-0.128498111f,
+   (float16_t)-0.990902635f, (float16_t)-0.134580709f,
+   (float16_t)-0.990058210f, (float16_t)-0.140658239f,
+   (float16_t)-0.989176510f, (float16_t)-0.146730474f,
+   (float16_t)-0.988257568f, (float16_t)-0.152797185f,
+   (float16_t)-0.987301418f, (float16_t)-0.158858143f,
+   (float16_t)-0.986308097f, (float16_t)-0.164913120f,
+   (float16_t)-0.985277642f, (float16_t)-0.170961889f,
+   (float16_t)-0.984210092f, (float16_t)-0.177004220f,
+   (float16_t)-0.983105487f, (float16_t)-0.183039888f,
+   (float16_t)-0.981963869f, (float16_t)-0.189068664f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.979569766f, (float16_t)-0.201104635f,
+   (float16_t)-0.978317371f, (float16_t)-0.207111376f,
+   (float16_t)-0.977028143f, (float16_t)-0.213110320f,
+   (float16_t)-0.975702130f, (float16_t)-0.219101240f,
+   (float16_t)-0.974339383f, (float16_t)-0.225083911f,
+   (float16_t)-0.972939952f, (float16_t)-0.231058108f,
+   (float16_t)-0.971503891f, (float16_t)-0.237023606f,
+   (float16_t)-0.970031253f, (float16_t)-0.242980180f,
+   (float16_t)-0.968522094f, (float16_t)-0.248927606f,
+   (float16_t)-0.966976471f, (float16_t)-0.254865660f,
+   (float16_t)-0.965394442f, (float16_t)-0.260794118f,
+   (float16_t)-0.963776066f, (float16_t)-0.266712757f,
+   (float16_t)-0.962121404f, (float16_t)-0.272621355f,
+   (float16_t)-0.960430519f, (float16_t)-0.278519689f,
+   (float16_t)-0.958703475f, (float16_t)-0.284407537f,
+   (float16_t)-0.956940336f, (float16_t)-0.290284677f,
+   (float16_t)-0.955141168f, (float16_t)-0.296150888f,
+   (float16_t)-0.953306040f, (float16_t)-0.302005949f,
+   (float16_t)-0.951435021f, (float16_t)-0.307849640f,
+   (float16_t)-0.949528181f, (float16_t)-0.313681740f,
+   (float16_t)-0.947585591f, (float16_t)-0.319502031f,
+   (float16_t)-0.945607325f, (float16_t)-0.325310292f,
+   (float16_t)-0.943593458f, (float16_t)-0.331106306f,
+   (float16_t)-0.941544065f, (float16_t)-0.336889853f,
+   (float16_t)-0.939459224f, (float16_t)-0.342660717f,
+   (float16_t)-0.937339012f, (float16_t)-0.348418680f,
+   (float16_t)-0.935183510f, (float16_t)-0.354163525f,
+   (float16_t)-0.932992799f, (float16_t)-0.359895037f,
+   (float16_t)-0.930766961f, (float16_t)-0.365612998f,
+   (float16_t)-0.928506080f, (float16_t)-0.371317194f,
+   (float16_t)-0.926210242f, (float16_t)-0.377007410f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.921514039f, (float16_t)-0.388345047f,
+   (float16_t)-0.919113852f, (float16_t)-0.393992040f,
+   (float16_t)-0.916679060f, (float16_t)-0.399624200f,
+   (float16_t)-0.914209756f, (float16_t)-0.405241314f,
+   (float16_t)-0.911706032f, (float16_t)-0.410843171f,
+   (float16_t)-0.909167983f, (float16_t)-0.416429560f,
+   (float16_t)-0.906595705f, (float16_t)-0.422000271f,
+   (float16_t)-0.903989293f, (float16_t)-0.427555093f,
+   (float16_t)-0.901348847f, (float16_t)-0.433093819f,
+   (float16_t)-0.898674466f, (float16_t)-0.438616239f,
+   (float16_t)-0.895966250f, (float16_t)-0.444122145f,
+   (float16_t)-0.893224301f, (float16_t)-0.449611330f,
+   (float16_t)-0.890448723f, (float16_t)-0.455083587f,
+   (float16_t)-0.887639620f, (float16_t)-0.460538711f,
+   (float16_t)-0.884797098f, (float16_t)-0.465976496f,
+   (float16_t)-0.881921264f, (float16_t)-0.471396737f,
+   (float16_t)-0.879012226f, (float16_t)-0.476799230f,
+   (float16_t)-0.876070094f, (float16_t)-0.482183772f,
+   (float16_t)-0.873094978f, (float16_t)-0.487550160f,
+   (float16_t)-0.870086991f, (float16_t)-0.492898192f,
+   (float16_t)-0.867046246f, (float16_t)-0.498227667f,
+   (float16_t)-0.863972856f, (float16_t)-0.503538384f,
+   (float16_t)-0.860866939f, (float16_t)-0.508830143f,
+   (float16_t)-0.857728610f, (float16_t)-0.514102744f,
+   (float16_t)-0.854557988f, (float16_t)-0.519355990f,
+   (float16_t)-0.851355193f, (float16_t)-0.524589683f,
+   (float16_t)-0.848120345f, (float16_t)-0.529803625f,
+   (float16_t)-0.844853565f, (float16_t)-0.534997620f,
+   (float16_t)-0.841554977f, (float16_t)-0.540171473f,
+   (float16_t)-0.838224706f, (float16_t)-0.545324988f,
+   (float16_t)-0.834862875f, (float16_t)-0.550457973f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.828045045f, (float16_t)-0.560661576f,
+   (float16_t)-0.824589303f, (float16_t)-0.565731811f,
+   (float16_t)-0.821102515f, (float16_t)-0.570780746f,
+   (float16_t)-0.817584813f, (float16_t)-0.575808191f,
+   (float16_t)-0.814036330f, (float16_t)-0.580813958f,
+   (float16_t)-0.810457198f, (float16_t)-0.585797857f,
+   (float16_t)-0.806847554f, (float16_t)-0.590759702f,
+   (float16_t)-0.803207531f, (float16_t)-0.595699304f,
+   (float16_t)-0.799537269f, (float16_t)-0.600616479f,
+   (float16_t)-0.795836905f, (float16_t)-0.605511041f,
+   (float16_t)-0.792106577f, (float16_t)-0.610382806f,
+   (float16_t)-0.788346428f, (float16_t)-0.615231591f,
+   (float16_t)-0.784556597f, (float16_t)-0.620057212f,
+   (float16_t)-0.780737229f, (float16_t)-0.624859488f,
+   (float16_t)-0.776888466f, (float16_t)-0.629638239f,
+   (float16_t)-0.773010453f, (float16_t)-0.634393284f,
+   (float16_t)-0.769103338f, (float16_t)-0.639124445f,
+   (float16_t)-0.765167266f, (float16_t)-0.643831543f,
+   (float16_t)-0.761202385f, (float16_t)-0.648514401f,
+   (float16_t)-0.757208847f, (float16_t)-0.653172843f,
+   (float16_t)-0.753186799f, (float16_t)-0.657806693f,
+   (float16_t)-0.749136395f, (float16_t)-0.662415778f,
+   (float16_t)-0.745057785f, (float16_t)-0.666999922f,
+   (float16_t)-0.740951125f, (float16_t)-0.671558955f,
+   (float16_t)-0.736816569f, (float16_t)-0.676092704f,
+   (float16_t)-0.732654272f, (float16_t)-0.680600998f,
+   (float16_t)-0.728464390f, (float16_t)-0.685083668f,
+   (float16_t)-0.724247083f, (float16_t)-0.689540545f,
+   (float16_t)-0.720002508f, (float16_t)-0.693971461f,
+   (float16_t)-0.715730825f, (float16_t)-0.698376249f,
+   (float16_t)-0.711432196f, (float16_t)-0.702754744f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.702754744f, (float16_t)-0.711432196f,
+   (float16_t)-0.698376249f, (float16_t)-0.715730825f,
+   (float16_t)-0.693971461f, (float16_t)-0.720002508f,
+   (float16_t)-0.689540545f, (float16_t)-0.724247083f,
+   (float16_t)-0.685083668f, (float16_t)-0.728464390f,
+   (float16_t)-0.680600998f, (float16_t)-0.732654272f,
+   (float16_t)-0.676092704f, (float16_t)-0.736816569f,
+   (float16_t)-0.671558955f, (float16_t)-0.740951125f,
+   (float16_t)-0.666999922f, (float16_t)-0.745057785f,
+   (float16_t)-0.662415778f, (float16_t)-0.749136395f,
+   (float16_t)-0.657806693f, (float16_t)-0.753186799f,
+   (float16_t)-0.653172843f, (float16_t)-0.757208847f,
+   (float16_t)-0.648514401f, (float16_t)-0.761202385f,
+   (float16_t)-0.643831543f, (float16_t)-0.765167266f,
+   (float16_t)-0.639124445f, (float16_t)-0.769103338f,
+   (float16_t)-0.634393284f, (float16_t)-0.773010453f,
+   (float16_t)-0.629638239f, (float16_t)-0.776888466f,
+   (float16_t)-0.624859488f, (float16_t)-0.780737229f,
+   (float16_t)-0.620057212f, (float16_t)-0.784556597f,
+   (float16_t)-0.615231591f, (float16_t)-0.788346428f,
+   (float16_t)-0.610382806f, (float16_t)-0.792106577f,
+   (float16_t)-0.605511041f, (float16_t)-0.795836905f,
+   (float16_t)-0.600616479f, (float16_t)-0.799537269f,
+   (float16_t)-0.595699304f, (float16_t)-0.803207531f,
+   (float16_t)-0.590759702f, (float16_t)-0.806847554f,
+   (float16_t)-0.585797857f, (float16_t)-0.810457198f,
+   (float16_t)-0.580813958f, (float16_t)-0.814036330f,
+   (float16_t)-0.575808191f, (float16_t)-0.817584813f,
+   (float16_t)-0.570780746f, (float16_t)-0.821102515f,
+   (float16_t)-0.565731811f, (float16_t)-0.824589303f,
+   (float16_t)-0.560661576f, (float16_t)-0.828045045f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.550457973f, (float16_t)-0.834862875f,
+   (float16_t)-0.545324988f, (float16_t)-0.838224706f,
+   (float16_t)-0.540171473f, (float16_t)-0.841554977f,
+   (float16_t)-0.534997620f, (float16_t)-0.844853565f,
+   (float16_t)-0.529803625f, (float16_t)-0.848120345f,
+   (float16_t)-0.524589683f, (float16_t)-0.851355193f,
+   (float16_t)-0.519355990f, (float16_t)-0.854557988f,
+   (float16_t)-0.514102744f, (float16_t)-0.857728610f,
+   (float16_t)-0.508830143f, (float16_t)-0.860866939f,
+   (float16_t)-0.503538384f, (float16_t)-0.863972856f,
+   (float16_t)-0.498227667f, (float16_t)-0.867046246f,
+   (float16_t)-0.492898192f, (float16_t)-0.870086991f,
+   (float16_t)-0.487550160f, (float16_t)-0.873094978f,
+   (float16_t)-0.482183772f, (float16_t)-0.876070094f,
+   (float16_t)-0.476799230f, (float16_t)-0.879012226f,
+   (float16_t)-0.471396737f, (float16_t)-0.881921264f,
+   (float16_t)-0.465976496f, (float16_t)-0.884797098f,
+   (float16_t)-0.460538711f, (float16_t)-0.887639620f,
+   (float16_t)-0.455083587f, (float16_t)-0.890448723f,
+   (float16_t)-0.449611330f, (float16_t)-0.893224301f,
+   (float16_t)-0.444122145f, (float16_t)-0.895966250f,
+   (float16_t)-0.438616239f, (float16_t)-0.898674466f,
+   (float16_t)-0.433093819f, (float16_t)-0.901348847f,
+   (float16_t)-0.427555093f, (float16_t)-0.903989293f,
+   (float16_t)-0.422000271f, (float16_t)-0.906595705f,
+   (float16_t)-0.416429560f, (float16_t)-0.909167983f,
+   (float16_t)-0.410843171f, (float16_t)-0.911706032f,
+   (float16_t)-0.405241314f, (float16_t)-0.914209756f,
+   (float16_t)-0.399624200f, (float16_t)-0.916679060f,
+   (float16_t)-0.393992040f, (float16_t)-0.919113852f,
+   (float16_t)-0.388345047f, (float16_t)-0.921514039f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.377007410f, (float16_t)-0.926210242f,
+   (float16_t)-0.371317194f, (float16_t)-0.928506080f,
+   (float16_t)-0.365612998f, (float16_t)-0.930766961f,
+   (float16_t)-0.359895037f, (float16_t)-0.932992799f,
+   (float16_t)-0.354163525f, (float16_t)-0.935183510f,
+   (float16_t)-0.348418680f, (float16_t)-0.937339012f,
+   (float16_t)-0.342660717f, (float16_t)-0.939459224f,
+   (float16_t)-0.336889853f, (float16_t)-0.941544065f,
+   (float16_t)-0.331106306f, (float16_t)-0.943593458f,
+   (float16_t)-0.325310292f, (float16_t)-0.945607325f,
+   (float16_t)-0.319502031f, (float16_t)-0.947585591f,
+   (float16_t)-0.313681740f, (float16_t)-0.949528181f,
+   (float16_t)-0.307849640f, (float16_t)-0.951435021f,
+   (float16_t)-0.302005949f, (float16_t)-0.953306040f,
+   (float16_t)-0.296150888f, (float16_t)-0.955141168f,
+   (float16_t)-0.290284677f, (float16_t)-0.956940336f,
+   (float16_t)-0.284407537f, (float16_t)-0.958703475f,
+   (float16_t)-0.278519689f, (float16_t)-0.960430519f,
+   (float16_t)-0.272621355f, (float16_t)-0.962121404f,
+   (float16_t)-0.266712757f, (float16_t)-0.963776066f,
+   (float16_t)-0.260794118f, (float16_t)-0.965394442f,
+   (float16_t)-0.254865660f, (float16_t)-0.966976471f,
+   (float16_t)-0.248927606f, (float16_t)-0.968522094f,
+   (float16_t)-0.242980180f, (float16_t)-0.970031253f,
+   (float16_t)-0.237023606f, (float16_t)-0.971503891f,
+   (float16_t)-0.231058108f, (float16_t)-0.972939952f,
+   (float16_t)-0.225083911f, (float16_t)-0.974339383f,
+   (float16_t)-0.219101240f, (float16_t)-0.975702130f,
+   (float16_t)-0.213110320f, (float16_t)-0.977028143f,
+   (float16_t)-0.207111376f, (float16_t)-0.978317371f,
+   (float16_t)-0.201104635f, (float16_t)-0.979569766f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.189068664f, (float16_t)-0.981963869f,
+   (float16_t)-0.183039888f, (float16_t)-0.983105487f,
+   (float16_t)-0.177004220f, (float16_t)-0.984210092f,
+   (float16_t)-0.170961889f, (float16_t)-0.985277642f,
+   (float16_t)-0.164913120f, (float16_t)-0.986308097f,
+   (float16_t)-0.158858143f, (float16_t)-0.987301418f,
+   (float16_t)-0.152797185f, (float16_t)-0.988257568f,
+   (float16_t)-0.146730474f, (float16_t)-0.989176510f,
+   (float16_t)-0.140658239f, (float16_t)-0.990058210f,
+   (float16_t)-0.134580709f, (float16_t)-0.990902635f,
+   (float16_t)-0.128498111f, (float16_t)-0.991709754f,
+   (float16_t)-0.122410675f, (float16_t)-0.992479535f,
+   (float16_t)-0.116318631f, (float16_t)-0.993211949f,
+   (float16_t)-0.110222207f, (float16_t)-0.993906970f,
+   (float16_t)-0.104121634f, (float16_t)-0.994564571f,
+   (float16_t)-0.098017140f, (float16_t)-0.995184727f,
+   (float16_t)-0.091908956f, (float16_t)-0.995767414f,
+   (float16_t)-0.085797312f, (float16_t)-0.996312612f,
+   (float16_t)-0.079682438f, (float16_t)-0.996820299f,
+   (float16_t)-0.073564564f, (float16_t)-0.997290457f,
+   (float16_t)-0.067443920f, (float16_t)-0.997723067f,
+   (float16_t)-0.061320736f, (float16_t)-0.998118113f,
+   (float16_t)-0.055195244f, (float16_t)-0.998475581f,
+   (float16_t)-0.049067674f, (float16_t)-0.998795456f,
+   (float16_t)-0.042938257f, (float16_t)-0.999077728f,
+   (float16_t)-0.036807223f, (float16_t)-0.999322385f,
+   (float16_t)-0.030674803f, (float16_t)-0.999529418f,
+   (float16_t)-0.024541229f, (float16_t)-0.999698819f,
+   (float16_t)-0.018406730f, (float16_t)-0.999830582f,
+   (float16_t)-0.012271538f, (float16_t)-0.999924702f,
+   (float16_t)-0.006135885f, (float16_t)-0.999981175f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.006135885f, (float16_t)-0.999981175f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f,
+    (float16_t)0.018406730f, (float16_t)-0.999830582f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.030674803f, (float16_t)-0.999529418f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.042938257f, (float16_t)-0.999077728f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.055195244f, (float16_t)-0.998475581f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.067443920f, (float16_t)-0.997723067f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.079682438f, (float16_t)-0.996820299f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.091908956f, (float16_t)-0.995767414f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.104121634f, (float16_t)-0.994564571f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.116318631f, (float16_t)-0.993211949f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.128498111f, (float16_t)-0.991709754f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.140658239f, (float16_t)-0.990058210f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.152797185f, (float16_t)-0.988257568f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.164913120f, (float16_t)-0.986308097f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.177004220f, (float16_t)-0.984210092f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.189068664f, (float16_t)-0.981963869f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.201104635f, (float16_t)-0.979569766f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.213110320f, (float16_t)-0.977028143f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.225083911f, (float16_t)-0.974339383f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.237023606f, (float16_t)-0.971503891f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.248927606f, (float16_t)-0.968522094f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.260794118f, (float16_t)-0.965394442f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.272621355f, (float16_t)-0.962121404f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.284407537f, (float16_t)-0.958703475f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.296150888f, (float16_t)-0.955141168f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.307849640f, (float16_t)-0.951435021f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.319502031f, (float16_t)-0.947585591f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.331106306f, (float16_t)-0.943593458f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.342660717f, (float16_t)-0.939459224f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.354163525f, (float16_t)-0.935183510f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.365612998f, (float16_t)-0.930766961f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.377007410f, (float16_t)-0.926210242f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.388345047f, (float16_t)-0.921514039f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.399624200f, (float16_t)-0.916679060f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.410843171f, (float16_t)-0.911706032f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.422000271f, (float16_t)-0.906595705f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.433093819f, (float16_t)-0.901348847f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.444122145f, (float16_t)-0.895966250f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.455083587f, (float16_t)-0.890448723f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.465976496f, (float16_t)-0.884797098f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.476799230f, (float16_t)-0.879012226f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.487550160f, (float16_t)-0.873094978f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.498227667f, (float16_t)-0.867046246f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.508830143f, (float16_t)-0.860866939f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.519355990f, (float16_t)-0.854557988f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.529803625f, (float16_t)-0.848120345f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.540171473f, (float16_t)-0.841554977f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.550457973f, (float16_t)-0.834862875f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.560661576f, (float16_t)-0.828045045f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.570780746f, (float16_t)-0.821102515f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.580813958f, (float16_t)-0.814036330f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.590759702f, (float16_t)-0.806847554f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.600616479f, (float16_t)-0.799537269f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.610382806f, (float16_t)-0.792106577f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.620057212f, (float16_t)-0.784556597f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.629638239f, (float16_t)-0.776888466f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.639124445f, (float16_t)-0.769103338f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.648514401f, (float16_t)-0.761202385f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.657806693f, (float16_t)-0.753186799f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.666999922f, (float16_t)-0.745057785f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.676092704f, (float16_t)-0.736816569f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.685083668f, (float16_t)-0.728464390f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.693971461f, (float16_t)-0.720002508f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.702754744f, (float16_t)-0.711432196f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.711432196f, (float16_t)-0.702754744f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.720002508f, (float16_t)-0.693971461f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.728464390f, (float16_t)-0.685083668f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.736816569f, (float16_t)-0.676092704f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.745057785f, (float16_t)-0.666999922f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.753186799f, (float16_t)-0.657806693f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.761202385f, (float16_t)-0.648514401f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.769103338f, (float16_t)-0.639124445f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.776888466f, (float16_t)-0.629638239f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.784556597f, (float16_t)-0.620057212f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.792106577f, (float16_t)-0.610382806f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.799537269f, (float16_t)-0.600616479f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.806847554f, (float16_t)-0.590759702f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.814036330f, (float16_t)-0.580813958f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.821102515f, (float16_t)-0.570780746f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.828045045f, (float16_t)-0.560661576f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.834862875f, (float16_t)-0.550457973f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.841554977f, (float16_t)-0.540171473f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.848120345f, (float16_t)-0.529803625f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.854557988f, (float16_t)-0.519355990f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.860866939f, (float16_t)-0.508830143f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.867046246f, (float16_t)-0.498227667f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.873094978f, (float16_t)-0.487550160f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.879012226f, (float16_t)-0.476799230f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.884797098f, (float16_t)-0.465976496f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.890448723f, (float16_t)-0.455083587f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.895966250f, (float16_t)-0.444122145f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.901348847f, (float16_t)-0.433093819f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.906595705f, (float16_t)-0.422000271f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.911706032f, (float16_t)-0.410843171f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.916679060f, (float16_t)-0.399624200f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.921514039f, (float16_t)-0.388345047f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.926210242f, (float16_t)-0.377007410f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.930766961f, (float16_t)-0.365612998f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.935183510f, (float16_t)-0.354163525f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.939459224f, (float16_t)-0.342660717f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.943593458f, (float16_t)-0.331106306f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.947585591f, (float16_t)-0.319502031f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.951435021f, (float16_t)-0.307849640f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.955141168f, (float16_t)-0.296150888f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.958703475f, (float16_t)-0.284407537f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.962121404f, (float16_t)-0.272621355f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.965394442f, (float16_t)-0.260794118f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.968522094f, (float16_t)-0.248927606f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.971503891f, (float16_t)-0.237023606f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.974339383f, (float16_t)-0.225083911f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.977028143f, (float16_t)-0.213110320f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.979569766f, (float16_t)-0.201104635f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.981963869f, (float16_t)-0.189068664f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.984210092f, (float16_t)-0.177004220f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.986308097f, (float16_t)-0.164913120f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.988257568f, (float16_t)-0.152797185f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.990058210f, (float16_t)-0.140658239f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.991709754f, (float16_t)-0.128498111f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.993211949f, (float16_t)-0.116318631f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.994564571f, (float16_t)-0.104121634f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.995767414f, (float16_t)-0.091908956f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.996820299f, (float16_t)-0.079682438f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.997723067f, (float16_t)-0.067443920f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.998475581f, (float16_t)-0.055195244f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.999077728f, (float16_t)-0.042938257f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.999529418f, (float16_t)-0.030674803f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999830582f, (float16_t)-0.018406730f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f,
+    (float16_t)0.999981175f, (float16_t)-0.006135885f
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 2048  and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_2048[4096] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999995294f,  (float16_t)0.003067957f,
+    (float16_t)0.999981175f,  (float16_t)0.006135885f,
+    (float16_t)0.999957645f,  (float16_t)0.009203755f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)0.999882347f,  (float16_t)0.015339206f,
+    (float16_t)0.999830582f,  (float16_t)0.018406730f,
+    (float16_t)0.999769405f,  (float16_t)0.021474080f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999618822f,  (float16_t)0.027608146f,
+    (float16_t)0.999529418f,  (float16_t)0.030674803f,
+    (float16_t)0.999430605f,  (float16_t)0.033741172f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.999204759f,  (float16_t)0.039872928f,
+    (float16_t)0.999077728f,  (float16_t)0.042938257f,
+    (float16_t)0.998941293f,  (float16_t)0.046003182f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.998640218f,  (float16_t)0.052131705f,
+    (float16_t)0.998475581f,  (float16_t)0.055195244f,
+    (float16_t)0.998301545f,  (float16_t)0.058258265f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.997925286f,  (float16_t)0.064382631f,
+    (float16_t)0.997723067f,  (float16_t)0.067443920f,
+    (float16_t)0.997511456f,  (float16_t)0.070504573f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.997060070f,  (float16_t)0.076623861f,
+    (float16_t)0.996820299f,  (float16_t)0.079682438f,
+    (float16_t)0.996571146f,  (float16_t)0.082740265f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.996044701f,  (float16_t)0.088853553f,
+    (float16_t)0.995767414f,  (float16_t)0.091908956f,
+    (float16_t)0.995480755f,  (float16_t)0.094963495f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.994879331f,  (float16_t)0.101069863f,
+    (float16_t)0.994564571f,  (float16_t)0.104121634f,
+    (float16_t)0.994240449f,  (float16_t)0.107172425f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.993564136f,  (float16_t)0.113270952f,
+    (float16_t)0.993211949f,  (float16_t)0.116318631f,
+    (float16_t)0.992850414f,  (float16_t)0.119365215f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.992099313f,  (float16_t)0.125454983f,
+    (float16_t)0.991709754f,  (float16_t)0.128498111f,
+    (float16_t)0.991310860f,  (float16_t)0.131540029f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.990485084f,  (float16_t)0.137620122f,
+    (float16_t)0.990058210f,  (float16_t)0.140658239f,
+    (float16_t)0.989622017f,  (float16_t)0.143695033f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.988721692f,  (float16_t)0.149764535f,
+    (float16_t)0.988257568f,  (float16_t)0.152797185f,
+    (float16_t)0.987784142f,  (float16_t)0.155828398f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.986809402f,  (float16_t)0.161886394f,
+    (float16_t)0.986308097f,  (float16_t)0.164913120f,
+    (float16_t)0.985797509f,  (float16_t)0.167938295f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.984748502f,  (float16_t)0.173983873f,
+    (float16_t)0.984210092f,  (float16_t)0.177004220f,
+    (float16_t)0.983662419f,  (float16_t)0.180022901f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.982539302f,  (float16_t)0.186055152f,
+    (float16_t)0.981963869f,  (float16_t)0.189068664f,
+    (float16_t)0.981379193f,  (float16_t)0.192080397f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.980182136f,  (float16_t)0.198098411f,
+    (float16_t)0.979569766f,  (float16_t)0.201104635f,
+    (float16_t)0.978948175f,  (float16_t)0.204108966f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.977677358f,  (float16_t)0.210111837f,
+    (float16_t)0.977028143f,  (float16_t)0.213110320f,
+    (float16_t)0.976369731f,  (float16_t)0.216106797f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.975025345f,  (float16_t)0.222093621f,
+    (float16_t)0.974339383f,  (float16_t)0.225083911f,
+    (float16_t)0.973644250f,  (float16_t)0.228072083f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.972226497f,  (float16_t)0.234041959f,
+    (float16_t)0.971503891f,  (float16_t)0.237023606f,
+    (float16_t)0.970772141f,  (float16_t)0.240003022f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.969281235f,  (float16_t)0.245955050f,
+    (float16_t)0.968522094f,  (float16_t)0.248927606f,
+    (float16_t)0.967753837f,  (float16_t)0.251897818f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.966190003f,  (float16_t)0.257831102f,
+    (float16_t)0.965394442f,  (float16_t)0.260794118f,
+    (float16_t)0.964589793f,  (float16_t)0.263754679f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.962953267f,  (float16_t)0.269668326f,
+    (float16_t)0.962121404f,  (float16_t)0.272621355f,
+    (float16_t)0.961280486f,  (float16_t)0.275571819f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.959571513f,  (float16_t)0.281464938f,
+    (float16_t)0.958703475f,  (float16_t)0.284407537f,
+    (float16_t)0.957826413f,  (float16_t)0.287347460f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.956045251f,  (float16_t)0.293219163f,
+    (float16_t)0.955141168f,  (float16_t)0.296150888f,
+    (float16_t)0.954228095f,  (float16_t)0.299079826f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.952375013f,  (float16_t)0.304929230f,
+    (float16_t)0.951435021f,  (float16_t)0.307849640f,
+    (float16_t)0.950486074f,  (float16_t)0.310767153f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.948561350f,  (float16_t)0.316593376f,
+    (float16_t)0.947585591f,  (float16_t)0.319502031f,
+    (float16_t)0.946600913f,  (float16_t)0.322407679f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.944604837f,  (float16_t)0.328209844f,
+    (float16_t)0.943593458f,  (float16_t)0.331106306f,
+    (float16_t)0.942573198f,  (float16_t)0.333999651f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.940506071f,  (float16_t)0.339776884f,
+    (float16_t)0.939459224f,  (float16_t)0.342660717f,
+    (float16_t)0.938403534f,  (float16_t)0.345541325f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.936265667f,  (float16_t)0.351292756f,
+    (float16_t)0.935183510f,  (float16_t)0.354163525f,
+    (float16_t)0.934092550f,  (float16_t)0.357030961f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.931884266f,  (float16_t)0.362755724f,
+    (float16_t)0.930766961f,  (float16_t)0.365612998f,
+    (float16_t)0.929640896f,  (float16_t)0.368466830f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.927362526f,  (float16_t)0.374164063f,
+    (float16_t)0.926210242f,  (float16_t)0.377007410f,
+    (float16_t)0.925049241f,  (float16_t)0.379847209f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.922701128f,  (float16_t)0.385516054f,
+    (float16_t)0.921514039f,  (float16_t)0.388345047f,
+    (float16_t)0.920318277f,  (float16_t)0.391170384f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.917900776f,  (float16_t)0.396809987f,
+    (float16_t)0.916679060f,  (float16_t)0.399624200f,
+    (float16_t)0.915448716f,  (float16_t)0.402434651f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.912962190f,  (float16_t)0.408044163f,
+    (float16_t)0.911706032f,  (float16_t)0.410843171f,
+    (float16_t)0.910441292f,  (float16_t)0.413638312f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.907886116f,  (float16_t)0.419216888f,
+    (float16_t)0.906595705f,  (float16_t)0.422000271f,
+    (float16_t)0.905296759f,  (float16_t)0.424779681f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.902673318f,  (float16_t)0.430326481f,
+    (float16_t)0.901348847f,  (float16_t)0.433093819f,
+    (float16_t)0.900015892f,  (float16_t)0.435857080f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.897324581f,  (float16_t)0.441371269f,
+    (float16_t)0.895966250f,  (float16_t)0.444122145f,
+    (float16_t)0.894599486f,  (float16_t)0.446868840f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.891840709f,  (float16_t)0.452349587f,
+    (float16_t)0.890448723f,  (float16_t)0.455083587f,
+    (float16_t)0.889048356f,  (float16_t)0.457813304f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.886222530f,  (float16_t)0.463259784f,
+    (float16_t)0.884797098f,  (float16_t)0.465976496f,
+    (float16_t)0.883363339f,  (float16_t)0.468688822f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.880470889f,  (float16_t)0.474100215f,
+    (float16_t)0.879012226f,  (float16_t)0.476799230f,
+    (float16_t)0.877545290f,  (float16_t)0.479493758f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.874586652f,  (float16_t)0.484869248f,
+    (float16_t)0.873094978f,  (float16_t)0.487550160f,
+    (float16_t)0.871595087f,  (float16_t)0.490226483f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.868570706f,  (float16_t)0.495565262f,
+    (float16_t)0.867046246f,  (float16_t)0.498227667f,
+    (float16_t)0.865513624f,  (float16_t)0.500885383f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.862423956f,  (float16_t)0.506186645f,
+    (float16_t)0.860866939f,  (float16_t)0.508830143f,
+    (float16_t)0.859301818f,  (float16_t)0.511468850f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.856147328f,  (float16_t)0.516731799f,
+    (float16_t)0.854557988f,  (float16_t)0.519355990f,
+    (float16_t)0.852960605f,  (float16_t)0.521975293f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.849741768f,  (float16_t)0.527199135f,
+    (float16_t)0.848120345f,  (float16_t)0.529803625f,
+    (float16_t)0.846490939f,  (float16_t)0.532403128f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.843208240f,  (float16_t)0.537587076f,
+    (float16_t)0.841554977f,  (float16_t)0.540171473f,
+    (float16_t)0.839893794f,  (float16_t)0.542750785f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.836547727f,  (float16_t)0.547894059f,
+    (float16_t)0.834862875f,  (float16_t)0.550457973f,
+    (float16_t)0.833170165f,  (float16_t)0.553016706f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.829761234f,  (float16_t)0.558118531f,
+    (float16_t)0.828045045f,  (float16_t)0.560661576f,
+    (float16_t)0.826321063f,  (float16_t)0.563199344f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.822849781f,  (float16_t)0.568258953f,
+    (float16_t)0.821102515f,  (float16_t)0.570780746f,
+    (float16_t)0.819347520f,  (float16_t)0.573297167f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.815814411f,  (float16_t)0.578313796f,
+    (float16_t)0.814036330f,  (float16_t)0.580813958f,
+    (float16_t)0.812250587f,  (float16_t)0.583308653f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.808656182f,  (float16_t)0.588281548f,
+    (float16_t)0.806847554f,  (float16_t)0.590759702f,
+    (float16_t)0.805031331f,  (float16_t)0.593232295f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.801376172f,  (float16_t)0.598160707f,
+    (float16_t)0.799537269f,  (float16_t)0.600616479f,
+    (float16_t)0.797690841f,  (float16_t)0.603066599f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.793975478f,  (float16_t)0.607949785f,
+    (float16_t)0.792106577f,  (float16_t)0.610382806f,
+    (float16_t)0.790230221f,  (float16_t)0.612810082f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.786455214f,  (float16_t)0.617647308f,
+    (float16_t)0.784556597f,  (float16_t)0.620057212f,
+    (float16_t)0.782650596f,  (float16_t)0.622461279f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.778816512f,  (float16_t)0.627251815f,
+    (float16_t)0.776888466f,  (float16_t)0.629638239f,
+    (float16_t)0.774953107f,  (float16_t)0.632018736f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.771060524f,  (float16_t)0.636761861f,
+    (float16_t)0.769103338f,  (float16_t)0.639124445f,
+    (float16_t)0.767138912f,  (float16_t)0.641481013f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.763188417f,  (float16_t)0.646176013f,
+    (float16_t)0.761202385f,  (float16_t)0.648514401f,
+    (float16_t)0.759209189f,  (float16_t)0.650846685f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.755201377f,  (float16_t)0.655492853f,
+    (float16_t)0.753186799f,  (float16_t)0.657806693f,
+    (float16_t)0.751165132f,  (float16_t)0.660114342f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.747100606f,  (float16_t)0.664710978f,
+    (float16_t)0.745057785f,  (float16_t)0.666999922f,
+    (float16_t)0.743007952f,  (float16_t)0.669282588f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.738887324f,  (float16_t)0.673829000f,
+    (float16_t)0.736816569f,  (float16_t)0.676092704f,
+    (float16_t)0.734738878f,  (float16_t)0.678350043f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.730562769f,  (float16_t)0.682845546f,
+    (float16_t)0.728464390f,  (float16_t)0.685083668f,
+    (float16_t)0.726359155f,  (float16_t)0.687315341f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.722128194f,  (float16_t)0.691759258f,
+    (float16_t)0.720002508f,  (float16_t)0.693971461f,
+    (float16_t)0.717870045f,  (float16_t)0.696177131f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.713584869f,  (float16_t)0.700568794f,
+    (float16_t)0.711432196f,  (float16_t)0.702754744f,
+    (float16_t)0.709272826f,  (float16_t)0.704934080f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.704934080f,  (float16_t)0.709272826f,
+    (float16_t)0.702754744f,  (float16_t)0.711432196f,
+    (float16_t)0.700568794f,  (float16_t)0.713584869f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.696177131f,  (float16_t)0.717870045f,
+    (float16_t)0.693971461f,  (float16_t)0.720002508f,
+    (float16_t)0.691759258f,  (float16_t)0.722128194f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.687315341f,  (float16_t)0.726359155f,
+    (float16_t)0.685083668f,  (float16_t)0.728464390f,
+    (float16_t)0.682845546f,  (float16_t)0.730562769f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.678350043f,  (float16_t)0.734738878f,
+    (float16_t)0.676092704f,  (float16_t)0.736816569f,
+    (float16_t)0.673829000f,  (float16_t)0.738887324f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.669282588f,  (float16_t)0.743007952f,
+    (float16_t)0.666999922f,  (float16_t)0.745057785f,
+    (float16_t)0.664710978f,  (float16_t)0.747100606f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.660114342f,  (float16_t)0.751165132f,
+    (float16_t)0.657806693f,  (float16_t)0.753186799f,
+    (float16_t)0.655492853f,  (float16_t)0.755201377f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.650846685f,  (float16_t)0.759209189f,
+    (float16_t)0.648514401f,  (float16_t)0.761202385f,
+    (float16_t)0.646176013f,  (float16_t)0.763188417f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.641481013f,  (float16_t)0.767138912f,
+    (float16_t)0.639124445f,  (float16_t)0.769103338f,
+    (float16_t)0.636761861f,  (float16_t)0.771060524f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.632018736f,  (float16_t)0.774953107f,
+    (float16_t)0.629638239f,  (float16_t)0.776888466f,
+    (float16_t)0.627251815f,  (float16_t)0.778816512f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.622461279f,  (float16_t)0.782650596f,
+    (float16_t)0.620057212f,  (float16_t)0.784556597f,
+    (float16_t)0.617647308f,  (float16_t)0.786455214f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.612810082f,  (float16_t)0.790230221f,
+    (float16_t)0.610382806f,  (float16_t)0.792106577f,
+    (float16_t)0.607949785f,  (float16_t)0.793975478f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.603066599f,  (float16_t)0.797690841f,
+    (float16_t)0.600616479f,  (float16_t)0.799537269f,
+    (float16_t)0.598160707f,  (float16_t)0.801376172f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.593232295f,  (float16_t)0.805031331f,
+    (float16_t)0.590759702f,  (float16_t)0.806847554f,
+    (float16_t)0.588281548f,  (float16_t)0.808656182f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.583308653f,  (float16_t)0.812250587f,
+    (float16_t)0.580813958f,  (float16_t)0.814036330f,
+    (float16_t)0.578313796f,  (float16_t)0.815814411f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.573297167f,  (float16_t)0.819347520f,
+    (float16_t)0.570780746f,  (float16_t)0.821102515f,
+    (float16_t)0.568258953f,  (float16_t)0.822849781f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.563199344f,  (float16_t)0.826321063f,
+    (float16_t)0.560661576f,  (float16_t)0.828045045f,
+    (float16_t)0.558118531f,  (float16_t)0.829761234f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.553016706f,  (float16_t)0.833170165f,
+    (float16_t)0.550457973f,  (float16_t)0.834862875f,
+    (float16_t)0.547894059f,  (float16_t)0.836547727f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.542750785f,  (float16_t)0.839893794f,
+    (float16_t)0.540171473f,  (float16_t)0.841554977f,
+    (float16_t)0.537587076f,  (float16_t)0.843208240f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.532403128f,  (float16_t)0.846490939f,
+    (float16_t)0.529803625f,  (float16_t)0.848120345f,
+    (float16_t)0.527199135f,  (float16_t)0.849741768f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.521975293f,  (float16_t)0.852960605f,
+    (float16_t)0.519355990f,  (float16_t)0.854557988f,
+    (float16_t)0.516731799f,  (float16_t)0.856147328f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.511468850f,  (float16_t)0.859301818f,
+    (float16_t)0.508830143f,  (float16_t)0.860866939f,
+    (float16_t)0.506186645f,  (float16_t)0.862423956f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.500885383f,  (float16_t)0.865513624f,
+    (float16_t)0.498227667f,  (float16_t)0.867046246f,
+    (float16_t)0.495565262f,  (float16_t)0.868570706f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.490226483f,  (float16_t)0.871595087f,
+    (float16_t)0.487550160f,  (float16_t)0.873094978f,
+    (float16_t)0.484869248f,  (float16_t)0.874586652f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.479493758f,  (float16_t)0.877545290f,
+    (float16_t)0.476799230f,  (float16_t)0.879012226f,
+    (float16_t)0.474100215f,  (float16_t)0.880470889f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.468688822f,  (float16_t)0.883363339f,
+    (float16_t)0.465976496f,  (float16_t)0.884797098f,
+    (float16_t)0.463259784f,  (float16_t)0.886222530f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.457813304f,  (float16_t)0.889048356f,
+    (float16_t)0.455083587f,  (float16_t)0.890448723f,
+    (float16_t)0.452349587f,  (float16_t)0.891840709f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.446868840f,  (float16_t)0.894599486f,
+    (float16_t)0.444122145f,  (float16_t)0.895966250f,
+    (float16_t)0.441371269f,  (float16_t)0.897324581f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.435857080f,  (float16_t)0.900015892f,
+    (float16_t)0.433093819f,  (float16_t)0.901348847f,
+    (float16_t)0.430326481f,  (float16_t)0.902673318f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.424779681f,  (float16_t)0.905296759f,
+    (float16_t)0.422000271f,  (float16_t)0.906595705f,
+    (float16_t)0.419216888f,  (float16_t)0.907886116f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.413638312f,  (float16_t)0.910441292f,
+    (float16_t)0.410843171f,  (float16_t)0.911706032f,
+    (float16_t)0.408044163f,  (float16_t)0.912962190f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.402434651f,  (float16_t)0.915448716f,
+    (float16_t)0.399624200f,  (float16_t)0.916679060f,
+    (float16_t)0.396809987f,  (float16_t)0.917900776f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.391170384f,  (float16_t)0.920318277f,
+    (float16_t)0.388345047f,  (float16_t)0.921514039f,
+    (float16_t)0.385516054f,  (float16_t)0.922701128f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.379847209f,  (float16_t)0.925049241f,
+    (float16_t)0.377007410f,  (float16_t)0.926210242f,
+    (float16_t)0.374164063f,  (float16_t)0.927362526f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.368466830f,  (float16_t)0.929640896f,
+    (float16_t)0.365612998f,  (float16_t)0.930766961f,
+    (float16_t)0.362755724f,  (float16_t)0.931884266f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.357030961f,  (float16_t)0.934092550f,
+    (float16_t)0.354163525f,  (float16_t)0.935183510f,
+    (float16_t)0.351292756f,  (float16_t)0.936265667f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.345541325f,  (float16_t)0.938403534f,
+    (float16_t)0.342660717f,  (float16_t)0.939459224f,
+    (float16_t)0.339776884f,  (float16_t)0.940506071f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.333999651f,  (float16_t)0.942573198f,
+    (float16_t)0.331106306f,  (float16_t)0.943593458f,
+    (float16_t)0.328209844f,  (float16_t)0.944604837f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.322407679f,  (float16_t)0.946600913f,
+    (float16_t)0.319502031f,  (float16_t)0.947585591f,
+    (float16_t)0.316593376f,  (float16_t)0.948561350f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.310767153f,  (float16_t)0.950486074f,
+    (float16_t)0.307849640f,  (float16_t)0.951435021f,
+    (float16_t)0.304929230f,  (float16_t)0.952375013f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.299079826f,  (float16_t)0.954228095f,
+    (float16_t)0.296150888f,  (float16_t)0.955141168f,
+    (float16_t)0.293219163f,  (float16_t)0.956045251f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.287347460f,  (float16_t)0.957826413f,
+    (float16_t)0.284407537f,  (float16_t)0.958703475f,
+    (float16_t)0.281464938f,  (float16_t)0.959571513f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.275571819f,  (float16_t)0.961280486f,
+    (float16_t)0.272621355f,  (float16_t)0.962121404f,
+    (float16_t)0.269668326f,  (float16_t)0.962953267f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.263754679f,  (float16_t)0.964589793f,
+    (float16_t)0.260794118f,  (float16_t)0.965394442f,
+    (float16_t)0.257831102f,  (float16_t)0.966190003f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.251897818f,  (float16_t)0.967753837f,
+    (float16_t)0.248927606f,  (float16_t)0.968522094f,
+    (float16_t)0.245955050f,  (float16_t)0.969281235f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.240003022f,  (float16_t)0.970772141f,
+    (float16_t)0.237023606f,  (float16_t)0.971503891f,
+    (float16_t)0.234041959f,  (float16_t)0.972226497f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.228072083f,  (float16_t)0.973644250f,
+    (float16_t)0.225083911f,  (float16_t)0.974339383f,
+    (float16_t)0.222093621f,  (float16_t)0.975025345f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.216106797f,  (float16_t)0.976369731f,
+    (float16_t)0.213110320f,  (float16_t)0.977028143f,
+    (float16_t)0.210111837f,  (float16_t)0.977677358f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.204108966f,  (float16_t)0.978948175f,
+    (float16_t)0.201104635f,  (float16_t)0.979569766f,
+    (float16_t)0.198098411f,  (float16_t)0.980182136f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.192080397f,  (float16_t)0.981379193f,
+    (float16_t)0.189068664f,  (float16_t)0.981963869f,
+    (float16_t)0.186055152f,  (float16_t)0.982539302f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.180022901f,  (float16_t)0.983662419f,
+    (float16_t)0.177004220f,  (float16_t)0.984210092f,
+    (float16_t)0.173983873f,  (float16_t)0.984748502f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.167938295f,  (float16_t)0.985797509f,
+    (float16_t)0.164913120f,  (float16_t)0.986308097f,
+    (float16_t)0.161886394f,  (float16_t)0.986809402f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.155828398f,  (float16_t)0.987784142f,
+    (float16_t)0.152797185f,  (float16_t)0.988257568f,
+    (float16_t)0.149764535f,  (float16_t)0.988721692f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.143695033f,  (float16_t)0.989622017f,
+    (float16_t)0.140658239f,  (float16_t)0.990058210f,
+    (float16_t)0.137620122f,  (float16_t)0.990485084f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.131540029f,  (float16_t)0.991310860f,
+    (float16_t)0.128498111f,  (float16_t)0.991709754f,
+    (float16_t)0.125454983f,  (float16_t)0.992099313f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.119365215f,  (float16_t)0.992850414f,
+    (float16_t)0.116318631f,  (float16_t)0.993211949f,
+    (float16_t)0.113270952f,  (float16_t)0.993564136f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.107172425f,  (float16_t)0.994240449f,
+    (float16_t)0.104121634f,  (float16_t)0.994564571f,
+    (float16_t)0.101069863f,  (float16_t)0.994879331f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.094963495f,  (float16_t)0.995480755f,
+    (float16_t)0.091908956f,  (float16_t)0.995767414f,
+    (float16_t)0.088853553f,  (float16_t)0.996044701f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.082740265f,  (float16_t)0.996571146f,
+    (float16_t)0.079682438f,  (float16_t)0.996820299f,
+    (float16_t)0.076623861f,  (float16_t)0.997060070f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.070504573f,  (float16_t)0.997511456f,
+    (float16_t)0.067443920f,  (float16_t)0.997723067f,
+    (float16_t)0.064382631f,  (float16_t)0.997925286f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.058258265f,  (float16_t)0.998301545f,
+    (float16_t)0.055195244f,  (float16_t)0.998475581f,
+    (float16_t)0.052131705f,  (float16_t)0.998640218f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.046003182f,  (float16_t)0.998941293f,
+    (float16_t)0.042938257f,  (float16_t)0.999077728f,
+    (float16_t)0.039872928f,  (float16_t)0.999204759f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.033741172f,  (float16_t)0.999430605f,
+    (float16_t)0.030674803f,  (float16_t)0.999529418f,
+    (float16_t)0.027608146f,  (float16_t)0.999618822f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.021474080f,  (float16_t)0.999769405f,
+    (float16_t)0.018406730f,  (float16_t)0.999830582f,
+    (float16_t)0.015339206f,  (float16_t)0.999882347f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.009203755f,  (float16_t)0.999957645f,
+    (float16_t)0.006135885f,  (float16_t)0.999981175f,
+    (float16_t)0.003067957f,  (float16_t)0.999995294f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.003067957f,  (float16_t)0.999995294f,
+   (float16_t)-0.006135885f,  (float16_t)0.999981175f,
+   (float16_t)-0.009203755f,  (float16_t)0.999957645f,
+   (float16_t)-0.012271538f,  (float16_t)0.999924702f,
+   (float16_t)-0.015339206f,  (float16_t)0.999882347f,
+   (float16_t)-0.018406730f,  (float16_t)0.999830582f,
+   (float16_t)-0.021474080f,  (float16_t)0.999769405f,
+   (float16_t)-0.024541229f,  (float16_t)0.999698819f,
+   (float16_t)-0.027608146f,  (float16_t)0.999618822f,
+   (float16_t)-0.030674803f,  (float16_t)0.999529418f,
+   (float16_t)-0.033741172f,  (float16_t)0.999430605f,
+   (float16_t)-0.036807223f,  (float16_t)0.999322385f,
+   (float16_t)-0.039872928f,  (float16_t)0.999204759f,
+   (float16_t)-0.042938257f,  (float16_t)0.999077728f,
+   (float16_t)-0.046003182f,  (float16_t)0.998941293f,
+   (float16_t)-0.049067674f,  (float16_t)0.998795456f,
+   (float16_t)-0.052131705f,  (float16_t)0.998640218f,
+   (float16_t)-0.055195244f,  (float16_t)0.998475581f,
+   (float16_t)-0.058258265f,  (float16_t)0.998301545f,
+   (float16_t)-0.061320736f,  (float16_t)0.998118113f,
+   (float16_t)-0.064382631f,  (float16_t)0.997925286f,
+   (float16_t)-0.067443920f,  (float16_t)0.997723067f,
+   (float16_t)-0.070504573f,  (float16_t)0.997511456f,
+   (float16_t)-0.073564564f,  (float16_t)0.997290457f,
+   (float16_t)-0.076623861f,  (float16_t)0.997060070f,
+   (float16_t)-0.079682438f,  (float16_t)0.996820299f,
+   (float16_t)-0.082740265f,  (float16_t)0.996571146f,
+   (float16_t)-0.085797312f,  (float16_t)0.996312612f,
+   (float16_t)-0.088853553f,  (float16_t)0.996044701f,
+   (float16_t)-0.091908956f,  (float16_t)0.995767414f,
+   (float16_t)-0.094963495f,  (float16_t)0.995480755f,
+   (float16_t)-0.098017140f,  (float16_t)0.995184727f,
+   (float16_t)-0.101069863f,  (float16_t)0.994879331f,
+   (float16_t)-0.104121634f,  (float16_t)0.994564571f,
+   (float16_t)-0.107172425f,  (float16_t)0.994240449f,
+   (float16_t)-0.110222207f,  (float16_t)0.993906970f,
+   (float16_t)-0.113270952f,  (float16_t)0.993564136f,
+   (float16_t)-0.116318631f,  (float16_t)0.993211949f,
+   (float16_t)-0.119365215f,  (float16_t)0.992850414f,
+   (float16_t)-0.122410675f,  (float16_t)0.992479535f,
+   (float16_t)-0.125454983f,  (float16_t)0.992099313f,
+   (float16_t)-0.128498111f,  (float16_t)0.991709754f,
+   (float16_t)-0.131540029f,  (float16_t)0.991310860f,
+   (float16_t)-0.134580709f,  (float16_t)0.990902635f,
+   (float16_t)-0.137620122f,  (float16_t)0.990485084f,
+   (float16_t)-0.140658239f,  (float16_t)0.990058210f,
+   (float16_t)-0.143695033f,  (float16_t)0.989622017f,
+   (float16_t)-0.146730474f,  (float16_t)0.989176510f,
+   (float16_t)-0.149764535f,  (float16_t)0.988721692f,
+   (float16_t)-0.152797185f,  (float16_t)0.988257568f,
+   (float16_t)-0.155828398f,  (float16_t)0.987784142f,
+   (float16_t)-0.158858143f,  (float16_t)0.987301418f,
+   (float16_t)-0.161886394f,  (float16_t)0.986809402f,
+   (float16_t)-0.164913120f,  (float16_t)0.986308097f,
+   (float16_t)-0.167938295f,  (float16_t)0.985797509f,
+   (float16_t)-0.170961889f,  (float16_t)0.985277642f,
+   (float16_t)-0.173983873f,  (float16_t)0.984748502f,
+   (float16_t)-0.177004220f,  (float16_t)0.984210092f,
+   (float16_t)-0.180022901f,  (float16_t)0.983662419f,
+   (float16_t)-0.183039888f,  (float16_t)0.983105487f,
+   (float16_t)-0.186055152f,  (float16_t)0.982539302f,
+   (float16_t)-0.189068664f,  (float16_t)0.981963869f,
+   (float16_t)-0.192080397f,  (float16_t)0.981379193f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.198098411f,  (float16_t)0.980182136f,
+   (float16_t)-0.201104635f,  (float16_t)0.979569766f,
+   (float16_t)-0.204108966f,  (float16_t)0.978948175f,
+   (float16_t)-0.207111376f,  (float16_t)0.978317371f,
+   (float16_t)-0.210111837f,  (float16_t)0.977677358f,
+   (float16_t)-0.213110320f,  (float16_t)0.977028143f,
+   (float16_t)-0.216106797f,  (float16_t)0.976369731f,
+   (float16_t)-0.219101240f,  (float16_t)0.975702130f,
+   (float16_t)-0.222093621f,  (float16_t)0.975025345f,
+   (float16_t)-0.225083911f,  (float16_t)0.974339383f,
+   (float16_t)-0.228072083f,  (float16_t)0.973644250f,
+   (float16_t)-0.231058108f,  (float16_t)0.972939952f,
+   (float16_t)-0.234041959f,  (float16_t)0.972226497f,
+   (float16_t)-0.237023606f,  (float16_t)0.971503891f,
+   (float16_t)-0.240003022f,  (float16_t)0.970772141f,
+   (float16_t)-0.242980180f,  (float16_t)0.970031253f,
+   (float16_t)-0.245955050f,  (float16_t)0.969281235f,
+   (float16_t)-0.248927606f,  (float16_t)0.968522094f,
+   (float16_t)-0.251897818f,  (float16_t)0.967753837f,
+   (float16_t)-0.254865660f,  (float16_t)0.966976471f,
+   (float16_t)-0.257831102f,  (float16_t)0.966190003f,
+   (float16_t)-0.260794118f,  (float16_t)0.965394442f,
+   (float16_t)-0.263754679f,  (float16_t)0.964589793f,
+   (float16_t)-0.266712757f,  (float16_t)0.963776066f,
+   (float16_t)-0.269668326f,  (float16_t)0.962953267f,
+   (float16_t)-0.272621355f,  (float16_t)0.962121404f,
+   (float16_t)-0.275571819f,  (float16_t)0.961280486f,
+   (float16_t)-0.278519689f,  (float16_t)0.960430519f,
+   (float16_t)-0.281464938f,  (float16_t)0.959571513f,
+   (float16_t)-0.284407537f,  (float16_t)0.958703475f,
+   (float16_t)-0.287347460f,  (float16_t)0.957826413f,
+   (float16_t)-0.290284677f,  (float16_t)0.956940336f,
+   (float16_t)-0.293219163f,  (float16_t)0.956045251f,
+   (float16_t)-0.296150888f,  (float16_t)0.955141168f,
+   (float16_t)-0.299079826f,  (float16_t)0.954228095f,
+   (float16_t)-0.302005949f,  (float16_t)0.953306040f,
+   (float16_t)-0.304929230f,  (float16_t)0.952375013f,
+   (float16_t)-0.307849640f,  (float16_t)0.951435021f,
+   (float16_t)-0.310767153f,  (float16_t)0.950486074f,
+   (float16_t)-0.313681740f,  (float16_t)0.949528181f,
+   (float16_t)-0.316593376f,  (float16_t)0.948561350f,
+   (float16_t)-0.319502031f,  (float16_t)0.947585591f,
+   (float16_t)-0.322407679f,  (float16_t)0.946600913f,
+   (float16_t)-0.325310292f,  (float16_t)0.945607325f,
+   (float16_t)-0.328209844f,  (float16_t)0.944604837f,
+   (float16_t)-0.331106306f,  (float16_t)0.943593458f,
+   (float16_t)-0.333999651f,  (float16_t)0.942573198f,
+   (float16_t)-0.336889853f,  (float16_t)0.941544065f,
+   (float16_t)-0.339776884f,  (float16_t)0.940506071f,
+   (float16_t)-0.342660717f,  (float16_t)0.939459224f,
+   (float16_t)-0.345541325f,  (float16_t)0.938403534f,
+   (float16_t)-0.348418680f,  (float16_t)0.937339012f,
+   (float16_t)-0.351292756f,  (float16_t)0.936265667f,
+   (float16_t)-0.354163525f,  (float16_t)0.935183510f,
+   (float16_t)-0.357030961f,  (float16_t)0.934092550f,
+   (float16_t)-0.359895037f,  (float16_t)0.932992799f,
+   (float16_t)-0.362755724f,  (float16_t)0.931884266f,
+   (float16_t)-0.365612998f,  (float16_t)0.930766961f,
+   (float16_t)-0.368466830f,  (float16_t)0.929640896f,
+   (float16_t)-0.371317194f,  (float16_t)0.928506080f,
+   (float16_t)-0.374164063f,  (float16_t)0.927362526f,
+   (float16_t)-0.377007410f,  (float16_t)0.926210242f,
+   (float16_t)-0.379847209f,  (float16_t)0.925049241f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.385516054f,  (float16_t)0.922701128f,
+   (float16_t)-0.388345047f,  (float16_t)0.921514039f,
+   (float16_t)-0.391170384f,  (float16_t)0.920318277f,
+   (float16_t)-0.393992040f,  (float16_t)0.919113852f,
+   (float16_t)-0.396809987f,  (float16_t)0.917900776f,
+   (float16_t)-0.399624200f,  (float16_t)0.916679060f,
+   (float16_t)-0.402434651f,  (float16_t)0.915448716f,
+   (float16_t)-0.405241314f,  (float16_t)0.914209756f,
+   (float16_t)-0.408044163f,  (float16_t)0.912962190f,
+   (float16_t)-0.410843171f,  (float16_t)0.911706032f,
+   (float16_t)-0.413638312f,  (float16_t)0.910441292f,
+   (float16_t)-0.416429560f,  (float16_t)0.909167983f,
+   (float16_t)-0.419216888f,  (float16_t)0.907886116f,
+   (float16_t)-0.422000271f,  (float16_t)0.906595705f,
+   (float16_t)-0.424779681f,  (float16_t)0.905296759f,
+   (float16_t)-0.427555093f,  (float16_t)0.903989293f,
+   (float16_t)-0.430326481f,  (float16_t)0.902673318f,
+   (float16_t)-0.433093819f,  (float16_t)0.901348847f,
+   (float16_t)-0.435857080f,  (float16_t)0.900015892f,
+   (float16_t)-0.438616239f,  (float16_t)0.898674466f,
+   (float16_t)-0.441371269f,  (float16_t)0.897324581f,
+   (float16_t)-0.444122145f,  (float16_t)0.895966250f,
+   (float16_t)-0.446868840f,  (float16_t)0.894599486f,
+   (float16_t)-0.449611330f,  (float16_t)0.893224301f,
+   (float16_t)-0.452349587f,  (float16_t)0.891840709f,
+   (float16_t)-0.455083587f,  (float16_t)0.890448723f,
+   (float16_t)-0.457813304f,  (float16_t)0.889048356f,
+   (float16_t)-0.460538711f,  (float16_t)0.887639620f,
+   (float16_t)-0.463259784f,  (float16_t)0.886222530f,
+   (float16_t)-0.465976496f,  (float16_t)0.884797098f,
+   (float16_t)-0.468688822f,  (float16_t)0.883363339f,
+   (float16_t)-0.471396737f,  (float16_t)0.881921264f,
+   (float16_t)-0.474100215f,  (float16_t)0.880470889f,
+   (float16_t)-0.476799230f,  (float16_t)0.879012226f,
+   (float16_t)-0.479493758f,  (float16_t)0.877545290f,
+   (float16_t)-0.482183772f,  (float16_t)0.876070094f,
+   (float16_t)-0.484869248f,  (float16_t)0.874586652f,
+   (float16_t)-0.487550160f,  (float16_t)0.873094978f,
+   (float16_t)-0.490226483f,  (float16_t)0.871595087f,
+   (float16_t)-0.492898192f,  (float16_t)0.870086991f,
+   (float16_t)-0.495565262f,  (float16_t)0.868570706f,
+   (float16_t)-0.498227667f,  (float16_t)0.867046246f,
+   (float16_t)-0.500885383f,  (float16_t)0.865513624f,
+   (float16_t)-0.503538384f,  (float16_t)0.863972856f,
+   (float16_t)-0.506186645f,  (float16_t)0.862423956f,
+   (float16_t)-0.508830143f,  (float16_t)0.860866939f,
+   (float16_t)-0.511468850f,  (float16_t)0.859301818f,
+   (float16_t)-0.514102744f,  (float16_t)0.857728610f,
+   (float16_t)-0.516731799f,  (float16_t)0.856147328f,
+   (float16_t)-0.519355990f,  (float16_t)0.854557988f,
+   (float16_t)-0.521975293f,  (float16_t)0.852960605f,
+   (float16_t)-0.524589683f,  (float16_t)0.851355193f,
+   (float16_t)-0.527199135f,  (float16_t)0.849741768f,
+   (float16_t)-0.529803625f,  (float16_t)0.848120345f,
+   (float16_t)-0.532403128f,  (float16_t)0.846490939f,
+   (float16_t)-0.534997620f,  (float16_t)0.844853565f,
+   (float16_t)-0.537587076f,  (float16_t)0.843208240f,
+   (float16_t)-0.540171473f,  (float16_t)0.841554977f,
+   (float16_t)-0.542750785f,  (float16_t)0.839893794f,
+   (float16_t)-0.545324988f,  (float16_t)0.838224706f,
+   (float16_t)-0.547894059f,  (float16_t)0.836547727f,
+   (float16_t)-0.550457973f,  (float16_t)0.834862875f,
+   (float16_t)-0.553016706f,  (float16_t)0.833170165f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.558118531f,  (float16_t)0.829761234f,
+   (float16_t)-0.560661576f,  (float16_t)0.828045045f,
+   (float16_t)-0.563199344f,  (float16_t)0.826321063f,
+   (float16_t)-0.565731811f,  (float16_t)0.824589303f,
+   (float16_t)-0.568258953f,  (float16_t)0.822849781f,
+   (float16_t)-0.570780746f,  (float16_t)0.821102515f,
+   (float16_t)-0.573297167f,  (float16_t)0.819347520f,
+   (float16_t)-0.575808191f,  (float16_t)0.817584813f,
+   (float16_t)-0.578313796f,  (float16_t)0.815814411f,
+   (float16_t)-0.580813958f,  (float16_t)0.814036330f,
+   (float16_t)-0.583308653f,  (float16_t)0.812250587f,
+   (float16_t)-0.585797857f,  (float16_t)0.810457198f,
+   (float16_t)-0.588281548f,  (float16_t)0.808656182f,
+   (float16_t)-0.590759702f,  (float16_t)0.806847554f,
+   (float16_t)-0.593232295f,  (float16_t)0.805031331f,
+   (float16_t)-0.595699304f,  (float16_t)0.803207531f,
+   (float16_t)-0.598160707f,  (float16_t)0.801376172f,
+   (float16_t)-0.600616479f,  (float16_t)0.799537269f,
+   (float16_t)-0.603066599f,  (float16_t)0.797690841f,
+   (float16_t)-0.605511041f,  (float16_t)0.795836905f,
+   (float16_t)-0.607949785f,  (float16_t)0.793975478f,
+   (float16_t)-0.610382806f,  (float16_t)0.792106577f,
+   (float16_t)-0.612810082f,  (float16_t)0.790230221f,
+   (float16_t)-0.615231591f,  (float16_t)0.788346428f,
+   (float16_t)-0.617647308f,  (float16_t)0.786455214f,
+   (float16_t)-0.620057212f,  (float16_t)0.784556597f,
+   (float16_t)-0.622461279f,  (float16_t)0.782650596f,
+   (float16_t)-0.624859488f,  (float16_t)0.780737229f,
+   (float16_t)-0.627251815f,  (float16_t)0.778816512f,
+   (float16_t)-0.629638239f,  (float16_t)0.776888466f,
+   (float16_t)-0.632018736f,  (float16_t)0.774953107f,
+   (float16_t)-0.634393284f,  (float16_t)0.773010453f,
+   (float16_t)-0.636761861f,  (float16_t)0.771060524f,
+   (float16_t)-0.639124445f,  (float16_t)0.769103338f,
+   (float16_t)-0.641481013f,  (float16_t)0.767138912f,
+   (float16_t)-0.643831543f,  (float16_t)0.765167266f,
+   (float16_t)-0.646176013f,  (float16_t)0.763188417f,
+   (float16_t)-0.648514401f,  (float16_t)0.761202385f,
+   (float16_t)-0.650846685f,  (float16_t)0.759209189f,
+   (float16_t)-0.653172843f,  (float16_t)0.757208847f,
+   (float16_t)-0.655492853f,  (float16_t)0.755201377f,
+   (float16_t)-0.657806693f,  (float16_t)0.753186799f,
+   (float16_t)-0.660114342f,  (float16_t)0.751165132f,
+   (float16_t)-0.662415778f,  (float16_t)0.749136395f,
+   (float16_t)-0.664710978f,  (float16_t)0.747100606f,
+   (float16_t)-0.666999922f,  (float16_t)0.745057785f,
+   (float16_t)-0.669282588f,  (float16_t)0.743007952f,
+   (float16_t)-0.671558955f,  (float16_t)0.740951125f,
+   (float16_t)-0.673829000f,  (float16_t)0.738887324f,
+   (float16_t)-0.676092704f,  (float16_t)0.736816569f,
+   (float16_t)-0.678350043f,  (float16_t)0.734738878f,
+   (float16_t)-0.680600998f,  (float16_t)0.732654272f,
+   (float16_t)-0.682845546f,  (float16_t)0.730562769f,
+   (float16_t)-0.685083668f,  (float16_t)0.728464390f,
+   (float16_t)-0.687315341f,  (float16_t)0.726359155f,
+   (float16_t)-0.689540545f,  (float16_t)0.724247083f,
+   (float16_t)-0.691759258f,  (float16_t)0.722128194f,
+   (float16_t)-0.693971461f,  (float16_t)0.720002508f,
+   (float16_t)-0.696177131f,  (float16_t)0.717870045f,
+   (float16_t)-0.698376249f,  (float16_t)0.715730825f,
+   (float16_t)-0.700568794f,  (float16_t)0.713584869f,
+   (float16_t)-0.702754744f,  (float16_t)0.711432196f,
+   (float16_t)-0.704934080f,  (float16_t)0.709272826f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.709272826f,  (float16_t)0.704934080f,
+   (float16_t)-0.711432196f,  (float16_t)0.702754744f,
+   (float16_t)-0.713584869f,  (float16_t)0.700568794f,
+   (float16_t)-0.715730825f,  (float16_t)0.698376249f,
+   (float16_t)-0.717870045f,  (float16_t)0.696177131f,
+   (float16_t)-0.720002508f,  (float16_t)0.693971461f,
+   (float16_t)-0.722128194f,  (float16_t)0.691759258f,
+   (float16_t)-0.724247083f,  (float16_t)0.689540545f,
+   (float16_t)-0.726359155f,  (float16_t)0.687315341f,
+   (float16_t)-0.728464390f,  (float16_t)0.685083668f,
+   (float16_t)-0.730562769f,  (float16_t)0.682845546f,
+   (float16_t)-0.732654272f,  (float16_t)0.680600998f,
+   (float16_t)-0.734738878f,  (float16_t)0.678350043f,
+   (float16_t)-0.736816569f,  (float16_t)0.676092704f,
+   (float16_t)-0.738887324f,  (float16_t)0.673829000f,
+   (float16_t)-0.740951125f,  (float16_t)0.671558955f,
+   (float16_t)-0.743007952f,  (float16_t)0.669282588f,
+   (float16_t)-0.745057785f,  (float16_t)0.666999922f,
+   (float16_t)-0.747100606f,  (float16_t)0.664710978f,
+   (float16_t)-0.749136395f,  (float16_t)0.662415778f,
+   (float16_t)-0.751165132f,  (float16_t)0.660114342f,
+   (float16_t)-0.753186799f,  (float16_t)0.657806693f,
+   (float16_t)-0.755201377f,  (float16_t)0.655492853f,
+   (float16_t)-0.757208847f,  (float16_t)0.653172843f,
+   (float16_t)-0.759209189f,  (float16_t)0.650846685f,
+   (float16_t)-0.761202385f,  (float16_t)0.648514401f,
+   (float16_t)-0.763188417f,  (float16_t)0.646176013f,
+   (float16_t)-0.765167266f,  (float16_t)0.643831543f,
+   (float16_t)-0.767138912f,  (float16_t)0.641481013f,
+   (float16_t)-0.769103338f,  (float16_t)0.639124445f,
+   (float16_t)-0.771060524f,  (float16_t)0.636761861f,
+   (float16_t)-0.773010453f,  (float16_t)0.634393284f,
+   (float16_t)-0.774953107f,  (float16_t)0.632018736f,
+   (float16_t)-0.776888466f,  (float16_t)0.629638239f,
+   (float16_t)-0.778816512f,  (float16_t)0.627251815f,
+   (float16_t)-0.780737229f,  (float16_t)0.624859488f,
+   (float16_t)-0.782650596f,  (float16_t)0.622461279f,
+   (float16_t)-0.784556597f,  (float16_t)0.620057212f,
+   (float16_t)-0.786455214f,  (float16_t)0.617647308f,
+   (float16_t)-0.788346428f,  (float16_t)0.615231591f,
+   (float16_t)-0.790230221f,  (float16_t)0.612810082f,
+   (float16_t)-0.792106577f,  (float16_t)0.610382806f,
+   (float16_t)-0.793975478f,  (float16_t)0.607949785f,
+   (float16_t)-0.795836905f,  (float16_t)0.605511041f,
+   (float16_t)-0.797690841f,  (float16_t)0.603066599f,
+   (float16_t)-0.799537269f,  (float16_t)0.600616479f,
+   (float16_t)-0.801376172f,  (float16_t)0.598160707f,
+   (float16_t)-0.803207531f,  (float16_t)0.595699304f,
+   (float16_t)-0.805031331f,  (float16_t)0.593232295f,
+   (float16_t)-0.806847554f,  (float16_t)0.590759702f,
+   (float16_t)-0.808656182f,  (float16_t)0.588281548f,
+   (float16_t)-0.810457198f,  (float16_t)0.585797857f,
+   (float16_t)-0.812250587f,  (float16_t)0.583308653f,
+   (float16_t)-0.814036330f,  (float16_t)0.580813958f,
+   (float16_t)-0.815814411f,  (float16_t)0.578313796f,
+   (float16_t)-0.817584813f,  (float16_t)0.575808191f,
+   (float16_t)-0.819347520f,  (float16_t)0.573297167f,
+   (float16_t)-0.821102515f,  (float16_t)0.570780746f,
+   (float16_t)-0.822849781f,  (float16_t)0.568258953f,
+   (float16_t)-0.824589303f,  (float16_t)0.565731811f,
+   (float16_t)-0.826321063f,  (float16_t)0.563199344f,
+   (float16_t)-0.828045045f,  (float16_t)0.560661576f,
+   (float16_t)-0.829761234f,  (float16_t)0.558118531f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.833170165f,  (float16_t)0.553016706f,
+   (float16_t)-0.834862875f,  (float16_t)0.550457973f,
+   (float16_t)-0.836547727f,  (float16_t)0.547894059f,
+   (float16_t)-0.838224706f,  (float16_t)0.545324988f,
+   (float16_t)-0.839893794f,  (float16_t)0.542750785f,
+   (float16_t)-0.841554977f,  (float16_t)0.540171473f,
+   (float16_t)-0.843208240f,  (float16_t)0.537587076f,
+   (float16_t)-0.844853565f,  (float16_t)0.534997620f,
+   (float16_t)-0.846490939f,  (float16_t)0.532403128f,
+   (float16_t)-0.848120345f,  (float16_t)0.529803625f,
+   (float16_t)-0.849741768f,  (float16_t)0.527199135f,
+   (float16_t)-0.851355193f,  (float16_t)0.524589683f,
+   (float16_t)-0.852960605f,  (float16_t)0.521975293f,
+   (float16_t)-0.854557988f,  (float16_t)0.519355990f,
+   (float16_t)-0.856147328f,  (float16_t)0.516731799f,
+   (float16_t)-0.857728610f,  (float16_t)0.514102744f,
+   (float16_t)-0.859301818f,  (float16_t)0.511468850f,
+   (float16_t)-0.860866939f,  (float16_t)0.508830143f,
+   (float16_t)-0.862423956f,  (float16_t)0.506186645f,
+   (float16_t)-0.863972856f,  (float16_t)0.503538384f,
+   (float16_t)-0.865513624f,  (float16_t)0.500885383f,
+   (float16_t)-0.867046246f,  (float16_t)0.498227667f,
+   (float16_t)-0.868570706f,  (float16_t)0.495565262f,
+   (float16_t)-0.870086991f,  (float16_t)0.492898192f,
+   (float16_t)-0.871595087f,  (float16_t)0.490226483f,
+   (float16_t)-0.873094978f,  (float16_t)0.487550160f,
+   (float16_t)-0.874586652f,  (float16_t)0.484869248f,
+   (float16_t)-0.876070094f,  (float16_t)0.482183772f,
+   (float16_t)-0.877545290f,  (float16_t)0.479493758f,
+   (float16_t)-0.879012226f,  (float16_t)0.476799230f,
+   (float16_t)-0.880470889f,  (float16_t)0.474100215f,
+   (float16_t)-0.881921264f,  (float16_t)0.471396737f,
+   (float16_t)-0.883363339f,  (float16_t)0.468688822f,
+   (float16_t)-0.884797098f,  (float16_t)0.465976496f,
+   (float16_t)-0.886222530f,  (float16_t)0.463259784f,
+   (float16_t)-0.887639620f,  (float16_t)0.460538711f,
+   (float16_t)-0.889048356f,  (float16_t)0.457813304f,
+   (float16_t)-0.890448723f,  (float16_t)0.455083587f,
+   (float16_t)-0.891840709f,  (float16_t)0.452349587f,
+   (float16_t)-0.893224301f,  (float16_t)0.449611330f,
+   (float16_t)-0.894599486f,  (float16_t)0.446868840f,
+   (float16_t)-0.895966250f,  (float16_t)0.444122145f,
+   (float16_t)-0.897324581f,  (float16_t)0.441371269f,
+   (float16_t)-0.898674466f,  (float16_t)0.438616239f,
+   (float16_t)-0.900015892f,  (float16_t)0.435857080f,
+   (float16_t)-0.901348847f,  (float16_t)0.433093819f,
+   (float16_t)-0.902673318f,  (float16_t)0.430326481f,
+   (float16_t)-0.903989293f,  (float16_t)0.427555093f,
+   (float16_t)-0.905296759f,  (float16_t)0.424779681f,
+   (float16_t)-0.906595705f,  (float16_t)0.422000271f,
+   (float16_t)-0.907886116f,  (float16_t)0.419216888f,
+   (float16_t)-0.909167983f,  (float16_t)0.416429560f,
+   (float16_t)-0.910441292f,  (float16_t)0.413638312f,
+   (float16_t)-0.911706032f,  (float16_t)0.410843171f,
+   (float16_t)-0.912962190f,  (float16_t)0.408044163f,
+   (float16_t)-0.914209756f,  (float16_t)0.405241314f,
+   (float16_t)-0.915448716f,  (float16_t)0.402434651f,
+   (float16_t)-0.916679060f,  (float16_t)0.399624200f,
+   (float16_t)-0.917900776f,  (float16_t)0.396809987f,
+   (float16_t)-0.919113852f,  (float16_t)0.393992040f,
+   (float16_t)-0.920318277f,  (float16_t)0.391170384f,
+   (float16_t)-0.921514039f,  (float16_t)0.388345047f,
+   (float16_t)-0.922701128f,  (float16_t)0.385516054f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.925049241f,  (float16_t)0.379847209f,
+   (float16_t)-0.926210242f,  (float16_t)0.377007410f,
+   (float16_t)-0.927362526f,  (float16_t)0.374164063f,
+   (float16_t)-0.928506080f,  (float16_t)0.371317194f,
+   (float16_t)-0.929640896f,  (float16_t)0.368466830f,
+   (float16_t)-0.930766961f,  (float16_t)0.365612998f,
+   (float16_t)-0.931884266f,  (float16_t)0.362755724f,
+   (float16_t)-0.932992799f,  (float16_t)0.359895037f,
+   (float16_t)-0.934092550f,  (float16_t)0.357030961f,
+   (float16_t)-0.935183510f,  (float16_t)0.354163525f,
+   (float16_t)-0.936265667f,  (float16_t)0.351292756f,
+   (float16_t)-0.937339012f,  (float16_t)0.348418680f,
+   (float16_t)-0.938403534f,  (float16_t)0.345541325f,
+   (float16_t)-0.939459224f,  (float16_t)0.342660717f,
+   (float16_t)-0.940506071f,  (float16_t)0.339776884f,
+   (float16_t)-0.941544065f,  (float16_t)0.336889853f,
+   (float16_t)-0.942573198f,  (float16_t)0.333999651f,
+   (float16_t)-0.943593458f,  (float16_t)0.331106306f,
+   (float16_t)-0.944604837f,  (float16_t)0.328209844f,
+   (float16_t)-0.945607325f,  (float16_t)0.325310292f,
+   (float16_t)-0.946600913f,  (float16_t)0.322407679f,
+   (float16_t)-0.947585591f,  (float16_t)0.319502031f,
+   (float16_t)-0.948561350f,  (float16_t)0.316593376f,
+   (float16_t)-0.949528181f,  (float16_t)0.313681740f,
+   (float16_t)-0.950486074f,  (float16_t)0.310767153f,
+   (float16_t)-0.951435021f,  (float16_t)0.307849640f,
+   (float16_t)-0.952375013f,  (float16_t)0.304929230f,
+   (float16_t)-0.953306040f,  (float16_t)0.302005949f,
+   (float16_t)-0.954228095f,  (float16_t)0.299079826f,
+   (float16_t)-0.955141168f,  (float16_t)0.296150888f,
+   (float16_t)-0.956045251f,  (float16_t)0.293219163f,
+   (float16_t)-0.956940336f,  (float16_t)0.290284677f,
+   (float16_t)-0.957826413f,  (float16_t)0.287347460f,
+   (float16_t)-0.958703475f,  (float16_t)0.284407537f,
+   (float16_t)-0.959571513f,  (float16_t)0.281464938f,
+   (float16_t)-0.960430519f,  (float16_t)0.278519689f,
+   (float16_t)-0.961280486f,  (float16_t)0.275571819f,
+   (float16_t)-0.962121404f,  (float16_t)0.272621355f,
+   (float16_t)-0.962953267f,  (float16_t)0.269668326f,
+   (float16_t)-0.963776066f,  (float16_t)0.266712757f,
+   (float16_t)-0.964589793f,  (float16_t)0.263754679f,
+   (float16_t)-0.965394442f,  (float16_t)0.260794118f,
+   (float16_t)-0.966190003f,  (float16_t)0.257831102f,
+   (float16_t)-0.966976471f,  (float16_t)0.254865660f,
+   (float16_t)-0.967753837f,  (float16_t)0.251897818f,
+   (float16_t)-0.968522094f,  (float16_t)0.248927606f,
+   (float16_t)-0.969281235f,  (float16_t)0.245955050f,
+   (float16_t)-0.970031253f,  (float16_t)0.242980180f,
+   (float16_t)-0.970772141f,  (float16_t)0.240003022f,
+   (float16_t)-0.971503891f,  (float16_t)0.237023606f,
+   (float16_t)-0.972226497f,  (float16_t)0.234041959f,
+   (float16_t)-0.972939952f,  (float16_t)0.231058108f,
+   (float16_t)-0.973644250f,  (float16_t)0.228072083f,
+   (float16_t)-0.974339383f,  (float16_t)0.225083911f,
+   (float16_t)-0.975025345f,  (float16_t)0.222093621f,
+   (float16_t)-0.975702130f,  (float16_t)0.219101240f,
+   (float16_t)-0.976369731f,  (float16_t)0.216106797f,
+   (float16_t)-0.977028143f,  (float16_t)0.213110320f,
+   (float16_t)-0.977677358f,  (float16_t)0.210111837f,
+   (float16_t)-0.978317371f,  (float16_t)0.207111376f,
+   (float16_t)-0.978948175f,  (float16_t)0.204108966f,
+   (float16_t)-0.979569766f,  (float16_t)0.201104635f,
+   (float16_t)-0.980182136f,  (float16_t)0.198098411f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-0.981379193f,  (float16_t)0.192080397f,
+   (float16_t)-0.981963869f,  (float16_t)0.189068664f,
+   (float16_t)-0.982539302f,  (float16_t)0.186055152f,
+   (float16_t)-0.983105487f,  (float16_t)0.183039888f,
+   (float16_t)-0.983662419f,  (float16_t)0.180022901f,
+   (float16_t)-0.984210092f,  (float16_t)0.177004220f,
+   (float16_t)-0.984748502f,  (float16_t)0.173983873f,
+   (float16_t)-0.985277642f,  (float16_t)0.170961889f,
+   (float16_t)-0.985797509f,  (float16_t)0.167938295f,
+   (float16_t)-0.986308097f,  (float16_t)0.164913120f,
+   (float16_t)-0.986809402f,  (float16_t)0.161886394f,
+   (float16_t)-0.987301418f,  (float16_t)0.158858143f,
+   (float16_t)-0.987784142f,  (float16_t)0.155828398f,
+   (float16_t)-0.988257568f,  (float16_t)0.152797185f,
+   (float16_t)-0.988721692f,  (float16_t)0.149764535f,
+   (float16_t)-0.989176510f,  (float16_t)0.146730474f,
+   (float16_t)-0.989622017f,  (float16_t)0.143695033f,
+   (float16_t)-0.990058210f,  (float16_t)0.140658239f,
+   (float16_t)-0.990485084f,  (float16_t)0.137620122f,
+   (float16_t)-0.990902635f,  (float16_t)0.134580709f,
+   (float16_t)-0.991310860f,  (float16_t)0.131540029f,
+   (float16_t)-0.991709754f,  (float16_t)0.128498111f,
+   (float16_t)-0.992099313f,  (float16_t)0.125454983f,
+   (float16_t)-0.992479535f,  (float16_t)0.122410675f,
+   (float16_t)-0.992850414f,  (float16_t)0.119365215f,
+   (float16_t)-0.993211949f,  (float16_t)0.116318631f,
+   (float16_t)-0.993564136f,  (float16_t)0.113270952f,
+   (float16_t)-0.993906970f,  (float16_t)0.110222207f,
+   (float16_t)-0.994240449f,  (float16_t)0.107172425f,
+   (float16_t)-0.994564571f,  (float16_t)0.104121634f,
+   (float16_t)-0.994879331f,  (float16_t)0.101069863f,
+   (float16_t)-0.995184727f,  (float16_t)0.098017140f,
+   (float16_t)-0.995480755f,  (float16_t)0.094963495f,
+   (float16_t)-0.995767414f,  (float16_t)0.091908956f,
+   (float16_t)-0.996044701f,  (float16_t)0.088853553f,
+   (float16_t)-0.996312612f,  (float16_t)0.085797312f,
+   (float16_t)-0.996571146f,  (float16_t)0.082740265f,
+   (float16_t)-0.996820299f,  (float16_t)0.079682438f,
+   (float16_t)-0.997060070f,  (float16_t)0.076623861f,
+   (float16_t)-0.997290457f,  (float16_t)0.073564564f,
+   (float16_t)-0.997511456f,  (float16_t)0.070504573f,
+   (float16_t)-0.997723067f,  (float16_t)0.067443920f,
+   (float16_t)-0.997925286f,  (float16_t)0.064382631f,
+   (float16_t)-0.998118113f,  (float16_t)0.061320736f,
+   (float16_t)-0.998301545f,  (float16_t)0.058258265f,
+   (float16_t)-0.998475581f,  (float16_t)0.055195244f,
+   (float16_t)-0.998640218f,  (float16_t)0.052131705f,
+   (float16_t)-0.998795456f,  (float16_t)0.049067674f,
+   (float16_t)-0.998941293f,  (float16_t)0.046003182f,
+   (float16_t)-0.999077728f,  (float16_t)0.042938257f,
+   (float16_t)-0.999204759f,  (float16_t)0.039872928f,
+   (float16_t)-0.999322385f,  (float16_t)0.036807223f,
+   (float16_t)-0.999430605f,  (float16_t)0.033741172f,
+   (float16_t)-0.999529418f,  (float16_t)0.030674803f,
+   (float16_t)-0.999618822f,  (float16_t)0.027608146f,
+   (float16_t)-0.999698819f,  (float16_t)0.024541229f,
+   (float16_t)-0.999769405f,  (float16_t)0.021474080f,
+   (float16_t)-0.999830582f,  (float16_t)0.018406730f,
+   (float16_t)-0.999882347f,  (float16_t)0.015339206f,
+   (float16_t)-0.999924702f,  (float16_t)0.012271538f,
+   (float16_t)-0.999957645f,  (float16_t)0.009203755f,
+   (float16_t)-0.999981175f,  (float16_t)0.006135885f,
+   (float16_t)-0.999995294f,  (float16_t)0.003067957f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.999995294f, (float16_t)-0.003067957f,
+   (float16_t)-0.999981175f, (float16_t)-0.006135885f,
+   (float16_t)-0.999957645f, (float16_t)-0.009203755f,
+   (float16_t)-0.999924702f, (float16_t)-0.012271538f,
+   (float16_t)-0.999882347f, (float16_t)-0.015339206f,
+   (float16_t)-0.999830582f, (float16_t)-0.018406730f,
+   (float16_t)-0.999769405f, (float16_t)-0.021474080f,
+   (float16_t)-0.999698819f, (float16_t)-0.024541229f,
+   (float16_t)-0.999618822f, (float16_t)-0.027608146f,
+   (float16_t)-0.999529418f, (float16_t)-0.030674803f,
+   (float16_t)-0.999430605f, (float16_t)-0.033741172f,
+   (float16_t)-0.999322385f, (float16_t)-0.036807223f,
+   (float16_t)-0.999204759f, (float16_t)-0.039872928f,
+   (float16_t)-0.999077728f, (float16_t)-0.042938257f,
+   (float16_t)-0.998941293f, (float16_t)-0.046003182f,
+   (float16_t)-0.998795456f, (float16_t)-0.049067674f,
+   (float16_t)-0.998640218f, (float16_t)-0.052131705f,
+   (float16_t)-0.998475581f, (float16_t)-0.055195244f,
+   (float16_t)-0.998301545f, (float16_t)-0.058258265f,
+   (float16_t)-0.998118113f, (float16_t)-0.061320736f,
+   (float16_t)-0.997925286f, (float16_t)-0.064382631f,
+   (float16_t)-0.997723067f, (float16_t)-0.067443920f,
+   (float16_t)-0.997511456f, (float16_t)-0.070504573f,
+   (float16_t)-0.997290457f, (float16_t)-0.073564564f,
+   (float16_t)-0.997060070f, (float16_t)-0.076623861f,
+   (float16_t)-0.996820299f, (float16_t)-0.079682438f,
+   (float16_t)-0.996571146f, (float16_t)-0.082740265f,
+   (float16_t)-0.996312612f, (float16_t)-0.085797312f,
+   (float16_t)-0.996044701f, (float16_t)-0.088853553f,
+   (float16_t)-0.995767414f, (float16_t)-0.091908956f,
+   (float16_t)-0.995480755f, (float16_t)-0.094963495f,
+   (float16_t)-0.995184727f, (float16_t)-0.098017140f,
+   (float16_t)-0.994879331f, (float16_t)-0.101069863f,
+   (float16_t)-0.994564571f, (float16_t)-0.104121634f,
+   (float16_t)-0.994240449f, (float16_t)-0.107172425f,
+   (float16_t)-0.993906970f, (float16_t)-0.110222207f,
+   (float16_t)-0.993564136f, (float16_t)-0.113270952f,
+   (float16_t)-0.993211949f, (float16_t)-0.116318631f,
+   (float16_t)-0.992850414f, (float16_t)-0.119365215f,
+   (float16_t)-0.992479535f, (float16_t)-0.122410675f,
+   (float16_t)-0.992099313f, (float16_t)-0.125454983f,
+   (float16_t)-0.991709754f, (float16_t)-0.128498111f,
+   (float16_t)-0.991310860f, (float16_t)-0.131540029f,
+   (float16_t)-0.990902635f, (float16_t)-0.134580709f,
+   (float16_t)-0.990485084f, (float16_t)-0.137620122f,
+   (float16_t)-0.990058210f, (float16_t)-0.140658239f,
+   (float16_t)-0.989622017f, (float16_t)-0.143695033f,
+   (float16_t)-0.989176510f, (float16_t)-0.146730474f,
+   (float16_t)-0.988721692f, (float16_t)-0.149764535f,
+   (float16_t)-0.988257568f, (float16_t)-0.152797185f,
+   (float16_t)-0.987784142f, (float16_t)-0.155828398f,
+   (float16_t)-0.987301418f, (float16_t)-0.158858143f,
+   (float16_t)-0.986809402f, (float16_t)-0.161886394f,
+   (float16_t)-0.986308097f, (float16_t)-0.164913120f,
+   (float16_t)-0.985797509f, (float16_t)-0.167938295f,
+   (float16_t)-0.985277642f, (float16_t)-0.170961889f,
+   (float16_t)-0.984748502f, (float16_t)-0.173983873f,
+   (float16_t)-0.984210092f, (float16_t)-0.177004220f,
+   (float16_t)-0.983662419f, (float16_t)-0.180022901f,
+   (float16_t)-0.983105487f, (float16_t)-0.183039888f,
+   (float16_t)-0.982539302f, (float16_t)-0.186055152f,
+   (float16_t)-0.981963869f, (float16_t)-0.189068664f,
+   (float16_t)-0.981379193f, (float16_t)-0.192080397f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.980182136f, (float16_t)-0.198098411f,
+   (float16_t)-0.979569766f, (float16_t)-0.201104635f,
+   (float16_t)-0.978948175f, (float16_t)-0.204108966f,
+   (float16_t)-0.978317371f, (float16_t)-0.207111376f,
+   (float16_t)-0.977677358f, (float16_t)-0.210111837f,
+   (float16_t)-0.977028143f, (float16_t)-0.213110320f,
+   (float16_t)-0.976369731f, (float16_t)-0.216106797f,
+   (float16_t)-0.975702130f, (float16_t)-0.219101240f,
+   (float16_t)-0.975025345f, (float16_t)-0.222093621f,
+   (float16_t)-0.974339383f, (float16_t)-0.225083911f,
+   (float16_t)-0.973644250f, (float16_t)-0.228072083f,
+   (float16_t)-0.972939952f, (float16_t)-0.231058108f,
+   (float16_t)-0.972226497f, (float16_t)-0.234041959f,
+   (float16_t)-0.971503891f, (float16_t)-0.237023606f,
+   (float16_t)-0.970772141f, (float16_t)-0.240003022f,
+   (float16_t)-0.970031253f, (float16_t)-0.242980180f,
+   (float16_t)-0.969281235f, (float16_t)-0.245955050f,
+   (float16_t)-0.968522094f, (float16_t)-0.248927606f,
+   (float16_t)-0.967753837f, (float16_t)-0.251897818f,
+   (float16_t)-0.966976471f, (float16_t)-0.254865660f,
+   (float16_t)-0.966190003f, (float16_t)-0.257831102f,
+   (float16_t)-0.965394442f, (float16_t)-0.260794118f,
+   (float16_t)-0.964589793f, (float16_t)-0.263754679f,
+   (float16_t)-0.963776066f, (float16_t)-0.266712757f,
+   (float16_t)-0.962953267f, (float16_t)-0.269668326f,
+   (float16_t)-0.962121404f, (float16_t)-0.272621355f,
+   (float16_t)-0.961280486f, (float16_t)-0.275571819f,
+   (float16_t)-0.960430519f, (float16_t)-0.278519689f,
+   (float16_t)-0.959571513f, (float16_t)-0.281464938f,
+   (float16_t)-0.958703475f, (float16_t)-0.284407537f,
+   (float16_t)-0.957826413f, (float16_t)-0.287347460f,
+   (float16_t)-0.956940336f, (float16_t)-0.290284677f,
+   (float16_t)-0.956045251f, (float16_t)-0.293219163f,
+   (float16_t)-0.955141168f, (float16_t)-0.296150888f,
+   (float16_t)-0.954228095f, (float16_t)-0.299079826f,
+   (float16_t)-0.953306040f, (float16_t)-0.302005949f,
+   (float16_t)-0.952375013f, (float16_t)-0.304929230f,
+   (float16_t)-0.951435021f, (float16_t)-0.307849640f,
+   (float16_t)-0.950486074f, (float16_t)-0.310767153f,
+   (float16_t)-0.949528181f, (float16_t)-0.313681740f,
+   (float16_t)-0.948561350f, (float16_t)-0.316593376f,
+   (float16_t)-0.947585591f, (float16_t)-0.319502031f,
+   (float16_t)-0.946600913f, (float16_t)-0.322407679f,
+   (float16_t)-0.945607325f, (float16_t)-0.325310292f,
+   (float16_t)-0.944604837f, (float16_t)-0.328209844f,
+   (float16_t)-0.943593458f, (float16_t)-0.331106306f,
+   (float16_t)-0.942573198f, (float16_t)-0.333999651f,
+   (float16_t)-0.941544065f, (float16_t)-0.336889853f,
+   (float16_t)-0.940506071f, (float16_t)-0.339776884f,
+   (float16_t)-0.939459224f, (float16_t)-0.342660717f,
+   (float16_t)-0.938403534f, (float16_t)-0.345541325f,
+   (float16_t)-0.937339012f, (float16_t)-0.348418680f,
+   (float16_t)-0.936265667f, (float16_t)-0.351292756f,
+   (float16_t)-0.935183510f, (float16_t)-0.354163525f,
+   (float16_t)-0.934092550f, (float16_t)-0.357030961f,
+   (float16_t)-0.932992799f, (float16_t)-0.359895037f,
+   (float16_t)-0.931884266f, (float16_t)-0.362755724f,
+   (float16_t)-0.930766961f, (float16_t)-0.365612998f,
+   (float16_t)-0.929640896f, (float16_t)-0.368466830f,
+   (float16_t)-0.928506080f, (float16_t)-0.371317194f,
+   (float16_t)-0.927362526f, (float16_t)-0.374164063f,
+   (float16_t)-0.926210242f, (float16_t)-0.377007410f,
+   (float16_t)-0.925049241f, (float16_t)-0.379847209f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.922701128f, (float16_t)-0.385516054f,
+   (float16_t)-0.921514039f, (float16_t)-0.388345047f,
+   (float16_t)-0.920318277f, (float16_t)-0.391170384f,
+   (float16_t)-0.919113852f, (float16_t)-0.393992040f,
+   (float16_t)-0.917900776f, (float16_t)-0.396809987f,
+   (float16_t)-0.916679060f, (float16_t)-0.399624200f,
+   (float16_t)-0.915448716f, (float16_t)-0.402434651f,
+   (float16_t)-0.914209756f, (float16_t)-0.405241314f,
+   (float16_t)-0.912962190f, (float16_t)-0.408044163f,
+   (float16_t)-0.911706032f, (float16_t)-0.410843171f,
+   (float16_t)-0.910441292f, (float16_t)-0.413638312f,
+   (float16_t)-0.909167983f, (float16_t)-0.416429560f,
+   (float16_t)-0.907886116f, (float16_t)-0.419216888f,
+   (float16_t)-0.906595705f, (float16_t)-0.422000271f,
+   (float16_t)-0.905296759f, (float16_t)-0.424779681f,
+   (float16_t)-0.903989293f, (float16_t)-0.427555093f,
+   (float16_t)-0.902673318f, (float16_t)-0.430326481f,
+   (float16_t)-0.901348847f, (float16_t)-0.433093819f,
+   (float16_t)-0.900015892f, (float16_t)-0.435857080f,
+   (float16_t)-0.898674466f, (float16_t)-0.438616239f,
+   (float16_t)-0.897324581f, (float16_t)-0.441371269f,
+   (float16_t)-0.895966250f, (float16_t)-0.444122145f,
+   (float16_t)-0.894599486f, (float16_t)-0.446868840f,
+   (float16_t)-0.893224301f, (float16_t)-0.449611330f,
+   (float16_t)-0.891840709f, (float16_t)-0.452349587f,
+   (float16_t)-0.890448723f, (float16_t)-0.455083587f,
+   (float16_t)-0.889048356f, (float16_t)-0.457813304f,
+   (float16_t)-0.887639620f, (float16_t)-0.460538711f,
+   (float16_t)-0.886222530f, (float16_t)-0.463259784f,
+   (float16_t)-0.884797098f, (float16_t)-0.465976496f,
+   (float16_t)-0.883363339f, (float16_t)-0.468688822f,
+   (float16_t)-0.881921264f, (float16_t)-0.471396737f,
+   (float16_t)-0.880470889f, (float16_t)-0.474100215f,
+   (float16_t)-0.879012226f, (float16_t)-0.476799230f,
+   (float16_t)-0.877545290f, (float16_t)-0.479493758f,
+   (float16_t)-0.876070094f, (float16_t)-0.482183772f,
+   (float16_t)-0.874586652f, (float16_t)-0.484869248f,
+   (float16_t)-0.873094978f, (float16_t)-0.487550160f,
+   (float16_t)-0.871595087f, (float16_t)-0.490226483f,
+   (float16_t)-0.870086991f, (float16_t)-0.492898192f,
+   (float16_t)-0.868570706f, (float16_t)-0.495565262f,
+   (float16_t)-0.867046246f, (float16_t)-0.498227667f,
+   (float16_t)-0.865513624f, (float16_t)-0.500885383f,
+   (float16_t)-0.863972856f, (float16_t)-0.503538384f,
+   (float16_t)-0.862423956f, (float16_t)-0.506186645f,
+   (float16_t)-0.860866939f, (float16_t)-0.508830143f,
+   (float16_t)-0.859301818f, (float16_t)-0.511468850f,
+   (float16_t)-0.857728610f, (float16_t)-0.514102744f,
+   (float16_t)-0.856147328f, (float16_t)-0.516731799f,
+   (float16_t)-0.854557988f, (float16_t)-0.519355990f,
+   (float16_t)-0.852960605f, (float16_t)-0.521975293f,
+   (float16_t)-0.851355193f, (float16_t)-0.524589683f,
+   (float16_t)-0.849741768f, (float16_t)-0.527199135f,
+   (float16_t)-0.848120345f, (float16_t)-0.529803625f,
+   (float16_t)-0.846490939f, (float16_t)-0.532403128f,
+   (float16_t)-0.844853565f, (float16_t)-0.534997620f,
+   (float16_t)-0.843208240f, (float16_t)-0.537587076f,
+   (float16_t)-0.841554977f, (float16_t)-0.540171473f,
+   (float16_t)-0.839893794f, (float16_t)-0.542750785f,
+   (float16_t)-0.838224706f, (float16_t)-0.545324988f,
+   (float16_t)-0.836547727f, (float16_t)-0.547894059f,
+   (float16_t)-0.834862875f, (float16_t)-0.550457973f,
+   (float16_t)-0.833170165f, (float16_t)-0.553016706f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.829761234f, (float16_t)-0.558118531f,
+   (float16_t)-0.828045045f, (float16_t)-0.560661576f,
+   (float16_t)-0.826321063f, (float16_t)-0.563199344f,
+   (float16_t)-0.824589303f, (float16_t)-0.565731811f,
+   (float16_t)-0.822849781f, (float16_t)-0.568258953f,
+   (float16_t)-0.821102515f, (float16_t)-0.570780746f,
+   (float16_t)-0.819347520f, (float16_t)-0.573297167f,
+   (float16_t)-0.817584813f, (float16_t)-0.575808191f,
+   (float16_t)-0.815814411f, (float16_t)-0.578313796f,
+   (float16_t)-0.814036330f, (float16_t)-0.580813958f,
+   (float16_t)-0.812250587f, (float16_t)-0.583308653f,
+   (float16_t)-0.810457198f, (float16_t)-0.585797857f,
+   (float16_t)-0.808656182f, (float16_t)-0.588281548f,
+   (float16_t)-0.806847554f, (float16_t)-0.590759702f,
+   (float16_t)-0.805031331f, (float16_t)-0.593232295f,
+   (float16_t)-0.803207531f, (float16_t)-0.595699304f,
+   (float16_t)-0.801376172f, (float16_t)-0.598160707f,
+   (float16_t)-0.799537269f, (float16_t)-0.600616479f,
+   (float16_t)-0.797690841f, (float16_t)-0.603066599f,
+   (float16_t)-0.795836905f, (float16_t)-0.605511041f,
+   (float16_t)-0.793975478f, (float16_t)-0.607949785f,
+   (float16_t)-0.792106577f, (float16_t)-0.610382806f,
+   (float16_t)-0.790230221f, (float16_t)-0.612810082f,
+   (float16_t)-0.788346428f, (float16_t)-0.615231591f,
+   (float16_t)-0.786455214f, (float16_t)-0.617647308f,
+   (float16_t)-0.784556597f, (float16_t)-0.620057212f,
+   (float16_t)-0.782650596f, (float16_t)-0.622461279f,
+   (float16_t)-0.780737229f, (float16_t)-0.624859488f,
+   (float16_t)-0.778816512f, (float16_t)-0.627251815f,
+   (float16_t)-0.776888466f, (float16_t)-0.629638239f,
+   (float16_t)-0.774953107f, (float16_t)-0.632018736f,
+   (float16_t)-0.773010453f, (float16_t)-0.634393284f,
+   (float16_t)-0.771060524f, (float16_t)-0.636761861f,
+   (float16_t)-0.769103338f, (float16_t)-0.639124445f,
+   (float16_t)-0.767138912f, (float16_t)-0.641481013f,
+   (float16_t)-0.765167266f, (float16_t)-0.643831543f,
+   (float16_t)-0.763188417f, (float16_t)-0.646176013f,
+   (float16_t)-0.761202385f, (float16_t)-0.648514401f,
+   (float16_t)-0.759209189f, (float16_t)-0.650846685f,
+   (float16_t)-0.757208847f, (float16_t)-0.653172843f,
+   (float16_t)-0.755201377f, (float16_t)-0.655492853f,
+   (float16_t)-0.753186799f, (float16_t)-0.657806693f,
+   (float16_t)-0.751165132f, (float16_t)-0.660114342f,
+   (float16_t)-0.749136395f, (float16_t)-0.662415778f,
+   (float16_t)-0.747100606f, (float16_t)-0.664710978f,
+   (float16_t)-0.745057785f, (float16_t)-0.666999922f,
+   (float16_t)-0.743007952f, (float16_t)-0.669282588f,
+   (float16_t)-0.740951125f, (float16_t)-0.671558955f,
+   (float16_t)-0.738887324f, (float16_t)-0.673829000f,
+   (float16_t)-0.736816569f, (float16_t)-0.676092704f,
+   (float16_t)-0.734738878f, (float16_t)-0.678350043f,
+   (float16_t)-0.732654272f, (float16_t)-0.680600998f,
+   (float16_t)-0.730562769f, (float16_t)-0.682845546f,
+   (float16_t)-0.728464390f, (float16_t)-0.685083668f,
+   (float16_t)-0.726359155f, (float16_t)-0.687315341f,
+   (float16_t)-0.724247083f, (float16_t)-0.689540545f,
+   (float16_t)-0.722128194f, (float16_t)-0.691759258f,
+   (float16_t)-0.720002508f, (float16_t)-0.693971461f,
+   (float16_t)-0.717870045f, (float16_t)-0.696177131f,
+   (float16_t)-0.715730825f, (float16_t)-0.698376249f,
+   (float16_t)-0.713584869f, (float16_t)-0.700568794f,
+   (float16_t)-0.711432196f, (float16_t)-0.702754744f,
+   (float16_t)-0.709272826f, (float16_t)-0.704934080f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.704934080f, (float16_t)-0.709272826f,
+   (float16_t)-0.702754744f, (float16_t)-0.711432196f,
+   (float16_t)-0.700568794f, (float16_t)-0.713584869f,
+   (float16_t)-0.698376249f, (float16_t)-0.715730825f,
+   (float16_t)-0.696177131f, (float16_t)-0.717870045f,
+   (float16_t)-0.693971461f, (float16_t)-0.720002508f,
+   (float16_t)-0.691759258f, (float16_t)-0.722128194f,
+   (float16_t)-0.689540545f, (float16_t)-0.724247083f,
+   (float16_t)-0.687315341f, (float16_t)-0.726359155f,
+   (float16_t)-0.685083668f, (float16_t)-0.728464390f,
+   (float16_t)-0.682845546f, (float16_t)-0.730562769f,
+   (float16_t)-0.680600998f, (float16_t)-0.732654272f,
+   (float16_t)-0.678350043f, (float16_t)-0.734738878f,
+   (float16_t)-0.676092704f, (float16_t)-0.736816569f,
+   (float16_t)-0.673829000f, (float16_t)-0.738887324f,
+   (float16_t)-0.671558955f, (float16_t)-0.740951125f,
+   (float16_t)-0.669282588f, (float16_t)-0.743007952f,
+   (float16_t)-0.666999922f, (float16_t)-0.745057785f,
+   (float16_t)-0.664710978f, (float16_t)-0.747100606f,
+   (float16_t)-0.662415778f, (float16_t)-0.749136395f,
+   (float16_t)-0.660114342f, (float16_t)-0.751165132f,
+   (float16_t)-0.657806693f, (float16_t)-0.753186799f,
+   (float16_t)-0.655492853f, (float16_t)-0.755201377f,
+   (float16_t)-0.653172843f, (float16_t)-0.757208847f,
+   (float16_t)-0.650846685f, (float16_t)-0.759209189f,
+   (float16_t)-0.648514401f, (float16_t)-0.761202385f,
+   (float16_t)-0.646176013f, (float16_t)-0.763188417f,
+   (float16_t)-0.643831543f, (float16_t)-0.765167266f,
+   (float16_t)-0.641481013f, (float16_t)-0.767138912f,
+   (float16_t)-0.639124445f, (float16_t)-0.769103338f,
+   (float16_t)-0.636761861f, (float16_t)-0.771060524f,
+   (float16_t)-0.634393284f, (float16_t)-0.773010453f,
+   (float16_t)-0.632018736f, (float16_t)-0.774953107f,
+   (float16_t)-0.629638239f, (float16_t)-0.776888466f,
+   (float16_t)-0.627251815f, (float16_t)-0.778816512f,
+   (float16_t)-0.624859488f, (float16_t)-0.780737229f,
+   (float16_t)-0.622461279f, (float16_t)-0.782650596f,
+   (float16_t)-0.620057212f, (float16_t)-0.784556597f,
+   (float16_t)-0.617647308f, (float16_t)-0.786455214f,
+   (float16_t)-0.615231591f, (float16_t)-0.788346428f,
+   (float16_t)-0.612810082f, (float16_t)-0.790230221f,
+   (float16_t)-0.610382806f, (float16_t)-0.792106577f,
+   (float16_t)-0.607949785f, (float16_t)-0.793975478f,
+   (float16_t)-0.605511041f, (float16_t)-0.795836905f,
+   (float16_t)-0.603066599f, (float16_t)-0.797690841f,
+   (float16_t)-0.600616479f, (float16_t)-0.799537269f,
+   (float16_t)-0.598160707f, (float16_t)-0.801376172f,
+   (float16_t)-0.595699304f, (float16_t)-0.803207531f,
+   (float16_t)-0.593232295f, (float16_t)-0.805031331f,
+   (float16_t)-0.590759702f, (float16_t)-0.806847554f,
+   (float16_t)-0.588281548f, (float16_t)-0.808656182f,
+   (float16_t)-0.585797857f, (float16_t)-0.810457198f,
+   (float16_t)-0.583308653f, (float16_t)-0.812250587f,
+   (float16_t)-0.580813958f, (float16_t)-0.814036330f,
+   (float16_t)-0.578313796f, (float16_t)-0.815814411f,
+   (float16_t)-0.575808191f, (float16_t)-0.817584813f,
+   (float16_t)-0.573297167f, (float16_t)-0.819347520f,
+   (float16_t)-0.570780746f, (float16_t)-0.821102515f,
+   (float16_t)-0.568258953f, (float16_t)-0.822849781f,
+   (float16_t)-0.565731811f, (float16_t)-0.824589303f,
+   (float16_t)-0.563199344f, (float16_t)-0.826321063f,
+   (float16_t)-0.560661576f, (float16_t)-0.828045045f,
+   (float16_t)-0.558118531f, (float16_t)-0.829761234f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.553016706f, (float16_t)-0.833170165f,
+   (float16_t)-0.550457973f, (float16_t)-0.834862875f,
+   (float16_t)-0.547894059f, (float16_t)-0.836547727f,
+   (float16_t)-0.545324988f, (float16_t)-0.838224706f,
+   (float16_t)-0.542750785f, (float16_t)-0.839893794f,
+   (float16_t)-0.540171473f, (float16_t)-0.841554977f,
+   (float16_t)-0.537587076f, (float16_t)-0.843208240f,
+   (float16_t)-0.534997620f, (float16_t)-0.844853565f,
+   (float16_t)-0.532403128f, (float16_t)-0.846490939f,
+   (float16_t)-0.529803625f, (float16_t)-0.848120345f,
+   (float16_t)-0.527199135f, (float16_t)-0.849741768f,
+   (float16_t)-0.524589683f, (float16_t)-0.851355193f,
+   (float16_t)-0.521975293f, (float16_t)-0.852960605f,
+   (float16_t)-0.519355990f, (float16_t)-0.854557988f,
+   (float16_t)-0.516731799f, (float16_t)-0.856147328f,
+   (float16_t)-0.514102744f, (float16_t)-0.857728610f,
+   (float16_t)-0.511468850f, (float16_t)-0.859301818f,
+   (float16_t)-0.508830143f, (float16_t)-0.860866939f,
+   (float16_t)-0.506186645f, (float16_t)-0.862423956f,
+   (float16_t)-0.503538384f, (float16_t)-0.863972856f,
+   (float16_t)-0.500885383f, (float16_t)-0.865513624f,
+   (float16_t)-0.498227667f, (float16_t)-0.867046246f,
+   (float16_t)-0.495565262f, (float16_t)-0.868570706f,
+   (float16_t)-0.492898192f, (float16_t)-0.870086991f,
+   (float16_t)-0.490226483f, (float16_t)-0.871595087f,
+   (float16_t)-0.487550160f, (float16_t)-0.873094978f,
+   (float16_t)-0.484869248f, (float16_t)-0.874586652f,
+   (float16_t)-0.482183772f, (float16_t)-0.876070094f,
+   (float16_t)-0.479493758f, (float16_t)-0.877545290f,
+   (float16_t)-0.476799230f, (float16_t)-0.879012226f,
+   (float16_t)-0.474100215f, (float16_t)-0.880470889f,
+   (float16_t)-0.471396737f, (float16_t)-0.881921264f,
+   (float16_t)-0.468688822f, (float16_t)-0.883363339f,
+   (float16_t)-0.465976496f, (float16_t)-0.884797098f,
+   (float16_t)-0.463259784f, (float16_t)-0.886222530f,
+   (float16_t)-0.460538711f, (float16_t)-0.887639620f,
+   (float16_t)-0.457813304f, (float16_t)-0.889048356f,
+   (float16_t)-0.455083587f, (float16_t)-0.890448723f,
+   (float16_t)-0.452349587f, (float16_t)-0.891840709f,
+   (float16_t)-0.449611330f, (float16_t)-0.893224301f,
+   (float16_t)-0.446868840f, (float16_t)-0.894599486f,
+   (float16_t)-0.444122145f, (float16_t)-0.895966250f,
+   (float16_t)-0.441371269f, (float16_t)-0.897324581f,
+   (float16_t)-0.438616239f, (float16_t)-0.898674466f,
+   (float16_t)-0.435857080f, (float16_t)-0.900015892f,
+   (float16_t)-0.433093819f, (float16_t)-0.901348847f,
+   (float16_t)-0.430326481f, (float16_t)-0.902673318f,
+   (float16_t)-0.427555093f, (float16_t)-0.903989293f,
+   (float16_t)-0.424779681f, (float16_t)-0.905296759f,
+   (float16_t)-0.422000271f, (float16_t)-0.906595705f,
+   (float16_t)-0.419216888f, (float16_t)-0.907886116f,
+   (float16_t)-0.416429560f, (float16_t)-0.909167983f,
+   (float16_t)-0.413638312f, (float16_t)-0.910441292f,
+   (float16_t)-0.410843171f, (float16_t)-0.911706032f,
+   (float16_t)-0.408044163f, (float16_t)-0.912962190f,
+   (float16_t)-0.405241314f, (float16_t)-0.914209756f,
+   (float16_t)-0.402434651f, (float16_t)-0.915448716f,
+   (float16_t)-0.399624200f, (float16_t)-0.916679060f,
+   (float16_t)-0.396809987f, (float16_t)-0.917900776f,
+   (float16_t)-0.393992040f, (float16_t)-0.919113852f,
+   (float16_t)-0.391170384f, (float16_t)-0.920318277f,
+   (float16_t)-0.388345047f, (float16_t)-0.921514039f,
+   (float16_t)-0.385516054f, (float16_t)-0.922701128f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.379847209f, (float16_t)-0.925049241f,
+   (float16_t)-0.377007410f, (float16_t)-0.926210242f,
+   (float16_t)-0.374164063f, (float16_t)-0.927362526f,
+   (float16_t)-0.371317194f, (float16_t)-0.928506080f,
+   (float16_t)-0.368466830f, (float16_t)-0.929640896f,
+   (float16_t)-0.365612998f, (float16_t)-0.930766961f,
+   (float16_t)-0.362755724f, (float16_t)-0.931884266f,
+   (float16_t)-0.359895037f, (float16_t)-0.932992799f,
+   (float16_t)-0.357030961f, (float16_t)-0.934092550f,
+   (float16_t)-0.354163525f, (float16_t)-0.935183510f,
+   (float16_t)-0.351292756f, (float16_t)-0.936265667f,
+   (float16_t)-0.348418680f, (float16_t)-0.937339012f,
+   (float16_t)-0.345541325f, (float16_t)-0.938403534f,
+   (float16_t)-0.342660717f, (float16_t)-0.939459224f,
+   (float16_t)-0.339776884f, (float16_t)-0.940506071f,
+   (float16_t)-0.336889853f, (float16_t)-0.941544065f,
+   (float16_t)-0.333999651f, (float16_t)-0.942573198f,
+   (float16_t)-0.331106306f, (float16_t)-0.943593458f,
+   (float16_t)-0.328209844f, (float16_t)-0.944604837f,
+   (float16_t)-0.325310292f, (float16_t)-0.945607325f,
+   (float16_t)-0.322407679f, (float16_t)-0.946600913f,
+   (float16_t)-0.319502031f, (float16_t)-0.947585591f,
+   (float16_t)-0.316593376f, (float16_t)-0.948561350f,
+   (float16_t)-0.313681740f, (float16_t)-0.949528181f,
+   (float16_t)-0.310767153f, (float16_t)-0.950486074f,
+   (float16_t)-0.307849640f, (float16_t)-0.951435021f,
+   (float16_t)-0.304929230f, (float16_t)-0.952375013f,
+   (float16_t)-0.302005949f, (float16_t)-0.953306040f,
+   (float16_t)-0.299079826f, (float16_t)-0.954228095f,
+   (float16_t)-0.296150888f, (float16_t)-0.955141168f,
+   (float16_t)-0.293219163f, (float16_t)-0.956045251f,
+   (float16_t)-0.290284677f, (float16_t)-0.956940336f,
+   (float16_t)-0.287347460f, (float16_t)-0.957826413f,
+   (float16_t)-0.284407537f, (float16_t)-0.958703475f,
+   (float16_t)-0.281464938f, (float16_t)-0.959571513f,
+   (float16_t)-0.278519689f, (float16_t)-0.960430519f,
+   (float16_t)-0.275571819f, (float16_t)-0.961280486f,
+   (float16_t)-0.272621355f, (float16_t)-0.962121404f,
+   (float16_t)-0.269668326f, (float16_t)-0.962953267f,
+   (float16_t)-0.266712757f, (float16_t)-0.963776066f,
+   (float16_t)-0.263754679f, (float16_t)-0.964589793f,
+   (float16_t)-0.260794118f, (float16_t)-0.965394442f,
+   (float16_t)-0.257831102f, (float16_t)-0.966190003f,
+   (float16_t)-0.254865660f, (float16_t)-0.966976471f,
+   (float16_t)-0.251897818f, (float16_t)-0.967753837f,
+   (float16_t)-0.248927606f, (float16_t)-0.968522094f,
+   (float16_t)-0.245955050f, (float16_t)-0.969281235f,
+   (float16_t)-0.242980180f, (float16_t)-0.970031253f,
+   (float16_t)-0.240003022f, (float16_t)-0.970772141f,
+   (float16_t)-0.237023606f, (float16_t)-0.971503891f,
+   (float16_t)-0.234041959f, (float16_t)-0.972226497f,
+   (float16_t)-0.231058108f, (float16_t)-0.972939952f,
+   (float16_t)-0.228072083f, (float16_t)-0.973644250f,
+   (float16_t)-0.225083911f, (float16_t)-0.974339383f,
+   (float16_t)-0.222093621f, (float16_t)-0.975025345f,
+   (float16_t)-0.219101240f, (float16_t)-0.975702130f,
+   (float16_t)-0.216106797f, (float16_t)-0.976369731f,
+   (float16_t)-0.213110320f, (float16_t)-0.977028143f,
+   (float16_t)-0.210111837f, (float16_t)-0.977677358f,
+   (float16_t)-0.207111376f, (float16_t)-0.978317371f,
+   (float16_t)-0.204108966f, (float16_t)-0.978948175f,
+   (float16_t)-0.201104635f, (float16_t)-0.979569766f,
+   (float16_t)-0.198098411f, (float16_t)-0.980182136f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.192080397f, (float16_t)-0.981379193f,
+   (float16_t)-0.189068664f, (float16_t)-0.981963869f,
+   (float16_t)-0.186055152f, (float16_t)-0.982539302f,
+   (float16_t)-0.183039888f, (float16_t)-0.983105487f,
+   (float16_t)-0.180022901f, (float16_t)-0.983662419f,
+   (float16_t)-0.177004220f, (float16_t)-0.984210092f,
+   (float16_t)-0.173983873f, (float16_t)-0.984748502f,
+   (float16_t)-0.170961889f, (float16_t)-0.985277642f,
+   (float16_t)-0.167938295f, (float16_t)-0.985797509f,
+   (float16_t)-0.164913120f, (float16_t)-0.986308097f,
+   (float16_t)-0.161886394f, (float16_t)-0.986809402f,
+   (float16_t)-0.158858143f, (float16_t)-0.987301418f,
+   (float16_t)-0.155828398f, (float16_t)-0.987784142f,
+   (float16_t)-0.152797185f, (float16_t)-0.988257568f,
+   (float16_t)-0.149764535f, (float16_t)-0.988721692f,
+   (float16_t)-0.146730474f, (float16_t)-0.989176510f,
+   (float16_t)-0.143695033f, (float16_t)-0.989622017f,
+   (float16_t)-0.140658239f, (float16_t)-0.990058210f,
+   (float16_t)-0.137620122f, (float16_t)-0.990485084f,
+   (float16_t)-0.134580709f, (float16_t)-0.990902635f,
+   (float16_t)-0.131540029f, (float16_t)-0.991310860f,
+   (float16_t)-0.128498111f, (float16_t)-0.991709754f,
+   (float16_t)-0.125454983f, (float16_t)-0.992099313f,
+   (float16_t)-0.122410675f, (float16_t)-0.992479535f,
+   (float16_t)-0.119365215f, (float16_t)-0.992850414f,
+   (float16_t)-0.116318631f, (float16_t)-0.993211949f,
+   (float16_t)-0.113270952f, (float16_t)-0.993564136f,
+   (float16_t)-0.110222207f, (float16_t)-0.993906970f,
+   (float16_t)-0.107172425f, (float16_t)-0.994240449f,
+   (float16_t)-0.104121634f, (float16_t)-0.994564571f,
+   (float16_t)-0.101069863f, (float16_t)-0.994879331f,
+   (float16_t)-0.098017140f, (float16_t)-0.995184727f,
+   (float16_t)-0.094963495f, (float16_t)-0.995480755f,
+   (float16_t)-0.091908956f, (float16_t)-0.995767414f,
+   (float16_t)-0.088853553f, (float16_t)-0.996044701f,
+   (float16_t)-0.085797312f, (float16_t)-0.996312612f,
+   (float16_t)-0.082740265f, (float16_t)-0.996571146f,
+   (float16_t)-0.079682438f, (float16_t)-0.996820299f,
+   (float16_t)-0.076623861f, (float16_t)-0.997060070f,
+   (float16_t)-0.073564564f, (float16_t)-0.997290457f,
+   (float16_t)-0.070504573f, (float16_t)-0.997511456f,
+   (float16_t)-0.067443920f, (float16_t)-0.997723067f,
+   (float16_t)-0.064382631f, (float16_t)-0.997925286f,
+   (float16_t)-0.061320736f, (float16_t)-0.998118113f,
+   (float16_t)-0.058258265f, (float16_t)-0.998301545f,
+   (float16_t)-0.055195244f, (float16_t)-0.998475581f,
+   (float16_t)-0.052131705f, (float16_t)-0.998640218f,
+   (float16_t)-0.049067674f, (float16_t)-0.998795456f,
+   (float16_t)-0.046003182f, (float16_t)-0.998941293f,
+   (float16_t)-0.042938257f, (float16_t)-0.999077728f,
+   (float16_t)-0.039872928f, (float16_t)-0.999204759f,
+   (float16_t)-0.036807223f, (float16_t)-0.999322385f,
+   (float16_t)-0.033741172f, (float16_t)-0.999430605f,
+   (float16_t)-0.030674803f, (float16_t)-0.999529418f,
+   (float16_t)-0.027608146f, (float16_t)-0.999618822f,
+   (float16_t)-0.024541229f, (float16_t)-0.999698819f,
+   (float16_t)-0.021474080f, (float16_t)-0.999769405f,
+   (float16_t)-0.018406730f, (float16_t)-0.999830582f,
+   (float16_t)-0.015339206f, (float16_t)-0.999882347f,
+   (float16_t)-0.012271538f, (float16_t)-0.999924702f,
+   (float16_t)-0.009203755f, (float16_t)-0.999957645f,
+   (float16_t)-0.006135885f, (float16_t)-0.999981175f,
+   (float16_t)-0.003067957f, (float16_t)-0.999995294f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.003067957f, (float16_t)-0.999995294f,
+    (float16_t)0.006135885f, (float16_t)-0.999981175f,
+    (float16_t)0.009203755f, (float16_t)-0.999957645f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f,
+    (float16_t)0.015339206f, (float16_t)-0.999882347f,
+    (float16_t)0.018406730f, (float16_t)-0.999830582f,
+    (float16_t)0.021474080f, (float16_t)-0.999769405f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.027608146f, (float16_t)-0.999618822f,
+    (float16_t)0.030674803f, (float16_t)-0.999529418f,
+    (float16_t)0.033741172f, (float16_t)-0.999430605f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.039872928f, (float16_t)-0.999204759f,
+    (float16_t)0.042938257f, (float16_t)-0.999077728f,
+    (float16_t)0.046003182f, (float16_t)-0.998941293f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.052131705f, (float16_t)-0.998640218f,
+    (float16_t)0.055195244f, (float16_t)-0.998475581f,
+    (float16_t)0.058258265f, (float16_t)-0.998301545f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.064382631f, (float16_t)-0.997925286f,
+    (float16_t)0.067443920f, (float16_t)-0.997723067f,
+    (float16_t)0.070504573f, (float16_t)-0.997511456f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.076623861f, (float16_t)-0.997060070f,
+    (float16_t)0.079682438f, (float16_t)-0.996820299f,
+    (float16_t)0.082740265f, (float16_t)-0.996571146f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.088853553f, (float16_t)-0.996044701f,
+    (float16_t)0.091908956f, (float16_t)-0.995767414f,
+    (float16_t)0.094963495f, (float16_t)-0.995480755f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.101069863f, (float16_t)-0.994879331f,
+    (float16_t)0.104121634f, (float16_t)-0.994564571f,
+    (float16_t)0.107172425f, (float16_t)-0.994240449f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.113270952f, (float16_t)-0.993564136f,
+    (float16_t)0.116318631f, (float16_t)-0.993211949f,
+    (float16_t)0.119365215f, (float16_t)-0.992850414f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.125454983f, (float16_t)-0.992099313f,
+    (float16_t)0.128498111f, (float16_t)-0.991709754f,
+    (float16_t)0.131540029f, (float16_t)-0.991310860f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.137620122f, (float16_t)-0.990485084f,
+    (float16_t)0.140658239f, (float16_t)-0.990058210f,
+    (float16_t)0.143695033f, (float16_t)-0.989622017f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.149764535f, (float16_t)-0.988721692f,
+    (float16_t)0.152797185f, (float16_t)-0.988257568f,
+    (float16_t)0.155828398f, (float16_t)-0.987784142f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.161886394f, (float16_t)-0.986809402f,
+    (float16_t)0.164913120f, (float16_t)-0.986308097f,
+    (float16_t)0.167938295f, (float16_t)-0.985797509f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.173983873f, (float16_t)-0.984748502f,
+    (float16_t)0.177004220f, (float16_t)-0.984210092f,
+    (float16_t)0.180022901f, (float16_t)-0.983662419f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.186055152f, (float16_t)-0.982539302f,
+    (float16_t)0.189068664f, (float16_t)-0.981963869f,
+    (float16_t)0.192080397f, (float16_t)-0.981379193f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.198098411f, (float16_t)-0.980182136f,
+    (float16_t)0.201104635f, (float16_t)-0.979569766f,
+    (float16_t)0.204108966f, (float16_t)-0.978948175f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.210111837f, (float16_t)-0.977677358f,
+    (float16_t)0.213110320f, (float16_t)-0.977028143f,
+    (float16_t)0.216106797f, (float16_t)-0.976369731f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.222093621f, (float16_t)-0.975025345f,
+    (float16_t)0.225083911f, (float16_t)-0.974339383f,
+    (float16_t)0.228072083f, (float16_t)-0.973644250f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.234041959f, (float16_t)-0.972226497f,
+    (float16_t)0.237023606f, (float16_t)-0.971503891f,
+    (float16_t)0.240003022f, (float16_t)-0.970772141f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.245955050f, (float16_t)-0.969281235f,
+    (float16_t)0.248927606f, (float16_t)-0.968522094f,
+    (float16_t)0.251897818f, (float16_t)-0.967753837f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.257831102f, (float16_t)-0.966190003f,
+    (float16_t)0.260794118f, (float16_t)-0.965394442f,
+    (float16_t)0.263754679f, (float16_t)-0.964589793f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.269668326f, (float16_t)-0.962953267f,
+    (float16_t)0.272621355f, (float16_t)-0.962121404f,
+    (float16_t)0.275571819f, (float16_t)-0.961280486f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.281464938f, (float16_t)-0.959571513f,
+    (float16_t)0.284407537f, (float16_t)-0.958703475f,
+    (float16_t)0.287347460f, (float16_t)-0.957826413f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.293219163f, (float16_t)-0.956045251f,
+    (float16_t)0.296150888f, (float16_t)-0.955141168f,
+    (float16_t)0.299079826f, (float16_t)-0.954228095f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.304929230f, (float16_t)-0.952375013f,
+    (float16_t)0.307849640f, (float16_t)-0.951435021f,
+    (float16_t)0.310767153f, (float16_t)-0.950486074f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.316593376f, (float16_t)-0.948561350f,
+    (float16_t)0.319502031f, (float16_t)-0.947585591f,
+    (float16_t)0.322407679f, (float16_t)-0.946600913f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.328209844f, (float16_t)-0.944604837f,
+    (float16_t)0.331106306f, (float16_t)-0.943593458f,
+    (float16_t)0.333999651f, (float16_t)-0.942573198f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.339776884f, (float16_t)-0.940506071f,
+    (float16_t)0.342660717f, (float16_t)-0.939459224f,
+    (float16_t)0.345541325f, (float16_t)-0.938403534f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.351292756f, (float16_t)-0.936265667f,
+    (float16_t)0.354163525f, (float16_t)-0.935183510f,
+    (float16_t)0.357030961f, (float16_t)-0.934092550f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.362755724f, (float16_t)-0.931884266f,
+    (float16_t)0.365612998f, (float16_t)-0.930766961f,
+    (float16_t)0.368466830f, (float16_t)-0.929640896f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.374164063f, (float16_t)-0.927362526f,
+    (float16_t)0.377007410f, (float16_t)-0.926210242f,
+    (float16_t)0.379847209f, (float16_t)-0.925049241f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.385516054f, (float16_t)-0.922701128f,
+    (float16_t)0.388345047f, (float16_t)-0.921514039f,
+    (float16_t)0.391170384f, (float16_t)-0.920318277f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.396809987f, (float16_t)-0.917900776f,
+    (float16_t)0.399624200f, (float16_t)-0.916679060f,
+    (float16_t)0.402434651f, (float16_t)-0.915448716f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.408044163f, (float16_t)-0.912962190f,
+    (float16_t)0.410843171f, (float16_t)-0.911706032f,
+    (float16_t)0.413638312f, (float16_t)-0.910441292f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.419216888f, (float16_t)-0.907886116f,
+    (float16_t)0.422000271f, (float16_t)-0.906595705f,
+    (float16_t)0.424779681f, (float16_t)-0.905296759f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.430326481f, (float16_t)-0.902673318f,
+    (float16_t)0.433093819f, (float16_t)-0.901348847f,
+    (float16_t)0.435857080f, (float16_t)-0.900015892f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.441371269f, (float16_t)-0.897324581f,
+    (float16_t)0.444122145f, (float16_t)-0.895966250f,
+    (float16_t)0.446868840f, (float16_t)-0.894599486f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.452349587f, (float16_t)-0.891840709f,
+    (float16_t)0.455083587f, (float16_t)-0.890448723f,
+    (float16_t)0.457813304f, (float16_t)-0.889048356f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.463259784f, (float16_t)-0.886222530f,
+    (float16_t)0.465976496f, (float16_t)-0.884797098f,
+    (float16_t)0.468688822f, (float16_t)-0.883363339f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.474100215f, (float16_t)-0.880470889f,
+    (float16_t)0.476799230f, (float16_t)-0.879012226f,
+    (float16_t)0.479493758f, (float16_t)-0.877545290f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.484869248f, (float16_t)-0.874586652f,
+    (float16_t)0.487550160f, (float16_t)-0.873094978f,
+    (float16_t)0.490226483f, (float16_t)-0.871595087f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.495565262f, (float16_t)-0.868570706f,
+    (float16_t)0.498227667f, (float16_t)-0.867046246f,
+    (float16_t)0.500885383f, (float16_t)-0.865513624f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.506186645f, (float16_t)-0.862423956f,
+    (float16_t)0.508830143f, (float16_t)-0.860866939f,
+    (float16_t)0.511468850f, (float16_t)-0.859301818f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.516731799f, (float16_t)-0.856147328f,
+    (float16_t)0.519355990f, (float16_t)-0.854557988f,
+    (float16_t)0.521975293f, (float16_t)-0.852960605f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.527199135f, (float16_t)-0.849741768f,
+    (float16_t)0.529803625f, (float16_t)-0.848120345f,
+    (float16_t)0.532403128f, (float16_t)-0.846490939f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.537587076f, (float16_t)-0.843208240f,
+    (float16_t)0.540171473f, (float16_t)-0.841554977f,
+    (float16_t)0.542750785f, (float16_t)-0.839893794f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.547894059f, (float16_t)-0.836547727f,
+    (float16_t)0.550457973f, (float16_t)-0.834862875f,
+    (float16_t)0.553016706f, (float16_t)-0.833170165f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.558118531f, (float16_t)-0.829761234f,
+    (float16_t)0.560661576f, (float16_t)-0.828045045f,
+    (float16_t)0.563199344f, (float16_t)-0.826321063f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.568258953f, (float16_t)-0.822849781f,
+    (float16_t)0.570780746f, (float16_t)-0.821102515f,
+    (float16_t)0.573297167f, (float16_t)-0.819347520f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.578313796f, (float16_t)-0.815814411f,
+    (float16_t)0.580813958f, (float16_t)-0.814036330f,
+    (float16_t)0.583308653f, (float16_t)-0.812250587f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.588281548f, (float16_t)-0.808656182f,
+    (float16_t)0.590759702f, (float16_t)-0.806847554f,
+    (float16_t)0.593232295f, (float16_t)-0.805031331f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.598160707f, (float16_t)-0.801376172f,
+    (float16_t)0.600616479f, (float16_t)-0.799537269f,
+    (float16_t)0.603066599f, (float16_t)-0.797690841f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.607949785f, (float16_t)-0.793975478f,
+    (float16_t)0.610382806f, (float16_t)-0.792106577f,
+    (float16_t)0.612810082f, (float16_t)-0.790230221f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.617647308f, (float16_t)-0.786455214f,
+    (float16_t)0.620057212f, (float16_t)-0.784556597f,
+    (float16_t)0.622461279f, (float16_t)-0.782650596f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.627251815f, (float16_t)-0.778816512f,
+    (float16_t)0.629638239f, (float16_t)-0.776888466f,
+    (float16_t)0.632018736f, (float16_t)-0.774953107f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.636761861f, (float16_t)-0.771060524f,
+    (float16_t)0.639124445f, (float16_t)-0.769103338f,
+    (float16_t)0.641481013f, (float16_t)-0.767138912f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.646176013f, (float16_t)-0.763188417f,
+    (float16_t)0.648514401f, (float16_t)-0.761202385f,
+    (float16_t)0.650846685f, (float16_t)-0.759209189f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.655492853f, (float16_t)-0.755201377f,
+    (float16_t)0.657806693f, (float16_t)-0.753186799f,
+    (float16_t)0.660114342f, (float16_t)-0.751165132f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.664710978f, (float16_t)-0.747100606f,
+    (float16_t)0.666999922f, (float16_t)-0.745057785f,
+    (float16_t)0.669282588f, (float16_t)-0.743007952f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.673829000f, (float16_t)-0.738887324f,
+    (float16_t)0.676092704f, (float16_t)-0.736816569f,
+    (float16_t)0.678350043f, (float16_t)-0.734738878f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.682845546f, (float16_t)-0.730562769f,
+    (float16_t)0.685083668f, (float16_t)-0.728464390f,
+    (float16_t)0.687315341f, (float16_t)-0.726359155f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.691759258f, (float16_t)-0.722128194f,
+    (float16_t)0.693971461f, (float16_t)-0.720002508f,
+    (float16_t)0.696177131f, (float16_t)-0.717870045f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.700568794f, (float16_t)-0.713584869f,
+    (float16_t)0.702754744f, (float16_t)-0.711432196f,
+    (float16_t)0.704934080f, (float16_t)-0.709272826f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.709272826f, (float16_t)-0.704934080f,
+    (float16_t)0.711432196f, (float16_t)-0.702754744f,
+    (float16_t)0.713584869f, (float16_t)-0.700568794f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.717870045f, (float16_t)-0.696177131f,
+    (float16_t)0.720002508f, (float16_t)-0.693971461f,
+    (float16_t)0.722128194f, (float16_t)-0.691759258f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.726359155f, (float16_t)-0.687315341f,
+    (float16_t)0.728464390f, (float16_t)-0.685083668f,
+    (float16_t)0.730562769f, (float16_t)-0.682845546f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.734738878f, (float16_t)-0.678350043f,
+    (float16_t)0.736816569f, (float16_t)-0.676092704f,
+    (float16_t)0.738887324f, (float16_t)-0.673829000f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.743007952f, (float16_t)-0.669282588f,
+    (float16_t)0.745057785f, (float16_t)-0.666999922f,
+    (float16_t)0.747100606f, (float16_t)-0.664710978f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.751165132f, (float16_t)-0.660114342f,
+    (float16_t)0.753186799f, (float16_t)-0.657806693f,
+    (float16_t)0.755201377f, (float16_t)-0.655492853f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.759209189f, (float16_t)-0.650846685f,
+    (float16_t)0.761202385f, (float16_t)-0.648514401f,
+    (float16_t)0.763188417f, (float16_t)-0.646176013f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.767138912f, (float16_t)-0.641481013f,
+    (float16_t)0.769103338f, (float16_t)-0.639124445f,
+    (float16_t)0.771060524f, (float16_t)-0.636761861f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.774953107f, (float16_t)-0.632018736f,
+    (float16_t)0.776888466f, (float16_t)-0.629638239f,
+    (float16_t)0.778816512f, (float16_t)-0.627251815f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.782650596f, (float16_t)-0.622461279f,
+    (float16_t)0.784556597f, (float16_t)-0.620057212f,
+    (float16_t)0.786455214f, (float16_t)-0.617647308f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.790230221f, (float16_t)-0.612810082f,
+    (float16_t)0.792106577f, (float16_t)-0.610382806f,
+    (float16_t)0.793975478f, (float16_t)-0.607949785f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.797690841f, (float16_t)-0.603066599f,
+    (float16_t)0.799537269f, (float16_t)-0.600616479f,
+    (float16_t)0.801376172f, (float16_t)-0.598160707f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.805031331f, (float16_t)-0.593232295f,
+    (float16_t)0.806847554f, (float16_t)-0.590759702f,
+    (float16_t)0.808656182f, (float16_t)-0.588281548f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.812250587f, (float16_t)-0.583308653f,
+    (float16_t)0.814036330f, (float16_t)-0.580813958f,
+    (float16_t)0.815814411f, (float16_t)-0.578313796f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.819347520f, (float16_t)-0.573297167f,
+    (float16_t)0.821102515f, (float16_t)-0.570780746f,
+    (float16_t)0.822849781f, (float16_t)-0.568258953f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.826321063f, (float16_t)-0.563199344f,
+    (float16_t)0.828045045f, (float16_t)-0.560661576f,
+    (float16_t)0.829761234f, (float16_t)-0.558118531f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.833170165f, (float16_t)-0.553016706f,
+    (float16_t)0.834862875f, (float16_t)-0.550457973f,
+    (float16_t)0.836547727f, (float16_t)-0.547894059f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.839893794f, (float16_t)-0.542750785f,
+    (float16_t)0.841554977f, (float16_t)-0.540171473f,
+    (float16_t)0.843208240f, (float16_t)-0.537587076f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.846490939f, (float16_t)-0.532403128f,
+    (float16_t)0.848120345f, (float16_t)-0.529803625f,
+    (float16_t)0.849741768f, (float16_t)-0.527199135f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.852960605f, (float16_t)-0.521975293f,
+    (float16_t)0.854557988f, (float16_t)-0.519355990f,
+    (float16_t)0.856147328f, (float16_t)-0.516731799f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.859301818f, (float16_t)-0.511468850f,
+    (float16_t)0.860866939f, (float16_t)-0.508830143f,
+    (float16_t)0.862423956f, (float16_t)-0.506186645f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.865513624f, (float16_t)-0.500885383f,
+    (float16_t)0.867046246f, (float16_t)-0.498227667f,
+    (float16_t)0.868570706f, (float16_t)-0.495565262f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.871595087f, (float16_t)-0.490226483f,
+    (float16_t)0.873094978f, (float16_t)-0.487550160f,
+    (float16_t)0.874586652f, (float16_t)-0.484869248f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.877545290f, (float16_t)-0.479493758f,
+    (float16_t)0.879012226f, (float16_t)-0.476799230f,
+    (float16_t)0.880470889f, (float16_t)-0.474100215f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.883363339f, (float16_t)-0.468688822f,
+    (float16_t)0.884797098f, (float16_t)-0.465976496f,
+    (float16_t)0.886222530f, (float16_t)-0.463259784f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.889048356f, (float16_t)-0.457813304f,
+    (float16_t)0.890448723f, (float16_t)-0.455083587f,
+    (float16_t)0.891840709f, (float16_t)-0.452349587f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.894599486f, (float16_t)-0.446868840f,
+    (float16_t)0.895966250f, (float16_t)-0.444122145f,
+    (float16_t)0.897324581f, (float16_t)-0.441371269f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.900015892f, (float16_t)-0.435857080f,
+    (float16_t)0.901348847f, (float16_t)-0.433093819f,
+    (float16_t)0.902673318f, (float16_t)-0.430326481f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.905296759f, (float16_t)-0.424779681f,
+    (float16_t)0.906595705f, (float16_t)-0.422000271f,
+    (float16_t)0.907886116f, (float16_t)-0.419216888f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.910441292f, (float16_t)-0.413638312f,
+    (float16_t)0.911706032f, (float16_t)-0.410843171f,
+    (float16_t)0.912962190f, (float16_t)-0.408044163f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.915448716f, (float16_t)-0.402434651f,
+    (float16_t)0.916679060f, (float16_t)-0.399624200f,
+    (float16_t)0.917900776f, (float16_t)-0.396809987f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.920318277f, (float16_t)-0.391170384f,
+    (float16_t)0.921514039f, (float16_t)-0.388345047f,
+    (float16_t)0.922701128f, (float16_t)-0.385516054f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.925049241f, (float16_t)-0.379847209f,
+    (float16_t)0.926210242f, (float16_t)-0.377007410f,
+    (float16_t)0.927362526f, (float16_t)-0.374164063f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.929640896f, (float16_t)-0.368466830f,
+    (float16_t)0.930766961f, (float16_t)-0.365612998f,
+    (float16_t)0.931884266f, (float16_t)-0.362755724f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.934092550f, (float16_t)-0.357030961f,
+    (float16_t)0.935183510f, (float16_t)-0.354163525f,
+    (float16_t)0.936265667f, (float16_t)-0.351292756f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.938403534f, (float16_t)-0.345541325f,
+    (float16_t)0.939459224f, (float16_t)-0.342660717f,
+    (float16_t)0.940506071f, (float16_t)-0.339776884f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.942573198f, (float16_t)-0.333999651f,
+    (float16_t)0.943593458f, (float16_t)-0.331106306f,
+    (float16_t)0.944604837f, (float16_t)-0.328209844f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.946600913f, (float16_t)-0.322407679f,
+    (float16_t)0.947585591f, (float16_t)-0.319502031f,
+    (float16_t)0.948561350f, (float16_t)-0.316593376f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.950486074f, (float16_t)-0.310767153f,
+    (float16_t)0.951435021f, (float16_t)-0.307849640f,
+    (float16_t)0.952375013f, (float16_t)-0.304929230f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.954228095f, (float16_t)-0.299079826f,
+    (float16_t)0.955141168f, (float16_t)-0.296150888f,
+    (float16_t)0.956045251f, (float16_t)-0.293219163f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.957826413f, (float16_t)-0.287347460f,
+    (float16_t)0.958703475f, (float16_t)-0.284407537f,
+    (float16_t)0.959571513f, (float16_t)-0.281464938f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.961280486f, (float16_t)-0.275571819f,
+    (float16_t)0.962121404f, (float16_t)-0.272621355f,
+    (float16_t)0.962953267f, (float16_t)-0.269668326f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.964589793f, (float16_t)-0.263754679f,
+    (float16_t)0.965394442f, (float16_t)-0.260794118f,
+    (float16_t)0.966190003f, (float16_t)-0.257831102f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.967753837f, (float16_t)-0.251897818f,
+    (float16_t)0.968522094f, (float16_t)-0.248927606f,
+    (float16_t)0.969281235f, (float16_t)-0.245955050f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.970772141f, (float16_t)-0.240003022f,
+    (float16_t)0.971503891f, (float16_t)-0.237023606f,
+    (float16_t)0.972226497f, (float16_t)-0.234041959f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.973644250f, (float16_t)-0.228072083f,
+    (float16_t)0.974339383f, (float16_t)-0.225083911f,
+    (float16_t)0.975025345f, (float16_t)-0.222093621f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.976369731f, (float16_t)-0.216106797f,
+    (float16_t)0.977028143f, (float16_t)-0.213110320f,
+    (float16_t)0.977677358f, (float16_t)-0.210111837f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.978948175f, (float16_t)-0.204108966f,
+    (float16_t)0.979569766f, (float16_t)-0.201104635f,
+    (float16_t)0.980182136f, (float16_t)-0.198098411f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.981379193f, (float16_t)-0.192080397f,
+    (float16_t)0.981963869f, (float16_t)-0.189068664f,
+    (float16_t)0.982539302f, (float16_t)-0.186055152f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.983662419f, (float16_t)-0.180022901f,
+    (float16_t)0.984210092f, (float16_t)-0.177004220f,
+    (float16_t)0.984748502f, (float16_t)-0.173983873f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.985797509f, (float16_t)-0.167938295f,
+    (float16_t)0.986308097f, (float16_t)-0.164913120f,
+    (float16_t)0.986809402f, (float16_t)-0.161886394f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.987784142f, (float16_t)-0.155828398f,
+    (float16_t)0.988257568f, (float16_t)-0.152797185f,
+    (float16_t)0.988721692f, (float16_t)-0.149764535f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.989622017f, (float16_t)-0.143695033f,
+    (float16_t)0.990058210f, (float16_t)-0.140658239f,
+    (float16_t)0.990485084f, (float16_t)-0.137620122f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.991310860f, (float16_t)-0.131540029f,
+    (float16_t)0.991709754f, (float16_t)-0.128498111f,
+    (float16_t)0.992099313f, (float16_t)-0.125454983f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.992850414f, (float16_t)-0.119365215f,
+    (float16_t)0.993211949f, (float16_t)-0.116318631f,
+    (float16_t)0.993564136f, (float16_t)-0.113270952f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.994240449f, (float16_t)-0.107172425f,
+    (float16_t)0.994564571f, (float16_t)-0.104121634f,
+    (float16_t)0.994879331f, (float16_t)-0.101069863f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.995480755f, (float16_t)-0.094963495f,
+    (float16_t)0.995767414f, (float16_t)-0.091908956f,
+    (float16_t)0.996044701f, (float16_t)-0.088853553f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.996571146f, (float16_t)-0.082740265f,
+    (float16_t)0.996820299f, (float16_t)-0.079682438f,
+    (float16_t)0.997060070f, (float16_t)-0.076623861f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.997511456f, (float16_t)-0.070504573f,
+    (float16_t)0.997723067f, (float16_t)-0.067443920f,
+    (float16_t)0.997925286f, (float16_t)-0.064382631f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.998301545f, (float16_t)-0.058258265f,
+    (float16_t)0.998475581f, (float16_t)-0.055195244f,
+    (float16_t)0.998640218f, (float16_t)-0.052131705f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.998941293f, (float16_t)-0.046003182f,
+    (float16_t)0.999077728f, (float16_t)-0.042938257f,
+    (float16_t)0.999204759f, (float16_t)-0.039872928f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.999430605f, (float16_t)-0.033741172f,
+    (float16_t)0.999529418f, (float16_t)-0.030674803f,
+    (float16_t)0.999618822f, (float16_t)-0.027608146f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999769405f, (float16_t)-0.021474080f,
+    (float16_t)0.999830582f, (float16_t)-0.018406730f,
+    (float16_t)0.999882347f, (float16_t)-0.015339206f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f,
+    (float16_t)0.999957645f, (float16_t)-0.009203755f,
+    (float16_t)0.999981175f, (float16_t)-0.006135885f,
+    (float16_t)0.999995294f, (float16_t)-0.003067957f
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096)
+
+/**
+* \par
+* Example code for Floating-point Twiddle factors Generation:
+* \par
+* <pre>for(i = 0; i< N/; i++)
+* {
+* twiddleCoef[2*i]= cos(i * 2*PI/(float)N);
+* twiddleCoef[2*i+1]= sin(i * 2*PI/(float)N);
+* } </pre>
+* \par
+* where N = 4096  and PI = 3.14159265358979
+* \par
+* Cos and Sin values are in interleaved fashion
+*
+*/
+const float16_t twiddleCoefF16_4096[8192] = {
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999998823f,  (float16_t)0.001533980f,
+    (float16_t)0.999995294f,  (float16_t)0.003067957f,
+    (float16_t)0.999989411f,  (float16_t)0.004601926f,
+    (float16_t)0.999981175f,  (float16_t)0.006135885f,
+    (float16_t)0.999970586f,  (float16_t)0.007669829f,
+    (float16_t)0.999957645f,  (float16_t)0.009203755f,
+    (float16_t)0.999942350f,  (float16_t)0.010737659f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)0.999904701f,  (float16_t)0.013805389f,
+    (float16_t)0.999882347f,  (float16_t)0.015339206f,
+    (float16_t)0.999857641f,  (float16_t)0.016872988f,
+    (float16_t)0.999830582f,  (float16_t)0.018406730f,
+    (float16_t)0.999801170f,  (float16_t)0.019940429f,
+    (float16_t)0.999769405f,  (float16_t)0.021474080f,
+    (float16_t)0.999735288f,  (float16_t)0.023007681f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999659997f,  (float16_t)0.026074718f,
+    (float16_t)0.999618822f,  (float16_t)0.027608146f,
+    (float16_t)0.999575296f,  (float16_t)0.029141509f,
+    (float16_t)0.999529418f,  (float16_t)0.030674803f,
+    (float16_t)0.999481187f,  (float16_t)0.032208025f,
+    (float16_t)0.999430605f,  (float16_t)0.033741172f,
+    (float16_t)0.999377670f,  (float16_t)0.035274239f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.999264747f,  (float16_t)0.038340120f,
+    (float16_t)0.999204759f,  (float16_t)0.039872928f,
+    (float16_t)0.999142419f,  (float16_t)0.041405641f,
+    (float16_t)0.999077728f,  (float16_t)0.042938257f,
+    (float16_t)0.999010686f,  (float16_t)0.044470772f,
+    (float16_t)0.998941293f,  (float16_t)0.046003182f,
+    (float16_t)0.998869550f,  (float16_t)0.047535484f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.998719012f,  (float16_t)0.050599749f,
+    (float16_t)0.998640218f,  (float16_t)0.052131705f,
+    (float16_t)0.998559074f,  (float16_t)0.053663538f,
+    (float16_t)0.998475581f,  (float16_t)0.055195244f,
+    (float16_t)0.998389737f,  (float16_t)0.056726821f,
+    (float16_t)0.998301545f,  (float16_t)0.058258265f,
+    (float16_t)0.998211003f,  (float16_t)0.059789571f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.998022874f,  (float16_t)0.062851758f,
+    (float16_t)0.997925286f,  (float16_t)0.064382631f,
+    (float16_t)0.997825350f,  (float16_t)0.065913353f,
+    (float16_t)0.997723067f,  (float16_t)0.067443920f,
+    (float16_t)0.997618435f,  (float16_t)0.068974328f,
+    (float16_t)0.997511456f,  (float16_t)0.070504573f,
+    (float16_t)0.997402130f,  (float16_t)0.072034653f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.997176437f,  (float16_t)0.075094301f,
+    (float16_t)0.997060070f,  (float16_t)0.076623861f,
+    (float16_t)0.996941358f,  (float16_t)0.078153242f,
+    (float16_t)0.996820299f,  (float16_t)0.079682438f,
+    (float16_t)0.996696895f,  (float16_t)0.081211447f,
+    (float16_t)0.996571146f,  (float16_t)0.082740265f,
+    (float16_t)0.996443051f,  (float16_t)0.084268888f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.996179829f,  (float16_t)0.087325535f,
+    (float16_t)0.996044701f,  (float16_t)0.088853553f,
+    (float16_t)0.995907229f,  (float16_t)0.090381361f,
+    (float16_t)0.995767414f,  (float16_t)0.091908956f,
+    (float16_t)0.995625256f,  (float16_t)0.093436336f,
+    (float16_t)0.995480755f,  (float16_t)0.094963495f,
+    (float16_t)0.995333912f,  (float16_t)0.096490431f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.995033199f,  (float16_t)0.099543619f,
+    (float16_t)0.994879331f,  (float16_t)0.101069863f,
+    (float16_t)0.994723121f,  (float16_t)0.102595869f,
+    (float16_t)0.994564571f,  (float16_t)0.104121634f,
+    (float16_t)0.994403680f,  (float16_t)0.105647154f,
+    (float16_t)0.994240449f,  (float16_t)0.107172425f,
+    (float16_t)0.994074879f,  (float16_t)0.108697444f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.993736722f,  (float16_t)0.111746711f,
+    (float16_t)0.993564136f,  (float16_t)0.113270952f,
+    (float16_t)0.993389211f,  (float16_t)0.114794927f,
+    (float16_t)0.993211949f,  (float16_t)0.116318631f,
+    (float16_t)0.993032350f,  (float16_t)0.117842062f,
+    (float16_t)0.992850414f,  (float16_t)0.119365215f,
+    (float16_t)0.992666142f,  (float16_t)0.120888087f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.992290591f,  (float16_t)0.123932975f,
+    (float16_t)0.992099313f,  (float16_t)0.125454983f,
+    (float16_t)0.991905700f,  (float16_t)0.126976696f,
+    (float16_t)0.991709754f,  (float16_t)0.128498111f,
+    (float16_t)0.991511473f,  (float16_t)0.130019223f,
+    (float16_t)0.991310860f,  (float16_t)0.131540029f,
+    (float16_t)0.991107914f,  (float16_t)0.133060525f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.990695025f,  (float16_t)0.136100575f,
+    (float16_t)0.990485084f,  (float16_t)0.137620122f,
+    (float16_t)0.990272812f,  (float16_t)0.139139344f,
+    (float16_t)0.990058210f,  (float16_t)0.140658239f,
+    (float16_t)0.989841278f,  (float16_t)0.142176804f,
+    (float16_t)0.989622017f,  (float16_t)0.143695033f,
+    (float16_t)0.989400428f,  (float16_t)0.145212925f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.988950265f,  (float16_t)0.148247679f,
+    (float16_t)0.988721692f,  (float16_t)0.149764535f,
+    (float16_t)0.988490793f,  (float16_t)0.151281038f,
+    (float16_t)0.988257568f,  (float16_t)0.152797185f,
+    (float16_t)0.988022017f,  (float16_t)0.154312973f,
+    (float16_t)0.987784142f,  (float16_t)0.155828398f,
+    (float16_t)0.987543942f,  (float16_t)0.157343456f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.987056571f,  (float16_t)0.160372457f,
+    (float16_t)0.986809402f,  (float16_t)0.161886394f,
+    (float16_t)0.986559910f,  (float16_t)0.163399949f,
+    (float16_t)0.986308097f,  (float16_t)0.164913120f,
+    (float16_t)0.986053963f,  (float16_t)0.166425904f,
+    (float16_t)0.985797509f,  (float16_t)0.167938295f,
+    (float16_t)0.985538735f,  (float16_t)0.169450291f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.985014231f,  (float16_t)0.172473084f,
+    (float16_t)0.984748502f,  (float16_t)0.173983873f,
+    (float16_t)0.984480455f,  (float16_t)0.175494253f,
+    (float16_t)0.984210092f,  (float16_t)0.177004220f,
+    (float16_t)0.983937413f,  (float16_t)0.178513771f,
+    (float16_t)0.983662419f,  (float16_t)0.180022901f,
+    (float16_t)0.983385110f,  (float16_t)0.181531608f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.982823551f,  (float16_t)0.184547737f,
+    (float16_t)0.982539302f,  (float16_t)0.186055152f,
+    (float16_t)0.982252741f,  (float16_t)0.187562129f,
+    (float16_t)0.981963869f,  (float16_t)0.189068664f,
+    (float16_t)0.981672686f,  (float16_t)0.190574755f,
+    (float16_t)0.981379193f,  (float16_t)0.192080397f,
+    (float16_t)0.981083391f,  (float16_t)0.193585587f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.980484862f,  (float16_t)0.196594598f,
+    (float16_t)0.980182136f,  (float16_t)0.198098411f,
+    (float16_t)0.979877104f,  (float16_t)0.199601758f,
+    (float16_t)0.979569766f,  (float16_t)0.201104635f,
+    (float16_t)0.979260123f,  (float16_t)0.202607039f,
+    (float16_t)0.978948175f,  (float16_t)0.204108966f,
+    (float16_t)0.978633924f,  (float16_t)0.205610413f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.977998515f,  (float16_t)0.208611852f,
+    (float16_t)0.977677358f,  (float16_t)0.210111837f,
+    (float16_t)0.977353900f,  (float16_t)0.211611327f,
+    (float16_t)0.977028143f,  (float16_t)0.213110320f,
+    (float16_t)0.976700086f,  (float16_t)0.214608811f,
+    (float16_t)0.976369731f,  (float16_t)0.216106797f,
+    (float16_t)0.976037079f,  (float16_t)0.217604275f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.975364885f,  (float16_t)0.220597690f,
+    (float16_t)0.975025345f,  (float16_t)0.222093621f,
+    (float16_t)0.974683511f,  (float16_t)0.223589029f,
+    (float16_t)0.974339383f,  (float16_t)0.225083911f,
+    (float16_t)0.973992962f,  (float16_t)0.226578264f,
+    (float16_t)0.973644250f,  (float16_t)0.228072083f,
+    (float16_t)0.973293246f,  (float16_t)0.229565366f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.972584369f,  (float16_t)0.232550307f,
+    (float16_t)0.972226497f,  (float16_t)0.234041959f,
+    (float16_t)0.971866337f,  (float16_t)0.235533059f,
+    (float16_t)0.971503891f,  (float16_t)0.237023606f,
+    (float16_t)0.971139158f,  (float16_t)0.238513595f,
+    (float16_t)0.970772141f,  (float16_t)0.240003022f,
+    (float16_t)0.970402839f,  (float16_t)0.241491885f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.969657385f,  (float16_t)0.244467903f,
+    (float16_t)0.969281235f,  (float16_t)0.245955050f,
+    (float16_t)0.968902805f,  (float16_t)0.247441619f,
+    (float16_t)0.968522094f,  (float16_t)0.248927606f,
+    (float16_t)0.968139105f,  (float16_t)0.250413007f,
+    (float16_t)0.967753837f,  (float16_t)0.251897818f,
+    (float16_t)0.967366292f,  (float16_t)0.253382037f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.966584374f,  (float16_t)0.256348682f,
+    (float16_t)0.966190003f,  (float16_t)0.257831102f,
+    (float16_t)0.965793359f,  (float16_t)0.259312915f,
+    (float16_t)0.965394442f,  (float16_t)0.260794118f,
+    (float16_t)0.964993253f,  (float16_t)0.262274707f,
+    (float16_t)0.964589793f,  (float16_t)0.263754679f,
+    (float16_t)0.964184064f,  (float16_t)0.265234030f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.963365800f,  (float16_t)0.268190857f,
+    (float16_t)0.962953267f,  (float16_t)0.269668326f,
+    (float16_t)0.962538468f,  (float16_t)0.271145160f,
+    (float16_t)0.962121404f,  (float16_t)0.272621355f,
+    (float16_t)0.961702077f,  (float16_t)0.274096910f,
+    (float16_t)0.961280486f,  (float16_t)0.275571819f,
+    (float16_t)0.960856633f,  (float16_t)0.277046080f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.960002146f,  (float16_t)0.279992643f,
+    (float16_t)0.959571513f,  (float16_t)0.281464938f,
+    (float16_t)0.959138622f,  (float16_t)0.282936570f,
+    (float16_t)0.958703475f,  (float16_t)0.284407537f,
+    (float16_t)0.958266071f,  (float16_t)0.285877835f,
+    (float16_t)0.957826413f,  (float16_t)0.287347460f,
+    (float16_t)0.957384501f,  (float16_t)0.288816408f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.956493919f,  (float16_t)0.291752263f,
+    (float16_t)0.956045251f,  (float16_t)0.293219163f,
+    (float16_t)0.955594334f,  (float16_t)0.294685372f,
+    (float16_t)0.955141168f,  (float16_t)0.296150888f,
+    (float16_t)0.954685755f,  (float16_t)0.297615707f,
+    (float16_t)0.954228095f,  (float16_t)0.299079826f,
+    (float16_t)0.953768190f,  (float16_t)0.300543241f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.952841648f,  (float16_t)0.303467947f,
+    (float16_t)0.952375013f,  (float16_t)0.304929230f,
+    (float16_t)0.951906137f,  (float16_t)0.306389795f,
+    (float16_t)0.951435021f,  (float16_t)0.307849640f,
+    (float16_t)0.950961666f,  (float16_t)0.309308760f,
+    (float16_t)0.950486074f,  (float16_t)0.310767153f,
+    (float16_t)0.950008245f,  (float16_t)0.312224814f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.949045882f,  (float16_t)0.315137929f,
+    (float16_t)0.948561350f,  (float16_t)0.316593376f,
+    (float16_t)0.948074586f,  (float16_t)0.318048077f,
+    (float16_t)0.947585591f,  (float16_t)0.319502031f,
+    (float16_t)0.947094366f,  (float16_t)0.320955232f,
+    (float16_t)0.946600913f,  (float16_t)0.322407679f,
+    (float16_t)0.946105232f,  (float16_t)0.323859367f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.945107193f,  (float16_t)0.326760452f,
+    (float16_t)0.944604837f,  (float16_t)0.328209844f,
+    (float16_t)0.944100258f,  (float16_t)0.329658463f,
+    (float16_t)0.943593458f,  (float16_t)0.331106306f,
+    (float16_t)0.943084437f,  (float16_t)0.332553370f,
+    (float16_t)0.942573198f,  (float16_t)0.333999651f,
+    (float16_t)0.942059740f,  (float16_t)0.335445147f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.941026175f,  (float16_t)0.338333767f,
+    (float16_t)0.940506071f,  (float16_t)0.339776884f,
+    (float16_t)0.939983753f,  (float16_t)0.341219202f,
+    (float16_t)0.939459224f,  (float16_t)0.342660717f,
+    (float16_t)0.938932484f,  (float16_t)0.344101426f,
+    (float16_t)0.938403534f,  (float16_t)0.345541325f,
+    (float16_t)0.937872376f,  (float16_t)0.346980411f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.936803442f,  (float16_t)0.349856130f,
+    (float16_t)0.936265667f,  (float16_t)0.351292756f,
+    (float16_t)0.935725689f,  (float16_t)0.352728556f,
+    (float16_t)0.935183510f,  (float16_t)0.354163525f,
+    (float16_t)0.934639130f,  (float16_t)0.355597662f,
+    (float16_t)0.934092550f,  (float16_t)0.357030961f,
+    (float16_t)0.933543773f,  (float16_t)0.358463421f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.932439629f,  (float16_t)0.361325806f,
+    (float16_t)0.931884266f,  (float16_t)0.362755724f,
+    (float16_t)0.931326709f,  (float16_t)0.364184790f,
+    (float16_t)0.930766961f,  (float16_t)0.365612998f,
+    (float16_t)0.930205023f,  (float16_t)0.367040346f,
+    (float16_t)0.929640896f,  (float16_t)0.368466830f,
+    (float16_t)0.929074581f,  (float16_t)0.369892447f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.927935395f,  (float16_t)0.372741067f,
+    (float16_t)0.927362526f,  (float16_t)0.374164063f,
+    (float16_t)0.926787474f,  (float16_t)0.375586178f,
+    (float16_t)0.926210242f,  (float16_t)0.377007410f,
+    (float16_t)0.925630831f,  (float16_t)0.378427755f,
+    (float16_t)0.925049241f,  (float16_t)0.379847209f,
+    (float16_t)0.924465474f,  (float16_t)0.381265769f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.923291417f,  (float16_t)0.384100195f,
+    (float16_t)0.922701128f,  (float16_t)0.385516054f,
+    (float16_t)0.922108669f,  (float16_t)0.386931006f,
+    (float16_t)0.921514039f,  (float16_t)0.388345047f,
+    (float16_t)0.920917242f,  (float16_t)0.389758174f,
+    (float16_t)0.920318277f,  (float16_t)0.391170384f,
+    (float16_t)0.919717146f,  (float16_t)0.392581674f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.918508394f,  (float16_t)0.395401479f,
+    (float16_t)0.917900776f,  (float16_t)0.396809987f,
+    (float16_t)0.917290997f,  (float16_t)0.398217562f,
+    (float16_t)0.916679060f,  (float16_t)0.399624200f,
+    (float16_t)0.916064966f,  (float16_t)0.401029897f,
+    (float16_t)0.915448716f,  (float16_t)0.402434651f,
+    (float16_t)0.914830312f,  (float16_t)0.403838458f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.913587048f,  (float16_t)0.406643217f,
+    (float16_t)0.912962190f,  (float16_t)0.408044163f,
+    (float16_t)0.912335185f,  (float16_t)0.409444149f,
+    (float16_t)0.911706032f,  (float16_t)0.410843171f,
+    (float16_t)0.911074734f,  (float16_t)0.412241227f,
+    (float16_t)0.910441292f,  (float16_t)0.413638312f,
+    (float16_t)0.909805708f,  (float16_t)0.415034424f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.908528119f,  (float16_t)0.417823716f,
+    (float16_t)0.907886116f,  (float16_t)0.419216888f,
+    (float16_t)0.907241978f,  (float16_t)0.420609074f,
+    (float16_t)0.906595705f,  (float16_t)0.422000271f,
+    (float16_t)0.905947298f,  (float16_t)0.423390474f,
+    (float16_t)0.905296759f,  (float16_t)0.424779681f,
+    (float16_t)0.904644091f,  (float16_t)0.426167889f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.903332368f,  (float16_t)0.428941292f,
+    (float16_t)0.902673318f,  (float16_t)0.430326481f,
+    (float16_t)0.902012144f,  (float16_t)0.431710658f,
+    (float16_t)0.901348847f,  (float16_t)0.433093819f,
+    (float16_t)0.900683429f,  (float16_t)0.434475961f,
+    (float16_t)0.900015892f,  (float16_t)0.435857080f,
+    (float16_t)0.899346237f,  (float16_t)0.437237174f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.898000580f,  (float16_t)0.439994271f,
+    (float16_t)0.897324581f,  (float16_t)0.441371269f,
+    (float16_t)0.896646470f,  (float16_t)0.442747228f,
+    (float16_t)0.895966250f,  (float16_t)0.444122145f,
+    (float16_t)0.895283921f,  (float16_t)0.445496017f,
+    (float16_t)0.894599486f,  (float16_t)0.446868840f,
+    (float16_t)0.893912945f,  (float16_t)0.448240612f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.892533555f,  (float16_t)0.450980989f,
+    (float16_t)0.891840709f,  (float16_t)0.452349587f,
+    (float16_t)0.891145765f,  (float16_t)0.453717121f,
+    (float16_t)0.890448723f,  (float16_t)0.455083587f,
+    (float16_t)0.889749586f,  (float16_t)0.456448982f,
+    (float16_t)0.889048356f,  (float16_t)0.457813304f,
+    (float16_t)0.888345033f,  (float16_t)0.459176548f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.886932119f,  (float16_t)0.461899791f,
+    (float16_t)0.886222530f,  (float16_t)0.463259784f,
+    (float16_t)0.885510856f,  (float16_t)0.464618686f,
+    (float16_t)0.884797098f,  (float16_t)0.465976496f,
+    (float16_t)0.884081259f,  (float16_t)0.467333209f,
+    (float16_t)0.883363339f,  (float16_t)0.468688822f,
+    (float16_t)0.882643340f,  (float16_t)0.470043332f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.881197113f,  (float16_t)0.472749032f,
+    (float16_t)0.880470889f,  (float16_t)0.474100215f,
+    (float16_t)0.879742593f,  (float16_t)0.475450282f,
+    (float16_t)0.879012226f,  (float16_t)0.476799230f,
+    (float16_t)0.878279792f,  (float16_t)0.478147056f,
+    (float16_t)0.877545290f,  (float16_t)0.479493758f,
+    (float16_t)0.876808724f,  (float16_t)0.480839331f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.875329403f,  (float16_t)0.483527079f,
+    (float16_t)0.874586652f,  (float16_t)0.484869248f,
+    (float16_t)0.873841843f,  (float16_t)0.486210276f,
+    (float16_t)0.873094978f,  (float16_t)0.487550160f,
+    (float16_t)0.872346059f,  (float16_t)0.488888897f,
+    (float16_t)0.871595087f,  (float16_t)0.490226483f,
+    (float16_t)0.870842063f,  (float16_t)0.491562916f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.869329871f,  (float16_t)0.494232309f,
+    (float16_t)0.868570706f,  (float16_t)0.495565262f,
+    (float16_t)0.867809497f,  (float16_t)0.496897049f,
+    (float16_t)0.867046246f,  (float16_t)0.498227667f,
+    (float16_t)0.866280954f,  (float16_t)0.499557113f,
+    (float16_t)0.865513624f,  (float16_t)0.500885383f,
+    (float16_t)0.864744258f,  (float16_t)0.502212474f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.863199422f,  (float16_t)0.504863109f,
+    (float16_t)0.862423956f,  (float16_t)0.506186645f,
+    (float16_t)0.861646461f,  (float16_t)0.507508991f,
+    (float16_t)0.860866939f,  (float16_t)0.508830143f,
+    (float16_t)0.860085390f,  (float16_t)0.510150097f,
+    (float16_t)0.859301818f,  (float16_t)0.511468850f,
+    (float16_t)0.858516224f,  (float16_t)0.512786401f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.856938977f,  (float16_t)0.515417878f,
+    (float16_t)0.856147328f,  (float16_t)0.516731799f,
+    (float16_t)0.855353665f,  (float16_t)0.518044504f,
+    (float16_t)0.854557988f,  (float16_t)0.519355990f,
+    (float16_t)0.853760301f,  (float16_t)0.520666254f,
+    (float16_t)0.852960605f,  (float16_t)0.521975293f,
+    (float16_t)0.852158902f,  (float16_t)0.523283103f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.850549481f,  (float16_t)0.525895027f,
+    (float16_t)0.849741768f,  (float16_t)0.527199135f,
+    (float16_t)0.848932055f,  (float16_t)0.528502002f,
+    (float16_t)0.848120345f,  (float16_t)0.529803625f,
+    (float16_t)0.847306639f,  (float16_t)0.531104001f,
+    (float16_t)0.846490939f,  (float16_t)0.532403128f,
+    (float16_t)0.845673247f,  (float16_t)0.533701002f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.844031895f,  (float16_t)0.536292979f,
+    (float16_t)0.843208240f,  (float16_t)0.537587076f,
+    (float16_t)0.842382600f,  (float16_t)0.538879909f,
+    (float16_t)0.841554977f,  (float16_t)0.540171473f,
+    (float16_t)0.840725375f,  (float16_t)0.541461766f,
+    (float16_t)0.839893794f,  (float16_t)0.542750785f,
+    (float16_t)0.839060237f,  (float16_t)0.544038527f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.837387202f,  (float16_t)0.546610167f,
+    (float16_t)0.836547727f,  (float16_t)0.547894059f,
+    (float16_t)0.835706284f,  (float16_t)0.549176662f,
+    (float16_t)0.834862875f,  (float16_t)0.550457973f,
+    (float16_t)0.834017501f,  (float16_t)0.551737988f,
+    (float16_t)0.833170165f,  (float16_t)0.553016706f,
+    (float16_t)0.832320868f,  (float16_t)0.554294121f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.830616400f,  (float16_t)0.556845037f,
+    (float16_t)0.829761234f,  (float16_t)0.558118531f,
+    (float16_t)0.828904115f,  (float16_t)0.559390712f,
+    (float16_t)0.828045045f,  (float16_t)0.560661576f,
+    (float16_t)0.827184027f,  (float16_t)0.561931121f,
+    (float16_t)0.826321063f,  (float16_t)0.563199344f,
+    (float16_t)0.825456154f,  (float16_t)0.564466242f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.823720511f,  (float16_t)0.566996049f,
+    (float16_t)0.822849781f,  (float16_t)0.568258953f,
+    (float16_t)0.821977115f,  (float16_t)0.569520519f,
+    (float16_t)0.821102515f,  (float16_t)0.570780746f,
+    (float16_t)0.820225983f,  (float16_t)0.572039629f,
+    (float16_t)0.819347520f,  (float16_t)0.573297167f,
+    (float16_t)0.818467130f,  (float16_t)0.574553355f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.816700573f,  (float16_t)0.577061673f,
+    (float16_t)0.815814411f,  (float16_t)0.578313796f,
+    (float16_t)0.814926329f,  (float16_t)0.579564559f,
+    (float16_t)0.814036330f,  (float16_t)0.580813958f,
+    (float16_t)0.813144415f,  (float16_t)0.582061990f,
+    (float16_t)0.812250587f,  (float16_t)0.583308653f,
+    (float16_t)0.811354847f,  (float16_t)0.584553943f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.809557642f,  (float16_t)0.587040394f,
+    (float16_t)0.808656182f,  (float16_t)0.588281548f,
+    (float16_t)0.807752818f,  (float16_t)0.589521319f,
+    (float16_t)0.806847554f,  (float16_t)0.590759702f,
+    (float16_t)0.805940391f,  (float16_t)0.591996695f,
+    (float16_t)0.805031331f,  (float16_t)0.593232295f,
+    (float16_t)0.804120377f,  (float16_t)0.594466499f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.802292796f,  (float16_t)0.596930708f,
+    (float16_t)0.801376172f,  (float16_t)0.598160707f,
+    (float16_t)0.800457662f,  (float16_t)0.599389298f,
+    (float16_t)0.799537269f,  (float16_t)0.600616479f,
+    (float16_t)0.798614995f,  (float16_t)0.601842247f,
+    (float16_t)0.797690841f,  (float16_t)0.603066599f,
+    (float16_t)0.796764810f,  (float16_t)0.604289531f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.794907126f,  (float16_t)0.606731127f,
+    (float16_t)0.793975478f,  (float16_t)0.607949785f,
+    (float16_t)0.793041960f,  (float16_t)0.609167012f,
+    (float16_t)0.792106577f,  (float16_t)0.610382806f,
+    (float16_t)0.791169330f,  (float16_t)0.611597164f,
+    (float16_t)0.790230221f,  (float16_t)0.612810082f,
+    (float16_t)0.789289253f,  (float16_t)0.614021559f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.787401747f,  (float16_t)0.616440175f,
+    (float16_t)0.786455214f,  (float16_t)0.617647308f,
+    (float16_t)0.785506830f,  (float16_t)0.618852988f,
+    (float16_t)0.784556597f,  (float16_t)0.620057212f,
+    (float16_t)0.783604519f,  (float16_t)0.621259977f,
+    (float16_t)0.782650596f,  (float16_t)0.622461279f,
+    (float16_t)0.781694832f,  (float16_t)0.623661118f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.779777788f,  (float16_t)0.626056388f,
+    (float16_t)0.778816512f,  (float16_t)0.627251815f,
+    (float16_t)0.777853404f,  (float16_t)0.628445767f,
+    (float16_t)0.776888466f,  (float16_t)0.629638239f,
+    (float16_t)0.775921699f,  (float16_t)0.630829230f,
+    (float16_t)0.774953107f,  (float16_t)0.632018736f,
+    (float16_t)0.773982691f,  (float16_t)0.633206755f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.772036397f,  (float16_t)0.635578320f,
+    (float16_t)0.771060524f,  (float16_t)0.636761861f,
+    (float16_t)0.770082837f,  (float16_t)0.637943904f,
+    (float16_t)0.769103338f,  (float16_t)0.639124445f,
+    (float16_t)0.768122029f,  (float16_t)0.640303482f,
+    (float16_t)0.767138912f,  (float16_t)0.641481013f,
+    (float16_t)0.766153990f,  (float16_t)0.642657034f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.764178741f,  (float16_t)0.645004537f,
+    (float16_t)0.763188417f,  (float16_t)0.646176013f,
+    (float16_t)0.762196298f,  (float16_t)0.647345969f,
+    (float16_t)0.761202385f,  (float16_t)0.648514401f,
+    (float16_t)0.760206682f,  (float16_t)0.649681307f,
+    (float16_t)0.759209189f,  (float16_t)0.650846685f,
+    (float16_t)0.758209910f,  (float16_t)0.652010531f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.756206001f,  (float16_t)0.654333618f,
+    (float16_t)0.755201377f,  (float16_t)0.655492853f,
+    (float16_t)0.754194975f,  (float16_t)0.656650546f,
+    (float16_t)0.753186799f,  (float16_t)0.657806693f,
+    (float16_t)0.752176850f,  (float16_t)0.658961293f,
+    (float16_t)0.751165132f,  (float16_t)0.660114342f,
+    (float16_t)0.750151646f,  (float16_t)0.661265838f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.748119380f,  (float16_t)0.663564159f,
+    (float16_t)0.747100606f,  (float16_t)0.664710978f,
+    (float16_t)0.746080074f,  (float16_t)0.665856234f,
+    (float16_t)0.745057785f,  (float16_t)0.666999922f,
+    (float16_t)0.744033744f,  (float16_t)0.668142041f,
+    (float16_t)0.743007952f,  (float16_t)0.669282588f,
+    (float16_t)0.741980412f,  (float16_t)0.670421560f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.739920095f,  (float16_t)0.672694769f,
+    (float16_t)0.738887324f,  (float16_t)0.673829000f,
+    (float16_t)0.737852815f,  (float16_t)0.674961646f,
+    (float16_t)0.736816569f,  (float16_t)0.676092704f,
+    (float16_t)0.735778589f,  (float16_t)0.677222170f,
+    (float16_t)0.734738878f,  (float16_t)0.678350043f,
+    (float16_t)0.733697438f,  (float16_t)0.679476320f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.731609381f,  (float16_t)0.681724074f,
+    (float16_t)0.730562769f,  (float16_t)0.682845546f,
+    (float16_t)0.729514438f,  (float16_t)0.683965412f,
+    (float16_t)0.728464390f,  (float16_t)0.685083668f,
+    (float16_t)0.727412629f,  (float16_t)0.686200312f,
+    (float16_t)0.726359155f,  (float16_t)0.687315341f,
+    (float16_t)0.725303972f,  (float16_t)0.688428753f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.723188489f,  (float16_t)0.690650714f,
+    (float16_t)0.722128194f,  (float16_t)0.691759258f,
+    (float16_t)0.721066199f,  (float16_t)0.692866175f,
+    (float16_t)0.720002508f,  (float16_t)0.693971461f,
+    (float16_t)0.718937122f,  (float16_t)0.695075114f,
+    (float16_t)0.717870045f,  (float16_t)0.696177131f,
+    (float16_t)0.716801279f,  (float16_t)0.697277511f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.714658688f,  (float16_t)0.699473345f,
+    (float16_t)0.713584869f,  (float16_t)0.700568794f,
+    (float16_t)0.712509371f,  (float16_t)0.701662595f,
+    (float16_t)0.711432196f,  (float16_t)0.702754744f,
+    (float16_t)0.710353347f,  (float16_t)0.703845241f,
+    (float16_t)0.709272826f,  (float16_t)0.704934080f,
+    (float16_t)0.708190637f,  (float16_t)0.706021261f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.706021261f,  (float16_t)0.708190637f,
+    (float16_t)0.704934080f,  (float16_t)0.709272826f,
+    (float16_t)0.703845241f,  (float16_t)0.710353347f,
+    (float16_t)0.702754744f,  (float16_t)0.711432196f,
+    (float16_t)0.701662595f,  (float16_t)0.712509371f,
+    (float16_t)0.700568794f,  (float16_t)0.713584869f,
+    (float16_t)0.699473345f,  (float16_t)0.714658688f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.697277511f,  (float16_t)0.716801279f,
+    (float16_t)0.696177131f,  (float16_t)0.717870045f,
+    (float16_t)0.695075114f,  (float16_t)0.718937122f,
+    (float16_t)0.693971461f,  (float16_t)0.720002508f,
+    (float16_t)0.692866175f,  (float16_t)0.721066199f,
+    (float16_t)0.691759258f,  (float16_t)0.722128194f,
+    (float16_t)0.690650714f,  (float16_t)0.723188489f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.688428753f,  (float16_t)0.725303972f,
+    (float16_t)0.687315341f,  (float16_t)0.726359155f,
+    (float16_t)0.686200312f,  (float16_t)0.727412629f,
+    (float16_t)0.685083668f,  (float16_t)0.728464390f,
+    (float16_t)0.683965412f,  (float16_t)0.729514438f,
+    (float16_t)0.682845546f,  (float16_t)0.730562769f,
+    (float16_t)0.681724074f,  (float16_t)0.731609381f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.679476320f,  (float16_t)0.733697438f,
+    (float16_t)0.678350043f,  (float16_t)0.734738878f,
+    (float16_t)0.677222170f,  (float16_t)0.735778589f,
+    (float16_t)0.676092704f,  (float16_t)0.736816569f,
+    (float16_t)0.674961646f,  (float16_t)0.737852815f,
+    (float16_t)0.673829000f,  (float16_t)0.738887324f,
+    (float16_t)0.672694769f,  (float16_t)0.739920095f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.670421560f,  (float16_t)0.741980412f,
+    (float16_t)0.669282588f,  (float16_t)0.743007952f,
+    (float16_t)0.668142041f,  (float16_t)0.744033744f,
+    (float16_t)0.666999922f,  (float16_t)0.745057785f,
+    (float16_t)0.665856234f,  (float16_t)0.746080074f,
+    (float16_t)0.664710978f,  (float16_t)0.747100606f,
+    (float16_t)0.663564159f,  (float16_t)0.748119380f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.661265838f,  (float16_t)0.750151646f,
+    (float16_t)0.660114342f,  (float16_t)0.751165132f,
+    (float16_t)0.658961293f,  (float16_t)0.752176850f,
+    (float16_t)0.657806693f,  (float16_t)0.753186799f,
+    (float16_t)0.656650546f,  (float16_t)0.754194975f,
+    (float16_t)0.655492853f,  (float16_t)0.755201377f,
+    (float16_t)0.654333618f,  (float16_t)0.756206001f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.652010531f,  (float16_t)0.758209910f,
+    (float16_t)0.650846685f,  (float16_t)0.759209189f,
+    (float16_t)0.649681307f,  (float16_t)0.760206682f,
+    (float16_t)0.648514401f,  (float16_t)0.761202385f,
+    (float16_t)0.647345969f,  (float16_t)0.762196298f,
+    (float16_t)0.646176013f,  (float16_t)0.763188417f,
+    (float16_t)0.645004537f,  (float16_t)0.764178741f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.642657034f,  (float16_t)0.766153990f,
+    (float16_t)0.641481013f,  (float16_t)0.767138912f,
+    (float16_t)0.640303482f,  (float16_t)0.768122029f,
+    (float16_t)0.639124445f,  (float16_t)0.769103338f,
+    (float16_t)0.637943904f,  (float16_t)0.770082837f,
+    (float16_t)0.636761861f,  (float16_t)0.771060524f,
+    (float16_t)0.635578320f,  (float16_t)0.772036397f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.633206755f,  (float16_t)0.773982691f,
+    (float16_t)0.632018736f,  (float16_t)0.774953107f,
+    (float16_t)0.630829230f,  (float16_t)0.775921699f,
+    (float16_t)0.629638239f,  (float16_t)0.776888466f,
+    (float16_t)0.628445767f,  (float16_t)0.777853404f,
+    (float16_t)0.627251815f,  (float16_t)0.778816512f,
+    (float16_t)0.626056388f,  (float16_t)0.779777788f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.623661118f,  (float16_t)0.781694832f,
+    (float16_t)0.622461279f,  (float16_t)0.782650596f,
+    (float16_t)0.621259977f,  (float16_t)0.783604519f,
+    (float16_t)0.620057212f,  (float16_t)0.784556597f,
+    (float16_t)0.618852988f,  (float16_t)0.785506830f,
+    (float16_t)0.617647308f,  (float16_t)0.786455214f,
+    (float16_t)0.616440175f,  (float16_t)0.787401747f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.614021559f,  (float16_t)0.789289253f,
+    (float16_t)0.612810082f,  (float16_t)0.790230221f,
+    (float16_t)0.611597164f,  (float16_t)0.791169330f,
+    (float16_t)0.610382806f,  (float16_t)0.792106577f,
+    (float16_t)0.609167012f,  (float16_t)0.793041960f,
+    (float16_t)0.607949785f,  (float16_t)0.793975478f,
+    (float16_t)0.606731127f,  (float16_t)0.794907126f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.604289531f,  (float16_t)0.796764810f,
+    (float16_t)0.603066599f,  (float16_t)0.797690841f,
+    (float16_t)0.601842247f,  (float16_t)0.798614995f,
+    (float16_t)0.600616479f,  (float16_t)0.799537269f,
+    (float16_t)0.599389298f,  (float16_t)0.800457662f,
+    (float16_t)0.598160707f,  (float16_t)0.801376172f,
+    (float16_t)0.596930708f,  (float16_t)0.802292796f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.594466499f,  (float16_t)0.804120377f,
+    (float16_t)0.593232295f,  (float16_t)0.805031331f,
+    (float16_t)0.591996695f,  (float16_t)0.805940391f,
+    (float16_t)0.590759702f,  (float16_t)0.806847554f,
+    (float16_t)0.589521319f,  (float16_t)0.807752818f,
+    (float16_t)0.588281548f,  (float16_t)0.808656182f,
+    (float16_t)0.587040394f,  (float16_t)0.809557642f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.584553943f,  (float16_t)0.811354847f,
+    (float16_t)0.583308653f,  (float16_t)0.812250587f,
+    (float16_t)0.582061990f,  (float16_t)0.813144415f,
+    (float16_t)0.580813958f,  (float16_t)0.814036330f,
+    (float16_t)0.579564559f,  (float16_t)0.814926329f,
+    (float16_t)0.578313796f,  (float16_t)0.815814411f,
+    (float16_t)0.577061673f,  (float16_t)0.816700573f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.574553355f,  (float16_t)0.818467130f,
+    (float16_t)0.573297167f,  (float16_t)0.819347520f,
+    (float16_t)0.572039629f,  (float16_t)0.820225983f,
+    (float16_t)0.570780746f,  (float16_t)0.821102515f,
+    (float16_t)0.569520519f,  (float16_t)0.821977115f,
+    (float16_t)0.568258953f,  (float16_t)0.822849781f,
+    (float16_t)0.566996049f,  (float16_t)0.823720511f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.564466242f,  (float16_t)0.825456154f,
+    (float16_t)0.563199344f,  (float16_t)0.826321063f,
+    (float16_t)0.561931121f,  (float16_t)0.827184027f,
+    (float16_t)0.560661576f,  (float16_t)0.828045045f,
+    (float16_t)0.559390712f,  (float16_t)0.828904115f,
+    (float16_t)0.558118531f,  (float16_t)0.829761234f,
+    (float16_t)0.556845037f,  (float16_t)0.830616400f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.554294121f,  (float16_t)0.832320868f,
+    (float16_t)0.553016706f,  (float16_t)0.833170165f,
+    (float16_t)0.551737988f,  (float16_t)0.834017501f,
+    (float16_t)0.550457973f,  (float16_t)0.834862875f,
+    (float16_t)0.549176662f,  (float16_t)0.835706284f,
+    (float16_t)0.547894059f,  (float16_t)0.836547727f,
+    (float16_t)0.546610167f,  (float16_t)0.837387202f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.544038527f,  (float16_t)0.839060237f,
+    (float16_t)0.542750785f,  (float16_t)0.839893794f,
+    (float16_t)0.541461766f,  (float16_t)0.840725375f,
+    (float16_t)0.540171473f,  (float16_t)0.841554977f,
+    (float16_t)0.538879909f,  (float16_t)0.842382600f,
+    (float16_t)0.537587076f,  (float16_t)0.843208240f,
+    (float16_t)0.536292979f,  (float16_t)0.844031895f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.533701002f,  (float16_t)0.845673247f,
+    (float16_t)0.532403128f,  (float16_t)0.846490939f,
+    (float16_t)0.531104001f,  (float16_t)0.847306639f,
+    (float16_t)0.529803625f,  (float16_t)0.848120345f,
+    (float16_t)0.528502002f,  (float16_t)0.848932055f,
+    (float16_t)0.527199135f,  (float16_t)0.849741768f,
+    (float16_t)0.525895027f,  (float16_t)0.850549481f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.523283103f,  (float16_t)0.852158902f,
+    (float16_t)0.521975293f,  (float16_t)0.852960605f,
+    (float16_t)0.520666254f,  (float16_t)0.853760301f,
+    (float16_t)0.519355990f,  (float16_t)0.854557988f,
+    (float16_t)0.518044504f,  (float16_t)0.855353665f,
+    (float16_t)0.516731799f,  (float16_t)0.856147328f,
+    (float16_t)0.515417878f,  (float16_t)0.856938977f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.512786401f,  (float16_t)0.858516224f,
+    (float16_t)0.511468850f,  (float16_t)0.859301818f,
+    (float16_t)0.510150097f,  (float16_t)0.860085390f,
+    (float16_t)0.508830143f,  (float16_t)0.860866939f,
+    (float16_t)0.507508991f,  (float16_t)0.861646461f,
+    (float16_t)0.506186645f,  (float16_t)0.862423956f,
+    (float16_t)0.504863109f,  (float16_t)0.863199422f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.502212474f,  (float16_t)0.864744258f,
+    (float16_t)0.500885383f,  (float16_t)0.865513624f,
+    (float16_t)0.499557113f,  (float16_t)0.866280954f,
+    (float16_t)0.498227667f,  (float16_t)0.867046246f,
+    (float16_t)0.496897049f,  (float16_t)0.867809497f,
+    (float16_t)0.495565262f,  (float16_t)0.868570706f,
+    (float16_t)0.494232309f,  (float16_t)0.869329871f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.491562916f,  (float16_t)0.870842063f,
+    (float16_t)0.490226483f,  (float16_t)0.871595087f,
+    (float16_t)0.488888897f,  (float16_t)0.872346059f,
+    (float16_t)0.487550160f,  (float16_t)0.873094978f,
+    (float16_t)0.486210276f,  (float16_t)0.873841843f,
+    (float16_t)0.484869248f,  (float16_t)0.874586652f,
+    (float16_t)0.483527079f,  (float16_t)0.875329403f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.480839331f,  (float16_t)0.876808724f,
+    (float16_t)0.479493758f,  (float16_t)0.877545290f,
+    (float16_t)0.478147056f,  (float16_t)0.878279792f,
+    (float16_t)0.476799230f,  (float16_t)0.879012226f,
+    (float16_t)0.475450282f,  (float16_t)0.879742593f,
+    (float16_t)0.474100215f,  (float16_t)0.880470889f,
+    (float16_t)0.472749032f,  (float16_t)0.881197113f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.470043332f,  (float16_t)0.882643340f,
+    (float16_t)0.468688822f,  (float16_t)0.883363339f,
+    (float16_t)0.467333209f,  (float16_t)0.884081259f,
+    (float16_t)0.465976496f,  (float16_t)0.884797098f,
+    (float16_t)0.464618686f,  (float16_t)0.885510856f,
+    (float16_t)0.463259784f,  (float16_t)0.886222530f,
+    (float16_t)0.461899791f,  (float16_t)0.886932119f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.459176548f,  (float16_t)0.888345033f,
+    (float16_t)0.457813304f,  (float16_t)0.889048356f,
+    (float16_t)0.456448982f,  (float16_t)0.889749586f,
+    (float16_t)0.455083587f,  (float16_t)0.890448723f,
+    (float16_t)0.453717121f,  (float16_t)0.891145765f,
+    (float16_t)0.452349587f,  (float16_t)0.891840709f,
+    (float16_t)0.450980989f,  (float16_t)0.892533555f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.448240612f,  (float16_t)0.893912945f,
+    (float16_t)0.446868840f,  (float16_t)0.894599486f,
+    (float16_t)0.445496017f,  (float16_t)0.895283921f,
+    (float16_t)0.444122145f,  (float16_t)0.895966250f,
+    (float16_t)0.442747228f,  (float16_t)0.896646470f,
+    (float16_t)0.441371269f,  (float16_t)0.897324581f,
+    (float16_t)0.439994271f,  (float16_t)0.898000580f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.437237174f,  (float16_t)0.899346237f,
+    (float16_t)0.435857080f,  (float16_t)0.900015892f,
+    (float16_t)0.434475961f,  (float16_t)0.900683429f,
+    (float16_t)0.433093819f,  (float16_t)0.901348847f,
+    (float16_t)0.431710658f,  (float16_t)0.902012144f,
+    (float16_t)0.430326481f,  (float16_t)0.902673318f,
+    (float16_t)0.428941292f,  (float16_t)0.903332368f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.426167889f,  (float16_t)0.904644091f,
+    (float16_t)0.424779681f,  (float16_t)0.905296759f,
+    (float16_t)0.423390474f,  (float16_t)0.905947298f,
+    (float16_t)0.422000271f,  (float16_t)0.906595705f,
+    (float16_t)0.420609074f,  (float16_t)0.907241978f,
+    (float16_t)0.419216888f,  (float16_t)0.907886116f,
+    (float16_t)0.417823716f,  (float16_t)0.908528119f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.415034424f,  (float16_t)0.909805708f,
+    (float16_t)0.413638312f,  (float16_t)0.910441292f,
+    (float16_t)0.412241227f,  (float16_t)0.911074734f,
+    (float16_t)0.410843171f,  (float16_t)0.911706032f,
+    (float16_t)0.409444149f,  (float16_t)0.912335185f,
+    (float16_t)0.408044163f,  (float16_t)0.912962190f,
+    (float16_t)0.406643217f,  (float16_t)0.913587048f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.403838458f,  (float16_t)0.914830312f,
+    (float16_t)0.402434651f,  (float16_t)0.915448716f,
+    (float16_t)0.401029897f,  (float16_t)0.916064966f,
+    (float16_t)0.399624200f,  (float16_t)0.916679060f,
+    (float16_t)0.398217562f,  (float16_t)0.917290997f,
+    (float16_t)0.396809987f,  (float16_t)0.917900776f,
+    (float16_t)0.395401479f,  (float16_t)0.918508394f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.392581674f,  (float16_t)0.919717146f,
+    (float16_t)0.391170384f,  (float16_t)0.920318277f,
+    (float16_t)0.389758174f,  (float16_t)0.920917242f,
+    (float16_t)0.388345047f,  (float16_t)0.921514039f,
+    (float16_t)0.386931006f,  (float16_t)0.922108669f,
+    (float16_t)0.385516054f,  (float16_t)0.922701128f,
+    (float16_t)0.384100195f,  (float16_t)0.923291417f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.381265769f,  (float16_t)0.924465474f,
+    (float16_t)0.379847209f,  (float16_t)0.925049241f,
+    (float16_t)0.378427755f,  (float16_t)0.925630831f,
+    (float16_t)0.377007410f,  (float16_t)0.926210242f,
+    (float16_t)0.375586178f,  (float16_t)0.926787474f,
+    (float16_t)0.374164063f,  (float16_t)0.927362526f,
+    (float16_t)0.372741067f,  (float16_t)0.927935395f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.369892447f,  (float16_t)0.929074581f,
+    (float16_t)0.368466830f,  (float16_t)0.929640896f,
+    (float16_t)0.367040346f,  (float16_t)0.930205023f,
+    (float16_t)0.365612998f,  (float16_t)0.930766961f,
+    (float16_t)0.364184790f,  (float16_t)0.931326709f,
+    (float16_t)0.362755724f,  (float16_t)0.931884266f,
+    (float16_t)0.361325806f,  (float16_t)0.932439629f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.358463421f,  (float16_t)0.933543773f,
+    (float16_t)0.357030961f,  (float16_t)0.934092550f,
+    (float16_t)0.355597662f,  (float16_t)0.934639130f,
+    (float16_t)0.354163525f,  (float16_t)0.935183510f,
+    (float16_t)0.352728556f,  (float16_t)0.935725689f,
+    (float16_t)0.351292756f,  (float16_t)0.936265667f,
+    (float16_t)0.349856130f,  (float16_t)0.936803442f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.346980411f,  (float16_t)0.937872376f,
+    (float16_t)0.345541325f,  (float16_t)0.938403534f,
+    (float16_t)0.344101426f,  (float16_t)0.938932484f,
+    (float16_t)0.342660717f,  (float16_t)0.939459224f,
+    (float16_t)0.341219202f,  (float16_t)0.939983753f,
+    (float16_t)0.339776884f,  (float16_t)0.940506071f,
+    (float16_t)0.338333767f,  (float16_t)0.941026175f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.335445147f,  (float16_t)0.942059740f,
+    (float16_t)0.333999651f,  (float16_t)0.942573198f,
+    (float16_t)0.332553370f,  (float16_t)0.943084437f,
+    (float16_t)0.331106306f,  (float16_t)0.943593458f,
+    (float16_t)0.329658463f,  (float16_t)0.944100258f,
+    (float16_t)0.328209844f,  (float16_t)0.944604837f,
+    (float16_t)0.326760452f,  (float16_t)0.945107193f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.323859367f,  (float16_t)0.946105232f,
+    (float16_t)0.322407679f,  (float16_t)0.946600913f,
+    (float16_t)0.320955232f,  (float16_t)0.947094366f,
+    (float16_t)0.319502031f,  (float16_t)0.947585591f,
+    (float16_t)0.318048077f,  (float16_t)0.948074586f,
+    (float16_t)0.316593376f,  (float16_t)0.948561350f,
+    (float16_t)0.315137929f,  (float16_t)0.949045882f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.312224814f,  (float16_t)0.950008245f,
+    (float16_t)0.310767153f,  (float16_t)0.950486074f,
+    (float16_t)0.309308760f,  (float16_t)0.950961666f,
+    (float16_t)0.307849640f,  (float16_t)0.951435021f,
+    (float16_t)0.306389795f,  (float16_t)0.951906137f,
+    (float16_t)0.304929230f,  (float16_t)0.952375013f,
+    (float16_t)0.303467947f,  (float16_t)0.952841648f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.300543241f,  (float16_t)0.953768190f,
+    (float16_t)0.299079826f,  (float16_t)0.954228095f,
+    (float16_t)0.297615707f,  (float16_t)0.954685755f,
+    (float16_t)0.296150888f,  (float16_t)0.955141168f,
+    (float16_t)0.294685372f,  (float16_t)0.955594334f,
+    (float16_t)0.293219163f,  (float16_t)0.956045251f,
+    (float16_t)0.291752263f,  (float16_t)0.956493919f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.288816408f,  (float16_t)0.957384501f,
+    (float16_t)0.287347460f,  (float16_t)0.957826413f,
+    (float16_t)0.285877835f,  (float16_t)0.958266071f,
+    (float16_t)0.284407537f,  (float16_t)0.958703475f,
+    (float16_t)0.282936570f,  (float16_t)0.959138622f,
+    (float16_t)0.281464938f,  (float16_t)0.959571513f,
+    (float16_t)0.279992643f,  (float16_t)0.960002146f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.277046080f,  (float16_t)0.960856633f,
+    (float16_t)0.275571819f,  (float16_t)0.961280486f,
+    (float16_t)0.274096910f,  (float16_t)0.961702077f,
+    (float16_t)0.272621355f,  (float16_t)0.962121404f,
+    (float16_t)0.271145160f,  (float16_t)0.962538468f,
+    (float16_t)0.269668326f,  (float16_t)0.962953267f,
+    (float16_t)0.268190857f,  (float16_t)0.963365800f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.265234030f,  (float16_t)0.964184064f,
+    (float16_t)0.263754679f,  (float16_t)0.964589793f,
+    (float16_t)0.262274707f,  (float16_t)0.964993253f,
+    (float16_t)0.260794118f,  (float16_t)0.965394442f,
+    (float16_t)0.259312915f,  (float16_t)0.965793359f,
+    (float16_t)0.257831102f,  (float16_t)0.966190003f,
+    (float16_t)0.256348682f,  (float16_t)0.966584374f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.253382037f,  (float16_t)0.967366292f,
+    (float16_t)0.251897818f,  (float16_t)0.967753837f,
+    (float16_t)0.250413007f,  (float16_t)0.968139105f,
+    (float16_t)0.248927606f,  (float16_t)0.968522094f,
+    (float16_t)0.247441619f,  (float16_t)0.968902805f,
+    (float16_t)0.245955050f,  (float16_t)0.969281235f,
+    (float16_t)0.244467903f,  (float16_t)0.969657385f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.241491885f,  (float16_t)0.970402839f,
+    (float16_t)0.240003022f,  (float16_t)0.970772141f,
+    (float16_t)0.238513595f,  (float16_t)0.971139158f,
+    (float16_t)0.237023606f,  (float16_t)0.971503891f,
+    (float16_t)0.235533059f,  (float16_t)0.971866337f,
+    (float16_t)0.234041959f,  (float16_t)0.972226497f,
+    (float16_t)0.232550307f,  (float16_t)0.972584369f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.229565366f,  (float16_t)0.973293246f,
+    (float16_t)0.228072083f,  (float16_t)0.973644250f,
+    (float16_t)0.226578264f,  (float16_t)0.973992962f,
+    (float16_t)0.225083911f,  (float16_t)0.974339383f,
+    (float16_t)0.223589029f,  (float16_t)0.974683511f,
+    (float16_t)0.222093621f,  (float16_t)0.975025345f,
+    (float16_t)0.220597690f,  (float16_t)0.975364885f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.217604275f,  (float16_t)0.976037079f,
+    (float16_t)0.216106797f,  (float16_t)0.976369731f,
+    (float16_t)0.214608811f,  (float16_t)0.976700086f,
+    (float16_t)0.213110320f,  (float16_t)0.977028143f,
+    (float16_t)0.211611327f,  (float16_t)0.977353900f,
+    (float16_t)0.210111837f,  (float16_t)0.977677358f,
+    (float16_t)0.208611852f,  (float16_t)0.977998515f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.205610413f,  (float16_t)0.978633924f,
+    (float16_t)0.204108966f,  (float16_t)0.978948175f,
+    (float16_t)0.202607039f,  (float16_t)0.979260123f,
+    (float16_t)0.201104635f,  (float16_t)0.979569766f,
+    (float16_t)0.199601758f,  (float16_t)0.979877104f,
+    (float16_t)0.198098411f,  (float16_t)0.980182136f,
+    (float16_t)0.196594598f,  (float16_t)0.980484862f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.193585587f,  (float16_t)0.981083391f,
+    (float16_t)0.192080397f,  (float16_t)0.981379193f,
+    (float16_t)0.190574755f,  (float16_t)0.981672686f,
+    (float16_t)0.189068664f,  (float16_t)0.981963869f,
+    (float16_t)0.187562129f,  (float16_t)0.982252741f,
+    (float16_t)0.186055152f,  (float16_t)0.982539302f,
+    (float16_t)0.184547737f,  (float16_t)0.982823551f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.181531608f,  (float16_t)0.983385110f,
+    (float16_t)0.180022901f,  (float16_t)0.983662419f,
+    (float16_t)0.178513771f,  (float16_t)0.983937413f,
+    (float16_t)0.177004220f,  (float16_t)0.984210092f,
+    (float16_t)0.175494253f,  (float16_t)0.984480455f,
+    (float16_t)0.173983873f,  (float16_t)0.984748502f,
+    (float16_t)0.172473084f,  (float16_t)0.985014231f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.169450291f,  (float16_t)0.985538735f,
+    (float16_t)0.167938295f,  (float16_t)0.985797509f,
+    (float16_t)0.166425904f,  (float16_t)0.986053963f,
+    (float16_t)0.164913120f,  (float16_t)0.986308097f,
+    (float16_t)0.163399949f,  (float16_t)0.986559910f,
+    (float16_t)0.161886394f,  (float16_t)0.986809402f,
+    (float16_t)0.160372457f,  (float16_t)0.987056571f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.157343456f,  (float16_t)0.987543942f,
+    (float16_t)0.155828398f,  (float16_t)0.987784142f,
+    (float16_t)0.154312973f,  (float16_t)0.988022017f,
+    (float16_t)0.152797185f,  (float16_t)0.988257568f,
+    (float16_t)0.151281038f,  (float16_t)0.988490793f,
+    (float16_t)0.149764535f,  (float16_t)0.988721692f,
+    (float16_t)0.148247679f,  (float16_t)0.988950265f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.145212925f,  (float16_t)0.989400428f,
+    (float16_t)0.143695033f,  (float16_t)0.989622017f,
+    (float16_t)0.142176804f,  (float16_t)0.989841278f,
+    (float16_t)0.140658239f,  (float16_t)0.990058210f,
+    (float16_t)0.139139344f,  (float16_t)0.990272812f,
+    (float16_t)0.137620122f,  (float16_t)0.990485084f,
+    (float16_t)0.136100575f,  (float16_t)0.990695025f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.133060525f,  (float16_t)0.991107914f,
+    (float16_t)0.131540029f,  (float16_t)0.991310860f,
+    (float16_t)0.130019223f,  (float16_t)0.991511473f,
+    (float16_t)0.128498111f,  (float16_t)0.991709754f,
+    (float16_t)0.126976696f,  (float16_t)0.991905700f,
+    (float16_t)0.125454983f,  (float16_t)0.992099313f,
+    (float16_t)0.123932975f,  (float16_t)0.992290591f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.120888087f,  (float16_t)0.992666142f,
+    (float16_t)0.119365215f,  (float16_t)0.992850414f,
+    (float16_t)0.117842062f,  (float16_t)0.993032350f,
+    (float16_t)0.116318631f,  (float16_t)0.993211949f,
+    (float16_t)0.114794927f,  (float16_t)0.993389211f,
+    (float16_t)0.113270952f,  (float16_t)0.993564136f,
+    (float16_t)0.111746711f,  (float16_t)0.993736722f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.108697444f,  (float16_t)0.994074879f,
+    (float16_t)0.107172425f,  (float16_t)0.994240449f,
+    (float16_t)0.105647154f,  (float16_t)0.994403680f,
+    (float16_t)0.104121634f,  (float16_t)0.994564571f,
+    (float16_t)0.102595869f,  (float16_t)0.994723121f,
+    (float16_t)0.101069863f,  (float16_t)0.994879331f,
+    (float16_t)0.099543619f,  (float16_t)0.995033199f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.096490431f,  (float16_t)0.995333912f,
+    (float16_t)0.094963495f,  (float16_t)0.995480755f,
+    (float16_t)0.093436336f,  (float16_t)0.995625256f,
+    (float16_t)0.091908956f,  (float16_t)0.995767414f,
+    (float16_t)0.090381361f,  (float16_t)0.995907229f,
+    (float16_t)0.088853553f,  (float16_t)0.996044701f,
+    (float16_t)0.087325535f,  (float16_t)0.996179829f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.084268888f,  (float16_t)0.996443051f,
+    (float16_t)0.082740265f,  (float16_t)0.996571146f,
+    (float16_t)0.081211447f,  (float16_t)0.996696895f,
+    (float16_t)0.079682438f,  (float16_t)0.996820299f,
+    (float16_t)0.078153242f,  (float16_t)0.996941358f,
+    (float16_t)0.076623861f,  (float16_t)0.997060070f,
+    (float16_t)0.075094301f,  (float16_t)0.997176437f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.072034653f,  (float16_t)0.997402130f,
+    (float16_t)0.070504573f,  (float16_t)0.997511456f,
+    (float16_t)0.068974328f,  (float16_t)0.997618435f,
+    (float16_t)0.067443920f,  (float16_t)0.997723067f,
+    (float16_t)0.065913353f,  (float16_t)0.997825350f,
+    (float16_t)0.064382631f,  (float16_t)0.997925286f,
+    (float16_t)0.062851758f,  (float16_t)0.998022874f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.059789571f,  (float16_t)0.998211003f,
+    (float16_t)0.058258265f,  (float16_t)0.998301545f,
+    (float16_t)0.056726821f,  (float16_t)0.998389737f,
+    (float16_t)0.055195244f,  (float16_t)0.998475581f,
+    (float16_t)0.053663538f,  (float16_t)0.998559074f,
+    (float16_t)0.052131705f,  (float16_t)0.998640218f,
+    (float16_t)0.050599749f,  (float16_t)0.998719012f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.047535484f,  (float16_t)0.998869550f,
+    (float16_t)0.046003182f,  (float16_t)0.998941293f,
+    (float16_t)0.044470772f,  (float16_t)0.999010686f,
+    (float16_t)0.042938257f,  (float16_t)0.999077728f,
+    (float16_t)0.041405641f,  (float16_t)0.999142419f,
+    (float16_t)0.039872928f,  (float16_t)0.999204759f,
+    (float16_t)0.038340120f,  (float16_t)0.999264747f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.035274239f,  (float16_t)0.999377670f,
+    (float16_t)0.033741172f,  (float16_t)0.999430605f,
+    (float16_t)0.032208025f,  (float16_t)0.999481187f,
+    (float16_t)0.030674803f,  (float16_t)0.999529418f,
+    (float16_t)0.029141509f,  (float16_t)0.999575296f,
+    (float16_t)0.027608146f,  (float16_t)0.999618822f,
+    (float16_t)0.026074718f,  (float16_t)0.999659997f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.023007681f,  (float16_t)0.999735288f,
+    (float16_t)0.021474080f,  (float16_t)0.999769405f,
+    (float16_t)0.019940429f,  (float16_t)0.999801170f,
+    (float16_t)0.018406730f,  (float16_t)0.999830582f,
+    (float16_t)0.016872988f,  (float16_t)0.999857641f,
+    (float16_t)0.015339206f,  (float16_t)0.999882347f,
+    (float16_t)0.013805389f,  (float16_t)0.999904701f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.010737659f,  (float16_t)0.999942350f,
+    (float16_t)0.009203755f,  (float16_t)0.999957645f,
+    (float16_t)0.007669829f,  (float16_t)0.999970586f,
+    (float16_t)0.006135885f,  (float16_t)0.999981175f,
+    (float16_t)0.004601926f,  (float16_t)0.999989411f,
+    (float16_t)0.003067957f,  (float16_t)0.999995294f,
+    (float16_t)0.001533980f,  (float16_t)0.999998823f,
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+   (float16_t)-0.001533980f,  (float16_t)0.999998823f,
+   (float16_t)-0.003067957f,  (float16_t)0.999995294f,
+   (float16_t)-0.004601926f,  (float16_t)0.999989411f,
+   (float16_t)-0.006135885f,  (float16_t)0.999981175f,
+   (float16_t)-0.007669829f,  (float16_t)0.999970586f,
+   (float16_t)-0.009203755f,  (float16_t)0.999957645f,
+   (float16_t)-0.010737659f,  (float16_t)0.999942350f,
+   (float16_t)-0.012271538f,  (float16_t)0.999924702f,
+   (float16_t)-0.013805389f,  (float16_t)0.999904701f,
+   (float16_t)-0.015339206f,  (float16_t)0.999882347f,
+   (float16_t)-0.016872988f,  (float16_t)0.999857641f,
+   (float16_t)-0.018406730f,  (float16_t)0.999830582f,
+   (float16_t)-0.019940429f,  (float16_t)0.999801170f,
+   (float16_t)-0.021474080f,  (float16_t)0.999769405f,
+   (float16_t)-0.023007681f,  (float16_t)0.999735288f,
+   (float16_t)-0.024541229f,  (float16_t)0.999698819f,
+   (float16_t)-0.026074718f,  (float16_t)0.999659997f,
+   (float16_t)-0.027608146f,  (float16_t)0.999618822f,
+   (float16_t)-0.029141509f,  (float16_t)0.999575296f,
+   (float16_t)-0.030674803f,  (float16_t)0.999529418f,
+   (float16_t)-0.032208025f,  (float16_t)0.999481187f,
+   (float16_t)-0.033741172f,  (float16_t)0.999430605f,
+   (float16_t)-0.035274239f,  (float16_t)0.999377670f,
+   (float16_t)-0.036807223f,  (float16_t)0.999322385f,
+   (float16_t)-0.038340120f,  (float16_t)0.999264747f,
+   (float16_t)-0.039872928f,  (float16_t)0.999204759f,
+   (float16_t)-0.041405641f,  (float16_t)0.999142419f,
+   (float16_t)-0.042938257f,  (float16_t)0.999077728f,
+   (float16_t)-0.044470772f,  (float16_t)0.999010686f,
+   (float16_t)-0.046003182f,  (float16_t)0.998941293f,
+   (float16_t)-0.047535484f,  (float16_t)0.998869550f,
+   (float16_t)-0.049067674f,  (float16_t)0.998795456f,
+   (float16_t)-0.050599749f,  (float16_t)0.998719012f,
+   (float16_t)-0.052131705f,  (float16_t)0.998640218f,
+   (float16_t)-0.053663538f,  (float16_t)0.998559074f,
+   (float16_t)-0.055195244f,  (float16_t)0.998475581f,
+   (float16_t)-0.056726821f,  (float16_t)0.998389737f,
+   (float16_t)-0.058258265f,  (float16_t)0.998301545f,
+   (float16_t)-0.059789571f,  (float16_t)0.998211003f,
+   (float16_t)-0.061320736f,  (float16_t)0.998118113f,
+   (float16_t)-0.062851758f,  (float16_t)0.998022874f,
+   (float16_t)-0.064382631f,  (float16_t)0.997925286f,
+   (float16_t)-0.065913353f,  (float16_t)0.997825350f,
+   (float16_t)-0.067443920f,  (float16_t)0.997723067f,
+   (float16_t)-0.068974328f,  (float16_t)0.997618435f,
+   (float16_t)-0.070504573f,  (float16_t)0.997511456f,
+   (float16_t)-0.072034653f,  (float16_t)0.997402130f,
+   (float16_t)-0.073564564f,  (float16_t)0.997290457f,
+   (float16_t)-0.075094301f,  (float16_t)0.997176437f,
+   (float16_t)-0.076623861f,  (float16_t)0.997060070f,
+   (float16_t)-0.078153242f,  (float16_t)0.996941358f,
+   (float16_t)-0.079682438f,  (float16_t)0.996820299f,
+   (float16_t)-0.081211447f,  (float16_t)0.996696895f,
+   (float16_t)-0.082740265f,  (float16_t)0.996571146f,
+   (float16_t)-0.084268888f,  (float16_t)0.996443051f,
+   (float16_t)-0.085797312f,  (float16_t)0.996312612f,
+   (float16_t)-0.087325535f,  (float16_t)0.996179829f,
+   (float16_t)-0.088853553f,  (float16_t)0.996044701f,
+   (float16_t)-0.090381361f,  (float16_t)0.995907229f,
+   (float16_t)-0.091908956f,  (float16_t)0.995767414f,
+   (float16_t)-0.093436336f,  (float16_t)0.995625256f,
+   (float16_t)-0.094963495f,  (float16_t)0.995480755f,
+   (float16_t)-0.096490431f,  (float16_t)0.995333912f,
+   (float16_t)-0.098017140f,  (float16_t)0.995184727f,
+   (float16_t)-0.099543619f,  (float16_t)0.995033199f,
+   (float16_t)-0.101069863f,  (float16_t)0.994879331f,
+   (float16_t)-0.102595869f,  (float16_t)0.994723121f,
+   (float16_t)-0.104121634f,  (float16_t)0.994564571f,
+   (float16_t)-0.105647154f,  (float16_t)0.994403680f,
+   (float16_t)-0.107172425f,  (float16_t)0.994240449f,
+   (float16_t)-0.108697444f,  (float16_t)0.994074879f,
+   (float16_t)-0.110222207f,  (float16_t)0.993906970f,
+   (float16_t)-0.111746711f,  (float16_t)0.993736722f,
+   (float16_t)-0.113270952f,  (float16_t)0.993564136f,
+   (float16_t)-0.114794927f,  (float16_t)0.993389211f,
+   (float16_t)-0.116318631f,  (float16_t)0.993211949f,
+   (float16_t)-0.117842062f,  (float16_t)0.993032350f,
+   (float16_t)-0.119365215f,  (float16_t)0.992850414f,
+   (float16_t)-0.120888087f,  (float16_t)0.992666142f,
+   (float16_t)-0.122410675f,  (float16_t)0.992479535f,
+   (float16_t)-0.123932975f,  (float16_t)0.992290591f,
+   (float16_t)-0.125454983f,  (float16_t)0.992099313f,
+   (float16_t)-0.126976696f,  (float16_t)0.991905700f,
+   (float16_t)-0.128498111f,  (float16_t)0.991709754f,
+   (float16_t)-0.130019223f,  (float16_t)0.991511473f,
+   (float16_t)-0.131540029f,  (float16_t)0.991310860f,
+   (float16_t)-0.133060525f,  (float16_t)0.991107914f,
+   (float16_t)-0.134580709f,  (float16_t)0.990902635f,
+   (float16_t)-0.136100575f,  (float16_t)0.990695025f,
+   (float16_t)-0.137620122f,  (float16_t)0.990485084f,
+   (float16_t)-0.139139344f,  (float16_t)0.990272812f,
+   (float16_t)-0.140658239f,  (float16_t)0.990058210f,
+   (float16_t)-0.142176804f,  (float16_t)0.989841278f,
+   (float16_t)-0.143695033f,  (float16_t)0.989622017f,
+   (float16_t)-0.145212925f,  (float16_t)0.989400428f,
+   (float16_t)-0.146730474f,  (float16_t)0.989176510f,
+   (float16_t)-0.148247679f,  (float16_t)0.988950265f,
+   (float16_t)-0.149764535f,  (float16_t)0.988721692f,
+   (float16_t)-0.151281038f,  (float16_t)0.988490793f,
+   (float16_t)-0.152797185f,  (float16_t)0.988257568f,
+   (float16_t)-0.154312973f,  (float16_t)0.988022017f,
+   (float16_t)-0.155828398f,  (float16_t)0.987784142f,
+   (float16_t)-0.157343456f,  (float16_t)0.987543942f,
+   (float16_t)-0.158858143f,  (float16_t)0.987301418f,
+   (float16_t)-0.160372457f,  (float16_t)0.987056571f,
+   (float16_t)-0.161886394f,  (float16_t)0.986809402f,
+   (float16_t)-0.163399949f,  (float16_t)0.986559910f,
+   (float16_t)-0.164913120f,  (float16_t)0.986308097f,
+   (float16_t)-0.166425904f,  (float16_t)0.986053963f,
+   (float16_t)-0.167938295f,  (float16_t)0.985797509f,
+   (float16_t)-0.169450291f,  (float16_t)0.985538735f,
+   (float16_t)-0.170961889f,  (float16_t)0.985277642f,
+   (float16_t)-0.172473084f,  (float16_t)0.985014231f,
+   (float16_t)-0.173983873f,  (float16_t)0.984748502f,
+   (float16_t)-0.175494253f,  (float16_t)0.984480455f,
+   (float16_t)-0.177004220f,  (float16_t)0.984210092f,
+   (float16_t)-0.178513771f,  (float16_t)0.983937413f,
+   (float16_t)-0.180022901f,  (float16_t)0.983662419f,
+   (float16_t)-0.181531608f,  (float16_t)0.983385110f,
+   (float16_t)-0.183039888f,  (float16_t)0.983105487f,
+   (float16_t)-0.184547737f,  (float16_t)0.982823551f,
+   (float16_t)-0.186055152f,  (float16_t)0.982539302f,
+   (float16_t)-0.187562129f,  (float16_t)0.982252741f,
+   (float16_t)-0.189068664f,  (float16_t)0.981963869f,
+   (float16_t)-0.190574755f,  (float16_t)0.981672686f,
+   (float16_t)-0.192080397f,  (float16_t)0.981379193f,
+   (float16_t)-0.193585587f,  (float16_t)0.981083391f,
+   (float16_t)-0.195090322f,  (float16_t)0.980785280f,
+   (float16_t)-0.196594598f,  (float16_t)0.980484862f,
+   (float16_t)-0.198098411f,  (float16_t)0.980182136f,
+   (float16_t)-0.199601758f,  (float16_t)0.979877104f,
+   (float16_t)-0.201104635f,  (float16_t)0.979569766f,
+   (float16_t)-0.202607039f,  (float16_t)0.979260123f,
+   (float16_t)-0.204108966f,  (float16_t)0.978948175f,
+   (float16_t)-0.205610413f,  (float16_t)0.978633924f,
+   (float16_t)-0.207111376f,  (float16_t)0.978317371f,
+   (float16_t)-0.208611852f,  (float16_t)0.977998515f,
+   (float16_t)-0.210111837f,  (float16_t)0.977677358f,
+   (float16_t)-0.211611327f,  (float16_t)0.977353900f,
+   (float16_t)-0.213110320f,  (float16_t)0.977028143f,
+   (float16_t)-0.214608811f,  (float16_t)0.976700086f,
+   (float16_t)-0.216106797f,  (float16_t)0.976369731f,
+   (float16_t)-0.217604275f,  (float16_t)0.976037079f,
+   (float16_t)-0.219101240f,  (float16_t)0.975702130f,
+   (float16_t)-0.220597690f,  (float16_t)0.975364885f,
+   (float16_t)-0.222093621f,  (float16_t)0.975025345f,
+   (float16_t)-0.223589029f,  (float16_t)0.974683511f,
+   (float16_t)-0.225083911f,  (float16_t)0.974339383f,
+   (float16_t)-0.226578264f,  (float16_t)0.973992962f,
+   (float16_t)-0.228072083f,  (float16_t)0.973644250f,
+   (float16_t)-0.229565366f,  (float16_t)0.973293246f,
+   (float16_t)-0.231058108f,  (float16_t)0.972939952f,
+   (float16_t)-0.232550307f,  (float16_t)0.972584369f,
+   (float16_t)-0.234041959f,  (float16_t)0.972226497f,
+   (float16_t)-0.235533059f,  (float16_t)0.971866337f,
+   (float16_t)-0.237023606f,  (float16_t)0.971503891f,
+   (float16_t)-0.238513595f,  (float16_t)0.971139158f,
+   (float16_t)-0.240003022f,  (float16_t)0.970772141f,
+   (float16_t)-0.241491885f,  (float16_t)0.970402839f,
+   (float16_t)-0.242980180f,  (float16_t)0.970031253f,
+   (float16_t)-0.244467903f,  (float16_t)0.969657385f,
+   (float16_t)-0.245955050f,  (float16_t)0.969281235f,
+   (float16_t)-0.247441619f,  (float16_t)0.968902805f,
+   (float16_t)-0.248927606f,  (float16_t)0.968522094f,
+   (float16_t)-0.250413007f,  (float16_t)0.968139105f,
+   (float16_t)-0.251897818f,  (float16_t)0.967753837f,
+   (float16_t)-0.253382037f,  (float16_t)0.967366292f,
+   (float16_t)-0.254865660f,  (float16_t)0.966976471f,
+   (float16_t)-0.256348682f,  (float16_t)0.966584374f,
+   (float16_t)-0.257831102f,  (float16_t)0.966190003f,
+   (float16_t)-0.259312915f,  (float16_t)0.965793359f,
+   (float16_t)-0.260794118f,  (float16_t)0.965394442f,
+   (float16_t)-0.262274707f,  (float16_t)0.964993253f,
+   (float16_t)-0.263754679f,  (float16_t)0.964589793f,
+   (float16_t)-0.265234030f,  (float16_t)0.964184064f,
+   (float16_t)-0.266712757f,  (float16_t)0.963776066f,
+   (float16_t)-0.268190857f,  (float16_t)0.963365800f,
+   (float16_t)-0.269668326f,  (float16_t)0.962953267f,
+   (float16_t)-0.271145160f,  (float16_t)0.962538468f,
+   (float16_t)-0.272621355f,  (float16_t)0.962121404f,
+   (float16_t)-0.274096910f,  (float16_t)0.961702077f,
+   (float16_t)-0.275571819f,  (float16_t)0.961280486f,
+   (float16_t)-0.277046080f,  (float16_t)0.960856633f,
+   (float16_t)-0.278519689f,  (float16_t)0.960430519f,
+   (float16_t)-0.279992643f,  (float16_t)0.960002146f,
+   (float16_t)-0.281464938f,  (float16_t)0.959571513f,
+   (float16_t)-0.282936570f,  (float16_t)0.959138622f,
+   (float16_t)-0.284407537f,  (float16_t)0.958703475f,
+   (float16_t)-0.285877835f,  (float16_t)0.958266071f,
+   (float16_t)-0.287347460f,  (float16_t)0.957826413f,
+   (float16_t)-0.288816408f,  (float16_t)0.957384501f,
+   (float16_t)-0.290284677f,  (float16_t)0.956940336f,
+   (float16_t)-0.291752263f,  (float16_t)0.956493919f,
+   (float16_t)-0.293219163f,  (float16_t)0.956045251f,
+   (float16_t)-0.294685372f,  (float16_t)0.955594334f,
+   (float16_t)-0.296150888f,  (float16_t)0.955141168f,
+   (float16_t)-0.297615707f,  (float16_t)0.954685755f,
+   (float16_t)-0.299079826f,  (float16_t)0.954228095f,
+   (float16_t)-0.300543241f,  (float16_t)0.953768190f,
+   (float16_t)-0.302005949f,  (float16_t)0.953306040f,
+   (float16_t)-0.303467947f,  (float16_t)0.952841648f,
+   (float16_t)-0.304929230f,  (float16_t)0.952375013f,
+   (float16_t)-0.306389795f,  (float16_t)0.951906137f,
+   (float16_t)-0.307849640f,  (float16_t)0.951435021f,
+   (float16_t)-0.309308760f,  (float16_t)0.950961666f,
+   (float16_t)-0.310767153f,  (float16_t)0.950486074f,
+   (float16_t)-0.312224814f,  (float16_t)0.950008245f,
+   (float16_t)-0.313681740f,  (float16_t)0.949528181f,
+   (float16_t)-0.315137929f,  (float16_t)0.949045882f,
+   (float16_t)-0.316593376f,  (float16_t)0.948561350f,
+   (float16_t)-0.318048077f,  (float16_t)0.948074586f,
+   (float16_t)-0.319502031f,  (float16_t)0.947585591f,
+   (float16_t)-0.320955232f,  (float16_t)0.947094366f,
+   (float16_t)-0.322407679f,  (float16_t)0.946600913f,
+   (float16_t)-0.323859367f,  (float16_t)0.946105232f,
+   (float16_t)-0.325310292f,  (float16_t)0.945607325f,
+   (float16_t)-0.326760452f,  (float16_t)0.945107193f,
+   (float16_t)-0.328209844f,  (float16_t)0.944604837f,
+   (float16_t)-0.329658463f,  (float16_t)0.944100258f,
+   (float16_t)-0.331106306f,  (float16_t)0.943593458f,
+   (float16_t)-0.332553370f,  (float16_t)0.943084437f,
+   (float16_t)-0.333999651f,  (float16_t)0.942573198f,
+   (float16_t)-0.335445147f,  (float16_t)0.942059740f,
+   (float16_t)-0.336889853f,  (float16_t)0.941544065f,
+   (float16_t)-0.338333767f,  (float16_t)0.941026175f,
+   (float16_t)-0.339776884f,  (float16_t)0.940506071f,
+   (float16_t)-0.341219202f,  (float16_t)0.939983753f,
+   (float16_t)-0.342660717f,  (float16_t)0.939459224f,
+   (float16_t)-0.344101426f,  (float16_t)0.938932484f,
+   (float16_t)-0.345541325f,  (float16_t)0.938403534f,
+   (float16_t)-0.346980411f,  (float16_t)0.937872376f,
+   (float16_t)-0.348418680f,  (float16_t)0.937339012f,
+   (float16_t)-0.349856130f,  (float16_t)0.936803442f,
+   (float16_t)-0.351292756f,  (float16_t)0.936265667f,
+   (float16_t)-0.352728556f,  (float16_t)0.935725689f,
+   (float16_t)-0.354163525f,  (float16_t)0.935183510f,
+   (float16_t)-0.355597662f,  (float16_t)0.934639130f,
+   (float16_t)-0.357030961f,  (float16_t)0.934092550f,
+   (float16_t)-0.358463421f,  (float16_t)0.933543773f,
+   (float16_t)-0.359895037f,  (float16_t)0.932992799f,
+   (float16_t)-0.361325806f,  (float16_t)0.932439629f,
+   (float16_t)-0.362755724f,  (float16_t)0.931884266f,
+   (float16_t)-0.364184790f,  (float16_t)0.931326709f,
+   (float16_t)-0.365612998f,  (float16_t)0.930766961f,
+   (float16_t)-0.367040346f,  (float16_t)0.930205023f,
+   (float16_t)-0.368466830f,  (float16_t)0.929640896f,
+   (float16_t)-0.369892447f,  (float16_t)0.929074581f,
+   (float16_t)-0.371317194f,  (float16_t)0.928506080f,
+   (float16_t)-0.372741067f,  (float16_t)0.927935395f,
+   (float16_t)-0.374164063f,  (float16_t)0.927362526f,
+   (float16_t)-0.375586178f,  (float16_t)0.926787474f,
+   (float16_t)-0.377007410f,  (float16_t)0.926210242f,
+   (float16_t)-0.378427755f,  (float16_t)0.925630831f,
+   (float16_t)-0.379847209f,  (float16_t)0.925049241f,
+   (float16_t)-0.381265769f,  (float16_t)0.924465474f,
+   (float16_t)-0.382683432f,  (float16_t)0.923879533f,
+   (float16_t)-0.384100195f,  (float16_t)0.923291417f,
+   (float16_t)-0.385516054f,  (float16_t)0.922701128f,
+   (float16_t)-0.386931006f,  (float16_t)0.922108669f,
+   (float16_t)-0.388345047f,  (float16_t)0.921514039f,
+   (float16_t)-0.389758174f,  (float16_t)0.920917242f,
+   (float16_t)-0.391170384f,  (float16_t)0.920318277f,
+   (float16_t)-0.392581674f,  (float16_t)0.919717146f,
+   (float16_t)-0.393992040f,  (float16_t)0.919113852f,
+   (float16_t)-0.395401479f,  (float16_t)0.918508394f,
+   (float16_t)-0.396809987f,  (float16_t)0.917900776f,
+   (float16_t)-0.398217562f,  (float16_t)0.917290997f,
+   (float16_t)-0.399624200f,  (float16_t)0.916679060f,
+   (float16_t)-0.401029897f,  (float16_t)0.916064966f,
+   (float16_t)-0.402434651f,  (float16_t)0.915448716f,
+   (float16_t)-0.403838458f,  (float16_t)0.914830312f,
+   (float16_t)-0.405241314f,  (float16_t)0.914209756f,
+   (float16_t)-0.406643217f,  (float16_t)0.913587048f,
+   (float16_t)-0.408044163f,  (float16_t)0.912962190f,
+   (float16_t)-0.409444149f,  (float16_t)0.912335185f,
+   (float16_t)-0.410843171f,  (float16_t)0.911706032f,
+   (float16_t)-0.412241227f,  (float16_t)0.911074734f,
+   (float16_t)-0.413638312f,  (float16_t)0.910441292f,
+   (float16_t)-0.415034424f,  (float16_t)0.909805708f,
+   (float16_t)-0.416429560f,  (float16_t)0.909167983f,
+   (float16_t)-0.417823716f,  (float16_t)0.908528119f,
+   (float16_t)-0.419216888f,  (float16_t)0.907886116f,
+   (float16_t)-0.420609074f,  (float16_t)0.907241978f,
+   (float16_t)-0.422000271f,  (float16_t)0.906595705f,
+   (float16_t)-0.423390474f,  (float16_t)0.905947298f,
+   (float16_t)-0.424779681f,  (float16_t)0.905296759f,
+   (float16_t)-0.426167889f,  (float16_t)0.904644091f,
+   (float16_t)-0.427555093f,  (float16_t)0.903989293f,
+   (float16_t)-0.428941292f,  (float16_t)0.903332368f,
+   (float16_t)-0.430326481f,  (float16_t)0.902673318f,
+   (float16_t)-0.431710658f,  (float16_t)0.902012144f,
+   (float16_t)-0.433093819f,  (float16_t)0.901348847f,
+   (float16_t)-0.434475961f,  (float16_t)0.900683429f,
+   (float16_t)-0.435857080f,  (float16_t)0.900015892f,
+   (float16_t)-0.437237174f,  (float16_t)0.899346237f,
+   (float16_t)-0.438616239f,  (float16_t)0.898674466f,
+   (float16_t)-0.439994271f,  (float16_t)0.898000580f,
+   (float16_t)-0.441371269f,  (float16_t)0.897324581f,
+   (float16_t)-0.442747228f,  (float16_t)0.896646470f,
+   (float16_t)-0.444122145f,  (float16_t)0.895966250f,
+   (float16_t)-0.445496017f,  (float16_t)0.895283921f,
+   (float16_t)-0.446868840f,  (float16_t)0.894599486f,
+   (float16_t)-0.448240612f,  (float16_t)0.893912945f,
+   (float16_t)-0.449611330f,  (float16_t)0.893224301f,
+   (float16_t)-0.450980989f,  (float16_t)0.892533555f,
+   (float16_t)-0.452349587f,  (float16_t)0.891840709f,
+   (float16_t)-0.453717121f,  (float16_t)0.891145765f,
+   (float16_t)-0.455083587f,  (float16_t)0.890448723f,
+   (float16_t)-0.456448982f,  (float16_t)0.889749586f,
+   (float16_t)-0.457813304f,  (float16_t)0.889048356f,
+   (float16_t)-0.459176548f,  (float16_t)0.888345033f,
+   (float16_t)-0.460538711f,  (float16_t)0.887639620f,
+   (float16_t)-0.461899791f,  (float16_t)0.886932119f,
+   (float16_t)-0.463259784f,  (float16_t)0.886222530f,
+   (float16_t)-0.464618686f,  (float16_t)0.885510856f,
+   (float16_t)-0.465976496f,  (float16_t)0.884797098f,
+   (float16_t)-0.467333209f,  (float16_t)0.884081259f,
+   (float16_t)-0.468688822f,  (float16_t)0.883363339f,
+   (float16_t)-0.470043332f,  (float16_t)0.882643340f,
+   (float16_t)-0.471396737f,  (float16_t)0.881921264f,
+   (float16_t)-0.472749032f,  (float16_t)0.881197113f,
+   (float16_t)-0.474100215f,  (float16_t)0.880470889f,
+   (float16_t)-0.475450282f,  (float16_t)0.879742593f,
+   (float16_t)-0.476799230f,  (float16_t)0.879012226f,
+   (float16_t)-0.478147056f,  (float16_t)0.878279792f,
+   (float16_t)-0.479493758f,  (float16_t)0.877545290f,
+   (float16_t)-0.480839331f,  (float16_t)0.876808724f,
+   (float16_t)-0.482183772f,  (float16_t)0.876070094f,
+   (float16_t)-0.483527079f,  (float16_t)0.875329403f,
+   (float16_t)-0.484869248f,  (float16_t)0.874586652f,
+   (float16_t)-0.486210276f,  (float16_t)0.873841843f,
+   (float16_t)-0.487550160f,  (float16_t)0.873094978f,
+   (float16_t)-0.488888897f,  (float16_t)0.872346059f,
+   (float16_t)-0.490226483f,  (float16_t)0.871595087f,
+   (float16_t)-0.491562916f,  (float16_t)0.870842063f,
+   (float16_t)-0.492898192f,  (float16_t)0.870086991f,
+   (float16_t)-0.494232309f,  (float16_t)0.869329871f,
+   (float16_t)-0.495565262f,  (float16_t)0.868570706f,
+   (float16_t)-0.496897049f,  (float16_t)0.867809497f,
+   (float16_t)-0.498227667f,  (float16_t)0.867046246f,
+   (float16_t)-0.499557113f,  (float16_t)0.866280954f,
+   (float16_t)-0.500885383f,  (float16_t)0.865513624f,
+   (float16_t)-0.502212474f,  (float16_t)0.864744258f,
+   (float16_t)-0.503538384f,  (float16_t)0.863972856f,
+   (float16_t)-0.504863109f,  (float16_t)0.863199422f,
+   (float16_t)-0.506186645f,  (float16_t)0.862423956f,
+   (float16_t)-0.507508991f,  (float16_t)0.861646461f,
+   (float16_t)-0.508830143f,  (float16_t)0.860866939f,
+   (float16_t)-0.510150097f,  (float16_t)0.860085390f,
+   (float16_t)-0.511468850f,  (float16_t)0.859301818f,
+   (float16_t)-0.512786401f,  (float16_t)0.858516224f,
+   (float16_t)-0.514102744f,  (float16_t)0.857728610f,
+   (float16_t)-0.515417878f,  (float16_t)0.856938977f,
+   (float16_t)-0.516731799f,  (float16_t)0.856147328f,
+   (float16_t)-0.518044504f,  (float16_t)0.855353665f,
+   (float16_t)-0.519355990f,  (float16_t)0.854557988f,
+   (float16_t)-0.520666254f,  (float16_t)0.853760301f,
+   (float16_t)-0.521975293f,  (float16_t)0.852960605f,
+   (float16_t)-0.523283103f,  (float16_t)0.852158902f,
+   (float16_t)-0.524589683f,  (float16_t)0.851355193f,
+   (float16_t)-0.525895027f,  (float16_t)0.850549481f,
+   (float16_t)-0.527199135f,  (float16_t)0.849741768f,
+   (float16_t)-0.528502002f,  (float16_t)0.848932055f,
+   (float16_t)-0.529803625f,  (float16_t)0.848120345f,
+   (float16_t)-0.531104001f,  (float16_t)0.847306639f,
+   (float16_t)-0.532403128f,  (float16_t)0.846490939f,
+   (float16_t)-0.533701002f,  (float16_t)0.845673247f,
+   (float16_t)-0.534997620f,  (float16_t)0.844853565f,
+   (float16_t)-0.536292979f,  (float16_t)0.844031895f,
+   (float16_t)-0.537587076f,  (float16_t)0.843208240f,
+   (float16_t)-0.538879909f,  (float16_t)0.842382600f,
+   (float16_t)-0.540171473f,  (float16_t)0.841554977f,
+   (float16_t)-0.541461766f,  (float16_t)0.840725375f,
+   (float16_t)-0.542750785f,  (float16_t)0.839893794f,
+   (float16_t)-0.544038527f,  (float16_t)0.839060237f,
+   (float16_t)-0.545324988f,  (float16_t)0.838224706f,
+   (float16_t)-0.546610167f,  (float16_t)0.837387202f,
+   (float16_t)-0.547894059f,  (float16_t)0.836547727f,
+   (float16_t)-0.549176662f,  (float16_t)0.835706284f,
+   (float16_t)-0.550457973f,  (float16_t)0.834862875f,
+   (float16_t)-0.551737988f,  (float16_t)0.834017501f,
+   (float16_t)-0.553016706f,  (float16_t)0.833170165f,
+   (float16_t)-0.554294121f,  (float16_t)0.832320868f,
+   (float16_t)-0.555570233f,  (float16_t)0.831469612f,
+   (float16_t)-0.556845037f,  (float16_t)0.830616400f,
+   (float16_t)-0.558118531f,  (float16_t)0.829761234f,
+   (float16_t)-0.559390712f,  (float16_t)0.828904115f,
+   (float16_t)-0.560661576f,  (float16_t)0.828045045f,
+   (float16_t)-0.561931121f,  (float16_t)0.827184027f,
+   (float16_t)-0.563199344f,  (float16_t)0.826321063f,
+   (float16_t)-0.564466242f,  (float16_t)0.825456154f,
+   (float16_t)-0.565731811f,  (float16_t)0.824589303f,
+   (float16_t)-0.566996049f,  (float16_t)0.823720511f,
+   (float16_t)-0.568258953f,  (float16_t)0.822849781f,
+   (float16_t)-0.569520519f,  (float16_t)0.821977115f,
+   (float16_t)-0.570780746f,  (float16_t)0.821102515f,
+   (float16_t)-0.572039629f,  (float16_t)0.820225983f,
+   (float16_t)-0.573297167f,  (float16_t)0.819347520f,
+   (float16_t)-0.574553355f,  (float16_t)0.818467130f,
+   (float16_t)-0.575808191f,  (float16_t)0.817584813f,
+   (float16_t)-0.577061673f,  (float16_t)0.816700573f,
+   (float16_t)-0.578313796f,  (float16_t)0.815814411f,
+   (float16_t)-0.579564559f,  (float16_t)0.814926329f,
+   (float16_t)-0.580813958f,  (float16_t)0.814036330f,
+   (float16_t)-0.582061990f,  (float16_t)0.813144415f,
+   (float16_t)-0.583308653f,  (float16_t)0.812250587f,
+   (float16_t)-0.584553943f,  (float16_t)0.811354847f,
+   (float16_t)-0.585797857f,  (float16_t)0.810457198f,
+   (float16_t)-0.587040394f,  (float16_t)0.809557642f,
+   (float16_t)-0.588281548f,  (float16_t)0.808656182f,
+   (float16_t)-0.589521319f,  (float16_t)0.807752818f,
+   (float16_t)-0.590759702f,  (float16_t)0.806847554f,
+   (float16_t)-0.591996695f,  (float16_t)0.805940391f,
+   (float16_t)-0.593232295f,  (float16_t)0.805031331f,
+   (float16_t)-0.594466499f,  (float16_t)0.804120377f,
+   (float16_t)-0.595699304f,  (float16_t)0.803207531f,
+   (float16_t)-0.596930708f,  (float16_t)0.802292796f,
+   (float16_t)-0.598160707f,  (float16_t)0.801376172f,
+   (float16_t)-0.599389298f,  (float16_t)0.800457662f,
+   (float16_t)-0.600616479f,  (float16_t)0.799537269f,
+   (float16_t)-0.601842247f,  (float16_t)0.798614995f,
+   (float16_t)-0.603066599f,  (float16_t)0.797690841f,
+   (float16_t)-0.604289531f,  (float16_t)0.796764810f,
+   (float16_t)-0.605511041f,  (float16_t)0.795836905f,
+   (float16_t)-0.606731127f,  (float16_t)0.794907126f,
+   (float16_t)-0.607949785f,  (float16_t)0.793975478f,
+   (float16_t)-0.609167012f,  (float16_t)0.793041960f,
+   (float16_t)-0.610382806f,  (float16_t)0.792106577f,
+   (float16_t)-0.611597164f,  (float16_t)0.791169330f,
+   (float16_t)-0.612810082f,  (float16_t)0.790230221f,
+   (float16_t)-0.614021559f,  (float16_t)0.789289253f,
+   (float16_t)-0.615231591f,  (float16_t)0.788346428f,
+   (float16_t)-0.616440175f,  (float16_t)0.787401747f,
+   (float16_t)-0.617647308f,  (float16_t)0.786455214f,
+   (float16_t)-0.618852988f,  (float16_t)0.785506830f,
+   (float16_t)-0.620057212f,  (float16_t)0.784556597f,
+   (float16_t)-0.621259977f,  (float16_t)0.783604519f,
+   (float16_t)-0.622461279f,  (float16_t)0.782650596f,
+   (float16_t)-0.623661118f,  (float16_t)0.781694832f,
+   (float16_t)-0.624859488f,  (float16_t)0.780737229f,
+   (float16_t)-0.626056388f,  (float16_t)0.779777788f,
+   (float16_t)-0.627251815f,  (float16_t)0.778816512f,
+   (float16_t)-0.628445767f,  (float16_t)0.777853404f,
+   (float16_t)-0.629638239f,  (float16_t)0.776888466f,
+   (float16_t)-0.630829230f,  (float16_t)0.775921699f,
+   (float16_t)-0.632018736f,  (float16_t)0.774953107f,
+   (float16_t)-0.633206755f,  (float16_t)0.773982691f,
+   (float16_t)-0.634393284f,  (float16_t)0.773010453f,
+   (float16_t)-0.635578320f,  (float16_t)0.772036397f,
+   (float16_t)-0.636761861f,  (float16_t)0.771060524f,
+   (float16_t)-0.637943904f,  (float16_t)0.770082837f,
+   (float16_t)-0.639124445f,  (float16_t)0.769103338f,
+   (float16_t)-0.640303482f,  (float16_t)0.768122029f,
+   (float16_t)-0.641481013f,  (float16_t)0.767138912f,
+   (float16_t)-0.642657034f,  (float16_t)0.766153990f,
+   (float16_t)-0.643831543f,  (float16_t)0.765167266f,
+   (float16_t)-0.645004537f,  (float16_t)0.764178741f,
+   (float16_t)-0.646176013f,  (float16_t)0.763188417f,
+   (float16_t)-0.647345969f,  (float16_t)0.762196298f,
+   (float16_t)-0.648514401f,  (float16_t)0.761202385f,
+   (float16_t)-0.649681307f,  (float16_t)0.760206682f,
+   (float16_t)-0.650846685f,  (float16_t)0.759209189f,
+   (float16_t)-0.652010531f,  (float16_t)0.758209910f,
+   (float16_t)-0.653172843f,  (float16_t)0.757208847f,
+   (float16_t)-0.654333618f,  (float16_t)0.756206001f,
+   (float16_t)-0.655492853f,  (float16_t)0.755201377f,
+   (float16_t)-0.656650546f,  (float16_t)0.754194975f,
+   (float16_t)-0.657806693f,  (float16_t)0.753186799f,
+   (float16_t)-0.658961293f,  (float16_t)0.752176850f,
+   (float16_t)-0.660114342f,  (float16_t)0.751165132f,
+   (float16_t)-0.661265838f,  (float16_t)0.750151646f,
+   (float16_t)-0.662415778f,  (float16_t)0.749136395f,
+   (float16_t)-0.663564159f,  (float16_t)0.748119380f,
+   (float16_t)-0.664710978f,  (float16_t)0.747100606f,
+   (float16_t)-0.665856234f,  (float16_t)0.746080074f,
+   (float16_t)-0.666999922f,  (float16_t)0.745057785f,
+   (float16_t)-0.668142041f,  (float16_t)0.744033744f,
+   (float16_t)-0.669282588f,  (float16_t)0.743007952f,
+   (float16_t)-0.670421560f,  (float16_t)0.741980412f,
+   (float16_t)-0.671558955f,  (float16_t)0.740951125f,
+   (float16_t)-0.672694769f,  (float16_t)0.739920095f,
+   (float16_t)-0.673829000f,  (float16_t)0.738887324f,
+   (float16_t)-0.674961646f,  (float16_t)0.737852815f,
+   (float16_t)-0.676092704f,  (float16_t)0.736816569f,
+   (float16_t)-0.677222170f,  (float16_t)0.735778589f,
+   (float16_t)-0.678350043f,  (float16_t)0.734738878f,
+   (float16_t)-0.679476320f,  (float16_t)0.733697438f,
+   (float16_t)-0.680600998f,  (float16_t)0.732654272f,
+   (float16_t)-0.681724074f,  (float16_t)0.731609381f,
+   (float16_t)-0.682845546f,  (float16_t)0.730562769f,
+   (float16_t)-0.683965412f,  (float16_t)0.729514438f,
+   (float16_t)-0.685083668f,  (float16_t)0.728464390f,
+   (float16_t)-0.686200312f,  (float16_t)0.727412629f,
+   (float16_t)-0.687315341f,  (float16_t)0.726359155f,
+   (float16_t)-0.688428753f,  (float16_t)0.725303972f,
+   (float16_t)-0.689540545f,  (float16_t)0.724247083f,
+   (float16_t)-0.690650714f,  (float16_t)0.723188489f,
+   (float16_t)-0.691759258f,  (float16_t)0.722128194f,
+   (float16_t)-0.692866175f,  (float16_t)0.721066199f,
+   (float16_t)-0.693971461f,  (float16_t)0.720002508f,
+   (float16_t)-0.695075114f,  (float16_t)0.718937122f,
+   (float16_t)-0.696177131f,  (float16_t)0.717870045f,
+   (float16_t)-0.697277511f,  (float16_t)0.716801279f,
+   (float16_t)-0.698376249f,  (float16_t)0.715730825f,
+   (float16_t)-0.699473345f,  (float16_t)0.714658688f,
+   (float16_t)-0.700568794f,  (float16_t)0.713584869f,
+   (float16_t)-0.701662595f,  (float16_t)0.712509371f,
+   (float16_t)-0.702754744f,  (float16_t)0.711432196f,
+   (float16_t)-0.703845241f,  (float16_t)0.710353347f,
+   (float16_t)-0.704934080f,  (float16_t)0.709272826f,
+   (float16_t)-0.706021261f,  (float16_t)0.708190637f,
+   (float16_t)-0.707106781f,  (float16_t)0.707106781f,
+   (float16_t)-0.708190637f,  (float16_t)0.706021261f,
+   (float16_t)-0.709272826f,  (float16_t)0.704934080f,
+   (float16_t)-0.710353347f,  (float16_t)0.703845241f,
+   (float16_t)-0.711432196f,  (float16_t)0.702754744f,
+   (float16_t)-0.712509371f,  (float16_t)0.701662595f,
+   (float16_t)-0.713584869f,  (float16_t)0.700568794f,
+   (float16_t)-0.714658688f,  (float16_t)0.699473345f,
+   (float16_t)-0.715730825f,  (float16_t)0.698376249f,
+   (float16_t)-0.716801279f,  (float16_t)0.697277511f,
+   (float16_t)-0.717870045f,  (float16_t)0.696177131f,
+   (float16_t)-0.718937122f,  (float16_t)0.695075114f,
+   (float16_t)-0.720002508f,  (float16_t)0.693971461f,
+   (float16_t)-0.721066199f,  (float16_t)0.692866175f,
+   (float16_t)-0.722128194f,  (float16_t)0.691759258f,
+   (float16_t)-0.723188489f,  (float16_t)0.690650714f,
+   (float16_t)-0.724247083f,  (float16_t)0.689540545f,
+   (float16_t)-0.725303972f,  (float16_t)0.688428753f,
+   (float16_t)-0.726359155f,  (float16_t)0.687315341f,
+   (float16_t)-0.727412629f,  (float16_t)0.686200312f,
+   (float16_t)-0.728464390f,  (float16_t)0.685083668f,
+   (float16_t)-0.729514438f,  (float16_t)0.683965412f,
+   (float16_t)-0.730562769f,  (float16_t)0.682845546f,
+   (float16_t)-0.731609381f,  (float16_t)0.681724074f,
+   (float16_t)-0.732654272f,  (float16_t)0.680600998f,
+   (float16_t)-0.733697438f,  (float16_t)0.679476320f,
+   (float16_t)-0.734738878f,  (float16_t)0.678350043f,
+   (float16_t)-0.735778589f,  (float16_t)0.677222170f,
+   (float16_t)-0.736816569f,  (float16_t)0.676092704f,
+   (float16_t)-0.737852815f,  (float16_t)0.674961646f,
+   (float16_t)-0.738887324f,  (float16_t)0.673829000f,
+   (float16_t)-0.739920095f,  (float16_t)0.672694769f,
+   (float16_t)-0.740951125f,  (float16_t)0.671558955f,
+   (float16_t)-0.741980412f,  (float16_t)0.670421560f,
+   (float16_t)-0.743007952f,  (float16_t)0.669282588f,
+   (float16_t)-0.744033744f,  (float16_t)0.668142041f,
+   (float16_t)-0.745057785f,  (float16_t)0.666999922f,
+   (float16_t)-0.746080074f,  (float16_t)0.665856234f,
+   (float16_t)-0.747100606f,  (float16_t)0.664710978f,
+   (float16_t)-0.748119380f,  (float16_t)0.663564159f,
+   (float16_t)-0.749136395f,  (float16_t)0.662415778f,
+   (float16_t)-0.750151646f,  (float16_t)0.661265838f,
+   (float16_t)-0.751165132f,  (float16_t)0.660114342f,
+   (float16_t)-0.752176850f,  (float16_t)0.658961293f,
+   (float16_t)-0.753186799f,  (float16_t)0.657806693f,
+   (float16_t)-0.754194975f,  (float16_t)0.656650546f,
+   (float16_t)-0.755201377f,  (float16_t)0.655492853f,
+   (float16_t)-0.756206001f,  (float16_t)0.654333618f,
+   (float16_t)-0.757208847f,  (float16_t)0.653172843f,
+   (float16_t)-0.758209910f,  (float16_t)0.652010531f,
+   (float16_t)-0.759209189f,  (float16_t)0.650846685f,
+   (float16_t)-0.760206682f,  (float16_t)0.649681307f,
+   (float16_t)-0.761202385f,  (float16_t)0.648514401f,
+   (float16_t)-0.762196298f,  (float16_t)0.647345969f,
+   (float16_t)-0.763188417f,  (float16_t)0.646176013f,
+   (float16_t)-0.764178741f,  (float16_t)0.645004537f,
+   (float16_t)-0.765167266f,  (float16_t)0.643831543f,
+   (float16_t)-0.766153990f,  (float16_t)0.642657034f,
+   (float16_t)-0.767138912f,  (float16_t)0.641481013f,
+   (float16_t)-0.768122029f,  (float16_t)0.640303482f,
+   (float16_t)-0.769103338f,  (float16_t)0.639124445f,
+   (float16_t)-0.770082837f,  (float16_t)0.637943904f,
+   (float16_t)-0.771060524f,  (float16_t)0.636761861f,
+   (float16_t)-0.772036397f,  (float16_t)0.635578320f,
+   (float16_t)-0.773010453f,  (float16_t)0.634393284f,
+   (float16_t)-0.773982691f,  (float16_t)0.633206755f,
+   (float16_t)-0.774953107f,  (float16_t)0.632018736f,
+   (float16_t)-0.775921699f,  (float16_t)0.630829230f,
+   (float16_t)-0.776888466f,  (float16_t)0.629638239f,
+   (float16_t)-0.777853404f,  (float16_t)0.628445767f,
+   (float16_t)-0.778816512f,  (float16_t)0.627251815f,
+   (float16_t)-0.779777788f,  (float16_t)0.626056388f,
+   (float16_t)-0.780737229f,  (float16_t)0.624859488f,
+   (float16_t)-0.781694832f,  (float16_t)0.623661118f,
+   (float16_t)-0.782650596f,  (float16_t)0.622461279f,
+   (float16_t)-0.783604519f,  (float16_t)0.621259977f,
+   (float16_t)-0.784556597f,  (float16_t)0.620057212f,
+   (float16_t)-0.785506830f,  (float16_t)0.618852988f,
+   (float16_t)-0.786455214f,  (float16_t)0.617647308f,
+   (float16_t)-0.787401747f,  (float16_t)0.616440175f,
+   (float16_t)-0.788346428f,  (float16_t)0.615231591f,
+   (float16_t)-0.789289253f,  (float16_t)0.614021559f,
+   (float16_t)-0.790230221f,  (float16_t)0.612810082f,
+   (float16_t)-0.791169330f,  (float16_t)0.611597164f,
+   (float16_t)-0.792106577f,  (float16_t)0.610382806f,
+   (float16_t)-0.793041960f,  (float16_t)0.609167012f,
+   (float16_t)-0.793975478f,  (float16_t)0.607949785f,
+   (float16_t)-0.794907126f,  (float16_t)0.606731127f,
+   (float16_t)-0.795836905f,  (float16_t)0.605511041f,
+   (float16_t)-0.796764810f,  (float16_t)0.604289531f,
+   (float16_t)-0.797690841f,  (float16_t)0.603066599f,
+   (float16_t)-0.798614995f,  (float16_t)0.601842247f,
+   (float16_t)-0.799537269f,  (float16_t)0.600616479f,
+   (float16_t)-0.800457662f,  (float16_t)0.599389298f,
+   (float16_t)-0.801376172f,  (float16_t)0.598160707f,
+   (float16_t)-0.802292796f,  (float16_t)0.596930708f,
+   (float16_t)-0.803207531f,  (float16_t)0.595699304f,
+   (float16_t)-0.804120377f,  (float16_t)0.594466499f,
+   (float16_t)-0.805031331f,  (float16_t)0.593232295f,
+   (float16_t)-0.805940391f,  (float16_t)0.591996695f,
+   (float16_t)-0.806847554f,  (float16_t)0.590759702f,
+   (float16_t)-0.807752818f,  (float16_t)0.589521319f,
+   (float16_t)-0.808656182f,  (float16_t)0.588281548f,
+   (float16_t)-0.809557642f,  (float16_t)0.587040394f,
+   (float16_t)-0.810457198f,  (float16_t)0.585797857f,
+   (float16_t)-0.811354847f,  (float16_t)0.584553943f,
+   (float16_t)-0.812250587f,  (float16_t)0.583308653f,
+   (float16_t)-0.813144415f,  (float16_t)0.582061990f,
+   (float16_t)-0.814036330f,  (float16_t)0.580813958f,
+   (float16_t)-0.814926329f,  (float16_t)0.579564559f,
+   (float16_t)-0.815814411f,  (float16_t)0.578313796f,
+   (float16_t)-0.816700573f,  (float16_t)0.577061673f,
+   (float16_t)-0.817584813f,  (float16_t)0.575808191f,
+   (float16_t)-0.818467130f,  (float16_t)0.574553355f,
+   (float16_t)-0.819347520f,  (float16_t)0.573297167f,
+   (float16_t)-0.820225983f,  (float16_t)0.572039629f,
+   (float16_t)-0.821102515f,  (float16_t)0.570780746f,
+   (float16_t)-0.821977115f,  (float16_t)0.569520519f,
+   (float16_t)-0.822849781f,  (float16_t)0.568258953f,
+   (float16_t)-0.823720511f,  (float16_t)0.566996049f,
+   (float16_t)-0.824589303f,  (float16_t)0.565731811f,
+   (float16_t)-0.825456154f,  (float16_t)0.564466242f,
+   (float16_t)-0.826321063f,  (float16_t)0.563199344f,
+   (float16_t)-0.827184027f,  (float16_t)0.561931121f,
+   (float16_t)-0.828045045f,  (float16_t)0.560661576f,
+   (float16_t)-0.828904115f,  (float16_t)0.559390712f,
+   (float16_t)-0.829761234f,  (float16_t)0.558118531f,
+   (float16_t)-0.830616400f,  (float16_t)0.556845037f,
+   (float16_t)-0.831469612f,  (float16_t)0.555570233f,
+   (float16_t)-0.832320868f,  (float16_t)0.554294121f,
+   (float16_t)-0.833170165f,  (float16_t)0.553016706f,
+   (float16_t)-0.834017501f,  (float16_t)0.551737988f,
+   (float16_t)-0.834862875f,  (float16_t)0.550457973f,
+   (float16_t)-0.835706284f,  (float16_t)0.549176662f,
+   (float16_t)-0.836547727f,  (float16_t)0.547894059f,
+   (float16_t)-0.837387202f,  (float16_t)0.546610167f,
+   (float16_t)-0.838224706f,  (float16_t)0.545324988f,
+   (float16_t)-0.839060237f,  (float16_t)0.544038527f,
+   (float16_t)-0.839893794f,  (float16_t)0.542750785f,
+   (float16_t)-0.840725375f,  (float16_t)0.541461766f,
+   (float16_t)-0.841554977f,  (float16_t)0.540171473f,
+   (float16_t)-0.842382600f,  (float16_t)0.538879909f,
+   (float16_t)-0.843208240f,  (float16_t)0.537587076f,
+   (float16_t)-0.844031895f,  (float16_t)0.536292979f,
+   (float16_t)-0.844853565f,  (float16_t)0.534997620f,
+   (float16_t)-0.845673247f,  (float16_t)0.533701002f,
+   (float16_t)-0.846490939f,  (float16_t)0.532403128f,
+   (float16_t)-0.847306639f,  (float16_t)0.531104001f,
+   (float16_t)-0.848120345f,  (float16_t)0.529803625f,
+   (float16_t)-0.848932055f,  (float16_t)0.528502002f,
+   (float16_t)-0.849741768f,  (float16_t)0.527199135f,
+   (float16_t)-0.850549481f,  (float16_t)0.525895027f,
+   (float16_t)-0.851355193f,  (float16_t)0.524589683f,
+   (float16_t)-0.852158902f,  (float16_t)0.523283103f,
+   (float16_t)-0.852960605f,  (float16_t)0.521975293f,
+   (float16_t)-0.853760301f,  (float16_t)0.520666254f,
+   (float16_t)-0.854557988f,  (float16_t)0.519355990f,
+   (float16_t)-0.855353665f,  (float16_t)0.518044504f,
+   (float16_t)-0.856147328f,  (float16_t)0.516731799f,
+   (float16_t)-0.856938977f,  (float16_t)0.515417878f,
+   (float16_t)-0.857728610f,  (float16_t)0.514102744f,
+   (float16_t)-0.858516224f,  (float16_t)0.512786401f,
+   (float16_t)-0.859301818f,  (float16_t)0.511468850f,
+   (float16_t)-0.860085390f,  (float16_t)0.510150097f,
+   (float16_t)-0.860866939f,  (float16_t)0.508830143f,
+   (float16_t)-0.861646461f,  (float16_t)0.507508991f,
+   (float16_t)-0.862423956f,  (float16_t)0.506186645f,
+   (float16_t)-0.863199422f,  (float16_t)0.504863109f,
+   (float16_t)-0.863972856f,  (float16_t)0.503538384f,
+   (float16_t)-0.864744258f,  (float16_t)0.502212474f,
+   (float16_t)-0.865513624f,  (float16_t)0.500885383f,
+   (float16_t)-0.866280954f,  (float16_t)0.499557113f,
+   (float16_t)-0.867046246f,  (float16_t)0.498227667f,
+   (float16_t)-0.867809497f,  (float16_t)0.496897049f,
+   (float16_t)-0.868570706f,  (float16_t)0.495565262f,
+   (float16_t)-0.869329871f,  (float16_t)0.494232309f,
+   (float16_t)-0.870086991f,  (float16_t)0.492898192f,
+   (float16_t)-0.870842063f,  (float16_t)0.491562916f,
+   (float16_t)-0.871595087f,  (float16_t)0.490226483f,
+   (float16_t)-0.872346059f,  (float16_t)0.488888897f,
+   (float16_t)-0.873094978f,  (float16_t)0.487550160f,
+   (float16_t)-0.873841843f,  (float16_t)0.486210276f,
+   (float16_t)-0.874586652f,  (float16_t)0.484869248f,
+   (float16_t)-0.875329403f,  (float16_t)0.483527079f,
+   (float16_t)-0.876070094f,  (float16_t)0.482183772f,
+   (float16_t)-0.876808724f,  (float16_t)0.480839331f,
+   (float16_t)-0.877545290f,  (float16_t)0.479493758f,
+   (float16_t)-0.878279792f,  (float16_t)0.478147056f,
+   (float16_t)-0.879012226f,  (float16_t)0.476799230f,
+   (float16_t)-0.879742593f,  (float16_t)0.475450282f,
+   (float16_t)-0.880470889f,  (float16_t)0.474100215f,
+   (float16_t)-0.881197113f,  (float16_t)0.472749032f,
+   (float16_t)-0.881921264f,  (float16_t)0.471396737f,
+   (float16_t)-0.882643340f,  (float16_t)0.470043332f,
+   (float16_t)-0.883363339f,  (float16_t)0.468688822f,
+   (float16_t)-0.884081259f,  (float16_t)0.467333209f,
+   (float16_t)-0.884797098f,  (float16_t)0.465976496f,
+   (float16_t)-0.885510856f,  (float16_t)0.464618686f,
+   (float16_t)-0.886222530f,  (float16_t)0.463259784f,
+   (float16_t)-0.886932119f,  (float16_t)0.461899791f,
+   (float16_t)-0.887639620f,  (float16_t)0.460538711f,
+   (float16_t)-0.888345033f,  (float16_t)0.459176548f,
+   (float16_t)-0.889048356f,  (float16_t)0.457813304f,
+   (float16_t)-0.889749586f,  (float16_t)0.456448982f,
+   (float16_t)-0.890448723f,  (float16_t)0.455083587f,
+   (float16_t)-0.891145765f,  (float16_t)0.453717121f,
+   (float16_t)-0.891840709f,  (float16_t)0.452349587f,
+   (float16_t)-0.892533555f,  (float16_t)0.450980989f,
+   (float16_t)-0.893224301f,  (float16_t)0.449611330f,
+   (float16_t)-0.893912945f,  (float16_t)0.448240612f,
+   (float16_t)-0.894599486f,  (float16_t)0.446868840f,
+   (float16_t)-0.895283921f,  (float16_t)0.445496017f,
+   (float16_t)-0.895966250f,  (float16_t)0.444122145f,
+   (float16_t)-0.896646470f,  (float16_t)0.442747228f,
+   (float16_t)-0.897324581f,  (float16_t)0.441371269f,
+   (float16_t)-0.898000580f,  (float16_t)0.439994271f,
+   (float16_t)-0.898674466f,  (float16_t)0.438616239f,
+   (float16_t)-0.899346237f,  (float16_t)0.437237174f,
+   (float16_t)-0.900015892f,  (float16_t)0.435857080f,
+   (float16_t)-0.900683429f,  (float16_t)0.434475961f,
+   (float16_t)-0.901348847f,  (float16_t)0.433093819f,
+   (float16_t)-0.902012144f,  (float16_t)0.431710658f,
+   (float16_t)-0.902673318f,  (float16_t)0.430326481f,
+   (float16_t)-0.903332368f,  (float16_t)0.428941292f,
+   (float16_t)-0.903989293f,  (float16_t)0.427555093f,
+   (float16_t)-0.904644091f,  (float16_t)0.426167889f,
+   (float16_t)-0.905296759f,  (float16_t)0.424779681f,
+   (float16_t)-0.905947298f,  (float16_t)0.423390474f,
+   (float16_t)-0.906595705f,  (float16_t)0.422000271f,
+   (float16_t)-0.907241978f,  (float16_t)0.420609074f,
+   (float16_t)-0.907886116f,  (float16_t)0.419216888f,
+   (float16_t)-0.908528119f,  (float16_t)0.417823716f,
+   (float16_t)-0.909167983f,  (float16_t)0.416429560f,
+   (float16_t)-0.909805708f,  (float16_t)0.415034424f,
+   (float16_t)-0.910441292f,  (float16_t)0.413638312f,
+   (float16_t)-0.911074734f,  (float16_t)0.412241227f,
+   (float16_t)-0.911706032f,  (float16_t)0.410843171f,
+   (float16_t)-0.912335185f,  (float16_t)0.409444149f,
+   (float16_t)-0.912962190f,  (float16_t)0.408044163f,
+   (float16_t)-0.913587048f,  (float16_t)0.406643217f,
+   (float16_t)-0.914209756f,  (float16_t)0.405241314f,
+   (float16_t)-0.914830312f,  (float16_t)0.403838458f,
+   (float16_t)-0.915448716f,  (float16_t)0.402434651f,
+   (float16_t)-0.916064966f,  (float16_t)0.401029897f,
+   (float16_t)-0.916679060f,  (float16_t)0.399624200f,
+   (float16_t)-0.917290997f,  (float16_t)0.398217562f,
+   (float16_t)-0.917900776f,  (float16_t)0.396809987f,
+   (float16_t)-0.918508394f,  (float16_t)0.395401479f,
+   (float16_t)-0.919113852f,  (float16_t)0.393992040f,
+   (float16_t)-0.919717146f,  (float16_t)0.392581674f,
+   (float16_t)-0.920318277f,  (float16_t)0.391170384f,
+   (float16_t)-0.920917242f,  (float16_t)0.389758174f,
+   (float16_t)-0.921514039f,  (float16_t)0.388345047f,
+   (float16_t)-0.922108669f,  (float16_t)0.386931006f,
+   (float16_t)-0.922701128f,  (float16_t)0.385516054f,
+   (float16_t)-0.923291417f,  (float16_t)0.384100195f,
+   (float16_t)-0.923879533f,  (float16_t)0.382683432f,
+   (float16_t)-0.924465474f,  (float16_t)0.381265769f,
+   (float16_t)-0.925049241f,  (float16_t)0.379847209f,
+   (float16_t)-0.925630831f,  (float16_t)0.378427755f,
+   (float16_t)-0.926210242f,  (float16_t)0.377007410f,
+   (float16_t)-0.926787474f,  (float16_t)0.375586178f,
+   (float16_t)-0.927362526f,  (float16_t)0.374164063f,
+   (float16_t)-0.927935395f,  (float16_t)0.372741067f,
+   (float16_t)-0.928506080f,  (float16_t)0.371317194f,
+   (float16_t)-0.929074581f,  (float16_t)0.369892447f,
+   (float16_t)-0.929640896f,  (float16_t)0.368466830f,
+   (float16_t)-0.930205023f,  (float16_t)0.367040346f,
+   (float16_t)-0.930766961f,  (float16_t)0.365612998f,
+   (float16_t)-0.931326709f,  (float16_t)0.364184790f,
+   (float16_t)-0.931884266f,  (float16_t)0.362755724f,
+   (float16_t)-0.932439629f,  (float16_t)0.361325806f,
+   (float16_t)-0.932992799f,  (float16_t)0.359895037f,
+   (float16_t)-0.933543773f,  (float16_t)0.358463421f,
+   (float16_t)-0.934092550f,  (float16_t)0.357030961f,
+   (float16_t)-0.934639130f,  (float16_t)0.355597662f,
+   (float16_t)-0.935183510f,  (float16_t)0.354163525f,
+   (float16_t)-0.935725689f,  (float16_t)0.352728556f,
+   (float16_t)-0.936265667f,  (float16_t)0.351292756f,
+   (float16_t)-0.936803442f,  (float16_t)0.349856130f,
+   (float16_t)-0.937339012f,  (float16_t)0.348418680f,
+   (float16_t)-0.937872376f,  (float16_t)0.346980411f,
+   (float16_t)-0.938403534f,  (float16_t)0.345541325f,
+   (float16_t)-0.938932484f,  (float16_t)0.344101426f,
+   (float16_t)-0.939459224f,  (float16_t)0.342660717f,
+   (float16_t)-0.939983753f,  (float16_t)0.341219202f,
+   (float16_t)-0.940506071f,  (float16_t)0.339776884f,
+   (float16_t)-0.941026175f,  (float16_t)0.338333767f,
+   (float16_t)-0.941544065f,  (float16_t)0.336889853f,
+   (float16_t)-0.942059740f,  (float16_t)0.335445147f,
+   (float16_t)-0.942573198f,  (float16_t)0.333999651f,
+   (float16_t)-0.943084437f,  (float16_t)0.332553370f,
+   (float16_t)-0.943593458f,  (float16_t)0.331106306f,
+   (float16_t)-0.944100258f,  (float16_t)0.329658463f,
+   (float16_t)-0.944604837f,  (float16_t)0.328209844f,
+   (float16_t)-0.945107193f,  (float16_t)0.326760452f,
+   (float16_t)-0.945607325f,  (float16_t)0.325310292f,
+   (float16_t)-0.946105232f,  (float16_t)0.323859367f,
+   (float16_t)-0.946600913f,  (float16_t)0.322407679f,
+   (float16_t)-0.947094366f,  (float16_t)0.320955232f,
+   (float16_t)-0.947585591f,  (float16_t)0.319502031f,
+   (float16_t)-0.948074586f,  (float16_t)0.318048077f,
+   (float16_t)-0.948561350f,  (float16_t)0.316593376f,
+   (float16_t)-0.949045882f,  (float16_t)0.315137929f,
+   (float16_t)-0.949528181f,  (float16_t)0.313681740f,
+   (float16_t)-0.950008245f,  (float16_t)0.312224814f,
+   (float16_t)-0.950486074f,  (float16_t)0.310767153f,
+   (float16_t)-0.950961666f,  (float16_t)0.309308760f,
+   (float16_t)-0.951435021f,  (float16_t)0.307849640f,
+   (float16_t)-0.951906137f,  (float16_t)0.306389795f,
+   (float16_t)-0.952375013f,  (float16_t)0.304929230f,
+   (float16_t)-0.952841648f,  (float16_t)0.303467947f,
+   (float16_t)-0.953306040f,  (float16_t)0.302005949f,
+   (float16_t)-0.953768190f,  (float16_t)0.300543241f,
+   (float16_t)-0.954228095f,  (float16_t)0.299079826f,
+   (float16_t)-0.954685755f,  (float16_t)0.297615707f,
+   (float16_t)-0.955141168f,  (float16_t)0.296150888f,
+   (float16_t)-0.955594334f,  (float16_t)0.294685372f,
+   (float16_t)-0.956045251f,  (float16_t)0.293219163f,
+   (float16_t)-0.956493919f,  (float16_t)0.291752263f,
+   (float16_t)-0.956940336f,  (float16_t)0.290284677f,
+   (float16_t)-0.957384501f,  (float16_t)0.288816408f,
+   (float16_t)-0.957826413f,  (float16_t)0.287347460f,
+   (float16_t)-0.958266071f,  (float16_t)0.285877835f,
+   (float16_t)-0.958703475f,  (float16_t)0.284407537f,
+   (float16_t)-0.959138622f,  (float16_t)0.282936570f,
+   (float16_t)-0.959571513f,  (float16_t)0.281464938f,
+   (float16_t)-0.960002146f,  (float16_t)0.279992643f,
+   (float16_t)-0.960430519f,  (float16_t)0.278519689f,
+   (float16_t)-0.960856633f,  (float16_t)0.277046080f,
+   (float16_t)-0.961280486f,  (float16_t)0.275571819f,
+   (float16_t)-0.961702077f,  (float16_t)0.274096910f,
+   (float16_t)-0.962121404f,  (float16_t)0.272621355f,
+   (float16_t)-0.962538468f,  (float16_t)0.271145160f,
+   (float16_t)-0.962953267f,  (float16_t)0.269668326f,
+   (float16_t)-0.963365800f,  (float16_t)0.268190857f,
+   (float16_t)-0.963776066f,  (float16_t)0.266712757f,
+   (float16_t)-0.964184064f,  (float16_t)0.265234030f,
+   (float16_t)-0.964589793f,  (float16_t)0.263754679f,
+   (float16_t)-0.964993253f,  (float16_t)0.262274707f,
+   (float16_t)-0.965394442f,  (float16_t)0.260794118f,
+   (float16_t)-0.965793359f,  (float16_t)0.259312915f,
+   (float16_t)-0.966190003f,  (float16_t)0.257831102f,
+   (float16_t)-0.966584374f,  (float16_t)0.256348682f,
+   (float16_t)-0.966976471f,  (float16_t)0.254865660f,
+   (float16_t)-0.967366292f,  (float16_t)0.253382037f,
+   (float16_t)-0.967753837f,  (float16_t)0.251897818f,
+   (float16_t)-0.968139105f,  (float16_t)0.250413007f,
+   (float16_t)-0.968522094f,  (float16_t)0.248927606f,
+   (float16_t)-0.968902805f,  (float16_t)0.247441619f,
+   (float16_t)-0.969281235f,  (float16_t)0.245955050f,
+   (float16_t)-0.969657385f,  (float16_t)0.244467903f,
+   (float16_t)-0.970031253f,  (float16_t)0.242980180f,
+   (float16_t)-0.970402839f,  (float16_t)0.241491885f,
+   (float16_t)-0.970772141f,  (float16_t)0.240003022f,
+   (float16_t)-0.971139158f,  (float16_t)0.238513595f,
+   (float16_t)-0.971503891f,  (float16_t)0.237023606f,
+   (float16_t)-0.971866337f,  (float16_t)0.235533059f,
+   (float16_t)-0.972226497f,  (float16_t)0.234041959f,
+   (float16_t)-0.972584369f,  (float16_t)0.232550307f,
+   (float16_t)-0.972939952f,  (float16_t)0.231058108f,
+   (float16_t)-0.973293246f,  (float16_t)0.229565366f,
+   (float16_t)-0.973644250f,  (float16_t)0.228072083f,
+   (float16_t)-0.973992962f,  (float16_t)0.226578264f,
+   (float16_t)-0.974339383f,  (float16_t)0.225083911f,
+   (float16_t)-0.974683511f,  (float16_t)0.223589029f,
+   (float16_t)-0.975025345f,  (float16_t)0.222093621f,
+   (float16_t)-0.975364885f,  (float16_t)0.220597690f,
+   (float16_t)-0.975702130f,  (float16_t)0.219101240f,
+   (float16_t)-0.976037079f,  (float16_t)0.217604275f,
+   (float16_t)-0.976369731f,  (float16_t)0.216106797f,
+   (float16_t)-0.976700086f,  (float16_t)0.214608811f,
+   (float16_t)-0.977028143f,  (float16_t)0.213110320f,
+   (float16_t)-0.977353900f,  (float16_t)0.211611327f,
+   (float16_t)-0.977677358f,  (float16_t)0.210111837f,
+   (float16_t)-0.977998515f,  (float16_t)0.208611852f,
+   (float16_t)-0.978317371f,  (float16_t)0.207111376f,
+   (float16_t)-0.978633924f,  (float16_t)0.205610413f,
+   (float16_t)-0.978948175f,  (float16_t)0.204108966f,
+   (float16_t)-0.979260123f,  (float16_t)0.202607039f,
+   (float16_t)-0.979569766f,  (float16_t)0.201104635f,
+   (float16_t)-0.979877104f,  (float16_t)0.199601758f,
+   (float16_t)-0.980182136f,  (float16_t)0.198098411f,
+   (float16_t)-0.980484862f,  (float16_t)0.196594598f,
+   (float16_t)-0.980785280f,  (float16_t)0.195090322f,
+   (float16_t)-0.981083391f,  (float16_t)0.193585587f,
+   (float16_t)-0.981379193f,  (float16_t)0.192080397f,
+   (float16_t)-0.981672686f,  (float16_t)0.190574755f,
+   (float16_t)-0.981963869f,  (float16_t)0.189068664f,
+   (float16_t)-0.982252741f,  (float16_t)0.187562129f,
+   (float16_t)-0.982539302f,  (float16_t)0.186055152f,
+   (float16_t)-0.982823551f,  (float16_t)0.184547737f,
+   (float16_t)-0.983105487f,  (float16_t)0.183039888f,
+   (float16_t)-0.983385110f,  (float16_t)0.181531608f,
+   (float16_t)-0.983662419f,  (float16_t)0.180022901f,
+   (float16_t)-0.983937413f,  (float16_t)0.178513771f,
+   (float16_t)-0.984210092f,  (float16_t)0.177004220f,
+   (float16_t)-0.984480455f,  (float16_t)0.175494253f,
+   (float16_t)-0.984748502f,  (float16_t)0.173983873f,
+   (float16_t)-0.985014231f,  (float16_t)0.172473084f,
+   (float16_t)-0.985277642f,  (float16_t)0.170961889f,
+   (float16_t)-0.985538735f,  (float16_t)0.169450291f,
+   (float16_t)-0.985797509f,  (float16_t)0.167938295f,
+   (float16_t)-0.986053963f,  (float16_t)0.166425904f,
+   (float16_t)-0.986308097f,  (float16_t)0.164913120f,
+   (float16_t)-0.986559910f,  (float16_t)0.163399949f,
+   (float16_t)-0.986809402f,  (float16_t)0.161886394f,
+   (float16_t)-0.987056571f,  (float16_t)0.160372457f,
+   (float16_t)-0.987301418f,  (float16_t)0.158858143f,
+   (float16_t)-0.987543942f,  (float16_t)0.157343456f,
+   (float16_t)-0.987784142f,  (float16_t)0.155828398f,
+   (float16_t)-0.988022017f,  (float16_t)0.154312973f,
+   (float16_t)-0.988257568f,  (float16_t)0.152797185f,
+   (float16_t)-0.988490793f,  (float16_t)0.151281038f,
+   (float16_t)-0.988721692f,  (float16_t)0.149764535f,
+   (float16_t)-0.988950265f,  (float16_t)0.148247679f,
+   (float16_t)-0.989176510f,  (float16_t)0.146730474f,
+   (float16_t)-0.989400428f,  (float16_t)0.145212925f,
+   (float16_t)-0.989622017f,  (float16_t)0.143695033f,
+   (float16_t)-0.989841278f,  (float16_t)0.142176804f,
+   (float16_t)-0.990058210f,  (float16_t)0.140658239f,
+   (float16_t)-0.990272812f,  (float16_t)0.139139344f,
+   (float16_t)-0.990485084f,  (float16_t)0.137620122f,
+   (float16_t)-0.990695025f,  (float16_t)0.136100575f,
+   (float16_t)-0.990902635f,  (float16_t)0.134580709f,
+   (float16_t)-0.991107914f,  (float16_t)0.133060525f,
+   (float16_t)-0.991310860f,  (float16_t)0.131540029f,
+   (float16_t)-0.991511473f,  (float16_t)0.130019223f,
+   (float16_t)-0.991709754f,  (float16_t)0.128498111f,
+   (float16_t)-0.991905700f,  (float16_t)0.126976696f,
+   (float16_t)-0.992099313f,  (float16_t)0.125454983f,
+   (float16_t)-0.992290591f,  (float16_t)0.123932975f,
+   (float16_t)-0.992479535f,  (float16_t)0.122410675f,
+   (float16_t)-0.992666142f,  (float16_t)0.120888087f,
+   (float16_t)-0.992850414f,  (float16_t)0.119365215f,
+   (float16_t)-0.993032350f,  (float16_t)0.117842062f,
+   (float16_t)-0.993211949f,  (float16_t)0.116318631f,
+   (float16_t)-0.993389211f,  (float16_t)0.114794927f,
+   (float16_t)-0.993564136f,  (float16_t)0.113270952f,
+   (float16_t)-0.993736722f,  (float16_t)0.111746711f,
+   (float16_t)-0.993906970f,  (float16_t)0.110222207f,
+   (float16_t)-0.994074879f,  (float16_t)0.108697444f,
+   (float16_t)-0.994240449f,  (float16_t)0.107172425f,
+   (float16_t)-0.994403680f,  (float16_t)0.105647154f,
+   (float16_t)-0.994564571f,  (float16_t)0.104121634f,
+   (float16_t)-0.994723121f,  (float16_t)0.102595869f,
+   (float16_t)-0.994879331f,  (float16_t)0.101069863f,
+   (float16_t)-0.995033199f,  (float16_t)0.099543619f,
+   (float16_t)-0.995184727f,  (float16_t)0.098017140f,
+   (float16_t)-0.995333912f,  (float16_t)0.096490431f,
+   (float16_t)-0.995480755f,  (float16_t)0.094963495f,
+   (float16_t)-0.995625256f,  (float16_t)0.093436336f,
+   (float16_t)-0.995767414f,  (float16_t)0.091908956f,
+   (float16_t)-0.995907229f,  (float16_t)0.090381361f,
+   (float16_t)-0.996044701f,  (float16_t)0.088853553f,
+   (float16_t)-0.996179829f,  (float16_t)0.087325535f,
+   (float16_t)-0.996312612f,  (float16_t)0.085797312f,
+   (float16_t)-0.996443051f,  (float16_t)0.084268888f,
+   (float16_t)-0.996571146f,  (float16_t)0.082740265f,
+   (float16_t)-0.996696895f,  (float16_t)0.081211447f,
+   (float16_t)-0.996820299f,  (float16_t)0.079682438f,
+   (float16_t)-0.996941358f,  (float16_t)0.078153242f,
+   (float16_t)-0.997060070f,  (float16_t)0.076623861f,
+   (float16_t)-0.997176437f,  (float16_t)0.075094301f,
+   (float16_t)-0.997290457f,  (float16_t)0.073564564f,
+   (float16_t)-0.997402130f,  (float16_t)0.072034653f,
+   (float16_t)-0.997511456f,  (float16_t)0.070504573f,
+   (float16_t)-0.997618435f,  (float16_t)0.068974328f,
+   (float16_t)-0.997723067f,  (float16_t)0.067443920f,
+   (float16_t)-0.997825350f,  (float16_t)0.065913353f,
+   (float16_t)-0.997925286f,  (float16_t)0.064382631f,
+   (float16_t)-0.998022874f,  (float16_t)0.062851758f,
+   (float16_t)-0.998118113f,  (float16_t)0.061320736f,
+   (float16_t)-0.998211003f,  (float16_t)0.059789571f,
+   (float16_t)-0.998301545f,  (float16_t)0.058258265f,
+   (float16_t)-0.998389737f,  (float16_t)0.056726821f,
+   (float16_t)-0.998475581f,  (float16_t)0.055195244f,
+   (float16_t)-0.998559074f,  (float16_t)0.053663538f,
+   (float16_t)-0.998640218f,  (float16_t)0.052131705f,
+   (float16_t)-0.998719012f,  (float16_t)0.050599749f,
+   (float16_t)-0.998795456f,  (float16_t)0.049067674f,
+   (float16_t)-0.998869550f,  (float16_t)0.047535484f,
+   (float16_t)-0.998941293f,  (float16_t)0.046003182f,
+   (float16_t)-0.999010686f,  (float16_t)0.044470772f,
+   (float16_t)-0.999077728f,  (float16_t)0.042938257f,
+   (float16_t)-0.999142419f,  (float16_t)0.041405641f,
+   (float16_t)-0.999204759f,  (float16_t)0.039872928f,
+   (float16_t)-0.999264747f,  (float16_t)0.038340120f,
+   (float16_t)-0.999322385f,  (float16_t)0.036807223f,
+   (float16_t)-0.999377670f,  (float16_t)0.035274239f,
+   (float16_t)-0.999430605f,  (float16_t)0.033741172f,
+   (float16_t)-0.999481187f,  (float16_t)0.032208025f,
+   (float16_t)-0.999529418f,  (float16_t)0.030674803f,
+   (float16_t)-0.999575296f,  (float16_t)0.029141509f,
+   (float16_t)-0.999618822f,  (float16_t)0.027608146f,
+   (float16_t)-0.999659997f,  (float16_t)0.026074718f,
+   (float16_t)-0.999698819f,  (float16_t)0.024541229f,
+   (float16_t)-0.999735288f,  (float16_t)0.023007681f,
+   (float16_t)-0.999769405f,  (float16_t)0.021474080f,
+   (float16_t)-0.999801170f,  (float16_t)0.019940429f,
+   (float16_t)-0.999830582f,  (float16_t)0.018406730f,
+   (float16_t)-0.999857641f,  (float16_t)0.016872988f,
+   (float16_t)-0.999882347f,  (float16_t)0.015339206f,
+   (float16_t)-0.999904701f,  (float16_t)0.013805389f,
+   (float16_t)-0.999924702f,  (float16_t)0.012271538f,
+   (float16_t)-0.999942350f,  (float16_t)0.010737659f,
+   (float16_t)-0.999957645f,  (float16_t)0.009203755f,
+   (float16_t)-0.999970586f,  (float16_t)0.007669829f,
+   (float16_t)-0.999981175f,  (float16_t)0.006135885f,
+   (float16_t)-0.999989411f,  (float16_t)0.004601926f,
+   (float16_t)-0.999995294f,  (float16_t)0.003067957f,
+   (float16_t)-0.999998823f,  (float16_t)0.001533980f,
+   (float16_t)-1.000000000f,  (float16_t)0.000000000f,
+   (float16_t)-0.999998823f, (float16_t)-0.001533980f,
+   (float16_t)-0.999995294f, (float16_t)-0.003067957f,
+   (float16_t)-0.999989411f, (float16_t)-0.004601926f,
+   (float16_t)-0.999981175f, (float16_t)-0.006135885f,
+   (float16_t)-0.999970586f, (float16_t)-0.007669829f,
+   (float16_t)-0.999957645f, (float16_t)-0.009203755f,
+   (float16_t)-0.999942350f, (float16_t)-0.010737659f,
+   (float16_t)-0.999924702f, (float16_t)-0.012271538f,
+   (float16_t)-0.999904701f, (float16_t)-0.013805389f,
+   (float16_t)-0.999882347f, (float16_t)-0.015339206f,
+   (float16_t)-0.999857641f, (float16_t)-0.016872988f,
+   (float16_t)-0.999830582f, (float16_t)-0.018406730f,
+   (float16_t)-0.999801170f, (float16_t)-0.019940429f,
+   (float16_t)-0.999769405f, (float16_t)-0.021474080f,
+   (float16_t)-0.999735288f, (float16_t)-0.023007681f,
+   (float16_t)-0.999698819f, (float16_t)-0.024541229f,
+   (float16_t)-0.999659997f, (float16_t)-0.026074718f,
+   (float16_t)-0.999618822f, (float16_t)-0.027608146f,
+   (float16_t)-0.999575296f, (float16_t)-0.029141509f,
+   (float16_t)-0.999529418f, (float16_t)-0.030674803f,
+   (float16_t)-0.999481187f, (float16_t)-0.032208025f,
+   (float16_t)-0.999430605f, (float16_t)-0.033741172f,
+   (float16_t)-0.999377670f, (float16_t)-0.035274239f,
+   (float16_t)-0.999322385f, (float16_t)-0.036807223f,
+   (float16_t)-0.999264747f, (float16_t)-0.038340120f,
+   (float16_t)-0.999204759f, (float16_t)-0.039872928f,
+   (float16_t)-0.999142419f, (float16_t)-0.041405641f,
+   (float16_t)-0.999077728f, (float16_t)-0.042938257f,
+   (float16_t)-0.999010686f, (float16_t)-0.044470772f,
+   (float16_t)-0.998941293f, (float16_t)-0.046003182f,
+   (float16_t)-0.998869550f, (float16_t)-0.047535484f,
+   (float16_t)-0.998795456f, (float16_t)-0.049067674f,
+   (float16_t)-0.998719012f, (float16_t)-0.050599749f,
+   (float16_t)-0.998640218f, (float16_t)-0.052131705f,
+   (float16_t)-0.998559074f, (float16_t)-0.053663538f,
+   (float16_t)-0.998475581f, (float16_t)-0.055195244f,
+   (float16_t)-0.998389737f, (float16_t)-0.056726821f,
+   (float16_t)-0.998301545f, (float16_t)-0.058258265f,
+   (float16_t)-0.998211003f, (float16_t)-0.059789571f,
+   (float16_t)-0.998118113f, (float16_t)-0.061320736f,
+   (float16_t)-0.998022874f, (float16_t)-0.062851758f,
+   (float16_t)-0.997925286f, (float16_t)-0.064382631f,
+   (float16_t)-0.997825350f, (float16_t)-0.065913353f,
+   (float16_t)-0.997723067f, (float16_t)-0.067443920f,
+   (float16_t)-0.997618435f, (float16_t)-0.068974328f,
+   (float16_t)-0.997511456f, (float16_t)-0.070504573f,
+   (float16_t)-0.997402130f, (float16_t)-0.072034653f,
+   (float16_t)-0.997290457f, (float16_t)-0.073564564f,
+   (float16_t)-0.997176437f, (float16_t)-0.075094301f,
+   (float16_t)-0.997060070f, (float16_t)-0.076623861f,
+   (float16_t)-0.996941358f, (float16_t)-0.078153242f,
+   (float16_t)-0.996820299f, (float16_t)-0.079682438f,
+   (float16_t)-0.996696895f, (float16_t)-0.081211447f,
+   (float16_t)-0.996571146f, (float16_t)-0.082740265f,
+   (float16_t)-0.996443051f, (float16_t)-0.084268888f,
+   (float16_t)-0.996312612f, (float16_t)-0.085797312f,
+   (float16_t)-0.996179829f, (float16_t)-0.087325535f,
+   (float16_t)-0.996044701f, (float16_t)-0.088853553f,
+   (float16_t)-0.995907229f, (float16_t)-0.090381361f,
+   (float16_t)-0.995767414f, (float16_t)-0.091908956f,
+   (float16_t)-0.995625256f, (float16_t)-0.093436336f,
+   (float16_t)-0.995480755f, (float16_t)-0.094963495f,
+   (float16_t)-0.995333912f, (float16_t)-0.096490431f,
+   (float16_t)-0.995184727f, (float16_t)-0.098017140f,
+   (float16_t)-0.995033199f, (float16_t)-0.099543619f,
+   (float16_t)-0.994879331f, (float16_t)-0.101069863f,
+   (float16_t)-0.994723121f, (float16_t)-0.102595869f,
+   (float16_t)-0.994564571f, (float16_t)-0.104121634f,
+   (float16_t)-0.994403680f, (float16_t)-0.105647154f,
+   (float16_t)-0.994240449f, (float16_t)-0.107172425f,
+   (float16_t)-0.994074879f, (float16_t)-0.108697444f,
+   (float16_t)-0.993906970f, (float16_t)-0.110222207f,
+   (float16_t)-0.993736722f, (float16_t)-0.111746711f,
+   (float16_t)-0.993564136f, (float16_t)-0.113270952f,
+   (float16_t)-0.993389211f, (float16_t)-0.114794927f,
+   (float16_t)-0.993211949f, (float16_t)-0.116318631f,
+   (float16_t)-0.993032350f, (float16_t)-0.117842062f,
+   (float16_t)-0.992850414f, (float16_t)-0.119365215f,
+   (float16_t)-0.992666142f, (float16_t)-0.120888087f,
+   (float16_t)-0.992479535f, (float16_t)-0.122410675f,
+   (float16_t)-0.992290591f, (float16_t)-0.123932975f,
+   (float16_t)-0.992099313f, (float16_t)-0.125454983f,
+   (float16_t)-0.991905700f, (float16_t)-0.126976696f,
+   (float16_t)-0.991709754f, (float16_t)-0.128498111f,
+   (float16_t)-0.991511473f, (float16_t)-0.130019223f,
+   (float16_t)-0.991310860f, (float16_t)-0.131540029f,
+   (float16_t)-0.991107914f, (float16_t)-0.133060525f,
+   (float16_t)-0.990902635f, (float16_t)-0.134580709f,
+   (float16_t)-0.990695025f, (float16_t)-0.136100575f,
+   (float16_t)-0.990485084f, (float16_t)-0.137620122f,
+   (float16_t)-0.990272812f, (float16_t)-0.139139344f,
+   (float16_t)-0.990058210f, (float16_t)-0.140658239f,
+   (float16_t)-0.989841278f, (float16_t)-0.142176804f,
+   (float16_t)-0.989622017f, (float16_t)-0.143695033f,
+   (float16_t)-0.989400428f, (float16_t)-0.145212925f,
+   (float16_t)-0.989176510f, (float16_t)-0.146730474f,
+   (float16_t)-0.988950265f, (float16_t)-0.148247679f,
+   (float16_t)-0.988721692f, (float16_t)-0.149764535f,
+   (float16_t)-0.988490793f, (float16_t)-0.151281038f,
+   (float16_t)-0.988257568f, (float16_t)-0.152797185f,
+   (float16_t)-0.988022017f, (float16_t)-0.154312973f,
+   (float16_t)-0.987784142f, (float16_t)-0.155828398f,
+   (float16_t)-0.987543942f, (float16_t)-0.157343456f,
+   (float16_t)-0.987301418f, (float16_t)-0.158858143f,
+   (float16_t)-0.987056571f, (float16_t)-0.160372457f,
+   (float16_t)-0.986809402f, (float16_t)-0.161886394f,
+   (float16_t)-0.986559910f, (float16_t)-0.163399949f,
+   (float16_t)-0.986308097f, (float16_t)-0.164913120f,
+   (float16_t)-0.986053963f, (float16_t)-0.166425904f,
+   (float16_t)-0.985797509f, (float16_t)-0.167938295f,
+   (float16_t)-0.985538735f, (float16_t)-0.169450291f,
+   (float16_t)-0.985277642f, (float16_t)-0.170961889f,
+   (float16_t)-0.985014231f, (float16_t)-0.172473084f,
+   (float16_t)-0.984748502f, (float16_t)-0.173983873f,
+   (float16_t)-0.984480455f, (float16_t)-0.175494253f,
+   (float16_t)-0.984210092f, (float16_t)-0.177004220f,
+   (float16_t)-0.983937413f, (float16_t)-0.178513771f,
+   (float16_t)-0.983662419f, (float16_t)-0.180022901f,
+   (float16_t)-0.983385110f, (float16_t)-0.181531608f,
+   (float16_t)-0.983105487f, (float16_t)-0.183039888f,
+   (float16_t)-0.982823551f, (float16_t)-0.184547737f,
+   (float16_t)-0.982539302f, (float16_t)-0.186055152f,
+   (float16_t)-0.982252741f, (float16_t)-0.187562129f,
+   (float16_t)-0.981963869f, (float16_t)-0.189068664f,
+   (float16_t)-0.981672686f, (float16_t)-0.190574755f,
+   (float16_t)-0.981379193f, (float16_t)-0.192080397f,
+   (float16_t)-0.981083391f, (float16_t)-0.193585587f,
+   (float16_t)-0.980785280f, (float16_t)-0.195090322f,
+   (float16_t)-0.980484862f, (float16_t)-0.196594598f,
+   (float16_t)-0.980182136f, (float16_t)-0.198098411f,
+   (float16_t)-0.979877104f, (float16_t)-0.199601758f,
+   (float16_t)-0.979569766f, (float16_t)-0.201104635f,
+   (float16_t)-0.979260123f, (float16_t)-0.202607039f,
+   (float16_t)-0.978948175f, (float16_t)-0.204108966f,
+   (float16_t)-0.978633924f, (float16_t)-0.205610413f,
+   (float16_t)-0.978317371f, (float16_t)-0.207111376f,
+   (float16_t)-0.977998515f, (float16_t)-0.208611852f,
+   (float16_t)-0.977677358f, (float16_t)-0.210111837f,
+   (float16_t)-0.977353900f, (float16_t)-0.211611327f,
+   (float16_t)-0.977028143f, (float16_t)-0.213110320f,
+   (float16_t)-0.976700086f, (float16_t)-0.214608811f,
+   (float16_t)-0.976369731f, (float16_t)-0.216106797f,
+   (float16_t)-0.976037079f, (float16_t)-0.217604275f,
+   (float16_t)-0.975702130f, (float16_t)-0.219101240f,
+   (float16_t)-0.975364885f, (float16_t)-0.220597690f,
+   (float16_t)-0.975025345f, (float16_t)-0.222093621f,
+   (float16_t)-0.974683511f, (float16_t)-0.223589029f,
+   (float16_t)-0.974339383f, (float16_t)-0.225083911f,
+   (float16_t)-0.973992962f, (float16_t)-0.226578264f,
+   (float16_t)-0.973644250f, (float16_t)-0.228072083f,
+   (float16_t)-0.973293246f, (float16_t)-0.229565366f,
+   (float16_t)-0.972939952f, (float16_t)-0.231058108f,
+   (float16_t)-0.972584369f, (float16_t)-0.232550307f,
+   (float16_t)-0.972226497f, (float16_t)-0.234041959f,
+   (float16_t)-0.971866337f, (float16_t)-0.235533059f,
+   (float16_t)-0.971503891f, (float16_t)-0.237023606f,
+   (float16_t)-0.971139158f, (float16_t)-0.238513595f,
+   (float16_t)-0.970772141f, (float16_t)-0.240003022f,
+   (float16_t)-0.970402839f, (float16_t)-0.241491885f,
+   (float16_t)-0.970031253f, (float16_t)-0.242980180f,
+   (float16_t)-0.969657385f, (float16_t)-0.244467903f,
+   (float16_t)-0.969281235f, (float16_t)-0.245955050f,
+   (float16_t)-0.968902805f, (float16_t)-0.247441619f,
+   (float16_t)-0.968522094f, (float16_t)-0.248927606f,
+   (float16_t)-0.968139105f, (float16_t)-0.250413007f,
+   (float16_t)-0.967753837f, (float16_t)-0.251897818f,
+   (float16_t)-0.967366292f, (float16_t)-0.253382037f,
+   (float16_t)-0.966976471f, (float16_t)-0.254865660f,
+   (float16_t)-0.966584374f, (float16_t)-0.256348682f,
+   (float16_t)-0.966190003f, (float16_t)-0.257831102f,
+   (float16_t)-0.965793359f, (float16_t)-0.259312915f,
+   (float16_t)-0.965394442f, (float16_t)-0.260794118f,
+   (float16_t)-0.964993253f, (float16_t)-0.262274707f,
+   (float16_t)-0.964589793f, (float16_t)-0.263754679f,
+   (float16_t)-0.964184064f, (float16_t)-0.265234030f,
+   (float16_t)-0.963776066f, (float16_t)-0.266712757f,
+   (float16_t)-0.963365800f, (float16_t)-0.268190857f,
+   (float16_t)-0.962953267f, (float16_t)-0.269668326f,
+   (float16_t)-0.962538468f, (float16_t)-0.271145160f,
+   (float16_t)-0.962121404f, (float16_t)-0.272621355f,
+   (float16_t)-0.961702077f, (float16_t)-0.274096910f,
+   (float16_t)-0.961280486f, (float16_t)-0.275571819f,
+   (float16_t)-0.960856633f, (float16_t)-0.277046080f,
+   (float16_t)-0.960430519f, (float16_t)-0.278519689f,
+   (float16_t)-0.960002146f, (float16_t)-0.279992643f,
+   (float16_t)-0.959571513f, (float16_t)-0.281464938f,
+   (float16_t)-0.959138622f, (float16_t)-0.282936570f,
+   (float16_t)-0.958703475f, (float16_t)-0.284407537f,
+   (float16_t)-0.958266071f, (float16_t)-0.285877835f,
+   (float16_t)-0.957826413f, (float16_t)-0.287347460f,
+   (float16_t)-0.957384501f, (float16_t)-0.288816408f,
+   (float16_t)-0.956940336f, (float16_t)-0.290284677f,
+   (float16_t)-0.956493919f, (float16_t)-0.291752263f,
+   (float16_t)-0.956045251f, (float16_t)-0.293219163f,
+   (float16_t)-0.955594334f, (float16_t)-0.294685372f,
+   (float16_t)-0.955141168f, (float16_t)-0.296150888f,
+   (float16_t)-0.954685755f, (float16_t)-0.297615707f,
+   (float16_t)-0.954228095f, (float16_t)-0.299079826f,
+   (float16_t)-0.953768190f, (float16_t)-0.300543241f,
+   (float16_t)-0.953306040f, (float16_t)-0.302005949f,
+   (float16_t)-0.952841648f, (float16_t)-0.303467947f,
+   (float16_t)-0.952375013f, (float16_t)-0.304929230f,
+   (float16_t)-0.951906137f, (float16_t)-0.306389795f,
+   (float16_t)-0.951435021f, (float16_t)-0.307849640f,
+   (float16_t)-0.950961666f, (float16_t)-0.309308760f,
+   (float16_t)-0.950486074f, (float16_t)-0.310767153f,
+   (float16_t)-0.950008245f, (float16_t)-0.312224814f,
+   (float16_t)-0.949528181f, (float16_t)-0.313681740f,
+   (float16_t)-0.949045882f, (float16_t)-0.315137929f,
+   (float16_t)-0.948561350f, (float16_t)-0.316593376f,
+   (float16_t)-0.948074586f, (float16_t)-0.318048077f,
+   (float16_t)-0.947585591f, (float16_t)-0.319502031f,
+   (float16_t)-0.947094366f, (float16_t)-0.320955232f,
+   (float16_t)-0.946600913f, (float16_t)-0.322407679f,
+   (float16_t)-0.946105232f, (float16_t)-0.323859367f,
+   (float16_t)-0.945607325f, (float16_t)-0.325310292f,
+   (float16_t)-0.945107193f, (float16_t)-0.326760452f,
+   (float16_t)-0.944604837f, (float16_t)-0.328209844f,
+   (float16_t)-0.944100258f, (float16_t)-0.329658463f,
+   (float16_t)-0.943593458f, (float16_t)-0.331106306f,
+   (float16_t)-0.943084437f, (float16_t)-0.332553370f,
+   (float16_t)-0.942573198f, (float16_t)-0.333999651f,
+   (float16_t)-0.942059740f, (float16_t)-0.335445147f,
+   (float16_t)-0.941544065f, (float16_t)-0.336889853f,
+   (float16_t)-0.941026175f, (float16_t)-0.338333767f,
+   (float16_t)-0.940506071f, (float16_t)-0.339776884f,
+   (float16_t)-0.939983753f, (float16_t)-0.341219202f,
+   (float16_t)-0.939459224f, (float16_t)-0.342660717f,
+   (float16_t)-0.938932484f, (float16_t)-0.344101426f,
+   (float16_t)-0.938403534f, (float16_t)-0.345541325f,
+   (float16_t)-0.937872376f, (float16_t)-0.346980411f,
+   (float16_t)-0.937339012f, (float16_t)-0.348418680f,
+   (float16_t)-0.936803442f, (float16_t)-0.349856130f,
+   (float16_t)-0.936265667f, (float16_t)-0.351292756f,
+   (float16_t)-0.935725689f, (float16_t)-0.352728556f,
+   (float16_t)-0.935183510f, (float16_t)-0.354163525f,
+   (float16_t)-0.934639130f, (float16_t)-0.355597662f,
+   (float16_t)-0.934092550f, (float16_t)-0.357030961f,
+   (float16_t)-0.933543773f, (float16_t)-0.358463421f,
+   (float16_t)-0.932992799f, (float16_t)-0.359895037f,
+   (float16_t)-0.932439629f, (float16_t)-0.361325806f,
+   (float16_t)-0.931884266f, (float16_t)-0.362755724f,
+   (float16_t)-0.931326709f, (float16_t)-0.364184790f,
+   (float16_t)-0.930766961f, (float16_t)-0.365612998f,
+   (float16_t)-0.930205023f, (float16_t)-0.367040346f,
+   (float16_t)-0.929640896f, (float16_t)-0.368466830f,
+   (float16_t)-0.929074581f, (float16_t)-0.369892447f,
+   (float16_t)-0.928506080f, (float16_t)-0.371317194f,
+   (float16_t)-0.927935395f, (float16_t)-0.372741067f,
+   (float16_t)-0.927362526f, (float16_t)-0.374164063f,
+   (float16_t)-0.926787474f, (float16_t)-0.375586178f,
+   (float16_t)-0.926210242f, (float16_t)-0.377007410f,
+   (float16_t)-0.925630831f, (float16_t)-0.378427755f,
+   (float16_t)-0.925049241f, (float16_t)-0.379847209f,
+   (float16_t)-0.924465474f, (float16_t)-0.381265769f,
+   (float16_t)-0.923879533f, (float16_t)-0.382683432f,
+   (float16_t)-0.923291417f, (float16_t)-0.384100195f,
+   (float16_t)-0.922701128f, (float16_t)-0.385516054f,
+   (float16_t)-0.922108669f, (float16_t)-0.386931006f,
+   (float16_t)-0.921514039f, (float16_t)-0.388345047f,
+   (float16_t)-0.920917242f, (float16_t)-0.389758174f,
+   (float16_t)-0.920318277f, (float16_t)-0.391170384f,
+   (float16_t)-0.919717146f, (float16_t)-0.392581674f,
+   (float16_t)-0.919113852f, (float16_t)-0.393992040f,
+   (float16_t)-0.918508394f, (float16_t)-0.395401479f,
+   (float16_t)-0.917900776f, (float16_t)-0.396809987f,
+   (float16_t)-0.917290997f, (float16_t)-0.398217562f,
+   (float16_t)-0.916679060f, (float16_t)-0.399624200f,
+   (float16_t)-0.916064966f, (float16_t)-0.401029897f,
+   (float16_t)-0.915448716f, (float16_t)-0.402434651f,
+   (float16_t)-0.914830312f, (float16_t)-0.403838458f,
+   (float16_t)-0.914209756f, (float16_t)-0.405241314f,
+   (float16_t)-0.913587048f, (float16_t)-0.406643217f,
+   (float16_t)-0.912962190f, (float16_t)-0.408044163f,
+   (float16_t)-0.912335185f, (float16_t)-0.409444149f,
+   (float16_t)-0.911706032f, (float16_t)-0.410843171f,
+   (float16_t)-0.911074734f, (float16_t)-0.412241227f,
+   (float16_t)-0.910441292f, (float16_t)-0.413638312f,
+   (float16_t)-0.909805708f, (float16_t)-0.415034424f,
+   (float16_t)-0.909167983f, (float16_t)-0.416429560f,
+   (float16_t)-0.908528119f, (float16_t)-0.417823716f,
+   (float16_t)-0.907886116f, (float16_t)-0.419216888f,
+   (float16_t)-0.907241978f, (float16_t)-0.420609074f,
+   (float16_t)-0.906595705f, (float16_t)-0.422000271f,
+   (float16_t)-0.905947298f, (float16_t)-0.423390474f,
+   (float16_t)-0.905296759f, (float16_t)-0.424779681f,
+   (float16_t)-0.904644091f, (float16_t)-0.426167889f,
+   (float16_t)-0.903989293f, (float16_t)-0.427555093f,
+   (float16_t)-0.903332368f, (float16_t)-0.428941292f,
+   (float16_t)-0.902673318f, (float16_t)-0.430326481f,
+   (float16_t)-0.902012144f, (float16_t)-0.431710658f,
+   (float16_t)-0.901348847f, (float16_t)-0.433093819f,
+   (float16_t)-0.900683429f, (float16_t)-0.434475961f,
+   (float16_t)-0.900015892f, (float16_t)-0.435857080f,
+   (float16_t)-0.899346237f, (float16_t)-0.437237174f,
+   (float16_t)-0.898674466f, (float16_t)-0.438616239f,
+   (float16_t)-0.898000580f, (float16_t)-0.439994271f,
+   (float16_t)-0.897324581f, (float16_t)-0.441371269f,
+   (float16_t)-0.896646470f, (float16_t)-0.442747228f,
+   (float16_t)-0.895966250f, (float16_t)-0.444122145f,
+   (float16_t)-0.895283921f, (float16_t)-0.445496017f,
+   (float16_t)-0.894599486f, (float16_t)-0.446868840f,
+   (float16_t)-0.893912945f, (float16_t)-0.448240612f,
+   (float16_t)-0.893224301f, (float16_t)-0.449611330f,
+   (float16_t)-0.892533555f, (float16_t)-0.450980989f,
+   (float16_t)-0.891840709f, (float16_t)-0.452349587f,
+   (float16_t)-0.891145765f, (float16_t)-0.453717121f,
+   (float16_t)-0.890448723f, (float16_t)-0.455083587f,
+   (float16_t)-0.889749586f, (float16_t)-0.456448982f,
+   (float16_t)-0.889048356f, (float16_t)-0.457813304f,
+   (float16_t)-0.888345033f, (float16_t)-0.459176548f,
+   (float16_t)-0.887639620f, (float16_t)-0.460538711f,
+   (float16_t)-0.886932119f, (float16_t)-0.461899791f,
+   (float16_t)-0.886222530f, (float16_t)-0.463259784f,
+   (float16_t)-0.885510856f, (float16_t)-0.464618686f,
+   (float16_t)-0.884797098f, (float16_t)-0.465976496f,
+   (float16_t)-0.884081259f, (float16_t)-0.467333209f,
+   (float16_t)-0.883363339f, (float16_t)-0.468688822f,
+   (float16_t)-0.882643340f, (float16_t)-0.470043332f,
+   (float16_t)-0.881921264f, (float16_t)-0.471396737f,
+   (float16_t)-0.881197113f, (float16_t)-0.472749032f,
+   (float16_t)-0.880470889f, (float16_t)-0.474100215f,
+   (float16_t)-0.879742593f, (float16_t)-0.475450282f,
+   (float16_t)-0.879012226f, (float16_t)-0.476799230f,
+   (float16_t)-0.878279792f, (float16_t)-0.478147056f,
+   (float16_t)-0.877545290f, (float16_t)-0.479493758f,
+   (float16_t)-0.876808724f, (float16_t)-0.480839331f,
+   (float16_t)-0.876070094f, (float16_t)-0.482183772f,
+   (float16_t)-0.875329403f, (float16_t)-0.483527079f,
+   (float16_t)-0.874586652f, (float16_t)-0.484869248f,
+   (float16_t)-0.873841843f, (float16_t)-0.486210276f,
+   (float16_t)-0.873094978f, (float16_t)-0.487550160f,
+   (float16_t)-0.872346059f, (float16_t)-0.488888897f,
+   (float16_t)-0.871595087f, (float16_t)-0.490226483f,
+   (float16_t)-0.870842063f, (float16_t)-0.491562916f,
+   (float16_t)-0.870086991f, (float16_t)-0.492898192f,
+   (float16_t)-0.869329871f, (float16_t)-0.494232309f,
+   (float16_t)-0.868570706f, (float16_t)-0.495565262f,
+   (float16_t)-0.867809497f, (float16_t)-0.496897049f,
+   (float16_t)-0.867046246f, (float16_t)-0.498227667f,
+   (float16_t)-0.866280954f, (float16_t)-0.499557113f,
+   (float16_t)-0.865513624f, (float16_t)-0.500885383f,
+   (float16_t)-0.864744258f, (float16_t)-0.502212474f,
+   (float16_t)-0.863972856f, (float16_t)-0.503538384f,
+   (float16_t)-0.863199422f, (float16_t)-0.504863109f,
+   (float16_t)-0.862423956f, (float16_t)-0.506186645f,
+   (float16_t)-0.861646461f, (float16_t)-0.507508991f,
+   (float16_t)-0.860866939f, (float16_t)-0.508830143f,
+   (float16_t)-0.860085390f, (float16_t)-0.510150097f,
+   (float16_t)-0.859301818f, (float16_t)-0.511468850f,
+   (float16_t)-0.858516224f, (float16_t)-0.512786401f,
+   (float16_t)-0.857728610f, (float16_t)-0.514102744f,
+   (float16_t)-0.856938977f, (float16_t)-0.515417878f,
+   (float16_t)-0.856147328f, (float16_t)-0.516731799f,
+   (float16_t)-0.855353665f, (float16_t)-0.518044504f,
+   (float16_t)-0.854557988f, (float16_t)-0.519355990f,
+   (float16_t)-0.853760301f, (float16_t)-0.520666254f,
+   (float16_t)-0.852960605f, (float16_t)-0.521975293f,
+   (float16_t)-0.852158902f, (float16_t)-0.523283103f,
+   (float16_t)-0.851355193f, (float16_t)-0.524589683f,
+   (float16_t)-0.850549481f, (float16_t)-0.525895027f,
+   (float16_t)-0.849741768f, (float16_t)-0.527199135f,
+   (float16_t)-0.848932055f, (float16_t)-0.528502002f,
+   (float16_t)-0.848120345f, (float16_t)-0.529803625f,
+   (float16_t)-0.847306639f, (float16_t)-0.531104001f,
+   (float16_t)-0.846490939f, (float16_t)-0.532403128f,
+   (float16_t)-0.845673247f, (float16_t)-0.533701002f,
+   (float16_t)-0.844853565f, (float16_t)-0.534997620f,
+   (float16_t)-0.844031895f, (float16_t)-0.536292979f,
+   (float16_t)-0.843208240f, (float16_t)-0.537587076f,
+   (float16_t)-0.842382600f, (float16_t)-0.538879909f,
+   (float16_t)-0.841554977f, (float16_t)-0.540171473f,
+   (float16_t)-0.840725375f, (float16_t)-0.541461766f,
+   (float16_t)-0.839893794f, (float16_t)-0.542750785f,
+   (float16_t)-0.839060237f, (float16_t)-0.544038527f,
+   (float16_t)-0.838224706f, (float16_t)-0.545324988f,
+   (float16_t)-0.837387202f, (float16_t)-0.546610167f,
+   (float16_t)-0.836547727f, (float16_t)-0.547894059f,
+   (float16_t)-0.835706284f, (float16_t)-0.549176662f,
+   (float16_t)-0.834862875f, (float16_t)-0.550457973f,
+   (float16_t)-0.834017501f, (float16_t)-0.551737988f,
+   (float16_t)-0.833170165f, (float16_t)-0.553016706f,
+   (float16_t)-0.832320868f, (float16_t)-0.554294121f,
+   (float16_t)-0.831469612f, (float16_t)-0.555570233f,
+   (float16_t)-0.830616400f, (float16_t)-0.556845037f,
+   (float16_t)-0.829761234f, (float16_t)-0.558118531f,
+   (float16_t)-0.828904115f, (float16_t)-0.559390712f,
+   (float16_t)-0.828045045f, (float16_t)-0.560661576f,
+   (float16_t)-0.827184027f, (float16_t)-0.561931121f,
+   (float16_t)-0.826321063f, (float16_t)-0.563199344f,
+   (float16_t)-0.825456154f, (float16_t)-0.564466242f,
+   (float16_t)-0.824589303f, (float16_t)-0.565731811f,
+   (float16_t)-0.823720511f, (float16_t)-0.566996049f,
+   (float16_t)-0.822849781f, (float16_t)-0.568258953f,
+   (float16_t)-0.821977115f, (float16_t)-0.569520519f,
+   (float16_t)-0.821102515f, (float16_t)-0.570780746f,
+   (float16_t)-0.820225983f, (float16_t)-0.572039629f,
+   (float16_t)-0.819347520f, (float16_t)-0.573297167f,
+   (float16_t)-0.818467130f, (float16_t)-0.574553355f,
+   (float16_t)-0.817584813f, (float16_t)-0.575808191f,
+   (float16_t)-0.816700573f, (float16_t)-0.577061673f,
+   (float16_t)-0.815814411f, (float16_t)-0.578313796f,
+   (float16_t)-0.814926329f, (float16_t)-0.579564559f,
+   (float16_t)-0.814036330f, (float16_t)-0.580813958f,
+   (float16_t)-0.813144415f, (float16_t)-0.582061990f,
+   (float16_t)-0.812250587f, (float16_t)-0.583308653f,
+   (float16_t)-0.811354847f, (float16_t)-0.584553943f,
+   (float16_t)-0.810457198f, (float16_t)-0.585797857f,
+   (float16_t)-0.809557642f, (float16_t)-0.587040394f,
+   (float16_t)-0.808656182f, (float16_t)-0.588281548f,
+   (float16_t)-0.807752818f, (float16_t)-0.589521319f,
+   (float16_t)-0.806847554f, (float16_t)-0.590759702f,
+   (float16_t)-0.805940391f, (float16_t)-0.591996695f,
+   (float16_t)-0.805031331f, (float16_t)-0.593232295f,
+   (float16_t)-0.804120377f, (float16_t)-0.594466499f,
+   (float16_t)-0.803207531f, (float16_t)-0.595699304f,
+   (float16_t)-0.802292796f, (float16_t)-0.596930708f,
+   (float16_t)-0.801376172f, (float16_t)-0.598160707f,
+   (float16_t)-0.800457662f, (float16_t)-0.599389298f,
+   (float16_t)-0.799537269f, (float16_t)-0.600616479f,
+   (float16_t)-0.798614995f, (float16_t)-0.601842247f,
+   (float16_t)-0.797690841f, (float16_t)-0.603066599f,
+   (float16_t)-0.796764810f, (float16_t)-0.604289531f,
+   (float16_t)-0.795836905f, (float16_t)-0.605511041f,
+   (float16_t)-0.794907126f, (float16_t)-0.606731127f,
+   (float16_t)-0.793975478f, (float16_t)-0.607949785f,
+   (float16_t)-0.793041960f, (float16_t)-0.609167012f,
+   (float16_t)-0.792106577f, (float16_t)-0.610382806f,
+   (float16_t)-0.791169330f, (float16_t)-0.611597164f,
+   (float16_t)-0.790230221f, (float16_t)-0.612810082f,
+   (float16_t)-0.789289253f, (float16_t)-0.614021559f,
+   (float16_t)-0.788346428f, (float16_t)-0.615231591f,
+   (float16_t)-0.787401747f, (float16_t)-0.616440175f,
+   (float16_t)-0.786455214f, (float16_t)-0.617647308f,
+   (float16_t)-0.785506830f, (float16_t)-0.618852988f,
+   (float16_t)-0.784556597f, (float16_t)-0.620057212f,
+   (float16_t)-0.783604519f, (float16_t)-0.621259977f,
+   (float16_t)-0.782650596f, (float16_t)-0.622461279f,
+   (float16_t)-0.781694832f, (float16_t)-0.623661118f,
+   (float16_t)-0.780737229f, (float16_t)-0.624859488f,
+   (float16_t)-0.779777788f, (float16_t)-0.626056388f,
+   (float16_t)-0.778816512f, (float16_t)-0.627251815f,
+   (float16_t)-0.777853404f, (float16_t)-0.628445767f,
+   (float16_t)-0.776888466f, (float16_t)-0.629638239f,
+   (float16_t)-0.775921699f, (float16_t)-0.630829230f,
+   (float16_t)-0.774953107f, (float16_t)-0.632018736f,
+   (float16_t)-0.773982691f, (float16_t)-0.633206755f,
+   (float16_t)-0.773010453f, (float16_t)-0.634393284f,
+   (float16_t)-0.772036397f, (float16_t)-0.635578320f,
+   (float16_t)-0.771060524f, (float16_t)-0.636761861f,
+   (float16_t)-0.770082837f, (float16_t)-0.637943904f,
+   (float16_t)-0.769103338f, (float16_t)-0.639124445f,
+   (float16_t)-0.768122029f, (float16_t)-0.640303482f,
+   (float16_t)-0.767138912f, (float16_t)-0.641481013f,
+   (float16_t)-0.766153990f, (float16_t)-0.642657034f,
+   (float16_t)-0.765167266f, (float16_t)-0.643831543f,
+   (float16_t)-0.764178741f, (float16_t)-0.645004537f,
+   (float16_t)-0.763188417f, (float16_t)-0.646176013f,
+   (float16_t)-0.762196298f, (float16_t)-0.647345969f,
+   (float16_t)-0.761202385f, (float16_t)-0.648514401f,
+   (float16_t)-0.760206682f, (float16_t)-0.649681307f,
+   (float16_t)-0.759209189f, (float16_t)-0.650846685f,
+   (float16_t)-0.758209910f, (float16_t)-0.652010531f,
+   (float16_t)-0.757208847f, (float16_t)-0.653172843f,
+   (float16_t)-0.756206001f, (float16_t)-0.654333618f,
+   (float16_t)-0.755201377f, (float16_t)-0.655492853f,
+   (float16_t)-0.754194975f, (float16_t)-0.656650546f,
+   (float16_t)-0.753186799f, (float16_t)-0.657806693f,
+   (float16_t)-0.752176850f, (float16_t)-0.658961293f,
+   (float16_t)-0.751165132f, (float16_t)-0.660114342f,
+   (float16_t)-0.750151646f, (float16_t)-0.661265838f,
+   (float16_t)-0.749136395f, (float16_t)-0.662415778f,
+   (float16_t)-0.748119380f, (float16_t)-0.663564159f,
+   (float16_t)-0.747100606f, (float16_t)-0.664710978f,
+   (float16_t)-0.746080074f, (float16_t)-0.665856234f,
+   (float16_t)-0.745057785f, (float16_t)-0.666999922f,
+   (float16_t)-0.744033744f, (float16_t)-0.668142041f,
+   (float16_t)-0.743007952f, (float16_t)-0.669282588f,
+   (float16_t)-0.741980412f, (float16_t)-0.670421560f,
+   (float16_t)-0.740951125f, (float16_t)-0.671558955f,
+   (float16_t)-0.739920095f, (float16_t)-0.672694769f,
+   (float16_t)-0.738887324f, (float16_t)-0.673829000f,
+   (float16_t)-0.737852815f, (float16_t)-0.674961646f,
+   (float16_t)-0.736816569f, (float16_t)-0.676092704f,
+   (float16_t)-0.735778589f, (float16_t)-0.677222170f,
+   (float16_t)-0.734738878f, (float16_t)-0.678350043f,
+   (float16_t)-0.733697438f, (float16_t)-0.679476320f,
+   (float16_t)-0.732654272f, (float16_t)-0.680600998f,
+   (float16_t)-0.731609381f, (float16_t)-0.681724074f,
+   (float16_t)-0.730562769f, (float16_t)-0.682845546f,
+   (float16_t)-0.729514438f, (float16_t)-0.683965412f,
+   (float16_t)-0.728464390f, (float16_t)-0.685083668f,
+   (float16_t)-0.727412629f, (float16_t)-0.686200312f,
+   (float16_t)-0.726359155f, (float16_t)-0.687315341f,
+   (float16_t)-0.725303972f, (float16_t)-0.688428753f,
+   (float16_t)-0.724247083f, (float16_t)-0.689540545f,
+   (float16_t)-0.723188489f, (float16_t)-0.690650714f,
+   (float16_t)-0.722128194f, (float16_t)-0.691759258f,
+   (float16_t)-0.721066199f, (float16_t)-0.692866175f,
+   (float16_t)-0.720002508f, (float16_t)-0.693971461f,
+   (float16_t)-0.718937122f, (float16_t)-0.695075114f,
+   (float16_t)-0.717870045f, (float16_t)-0.696177131f,
+   (float16_t)-0.716801279f, (float16_t)-0.697277511f,
+   (float16_t)-0.715730825f, (float16_t)-0.698376249f,
+   (float16_t)-0.714658688f, (float16_t)-0.699473345f,
+   (float16_t)-0.713584869f, (float16_t)-0.700568794f,
+   (float16_t)-0.712509371f, (float16_t)-0.701662595f,
+   (float16_t)-0.711432196f, (float16_t)-0.702754744f,
+   (float16_t)-0.710353347f, (float16_t)-0.703845241f,
+   (float16_t)-0.709272826f, (float16_t)-0.704934080f,
+   (float16_t)-0.708190637f, (float16_t)-0.706021261f,
+   (float16_t)-0.707106781f, (float16_t)-0.707106781f,
+   (float16_t)-0.706021261f, (float16_t)-0.708190637f,
+   (float16_t)-0.704934080f, (float16_t)-0.709272826f,
+   (float16_t)-0.703845241f, (float16_t)-0.710353347f,
+   (float16_t)-0.702754744f, (float16_t)-0.711432196f,
+   (float16_t)-0.701662595f, (float16_t)-0.712509371f,
+   (float16_t)-0.700568794f, (float16_t)-0.713584869f,
+   (float16_t)-0.699473345f, (float16_t)-0.714658688f,
+   (float16_t)-0.698376249f, (float16_t)-0.715730825f,
+   (float16_t)-0.697277511f, (float16_t)-0.716801279f,
+   (float16_t)-0.696177131f, (float16_t)-0.717870045f,
+   (float16_t)-0.695075114f, (float16_t)-0.718937122f,
+   (float16_t)-0.693971461f, (float16_t)-0.720002508f,
+   (float16_t)-0.692866175f, (float16_t)-0.721066199f,
+   (float16_t)-0.691759258f, (float16_t)-0.722128194f,
+   (float16_t)-0.690650714f, (float16_t)-0.723188489f,
+   (float16_t)-0.689540545f, (float16_t)-0.724247083f,
+   (float16_t)-0.688428753f, (float16_t)-0.725303972f,
+   (float16_t)-0.687315341f, (float16_t)-0.726359155f,
+   (float16_t)-0.686200312f, (float16_t)-0.727412629f,
+   (float16_t)-0.685083668f, (float16_t)-0.728464390f,
+   (float16_t)-0.683965412f, (float16_t)-0.729514438f,
+   (float16_t)-0.682845546f, (float16_t)-0.730562769f,
+   (float16_t)-0.681724074f, (float16_t)-0.731609381f,
+   (float16_t)-0.680600998f, (float16_t)-0.732654272f,
+   (float16_t)-0.679476320f, (float16_t)-0.733697438f,
+   (float16_t)-0.678350043f, (float16_t)-0.734738878f,
+   (float16_t)-0.677222170f, (float16_t)-0.735778589f,
+   (float16_t)-0.676092704f, (float16_t)-0.736816569f,
+   (float16_t)-0.674961646f, (float16_t)-0.737852815f,
+   (float16_t)-0.673829000f, (float16_t)-0.738887324f,
+   (float16_t)-0.672694769f, (float16_t)-0.739920095f,
+   (float16_t)-0.671558955f, (float16_t)-0.740951125f,
+   (float16_t)-0.670421560f, (float16_t)-0.741980412f,
+   (float16_t)-0.669282588f, (float16_t)-0.743007952f,
+   (float16_t)-0.668142041f, (float16_t)-0.744033744f,
+   (float16_t)-0.666999922f, (float16_t)-0.745057785f,
+   (float16_t)-0.665856234f, (float16_t)-0.746080074f,
+   (float16_t)-0.664710978f, (float16_t)-0.747100606f,
+   (float16_t)-0.663564159f, (float16_t)-0.748119380f,
+   (float16_t)-0.662415778f, (float16_t)-0.749136395f,
+   (float16_t)-0.661265838f, (float16_t)-0.750151646f,
+   (float16_t)-0.660114342f, (float16_t)-0.751165132f,
+   (float16_t)-0.658961293f, (float16_t)-0.752176850f,
+   (float16_t)-0.657806693f, (float16_t)-0.753186799f,
+   (float16_t)-0.656650546f, (float16_t)-0.754194975f,
+   (float16_t)-0.655492853f, (float16_t)-0.755201377f,
+   (float16_t)-0.654333618f, (float16_t)-0.756206001f,
+   (float16_t)-0.653172843f, (float16_t)-0.757208847f,
+   (float16_t)-0.652010531f, (float16_t)-0.758209910f,
+   (float16_t)-0.650846685f, (float16_t)-0.759209189f,
+   (float16_t)-0.649681307f, (float16_t)-0.760206682f,
+   (float16_t)-0.648514401f, (float16_t)-0.761202385f,
+   (float16_t)-0.647345969f, (float16_t)-0.762196298f,
+   (float16_t)-0.646176013f, (float16_t)-0.763188417f,
+   (float16_t)-0.645004537f, (float16_t)-0.764178741f,
+   (float16_t)-0.643831543f, (float16_t)-0.765167266f,
+   (float16_t)-0.642657034f, (float16_t)-0.766153990f,
+   (float16_t)-0.641481013f, (float16_t)-0.767138912f,
+   (float16_t)-0.640303482f, (float16_t)-0.768122029f,
+   (float16_t)-0.639124445f, (float16_t)-0.769103338f,
+   (float16_t)-0.637943904f, (float16_t)-0.770082837f,
+   (float16_t)-0.636761861f, (float16_t)-0.771060524f,
+   (float16_t)-0.635578320f, (float16_t)-0.772036397f,
+   (float16_t)-0.634393284f, (float16_t)-0.773010453f,
+   (float16_t)-0.633206755f, (float16_t)-0.773982691f,
+   (float16_t)-0.632018736f, (float16_t)-0.774953107f,
+   (float16_t)-0.630829230f, (float16_t)-0.775921699f,
+   (float16_t)-0.629638239f, (float16_t)-0.776888466f,
+   (float16_t)-0.628445767f, (float16_t)-0.777853404f,
+   (float16_t)-0.627251815f, (float16_t)-0.778816512f,
+   (float16_t)-0.626056388f, (float16_t)-0.779777788f,
+   (float16_t)-0.624859488f, (float16_t)-0.780737229f,
+   (float16_t)-0.623661118f, (float16_t)-0.781694832f,
+   (float16_t)-0.622461279f, (float16_t)-0.782650596f,
+   (float16_t)-0.621259977f, (float16_t)-0.783604519f,
+   (float16_t)-0.620057212f, (float16_t)-0.784556597f,
+   (float16_t)-0.618852988f, (float16_t)-0.785506830f,
+   (float16_t)-0.617647308f, (float16_t)-0.786455214f,
+   (float16_t)-0.616440175f, (float16_t)-0.787401747f,
+   (float16_t)-0.615231591f, (float16_t)-0.788346428f,
+   (float16_t)-0.614021559f, (float16_t)-0.789289253f,
+   (float16_t)-0.612810082f, (float16_t)-0.790230221f,
+   (float16_t)-0.611597164f, (float16_t)-0.791169330f,
+   (float16_t)-0.610382806f, (float16_t)-0.792106577f,
+   (float16_t)-0.609167012f, (float16_t)-0.793041960f,
+   (float16_t)-0.607949785f, (float16_t)-0.793975478f,
+   (float16_t)-0.606731127f, (float16_t)-0.794907126f,
+   (float16_t)-0.605511041f, (float16_t)-0.795836905f,
+   (float16_t)-0.604289531f, (float16_t)-0.796764810f,
+   (float16_t)-0.603066599f, (float16_t)-0.797690841f,
+   (float16_t)-0.601842247f, (float16_t)-0.798614995f,
+   (float16_t)-0.600616479f, (float16_t)-0.799537269f,
+   (float16_t)-0.599389298f, (float16_t)-0.800457662f,
+   (float16_t)-0.598160707f, (float16_t)-0.801376172f,
+   (float16_t)-0.596930708f, (float16_t)-0.802292796f,
+   (float16_t)-0.595699304f, (float16_t)-0.803207531f,
+   (float16_t)-0.594466499f, (float16_t)-0.804120377f,
+   (float16_t)-0.593232295f, (float16_t)-0.805031331f,
+   (float16_t)-0.591996695f, (float16_t)-0.805940391f,
+   (float16_t)-0.590759702f, (float16_t)-0.806847554f,
+   (float16_t)-0.589521319f, (float16_t)-0.807752818f,
+   (float16_t)-0.588281548f, (float16_t)-0.808656182f,
+   (float16_t)-0.587040394f, (float16_t)-0.809557642f,
+   (float16_t)-0.585797857f, (float16_t)-0.810457198f,
+   (float16_t)-0.584553943f, (float16_t)-0.811354847f,
+   (float16_t)-0.583308653f, (float16_t)-0.812250587f,
+   (float16_t)-0.582061990f, (float16_t)-0.813144415f,
+   (float16_t)-0.580813958f, (float16_t)-0.814036330f,
+   (float16_t)-0.579564559f, (float16_t)-0.814926329f,
+   (float16_t)-0.578313796f, (float16_t)-0.815814411f,
+   (float16_t)-0.577061673f, (float16_t)-0.816700573f,
+   (float16_t)-0.575808191f, (float16_t)-0.817584813f,
+   (float16_t)-0.574553355f, (float16_t)-0.818467130f,
+   (float16_t)-0.573297167f, (float16_t)-0.819347520f,
+   (float16_t)-0.572039629f, (float16_t)-0.820225983f,
+   (float16_t)-0.570780746f, (float16_t)-0.821102515f,
+   (float16_t)-0.569520519f, (float16_t)-0.821977115f,
+   (float16_t)-0.568258953f, (float16_t)-0.822849781f,
+   (float16_t)-0.566996049f, (float16_t)-0.823720511f,
+   (float16_t)-0.565731811f, (float16_t)-0.824589303f,
+   (float16_t)-0.564466242f, (float16_t)-0.825456154f,
+   (float16_t)-0.563199344f, (float16_t)-0.826321063f,
+   (float16_t)-0.561931121f, (float16_t)-0.827184027f,
+   (float16_t)-0.560661576f, (float16_t)-0.828045045f,
+   (float16_t)-0.559390712f, (float16_t)-0.828904115f,
+   (float16_t)-0.558118531f, (float16_t)-0.829761234f,
+   (float16_t)-0.556845037f, (float16_t)-0.830616400f,
+   (float16_t)-0.555570233f, (float16_t)-0.831469612f,
+   (float16_t)-0.554294121f, (float16_t)-0.832320868f,
+   (float16_t)-0.553016706f, (float16_t)-0.833170165f,
+   (float16_t)-0.551737988f, (float16_t)-0.834017501f,
+   (float16_t)-0.550457973f, (float16_t)-0.834862875f,
+   (float16_t)-0.549176662f, (float16_t)-0.835706284f,
+   (float16_t)-0.547894059f, (float16_t)-0.836547727f,
+   (float16_t)-0.546610167f, (float16_t)-0.837387202f,
+   (float16_t)-0.545324988f, (float16_t)-0.838224706f,
+   (float16_t)-0.544038527f, (float16_t)-0.839060237f,
+   (float16_t)-0.542750785f, (float16_t)-0.839893794f,
+   (float16_t)-0.541461766f, (float16_t)-0.840725375f,
+   (float16_t)-0.540171473f, (float16_t)-0.841554977f,
+   (float16_t)-0.538879909f, (float16_t)-0.842382600f,
+   (float16_t)-0.537587076f, (float16_t)-0.843208240f,
+   (float16_t)-0.536292979f, (float16_t)-0.844031895f,
+   (float16_t)-0.534997620f, (float16_t)-0.844853565f,
+   (float16_t)-0.533701002f, (float16_t)-0.845673247f,
+   (float16_t)-0.532403128f, (float16_t)-0.846490939f,
+   (float16_t)-0.531104001f, (float16_t)-0.847306639f,
+   (float16_t)-0.529803625f, (float16_t)-0.848120345f,
+   (float16_t)-0.528502002f, (float16_t)-0.848932055f,
+   (float16_t)-0.527199135f, (float16_t)-0.849741768f,
+   (float16_t)-0.525895027f, (float16_t)-0.850549481f,
+   (float16_t)-0.524589683f, (float16_t)-0.851355193f,
+   (float16_t)-0.523283103f, (float16_t)-0.852158902f,
+   (float16_t)-0.521975293f, (float16_t)-0.852960605f,
+   (float16_t)-0.520666254f, (float16_t)-0.853760301f,
+   (float16_t)-0.519355990f, (float16_t)-0.854557988f,
+   (float16_t)-0.518044504f, (float16_t)-0.855353665f,
+   (float16_t)-0.516731799f, (float16_t)-0.856147328f,
+   (float16_t)-0.515417878f, (float16_t)-0.856938977f,
+   (float16_t)-0.514102744f, (float16_t)-0.857728610f,
+   (float16_t)-0.512786401f, (float16_t)-0.858516224f,
+   (float16_t)-0.511468850f, (float16_t)-0.859301818f,
+   (float16_t)-0.510150097f, (float16_t)-0.860085390f,
+   (float16_t)-0.508830143f, (float16_t)-0.860866939f,
+   (float16_t)-0.507508991f, (float16_t)-0.861646461f,
+   (float16_t)-0.506186645f, (float16_t)-0.862423956f,
+   (float16_t)-0.504863109f, (float16_t)-0.863199422f,
+   (float16_t)-0.503538384f, (float16_t)-0.863972856f,
+   (float16_t)-0.502212474f, (float16_t)-0.864744258f,
+   (float16_t)-0.500885383f, (float16_t)-0.865513624f,
+   (float16_t)-0.499557113f, (float16_t)-0.866280954f,
+   (float16_t)-0.498227667f, (float16_t)-0.867046246f,
+   (float16_t)-0.496897049f, (float16_t)-0.867809497f,
+   (float16_t)-0.495565262f, (float16_t)-0.868570706f,
+   (float16_t)-0.494232309f, (float16_t)-0.869329871f,
+   (float16_t)-0.492898192f, (float16_t)-0.870086991f,
+   (float16_t)-0.491562916f, (float16_t)-0.870842063f,
+   (float16_t)-0.490226483f, (float16_t)-0.871595087f,
+   (float16_t)-0.488888897f, (float16_t)-0.872346059f,
+   (float16_t)-0.487550160f, (float16_t)-0.873094978f,
+   (float16_t)-0.486210276f, (float16_t)-0.873841843f,
+   (float16_t)-0.484869248f, (float16_t)-0.874586652f,
+   (float16_t)-0.483527079f, (float16_t)-0.875329403f,
+   (float16_t)-0.482183772f, (float16_t)-0.876070094f,
+   (float16_t)-0.480839331f, (float16_t)-0.876808724f,
+   (float16_t)-0.479493758f, (float16_t)-0.877545290f,
+   (float16_t)-0.478147056f, (float16_t)-0.878279792f,
+   (float16_t)-0.476799230f, (float16_t)-0.879012226f,
+   (float16_t)-0.475450282f, (float16_t)-0.879742593f,
+   (float16_t)-0.474100215f, (float16_t)-0.880470889f,
+   (float16_t)-0.472749032f, (float16_t)-0.881197113f,
+   (float16_t)-0.471396737f, (float16_t)-0.881921264f,
+   (float16_t)-0.470043332f, (float16_t)-0.882643340f,
+   (float16_t)-0.468688822f, (float16_t)-0.883363339f,
+   (float16_t)-0.467333209f, (float16_t)-0.884081259f,
+   (float16_t)-0.465976496f, (float16_t)-0.884797098f,
+   (float16_t)-0.464618686f, (float16_t)-0.885510856f,
+   (float16_t)-0.463259784f, (float16_t)-0.886222530f,
+   (float16_t)-0.461899791f, (float16_t)-0.886932119f,
+   (float16_t)-0.460538711f, (float16_t)-0.887639620f,
+   (float16_t)-0.459176548f, (float16_t)-0.888345033f,
+   (float16_t)-0.457813304f, (float16_t)-0.889048356f,
+   (float16_t)-0.456448982f, (float16_t)-0.889749586f,
+   (float16_t)-0.455083587f, (float16_t)-0.890448723f,
+   (float16_t)-0.453717121f, (float16_t)-0.891145765f,
+   (float16_t)-0.452349587f, (float16_t)-0.891840709f,
+   (float16_t)-0.450980989f, (float16_t)-0.892533555f,
+   (float16_t)-0.449611330f, (float16_t)-0.893224301f,
+   (float16_t)-0.448240612f, (float16_t)-0.893912945f,
+   (float16_t)-0.446868840f, (float16_t)-0.894599486f,
+   (float16_t)-0.445496017f, (float16_t)-0.895283921f,
+   (float16_t)-0.444122145f, (float16_t)-0.895966250f,
+   (float16_t)-0.442747228f, (float16_t)-0.896646470f,
+   (float16_t)-0.441371269f, (float16_t)-0.897324581f,
+   (float16_t)-0.439994271f, (float16_t)-0.898000580f,
+   (float16_t)-0.438616239f, (float16_t)-0.898674466f,
+   (float16_t)-0.437237174f, (float16_t)-0.899346237f,
+   (float16_t)-0.435857080f, (float16_t)-0.900015892f,
+   (float16_t)-0.434475961f, (float16_t)-0.900683429f,
+   (float16_t)-0.433093819f, (float16_t)-0.901348847f,
+   (float16_t)-0.431710658f, (float16_t)-0.902012144f,
+   (float16_t)-0.430326481f, (float16_t)-0.902673318f,
+   (float16_t)-0.428941292f, (float16_t)-0.903332368f,
+   (float16_t)-0.427555093f, (float16_t)-0.903989293f,
+   (float16_t)-0.426167889f, (float16_t)-0.904644091f,
+   (float16_t)-0.424779681f, (float16_t)-0.905296759f,
+   (float16_t)-0.423390474f, (float16_t)-0.905947298f,
+   (float16_t)-0.422000271f, (float16_t)-0.906595705f,
+   (float16_t)-0.420609074f, (float16_t)-0.907241978f,
+   (float16_t)-0.419216888f, (float16_t)-0.907886116f,
+   (float16_t)-0.417823716f, (float16_t)-0.908528119f,
+   (float16_t)-0.416429560f, (float16_t)-0.909167983f,
+   (float16_t)-0.415034424f, (float16_t)-0.909805708f,
+   (float16_t)-0.413638312f, (float16_t)-0.910441292f,
+   (float16_t)-0.412241227f, (float16_t)-0.911074734f,
+   (float16_t)-0.410843171f, (float16_t)-0.911706032f,
+   (float16_t)-0.409444149f, (float16_t)-0.912335185f,
+   (float16_t)-0.408044163f, (float16_t)-0.912962190f,
+   (float16_t)-0.406643217f, (float16_t)-0.913587048f,
+   (float16_t)-0.405241314f, (float16_t)-0.914209756f,
+   (float16_t)-0.403838458f, (float16_t)-0.914830312f,
+   (float16_t)-0.402434651f, (float16_t)-0.915448716f,
+   (float16_t)-0.401029897f, (float16_t)-0.916064966f,
+   (float16_t)-0.399624200f, (float16_t)-0.916679060f,
+   (float16_t)-0.398217562f, (float16_t)-0.917290997f,
+   (float16_t)-0.396809987f, (float16_t)-0.917900776f,
+   (float16_t)-0.395401479f, (float16_t)-0.918508394f,
+   (float16_t)-0.393992040f, (float16_t)-0.919113852f,
+   (float16_t)-0.392581674f, (float16_t)-0.919717146f,
+   (float16_t)-0.391170384f, (float16_t)-0.920318277f,
+   (float16_t)-0.389758174f, (float16_t)-0.920917242f,
+   (float16_t)-0.388345047f, (float16_t)-0.921514039f,
+   (float16_t)-0.386931006f, (float16_t)-0.922108669f,
+   (float16_t)-0.385516054f, (float16_t)-0.922701128f,
+   (float16_t)-0.384100195f, (float16_t)-0.923291417f,
+   (float16_t)-0.382683432f, (float16_t)-0.923879533f,
+   (float16_t)-0.381265769f, (float16_t)-0.924465474f,
+   (float16_t)-0.379847209f, (float16_t)-0.925049241f,
+   (float16_t)-0.378427755f, (float16_t)-0.925630831f,
+   (float16_t)-0.377007410f, (float16_t)-0.926210242f,
+   (float16_t)-0.375586178f, (float16_t)-0.926787474f,
+   (float16_t)-0.374164063f, (float16_t)-0.927362526f,
+   (float16_t)-0.372741067f, (float16_t)-0.927935395f,
+   (float16_t)-0.371317194f, (float16_t)-0.928506080f,
+   (float16_t)-0.369892447f, (float16_t)-0.929074581f,
+   (float16_t)-0.368466830f, (float16_t)-0.929640896f,
+   (float16_t)-0.367040346f, (float16_t)-0.930205023f,
+   (float16_t)-0.365612998f, (float16_t)-0.930766961f,
+   (float16_t)-0.364184790f, (float16_t)-0.931326709f,
+   (float16_t)-0.362755724f, (float16_t)-0.931884266f,
+   (float16_t)-0.361325806f, (float16_t)-0.932439629f,
+   (float16_t)-0.359895037f, (float16_t)-0.932992799f,
+   (float16_t)-0.358463421f, (float16_t)-0.933543773f,
+   (float16_t)-0.357030961f, (float16_t)-0.934092550f,
+   (float16_t)-0.355597662f, (float16_t)-0.934639130f,
+   (float16_t)-0.354163525f, (float16_t)-0.935183510f,
+   (float16_t)-0.352728556f, (float16_t)-0.935725689f,
+   (float16_t)-0.351292756f, (float16_t)-0.936265667f,
+   (float16_t)-0.349856130f, (float16_t)-0.936803442f,
+   (float16_t)-0.348418680f, (float16_t)-0.937339012f,
+   (float16_t)-0.346980411f, (float16_t)-0.937872376f,
+   (float16_t)-0.345541325f, (float16_t)-0.938403534f,
+   (float16_t)-0.344101426f, (float16_t)-0.938932484f,
+   (float16_t)-0.342660717f, (float16_t)-0.939459224f,
+   (float16_t)-0.341219202f, (float16_t)-0.939983753f,
+   (float16_t)-0.339776884f, (float16_t)-0.940506071f,
+   (float16_t)-0.338333767f, (float16_t)-0.941026175f,
+   (float16_t)-0.336889853f, (float16_t)-0.941544065f,
+   (float16_t)-0.335445147f, (float16_t)-0.942059740f,
+   (float16_t)-0.333999651f, (float16_t)-0.942573198f,
+   (float16_t)-0.332553370f, (float16_t)-0.943084437f,
+   (float16_t)-0.331106306f, (float16_t)-0.943593458f,
+   (float16_t)-0.329658463f, (float16_t)-0.944100258f,
+   (float16_t)-0.328209844f, (float16_t)-0.944604837f,
+   (float16_t)-0.326760452f, (float16_t)-0.945107193f,
+   (float16_t)-0.325310292f, (float16_t)-0.945607325f,
+   (float16_t)-0.323859367f, (float16_t)-0.946105232f,
+   (float16_t)-0.322407679f, (float16_t)-0.946600913f,
+   (float16_t)-0.320955232f, (float16_t)-0.947094366f,
+   (float16_t)-0.319502031f, (float16_t)-0.947585591f,
+   (float16_t)-0.318048077f, (float16_t)-0.948074586f,
+   (float16_t)-0.316593376f, (float16_t)-0.948561350f,
+   (float16_t)-0.315137929f, (float16_t)-0.949045882f,
+   (float16_t)-0.313681740f, (float16_t)-0.949528181f,
+   (float16_t)-0.312224814f, (float16_t)-0.950008245f,
+   (float16_t)-0.310767153f, (float16_t)-0.950486074f,
+   (float16_t)-0.309308760f, (float16_t)-0.950961666f,
+   (float16_t)-0.307849640f, (float16_t)-0.951435021f,
+   (float16_t)-0.306389795f, (float16_t)-0.951906137f,
+   (float16_t)-0.304929230f, (float16_t)-0.952375013f,
+   (float16_t)-0.303467947f, (float16_t)-0.952841648f,
+   (float16_t)-0.302005949f, (float16_t)-0.953306040f,
+   (float16_t)-0.300543241f, (float16_t)-0.953768190f,
+   (float16_t)-0.299079826f, (float16_t)-0.954228095f,
+   (float16_t)-0.297615707f, (float16_t)-0.954685755f,
+   (float16_t)-0.296150888f, (float16_t)-0.955141168f,
+   (float16_t)-0.294685372f, (float16_t)-0.955594334f,
+   (float16_t)-0.293219163f, (float16_t)-0.956045251f,
+   (float16_t)-0.291752263f, (float16_t)-0.956493919f,
+   (float16_t)-0.290284677f, (float16_t)-0.956940336f,
+   (float16_t)-0.288816408f, (float16_t)-0.957384501f,
+   (float16_t)-0.287347460f, (float16_t)-0.957826413f,
+   (float16_t)-0.285877835f, (float16_t)-0.958266071f,
+   (float16_t)-0.284407537f, (float16_t)-0.958703475f,
+   (float16_t)-0.282936570f, (float16_t)-0.959138622f,
+   (float16_t)-0.281464938f, (float16_t)-0.959571513f,
+   (float16_t)-0.279992643f, (float16_t)-0.960002146f,
+   (float16_t)-0.278519689f, (float16_t)-0.960430519f,
+   (float16_t)-0.277046080f, (float16_t)-0.960856633f,
+   (float16_t)-0.275571819f, (float16_t)-0.961280486f,
+   (float16_t)-0.274096910f, (float16_t)-0.961702077f,
+   (float16_t)-0.272621355f, (float16_t)-0.962121404f,
+   (float16_t)-0.271145160f, (float16_t)-0.962538468f,
+   (float16_t)-0.269668326f, (float16_t)-0.962953267f,
+   (float16_t)-0.268190857f, (float16_t)-0.963365800f,
+   (float16_t)-0.266712757f, (float16_t)-0.963776066f,
+   (float16_t)-0.265234030f, (float16_t)-0.964184064f,
+   (float16_t)-0.263754679f, (float16_t)-0.964589793f,
+   (float16_t)-0.262274707f, (float16_t)-0.964993253f,
+   (float16_t)-0.260794118f, (float16_t)-0.965394442f,
+   (float16_t)-0.259312915f, (float16_t)-0.965793359f,
+   (float16_t)-0.257831102f, (float16_t)-0.966190003f,
+   (float16_t)-0.256348682f, (float16_t)-0.966584374f,
+   (float16_t)-0.254865660f, (float16_t)-0.966976471f,
+   (float16_t)-0.253382037f, (float16_t)-0.967366292f,
+   (float16_t)-0.251897818f, (float16_t)-0.967753837f,
+   (float16_t)-0.250413007f, (float16_t)-0.968139105f,
+   (float16_t)-0.248927606f, (float16_t)-0.968522094f,
+   (float16_t)-0.247441619f, (float16_t)-0.968902805f,
+   (float16_t)-0.245955050f, (float16_t)-0.969281235f,
+   (float16_t)-0.244467903f, (float16_t)-0.969657385f,
+   (float16_t)-0.242980180f, (float16_t)-0.970031253f,
+   (float16_t)-0.241491885f, (float16_t)-0.970402839f,
+   (float16_t)-0.240003022f, (float16_t)-0.970772141f,
+   (float16_t)-0.238513595f, (float16_t)-0.971139158f,
+   (float16_t)-0.237023606f, (float16_t)-0.971503891f,
+   (float16_t)-0.235533059f, (float16_t)-0.971866337f,
+   (float16_t)-0.234041959f, (float16_t)-0.972226497f,
+   (float16_t)-0.232550307f, (float16_t)-0.972584369f,
+   (float16_t)-0.231058108f, (float16_t)-0.972939952f,
+   (float16_t)-0.229565366f, (float16_t)-0.973293246f,
+   (float16_t)-0.228072083f, (float16_t)-0.973644250f,
+   (float16_t)-0.226578264f, (float16_t)-0.973992962f,
+   (float16_t)-0.225083911f, (float16_t)-0.974339383f,
+   (float16_t)-0.223589029f, (float16_t)-0.974683511f,
+   (float16_t)-0.222093621f, (float16_t)-0.975025345f,
+   (float16_t)-0.220597690f, (float16_t)-0.975364885f,
+   (float16_t)-0.219101240f, (float16_t)-0.975702130f,
+   (float16_t)-0.217604275f, (float16_t)-0.976037079f,
+   (float16_t)-0.216106797f, (float16_t)-0.976369731f,
+   (float16_t)-0.214608811f, (float16_t)-0.976700086f,
+   (float16_t)-0.213110320f, (float16_t)-0.977028143f,
+   (float16_t)-0.211611327f, (float16_t)-0.977353900f,
+   (float16_t)-0.210111837f, (float16_t)-0.977677358f,
+   (float16_t)-0.208611852f, (float16_t)-0.977998515f,
+   (float16_t)-0.207111376f, (float16_t)-0.978317371f,
+   (float16_t)-0.205610413f, (float16_t)-0.978633924f,
+   (float16_t)-0.204108966f, (float16_t)-0.978948175f,
+   (float16_t)-0.202607039f, (float16_t)-0.979260123f,
+   (float16_t)-0.201104635f, (float16_t)-0.979569766f,
+   (float16_t)-0.199601758f, (float16_t)-0.979877104f,
+   (float16_t)-0.198098411f, (float16_t)-0.980182136f,
+   (float16_t)-0.196594598f, (float16_t)-0.980484862f,
+   (float16_t)-0.195090322f, (float16_t)-0.980785280f,
+   (float16_t)-0.193585587f, (float16_t)-0.981083391f,
+   (float16_t)-0.192080397f, (float16_t)-0.981379193f,
+   (float16_t)-0.190574755f, (float16_t)-0.981672686f,
+   (float16_t)-0.189068664f, (float16_t)-0.981963869f,
+   (float16_t)-0.187562129f, (float16_t)-0.982252741f,
+   (float16_t)-0.186055152f, (float16_t)-0.982539302f,
+   (float16_t)-0.184547737f, (float16_t)-0.982823551f,
+   (float16_t)-0.183039888f, (float16_t)-0.983105487f,
+   (float16_t)-0.181531608f, (float16_t)-0.983385110f,
+   (float16_t)-0.180022901f, (float16_t)-0.983662419f,
+   (float16_t)-0.178513771f, (float16_t)-0.983937413f,
+   (float16_t)-0.177004220f, (float16_t)-0.984210092f,
+   (float16_t)-0.175494253f, (float16_t)-0.984480455f,
+   (float16_t)-0.173983873f, (float16_t)-0.984748502f,
+   (float16_t)-0.172473084f, (float16_t)-0.985014231f,
+   (float16_t)-0.170961889f, (float16_t)-0.985277642f,
+   (float16_t)-0.169450291f, (float16_t)-0.985538735f,
+   (float16_t)-0.167938295f, (float16_t)-0.985797509f,
+   (float16_t)-0.166425904f, (float16_t)-0.986053963f,
+   (float16_t)-0.164913120f, (float16_t)-0.986308097f,
+   (float16_t)-0.163399949f, (float16_t)-0.986559910f,
+   (float16_t)-0.161886394f, (float16_t)-0.986809402f,
+   (float16_t)-0.160372457f, (float16_t)-0.987056571f,
+   (float16_t)-0.158858143f, (float16_t)-0.987301418f,
+   (float16_t)-0.157343456f, (float16_t)-0.987543942f,
+   (float16_t)-0.155828398f, (float16_t)-0.987784142f,
+   (float16_t)-0.154312973f, (float16_t)-0.988022017f,
+   (float16_t)-0.152797185f, (float16_t)-0.988257568f,
+   (float16_t)-0.151281038f, (float16_t)-0.988490793f,
+   (float16_t)-0.149764535f, (float16_t)-0.988721692f,
+   (float16_t)-0.148247679f, (float16_t)-0.988950265f,
+   (float16_t)-0.146730474f, (float16_t)-0.989176510f,
+   (float16_t)-0.145212925f, (float16_t)-0.989400428f,
+   (float16_t)-0.143695033f, (float16_t)-0.989622017f,
+   (float16_t)-0.142176804f, (float16_t)-0.989841278f,
+   (float16_t)-0.140658239f, (float16_t)-0.990058210f,
+   (float16_t)-0.139139344f, (float16_t)-0.990272812f,
+   (float16_t)-0.137620122f, (float16_t)-0.990485084f,
+   (float16_t)-0.136100575f, (float16_t)-0.990695025f,
+   (float16_t)-0.134580709f, (float16_t)-0.990902635f,
+   (float16_t)-0.133060525f, (float16_t)-0.991107914f,
+   (float16_t)-0.131540029f, (float16_t)-0.991310860f,
+   (float16_t)-0.130019223f, (float16_t)-0.991511473f,
+   (float16_t)-0.128498111f, (float16_t)-0.991709754f,
+   (float16_t)-0.126976696f, (float16_t)-0.991905700f,
+   (float16_t)-0.125454983f, (float16_t)-0.992099313f,
+   (float16_t)-0.123932975f, (float16_t)-0.992290591f,
+   (float16_t)-0.122410675f, (float16_t)-0.992479535f,
+   (float16_t)-0.120888087f, (float16_t)-0.992666142f,
+   (float16_t)-0.119365215f, (float16_t)-0.992850414f,
+   (float16_t)-0.117842062f, (float16_t)-0.993032350f,
+   (float16_t)-0.116318631f, (float16_t)-0.993211949f,
+   (float16_t)-0.114794927f, (float16_t)-0.993389211f,
+   (float16_t)-0.113270952f, (float16_t)-0.993564136f,
+   (float16_t)-0.111746711f, (float16_t)-0.993736722f,
+   (float16_t)-0.110222207f, (float16_t)-0.993906970f,
+   (float16_t)-0.108697444f, (float16_t)-0.994074879f,
+   (float16_t)-0.107172425f, (float16_t)-0.994240449f,
+   (float16_t)-0.105647154f, (float16_t)-0.994403680f,
+   (float16_t)-0.104121634f, (float16_t)-0.994564571f,
+   (float16_t)-0.102595869f, (float16_t)-0.994723121f,
+   (float16_t)-0.101069863f, (float16_t)-0.994879331f,
+   (float16_t)-0.099543619f, (float16_t)-0.995033199f,
+   (float16_t)-0.098017140f, (float16_t)-0.995184727f,
+   (float16_t)-0.096490431f, (float16_t)-0.995333912f,
+   (float16_t)-0.094963495f, (float16_t)-0.995480755f,
+   (float16_t)-0.093436336f, (float16_t)-0.995625256f,
+   (float16_t)-0.091908956f, (float16_t)-0.995767414f,
+   (float16_t)-0.090381361f, (float16_t)-0.995907229f,
+   (float16_t)-0.088853553f, (float16_t)-0.996044701f,
+   (float16_t)-0.087325535f, (float16_t)-0.996179829f,
+   (float16_t)-0.085797312f, (float16_t)-0.996312612f,
+   (float16_t)-0.084268888f, (float16_t)-0.996443051f,
+   (float16_t)-0.082740265f, (float16_t)-0.996571146f,
+   (float16_t)-0.081211447f, (float16_t)-0.996696895f,
+   (float16_t)-0.079682438f, (float16_t)-0.996820299f,
+   (float16_t)-0.078153242f, (float16_t)-0.996941358f,
+   (float16_t)-0.076623861f, (float16_t)-0.997060070f,
+   (float16_t)-0.075094301f, (float16_t)-0.997176437f,
+   (float16_t)-0.073564564f, (float16_t)-0.997290457f,
+   (float16_t)-0.072034653f, (float16_t)-0.997402130f,
+   (float16_t)-0.070504573f, (float16_t)-0.997511456f,
+   (float16_t)-0.068974328f, (float16_t)-0.997618435f,
+   (float16_t)-0.067443920f, (float16_t)-0.997723067f,
+   (float16_t)-0.065913353f, (float16_t)-0.997825350f,
+   (float16_t)-0.064382631f, (float16_t)-0.997925286f,
+   (float16_t)-0.062851758f, (float16_t)-0.998022874f,
+   (float16_t)-0.061320736f, (float16_t)-0.998118113f,
+   (float16_t)-0.059789571f, (float16_t)-0.998211003f,
+   (float16_t)-0.058258265f, (float16_t)-0.998301545f,
+   (float16_t)-0.056726821f, (float16_t)-0.998389737f,
+   (float16_t)-0.055195244f, (float16_t)-0.998475581f,
+   (float16_t)-0.053663538f, (float16_t)-0.998559074f,
+   (float16_t)-0.052131705f, (float16_t)-0.998640218f,
+   (float16_t)-0.050599749f, (float16_t)-0.998719012f,
+   (float16_t)-0.049067674f, (float16_t)-0.998795456f,
+   (float16_t)-0.047535484f, (float16_t)-0.998869550f,
+   (float16_t)-0.046003182f, (float16_t)-0.998941293f,
+   (float16_t)-0.044470772f, (float16_t)-0.999010686f,
+   (float16_t)-0.042938257f, (float16_t)-0.999077728f,
+   (float16_t)-0.041405641f, (float16_t)-0.999142419f,
+   (float16_t)-0.039872928f, (float16_t)-0.999204759f,
+   (float16_t)-0.038340120f, (float16_t)-0.999264747f,
+   (float16_t)-0.036807223f, (float16_t)-0.999322385f,
+   (float16_t)-0.035274239f, (float16_t)-0.999377670f,
+   (float16_t)-0.033741172f, (float16_t)-0.999430605f,
+   (float16_t)-0.032208025f, (float16_t)-0.999481187f,
+   (float16_t)-0.030674803f, (float16_t)-0.999529418f,
+   (float16_t)-0.029141509f, (float16_t)-0.999575296f,
+   (float16_t)-0.027608146f, (float16_t)-0.999618822f,
+   (float16_t)-0.026074718f, (float16_t)-0.999659997f,
+   (float16_t)-0.024541229f, (float16_t)-0.999698819f,
+   (float16_t)-0.023007681f, (float16_t)-0.999735288f,
+   (float16_t)-0.021474080f, (float16_t)-0.999769405f,
+   (float16_t)-0.019940429f, (float16_t)-0.999801170f,
+   (float16_t)-0.018406730f, (float16_t)-0.999830582f,
+   (float16_t)-0.016872988f, (float16_t)-0.999857641f,
+   (float16_t)-0.015339206f, (float16_t)-0.999882347f,
+   (float16_t)-0.013805389f, (float16_t)-0.999904701f,
+   (float16_t)-0.012271538f, (float16_t)-0.999924702f,
+   (float16_t)-0.010737659f, (float16_t)-0.999942350f,
+   (float16_t)-0.009203755f, (float16_t)-0.999957645f,
+   (float16_t)-0.007669829f, (float16_t)-0.999970586f,
+   (float16_t)-0.006135885f, (float16_t)-0.999981175f,
+   (float16_t)-0.004601926f, (float16_t)-0.999989411f,
+   (float16_t)-0.003067957f, (float16_t)-0.999995294f,
+   (float16_t)-0.001533980f, (float16_t)-0.999998823f,
+   (float16_t)-0.000000000f, (float16_t)-1.000000000f,
+    (float16_t)0.001533980f, (float16_t)-0.999998823f,
+    (float16_t)0.003067957f, (float16_t)-0.999995294f,
+    (float16_t)0.004601926f, (float16_t)-0.999989411f,
+    (float16_t)0.006135885f, (float16_t)-0.999981175f,
+    (float16_t)0.007669829f, (float16_t)-0.999970586f,
+    (float16_t)0.009203755f, (float16_t)-0.999957645f,
+    (float16_t)0.010737659f, (float16_t)-0.999942350f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f,
+    (float16_t)0.013805389f, (float16_t)-0.999904701f,
+    (float16_t)0.015339206f, (float16_t)-0.999882347f,
+    (float16_t)0.016872988f, (float16_t)-0.999857641f,
+    (float16_t)0.018406730f, (float16_t)-0.999830582f,
+    (float16_t)0.019940429f, (float16_t)-0.999801170f,
+    (float16_t)0.021474080f, (float16_t)-0.999769405f,
+    (float16_t)0.023007681f, (float16_t)-0.999735288f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.026074718f, (float16_t)-0.999659997f,
+    (float16_t)0.027608146f, (float16_t)-0.999618822f,
+    (float16_t)0.029141509f, (float16_t)-0.999575296f,
+    (float16_t)0.030674803f, (float16_t)-0.999529418f,
+    (float16_t)0.032208025f, (float16_t)-0.999481187f,
+    (float16_t)0.033741172f, (float16_t)-0.999430605f,
+    (float16_t)0.035274239f, (float16_t)-0.999377670f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.038340120f, (float16_t)-0.999264747f,
+    (float16_t)0.039872928f, (float16_t)-0.999204759f,
+    (float16_t)0.041405641f, (float16_t)-0.999142419f,
+    (float16_t)0.042938257f, (float16_t)-0.999077728f,
+    (float16_t)0.044470772f, (float16_t)-0.999010686f,
+    (float16_t)0.046003182f, (float16_t)-0.998941293f,
+    (float16_t)0.047535484f, (float16_t)-0.998869550f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.050599749f, (float16_t)-0.998719012f,
+    (float16_t)0.052131705f, (float16_t)-0.998640218f,
+    (float16_t)0.053663538f, (float16_t)-0.998559074f,
+    (float16_t)0.055195244f, (float16_t)-0.998475581f,
+    (float16_t)0.056726821f, (float16_t)-0.998389737f,
+    (float16_t)0.058258265f, (float16_t)-0.998301545f,
+    (float16_t)0.059789571f, (float16_t)-0.998211003f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.062851758f, (float16_t)-0.998022874f,
+    (float16_t)0.064382631f, (float16_t)-0.997925286f,
+    (float16_t)0.065913353f, (float16_t)-0.997825350f,
+    (float16_t)0.067443920f, (float16_t)-0.997723067f,
+    (float16_t)0.068974328f, (float16_t)-0.997618435f,
+    (float16_t)0.070504573f, (float16_t)-0.997511456f,
+    (float16_t)0.072034653f, (float16_t)-0.997402130f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.075094301f, (float16_t)-0.997176437f,
+    (float16_t)0.076623861f, (float16_t)-0.997060070f,
+    (float16_t)0.078153242f, (float16_t)-0.996941358f,
+    (float16_t)0.079682438f, (float16_t)-0.996820299f,
+    (float16_t)0.081211447f, (float16_t)-0.996696895f,
+    (float16_t)0.082740265f, (float16_t)-0.996571146f,
+    (float16_t)0.084268888f, (float16_t)-0.996443051f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.087325535f, (float16_t)-0.996179829f,
+    (float16_t)0.088853553f, (float16_t)-0.996044701f,
+    (float16_t)0.090381361f, (float16_t)-0.995907229f,
+    (float16_t)0.091908956f, (float16_t)-0.995767414f,
+    (float16_t)0.093436336f, (float16_t)-0.995625256f,
+    (float16_t)0.094963495f, (float16_t)-0.995480755f,
+    (float16_t)0.096490431f, (float16_t)-0.995333912f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.099543619f, (float16_t)-0.995033199f,
+    (float16_t)0.101069863f, (float16_t)-0.994879331f,
+    (float16_t)0.102595869f, (float16_t)-0.994723121f,
+    (float16_t)0.104121634f, (float16_t)-0.994564571f,
+    (float16_t)0.105647154f, (float16_t)-0.994403680f,
+    (float16_t)0.107172425f, (float16_t)-0.994240449f,
+    (float16_t)0.108697444f, (float16_t)-0.994074879f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.111746711f, (float16_t)-0.993736722f,
+    (float16_t)0.113270952f, (float16_t)-0.993564136f,
+    (float16_t)0.114794927f, (float16_t)-0.993389211f,
+    (float16_t)0.116318631f, (float16_t)-0.993211949f,
+    (float16_t)0.117842062f, (float16_t)-0.993032350f,
+    (float16_t)0.119365215f, (float16_t)-0.992850414f,
+    (float16_t)0.120888087f, (float16_t)-0.992666142f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.123932975f, (float16_t)-0.992290591f,
+    (float16_t)0.125454983f, (float16_t)-0.992099313f,
+    (float16_t)0.126976696f, (float16_t)-0.991905700f,
+    (float16_t)0.128498111f, (float16_t)-0.991709754f,
+    (float16_t)0.130019223f, (float16_t)-0.991511473f,
+    (float16_t)0.131540029f, (float16_t)-0.991310860f,
+    (float16_t)0.133060525f, (float16_t)-0.991107914f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.136100575f, (float16_t)-0.990695025f,
+    (float16_t)0.137620122f, (float16_t)-0.990485084f,
+    (float16_t)0.139139344f, (float16_t)-0.990272812f,
+    (float16_t)0.140658239f, (float16_t)-0.990058210f,
+    (float16_t)0.142176804f, (float16_t)-0.989841278f,
+    (float16_t)0.143695033f, (float16_t)-0.989622017f,
+    (float16_t)0.145212925f, (float16_t)-0.989400428f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.148247679f, (float16_t)-0.988950265f,
+    (float16_t)0.149764535f, (float16_t)-0.988721692f,
+    (float16_t)0.151281038f, (float16_t)-0.988490793f,
+    (float16_t)0.152797185f, (float16_t)-0.988257568f,
+    (float16_t)0.154312973f, (float16_t)-0.988022017f,
+    (float16_t)0.155828398f, (float16_t)-0.987784142f,
+    (float16_t)0.157343456f, (float16_t)-0.987543942f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.160372457f, (float16_t)-0.987056571f,
+    (float16_t)0.161886394f, (float16_t)-0.986809402f,
+    (float16_t)0.163399949f, (float16_t)-0.986559910f,
+    (float16_t)0.164913120f, (float16_t)-0.986308097f,
+    (float16_t)0.166425904f, (float16_t)-0.986053963f,
+    (float16_t)0.167938295f, (float16_t)-0.985797509f,
+    (float16_t)0.169450291f, (float16_t)-0.985538735f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.172473084f, (float16_t)-0.985014231f,
+    (float16_t)0.173983873f, (float16_t)-0.984748502f,
+    (float16_t)0.175494253f, (float16_t)-0.984480455f,
+    (float16_t)0.177004220f, (float16_t)-0.984210092f,
+    (float16_t)0.178513771f, (float16_t)-0.983937413f,
+    (float16_t)0.180022901f, (float16_t)-0.983662419f,
+    (float16_t)0.181531608f, (float16_t)-0.983385110f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.184547737f, (float16_t)-0.982823551f,
+    (float16_t)0.186055152f, (float16_t)-0.982539302f,
+    (float16_t)0.187562129f, (float16_t)-0.982252741f,
+    (float16_t)0.189068664f, (float16_t)-0.981963869f,
+    (float16_t)0.190574755f, (float16_t)-0.981672686f,
+    (float16_t)0.192080397f, (float16_t)-0.981379193f,
+    (float16_t)0.193585587f, (float16_t)-0.981083391f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.196594598f, (float16_t)-0.980484862f,
+    (float16_t)0.198098411f, (float16_t)-0.980182136f,
+    (float16_t)0.199601758f, (float16_t)-0.979877104f,
+    (float16_t)0.201104635f, (float16_t)-0.979569766f,
+    (float16_t)0.202607039f, (float16_t)-0.979260123f,
+    (float16_t)0.204108966f, (float16_t)-0.978948175f,
+    (float16_t)0.205610413f, (float16_t)-0.978633924f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.208611852f, (float16_t)-0.977998515f,
+    (float16_t)0.210111837f, (float16_t)-0.977677358f,
+    (float16_t)0.211611327f, (float16_t)-0.977353900f,
+    (float16_t)0.213110320f, (float16_t)-0.977028143f,
+    (float16_t)0.214608811f, (float16_t)-0.976700086f,
+    (float16_t)0.216106797f, (float16_t)-0.976369731f,
+    (float16_t)0.217604275f, (float16_t)-0.976037079f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.220597690f, (float16_t)-0.975364885f,
+    (float16_t)0.222093621f, (float16_t)-0.975025345f,
+    (float16_t)0.223589029f, (float16_t)-0.974683511f,
+    (float16_t)0.225083911f, (float16_t)-0.974339383f,
+    (float16_t)0.226578264f, (float16_t)-0.973992962f,
+    (float16_t)0.228072083f, (float16_t)-0.973644250f,
+    (float16_t)0.229565366f, (float16_t)-0.973293246f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.232550307f, (float16_t)-0.972584369f,
+    (float16_t)0.234041959f, (float16_t)-0.972226497f,
+    (float16_t)0.235533059f, (float16_t)-0.971866337f,
+    (float16_t)0.237023606f, (float16_t)-0.971503891f,
+    (float16_t)0.238513595f, (float16_t)-0.971139158f,
+    (float16_t)0.240003022f, (float16_t)-0.970772141f,
+    (float16_t)0.241491885f, (float16_t)-0.970402839f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.244467903f, (float16_t)-0.969657385f,
+    (float16_t)0.245955050f, (float16_t)-0.969281235f,
+    (float16_t)0.247441619f, (float16_t)-0.968902805f,
+    (float16_t)0.248927606f, (float16_t)-0.968522094f,
+    (float16_t)0.250413007f, (float16_t)-0.968139105f,
+    (float16_t)0.251897818f, (float16_t)-0.967753837f,
+    (float16_t)0.253382037f, (float16_t)-0.967366292f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.256348682f, (float16_t)-0.966584374f,
+    (float16_t)0.257831102f, (float16_t)-0.966190003f,
+    (float16_t)0.259312915f, (float16_t)-0.965793359f,
+    (float16_t)0.260794118f, (float16_t)-0.965394442f,
+    (float16_t)0.262274707f, (float16_t)-0.964993253f,
+    (float16_t)0.263754679f, (float16_t)-0.964589793f,
+    (float16_t)0.265234030f, (float16_t)-0.964184064f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.268190857f, (float16_t)-0.963365800f,
+    (float16_t)0.269668326f, (float16_t)-0.962953267f,
+    (float16_t)0.271145160f, (float16_t)-0.962538468f,
+    (float16_t)0.272621355f, (float16_t)-0.962121404f,
+    (float16_t)0.274096910f, (float16_t)-0.961702077f,
+    (float16_t)0.275571819f, (float16_t)-0.961280486f,
+    (float16_t)0.277046080f, (float16_t)-0.960856633f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.279992643f, (float16_t)-0.960002146f,
+    (float16_t)0.281464938f, (float16_t)-0.959571513f,
+    (float16_t)0.282936570f, (float16_t)-0.959138622f,
+    (float16_t)0.284407537f, (float16_t)-0.958703475f,
+    (float16_t)0.285877835f, (float16_t)-0.958266071f,
+    (float16_t)0.287347460f, (float16_t)-0.957826413f,
+    (float16_t)0.288816408f, (float16_t)-0.957384501f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.291752263f, (float16_t)-0.956493919f,
+    (float16_t)0.293219163f, (float16_t)-0.956045251f,
+    (float16_t)0.294685372f, (float16_t)-0.955594334f,
+    (float16_t)0.296150888f, (float16_t)-0.955141168f,
+    (float16_t)0.297615707f, (float16_t)-0.954685755f,
+    (float16_t)0.299079826f, (float16_t)-0.954228095f,
+    (float16_t)0.300543241f, (float16_t)-0.953768190f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.303467947f, (float16_t)-0.952841648f,
+    (float16_t)0.304929230f, (float16_t)-0.952375013f,
+    (float16_t)0.306389795f, (float16_t)-0.951906137f,
+    (float16_t)0.307849640f, (float16_t)-0.951435021f,
+    (float16_t)0.309308760f, (float16_t)-0.950961666f,
+    (float16_t)0.310767153f, (float16_t)-0.950486074f,
+    (float16_t)0.312224814f, (float16_t)-0.950008245f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.315137929f, (float16_t)-0.949045882f,
+    (float16_t)0.316593376f, (float16_t)-0.948561350f,
+    (float16_t)0.318048077f, (float16_t)-0.948074586f,
+    (float16_t)0.319502031f, (float16_t)-0.947585591f,
+    (float16_t)0.320955232f, (float16_t)-0.947094366f,
+    (float16_t)0.322407679f, (float16_t)-0.946600913f,
+    (float16_t)0.323859367f, (float16_t)-0.946105232f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.326760452f, (float16_t)-0.945107193f,
+    (float16_t)0.328209844f, (float16_t)-0.944604837f,
+    (float16_t)0.329658463f, (float16_t)-0.944100258f,
+    (float16_t)0.331106306f, (float16_t)-0.943593458f,
+    (float16_t)0.332553370f, (float16_t)-0.943084437f,
+    (float16_t)0.333999651f, (float16_t)-0.942573198f,
+    (float16_t)0.335445147f, (float16_t)-0.942059740f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.338333767f, (float16_t)-0.941026175f,
+    (float16_t)0.339776884f, (float16_t)-0.940506071f,
+    (float16_t)0.341219202f, (float16_t)-0.939983753f,
+    (float16_t)0.342660717f, (float16_t)-0.939459224f,
+    (float16_t)0.344101426f, (float16_t)-0.938932484f,
+    (float16_t)0.345541325f, (float16_t)-0.938403534f,
+    (float16_t)0.346980411f, (float16_t)-0.937872376f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.349856130f, (float16_t)-0.936803442f,
+    (float16_t)0.351292756f, (float16_t)-0.936265667f,
+    (float16_t)0.352728556f, (float16_t)-0.935725689f,
+    (float16_t)0.354163525f, (float16_t)-0.935183510f,
+    (float16_t)0.355597662f, (float16_t)-0.934639130f,
+    (float16_t)0.357030961f, (float16_t)-0.934092550f,
+    (float16_t)0.358463421f, (float16_t)-0.933543773f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.361325806f, (float16_t)-0.932439629f,
+    (float16_t)0.362755724f, (float16_t)-0.931884266f,
+    (float16_t)0.364184790f, (float16_t)-0.931326709f,
+    (float16_t)0.365612998f, (float16_t)-0.930766961f,
+    (float16_t)0.367040346f, (float16_t)-0.930205023f,
+    (float16_t)0.368466830f, (float16_t)-0.929640896f,
+    (float16_t)0.369892447f, (float16_t)-0.929074581f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.372741067f, (float16_t)-0.927935395f,
+    (float16_t)0.374164063f, (float16_t)-0.927362526f,
+    (float16_t)0.375586178f, (float16_t)-0.926787474f,
+    (float16_t)0.377007410f, (float16_t)-0.926210242f,
+    (float16_t)0.378427755f, (float16_t)-0.925630831f,
+    (float16_t)0.379847209f, (float16_t)-0.925049241f,
+    (float16_t)0.381265769f, (float16_t)-0.924465474f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.384100195f, (float16_t)-0.923291417f,
+    (float16_t)0.385516054f, (float16_t)-0.922701128f,
+    (float16_t)0.386931006f, (float16_t)-0.922108669f,
+    (float16_t)0.388345047f, (float16_t)-0.921514039f,
+    (float16_t)0.389758174f, (float16_t)-0.920917242f,
+    (float16_t)0.391170384f, (float16_t)-0.920318277f,
+    (float16_t)0.392581674f, (float16_t)-0.919717146f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.395401479f, (float16_t)-0.918508394f,
+    (float16_t)0.396809987f, (float16_t)-0.917900776f,
+    (float16_t)0.398217562f, (float16_t)-0.917290997f,
+    (float16_t)0.399624200f, (float16_t)-0.916679060f,
+    (float16_t)0.401029897f, (float16_t)-0.916064966f,
+    (float16_t)0.402434651f, (float16_t)-0.915448716f,
+    (float16_t)0.403838458f, (float16_t)-0.914830312f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.406643217f, (float16_t)-0.913587048f,
+    (float16_t)0.408044163f, (float16_t)-0.912962190f,
+    (float16_t)0.409444149f, (float16_t)-0.912335185f,
+    (float16_t)0.410843171f, (float16_t)-0.911706032f,
+    (float16_t)0.412241227f, (float16_t)-0.911074734f,
+    (float16_t)0.413638312f, (float16_t)-0.910441292f,
+    (float16_t)0.415034424f, (float16_t)-0.909805708f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.417823716f, (float16_t)-0.908528119f,
+    (float16_t)0.419216888f, (float16_t)-0.907886116f,
+    (float16_t)0.420609074f, (float16_t)-0.907241978f,
+    (float16_t)0.422000271f, (float16_t)-0.906595705f,
+    (float16_t)0.423390474f, (float16_t)-0.905947298f,
+    (float16_t)0.424779681f, (float16_t)-0.905296759f,
+    (float16_t)0.426167889f, (float16_t)-0.904644091f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.428941292f, (float16_t)-0.903332368f,
+    (float16_t)0.430326481f, (float16_t)-0.902673318f,
+    (float16_t)0.431710658f, (float16_t)-0.902012144f,
+    (float16_t)0.433093819f, (float16_t)-0.901348847f,
+    (float16_t)0.434475961f, (float16_t)-0.900683429f,
+    (float16_t)0.435857080f, (float16_t)-0.900015892f,
+    (float16_t)0.437237174f, (float16_t)-0.899346237f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.439994271f, (float16_t)-0.898000580f,
+    (float16_t)0.441371269f, (float16_t)-0.897324581f,
+    (float16_t)0.442747228f, (float16_t)-0.896646470f,
+    (float16_t)0.444122145f, (float16_t)-0.895966250f,
+    (float16_t)0.445496017f, (float16_t)-0.895283921f,
+    (float16_t)0.446868840f, (float16_t)-0.894599486f,
+    (float16_t)0.448240612f, (float16_t)-0.893912945f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.450980989f, (float16_t)-0.892533555f,
+    (float16_t)0.452349587f, (float16_t)-0.891840709f,
+    (float16_t)0.453717121f, (float16_t)-0.891145765f,
+    (float16_t)0.455083587f, (float16_t)-0.890448723f,
+    (float16_t)0.456448982f, (float16_t)-0.889749586f,
+    (float16_t)0.457813304f, (float16_t)-0.889048356f,
+    (float16_t)0.459176548f, (float16_t)-0.888345033f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.461899791f, (float16_t)-0.886932119f,
+    (float16_t)0.463259784f, (float16_t)-0.886222530f,
+    (float16_t)0.464618686f, (float16_t)-0.885510856f,
+    (float16_t)0.465976496f, (float16_t)-0.884797098f,
+    (float16_t)0.467333209f, (float16_t)-0.884081259f,
+    (float16_t)0.468688822f, (float16_t)-0.883363339f,
+    (float16_t)0.470043332f, (float16_t)-0.882643340f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.472749032f, (float16_t)-0.881197113f,
+    (float16_t)0.474100215f, (float16_t)-0.880470889f,
+    (float16_t)0.475450282f, (float16_t)-0.879742593f,
+    (float16_t)0.476799230f, (float16_t)-0.879012226f,
+    (float16_t)0.478147056f, (float16_t)-0.878279792f,
+    (float16_t)0.479493758f, (float16_t)-0.877545290f,
+    (float16_t)0.480839331f, (float16_t)-0.876808724f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.483527079f, (float16_t)-0.875329403f,
+    (float16_t)0.484869248f, (float16_t)-0.874586652f,
+    (float16_t)0.486210276f, (float16_t)-0.873841843f,
+    (float16_t)0.487550160f, (float16_t)-0.873094978f,
+    (float16_t)0.488888897f, (float16_t)-0.872346059f,
+    (float16_t)0.490226483f, (float16_t)-0.871595087f,
+    (float16_t)0.491562916f, (float16_t)-0.870842063f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.494232309f, (float16_t)-0.869329871f,
+    (float16_t)0.495565262f, (float16_t)-0.868570706f,
+    (float16_t)0.496897049f, (float16_t)-0.867809497f,
+    (float16_t)0.498227667f, (float16_t)-0.867046246f,
+    (float16_t)0.499557113f, (float16_t)-0.866280954f,
+    (float16_t)0.500885383f, (float16_t)-0.865513624f,
+    (float16_t)0.502212474f, (float16_t)-0.864744258f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.504863109f, (float16_t)-0.863199422f,
+    (float16_t)0.506186645f, (float16_t)-0.862423956f,
+    (float16_t)0.507508991f, (float16_t)-0.861646461f,
+    (float16_t)0.508830143f, (float16_t)-0.860866939f,
+    (float16_t)0.510150097f, (float16_t)-0.860085390f,
+    (float16_t)0.511468850f, (float16_t)-0.859301818f,
+    (float16_t)0.512786401f, (float16_t)-0.858516224f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.515417878f, (float16_t)-0.856938977f,
+    (float16_t)0.516731799f, (float16_t)-0.856147328f,
+    (float16_t)0.518044504f, (float16_t)-0.855353665f,
+    (float16_t)0.519355990f, (float16_t)-0.854557988f,
+    (float16_t)0.520666254f, (float16_t)-0.853760301f,
+    (float16_t)0.521975293f, (float16_t)-0.852960605f,
+    (float16_t)0.523283103f, (float16_t)-0.852158902f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.525895027f, (float16_t)-0.850549481f,
+    (float16_t)0.527199135f, (float16_t)-0.849741768f,
+    (float16_t)0.528502002f, (float16_t)-0.848932055f,
+    (float16_t)0.529803625f, (float16_t)-0.848120345f,
+    (float16_t)0.531104001f, (float16_t)-0.847306639f,
+    (float16_t)0.532403128f, (float16_t)-0.846490939f,
+    (float16_t)0.533701002f, (float16_t)-0.845673247f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.536292979f, (float16_t)-0.844031895f,
+    (float16_t)0.537587076f, (float16_t)-0.843208240f,
+    (float16_t)0.538879909f, (float16_t)-0.842382600f,
+    (float16_t)0.540171473f, (float16_t)-0.841554977f,
+    (float16_t)0.541461766f, (float16_t)-0.840725375f,
+    (float16_t)0.542750785f, (float16_t)-0.839893794f,
+    (float16_t)0.544038527f, (float16_t)-0.839060237f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.546610167f, (float16_t)-0.837387202f,
+    (float16_t)0.547894059f, (float16_t)-0.836547727f,
+    (float16_t)0.549176662f, (float16_t)-0.835706284f,
+    (float16_t)0.550457973f, (float16_t)-0.834862875f,
+    (float16_t)0.551737988f, (float16_t)-0.834017501f,
+    (float16_t)0.553016706f, (float16_t)-0.833170165f,
+    (float16_t)0.554294121f, (float16_t)-0.832320868f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.556845037f, (float16_t)-0.830616400f,
+    (float16_t)0.558118531f, (float16_t)-0.829761234f,
+    (float16_t)0.559390712f, (float16_t)-0.828904115f,
+    (float16_t)0.560661576f, (float16_t)-0.828045045f,
+    (float16_t)0.561931121f, (float16_t)-0.827184027f,
+    (float16_t)0.563199344f, (float16_t)-0.826321063f,
+    (float16_t)0.564466242f, (float16_t)-0.825456154f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.566996049f, (float16_t)-0.823720511f,
+    (float16_t)0.568258953f, (float16_t)-0.822849781f,
+    (float16_t)0.569520519f, (float16_t)-0.821977115f,
+    (float16_t)0.570780746f, (float16_t)-0.821102515f,
+    (float16_t)0.572039629f, (float16_t)-0.820225983f,
+    (float16_t)0.573297167f, (float16_t)-0.819347520f,
+    (float16_t)0.574553355f, (float16_t)-0.818467130f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.577061673f, (float16_t)-0.816700573f,
+    (float16_t)0.578313796f, (float16_t)-0.815814411f,
+    (float16_t)0.579564559f, (float16_t)-0.814926329f,
+    (float16_t)0.580813958f, (float16_t)-0.814036330f,
+    (float16_t)0.582061990f, (float16_t)-0.813144415f,
+    (float16_t)0.583308653f, (float16_t)-0.812250587f,
+    (float16_t)0.584553943f, (float16_t)-0.811354847f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.587040394f, (float16_t)-0.809557642f,
+    (float16_t)0.588281548f, (float16_t)-0.808656182f,
+    (float16_t)0.589521319f, (float16_t)-0.807752818f,
+    (float16_t)0.590759702f, (float16_t)-0.806847554f,
+    (float16_t)0.591996695f, (float16_t)-0.805940391f,
+    (float16_t)0.593232295f, (float16_t)-0.805031331f,
+    (float16_t)0.594466499f, (float16_t)-0.804120377f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.596930708f, (float16_t)-0.802292796f,
+    (float16_t)0.598160707f, (float16_t)-0.801376172f,
+    (float16_t)0.599389298f, (float16_t)-0.800457662f,
+    (float16_t)0.600616479f, (float16_t)-0.799537269f,
+    (float16_t)0.601842247f, (float16_t)-0.798614995f,
+    (float16_t)0.603066599f, (float16_t)-0.797690841f,
+    (float16_t)0.604289531f, (float16_t)-0.796764810f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.606731127f, (float16_t)-0.794907126f,
+    (float16_t)0.607949785f, (float16_t)-0.793975478f,
+    (float16_t)0.609167012f, (float16_t)-0.793041960f,
+    (float16_t)0.610382806f, (float16_t)-0.792106577f,
+    (float16_t)0.611597164f, (float16_t)-0.791169330f,
+    (float16_t)0.612810082f, (float16_t)-0.790230221f,
+    (float16_t)0.614021559f, (float16_t)-0.789289253f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.616440175f, (float16_t)-0.787401747f,
+    (float16_t)0.617647308f, (float16_t)-0.786455214f,
+    (float16_t)0.618852988f, (float16_t)-0.785506830f,
+    (float16_t)0.620057212f, (float16_t)-0.784556597f,
+    (float16_t)0.621259977f, (float16_t)-0.783604519f,
+    (float16_t)0.622461279f, (float16_t)-0.782650596f,
+    (float16_t)0.623661118f, (float16_t)-0.781694832f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.626056388f, (float16_t)-0.779777788f,
+    (float16_t)0.627251815f, (float16_t)-0.778816512f,
+    (float16_t)0.628445767f, (float16_t)-0.777853404f,
+    (float16_t)0.629638239f, (float16_t)-0.776888466f,
+    (float16_t)0.630829230f, (float16_t)-0.775921699f,
+    (float16_t)0.632018736f, (float16_t)-0.774953107f,
+    (float16_t)0.633206755f, (float16_t)-0.773982691f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.635578320f, (float16_t)-0.772036397f,
+    (float16_t)0.636761861f, (float16_t)-0.771060524f,
+    (float16_t)0.637943904f, (float16_t)-0.770082837f,
+    (float16_t)0.639124445f, (float16_t)-0.769103338f,
+    (float16_t)0.640303482f, (float16_t)-0.768122029f,
+    (float16_t)0.641481013f, (float16_t)-0.767138912f,
+    (float16_t)0.642657034f, (float16_t)-0.766153990f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.645004537f, (float16_t)-0.764178741f,
+    (float16_t)0.646176013f, (float16_t)-0.763188417f,
+    (float16_t)0.647345969f, (float16_t)-0.762196298f,
+    (float16_t)0.648514401f, (float16_t)-0.761202385f,
+    (float16_t)0.649681307f, (float16_t)-0.760206682f,
+    (float16_t)0.650846685f, (float16_t)-0.759209189f,
+    (float16_t)0.652010531f, (float16_t)-0.758209910f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.654333618f, (float16_t)-0.756206001f,
+    (float16_t)0.655492853f, (float16_t)-0.755201377f,
+    (float16_t)0.656650546f, (float16_t)-0.754194975f,
+    (float16_t)0.657806693f, (float16_t)-0.753186799f,
+    (float16_t)0.658961293f, (float16_t)-0.752176850f,
+    (float16_t)0.660114342f, (float16_t)-0.751165132f,
+    (float16_t)0.661265838f, (float16_t)-0.750151646f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.663564159f, (float16_t)-0.748119380f,
+    (float16_t)0.664710978f, (float16_t)-0.747100606f,
+    (float16_t)0.665856234f, (float16_t)-0.746080074f,
+    (float16_t)0.666999922f, (float16_t)-0.745057785f,
+    (float16_t)0.668142041f, (float16_t)-0.744033744f,
+    (float16_t)0.669282588f, (float16_t)-0.743007952f,
+    (float16_t)0.670421560f, (float16_t)-0.741980412f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.672694769f, (float16_t)-0.739920095f,
+    (float16_t)0.673829000f, (float16_t)-0.738887324f,
+    (float16_t)0.674961646f, (float16_t)-0.737852815f,
+    (float16_t)0.676092704f, (float16_t)-0.736816569f,
+    (float16_t)0.677222170f, (float16_t)-0.735778589f,
+    (float16_t)0.678350043f, (float16_t)-0.734738878f,
+    (float16_t)0.679476320f, (float16_t)-0.733697438f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.681724074f, (float16_t)-0.731609381f,
+    (float16_t)0.682845546f, (float16_t)-0.730562769f,
+    (float16_t)0.683965412f, (float16_t)-0.729514438f,
+    (float16_t)0.685083668f, (float16_t)-0.728464390f,
+    (float16_t)0.686200312f, (float16_t)-0.727412629f,
+    (float16_t)0.687315341f, (float16_t)-0.726359155f,
+    (float16_t)0.688428753f, (float16_t)-0.725303972f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.690650714f, (float16_t)-0.723188489f,
+    (float16_t)0.691759258f, (float16_t)-0.722128194f,
+    (float16_t)0.692866175f, (float16_t)-0.721066199f,
+    (float16_t)0.693971461f, (float16_t)-0.720002508f,
+    (float16_t)0.695075114f, (float16_t)-0.718937122f,
+    (float16_t)0.696177131f, (float16_t)-0.717870045f,
+    (float16_t)0.697277511f, (float16_t)-0.716801279f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.699473345f, (float16_t)-0.714658688f,
+    (float16_t)0.700568794f, (float16_t)-0.713584869f,
+    (float16_t)0.701662595f, (float16_t)-0.712509371f,
+    (float16_t)0.702754744f, (float16_t)-0.711432196f,
+    (float16_t)0.703845241f, (float16_t)-0.710353347f,
+    (float16_t)0.704934080f, (float16_t)-0.709272826f,
+    (float16_t)0.706021261f, (float16_t)-0.708190637f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.708190637f, (float16_t)-0.706021261f,
+    (float16_t)0.709272826f, (float16_t)-0.704934080f,
+    (float16_t)0.710353347f, (float16_t)-0.703845241f,
+    (float16_t)0.711432196f, (float16_t)-0.702754744f,
+    (float16_t)0.712509371f, (float16_t)-0.701662595f,
+    (float16_t)0.713584869f, (float16_t)-0.700568794f,
+    (float16_t)0.714658688f, (float16_t)-0.699473345f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.716801279f, (float16_t)-0.697277511f,
+    (float16_t)0.717870045f, (float16_t)-0.696177131f,
+    (float16_t)0.718937122f, (float16_t)-0.695075114f,
+    (float16_t)0.720002508f, (float16_t)-0.693971461f,
+    (float16_t)0.721066199f, (float16_t)-0.692866175f,
+    (float16_t)0.722128194f, (float16_t)-0.691759258f,
+    (float16_t)0.723188489f, (float16_t)-0.690650714f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.725303972f, (float16_t)-0.688428753f,
+    (float16_t)0.726359155f, (float16_t)-0.687315341f,
+    (float16_t)0.727412629f, (float16_t)-0.686200312f,
+    (float16_t)0.728464390f, (float16_t)-0.685083668f,
+    (float16_t)0.729514438f, (float16_t)-0.683965412f,
+    (float16_t)0.730562769f, (float16_t)-0.682845546f,
+    (float16_t)0.731609381f, (float16_t)-0.681724074f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.733697438f, (float16_t)-0.679476320f,
+    (float16_t)0.734738878f, (float16_t)-0.678350043f,
+    (float16_t)0.735778589f, (float16_t)-0.677222170f,
+    (float16_t)0.736816569f, (float16_t)-0.676092704f,
+    (float16_t)0.737852815f, (float16_t)-0.674961646f,
+    (float16_t)0.738887324f, (float16_t)-0.673829000f,
+    (float16_t)0.739920095f, (float16_t)-0.672694769f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.741980412f, (float16_t)-0.670421560f,
+    (float16_t)0.743007952f, (float16_t)-0.669282588f,
+    (float16_t)0.744033744f, (float16_t)-0.668142041f,
+    (float16_t)0.745057785f, (float16_t)-0.666999922f,
+    (float16_t)0.746080074f, (float16_t)-0.665856234f,
+    (float16_t)0.747100606f, (float16_t)-0.664710978f,
+    (float16_t)0.748119380f, (float16_t)-0.663564159f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.750151646f, (float16_t)-0.661265838f,
+    (float16_t)0.751165132f, (float16_t)-0.660114342f,
+    (float16_t)0.752176850f, (float16_t)-0.658961293f,
+    (float16_t)0.753186799f, (float16_t)-0.657806693f,
+    (float16_t)0.754194975f, (float16_t)-0.656650546f,
+    (float16_t)0.755201377f, (float16_t)-0.655492853f,
+    (float16_t)0.756206001f, (float16_t)-0.654333618f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.758209910f, (float16_t)-0.652010531f,
+    (float16_t)0.759209189f, (float16_t)-0.650846685f,
+    (float16_t)0.760206682f, (float16_t)-0.649681307f,
+    (float16_t)0.761202385f, (float16_t)-0.648514401f,
+    (float16_t)0.762196298f, (float16_t)-0.647345969f,
+    (float16_t)0.763188417f, (float16_t)-0.646176013f,
+    (float16_t)0.764178741f, (float16_t)-0.645004537f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.766153990f, (float16_t)-0.642657034f,
+    (float16_t)0.767138912f, (float16_t)-0.641481013f,
+    (float16_t)0.768122029f, (float16_t)-0.640303482f,
+    (float16_t)0.769103338f, (float16_t)-0.639124445f,
+    (float16_t)0.770082837f, (float16_t)-0.637943904f,
+    (float16_t)0.771060524f, (float16_t)-0.636761861f,
+    (float16_t)0.772036397f, (float16_t)-0.635578320f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.773982691f, (float16_t)-0.633206755f,
+    (float16_t)0.774953107f, (float16_t)-0.632018736f,
+    (float16_t)0.775921699f, (float16_t)-0.630829230f,
+    (float16_t)0.776888466f, (float16_t)-0.629638239f,
+    (float16_t)0.777853404f, (float16_t)-0.628445767f,
+    (float16_t)0.778816512f, (float16_t)-0.627251815f,
+    (float16_t)0.779777788f, (float16_t)-0.626056388f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.781694832f, (float16_t)-0.623661118f,
+    (float16_t)0.782650596f, (float16_t)-0.622461279f,
+    (float16_t)0.783604519f, (float16_t)-0.621259977f,
+    (float16_t)0.784556597f, (float16_t)-0.620057212f,
+    (float16_t)0.785506830f, (float16_t)-0.618852988f,
+    (float16_t)0.786455214f, (float16_t)-0.617647308f,
+    (float16_t)0.787401747f, (float16_t)-0.616440175f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.789289253f, (float16_t)-0.614021559f,
+    (float16_t)0.790230221f, (float16_t)-0.612810082f,
+    (float16_t)0.791169330f, (float16_t)-0.611597164f,
+    (float16_t)0.792106577f, (float16_t)-0.610382806f,
+    (float16_t)0.793041960f, (float16_t)-0.609167012f,
+    (float16_t)0.793975478f, (float16_t)-0.607949785f,
+    (float16_t)0.794907126f, (float16_t)-0.606731127f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.796764810f, (float16_t)-0.604289531f,
+    (float16_t)0.797690841f, (float16_t)-0.603066599f,
+    (float16_t)0.798614995f, (float16_t)-0.601842247f,
+    (float16_t)0.799537269f, (float16_t)-0.600616479f,
+    (float16_t)0.800457662f, (float16_t)-0.599389298f,
+    (float16_t)0.801376172f, (float16_t)-0.598160707f,
+    (float16_t)0.802292796f, (float16_t)-0.596930708f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.804120377f, (float16_t)-0.594466499f,
+    (float16_t)0.805031331f, (float16_t)-0.593232295f,
+    (float16_t)0.805940391f, (float16_t)-0.591996695f,
+    (float16_t)0.806847554f, (float16_t)-0.590759702f,
+    (float16_t)0.807752818f, (float16_t)-0.589521319f,
+    (float16_t)0.808656182f, (float16_t)-0.588281548f,
+    (float16_t)0.809557642f, (float16_t)-0.587040394f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.811354847f, (float16_t)-0.584553943f,
+    (float16_t)0.812250587f, (float16_t)-0.583308653f,
+    (float16_t)0.813144415f, (float16_t)-0.582061990f,
+    (float16_t)0.814036330f, (float16_t)-0.580813958f,
+    (float16_t)0.814926329f, (float16_t)-0.579564559f,
+    (float16_t)0.815814411f, (float16_t)-0.578313796f,
+    (float16_t)0.816700573f, (float16_t)-0.577061673f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.818467130f, (float16_t)-0.574553355f,
+    (float16_t)0.819347520f, (float16_t)-0.573297167f,
+    (float16_t)0.820225983f, (float16_t)-0.572039629f,
+    (float16_t)0.821102515f, (float16_t)-0.570780746f,
+    (float16_t)0.821977115f, (float16_t)-0.569520519f,
+    (float16_t)0.822849781f, (float16_t)-0.568258953f,
+    (float16_t)0.823720511f, (float16_t)-0.566996049f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.825456154f, (float16_t)-0.564466242f,
+    (float16_t)0.826321063f, (float16_t)-0.563199344f,
+    (float16_t)0.827184027f, (float16_t)-0.561931121f,
+    (float16_t)0.828045045f, (float16_t)-0.560661576f,
+    (float16_t)0.828904115f, (float16_t)-0.559390712f,
+    (float16_t)0.829761234f, (float16_t)-0.558118531f,
+    (float16_t)0.830616400f, (float16_t)-0.556845037f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.832320868f, (float16_t)-0.554294121f,
+    (float16_t)0.833170165f, (float16_t)-0.553016706f,
+    (float16_t)0.834017501f, (float16_t)-0.551737988f,
+    (float16_t)0.834862875f, (float16_t)-0.550457973f,
+    (float16_t)0.835706284f, (float16_t)-0.549176662f,
+    (float16_t)0.836547727f, (float16_t)-0.547894059f,
+    (float16_t)0.837387202f, (float16_t)-0.546610167f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.839060237f, (float16_t)-0.544038527f,
+    (float16_t)0.839893794f, (float16_t)-0.542750785f,
+    (float16_t)0.840725375f, (float16_t)-0.541461766f,
+    (float16_t)0.841554977f, (float16_t)-0.540171473f,
+    (float16_t)0.842382600f, (float16_t)-0.538879909f,
+    (float16_t)0.843208240f, (float16_t)-0.537587076f,
+    (float16_t)0.844031895f, (float16_t)-0.536292979f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.845673247f, (float16_t)-0.533701002f,
+    (float16_t)0.846490939f, (float16_t)-0.532403128f,
+    (float16_t)0.847306639f, (float16_t)-0.531104001f,
+    (float16_t)0.848120345f, (float16_t)-0.529803625f,
+    (float16_t)0.848932055f, (float16_t)-0.528502002f,
+    (float16_t)0.849741768f, (float16_t)-0.527199135f,
+    (float16_t)0.850549481f, (float16_t)-0.525895027f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.852158902f, (float16_t)-0.523283103f,
+    (float16_t)0.852960605f, (float16_t)-0.521975293f,
+    (float16_t)0.853760301f, (float16_t)-0.520666254f,
+    (float16_t)0.854557988f, (float16_t)-0.519355990f,
+    (float16_t)0.855353665f, (float16_t)-0.518044504f,
+    (float16_t)0.856147328f, (float16_t)-0.516731799f,
+    (float16_t)0.856938977f, (float16_t)-0.515417878f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.858516224f, (float16_t)-0.512786401f,
+    (float16_t)0.859301818f, (float16_t)-0.511468850f,
+    (float16_t)0.860085390f, (float16_t)-0.510150097f,
+    (float16_t)0.860866939f, (float16_t)-0.508830143f,
+    (float16_t)0.861646461f, (float16_t)-0.507508991f,
+    (float16_t)0.862423956f, (float16_t)-0.506186645f,
+    (float16_t)0.863199422f, (float16_t)-0.504863109f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.864744258f, (float16_t)-0.502212474f,
+    (float16_t)0.865513624f, (float16_t)-0.500885383f,
+    (float16_t)0.866280954f, (float16_t)-0.499557113f,
+    (float16_t)0.867046246f, (float16_t)-0.498227667f,
+    (float16_t)0.867809497f, (float16_t)-0.496897049f,
+    (float16_t)0.868570706f, (float16_t)-0.495565262f,
+    (float16_t)0.869329871f, (float16_t)-0.494232309f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.870842063f, (float16_t)-0.491562916f,
+    (float16_t)0.871595087f, (float16_t)-0.490226483f,
+    (float16_t)0.872346059f, (float16_t)-0.488888897f,
+    (float16_t)0.873094978f, (float16_t)-0.487550160f,
+    (float16_t)0.873841843f, (float16_t)-0.486210276f,
+    (float16_t)0.874586652f, (float16_t)-0.484869248f,
+    (float16_t)0.875329403f, (float16_t)-0.483527079f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.876808724f, (float16_t)-0.480839331f,
+    (float16_t)0.877545290f, (float16_t)-0.479493758f,
+    (float16_t)0.878279792f, (float16_t)-0.478147056f,
+    (float16_t)0.879012226f, (float16_t)-0.476799230f,
+    (float16_t)0.879742593f, (float16_t)-0.475450282f,
+    (float16_t)0.880470889f, (float16_t)-0.474100215f,
+    (float16_t)0.881197113f, (float16_t)-0.472749032f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.882643340f, (float16_t)-0.470043332f,
+    (float16_t)0.883363339f, (float16_t)-0.468688822f,
+    (float16_t)0.884081259f, (float16_t)-0.467333209f,
+    (float16_t)0.884797098f, (float16_t)-0.465976496f,
+    (float16_t)0.885510856f, (float16_t)-0.464618686f,
+    (float16_t)0.886222530f, (float16_t)-0.463259784f,
+    (float16_t)0.886932119f, (float16_t)-0.461899791f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.888345033f, (float16_t)-0.459176548f,
+    (float16_t)0.889048356f, (float16_t)-0.457813304f,
+    (float16_t)0.889749586f, (float16_t)-0.456448982f,
+    (float16_t)0.890448723f, (float16_t)-0.455083587f,
+    (float16_t)0.891145765f, (float16_t)-0.453717121f,
+    (float16_t)0.891840709f, (float16_t)-0.452349587f,
+    (float16_t)0.892533555f, (float16_t)-0.450980989f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.893912945f, (float16_t)-0.448240612f,
+    (float16_t)0.894599486f, (float16_t)-0.446868840f,
+    (float16_t)0.895283921f, (float16_t)-0.445496017f,
+    (float16_t)0.895966250f, (float16_t)-0.444122145f,
+    (float16_t)0.896646470f, (float16_t)-0.442747228f,
+    (float16_t)0.897324581f, (float16_t)-0.441371269f,
+    (float16_t)0.898000580f, (float16_t)-0.439994271f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.899346237f, (float16_t)-0.437237174f,
+    (float16_t)0.900015892f, (float16_t)-0.435857080f,
+    (float16_t)0.900683429f, (float16_t)-0.434475961f,
+    (float16_t)0.901348847f, (float16_t)-0.433093819f,
+    (float16_t)0.902012144f, (float16_t)-0.431710658f,
+    (float16_t)0.902673318f, (float16_t)-0.430326481f,
+    (float16_t)0.903332368f, (float16_t)-0.428941292f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.904644091f, (float16_t)-0.426167889f,
+    (float16_t)0.905296759f, (float16_t)-0.424779681f,
+    (float16_t)0.905947298f, (float16_t)-0.423390474f,
+    (float16_t)0.906595705f, (float16_t)-0.422000271f,
+    (float16_t)0.907241978f, (float16_t)-0.420609074f,
+    (float16_t)0.907886116f, (float16_t)-0.419216888f,
+    (float16_t)0.908528119f, (float16_t)-0.417823716f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.909805708f, (float16_t)-0.415034424f,
+    (float16_t)0.910441292f, (float16_t)-0.413638312f,
+    (float16_t)0.911074734f, (float16_t)-0.412241227f,
+    (float16_t)0.911706032f, (float16_t)-0.410843171f,
+    (float16_t)0.912335185f, (float16_t)-0.409444149f,
+    (float16_t)0.912962190f, (float16_t)-0.408044163f,
+    (float16_t)0.913587048f, (float16_t)-0.406643217f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.914830312f, (float16_t)-0.403838458f,
+    (float16_t)0.915448716f, (float16_t)-0.402434651f,
+    (float16_t)0.916064966f, (float16_t)-0.401029897f,
+    (float16_t)0.916679060f, (float16_t)-0.399624200f,
+    (float16_t)0.917290997f, (float16_t)-0.398217562f,
+    (float16_t)0.917900776f, (float16_t)-0.396809987f,
+    (float16_t)0.918508394f, (float16_t)-0.395401479f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.919717146f, (float16_t)-0.392581674f,
+    (float16_t)0.920318277f, (float16_t)-0.391170384f,
+    (float16_t)0.920917242f, (float16_t)-0.389758174f,
+    (float16_t)0.921514039f, (float16_t)-0.388345047f,
+    (float16_t)0.922108669f, (float16_t)-0.386931006f,
+    (float16_t)0.922701128f, (float16_t)-0.385516054f,
+    (float16_t)0.923291417f, (float16_t)-0.384100195f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.924465474f, (float16_t)-0.381265769f,
+    (float16_t)0.925049241f, (float16_t)-0.379847209f,
+    (float16_t)0.925630831f, (float16_t)-0.378427755f,
+    (float16_t)0.926210242f, (float16_t)-0.377007410f,
+    (float16_t)0.926787474f, (float16_t)-0.375586178f,
+    (float16_t)0.927362526f, (float16_t)-0.374164063f,
+    (float16_t)0.927935395f, (float16_t)-0.372741067f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.929074581f, (float16_t)-0.369892447f,
+    (float16_t)0.929640896f, (float16_t)-0.368466830f,
+    (float16_t)0.930205023f, (float16_t)-0.367040346f,
+    (float16_t)0.930766961f, (float16_t)-0.365612998f,
+    (float16_t)0.931326709f, (float16_t)-0.364184790f,
+    (float16_t)0.931884266f, (float16_t)-0.362755724f,
+    (float16_t)0.932439629f, (float16_t)-0.361325806f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.933543773f, (float16_t)-0.358463421f,
+    (float16_t)0.934092550f, (float16_t)-0.357030961f,
+    (float16_t)0.934639130f, (float16_t)-0.355597662f,
+    (float16_t)0.935183510f, (float16_t)-0.354163525f,
+    (float16_t)0.935725689f, (float16_t)-0.352728556f,
+    (float16_t)0.936265667f, (float16_t)-0.351292756f,
+    (float16_t)0.936803442f, (float16_t)-0.349856130f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.937872376f, (float16_t)-0.346980411f,
+    (float16_t)0.938403534f, (float16_t)-0.345541325f,
+    (float16_t)0.938932484f, (float16_t)-0.344101426f,
+    (float16_t)0.939459224f, (float16_t)-0.342660717f,
+    (float16_t)0.939983753f, (float16_t)-0.341219202f,
+    (float16_t)0.940506071f, (float16_t)-0.339776884f,
+    (float16_t)0.941026175f, (float16_t)-0.338333767f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.942059740f, (float16_t)-0.335445147f,
+    (float16_t)0.942573198f, (float16_t)-0.333999651f,
+    (float16_t)0.943084437f, (float16_t)-0.332553370f,
+    (float16_t)0.943593458f, (float16_t)-0.331106306f,
+    (float16_t)0.944100258f, (float16_t)-0.329658463f,
+    (float16_t)0.944604837f, (float16_t)-0.328209844f,
+    (float16_t)0.945107193f, (float16_t)-0.326760452f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.946105232f, (float16_t)-0.323859367f,
+    (float16_t)0.946600913f, (float16_t)-0.322407679f,
+    (float16_t)0.947094366f, (float16_t)-0.320955232f,
+    (float16_t)0.947585591f, (float16_t)-0.319502031f,
+    (float16_t)0.948074586f, (float16_t)-0.318048077f,
+    (float16_t)0.948561350f, (float16_t)-0.316593376f,
+    (float16_t)0.949045882f, (float16_t)-0.315137929f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.950008245f, (float16_t)-0.312224814f,
+    (float16_t)0.950486074f, (float16_t)-0.310767153f,
+    (float16_t)0.950961666f, (float16_t)-0.309308760f,
+    (float16_t)0.951435021f, (float16_t)-0.307849640f,
+    (float16_t)0.951906137f, (float16_t)-0.306389795f,
+    (float16_t)0.952375013f, (float16_t)-0.304929230f,
+    (float16_t)0.952841648f, (float16_t)-0.303467947f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.953768190f, (float16_t)-0.300543241f,
+    (float16_t)0.954228095f, (float16_t)-0.299079826f,
+    (float16_t)0.954685755f, (float16_t)-0.297615707f,
+    (float16_t)0.955141168f, (float16_t)-0.296150888f,
+    (float16_t)0.955594334f, (float16_t)-0.294685372f,
+    (float16_t)0.956045251f, (float16_t)-0.293219163f,
+    (float16_t)0.956493919f, (float16_t)-0.291752263f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.957384501f, (float16_t)-0.288816408f,
+    (float16_t)0.957826413f, (float16_t)-0.287347460f,
+    (float16_t)0.958266071f, (float16_t)-0.285877835f,
+    (float16_t)0.958703475f, (float16_t)-0.284407537f,
+    (float16_t)0.959138622f, (float16_t)-0.282936570f,
+    (float16_t)0.959571513f, (float16_t)-0.281464938f,
+    (float16_t)0.960002146f, (float16_t)-0.279992643f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.960856633f, (float16_t)-0.277046080f,
+    (float16_t)0.961280486f, (float16_t)-0.275571819f,
+    (float16_t)0.961702077f, (float16_t)-0.274096910f,
+    (float16_t)0.962121404f, (float16_t)-0.272621355f,
+    (float16_t)0.962538468f, (float16_t)-0.271145160f,
+    (float16_t)0.962953267f, (float16_t)-0.269668326f,
+    (float16_t)0.963365800f, (float16_t)-0.268190857f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.964184064f, (float16_t)-0.265234030f,
+    (float16_t)0.964589793f, (float16_t)-0.263754679f,
+    (float16_t)0.964993253f, (float16_t)-0.262274707f,
+    (float16_t)0.965394442f, (float16_t)-0.260794118f,
+    (float16_t)0.965793359f, (float16_t)-0.259312915f,
+    (float16_t)0.966190003f, (float16_t)-0.257831102f,
+    (float16_t)0.966584374f, (float16_t)-0.256348682f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.967366292f, (float16_t)-0.253382037f,
+    (float16_t)0.967753837f, (float16_t)-0.251897818f,
+    (float16_t)0.968139105f, (float16_t)-0.250413007f,
+    (float16_t)0.968522094f, (float16_t)-0.248927606f,
+    (float16_t)0.968902805f, (float16_t)-0.247441619f,
+    (float16_t)0.969281235f, (float16_t)-0.245955050f,
+    (float16_t)0.969657385f, (float16_t)-0.244467903f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.970402839f, (float16_t)-0.241491885f,
+    (float16_t)0.970772141f, (float16_t)-0.240003022f,
+    (float16_t)0.971139158f, (float16_t)-0.238513595f,
+    (float16_t)0.971503891f, (float16_t)-0.237023606f,
+    (float16_t)0.971866337f, (float16_t)-0.235533059f,
+    (float16_t)0.972226497f, (float16_t)-0.234041959f,
+    (float16_t)0.972584369f, (float16_t)-0.232550307f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.973293246f, (float16_t)-0.229565366f,
+    (float16_t)0.973644250f, (float16_t)-0.228072083f,
+    (float16_t)0.973992962f, (float16_t)-0.226578264f,
+    (float16_t)0.974339383f, (float16_t)-0.225083911f,
+    (float16_t)0.974683511f, (float16_t)-0.223589029f,
+    (float16_t)0.975025345f, (float16_t)-0.222093621f,
+    (float16_t)0.975364885f, (float16_t)-0.220597690f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.976037079f, (float16_t)-0.217604275f,
+    (float16_t)0.976369731f, (float16_t)-0.216106797f,
+    (float16_t)0.976700086f, (float16_t)-0.214608811f,
+    (float16_t)0.977028143f, (float16_t)-0.213110320f,
+    (float16_t)0.977353900f, (float16_t)-0.211611327f,
+    (float16_t)0.977677358f, (float16_t)-0.210111837f,
+    (float16_t)0.977998515f, (float16_t)-0.208611852f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.978633924f, (float16_t)-0.205610413f,
+    (float16_t)0.978948175f, (float16_t)-0.204108966f,
+    (float16_t)0.979260123f, (float16_t)-0.202607039f,
+    (float16_t)0.979569766f, (float16_t)-0.201104635f,
+    (float16_t)0.979877104f, (float16_t)-0.199601758f,
+    (float16_t)0.980182136f, (float16_t)-0.198098411f,
+    (float16_t)0.980484862f, (float16_t)-0.196594598f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.981083391f, (float16_t)-0.193585587f,
+    (float16_t)0.981379193f, (float16_t)-0.192080397f,
+    (float16_t)0.981672686f, (float16_t)-0.190574755f,
+    (float16_t)0.981963869f, (float16_t)-0.189068664f,
+    (float16_t)0.982252741f, (float16_t)-0.187562129f,
+    (float16_t)0.982539302f, (float16_t)-0.186055152f,
+    (float16_t)0.982823551f, (float16_t)-0.184547737f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.983385110f, (float16_t)-0.181531608f,
+    (float16_t)0.983662419f, (float16_t)-0.180022901f,
+    (float16_t)0.983937413f, (float16_t)-0.178513771f,
+    (float16_t)0.984210092f, (float16_t)-0.177004220f,
+    (float16_t)0.984480455f, (float16_t)-0.175494253f,
+    (float16_t)0.984748502f, (float16_t)-0.173983873f,
+    (float16_t)0.985014231f, (float16_t)-0.172473084f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.985538735f, (float16_t)-0.169450291f,
+    (float16_t)0.985797509f, (float16_t)-0.167938295f,
+    (float16_t)0.986053963f, (float16_t)-0.166425904f,
+    (float16_t)0.986308097f, (float16_t)-0.164913120f,
+    (float16_t)0.986559910f, (float16_t)-0.163399949f,
+    (float16_t)0.986809402f, (float16_t)-0.161886394f,
+    (float16_t)0.987056571f, (float16_t)-0.160372457f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.987543942f, (float16_t)-0.157343456f,
+    (float16_t)0.987784142f, (float16_t)-0.155828398f,
+    (float16_t)0.988022017f, (float16_t)-0.154312973f,
+    (float16_t)0.988257568f, (float16_t)-0.152797185f,
+    (float16_t)0.988490793f, (float16_t)-0.151281038f,
+    (float16_t)0.988721692f, (float16_t)-0.149764535f,
+    (float16_t)0.988950265f, (float16_t)-0.148247679f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.989400428f, (float16_t)-0.145212925f,
+    (float16_t)0.989622017f, (float16_t)-0.143695033f,
+    (float16_t)0.989841278f, (float16_t)-0.142176804f,
+    (float16_t)0.990058210f, (float16_t)-0.140658239f,
+    (float16_t)0.990272812f, (float16_t)-0.139139344f,
+    (float16_t)0.990485084f, (float16_t)-0.137620122f,
+    (float16_t)0.990695025f, (float16_t)-0.136100575f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.991107914f, (float16_t)-0.133060525f,
+    (float16_t)0.991310860f, (float16_t)-0.131540029f,
+    (float16_t)0.991511473f, (float16_t)-0.130019223f,
+    (float16_t)0.991709754f, (float16_t)-0.128498111f,
+    (float16_t)0.991905700f, (float16_t)-0.126976696f,
+    (float16_t)0.992099313f, (float16_t)-0.125454983f,
+    (float16_t)0.992290591f, (float16_t)-0.123932975f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.992666142f, (float16_t)-0.120888087f,
+    (float16_t)0.992850414f, (float16_t)-0.119365215f,
+    (float16_t)0.993032350f, (float16_t)-0.117842062f,
+    (float16_t)0.993211949f, (float16_t)-0.116318631f,
+    (float16_t)0.993389211f, (float16_t)-0.114794927f,
+    (float16_t)0.993564136f, (float16_t)-0.113270952f,
+    (float16_t)0.993736722f, (float16_t)-0.111746711f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.994074879f, (float16_t)-0.108697444f,
+    (float16_t)0.994240449f, (float16_t)-0.107172425f,
+    (float16_t)0.994403680f, (float16_t)-0.105647154f,
+    (float16_t)0.994564571f, (float16_t)-0.104121634f,
+    (float16_t)0.994723121f, (float16_t)-0.102595869f,
+    (float16_t)0.994879331f, (float16_t)-0.101069863f,
+    (float16_t)0.995033199f, (float16_t)-0.099543619f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.995333912f, (float16_t)-0.096490431f,
+    (float16_t)0.995480755f, (float16_t)-0.094963495f,
+    (float16_t)0.995625256f, (float16_t)-0.093436336f,
+    (float16_t)0.995767414f, (float16_t)-0.091908956f,
+    (float16_t)0.995907229f, (float16_t)-0.090381361f,
+    (float16_t)0.996044701f, (float16_t)-0.088853553f,
+    (float16_t)0.996179829f, (float16_t)-0.087325535f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.996443051f, (float16_t)-0.084268888f,
+    (float16_t)0.996571146f, (float16_t)-0.082740265f,
+    (float16_t)0.996696895f, (float16_t)-0.081211447f,
+    (float16_t)0.996820299f, (float16_t)-0.079682438f,
+    (float16_t)0.996941358f, (float16_t)-0.078153242f,
+    (float16_t)0.997060070f, (float16_t)-0.076623861f,
+    (float16_t)0.997176437f, (float16_t)-0.075094301f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.997402130f, (float16_t)-0.072034653f,
+    (float16_t)0.997511456f, (float16_t)-0.070504573f,
+    (float16_t)0.997618435f, (float16_t)-0.068974328f,
+    (float16_t)0.997723067f, (float16_t)-0.067443920f,
+    (float16_t)0.997825350f, (float16_t)-0.065913353f,
+    (float16_t)0.997925286f, (float16_t)-0.064382631f,
+    (float16_t)0.998022874f, (float16_t)-0.062851758f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.998211003f, (float16_t)-0.059789571f,
+    (float16_t)0.998301545f, (float16_t)-0.058258265f,
+    (float16_t)0.998389737f, (float16_t)-0.056726821f,
+    (float16_t)0.998475581f, (float16_t)-0.055195244f,
+    (float16_t)0.998559074f, (float16_t)-0.053663538f,
+    (float16_t)0.998640218f, (float16_t)-0.052131705f,
+    (float16_t)0.998719012f, (float16_t)-0.050599749f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.998869550f, (float16_t)-0.047535484f,
+    (float16_t)0.998941293f, (float16_t)-0.046003182f,
+    (float16_t)0.999010686f, (float16_t)-0.044470772f,
+    (float16_t)0.999077728f, (float16_t)-0.042938257f,
+    (float16_t)0.999142419f, (float16_t)-0.041405641f,
+    (float16_t)0.999204759f, (float16_t)-0.039872928f,
+    (float16_t)0.999264747f, (float16_t)-0.038340120f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.999377670f, (float16_t)-0.035274239f,
+    (float16_t)0.999430605f, (float16_t)-0.033741172f,
+    (float16_t)0.999481187f, (float16_t)-0.032208025f,
+    (float16_t)0.999529418f, (float16_t)-0.030674803f,
+    (float16_t)0.999575296f, (float16_t)-0.029141509f,
+    (float16_t)0.999618822f, (float16_t)-0.027608146f,
+    (float16_t)0.999659997f, (float16_t)-0.026074718f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999735288f, (float16_t)-0.023007681f,
+    (float16_t)0.999769405f, (float16_t)-0.021474080f,
+    (float16_t)0.999801170f, (float16_t)-0.019940429f,
+    (float16_t)0.999830582f, (float16_t)-0.018406730f,
+    (float16_t)0.999857641f, (float16_t)-0.016872988f,
+    (float16_t)0.999882347f, (float16_t)-0.015339206f,
+    (float16_t)0.999904701f, (float16_t)-0.013805389f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f,
+    (float16_t)0.999942350f, (float16_t)-0.010737659f,
+    (float16_t)0.999957645f, (float16_t)-0.009203755f,
+    (float16_t)0.999970586f, (float16_t)-0.007669829f,
+    (float16_t)0.999981175f, (float16_t)-0.006135885f,
+    (float16_t)0.999989411f, (float16_t)-0.004601926f,
+    (float16_t)0.999995294f, (float16_t)-0.003067957f,
+    (float16_t)0.999998823f, (float16_t)-0.001533980f
+};
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32)
+/**
+  @par
+  Example code for Floating-point RFFT Twiddle factors Generation:
+  @par
+  <pre>TW = exp(pi/2*i-2*pi*i*[0:L/2-1]/L).' </pre>
+  @par
+  Real and Imag values are in interleaved fashion
+*/
+const float16_t twiddleCoefF16_rfft_32[32] = {
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64)
+const float16_t twiddleCoefF16_rfft_64[64] = {
+    (float16_t)0.000000000000000f,  (float16_t)1.000000000000000f,
+    (float16_t)0.098017140329561f,  (float16_t)0.995184726672197f,
+    (float16_t)0.195090322016128f,  (float16_t)0.980785280403230f,
+    (float16_t)0.290284677254462f,  (float16_t)0.956940335732209f,
+    (float16_t)0.382683432365090f,  (float16_t)0.923879532511287f,
+    (float16_t)0.471396736825998f,  (float16_t)0.881921264348355f,
+    (float16_t)0.555570233019602f,  (float16_t)0.831469612302545f,
+    (float16_t)0.634393284163645f,  (float16_t)0.773010453362737f,
+    (float16_t)0.707106781186547f,  (float16_t)0.707106781186548f,
+    (float16_t)0.773010453362737f,  (float16_t)0.634393284163645f,
+    (float16_t)0.831469612302545f,  (float16_t)0.555570233019602f,
+    (float16_t)0.881921264348355f,  (float16_t)0.471396736825998f,
+    (float16_t)0.923879532511287f,  (float16_t)0.382683432365090f,
+    (float16_t)0.956940335732209f,  (float16_t)0.290284677254462f,
+    (float16_t)0.980785280403230f,  (float16_t)0.195090322016128f,
+    (float16_t)0.995184726672197f,  (float16_t)0.098017140329561f,
+    (float16_t)1.000000000000000f,  (float16_t)0.000000000000000f,
+    (float16_t)0.995184726672197f, (float16_t)-0.098017140329561f,
+    (float16_t)0.980785280403230f, (float16_t)-0.195090322016128f,
+    (float16_t)0.956940335732209f, (float16_t)-0.290284677254462f,
+    (float16_t)0.923879532511287f, (float16_t)-0.382683432365090f,
+    (float16_t)0.881921264348355f, (float16_t)-0.471396736825998f,
+    (float16_t)0.831469612302545f, (float16_t)-0.555570233019602f,
+    (float16_t)0.773010453362737f, (float16_t)-0.634393284163645f,
+    (float16_t)0.707106781186548f, (float16_t)-0.707106781186547f,
+    (float16_t)0.634393284163645f, (float16_t)-0.773010453362737f,
+    (float16_t)0.555570233019602f, (float16_t)-0.831469612302545f,
+    (float16_t)0.471396736825998f, (float16_t)-0.881921264348355f,
+    (float16_t)0.382683432365090f, (float16_t)-0.923879532511287f,
+    (float16_t)0.290284677254462f, (float16_t)-0.956940335732209f,
+    (float16_t)0.195090322016129f, (float16_t)-0.980785280403230f,
+    (float16_t)0.098017140329561f, (float16_t)-0.995184726672197f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128)
+const float16_t twiddleCoefF16_rfft_128[128] = {
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256)
+const float16_t twiddleCoefF16_rfft_256[256] = {
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512)
+const float16_t twiddleCoefF16_rfft_512[512] = {
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024)
+const float16_t twiddleCoefF16_rfft_1024[1024] = {
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+    (float16_t)0.006135885f,  (float16_t)0.999981175f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.018406730f,  (float16_t)0.999830582f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.030674803f,  (float16_t)0.999529418f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.042938257f,  (float16_t)0.999077728f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.055195244f,  (float16_t)0.998475581f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.067443920f,  (float16_t)0.997723067f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.079682438f,  (float16_t)0.996820299f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.091908956f,  (float16_t)0.995767414f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.104121634f,  (float16_t)0.994564571f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.116318631f,  (float16_t)0.993211949f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.128498111f,  (float16_t)0.991709754f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.140658239f,  (float16_t)0.990058210f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.152797185f,  (float16_t)0.988257568f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.164913120f,  (float16_t)0.986308097f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.177004220f,  (float16_t)0.984210092f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.189068664f,  (float16_t)0.981963869f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.201104635f,  (float16_t)0.979569766f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.213110320f,  (float16_t)0.977028143f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.225083911f,  (float16_t)0.974339383f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.237023606f,  (float16_t)0.971503891f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.248927606f,  (float16_t)0.968522094f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.260794118f,  (float16_t)0.965394442f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.272621355f,  (float16_t)0.962121404f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.284407537f,  (float16_t)0.958703475f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.296150888f,  (float16_t)0.955141168f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.307849640f,  (float16_t)0.951435021f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.319502031f,  (float16_t)0.947585591f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.331106306f,  (float16_t)0.943593458f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.342660717f,  (float16_t)0.939459224f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.354163525f,  (float16_t)0.935183510f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.365612998f,  (float16_t)0.930766961f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.377007410f,  (float16_t)0.926210242f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.388345047f,  (float16_t)0.921514039f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.399624200f,  (float16_t)0.916679060f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.410843171f,  (float16_t)0.911706032f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.422000271f,  (float16_t)0.906595705f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.433093819f,  (float16_t)0.901348847f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.444122145f,  (float16_t)0.895966250f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.455083587f,  (float16_t)0.890448723f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.465976496f,  (float16_t)0.884797098f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.476799230f,  (float16_t)0.879012226f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.487550160f,  (float16_t)0.873094978f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.498227667f,  (float16_t)0.867046246f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.508830143f,  (float16_t)0.860866939f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.519355990f,  (float16_t)0.854557988f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.529803625f,  (float16_t)0.848120345f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.540171473f,  (float16_t)0.841554977f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.550457973f,  (float16_t)0.834862875f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.560661576f,  (float16_t)0.828045045f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.570780746f,  (float16_t)0.821102515f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.580813958f,  (float16_t)0.814036330f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.590759702f,  (float16_t)0.806847554f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.600616479f,  (float16_t)0.799537269f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.610382806f,  (float16_t)0.792106577f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.620057212f,  (float16_t)0.784556597f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.629638239f,  (float16_t)0.776888466f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.639124445f,  (float16_t)0.769103338f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.648514401f,  (float16_t)0.761202385f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.657806693f,  (float16_t)0.753186799f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.666999922f,  (float16_t)0.745057785f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.676092704f,  (float16_t)0.736816569f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.685083668f,  (float16_t)0.728464390f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.693971461f,  (float16_t)0.720002508f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.702754744f,  (float16_t)0.711432196f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.711432196f,  (float16_t)0.702754744f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.720002508f,  (float16_t)0.693971461f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.728464390f,  (float16_t)0.685083668f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.736816569f,  (float16_t)0.676092704f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.745057785f,  (float16_t)0.666999922f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.753186799f,  (float16_t)0.657806693f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.761202385f,  (float16_t)0.648514401f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.769103338f,  (float16_t)0.639124445f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.776888466f,  (float16_t)0.629638239f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.784556597f,  (float16_t)0.620057212f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.792106577f,  (float16_t)0.610382806f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.799537269f,  (float16_t)0.600616479f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.806847554f,  (float16_t)0.590759702f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.814036330f,  (float16_t)0.580813958f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.821102515f,  (float16_t)0.570780746f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.828045045f,  (float16_t)0.560661576f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.834862875f,  (float16_t)0.550457973f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.841554977f,  (float16_t)0.540171473f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.848120345f,  (float16_t)0.529803625f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.854557988f,  (float16_t)0.519355990f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.860866939f,  (float16_t)0.508830143f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.867046246f,  (float16_t)0.498227667f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.873094978f,  (float16_t)0.487550160f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.879012226f,  (float16_t)0.476799230f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.884797098f,  (float16_t)0.465976496f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.890448723f,  (float16_t)0.455083587f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.895966250f,  (float16_t)0.444122145f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.901348847f,  (float16_t)0.433093819f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.906595705f,  (float16_t)0.422000271f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.911706032f,  (float16_t)0.410843171f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.916679060f,  (float16_t)0.399624200f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.921514039f,  (float16_t)0.388345047f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.926210242f,  (float16_t)0.377007410f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.930766961f,  (float16_t)0.365612998f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.935183510f,  (float16_t)0.354163525f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.939459224f,  (float16_t)0.342660717f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.943593458f,  (float16_t)0.331106306f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.947585591f,  (float16_t)0.319502031f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.951435021f,  (float16_t)0.307849640f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.955141168f,  (float16_t)0.296150888f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.958703475f,  (float16_t)0.284407537f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.962121404f,  (float16_t)0.272621355f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.965394442f,  (float16_t)0.260794118f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.968522094f,  (float16_t)0.248927606f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.971503891f,  (float16_t)0.237023606f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.974339383f,  (float16_t)0.225083911f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.977028143f,  (float16_t)0.213110320f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.979569766f,  (float16_t)0.201104635f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.981963869f,  (float16_t)0.189068664f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.984210092f,  (float16_t)0.177004220f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.986308097f,  (float16_t)0.164913120f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.988257568f,  (float16_t)0.152797185f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.990058210f,  (float16_t)0.140658239f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.991709754f,  (float16_t)0.128498111f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.993211949f,  (float16_t)0.116318631f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.994564571f,  (float16_t)0.104121634f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.995767414f,  (float16_t)0.091908956f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.996820299f,  (float16_t)0.079682438f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.997723067f,  (float16_t)0.067443920f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.998475581f,  (float16_t)0.055195244f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.999077728f,  (float16_t)0.042938257f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.999529418f,  (float16_t)0.030674803f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999830582f,  (float16_t)0.018406730f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)0.999981175f,  (float16_t)0.006135885f,
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999981175f, (float16_t)-0.006135885f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f,
+    (float16_t)0.999830582f, (float16_t)-0.018406730f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999529418f, (float16_t)-0.030674803f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.999077728f, (float16_t)-0.042938257f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.998475581f, (float16_t)-0.055195244f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.997723067f, (float16_t)-0.067443920f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.996820299f, (float16_t)-0.079682438f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.995767414f, (float16_t)-0.091908956f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.994564571f, (float16_t)-0.104121634f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.993211949f, (float16_t)-0.116318631f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.991709754f, (float16_t)-0.128498111f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.990058210f, (float16_t)-0.140658239f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.988257568f, (float16_t)-0.152797185f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.986308097f, (float16_t)-0.164913120f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.984210092f, (float16_t)-0.177004220f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.981963869f, (float16_t)-0.189068664f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.979569766f, (float16_t)-0.201104635f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.977028143f, (float16_t)-0.213110320f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.974339383f, (float16_t)-0.225083911f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.971503891f, (float16_t)-0.237023606f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.968522094f, (float16_t)-0.248927606f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.965394442f, (float16_t)-0.260794118f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.962121404f, (float16_t)-0.272621355f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.958703475f, (float16_t)-0.284407537f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.955141168f, (float16_t)-0.296150888f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.951435021f, (float16_t)-0.307849640f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.947585591f, (float16_t)-0.319502031f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.943593458f, (float16_t)-0.331106306f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.939459224f, (float16_t)-0.342660717f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.935183510f, (float16_t)-0.354163525f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.930766961f, (float16_t)-0.365612998f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.926210242f, (float16_t)-0.377007410f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.921514039f, (float16_t)-0.388345047f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.916679060f, (float16_t)-0.399624200f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.911706032f, (float16_t)-0.410843171f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.906595705f, (float16_t)-0.422000271f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.901348847f, (float16_t)-0.433093819f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.895966250f, (float16_t)-0.444122145f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.890448723f, (float16_t)-0.455083587f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.884797098f, (float16_t)-0.465976496f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.879012226f, (float16_t)-0.476799230f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.873094978f, (float16_t)-0.487550160f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.867046246f, (float16_t)-0.498227667f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.860866939f, (float16_t)-0.508830143f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.854557988f, (float16_t)-0.519355990f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.848120345f, (float16_t)-0.529803625f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.841554977f, (float16_t)-0.540171473f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.834862875f, (float16_t)-0.550457973f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.828045045f, (float16_t)-0.560661576f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.821102515f, (float16_t)-0.570780746f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.814036330f, (float16_t)-0.580813958f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.806847554f, (float16_t)-0.590759702f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.799537269f, (float16_t)-0.600616479f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.792106577f, (float16_t)-0.610382806f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.784556597f, (float16_t)-0.620057212f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.776888466f, (float16_t)-0.629638239f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.769103338f, (float16_t)-0.639124445f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.761202385f, (float16_t)-0.648514401f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.753186799f, (float16_t)-0.657806693f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.745057785f, (float16_t)-0.666999922f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.736816569f, (float16_t)-0.676092704f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.728464390f, (float16_t)-0.685083668f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.720002508f, (float16_t)-0.693971461f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.711432196f, (float16_t)-0.702754744f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.702754744f, (float16_t)-0.711432196f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.693971461f, (float16_t)-0.720002508f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.685083668f, (float16_t)-0.728464390f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.676092704f, (float16_t)-0.736816569f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.666999922f, (float16_t)-0.745057785f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.657806693f, (float16_t)-0.753186799f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.648514401f, (float16_t)-0.761202385f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.639124445f, (float16_t)-0.769103338f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.629638239f, (float16_t)-0.776888466f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.620057212f, (float16_t)-0.784556597f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.610382806f, (float16_t)-0.792106577f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.600616479f, (float16_t)-0.799537269f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.590759702f, (float16_t)-0.806847554f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.580813958f, (float16_t)-0.814036330f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.570780746f, (float16_t)-0.821102515f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.560661576f, (float16_t)-0.828045045f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.550457973f, (float16_t)-0.834862875f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.540171473f, (float16_t)-0.841554977f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.529803625f, (float16_t)-0.848120345f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.519355990f, (float16_t)-0.854557988f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.508830143f, (float16_t)-0.860866939f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.498227667f, (float16_t)-0.867046246f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.487550160f, (float16_t)-0.873094978f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.476799230f, (float16_t)-0.879012226f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.465976496f, (float16_t)-0.884797098f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.455083587f, (float16_t)-0.890448723f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.444122145f, (float16_t)-0.895966250f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.433093819f, (float16_t)-0.901348847f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.422000271f, (float16_t)-0.906595705f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.410843171f, (float16_t)-0.911706032f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.399624200f, (float16_t)-0.916679060f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.388345047f, (float16_t)-0.921514039f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.377007410f, (float16_t)-0.926210242f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.365612998f, (float16_t)-0.930766961f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.354163525f, (float16_t)-0.935183510f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.342660717f, (float16_t)-0.939459224f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.331106306f, (float16_t)-0.943593458f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.319502031f, (float16_t)-0.947585591f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.307849640f, (float16_t)-0.951435021f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.296150888f, (float16_t)-0.955141168f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.284407537f, (float16_t)-0.958703475f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.272621355f, (float16_t)-0.962121404f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.260794118f, (float16_t)-0.965394442f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.248927606f, (float16_t)-0.968522094f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.237023606f, (float16_t)-0.971503891f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.225083911f, (float16_t)-0.974339383f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.213110320f, (float16_t)-0.977028143f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.201104635f, (float16_t)-0.979569766f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.189068664f, (float16_t)-0.981963869f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.177004220f, (float16_t)-0.984210092f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.164913120f, (float16_t)-0.986308097f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.152797185f, (float16_t)-0.988257568f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.140658239f, (float16_t)-0.990058210f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.128498111f, (float16_t)-0.991709754f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.116318631f, (float16_t)-0.993211949f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.104121634f, (float16_t)-0.994564571f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.091908956f, (float16_t)-0.995767414f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.079682438f, (float16_t)-0.996820299f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.067443920f, (float16_t)-0.997723067f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.055195244f, (float16_t)-0.998475581f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.042938257f, (float16_t)-0.999077728f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.030674803f, (float16_t)-0.999529418f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.018406730f, (float16_t)-0.999830582f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f,
+    (float16_t)0.006135885f, (float16_t)-0.999981175f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048)
+const float16_t twiddleCoefF16_rfft_2048[2048] = {
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+    (float16_t)0.003067957f,  (float16_t)0.999995294f,
+    (float16_t)0.006135885f,  (float16_t)0.999981175f,
+    (float16_t)0.009203755f,  (float16_t)0.999957645f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.015339206f,  (float16_t)0.999882347f,
+    (float16_t)0.018406730f,  (float16_t)0.999830582f,
+    (float16_t)0.021474080f,  (float16_t)0.999769405f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.027608146f,  (float16_t)0.999618822f,
+    (float16_t)0.030674803f,  (float16_t)0.999529418f,
+    (float16_t)0.033741172f,  (float16_t)0.999430605f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.039872928f,  (float16_t)0.999204759f,
+    (float16_t)0.042938257f,  (float16_t)0.999077728f,
+    (float16_t)0.046003182f,  (float16_t)0.998941293f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.052131705f,  (float16_t)0.998640218f,
+    (float16_t)0.055195244f,  (float16_t)0.998475581f,
+    (float16_t)0.058258265f,  (float16_t)0.998301545f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.064382631f,  (float16_t)0.997925286f,
+    (float16_t)0.067443920f,  (float16_t)0.997723067f,
+    (float16_t)0.070504573f,  (float16_t)0.997511456f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.076623861f,  (float16_t)0.997060070f,
+    (float16_t)0.079682438f,  (float16_t)0.996820299f,
+    (float16_t)0.082740265f,  (float16_t)0.996571146f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.088853553f,  (float16_t)0.996044701f,
+    (float16_t)0.091908956f,  (float16_t)0.995767414f,
+    (float16_t)0.094963495f,  (float16_t)0.995480755f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.101069863f,  (float16_t)0.994879331f,
+    (float16_t)0.104121634f,  (float16_t)0.994564571f,
+    (float16_t)0.107172425f,  (float16_t)0.994240449f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.113270952f,  (float16_t)0.993564136f,
+    (float16_t)0.116318631f,  (float16_t)0.993211949f,
+    (float16_t)0.119365215f,  (float16_t)0.992850414f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.125454983f,  (float16_t)0.992099313f,
+    (float16_t)0.128498111f,  (float16_t)0.991709754f,
+    (float16_t)0.131540029f,  (float16_t)0.991310860f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.137620122f,  (float16_t)0.990485084f,
+    (float16_t)0.140658239f,  (float16_t)0.990058210f,
+    (float16_t)0.143695033f,  (float16_t)0.989622017f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.149764535f,  (float16_t)0.988721692f,
+    (float16_t)0.152797185f,  (float16_t)0.988257568f,
+    (float16_t)0.155828398f,  (float16_t)0.987784142f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.161886394f,  (float16_t)0.986809402f,
+    (float16_t)0.164913120f,  (float16_t)0.986308097f,
+    (float16_t)0.167938295f,  (float16_t)0.985797509f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.173983873f,  (float16_t)0.984748502f,
+    (float16_t)0.177004220f,  (float16_t)0.984210092f,
+    (float16_t)0.180022901f,  (float16_t)0.983662419f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.186055152f,  (float16_t)0.982539302f,
+    (float16_t)0.189068664f,  (float16_t)0.981963869f,
+    (float16_t)0.192080397f,  (float16_t)0.981379193f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.198098411f,  (float16_t)0.980182136f,
+    (float16_t)0.201104635f,  (float16_t)0.979569766f,
+    (float16_t)0.204108966f,  (float16_t)0.978948175f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.210111837f,  (float16_t)0.977677358f,
+    (float16_t)0.213110320f,  (float16_t)0.977028143f,
+    (float16_t)0.216106797f,  (float16_t)0.976369731f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.222093621f,  (float16_t)0.975025345f,
+    (float16_t)0.225083911f,  (float16_t)0.974339383f,
+    (float16_t)0.228072083f,  (float16_t)0.973644250f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.234041959f,  (float16_t)0.972226497f,
+    (float16_t)0.237023606f,  (float16_t)0.971503891f,
+    (float16_t)0.240003022f,  (float16_t)0.970772141f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.245955050f,  (float16_t)0.969281235f,
+    (float16_t)0.248927606f,  (float16_t)0.968522094f,
+    (float16_t)0.251897818f,  (float16_t)0.967753837f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.257831102f,  (float16_t)0.966190003f,
+    (float16_t)0.260794118f,  (float16_t)0.965394442f,
+    (float16_t)0.263754679f,  (float16_t)0.964589793f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.269668326f,  (float16_t)0.962953267f,
+    (float16_t)0.272621355f,  (float16_t)0.962121404f,
+    (float16_t)0.275571819f,  (float16_t)0.961280486f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.281464938f,  (float16_t)0.959571513f,
+    (float16_t)0.284407537f,  (float16_t)0.958703475f,
+    (float16_t)0.287347460f,  (float16_t)0.957826413f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.293219163f,  (float16_t)0.956045251f,
+    (float16_t)0.296150888f,  (float16_t)0.955141168f,
+    (float16_t)0.299079826f,  (float16_t)0.954228095f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.304929230f,  (float16_t)0.952375013f,
+    (float16_t)0.307849640f,  (float16_t)0.951435021f,
+    (float16_t)0.310767153f,  (float16_t)0.950486074f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.316593376f,  (float16_t)0.948561350f,
+    (float16_t)0.319502031f,  (float16_t)0.947585591f,
+    (float16_t)0.322407679f,  (float16_t)0.946600913f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.328209844f,  (float16_t)0.944604837f,
+    (float16_t)0.331106306f,  (float16_t)0.943593458f,
+    (float16_t)0.333999651f,  (float16_t)0.942573198f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.339776884f,  (float16_t)0.940506071f,
+    (float16_t)0.342660717f,  (float16_t)0.939459224f,
+    (float16_t)0.345541325f,  (float16_t)0.938403534f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.351292756f,  (float16_t)0.936265667f,
+    (float16_t)0.354163525f,  (float16_t)0.935183510f,
+    (float16_t)0.357030961f,  (float16_t)0.934092550f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.362755724f,  (float16_t)0.931884266f,
+    (float16_t)0.365612998f,  (float16_t)0.930766961f,
+    (float16_t)0.368466830f,  (float16_t)0.929640896f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.374164063f,  (float16_t)0.927362526f,
+    (float16_t)0.377007410f,  (float16_t)0.926210242f,
+    (float16_t)0.379847209f,  (float16_t)0.925049241f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.385516054f,  (float16_t)0.922701128f,
+    (float16_t)0.388345047f,  (float16_t)0.921514039f,
+    (float16_t)0.391170384f,  (float16_t)0.920318277f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.396809987f,  (float16_t)0.917900776f,
+    (float16_t)0.399624200f,  (float16_t)0.916679060f,
+    (float16_t)0.402434651f,  (float16_t)0.915448716f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.408044163f,  (float16_t)0.912962190f,
+    (float16_t)0.410843171f,  (float16_t)0.911706032f,
+    (float16_t)0.413638312f,  (float16_t)0.910441292f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.419216888f,  (float16_t)0.907886116f,
+    (float16_t)0.422000271f,  (float16_t)0.906595705f,
+    (float16_t)0.424779681f,  (float16_t)0.905296759f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.430326481f,  (float16_t)0.902673318f,
+    (float16_t)0.433093819f,  (float16_t)0.901348847f,
+    (float16_t)0.435857080f,  (float16_t)0.900015892f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.441371269f,  (float16_t)0.897324581f,
+    (float16_t)0.444122145f,  (float16_t)0.895966250f,
+    (float16_t)0.446868840f,  (float16_t)0.894599486f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.452349587f,  (float16_t)0.891840709f,
+    (float16_t)0.455083587f,  (float16_t)0.890448723f,
+    (float16_t)0.457813304f,  (float16_t)0.889048356f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.463259784f,  (float16_t)0.886222530f,
+    (float16_t)0.465976496f,  (float16_t)0.884797098f,
+    (float16_t)0.468688822f,  (float16_t)0.883363339f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.474100215f,  (float16_t)0.880470889f,
+    (float16_t)0.476799230f,  (float16_t)0.879012226f,
+    (float16_t)0.479493758f,  (float16_t)0.877545290f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.484869248f,  (float16_t)0.874586652f,
+    (float16_t)0.487550160f,  (float16_t)0.873094978f,
+    (float16_t)0.490226483f,  (float16_t)0.871595087f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.495565262f,  (float16_t)0.868570706f,
+    (float16_t)0.498227667f,  (float16_t)0.867046246f,
+    (float16_t)0.500885383f,  (float16_t)0.865513624f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.506186645f,  (float16_t)0.862423956f,
+    (float16_t)0.508830143f,  (float16_t)0.860866939f,
+    (float16_t)0.511468850f,  (float16_t)0.859301818f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.516731799f,  (float16_t)0.856147328f,
+    (float16_t)0.519355990f,  (float16_t)0.854557988f,
+    (float16_t)0.521975293f,  (float16_t)0.852960605f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.527199135f,  (float16_t)0.849741768f,
+    (float16_t)0.529803625f,  (float16_t)0.848120345f,
+    (float16_t)0.532403128f,  (float16_t)0.846490939f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.537587076f,  (float16_t)0.843208240f,
+    (float16_t)0.540171473f,  (float16_t)0.841554977f,
+    (float16_t)0.542750785f,  (float16_t)0.839893794f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.547894059f,  (float16_t)0.836547727f,
+    (float16_t)0.550457973f,  (float16_t)0.834862875f,
+    (float16_t)0.553016706f,  (float16_t)0.833170165f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.558118531f,  (float16_t)0.829761234f,
+    (float16_t)0.560661576f,  (float16_t)0.828045045f,
+    (float16_t)0.563199344f,  (float16_t)0.826321063f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.568258953f,  (float16_t)0.822849781f,
+    (float16_t)0.570780746f,  (float16_t)0.821102515f,
+    (float16_t)0.573297167f,  (float16_t)0.819347520f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.578313796f,  (float16_t)0.815814411f,
+    (float16_t)0.580813958f,  (float16_t)0.814036330f,
+    (float16_t)0.583308653f,  (float16_t)0.812250587f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.588281548f,  (float16_t)0.808656182f,
+    (float16_t)0.590759702f,  (float16_t)0.806847554f,
+    (float16_t)0.593232295f,  (float16_t)0.805031331f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.598160707f,  (float16_t)0.801376172f,
+    (float16_t)0.600616479f,  (float16_t)0.799537269f,
+    (float16_t)0.603066599f,  (float16_t)0.797690841f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.607949785f,  (float16_t)0.793975478f,
+    (float16_t)0.610382806f,  (float16_t)0.792106577f,
+    (float16_t)0.612810082f,  (float16_t)0.790230221f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.617647308f,  (float16_t)0.786455214f,
+    (float16_t)0.620057212f,  (float16_t)0.784556597f,
+    (float16_t)0.622461279f,  (float16_t)0.782650596f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.627251815f,  (float16_t)0.778816512f,
+    (float16_t)0.629638239f,  (float16_t)0.776888466f,
+    (float16_t)0.632018736f,  (float16_t)0.774953107f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.636761861f,  (float16_t)0.771060524f,
+    (float16_t)0.639124445f,  (float16_t)0.769103338f,
+    (float16_t)0.641481013f,  (float16_t)0.767138912f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.646176013f,  (float16_t)0.763188417f,
+    (float16_t)0.648514401f,  (float16_t)0.761202385f,
+    (float16_t)0.650846685f,  (float16_t)0.759209189f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.655492853f,  (float16_t)0.755201377f,
+    (float16_t)0.657806693f,  (float16_t)0.753186799f,
+    (float16_t)0.660114342f,  (float16_t)0.751165132f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.664710978f,  (float16_t)0.747100606f,
+    (float16_t)0.666999922f,  (float16_t)0.745057785f,
+    (float16_t)0.669282588f,  (float16_t)0.743007952f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.673829000f,  (float16_t)0.738887324f,
+    (float16_t)0.676092704f,  (float16_t)0.736816569f,
+    (float16_t)0.678350043f,  (float16_t)0.734738878f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.682845546f,  (float16_t)0.730562769f,
+    (float16_t)0.685083668f,  (float16_t)0.728464390f,
+    (float16_t)0.687315341f,  (float16_t)0.726359155f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.691759258f,  (float16_t)0.722128194f,
+    (float16_t)0.693971461f,  (float16_t)0.720002508f,
+    (float16_t)0.696177131f,  (float16_t)0.717870045f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.700568794f,  (float16_t)0.713584869f,
+    (float16_t)0.702754744f,  (float16_t)0.711432196f,
+    (float16_t)0.704934080f,  (float16_t)0.709272826f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.709272826f,  (float16_t)0.704934080f,
+    (float16_t)0.711432196f,  (float16_t)0.702754744f,
+    (float16_t)0.713584869f,  (float16_t)0.700568794f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.717870045f,  (float16_t)0.696177131f,
+    (float16_t)0.720002508f,  (float16_t)0.693971461f,
+    (float16_t)0.722128194f,  (float16_t)0.691759258f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.726359155f,  (float16_t)0.687315341f,
+    (float16_t)0.728464390f,  (float16_t)0.685083668f,
+    (float16_t)0.730562769f,  (float16_t)0.682845546f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.734738878f,  (float16_t)0.678350043f,
+    (float16_t)0.736816569f,  (float16_t)0.676092704f,
+    (float16_t)0.738887324f,  (float16_t)0.673829000f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.743007952f,  (float16_t)0.669282588f,
+    (float16_t)0.745057785f,  (float16_t)0.666999922f,
+    (float16_t)0.747100606f,  (float16_t)0.664710978f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.751165132f,  (float16_t)0.660114342f,
+    (float16_t)0.753186799f,  (float16_t)0.657806693f,
+    (float16_t)0.755201377f,  (float16_t)0.655492853f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.759209189f,  (float16_t)0.650846685f,
+    (float16_t)0.761202385f,  (float16_t)0.648514401f,
+    (float16_t)0.763188417f,  (float16_t)0.646176013f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.767138912f,  (float16_t)0.641481013f,
+    (float16_t)0.769103338f,  (float16_t)0.639124445f,
+    (float16_t)0.771060524f,  (float16_t)0.636761861f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.774953107f,  (float16_t)0.632018736f,
+    (float16_t)0.776888466f,  (float16_t)0.629638239f,
+    (float16_t)0.778816512f,  (float16_t)0.627251815f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.782650596f,  (float16_t)0.622461279f,
+    (float16_t)0.784556597f,  (float16_t)0.620057212f,
+    (float16_t)0.786455214f,  (float16_t)0.617647308f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.790230221f,  (float16_t)0.612810082f,
+    (float16_t)0.792106577f,  (float16_t)0.610382806f,
+    (float16_t)0.793975478f,  (float16_t)0.607949785f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.797690841f,  (float16_t)0.603066599f,
+    (float16_t)0.799537269f,  (float16_t)0.600616479f,
+    (float16_t)0.801376172f,  (float16_t)0.598160707f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.805031331f,  (float16_t)0.593232295f,
+    (float16_t)0.806847554f,  (float16_t)0.590759702f,
+    (float16_t)0.808656182f,  (float16_t)0.588281548f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.812250587f,  (float16_t)0.583308653f,
+    (float16_t)0.814036330f,  (float16_t)0.580813958f,
+    (float16_t)0.815814411f,  (float16_t)0.578313796f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.819347520f,  (float16_t)0.573297167f,
+    (float16_t)0.821102515f,  (float16_t)0.570780746f,
+    (float16_t)0.822849781f,  (float16_t)0.568258953f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.826321063f,  (float16_t)0.563199344f,
+    (float16_t)0.828045045f,  (float16_t)0.560661576f,
+    (float16_t)0.829761234f,  (float16_t)0.558118531f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.833170165f,  (float16_t)0.553016706f,
+    (float16_t)0.834862875f,  (float16_t)0.550457973f,
+    (float16_t)0.836547727f,  (float16_t)0.547894059f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.839893794f,  (float16_t)0.542750785f,
+    (float16_t)0.841554977f,  (float16_t)0.540171473f,
+    (float16_t)0.843208240f,  (float16_t)0.537587076f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.846490939f,  (float16_t)0.532403128f,
+    (float16_t)0.848120345f,  (float16_t)0.529803625f,
+    (float16_t)0.849741768f,  (float16_t)0.527199135f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.852960605f,  (float16_t)0.521975293f,
+    (float16_t)0.854557988f,  (float16_t)0.519355990f,
+    (float16_t)0.856147328f,  (float16_t)0.516731799f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.859301818f,  (float16_t)0.511468850f,
+    (float16_t)0.860866939f,  (float16_t)0.508830143f,
+    (float16_t)0.862423956f,  (float16_t)0.506186645f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.865513624f,  (float16_t)0.500885383f,
+    (float16_t)0.867046246f,  (float16_t)0.498227667f,
+    (float16_t)0.868570706f,  (float16_t)0.495565262f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.871595087f,  (float16_t)0.490226483f,
+    (float16_t)0.873094978f,  (float16_t)0.487550160f,
+    (float16_t)0.874586652f,  (float16_t)0.484869248f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.877545290f,  (float16_t)0.479493758f,
+    (float16_t)0.879012226f,  (float16_t)0.476799230f,
+    (float16_t)0.880470889f,  (float16_t)0.474100215f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.883363339f,  (float16_t)0.468688822f,
+    (float16_t)0.884797098f,  (float16_t)0.465976496f,
+    (float16_t)0.886222530f,  (float16_t)0.463259784f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.889048356f,  (float16_t)0.457813304f,
+    (float16_t)0.890448723f,  (float16_t)0.455083587f,
+    (float16_t)0.891840709f,  (float16_t)0.452349587f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.894599486f,  (float16_t)0.446868840f,
+    (float16_t)0.895966250f,  (float16_t)0.444122145f,
+    (float16_t)0.897324581f,  (float16_t)0.441371269f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.900015892f,  (float16_t)0.435857080f,
+    (float16_t)0.901348847f,  (float16_t)0.433093819f,
+    (float16_t)0.902673318f,  (float16_t)0.430326481f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.905296759f,  (float16_t)0.424779681f,
+    (float16_t)0.906595705f,  (float16_t)0.422000271f,
+    (float16_t)0.907886116f,  (float16_t)0.419216888f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.910441292f,  (float16_t)0.413638312f,
+    (float16_t)0.911706032f,  (float16_t)0.410843171f,
+    (float16_t)0.912962190f,  (float16_t)0.408044163f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.915448716f,  (float16_t)0.402434651f,
+    (float16_t)0.916679060f,  (float16_t)0.399624200f,
+    (float16_t)0.917900776f,  (float16_t)0.396809987f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.920318277f,  (float16_t)0.391170384f,
+    (float16_t)0.921514039f,  (float16_t)0.388345047f,
+    (float16_t)0.922701128f,  (float16_t)0.385516054f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.925049241f,  (float16_t)0.379847209f,
+    (float16_t)0.926210242f,  (float16_t)0.377007410f,
+    (float16_t)0.927362526f,  (float16_t)0.374164063f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.929640896f,  (float16_t)0.368466830f,
+    (float16_t)0.930766961f,  (float16_t)0.365612998f,
+    (float16_t)0.931884266f,  (float16_t)0.362755724f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.934092550f,  (float16_t)0.357030961f,
+    (float16_t)0.935183510f,  (float16_t)0.354163525f,
+    (float16_t)0.936265667f,  (float16_t)0.351292756f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.938403534f,  (float16_t)0.345541325f,
+    (float16_t)0.939459224f,  (float16_t)0.342660717f,
+    (float16_t)0.940506071f,  (float16_t)0.339776884f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.942573198f,  (float16_t)0.333999651f,
+    (float16_t)0.943593458f,  (float16_t)0.331106306f,
+    (float16_t)0.944604837f,  (float16_t)0.328209844f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.946600913f,  (float16_t)0.322407679f,
+    (float16_t)0.947585591f,  (float16_t)0.319502031f,
+    (float16_t)0.948561350f,  (float16_t)0.316593376f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.950486074f,  (float16_t)0.310767153f,
+    (float16_t)0.951435021f,  (float16_t)0.307849640f,
+    (float16_t)0.952375013f,  (float16_t)0.304929230f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.954228095f,  (float16_t)0.299079826f,
+    (float16_t)0.955141168f,  (float16_t)0.296150888f,
+    (float16_t)0.956045251f,  (float16_t)0.293219163f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.957826413f,  (float16_t)0.287347460f,
+    (float16_t)0.958703475f,  (float16_t)0.284407537f,
+    (float16_t)0.959571513f,  (float16_t)0.281464938f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.961280486f,  (float16_t)0.275571819f,
+    (float16_t)0.962121404f,  (float16_t)0.272621355f,
+    (float16_t)0.962953267f,  (float16_t)0.269668326f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.964589793f,  (float16_t)0.263754679f,
+    (float16_t)0.965394442f,  (float16_t)0.260794118f,
+    (float16_t)0.966190003f,  (float16_t)0.257831102f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.967753837f,  (float16_t)0.251897818f,
+    (float16_t)0.968522094f,  (float16_t)0.248927606f,
+    (float16_t)0.969281235f,  (float16_t)0.245955050f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.970772141f,  (float16_t)0.240003022f,
+    (float16_t)0.971503891f,  (float16_t)0.237023606f,
+    (float16_t)0.972226497f,  (float16_t)0.234041959f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.973644250f,  (float16_t)0.228072083f,
+    (float16_t)0.974339383f,  (float16_t)0.225083911f,
+    (float16_t)0.975025345f,  (float16_t)0.222093621f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.976369731f,  (float16_t)0.216106797f,
+    (float16_t)0.977028143f,  (float16_t)0.213110320f,
+    (float16_t)0.977677358f,  (float16_t)0.210111837f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.978948175f,  (float16_t)0.204108966f,
+    (float16_t)0.979569766f,  (float16_t)0.201104635f,
+    (float16_t)0.980182136f,  (float16_t)0.198098411f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.981379193f,  (float16_t)0.192080397f,
+    (float16_t)0.981963869f,  (float16_t)0.189068664f,
+    (float16_t)0.982539302f,  (float16_t)0.186055152f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.983662419f,  (float16_t)0.180022901f,
+    (float16_t)0.984210092f,  (float16_t)0.177004220f,
+    (float16_t)0.984748502f,  (float16_t)0.173983873f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.985797509f,  (float16_t)0.167938295f,
+    (float16_t)0.986308097f,  (float16_t)0.164913120f,
+    (float16_t)0.986809402f,  (float16_t)0.161886394f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.987784142f,  (float16_t)0.155828398f,
+    (float16_t)0.988257568f,  (float16_t)0.152797185f,
+    (float16_t)0.988721692f,  (float16_t)0.149764535f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.989622017f,  (float16_t)0.143695033f,
+    (float16_t)0.990058210f,  (float16_t)0.140658239f,
+    (float16_t)0.990485084f,  (float16_t)0.137620122f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.991310860f,  (float16_t)0.131540029f,
+    (float16_t)0.991709754f,  (float16_t)0.128498111f,
+    (float16_t)0.992099313f,  (float16_t)0.125454983f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.992850414f,  (float16_t)0.119365215f,
+    (float16_t)0.993211949f,  (float16_t)0.116318631f,
+    (float16_t)0.993564136f,  (float16_t)0.113270952f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.994240449f,  (float16_t)0.107172425f,
+    (float16_t)0.994564571f,  (float16_t)0.104121634f,
+    (float16_t)0.994879331f,  (float16_t)0.101069863f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.995480755f,  (float16_t)0.094963495f,
+    (float16_t)0.995767414f,  (float16_t)0.091908956f,
+    (float16_t)0.996044701f,  (float16_t)0.088853553f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.996571146f,  (float16_t)0.082740265f,
+    (float16_t)0.996820299f,  (float16_t)0.079682438f,
+    (float16_t)0.997060070f,  (float16_t)0.076623861f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.997511456f,  (float16_t)0.070504573f,
+    (float16_t)0.997723067f,  (float16_t)0.067443920f,
+    (float16_t)0.997925286f,  (float16_t)0.064382631f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.998301545f,  (float16_t)0.058258265f,
+    (float16_t)0.998475581f,  (float16_t)0.055195244f,
+    (float16_t)0.998640218f,  (float16_t)0.052131705f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.998941293f,  (float16_t)0.046003182f,
+    (float16_t)0.999077728f,  (float16_t)0.042938257f,
+    (float16_t)0.999204759f,  (float16_t)0.039872928f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.999430605f,  (float16_t)0.033741172f,
+    (float16_t)0.999529418f,  (float16_t)0.030674803f,
+    (float16_t)0.999618822f,  (float16_t)0.027608146f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999769405f,  (float16_t)0.021474080f,
+    (float16_t)0.999830582f,  (float16_t)0.018406730f,
+    (float16_t)0.999882347f,  (float16_t)0.015339206f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)0.999957645f,  (float16_t)0.009203755f,
+    (float16_t)0.999981175f,  (float16_t)0.006135885f,
+    (float16_t)0.999995294f,  (float16_t)0.003067957f,
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999995294f, (float16_t)-0.003067957f,
+    (float16_t)0.999981175f, (float16_t)-0.006135885f,
+    (float16_t)0.999957645f, (float16_t)-0.009203755f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f,
+    (float16_t)0.999882347f, (float16_t)-0.015339206f,
+    (float16_t)0.999830582f, (float16_t)-0.018406730f,
+    (float16_t)0.999769405f, (float16_t)-0.021474080f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999618822f, (float16_t)-0.027608146f,
+    (float16_t)0.999529418f, (float16_t)-0.030674803f,
+    (float16_t)0.999430605f, (float16_t)-0.033741172f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.999204759f, (float16_t)-0.039872928f,
+    (float16_t)0.999077728f, (float16_t)-0.042938257f,
+    (float16_t)0.998941293f, (float16_t)-0.046003182f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.998640218f, (float16_t)-0.052131705f,
+    (float16_t)0.998475581f, (float16_t)-0.055195244f,
+    (float16_t)0.998301545f, (float16_t)-0.058258265f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.997925286f, (float16_t)-0.064382631f,
+    (float16_t)0.997723067f, (float16_t)-0.067443920f,
+    (float16_t)0.997511456f, (float16_t)-0.070504573f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.997060070f, (float16_t)-0.076623861f,
+    (float16_t)0.996820299f, (float16_t)-0.079682438f,
+    (float16_t)0.996571146f, (float16_t)-0.082740265f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.996044701f, (float16_t)-0.088853553f,
+    (float16_t)0.995767414f, (float16_t)-0.091908956f,
+    (float16_t)0.995480755f, (float16_t)-0.094963495f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.994879331f, (float16_t)-0.101069863f,
+    (float16_t)0.994564571f, (float16_t)-0.104121634f,
+    (float16_t)0.994240449f, (float16_t)-0.107172425f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.993564136f, (float16_t)-0.113270952f,
+    (float16_t)0.993211949f, (float16_t)-0.116318631f,
+    (float16_t)0.992850414f, (float16_t)-0.119365215f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.992099313f, (float16_t)-0.125454983f,
+    (float16_t)0.991709754f, (float16_t)-0.128498111f,
+    (float16_t)0.991310860f, (float16_t)-0.131540029f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.990485084f, (float16_t)-0.137620122f,
+    (float16_t)0.990058210f, (float16_t)-0.140658239f,
+    (float16_t)0.989622017f, (float16_t)-0.143695033f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.988721692f, (float16_t)-0.149764535f,
+    (float16_t)0.988257568f, (float16_t)-0.152797185f,
+    (float16_t)0.987784142f, (float16_t)-0.155828398f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.986809402f, (float16_t)-0.161886394f,
+    (float16_t)0.986308097f, (float16_t)-0.164913120f,
+    (float16_t)0.985797509f, (float16_t)-0.167938295f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.984748502f, (float16_t)-0.173983873f,
+    (float16_t)0.984210092f, (float16_t)-0.177004220f,
+    (float16_t)0.983662419f, (float16_t)-0.180022901f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.982539302f, (float16_t)-0.186055152f,
+    (float16_t)0.981963869f, (float16_t)-0.189068664f,
+    (float16_t)0.981379193f, (float16_t)-0.192080397f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.980182136f, (float16_t)-0.198098411f,
+    (float16_t)0.979569766f, (float16_t)-0.201104635f,
+    (float16_t)0.978948175f, (float16_t)-0.204108966f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.977677358f, (float16_t)-0.210111837f,
+    (float16_t)0.977028143f, (float16_t)-0.213110320f,
+    (float16_t)0.976369731f, (float16_t)-0.216106797f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.975025345f, (float16_t)-0.222093621f,
+    (float16_t)0.974339383f, (float16_t)-0.225083911f,
+    (float16_t)0.973644250f, (float16_t)-0.228072083f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.972226497f, (float16_t)-0.234041959f,
+    (float16_t)0.971503891f, (float16_t)-0.237023606f,
+    (float16_t)0.970772141f, (float16_t)-0.240003022f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.969281235f, (float16_t)-0.245955050f,
+    (float16_t)0.968522094f, (float16_t)-0.248927606f,
+    (float16_t)0.967753837f, (float16_t)-0.251897818f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.966190003f, (float16_t)-0.257831102f,
+    (float16_t)0.965394442f, (float16_t)-0.260794118f,
+    (float16_t)0.964589793f, (float16_t)-0.263754679f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.962953267f, (float16_t)-0.269668326f,
+    (float16_t)0.962121404f, (float16_t)-0.272621355f,
+    (float16_t)0.961280486f, (float16_t)-0.275571819f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.959571513f, (float16_t)-0.281464938f,
+    (float16_t)0.958703475f, (float16_t)-0.284407537f,
+    (float16_t)0.957826413f, (float16_t)-0.287347460f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.956045251f, (float16_t)-0.293219163f,
+    (float16_t)0.955141168f, (float16_t)-0.296150888f,
+    (float16_t)0.954228095f, (float16_t)-0.299079826f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.952375013f, (float16_t)-0.304929230f,
+    (float16_t)0.951435021f, (float16_t)-0.307849640f,
+    (float16_t)0.950486074f, (float16_t)-0.310767153f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.948561350f, (float16_t)-0.316593376f,
+    (float16_t)0.947585591f, (float16_t)-0.319502031f,
+    (float16_t)0.946600913f, (float16_t)-0.322407679f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.944604837f, (float16_t)-0.328209844f,
+    (float16_t)0.943593458f, (float16_t)-0.331106306f,
+    (float16_t)0.942573198f, (float16_t)-0.333999651f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.940506071f, (float16_t)-0.339776884f,
+    (float16_t)0.939459224f, (float16_t)-0.342660717f,
+    (float16_t)0.938403534f, (float16_t)-0.345541325f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.936265667f, (float16_t)-0.351292756f,
+    (float16_t)0.935183510f, (float16_t)-0.354163525f,
+    (float16_t)0.934092550f, (float16_t)-0.357030961f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.931884266f, (float16_t)-0.362755724f,
+    (float16_t)0.930766961f, (float16_t)-0.365612998f,
+    (float16_t)0.929640896f, (float16_t)-0.368466830f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.927362526f, (float16_t)-0.374164063f,
+    (float16_t)0.926210242f, (float16_t)-0.377007410f,
+    (float16_t)0.925049241f, (float16_t)-0.379847209f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.922701128f, (float16_t)-0.385516054f,
+    (float16_t)0.921514039f, (float16_t)-0.388345047f,
+    (float16_t)0.920318277f, (float16_t)-0.391170384f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.917900776f, (float16_t)-0.396809987f,
+    (float16_t)0.916679060f, (float16_t)-0.399624200f,
+    (float16_t)0.915448716f, (float16_t)-0.402434651f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.912962190f, (float16_t)-0.408044163f,
+    (float16_t)0.911706032f, (float16_t)-0.410843171f,
+    (float16_t)0.910441292f, (float16_t)-0.413638312f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.907886116f, (float16_t)-0.419216888f,
+    (float16_t)0.906595705f, (float16_t)-0.422000271f,
+    (float16_t)0.905296759f, (float16_t)-0.424779681f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.902673318f, (float16_t)-0.430326481f,
+    (float16_t)0.901348847f, (float16_t)-0.433093819f,
+    (float16_t)0.900015892f, (float16_t)-0.435857080f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.897324581f, (float16_t)-0.441371269f,
+    (float16_t)0.895966250f, (float16_t)-0.444122145f,
+    (float16_t)0.894599486f, (float16_t)-0.446868840f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.891840709f, (float16_t)-0.452349587f,
+    (float16_t)0.890448723f, (float16_t)-0.455083587f,
+    (float16_t)0.889048356f, (float16_t)-0.457813304f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.886222530f, (float16_t)-0.463259784f,
+    (float16_t)0.884797098f, (float16_t)-0.465976496f,
+    (float16_t)0.883363339f, (float16_t)-0.468688822f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.880470889f, (float16_t)-0.474100215f,
+    (float16_t)0.879012226f, (float16_t)-0.476799230f,
+    (float16_t)0.877545290f, (float16_t)-0.479493758f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.874586652f, (float16_t)-0.484869248f,
+    (float16_t)0.873094978f, (float16_t)-0.487550160f,
+    (float16_t)0.871595087f, (float16_t)-0.490226483f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.868570706f, (float16_t)-0.495565262f,
+    (float16_t)0.867046246f, (float16_t)-0.498227667f,
+    (float16_t)0.865513624f, (float16_t)-0.500885383f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.862423956f, (float16_t)-0.506186645f,
+    (float16_t)0.860866939f, (float16_t)-0.508830143f,
+    (float16_t)0.859301818f, (float16_t)-0.511468850f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.856147328f, (float16_t)-0.516731799f,
+    (float16_t)0.854557988f, (float16_t)-0.519355990f,
+    (float16_t)0.852960605f, (float16_t)-0.521975293f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.849741768f, (float16_t)-0.527199135f,
+    (float16_t)0.848120345f, (float16_t)-0.529803625f,
+    (float16_t)0.846490939f, (float16_t)-0.532403128f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.843208240f, (float16_t)-0.537587076f,
+    (float16_t)0.841554977f, (float16_t)-0.540171473f,
+    (float16_t)0.839893794f, (float16_t)-0.542750785f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.836547727f, (float16_t)-0.547894059f,
+    (float16_t)0.834862875f, (float16_t)-0.550457973f,
+    (float16_t)0.833170165f, (float16_t)-0.553016706f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.829761234f, (float16_t)-0.558118531f,
+    (float16_t)0.828045045f, (float16_t)-0.560661576f,
+    (float16_t)0.826321063f, (float16_t)-0.563199344f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.822849781f, (float16_t)-0.568258953f,
+    (float16_t)0.821102515f, (float16_t)-0.570780746f,
+    (float16_t)0.819347520f, (float16_t)-0.573297167f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.815814411f, (float16_t)-0.578313796f,
+    (float16_t)0.814036330f, (float16_t)-0.580813958f,
+    (float16_t)0.812250587f, (float16_t)-0.583308653f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.808656182f, (float16_t)-0.588281548f,
+    (float16_t)0.806847554f, (float16_t)-0.590759702f,
+    (float16_t)0.805031331f, (float16_t)-0.593232295f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.801376172f, (float16_t)-0.598160707f,
+    (float16_t)0.799537269f, (float16_t)-0.600616479f,
+    (float16_t)0.797690841f, (float16_t)-0.603066599f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.793975478f, (float16_t)-0.607949785f,
+    (float16_t)0.792106577f, (float16_t)-0.610382806f,
+    (float16_t)0.790230221f, (float16_t)-0.612810082f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.786455214f, (float16_t)-0.617647308f,
+    (float16_t)0.784556597f, (float16_t)-0.620057212f,
+    (float16_t)0.782650596f, (float16_t)-0.622461279f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.778816512f, (float16_t)-0.627251815f,
+    (float16_t)0.776888466f, (float16_t)-0.629638239f,
+    (float16_t)0.774953107f, (float16_t)-0.632018736f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.771060524f, (float16_t)-0.636761861f,
+    (float16_t)0.769103338f, (float16_t)-0.639124445f,
+    (float16_t)0.767138912f, (float16_t)-0.641481013f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.763188417f, (float16_t)-0.646176013f,
+    (float16_t)0.761202385f, (float16_t)-0.648514401f,
+    (float16_t)0.759209189f, (float16_t)-0.650846685f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.755201377f, (float16_t)-0.655492853f,
+    (float16_t)0.753186799f, (float16_t)-0.657806693f,
+    (float16_t)0.751165132f, (float16_t)-0.660114342f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.747100606f, (float16_t)-0.664710978f,
+    (float16_t)0.745057785f, (float16_t)-0.666999922f,
+    (float16_t)0.743007952f, (float16_t)-0.669282588f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.738887324f, (float16_t)-0.673829000f,
+    (float16_t)0.736816569f, (float16_t)-0.676092704f,
+    (float16_t)0.734738878f, (float16_t)-0.678350043f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.730562769f, (float16_t)-0.682845546f,
+    (float16_t)0.728464390f, (float16_t)-0.685083668f,
+    (float16_t)0.726359155f, (float16_t)-0.687315341f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.722128194f, (float16_t)-0.691759258f,
+    (float16_t)0.720002508f, (float16_t)-0.693971461f,
+    (float16_t)0.717870045f, (float16_t)-0.696177131f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.713584869f, (float16_t)-0.700568794f,
+    (float16_t)0.711432196f, (float16_t)-0.702754744f,
+    (float16_t)0.709272826f, (float16_t)-0.704934080f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.704934080f, (float16_t)-0.709272826f,
+    (float16_t)0.702754744f, (float16_t)-0.711432196f,
+    (float16_t)0.700568794f, (float16_t)-0.713584869f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.696177131f, (float16_t)-0.717870045f,
+    (float16_t)0.693971461f, (float16_t)-0.720002508f,
+    (float16_t)0.691759258f, (float16_t)-0.722128194f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.687315341f, (float16_t)-0.726359155f,
+    (float16_t)0.685083668f, (float16_t)-0.728464390f,
+    (float16_t)0.682845546f, (float16_t)-0.730562769f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.678350043f, (float16_t)-0.734738878f,
+    (float16_t)0.676092704f, (float16_t)-0.736816569f,
+    (float16_t)0.673829000f, (float16_t)-0.738887324f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.669282588f, (float16_t)-0.743007952f,
+    (float16_t)0.666999922f, (float16_t)-0.745057785f,
+    (float16_t)0.664710978f, (float16_t)-0.747100606f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.660114342f, (float16_t)-0.751165132f,
+    (float16_t)0.657806693f, (float16_t)-0.753186799f,
+    (float16_t)0.655492853f, (float16_t)-0.755201377f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.650846685f, (float16_t)-0.759209189f,
+    (float16_t)0.648514401f, (float16_t)-0.761202385f,
+    (float16_t)0.646176013f, (float16_t)-0.763188417f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.641481013f, (float16_t)-0.767138912f,
+    (float16_t)0.639124445f, (float16_t)-0.769103338f,
+    (float16_t)0.636761861f, (float16_t)-0.771060524f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.632018736f, (float16_t)-0.774953107f,
+    (float16_t)0.629638239f, (float16_t)-0.776888466f,
+    (float16_t)0.627251815f, (float16_t)-0.778816512f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.622461279f, (float16_t)-0.782650596f,
+    (float16_t)0.620057212f, (float16_t)-0.784556597f,
+    (float16_t)0.617647308f, (float16_t)-0.786455214f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.612810082f, (float16_t)-0.790230221f,
+    (float16_t)0.610382806f, (float16_t)-0.792106577f,
+    (float16_t)0.607949785f, (float16_t)-0.793975478f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.603066599f, (float16_t)-0.797690841f,
+    (float16_t)0.600616479f, (float16_t)-0.799537269f,
+    (float16_t)0.598160707f, (float16_t)-0.801376172f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.593232295f, (float16_t)-0.805031331f,
+    (float16_t)0.590759702f, (float16_t)-0.806847554f,
+    (float16_t)0.588281548f, (float16_t)-0.808656182f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.583308653f, (float16_t)-0.812250587f,
+    (float16_t)0.580813958f, (float16_t)-0.814036330f,
+    (float16_t)0.578313796f, (float16_t)-0.815814411f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.573297167f, (float16_t)-0.819347520f,
+    (float16_t)0.570780746f, (float16_t)-0.821102515f,
+    (float16_t)0.568258953f, (float16_t)-0.822849781f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.563199344f, (float16_t)-0.826321063f,
+    (float16_t)0.560661576f, (float16_t)-0.828045045f,
+    (float16_t)0.558118531f, (float16_t)-0.829761234f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.553016706f, (float16_t)-0.833170165f,
+    (float16_t)0.550457973f, (float16_t)-0.834862875f,
+    (float16_t)0.547894059f, (float16_t)-0.836547727f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.542750785f, (float16_t)-0.839893794f,
+    (float16_t)0.540171473f, (float16_t)-0.841554977f,
+    (float16_t)0.537587076f, (float16_t)-0.843208240f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.532403128f, (float16_t)-0.846490939f,
+    (float16_t)0.529803625f, (float16_t)-0.848120345f,
+    (float16_t)0.527199135f, (float16_t)-0.849741768f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.521975293f, (float16_t)-0.852960605f,
+    (float16_t)0.519355990f, (float16_t)-0.854557988f,
+    (float16_t)0.516731799f, (float16_t)-0.856147328f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.511468850f, (float16_t)-0.859301818f,
+    (float16_t)0.508830143f, (float16_t)-0.860866939f,
+    (float16_t)0.506186645f, (float16_t)-0.862423956f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.500885383f, (float16_t)-0.865513624f,
+    (float16_t)0.498227667f, (float16_t)-0.867046246f,
+    (float16_t)0.495565262f, (float16_t)-0.868570706f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.490226483f, (float16_t)-0.871595087f,
+    (float16_t)0.487550160f, (float16_t)-0.873094978f,
+    (float16_t)0.484869248f, (float16_t)-0.874586652f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.479493758f, (float16_t)-0.877545290f,
+    (float16_t)0.476799230f, (float16_t)-0.879012226f,
+    (float16_t)0.474100215f, (float16_t)-0.880470889f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.468688822f, (float16_t)-0.883363339f,
+    (float16_t)0.465976496f, (float16_t)-0.884797098f,
+    (float16_t)0.463259784f, (float16_t)-0.886222530f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.457813304f, (float16_t)-0.889048356f,
+    (float16_t)0.455083587f, (float16_t)-0.890448723f,
+    (float16_t)0.452349587f, (float16_t)-0.891840709f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.446868840f, (float16_t)-0.894599486f,
+    (float16_t)0.444122145f, (float16_t)-0.895966250f,
+    (float16_t)0.441371269f, (float16_t)-0.897324581f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.435857080f, (float16_t)-0.900015892f,
+    (float16_t)0.433093819f, (float16_t)-0.901348847f,
+    (float16_t)0.430326481f, (float16_t)-0.902673318f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.424779681f, (float16_t)-0.905296759f,
+    (float16_t)0.422000271f, (float16_t)-0.906595705f,
+    (float16_t)0.419216888f, (float16_t)-0.907886116f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.413638312f, (float16_t)-0.910441292f,
+    (float16_t)0.410843171f, (float16_t)-0.911706032f,
+    (float16_t)0.408044163f, (float16_t)-0.912962190f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.402434651f, (float16_t)-0.915448716f,
+    (float16_t)0.399624200f, (float16_t)-0.916679060f,
+    (float16_t)0.396809987f, (float16_t)-0.917900776f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.391170384f, (float16_t)-0.920318277f,
+    (float16_t)0.388345047f, (float16_t)-0.921514039f,
+    (float16_t)0.385516054f, (float16_t)-0.922701128f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.379847209f, (float16_t)-0.925049241f,
+    (float16_t)0.377007410f, (float16_t)-0.926210242f,
+    (float16_t)0.374164063f, (float16_t)-0.927362526f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.368466830f, (float16_t)-0.929640896f,
+    (float16_t)0.365612998f, (float16_t)-0.930766961f,
+    (float16_t)0.362755724f, (float16_t)-0.931884266f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.357030961f, (float16_t)-0.934092550f,
+    (float16_t)0.354163525f, (float16_t)-0.935183510f,
+    (float16_t)0.351292756f, (float16_t)-0.936265667f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.345541325f, (float16_t)-0.938403534f,
+    (float16_t)0.342660717f, (float16_t)-0.939459224f,
+    (float16_t)0.339776884f, (float16_t)-0.940506071f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.333999651f, (float16_t)-0.942573198f,
+    (float16_t)0.331106306f, (float16_t)-0.943593458f,
+    (float16_t)0.328209844f, (float16_t)-0.944604837f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.322407679f, (float16_t)-0.946600913f,
+    (float16_t)0.319502031f, (float16_t)-0.947585591f,
+    (float16_t)0.316593376f, (float16_t)-0.948561350f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.310767153f, (float16_t)-0.950486074f,
+    (float16_t)0.307849640f, (float16_t)-0.951435021f,
+    (float16_t)0.304929230f, (float16_t)-0.952375013f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.299079826f, (float16_t)-0.954228095f,
+    (float16_t)0.296150888f, (float16_t)-0.955141168f,
+    (float16_t)0.293219163f, (float16_t)-0.956045251f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.287347460f, (float16_t)-0.957826413f,
+    (float16_t)0.284407537f, (float16_t)-0.958703475f,
+    (float16_t)0.281464938f, (float16_t)-0.959571513f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.275571819f, (float16_t)-0.961280486f,
+    (float16_t)0.272621355f, (float16_t)-0.962121404f,
+    (float16_t)0.269668326f, (float16_t)-0.962953267f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.263754679f, (float16_t)-0.964589793f,
+    (float16_t)0.260794118f, (float16_t)-0.965394442f,
+    (float16_t)0.257831102f, (float16_t)-0.966190003f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.251897818f, (float16_t)-0.967753837f,
+    (float16_t)0.248927606f, (float16_t)-0.968522094f,
+    (float16_t)0.245955050f, (float16_t)-0.969281235f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.240003022f, (float16_t)-0.970772141f,
+    (float16_t)0.237023606f, (float16_t)-0.971503891f,
+    (float16_t)0.234041959f, (float16_t)-0.972226497f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.228072083f, (float16_t)-0.973644250f,
+    (float16_t)0.225083911f, (float16_t)-0.974339383f,
+    (float16_t)0.222093621f, (float16_t)-0.975025345f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.216106797f, (float16_t)-0.976369731f,
+    (float16_t)0.213110320f, (float16_t)-0.977028143f,
+    (float16_t)0.210111837f, (float16_t)-0.977677358f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.204108966f, (float16_t)-0.978948175f,
+    (float16_t)0.201104635f, (float16_t)-0.979569766f,
+    (float16_t)0.198098411f, (float16_t)-0.980182136f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.192080397f, (float16_t)-0.981379193f,
+    (float16_t)0.189068664f, (float16_t)-0.981963869f,
+    (float16_t)0.186055152f, (float16_t)-0.982539302f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.180022901f, (float16_t)-0.983662419f,
+    (float16_t)0.177004220f, (float16_t)-0.984210092f,
+    (float16_t)0.173983873f, (float16_t)-0.984748502f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.167938295f, (float16_t)-0.985797509f,
+    (float16_t)0.164913120f, (float16_t)-0.986308097f,
+    (float16_t)0.161886394f, (float16_t)-0.986809402f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.155828398f, (float16_t)-0.987784142f,
+    (float16_t)0.152797185f, (float16_t)-0.988257568f,
+    (float16_t)0.149764535f, (float16_t)-0.988721692f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.143695033f, (float16_t)-0.989622017f,
+    (float16_t)0.140658239f, (float16_t)-0.990058210f,
+    (float16_t)0.137620122f, (float16_t)-0.990485084f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.131540029f, (float16_t)-0.991310860f,
+    (float16_t)0.128498111f, (float16_t)-0.991709754f,
+    (float16_t)0.125454983f, (float16_t)-0.992099313f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.119365215f, (float16_t)-0.992850414f,
+    (float16_t)0.116318631f, (float16_t)-0.993211949f,
+    (float16_t)0.113270952f, (float16_t)-0.993564136f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.107172425f, (float16_t)-0.994240449f,
+    (float16_t)0.104121634f, (float16_t)-0.994564571f,
+    (float16_t)0.101069863f, (float16_t)-0.994879331f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.094963495f, (float16_t)-0.995480755f,
+    (float16_t)0.091908956f, (float16_t)-0.995767414f,
+    (float16_t)0.088853553f, (float16_t)-0.996044701f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.082740265f, (float16_t)-0.996571146f,
+    (float16_t)0.079682438f, (float16_t)-0.996820299f,
+    (float16_t)0.076623861f, (float16_t)-0.997060070f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.070504573f, (float16_t)-0.997511456f,
+    (float16_t)0.067443920f, (float16_t)-0.997723067f,
+    (float16_t)0.064382631f, (float16_t)-0.997925286f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.058258265f, (float16_t)-0.998301545f,
+    (float16_t)0.055195244f, (float16_t)-0.998475581f,
+    (float16_t)0.052131705f, (float16_t)-0.998640218f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.046003182f, (float16_t)-0.998941293f,
+    (float16_t)0.042938257f, (float16_t)-0.999077728f,
+    (float16_t)0.039872928f, (float16_t)-0.999204759f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.033741172f, (float16_t)-0.999430605f,
+    (float16_t)0.030674803f, (float16_t)-0.999529418f,
+    (float16_t)0.027608146f, (float16_t)-0.999618822f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.021474080f, (float16_t)-0.999769405f,
+    (float16_t)0.018406730f, (float16_t)-0.999830582f,
+    (float16_t)0.015339206f, (float16_t)-0.999882347f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f,
+    (float16_t)0.009203755f, (float16_t)-0.999957645f,
+    (float16_t)0.006135885f, (float16_t)-0.999981175f,
+    (float16_t)0.003067957f, (float16_t)-0.999995294f
+};
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096)
+const float16_t twiddleCoefF16_rfft_4096[4096] = {
+    (float16_t)0.000000000f,  (float16_t)1.000000000f,
+    (float16_t)0.001533980f,  (float16_t)0.999998823f,
+    (float16_t)0.003067957f,  (float16_t)0.999995294f,
+    (float16_t)0.004601926f,  (float16_t)0.999989411f,
+    (float16_t)0.006135885f,  (float16_t)0.999981175f,
+    (float16_t)0.007669829f,  (float16_t)0.999970586f,
+    (float16_t)0.009203755f,  (float16_t)0.999957645f,
+    (float16_t)0.010737659f,  (float16_t)0.999942350f,
+    (float16_t)0.012271538f,  (float16_t)0.999924702f,
+    (float16_t)0.013805389f,  (float16_t)0.999904701f,
+    (float16_t)0.015339206f,  (float16_t)0.999882347f,
+    (float16_t)0.016872988f,  (float16_t)0.999857641f,
+    (float16_t)0.018406730f,  (float16_t)0.999830582f,
+    (float16_t)0.019940429f,  (float16_t)0.999801170f,
+    (float16_t)0.021474080f,  (float16_t)0.999769405f,
+    (float16_t)0.023007681f,  (float16_t)0.999735288f,
+    (float16_t)0.024541229f,  (float16_t)0.999698819f,
+    (float16_t)0.026074718f,  (float16_t)0.999659997f,
+    (float16_t)0.027608146f,  (float16_t)0.999618822f,
+    (float16_t)0.029141509f,  (float16_t)0.999575296f,
+    (float16_t)0.030674803f,  (float16_t)0.999529418f,
+    (float16_t)0.032208025f,  (float16_t)0.999481187f,
+    (float16_t)0.033741172f,  (float16_t)0.999430605f,
+    (float16_t)0.035274239f,  (float16_t)0.999377670f,
+    (float16_t)0.036807223f,  (float16_t)0.999322385f,
+    (float16_t)0.038340120f,  (float16_t)0.999264747f,
+    (float16_t)0.039872928f,  (float16_t)0.999204759f,
+    (float16_t)0.041405641f,  (float16_t)0.999142419f,
+    (float16_t)0.042938257f,  (float16_t)0.999077728f,
+    (float16_t)0.044470772f,  (float16_t)0.999010686f,
+    (float16_t)0.046003182f,  (float16_t)0.998941293f,
+    (float16_t)0.047535484f,  (float16_t)0.998869550f,
+    (float16_t)0.049067674f,  (float16_t)0.998795456f,
+    (float16_t)0.050599749f,  (float16_t)0.998719012f,
+    (float16_t)0.052131705f,  (float16_t)0.998640218f,
+    (float16_t)0.053663538f,  (float16_t)0.998559074f,
+    (float16_t)0.055195244f,  (float16_t)0.998475581f,
+    (float16_t)0.056726821f,  (float16_t)0.998389737f,
+    (float16_t)0.058258265f,  (float16_t)0.998301545f,
+    (float16_t)0.059789571f,  (float16_t)0.998211003f,
+    (float16_t)0.061320736f,  (float16_t)0.998118113f,
+    (float16_t)0.062851758f,  (float16_t)0.998022874f,
+    (float16_t)0.064382631f,  (float16_t)0.997925286f,
+    (float16_t)0.065913353f,  (float16_t)0.997825350f,
+    (float16_t)0.067443920f,  (float16_t)0.997723067f,
+    (float16_t)0.068974328f,  (float16_t)0.997618435f,
+    (float16_t)0.070504573f,  (float16_t)0.997511456f,
+    (float16_t)0.072034653f,  (float16_t)0.997402130f,
+    (float16_t)0.073564564f,  (float16_t)0.997290457f,
+    (float16_t)0.075094301f,  (float16_t)0.997176437f,
+    (float16_t)0.076623861f,  (float16_t)0.997060070f,
+    (float16_t)0.078153242f,  (float16_t)0.996941358f,
+    (float16_t)0.079682438f,  (float16_t)0.996820299f,
+    (float16_t)0.081211447f,  (float16_t)0.996696895f,
+    (float16_t)0.082740265f,  (float16_t)0.996571146f,
+    (float16_t)0.084268888f,  (float16_t)0.996443051f,
+    (float16_t)0.085797312f,  (float16_t)0.996312612f,
+    (float16_t)0.087325535f,  (float16_t)0.996179829f,
+    (float16_t)0.088853553f,  (float16_t)0.996044701f,
+    (float16_t)0.090381361f,  (float16_t)0.995907229f,
+    (float16_t)0.091908956f,  (float16_t)0.995767414f,
+    (float16_t)0.093436336f,  (float16_t)0.995625256f,
+    (float16_t)0.094963495f,  (float16_t)0.995480755f,
+    (float16_t)0.096490431f,  (float16_t)0.995333912f,
+    (float16_t)0.098017140f,  (float16_t)0.995184727f,
+    (float16_t)0.099543619f,  (float16_t)0.995033199f,
+    (float16_t)0.101069863f,  (float16_t)0.994879331f,
+    (float16_t)0.102595869f,  (float16_t)0.994723121f,
+    (float16_t)0.104121634f,  (float16_t)0.994564571f,
+    (float16_t)0.105647154f,  (float16_t)0.994403680f,
+    (float16_t)0.107172425f,  (float16_t)0.994240449f,
+    (float16_t)0.108697444f,  (float16_t)0.994074879f,
+    (float16_t)0.110222207f,  (float16_t)0.993906970f,
+    (float16_t)0.111746711f,  (float16_t)0.993736722f,
+    (float16_t)0.113270952f,  (float16_t)0.993564136f,
+    (float16_t)0.114794927f,  (float16_t)0.993389211f,
+    (float16_t)0.116318631f,  (float16_t)0.993211949f,
+    (float16_t)0.117842062f,  (float16_t)0.993032350f,
+    (float16_t)0.119365215f,  (float16_t)0.992850414f,
+    (float16_t)0.120888087f,  (float16_t)0.992666142f,
+    (float16_t)0.122410675f,  (float16_t)0.992479535f,
+    (float16_t)0.123932975f,  (float16_t)0.992290591f,
+    (float16_t)0.125454983f,  (float16_t)0.992099313f,
+    (float16_t)0.126976696f,  (float16_t)0.991905700f,
+    (float16_t)0.128498111f,  (float16_t)0.991709754f,
+    (float16_t)0.130019223f,  (float16_t)0.991511473f,
+    (float16_t)0.131540029f,  (float16_t)0.991310860f,
+    (float16_t)0.133060525f,  (float16_t)0.991107914f,
+    (float16_t)0.134580709f,  (float16_t)0.990902635f,
+    (float16_t)0.136100575f,  (float16_t)0.990695025f,
+    (float16_t)0.137620122f,  (float16_t)0.990485084f,
+    (float16_t)0.139139344f,  (float16_t)0.990272812f,
+    (float16_t)0.140658239f,  (float16_t)0.990058210f,
+    (float16_t)0.142176804f,  (float16_t)0.989841278f,
+    (float16_t)0.143695033f,  (float16_t)0.989622017f,
+    (float16_t)0.145212925f,  (float16_t)0.989400428f,
+    (float16_t)0.146730474f,  (float16_t)0.989176510f,
+    (float16_t)0.148247679f,  (float16_t)0.988950265f,
+    (float16_t)0.149764535f,  (float16_t)0.988721692f,
+    (float16_t)0.151281038f,  (float16_t)0.988490793f,
+    (float16_t)0.152797185f,  (float16_t)0.988257568f,
+    (float16_t)0.154312973f,  (float16_t)0.988022017f,
+    (float16_t)0.155828398f,  (float16_t)0.987784142f,
+    (float16_t)0.157343456f,  (float16_t)0.987543942f,
+    (float16_t)0.158858143f,  (float16_t)0.987301418f,
+    (float16_t)0.160372457f,  (float16_t)0.987056571f,
+    (float16_t)0.161886394f,  (float16_t)0.986809402f,
+    (float16_t)0.163399949f,  (float16_t)0.986559910f,
+    (float16_t)0.164913120f,  (float16_t)0.986308097f,
+    (float16_t)0.166425904f,  (float16_t)0.986053963f,
+    (float16_t)0.167938295f,  (float16_t)0.985797509f,
+    (float16_t)0.169450291f,  (float16_t)0.985538735f,
+    (float16_t)0.170961889f,  (float16_t)0.985277642f,
+    (float16_t)0.172473084f,  (float16_t)0.985014231f,
+    (float16_t)0.173983873f,  (float16_t)0.984748502f,
+    (float16_t)0.175494253f,  (float16_t)0.984480455f,
+    (float16_t)0.177004220f,  (float16_t)0.984210092f,
+    (float16_t)0.178513771f,  (float16_t)0.983937413f,
+    (float16_t)0.180022901f,  (float16_t)0.983662419f,
+    (float16_t)0.181531608f,  (float16_t)0.983385110f,
+    (float16_t)0.183039888f,  (float16_t)0.983105487f,
+    (float16_t)0.184547737f,  (float16_t)0.982823551f,
+    (float16_t)0.186055152f,  (float16_t)0.982539302f,
+    (float16_t)0.187562129f,  (float16_t)0.982252741f,
+    (float16_t)0.189068664f,  (float16_t)0.981963869f,
+    (float16_t)0.190574755f,  (float16_t)0.981672686f,
+    (float16_t)0.192080397f,  (float16_t)0.981379193f,
+    (float16_t)0.193585587f,  (float16_t)0.981083391f,
+    (float16_t)0.195090322f,  (float16_t)0.980785280f,
+    (float16_t)0.196594598f,  (float16_t)0.980484862f,
+    (float16_t)0.198098411f,  (float16_t)0.980182136f,
+    (float16_t)0.199601758f,  (float16_t)0.979877104f,
+    (float16_t)0.201104635f,  (float16_t)0.979569766f,
+    (float16_t)0.202607039f,  (float16_t)0.979260123f,
+    (float16_t)0.204108966f,  (float16_t)0.978948175f,
+    (float16_t)0.205610413f,  (float16_t)0.978633924f,
+    (float16_t)0.207111376f,  (float16_t)0.978317371f,
+    (float16_t)0.208611852f,  (float16_t)0.977998515f,
+    (float16_t)0.210111837f,  (float16_t)0.977677358f,
+    (float16_t)0.211611327f,  (float16_t)0.977353900f,
+    (float16_t)0.213110320f,  (float16_t)0.977028143f,
+    (float16_t)0.214608811f,  (float16_t)0.976700086f,
+    (float16_t)0.216106797f,  (float16_t)0.976369731f,
+    (float16_t)0.217604275f,  (float16_t)0.976037079f,
+    (float16_t)0.219101240f,  (float16_t)0.975702130f,
+    (float16_t)0.220597690f,  (float16_t)0.975364885f,
+    (float16_t)0.222093621f,  (float16_t)0.975025345f,
+    (float16_t)0.223589029f,  (float16_t)0.974683511f,
+    (float16_t)0.225083911f,  (float16_t)0.974339383f,
+    (float16_t)0.226578264f,  (float16_t)0.973992962f,
+    (float16_t)0.228072083f,  (float16_t)0.973644250f,
+    (float16_t)0.229565366f,  (float16_t)0.973293246f,
+    (float16_t)0.231058108f,  (float16_t)0.972939952f,
+    (float16_t)0.232550307f,  (float16_t)0.972584369f,
+    (float16_t)0.234041959f,  (float16_t)0.972226497f,
+    (float16_t)0.235533059f,  (float16_t)0.971866337f,
+    (float16_t)0.237023606f,  (float16_t)0.971503891f,
+    (float16_t)0.238513595f,  (float16_t)0.971139158f,
+    (float16_t)0.240003022f,  (float16_t)0.970772141f,
+    (float16_t)0.241491885f,  (float16_t)0.970402839f,
+    (float16_t)0.242980180f,  (float16_t)0.970031253f,
+    (float16_t)0.244467903f,  (float16_t)0.969657385f,
+    (float16_t)0.245955050f,  (float16_t)0.969281235f,
+    (float16_t)0.247441619f,  (float16_t)0.968902805f,
+    (float16_t)0.248927606f,  (float16_t)0.968522094f,
+    (float16_t)0.250413007f,  (float16_t)0.968139105f,
+    (float16_t)0.251897818f,  (float16_t)0.967753837f,
+    (float16_t)0.253382037f,  (float16_t)0.967366292f,
+    (float16_t)0.254865660f,  (float16_t)0.966976471f,
+    (float16_t)0.256348682f,  (float16_t)0.966584374f,
+    (float16_t)0.257831102f,  (float16_t)0.966190003f,
+    (float16_t)0.259312915f,  (float16_t)0.965793359f,
+    (float16_t)0.260794118f,  (float16_t)0.965394442f,
+    (float16_t)0.262274707f,  (float16_t)0.964993253f,
+    (float16_t)0.263754679f,  (float16_t)0.964589793f,
+    (float16_t)0.265234030f,  (float16_t)0.964184064f,
+    (float16_t)0.266712757f,  (float16_t)0.963776066f,
+    (float16_t)0.268190857f,  (float16_t)0.963365800f,
+    (float16_t)0.269668326f,  (float16_t)0.962953267f,
+    (float16_t)0.271145160f,  (float16_t)0.962538468f,
+    (float16_t)0.272621355f,  (float16_t)0.962121404f,
+    (float16_t)0.274096910f,  (float16_t)0.961702077f,
+    (float16_t)0.275571819f,  (float16_t)0.961280486f,
+    (float16_t)0.277046080f,  (float16_t)0.960856633f,
+    (float16_t)0.278519689f,  (float16_t)0.960430519f,
+    (float16_t)0.279992643f,  (float16_t)0.960002146f,
+    (float16_t)0.281464938f,  (float16_t)0.959571513f,
+    (float16_t)0.282936570f,  (float16_t)0.959138622f,
+    (float16_t)0.284407537f,  (float16_t)0.958703475f,
+    (float16_t)0.285877835f,  (float16_t)0.958266071f,
+    (float16_t)0.287347460f,  (float16_t)0.957826413f,
+    (float16_t)0.288816408f,  (float16_t)0.957384501f,
+    (float16_t)0.290284677f,  (float16_t)0.956940336f,
+    (float16_t)0.291752263f,  (float16_t)0.956493919f,
+    (float16_t)0.293219163f,  (float16_t)0.956045251f,
+    (float16_t)0.294685372f,  (float16_t)0.955594334f,
+    (float16_t)0.296150888f,  (float16_t)0.955141168f,
+    (float16_t)0.297615707f,  (float16_t)0.954685755f,
+    (float16_t)0.299079826f,  (float16_t)0.954228095f,
+    (float16_t)0.300543241f,  (float16_t)0.953768190f,
+    (float16_t)0.302005949f,  (float16_t)0.953306040f,
+    (float16_t)0.303467947f,  (float16_t)0.952841648f,
+    (float16_t)0.304929230f,  (float16_t)0.952375013f,
+    (float16_t)0.306389795f,  (float16_t)0.951906137f,
+    (float16_t)0.307849640f,  (float16_t)0.951435021f,
+    (float16_t)0.309308760f,  (float16_t)0.950961666f,
+    (float16_t)0.310767153f,  (float16_t)0.950486074f,
+    (float16_t)0.312224814f,  (float16_t)0.950008245f,
+    (float16_t)0.313681740f,  (float16_t)0.949528181f,
+    (float16_t)0.315137929f,  (float16_t)0.949045882f,
+    (float16_t)0.316593376f,  (float16_t)0.948561350f,
+    (float16_t)0.318048077f,  (float16_t)0.948074586f,
+    (float16_t)0.319502031f,  (float16_t)0.947585591f,
+    (float16_t)0.320955232f,  (float16_t)0.947094366f,
+    (float16_t)0.322407679f,  (float16_t)0.946600913f,
+    (float16_t)0.323859367f,  (float16_t)0.946105232f,
+    (float16_t)0.325310292f,  (float16_t)0.945607325f,
+    (float16_t)0.326760452f,  (float16_t)0.945107193f,
+    (float16_t)0.328209844f,  (float16_t)0.944604837f,
+    (float16_t)0.329658463f,  (float16_t)0.944100258f,
+    (float16_t)0.331106306f,  (float16_t)0.943593458f,
+    (float16_t)0.332553370f,  (float16_t)0.943084437f,
+    (float16_t)0.333999651f,  (float16_t)0.942573198f,
+    (float16_t)0.335445147f,  (float16_t)0.942059740f,
+    (float16_t)0.336889853f,  (float16_t)0.941544065f,
+    (float16_t)0.338333767f,  (float16_t)0.941026175f,
+    (float16_t)0.339776884f,  (float16_t)0.940506071f,
+    (float16_t)0.341219202f,  (float16_t)0.939983753f,
+    (float16_t)0.342660717f,  (float16_t)0.939459224f,
+    (float16_t)0.344101426f,  (float16_t)0.938932484f,
+    (float16_t)0.345541325f,  (float16_t)0.938403534f,
+    (float16_t)0.346980411f,  (float16_t)0.937872376f,
+    (float16_t)0.348418680f,  (float16_t)0.937339012f,
+    (float16_t)0.349856130f,  (float16_t)0.936803442f,
+    (float16_t)0.351292756f,  (float16_t)0.936265667f,
+    (float16_t)0.352728556f,  (float16_t)0.935725689f,
+    (float16_t)0.354163525f,  (float16_t)0.935183510f,
+    (float16_t)0.355597662f,  (float16_t)0.934639130f,
+    (float16_t)0.357030961f,  (float16_t)0.934092550f,
+    (float16_t)0.358463421f,  (float16_t)0.933543773f,
+    (float16_t)0.359895037f,  (float16_t)0.932992799f,
+    (float16_t)0.361325806f,  (float16_t)0.932439629f,
+    (float16_t)0.362755724f,  (float16_t)0.931884266f,
+    (float16_t)0.364184790f,  (float16_t)0.931326709f,
+    (float16_t)0.365612998f,  (float16_t)0.930766961f,
+    (float16_t)0.367040346f,  (float16_t)0.930205023f,
+    (float16_t)0.368466830f,  (float16_t)0.929640896f,
+    (float16_t)0.369892447f,  (float16_t)0.929074581f,
+    (float16_t)0.371317194f,  (float16_t)0.928506080f,
+    (float16_t)0.372741067f,  (float16_t)0.927935395f,
+    (float16_t)0.374164063f,  (float16_t)0.927362526f,
+    (float16_t)0.375586178f,  (float16_t)0.926787474f,
+    (float16_t)0.377007410f,  (float16_t)0.926210242f,
+    (float16_t)0.378427755f,  (float16_t)0.925630831f,
+    (float16_t)0.379847209f,  (float16_t)0.925049241f,
+    (float16_t)0.381265769f,  (float16_t)0.924465474f,
+    (float16_t)0.382683432f,  (float16_t)0.923879533f,
+    (float16_t)0.384100195f,  (float16_t)0.923291417f,
+    (float16_t)0.385516054f,  (float16_t)0.922701128f,
+    (float16_t)0.386931006f,  (float16_t)0.922108669f,
+    (float16_t)0.388345047f,  (float16_t)0.921514039f,
+    (float16_t)0.389758174f,  (float16_t)0.920917242f,
+    (float16_t)0.391170384f,  (float16_t)0.920318277f,
+    (float16_t)0.392581674f,  (float16_t)0.919717146f,
+    (float16_t)0.393992040f,  (float16_t)0.919113852f,
+    (float16_t)0.395401479f,  (float16_t)0.918508394f,
+    (float16_t)0.396809987f,  (float16_t)0.917900776f,
+    (float16_t)0.398217562f,  (float16_t)0.917290997f,
+    (float16_t)0.399624200f,  (float16_t)0.916679060f,
+    (float16_t)0.401029897f,  (float16_t)0.916064966f,
+    (float16_t)0.402434651f,  (float16_t)0.915448716f,
+    (float16_t)0.403838458f,  (float16_t)0.914830312f,
+    (float16_t)0.405241314f,  (float16_t)0.914209756f,
+    (float16_t)0.406643217f,  (float16_t)0.913587048f,
+    (float16_t)0.408044163f,  (float16_t)0.912962190f,
+    (float16_t)0.409444149f,  (float16_t)0.912335185f,
+    (float16_t)0.410843171f,  (float16_t)0.911706032f,
+    (float16_t)0.412241227f,  (float16_t)0.911074734f,
+    (float16_t)0.413638312f,  (float16_t)0.910441292f,
+    (float16_t)0.415034424f,  (float16_t)0.909805708f,
+    (float16_t)0.416429560f,  (float16_t)0.909167983f,
+    (float16_t)0.417823716f,  (float16_t)0.908528119f,
+    (float16_t)0.419216888f,  (float16_t)0.907886116f,
+    (float16_t)0.420609074f,  (float16_t)0.907241978f,
+    (float16_t)0.422000271f,  (float16_t)0.906595705f,
+    (float16_t)0.423390474f,  (float16_t)0.905947298f,
+    (float16_t)0.424779681f,  (float16_t)0.905296759f,
+    (float16_t)0.426167889f,  (float16_t)0.904644091f,
+    (float16_t)0.427555093f,  (float16_t)0.903989293f,
+    (float16_t)0.428941292f,  (float16_t)0.903332368f,
+    (float16_t)0.430326481f,  (float16_t)0.902673318f,
+    (float16_t)0.431710658f,  (float16_t)0.902012144f,
+    (float16_t)0.433093819f,  (float16_t)0.901348847f,
+    (float16_t)0.434475961f,  (float16_t)0.900683429f,
+    (float16_t)0.435857080f,  (float16_t)0.900015892f,
+    (float16_t)0.437237174f,  (float16_t)0.899346237f,
+    (float16_t)0.438616239f,  (float16_t)0.898674466f,
+    (float16_t)0.439994271f,  (float16_t)0.898000580f,
+    (float16_t)0.441371269f,  (float16_t)0.897324581f,
+    (float16_t)0.442747228f,  (float16_t)0.896646470f,
+    (float16_t)0.444122145f,  (float16_t)0.895966250f,
+    (float16_t)0.445496017f,  (float16_t)0.895283921f,
+    (float16_t)0.446868840f,  (float16_t)0.894599486f,
+    (float16_t)0.448240612f,  (float16_t)0.893912945f,
+    (float16_t)0.449611330f,  (float16_t)0.893224301f,
+    (float16_t)0.450980989f,  (float16_t)0.892533555f,
+    (float16_t)0.452349587f,  (float16_t)0.891840709f,
+    (float16_t)0.453717121f,  (float16_t)0.891145765f,
+    (float16_t)0.455083587f,  (float16_t)0.890448723f,
+    (float16_t)0.456448982f,  (float16_t)0.889749586f,
+    (float16_t)0.457813304f,  (float16_t)0.889048356f,
+    (float16_t)0.459176548f,  (float16_t)0.888345033f,
+    (float16_t)0.460538711f,  (float16_t)0.887639620f,
+    (float16_t)0.461899791f,  (float16_t)0.886932119f,
+    (float16_t)0.463259784f,  (float16_t)0.886222530f,
+    (float16_t)0.464618686f,  (float16_t)0.885510856f,
+    (float16_t)0.465976496f,  (float16_t)0.884797098f,
+    (float16_t)0.467333209f,  (float16_t)0.884081259f,
+    (float16_t)0.468688822f,  (float16_t)0.883363339f,
+    (float16_t)0.470043332f,  (float16_t)0.882643340f,
+    (float16_t)0.471396737f,  (float16_t)0.881921264f,
+    (float16_t)0.472749032f,  (float16_t)0.881197113f,
+    (float16_t)0.474100215f,  (float16_t)0.880470889f,
+    (float16_t)0.475450282f,  (float16_t)0.879742593f,
+    (float16_t)0.476799230f,  (float16_t)0.879012226f,
+    (float16_t)0.478147056f,  (float16_t)0.878279792f,
+    (float16_t)0.479493758f,  (float16_t)0.877545290f,
+    (float16_t)0.480839331f,  (float16_t)0.876808724f,
+    (float16_t)0.482183772f,  (float16_t)0.876070094f,
+    (float16_t)0.483527079f,  (float16_t)0.875329403f,
+    (float16_t)0.484869248f,  (float16_t)0.874586652f,
+    (float16_t)0.486210276f,  (float16_t)0.873841843f,
+    (float16_t)0.487550160f,  (float16_t)0.873094978f,
+    (float16_t)0.488888897f,  (float16_t)0.872346059f,
+    (float16_t)0.490226483f,  (float16_t)0.871595087f,
+    (float16_t)0.491562916f,  (float16_t)0.870842063f,
+    (float16_t)0.492898192f,  (float16_t)0.870086991f,
+    (float16_t)0.494232309f,  (float16_t)0.869329871f,
+    (float16_t)0.495565262f,  (float16_t)0.868570706f,
+    (float16_t)0.496897049f,  (float16_t)0.867809497f,
+    (float16_t)0.498227667f,  (float16_t)0.867046246f,
+    (float16_t)0.499557113f,  (float16_t)0.866280954f,
+    (float16_t)0.500885383f,  (float16_t)0.865513624f,
+    (float16_t)0.502212474f,  (float16_t)0.864744258f,
+    (float16_t)0.503538384f,  (float16_t)0.863972856f,
+    (float16_t)0.504863109f,  (float16_t)0.863199422f,
+    (float16_t)0.506186645f,  (float16_t)0.862423956f,
+    (float16_t)0.507508991f,  (float16_t)0.861646461f,
+    (float16_t)0.508830143f,  (float16_t)0.860866939f,
+    (float16_t)0.510150097f,  (float16_t)0.860085390f,
+    (float16_t)0.511468850f,  (float16_t)0.859301818f,
+    (float16_t)0.512786401f,  (float16_t)0.858516224f,
+    (float16_t)0.514102744f,  (float16_t)0.857728610f,
+    (float16_t)0.515417878f,  (float16_t)0.856938977f,
+    (float16_t)0.516731799f,  (float16_t)0.856147328f,
+    (float16_t)0.518044504f,  (float16_t)0.855353665f,
+    (float16_t)0.519355990f,  (float16_t)0.854557988f,
+    (float16_t)0.520666254f,  (float16_t)0.853760301f,
+    (float16_t)0.521975293f,  (float16_t)0.852960605f,
+    (float16_t)0.523283103f,  (float16_t)0.852158902f,
+    (float16_t)0.524589683f,  (float16_t)0.851355193f,
+    (float16_t)0.525895027f,  (float16_t)0.850549481f,
+    (float16_t)0.527199135f,  (float16_t)0.849741768f,
+    (float16_t)0.528502002f,  (float16_t)0.848932055f,
+    (float16_t)0.529803625f,  (float16_t)0.848120345f,
+    (float16_t)0.531104001f,  (float16_t)0.847306639f,
+    (float16_t)0.532403128f,  (float16_t)0.846490939f,
+    (float16_t)0.533701002f,  (float16_t)0.845673247f,
+    (float16_t)0.534997620f,  (float16_t)0.844853565f,
+    (float16_t)0.536292979f,  (float16_t)0.844031895f,
+    (float16_t)0.537587076f,  (float16_t)0.843208240f,
+    (float16_t)0.538879909f,  (float16_t)0.842382600f,
+    (float16_t)0.540171473f,  (float16_t)0.841554977f,
+    (float16_t)0.541461766f,  (float16_t)0.840725375f,
+    (float16_t)0.542750785f,  (float16_t)0.839893794f,
+    (float16_t)0.544038527f,  (float16_t)0.839060237f,
+    (float16_t)0.545324988f,  (float16_t)0.838224706f,
+    (float16_t)0.546610167f,  (float16_t)0.837387202f,
+    (float16_t)0.547894059f,  (float16_t)0.836547727f,
+    (float16_t)0.549176662f,  (float16_t)0.835706284f,
+    (float16_t)0.550457973f,  (float16_t)0.834862875f,
+    (float16_t)0.551737988f,  (float16_t)0.834017501f,
+    (float16_t)0.553016706f,  (float16_t)0.833170165f,
+    (float16_t)0.554294121f,  (float16_t)0.832320868f,
+    (float16_t)0.555570233f,  (float16_t)0.831469612f,
+    (float16_t)0.556845037f,  (float16_t)0.830616400f,
+    (float16_t)0.558118531f,  (float16_t)0.829761234f,
+    (float16_t)0.559390712f,  (float16_t)0.828904115f,
+    (float16_t)0.560661576f,  (float16_t)0.828045045f,
+    (float16_t)0.561931121f,  (float16_t)0.827184027f,
+    (float16_t)0.563199344f,  (float16_t)0.826321063f,
+    (float16_t)0.564466242f,  (float16_t)0.825456154f,
+    (float16_t)0.565731811f,  (float16_t)0.824589303f,
+    (float16_t)0.566996049f,  (float16_t)0.823720511f,
+    (float16_t)0.568258953f,  (float16_t)0.822849781f,
+    (float16_t)0.569520519f,  (float16_t)0.821977115f,
+    (float16_t)0.570780746f,  (float16_t)0.821102515f,
+    (float16_t)0.572039629f,  (float16_t)0.820225983f,
+    (float16_t)0.573297167f,  (float16_t)0.819347520f,
+    (float16_t)0.574553355f,  (float16_t)0.818467130f,
+    (float16_t)0.575808191f,  (float16_t)0.817584813f,
+    (float16_t)0.577061673f,  (float16_t)0.816700573f,
+    (float16_t)0.578313796f,  (float16_t)0.815814411f,
+    (float16_t)0.579564559f,  (float16_t)0.814926329f,
+    (float16_t)0.580813958f,  (float16_t)0.814036330f,
+    (float16_t)0.582061990f,  (float16_t)0.813144415f,
+    (float16_t)0.583308653f,  (float16_t)0.812250587f,
+    (float16_t)0.584553943f,  (float16_t)0.811354847f,
+    (float16_t)0.585797857f,  (float16_t)0.810457198f,
+    (float16_t)0.587040394f,  (float16_t)0.809557642f,
+    (float16_t)0.588281548f,  (float16_t)0.808656182f,
+    (float16_t)0.589521319f,  (float16_t)0.807752818f,
+    (float16_t)0.590759702f,  (float16_t)0.806847554f,
+    (float16_t)0.591996695f,  (float16_t)0.805940391f,
+    (float16_t)0.593232295f,  (float16_t)0.805031331f,
+    (float16_t)0.594466499f,  (float16_t)0.804120377f,
+    (float16_t)0.595699304f,  (float16_t)0.803207531f,
+    (float16_t)0.596930708f,  (float16_t)0.802292796f,
+    (float16_t)0.598160707f,  (float16_t)0.801376172f,
+    (float16_t)0.599389298f,  (float16_t)0.800457662f,
+    (float16_t)0.600616479f,  (float16_t)0.799537269f,
+    (float16_t)0.601842247f,  (float16_t)0.798614995f,
+    (float16_t)0.603066599f,  (float16_t)0.797690841f,
+    (float16_t)0.604289531f,  (float16_t)0.796764810f,
+    (float16_t)0.605511041f,  (float16_t)0.795836905f,
+    (float16_t)0.606731127f,  (float16_t)0.794907126f,
+    (float16_t)0.607949785f,  (float16_t)0.793975478f,
+    (float16_t)0.609167012f,  (float16_t)0.793041960f,
+    (float16_t)0.610382806f,  (float16_t)0.792106577f,
+    (float16_t)0.611597164f,  (float16_t)0.791169330f,
+    (float16_t)0.612810082f,  (float16_t)0.790230221f,
+    (float16_t)0.614021559f,  (float16_t)0.789289253f,
+    (float16_t)0.615231591f,  (float16_t)0.788346428f,
+    (float16_t)0.616440175f,  (float16_t)0.787401747f,
+    (float16_t)0.617647308f,  (float16_t)0.786455214f,
+    (float16_t)0.618852988f,  (float16_t)0.785506830f,
+    (float16_t)0.620057212f,  (float16_t)0.784556597f,
+    (float16_t)0.621259977f,  (float16_t)0.783604519f,
+    (float16_t)0.622461279f,  (float16_t)0.782650596f,
+    (float16_t)0.623661118f,  (float16_t)0.781694832f,
+    (float16_t)0.624859488f,  (float16_t)0.780737229f,
+    (float16_t)0.626056388f,  (float16_t)0.779777788f,
+    (float16_t)0.627251815f,  (float16_t)0.778816512f,
+    (float16_t)0.628445767f,  (float16_t)0.777853404f,
+    (float16_t)0.629638239f,  (float16_t)0.776888466f,
+    (float16_t)0.630829230f,  (float16_t)0.775921699f,
+    (float16_t)0.632018736f,  (float16_t)0.774953107f,
+    (float16_t)0.633206755f,  (float16_t)0.773982691f,
+    (float16_t)0.634393284f,  (float16_t)0.773010453f,
+    (float16_t)0.635578320f,  (float16_t)0.772036397f,
+    (float16_t)0.636761861f,  (float16_t)0.771060524f,
+    (float16_t)0.637943904f,  (float16_t)0.770082837f,
+    (float16_t)0.639124445f,  (float16_t)0.769103338f,
+    (float16_t)0.640303482f,  (float16_t)0.768122029f,
+    (float16_t)0.641481013f,  (float16_t)0.767138912f,
+    (float16_t)0.642657034f,  (float16_t)0.766153990f,
+    (float16_t)0.643831543f,  (float16_t)0.765167266f,
+    (float16_t)0.645004537f,  (float16_t)0.764178741f,
+    (float16_t)0.646176013f,  (float16_t)0.763188417f,
+    (float16_t)0.647345969f,  (float16_t)0.762196298f,
+    (float16_t)0.648514401f,  (float16_t)0.761202385f,
+    (float16_t)0.649681307f,  (float16_t)0.760206682f,
+    (float16_t)0.650846685f,  (float16_t)0.759209189f,
+    (float16_t)0.652010531f,  (float16_t)0.758209910f,
+    (float16_t)0.653172843f,  (float16_t)0.757208847f,
+    (float16_t)0.654333618f,  (float16_t)0.756206001f,
+    (float16_t)0.655492853f,  (float16_t)0.755201377f,
+    (float16_t)0.656650546f,  (float16_t)0.754194975f,
+    (float16_t)0.657806693f,  (float16_t)0.753186799f,
+    (float16_t)0.658961293f,  (float16_t)0.752176850f,
+    (float16_t)0.660114342f,  (float16_t)0.751165132f,
+    (float16_t)0.661265838f,  (float16_t)0.750151646f,
+    (float16_t)0.662415778f,  (float16_t)0.749136395f,
+    (float16_t)0.663564159f,  (float16_t)0.748119380f,
+    (float16_t)0.664710978f,  (float16_t)0.747100606f,
+    (float16_t)0.665856234f,  (float16_t)0.746080074f,
+    (float16_t)0.666999922f,  (float16_t)0.745057785f,
+    (float16_t)0.668142041f,  (float16_t)0.744033744f,
+    (float16_t)0.669282588f,  (float16_t)0.743007952f,
+    (float16_t)0.670421560f,  (float16_t)0.741980412f,
+    (float16_t)0.671558955f,  (float16_t)0.740951125f,
+    (float16_t)0.672694769f,  (float16_t)0.739920095f,
+    (float16_t)0.673829000f,  (float16_t)0.738887324f,
+    (float16_t)0.674961646f,  (float16_t)0.737852815f,
+    (float16_t)0.676092704f,  (float16_t)0.736816569f,
+    (float16_t)0.677222170f,  (float16_t)0.735778589f,
+    (float16_t)0.678350043f,  (float16_t)0.734738878f,
+    (float16_t)0.679476320f,  (float16_t)0.733697438f,
+    (float16_t)0.680600998f,  (float16_t)0.732654272f,
+    (float16_t)0.681724074f,  (float16_t)0.731609381f,
+    (float16_t)0.682845546f,  (float16_t)0.730562769f,
+    (float16_t)0.683965412f,  (float16_t)0.729514438f,
+    (float16_t)0.685083668f,  (float16_t)0.728464390f,
+    (float16_t)0.686200312f,  (float16_t)0.727412629f,
+    (float16_t)0.687315341f,  (float16_t)0.726359155f,
+    (float16_t)0.688428753f,  (float16_t)0.725303972f,
+    (float16_t)0.689540545f,  (float16_t)0.724247083f,
+    (float16_t)0.690650714f,  (float16_t)0.723188489f,
+    (float16_t)0.691759258f,  (float16_t)0.722128194f,
+    (float16_t)0.692866175f,  (float16_t)0.721066199f,
+    (float16_t)0.693971461f,  (float16_t)0.720002508f,
+    (float16_t)0.695075114f,  (float16_t)0.718937122f,
+    (float16_t)0.696177131f,  (float16_t)0.717870045f,
+    (float16_t)0.697277511f,  (float16_t)0.716801279f,
+    (float16_t)0.698376249f,  (float16_t)0.715730825f,
+    (float16_t)0.699473345f,  (float16_t)0.714658688f,
+    (float16_t)0.700568794f,  (float16_t)0.713584869f,
+    (float16_t)0.701662595f,  (float16_t)0.712509371f,
+    (float16_t)0.702754744f,  (float16_t)0.711432196f,
+    (float16_t)0.703845241f,  (float16_t)0.710353347f,
+    (float16_t)0.704934080f,  (float16_t)0.709272826f,
+    (float16_t)0.706021261f,  (float16_t)0.708190637f,
+    (float16_t)0.707106781f,  (float16_t)0.707106781f,
+    (float16_t)0.708190637f,  (float16_t)0.706021261f,
+    (float16_t)0.709272826f,  (float16_t)0.704934080f,
+    (float16_t)0.710353347f,  (float16_t)0.703845241f,
+    (float16_t)0.711432196f,  (float16_t)0.702754744f,
+    (float16_t)0.712509371f,  (float16_t)0.701662595f,
+    (float16_t)0.713584869f,  (float16_t)0.700568794f,
+    (float16_t)0.714658688f,  (float16_t)0.699473345f,
+    (float16_t)0.715730825f,  (float16_t)0.698376249f,
+    (float16_t)0.716801279f,  (float16_t)0.697277511f,
+    (float16_t)0.717870045f,  (float16_t)0.696177131f,
+    (float16_t)0.718937122f,  (float16_t)0.695075114f,
+    (float16_t)0.720002508f,  (float16_t)0.693971461f,
+    (float16_t)0.721066199f,  (float16_t)0.692866175f,
+    (float16_t)0.722128194f,  (float16_t)0.691759258f,
+    (float16_t)0.723188489f,  (float16_t)0.690650714f,
+    (float16_t)0.724247083f,  (float16_t)0.689540545f,
+    (float16_t)0.725303972f,  (float16_t)0.688428753f,
+    (float16_t)0.726359155f,  (float16_t)0.687315341f,
+    (float16_t)0.727412629f,  (float16_t)0.686200312f,
+    (float16_t)0.728464390f,  (float16_t)0.685083668f,
+    (float16_t)0.729514438f,  (float16_t)0.683965412f,
+    (float16_t)0.730562769f,  (float16_t)0.682845546f,
+    (float16_t)0.731609381f,  (float16_t)0.681724074f,
+    (float16_t)0.732654272f,  (float16_t)0.680600998f,
+    (float16_t)0.733697438f,  (float16_t)0.679476320f,
+    (float16_t)0.734738878f,  (float16_t)0.678350043f,
+    (float16_t)0.735778589f,  (float16_t)0.677222170f,
+    (float16_t)0.736816569f,  (float16_t)0.676092704f,
+    (float16_t)0.737852815f,  (float16_t)0.674961646f,
+    (float16_t)0.738887324f,  (float16_t)0.673829000f,
+    (float16_t)0.739920095f,  (float16_t)0.672694769f,
+    (float16_t)0.740951125f,  (float16_t)0.671558955f,
+    (float16_t)0.741980412f,  (float16_t)0.670421560f,
+    (float16_t)0.743007952f,  (float16_t)0.669282588f,
+    (float16_t)0.744033744f,  (float16_t)0.668142041f,
+    (float16_t)0.745057785f,  (float16_t)0.666999922f,
+    (float16_t)0.746080074f,  (float16_t)0.665856234f,
+    (float16_t)0.747100606f,  (float16_t)0.664710978f,
+    (float16_t)0.748119380f,  (float16_t)0.663564159f,
+    (float16_t)0.749136395f,  (float16_t)0.662415778f,
+    (float16_t)0.750151646f,  (float16_t)0.661265838f,
+    (float16_t)0.751165132f,  (float16_t)0.660114342f,
+    (float16_t)0.752176850f,  (float16_t)0.658961293f,
+    (float16_t)0.753186799f,  (float16_t)0.657806693f,
+    (float16_t)0.754194975f,  (float16_t)0.656650546f,
+    (float16_t)0.755201377f,  (float16_t)0.655492853f,
+    (float16_t)0.756206001f,  (float16_t)0.654333618f,
+    (float16_t)0.757208847f,  (float16_t)0.653172843f,
+    (float16_t)0.758209910f,  (float16_t)0.652010531f,
+    (float16_t)0.759209189f,  (float16_t)0.650846685f,
+    (float16_t)0.760206682f,  (float16_t)0.649681307f,
+    (float16_t)0.761202385f,  (float16_t)0.648514401f,
+    (float16_t)0.762196298f,  (float16_t)0.647345969f,
+    (float16_t)0.763188417f,  (float16_t)0.646176013f,
+    (float16_t)0.764178741f,  (float16_t)0.645004537f,
+    (float16_t)0.765167266f,  (float16_t)0.643831543f,
+    (float16_t)0.766153990f,  (float16_t)0.642657034f,
+    (float16_t)0.767138912f,  (float16_t)0.641481013f,
+    (float16_t)0.768122029f,  (float16_t)0.640303482f,
+    (float16_t)0.769103338f,  (float16_t)0.639124445f,
+    (float16_t)0.770082837f,  (float16_t)0.637943904f,
+    (float16_t)0.771060524f,  (float16_t)0.636761861f,
+    (float16_t)0.772036397f,  (float16_t)0.635578320f,
+    (float16_t)0.773010453f,  (float16_t)0.634393284f,
+    (float16_t)0.773982691f,  (float16_t)0.633206755f,
+    (float16_t)0.774953107f,  (float16_t)0.632018736f,
+    (float16_t)0.775921699f,  (float16_t)0.630829230f,
+    (float16_t)0.776888466f,  (float16_t)0.629638239f,
+    (float16_t)0.777853404f,  (float16_t)0.628445767f,
+    (float16_t)0.778816512f,  (float16_t)0.627251815f,
+    (float16_t)0.779777788f,  (float16_t)0.626056388f,
+    (float16_t)0.780737229f,  (float16_t)0.624859488f,
+    (float16_t)0.781694832f,  (float16_t)0.623661118f,
+    (float16_t)0.782650596f,  (float16_t)0.622461279f,
+    (float16_t)0.783604519f,  (float16_t)0.621259977f,
+    (float16_t)0.784556597f,  (float16_t)0.620057212f,
+    (float16_t)0.785506830f,  (float16_t)0.618852988f,
+    (float16_t)0.786455214f,  (float16_t)0.617647308f,
+    (float16_t)0.787401747f,  (float16_t)0.616440175f,
+    (float16_t)0.788346428f,  (float16_t)0.615231591f,
+    (float16_t)0.789289253f,  (float16_t)0.614021559f,
+    (float16_t)0.790230221f,  (float16_t)0.612810082f,
+    (float16_t)0.791169330f,  (float16_t)0.611597164f,
+    (float16_t)0.792106577f,  (float16_t)0.610382806f,
+    (float16_t)0.793041960f,  (float16_t)0.609167012f,
+    (float16_t)0.793975478f,  (float16_t)0.607949785f,
+    (float16_t)0.794907126f,  (float16_t)0.606731127f,
+    (float16_t)0.795836905f,  (float16_t)0.605511041f,
+    (float16_t)0.796764810f,  (float16_t)0.604289531f,
+    (float16_t)0.797690841f,  (float16_t)0.603066599f,
+    (float16_t)0.798614995f,  (float16_t)0.601842247f,
+    (float16_t)0.799537269f,  (float16_t)0.600616479f,
+    (float16_t)0.800457662f,  (float16_t)0.599389298f,
+    (float16_t)0.801376172f,  (float16_t)0.598160707f,
+    (float16_t)0.802292796f,  (float16_t)0.596930708f,
+    (float16_t)0.803207531f,  (float16_t)0.595699304f,
+    (float16_t)0.804120377f,  (float16_t)0.594466499f,
+    (float16_t)0.805031331f,  (float16_t)0.593232295f,
+    (float16_t)0.805940391f,  (float16_t)0.591996695f,
+    (float16_t)0.806847554f,  (float16_t)0.590759702f,
+    (float16_t)0.807752818f,  (float16_t)0.589521319f,
+    (float16_t)0.808656182f,  (float16_t)0.588281548f,
+    (float16_t)0.809557642f,  (float16_t)0.587040394f,
+    (float16_t)0.810457198f,  (float16_t)0.585797857f,
+    (float16_t)0.811354847f,  (float16_t)0.584553943f,
+    (float16_t)0.812250587f,  (float16_t)0.583308653f,
+    (float16_t)0.813144415f,  (float16_t)0.582061990f,
+    (float16_t)0.814036330f,  (float16_t)0.580813958f,
+    (float16_t)0.814926329f,  (float16_t)0.579564559f,
+    (float16_t)0.815814411f,  (float16_t)0.578313796f,
+    (float16_t)0.816700573f,  (float16_t)0.577061673f,
+    (float16_t)0.817584813f,  (float16_t)0.575808191f,
+    (float16_t)0.818467130f,  (float16_t)0.574553355f,
+    (float16_t)0.819347520f,  (float16_t)0.573297167f,
+    (float16_t)0.820225983f,  (float16_t)0.572039629f,
+    (float16_t)0.821102515f,  (float16_t)0.570780746f,
+    (float16_t)0.821977115f,  (float16_t)0.569520519f,
+    (float16_t)0.822849781f,  (float16_t)0.568258953f,
+    (float16_t)0.823720511f,  (float16_t)0.566996049f,
+    (float16_t)0.824589303f,  (float16_t)0.565731811f,
+    (float16_t)0.825456154f,  (float16_t)0.564466242f,
+    (float16_t)0.826321063f,  (float16_t)0.563199344f,
+    (float16_t)0.827184027f,  (float16_t)0.561931121f,
+    (float16_t)0.828045045f,  (float16_t)0.560661576f,
+    (float16_t)0.828904115f,  (float16_t)0.559390712f,
+    (float16_t)0.829761234f,  (float16_t)0.558118531f,
+    (float16_t)0.830616400f,  (float16_t)0.556845037f,
+    (float16_t)0.831469612f,  (float16_t)0.555570233f,
+    (float16_t)0.832320868f,  (float16_t)0.554294121f,
+    (float16_t)0.833170165f,  (float16_t)0.553016706f,
+    (float16_t)0.834017501f,  (float16_t)0.551737988f,
+    (float16_t)0.834862875f,  (float16_t)0.550457973f,
+    (float16_t)0.835706284f,  (float16_t)0.549176662f,
+    (float16_t)0.836547727f,  (float16_t)0.547894059f,
+    (float16_t)0.837387202f,  (float16_t)0.546610167f,
+    (float16_t)0.838224706f,  (float16_t)0.545324988f,
+    (float16_t)0.839060237f,  (float16_t)0.544038527f,
+    (float16_t)0.839893794f,  (float16_t)0.542750785f,
+    (float16_t)0.840725375f,  (float16_t)0.541461766f,
+    (float16_t)0.841554977f,  (float16_t)0.540171473f,
+    (float16_t)0.842382600f,  (float16_t)0.538879909f,
+    (float16_t)0.843208240f,  (float16_t)0.537587076f,
+    (float16_t)0.844031895f,  (float16_t)0.536292979f,
+    (float16_t)0.844853565f,  (float16_t)0.534997620f,
+    (float16_t)0.845673247f,  (float16_t)0.533701002f,
+    (float16_t)0.846490939f,  (float16_t)0.532403128f,
+    (float16_t)0.847306639f,  (float16_t)0.531104001f,
+    (float16_t)0.848120345f,  (float16_t)0.529803625f,
+    (float16_t)0.848932055f,  (float16_t)0.528502002f,
+    (float16_t)0.849741768f,  (float16_t)0.527199135f,
+    (float16_t)0.850549481f,  (float16_t)0.525895027f,
+    (float16_t)0.851355193f,  (float16_t)0.524589683f,
+    (float16_t)0.852158902f,  (float16_t)0.523283103f,
+    (float16_t)0.852960605f,  (float16_t)0.521975293f,
+    (float16_t)0.853760301f,  (float16_t)0.520666254f,
+    (float16_t)0.854557988f,  (float16_t)0.519355990f,
+    (float16_t)0.855353665f,  (float16_t)0.518044504f,
+    (float16_t)0.856147328f,  (float16_t)0.516731799f,
+    (float16_t)0.856938977f,  (float16_t)0.515417878f,
+    (float16_t)0.857728610f,  (float16_t)0.514102744f,
+    (float16_t)0.858516224f,  (float16_t)0.512786401f,
+    (float16_t)0.859301818f,  (float16_t)0.511468850f,
+    (float16_t)0.860085390f,  (float16_t)0.510150097f,
+    (float16_t)0.860866939f,  (float16_t)0.508830143f,
+    (float16_t)0.861646461f,  (float16_t)0.507508991f,
+    (float16_t)0.862423956f,  (float16_t)0.506186645f,
+    (float16_t)0.863199422f,  (float16_t)0.504863109f,
+    (float16_t)0.863972856f,  (float16_t)0.503538384f,
+    (float16_t)0.864744258f,  (float16_t)0.502212474f,
+    (float16_t)0.865513624f,  (float16_t)0.500885383f,
+    (float16_t)0.866280954f,  (float16_t)0.499557113f,
+    (float16_t)0.867046246f,  (float16_t)0.498227667f,
+    (float16_t)0.867809497f,  (float16_t)0.496897049f,
+    (float16_t)0.868570706f,  (float16_t)0.495565262f,
+    (float16_t)0.869329871f,  (float16_t)0.494232309f,
+    (float16_t)0.870086991f,  (float16_t)0.492898192f,
+    (float16_t)0.870842063f,  (float16_t)0.491562916f,
+    (float16_t)0.871595087f,  (float16_t)0.490226483f,
+    (float16_t)0.872346059f,  (float16_t)0.488888897f,
+    (float16_t)0.873094978f,  (float16_t)0.487550160f,
+    (float16_t)0.873841843f,  (float16_t)0.486210276f,
+    (float16_t)0.874586652f,  (float16_t)0.484869248f,
+    (float16_t)0.875329403f,  (float16_t)0.483527079f,
+    (float16_t)0.876070094f,  (float16_t)0.482183772f,
+    (float16_t)0.876808724f,  (float16_t)0.480839331f,
+    (float16_t)0.877545290f,  (float16_t)0.479493758f,
+    (float16_t)0.878279792f,  (float16_t)0.478147056f,
+    (float16_t)0.879012226f,  (float16_t)0.476799230f,
+    (float16_t)0.879742593f,  (float16_t)0.475450282f,
+    (float16_t)0.880470889f,  (float16_t)0.474100215f,
+    (float16_t)0.881197113f,  (float16_t)0.472749032f,
+    (float16_t)0.881921264f,  (float16_t)0.471396737f,
+    (float16_t)0.882643340f,  (float16_t)0.470043332f,
+    (float16_t)0.883363339f,  (float16_t)0.468688822f,
+    (float16_t)0.884081259f,  (float16_t)0.467333209f,
+    (float16_t)0.884797098f,  (float16_t)0.465976496f,
+    (float16_t)0.885510856f,  (float16_t)0.464618686f,
+    (float16_t)0.886222530f,  (float16_t)0.463259784f,
+    (float16_t)0.886932119f,  (float16_t)0.461899791f,
+    (float16_t)0.887639620f,  (float16_t)0.460538711f,
+    (float16_t)0.888345033f,  (float16_t)0.459176548f,
+    (float16_t)0.889048356f,  (float16_t)0.457813304f,
+    (float16_t)0.889749586f,  (float16_t)0.456448982f,
+    (float16_t)0.890448723f,  (float16_t)0.455083587f,
+    (float16_t)0.891145765f,  (float16_t)0.453717121f,
+    (float16_t)0.891840709f,  (float16_t)0.452349587f,
+    (float16_t)0.892533555f,  (float16_t)0.450980989f,
+    (float16_t)0.893224301f,  (float16_t)0.449611330f,
+    (float16_t)0.893912945f,  (float16_t)0.448240612f,
+    (float16_t)0.894599486f,  (float16_t)0.446868840f,
+    (float16_t)0.895283921f,  (float16_t)0.445496017f,
+    (float16_t)0.895966250f,  (float16_t)0.444122145f,
+    (float16_t)0.896646470f,  (float16_t)0.442747228f,
+    (float16_t)0.897324581f,  (float16_t)0.441371269f,
+    (float16_t)0.898000580f,  (float16_t)0.439994271f,
+    (float16_t)0.898674466f,  (float16_t)0.438616239f,
+    (float16_t)0.899346237f,  (float16_t)0.437237174f,
+    (float16_t)0.900015892f,  (float16_t)0.435857080f,
+    (float16_t)0.900683429f,  (float16_t)0.434475961f,
+    (float16_t)0.901348847f,  (float16_t)0.433093819f,
+    (float16_t)0.902012144f,  (float16_t)0.431710658f,
+    (float16_t)0.902673318f,  (float16_t)0.430326481f,
+    (float16_t)0.903332368f,  (float16_t)0.428941292f,
+    (float16_t)0.903989293f,  (float16_t)0.427555093f,
+    (float16_t)0.904644091f,  (float16_t)0.426167889f,
+    (float16_t)0.905296759f,  (float16_t)0.424779681f,
+    (float16_t)0.905947298f,  (float16_t)0.423390474f,
+    (float16_t)0.906595705f,  (float16_t)0.422000271f,
+    (float16_t)0.907241978f,  (float16_t)0.420609074f,
+    (float16_t)0.907886116f,  (float16_t)0.419216888f,
+    (float16_t)0.908528119f,  (float16_t)0.417823716f,
+    (float16_t)0.909167983f,  (float16_t)0.416429560f,
+    (float16_t)0.909805708f,  (float16_t)0.415034424f,
+    (float16_t)0.910441292f,  (float16_t)0.413638312f,
+    (float16_t)0.911074734f,  (float16_t)0.412241227f,
+    (float16_t)0.911706032f,  (float16_t)0.410843171f,
+    (float16_t)0.912335185f,  (float16_t)0.409444149f,
+    (float16_t)0.912962190f,  (float16_t)0.408044163f,
+    (float16_t)0.913587048f,  (float16_t)0.406643217f,
+    (float16_t)0.914209756f,  (float16_t)0.405241314f,
+    (float16_t)0.914830312f,  (float16_t)0.403838458f,
+    (float16_t)0.915448716f,  (float16_t)0.402434651f,
+    (float16_t)0.916064966f,  (float16_t)0.401029897f,
+    (float16_t)0.916679060f,  (float16_t)0.399624200f,
+    (float16_t)0.917290997f,  (float16_t)0.398217562f,
+    (float16_t)0.917900776f,  (float16_t)0.396809987f,
+    (float16_t)0.918508394f,  (float16_t)0.395401479f,
+    (float16_t)0.919113852f,  (float16_t)0.393992040f,
+    (float16_t)0.919717146f,  (float16_t)0.392581674f,
+    (float16_t)0.920318277f,  (float16_t)0.391170384f,
+    (float16_t)0.920917242f,  (float16_t)0.389758174f,
+    (float16_t)0.921514039f,  (float16_t)0.388345047f,
+    (float16_t)0.922108669f,  (float16_t)0.386931006f,
+    (float16_t)0.922701128f,  (float16_t)0.385516054f,
+    (float16_t)0.923291417f,  (float16_t)0.384100195f,
+    (float16_t)0.923879533f,  (float16_t)0.382683432f,
+    (float16_t)0.924465474f,  (float16_t)0.381265769f,
+    (float16_t)0.925049241f,  (float16_t)0.379847209f,
+    (float16_t)0.925630831f,  (float16_t)0.378427755f,
+    (float16_t)0.926210242f,  (float16_t)0.377007410f,
+    (float16_t)0.926787474f,  (float16_t)0.375586178f,
+    (float16_t)0.927362526f,  (float16_t)0.374164063f,
+    (float16_t)0.927935395f,  (float16_t)0.372741067f,
+    (float16_t)0.928506080f,  (float16_t)0.371317194f,
+    (float16_t)0.929074581f,  (float16_t)0.369892447f,
+    (float16_t)0.929640896f,  (float16_t)0.368466830f,
+    (float16_t)0.930205023f,  (float16_t)0.367040346f,
+    (float16_t)0.930766961f,  (float16_t)0.365612998f,
+    (float16_t)0.931326709f,  (float16_t)0.364184790f,
+    (float16_t)0.931884266f,  (float16_t)0.362755724f,
+    (float16_t)0.932439629f,  (float16_t)0.361325806f,
+    (float16_t)0.932992799f,  (float16_t)0.359895037f,
+    (float16_t)0.933543773f,  (float16_t)0.358463421f,
+    (float16_t)0.934092550f,  (float16_t)0.357030961f,
+    (float16_t)0.934639130f,  (float16_t)0.355597662f,
+    (float16_t)0.935183510f,  (float16_t)0.354163525f,
+    (float16_t)0.935725689f,  (float16_t)0.352728556f,
+    (float16_t)0.936265667f,  (float16_t)0.351292756f,
+    (float16_t)0.936803442f,  (float16_t)0.349856130f,
+    (float16_t)0.937339012f,  (float16_t)0.348418680f,
+    (float16_t)0.937872376f,  (float16_t)0.346980411f,
+    (float16_t)0.938403534f,  (float16_t)0.345541325f,
+    (float16_t)0.938932484f,  (float16_t)0.344101426f,
+    (float16_t)0.939459224f,  (float16_t)0.342660717f,
+    (float16_t)0.939983753f,  (float16_t)0.341219202f,
+    (float16_t)0.940506071f,  (float16_t)0.339776884f,
+    (float16_t)0.941026175f,  (float16_t)0.338333767f,
+    (float16_t)0.941544065f,  (float16_t)0.336889853f,
+    (float16_t)0.942059740f,  (float16_t)0.335445147f,
+    (float16_t)0.942573198f,  (float16_t)0.333999651f,
+    (float16_t)0.943084437f,  (float16_t)0.332553370f,
+    (float16_t)0.943593458f,  (float16_t)0.331106306f,
+    (float16_t)0.944100258f,  (float16_t)0.329658463f,
+    (float16_t)0.944604837f,  (float16_t)0.328209844f,
+    (float16_t)0.945107193f,  (float16_t)0.326760452f,
+    (float16_t)0.945607325f,  (float16_t)0.325310292f,
+    (float16_t)0.946105232f,  (float16_t)0.323859367f,
+    (float16_t)0.946600913f,  (float16_t)0.322407679f,
+    (float16_t)0.947094366f,  (float16_t)0.320955232f,
+    (float16_t)0.947585591f,  (float16_t)0.319502031f,
+    (float16_t)0.948074586f,  (float16_t)0.318048077f,
+    (float16_t)0.948561350f,  (float16_t)0.316593376f,
+    (float16_t)0.949045882f,  (float16_t)0.315137929f,
+    (float16_t)0.949528181f,  (float16_t)0.313681740f,
+    (float16_t)0.950008245f,  (float16_t)0.312224814f,
+    (float16_t)0.950486074f,  (float16_t)0.310767153f,
+    (float16_t)0.950961666f,  (float16_t)0.309308760f,
+    (float16_t)0.951435021f,  (float16_t)0.307849640f,
+    (float16_t)0.951906137f,  (float16_t)0.306389795f,
+    (float16_t)0.952375013f,  (float16_t)0.304929230f,
+    (float16_t)0.952841648f,  (float16_t)0.303467947f,
+    (float16_t)0.953306040f,  (float16_t)0.302005949f,
+    (float16_t)0.953768190f,  (float16_t)0.300543241f,
+    (float16_t)0.954228095f,  (float16_t)0.299079826f,
+    (float16_t)0.954685755f,  (float16_t)0.297615707f,
+    (float16_t)0.955141168f,  (float16_t)0.296150888f,
+    (float16_t)0.955594334f,  (float16_t)0.294685372f,
+    (float16_t)0.956045251f,  (float16_t)0.293219163f,
+    (float16_t)0.956493919f,  (float16_t)0.291752263f,
+    (float16_t)0.956940336f,  (float16_t)0.290284677f,
+    (float16_t)0.957384501f,  (float16_t)0.288816408f,
+    (float16_t)0.957826413f,  (float16_t)0.287347460f,
+    (float16_t)0.958266071f,  (float16_t)0.285877835f,
+    (float16_t)0.958703475f,  (float16_t)0.284407537f,
+    (float16_t)0.959138622f,  (float16_t)0.282936570f,
+    (float16_t)0.959571513f,  (float16_t)0.281464938f,
+    (float16_t)0.960002146f,  (float16_t)0.279992643f,
+    (float16_t)0.960430519f,  (float16_t)0.278519689f,
+    (float16_t)0.960856633f,  (float16_t)0.277046080f,
+    (float16_t)0.961280486f,  (float16_t)0.275571819f,
+    (float16_t)0.961702077f,  (float16_t)0.274096910f,
+    (float16_t)0.962121404f,  (float16_t)0.272621355f,
+    (float16_t)0.962538468f,  (float16_t)0.271145160f,
+    (float16_t)0.962953267f,  (float16_t)0.269668326f,
+    (float16_t)0.963365800f,  (float16_t)0.268190857f,
+    (float16_t)0.963776066f,  (float16_t)0.266712757f,
+    (float16_t)0.964184064f,  (float16_t)0.265234030f,
+    (float16_t)0.964589793f,  (float16_t)0.263754679f,
+    (float16_t)0.964993253f,  (float16_t)0.262274707f,
+    (float16_t)0.965394442f,  (float16_t)0.260794118f,
+    (float16_t)0.965793359f,  (float16_t)0.259312915f,
+    (float16_t)0.966190003f,  (float16_t)0.257831102f,
+    (float16_t)0.966584374f,  (float16_t)0.256348682f,
+    (float16_t)0.966976471f,  (float16_t)0.254865660f,
+    (float16_t)0.967366292f,  (float16_t)0.253382037f,
+    (float16_t)0.967753837f,  (float16_t)0.251897818f,
+    (float16_t)0.968139105f,  (float16_t)0.250413007f,
+    (float16_t)0.968522094f,  (float16_t)0.248927606f,
+    (float16_t)0.968902805f,  (float16_t)0.247441619f,
+    (float16_t)0.969281235f,  (float16_t)0.245955050f,
+    (float16_t)0.969657385f,  (float16_t)0.244467903f,
+    (float16_t)0.970031253f,  (float16_t)0.242980180f,
+    (float16_t)0.970402839f,  (float16_t)0.241491885f,
+    (float16_t)0.970772141f,  (float16_t)0.240003022f,
+    (float16_t)0.971139158f,  (float16_t)0.238513595f,
+    (float16_t)0.971503891f,  (float16_t)0.237023606f,
+    (float16_t)0.971866337f,  (float16_t)0.235533059f,
+    (float16_t)0.972226497f,  (float16_t)0.234041959f,
+    (float16_t)0.972584369f,  (float16_t)0.232550307f,
+    (float16_t)0.972939952f,  (float16_t)0.231058108f,
+    (float16_t)0.973293246f,  (float16_t)0.229565366f,
+    (float16_t)0.973644250f,  (float16_t)0.228072083f,
+    (float16_t)0.973992962f,  (float16_t)0.226578264f,
+    (float16_t)0.974339383f,  (float16_t)0.225083911f,
+    (float16_t)0.974683511f,  (float16_t)0.223589029f,
+    (float16_t)0.975025345f,  (float16_t)0.222093621f,
+    (float16_t)0.975364885f,  (float16_t)0.220597690f,
+    (float16_t)0.975702130f,  (float16_t)0.219101240f,
+    (float16_t)0.976037079f,  (float16_t)0.217604275f,
+    (float16_t)0.976369731f,  (float16_t)0.216106797f,
+    (float16_t)0.976700086f,  (float16_t)0.214608811f,
+    (float16_t)0.977028143f,  (float16_t)0.213110320f,
+    (float16_t)0.977353900f,  (float16_t)0.211611327f,
+    (float16_t)0.977677358f,  (float16_t)0.210111837f,
+    (float16_t)0.977998515f,  (float16_t)0.208611852f,
+    (float16_t)0.978317371f,  (float16_t)0.207111376f,
+    (float16_t)0.978633924f,  (float16_t)0.205610413f,
+    (float16_t)0.978948175f,  (float16_t)0.204108966f,
+    (float16_t)0.979260123f,  (float16_t)0.202607039f,
+    (float16_t)0.979569766f,  (float16_t)0.201104635f,
+    (float16_t)0.979877104f,  (float16_t)0.199601758f,
+    (float16_t)0.980182136f,  (float16_t)0.198098411f,
+    (float16_t)0.980484862f,  (float16_t)0.196594598f,
+    (float16_t)0.980785280f,  (float16_t)0.195090322f,
+    (float16_t)0.981083391f,  (float16_t)0.193585587f,
+    (float16_t)0.981379193f,  (float16_t)0.192080397f,
+    (float16_t)0.981672686f,  (float16_t)0.190574755f,
+    (float16_t)0.981963869f,  (float16_t)0.189068664f,
+    (float16_t)0.982252741f,  (float16_t)0.187562129f,
+    (float16_t)0.982539302f,  (float16_t)0.186055152f,
+    (float16_t)0.982823551f,  (float16_t)0.184547737f,
+    (float16_t)0.983105487f,  (float16_t)0.183039888f,
+    (float16_t)0.983385110f,  (float16_t)0.181531608f,
+    (float16_t)0.983662419f,  (float16_t)0.180022901f,
+    (float16_t)0.983937413f,  (float16_t)0.178513771f,
+    (float16_t)0.984210092f,  (float16_t)0.177004220f,
+    (float16_t)0.984480455f,  (float16_t)0.175494253f,
+    (float16_t)0.984748502f,  (float16_t)0.173983873f,
+    (float16_t)0.985014231f,  (float16_t)0.172473084f,
+    (float16_t)0.985277642f,  (float16_t)0.170961889f,
+    (float16_t)0.985538735f,  (float16_t)0.169450291f,
+    (float16_t)0.985797509f,  (float16_t)0.167938295f,
+    (float16_t)0.986053963f,  (float16_t)0.166425904f,
+    (float16_t)0.986308097f,  (float16_t)0.164913120f,
+    (float16_t)0.986559910f,  (float16_t)0.163399949f,
+    (float16_t)0.986809402f,  (float16_t)0.161886394f,
+    (float16_t)0.987056571f,  (float16_t)0.160372457f,
+    (float16_t)0.987301418f,  (float16_t)0.158858143f,
+    (float16_t)0.987543942f,  (float16_t)0.157343456f,
+    (float16_t)0.987784142f,  (float16_t)0.155828398f,
+    (float16_t)0.988022017f,  (float16_t)0.154312973f,
+    (float16_t)0.988257568f,  (float16_t)0.152797185f,
+    (float16_t)0.988490793f,  (float16_t)0.151281038f,
+    (float16_t)0.988721692f,  (float16_t)0.149764535f,
+    (float16_t)0.988950265f,  (float16_t)0.148247679f,
+    (float16_t)0.989176510f,  (float16_t)0.146730474f,
+    (float16_t)0.989400428f,  (float16_t)0.145212925f,
+    (float16_t)0.989622017f,  (float16_t)0.143695033f,
+    (float16_t)0.989841278f,  (float16_t)0.142176804f,
+    (float16_t)0.990058210f,  (float16_t)0.140658239f,
+    (float16_t)0.990272812f,  (float16_t)0.139139344f,
+    (float16_t)0.990485084f,  (float16_t)0.137620122f,
+    (float16_t)0.990695025f,  (float16_t)0.136100575f,
+    (float16_t)0.990902635f,  (float16_t)0.134580709f,
+    (float16_t)0.991107914f,  (float16_t)0.133060525f,
+    (float16_t)0.991310860f,  (float16_t)0.131540029f,
+    (float16_t)0.991511473f,  (float16_t)0.130019223f,
+    (float16_t)0.991709754f,  (float16_t)0.128498111f,
+    (float16_t)0.991905700f,  (float16_t)0.126976696f,
+    (float16_t)0.992099313f,  (float16_t)0.125454983f,
+    (float16_t)0.992290591f,  (float16_t)0.123932975f,
+    (float16_t)0.992479535f,  (float16_t)0.122410675f,
+    (float16_t)0.992666142f,  (float16_t)0.120888087f,
+    (float16_t)0.992850414f,  (float16_t)0.119365215f,
+    (float16_t)0.993032350f,  (float16_t)0.117842062f,
+    (float16_t)0.993211949f,  (float16_t)0.116318631f,
+    (float16_t)0.993389211f,  (float16_t)0.114794927f,
+    (float16_t)0.993564136f,  (float16_t)0.113270952f,
+    (float16_t)0.993736722f,  (float16_t)0.111746711f,
+    (float16_t)0.993906970f,  (float16_t)0.110222207f,
+    (float16_t)0.994074879f,  (float16_t)0.108697444f,
+    (float16_t)0.994240449f,  (float16_t)0.107172425f,
+    (float16_t)0.994403680f,  (float16_t)0.105647154f,
+    (float16_t)0.994564571f,  (float16_t)0.104121634f,
+    (float16_t)0.994723121f,  (float16_t)0.102595869f,
+    (float16_t)0.994879331f,  (float16_t)0.101069863f,
+    (float16_t)0.995033199f,  (float16_t)0.099543619f,
+    (float16_t)0.995184727f,  (float16_t)0.098017140f,
+    (float16_t)0.995333912f,  (float16_t)0.096490431f,
+    (float16_t)0.995480755f,  (float16_t)0.094963495f,
+    (float16_t)0.995625256f,  (float16_t)0.093436336f,
+    (float16_t)0.995767414f,  (float16_t)0.091908956f,
+    (float16_t)0.995907229f,  (float16_t)0.090381361f,
+    (float16_t)0.996044701f,  (float16_t)0.088853553f,
+    (float16_t)0.996179829f,  (float16_t)0.087325535f,
+    (float16_t)0.996312612f,  (float16_t)0.085797312f,
+    (float16_t)0.996443051f,  (float16_t)0.084268888f,
+    (float16_t)0.996571146f,  (float16_t)0.082740265f,
+    (float16_t)0.996696895f,  (float16_t)0.081211447f,
+    (float16_t)0.996820299f,  (float16_t)0.079682438f,
+    (float16_t)0.996941358f,  (float16_t)0.078153242f,
+    (float16_t)0.997060070f,  (float16_t)0.076623861f,
+    (float16_t)0.997176437f,  (float16_t)0.075094301f,
+    (float16_t)0.997290457f,  (float16_t)0.073564564f,
+    (float16_t)0.997402130f,  (float16_t)0.072034653f,
+    (float16_t)0.997511456f,  (float16_t)0.070504573f,
+    (float16_t)0.997618435f,  (float16_t)0.068974328f,
+    (float16_t)0.997723067f,  (float16_t)0.067443920f,
+    (float16_t)0.997825350f,  (float16_t)0.065913353f,
+    (float16_t)0.997925286f,  (float16_t)0.064382631f,
+    (float16_t)0.998022874f,  (float16_t)0.062851758f,
+    (float16_t)0.998118113f,  (float16_t)0.061320736f,
+    (float16_t)0.998211003f,  (float16_t)0.059789571f,
+    (float16_t)0.998301545f,  (float16_t)0.058258265f,
+    (float16_t)0.998389737f,  (float16_t)0.056726821f,
+    (float16_t)0.998475581f,  (float16_t)0.055195244f,
+    (float16_t)0.998559074f,  (float16_t)0.053663538f,
+    (float16_t)0.998640218f,  (float16_t)0.052131705f,
+    (float16_t)0.998719012f,  (float16_t)0.050599749f,
+    (float16_t)0.998795456f,  (float16_t)0.049067674f,
+    (float16_t)0.998869550f,  (float16_t)0.047535484f,
+    (float16_t)0.998941293f,  (float16_t)0.046003182f,
+    (float16_t)0.999010686f,  (float16_t)0.044470772f,
+    (float16_t)0.999077728f,  (float16_t)0.042938257f,
+    (float16_t)0.999142419f,  (float16_t)0.041405641f,
+    (float16_t)0.999204759f,  (float16_t)0.039872928f,
+    (float16_t)0.999264747f,  (float16_t)0.038340120f,
+    (float16_t)0.999322385f,  (float16_t)0.036807223f,
+    (float16_t)0.999377670f,  (float16_t)0.035274239f,
+    (float16_t)0.999430605f,  (float16_t)0.033741172f,
+    (float16_t)0.999481187f,  (float16_t)0.032208025f,
+    (float16_t)0.999529418f,  (float16_t)0.030674803f,
+    (float16_t)0.999575296f,  (float16_t)0.029141509f,
+    (float16_t)0.999618822f,  (float16_t)0.027608146f,
+    (float16_t)0.999659997f,  (float16_t)0.026074718f,
+    (float16_t)0.999698819f,  (float16_t)0.024541229f,
+    (float16_t)0.999735288f,  (float16_t)0.023007681f,
+    (float16_t)0.999769405f,  (float16_t)0.021474080f,
+    (float16_t)0.999801170f,  (float16_t)0.019940429f,
+    (float16_t)0.999830582f,  (float16_t)0.018406730f,
+    (float16_t)0.999857641f,  (float16_t)0.016872988f,
+    (float16_t)0.999882347f,  (float16_t)0.015339206f,
+    (float16_t)0.999904701f,  (float16_t)0.013805389f,
+    (float16_t)0.999924702f,  (float16_t)0.012271538f,
+    (float16_t)0.999942350f,  (float16_t)0.010737659f,
+    (float16_t)0.999957645f,  (float16_t)0.009203755f,
+    (float16_t)0.999970586f,  (float16_t)0.007669829f,
+    (float16_t)0.999981175f,  (float16_t)0.006135885f,
+    (float16_t)0.999989411f,  (float16_t)0.004601926f,
+    (float16_t)0.999995294f,  (float16_t)0.003067957f,
+    (float16_t)0.999998823f,  (float16_t)0.001533980f,
+    (float16_t)1.000000000f,  (float16_t)0.000000000f,
+    (float16_t)0.999998823f, (float16_t)-0.001533980f,
+    (float16_t)0.999995294f, (float16_t)-0.003067957f,
+    (float16_t)0.999989411f, (float16_t)-0.004601926f,
+    (float16_t)0.999981175f, (float16_t)-0.006135885f,
+    (float16_t)0.999970586f, (float16_t)-0.007669829f,
+    (float16_t)0.999957645f, (float16_t)-0.009203755f,
+    (float16_t)0.999942350f, (float16_t)-0.010737659f,
+    (float16_t)0.999924702f, (float16_t)-0.012271538f,
+    (float16_t)0.999904701f, (float16_t)-0.013805389f,
+    (float16_t)0.999882347f, (float16_t)-0.015339206f,
+    (float16_t)0.999857641f, (float16_t)-0.016872988f,
+    (float16_t)0.999830582f, (float16_t)-0.018406730f,
+    (float16_t)0.999801170f, (float16_t)-0.019940429f,
+    (float16_t)0.999769405f, (float16_t)-0.021474080f,
+    (float16_t)0.999735288f, (float16_t)-0.023007681f,
+    (float16_t)0.999698819f, (float16_t)-0.024541229f,
+    (float16_t)0.999659997f, (float16_t)-0.026074718f,
+    (float16_t)0.999618822f, (float16_t)-0.027608146f,
+    (float16_t)0.999575296f, (float16_t)-0.029141509f,
+    (float16_t)0.999529418f, (float16_t)-0.030674803f,
+    (float16_t)0.999481187f, (float16_t)-0.032208025f,
+    (float16_t)0.999430605f, (float16_t)-0.033741172f,
+    (float16_t)0.999377670f, (float16_t)-0.035274239f,
+    (float16_t)0.999322385f, (float16_t)-0.036807223f,
+    (float16_t)0.999264747f, (float16_t)-0.038340120f,
+    (float16_t)0.999204759f, (float16_t)-0.039872928f,
+    (float16_t)0.999142419f, (float16_t)-0.041405641f,
+    (float16_t)0.999077728f, (float16_t)-0.042938257f,
+    (float16_t)0.999010686f, (float16_t)-0.044470772f,
+    (float16_t)0.998941293f, (float16_t)-0.046003182f,
+    (float16_t)0.998869550f, (float16_t)-0.047535484f,
+    (float16_t)0.998795456f, (float16_t)-0.049067674f,
+    (float16_t)0.998719012f, (float16_t)-0.050599749f,
+    (float16_t)0.998640218f, (float16_t)-0.052131705f,
+    (float16_t)0.998559074f, (float16_t)-0.053663538f,
+    (float16_t)0.998475581f, (float16_t)-0.055195244f,
+    (float16_t)0.998389737f, (float16_t)-0.056726821f,
+    (float16_t)0.998301545f, (float16_t)-0.058258265f,
+    (float16_t)0.998211003f, (float16_t)-0.059789571f,
+    (float16_t)0.998118113f, (float16_t)-0.061320736f,
+    (float16_t)0.998022874f, (float16_t)-0.062851758f,
+    (float16_t)0.997925286f, (float16_t)-0.064382631f,
+    (float16_t)0.997825350f, (float16_t)-0.065913353f,
+    (float16_t)0.997723067f, (float16_t)-0.067443920f,
+    (float16_t)0.997618435f, (float16_t)-0.068974328f,
+    (float16_t)0.997511456f, (float16_t)-0.070504573f,
+    (float16_t)0.997402130f, (float16_t)-0.072034653f,
+    (float16_t)0.997290457f, (float16_t)-0.073564564f,
+    (float16_t)0.997176437f, (float16_t)-0.075094301f,
+    (float16_t)0.997060070f, (float16_t)-0.076623861f,
+    (float16_t)0.996941358f, (float16_t)-0.078153242f,
+    (float16_t)0.996820299f, (float16_t)-0.079682438f,
+    (float16_t)0.996696895f, (float16_t)-0.081211447f,
+    (float16_t)0.996571146f, (float16_t)-0.082740265f,
+    (float16_t)0.996443051f, (float16_t)-0.084268888f,
+    (float16_t)0.996312612f, (float16_t)-0.085797312f,
+    (float16_t)0.996179829f, (float16_t)-0.087325535f,
+    (float16_t)0.996044701f, (float16_t)-0.088853553f,
+    (float16_t)0.995907229f, (float16_t)-0.090381361f,
+    (float16_t)0.995767414f, (float16_t)-0.091908956f,
+    (float16_t)0.995625256f, (float16_t)-0.093436336f,
+    (float16_t)0.995480755f, (float16_t)-0.094963495f,
+    (float16_t)0.995333912f, (float16_t)-0.096490431f,
+    (float16_t)0.995184727f, (float16_t)-0.098017140f,
+    (float16_t)0.995033199f, (float16_t)-0.099543619f,
+    (float16_t)0.994879331f, (float16_t)-0.101069863f,
+    (float16_t)0.994723121f, (float16_t)-0.102595869f,
+    (float16_t)0.994564571f, (float16_t)-0.104121634f,
+    (float16_t)0.994403680f, (float16_t)-0.105647154f,
+    (float16_t)0.994240449f, (float16_t)-0.107172425f,
+    (float16_t)0.994074879f, (float16_t)-0.108697444f,
+    (float16_t)0.993906970f, (float16_t)-0.110222207f,
+    (float16_t)0.993736722f, (float16_t)-0.111746711f,
+    (float16_t)0.993564136f, (float16_t)-0.113270952f,
+    (float16_t)0.993389211f, (float16_t)-0.114794927f,
+    (float16_t)0.993211949f, (float16_t)-0.116318631f,
+    (float16_t)0.993032350f, (float16_t)-0.117842062f,
+    (float16_t)0.992850414f, (float16_t)-0.119365215f,
+    (float16_t)0.992666142f, (float16_t)-0.120888087f,
+    (float16_t)0.992479535f, (float16_t)-0.122410675f,
+    (float16_t)0.992290591f, (float16_t)-0.123932975f,
+    (float16_t)0.992099313f, (float16_t)-0.125454983f,
+    (float16_t)0.991905700f, (float16_t)-0.126976696f,
+    (float16_t)0.991709754f, (float16_t)-0.128498111f,
+    (float16_t)0.991511473f, (float16_t)-0.130019223f,
+    (float16_t)0.991310860f, (float16_t)-0.131540029f,
+    (float16_t)0.991107914f, (float16_t)-0.133060525f,
+    (float16_t)0.990902635f, (float16_t)-0.134580709f,
+    (float16_t)0.990695025f, (float16_t)-0.136100575f,
+    (float16_t)0.990485084f, (float16_t)-0.137620122f,
+    (float16_t)0.990272812f, (float16_t)-0.139139344f,
+    (float16_t)0.990058210f, (float16_t)-0.140658239f,
+    (float16_t)0.989841278f, (float16_t)-0.142176804f,
+    (float16_t)0.989622017f, (float16_t)-0.143695033f,
+    (float16_t)0.989400428f, (float16_t)-0.145212925f,
+    (float16_t)0.989176510f, (float16_t)-0.146730474f,
+    (float16_t)0.988950265f, (float16_t)-0.148247679f,
+    (float16_t)0.988721692f, (float16_t)-0.149764535f,
+    (float16_t)0.988490793f, (float16_t)-0.151281038f,
+    (float16_t)0.988257568f, (float16_t)-0.152797185f,
+    (float16_t)0.988022017f, (float16_t)-0.154312973f,
+    (float16_t)0.987784142f, (float16_t)-0.155828398f,
+    (float16_t)0.987543942f, (float16_t)-0.157343456f,
+    (float16_t)0.987301418f, (float16_t)-0.158858143f,
+    (float16_t)0.987056571f, (float16_t)-0.160372457f,
+    (float16_t)0.986809402f, (float16_t)-0.161886394f,
+    (float16_t)0.986559910f, (float16_t)-0.163399949f,
+    (float16_t)0.986308097f, (float16_t)-0.164913120f,
+    (float16_t)0.986053963f, (float16_t)-0.166425904f,
+    (float16_t)0.985797509f, (float16_t)-0.167938295f,
+    (float16_t)0.985538735f, (float16_t)-0.169450291f,
+    (float16_t)0.985277642f, (float16_t)-0.170961889f,
+    (float16_t)0.985014231f, (float16_t)-0.172473084f,
+    (float16_t)0.984748502f, (float16_t)-0.173983873f,
+    (float16_t)0.984480455f, (float16_t)-0.175494253f,
+    (float16_t)0.984210092f, (float16_t)-0.177004220f,
+    (float16_t)0.983937413f, (float16_t)-0.178513771f,
+    (float16_t)0.983662419f, (float16_t)-0.180022901f,
+    (float16_t)0.983385110f, (float16_t)-0.181531608f,
+    (float16_t)0.983105487f, (float16_t)-0.183039888f,
+    (float16_t)0.982823551f, (float16_t)-0.184547737f,
+    (float16_t)0.982539302f, (float16_t)-0.186055152f,
+    (float16_t)0.982252741f, (float16_t)-0.187562129f,
+    (float16_t)0.981963869f, (float16_t)-0.189068664f,
+    (float16_t)0.981672686f, (float16_t)-0.190574755f,
+    (float16_t)0.981379193f, (float16_t)-0.192080397f,
+    (float16_t)0.981083391f, (float16_t)-0.193585587f,
+    (float16_t)0.980785280f, (float16_t)-0.195090322f,
+    (float16_t)0.980484862f, (float16_t)-0.196594598f,
+    (float16_t)0.980182136f, (float16_t)-0.198098411f,
+    (float16_t)0.979877104f, (float16_t)-0.199601758f,
+    (float16_t)0.979569766f, (float16_t)-0.201104635f,
+    (float16_t)0.979260123f, (float16_t)-0.202607039f,
+    (float16_t)0.978948175f, (float16_t)-0.204108966f,
+    (float16_t)0.978633924f, (float16_t)-0.205610413f,
+    (float16_t)0.978317371f, (float16_t)-0.207111376f,
+    (float16_t)0.977998515f, (float16_t)-0.208611852f,
+    (float16_t)0.977677358f, (float16_t)-0.210111837f,
+    (float16_t)0.977353900f, (float16_t)-0.211611327f,
+    (float16_t)0.977028143f, (float16_t)-0.213110320f,
+    (float16_t)0.976700086f, (float16_t)-0.214608811f,
+    (float16_t)0.976369731f, (float16_t)-0.216106797f,
+    (float16_t)0.976037079f, (float16_t)-0.217604275f,
+    (float16_t)0.975702130f, (float16_t)-0.219101240f,
+    (float16_t)0.975364885f, (float16_t)-0.220597690f,
+    (float16_t)0.975025345f, (float16_t)-0.222093621f,
+    (float16_t)0.974683511f, (float16_t)-0.223589029f,
+    (float16_t)0.974339383f, (float16_t)-0.225083911f,
+    (float16_t)0.973992962f, (float16_t)-0.226578264f,
+    (float16_t)0.973644250f, (float16_t)-0.228072083f,
+    (float16_t)0.973293246f, (float16_t)-0.229565366f,
+    (float16_t)0.972939952f, (float16_t)-0.231058108f,
+    (float16_t)0.972584369f, (float16_t)-0.232550307f,
+    (float16_t)0.972226497f, (float16_t)-0.234041959f,
+    (float16_t)0.971866337f, (float16_t)-0.235533059f,
+    (float16_t)0.971503891f, (float16_t)-0.237023606f,
+    (float16_t)0.971139158f, (float16_t)-0.238513595f,
+    (float16_t)0.970772141f, (float16_t)-0.240003022f,
+    (float16_t)0.970402839f, (float16_t)-0.241491885f,
+    (float16_t)0.970031253f, (float16_t)-0.242980180f,
+    (float16_t)0.969657385f, (float16_t)-0.244467903f,
+    (float16_t)0.969281235f, (float16_t)-0.245955050f,
+    (float16_t)0.968902805f, (float16_t)-0.247441619f,
+    (float16_t)0.968522094f, (float16_t)-0.248927606f,
+    (float16_t)0.968139105f, (float16_t)-0.250413007f,
+    (float16_t)0.967753837f, (float16_t)-0.251897818f,
+    (float16_t)0.967366292f, (float16_t)-0.253382037f,
+    (float16_t)0.966976471f, (float16_t)-0.254865660f,
+    (float16_t)0.966584374f, (float16_t)-0.256348682f,
+    (float16_t)0.966190003f, (float16_t)-0.257831102f,
+    (float16_t)0.965793359f, (float16_t)-0.259312915f,
+    (float16_t)0.965394442f, (float16_t)-0.260794118f,
+    (float16_t)0.964993253f, (float16_t)-0.262274707f,
+    (float16_t)0.964589793f, (float16_t)-0.263754679f,
+    (float16_t)0.964184064f, (float16_t)-0.265234030f,
+    (float16_t)0.963776066f, (float16_t)-0.266712757f,
+    (float16_t)0.963365800f, (float16_t)-0.268190857f,
+    (float16_t)0.962953267f, (float16_t)-0.269668326f,
+    (float16_t)0.962538468f, (float16_t)-0.271145160f,
+    (float16_t)0.962121404f, (float16_t)-0.272621355f,
+    (float16_t)0.961702077f, (float16_t)-0.274096910f,
+    (float16_t)0.961280486f, (float16_t)-0.275571819f,
+    (float16_t)0.960856633f, (float16_t)-0.277046080f,
+    (float16_t)0.960430519f, (float16_t)-0.278519689f,
+    (float16_t)0.960002146f, (float16_t)-0.279992643f,
+    (float16_t)0.959571513f, (float16_t)-0.281464938f,
+    (float16_t)0.959138622f, (float16_t)-0.282936570f,
+    (float16_t)0.958703475f, (float16_t)-0.284407537f,
+    (float16_t)0.958266071f, (float16_t)-0.285877835f,
+    (float16_t)0.957826413f, (float16_t)-0.287347460f,
+    (float16_t)0.957384501f, (float16_t)-0.288816408f,
+    (float16_t)0.956940336f, (float16_t)-0.290284677f,
+    (float16_t)0.956493919f, (float16_t)-0.291752263f,
+    (float16_t)0.956045251f, (float16_t)-0.293219163f,
+    (float16_t)0.955594334f, (float16_t)-0.294685372f,
+    (float16_t)0.955141168f, (float16_t)-0.296150888f,
+    (float16_t)0.954685755f, (float16_t)-0.297615707f,
+    (float16_t)0.954228095f, (float16_t)-0.299079826f,
+    (float16_t)0.953768190f, (float16_t)-0.300543241f,
+    (float16_t)0.953306040f, (float16_t)-0.302005949f,
+    (float16_t)0.952841648f, (float16_t)-0.303467947f,
+    (float16_t)0.952375013f, (float16_t)-0.304929230f,
+    (float16_t)0.951906137f, (float16_t)-0.306389795f,
+    (float16_t)0.951435021f, (float16_t)-0.307849640f,
+    (float16_t)0.950961666f, (float16_t)-0.309308760f,
+    (float16_t)0.950486074f, (float16_t)-0.310767153f,
+    (float16_t)0.950008245f, (float16_t)-0.312224814f,
+    (float16_t)0.949528181f, (float16_t)-0.313681740f,
+    (float16_t)0.949045882f, (float16_t)-0.315137929f,
+    (float16_t)0.948561350f, (float16_t)-0.316593376f,
+    (float16_t)0.948074586f, (float16_t)-0.318048077f,
+    (float16_t)0.947585591f, (float16_t)-0.319502031f,
+    (float16_t)0.947094366f, (float16_t)-0.320955232f,
+    (float16_t)0.946600913f, (float16_t)-0.322407679f,
+    (float16_t)0.946105232f, (float16_t)-0.323859367f,
+    (float16_t)0.945607325f, (float16_t)-0.325310292f,
+    (float16_t)0.945107193f, (float16_t)-0.326760452f,
+    (float16_t)0.944604837f, (float16_t)-0.328209844f,
+    (float16_t)0.944100258f, (float16_t)-0.329658463f,
+    (float16_t)0.943593458f, (float16_t)-0.331106306f,
+    (float16_t)0.943084437f, (float16_t)-0.332553370f,
+    (float16_t)0.942573198f, (float16_t)-0.333999651f,
+    (float16_t)0.942059740f, (float16_t)-0.335445147f,
+    (float16_t)0.941544065f, (float16_t)-0.336889853f,
+    (float16_t)0.941026175f, (float16_t)-0.338333767f,
+    (float16_t)0.940506071f, (float16_t)-0.339776884f,
+    (float16_t)0.939983753f, (float16_t)-0.341219202f,
+    (float16_t)0.939459224f, (float16_t)-0.342660717f,
+    (float16_t)0.938932484f, (float16_t)-0.344101426f,
+    (float16_t)0.938403534f, (float16_t)-0.345541325f,
+    (float16_t)0.937872376f, (float16_t)-0.346980411f,
+    (float16_t)0.937339012f, (float16_t)-0.348418680f,
+    (float16_t)0.936803442f, (float16_t)-0.349856130f,
+    (float16_t)0.936265667f, (float16_t)-0.351292756f,
+    (float16_t)0.935725689f, (float16_t)-0.352728556f,
+    (float16_t)0.935183510f, (float16_t)-0.354163525f,
+    (float16_t)0.934639130f, (float16_t)-0.355597662f,
+    (float16_t)0.934092550f, (float16_t)-0.357030961f,
+    (float16_t)0.933543773f, (float16_t)-0.358463421f,
+    (float16_t)0.932992799f, (float16_t)-0.359895037f,
+    (float16_t)0.932439629f, (float16_t)-0.361325806f,
+    (float16_t)0.931884266f, (float16_t)-0.362755724f,
+    (float16_t)0.931326709f, (float16_t)-0.364184790f,
+    (float16_t)0.930766961f, (float16_t)-0.365612998f,
+    (float16_t)0.930205023f, (float16_t)-0.367040346f,
+    (float16_t)0.929640896f, (float16_t)-0.368466830f,
+    (float16_t)0.929074581f, (float16_t)-0.369892447f,
+    (float16_t)0.928506080f, (float16_t)-0.371317194f,
+    (float16_t)0.927935395f, (float16_t)-0.372741067f,
+    (float16_t)0.927362526f, (float16_t)-0.374164063f,
+    (float16_t)0.926787474f, (float16_t)-0.375586178f,
+    (float16_t)0.926210242f, (float16_t)-0.377007410f,
+    (float16_t)0.925630831f, (float16_t)-0.378427755f,
+    (float16_t)0.925049241f, (float16_t)-0.379847209f,
+    (float16_t)0.924465474f, (float16_t)-0.381265769f,
+    (float16_t)0.923879533f, (float16_t)-0.382683432f,
+    (float16_t)0.923291417f, (float16_t)-0.384100195f,
+    (float16_t)0.922701128f, (float16_t)-0.385516054f,
+    (float16_t)0.922108669f, (float16_t)-0.386931006f,
+    (float16_t)0.921514039f, (float16_t)-0.388345047f,
+    (float16_t)0.920917242f, (float16_t)-0.389758174f,
+    (float16_t)0.920318277f, (float16_t)-0.391170384f,
+    (float16_t)0.919717146f, (float16_t)-0.392581674f,
+    (float16_t)0.919113852f, (float16_t)-0.393992040f,
+    (float16_t)0.918508394f, (float16_t)-0.395401479f,
+    (float16_t)0.917900776f, (float16_t)-0.396809987f,
+    (float16_t)0.917290997f, (float16_t)-0.398217562f,
+    (float16_t)0.916679060f, (float16_t)-0.399624200f,
+    (float16_t)0.916064966f, (float16_t)-0.401029897f,
+    (float16_t)0.915448716f, (float16_t)-0.402434651f,
+    (float16_t)0.914830312f, (float16_t)-0.403838458f,
+    (float16_t)0.914209756f, (float16_t)-0.405241314f,
+    (float16_t)0.913587048f, (float16_t)-0.406643217f,
+    (float16_t)0.912962190f, (float16_t)-0.408044163f,
+    (float16_t)0.912335185f, (float16_t)-0.409444149f,
+    (float16_t)0.911706032f, (float16_t)-0.410843171f,
+    (float16_t)0.911074734f, (float16_t)-0.412241227f,
+    (float16_t)0.910441292f, (float16_t)-0.413638312f,
+    (float16_t)0.909805708f, (float16_t)-0.415034424f,
+    (float16_t)0.909167983f, (float16_t)-0.416429560f,
+    (float16_t)0.908528119f, (float16_t)-0.417823716f,
+    (float16_t)0.907886116f, (float16_t)-0.419216888f,
+    (float16_t)0.907241978f, (float16_t)-0.420609074f,
+    (float16_t)0.906595705f, (float16_t)-0.422000271f,
+    (float16_t)0.905947298f, (float16_t)-0.423390474f,
+    (float16_t)0.905296759f, (float16_t)-0.424779681f,
+    (float16_t)0.904644091f, (float16_t)-0.426167889f,
+    (float16_t)0.903989293f, (float16_t)-0.427555093f,
+    (float16_t)0.903332368f, (float16_t)-0.428941292f,
+    (float16_t)0.902673318f, (float16_t)-0.430326481f,
+    (float16_t)0.902012144f, (float16_t)-0.431710658f,
+    (float16_t)0.901348847f, (float16_t)-0.433093819f,
+    (float16_t)0.900683429f, (float16_t)-0.434475961f,
+    (float16_t)0.900015892f, (float16_t)-0.435857080f,
+    (float16_t)0.899346237f, (float16_t)-0.437237174f,
+    (float16_t)0.898674466f, (float16_t)-0.438616239f,
+    (float16_t)0.898000580f, (float16_t)-0.439994271f,
+    (float16_t)0.897324581f, (float16_t)-0.441371269f,
+    (float16_t)0.896646470f, (float16_t)-0.442747228f,
+    (float16_t)0.895966250f, (float16_t)-0.444122145f,
+    (float16_t)0.895283921f, (float16_t)-0.445496017f,
+    (float16_t)0.894599486f, (float16_t)-0.446868840f,
+    (float16_t)0.893912945f, (float16_t)-0.448240612f,
+    (float16_t)0.893224301f, (float16_t)-0.449611330f,
+    (float16_t)0.892533555f, (float16_t)-0.450980989f,
+    (float16_t)0.891840709f, (float16_t)-0.452349587f,
+    (float16_t)0.891145765f, (float16_t)-0.453717121f,
+    (float16_t)0.890448723f, (float16_t)-0.455083587f,
+    (float16_t)0.889749586f, (float16_t)-0.456448982f,
+    (float16_t)0.889048356f, (float16_t)-0.457813304f,
+    (float16_t)0.888345033f, (float16_t)-0.459176548f,
+    (float16_t)0.887639620f, (float16_t)-0.460538711f,
+    (float16_t)0.886932119f, (float16_t)-0.461899791f,
+    (float16_t)0.886222530f, (float16_t)-0.463259784f,
+    (float16_t)0.885510856f, (float16_t)-0.464618686f,
+    (float16_t)0.884797098f, (float16_t)-0.465976496f,
+    (float16_t)0.884081259f, (float16_t)-0.467333209f,
+    (float16_t)0.883363339f, (float16_t)-0.468688822f,
+    (float16_t)0.882643340f, (float16_t)-0.470043332f,
+    (float16_t)0.881921264f, (float16_t)-0.471396737f,
+    (float16_t)0.881197113f, (float16_t)-0.472749032f,
+    (float16_t)0.880470889f, (float16_t)-0.474100215f,
+    (float16_t)0.879742593f, (float16_t)-0.475450282f,
+    (float16_t)0.879012226f, (float16_t)-0.476799230f,
+    (float16_t)0.878279792f, (float16_t)-0.478147056f,
+    (float16_t)0.877545290f, (float16_t)-0.479493758f,
+    (float16_t)0.876808724f, (float16_t)-0.480839331f,
+    (float16_t)0.876070094f, (float16_t)-0.482183772f,
+    (float16_t)0.875329403f, (float16_t)-0.483527079f,
+    (float16_t)0.874586652f, (float16_t)-0.484869248f,
+    (float16_t)0.873841843f, (float16_t)-0.486210276f,
+    (float16_t)0.873094978f, (float16_t)-0.487550160f,
+    (float16_t)0.872346059f, (float16_t)-0.488888897f,
+    (float16_t)0.871595087f, (float16_t)-0.490226483f,
+    (float16_t)0.870842063f, (float16_t)-0.491562916f,
+    (float16_t)0.870086991f, (float16_t)-0.492898192f,
+    (float16_t)0.869329871f, (float16_t)-0.494232309f,
+    (float16_t)0.868570706f, (float16_t)-0.495565262f,
+    (float16_t)0.867809497f, (float16_t)-0.496897049f,
+    (float16_t)0.867046246f, (float16_t)-0.498227667f,
+    (float16_t)0.866280954f, (float16_t)-0.499557113f,
+    (float16_t)0.865513624f, (float16_t)-0.500885383f,
+    (float16_t)0.864744258f, (float16_t)-0.502212474f,
+    (float16_t)0.863972856f, (float16_t)-0.503538384f,
+    (float16_t)0.863199422f, (float16_t)-0.504863109f,
+    (float16_t)0.862423956f, (float16_t)-0.506186645f,
+    (float16_t)0.861646461f, (float16_t)-0.507508991f,
+    (float16_t)0.860866939f, (float16_t)-0.508830143f,
+    (float16_t)0.860085390f, (float16_t)-0.510150097f,
+    (float16_t)0.859301818f, (float16_t)-0.511468850f,
+    (float16_t)0.858516224f, (float16_t)-0.512786401f,
+    (float16_t)0.857728610f, (float16_t)-0.514102744f,
+    (float16_t)0.856938977f, (float16_t)-0.515417878f,
+    (float16_t)0.856147328f, (float16_t)-0.516731799f,
+    (float16_t)0.855353665f, (float16_t)-0.518044504f,
+    (float16_t)0.854557988f, (float16_t)-0.519355990f,
+    (float16_t)0.853760301f, (float16_t)-0.520666254f,
+    (float16_t)0.852960605f, (float16_t)-0.521975293f,
+    (float16_t)0.852158902f, (float16_t)-0.523283103f,
+    (float16_t)0.851355193f, (float16_t)-0.524589683f,
+    (float16_t)0.850549481f, (float16_t)-0.525895027f,
+    (float16_t)0.849741768f, (float16_t)-0.527199135f,
+    (float16_t)0.848932055f, (float16_t)-0.528502002f,
+    (float16_t)0.848120345f, (float16_t)-0.529803625f,
+    (float16_t)0.847306639f, (float16_t)-0.531104001f,
+    (float16_t)0.846490939f, (float16_t)-0.532403128f,
+    (float16_t)0.845673247f, (float16_t)-0.533701002f,
+    (float16_t)0.844853565f, (float16_t)-0.534997620f,
+    (float16_t)0.844031895f, (float16_t)-0.536292979f,
+    (float16_t)0.843208240f, (float16_t)-0.537587076f,
+    (float16_t)0.842382600f, (float16_t)-0.538879909f,
+    (float16_t)0.841554977f, (float16_t)-0.540171473f,
+    (float16_t)0.840725375f, (float16_t)-0.541461766f,
+    (float16_t)0.839893794f, (float16_t)-0.542750785f,
+    (float16_t)0.839060237f, (float16_t)-0.544038527f,
+    (float16_t)0.838224706f, (float16_t)-0.545324988f,
+    (float16_t)0.837387202f, (float16_t)-0.546610167f,
+    (float16_t)0.836547727f, (float16_t)-0.547894059f,
+    (float16_t)0.835706284f, (float16_t)-0.549176662f,
+    (float16_t)0.834862875f, (float16_t)-0.550457973f,
+    (float16_t)0.834017501f, (float16_t)-0.551737988f,
+    (float16_t)0.833170165f, (float16_t)-0.553016706f,
+    (float16_t)0.832320868f, (float16_t)-0.554294121f,
+    (float16_t)0.831469612f, (float16_t)-0.555570233f,
+    (float16_t)0.830616400f, (float16_t)-0.556845037f,
+    (float16_t)0.829761234f, (float16_t)-0.558118531f,
+    (float16_t)0.828904115f, (float16_t)-0.559390712f,
+    (float16_t)0.828045045f, (float16_t)-0.560661576f,
+    (float16_t)0.827184027f, (float16_t)-0.561931121f,
+    (float16_t)0.826321063f, (float16_t)-0.563199344f,
+    (float16_t)0.825456154f, (float16_t)-0.564466242f,
+    (float16_t)0.824589303f, (float16_t)-0.565731811f,
+    (float16_t)0.823720511f, (float16_t)-0.566996049f,
+    (float16_t)0.822849781f, (float16_t)-0.568258953f,
+    (float16_t)0.821977115f, (float16_t)-0.569520519f,
+    (float16_t)0.821102515f, (float16_t)-0.570780746f,
+    (float16_t)0.820225983f, (float16_t)-0.572039629f,
+    (float16_t)0.819347520f, (float16_t)-0.573297167f,
+    (float16_t)0.818467130f, (float16_t)-0.574553355f,
+    (float16_t)0.817584813f, (float16_t)-0.575808191f,
+    (float16_t)0.816700573f, (float16_t)-0.577061673f,
+    (float16_t)0.815814411f, (float16_t)-0.578313796f,
+    (float16_t)0.814926329f, (float16_t)-0.579564559f,
+    (float16_t)0.814036330f, (float16_t)-0.580813958f,
+    (float16_t)0.813144415f, (float16_t)-0.582061990f,
+    (float16_t)0.812250587f, (float16_t)-0.583308653f,
+    (float16_t)0.811354847f, (float16_t)-0.584553943f,
+    (float16_t)0.810457198f, (float16_t)-0.585797857f,
+    (float16_t)0.809557642f, (float16_t)-0.587040394f,
+    (float16_t)0.808656182f, (float16_t)-0.588281548f,
+    (float16_t)0.807752818f, (float16_t)-0.589521319f,
+    (float16_t)0.806847554f, (float16_t)-0.590759702f,
+    (float16_t)0.805940391f, (float16_t)-0.591996695f,
+    (float16_t)0.805031331f, (float16_t)-0.593232295f,
+    (float16_t)0.804120377f, (float16_t)-0.594466499f,
+    (float16_t)0.803207531f, (float16_t)-0.595699304f,
+    (float16_t)0.802292796f, (float16_t)-0.596930708f,
+    (float16_t)0.801376172f, (float16_t)-0.598160707f,
+    (float16_t)0.800457662f, (float16_t)-0.599389298f,
+    (float16_t)0.799537269f, (float16_t)-0.600616479f,
+    (float16_t)0.798614995f, (float16_t)-0.601842247f,
+    (float16_t)0.797690841f, (float16_t)-0.603066599f,
+    (float16_t)0.796764810f, (float16_t)-0.604289531f,
+    (float16_t)0.795836905f, (float16_t)-0.605511041f,
+    (float16_t)0.794907126f, (float16_t)-0.606731127f,
+    (float16_t)0.793975478f, (float16_t)-0.607949785f,
+    (float16_t)0.793041960f, (float16_t)-0.609167012f,
+    (float16_t)0.792106577f, (float16_t)-0.610382806f,
+    (float16_t)0.791169330f, (float16_t)-0.611597164f,
+    (float16_t)0.790230221f, (float16_t)-0.612810082f,
+    (float16_t)0.789289253f, (float16_t)-0.614021559f,
+    (float16_t)0.788346428f, (float16_t)-0.615231591f,
+    (float16_t)0.787401747f, (float16_t)-0.616440175f,
+    (float16_t)0.786455214f, (float16_t)-0.617647308f,
+    (float16_t)0.785506830f, (float16_t)-0.618852988f,
+    (float16_t)0.784556597f, (float16_t)-0.620057212f,
+    (float16_t)0.783604519f, (float16_t)-0.621259977f,
+    (float16_t)0.782650596f, (float16_t)-0.622461279f,
+    (float16_t)0.781694832f, (float16_t)-0.623661118f,
+    (float16_t)0.780737229f, (float16_t)-0.624859488f,
+    (float16_t)0.779777788f, (float16_t)-0.626056388f,
+    (float16_t)0.778816512f, (float16_t)-0.627251815f,
+    (float16_t)0.777853404f, (float16_t)-0.628445767f,
+    (float16_t)0.776888466f, (float16_t)-0.629638239f,
+    (float16_t)0.775921699f, (float16_t)-0.630829230f,
+    (float16_t)0.774953107f, (float16_t)-0.632018736f,
+    (float16_t)0.773982691f, (float16_t)-0.633206755f,
+    (float16_t)0.773010453f, (float16_t)-0.634393284f,
+    (float16_t)0.772036397f, (float16_t)-0.635578320f,
+    (float16_t)0.771060524f, (float16_t)-0.636761861f,
+    (float16_t)0.770082837f, (float16_t)-0.637943904f,
+    (float16_t)0.769103338f, (float16_t)-0.639124445f,
+    (float16_t)0.768122029f, (float16_t)-0.640303482f,
+    (float16_t)0.767138912f, (float16_t)-0.641481013f,
+    (float16_t)0.766153990f, (float16_t)-0.642657034f,
+    (float16_t)0.765167266f, (float16_t)-0.643831543f,
+    (float16_t)0.764178741f, (float16_t)-0.645004537f,
+    (float16_t)0.763188417f, (float16_t)-0.646176013f,
+    (float16_t)0.762196298f, (float16_t)-0.647345969f,
+    (float16_t)0.761202385f, (float16_t)-0.648514401f,
+    (float16_t)0.760206682f, (float16_t)-0.649681307f,
+    (float16_t)0.759209189f, (float16_t)-0.650846685f,
+    (float16_t)0.758209910f, (float16_t)-0.652010531f,
+    (float16_t)0.757208847f, (float16_t)-0.653172843f,
+    (float16_t)0.756206001f, (float16_t)-0.654333618f,
+    (float16_t)0.755201377f, (float16_t)-0.655492853f,
+    (float16_t)0.754194975f, (float16_t)-0.656650546f,
+    (float16_t)0.753186799f, (float16_t)-0.657806693f,
+    (float16_t)0.752176850f, (float16_t)-0.658961293f,
+    (float16_t)0.751165132f, (float16_t)-0.660114342f,
+    (float16_t)0.750151646f, (float16_t)-0.661265838f,
+    (float16_t)0.749136395f, (float16_t)-0.662415778f,
+    (float16_t)0.748119380f, (float16_t)-0.663564159f,
+    (float16_t)0.747100606f, (float16_t)-0.664710978f,
+    (float16_t)0.746080074f, (float16_t)-0.665856234f,
+    (float16_t)0.745057785f, (float16_t)-0.666999922f,
+    (float16_t)0.744033744f, (float16_t)-0.668142041f,
+    (float16_t)0.743007952f, (float16_t)-0.669282588f,
+    (float16_t)0.741980412f, (float16_t)-0.670421560f,
+    (float16_t)0.740951125f, (float16_t)-0.671558955f,
+    (float16_t)0.739920095f, (float16_t)-0.672694769f,
+    (float16_t)0.738887324f, (float16_t)-0.673829000f,
+    (float16_t)0.737852815f, (float16_t)-0.674961646f,
+    (float16_t)0.736816569f, (float16_t)-0.676092704f,
+    (float16_t)0.735778589f, (float16_t)-0.677222170f,
+    (float16_t)0.734738878f, (float16_t)-0.678350043f,
+    (float16_t)0.733697438f, (float16_t)-0.679476320f,
+    (float16_t)0.732654272f, (float16_t)-0.680600998f,
+    (float16_t)0.731609381f, (float16_t)-0.681724074f,
+    (float16_t)0.730562769f, (float16_t)-0.682845546f,
+    (float16_t)0.729514438f, (float16_t)-0.683965412f,
+    (float16_t)0.728464390f, (float16_t)-0.685083668f,
+    (float16_t)0.727412629f, (float16_t)-0.686200312f,
+    (float16_t)0.726359155f, (float16_t)-0.687315341f,
+    (float16_t)0.725303972f, (float16_t)-0.688428753f,
+    (float16_t)0.724247083f, (float16_t)-0.689540545f,
+    (float16_t)0.723188489f, (float16_t)-0.690650714f,
+    (float16_t)0.722128194f, (float16_t)-0.691759258f,
+    (float16_t)0.721066199f, (float16_t)-0.692866175f,
+    (float16_t)0.720002508f, (float16_t)-0.693971461f,
+    (float16_t)0.718937122f, (float16_t)-0.695075114f,
+    (float16_t)0.717870045f, (float16_t)-0.696177131f,
+    (float16_t)0.716801279f, (float16_t)-0.697277511f,
+    (float16_t)0.715730825f, (float16_t)-0.698376249f,
+    (float16_t)0.714658688f, (float16_t)-0.699473345f,
+    (float16_t)0.713584869f, (float16_t)-0.700568794f,
+    (float16_t)0.712509371f, (float16_t)-0.701662595f,
+    (float16_t)0.711432196f, (float16_t)-0.702754744f,
+    (float16_t)0.710353347f, (float16_t)-0.703845241f,
+    (float16_t)0.709272826f, (float16_t)-0.704934080f,
+    (float16_t)0.708190637f, (float16_t)-0.706021261f,
+    (float16_t)0.707106781f, (float16_t)-0.707106781f,
+    (float16_t)0.706021261f, (float16_t)-0.708190637f,
+    (float16_t)0.704934080f, (float16_t)-0.709272826f,
+    (float16_t)0.703845241f, (float16_t)-0.710353347f,
+    (float16_t)0.702754744f, (float16_t)-0.711432196f,
+    (float16_t)0.701662595f, (float16_t)-0.712509371f,
+    (float16_t)0.700568794f, (float16_t)-0.713584869f,
+    (float16_t)0.699473345f, (float16_t)-0.714658688f,
+    (float16_t)0.698376249f, (float16_t)-0.715730825f,
+    (float16_t)0.697277511f, (float16_t)-0.716801279f,
+    (float16_t)0.696177131f, (float16_t)-0.717870045f,
+    (float16_t)0.695075114f, (float16_t)-0.718937122f,
+    (float16_t)0.693971461f, (float16_t)-0.720002508f,
+    (float16_t)0.692866175f, (float16_t)-0.721066199f,
+    (float16_t)0.691759258f, (float16_t)-0.722128194f,
+    (float16_t)0.690650714f, (float16_t)-0.723188489f,
+    (float16_t)0.689540545f, (float16_t)-0.724247083f,
+    (float16_t)0.688428753f, (float16_t)-0.725303972f,
+    (float16_t)0.687315341f, (float16_t)-0.726359155f,
+    (float16_t)0.686200312f, (float16_t)-0.727412629f,
+    (float16_t)0.685083668f, (float16_t)-0.728464390f,
+    (float16_t)0.683965412f, (float16_t)-0.729514438f,
+    (float16_t)0.682845546f, (float16_t)-0.730562769f,
+    (float16_t)0.681724074f, (float16_t)-0.731609381f,
+    (float16_t)0.680600998f, (float16_t)-0.732654272f,
+    (float16_t)0.679476320f, (float16_t)-0.733697438f,
+    (float16_t)0.678350043f, (float16_t)-0.734738878f,
+    (float16_t)0.677222170f, (float16_t)-0.735778589f,
+    (float16_t)0.676092704f, (float16_t)-0.736816569f,
+    (float16_t)0.674961646f, (float16_t)-0.737852815f,
+    (float16_t)0.673829000f, (float16_t)-0.738887324f,
+    (float16_t)0.672694769f, (float16_t)-0.739920095f,
+    (float16_t)0.671558955f, (float16_t)-0.740951125f,
+    (float16_t)0.670421560f, (float16_t)-0.741980412f,
+    (float16_t)0.669282588f, (float16_t)-0.743007952f,
+    (float16_t)0.668142041f, (float16_t)-0.744033744f,
+    (float16_t)0.666999922f, (float16_t)-0.745057785f,
+    (float16_t)0.665856234f, (float16_t)-0.746080074f,
+    (float16_t)0.664710978f, (float16_t)-0.747100606f,
+    (float16_t)0.663564159f, (float16_t)-0.748119380f,
+    (float16_t)0.662415778f, (float16_t)-0.749136395f,
+    (float16_t)0.661265838f, (float16_t)-0.750151646f,
+    (float16_t)0.660114342f, (float16_t)-0.751165132f,
+    (float16_t)0.658961293f, (float16_t)-0.752176850f,
+    (float16_t)0.657806693f, (float16_t)-0.753186799f,
+    (float16_t)0.656650546f, (float16_t)-0.754194975f,
+    (float16_t)0.655492853f, (float16_t)-0.755201377f,
+    (float16_t)0.654333618f, (float16_t)-0.756206001f,
+    (float16_t)0.653172843f, (float16_t)-0.757208847f,
+    (float16_t)0.652010531f, (float16_t)-0.758209910f,
+    (float16_t)0.650846685f, (float16_t)-0.759209189f,
+    (float16_t)0.649681307f, (float16_t)-0.760206682f,
+    (float16_t)0.648514401f, (float16_t)-0.761202385f,
+    (float16_t)0.647345969f, (float16_t)-0.762196298f,
+    (float16_t)0.646176013f, (float16_t)-0.763188417f,
+    (float16_t)0.645004537f, (float16_t)-0.764178741f,
+    (float16_t)0.643831543f, (float16_t)-0.765167266f,
+    (float16_t)0.642657034f, (float16_t)-0.766153990f,
+    (float16_t)0.641481013f, (float16_t)-0.767138912f,
+    (float16_t)0.640303482f, (float16_t)-0.768122029f,
+    (float16_t)0.639124445f, (float16_t)-0.769103338f,
+    (float16_t)0.637943904f, (float16_t)-0.770082837f,
+    (float16_t)0.636761861f, (float16_t)-0.771060524f,
+    (float16_t)0.635578320f, (float16_t)-0.772036397f,
+    (float16_t)0.634393284f, (float16_t)-0.773010453f,
+    (float16_t)0.633206755f, (float16_t)-0.773982691f,
+    (float16_t)0.632018736f, (float16_t)-0.774953107f,
+    (float16_t)0.630829230f, (float16_t)-0.775921699f,
+    (float16_t)0.629638239f, (float16_t)-0.776888466f,
+    (float16_t)0.628445767f, (float16_t)-0.777853404f,
+    (float16_t)0.627251815f, (float16_t)-0.778816512f,
+    (float16_t)0.626056388f, (float16_t)-0.779777788f,
+    (float16_t)0.624859488f, (float16_t)-0.780737229f,
+    (float16_t)0.623661118f, (float16_t)-0.781694832f,
+    (float16_t)0.622461279f, (float16_t)-0.782650596f,
+    (float16_t)0.621259977f, (float16_t)-0.783604519f,
+    (float16_t)0.620057212f, (float16_t)-0.784556597f,
+    (float16_t)0.618852988f, (float16_t)-0.785506830f,
+    (float16_t)0.617647308f, (float16_t)-0.786455214f,
+    (float16_t)0.616440175f, (float16_t)-0.787401747f,
+    (float16_t)0.615231591f, (float16_t)-0.788346428f,
+    (float16_t)0.614021559f, (float16_t)-0.789289253f,
+    (float16_t)0.612810082f, (float16_t)-0.790230221f,
+    (float16_t)0.611597164f, (float16_t)-0.791169330f,
+    (float16_t)0.610382806f, (float16_t)-0.792106577f,
+    (float16_t)0.609167012f, (float16_t)-0.793041960f,
+    (float16_t)0.607949785f, (float16_t)-0.793975478f,
+    (float16_t)0.606731127f, (float16_t)-0.794907126f,
+    (float16_t)0.605511041f, (float16_t)-0.795836905f,
+    (float16_t)0.604289531f, (float16_t)-0.796764810f,
+    (float16_t)0.603066599f, (float16_t)-0.797690841f,
+    (float16_t)0.601842247f, (float16_t)-0.798614995f,
+    (float16_t)0.600616479f, (float16_t)-0.799537269f,
+    (float16_t)0.599389298f, (float16_t)-0.800457662f,
+    (float16_t)0.598160707f, (float16_t)-0.801376172f,
+    (float16_t)0.596930708f, (float16_t)-0.802292796f,
+    (float16_t)0.595699304f, (float16_t)-0.803207531f,
+    (float16_t)0.594466499f, (float16_t)-0.804120377f,
+    (float16_t)0.593232295f, (float16_t)-0.805031331f,
+    (float16_t)0.591996695f, (float16_t)-0.805940391f,
+    (float16_t)0.590759702f, (float16_t)-0.806847554f,
+    (float16_t)0.589521319f, (float16_t)-0.807752818f,
+    (float16_t)0.588281548f, (float16_t)-0.808656182f,
+    (float16_t)0.587040394f, (float16_t)-0.809557642f,
+    (float16_t)0.585797857f, (float16_t)-0.810457198f,
+    (float16_t)0.584553943f, (float16_t)-0.811354847f,
+    (float16_t)0.583308653f, (float16_t)-0.812250587f,
+    (float16_t)0.582061990f, (float16_t)-0.813144415f,
+    (float16_t)0.580813958f, (float16_t)-0.814036330f,
+    (float16_t)0.579564559f, (float16_t)-0.814926329f,
+    (float16_t)0.578313796f, (float16_t)-0.815814411f,
+    (float16_t)0.577061673f, (float16_t)-0.816700573f,
+    (float16_t)0.575808191f, (float16_t)-0.817584813f,
+    (float16_t)0.574553355f, (float16_t)-0.818467130f,
+    (float16_t)0.573297167f, (float16_t)-0.819347520f,
+    (float16_t)0.572039629f, (float16_t)-0.820225983f,
+    (float16_t)0.570780746f, (float16_t)-0.821102515f,
+    (float16_t)0.569520519f, (float16_t)-0.821977115f,
+    (float16_t)0.568258953f, (float16_t)-0.822849781f,
+    (float16_t)0.566996049f, (float16_t)-0.823720511f,
+    (float16_t)0.565731811f, (float16_t)-0.824589303f,
+    (float16_t)0.564466242f, (float16_t)-0.825456154f,
+    (float16_t)0.563199344f, (float16_t)-0.826321063f,
+    (float16_t)0.561931121f, (float16_t)-0.827184027f,
+    (float16_t)0.560661576f, (float16_t)-0.828045045f,
+    (float16_t)0.559390712f, (float16_t)-0.828904115f,
+    (float16_t)0.558118531f, (float16_t)-0.829761234f,
+    (float16_t)0.556845037f, (float16_t)-0.830616400f,
+    (float16_t)0.555570233f, (float16_t)-0.831469612f,
+    (float16_t)0.554294121f, (float16_t)-0.832320868f,
+    (float16_t)0.553016706f, (float16_t)-0.833170165f,
+    (float16_t)0.551737988f, (float16_t)-0.834017501f,
+    (float16_t)0.550457973f, (float16_t)-0.834862875f,
+    (float16_t)0.549176662f, (float16_t)-0.835706284f,
+    (float16_t)0.547894059f, (float16_t)-0.836547727f,
+    (float16_t)0.546610167f, (float16_t)-0.837387202f,
+    (float16_t)0.545324988f, (float16_t)-0.838224706f,
+    (float16_t)0.544038527f, (float16_t)-0.839060237f,
+    (float16_t)0.542750785f, (float16_t)-0.839893794f,
+    (float16_t)0.541461766f, (float16_t)-0.840725375f,
+    (float16_t)0.540171473f, (float16_t)-0.841554977f,
+    (float16_t)0.538879909f, (float16_t)-0.842382600f,
+    (float16_t)0.537587076f, (float16_t)-0.843208240f,
+    (float16_t)0.536292979f, (float16_t)-0.844031895f,
+    (float16_t)0.534997620f, (float16_t)-0.844853565f,
+    (float16_t)0.533701002f, (float16_t)-0.845673247f,
+    (float16_t)0.532403128f, (float16_t)-0.846490939f,
+    (float16_t)0.531104001f, (float16_t)-0.847306639f,
+    (float16_t)0.529803625f, (float16_t)-0.848120345f,
+    (float16_t)0.528502002f, (float16_t)-0.848932055f,
+    (float16_t)0.527199135f, (float16_t)-0.849741768f,
+    (float16_t)0.525895027f, (float16_t)-0.850549481f,
+    (float16_t)0.524589683f, (float16_t)-0.851355193f,
+    (float16_t)0.523283103f, (float16_t)-0.852158902f,
+    (float16_t)0.521975293f, (float16_t)-0.852960605f,
+    (float16_t)0.520666254f, (float16_t)-0.853760301f,
+    (float16_t)0.519355990f, (float16_t)-0.854557988f,
+    (float16_t)0.518044504f, (float16_t)-0.855353665f,
+    (float16_t)0.516731799f, (float16_t)-0.856147328f,
+    (float16_t)0.515417878f, (float16_t)-0.856938977f,
+    (float16_t)0.514102744f, (float16_t)-0.857728610f,
+    (float16_t)0.512786401f, (float16_t)-0.858516224f,
+    (float16_t)0.511468850f, (float16_t)-0.859301818f,
+    (float16_t)0.510150097f, (float16_t)-0.860085390f,
+    (float16_t)0.508830143f, (float16_t)-0.860866939f,
+    (float16_t)0.507508991f, (float16_t)-0.861646461f,
+    (float16_t)0.506186645f, (float16_t)-0.862423956f,
+    (float16_t)0.504863109f, (float16_t)-0.863199422f,
+    (float16_t)0.503538384f, (float16_t)-0.863972856f,
+    (float16_t)0.502212474f, (float16_t)-0.864744258f,
+    (float16_t)0.500885383f, (float16_t)-0.865513624f,
+    (float16_t)0.499557113f, (float16_t)-0.866280954f,
+    (float16_t)0.498227667f, (float16_t)-0.867046246f,
+    (float16_t)0.496897049f, (float16_t)-0.867809497f,
+    (float16_t)0.495565262f, (float16_t)-0.868570706f,
+    (float16_t)0.494232309f, (float16_t)-0.869329871f,
+    (float16_t)0.492898192f, (float16_t)-0.870086991f,
+    (float16_t)0.491562916f, (float16_t)-0.870842063f,
+    (float16_t)0.490226483f, (float16_t)-0.871595087f,
+    (float16_t)0.488888897f, (float16_t)-0.872346059f,
+    (float16_t)0.487550160f, (float16_t)-0.873094978f,
+    (float16_t)0.486210276f, (float16_t)-0.873841843f,
+    (float16_t)0.484869248f, (float16_t)-0.874586652f,
+    (float16_t)0.483527079f, (float16_t)-0.875329403f,
+    (float16_t)0.482183772f, (float16_t)-0.876070094f,
+    (float16_t)0.480839331f, (float16_t)-0.876808724f,
+    (float16_t)0.479493758f, (float16_t)-0.877545290f,
+    (float16_t)0.478147056f, (float16_t)-0.878279792f,
+    (float16_t)0.476799230f, (float16_t)-0.879012226f,
+    (float16_t)0.475450282f, (float16_t)-0.879742593f,
+    (float16_t)0.474100215f, (float16_t)-0.880470889f,
+    (float16_t)0.472749032f, (float16_t)-0.881197113f,
+    (float16_t)0.471396737f, (float16_t)-0.881921264f,
+    (float16_t)0.470043332f, (float16_t)-0.882643340f,
+    (float16_t)0.468688822f, (float16_t)-0.883363339f,
+    (float16_t)0.467333209f, (float16_t)-0.884081259f,
+    (float16_t)0.465976496f, (float16_t)-0.884797098f,
+    (float16_t)0.464618686f, (float16_t)-0.885510856f,
+    (float16_t)0.463259784f, (float16_t)-0.886222530f,
+    (float16_t)0.461899791f, (float16_t)-0.886932119f,
+    (float16_t)0.460538711f, (float16_t)-0.887639620f,
+    (float16_t)0.459176548f, (float16_t)-0.888345033f,
+    (float16_t)0.457813304f, (float16_t)-0.889048356f,
+    (float16_t)0.456448982f, (float16_t)-0.889749586f,
+    (float16_t)0.455083587f, (float16_t)-0.890448723f,
+    (float16_t)0.453717121f, (float16_t)-0.891145765f,
+    (float16_t)0.452349587f, (float16_t)-0.891840709f,
+    (float16_t)0.450980989f, (float16_t)-0.892533555f,
+    (float16_t)0.449611330f, (float16_t)-0.893224301f,
+    (float16_t)0.448240612f, (float16_t)-0.893912945f,
+    (float16_t)0.446868840f, (float16_t)-0.894599486f,
+    (float16_t)0.445496017f, (float16_t)-0.895283921f,
+    (float16_t)0.444122145f, (float16_t)-0.895966250f,
+    (float16_t)0.442747228f, (float16_t)-0.896646470f,
+    (float16_t)0.441371269f, (float16_t)-0.897324581f,
+    (float16_t)0.439994271f, (float16_t)-0.898000580f,
+    (float16_t)0.438616239f, (float16_t)-0.898674466f,
+    (float16_t)0.437237174f, (float16_t)-0.899346237f,
+    (float16_t)0.435857080f, (float16_t)-0.900015892f,
+    (float16_t)0.434475961f, (float16_t)-0.900683429f,
+    (float16_t)0.433093819f, (float16_t)-0.901348847f,
+    (float16_t)0.431710658f, (float16_t)-0.902012144f,
+    (float16_t)0.430326481f, (float16_t)-0.902673318f,
+    (float16_t)0.428941292f, (float16_t)-0.903332368f,
+    (float16_t)0.427555093f, (float16_t)-0.903989293f,
+    (float16_t)0.426167889f, (float16_t)-0.904644091f,
+    (float16_t)0.424779681f, (float16_t)-0.905296759f,
+    (float16_t)0.423390474f, (float16_t)-0.905947298f,
+    (float16_t)0.422000271f, (float16_t)-0.906595705f,
+    (float16_t)0.420609074f, (float16_t)-0.907241978f,
+    (float16_t)0.419216888f, (float16_t)-0.907886116f,
+    (float16_t)0.417823716f, (float16_t)-0.908528119f,
+    (float16_t)0.416429560f, (float16_t)-0.909167983f,
+    (float16_t)0.415034424f, (float16_t)-0.909805708f,
+    (float16_t)0.413638312f, (float16_t)-0.910441292f,
+    (float16_t)0.412241227f, (float16_t)-0.911074734f,
+    (float16_t)0.410843171f, (float16_t)-0.911706032f,
+    (float16_t)0.409444149f, (float16_t)-0.912335185f,
+    (float16_t)0.408044163f, (float16_t)-0.912962190f,
+    (float16_t)0.406643217f, (float16_t)-0.913587048f,
+    (float16_t)0.405241314f, (float16_t)-0.914209756f,
+    (float16_t)0.403838458f, (float16_t)-0.914830312f,
+    (float16_t)0.402434651f, (float16_t)-0.915448716f,
+    (float16_t)0.401029897f, (float16_t)-0.916064966f,
+    (float16_t)0.399624200f, (float16_t)-0.916679060f,
+    (float16_t)0.398217562f, (float16_t)-0.917290997f,
+    (float16_t)0.396809987f, (float16_t)-0.917900776f,
+    (float16_t)0.395401479f, (float16_t)-0.918508394f,
+    (float16_t)0.393992040f, (float16_t)-0.919113852f,
+    (float16_t)0.392581674f, (float16_t)-0.919717146f,
+    (float16_t)0.391170384f, (float16_t)-0.920318277f,
+    (float16_t)0.389758174f, (float16_t)-0.920917242f,
+    (float16_t)0.388345047f, (float16_t)-0.921514039f,
+    (float16_t)0.386931006f, (float16_t)-0.922108669f,
+    (float16_t)0.385516054f, (float16_t)-0.922701128f,
+    (float16_t)0.384100195f, (float16_t)-0.923291417f,
+    (float16_t)0.382683432f, (float16_t)-0.923879533f,
+    (float16_t)0.381265769f, (float16_t)-0.924465474f,
+    (float16_t)0.379847209f, (float16_t)-0.925049241f,
+    (float16_t)0.378427755f, (float16_t)-0.925630831f,
+    (float16_t)0.377007410f, (float16_t)-0.926210242f,
+    (float16_t)0.375586178f, (float16_t)-0.926787474f,
+    (float16_t)0.374164063f, (float16_t)-0.927362526f,
+    (float16_t)0.372741067f, (float16_t)-0.927935395f,
+    (float16_t)0.371317194f, (float16_t)-0.928506080f,
+    (float16_t)0.369892447f, (float16_t)-0.929074581f,
+    (float16_t)0.368466830f, (float16_t)-0.929640896f,
+    (float16_t)0.367040346f, (float16_t)-0.930205023f,
+    (float16_t)0.365612998f, (float16_t)-0.930766961f,
+    (float16_t)0.364184790f, (float16_t)-0.931326709f,
+    (float16_t)0.362755724f, (float16_t)-0.931884266f,
+    (float16_t)0.361325806f, (float16_t)-0.932439629f,
+    (float16_t)0.359895037f, (float16_t)-0.932992799f,
+    (float16_t)0.358463421f, (float16_t)-0.933543773f,
+    (float16_t)0.357030961f, (float16_t)-0.934092550f,
+    (float16_t)0.355597662f, (float16_t)-0.934639130f,
+    (float16_t)0.354163525f, (float16_t)-0.935183510f,
+    (float16_t)0.352728556f, (float16_t)-0.935725689f,
+    (float16_t)0.351292756f, (float16_t)-0.936265667f,
+    (float16_t)0.349856130f, (float16_t)-0.936803442f,
+    (float16_t)0.348418680f, (float16_t)-0.937339012f,
+    (float16_t)0.346980411f, (float16_t)-0.937872376f,
+    (float16_t)0.345541325f, (float16_t)-0.938403534f,
+    (float16_t)0.344101426f, (float16_t)-0.938932484f,
+    (float16_t)0.342660717f, (float16_t)-0.939459224f,
+    (float16_t)0.341219202f, (float16_t)-0.939983753f,
+    (float16_t)0.339776884f, (float16_t)-0.940506071f,
+    (float16_t)0.338333767f, (float16_t)-0.941026175f,
+    (float16_t)0.336889853f, (float16_t)-0.941544065f,
+    (float16_t)0.335445147f, (float16_t)-0.942059740f,
+    (float16_t)0.333999651f, (float16_t)-0.942573198f,
+    (float16_t)0.332553370f, (float16_t)-0.943084437f,
+    (float16_t)0.331106306f, (float16_t)-0.943593458f,
+    (float16_t)0.329658463f, (float16_t)-0.944100258f,
+    (float16_t)0.328209844f, (float16_t)-0.944604837f,
+    (float16_t)0.326760452f, (float16_t)-0.945107193f,
+    (float16_t)0.325310292f, (float16_t)-0.945607325f,
+    (float16_t)0.323859367f, (float16_t)-0.946105232f,
+    (float16_t)0.322407679f, (float16_t)-0.946600913f,
+    (float16_t)0.320955232f, (float16_t)-0.947094366f,
+    (float16_t)0.319502031f, (float16_t)-0.947585591f,
+    (float16_t)0.318048077f, (float16_t)-0.948074586f,
+    (float16_t)0.316593376f, (float16_t)-0.948561350f,
+    (float16_t)0.315137929f, (float16_t)-0.949045882f,
+    (float16_t)0.313681740f, (float16_t)-0.949528181f,
+    (float16_t)0.312224814f, (float16_t)-0.950008245f,
+    (float16_t)0.310767153f, (float16_t)-0.950486074f,
+    (float16_t)0.309308760f, (float16_t)-0.950961666f,
+    (float16_t)0.307849640f, (float16_t)-0.951435021f,
+    (float16_t)0.306389795f, (float16_t)-0.951906137f,
+    (float16_t)0.304929230f, (float16_t)-0.952375013f,
+    (float16_t)0.303467947f, (float16_t)-0.952841648f,
+    (float16_t)0.302005949f, (float16_t)-0.953306040f,
+    (float16_t)0.300543241f, (float16_t)-0.953768190f,
+    (float16_t)0.299079826f, (float16_t)-0.954228095f,
+    (float16_t)0.297615707f, (float16_t)-0.954685755f,
+    (float16_t)0.296150888f, (float16_t)-0.955141168f,
+    (float16_t)0.294685372f, (float16_t)-0.955594334f,
+    (float16_t)0.293219163f, (float16_t)-0.956045251f,
+    (float16_t)0.291752263f, (float16_t)-0.956493919f,
+    (float16_t)0.290284677f, (float16_t)-0.956940336f,
+    (float16_t)0.288816408f, (float16_t)-0.957384501f,
+    (float16_t)0.287347460f, (float16_t)-0.957826413f,
+    (float16_t)0.285877835f, (float16_t)-0.958266071f,
+    (float16_t)0.284407537f, (float16_t)-0.958703475f,
+    (float16_t)0.282936570f, (float16_t)-0.959138622f,
+    (float16_t)0.281464938f, (float16_t)-0.959571513f,
+    (float16_t)0.279992643f, (float16_t)-0.960002146f,
+    (float16_t)0.278519689f, (float16_t)-0.960430519f,
+    (float16_t)0.277046080f, (float16_t)-0.960856633f,
+    (float16_t)0.275571819f, (float16_t)-0.961280486f,
+    (float16_t)0.274096910f, (float16_t)-0.961702077f,
+    (float16_t)0.272621355f, (float16_t)-0.962121404f,
+    (float16_t)0.271145160f, (float16_t)-0.962538468f,
+    (float16_t)0.269668326f, (float16_t)-0.962953267f,
+    (float16_t)0.268190857f, (float16_t)-0.963365800f,
+    (float16_t)0.266712757f, (float16_t)-0.963776066f,
+    (float16_t)0.265234030f, (float16_t)-0.964184064f,
+    (float16_t)0.263754679f, (float16_t)-0.964589793f,
+    (float16_t)0.262274707f, (float16_t)-0.964993253f,
+    (float16_t)0.260794118f, (float16_t)-0.965394442f,
+    (float16_t)0.259312915f, (float16_t)-0.965793359f,
+    (float16_t)0.257831102f, (float16_t)-0.966190003f,
+    (float16_t)0.256348682f, (float16_t)-0.966584374f,
+    (float16_t)0.254865660f, (float16_t)-0.966976471f,
+    (float16_t)0.253382037f, (float16_t)-0.967366292f,
+    (float16_t)0.251897818f, (float16_t)-0.967753837f,
+    (float16_t)0.250413007f, (float16_t)-0.968139105f,
+    (float16_t)0.248927606f, (float16_t)-0.968522094f,
+    (float16_t)0.247441619f, (float16_t)-0.968902805f,
+    (float16_t)0.245955050f, (float16_t)-0.969281235f,
+    (float16_t)0.244467903f, (float16_t)-0.969657385f,
+    (float16_t)0.242980180f, (float16_t)-0.970031253f,
+    (float16_t)0.241491885f, (float16_t)-0.970402839f,
+    (float16_t)0.240003022f, (float16_t)-0.970772141f,
+    (float16_t)0.238513595f, (float16_t)-0.971139158f,
+    (float16_t)0.237023606f, (float16_t)-0.971503891f,
+    (float16_t)0.235533059f, (float16_t)-0.971866337f,
+    (float16_t)0.234041959f, (float16_t)-0.972226497f,
+    (float16_t)0.232550307f, (float16_t)-0.972584369f,
+    (float16_t)0.231058108f, (float16_t)-0.972939952f,
+    (float16_t)0.229565366f, (float16_t)-0.973293246f,
+    (float16_t)0.228072083f, (float16_t)-0.973644250f,
+    (float16_t)0.226578264f, (float16_t)-0.973992962f,
+    (float16_t)0.225083911f, (float16_t)-0.974339383f,
+    (float16_t)0.223589029f, (float16_t)-0.974683511f,
+    (float16_t)0.222093621f, (float16_t)-0.975025345f,
+    (float16_t)0.220597690f, (float16_t)-0.975364885f,
+    (float16_t)0.219101240f, (float16_t)-0.975702130f,
+    (float16_t)0.217604275f, (float16_t)-0.976037079f,
+    (float16_t)0.216106797f, (float16_t)-0.976369731f,
+    (float16_t)0.214608811f, (float16_t)-0.976700086f,
+    (float16_t)0.213110320f, (float16_t)-0.977028143f,
+    (float16_t)0.211611327f, (float16_t)-0.977353900f,
+    (float16_t)0.210111837f, (float16_t)-0.977677358f,
+    (float16_t)0.208611852f, (float16_t)-0.977998515f,
+    (float16_t)0.207111376f, (float16_t)-0.978317371f,
+    (float16_t)0.205610413f, (float16_t)-0.978633924f,
+    (float16_t)0.204108966f, (float16_t)-0.978948175f,
+    (float16_t)0.202607039f, (float16_t)-0.979260123f,
+    (float16_t)0.201104635f, (float16_t)-0.979569766f,
+    (float16_t)0.199601758f, (float16_t)-0.979877104f,
+    (float16_t)0.198098411f, (float16_t)-0.980182136f,
+    (float16_t)0.196594598f, (float16_t)-0.980484862f,
+    (float16_t)0.195090322f, (float16_t)-0.980785280f,
+    (float16_t)0.193585587f, (float16_t)-0.981083391f,
+    (float16_t)0.192080397f, (float16_t)-0.981379193f,
+    (float16_t)0.190574755f, (float16_t)-0.981672686f,
+    (float16_t)0.189068664f, (float16_t)-0.981963869f,
+    (float16_t)0.187562129f, (float16_t)-0.982252741f,
+    (float16_t)0.186055152f, (float16_t)-0.982539302f,
+    (float16_t)0.184547737f, (float16_t)-0.982823551f,
+    (float16_t)0.183039888f, (float16_t)-0.983105487f,
+    (float16_t)0.181531608f, (float16_t)-0.983385110f,
+    (float16_t)0.180022901f, (float16_t)-0.983662419f,
+    (float16_t)0.178513771f, (float16_t)-0.983937413f,
+    (float16_t)0.177004220f, (float16_t)-0.984210092f,
+    (float16_t)0.175494253f, (float16_t)-0.984480455f,
+    (float16_t)0.173983873f, (float16_t)-0.984748502f,
+    (float16_t)0.172473084f, (float16_t)-0.985014231f,
+    (float16_t)0.170961889f, (float16_t)-0.985277642f,
+    (float16_t)0.169450291f, (float16_t)-0.985538735f,
+    (float16_t)0.167938295f, (float16_t)-0.985797509f,
+    (float16_t)0.166425904f, (float16_t)-0.986053963f,
+    (float16_t)0.164913120f, (float16_t)-0.986308097f,
+    (float16_t)0.163399949f, (float16_t)-0.986559910f,
+    (float16_t)0.161886394f, (float16_t)-0.986809402f,
+    (float16_t)0.160372457f, (float16_t)-0.987056571f,
+    (float16_t)0.158858143f, (float16_t)-0.987301418f,
+    (float16_t)0.157343456f, (float16_t)-0.987543942f,
+    (float16_t)0.155828398f, (float16_t)-0.987784142f,
+    (float16_t)0.154312973f, (float16_t)-0.988022017f,
+    (float16_t)0.152797185f, (float16_t)-0.988257568f,
+    (float16_t)0.151281038f, (float16_t)-0.988490793f,
+    (float16_t)0.149764535f, (float16_t)-0.988721692f,
+    (float16_t)0.148247679f, (float16_t)-0.988950265f,
+    (float16_t)0.146730474f, (float16_t)-0.989176510f,
+    (float16_t)0.145212925f, (float16_t)-0.989400428f,
+    (float16_t)0.143695033f, (float16_t)-0.989622017f,
+    (float16_t)0.142176804f, (float16_t)-0.989841278f,
+    (float16_t)0.140658239f, (float16_t)-0.990058210f,
+    (float16_t)0.139139344f, (float16_t)-0.990272812f,
+    (float16_t)0.137620122f, (float16_t)-0.990485084f,
+    (float16_t)0.136100575f, (float16_t)-0.990695025f,
+    (float16_t)0.134580709f, (float16_t)-0.990902635f,
+    (float16_t)0.133060525f, (float16_t)-0.991107914f,
+    (float16_t)0.131540029f, (float16_t)-0.991310860f,
+    (float16_t)0.130019223f, (float16_t)-0.991511473f,
+    (float16_t)0.128498111f, (float16_t)-0.991709754f,
+    (float16_t)0.126976696f, (float16_t)-0.991905700f,
+    (float16_t)0.125454983f, (float16_t)-0.992099313f,
+    (float16_t)0.123932975f, (float16_t)-0.992290591f,
+    (float16_t)0.122410675f, (float16_t)-0.992479535f,
+    (float16_t)0.120888087f, (float16_t)-0.992666142f,
+    (float16_t)0.119365215f, (float16_t)-0.992850414f,
+    (float16_t)0.117842062f, (float16_t)-0.993032350f,
+    (float16_t)0.116318631f, (float16_t)-0.993211949f,
+    (float16_t)0.114794927f, (float16_t)-0.993389211f,
+    (float16_t)0.113270952f, (float16_t)-0.993564136f,
+    (float16_t)0.111746711f, (float16_t)-0.993736722f,
+    (float16_t)0.110222207f, (float16_t)-0.993906970f,
+    (float16_t)0.108697444f, (float16_t)-0.994074879f,
+    (float16_t)0.107172425f, (float16_t)-0.994240449f,
+    (float16_t)0.105647154f, (float16_t)-0.994403680f,
+    (float16_t)0.104121634f, (float16_t)-0.994564571f,
+    (float16_t)0.102595869f, (float16_t)-0.994723121f,
+    (float16_t)0.101069863f, (float16_t)-0.994879331f,
+    (float16_t)0.099543619f, (float16_t)-0.995033199f,
+    (float16_t)0.098017140f, (float16_t)-0.995184727f,
+    (float16_t)0.096490431f, (float16_t)-0.995333912f,
+    (float16_t)0.094963495f, (float16_t)-0.995480755f,
+    (float16_t)0.093436336f, (float16_t)-0.995625256f,
+    (float16_t)0.091908956f, (float16_t)-0.995767414f,
+    (float16_t)0.090381361f, (float16_t)-0.995907229f,
+    (float16_t)0.088853553f, (float16_t)-0.996044701f,
+    (float16_t)0.087325535f, (float16_t)-0.996179829f,
+    (float16_t)0.085797312f, (float16_t)-0.996312612f,
+    (float16_t)0.084268888f, (float16_t)-0.996443051f,
+    (float16_t)0.082740265f, (float16_t)-0.996571146f,
+    (float16_t)0.081211447f, (float16_t)-0.996696895f,
+    (float16_t)0.079682438f, (float16_t)-0.996820299f,
+    (float16_t)0.078153242f, (float16_t)-0.996941358f,
+    (float16_t)0.076623861f, (float16_t)-0.997060070f,
+    (float16_t)0.075094301f, (float16_t)-0.997176437f,
+    (float16_t)0.073564564f, (float16_t)-0.997290457f,
+    (float16_t)0.072034653f, (float16_t)-0.997402130f,
+    (float16_t)0.070504573f, (float16_t)-0.997511456f,
+    (float16_t)0.068974328f, (float16_t)-0.997618435f,
+    (float16_t)0.067443920f, (float16_t)-0.997723067f,
+    (float16_t)0.065913353f, (float16_t)-0.997825350f,
+    (float16_t)0.064382631f, (float16_t)-0.997925286f,
+    (float16_t)0.062851758f, (float16_t)-0.998022874f,
+    (float16_t)0.061320736f, (float16_t)-0.998118113f,
+    (float16_t)0.059789571f, (float16_t)-0.998211003f,
+    (float16_t)0.058258265f, (float16_t)-0.998301545f,
+    (float16_t)0.056726821f, (float16_t)-0.998389737f,
+    (float16_t)0.055195244f, (float16_t)-0.998475581f,
+    (float16_t)0.053663538f, (float16_t)-0.998559074f,
+    (float16_t)0.052131705f, (float16_t)-0.998640218f,
+    (float16_t)0.050599749f, (float16_t)-0.998719012f,
+    (float16_t)0.049067674f, (float16_t)-0.998795456f,
+    (float16_t)0.047535484f, (float16_t)-0.998869550f,
+    (float16_t)0.046003182f, (float16_t)-0.998941293f,
+    (float16_t)0.044470772f, (float16_t)-0.999010686f,
+    (float16_t)0.042938257f, (float16_t)-0.999077728f,
+    (float16_t)0.041405641f, (float16_t)-0.999142419f,
+    (float16_t)0.039872928f, (float16_t)-0.999204759f,
+    (float16_t)0.038340120f, (float16_t)-0.999264747f,
+    (float16_t)0.036807223f, (float16_t)-0.999322385f,
+    (float16_t)0.035274239f, (float16_t)-0.999377670f,
+    (float16_t)0.033741172f, (float16_t)-0.999430605f,
+    (float16_t)0.032208025f, (float16_t)-0.999481187f,
+    (float16_t)0.030674803f, (float16_t)-0.999529418f,
+    (float16_t)0.029141509f, (float16_t)-0.999575296f,
+    (float16_t)0.027608146f, (float16_t)-0.999618822f,
+    (float16_t)0.026074718f, (float16_t)-0.999659997f,
+    (float16_t)0.024541229f, (float16_t)-0.999698819f,
+    (float16_t)0.023007681f, (float16_t)-0.999735288f,
+    (float16_t)0.021474080f, (float16_t)-0.999769405f,
+    (float16_t)0.019940429f, (float16_t)-0.999801170f,
+    (float16_t)0.018406730f, (float16_t)-0.999830582f,
+    (float16_t)0.016872988f, (float16_t)-0.999857641f,
+    (float16_t)0.015339206f, (float16_t)-0.999882347f,
+    (float16_t)0.013805389f, (float16_t)-0.999904701f,
+    (float16_t)0.012271538f, (float16_t)-0.999924702f,
+    (float16_t)0.010737659f, (float16_t)-0.999942350f,
+    (float16_t)0.009203755f, (float16_t)-0.999957645f,
+    (float16_t)0.007669829f, (float16_t)-0.999970586f,
+    (float16_t)0.006135885f, (float16_t)-0.999981175f,
+    (float16_t)0.004601926f, (float16_t)-0.999989411f,
+    (float16_t)0.003067957f, (float16_t)-0.999995294f,
+    (float16_t)0.001533980f, (float16_t)-0.999998823f
+};
+
+#endif /* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALL_TABLES) */
+
+#endif /*!defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)*/
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+const float16_t exp_tab_f16[8] = {
+    (1.f16),
+    (0.0416598916054f16),
+    (0.500000596046f16),
+    (0.00138889f16),
+    (1.00000011921f16),
+    (0.00833693705499f16),
+    (0.166665703058f16),
+    (0.000195780929062f16),
+};
+
+const float16_t __logf_lut_f16[8] = {
+    -2.295614848256274f16,         /*p0*/
+    -2.470711633419806f16,         /*p4*/
+    -5.686926051100417f16,         /*p2*/
+    -0.165253547131978f16,         /*p6*/
+    +5.175912446351073f16,         /*p1*/
+    +0.844006986174912f16,         /*p5*/
+    +4.584458825456749f16,         /*p3*/
+    +0.014127821926000f16          /*p7*/
+};
+
+#endif /* (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
+
+#endif /* Not ARM AC5 */
+
+
+/**
+  @} end of CFFT_CIFFT group
+*/
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
index b70c0aed..aff3a130 100644
--- a/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs.c
@@ -1,486 +1,654 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_const_structs.c
- * Description:  Constant structs that are initialized for user convenience.
- *               For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions.
- *
- * $Date:        27. January 2017
- * $Revision:    V.1.5.1
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_const_structs.h"
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) 
-
-/* Floating-point structs */
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
-  16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
-  32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
-  64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
-  128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
-  256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
-  512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
-  1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
-  2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
-const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
-  4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
-};
-#endif
-
-/* Fixed-point structs */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
-  16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
-  32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
-  64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
-  128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
-  256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
-  512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
-  1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
-  2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
-const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
-  4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
-  16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
-  32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
-  64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
-  128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
-  256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
-  512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
-  1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
-  2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
-const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
-  4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
-};
-#endif
-
-/* Structure for real-value inputs */
-/* Floating-point structs */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
-  { 16, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
-  32U,
-  (float32_t *)twiddleCoef_rfft_32
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
-   { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
-  64U,
-  (float32_t *)twiddleCoef_rfft_64
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
-  { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
-  128U,
-  (float32_t *)twiddleCoef_rfft_128
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
-  { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
-  256U,
-  (float32_t *)twiddleCoef_rfft_256
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
-  { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
-  512U,
-  (float32_t *)twiddleCoef_rfft_512
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
-  { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
-  1024U,
-  (float32_t *)twiddleCoef_rfft_1024
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
-  { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
-  2048U,
-  (float32_t *)twiddleCoef_rfft_2048
-};
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
-const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
-  { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
-  4096U,
-  (float32_t *)twiddleCoef_rfft_4096
-};
-#endif
-
-/* Fixed-point structs */
-/* q31_t */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
-  32U,
-  0,
-  1,
-  256U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len16
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
-  64U,
-  0,
-  1,
-  128U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len32
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
-  128U,
-  0,
-  1,
-  64U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len64
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
-  256U,
-  0,
-  1,
-  32U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len128
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
-  512U,
-  0,
-  1,
-  16U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len256
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
-  1024U,
-  0,
-  1,
-  8U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len512
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
-  2048U,
-  0,
-  1,
-  4U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len1024
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
-  4096U,
-  0,
-  1,
-  2U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len2048
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
-const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
-  8192U,
-  0,
-  1,
-  1U,
-  (q31_t*)realCoefAQ31,
-  (q31_t*)realCoefBQ31,
-  &arm_cfft_sR_q31_len4096
-};
-#endif
-
-/* q15_t */
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
-  32U,
-  0,
-  1,
-  256U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len16
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
-  64U,
-  0,
-  1,
-  128U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len32
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
-  128U,
-  0,
-  1,
-  64U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len64
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
-  256U,
-  0,
-  1,
-  32U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len128
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
-  512U,
-  0,
-  1,
-  16U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len256
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
-  1024U,
-  0,
-  1,
-  8U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len512
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
-  2048U,
-  0,
-  1,
-  4U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len1024
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
-  4096U,
-  0,
-  1,
-  2U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len2048
-};
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
-const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
-  8192U,
-  0,
-  1,
-  1U,
-  (q15_t*)realCoefAQ15,
-  (q15_t*)realCoefBQ15,
-  &arm_cfft_sR_q15_len4096
-};
-#endif
-
-#endif
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs.c
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions.
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math_types.h"
+#include "arm_const_structs.h"
+
+/*
+ALLOW TABLE is true when config table is enabled and the Tramsform folder is included 
+for compilation.
+*/
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+/* Floating-point structs */
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len16 = {
+  16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len32 = {
+  32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len64 = {
+  64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len128 = {
+  128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len256 = {
+  256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len512 = {
+  512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len1024 = {
+  1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len2048 = {
+  2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096))
+const arm_cfft_instance_f64 arm_cfft_sR_f64_len4096 = {
+  4096, (const float64_t *)twiddleCoefF64_4096, armBitRevIndexTableF64_4096, ARMBITREVINDEXTABLEF64_4096_TABLE_LENGTH
+};
+#endif
+
+/* Floating-point structs */
+#if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE)
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len16 = {
+  16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH
+};
+#endif
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len32 = {
+  32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len64 = {
+  64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len128 = {
+  128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len256 = {
+  256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len512 = {
+  512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024 = {
+  1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048 = {
+  2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
+const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096 = {
+  4096, twiddleCoef_4096, armBitRevIndexTable4096, ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
+};
+#endif
+
+#endif /* !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */
+
+/* Fixed-point structs */
+
+#if !defined(ARM_MATH_MVEI) || defined(ARM_MATH_AUTOVECTORIZE)
+
+/* 
+
+Those structures cannot be used to initialize the MVE version of the FFT Q31 instances.
+So they are not compiled when MVE is defined.
+
+For the MVE version, the new arm_cfft_init_f32 must be used.
+
+
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len16 = {
+  16, twiddleCoef_16_q31, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len32 = {
+  32, twiddleCoef_32_q31, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len64 = {
+  64, twiddleCoef_64_q31, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len128 = {
+  128, twiddleCoef_128_q31, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len256 = {
+  256, twiddleCoef_256_q31, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len512 = {
+  512, twiddleCoef_512_q31, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024 = {
+  1024, twiddleCoef_1024_q31, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048 = {
+  2048, twiddleCoef_2048_q31, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096 = {
+  4096, twiddleCoef_4096_q31, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+};
+#endif
+
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len16 = {
+  16, twiddleCoef_16_q15, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len32 = {
+  32, twiddleCoef_32_q15, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len64 = {
+  64, twiddleCoef_64_q15, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len128 = {
+  128, twiddleCoef_128_q15, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len256 = {
+  256, twiddleCoef_256_q15, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len512 = {
+  512, twiddleCoef_512_q15, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024 = {
+  1024, twiddleCoef_1024_q15, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048 = {
+  2048, twiddleCoef_2048_q15, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096 = {
+  4096, twiddleCoef_4096_q15, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+};
+#endif
+
+#endif /* !defined(ARM_MATH_MVEI) */
+
+/* Structure for real-value inputs */
+/* Double precision strucs */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len32 = {
+  { 16, (const float64_t *)twiddleCoefF64_16, armBitRevIndexTableF64_16, ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH },
+  32U,
+  (float64_t *)twiddleCoefF64_rfft_32
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len64 = {
+   { 32, (const float64_t *)twiddleCoefF64_32, armBitRevIndexTableF64_32, ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH },
+  64U,
+  (float64_t *)twiddleCoefF64_rfft_64
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len128 = {
+  { 64, (const float64_t *)twiddleCoefF64_64, armBitRevIndexTableF64_64, ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH },
+  128U,
+  (float64_t *)twiddleCoefF64_rfft_128
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len256 = {
+  { 128, (const float64_t *)twiddleCoefF64_128, armBitRevIndexTableF64_128, ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH },
+  256U,
+  (float64_t *)twiddleCoefF64_rfft_256
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len512 = {
+  { 256, (const float64_t *)twiddleCoefF64_256, armBitRevIndexTableF64_256, ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH },
+  512U,
+  (float64_t *)twiddleCoefF64_rfft_512
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len1024 = {
+  { 512, (const float64_t *)twiddleCoefF64_512, armBitRevIndexTableF64_512, ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH },
+  1024U,
+  (float64_t *)twiddleCoefF64_rfft_1024
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len2048 = {
+  { 1024, (const float64_t *)twiddleCoefF64_1024, armBitRevIndexTableF64_1024, ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH },
+  2048U,
+  (float64_t *)twiddleCoefF64_rfft_2048
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_4096) && defined(ARM_TABLE_BITREVIDX_FLT64_4096) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096))
+const arm_rfft_fast_instance_f64 arm_rfft_fast_sR_f64_len4096 = {
+  { 2048, (const float64_t *)twiddleCoefF64_2048, armBitRevIndexTableF64_2048, ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH },
+  4096U,
+  (float64_t *)twiddleCoefF64_rfft_4096
+};
+#endif
+
+/* Floating-point structs */
+
+#if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len32 = {
+  { 16, twiddleCoef_16, armBitRevIndexTable16, ARMBITREVINDEXTABLE_16_TABLE_LENGTH },
+  32U,
+  (float32_t *)twiddleCoef_rfft_32
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len64 = {
+   { 32, twiddleCoef_32, armBitRevIndexTable32, ARMBITREVINDEXTABLE_32_TABLE_LENGTH },
+  64U,
+  (float32_t *)twiddleCoef_rfft_64
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len128 = {
+  { 64, twiddleCoef_64, armBitRevIndexTable64, ARMBITREVINDEXTABLE_64_TABLE_LENGTH },
+  128U,
+  (float32_t *)twiddleCoef_rfft_128
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len256 = {
+  { 128, twiddleCoef_128, armBitRevIndexTable128, ARMBITREVINDEXTABLE_128_TABLE_LENGTH },
+  256U,
+  (float32_t *)twiddleCoef_rfft_256
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len512 = {
+  { 256, twiddleCoef_256, armBitRevIndexTable256, ARMBITREVINDEXTABLE_256_TABLE_LENGTH },
+  512U,
+  (float32_t *)twiddleCoef_rfft_512
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len1024 = {
+  { 512, twiddleCoef_512, armBitRevIndexTable512, ARMBITREVINDEXTABLE_512_TABLE_LENGTH },
+  1024U,
+  (float32_t *)twiddleCoef_rfft_1024
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len2048 = {
+  { 1024, twiddleCoef_1024, armBitRevIndexTable1024, ARMBITREVINDEXTABLE_1024_TABLE_LENGTH },
+  2048U,
+  (float32_t *)twiddleCoef_rfft_2048
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+const arm_rfft_fast_instance_f32 arm_rfft_fast_sR_f32_len4096 = {
+  { 2048, twiddleCoef_2048, armBitRevIndexTable2048, ARMBITREVINDEXTABLE_2048_TABLE_LENGTH },
+  4096U,
+  (float32_t *)twiddleCoef_rfft_4096
+};
+#endif
+
+#endif /* #if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */
+
+/* Fixed-point structs */
+/* q31_t */
+
+#if !defined(ARM_MATH_MVEI) || defined(ARM_MATH_AUTOVECTORIZE)
+
+/* 
+
+Those structures cannot be used to initialize the MVE version of the FFT Q31 instances.
+So they are not compiled when MVE is defined.
+
+For the MVE version, the new arm_cfft_init_f32 must be used.
+
+
+*/
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len32 = {
+  32U,
+  0,
+  1,
+  256U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len16
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len64 = {
+  64U,
+  0,
+  1,
+  128U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len32
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len128 = {
+  128U,
+  0,
+  1,
+  64U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len64
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len256 = {
+  256U,
+  0,
+  1,
+  32U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len128
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len512 = {
+  512U,
+  0,
+  1,
+  16U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len256
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len1024 = {
+  1024U,
+  0,
+  1,
+  8U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len512
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len2048 = {
+  2048U,
+  0,
+  1,
+  4U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len1024
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len4096 = {
+  4096U,
+  0,
+  1,
+  2U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len2048
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q31) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_rfft_instance_q31 arm_rfft_sR_q31_len8192 = {
+  8192U,
+  0,
+  1,
+  1U,
+  (q31_t*)realCoefAQ31,
+  (q31_t*)realCoefBQ31,
+  &arm_cfft_sR_q31_len4096
+};
+#endif
+
+
+
+/* q15_t */
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len32 = {
+  32U,
+  0,
+  1,
+  256U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len16
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len64 = {
+  64U,
+  0,
+  1,
+  128U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len32
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len128 = {
+  128U,
+  0,
+  1,
+  64U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len64
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len256 = {
+  256U,
+  0,
+  1,
+  32U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len128
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len512 = {
+  512U,
+  0,
+  1,
+  16U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len256
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len1024 = {
+  1024U,
+  0,
+  1,
+  8U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len512
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len2048 = {
+  2048U,
+  0,
+  1,
+  4U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len1024
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len4096 = {
+  4096U,
+  0,
+  1,
+  2U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len2048
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_REALCOEF_Q15) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+const arm_rfft_instance_q15 arm_rfft_sR_q15_len8192 = {
+  8192U,
+  0,
+  1,
+  1U,
+  (q15_t*)realCoefAQ15,
+  (q15_t*)realCoefBQ15,
+  &arm_cfft_sR_q15_len4096
+};
+#endif
+
+#endif /* !defined(ARM_MATH_MVEI) */
+
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs_f16.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs_f16.c
new file mode 100755
index 00000000..c0a20e5b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_const_structs_f16.c
@@ -0,0 +1,120 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_const_structs_f16.c
+ * Description:  Constant structs that are initialized for user convenience.
+ *               For example, some can be given as arguments to the arm_cfft_f32() or arm_rfft_f32() functions.
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_math_types_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include "arm_const_structs_f16.h"
+
+
+/*
+ALLOW TABLE is true when config table is enabled and the Tramsform folder is included 
+for compilation.
+*/
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+
+/* Floating-point structs */
+#if !defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_AUTOVECTORIZE)
+
+
+/* 
+
+Those structures cannot be used to initialize the MVE version of the FFT F32 instances.
+So they are not compiled when MVE is defined.
+
+For the MVE version, the new arm_cfft_init_f16 must be used.
+
+
+*/
+
+#if !defined(__CC_ARM)
+ 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len16 = {
+  16, twiddleCoefF16_16, armBitRevIndexTable_fixed_16, ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len32 = {
+  32, twiddleCoefF16_32, armBitRevIndexTable_fixed_32, ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len64 = {
+  64, twiddleCoefF16_64, armBitRevIndexTable_fixed_64, ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len128 = {
+  128, twiddleCoefF16_128, armBitRevIndexTable_fixed_128, ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len256 = {
+  256, twiddleCoefF16_256, armBitRevIndexTable_fixed_256, ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len512 = {
+  512, twiddleCoefF16_512, armBitRevIndexTable_fixed_512, ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len1024 = {
+  1024, twiddleCoefF16_1024, armBitRevIndexTable_fixed_1024, ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len2048 = {
+  2048, twiddleCoefF16_2048, armBitRevIndexTable_fixed_2048, ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
+};
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
+const arm_cfft_instance_f16 arm_cfft_sR_f16_len4096 = {
+  4096, twiddleCoefF16_4096, armBitRevIndexTable_fixed_4096, ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
+};
+#endif
+#endif 
+
+#endif /* !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+#endif
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c
new file mode 100755
index 00000000..cae4bd8d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_mve_tables.c
@@ -0,0 +1,6533 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mve_tables.c
+ * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
+ *               used for MVE implementation only
+ *
+ * @version  V1.10.0
+ * @date     04 October 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ #include "arm_math_types.h"
+
+ 
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_16_f32[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_16_f32[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_16_f32[2]={
+0,0,};
+
+float32_t rearranged_twiddle_stride1_16_f32[8]={
+1.00000000000000000000f,0.00000000000000000000f,0.92387950420379638672f,
+0.38268342614173889160f,0.70710676908493041992f,0.70710676908493041992f,
+0.38268342614173889160f,0.92387950420379638672f,};
+
+float32_t rearranged_twiddle_stride2_16_f32[8]={
+1.00000000000000000000f,0.00000000000000000000f,0.70710676908493041992f,
+0.70710676908493041992f,0.00000000000000006123f,1.00000000000000000000f,
+-0.70710676908493041992f,0.70710676908493041992f,};
+
+float32_t rearranged_twiddle_stride3_16_f32[8]={
+1.00000000000000000000f,0.00000000000000000000f,0.38268342614173889160f,
+0.92387950420379638672f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.92387950420379638672f,-0.38268342614173889160f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_64_f32[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_64_f32[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_64_f32[3]={
+0,32,0,};
+
+float32_t rearranged_twiddle_stride1_64_f32[40]={
+1.00000000000000000000f,0.00000000000000000000f,0.99518471956253051758f,
+0.09801714122295379639f,0.98078525066375732422f,0.19509032368659973145f,
+0.95694035291671752930f,0.29028466343879699707f,0.92387950420379638672f,
+0.38268342614173889160f,0.88192129135131835938f,0.47139674425125122070f,
+0.83146959543228149414f,0.55557024478912353516f,0.77301043272018432617f,
+0.63439327478408813477f,0.70710676908493041992f,0.70710676908493041992f,
+0.63439327478408813477f,0.77301043272018432617f,0.55557024478912353516f,
+0.83146959543228149414f,0.47139674425125122070f,0.88192129135131835938f,
+0.38268342614173889160f,0.92387950420379638672f,0.29028466343879699707f,
+0.95694035291671752930f,0.19509032368659973145f,0.98078525066375732422f,
+0.09801714122295379639f,0.99518471956253051758f,1.00000000000000000000f,
+0.00000000000000000000f,0.92387950420379638672f,0.38268342614173889160f,
+0.70710676908493041992f,0.70710676908493041992f,0.38268342614173889160f,
+0.92387950420379638672f,};
+
+float32_t rearranged_twiddle_stride2_64_f32[40]={
+1.00000000000000000000f,0.00000000000000000000f,0.98078525066375732422f,
+0.19509032368659973145f,0.92387950420379638672f,0.38268342614173889160f,
+0.83146959543228149414f,0.55557024478912353516f,0.70710676908493041992f,
+0.70710676908493041992f,0.55557024478912353516f,0.83146959543228149414f,
+0.38268342614173889160f,0.92387950420379638672f,0.19509032368659973145f,
+0.98078525066375732422f,0.00000000000000006123f,1.00000000000000000000f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.38268342614173889160f,
+0.92387950420379638672f,-0.55557024478912353516f,0.83146959543228149414f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.83146959543228149414f,
+0.55557024478912353516f,-0.92387950420379638672f,0.38268342614173889160f,
+-0.98078525066375732422f,0.19509032368659973145f,1.00000000000000000000f,
+0.00000000000000000000f,0.70710676908493041992f,0.70710676908493041992f,
+0.00000000000000006123f,1.00000000000000000000f,-0.70710676908493041992f,
+0.70710676908493041992f,};
+
+float32_t rearranged_twiddle_stride3_64_f32[40]={
+1.00000000000000000000f,0.00000000000000000000f,0.95694035291671752930f,
+0.29028466343879699707f,0.83146959543228149414f,0.55557024478912353516f,
+0.63439327478408813477f,0.77301043272018432617f,0.38268342614173889160f,
+0.92387950420379638672f,0.09801714122295379639f,0.99518471956253051758f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.47139674425125122070f,
+0.88192129135131835938f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.98078525066375732422f,
+0.19509032368659973145f,-0.99518471956253051758f,-0.09801714122295379639f,
+-0.92387950420379638672f,-0.38268342614173889160f,-0.77301043272018432617f,
+-0.63439327478408813477f,-0.55557024478912353516f,-0.83146959543228149414f,
+-0.29028466343879699707f,-0.95694035291671752930f,1.00000000000000000000f,
+0.00000000000000000000f,0.38268342614173889160f,0.92387950420379638672f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.92387950420379638672f,
+-0.38268342614173889160f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_256_f32[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_256_f32[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_256_f32[4]={
+0,128,160,0,};
+
+float32_t rearranged_twiddle_stride1_256_f32[168]={
+1.00000000000000000000f,0.00000000000000000000f,0.99969881772994995117f,
+0.02454122900962829590f,0.99879544973373413086f,0.04906767606735229492f,
+0.99729043245315551758f,0.07356456667184829712f,0.99518471956253051758f,
+0.09801714122295379639f,0.99247956275939941406f,0.12241067737340927124f,
+0.98917651176452636719f,0.14673046767711639404f,0.98527765274047851562f,
+0.17096188664436340332f,0.98078525066375732422f,0.19509032368659973145f,
+0.97570210695266723633f,0.21910123527050018311f,0.97003126144409179688f,
+0.24298018217086791992f,0.96377605199813842773f,0.26671275496482849121f,
+0.95694035291671752930f,0.29028466343879699707f,0.94952815771102905273f,
+0.31368175148963928223f,0.94154405593872070312f,0.33688986301422119141f,
+0.93299281597137451172f,0.35989505052566528320f,0.92387950420379638672f,
+0.38268342614173889160f,0.91420978307723999023f,0.40524131059646606445f,
+0.90398931503295898438f,0.42755508422851562500f,0.89322429895401000977f,
+0.44961133599281311035f,0.88192129135131835938f,0.47139674425125122070f,
+0.87008696794509887695f,0.49289819598197937012f,0.85772860050201416016f,
+0.51410275697708129883f,0.84485357999801635742f,0.53499764204025268555f,
+0.83146959543228149414f,0.55557024478912353516f,0.81758481264114379883f,
+0.57580816745758056641f,0.80320751667022705078f,0.59569931030273437500f,
+0.78834640979766845703f,0.61523157358169555664f,0.77301043272018432617f,
+0.63439327478408813477f,0.75720882415771484375f,0.65317285060882568359f,
+0.74095112085342407227f,0.67155897617340087891f,0.72424709796905517578f,
+0.68954056501388549805f,0.70710676908493041992f,0.70710676908493041992f,
+0.68954056501388549805f,0.72424709796905517578f,0.67155897617340087891f,
+0.74095112085342407227f,0.65317285060882568359f,0.75720882415771484375f,
+0.63439327478408813477f,0.77301043272018432617f,0.61523157358169555664f,
+0.78834640979766845703f,0.59569931030273437500f,0.80320751667022705078f,
+0.57580816745758056641f,0.81758481264114379883f,0.55557024478912353516f,
+0.83146959543228149414f,0.53499764204025268555f,0.84485357999801635742f,
+0.51410275697708129883f,0.85772860050201416016f,0.49289819598197937012f,
+0.87008696794509887695f,0.47139674425125122070f,0.88192129135131835938f,
+0.44961133599281311035f,0.89322429895401000977f,0.42755508422851562500f,
+0.90398931503295898438f,0.40524131059646606445f,0.91420978307723999023f,
+0.38268342614173889160f,0.92387950420379638672f,0.35989505052566528320f,
+0.93299281597137451172f,0.33688986301422119141f,0.94154405593872070312f,
+0.31368175148963928223f,0.94952815771102905273f,0.29028466343879699707f,
+0.95694035291671752930f,0.26671275496482849121f,0.96377605199813842773f,
+0.24298018217086791992f,0.97003126144409179688f,0.21910123527050018311f,
+0.97570210695266723633f,0.19509032368659973145f,0.98078525066375732422f,
+0.17096188664436340332f,0.98527765274047851562f,0.14673046767711639404f,
+0.98917651176452636719f,0.12241067737340927124f,0.99247956275939941406f,
+0.09801714122295379639f,0.99518471956253051758f,0.07356456667184829712f,
+0.99729043245315551758f,0.04906767606735229492f,0.99879544973373413086f,
+0.02454122900962829590f,0.99969881772994995117f,1.00000000000000000000f,
+0.00000000000000000000f,0.99518471956253051758f,0.09801714122295379639f,
+0.98078525066375732422f,0.19509032368659973145f,0.95694035291671752930f,
+0.29028466343879699707f,0.92387950420379638672f,0.38268342614173889160f,
+0.88192129135131835938f,0.47139674425125122070f,0.83146959543228149414f,
+0.55557024478912353516f,0.77301043272018432617f,0.63439327478408813477f,
+0.70710676908493041992f,0.70710676908493041992f,0.63439327478408813477f,
+0.77301043272018432617f,0.55557024478912353516f,0.83146959543228149414f,
+0.47139674425125122070f,0.88192129135131835938f,0.38268342614173889160f,
+0.92387950420379638672f,0.29028466343879699707f,0.95694035291671752930f,
+0.19509032368659973145f,0.98078525066375732422f,0.09801714122295379639f,
+0.99518471956253051758f,1.00000000000000000000f,0.00000000000000000000f,
+0.92387950420379638672f,0.38268342614173889160f,0.70710676908493041992f,
+0.70710676908493041992f,0.38268342614173889160f,0.92387950420379638672f,};
+
+float32_t rearranged_twiddle_stride2_256_f32[168]={
+1.00000000000000000000f,0.00000000000000000000f,0.99879544973373413086f,
+0.04906767606735229492f,0.99518471956253051758f,0.09801714122295379639f,
+0.98917651176452636719f,0.14673046767711639404f,0.98078525066375732422f,
+0.19509032368659973145f,0.97003126144409179688f,0.24298018217086791992f,
+0.95694035291671752930f,0.29028466343879699707f,0.94154405593872070312f,
+0.33688986301422119141f,0.92387950420379638672f,0.38268342614173889160f,
+0.90398931503295898438f,0.42755508422851562500f,0.88192129135131835938f,
+0.47139674425125122070f,0.85772860050201416016f,0.51410275697708129883f,
+0.83146959543228149414f,0.55557024478912353516f,0.80320751667022705078f,
+0.59569931030273437500f,0.77301043272018432617f,0.63439327478408813477f,
+0.74095112085342407227f,0.67155897617340087891f,0.70710676908493041992f,
+0.70710676908493041992f,0.67155897617340087891f,0.74095112085342407227f,
+0.63439327478408813477f,0.77301043272018432617f,0.59569931030273437500f,
+0.80320751667022705078f,0.55557024478912353516f,0.83146959543228149414f,
+0.51410275697708129883f,0.85772860050201416016f,0.47139674425125122070f,
+0.88192129135131835938f,0.42755508422851562500f,0.90398931503295898438f,
+0.38268342614173889160f,0.92387950420379638672f,0.33688986301422119141f,
+0.94154405593872070312f,0.29028466343879699707f,0.95694035291671752930f,
+0.24298018217086791992f,0.97003126144409179688f,0.19509032368659973145f,
+0.98078525066375732422f,0.14673046767711639404f,0.98917651176452636719f,
+0.09801714122295379639f,0.99518471956253051758f,0.04906767606735229492f,
+0.99879544973373413086f,0.00000000000000006123f,1.00000000000000000000f,
+-0.04906767606735229492f,0.99879544973373413086f,-0.09801714122295379639f,
+0.99518471956253051758f,-0.14673046767711639404f,0.98917651176452636719f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.24298018217086791992f,
+0.97003126144409179688f,-0.29028466343879699707f,0.95694035291671752930f,
+-0.33688986301422119141f,0.94154405593872070312f,-0.38268342614173889160f,
+0.92387950420379638672f,-0.42755508422851562500f,0.90398931503295898438f,
+-0.47139674425125122070f,0.88192129135131835938f,-0.51410275697708129883f,
+0.85772860050201416016f,-0.55557024478912353516f,0.83146959543228149414f,
+-0.59569931030273437500f,0.80320751667022705078f,-0.63439327478408813477f,
+0.77301043272018432617f,-0.67155897617340087891f,0.74095112085342407227f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.74095112085342407227f,
+0.67155897617340087891f,-0.77301043272018432617f,0.63439327478408813477f,
+-0.80320751667022705078f,0.59569931030273437500f,-0.83146959543228149414f,
+0.55557024478912353516f,-0.85772860050201416016f,0.51410275697708129883f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.90398931503295898438f,
+0.42755508422851562500f,-0.92387950420379638672f,0.38268342614173889160f,
+-0.94154405593872070312f,0.33688986301422119141f,-0.95694035291671752930f,
+0.29028466343879699707f,-0.97003126144409179688f,0.24298018217086791992f,
+-0.98078525066375732422f,0.19509032368659973145f,-0.98917651176452636719f,
+0.14673046767711639404f,-0.99518471956253051758f,0.09801714122295379639f,
+-0.99879544973373413086f,0.04906767606735229492f,1.00000000000000000000f,
+0.00000000000000000000f,0.98078525066375732422f,0.19509032368659973145f,
+0.92387950420379638672f,0.38268342614173889160f,0.83146959543228149414f,
+0.55557024478912353516f,0.70710676908493041992f,0.70710676908493041992f,
+0.55557024478912353516f,0.83146959543228149414f,0.38268342614173889160f,
+0.92387950420379638672f,0.19509032368659973145f,0.98078525066375732422f,
+0.00000000000000006123f,1.00000000000000000000f,-0.19509032368659973145f,
+0.98078525066375732422f,-0.38268342614173889160f,0.92387950420379638672f,
+-0.55557024478912353516f,0.83146959543228149414f,-0.70710676908493041992f,
+0.70710676908493041992f,-0.83146959543228149414f,0.55557024478912353516f,
+-0.92387950420379638672f,0.38268342614173889160f,-0.98078525066375732422f,
+0.19509032368659973145f,1.00000000000000000000f,0.00000000000000000000f,
+0.70710676908493041992f,0.70710676908493041992f,0.00000000000000006123f,
+1.00000000000000000000f,-0.70710676908493041992f,0.70710676908493041992f,};
+
+float32_t rearranged_twiddle_stride3_256_f32[168]={
+1.00000000000000000000f,0.00000000000000000000f,0.99729043245315551758f,
+0.07356456667184829712f,0.98917651176452636719f,0.14673046767711639404f,
+0.97570210695266723633f,0.21910123527050018311f,0.95694035291671752930f,
+0.29028466343879699707f,0.93299281597137451172f,0.35989505052566528320f,
+0.90398931503295898438f,0.42755508422851562500f,0.87008696794509887695f,
+0.49289819598197937012f,0.83146959543228149414f,0.55557024478912353516f,
+0.78834640979766845703f,0.61523157358169555664f,0.74095112085342407227f,
+0.67155897617340087891f,0.68954056501388549805f,0.72424709796905517578f,
+0.63439327478408813477f,0.77301043272018432617f,0.57580816745758056641f,
+0.81758481264114379883f,0.51410275697708129883f,0.85772860050201416016f,
+0.44961133599281311035f,0.89322429895401000977f,0.38268342614173889160f,
+0.92387950420379638672f,0.31368175148963928223f,0.94952815771102905273f,
+0.24298018217086791992f,0.97003126144409179688f,0.17096188664436340332f,
+0.98527765274047851562f,0.09801714122295379639f,0.99518471956253051758f,
+0.02454122900962829590f,0.99969881772994995117f,-0.04906767606735229492f,
+0.99879544973373413086f,-0.12241067737340927124f,0.99247956275939941406f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.26671275496482849121f,
+0.96377605199813842773f,-0.33688986301422119141f,0.94154405593872070312f,
+-0.40524131059646606445f,0.91420978307723999023f,-0.47139674425125122070f,
+0.88192129135131835938f,-0.53499764204025268555f,0.84485357999801635742f,
+-0.59569931030273437500f,0.80320751667022705078f,-0.65317285060882568359f,
+0.75720882415771484375f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.75720882415771484375f,0.65317285060882568359f,-0.80320751667022705078f,
+0.59569931030273437500f,-0.84485357999801635742f,0.53499764204025268555f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.91420978307723999023f,
+0.40524131059646606445f,-0.94154405593872070312f,0.33688986301422119141f,
+-0.96377605199813842773f,0.26671275496482849121f,-0.98078525066375732422f,
+0.19509032368659973145f,-0.99247956275939941406f,0.12241067737340927124f,
+-0.99879544973373413086f,0.04906767606735229492f,-0.99969881772994995117f,
+-0.02454122900962829590f,-0.99518471956253051758f,-0.09801714122295379639f,
+-0.98527765274047851562f,-0.17096188664436340332f,-0.97003126144409179688f,
+-0.24298018217086791992f,-0.94952815771102905273f,-0.31368175148963928223f,
+-0.92387950420379638672f,-0.38268342614173889160f,-0.89322429895401000977f,
+-0.44961133599281311035f,-0.85772860050201416016f,-0.51410275697708129883f,
+-0.81758481264114379883f,-0.57580816745758056641f,-0.77301043272018432617f,
+-0.63439327478408813477f,-0.72424709796905517578f,-0.68954056501388549805f,
+-0.67155897617340087891f,-0.74095112085342407227f,-0.61523157358169555664f,
+-0.78834640979766845703f,-0.55557024478912353516f,-0.83146959543228149414f,
+-0.49289819598197937012f,-0.87008696794509887695f,-0.42755508422851562500f,
+-0.90398931503295898438f,-0.35989505052566528320f,-0.93299281597137451172f,
+-0.29028466343879699707f,-0.95694035291671752930f,-0.21910123527050018311f,
+-0.97570210695266723633f,-0.14673046767711639404f,-0.98917651176452636719f,
+-0.07356456667184829712f,-0.99729043245315551758f,1.00000000000000000000f,
+0.00000000000000000000f,0.95694035291671752930f,0.29028466343879699707f,
+0.83146959543228149414f,0.55557024478912353516f,0.63439327478408813477f,
+0.77301043272018432617f,0.38268342614173889160f,0.92387950420379638672f,
+0.09801714122295379639f,0.99518471956253051758f,-0.19509032368659973145f,
+0.98078525066375732422f,-0.47139674425125122070f,0.88192129135131835938f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.88192129135131835938f,
+0.47139674425125122070f,-0.98078525066375732422f,0.19509032368659973145f,
+-0.99518471956253051758f,-0.09801714122295379639f,-0.92387950420379638672f,
+-0.38268342614173889160f,-0.77301043272018432617f,-0.63439327478408813477f,
+-0.55557024478912353516f,-0.83146959543228149414f,-0.29028466343879699707f,
+-0.95694035291671752930f,1.00000000000000000000f,0.00000000000000000000f,
+0.38268342614173889160f,0.92387950420379638672f,-0.70710676908493041992f,
+0.70710676908493041992f,-0.92387950420379638672f,-0.38268342614173889160f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_1024_f32[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_1024_f32[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_1024_f32[5]={
+0,512,640,672,0,};
+
+float32_t rearranged_twiddle_stride1_1024_f32[680]={
+1.00000000000000000000f,0.00000000000000000000f,0.99998116493225097656f,
+0.00613588467240333557f,0.99992471933364868164f,0.01227153837680816650f,
+0.99983060359954833984f,0.01840673014521598816f,0.99969881772994995117f,
+0.02454122900962829590f,0.99952942132949829102f,0.03067480400204658508f,
+0.99932235479354858398f,0.03680722415447235107f,0.99907773733139038086f,
+0.04293825849890708923f,0.99879544973373413086f,0.04906767606735229492f,
+0.99847555160522460938f,0.05519524589180946350f,0.99811810255050659180f,
+0.06132073700428009033f,0.99772304296493530273f,0.06744392216205596924f,
+0.99729043245315551758f,0.07356456667184829712f,0.99682027101516723633f,
+0.07968243956565856934f,0.99631261825561523438f,0.08579730987548828125f,
+0.99576741456985473633f,0.09190895408391952515f,0.99518471956253051758f,
+0.09801714122295379639f,0.99456459283828735352f,0.10412163287401199341f,
+0.99390697479248046875f,0.11022220551967620850f,0.99321192502975463867f,
+0.11631862819194793701f,0.99247956275939941406f,0.12241067737340927124f,
+0.99170976877212524414f,0.12849810719490051270f,0.99090266227722167969f,
+0.13458070158958435059f,0.99005818367004394531f,0.14065824449062347412f,
+0.98917651176452636719f,0.14673046767711639404f,0.98825758695602416992f,
+0.15279719233512878418f,0.98730140924453735352f,0.15885815024375915527f,
+0.98630809783935546875f,0.16491311788558959961f,0.98527765274047851562f,
+0.17096188664436340332f,0.98421007394790649414f,0.17700421810150146484f,
+0.98310548067092895508f,0.18303988873958587646f,0.98196387290954589844f,
+0.18906866014003753662f,0.98078525066375732422f,0.19509032368659973145f,
+0.97956979274749755859f,0.20110464096069335938f,0.97831737995147705078f,
+0.20711137354373931885f,0.97702813148498535156f,0.21311031281948089600f,
+0.97570210695266723633f,0.21910123527050018311f,0.97433936595916748047f,
+0.22508391737937927246f,0.97293996810913085938f,0.23105810582637786865f,
+0.97150391340255737305f,0.23702360689640045166f,0.97003126144409179688f,
+0.24298018217086791992f,0.96852207183837890625f,0.24892760813236236572f,
+0.96697646379470825195f,0.25486564636230468750f,0.96539443731307983398f,
+0.26079410314559936523f,0.96377605199813842773f,0.26671275496482849121f,
+0.96212142705917358398f,0.27262136340141296387f,0.96043050289154052734f,
+0.27851969003677368164f,0.95870345830917358398f,0.28440752625465393066f,
+0.95694035291671752930f,0.29028466343879699707f,0.95514118671417236328f,
+0.29615089297294616699f,0.95330601930618286133f,0.30200594663619995117f,
+0.95143502950668334961f,0.30784964561462402344f,0.94952815771102905273f,
+0.31368175148963928223f,0.94758558273315429688f,0.31950202584266662598f,
+0.94560730457305908203f,0.32531028985977172852f,0.94359344244003295898f,
+0.33110630512237548828f,0.94154405593872070312f,0.33688986301422119141f,
+0.93945920467376708984f,0.34266072511672973633f,0.93733900785446166992f,
+0.34841868281364440918f,0.93518352508544921875f,0.35416352748870849609f,
+0.93299281597137451172f,0.35989505052566528320f,0.93076694011688232422f,
+0.36561298370361328125f,0.92850607633590698242f,0.37131720781326293945f,
+0.92621022462844848633f,0.37700742483139038086f,0.92387950420379638672f,
+0.38268342614173889160f,0.92151403427124023438f,0.38834503293037414551f,
+0.91911387443542480469f,0.39399203658103942871f,0.91667908430099487305f,
+0.39962419867515563965f,0.91420978307723999023f,0.40524131059646606445f,
+0.91170603036880493164f,0.41084316372871398926f,0.90916800498962402344f,
+0.41642954945564270020f,0.90659570693969726562f,0.42200025916099548340f,
+0.90398931503295898438f,0.42755508422851562500f,0.90134882926940917969f,
+0.43309381604194641113f,0.89867448806762695312f,0.43861624598503112793f,
+0.89596623182296752930f,0.44412213563919067383f,0.89322429895401000977f,
+0.44961133599281311035f,0.89044874906539916992f,0.45508357882499694824f,
+0.88763964176177978516f,0.46053871512413024902f,0.88479709625244140625f,
+0.46597650647163391113f,0.88192129135131835938f,0.47139674425125122070f,
+0.87901222705841064453f,0.47679921984672546387f,0.87607008218765258789f,
+0.48218378424644470215f,0.87309497594833374023f,0.48755016922950744629f,
+0.87008696794509887695f,0.49289819598197937012f,0.86704623699188232422f,
+0.49822765588760375977f,0.86397284269332885742f,0.50353837013244628906f,
+0.86086696386337280273f,0.50883013010025024414f,0.85772860050201416016f,
+0.51410275697708129883f,0.85455799102783203125f,0.51935601234436035156f,
+0.85135519504547119141f,0.52458965778350830078f,0.84812033176422119141f,
+0.52980363368988037109f,0.84485357999801635742f,0.53499764204025268555f,
+0.84155499935150146484f,0.54017144441604614258f,0.83822470903396606445f,
+0.54532498121261596680f,0.83486288785934448242f,0.55045795440673828125f,
+0.83146959543228149414f,0.55557024478912353516f,0.82804507017135620117f,
+0.56066155433654785156f,0.82458931207656860352f,0.56573182344436645508f,
+0.82110249996185302734f,0.57078075408935546875f,0.81758481264114379883f,
+0.57580816745758056641f,0.81403630971908569336f,0.58081394433975219727f,
+0.81045717000961303711f,0.58579784631729125977f,0.80684757232666015625f,
+0.59075969457626342773f,0.80320751667022705078f,0.59569931030273437500f,
+0.79953724145889282227f,0.60061645507812500000f,0.79583692550659179688f,
+0.60551106929779052734f,0.79210656881332397461f,0.61038279533386230469f,
+0.78834640979766845703f,0.61523157358169555664f,0.78455656766891479492f,
+0.62005722522735595703f,0.78073722124099731445f,0.62485951185226440430f,
+0.77688848972320556641f,0.62963825464248657227f,0.77301043272018432617f,
+0.63439327478408813477f,0.76910334825515747070f,0.63912445306777954102f,
+0.76516723632812500000f,0.64383155107498168945f,0.76120239496231079102f,
+0.64851438999176025391f,0.75720882415771484375f,0.65317285060882568359f,
+0.75318682193756103516f,0.65780669450759887695f,0.74913638830184936523f,
+0.66241580247879028320f,0.74505776166915893555f,0.66699993610382080078f,
+0.74095112085342407227f,0.67155897617340087891f,0.73681658506393432617f,
+0.67609268426895141602f,0.73265427350997924805f,0.68060100078582763672f,
+0.72846436500549316406f,0.68508368730545043945f,0.72424709796905517578f,
+0.68954056501388549805f,0.72000253200531005859f,0.69397145509719848633f,
+0.71573084592819213867f,0.69837623834609985352f,0.71143221855163574219f,
+0.70275473594665527344f,0.70710676908493041992f,0.70710676908493041992f,
+0.70275473594665527344f,0.71143221855163574219f,0.69837623834609985352f,
+0.71573084592819213867f,0.69397145509719848633f,0.72000253200531005859f,
+0.68954056501388549805f,0.72424709796905517578f,0.68508368730545043945f,
+0.72846436500549316406f,0.68060100078582763672f,0.73265427350997924805f,
+0.67609268426895141602f,0.73681658506393432617f,0.67155897617340087891f,
+0.74095112085342407227f,0.66699993610382080078f,0.74505776166915893555f,
+0.66241580247879028320f,0.74913638830184936523f,0.65780669450759887695f,
+0.75318682193756103516f,0.65317285060882568359f,0.75720882415771484375f,
+0.64851438999176025391f,0.76120239496231079102f,0.64383155107498168945f,
+0.76516723632812500000f,0.63912445306777954102f,0.76910334825515747070f,
+0.63439327478408813477f,0.77301043272018432617f,0.62963825464248657227f,
+0.77688848972320556641f,0.62485951185226440430f,0.78073722124099731445f,
+0.62005722522735595703f,0.78455656766891479492f,0.61523157358169555664f,
+0.78834640979766845703f,0.61038279533386230469f,0.79210656881332397461f,
+0.60551106929779052734f,0.79583692550659179688f,0.60061645507812500000f,
+0.79953724145889282227f,0.59569931030273437500f,0.80320751667022705078f,
+0.59075969457626342773f,0.80684757232666015625f,0.58579784631729125977f,
+0.81045717000961303711f,0.58081394433975219727f,0.81403630971908569336f,
+0.57580816745758056641f,0.81758481264114379883f,0.57078075408935546875f,
+0.82110249996185302734f,0.56573182344436645508f,0.82458931207656860352f,
+0.56066155433654785156f,0.82804507017135620117f,0.55557024478912353516f,
+0.83146959543228149414f,0.55045795440673828125f,0.83486288785934448242f,
+0.54532498121261596680f,0.83822470903396606445f,0.54017144441604614258f,
+0.84155499935150146484f,0.53499764204025268555f,0.84485357999801635742f,
+0.52980363368988037109f,0.84812033176422119141f,0.52458965778350830078f,
+0.85135519504547119141f,0.51935601234436035156f,0.85455799102783203125f,
+0.51410275697708129883f,0.85772860050201416016f,0.50883013010025024414f,
+0.86086696386337280273f,0.50353837013244628906f,0.86397284269332885742f,
+0.49822765588760375977f,0.86704623699188232422f,0.49289819598197937012f,
+0.87008696794509887695f,0.48755016922950744629f,0.87309497594833374023f,
+0.48218378424644470215f,0.87607008218765258789f,0.47679921984672546387f,
+0.87901222705841064453f,0.47139674425125122070f,0.88192129135131835938f,
+0.46597650647163391113f,0.88479709625244140625f,0.46053871512413024902f,
+0.88763964176177978516f,0.45508357882499694824f,0.89044874906539916992f,
+0.44961133599281311035f,0.89322429895401000977f,0.44412213563919067383f,
+0.89596623182296752930f,0.43861624598503112793f,0.89867448806762695312f,
+0.43309381604194641113f,0.90134882926940917969f,0.42755508422851562500f,
+0.90398931503295898438f,0.42200025916099548340f,0.90659570693969726562f,
+0.41642954945564270020f,0.90916800498962402344f,0.41084316372871398926f,
+0.91170603036880493164f,0.40524131059646606445f,0.91420978307723999023f,
+0.39962419867515563965f,0.91667908430099487305f,0.39399203658103942871f,
+0.91911387443542480469f,0.38834503293037414551f,0.92151403427124023438f,
+0.38268342614173889160f,0.92387950420379638672f,0.37700742483139038086f,
+0.92621022462844848633f,0.37131720781326293945f,0.92850607633590698242f,
+0.36561298370361328125f,0.93076694011688232422f,0.35989505052566528320f,
+0.93299281597137451172f,0.35416352748870849609f,0.93518352508544921875f,
+0.34841868281364440918f,0.93733900785446166992f,0.34266072511672973633f,
+0.93945920467376708984f,0.33688986301422119141f,0.94154405593872070312f,
+0.33110630512237548828f,0.94359344244003295898f,0.32531028985977172852f,
+0.94560730457305908203f,0.31950202584266662598f,0.94758558273315429688f,
+0.31368175148963928223f,0.94952815771102905273f,0.30784964561462402344f,
+0.95143502950668334961f,0.30200594663619995117f,0.95330601930618286133f,
+0.29615089297294616699f,0.95514118671417236328f,0.29028466343879699707f,
+0.95694035291671752930f,0.28440752625465393066f,0.95870345830917358398f,
+0.27851969003677368164f,0.96043050289154052734f,0.27262136340141296387f,
+0.96212142705917358398f,0.26671275496482849121f,0.96377605199813842773f,
+0.26079410314559936523f,0.96539443731307983398f,0.25486564636230468750f,
+0.96697646379470825195f,0.24892760813236236572f,0.96852207183837890625f,
+0.24298018217086791992f,0.97003126144409179688f,0.23702360689640045166f,
+0.97150391340255737305f,0.23105810582637786865f,0.97293996810913085938f,
+0.22508391737937927246f,0.97433936595916748047f,0.21910123527050018311f,
+0.97570210695266723633f,0.21311031281948089600f,0.97702813148498535156f,
+0.20711137354373931885f,0.97831737995147705078f,0.20110464096069335938f,
+0.97956979274749755859f,0.19509032368659973145f,0.98078525066375732422f,
+0.18906866014003753662f,0.98196387290954589844f,0.18303988873958587646f,
+0.98310548067092895508f,0.17700421810150146484f,0.98421007394790649414f,
+0.17096188664436340332f,0.98527765274047851562f,0.16491311788558959961f,
+0.98630809783935546875f,0.15885815024375915527f,0.98730140924453735352f,
+0.15279719233512878418f,0.98825758695602416992f,0.14673046767711639404f,
+0.98917651176452636719f,0.14065824449062347412f,0.99005818367004394531f,
+0.13458070158958435059f,0.99090266227722167969f,0.12849810719490051270f,
+0.99170976877212524414f,0.12241067737340927124f,0.99247956275939941406f,
+0.11631862819194793701f,0.99321192502975463867f,0.11022220551967620850f,
+0.99390697479248046875f,0.10412163287401199341f,0.99456459283828735352f,
+0.09801714122295379639f,0.99518471956253051758f,0.09190895408391952515f,
+0.99576741456985473633f,0.08579730987548828125f,0.99631261825561523438f,
+0.07968243956565856934f,0.99682027101516723633f,0.07356456667184829712f,
+0.99729043245315551758f,0.06744392216205596924f,0.99772304296493530273f,
+0.06132073700428009033f,0.99811810255050659180f,0.05519524589180946350f,
+0.99847555160522460938f,0.04906767606735229492f,0.99879544973373413086f,
+0.04293825849890708923f,0.99907773733139038086f,0.03680722415447235107f,
+0.99932235479354858398f,0.03067480400204658508f,0.99952942132949829102f,
+0.02454122900962829590f,0.99969881772994995117f,0.01840673014521598816f,
+0.99983060359954833984f,0.01227153837680816650f,0.99992471933364868164f,
+0.00613588467240333557f,0.99998116493225097656f,1.00000000000000000000f,
+0.00000000000000000000f,0.99969881772994995117f,0.02454122900962829590f,
+0.99879544973373413086f,0.04906767606735229492f,0.99729043245315551758f,
+0.07356456667184829712f,0.99518471956253051758f,0.09801714122295379639f,
+0.99247956275939941406f,0.12241067737340927124f,0.98917651176452636719f,
+0.14673046767711639404f,0.98527765274047851562f,0.17096188664436340332f,
+0.98078525066375732422f,0.19509032368659973145f,0.97570210695266723633f,
+0.21910123527050018311f,0.97003126144409179688f,0.24298018217086791992f,
+0.96377605199813842773f,0.26671275496482849121f,0.95694035291671752930f,
+0.29028466343879699707f,0.94952815771102905273f,0.31368175148963928223f,
+0.94154405593872070312f,0.33688986301422119141f,0.93299281597137451172f,
+0.35989505052566528320f,0.92387950420379638672f,0.38268342614173889160f,
+0.91420978307723999023f,0.40524131059646606445f,0.90398931503295898438f,
+0.42755508422851562500f,0.89322429895401000977f,0.44961133599281311035f,
+0.88192129135131835938f,0.47139674425125122070f,0.87008696794509887695f,
+0.49289819598197937012f,0.85772860050201416016f,0.51410275697708129883f,
+0.84485357999801635742f,0.53499764204025268555f,0.83146959543228149414f,
+0.55557024478912353516f,0.81758481264114379883f,0.57580816745758056641f,
+0.80320751667022705078f,0.59569931030273437500f,0.78834640979766845703f,
+0.61523157358169555664f,0.77301043272018432617f,0.63439327478408813477f,
+0.75720882415771484375f,0.65317285060882568359f,0.74095112085342407227f,
+0.67155897617340087891f,0.72424709796905517578f,0.68954056501388549805f,
+0.70710676908493041992f,0.70710676908493041992f,0.68954056501388549805f,
+0.72424709796905517578f,0.67155897617340087891f,0.74095112085342407227f,
+0.65317285060882568359f,0.75720882415771484375f,0.63439327478408813477f,
+0.77301043272018432617f,0.61523157358169555664f,0.78834640979766845703f,
+0.59569931030273437500f,0.80320751667022705078f,0.57580816745758056641f,
+0.81758481264114379883f,0.55557024478912353516f,0.83146959543228149414f,
+0.53499764204025268555f,0.84485357999801635742f,0.51410275697708129883f,
+0.85772860050201416016f,0.49289819598197937012f,0.87008696794509887695f,
+0.47139674425125122070f,0.88192129135131835938f,0.44961133599281311035f,
+0.89322429895401000977f,0.42755508422851562500f,0.90398931503295898438f,
+0.40524131059646606445f,0.91420978307723999023f,0.38268342614173889160f,
+0.92387950420379638672f,0.35989505052566528320f,0.93299281597137451172f,
+0.33688986301422119141f,0.94154405593872070312f,0.31368175148963928223f,
+0.94952815771102905273f,0.29028466343879699707f,0.95694035291671752930f,
+0.26671275496482849121f,0.96377605199813842773f,0.24298018217086791992f,
+0.97003126144409179688f,0.21910123527050018311f,0.97570210695266723633f,
+0.19509032368659973145f,0.98078525066375732422f,0.17096188664436340332f,
+0.98527765274047851562f,0.14673046767711639404f,0.98917651176452636719f,
+0.12241067737340927124f,0.99247956275939941406f,0.09801714122295379639f,
+0.99518471956253051758f,0.07356456667184829712f,0.99729043245315551758f,
+0.04906767606735229492f,0.99879544973373413086f,0.02454122900962829590f,
+0.99969881772994995117f,1.00000000000000000000f,0.00000000000000000000f,
+0.99518471956253051758f,0.09801714122295379639f,0.98078525066375732422f,
+0.19509032368659973145f,0.95694035291671752930f,0.29028466343879699707f,
+0.92387950420379638672f,0.38268342614173889160f,0.88192129135131835938f,
+0.47139674425125122070f,0.83146959543228149414f,0.55557024478912353516f,
+0.77301043272018432617f,0.63439327478408813477f,0.70710676908493041992f,
+0.70710676908493041992f,0.63439327478408813477f,0.77301043272018432617f,
+0.55557024478912353516f,0.83146959543228149414f,0.47139674425125122070f,
+0.88192129135131835938f,0.38268342614173889160f,0.92387950420379638672f,
+0.29028466343879699707f,0.95694035291671752930f,0.19509032368659973145f,
+0.98078525066375732422f,0.09801714122295379639f,0.99518471956253051758f,
+1.00000000000000000000f,0.00000000000000000000f,0.92387950420379638672f,
+0.38268342614173889160f,0.70710676908493041992f,0.70710676908493041992f,
+0.38268342614173889160f,0.92387950420379638672f,};
+
+float32_t rearranged_twiddle_stride2_1024_f32[680]={
+1.00000000000000000000f,0.00000000000000000000f,0.99992471933364868164f,
+0.01227153837680816650f,0.99969881772994995117f,0.02454122900962829590f,
+0.99932235479354858398f,0.03680722415447235107f,0.99879544973373413086f,
+0.04906767606735229492f,0.99811810255050659180f,0.06132073700428009033f,
+0.99729043245315551758f,0.07356456667184829712f,0.99631261825561523438f,
+0.08579730987548828125f,0.99518471956253051758f,0.09801714122295379639f,
+0.99390697479248046875f,0.11022220551967620850f,0.99247956275939941406f,
+0.12241067737340927124f,0.99090266227722167969f,0.13458070158958435059f,
+0.98917651176452636719f,0.14673046767711639404f,0.98730140924453735352f,
+0.15885815024375915527f,0.98527765274047851562f,0.17096188664436340332f,
+0.98310548067092895508f,0.18303988873958587646f,0.98078525066375732422f,
+0.19509032368659973145f,0.97831737995147705078f,0.20711137354373931885f,
+0.97570210695266723633f,0.21910123527050018311f,0.97293996810913085938f,
+0.23105810582637786865f,0.97003126144409179688f,0.24298018217086791992f,
+0.96697646379470825195f,0.25486564636230468750f,0.96377605199813842773f,
+0.26671275496482849121f,0.96043050289154052734f,0.27851969003677368164f,
+0.95694035291671752930f,0.29028466343879699707f,0.95330601930618286133f,
+0.30200594663619995117f,0.94952815771102905273f,0.31368175148963928223f,
+0.94560730457305908203f,0.32531028985977172852f,0.94154405593872070312f,
+0.33688986301422119141f,0.93733900785446166992f,0.34841868281364440918f,
+0.93299281597137451172f,0.35989505052566528320f,0.92850607633590698242f,
+0.37131720781326293945f,0.92387950420379638672f,0.38268342614173889160f,
+0.91911387443542480469f,0.39399203658103942871f,0.91420978307723999023f,
+0.40524131059646606445f,0.90916800498962402344f,0.41642954945564270020f,
+0.90398931503295898438f,0.42755508422851562500f,0.89867448806762695312f,
+0.43861624598503112793f,0.89322429895401000977f,0.44961133599281311035f,
+0.88763964176177978516f,0.46053871512413024902f,0.88192129135131835938f,
+0.47139674425125122070f,0.87607008218765258789f,0.48218378424644470215f,
+0.87008696794509887695f,0.49289819598197937012f,0.86397284269332885742f,
+0.50353837013244628906f,0.85772860050201416016f,0.51410275697708129883f,
+0.85135519504547119141f,0.52458965778350830078f,0.84485357999801635742f,
+0.53499764204025268555f,0.83822470903396606445f,0.54532498121261596680f,
+0.83146959543228149414f,0.55557024478912353516f,0.82458931207656860352f,
+0.56573182344436645508f,0.81758481264114379883f,0.57580816745758056641f,
+0.81045717000961303711f,0.58579784631729125977f,0.80320751667022705078f,
+0.59569931030273437500f,0.79583692550659179688f,0.60551106929779052734f,
+0.78834640979766845703f,0.61523157358169555664f,0.78073722124099731445f,
+0.62485951185226440430f,0.77301043272018432617f,0.63439327478408813477f,
+0.76516723632812500000f,0.64383155107498168945f,0.75720882415771484375f,
+0.65317285060882568359f,0.74913638830184936523f,0.66241580247879028320f,
+0.74095112085342407227f,0.67155897617340087891f,0.73265427350997924805f,
+0.68060100078582763672f,0.72424709796905517578f,0.68954056501388549805f,
+0.71573084592819213867f,0.69837623834609985352f,0.70710676908493041992f,
+0.70710676908493041992f,0.69837623834609985352f,0.71573084592819213867f,
+0.68954056501388549805f,0.72424709796905517578f,0.68060100078582763672f,
+0.73265427350997924805f,0.67155897617340087891f,0.74095112085342407227f,
+0.66241580247879028320f,0.74913638830184936523f,0.65317285060882568359f,
+0.75720882415771484375f,0.64383155107498168945f,0.76516723632812500000f,
+0.63439327478408813477f,0.77301043272018432617f,0.62485951185226440430f,
+0.78073722124099731445f,0.61523157358169555664f,0.78834640979766845703f,
+0.60551106929779052734f,0.79583692550659179688f,0.59569931030273437500f,
+0.80320751667022705078f,0.58579784631729125977f,0.81045717000961303711f,
+0.57580816745758056641f,0.81758481264114379883f,0.56573182344436645508f,
+0.82458931207656860352f,0.55557024478912353516f,0.83146959543228149414f,
+0.54532498121261596680f,0.83822470903396606445f,0.53499764204025268555f,
+0.84485357999801635742f,0.52458965778350830078f,0.85135519504547119141f,
+0.51410275697708129883f,0.85772860050201416016f,0.50353837013244628906f,
+0.86397284269332885742f,0.49289819598197937012f,0.87008696794509887695f,
+0.48218378424644470215f,0.87607008218765258789f,0.47139674425125122070f,
+0.88192129135131835938f,0.46053871512413024902f,0.88763964176177978516f,
+0.44961133599281311035f,0.89322429895401000977f,0.43861624598503112793f,
+0.89867448806762695312f,0.42755508422851562500f,0.90398931503295898438f,
+0.41642954945564270020f,0.90916800498962402344f,0.40524131059646606445f,
+0.91420978307723999023f,0.39399203658103942871f,0.91911387443542480469f,
+0.38268342614173889160f,0.92387950420379638672f,0.37131720781326293945f,
+0.92850607633590698242f,0.35989505052566528320f,0.93299281597137451172f,
+0.34841868281364440918f,0.93733900785446166992f,0.33688986301422119141f,
+0.94154405593872070312f,0.32531028985977172852f,0.94560730457305908203f,
+0.31368175148963928223f,0.94952815771102905273f,0.30200594663619995117f,
+0.95330601930618286133f,0.29028466343879699707f,0.95694035291671752930f,
+0.27851969003677368164f,0.96043050289154052734f,0.26671275496482849121f,
+0.96377605199813842773f,0.25486564636230468750f,0.96697646379470825195f,
+0.24298018217086791992f,0.97003126144409179688f,0.23105810582637786865f,
+0.97293996810913085938f,0.21910123527050018311f,0.97570210695266723633f,
+0.20711137354373931885f,0.97831737995147705078f,0.19509032368659973145f,
+0.98078525066375732422f,0.18303988873958587646f,0.98310548067092895508f,
+0.17096188664436340332f,0.98527765274047851562f,0.15885815024375915527f,
+0.98730140924453735352f,0.14673046767711639404f,0.98917651176452636719f,
+0.13458070158958435059f,0.99090266227722167969f,0.12241067737340927124f,
+0.99247956275939941406f,0.11022220551967620850f,0.99390697479248046875f,
+0.09801714122295379639f,0.99518471956253051758f,0.08579730987548828125f,
+0.99631261825561523438f,0.07356456667184829712f,0.99729043245315551758f,
+0.06132073700428009033f,0.99811810255050659180f,0.04906767606735229492f,
+0.99879544973373413086f,0.03680722415447235107f,0.99932235479354858398f,
+0.02454122900962829590f,0.99969881772994995117f,0.01227153837680816650f,
+0.99992471933364868164f,0.00000000000000006123f,1.00000000000000000000f,
+-0.01227153837680816650f,0.99992471933364868164f,-0.02454122900962829590f,
+0.99969881772994995117f,-0.03680722415447235107f,0.99932235479354858398f,
+-0.04906767606735229492f,0.99879544973373413086f,-0.06132073700428009033f,
+0.99811810255050659180f,-0.07356456667184829712f,0.99729043245315551758f,
+-0.08579730987548828125f,0.99631261825561523438f,-0.09801714122295379639f,
+0.99518471956253051758f,-0.11022220551967620850f,0.99390697479248046875f,
+-0.12241067737340927124f,0.99247956275939941406f,-0.13458070158958435059f,
+0.99090266227722167969f,-0.14673046767711639404f,0.98917651176452636719f,
+-0.15885815024375915527f,0.98730140924453735352f,-0.17096188664436340332f,
+0.98527765274047851562f,-0.18303988873958587646f,0.98310548067092895508f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.20711137354373931885f,
+0.97831737995147705078f,-0.21910123527050018311f,0.97570210695266723633f,
+-0.23105810582637786865f,0.97293996810913085938f,-0.24298018217086791992f,
+0.97003126144409179688f,-0.25486564636230468750f,0.96697646379470825195f,
+-0.26671275496482849121f,0.96377605199813842773f,-0.27851969003677368164f,
+0.96043050289154052734f,-0.29028466343879699707f,0.95694035291671752930f,
+-0.30200594663619995117f,0.95330601930618286133f,-0.31368175148963928223f,
+0.94952815771102905273f,-0.32531028985977172852f,0.94560730457305908203f,
+-0.33688986301422119141f,0.94154405593872070312f,-0.34841868281364440918f,
+0.93733900785446166992f,-0.35989505052566528320f,0.93299281597137451172f,
+-0.37131720781326293945f,0.92850607633590698242f,-0.38268342614173889160f,
+0.92387950420379638672f,-0.39399203658103942871f,0.91911387443542480469f,
+-0.40524131059646606445f,0.91420978307723999023f,-0.41642954945564270020f,
+0.90916800498962402344f,-0.42755508422851562500f,0.90398931503295898438f,
+-0.43861624598503112793f,0.89867448806762695312f,-0.44961133599281311035f,
+0.89322429895401000977f,-0.46053871512413024902f,0.88763964176177978516f,
+-0.47139674425125122070f,0.88192129135131835938f,-0.48218378424644470215f,
+0.87607008218765258789f,-0.49289819598197937012f,0.87008696794509887695f,
+-0.50353837013244628906f,0.86397284269332885742f,-0.51410275697708129883f,
+0.85772860050201416016f,-0.52458965778350830078f,0.85135519504547119141f,
+-0.53499764204025268555f,0.84485357999801635742f,-0.54532498121261596680f,
+0.83822470903396606445f,-0.55557024478912353516f,0.83146959543228149414f,
+-0.56573182344436645508f,0.82458931207656860352f,-0.57580816745758056641f,
+0.81758481264114379883f,-0.58579784631729125977f,0.81045717000961303711f,
+-0.59569931030273437500f,0.80320751667022705078f,-0.60551106929779052734f,
+0.79583692550659179688f,-0.61523157358169555664f,0.78834640979766845703f,
+-0.62485951185226440430f,0.78073722124099731445f,-0.63439327478408813477f,
+0.77301043272018432617f,-0.64383155107498168945f,0.76516723632812500000f,
+-0.65317285060882568359f,0.75720882415771484375f,-0.66241580247879028320f,
+0.74913638830184936523f,-0.67155897617340087891f,0.74095112085342407227f,
+-0.68060100078582763672f,0.73265427350997924805f,-0.68954056501388549805f,
+0.72424709796905517578f,-0.69837623834609985352f,0.71573084592819213867f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.71573084592819213867f,
+0.69837623834609985352f,-0.72424709796905517578f,0.68954056501388549805f,
+-0.73265427350997924805f,0.68060100078582763672f,-0.74095112085342407227f,
+0.67155897617340087891f,-0.74913638830184936523f,0.66241580247879028320f,
+-0.75720882415771484375f,0.65317285060882568359f,-0.76516723632812500000f,
+0.64383155107498168945f,-0.77301043272018432617f,0.63439327478408813477f,
+-0.78073722124099731445f,0.62485951185226440430f,-0.78834640979766845703f,
+0.61523157358169555664f,-0.79583692550659179688f,0.60551106929779052734f,
+-0.80320751667022705078f,0.59569931030273437500f,-0.81045717000961303711f,
+0.58579784631729125977f,-0.81758481264114379883f,0.57580816745758056641f,
+-0.82458931207656860352f,0.56573182344436645508f,-0.83146959543228149414f,
+0.55557024478912353516f,-0.83822470903396606445f,0.54532498121261596680f,
+-0.84485357999801635742f,0.53499764204025268555f,-0.85135519504547119141f,
+0.52458965778350830078f,-0.85772860050201416016f,0.51410275697708129883f,
+-0.86397284269332885742f,0.50353837013244628906f,-0.87008696794509887695f,
+0.49289819598197937012f,-0.87607008218765258789f,0.48218378424644470215f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.88763964176177978516f,
+0.46053871512413024902f,-0.89322429895401000977f,0.44961133599281311035f,
+-0.89867448806762695312f,0.43861624598503112793f,-0.90398931503295898438f,
+0.42755508422851562500f,-0.90916800498962402344f,0.41642954945564270020f,
+-0.91420978307723999023f,0.40524131059646606445f,-0.91911387443542480469f,
+0.39399203658103942871f,-0.92387950420379638672f,0.38268342614173889160f,
+-0.92850607633590698242f,0.37131720781326293945f,-0.93299281597137451172f,
+0.35989505052566528320f,-0.93733900785446166992f,0.34841868281364440918f,
+-0.94154405593872070312f,0.33688986301422119141f,-0.94560730457305908203f,
+0.32531028985977172852f,-0.94952815771102905273f,0.31368175148963928223f,
+-0.95330601930618286133f,0.30200594663619995117f,-0.95694035291671752930f,
+0.29028466343879699707f,-0.96043050289154052734f,0.27851969003677368164f,
+-0.96377605199813842773f,0.26671275496482849121f,-0.96697646379470825195f,
+0.25486564636230468750f,-0.97003126144409179688f,0.24298018217086791992f,
+-0.97293996810913085938f,0.23105810582637786865f,-0.97570210695266723633f,
+0.21910123527050018311f,-0.97831737995147705078f,0.20711137354373931885f,
+-0.98078525066375732422f,0.19509032368659973145f,-0.98310548067092895508f,
+0.18303988873958587646f,-0.98527765274047851562f,0.17096188664436340332f,
+-0.98730140924453735352f,0.15885815024375915527f,-0.98917651176452636719f,
+0.14673046767711639404f,-0.99090266227722167969f,0.13458070158958435059f,
+-0.99247956275939941406f,0.12241067737340927124f,-0.99390697479248046875f,
+0.11022220551967620850f,-0.99518471956253051758f,0.09801714122295379639f,
+-0.99631261825561523438f,0.08579730987548828125f,-0.99729043245315551758f,
+0.07356456667184829712f,-0.99811810255050659180f,0.06132073700428009033f,
+-0.99879544973373413086f,0.04906767606735229492f,-0.99932235479354858398f,
+0.03680722415447235107f,-0.99969881772994995117f,0.02454122900962829590f,
+-0.99992471933364868164f,0.01227153837680816650f,1.00000000000000000000f,
+0.00000000000000000000f,0.99879544973373413086f,0.04906767606735229492f,
+0.99518471956253051758f,0.09801714122295379639f,0.98917651176452636719f,
+0.14673046767711639404f,0.98078525066375732422f,0.19509032368659973145f,
+0.97003126144409179688f,0.24298018217086791992f,0.95694035291671752930f,
+0.29028466343879699707f,0.94154405593872070312f,0.33688986301422119141f,
+0.92387950420379638672f,0.38268342614173889160f,0.90398931503295898438f,
+0.42755508422851562500f,0.88192129135131835938f,0.47139674425125122070f,
+0.85772860050201416016f,0.51410275697708129883f,0.83146959543228149414f,
+0.55557024478912353516f,0.80320751667022705078f,0.59569931030273437500f,
+0.77301043272018432617f,0.63439327478408813477f,0.74095112085342407227f,
+0.67155897617340087891f,0.70710676908493041992f,0.70710676908493041992f,
+0.67155897617340087891f,0.74095112085342407227f,0.63439327478408813477f,
+0.77301043272018432617f,0.59569931030273437500f,0.80320751667022705078f,
+0.55557024478912353516f,0.83146959543228149414f,0.51410275697708129883f,
+0.85772860050201416016f,0.47139674425125122070f,0.88192129135131835938f,
+0.42755508422851562500f,0.90398931503295898438f,0.38268342614173889160f,
+0.92387950420379638672f,0.33688986301422119141f,0.94154405593872070312f,
+0.29028466343879699707f,0.95694035291671752930f,0.24298018217086791992f,
+0.97003126144409179688f,0.19509032368659973145f,0.98078525066375732422f,
+0.14673046767711639404f,0.98917651176452636719f,0.09801714122295379639f,
+0.99518471956253051758f,0.04906767606735229492f,0.99879544973373413086f,
+0.00000000000000006123f,1.00000000000000000000f,-0.04906767606735229492f,
+0.99879544973373413086f,-0.09801714122295379639f,0.99518471956253051758f,
+-0.14673046767711639404f,0.98917651176452636719f,-0.19509032368659973145f,
+0.98078525066375732422f,-0.24298018217086791992f,0.97003126144409179688f,
+-0.29028466343879699707f,0.95694035291671752930f,-0.33688986301422119141f,
+0.94154405593872070312f,-0.38268342614173889160f,0.92387950420379638672f,
+-0.42755508422851562500f,0.90398931503295898438f,-0.47139674425125122070f,
+0.88192129135131835938f,-0.51410275697708129883f,0.85772860050201416016f,
+-0.55557024478912353516f,0.83146959543228149414f,-0.59569931030273437500f,
+0.80320751667022705078f,-0.63439327478408813477f,0.77301043272018432617f,
+-0.67155897617340087891f,0.74095112085342407227f,-0.70710676908493041992f,
+0.70710676908493041992f,-0.74095112085342407227f,0.67155897617340087891f,
+-0.77301043272018432617f,0.63439327478408813477f,-0.80320751667022705078f,
+0.59569931030273437500f,-0.83146959543228149414f,0.55557024478912353516f,
+-0.85772860050201416016f,0.51410275697708129883f,-0.88192129135131835938f,
+0.47139674425125122070f,-0.90398931503295898438f,0.42755508422851562500f,
+-0.92387950420379638672f,0.38268342614173889160f,-0.94154405593872070312f,
+0.33688986301422119141f,-0.95694035291671752930f,0.29028466343879699707f,
+-0.97003126144409179688f,0.24298018217086791992f,-0.98078525066375732422f,
+0.19509032368659973145f,-0.98917651176452636719f,0.14673046767711639404f,
+-0.99518471956253051758f,0.09801714122295379639f,-0.99879544973373413086f,
+0.04906767606735229492f,1.00000000000000000000f,0.00000000000000000000f,
+0.98078525066375732422f,0.19509032368659973145f,0.92387950420379638672f,
+0.38268342614173889160f,0.83146959543228149414f,0.55557024478912353516f,
+0.70710676908493041992f,0.70710676908493041992f,0.55557024478912353516f,
+0.83146959543228149414f,0.38268342614173889160f,0.92387950420379638672f,
+0.19509032368659973145f,0.98078525066375732422f,0.00000000000000006123f,
+1.00000000000000000000f,-0.19509032368659973145f,0.98078525066375732422f,
+-0.38268342614173889160f,0.92387950420379638672f,-0.55557024478912353516f,
+0.83146959543228149414f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.83146959543228149414f,0.55557024478912353516f,-0.92387950420379638672f,
+0.38268342614173889160f,-0.98078525066375732422f,0.19509032368659973145f,
+1.00000000000000000000f,0.00000000000000000000f,0.70710676908493041992f,
+0.70710676908493041992f,0.00000000000000006123f,1.00000000000000000000f,
+-0.70710676908493041992f,0.70710676908493041992f,};
+
+float32_t rearranged_twiddle_stride3_1024_f32[680]={
+1.00000000000000000000f,0.00000000000000000000f,0.99983060359954833984f,
+0.01840673014521598816f,0.99932235479354858398f,0.03680722415447235107f,
+0.99847555160522460938f,0.05519524589180946350f,0.99729043245315551758f,
+0.07356456667184829712f,0.99576741456985473633f,0.09190895408391952515f,
+0.99390697479248046875f,0.11022220551967620850f,0.99170976877212524414f,
+0.12849810719490051270f,0.98917651176452636719f,0.14673046767711639404f,
+0.98630809783935546875f,0.16491311788558959961f,0.98310548067092895508f,
+0.18303988873958587646f,0.97956979274749755859f,0.20110464096069335938f,
+0.97570210695266723633f,0.21910123527050018311f,0.97150391340255737305f,
+0.23702360689640045166f,0.96697646379470825195f,0.25486564636230468750f,
+0.96212142705917358398f,0.27262136340141296387f,0.95694035291671752930f,
+0.29028466343879699707f,0.95143502950668334961f,0.30784964561462402344f,
+0.94560730457305908203f,0.32531028985977172852f,0.93945920467376708984f,
+0.34266072511672973633f,0.93299281597137451172f,0.35989505052566528320f,
+0.92621022462844848633f,0.37700742483139038086f,0.91911387443542480469f,
+0.39399203658103942871f,0.91170603036880493164f,0.41084316372871398926f,
+0.90398931503295898438f,0.42755508422851562500f,0.89596623182296752930f,
+0.44412213563919067383f,0.88763964176177978516f,0.46053871512413024902f,
+0.87901222705841064453f,0.47679921984672546387f,0.87008696794509887695f,
+0.49289819598197937012f,0.86086696386337280273f,0.50883013010025024414f,
+0.85135519504547119141f,0.52458965778350830078f,0.84155499935150146484f,
+0.54017144441604614258f,0.83146959543228149414f,0.55557024478912353516f,
+0.82110249996185302734f,0.57078075408935546875f,0.81045717000961303711f,
+0.58579784631729125977f,0.79953724145889282227f,0.60061645507812500000f,
+0.78834640979766845703f,0.61523157358169555664f,0.77688848972320556641f,
+0.62963825464248657227f,0.76516723632812500000f,0.64383155107498168945f,
+0.75318682193756103516f,0.65780669450759887695f,0.74095112085342407227f,
+0.67155897617340087891f,0.72846436500549316406f,0.68508368730545043945f,
+0.71573084592819213867f,0.69837623834609985352f,0.70275473594665527344f,
+0.71143221855163574219f,0.68954056501388549805f,0.72424709796905517578f,
+0.67609268426895141602f,0.73681658506393432617f,0.66241580247879028320f,
+0.74913638830184936523f,0.64851438999176025391f,0.76120239496231079102f,
+0.63439327478408813477f,0.77301043272018432617f,0.62005722522735595703f,
+0.78455656766891479492f,0.60551106929779052734f,0.79583692550659179688f,
+0.59075969457626342773f,0.80684757232666015625f,0.57580816745758056641f,
+0.81758481264114379883f,0.56066155433654785156f,0.82804507017135620117f,
+0.54532498121261596680f,0.83822470903396606445f,0.52980363368988037109f,
+0.84812033176422119141f,0.51410275697708129883f,0.85772860050201416016f,
+0.49822765588760375977f,0.86704623699188232422f,0.48218378424644470215f,
+0.87607008218765258789f,0.46597650647163391113f,0.88479709625244140625f,
+0.44961133599281311035f,0.89322429895401000977f,0.43309381604194641113f,
+0.90134882926940917969f,0.41642954945564270020f,0.90916800498962402344f,
+0.39962419867515563965f,0.91667908430099487305f,0.38268342614173889160f,
+0.92387950420379638672f,0.36561298370361328125f,0.93076694011688232422f,
+0.34841868281364440918f,0.93733900785446166992f,0.33110630512237548828f,
+0.94359344244003295898f,0.31368175148963928223f,0.94952815771102905273f,
+0.29615089297294616699f,0.95514118671417236328f,0.27851969003677368164f,
+0.96043050289154052734f,0.26079410314559936523f,0.96539443731307983398f,
+0.24298018217086791992f,0.97003126144409179688f,0.22508391737937927246f,
+0.97433936595916748047f,0.20711137354373931885f,0.97831737995147705078f,
+0.18906866014003753662f,0.98196387290954589844f,0.17096188664436340332f,
+0.98527765274047851562f,0.15279719233512878418f,0.98825758695602416992f,
+0.13458070158958435059f,0.99090266227722167969f,0.11631862819194793701f,
+0.99321192502975463867f,0.09801714122295379639f,0.99518471956253051758f,
+0.07968243956565856934f,0.99682027101516723633f,0.06132073700428009033f,
+0.99811810255050659180f,0.04293825849890708923f,0.99907773733139038086f,
+0.02454122900962829590f,0.99969881772994995117f,0.00613588467240333557f,
+0.99998116493225097656f,-0.01227153837680816650f,0.99992471933364868164f,
+-0.03067480400204658508f,0.99952942132949829102f,-0.04906767606735229492f,
+0.99879544973373413086f,-0.06744392216205596924f,0.99772304296493530273f,
+-0.08579730987548828125f,0.99631261825561523438f,-0.10412163287401199341f,
+0.99456459283828735352f,-0.12241067737340927124f,0.99247956275939941406f,
+-0.14065824449062347412f,0.99005818367004394531f,-0.15885815024375915527f,
+0.98730140924453735352f,-0.17700421810150146484f,0.98421007394790649414f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.21311031281948089600f,
+0.97702813148498535156f,-0.23105810582637786865f,0.97293996810913085938f,
+-0.24892760813236236572f,0.96852207183837890625f,-0.26671275496482849121f,
+0.96377605199813842773f,-0.28440752625465393066f,0.95870345830917358398f,
+-0.30200594663619995117f,0.95330601930618286133f,-0.31950202584266662598f,
+0.94758558273315429688f,-0.33688986301422119141f,0.94154405593872070312f,
+-0.35416352748870849609f,0.93518352508544921875f,-0.37131720781326293945f,
+0.92850607633590698242f,-0.38834503293037414551f,0.92151403427124023438f,
+-0.40524131059646606445f,0.91420978307723999023f,-0.42200025916099548340f,
+0.90659570693969726562f,-0.43861624598503112793f,0.89867448806762695312f,
+-0.45508357882499694824f,0.89044874906539916992f,-0.47139674425125122070f,
+0.88192129135131835938f,-0.48755016922950744629f,0.87309497594833374023f,
+-0.50353837013244628906f,0.86397284269332885742f,-0.51935601234436035156f,
+0.85455799102783203125f,-0.53499764204025268555f,0.84485357999801635742f,
+-0.55045795440673828125f,0.83486288785934448242f,-0.56573182344436645508f,
+0.82458931207656860352f,-0.58081394433975219727f,0.81403630971908569336f,
+-0.59569931030273437500f,0.80320751667022705078f,-0.61038279533386230469f,
+0.79210656881332397461f,-0.62485951185226440430f,0.78073722124099731445f,
+-0.63912445306777954102f,0.76910334825515747070f,-0.65317285060882568359f,
+0.75720882415771484375f,-0.66699993610382080078f,0.74505776166915893555f,
+-0.68060100078582763672f,0.73265427350997924805f,-0.69397145509719848633f,
+0.72000253200531005859f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.72000253200531005859f,0.69397145509719848633f,-0.73265427350997924805f,
+0.68060100078582763672f,-0.74505776166915893555f,0.66699993610382080078f,
+-0.75720882415771484375f,0.65317285060882568359f,-0.76910334825515747070f,
+0.63912445306777954102f,-0.78073722124099731445f,0.62485951185226440430f,
+-0.79210656881332397461f,0.61038279533386230469f,-0.80320751667022705078f,
+0.59569931030273437500f,-0.81403630971908569336f,0.58081394433975219727f,
+-0.82458931207656860352f,0.56573182344436645508f,-0.83486288785934448242f,
+0.55045795440673828125f,-0.84485357999801635742f,0.53499764204025268555f,
+-0.85455799102783203125f,0.51935601234436035156f,-0.86397284269332885742f,
+0.50353837013244628906f,-0.87309497594833374023f,0.48755016922950744629f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.89044874906539916992f,
+0.45508357882499694824f,-0.89867448806762695312f,0.43861624598503112793f,
+-0.90659570693969726562f,0.42200025916099548340f,-0.91420978307723999023f,
+0.40524131059646606445f,-0.92151403427124023438f,0.38834503293037414551f,
+-0.92850607633590698242f,0.37131720781326293945f,-0.93518352508544921875f,
+0.35416352748870849609f,-0.94154405593872070312f,0.33688986301422119141f,
+-0.94758558273315429688f,0.31950202584266662598f,-0.95330601930618286133f,
+0.30200594663619995117f,-0.95870345830917358398f,0.28440752625465393066f,
+-0.96377605199813842773f,0.26671275496482849121f,-0.96852207183837890625f,
+0.24892760813236236572f,-0.97293996810913085938f,0.23105810582637786865f,
+-0.97702813148498535156f,0.21311031281948089600f,-0.98078525066375732422f,
+0.19509032368659973145f,-0.98421007394790649414f,0.17700421810150146484f,
+-0.98730140924453735352f,0.15885815024375915527f,-0.99005818367004394531f,
+0.14065824449062347412f,-0.99247956275939941406f,0.12241067737340927124f,
+-0.99456459283828735352f,0.10412163287401199341f,-0.99631261825561523438f,
+0.08579730987548828125f,-0.99772304296493530273f,0.06744392216205596924f,
+-0.99879544973373413086f,0.04906767606735229492f,-0.99952942132949829102f,
+0.03067480400204658508f,-0.99992471933364868164f,0.01227153837680816650f,
+-0.99998116493225097656f,-0.00613588467240333557f,-0.99969881772994995117f,
+-0.02454122900962829590f,-0.99907773733139038086f,-0.04293825849890708923f,
+-0.99811810255050659180f,-0.06132073700428009033f,-0.99682027101516723633f,
+-0.07968243956565856934f,-0.99518471956253051758f,-0.09801714122295379639f,
+-0.99321192502975463867f,-0.11631862819194793701f,-0.99090266227722167969f,
+-0.13458070158958435059f,-0.98825758695602416992f,-0.15279719233512878418f,
+-0.98527765274047851562f,-0.17096188664436340332f,-0.98196387290954589844f,
+-0.18906866014003753662f,-0.97831737995147705078f,-0.20711137354373931885f,
+-0.97433936595916748047f,-0.22508391737937927246f,-0.97003126144409179688f,
+-0.24298018217086791992f,-0.96539443731307983398f,-0.26079410314559936523f,
+-0.96043050289154052734f,-0.27851969003677368164f,-0.95514118671417236328f,
+-0.29615089297294616699f,-0.94952815771102905273f,-0.31368175148963928223f,
+-0.94359344244003295898f,-0.33110630512237548828f,-0.93733900785446166992f,
+-0.34841868281364440918f,-0.93076694011688232422f,-0.36561298370361328125f,
+-0.92387950420379638672f,-0.38268342614173889160f,-0.91667908430099487305f,
+-0.39962419867515563965f,-0.90916800498962402344f,-0.41642954945564270020f,
+-0.90134882926940917969f,-0.43309381604194641113f,-0.89322429895401000977f,
+-0.44961133599281311035f,-0.88479709625244140625f,-0.46597650647163391113f,
+-0.87607008218765258789f,-0.48218378424644470215f,-0.86704623699188232422f,
+-0.49822765588760375977f,-0.85772860050201416016f,-0.51410275697708129883f,
+-0.84812033176422119141f,-0.52980363368988037109f,-0.83822470903396606445f,
+-0.54532498121261596680f,-0.82804507017135620117f,-0.56066155433654785156f,
+-0.81758481264114379883f,-0.57580816745758056641f,-0.80684757232666015625f,
+-0.59075969457626342773f,-0.79583692550659179688f,-0.60551106929779052734f,
+-0.78455656766891479492f,-0.62005722522735595703f,-0.77301043272018432617f,
+-0.63439327478408813477f,-0.76120239496231079102f,-0.64851438999176025391f,
+-0.74913638830184936523f,-0.66241580247879028320f,-0.73681658506393432617f,
+-0.67609268426895141602f,-0.72424709796905517578f,-0.68954056501388549805f,
+-0.71143221855163574219f,-0.70275473594665527344f,-0.69837623834609985352f,
+-0.71573084592819213867f,-0.68508368730545043945f,-0.72846436500549316406f,
+-0.67155897617340087891f,-0.74095112085342407227f,-0.65780669450759887695f,
+-0.75318682193756103516f,-0.64383155107498168945f,-0.76516723632812500000f,
+-0.62963825464248657227f,-0.77688848972320556641f,-0.61523157358169555664f,
+-0.78834640979766845703f,-0.60061645507812500000f,-0.79953724145889282227f,
+-0.58579784631729125977f,-0.81045717000961303711f,-0.57078075408935546875f,
+-0.82110249996185302734f,-0.55557024478912353516f,-0.83146959543228149414f,
+-0.54017144441604614258f,-0.84155499935150146484f,-0.52458965778350830078f,
+-0.85135519504547119141f,-0.50883013010025024414f,-0.86086696386337280273f,
+-0.49289819598197937012f,-0.87008696794509887695f,-0.47679921984672546387f,
+-0.87901222705841064453f,-0.46053871512413024902f,-0.88763964176177978516f,
+-0.44412213563919067383f,-0.89596623182296752930f,-0.42755508422851562500f,
+-0.90398931503295898438f,-0.41084316372871398926f,-0.91170603036880493164f,
+-0.39399203658103942871f,-0.91911387443542480469f,-0.37700742483139038086f,
+-0.92621022462844848633f,-0.35989505052566528320f,-0.93299281597137451172f,
+-0.34266072511672973633f,-0.93945920467376708984f,-0.32531028985977172852f,
+-0.94560730457305908203f,-0.30784964561462402344f,-0.95143502950668334961f,
+-0.29028466343879699707f,-0.95694035291671752930f,-0.27262136340141296387f,
+-0.96212142705917358398f,-0.25486564636230468750f,-0.96697646379470825195f,
+-0.23702360689640045166f,-0.97150391340255737305f,-0.21910123527050018311f,
+-0.97570210695266723633f,-0.20110464096069335938f,-0.97956979274749755859f,
+-0.18303988873958587646f,-0.98310548067092895508f,-0.16491311788558959961f,
+-0.98630809783935546875f,-0.14673046767711639404f,-0.98917651176452636719f,
+-0.12849810719490051270f,-0.99170976877212524414f,-0.11022220551967620850f,
+-0.99390697479248046875f,-0.09190895408391952515f,-0.99576741456985473633f,
+-0.07356456667184829712f,-0.99729043245315551758f,-0.05519524589180946350f,
+-0.99847555160522460938f,-0.03680722415447235107f,-0.99932235479354858398f,
+-0.01840673014521598816f,-0.99983060359954833984f,1.00000000000000000000f,
+0.00000000000000000000f,0.99729043245315551758f,0.07356456667184829712f,
+0.98917651176452636719f,0.14673046767711639404f,0.97570210695266723633f,
+0.21910123527050018311f,0.95694035291671752930f,0.29028466343879699707f,
+0.93299281597137451172f,0.35989505052566528320f,0.90398931503295898438f,
+0.42755508422851562500f,0.87008696794509887695f,0.49289819598197937012f,
+0.83146959543228149414f,0.55557024478912353516f,0.78834640979766845703f,
+0.61523157358169555664f,0.74095112085342407227f,0.67155897617340087891f,
+0.68954056501388549805f,0.72424709796905517578f,0.63439327478408813477f,
+0.77301043272018432617f,0.57580816745758056641f,0.81758481264114379883f,
+0.51410275697708129883f,0.85772860050201416016f,0.44961133599281311035f,
+0.89322429895401000977f,0.38268342614173889160f,0.92387950420379638672f,
+0.31368175148963928223f,0.94952815771102905273f,0.24298018217086791992f,
+0.97003126144409179688f,0.17096188664436340332f,0.98527765274047851562f,
+0.09801714122295379639f,0.99518471956253051758f,0.02454122900962829590f,
+0.99969881772994995117f,-0.04906767606735229492f,0.99879544973373413086f,
+-0.12241067737340927124f,0.99247956275939941406f,-0.19509032368659973145f,
+0.98078525066375732422f,-0.26671275496482849121f,0.96377605199813842773f,
+-0.33688986301422119141f,0.94154405593872070312f,-0.40524131059646606445f,
+0.91420978307723999023f,-0.47139674425125122070f,0.88192129135131835938f,
+-0.53499764204025268555f,0.84485357999801635742f,-0.59569931030273437500f,
+0.80320751667022705078f,-0.65317285060882568359f,0.75720882415771484375f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.75720882415771484375f,
+0.65317285060882568359f,-0.80320751667022705078f,0.59569931030273437500f,
+-0.84485357999801635742f,0.53499764204025268555f,-0.88192129135131835938f,
+0.47139674425125122070f,-0.91420978307723999023f,0.40524131059646606445f,
+-0.94154405593872070312f,0.33688986301422119141f,-0.96377605199813842773f,
+0.26671275496482849121f,-0.98078525066375732422f,0.19509032368659973145f,
+-0.99247956275939941406f,0.12241067737340927124f,-0.99879544973373413086f,
+0.04906767606735229492f,-0.99969881772994995117f,-0.02454122900962829590f,
+-0.99518471956253051758f,-0.09801714122295379639f,-0.98527765274047851562f,
+-0.17096188664436340332f,-0.97003126144409179688f,-0.24298018217086791992f,
+-0.94952815771102905273f,-0.31368175148963928223f,-0.92387950420379638672f,
+-0.38268342614173889160f,-0.89322429895401000977f,-0.44961133599281311035f,
+-0.85772860050201416016f,-0.51410275697708129883f,-0.81758481264114379883f,
+-0.57580816745758056641f,-0.77301043272018432617f,-0.63439327478408813477f,
+-0.72424709796905517578f,-0.68954056501388549805f,-0.67155897617340087891f,
+-0.74095112085342407227f,-0.61523157358169555664f,-0.78834640979766845703f,
+-0.55557024478912353516f,-0.83146959543228149414f,-0.49289819598197937012f,
+-0.87008696794509887695f,-0.42755508422851562500f,-0.90398931503295898438f,
+-0.35989505052566528320f,-0.93299281597137451172f,-0.29028466343879699707f,
+-0.95694035291671752930f,-0.21910123527050018311f,-0.97570210695266723633f,
+-0.14673046767711639404f,-0.98917651176452636719f,-0.07356456667184829712f,
+-0.99729043245315551758f,1.00000000000000000000f,0.00000000000000000000f,
+0.95694035291671752930f,0.29028466343879699707f,0.83146959543228149414f,
+0.55557024478912353516f,0.63439327478408813477f,0.77301043272018432617f,
+0.38268342614173889160f,0.92387950420379638672f,0.09801714122295379639f,
+0.99518471956253051758f,-0.19509032368659973145f,0.98078525066375732422f,
+-0.47139674425125122070f,0.88192129135131835938f,-0.70710676908493041992f,
+0.70710676908493041992f,-0.88192129135131835938f,0.47139674425125122070f,
+-0.98078525066375732422f,0.19509032368659973145f,-0.99518471956253051758f,
+-0.09801714122295379639f,-0.92387950420379638672f,-0.38268342614173889160f,
+-0.77301043272018432617f,-0.63439327478408813477f,-0.55557024478912353516f,
+-0.83146959543228149414f,-0.29028466343879699707f,-0.95694035291671752930f,
+1.00000000000000000000f,0.00000000000000000000f,0.38268342614173889160f,
+0.92387950420379638672f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.92387950420379638672f,-0.38268342614173889160f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096) || defined(ARM_TABLE_TWIDDLECOEF_F32_8192)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_4096_f32[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_4096_f32[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_4096_f32[6]={
+0,2048,2560,2688,2720,0,};
+
+float32_t rearranged_twiddle_stride1_4096_f32[2728]={
+1.00000000000000000000f,0.00000000000000000000f,0.99999880790710449219f,
+0.00153398013208061457f,0.99999529123306274414f,0.00306795677170157433f,
+0.99998939037322998047f,0.00460192607715725899f,0.99998116493225097656f,
+0.00613588467240333557f,0.99997061491012573242f,0.00766982883214950562f,
+0.99995762109756469727f,0.00920375436544418335f,0.99994236230850219727f,
+0.01073765940964221954f,0.99992471933364868164f,0.01227153837680816650f,
+0.99990469217300415039f,0.01380538847297430038f,0.99988234043121337891f,
+0.01533920597285032272f,0.99985766410827636719f,0.01687298715114593506f,
+0.99983060359954833984f,0.01840673014521598816f,0.99980115890502929688f,
+0.01994042843580245972f,0.99976938962936401367f,0.02147408016026020050f,
+0.99973529577255249023f,0.02300768159329891205f,0.99969881772994995117f,
+0.02454122900962829590f,0.99966001510620117188f,0.02607471868395805359f,
+0.99961882829666137695f,0.02760814502835273743f,0.99957531690597534180f,
+0.02914150804281234741f,0.99952942132949829102f,0.03067480400204658508f,
+0.99948120117187500000f,0.03220802545547485352f,0.99943059682846069336f,
+0.03374117240309715271f,0.99937766790390014648f,0.03527423739433288574f,
+0.99932235479354858398f,0.03680722415447235107f,0.99926477670669555664f,
+0.03834012150764465332f,0.99920475482940673828f,0.03987292572855949402f,
+0.99914240837097167969f,0.04140564054250717163f,0.99907773733139038086f,
+0.04293825849890708923f,0.99901068210601806641f,0.04447077214717864990f,
+0.99894130229949951172f,0.04600318148732185364f,0.99886953830718994141f,
+0.04753548279404640198f,0.99879544973373413086f,0.04906767606735229492f,
+0.99871903657913208008f,0.05059975013136863708f,0.99864023923873901367f,
+0.05213170498609542847f,0.99855905771255493164f,0.05366353690624237061f,
+0.99847555160522460938f,0.05519524589180946350f,0.99838972091674804688f,
+0.05672682076692581177f,0.99830156564712524414f,0.05825826525688171387f,
+0.99821102619171142578f,0.05978957191109657288f,0.99811810255050659180f,
+0.06132073700428009033f,0.99802285432815551758f,0.06285175681114196777f,
+0.99792528152465820312f,0.06438262760639190674f,0.99782532453536987305f,
+0.06591334939002990723f,0.99772304296493530273f,0.06744392216205596924f,
+0.99761843681335449219f,0.06897433102130889893f,0.99751144647598266602f,
+0.07050457596778869629f,0.99740213155746459961f,0.07203464955091476440f,
+0.99729043245315551758f,0.07356456667184829712f,0.99717640876770019531f,
+0.07509429752826690674f,0.99706006050109863281f,0.07662386447191238403f,
+0.99694132804870605469f,0.07815324515104293823f,0.99682027101516723633f,
+0.07968243956565856934f,0.99669688940048217773f,0.08121144771575927734f,
+0.99657112360000610352f,0.08274026215076446533f,0.99644303321838378906f,
+0.08426889032125473022f,0.99631261825561523438f,0.08579730987548828125f,
+0.99617981910705566406f,0.08732553571462631226f,0.99604469537734985352f,
+0.08885355293750762939f,0.99590724706649780273f,0.09038136154413223267f,
+0.99576741456985473633f,0.09190895408391952515f,0.99562525749206542969f,
+0.09343633800745010376f,0.99548077583312988281f,0.09496349841356277466f,
+0.99533390998840332031f,0.09649042785167694092f,0.99518471956253051758f,
+0.09801714122295379639f,0.99503320455551147461f,0.09954361617565155029f,
+0.99487930536270141602f,0.10106986016035079956f,0.99472314119338989258f,
+0.10259586572647094727f,0.99456459283828735352f,0.10412163287401199341f,
+0.99440366029739379883f,0.10564715415239334106f,0.99424046277999877930f,
+0.10717242211103439331f,0.99407488107681274414f,0.10869744420051574707f,
+0.99390697479248046875f,0.11022220551967620850f,0.99373674392700195312f,
+0.11174671351909637451f,0.99356412887573242188f,0.11327095329761505127f,
+0.99338918924331665039f,0.11479492485523223877f,0.99321192502975463867f,
+0.11631862819194793701f,0.99303233623504638672f,0.11784206330776214600f,
+0.99285042285919189453f,0.11936521530151367188f,0.99266612529754638672f,
+0.12088808417320251465f,0.99247956275939941406f,0.12241067737340927124f,
+0.99229061603546142578f,0.12393297255039215088f,0.99209928512573242188f,
+0.12545497715473175049f,0.99190568923950195312f,0.12697669863700866699f,
+0.99170976877212524414f,0.12849810719490051270f,0.99151146411895751953f,
+0.13001921772956848145f,0.99131083488464355469f,0.13154003024101257324f,
+0.99110794067382812500f,0.13306052982807159424f,0.99090266227722167969f,
+0.13458070158958435059f,0.99069499969482421875f,0.13610057532787322998f,
+0.99048507213592529297f,0.13762012124061584473f,0.99027281999588012695f,
+0.13913933932781219482f,0.99005818367004394531f,0.14065824449062347412f,
+0.98984128236770629883f,0.14217680692672729492f,0.98962199687957763672f,
+0.14369502663612365723f,0.98940044641494750977f,0.14521291851997375488f,
+0.98917651176452636719f,0.14673046767711639404f,0.98895025253295898438f,
+0.14824767410755157471f,0.98872166872024536133f,0.14976453781127929688f,
+0.98849081993103027344f,0.15128104388713836670f,0.98825758695602416992f,
+0.15279719233512878418f,0.98802202939987182617f,0.15431296825408935547f,
+0.98778414726257324219f,0.15582840144634246826f,0.98754394054412841797f,
+0.15734346210956573486f,0.98730140924453735352f,0.15885815024375915527f,
+0.98705655336380004883f,0.16037245094776153564f,0.98680937290191650391f,
+0.16188639402389526367f,0.98655992746353149414f,0.16339994966983795166f,
+0.98630809783935546875f,0.16491311788558959961f,0.98605394363403320312f,
+0.16642589867115020752f,0.98579752445220947266f,0.16793829202651977539f,
+0.98553872108459472656f,0.16945029795169830322f,0.98527765274047851562f,
+0.17096188664436340332f,0.98501425981521606445f,0.17247308790683746338f,
+0.98474848270416259766f,0.17398387193679809570f,0.98448044061660766602f,
+0.17549425363540649414f,0.98421007394790649414f,0.17700421810150146484f,
+0.98393744230270385742f,0.17851376533508300781f,0.98366242647171020508f,
+0.18002289533615112305f,0.98338508605957031250f,0.18153160810470581055f,
+0.98310548067092895508f,0.18303988873958587646f,0.98282355070114135742f,
+0.18454773724079132080f,0.98253929615020751953f,0.18605515360832214355f,
+0.98225271701812744141f,0.18756212294101715088f,0.98196387290954589844f,
+0.18906866014003753662f,0.98167270421981811523f,0.19057475030422210693f,
+0.98137921094894409180f,0.19208039343357086182f,0.98108339309692382812f,
+0.19358558952808380127f,0.98078525066375732422f,0.19509032368659973145f,
+0.98048484325408935547f,0.19659459590911865234f,0.98018211126327514648f,
+0.19809840619564056396f,0.97987711429595947266f,0.19960175454616546631f,
+0.97956979274749755859f,0.20110464096069335938f,0.97926014661788940430f,
+0.20260703563690185547f,0.97894817590713500977f,0.20410896837711334229f,
+0.97863394021987915039f,0.20561040937900543213f,0.97831737995147705078f,
+0.20711137354373931885f,0.97799849510192871094f,0.20861184597015380859f,
+0.97767734527587890625f,0.21011184155941009521f,0.97735387086868286133f,
+0.21161133050918579102f,0.97702813148498535156f,0.21311031281948089600f,
+0.97670006752014160156f,0.21460881829261779785f,0.97636973857879638672f,
+0.21610680222511291504f,0.97603708505630493164f,0.21760427951812744141f,
+0.97570210695266723633f,0.21910123527050018311f,0.97536486387252807617f,
+0.22059768438339233398f,0.97502535581588745117f,0.22209362685680389404f,
+0.97468352317810058594f,0.22358903288841247559f,0.97433936595916748047f,
+0.22508391737937927246f,0.97399294376373291016f,0.22657826542854309082f,
+0.97364425659179687500f,0.22807207703590393066f,0.97329324483871459961f,
+0.22956536710262298584f,0.97293996810913085938f,0.23105810582637786865f,
+0.97258436679840087891f,0.23255030810832977295f,0.97222650051116943359f,
+0.23404195904731750488f,0.97186630964279174805f,0.23553305864334106445f,
+0.97150391340255737305f,0.23702360689640045166f,0.97113913297653198242f,
+0.23851358890533447266f,0.97077214717864990234f,0.24000301957130432129f,
+0.97040283679962158203f,0.24149188399314880371f,0.97003126144409179688f,
+0.24298018217086791992f,0.96965736150741577148f,0.24446789920330047607f,
+0.96928125619888305664f,0.24595504999160766602f,0.96890282630920410156f,
+0.24744161963462829590f,0.96852207183837890625f,0.24892760813236236572f,
+0.96813911199569702148f,0.25041300058364868164f,0.96775382757186889648f,
+0.25189781188964843750f,0.96736627817153930664f,0.25338202714920043945f,
+0.96697646379470825195f,0.25486564636230468750f,0.96658438444137573242f,
+0.25634866952896118164f,0.96618998050689697266f,0.25783109664916992188f,
+0.96579337120056152344f,0.25931292772293090820f,0.96539443731307983398f,
+0.26079410314559936523f,0.96499323844909667969f,0.26227471232414245605f,
+0.96458977460861206055f,0.26375466585159301758f,0.96418404579162597656f,
+0.26523402333259582520f,0.96377605199813842773f,0.26671275496482849121f,
+0.96336579322814941406f,0.26819086074829101562f,0.96295326948165893555f,
+0.26966831088066101074f,0.96253848075866699219f,0.27114516496658325195f,
+0.96212142705917358398f,0.27262136340141296387f,0.96170204877853393555f,
+0.27409690618515014648f,0.96128046512603759766f,0.27557182312011718750f,
+0.96085661649703979492f,0.27704608440399169922f,0.96043050289154052734f,
+0.27851969003677368164f,0.96000212430953979492f,0.27999264001846313477f,
+0.95957154035568237305f,0.28146493434906005859f,0.95913863182067871094f,
+0.28293657302856445312f,0.95870345830917358398f,0.28440752625465393066f,
+0.95826607942581176758f,0.28587782382965087891f,0.95782643556594848633f,
+0.28734746575355529785f,0.95738452672958374023f,0.28881642222404479980f,
+0.95694035291671752930f,0.29028466343879699707f,0.95649391412734985352f,
+0.29175224900245666504f,0.95604526996612548828f,0.29321914911270141602f,
+0.95559436082839965820f,0.29468536376953125000f,0.95514118671417236328f,
+0.29615089297294616699f,0.95468574762344360352f,0.29761570692062377930f,
+0.95422810316085815430f,0.29907983541488647461f,0.95376819372177124023f,
+0.30054324865341186523f,0.95330601930618286133f,0.30200594663619995117f,
+0.95284163951873779297f,0.30346795916557312012f,0.95237499475479125977f,
+0.30492922663688659668f,0.95190614461898803711f,0.30638980865478515625f,
+0.95143502950668334961f,0.30784964561462402344f,0.95096164941787719727f,
+0.30930876731872558594f,0.95048606395721435547f,0.31076714396476745605f,
+0.95000827312469482422f,0.31222480535507202148f,0.94952815771102905273f,
+0.31368175148963928223f,0.94904589653015136719f,0.31513792276382446289f,
+0.94856137037277221680f,0.31659337878227233887f,0.94807457923889160156f,
+0.31804808974266052246f,0.94758558273315429688f,0.31950202584266662598f,
+0.94709438085556030273f,0.32095524668693542480f,0.94660091400146484375f,
+0.32240769267082214355f,0.94610524177551269531f,0.32385936379432678223f,
+0.94560730457305908203f,0.32531028985977172852f,0.94510722160339355469f,
+0.32676044106483459473f,0.94460481405258178711f,0.32820984721183776855f,
+0.94410026073455810547f,0.32965844869613647461f,0.94359344244003295898f,
+0.33110630512237548828f,0.94308441877365112305f,0.33255335688591003418f,
+0.94257318973541259766f,0.33399966359138488770f,0.94205975532531738281f,
+0.33544513583183288574f,0.94154405593872070312f,0.33688986301422119141f,
+0.94102615118026733398f,0.33833375573158264160f,0.94050604104995727539f,
+0.33977687358856201172f,0.93998372554779052734f,0.34121921658515930176f,
+0.93945920467376708984f,0.34266072511672973633f,0.93893247842788696289f,
+0.34410142898559570312f,0.93840354681015014648f,0.34554132819175720215f,
+0.93787235021591186523f,0.34698042273521423340f,0.93733900785446166992f,
+0.34841868281364440918f,0.93680346012115478516f,0.34985613822937011719f,
+0.93626564741134643555f,0.35129275918006896973f,0.93572568893432617188f,
+0.35272854566574096680f,0.93518352508544921875f,0.35416352748870849609f,
+0.93463915586471557617f,0.35559767484664916992f,0.93409252166748046875f,
+0.35703095793724060059f,0.93354380130767822266f,0.35846340656280517578f,
+0.93299281597137451172f,0.35989505052566528320f,0.93243962526321411133f,
+0.36132580041885375977f,0.93188428878784179688f,0.36275571584701538086f,
+0.93132668733596801758f,0.36418479681015014648f,0.93076694011688232422f,
+0.36561298370361328125f,0.93020504713058471680f,0.36704033613204956055f,
+0.92964088916778564453f,0.36846682429313659668f,0.92907458543777465820f,
+0.36989244818687438965f,0.92850607633590698242f,0.37131720781326293945f,
+0.92793542146682739258f,0.37274107336997985840f,0.92736250162124633789f,
+0.37416407465934753418f,0.92678749561309814453f,0.37558618187904357910f,
+0.92621022462844848633f,0.37700742483139038086f,0.92563080787658691406f,
+0.37842774391174316406f,0.92504924535751342773f,0.37984719872474670410f,
+0.92446547746658325195f,0.38126575946807861328f,0.92387950420379638672f,
+0.38268342614173889160f,0.92329144477844238281f,0.38410019874572753906f,
+0.92270112037658691406f,0.38551604747772216797f,0.92210865020751953125f,
+0.38693100214004516602f,0.92151403427124023438f,0.38834503293037414551f,
+0.92091721296310424805f,0.38975816965103149414f,0.92031830549240112305f,
+0.39117038249969482422f,0.91971713304519653320f,0.39258167147636413574f,
+0.91911387443542480469f,0.39399203658103942871f,0.91850841045379638672f,
+0.39540147781372070312f,0.91790080070495605469f,0.39680999517440795898f,
+0.91729098558425903320f,0.39821755886077880859f,0.91667908430099487305f,
+0.39962419867515563965f,0.91606497764587402344f,0.40102988481521606445f,
+0.91544872522354125977f,0.40243464708328247070f,0.91483032703399658203f,
+0.40383845567703247070f,0.91420978307723999023f,0.40524131059646606445f,
+0.91358703374862670898f,0.40664321184158325195f,0.91296219825744628906f,
+0.40804415941238403320f,0.91233515739440917969f,0.40944415330886840820f,
+0.91170603036880493164f,0.41084316372871398926f,0.91107475757598876953f,
+0.41224122047424316406f,0.91044127941131591797f,0.41363832354545593262f,
+0.90980571508407592773f,0.41503441333770751953f,0.90916800498962402344f,
+0.41642954945564270020f,0.90852808952331542969f,0.41782370209693908691f,
+0.90788608789443969727f,0.41921690106391906738f,0.90724200010299682617f,
+0.42060908675193786621f,0.90659570693969726562f,0.42200025916099548340f,
+0.90594726800918579102f,0.42339047789573669434f,0.90529674291610717773f,
+0.42477968335151672363f,0.90464407205581665039f,0.42616787552833557129f,
+0.90398931503295898438f,0.42755508422851562500f,0.90333235263824462891f,
+0.42894127964973449707f,0.90267330408096313477f,0.43032649159431457520f,
+0.90201216936111450195f,0.43171066045761108398f,0.90134882926940917969f,
+0.43309381604194641113f,0.90068340301513671875f,0.43447595834732055664f,
+0.90001589059829711914f,0.43585708737373352051f,0.89934623241424560547f,
+0.43723717331886291504f,0.89867448806762695312f,0.43861624598503112793f,
+0.89800059795379638672f,0.43999427556991577148f,0.89732456207275390625f,
+0.44137126207351684570f,0.89664649963378906250f,0.44274723529815673828f,
+0.89596623182296752930f,0.44412213563919067383f,0.89528393745422363281f,
+0.44549602270126342773f,0.89459949731826782227f,0.44686883687973022461f,
+0.89391297101974487305f,0.44824060797691345215f,0.89322429895401000977f,
+0.44961133599281311035f,0.89253354072570800781f,0.45098099112510681152f,
+0.89184069633483886719f,0.45234957337379455566f,0.89114576578140258789f,
+0.45371711254119873047f,0.89044874906539916992f,0.45508357882499694824f,
+0.88974958658218383789f,0.45644897222518920898f,0.88904833793640136719f,
+0.45781329274177551270f,0.88834506273269653320f,0.45917654037475585938f,
+0.88763964176177978516f,0.46053871512413024902f,0.88693213462829589844f,
+0.46189978718757629395f,0.88622254133224487305f,0.46325978636741638184f,
+0.88551086187362670898f,0.46461868286132812500f,0.88479709625244140625f,
+0.46597650647163391113f,0.88408124446868896484f,0.46733319759368896484f,
+0.88336336612701416016f,0.46868881583213806152f,0.88264334201812744141f,
+0.47004333138465881348f,0.88192129135131835938f,0.47139674425125122070f,
+0.88119709491729736328f,0.47274902462959289551f,0.88047087192535400391f,
+0.47410020232200622559f,0.87974262237548828125f,0.47545027732849121094f,
+0.87901222705841064453f,0.47679921984672546387f,0.87827980518341064453f,
+0.47814705967903137207f,0.87754529714584350586f,0.47949376702308654785f,
+0.87680870294570922852f,0.48083934187889099121f,0.87607008218765258789f,
+0.48218378424644470215f,0.87532937526702880859f,0.48352706432342529297f,
+0.87458664178848266602f,0.48486924171447753906f,0.87384182214736938477f,
+0.48621028661727905273f,0.87309497594833374023f,0.48755016922950744629f,
+0.87234604358673095703f,0.48888888955116271973f,0.87159508466720581055f,
+0.49022647738456726074f,0.87084203958511352539f,0.49156290292739868164f,
+0.87008696794509887695f,0.49289819598197937012f,0.86932986974716186523f,
+0.49423229694366455078f,0.86857068538665771484f,0.49556526541709899902f,
+0.86780947446823120117f,0.49689704179763793945f,0.86704623699188232422f,
+0.49822765588760375977f,0.86628097295761108398f,0.49955710768699645996f,
+0.86551362276077270508f,0.50088536739349365234f,0.86474424600601196289f,
+0.50221246480941772461f,0.86397284269332885742f,0.50353837013244628906f,
+0.86319941282272338867f,0.50486308336257934570f,0.86242395639419555664f,
+0.50618666410446166992f,0.86164647340774536133f,0.50750899314880371094f,
+0.86086696386337280273f,0.50883013010025024414f,0.86008536815643310547f,
+0.51015007495880126953f,0.85930180549621582031f,0.51146882772445678711f,
+0.85851621627807617188f,0.51278638839721679688f,0.85772860050201416016f,
+0.51410275697708129883f,0.85693895816802978516f,0.51541787385940551758f,
+0.85614734888076782227f,0.51673179864883422852f,0.85535365343093872070f,
+0.51804453134536743164f,0.85455799102783203125f,0.51935601234436035156f,
+0.85376030206680297852f,0.52066624164581298828f,0.85296058654785156250f,
+0.52197527885437011719f,0.85215890407562255859f,0.52328312397003173828f,
+0.85135519504547119141f,0.52458965778350830078f,0.85054945945739746094f,
+0.52589499950408935547f,0.84974175691604614258f,0.52719914913177490234f,
+0.84893202781677246094f,0.52850198745727539062f,0.84812033176422119141f,
+0.52980363368988037109f,0.84730660915374755859f,0.53110402822494506836f,
+0.84649091958999633789f,0.53240311145782470703f,0.84567326307296752930f,
+0.53370100259780883789f,0.84485357999801635742f,0.53499764204025268555f,
+0.84403187036514282227f,0.53629297018051147461f,0.84320825338363647461f,
+0.53758704662322998047f,0.84238260984420776367f,0.53887993097305297852f,
+0.84155499935150146484f,0.54017144441604614258f,0.84072536230087280273f,
+0.54146176576614379883f,0.83989381790161132812f,0.54275077581405639648f,
+0.83906024694442749023f,0.54403853416442871094f,0.83822470903396606445f,
+0.54532498121261596680f,0.83738720417022705078f,0.54661017656326293945f,
+0.83654773235321044922f,0.54789406061172485352f,0.83570629358291625977f,
+0.54917663335800170898f,0.83486288785934448242f,0.55045795440673828125f,
+0.83401751518249511719f,0.55173796415328979492f,0.83317017555236816406f,
+0.55301672220230102539f,0.83232086896896362305f,0.55429410934448242188f,
+0.83146959543228149414f,0.55557024478912353516f,0.83061641454696655273f,
+0.55684500932693481445f,0.82976120710372924805f,0.55811852216720581055f,
+0.82890409231185913086f,0.55939072370529174805f,0.82804507017135620117f,
+0.56066155433654785156f,0.82718402147293090820f,0.56193113327026367188f,
+0.82632106542587280273f,0.56319934129714965820f,0.82545614242553710938f,
+0.56446623802185058594f,0.82458931207656860352f,0.56573182344436645508f,
+0.82372051477432250977f,0.56699603796005249023f,0.82284981012344360352f,
+0.56825894117355346680f,0.82197713851928710938f,0.56952053308486938477f,
+0.82110249996185302734f,0.57078075408935546875f,0.82022595405578613281f,
+0.57203960418701171875f,0.81934750080108642578f,0.57329714298248291016f,
+0.81846714019775390625f,0.57455337047576904297f,0.81758481264114379883f,
+0.57580816745758056641f,0.81670057773590087891f,0.57706165313720703125f,
+0.81581443548202514648f,0.57831376791000366211f,0.81492632627487182617f,
+0.57956457138061523438f,0.81403630971908569336f,0.58081394433975219727f,
+0.81314438581466674805f,0.58206200599670410156f,0.81225061416625976562f,
+0.58330863714218139648f,0.81135487556457519531f,0.58455395698547363281f,
+0.81045717000961303711f,0.58579784631729125977f,0.80955761671066284180f,
+0.58704036474227905273f,0.80865615606307983398f,0.58828157186508178711f,
+0.80775284767150878906f,0.58952128887176513672f,0.80684757232666015625f,
+0.59075969457626342773f,0.80594038963317871094f,0.59199666976928710938f,
+0.80503135919570922852f,0.59323227405548095703f,0.80412036180496215820f,
+0.59446650743484497070f,0.80320751667022705078f,0.59569931030273437500f,
+0.80229282379150390625f,0.59693068265914916992f,0.80137616395950317383f,
+0.59816068410873413086f,0.80045765638351440430f,0.59938931465148925781f,
+0.79953724145889282227f,0.60061645507812500000f,0.79861497879028320312f,
+0.60184222459793090820f,0.79769086837768554688f,0.60306662321090698242f,
+0.79676479101181030273f,0.60428953170776367188f,0.79583692550659179688f,
+0.60551106929779052734f,0.79490715265274047852f,0.60673111677169799805f,
+0.79397547245025634766f,0.60794979333877563477f,0.79304194450378417969f,
+0.60916703939437866211f,0.79210656881332397461f,0.61038279533386230469f,
+0.79116934537887573242f,0.61159718036651611328f,0.79023021459579467773f,
+0.61281007528305053711f,0.78928923606872558594f,0.61402153968811035156f,
+0.78834640979766845703f,0.61523157358169555664f,0.78740173578262329102f,
+0.61644017696380615234f,0.78645521402359008789f,0.61764729022979736328f,
+0.78550684452056884766f,0.61885297298431396484f,0.78455656766891479492f,
+0.62005722522735595703f,0.78360450267791748047f,0.62125998735427856445f,
+0.78265058994293212891f,0.62246125936508178711f,0.78169482946395874023f,
+0.62366110086441040039f,0.78073722124099731445f,0.62485951185226440430f,
+0.77977776527404785156f,0.62605637311935424805f,0.77881652116775512695f,
+0.62725180387496948242f,0.77785342931747436523f,0.62844574451446533203f,
+0.77688848972320556641f,0.62963825464248657227f,0.77592170238494873047f,
+0.63082921504974365234f,0.77495312690734863281f,0.63201874494552612305f,
+0.77398270368576049805f,0.63320678472518920898f,0.77301043272018432617f,
+0.63439327478408813477f,0.77203637361526489258f,0.63557833433151245117f,
+0.77106052637100219727f,0.63676184415817260742f,0.77008283138275146484f,
+0.63794392347335815430f,0.76910334825515747070f,0.63912445306777954102f,
+0.76812201738357543945f,0.64030349254608154297f,0.76713889837265014648f,
+0.64148104190826416016f,0.76615399122238159180f,0.64265704154968261719f,
+0.76516723632812500000f,0.64383155107498168945f,0.76417875289916992188f,
+0.64500451087951660156f,0.76318842172622680664f,0.64617604017257690430f,
+0.76219630241394042969f,0.64734596014022827148f,0.76120239496231079102f,
+0.64851438999176025391f,0.76020669937133789062f,0.64968132972717285156f,
+0.75920921564102172852f,0.65084666013717651367f,0.75820988416671752930f,
+0.65201056003570556641f,0.75720882415771484375f,0.65317285060882568359f,
+0.75620597600936889648f,0.65433359146118164062f,0.75520139932632446289f,
+0.65549284219741821289f,0.75419497489929199219f,0.65665054321289062500f,
+0.75318682193756103516f,0.65780669450759887695f,0.75217682123184204102f,
+0.65896129608154296875f,0.75116515159606933594f,0.66011434793472290039f,
+0.75015163421630859375f,0.66126585006713867188f,0.74913638830184936523f,
+0.66241580247879028320f,0.74811935424804687500f,0.66356414556503295898f,
+0.74710059165954589844f,0.66471099853515625000f,0.74608010053634643555f,
+0.66585624217987060547f,0.74505776166915893555f,0.66699993610382080078f,
+0.74403375387191772461f,0.66814202070236206055f,0.74300795793533325195f,
+0.66928261518478393555f,0.74198043346405029297f,0.67042154073715209961f,
+0.74095112085342407227f,0.67155897617340087891f,0.73992007970809936523f,
+0.67269474267959594727f,0.73888731002807617188f,0.67382901906967163086f,
+0.73785281181335449219f,0.67496162652969360352f,0.73681658506393432617f,
+0.67609268426895141602f,0.73577857017517089844f,0.67722219228744506836f,
+0.73473888635635375977f,0.67835003137588500977f,0.73369741439819335938f,
+0.67947632074356079102f,0.73265427350997924805f,0.68060100078582763672f,
+0.73160940408706665039f,0.68172407150268554688f,0.73056274652481079102f,
+0.68284553289413452148f,0.72951442003250122070f,0.68396538496017456055f,
+0.72846436500549316406f,0.68508368730545043945f,0.72741264104843139648f,
+0.68620032072067260742f,0.72635912895202636719f,0.68731534481048583984f,
+0.72530394792556762695f,0.68842875957489013672f,0.72424709796905517578f,
+0.68954056501388549805f,0.72318845987319946289f,0.69065070152282714844f,
+0.72212821245193481445f,0.69175922870635986328f,0.72106617689132690430f,
+0.69286614656448364258f,0.72000253200531005859f,0.69397145509719848633f,
+0.71893709897994995117f,0.69507509469985961914f,0.71787005662918090820f,
+0.69617712497711181641f,0.71680128574371337891f,0.69727748632431030273f,
+0.71573084592819213867f,0.69837623834609985352f,0.71465867757797241211f,
+0.69947332143783569336f,0.71358484029769897461f,0.70056879520416259766f,
+0.71250939369201660156f,0.70166260004043579102f,0.71143221855163574219f,
+0.70275473594665527344f,0.71035337448120117188f,0.70384526252746582031f,
+0.70927280187606811523f,0.70493406057357788086f,0.70819061994552612305f,
+0.70602124929428100586f,0.70710676908493041992f,0.70710676908493041992f,
+0.70602124929428100586f,0.70819061994552612305f,0.70493406057357788086f,
+0.70927280187606811523f,0.70384526252746582031f,0.71035337448120117188f,
+0.70275473594665527344f,0.71143221855163574219f,0.70166260004043579102f,
+0.71250939369201660156f,0.70056879520416259766f,0.71358484029769897461f,
+0.69947332143783569336f,0.71465867757797241211f,0.69837623834609985352f,
+0.71573084592819213867f,0.69727748632431030273f,0.71680128574371337891f,
+0.69617712497711181641f,0.71787005662918090820f,0.69507509469985961914f,
+0.71893709897994995117f,0.69397145509719848633f,0.72000253200531005859f,
+0.69286614656448364258f,0.72106617689132690430f,0.69175922870635986328f,
+0.72212821245193481445f,0.69065070152282714844f,0.72318845987319946289f,
+0.68954056501388549805f,0.72424709796905517578f,0.68842875957489013672f,
+0.72530394792556762695f,0.68731534481048583984f,0.72635912895202636719f,
+0.68620032072067260742f,0.72741264104843139648f,0.68508368730545043945f,
+0.72846436500549316406f,0.68396538496017456055f,0.72951442003250122070f,
+0.68284553289413452148f,0.73056274652481079102f,0.68172407150268554688f,
+0.73160940408706665039f,0.68060100078582763672f,0.73265427350997924805f,
+0.67947632074356079102f,0.73369741439819335938f,0.67835003137588500977f,
+0.73473888635635375977f,0.67722219228744506836f,0.73577857017517089844f,
+0.67609268426895141602f,0.73681658506393432617f,0.67496162652969360352f,
+0.73785281181335449219f,0.67382901906967163086f,0.73888731002807617188f,
+0.67269474267959594727f,0.73992007970809936523f,0.67155897617340087891f,
+0.74095112085342407227f,0.67042154073715209961f,0.74198043346405029297f,
+0.66928261518478393555f,0.74300795793533325195f,0.66814202070236206055f,
+0.74403375387191772461f,0.66699993610382080078f,0.74505776166915893555f,
+0.66585624217987060547f,0.74608010053634643555f,0.66471099853515625000f,
+0.74710059165954589844f,0.66356414556503295898f,0.74811935424804687500f,
+0.66241580247879028320f,0.74913638830184936523f,0.66126585006713867188f,
+0.75015163421630859375f,0.66011434793472290039f,0.75116515159606933594f,
+0.65896129608154296875f,0.75217682123184204102f,0.65780669450759887695f,
+0.75318682193756103516f,0.65665054321289062500f,0.75419497489929199219f,
+0.65549284219741821289f,0.75520139932632446289f,0.65433359146118164062f,
+0.75620597600936889648f,0.65317285060882568359f,0.75720882415771484375f,
+0.65201056003570556641f,0.75820988416671752930f,0.65084666013717651367f,
+0.75920921564102172852f,0.64968132972717285156f,0.76020669937133789062f,
+0.64851438999176025391f,0.76120239496231079102f,0.64734596014022827148f,
+0.76219630241394042969f,0.64617604017257690430f,0.76318842172622680664f,
+0.64500451087951660156f,0.76417875289916992188f,0.64383155107498168945f,
+0.76516723632812500000f,0.64265704154968261719f,0.76615399122238159180f,
+0.64148104190826416016f,0.76713889837265014648f,0.64030349254608154297f,
+0.76812201738357543945f,0.63912445306777954102f,0.76910334825515747070f,
+0.63794392347335815430f,0.77008283138275146484f,0.63676184415817260742f,
+0.77106052637100219727f,0.63557833433151245117f,0.77203637361526489258f,
+0.63439327478408813477f,0.77301043272018432617f,0.63320678472518920898f,
+0.77398270368576049805f,0.63201874494552612305f,0.77495312690734863281f,
+0.63082921504974365234f,0.77592170238494873047f,0.62963825464248657227f,
+0.77688848972320556641f,0.62844574451446533203f,0.77785342931747436523f,
+0.62725180387496948242f,0.77881652116775512695f,0.62605637311935424805f,
+0.77977776527404785156f,0.62485951185226440430f,0.78073722124099731445f,
+0.62366110086441040039f,0.78169482946395874023f,0.62246125936508178711f,
+0.78265058994293212891f,0.62125998735427856445f,0.78360450267791748047f,
+0.62005722522735595703f,0.78455656766891479492f,0.61885297298431396484f,
+0.78550684452056884766f,0.61764729022979736328f,0.78645521402359008789f,
+0.61644017696380615234f,0.78740173578262329102f,0.61523157358169555664f,
+0.78834640979766845703f,0.61402153968811035156f,0.78928923606872558594f,
+0.61281007528305053711f,0.79023021459579467773f,0.61159718036651611328f,
+0.79116934537887573242f,0.61038279533386230469f,0.79210656881332397461f,
+0.60916703939437866211f,0.79304194450378417969f,0.60794979333877563477f,
+0.79397547245025634766f,0.60673111677169799805f,0.79490715265274047852f,
+0.60551106929779052734f,0.79583692550659179688f,0.60428953170776367188f,
+0.79676479101181030273f,0.60306662321090698242f,0.79769086837768554688f,
+0.60184222459793090820f,0.79861497879028320312f,0.60061645507812500000f,
+0.79953724145889282227f,0.59938931465148925781f,0.80045765638351440430f,
+0.59816068410873413086f,0.80137616395950317383f,0.59693068265914916992f,
+0.80229282379150390625f,0.59569931030273437500f,0.80320751667022705078f,
+0.59446650743484497070f,0.80412036180496215820f,0.59323227405548095703f,
+0.80503135919570922852f,0.59199666976928710938f,0.80594038963317871094f,
+0.59075969457626342773f,0.80684757232666015625f,0.58952128887176513672f,
+0.80775284767150878906f,0.58828157186508178711f,0.80865615606307983398f,
+0.58704036474227905273f,0.80955761671066284180f,0.58579784631729125977f,
+0.81045717000961303711f,0.58455395698547363281f,0.81135487556457519531f,
+0.58330863714218139648f,0.81225061416625976562f,0.58206200599670410156f,
+0.81314438581466674805f,0.58081394433975219727f,0.81403630971908569336f,
+0.57956457138061523438f,0.81492632627487182617f,0.57831376791000366211f,
+0.81581443548202514648f,0.57706165313720703125f,0.81670057773590087891f,
+0.57580816745758056641f,0.81758481264114379883f,0.57455337047576904297f,
+0.81846714019775390625f,0.57329714298248291016f,0.81934750080108642578f,
+0.57203960418701171875f,0.82022595405578613281f,0.57078075408935546875f,
+0.82110249996185302734f,0.56952053308486938477f,0.82197713851928710938f,
+0.56825894117355346680f,0.82284981012344360352f,0.56699603796005249023f,
+0.82372051477432250977f,0.56573182344436645508f,0.82458931207656860352f,
+0.56446623802185058594f,0.82545614242553710938f,0.56319934129714965820f,
+0.82632106542587280273f,0.56193113327026367188f,0.82718402147293090820f,
+0.56066155433654785156f,0.82804507017135620117f,0.55939072370529174805f,
+0.82890409231185913086f,0.55811852216720581055f,0.82976120710372924805f,
+0.55684500932693481445f,0.83061641454696655273f,0.55557024478912353516f,
+0.83146959543228149414f,0.55429410934448242188f,0.83232086896896362305f,
+0.55301672220230102539f,0.83317017555236816406f,0.55173796415328979492f,
+0.83401751518249511719f,0.55045795440673828125f,0.83486288785934448242f,
+0.54917663335800170898f,0.83570629358291625977f,0.54789406061172485352f,
+0.83654773235321044922f,0.54661017656326293945f,0.83738720417022705078f,
+0.54532498121261596680f,0.83822470903396606445f,0.54403853416442871094f,
+0.83906024694442749023f,0.54275077581405639648f,0.83989381790161132812f,
+0.54146176576614379883f,0.84072536230087280273f,0.54017144441604614258f,
+0.84155499935150146484f,0.53887993097305297852f,0.84238260984420776367f,
+0.53758704662322998047f,0.84320825338363647461f,0.53629297018051147461f,
+0.84403187036514282227f,0.53499764204025268555f,0.84485357999801635742f,
+0.53370100259780883789f,0.84567326307296752930f,0.53240311145782470703f,
+0.84649091958999633789f,0.53110402822494506836f,0.84730660915374755859f,
+0.52980363368988037109f,0.84812033176422119141f,0.52850198745727539062f,
+0.84893202781677246094f,0.52719914913177490234f,0.84974175691604614258f,
+0.52589499950408935547f,0.85054945945739746094f,0.52458965778350830078f,
+0.85135519504547119141f,0.52328312397003173828f,0.85215890407562255859f,
+0.52197527885437011719f,0.85296058654785156250f,0.52066624164581298828f,
+0.85376030206680297852f,0.51935601234436035156f,0.85455799102783203125f,
+0.51804453134536743164f,0.85535365343093872070f,0.51673179864883422852f,
+0.85614734888076782227f,0.51541787385940551758f,0.85693895816802978516f,
+0.51410275697708129883f,0.85772860050201416016f,0.51278638839721679688f,
+0.85851621627807617188f,0.51146882772445678711f,0.85930180549621582031f,
+0.51015007495880126953f,0.86008536815643310547f,0.50883013010025024414f,
+0.86086696386337280273f,0.50750899314880371094f,0.86164647340774536133f,
+0.50618666410446166992f,0.86242395639419555664f,0.50486308336257934570f,
+0.86319941282272338867f,0.50353837013244628906f,0.86397284269332885742f,
+0.50221246480941772461f,0.86474424600601196289f,0.50088536739349365234f,
+0.86551362276077270508f,0.49955710768699645996f,0.86628097295761108398f,
+0.49822765588760375977f,0.86704623699188232422f,0.49689704179763793945f,
+0.86780947446823120117f,0.49556526541709899902f,0.86857068538665771484f,
+0.49423229694366455078f,0.86932986974716186523f,0.49289819598197937012f,
+0.87008696794509887695f,0.49156290292739868164f,0.87084203958511352539f,
+0.49022647738456726074f,0.87159508466720581055f,0.48888888955116271973f,
+0.87234604358673095703f,0.48755016922950744629f,0.87309497594833374023f,
+0.48621028661727905273f,0.87384182214736938477f,0.48486924171447753906f,
+0.87458664178848266602f,0.48352706432342529297f,0.87532937526702880859f,
+0.48218378424644470215f,0.87607008218765258789f,0.48083934187889099121f,
+0.87680870294570922852f,0.47949376702308654785f,0.87754529714584350586f,
+0.47814705967903137207f,0.87827980518341064453f,0.47679921984672546387f,
+0.87901222705841064453f,0.47545027732849121094f,0.87974262237548828125f,
+0.47410020232200622559f,0.88047087192535400391f,0.47274902462959289551f,
+0.88119709491729736328f,0.47139674425125122070f,0.88192129135131835938f,
+0.47004333138465881348f,0.88264334201812744141f,0.46868881583213806152f,
+0.88336336612701416016f,0.46733319759368896484f,0.88408124446868896484f,
+0.46597650647163391113f,0.88479709625244140625f,0.46461868286132812500f,
+0.88551086187362670898f,0.46325978636741638184f,0.88622254133224487305f,
+0.46189978718757629395f,0.88693213462829589844f,0.46053871512413024902f,
+0.88763964176177978516f,0.45917654037475585938f,0.88834506273269653320f,
+0.45781329274177551270f,0.88904833793640136719f,0.45644897222518920898f,
+0.88974958658218383789f,0.45508357882499694824f,0.89044874906539916992f,
+0.45371711254119873047f,0.89114576578140258789f,0.45234957337379455566f,
+0.89184069633483886719f,0.45098099112510681152f,0.89253354072570800781f,
+0.44961133599281311035f,0.89322429895401000977f,0.44824060797691345215f,
+0.89391297101974487305f,0.44686883687973022461f,0.89459949731826782227f,
+0.44549602270126342773f,0.89528393745422363281f,0.44412213563919067383f,
+0.89596623182296752930f,0.44274723529815673828f,0.89664649963378906250f,
+0.44137126207351684570f,0.89732456207275390625f,0.43999427556991577148f,
+0.89800059795379638672f,0.43861624598503112793f,0.89867448806762695312f,
+0.43723717331886291504f,0.89934623241424560547f,0.43585708737373352051f,
+0.90001589059829711914f,0.43447595834732055664f,0.90068340301513671875f,
+0.43309381604194641113f,0.90134882926940917969f,0.43171066045761108398f,
+0.90201216936111450195f,0.43032649159431457520f,0.90267330408096313477f,
+0.42894127964973449707f,0.90333235263824462891f,0.42755508422851562500f,
+0.90398931503295898438f,0.42616787552833557129f,0.90464407205581665039f,
+0.42477968335151672363f,0.90529674291610717773f,0.42339047789573669434f,
+0.90594726800918579102f,0.42200025916099548340f,0.90659570693969726562f,
+0.42060908675193786621f,0.90724200010299682617f,0.41921690106391906738f,
+0.90788608789443969727f,0.41782370209693908691f,0.90852808952331542969f,
+0.41642954945564270020f,0.90916800498962402344f,0.41503441333770751953f,
+0.90980571508407592773f,0.41363832354545593262f,0.91044127941131591797f,
+0.41224122047424316406f,0.91107475757598876953f,0.41084316372871398926f,
+0.91170603036880493164f,0.40944415330886840820f,0.91233515739440917969f,
+0.40804415941238403320f,0.91296219825744628906f,0.40664321184158325195f,
+0.91358703374862670898f,0.40524131059646606445f,0.91420978307723999023f,
+0.40383845567703247070f,0.91483032703399658203f,0.40243464708328247070f,
+0.91544872522354125977f,0.40102988481521606445f,0.91606497764587402344f,
+0.39962419867515563965f,0.91667908430099487305f,0.39821755886077880859f,
+0.91729098558425903320f,0.39680999517440795898f,0.91790080070495605469f,
+0.39540147781372070312f,0.91850841045379638672f,0.39399203658103942871f,
+0.91911387443542480469f,0.39258167147636413574f,0.91971713304519653320f,
+0.39117038249969482422f,0.92031830549240112305f,0.38975816965103149414f,
+0.92091721296310424805f,0.38834503293037414551f,0.92151403427124023438f,
+0.38693100214004516602f,0.92210865020751953125f,0.38551604747772216797f,
+0.92270112037658691406f,0.38410019874572753906f,0.92329144477844238281f,
+0.38268342614173889160f,0.92387950420379638672f,0.38126575946807861328f,
+0.92446547746658325195f,0.37984719872474670410f,0.92504924535751342773f,
+0.37842774391174316406f,0.92563080787658691406f,0.37700742483139038086f,
+0.92621022462844848633f,0.37558618187904357910f,0.92678749561309814453f,
+0.37416407465934753418f,0.92736250162124633789f,0.37274107336997985840f,
+0.92793542146682739258f,0.37131720781326293945f,0.92850607633590698242f,
+0.36989244818687438965f,0.92907458543777465820f,0.36846682429313659668f,
+0.92964088916778564453f,0.36704033613204956055f,0.93020504713058471680f,
+0.36561298370361328125f,0.93076694011688232422f,0.36418479681015014648f,
+0.93132668733596801758f,0.36275571584701538086f,0.93188428878784179688f,
+0.36132580041885375977f,0.93243962526321411133f,0.35989505052566528320f,
+0.93299281597137451172f,0.35846340656280517578f,0.93354380130767822266f,
+0.35703095793724060059f,0.93409252166748046875f,0.35559767484664916992f,
+0.93463915586471557617f,0.35416352748870849609f,0.93518352508544921875f,
+0.35272854566574096680f,0.93572568893432617188f,0.35129275918006896973f,
+0.93626564741134643555f,0.34985613822937011719f,0.93680346012115478516f,
+0.34841868281364440918f,0.93733900785446166992f,0.34698042273521423340f,
+0.93787235021591186523f,0.34554132819175720215f,0.93840354681015014648f,
+0.34410142898559570312f,0.93893247842788696289f,0.34266072511672973633f,
+0.93945920467376708984f,0.34121921658515930176f,0.93998372554779052734f,
+0.33977687358856201172f,0.94050604104995727539f,0.33833375573158264160f,
+0.94102615118026733398f,0.33688986301422119141f,0.94154405593872070312f,
+0.33544513583183288574f,0.94205975532531738281f,0.33399966359138488770f,
+0.94257318973541259766f,0.33255335688591003418f,0.94308441877365112305f,
+0.33110630512237548828f,0.94359344244003295898f,0.32965844869613647461f,
+0.94410026073455810547f,0.32820984721183776855f,0.94460481405258178711f,
+0.32676044106483459473f,0.94510722160339355469f,0.32531028985977172852f,
+0.94560730457305908203f,0.32385936379432678223f,0.94610524177551269531f,
+0.32240769267082214355f,0.94660091400146484375f,0.32095524668693542480f,
+0.94709438085556030273f,0.31950202584266662598f,0.94758558273315429688f,
+0.31804808974266052246f,0.94807457923889160156f,0.31659337878227233887f,
+0.94856137037277221680f,0.31513792276382446289f,0.94904589653015136719f,
+0.31368175148963928223f,0.94952815771102905273f,0.31222480535507202148f,
+0.95000827312469482422f,0.31076714396476745605f,0.95048606395721435547f,
+0.30930876731872558594f,0.95096164941787719727f,0.30784964561462402344f,
+0.95143502950668334961f,0.30638980865478515625f,0.95190614461898803711f,
+0.30492922663688659668f,0.95237499475479125977f,0.30346795916557312012f,
+0.95284163951873779297f,0.30200594663619995117f,0.95330601930618286133f,
+0.30054324865341186523f,0.95376819372177124023f,0.29907983541488647461f,
+0.95422810316085815430f,0.29761570692062377930f,0.95468574762344360352f,
+0.29615089297294616699f,0.95514118671417236328f,0.29468536376953125000f,
+0.95559436082839965820f,0.29321914911270141602f,0.95604526996612548828f,
+0.29175224900245666504f,0.95649391412734985352f,0.29028466343879699707f,
+0.95694035291671752930f,0.28881642222404479980f,0.95738452672958374023f,
+0.28734746575355529785f,0.95782643556594848633f,0.28587782382965087891f,
+0.95826607942581176758f,0.28440752625465393066f,0.95870345830917358398f,
+0.28293657302856445312f,0.95913863182067871094f,0.28146493434906005859f,
+0.95957154035568237305f,0.27999264001846313477f,0.96000212430953979492f,
+0.27851969003677368164f,0.96043050289154052734f,0.27704608440399169922f,
+0.96085661649703979492f,0.27557182312011718750f,0.96128046512603759766f,
+0.27409690618515014648f,0.96170204877853393555f,0.27262136340141296387f,
+0.96212142705917358398f,0.27114516496658325195f,0.96253848075866699219f,
+0.26966831088066101074f,0.96295326948165893555f,0.26819086074829101562f,
+0.96336579322814941406f,0.26671275496482849121f,0.96377605199813842773f,
+0.26523402333259582520f,0.96418404579162597656f,0.26375466585159301758f,
+0.96458977460861206055f,0.26227471232414245605f,0.96499323844909667969f,
+0.26079410314559936523f,0.96539443731307983398f,0.25931292772293090820f,
+0.96579337120056152344f,0.25783109664916992188f,0.96618998050689697266f,
+0.25634866952896118164f,0.96658438444137573242f,0.25486564636230468750f,
+0.96697646379470825195f,0.25338202714920043945f,0.96736627817153930664f,
+0.25189781188964843750f,0.96775382757186889648f,0.25041300058364868164f,
+0.96813911199569702148f,0.24892760813236236572f,0.96852207183837890625f,
+0.24744161963462829590f,0.96890282630920410156f,0.24595504999160766602f,
+0.96928125619888305664f,0.24446789920330047607f,0.96965736150741577148f,
+0.24298018217086791992f,0.97003126144409179688f,0.24149188399314880371f,
+0.97040283679962158203f,0.24000301957130432129f,0.97077214717864990234f,
+0.23851358890533447266f,0.97113913297653198242f,0.23702360689640045166f,
+0.97150391340255737305f,0.23553305864334106445f,0.97186630964279174805f,
+0.23404195904731750488f,0.97222650051116943359f,0.23255030810832977295f,
+0.97258436679840087891f,0.23105810582637786865f,0.97293996810913085938f,
+0.22956536710262298584f,0.97329324483871459961f,0.22807207703590393066f,
+0.97364425659179687500f,0.22657826542854309082f,0.97399294376373291016f,
+0.22508391737937927246f,0.97433936595916748047f,0.22358903288841247559f,
+0.97468352317810058594f,0.22209362685680389404f,0.97502535581588745117f,
+0.22059768438339233398f,0.97536486387252807617f,0.21910123527050018311f,
+0.97570210695266723633f,0.21760427951812744141f,0.97603708505630493164f,
+0.21610680222511291504f,0.97636973857879638672f,0.21460881829261779785f,
+0.97670006752014160156f,0.21311031281948089600f,0.97702813148498535156f,
+0.21161133050918579102f,0.97735387086868286133f,0.21011184155941009521f,
+0.97767734527587890625f,0.20861184597015380859f,0.97799849510192871094f,
+0.20711137354373931885f,0.97831737995147705078f,0.20561040937900543213f,
+0.97863394021987915039f,0.20410896837711334229f,0.97894817590713500977f,
+0.20260703563690185547f,0.97926014661788940430f,0.20110464096069335938f,
+0.97956979274749755859f,0.19960175454616546631f,0.97987711429595947266f,
+0.19809840619564056396f,0.98018211126327514648f,0.19659459590911865234f,
+0.98048484325408935547f,0.19509032368659973145f,0.98078525066375732422f,
+0.19358558952808380127f,0.98108339309692382812f,0.19208039343357086182f,
+0.98137921094894409180f,0.19057475030422210693f,0.98167270421981811523f,
+0.18906866014003753662f,0.98196387290954589844f,0.18756212294101715088f,
+0.98225271701812744141f,0.18605515360832214355f,0.98253929615020751953f,
+0.18454773724079132080f,0.98282355070114135742f,0.18303988873958587646f,
+0.98310548067092895508f,0.18153160810470581055f,0.98338508605957031250f,
+0.18002289533615112305f,0.98366242647171020508f,0.17851376533508300781f,
+0.98393744230270385742f,0.17700421810150146484f,0.98421007394790649414f,
+0.17549425363540649414f,0.98448044061660766602f,0.17398387193679809570f,
+0.98474848270416259766f,0.17247308790683746338f,0.98501425981521606445f,
+0.17096188664436340332f,0.98527765274047851562f,0.16945029795169830322f,
+0.98553872108459472656f,0.16793829202651977539f,0.98579752445220947266f,
+0.16642589867115020752f,0.98605394363403320312f,0.16491311788558959961f,
+0.98630809783935546875f,0.16339994966983795166f,0.98655992746353149414f,
+0.16188639402389526367f,0.98680937290191650391f,0.16037245094776153564f,
+0.98705655336380004883f,0.15885815024375915527f,0.98730140924453735352f,
+0.15734346210956573486f,0.98754394054412841797f,0.15582840144634246826f,
+0.98778414726257324219f,0.15431296825408935547f,0.98802202939987182617f,
+0.15279719233512878418f,0.98825758695602416992f,0.15128104388713836670f,
+0.98849081993103027344f,0.14976453781127929688f,0.98872166872024536133f,
+0.14824767410755157471f,0.98895025253295898438f,0.14673046767711639404f,
+0.98917651176452636719f,0.14521291851997375488f,0.98940044641494750977f,
+0.14369502663612365723f,0.98962199687957763672f,0.14217680692672729492f,
+0.98984128236770629883f,0.14065824449062347412f,0.99005818367004394531f,
+0.13913933932781219482f,0.99027281999588012695f,0.13762012124061584473f,
+0.99048507213592529297f,0.13610057532787322998f,0.99069499969482421875f,
+0.13458070158958435059f,0.99090266227722167969f,0.13306052982807159424f,
+0.99110794067382812500f,0.13154003024101257324f,0.99131083488464355469f,
+0.13001921772956848145f,0.99151146411895751953f,0.12849810719490051270f,
+0.99170976877212524414f,0.12697669863700866699f,0.99190568923950195312f,
+0.12545497715473175049f,0.99209928512573242188f,0.12393297255039215088f,
+0.99229061603546142578f,0.12241067737340927124f,0.99247956275939941406f,
+0.12088808417320251465f,0.99266612529754638672f,0.11936521530151367188f,
+0.99285042285919189453f,0.11784206330776214600f,0.99303233623504638672f,
+0.11631862819194793701f,0.99321192502975463867f,0.11479492485523223877f,
+0.99338918924331665039f,0.11327095329761505127f,0.99356412887573242188f,
+0.11174671351909637451f,0.99373674392700195312f,0.11022220551967620850f,
+0.99390697479248046875f,0.10869744420051574707f,0.99407488107681274414f,
+0.10717242211103439331f,0.99424046277999877930f,0.10564715415239334106f,
+0.99440366029739379883f,0.10412163287401199341f,0.99456459283828735352f,
+0.10259586572647094727f,0.99472314119338989258f,0.10106986016035079956f,
+0.99487930536270141602f,0.09954361617565155029f,0.99503320455551147461f,
+0.09801714122295379639f,0.99518471956253051758f,0.09649042785167694092f,
+0.99533390998840332031f,0.09496349841356277466f,0.99548077583312988281f,
+0.09343633800745010376f,0.99562525749206542969f,0.09190895408391952515f,
+0.99576741456985473633f,0.09038136154413223267f,0.99590724706649780273f,
+0.08885355293750762939f,0.99604469537734985352f,0.08732553571462631226f,
+0.99617981910705566406f,0.08579730987548828125f,0.99631261825561523438f,
+0.08426889032125473022f,0.99644303321838378906f,0.08274026215076446533f,
+0.99657112360000610352f,0.08121144771575927734f,0.99669688940048217773f,
+0.07968243956565856934f,0.99682027101516723633f,0.07815324515104293823f,
+0.99694132804870605469f,0.07662386447191238403f,0.99706006050109863281f,
+0.07509429752826690674f,0.99717640876770019531f,0.07356456667184829712f,
+0.99729043245315551758f,0.07203464955091476440f,0.99740213155746459961f,
+0.07050457596778869629f,0.99751144647598266602f,0.06897433102130889893f,
+0.99761843681335449219f,0.06744392216205596924f,0.99772304296493530273f,
+0.06591334939002990723f,0.99782532453536987305f,0.06438262760639190674f,
+0.99792528152465820312f,0.06285175681114196777f,0.99802285432815551758f,
+0.06132073700428009033f,0.99811810255050659180f,0.05978957191109657288f,
+0.99821102619171142578f,0.05825826525688171387f,0.99830156564712524414f,
+0.05672682076692581177f,0.99838972091674804688f,0.05519524589180946350f,
+0.99847555160522460938f,0.05366353690624237061f,0.99855905771255493164f,
+0.05213170498609542847f,0.99864023923873901367f,0.05059975013136863708f,
+0.99871903657913208008f,0.04906767606735229492f,0.99879544973373413086f,
+0.04753548279404640198f,0.99886953830718994141f,0.04600318148732185364f,
+0.99894130229949951172f,0.04447077214717864990f,0.99901068210601806641f,
+0.04293825849890708923f,0.99907773733139038086f,0.04140564054250717163f,
+0.99914240837097167969f,0.03987292572855949402f,0.99920475482940673828f,
+0.03834012150764465332f,0.99926477670669555664f,0.03680722415447235107f,
+0.99932235479354858398f,0.03527423739433288574f,0.99937766790390014648f,
+0.03374117240309715271f,0.99943059682846069336f,0.03220802545547485352f,
+0.99948120117187500000f,0.03067480400204658508f,0.99952942132949829102f,
+0.02914150804281234741f,0.99957531690597534180f,0.02760814502835273743f,
+0.99961882829666137695f,0.02607471868395805359f,0.99966001510620117188f,
+0.02454122900962829590f,0.99969881772994995117f,0.02300768159329891205f,
+0.99973529577255249023f,0.02147408016026020050f,0.99976938962936401367f,
+0.01994042843580245972f,0.99980115890502929688f,0.01840673014521598816f,
+0.99983060359954833984f,0.01687298715114593506f,0.99985766410827636719f,
+0.01533920597285032272f,0.99988234043121337891f,0.01380538847297430038f,
+0.99990469217300415039f,0.01227153837680816650f,0.99992471933364868164f,
+0.01073765940964221954f,0.99994236230850219727f,0.00920375436544418335f,
+0.99995762109756469727f,0.00766982883214950562f,0.99997061491012573242f,
+0.00613588467240333557f,0.99998116493225097656f,0.00460192607715725899f,
+0.99998939037322998047f,0.00306795677170157433f,0.99999529123306274414f,
+0.00153398013208061457f,0.99999880790710449219f,1.00000000000000000000f,
+0.00000000000000000000f,0.99998116493225097656f,0.00613588467240333557f,
+0.99992471933364868164f,0.01227153837680816650f,0.99983060359954833984f,
+0.01840673014521598816f,0.99969881772994995117f,0.02454122900962829590f,
+0.99952942132949829102f,0.03067480400204658508f,0.99932235479354858398f,
+0.03680722415447235107f,0.99907773733139038086f,0.04293825849890708923f,
+0.99879544973373413086f,0.04906767606735229492f,0.99847555160522460938f,
+0.05519524589180946350f,0.99811810255050659180f,0.06132073700428009033f,
+0.99772304296493530273f,0.06744392216205596924f,0.99729043245315551758f,
+0.07356456667184829712f,0.99682027101516723633f,0.07968243956565856934f,
+0.99631261825561523438f,0.08579730987548828125f,0.99576741456985473633f,
+0.09190895408391952515f,0.99518471956253051758f,0.09801714122295379639f,
+0.99456459283828735352f,0.10412163287401199341f,0.99390697479248046875f,
+0.11022220551967620850f,0.99321192502975463867f,0.11631862819194793701f,
+0.99247956275939941406f,0.12241067737340927124f,0.99170976877212524414f,
+0.12849810719490051270f,0.99090266227722167969f,0.13458070158958435059f,
+0.99005818367004394531f,0.14065824449062347412f,0.98917651176452636719f,
+0.14673046767711639404f,0.98825758695602416992f,0.15279719233512878418f,
+0.98730140924453735352f,0.15885815024375915527f,0.98630809783935546875f,
+0.16491311788558959961f,0.98527765274047851562f,0.17096188664436340332f,
+0.98421007394790649414f,0.17700421810150146484f,0.98310548067092895508f,
+0.18303988873958587646f,0.98196387290954589844f,0.18906866014003753662f,
+0.98078525066375732422f,0.19509032368659973145f,0.97956979274749755859f,
+0.20110464096069335938f,0.97831737995147705078f,0.20711137354373931885f,
+0.97702813148498535156f,0.21311031281948089600f,0.97570210695266723633f,
+0.21910123527050018311f,0.97433936595916748047f,0.22508391737937927246f,
+0.97293996810913085938f,0.23105810582637786865f,0.97150391340255737305f,
+0.23702360689640045166f,0.97003126144409179688f,0.24298018217086791992f,
+0.96852207183837890625f,0.24892760813236236572f,0.96697646379470825195f,
+0.25486564636230468750f,0.96539443731307983398f,0.26079410314559936523f,
+0.96377605199813842773f,0.26671275496482849121f,0.96212142705917358398f,
+0.27262136340141296387f,0.96043050289154052734f,0.27851969003677368164f,
+0.95870345830917358398f,0.28440752625465393066f,0.95694035291671752930f,
+0.29028466343879699707f,0.95514118671417236328f,0.29615089297294616699f,
+0.95330601930618286133f,0.30200594663619995117f,0.95143502950668334961f,
+0.30784964561462402344f,0.94952815771102905273f,0.31368175148963928223f,
+0.94758558273315429688f,0.31950202584266662598f,0.94560730457305908203f,
+0.32531028985977172852f,0.94359344244003295898f,0.33110630512237548828f,
+0.94154405593872070312f,0.33688986301422119141f,0.93945920467376708984f,
+0.34266072511672973633f,0.93733900785446166992f,0.34841868281364440918f,
+0.93518352508544921875f,0.35416352748870849609f,0.93299281597137451172f,
+0.35989505052566528320f,0.93076694011688232422f,0.36561298370361328125f,
+0.92850607633590698242f,0.37131720781326293945f,0.92621022462844848633f,
+0.37700742483139038086f,0.92387950420379638672f,0.38268342614173889160f,
+0.92151403427124023438f,0.38834503293037414551f,0.91911387443542480469f,
+0.39399203658103942871f,0.91667908430099487305f,0.39962419867515563965f,
+0.91420978307723999023f,0.40524131059646606445f,0.91170603036880493164f,
+0.41084316372871398926f,0.90916800498962402344f,0.41642954945564270020f,
+0.90659570693969726562f,0.42200025916099548340f,0.90398931503295898438f,
+0.42755508422851562500f,0.90134882926940917969f,0.43309381604194641113f,
+0.89867448806762695312f,0.43861624598503112793f,0.89596623182296752930f,
+0.44412213563919067383f,0.89322429895401000977f,0.44961133599281311035f,
+0.89044874906539916992f,0.45508357882499694824f,0.88763964176177978516f,
+0.46053871512413024902f,0.88479709625244140625f,0.46597650647163391113f,
+0.88192129135131835938f,0.47139674425125122070f,0.87901222705841064453f,
+0.47679921984672546387f,0.87607008218765258789f,0.48218378424644470215f,
+0.87309497594833374023f,0.48755016922950744629f,0.87008696794509887695f,
+0.49289819598197937012f,0.86704623699188232422f,0.49822765588760375977f,
+0.86397284269332885742f,0.50353837013244628906f,0.86086696386337280273f,
+0.50883013010025024414f,0.85772860050201416016f,0.51410275697708129883f,
+0.85455799102783203125f,0.51935601234436035156f,0.85135519504547119141f,
+0.52458965778350830078f,0.84812033176422119141f,0.52980363368988037109f,
+0.84485357999801635742f,0.53499764204025268555f,0.84155499935150146484f,
+0.54017144441604614258f,0.83822470903396606445f,0.54532498121261596680f,
+0.83486288785934448242f,0.55045795440673828125f,0.83146959543228149414f,
+0.55557024478912353516f,0.82804507017135620117f,0.56066155433654785156f,
+0.82458931207656860352f,0.56573182344436645508f,0.82110249996185302734f,
+0.57078075408935546875f,0.81758481264114379883f,0.57580816745758056641f,
+0.81403630971908569336f,0.58081394433975219727f,0.81045717000961303711f,
+0.58579784631729125977f,0.80684757232666015625f,0.59075969457626342773f,
+0.80320751667022705078f,0.59569931030273437500f,0.79953724145889282227f,
+0.60061645507812500000f,0.79583692550659179688f,0.60551106929779052734f,
+0.79210656881332397461f,0.61038279533386230469f,0.78834640979766845703f,
+0.61523157358169555664f,0.78455656766891479492f,0.62005722522735595703f,
+0.78073722124099731445f,0.62485951185226440430f,0.77688848972320556641f,
+0.62963825464248657227f,0.77301043272018432617f,0.63439327478408813477f,
+0.76910334825515747070f,0.63912445306777954102f,0.76516723632812500000f,
+0.64383155107498168945f,0.76120239496231079102f,0.64851438999176025391f,
+0.75720882415771484375f,0.65317285060882568359f,0.75318682193756103516f,
+0.65780669450759887695f,0.74913638830184936523f,0.66241580247879028320f,
+0.74505776166915893555f,0.66699993610382080078f,0.74095112085342407227f,
+0.67155897617340087891f,0.73681658506393432617f,0.67609268426895141602f,
+0.73265427350997924805f,0.68060100078582763672f,0.72846436500549316406f,
+0.68508368730545043945f,0.72424709796905517578f,0.68954056501388549805f,
+0.72000253200531005859f,0.69397145509719848633f,0.71573084592819213867f,
+0.69837623834609985352f,0.71143221855163574219f,0.70275473594665527344f,
+0.70710676908493041992f,0.70710676908493041992f,0.70275473594665527344f,
+0.71143221855163574219f,0.69837623834609985352f,0.71573084592819213867f,
+0.69397145509719848633f,0.72000253200531005859f,0.68954056501388549805f,
+0.72424709796905517578f,0.68508368730545043945f,0.72846436500549316406f,
+0.68060100078582763672f,0.73265427350997924805f,0.67609268426895141602f,
+0.73681658506393432617f,0.67155897617340087891f,0.74095112085342407227f,
+0.66699993610382080078f,0.74505776166915893555f,0.66241580247879028320f,
+0.74913638830184936523f,0.65780669450759887695f,0.75318682193756103516f,
+0.65317285060882568359f,0.75720882415771484375f,0.64851438999176025391f,
+0.76120239496231079102f,0.64383155107498168945f,0.76516723632812500000f,
+0.63912445306777954102f,0.76910334825515747070f,0.63439327478408813477f,
+0.77301043272018432617f,0.62963825464248657227f,0.77688848972320556641f,
+0.62485951185226440430f,0.78073722124099731445f,0.62005722522735595703f,
+0.78455656766891479492f,0.61523157358169555664f,0.78834640979766845703f,
+0.61038279533386230469f,0.79210656881332397461f,0.60551106929779052734f,
+0.79583692550659179688f,0.60061645507812500000f,0.79953724145889282227f,
+0.59569931030273437500f,0.80320751667022705078f,0.59075969457626342773f,
+0.80684757232666015625f,0.58579784631729125977f,0.81045717000961303711f,
+0.58081394433975219727f,0.81403630971908569336f,0.57580816745758056641f,
+0.81758481264114379883f,0.57078075408935546875f,0.82110249996185302734f,
+0.56573182344436645508f,0.82458931207656860352f,0.56066155433654785156f,
+0.82804507017135620117f,0.55557024478912353516f,0.83146959543228149414f,
+0.55045795440673828125f,0.83486288785934448242f,0.54532498121261596680f,
+0.83822470903396606445f,0.54017144441604614258f,0.84155499935150146484f,
+0.53499764204025268555f,0.84485357999801635742f,0.52980363368988037109f,
+0.84812033176422119141f,0.52458965778350830078f,0.85135519504547119141f,
+0.51935601234436035156f,0.85455799102783203125f,0.51410275697708129883f,
+0.85772860050201416016f,0.50883013010025024414f,0.86086696386337280273f,
+0.50353837013244628906f,0.86397284269332885742f,0.49822765588760375977f,
+0.86704623699188232422f,0.49289819598197937012f,0.87008696794509887695f,
+0.48755016922950744629f,0.87309497594833374023f,0.48218378424644470215f,
+0.87607008218765258789f,0.47679921984672546387f,0.87901222705841064453f,
+0.47139674425125122070f,0.88192129135131835938f,0.46597650647163391113f,
+0.88479709625244140625f,0.46053871512413024902f,0.88763964176177978516f,
+0.45508357882499694824f,0.89044874906539916992f,0.44961133599281311035f,
+0.89322429895401000977f,0.44412213563919067383f,0.89596623182296752930f,
+0.43861624598503112793f,0.89867448806762695312f,0.43309381604194641113f,
+0.90134882926940917969f,0.42755508422851562500f,0.90398931503295898438f,
+0.42200025916099548340f,0.90659570693969726562f,0.41642954945564270020f,
+0.90916800498962402344f,0.41084316372871398926f,0.91170603036880493164f,
+0.40524131059646606445f,0.91420978307723999023f,0.39962419867515563965f,
+0.91667908430099487305f,0.39399203658103942871f,0.91911387443542480469f,
+0.38834503293037414551f,0.92151403427124023438f,0.38268342614173889160f,
+0.92387950420379638672f,0.37700742483139038086f,0.92621022462844848633f,
+0.37131720781326293945f,0.92850607633590698242f,0.36561298370361328125f,
+0.93076694011688232422f,0.35989505052566528320f,0.93299281597137451172f,
+0.35416352748870849609f,0.93518352508544921875f,0.34841868281364440918f,
+0.93733900785446166992f,0.34266072511672973633f,0.93945920467376708984f,
+0.33688986301422119141f,0.94154405593872070312f,0.33110630512237548828f,
+0.94359344244003295898f,0.32531028985977172852f,0.94560730457305908203f,
+0.31950202584266662598f,0.94758558273315429688f,0.31368175148963928223f,
+0.94952815771102905273f,0.30784964561462402344f,0.95143502950668334961f,
+0.30200594663619995117f,0.95330601930618286133f,0.29615089297294616699f,
+0.95514118671417236328f,0.29028466343879699707f,0.95694035291671752930f,
+0.28440752625465393066f,0.95870345830917358398f,0.27851969003677368164f,
+0.96043050289154052734f,0.27262136340141296387f,0.96212142705917358398f,
+0.26671275496482849121f,0.96377605199813842773f,0.26079410314559936523f,
+0.96539443731307983398f,0.25486564636230468750f,0.96697646379470825195f,
+0.24892760813236236572f,0.96852207183837890625f,0.24298018217086791992f,
+0.97003126144409179688f,0.23702360689640045166f,0.97150391340255737305f,
+0.23105810582637786865f,0.97293996810913085938f,0.22508391737937927246f,
+0.97433936595916748047f,0.21910123527050018311f,0.97570210695266723633f,
+0.21311031281948089600f,0.97702813148498535156f,0.20711137354373931885f,
+0.97831737995147705078f,0.20110464096069335938f,0.97956979274749755859f,
+0.19509032368659973145f,0.98078525066375732422f,0.18906866014003753662f,
+0.98196387290954589844f,0.18303988873958587646f,0.98310548067092895508f,
+0.17700421810150146484f,0.98421007394790649414f,0.17096188664436340332f,
+0.98527765274047851562f,0.16491311788558959961f,0.98630809783935546875f,
+0.15885815024375915527f,0.98730140924453735352f,0.15279719233512878418f,
+0.98825758695602416992f,0.14673046767711639404f,0.98917651176452636719f,
+0.14065824449062347412f,0.99005818367004394531f,0.13458070158958435059f,
+0.99090266227722167969f,0.12849810719490051270f,0.99170976877212524414f,
+0.12241067737340927124f,0.99247956275939941406f,0.11631862819194793701f,
+0.99321192502975463867f,0.11022220551967620850f,0.99390697479248046875f,
+0.10412163287401199341f,0.99456459283828735352f,0.09801714122295379639f,
+0.99518471956253051758f,0.09190895408391952515f,0.99576741456985473633f,
+0.08579730987548828125f,0.99631261825561523438f,0.07968243956565856934f,
+0.99682027101516723633f,0.07356456667184829712f,0.99729043245315551758f,
+0.06744392216205596924f,0.99772304296493530273f,0.06132073700428009033f,
+0.99811810255050659180f,0.05519524589180946350f,0.99847555160522460938f,
+0.04906767606735229492f,0.99879544973373413086f,0.04293825849890708923f,
+0.99907773733139038086f,0.03680722415447235107f,0.99932235479354858398f,
+0.03067480400204658508f,0.99952942132949829102f,0.02454122900962829590f,
+0.99969881772994995117f,0.01840673014521598816f,0.99983060359954833984f,
+0.01227153837680816650f,0.99992471933364868164f,0.00613588467240333557f,
+0.99998116493225097656f,1.00000000000000000000f,0.00000000000000000000f,
+0.99969881772994995117f,0.02454122900962829590f,0.99879544973373413086f,
+0.04906767606735229492f,0.99729043245315551758f,0.07356456667184829712f,
+0.99518471956253051758f,0.09801714122295379639f,0.99247956275939941406f,
+0.12241067737340927124f,0.98917651176452636719f,0.14673046767711639404f,
+0.98527765274047851562f,0.17096188664436340332f,0.98078525066375732422f,
+0.19509032368659973145f,0.97570210695266723633f,0.21910123527050018311f,
+0.97003126144409179688f,0.24298018217086791992f,0.96377605199813842773f,
+0.26671275496482849121f,0.95694035291671752930f,0.29028466343879699707f,
+0.94952815771102905273f,0.31368175148963928223f,0.94154405593872070312f,
+0.33688986301422119141f,0.93299281597137451172f,0.35989505052566528320f,
+0.92387950420379638672f,0.38268342614173889160f,0.91420978307723999023f,
+0.40524131059646606445f,0.90398931503295898438f,0.42755508422851562500f,
+0.89322429895401000977f,0.44961133599281311035f,0.88192129135131835938f,
+0.47139674425125122070f,0.87008696794509887695f,0.49289819598197937012f,
+0.85772860050201416016f,0.51410275697708129883f,0.84485357999801635742f,
+0.53499764204025268555f,0.83146959543228149414f,0.55557024478912353516f,
+0.81758481264114379883f,0.57580816745758056641f,0.80320751667022705078f,
+0.59569931030273437500f,0.78834640979766845703f,0.61523157358169555664f,
+0.77301043272018432617f,0.63439327478408813477f,0.75720882415771484375f,
+0.65317285060882568359f,0.74095112085342407227f,0.67155897617340087891f,
+0.72424709796905517578f,0.68954056501388549805f,0.70710676908493041992f,
+0.70710676908493041992f,0.68954056501388549805f,0.72424709796905517578f,
+0.67155897617340087891f,0.74095112085342407227f,0.65317285060882568359f,
+0.75720882415771484375f,0.63439327478408813477f,0.77301043272018432617f,
+0.61523157358169555664f,0.78834640979766845703f,0.59569931030273437500f,
+0.80320751667022705078f,0.57580816745758056641f,0.81758481264114379883f,
+0.55557024478912353516f,0.83146959543228149414f,0.53499764204025268555f,
+0.84485357999801635742f,0.51410275697708129883f,0.85772860050201416016f,
+0.49289819598197937012f,0.87008696794509887695f,0.47139674425125122070f,
+0.88192129135131835938f,0.44961133599281311035f,0.89322429895401000977f,
+0.42755508422851562500f,0.90398931503295898438f,0.40524131059646606445f,
+0.91420978307723999023f,0.38268342614173889160f,0.92387950420379638672f,
+0.35989505052566528320f,0.93299281597137451172f,0.33688986301422119141f,
+0.94154405593872070312f,0.31368175148963928223f,0.94952815771102905273f,
+0.29028466343879699707f,0.95694035291671752930f,0.26671275496482849121f,
+0.96377605199813842773f,0.24298018217086791992f,0.97003126144409179688f,
+0.21910123527050018311f,0.97570210695266723633f,0.19509032368659973145f,
+0.98078525066375732422f,0.17096188664436340332f,0.98527765274047851562f,
+0.14673046767711639404f,0.98917651176452636719f,0.12241067737340927124f,
+0.99247956275939941406f,0.09801714122295379639f,0.99518471956253051758f,
+0.07356456667184829712f,0.99729043245315551758f,0.04906767606735229492f,
+0.99879544973373413086f,0.02454122900962829590f,0.99969881772994995117f,
+1.00000000000000000000f,0.00000000000000000000f,0.99518471956253051758f,
+0.09801714122295379639f,0.98078525066375732422f,0.19509032368659973145f,
+0.95694035291671752930f,0.29028466343879699707f,0.92387950420379638672f,
+0.38268342614173889160f,0.88192129135131835938f,0.47139674425125122070f,
+0.83146959543228149414f,0.55557024478912353516f,0.77301043272018432617f,
+0.63439327478408813477f,0.70710676908493041992f,0.70710676908493041992f,
+0.63439327478408813477f,0.77301043272018432617f,0.55557024478912353516f,
+0.83146959543228149414f,0.47139674425125122070f,0.88192129135131835938f,
+0.38268342614173889160f,0.92387950420379638672f,0.29028466343879699707f,
+0.95694035291671752930f,0.19509032368659973145f,0.98078525066375732422f,
+0.09801714122295379639f,0.99518471956253051758f,1.00000000000000000000f,
+0.00000000000000000000f,0.92387950420379638672f,0.38268342614173889160f,
+0.70710676908493041992f,0.70710676908493041992f,0.38268342614173889160f,
+0.92387950420379638672f,};
+
+float32_t rearranged_twiddle_stride2_4096_f32[2728]={
+1.00000000000000000000f,0.00000000000000000000f,0.99999529123306274414f,
+0.00306795677170157433f,0.99998116493225097656f,0.00613588467240333557f,
+0.99995762109756469727f,0.00920375436544418335f,0.99992471933364868164f,
+0.01227153837680816650f,0.99988234043121337891f,0.01533920597285032272f,
+0.99983060359954833984f,0.01840673014521598816f,0.99976938962936401367f,
+0.02147408016026020050f,0.99969881772994995117f,0.02454122900962829590f,
+0.99961882829666137695f,0.02760814502835273743f,0.99952942132949829102f,
+0.03067480400204658508f,0.99943059682846069336f,0.03374117240309715271f,
+0.99932235479354858398f,0.03680722415447235107f,0.99920475482940673828f,
+0.03987292572855949402f,0.99907773733139038086f,0.04293825849890708923f,
+0.99894130229949951172f,0.04600318148732185364f,0.99879544973373413086f,
+0.04906767606735229492f,0.99864023923873901367f,0.05213170498609542847f,
+0.99847555160522460938f,0.05519524589180946350f,0.99830156564712524414f,
+0.05825826525688171387f,0.99811810255050659180f,0.06132073700428009033f,
+0.99792528152465820312f,0.06438262760639190674f,0.99772304296493530273f,
+0.06744392216205596924f,0.99751144647598266602f,0.07050457596778869629f,
+0.99729043245315551758f,0.07356456667184829712f,0.99706006050109863281f,
+0.07662386447191238403f,0.99682027101516723633f,0.07968243956565856934f,
+0.99657112360000610352f,0.08274026215076446533f,0.99631261825561523438f,
+0.08579730987548828125f,0.99604469537734985352f,0.08885355293750762939f,
+0.99576741456985473633f,0.09190895408391952515f,0.99548077583312988281f,
+0.09496349841356277466f,0.99518471956253051758f,0.09801714122295379639f,
+0.99487930536270141602f,0.10106986016035079956f,0.99456459283828735352f,
+0.10412163287401199341f,0.99424046277999877930f,0.10717242211103439331f,
+0.99390697479248046875f,0.11022220551967620850f,0.99356412887573242188f,
+0.11327095329761505127f,0.99321192502975463867f,0.11631862819194793701f,
+0.99285042285919189453f,0.11936521530151367188f,0.99247956275939941406f,
+0.12241067737340927124f,0.99209928512573242188f,0.12545497715473175049f,
+0.99170976877212524414f,0.12849810719490051270f,0.99131083488464355469f,
+0.13154003024101257324f,0.99090266227722167969f,0.13458070158958435059f,
+0.99048507213592529297f,0.13762012124061584473f,0.99005818367004394531f,
+0.14065824449062347412f,0.98962199687957763672f,0.14369502663612365723f,
+0.98917651176452636719f,0.14673046767711639404f,0.98872166872024536133f,
+0.14976453781127929688f,0.98825758695602416992f,0.15279719233512878418f,
+0.98778414726257324219f,0.15582840144634246826f,0.98730140924453735352f,
+0.15885815024375915527f,0.98680937290191650391f,0.16188639402389526367f,
+0.98630809783935546875f,0.16491311788558959961f,0.98579752445220947266f,
+0.16793829202651977539f,0.98527765274047851562f,0.17096188664436340332f,
+0.98474848270416259766f,0.17398387193679809570f,0.98421007394790649414f,
+0.17700421810150146484f,0.98366242647171020508f,0.18002289533615112305f,
+0.98310548067092895508f,0.18303988873958587646f,0.98253929615020751953f,
+0.18605515360832214355f,0.98196387290954589844f,0.18906866014003753662f,
+0.98137921094894409180f,0.19208039343357086182f,0.98078525066375732422f,
+0.19509032368659973145f,0.98018211126327514648f,0.19809840619564056396f,
+0.97956979274749755859f,0.20110464096069335938f,0.97894817590713500977f,
+0.20410896837711334229f,0.97831737995147705078f,0.20711137354373931885f,
+0.97767734527587890625f,0.21011184155941009521f,0.97702813148498535156f,
+0.21311031281948089600f,0.97636973857879638672f,0.21610680222511291504f,
+0.97570210695266723633f,0.21910123527050018311f,0.97502535581588745117f,
+0.22209362685680389404f,0.97433936595916748047f,0.22508391737937927246f,
+0.97364425659179687500f,0.22807207703590393066f,0.97293996810913085938f,
+0.23105810582637786865f,0.97222650051116943359f,0.23404195904731750488f,
+0.97150391340255737305f,0.23702360689640045166f,0.97077214717864990234f,
+0.24000301957130432129f,0.97003126144409179688f,0.24298018217086791992f,
+0.96928125619888305664f,0.24595504999160766602f,0.96852207183837890625f,
+0.24892760813236236572f,0.96775382757186889648f,0.25189781188964843750f,
+0.96697646379470825195f,0.25486564636230468750f,0.96618998050689697266f,
+0.25783109664916992188f,0.96539443731307983398f,0.26079410314559936523f,
+0.96458977460861206055f,0.26375466585159301758f,0.96377605199813842773f,
+0.26671275496482849121f,0.96295326948165893555f,0.26966831088066101074f,
+0.96212142705917358398f,0.27262136340141296387f,0.96128046512603759766f,
+0.27557182312011718750f,0.96043050289154052734f,0.27851969003677368164f,
+0.95957154035568237305f,0.28146493434906005859f,0.95870345830917358398f,
+0.28440752625465393066f,0.95782643556594848633f,0.28734746575355529785f,
+0.95694035291671752930f,0.29028466343879699707f,0.95604526996612548828f,
+0.29321914911270141602f,0.95514118671417236328f,0.29615089297294616699f,
+0.95422810316085815430f,0.29907983541488647461f,0.95330601930618286133f,
+0.30200594663619995117f,0.95237499475479125977f,0.30492922663688659668f,
+0.95143502950668334961f,0.30784964561462402344f,0.95048606395721435547f,
+0.31076714396476745605f,0.94952815771102905273f,0.31368175148963928223f,
+0.94856137037277221680f,0.31659337878227233887f,0.94758558273315429688f,
+0.31950202584266662598f,0.94660091400146484375f,0.32240769267082214355f,
+0.94560730457305908203f,0.32531028985977172852f,0.94460481405258178711f,
+0.32820984721183776855f,0.94359344244003295898f,0.33110630512237548828f,
+0.94257318973541259766f,0.33399966359138488770f,0.94154405593872070312f,
+0.33688986301422119141f,0.94050604104995727539f,0.33977687358856201172f,
+0.93945920467376708984f,0.34266072511672973633f,0.93840354681015014648f,
+0.34554132819175720215f,0.93733900785446166992f,0.34841868281364440918f,
+0.93626564741134643555f,0.35129275918006896973f,0.93518352508544921875f,
+0.35416352748870849609f,0.93409252166748046875f,0.35703095793724060059f,
+0.93299281597137451172f,0.35989505052566528320f,0.93188428878784179688f,
+0.36275571584701538086f,0.93076694011688232422f,0.36561298370361328125f,
+0.92964088916778564453f,0.36846682429313659668f,0.92850607633590698242f,
+0.37131720781326293945f,0.92736250162124633789f,0.37416407465934753418f,
+0.92621022462844848633f,0.37700742483139038086f,0.92504924535751342773f,
+0.37984719872474670410f,0.92387950420379638672f,0.38268342614173889160f,
+0.92270112037658691406f,0.38551604747772216797f,0.92151403427124023438f,
+0.38834503293037414551f,0.92031830549240112305f,0.39117038249969482422f,
+0.91911387443542480469f,0.39399203658103942871f,0.91790080070495605469f,
+0.39680999517440795898f,0.91667908430099487305f,0.39962419867515563965f,
+0.91544872522354125977f,0.40243464708328247070f,0.91420978307723999023f,
+0.40524131059646606445f,0.91296219825744628906f,0.40804415941238403320f,
+0.91170603036880493164f,0.41084316372871398926f,0.91044127941131591797f,
+0.41363832354545593262f,0.90916800498962402344f,0.41642954945564270020f,
+0.90788608789443969727f,0.41921690106391906738f,0.90659570693969726562f,
+0.42200025916099548340f,0.90529674291610717773f,0.42477968335151672363f,
+0.90398931503295898438f,0.42755508422851562500f,0.90267330408096313477f,
+0.43032649159431457520f,0.90134882926940917969f,0.43309381604194641113f,
+0.90001589059829711914f,0.43585708737373352051f,0.89867448806762695312f,
+0.43861624598503112793f,0.89732456207275390625f,0.44137126207351684570f,
+0.89596623182296752930f,0.44412213563919067383f,0.89459949731826782227f,
+0.44686883687973022461f,0.89322429895401000977f,0.44961133599281311035f,
+0.89184069633483886719f,0.45234957337379455566f,0.89044874906539916992f,
+0.45508357882499694824f,0.88904833793640136719f,0.45781329274177551270f,
+0.88763964176177978516f,0.46053871512413024902f,0.88622254133224487305f,
+0.46325978636741638184f,0.88479709625244140625f,0.46597650647163391113f,
+0.88336336612701416016f,0.46868881583213806152f,0.88192129135131835938f,
+0.47139674425125122070f,0.88047087192535400391f,0.47410020232200622559f,
+0.87901222705841064453f,0.47679921984672546387f,0.87754529714584350586f,
+0.47949376702308654785f,0.87607008218765258789f,0.48218378424644470215f,
+0.87458664178848266602f,0.48486924171447753906f,0.87309497594833374023f,
+0.48755016922950744629f,0.87159508466720581055f,0.49022647738456726074f,
+0.87008696794509887695f,0.49289819598197937012f,0.86857068538665771484f,
+0.49556526541709899902f,0.86704623699188232422f,0.49822765588760375977f,
+0.86551362276077270508f,0.50088536739349365234f,0.86397284269332885742f,
+0.50353837013244628906f,0.86242395639419555664f,0.50618666410446166992f,
+0.86086696386337280273f,0.50883013010025024414f,0.85930180549621582031f,
+0.51146882772445678711f,0.85772860050201416016f,0.51410275697708129883f,
+0.85614734888076782227f,0.51673179864883422852f,0.85455799102783203125f,
+0.51935601234436035156f,0.85296058654785156250f,0.52197527885437011719f,
+0.85135519504547119141f,0.52458965778350830078f,0.84974175691604614258f,
+0.52719914913177490234f,0.84812033176422119141f,0.52980363368988037109f,
+0.84649091958999633789f,0.53240311145782470703f,0.84485357999801635742f,
+0.53499764204025268555f,0.84320825338363647461f,0.53758704662322998047f,
+0.84155499935150146484f,0.54017144441604614258f,0.83989381790161132812f,
+0.54275077581405639648f,0.83822470903396606445f,0.54532498121261596680f,
+0.83654773235321044922f,0.54789406061172485352f,0.83486288785934448242f,
+0.55045795440673828125f,0.83317017555236816406f,0.55301672220230102539f,
+0.83146959543228149414f,0.55557024478912353516f,0.82976120710372924805f,
+0.55811852216720581055f,0.82804507017135620117f,0.56066155433654785156f,
+0.82632106542587280273f,0.56319934129714965820f,0.82458931207656860352f,
+0.56573182344436645508f,0.82284981012344360352f,0.56825894117355346680f,
+0.82110249996185302734f,0.57078075408935546875f,0.81934750080108642578f,
+0.57329714298248291016f,0.81758481264114379883f,0.57580816745758056641f,
+0.81581443548202514648f,0.57831376791000366211f,0.81403630971908569336f,
+0.58081394433975219727f,0.81225061416625976562f,0.58330863714218139648f,
+0.81045717000961303711f,0.58579784631729125977f,0.80865615606307983398f,
+0.58828157186508178711f,0.80684757232666015625f,0.59075969457626342773f,
+0.80503135919570922852f,0.59323227405548095703f,0.80320751667022705078f,
+0.59569931030273437500f,0.80137616395950317383f,0.59816068410873413086f,
+0.79953724145889282227f,0.60061645507812500000f,0.79769086837768554688f,
+0.60306662321090698242f,0.79583692550659179688f,0.60551106929779052734f,
+0.79397547245025634766f,0.60794979333877563477f,0.79210656881332397461f,
+0.61038279533386230469f,0.79023021459579467773f,0.61281007528305053711f,
+0.78834640979766845703f,0.61523157358169555664f,0.78645521402359008789f,
+0.61764729022979736328f,0.78455656766891479492f,0.62005722522735595703f,
+0.78265058994293212891f,0.62246125936508178711f,0.78073722124099731445f,
+0.62485951185226440430f,0.77881652116775512695f,0.62725180387496948242f,
+0.77688848972320556641f,0.62963825464248657227f,0.77495312690734863281f,
+0.63201874494552612305f,0.77301043272018432617f,0.63439327478408813477f,
+0.77106052637100219727f,0.63676184415817260742f,0.76910334825515747070f,
+0.63912445306777954102f,0.76713889837265014648f,0.64148104190826416016f,
+0.76516723632812500000f,0.64383155107498168945f,0.76318842172622680664f,
+0.64617604017257690430f,0.76120239496231079102f,0.64851438999176025391f,
+0.75920921564102172852f,0.65084666013717651367f,0.75720882415771484375f,
+0.65317285060882568359f,0.75520139932632446289f,0.65549284219741821289f,
+0.75318682193756103516f,0.65780669450759887695f,0.75116515159606933594f,
+0.66011434793472290039f,0.74913638830184936523f,0.66241580247879028320f,
+0.74710059165954589844f,0.66471099853515625000f,0.74505776166915893555f,
+0.66699993610382080078f,0.74300795793533325195f,0.66928261518478393555f,
+0.74095112085342407227f,0.67155897617340087891f,0.73888731002807617188f,
+0.67382901906967163086f,0.73681658506393432617f,0.67609268426895141602f,
+0.73473888635635375977f,0.67835003137588500977f,0.73265427350997924805f,
+0.68060100078582763672f,0.73056274652481079102f,0.68284553289413452148f,
+0.72846436500549316406f,0.68508368730545043945f,0.72635912895202636719f,
+0.68731534481048583984f,0.72424709796905517578f,0.68954056501388549805f,
+0.72212821245193481445f,0.69175922870635986328f,0.72000253200531005859f,
+0.69397145509719848633f,0.71787005662918090820f,0.69617712497711181641f,
+0.71573084592819213867f,0.69837623834609985352f,0.71358484029769897461f,
+0.70056879520416259766f,0.71143221855163574219f,0.70275473594665527344f,
+0.70927280187606811523f,0.70493406057357788086f,0.70710676908493041992f,
+0.70710676908493041992f,0.70493406057357788086f,0.70927280187606811523f,
+0.70275473594665527344f,0.71143221855163574219f,0.70056879520416259766f,
+0.71358484029769897461f,0.69837623834609985352f,0.71573084592819213867f,
+0.69617712497711181641f,0.71787005662918090820f,0.69397145509719848633f,
+0.72000253200531005859f,0.69175922870635986328f,0.72212821245193481445f,
+0.68954056501388549805f,0.72424709796905517578f,0.68731534481048583984f,
+0.72635912895202636719f,0.68508368730545043945f,0.72846436500549316406f,
+0.68284553289413452148f,0.73056274652481079102f,0.68060100078582763672f,
+0.73265427350997924805f,0.67835003137588500977f,0.73473888635635375977f,
+0.67609268426895141602f,0.73681658506393432617f,0.67382901906967163086f,
+0.73888731002807617188f,0.67155897617340087891f,0.74095112085342407227f,
+0.66928261518478393555f,0.74300795793533325195f,0.66699993610382080078f,
+0.74505776166915893555f,0.66471099853515625000f,0.74710059165954589844f,
+0.66241580247879028320f,0.74913638830184936523f,0.66011434793472290039f,
+0.75116515159606933594f,0.65780669450759887695f,0.75318682193756103516f,
+0.65549284219741821289f,0.75520139932632446289f,0.65317285060882568359f,
+0.75720882415771484375f,0.65084666013717651367f,0.75920921564102172852f,
+0.64851438999176025391f,0.76120239496231079102f,0.64617604017257690430f,
+0.76318842172622680664f,0.64383155107498168945f,0.76516723632812500000f,
+0.64148104190826416016f,0.76713889837265014648f,0.63912445306777954102f,
+0.76910334825515747070f,0.63676184415817260742f,0.77106052637100219727f,
+0.63439327478408813477f,0.77301043272018432617f,0.63201874494552612305f,
+0.77495312690734863281f,0.62963825464248657227f,0.77688848972320556641f,
+0.62725180387496948242f,0.77881652116775512695f,0.62485951185226440430f,
+0.78073722124099731445f,0.62246125936508178711f,0.78265058994293212891f,
+0.62005722522735595703f,0.78455656766891479492f,0.61764729022979736328f,
+0.78645521402359008789f,0.61523157358169555664f,0.78834640979766845703f,
+0.61281007528305053711f,0.79023021459579467773f,0.61038279533386230469f,
+0.79210656881332397461f,0.60794979333877563477f,0.79397547245025634766f,
+0.60551106929779052734f,0.79583692550659179688f,0.60306662321090698242f,
+0.79769086837768554688f,0.60061645507812500000f,0.79953724145889282227f,
+0.59816068410873413086f,0.80137616395950317383f,0.59569931030273437500f,
+0.80320751667022705078f,0.59323227405548095703f,0.80503135919570922852f,
+0.59075969457626342773f,0.80684757232666015625f,0.58828157186508178711f,
+0.80865615606307983398f,0.58579784631729125977f,0.81045717000961303711f,
+0.58330863714218139648f,0.81225061416625976562f,0.58081394433975219727f,
+0.81403630971908569336f,0.57831376791000366211f,0.81581443548202514648f,
+0.57580816745758056641f,0.81758481264114379883f,0.57329714298248291016f,
+0.81934750080108642578f,0.57078075408935546875f,0.82110249996185302734f,
+0.56825894117355346680f,0.82284981012344360352f,0.56573182344436645508f,
+0.82458931207656860352f,0.56319934129714965820f,0.82632106542587280273f,
+0.56066155433654785156f,0.82804507017135620117f,0.55811852216720581055f,
+0.82976120710372924805f,0.55557024478912353516f,0.83146959543228149414f,
+0.55301672220230102539f,0.83317017555236816406f,0.55045795440673828125f,
+0.83486288785934448242f,0.54789406061172485352f,0.83654773235321044922f,
+0.54532498121261596680f,0.83822470903396606445f,0.54275077581405639648f,
+0.83989381790161132812f,0.54017144441604614258f,0.84155499935150146484f,
+0.53758704662322998047f,0.84320825338363647461f,0.53499764204025268555f,
+0.84485357999801635742f,0.53240311145782470703f,0.84649091958999633789f,
+0.52980363368988037109f,0.84812033176422119141f,0.52719914913177490234f,
+0.84974175691604614258f,0.52458965778350830078f,0.85135519504547119141f,
+0.52197527885437011719f,0.85296058654785156250f,0.51935601234436035156f,
+0.85455799102783203125f,0.51673179864883422852f,0.85614734888076782227f,
+0.51410275697708129883f,0.85772860050201416016f,0.51146882772445678711f,
+0.85930180549621582031f,0.50883013010025024414f,0.86086696386337280273f,
+0.50618666410446166992f,0.86242395639419555664f,0.50353837013244628906f,
+0.86397284269332885742f,0.50088536739349365234f,0.86551362276077270508f,
+0.49822765588760375977f,0.86704623699188232422f,0.49556526541709899902f,
+0.86857068538665771484f,0.49289819598197937012f,0.87008696794509887695f,
+0.49022647738456726074f,0.87159508466720581055f,0.48755016922950744629f,
+0.87309497594833374023f,0.48486924171447753906f,0.87458664178848266602f,
+0.48218378424644470215f,0.87607008218765258789f,0.47949376702308654785f,
+0.87754529714584350586f,0.47679921984672546387f,0.87901222705841064453f,
+0.47410020232200622559f,0.88047087192535400391f,0.47139674425125122070f,
+0.88192129135131835938f,0.46868881583213806152f,0.88336336612701416016f,
+0.46597650647163391113f,0.88479709625244140625f,0.46325978636741638184f,
+0.88622254133224487305f,0.46053871512413024902f,0.88763964176177978516f,
+0.45781329274177551270f,0.88904833793640136719f,0.45508357882499694824f,
+0.89044874906539916992f,0.45234957337379455566f,0.89184069633483886719f,
+0.44961133599281311035f,0.89322429895401000977f,0.44686883687973022461f,
+0.89459949731826782227f,0.44412213563919067383f,0.89596623182296752930f,
+0.44137126207351684570f,0.89732456207275390625f,0.43861624598503112793f,
+0.89867448806762695312f,0.43585708737373352051f,0.90001589059829711914f,
+0.43309381604194641113f,0.90134882926940917969f,0.43032649159431457520f,
+0.90267330408096313477f,0.42755508422851562500f,0.90398931503295898438f,
+0.42477968335151672363f,0.90529674291610717773f,0.42200025916099548340f,
+0.90659570693969726562f,0.41921690106391906738f,0.90788608789443969727f,
+0.41642954945564270020f,0.90916800498962402344f,0.41363832354545593262f,
+0.91044127941131591797f,0.41084316372871398926f,0.91170603036880493164f,
+0.40804415941238403320f,0.91296219825744628906f,0.40524131059646606445f,
+0.91420978307723999023f,0.40243464708328247070f,0.91544872522354125977f,
+0.39962419867515563965f,0.91667908430099487305f,0.39680999517440795898f,
+0.91790080070495605469f,0.39399203658103942871f,0.91911387443542480469f,
+0.39117038249969482422f,0.92031830549240112305f,0.38834503293037414551f,
+0.92151403427124023438f,0.38551604747772216797f,0.92270112037658691406f,
+0.38268342614173889160f,0.92387950420379638672f,0.37984719872474670410f,
+0.92504924535751342773f,0.37700742483139038086f,0.92621022462844848633f,
+0.37416407465934753418f,0.92736250162124633789f,0.37131720781326293945f,
+0.92850607633590698242f,0.36846682429313659668f,0.92964088916778564453f,
+0.36561298370361328125f,0.93076694011688232422f,0.36275571584701538086f,
+0.93188428878784179688f,0.35989505052566528320f,0.93299281597137451172f,
+0.35703095793724060059f,0.93409252166748046875f,0.35416352748870849609f,
+0.93518352508544921875f,0.35129275918006896973f,0.93626564741134643555f,
+0.34841868281364440918f,0.93733900785446166992f,0.34554132819175720215f,
+0.93840354681015014648f,0.34266072511672973633f,0.93945920467376708984f,
+0.33977687358856201172f,0.94050604104995727539f,0.33688986301422119141f,
+0.94154405593872070312f,0.33399966359138488770f,0.94257318973541259766f,
+0.33110630512237548828f,0.94359344244003295898f,0.32820984721183776855f,
+0.94460481405258178711f,0.32531028985977172852f,0.94560730457305908203f,
+0.32240769267082214355f,0.94660091400146484375f,0.31950202584266662598f,
+0.94758558273315429688f,0.31659337878227233887f,0.94856137037277221680f,
+0.31368175148963928223f,0.94952815771102905273f,0.31076714396476745605f,
+0.95048606395721435547f,0.30784964561462402344f,0.95143502950668334961f,
+0.30492922663688659668f,0.95237499475479125977f,0.30200594663619995117f,
+0.95330601930618286133f,0.29907983541488647461f,0.95422810316085815430f,
+0.29615089297294616699f,0.95514118671417236328f,0.29321914911270141602f,
+0.95604526996612548828f,0.29028466343879699707f,0.95694035291671752930f,
+0.28734746575355529785f,0.95782643556594848633f,0.28440752625465393066f,
+0.95870345830917358398f,0.28146493434906005859f,0.95957154035568237305f,
+0.27851969003677368164f,0.96043050289154052734f,0.27557182312011718750f,
+0.96128046512603759766f,0.27262136340141296387f,0.96212142705917358398f,
+0.26966831088066101074f,0.96295326948165893555f,0.26671275496482849121f,
+0.96377605199813842773f,0.26375466585159301758f,0.96458977460861206055f,
+0.26079410314559936523f,0.96539443731307983398f,0.25783109664916992188f,
+0.96618998050689697266f,0.25486564636230468750f,0.96697646379470825195f,
+0.25189781188964843750f,0.96775382757186889648f,0.24892760813236236572f,
+0.96852207183837890625f,0.24595504999160766602f,0.96928125619888305664f,
+0.24298018217086791992f,0.97003126144409179688f,0.24000301957130432129f,
+0.97077214717864990234f,0.23702360689640045166f,0.97150391340255737305f,
+0.23404195904731750488f,0.97222650051116943359f,0.23105810582637786865f,
+0.97293996810913085938f,0.22807207703590393066f,0.97364425659179687500f,
+0.22508391737937927246f,0.97433936595916748047f,0.22209362685680389404f,
+0.97502535581588745117f,0.21910123527050018311f,0.97570210695266723633f,
+0.21610680222511291504f,0.97636973857879638672f,0.21311031281948089600f,
+0.97702813148498535156f,0.21011184155941009521f,0.97767734527587890625f,
+0.20711137354373931885f,0.97831737995147705078f,0.20410896837711334229f,
+0.97894817590713500977f,0.20110464096069335938f,0.97956979274749755859f,
+0.19809840619564056396f,0.98018211126327514648f,0.19509032368659973145f,
+0.98078525066375732422f,0.19208039343357086182f,0.98137921094894409180f,
+0.18906866014003753662f,0.98196387290954589844f,0.18605515360832214355f,
+0.98253929615020751953f,0.18303988873958587646f,0.98310548067092895508f,
+0.18002289533615112305f,0.98366242647171020508f,0.17700421810150146484f,
+0.98421007394790649414f,0.17398387193679809570f,0.98474848270416259766f,
+0.17096188664436340332f,0.98527765274047851562f,0.16793829202651977539f,
+0.98579752445220947266f,0.16491311788558959961f,0.98630809783935546875f,
+0.16188639402389526367f,0.98680937290191650391f,0.15885815024375915527f,
+0.98730140924453735352f,0.15582840144634246826f,0.98778414726257324219f,
+0.15279719233512878418f,0.98825758695602416992f,0.14976453781127929688f,
+0.98872166872024536133f,0.14673046767711639404f,0.98917651176452636719f,
+0.14369502663612365723f,0.98962199687957763672f,0.14065824449062347412f,
+0.99005818367004394531f,0.13762012124061584473f,0.99048507213592529297f,
+0.13458070158958435059f,0.99090266227722167969f,0.13154003024101257324f,
+0.99131083488464355469f,0.12849810719490051270f,0.99170976877212524414f,
+0.12545497715473175049f,0.99209928512573242188f,0.12241067737340927124f,
+0.99247956275939941406f,0.11936521530151367188f,0.99285042285919189453f,
+0.11631862819194793701f,0.99321192502975463867f,0.11327095329761505127f,
+0.99356412887573242188f,0.11022220551967620850f,0.99390697479248046875f,
+0.10717242211103439331f,0.99424046277999877930f,0.10412163287401199341f,
+0.99456459283828735352f,0.10106986016035079956f,0.99487930536270141602f,
+0.09801714122295379639f,0.99518471956253051758f,0.09496349841356277466f,
+0.99548077583312988281f,0.09190895408391952515f,0.99576741456985473633f,
+0.08885355293750762939f,0.99604469537734985352f,0.08579730987548828125f,
+0.99631261825561523438f,0.08274026215076446533f,0.99657112360000610352f,
+0.07968243956565856934f,0.99682027101516723633f,0.07662386447191238403f,
+0.99706006050109863281f,0.07356456667184829712f,0.99729043245315551758f,
+0.07050457596778869629f,0.99751144647598266602f,0.06744392216205596924f,
+0.99772304296493530273f,0.06438262760639190674f,0.99792528152465820312f,
+0.06132073700428009033f,0.99811810255050659180f,0.05825826525688171387f,
+0.99830156564712524414f,0.05519524589180946350f,0.99847555160522460938f,
+0.05213170498609542847f,0.99864023923873901367f,0.04906767606735229492f,
+0.99879544973373413086f,0.04600318148732185364f,0.99894130229949951172f,
+0.04293825849890708923f,0.99907773733139038086f,0.03987292572855949402f,
+0.99920475482940673828f,0.03680722415447235107f,0.99932235479354858398f,
+0.03374117240309715271f,0.99943059682846069336f,0.03067480400204658508f,
+0.99952942132949829102f,0.02760814502835273743f,0.99961882829666137695f,
+0.02454122900962829590f,0.99969881772994995117f,0.02147408016026020050f,
+0.99976938962936401367f,0.01840673014521598816f,0.99983060359954833984f,
+0.01533920597285032272f,0.99988234043121337891f,0.01227153837680816650f,
+0.99992471933364868164f,0.00920375436544418335f,0.99995762109756469727f,
+0.00613588467240333557f,0.99998116493225097656f,0.00306795677170157433f,
+0.99999529123306274414f,0.00000000000000006123f,1.00000000000000000000f,
+-0.00306795677170157433f,0.99999529123306274414f,-0.00613588467240333557f,
+0.99998116493225097656f,-0.00920375436544418335f,0.99995762109756469727f,
+-0.01227153837680816650f,0.99992471933364868164f,-0.01533920597285032272f,
+0.99988234043121337891f,-0.01840673014521598816f,0.99983060359954833984f,
+-0.02147408016026020050f,0.99976938962936401367f,-0.02454122900962829590f,
+0.99969881772994995117f,-0.02760814502835273743f,0.99961882829666137695f,
+-0.03067480400204658508f,0.99952942132949829102f,-0.03374117240309715271f,
+0.99943059682846069336f,-0.03680722415447235107f,0.99932235479354858398f,
+-0.03987292572855949402f,0.99920475482940673828f,-0.04293825849890708923f,
+0.99907773733139038086f,-0.04600318148732185364f,0.99894130229949951172f,
+-0.04906767606735229492f,0.99879544973373413086f,-0.05213170498609542847f,
+0.99864023923873901367f,-0.05519524589180946350f,0.99847555160522460938f,
+-0.05825826525688171387f,0.99830156564712524414f,-0.06132073700428009033f,
+0.99811810255050659180f,-0.06438262760639190674f,0.99792528152465820312f,
+-0.06744392216205596924f,0.99772304296493530273f,-0.07050457596778869629f,
+0.99751144647598266602f,-0.07356456667184829712f,0.99729043245315551758f,
+-0.07662386447191238403f,0.99706006050109863281f,-0.07968243956565856934f,
+0.99682027101516723633f,-0.08274026215076446533f,0.99657112360000610352f,
+-0.08579730987548828125f,0.99631261825561523438f,-0.08885355293750762939f,
+0.99604469537734985352f,-0.09190895408391952515f,0.99576741456985473633f,
+-0.09496349841356277466f,0.99548077583312988281f,-0.09801714122295379639f,
+0.99518471956253051758f,-0.10106986016035079956f,0.99487930536270141602f,
+-0.10412163287401199341f,0.99456459283828735352f,-0.10717242211103439331f,
+0.99424046277999877930f,-0.11022220551967620850f,0.99390697479248046875f,
+-0.11327095329761505127f,0.99356412887573242188f,-0.11631862819194793701f,
+0.99321192502975463867f,-0.11936521530151367188f,0.99285042285919189453f,
+-0.12241067737340927124f,0.99247956275939941406f,-0.12545497715473175049f,
+0.99209928512573242188f,-0.12849810719490051270f,0.99170976877212524414f,
+-0.13154003024101257324f,0.99131083488464355469f,-0.13458070158958435059f,
+0.99090266227722167969f,-0.13762012124061584473f,0.99048507213592529297f,
+-0.14065824449062347412f,0.99005818367004394531f,-0.14369502663612365723f,
+0.98962199687957763672f,-0.14673046767711639404f,0.98917651176452636719f,
+-0.14976453781127929688f,0.98872166872024536133f,-0.15279719233512878418f,
+0.98825758695602416992f,-0.15582840144634246826f,0.98778414726257324219f,
+-0.15885815024375915527f,0.98730140924453735352f,-0.16188639402389526367f,
+0.98680937290191650391f,-0.16491311788558959961f,0.98630809783935546875f,
+-0.16793829202651977539f,0.98579752445220947266f,-0.17096188664436340332f,
+0.98527765274047851562f,-0.17398387193679809570f,0.98474848270416259766f,
+-0.17700421810150146484f,0.98421007394790649414f,-0.18002289533615112305f,
+0.98366242647171020508f,-0.18303988873958587646f,0.98310548067092895508f,
+-0.18605515360832214355f,0.98253929615020751953f,-0.18906866014003753662f,
+0.98196387290954589844f,-0.19208039343357086182f,0.98137921094894409180f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.19809840619564056396f,
+0.98018211126327514648f,-0.20110464096069335938f,0.97956979274749755859f,
+-0.20410896837711334229f,0.97894817590713500977f,-0.20711137354373931885f,
+0.97831737995147705078f,-0.21011184155941009521f,0.97767734527587890625f,
+-0.21311031281948089600f,0.97702813148498535156f,-0.21610680222511291504f,
+0.97636973857879638672f,-0.21910123527050018311f,0.97570210695266723633f,
+-0.22209362685680389404f,0.97502535581588745117f,-0.22508391737937927246f,
+0.97433936595916748047f,-0.22807207703590393066f,0.97364425659179687500f,
+-0.23105810582637786865f,0.97293996810913085938f,-0.23404195904731750488f,
+0.97222650051116943359f,-0.23702360689640045166f,0.97150391340255737305f,
+-0.24000301957130432129f,0.97077214717864990234f,-0.24298018217086791992f,
+0.97003126144409179688f,-0.24595504999160766602f,0.96928125619888305664f,
+-0.24892760813236236572f,0.96852207183837890625f,-0.25189781188964843750f,
+0.96775382757186889648f,-0.25486564636230468750f,0.96697646379470825195f,
+-0.25783109664916992188f,0.96618998050689697266f,-0.26079410314559936523f,
+0.96539443731307983398f,-0.26375466585159301758f,0.96458977460861206055f,
+-0.26671275496482849121f,0.96377605199813842773f,-0.26966831088066101074f,
+0.96295326948165893555f,-0.27262136340141296387f,0.96212142705917358398f,
+-0.27557182312011718750f,0.96128046512603759766f,-0.27851969003677368164f,
+0.96043050289154052734f,-0.28146493434906005859f,0.95957154035568237305f,
+-0.28440752625465393066f,0.95870345830917358398f,-0.28734746575355529785f,
+0.95782643556594848633f,-0.29028466343879699707f,0.95694035291671752930f,
+-0.29321914911270141602f,0.95604526996612548828f,-0.29615089297294616699f,
+0.95514118671417236328f,-0.29907983541488647461f,0.95422810316085815430f,
+-0.30200594663619995117f,0.95330601930618286133f,-0.30492922663688659668f,
+0.95237499475479125977f,-0.30784964561462402344f,0.95143502950668334961f,
+-0.31076714396476745605f,0.95048606395721435547f,-0.31368175148963928223f,
+0.94952815771102905273f,-0.31659337878227233887f,0.94856137037277221680f,
+-0.31950202584266662598f,0.94758558273315429688f,-0.32240769267082214355f,
+0.94660091400146484375f,-0.32531028985977172852f,0.94560730457305908203f,
+-0.32820984721183776855f,0.94460481405258178711f,-0.33110630512237548828f,
+0.94359344244003295898f,-0.33399966359138488770f,0.94257318973541259766f,
+-0.33688986301422119141f,0.94154405593872070312f,-0.33977687358856201172f,
+0.94050604104995727539f,-0.34266072511672973633f,0.93945920467376708984f,
+-0.34554132819175720215f,0.93840354681015014648f,-0.34841868281364440918f,
+0.93733900785446166992f,-0.35129275918006896973f,0.93626564741134643555f,
+-0.35416352748870849609f,0.93518352508544921875f,-0.35703095793724060059f,
+0.93409252166748046875f,-0.35989505052566528320f,0.93299281597137451172f,
+-0.36275571584701538086f,0.93188428878784179688f,-0.36561298370361328125f,
+0.93076694011688232422f,-0.36846682429313659668f,0.92964088916778564453f,
+-0.37131720781326293945f,0.92850607633590698242f,-0.37416407465934753418f,
+0.92736250162124633789f,-0.37700742483139038086f,0.92621022462844848633f,
+-0.37984719872474670410f,0.92504924535751342773f,-0.38268342614173889160f,
+0.92387950420379638672f,-0.38551604747772216797f,0.92270112037658691406f,
+-0.38834503293037414551f,0.92151403427124023438f,-0.39117038249969482422f,
+0.92031830549240112305f,-0.39399203658103942871f,0.91911387443542480469f,
+-0.39680999517440795898f,0.91790080070495605469f,-0.39962419867515563965f,
+0.91667908430099487305f,-0.40243464708328247070f,0.91544872522354125977f,
+-0.40524131059646606445f,0.91420978307723999023f,-0.40804415941238403320f,
+0.91296219825744628906f,-0.41084316372871398926f,0.91170603036880493164f,
+-0.41363832354545593262f,0.91044127941131591797f,-0.41642954945564270020f,
+0.90916800498962402344f,-0.41921690106391906738f,0.90788608789443969727f,
+-0.42200025916099548340f,0.90659570693969726562f,-0.42477968335151672363f,
+0.90529674291610717773f,-0.42755508422851562500f,0.90398931503295898438f,
+-0.43032649159431457520f,0.90267330408096313477f,-0.43309381604194641113f,
+0.90134882926940917969f,-0.43585708737373352051f,0.90001589059829711914f,
+-0.43861624598503112793f,0.89867448806762695312f,-0.44137126207351684570f,
+0.89732456207275390625f,-0.44412213563919067383f,0.89596623182296752930f,
+-0.44686883687973022461f,0.89459949731826782227f,-0.44961133599281311035f,
+0.89322429895401000977f,-0.45234957337379455566f,0.89184069633483886719f,
+-0.45508357882499694824f,0.89044874906539916992f,-0.45781329274177551270f,
+0.88904833793640136719f,-0.46053871512413024902f,0.88763964176177978516f,
+-0.46325978636741638184f,0.88622254133224487305f,-0.46597650647163391113f,
+0.88479709625244140625f,-0.46868881583213806152f,0.88336336612701416016f,
+-0.47139674425125122070f,0.88192129135131835938f,-0.47410020232200622559f,
+0.88047087192535400391f,-0.47679921984672546387f,0.87901222705841064453f,
+-0.47949376702308654785f,0.87754529714584350586f,-0.48218378424644470215f,
+0.87607008218765258789f,-0.48486924171447753906f,0.87458664178848266602f,
+-0.48755016922950744629f,0.87309497594833374023f,-0.49022647738456726074f,
+0.87159508466720581055f,-0.49289819598197937012f,0.87008696794509887695f,
+-0.49556526541709899902f,0.86857068538665771484f,-0.49822765588760375977f,
+0.86704623699188232422f,-0.50088536739349365234f,0.86551362276077270508f,
+-0.50353837013244628906f,0.86397284269332885742f,-0.50618666410446166992f,
+0.86242395639419555664f,-0.50883013010025024414f,0.86086696386337280273f,
+-0.51146882772445678711f,0.85930180549621582031f,-0.51410275697708129883f,
+0.85772860050201416016f,-0.51673179864883422852f,0.85614734888076782227f,
+-0.51935601234436035156f,0.85455799102783203125f,-0.52197527885437011719f,
+0.85296058654785156250f,-0.52458965778350830078f,0.85135519504547119141f,
+-0.52719914913177490234f,0.84974175691604614258f,-0.52980363368988037109f,
+0.84812033176422119141f,-0.53240311145782470703f,0.84649091958999633789f,
+-0.53499764204025268555f,0.84485357999801635742f,-0.53758704662322998047f,
+0.84320825338363647461f,-0.54017144441604614258f,0.84155499935150146484f,
+-0.54275077581405639648f,0.83989381790161132812f,-0.54532498121261596680f,
+0.83822470903396606445f,-0.54789406061172485352f,0.83654773235321044922f,
+-0.55045795440673828125f,0.83486288785934448242f,-0.55301672220230102539f,
+0.83317017555236816406f,-0.55557024478912353516f,0.83146959543228149414f,
+-0.55811852216720581055f,0.82976120710372924805f,-0.56066155433654785156f,
+0.82804507017135620117f,-0.56319934129714965820f,0.82632106542587280273f,
+-0.56573182344436645508f,0.82458931207656860352f,-0.56825894117355346680f,
+0.82284981012344360352f,-0.57078075408935546875f,0.82110249996185302734f,
+-0.57329714298248291016f,0.81934750080108642578f,-0.57580816745758056641f,
+0.81758481264114379883f,-0.57831376791000366211f,0.81581443548202514648f,
+-0.58081394433975219727f,0.81403630971908569336f,-0.58330863714218139648f,
+0.81225061416625976562f,-0.58579784631729125977f,0.81045717000961303711f,
+-0.58828157186508178711f,0.80865615606307983398f,-0.59075969457626342773f,
+0.80684757232666015625f,-0.59323227405548095703f,0.80503135919570922852f,
+-0.59569931030273437500f,0.80320751667022705078f,-0.59816068410873413086f,
+0.80137616395950317383f,-0.60061645507812500000f,0.79953724145889282227f,
+-0.60306662321090698242f,0.79769086837768554688f,-0.60551106929779052734f,
+0.79583692550659179688f,-0.60794979333877563477f,0.79397547245025634766f,
+-0.61038279533386230469f,0.79210656881332397461f,-0.61281007528305053711f,
+0.79023021459579467773f,-0.61523157358169555664f,0.78834640979766845703f,
+-0.61764729022979736328f,0.78645521402359008789f,-0.62005722522735595703f,
+0.78455656766891479492f,-0.62246125936508178711f,0.78265058994293212891f,
+-0.62485951185226440430f,0.78073722124099731445f,-0.62725180387496948242f,
+0.77881652116775512695f,-0.62963825464248657227f,0.77688848972320556641f,
+-0.63201874494552612305f,0.77495312690734863281f,-0.63439327478408813477f,
+0.77301043272018432617f,-0.63676184415817260742f,0.77106052637100219727f,
+-0.63912445306777954102f,0.76910334825515747070f,-0.64148104190826416016f,
+0.76713889837265014648f,-0.64383155107498168945f,0.76516723632812500000f,
+-0.64617604017257690430f,0.76318842172622680664f,-0.64851438999176025391f,
+0.76120239496231079102f,-0.65084666013717651367f,0.75920921564102172852f,
+-0.65317285060882568359f,0.75720882415771484375f,-0.65549284219741821289f,
+0.75520139932632446289f,-0.65780669450759887695f,0.75318682193756103516f,
+-0.66011434793472290039f,0.75116515159606933594f,-0.66241580247879028320f,
+0.74913638830184936523f,-0.66471099853515625000f,0.74710059165954589844f,
+-0.66699993610382080078f,0.74505776166915893555f,-0.66928261518478393555f,
+0.74300795793533325195f,-0.67155897617340087891f,0.74095112085342407227f,
+-0.67382901906967163086f,0.73888731002807617188f,-0.67609268426895141602f,
+0.73681658506393432617f,-0.67835003137588500977f,0.73473888635635375977f,
+-0.68060100078582763672f,0.73265427350997924805f,-0.68284553289413452148f,
+0.73056274652481079102f,-0.68508368730545043945f,0.72846436500549316406f,
+-0.68731534481048583984f,0.72635912895202636719f,-0.68954056501388549805f,
+0.72424709796905517578f,-0.69175922870635986328f,0.72212821245193481445f,
+-0.69397145509719848633f,0.72000253200531005859f,-0.69617712497711181641f,
+0.71787005662918090820f,-0.69837623834609985352f,0.71573084592819213867f,
+-0.70056879520416259766f,0.71358484029769897461f,-0.70275473594665527344f,
+0.71143221855163574219f,-0.70493406057357788086f,0.70927280187606811523f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.70927280187606811523f,
+0.70493406057357788086f,-0.71143221855163574219f,0.70275473594665527344f,
+-0.71358484029769897461f,0.70056879520416259766f,-0.71573084592819213867f,
+0.69837623834609985352f,-0.71787005662918090820f,0.69617712497711181641f,
+-0.72000253200531005859f,0.69397145509719848633f,-0.72212821245193481445f,
+0.69175922870635986328f,-0.72424709796905517578f,0.68954056501388549805f,
+-0.72635912895202636719f,0.68731534481048583984f,-0.72846436500549316406f,
+0.68508368730545043945f,-0.73056274652481079102f,0.68284553289413452148f,
+-0.73265427350997924805f,0.68060100078582763672f,-0.73473888635635375977f,
+0.67835003137588500977f,-0.73681658506393432617f,0.67609268426895141602f,
+-0.73888731002807617188f,0.67382901906967163086f,-0.74095112085342407227f,
+0.67155897617340087891f,-0.74300795793533325195f,0.66928261518478393555f,
+-0.74505776166915893555f,0.66699993610382080078f,-0.74710059165954589844f,
+0.66471099853515625000f,-0.74913638830184936523f,0.66241580247879028320f,
+-0.75116515159606933594f,0.66011434793472290039f,-0.75318682193756103516f,
+0.65780669450759887695f,-0.75520139932632446289f,0.65549284219741821289f,
+-0.75720882415771484375f,0.65317285060882568359f,-0.75920921564102172852f,
+0.65084666013717651367f,-0.76120239496231079102f,0.64851438999176025391f,
+-0.76318842172622680664f,0.64617604017257690430f,-0.76516723632812500000f,
+0.64383155107498168945f,-0.76713889837265014648f,0.64148104190826416016f,
+-0.76910334825515747070f,0.63912445306777954102f,-0.77106052637100219727f,
+0.63676184415817260742f,-0.77301043272018432617f,0.63439327478408813477f,
+-0.77495312690734863281f,0.63201874494552612305f,-0.77688848972320556641f,
+0.62963825464248657227f,-0.77881652116775512695f,0.62725180387496948242f,
+-0.78073722124099731445f,0.62485951185226440430f,-0.78265058994293212891f,
+0.62246125936508178711f,-0.78455656766891479492f,0.62005722522735595703f,
+-0.78645521402359008789f,0.61764729022979736328f,-0.78834640979766845703f,
+0.61523157358169555664f,-0.79023021459579467773f,0.61281007528305053711f,
+-0.79210656881332397461f,0.61038279533386230469f,-0.79397547245025634766f,
+0.60794979333877563477f,-0.79583692550659179688f,0.60551106929779052734f,
+-0.79769086837768554688f,0.60306662321090698242f,-0.79953724145889282227f,
+0.60061645507812500000f,-0.80137616395950317383f,0.59816068410873413086f,
+-0.80320751667022705078f,0.59569931030273437500f,-0.80503135919570922852f,
+0.59323227405548095703f,-0.80684757232666015625f,0.59075969457626342773f,
+-0.80865615606307983398f,0.58828157186508178711f,-0.81045717000961303711f,
+0.58579784631729125977f,-0.81225061416625976562f,0.58330863714218139648f,
+-0.81403630971908569336f,0.58081394433975219727f,-0.81581443548202514648f,
+0.57831376791000366211f,-0.81758481264114379883f,0.57580816745758056641f,
+-0.81934750080108642578f,0.57329714298248291016f,-0.82110249996185302734f,
+0.57078075408935546875f,-0.82284981012344360352f,0.56825894117355346680f,
+-0.82458931207656860352f,0.56573182344436645508f,-0.82632106542587280273f,
+0.56319934129714965820f,-0.82804507017135620117f,0.56066155433654785156f,
+-0.82976120710372924805f,0.55811852216720581055f,-0.83146959543228149414f,
+0.55557024478912353516f,-0.83317017555236816406f,0.55301672220230102539f,
+-0.83486288785934448242f,0.55045795440673828125f,-0.83654773235321044922f,
+0.54789406061172485352f,-0.83822470903396606445f,0.54532498121261596680f,
+-0.83989381790161132812f,0.54275077581405639648f,-0.84155499935150146484f,
+0.54017144441604614258f,-0.84320825338363647461f,0.53758704662322998047f,
+-0.84485357999801635742f,0.53499764204025268555f,-0.84649091958999633789f,
+0.53240311145782470703f,-0.84812033176422119141f,0.52980363368988037109f,
+-0.84974175691604614258f,0.52719914913177490234f,-0.85135519504547119141f,
+0.52458965778350830078f,-0.85296058654785156250f,0.52197527885437011719f,
+-0.85455799102783203125f,0.51935601234436035156f,-0.85614734888076782227f,
+0.51673179864883422852f,-0.85772860050201416016f,0.51410275697708129883f,
+-0.85930180549621582031f,0.51146882772445678711f,-0.86086696386337280273f,
+0.50883013010025024414f,-0.86242395639419555664f,0.50618666410446166992f,
+-0.86397284269332885742f,0.50353837013244628906f,-0.86551362276077270508f,
+0.50088536739349365234f,-0.86704623699188232422f,0.49822765588760375977f,
+-0.86857068538665771484f,0.49556526541709899902f,-0.87008696794509887695f,
+0.49289819598197937012f,-0.87159508466720581055f,0.49022647738456726074f,
+-0.87309497594833374023f,0.48755016922950744629f,-0.87458664178848266602f,
+0.48486924171447753906f,-0.87607008218765258789f,0.48218378424644470215f,
+-0.87754529714584350586f,0.47949376702308654785f,-0.87901222705841064453f,
+0.47679921984672546387f,-0.88047087192535400391f,0.47410020232200622559f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.88336336612701416016f,
+0.46868881583213806152f,-0.88479709625244140625f,0.46597650647163391113f,
+-0.88622254133224487305f,0.46325978636741638184f,-0.88763964176177978516f,
+0.46053871512413024902f,-0.88904833793640136719f,0.45781329274177551270f,
+-0.89044874906539916992f,0.45508357882499694824f,-0.89184069633483886719f,
+0.45234957337379455566f,-0.89322429895401000977f,0.44961133599281311035f,
+-0.89459949731826782227f,0.44686883687973022461f,-0.89596623182296752930f,
+0.44412213563919067383f,-0.89732456207275390625f,0.44137126207351684570f,
+-0.89867448806762695312f,0.43861624598503112793f,-0.90001589059829711914f,
+0.43585708737373352051f,-0.90134882926940917969f,0.43309381604194641113f,
+-0.90267330408096313477f,0.43032649159431457520f,-0.90398931503295898438f,
+0.42755508422851562500f,-0.90529674291610717773f,0.42477968335151672363f,
+-0.90659570693969726562f,0.42200025916099548340f,-0.90788608789443969727f,
+0.41921690106391906738f,-0.90916800498962402344f,0.41642954945564270020f,
+-0.91044127941131591797f,0.41363832354545593262f,-0.91170603036880493164f,
+0.41084316372871398926f,-0.91296219825744628906f,0.40804415941238403320f,
+-0.91420978307723999023f,0.40524131059646606445f,-0.91544872522354125977f,
+0.40243464708328247070f,-0.91667908430099487305f,0.39962419867515563965f,
+-0.91790080070495605469f,0.39680999517440795898f,-0.91911387443542480469f,
+0.39399203658103942871f,-0.92031830549240112305f,0.39117038249969482422f,
+-0.92151403427124023438f,0.38834503293037414551f,-0.92270112037658691406f,
+0.38551604747772216797f,-0.92387950420379638672f,0.38268342614173889160f,
+-0.92504924535751342773f,0.37984719872474670410f,-0.92621022462844848633f,
+0.37700742483139038086f,-0.92736250162124633789f,0.37416407465934753418f,
+-0.92850607633590698242f,0.37131720781326293945f,-0.92964088916778564453f,
+0.36846682429313659668f,-0.93076694011688232422f,0.36561298370361328125f,
+-0.93188428878784179688f,0.36275571584701538086f,-0.93299281597137451172f,
+0.35989505052566528320f,-0.93409252166748046875f,0.35703095793724060059f,
+-0.93518352508544921875f,0.35416352748870849609f,-0.93626564741134643555f,
+0.35129275918006896973f,-0.93733900785446166992f,0.34841868281364440918f,
+-0.93840354681015014648f,0.34554132819175720215f,-0.93945920467376708984f,
+0.34266072511672973633f,-0.94050604104995727539f,0.33977687358856201172f,
+-0.94154405593872070312f,0.33688986301422119141f,-0.94257318973541259766f,
+0.33399966359138488770f,-0.94359344244003295898f,0.33110630512237548828f,
+-0.94460481405258178711f,0.32820984721183776855f,-0.94560730457305908203f,
+0.32531028985977172852f,-0.94660091400146484375f,0.32240769267082214355f,
+-0.94758558273315429688f,0.31950202584266662598f,-0.94856137037277221680f,
+0.31659337878227233887f,-0.94952815771102905273f,0.31368175148963928223f,
+-0.95048606395721435547f,0.31076714396476745605f,-0.95143502950668334961f,
+0.30784964561462402344f,-0.95237499475479125977f,0.30492922663688659668f,
+-0.95330601930618286133f,0.30200594663619995117f,-0.95422810316085815430f,
+0.29907983541488647461f,-0.95514118671417236328f,0.29615089297294616699f,
+-0.95604526996612548828f,0.29321914911270141602f,-0.95694035291671752930f,
+0.29028466343879699707f,-0.95782643556594848633f,0.28734746575355529785f,
+-0.95870345830917358398f,0.28440752625465393066f,-0.95957154035568237305f,
+0.28146493434906005859f,-0.96043050289154052734f,0.27851969003677368164f,
+-0.96128046512603759766f,0.27557182312011718750f,-0.96212142705917358398f,
+0.27262136340141296387f,-0.96295326948165893555f,0.26966831088066101074f,
+-0.96377605199813842773f,0.26671275496482849121f,-0.96458977460861206055f,
+0.26375466585159301758f,-0.96539443731307983398f,0.26079410314559936523f,
+-0.96618998050689697266f,0.25783109664916992188f,-0.96697646379470825195f,
+0.25486564636230468750f,-0.96775382757186889648f,0.25189781188964843750f,
+-0.96852207183837890625f,0.24892760813236236572f,-0.96928125619888305664f,
+0.24595504999160766602f,-0.97003126144409179688f,0.24298018217086791992f,
+-0.97077214717864990234f,0.24000301957130432129f,-0.97150391340255737305f,
+0.23702360689640045166f,-0.97222650051116943359f,0.23404195904731750488f,
+-0.97293996810913085938f,0.23105810582637786865f,-0.97364425659179687500f,
+0.22807207703590393066f,-0.97433936595916748047f,0.22508391737937927246f,
+-0.97502535581588745117f,0.22209362685680389404f,-0.97570210695266723633f,
+0.21910123527050018311f,-0.97636973857879638672f,0.21610680222511291504f,
+-0.97702813148498535156f,0.21311031281948089600f,-0.97767734527587890625f,
+0.21011184155941009521f,-0.97831737995147705078f,0.20711137354373931885f,
+-0.97894817590713500977f,0.20410896837711334229f,-0.97956979274749755859f,
+0.20110464096069335938f,-0.98018211126327514648f,0.19809840619564056396f,
+-0.98078525066375732422f,0.19509032368659973145f,-0.98137921094894409180f,
+0.19208039343357086182f,-0.98196387290954589844f,0.18906866014003753662f,
+-0.98253929615020751953f,0.18605515360832214355f,-0.98310548067092895508f,
+0.18303988873958587646f,-0.98366242647171020508f,0.18002289533615112305f,
+-0.98421007394790649414f,0.17700421810150146484f,-0.98474848270416259766f,
+0.17398387193679809570f,-0.98527765274047851562f,0.17096188664436340332f,
+-0.98579752445220947266f,0.16793829202651977539f,-0.98630809783935546875f,
+0.16491311788558959961f,-0.98680937290191650391f,0.16188639402389526367f,
+-0.98730140924453735352f,0.15885815024375915527f,-0.98778414726257324219f,
+0.15582840144634246826f,-0.98825758695602416992f,0.15279719233512878418f,
+-0.98872166872024536133f,0.14976453781127929688f,-0.98917651176452636719f,
+0.14673046767711639404f,-0.98962199687957763672f,0.14369502663612365723f,
+-0.99005818367004394531f,0.14065824449062347412f,-0.99048507213592529297f,
+0.13762012124061584473f,-0.99090266227722167969f,0.13458070158958435059f,
+-0.99131083488464355469f,0.13154003024101257324f,-0.99170976877212524414f,
+0.12849810719490051270f,-0.99209928512573242188f,0.12545497715473175049f,
+-0.99247956275939941406f,0.12241067737340927124f,-0.99285042285919189453f,
+0.11936521530151367188f,-0.99321192502975463867f,0.11631862819194793701f,
+-0.99356412887573242188f,0.11327095329761505127f,-0.99390697479248046875f,
+0.11022220551967620850f,-0.99424046277999877930f,0.10717242211103439331f,
+-0.99456459283828735352f,0.10412163287401199341f,-0.99487930536270141602f,
+0.10106986016035079956f,-0.99518471956253051758f,0.09801714122295379639f,
+-0.99548077583312988281f,0.09496349841356277466f,-0.99576741456985473633f,
+0.09190895408391952515f,-0.99604469537734985352f,0.08885355293750762939f,
+-0.99631261825561523438f,0.08579730987548828125f,-0.99657112360000610352f,
+0.08274026215076446533f,-0.99682027101516723633f,0.07968243956565856934f,
+-0.99706006050109863281f,0.07662386447191238403f,-0.99729043245315551758f,
+0.07356456667184829712f,-0.99751144647598266602f,0.07050457596778869629f,
+-0.99772304296493530273f,0.06744392216205596924f,-0.99792528152465820312f,
+0.06438262760639190674f,-0.99811810255050659180f,0.06132073700428009033f,
+-0.99830156564712524414f,0.05825826525688171387f,-0.99847555160522460938f,
+0.05519524589180946350f,-0.99864023923873901367f,0.05213170498609542847f,
+-0.99879544973373413086f,0.04906767606735229492f,-0.99894130229949951172f,
+0.04600318148732185364f,-0.99907773733139038086f,0.04293825849890708923f,
+-0.99920475482940673828f,0.03987292572855949402f,-0.99932235479354858398f,
+0.03680722415447235107f,-0.99943059682846069336f,0.03374117240309715271f,
+-0.99952942132949829102f,0.03067480400204658508f,-0.99961882829666137695f,
+0.02760814502835273743f,-0.99969881772994995117f,0.02454122900962829590f,
+-0.99976938962936401367f,0.02147408016026020050f,-0.99983060359954833984f,
+0.01840673014521598816f,-0.99988234043121337891f,0.01533920597285032272f,
+-0.99992471933364868164f,0.01227153837680816650f,-0.99995762109756469727f,
+0.00920375436544418335f,-0.99998116493225097656f,0.00613588467240333557f,
+-0.99999529123306274414f,0.00306795677170157433f,1.00000000000000000000f,
+0.00000000000000000000f,0.99992471933364868164f,0.01227153837680816650f,
+0.99969881772994995117f,0.02454122900962829590f,0.99932235479354858398f,
+0.03680722415447235107f,0.99879544973373413086f,0.04906767606735229492f,
+0.99811810255050659180f,0.06132073700428009033f,0.99729043245315551758f,
+0.07356456667184829712f,0.99631261825561523438f,0.08579730987548828125f,
+0.99518471956253051758f,0.09801714122295379639f,0.99390697479248046875f,
+0.11022220551967620850f,0.99247956275939941406f,0.12241067737340927124f,
+0.99090266227722167969f,0.13458070158958435059f,0.98917651176452636719f,
+0.14673046767711639404f,0.98730140924453735352f,0.15885815024375915527f,
+0.98527765274047851562f,0.17096188664436340332f,0.98310548067092895508f,
+0.18303988873958587646f,0.98078525066375732422f,0.19509032368659973145f,
+0.97831737995147705078f,0.20711137354373931885f,0.97570210695266723633f,
+0.21910123527050018311f,0.97293996810913085938f,0.23105810582637786865f,
+0.97003126144409179688f,0.24298018217086791992f,0.96697646379470825195f,
+0.25486564636230468750f,0.96377605199813842773f,0.26671275496482849121f,
+0.96043050289154052734f,0.27851969003677368164f,0.95694035291671752930f,
+0.29028466343879699707f,0.95330601930618286133f,0.30200594663619995117f,
+0.94952815771102905273f,0.31368175148963928223f,0.94560730457305908203f,
+0.32531028985977172852f,0.94154405593872070312f,0.33688986301422119141f,
+0.93733900785446166992f,0.34841868281364440918f,0.93299281597137451172f,
+0.35989505052566528320f,0.92850607633590698242f,0.37131720781326293945f,
+0.92387950420379638672f,0.38268342614173889160f,0.91911387443542480469f,
+0.39399203658103942871f,0.91420978307723999023f,0.40524131059646606445f,
+0.90916800498962402344f,0.41642954945564270020f,0.90398931503295898438f,
+0.42755508422851562500f,0.89867448806762695312f,0.43861624598503112793f,
+0.89322429895401000977f,0.44961133599281311035f,0.88763964176177978516f,
+0.46053871512413024902f,0.88192129135131835938f,0.47139674425125122070f,
+0.87607008218765258789f,0.48218378424644470215f,0.87008696794509887695f,
+0.49289819598197937012f,0.86397284269332885742f,0.50353837013244628906f,
+0.85772860050201416016f,0.51410275697708129883f,0.85135519504547119141f,
+0.52458965778350830078f,0.84485357999801635742f,0.53499764204025268555f,
+0.83822470903396606445f,0.54532498121261596680f,0.83146959543228149414f,
+0.55557024478912353516f,0.82458931207656860352f,0.56573182344436645508f,
+0.81758481264114379883f,0.57580816745758056641f,0.81045717000961303711f,
+0.58579784631729125977f,0.80320751667022705078f,0.59569931030273437500f,
+0.79583692550659179688f,0.60551106929779052734f,0.78834640979766845703f,
+0.61523157358169555664f,0.78073722124099731445f,0.62485951185226440430f,
+0.77301043272018432617f,0.63439327478408813477f,0.76516723632812500000f,
+0.64383155107498168945f,0.75720882415771484375f,0.65317285060882568359f,
+0.74913638830184936523f,0.66241580247879028320f,0.74095112085342407227f,
+0.67155897617340087891f,0.73265427350997924805f,0.68060100078582763672f,
+0.72424709796905517578f,0.68954056501388549805f,0.71573084592819213867f,
+0.69837623834609985352f,0.70710676908493041992f,0.70710676908493041992f,
+0.69837623834609985352f,0.71573084592819213867f,0.68954056501388549805f,
+0.72424709796905517578f,0.68060100078582763672f,0.73265427350997924805f,
+0.67155897617340087891f,0.74095112085342407227f,0.66241580247879028320f,
+0.74913638830184936523f,0.65317285060882568359f,0.75720882415771484375f,
+0.64383155107498168945f,0.76516723632812500000f,0.63439327478408813477f,
+0.77301043272018432617f,0.62485951185226440430f,0.78073722124099731445f,
+0.61523157358169555664f,0.78834640979766845703f,0.60551106929779052734f,
+0.79583692550659179688f,0.59569931030273437500f,0.80320751667022705078f,
+0.58579784631729125977f,0.81045717000961303711f,0.57580816745758056641f,
+0.81758481264114379883f,0.56573182344436645508f,0.82458931207656860352f,
+0.55557024478912353516f,0.83146959543228149414f,0.54532498121261596680f,
+0.83822470903396606445f,0.53499764204025268555f,0.84485357999801635742f,
+0.52458965778350830078f,0.85135519504547119141f,0.51410275697708129883f,
+0.85772860050201416016f,0.50353837013244628906f,0.86397284269332885742f,
+0.49289819598197937012f,0.87008696794509887695f,0.48218378424644470215f,
+0.87607008218765258789f,0.47139674425125122070f,0.88192129135131835938f,
+0.46053871512413024902f,0.88763964176177978516f,0.44961133599281311035f,
+0.89322429895401000977f,0.43861624598503112793f,0.89867448806762695312f,
+0.42755508422851562500f,0.90398931503295898438f,0.41642954945564270020f,
+0.90916800498962402344f,0.40524131059646606445f,0.91420978307723999023f,
+0.39399203658103942871f,0.91911387443542480469f,0.38268342614173889160f,
+0.92387950420379638672f,0.37131720781326293945f,0.92850607633590698242f,
+0.35989505052566528320f,0.93299281597137451172f,0.34841868281364440918f,
+0.93733900785446166992f,0.33688986301422119141f,0.94154405593872070312f,
+0.32531028985977172852f,0.94560730457305908203f,0.31368175148963928223f,
+0.94952815771102905273f,0.30200594663619995117f,0.95330601930618286133f,
+0.29028466343879699707f,0.95694035291671752930f,0.27851969003677368164f,
+0.96043050289154052734f,0.26671275496482849121f,0.96377605199813842773f,
+0.25486564636230468750f,0.96697646379470825195f,0.24298018217086791992f,
+0.97003126144409179688f,0.23105810582637786865f,0.97293996810913085938f,
+0.21910123527050018311f,0.97570210695266723633f,0.20711137354373931885f,
+0.97831737995147705078f,0.19509032368659973145f,0.98078525066375732422f,
+0.18303988873958587646f,0.98310548067092895508f,0.17096188664436340332f,
+0.98527765274047851562f,0.15885815024375915527f,0.98730140924453735352f,
+0.14673046767711639404f,0.98917651176452636719f,0.13458070158958435059f,
+0.99090266227722167969f,0.12241067737340927124f,0.99247956275939941406f,
+0.11022220551967620850f,0.99390697479248046875f,0.09801714122295379639f,
+0.99518471956253051758f,0.08579730987548828125f,0.99631261825561523438f,
+0.07356456667184829712f,0.99729043245315551758f,0.06132073700428009033f,
+0.99811810255050659180f,0.04906767606735229492f,0.99879544973373413086f,
+0.03680722415447235107f,0.99932235479354858398f,0.02454122900962829590f,
+0.99969881772994995117f,0.01227153837680816650f,0.99992471933364868164f,
+0.00000000000000006123f,1.00000000000000000000f,-0.01227153837680816650f,
+0.99992471933364868164f,-0.02454122900962829590f,0.99969881772994995117f,
+-0.03680722415447235107f,0.99932235479354858398f,-0.04906767606735229492f,
+0.99879544973373413086f,-0.06132073700428009033f,0.99811810255050659180f,
+-0.07356456667184829712f,0.99729043245315551758f,-0.08579730987548828125f,
+0.99631261825561523438f,-0.09801714122295379639f,0.99518471956253051758f,
+-0.11022220551967620850f,0.99390697479248046875f,-0.12241067737340927124f,
+0.99247956275939941406f,-0.13458070158958435059f,0.99090266227722167969f,
+-0.14673046767711639404f,0.98917651176452636719f,-0.15885815024375915527f,
+0.98730140924453735352f,-0.17096188664436340332f,0.98527765274047851562f,
+-0.18303988873958587646f,0.98310548067092895508f,-0.19509032368659973145f,
+0.98078525066375732422f,-0.20711137354373931885f,0.97831737995147705078f,
+-0.21910123527050018311f,0.97570210695266723633f,-0.23105810582637786865f,
+0.97293996810913085938f,-0.24298018217086791992f,0.97003126144409179688f,
+-0.25486564636230468750f,0.96697646379470825195f,-0.26671275496482849121f,
+0.96377605199813842773f,-0.27851969003677368164f,0.96043050289154052734f,
+-0.29028466343879699707f,0.95694035291671752930f,-0.30200594663619995117f,
+0.95330601930618286133f,-0.31368175148963928223f,0.94952815771102905273f,
+-0.32531028985977172852f,0.94560730457305908203f,-0.33688986301422119141f,
+0.94154405593872070312f,-0.34841868281364440918f,0.93733900785446166992f,
+-0.35989505052566528320f,0.93299281597137451172f,-0.37131720781326293945f,
+0.92850607633590698242f,-0.38268342614173889160f,0.92387950420379638672f,
+-0.39399203658103942871f,0.91911387443542480469f,-0.40524131059646606445f,
+0.91420978307723999023f,-0.41642954945564270020f,0.90916800498962402344f,
+-0.42755508422851562500f,0.90398931503295898438f,-0.43861624598503112793f,
+0.89867448806762695312f,-0.44961133599281311035f,0.89322429895401000977f,
+-0.46053871512413024902f,0.88763964176177978516f,-0.47139674425125122070f,
+0.88192129135131835938f,-0.48218378424644470215f,0.87607008218765258789f,
+-0.49289819598197937012f,0.87008696794509887695f,-0.50353837013244628906f,
+0.86397284269332885742f,-0.51410275697708129883f,0.85772860050201416016f,
+-0.52458965778350830078f,0.85135519504547119141f,-0.53499764204025268555f,
+0.84485357999801635742f,-0.54532498121261596680f,0.83822470903396606445f,
+-0.55557024478912353516f,0.83146959543228149414f,-0.56573182344436645508f,
+0.82458931207656860352f,-0.57580816745758056641f,0.81758481264114379883f,
+-0.58579784631729125977f,0.81045717000961303711f,-0.59569931030273437500f,
+0.80320751667022705078f,-0.60551106929779052734f,0.79583692550659179688f,
+-0.61523157358169555664f,0.78834640979766845703f,-0.62485951185226440430f,
+0.78073722124099731445f,-0.63439327478408813477f,0.77301043272018432617f,
+-0.64383155107498168945f,0.76516723632812500000f,-0.65317285060882568359f,
+0.75720882415771484375f,-0.66241580247879028320f,0.74913638830184936523f,
+-0.67155897617340087891f,0.74095112085342407227f,-0.68060100078582763672f,
+0.73265427350997924805f,-0.68954056501388549805f,0.72424709796905517578f,
+-0.69837623834609985352f,0.71573084592819213867f,-0.70710676908493041992f,
+0.70710676908493041992f,-0.71573084592819213867f,0.69837623834609985352f,
+-0.72424709796905517578f,0.68954056501388549805f,-0.73265427350997924805f,
+0.68060100078582763672f,-0.74095112085342407227f,0.67155897617340087891f,
+-0.74913638830184936523f,0.66241580247879028320f,-0.75720882415771484375f,
+0.65317285060882568359f,-0.76516723632812500000f,0.64383155107498168945f,
+-0.77301043272018432617f,0.63439327478408813477f,-0.78073722124099731445f,
+0.62485951185226440430f,-0.78834640979766845703f,0.61523157358169555664f,
+-0.79583692550659179688f,0.60551106929779052734f,-0.80320751667022705078f,
+0.59569931030273437500f,-0.81045717000961303711f,0.58579784631729125977f,
+-0.81758481264114379883f,0.57580816745758056641f,-0.82458931207656860352f,
+0.56573182344436645508f,-0.83146959543228149414f,0.55557024478912353516f,
+-0.83822470903396606445f,0.54532498121261596680f,-0.84485357999801635742f,
+0.53499764204025268555f,-0.85135519504547119141f,0.52458965778350830078f,
+-0.85772860050201416016f,0.51410275697708129883f,-0.86397284269332885742f,
+0.50353837013244628906f,-0.87008696794509887695f,0.49289819598197937012f,
+-0.87607008218765258789f,0.48218378424644470215f,-0.88192129135131835938f,
+0.47139674425125122070f,-0.88763964176177978516f,0.46053871512413024902f,
+-0.89322429895401000977f,0.44961133599281311035f,-0.89867448806762695312f,
+0.43861624598503112793f,-0.90398931503295898438f,0.42755508422851562500f,
+-0.90916800498962402344f,0.41642954945564270020f,-0.91420978307723999023f,
+0.40524131059646606445f,-0.91911387443542480469f,0.39399203658103942871f,
+-0.92387950420379638672f,0.38268342614173889160f,-0.92850607633590698242f,
+0.37131720781326293945f,-0.93299281597137451172f,0.35989505052566528320f,
+-0.93733900785446166992f,0.34841868281364440918f,-0.94154405593872070312f,
+0.33688986301422119141f,-0.94560730457305908203f,0.32531028985977172852f,
+-0.94952815771102905273f,0.31368175148963928223f,-0.95330601930618286133f,
+0.30200594663619995117f,-0.95694035291671752930f,0.29028466343879699707f,
+-0.96043050289154052734f,0.27851969003677368164f,-0.96377605199813842773f,
+0.26671275496482849121f,-0.96697646379470825195f,0.25486564636230468750f,
+-0.97003126144409179688f,0.24298018217086791992f,-0.97293996810913085938f,
+0.23105810582637786865f,-0.97570210695266723633f,0.21910123527050018311f,
+-0.97831737995147705078f,0.20711137354373931885f,-0.98078525066375732422f,
+0.19509032368659973145f,-0.98310548067092895508f,0.18303988873958587646f,
+-0.98527765274047851562f,0.17096188664436340332f,-0.98730140924453735352f,
+0.15885815024375915527f,-0.98917651176452636719f,0.14673046767711639404f,
+-0.99090266227722167969f,0.13458070158958435059f,-0.99247956275939941406f,
+0.12241067737340927124f,-0.99390697479248046875f,0.11022220551967620850f,
+-0.99518471956253051758f,0.09801714122295379639f,-0.99631261825561523438f,
+0.08579730987548828125f,-0.99729043245315551758f,0.07356456667184829712f,
+-0.99811810255050659180f,0.06132073700428009033f,-0.99879544973373413086f,
+0.04906767606735229492f,-0.99932235479354858398f,0.03680722415447235107f,
+-0.99969881772994995117f,0.02454122900962829590f,-0.99992471933364868164f,
+0.01227153837680816650f,1.00000000000000000000f,0.00000000000000000000f,
+0.99879544973373413086f,0.04906767606735229492f,0.99518471956253051758f,
+0.09801714122295379639f,0.98917651176452636719f,0.14673046767711639404f,
+0.98078525066375732422f,0.19509032368659973145f,0.97003126144409179688f,
+0.24298018217086791992f,0.95694035291671752930f,0.29028466343879699707f,
+0.94154405593872070312f,0.33688986301422119141f,0.92387950420379638672f,
+0.38268342614173889160f,0.90398931503295898438f,0.42755508422851562500f,
+0.88192129135131835938f,0.47139674425125122070f,0.85772860050201416016f,
+0.51410275697708129883f,0.83146959543228149414f,0.55557024478912353516f,
+0.80320751667022705078f,0.59569931030273437500f,0.77301043272018432617f,
+0.63439327478408813477f,0.74095112085342407227f,0.67155897617340087891f,
+0.70710676908493041992f,0.70710676908493041992f,0.67155897617340087891f,
+0.74095112085342407227f,0.63439327478408813477f,0.77301043272018432617f,
+0.59569931030273437500f,0.80320751667022705078f,0.55557024478912353516f,
+0.83146959543228149414f,0.51410275697708129883f,0.85772860050201416016f,
+0.47139674425125122070f,0.88192129135131835938f,0.42755508422851562500f,
+0.90398931503295898438f,0.38268342614173889160f,0.92387950420379638672f,
+0.33688986301422119141f,0.94154405593872070312f,0.29028466343879699707f,
+0.95694035291671752930f,0.24298018217086791992f,0.97003126144409179688f,
+0.19509032368659973145f,0.98078525066375732422f,0.14673046767711639404f,
+0.98917651176452636719f,0.09801714122295379639f,0.99518471956253051758f,
+0.04906767606735229492f,0.99879544973373413086f,0.00000000000000006123f,
+1.00000000000000000000f,-0.04906767606735229492f,0.99879544973373413086f,
+-0.09801714122295379639f,0.99518471956253051758f,-0.14673046767711639404f,
+0.98917651176452636719f,-0.19509032368659973145f,0.98078525066375732422f,
+-0.24298018217086791992f,0.97003126144409179688f,-0.29028466343879699707f,
+0.95694035291671752930f,-0.33688986301422119141f,0.94154405593872070312f,
+-0.38268342614173889160f,0.92387950420379638672f,-0.42755508422851562500f,
+0.90398931503295898438f,-0.47139674425125122070f,0.88192129135131835938f,
+-0.51410275697708129883f,0.85772860050201416016f,-0.55557024478912353516f,
+0.83146959543228149414f,-0.59569931030273437500f,0.80320751667022705078f,
+-0.63439327478408813477f,0.77301043272018432617f,-0.67155897617340087891f,
+0.74095112085342407227f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.74095112085342407227f,0.67155897617340087891f,-0.77301043272018432617f,
+0.63439327478408813477f,-0.80320751667022705078f,0.59569931030273437500f,
+-0.83146959543228149414f,0.55557024478912353516f,-0.85772860050201416016f,
+0.51410275697708129883f,-0.88192129135131835938f,0.47139674425125122070f,
+-0.90398931503295898438f,0.42755508422851562500f,-0.92387950420379638672f,
+0.38268342614173889160f,-0.94154405593872070312f,0.33688986301422119141f,
+-0.95694035291671752930f,0.29028466343879699707f,-0.97003126144409179688f,
+0.24298018217086791992f,-0.98078525066375732422f,0.19509032368659973145f,
+-0.98917651176452636719f,0.14673046767711639404f,-0.99518471956253051758f,
+0.09801714122295379639f,-0.99879544973373413086f,0.04906767606735229492f,
+1.00000000000000000000f,0.00000000000000000000f,0.98078525066375732422f,
+0.19509032368659973145f,0.92387950420379638672f,0.38268342614173889160f,
+0.83146959543228149414f,0.55557024478912353516f,0.70710676908493041992f,
+0.70710676908493041992f,0.55557024478912353516f,0.83146959543228149414f,
+0.38268342614173889160f,0.92387950420379638672f,0.19509032368659973145f,
+0.98078525066375732422f,0.00000000000000006123f,1.00000000000000000000f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.38268342614173889160f,
+0.92387950420379638672f,-0.55557024478912353516f,0.83146959543228149414f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.83146959543228149414f,
+0.55557024478912353516f,-0.92387950420379638672f,0.38268342614173889160f,
+-0.98078525066375732422f,0.19509032368659973145f,1.00000000000000000000f,
+0.00000000000000000000f,0.70710676908493041992f,0.70710676908493041992f,
+0.00000000000000006123f,1.00000000000000000000f,-0.70710676908493041992f,
+0.70710676908493041992f,};
+
+float32_t rearranged_twiddle_stride3_4096_f32[2728]={
+1.00000000000000000000f,0.00000000000000000000f,0.99998939037322998047f,
+0.00460192607715725899f,0.99995762109756469727f,0.00920375436544418335f,
+0.99990469217300415039f,0.01380538847297430038f,0.99983060359954833984f,
+0.01840673014521598816f,0.99973529577255249023f,0.02300768159329891205f,
+0.99961882829666137695f,0.02760814502835273743f,0.99948120117187500000f,
+0.03220802545547485352f,0.99932235479354858398f,0.03680722415447235107f,
+0.99914240837097167969f,0.04140564054250717163f,0.99894130229949951172f,
+0.04600318148732185364f,0.99871903657913208008f,0.05059975013136863708f,
+0.99847555160522460938f,0.05519524589180946350f,0.99821102619171142578f,
+0.05978957191109657288f,0.99792528152465820312f,0.06438262760639190674f,
+0.99761843681335449219f,0.06897433102130889893f,0.99729043245315551758f,
+0.07356456667184829712f,0.99694132804870605469f,0.07815324515104293823f,
+0.99657112360000610352f,0.08274026215076446533f,0.99617981910705566406f,
+0.08732553571462631226f,0.99576741456985473633f,0.09190895408391952515f,
+0.99533390998840332031f,0.09649042785167694092f,0.99487930536270141602f,
+0.10106986016035079956f,0.99440366029739379883f,0.10564715415239334106f,
+0.99390697479248046875f,0.11022220551967620850f,0.99338918924331665039f,
+0.11479492485523223877f,0.99285042285919189453f,0.11936521530151367188f,
+0.99229061603546142578f,0.12393297255039215088f,0.99170976877212524414f,
+0.12849810719490051270f,0.99110794067382812500f,0.13306052982807159424f,
+0.99048507213592529297f,0.13762012124061584473f,0.98984128236770629883f,
+0.14217680692672729492f,0.98917651176452636719f,0.14673046767711639404f,
+0.98849081993103027344f,0.15128104388713836670f,0.98778414726257324219f,
+0.15582840144634246826f,0.98705655336380004883f,0.16037245094776153564f,
+0.98630809783935546875f,0.16491311788558959961f,0.98553872108459472656f,
+0.16945029795169830322f,0.98474848270416259766f,0.17398387193679809570f,
+0.98393744230270385742f,0.17851376533508300781f,0.98310548067092895508f,
+0.18303988873958587646f,0.98225271701812744141f,0.18756212294101715088f,
+0.98137921094894409180f,0.19208039343357086182f,0.98048484325408935547f,
+0.19659459590911865234f,0.97956979274749755859f,0.20110464096069335938f,
+0.97863394021987915039f,0.20561040937900543213f,0.97767734527587890625f,
+0.21011184155941009521f,0.97670006752014160156f,0.21460881829261779785f,
+0.97570210695266723633f,0.21910123527050018311f,0.97468352317810058594f,
+0.22358903288841247559f,0.97364425659179687500f,0.22807207703590393066f,
+0.97258436679840087891f,0.23255030810832977295f,0.97150391340255737305f,
+0.23702360689640045166f,0.97040283679962158203f,0.24149188399314880371f,
+0.96928125619888305664f,0.24595504999160766602f,0.96813911199569702148f,
+0.25041300058364868164f,0.96697646379470825195f,0.25486564636230468750f,
+0.96579337120056152344f,0.25931292772293090820f,0.96458977460861206055f,
+0.26375466585159301758f,0.96336579322814941406f,0.26819086074829101562f,
+0.96212142705917358398f,0.27262136340141296387f,0.96085661649703979492f,
+0.27704608440399169922f,0.95957154035568237305f,0.28146493434906005859f,
+0.95826607942581176758f,0.28587782382965087891f,0.95694035291671752930f,
+0.29028466343879699707f,0.95559436082839965820f,0.29468536376953125000f,
+0.95422810316085815430f,0.29907983541488647461f,0.95284163951873779297f,
+0.30346795916557312012f,0.95143502950668334961f,0.30784964561462402344f,
+0.95000827312469482422f,0.31222480535507202148f,0.94856137037277221680f,
+0.31659337878227233887f,0.94709438085556030273f,0.32095524668693542480f,
+0.94560730457305908203f,0.32531028985977172852f,0.94410026073455810547f,
+0.32965844869613647461f,0.94257318973541259766f,0.33399966359138488770f,
+0.94102615118026733398f,0.33833375573158264160f,0.93945920467376708984f,
+0.34266072511672973633f,0.93787235021591186523f,0.34698042273521423340f,
+0.93626564741134643555f,0.35129275918006896973f,0.93463915586471557617f,
+0.35559767484664916992f,0.93299281597137451172f,0.35989505052566528320f,
+0.93132668733596801758f,0.36418479681015014648f,0.92964088916778564453f,
+0.36846682429313659668f,0.92793542146682739258f,0.37274107336997985840f,
+0.92621022462844848633f,0.37700742483139038086f,0.92446547746658325195f,
+0.38126575946807861328f,0.92270112037658691406f,0.38551604747772216797f,
+0.92091721296310424805f,0.38975816965103149414f,0.91911387443542480469f,
+0.39399203658103942871f,0.91729098558425903320f,0.39821755886077880859f,
+0.91544872522354125977f,0.40243464708328247070f,0.91358703374862670898f,
+0.40664321184158325195f,0.91170603036880493164f,0.41084316372871398926f,
+0.90980571508407592773f,0.41503441333770751953f,0.90788608789443969727f,
+0.41921690106391906738f,0.90594726800918579102f,0.42339047789573669434f,
+0.90398931503295898438f,0.42755508422851562500f,0.90201216936111450195f,
+0.43171066045761108398f,0.90001589059829711914f,0.43585708737373352051f,
+0.89800059795379638672f,0.43999427556991577148f,0.89596623182296752930f,
+0.44412213563919067383f,0.89391297101974487305f,0.44824060797691345215f,
+0.89184069633483886719f,0.45234957337379455566f,0.88974958658218383789f,
+0.45644897222518920898f,0.88763964176177978516f,0.46053871512413024902f,
+0.88551086187362670898f,0.46461868286132812500f,0.88336336612701416016f,
+0.46868881583213806152f,0.88119709491729736328f,0.47274902462959289551f,
+0.87901222705841064453f,0.47679921984672546387f,0.87680870294570922852f,
+0.48083934187889099121f,0.87458664178848266602f,0.48486924171447753906f,
+0.87234604358673095703f,0.48888888955116271973f,0.87008696794509887695f,
+0.49289819598197937012f,0.86780947446823120117f,0.49689704179763793945f,
+0.86551362276077270508f,0.50088536739349365234f,0.86319941282272338867f,
+0.50486308336257934570f,0.86086696386337280273f,0.50883013010025024414f,
+0.85851621627807617188f,0.51278638839721679688f,0.85614734888076782227f,
+0.51673179864883422852f,0.85376030206680297852f,0.52066624164581298828f,
+0.85135519504547119141f,0.52458965778350830078f,0.84893202781677246094f,
+0.52850198745727539062f,0.84649091958999633789f,0.53240311145782470703f,
+0.84403187036514282227f,0.53629297018051147461f,0.84155499935150146484f,
+0.54017144441604614258f,0.83906024694442749023f,0.54403853416442871094f,
+0.83654773235321044922f,0.54789406061172485352f,0.83401751518249511719f,
+0.55173796415328979492f,0.83146959543228149414f,0.55557024478912353516f,
+0.82890409231185913086f,0.55939072370529174805f,0.82632106542587280273f,
+0.56319934129714965820f,0.82372051477432250977f,0.56699603796005249023f,
+0.82110249996185302734f,0.57078075408935546875f,0.81846714019775390625f,
+0.57455337047576904297f,0.81581443548202514648f,0.57831376791000366211f,
+0.81314438581466674805f,0.58206200599670410156f,0.81045717000961303711f,
+0.58579784631729125977f,0.80775284767150878906f,0.58952128887176513672f,
+0.80503135919570922852f,0.59323227405548095703f,0.80229282379150390625f,
+0.59693068265914916992f,0.79953724145889282227f,0.60061645507812500000f,
+0.79676479101181030273f,0.60428953170776367188f,0.79397547245025634766f,
+0.60794979333877563477f,0.79116934537887573242f,0.61159718036651611328f,
+0.78834640979766845703f,0.61523157358169555664f,0.78550684452056884766f,
+0.61885297298431396484f,0.78265058994293212891f,0.62246125936508178711f,
+0.77977776527404785156f,0.62605637311935424805f,0.77688848972320556641f,
+0.62963825464248657227f,0.77398270368576049805f,0.63320678472518920898f,
+0.77106052637100219727f,0.63676184415817260742f,0.76812201738357543945f,
+0.64030349254608154297f,0.76516723632812500000f,0.64383155107498168945f,
+0.76219630241394042969f,0.64734596014022827148f,0.75920921564102172852f,
+0.65084666013717651367f,0.75620597600936889648f,0.65433359146118164062f,
+0.75318682193756103516f,0.65780669450759887695f,0.75015163421630859375f,
+0.66126585006713867188f,0.74710059165954589844f,0.66471099853515625000f,
+0.74403375387191772461f,0.66814202070236206055f,0.74095112085342407227f,
+0.67155897617340087891f,0.73785281181335449219f,0.67496162652969360352f,
+0.73473888635635375977f,0.67835003137588500977f,0.73160940408706665039f,
+0.68172407150268554688f,0.72846436500549316406f,0.68508368730545043945f,
+0.72530394792556762695f,0.68842875957489013672f,0.72212821245193481445f,
+0.69175922870635986328f,0.71893709897994995117f,0.69507509469985961914f,
+0.71573084592819213867f,0.69837623834609985352f,0.71250939369201660156f,
+0.70166260004043579102f,0.70927280187606811523f,0.70493406057357788086f,
+0.70602124929428100586f,0.70819061994552612305f,0.70275473594665527344f,
+0.71143221855163574219f,0.69947332143783569336f,0.71465867757797241211f,
+0.69617712497711181641f,0.71787005662918090820f,0.69286614656448364258f,
+0.72106617689132690430f,0.68954056501388549805f,0.72424709796905517578f,
+0.68620032072067260742f,0.72741264104843139648f,0.68284553289413452148f,
+0.73056274652481079102f,0.67947632074356079102f,0.73369741439819335938f,
+0.67609268426895141602f,0.73681658506393432617f,0.67269474267959594727f,
+0.73992007970809936523f,0.66928261518478393555f,0.74300795793533325195f,
+0.66585624217987060547f,0.74608010053634643555f,0.66241580247879028320f,
+0.74913638830184936523f,0.65896129608154296875f,0.75217682123184204102f,
+0.65549284219741821289f,0.75520139932632446289f,0.65201056003570556641f,
+0.75820988416671752930f,0.64851438999176025391f,0.76120239496231079102f,
+0.64500451087951660156f,0.76417875289916992188f,0.64148104190826416016f,
+0.76713889837265014648f,0.63794392347335815430f,0.77008283138275146484f,
+0.63439327478408813477f,0.77301043272018432617f,0.63082921504974365234f,
+0.77592170238494873047f,0.62725180387496948242f,0.77881652116775512695f,
+0.62366110086441040039f,0.78169482946395874023f,0.62005722522735595703f,
+0.78455656766891479492f,0.61644017696380615234f,0.78740173578262329102f,
+0.61281007528305053711f,0.79023021459579467773f,0.60916703939437866211f,
+0.79304194450378417969f,0.60551106929779052734f,0.79583692550659179688f,
+0.60184222459793090820f,0.79861497879028320312f,0.59816068410873413086f,
+0.80137616395950317383f,0.59446650743484497070f,0.80412036180496215820f,
+0.59075969457626342773f,0.80684757232666015625f,0.58704036474227905273f,
+0.80955761671066284180f,0.58330863714218139648f,0.81225061416625976562f,
+0.57956457138061523438f,0.81492632627487182617f,0.57580816745758056641f,
+0.81758481264114379883f,0.57203960418701171875f,0.82022595405578613281f,
+0.56825894117355346680f,0.82284981012344360352f,0.56446623802185058594f,
+0.82545614242553710938f,0.56066155433654785156f,0.82804507017135620117f,
+0.55684500932693481445f,0.83061641454696655273f,0.55301672220230102539f,
+0.83317017555236816406f,0.54917663335800170898f,0.83570629358291625977f,
+0.54532498121261596680f,0.83822470903396606445f,0.54146176576614379883f,
+0.84072536230087280273f,0.53758704662322998047f,0.84320825338363647461f,
+0.53370100259780883789f,0.84567326307296752930f,0.52980363368988037109f,
+0.84812033176422119141f,0.52589499950408935547f,0.85054945945739746094f,
+0.52197527885437011719f,0.85296058654785156250f,0.51804453134536743164f,
+0.85535365343093872070f,0.51410275697708129883f,0.85772860050201416016f,
+0.51015007495880126953f,0.86008536815643310547f,0.50618666410446166992f,
+0.86242395639419555664f,0.50221246480941772461f,0.86474424600601196289f,
+0.49822765588760375977f,0.86704623699188232422f,0.49423229694366455078f,
+0.86932986974716186523f,0.49022647738456726074f,0.87159508466720581055f,
+0.48621028661727905273f,0.87384182214736938477f,0.48218378424644470215f,
+0.87607008218765258789f,0.47814705967903137207f,0.87827980518341064453f,
+0.47410020232200622559f,0.88047087192535400391f,0.47004333138465881348f,
+0.88264334201812744141f,0.46597650647163391113f,0.88479709625244140625f,
+0.46189978718757629395f,0.88693213462829589844f,0.45781329274177551270f,
+0.88904833793640136719f,0.45371711254119873047f,0.89114576578140258789f,
+0.44961133599281311035f,0.89322429895401000977f,0.44549602270126342773f,
+0.89528393745422363281f,0.44137126207351684570f,0.89732456207275390625f,
+0.43723717331886291504f,0.89934623241424560547f,0.43309381604194641113f,
+0.90134882926940917969f,0.42894127964973449707f,0.90333235263824462891f,
+0.42477968335151672363f,0.90529674291610717773f,0.42060908675193786621f,
+0.90724200010299682617f,0.41642954945564270020f,0.90916800498962402344f,
+0.41224122047424316406f,0.91107475757598876953f,0.40804415941238403320f,
+0.91296219825744628906f,0.40383845567703247070f,0.91483032703399658203f,
+0.39962419867515563965f,0.91667908430099487305f,0.39540147781372070312f,
+0.91850841045379638672f,0.39117038249969482422f,0.92031830549240112305f,
+0.38693100214004516602f,0.92210865020751953125f,0.38268342614173889160f,
+0.92387950420379638672f,0.37842774391174316406f,0.92563080787658691406f,
+0.37416407465934753418f,0.92736250162124633789f,0.36989244818687438965f,
+0.92907458543777465820f,0.36561298370361328125f,0.93076694011688232422f,
+0.36132580041885375977f,0.93243962526321411133f,0.35703095793724060059f,
+0.93409252166748046875f,0.35272854566574096680f,0.93572568893432617188f,
+0.34841868281364440918f,0.93733900785446166992f,0.34410142898559570312f,
+0.93893247842788696289f,0.33977687358856201172f,0.94050604104995727539f,
+0.33544513583183288574f,0.94205975532531738281f,0.33110630512237548828f,
+0.94359344244003295898f,0.32676044106483459473f,0.94510722160339355469f,
+0.32240769267082214355f,0.94660091400146484375f,0.31804808974266052246f,
+0.94807457923889160156f,0.31368175148963928223f,0.94952815771102905273f,
+0.30930876731872558594f,0.95096164941787719727f,0.30492922663688659668f,
+0.95237499475479125977f,0.30054324865341186523f,0.95376819372177124023f,
+0.29615089297294616699f,0.95514118671417236328f,0.29175224900245666504f,
+0.95649391412734985352f,0.28734746575355529785f,0.95782643556594848633f,
+0.28293657302856445312f,0.95913863182067871094f,0.27851969003677368164f,
+0.96043050289154052734f,0.27409690618515014648f,0.96170204877853393555f,
+0.26966831088066101074f,0.96295326948165893555f,0.26523402333259582520f,
+0.96418404579162597656f,0.26079410314559936523f,0.96539443731307983398f,
+0.25634866952896118164f,0.96658438444137573242f,0.25189781188964843750f,
+0.96775382757186889648f,0.24744161963462829590f,0.96890282630920410156f,
+0.24298018217086791992f,0.97003126144409179688f,0.23851358890533447266f,
+0.97113913297653198242f,0.23404195904731750488f,0.97222650051116943359f,
+0.22956536710262298584f,0.97329324483871459961f,0.22508391737937927246f,
+0.97433936595916748047f,0.22059768438339233398f,0.97536486387252807617f,
+0.21610680222511291504f,0.97636973857879638672f,0.21161133050918579102f,
+0.97735387086868286133f,0.20711137354373931885f,0.97831737995147705078f,
+0.20260703563690185547f,0.97926014661788940430f,0.19809840619564056396f,
+0.98018211126327514648f,0.19358558952808380127f,0.98108339309692382812f,
+0.18906866014003753662f,0.98196387290954589844f,0.18454773724079132080f,
+0.98282355070114135742f,0.18002289533615112305f,0.98366242647171020508f,
+0.17549425363540649414f,0.98448044061660766602f,0.17096188664436340332f,
+0.98527765274047851562f,0.16642589867115020752f,0.98605394363403320312f,
+0.16188639402389526367f,0.98680937290191650391f,0.15734346210956573486f,
+0.98754394054412841797f,0.15279719233512878418f,0.98825758695602416992f,
+0.14824767410755157471f,0.98895025253295898438f,0.14369502663612365723f,
+0.98962199687957763672f,0.13913933932781219482f,0.99027281999588012695f,
+0.13458070158958435059f,0.99090266227722167969f,0.13001921772956848145f,
+0.99151146411895751953f,0.12545497715473175049f,0.99209928512573242188f,
+0.12088808417320251465f,0.99266612529754638672f,0.11631862819194793701f,
+0.99321192502975463867f,0.11174671351909637451f,0.99373674392700195312f,
+0.10717242211103439331f,0.99424046277999877930f,0.10259586572647094727f,
+0.99472314119338989258f,0.09801714122295379639f,0.99518471956253051758f,
+0.09343633800745010376f,0.99562525749206542969f,0.08885355293750762939f,
+0.99604469537734985352f,0.08426889032125473022f,0.99644303321838378906f,
+0.07968243956565856934f,0.99682027101516723633f,0.07509429752826690674f,
+0.99717640876770019531f,0.07050457596778869629f,0.99751144647598266602f,
+0.06591334939002990723f,0.99782532453536987305f,0.06132073700428009033f,
+0.99811810255050659180f,0.05672682076692581177f,0.99838972091674804688f,
+0.05213170498609542847f,0.99864023923873901367f,0.04753548279404640198f,
+0.99886953830718994141f,0.04293825849890708923f,0.99907773733139038086f,
+0.03834012150764465332f,0.99926477670669555664f,0.03374117240309715271f,
+0.99943059682846069336f,0.02914150804281234741f,0.99957531690597534180f,
+0.02454122900962829590f,0.99969881772994995117f,0.01994042843580245972f,
+0.99980115890502929688f,0.01533920597285032272f,0.99988234043121337891f,
+0.01073765940964221954f,0.99994236230850219727f,0.00613588467240333557f,
+0.99998116493225097656f,0.00153398013208061457f,0.99999880790710449219f,
+-0.00306795677170157433f,0.99999529123306274414f,-0.00766982883214950562f,
+0.99997061491012573242f,-0.01227153837680816650f,0.99992471933364868164f,
+-0.01687298715114593506f,0.99985766410827636719f,-0.02147408016026020050f,
+0.99976938962936401367f,-0.02607471868395805359f,0.99966001510620117188f,
+-0.03067480400204658508f,0.99952942132949829102f,-0.03527423739433288574f,
+0.99937766790390014648f,-0.03987292572855949402f,0.99920475482940673828f,
+-0.04447077214717864990f,0.99901068210601806641f,-0.04906767606735229492f,
+0.99879544973373413086f,-0.05366353690624237061f,0.99855905771255493164f,
+-0.05825826525688171387f,0.99830156564712524414f,-0.06285175681114196777f,
+0.99802285432815551758f,-0.06744392216205596924f,0.99772304296493530273f,
+-0.07203464955091476440f,0.99740213155746459961f,-0.07662386447191238403f,
+0.99706006050109863281f,-0.08121144771575927734f,0.99669688940048217773f,
+-0.08579730987548828125f,0.99631261825561523438f,-0.09038136154413223267f,
+0.99590724706649780273f,-0.09496349841356277466f,0.99548077583312988281f,
+-0.09954361617565155029f,0.99503320455551147461f,-0.10412163287401199341f,
+0.99456459283828735352f,-0.10869744420051574707f,0.99407488107681274414f,
+-0.11327095329761505127f,0.99356412887573242188f,-0.11784206330776214600f,
+0.99303233623504638672f,-0.12241067737340927124f,0.99247956275939941406f,
+-0.12697669863700866699f,0.99190568923950195312f,-0.13154003024101257324f,
+0.99131083488464355469f,-0.13610057532787322998f,0.99069499969482421875f,
+-0.14065824449062347412f,0.99005818367004394531f,-0.14521291851997375488f,
+0.98940044641494750977f,-0.14976453781127929688f,0.98872166872024536133f,
+-0.15431296825408935547f,0.98802202939987182617f,-0.15885815024375915527f,
+0.98730140924453735352f,-0.16339994966983795166f,0.98655992746353149414f,
+-0.16793829202651977539f,0.98579752445220947266f,-0.17247308790683746338f,
+0.98501425981521606445f,-0.17700421810150146484f,0.98421007394790649414f,
+-0.18153160810470581055f,0.98338508605957031250f,-0.18605515360832214355f,
+0.98253929615020751953f,-0.19057475030422210693f,0.98167270421981811523f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.19960175454616546631f,
+0.97987711429595947266f,-0.20410896837711334229f,0.97894817590713500977f,
+-0.20861184597015380859f,0.97799849510192871094f,-0.21311031281948089600f,
+0.97702813148498535156f,-0.21760427951812744141f,0.97603708505630493164f,
+-0.22209362685680389404f,0.97502535581588745117f,-0.22657826542854309082f,
+0.97399294376373291016f,-0.23105810582637786865f,0.97293996810913085938f,
+-0.23553305864334106445f,0.97186630964279174805f,-0.24000301957130432129f,
+0.97077214717864990234f,-0.24446789920330047607f,0.96965736150741577148f,
+-0.24892760813236236572f,0.96852207183837890625f,-0.25338202714920043945f,
+0.96736627817153930664f,-0.25783109664916992188f,0.96618998050689697266f,
+-0.26227471232414245605f,0.96499323844909667969f,-0.26671275496482849121f,
+0.96377605199813842773f,-0.27114516496658325195f,0.96253848075866699219f,
+-0.27557182312011718750f,0.96128046512603759766f,-0.27999264001846313477f,
+0.96000212430953979492f,-0.28440752625465393066f,0.95870345830917358398f,
+-0.28881642222404479980f,0.95738452672958374023f,-0.29321914911270141602f,
+0.95604526996612548828f,-0.29761570692062377930f,0.95468574762344360352f,
+-0.30200594663619995117f,0.95330601930618286133f,-0.30638980865478515625f,
+0.95190614461898803711f,-0.31076714396476745605f,0.95048606395721435547f,
+-0.31513792276382446289f,0.94904589653015136719f,-0.31950202584266662598f,
+0.94758558273315429688f,-0.32385936379432678223f,0.94610524177551269531f,
+-0.32820984721183776855f,0.94460481405258178711f,-0.33255335688591003418f,
+0.94308441877365112305f,-0.33688986301422119141f,0.94154405593872070312f,
+-0.34121921658515930176f,0.93998372554779052734f,-0.34554132819175720215f,
+0.93840354681015014648f,-0.34985613822937011719f,0.93680346012115478516f,
+-0.35416352748870849609f,0.93518352508544921875f,-0.35846340656280517578f,
+0.93354380130767822266f,-0.36275571584701538086f,0.93188428878784179688f,
+-0.36704033613204956055f,0.93020504713058471680f,-0.37131720781326293945f,
+0.92850607633590698242f,-0.37558618187904357910f,0.92678749561309814453f,
+-0.37984719872474670410f,0.92504924535751342773f,-0.38410019874572753906f,
+0.92329144477844238281f,-0.38834503293037414551f,0.92151403427124023438f,
+-0.39258167147636413574f,0.91971713304519653320f,-0.39680999517440795898f,
+0.91790080070495605469f,-0.40102988481521606445f,0.91606497764587402344f,
+-0.40524131059646606445f,0.91420978307723999023f,-0.40944415330886840820f,
+0.91233515739440917969f,-0.41363832354545593262f,0.91044127941131591797f,
+-0.41782370209693908691f,0.90852808952331542969f,-0.42200025916099548340f,
+0.90659570693969726562f,-0.42616787552833557129f,0.90464407205581665039f,
+-0.43032649159431457520f,0.90267330408096313477f,-0.43447595834732055664f,
+0.90068340301513671875f,-0.43861624598503112793f,0.89867448806762695312f,
+-0.44274723529815673828f,0.89664649963378906250f,-0.44686883687973022461f,
+0.89459949731826782227f,-0.45098099112510681152f,0.89253354072570800781f,
+-0.45508357882499694824f,0.89044874906539916992f,-0.45917654037475585938f,
+0.88834506273269653320f,-0.46325978636741638184f,0.88622254133224487305f,
+-0.46733319759368896484f,0.88408124446868896484f,-0.47139674425125122070f,
+0.88192129135131835938f,-0.47545027732849121094f,0.87974262237548828125f,
+-0.47949376702308654785f,0.87754529714584350586f,-0.48352706432342529297f,
+0.87532937526702880859f,-0.48755016922950744629f,0.87309497594833374023f,
+-0.49156290292739868164f,0.87084203958511352539f,-0.49556526541709899902f,
+0.86857068538665771484f,-0.49955710768699645996f,0.86628097295761108398f,
+-0.50353837013244628906f,0.86397284269332885742f,-0.50750899314880371094f,
+0.86164647340774536133f,-0.51146882772445678711f,0.85930180549621582031f,
+-0.51541787385940551758f,0.85693895816802978516f,-0.51935601234436035156f,
+0.85455799102783203125f,-0.52328312397003173828f,0.85215890407562255859f,
+-0.52719914913177490234f,0.84974175691604614258f,-0.53110402822494506836f,
+0.84730660915374755859f,-0.53499764204025268555f,0.84485357999801635742f,
+-0.53887993097305297852f,0.84238260984420776367f,-0.54275077581405639648f,
+0.83989381790161132812f,-0.54661017656326293945f,0.83738720417022705078f,
+-0.55045795440673828125f,0.83486288785934448242f,-0.55429410934448242188f,
+0.83232086896896362305f,-0.55811852216720581055f,0.82976120710372924805f,
+-0.56193113327026367188f,0.82718402147293090820f,-0.56573182344436645508f,
+0.82458931207656860352f,-0.56952053308486938477f,0.82197713851928710938f,
+-0.57329714298248291016f,0.81934750080108642578f,-0.57706165313720703125f,
+0.81670057773590087891f,-0.58081394433975219727f,0.81403630971908569336f,
+-0.58455395698547363281f,0.81135487556457519531f,-0.58828157186508178711f,
+0.80865615606307983398f,-0.59199666976928710938f,0.80594038963317871094f,
+-0.59569931030273437500f,0.80320751667022705078f,-0.59938931465148925781f,
+0.80045765638351440430f,-0.60306662321090698242f,0.79769086837768554688f,
+-0.60673111677169799805f,0.79490715265274047852f,-0.61038279533386230469f,
+0.79210656881332397461f,-0.61402153968811035156f,0.78928923606872558594f,
+-0.61764729022979736328f,0.78645521402359008789f,-0.62125998735427856445f,
+0.78360450267791748047f,-0.62485951185226440430f,0.78073722124099731445f,
+-0.62844574451446533203f,0.77785342931747436523f,-0.63201874494552612305f,
+0.77495312690734863281f,-0.63557833433151245117f,0.77203637361526489258f,
+-0.63912445306777954102f,0.76910334825515747070f,-0.64265704154968261719f,
+0.76615399122238159180f,-0.64617604017257690430f,0.76318842172622680664f,
+-0.64968132972717285156f,0.76020669937133789062f,-0.65317285060882568359f,
+0.75720882415771484375f,-0.65665054321289062500f,0.75419497489929199219f,
+-0.66011434793472290039f,0.75116515159606933594f,-0.66356414556503295898f,
+0.74811935424804687500f,-0.66699993610382080078f,0.74505776166915893555f,
+-0.67042154073715209961f,0.74198043346405029297f,-0.67382901906967163086f,
+0.73888731002807617188f,-0.67722219228744506836f,0.73577857017517089844f,
+-0.68060100078582763672f,0.73265427350997924805f,-0.68396538496017456055f,
+0.72951442003250122070f,-0.68731534481048583984f,0.72635912895202636719f,
+-0.69065070152282714844f,0.72318845987319946289f,-0.69397145509719848633f,
+0.72000253200531005859f,-0.69727748632431030273f,0.71680128574371337891f,
+-0.70056879520416259766f,0.71358484029769897461f,-0.70384526252746582031f,
+0.71035337448120117188f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.71035337448120117188f,0.70384526252746582031f,-0.71358484029769897461f,
+0.70056879520416259766f,-0.71680128574371337891f,0.69727748632431030273f,
+-0.72000253200531005859f,0.69397145509719848633f,-0.72318845987319946289f,
+0.69065070152282714844f,-0.72635912895202636719f,0.68731534481048583984f,
+-0.72951442003250122070f,0.68396538496017456055f,-0.73265427350997924805f,
+0.68060100078582763672f,-0.73577857017517089844f,0.67722219228744506836f,
+-0.73888731002807617188f,0.67382901906967163086f,-0.74198043346405029297f,
+0.67042154073715209961f,-0.74505776166915893555f,0.66699993610382080078f,
+-0.74811935424804687500f,0.66356414556503295898f,-0.75116515159606933594f,
+0.66011434793472290039f,-0.75419497489929199219f,0.65665054321289062500f,
+-0.75720882415771484375f,0.65317285060882568359f,-0.76020669937133789062f,
+0.64968132972717285156f,-0.76318842172622680664f,0.64617604017257690430f,
+-0.76615399122238159180f,0.64265704154968261719f,-0.76910334825515747070f,
+0.63912445306777954102f,-0.77203637361526489258f,0.63557833433151245117f,
+-0.77495312690734863281f,0.63201874494552612305f,-0.77785342931747436523f,
+0.62844574451446533203f,-0.78073722124099731445f,0.62485951185226440430f,
+-0.78360450267791748047f,0.62125998735427856445f,-0.78645521402359008789f,
+0.61764729022979736328f,-0.78928923606872558594f,0.61402153968811035156f,
+-0.79210656881332397461f,0.61038279533386230469f,-0.79490715265274047852f,
+0.60673111677169799805f,-0.79769086837768554688f,0.60306662321090698242f,
+-0.80045765638351440430f,0.59938931465148925781f,-0.80320751667022705078f,
+0.59569931030273437500f,-0.80594038963317871094f,0.59199666976928710938f,
+-0.80865615606307983398f,0.58828157186508178711f,-0.81135487556457519531f,
+0.58455395698547363281f,-0.81403630971908569336f,0.58081394433975219727f,
+-0.81670057773590087891f,0.57706165313720703125f,-0.81934750080108642578f,
+0.57329714298248291016f,-0.82197713851928710938f,0.56952053308486938477f,
+-0.82458931207656860352f,0.56573182344436645508f,-0.82718402147293090820f,
+0.56193113327026367188f,-0.82976120710372924805f,0.55811852216720581055f,
+-0.83232086896896362305f,0.55429410934448242188f,-0.83486288785934448242f,
+0.55045795440673828125f,-0.83738720417022705078f,0.54661017656326293945f,
+-0.83989381790161132812f,0.54275077581405639648f,-0.84238260984420776367f,
+0.53887993097305297852f,-0.84485357999801635742f,0.53499764204025268555f,
+-0.84730660915374755859f,0.53110402822494506836f,-0.84974175691604614258f,
+0.52719914913177490234f,-0.85215890407562255859f,0.52328312397003173828f,
+-0.85455799102783203125f,0.51935601234436035156f,-0.85693895816802978516f,
+0.51541787385940551758f,-0.85930180549621582031f,0.51146882772445678711f,
+-0.86164647340774536133f,0.50750899314880371094f,-0.86397284269332885742f,
+0.50353837013244628906f,-0.86628097295761108398f,0.49955710768699645996f,
+-0.86857068538665771484f,0.49556526541709899902f,-0.87084203958511352539f,
+0.49156290292739868164f,-0.87309497594833374023f,0.48755016922950744629f,
+-0.87532937526702880859f,0.48352706432342529297f,-0.87754529714584350586f,
+0.47949376702308654785f,-0.87974262237548828125f,0.47545027732849121094f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.88408124446868896484f,
+0.46733319759368896484f,-0.88622254133224487305f,0.46325978636741638184f,
+-0.88834506273269653320f,0.45917654037475585938f,-0.89044874906539916992f,
+0.45508357882499694824f,-0.89253354072570800781f,0.45098099112510681152f,
+-0.89459949731826782227f,0.44686883687973022461f,-0.89664649963378906250f,
+0.44274723529815673828f,-0.89867448806762695312f,0.43861624598503112793f,
+-0.90068340301513671875f,0.43447595834732055664f,-0.90267330408096313477f,
+0.43032649159431457520f,-0.90464407205581665039f,0.42616787552833557129f,
+-0.90659570693969726562f,0.42200025916099548340f,-0.90852808952331542969f,
+0.41782370209693908691f,-0.91044127941131591797f,0.41363832354545593262f,
+-0.91233515739440917969f,0.40944415330886840820f,-0.91420978307723999023f,
+0.40524131059646606445f,-0.91606497764587402344f,0.40102988481521606445f,
+-0.91790080070495605469f,0.39680999517440795898f,-0.91971713304519653320f,
+0.39258167147636413574f,-0.92151403427124023438f,0.38834503293037414551f,
+-0.92329144477844238281f,0.38410019874572753906f,-0.92504924535751342773f,
+0.37984719872474670410f,-0.92678749561309814453f,0.37558618187904357910f,
+-0.92850607633590698242f,0.37131720781326293945f,-0.93020504713058471680f,
+0.36704033613204956055f,-0.93188428878784179688f,0.36275571584701538086f,
+-0.93354380130767822266f,0.35846340656280517578f,-0.93518352508544921875f,
+0.35416352748870849609f,-0.93680346012115478516f,0.34985613822937011719f,
+-0.93840354681015014648f,0.34554132819175720215f,-0.93998372554779052734f,
+0.34121921658515930176f,-0.94154405593872070312f,0.33688986301422119141f,
+-0.94308441877365112305f,0.33255335688591003418f,-0.94460481405258178711f,
+0.32820984721183776855f,-0.94610524177551269531f,0.32385936379432678223f,
+-0.94758558273315429688f,0.31950202584266662598f,-0.94904589653015136719f,
+0.31513792276382446289f,-0.95048606395721435547f,0.31076714396476745605f,
+-0.95190614461898803711f,0.30638980865478515625f,-0.95330601930618286133f,
+0.30200594663619995117f,-0.95468574762344360352f,0.29761570692062377930f,
+-0.95604526996612548828f,0.29321914911270141602f,-0.95738452672958374023f,
+0.28881642222404479980f,-0.95870345830917358398f,0.28440752625465393066f,
+-0.96000212430953979492f,0.27999264001846313477f,-0.96128046512603759766f,
+0.27557182312011718750f,-0.96253848075866699219f,0.27114516496658325195f,
+-0.96377605199813842773f,0.26671275496482849121f,-0.96499323844909667969f,
+0.26227471232414245605f,-0.96618998050689697266f,0.25783109664916992188f,
+-0.96736627817153930664f,0.25338202714920043945f,-0.96852207183837890625f,
+0.24892760813236236572f,-0.96965736150741577148f,0.24446789920330047607f,
+-0.97077214717864990234f,0.24000301957130432129f,-0.97186630964279174805f,
+0.23553305864334106445f,-0.97293996810913085938f,0.23105810582637786865f,
+-0.97399294376373291016f,0.22657826542854309082f,-0.97502535581588745117f,
+0.22209362685680389404f,-0.97603708505630493164f,0.21760427951812744141f,
+-0.97702813148498535156f,0.21311031281948089600f,-0.97799849510192871094f,
+0.20861184597015380859f,-0.97894817590713500977f,0.20410896837711334229f,
+-0.97987711429595947266f,0.19960175454616546631f,-0.98078525066375732422f,
+0.19509032368659973145f,-0.98167270421981811523f,0.19057475030422210693f,
+-0.98253929615020751953f,0.18605515360832214355f,-0.98338508605957031250f,
+0.18153160810470581055f,-0.98421007394790649414f,0.17700421810150146484f,
+-0.98501425981521606445f,0.17247308790683746338f,-0.98579752445220947266f,
+0.16793829202651977539f,-0.98655992746353149414f,0.16339994966983795166f,
+-0.98730140924453735352f,0.15885815024375915527f,-0.98802202939987182617f,
+0.15431296825408935547f,-0.98872166872024536133f,0.14976453781127929688f,
+-0.98940044641494750977f,0.14521291851997375488f,-0.99005818367004394531f,
+0.14065824449062347412f,-0.99069499969482421875f,0.13610057532787322998f,
+-0.99131083488464355469f,0.13154003024101257324f,-0.99190568923950195312f,
+0.12697669863700866699f,-0.99247956275939941406f,0.12241067737340927124f,
+-0.99303233623504638672f,0.11784206330776214600f,-0.99356412887573242188f,
+0.11327095329761505127f,-0.99407488107681274414f,0.10869744420051574707f,
+-0.99456459283828735352f,0.10412163287401199341f,-0.99503320455551147461f,
+0.09954361617565155029f,-0.99548077583312988281f,0.09496349841356277466f,
+-0.99590724706649780273f,0.09038136154413223267f,-0.99631261825561523438f,
+0.08579730987548828125f,-0.99669688940048217773f,0.08121144771575927734f,
+-0.99706006050109863281f,0.07662386447191238403f,-0.99740213155746459961f,
+0.07203464955091476440f,-0.99772304296493530273f,0.06744392216205596924f,
+-0.99802285432815551758f,0.06285175681114196777f,-0.99830156564712524414f,
+0.05825826525688171387f,-0.99855905771255493164f,0.05366353690624237061f,
+-0.99879544973373413086f,0.04906767606735229492f,-0.99901068210601806641f,
+0.04447077214717864990f,-0.99920475482940673828f,0.03987292572855949402f,
+-0.99937766790390014648f,0.03527423739433288574f,-0.99952942132949829102f,
+0.03067480400204658508f,-0.99966001510620117188f,0.02607471868395805359f,
+-0.99976938962936401367f,0.02147408016026020050f,-0.99985766410827636719f,
+0.01687298715114593506f,-0.99992471933364868164f,0.01227153837680816650f,
+-0.99997061491012573242f,0.00766982883214950562f,-0.99999529123306274414f,
+0.00306795677170157433f,-0.99999880790710449219f,-0.00153398013208061457f,
+-0.99998116493225097656f,-0.00613588467240333557f,-0.99994236230850219727f,
+-0.01073765940964221954f,-0.99988234043121337891f,-0.01533920597285032272f,
+-0.99980115890502929688f,-0.01994042843580245972f,-0.99969881772994995117f,
+-0.02454122900962829590f,-0.99957531690597534180f,-0.02914150804281234741f,
+-0.99943059682846069336f,-0.03374117240309715271f,-0.99926477670669555664f,
+-0.03834012150764465332f,-0.99907773733139038086f,-0.04293825849890708923f,
+-0.99886953830718994141f,-0.04753548279404640198f,-0.99864023923873901367f,
+-0.05213170498609542847f,-0.99838972091674804688f,-0.05672682076692581177f,
+-0.99811810255050659180f,-0.06132073700428009033f,-0.99782532453536987305f,
+-0.06591334939002990723f,-0.99751144647598266602f,-0.07050457596778869629f,
+-0.99717640876770019531f,-0.07509429752826690674f,-0.99682027101516723633f,
+-0.07968243956565856934f,-0.99644303321838378906f,-0.08426889032125473022f,
+-0.99604469537734985352f,-0.08885355293750762939f,-0.99562525749206542969f,
+-0.09343633800745010376f,-0.99518471956253051758f,-0.09801714122295379639f,
+-0.99472314119338989258f,-0.10259586572647094727f,-0.99424046277999877930f,
+-0.10717242211103439331f,-0.99373674392700195312f,-0.11174671351909637451f,
+-0.99321192502975463867f,-0.11631862819194793701f,-0.99266612529754638672f,
+-0.12088808417320251465f,-0.99209928512573242188f,-0.12545497715473175049f,
+-0.99151146411895751953f,-0.13001921772956848145f,-0.99090266227722167969f,
+-0.13458070158958435059f,-0.99027281999588012695f,-0.13913933932781219482f,
+-0.98962199687957763672f,-0.14369502663612365723f,-0.98895025253295898438f,
+-0.14824767410755157471f,-0.98825758695602416992f,-0.15279719233512878418f,
+-0.98754394054412841797f,-0.15734346210956573486f,-0.98680937290191650391f,
+-0.16188639402389526367f,-0.98605394363403320312f,-0.16642589867115020752f,
+-0.98527765274047851562f,-0.17096188664436340332f,-0.98448044061660766602f,
+-0.17549425363540649414f,-0.98366242647171020508f,-0.18002289533615112305f,
+-0.98282355070114135742f,-0.18454773724079132080f,-0.98196387290954589844f,
+-0.18906866014003753662f,-0.98108339309692382812f,-0.19358558952808380127f,
+-0.98018211126327514648f,-0.19809840619564056396f,-0.97926014661788940430f,
+-0.20260703563690185547f,-0.97831737995147705078f,-0.20711137354373931885f,
+-0.97735387086868286133f,-0.21161133050918579102f,-0.97636973857879638672f,
+-0.21610680222511291504f,-0.97536486387252807617f,-0.22059768438339233398f,
+-0.97433936595916748047f,-0.22508391737937927246f,-0.97329324483871459961f,
+-0.22956536710262298584f,-0.97222650051116943359f,-0.23404195904731750488f,
+-0.97113913297653198242f,-0.23851358890533447266f,-0.97003126144409179688f,
+-0.24298018217086791992f,-0.96890282630920410156f,-0.24744161963462829590f,
+-0.96775382757186889648f,-0.25189781188964843750f,-0.96658438444137573242f,
+-0.25634866952896118164f,-0.96539443731307983398f,-0.26079410314559936523f,
+-0.96418404579162597656f,-0.26523402333259582520f,-0.96295326948165893555f,
+-0.26966831088066101074f,-0.96170204877853393555f,-0.27409690618515014648f,
+-0.96043050289154052734f,-0.27851969003677368164f,-0.95913863182067871094f,
+-0.28293657302856445312f,-0.95782643556594848633f,-0.28734746575355529785f,
+-0.95649391412734985352f,-0.29175224900245666504f,-0.95514118671417236328f,
+-0.29615089297294616699f,-0.95376819372177124023f,-0.30054324865341186523f,
+-0.95237499475479125977f,-0.30492922663688659668f,-0.95096164941787719727f,
+-0.30930876731872558594f,-0.94952815771102905273f,-0.31368175148963928223f,
+-0.94807457923889160156f,-0.31804808974266052246f,-0.94660091400146484375f,
+-0.32240769267082214355f,-0.94510722160339355469f,-0.32676044106483459473f,
+-0.94359344244003295898f,-0.33110630512237548828f,-0.94205975532531738281f,
+-0.33544513583183288574f,-0.94050604104995727539f,-0.33977687358856201172f,
+-0.93893247842788696289f,-0.34410142898559570312f,-0.93733900785446166992f,
+-0.34841868281364440918f,-0.93572568893432617188f,-0.35272854566574096680f,
+-0.93409252166748046875f,-0.35703095793724060059f,-0.93243962526321411133f,
+-0.36132580041885375977f,-0.93076694011688232422f,-0.36561298370361328125f,
+-0.92907458543777465820f,-0.36989244818687438965f,-0.92736250162124633789f,
+-0.37416407465934753418f,-0.92563080787658691406f,-0.37842774391174316406f,
+-0.92387950420379638672f,-0.38268342614173889160f,-0.92210865020751953125f,
+-0.38693100214004516602f,-0.92031830549240112305f,-0.39117038249969482422f,
+-0.91850841045379638672f,-0.39540147781372070312f,-0.91667908430099487305f,
+-0.39962419867515563965f,-0.91483032703399658203f,-0.40383845567703247070f,
+-0.91296219825744628906f,-0.40804415941238403320f,-0.91107475757598876953f,
+-0.41224122047424316406f,-0.90916800498962402344f,-0.41642954945564270020f,
+-0.90724200010299682617f,-0.42060908675193786621f,-0.90529674291610717773f,
+-0.42477968335151672363f,-0.90333235263824462891f,-0.42894127964973449707f,
+-0.90134882926940917969f,-0.43309381604194641113f,-0.89934623241424560547f,
+-0.43723717331886291504f,-0.89732456207275390625f,-0.44137126207351684570f,
+-0.89528393745422363281f,-0.44549602270126342773f,-0.89322429895401000977f,
+-0.44961133599281311035f,-0.89114576578140258789f,-0.45371711254119873047f,
+-0.88904833793640136719f,-0.45781329274177551270f,-0.88693213462829589844f,
+-0.46189978718757629395f,-0.88479709625244140625f,-0.46597650647163391113f,
+-0.88264334201812744141f,-0.47004333138465881348f,-0.88047087192535400391f,
+-0.47410020232200622559f,-0.87827980518341064453f,-0.47814705967903137207f,
+-0.87607008218765258789f,-0.48218378424644470215f,-0.87384182214736938477f,
+-0.48621028661727905273f,-0.87159508466720581055f,-0.49022647738456726074f,
+-0.86932986974716186523f,-0.49423229694366455078f,-0.86704623699188232422f,
+-0.49822765588760375977f,-0.86474424600601196289f,-0.50221246480941772461f,
+-0.86242395639419555664f,-0.50618666410446166992f,-0.86008536815643310547f,
+-0.51015007495880126953f,-0.85772860050201416016f,-0.51410275697708129883f,
+-0.85535365343093872070f,-0.51804453134536743164f,-0.85296058654785156250f,
+-0.52197527885437011719f,-0.85054945945739746094f,-0.52589499950408935547f,
+-0.84812033176422119141f,-0.52980363368988037109f,-0.84567326307296752930f,
+-0.53370100259780883789f,-0.84320825338363647461f,-0.53758704662322998047f,
+-0.84072536230087280273f,-0.54146176576614379883f,-0.83822470903396606445f,
+-0.54532498121261596680f,-0.83570629358291625977f,-0.54917663335800170898f,
+-0.83317017555236816406f,-0.55301672220230102539f,-0.83061641454696655273f,
+-0.55684500932693481445f,-0.82804507017135620117f,-0.56066155433654785156f,
+-0.82545614242553710938f,-0.56446623802185058594f,-0.82284981012344360352f,
+-0.56825894117355346680f,-0.82022595405578613281f,-0.57203960418701171875f,
+-0.81758481264114379883f,-0.57580816745758056641f,-0.81492632627487182617f,
+-0.57956457138061523438f,-0.81225061416625976562f,-0.58330863714218139648f,
+-0.80955761671066284180f,-0.58704036474227905273f,-0.80684757232666015625f,
+-0.59075969457626342773f,-0.80412036180496215820f,-0.59446650743484497070f,
+-0.80137616395950317383f,-0.59816068410873413086f,-0.79861497879028320312f,
+-0.60184222459793090820f,-0.79583692550659179688f,-0.60551106929779052734f,
+-0.79304194450378417969f,-0.60916703939437866211f,-0.79023021459579467773f,
+-0.61281007528305053711f,-0.78740173578262329102f,-0.61644017696380615234f,
+-0.78455656766891479492f,-0.62005722522735595703f,-0.78169482946395874023f,
+-0.62366110086441040039f,-0.77881652116775512695f,-0.62725180387496948242f,
+-0.77592170238494873047f,-0.63082921504974365234f,-0.77301043272018432617f,
+-0.63439327478408813477f,-0.77008283138275146484f,-0.63794392347335815430f,
+-0.76713889837265014648f,-0.64148104190826416016f,-0.76417875289916992188f,
+-0.64500451087951660156f,-0.76120239496231079102f,-0.64851438999176025391f,
+-0.75820988416671752930f,-0.65201056003570556641f,-0.75520139932632446289f,
+-0.65549284219741821289f,-0.75217682123184204102f,-0.65896129608154296875f,
+-0.74913638830184936523f,-0.66241580247879028320f,-0.74608010053634643555f,
+-0.66585624217987060547f,-0.74300795793533325195f,-0.66928261518478393555f,
+-0.73992007970809936523f,-0.67269474267959594727f,-0.73681658506393432617f,
+-0.67609268426895141602f,-0.73369741439819335938f,-0.67947632074356079102f,
+-0.73056274652481079102f,-0.68284553289413452148f,-0.72741264104843139648f,
+-0.68620032072067260742f,-0.72424709796905517578f,-0.68954056501388549805f,
+-0.72106617689132690430f,-0.69286614656448364258f,-0.71787005662918090820f,
+-0.69617712497711181641f,-0.71465867757797241211f,-0.69947332143783569336f,
+-0.71143221855163574219f,-0.70275473594665527344f,-0.70819061994552612305f,
+-0.70602124929428100586f,-0.70493406057357788086f,-0.70927280187606811523f,
+-0.70166260004043579102f,-0.71250939369201660156f,-0.69837623834609985352f,
+-0.71573084592819213867f,-0.69507509469985961914f,-0.71893709897994995117f,
+-0.69175922870635986328f,-0.72212821245193481445f,-0.68842875957489013672f,
+-0.72530394792556762695f,-0.68508368730545043945f,-0.72846436500549316406f,
+-0.68172407150268554688f,-0.73160940408706665039f,-0.67835003137588500977f,
+-0.73473888635635375977f,-0.67496162652969360352f,-0.73785281181335449219f,
+-0.67155897617340087891f,-0.74095112085342407227f,-0.66814202070236206055f,
+-0.74403375387191772461f,-0.66471099853515625000f,-0.74710059165954589844f,
+-0.66126585006713867188f,-0.75015163421630859375f,-0.65780669450759887695f,
+-0.75318682193756103516f,-0.65433359146118164062f,-0.75620597600936889648f,
+-0.65084666013717651367f,-0.75920921564102172852f,-0.64734596014022827148f,
+-0.76219630241394042969f,-0.64383155107498168945f,-0.76516723632812500000f,
+-0.64030349254608154297f,-0.76812201738357543945f,-0.63676184415817260742f,
+-0.77106052637100219727f,-0.63320678472518920898f,-0.77398270368576049805f,
+-0.62963825464248657227f,-0.77688848972320556641f,-0.62605637311935424805f,
+-0.77977776527404785156f,-0.62246125936508178711f,-0.78265058994293212891f,
+-0.61885297298431396484f,-0.78550684452056884766f,-0.61523157358169555664f,
+-0.78834640979766845703f,-0.61159718036651611328f,-0.79116934537887573242f,
+-0.60794979333877563477f,-0.79397547245025634766f,-0.60428953170776367188f,
+-0.79676479101181030273f,-0.60061645507812500000f,-0.79953724145889282227f,
+-0.59693068265914916992f,-0.80229282379150390625f,-0.59323227405548095703f,
+-0.80503135919570922852f,-0.58952128887176513672f,-0.80775284767150878906f,
+-0.58579784631729125977f,-0.81045717000961303711f,-0.58206200599670410156f,
+-0.81314438581466674805f,-0.57831376791000366211f,-0.81581443548202514648f,
+-0.57455337047576904297f,-0.81846714019775390625f,-0.57078075408935546875f,
+-0.82110249996185302734f,-0.56699603796005249023f,-0.82372051477432250977f,
+-0.56319934129714965820f,-0.82632106542587280273f,-0.55939072370529174805f,
+-0.82890409231185913086f,-0.55557024478912353516f,-0.83146959543228149414f,
+-0.55173796415328979492f,-0.83401751518249511719f,-0.54789406061172485352f,
+-0.83654773235321044922f,-0.54403853416442871094f,-0.83906024694442749023f,
+-0.54017144441604614258f,-0.84155499935150146484f,-0.53629297018051147461f,
+-0.84403187036514282227f,-0.53240311145782470703f,-0.84649091958999633789f,
+-0.52850198745727539062f,-0.84893202781677246094f,-0.52458965778350830078f,
+-0.85135519504547119141f,-0.52066624164581298828f,-0.85376030206680297852f,
+-0.51673179864883422852f,-0.85614734888076782227f,-0.51278638839721679688f,
+-0.85851621627807617188f,-0.50883013010025024414f,-0.86086696386337280273f,
+-0.50486308336257934570f,-0.86319941282272338867f,-0.50088536739349365234f,
+-0.86551362276077270508f,-0.49689704179763793945f,-0.86780947446823120117f,
+-0.49289819598197937012f,-0.87008696794509887695f,-0.48888888955116271973f,
+-0.87234604358673095703f,-0.48486924171447753906f,-0.87458664178848266602f,
+-0.48083934187889099121f,-0.87680870294570922852f,-0.47679921984672546387f,
+-0.87901222705841064453f,-0.47274902462959289551f,-0.88119709491729736328f,
+-0.46868881583213806152f,-0.88336336612701416016f,-0.46461868286132812500f,
+-0.88551086187362670898f,-0.46053871512413024902f,-0.88763964176177978516f,
+-0.45644897222518920898f,-0.88974958658218383789f,-0.45234957337379455566f,
+-0.89184069633483886719f,-0.44824060797691345215f,-0.89391297101974487305f,
+-0.44412213563919067383f,-0.89596623182296752930f,-0.43999427556991577148f,
+-0.89800059795379638672f,-0.43585708737373352051f,-0.90001589059829711914f,
+-0.43171066045761108398f,-0.90201216936111450195f,-0.42755508422851562500f,
+-0.90398931503295898438f,-0.42339047789573669434f,-0.90594726800918579102f,
+-0.41921690106391906738f,-0.90788608789443969727f,-0.41503441333770751953f,
+-0.90980571508407592773f,-0.41084316372871398926f,-0.91170603036880493164f,
+-0.40664321184158325195f,-0.91358703374862670898f,-0.40243464708328247070f,
+-0.91544872522354125977f,-0.39821755886077880859f,-0.91729098558425903320f,
+-0.39399203658103942871f,-0.91911387443542480469f,-0.38975816965103149414f,
+-0.92091721296310424805f,-0.38551604747772216797f,-0.92270112037658691406f,
+-0.38126575946807861328f,-0.92446547746658325195f,-0.37700742483139038086f,
+-0.92621022462844848633f,-0.37274107336997985840f,-0.92793542146682739258f,
+-0.36846682429313659668f,-0.92964088916778564453f,-0.36418479681015014648f,
+-0.93132668733596801758f,-0.35989505052566528320f,-0.93299281597137451172f,
+-0.35559767484664916992f,-0.93463915586471557617f,-0.35129275918006896973f,
+-0.93626564741134643555f,-0.34698042273521423340f,-0.93787235021591186523f,
+-0.34266072511672973633f,-0.93945920467376708984f,-0.33833375573158264160f,
+-0.94102615118026733398f,-0.33399966359138488770f,-0.94257318973541259766f,
+-0.32965844869613647461f,-0.94410026073455810547f,-0.32531028985977172852f,
+-0.94560730457305908203f,-0.32095524668693542480f,-0.94709438085556030273f,
+-0.31659337878227233887f,-0.94856137037277221680f,-0.31222480535507202148f,
+-0.95000827312469482422f,-0.30784964561462402344f,-0.95143502950668334961f,
+-0.30346795916557312012f,-0.95284163951873779297f,-0.29907983541488647461f,
+-0.95422810316085815430f,-0.29468536376953125000f,-0.95559436082839965820f,
+-0.29028466343879699707f,-0.95694035291671752930f,-0.28587782382965087891f,
+-0.95826607942581176758f,-0.28146493434906005859f,-0.95957154035568237305f,
+-0.27704608440399169922f,-0.96085661649703979492f,-0.27262136340141296387f,
+-0.96212142705917358398f,-0.26819086074829101562f,-0.96336579322814941406f,
+-0.26375466585159301758f,-0.96458977460861206055f,-0.25931292772293090820f,
+-0.96579337120056152344f,-0.25486564636230468750f,-0.96697646379470825195f,
+-0.25041300058364868164f,-0.96813911199569702148f,-0.24595504999160766602f,
+-0.96928125619888305664f,-0.24149188399314880371f,-0.97040283679962158203f,
+-0.23702360689640045166f,-0.97150391340255737305f,-0.23255030810832977295f,
+-0.97258436679840087891f,-0.22807207703590393066f,-0.97364425659179687500f,
+-0.22358903288841247559f,-0.97468352317810058594f,-0.21910123527050018311f,
+-0.97570210695266723633f,-0.21460881829261779785f,-0.97670006752014160156f,
+-0.21011184155941009521f,-0.97767734527587890625f,-0.20561040937900543213f,
+-0.97863394021987915039f,-0.20110464096069335938f,-0.97956979274749755859f,
+-0.19659459590911865234f,-0.98048484325408935547f,-0.19208039343357086182f,
+-0.98137921094894409180f,-0.18756212294101715088f,-0.98225271701812744141f,
+-0.18303988873958587646f,-0.98310548067092895508f,-0.17851376533508300781f,
+-0.98393744230270385742f,-0.17398387193679809570f,-0.98474848270416259766f,
+-0.16945029795169830322f,-0.98553872108459472656f,-0.16491311788558959961f,
+-0.98630809783935546875f,-0.16037245094776153564f,-0.98705655336380004883f,
+-0.15582840144634246826f,-0.98778414726257324219f,-0.15128104388713836670f,
+-0.98849081993103027344f,-0.14673046767711639404f,-0.98917651176452636719f,
+-0.14217680692672729492f,-0.98984128236770629883f,-0.13762012124061584473f,
+-0.99048507213592529297f,-0.13306052982807159424f,-0.99110794067382812500f,
+-0.12849810719490051270f,-0.99170976877212524414f,-0.12393297255039215088f,
+-0.99229061603546142578f,-0.11936521530151367188f,-0.99285042285919189453f,
+-0.11479492485523223877f,-0.99338918924331665039f,-0.11022220551967620850f,
+-0.99390697479248046875f,-0.10564715415239334106f,-0.99440366029739379883f,
+-0.10106986016035079956f,-0.99487930536270141602f,-0.09649042785167694092f,
+-0.99533390998840332031f,-0.09190895408391952515f,-0.99576741456985473633f,
+-0.08732553571462631226f,-0.99617981910705566406f,-0.08274026215076446533f,
+-0.99657112360000610352f,-0.07815324515104293823f,-0.99694132804870605469f,
+-0.07356456667184829712f,-0.99729043245315551758f,-0.06897433102130889893f,
+-0.99761843681335449219f,-0.06438262760639190674f,-0.99792528152465820312f,
+-0.05978957191109657288f,-0.99821102619171142578f,-0.05519524589180946350f,
+-0.99847555160522460938f,-0.05059975013136863708f,-0.99871903657913208008f,
+-0.04600318148732185364f,-0.99894130229949951172f,-0.04140564054250717163f,
+-0.99914240837097167969f,-0.03680722415447235107f,-0.99932235479354858398f,
+-0.03220802545547485352f,-0.99948120117187500000f,-0.02760814502835273743f,
+-0.99961882829666137695f,-0.02300768159329891205f,-0.99973529577255249023f,
+-0.01840673014521598816f,-0.99983060359954833984f,-0.01380538847297430038f,
+-0.99990469217300415039f,-0.00920375436544418335f,-0.99995762109756469727f,
+-0.00460192607715725899f,-0.99998939037322998047f,1.00000000000000000000f,
+0.00000000000000000000f,0.99983060359954833984f,0.01840673014521598816f,
+0.99932235479354858398f,0.03680722415447235107f,0.99847555160522460938f,
+0.05519524589180946350f,0.99729043245315551758f,0.07356456667184829712f,
+0.99576741456985473633f,0.09190895408391952515f,0.99390697479248046875f,
+0.11022220551967620850f,0.99170976877212524414f,0.12849810719490051270f,
+0.98917651176452636719f,0.14673046767711639404f,0.98630809783935546875f,
+0.16491311788558959961f,0.98310548067092895508f,0.18303988873958587646f,
+0.97956979274749755859f,0.20110464096069335938f,0.97570210695266723633f,
+0.21910123527050018311f,0.97150391340255737305f,0.23702360689640045166f,
+0.96697646379470825195f,0.25486564636230468750f,0.96212142705917358398f,
+0.27262136340141296387f,0.95694035291671752930f,0.29028466343879699707f,
+0.95143502950668334961f,0.30784964561462402344f,0.94560730457305908203f,
+0.32531028985977172852f,0.93945920467376708984f,0.34266072511672973633f,
+0.93299281597137451172f,0.35989505052566528320f,0.92621022462844848633f,
+0.37700742483139038086f,0.91911387443542480469f,0.39399203658103942871f,
+0.91170603036880493164f,0.41084316372871398926f,0.90398931503295898438f,
+0.42755508422851562500f,0.89596623182296752930f,0.44412213563919067383f,
+0.88763964176177978516f,0.46053871512413024902f,0.87901222705841064453f,
+0.47679921984672546387f,0.87008696794509887695f,0.49289819598197937012f,
+0.86086696386337280273f,0.50883013010025024414f,0.85135519504547119141f,
+0.52458965778350830078f,0.84155499935150146484f,0.54017144441604614258f,
+0.83146959543228149414f,0.55557024478912353516f,0.82110249996185302734f,
+0.57078075408935546875f,0.81045717000961303711f,0.58579784631729125977f,
+0.79953724145889282227f,0.60061645507812500000f,0.78834640979766845703f,
+0.61523157358169555664f,0.77688848972320556641f,0.62963825464248657227f,
+0.76516723632812500000f,0.64383155107498168945f,0.75318682193756103516f,
+0.65780669450759887695f,0.74095112085342407227f,0.67155897617340087891f,
+0.72846436500549316406f,0.68508368730545043945f,0.71573084592819213867f,
+0.69837623834609985352f,0.70275473594665527344f,0.71143221855163574219f,
+0.68954056501388549805f,0.72424709796905517578f,0.67609268426895141602f,
+0.73681658506393432617f,0.66241580247879028320f,0.74913638830184936523f,
+0.64851438999176025391f,0.76120239496231079102f,0.63439327478408813477f,
+0.77301043272018432617f,0.62005722522735595703f,0.78455656766891479492f,
+0.60551106929779052734f,0.79583692550659179688f,0.59075969457626342773f,
+0.80684757232666015625f,0.57580816745758056641f,0.81758481264114379883f,
+0.56066155433654785156f,0.82804507017135620117f,0.54532498121261596680f,
+0.83822470903396606445f,0.52980363368988037109f,0.84812033176422119141f,
+0.51410275697708129883f,0.85772860050201416016f,0.49822765588760375977f,
+0.86704623699188232422f,0.48218378424644470215f,0.87607008218765258789f,
+0.46597650647163391113f,0.88479709625244140625f,0.44961133599281311035f,
+0.89322429895401000977f,0.43309381604194641113f,0.90134882926940917969f,
+0.41642954945564270020f,0.90916800498962402344f,0.39962419867515563965f,
+0.91667908430099487305f,0.38268342614173889160f,0.92387950420379638672f,
+0.36561298370361328125f,0.93076694011688232422f,0.34841868281364440918f,
+0.93733900785446166992f,0.33110630512237548828f,0.94359344244003295898f,
+0.31368175148963928223f,0.94952815771102905273f,0.29615089297294616699f,
+0.95514118671417236328f,0.27851969003677368164f,0.96043050289154052734f,
+0.26079410314559936523f,0.96539443731307983398f,0.24298018217086791992f,
+0.97003126144409179688f,0.22508391737937927246f,0.97433936595916748047f,
+0.20711137354373931885f,0.97831737995147705078f,0.18906866014003753662f,
+0.98196387290954589844f,0.17096188664436340332f,0.98527765274047851562f,
+0.15279719233512878418f,0.98825758695602416992f,0.13458070158958435059f,
+0.99090266227722167969f,0.11631862819194793701f,0.99321192502975463867f,
+0.09801714122295379639f,0.99518471956253051758f,0.07968243956565856934f,
+0.99682027101516723633f,0.06132073700428009033f,0.99811810255050659180f,
+0.04293825849890708923f,0.99907773733139038086f,0.02454122900962829590f,
+0.99969881772994995117f,0.00613588467240333557f,0.99998116493225097656f,
+-0.01227153837680816650f,0.99992471933364868164f,-0.03067480400204658508f,
+0.99952942132949829102f,-0.04906767606735229492f,0.99879544973373413086f,
+-0.06744392216205596924f,0.99772304296493530273f,-0.08579730987548828125f,
+0.99631261825561523438f,-0.10412163287401199341f,0.99456459283828735352f,
+-0.12241067737340927124f,0.99247956275939941406f,-0.14065824449062347412f,
+0.99005818367004394531f,-0.15885815024375915527f,0.98730140924453735352f,
+-0.17700421810150146484f,0.98421007394790649414f,-0.19509032368659973145f,
+0.98078525066375732422f,-0.21311031281948089600f,0.97702813148498535156f,
+-0.23105810582637786865f,0.97293996810913085938f,-0.24892760813236236572f,
+0.96852207183837890625f,-0.26671275496482849121f,0.96377605199813842773f,
+-0.28440752625465393066f,0.95870345830917358398f,-0.30200594663619995117f,
+0.95330601930618286133f,-0.31950202584266662598f,0.94758558273315429688f,
+-0.33688986301422119141f,0.94154405593872070312f,-0.35416352748870849609f,
+0.93518352508544921875f,-0.37131720781326293945f,0.92850607633590698242f,
+-0.38834503293037414551f,0.92151403427124023438f,-0.40524131059646606445f,
+0.91420978307723999023f,-0.42200025916099548340f,0.90659570693969726562f,
+-0.43861624598503112793f,0.89867448806762695312f,-0.45508357882499694824f,
+0.89044874906539916992f,-0.47139674425125122070f,0.88192129135131835938f,
+-0.48755016922950744629f,0.87309497594833374023f,-0.50353837013244628906f,
+0.86397284269332885742f,-0.51935601234436035156f,0.85455799102783203125f,
+-0.53499764204025268555f,0.84485357999801635742f,-0.55045795440673828125f,
+0.83486288785934448242f,-0.56573182344436645508f,0.82458931207656860352f,
+-0.58081394433975219727f,0.81403630971908569336f,-0.59569931030273437500f,
+0.80320751667022705078f,-0.61038279533386230469f,0.79210656881332397461f,
+-0.62485951185226440430f,0.78073722124099731445f,-0.63912445306777954102f,
+0.76910334825515747070f,-0.65317285060882568359f,0.75720882415771484375f,
+-0.66699993610382080078f,0.74505776166915893555f,-0.68060100078582763672f,
+0.73265427350997924805f,-0.69397145509719848633f,0.72000253200531005859f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.72000253200531005859f,
+0.69397145509719848633f,-0.73265427350997924805f,0.68060100078582763672f,
+-0.74505776166915893555f,0.66699993610382080078f,-0.75720882415771484375f,
+0.65317285060882568359f,-0.76910334825515747070f,0.63912445306777954102f,
+-0.78073722124099731445f,0.62485951185226440430f,-0.79210656881332397461f,
+0.61038279533386230469f,-0.80320751667022705078f,0.59569931030273437500f,
+-0.81403630971908569336f,0.58081394433975219727f,-0.82458931207656860352f,
+0.56573182344436645508f,-0.83486288785934448242f,0.55045795440673828125f,
+-0.84485357999801635742f,0.53499764204025268555f,-0.85455799102783203125f,
+0.51935601234436035156f,-0.86397284269332885742f,0.50353837013244628906f,
+-0.87309497594833374023f,0.48755016922950744629f,-0.88192129135131835938f,
+0.47139674425125122070f,-0.89044874906539916992f,0.45508357882499694824f,
+-0.89867448806762695312f,0.43861624598503112793f,-0.90659570693969726562f,
+0.42200025916099548340f,-0.91420978307723999023f,0.40524131059646606445f,
+-0.92151403427124023438f,0.38834503293037414551f,-0.92850607633590698242f,
+0.37131720781326293945f,-0.93518352508544921875f,0.35416352748870849609f,
+-0.94154405593872070312f,0.33688986301422119141f,-0.94758558273315429688f,
+0.31950202584266662598f,-0.95330601930618286133f,0.30200594663619995117f,
+-0.95870345830917358398f,0.28440752625465393066f,-0.96377605199813842773f,
+0.26671275496482849121f,-0.96852207183837890625f,0.24892760813236236572f,
+-0.97293996810913085938f,0.23105810582637786865f,-0.97702813148498535156f,
+0.21311031281948089600f,-0.98078525066375732422f,0.19509032368659973145f,
+-0.98421007394790649414f,0.17700421810150146484f,-0.98730140924453735352f,
+0.15885815024375915527f,-0.99005818367004394531f,0.14065824449062347412f,
+-0.99247956275939941406f,0.12241067737340927124f,-0.99456459283828735352f,
+0.10412163287401199341f,-0.99631261825561523438f,0.08579730987548828125f,
+-0.99772304296493530273f,0.06744392216205596924f,-0.99879544973373413086f,
+0.04906767606735229492f,-0.99952942132949829102f,0.03067480400204658508f,
+-0.99992471933364868164f,0.01227153837680816650f,-0.99998116493225097656f,
+-0.00613588467240333557f,-0.99969881772994995117f,-0.02454122900962829590f,
+-0.99907773733139038086f,-0.04293825849890708923f,-0.99811810255050659180f,
+-0.06132073700428009033f,-0.99682027101516723633f,-0.07968243956565856934f,
+-0.99518471956253051758f,-0.09801714122295379639f,-0.99321192502975463867f,
+-0.11631862819194793701f,-0.99090266227722167969f,-0.13458070158958435059f,
+-0.98825758695602416992f,-0.15279719233512878418f,-0.98527765274047851562f,
+-0.17096188664436340332f,-0.98196387290954589844f,-0.18906866014003753662f,
+-0.97831737995147705078f,-0.20711137354373931885f,-0.97433936595916748047f,
+-0.22508391737937927246f,-0.97003126144409179688f,-0.24298018217086791992f,
+-0.96539443731307983398f,-0.26079410314559936523f,-0.96043050289154052734f,
+-0.27851969003677368164f,-0.95514118671417236328f,-0.29615089297294616699f,
+-0.94952815771102905273f,-0.31368175148963928223f,-0.94359344244003295898f,
+-0.33110630512237548828f,-0.93733900785446166992f,-0.34841868281364440918f,
+-0.93076694011688232422f,-0.36561298370361328125f,-0.92387950420379638672f,
+-0.38268342614173889160f,-0.91667908430099487305f,-0.39962419867515563965f,
+-0.90916800498962402344f,-0.41642954945564270020f,-0.90134882926940917969f,
+-0.43309381604194641113f,-0.89322429895401000977f,-0.44961133599281311035f,
+-0.88479709625244140625f,-0.46597650647163391113f,-0.87607008218765258789f,
+-0.48218378424644470215f,-0.86704623699188232422f,-0.49822765588760375977f,
+-0.85772860050201416016f,-0.51410275697708129883f,-0.84812033176422119141f,
+-0.52980363368988037109f,-0.83822470903396606445f,-0.54532498121261596680f,
+-0.82804507017135620117f,-0.56066155433654785156f,-0.81758481264114379883f,
+-0.57580816745758056641f,-0.80684757232666015625f,-0.59075969457626342773f,
+-0.79583692550659179688f,-0.60551106929779052734f,-0.78455656766891479492f,
+-0.62005722522735595703f,-0.77301043272018432617f,-0.63439327478408813477f,
+-0.76120239496231079102f,-0.64851438999176025391f,-0.74913638830184936523f,
+-0.66241580247879028320f,-0.73681658506393432617f,-0.67609268426895141602f,
+-0.72424709796905517578f,-0.68954056501388549805f,-0.71143221855163574219f,
+-0.70275473594665527344f,-0.69837623834609985352f,-0.71573084592819213867f,
+-0.68508368730545043945f,-0.72846436500549316406f,-0.67155897617340087891f,
+-0.74095112085342407227f,-0.65780669450759887695f,-0.75318682193756103516f,
+-0.64383155107498168945f,-0.76516723632812500000f,-0.62963825464248657227f,
+-0.77688848972320556641f,-0.61523157358169555664f,-0.78834640979766845703f,
+-0.60061645507812500000f,-0.79953724145889282227f,-0.58579784631729125977f,
+-0.81045717000961303711f,-0.57078075408935546875f,-0.82110249996185302734f,
+-0.55557024478912353516f,-0.83146959543228149414f,-0.54017144441604614258f,
+-0.84155499935150146484f,-0.52458965778350830078f,-0.85135519504547119141f,
+-0.50883013010025024414f,-0.86086696386337280273f,-0.49289819598197937012f,
+-0.87008696794509887695f,-0.47679921984672546387f,-0.87901222705841064453f,
+-0.46053871512413024902f,-0.88763964176177978516f,-0.44412213563919067383f,
+-0.89596623182296752930f,-0.42755508422851562500f,-0.90398931503295898438f,
+-0.41084316372871398926f,-0.91170603036880493164f,-0.39399203658103942871f,
+-0.91911387443542480469f,-0.37700742483139038086f,-0.92621022462844848633f,
+-0.35989505052566528320f,-0.93299281597137451172f,-0.34266072511672973633f,
+-0.93945920467376708984f,-0.32531028985977172852f,-0.94560730457305908203f,
+-0.30784964561462402344f,-0.95143502950668334961f,-0.29028466343879699707f,
+-0.95694035291671752930f,-0.27262136340141296387f,-0.96212142705917358398f,
+-0.25486564636230468750f,-0.96697646379470825195f,-0.23702360689640045166f,
+-0.97150391340255737305f,-0.21910123527050018311f,-0.97570210695266723633f,
+-0.20110464096069335938f,-0.97956979274749755859f,-0.18303988873958587646f,
+-0.98310548067092895508f,-0.16491311788558959961f,-0.98630809783935546875f,
+-0.14673046767711639404f,-0.98917651176452636719f,-0.12849810719490051270f,
+-0.99170976877212524414f,-0.11022220551967620850f,-0.99390697479248046875f,
+-0.09190895408391952515f,-0.99576741456985473633f,-0.07356456667184829712f,
+-0.99729043245315551758f,-0.05519524589180946350f,-0.99847555160522460938f,
+-0.03680722415447235107f,-0.99932235479354858398f,-0.01840673014521598816f,
+-0.99983060359954833984f,1.00000000000000000000f,0.00000000000000000000f,
+0.99729043245315551758f,0.07356456667184829712f,0.98917651176452636719f,
+0.14673046767711639404f,0.97570210695266723633f,0.21910123527050018311f,
+0.95694035291671752930f,0.29028466343879699707f,0.93299281597137451172f,
+0.35989505052566528320f,0.90398931503295898438f,0.42755508422851562500f,
+0.87008696794509887695f,0.49289819598197937012f,0.83146959543228149414f,
+0.55557024478912353516f,0.78834640979766845703f,0.61523157358169555664f,
+0.74095112085342407227f,0.67155897617340087891f,0.68954056501388549805f,
+0.72424709796905517578f,0.63439327478408813477f,0.77301043272018432617f,
+0.57580816745758056641f,0.81758481264114379883f,0.51410275697708129883f,
+0.85772860050201416016f,0.44961133599281311035f,0.89322429895401000977f,
+0.38268342614173889160f,0.92387950420379638672f,0.31368175148963928223f,
+0.94952815771102905273f,0.24298018217086791992f,0.97003126144409179688f,
+0.17096188664436340332f,0.98527765274047851562f,0.09801714122295379639f,
+0.99518471956253051758f,0.02454122900962829590f,0.99969881772994995117f,
+-0.04906767606735229492f,0.99879544973373413086f,-0.12241067737340927124f,
+0.99247956275939941406f,-0.19509032368659973145f,0.98078525066375732422f,
+-0.26671275496482849121f,0.96377605199813842773f,-0.33688986301422119141f,
+0.94154405593872070312f,-0.40524131059646606445f,0.91420978307723999023f,
+-0.47139674425125122070f,0.88192129135131835938f,-0.53499764204025268555f,
+0.84485357999801635742f,-0.59569931030273437500f,0.80320751667022705078f,
+-0.65317285060882568359f,0.75720882415771484375f,-0.70710676908493041992f,
+0.70710676908493041992f,-0.75720882415771484375f,0.65317285060882568359f,
+-0.80320751667022705078f,0.59569931030273437500f,-0.84485357999801635742f,
+0.53499764204025268555f,-0.88192129135131835938f,0.47139674425125122070f,
+-0.91420978307723999023f,0.40524131059646606445f,-0.94154405593872070312f,
+0.33688986301422119141f,-0.96377605199813842773f,0.26671275496482849121f,
+-0.98078525066375732422f,0.19509032368659973145f,-0.99247956275939941406f,
+0.12241067737340927124f,-0.99879544973373413086f,0.04906767606735229492f,
+-0.99969881772994995117f,-0.02454122900962829590f,-0.99518471956253051758f,
+-0.09801714122295379639f,-0.98527765274047851562f,-0.17096188664436340332f,
+-0.97003126144409179688f,-0.24298018217086791992f,-0.94952815771102905273f,
+-0.31368175148963928223f,-0.92387950420379638672f,-0.38268342614173889160f,
+-0.89322429895401000977f,-0.44961133599281311035f,-0.85772860050201416016f,
+-0.51410275697708129883f,-0.81758481264114379883f,-0.57580816745758056641f,
+-0.77301043272018432617f,-0.63439327478408813477f,-0.72424709796905517578f,
+-0.68954056501388549805f,-0.67155897617340087891f,-0.74095112085342407227f,
+-0.61523157358169555664f,-0.78834640979766845703f,-0.55557024478912353516f,
+-0.83146959543228149414f,-0.49289819598197937012f,-0.87008696794509887695f,
+-0.42755508422851562500f,-0.90398931503295898438f,-0.35989505052566528320f,
+-0.93299281597137451172f,-0.29028466343879699707f,-0.95694035291671752930f,
+-0.21910123527050018311f,-0.97570210695266723633f,-0.14673046767711639404f,
+-0.98917651176452636719f,-0.07356456667184829712f,-0.99729043245315551758f,
+1.00000000000000000000f,0.00000000000000000000f,0.95694035291671752930f,
+0.29028466343879699707f,0.83146959543228149414f,0.55557024478912353516f,
+0.63439327478408813477f,0.77301043272018432617f,0.38268342614173889160f,
+0.92387950420379638672f,0.09801714122295379639f,0.99518471956253051758f,
+-0.19509032368659973145f,0.98078525066375732422f,-0.47139674425125122070f,
+0.88192129135131835938f,-0.70710676908493041992f,0.70710676908493041992f,
+-0.88192129135131835938f,0.47139674425125122070f,-0.98078525066375732422f,
+0.19509032368659973145f,-0.99518471956253051758f,-0.09801714122295379639f,
+-0.92387950420379638672f,-0.38268342614173889160f,-0.77301043272018432617f,
+-0.63439327478408813477f,-0.55557024478912353516f,-0.83146959543228149414f,
+-0.29028466343879699707f,-0.95694035291671752930f,1.00000000000000000000f,
+0.00000000000000000000f,0.38268342614173889160f,0.92387950420379638672f,
+-0.70710676908493041992f,0.70710676908493041992f,-0.92387950420379638672f,
+-0.38268342614173889160f,};
+
+#endif
+
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_16_q31[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_16_q31[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_16_q31[2]={
+0,0,};
+
+q31_t rearranged_twiddle_stride1_16_q31[8]={
+0x7FFFFFFF,0x00000000,0x7641AF3D,0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,
+0x89BE50C3,};
+
+q31_t rearranged_twiddle_stride2_16_q31[8]={
+0x7FFFFFFF,0x00000000,0x5A82799A,0xA57D8666,0x00000000,0x80000000,0xA57D8666,
+0xA57D8666,};
+
+q31_t rearranged_twiddle_stride3_16_q31[8]={
+0x7FFFFFFF,0x00000000,0x30FBC54D,0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,
+0x30FBC54D,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_64_q31[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_64_q31[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_64_q31[3]={
+0,32,0,};
+
+q31_t rearranged_twiddle_stride1_64_q31[40]={
+0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2,0x7D8A5F40,0xE70747C4,0x7A7D055B,
+0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6,0xC3A94590,0x6A6D98A4,0xB8E31319,
+0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666,0x5133CC94,0x9D0DFE54,0x471CECE7,
+0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D,0x89BE50C3,0x25280C5E,0x8582FAA5,
+0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971,0x7FFFFFFF,0x00000000,0x7641AF3D,
+0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,0x89BE50C3,};
+
+q31_t rearranged_twiddle_stride2_64_q31[40]={
+0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4,0x7641AF3D,0xCF043AB3,0x6A6D98A4,
+0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7,0x9592675C,0x30FBC54D,0x89BE50C3,
+0x18F8B83C,0x8275A0C0,0x00000000,0x80000000,0xE70747C4,0x8275A0C0,0xCF043AB3,
+0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666,0xA57D8666,0x9592675C,0xB8E31319,
+0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4,0x7FFFFFFF,0x00000000,0x5A82799A,
+0xA57D8666,0x00000000,0x80000000,0xA57D8666,0xA57D8666,};
+
+q31_t rearranged_twiddle_stride3_64_q31[40]={
+0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2,0x6A6D98A4,0xB8E31319,0x5133CC94,
+0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E,0x809DC971,0xE70747C4,0x8275A0C0,
+0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666,0x8F1D343A,0xC3A94590,0x8275A0C0,
+0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3,0x30FBC54D,0x9D0DFE54,0x5133CC94,
+0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B,0x7FFFFFFF,0x00000000,0x30FBC54D,
+0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,0x30FBC54D,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_256_q31[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_256_q31[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_256_q31[4]={
+0,128,160,0,};
+
+q31_t rearranged_twiddle_stride1_256_q31[168]={
+0x7FFFFFFF,0x00000000,0x7FF62182,0xFCDBD541,0x7FD8878E,0xF9B82684,0x7FA736B4,
+0xF6956FB7,0x7F62368F,0xF3742CA2,0x7F0991C4,0xF054D8D5,0x7E9D55FC,0xED37EF91,
+0x7E1D93EA,0xEA1DEBBB,0x7D8A5F40,0xE70747C4,0x7CE3CEB2,0xE3F47D96,0x7C29FBEE,
+0xE0E60685,0x7B5D039E,0xDDDC5B3B,0x7A7D055B,0xDAD7F3A2,0x798A23B1,0xD7D946D8,
+0x78848414,0xD4E0CB15,0x776C4EDB,0xD1EEF59E,0x7641AF3D,0xCF043AB3,0x7504D345,
+0xCC210D79,0x73B5EBD1,0xC945DFEC,0x72552C85,0xC67322CE,0x70E2CBC6,0xC3A94590,
+0x6F5F02B2,0xC0E8B648,0x6DCA0D14,0xBE31E19B,0x6C242960,0xBB8532B0,0x6A6D98A4,
+0xB8E31319,0x68A69E81,0xB64BEACD,0x66CF8120,0xB3C0200C,0x64E88926,0xB140175B,
+0x62F201AC,0xAECC336C,0x60EC3830,0xAC64D510,0x5ED77C8A,0xAA0A5B2E,0x5CB420E0,
+0xA7BD22AC,0x5A82799A,0xA57D8666,0x5842DD54,0xA34BDF20,0x55F5A4D2,0xA1288376,
+0x539B2AF0,0x9F13C7D0,0x5133CC94,0x9D0DFE54,0x4EBFE8A5,0x9B1776DA,0x4C3FDFF4,
+0x99307EE0,0x49B41533,0x9759617F,0x471CECE7,0x9592675C,0x447ACD50,0x93DBD6A0,
+0x41CE1E65,0x9235F2EC,0x3F1749B8,0x90A0FD4E,0x3C56BA70,0x8F1D343A,0x398CDD32,
+0x8DAAD37B,0x36BA2014,0x8C4A142F,0x33DEF287,0x8AFB2CBB,0x30FBC54D,0x89BE50C3,
+0x2E110A62,0x8893B125,0x2B1F34EB,0x877B7BEC,0x2826B928,0x8675DC4F,0x25280C5E,
+0x8582FAA5,0x2223A4C5,0x84A2FC62,0x1F19F97B,0x83D60412,0x1C0B826A,0x831C314E,
+0x18F8B83C,0x8275A0C0,0x15E21445,0x81E26C16,0x12C8106F,0x8162AA04,0x0FAB272B,
+0x80F66E3C,0x0C8BD35E,0x809DC971,0x096A9049,0x8058C94C,0x0647D97C,0x80277872,
+0x03242ABF,0x8009DE7E,0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2,0x7D8A5F40,
+0xE70747C4,0x7A7D055B,0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6,0xC3A94590,
+0x6A6D98A4,0xB8E31319,0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666,0x5133CC94,
+0x9D0DFE54,0x471CECE7,0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D,0x89BE50C3,
+0x25280C5E,0x8582FAA5,0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971,0x7FFFFFFF,
+0x00000000,0x7641AF3D,0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,0x89BE50C3,};
+
+q31_t rearranged_twiddle_stride2_256_q31[168]={
+0x7FFFFFFF,0x00000000,0x7FD8878E,0xF9B82684,0x7F62368F,0xF3742CA2,0x7E9D55FC,
+0xED37EF91,0x7D8A5F40,0xE70747C4,0x7C29FBEE,0xE0E60685,0x7A7D055B,0xDAD7F3A2,
+0x78848414,0xD4E0CB15,0x7641AF3D,0xCF043AB3,0x73B5EBD1,0xC945DFEC,0x70E2CBC6,
+0xC3A94590,0x6DCA0D14,0xBE31E19B,0x6A6D98A4,0xB8E31319,0x66CF8120,0xB3C0200C,
+0x62F201AC,0xAECC336C,0x5ED77C8A,0xAA0A5B2E,0x5A82799A,0xA57D8666,0x55F5A4D2,
+0xA1288376,0x5133CC94,0x9D0DFE54,0x4C3FDFF4,0x99307EE0,0x471CECE7,0x9592675C,
+0x41CE1E65,0x9235F2EC,0x3C56BA70,0x8F1D343A,0x36BA2014,0x8C4A142F,0x30FBC54D,
+0x89BE50C3,0x2B1F34EB,0x877B7BEC,0x25280C5E,0x8582FAA5,0x1F19F97B,0x83D60412,
+0x18F8B83C,0x8275A0C0,0x12C8106F,0x8162AA04,0x0C8BD35E,0x809DC971,0x0647D97C,
+0x80277872,0x00000000,0x80000000,0xF9B82684,0x80277872,0xF3742CA2,0x809DC971,
+0xED37EF91,0x8162AA04,0xE70747C4,0x8275A0C0,0xE0E60685,0x83D60412,0xDAD7F3A2,
+0x8582FAA5,0xD4E0CB15,0x877B7BEC,0xCF043AB3,0x89BE50C3,0xC945DFEC,0x8C4A142F,
+0xC3A94590,0x8F1D343A,0xBE31E19B,0x9235F2EC,0xB8E31319,0x9592675C,0xB3C0200C,
+0x99307EE0,0xAECC336C,0x9D0DFE54,0xAA0A5B2E,0xA1288376,0xA57D8666,0xA57D8666,
+0xA1288376,0xAA0A5B2E,0x9D0DFE54,0xAECC336C,0x99307EE0,0xB3C0200C,0x9592675C,
+0xB8E31319,0x9235F2EC,0xBE31E19B,0x8F1D343A,0xC3A94590,0x8C4A142F,0xC945DFEC,
+0x89BE50C3,0xCF043AB3,0x877B7BEC,0xD4E0CB15,0x8582FAA5,0xDAD7F3A2,0x83D60412,
+0xE0E60685,0x8275A0C0,0xE70747C4,0x8162AA04,0xED37EF91,0x809DC971,0xF3742CA2,
+0x80277872,0xF9B82684,0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4,0x7641AF3D,
+0xCF043AB3,0x6A6D98A4,0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7,0x9592675C,
+0x30FBC54D,0x89BE50C3,0x18F8B83C,0x8275A0C0,0x00000000,0x80000000,0xE70747C4,
+0x8275A0C0,0xCF043AB3,0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666,0xA57D8666,
+0x9592675C,0xB8E31319,0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4,0x7FFFFFFF,
+0x00000000,0x5A82799A,0xA57D8666,0x00000000,0x80000000,0xA57D8666,0xA57D8666,};
+
+q31_t rearranged_twiddle_stride3_256_q31[168]={
+0x7FFFFFFF,0x00000000,0x7FA736B4,0xF6956FB7,0x7E9D55FC,0xED37EF91,0x7CE3CEB2,
+0xE3F47D96,0x7A7D055B,0xDAD7F3A2,0x776C4EDB,0xD1EEF59E,0x73B5EBD1,0xC945DFEC,
+0x6F5F02B2,0xC0E8B648,0x6A6D98A4,0xB8E31319,0x64E88926,0xB140175B,0x5ED77C8A,
+0xAA0A5B2E,0x5842DD54,0xA34BDF20,0x5133CC94,0x9D0DFE54,0x49B41533,0x9759617F,
+0x41CE1E65,0x9235F2EC,0x398CDD32,0x8DAAD37B,0x30FBC54D,0x89BE50C3,0x2826B928,
+0x8675DC4F,0x1F19F97B,0x83D60412,0x15E21445,0x81E26C16,0x0C8BD35E,0x809DC971,
+0x03242ABF,0x8009DE7E,0xF9B82684,0x80277872,0xF054D8D5,0x80F66E3C,0xE70747C4,
+0x8275A0C0,0xDDDC5B3B,0x84A2FC62,0xD4E0CB15,0x877B7BEC,0xCC210D79,0x8AFB2CBB,
+0xC3A94590,0x8F1D343A,0xBB8532B0,0x93DBD6A0,0xB3C0200C,0x99307EE0,0xAC64D510,
+0x9F13C7D0,0xA57D8666,0xA57D8666,0x9F13C7D0,0xAC64D510,0x99307EE0,0xB3C0200C,
+0x93DBD6A0,0xBB8532B0,0x8F1D343A,0xC3A94590,0x8AFB2CBB,0xCC210D79,0x877B7BEC,
+0xD4E0CB15,0x84A2FC62,0xDDDC5B3B,0x8275A0C0,0xE70747C4,0x80F66E3C,0xF054D8D5,
+0x80277872,0xF9B82684,0x8009DE7E,0x03242ABF,0x809DC971,0x0C8BD35E,0x81E26C16,
+0x15E21445,0x83D60412,0x1F19F97B,0x8675DC4F,0x2826B928,0x89BE50C3,0x30FBC54D,
+0x8DAAD37B,0x398CDD32,0x9235F2EC,0x41CE1E65,0x9759617F,0x49B41533,0x9D0DFE54,
+0x5133CC94,0xA34BDF20,0x5842DD54,0xAA0A5B2E,0x5ED77C8A,0xB140175B,0x64E88926,
+0xB8E31319,0x6A6D98A4,0xC0E8B648,0x6F5F02B2,0xC945DFEC,0x73B5EBD1,0xD1EEF59E,
+0x776C4EDB,0xDAD7F3A2,0x7A7D055B,0xE3F47D96,0x7CE3CEB2,0xED37EF91,0x7E9D55FC,
+0xF6956FB7,0x7FA736B4,0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2,0x6A6D98A4,
+0xB8E31319,0x5133CC94,0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E,0x809DC971,
+0xE70747C4,0x8275A0C0,0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666,0x8F1D343A,
+0xC3A94590,0x8275A0C0,0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3,0x30FBC54D,
+0x9D0DFE54,0x5133CC94,0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B,0x7FFFFFFF,
+0x00000000,0x30FBC54D,0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,0x30FBC54D,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_1024_q31[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_1024_q31[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_1024_q31[5]={
+0,512,640,672,0,};
+
+q31_t rearranged_twiddle_stride1_1024_q31[680]={
+0x7FFFFFFF,0x00000000,0x7FFF6216,0xFF36F078,0x7FFD885A,0xFE6DE2E0,0x7FFA72D1,
+0xFDA4D929,0x7FF62182,0xFCDBD541,0x7FF09478,0xFC12D91A,0x7FE9CBC0,0xFB49E6A3,
+0x7FE1C76B,0xFA80FFCB,0x7FD8878E,0xF9B82684,0x7FCE0C3E,0xF8EF5CBB,0x7FC25596,
+0xF826A462,0x7FB563B3,0xF75DFF66,0x7FA736B4,0xF6956FB7,0x7F97CEBD,0xF5CCF743,
+0x7F872BF3,0xF50497FB,0x7F754E80,0xF43C53CB,0x7F62368F,0xF3742CA2,0x7F4DE451,
+0xF2AC246E,0x7F3857F6,0xF1E43D1C,0x7F2191B4,0xF11C789A,0x7F0991C4,0xF054D8D5,
+0x7EF05860,0xEF8D5FB8,0x7ED5E5C6,0xEEC60F31,0x7EBA3A39,0xEDFEE92B,0x7E9D55FC,
+0xED37EF91,0x7E7F3957,0xEC71244F,0x7E5FE493,0xEBAA894F,0x7E3F57FF,0xEAE4207A,
+0x7E1D93EA,0xEA1DEBBB,0x7DFA98A8,0xE957ECFB,0x7DD6668F,0xE8922622,0x7DB0FDF8,
+0xE7CC9917,0x7D8A5F40,0xE70747C4,0x7D628AC6,0xE642340D,0x7D3980EC,0xE57D5FDA,
+0x7D0F4218,0xE4B8CD11,0x7CE3CEB2,0xE3F47D96,0x7CB72724,0xE330734D,0x7C894BDE,
+0xE26CB01B,0x7C5A3D50,0xE1A935E2,0x7C29FBEE,0xE0E60685,0x7BF88830,0xE02323E5,
+0x7BC5E290,0xDF608FE4,0x7B920B89,0xDE9E4C60,0x7B5D039E,0xDDDC5B3B,0x7B26CB4F,
+0xDD1ABE51,0x7AEF6323,0xDC597781,0x7AB6CBA4,0xDB9888A8,0x7A7D055B,0xDAD7F3A2,
+0x7A4210D8,0xDA17BA4A,0x7A05EEAD,0xD957DE7A,0x79C89F6E,0xD898620C,0x798A23B1,
+0xD7D946D8,0x794A7C12,0xD71A8EB5,0x7909A92D,0xD65C3B7B,0x78C7ABA2,0xD59E4EFF,
+0x78848414,0xD4E0CB15,0x78403329,0xD423B191,0x77FAB989,0xD3670446,0x77B417DF,
+0xD2AAC504,0x776C4EDB,0xD1EEF59E,0x77235F2D,0xD13397E2,0x76D94989,0xD078AD9E,
+0x768E0EA6,0xCFBE389F,0x7641AF3D,0xCF043AB3,0x75F42C0B,0xCE4AB5A2,0x75A585CF,
+0xCD91AB39,0x7555BD4C,0xCCD91D3D,0x7504D345,0xCC210D79,0x74B2C884,0xCB697DB0,
+0x745F9DD1,0xCAB26FA9,0x740B53FB,0xC9FBE527,0x73B5EBD1,0xC945DFEC,0x735F6626,
+0xC89061BA,0x7307C3D0,0xC7DB6C50,0x72AF05A7,0xC727016D,0x72552C85,0xC67322CE,
+0x71FA3949,0xC5BFD22E,0x719E2CD2,0xC50D1149,0x71410805,0xC45AE1D7,0x70E2CBC6,
+0xC3A94590,0x708378FF,0xC2F83E2A,0x7023109A,0xC247CD5A,0x6FC19385,0xC197F4D4,
+0x6F5F02B2,0xC0E8B648,0x6EFB5F12,0xC03A1368,0x6E96A99D,0xBF8C0DE3,0x6E30E34A,
+0xBEDEA765,0x6DCA0D14,0xBE31E19B,0x6D6227FA,0xBD85BE30,0x6CF934FC,0xBCDA3ECB,
+0x6C8F351C,0xBC2F6513,0x6C242960,0xBB8532B0,0x6BB812D1,0xBADBA943,0x6B4AF279,
+0xBA32CA71,0x6ADCC964,0xB98A97D8,0x6A6D98A4,0xB8E31319,0x69FD614A,0xB83C3DD1,
+0x698C246C,0xB796199B,0x6919E320,0xB6F0A812,0x68A69E81,0xB64BEACD,0x683257AB,
+0xB5A7E362,0x67BD0FBD,0xB5049368,0x6746C7D8,0xB461FC70,0x66CF8120,0xB3C0200C,
+0x66573CBB,0xB31EFFCC,0x65DDFBD3,0xB27E9D3C,0x6563BF92,0xB1DEF9E9,0x64E88926,
+0xB140175B,0x646C59BF,0xB0A1F71D,0x63EF3290,0xB0049AB3,0x637114CC,0xAF6803A2,
+0x62F201AC,0xAECC336C,0x6271FA69,0xAE312B92,0x61F1003F,0xAD96ED92,0x616F146C,
+0xACFD7AE8,0x60EC3830,0xAC64D510,0x60686CCF,0xABCCFD83,0x5FE3B38D,0xAB35F5B5,
+0x5F5E0DB3,0xAA9FBF1E,0x5ED77C8A,0xAA0A5B2E,0x5E50015D,0xA975CB57,0x5DC79D7C,
+0xA8E21106,0x5D3E5237,0xA84F2DAA,0x5CB420E0,0xA7BD22AC,0x5C290ACC,0xA72BF174,
+0x5B9D1154,0xA69B9B68,0x5B1035CF,0xA60C21EE,0x5A82799A,0xA57D8666,0x59F3DE12,
+0xA4EFCA31,0x59646498,0xA462EEAC,0x58D40E8C,0xA3D6F534,0x5842DD54,0xA34BDF20,
+0x57B0D256,0xA2C1ADC9,0x571DEEFA,0xA2386284,0x568A34A9,0xA1AFFEA3,0x55F5A4D2,
+0xA1288376,0x556040E2,0xA0A1F24D,0x54CA0A4B,0xA01C4C73,0x5433027D,0x9F979331,
+0x539B2AF0,0x9F13C7D0,0x53028518,0x9E90EB94,0x5269126E,0x9E0EFFC1,0x51CED46E,
+0x9D8E0597,0x5133CC94,0x9D0DFE54,0x5097FC5E,0x9C8EEB34,0x4FFB654D,0x9C10CD70,
+0x4F5E08E3,0x9B93A641,0x4EBFE8A5,0x9B1776DA,0x4E210617,0x9A9C406E,0x4D8162C4,
+0x9A22042D,0x4CE10034,0x99A8C345,0x4C3FDFF4,0x99307EE0,0x4B9E0390,0x98B93828,
+0x4AFB6C98,0x9842F043,0x4A581C9E,0x97CDA855,0x49B41533,0x9759617F,0x490F57EE,
+0x96E61CE0,0x4869E665,0x9673DB94,0x47C3C22F,0x96029EB6,0x471CECE7,0x9592675C,
+0x46756828,0x9523369C,0x45CD358F,0x94B50D87,0x452456BD,0x9447ED2F,0x447ACD50,
+0x93DBD6A0,0x43D09AED,0x9370CAE4,0x4325C135,0x9306CB04,0x427A41D0,0x929DD806,
+0x41CE1E65,0x9235F2EC,0x4121589B,0x91CF1CB6,0x4073F21D,0x91695663,0x3FC5EC98,
+0x9104A0EE,0x3F1749B8,0x90A0FD4E,0x3E680B2C,0x903E6C7B,0x3DB832A6,0x8FDCEF66,
+0x3D07C1D6,0x8F7C8701,0x3C56BA70,0x8F1D343A,0x3BA51E29,0x8EBEF7FB,0x3AF2EEB7,
+0x8E61D32E,0x3A402DD2,0x8E05C6B7,0x398CDD32,0x8DAAD37B,0x38D8FE93,0x8D50FA59,
+0x382493B0,0x8CF83C30,0x376F9E46,0x8CA099DA,0x36BA2014,0x8C4A142F,0x36041AD9,
+0x8BF4AC05,0x354D9057,0x8BA0622F,0x34968250,0x8B4D377C,0x33DEF287,0x8AFB2CBB,
+0x3326E2C3,0x8AAA42B4,0x326E54C7,0x8A5A7A31,0x31B54A5E,0x8A0BD3F5,0x30FBC54D,
+0x89BE50C3,0x3041C761,0x8971F15A,0x2F875262,0x8926B677,0x2ECC681E,0x88DCA0D3,
+0x2E110A62,0x8893B125,0x2D553AFC,0x884BE821,0x2C98FBBA,0x88054677,0x2BDC4E6F,
+0x87BFCCD7,0x2B1F34EB,0x877B7BEC,0x2A61B101,0x8738545E,0x29A3C485,0x86F656D3,
+0x28E5714B,0x86B583EE,0x2826B928,0x8675DC4F,0x27679DF4,0x86376092,0x26A82186,
+0x85FA1153,0x25E845B6,0x85BDEF28,0x25280C5E,0x8582FAA5,0x24677758,0x8549345C,
+0x23A6887F,0x85109CDD,0x22E541AF,0x84D934B1,0x2223A4C5,0x84A2FC62,0x2161B3A0,
+0x846DF477,0x209F701C,0x843A1D70,0x1FDCDC1B,0x840777D0,0x1F19F97B,0x83D60412,
+0x1E56CA1E,0x83A5C2B0,0x1D934FE5,0x8376B422,0x1CCF8CB3,0x8348D8DC,0x1C0B826A,
+0x831C314E,0x1B4732EF,0x82F0BDE8,0x1A82A026,0x82C67F14,0x19BDCBF3,0x829D753A,
+0x18F8B83C,0x8275A0C0,0x183366E9,0x824F0208,0x176DD9DE,0x82299971,0x16A81305,
+0x82056758,0x15E21445,0x81E26C16,0x151BDF86,0x81C0A801,0x145576B1,0x81A01B6D,
+0x138EDBB1,0x8180C6A9,0x12C8106F,0x8162AA04,0x120116D5,0x8145C5C7,0x1139F0CF,
+0x812A1A3A,0x1072A048,0x810FA7A0,0x0FAB272B,0x80F66E3C,0x0EE38766,0x80DE6E4C,
+0x0E1BC2E4,0x80C7A80A,0x0D53DB92,0x80B21BAF,0x0C8BD35E,0x809DC971,0x0BC3AC35,
+0x808AB180,0x0AFB6805,0x8078D40D,0x0A3308BD,0x80683143,0x096A9049,0x8058C94C,
+0x08A2009A,0x804A9C4D,0x07D95B9E,0x803DAA6A,0x0710A345,0x8031F3C2,0x0647D97C,
+0x80277872,0x057F0035,0x801E3895,0x04B6195D,0x80163440,0x03ED26E6,0x800F6B88,
+0x03242ABF,0x8009DE7E,0x025B26D7,0x80058D2F,0x01921D20,0x800277A6,0x00C90F88,
+0x80009DEA,0x7FFFFFFF,0x00000000,0x7FF62182,0xFCDBD541,0x7FD8878E,0xF9B82684,
+0x7FA736B4,0xF6956FB7,0x7F62368F,0xF3742CA2,0x7F0991C4,0xF054D8D5,0x7E9D55FC,
+0xED37EF91,0x7E1D93EA,0xEA1DEBBB,0x7D8A5F40,0xE70747C4,0x7CE3CEB2,0xE3F47D96,
+0x7C29FBEE,0xE0E60685,0x7B5D039E,0xDDDC5B3B,0x7A7D055B,0xDAD7F3A2,0x798A23B1,
+0xD7D946D8,0x78848414,0xD4E0CB15,0x776C4EDB,0xD1EEF59E,0x7641AF3D,0xCF043AB3,
+0x7504D345,0xCC210D79,0x73B5EBD1,0xC945DFEC,0x72552C85,0xC67322CE,0x70E2CBC6,
+0xC3A94590,0x6F5F02B2,0xC0E8B648,0x6DCA0D14,0xBE31E19B,0x6C242960,0xBB8532B0,
+0x6A6D98A4,0xB8E31319,0x68A69E81,0xB64BEACD,0x66CF8120,0xB3C0200C,0x64E88926,
+0xB140175B,0x62F201AC,0xAECC336C,0x60EC3830,0xAC64D510,0x5ED77C8A,0xAA0A5B2E,
+0x5CB420E0,0xA7BD22AC,0x5A82799A,0xA57D8666,0x5842DD54,0xA34BDF20,0x55F5A4D2,
+0xA1288376,0x539B2AF0,0x9F13C7D0,0x5133CC94,0x9D0DFE54,0x4EBFE8A5,0x9B1776DA,
+0x4C3FDFF4,0x99307EE0,0x49B41533,0x9759617F,0x471CECE7,0x9592675C,0x447ACD50,
+0x93DBD6A0,0x41CE1E65,0x9235F2EC,0x3F1749B8,0x90A0FD4E,0x3C56BA70,0x8F1D343A,
+0x398CDD32,0x8DAAD37B,0x36BA2014,0x8C4A142F,0x33DEF287,0x8AFB2CBB,0x30FBC54D,
+0x89BE50C3,0x2E110A62,0x8893B125,0x2B1F34EB,0x877B7BEC,0x2826B928,0x8675DC4F,
+0x25280C5E,0x8582FAA5,0x2223A4C5,0x84A2FC62,0x1F19F97B,0x83D60412,0x1C0B826A,
+0x831C314E,0x18F8B83C,0x8275A0C0,0x15E21445,0x81E26C16,0x12C8106F,0x8162AA04,
+0x0FAB272B,0x80F66E3C,0x0C8BD35E,0x809DC971,0x096A9049,0x8058C94C,0x0647D97C,
+0x80277872,0x03242ABF,0x8009DE7E,0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2,
+0x7D8A5F40,0xE70747C4,0x7A7D055B,0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6,
+0xC3A94590,0x6A6D98A4,0xB8E31319,0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666,
+0x5133CC94,0x9D0DFE54,0x471CECE7,0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D,
+0x89BE50C3,0x25280C5E,0x8582FAA5,0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971,
+0x7FFFFFFF,0x00000000,0x7641AF3D,0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,
+0x89BE50C3,};
+
+q31_t rearranged_twiddle_stride2_1024_q31[680]={
+0x7FFFFFFF,0x00000000,0x7FFD885A,0xFE6DE2E0,0x7FF62182,0xFCDBD541,0x7FE9CBC0,
+0xFB49E6A3,0x7FD8878E,0xF9B82684,0x7FC25596,0xF826A462,0x7FA736B4,0xF6956FB7,
+0x7F872BF3,0xF50497FB,0x7F62368F,0xF3742CA2,0x7F3857F6,0xF1E43D1C,0x7F0991C4,
+0xF054D8D5,0x7ED5E5C6,0xEEC60F31,0x7E9D55FC,0xED37EF91,0x7E5FE493,0xEBAA894F,
+0x7E1D93EA,0xEA1DEBBB,0x7DD6668F,0xE8922622,0x7D8A5F40,0xE70747C4,0x7D3980EC,
+0xE57D5FDA,0x7CE3CEB2,0xE3F47D96,0x7C894BDE,0xE26CB01B,0x7C29FBEE,0xE0E60685,
+0x7BC5E290,0xDF608FE4,0x7B5D039E,0xDDDC5B3B,0x7AEF6323,0xDC597781,0x7A7D055B,
+0xDAD7F3A2,0x7A05EEAD,0xD957DE7A,0x798A23B1,0xD7D946D8,0x7909A92D,0xD65C3B7B,
+0x78848414,0xD4E0CB15,0x77FAB989,0xD3670446,0x776C4EDB,0xD1EEF59E,0x76D94989,
+0xD078AD9E,0x7641AF3D,0xCF043AB3,0x75A585CF,0xCD91AB39,0x7504D345,0xCC210D79,
+0x745F9DD1,0xCAB26FA9,0x73B5EBD1,0xC945DFEC,0x7307C3D0,0xC7DB6C50,0x72552C85,
+0xC67322CE,0x719E2CD2,0xC50D1149,0x70E2CBC6,0xC3A94590,0x7023109A,0xC247CD5A,
+0x6F5F02B2,0xC0E8B648,0x6E96A99D,0xBF8C0DE3,0x6DCA0D14,0xBE31E19B,0x6CF934FC,
+0xBCDA3ECB,0x6C242960,0xBB8532B0,0x6B4AF279,0xBA32CA71,0x6A6D98A4,0xB8E31319,
+0x698C246C,0xB796199B,0x68A69E81,0xB64BEACD,0x67BD0FBD,0xB5049368,0x66CF8120,
+0xB3C0200C,0x65DDFBD3,0xB27E9D3C,0x64E88926,0xB140175B,0x63EF3290,0xB0049AB3,
+0x62F201AC,0xAECC336C,0x61F1003F,0xAD96ED92,0x60EC3830,0xAC64D510,0x5FE3B38D,
+0xAB35F5B5,0x5ED77C8A,0xAA0A5B2E,0x5DC79D7C,0xA8E21106,0x5CB420E0,0xA7BD22AC,
+0x5B9D1154,0xA69B9B68,0x5A82799A,0xA57D8666,0x59646498,0xA462EEAC,0x5842DD54,
+0xA34BDF20,0x571DEEFA,0xA2386284,0x55F5A4D2,0xA1288376,0x54CA0A4B,0xA01C4C73,
+0x539B2AF0,0x9F13C7D0,0x5269126E,0x9E0EFFC1,0x5133CC94,0x9D0DFE54,0x4FFB654D,
+0x9C10CD70,0x4EBFE8A5,0x9B1776DA,0x4D8162C4,0x9A22042D,0x4C3FDFF4,0x99307EE0,
+0x4AFB6C98,0x9842F043,0x49B41533,0x9759617F,0x4869E665,0x9673DB94,0x471CECE7,
+0x9592675C,0x45CD358F,0x94B50D87,0x447ACD50,0x93DBD6A0,0x4325C135,0x9306CB04,
+0x41CE1E65,0x9235F2EC,0x4073F21D,0x91695663,0x3F1749B8,0x90A0FD4E,0x3DB832A6,
+0x8FDCEF66,0x3C56BA70,0x8F1D343A,0x3AF2EEB7,0x8E61D32E,0x398CDD32,0x8DAAD37B,
+0x382493B0,0x8CF83C30,0x36BA2014,0x8C4A142F,0x354D9057,0x8BA0622F,0x33DEF287,
+0x8AFB2CBB,0x326E54C7,0x8A5A7A31,0x30FBC54D,0x89BE50C3,0x2F875262,0x8926B677,
+0x2E110A62,0x8893B125,0x2C98FBBA,0x88054677,0x2B1F34EB,0x877B7BEC,0x29A3C485,
+0x86F656D3,0x2826B928,0x8675DC4F,0x26A82186,0x85FA1153,0x25280C5E,0x8582FAA5,
+0x23A6887F,0x85109CDD,0x2223A4C5,0x84A2FC62,0x209F701C,0x843A1D70,0x1F19F97B,
+0x83D60412,0x1D934FE5,0x8376B422,0x1C0B826A,0x831C314E,0x1A82A026,0x82C67F14,
+0x18F8B83C,0x8275A0C0,0x176DD9DE,0x82299971,0x15E21445,0x81E26C16,0x145576B1,
+0x81A01B6D,0x12C8106F,0x8162AA04,0x1139F0CF,0x812A1A3A,0x0FAB272B,0x80F66E3C,
+0x0E1BC2E4,0x80C7A80A,0x0C8BD35E,0x809DC971,0x0AFB6805,0x8078D40D,0x096A9049,
+0x8058C94C,0x07D95B9E,0x803DAA6A,0x0647D97C,0x80277872,0x04B6195D,0x80163440,
+0x03242ABF,0x8009DE7E,0x01921D20,0x800277A6,0x00000000,0x80000000,0xFE6DE2E0,
+0x800277A6,0xFCDBD541,0x8009DE7E,0xFB49E6A3,0x80163440,0xF9B82684,0x80277872,
+0xF826A462,0x803DAA6A,0xF6956FB7,0x8058C94C,0xF50497FB,0x8078D40D,0xF3742CA2,
+0x809DC971,0xF1E43D1C,0x80C7A80A,0xF054D8D5,0x80F66E3C,0xEEC60F31,0x812A1A3A,
+0xED37EF91,0x8162AA04,0xEBAA894F,0x81A01B6D,0xEA1DEBBB,0x81E26C16,0xE8922622,
+0x82299971,0xE70747C4,0x8275A0C0,0xE57D5FDA,0x82C67F14,0xE3F47D96,0x831C314E,
+0xE26CB01B,0x8376B422,0xE0E60685,0x83D60412,0xDF608FE4,0x843A1D70,0xDDDC5B3B,
+0x84A2FC62,0xDC597781,0x85109CDD,0xDAD7F3A2,0x8582FAA5,0xD957DE7A,0x85FA1153,
+0xD7D946D8,0x8675DC4F,0xD65C3B7B,0x86F656D3,0xD4E0CB15,0x877B7BEC,0xD3670446,
+0x88054677,0xD1EEF59E,0x8893B125,0xD078AD9E,0x8926B677,0xCF043AB3,0x89BE50C3,
+0xCD91AB39,0x8A5A7A31,0xCC210D79,0x8AFB2CBB,0xCAB26FA9,0x8BA0622F,0xC945DFEC,
+0x8C4A142F,0xC7DB6C50,0x8CF83C30,0xC67322CE,0x8DAAD37B,0xC50D1149,0x8E61D32E,
+0xC3A94590,0x8F1D343A,0xC247CD5A,0x8FDCEF66,0xC0E8B648,0x90A0FD4E,0xBF8C0DE3,
+0x91695663,0xBE31E19B,0x9235F2EC,0xBCDA3ECB,0x9306CB04,0xBB8532B0,0x93DBD6A0,
+0xBA32CA71,0x94B50D87,0xB8E31319,0x9592675C,0xB796199B,0x9673DB94,0xB64BEACD,
+0x9759617F,0xB5049368,0x9842F043,0xB3C0200C,0x99307EE0,0xB27E9D3C,0x9A22042D,
+0xB140175B,0x9B1776DA,0xB0049AB3,0x9C10CD70,0xAECC336C,0x9D0DFE54,0xAD96ED92,
+0x9E0EFFC1,0xAC64D510,0x9F13C7D0,0xAB35F5B5,0xA01C4C73,0xAA0A5B2E,0xA1288376,
+0xA8E21106,0xA2386284,0xA7BD22AC,0xA34BDF20,0xA69B9B68,0xA462EEAC,0xA57D8666,
+0xA57D8666,0xA462EEAC,0xA69B9B68,0xA34BDF20,0xA7BD22AC,0xA2386284,0xA8E21106,
+0xA1288376,0xAA0A5B2E,0xA01C4C73,0xAB35F5B5,0x9F13C7D0,0xAC64D510,0x9E0EFFC1,
+0xAD96ED92,0x9D0DFE54,0xAECC336C,0x9C10CD70,0xB0049AB3,0x9B1776DA,0xB140175B,
+0x9A22042D,0xB27E9D3C,0x99307EE0,0xB3C0200C,0x9842F043,0xB5049368,0x9759617F,
+0xB64BEACD,0x9673DB94,0xB796199B,0x9592675C,0xB8E31319,0x94B50D87,0xBA32CA71,
+0x93DBD6A0,0xBB8532B0,0x9306CB04,0xBCDA3ECB,0x9235F2EC,0xBE31E19B,0x91695663,
+0xBF8C0DE3,0x90A0FD4E,0xC0E8B648,0x8FDCEF66,0xC247CD5A,0x8F1D343A,0xC3A94590,
+0x8E61D32E,0xC50D1149,0x8DAAD37B,0xC67322CE,0x8CF83C30,0xC7DB6C50,0x8C4A142F,
+0xC945DFEC,0x8BA0622F,0xCAB26FA9,0x8AFB2CBB,0xCC210D79,0x8A5A7A31,0xCD91AB39,
+0x89BE50C3,0xCF043AB3,0x8926B677,0xD078AD9E,0x8893B125,0xD1EEF59E,0x88054677,
+0xD3670446,0x877B7BEC,0xD4E0CB15,0x86F656D3,0xD65C3B7B,0x8675DC4F,0xD7D946D8,
+0x85FA1153,0xD957DE7A,0x8582FAA5,0xDAD7F3A2,0x85109CDD,0xDC597781,0x84A2FC62,
+0xDDDC5B3B,0x843A1D70,0xDF608FE4,0x83D60412,0xE0E60685,0x8376B422,0xE26CB01B,
+0x831C314E,0xE3F47D96,0x82C67F14,0xE57D5FDA,0x8275A0C0,0xE70747C4,0x82299971,
+0xE8922622,0x81E26C16,0xEA1DEBBB,0x81A01B6D,0xEBAA894F,0x8162AA04,0xED37EF91,
+0x812A1A3A,0xEEC60F31,0x80F66E3C,0xF054D8D5,0x80C7A80A,0xF1E43D1C,0x809DC971,
+0xF3742CA2,0x8078D40D,0xF50497FB,0x8058C94C,0xF6956FB7,0x803DAA6A,0xF826A462,
+0x80277872,0xF9B82684,0x80163440,0xFB49E6A3,0x8009DE7E,0xFCDBD541,0x800277A6,
+0xFE6DE2E0,0x7FFFFFFF,0x00000000,0x7FD8878E,0xF9B82684,0x7F62368F,0xF3742CA2,
+0x7E9D55FC,0xED37EF91,0x7D8A5F40,0xE70747C4,0x7C29FBEE,0xE0E60685,0x7A7D055B,
+0xDAD7F3A2,0x78848414,0xD4E0CB15,0x7641AF3D,0xCF043AB3,0x73B5EBD1,0xC945DFEC,
+0x70E2CBC6,0xC3A94590,0x6DCA0D14,0xBE31E19B,0x6A6D98A4,0xB8E31319,0x66CF8120,
+0xB3C0200C,0x62F201AC,0xAECC336C,0x5ED77C8A,0xAA0A5B2E,0x5A82799A,0xA57D8666,
+0x55F5A4D2,0xA1288376,0x5133CC94,0x9D0DFE54,0x4C3FDFF4,0x99307EE0,0x471CECE7,
+0x9592675C,0x41CE1E65,0x9235F2EC,0x3C56BA70,0x8F1D343A,0x36BA2014,0x8C4A142F,
+0x30FBC54D,0x89BE50C3,0x2B1F34EB,0x877B7BEC,0x25280C5E,0x8582FAA5,0x1F19F97B,
+0x83D60412,0x18F8B83C,0x8275A0C0,0x12C8106F,0x8162AA04,0x0C8BD35E,0x809DC971,
+0x0647D97C,0x80277872,0x00000000,0x80000000,0xF9B82684,0x80277872,0xF3742CA2,
+0x809DC971,0xED37EF91,0x8162AA04,0xE70747C4,0x8275A0C0,0xE0E60685,0x83D60412,
+0xDAD7F3A2,0x8582FAA5,0xD4E0CB15,0x877B7BEC,0xCF043AB3,0x89BE50C3,0xC945DFEC,
+0x8C4A142F,0xC3A94590,0x8F1D343A,0xBE31E19B,0x9235F2EC,0xB8E31319,0x9592675C,
+0xB3C0200C,0x99307EE0,0xAECC336C,0x9D0DFE54,0xAA0A5B2E,0xA1288376,0xA57D8666,
+0xA57D8666,0xA1288376,0xAA0A5B2E,0x9D0DFE54,0xAECC336C,0x99307EE0,0xB3C0200C,
+0x9592675C,0xB8E31319,0x9235F2EC,0xBE31E19B,0x8F1D343A,0xC3A94590,0x8C4A142F,
+0xC945DFEC,0x89BE50C3,0xCF043AB3,0x877B7BEC,0xD4E0CB15,0x8582FAA5,0xDAD7F3A2,
+0x83D60412,0xE0E60685,0x8275A0C0,0xE70747C4,0x8162AA04,0xED37EF91,0x809DC971,
+0xF3742CA2,0x80277872,0xF9B82684,0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4,
+0x7641AF3D,0xCF043AB3,0x6A6D98A4,0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7,
+0x9592675C,0x30FBC54D,0x89BE50C3,0x18F8B83C,0x8275A0C0,0x00000000,0x80000000,
+0xE70747C4,0x8275A0C0,0xCF043AB3,0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666,
+0xA57D8666,0x9592675C,0xB8E31319,0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4,
+0x7FFFFFFF,0x00000000,0x5A82799A,0xA57D8666,0x00000000,0x80000000,0xA57D8666,
+0xA57D8666,};
+
+q31_t rearranged_twiddle_stride3_1024_q31[680]={
+0x7FFFFFFF,0x00000000,0x7FFA72D1,0xFDA4D929,0x7FE9CBC0,0xFB49E6A3,0x7FCE0C3E,
+0xF8EF5CBB,0x7FA736B4,0xF6956FB7,0x7F754E80,0xF43C53CB,0x7F3857F6,0xF1E43D1C,
+0x7EF05860,0xEF8D5FB8,0x7E9D55FC,0xED37EF91,0x7E3F57FF,0xEAE4207A,0x7DD6668F,
+0xE8922622,0x7D628AC6,0xE642340D,0x7CE3CEB2,0xE3F47D96,0x7C5A3D50,0xE1A935E2,
+0x7BC5E290,0xDF608FE4,0x7B26CB4F,0xDD1ABE51,0x7A7D055B,0xDAD7F3A2,0x79C89F6E,
+0xD898620C,0x7909A92D,0xD65C3B7B,0x78403329,0xD423B191,0x776C4EDB,0xD1EEF59E,
+0x768E0EA6,0xCFBE389F,0x75A585CF,0xCD91AB39,0x74B2C884,0xCB697DB0,0x73B5EBD1,
+0xC945DFEC,0x72AF05A7,0xC727016D,0x719E2CD2,0xC50D1149,0x708378FF,0xC2F83E2A,
+0x6F5F02B2,0xC0E8B648,0x6E30E34A,0xBEDEA765,0x6CF934FC,0xBCDA3ECB,0x6BB812D1,
+0xBADBA943,0x6A6D98A4,0xB8E31319,0x6919E320,0xB6F0A812,0x67BD0FBD,0xB5049368,
+0x66573CBB,0xB31EFFCC,0x64E88926,0xB140175B,0x637114CC,0xAF6803A2,0x61F1003F,
+0xAD96ED92,0x60686CCF,0xABCCFD83,0x5ED77C8A,0xAA0A5B2E,0x5D3E5237,0xA84F2DAA,
+0x5B9D1154,0xA69B9B68,0x59F3DE12,0xA4EFCA31,0x5842DD54,0xA34BDF20,0x568A34A9,
+0xA1AFFEA3,0x54CA0A4B,0xA01C4C73,0x53028518,0x9E90EB94,0x5133CC94,0x9D0DFE54,
+0x4F5E08E3,0x9B93A641,0x4D8162C4,0x9A22042D,0x4B9E0390,0x98B93828,0x49B41533,
+0x9759617F,0x47C3C22F,0x96029EB6,0x45CD358F,0x94B50D87,0x43D09AED,0x9370CAE4,
+0x41CE1E65,0x9235F2EC,0x3FC5EC98,0x9104A0EE,0x3DB832A6,0x8FDCEF66,0x3BA51E29,
+0x8EBEF7FB,0x398CDD32,0x8DAAD37B,0x376F9E46,0x8CA099DA,0x354D9057,0x8BA0622F,
+0x3326E2C3,0x8AAA42B4,0x30FBC54D,0x89BE50C3,0x2ECC681E,0x88DCA0D3,0x2C98FBBA,
+0x88054677,0x2A61B101,0x8738545E,0x2826B928,0x8675DC4F,0x25E845B6,0x85BDEF28,
+0x23A6887F,0x85109CDD,0x2161B3A0,0x846DF477,0x1F19F97B,0x83D60412,0x1CCF8CB3,
+0x8348D8DC,0x1A82A026,0x82C67F14,0x183366E9,0x824F0208,0x15E21445,0x81E26C16,
+0x138EDBB1,0x8180C6A9,0x1139F0CF,0x812A1A3A,0x0EE38766,0x80DE6E4C,0x0C8BD35E,
+0x809DC971,0x0A3308BD,0x80683143,0x07D95B9E,0x803DAA6A,0x057F0035,0x801E3895,
+0x03242ABF,0x8009DE7E,0x00C90F88,0x80009DEA,0xFE6DE2E0,0x800277A6,0xFC12D91A,
+0x800F6B88,0xF9B82684,0x80277872,0xF75DFF66,0x804A9C4D,0xF50497FB,0x8078D40D,
+0xF2AC246E,0x80B21BAF,0xF054D8D5,0x80F66E3C,0xEDFEE92B,0x8145C5C7,0xEBAA894F,
+0x81A01B6D,0xE957ECFB,0x82056758,0xE70747C4,0x8275A0C0,0xE4B8CD11,0x82F0BDE8,
+0xE26CB01B,0x8376B422,0xE02323E5,0x840777D0,0xDDDC5B3B,0x84A2FC62,0xDB9888A8,
+0x8549345C,0xD957DE7A,0x85FA1153,0xD71A8EB5,0x86B583EE,0xD4E0CB15,0x877B7BEC,
+0xD2AAC504,0x884BE821,0xD078AD9E,0x8926B677,0xCE4AB5A2,0x8A0BD3F5,0xCC210D79,
+0x8AFB2CBB,0xC9FBE527,0x8BF4AC05,0xC7DB6C50,0x8CF83C30,0xC5BFD22E,0x8E05C6B7,
+0xC3A94590,0x8F1D343A,0xC197F4D4,0x903E6C7B,0xBF8C0DE3,0x91695663,0xBD85BE30,
+0x929DD806,0xBB8532B0,0x93DBD6A0,0xB98A97D8,0x9523369C,0xB796199B,0x9673DB94,
+0xB5A7E362,0x97CDA855,0xB3C0200C,0x99307EE0,0xB1DEF9E9,0x9A9C406E,0xB0049AB3,
+0x9C10CD70,0xAE312B92,0x9D8E0597,0xAC64D510,0x9F13C7D0,0xAA9FBF1E,0xA0A1F24D,
+0xA8E21106,0xA2386284,0xA72BF174,0xA3D6F534,0xA57D8666,0xA57D8666,0xA3D6F534,
+0xA72BF174,0xA2386284,0xA8E21106,0xA0A1F24D,0xAA9FBF1E,0x9F13C7D0,0xAC64D510,
+0x9D8E0597,0xAE312B92,0x9C10CD70,0xB0049AB3,0x9A9C406E,0xB1DEF9E9,0x99307EE0,
+0xB3C0200C,0x97CDA855,0xB5A7E362,0x9673DB94,0xB796199B,0x9523369C,0xB98A97D8,
+0x93DBD6A0,0xBB8532B0,0x929DD806,0xBD85BE30,0x91695663,0xBF8C0DE3,0x903E6C7B,
+0xC197F4D4,0x8F1D343A,0xC3A94590,0x8E05C6B7,0xC5BFD22E,0x8CF83C30,0xC7DB6C50,
+0x8BF4AC05,0xC9FBE527,0x8AFB2CBB,0xCC210D79,0x8A0BD3F5,0xCE4AB5A2,0x8926B677,
+0xD078AD9E,0x884BE821,0xD2AAC504,0x877B7BEC,0xD4E0CB15,0x86B583EE,0xD71A8EB5,
+0x85FA1153,0xD957DE7A,0x8549345C,0xDB9888A8,0x84A2FC62,0xDDDC5B3B,0x840777D0,
+0xE02323E5,0x8376B422,0xE26CB01B,0x82F0BDE8,0xE4B8CD11,0x8275A0C0,0xE70747C4,
+0x82056758,0xE957ECFB,0x81A01B6D,0xEBAA894F,0x8145C5C7,0xEDFEE92B,0x80F66E3C,
+0xF054D8D5,0x80B21BAF,0xF2AC246E,0x8078D40D,0xF50497FB,0x804A9C4D,0xF75DFF66,
+0x80277872,0xF9B82684,0x800F6B88,0xFC12D91A,0x800277A6,0xFE6DE2E0,0x80009DEA,
+0x00C90F88,0x8009DE7E,0x03242ABF,0x801E3895,0x057F0035,0x803DAA6A,0x07D95B9E,
+0x80683143,0x0A3308BD,0x809DC971,0x0C8BD35E,0x80DE6E4C,0x0EE38766,0x812A1A3A,
+0x1139F0CF,0x8180C6A9,0x138EDBB1,0x81E26C16,0x15E21445,0x824F0208,0x183366E9,
+0x82C67F14,0x1A82A026,0x8348D8DC,0x1CCF8CB3,0x83D60412,0x1F19F97B,0x846DF477,
+0x2161B3A0,0x85109CDD,0x23A6887F,0x85BDEF28,0x25E845B6,0x8675DC4F,0x2826B928,
+0x8738545E,0x2A61B101,0x88054677,0x2C98FBBA,0x88DCA0D3,0x2ECC681E,0x89BE50C3,
+0x30FBC54D,0x8AAA42B4,0x3326E2C3,0x8BA0622F,0x354D9057,0x8CA099DA,0x376F9E46,
+0x8DAAD37B,0x398CDD32,0x8EBEF7FB,0x3BA51E29,0x8FDCEF66,0x3DB832A6,0x9104A0EE,
+0x3FC5EC98,0x9235F2EC,0x41CE1E65,0x9370CAE4,0x43D09AED,0x94B50D87,0x45CD358F,
+0x96029EB6,0x47C3C22F,0x9759617F,0x49B41533,0x98B93828,0x4B9E0390,0x9A22042D,
+0x4D8162C4,0x9B93A641,0x4F5E08E3,0x9D0DFE54,0x5133CC94,0x9E90EB94,0x53028518,
+0xA01C4C73,0x54CA0A4B,0xA1AFFEA3,0x568A34A9,0xA34BDF20,0x5842DD54,0xA4EFCA31,
+0x59F3DE12,0xA69B9B68,0x5B9D1154,0xA84F2DAA,0x5D3E5237,0xAA0A5B2E,0x5ED77C8A,
+0xABCCFD83,0x60686CCF,0xAD96ED92,0x61F1003F,0xAF6803A2,0x637114CC,0xB140175B,
+0x64E88926,0xB31EFFCC,0x66573CBB,0xB5049368,0x67BD0FBD,0xB6F0A812,0x6919E320,
+0xB8E31319,0x6A6D98A4,0xBADBA943,0x6BB812D1,0xBCDA3ECB,0x6CF934FC,0xBEDEA765,
+0x6E30E34A,0xC0E8B648,0x6F5F02B2,0xC2F83E2A,0x708378FF,0xC50D1149,0x719E2CD2,
+0xC727016D,0x72AF05A7,0xC945DFEC,0x73B5EBD1,0xCB697DB0,0x74B2C884,0xCD91AB39,
+0x75A585CF,0xCFBE389F,0x768E0EA6,0xD1EEF59E,0x776C4EDB,0xD423B191,0x78403329,
+0xD65C3B7B,0x7909A92D,0xD898620C,0x79C89F6E,0xDAD7F3A2,0x7A7D055B,0xDD1ABE51,
+0x7B26CB4F,0xDF608FE4,0x7BC5E290,0xE1A935E2,0x7C5A3D50,0xE3F47D96,0x7CE3CEB2,
+0xE642340D,0x7D628AC6,0xE8922622,0x7DD6668F,0xEAE4207A,0x7E3F57FF,0xED37EF91,
+0x7E9D55FC,0xEF8D5FB8,0x7EF05860,0xF1E43D1C,0x7F3857F6,0xF43C53CB,0x7F754E80,
+0xF6956FB7,0x7FA736B4,0xF8EF5CBB,0x7FCE0C3E,0xFB49E6A3,0x7FE9CBC0,0xFDA4D929,
+0x7FFA72D1,0x7FFFFFFF,0x00000000,0x7FA736B4,0xF6956FB7,0x7E9D55FC,0xED37EF91,
+0x7CE3CEB2,0xE3F47D96,0x7A7D055B,0xDAD7F3A2,0x776C4EDB,0xD1EEF59E,0x73B5EBD1,
+0xC945DFEC,0x6F5F02B2,0xC0E8B648,0x6A6D98A4,0xB8E31319,0x64E88926,0xB140175B,
+0x5ED77C8A,0xAA0A5B2E,0x5842DD54,0xA34BDF20,0x5133CC94,0x9D0DFE54,0x49B41533,
+0x9759617F,0x41CE1E65,0x9235F2EC,0x398CDD32,0x8DAAD37B,0x30FBC54D,0x89BE50C3,
+0x2826B928,0x8675DC4F,0x1F19F97B,0x83D60412,0x15E21445,0x81E26C16,0x0C8BD35E,
+0x809DC971,0x03242ABF,0x8009DE7E,0xF9B82684,0x80277872,0xF054D8D5,0x80F66E3C,
+0xE70747C4,0x8275A0C0,0xDDDC5B3B,0x84A2FC62,0xD4E0CB15,0x877B7BEC,0xCC210D79,
+0x8AFB2CBB,0xC3A94590,0x8F1D343A,0xBB8532B0,0x93DBD6A0,0xB3C0200C,0x99307EE0,
+0xAC64D510,0x9F13C7D0,0xA57D8666,0xA57D8666,0x9F13C7D0,0xAC64D510,0x99307EE0,
+0xB3C0200C,0x93DBD6A0,0xBB8532B0,0x8F1D343A,0xC3A94590,0x8AFB2CBB,0xCC210D79,
+0x877B7BEC,0xD4E0CB15,0x84A2FC62,0xDDDC5B3B,0x8275A0C0,0xE70747C4,0x80F66E3C,
+0xF054D8D5,0x80277872,0xF9B82684,0x8009DE7E,0x03242ABF,0x809DC971,0x0C8BD35E,
+0x81E26C16,0x15E21445,0x83D60412,0x1F19F97B,0x8675DC4F,0x2826B928,0x89BE50C3,
+0x30FBC54D,0x8DAAD37B,0x398CDD32,0x9235F2EC,0x41CE1E65,0x9759617F,0x49B41533,
+0x9D0DFE54,0x5133CC94,0xA34BDF20,0x5842DD54,0xAA0A5B2E,0x5ED77C8A,0xB140175B,
+0x64E88926,0xB8E31319,0x6A6D98A4,0xC0E8B648,0x6F5F02B2,0xC945DFEC,0x73B5EBD1,
+0xD1EEF59E,0x776C4EDB,0xDAD7F3A2,0x7A7D055B,0xE3F47D96,0x7CE3CEB2,0xED37EF91,
+0x7E9D55FC,0xF6956FB7,0x7FA736B4,0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2,
+0x6A6D98A4,0xB8E31319,0x5133CC94,0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E,
+0x809DC971,0xE70747C4,0x8275A0C0,0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666,
+0x8F1D343A,0xC3A94590,0x8275A0C0,0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3,
+0x30FBC54D,0x9D0DFE54,0x5133CC94,0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B,
+0x7FFFFFFF,0x00000000,0x30FBC54D,0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,
+0x30FBC54D,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q31_8192)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_4096_q31[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_4096_q31[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_4096_q31[6]={
+0,2048,2560,2688,2720,0,};
+
+q31_t rearranged_twiddle_stride1_4096_q31[2728]={
+0x7FFFFFFF,0x00000000,0x7FFFF621,0xFFCDBC0B,0x7FFFD886,0xFF9B781D,0x7FFFA72C,
+0xFF69343F,0x7FFF6216,0xFF36F078,0x7FFF0943,0xFF04ACD0,0x7FFE9CB2,0xFED2694F,
+0x7FFE1C65,0xFEA025FD,0x7FFD885A,0xFE6DE2E0,0x7FFCE093,0xFE3BA002,0x7FFC250F,
+0xFE095D69,0x7FFB55CE,0xFDD71B1E,0x7FFA72D1,0xFDA4D929,0x7FF97C18,0xFD729790,
+0x7FF871A2,0xFD40565C,0x7FF75370,0xFD0E1594,0x7FF62182,0xFCDBD541,0x7FF4DBD9,
+0xFCA9956A,0x7FF38274,0xFC775616,0x7FF21553,0xFC45174E,0x7FF09478,0xFC12D91A,
+0x7FEEFFE1,0xFBE09B80,0x7FED5791,0xFBAE5E89,0x7FEB9B85,0xFB7C223D,0x7FE9CBC0,
+0xFB49E6A3,0x7FE7E841,0xFB17ABC2,0x7FE5F108,0xFAE571A4,0x7FE3E616,0xFAB3384F,
+0x7FE1C76B,0xFA80FFCB,0x7FDF9508,0xFA4EC821,0x7FDD4EEC,0xFA1C9157,0x7FDAF519,
+0xF9EA5B75,0x7FD8878E,0xF9B82684,0x7FD6064C,0xF985F28A,0x7FD37153,0xF953BF91,
+0x7FD0C8A3,0xF9218D9E,0x7FCE0C3E,0xF8EF5CBB,0x7FCB3C23,0xF8BD2CEF,0x7FC85854,
+0xF88AFE42,0x7FC560CF,0xF858D0BB,0x7FC25596,0xF826A462,0x7FBF36AA,0xF7F4793E,
+0x7FBC040A,0xF7C24F59,0x7FB8BDB8,0xF79026B9,0x7FB563B3,0xF75DFF66,0x7FB1F5FC,
+0xF72BD967,0x7FAE7495,0xF6F9B4C6,0x7FAADF7C,0xF6C79188,0x7FA736B4,0xF6956FB7,
+0x7FA37A3C,0xF6634F59,0x7F9FAA15,0xF6313077,0x7F9BC640,0xF5FF1318,0x7F97CEBD,
+0xF5CCF743,0x7F93C38C,0xF59ADD02,0x7F8FA4B0,0xF568C45B,0x7F8B7227,0xF536AD56,
+0x7F872BF3,0xF50497FB,0x7F82D214,0xF4D28451,0x7F7E648C,0xF4A07261,0x7F79E35A,
+0xF46E6231,0x7F754E80,0xF43C53CB,0x7F70A5FE,0xF40A4735,0x7F6BE9D4,0xF3D83C77,
+0x7F671A05,0xF3A63398,0x7F62368F,0xF3742CA2,0x7F5D3F75,0xF342279B,0x7F5834B7,
+0xF310248A,0x7F531655,0xF2DE2379,0x7F4DE451,0xF2AC246E,0x7F489EAA,0xF27A2771,
+0x7F434563,0xF2482C8A,0x7F3DD87C,0xF21633C0,0x7F3857F6,0xF1E43D1C,0x7F32C3D1,
+0xF1B248A5,0x7F2D1C0E,0xF1805662,0x7F2760AF,0xF14E665C,0x7F2191B4,0xF11C789A,
+0x7F1BAF1E,0xF0EA8D24,0x7F15B8EE,0xF0B8A401,0x7F0FAF25,0xF086BD39,0x7F0991C4,
+0xF054D8D5,0x7F0360CB,0xF022F6DA,0x7EFD1C3C,0xEFF11753,0x7EF6C418,0xEFBF3A45,
+0x7EF05860,0xEF8D5FB8,0x7EE9D914,0xEF5B87B5,0x7EE34636,0xEF29B243,0x7EDC9FC6,
+0xEEF7DF6A,0x7ED5E5C6,0xEEC60F31,0x7ECF1837,0xEE9441A0,0x7EC8371A,0xEE6276BF,
+0x7EC14270,0xEE30AE96,0x7EBA3A39,0xEDFEE92B,0x7EB31E78,0xEDCD2687,0x7EABEF2C,
+0xED9B66B2,0x7EA4AC58,0xED69A9B3,0x7E9D55FC,0xED37EF91,0x7E95EC1A,0xED063856,
+0x7E8E6EB2,0xECD48407,0x7E86DDC6,0xECA2D2AD,0x7E7F3957,0xEC71244F,0x7E778166,
+0xEC3F78F6,0x7E6FB5F4,0xEC0DD0A8,0x7E67D703,0xEBDC2B6E,0x7E5FE493,0xEBAA894F,
+0x7E57DEA7,0xEB78EA52,0x7E4FC53E,0xEB474E81,0x7E47985B,0xEB15B5E1,0x7E3F57FF,
+0xEAE4207A,0x7E37042A,0xEAB28E56,0x7E2E9CDF,0xEA80FF7A,0x7E26221F,0xEA4F73EE,
+0x7E1D93EA,0xEA1DEBBB,0x7E14F242,0xE9EC66E8,0x7E0C3D29,0xE9BAE57D,0x7E0374A0,
+0xE9896781,0x7DFA98A8,0xE957ECFB,0x7DF1A942,0xE92675F4,0x7DE8A670,0xE8F50273,
+0x7DDF9034,0xE8C39280,0x7DD6668F,0xE8922622,0x7DCD2981,0xE860BD61,0x7DC3D90D,
+0xE82F5844,0x7DBA7534,0xE7FDF6D4,0x7DB0FDF8,0xE7CC9917,0x7DA77359,0xE79B3F16,
+0x7D9DD55A,0xE769E8D8,0x7D9423FC,0xE7389665,0x7D8A5F40,0xE70747C4,0x7D808728,
+0xE6D5FCFC,0x7D769BB5,0xE6A4B616,0x7D6C9CE9,0xE6737319,0x7D628AC6,0xE642340D,
+0x7D58654D,0xE610F8F9,0x7D4E2C7F,0xE5DFC1E5,0x7D43E05E,0xE5AE8ED8,0x7D3980EC,
+0xE57D5FDA,0x7D2F0E2B,0xE54C34F3,0x7D24881B,0xE51B0E2A,0x7D19EEBF,0xE4E9EB87,
+0x7D0F4218,0xE4B8CD11,0x7D048228,0xE487B2D0,0x7CF9AEF0,0xE4569CCB,0x7CEEC873,
+0xE4258B0A,0x7CE3CEB2,0xE3F47D96,0x7CD8C1AE,0xE3C37474,0x7CCDA169,0xE3926FAD,
+0x7CC26DE5,0xE3616F48,0x7CB72724,0xE330734D,0x7CABCD28,0xE2FF7BC3,0x7CA05FF1,
+0xE2CE88B3,0x7C94DF83,0xE29D9A23,0x7C894BDE,0xE26CB01B,0x7C7DA505,0xE23BCAA2,
+0x7C71EAF9,0xE20AE9C1,0x7C661DBC,0xE1DA0D7E,0x7C5A3D50,0xE1A935E2,0x7C4E49B7,
+0xE17862F3,0x7C4242F2,0xE14794BA,0x7C362904,0xE116CB3D,0x7C29FBEE,0xE0E60685,
+0x7C1DBBB3,0xE0B54698,0x7C116853,0xE0848B7F,0x7C0501D2,0xE053D541,0x7BF88830,
+0xE02323E5,0x7BEBFB70,0xDFF27773,0x7BDF5B94,0xDFC1CFF3,0x7BD2A89E,0xDF912D6B,
+0x7BC5E290,0xDF608FE4,0x7BB9096B,0xDF2FF764,0x7BAC1D31,0xDEFF63F4,0x7B9F1DE6,
+0xDECED59B,0x7B920B89,0xDE9E4C60,0x7B84E61F,0xDE6DC84B,0x7B77ADA8,0xDE3D4964,
+0x7B6A6227,0xDE0CCFB1,0x7B5D039E,0xDDDC5B3B,0x7B4F920E,0xDDABEC08,0x7B420D7A,
+0xDD7B8220,0x7B3475E5,0xDD4B1D8C,0x7B26CB4F,0xDD1ABE51,0x7B190DBC,0xDCEA6478,
+0x7B0B3D2C,0xDCBA1008,0x7AFD59A4,0xDC89C109,0x7AEF6323,0xDC597781,0x7AE159AE,
+0xDC293379,0x7AD33D45,0xDBF8F4F8,0x7AC50DEC,0xDBC8BC06,0x7AB6CBA4,0xDB9888A8,
+0x7AA8766F,0xDB685AE9,0x7A9A0E50,0xDB3832CD,0x7A8B9348,0xDB08105E,0x7A7D055B,
+0xDAD7F3A2,0x7A6E648A,0xDAA7DCA1,0x7A5FB0D8,0xDA77CB63,0x7A50EA47,0xDA47BFEE,
+0x7A4210D8,0xDA17BA4A,0x7A332490,0xD9E7BA7F,0x7A24256F,0xD9B7C094,0x7A151378,
+0xD987CC90,0x7A05EEAD,0xD957DE7A,0x79F6B711,0xD927F65B,0x79E76CA7,0xD8F81439,
+0x79D80F6F,0xD8C8381D,0x79C89F6E,0xD898620C,0x79B91CA4,0xD868920F,0x79A98715,
+0xD838C82D,0x7999DEC4,0xD809046E,0x798A23B1,0xD7D946D8,0x797A55E0,0xD7A98F73,
+0x796A7554,0xD779DE47,0x795A820E,0xD74A335B,0x794A7C12,0xD71A8EB5,0x793A6361,
+0xD6EAF05F,0x792A37FE,0xD6BB585E,0x7919F9EC,0xD68BC6BA,0x7909A92D,0xD65C3B7B,
+0x78F945C3,0xD62CB6A8,0x78E8CFB2,0xD5FD3848,0x78D846FB,0xD5CDC062,0x78C7ABA2,
+0xD59E4EFF,0x78B6FDA8,0xD56EE424,0x78A63D11,0xD53F7FDA,0x789569DF,0xD5102228,
+0x78848414,0xD4E0CB15,0x78738BB3,0xD4B17AA8,0x786280BF,0xD48230E9,0x7851633B,
+0xD452EDDF,0x78403329,0xD423B191,0x782EF08B,0xD3F47C06,0x781D9B65,0xD3C54D47,
+0x780C33B8,0xD396255A,0x77FAB989,0xD3670446,0x77E92CD9,0xD337EA12,0x77D78DAA,
+0xD308D6C7,0x77C5DC01,0xD2D9CA6A,0x77B417DF,0xD2AAC504,0x77A24148,0xD27BC69C,
+0x7790583E,0xD24CCF39,0x777E5CC3,0xD21DDEE2,0x776C4EDB,0xD1EEF59E,0x775A2E89,
+0xD1C01375,0x7747FBCE,0xD191386E,0x7735B6AF,0xD1626490,0x77235F2D,0xD13397E2,
+0x7710F54C,0xD104D26B,0x76FE790E,0xD0D61434,0x76EBEA77,0xD0A75D42,0x76D94989,
+0xD078AD9E,0x76C69647,0xD04A054E,0x76B3D0B4,0xD01B6459,0x76A0F8D2,0xCFECCAC7,
+0x768E0EA6,0xCFBE389F,0x767B1231,0xCF8FADE9,0x76680376,0xCF612AAA,0x7654E279,
+0xCF32AEEB,0x7641AF3D,0xCF043AB3,0x762E69C4,0xCED5CE08,0x761B1211,0xCEA768F2,
+0x7607A828,0xCE790B79,0x75F42C0B,0xCE4AB5A2,0x75E09DBD,0xCE1C6777,0x75CCFD42,
+0xCDEE20FC,0x75B94A9C,0xCDBFE23A,0x75A585CF,0xCD91AB39,0x7591AEDD,0xCD637BFE,
+0x757DC5CA,0xCD355491,0x7569CA99,0xCD0734F9,0x7555BD4C,0xCCD91D3D,0x75419DE7,
+0xCCAB0D65,0x752D6C6C,0xCC7D0578,0x751928E0,0xCC4F057C,0x7504D345,0xCC210D79,
+0x74F06B9E,0xCBF31D75,0x74DBF1EF,0xCBC53579,0x74C7663A,0xCB97558A,0x74B2C884,
+0xCB697DB0,0x749E18CD,0xCB3BADF3,0x7489571C,0xCB0DE658,0x74748371,0xCAE026E8,
+0x745F9DD1,0xCAB26FA9,0x744AA63F,0xCA84C0A3,0x74359CBD,0xCA5719DB,0x74208150,
+0xCA297B5A,0x740B53FB,0xC9FBE527,0x73F614C0,0xC9CE5748,0x73E0C3A3,0xC9A0D1C5,
+0x73CB60A8,0xC97354A4,0x73B5EBD1,0xC945DFEC,0x73A06522,0xC91873A5,0x738ACC9E,
+0xC8EB0FD6,0x73752249,0xC8BDB485,0x735F6626,0xC89061BA,0x73499838,0xC863177B,
+0x7333B883,0xC835D5D0,0x731DC70A,0xC8089CBF,0x7307C3D0,0xC7DB6C50,0x72F1AED9,
+0xC7AE4489,0x72DB8828,0xC7812572,0x72C54FC1,0xC7540F11,0x72AF05A7,0xC727016D,
+0x7298A9DD,0xC6F9FC8D,0x72823C67,0xC6CD0079,0x726BBD48,0xC6A00D37,0x72552C85,
+0xC67322CE,0x723E8A20,0xC6464144,0x7227D61C,0xC61968A2,0x7211107E,0xC5EC98EE,
+0x71FA3949,0xC5BFD22E,0x71E35080,0xC593146A,0x71CC5626,0xC5665FA9,0x71B54A41,
+0xC539B3F1,0x719E2CD2,0xC50D1149,0x7186FDDE,0xC4E077B8,0x716FBD68,0xC4B3E746,
+0x71586B74,0xC4875FF9,0x71410805,0xC45AE1D7,0x7129931F,0xC42E6CE8,0x71120CC5,
+0xC4020133,0x70FA74FC,0xC3D59EBE,0x70E2CBC6,0xC3A94590,0x70CB1128,0xC37CF5B0,
+0x70B34525,0xC350AF26,0x709B67C0,0xC32471F7,0x708378FF,0xC2F83E2A,0x706B78E3,
+0xC2CC13C7,0x70536771,0xC29FF2D4,0x703B44AD,0xC273DB58,0x7023109A,0xC247CD5A,
+0x700ACB3C,0xC21BC8E1,0x6FF27497,0xC1EFCDF3,0x6FDA0CAE,0xC1C3DC97,0x6FC19385,
+0xC197F4D4,0x6FA90921,0xC16C16B0,0x6F906D84,0xC1404233,0x6F77C0B3,0xC1147764,
+0x6F5F02B2,0xC0E8B648,0x6F463383,0xC0BCFEE7,0x6F2D532C,0xC0915148,0x6F1461B0,
+0xC065AD70,0x6EFB5F12,0xC03A1368,0x6EE24B57,0xC00E8336,0x6EC92683,0xBFE2FCDF,
+0x6EAFF099,0xBFB7806C,0x6E96A99D,0xBF8C0DE3,0x6E7D5193,0xBF60A54A,0x6E63E87F,
+0xBF3546A8,0x6E4A6E66,0xBF09F205,0x6E30E34A,0xBEDEA765,0x6E174730,0xBEB366D1,
+0x6DFD9A1C,0xBE88304F,0x6DE3DC11,0xBE5D03E6,0x6DCA0D14,0xBE31E19B,0x6DB02D29,
+0xBE06C977,0x6D963C54,0xBDDBBB7F,0x6D7C3A98,0xBDB0B7BB,0x6D6227FA,0xBD85BE30,
+0x6D48047E,0xBD5ACEE5,0x6D2DD027,0xBD2FE9E2,0x6D138AFB,0xBD050F2C,0x6CF934FC,
+0xBCDA3ECB,0x6CDECE2F,0xBCAF78C4,0x6CC45698,0xBC84BD1F,0x6CA9CE3B,0xBC5A0BE2,
+0x6C8F351C,0xBC2F6513,0x6C748B3F,0xBC04C8BA,0x6C59D0A9,0xBBDA36DD,0x6C3F055D,
+0xBBAFAF82,0x6C242960,0xBB8532B0,0x6C093CB6,0xBB5AC06D,0x6BEE3F62,0xBB3058C0,
+0x6BD3316A,0xBB05FBB0,0x6BB812D1,0xBADBA943,0x6B9CE39B,0xBAB16180,0x6B81A3CD,
+0xBA87246D,0x6B66536B,0xBA5CF210,0x6B4AF279,0xBA32CA71,0x6B2F80FB,0xBA08AD95,
+0x6B13FEF5,0xB9DE9B83,0x6AF86C6C,0xB9B49442,0x6ADCC964,0xB98A97D8,0x6AC115E2,
+0xB960A64C,0x6AA551E9,0xB936BFA4,0x6A897D7D,0xB90CE3E6,0x6A6D98A4,0xB8E31319,
+0x6A51A361,0xB8B94D44,0x6A359DB9,0xB88F926D,0x6A1987B0,0xB865E299,0x69FD614A,
+0xB83C3DD1,0x69E12A8C,0xB812A41A,0x69C4E37A,0xB7E9157A,0x69A88C19,0xB7BF91F8,
+0x698C246C,0xB796199B,0x696FAC78,0xB76CAC69,0x69532442,0xB7434A67,0x69368BCE,
+0xB719F39E,0x6919E320,0xB6F0A812,0x68FD2A3D,0xB6C767CA,0x68E06129,0xB69E32CD,
+0x68C387E9,0xB6750921,0x68A69E81,0xB64BEACD,0x6889A4F6,0xB622D7D6,0x686C9B4B,
+0xB5F9D043,0x684F8186,0xB5D0D41A,0x683257AB,0xB5A7E362,0x68151DBE,0xB57EFE22,
+0x67F7D3C5,0xB556245E,0x67DA79C3,0xB52D561E,0x67BD0FBD,0xB5049368,0x679F95B7,
+0xB4DBDC42,0x67820BB7,0xB4B330B3,0x676471C0,0xB48A90C0,0x6746C7D8,0xB461FC70,
+0x67290E02,0xB43973CA,0x670B4444,0xB410F6D3,0x66ED6AA1,0xB3E88592,0x66CF8120,
+0xB3C0200C,0x66B187C3,0xB397C649,0x66937E91,0xB36F784F,0x6675658C,0xB3473623,
+0x66573CBB,0xB31EFFCC,0x66390422,0xB2F6D550,0x661ABBC5,0xB2CEB6B5,0x65FC63A9,
+0xB2A6A402,0x65DDFBD3,0xB27E9D3C,0x65BF8447,0xB256A26A,0x65A0FD0B,0xB22EB392,
+0x65826622,0xB206D0BA,0x6563BF92,0xB1DEF9E9,0x6545095F,0xB1B72F23,0x6526438F,
+0xB18F7071,0x65076E25,0xB167BDD7,0x64E88926,0xB140175B,0x64C99498,0xB1187D05,
+0x64AA907F,0xB0F0EEDA,0x648B7CE0,0xB0C96CE0,0x646C59BF,0xB0A1F71D,0x644D2722,
+0xB07A8D97,0x642DE50D,0xB0533055,0x640E9386,0xB02BDF5C,0x63EF3290,0xB0049AB3,
+0x63CFC231,0xAFDD625F,0x63B0426D,0xAFB63667,0x6390B34A,0xAF8F16D1,0x637114CC,
+0xAF6803A2,0x635166F9,0xAF40FCE1,0x6331A9D4,0xAF1A0293,0x6311DD64,0xAEF314C0,
+0x62F201AC,0xAECC336C,0x62D216B3,0xAEA55E9E,0x62B21C7B,0xAE7E965B,0x6292130C,
+0xAE57DAAB,0x6271FA69,0xAE312B92,0x6251D298,0xAE0A8916,0x62319B9D,0xADE3F33E,
+0x6211557E,0xADBD6A10,0x61F1003F,0xAD96ED92,0x61D09BE5,0xAD707DC8,0x61B02876,
+0xAD4A1ABA,0x618FA5F7,0xAD23C46E,0x616F146C,0xACFD7AE8,0x614E73DA,0xACD73E30,
+0x612DC447,0xACB10E4B,0x610D05B7,0xAC8AEB3E,0x60EC3830,0xAC64D510,0x60CB5BB7,
+0xAC3ECBC7,0x60AA7050,0xAC18CF69,0x60897601,0xABF2DFFB,0x60686CCF,0xABCCFD83,
+0x604754BF,0xABA72807,0x60262DD6,0xAB815F8D,0x6004F819,0xAB5BA41A,0x5FE3B38D,
+0xAB35F5B5,0x5FC26038,0xAB105464,0x5FA0FE1F,0xAAEAC02C,0x5F7F8D46,0xAAC53912,
+0x5F5E0DB3,0xAA9FBF1E,0x5F3C7F6B,0xAA7A5253,0x5F1AE274,0xAA54F2BA,0x5EF936D1,
+0xAA2FA056,0x5ED77C8A,0xAA0A5B2E,0x5EB5B3A2,0xA9E52347,0x5E93DC1F,0xA9BFF8A8,
+0x5E71F606,0xA99ADB56,0x5E50015D,0xA975CB57,0x5E2DFE29,0xA950C8B0,0x5E0BEC6E,
+0xA92BD367,0x5DE9CC33,0xA906EB82,0x5DC79D7C,0xA8E21106,0x5DA5604F,0xA8BD43FA,
+0x5D8314B1,0xA8988463,0x5D60BAA7,0xA873D246,0x5D3E5237,0xA84F2DAA,0x5D1BDB65,
+0xA82A9693,0x5CF95638,0xA8060D08,0x5CD6C2B5,0xA7E1910F,0x5CB420E0,0xA7BD22AC,
+0x5C9170BF,0xA798C1E5,0x5C6EB258,0xA7746EC0,0x5C4BE5B0,0xA7502943,0x5C290ACC,
+0xA72BF174,0x5C0621B2,0xA707C757,0x5BE32A67,0xA6E3AAF2,0x5BC024F0,0xA6BF9C4B,
+0x5B9D1154,0xA69B9B68,0x5B79EF96,0xA677A84E,0x5B56BFBD,0xA653C303,0x5B3381CE,
+0xA62FEB8B,0x5B1035CF,0xA60C21EE,0x5AECDBC5,0xA5E8662F,0x5AC973B5,0xA5C4B855,
+0x5AA5FDA5,0xA5A11866,0x5A82799A,0xA57D8666,0x5A5EE79A,0xA55A025B,0x5A3B47AB,
+0xA5368C4B,0x5A1799D1,0xA513243B,0x59F3DE12,0xA4EFCA31,0x59D01475,0xA4CC7E32,
+0x59AC3CFD,0xA4A94043,0x598857B2,0xA486106A,0x59646498,0xA462EEAC,0x594063B5,
+0xA43FDB10,0x591C550E,0xA41CD599,0x58F838A9,0xA3F9DE4E,0x58D40E8C,0xA3D6F534,
+0x58AFD6BD,0xA3B41A50,0x588B9140,0xA3914DA8,0x58673E1B,0xA36E8F41,0x5842DD54,
+0xA34BDF20,0x581E6EF1,0xA3293D4B,0x57F9F2F8,0xA306A9C8,0x57D5696D,0xA2E4249B,
+0x57B0D256,0xA2C1ADC9,0x578C2DBA,0xA29F4559,0x57677B9D,0xA27CEB4F,0x5742BC06,
+0xA25A9FB1,0x571DEEFA,0xA2386284,0x56F9147E,0xA21633CD,0x56D42C99,0xA1F41392,
+0x56AF3750,0xA1D201D7,0x568A34A9,0xA1AFFEA3,0x566524AA,0xA18E09FA,0x56400758,
+0xA16C23E1,0x561ADCB9,0xA14A4C5E,0x55F5A4D2,0xA1288376,0x55D05FAA,0xA106C92F,
+0x55AB0D46,0xA0E51D8C,0x5585ADAD,0xA0C38095,0x556040E2,0xA0A1F24D,0x553AC6EE,
+0xA08072BA,0x55153FD4,0xA05F01E1,0x54EFAB9C,0xA03D9FC8,0x54CA0A4B,0xA01C4C73,
+0x54A45BE6,0x9FFB07E7,0x547EA073,0x9FD9D22A,0x5458D7F9,0x9FB8AB41,0x5433027D,
+0x9F979331,0x540D2005,0x9F7689FF,0x53E73097,0x9F558FB0,0x53C13439,0x9F34A449,
+0x539B2AF0,0x9F13C7D0,0x537514C2,0x9EF2FA49,0x534EF1B5,0x9ED23BB9,0x5328C1D0,
+0x9EB18C26,0x53028518,0x9E90EB94,0x52DC3B92,0x9E705A09,0x52B5E546,0x9E4FD78A,
+0x528F8238,0x9E2F641B,0x5269126E,0x9E0EFFC1,0x524295F0,0x9DEEAA82,0x521C0CC2,
+0x9DCE6463,0x51F576EA,0x9DAE2D68,0x51CED46E,0x9D8E0597,0x51A82555,0x9D6DECF4,
+0x518169A5,0x9D4DE385,0x515AA162,0x9D2DE94D,0x5133CC94,0x9D0DFE54,0x510CEB40,
+0x9CEE229C,0x50E5FD6D,0x9CCE562C,0x50BF031F,0x9CAE9907,0x5097FC5E,0x9C8EEB34,
+0x5070E92F,0x9C6F4CB6,0x5049C999,0x9C4FBD93,0x50229DA1,0x9C303DCF,0x4FFB654D,
+0x9C10CD70,0x4FD420A4,0x9BF16C7A,0x4FACCFAB,0x9BD21AF3,0x4F857269,0x9BB2D8DE,
+0x4F5E08E3,0x9B93A641,0x4F369320,0x9B748320,0x4F0F1126,0x9B556F81,0x4EE782FB,
+0x9B366B68,0x4EBFE8A5,0x9B1776DA,0x4E984229,0x9AF891DB,0x4E708F8F,0x9AD9BC71,
+0x4E48D0DD,0x9ABAF6A1,0x4E210617,0x9A9C406E,0x4DF92F46,0x9A7D99DE,0x4DD14C6E,
+0x9A5F02F5,0x4DA95D96,0x9A407BB9,0x4D8162C4,0x9A22042D,0x4D595BFE,0x9A039C57,
+0x4D31494B,0x99E5443B,0x4D092AB0,0x99C6FBDE,0x4CE10034,0x99A8C345,0x4CB8C9DD,
+0x998A9A74,0x4C9087B1,0x996C816F,0x4C6839B7,0x994E783D,0x4C3FDFF4,0x99307EE0,
+0x4C177A6E,0x9912955F,0x4BEF092D,0x98F4BBBC,0x4BC68C36,0x98D6F1FE,0x4B9E0390,
+0x98B93828,0x4B756F40,0x989B8E40,0x4B4CCF4D,0x987DF449,0x4B2423BE,0x98606A49,
+0x4AFB6C98,0x9842F043,0x4AD2A9E2,0x9825863D,0x4AA9DBA2,0x98082C3B,0x4A8101DE,
+0x97EAE242,0x4A581C9E,0x97CDA855,0x4A2F2BE6,0x97B07E7A,0x4A062FBD,0x979364B5,
+0x49DD282A,0x97765B0A,0x49B41533,0x9759617F,0x498AF6DF,0x973C7817,0x4961CD33,
+0x971F9ED7,0x49389836,0x9702D5C3,0x490F57EE,0x96E61CE0,0x48E60C62,0x96C97432,
+0x48BCB599,0x96ACDBBE,0x48935397,0x96905388,0x4869E665,0x9673DB94,0x48406E08,
+0x965773E7,0x4816EA86,0x963B1C86,0x47ED5BE6,0x961ED574,0x47C3C22F,0x96029EB6,
+0x479A1D67,0x95E67850,0x47706D93,0x95CA6247,0x4746B2BC,0x95AE5C9F,0x471CECE7,
+0x9592675C,0x46F31C1A,0x95768283,0x46C9405C,0x955AAE17,0x469F59B4,0x953EEA1E,
+0x46756828,0x9523369C,0x464B6BBE,0x95079394,0x4621647D,0x94EC010B,0x45F7526B,
+0x94D07F05,0x45CD358F,0x94B50D87,0x45A30DF0,0x9499AC95,0x4578DB93,0x947E5C33,
+0x454E9E80,0x94631C65,0x452456BD,0x9447ED2F,0x44FA0450,0x942CCE96,0x44CFA740,
+0x9411C09E,0x44A53F93,0x93F6C34A,0x447ACD50,0x93DBD6A0,0x4450507E,0x93C0FAA3,
+0x4425C923,0x93A62F57,0x43FB3746,0x938B74C1,0x43D09AED,0x9370CAE4,0x43A5F41E,
+0x935631C5,0x437B42E1,0x933BA968,0x4350873C,0x932131D1,0x4325C135,0x9306CB04,
+0x42FAF0D4,0x92EC7505,0x42D0161E,0x92D22FD9,0x42A5311B,0x92B7FB82,0x427A41D0,
+0x929DD806,0x424F4845,0x9283C568,0x42244481,0x9269C3AC,0x41F93689,0x924FD2D7,
+0x41CE1E65,0x9235F2EC,0x41A2FC1A,0x921C23EF,0x4177CFB1,0x920265E4,0x414C992F,
+0x91E8B8D0,0x4121589B,0x91CF1CB6,0x40F60DFB,0x91B5919A,0x40CAB958,0x919C1781,
+0x409F5AB6,0x9182AE6D,0x4073F21D,0x91695663,0x40487F94,0x91500F67,0x401D0321,
+0x9136D97D,0x3FF17CCA,0x911DB4A9,0x3FC5EC98,0x9104A0EE,0x3F9A5290,0x90EB9E50,
+0x3F6EAEB8,0x90D2ACD4,0x3F430119,0x90B9CC7D,0x3F1749B8,0x90A0FD4E,0x3EEB889C,
+0x90883F4D,0x3EBFBDCD,0x906F927C,0x3E93E950,0x9056F6DF,0x3E680B2C,0x903E6C7B,
+0x3E3C2369,0x9025F352,0x3E10320D,0x900D8B69,0x3DE4371F,0x8FF534C4,0x3DB832A6,
+0x8FDCEF66,0x3D8C24A8,0x8FC4BB53,0x3D600D2C,0x8FAC988F,0x3D33EC39,0x8F94871D,
+0x3D07C1D6,0x8F7C8701,0x3CDB8E09,0x8F649840,0x3CAF50DA,0x8F4CBADB,0x3C830A50,
+0x8F34EED8,0x3C56BA70,0x8F1D343A,0x3C2A6142,0x8F058B04,0x3BFDFECD,0x8EEDF33B,
+0x3BD19318,0x8ED66CE1,0x3BA51E29,0x8EBEF7FB,0x3B78A007,0x8EA7948C,0x3B4C18BA,
+0x8E904298,0x3B1F8848,0x8E790222,0x3AF2EEB7,0x8E61D32E,0x3AC64C0F,0x8E4AB5BF,
+0x3A99A057,0x8E33A9DA,0x3A6CEB96,0x8E1CAF80,0x3A402DD2,0x8E05C6B7,0x3A136712,
+0x8DEEEF82,0x39E6975E,0x8DD829E4,0x39B9BEBC,0x8DC175E0,0x398CDD32,0x8DAAD37B,
+0x395FF2C9,0x8D9442B8,0x3932FF87,0x8D7DC399,0x39060373,0x8D675623,0x38D8FE93,
+0x8D50FA59,0x38ABF0EF,0x8D3AB03F,0x387EDA8E,0x8D2477D8,0x3851BB77,0x8D0E5127,
+0x382493B0,0x8CF83C30,0x37F76341,0x8CE238F6,0x37CA2A30,0x8CCC477D,0x379CE885,
+0x8CB667C8,0x376F9E46,0x8CA099DA,0x37424B7B,0x8C8ADDB7,0x3714F02A,0x8C753362,
+0x36E78C5B,0x8C5F9ADE,0x36BA2014,0x8C4A142F,0x368CAB5C,0x8C349F58,0x365F2E3B,
+0x8C1F3C5D,0x3631A8B8,0x8C09EB40,0x36041AD9,0x8BF4AC05,0x35D684A6,0x8BDF7EB0,
+0x35A8E625,0x8BCA6343,0x357B3F5D,0x8BB559C1,0x354D9057,0x8BA0622F,0x351FD918,
+0x8B8B7C8F,0x34F219A8,0x8B76A8E4,0x34C4520D,0x8B61E733,0x34968250,0x8B4D377C,
+0x3468AA76,0x8B3899C6,0x343ACA87,0x8B240E11,0x340CE28B,0x8B0F9462,0x33DEF287,
+0x8AFB2CBB,0x33B0FA84,0x8AE6D720,0x3382FA88,0x8AD29394,0x3354F29B,0x8ABE6219,
+0x3326E2C3,0x8AAA42B4,0x32F8CB07,0x8A963567,0x32CAAB6F,0x8A823A36,0x329C8402,
+0x8A6E5123,0x326E54C7,0x8A5A7A31,0x32401DC6,0x8A46B564,0x3211DF04,0x8A3302BE,
+0x31E39889,0x8A1F6243,0x31B54A5E,0x8A0BD3F5,0x3186F487,0x89F857D8,0x3158970E,
+0x89E4EDEF,0x312A31F8,0x89D1963C,0x30FBC54D,0x89BE50C3,0x30CD5115,0x89AB1D87,
+0x309ED556,0x8997FC8A,0x30705217,0x8984EDCF,0x3041C761,0x8971F15A,0x30133539,
+0x895F072E,0x2FE49BA7,0x894C2F4C,0x2FB5FAB2,0x893969B9,0x2F875262,0x8926B677,
+0x2F58A2BE,0x89141589,0x2F29EBCC,0x890186F2,0x2EFB2D95,0x88EF0AB4,0x2ECC681E,
+0x88DCA0D3,0x2E9D9B70,0x88CA4951,0x2E6EC792,0x88B80432,0x2E3FEC8B,0x88A5D177,
+0x2E110A62,0x8893B125,0x2DE2211E,0x8881A33D,0x2DB330C7,0x886FA7C2,0x2D843964,
+0x885DBEB8,0x2D553AFC,0x884BE821,0x2D263596,0x883A23FF,0x2CF72939,0x88287256,
+0x2CC815EE,0x8816D327,0x2C98FBBA,0x88054677,0x2C69DAA6,0x87F3CC48,0x2C3AB2B9,
+0x87E2649B,0x2C0B83FA,0x87D10F75,0x2BDC4E6F,0x87BFCCD7,0x2BAD1221,0x87AE9CC5,
+0x2B7DCF17,0x879D7F41,0x2B4E8558,0x878C744D,0x2B1F34EB,0x877B7BEC,0x2AEFDDD8,
+0x876A9621,0x2AC08026,0x8759C2EF,0x2A911BDC,0x87490258,0x2A61B101,0x8738545E,
+0x2A323F9E,0x8727B905,0x2A02C7B8,0x8717304E,0x29D34958,0x8706BA3D,0x29A3C485,
+0x86F656D3,0x29743946,0x86E60614,0x2944A7A2,0x86D5C802,0x29150FA1,0x86C59C9F,
+0x28E5714B,0x86B583EE,0x28B5CCA5,0x86A57DF2,0x288621B9,0x86958AAC,0x2856708D,
+0x8685AA20,0x2826B928,0x8675DC4F,0x27F6FB92,0x8666213C,0x27C737D3,0x865678EB,
+0x27976DF1,0x8646E35C,0x27679DF4,0x86376092,0x2737C7E3,0x8627F091,0x2707EBC7,
+0x86189359,0x26D809A5,0x860948EF,0x26A82186,0x85FA1153,0x26783370,0x85EAEC88,
+0x26483F6C,0x85DBDA91,0x26184581,0x85CCDB70,0x25E845B6,0x85BDEF28,0x25B84012,
+0x85AF15B9,0x2588349D,0x85A04F28,0x2558235F,0x85919B76,0x25280C5E,0x8582FAA5,
+0x24F7EFA2,0x85746CB8,0x24C7CD33,0x8565F1B0,0x2497A517,0x85578991,0x24677758,
+0x8549345C,0x243743FA,0x853AF214,0x24070B08,0x852CC2BB,0x23D6CC87,0x851EA652,
+0x23A6887F,0x85109CDD,0x23763EF7,0x8502A65C,0x2345EFF8,0x84F4C2D4,0x23159B88,
+0x84E6F244,0x22E541AF,0x84D934B1,0x22B4E274,0x84CB8A1B,0x22847DE0,0x84BDF286,
+0x225413F8,0x84B06DF2,0x2223A4C5,0x84A2FC62,0x21F3304F,0x84959DD9,0x21C2B69C,
+0x84885258,0x219237B5,0x847B19E1,0x2161B3A0,0x846DF477,0x21312A65,0x8460E21A,
+0x21009C0C,0x8453E2CF,0x20D0089C,0x8446F695,0x209F701C,0x843A1D70,0x206ED295,
+0x842D5762,0x203E300D,0x8420A46C,0x200D888D,0x84140490,0x1FDCDC1B,0x840777D0,
+0x1FAC2ABF,0x83FAFE2E,0x1F7B7481,0x83EE97AD,0x1F4AB968,0x83E2444D,0x1F19F97B,
+0x83D60412,0x1EE934C3,0x83C9D6FC,0x1EB86B46,0x83BDBD0E,0x1E879D0D,0x83B1B649,
+0x1E56CA1E,0x83A5C2B0,0x1E25F282,0x8399E244,0x1DF5163F,0x838E1507,0x1DC4355E,
+0x83825AFB,0x1D934FE5,0x8376B422,0x1D6265DD,0x836B207D,0x1D31774D,0x835FA00F,
+0x1D00843D,0x835432D8,0x1CCF8CB3,0x8348D8DC,0x1C9E90B8,0x833D921B,0x1C6D9053,
+0x83325E97,0x1C3C8B8C,0x83273E52,0x1C0B826A,0x831C314E,0x1BDA74F6,0x8311378D,
+0x1BA96335,0x83065110,0x1B784D30,0x82FB7DD8,0x1B4732EF,0x82F0BDE8,0x1B161479,
+0x82E61141,0x1AE4F1D6,0x82DB77E5,0x1AB3CB0D,0x82D0F1D5,0x1A82A026,0x82C67F14,
+0x1A517128,0x82BC1FA2,0x1A203E1B,0x82B1D381,0x19EF0707,0x82A79AB3,0x19BDCBF3,
+0x829D753A,0x198C8CE7,0x82936317,0x195B49EA,0x8289644B,0x192A0304,0x827F78D8,
+0x18F8B83C,0x8275A0C0,0x18C7699B,0x826BDC04,0x18961728,0x82622AA6,0x1864C0EA,
+0x82588CA7,0x183366E9,0x824F0208,0x1802092C,0x82458ACC,0x17D0A7BC,0x823C26F3,
+0x179F429F,0x8232D67F,0x176DD9DE,0x82299971,0x173C6D80,0x82206FCC,0x170AFD8D,
+0x82175990,0x16D98A0C,0x820E56BE,0x16A81305,0x82056758,0x1676987F,0x81FC8B60,
+0x16451A83,0x81F3C2D7,0x16139918,0x81EB0DBE,0x15E21445,0x81E26C16,0x15B08C12,
+0x81D9DDE1,0x157F0086,0x81D16321,0x154D71AA,0x81C8FBD6,0x151BDF86,0x81C0A801,
+0x14EA4A1F,0x81B867A5,0x14B8B17F,0x81B03AC2,0x148715AE,0x81A82159,0x145576B1,
+0x81A01B6D,0x1423D492,0x819828FD,0x13F22F58,0x81904A0C,0x13C0870A,0x81887E9A,
+0x138EDBB1,0x8180C6A9,0x135D2D53,0x8179223A,0x132B7BF9,0x8171914E,0x12F9C7AA,
+0x816A13E6,0x12C8106F,0x8162AA04,0x1296564D,0x815B53A8,0x1264994E,0x815410D4,
+0x1232D979,0x814CE188,0x120116D5,0x8145C5C7,0x11CF516A,0x813EBD90,0x119D8941,
+0x8137C8E6,0x116BBE60,0x8130E7C9,0x1139F0CF,0x812A1A3A,0x11082096,0x8123603A,
+0x10D64DBD,0x811CB9CA,0x10A4784B,0x811626EC,0x1072A048,0x810FA7A0,0x1040C5BB,
+0x81093BE8,0x100EE8AD,0x8102E3C4,0x0FDD0926,0x80FC9F35,0x0FAB272B,0x80F66E3C,
+0x0F7942C7,0x80F050DB,0x0F475BFF,0x80EA4712,0x0F1572DC,0x80E450E2,0x0EE38766,
+0x80DE6E4C,0x0EB199A4,0x80D89F51,0x0E7FA99E,0x80D2E3F2,0x0E4DB75B,0x80CD3C2F,
+0x0E1BC2E4,0x80C7A80A,0x0DE9CC40,0x80C22784,0x0DB7D376,0x80BCBA9D,0x0D85D88F,
+0x80B76156,0x0D53DB92,0x80B21BAF,0x0D21DC87,0x80ACE9AB,0x0CEFDB76,0x80A7CB49,
+0x0CBDD865,0x80A2C08B,0x0C8BD35E,0x809DC971,0x0C59CC68,0x8098E5FB,0x0C27C389,
+0x8094162C,0x0BF5B8CB,0x808F5A02,0x0BC3AC35,0x808AB180,0x0B919DCF,0x80861CA6,
+0x0B5F8D9F,0x80819B74,0x0B2D7BAF,0x807D2DEC,0x0AFB6805,0x8078D40D,0x0AC952AA,
+0x80748DD9,0x0A973BA5,0x80705B50,0x0A6522FE,0x806C3C74,0x0A3308BD,0x80683143,
+0x0A00ECE8,0x806439C0,0x09CECF89,0x806055EB,0x099CB0A7,0x805C85C4,0x096A9049,
+0x8058C94C,0x09386E78,0x80552084,0x09064B3A,0x80518B6B,0x08D42699,0x804E0A04,
+0x08A2009A,0x804A9C4D,0x086FD947,0x80474248,0x083DB0A7,0x8043FBF6,0x080B86C2,
+0x8040C956,0x07D95B9E,0x803DAA6A,0x07A72F45,0x803A9F31,0x077501BE,0x8037A7AC,
+0x0742D311,0x8034C3DD,0x0710A345,0x8031F3C2,0x06DE7262,0x802F375D,0x06AC406F,
+0x802C8EAD,0x067A0D76,0x8029F9B4,0x0647D97C,0x80277872,0x0615A48B,0x80250AE7,
+0x05E36EA9,0x8022B114,0x05B137DF,0x80206AF8,0x057F0035,0x801E3895,0x054CC7B1,
+0x801C19EA,0x051A8E5C,0x801A0EF8,0x04E8543E,0x801817BF,0x04B6195D,0x80163440,
+0x0483DDC3,0x8014647B,0x0451A177,0x8012A86F,0x041F6480,0x8011001F,0x03ED26E6,
+0x800F6B88,0x03BAE8B2,0x800DEAAD,0x0388A9EA,0x800C7D8C,0x03566A96,0x800B2427,
+0x03242ABF,0x8009DE7E,0x02F1EA6C,0x8008AC90,0x02BFA9A4,0x80078E5E,0x028D6870,
+0x800683E8,0x025B26D7,0x80058D2F,0x0228E4E2,0x8004AA32,0x01F6A297,0x8003DAF1,
+0x01C45FFE,0x80031F6D,0x01921D20,0x800277A6,0x015FDA03,0x8001E39B,0x012D96B1,
+0x8001634E,0x00FB5330,0x8000F6BD,0x00C90F88,0x80009DEA,0x0096CBC1,0x800058D4,
+0x006487E3,0x8000277A,0x003243F5,0x800009DF,0x7FFFFFFF,0x00000000,0x7FFF6216,
+0xFF36F078,0x7FFD885A,0xFE6DE2E0,0x7FFA72D1,0xFDA4D929,0x7FF62182,0xFCDBD541,
+0x7FF09478,0xFC12D91A,0x7FE9CBC0,0xFB49E6A3,0x7FE1C76B,0xFA80FFCB,0x7FD8878E,
+0xF9B82684,0x7FCE0C3E,0xF8EF5CBB,0x7FC25596,0xF826A462,0x7FB563B3,0xF75DFF66,
+0x7FA736B4,0xF6956FB7,0x7F97CEBD,0xF5CCF743,0x7F872BF3,0xF50497FB,0x7F754E80,
+0xF43C53CB,0x7F62368F,0xF3742CA2,0x7F4DE451,0xF2AC246E,0x7F3857F6,0xF1E43D1C,
+0x7F2191B4,0xF11C789A,0x7F0991C4,0xF054D8D5,0x7EF05860,0xEF8D5FB8,0x7ED5E5C6,
+0xEEC60F31,0x7EBA3A39,0xEDFEE92B,0x7E9D55FC,0xED37EF91,0x7E7F3957,0xEC71244F,
+0x7E5FE493,0xEBAA894F,0x7E3F57FF,0xEAE4207A,0x7E1D93EA,0xEA1DEBBB,0x7DFA98A8,
+0xE957ECFB,0x7DD6668F,0xE8922622,0x7DB0FDF8,0xE7CC9917,0x7D8A5F40,0xE70747C4,
+0x7D628AC6,0xE642340D,0x7D3980EC,0xE57D5FDA,0x7D0F4218,0xE4B8CD11,0x7CE3CEB2,
+0xE3F47D96,0x7CB72724,0xE330734D,0x7C894BDE,0xE26CB01B,0x7C5A3D50,0xE1A935E2,
+0x7C29FBEE,0xE0E60685,0x7BF88830,0xE02323E5,0x7BC5E290,0xDF608FE4,0x7B920B89,
+0xDE9E4C60,0x7B5D039E,0xDDDC5B3B,0x7B26CB4F,0xDD1ABE51,0x7AEF6323,0xDC597781,
+0x7AB6CBA4,0xDB9888A8,0x7A7D055B,0xDAD7F3A2,0x7A4210D8,0xDA17BA4A,0x7A05EEAD,
+0xD957DE7A,0x79C89F6E,0xD898620C,0x798A23B1,0xD7D946D8,0x794A7C12,0xD71A8EB5,
+0x7909A92D,0xD65C3B7B,0x78C7ABA2,0xD59E4EFF,0x78848414,0xD4E0CB15,0x78403329,
+0xD423B191,0x77FAB989,0xD3670446,0x77B417DF,0xD2AAC504,0x776C4EDB,0xD1EEF59E,
+0x77235F2D,0xD13397E2,0x76D94989,0xD078AD9E,0x768E0EA6,0xCFBE389F,0x7641AF3D,
+0xCF043AB3,0x75F42C0B,0xCE4AB5A2,0x75A585CF,0xCD91AB39,0x7555BD4C,0xCCD91D3D,
+0x7504D345,0xCC210D79,0x74B2C884,0xCB697DB0,0x745F9DD1,0xCAB26FA9,0x740B53FB,
+0xC9FBE527,0x73B5EBD1,0xC945DFEC,0x735F6626,0xC89061BA,0x7307C3D0,0xC7DB6C50,
+0x72AF05A7,0xC727016D,0x72552C85,0xC67322CE,0x71FA3949,0xC5BFD22E,0x719E2CD2,
+0xC50D1149,0x71410805,0xC45AE1D7,0x70E2CBC6,0xC3A94590,0x708378FF,0xC2F83E2A,
+0x7023109A,0xC247CD5A,0x6FC19385,0xC197F4D4,0x6F5F02B2,0xC0E8B648,0x6EFB5F12,
+0xC03A1368,0x6E96A99D,0xBF8C0DE3,0x6E30E34A,0xBEDEA765,0x6DCA0D14,0xBE31E19B,
+0x6D6227FA,0xBD85BE30,0x6CF934FC,0xBCDA3ECB,0x6C8F351C,0xBC2F6513,0x6C242960,
+0xBB8532B0,0x6BB812D1,0xBADBA943,0x6B4AF279,0xBA32CA71,0x6ADCC964,0xB98A97D8,
+0x6A6D98A4,0xB8E31319,0x69FD614A,0xB83C3DD1,0x698C246C,0xB796199B,0x6919E320,
+0xB6F0A812,0x68A69E81,0xB64BEACD,0x683257AB,0xB5A7E362,0x67BD0FBD,0xB5049368,
+0x6746C7D8,0xB461FC70,0x66CF8120,0xB3C0200C,0x66573CBB,0xB31EFFCC,0x65DDFBD3,
+0xB27E9D3C,0x6563BF92,0xB1DEF9E9,0x64E88926,0xB140175B,0x646C59BF,0xB0A1F71D,
+0x63EF3290,0xB0049AB3,0x637114CC,0xAF6803A2,0x62F201AC,0xAECC336C,0x6271FA69,
+0xAE312B92,0x61F1003F,0xAD96ED92,0x616F146C,0xACFD7AE8,0x60EC3830,0xAC64D510,
+0x60686CCF,0xABCCFD83,0x5FE3B38D,0xAB35F5B5,0x5F5E0DB3,0xAA9FBF1E,0x5ED77C8A,
+0xAA0A5B2E,0x5E50015D,0xA975CB57,0x5DC79D7C,0xA8E21106,0x5D3E5237,0xA84F2DAA,
+0x5CB420E0,0xA7BD22AC,0x5C290ACC,0xA72BF174,0x5B9D1154,0xA69B9B68,0x5B1035CF,
+0xA60C21EE,0x5A82799A,0xA57D8666,0x59F3DE12,0xA4EFCA31,0x59646498,0xA462EEAC,
+0x58D40E8C,0xA3D6F534,0x5842DD54,0xA34BDF20,0x57B0D256,0xA2C1ADC9,0x571DEEFA,
+0xA2386284,0x568A34A9,0xA1AFFEA3,0x55F5A4D2,0xA1288376,0x556040E2,0xA0A1F24D,
+0x54CA0A4B,0xA01C4C73,0x5433027D,0x9F979331,0x539B2AF0,0x9F13C7D0,0x53028518,
+0x9E90EB94,0x5269126E,0x9E0EFFC1,0x51CED46E,0x9D8E0597,0x5133CC94,0x9D0DFE54,
+0x5097FC5E,0x9C8EEB34,0x4FFB654D,0x9C10CD70,0x4F5E08E3,0x9B93A641,0x4EBFE8A5,
+0x9B1776DA,0x4E210617,0x9A9C406E,0x4D8162C4,0x9A22042D,0x4CE10034,0x99A8C345,
+0x4C3FDFF4,0x99307EE0,0x4B9E0390,0x98B93828,0x4AFB6C98,0x9842F043,0x4A581C9E,
+0x97CDA855,0x49B41533,0x9759617F,0x490F57EE,0x96E61CE0,0x4869E665,0x9673DB94,
+0x47C3C22F,0x96029EB6,0x471CECE7,0x9592675C,0x46756828,0x9523369C,0x45CD358F,
+0x94B50D87,0x452456BD,0x9447ED2F,0x447ACD50,0x93DBD6A0,0x43D09AED,0x9370CAE4,
+0x4325C135,0x9306CB04,0x427A41D0,0x929DD806,0x41CE1E65,0x9235F2EC,0x4121589B,
+0x91CF1CB6,0x4073F21D,0x91695663,0x3FC5EC98,0x9104A0EE,0x3F1749B8,0x90A0FD4E,
+0x3E680B2C,0x903E6C7B,0x3DB832A6,0x8FDCEF66,0x3D07C1D6,0x8F7C8701,0x3C56BA70,
+0x8F1D343A,0x3BA51E29,0x8EBEF7FB,0x3AF2EEB7,0x8E61D32E,0x3A402DD2,0x8E05C6B7,
+0x398CDD32,0x8DAAD37B,0x38D8FE93,0x8D50FA59,0x382493B0,0x8CF83C30,0x376F9E46,
+0x8CA099DA,0x36BA2014,0x8C4A142F,0x36041AD9,0x8BF4AC05,0x354D9057,0x8BA0622F,
+0x34968250,0x8B4D377C,0x33DEF287,0x8AFB2CBB,0x3326E2C3,0x8AAA42B4,0x326E54C7,
+0x8A5A7A31,0x31B54A5E,0x8A0BD3F5,0x30FBC54D,0x89BE50C3,0x3041C761,0x8971F15A,
+0x2F875262,0x8926B677,0x2ECC681E,0x88DCA0D3,0x2E110A62,0x8893B125,0x2D553AFC,
+0x884BE821,0x2C98FBBA,0x88054677,0x2BDC4E6F,0x87BFCCD7,0x2B1F34EB,0x877B7BEC,
+0x2A61B101,0x8738545E,0x29A3C485,0x86F656D3,0x28E5714B,0x86B583EE,0x2826B928,
+0x8675DC4F,0x27679DF4,0x86376092,0x26A82186,0x85FA1153,0x25E845B6,0x85BDEF28,
+0x25280C5E,0x8582FAA5,0x24677758,0x8549345C,0x23A6887F,0x85109CDD,0x22E541AF,
+0x84D934B1,0x2223A4C5,0x84A2FC62,0x2161B3A0,0x846DF477,0x209F701C,0x843A1D70,
+0x1FDCDC1B,0x840777D0,0x1F19F97B,0x83D60412,0x1E56CA1E,0x83A5C2B0,0x1D934FE5,
+0x8376B422,0x1CCF8CB3,0x8348D8DC,0x1C0B826A,0x831C314E,0x1B4732EF,0x82F0BDE8,
+0x1A82A026,0x82C67F14,0x19BDCBF3,0x829D753A,0x18F8B83C,0x8275A0C0,0x183366E9,
+0x824F0208,0x176DD9DE,0x82299971,0x16A81305,0x82056758,0x15E21445,0x81E26C16,
+0x151BDF86,0x81C0A801,0x145576B1,0x81A01B6D,0x138EDBB1,0x8180C6A9,0x12C8106F,
+0x8162AA04,0x120116D5,0x8145C5C7,0x1139F0CF,0x812A1A3A,0x1072A048,0x810FA7A0,
+0x0FAB272B,0x80F66E3C,0x0EE38766,0x80DE6E4C,0x0E1BC2E4,0x80C7A80A,0x0D53DB92,
+0x80B21BAF,0x0C8BD35E,0x809DC971,0x0BC3AC35,0x808AB180,0x0AFB6805,0x8078D40D,
+0x0A3308BD,0x80683143,0x096A9049,0x8058C94C,0x08A2009A,0x804A9C4D,0x07D95B9E,
+0x803DAA6A,0x0710A345,0x8031F3C2,0x0647D97C,0x80277872,0x057F0035,0x801E3895,
+0x04B6195D,0x80163440,0x03ED26E6,0x800F6B88,0x03242ABF,0x8009DE7E,0x025B26D7,
+0x80058D2F,0x01921D20,0x800277A6,0x00C90F88,0x80009DEA,0x7FFFFFFF,0x00000000,
+0x7FF62182,0xFCDBD541,0x7FD8878E,0xF9B82684,0x7FA736B4,0xF6956FB7,0x7F62368F,
+0xF3742CA2,0x7F0991C4,0xF054D8D5,0x7E9D55FC,0xED37EF91,0x7E1D93EA,0xEA1DEBBB,
+0x7D8A5F40,0xE70747C4,0x7CE3CEB2,0xE3F47D96,0x7C29FBEE,0xE0E60685,0x7B5D039E,
+0xDDDC5B3B,0x7A7D055B,0xDAD7F3A2,0x798A23B1,0xD7D946D8,0x78848414,0xD4E0CB15,
+0x776C4EDB,0xD1EEF59E,0x7641AF3D,0xCF043AB3,0x7504D345,0xCC210D79,0x73B5EBD1,
+0xC945DFEC,0x72552C85,0xC67322CE,0x70E2CBC6,0xC3A94590,0x6F5F02B2,0xC0E8B648,
+0x6DCA0D14,0xBE31E19B,0x6C242960,0xBB8532B0,0x6A6D98A4,0xB8E31319,0x68A69E81,
+0xB64BEACD,0x66CF8120,0xB3C0200C,0x64E88926,0xB140175B,0x62F201AC,0xAECC336C,
+0x60EC3830,0xAC64D510,0x5ED77C8A,0xAA0A5B2E,0x5CB420E0,0xA7BD22AC,0x5A82799A,
+0xA57D8666,0x5842DD54,0xA34BDF20,0x55F5A4D2,0xA1288376,0x539B2AF0,0x9F13C7D0,
+0x5133CC94,0x9D0DFE54,0x4EBFE8A5,0x9B1776DA,0x4C3FDFF4,0x99307EE0,0x49B41533,
+0x9759617F,0x471CECE7,0x9592675C,0x447ACD50,0x93DBD6A0,0x41CE1E65,0x9235F2EC,
+0x3F1749B8,0x90A0FD4E,0x3C56BA70,0x8F1D343A,0x398CDD32,0x8DAAD37B,0x36BA2014,
+0x8C4A142F,0x33DEF287,0x8AFB2CBB,0x30FBC54D,0x89BE50C3,0x2E110A62,0x8893B125,
+0x2B1F34EB,0x877B7BEC,0x2826B928,0x8675DC4F,0x25280C5E,0x8582FAA5,0x2223A4C5,
+0x84A2FC62,0x1F19F97B,0x83D60412,0x1C0B826A,0x831C314E,0x18F8B83C,0x8275A0C0,
+0x15E21445,0x81E26C16,0x12C8106F,0x8162AA04,0x0FAB272B,0x80F66E3C,0x0C8BD35E,
+0x809DC971,0x096A9049,0x8058C94C,0x0647D97C,0x80277872,0x03242ABF,0x8009DE7E,
+0x7FFFFFFF,0x00000000,0x7F62368F,0xF3742CA2,0x7D8A5F40,0xE70747C4,0x7A7D055B,
+0xDAD7F3A2,0x7641AF3D,0xCF043AB3,0x70E2CBC6,0xC3A94590,0x6A6D98A4,0xB8E31319,
+0x62F201AC,0xAECC336C,0x5A82799A,0xA57D8666,0x5133CC94,0x9D0DFE54,0x471CECE7,
+0x9592675C,0x3C56BA70,0x8F1D343A,0x30FBC54D,0x89BE50C3,0x25280C5E,0x8582FAA5,
+0x18F8B83C,0x8275A0C0,0x0C8BD35E,0x809DC971,0x7FFFFFFF,0x00000000,0x7641AF3D,
+0xCF043AB3,0x5A82799A,0xA57D8666,0x30FBC54D,0x89BE50C3,};
+
+q31_t rearranged_twiddle_stride2_4096_q31[2728]={
+0x7FFFFFFF,0x00000000,0x7FFFD886,0xFF9B781D,0x7FFF6216,0xFF36F078,0x7FFE9CB2,
+0xFED2694F,0x7FFD885A,0xFE6DE2E0,0x7FFC250F,0xFE095D69,0x7FFA72D1,0xFDA4D929,
+0x7FF871A2,0xFD40565C,0x7FF62182,0xFCDBD541,0x7FF38274,0xFC775616,0x7FF09478,
+0xFC12D91A,0x7FED5791,0xFBAE5E89,0x7FE9CBC0,0xFB49E6A3,0x7FE5F108,0xFAE571A4,
+0x7FE1C76B,0xFA80FFCB,0x7FDD4EEC,0xFA1C9157,0x7FD8878E,0xF9B82684,0x7FD37153,
+0xF953BF91,0x7FCE0C3E,0xF8EF5CBB,0x7FC85854,0xF88AFE42,0x7FC25596,0xF826A462,
+0x7FBC040A,0xF7C24F59,0x7FB563B3,0xF75DFF66,0x7FAE7495,0xF6F9B4C6,0x7FA736B4,
+0xF6956FB7,0x7F9FAA15,0xF6313077,0x7F97CEBD,0xF5CCF743,0x7F8FA4B0,0xF568C45B,
+0x7F872BF3,0xF50497FB,0x7F7E648C,0xF4A07261,0x7F754E80,0xF43C53CB,0x7F6BE9D4,
+0xF3D83C77,0x7F62368F,0xF3742CA2,0x7F5834B7,0xF310248A,0x7F4DE451,0xF2AC246E,
+0x7F434563,0xF2482C8A,0x7F3857F6,0xF1E43D1C,0x7F2D1C0E,0xF1805662,0x7F2191B4,
+0xF11C789A,0x7F15B8EE,0xF0B8A401,0x7F0991C4,0xF054D8D5,0x7EFD1C3C,0xEFF11753,
+0x7EF05860,0xEF8D5FB8,0x7EE34636,0xEF29B243,0x7ED5E5C6,0xEEC60F31,0x7EC8371A,
+0xEE6276BF,0x7EBA3A39,0xEDFEE92B,0x7EABEF2C,0xED9B66B2,0x7E9D55FC,0xED37EF91,
+0x7E8E6EB2,0xECD48407,0x7E7F3957,0xEC71244F,0x7E6FB5F4,0xEC0DD0A8,0x7E5FE493,
+0xEBAA894F,0x7E4FC53E,0xEB474E81,0x7E3F57FF,0xEAE4207A,0x7E2E9CDF,0xEA80FF7A,
+0x7E1D93EA,0xEA1DEBBB,0x7E0C3D29,0xE9BAE57D,0x7DFA98A8,0xE957ECFB,0x7DE8A670,
+0xE8F50273,0x7DD6668F,0xE8922622,0x7DC3D90D,0xE82F5844,0x7DB0FDF8,0xE7CC9917,
+0x7D9DD55A,0xE769E8D8,0x7D8A5F40,0xE70747C4,0x7D769BB5,0xE6A4B616,0x7D628AC6,
+0xE642340D,0x7D4E2C7F,0xE5DFC1E5,0x7D3980EC,0xE57D5FDA,0x7D24881B,0xE51B0E2A,
+0x7D0F4218,0xE4B8CD11,0x7CF9AEF0,0xE4569CCB,0x7CE3CEB2,0xE3F47D96,0x7CCDA169,
+0xE3926FAD,0x7CB72724,0xE330734D,0x7CA05FF1,0xE2CE88B3,0x7C894BDE,0xE26CB01B,
+0x7C71EAF9,0xE20AE9C1,0x7C5A3D50,0xE1A935E2,0x7C4242F2,0xE14794BA,0x7C29FBEE,
+0xE0E60685,0x7C116853,0xE0848B7F,0x7BF88830,0xE02323E5,0x7BDF5B94,0xDFC1CFF3,
+0x7BC5E290,0xDF608FE4,0x7BAC1D31,0xDEFF63F4,0x7B920B89,0xDE9E4C60,0x7B77ADA8,
+0xDE3D4964,0x7B5D039E,0xDDDC5B3B,0x7B420D7A,0xDD7B8220,0x7B26CB4F,0xDD1ABE51,
+0x7B0B3D2C,0xDCBA1008,0x7AEF6323,0xDC597781,0x7AD33D45,0xDBF8F4F8,0x7AB6CBA4,
+0xDB9888A8,0x7A9A0E50,0xDB3832CD,0x7A7D055B,0xDAD7F3A2,0x7A5FB0D8,0xDA77CB63,
+0x7A4210D8,0xDA17BA4A,0x7A24256F,0xD9B7C094,0x7A05EEAD,0xD957DE7A,0x79E76CA7,
+0xD8F81439,0x79C89F6E,0xD898620C,0x79A98715,0xD838C82D,0x798A23B1,0xD7D946D8,
+0x796A7554,0xD779DE47,0x794A7C12,0xD71A8EB5,0x792A37FE,0xD6BB585E,0x7909A92D,
+0xD65C3B7B,0x78E8CFB2,0xD5FD3848,0x78C7ABA2,0xD59E4EFF,0x78A63D11,0xD53F7FDA,
+0x78848414,0xD4E0CB15,0x786280BF,0xD48230E9,0x78403329,0xD423B191,0x781D9B65,
+0xD3C54D47,0x77FAB989,0xD3670446,0x77D78DAA,0xD308D6C7,0x77B417DF,0xD2AAC504,
+0x7790583E,0xD24CCF39,0x776C4EDB,0xD1EEF59E,0x7747FBCE,0xD191386E,0x77235F2D,
+0xD13397E2,0x76FE790E,0xD0D61434,0x76D94989,0xD078AD9E,0x76B3D0B4,0xD01B6459,
+0x768E0EA6,0xCFBE389F,0x76680376,0xCF612AAA,0x7641AF3D,0xCF043AB3,0x761B1211,
+0xCEA768F2,0x75F42C0B,0xCE4AB5A2,0x75CCFD42,0xCDEE20FC,0x75A585CF,0xCD91AB39,
+0x757DC5CA,0xCD355491,0x7555BD4C,0xCCD91D3D,0x752D6C6C,0xCC7D0578,0x7504D345,
+0xCC210D79,0x74DBF1EF,0xCBC53579,0x74B2C884,0xCB697DB0,0x7489571C,0xCB0DE658,
+0x745F9DD1,0xCAB26FA9,0x74359CBD,0xCA5719DB,0x740B53FB,0xC9FBE527,0x73E0C3A3,
+0xC9A0D1C5,0x73B5EBD1,0xC945DFEC,0x738ACC9E,0xC8EB0FD6,0x735F6626,0xC89061BA,
+0x7333B883,0xC835D5D0,0x7307C3D0,0xC7DB6C50,0x72DB8828,0xC7812572,0x72AF05A7,
+0xC727016D,0x72823C67,0xC6CD0079,0x72552C85,0xC67322CE,0x7227D61C,0xC61968A2,
+0x71FA3949,0xC5BFD22E,0x71CC5626,0xC5665FA9,0x719E2CD2,0xC50D1149,0x716FBD68,
+0xC4B3E746,0x71410805,0xC45AE1D7,0x71120CC5,0xC4020133,0x70E2CBC6,0xC3A94590,
+0x70B34525,0xC350AF26,0x708378FF,0xC2F83E2A,0x70536771,0xC29FF2D4,0x7023109A,
+0xC247CD5A,0x6FF27497,0xC1EFCDF3,0x6FC19385,0xC197F4D4,0x6F906D84,0xC1404233,
+0x6F5F02B2,0xC0E8B648,0x6F2D532C,0xC0915148,0x6EFB5F12,0xC03A1368,0x6EC92683,
+0xBFE2FCDF,0x6E96A99D,0xBF8C0DE3,0x6E63E87F,0xBF3546A8,0x6E30E34A,0xBEDEA765,
+0x6DFD9A1C,0xBE88304F,0x6DCA0D14,0xBE31E19B,0x6D963C54,0xBDDBBB7F,0x6D6227FA,
+0xBD85BE30,0x6D2DD027,0xBD2FE9E2,0x6CF934FC,0xBCDA3ECB,0x6CC45698,0xBC84BD1F,
+0x6C8F351C,0xBC2F6513,0x6C59D0A9,0xBBDA36DD,0x6C242960,0xBB8532B0,0x6BEE3F62,
+0xBB3058C0,0x6BB812D1,0xBADBA943,0x6B81A3CD,0xBA87246D,0x6B4AF279,0xBA32CA71,
+0x6B13FEF5,0xB9DE9B83,0x6ADCC964,0xB98A97D8,0x6AA551E9,0xB936BFA4,0x6A6D98A4,
+0xB8E31319,0x6A359DB9,0xB88F926D,0x69FD614A,0xB83C3DD1,0x69C4E37A,0xB7E9157A,
+0x698C246C,0xB796199B,0x69532442,0xB7434A67,0x6919E320,0xB6F0A812,0x68E06129,
+0xB69E32CD,0x68A69E81,0xB64BEACD,0x686C9B4B,0xB5F9D043,0x683257AB,0xB5A7E362,
+0x67F7D3C5,0xB556245E,0x67BD0FBD,0xB5049368,0x67820BB7,0xB4B330B3,0x6746C7D8,
+0xB461FC70,0x670B4444,0xB410F6D3,0x66CF8120,0xB3C0200C,0x66937E91,0xB36F784F,
+0x66573CBB,0xB31EFFCC,0x661ABBC5,0xB2CEB6B5,0x65DDFBD3,0xB27E9D3C,0x65A0FD0B,
+0xB22EB392,0x6563BF92,0xB1DEF9E9,0x6526438F,0xB18F7071,0x64E88926,0xB140175B,
+0x64AA907F,0xB0F0EEDA,0x646C59BF,0xB0A1F71D,0x642DE50D,0xB0533055,0x63EF3290,
+0xB0049AB3,0x63B0426D,0xAFB63667,0x637114CC,0xAF6803A2,0x6331A9D4,0xAF1A0293,
+0x62F201AC,0xAECC336C,0x62B21C7B,0xAE7E965B,0x6271FA69,0xAE312B92,0x62319B9D,
+0xADE3F33E,0x61F1003F,0xAD96ED92,0x61B02876,0xAD4A1ABA,0x616F146C,0xACFD7AE8,
+0x612DC447,0xACB10E4B,0x60EC3830,0xAC64D510,0x60AA7050,0xAC18CF69,0x60686CCF,
+0xABCCFD83,0x60262DD6,0xAB815F8D,0x5FE3B38D,0xAB35F5B5,0x5FA0FE1F,0xAAEAC02C,
+0x5F5E0DB3,0xAA9FBF1E,0x5F1AE274,0xAA54F2BA,0x5ED77C8A,0xAA0A5B2E,0x5E93DC1F,
+0xA9BFF8A8,0x5E50015D,0xA975CB57,0x5E0BEC6E,0xA92BD367,0x5DC79D7C,0xA8E21106,
+0x5D8314B1,0xA8988463,0x5D3E5237,0xA84F2DAA,0x5CF95638,0xA8060D08,0x5CB420E0,
+0xA7BD22AC,0x5C6EB258,0xA7746EC0,0x5C290ACC,0xA72BF174,0x5BE32A67,0xA6E3AAF2,
+0x5B9D1154,0xA69B9B68,0x5B56BFBD,0xA653C303,0x5B1035CF,0xA60C21EE,0x5AC973B5,
+0xA5C4B855,0x5A82799A,0xA57D8666,0x5A3B47AB,0xA5368C4B,0x59F3DE12,0xA4EFCA31,
+0x59AC3CFD,0xA4A94043,0x59646498,0xA462EEAC,0x591C550E,0xA41CD599,0x58D40E8C,
+0xA3D6F534,0x588B9140,0xA3914DA8,0x5842DD54,0xA34BDF20,0x57F9F2F8,0xA306A9C8,
+0x57B0D256,0xA2C1ADC9,0x57677B9D,0xA27CEB4F,0x571DEEFA,0xA2386284,0x56D42C99,
+0xA1F41392,0x568A34A9,0xA1AFFEA3,0x56400758,0xA16C23E1,0x55F5A4D2,0xA1288376,
+0x55AB0D46,0xA0E51D8C,0x556040E2,0xA0A1F24D,0x55153FD4,0xA05F01E1,0x54CA0A4B,
+0xA01C4C73,0x547EA073,0x9FD9D22A,0x5433027D,0x9F979331,0x53E73097,0x9F558FB0,
+0x539B2AF0,0x9F13C7D0,0x534EF1B5,0x9ED23BB9,0x53028518,0x9E90EB94,0x52B5E546,
+0x9E4FD78A,0x5269126E,0x9E0EFFC1,0x521C0CC2,0x9DCE6463,0x51CED46E,0x9D8E0597,
+0x518169A5,0x9D4DE385,0x5133CC94,0x9D0DFE54,0x50E5FD6D,0x9CCE562C,0x5097FC5E,
+0x9C8EEB34,0x5049C999,0x9C4FBD93,0x4FFB654D,0x9C10CD70,0x4FACCFAB,0x9BD21AF3,
+0x4F5E08E3,0x9B93A641,0x4F0F1126,0x9B556F81,0x4EBFE8A5,0x9B1776DA,0x4E708F8F,
+0x9AD9BC71,0x4E210617,0x9A9C406E,0x4DD14C6E,0x9A5F02F5,0x4D8162C4,0x9A22042D,
+0x4D31494B,0x99E5443B,0x4CE10034,0x99A8C345,0x4C9087B1,0x996C816F,0x4C3FDFF4,
+0x99307EE0,0x4BEF092D,0x98F4BBBC,0x4B9E0390,0x98B93828,0x4B4CCF4D,0x987DF449,
+0x4AFB6C98,0x9842F043,0x4AA9DBA2,0x98082C3B,0x4A581C9E,0x97CDA855,0x4A062FBD,
+0x979364B5,0x49B41533,0x9759617F,0x4961CD33,0x971F9ED7,0x490F57EE,0x96E61CE0,
+0x48BCB599,0x96ACDBBE,0x4869E665,0x9673DB94,0x4816EA86,0x963B1C86,0x47C3C22F,
+0x96029EB6,0x47706D93,0x95CA6247,0x471CECE7,0x9592675C,0x46C9405C,0x955AAE17,
+0x46756828,0x9523369C,0x4621647D,0x94EC010B,0x45CD358F,0x94B50D87,0x4578DB93,
+0x947E5C33,0x452456BD,0x9447ED2F,0x44CFA740,0x9411C09E,0x447ACD50,0x93DBD6A0,
+0x4425C923,0x93A62F57,0x43D09AED,0x9370CAE4,0x437B42E1,0x933BA968,0x4325C135,
+0x9306CB04,0x42D0161E,0x92D22FD9,0x427A41D0,0x929DD806,0x42244481,0x9269C3AC,
+0x41CE1E65,0x9235F2EC,0x4177CFB1,0x920265E4,0x4121589B,0x91CF1CB6,0x40CAB958,
+0x919C1781,0x4073F21D,0x91695663,0x401D0321,0x9136D97D,0x3FC5EC98,0x9104A0EE,
+0x3F6EAEB8,0x90D2ACD4,0x3F1749B8,0x90A0FD4E,0x3EBFBDCD,0x906F927C,0x3E680B2C,
+0x903E6C7B,0x3E10320D,0x900D8B69,0x3DB832A6,0x8FDCEF66,0x3D600D2C,0x8FAC988F,
+0x3D07C1D6,0x8F7C8701,0x3CAF50DA,0x8F4CBADB,0x3C56BA70,0x8F1D343A,0x3BFDFECD,
+0x8EEDF33B,0x3BA51E29,0x8EBEF7FB,0x3B4C18BA,0x8E904298,0x3AF2EEB7,0x8E61D32E,
+0x3A99A057,0x8E33A9DA,0x3A402DD2,0x8E05C6B7,0x39E6975E,0x8DD829E4,0x398CDD32,
+0x8DAAD37B,0x3932FF87,0x8D7DC399,0x38D8FE93,0x8D50FA59,0x387EDA8E,0x8D2477D8,
+0x382493B0,0x8CF83C30,0x37CA2A30,0x8CCC477D,0x376F9E46,0x8CA099DA,0x3714F02A,
+0x8C753362,0x36BA2014,0x8C4A142F,0x365F2E3B,0x8C1F3C5D,0x36041AD9,0x8BF4AC05,
+0x35A8E625,0x8BCA6343,0x354D9057,0x8BA0622F,0x34F219A8,0x8B76A8E4,0x34968250,
+0x8B4D377C,0x343ACA87,0x8B240E11,0x33DEF287,0x8AFB2CBB,0x3382FA88,0x8AD29394,
+0x3326E2C3,0x8AAA42B4,0x32CAAB6F,0x8A823A36,0x326E54C7,0x8A5A7A31,0x3211DF04,
+0x8A3302BE,0x31B54A5E,0x8A0BD3F5,0x3158970E,0x89E4EDEF,0x30FBC54D,0x89BE50C3,
+0x309ED556,0x8997FC8A,0x3041C761,0x8971F15A,0x2FE49BA7,0x894C2F4C,0x2F875262,
+0x8926B677,0x2F29EBCC,0x890186F2,0x2ECC681E,0x88DCA0D3,0x2E6EC792,0x88B80432,
+0x2E110A62,0x8893B125,0x2DB330C7,0x886FA7C2,0x2D553AFC,0x884BE821,0x2CF72939,
+0x88287256,0x2C98FBBA,0x88054677,0x2C3AB2B9,0x87E2649B,0x2BDC4E6F,0x87BFCCD7,
+0x2B7DCF17,0x879D7F41,0x2B1F34EB,0x877B7BEC,0x2AC08026,0x8759C2EF,0x2A61B101,
+0x8738545E,0x2A02C7B8,0x8717304E,0x29A3C485,0x86F656D3,0x2944A7A2,0x86D5C802,
+0x28E5714B,0x86B583EE,0x288621B9,0x86958AAC,0x2826B928,0x8675DC4F,0x27C737D3,
+0x865678EB,0x27679DF4,0x86376092,0x2707EBC7,0x86189359,0x26A82186,0x85FA1153,
+0x26483F6C,0x85DBDA91,0x25E845B6,0x85BDEF28,0x2588349D,0x85A04F28,0x25280C5E,
+0x8582FAA5,0x24C7CD33,0x8565F1B0,0x24677758,0x8549345C,0x24070B08,0x852CC2BB,
+0x23A6887F,0x85109CDD,0x2345EFF8,0x84F4C2D4,0x22E541AF,0x84D934B1,0x22847DE0,
+0x84BDF286,0x2223A4C5,0x84A2FC62,0x21C2B69C,0x84885258,0x2161B3A0,0x846DF477,
+0x21009C0C,0x8453E2CF,0x209F701C,0x843A1D70,0x203E300D,0x8420A46C,0x1FDCDC1B,
+0x840777D0,0x1F7B7481,0x83EE97AD,0x1F19F97B,0x83D60412,0x1EB86B46,0x83BDBD0E,
+0x1E56CA1E,0x83A5C2B0,0x1DF5163F,0x838E1507,0x1D934FE5,0x8376B422,0x1D31774D,
+0x835FA00F,0x1CCF8CB3,0x8348D8DC,0x1C6D9053,0x83325E97,0x1C0B826A,0x831C314E,
+0x1BA96335,0x83065110,0x1B4732EF,0x82F0BDE8,0x1AE4F1D6,0x82DB77E5,0x1A82A026,
+0x82C67F14,0x1A203E1B,0x82B1D381,0x19BDCBF3,0x829D753A,0x195B49EA,0x8289644B,
+0x18F8B83C,0x8275A0C0,0x18961728,0x82622AA6,0x183366E9,0x824F0208,0x17D0A7BC,
+0x823C26F3,0x176DD9DE,0x82299971,0x170AFD8D,0x82175990,0x16A81305,0x82056758,
+0x16451A83,0x81F3C2D7,0x15E21445,0x81E26C16,0x157F0086,0x81D16321,0x151BDF86,
+0x81C0A801,0x14B8B17F,0x81B03AC2,0x145576B1,0x81A01B6D,0x13F22F58,0x81904A0C,
+0x138EDBB1,0x8180C6A9,0x132B7BF9,0x8171914E,0x12C8106F,0x8162AA04,0x1264994E,
+0x815410D4,0x120116D5,0x8145C5C7,0x119D8941,0x8137C8E6,0x1139F0CF,0x812A1A3A,
+0x10D64DBD,0x811CB9CA,0x1072A048,0x810FA7A0,0x100EE8AD,0x8102E3C4,0x0FAB272B,
+0x80F66E3C,0x0F475BFF,0x80EA4712,0x0EE38766,0x80DE6E4C,0x0E7FA99E,0x80D2E3F2,
+0x0E1BC2E4,0x80C7A80A,0x0DB7D376,0x80BCBA9D,0x0D53DB92,0x80B21BAF,0x0CEFDB76,
+0x80A7CB49,0x0C8BD35E,0x809DC971,0x0C27C389,0x8094162C,0x0BC3AC35,0x808AB180,
+0x0B5F8D9F,0x80819B74,0x0AFB6805,0x8078D40D,0x0A973BA5,0x80705B50,0x0A3308BD,
+0x80683143,0x09CECF89,0x806055EB,0x096A9049,0x8058C94C,0x09064B3A,0x80518B6B,
+0x08A2009A,0x804A9C4D,0x083DB0A7,0x8043FBF6,0x07D95B9E,0x803DAA6A,0x077501BE,
+0x8037A7AC,0x0710A345,0x8031F3C2,0x06AC406F,0x802C8EAD,0x0647D97C,0x80277872,
+0x05E36EA9,0x8022B114,0x057F0035,0x801E3895,0x051A8E5C,0x801A0EF8,0x04B6195D,
+0x80163440,0x0451A177,0x8012A86F,0x03ED26E6,0x800F6B88,0x0388A9EA,0x800C7D8C,
+0x03242ABF,0x8009DE7E,0x02BFA9A4,0x80078E5E,0x025B26D7,0x80058D2F,0x01F6A297,
+0x8003DAF1,0x01921D20,0x800277A6,0x012D96B1,0x8001634E,0x00C90F88,0x80009DEA,
+0x006487E3,0x8000277A,0x00000000,0x80000000,0xFF9B781D,0x8000277A,0xFF36F078,
+0x80009DEA,0xFED2694F,0x8001634E,0xFE6DE2E0,0x800277A6,0xFE095D69,0x8003DAF1,
+0xFDA4D929,0x80058D2F,0xFD40565C,0x80078E5E,0xFCDBD541,0x8009DE7E,0xFC775616,
+0x800C7D8C,0xFC12D91A,0x800F6B88,0xFBAE5E89,0x8012A86F,0xFB49E6A3,0x80163440,
+0xFAE571A4,0x801A0EF8,0xFA80FFCB,0x801E3895,0xFA1C9157,0x8022B114,0xF9B82684,
+0x80277872,0xF953BF91,0x802C8EAD,0xF8EF5CBB,0x8031F3C2,0xF88AFE42,0x8037A7AC,
+0xF826A462,0x803DAA6A,0xF7C24F59,0x8043FBF6,0xF75DFF66,0x804A9C4D,0xF6F9B4C6,
+0x80518B6B,0xF6956FB7,0x8058C94C,0xF6313077,0x806055EB,0xF5CCF743,0x80683143,
+0xF568C45B,0x80705B50,0xF50497FB,0x8078D40D,0xF4A07261,0x80819B74,0xF43C53CB,
+0x808AB180,0xF3D83C77,0x8094162C,0xF3742CA2,0x809DC971,0xF310248A,0x80A7CB49,
+0xF2AC246E,0x80B21BAF,0xF2482C8A,0x80BCBA9D,0xF1E43D1C,0x80C7A80A,0xF1805662,
+0x80D2E3F2,0xF11C789A,0x80DE6E4C,0xF0B8A401,0x80EA4712,0xF054D8D5,0x80F66E3C,
+0xEFF11753,0x8102E3C4,0xEF8D5FB8,0x810FA7A0,0xEF29B243,0x811CB9CA,0xEEC60F31,
+0x812A1A3A,0xEE6276BF,0x8137C8E6,0xEDFEE92B,0x8145C5C7,0xED9B66B2,0x815410D4,
+0xED37EF91,0x8162AA04,0xECD48407,0x8171914E,0xEC71244F,0x8180C6A9,0xEC0DD0A8,
+0x81904A0C,0xEBAA894F,0x81A01B6D,0xEB474E81,0x81B03AC2,0xEAE4207A,0x81C0A801,
+0xEA80FF7A,0x81D16321,0xEA1DEBBB,0x81E26C16,0xE9BAE57D,0x81F3C2D7,0xE957ECFB,
+0x82056758,0xE8F50273,0x82175990,0xE8922622,0x82299971,0xE82F5844,0x823C26F3,
+0xE7CC9917,0x824F0208,0xE769E8D8,0x82622AA6,0xE70747C4,0x8275A0C0,0xE6A4B616,
+0x8289644B,0xE642340D,0x829D753A,0xE5DFC1E5,0x82B1D381,0xE57D5FDA,0x82C67F14,
+0xE51B0E2A,0x82DB77E5,0xE4B8CD11,0x82F0BDE8,0xE4569CCB,0x83065110,0xE3F47D96,
+0x831C314E,0xE3926FAD,0x83325E97,0xE330734D,0x8348D8DC,0xE2CE88B3,0x835FA00F,
+0xE26CB01B,0x8376B422,0xE20AE9C1,0x838E1507,0xE1A935E2,0x83A5C2B0,0xE14794BA,
+0x83BDBD0E,0xE0E60685,0x83D60412,0xE0848B7F,0x83EE97AD,0xE02323E5,0x840777D0,
+0xDFC1CFF3,0x8420A46C,0xDF608FE4,0x843A1D70,0xDEFF63F4,0x8453E2CF,0xDE9E4C60,
+0x846DF477,0xDE3D4964,0x84885258,0xDDDC5B3B,0x84A2FC62,0xDD7B8220,0x84BDF286,
+0xDD1ABE51,0x84D934B1,0xDCBA1008,0x84F4C2D4,0xDC597781,0x85109CDD,0xDBF8F4F8,
+0x852CC2BB,0xDB9888A8,0x8549345C,0xDB3832CD,0x8565F1B0,0xDAD7F3A2,0x8582FAA5,
+0xDA77CB63,0x85A04F28,0xDA17BA4A,0x85BDEF28,0xD9B7C094,0x85DBDA91,0xD957DE7A,
+0x85FA1153,0xD8F81439,0x86189359,0xD898620C,0x86376092,0xD838C82D,0x865678EB,
+0xD7D946D8,0x8675DC4F,0xD779DE47,0x86958AAC,0xD71A8EB5,0x86B583EE,0xD6BB585E,
+0x86D5C802,0xD65C3B7B,0x86F656D3,0xD5FD3848,0x8717304E,0xD59E4EFF,0x8738545E,
+0xD53F7FDA,0x8759C2EF,0xD4E0CB15,0x877B7BEC,0xD48230E9,0x879D7F41,0xD423B191,
+0x87BFCCD7,0xD3C54D47,0x87E2649B,0xD3670446,0x88054677,0xD308D6C7,0x88287256,
+0xD2AAC504,0x884BE821,0xD24CCF39,0x886FA7C2,0xD1EEF59E,0x8893B125,0xD191386E,
+0x88B80432,0xD13397E2,0x88DCA0D3,0xD0D61434,0x890186F2,0xD078AD9E,0x8926B677,
+0xD01B6459,0x894C2F4C,0xCFBE389F,0x8971F15A,0xCF612AAA,0x8997FC8A,0xCF043AB3,
+0x89BE50C3,0xCEA768F2,0x89E4EDEF,0xCE4AB5A2,0x8A0BD3F5,0xCDEE20FC,0x8A3302BE,
+0xCD91AB39,0x8A5A7A31,0xCD355491,0x8A823A36,0xCCD91D3D,0x8AAA42B4,0xCC7D0578,
+0x8AD29394,0xCC210D79,0x8AFB2CBB,0xCBC53579,0x8B240E11,0xCB697DB0,0x8B4D377C,
+0xCB0DE658,0x8B76A8E4,0xCAB26FA9,0x8BA0622F,0xCA5719DB,0x8BCA6343,0xC9FBE527,
+0x8BF4AC05,0xC9A0D1C5,0x8C1F3C5D,0xC945DFEC,0x8C4A142F,0xC8EB0FD6,0x8C753362,
+0xC89061BA,0x8CA099DA,0xC835D5D0,0x8CCC477D,0xC7DB6C50,0x8CF83C30,0xC7812572,
+0x8D2477D8,0xC727016D,0x8D50FA59,0xC6CD0079,0x8D7DC399,0xC67322CE,0x8DAAD37B,
+0xC61968A2,0x8DD829E4,0xC5BFD22E,0x8E05C6B7,0xC5665FA9,0x8E33A9DA,0xC50D1149,
+0x8E61D32E,0xC4B3E746,0x8E904298,0xC45AE1D7,0x8EBEF7FB,0xC4020133,0x8EEDF33B,
+0xC3A94590,0x8F1D343A,0xC350AF26,0x8F4CBADB,0xC2F83E2A,0x8F7C8701,0xC29FF2D4,
+0x8FAC988F,0xC247CD5A,0x8FDCEF66,0xC1EFCDF3,0x900D8B69,0xC197F4D4,0x903E6C7B,
+0xC1404233,0x906F927C,0xC0E8B648,0x90A0FD4E,0xC0915148,0x90D2ACD4,0xC03A1368,
+0x9104A0EE,0xBFE2FCDF,0x9136D97D,0xBF8C0DE3,0x91695663,0xBF3546A8,0x919C1781,
+0xBEDEA765,0x91CF1CB6,0xBE88304F,0x920265E4,0xBE31E19B,0x9235F2EC,0xBDDBBB7F,
+0x9269C3AC,0xBD85BE30,0x929DD806,0xBD2FE9E2,0x92D22FD9,0xBCDA3ECB,0x9306CB04,
+0xBC84BD1F,0x933BA968,0xBC2F6513,0x9370CAE4,0xBBDA36DD,0x93A62F57,0xBB8532B0,
+0x93DBD6A0,0xBB3058C0,0x9411C09E,0xBADBA943,0x9447ED2F,0xBA87246D,0x947E5C33,
+0xBA32CA71,0x94B50D87,0xB9DE9B83,0x94EC010B,0xB98A97D8,0x9523369C,0xB936BFA4,
+0x955AAE17,0xB8E31319,0x9592675C,0xB88F926D,0x95CA6247,0xB83C3DD1,0x96029EB6,
+0xB7E9157A,0x963B1C86,0xB796199B,0x9673DB94,0xB7434A67,0x96ACDBBE,0xB6F0A812,
+0x96E61CE0,0xB69E32CD,0x971F9ED7,0xB64BEACD,0x9759617F,0xB5F9D043,0x979364B5,
+0xB5A7E362,0x97CDA855,0xB556245E,0x98082C3B,0xB5049368,0x9842F043,0xB4B330B3,
+0x987DF449,0xB461FC70,0x98B93828,0xB410F6D3,0x98F4BBBC,0xB3C0200C,0x99307EE0,
+0xB36F784F,0x996C816F,0xB31EFFCC,0x99A8C345,0xB2CEB6B5,0x99E5443B,0xB27E9D3C,
+0x9A22042D,0xB22EB392,0x9A5F02F5,0xB1DEF9E9,0x9A9C406E,0xB18F7071,0x9AD9BC71,
+0xB140175B,0x9B1776DA,0xB0F0EEDA,0x9B556F81,0xB0A1F71D,0x9B93A641,0xB0533055,
+0x9BD21AF3,0xB0049AB3,0x9C10CD70,0xAFB63667,0x9C4FBD93,0xAF6803A2,0x9C8EEB34,
+0xAF1A0293,0x9CCE562C,0xAECC336C,0x9D0DFE54,0xAE7E965B,0x9D4DE385,0xAE312B92,
+0x9D8E0597,0xADE3F33E,0x9DCE6463,0xAD96ED92,0x9E0EFFC1,0xAD4A1ABA,0x9E4FD78A,
+0xACFD7AE8,0x9E90EB94,0xACB10E4B,0x9ED23BB9,0xAC64D510,0x9F13C7D0,0xAC18CF69,
+0x9F558FB0,0xABCCFD83,0x9F979331,0xAB815F8D,0x9FD9D22A,0xAB35F5B5,0xA01C4C73,
+0xAAEAC02C,0xA05F01E1,0xAA9FBF1E,0xA0A1F24D,0xAA54F2BA,0xA0E51D8C,0xAA0A5B2E,
+0xA1288376,0xA9BFF8A8,0xA16C23E1,0xA975CB57,0xA1AFFEA3,0xA92BD367,0xA1F41392,
+0xA8E21106,0xA2386284,0xA8988463,0xA27CEB4F,0xA84F2DAA,0xA2C1ADC9,0xA8060D08,
+0xA306A9C8,0xA7BD22AC,0xA34BDF20,0xA7746EC0,0xA3914DA8,0xA72BF174,0xA3D6F534,
+0xA6E3AAF2,0xA41CD599,0xA69B9B68,0xA462EEAC,0xA653C303,0xA4A94043,0xA60C21EE,
+0xA4EFCA31,0xA5C4B855,0xA5368C4B,0xA57D8666,0xA57D8666,0xA5368C4B,0xA5C4B855,
+0xA4EFCA31,0xA60C21EE,0xA4A94043,0xA653C303,0xA462EEAC,0xA69B9B68,0xA41CD599,
+0xA6E3AAF2,0xA3D6F534,0xA72BF174,0xA3914DA8,0xA7746EC0,0xA34BDF20,0xA7BD22AC,
+0xA306A9C8,0xA8060D08,0xA2C1ADC9,0xA84F2DAA,0xA27CEB4F,0xA8988463,0xA2386284,
+0xA8E21106,0xA1F41392,0xA92BD367,0xA1AFFEA3,0xA975CB57,0xA16C23E1,0xA9BFF8A8,
+0xA1288376,0xAA0A5B2E,0xA0E51D8C,0xAA54F2BA,0xA0A1F24D,0xAA9FBF1E,0xA05F01E1,
+0xAAEAC02C,0xA01C4C73,0xAB35F5B5,0x9FD9D22A,0xAB815F8D,0x9F979331,0xABCCFD83,
+0x9F558FB0,0xAC18CF69,0x9F13C7D0,0xAC64D510,0x9ED23BB9,0xACB10E4B,0x9E90EB94,
+0xACFD7AE8,0x9E4FD78A,0xAD4A1ABA,0x9E0EFFC1,0xAD96ED92,0x9DCE6463,0xADE3F33E,
+0x9D8E0597,0xAE312B92,0x9D4DE385,0xAE7E965B,0x9D0DFE54,0xAECC336C,0x9CCE562C,
+0xAF1A0293,0x9C8EEB34,0xAF6803A2,0x9C4FBD93,0xAFB63667,0x9C10CD70,0xB0049AB3,
+0x9BD21AF3,0xB0533055,0x9B93A641,0xB0A1F71D,0x9B556F81,0xB0F0EEDA,0x9B1776DA,
+0xB140175B,0x9AD9BC71,0xB18F7071,0x9A9C406E,0xB1DEF9E9,0x9A5F02F5,0xB22EB392,
+0x9A22042D,0xB27E9D3C,0x99E5443B,0xB2CEB6B5,0x99A8C345,0xB31EFFCC,0x996C816F,
+0xB36F784F,0x99307EE0,0xB3C0200C,0x98F4BBBC,0xB410F6D3,0x98B93828,0xB461FC70,
+0x987DF449,0xB4B330B3,0x9842F043,0xB5049368,0x98082C3B,0xB556245E,0x97CDA855,
+0xB5A7E362,0x979364B5,0xB5F9D043,0x9759617F,0xB64BEACD,0x971F9ED7,0xB69E32CD,
+0x96E61CE0,0xB6F0A812,0x96ACDBBE,0xB7434A67,0x9673DB94,0xB796199B,0x963B1C86,
+0xB7E9157A,0x96029EB6,0xB83C3DD1,0x95CA6247,0xB88F926D,0x9592675C,0xB8E31319,
+0x955AAE17,0xB936BFA4,0x9523369C,0xB98A97D8,0x94EC010B,0xB9DE9B83,0x94B50D87,
+0xBA32CA71,0x947E5C33,0xBA87246D,0x9447ED2F,0xBADBA943,0x9411C09E,0xBB3058C0,
+0x93DBD6A0,0xBB8532B0,0x93A62F57,0xBBDA36DD,0x9370CAE4,0xBC2F6513,0x933BA968,
+0xBC84BD1F,0x9306CB04,0xBCDA3ECB,0x92D22FD9,0xBD2FE9E2,0x929DD806,0xBD85BE30,
+0x9269C3AC,0xBDDBBB7F,0x9235F2EC,0xBE31E19B,0x920265E4,0xBE88304F,0x91CF1CB6,
+0xBEDEA765,0x919C1781,0xBF3546A8,0x91695663,0xBF8C0DE3,0x9136D97D,0xBFE2FCDF,
+0x9104A0EE,0xC03A1368,0x90D2ACD4,0xC0915148,0x90A0FD4E,0xC0E8B648,0x906F927C,
+0xC1404233,0x903E6C7B,0xC197F4D4,0x900D8B69,0xC1EFCDF3,0x8FDCEF66,0xC247CD5A,
+0x8FAC988F,0xC29FF2D4,0x8F7C8701,0xC2F83E2A,0x8F4CBADB,0xC350AF26,0x8F1D343A,
+0xC3A94590,0x8EEDF33B,0xC4020133,0x8EBEF7FB,0xC45AE1D7,0x8E904298,0xC4B3E746,
+0x8E61D32E,0xC50D1149,0x8E33A9DA,0xC5665FA9,0x8E05C6B7,0xC5BFD22E,0x8DD829E4,
+0xC61968A2,0x8DAAD37B,0xC67322CE,0x8D7DC399,0xC6CD0079,0x8D50FA59,0xC727016D,
+0x8D2477D8,0xC7812572,0x8CF83C30,0xC7DB6C50,0x8CCC477D,0xC835D5D0,0x8CA099DA,
+0xC89061BA,0x8C753362,0xC8EB0FD6,0x8C4A142F,0xC945DFEC,0x8C1F3C5D,0xC9A0D1C5,
+0x8BF4AC05,0xC9FBE527,0x8BCA6343,0xCA5719DB,0x8BA0622F,0xCAB26FA9,0x8B76A8E4,
+0xCB0DE658,0x8B4D377C,0xCB697DB0,0x8B240E11,0xCBC53579,0x8AFB2CBB,0xCC210D79,
+0x8AD29394,0xCC7D0578,0x8AAA42B4,0xCCD91D3D,0x8A823A36,0xCD355491,0x8A5A7A31,
+0xCD91AB39,0x8A3302BE,0xCDEE20FC,0x8A0BD3F5,0xCE4AB5A2,0x89E4EDEF,0xCEA768F2,
+0x89BE50C3,0xCF043AB3,0x8997FC8A,0xCF612AAA,0x8971F15A,0xCFBE389F,0x894C2F4C,
+0xD01B6459,0x8926B677,0xD078AD9E,0x890186F2,0xD0D61434,0x88DCA0D3,0xD13397E2,
+0x88B80432,0xD191386E,0x8893B125,0xD1EEF59E,0x886FA7C2,0xD24CCF39,0x884BE821,
+0xD2AAC504,0x88287256,0xD308D6C7,0x88054677,0xD3670446,0x87E2649B,0xD3C54D47,
+0x87BFCCD7,0xD423B191,0x879D7F41,0xD48230E9,0x877B7BEC,0xD4E0CB15,0x8759C2EF,
+0xD53F7FDA,0x8738545E,0xD59E4EFF,0x8717304E,0xD5FD3848,0x86F656D3,0xD65C3B7B,
+0x86D5C802,0xD6BB585E,0x86B583EE,0xD71A8EB5,0x86958AAC,0xD779DE47,0x8675DC4F,
+0xD7D946D8,0x865678EB,0xD838C82D,0x86376092,0xD898620C,0x86189359,0xD8F81439,
+0x85FA1153,0xD957DE7A,0x85DBDA91,0xD9B7C094,0x85BDEF28,0xDA17BA4A,0x85A04F28,
+0xDA77CB63,0x8582FAA5,0xDAD7F3A2,0x8565F1B0,0xDB3832CD,0x8549345C,0xDB9888A8,
+0x852CC2BB,0xDBF8F4F8,0x85109CDD,0xDC597781,0x84F4C2D4,0xDCBA1008,0x84D934B1,
+0xDD1ABE51,0x84BDF286,0xDD7B8220,0x84A2FC62,0xDDDC5B3B,0x84885258,0xDE3D4964,
+0x846DF477,0xDE9E4C60,0x8453E2CF,0xDEFF63F4,0x843A1D70,0xDF608FE4,0x8420A46C,
+0xDFC1CFF3,0x840777D0,0xE02323E5,0x83EE97AD,0xE0848B7F,0x83D60412,0xE0E60685,
+0x83BDBD0E,0xE14794BA,0x83A5C2B0,0xE1A935E2,0x838E1507,0xE20AE9C1,0x8376B422,
+0xE26CB01B,0x835FA00F,0xE2CE88B3,0x8348D8DC,0xE330734D,0x83325E97,0xE3926FAD,
+0x831C314E,0xE3F47D96,0x83065110,0xE4569CCB,0x82F0BDE8,0xE4B8CD11,0x82DB77E5,
+0xE51B0E2A,0x82C67F14,0xE57D5FDA,0x82B1D381,0xE5DFC1E5,0x829D753A,0xE642340D,
+0x8289644B,0xE6A4B616,0x8275A0C0,0xE70747C4,0x82622AA6,0xE769E8D8,0x824F0208,
+0xE7CC9917,0x823C26F3,0xE82F5844,0x82299971,0xE8922622,0x82175990,0xE8F50273,
+0x82056758,0xE957ECFB,0x81F3C2D7,0xE9BAE57D,0x81E26C16,0xEA1DEBBB,0x81D16321,
+0xEA80FF7A,0x81C0A801,0xEAE4207A,0x81B03AC2,0xEB474E81,0x81A01B6D,0xEBAA894F,
+0x81904A0C,0xEC0DD0A8,0x8180C6A9,0xEC71244F,0x8171914E,0xECD48407,0x8162AA04,
+0xED37EF91,0x815410D4,0xED9B66B2,0x8145C5C7,0xEDFEE92B,0x8137C8E6,0xEE6276BF,
+0x812A1A3A,0xEEC60F31,0x811CB9CA,0xEF29B243,0x810FA7A0,0xEF8D5FB8,0x8102E3C4,
+0xEFF11753,0x80F66E3C,0xF054D8D5,0x80EA4712,0xF0B8A401,0x80DE6E4C,0xF11C789A,
+0x80D2E3F2,0xF1805662,0x80C7A80A,0xF1E43D1C,0x80BCBA9D,0xF2482C8A,0x80B21BAF,
+0xF2AC246E,0x80A7CB49,0xF310248A,0x809DC971,0xF3742CA2,0x8094162C,0xF3D83C77,
+0x808AB180,0xF43C53CB,0x80819B74,0xF4A07261,0x8078D40D,0xF50497FB,0x80705B50,
+0xF568C45B,0x80683143,0xF5CCF743,0x806055EB,0xF6313077,0x8058C94C,0xF6956FB7,
+0x80518B6B,0xF6F9B4C6,0x804A9C4D,0xF75DFF66,0x8043FBF6,0xF7C24F59,0x803DAA6A,
+0xF826A462,0x8037A7AC,0xF88AFE42,0x8031F3C2,0xF8EF5CBB,0x802C8EAD,0xF953BF91,
+0x80277872,0xF9B82684,0x8022B114,0xFA1C9157,0x801E3895,0xFA80FFCB,0x801A0EF8,
+0xFAE571A4,0x80163440,0xFB49E6A3,0x8012A86F,0xFBAE5E89,0x800F6B88,0xFC12D91A,
+0x800C7D8C,0xFC775616,0x8009DE7E,0xFCDBD541,0x80078E5E,0xFD40565C,0x80058D2F,
+0xFDA4D929,0x8003DAF1,0xFE095D69,0x800277A6,0xFE6DE2E0,0x8001634E,0xFED2694F,
+0x80009DEA,0xFF36F078,0x8000277A,0xFF9B781D,0x7FFFFFFF,0x00000000,0x7FFD885A,
+0xFE6DE2E0,0x7FF62182,0xFCDBD541,0x7FE9CBC0,0xFB49E6A3,0x7FD8878E,0xF9B82684,
+0x7FC25596,0xF826A462,0x7FA736B4,0xF6956FB7,0x7F872BF3,0xF50497FB,0x7F62368F,
+0xF3742CA2,0x7F3857F6,0xF1E43D1C,0x7F0991C4,0xF054D8D5,0x7ED5E5C6,0xEEC60F31,
+0x7E9D55FC,0xED37EF91,0x7E5FE493,0xEBAA894F,0x7E1D93EA,0xEA1DEBBB,0x7DD6668F,
+0xE8922622,0x7D8A5F40,0xE70747C4,0x7D3980EC,0xE57D5FDA,0x7CE3CEB2,0xE3F47D96,
+0x7C894BDE,0xE26CB01B,0x7C29FBEE,0xE0E60685,0x7BC5E290,0xDF608FE4,0x7B5D039E,
+0xDDDC5B3B,0x7AEF6323,0xDC597781,0x7A7D055B,0xDAD7F3A2,0x7A05EEAD,0xD957DE7A,
+0x798A23B1,0xD7D946D8,0x7909A92D,0xD65C3B7B,0x78848414,0xD4E0CB15,0x77FAB989,
+0xD3670446,0x776C4EDB,0xD1EEF59E,0x76D94989,0xD078AD9E,0x7641AF3D,0xCF043AB3,
+0x75A585CF,0xCD91AB39,0x7504D345,0xCC210D79,0x745F9DD1,0xCAB26FA9,0x73B5EBD1,
+0xC945DFEC,0x7307C3D0,0xC7DB6C50,0x72552C85,0xC67322CE,0x719E2CD2,0xC50D1149,
+0x70E2CBC6,0xC3A94590,0x7023109A,0xC247CD5A,0x6F5F02B2,0xC0E8B648,0x6E96A99D,
+0xBF8C0DE3,0x6DCA0D14,0xBE31E19B,0x6CF934FC,0xBCDA3ECB,0x6C242960,0xBB8532B0,
+0x6B4AF279,0xBA32CA71,0x6A6D98A4,0xB8E31319,0x698C246C,0xB796199B,0x68A69E81,
+0xB64BEACD,0x67BD0FBD,0xB5049368,0x66CF8120,0xB3C0200C,0x65DDFBD3,0xB27E9D3C,
+0x64E88926,0xB140175B,0x63EF3290,0xB0049AB3,0x62F201AC,0xAECC336C,0x61F1003F,
+0xAD96ED92,0x60EC3830,0xAC64D510,0x5FE3B38D,0xAB35F5B5,0x5ED77C8A,0xAA0A5B2E,
+0x5DC79D7C,0xA8E21106,0x5CB420E0,0xA7BD22AC,0x5B9D1154,0xA69B9B68,0x5A82799A,
+0xA57D8666,0x59646498,0xA462EEAC,0x5842DD54,0xA34BDF20,0x571DEEFA,0xA2386284,
+0x55F5A4D2,0xA1288376,0x54CA0A4B,0xA01C4C73,0x539B2AF0,0x9F13C7D0,0x5269126E,
+0x9E0EFFC1,0x5133CC94,0x9D0DFE54,0x4FFB654D,0x9C10CD70,0x4EBFE8A5,0x9B1776DA,
+0x4D8162C4,0x9A22042D,0x4C3FDFF4,0x99307EE0,0x4AFB6C98,0x9842F043,0x49B41533,
+0x9759617F,0x4869E665,0x9673DB94,0x471CECE7,0x9592675C,0x45CD358F,0x94B50D87,
+0x447ACD50,0x93DBD6A0,0x4325C135,0x9306CB04,0x41CE1E65,0x9235F2EC,0x4073F21D,
+0x91695663,0x3F1749B8,0x90A0FD4E,0x3DB832A6,0x8FDCEF66,0x3C56BA70,0x8F1D343A,
+0x3AF2EEB7,0x8E61D32E,0x398CDD32,0x8DAAD37B,0x382493B0,0x8CF83C30,0x36BA2014,
+0x8C4A142F,0x354D9057,0x8BA0622F,0x33DEF287,0x8AFB2CBB,0x326E54C7,0x8A5A7A31,
+0x30FBC54D,0x89BE50C3,0x2F875262,0x8926B677,0x2E110A62,0x8893B125,0x2C98FBBA,
+0x88054677,0x2B1F34EB,0x877B7BEC,0x29A3C485,0x86F656D3,0x2826B928,0x8675DC4F,
+0x26A82186,0x85FA1153,0x25280C5E,0x8582FAA5,0x23A6887F,0x85109CDD,0x2223A4C5,
+0x84A2FC62,0x209F701C,0x843A1D70,0x1F19F97B,0x83D60412,0x1D934FE5,0x8376B422,
+0x1C0B826A,0x831C314E,0x1A82A026,0x82C67F14,0x18F8B83C,0x8275A0C0,0x176DD9DE,
+0x82299971,0x15E21445,0x81E26C16,0x145576B1,0x81A01B6D,0x12C8106F,0x8162AA04,
+0x1139F0CF,0x812A1A3A,0x0FAB272B,0x80F66E3C,0x0E1BC2E4,0x80C7A80A,0x0C8BD35E,
+0x809DC971,0x0AFB6805,0x8078D40D,0x096A9049,0x8058C94C,0x07D95B9E,0x803DAA6A,
+0x0647D97C,0x80277872,0x04B6195D,0x80163440,0x03242ABF,0x8009DE7E,0x01921D20,
+0x800277A6,0x00000000,0x80000000,0xFE6DE2E0,0x800277A6,0xFCDBD541,0x8009DE7E,
+0xFB49E6A3,0x80163440,0xF9B82684,0x80277872,0xF826A462,0x803DAA6A,0xF6956FB7,
+0x8058C94C,0xF50497FB,0x8078D40D,0xF3742CA2,0x809DC971,0xF1E43D1C,0x80C7A80A,
+0xF054D8D5,0x80F66E3C,0xEEC60F31,0x812A1A3A,0xED37EF91,0x8162AA04,0xEBAA894F,
+0x81A01B6D,0xEA1DEBBB,0x81E26C16,0xE8922622,0x82299971,0xE70747C4,0x8275A0C0,
+0xE57D5FDA,0x82C67F14,0xE3F47D96,0x831C314E,0xE26CB01B,0x8376B422,0xE0E60685,
+0x83D60412,0xDF608FE4,0x843A1D70,0xDDDC5B3B,0x84A2FC62,0xDC597781,0x85109CDD,
+0xDAD7F3A2,0x8582FAA5,0xD957DE7A,0x85FA1153,0xD7D946D8,0x8675DC4F,0xD65C3B7B,
+0x86F656D3,0xD4E0CB15,0x877B7BEC,0xD3670446,0x88054677,0xD1EEF59E,0x8893B125,
+0xD078AD9E,0x8926B677,0xCF043AB3,0x89BE50C3,0xCD91AB39,0x8A5A7A31,0xCC210D79,
+0x8AFB2CBB,0xCAB26FA9,0x8BA0622F,0xC945DFEC,0x8C4A142F,0xC7DB6C50,0x8CF83C30,
+0xC67322CE,0x8DAAD37B,0xC50D1149,0x8E61D32E,0xC3A94590,0x8F1D343A,0xC247CD5A,
+0x8FDCEF66,0xC0E8B648,0x90A0FD4E,0xBF8C0DE3,0x91695663,0xBE31E19B,0x9235F2EC,
+0xBCDA3ECB,0x9306CB04,0xBB8532B0,0x93DBD6A0,0xBA32CA71,0x94B50D87,0xB8E31319,
+0x9592675C,0xB796199B,0x9673DB94,0xB64BEACD,0x9759617F,0xB5049368,0x9842F043,
+0xB3C0200C,0x99307EE0,0xB27E9D3C,0x9A22042D,0xB140175B,0x9B1776DA,0xB0049AB3,
+0x9C10CD70,0xAECC336C,0x9D0DFE54,0xAD96ED92,0x9E0EFFC1,0xAC64D510,0x9F13C7D0,
+0xAB35F5B5,0xA01C4C73,0xAA0A5B2E,0xA1288376,0xA8E21106,0xA2386284,0xA7BD22AC,
+0xA34BDF20,0xA69B9B68,0xA462EEAC,0xA57D8666,0xA57D8666,0xA462EEAC,0xA69B9B68,
+0xA34BDF20,0xA7BD22AC,0xA2386284,0xA8E21106,0xA1288376,0xAA0A5B2E,0xA01C4C73,
+0xAB35F5B5,0x9F13C7D0,0xAC64D510,0x9E0EFFC1,0xAD96ED92,0x9D0DFE54,0xAECC336C,
+0x9C10CD70,0xB0049AB3,0x9B1776DA,0xB140175B,0x9A22042D,0xB27E9D3C,0x99307EE0,
+0xB3C0200C,0x9842F043,0xB5049368,0x9759617F,0xB64BEACD,0x9673DB94,0xB796199B,
+0x9592675C,0xB8E31319,0x94B50D87,0xBA32CA71,0x93DBD6A0,0xBB8532B0,0x9306CB04,
+0xBCDA3ECB,0x9235F2EC,0xBE31E19B,0x91695663,0xBF8C0DE3,0x90A0FD4E,0xC0E8B648,
+0x8FDCEF66,0xC247CD5A,0x8F1D343A,0xC3A94590,0x8E61D32E,0xC50D1149,0x8DAAD37B,
+0xC67322CE,0x8CF83C30,0xC7DB6C50,0x8C4A142F,0xC945DFEC,0x8BA0622F,0xCAB26FA9,
+0x8AFB2CBB,0xCC210D79,0x8A5A7A31,0xCD91AB39,0x89BE50C3,0xCF043AB3,0x8926B677,
+0xD078AD9E,0x8893B125,0xD1EEF59E,0x88054677,0xD3670446,0x877B7BEC,0xD4E0CB15,
+0x86F656D3,0xD65C3B7B,0x8675DC4F,0xD7D946D8,0x85FA1153,0xD957DE7A,0x8582FAA5,
+0xDAD7F3A2,0x85109CDD,0xDC597781,0x84A2FC62,0xDDDC5B3B,0x843A1D70,0xDF608FE4,
+0x83D60412,0xE0E60685,0x8376B422,0xE26CB01B,0x831C314E,0xE3F47D96,0x82C67F14,
+0xE57D5FDA,0x8275A0C0,0xE70747C4,0x82299971,0xE8922622,0x81E26C16,0xEA1DEBBB,
+0x81A01B6D,0xEBAA894F,0x8162AA04,0xED37EF91,0x812A1A3A,0xEEC60F31,0x80F66E3C,
+0xF054D8D5,0x80C7A80A,0xF1E43D1C,0x809DC971,0xF3742CA2,0x8078D40D,0xF50497FB,
+0x8058C94C,0xF6956FB7,0x803DAA6A,0xF826A462,0x80277872,0xF9B82684,0x80163440,
+0xFB49E6A3,0x8009DE7E,0xFCDBD541,0x800277A6,0xFE6DE2E0,0x7FFFFFFF,0x00000000,
+0x7FD8878E,0xF9B82684,0x7F62368F,0xF3742CA2,0x7E9D55FC,0xED37EF91,0x7D8A5F40,
+0xE70747C4,0x7C29FBEE,0xE0E60685,0x7A7D055B,0xDAD7F3A2,0x78848414,0xD4E0CB15,
+0x7641AF3D,0xCF043AB3,0x73B5EBD1,0xC945DFEC,0x70E2CBC6,0xC3A94590,0x6DCA0D14,
+0xBE31E19B,0x6A6D98A4,0xB8E31319,0x66CF8120,0xB3C0200C,0x62F201AC,0xAECC336C,
+0x5ED77C8A,0xAA0A5B2E,0x5A82799A,0xA57D8666,0x55F5A4D2,0xA1288376,0x5133CC94,
+0x9D0DFE54,0x4C3FDFF4,0x99307EE0,0x471CECE7,0x9592675C,0x41CE1E65,0x9235F2EC,
+0x3C56BA70,0x8F1D343A,0x36BA2014,0x8C4A142F,0x30FBC54D,0x89BE50C3,0x2B1F34EB,
+0x877B7BEC,0x25280C5E,0x8582FAA5,0x1F19F97B,0x83D60412,0x18F8B83C,0x8275A0C0,
+0x12C8106F,0x8162AA04,0x0C8BD35E,0x809DC971,0x0647D97C,0x80277872,0x00000000,
+0x80000000,0xF9B82684,0x80277872,0xF3742CA2,0x809DC971,0xED37EF91,0x8162AA04,
+0xE70747C4,0x8275A0C0,0xE0E60685,0x83D60412,0xDAD7F3A2,0x8582FAA5,0xD4E0CB15,
+0x877B7BEC,0xCF043AB3,0x89BE50C3,0xC945DFEC,0x8C4A142F,0xC3A94590,0x8F1D343A,
+0xBE31E19B,0x9235F2EC,0xB8E31319,0x9592675C,0xB3C0200C,0x99307EE0,0xAECC336C,
+0x9D0DFE54,0xAA0A5B2E,0xA1288376,0xA57D8666,0xA57D8666,0xA1288376,0xAA0A5B2E,
+0x9D0DFE54,0xAECC336C,0x99307EE0,0xB3C0200C,0x9592675C,0xB8E31319,0x9235F2EC,
+0xBE31E19B,0x8F1D343A,0xC3A94590,0x8C4A142F,0xC945DFEC,0x89BE50C3,0xCF043AB3,
+0x877B7BEC,0xD4E0CB15,0x8582FAA5,0xDAD7F3A2,0x83D60412,0xE0E60685,0x8275A0C0,
+0xE70747C4,0x8162AA04,0xED37EF91,0x809DC971,0xF3742CA2,0x80277872,0xF9B82684,
+0x7FFFFFFF,0x00000000,0x7D8A5F40,0xE70747C4,0x7641AF3D,0xCF043AB3,0x6A6D98A4,
+0xB8E31319,0x5A82799A,0xA57D8666,0x471CECE7,0x9592675C,0x30FBC54D,0x89BE50C3,
+0x18F8B83C,0x8275A0C0,0x00000000,0x80000000,0xE70747C4,0x8275A0C0,0xCF043AB3,
+0x89BE50C3,0xB8E31319,0x9592675C,0xA57D8666,0xA57D8666,0x9592675C,0xB8E31319,
+0x89BE50C3,0xCF043AB3,0x8275A0C0,0xE70747C4,0x7FFFFFFF,0x00000000,0x5A82799A,
+0xA57D8666,0x00000000,0x80000000,0xA57D8666,0xA57D8666,};
+
+q31_t rearranged_twiddle_stride3_4096_q31[2728]={
+0x7FFFFFFF,0x00000000,0x7FFFA72C,0xFF69343F,0x7FFE9CB2,0xFED2694F,0x7FFCE093,
+0xFE3BA002,0x7FFA72D1,0xFDA4D929,0x7FF75370,0xFD0E1594,0x7FF38274,0xFC775616,
+0x7FEEFFE1,0xFBE09B80,0x7FE9CBC0,0xFB49E6A3,0x7FE3E616,0xFAB3384F,0x7FDD4EEC,
+0xFA1C9157,0x7FD6064C,0xF985F28A,0x7FCE0C3E,0xF8EF5CBB,0x7FC560CF,0xF858D0BB,
+0x7FBC040A,0xF7C24F59,0x7FB1F5FC,0xF72BD967,0x7FA736B4,0xF6956FB7,0x7F9BC640,
+0xF5FF1318,0x7F8FA4B0,0xF568C45B,0x7F82D214,0xF4D28451,0x7F754E80,0xF43C53CB,
+0x7F671A05,0xF3A63398,0x7F5834B7,0xF310248A,0x7F489EAA,0xF27A2771,0x7F3857F6,
+0xF1E43D1C,0x7F2760AF,0xF14E665C,0x7F15B8EE,0xF0B8A401,0x7F0360CB,0xF022F6DA,
+0x7EF05860,0xEF8D5FB8,0x7EDC9FC6,0xEEF7DF6A,0x7EC8371A,0xEE6276BF,0x7EB31E78,
+0xEDCD2687,0x7E9D55FC,0xED37EF91,0x7E86DDC6,0xECA2D2AD,0x7E6FB5F4,0xEC0DD0A8,
+0x7E57DEA7,0xEB78EA52,0x7E3F57FF,0xEAE4207A,0x7E26221F,0xEA4F73EE,0x7E0C3D29,
+0xE9BAE57D,0x7DF1A942,0xE92675F4,0x7DD6668F,0xE8922622,0x7DBA7534,0xE7FDF6D4,
+0x7D9DD55A,0xE769E8D8,0x7D808728,0xE6D5FCFC,0x7D628AC6,0xE642340D,0x7D43E05E,
+0xE5AE8ED8,0x7D24881B,0xE51B0E2A,0x7D048228,0xE487B2D0,0x7CE3CEB2,0xE3F47D96,
+0x7CC26DE5,0xE3616F48,0x7CA05FF1,0xE2CE88B3,0x7C7DA505,0xE23BCAA2,0x7C5A3D50,
+0xE1A935E2,0x7C362904,0xE116CB3D,0x7C116853,0xE0848B7F,0x7BEBFB70,0xDFF27773,
+0x7BC5E290,0xDF608FE4,0x7B9F1DE6,0xDECED59B,0x7B77ADA8,0xDE3D4964,0x7B4F920E,
+0xDDABEC08,0x7B26CB4F,0xDD1ABE51,0x7AFD59A4,0xDC89C109,0x7AD33D45,0xDBF8F4F8,
+0x7AA8766F,0xDB685AE9,0x7A7D055B,0xDAD7F3A2,0x7A50EA47,0xDA47BFEE,0x7A24256F,
+0xD9B7C094,0x79F6B711,0xD927F65B,0x79C89F6E,0xD898620C,0x7999DEC4,0xD809046E,
+0x796A7554,0xD779DE47,0x793A6361,0xD6EAF05F,0x7909A92D,0xD65C3B7B,0x78D846FB,
+0xD5CDC062,0x78A63D11,0xD53F7FDA,0x78738BB3,0xD4B17AA8,0x78403329,0xD423B191,
+0x780C33B8,0xD396255A,0x77D78DAA,0xD308D6C7,0x77A24148,0xD27BC69C,0x776C4EDB,
+0xD1EEF59E,0x7735B6AF,0xD1626490,0x76FE790E,0xD0D61434,0x76C69647,0xD04A054E,
+0x768E0EA6,0xCFBE389F,0x7654E279,0xCF32AEEB,0x761B1211,0xCEA768F2,0x75E09DBD,
+0xCE1C6777,0x75A585CF,0xCD91AB39,0x7569CA99,0xCD0734F9,0x752D6C6C,0xCC7D0578,
+0x74F06B9E,0xCBF31D75,0x74B2C884,0xCB697DB0,0x74748371,0xCAE026E8,0x74359CBD,
+0xCA5719DB,0x73F614C0,0xC9CE5748,0x73B5EBD1,0xC945DFEC,0x73752249,0xC8BDB485,
+0x7333B883,0xC835D5D0,0x72F1AED9,0xC7AE4489,0x72AF05A7,0xC727016D,0x726BBD48,
+0xC6A00D37,0x7227D61C,0xC61968A2,0x71E35080,0xC593146A,0x719E2CD2,0xC50D1149,
+0x71586B74,0xC4875FF9,0x71120CC5,0xC4020133,0x70CB1128,0xC37CF5B0,0x708378FF,
+0xC2F83E2A,0x703B44AD,0xC273DB58,0x6FF27497,0xC1EFCDF3,0x6FA90921,0xC16C16B0,
+0x6F5F02B2,0xC0E8B648,0x6F1461B0,0xC065AD70,0x6EC92683,0xBFE2FCDF,0x6E7D5193,
+0xBF60A54A,0x6E30E34A,0xBEDEA765,0x6DE3DC11,0xBE5D03E6,0x6D963C54,0xBDDBBB7F,
+0x6D48047E,0xBD5ACEE5,0x6CF934FC,0xBCDA3ECB,0x6CA9CE3B,0xBC5A0BE2,0x6C59D0A9,
+0xBBDA36DD,0x6C093CB6,0xBB5AC06D,0x6BB812D1,0xBADBA943,0x6B66536B,0xBA5CF210,
+0x6B13FEF5,0xB9DE9B83,0x6AC115E2,0xB960A64C,0x6A6D98A4,0xB8E31319,0x6A1987B0,
+0xB865E299,0x69C4E37A,0xB7E9157A,0x696FAC78,0xB76CAC69,0x6919E320,0xB6F0A812,
+0x68C387E9,0xB6750921,0x686C9B4B,0xB5F9D043,0x68151DBE,0xB57EFE22,0x67BD0FBD,
+0xB5049368,0x676471C0,0xB48A90C0,0x670B4444,0xB410F6D3,0x66B187C3,0xB397C649,
+0x66573CBB,0xB31EFFCC,0x65FC63A9,0xB2A6A402,0x65A0FD0B,0xB22EB392,0x6545095F,
+0xB1B72F23,0x64E88926,0xB140175B,0x648B7CE0,0xB0C96CE0,0x642DE50D,0xB0533055,
+0x63CFC231,0xAFDD625F,0x637114CC,0xAF6803A2,0x6311DD64,0xAEF314C0,0x62B21C7B,
+0xAE7E965B,0x6251D298,0xAE0A8916,0x61F1003F,0xAD96ED92,0x618FA5F7,0xAD23C46E,
+0x612DC447,0xACB10E4B,0x60CB5BB7,0xAC3ECBC7,0x60686CCF,0xABCCFD83,0x6004F819,
+0xAB5BA41A,0x5FA0FE1F,0xAAEAC02C,0x5F3C7F6B,0xAA7A5253,0x5ED77C8A,0xAA0A5B2E,
+0x5E71F606,0xA99ADB56,0x5E0BEC6E,0xA92BD367,0x5DA5604F,0xA8BD43FA,0x5D3E5237,
+0xA84F2DAA,0x5CD6C2B5,0xA7E1910F,0x5C6EB258,0xA7746EC0,0x5C0621B2,0xA707C757,
+0x5B9D1154,0xA69B9B68,0x5B3381CE,0xA62FEB8B,0x5AC973B5,0xA5C4B855,0x5A5EE79A,
+0xA55A025B,0x59F3DE12,0xA4EFCA31,0x598857B2,0xA486106A,0x591C550E,0xA41CD599,
+0x58AFD6BD,0xA3B41A50,0x5842DD54,0xA34BDF20,0x57D5696D,0xA2E4249B,0x57677B9D,
+0xA27CEB4F,0x56F9147E,0xA21633CD,0x568A34A9,0xA1AFFEA3,0x561ADCB9,0xA14A4C5E,
+0x55AB0D46,0xA0E51D8C,0x553AC6EE,0xA08072BA,0x54CA0A4B,0xA01C4C73,0x5458D7F9,
+0x9FB8AB41,0x53E73097,0x9F558FB0,0x537514C2,0x9EF2FA49,0x53028518,0x9E90EB94,
+0x528F8238,0x9E2F641B,0x521C0CC2,0x9DCE6463,0x51A82555,0x9D6DECF4,0x5133CC94,
+0x9D0DFE54,0x50BF031F,0x9CAE9907,0x5049C999,0x9C4FBD93,0x4FD420A4,0x9BF16C7A,
+0x4F5E08E3,0x9B93A641,0x4EE782FB,0x9B366B68,0x4E708F8F,0x9AD9BC71,0x4DF92F46,
+0x9A7D99DE,0x4D8162C4,0x9A22042D,0x4D092AB0,0x99C6FBDE,0x4C9087B1,0x996C816F,
+0x4C177A6E,0x9912955F,0x4B9E0390,0x98B93828,0x4B2423BE,0x98606A49,0x4AA9DBA2,
+0x98082C3B,0x4A2F2BE6,0x97B07E7A,0x49B41533,0x9759617F,0x49389836,0x9702D5C3,
+0x48BCB599,0x96ACDBBE,0x48406E08,0x965773E7,0x47C3C22F,0x96029EB6,0x4746B2BC,
+0x95AE5C9F,0x46C9405C,0x955AAE17,0x464B6BBE,0x95079394,0x45CD358F,0x94B50D87,
+0x454E9E80,0x94631C65,0x44CFA740,0x9411C09E,0x4450507E,0x93C0FAA3,0x43D09AED,
+0x9370CAE4,0x4350873C,0x932131D1,0x42D0161E,0x92D22FD9,0x424F4845,0x9283C568,
+0x41CE1E65,0x9235F2EC,0x414C992F,0x91E8B8D0,0x40CAB958,0x919C1781,0x40487F94,
+0x91500F67,0x3FC5EC98,0x9104A0EE,0x3F430119,0x90B9CC7D,0x3EBFBDCD,0x906F927C,
+0x3E3C2369,0x9025F352,0x3DB832A6,0x8FDCEF66,0x3D33EC39,0x8F94871D,0x3CAF50DA,
+0x8F4CBADB,0x3C2A6142,0x8F058B04,0x3BA51E29,0x8EBEF7FB,0x3B1F8848,0x8E790222,
+0x3A99A057,0x8E33A9DA,0x3A136712,0x8DEEEF82,0x398CDD32,0x8DAAD37B,0x39060373,
+0x8D675623,0x387EDA8E,0x8D2477D8,0x37F76341,0x8CE238F6,0x376F9E46,0x8CA099DA,
+0x36E78C5B,0x8C5F9ADE,0x365F2E3B,0x8C1F3C5D,0x35D684A6,0x8BDF7EB0,0x354D9057,
+0x8BA0622F,0x34C4520D,0x8B61E733,0x343ACA87,0x8B240E11,0x33B0FA84,0x8AE6D720,
+0x3326E2C3,0x8AAA42B4,0x329C8402,0x8A6E5123,0x3211DF04,0x8A3302BE,0x3186F487,
+0x89F857D8,0x30FBC54D,0x89BE50C3,0x30705217,0x8984EDCF,0x2FE49BA7,0x894C2F4C,
+0x2F58A2BE,0x89141589,0x2ECC681E,0x88DCA0D3,0x2E3FEC8B,0x88A5D177,0x2DB330C7,
+0x886FA7C2,0x2D263596,0x883A23FF,0x2C98FBBA,0x88054677,0x2C0B83FA,0x87D10F75,
+0x2B7DCF17,0x879D7F41,0x2AEFDDD8,0x876A9621,0x2A61B101,0x8738545E,0x29D34958,
+0x8706BA3D,0x2944A7A2,0x86D5C802,0x28B5CCA5,0x86A57DF2,0x2826B928,0x8675DC4F,
+0x27976DF1,0x8646E35C,0x2707EBC7,0x86189359,0x26783370,0x85EAEC88,0x25E845B6,
+0x85BDEF28,0x2558235F,0x85919B76,0x24C7CD33,0x8565F1B0,0x243743FA,0x853AF214,
+0x23A6887F,0x85109CDD,0x23159B88,0x84E6F244,0x22847DE0,0x84BDF286,0x21F3304F,
+0x84959DD9,0x2161B3A0,0x846DF477,0x20D0089C,0x8446F695,0x203E300D,0x8420A46C,
+0x1FAC2ABF,0x83FAFE2E,0x1F19F97B,0x83D60412,0x1E879D0D,0x83B1B649,0x1DF5163F,
+0x838E1507,0x1D6265DD,0x836B207D,0x1CCF8CB3,0x8348D8DC,0x1C3C8B8C,0x83273E52,
+0x1BA96335,0x83065110,0x1B161479,0x82E61141,0x1A82A026,0x82C67F14,0x19EF0707,
+0x82A79AB3,0x195B49EA,0x8289644B,0x18C7699B,0x826BDC04,0x183366E9,0x824F0208,
+0x179F429F,0x8232D67F,0x170AFD8D,0x82175990,0x1676987F,0x81FC8B60,0x15E21445,
+0x81E26C16,0x154D71AA,0x81C8FBD6,0x14B8B17F,0x81B03AC2,0x1423D492,0x819828FD,
+0x138EDBB1,0x8180C6A9,0x12F9C7AA,0x816A13E6,0x1264994E,0x815410D4,0x11CF516A,
+0x813EBD90,0x1139F0CF,0x812A1A3A,0x10A4784B,0x811626EC,0x100EE8AD,0x8102E3C4,
+0x0F7942C7,0x80F050DB,0x0EE38766,0x80DE6E4C,0x0E4DB75B,0x80CD3C2F,0x0DB7D376,
+0x80BCBA9D,0x0D21DC87,0x80ACE9AB,0x0C8BD35E,0x809DC971,0x0BF5B8CB,0x808F5A02,
+0x0B5F8D9F,0x80819B74,0x0AC952AA,0x80748DD9,0x0A3308BD,0x80683143,0x099CB0A7,
+0x805C85C4,0x09064B3A,0x80518B6B,0x086FD947,0x80474248,0x07D95B9E,0x803DAA6A,
+0x0742D311,0x8034C3DD,0x06AC406F,0x802C8EAD,0x0615A48B,0x80250AE7,0x057F0035,
+0x801E3895,0x04E8543E,0x801817BF,0x0451A177,0x8012A86F,0x03BAE8B2,0x800DEAAD,
+0x03242ABF,0x8009DE7E,0x028D6870,0x800683E8,0x01F6A297,0x8003DAF1,0x015FDA03,
+0x8001E39B,0x00C90F88,0x80009DEA,0x003243F5,0x800009DF,0xFF9B781D,0x8000277A,
+0xFF04ACD0,0x8000F6BD,0xFE6DE2E0,0x800277A6,0xFDD71B1E,0x8004AA32,0xFD40565C,
+0x80078E5E,0xFCA9956A,0x800B2427,0xFC12D91A,0x800F6B88,0xFB7C223D,0x8014647B,
+0xFAE571A4,0x801A0EF8,0xFA4EC821,0x80206AF8,0xF9B82684,0x80277872,0xF9218D9E,
+0x802F375D,0xF88AFE42,0x8037A7AC,0xF7F4793E,0x8040C956,0xF75DFF66,0x804A9C4D,
+0xF6C79188,0x80552084,0xF6313077,0x806055EB,0xF59ADD02,0x806C3C74,0xF50497FB,
+0x8078D40D,0xF46E6231,0x80861CA6,0xF3D83C77,0x8094162C,0xF342279B,0x80A2C08B,
+0xF2AC246E,0x80B21BAF,0xF21633C0,0x80C22784,0xF1805662,0x80D2E3F2,0xF0EA8D24,
+0x80E450E2,0xF054D8D5,0x80F66E3C,0xEFBF3A45,0x81093BE8,0xEF29B243,0x811CB9CA,
+0xEE9441A0,0x8130E7C9,0xEDFEE92B,0x8145C5C7,0xED69A9B3,0x815B53A8,0xECD48407,
+0x8171914E,0xEC3F78F6,0x81887E9A,0xEBAA894F,0x81A01B6D,0xEB15B5E1,0x81B867A5,
+0xEA80FF7A,0x81D16321,0xE9EC66E8,0x81EB0DBE,0xE957ECFB,0x82056758,0xE8C39280,
+0x82206FCC,0xE82F5844,0x823C26F3,0xE79B3F16,0x82588CA7,0xE70747C4,0x8275A0C0,
+0xE6737319,0x82936317,0xE5DFC1E5,0x82B1D381,0xE54C34F3,0x82D0F1D5,0xE4B8CD11,
+0x82F0BDE8,0xE4258B0A,0x8311378D,0xE3926FAD,0x83325E97,0xE2FF7BC3,0x835432D8,
+0xE26CB01B,0x8376B422,0xE1DA0D7E,0x8399E244,0xE14794BA,0x83BDBD0E,0xE0B54698,
+0x83E2444D,0xE02323E5,0x840777D0,0xDF912D6B,0x842D5762,0xDEFF63F4,0x8453E2CF,
+0xDE6DC84B,0x847B19E1,0xDDDC5B3B,0x84A2FC62,0xDD4B1D8C,0x84CB8A1B,0xDCBA1008,
+0x84F4C2D4,0xDC293379,0x851EA652,0xDB9888A8,0x8549345C,0xDB08105E,0x85746CB8,
+0xDA77CB63,0x85A04F28,0xD9E7BA7F,0x85CCDB70,0xD957DE7A,0x85FA1153,0xD8C8381D,
+0x8627F091,0xD838C82D,0x865678EB,0xD7A98F73,0x8685AA20,0xD71A8EB5,0x86B583EE,
+0xD68BC6BA,0x86E60614,0xD5FD3848,0x8717304E,0xD56EE424,0x87490258,0xD4E0CB15,
+0x877B7BEC,0xD452EDDF,0x87AE9CC5,0xD3C54D47,0x87E2649B,0xD337EA12,0x8816D327,
+0xD2AAC504,0x884BE821,0xD21DDEE2,0x8881A33D,0xD191386E,0x88B80432,0xD104D26B,
+0x88EF0AB4,0xD078AD9E,0x8926B677,0xCFECCAC7,0x895F072E,0xCF612AAA,0x8997FC8A,
+0xCED5CE08,0x89D1963C,0xCE4AB5A2,0x8A0BD3F5,0xCDBFE23A,0x8A46B564,0xCD355491,
+0x8A823A36,0xCCAB0D65,0x8ABE6219,0xCC210D79,0x8AFB2CBB,0xCB97558A,0x8B3899C6,
+0xCB0DE658,0x8B76A8E4,0xCA84C0A3,0x8BB559C1,0xC9FBE527,0x8BF4AC05,0xC97354A4,
+0x8C349F58,0xC8EB0FD6,0x8C753362,0xC863177B,0x8CB667C8,0xC7DB6C50,0x8CF83C30,
+0xC7540F11,0x8D3AB03F,0xC6CD0079,0x8D7DC399,0xC6464144,0x8DC175E0,0xC5BFD22E,
+0x8E05C6B7,0xC539B3F1,0x8E4AB5BF,0xC4B3E746,0x8E904298,0xC42E6CE8,0x8ED66CE1,
+0xC3A94590,0x8F1D343A,0xC32471F7,0x8F649840,0xC29FF2D4,0x8FAC988F,0xC21BC8E1,
+0x8FF534C4,0xC197F4D4,0x903E6C7B,0xC1147764,0x90883F4D,0xC0915148,0x90D2ACD4,
+0xC00E8336,0x911DB4A9,0xBF8C0DE3,0x91695663,0xBF09F205,0x91B5919A,0xBE88304F,
+0x920265E4,0xBE06C977,0x924FD2D7,0xBD85BE30,0x929DD806,0xBD050F2C,0x92EC7505,
+0xBC84BD1F,0x933BA968,0xBC04C8BA,0x938B74C1,0xBB8532B0,0x93DBD6A0,0xBB05FBB0,
+0x942CCE96,0xBA87246D,0x947E5C33,0xBA08AD95,0x94D07F05,0xB98A97D8,0x9523369C,
+0xB90CE3E6,0x95768283,0xB88F926D,0x95CA6247,0xB812A41A,0x961ED574,0xB796199B,
+0x9673DB94,0xB719F39E,0x96C97432,0xB69E32CD,0x971F9ED7,0xB622D7D6,0x97765B0A,
+0xB5A7E362,0x97CDA855,0xB52D561E,0x9825863D,0xB4B330B3,0x987DF449,0xB43973CA,
+0x98D6F1FE,0xB3C0200C,0x99307EE0,0xB3473623,0x998A9A74,0xB2CEB6B5,0x99E5443B,
+0xB256A26A,0x9A407BB9,0xB1DEF9E9,0x9A9C406E,0xB167BDD7,0x9AF891DB,0xB0F0EEDA,
+0x9B556F81,0xB07A8D97,0x9BB2D8DE,0xB0049AB3,0x9C10CD70,0xAF8F16D1,0x9C6F4CB6,
+0xAF1A0293,0x9CCE562C,0xAEA55E9E,0x9D2DE94D,0xAE312B92,0x9D8E0597,0xADBD6A10,
+0x9DEEAA82,0xAD4A1ABA,0x9E4FD78A,0xACD73E30,0x9EB18C26,0xAC64D510,0x9F13C7D0,
+0xABF2DFFB,0x9F7689FF,0xAB815F8D,0x9FD9D22A,0xAB105464,0xA03D9FC8,0xAA9FBF1E,
+0xA0A1F24D,0xAA2FA056,0xA106C92F,0xA9BFF8A8,0xA16C23E1,0xA950C8B0,0xA1D201D7,
+0xA8E21106,0xA2386284,0xA873D246,0xA29F4559,0xA8060D08,0xA306A9C8,0xA798C1E5,
+0xA36E8F41,0xA72BF174,0xA3D6F534,0xA6BF9C4B,0xA43FDB10,0xA653C303,0xA4A94043,
+0xA5E8662F,0xA513243B,0xA57D8666,0xA57D8666,0xA513243B,0xA5E8662F,0xA4A94043,
+0xA653C303,0xA43FDB10,0xA6BF9C4B,0xA3D6F534,0xA72BF174,0xA36E8F41,0xA798C1E5,
+0xA306A9C8,0xA8060D08,0xA29F4559,0xA873D246,0xA2386284,0xA8E21106,0xA1D201D7,
+0xA950C8B0,0xA16C23E1,0xA9BFF8A8,0xA106C92F,0xAA2FA056,0xA0A1F24D,0xAA9FBF1E,
+0xA03D9FC8,0xAB105464,0x9FD9D22A,0xAB815F8D,0x9F7689FF,0xABF2DFFB,0x9F13C7D0,
+0xAC64D510,0x9EB18C26,0xACD73E30,0x9E4FD78A,0xAD4A1ABA,0x9DEEAA82,0xADBD6A10,
+0x9D8E0597,0xAE312B92,0x9D2DE94D,0xAEA55E9E,0x9CCE562C,0xAF1A0293,0x9C6F4CB6,
+0xAF8F16D1,0x9C10CD70,0xB0049AB3,0x9BB2D8DE,0xB07A8D97,0x9B556F81,0xB0F0EEDA,
+0x9AF891DB,0xB167BDD7,0x9A9C406E,0xB1DEF9E9,0x9A407BB9,0xB256A26A,0x99E5443B,
+0xB2CEB6B5,0x998A9A74,0xB3473623,0x99307EE0,0xB3C0200C,0x98D6F1FE,0xB43973CA,
+0x987DF449,0xB4B330B3,0x9825863D,0xB52D561E,0x97CDA855,0xB5A7E362,0x97765B0A,
+0xB622D7D6,0x971F9ED7,0xB69E32CD,0x96C97432,0xB719F39E,0x9673DB94,0xB796199B,
+0x961ED574,0xB812A41A,0x95CA6247,0xB88F926D,0x95768283,0xB90CE3E6,0x9523369C,
+0xB98A97D8,0x94D07F05,0xBA08AD95,0x947E5C33,0xBA87246D,0x942CCE96,0xBB05FBB0,
+0x93DBD6A0,0xBB8532B0,0x938B74C1,0xBC04C8BA,0x933BA968,0xBC84BD1F,0x92EC7505,
+0xBD050F2C,0x929DD806,0xBD85BE30,0x924FD2D7,0xBE06C977,0x920265E4,0xBE88304F,
+0x91B5919A,0xBF09F205,0x91695663,0xBF8C0DE3,0x911DB4A9,0xC00E8336,0x90D2ACD4,
+0xC0915148,0x90883F4D,0xC1147764,0x903E6C7B,0xC197F4D4,0x8FF534C4,0xC21BC8E1,
+0x8FAC988F,0xC29FF2D4,0x8F649840,0xC32471F7,0x8F1D343A,0xC3A94590,0x8ED66CE1,
+0xC42E6CE8,0x8E904298,0xC4B3E746,0x8E4AB5BF,0xC539B3F1,0x8E05C6B7,0xC5BFD22E,
+0x8DC175E0,0xC6464144,0x8D7DC399,0xC6CD0079,0x8D3AB03F,0xC7540F11,0x8CF83C30,
+0xC7DB6C50,0x8CB667C8,0xC863177B,0x8C753362,0xC8EB0FD6,0x8C349F58,0xC97354A4,
+0x8BF4AC05,0xC9FBE527,0x8BB559C1,0xCA84C0A3,0x8B76A8E4,0xCB0DE658,0x8B3899C6,
+0xCB97558A,0x8AFB2CBB,0xCC210D79,0x8ABE6219,0xCCAB0D65,0x8A823A36,0xCD355491,
+0x8A46B564,0xCDBFE23A,0x8A0BD3F5,0xCE4AB5A2,0x89D1963C,0xCED5CE08,0x8997FC8A,
+0xCF612AAA,0x895F072E,0xCFECCAC7,0x8926B677,0xD078AD9E,0x88EF0AB4,0xD104D26B,
+0x88B80432,0xD191386E,0x8881A33D,0xD21DDEE2,0x884BE821,0xD2AAC504,0x8816D327,
+0xD337EA12,0x87E2649B,0xD3C54D47,0x87AE9CC5,0xD452EDDF,0x877B7BEC,0xD4E0CB15,
+0x87490258,0xD56EE424,0x8717304E,0xD5FD3848,0x86E60614,0xD68BC6BA,0x86B583EE,
+0xD71A8EB5,0x8685AA20,0xD7A98F73,0x865678EB,0xD838C82D,0x8627F091,0xD8C8381D,
+0x85FA1153,0xD957DE7A,0x85CCDB70,0xD9E7BA7F,0x85A04F28,0xDA77CB63,0x85746CB8,
+0xDB08105E,0x8549345C,0xDB9888A8,0x851EA652,0xDC293379,0x84F4C2D4,0xDCBA1008,
+0x84CB8A1B,0xDD4B1D8C,0x84A2FC62,0xDDDC5B3B,0x847B19E1,0xDE6DC84B,0x8453E2CF,
+0xDEFF63F4,0x842D5762,0xDF912D6B,0x840777D0,0xE02323E5,0x83E2444D,0xE0B54698,
+0x83BDBD0E,0xE14794BA,0x8399E244,0xE1DA0D7E,0x8376B422,0xE26CB01B,0x835432D8,
+0xE2FF7BC3,0x83325E97,0xE3926FAD,0x8311378D,0xE4258B0A,0x82F0BDE8,0xE4B8CD11,
+0x82D0F1D5,0xE54C34F3,0x82B1D381,0xE5DFC1E5,0x82936317,0xE6737319,0x8275A0C0,
+0xE70747C4,0x82588CA7,0xE79B3F16,0x823C26F3,0xE82F5844,0x82206FCC,0xE8C39280,
+0x82056758,0xE957ECFB,0x81EB0DBE,0xE9EC66E8,0x81D16321,0xEA80FF7A,0x81B867A5,
+0xEB15B5E1,0x81A01B6D,0xEBAA894F,0x81887E9A,0xEC3F78F6,0x8171914E,0xECD48407,
+0x815B53A8,0xED69A9B3,0x8145C5C7,0xEDFEE92B,0x8130E7C9,0xEE9441A0,0x811CB9CA,
+0xEF29B243,0x81093BE8,0xEFBF3A45,0x80F66E3C,0xF054D8D5,0x80E450E2,0xF0EA8D24,
+0x80D2E3F2,0xF1805662,0x80C22784,0xF21633C0,0x80B21BAF,0xF2AC246E,0x80A2C08B,
+0xF342279B,0x8094162C,0xF3D83C77,0x80861CA6,0xF46E6231,0x8078D40D,0xF50497FB,
+0x806C3C74,0xF59ADD02,0x806055EB,0xF6313077,0x80552084,0xF6C79188,0x804A9C4D,
+0xF75DFF66,0x8040C956,0xF7F4793E,0x8037A7AC,0xF88AFE42,0x802F375D,0xF9218D9E,
+0x80277872,0xF9B82684,0x80206AF8,0xFA4EC821,0x801A0EF8,0xFAE571A4,0x8014647B,
+0xFB7C223D,0x800F6B88,0xFC12D91A,0x800B2427,0xFCA9956A,0x80078E5E,0xFD40565C,
+0x8004AA32,0xFDD71B1E,0x800277A6,0xFE6DE2E0,0x8000F6BD,0xFF04ACD0,0x8000277A,
+0xFF9B781D,0x800009DF,0x003243F5,0x80009DEA,0x00C90F88,0x8001E39B,0x015FDA03,
+0x8003DAF1,0x01F6A297,0x800683E8,0x028D6870,0x8009DE7E,0x03242ABF,0x800DEAAD,
+0x03BAE8B2,0x8012A86F,0x0451A177,0x801817BF,0x04E8543E,0x801E3895,0x057F0035,
+0x80250AE7,0x0615A48B,0x802C8EAD,0x06AC406F,0x8034C3DD,0x0742D311,0x803DAA6A,
+0x07D95B9E,0x80474248,0x086FD947,0x80518B6B,0x09064B3A,0x805C85C4,0x099CB0A7,
+0x80683143,0x0A3308BD,0x80748DD9,0x0AC952AA,0x80819B74,0x0B5F8D9F,0x808F5A02,
+0x0BF5B8CB,0x809DC971,0x0C8BD35E,0x80ACE9AB,0x0D21DC87,0x80BCBA9D,0x0DB7D376,
+0x80CD3C2F,0x0E4DB75B,0x80DE6E4C,0x0EE38766,0x80F050DB,0x0F7942C7,0x8102E3C4,
+0x100EE8AD,0x811626EC,0x10A4784B,0x812A1A3A,0x1139F0CF,0x813EBD90,0x11CF516A,
+0x815410D4,0x1264994E,0x816A13E6,0x12F9C7AA,0x8180C6A9,0x138EDBB1,0x819828FD,
+0x1423D492,0x81B03AC2,0x14B8B17F,0x81C8FBD6,0x154D71AA,0x81E26C16,0x15E21445,
+0x81FC8B60,0x1676987F,0x82175990,0x170AFD8D,0x8232D67F,0x179F429F,0x824F0208,
+0x183366E9,0x826BDC04,0x18C7699B,0x8289644B,0x195B49EA,0x82A79AB3,0x19EF0707,
+0x82C67F14,0x1A82A026,0x82E61141,0x1B161479,0x83065110,0x1BA96335,0x83273E52,
+0x1C3C8B8C,0x8348D8DC,0x1CCF8CB3,0x836B207D,0x1D6265DD,0x838E1507,0x1DF5163F,
+0x83B1B649,0x1E879D0D,0x83D60412,0x1F19F97B,0x83FAFE2E,0x1FAC2ABF,0x8420A46C,
+0x203E300D,0x8446F695,0x20D0089C,0x846DF477,0x2161B3A0,0x84959DD9,0x21F3304F,
+0x84BDF286,0x22847DE0,0x84E6F244,0x23159B88,0x85109CDD,0x23A6887F,0x853AF214,
+0x243743FA,0x8565F1B0,0x24C7CD33,0x85919B76,0x2558235F,0x85BDEF28,0x25E845B6,
+0x85EAEC88,0x26783370,0x86189359,0x2707EBC7,0x8646E35C,0x27976DF1,0x8675DC4F,
+0x2826B928,0x86A57DF2,0x28B5CCA5,0x86D5C802,0x2944A7A2,0x8706BA3D,0x29D34958,
+0x8738545E,0x2A61B101,0x876A9621,0x2AEFDDD8,0x879D7F41,0x2B7DCF17,0x87D10F75,
+0x2C0B83FA,0x88054677,0x2C98FBBA,0x883A23FF,0x2D263596,0x886FA7C2,0x2DB330C7,
+0x88A5D177,0x2E3FEC8B,0x88DCA0D3,0x2ECC681E,0x89141589,0x2F58A2BE,0x894C2F4C,
+0x2FE49BA7,0x8984EDCF,0x30705217,0x89BE50C3,0x30FBC54D,0x89F857D8,0x3186F487,
+0x8A3302BE,0x3211DF04,0x8A6E5123,0x329C8402,0x8AAA42B4,0x3326E2C3,0x8AE6D720,
+0x33B0FA84,0x8B240E11,0x343ACA87,0x8B61E733,0x34C4520D,0x8BA0622F,0x354D9057,
+0x8BDF7EB0,0x35D684A6,0x8C1F3C5D,0x365F2E3B,0x8C5F9ADE,0x36E78C5B,0x8CA099DA,
+0x376F9E46,0x8CE238F6,0x37F76341,0x8D2477D8,0x387EDA8E,0x8D675623,0x39060373,
+0x8DAAD37B,0x398CDD32,0x8DEEEF82,0x3A136712,0x8E33A9DA,0x3A99A057,0x8E790222,
+0x3B1F8848,0x8EBEF7FB,0x3BA51E29,0x8F058B04,0x3C2A6142,0x8F4CBADB,0x3CAF50DA,
+0x8F94871D,0x3D33EC39,0x8FDCEF66,0x3DB832A6,0x9025F352,0x3E3C2369,0x906F927C,
+0x3EBFBDCD,0x90B9CC7D,0x3F430119,0x9104A0EE,0x3FC5EC98,0x91500F67,0x40487F94,
+0x919C1781,0x40CAB958,0x91E8B8D0,0x414C992F,0x9235F2EC,0x41CE1E65,0x9283C568,
+0x424F4845,0x92D22FD9,0x42D0161E,0x932131D1,0x4350873C,0x9370CAE4,0x43D09AED,
+0x93C0FAA3,0x4450507E,0x9411C09E,0x44CFA740,0x94631C65,0x454E9E80,0x94B50D87,
+0x45CD358F,0x95079394,0x464B6BBE,0x955AAE17,0x46C9405C,0x95AE5C9F,0x4746B2BC,
+0x96029EB6,0x47C3C22F,0x965773E7,0x48406E08,0x96ACDBBE,0x48BCB599,0x9702D5C3,
+0x49389836,0x9759617F,0x49B41533,0x97B07E7A,0x4A2F2BE6,0x98082C3B,0x4AA9DBA2,
+0x98606A49,0x4B2423BE,0x98B93828,0x4B9E0390,0x9912955F,0x4C177A6E,0x996C816F,
+0x4C9087B1,0x99C6FBDE,0x4D092AB0,0x9A22042D,0x4D8162C4,0x9A7D99DE,0x4DF92F46,
+0x9AD9BC71,0x4E708F8F,0x9B366B68,0x4EE782FB,0x9B93A641,0x4F5E08E3,0x9BF16C7A,
+0x4FD420A4,0x9C4FBD93,0x5049C999,0x9CAE9907,0x50BF031F,0x9D0DFE54,0x5133CC94,
+0x9D6DECF4,0x51A82555,0x9DCE6463,0x521C0CC2,0x9E2F641B,0x528F8238,0x9E90EB94,
+0x53028518,0x9EF2FA49,0x537514C2,0x9F558FB0,0x53E73097,0x9FB8AB41,0x5458D7F9,
+0xA01C4C73,0x54CA0A4B,0xA08072BA,0x553AC6EE,0xA0E51D8C,0x55AB0D46,0xA14A4C5E,
+0x561ADCB9,0xA1AFFEA3,0x568A34A9,0xA21633CD,0x56F9147E,0xA27CEB4F,0x57677B9D,
+0xA2E4249B,0x57D5696D,0xA34BDF20,0x5842DD54,0xA3B41A50,0x58AFD6BD,0xA41CD599,
+0x591C550E,0xA486106A,0x598857B2,0xA4EFCA31,0x59F3DE12,0xA55A025B,0x5A5EE79A,
+0xA5C4B855,0x5AC973B5,0xA62FEB8B,0x5B3381CE,0xA69B9B68,0x5B9D1154,0xA707C757,
+0x5C0621B2,0xA7746EC0,0x5C6EB258,0xA7E1910F,0x5CD6C2B5,0xA84F2DAA,0x5D3E5237,
+0xA8BD43FA,0x5DA5604F,0xA92BD367,0x5E0BEC6E,0xA99ADB56,0x5E71F606,0xAA0A5B2E,
+0x5ED77C8A,0xAA7A5253,0x5F3C7F6B,0xAAEAC02C,0x5FA0FE1F,0xAB5BA41A,0x6004F819,
+0xABCCFD83,0x60686CCF,0xAC3ECBC7,0x60CB5BB7,0xACB10E4B,0x612DC447,0xAD23C46E,
+0x618FA5F7,0xAD96ED92,0x61F1003F,0xAE0A8916,0x6251D298,0xAE7E965B,0x62B21C7B,
+0xAEF314C0,0x6311DD64,0xAF6803A2,0x637114CC,0xAFDD625F,0x63CFC231,0xB0533055,
+0x642DE50D,0xB0C96CE0,0x648B7CE0,0xB140175B,0x64E88926,0xB1B72F23,0x6545095F,
+0xB22EB392,0x65A0FD0B,0xB2A6A402,0x65FC63A9,0xB31EFFCC,0x66573CBB,0xB397C649,
+0x66B187C3,0xB410F6D3,0x670B4444,0xB48A90C0,0x676471C0,0xB5049368,0x67BD0FBD,
+0xB57EFE22,0x68151DBE,0xB5F9D043,0x686C9B4B,0xB6750921,0x68C387E9,0xB6F0A812,
+0x6919E320,0xB76CAC69,0x696FAC78,0xB7E9157A,0x69C4E37A,0xB865E299,0x6A1987B0,
+0xB8E31319,0x6A6D98A4,0xB960A64C,0x6AC115E2,0xB9DE9B83,0x6B13FEF5,0xBA5CF210,
+0x6B66536B,0xBADBA943,0x6BB812D1,0xBB5AC06D,0x6C093CB6,0xBBDA36DD,0x6C59D0A9,
+0xBC5A0BE2,0x6CA9CE3B,0xBCDA3ECB,0x6CF934FC,0xBD5ACEE5,0x6D48047E,0xBDDBBB7F,
+0x6D963C54,0xBE5D03E6,0x6DE3DC11,0xBEDEA765,0x6E30E34A,0xBF60A54A,0x6E7D5193,
+0xBFE2FCDF,0x6EC92683,0xC065AD70,0x6F1461B0,0xC0E8B648,0x6F5F02B2,0xC16C16B0,
+0x6FA90921,0xC1EFCDF3,0x6FF27497,0xC273DB58,0x703B44AD,0xC2F83E2A,0x708378FF,
+0xC37CF5B0,0x70CB1128,0xC4020133,0x71120CC5,0xC4875FF9,0x71586B74,0xC50D1149,
+0x719E2CD2,0xC593146A,0x71E35080,0xC61968A2,0x7227D61C,0xC6A00D37,0x726BBD48,
+0xC727016D,0x72AF05A7,0xC7AE4489,0x72F1AED9,0xC835D5D0,0x7333B883,0xC8BDB485,
+0x73752249,0xC945DFEC,0x73B5EBD1,0xC9CE5748,0x73F614C0,0xCA5719DB,0x74359CBD,
+0xCAE026E8,0x74748371,0xCB697DB0,0x74B2C884,0xCBF31D75,0x74F06B9E,0xCC7D0578,
+0x752D6C6C,0xCD0734F9,0x7569CA99,0xCD91AB39,0x75A585CF,0xCE1C6777,0x75E09DBD,
+0xCEA768F2,0x761B1211,0xCF32AEEB,0x7654E279,0xCFBE389F,0x768E0EA6,0xD04A054E,
+0x76C69647,0xD0D61434,0x76FE790E,0xD1626490,0x7735B6AF,0xD1EEF59E,0x776C4EDB,
+0xD27BC69C,0x77A24148,0xD308D6C7,0x77D78DAA,0xD396255A,0x780C33B8,0xD423B191,
+0x78403329,0xD4B17AA8,0x78738BB3,0xD53F7FDA,0x78A63D11,0xD5CDC062,0x78D846FB,
+0xD65C3B7B,0x7909A92D,0xD6EAF05F,0x793A6361,0xD779DE47,0x796A7554,0xD809046E,
+0x7999DEC4,0xD898620C,0x79C89F6E,0xD927F65B,0x79F6B711,0xD9B7C094,0x7A24256F,
+0xDA47BFEE,0x7A50EA47,0xDAD7F3A2,0x7A7D055B,0xDB685AE9,0x7AA8766F,0xDBF8F4F8,
+0x7AD33D45,0xDC89C109,0x7AFD59A4,0xDD1ABE51,0x7B26CB4F,0xDDABEC08,0x7B4F920E,
+0xDE3D4964,0x7B77ADA8,0xDECED59B,0x7B9F1DE6,0xDF608FE4,0x7BC5E290,0xDFF27773,
+0x7BEBFB70,0xE0848B7F,0x7C116853,0xE116CB3D,0x7C362904,0xE1A935E2,0x7C5A3D50,
+0xE23BCAA2,0x7C7DA505,0xE2CE88B3,0x7CA05FF1,0xE3616F48,0x7CC26DE5,0xE3F47D96,
+0x7CE3CEB2,0xE487B2D0,0x7D048228,0xE51B0E2A,0x7D24881B,0xE5AE8ED8,0x7D43E05E,
+0xE642340D,0x7D628AC6,0xE6D5FCFC,0x7D808728,0xE769E8D8,0x7D9DD55A,0xE7FDF6D4,
+0x7DBA7534,0xE8922622,0x7DD6668F,0xE92675F4,0x7DF1A942,0xE9BAE57D,0x7E0C3D29,
+0xEA4F73EE,0x7E26221F,0xEAE4207A,0x7E3F57FF,0xEB78EA52,0x7E57DEA7,0xEC0DD0A8,
+0x7E6FB5F4,0xECA2D2AD,0x7E86DDC6,0xED37EF91,0x7E9D55FC,0xEDCD2687,0x7EB31E78,
+0xEE6276BF,0x7EC8371A,0xEEF7DF6A,0x7EDC9FC6,0xEF8D5FB8,0x7EF05860,0xF022F6DA,
+0x7F0360CB,0xF0B8A401,0x7F15B8EE,0xF14E665C,0x7F2760AF,0xF1E43D1C,0x7F3857F6,
+0xF27A2771,0x7F489EAA,0xF310248A,0x7F5834B7,0xF3A63398,0x7F671A05,0xF43C53CB,
+0x7F754E80,0xF4D28451,0x7F82D214,0xF568C45B,0x7F8FA4B0,0xF5FF1318,0x7F9BC640,
+0xF6956FB7,0x7FA736B4,0xF72BD967,0x7FB1F5FC,0xF7C24F59,0x7FBC040A,0xF858D0BB,
+0x7FC560CF,0xF8EF5CBB,0x7FCE0C3E,0xF985F28A,0x7FD6064C,0xFA1C9157,0x7FDD4EEC,
+0xFAB3384F,0x7FE3E616,0xFB49E6A3,0x7FE9CBC0,0xFBE09B80,0x7FEEFFE1,0xFC775616,
+0x7FF38274,0xFD0E1594,0x7FF75370,0xFDA4D929,0x7FFA72D1,0xFE3BA002,0x7FFCE093,
+0xFED2694F,0x7FFE9CB2,0xFF69343F,0x7FFFA72C,0x7FFFFFFF,0x00000000,0x7FFA72D1,
+0xFDA4D929,0x7FE9CBC0,0xFB49E6A3,0x7FCE0C3E,0xF8EF5CBB,0x7FA736B4,0xF6956FB7,
+0x7F754E80,0xF43C53CB,0x7F3857F6,0xF1E43D1C,0x7EF05860,0xEF8D5FB8,0x7E9D55FC,
+0xED37EF91,0x7E3F57FF,0xEAE4207A,0x7DD6668F,0xE8922622,0x7D628AC6,0xE642340D,
+0x7CE3CEB2,0xE3F47D96,0x7C5A3D50,0xE1A935E2,0x7BC5E290,0xDF608FE4,0x7B26CB4F,
+0xDD1ABE51,0x7A7D055B,0xDAD7F3A2,0x79C89F6E,0xD898620C,0x7909A92D,0xD65C3B7B,
+0x78403329,0xD423B191,0x776C4EDB,0xD1EEF59E,0x768E0EA6,0xCFBE389F,0x75A585CF,
+0xCD91AB39,0x74B2C884,0xCB697DB0,0x73B5EBD1,0xC945DFEC,0x72AF05A7,0xC727016D,
+0x719E2CD2,0xC50D1149,0x708378FF,0xC2F83E2A,0x6F5F02B2,0xC0E8B648,0x6E30E34A,
+0xBEDEA765,0x6CF934FC,0xBCDA3ECB,0x6BB812D1,0xBADBA943,0x6A6D98A4,0xB8E31319,
+0x6919E320,0xB6F0A812,0x67BD0FBD,0xB5049368,0x66573CBB,0xB31EFFCC,0x64E88926,
+0xB140175B,0x637114CC,0xAF6803A2,0x61F1003F,0xAD96ED92,0x60686CCF,0xABCCFD83,
+0x5ED77C8A,0xAA0A5B2E,0x5D3E5237,0xA84F2DAA,0x5B9D1154,0xA69B9B68,0x59F3DE12,
+0xA4EFCA31,0x5842DD54,0xA34BDF20,0x568A34A9,0xA1AFFEA3,0x54CA0A4B,0xA01C4C73,
+0x53028518,0x9E90EB94,0x5133CC94,0x9D0DFE54,0x4F5E08E3,0x9B93A641,0x4D8162C4,
+0x9A22042D,0x4B9E0390,0x98B93828,0x49B41533,0x9759617F,0x47C3C22F,0x96029EB6,
+0x45CD358F,0x94B50D87,0x43D09AED,0x9370CAE4,0x41CE1E65,0x9235F2EC,0x3FC5EC98,
+0x9104A0EE,0x3DB832A6,0x8FDCEF66,0x3BA51E29,0x8EBEF7FB,0x398CDD32,0x8DAAD37B,
+0x376F9E46,0x8CA099DA,0x354D9057,0x8BA0622F,0x3326E2C3,0x8AAA42B4,0x30FBC54D,
+0x89BE50C3,0x2ECC681E,0x88DCA0D3,0x2C98FBBA,0x88054677,0x2A61B101,0x8738545E,
+0x2826B928,0x8675DC4F,0x25E845B6,0x85BDEF28,0x23A6887F,0x85109CDD,0x2161B3A0,
+0x846DF477,0x1F19F97B,0x83D60412,0x1CCF8CB3,0x8348D8DC,0x1A82A026,0x82C67F14,
+0x183366E9,0x824F0208,0x15E21445,0x81E26C16,0x138EDBB1,0x8180C6A9,0x1139F0CF,
+0x812A1A3A,0x0EE38766,0x80DE6E4C,0x0C8BD35E,0x809DC971,0x0A3308BD,0x80683143,
+0x07D95B9E,0x803DAA6A,0x057F0035,0x801E3895,0x03242ABF,0x8009DE7E,0x00C90F88,
+0x80009DEA,0xFE6DE2E0,0x800277A6,0xFC12D91A,0x800F6B88,0xF9B82684,0x80277872,
+0xF75DFF66,0x804A9C4D,0xF50497FB,0x8078D40D,0xF2AC246E,0x80B21BAF,0xF054D8D5,
+0x80F66E3C,0xEDFEE92B,0x8145C5C7,0xEBAA894F,0x81A01B6D,0xE957ECFB,0x82056758,
+0xE70747C4,0x8275A0C0,0xE4B8CD11,0x82F0BDE8,0xE26CB01B,0x8376B422,0xE02323E5,
+0x840777D0,0xDDDC5B3B,0x84A2FC62,0xDB9888A8,0x8549345C,0xD957DE7A,0x85FA1153,
+0xD71A8EB5,0x86B583EE,0xD4E0CB15,0x877B7BEC,0xD2AAC504,0x884BE821,0xD078AD9E,
+0x8926B677,0xCE4AB5A2,0x8A0BD3F5,0xCC210D79,0x8AFB2CBB,0xC9FBE527,0x8BF4AC05,
+0xC7DB6C50,0x8CF83C30,0xC5BFD22E,0x8E05C6B7,0xC3A94590,0x8F1D343A,0xC197F4D4,
+0x903E6C7B,0xBF8C0DE3,0x91695663,0xBD85BE30,0x929DD806,0xBB8532B0,0x93DBD6A0,
+0xB98A97D8,0x9523369C,0xB796199B,0x9673DB94,0xB5A7E362,0x97CDA855,0xB3C0200C,
+0x99307EE0,0xB1DEF9E9,0x9A9C406E,0xB0049AB3,0x9C10CD70,0xAE312B92,0x9D8E0597,
+0xAC64D510,0x9F13C7D0,0xAA9FBF1E,0xA0A1F24D,0xA8E21106,0xA2386284,0xA72BF174,
+0xA3D6F534,0xA57D8666,0xA57D8666,0xA3D6F534,0xA72BF174,0xA2386284,0xA8E21106,
+0xA0A1F24D,0xAA9FBF1E,0x9F13C7D0,0xAC64D510,0x9D8E0597,0xAE312B92,0x9C10CD70,
+0xB0049AB3,0x9A9C406E,0xB1DEF9E9,0x99307EE0,0xB3C0200C,0x97CDA855,0xB5A7E362,
+0x9673DB94,0xB796199B,0x9523369C,0xB98A97D8,0x93DBD6A0,0xBB8532B0,0x929DD806,
+0xBD85BE30,0x91695663,0xBF8C0DE3,0x903E6C7B,0xC197F4D4,0x8F1D343A,0xC3A94590,
+0x8E05C6B7,0xC5BFD22E,0x8CF83C30,0xC7DB6C50,0x8BF4AC05,0xC9FBE527,0x8AFB2CBB,
+0xCC210D79,0x8A0BD3F5,0xCE4AB5A2,0x8926B677,0xD078AD9E,0x884BE821,0xD2AAC504,
+0x877B7BEC,0xD4E0CB15,0x86B583EE,0xD71A8EB5,0x85FA1153,0xD957DE7A,0x8549345C,
+0xDB9888A8,0x84A2FC62,0xDDDC5B3B,0x840777D0,0xE02323E5,0x8376B422,0xE26CB01B,
+0x82F0BDE8,0xE4B8CD11,0x8275A0C0,0xE70747C4,0x82056758,0xE957ECFB,0x81A01B6D,
+0xEBAA894F,0x8145C5C7,0xEDFEE92B,0x80F66E3C,0xF054D8D5,0x80B21BAF,0xF2AC246E,
+0x8078D40D,0xF50497FB,0x804A9C4D,0xF75DFF66,0x80277872,0xF9B82684,0x800F6B88,
+0xFC12D91A,0x800277A6,0xFE6DE2E0,0x80009DEA,0x00C90F88,0x8009DE7E,0x03242ABF,
+0x801E3895,0x057F0035,0x803DAA6A,0x07D95B9E,0x80683143,0x0A3308BD,0x809DC971,
+0x0C8BD35E,0x80DE6E4C,0x0EE38766,0x812A1A3A,0x1139F0CF,0x8180C6A9,0x138EDBB1,
+0x81E26C16,0x15E21445,0x824F0208,0x183366E9,0x82C67F14,0x1A82A026,0x8348D8DC,
+0x1CCF8CB3,0x83D60412,0x1F19F97B,0x846DF477,0x2161B3A0,0x85109CDD,0x23A6887F,
+0x85BDEF28,0x25E845B6,0x8675DC4F,0x2826B928,0x8738545E,0x2A61B101,0x88054677,
+0x2C98FBBA,0x88DCA0D3,0x2ECC681E,0x89BE50C3,0x30FBC54D,0x8AAA42B4,0x3326E2C3,
+0x8BA0622F,0x354D9057,0x8CA099DA,0x376F9E46,0x8DAAD37B,0x398CDD32,0x8EBEF7FB,
+0x3BA51E29,0x8FDCEF66,0x3DB832A6,0x9104A0EE,0x3FC5EC98,0x9235F2EC,0x41CE1E65,
+0x9370CAE4,0x43D09AED,0x94B50D87,0x45CD358F,0x96029EB6,0x47C3C22F,0x9759617F,
+0x49B41533,0x98B93828,0x4B9E0390,0x9A22042D,0x4D8162C4,0x9B93A641,0x4F5E08E3,
+0x9D0DFE54,0x5133CC94,0x9E90EB94,0x53028518,0xA01C4C73,0x54CA0A4B,0xA1AFFEA3,
+0x568A34A9,0xA34BDF20,0x5842DD54,0xA4EFCA31,0x59F3DE12,0xA69B9B68,0x5B9D1154,
+0xA84F2DAA,0x5D3E5237,0xAA0A5B2E,0x5ED77C8A,0xABCCFD83,0x60686CCF,0xAD96ED92,
+0x61F1003F,0xAF6803A2,0x637114CC,0xB140175B,0x64E88926,0xB31EFFCC,0x66573CBB,
+0xB5049368,0x67BD0FBD,0xB6F0A812,0x6919E320,0xB8E31319,0x6A6D98A4,0xBADBA943,
+0x6BB812D1,0xBCDA3ECB,0x6CF934FC,0xBEDEA765,0x6E30E34A,0xC0E8B648,0x6F5F02B2,
+0xC2F83E2A,0x708378FF,0xC50D1149,0x719E2CD2,0xC727016D,0x72AF05A7,0xC945DFEC,
+0x73B5EBD1,0xCB697DB0,0x74B2C884,0xCD91AB39,0x75A585CF,0xCFBE389F,0x768E0EA6,
+0xD1EEF59E,0x776C4EDB,0xD423B191,0x78403329,0xD65C3B7B,0x7909A92D,0xD898620C,
+0x79C89F6E,0xDAD7F3A2,0x7A7D055B,0xDD1ABE51,0x7B26CB4F,0xDF608FE4,0x7BC5E290,
+0xE1A935E2,0x7C5A3D50,0xE3F47D96,0x7CE3CEB2,0xE642340D,0x7D628AC6,0xE8922622,
+0x7DD6668F,0xEAE4207A,0x7E3F57FF,0xED37EF91,0x7E9D55FC,0xEF8D5FB8,0x7EF05860,
+0xF1E43D1C,0x7F3857F6,0xF43C53CB,0x7F754E80,0xF6956FB7,0x7FA736B4,0xF8EF5CBB,
+0x7FCE0C3E,0xFB49E6A3,0x7FE9CBC0,0xFDA4D929,0x7FFA72D1,0x7FFFFFFF,0x00000000,
+0x7FA736B4,0xF6956FB7,0x7E9D55FC,0xED37EF91,0x7CE3CEB2,0xE3F47D96,0x7A7D055B,
+0xDAD7F3A2,0x776C4EDB,0xD1EEF59E,0x73B5EBD1,0xC945DFEC,0x6F5F02B2,0xC0E8B648,
+0x6A6D98A4,0xB8E31319,0x64E88926,0xB140175B,0x5ED77C8A,0xAA0A5B2E,0x5842DD54,
+0xA34BDF20,0x5133CC94,0x9D0DFE54,0x49B41533,0x9759617F,0x41CE1E65,0x9235F2EC,
+0x398CDD32,0x8DAAD37B,0x30FBC54D,0x89BE50C3,0x2826B928,0x8675DC4F,0x1F19F97B,
+0x83D60412,0x15E21445,0x81E26C16,0x0C8BD35E,0x809DC971,0x03242ABF,0x8009DE7E,
+0xF9B82684,0x80277872,0xF054D8D5,0x80F66E3C,0xE70747C4,0x8275A0C0,0xDDDC5B3B,
+0x84A2FC62,0xD4E0CB15,0x877B7BEC,0xCC210D79,0x8AFB2CBB,0xC3A94590,0x8F1D343A,
+0xBB8532B0,0x93DBD6A0,0xB3C0200C,0x99307EE0,0xAC64D510,0x9F13C7D0,0xA57D8666,
+0xA57D8666,0x9F13C7D0,0xAC64D510,0x99307EE0,0xB3C0200C,0x93DBD6A0,0xBB8532B0,
+0x8F1D343A,0xC3A94590,0x8AFB2CBB,0xCC210D79,0x877B7BEC,0xD4E0CB15,0x84A2FC62,
+0xDDDC5B3B,0x8275A0C0,0xE70747C4,0x80F66E3C,0xF054D8D5,0x80277872,0xF9B82684,
+0x8009DE7E,0x03242ABF,0x809DC971,0x0C8BD35E,0x81E26C16,0x15E21445,0x83D60412,
+0x1F19F97B,0x8675DC4F,0x2826B928,0x89BE50C3,0x30FBC54D,0x8DAAD37B,0x398CDD32,
+0x9235F2EC,0x41CE1E65,0x9759617F,0x49B41533,0x9D0DFE54,0x5133CC94,0xA34BDF20,
+0x5842DD54,0xAA0A5B2E,0x5ED77C8A,0xB140175B,0x64E88926,0xB8E31319,0x6A6D98A4,
+0xC0E8B648,0x6F5F02B2,0xC945DFEC,0x73B5EBD1,0xD1EEF59E,0x776C4EDB,0xDAD7F3A2,
+0x7A7D055B,0xE3F47D96,0x7CE3CEB2,0xED37EF91,0x7E9D55FC,0xF6956FB7,0x7FA736B4,
+0x7FFFFFFF,0x00000000,0x7A7D055B,0xDAD7F3A2,0x6A6D98A4,0xB8E31319,0x5133CC94,
+0x9D0DFE54,0x30FBC54D,0x89BE50C3,0x0C8BD35E,0x809DC971,0xE70747C4,0x8275A0C0,
+0xC3A94590,0x8F1D343A,0xA57D8666,0xA57D8666,0x8F1D343A,0xC3A94590,0x8275A0C0,
+0xE70747C4,0x809DC971,0x0C8BD35E,0x89BE50C3,0x30FBC54D,0x9D0DFE54,0x5133CC94,
+0xB8E31319,0x6A6D98A4,0xDAD7F3A2,0x7A7D055B,0x7FFFFFFF,0x00000000,0x30FBC54D,
+0x89BE50C3,0xA57D8666,0xA57D8666,0x89BE50C3,0x30FBC54D,};
+
+#endif
+
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+#endif /* defined(ARM_MATH_MVEI)  */
+
+
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_16_q15[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_16_q15[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_16_q15[2]={
+0,0,};
+
+q15_t rearranged_twiddle_stride1_16_q15[8]={
+0x7FFF,0x0000,0x7642,0xCF04,0x5A82,0xA57E,0x30FC,0x89BE,};
+
+q15_t rearranged_twiddle_stride2_16_q15[8]={
+0x7FFF,0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,};
+
+q15_t rearranged_twiddle_stride3_16_q15[8]={
+0x7FFF,0x0000,0x30FC,0x89BE,0xA57E,0xA57E,0x89BE,0x30FC,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_64_q15[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_64_q15[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_64_q15[3]={
+0,32,0,};
+
+q15_t rearranged_twiddle_stride1_64_q15[40]={
+0x7FFF,0x0000,0x7F62,0xF374,0x7D8A,0xE707,0x7A7D,0xDAD8,0x7642,0xCF04,0x70E3,
+0xC3A9,0x6A6E,0xB8E3,0x62F2,0xAECC,0x5A82,0xA57E,0x5134,0x9D0E,0x471D,0x9592,
+0x3C57,0x8F1D,0x30FC,0x89BE,0x2528,0x8583,0x18F9,0x8276,0x0C8C,0x809E,0x7FFF,
+0x0000,0x7642,0xCF04,0x5A82,0xA57E,0x30FC,0x89BE,};
+
+q15_t rearranged_twiddle_stride2_64_q15[40]={
+0x7FFF,0x0000,0x7D8A,0xE707,0x7642,0xCF04,0x6A6E,0xB8E3,0x5A82,0xA57E,0x471D,
+0x9592,0x30FC,0x89BE,0x18F9,0x8276,0x0000,0x8000,0xE707,0x8276,0xCF04,0x89BE,
+0xB8E3,0x9592,0xA57E,0xA57E,0x9592,0xB8E3,0x89BE,0xCF04,0x8276,0xE707,0x7FFF,
+0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,};
+
+q15_t rearranged_twiddle_stride3_64_q15[40]={
+0x7FFF,0x0000,0x7A7D,0xDAD8,0x6A6E,0xB8E3,0x5134,0x9D0E,0x30FC,0x89BE,0x0C8C,
+0x809E,0xE707,0x8276,0xC3A9,0x8F1D,0xA57E,0xA57E,0x8F1D,0xC3A9,0x8276,0xE707,
+0x809E,0x0C8C,0x89BE,0x30FC,0x9D0E,0x5134,0xB8E3,0x6A6E,0xDAD8,0x7A7D,0x7FFF,
+0x0000,0x30FC,0x89BE,0xA57E,0xA57E,0x89BE,0x30FC,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_256_q15[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_256_q15[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_256_q15[4]={
+0,128,160,0,};
+
+q15_t rearranged_twiddle_stride1_256_q15[168]={
+0x7FFF,0x0000,0x7FF6,0xFCDC,0x7FD9,0xF9B8,0x7FA7,0xF695,0x7F62,0xF374,0x7F0A,
+0xF055,0x7E9D,0xED38,0x7E1E,0xEA1E,0x7D8A,0xE707,0x7CE4,0xE3F4,0x7C2A,0xE0E6,
+0x7B5D,0xDDDC,0x7A7D,0xDAD8,0x798A,0xD7D9,0x7885,0xD4E1,0x776C,0xD1EF,0x7642,
+0xCF04,0x7505,0xCC21,0x73B6,0xC946,0x7255,0xC673,0x70E3,0xC3A9,0x6F5F,0xC0E9,
+0x6DCA,0xBE32,0x6C24,0xBB85,0x6A6E,0xB8E3,0x68A7,0xB64C,0x66D0,0xB3C0,0x64E9,
+0xB140,0x62F2,0xAECC,0x60EC,0xAC65,0x5ED7,0xAA0A,0x5CB4,0xA7BD,0x5A82,0xA57E,
+0x5843,0xA34C,0x55F6,0xA129,0x539B,0x9F14,0x5134,0x9D0E,0x4EC0,0x9B17,0x4C40,
+0x9930,0x49B4,0x9759,0x471D,0x9592,0x447B,0x93DC,0x41CE,0x9236,0x3F17,0x90A1,
+0x3C57,0x8F1D,0x398D,0x8DAB,0x36BA,0x8C4A,0x33DF,0x8AFB,0x30FC,0x89BE,0x2E11,
+0x8894,0x2B1F,0x877B,0x2827,0x8676,0x2528,0x8583,0x2224,0x84A3,0x1F1A,0x83D6,
+0x1C0C,0x831C,0x18F9,0x8276,0x15E2,0x81E2,0x12C8,0x8163,0x0FAB,0x80F6,0x0C8C,
+0x809E,0x096B,0x8059,0x0648,0x8027,0x0324,0x800A,0x7FFF,0x0000,0x7F62,0xF374,
+0x7D8A,0xE707,0x7A7D,0xDAD8,0x7642,0xCF04,0x70E3,0xC3A9,0x6A6E,0xB8E3,0x62F2,
+0xAECC,0x5A82,0xA57E,0x5134,0x9D0E,0x471D,0x9592,0x3C57,0x8F1D,0x30FC,0x89BE,
+0x2528,0x8583,0x18F9,0x8276,0x0C8C,0x809E,0x7FFF,0x0000,0x7642,0xCF04,0x5A82,
+0xA57E,0x30FC,0x89BE,};
+
+q15_t rearranged_twiddle_stride2_256_q15[168]={
+0x7FFF,0x0000,0x7FD9,0xF9B8,0x7F62,0xF374,0x7E9D,0xED38,0x7D8A,0xE707,0x7C2A,
+0xE0E6,0x7A7D,0xDAD8,0x7885,0xD4E1,0x7642,0xCF04,0x73B6,0xC946,0x70E3,0xC3A9,
+0x6DCA,0xBE32,0x6A6E,0xB8E3,0x66D0,0xB3C0,0x62F2,0xAECC,0x5ED7,0xAA0A,0x5A82,
+0xA57E,0x55F6,0xA129,0x5134,0x9D0E,0x4C40,0x9930,0x471D,0x9592,0x41CE,0x9236,
+0x3C57,0x8F1D,0x36BA,0x8C4A,0x30FC,0x89BE,0x2B1F,0x877B,0x2528,0x8583,0x1F1A,
+0x83D6,0x18F9,0x8276,0x12C8,0x8163,0x0C8C,0x809E,0x0648,0x8027,0x0000,0x8000,
+0xF9B8,0x8027,0xF374,0x809E,0xED38,0x8163,0xE707,0x8276,0xE0E6,0x83D6,0xDAD8,
+0x8583,0xD4E1,0x877B,0xCF04,0x89BE,0xC946,0x8C4A,0xC3A9,0x8F1D,0xBE32,0x9236,
+0xB8E3,0x9592,0xB3C0,0x9930,0xAECC,0x9D0E,0xAA0A,0xA129,0xA57E,0xA57E,0xA129,
+0xAA0A,0x9D0E,0xAECC,0x9930,0xB3C0,0x9592,0xB8E3,0x9236,0xBE32,0x8F1D,0xC3A9,
+0x8C4A,0xC946,0x89BE,0xCF04,0x877B,0xD4E1,0x8583,0xDAD8,0x83D6,0xE0E6,0x8276,
+0xE707,0x8163,0xED38,0x809E,0xF374,0x8027,0xF9B8,0x7FFF,0x0000,0x7D8A,0xE707,
+0x7642,0xCF04,0x6A6E,0xB8E3,0x5A82,0xA57E,0x471D,0x9592,0x30FC,0x89BE,0x18F9,
+0x8276,0x0000,0x8000,0xE707,0x8276,0xCF04,0x89BE,0xB8E3,0x9592,0xA57E,0xA57E,
+0x9592,0xB8E3,0x89BE,0xCF04,0x8276,0xE707,0x7FFF,0x0000,0x5A82,0xA57E,0x0000,
+0x8000,0xA57E,0xA57E,};
+
+q15_t rearranged_twiddle_stride3_256_q15[168]={
+0x7FFF,0x0000,0x7FA7,0xF695,0x7E9D,0xED38,0x7CE4,0xE3F4,0x7A7D,0xDAD8,0x776C,
+0xD1EF,0x73B6,0xC946,0x6F5F,0xC0E9,0x6A6E,0xB8E3,0x64E9,0xB140,0x5ED7,0xAA0A,
+0x5843,0xA34C,0x5134,0x9D0E,0x49B4,0x9759,0x41CE,0x9236,0x398D,0x8DAB,0x30FC,
+0x89BE,0x2827,0x8676,0x1F1A,0x83D6,0x15E2,0x81E2,0x0C8C,0x809E,0x0324,0x800A,
+0xF9B8,0x8027,0xF055,0x80F6,0xE707,0x8276,0xDDDC,0x84A3,0xD4E1,0x877B,0xCC21,
+0x8AFB,0xC3A9,0x8F1D,0xBB85,0x93DC,0xB3C0,0x9930,0xAC65,0x9F14,0xA57E,0xA57E,
+0x9F14,0xAC65,0x9930,0xB3C0,0x93DC,0xBB85,0x8F1D,0xC3A9,0x8AFB,0xCC21,0x877B,
+0xD4E1,0x84A3,0xDDDC,0x8276,0xE707,0x80F6,0xF055,0x8027,0xF9B8,0x800A,0x0324,
+0x809E,0x0C8C,0x81E2,0x15E2,0x83D6,0x1F1A,0x8676,0x2827,0x89BE,0x30FC,0x8DAB,
+0x398D,0x9236,0x41CE,0x9759,0x49B4,0x9D0E,0x5134,0xA34C,0x5843,0xAA0A,0x5ED7,
+0xB140,0x64E9,0xB8E3,0x6A6E,0xC0E9,0x6F5F,0xC946,0x73B6,0xD1EF,0x776C,0xDAD8,
+0x7A7D,0xE3F4,0x7CE4,0xED38,0x7E9D,0xF695,0x7FA7,0x7FFF,0x0000,0x7A7D,0xDAD8,
+0x6A6E,0xB8E3,0x5134,0x9D0E,0x30FC,0x89BE,0x0C8C,0x809E,0xE707,0x8276,0xC3A9,
+0x8F1D,0xA57E,0xA57E,0x8F1D,0xC3A9,0x8276,0xE707,0x809E,0x0C8C,0x89BE,0x30FC,
+0x9D0E,0x5134,0xB8E3,0x6A6E,0xDAD8,0x7A7D,0x7FFF,0x0000,0x30FC,0x89BE,0xA57E,
+0xA57E,0x89BE,0x30FC,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_1024_q15[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_1024_q15[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_1024_q15[5]={
+0,512,640,672,0,};
+
+q15_t rearranged_twiddle_stride1_1024_q15[680]={
+0x7FFF,0x0000,0x7FFF,0xFF37,0x7FFE,0xFE6E,0x7FFA,0xFDA5,0x7FF6,0xFCDC,0x7FF1,
+0xFC13,0x7FEA,0xFB4A,0x7FE2,0xFA81,0x7FD9,0xF9B8,0x7FCE,0xF8EF,0x7FC2,0xF827,
+0x7FB5,0xF75E,0x7FA7,0xF695,0x7F98,0xF5CD,0x7F87,0xF505,0x7F75,0xF43C,0x7F62,
+0xF374,0x7F4E,0xF2AC,0x7F38,0xF1E4,0x7F22,0xF11C,0x7F0A,0xF055,0x7EF0,0xEF8D,
+0x7ED6,0xEEC6,0x7EBA,0xEDFF,0x7E9D,0xED38,0x7E7F,0xEC71,0x7E60,0xEBAB,0x7E3F,
+0xEAE4,0x7E1E,0xEA1E,0x7DFB,0xE958,0x7DD6,0xE892,0x7DB1,0xE7CD,0x7D8A,0xE707,
+0x7D63,0xE642,0x7D3A,0xE57D,0x7D0F,0xE4B9,0x7CE4,0xE3F4,0x7CB7,0xE330,0x7C89,
+0xE26D,0x7C5A,0xE1A9,0x7C2A,0xE0E6,0x7BF9,0xE023,0x7BC6,0xDF61,0x7B92,0xDE9E,
+0x7B5D,0xDDDC,0x7B27,0xDD1B,0x7AEF,0xDC59,0x7AB7,0xDB99,0x7A7D,0xDAD8,0x7A42,
+0xDA18,0x7A06,0xD958,0x79C9,0xD898,0x798A,0xD7D9,0x794A,0xD71B,0x790A,0xD65C,
+0x78C8,0xD59E,0x7885,0xD4E1,0x7840,0xD424,0x77FB,0xD367,0x77B4,0xD2AB,0x776C,
+0xD1EF,0x7723,0xD134,0x76D9,0xD079,0x768E,0xCFBE,0x7642,0xCF04,0x75F4,0xCE4B,
+0x75A6,0xCD92,0x7556,0xCCD9,0x7505,0xCC21,0x74B3,0xCB69,0x7460,0xCAB2,0x740B,
+0xC9FC,0x73B6,0xC946,0x735F,0xC890,0x7308,0xC7DB,0x72AF,0xC727,0x7255,0xC673,
+0x71FA,0xC5C0,0x719E,0xC50D,0x7141,0xC45B,0x70E3,0xC3A9,0x7083,0xC2F8,0x7023,
+0xC248,0x6FC2,0xC198,0x6F5F,0xC0E9,0x6EFB,0xC03A,0x6E97,0xBF8C,0x6E31,0xBEDF,
+0x6DCA,0xBE32,0x6D62,0xBD86,0x6CF9,0xBCDA,0x6C8F,0xBC2F,0x6C24,0xBB85,0x6BB8,
+0xBADC,0x6B4B,0xBA33,0x6ADD,0xB98B,0x6A6E,0xB8E3,0x69FD,0xB83C,0x698C,0xB796,
+0x691A,0xB6F1,0x68A7,0xB64C,0x6832,0xB5A8,0x67BD,0xB505,0x6747,0xB462,0x66D0,
+0xB3C0,0x6657,0xB31F,0x65DE,0xB27F,0x6564,0xB1DF,0x64E9,0xB140,0x646C,0xB0A2,
+0x63EF,0xB005,0x6371,0xAF68,0x62F2,0xAECC,0x6272,0xAE31,0x61F1,0xAD97,0x616F,
+0xACFD,0x60EC,0xAC65,0x6068,0xABCD,0x5FE4,0xAB36,0x5F5E,0xAAA0,0x5ED7,0xAA0A,
+0x5E50,0xA976,0x5DC8,0xA8E2,0x5D3E,0xA84F,0x5CB4,0xA7BD,0x5C29,0xA72C,0x5B9D,
+0xA69C,0x5B10,0xA60C,0x5A82,0xA57E,0x59F4,0xA4F0,0x5964,0xA463,0x58D4,0xA3D7,
+0x5843,0xA34C,0x57B1,0xA2C2,0x571E,0xA238,0x568A,0xA1B0,0x55F6,0xA129,0x5560,
+0xA0A2,0x54CA,0xA01C,0x5433,0x9F98,0x539B,0x9F14,0x5303,0x9E91,0x5269,0x9E0F,
+0x51CF,0x9D8E,0x5134,0x9D0E,0x5098,0x9C8F,0x4FFB,0x9C11,0x4F5E,0x9B94,0x4EC0,
+0x9B17,0x4E21,0x9A9C,0x4D81,0x9A22,0x4CE1,0x99A9,0x4C40,0x9930,0x4B9E,0x98B9,
+0x4AFB,0x9843,0x4A58,0x97CE,0x49B4,0x9759,0x490F,0x96E6,0x486A,0x9674,0x47C4,
+0x9603,0x471D,0x9592,0x4675,0x9523,0x45CD,0x94B5,0x4524,0x9448,0x447B,0x93DC,
+0x43D1,0x9371,0x4326,0x9307,0x427A,0x929E,0x41CE,0x9236,0x4121,0x91CF,0x4074,
+0x9169,0x3FC6,0x9105,0x3F17,0x90A1,0x3E68,0x903E,0x3DB8,0x8FDD,0x3D08,0x8F7D,
+0x3C57,0x8F1D,0x3BA5,0x8EBF,0x3AF3,0x8E62,0x3A40,0x8E06,0x398D,0x8DAB,0x38D9,
+0x8D51,0x3825,0x8CF8,0x3770,0x8CA1,0x36BA,0x8C4A,0x3604,0x8BF5,0x354E,0x8BA0,
+0x3497,0x8B4D,0x33DF,0x8AFB,0x3327,0x8AAA,0x326E,0x8A5A,0x31B5,0x8A0C,0x30FC,
+0x89BE,0x3042,0x8972,0x2F87,0x8927,0x2ECC,0x88DD,0x2E11,0x8894,0x2D55,0x884C,
+0x2C99,0x8805,0x2BDC,0x87C0,0x2B1F,0x877B,0x2A62,0x8738,0x29A4,0x86F6,0x28E5,
+0x86B6,0x2827,0x8676,0x2768,0x8637,0x26A8,0x85FA,0x25E8,0x85BE,0x2528,0x8583,
+0x2467,0x8549,0x23A7,0x8511,0x22E5,0x84D9,0x2224,0x84A3,0x2162,0x846E,0x209F,
+0x843A,0x1FDD,0x8407,0x1F1A,0x83D6,0x1E57,0x83A6,0x1D93,0x8377,0x1CD0,0x8349,
+0x1C0C,0x831C,0x1B47,0x82F1,0x1A83,0x82C6,0x19BE,0x829D,0x18F9,0x8276,0x1833,
+0x824F,0x176E,0x822A,0x16A8,0x8205,0x15E2,0x81E2,0x151C,0x81C1,0x1455,0x81A0,
+0x138F,0x8181,0x12C8,0x8163,0x1201,0x8146,0x113A,0x812A,0x1073,0x8110,0x0FAB,
+0x80F6,0x0EE4,0x80DE,0x0E1C,0x80C8,0x0D54,0x80B2,0x0C8C,0x809E,0x0BC4,0x808B,
+0x0AFB,0x8079,0x0A33,0x8068,0x096B,0x8059,0x08A2,0x804B,0x07D9,0x803E,0x0711,
+0x8032,0x0648,0x8027,0x057F,0x801E,0x04B6,0x8016,0x03ED,0x800F,0x0324,0x800A,
+0x025B,0x8006,0x0192,0x8002,0x00C9,0x8001,0x7FFF,0x0000,0x7FF6,0xFCDC,0x7FD9,
+0xF9B8,0x7FA7,0xF695,0x7F62,0xF374,0x7F0A,0xF055,0x7E9D,0xED38,0x7E1E,0xEA1E,
+0x7D8A,0xE707,0x7CE4,0xE3F4,0x7C2A,0xE0E6,0x7B5D,0xDDDC,0x7A7D,0xDAD8,0x798A,
+0xD7D9,0x7885,0xD4E1,0x776C,0xD1EF,0x7642,0xCF04,0x7505,0xCC21,0x73B6,0xC946,
+0x7255,0xC673,0x70E3,0xC3A9,0x6F5F,0xC0E9,0x6DCA,0xBE32,0x6C24,0xBB85,0x6A6E,
+0xB8E3,0x68A7,0xB64C,0x66D0,0xB3C0,0x64E9,0xB140,0x62F2,0xAECC,0x60EC,0xAC65,
+0x5ED7,0xAA0A,0x5CB4,0xA7BD,0x5A82,0xA57E,0x5843,0xA34C,0x55F6,0xA129,0x539B,
+0x9F14,0x5134,0x9D0E,0x4EC0,0x9B17,0x4C40,0x9930,0x49B4,0x9759,0x471D,0x9592,
+0x447B,0x93DC,0x41CE,0x9236,0x3F17,0x90A1,0x3C57,0x8F1D,0x398D,0x8DAB,0x36BA,
+0x8C4A,0x33DF,0x8AFB,0x30FC,0x89BE,0x2E11,0x8894,0x2B1F,0x877B,0x2827,0x8676,
+0x2528,0x8583,0x2224,0x84A3,0x1F1A,0x83D6,0x1C0C,0x831C,0x18F9,0x8276,0x15E2,
+0x81E2,0x12C8,0x8163,0x0FAB,0x80F6,0x0C8C,0x809E,0x096B,0x8059,0x0648,0x8027,
+0x0324,0x800A,0x7FFF,0x0000,0x7F62,0xF374,0x7D8A,0xE707,0x7A7D,0xDAD8,0x7642,
+0xCF04,0x70E3,0xC3A9,0x6A6E,0xB8E3,0x62F2,0xAECC,0x5A82,0xA57E,0x5134,0x9D0E,
+0x471D,0x9592,0x3C57,0x8F1D,0x30FC,0x89BE,0x2528,0x8583,0x18F9,0x8276,0x0C8C,
+0x809E,0x7FFF,0x0000,0x7642,0xCF04,0x5A82,0xA57E,0x30FC,0x89BE,};
+
+q15_t rearranged_twiddle_stride2_1024_q15[680]={
+0x7FFF,0x0000,0x7FFE,0xFE6E,0x7FF6,0xFCDC,0x7FEA,0xFB4A,0x7FD9,0xF9B8,0x7FC2,
+0xF827,0x7FA7,0xF695,0x7F87,0xF505,0x7F62,0xF374,0x7F38,0xF1E4,0x7F0A,0xF055,
+0x7ED6,0xEEC6,0x7E9D,0xED38,0x7E60,0xEBAB,0x7E1E,0xEA1E,0x7DD6,0xE892,0x7D8A,
+0xE707,0x7D3A,0xE57D,0x7CE4,0xE3F4,0x7C89,0xE26D,0x7C2A,0xE0E6,0x7BC6,0xDF61,
+0x7B5D,0xDDDC,0x7AEF,0xDC59,0x7A7D,0xDAD8,0x7A06,0xD958,0x798A,0xD7D9,0x790A,
+0xD65C,0x7885,0xD4E1,0x77FB,0xD367,0x776C,0xD1EF,0x76D9,0xD079,0x7642,0xCF04,
+0x75A6,0xCD92,0x7505,0xCC21,0x7460,0xCAB2,0x73B6,0xC946,0x7308,0xC7DB,0x7255,
+0xC673,0x719E,0xC50D,0x70E3,0xC3A9,0x7023,0xC248,0x6F5F,0xC0E9,0x6E97,0xBF8C,
+0x6DCA,0xBE32,0x6CF9,0xBCDA,0x6C24,0xBB85,0x6B4B,0xBA33,0x6A6E,0xB8E3,0x698C,
+0xB796,0x68A7,0xB64C,0x67BD,0xB505,0x66D0,0xB3C0,0x65DE,0xB27F,0x64E9,0xB140,
+0x63EF,0xB005,0x62F2,0xAECC,0x61F1,0xAD97,0x60EC,0xAC65,0x5FE4,0xAB36,0x5ED7,
+0xAA0A,0x5DC8,0xA8E2,0x5CB4,0xA7BD,0x5B9D,0xA69C,0x5A82,0xA57E,0x5964,0xA463,
+0x5843,0xA34C,0x571E,0xA238,0x55F6,0xA129,0x54CA,0xA01C,0x539B,0x9F14,0x5269,
+0x9E0F,0x5134,0x9D0E,0x4FFB,0x9C11,0x4EC0,0x9B17,0x4D81,0x9A22,0x4C40,0x9930,
+0x4AFB,0x9843,0x49B4,0x9759,0x486A,0x9674,0x471D,0x9592,0x45CD,0x94B5,0x447B,
+0x93DC,0x4326,0x9307,0x41CE,0x9236,0x4074,0x9169,0x3F17,0x90A1,0x3DB8,0x8FDD,
+0x3C57,0x8F1D,0x3AF3,0x8E62,0x398D,0x8DAB,0x3825,0x8CF8,0x36BA,0x8C4A,0x354E,
+0x8BA0,0x33DF,0x8AFB,0x326E,0x8A5A,0x30FC,0x89BE,0x2F87,0x8927,0x2E11,0x8894,
+0x2C99,0x8805,0x2B1F,0x877B,0x29A4,0x86F6,0x2827,0x8676,0x26A8,0x85FA,0x2528,
+0x8583,0x23A7,0x8511,0x2224,0x84A3,0x209F,0x843A,0x1F1A,0x83D6,0x1D93,0x8377,
+0x1C0C,0x831C,0x1A83,0x82C6,0x18F9,0x8276,0x176E,0x822A,0x15E2,0x81E2,0x1455,
+0x81A0,0x12C8,0x8163,0x113A,0x812A,0x0FAB,0x80F6,0x0E1C,0x80C8,0x0C8C,0x809E,
+0x0AFB,0x8079,0x096B,0x8059,0x07D9,0x803E,0x0648,0x8027,0x04B6,0x8016,0x0324,
+0x800A,0x0192,0x8002,0x0000,0x8000,0xFE6E,0x8002,0xFCDC,0x800A,0xFB4A,0x8016,
+0xF9B8,0x8027,0xF827,0x803E,0xF695,0x8059,0xF505,0x8079,0xF374,0x809E,0xF1E4,
+0x80C8,0xF055,0x80F6,0xEEC6,0x812A,0xED38,0x8163,0xEBAB,0x81A0,0xEA1E,0x81E2,
+0xE892,0x822A,0xE707,0x8276,0xE57D,0x82C6,0xE3F4,0x831C,0xE26D,0x8377,0xE0E6,
+0x83D6,0xDF61,0x843A,0xDDDC,0x84A3,0xDC59,0x8511,0xDAD8,0x8583,0xD958,0x85FA,
+0xD7D9,0x8676,0xD65C,0x86F6,0xD4E1,0x877B,0xD367,0x8805,0xD1EF,0x8894,0xD079,
+0x8927,0xCF04,0x89BE,0xCD92,0x8A5A,0xCC21,0x8AFB,0xCAB2,0x8BA0,0xC946,0x8C4A,
+0xC7DB,0x8CF8,0xC673,0x8DAB,0xC50D,0x8E62,0xC3A9,0x8F1D,0xC248,0x8FDD,0xC0E9,
+0x90A1,0xBF8C,0x9169,0xBE32,0x9236,0xBCDA,0x9307,0xBB85,0x93DC,0xBA33,0x94B5,
+0xB8E3,0x9592,0xB796,0x9674,0xB64C,0x9759,0xB505,0x9843,0xB3C0,0x9930,0xB27F,
+0x9A22,0xB140,0x9B17,0xB005,0x9C11,0xAECC,0x9D0E,0xAD97,0x9E0F,0xAC65,0x9F14,
+0xAB36,0xA01C,0xAA0A,0xA129,0xA8E2,0xA238,0xA7BD,0xA34C,0xA69C,0xA463,0xA57E,
+0xA57E,0xA463,0xA69C,0xA34C,0xA7BD,0xA238,0xA8E2,0xA129,0xAA0A,0xA01C,0xAB36,
+0x9F14,0xAC65,0x9E0F,0xAD97,0x9D0E,0xAECC,0x9C11,0xB005,0x9B17,0xB140,0x9A22,
+0xB27F,0x9930,0xB3C0,0x9843,0xB505,0x9759,0xB64C,0x9674,0xB796,0x9592,0xB8E3,
+0x94B5,0xBA33,0x93DC,0xBB85,0x9307,0xBCDA,0x9236,0xBE32,0x9169,0xBF8C,0x90A1,
+0xC0E9,0x8FDD,0xC248,0x8F1D,0xC3A9,0x8E62,0xC50D,0x8DAB,0xC673,0x8CF8,0xC7DB,
+0x8C4A,0xC946,0x8BA0,0xCAB2,0x8AFB,0xCC21,0x8A5A,0xCD92,0x89BE,0xCF04,0x8927,
+0xD079,0x8894,0xD1EF,0x8805,0xD367,0x877B,0xD4E1,0x86F6,0xD65C,0x8676,0xD7D9,
+0x85FA,0xD958,0x8583,0xDAD8,0x8511,0xDC59,0x84A3,0xDDDC,0x843A,0xDF61,0x83D6,
+0xE0E6,0x8377,0xE26D,0x831C,0xE3F4,0x82C6,0xE57D,0x8276,0xE707,0x822A,0xE892,
+0x81E2,0xEA1E,0x81A0,0xEBAB,0x8163,0xED38,0x812A,0xEEC6,0x80F6,0xF055,0x80C8,
+0xF1E4,0x809E,0xF374,0x8079,0xF505,0x8059,0xF695,0x803E,0xF827,0x8027,0xF9B8,
+0x8016,0xFB4A,0x800A,0xFCDC,0x8002,0xFE6E,0x7FFF,0x0000,0x7FD9,0xF9B8,0x7F62,
+0xF374,0x7E9D,0xED38,0x7D8A,0xE707,0x7C2A,0xE0E6,0x7A7D,0xDAD8,0x7885,0xD4E1,
+0x7642,0xCF04,0x73B6,0xC946,0x70E3,0xC3A9,0x6DCA,0xBE32,0x6A6E,0xB8E3,0x66D0,
+0xB3C0,0x62F2,0xAECC,0x5ED7,0xAA0A,0x5A82,0xA57E,0x55F6,0xA129,0x5134,0x9D0E,
+0x4C40,0x9930,0x471D,0x9592,0x41CE,0x9236,0x3C57,0x8F1D,0x36BA,0x8C4A,0x30FC,
+0x89BE,0x2B1F,0x877B,0x2528,0x8583,0x1F1A,0x83D6,0x18F9,0x8276,0x12C8,0x8163,
+0x0C8C,0x809E,0x0648,0x8027,0x0000,0x8000,0xF9B8,0x8027,0xF374,0x809E,0xED38,
+0x8163,0xE707,0x8276,0xE0E6,0x83D6,0xDAD8,0x8583,0xD4E1,0x877B,0xCF04,0x89BE,
+0xC946,0x8C4A,0xC3A9,0x8F1D,0xBE32,0x9236,0xB8E3,0x9592,0xB3C0,0x9930,0xAECC,
+0x9D0E,0xAA0A,0xA129,0xA57E,0xA57E,0xA129,0xAA0A,0x9D0E,0xAECC,0x9930,0xB3C0,
+0x9592,0xB8E3,0x9236,0xBE32,0x8F1D,0xC3A9,0x8C4A,0xC946,0x89BE,0xCF04,0x877B,
+0xD4E1,0x8583,0xDAD8,0x83D6,0xE0E6,0x8276,0xE707,0x8163,0xED38,0x809E,0xF374,
+0x8027,0xF9B8,0x7FFF,0x0000,0x7D8A,0xE707,0x7642,0xCF04,0x6A6E,0xB8E3,0x5A82,
+0xA57E,0x471D,0x9592,0x30FC,0x89BE,0x18F9,0x8276,0x0000,0x8000,0xE707,0x8276,
+0xCF04,0x89BE,0xB8E3,0x9592,0xA57E,0xA57E,0x9592,0xB8E3,0x89BE,0xCF04,0x8276,
+0xE707,0x7FFF,0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,};
+
+q15_t rearranged_twiddle_stride3_1024_q15[680]={
+0x7FFF,0x0000,0x7FFA,0xFDA5,0x7FEA,0xFB4A,0x7FCE,0xF8EF,0x7FA7,0xF695,0x7F75,
+0xF43C,0x7F38,0xF1E4,0x7EF0,0xEF8D,0x7E9D,0xED38,0x7E3F,0xEAE4,0x7DD6,0xE892,
+0x7D63,0xE642,0x7CE4,0xE3F4,0x7C5A,0xE1A9,0x7BC6,0xDF61,0x7B27,0xDD1B,0x7A7D,
+0xDAD8,0x79C9,0xD898,0x790A,0xD65C,0x7840,0xD424,0x776C,0xD1EF,0x768E,0xCFBE,
+0x75A6,0xCD92,0x74B3,0xCB69,0x73B6,0xC946,0x72AF,0xC727,0x719E,0xC50D,0x7083,
+0xC2F8,0x6F5F,0xC0E9,0x6E31,0xBEDF,0x6CF9,0xBCDA,0x6BB8,0xBADC,0x6A6E,0xB8E3,
+0x691A,0xB6F1,0x67BD,0xB505,0x6657,0xB31F,0x64E9,0xB140,0x6371,0xAF68,0x61F1,
+0xAD97,0x6068,0xABCD,0x5ED7,0xAA0A,0x5D3E,0xA84F,0x5B9D,0xA69C,0x59F4,0xA4F0,
+0x5843,0xA34C,0x568A,0xA1B0,0x54CA,0xA01C,0x5303,0x9E91,0x5134,0x9D0E,0x4F5E,
+0x9B94,0x4D81,0x9A22,0x4B9E,0x98B9,0x49B4,0x9759,0x47C4,0x9603,0x45CD,0x94B5,
+0x43D1,0x9371,0x41CE,0x9236,0x3FC6,0x9105,0x3DB8,0x8FDD,0x3BA5,0x8EBF,0x398D,
+0x8DAB,0x3770,0x8CA1,0x354E,0x8BA0,0x3327,0x8AAA,0x30FC,0x89BE,0x2ECC,0x88DD,
+0x2C99,0x8805,0x2A62,0x8738,0x2827,0x8676,0x25E8,0x85BE,0x23A7,0x8511,0x2162,
+0x846E,0x1F1A,0x83D6,0x1CD0,0x8349,0x1A83,0x82C6,0x1833,0x824F,0x15E2,0x81E2,
+0x138F,0x8181,0x113A,0x812A,0x0EE4,0x80DE,0x0C8C,0x809E,0x0A33,0x8068,0x07D9,
+0x803E,0x057F,0x801E,0x0324,0x800A,0x00C9,0x8001,0xFE6E,0x8002,0xFC13,0x800F,
+0xF9B8,0x8027,0xF75E,0x804B,0xF505,0x8079,0xF2AC,0x80B2,0xF055,0x80F6,0xEDFF,
+0x8146,0xEBAB,0x81A0,0xE958,0x8205,0xE707,0x8276,0xE4B9,0x82F1,0xE26D,0x8377,
+0xE023,0x8407,0xDDDC,0x84A3,0xDB99,0x8549,0xD958,0x85FA,0xD71B,0x86B6,0xD4E1,
+0x877B,0xD2AB,0x884C,0xD079,0x8927,0xCE4B,0x8A0C,0xCC21,0x8AFB,0xC9FC,0x8BF5,
+0xC7DB,0x8CF8,0xC5C0,0x8E06,0xC3A9,0x8F1D,0xC198,0x903E,0xBF8C,0x9169,0xBD86,
+0x929E,0xBB85,0x93DC,0xB98B,0x9523,0xB796,0x9674,0xB5A8,0x97CE,0xB3C0,0x9930,
+0xB1DF,0x9A9C,0xB005,0x9C11,0xAE31,0x9D8E,0xAC65,0x9F14,0xAAA0,0xA0A2,0xA8E2,
+0xA238,0xA72C,0xA3D7,0xA57E,0xA57E,0xA3D7,0xA72C,0xA238,0xA8E2,0xA0A2,0xAAA0,
+0x9F14,0xAC65,0x9D8E,0xAE31,0x9C11,0xB005,0x9A9C,0xB1DF,0x9930,0xB3C0,0x97CE,
+0xB5A8,0x9674,0xB796,0x9523,0xB98B,0x93DC,0xBB85,0x929E,0xBD86,0x9169,0xBF8C,
+0x903E,0xC198,0x8F1D,0xC3A9,0x8E06,0xC5C0,0x8CF8,0xC7DB,0x8BF5,0xC9FC,0x8AFB,
+0xCC21,0x8A0C,0xCE4B,0x8927,0xD079,0x884C,0xD2AB,0x877B,0xD4E1,0x86B6,0xD71B,
+0x85FA,0xD958,0x8549,0xDB99,0x84A3,0xDDDC,0x8407,0xE023,0x8377,0xE26D,0x82F1,
+0xE4B9,0x8276,0xE707,0x8205,0xE958,0x81A0,0xEBAB,0x8146,0xEDFF,0x80F6,0xF055,
+0x80B2,0xF2AC,0x8079,0xF505,0x804B,0xF75E,0x8027,0xF9B8,0x800F,0xFC13,0x8002,
+0xFE6E,0x8001,0x00C9,0x800A,0x0324,0x801E,0x057F,0x803E,0x07D9,0x8068,0x0A33,
+0x809E,0x0C8C,0x80DE,0x0EE4,0x812A,0x113A,0x8181,0x138F,0x81E2,0x15E2,0x824F,
+0x1833,0x82C6,0x1A83,0x8349,0x1CD0,0x83D6,0x1F1A,0x846E,0x2162,0x8511,0x23A7,
+0x85BE,0x25E8,0x8676,0x2827,0x8738,0x2A62,0x8805,0x2C99,0x88DD,0x2ECC,0x89BE,
+0x30FC,0x8AAA,0x3327,0x8BA0,0x354E,0x8CA1,0x3770,0x8DAB,0x398D,0x8EBF,0x3BA5,
+0x8FDD,0x3DB8,0x9105,0x3FC6,0x9236,0x41CE,0x9371,0x43D1,0x94B5,0x45CD,0x9603,
+0x47C4,0x9759,0x49B4,0x98B9,0x4B9E,0x9A22,0x4D81,0x9B94,0x4F5E,0x9D0E,0x5134,
+0x9E91,0x5303,0xA01C,0x54CA,0xA1B0,0x568A,0xA34C,0x5843,0xA4F0,0x59F4,0xA69C,
+0x5B9D,0xA84F,0x5D3E,0xAA0A,0x5ED7,0xABCD,0x6068,0xAD97,0x61F1,0xAF68,0x6371,
+0xB140,0x64E9,0xB31F,0x6657,0xB505,0x67BD,0xB6F1,0x691A,0xB8E3,0x6A6E,0xBADC,
+0x6BB8,0xBCDA,0x6CF9,0xBEDF,0x6E31,0xC0E9,0x6F5F,0xC2F8,0x7083,0xC50D,0x719E,
+0xC727,0x72AF,0xC946,0x73B6,0xCB69,0x74B3,0xCD92,0x75A6,0xCFBE,0x768E,0xD1EF,
+0x776C,0xD424,0x7840,0xD65C,0x790A,0xD898,0x79C9,0xDAD8,0x7A7D,0xDD1B,0x7B27,
+0xDF61,0x7BC6,0xE1A9,0x7C5A,0xE3F4,0x7CE4,0xE642,0x7D63,0xE892,0x7DD6,0xEAE4,
+0x7E3F,0xED38,0x7E9D,0xEF8D,0x7EF0,0xF1E4,0x7F38,0xF43C,0x7F75,0xF695,0x7FA7,
+0xF8EF,0x7FCE,0xFB4A,0x7FEA,0xFDA5,0x7FFA,0x7FFF,0x0000,0x7FA7,0xF695,0x7E9D,
+0xED38,0x7CE4,0xE3F4,0x7A7D,0xDAD8,0x776C,0xD1EF,0x73B6,0xC946,0x6F5F,0xC0E9,
+0x6A6E,0xB8E3,0x64E9,0xB140,0x5ED7,0xAA0A,0x5843,0xA34C,0x5134,0x9D0E,0x49B4,
+0x9759,0x41CE,0x9236,0x398D,0x8DAB,0x30FC,0x89BE,0x2827,0x8676,0x1F1A,0x83D6,
+0x15E2,0x81E2,0x0C8C,0x809E,0x0324,0x800A,0xF9B8,0x8027,0xF055,0x80F6,0xE707,
+0x8276,0xDDDC,0x84A3,0xD4E1,0x877B,0xCC21,0x8AFB,0xC3A9,0x8F1D,0xBB85,0x93DC,
+0xB3C0,0x9930,0xAC65,0x9F14,0xA57E,0xA57E,0x9F14,0xAC65,0x9930,0xB3C0,0x93DC,
+0xBB85,0x8F1D,0xC3A9,0x8AFB,0xCC21,0x877B,0xD4E1,0x84A3,0xDDDC,0x8276,0xE707,
+0x80F6,0xF055,0x8027,0xF9B8,0x800A,0x0324,0x809E,0x0C8C,0x81E2,0x15E2,0x83D6,
+0x1F1A,0x8676,0x2827,0x89BE,0x30FC,0x8DAB,0x398D,0x9236,0x41CE,0x9759,0x49B4,
+0x9D0E,0x5134,0xA34C,0x5843,0xAA0A,0x5ED7,0xB140,0x64E9,0xB8E3,0x6A6E,0xC0E9,
+0x6F5F,0xC946,0x73B6,0xD1EF,0x776C,0xDAD8,0x7A7D,0xE3F4,0x7CE4,0xED38,0x7E9D,
+0xF695,0x7FA7,0x7FFF,0x0000,0x7A7D,0xDAD8,0x6A6E,0xB8E3,0x5134,0x9D0E,0x30FC,
+0x89BE,0x0C8C,0x809E,0xE707,0x8276,0xC3A9,0x8F1D,0xA57E,0xA57E,0x8F1D,0xC3A9,
+0x8276,0xE707,0x809E,0x0C8C,0x89BE,0x30FC,0x9D0E,0x5134,0xB8E3,0x6A6E,0xDAD8,
+0x7A7D,0x7FFF,0x0000,0x30FC,0x89BE,0xA57E,0xA57E,0x89BE,0x30FC,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) || defined(ARM_TABLE_TWIDDLECOEF_Q15_8192)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_4096_q15[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_4096_q15[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_4096_q15[6]={
+0,2048,2560,2688,2720,0,};
+
+q15_t rearranged_twiddle_stride1_4096_q15[2728]={
+0x7FFF,0x0000,0x7FFF,0xFFCE,0x7FFF,0xFF9B,0x7FFF,0xFF69,0x7FFF,0xFF37,0x7FFF,
+0xFF05,0x7FFF,0xFED2,0x7FFE,0xFEA0,0x7FFE,0xFE6E,0x7FFD,0xFE3C,0x7FFC,0xFE09,
+0x7FFB,0xFDD7,0x7FFA,0xFDA5,0x7FF9,0xFD73,0x7FF8,0xFD40,0x7FF7,0xFD0E,0x7FF6,
+0xFCDC,0x7FF5,0xFCAA,0x7FF4,0xFC77,0x7FF2,0xFC45,0x7FF1,0xFC13,0x7FEF,0xFBE1,
+0x7FED,0xFBAE,0x7FEC,0xFB7C,0x7FEA,0xFB4A,0x7FE8,0xFB18,0x7FE6,0xFAE5,0x7FE4,
+0xFAB3,0x7FE2,0xFA81,0x7FE0,0xFA4F,0x7FDD,0xFA1D,0x7FDB,0xF9EA,0x7FD9,0xF9B8,
+0x7FD6,0xF986,0x7FD3,0xF954,0x7FD1,0xF922,0x7FCE,0xF8EF,0x7FCB,0xF8BD,0x7FC8,
+0xF88B,0x7FC5,0xF859,0x7FC2,0xF827,0x7FBF,0xF7F4,0x7FBC,0xF7C2,0x7FB9,0xF790,
+0x7FB5,0xF75E,0x7FB2,0xF72C,0x7FAE,0xF6FA,0x7FAB,0xF6C8,0x7FA7,0xF695,0x7FA3,
+0xF663,0x7FA0,0xF631,0x7F9C,0xF5FF,0x7F98,0xF5CD,0x7F94,0xF59B,0x7F90,0xF569,
+0x7F8B,0xF537,0x7F87,0xF505,0x7F83,0xF4D3,0x7F7E,0xF4A0,0x7F7A,0xF46E,0x7F75,
+0xF43C,0x7F71,0xF40A,0x7F6C,0xF3D8,0x7F67,0xF3A6,0x7F62,0xF374,0x7F5D,0xF342,
+0x7F58,0xF310,0x7F53,0xF2DE,0x7F4E,0xF2AC,0x7F49,0xF27A,0x7F43,0xF248,0x7F3E,
+0xF216,0x7F38,0xF1E4,0x7F33,0xF1B2,0x7F2D,0xF180,0x7F27,0xF14E,0x7F22,0xF11C,
+0x7F1C,0xF0EB,0x7F16,0xF0B9,0x7F10,0xF087,0x7F0A,0xF055,0x7F03,0xF023,0x7EFD,
+0xEFF1,0x7EF7,0xEFBF,0x7EF0,0xEF8D,0x7EEA,0xEF5C,0x7EE3,0xEF2A,0x7EDD,0xEEF8,
+0x7ED6,0xEEC6,0x7ECF,0xEE94,0x7EC8,0xEE62,0x7EC1,0xEE31,0x7EBA,0xEDFF,0x7EB3,
+0xEDCD,0x7EAC,0xED9B,0x7EA5,0xED6A,0x7E9D,0xED38,0x7E96,0xED06,0x7E8E,0xECD5,
+0x7E87,0xECA3,0x7E7F,0xEC71,0x7E78,0xEC3F,0x7E70,0xEC0E,0x7E68,0xEBDC,0x7E60,
+0xEBAB,0x7E58,0xEB79,0x7E50,0xEB47,0x7E48,0xEB16,0x7E3F,0xEAE4,0x7E37,0xEAB3,
+0x7E2F,0xEA81,0x7E26,0xEA4F,0x7E1E,0xEA1E,0x7E15,0xE9EC,0x7E0C,0xE9BB,0x7E03,
+0xE989,0x7DFB,0xE958,0x7DF2,0xE926,0x7DE9,0xE8F5,0x7DE0,0xE8C4,0x7DD6,0xE892,
+0x7DCD,0xE861,0x7DC4,0xE82F,0x7DBA,0xE7FE,0x7DB1,0xE7CD,0x7DA7,0xE79B,0x7D9E,
+0xE76A,0x7D94,0xE739,0x7D8A,0xE707,0x7D81,0xE6D6,0x7D77,0xE6A5,0x7D6D,0xE673,
+0x7D63,0xE642,0x7D58,0xE611,0x7D4E,0xE5E0,0x7D44,0xE5AF,0x7D3A,0xE57D,0x7D2F,
+0xE54C,0x7D25,0xE51B,0x7D1A,0xE4EA,0x7D0F,0xE4B9,0x7D05,0xE488,0x7CFA,0xE457,
+0x7CEF,0xE426,0x7CE4,0xE3F4,0x7CD9,0xE3C3,0x7CCE,0xE392,0x7CC2,0xE361,0x7CB7,
+0xE330,0x7CAC,0xE2FF,0x7CA0,0xE2CF,0x7C95,0xE29E,0x7C89,0xE26D,0x7C7E,0xE23C,
+0x7C72,0xE20B,0x7C66,0xE1DA,0x7C5A,0xE1A9,0x7C4E,0xE178,0x7C42,0xE148,0x7C36,
+0xE117,0x7C2A,0xE0E6,0x7C1E,0xE0B5,0x7C11,0xE085,0x7C05,0xE054,0x7BF9,0xE023,
+0x7BEC,0xDFF2,0x7BDF,0xDFC2,0x7BD3,0xDF91,0x7BC6,0xDF61,0x7BB9,0xDF30,0x7BAC,
+0xDEFF,0x7B9F,0xDECF,0x7B92,0xDE9E,0x7B85,0xDE6E,0x7B78,0xDE3D,0x7B6A,0xDE0D,
+0x7B5D,0xDDDC,0x7B50,0xDDAC,0x7B42,0xDD7C,0x7B34,0xDD4B,0x7B27,0xDD1B,0x7B19,
+0xDCEA,0x7B0B,0xDCBA,0x7AFD,0xDC8A,0x7AEF,0xDC59,0x7AE1,0xDC29,0x7AD3,0xDBF9,
+0x7AC5,0xDBC9,0x7AB7,0xDB99,0x7AA8,0xDB68,0x7A9A,0xDB38,0x7A8C,0xDB08,0x7A7D,
+0xDAD8,0x7A6E,0xDAA8,0x7A60,0xDA78,0x7A51,0xDA48,0x7A42,0xDA18,0x7A33,0xD9E8,
+0x7A24,0xD9B8,0x7A15,0xD988,0x7A06,0xD958,0x79F7,0xD928,0x79E7,0xD8F8,0x79D8,
+0xD8C8,0x79C9,0xD898,0x79B9,0xD869,0x79AA,0xD839,0x799A,0xD809,0x798A,0xD7D9,
+0x797A,0xD7AA,0x796A,0xD77A,0x795B,0xD74A,0x794A,0xD71B,0x793A,0xD6EB,0x792A,
+0xD6BB,0x791A,0xD68C,0x790A,0xD65C,0x78F9,0xD62D,0x78E9,0xD5FD,0x78D8,0xD5CE,
+0x78C8,0xD59E,0x78B7,0xD56F,0x78A6,0xD53F,0x7895,0xD510,0x7885,0xD4E1,0x7874,
+0xD4B1,0x7863,0xD482,0x7851,0xD453,0x7840,0xD424,0x782F,0xD3F4,0x781E,0xD3C5,
+0x780C,0xD396,0x77FB,0xD367,0x77E9,0xD338,0x77D8,0xD309,0x77C6,0xD2DA,0x77B4,
+0xD2AB,0x77A2,0xD27C,0x7790,0xD24D,0x777E,0xD21E,0x776C,0xD1EF,0x775A,0xD1C0,
+0x7748,0xD191,0x7736,0xD162,0x7723,0xD134,0x7711,0xD105,0x76FE,0xD0D6,0x76EC,
+0xD0A7,0x76D9,0xD079,0x76C7,0xD04A,0x76B4,0xD01B,0x76A1,0xCFED,0x768E,0xCFBE,
+0x767B,0xCF90,0x7668,0xCF61,0x7655,0xCF33,0x7642,0xCF04,0x762E,0xCED6,0x761B,
+0xCEA7,0x7608,0xCE79,0x75F4,0xCE4B,0x75E1,0xCE1C,0x75CD,0xCDEE,0x75B9,0xCDC0,
+0x75A6,0xCD92,0x7592,0xCD63,0x757E,0xCD35,0x756A,0xCD07,0x7556,0xCCD9,0x7542,
+0xCCAB,0x752D,0xCC7D,0x7519,0xCC4F,0x7505,0xCC21,0x74F0,0xCBF3,0x74DC,0xCBC5,
+0x74C7,0xCB97,0x74B3,0xCB69,0x749E,0xCB3C,0x7489,0xCB0E,0x7475,0xCAE0,0x7460,
+0xCAB2,0x744B,0xCA85,0x7436,0xCA57,0x7421,0xCA29,0x740B,0xC9FC,0x73F6,0xC9CE,
+0x73E1,0xC9A1,0x73CB,0xC973,0x73B6,0xC946,0x73A0,0xC918,0x738B,0xC8EB,0x7375,
+0xC8BE,0x735F,0xC890,0x734A,0xC863,0x7334,0xC836,0x731E,0xC809,0x7308,0xC7DB,
+0x72F2,0xC7AE,0x72DC,0xC781,0x72C5,0xC754,0x72AF,0xC727,0x7299,0xC6FA,0x7282,
+0xC6CD,0x726C,0xC6A0,0x7255,0xC673,0x723F,0xC646,0x7228,0xC619,0x7211,0xC5ED,
+0x71FA,0xC5C0,0x71E3,0xC593,0x71CC,0xC566,0x71B5,0xC53A,0x719E,0xC50D,0x7187,
+0xC4E0,0x7170,0xC4B4,0x7158,0xC487,0x7141,0xC45B,0x712A,0xC42E,0x7112,0xC402,
+0x70FA,0xC3D6,0x70E3,0xC3A9,0x70CB,0xC37D,0x70B3,0xC351,0x709B,0xC324,0x7083,
+0xC2F8,0x706B,0xC2CC,0x7053,0xC2A0,0x703B,0xC274,0x7023,0xC248,0x700B,0xC21C,
+0x6FF2,0xC1F0,0x6FDA,0xC1C4,0x6FC2,0xC198,0x6FA9,0xC16C,0x6F90,0xC140,0x6F78,
+0xC114,0x6F5F,0xC0E9,0x6F46,0xC0BD,0x6F2D,0xC091,0x6F14,0xC066,0x6EFB,0xC03A,
+0x6EE2,0xC00F,0x6EC9,0xBFE3,0x6EB0,0xBFB8,0x6E97,0xBF8C,0x6E7D,0xBF61,0x6E64,
+0xBF35,0x6E4A,0xBF0A,0x6E31,0xBEDF,0x6E17,0xBEB3,0x6DFE,0xBE88,0x6DE4,0xBE5D,
+0x6DCA,0xBE32,0x6DB0,0xBE07,0x6D96,0xBDDC,0x6D7C,0xBDB1,0x6D62,0xBD86,0x6D48,
+0xBD5B,0x6D2E,0xBD30,0x6D14,0xBD05,0x6CF9,0xBCDA,0x6CDF,0xBCAF,0x6CC4,0xBC85,
+0x6CAA,0xBC5A,0x6C8F,0xBC2F,0x6C75,0xBC05,0x6C5A,0xBBDA,0x6C3F,0xBBB0,0x6C24,
+0xBB85,0x6C09,0xBB5B,0x6BEE,0xBB30,0x6BD3,0xBB06,0x6BB8,0xBADC,0x6B9D,0xBAB1,
+0x6B82,0xBA87,0x6B66,0xBA5D,0x6B4B,0xBA33,0x6B30,0xBA09,0x6B14,0xB9DF,0x6AF8,
+0xB9B5,0x6ADD,0xB98B,0x6AC1,0xB961,0x6AA5,0xB937,0x6A89,0xB90D,0x6A6E,0xB8E3,
+0x6A52,0xB8B9,0x6A36,0xB890,0x6A1A,0xB866,0x69FD,0xB83C,0x69E1,0xB813,0x69C5,
+0xB7E9,0x69A9,0xB7C0,0x698C,0xB796,0x6970,0xB76D,0x6953,0xB743,0x6937,0xB71A,
+0x691A,0xB6F1,0x68FD,0xB6C7,0x68E0,0xB69E,0x68C4,0xB675,0x68A7,0xB64C,0x688A,
+0xB623,0x686D,0xB5FA,0x6850,0xB5D1,0x6832,0xB5A8,0x6815,0xB57F,0x67F8,0xB556,
+0x67DA,0xB52D,0x67BD,0xB505,0x67A0,0xB4DC,0x6782,0xB4B3,0x6764,0xB48B,0x6747,
+0xB462,0x6729,0xB439,0x670B,0xB411,0x66ED,0xB3E9,0x66D0,0xB3C0,0x66B2,0xB398,
+0x6693,0xB36F,0x6675,0xB347,0x6657,0xB31F,0x6639,0xB2F7,0x661B,0xB2CF,0x65FC,
+0xB2A7,0x65DE,0xB27F,0x65C0,0xB257,0x65A1,0xB22F,0x6582,0xB207,0x6564,0xB1DF,
+0x6545,0xB1B7,0x6526,0xB18F,0x6507,0xB168,0x64E9,0xB140,0x64CA,0xB118,0x64AB,
+0xB0F1,0x648B,0xB0C9,0x646C,0xB0A2,0x644D,0xB07B,0x642E,0xB053,0x640F,0xB02C,
+0x63EF,0xB005,0x63D0,0xAFDD,0x63B0,0xAFB6,0x6391,0xAF8F,0x6371,0xAF68,0x6351,
+0xAF41,0x6332,0xAF1A,0x6312,0xAEF3,0x62F2,0xAECC,0x62D2,0xAEA5,0x62B2,0xAE7F,
+0x6292,0xAE58,0x6272,0xAE31,0x6252,0xAE0B,0x6232,0xADE4,0x6211,0xADBD,0x61F1,
+0xAD97,0x61D1,0xAD70,0x61B0,0xAD4A,0x6190,0xAD24,0x616F,0xACFD,0x614E,0xACD7,
+0x612E,0xACB1,0x610D,0xAC8B,0x60EC,0xAC65,0x60CB,0xAC3F,0x60AA,0xAC19,0x6089,
+0xABF3,0x6068,0xABCD,0x6047,0xABA7,0x6026,0xAB81,0x6005,0xAB5C,0x5FE4,0xAB36,
+0x5FC2,0xAB10,0x5FA1,0xAAEB,0x5F80,0xAAC5,0x5F5E,0xAAA0,0x5F3C,0xAA7A,0x5F1B,
+0xAA55,0x5EF9,0xAA30,0x5ED7,0xAA0A,0x5EB6,0xA9E5,0x5E94,0xA9C0,0x5E72,0xA99B,
+0x5E50,0xA976,0x5E2E,0xA951,0x5E0C,0xA92C,0x5DEA,0xA907,0x5DC8,0xA8E2,0x5DA5,
+0xA8BD,0x5D83,0xA899,0x5D61,0xA874,0x5D3E,0xA84F,0x5D1C,0xA82B,0x5CF9,0xA806,
+0x5CD7,0xA7E2,0x5CB4,0xA7BD,0x5C91,0xA799,0x5C6F,0xA774,0x5C4C,0xA750,0x5C29,
+0xA72C,0x5C06,0xA708,0x5BE3,0xA6E4,0x5BC0,0xA6C0,0x5B9D,0xA69C,0x5B7A,0xA678,
+0x5B57,0xA654,0x5B34,0xA630,0x5B10,0xA60C,0x5AED,0xA5E8,0x5AC9,0xA5C5,0x5AA6,
+0xA5A1,0x5A82,0xA57E,0x5A5F,0xA55A,0x5A3B,0xA537,0x5A18,0xA513,0x59F4,0xA4F0,
+0x59D0,0xA4CC,0x59AC,0xA4A9,0x5988,0xA486,0x5964,0xA463,0x5940,0xA440,0x591C,
+0xA41D,0x58F8,0xA3FA,0x58D4,0xA3D7,0x58B0,0xA3B4,0x588C,0xA391,0x5867,0xA36F,
+0x5843,0xA34C,0x581E,0xA329,0x57FA,0xA307,0x57D5,0xA2E4,0x57B1,0xA2C2,0x578C,
+0xA29F,0x5767,0xA27D,0x5743,0xA25B,0x571E,0xA238,0x56F9,0xA216,0x56D4,0xA1F4,
+0x56AF,0xA1D2,0x568A,0xA1B0,0x5665,0xA18E,0x5640,0xA16C,0x561B,0xA14A,0x55F6,
+0xA129,0x55D0,0xA107,0x55AB,0xA0E5,0x5586,0xA0C4,0x5560,0xA0A2,0x553B,0xA080,
+0x5515,0xA05F,0x54F0,0xA03E,0x54CA,0xA01C,0x54A4,0x9FFB,0x547F,0x9FDA,0x5459,
+0x9FB9,0x5433,0x9F98,0x540D,0x9F77,0x53E7,0x9F56,0x53C1,0x9F35,0x539B,0x9F14,
+0x5375,0x9EF3,0x534F,0x9ED2,0x5329,0x9EB2,0x5303,0x9E91,0x52DC,0x9E70,0x52B6,
+0x9E50,0x5290,0x9E2F,0x5269,0x9E0F,0x5243,0x9DEF,0x521C,0x9DCE,0x51F5,0x9DAE,
+0x51CF,0x9D8E,0x51A8,0x9D6E,0x5181,0x9D4E,0x515B,0x9D2E,0x5134,0x9D0E,0x510D,
+0x9CEE,0x50E6,0x9CCE,0x50BF,0x9CAF,0x5098,0x9C8F,0x5071,0x9C6F,0x504A,0x9C50,
+0x5023,0x9C30,0x4FFB,0x9C11,0x4FD4,0x9BF1,0x4FAD,0x9BD2,0x4F85,0x9BB3,0x4F5E,
+0x9B94,0x4F37,0x9B75,0x4F0F,0x9B55,0x4EE8,0x9B36,0x4EC0,0x9B17,0x4E98,0x9AF9,
+0x4E71,0x9ADA,0x4E49,0x9ABB,0x4E21,0x9A9C,0x4DF9,0x9A7E,0x4DD1,0x9A5F,0x4DA9,
+0x9A40,0x4D81,0x9A22,0x4D59,0x9A04,0x4D31,0x99E5,0x4D09,0x99C7,0x4CE1,0x99A9,
+0x4CB9,0x998B,0x4C91,0x996D,0x4C68,0x994E,0x4C40,0x9930,0x4C17,0x9913,0x4BEF,
+0x98F5,0x4BC7,0x98D7,0x4B9E,0x98B9,0x4B75,0x989C,0x4B4D,0x987E,0x4B24,0x9860,
+0x4AFB,0x9843,0x4AD3,0x9826,0x4AAA,0x9808,0x4A81,0x97EB,0x4A58,0x97CE,0x4A2F,
+0x97B0,0x4A06,0x9793,0x49DD,0x9776,0x49B4,0x9759,0x498B,0x973C,0x4962,0x9720,
+0x4939,0x9703,0x490F,0x96E6,0x48E6,0x96C9,0x48BD,0x96AD,0x4893,0x9690,0x486A,
+0x9674,0x4840,0x9657,0x4817,0x963B,0x47ED,0x961F,0x47C4,0x9603,0x479A,0x95E6,
+0x4770,0x95CA,0x4747,0x95AE,0x471D,0x9592,0x46F3,0x9577,0x46C9,0x955B,0x469F,
+0x953F,0x4675,0x9523,0x464B,0x9508,0x4621,0x94EC,0x45F7,0x94D0,0x45CD,0x94B5,
+0x45A3,0x949A,0x4579,0x947E,0x454F,0x9463,0x4524,0x9448,0x44FA,0x942D,0x44D0,
+0x9412,0x44A5,0x93F7,0x447B,0x93DC,0x4450,0x93C1,0x4426,0x93A6,0x43FB,0x938B,
+0x43D1,0x9371,0x43A6,0x9356,0x437B,0x933C,0x4351,0x9321,0x4326,0x9307,0x42FB,
+0x92EC,0x42D0,0x92D2,0x42A5,0x92B8,0x427A,0x929E,0x424F,0x9284,0x4224,0x926A,
+0x41F9,0x9250,0x41CE,0x9236,0x41A3,0x921C,0x4178,0x9202,0x414D,0x91E9,0x4121,
+0x91CF,0x40F6,0x91B6,0x40CB,0x919C,0x409F,0x9183,0x4074,0x9169,0x4048,0x9150,
+0x401D,0x9137,0x3FF1,0x911E,0x3FC6,0x9105,0x3F9A,0x90EC,0x3F6F,0x90D3,0x3F43,
+0x90BA,0x3F17,0x90A1,0x3EEC,0x9088,0x3EC0,0x9070,0x3E94,0x9057,0x3E68,0x903E,
+0x3E3C,0x9026,0x3E10,0x900E,0x3DE4,0x8FF5,0x3DB8,0x8FDD,0x3D8C,0x8FC5,0x3D60,
+0x8FAD,0x3D34,0x8F95,0x3D08,0x8F7D,0x3CDC,0x8F65,0x3CAF,0x8F4D,0x3C83,0x8F35,
+0x3C57,0x8F1D,0x3C2A,0x8F06,0x3BFE,0x8EEE,0x3BD2,0x8ED6,0x3BA5,0x8EBF,0x3B79,
+0x8EA8,0x3B4C,0x8E90,0x3B20,0x8E79,0x3AF3,0x8E62,0x3AC6,0x8E4B,0x3A9A,0x8E34,
+0x3A6D,0x8E1D,0x3A40,0x8E06,0x3A13,0x8DEF,0x39E7,0x8DD8,0x39BA,0x8DC1,0x398D,
+0x8DAB,0x3960,0x8D94,0x3933,0x8D7E,0x3906,0x8D67,0x38D9,0x8D51,0x38AC,0x8D3B,
+0x387F,0x8D24,0x3852,0x8D0E,0x3825,0x8CF8,0x37F7,0x8CE2,0x37CA,0x8CCC,0x379D,
+0x8CB6,0x3770,0x8CA1,0x3742,0x8C8B,0x3715,0x8C75,0x36E8,0x8C60,0x36BA,0x8C4A,
+0x368D,0x8C35,0x365F,0x8C1F,0x3632,0x8C0A,0x3604,0x8BF5,0x35D7,0x8BDF,0x35A9,
+0x8BCA,0x357B,0x8BB5,0x354E,0x8BA0,0x3520,0x8B8B,0x34F2,0x8B77,0x34C4,0x8B62,
+0x3497,0x8B4D,0x3469,0x8B39,0x343B,0x8B24,0x340D,0x8B10,0x33DF,0x8AFB,0x33B1,
+0x8AE7,0x3383,0x8AD3,0x3355,0x8ABE,0x3327,0x8AAA,0x32F9,0x8A96,0x32CB,0x8A82,
+0x329D,0x8A6E,0x326E,0x8A5A,0x3240,0x8A47,0x3212,0x8A33,0x31E4,0x8A1F,0x31B5,
+0x8A0C,0x3187,0x89F8,0x3159,0x89E5,0x312A,0x89D2,0x30FC,0x89BE,0x30CD,0x89AB,
+0x309F,0x8998,0x3070,0x8985,0x3042,0x8972,0x3013,0x895F,0x2FE5,0x894C,0x2FB6,
+0x8939,0x2F87,0x8927,0x2F59,0x8914,0x2F2A,0x8902,0x2EFB,0x88EF,0x2ECC,0x88DD,
+0x2E9E,0x88CA,0x2E6F,0x88B8,0x2E40,0x88A6,0x2E11,0x8894,0x2DE2,0x8882,0x2DB3,
+0x8870,0x2D84,0x885E,0x2D55,0x884C,0x2D26,0x883A,0x2CF7,0x8828,0x2CC8,0x8817,
+0x2C99,0x8805,0x2C6A,0x87F4,0x2C3B,0x87E2,0x2C0C,0x87D1,0x2BDC,0x87C0,0x2BAD,
+0x87AF,0x2B7E,0x879D,0x2B4F,0x878C,0x2B1F,0x877B,0x2AF0,0x876B,0x2AC1,0x875A,
+0x2A91,0x8749,0x2A62,0x8738,0x2A32,0x8728,0x2A03,0x8717,0x29D3,0x8707,0x29A4,
+0x86F6,0x2974,0x86E6,0x2945,0x86D6,0x2915,0x86C6,0x28E5,0x86B6,0x28B6,0x86A5,
+0x2886,0x8696,0x2856,0x8686,0x2827,0x8676,0x27F7,0x8666,0x27C7,0x8656,0x2797,
+0x8647,0x2768,0x8637,0x2738,0x8628,0x2708,0x8619,0x26D8,0x8609,0x26A8,0x85FA,
+0x2678,0x85EB,0x2648,0x85DC,0x2618,0x85CD,0x25E8,0x85BE,0x25B8,0x85AF,0x2588,
+0x85A0,0x2558,0x8592,0x2528,0x8583,0x24F8,0x8574,0x24C8,0x8566,0x2498,0x8558,
+0x2467,0x8549,0x2437,0x853B,0x2407,0x852D,0x23D7,0x851F,0x23A7,0x8511,0x2376,
+0x8503,0x2346,0x84F5,0x2316,0x84E7,0x22E5,0x84D9,0x22B5,0x84CC,0x2284,0x84BE,
+0x2254,0x84B0,0x2224,0x84A3,0x21F3,0x8496,0x21C3,0x8488,0x2192,0x847B,0x2162,
+0x846E,0x2131,0x8461,0x2101,0x8454,0x20D0,0x8447,0x209F,0x843A,0x206F,0x842D,
+0x203E,0x8421,0x200E,0x8414,0x1FDD,0x8407,0x1FAC,0x83FB,0x1F7B,0x83EF,0x1F4B,
+0x83E2,0x1F1A,0x83D6,0x1EE9,0x83CA,0x1EB8,0x83BE,0x1E88,0x83B2,0x1E57,0x83A6,
+0x1E26,0x839A,0x1DF5,0x838E,0x1DC4,0x8382,0x1D93,0x8377,0x1D62,0x836B,0x1D31,
+0x8360,0x1D01,0x8354,0x1CD0,0x8349,0x1C9F,0x833E,0x1C6E,0x8332,0x1C3D,0x8327,
+0x1C0C,0x831C,0x1BDA,0x8311,0x1BA9,0x8306,0x1B78,0x82FB,0x1B47,0x82F1,0x1B16,
+0x82E6,0x1AE5,0x82DB,0x1AB4,0x82D1,0x1A83,0x82C6,0x1A51,0x82BC,0x1A20,0x82B2,
+0x19EF,0x82A8,0x19BE,0x829D,0x198D,0x8293,0x195B,0x8289,0x192A,0x827F,0x18F9,
+0x8276,0x18C7,0x826C,0x1896,0x8262,0x1865,0x8259,0x1833,0x824F,0x1802,0x8246,
+0x17D1,0x823C,0x179F,0x8233,0x176E,0x822A,0x173C,0x8220,0x170B,0x8217,0x16DA,
+0x820E,0x16A8,0x8205,0x1677,0x81FD,0x1645,0x81F4,0x1614,0x81EB,0x15E2,0x81E2,
+0x15B1,0x81DA,0x157F,0x81D1,0x154D,0x81C9,0x151C,0x81C1,0x14EA,0x81B8,0x14B9,
+0x81B0,0x1487,0x81A8,0x1455,0x81A0,0x1424,0x8198,0x13F2,0x8190,0x13C1,0x8188,
+0x138F,0x8181,0x135D,0x8179,0x132B,0x8172,0x12FA,0x816A,0x12C8,0x8163,0x1296,
+0x815B,0x1265,0x8154,0x1233,0x814D,0x1201,0x8146,0x11CF,0x813F,0x119E,0x8138,
+0x116C,0x8131,0x113A,0x812A,0x1108,0x8123,0x10D6,0x811D,0x10A4,0x8116,0x1073,
+0x8110,0x1041,0x8109,0x100F,0x8103,0x0FDD,0x80FD,0x0FAB,0x80F6,0x0F79,0x80F0,
+0x0F47,0x80EA,0x0F15,0x80E4,0x0EE4,0x80DE,0x0EB2,0x80D9,0x0E80,0x80D3,0x0E4E,
+0x80CD,0x0E1C,0x80C8,0x0DEA,0x80C2,0x0DB8,0x80BD,0x0D86,0x80B7,0x0D54,0x80B2,
+0x0D22,0x80AD,0x0CF0,0x80A8,0x0CBE,0x80A3,0x0C8C,0x809E,0x0C5A,0x8099,0x0C28,
+0x8094,0x0BF6,0x808F,0x0BC4,0x808B,0x0B92,0x8086,0x0B60,0x8082,0x0B2D,0x807D,
+0x0AFB,0x8079,0x0AC9,0x8075,0x0A97,0x8070,0x0A65,0x806C,0x0A33,0x8068,0x0A01,
+0x8064,0x09CF,0x8060,0x099D,0x805D,0x096B,0x8059,0x0938,0x8055,0x0906,0x8052,
+0x08D4,0x804E,0x08A2,0x804B,0x0870,0x8047,0x083E,0x8044,0x080C,0x8041,0x07D9,
+0x803E,0x07A7,0x803B,0x0775,0x8038,0x0743,0x8035,0x0711,0x8032,0x06DE,0x802F,
+0x06AC,0x802D,0x067A,0x802A,0x0648,0x8027,0x0616,0x8025,0x05E3,0x8023,0x05B1,
+0x8020,0x057F,0x801E,0x054D,0x801C,0x051B,0x801A,0x04E8,0x8018,0x04B6,0x8016,
+0x0484,0x8014,0x0452,0x8013,0x041F,0x8011,0x03ED,0x800F,0x03BB,0x800E,0x0389,
+0x800C,0x0356,0x800B,0x0324,0x800A,0x02F2,0x8009,0x02C0,0x8008,0x028D,0x8007,
+0x025B,0x8006,0x0229,0x8005,0x01F7,0x8004,0x01C4,0x8003,0x0192,0x8002,0x0160,
+0x8002,0x012E,0x8001,0x00FB,0x8001,0x00C9,0x8001,0x0097,0x8000,0x0065,0x8000,
+0x0032,0x8000,0x7FFF,0x0000,0x7FFF,0xFF37,0x7FFE,0xFE6E,0x7FFA,0xFDA5,0x7FF6,
+0xFCDC,0x7FF1,0xFC13,0x7FEA,0xFB4A,0x7FE2,0xFA81,0x7FD9,0xF9B8,0x7FCE,0xF8EF,
+0x7FC2,0xF827,0x7FB5,0xF75E,0x7FA7,0xF695,0x7F98,0xF5CD,0x7F87,0xF505,0x7F75,
+0xF43C,0x7F62,0xF374,0x7F4E,0xF2AC,0x7F38,0xF1E4,0x7F22,0xF11C,0x7F0A,0xF055,
+0x7EF0,0xEF8D,0x7ED6,0xEEC6,0x7EBA,0xEDFF,0x7E9D,0xED38,0x7E7F,0xEC71,0x7E60,
+0xEBAB,0x7E3F,0xEAE4,0x7E1E,0xEA1E,0x7DFB,0xE958,0x7DD6,0xE892,0x7DB1,0xE7CD,
+0x7D8A,0xE707,0x7D63,0xE642,0x7D3A,0xE57D,0x7D0F,0xE4B9,0x7CE4,0xE3F4,0x7CB7,
+0xE330,0x7C89,0xE26D,0x7C5A,0xE1A9,0x7C2A,0xE0E6,0x7BF9,0xE023,0x7BC6,0xDF61,
+0x7B92,0xDE9E,0x7B5D,0xDDDC,0x7B27,0xDD1B,0x7AEF,0xDC59,0x7AB7,0xDB99,0x7A7D,
+0xDAD8,0x7A42,0xDA18,0x7A06,0xD958,0x79C9,0xD898,0x798A,0xD7D9,0x794A,0xD71B,
+0x790A,0xD65C,0x78C8,0xD59E,0x7885,0xD4E1,0x7840,0xD424,0x77FB,0xD367,0x77B4,
+0xD2AB,0x776C,0xD1EF,0x7723,0xD134,0x76D9,0xD079,0x768E,0xCFBE,0x7642,0xCF04,
+0x75F4,0xCE4B,0x75A6,0xCD92,0x7556,0xCCD9,0x7505,0xCC21,0x74B3,0xCB69,0x7460,
+0xCAB2,0x740B,0xC9FC,0x73B6,0xC946,0x735F,0xC890,0x7308,0xC7DB,0x72AF,0xC727,
+0x7255,0xC673,0x71FA,0xC5C0,0x719E,0xC50D,0x7141,0xC45B,0x70E3,0xC3A9,0x7083,
+0xC2F8,0x7023,0xC248,0x6FC2,0xC198,0x6F5F,0xC0E9,0x6EFB,0xC03A,0x6E97,0xBF8C,
+0x6E31,0xBEDF,0x6DCA,0xBE32,0x6D62,0xBD86,0x6CF9,0xBCDA,0x6C8F,0xBC2F,0x6C24,
+0xBB85,0x6BB8,0xBADC,0x6B4B,0xBA33,0x6ADD,0xB98B,0x6A6E,0xB8E3,0x69FD,0xB83C,
+0x698C,0xB796,0x691A,0xB6F1,0x68A7,0xB64C,0x6832,0xB5A8,0x67BD,0xB505,0x6747,
+0xB462,0x66D0,0xB3C0,0x6657,0xB31F,0x65DE,0xB27F,0x6564,0xB1DF,0x64E9,0xB140,
+0x646C,0xB0A2,0x63EF,0xB005,0x6371,0xAF68,0x62F2,0xAECC,0x6272,0xAE31,0x61F1,
+0xAD97,0x616F,0xACFD,0x60EC,0xAC65,0x6068,0xABCD,0x5FE4,0xAB36,0x5F5E,0xAAA0,
+0x5ED7,0xAA0A,0x5E50,0xA976,0x5DC8,0xA8E2,0x5D3E,0xA84F,0x5CB4,0xA7BD,0x5C29,
+0xA72C,0x5B9D,0xA69C,0x5B10,0xA60C,0x5A82,0xA57E,0x59F4,0xA4F0,0x5964,0xA463,
+0x58D4,0xA3D7,0x5843,0xA34C,0x57B1,0xA2C2,0x571E,0xA238,0x568A,0xA1B0,0x55F6,
+0xA129,0x5560,0xA0A2,0x54CA,0xA01C,0x5433,0x9F98,0x539B,0x9F14,0x5303,0x9E91,
+0x5269,0x9E0F,0x51CF,0x9D8E,0x5134,0x9D0E,0x5098,0x9C8F,0x4FFB,0x9C11,0x4F5E,
+0x9B94,0x4EC0,0x9B17,0x4E21,0x9A9C,0x4D81,0x9A22,0x4CE1,0x99A9,0x4C40,0x9930,
+0x4B9E,0x98B9,0x4AFB,0x9843,0x4A58,0x97CE,0x49B4,0x9759,0x490F,0x96E6,0x486A,
+0x9674,0x47C4,0x9603,0x471D,0x9592,0x4675,0x9523,0x45CD,0x94B5,0x4524,0x9448,
+0x447B,0x93DC,0x43D1,0x9371,0x4326,0x9307,0x427A,0x929E,0x41CE,0x9236,0x4121,
+0x91CF,0x4074,0x9169,0x3FC6,0x9105,0x3F17,0x90A1,0x3E68,0x903E,0x3DB8,0x8FDD,
+0x3D08,0x8F7D,0x3C57,0x8F1D,0x3BA5,0x8EBF,0x3AF3,0x8E62,0x3A40,0x8E06,0x398D,
+0x8DAB,0x38D9,0x8D51,0x3825,0x8CF8,0x3770,0x8CA1,0x36BA,0x8C4A,0x3604,0x8BF5,
+0x354E,0x8BA0,0x3497,0x8B4D,0x33DF,0x8AFB,0x3327,0x8AAA,0x326E,0x8A5A,0x31B5,
+0x8A0C,0x30FC,0x89BE,0x3042,0x8972,0x2F87,0x8927,0x2ECC,0x88DD,0x2E11,0x8894,
+0x2D55,0x884C,0x2C99,0x8805,0x2BDC,0x87C0,0x2B1F,0x877B,0x2A62,0x8738,0x29A4,
+0x86F6,0x28E5,0x86B6,0x2827,0x8676,0x2768,0x8637,0x26A8,0x85FA,0x25E8,0x85BE,
+0x2528,0x8583,0x2467,0x8549,0x23A7,0x8511,0x22E5,0x84D9,0x2224,0x84A3,0x2162,
+0x846E,0x209F,0x843A,0x1FDD,0x8407,0x1F1A,0x83D6,0x1E57,0x83A6,0x1D93,0x8377,
+0x1CD0,0x8349,0x1C0C,0x831C,0x1B47,0x82F1,0x1A83,0x82C6,0x19BE,0x829D,0x18F9,
+0x8276,0x1833,0x824F,0x176E,0x822A,0x16A8,0x8205,0x15E2,0x81E2,0x151C,0x81C1,
+0x1455,0x81A0,0x138F,0x8181,0x12C8,0x8163,0x1201,0x8146,0x113A,0x812A,0x1073,
+0x8110,0x0FAB,0x80F6,0x0EE4,0x80DE,0x0E1C,0x80C8,0x0D54,0x80B2,0x0C8C,0x809E,
+0x0BC4,0x808B,0x0AFB,0x8079,0x0A33,0x8068,0x096B,0x8059,0x08A2,0x804B,0x07D9,
+0x803E,0x0711,0x8032,0x0648,0x8027,0x057F,0x801E,0x04B6,0x8016,0x03ED,0x800F,
+0x0324,0x800A,0x025B,0x8006,0x0192,0x8002,0x00C9,0x8001,0x7FFF,0x0000,0x7FF6,
+0xFCDC,0x7FD9,0xF9B8,0x7FA7,0xF695,0x7F62,0xF374,0x7F0A,0xF055,0x7E9D,0xED38,
+0x7E1E,0xEA1E,0x7D8A,0xE707,0x7CE4,0xE3F4,0x7C2A,0xE0E6,0x7B5D,0xDDDC,0x7A7D,
+0xDAD8,0x798A,0xD7D9,0x7885,0xD4E1,0x776C,0xD1EF,0x7642,0xCF04,0x7505,0xCC21,
+0x73B6,0xC946,0x7255,0xC673,0x70E3,0xC3A9,0x6F5F,0xC0E9,0x6DCA,0xBE32,0x6C24,
+0xBB85,0x6A6E,0xB8E3,0x68A7,0xB64C,0x66D0,0xB3C0,0x64E9,0xB140,0x62F2,0xAECC,
+0x60EC,0xAC65,0x5ED7,0xAA0A,0x5CB4,0xA7BD,0x5A82,0xA57E,0x5843,0xA34C,0x55F6,
+0xA129,0x539B,0x9F14,0x5134,0x9D0E,0x4EC0,0x9B17,0x4C40,0x9930,0x49B4,0x9759,
+0x471D,0x9592,0x447B,0x93DC,0x41CE,0x9236,0x3F17,0x90A1,0x3C57,0x8F1D,0x398D,
+0x8DAB,0x36BA,0x8C4A,0x33DF,0x8AFB,0x30FC,0x89BE,0x2E11,0x8894,0x2B1F,0x877B,
+0x2827,0x8676,0x2528,0x8583,0x2224,0x84A3,0x1F1A,0x83D6,0x1C0C,0x831C,0x18F9,
+0x8276,0x15E2,0x81E2,0x12C8,0x8163,0x0FAB,0x80F6,0x0C8C,0x809E,0x096B,0x8059,
+0x0648,0x8027,0x0324,0x800A,0x7FFF,0x0000,0x7F62,0xF374,0x7D8A,0xE707,0x7A7D,
+0xDAD8,0x7642,0xCF04,0x70E3,0xC3A9,0x6A6E,0xB8E3,0x62F2,0xAECC,0x5A82,0xA57E,
+0x5134,0x9D0E,0x471D,0x9592,0x3C57,0x8F1D,0x30FC,0x89BE,0x2528,0x8583,0x18F9,
+0x8276,0x0C8C,0x809E,0x7FFF,0x0000,0x7642,0xCF04,0x5A82,0xA57E,0x30FC,0x89BE,};
+
+q15_t rearranged_twiddle_stride2_4096_q15[2728]={
+0x7FFF,0x0000,0x7FFF,0xFF9B,0x7FFF,0xFF37,0x7FFF,0xFED2,0x7FFE,0xFE6E,0x7FFC,
+0xFE09,0x7FFA,0xFDA5,0x7FF8,0xFD40,0x7FF6,0xFCDC,0x7FF4,0xFC77,0x7FF1,0xFC13,
+0x7FED,0xFBAE,0x7FEA,0xFB4A,0x7FE6,0xFAE5,0x7FE2,0xFA81,0x7FDD,0xFA1D,0x7FD9,
+0xF9B8,0x7FD3,0xF954,0x7FCE,0xF8EF,0x7FC8,0xF88B,0x7FC2,0xF827,0x7FBC,0xF7C2,
+0x7FB5,0xF75E,0x7FAE,0xF6FA,0x7FA7,0xF695,0x7FA0,0xF631,0x7F98,0xF5CD,0x7F90,
+0xF569,0x7F87,0xF505,0x7F7E,0xF4A0,0x7F75,0xF43C,0x7F6C,0xF3D8,0x7F62,0xF374,
+0x7F58,0xF310,0x7F4E,0xF2AC,0x7F43,0xF248,0x7F38,0xF1E4,0x7F2D,0xF180,0x7F22,
+0xF11C,0x7F16,0xF0B9,0x7F0A,0xF055,0x7EFD,0xEFF1,0x7EF0,0xEF8D,0x7EE3,0xEF2A,
+0x7ED6,0xEEC6,0x7EC8,0xEE62,0x7EBA,0xEDFF,0x7EAC,0xED9B,0x7E9D,0xED38,0x7E8E,
+0xECD5,0x7E7F,0xEC71,0x7E70,0xEC0E,0x7E60,0xEBAB,0x7E50,0xEB47,0x7E3F,0xEAE4,
+0x7E2F,0xEA81,0x7E1E,0xEA1E,0x7E0C,0xE9BB,0x7DFB,0xE958,0x7DE9,0xE8F5,0x7DD6,
+0xE892,0x7DC4,0xE82F,0x7DB1,0xE7CD,0x7D9E,0xE76A,0x7D8A,0xE707,0x7D77,0xE6A5,
+0x7D63,0xE642,0x7D4E,0xE5E0,0x7D3A,0xE57D,0x7D25,0xE51B,0x7D0F,0xE4B9,0x7CFA,
+0xE457,0x7CE4,0xE3F4,0x7CCE,0xE392,0x7CB7,0xE330,0x7CA0,0xE2CF,0x7C89,0xE26D,
+0x7C72,0xE20B,0x7C5A,0xE1A9,0x7C42,0xE148,0x7C2A,0xE0E6,0x7C11,0xE085,0x7BF9,
+0xE023,0x7BDF,0xDFC2,0x7BC6,0xDF61,0x7BAC,0xDEFF,0x7B92,0xDE9E,0x7B78,0xDE3D,
+0x7B5D,0xDDDC,0x7B42,0xDD7C,0x7B27,0xDD1B,0x7B0B,0xDCBA,0x7AEF,0xDC59,0x7AD3,
+0xDBF9,0x7AB7,0xDB99,0x7A9A,0xDB38,0x7A7D,0xDAD8,0x7A60,0xDA78,0x7A42,0xDA18,
+0x7A24,0xD9B8,0x7A06,0xD958,0x79E7,0xD8F8,0x79C9,0xD898,0x79AA,0xD839,0x798A,
+0xD7D9,0x796A,0xD77A,0x794A,0xD71B,0x792A,0xD6BB,0x790A,0xD65C,0x78E9,0xD5FD,
+0x78C8,0xD59E,0x78A6,0xD53F,0x7885,0xD4E1,0x7863,0xD482,0x7840,0xD424,0x781E,
+0xD3C5,0x77FB,0xD367,0x77D8,0xD309,0x77B4,0xD2AB,0x7790,0xD24D,0x776C,0xD1EF,
+0x7748,0xD191,0x7723,0xD134,0x76FE,0xD0D6,0x76D9,0xD079,0x76B4,0xD01B,0x768E,
+0xCFBE,0x7668,0xCF61,0x7642,0xCF04,0x761B,0xCEA7,0x75F4,0xCE4B,0x75CD,0xCDEE,
+0x75A6,0xCD92,0x757E,0xCD35,0x7556,0xCCD9,0x752D,0xCC7D,0x7505,0xCC21,0x74DC,
+0xCBC5,0x74B3,0xCB69,0x7489,0xCB0E,0x7460,0xCAB2,0x7436,0xCA57,0x740B,0xC9FC,
+0x73E1,0xC9A1,0x73B6,0xC946,0x738B,0xC8EB,0x735F,0xC890,0x7334,0xC836,0x7308,
+0xC7DB,0x72DC,0xC781,0x72AF,0xC727,0x7282,0xC6CD,0x7255,0xC673,0x7228,0xC619,
+0x71FA,0xC5C0,0x71CC,0xC566,0x719E,0xC50D,0x7170,0xC4B4,0x7141,0xC45B,0x7112,
+0xC402,0x70E3,0xC3A9,0x70B3,0xC351,0x7083,0xC2F8,0x7053,0xC2A0,0x7023,0xC248,
+0x6FF2,0xC1F0,0x6FC2,0xC198,0x6F90,0xC140,0x6F5F,0xC0E9,0x6F2D,0xC091,0x6EFB,
+0xC03A,0x6EC9,0xBFE3,0x6E97,0xBF8C,0x6E64,0xBF35,0x6E31,0xBEDF,0x6DFE,0xBE88,
+0x6DCA,0xBE32,0x6D96,0xBDDC,0x6D62,0xBD86,0x6D2E,0xBD30,0x6CF9,0xBCDA,0x6CC4,
+0xBC85,0x6C8F,0xBC2F,0x6C5A,0xBBDA,0x6C24,0xBB85,0x6BEE,0xBB30,0x6BB8,0xBADC,
+0x6B82,0xBA87,0x6B4B,0xBA33,0x6B14,0xB9DF,0x6ADD,0xB98B,0x6AA5,0xB937,0x6A6E,
+0xB8E3,0x6A36,0xB890,0x69FD,0xB83C,0x69C5,0xB7E9,0x698C,0xB796,0x6953,0xB743,
+0x691A,0xB6F1,0x68E0,0xB69E,0x68A7,0xB64C,0x686D,0xB5FA,0x6832,0xB5A8,0x67F8,
+0xB556,0x67BD,0xB505,0x6782,0xB4B3,0x6747,0xB462,0x670B,0xB411,0x66D0,0xB3C0,
+0x6693,0xB36F,0x6657,0xB31F,0x661B,0xB2CF,0x65DE,0xB27F,0x65A1,0xB22F,0x6564,
+0xB1DF,0x6526,0xB18F,0x64E9,0xB140,0x64AB,0xB0F1,0x646C,0xB0A2,0x642E,0xB053,
+0x63EF,0xB005,0x63B0,0xAFB6,0x6371,0xAF68,0x6332,0xAF1A,0x62F2,0xAECC,0x62B2,
+0xAE7F,0x6272,0xAE31,0x6232,0xADE4,0x61F1,0xAD97,0x61B0,0xAD4A,0x616F,0xACFD,
+0x612E,0xACB1,0x60EC,0xAC65,0x60AA,0xAC19,0x6068,0xABCD,0x6026,0xAB81,0x5FE4,
+0xAB36,0x5FA1,0xAAEB,0x5F5E,0xAAA0,0x5F1B,0xAA55,0x5ED7,0xAA0A,0x5E94,0xA9C0,
+0x5E50,0xA976,0x5E0C,0xA92C,0x5DC8,0xA8E2,0x5D83,0xA899,0x5D3E,0xA84F,0x5CF9,
+0xA806,0x5CB4,0xA7BD,0x5C6F,0xA774,0x5C29,0xA72C,0x5BE3,0xA6E4,0x5B9D,0xA69C,
+0x5B57,0xA654,0x5B10,0xA60C,0x5AC9,0xA5C5,0x5A82,0xA57E,0x5A3B,0xA537,0x59F4,
+0xA4F0,0x59AC,0xA4A9,0x5964,0xA463,0x591C,0xA41D,0x58D4,0xA3D7,0x588C,0xA391,
+0x5843,0xA34C,0x57FA,0xA307,0x57B1,0xA2C2,0x5767,0xA27D,0x571E,0xA238,0x56D4,
+0xA1F4,0x568A,0xA1B0,0x5640,0xA16C,0x55F6,0xA129,0x55AB,0xA0E5,0x5560,0xA0A2,
+0x5515,0xA05F,0x54CA,0xA01C,0x547F,0x9FDA,0x5433,0x9F98,0x53E7,0x9F56,0x539B,
+0x9F14,0x534F,0x9ED2,0x5303,0x9E91,0x52B6,0x9E50,0x5269,0x9E0F,0x521C,0x9DCE,
+0x51CF,0x9D8E,0x5181,0x9D4E,0x5134,0x9D0E,0x50E6,0x9CCE,0x5098,0x9C8F,0x504A,
+0x9C50,0x4FFB,0x9C11,0x4FAD,0x9BD2,0x4F5E,0x9B94,0x4F0F,0x9B55,0x4EC0,0x9B17,
+0x4E71,0x9ADA,0x4E21,0x9A9C,0x4DD1,0x9A5F,0x4D81,0x9A22,0x4D31,0x99E5,0x4CE1,
+0x99A9,0x4C91,0x996D,0x4C40,0x9930,0x4BEF,0x98F5,0x4B9E,0x98B9,0x4B4D,0x987E,
+0x4AFB,0x9843,0x4AAA,0x9808,0x4A58,0x97CE,0x4A06,0x9793,0x49B4,0x9759,0x4962,
+0x9720,0x490F,0x96E6,0x48BD,0x96AD,0x486A,0x9674,0x4817,0x963B,0x47C4,0x9603,
+0x4770,0x95CA,0x471D,0x9592,0x46C9,0x955B,0x4675,0x9523,0x4621,0x94EC,0x45CD,
+0x94B5,0x4579,0x947E,0x4524,0x9448,0x44D0,0x9412,0x447B,0x93DC,0x4426,0x93A6,
+0x43D1,0x9371,0x437B,0x933C,0x4326,0x9307,0x42D0,0x92D2,0x427A,0x929E,0x4224,
+0x926A,0x41CE,0x9236,0x4178,0x9202,0x4121,0x91CF,0x40CB,0x919C,0x4074,0x9169,
+0x401D,0x9137,0x3FC6,0x9105,0x3F6F,0x90D3,0x3F17,0x90A1,0x3EC0,0x9070,0x3E68,
+0x903E,0x3E10,0x900E,0x3DB8,0x8FDD,0x3D60,0x8FAD,0x3D08,0x8F7D,0x3CAF,0x8F4D,
+0x3C57,0x8F1D,0x3BFE,0x8EEE,0x3BA5,0x8EBF,0x3B4C,0x8E90,0x3AF3,0x8E62,0x3A9A,
+0x8E34,0x3A40,0x8E06,0x39E7,0x8DD8,0x398D,0x8DAB,0x3933,0x8D7E,0x38D9,0x8D51,
+0x387F,0x8D24,0x3825,0x8CF8,0x37CA,0x8CCC,0x3770,0x8CA1,0x3715,0x8C75,0x36BA,
+0x8C4A,0x365F,0x8C1F,0x3604,0x8BF5,0x35A9,0x8BCA,0x354E,0x8BA0,0x34F2,0x8B77,
+0x3497,0x8B4D,0x343B,0x8B24,0x33DF,0x8AFB,0x3383,0x8AD3,0x3327,0x8AAA,0x32CB,
+0x8A82,0x326E,0x8A5A,0x3212,0x8A33,0x31B5,0x8A0C,0x3159,0x89E5,0x30FC,0x89BE,
+0x309F,0x8998,0x3042,0x8972,0x2FE5,0x894C,0x2F87,0x8927,0x2F2A,0x8902,0x2ECC,
+0x88DD,0x2E6F,0x88B8,0x2E11,0x8894,0x2DB3,0x8870,0x2D55,0x884C,0x2CF7,0x8828,
+0x2C99,0x8805,0x2C3B,0x87E2,0x2BDC,0x87C0,0x2B7E,0x879D,0x2B1F,0x877B,0x2AC1,
+0x875A,0x2A62,0x8738,0x2A03,0x8717,0x29A4,0x86F6,0x2945,0x86D6,0x28E5,0x86B6,
+0x2886,0x8696,0x2827,0x8676,0x27C7,0x8656,0x2768,0x8637,0x2708,0x8619,0x26A8,
+0x85FA,0x2648,0x85DC,0x25E8,0x85BE,0x2588,0x85A0,0x2528,0x8583,0x24C8,0x8566,
+0x2467,0x8549,0x2407,0x852D,0x23A7,0x8511,0x2346,0x84F5,0x22E5,0x84D9,0x2284,
+0x84BE,0x2224,0x84A3,0x21C3,0x8488,0x2162,0x846E,0x2101,0x8454,0x209F,0x843A,
+0x203E,0x8421,0x1FDD,0x8407,0x1F7B,0x83EF,0x1F1A,0x83D6,0x1EB8,0x83BE,0x1E57,
+0x83A6,0x1DF5,0x838E,0x1D93,0x8377,0x1D31,0x8360,0x1CD0,0x8349,0x1C6E,0x8332,
+0x1C0C,0x831C,0x1BA9,0x8306,0x1B47,0x82F1,0x1AE5,0x82DB,0x1A83,0x82C6,0x1A20,
+0x82B2,0x19BE,0x829D,0x195B,0x8289,0x18F9,0x8276,0x1896,0x8262,0x1833,0x824F,
+0x17D1,0x823C,0x176E,0x822A,0x170B,0x8217,0x16A8,0x8205,0x1645,0x81F4,0x15E2,
+0x81E2,0x157F,0x81D1,0x151C,0x81C1,0x14B9,0x81B0,0x1455,0x81A0,0x13F2,0x8190,
+0x138F,0x8181,0x132B,0x8172,0x12C8,0x8163,0x1265,0x8154,0x1201,0x8146,0x119E,
+0x8138,0x113A,0x812A,0x10D6,0x811D,0x1073,0x8110,0x100F,0x8103,0x0FAB,0x80F6,
+0x0F47,0x80EA,0x0EE4,0x80DE,0x0E80,0x80D3,0x0E1C,0x80C8,0x0DB8,0x80BD,0x0D54,
+0x80B2,0x0CF0,0x80A8,0x0C8C,0x809E,0x0C28,0x8094,0x0BC4,0x808B,0x0B60,0x8082,
+0x0AFB,0x8079,0x0A97,0x8070,0x0A33,0x8068,0x09CF,0x8060,0x096B,0x8059,0x0906,
+0x8052,0x08A2,0x804B,0x083E,0x8044,0x07D9,0x803E,0x0775,0x8038,0x0711,0x8032,
+0x06AC,0x802D,0x0648,0x8027,0x05E3,0x8023,0x057F,0x801E,0x051B,0x801A,0x04B6,
+0x8016,0x0452,0x8013,0x03ED,0x800F,0x0389,0x800C,0x0324,0x800A,0x02C0,0x8008,
+0x025B,0x8006,0x01F7,0x8004,0x0192,0x8002,0x012E,0x8001,0x00C9,0x8001,0x0065,
+0x8000,0x0000,0x8000,0xFF9B,0x8000,0xFF37,0x8001,0xFED2,0x8001,0xFE6E,0x8002,
+0xFE09,0x8004,0xFDA5,0x8006,0xFD40,0x8008,0xFCDC,0x800A,0xFC77,0x800C,0xFC13,
+0x800F,0xFBAE,0x8013,0xFB4A,0x8016,0xFAE5,0x801A,0xFA81,0x801E,0xFA1D,0x8023,
+0xF9B8,0x8027,0xF954,0x802D,0xF8EF,0x8032,0xF88B,0x8038,0xF827,0x803E,0xF7C2,
+0x8044,0xF75E,0x804B,0xF6FA,0x8052,0xF695,0x8059,0xF631,0x8060,0xF5CD,0x8068,
+0xF569,0x8070,0xF505,0x8079,0xF4A0,0x8082,0xF43C,0x808B,0xF3D8,0x8094,0xF374,
+0x809E,0xF310,0x80A8,0xF2AC,0x80B2,0xF248,0x80BD,0xF1E4,0x80C8,0xF180,0x80D3,
+0xF11C,0x80DE,0xF0B9,0x80EA,0xF055,0x80F6,0xEFF1,0x8103,0xEF8D,0x8110,0xEF2A,
+0x811D,0xEEC6,0x812A,0xEE62,0x8138,0xEDFF,0x8146,0xED9B,0x8154,0xED38,0x8163,
+0xECD5,0x8172,0xEC71,0x8181,0xEC0E,0x8190,0xEBAB,0x81A0,0xEB47,0x81B0,0xEAE4,
+0x81C1,0xEA81,0x81D1,0xEA1E,0x81E2,0xE9BB,0x81F4,0xE958,0x8205,0xE8F5,0x8217,
+0xE892,0x822A,0xE82F,0x823C,0xE7CD,0x824F,0xE76A,0x8262,0xE707,0x8276,0xE6A5,
+0x8289,0xE642,0x829D,0xE5E0,0x82B2,0xE57D,0x82C6,0xE51B,0x82DB,0xE4B9,0x82F1,
+0xE457,0x8306,0xE3F4,0x831C,0xE392,0x8332,0xE330,0x8349,0xE2CF,0x8360,0xE26D,
+0x8377,0xE20B,0x838E,0xE1A9,0x83A6,0xE148,0x83BE,0xE0E6,0x83D6,0xE085,0x83EF,
+0xE023,0x8407,0xDFC2,0x8421,0xDF61,0x843A,0xDEFF,0x8454,0xDE9E,0x846E,0xDE3D,
+0x8488,0xDDDC,0x84A3,0xDD7C,0x84BE,0xDD1B,0x84D9,0xDCBA,0x84F5,0xDC59,0x8511,
+0xDBF9,0x852D,0xDB99,0x8549,0xDB38,0x8566,0xDAD8,0x8583,0xDA78,0x85A0,0xDA18,
+0x85BE,0xD9B8,0x85DC,0xD958,0x85FA,0xD8F8,0x8619,0xD898,0x8637,0xD839,0x8656,
+0xD7D9,0x8676,0xD77A,0x8696,0xD71B,0x86B6,0xD6BB,0x86D6,0xD65C,0x86F6,0xD5FD,
+0x8717,0xD59E,0x8738,0xD53F,0x875A,0xD4E1,0x877B,0xD482,0x879D,0xD424,0x87C0,
+0xD3C5,0x87E2,0xD367,0x8805,0xD309,0x8828,0xD2AB,0x884C,0xD24D,0x8870,0xD1EF,
+0x8894,0xD191,0x88B8,0xD134,0x88DD,0xD0D6,0x8902,0xD079,0x8927,0xD01B,0x894C,
+0xCFBE,0x8972,0xCF61,0x8998,0xCF04,0x89BE,0xCEA7,0x89E5,0xCE4B,0x8A0C,0xCDEE,
+0x8A33,0xCD92,0x8A5A,0xCD35,0x8A82,0xCCD9,0x8AAA,0xCC7D,0x8AD3,0xCC21,0x8AFB,
+0xCBC5,0x8B24,0xCB69,0x8B4D,0xCB0E,0x8B77,0xCAB2,0x8BA0,0xCA57,0x8BCA,0xC9FC,
+0x8BF5,0xC9A1,0x8C1F,0xC946,0x8C4A,0xC8EB,0x8C75,0xC890,0x8CA1,0xC836,0x8CCC,
+0xC7DB,0x8CF8,0xC781,0x8D24,0xC727,0x8D51,0xC6CD,0x8D7E,0xC673,0x8DAB,0xC619,
+0x8DD8,0xC5C0,0x8E06,0xC566,0x8E34,0xC50D,0x8E62,0xC4B4,0x8E90,0xC45B,0x8EBF,
+0xC402,0x8EEE,0xC3A9,0x8F1D,0xC351,0x8F4D,0xC2F8,0x8F7D,0xC2A0,0x8FAD,0xC248,
+0x8FDD,0xC1F0,0x900E,0xC198,0x903E,0xC140,0x9070,0xC0E9,0x90A1,0xC091,0x90D3,
+0xC03A,0x9105,0xBFE3,0x9137,0xBF8C,0x9169,0xBF35,0x919C,0xBEDF,0x91CF,0xBE88,
+0x9202,0xBE32,0x9236,0xBDDC,0x926A,0xBD86,0x929E,0xBD30,0x92D2,0xBCDA,0x9307,
+0xBC85,0x933C,0xBC2F,0x9371,0xBBDA,0x93A6,0xBB85,0x93DC,0xBB30,0x9412,0xBADC,
+0x9448,0xBA87,0x947E,0xBA33,0x94B5,0xB9DF,0x94EC,0xB98B,0x9523,0xB937,0x955B,
+0xB8E3,0x9592,0xB890,0x95CA,0xB83C,0x9603,0xB7E9,0x963B,0xB796,0x9674,0xB743,
+0x96AD,0xB6F1,0x96E6,0xB69E,0x9720,0xB64C,0x9759,0xB5FA,0x9793,0xB5A8,0x97CE,
+0xB556,0x9808,0xB505,0x9843,0xB4B3,0x987E,0xB462,0x98B9,0xB411,0x98F5,0xB3C0,
+0x9930,0xB36F,0x996D,0xB31F,0x99A9,0xB2CF,0x99E5,0xB27F,0x9A22,0xB22F,0x9A5F,
+0xB1DF,0x9A9C,0xB18F,0x9ADA,0xB140,0x9B17,0xB0F1,0x9B55,0xB0A2,0x9B94,0xB053,
+0x9BD2,0xB005,0x9C11,0xAFB6,0x9C50,0xAF68,0x9C8F,0xAF1A,0x9CCE,0xAECC,0x9D0E,
+0xAE7F,0x9D4E,0xAE31,0x9D8E,0xADE4,0x9DCE,0xAD97,0x9E0F,0xAD4A,0x9E50,0xACFD,
+0x9E91,0xACB1,0x9ED2,0xAC65,0x9F14,0xAC19,0x9F56,0xABCD,0x9F98,0xAB81,0x9FDA,
+0xAB36,0xA01C,0xAAEB,0xA05F,0xAAA0,0xA0A2,0xAA55,0xA0E5,0xAA0A,0xA129,0xA9C0,
+0xA16C,0xA976,0xA1B0,0xA92C,0xA1F4,0xA8E2,0xA238,0xA899,0xA27D,0xA84F,0xA2C2,
+0xA806,0xA307,0xA7BD,0xA34C,0xA774,0xA391,0xA72C,0xA3D7,0xA6E4,0xA41D,0xA69C,
+0xA463,0xA654,0xA4A9,0xA60C,0xA4F0,0xA5C5,0xA537,0xA57E,0xA57E,0xA537,0xA5C5,
+0xA4F0,0xA60C,0xA4A9,0xA654,0xA463,0xA69C,0xA41D,0xA6E4,0xA3D7,0xA72C,0xA391,
+0xA774,0xA34C,0xA7BD,0xA307,0xA806,0xA2C2,0xA84F,0xA27D,0xA899,0xA238,0xA8E2,
+0xA1F4,0xA92C,0xA1B0,0xA976,0xA16C,0xA9C0,0xA129,0xAA0A,0xA0E5,0xAA55,0xA0A2,
+0xAAA0,0xA05F,0xAAEB,0xA01C,0xAB36,0x9FDA,0xAB81,0x9F98,0xABCD,0x9F56,0xAC19,
+0x9F14,0xAC65,0x9ED2,0xACB1,0x9E91,0xACFD,0x9E50,0xAD4A,0x9E0F,0xAD97,0x9DCE,
+0xADE4,0x9D8E,0xAE31,0x9D4E,0xAE7F,0x9D0E,0xAECC,0x9CCE,0xAF1A,0x9C8F,0xAF68,
+0x9C50,0xAFB6,0x9C11,0xB005,0x9BD2,0xB053,0x9B94,0xB0A2,0x9B55,0xB0F1,0x9B17,
+0xB140,0x9ADA,0xB18F,0x9A9C,0xB1DF,0x9A5F,0xB22F,0x9A22,0xB27F,0x99E5,0xB2CF,
+0x99A9,0xB31F,0x996D,0xB36F,0x9930,0xB3C0,0x98F5,0xB411,0x98B9,0xB462,0x987E,
+0xB4B3,0x9843,0xB505,0x9808,0xB556,0x97CE,0xB5A8,0x9793,0xB5FA,0x9759,0xB64C,
+0x9720,0xB69E,0x96E6,0xB6F1,0x96AD,0xB743,0x9674,0xB796,0x963B,0xB7E9,0x9603,
+0xB83C,0x95CA,0xB890,0x9592,0xB8E3,0x955B,0xB937,0x9523,0xB98B,0x94EC,0xB9DF,
+0x94B5,0xBA33,0x947E,0xBA87,0x9448,0xBADC,0x9412,0xBB30,0x93DC,0xBB85,0x93A6,
+0xBBDA,0x9371,0xBC2F,0x933C,0xBC85,0x9307,0xBCDA,0x92D2,0xBD30,0x929E,0xBD86,
+0x926A,0xBDDC,0x9236,0xBE32,0x9202,0xBE88,0x91CF,0xBEDF,0x919C,0xBF35,0x9169,
+0xBF8C,0x9137,0xBFE3,0x9105,0xC03A,0x90D3,0xC091,0x90A1,0xC0E9,0x9070,0xC140,
+0x903E,0xC198,0x900E,0xC1F0,0x8FDD,0xC248,0x8FAD,0xC2A0,0x8F7D,0xC2F8,0x8F4D,
+0xC351,0x8F1D,0xC3A9,0x8EEE,0xC402,0x8EBF,0xC45B,0x8E90,0xC4B4,0x8E62,0xC50D,
+0x8E34,0xC566,0x8E06,0xC5C0,0x8DD8,0xC619,0x8DAB,0xC673,0x8D7E,0xC6CD,0x8D51,
+0xC727,0x8D24,0xC781,0x8CF8,0xC7DB,0x8CCC,0xC836,0x8CA1,0xC890,0x8C75,0xC8EB,
+0x8C4A,0xC946,0x8C1F,0xC9A1,0x8BF5,0xC9FC,0x8BCA,0xCA57,0x8BA0,0xCAB2,0x8B77,
+0xCB0E,0x8B4D,0xCB69,0x8B24,0xCBC5,0x8AFB,0xCC21,0x8AD3,0xCC7D,0x8AAA,0xCCD9,
+0x8A82,0xCD35,0x8A5A,0xCD92,0x8A33,0xCDEE,0x8A0C,0xCE4B,0x89E5,0xCEA7,0x89BE,
+0xCF04,0x8998,0xCF61,0x8972,0xCFBE,0x894C,0xD01B,0x8927,0xD079,0x8902,0xD0D6,
+0x88DD,0xD134,0x88B8,0xD191,0x8894,0xD1EF,0x8870,0xD24D,0x884C,0xD2AB,0x8828,
+0xD309,0x8805,0xD367,0x87E2,0xD3C5,0x87C0,0xD424,0x879D,0xD482,0x877B,0xD4E1,
+0x875A,0xD53F,0x8738,0xD59E,0x8717,0xD5FD,0x86F6,0xD65C,0x86D6,0xD6BB,0x86B6,
+0xD71B,0x8696,0xD77A,0x8676,0xD7D9,0x8656,0xD839,0x8637,0xD898,0x8619,0xD8F8,
+0x85FA,0xD958,0x85DC,0xD9B8,0x85BE,0xDA18,0x85A0,0xDA78,0x8583,0xDAD8,0x8566,
+0xDB38,0x8549,0xDB99,0x852D,0xDBF9,0x8511,0xDC59,0x84F5,0xDCBA,0x84D9,0xDD1B,
+0x84BE,0xDD7C,0x84A3,0xDDDC,0x8488,0xDE3D,0x846E,0xDE9E,0x8454,0xDEFF,0x843A,
+0xDF61,0x8421,0xDFC2,0x8407,0xE023,0x83EF,0xE085,0x83D6,0xE0E6,0x83BE,0xE148,
+0x83A6,0xE1A9,0x838E,0xE20B,0x8377,0xE26D,0x8360,0xE2CF,0x8349,0xE330,0x8332,
+0xE392,0x831C,0xE3F4,0x8306,0xE457,0x82F1,0xE4B9,0x82DB,0xE51B,0x82C6,0xE57D,
+0x82B2,0xE5E0,0x829D,0xE642,0x8289,0xE6A5,0x8276,0xE707,0x8262,0xE76A,0x824F,
+0xE7CD,0x823C,0xE82F,0x822A,0xE892,0x8217,0xE8F5,0x8205,0xE958,0x81F4,0xE9BB,
+0x81E2,0xEA1E,0x81D1,0xEA81,0x81C1,0xEAE4,0x81B0,0xEB47,0x81A0,0xEBAB,0x8190,
+0xEC0E,0x8181,0xEC71,0x8172,0xECD5,0x8163,0xED38,0x8154,0xED9B,0x8146,0xEDFF,
+0x8138,0xEE62,0x812A,0xEEC6,0x811D,0xEF2A,0x8110,0xEF8D,0x8103,0xEFF1,0x80F6,
+0xF055,0x80EA,0xF0B9,0x80DE,0xF11C,0x80D3,0xF180,0x80C8,0xF1E4,0x80BD,0xF248,
+0x80B2,0xF2AC,0x80A8,0xF310,0x809E,0xF374,0x8094,0xF3D8,0x808B,0xF43C,0x8082,
+0xF4A0,0x8079,0xF505,0x8070,0xF569,0x8068,0xF5CD,0x8060,0xF631,0x8059,0xF695,
+0x8052,0xF6FA,0x804B,0xF75E,0x8044,0xF7C2,0x803E,0xF827,0x8038,0xF88B,0x8032,
+0xF8EF,0x802D,0xF954,0x8027,0xF9B8,0x8023,0xFA1D,0x801E,0xFA81,0x801A,0xFAE5,
+0x8016,0xFB4A,0x8013,0xFBAE,0x800F,0xFC13,0x800C,0xFC77,0x800A,0xFCDC,0x8008,
+0xFD40,0x8006,0xFDA5,0x8004,0xFE09,0x8002,0xFE6E,0x8001,0xFED2,0x8001,0xFF37,
+0x8000,0xFF9B,0x7FFF,0x0000,0x7FFE,0xFE6E,0x7FF6,0xFCDC,0x7FEA,0xFB4A,0x7FD9,
+0xF9B8,0x7FC2,0xF827,0x7FA7,0xF695,0x7F87,0xF505,0x7F62,0xF374,0x7F38,0xF1E4,
+0x7F0A,0xF055,0x7ED6,0xEEC6,0x7E9D,0xED38,0x7E60,0xEBAB,0x7E1E,0xEA1E,0x7DD6,
+0xE892,0x7D8A,0xE707,0x7D3A,0xE57D,0x7CE4,0xE3F4,0x7C89,0xE26D,0x7C2A,0xE0E6,
+0x7BC6,0xDF61,0x7B5D,0xDDDC,0x7AEF,0xDC59,0x7A7D,0xDAD8,0x7A06,0xD958,0x798A,
+0xD7D9,0x790A,0xD65C,0x7885,0xD4E1,0x77FB,0xD367,0x776C,0xD1EF,0x76D9,0xD079,
+0x7642,0xCF04,0x75A6,0xCD92,0x7505,0xCC21,0x7460,0xCAB2,0x73B6,0xC946,0x7308,
+0xC7DB,0x7255,0xC673,0x719E,0xC50D,0x70E3,0xC3A9,0x7023,0xC248,0x6F5F,0xC0E9,
+0x6E97,0xBF8C,0x6DCA,0xBE32,0x6CF9,0xBCDA,0x6C24,0xBB85,0x6B4B,0xBA33,0x6A6E,
+0xB8E3,0x698C,0xB796,0x68A7,0xB64C,0x67BD,0xB505,0x66D0,0xB3C0,0x65DE,0xB27F,
+0x64E9,0xB140,0x63EF,0xB005,0x62F2,0xAECC,0x61F1,0xAD97,0x60EC,0xAC65,0x5FE4,
+0xAB36,0x5ED7,0xAA0A,0x5DC8,0xA8E2,0x5CB4,0xA7BD,0x5B9D,0xA69C,0x5A82,0xA57E,
+0x5964,0xA463,0x5843,0xA34C,0x571E,0xA238,0x55F6,0xA129,0x54CA,0xA01C,0x539B,
+0x9F14,0x5269,0x9E0F,0x5134,0x9D0E,0x4FFB,0x9C11,0x4EC0,0x9B17,0x4D81,0x9A22,
+0x4C40,0x9930,0x4AFB,0x9843,0x49B4,0x9759,0x486A,0x9674,0x471D,0x9592,0x45CD,
+0x94B5,0x447B,0x93DC,0x4326,0x9307,0x41CE,0x9236,0x4074,0x9169,0x3F17,0x90A1,
+0x3DB8,0x8FDD,0x3C57,0x8F1D,0x3AF3,0x8E62,0x398D,0x8DAB,0x3825,0x8CF8,0x36BA,
+0x8C4A,0x354E,0x8BA0,0x33DF,0x8AFB,0x326E,0x8A5A,0x30FC,0x89BE,0x2F87,0x8927,
+0x2E11,0x8894,0x2C99,0x8805,0x2B1F,0x877B,0x29A4,0x86F6,0x2827,0x8676,0x26A8,
+0x85FA,0x2528,0x8583,0x23A7,0x8511,0x2224,0x84A3,0x209F,0x843A,0x1F1A,0x83D6,
+0x1D93,0x8377,0x1C0C,0x831C,0x1A83,0x82C6,0x18F9,0x8276,0x176E,0x822A,0x15E2,
+0x81E2,0x1455,0x81A0,0x12C8,0x8163,0x113A,0x812A,0x0FAB,0x80F6,0x0E1C,0x80C8,
+0x0C8C,0x809E,0x0AFB,0x8079,0x096B,0x8059,0x07D9,0x803E,0x0648,0x8027,0x04B6,
+0x8016,0x0324,0x800A,0x0192,0x8002,0x0000,0x8000,0xFE6E,0x8002,0xFCDC,0x800A,
+0xFB4A,0x8016,0xF9B8,0x8027,0xF827,0x803E,0xF695,0x8059,0xF505,0x8079,0xF374,
+0x809E,0xF1E4,0x80C8,0xF055,0x80F6,0xEEC6,0x812A,0xED38,0x8163,0xEBAB,0x81A0,
+0xEA1E,0x81E2,0xE892,0x822A,0xE707,0x8276,0xE57D,0x82C6,0xE3F4,0x831C,0xE26D,
+0x8377,0xE0E6,0x83D6,0xDF61,0x843A,0xDDDC,0x84A3,0xDC59,0x8511,0xDAD8,0x8583,
+0xD958,0x85FA,0xD7D9,0x8676,0xD65C,0x86F6,0xD4E1,0x877B,0xD367,0x8805,0xD1EF,
+0x8894,0xD079,0x8927,0xCF04,0x89BE,0xCD92,0x8A5A,0xCC21,0x8AFB,0xCAB2,0x8BA0,
+0xC946,0x8C4A,0xC7DB,0x8CF8,0xC673,0x8DAB,0xC50D,0x8E62,0xC3A9,0x8F1D,0xC248,
+0x8FDD,0xC0E9,0x90A1,0xBF8C,0x9169,0xBE32,0x9236,0xBCDA,0x9307,0xBB85,0x93DC,
+0xBA33,0x94B5,0xB8E3,0x9592,0xB796,0x9674,0xB64C,0x9759,0xB505,0x9843,0xB3C0,
+0x9930,0xB27F,0x9A22,0xB140,0x9B17,0xB005,0x9C11,0xAECC,0x9D0E,0xAD97,0x9E0F,
+0xAC65,0x9F14,0xAB36,0xA01C,0xAA0A,0xA129,0xA8E2,0xA238,0xA7BD,0xA34C,0xA69C,
+0xA463,0xA57E,0xA57E,0xA463,0xA69C,0xA34C,0xA7BD,0xA238,0xA8E2,0xA129,0xAA0A,
+0xA01C,0xAB36,0x9F14,0xAC65,0x9E0F,0xAD97,0x9D0E,0xAECC,0x9C11,0xB005,0x9B17,
+0xB140,0x9A22,0xB27F,0x9930,0xB3C0,0x9843,0xB505,0x9759,0xB64C,0x9674,0xB796,
+0x9592,0xB8E3,0x94B5,0xBA33,0x93DC,0xBB85,0x9307,0xBCDA,0x9236,0xBE32,0x9169,
+0xBF8C,0x90A1,0xC0E9,0x8FDD,0xC248,0x8F1D,0xC3A9,0x8E62,0xC50D,0x8DAB,0xC673,
+0x8CF8,0xC7DB,0x8C4A,0xC946,0x8BA0,0xCAB2,0x8AFB,0xCC21,0x8A5A,0xCD92,0x89BE,
+0xCF04,0x8927,0xD079,0x8894,0xD1EF,0x8805,0xD367,0x877B,0xD4E1,0x86F6,0xD65C,
+0x8676,0xD7D9,0x85FA,0xD958,0x8583,0xDAD8,0x8511,0xDC59,0x84A3,0xDDDC,0x843A,
+0xDF61,0x83D6,0xE0E6,0x8377,0xE26D,0x831C,0xE3F4,0x82C6,0xE57D,0x8276,0xE707,
+0x822A,0xE892,0x81E2,0xEA1E,0x81A0,0xEBAB,0x8163,0xED38,0x812A,0xEEC6,0x80F6,
+0xF055,0x80C8,0xF1E4,0x809E,0xF374,0x8079,0xF505,0x8059,0xF695,0x803E,0xF827,
+0x8027,0xF9B8,0x8016,0xFB4A,0x800A,0xFCDC,0x8002,0xFE6E,0x7FFF,0x0000,0x7FD9,
+0xF9B8,0x7F62,0xF374,0x7E9D,0xED38,0x7D8A,0xE707,0x7C2A,0xE0E6,0x7A7D,0xDAD8,
+0x7885,0xD4E1,0x7642,0xCF04,0x73B6,0xC946,0x70E3,0xC3A9,0x6DCA,0xBE32,0x6A6E,
+0xB8E3,0x66D0,0xB3C0,0x62F2,0xAECC,0x5ED7,0xAA0A,0x5A82,0xA57E,0x55F6,0xA129,
+0x5134,0x9D0E,0x4C40,0x9930,0x471D,0x9592,0x41CE,0x9236,0x3C57,0x8F1D,0x36BA,
+0x8C4A,0x30FC,0x89BE,0x2B1F,0x877B,0x2528,0x8583,0x1F1A,0x83D6,0x18F9,0x8276,
+0x12C8,0x8163,0x0C8C,0x809E,0x0648,0x8027,0x0000,0x8000,0xF9B8,0x8027,0xF374,
+0x809E,0xED38,0x8163,0xE707,0x8276,0xE0E6,0x83D6,0xDAD8,0x8583,0xD4E1,0x877B,
+0xCF04,0x89BE,0xC946,0x8C4A,0xC3A9,0x8F1D,0xBE32,0x9236,0xB8E3,0x9592,0xB3C0,
+0x9930,0xAECC,0x9D0E,0xAA0A,0xA129,0xA57E,0xA57E,0xA129,0xAA0A,0x9D0E,0xAECC,
+0x9930,0xB3C0,0x9592,0xB8E3,0x9236,0xBE32,0x8F1D,0xC3A9,0x8C4A,0xC946,0x89BE,
+0xCF04,0x877B,0xD4E1,0x8583,0xDAD8,0x83D6,0xE0E6,0x8276,0xE707,0x8163,0xED38,
+0x809E,0xF374,0x8027,0xF9B8,0x7FFF,0x0000,0x7D8A,0xE707,0x7642,0xCF04,0x6A6E,
+0xB8E3,0x5A82,0xA57E,0x471D,0x9592,0x30FC,0x89BE,0x18F9,0x8276,0x0000,0x8000,
+0xE707,0x8276,0xCF04,0x89BE,0xB8E3,0x9592,0xA57E,0xA57E,0x9592,0xB8E3,0x89BE,
+0xCF04,0x8276,0xE707,0x7FFF,0x0000,0x5A82,0xA57E,0x0000,0x8000,0xA57E,0xA57E,};
+
+q15_t rearranged_twiddle_stride3_4096_q15[2728]={
+0x7FFF,0x0000,0x7FFF,0xFF69,0x7FFF,0xFED2,0x7FFD,0xFE3C,0x7FFA,0xFDA5,0x7FF7,
+0xFD0E,0x7FF4,0xFC77,0x7FEF,0xFBE1,0x7FEA,0xFB4A,0x7FE4,0xFAB3,0x7FDD,0xFA1D,
+0x7FD6,0xF986,0x7FCE,0xF8EF,0x7FC5,0xF859,0x7FBC,0xF7C2,0x7FB2,0xF72C,0x7FA7,
+0xF695,0x7F9C,0xF5FF,0x7F90,0xF569,0x7F83,0xF4D3,0x7F75,0xF43C,0x7F67,0xF3A6,
+0x7F58,0xF310,0x7F49,0xF27A,0x7F38,0xF1E4,0x7F27,0xF14E,0x7F16,0xF0B9,0x7F03,
+0xF023,0x7EF0,0xEF8D,0x7EDD,0xEEF8,0x7EC8,0xEE62,0x7EB3,0xEDCD,0x7E9D,0xED38,
+0x7E87,0xECA3,0x7E70,0xEC0E,0x7E58,0xEB79,0x7E3F,0xEAE4,0x7E26,0xEA4F,0x7E0C,
+0xE9BB,0x7DF2,0xE926,0x7DD6,0xE892,0x7DBA,0xE7FE,0x7D9E,0xE76A,0x7D81,0xE6D6,
+0x7D63,0xE642,0x7D44,0xE5AF,0x7D25,0xE51B,0x7D05,0xE488,0x7CE4,0xE3F4,0x7CC2,
+0xE361,0x7CA0,0xE2CF,0x7C7E,0xE23C,0x7C5A,0xE1A9,0x7C36,0xE117,0x7C11,0xE085,
+0x7BEC,0xDFF2,0x7BC6,0xDF61,0x7B9F,0xDECF,0x7B78,0xDE3D,0x7B50,0xDDAC,0x7B27,
+0xDD1B,0x7AFD,0xDC8A,0x7AD3,0xDBF9,0x7AA8,0xDB68,0x7A7D,0xDAD8,0x7A51,0xDA48,
+0x7A24,0xD9B8,0x79F7,0xD928,0x79C9,0xD898,0x799A,0xD809,0x796A,0xD77A,0x793A,
+0xD6EB,0x790A,0xD65C,0x78D8,0xD5CE,0x78A6,0xD53F,0x7874,0xD4B1,0x7840,0xD424,
+0x780C,0xD396,0x77D8,0xD309,0x77A2,0xD27C,0x776C,0xD1EF,0x7736,0xD162,0x76FE,
+0xD0D6,0x76C7,0xD04A,0x768E,0xCFBE,0x7655,0xCF33,0x761B,0xCEA7,0x75E1,0xCE1C,
+0x75A6,0xCD92,0x756A,0xCD07,0x752D,0xCC7D,0x74F0,0xCBF3,0x74B3,0xCB69,0x7475,
+0xCAE0,0x7436,0xCA57,0x73F6,0xC9CE,0x73B6,0xC946,0x7375,0xC8BE,0x7334,0xC836,
+0x72F2,0xC7AE,0x72AF,0xC727,0x726C,0xC6A0,0x7228,0xC619,0x71E3,0xC593,0x719E,
+0xC50D,0x7158,0xC487,0x7112,0xC402,0x70CB,0xC37D,0x7083,0xC2F8,0x703B,0xC274,
+0x6FF2,0xC1F0,0x6FA9,0xC16C,0x6F5F,0xC0E9,0x6F14,0xC066,0x6EC9,0xBFE3,0x6E7D,
+0xBF61,0x6E31,0xBEDF,0x6DE4,0xBE5D,0x6D96,0xBDDC,0x6D48,0xBD5B,0x6CF9,0xBCDA,
+0x6CAA,0xBC5A,0x6C5A,0xBBDA,0x6C09,0xBB5B,0x6BB8,0xBADC,0x6B66,0xBA5D,0x6B14,
+0xB9DF,0x6AC1,0xB961,0x6A6E,0xB8E3,0x6A1A,0xB866,0x69C5,0xB7E9,0x6970,0xB76D,
+0x691A,0xB6F1,0x68C4,0xB675,0x686D,0xB5FA,0x6815,0xB57F,0x67BD,0xB505,0x6764,
+0xB48B,0x670B,0xB411,0x66B2,0xB398,0x6657,0xB31F,0x65FC,0xB2A7,0x65A1,0xB22F,
+0x6545,0xB1B7,0x64E9,0xB140,0x648B,0xB0C9,0x642E,0xB053,0x63D0,0xAFDD,0x6371,
+0xAF68,0x6312,0xAEF3,0x62B2,0xAE7F,0x6252,0xAE0B,0x61F1,0xAD97,0x6190,0xAD24,
+0x612E,0xACB1,0x60CB,0xAC3F,0x6068,0xABCD,0x6005,0xAB5C,0x5FA1,0xAAEB,0x5F3C,
+0xAA7A,0x5ED7,0xAA0A,0x5E72,0xA99B,0x5E0C,0xA92C,0x5DA5,0xA8BD,0x5D3E,0xA84F,
+0x5CD7,0xA7E2,0x5C6F,0xA774,0x5C06,0xA708,0x5B9D,0xA69C,0x5B34,0xA630,0x5AC9,
+0xA5C5,0x5A5F,0xA55A,0x59F4,0xA4F0,0x5988,0xA486,0x591C,0xA41D,0x58B0,0xA3B4,
+0x5843,0xA34C,0x57D5,0xA2E4,0x5767,0xA27D,0x56F9,0xA216,0x568A,0xA1B0,0x561B,
+0xA14A,0x55AB,0xA0E5,0x553B,0xA080,0x54CA,0xA01C,0x5459,0x9FB9,0x53E7,0x9F56,
+0x5375,0x9EF3,0x5303,0x9E91,0x5290,0x9E2F,0x521C,0x9DCE,0x51A8,0x9D6E,0x5134,
+0x9D0E,0x50BF,0x9CAF,0x504A,0x9C50,0x4FD4,0x9BF1,0x4F5E,0x9B94,0x4EE8,0x9B36,
+0x4E71,0x9ADA,0x4DF9,0x9A7E,0x4D81,0x9A22,0x4D09,0x99C7,0x4C91,0x996D,0x4C17,
+0x9913,0x4B9E,0x98B9,0x4B24,0x9860,0x4AAA,0x9808,0x4A2F,0x97B0,0x49B4,0x9759,
+0x4939,0x9703,0x48BD,0x96AD,0x4840,0x9657,0x47C4,0x9603,0x4747,0x95AE,0x46C9,
+0x955B,0x464B,0x9508,0x45CD,0x94B5,0x454F,0x9463,0x44D0,0x9412,0x4450,0x93C1,
+0x43D1,0x9371,0x4351,0x9321,0x42D0,0x92D2,0x424F,0x9284,0x41CE,0x9236,0x414D,
+0x91E9,0x40CB,0x919C,0x4048,0x9150,0x3FC6,0x9105,0x3F43,0x90BA,0x3EC0,0x9070,
+0x3E3C,0x9026,0x3DB8,0x8FDD,0x3D34,0x8F95,0x3CAF,0x8F4D,0x3C2A,0x8F06,0x3BA5,
+0x8EBF,0x3B20,0x8E79,0x3A9A,0x8E34,0x3A13,0x8DEF,0x398D,0x8DAB,0x3906,0x8D67,
+0x387F,0x8D24,0x37F7,0x8CE2,0x3770,0x8CA1,0x36E8,0x8C60,0x365F,0x8C1F,0x35D7,
+0x8BDF,0x354E,0x8BA0,0x34C4,0x8B62,0x343B,0x8B24,0x33B1,0x8AE7,0x3327,0x8AAA,
+0x329D,0x8A6E,0x3212,0x8A33,0x3187,0x89F8,0x30FC,0x89BE,0x3070,0x8985,0x2FE5,
+0x894C,0x2F59,0x8914,0x2ECC,0x88DD,0x2E40,0x88A6,0x2DB3,0x8870,0x2D26,0x883A,
+0x2C99,0x8805,0x2C0C,0x87D1,0x2B7E,0x879D,0x2AF0,0x876B,0x2A62,0x8738,0x29D3,
+0x8707,0x2945,0x86D6,0x28B6,0x86A5,0x2827,0x8676,0x2797,0x8647,0x2708,0x8619,
+0x2678,0x85EB,0x25E8,0x85BE,0x2558,0x8592,0x24C8,0x8566,0x2437,0x853B,0x23A7,
+0x8511,0x2316,0x84E7,0x2284,0x84BE,0x21F3,0x8496,0x2162,0x846E,0x20D0,0x8447,
+0x203E,0x8421,0x1FAC,0x83FB,0x1F1A,0x83D6,0x1E88,0x83B2,0x1DF5,0x838E,0x1D62,
+0x836B,0x1CD0,0x8349,0x1C3D,0x8327,0x1BA9,0x8306,0x1B16,0x82E6,0x1A83,0x82C6,
+0x19EF,0x82A8,0x195B,0x8289,0x18C7,0x826C,0x1833,0x824F,0x179F,0x8233,0x170B,
+0x8217,0x1677,0x81FD,0x15E2,0x81E2,0x154D,0x81C9,0x14B9,0x81B0,0x1424,0x8198,
+0x138F,0x8181,0x12FA,0x816A,0x1265,0x8154,0x11CF,0x813F,0x113A,0x812A,0x10A4,
+0x8116,0x100F,0x8103,0x0F79,0x80F0,0x0EE4,0x80DE,0x0E4E,0x80CD,0x0DB8,0x80BD,
+0x0D22,0x80AD,0x0C8C,0x809E,0x0BF6,0x808F,0x0B60,0x8082,0x0AC9,0x8075,0x0A33,
+0x8068,0x099D,0x805D,0x0906,0x8052,0x0870,0x8047,0x07D9,0x803E,0x0743,0x8035,
+0x06AC,0x802D,0x0616,0x8025,0x057F,0x801E,0x04E8,0x8018,0x0452,0x8013,0x03BB,
+0x800E,0x0324,0x800A,0x028D,0x8007,0x01F7,0x8004,0x0160,0x8002,0x00C9,0x8001,
+0x0032,0x8000,0xFF9B,0x8000,0xFF05,0x8001,0xFE6E,0x8002,0xFDD7,0x8005,0xFD40,
+0x8008,0xFCAA,0x800B,0xFC13,0x800F,0xFB7C,0x8014,0xFAE5,0x801A,0xFA4F,0x8020,
+0xF9B8,0x8027,0xF922,0x802F,0xF88B,0x8038,0xF7F4,0x8041,0xF75E,0x804B,0xF6C8,
+0x8055,0xF631,0x8060,0xF59B,0x806C,0xF505,0x8079,0xF46E,0x8086,0xF3D8,0x8094,
+0xF342,0x80A3,0xF2AC,0x80B2,0xF216,0x80C2,0xF180,0x80D3,0xF0EB,0x80E4,0xF055,
+0x80F6,0xEFBF,0x8109,0xEF2A,0x811D,0xEE94,0x8131,0xEDFF,0x8146,0xED6A,0x815B,
+0xECD5,0x8172,0xEC3F,0x8188,0xEBAB,0x81A0,0xEB16,0x81B8,0xEA81,0x81D1,0xE9EC,
+0x81EB,0xE958,0x8205,0xE8C4,0x8220,0xE82F,0x823C,0xE79B,0x8259,0xE707,0x8276,
+0xE673,0x8293,0xE5E0,0x82B2,0xE54C,0x82D1,0xE4B9,0x82F1,0xE426,0x8311,0xE392,
+0x8332,0xE2FF,0x8354,0xE26D,0x8377,0xE1DA,0x839A,0xE148,0x83BE,0xE0B5,0x83E2,
+0xE023,0x8407,0xDF91,0x842D,0xDEFF,0x8454,0xDE6E,0x847B,0xDDDC,0x84A3,0xDD4B,
+0x84CC,0xDCBA,0x84F5,0xDC29,0x851F,0xDB99,0x8549,0xDB08,0x8574,0xDA78,0x85A0,
+0xD9E8,0x85CD,0xD958,0x85FA,0xD8C8,0x8628,0xD839,0x8656,0xD7AA,0x8686,0xD71B,
+0x86B6,0xD68C,0x86E6,0xD5FD,0x8717,0xD56F,0x8749,0xD4E1,0x877B,0xD453,0x87AF,
+0xD3C5,0x87E2,0xD338,0x8817,0xD2AB,0x884C,0xD21E,0x8882,0xD191,0x88B8,0xD105,
+0x88EF,0xD079,0x8927,0xCFED,0x895F,0xCF61,0x8998,0xCED6,0x89D2,0xCE4B,0x8A0C,
+0xCDC0,0x8A47,0xCD35,0x8A82,0xCCAB,0x8ABE,0xCC21,0x8AFB,0xCB97,0x8B39,0xCB0E,
+0x8B77,0xCA85,0x8BB5,0xC9FC,0x8BF5,0xC973,0x8C35,0xC8EB,0x8C75,0xC863,0x8CB6,
+0xC7DB,0x8CF8,0xC754,0x8D3B,0xC6CD,0x8D7E,0xC646,0x8DC1,0xC5C0,0x8E06,0xC53A,
+0x8E4B,0xC4B4,0x8E90,0xC42E,0x8ED6,0xC3A9,0x8F1D,0xC324,0x8F65,0xC2A0,0x8FAD,
+0xC21C,0x8FF5,0xC198,0x903E,0xC114,0x9088,0xC091,0x90D3,0xC00F,0x911E,0xBF8C,
+0x9169,0xBF0A,0x91B6,0xBE88,0x9202,0xBE07,0x9250,0xBD86,0x929E,0xBD05,0x92EC,
+0xBC85,0x933C,0xBC05,0x938B,0xBB85,0x93DC,0xBB06,0x942D,0xBA87,0x947E,0xBA09,
+0x94D0,0xB98B,0x9523,0xB90D,0x9577,0xB890,0x95CA,0xB813,0x961F,0xB796,0x9674,
+0xB71A,0x96C9,0xB69E,0x9720,0xB623,0x9776,0xB5A8,0x97CE,0xB52D,0x9826,0xB4B3,
+0x987E,0xB439,0x98D7,0xB3C0,0x9930,0xB347,0x998B,0xB2CF,0x99E5,0xB257,0x9A40,
+0xB1DF,0x9A9C,0xB168,0x9AF9,0xB0F1,0x9B55,0xB07B,0x9BB3,0xB005,0x9C11,0xAF8F,
+0x9C6F,0xAF1A,0x9CCE,0xAEA5,0x9D2E,0xAE31,0x9D8E,0xADBD,0x9DEF,0xAD4A,0x9E50,
+0xACD7,0x9EB2,0xAC65,0x9F14,0xABF3,0x9F77,0xAB81,0x9FDA,0xAB10,0xA03E,0xAAA0,
+0xA0A2,0xAA30,0xA107,0xA9C0,0xA16C,0xA951,0xA1D2,0xA8E2,0xA238,0xA874,0xA29F,
+0xA806,0xA307,0xA799,0xA36F,0xA72C,0xA3D7,0xA6C0,0xA440,0xA654,0xA4A9,0xA5E8,
+0xA513,0xA57E,0xA57E,0xA513,0xA5E8,0xA4A9,0xA654,0xA440,0xA6C0,0xA3D7,0xA72C,
+0xA36F,0xA799,0xA307,0xA806,0xA29F,0xA874,0xA238,0xA8E2,0xA1D2,0xA951,0xA16C,
+0xA9C0,0xA107,0xAA30,0xA0A2,0xAAA0,0xA03E,0xAB10,0x9FDA,0xAB81,0x9F77,0xABF3,
+0x9F14,0xAC65,0x9EB2,0xACD7,0x9E50,0xAD4A,0x9DEF,0xADBD,0x9D8E,0xAE31,0x9D2E,
+0xAEA5,0x9CCE,0xAF1A,0x9C6F,0xAF8F,0x9C11,0xB005,0x9BB3,0xB07B,0x9B55,0xB0F1,
+0x9AF9,0xB168,0x9A9C,0xB1DF,0x9A40,0xB257,0x99E5,0xB2CF,0x998B,0xB347,0x9930,
+0xB3C0,0x98D7,0xB439,0x987E,0xB4B3,0x9826,0xB52D,0x97CE,0xB5A8,0x9776,0xB623,
+0x9720,0xB69E,0x96C9,0xB71A,0x9674,0xB796,0x961F,0xB813,0x95CA,0xB890,0x9577,
+0xB90D,0x9523,0xB98B,0x94D0,0xBA09,0x947E,0xBA87,0x942D,0xBB06,0x93DC,0xBB85,
+0x938B,0xBC05,0x933C,0xBC85,0x92EC,0xBD05,0x929E,0xBD86,0x9250,0xBE07,0x9202,
+0xBE88,0x91B6,0xBF0A,0x9169,0xBF8C,0x911E,0xC00F,0x90D3,0xC091,0x9088,0xC114,
+0x903E,0xC198,0x8FF5,0xC21C,0x8FAD,0xC2A0,0x8F65,0xC324,0x8F1D,0xC3A9,0x8ED6,
+0xC42E,0x8E90,0xC4B4,0x8E4B,0xC53A,0x8E06,0xC5C0,0x8DC1,0xC646,0x8D7E,0xC6CD,
+0x8D3B,0xC754,0x8CF8,0xC7DB,0x8CB6,0xC863,0x8C75,0xC8EB,0x8C35,0xC973,0x8BF5,
+0xC9FC,0x8BB5,0xCA85,0x8B77,0xCB0E,0x8B39,0xCB97,0x8AFB,0xCC21,0x8ABE,0xCCAB,
+0x8A82,0xCD35,0x8A47,0xCDC0,0x8A0C,0xCE4B,0x89D2,0xCED6,0x8998,0xCF61,0x895F,
+0xCFED,0x8927,0xD079,0x88EF,0xD105,0x88B8,0xD191,0x8882,0xD21E,0x884C,0xD2AB,
+0x8817,0xD338,0x87E2,0xD3C5,0x87AF,0xD453,0x877B,0xD4E1,0x8749,0xD56F,0x8717,
+0xD5FD,0x86E6,0xD68C,0x86B6,0xD71B,0x8686,0xD7AA,0x8656,0xD839,0x8628,0xD8C8,
+0x85FA,0xD958,0x85CD,0xD9E8,0x85A0,0xDA78,0x8574,0xDB08,0x8549,0xDB99,0x851F,
+0xDC29,0x84F5,0xDCBA,0x84CC,0xDD4B,0x84A3,0xDDDC,0x847B,0xDE6E,0x8454,0xDEFF,
+0x842D,0xDF91,0x8407,0xE023,0x83E2,0xE0B5,0x83BE,0xE148,0x839A,0xE1DA,0x8377,
+0xE26D,0x8354,0xE2FF,0x8332,0xE392,0x8311,0xE426,0x82F1,0xE4B9,0x82D1,0xE54C,
+0x82B2,0xE5E0,0x8293,0xE673,0x8276,0xE707,0x8259,0xE79B,0x823C,0xE82F,0x8220,
+0xE8C4,0x8205,0xE958,0x81EB,0xE9EC,0x81D1,0xEA81,0x81B8,0xEB16,0x81A0,0xEBAB,
+0x8188,0xEC3F,0x8172,0xECD5,0x815B,0xED6A,0x8146,0xEDFF,0x8131,0xEE94,0x811D,
+0xEF2A,0x8109,0xEFBF,0x80F6,0xF055,0x80E4,0xF0EB,0x80D3,0xF180,0x80C2,0xF216,
+0x80B2,0xF2AC,0x80A3,0xF342,0x8094,0xF3D8,0x8086,0xF46E,0x8079,0xF505,0x806C,
+0xF59B,0x8060,0xF631,0x8055,0xF6C8,0x804B,0xF75E,0x8041,0xF7F4,0x8038,0xF88B,
+0x802F,0xF922,0x8027,0xF9B8,0x8020,0xFA4F,0x801A,0xFAE5,0x8014,0xFB7C,0x800F,
+0xFC13,0x800B,0xFCAA,0x8008,0xFD40,0x8005,0xFDD7,0x8002,0xFE6E,0x8001,0xFF05,
+0x8000,0xFF9B,0x8000,0x0032,0x8001,0x00C9,0x8002,0x0160,0x8004,0x01F7,0x8007,
+0x028D,0x800A,0x0324,0x800E,0x03BB,0x8013,0x0452,0x8018,0x04E8,0x801E,0x057F,
+0x8025,0x0616,0x802D,0x06AC,0x8035,0x0743,0x803E,0x07D9,0x8047,0x0870,0x8052,
+0x0906,0x805D,0x099D,0x8068,0x0A33,0x8075,0x0AC9,0x8082,0x0B60,0x808F,0x0BF6,
+0x809E,0x0C8C,0x80AD,0x0D22,0x80BD,0x0DB8,0x80CD,0x0E4E,0x80DE,0x0EE4,0x80F0,
+0x0F79,0x8103,0x100F,0x8116,0x10A4,0x812A,0x113A,0x813F,0x11CF,0x8154,0x1265,
+0x816A,0x12FA,0x8181,0x138F,0x8198,0x1424,0x81B0,0x14B9,0x81C9,0x154D,0x81E2,
+0x15E2,0x81FD,0x1677,0x8217,0x170B,0x8233,0x179F,0x824F,0x1833,0x826C,0x18C7,
+0x8289,0x195B,0x82A8,0x19EF,0x82C6,0x1A83,0x82E6,0x1B16,0x8306,0x1BA9,0x8327,
+0x1C3D,0x8349,0x1CD0,0x836B,0x1D62,0x838E,0x1DF5,0x83B2,0x1E88,0x83D6,0x1F1A,
+0x83FB,0x1FAC,0x8421,0x203E,0x8447,0x20D0,0x846E,0x2162,0x8496,0x21F3,0x84BE,
+0x2284,0x84E7,0x2316,0x8511,0x23A7,0x853B,0x2437,0x8566,0x24C8,0x8592,0x2558,
+0x85BE,0x25E8,0x85EB,0x2678,0x8619,0x2708,0x8647,0x2797,0x8676,0x2827,0x86A5,
+0x28B6,0x86D6,0x2945,0x8707,0x29D3,0x8738,0x2A62,0x876B,0x2AF0,0x879D,0x2B7E,
+0x87D1,0x2C0C,0x8805,0x2C99,0x883A,0x2D26,0x8870,0x2DB3,0x88A6,0x2E40,0x88DD,
+0x2ECC,0x8914,0x2F59,0x894C,0x2FE5,0x8985,0x3070,0x89BE,0x30FC,0x89F8,0x3187,
+0x8A33,0x3212,0x8A6E,0x329D,0x8AAA,0x3327,0x8AE7,0x33B1,0x8B24,0x343B,0x8B62,
+0x34C4,0x8BA0,0x354E,0x8BDF,0x35D7,0x8C1F,0x365F,0x8C60,0x36E8,0x8CA1,0x3770,
+0x8CE2,0x37F7,0x8D24,0x387F,0x8D67,0x3906,0x8DAB,0x398D,0x8DEF,0x3A13,0x8E34,
+0x3A9A,0x8E79,0x3B20,0x8EBF,0x3BA5,0x8F06,0x3C2A,0x8F4D,0x3CAF,0x8F95,0x3D34,
+0x8FDD,0x3DB8,0x9026,0x3E3C,0x9070,0x3EC0,0x90BA,0x3F43,0x9105,0x3FC6,0x9150,
+0x4048,0x919C,0x40CB,0x91E9,0x414D,0x9236,0x41CE,0x9284,0x424F,0x92D2,0x42D0,
+0x9321,0x4351,0x9371,0x43D1,0x93C1,0x4450,0x9412,0x44D0,0x9463,0x454F,0x94B5,
+0x45CD,0x9508,0x464B,0x955B,0x46C9,0x95AE,0x4747,0x9603,0x47C4,0x9657,0x4840,
+0x96AD,0x48BD,0x9703,0x4939,0x9759,0x49B4,0x97B0,0x4A2F,0x9808,0x4AAA,0x9860,
+0x4B24,0x98B9,0x4B9E,0x9913,0x4C17,0x996D,0x4C91,0x99C7,0x4D09,0x9A22,0x4D81,
+0x9A7E,0x4DF9,0x9ADA,0x4E71,0x9B36,0x4EE8,0x9B94,0x4F5E,0x9BF1,0x4FD4,0x9C50,
+0x504A,0x9CAF,0x50BF,0x9D0E,0x5134,0x9D6E,0x51A8,0x9DCE,0x521C,0x9E2F,0x5290,
+0x9E91,0x5303,0x9EF3,0x5375,0x9F56,0x53E7,0x9FB9,0x5459,0xA01C,0x54CA,0xA080,
+0x553B,0xA0E5,0x55AB,0xA14A,0x561B,0xA1B0,0x568A,0xA216,0x56F9,0xA27D,0x5767,
+0xA2E4,0x57D5,0xA34C,0x5843,0xA3B4,0x58B0,0xA41D,0x591C,0xA486,0x5988,0xA4F0,
+0x59F4,0xA55A,0x5A5F,0xA5C5,0x5AC9,0xA630,0x5B34,0xA69C,0x5B9D,0xA708,0x5C06,
+0xA774,0x5C6F,0xA7E2,0x5CD7,0xA84F,0x5D3E,0xA8BD,0x5DA5,0xA92C,0x5E0C,0xA99B,
+0x5E72,0xAA0A,0x5ED7,0xAA7A,0x5F3C,0xAAEB,0x5FA1,0xAB5C,0x6005,0xABCD,0x6068,
+0xAC3F,0x60CB,0xACB1,0x612E,0xAD24,0x6190,0xAD97,0x61F1,0xAE0B,0x6252,0xAE7F,
+0x62B2,0xAEF3,0x6312,0xAF68,0x6371,0xAFDD,0x63D0,0xB053,0x642E,0xB0C9,0x648B,
+0xB140,0x64E9,0xB1B7,0x6545,0xB22F,0x65A1,0xB2A7,0x65FC,0xB31F,0x6657,0xB398,
+0x66B2,0xB411,0x670B,0xB48B,0x6764,0xB505,0x67BD,0xB57F,0x6815,0xB5FA,0x686D,
+0xB675,0x68C4,0xB6F1,0x691A,0xB76D,0x6970,0xB7E9,0x69C5,0xB866,0x6A1A,0xB8E3,
+0x6A6E,0xB961,0x6AC1,0xB9DF,0x6B14,0xBA5D,0x6B66,0xBADC,0x6BB8,0xBB5B,0x6C09,
+0xBBDA,0x6C5A,0xBC5A,0x6CAA,0xBCDA,0x6CF9,0xBD5B,0x6D48,0xBDDC,0x6D96,0xBE5D,
+0x6DE4,0xBEDF,0x6E31,0xBF61,0x6E7D,0xBFE3,0x6EC9,0xC066,0x6F14,0xC0E9,0x6F5F,
+0xC16C,0x6FA9,0xC1F0,0x6FF2,0xC274,0x703B,0xC2F8,0x7083,0xC37D,0x70CB,0xC402,
+0x7112,0xC487,0x7158,0xC50D,0x719E,0xC593,0x71E3,0xC619,0x7228,0xC6A0,0x726C,
+0xC727,0x72AF,0xC7AE,0x72F2,0xC836,0x7334,0xC8BE,0x7375,0xC946,0x73B6,0xC9CE,
+0x73F6,0xCA57,0x7436,0xCAE0,0x7475,0xCB69,0x74B3,0xCBF3,0x74F0,0xCC7D,0x752D,
+0xCD07,0x756A,0xCD92,0x75A6,0xCE1C,0x75E1,0xCEA7,0x761B,0xCF33,0x7655,0xCFBE,
+0x768E,0xD04A,0x76C7,0xD0D6,0x76FE,0xD162,0x7736,0xD1EF,0x776C,0xD27C,0x77A2,
+0xD309,0x77D8,0xD396,0x780C,0xD424,0x7840,0xD4B1,0x7874,0xD53F,0x78A6,0xD5CE,
+0x78D8,0xD65C,0x790A,0xD6EB,0x793A,0xD77A,0x796A,0xD809,0x799A,0xD898,0x79C9,
+0xD928,0x79F7,0xD9B8,0x7A24,0xDA48,0x7A51,0xDAD8,0x7A7D,0xDB68,0x7AA8,0xDBF9,
+0x7AD3,0xDC8A,0x7AFD,0xDD1B,0x7B27,0xDDAC,0x7B50,0xDE3D,0x7B78,0xDECF,0x7B9F,
+0xDF61,0x7BC6,0xDFF2,0x7BEC,0xE085,0x7C11,0xE117,0x7C36,0xE1A9,0x7C5A,0xE23C,
+0x7C7E,0xE2CF,0x7CA0,0xE361,0x7CC2,0xE3F4,0x7CE4,0xE488,0x7D05,0xE51B,0x7D25,
+0xE5AF,0x7D44,0xE642,0x7D63,0xE6D6,0x7D81,0xE76A,0x7D9E,0xE7FE,0x7DBA,0xE892,
+0x7DD6,0xE926,0x7DF2,0xE9BB,0x7E0C,0xEA4F,0x7E26,0xEAE4,0x7E3F,0xEB79,0x7E58,
+0xEC0E,0x7E70,0xECA3,0x7E87,0xED38,0x7E9D,0xEDCD,0x7EB3,0xEE62,0x7EC8,0xEEF8,
+0x7EDD,0xEF8D,0x7EF0,0xF023,0x7F03,0xF0B9,0x7F16,0xF14E,0x7F27,0xF1E4,0x7F38,
+0xF27A,0x7F49,0xF310,0x7F58,0xF3A6,0x7F67,0xF43C,0x7F75,0xF4D3,0x7F83,0xF569,
+0x7F90,0xF5FF,0x7F9C,0xF695,0x7FA7,0xF72C,0x7FB2,0xF7C2,0x7FBC,0xF859,0x7FC5,
+0xF8EF,0x7FCE,0xF986,0x7FD6,0xFA1D,0x7FDD,0xFAB3,0x7FE4,0xFB4A,0x7FEA,0xFBE1,
+0x7FEF,0xFC77,0x7FF4,0xFD0E,0x7FF7,0xFDA5,0x7FFA,0xFE3C,0x7FFD,0xFED2,0x7FFF,
+0xFF69,0x7FFF,0x7FFF,0x0000,0x7FFA,0xFDA5,0x7FEA,0xFB4A,0x7FCE,0xF8EF,0x7FA7,
+0xF695,0x7F75,0xF43C,0x7F38,0xF1E4,0x7EF0,0xEF8D,0x7E9D,0xED38,0x7E3F,0xEAE4,
+0x7DD6,0xE892,0x7D63,0xE642,0x7CE4,0xE3F4,0x7C5A,0xE1A9,0x7BC6,0xDF61,0x7B27,
+0xDD1B,0x7A7D,0xDAD8,0x79C9,0xD898,0x790A,0xD65C,0x7840,0xD424,0x776C,0xD1EF,
+0x768E,0xCFBE,0x75A6,0xCD92,0x74B3,0xCB69,0x73B6,0xC946,0x72AF,0xC727,0x719E,
+0xC50D,0x7083,0xC2F8,0x6F5F,0xC0E9,0x6E31,0xBEDF,0x6CF9,0xBCDA,0x6BB8,0xBADC,
+0x6A6E,0xB8E3,0x691A,0xB6F1,0x67BD,0xB505,0x6657,0xB31F,0x64E9,0xB140,0x6371,
+0xAF68,0x61F1,0xAD97,0x6068,0xABCD,0x5ED7,0xAA0A,0x5D3E,0xA84F,0x5B9D,0xA69C,
+0x59F4,0xA4F0,0x5843,0xA34C,0x568A,0xA1B0,0x54CA,0xA01C,0x5303,0x9E91,0x5134,
+0x9D0E,0x4F5E,0x9B94,0x4D81,0x9A22,0x4B9E,0x98B9,0x49B4,0x9759,0x47C4,0x9603,
+0x45CD,0x94B5,0x43D1,0x9371,0x41CE,0x9236,0x3FC6,0x9105,0x3DB8,0x8FDD,0x3BA5,
+0x8EBF,0x398D,0x8DAB,0x3770,0x8CA1,0x354E,0x8BA0,0x3327,0x8AAA,0x30FC,0x89BE,
+0x2ECC,0x88DD,0x2C99,0x8805,0x2A62,0x8738,0x2827,0x8676,0x25E8,0x85BE,0x23A7,
+0x8511,0x2162,0x846E,0x1F1A,0x83D6,0x1CD0,0x8349,0x1A83,0x82C6,0x1833,0x824F,
+0x15E2,0x81E2,0x138F,0x8181,0x113A,0x812A,0x0EE4,0x80DE,0x0C8C,0x809E,0x0A33,
+0x8068,0x07D9,0x803E,0x057F,0x801E,0x0324,0x800A,0x00C9,0x8001,0xFE6E,0x8002,
+0xFC13,0x800F,0xF9B8,0x8027,0xF75E,0x804B,0xF505,0x8079,0xF2AC,0x80B2,0xF055,
+0x80F6,0xEDFF,0x8146,0xEBAB,0x81A0,0xE958,0x8205,0xE707,0x8276,0xE4B9,0x82F1,
+0xE26D,0x8377,0xE023,0x8407,0xDDDC,0x84A3,0xDB99,0x8549,0xD958,0x85FA,0xD71B,
+0x86B6,0xD4E1,0x877B,0xD2AB,0x884C,0xD079,0x8927,0xCE4B,0x8A0C,0xCC21,0x8AFB,
+0xC9FC,0x8BF5,0xC7DB,0x8CF8,0xC5C0,0x8E06,0xC3A9,0x8F1D,0xC198,0x903E,0xBF8C,
+0x9169,0xBD86,0x929E,0xBB85,0x93DC,0xB98B,0x9523,0xB796,0x9674,0xB5A8,0x97CE,
+0xB3C0,0x9930,0xB1DF,0x9A9C,0xB005,0x9C11,0xAE31,0x9D8E,0xAC65,0x9F14,0xAAA0,
+0xA0A2,0xA8E2,0xA238,0xA72C,0xA3D7,0xA57E,0xA57E,0xA3D7,0xA72C,0xA238,0xA8E2,
+0xA0A2,0xAAA0,0x9F14,0xAC65,0x9D8E,0xAE31,0x9C11,0xB005,0x9A9C,0xB1DF,0x9930,
+0xB3C0,0x97CE,0xB5A8,0x9674,0xB796,0x9523,0xB98B,0x93DC,0xBB85,0x929E,0xBD86,
+0x9169,0xBF8C,0x903E,0xC198,0x8F1D,0xC3A9,0x8E06,0xC5C0,0x8CF8,0xC7DB,0x8BF5,
+0xC9FC,0x8AFB,0xCC21,0x8A0C,0xCE4B,0x8927,0xD079,0x884C,0xD2AB,0x877B,0xD4E1,
+0x86B6,0xD71B,0x85FA,0xD958,0x8549,0xDB99,0x84A3,0xDDDC,0x8407,0xE023,0x8377,
+0xE26D,0x82F1,0xE4B9,0x8276,0xE707,0x8205,0xE958,0x81A0,0xEBAB,0x8146,0xEDFF,
+0x80F6,0xF055,0x80B2,0xF2AC,0x8079,0xF505,0x804B,0xF75E,0x8027,0xF9B8,0x800F,
+0xFC13,0x8002,0xFE6E,0x8001,0x00C9,0x800A,0x0324,0x801E,0x057F,0x803E,0x07D9,
+0x8068,0x0A33,0x809E,0x0C8C,0x80DE,0x0EE4,0x812A,0x113A,0x8181,0x138F,0x81E2,
+0x15E2,0x824F,0x1833,0x82C6,0x1A83,0x8349,0x1CD0,0x83D6,0x1F1A,0x846E,0x2162,
+0x8511,0x23A7,0x85BE,0x25E8,0x8676,0x2827,0x8738,0x2A62,0x8805,0x2C99,0x88DD,
+0x2ECC,0x89BE,0x30FC,0x8AAA,0x3327,0x8BA0,0x354E,0x8CA1,0x3770,0x8DAB,0x398D,
+0x8EBF,0x3BA5,0x8FDD,0x3DB8,0x9105,0x3FC6,0x9236,0x41CE,0x9371,0x43D1,0x94B5,
+0x45CD,0x9603,0x47C4,0x9759,0x49B4,0x98B9,0x4B9E,0x9A22,0x4D81,0x9B94,0x4F5E,
+0x9D0E,0x5134,0x9E91,0x5303,0xA01C,0x54CA,0xA1B0,0x568A,0xA34C,0x5843,0xA4F0,
+0x59F4,0xA69C,0x5B9D,0xA84F,0x5D3E,0xAA0A,0x5ED7,0xABCD,0x6068,0xAD97,0x61F1,
+0xAF68,0x6371,0xB140,0x64E9,0xB31F,0x6657,0xB505,0x67BD,0xB6F1,0x691A,0xB8E3,
+0x6A6E,0xBADC,0x6BB8,0xBCDA,0x6CF9,0xBEDF,0x6E31,0xC0E9,0x6F5F,0xC2F8,0x7083,
+0xC50D,0x719E,0xC727,0x72AF,0xC946,0x73B6,0xCB69,0x74B3,0xCD92,0x75A6,0xCFBE,
+0x768E,0xD1EF,0x776C,0xD424,0x7840,0xD65C,0x790A,0xD898,0x79C9,0xDAD8,0x7A7D,
+0xDD1B,0x7B27,0xDF61,0x7BC6,0xE1A9,0x7C5A,0xE3F4,0x7CE4,0xE642,0x7D63,0xE892,
+0x7DD6,0xEAE4,0x7E3F,0xED38,0x7E9D,0xEF8D,0x7EF0,0xF1E4,0x7F38,0xF43C,0x7F75,
+0xF695,0x7FA7,0xF8EF,0x7FCE,0xFB4A,0x7FEA,0xFDA5,0x7FFA,0x7FFF,0x0000,0x7FA7,
+0xF695,0x7E9D,0xED38,0x7CE4,0xE3F4,0x7A7D,0xDAD8,0x776C,0xD1EF,0x73B6,0xC946,
+0x6F5F,0xC0E9,0x6A6E,0xB8E3,0x64E9,0xB140,0x5ED7,0xAA0A,0x5843,0xA34C,0x5134,
+0x9D0E,0x49B4,0x9759,0x41CE,0x9236,0x398D,0x8DAB,0x30FC,0x89BE,0x2827,0x8676,
+0x1F1A,0x83D6,0x15E2,0x81E2,0x0C8C,0x809E,0x0324,0x800A,0xF9B8,0x8027,0xF055,
+0x80F6,0xE707,0x8276,0xDDDC,0x84A3,0xD4E1,0x877B,0xCC21,0x8AFB,0xC3A9,0x8F1D,
+0xBB85,0x93DC,0xB3C0,0x9930,0xAC65,0x9F14,0xA57E,0xA57E,0x9F14,0xAC65,0x9930,
+0xB3C0,0x93DC,0xBB85,0x8F1D,0xC3A9,0x8AFB,0xCC21,0x877B,0xD4E1,0x84A3,0xDDDC,
+0x8276,0xE707,0x80F6,0xF055,0x8027,0xF9B8,0x800A,0x0324,0x809E,0x0C8C,0x81E2,
+0x15E2,0x83D6,0x1F1A,0x8676,0x2827,0x89BE,0x30FC,0x8DAB,0x398D,0x9236,0x41CE,
+0x9759,0x49B4,0x9D0E,0x5134,0xA34C,0x5843,0xAA0A,0x5ED7,0xB140,0x64E9,0xB8E3,
+0x6A6E,0xC0E9,0x6F5F,0xC946,0x73B6,0xD1EF,0x776C,0xDAD8,0x7A7D,0xE3F4,0x7CE4,
+0xED38,0x7E9D,0xF695,0x7FA7,0x7FFF,0x0000,0x7A7D,0xDAD8,0x6A6E,0xB8E3,0x5134,
+0x9D0E,0x30FC,0x89BE,0x0C8C,0x809E,0xE707,0x8276,0xC3A9,0x8F1D,0xA57E,0xA57E,
+0x8F1D,0xC3A9,0x8276,0xE707,0x809E,0x0C8C,0x89BE,0x30FC,0x9D0E,0x5134,0xB8E3,
+0x6A6E,0xDAD8,0x7A7D,0x7FFF,0x0000,0x30FC,0x89BE,0xA57E,0xA57E,0x89BE,0x30FC,};
+
+#endif
+
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+#endif /* defined(ARM_MATH_MVEI)  */
+
diff --git a/Libraries/CMSIS/DSP/Source/CommonTables/arm_mve_tables_f16.c b/Libraries/CMSIS/DSP/Source/CommonTables/arm_mve_tables_f16.c
new file mode 100755
index 00000000..cd197e93
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/CommonTables/arm_mve_tables_f16.c
@@ -0,0 +1,5576 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mve_tables_f16.c
+ * Description:  common tables like fft twiddle factors, Bitreverse, reciprocal etc
+ *               used for MVE implementation only
+ *
+ * @version  V1.10.0
+ * @date     04 October 2021
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+ #include "arm_math_types_f16.h"
+
+ 
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_16) || defined(ARM_TABLE_TWIDDLECOEF_F16_32)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_16_f16[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_16_f16[2]={
+0,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_16_f16[2]={
+0,0,};
+
+float16_t rearranged_twiddle_stride1_16_f16[8]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,};
+
+float16_t rearranged_twiddle_stride2_16_f16[8]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,};
+
+float16_t rearranged_twiddle_stride3_16_f16[8]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_64) || defined(ARM_TABLE_TWIDDLECOEF_F16_128)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_64_f16[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_64_f16[3]={
+0,32,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_64_f16[3]={
+0,32,0,};
+
+float16_t rearranged_twiddle_stride1_64_f16[40]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,};
+
+float16_t rearranged_twiddle_stride2_64_f16[40]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,};
+
+float16_t rearranged_twiddle_stride3_64_f16[40]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_256) || defined(ARM_TABLE_TWIDDLECOEF_F16_512)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_256_f16[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_256_f16[4]={
+0,128,160,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_256_f16[4]={
+0,128,160,0,};
+
+float16_t rearranged_twiddle_stride1_256_f16[168]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,};
+
+float16_t rearranged_twiddle_stride2_256_f16[168]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)-0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)-0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)-0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)-0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)-0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,};
+
+float16_t rearranged_twiddle_stride3_256_f16[168]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f,
+(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f,
+(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f,
+(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f,
+(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f,
+(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f,
+(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f,
+(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f,
+(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f,
+(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f,
+(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_1024_f16[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_1024_f16[5]={
+0,512,640,672,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_1024_f16[5]={
+0,512,640,672,0,};
+
+float16_t rearranged_twiddle_stride1_1024_f16[680]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0061340332031f,
+(float16_t)1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9990234375000f,(float16_t)0.0429382324219f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9965820312500f,(float16_t)0.0797119140625f,
+(float16_t)0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9931640625000f,(float16_t)0.1163330078125f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9882812500000f,(float16_t)0.1528320312500f,
+(float16_t)0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9819335937500f,(float16_t)0.1890869140625f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9741210937500f,(float16_t)0.2250976562500f,
+(float16_t)0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9653320312500f,(float16_t)0.2607421875000f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9550781250000f,(float16_t)0.2961425781250f,
+(float16_t)0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9433593750000f,(float16_t)0.3310546875000f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9306640625000f,(float16_t)0.3657226562500f,
+(float16_t)0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9165039062500f,(float16_t)0.3996582031250f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.9013671875000f,(float16_t)0.4331054687500f,
+(float16_t)0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8847656250000f,(float16_t)0.4660644531250f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8671875000000f,(float16_t)0.4982910156250f,
+(float16_t)0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8481445312500f,(float16_t)0.5297851562500f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8281250000000f,(float16_t)0.5605468750000f,
+(float16_t)0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.8066406250000f,(float16_t)0.5908203125000f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7846679687500f,(float16_t)0.6201171875000f,
+(float16_t)0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7612304687500f,(float16_t)0.6484375000000f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7368164062500f,(float16_t)0.6762695312500f,
+(float16_t)0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7114257812500f,(float16_t)0.7026367187500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6850585937500f,(float16_t)0.7285156250000f,
+(float16_t)0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6577148437500f,(float16_t)0.7534179687500f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6293945312500f,(float16_t)0.7768554687500f,
+(float16_t)0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.6005859375000f,(float16_t)0.7993164062500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5708007812500f,(float16_t)0.8212890625000f,
+(float16_t)0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5400390625000f,(float16_t)0.8417968750000f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.5087890625000f,(float16_t)0.8608398437500f,
+(float16_t)0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4768066406250f,(float16_t)0.8789062500000f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4440917968750f,(float16_t)0.8959960937500f,
+(float16_t)0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.4108886718750f,(float16_t)0.9116210937500f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3769531250000f,(float16_t)0.9262695312500f,
+(float16_t)0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3427734375000f,(float16_t)0.9394531250000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.3078613281250f,(float16_t)0.9516601562500f,
+(float16_t)0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2727050781250f,(float16_t)0.9619140625000f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2370605468750f,(float16_t)0.9716796875000f,
+(float16_t)0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.2010498046875f,(float16_t)0.9794921875000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1649169921875f,(float16_t)0.9863281250000f,
+(float16_t)0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1285400390625f,(float16_t)0.9916992187500f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0919189453125f,(float16_t)0.9956054687500f,
+(float16_t)0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0552062988281f,(float16_t)0.9985351562500f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0184020996094f,(float16_t)1.0000000000000f,
+(float16_t)0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,};
+
+float16_t rearranged_twiddle_stride2_1024_f16[680]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)-0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)-0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)-0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)-0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)-0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)-0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)-0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)-0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)-0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)-0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)-0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)-0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)-0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)-0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)-0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)-0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)-0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)-0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)-0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)-0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)-0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)-0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)-0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)-0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)-0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)-0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)-0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)-0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)-0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)-0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)-0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)-0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)-0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)-0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)-0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)-0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)-0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)-0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)-0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)-0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)-0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)-0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)-0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)-0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)-0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)-0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)-0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)-0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)-0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)-0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)-0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)-0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)-0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)-0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)-0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)-0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)-0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)-0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)-0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)-0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)-0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)-0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)-0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)-0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)-0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)-0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)-0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)-0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)-0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)-0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)-0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)-0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)-0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)-0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)-1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)-0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)-0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)-0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)-0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)-0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,};
+
+float16_t rearranged_twiddle_stride3_1024_f16[680]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)-0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)-0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)-0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)-0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)-0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)-0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)-0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)-0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)-0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)-0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)-0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)-0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)-0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)-0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)-0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)-0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)-0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)-0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)-0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)-0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)-0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)-0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)-0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)-0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)-0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)-0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)-0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)-0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)-0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)-0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)-0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)-0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)-0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)-0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)-0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)-0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)-0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)-0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)-0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)-0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)-0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)-0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)-1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)-1.0000000000000f,(float16_t)-0.0061340332031f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f,
+(float16_t)-0.9990234375000f,(float16_t)-0.0429382324219f,
+(float16_t)-0.9980468750000f,(float16_t)-0.0613098144531f,
+(float16_t)-0.9965820312500f,(float16_t)-0.0797119140625f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9931640625000f,(float16_t)-0.1163330078125f,
+(float16_t)-0.9907226562500f,(float16_t)-0.1345214843750f,
+(float16_t)-0.9882812500000f,(float16_t)-0.1528320312500f,
+(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f,
+(float16_t)-0.9819335937500f,(float16_t)-0.1890869140625f,
+(float16_t)-0.9785156250000f,(float16_t)-0.2071533203125f,
+(float16_t)-0.9741210937500f,(float16_t)-0.2250976562500f,
+(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f,
+(float16_t)-0.9653320312500f,(float16_t)-0.2607421875000f,
+(float16_t)-0.9604492187500f,(float16_t)-0.2785644531250f,
+(float16_t)-0.9550781250000f,(float16_t)-0.2961425781250f,
+(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f,
+(float16_t)-0.9433593750000f,(float16_t)-0.3310546875000f,
+(float16_t)-0.9375000000000f,(float16_t)-0.3483886718750f,
+(float16_t)-0.9306640625000f,(float16_t)-0.3657226562500f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.9165039062500f,(float16_t)-0.3996582031250f,
+(float16_t)-0.9091796875000f,(float16_t)-0.4165039062500f,
+(float16_t)-0.9013671875000f,(float16_t)-0.4331054687500f,
+(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f,
+(float16_t)-0.8847656250000f,(float16_t)-0.4660644531250f,
+(float16_t)-0.8759765625000f,(float16_t)-0.4821777343750f,
+(float16_t)-0.8671875000000f,(float16_t)-0.4982910156250f,
+(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f,
+(float16_t)-0.8481445312500f,(float16_t)-0.5297851562500f,
+(float16_t)-0.8383789062500f,(float16_t)-0.5454101562500f,
+(float16_t)-0.8281250000000f,(float16_t)-0.5605468750000f,
+(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f,
+(float16_t)-0.8066406250000f,(float16_t)-0.5908203125000f,
+(float16_t)-0.7958984375000f,(float16_t)-0.6054687500000f,
+(float16_t)-0.7846679687500f,(float16_t)-0.6201171875000f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.7612304687500f,(float16_t)-0.6484375000000f,
+(float16_t)-0.7490234375000f,(float16_t)-0.6625976562500f,
+(float16_t)-0.7368164062500f,(float16_t)-0.6762695312500f,
+(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f,
+(float16_t)-0.7114257812500f,(float16_t)-0.7026367187500f,
+(float16_t)-0.6982421875000f,(float16_t)-0.7158203125000f,
+(float16_t)-0.6850585937500f,(float16_t)-0.7285156250000f,
+(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f,
+(float16_t)-0.6577148437500f,(float16_t)-0.7534179687500f,
+(float16_t)-0.6440429687500f,(float16_t)-0.7651367187500f,
+(float16_t)-0.6293945312500f,(float16_t)-0.7768554687500f,
+(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f,
+(float16_t)-0.6005859375000f,(float16_t)-0.7993164062500f,
+(float16_t)-0.5859375000000f,(float16_t)-0.8105468750000f,
+(float16_t)-0.5708007812500f,(float16_t)-0.8212890625000f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.5400390625000f,(float16_t)-0.8417968750000f,
+(float16_t)-0.5244140625000f,(float16_t)-0.8515625000000f,
+(float16_t)-0.5087890625000f,(float16_t)-0.8608398437500f,
+(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f,
+(float16_t)-0.4768066406250f,(float16_t)-0.8789062500000f,
+(float16_t)-0.4604492187500f,(float16_t)-0.8876953125000f,
+(float16_t)-0.4440917968750f,(float16_t)-0.8959960937500f,
+(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f,
+(float16_t)-0.4108886718750f,(float16_t)-0.9116210937500f,
+(float16_t)-0.3940429687500f,(float16_t)-0.9189453125000f,
+(float16_t)-0.3769531250000f,(float16_t)-0.9262695312500f,
+(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f,
+(float16_t)-0.3427734375000f,(float16_t)-0.9394531250000f,
+(float16_t)-0.3251953125000f,(float16_t)-0.9458007812500f,
+(float16_t)-0.3078613281250f,(float16_t)-0.9516601562500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)-0.2727050781250f,(float16_t)-0.9619140625000f,
+(float16_t)-0.2548828125000f,(float16_t)-0.9667968750000f,
+(float16_t)-0.2370605468750f,(float16_t)-0.9716796875000f,
+(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f,
+(float16_t)-0.2010498046875f,(float16_t)-0.9794921875000f,
+(float16_t)-0.1829833984375f,(float16_t)-0.9829101562500f,
+(float16_t)-0.1649169921875f,(float16_t)-0.9863281250000f,
+(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f,
+(float16_t)-0.1285400390625f,(float16_t)-0.9916992187500f,
+(float16_t)-0.1102294921875f,(float16_t)-0.9941406250000f,
+(float16_t)-0.0919189453125f,(float16_t)-0.9956054687500f,
+(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f,
+(float16_t)-0.0552062988281f,(float16_t)-0.9985351562500f,
+(float16_t)-0.0368041992188f,(float16_t)-0.9995117187500f,
+(float16_t)-0.0184020996094f,(float16_t)-1.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f,
+(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f,
+(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f,
+(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f,
+(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f,
+(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f,
+(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f,
+(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f,
+(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f,
+(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f,
+(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,};
+
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096) || defined(ARM_TABLE_TWIDDLECOEF_F16_8192)
+
+uint32_t rearranged_twiddle_tab_stride1_arr_4096_f16[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride2_arr_4096_f16[6]={
+0,2048,2560,2688,2720,0,};
+
+uint32_t rearranged_twiddle_tab_stride3_arr_4096_f16[6]={
+0,2048,2560,2688,2720,0,};
+
+float16_t rearranged_twiddle_stride1_4096_f16[2728]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0015335083008f,
+(float16_t)1.0000000000000f,(float16_t)0.0030670166016f,
+(float16_t)1.0000000000000f,(float16_t)0.0046005249023f,
+(float16_t)1.0000000000000f,(float16_t)0.0061340332031f,
+(float16_t)1.0000000000000f,(float16_t)0.0076713562012f,
+(float16_t)1.0000000000000f,(float16_t)0.0092010498047f,
+(float16_t)1.0000000000000f,(float16_t)0.0107345581055f,
+(float16_t)1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)1.0000000000000f,(float16_t)0.0138015747070f,
+(float16_t)1.0000000000000f,(float16_t)0.0153427124023f,
+(float16_t)1.0000000000000f,(float16_t)0.0168762207031f,
+(float16_t)1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)1.0000000000000f,(float16_t)0.0199432373047f,
+(float16_t)1.0000000000000f,(float16_t)0.0214691162109f,
+(float16_t)0.9995117187500f,(float16_t)0.0230102539062f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9995117187500f,(float16_t)0.0260772705078f,
+(float16_t)0.9995117187500f,(float16_t)0.0276031494141f,
+(float16_t)0.9995117187500f,(float16_t)0.0291442871094f,
+(float16_t)0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)0.9995117187500f,(float16_t)0.0321960449219f,
+(float16_t)0.9995117187500f,(float16_t)0.0337524414062f,
+(float16_t)0.9995117187500f,(float16_t)0.0352783203125f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9990234375000f,(float16_t)0.0383300781250f,
+(float16_t)0.9990234375000f,(float16_t)0.0398864746094f,
+(float16_t)0.9990234375000f,(float16_t)0.0414123535156f,
+(float16_t)0.9990234375000f,(float16_t)0.0429382324219f,
+(float16_t)0.9990234375000f,(float16_t)0.0444641113281f,
+(float16_t)0.9990234375000f,(float16_t)0.0459899902344f,
+(float16_t)0.9990234375000f,(float16_t)0.0475463867188f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9985351562500f,(float16_t)0.0505981445312f,
+(float16_t)0.9985351562500f,(float16_t)0.0521240234375f,
+(float16_t)0.9985351562500f,(float16_t)0.0536499023438f,
+(float16_t)0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)0.9985351562500f,(float16_t)0.0567321777344f,
+(float16_t)0.9985351562500f,(float16_t)0.0582580566406f,
+(float16_t)0.9980468750000f,(float16_t)0.0597839355469f,
+(float16_t)0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)0.9980468750000f,(float16_t)0.0628662109375f,
+(float16_t)0.9980468750000f,(float16_t)0.0643920898438f,
+(float16_t)0.9980468750000f,(float16_t)0.0659179687500f,
+(float16_t)0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)0.9975585937500f,(float16_t)0.0689697265625f,
+(float16_t)0.9975585937500f,(float16_t)0.0704956054688f,
+(float16_t)0.9975585937500f,(float16_t)0.0720214843750f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9970703125000f,(float16_t)0.0750732421875f,
+(float16_t)0.9970703125000f,(float16_t)0.0765991210938f,
+(float16_t)0.9970703125000f,(float16_t)0.0781250000000f,
+(float16_t)0.9965820312500f,(float16_t)0.0797119140625f,
+(float16_t)0.9965820312500f,(float16_t)0.0812377929688f,
+(float16_t)0.9965820312500f,(float16_t)0.0827636718750f,
+(float16_t)0.9965820312500f,(float16_t)0.0842895507812f,
+(float16_t)0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)0.9960937500000f,(float16_t)0.0873413085938f,
+(float16_t)0.9960937500000f,(float16_t)0.0888671875000f,
+(float16_t)0.9960937500000f,(float16_t)0.0903930664062f,
+(float16_t)0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)0.9956054687500f,(float16_t)0.0934448242188f,
+(float16_t)0.9956054687500f,(float16_t)0.0949707031250f,
+(float16_t)0.9951171875000f,(float16_t)0.0964965820312f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9951171875000f,(float16_t)0.0995483398438f,
+(float16_t)0.9951171875000f,(float16_t)0.1010742187500f,
+(float16_t)0.9946289062500f,(float16_t)0.1026000976562f,
+(float16_t)0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)0.9946289062500f,(float16_t)0.1056518554688f,
+(float16_t)0.9941406250000f,(float16_t)0.1071777343750f,
+(float16_t)0.9941406250000f,(float16_t)0.1087036132812f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9936523437500f,(float16_t)0.1117553710938f,
+(float16_t)0.9936523437500f,(float16_t)0.1132812500000f,
+(float16_t)0.9931640625000f,(float16_t)0.1148071289062f,
+(float16_t)0.9931640625000f,(float16_t)0.1163330078125f,
+(float16_t)0.9931640625000f,(float16_t)0.1178588867188f,
+(float16_t)0.9926757812500f,(float16_t)0.1193847656250f,
+(float16_t)0.9926757812500f,(float16_t)0.1209106445312f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9921875000000f,(float16_t)0.1239624023438f,
+(float16_t)0.9921875000000f,(float16_t)0.1254882812500f,
+(float16_t)0.9916992187500f,(float16_t)0.1269531250000f,
+(float16_t)0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)0.9916992187500f,(float16_t)0.1300048828125f,
+(float16_t)0.9912109375000f,(float16_t)0.1315917968750f,
+(float16_t)0.9912109375000f,(float16_t)0.1330566406250f,
+(float16_t)0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)0.9907226562500f,(float16_t)0.1361083984375f,
+(float16_t)0.9907226562500f,(float16_t)0.1375732421875f,
+(float16_t)0.9902343750000f,(float16_t)0.1391601562500f,
+(float16_t)0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)0.9897460937500f,(float16_t)0.1422119140625f,
+(float16_t)0.9897460937500f,(float16_t)0.1436767578125f,
+(float16_t)0.9892578125000f,(float16_t)0.1452636718750f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9887695312500f,(float16_t)0.1481933593750f,
+(float16_t)0.9887695312500f,(float16_t)0.1497802734375f,
+(float16_t)0.9882812500000f,(float16_t)0.1512451171875f,
+(float16_t)0.9882812500000f,(float16_t)0.1528320312500f,
+(float16_t)0.9877929687500f,(float16_t)0.1542968750000f,
+(float16_t)0.9877929687500f,(float16_t)0.1558837890625f,
+(float16_t)0.9873046875000f,(float16_t)0.1573486328125f,
+(float16_t)0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)0.9868164062500f,(float16_t)0.1604003906250f,
+(float16_t)0.9868164062500f,(float16_t)0.1618652343750f,
+(float16_t)0.9863281250000f,(float16_t)0.1634521484375f,
+(float16_t)0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)0.9858398437500f,(float16_t)0.1663818359375f,
+(float16_t)0.9858398437500f,(float16_t)0.1679687500000f,
+(float16_t)0.9853515625000f,(float16_t)0.1694335937500f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9848632812500f,(float16_t)0.1724853515625f,
+(float16_t)0.9848632812500f,(float16_t)0.1739501953125f,
+(float16_t)0.9843750000000f,(float16_t)0.1755371093750f,
+(float16_t)0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)0.9838867187500f,(float16_t)0.1784667968750f,
+(float16_t)0.9838867187500f,(float16_t)0.1800537109375f,
+(float16_t)0.9833984375000f,(float16_t)0.1815185546875f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9829101562500f,(float16_t)0.1845703125000f,
+(float16_t)0.9824218750000f,(float16_t)0.1860351562500f,
+(float16_t)0.9824218750000f,(float16_t)0.1876220703125f,
+(float16_t)0.9819335937500f,(float16_t)0.1890869140625f,
+(float16_t)0.9814453125000f,(float16_t)0.1905517578125f,
+(float16_t)0.9814453125000f,(float16_t)0.1921386718750f,
+(float16_t)0.9809570312500f,(float16_t)0.1936035156250f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9804687500000f,(float16_t)0.1966552734375f,
+(float16_t)0.9799804687500f,(float16_t)0.1981201171875f,
+(float16_t)0.9799804687500f,(float16_t)0.1995849609375f,
+(float16_t)0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)0.9794921875000f,(float16_t)0.2026367187500f,
+(float16_t)0.9790039062500f,(float16_t)0.2041015625000f,
+(float16_t)0.9785156250000f,(float16_t)0.2055664062500f,
+(float16_t)0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)0.9780273437500f,(float16_t)0.2086181640625f,
+(float16_t)0.9775390625000f,(float16_t)0.2100830078125f,
+(float16_t)0.9775390625000f,(float16_t)0.2116699218750f,
+(float16_t)0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)0.9765625000000f,(float16_t)0.2145996093750f,
+(float16_t)0.9765625000000f,(float16_t)0.2160644531250f,
+(float16_t)0.9760742187500f,(float16_t)0.2176513671875f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9755859375000f,(float16_t)0.2205810546875f,
+(float16_t)0.9750976562500f,(float16_t)0.2220458984375f,
+(float16_t)0.9746093750000f,(float16_t)0.2236328125000f,
+(float16_t)0.9741210937500f,(float16_t)0.2250976562500f,
+(float16_t)0.9741210937500f,(float16_t)0.2265625000000f,
+(float16_t)0.9736328125000f,(float16_t)0.2280273437500f,
+(float16_t)0.9731445312500f,(float16_t)0.2296142578125f,
+(float16_t)0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)0.9726562500000f,(float16_t)0.2325439453125f,
+(float16_t)0.9721679687500f,(float16_t)0.2340087890625f,
+(float16_t)0.9716796875000f,(float16_t)0.2354736328125f,
+(float16_t)0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)0.9711914062500f,(float16_t)0.2385253906250f,
+(float16_t)0.9707031250000f,(float16_t)0.2399902343750f,
+(float16_t)0.9702148437500f,(float16_t)0.2414550781250f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9697265625000f,(float16_t)0.2445068359375f,
+(float16_t)0.9692382812500f,(float16_t)0.2459716796875f,
+(float16_t)0.9687500000000f,(float16_t)0.2474365234375f,
+(float16_t)0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)0.9682617187500f,(float16_t)0.2504882812500f,
+(float16_t)0.9677734375000f,(float16_t)0.2519531250000f,
+(float16_t)0.9672851562500f,(float16_t)0.2534179687500f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9667968750000f,(float16_t)0.2563476562500f,
+(float16_t)0.9663085937500f,(float16_t)0.2578125000000f,
+(float16_t)0.9658203125000f,(float16_t)0.2592773437500f,
+(float16_t)0.9653320312500f,(float16_t)0.2607421875000f,
+(float16_t)0.9648437500000f,(float16_t)0.2622070312500f,
+(float16_t)0.9643554687500f,(float16_t)0.2636718750000f,
+(float16_t)0.9643554687500f,(float16_t)0.2651367187500f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9633789062500f,(float16_t)0.2683105468750f,
+(float16_t)0.9628906250000f,(float16_t)0.2697753906250f,
+(float16_t)0.9624023437500f,(float16_t)0.2712402343750f,
+(float16_t)0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)0.9619140625000f,(float16_t)0.2741699218750f,
+(float16_t)0.9614257812500f,(float16_t)0.2756347656250f,
+(float16_t)0.9609375000000f,(float16_t)0.2770996093750f,
+(float16_t)0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)0.9599609375000f,(float16_t)0.2800292968750f,
+(float16_t)0.9594726562500f,(float16_t)0.2814941406250f,
+(float16_t)0.9589843750000f,(float16_t)0.2829589843750f,
+(float16_t)0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)0.9584960937500f,(float16_t)0.2858886718750f,
+(float16_t)0.9580078125000f,(float16_t)0.2873535156250f,
+(float16_t)0.9575195312500f,(float16_t)0.2888183593750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9565429687500f,(float16_t)0.2917480468750f,
+(float16_t)0.9560546875000f,(float16_t)0.2932128906250f,
+(float16_t)0.9555664062500f,(float16_t)0.2946777343750f,
+(float16_t)0.9550781250000f,(float16_t)0.2961425781250f,
+(float16_t)0.9545898437500f,(float16_t)0.2976074218750f,
+(float16_t)0.9541015625000f,(float16_t)0.2990722656250f,
+(float16_t)0.9536132812500f,(float16_t)0.3005371093750f,
+(float16_t)0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)0.9526367187500f,(float16_t)0.3034667968750f,
+(float16_t)0.9521484375000f,(float16_t)0.3049316406250f,
+(float16_t)0.9521484375000f,(float16_t)0.3063964843750f,
+(float16_t)0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)0.9511718750000f,(float16_t)0.3093261718750f,
+(float16_t)0.9506835937500f,(float16_t)0.3107910156250f,
+(float16_t)0.9501953125000f,(float16_t)0.3122558593750f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9492187500000f,(float16_t)0.3151855468750f,
+(float16_t)0.9487304687500f,(float16_t)0.3166503906250f,
+(float16_t)0.9482421875000f,(float16_t)0.3181152343750f,
+(float16_t)0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)0.9472656250000f,(float16_t)0.3210449218750f,
+(float16_t)0.9467773437500f,(float16_t)0.3225097656250f,
+(float16_t)0.9462890625000f,(float16_t)0.3239746093750f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9453125000000f,(float16_t)0.3266601562500f,
+(float16_t)0.9448242187500f,(float16_t)0.3281250000000f,
+(float16_t)0.9443359375000f,(float16_t)0.3295898437500f,
+(float16_t)0.9433593750000f,(float16_t)0.3310546875000f,
+(float16_t)0.9428710937500f,(float16_t)0.3325195312500f,
+(float16_t)0.9423828125000f,(float16_t)0.3339843750000f,
+(float16_t)0.9418945312500f,(float16_t)0.3354492187500f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9409179687500f,(float16_t)0.3383789062500f,
+(float16_t)0.9404296875000f,(float16_t)0.3398437500000f,
+(float16_t)0.9399414062500f,(float16_t)0.3413085937500f,
+(float16_t)0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)0.9389648437500f,(float16_t)0.3439941406250f,
+(float16_t)0.9384765625000f,(float16_t)0.3454589843750f,
+(float16_t)0.9379882812500f,(float16_t)0.3469238281250f,
+(float16_t)0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)0.9370117187500f,(float16_t)0.3498535156250f,
+(float16_t)0.9360351562500f,(float16_t)0.3513183593750f,
+(float16_t)0.9355468750000f,(float16_t)0.3527832031250f,
+(float16_t)0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)0.9345703125000f,(float16_t)0.3557128906250f,
+(float16_t)0.9340820312500f,(float16_t)0.3569335937500f,
+(float16_t)0.9335937500000f,(float16_t)0.3583984375000f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9326171875000f,(float16_t)0.3613281250000f,
+(float16_t)0.9316406250000f,(float16_t)0.3627929687500f,
+(float16_t)0.9311523437500f,(float16_t)0.3642578125000f,
+(float16_t)0.9306640625000f,(float16_t)0.3657226562500f,
+(float16_t)0.9301757812500f,(float16_t)0.3669433593750f,
+(float16_t)0.9296875000000f,(float16_t)0.3684082031250f,
+(float16_t)0.9291992187500f,(float16_t)0.3698730468750f,
+(float16_t)0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)0.9277343750000f,(float16_t)0.3728027343750f,
+(float16_t)0.9272460937500f,(float16_t)0.3742675781250f,
+(float16_t)0.9267578125000f,(float16_t)0.3754882812500f,
+(float16_t)0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)0.9257812500000f,(float16_t)0.3784179687500f,
+(float16_t)0.9252929687500f,(float16_t)0.3798828125000f,
+(float16_t)0.9243164062500f,(float16_t)0.3813476562500f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9233398437500f,(float16_t)0.3840332031250f,
+(float16_t)0.9228515625000f,(float16_t)0.3854980468750f,
+(float16_t)0.9218750000000f,(float16_t)0.3869628906250f,
+(float16_t)0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)0.9208984375000f,(float16_t)0.3896484375000f,
+(float16_t)0.9204101562500f,(float16_t)0.3911132812500f,
+(float16_t)0.9199218750000f,(float16_t)0.3925781250000f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9184570312500f,(float16_t)0.3955078125000f,
+(float16_t)0.9179687500000f,(float16_t)0.3967285156250f,
+(float16_t)0.9174804687500f,(float16_t)0.3981933593750f,
+(float16_t)0.9165039062500f,(float16_t)0.3996582031250f,
+(float16_t)0.9160156250000f,(float16_t)0.4011230468750f,
+(float16_t)0.9155273437500f,(float16_t)0.4023437500000f,
+(float16_t)0.9150390625000f,(float16_t)0.4038085937500f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9135742187500f,(float16_t)0.4067382812500f,
+(float16_t)0.9130859375000f,(float16_t)0.4079589843750f,
+(float16_t)0.9121093750000f,(float16_t)0.4094238281250f,
+(float16_t)0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)0.9111328125000f,(float16_t)0.4123535156250f,
+(float16_t)0.9106445312500f,(float16_t)0.4135742187500f,
+(float16_t)0.9096679687500f,(float16_t)0.4150390625000f,
+(float16_t)0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)0.9086914062500f,(float16_t)0.4177246093750f,
+(float16_t)0.9077148437500f,(float16_t)0.4191894531250f,
+(float16_t)0.9072265625000f,(float16_t)0.4206542968750f,
+(float16_t)0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)0.9057617187500f,(float16_t)0.4233398437500f,
+(float16_t)0.9052734375000f,(float16_t)0.4248046875000f,
+(float16_t)0.9047851562500f,(float16_t)0.4262695312500f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.9033203125000f,(float16_t)0.4289550781250f,
+(float16_t)0.9028320312500f,(float16_t)0.4304199218750f,
+(float16_t)0.9018554687500f,(float16_t)0.4316406250000f,
+(float16_t)0.9013671875000f,(float16_t)0.4331054687500f,
+(float16_t)0.9008789062500f,(float16_t)0.4345703125000f,
+(float16_t)0.8999023437500f,(float16_t)0.4357910156250f,
+(float16_t)0.8994140625000f,(float16_t)0.4372558593750f,
+(float16_t)0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)0.8979492187500f,(float16_t)0.4399414062500f,
+(float16_t)0.8974609375000f,(float16_t)0.4414062500000f,
+(float16_t)0.8964843750000f,(float16_t)0.4426269531250f,
+(float16_t)0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)0.8955078125000f,(float16_t)0.4455566406250f,
+(float16_t)0.8945312500000f,(float16_t)0.4467773437500f,
+(float16_t)0.8940429687500f,(float16_t)0.4482421875000f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8925781250000f,(float16_t)0.4509277343750f,
+(float16_t)0.8916015625000f,(float16_t)0.4523925781250f,
+(float16_t)0.8911132812500f,(float16_t)0.4536132812500f,
+(float16_t)0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)0.8896484375000f,(float16_t)0.4565429687500f,
+(float16_t)0.8891601562500f,(float16_t)0.4577636718750f,
+(float16_t)0.8881835937500f,(float16_t)0.4592285156250f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8867187500000f,(float16_t)0.4619140625000f,
+(float16_t)0.8862304687500f,(float16_t)0.4633789062500f,
+(float16_t)0.8857421875000f,(float16_t)0.4645996093750f,
+(float16_t)0.8847656250000f,(float16_t)0.4660644531250f,
+(float16_t)0.8842773437500f,(float16_t)0.4672851562500f,
+(float16_t)0.8833007812500f,(float16_t)0.4687500000000f,
+(float16_t)0.8828125000000f,(float16_t)0.4699707031250f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8813476562500f,(float16_t)0.4726562500000f,
+(float16_t)0.8803710937500f,(float16_t)0.4741210937500f,
+(float16_t)0.8798828125000f,(float16_t)0.4753417968750f,
+(float16_t)0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)0.8784179687500f,(float16_t)0.4780273437500f,
+(float16_t)0.8774414062500f,(float16_t)0.4794921875000f,
+(float16_t)0.8769531250000f,(float16_t)0.4809570312500f,
+(float16_t)0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)0.8754882812500f,(float16_t)0.4836425781250f,
+(float16_t)0.8745117187500f,(float16_t)0.4848632812500f,
+(float16_t)0.8740234375000f,(float16_t)0.4863281250000f,
+(float16_t)0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)0.8725585937500f,(float16_t)0.4887695312500f,
+(float16_t)0.8715820312500f,(float16_t)0.4902343750000f,
+(float16_t)0.8706054687500f,(float16_t)0.4914550781250f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8691406250000f,(float16_t)0.4941406250000f,
+(float16_t)0.8686523437500f,(float16_t)0.4956054687500f,
+(float16_t)0.8676757812500f,(float16_t)0.4968261718750f,
+(float16_t)0.8671875000000f,(float16_t)0.4982910156250f,
+(float16_t)0.8662109375000f,(float16_t)0.4995117187500f,
+(float16_t)0.8657226562500f,(float16_t)0.5009765625000f,
+(float16_t)0.8647460937500f,(float16_t)0.5024414062500f,
+(float16_t)0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)0.8632812500000f,(float16_t)0.5048828125000f,
+(float16_t)0.8623046875000f,(float16_t)0.5063476562500f,
+(float16_t)0.8618164062500f,(float16_t)0.5073242187500f,
+(float16_t)0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)0.8598632812500f,(float16_t)0.5102539062500f,
+(float16_t)0.8593750000000f,(float16_t)0.5112304687500f,
+(float16_t)0.8583984375000f,(float16_t)0.5126953125000f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8569335937500f,(float16_t)0.5156250000000f,
+(float16_t)0.8559570312500f,(float16_t)0.5166015625000f,
+(float16_t)0.8554687500000f,(float16_t)0.5180664062500f,
+(float16_t)0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)0.8540039062500f,(float16_t)0.5205078125000f,
+(float16_t)0.8530273437500f,(float16_t)0.5219726562500f,
+(float16_t)0.8520507812500f,(float16_t)0.5234375000000f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8505859375000f,(float16_t)0.5258789062500f,
+(float16_t)0.8496093750000f,(float16_t)0.5273437500000f,
+(float16_t)0.8491210937500f,(float16_t)0.5283203125000f,
+(float16_t)0.8481445312500f,(float16_t)0.5297851562500f,
+(float16_t)0.8471679687500f,(float16_t)0.5312500000000f,
+(float16_t)0.8466796875000f,(float16_t)0.5322265625000f,
+(float16_t)0.8457031250000f,(float16_t)0.5336914062500f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8442382812500f,(float16_t)0.5361328125000f,
+(float16_t)0.8432617187500f,(float16_t)0.5375976562500f,
+(float16_t)0.8422851562500f,(float16_t)0.5390625000000f,
+(float16_t)0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)0.8408203125000f,(float16_t)0.5415039062500f,
+(float16_t)0.8398437500000f,(float16_t)0.5429687500000f,
+(float16_t)0.8388671875000f,(float16_t)0.5439453125000f,
+(float16_t)0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)0.8374023437500f,(float16_t)0.5463867187500f,
+(float16_t)0.8364257812500f,(float16_t)0.5478515625000f,
+(float16_t)0.8359375000000f,(float16_t)0.5493164062500f,
+(float16_t)0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)0.8339843750000f,(float16_t)0.5517578125000f,
+(float16_t)0.8330078125000f,(float16_t)0.5532226562500f,
+(float16_t)0.8325195312500f,(float16_t)0.5541992187500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8305664062500f,(float16_t)0.5566406250000f,
+(float16_t)0.8295898437500f,(float16_t)0.5581054687500f,
+(float16_t)0.8291015625000f,(float16_t)0.5595703125000f,
+(float16_t)0.8281250000000f,(float16_t)0.5605468750000f,
+(float16_t)0.8271484375000f,(float16_t)0.5620117187500f,
+(float16_t)0.8261718750000f,(float16_t)0.5629882812500f,
+(float16_t)0.8256835937500f,(float16_t)0.5644531250000f,
+(float16_t)0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)0.8237304687500f,(float16_t)0.5668945312500f,
+(float16_t)0.8227539062500f,(float16_t)0.5683593750000f,
+(float16_t)0.8217773437500f,(float16_t)0.5693359375000f,
+(float16_t)0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)0.8203125000000f,(float16_t)0.5722656250000f,
+(float16_t)0.8193359375000f,(float16_t)0.5732421875000f,
+(float16_t)0.8183593750000f,(float16_t)0.5747070312500f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8168945312500f,(float16_t)0.5771484375000f,
+(float16_t)0.8159179687500f,(float16_t)0.5781250000000f,
+(float16_t)0.8149414062500f,(float16_t)0.5795898437500f,
+(float16_t)0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)0.8129882812500f,(float16_t)0.5820312500000f,
+(float16_t)0.8120117187500f,(float16_t)0.5834960937500f,
+(float16_t)0.8115234375000f,(float16_t)0.5844726562500f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.8095703125000f,(float16_t)0.5869140625000f,
+(float16_t)0.8085937500000f,(float16_t)0.5883789062500f,
+(float16_t)0.8076171875000f,(float16_t)0.5893554687500f,
+(float16_t)0.8066406250000f,(float16_t)0.5908203125000f,
+(float16_t)0.8061523437500f,(float16_t)0.5917968750000f,
+(float16_t)0.8051757812500f,(float16_t)0.5932617187500f,
+(float16_t)0.8041992187500f,(float16_t)0.5942382812500f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.8022460937500f,(float16_t)0.5971679687500f,
+(float16_t)0.8012695312500f,(float16_t)0.5981445312500f,
+(float16_t)0.8002929687500f,(float16_t)0.5996093750000f,
+(float16_t)0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)0.7988281250000f,(float16_t)0.6020507812500f,
+(float16_t)0.7978515625000f,(float16_t)0.6030273437500f,
+(float16_t)0.7968750000000f,(float16_t)0.6044921875000f,
+(float16_t)0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)0.7949218750000f,(float16_t)0.6069335937500f,
+(float16_t)0.7939453125000f,(float16_t)0.6079101562500f,
+(float16_t)0.7929687500000f,(float16_t)0.6093750000000f,
+(float16_t)0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)0.7910156250000f,(float16_t)0.6118164062500f,
+(float16_t)0.7900390625000f,(float16_t)0.6127929687500f,
+(float16_t)0.7890625000000f,(float16_t)0.6142578125000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7875976562500f,(float16_t)0.6162109375000f,
+(float16_t)0.7866210937500f,(float16_t)0.6176757812500f,
+(float16_t)0.7856445312500f,(float16_t)0.6186523437500f,
+(float16_t)0.7846679687500f,(float16_t)0.6201171875000f,
+(float16_t)0.7836914062500f,(float16_t)0.6210937500000f,
+(float16_t)0.7827148437500f,(float16_t)0.6225585937500f,
+(float16_t)0.7817382812500f,(float16_t)0.6235351562500f,
+(float16_t)0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)0.7797851562500f,(float16_t)0.6259765625000f,
+(float16_t)0.7788085937500f,(float16_t)0.6274414062500f,
+(float16_t)0.7778320312500f,(float16_t)0.6284179687500f,
+(float16_t)0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)0.7758789062500f,(float16_t)0.6308593750000f,
+(float16_t)0.7749023437500f,(float16_t)0.6318359375000f,
+(float16_t)0.7739257812500f,(float16_t)0.6333007812500f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7719726562500f,(float16_t)0.6357421875000f,
+(float16_t)0.7709960937500f,(float16_t)0.6367187500000f,
+(float16_t)0.7700195312500f,(float16_t)0.6381835937500f,
+(float16_t)0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)0.7680664062500f,(float16_t)0.6401367187500f,
+(float16_t)0.7670898437500f,(float16_t)0.6416015625000f,
+(float16_t)0.7661132812500f,(float16_t)0.6425781250000f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7641601562500f,(float16_t)0.6450195312500f,
+(float16_t)0.7631835937500f,(float16_t)0.6459960937500f,
+(float16_t)0.7622070312500f,(float16_t)0.6474609375000f,
+(float16_t)0.7612304687500f,(float16_t)0.6484375000000f,
+(float16_t)0.7602539062500f,(float16_t)0.6499023437500f,
+(float16_t)0.7592773437500f,(float16_t)0.6508789062500f,
+(float16_t)0.7583007812500f,(float16_t)0.6518554687500f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7563476562500f,(float16_t)0.6542968750000f,
+(float16_t)0.7553710937500f,(float16_t)0.6552734375000f,
+(float16_t)0.7543945312500f,(float16_t)0.6567382812500f,
+(float16_t)0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)0.7519531250000f,(float16_t)0.6591796875000f,
+(float16_t)0.7509765625000f,(float16_t)0.6601562500000f,
+(float16_t)0.7500000000000f,(float16_t)0.6611328125000f,
+(float16_t)0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)0.7480468750000f,(float16_t)0.6635742187500f,
+(float16_t)0.7470703125000f,(float16_t)0.6645507812500f,
+(float16_t)0.7460937500000f,(float16_t)0.6660156250000f,
+(float16_t)0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)0.7441406250000f,(float16_t)0.6679687500000f,
+(float16_t)0.7431640625000f,(float16_t)0.6694335937500f,
+(float16_t)0.7421875000000f,(float16_t)0.6704101562500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7397460937500f,(float16_t)0.6728515625000f,
+(float16_t)0.7387695312500f,(float16_t)0.6738281250000f,
+(float16_t)0.7377929687500f,(float16_t)0.6748046875000f,
+(float16_t)0.7368164062500f,(float16_t)0.6762695312500f,
+(float16_t)0.7358398437500f,(float16_t)0.6772460937500f,
+(float16_t)0.7348632812500f,(float16_t)0.6782226562500f,
+(float16_t)0.7338867187500f,(float16_t)0.6796875000000f,
+(float16_t)0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)0.7314453125000f,(float16_t)0.6816406250000f,
+(float16_t)0.7304687500000f,(float16_t)0.6826171875000f,
+(float16_t)0.7294921875000f,(float16_t)0.6840820312500f,
+(float16_t)0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)0.7275390625000f,(float16_t)0.6860351562500f,
+(float16_t)0.7265625000000f,(float16_t)0.6875000000000f,
+(float16_t)0.7250976562500f,(float16_t)0.6884765625000f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7231445312500f,(float16_t)0.6904296875000f,
+(float16_t)0.7221679687500f,(float16_t)0.6918945312500f,
+(float16_t)0.7211914062500f,(float16_t)0.6928710937500f,
+(float16_t)0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)0.7187500000000f,(float16_t)0.6953125000000f,
+(float16_t)0.7177734375000f,(float16_t)0.6962890625000f,
+(float16_t)0.7167968750000f,(float16_t)0.6972656250000f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7148437500000f,(float16_t)0.6997070312500f,
+(float16_t)0.7133789062500f,(float16_t)0.7006835937500f,
+(float16_t)0.7124023437500f,(float16_t)0.7016601562500f,
+(float16_t)0.7114257812500f,(float16_t)0.7026367187500f,
+(float16_t)0.7104492187500f,(float16_t)0.7036132812500f,
+(float16_t)0.7094726562500f,(float16_t)0.7050781250000f,
+(float16_t)0.7080078125000f,(float16_t)0.7060546875000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.7060546875000f,(float16_t)0.7080078125000f,
+(float16_t)0.7050781250000f,(float16_t)0.7094726562500f,
+(float16_t)0.7036132812500f,(float16_t)0.7104492187500f,
+(float16_t)0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)0.7016601562500f,(float16_t)0.7124023437500f,
+(float16_t)0.7006835937500f,(float16_t)0.7133789062500f,
+(float16_t)0.6997070312500f,(float16_t)0.7148437500000f,
+(float16_t)0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)0.6972656250000f,(float16_t)0.7167968750000f,
+(float16_t)0.6962890625000f,(float16_t)0.7177734375000f,
+(float16_t)0.6953125000000f,(float16_t)0.7187500000000f,
+(float16_t)0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)0.6928710937500f,(float16_t)0.7211914062500f,
+(float16_t)0.6918945312500f,(float16_t)0.7221679687500f,
+(float16_t)0.6904296875000f,(float16_t)0.7231445312500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6884765625000f,(float16_t)0.7250976562500f,
+(float16_t)0.6875000000000f,(float16_t)0.7265625000000f,
+(float16_t)0.6860351562500f,(float16_t)0.7275390625000f,
+(float16_t)0.6850585937500f,(float16_t)0.7285156250000f,
+(float16_t)0.6840820312500f,(float16_t)0.7294921875000f,
+(float16_t)0.6826171875000f,(float16_t)0.7304687500000f,
+(float16_t)0.6816406250000f,(float16_t)0.7314453125000f,
+(float16_t)0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)0.6796875000000f,(float16_t)0.7338867187500f,
+(float16_t)0.6782226562500f,(float16_t)0.7348632812500f,
+(float16_t)0.6772460937500f,(float16_t)0.7358398437500f,
+(float16_t)0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)0.6748046875000f,(float16_t)0.7377929687500f,
+(float16_t)0.6738281250000f,(float16_t)0.7387695312500f,
+(float16_t)0.6728515625000f,(float16_t)0.7397460937500f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6704101562500f,(float16_t)0.7421875000000f,
+(float16_t)0.6694335937500f,(float16_t)0.7431640625000f,
+(float16_t)0.6679687500000f,(float16_t)0.7441406250000f,
+(float16_t)0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)0.6660156250000f,(float16_t)0.7460937500000f,
+(float16_t)0.6645507812500f,(float16_t)0.7470703125000f,
+(float16_t)0.6635742187500f,(float16_t)0.7480468750000f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6611328125000f,(float16_t)0.7500000000000f,
+(float16_t)0.6601562500000f,(float16_t)0.7509765625000f,
+(float16_t)0.6591796875000f,(float16_t)0.7519531250000f,
+(float16_t)0.6577148437500f,(float16_t)0.7534179687500f,
+(float16_t)0.6567382812500f,(float16_t)0.7543945312500f,
+(float16_t)0.6552734375000f,(float16_t)0.7553710937500f,
+(float16_t)0.6542968750000f,(float16_t)0.7563476562500f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6518554687500f,(float16_t)0.7583007812500f,
+(float16_t)0.6508789062500f,(float16_t)0.7592773437500f,
+(float16_t)0.6499023437500f,(float16_t)0.7602539062500f,
+(float16_t)0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)0.6474609375000f,(float16_t)0.7622070312500f,
+(float16_t)0.6459960937500f,(float16_t)0.7631835937500f,
+(float16_t)0.6450195312500f,(float16_t)0.7641601562500f,
+(float16_t)0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)0.6425781250000f,(float16_t)0.7661132812500f,
+(float16_t)0.6416015625000f,(float16_t)0.7670898437500f,
+(float16_t)0.6401367187500f,(float16_t)0.7680664062500f,
+(float16_t)0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)0.6381835937500f,(float16_t)0.7700195312500f,
+(float16_t)0.6367187500000f,(float16_t)0.7709960937500f,
+(float16_t)0.6357421875000f,(float16_t)0.7719726562500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6333007812500f,(float16_t)0.7739257812500f,
+(float16_t)0.6318359375000f,(float16_t)0.7749023437500f,
+(float16_t)0.6308593750000f,(float16_t)0.7758789062500f,
+(float16_t)0.6293945312500f,(float16_t)0.7768554687500f,
+(float16_t)0.6284179687500f,(float16_t)0.7778320312500f,
+(float16_t)0.6274414062500f,(float16_t)0.7788085937500f,
+(float16_t)0.6259765625000f,(float16_t)0.7797851562500f,
+(float16_t)0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)0.6235351562500f,(float16_t)0.7817382812500f,
+(float16_t)0.6225585937500f,(float16_t)0.7827148437500f,
+(float16_t)0.6210937500000f,(float16_t)0.7836914062500f,
+(float16_t)0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)0.6186523437500f,(float16_t)0.7856445312500f,
+(float16_t)0.6176757812500f,(float16_t)0.7866210937500f,
+(float16_t)0.6162109375000f,(float16_t)0.7875976562500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.6142578125000f,(float16_t)0.7890625000000f,
+(float16_t)0.6127929687500f,(float16_t)0.7900390625000f,
+(float16_t)0.6118164062500f,(float16_t)0.7910156250000f,
+(float16_t)0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)0.6093750000000f,(float16_t)0.7929687500000f,
+(float16_t)0.6079101562500f,(float16_t)0.7939453125000f,
+(float16_t)0.6069335937500f,(float16_t)0.7949218750000f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.6044921875000f,(float16_t)0.7968750000000f,
+(float16_t)0.6030273437500f,(float16_t)0.7978515625000f,
+(float16_t)0.6020507812500f,(float16_t)0.7988281250000f,
+(float16_t)0.6005859375000f,(float16_t)0.7993164062500f,
+(float16_t)0.5996093750000f,(float16_t)0.8002929687500f,
+(float16_t)0.5981445312500f,(float16_t)0.8012695312500f,
+(float16_t)0.5971679687500f,(float16_t)0.8022460937500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5942382812500f,(float16_t)0.8041992187500f,
+(float16_t)0.5932617187500f,(float16_t)0.8051757812500f,
+(float16_t)0.5917968750000f,(float16_t)0.8061523437500f,
+(float16_t)0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)0.5893554687500f,(float16_t)0.8076171875000f,
+(float16_t)0.5883789062500f,(float16_t)0.8085937500000f,
+(float16_t)0.5869140625000f,(float16_t)0.8095703125000f,
+(float16_t)0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)0.5844726562500f,(float16_t)0.8115234375000f,
+(float16_t)0.5834960937500f,(float16_t)0.8120117187500f,
+(float16_t)0.5820312500000f,(float16_t)0.8129882812500f,
+(float16_t)0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)0.5795898437500f,(float16_t)0.8149414062500f,
+(float16_t)0.5781250000000f,(float16_t)0.8159179687500f,
+(float16_t)0.5771484375000f,(float16_t)0.8168945312500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5747070312500f,(float16_t)0.8183593750000f,
+(float16_t)0.5732421875000f,(float16_t)0.8193359375000f,
+(float16_t)0.5722656250000f,(float16_t)0.8203125000000f,
+(float16_t)0.5708007812500f,(float16_t)0.8212890625000f,
+(float16_t)0.5693359375000f,(float16_t)0.8217773437500f,
+(float16_t)0.5683593750000f,(float16_t)0.8227539062500f,
+(float16_t)0.5668945312500f,(float16_t)0.8237304687500f,
+(float16_t)0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)0.5644531250000f,(float16_t)0.8256835937500f,
+(float16_t)0.5629882812500f,(float16_t)0.8261718750000f,
+(float16_t)0.5620117187500f,(float16_t)0.8271484375000f,
+(float16_t)0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)0.5595703125000f,(float16_t)0.8291015625000f,
+(float16_t)0.5581054687500f,(float16_t)0.8295898437500f,
+(float16_t)0.5566406250000f,(float16_t)0.8305664062500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5541992187500f,(float16_t)0.8325195312500f,
+(float16_t)0.5532226562500f,(float16_t)0.8330078125000f,
+(float16_t)0.5517578125000f,(float16_t)0.8339843750000f,
+(float16_t)0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)0.5493164062500f,(float16_t)0.8359375000000f,
+(float16_t)0.5478515625000f,(float16_t)0.8364257812500f,
+(float16_t)0.5463867187500f,(float16_t)0.8374023437500f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5439453125000f,(float16_t)0.8388671875000f,
+(float16_t)0.5429687500000f,(float16_t)0.8398437500000f,
+(float16_t)0.5415039062500f,(float16_t)0.8408203125000f,
+(float16_t)0.5400390625000f,(float16_t)0.8417968750000f,
+(float16_t)0.5390625000000f,(float16_t)0.8422851562500f,
+(float16_t)0.5375976562500f,(float16_t)0.8432617187500f,
+(float16_t)0.5361328125000f,(float16_t)0.8442382812500f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5336914062500f,(float16_t)0.8457031250000f,
+(float16_t)0.5322265625000f,(float16_t)0.8466796875000f,
+(float16_t)0.5312500000000f,(float16_t)0.8471679687500f,
+(float16_t)0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)0.5283203125000f,(float16_t)0.8491210937500f,
+(float16_t)0.5273437500000f,(float16_t)0.8496093750000f,
+(float16_t)0.5258789062500f,(float16_t)0.8505859375000f,
+(float16_t)0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)0.5234375000000f,(float16_t)0.8520507812500f,
+(float16_t)0.5219726562500f,(float16_t)0.8530273437500f,
+(float16_t)0.5205078125000f,(float16_t)0.8540039062500f,
+(float16_t)0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)0.5180664062500f,(float16_t)0.8554687500000f,
+(float16_t)0.5166015625000f,(float16_t)0.8559570312500f,
+(float16_t)0.5156250000000f,(float16_t)0.8569335937500f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.5126953125000f,(float16_t)0.8583984375000f,
+(float16_t)0.5112304687500f,(float16_t)0.8593750000000f,
+(float16_t)0.5102539062500f,(float16_t)0.8598632812500f,
+(float16_t)0.5087890625000f,(float16_t)0.8608398437500f,
+(float16_t)0.5073242187500f,(float16_t)0.8618164062500f,
+(float16_t)0.5063476562500f,(float16_t)0.8623046875000f,
+(float16_t)0.5048828125000f,(float16_t)0.8632812500000f,
+(float16_t)0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)0.5024414062500f,(float16_t)0.8647460937500f,
+(float16_t)0.5009765625000f,(float16_t)0.8657226562500f,
+(float16_t)0.4995117187500f,(float16_t)0.8662109375000f,
+(float16_t)0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)0.4968261718750f,(float16_t)0.8676757812500f,
+(float16_t)0.4956054687500f,(float16_t)0.8686523437500f,
+(float16_t)0.4941406250000f,(float16_t)0.8691406250000f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4914550781250f,(float16_t)0.8706054687500f,
+(float16_t)0.4902343750000f,(float16_t)0.8715820312500f,
+(float16_t)0.4887695312500f,(float16_t)0.8725585937500f,
+(float16_t)0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)0.4863281250000f,(float16_t)0.8740234375000f,
+(float16_t)0.4848632812500f,(float16_t)0.8745117187500f,
+(float16_t)0.4836425781250f,(float16_t)0.8754882812500f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4809570312500f,(float16_t)0.8769531250000f,
+(float16_t)0.4794921875000f,(float16_t)0.8774414062500f,
+(float16_t)0.4780273437500f,(float16_t)0.8784179687500f,
+(float16_t)0.4768066406250f,(float16_t)0.8789062500000f,
+(float16_t)0.4753417968750f,(float16_t)0.8798828125000f,
+(float16_t)0.4741210937500f,(float16_t)0.8803710937500f,
+(float16_t)0.4726562500000f,(float16_t)0.8813476562500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4699707031250f,(float16_t)0.8828125000000f,
+(float16_t)0.4687500000000f,(float16_t)0.8833007812500f,
+(float16_t)0.4672851562500f,(float16_t)0.8842773437500f,
+(float16_t)0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)0.4645996093750f,(float16_t)0.8857421875000f,
+(float16_t)0.4633789062500f,(float16_t)0.8862304687500f,
+(float16_t)0.4619140625000f,(float16_t)0.8867187500000f,
+(float16_t)0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)0.4592285156250f,(float16_t)0.8881835937500f,
+(float16_t)0.4577636718750f,(float16_t)0.8891601562500f,
+(float16_t)0.4565429687500f,(float16_t)0.8896484375000f,
+(float16_t)0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)0.4536132812500f,(float16_t)0.8911132812500f,
+(float16_t)0.4523925781250f,(float16_t)0.8916015625000f,
+(float16_t)0.4509277343750f,(float16_t)0.8925781250000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4482421875000f,(float16_t)0.8940429687500f,
+(float16_t)0.4467773437500f,(float16_t)0.8945312500000f,
+(float16_t)0.4455566406250f,(float16_t)0.8955078125000f,
+(float16_t)0.4440917968750f,(float16_t)0.8959960937500f,
+(float16_t)0.4426269531250f,(float16_t)0.8964843750000f,
+(float16_t)0.4414062500000f,(float16_t)0.8974609375000f,
+(float16_t)0.4399414062500f,(float16_t)0.8979492187500f,
+(float16_t)0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)0.4372558593750f,(float16_t)0.8994140625000f,
+(float16_t)0.4357910156250f,(float16_t)0.8999023437500f,
+(float16_t)0.4345703125000f,(float16_t)0.9008789062500f,
+(float16_t)0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)0.4316406250000f,(float16_t)0.9018554687500f,
+(float16_t)0.4304199218750f,(float16_t)0.9028320312500f,
+(float16_t)0.4289550781250f,(float16_t)0.9033203125000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4262695312500f,(float16_t)0.9047851562500f,
+(float16_t)0.4248046875000f,(float16_t)0.9052734375000f,
+(float16_t)0.4233398437500f,(float16_t)0.9057617187500f,
+(float16_t)0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)0.4206542968750f,(float16_t)0.9072265625000f,
+(float16_t)0.4191894531250f,(float16_t)0.9077148437500f,
+(float16_t)0.4177246093750f,(float16_t)0.9086914062500f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.4150390625000f,(float16_t)0.9096679687500f,
+(float16_t)0.4135742187500f,(float16_t)0.9106445312500f,
+(float16_t)0.4123535156250f,(float16_t)0.9111328125000f,
+(float16_t)0.4108886718750f,(float16_t)0.9116210937500f,
+(float16_t)0.4094238281250f,(float16_t)0.9121093750000f,
+(float16_t)0.4079589843750f,(float16_t)0.9130859375000f,
+(float16_t)0.4067382812500f,(float16_t)0.9135742187500f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.4038085937500f,(float16_t)0.9150390625000f,
+(float16_t)0.4023437500000f,(float16_t)0.9155273437500f,
+(float16_t)0.4011230468750f,(float16_t)0.9160156250000f,
+(float16_t)0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)0.3981933593750f,(float16_t)0.9174804687500f,
+(float16_t)0.3967285156250f,(float16_t)0.9179687500000f,
+(float16_t)0.3955078125000f,(float16_t)0.9184570312500f,
+(float16_t)0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)0.3925781250000f,(float16_t)0.9199218750000f,
+(float16_t)0.3911132812500f,(float16_t)0.9204101562500f,
+(float16_t)0.3896484375000f,(float16_t)0.9208984375000f,
+(float16_t)0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)0.3869628906250f,(float16_t)0.9218750000000f,
+(float16_t)0.3854980468750f,(float16_t)0.9228515625000f,
+(float16_t)0.3840332031250f,(float16_t)0.9233398437500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3813476562500f,(float16_t)0.9243164062500f,
+(float16_t)0.3798828125000f,(float16_t)0.9252929687500f,
+(float16_t)0.3784179687500f,(float16_t)0.9257812500000f,
+(float16_t)0.3769531250000f,(float16_t)0.9262695312500f,
+(float16_t)0.3754882812500f,(float16_t)0.9267578125000f,
+(float16_t)0.3742675781250f,(float16_t)0.9272460937500f,
+(float16_t)0.3728027343750f,(float16_t)0.9277343750000f,
+(float16_t)0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)0.3698730468750f,(float16_t)0.9291992187500f,
+(float16_t)0.3684082031250f,(float16_t)0.9296875000000f,
+(float16_t)0.3669433593750f,(float16_t)0.9301757812500f,
+(float16_t)0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)0.3642578125000f,(float16_t)0.9311523437500f,
+(float16_t)0.3627929687500f,(float16_t)0.9316406250000f,
+(float16_t)0.3613281250000f,(float16_t)0.9326171875000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3583984375000f,(float16_t)0.9335937500000f,
+(float16_t)0.3569335937500f,(float16_t)0.9340820312500f,
+(float16_t)0.3557128906250f,(float16_t)0.9345703125000f,
+(float16_t)0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)0.3527832031250f,(float16_t)0.9355468750000f,
+(float16_t)0.3513183593750f,(float16_t)0.9360351562500f,
+(float16_t)0.3498535156250f,(float16_t)0.9370117187500f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3469238281250f,(float16_t)0.9379882812500f,
+(float16_t)0.3454589843750f,(float16_t)0.9384765625000f,
+(float16_t)0.3439941406250f,(float16_t)0.9389648437500f,
+(float16_t)0.3427734375000f,(float16_t)0.9394531250000f,
+(float16_t)0.3413085937500f,(float16_t)0.9399414062500f,
+(float16_t)0.3398437500000f,(float16_t)0.9404296875000f,
+(float16_t)0.3383789062500f,(float16_t)0.9409179687500f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3354492187500f,(float16_t)0.9418945312500f,
+(float16_t)0.3339843750000f,(float16_t)0.9423828125000f,
+(float16_t)0.3325195312500f,(float16_t)0.9428710937500f,
+(float16_t)0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)0.3295898437500f,(float16_t)0.9443359375000f,
+(float16_t)0.3281250000000f,(float16_t)0.9448242187500f,
+(float16_t)0.3266601562500f,(float16_t)0.9453125000000f,
+(float16_t)0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)0.3239746093750f,(float16_t)0.9462890625000f,
+(float16_t)0.3225097656250f,(float16_t)0.9467773437500f,
+(float16_t)0.3210449218750f,(float16_t)0.9472656250000f,
+(float16_t)0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)0.3181152343750f,(float16_t)0.9482421875000f,
+(float16_t)0.3166503906250f,(float16_t)0.9487304687500f,
+(float16_t)0.3151855468750f,(float16_t)0.9492187500000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.3122558593750f,(float16_t)0.9501953125000f,
+(float16_t)0.3107910156250f,(float16_t)0.9506835937500f,
+(float16_t)0.3093261718750f,(float16_t)0.9511718750000f,
+(float16_t)0.3078613281250f,(float16_t)0.9516601562500f,
+(float16_t)0.3063964843750f,(float16_t)0.9521484375000f,
+(float16_t)0.3049316406250f,(float16_t)0.9521484375000f,
+(float16_t)0.3034667968750f,(float16_t)0.9526367187500f,
+(float16_t)0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)0.3005371093750f,(float16_t)0.9536132812500f,
+(float16_t)0.2990722656250f,(float16_t)0.9541015625000f,
+(float16_t)0.2976074218750f,(float16_t)0.9545898437500f,
+(float16_t)0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)0.2946777343750f,(float16_t)0.9555664062500f,
+(float16_t)0.2932128906250f,(float16_t)0.9560546875000f,
+(float16_t)0.2917480468750f,(float16_t)0.9565429687500f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2888183593750f,(float16_t)0.9575195312500f,
+(float16_t)0.2873535156250f,(float16_t)0.9580078125000f,
+(float16_t)0.2858886718750f,(float16_t)0.9584960937500f,
+(float16_t)0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)0.2829589843750f,(float16_t)0.9589843750000f,
+(float16_t)0.2814941406250f,(float16_t)0.9594726562500f,
+(float16_t)0.2800292968750f,(float16_t)0.9599609375000f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2770996093750f,(float16_t)0.9609375000000f,
+(float16_t)0.2756347656250f,(float16_t)0.9614257812500f,
+(float16_t)0.2741699218750f,(float16_t)0.9619140625000f,
+(float16_t)0.2727050781250f,(float16_t)0.9619140625000f,
+(float16_t)0.2712402343750f,(float16_t)0.9624023437500f,
+(float16_t)0.2697753906250f,(float16_t)0.9628906250000f,
+(float16_t)0.2683105468750f,(float16_t)0.9633789062500f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2651367187500f,(float16_t)0.9643554687500f,
+(float16_t)0.2636718750000f,(float16_t)0.9643554687500f,
+(float16_t)0.2622070312500f,(float16_t)0.9648437500000f,
+(float16_t)0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)0.2592773437500f,(float16_t)0.9658203125000f,
+(float16_t)0.2578125000000f,(float16_t)0.9663085937500f,
+(float16_t)0.2563476562500f,(float16_t)0.9667968750000f,
+(float16_t)0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)0.2534179687500f,(float16_t)0.9672851562500f,
+(float16_t)0.2519531250000f,(float16_t)0.9677734375000f,
+(float16_t)0.2504882812500f,(float16_t)0.9682617187500f,
+(float16_t)0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)0.2474365234375f,(float16_t)0.9687500000000f,
+(float16_t)0.2459716796875f,(float16_t)0.9692382812500f,
+(float16_t)0.2445068359375f,(float16_t)0.9697265625000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2414550781250f,(float16_t)0.9702148437500f,
+(float16_t)0.2399902343750f,(float16_t)0.9707031250000f,
+(float16_t)0.2385253906250f,(float16_t)0.9711914062500f,
+(float16_t)0.2370605468750f,(float16_t)0.9716796875000f,
+(float16_t)0.2354736328125f,(float16_t)0.9716796875000f,
+(float16_t)0.2340087890625f,(float16_t)0.9721679687500f,
+(float16_t)0.2325439453125f,(float16_t)0.9726562500000f,
+(float16_t)0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)0.2296142578125f,(float16_t)0.9731445312500f,
+(float16_t)0.2280273437500f,(float16_t)0.9736328125000f,
+(float16_t)0.2265625000000f,(float16_t)0.9741210937500f,
+(float16_t)0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)0.2236328125000f,(float16_t)0.9746093750000f,
+(float16_t)0.2220458984375f,(float16_t)0.9750976562500f,
+(float16_t)0.2205810546875f,(float16_t)0.9755859375000f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.2176513671875f,(float16_t)0.9760742187500f,
+(float16_t)0.2160644531250f,(float16_t)0.9765625000000f,
+(float16_t)0.2145996093750f,(float16_t)0.9765625000000f,
+(float16_t)0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)0.2116699218750f,(float16_t)0.9775390625000f,
+(float16_t)0.2100830078125f,(float16_t)0.9775390625000f,
+(float16_t)0.2086181640625f,(float16_t)0.9780273437500f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.2055664062500f,(float16_t)0.9785156250000f,
+(float16_t)0.2041015625000f,(float16_t)0.9790039062500f,
+(float16_t)0.2026367187500f,(float16_t)0.9794921875000f,
+(float16_t)0.2010498046875f,(float16_t)0.9794921875000f,
+(float16_t)0.1995849609375f,(float16_t)0.9799804687500f,
+(float16_t)0.1981201171875f,(float16_t)0.9799804687500f,
+(float16_t)0.1966552734375f,(float16_t)0.9804687500000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1936035156250f,(float16_t)0.9809570312500f,
+(float16_t)0.1921386718750f,(float16_t)0.9814453125000f,
+(float16_t)0.1905517578125f,(float16_t)0.9814453125000f,
+(float16_t)0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)0.1876220703125f,(float16_t)0.9824218750000f,
+(float16_t)0.1860351562500f,(float16_t)0.9824218750000f,
+(float16_t)0.1845703125000f,(float16_t)0.9829101562500f,
+(float16_t)0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)0.1815185546875f,(float16_t)0.9833984375000f,
+(float16_t)0.1800537109375f,(float16_t)0.9838867187500f,
+(float16_t)0.1784667968750f,(float16_t)0.9838867187500f,
+(float16_t)0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)0.1755371093750f,(float16_t)0.9843750000000f,
+(float16_t)0.1739501953125f,(float16_t)0.9848632812500f,
+(float16_t)0.1724853515625f,(float16_t)0.9848632812500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1694335937500f,(float16_t)0.9853515625000f,
+(float16_t)0.1679687500000f,(float16_t)0.9858398437500f,
+(float16_t)0.1663818359375f,(float16_t)0.9858398437500f,
+(float16_t)0.1649169921875f,(float16_t)0.9863281250000f,
+(float16_t)0.1634521484375f,(float16_t)0.9863281250000f,
+(float16_t)0.1618652343750f,(float16_t)0.9868164062500f,
+(float16_t)0.1604003906250f,(float16_t)0.9868164062500f,
+(float16_t)0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)0.1573486328125f,(float16_t)0.9873046875000f,
+(float16_t)0.1558837890625f,(float16_t)0.9877929687500f,
+(float16_t)0.1542968750000f,(float16_t)0.9877929687500f,
+(float16_t)0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)0.1512451171875f,(float16_t)0.9882812500000f,
+(float16_t)0.1497802734375f,(float16_t)0.9887695312500f,
+(float16_t)0.1481933593750f,(float16_t)0.9887695312500f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1452636718750f,(float16_t)0.9892578125000f,
+(float16_t)0.1436767578125f,(float16_t)0.9897460937500f,
+(float16_t)0.1422119140625f,(float16_t)0.9897460937500f,
+(float16_t)0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)0.1391601562500f,(float16_t)0.9902343750000f,
+(float16_t)0.1375732421875f,(float16_t)0.9907226562500f,
+(float16_t)0.1361083984375f,(float16_t)0.9907226562500f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1330566406250f,(float16_t)0.9912109375000f,
+(float16_t)0.1315917968750f,(float16_t)0.9912109375000f,
+(float16_t)0.1300048828125f,(float16_t)0.9916992187500f,
+(float16_t)0.1285400390625f,(float16_t)0.9916992187500f,
+(float16_t)0.1269531250000f,(float16_t)0.9916992187500f,
+(float16_t)0.1254882812500f,(float16_t)0.9921875000000f,
+(float16_t)0.1239624023438f,(float16_t)0.9921875000000f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.1209106445312f,(float16_t)0.9926757812500f,
+(float16_t)0.1193847656250f,(float16_t)0.9926757812500f,
+(float16_t)0.1178588867188f,(float16_t)0.9931640625000f,
+(float16_t)0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)0.1148071289062f,(float16_t)0.9931640625000f,
+(float16_t)0.1132812500000f,(float16_t)0.9936523437500f,
+(float16_t)0.1117553710938f,(float16_t)0.9936523437500f,
+(float16_t)0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)0.1087036132812f,(float16_t)0.9941406250000f,
+(float16_t)0.1071777343750f,(float16_t)0.9941406250000f,
+(float16_t)0.1056518554688f,(float16_t)0.9946289062500f,
+(float16_t)0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)0.1026000976562f,(float16_t)0.9946289062500f,
+(float16_t)0.1010742187500f,(float16_t)0.9951171875000f,
+(float16_t)0.0995483398438f,(float16_t)0.9951171875000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0964965820312f,(float16_t)0.9951171875000f,
+(float16_t)0.0949707031250f,(float16_t)0.9956054687500f,
+(float16_t)0.0934448242188f,(float16_t)0.9956054687500f,
+(float16_t)0.0919189453125f,(float16_t)0.9956054687500f,
+(float16_t)0.0903930664062f,(float16_t)0.9960937500000f,
+(float16_t)0.0888671875000f,(float16_t)0.9960937500000f,
+(float16_t)0.0873413085938f,(float16_t)0.9960937500000f,
+(float16_t)0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)0.0842895507812f,(float16_t)0.9965820312500f,
+(float16_t)0.0827636718750f,(float16_t)0.9965820312500f,
+(float16_t)0.0812377929688f,(float16_t)0.9965820312500f,
+(float16_t)0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)0.0781250000000f,(float16_t)0.9970703125000f,
+(float16_t)0.0765991210938f,(float16_t)0.9970703125000f,
+(float16_t)0.0750732421875f,(float16_t)0.9970703125000f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0720214843750f,(float16_t)0.9975585937500f,
+(float16_t)0.0704956054688f,(float16_t)0.9975585937500f,
+(float16_t)0.0689697265625f,(float16_t)0.9975585937500f,
+(float16_t)0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)0.0659179687500f,(float16_t)0.9980468750000f,
+(float16_t)0.0643920898438f,(float16_t)0.9980468750000f,
+(float16_t)0.0628662109375f,(float16_t)0.9980468750000f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0597839355469f,(float16_t)0.9980468750000f,
+(float16_t)0.0582580566406f,(float16_t)0.9985351562500f,
+(float16_t)0.0567321777344f,(float16_t)0.9985351562500f,
+(float16_t)0.0552062988281f,(float16_t)0.9985351562500f,
+(float16_t)0.0536499023438f,(float16_t)0.9985351562500f,
+(float16_t)0.0521240234375f,(float16_t)0.9985351562500f,
+(float16_t)0.0505981445312f,(float16_t)0.9985351562500f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0475463867188f,(float16_t)0.9990234375000f,
+(float16_t)0.0459899902344f,(float16_t)0.9990234375000f,
+(float16_t)0.0444641113281f,(float16_t)0.9990234375000f,
+(float16_t)0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)0.0414123535156f,(float16_t)0.9990234375000f,
+(float16_t)0.0398864746094f,(float16_t)0.9990234375000f,
+(float16_t)0.0383300781250f,(float16_t)0.9990234375000f,
+(float16_t)0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)0.0352783203125f,(float16_t)0.9995117187500f,
+(float16_t)0.0337524414062f,(float16_t)0.9995117187500f,
+(float16_t)0.0321960449219f,(float16_t)0.9995117187500f,
+(float16_t)0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)0.0291442871094f,(float16_t)0.9995117187500f,
+(float16_t)0.0276031494141f,(float16_t)0.9995117187500f,
+(float16_t)0.0260772705078f,(float16_t)0.9995117187500f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0230102539062f,(float16_t)0.9995117187500f,
+(float16_t)0.0214691162109f,(float16_t)1.0000000000000f,
+(float16_t)0.0199432373047f,(float16_t)1.0000000000000f,
+(float16_t)0.0184020996094f,(float16_t)1.0000000000000f,
+(float16_t)0.0168762207031f,(float16_t)1.0000000000000f,
+(float16_t)0.0153427124023f,(float16_t)1.0000000000000f,
+(float16_t)0.0138015747070f,(float16_t)1.0000000000000f,
+(float16_t)0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)0.0107345581055f,(float16_t)1.0000000000000f,
+(float16_t)0.0092010498047f,(float16_t)1.0000000000000f,
+(float16_t)0.0076713562012f,(float16_t)1.0000000000000f,
+(float16_t)0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)0.0046005249023f,(float16_t)1.0000000000000f,
+(float16_t)0.0030670166016f,(float16_t)1.0000000000000f,
+(float16_t)0.0015335083008f,(float16_t)1.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0061340332031f,
+(float16_t)1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9990234375000f,(float16_t)0.0429382324219f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9965820312500f,(float16_t)0.0797119140625f,
+(float16_t)0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9931640625000f,(float16_t)0.1163330078125f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9882812500000f,(float16_t)0.1528320312500f,
+(float16_t)0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9819335937500f,(float16_t)0.1890869140625f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9741210937500f,(float16_t)0.2250976562500f,
+(float16_t)0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9653320312500f,(float16_t)0.2607421875000f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9550781250000f,(float16_t)0.2961425781250f,
+(float16_t)0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9433593750000f,(float16_t)0.3310546875000f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9306640625000f,(float16_t)0.3657226562500f,
+(float16_t)0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9165039062500f,(float16_t)0.3996582031250f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.9013671875000f,(float16_t)0.4331054687500f,
+(float16_t)0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8847656250000f,(float16_t)0.4660644531250f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8671875000000f,(float16_t)0.4982910156250f,
+(float16_t)0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8481445312500f,(float16_t)0.5297851562500f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8281250000000f,(float16_t)0.5605468750000f,
+(float16_t)0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.8066406250000f,(float16_t)0.5908203125000f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7846679687500f,(float16_t)0.6201171875000f,
+(float16_t)0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7612304687500f,(float16_t)0.6484375000000f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7368164062500f,(float16_t)0.6762695312500f,
+(float16_t)0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7114257812500f,(float16_t)0.7026367187500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6850585937500f,(float16_t)0.7285156250000f,
+(float16_t)0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6577148437500f,(float16_t)0.7534179687500f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6293945312500f,(float16_t)0.7768554687500f,
+(float16_t)0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.6005859375000f,(float16_t)0.7993164062500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5708007812500f,(float16_t)0.8212890625000f,
+(float16_t)0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5400390625000f,(float16_t)0.8417968750000f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.5087890625000f,(float16_t)0.8608398437500f,
+(float16_t)0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4768066406250f,(float16_t)0.8789062500000f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4440917968750f,(float16_t)0.8959960937500f,
+(float16_t)0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.4108886718750f,(float16_t)0.9116210937500f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3769531250000f,(float16_t)0.9262695312500f,
+(float16_t)0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3427734375000f,(float16_t)0.9394531250000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.3078613281250f,(float16_t)0.9516601562500f,
+(float16_t)0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2727050781250f,(float16_t)0.9619140625000f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2370605468750f,(float16_t)0.9716796875000f,
+(float16_t)0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.2010498046875f,(float16_t)0.9794921875000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1649169921875f,(float16_t)0.9863281250000f,
+(float16_t)0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1285400390625f,(float16_t)0.9916992187500f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0919189453125f,(float16_t)0.9956054687500f,
+(float16_t)0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0552062988281f,(float16_t)0.9985351562500f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0184020996094f,(float16_t)1.0000000000000f,
+(float16_t)0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,};
+
+float16_t rearranged_twiddle_stride2_4096_f16[2728]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0030670166016f,
+(float16_t)1.0000000000000f,(float16_t)0.0061340332031f,
+(float16_t)1.0000000000000f,(float16_t)0.0092010498047f,
+(float16_t)1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)1.0000000000000f,(float16_t)0.0153427124023f,
+(float16_t)1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)1.0000000000000f,(float16_t)0.0214691162109f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9995117187500f,(float16_t)0.0276031494141f,
+(float16_t)0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)0.9995117187500f,(float16_t)0.0337524414062f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9990234375000f,(float16_t)0.0398864746094f,
+(float16_t)0.9990234375000f,(float16_t)0.0429382324219f,
+(float16_t)0.9990234375000f,(float16_t)0.0459899902344f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9985351562500f,(float16_t)0.0521240234375f,
+(float16_t)0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)0.9985351562500f,(float16_t)0.0582580566406f,
+(float16_t)0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)0.9980468750000f,(float16_t)0.0643920898438f,
+(float16_t)0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)0.9975585937500f,(float16_t)0.0704956054688f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9970703125000f,(float16_t)0.0765991210938f,
+(float16_t)0.9965820312500f,(float16_t)0.0797119140625f,
+(float16_t)0.9965820312500f,(float16_t)0.0827636718750f,
+(float16_t)0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)0.9960937500000f,(float16_t)0.0888671875000f,
+(float16_t)0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)0.9956054687500f,(float16_t)0.0949707031250f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9951171875000f,(float16_t)0.1010742187500f,
+(float16_t)0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)0.9941406250000f,(float16_t)0.1071777343750f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9936523437500f,(float16_t)0.1132812500000f,
+(float16_t)0.9931640625000f,(float16_t)0.1163330078125f,
+(float16_t)0.9926757812500f,(float16_t)0.1193847656250f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9921875000000f,(float16_t)0.1254882812500f,
+(float16_t)0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)0.9912109375000f,(float16_t)0.1315917968750f,
+(float16_t)0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)0.9907226562500f,(float16_t)0.1375732421875f,
+(float16_t)0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)0.9897460937500f,(float16_t)0.1436767578125f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9887695312500f,(float16_t)0.1497802734375f,
+(float16_t)0.9882812500000f,(float16_t)0.1528320312500f,
+(float16_t)0.9877929687500f,(float16_t)0.1558837890625f,
+(float16_t)0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)0.9868164062500f,(float16_t)0.1618652343750f,
+(float16_t)0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)0.9858398437500f,(float16_t)0.1679687500000f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9848632812500f,(float16_t)0.1739501953125f,
+(float16_t)0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)0.9838867187500f,(float16_t)0.1800537109375f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9824218750000f,(float16_t)0.1860351562500f,
+(float16_t)0.9819335937500f,(float16_t)0.1890869140625f,
+(float16_t)0.9814453125000f,(float16_t)0.1921386718750f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9799804687500f,(float16_t)0.1981201171875f,
+(float16_t)0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)0.9790039062500f,(float16_t)0.2041015625000f,
+(float16_t)0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)0.9775390625000f,(float16_t)0.2100830078125f,
+(float16_t)0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)0.9765625000000f,(float16_t)0.2160644531250f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9750976562500f,(float16_t)0.2220458984375f,
+(float16_t)0.9741210937500f,(float16_t)0.2250976562500f,
+(float16_t)0.9736328125000f,(float16_t)0.2280273437500f,
+(float16_t)0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)0.9721679687500f,(float16_t)0.2340087890625f,
+(float16_t)0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)0.9707031250000f,(float16_t)0.2399902343750f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9692382812500f,(float16_t)0.2459716796875f,
+(float16_t)0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)0.9677734375000f,(float16_t)0.2519531250000f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9663085937500f,(float16_t)0.2578125000000f,
+(float16_t)0.9653320312500f,(float16_t)0.2607421875000f,
+(float16_t)0.9643554687500f,(float16_t)0.2636718750000f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9628906250000f,(float16_t)0.2697753906250f,
+(float16_t)0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)0.9614257812500f,(float16_t)0.2756347656250f,
+(float16_t)0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)0.9594726562500f,(float16_t)0.2814941406250f,
+(float16_t)0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)0.9580078125000f,(float16_t)0.2873535156250f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9560546875000f,(float16_t)0.2932128906250f,
+(float16_t)0.9550781250000f,(float16_t)0.2961425781250f,
+(float16_t)0.9541015625000f,(float16_t)0.2990722656250f,
+(float16_t)0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)0.9521484375000f,(float16_t)0.3049316406250f,
+(float16_t)0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)0.9506835937500f,(float16_t)0.3107910156250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9487304687500f,(float16_t)0.3166503906250f,
+(float16_t)0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)0.9467773437500f,(float16_t)0.3225097656250f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9448242187500f,(float16_t)0.3281250000000f,
+(float16_t)0.9433593750000f,(float16_t)0.3310546875000f,
+(float16_t)0.9423828125000f,(float16_t)0.3339843750000f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9404296875000f,(float16_t)0.3398437500000f,
+(float16_t)0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)0.9384765625000f,(float16_t)0.3454589843750f,
+(float16_t)0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)0.9360351562500f,(float16_t)0.3513183593750f,
+(float16_t)0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)0.9340820312500f,(float16_t)0.3569335937500f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9316406250000f,(float16_t)0.3627929687500f,
+(float16_t)0.9306640625000f,(float16_t)0.3657226562500f,
+(float16_t)0.9296875000000f,(float16_t)0.3684082031250f,
+(float16_t)0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)0.9272460937500f,(float16_t)0.3742675781250f,
+(float16_t)0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)0.9252929687500f,(float16_t)0.3798828125000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9228515625000f,(float16_t)0.3854980468750f,
+(float16_t)0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)0.9204101562500f,(float16_t)0.3911132812500f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9179687500000f,(float16_t)0.3967285156250f,
+(float16_t)0.9165039062500f,(float16_t)0.3996582031250f,
+(float16_t)0.9155273437500f,(float16_t)0.4023437500000f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9130859375000f,(float16_t)0.4079589843750f,
+(float16_t)0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)0.9106445312500f,(float16_t)0.4135742187500f,
+(float16_t)0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)0.9077148437500f,(float16_t)0.4191894531250f,
+(float16_t)0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)0.9052734375000f,(float16_t)0.4248046875000f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.9028320312500f,(float16_t)0.4304199218750f,
+(float16_t)0.9013671875000f,(float16_t)0.4331054687500f,
+(float16_t)0.8999023437500f,(float16_t)0.4357910156250f,
+(float16_t)0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)0.8974609375000f,(float16_t)0.4414062500000f,
+(float16_t)0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)0.8945312500000f,(float16_t)0.4467773437500f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8916015625000f,(float16_t)0.4523925781250f,
+(float16_t)0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)0.8891601562500f,(float16_t)0.4577636718750f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8862304687500f,(float16_t)0.4633789062500f,
+(float16_t)0.8847656250000f,(float16_t)0.4660644531250f,
+(float16_t)0.8833007812500f,(float16_t)0.4687500000000f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8803710937500f,(float16_t)0.4741210937500f,
+(float16_t)0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)0.8774414062500f,(float16_t)0.4794921875000f,
+(float16_t)0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)0.8745117187500f,(float16_t)0.4848632812500f,
+(float16_t)0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)0.8715820312500f,(float16_t)0.4902343750000f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8686523437500f,(float16_t)0.4956054687500f,
+(float16_t)0.8671875000000f,(float16_t)0.4982910156250f,
+(float16_t)0.8657226562500f,(float16_t)0.5009765625000f,
+(float16_t)0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)0.8623046875000f,(float16_t)0.5063476562500f,
+(float16_t)0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)0.8593750000000f,(float16_t)0.5112304687500f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8559570312500f,(float16_t)0.5166015625000f,
+(float16_t)0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)0.8530273437500f,(float16_t)0.5219726562500f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8496093750000f,(float16_t)0.5273437500000f,
+(float16_t)0.8481445312500f,(float16_t)0.5297851562500f,
+(float16_t)0.8466796875000f,(float16_t)0.5322265625000f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8432617187500f,(float16_t)0.5375976562500f,
+(float16_t)0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)0.8398437500000f,(float16_t)0.5429687500000f,
+(float16_t)0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)0.8364257812500f,(float16_t)0.5478515625000f,
+(float16_t)0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)0.8330078125000f,(float16_t)0.5532226562500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8295898437500f,(float16_t)0.5581054687500f,
+(float16_t)0.8281250000000f,(float16_t)0.5605468750000f,
+(float16_t)0.8261718750000f,(float16_t)0.5629882812500f,
+(float16_t)0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)0.8227539062500f,(float16_t)0.5683593750000f,
+(float16_t)0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)0.8193359375000f,(float16_t)0.5732421875000f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8159179687500f,(float16_t)0.5781250000000f,
+(float16_t)0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)0.8120117187500f,(float16_t)0.5834960937500f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.8085937500000f,(float16_t)0.5883789062500f,
+(float16_t)0.8066406250000f,(float16_t)0.5908203125000f,
+(float16_t)0.8051757812500f,(float16_t)0.5932617187500f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.8012695312500f,(float16_t)0.5981445312500f,
+(float16_t)0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)0.7978515625000f,(float16_t)0.6030273437500f,
+(float16_t)0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)0.7939453125000f,(float16_t)0.6079101562500f,
+(float16_t)0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)0.7900390625000f,(float16_t)0.6127929687500f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7866210937500f,(float16_t)0.6176757812500f,
+(float16_t)0.7846679687500f,(float16_t)0.6201171875000f,
+(float16_t)0.7827148437500f,(float16_t)0.6225585937500f,
+(float16_t)0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)0.7788085937500f,(float16_t)0.6274414062500f,
+(float16_t)0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)0.7749023437500f,(float16_t)0.6318359375000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7709960937500f,(float16_t)0.6367187500000f,
+(float16_t)0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)0.7670898437500f,(float16_t)0.6416015625000f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7631835937500f,(float16_t)0.6459960937500f,
+(float16_t)0.7612304687500f,(float16_t)0.6484375000000f,
+(float16_t)0.7592773437500f,(float16_t)0.6508789062500f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7553710937500f,(float16_t)0.6552734375000f,
+(float16_t)0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)0.7509765625000f,(float16_t)0.6601562500000f,
+(float16_t)0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)0.7470703125000f,(float16_t)0.6645507812500f,
+(float16_t)0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)0.7431640625000f,(float16_t)0.6694335937500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7387695312500f,(float16_t)0.6738281250000f,
+(float16_t)0.7368164062500f,(float16_t)0.6762695312500f,
+(float16_t)0.7348632812500f,(float16_t)0.6782226562500f,
+(float16_t)0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)0.7304687500000f,(float16_t)0.6826171875000f,
+(float16_t)0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)0.7265625000000f,(float16_t)0.6875000000000f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7221679687500f,(float16_t)0.6918945312500f,
+(float16_t)0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)0.7177734375000f,(float16_t)0.6962890625000f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7133789062500f,(float16_t)0.7006835937500f,
+(float16_t)0.7114257812500f,(float16_t)0.7026367187500f,
+(float16_t)0.7094726562500f,(float16_t)0.7050781250000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.7050781250000f,(float16_t)0.7094726562500f,
+(float16_t)0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)0.7006835937500f,(float16_t)0.7133789062500f,
+(float16_t)0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)0.6962890625000f,(float16_t)0.7177734375000f,
+(float16_t)0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)0.6918945312500f,(float16_t)0.7221679687500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6875000000000f,(float16_t)0.7265625000000f,
+(float16_t)0.6850585937500f,(float16_t)0.7285156250000f,
+(float16_t)0.6826171875000f,(float16_t)0.7304687500000f,
+(float16_t)0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)0.6782226562500f,(float16_t)0.7348632812500f,
+(float16_t)0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)0.6738281250000f,(float16_t)0.7387695312500f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6694335937500f,(float16_t)0.7431640625000f,
+(float16_t)0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)0.6645507812500f,(float16_t)0.7470703125000f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6601562500000f,(float16_t)0.7509765625000f,
+(float16_t)0.6577148437500f,(float16_t)0.7534179687500f,
+(float16_t)0.6552734375000f,(float16_t)0.7553710937500f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6508789062500f,(float16_t)0.7592773437500f,
+(float16_t)0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)0.6459960937500f,(float16_t)0.7631835937500f,
+(float16_t)0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)0.6416015625000f,(float16_t)0.7670898437500f,
+(float16_t)0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)0.6367187500000f,(float16_t)0.7709960937500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6318359375000f,(float16_t)0.7749023437500f,
+(float16_t)0.6293945312500f,(float16_t)0.7768554687500f,
+(float16_t)0.6274414062500f,(float16_t)0.7788085937500f,
+(float16_t)0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)0.6225585937500f,(float16_t)0.7827148437500f,
+(float16_t)0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)0.6176757812500f,(float16_t)0.7866210937500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.6127929687500f,(float16_t)0.7900390625000f,
+(float16_t)0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)0.6079101562500f,(float16_t)0.7939453125000f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.6030273437500f,(float16_t)0.7978515625000f,
+(float16_t)0.6005859375000f,(float16_t)0.7993164062500f,
+(float16_t)0.5981445312500f,(float16_t)0.8012695312500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5932617187500f,(float16_t)0.8051757812500f,
+(float16_t)0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)0.5883789062500f,(float16_t)0.8085937500000f,
+(float16_t)0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)0.5834960937500f,(float16_t)0.8120117187500f,
+(float16_t)0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)0.5781250000000f,(float16_t)0.8159179687500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5732421875000f,(float16_t)0.8193359375000f,
+(float16_t)0.5708007812500f,(float16_t)0.8212890625000f,
+(float16_t)0.5683593750000f,(float16_t)0.8227539062500f,
+(float16_t)0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)0.5629882812500f,(float16_t)0.8261718750000f,
+(float16_t)0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)0.5581054687500f,(float16_t)0.8295898437500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5532226562500f,(float16_t)0.8330078125000f,
+(float16_t)0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)0.5478515625000f,(float16_t)0.8364257812500f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5429687500000f,(float16_t)0.8398437500000f,
+(float16_t)0.5400390625000f,(float16_t)0.8417968750000f,
+(float16_t)0.5375976562500f,(float16_t)0.8432617187500f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5322265625000f,(float16_t)0.8466796875000f,
+(float16_t)0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)0.5273437500000f,(float16_t)0.8496093750000f,
+(float16_t)0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)0.5219726562500f,(float16_t)0.8530273437500f,
+(float16_t)0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)0.5166015625000f,(float16_t)0.8559570312500f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.5112304687500f,(float16_t)0.8593750000000f,
+(float16_t)0.5087890625000f,(float16_t)0.8608398437500f,
+(float16_t)0.5063476562500f,(float16_t)0.8623046875000f,
+(float16_t)0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)0.5009765625000f,(float16_t)0.8657226562500f,
+(float16_t)0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)0.4956054687500f,(float16_t)0.8686523437500f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4902343750000f,(float16_t)0.8715820312500f,
+(float16_t)0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)0.4848632812500f,(float16_t)0.8745117187500f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4794921875000f,(float16_t)0.8774414062500f,
+(float16_t)0.4768066406250f,(float16_t)0.8789062500000f,
+(float16_t)0.4741210937500f,(float16_t)0.8803710937500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4687500000000f,(float16_t)0.8833007812500f,
+(float16_t)0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)0.4633789062500f,(float16_t)0.8862304687500f,
+(float16_t)0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)0.4577636718750f,(float16_t)0.8891601562500f,
+(float16_t)0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)0.4523925781250f,(float16_t)0.8916015625000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4467773437500f,(float16_t)0.8945312500000f,
+(float16_t)0.4440917968750f,(float16_t)0.8959960937500f,
+(float16_t)0.4414062500000f,(float16_t)0.8974609375000f,
+(float16_t)0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)0.4357910156250f,(float16_t)0.8999023437500f,
+(float16_t)0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)0.4304199218750f,(float16_t)0.9028320312500f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4248046875000f,(float16_t)0.9052734375000f,
+(float16_t)0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)0.4191894531250f,(float16_t)0.9077148437500f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.4135742187500f,(float16_t)0.9106445312500f,
+(float16_t)0.4108886718750f,(float16_t)0.9116210937500f,
+(float16_t)0.4079589843750f,(float16_t)0.9130859375000f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.4023437500000f,(float16_t)0.9155273437500f,
+(float16_t)0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)0.3967285156250f,(float16_t)0.9179687500000f,
+(float16_t)0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)0.3911132812500f,(float16_t)0.9204101562500f,
+(float16_t)0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)0.3854980468750f,(float16_t)0.9228515625000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3798828125000f,(float16_t)0.9252929687500f,
+(float16_t)0.3769531250000f,(float16_t)0.9262695312500f,
+(float16_t)0.3742675781250f,(float16_t)0.9272460937500f,
+(float16_t)0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)0.3684082031250f,(float16_t)0.9296875000000f,
+(float16_t)0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)0.3627929687500f,(float16_t)0.9316406250000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3569335937500f,(float16_t)0.9340820312500f,
+(float16_t)0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)0.3513183593750f,(float16_t)0.9360351562500f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3454589843750f,(float16_t)0.9384765625000f,
+(float16_t)0.3427734375000f,(float16_t)0.9394531250000f,
+(float16_t)0.3398437500000f,(float16_t)0.9404296875000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3339843750000f,(float16_t)0.9423828125000f,
+(float16_t)0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)0.3281250000000f,(float16_t)0.9448242187500f,
+(float16_t)0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)0.3225097656250f,(float16_t)0.9467773437500f,
+(float16_t)0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)0.3166503906250f,(float16_t)0.9487304687500f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.3107910156250f,(float16_t)0.9506835937500f,
+(float16_t)0.3078613281250f,(float16_t)0.9516601562500f,
+(float16_t)0.3049316406250f,(float16_t)0.9521484375000f,
+(float16_t)0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)0.2990722656250f,(float16_t)0.9541015625000f,
+(float16_t)0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)0.2932128906250f,(float16_t)0.9560546875000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2873535156250f,(float16_t)0.9580078125000f,
+(float16_t)0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)0.2814941406250f,(float16_t)0.9594726562500f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2756347656250f,(float16_t)0.9614257812500f,
+(float16_t)0.2727050781250f,(float16_t)0.9619140625000f,
+(float16_t)0.2697753906250f,(float16_t)0.9628906250000f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2636718750000f,(float16_t)0.9643554687500f,
+(float16_t)0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)0.2578125000000f,(float16_t)0.9663085937500f,
+(float16_t)0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)0.2519531250000f,(float16_t)0.9677734375000f,
+(float16_t)0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)0.2459716796875f,(float16_t)0.9692382812500f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2399902343750f,(float16_t)0.9707031250000f,
+(float16_t)0.2370605468750f,(float16_t)0.9716796875000f,
+(float16_t)0.2340087890625f,(float16_t)0.9721679687500f,
+(float16_t)0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)0.2280273437500f,(float16_t)0.9736328125000f,
+(float16_t)0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)0.2220458984375f,(float16_t)0.9750976562500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.2160644531250f,(float16_t)0.9765625000000f,
+(float16_t)0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)0.2100830078125f,(float16_t)0.9775390625000f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.2041015625000f,(float16_t)0.9790039062500f,
+(float16_t)0.2010498046875f,(float16_t)0.9794921875000f,
+(float16_t)0.1981201171875f,(float16_t)0.9799804687500f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1921386718750f,(float16_t)0.9814453125000f,
+(float16_t)0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)0.1860351562500f,(float16_t)0.9824218750000f,
+(float16_t)0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)0.1800537109375f,(float16_t)0.9838867187500f,
+(float16_t)0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)0.1739501953125f,(float16_t)0.9848632812500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1679687500000f,(float16_t)0.9858398437500f,
+(float16_t)0.1649169921875f,(float16_t)0.9863281250000f,
+(float16_t)0.1618652343750f,(float16_t)0.9868164062500f,
+(float16_t)0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)0.1558837890625f,(float16_t)0.9877929687500f,
+(float16_t)0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)0.1497802734375f,(float16_t)0.9887695312500f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1436767578125f,(float16_t)0.9897460937500f,
+(float16_t)0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)0.1375732421875f,(float16_t)0.9907226562500f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1315917968750f,(float16_t)0.9912109375000f,
+(float16_t)0.1285400390625f,(float16_t)0.9916992187500f,
+(float16_t)0.1254882812500f,(float16_t)0.9921875000000f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.1193847656250f,(float16_t)0.9926757812500f,
+(float16_t)0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)0.1132812500000f,(float16_t)0.9936523437500f,
+(float16_t)0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)0.1071777343750f,(float16_t)0.9941406250000f,
+(float16_t)0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)0.1010742187500f,(float16_t)0.9951171875000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0949707031250f,(float16_t)0.9956054687500f,
+(float16_t)0.0919189453125f,(float16_t)0.9956054687500f,
+(float16_t)0.0888671875000f,(float16_t)0.9960937500000f,
+(float16_t)0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)0.0827636718750f,(float16_t)0.9965820312500f,
+(float16_t)0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)0.0765991210938f,(float16_t)0.9970703125000f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0704956054688f,(float16_t)0.9975585937500f,
+(float16_t)0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)0.0643920898438f,(float16_t)0.9980468750000f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0582580566406f,(float16_t)0.9985351562500f,
+(float16_t)0.0552062988281f,(float16_t)0.9985351562500f,
+(float16_t)0.0521240234375f,(float16_t)0.9985351562500f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0459899902344f,(float16_t)0.9990234375000f,
+(float16_t)0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)0.0398864746094f,(float16_t)0.9990234375000f,
+(float16_t)0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)0.0337524414062f,(float16_t)0.9995117187500f,
+(float16_t)0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)0.0276031494141f,(float16_t)0.9995117187500f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0214691162109f,(float16_t)1.0000000000000f,
+(float16_t)0.0184020996094f,(float16_t)1.0000000000000f,
+(float16_t)0.0153427124023f,(float16_t)1.0000000000000f,
+(float16_t)0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)0.0092010498047f,(float16_t)1.0000000000000f,
+(float16_t)0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)0.0030670166016f,(float16_t)1.0000000000000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.0030670166016f,(float16_t)1.0000000000000f,
+(float16_t)-0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)-0.0092010498047f,(float16_t)1.0000000000000f,
+(float16_t)-0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)-0.0153427124023f,(float16_t)1.0000000000000f,
+(float16_t)-0.0184020996094f,(float16_t)1.0000000000000f,
+(float16_t)-0.0214691162109f,(float16_t)1.0000000000000f,
+(float16_t)-0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)-0.0276031494141f,(float16_t)0.9995117187500f,
+(float16_t)-0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)-0.0337524414062f,(float16_t)0.9995117187500f,
+(float16_t)-0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)-0.0398864746094f,(float16_t)0.9990234375000f,
+(float16_t)-0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)-0.0459899902344f,(float16_t)0.9990234375000f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0521240234375f,(float16_t)0.9985351562500f,
+(float16_t)-0.0552062988281f,(float16_t)0.9985351562500f,
+(float16_t)-0.0582580566406f,(float16_t)0.9985351562500f,
+(float16_t)-0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)-0.0643920898438f,(float16_t)0.9980468750000f,
+(float16_t)-0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)-0.0704956054688f,(float16_t)0.9975585937500f,
+(float16_t)-0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)-0.0765991210938f,(float16_t)0.9970703125000f,
+(float16_t)-0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)-0.0827636718750f,(float16_t)0.9965820312500f,
+(float16_t)-0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)-0.0888671875000f,(float16_t)0.9960937500000f,
+(float16_t)-0.0919189453125f,(float16_t)0.9956054687500f,
+(float16_t)-0.0949707031250f,(float16_t)0.9956054687500f,
+(float16_t)-0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1010742187500f,(float16_t)0.9951171875000f,
+(float16_t)-0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)-0.1071777343750f,(float16_t)0.9941406250000f,
+(float16_t)-0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)-0.1132812500000f,(float16_t)0.9936523437500f,
+(float16_t)-0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)-0.1193847656250f,(float16_t)0.9926757812500f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1254882812500f,(float16_t)0.9921875000000f,
+(float16_t)-0.1285400390625f,(float16_t)0.9916992187500f,
+(float16_t)-0.1315917968750f,(float16_t)0.9912109375000f,
+(float16_t)-0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)-0.1375732421875f,(float16_t)0.9907226562500f,
+(float16_t)-0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)-0.1436767578125f,(float16_t)0.9897460937500f,
+(float16_t)-0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)-0.1497802734375f,(float16_t)0.9887695312500f,
+(float16_t)-0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)-0.1558837890625f,(float16_t)0.9877929687500f,
+(float16_t)-0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)-0.1618652343750f,(float16_t)0.9868164062500f,
+(float16_t)-0.1649169921875f,(float16_t)0.9863281250000f,
+(float16_t)-0.1679687500000f,(float16_t)0.9858398437500f,
+(float16_t)-0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)-0.1739501953125f,(float16_t)0.9848632812500f,
+(float16_t)-0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)-0.1800537109375f,(float16_t)0.9838867187500f,
+(float16_t)-0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)-0.1860351562500f,(float16_t)0.9824218750000f,
+(float16_t)-0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)-0.1921386718750f,(float16_t)0.9814453125000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.1981201171875f,(float16_t)0.9799804687500f,
+(float16_t)-0.2010498046875f,(float16_t)0.9794921875000f,
+(float16_t)-0.2041015625000f,(float16_t)0.9790039062500f,
+(float16_t)-0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)-0.2100830078125f,(float16_t)0.9775390625000f,
+(float16_t)-0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)-0.2160644531250f,(float16_t)0.9765625000000f,
+(float16_t)-0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)-0.2220458984375f,(float16_t)0.9750976562500f,
+(float16_t)-0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)-0.2280273437500f,(float16_t)0.9736328125000f,
+(float16_t)-0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)-0.2340087890625f,(float16_t)0.9721679687500f,
+(float16_t)-0.2370605468750f,(float16_t)0.9716796875000f,
+(float16_t)-0.2399902343750f,(float16_t)0.9707031250000f,
+(float16_t)-0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)-0.2459716796875f,(float16_t)0.9692382812500f,
+(float16_t)-0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)-0.2519531250000f,(float16_t)0.9677734375000f,
+(float16_t)-0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)-0.2578125000000f,(float16_t)0.9663085937500f,
+(float16_t)-0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)-0.2636718750000f,(float16_t)0.9643554687500f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.2697753906250f,(float16_t)0.9628906250000f,
+(float16_t)-0.2727050781250f,(float16_t)0.9619140625000f,
+(float16_t)-0.2756347656250f,(float16_t)0.9614257812500f,
+(float16_t)-0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)-0.2814941406250f,(float16_t)0.9594726562500f,
+(float16_t)-0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)-0.2873535156250f,(float16_t)0.9580078125000f,
+(float16_t)-0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)-0.2932128906250f,(float16_t)0.9560546875000f,
+(float16_t)-0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)-0.2990722656250f,(float16_t)0.9541015625000f,
+(float16_t)-0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)-0.3049316406250f,(float16_t)0.9521484375000f,
+(float16_t)-0.3078613281250f,(float16_t)0.9516601562500f,
+(float16_t)-0.3107910156250f,(float16_t)0.9506835937500f,
+(float16_t)-0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)-0.3166503906250f,(float16_t)0.9487304687500f,
+(float16_t)-0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)-0.3225097656250f,(float16_t)0.9467773437500f,
+(float16_t)-0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)-0.3281250000000f,(float16_t)0.9448242187500f,
+(float16_t)-0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)-0.3339843750000f,(float16_t)0.9423828125000f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3398437500000f,(float16_t)0.9404296875000f,
+(float16_t)-0.3427734375000f,(float16_t)0.9394531250000f,
+(float16_t)-0.3454589843750f,(float16_t)0.9384765625000f,
+(float16_t)-0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)-0.3513183593750f,(float16_t)0.9360351562500f,
+(float16_t)-0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)-0.3569335937500f,(float16_t)0.9340820312500f,
+(float16_t)-0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)-0.3627929687500f,(float16_t)0.9316406250000f,
+(float16_t)-0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)-0.3684082031250f,(float16_t)0.9296875000000f,
+(float16_t)-0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)-0.3742675781250f,(float16_t)0.9272460937500f,
+(float16_t)-0.3769531250000f,(float16_t)0.9262695312500f,
+(float16_t)-0.3798828125000f,(float16_t)0.9252929687500f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.3854980468750f,(float16_t)0.9228515625000f,
+(float16_t)-0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)-0.3911132812500f,(float16_t)0.9204101562500f,
+(float16_t)-0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)-0.3967285156250f,(float16_t)0.9179687500000f,
+(float16_t)-0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)-0.4023437500000f,(float16_t)0.9155273437500f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4079589843750f,(float16_t)0.9130859375000f,
+(float16_t)-0.4108886718750f,(float16_t)0.9116210937500f,
+(float16_t)-0.4135742187500f,(float16_t)0.9106445312500f,
+(float16_t)-0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)-0.4191894531250f,(float16_t)0.9077148437500f,
+(float16_t)-0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)-0.4248046875000f,(float16_t)0.9052734375000f,
+(float16_t)-0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)-0.4304199218750f,(float16_t)0.9028320312500f,
+(float16_t)-0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)-0.4357910156250f,(float16_t)0.8999023437500f,
+(float16_t)-0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)-0.4414062500000f,(float16_t)0.8974609375000f,
+(float16_t)-0.4440917968750f,(float16_t)0.8959960937500f,
+(float16_t)-0.4467773437500f,(float16_t)0.8945312500000f,
+(float16_t)-0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)-0.4523925781250f,(float16_t)0.8916015625000f,
+(float16_t)-0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)-0.4577636718750f,(float16_t)0.8891601562500f,
+(float16_t)-0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)-0.4633789062500f,(float16_t)0.8862304687500f,
+(float16_t)-0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)-0.4687500000000f,(float16_t)0.8833007812500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.4741210937500f,(float16_t)0.8803710937500f,
+(float16_t)-0.4768066406250f,(float16_t)0.8789062500000f,
+(float16_t)-0.4794921875000f,(float16_t)0.8774414062500f,
+(float16_t)-0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)-0.4848632812500f,(float16_t)0.8745117187500f,
+(float16_t)-0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)-0.4902343750000f,(float16_t)0.8715820312500f,
+(float16_t)-0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)-0.4956054687500f,(float16_t)0.8686523437500f,
+(float16_t)-0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)-0.5009765625000f,(float16_t)0.8657226562500f,
+(float16_t)-0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)-0.5063476562500f,(float16_t)0.8623046875000f,
+(float16_t)-0.5087890625000f,(float16_t)0.8608398437500f,
+(float16_t)-0.5112304687500f,(float16_t)0.8593750000000f,
+(float16_t)-0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)-0.5166015625000f,(float16_t)0.8559570312500f,
+(float16_t)-0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)-0.5219726562500f,(float16_t)0.8530273437500f,
+(float16_t)-0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)-0.5273437500000f,(float16_t)0.8496093750000f,
+(float16_t)-0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)-0.5322265625000f,(float16_t)0.8466796875000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5375976562500f,(float16_t)0.8432617187500f,
+(float16_t)-0.5400390625000f,(float16_t)0.8417968750000f,
+(float16_t)-0.5429687500000f,(float16_t)0.8398437500000f,
+(float16_t)-0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)-0.5478515625000f,(float16_t)0.8364257812500f,
+(float16_t)-0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)-0.5532226562500f,(float16_t)0.8330078125000f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.5581054687500f,(float16_t)0.8295898437500f,
+(float16_t)-0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)-0.5629882812500f,(float16_t)0.8261718750000f,
+(float16_t)-0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)-0.5683593750000f,(float16_t)0.8227539062500f,
+(float16_t)-0.5708007812500f,(float16_t)0.8212890625000f,
+(float16_t)-0.5732421875000f,(float16_t)0.8193359375000f,
+(float16_t)-0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)-0.5781250000000f,(float16_t)0.8159179687500f,
+(float16_t)-0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)-0.5834960937500f,(float16_t)0.8120117187500f,
+(float16_t)-0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)-0.5883789062500f,(float16_t)0.8085937500000f,
+(float16_t)-0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)-0.5932617187500f,(float16_t)0.8051757812500f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.5981445312500f,(float16_t)0.8012695312500f,
+(float16_t)-0.6005859375000f,(float16_t)0.7993164062500f,
+(float16_t)-0.6030273437500f,(float16_t)0.7978515625000f,
+(float16_t)-0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)-0.6079101562500f,(float16_t)0.7939453125000f,
+(float16_t)-0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)-0.6127929687500f,(float16_t)0.7900390625000f,
+(float16_t)-0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)-0.6176757812500f,(float16_t)0.7866210937500f,
+(float16_t)-0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)-0.6225585937500f,(float16_t)0.7827148437500f,
+(float16_t)-0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)-0.6274414062500f,(float16_t)0.7788085937500f,
+(float16_t)-0.6293945312500f,(float16_t)0.7768554687500f,
+(float16_t)-0.6318359375000f,(float16_t)0.7749023437500f,
+(float16_t)-0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)-0.6367187500000f,(float16_t)0.7709960937500f,
+(float16_t)-0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)-0.6416015625000f,(float16_t)0.7670898437500f,
+(float16_t)-0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)-0.6459960937500f,(float16_t)0.7631835937500f,
+(float16_t)-0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)-0.6508789062500f,(float16_t)0.7592773437500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.6552734375000f,(float16_t)0.7553710937500f,
+(float16_t)-0.6577148437500f,(float16_t)0.7534179687500f,
+(float16_t)-0.6601562500000f,(float16_t)0.7509765625000f,
+(float16_t)-0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)-0.6645507812500f,(float16_t)0.7470703125000f,
+(float16_t)-0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)-0.6694335937500f,(float16_t)0.7431640625000f,
+(float16_t)-0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)-0.6738281250000f,(float16_t)0.7387695312500f,
+(float16_t)-0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)-0.6782226562500f,(float16_t)0.7348632812500f,
+(float16_t)-0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)-0.6826171875000f,(float16_t)0.7304687500000f,
+(float16_t)-0.6850585937500f,(float16_t)0.7285156250000f,
+(float16_t)-0.6875000000000f,(float16_t)0.7265625000000f,
+(float16_t)-0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)-0.6918945312500f,(float16_t)0.7221679687500f,
+(float16_t)-0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)-0.6962890625000f,(float16_t)0.7177734375000f,
+(float16_t)-0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)-0.7006835937500f,(float16_t)0.7133789062500f,
+(float16_t)-0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)-0.7050781250000f,(float16_t)0.7094726562500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7094726562500f,(float16_t)0.7050781250000f,
+(float16_t)-0.7114257812500f,(float16_t)0.7026367187500f,
+(float16_t)-0.7133789062500f,(float16_t)0.7006835937500f,
+(float16_t)-0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)-0.7177734375000f,(float16_t)0.6962890625000f,
+(float16_t)-0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)-0.7221679687500f,(float16_t)0.6918945312500f,
+(float16_t)-0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)-0.7265625000000f,(float16_t)0.6875000000000f,
+(float16_t)-0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)-0.7304687500000f,(float16_t)0.6826171875000f,
+(float16_t)-0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)-0.7348632812500f,(float16_t)0.6782226562500f,
+(float16_t)-0.7368164062500f,(float16_t)0.6762695312500f,
+(float16_t)-0.7387695312500f,(float16_t)0.6738281250000f,
+(float16_t)-0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)-0.7431640625000f,(float16_t)0.6694335937500f,
+(float16_t)-0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)-0.7470703125000f,(float16_t)0.6645507812500f,
+(float16_t)-0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)-0.7509765625000f,(float16_t)0.6601562500000f,
+(float16_t)-0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)-0.7553710937500f,(float16_t)0.6552734375000f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.7592773437500f,(float16_t)0.6508789062500f,
+(float16_t)-0.7612304687500f,(float16_t)0.6484375000000f,
+(float16_t)-0.7631835937500f,(float16_t)0.6459960937500f,
+(float16_t)-0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)-0.7670898437500f,(float16_t)0.6416015625000f,
+(float16_t)-0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)-0.7709960937500f,(float16_t)0.6367187500000f,
+(float16_t)-0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)-0.7749023437500f,(float16_t)0.6318359375000f,
+(float16_t)-0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)-0.7788085937500f,(float16_t)0.6274414062500f,
+(float16_t)-0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)-0.7827148437500f,(float16_t)0.6225585937500f,
+(float16_t)-0.7846679687500f,(float16_t)0.6201171875000f,
+(float16_t)-0.7866210937500f,(float16_t)0.6176757812500f,
+(float16_t)-0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)-0.7900390625000f,(float16_t)0.6127929687500f,
+(float16_t)-0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)-0.7939453125000f,(float16_t)0.6079101562500f,
+(float16_t)-0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)-0.7978515625000f,(float16_t)0.6030273437500f,
+(float16_t)-0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)-0.8012695312500f,(float16_t)0.5981445312500f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8051757812500f,(float16_t)0.5932617187500f,
+(float16_t)-0.8066406250000f,(float16_t)0.5908203125000f,
+(float16_t)-0.8085937500000f,(float16_t)0.5883789062500f,
+(float16_t)-0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)-0.8120117187500f,(float16_t)0.5834960937500f,
+(float16_t)-0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)-0.8159179687500f,(float16_t)0.5781250000000f,
+(float16_t)-0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)-0.8193359375000f,(float16_t)0.5732421875000f,
+(float16_t)-0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)-0.8227539062500f,(float16_t)0.5683593750000f,
+(float16_t)-0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)-0.8261718750000f,(float16_t)0.5629882812500f,
+(float16_t)-0.8281250000000f,(float16_t)0.5605468750000f,
+(float16_t)-0.8295898437500f,(float16_t)0.5581054687500f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.8330078125000f,(float16_t)0.5532226562500f,
+(float16_t)-0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)-0.8364257812500f,(float16_t)0.5478515625000f,
+(float16_t)-0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)-0.8398437500000f,(float16_t)0.5429687500000f,
+(float16_t)-0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)-0.8432617187500f,(float16_t)0.5375976562500f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8466796875000f,(float16_t)0.5322265625000f,
+(float16_t)-0.8481445312500f,(float16_t)0.5297851562500f,
+(float16_t)-0.8496093750000f,(float16_t)0.5273437500000f,
+(float16_t)-0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)-0.8530273437500f,(float16_t)0.5219726562500f,
+(float16_t)-0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)-0.8559570312500f,(float16_t)0.5166015625000f,
+(float16_t)-0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)-0.8593750000000f,(float16_t)0.5112304687500f,
+(float16_t)-0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)-0.8623046875000f,(float16_t)0.5063476562500f,
+(float16_t)-0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)-0.8657226562500f,(float16_t)0.5009765625000f,
+(float16_t)-0.8671875000000f,(float16_t)0.4982910156250f,
+(float16_t)-0.8686523437500f,(float16_t)0.4956054687500f,
+(float16_t)-0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)-0.8715820312500f,(float16_t)0.4902343750000f,
+(float16_t)-0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)-0.8745117187500f,(float16_t)0.4848632812500f,
+(float16_t)-0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)-0.8774414062500f,(float16_t)0.4794921875000f,
+(float16_t)-0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)-0.8803710937500f,(float16_t)0.4741210937500f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.8833007812500f,(float16_t)0.4687500000000f,
+(float16_t)-0.8847656250000f,(float16_t)0.4660644531250f,
+(float16_t)-0.8862304687500f,(float16_t)0.4633789062500f,
+(float16_t)-0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)-0.8891601562500f,(float16_t)0.4577636718750f,
+(float16_t)-0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)-0.8916015625000f,(float16_t)0.4523925781250f,
+(float16_t)-0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)-0.8945312500000f,(float16_t)0.4467773437500f,
+(float16_t)-0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)-0.8974609375000f,(float16_t)0.4414062500000f,
+(float16_t)-0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)-0.8999023437500f,(float16_t)0.4357910156250f,
+(float16_t)-0.9013671875000f,(float16_t)0.4331054687500f,
+(float16_t)-0.9028320312500f,(float16_t)0.4304199218750f,
+(float16_t)-0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)-0.9052734375000f,(float16_t)0.4248046875000f,
+(float16_t)-0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)-0.9077148437500f,(float16_t)0.4191894531250f,
+(float16_t)-0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)-0.9106445312500f,(float16_t)0.4135742187500f,
+(float16_t)-0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)-0.9130859375000f,(float16_t)0.4079589843750f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9155273437500f,(float16_t)0.4023437500000f,
+(float16_t)-0.9165039062500f,(float16_t)0.3996582031250f,
+(float16_t)-0.9179687500000f,(float16_t)0.3967285156250f,
+(float16_t)-0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)-0.9204101562500f,(float16_t)0.3911132812500f,
+(float16_t)-0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)-0.9228515625000f,(float16_t)0.3854980468750f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9252929687500f,(float16_t)0.3798828125000f,
+(float16_t)-0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)-0.9272460937500f,(float16_t)0.3742675781250f,
+(float16_t)-0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)-0.9296875000000f,(float16_t)0.3684082031250f,
+(float16_t)-0.9306640625000f,(float16_t)0.3657226562500f,
+(float16_t)-0.9316406250000f,(float16_t)0.3627929687500f,
+(float16_t)-0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)-0.9340820312500f,(float16_t)0.3569335937500f,
+(float16_t)-0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)-0.9360351562500f,(float16_t)0.3513183593750f,
+(float16_t)-0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)-0.9384765625000f,(float16_t)0.3454589843750f,
+(float16_t)-0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)-0.9404296875000f,(float16_t)0.3398437500000f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9423828125000f,(float16_t)0.3339843750000f,
+(float16_t)-0.9433593750000f,(float16_t)0.3310546875000f,
+(float16_t)-0.9448242187500f,(float16_t)0.3281250000000f,
+(float16_t)-0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)-0.9467773437500f,(float16_t)0.3225097656250f,
+(float16_t)-0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)-0.9487304687500f,(float16_t)0.3166503906250f,
+(float16_t)-0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)-0.9506835937500f,(float16_t)0.3107910156250f,
+(float16_t)-0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)-0.9521484375000f,(float16_t)0.3049316406250f,
+(float16_t)-0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)-0.9541015625000f,(float16_t)0.2990722656250f,
+(float16_t)-0.9550781250000f,(float16_t)0.2961425781250f,
+(float16_t)-0.9560546875000f,(float16_t)0.2932128906250f,
+(float16_t)-0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)-0.9580078125000f,(float16_t)0.2873535156250f,
+(float16_t)-0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)-0.9594726562500f,(float16_t)0.2814941406250f,
+(float16_t)-0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)-0.9614257812500f,(float16_t)0.2756347656250f,
+(float16_t)-0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)-0.9628906250000f,(float16_t)0.2697753906250f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9643554687500f,(float16_t)0.2636718750000f,
+(float16_t)-0.9653320312500f,(float16_t)0.2607421875000f,
+(float16_t)-0.9663085937500f,(float16_t)0.2578125000000f,
+(float16_t)-0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)-0.9677734375000f,(float16_t)0.2519531250000f,
+(float16_t)-0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)-0.9692382812500f,(float16_t)0.2459716796875f,
+(float16_t)-0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)-0.9707031250000f,(float16_t)0.2399902343750f,
+(float16_t)-0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)-0.9721679687500f,(float16_t)0.2340087890625f,
+(float16_t)-0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)-0.9736328125000f,(float16_t)0.2280273437500f,
+(float16_t)-0.9741210937500f,(float16_t)0.2250976562500f,
+(float16_t)-0.9750976562500f,(float16_t)0.2220458984375f,
+(float16_t)-0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)-0.9765625000000f,(float16_t)0.2160644531250f,
+(float16_t)-0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)-0.9775390625000f,(float16_t)0.2100830078125f,
+(float16_t)-0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)-0.9790039062500f,(float16_t)0.2041015625000f,
+(float16_t)-0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)-0.9799804687500f,(float16_t)0.1981201171875f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9814453125000f,(float16_t)0.1921386718750f,
+(float16_t)-0.9819335937500f,(float16_t)0.1890869140625f,
+(float16_t)-0.9824218750000f,(float16_t)0.1860351562500f,
+(float16_t)-0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)-0.9838867187500f,(float16_t)0.1800537109375f,
+(float16_t)-0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)-0.9848632812500f,(float16_t)0.1739501953125f,
+(float16_t)-0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)-0.9858398437500f,(float16_t)0.1679687500000f,
+(float16_t)-0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)-0.9868164062500f,(float16_t)0.1618652343750f,
+(float16_t)-0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)-0.9877929687500f,(float16_t)0.1558837890625f,
+(float16_t)-0.9882812500000f,(float16_t)0.1528320312500f,
+(float16_t)-0.9887695312500f,(float16_t)0.1497802734375f,
+(float16_t)-0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)-0.9897460937500f,(float16_t)0.1436767578125f,
+(float16_t)-0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)-0.9907226562500f,(float16_t)0.1375732421875f,
+(float16_t)-0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)-0.9912109375000f,(float16_t)0.1315917968750f,
+(float16_t)-0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)-0.9921875000000f,(float16_t)0.1254882812500f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9926757812500f,(float16_t)0.1193847656250f,
+(float16_t)-0.9931640625000f,(float16_t)0.1163330078125f,
+(float16_t)-0.9936523437500f,(float16_t)0.1132812500000f,
+(float16_t)-0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)-0.9941406250000f,(float16_t)0.1071777343750f,
+(float16_t)-0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)-0.9951171875000f,(float16_t)0.1010742187500f,
+(float16_t)-0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)-0.9956054687500f,(float16_t)0.0949707031250f,
+(float16_t)-0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)-0.9960937500000f,(float16_t)0.0888671875000f,
+(float16_t)-0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)-0.9965820312500f,(float16_t)0.0827636718750f,
+(float16_t)-0.9965820312500f,(float16_t)0.0797119140625f,
+(float16_t)-0.9970703125000f,(float16_t)0.0765991210938f,
+(float16_t)-0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)-0.9975585937500f,(float16_t)0.0704956054688f,
+(float16_t)-0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)-0.9980468750000f,(float16_t)0.0643920898438f,
+(float16_t)-0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)-0.9985351562500f,(float16_t)0.0582580566406f,
+(float16_t)-0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)-0.9985351562500f,(float16_t)0.0521240234375f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9990234375000f,(float16_t)0.0459899902344f,
+(float16_t)-0.9990234375000f,(float16_t)0.0429382324219f,
+(float16_t)-0.9990234375000f,(float16_t)0.0398864746094f,
+(float16_t)-0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)-0.9995117187500f,(float16_t)0.0337524414062f,
+(float16_t)-0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)-0.9995117187500f,(float16_t)0.0276031494141f,
+(float16_t)-0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)-1.0000000000000f,(float16_t)0.0214691162109f,
+(float16_t)-1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)-1.0000000000000f,(float16_t)0.0153427124023f,
+(float16_t)-1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)-1.0000000000000f,(float16_t)0.0092010498047f,
+(float16_t)-1.0000000000000f,(float16_t)0.0061340332031f,
+(float16_t)-1.0000000000000f,(float16_t)0.0030670166016f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)-0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)-0.0368041992188f,(float16_t)0.9995117187500f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)-0.0735473632812f,(float16_t)0.9970703125000f,
+(float16_t)-0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)-0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1102294921875f,(float16_t)0.9941406250000f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)-0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)-0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)-0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)-0.1829833984375f,(float16_t)0.9829101562500f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)-0.2191162109375f,(float16_t)0.9755859375000f,
+(float16_t)-0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)-0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)-0.2548828125000f,(float16_t)0.9667968750000f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)-0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)-0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)-0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)-0.3251953125000f,(float16_t)0.9458007812500f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)-0.3598632812500f,(float16_t)0.9331054687500f,
+(float16_t)-0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.3940429687500f,(float16_t)0.9189453125000f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)-0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)-0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)-0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)-0.4604492187500f,(float16_t)0.8876953125000f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)-0.4929199218750f,(float16_t)0.8701171875000f,
+(float16_t)-0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)-0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)-0.5244140625000f,(float16_t)0.8515625000000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)-0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)-0.5859375000000f,(float16_t)0.8105468750000f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)-0.6152343750000f,(float16_t)0.7885742187500f,
+(float16_t)-0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)-0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)-0.6440429687500f,(float16_t)0.7651367187500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)-0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)-0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)-0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)-0.6982421875000f,(float16_t)0.7158203125000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)-0.7241210937500f,(float16_t)0.6894531250000f,
+(float16_t)-0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)-0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)-0.7490234375000f,(float16_t)0.6625976562500f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)-0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)-0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)-0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)-0.7958984375000f,(float16_t)0.6054687500000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)-0.8173828125000f,(float16_t)0.5756835937500f,
+(float16_t)-0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.8383789062500f,(float16_t)0.5454101562500f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)-0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)-0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)-0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)-0.8759765625000f,(float16_t)0.4821777343750f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)-0.8930664062500f,(float16_t)0.4497070312500f,
+(float16_t)-0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)-0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)-0.9091796875000f,(float16_t)0.4165039062500f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)-0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)-0.9375000000000f,(float16_t)0.3483886718750f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)-0.9497070312500f,(float16_t)0.3137207031250f,
+(float16_t)-0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)-0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)-0.9604492187500f,(float16_t)0.2785644531250f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)-0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)-0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)-0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)-0.9785156250000f,(float16_t)0.2071533203125f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)-0.9853515625000f,(float16_t)0.1710205078125f,
+(float16_t)-0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)-0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)-0.9907226562500f,(float16_t)0.1345214843750f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)-0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)-0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)-0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)-0.9980468750000f,(float16_t)0.0613098144531f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)-0.9995117187500f,(float16_t)0.0245361328125f,
+(float16_t)-1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1467285156250f,(float16_t)0.9892578125000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)-0.2902832031250f,(float16_t)0.9570312500000f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.4274902343750f,(float16_t)0.9038085937500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)-0.6713867187500f,(float16_t)0.7407226562500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)-0.7729492187500f,(float16_t)0.6342773437500f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.8579101562500f,(float16_t)0.5141601562500f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)-0.9702148437500f,(float16_t)0.2429199218750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)-0.9951171875000f,(float16_t)0.0980224609375f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.5556640625000f,(float16_t)0.8315429687500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)-0.9238281250000f,(float16_t)0.3825683593750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)0.0000000000000f,(float16_t)1.0000000000000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,};
+
+float16_t rearranged_twiddle_stride3_4096_f16[2728]={
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0046005249023f,
+(float16_t)1.0000000000000f,(float16_t)0.0092010498047f,
+(float16_t)1.0000000000000f,(float16_t)0.0138015747070f,
+(float16_t)1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)0.9995117187500f,(float16_t)0.0230102539062f,
+(float16_t)0.9995117187500f,(float16_t)0.0276031494141f,
+(float16_t)0.9995117187500f,(float16_t)0.0321960449219f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9990234375000f,(float16_t)0.0414123535156f,
+(float16_t)0.9990234375000f,(float16_t)0.0459899902344f,
+(float16_t)0.9985351562500f,(float16_t)0.0505981445312f,
+(float16_t)0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)0.9980468750000f,(float16_t)0.0597839355469f,
+(float16_t)0.9980468750000f,(float16_t)0.0643920898438f,
+(float16_t)0.9975585937500f,(float16_t)0.0689697265625f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9970703125000f,(float16_t)0.0781250000000f,
+(float16_t)0.9965820312500f,(float16_t)0.0827636718750f,
+(float16_t)0.9960937500000f,(float16_t)0.0873413085938f,
+(float16_t)0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)0.9951171875000f,(float16_t)0.0964965820312f,
+(float16_t)0.9951171875000f,(float16_t)0.1010742187500f,
+(float16_t)0.9946289062500f,(float16_t)0.1056518554688f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9931640625000f,(float16_t)0.1148071289062f,
+(float16_t)0.9926757812500f,(float16_t)0.1193847656250f,
+(float16_t)0.9921875000000f,(float16_t)0.1239624023438f,
+(float16_t)0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)0.9912109375000f,(float16_t)0.1330566406250f,
+(float16_t)0.9907226562500f,(float16_t)0.1375732421875f,
+(float16_t)0.9897460937500f,(float16_t)0.1422119140625f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9882812500000f,(float16_t)0.1512451171875f,
+(float16_t)0.9877929687500f,(float16_t)0.1558837890625f,
+(float16_t)0.9868164062500f,(float16_t)0.1604003906250f,
+(float16_t)0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)0.9853515625000f,(float16_t)0.1694335937500f,
+(float16_t)0.9848632812500f,(float16_t)0.1739501953125f,
+(float16_t)0.9838867187500f,(float16_t)0.1784667968750f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9824218750000f,(float16_t)0.1876220703125f,
+(float16_t)0.9814453125000f,(float16_t)0.1921386718750f,
+(float16_t)0.9804687500000f,(float16_t)0.1966552734375f,
+(float16_t)0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)0.9785156250000f,(float16_t)0.2055664062500f,
+(float16_t)0.9775390625000f,(float16_t)0.2100830078125f,
+(float16_t)0.9765625000000f,(float16_t)0.2145996093750f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9746093750000f,(float16_t)0.2236328125000f,
+(float16_t)0.9736328125000f,(float16_t)0.2280273437500f,
+(float16_t)0.9726562500000f,(float16_t)0.2325439453125f,
+(float16_t)0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)0.9702148437500f,(float16_t)0.2414550781250f,
+(float16_t)0.9692382812500f,(float16_t)0.2459716796875f,
+(float16_t)0.9682617187500f,(float16_t)0.2504882812500f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9658203125000f,(float16_t)0.2592773437500f,
+(float16_t)0.9643554687500f,(float16_t)0.2636718750000f,
+(float16_t)0.9633789062500f,(float16_t)0.2683105468750f,
+(float16_t)0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)0.9609375000000f,(float16_t)0.2770996093750f,
+(float16_t)0.9594726562500f,(float16_t)0.2814941406250f,
+(float16_t)0.9584960937500f,(float16_t)0.2858886718750f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9555664062500f,(float16_t)0.2946777343750f,
+(float16_t)0.9541015625000f,(float16_t)0.2990722656250f,
+(float16_t)0.9526367187500f,(float16_t)0.3034667968750f,
+(float16_t)0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)0.9501953125000f,(float16_t)0.3122558593750f,
+(float16_t)0.9487304687500f,(float16_t)0.3166503906250f,
+(float16_t)0.9472656250000f,(float16_t)0.3210449218750f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9443359375000f,(float16_t)0.3295898437500f,
+(float16_t)0.9423828125000f,(float16_t)0.3339843750000f,
+(float16_t)0.9409179687500f,(float16_t)0.3383789062500f,
+(float16_t)0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)0.9379882812500f,(float16_t)0.3469238281250f,
+(float16_t)0.9360351562500f,(float16_t)0.3513183593750f,
+(float16_t)0.9345703125000f,(float16_t)0.3557128906250f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9311523437500f,(float16_t)0.3642578125000f,
+(float16_t)0.9296875000000f,(float16_t)0.3684082031250f,
+(float16_t)0.9277343750000f,(float16_t)0.3728027343750f,
+(float16_t)0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)0.9243164062500f,(float16_t)0.3813476562500f,
+(float16_t)0.9228515625000f,(float16_t)0.3854980468750f,
+(float16_t)0.9208984375000f,(float16_t)0.3896484375000f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9174804687500f,(float16_t)0.3981933593750f,
+(float16_t)0.9155273437500f,(float16_t)0.4023437500000f,
+(float16_t)0.9135742187500f,(float16_t)0.4067382812500f,
+(float16_t)0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)0.9096679687500f,(float16_t)0.4150390625000f,
+(float16_t)0.9077148437500f,(float16_t)0.4191894531250f,
+(float16_t)0.9057617187500f,(float16_t)0.4233398437500f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.9018554687500f,(float16_t)0.4316406250000f,
+(float16_t)0.8999023437500f,(float16_t)0.4357910156250f,
+(float16_t)0.8979492187500f,(float16_t)0.4399414062500f,
+(float16_t)0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)0.8940429687500f,(float16_t)0.4482421875000f,
+(float16_t)0.8916015625000f,(float16_t)0.4523925781250f,
+(float16_t)0.8896484375000f,(float16_t)0.4565429687500f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8857421875000f,(float16_t)0.4645996093750f,
+(float16_t)0.8833007812500f,(float16_t)0.4687500000000f,
+(float16_t)0.8813476562500f,(float16_t)0.4726562500000f,
+(float16_t)0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)0.8769531250000f,(float16_t)0.4809570312500f,
+(float16_t)0.8745117187500f,(float16_t)0.4848632812500f,
+(float16_t)0.8725585937500f,(float16_t)0.4887695312500f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8676757812500f,(float16_t)0.4968261718750f,
+(float16_t)0.8657226562500f,(float16_t)0.5009765625000f,
+(float16_t)0.8632812500000f,(float16_t)0.5048828125000f,
+(float16_t)0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)0.8583984375000f,(float16_t)0.5126953125000f,
+(float16_t)0.8559570312500f,(float16_t)0.5166015625000f,
+(float16_t)0.8540039062500f,(float16_t)0.5205078125000f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8491210937500f,(float16_t)0.5283203125000f,
+(float16_t)0.8466796875000f,(float16_t)0.5322265625000f,
+(float16_t)0.8442382812500f,(float16_t)0.5361328125000f,
+(float16_t)0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)0.8388671875000f,(float16_t)0.5439453125000f,
+(float16_t)0.8364257812500f,(float16_t)0.5478515625000f,
+(float16_t)0.8339843750000f,(float16_t)0.5517578125000f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8291015625000f,(float16_t)0.5595703125000f,
+(float16_t)0.8261718750000f,(float16_t)0.5629882812500f,
+(float16_t)0.8237304687500f,(float16_t)0.5668945312500f,
+(float16_t)0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)0.8183593750000f,(float16_t)0.5747070312500f,
+(float16_t)0.8159179687500f,(float16_t)0.5781250000000f,
+(float16_t)0.8129882812500f,(float16_t)0.5820312500000f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.8076171875000f,(float16_t)0.5893554687500f,
+(float16_t)0.8051757812500f,(float16_t)0.5932617187500f,
+(float16_t)0.8022460937500f,(float16_t)0.5971679687500f,
+(float16_t)0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)0.7968750000000f,(float16_t)0.6044921875000f,
+(float16_t)0.7939453125000f,(float16_t)0.6079101562500f,
+(float16_t)0.7910156250000f,(float16_t)0.6118164062500f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7856445312500f,(float16_t)0.6186523437500f,
+(float16_t)0.7827148437500f,(float16_t)0.6225585937500f,
+(float16_t)0.7797851562500f,(float16_t)0.6259765625000f,
+(float16_t)0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)0.7739257812500f,(float16_t)0.6333007812500f,
+(float16_t)0.7709960937500f,(float16_t)0.6367187500000f,
+(float16_t)0.7680664062500f,(float16_t)0.6401367187500f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7622070312500f,(float16_t)0.6474609375000f,
+(float16_t)0.7592773437500f,(float16_t)0.6508789062500f,
+(float16_t)0.7563476562500f,(float16_t)0.6542968750000f,
+(float16_t)0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)0.7500000000000f,(float16_t)0.6611328125000f,
+(float16_t)0.7470703125000f,(float16_t)0.6645507812500f,
+(float16_t)0.7441406250000f,(float16_t)0.6679687500000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7377929687500f,(float16_t)0.6748046875000f,
+(float16_t)0.7348632812500f,(float16_t)0.6782226562500f,
+(float16_t)0.7314453125000f,(float16_t)0.6816406250000f,
+(float16_t)0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)0.7250976562500f,(float16_t)0.6884765625000f,
+(float16_t)0.7221679687500f,(float16_t)0.6918945312500f,
+(float16_t)0.7187500000000f,(float16_t)0.6953125000000f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7124023437500f,(float16_t)0.7016601562500f,
+(float16_t)0.7094726562500f,(float16_t)0.7050781250000f,
+(float16_t)0.7060546875000f,(float16_t)0.7080078125000f,
+(float16_t)0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)0.6997070312500f,(float16_t)0.7148437500000f,
+(float16_t)0.6962890625000f,(float16_t)0.7177734375000f,
+(float16_t)0.6928710937500f,(float16_t)0.7211914062500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6860351562500f,(float16_t)0.7275390625000f,
+(float16_t)0.6826171875000f,(float16_t)0.7304687500000f,
+(float16_t)0.6796875000000f,(float16_t)0.7338867187500f,
+(float16_t)0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)0.6728515625000f,(float16_t)0.7397460937500f,
+(float16_t)0.6694335937500f,(float16_t)0.7431640625000f,
+(float16_t)0.6660156250000f,(float16_t)0.7460937500000f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6591796875000f,(float16_t)0.7519531250000f,
+(float16_t)0.6552734375000f,(float16_t)0.7553710937500f,
+(float16_t)0.6518554687500f,(float16_t)0.7583007812500f,
+(float16_t)0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)0.6450195312500f,(float16_t)0.7641601562500f,
+(float16_t)0.6416015625000f,(float16_t)0.7670898437500f,
+(float16_t)0.6381835937500f,(float16_t)0.7700195312500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6308593750000f,(float16_t)0.7758789062500f,
+(float16_t)0.6274414062500f,(float16_t)0.7788085937500f,
+(float16_t)0.6235351562500f,(float16_t)0.7817382812500f,
+(float16_t)0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)0.6162109375000f,(float16_t)0.7875976562500f,
+(float16_t)0.6127929687500f,(float16_t)0.7900390625000f,
+(float16_t)0.6093750000000f,(float16_t)0.7929687500000f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.6020507812500f,(float16_t)0.7988281250000f,
+(float16_t)0.5981445312500f,(float16_t)0.8012695312500f,
+(float16_t)0.5942382812500f,(float16_t)0.8041992187500f,
+(float16_t)0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)0.5869140625000f,(float16_t)0.8095703125000f,
+(float16_t)0.5834960937500f,(float16_t)0.8120117187500f,
+(float16_t)0.5795898437500f,(float16_t)0.8149414062500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5722656250000f,(float16_t)0.8203125000000f,
+(float16_t)0.5683593750000f,(float16_t)0.8227539062500f,
+(float16_t)0.5644531250000f,(float16_t)0.8256835937500f,
+(float16_t)0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)0.5566406250000f,(float16_t)0.8305664062500f,
+(float16_t)0.5532226562500f,(float16_t)0.8330078125000f,
+(float16_t)0.5493164062500f,(float16_t)0.8359375000000f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5415039062500f,(float16_t)0.8408203125000f,
+(float16_t)0.5375976562500f,(float16_t)0.8432617187500f,
+(float16_t)0.5336914062500f,(float16_t)0.8457031250000f,
+(float16_t)0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)0.5258789062500f,(float16_t)0.8505859375000f,
+(float16_t)0.5219726562500f,(float16_t)0.8530273437500f,
+(float16_t)0.5180664062500f,(float16_t)0.8554687500000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.5102539062500f,(float16_t)0.8598632812500f,
+(float16_t)0.5063476562500f,(float16_t)0.8623046875000f,
+(float16_t)0.5024414062500f,(float16_t)0.8647460937500f,
+(float16_t)0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)0.4941406250000f,(float16_t)0.8691406250000f,
+(float16_t)0.4902343750000f,(float16_t)0.8715820312500f,
+(float16_t)0.4863281250000f,(float16_t)0.8740234375000f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4780273437500f,(float16_t)0.8784179687500f,
+(float16_t)0.4741210937500f,(float16_t)0.8803710937500f,
+(float16_t)0.4699707031250f,(float16_t)0.8828125000000f,
+(float16_t)0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)0.4619140625000f,(float16_t)0.8867187500000f,
+(float16_t)0.4577636718750f,(float16_t)0.8891601562500f,
+(float16_t)0.4536132812500f,(float16_t)0.8911132812500f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4455566406250f,(float16_t)0.8955078125000f,
+(float16_t)0.4414062500000f,(float16_t)0.8974609375000f,
+(float16_t)0.4372558593750f,(float16_t)0.8994140625000f,
+(float16_t)0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)0.4289550781250f,(float16_t)0.9033203125000f,
+(float16_t)0.4248046875000f,(float16_t)0.9052734375000f,
+(float16_t)0.4206542968750f,(float16_t)0.9072265625000f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.4123535156250f,(float16_t)0.9111328125000f,
+(float16_t)0.4079589843750f,(float16_t)0.9130859375000f,
+(float16_t)0.4038085937500f,(float16_t)0.9150390625000f,
+(float16_t)0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)0.3955078125000f,(float16_t)0.9184570312500f,
+(float16_t)0.3911132812500f,(float16_t)0.9204101562500f,
+(float16_t)0.3869628906250f,(float16_t)0.9218750000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3784179687500f,(float16_t)0.9257812500000f,
+(float16_t)0.3742675781250f,(float16_t)0.9272460937500f,
+(float16_t)0.3698730468750f,(float16_t)0.9291992187500f,
+(float16_t)0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)0.3613281250000f,(float16_t)0.9326171875000f,
+(float16_t)0.3569335937500f,(float16_t)0.9340820312500f,
+(float16_t)0.3527832031250f,(float16_t)0.9355468750000f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3439941406250f,(float16_t)0.9389648437500f,
+(float16_t)0.3398437500000f,(float16_t)0.9404296875000f,
+(float16_t)0.3354492187500f,(float16_t)0.9418945312500f,
+(float16_t)0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)0.3266601562500f,(float16_t)0.9453125000000f,
+(float16_t)0.3225097656250f,(float16_t)0.9467773437500f,
+(float16_t)0.3181152343750f,(float16_t)0.9482421875000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.3093261718750f,(float16_t)0.9511718750000f,
+(float16_t)0.3049316406250f,(float16_t)0.9521484375000f,
+(float16_t)0.3005371093750f,(float16_t)0.9536132812500f,
+(float16_t)0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)0.2917480468750f,(float16_t)0.9565429687500f,
+(float16_t)0.2873535156250f,(float16_t)0.9580078125000f,
+(float16_t)0.2829589843750f,(float16_t)0.9589843750000f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2741699218750f,(float16_t)0.9619140625000f,
+(float16_t)0.2697753906250f,(float16_t)0.9628906250000f,
+(float16_t)0.2651367187500f,(float16_t)0.9643554687500f,
+(float16_t)0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)0.2563476562500f,(float16_t)0.9667968750000f,
+(float16_t)0.2519531250000f,(float16_t)0.9677734375000f,
+(float16_t)0.2474365234375f,(float16_t)0.9687500000000f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2385253906250f,(float16_t)0.9711914062500f,
+(float16_t)0.2340087890625f,(float16_t)0.9721679687500f,
+(float16_t)0.2296142578125f,(float16_t)0.9731445312500f,
+(float16_t)0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)0.2205810546875f,(float16_t)0.9755859375000f,
+(float16_t)0.2160644531250f,(float16_t)0.9765625000000f,
+(float16_t)0.2116699218750f,(float16_t)0.9775390625000f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.2026367187500f,(float16_t)0.9794921875000f,
+(float16_t)0.1981201171875f,(float16_t)0.9799804687500f,
+(float16_t)0.1936035156250f,(float16_t)0.9809570312500f,
+(float16_t)0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)0.1845703125000f,(float16_t)0.9829101562500f,
+(float16_t)0.1800537109375f,(float16_t)0.9838867187500f,
+(float16_t)0.1755371093750f,(float16_t)0.9843750000000f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1663818359375f,(float16_t)0.9858398437500f,
+(float16_t)0.1618652343750f,(float16_t)0.9868164062500f,
+(float16_t)0.1573486328125f,(float16_t)0.9873046875000f,
+(float16_t)0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)0.1481933593750f,(float16_t)0.9887695312500f,
+(float16_t)0.1436767578125f,(float16_t)0.9897460937500f,
+(float16_t)0.1391601562500f,(float16_t)0.9902343750000f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1300048828125f,(float16_t)0.9916992187500f,
+(float16_t)0.1254882812500f,(float16_t)0.9921875000000f,
+(float16_t)0.1209106445312f,(float16_t)0.9926757812500f,
+(float16_t)0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)0.1117553710938f,(float16_t)0.9936523437500f,
+(float16_t)0.1071777343750f,(float16_t)0.9941406250000f,
+(float16_t)0.1026000976562f,(float16_t)0.9946289062500f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0934448242188f,(float16_t)0.9956054687500f,
+(float16_t)0.0888671875000f,(float16_t)0.9960937500000f,
+(float16_t)0.0842895507812f,(float16_t)0.9965820312500f,
+(float16_t)0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)0.0750732421875f,(float16_t)0.9970703125000f,
+(float16_t)0.0704956054688f,(float16_t)0.9975585937500f,
+(float16_t)0.0659179687500f,(float16_t)0.9980468750000f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0567321777344f,(float16_t)0.9985351562500f,
+(float16_t)0.0521240234375f,(float16_t)0.9985351562500f,
+(float16_t)0.0475463867188f,(float16_t)0.9990234375000f,
+(float16_t)0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)0.0383300781250f,(float16_t)0.9990234375000f,
+(float16_t)0.0337524414062f,(float16_t)0.9995117187500f,
+(float16_t)0.0291442871094f,(float16_t)0.9995117187500f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0199432373047f,(float16_t)1.0000000000000f,
+(float16_t)0.0153427124023f,(float16_t)1.0000000000000f,
+(float16_t)0.0107345581055f,(float16_t)1.0000000000000f,
+(float16_t)0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)0.0015335083008f,(float16_t)1.0000000000000f,
+(float16_t)-0.0030670166016f,(float16_t)1.0000000000000f,
+(float16_t)-0.0076713562012f,(float16_t)1.0000000000000f,
+(float16_t)-0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)-0.0168762207031f,(float16_t)1.0000000000000f,
+(float16_t)-0.0214691162109f,(float16_t)1.0000000000000f,
+(float16_t)-0.0260772705078f,(float16_t)0.9995117187500f,
+(float16_t)-0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)-0.0352783203125f,(float16_t)0.9995117187500f,
+(float16_t)-0.0398864746094f,(float16_t)0.9990234375000f,
+(float16_t)-0.0444641113281f,(float16_t)0.9990234375000f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0536499023438f,(float16_t)0.9985351562500f,
+(float16_t)-0.0582580566406f,(float16_t)0.9985351562500f,
+(float16_t)-0.0628662109375f,(float16_t)0.9980468750000f,
+(float16_t)-0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)-0.0720214843750f,(float16_t)0.9975585937500f,
+(float16_t)-0.0765991210938f,(float16_t)0.9970703125000f,
+(float16_t)-0.0812377929688f,(float16_t)0.9965820312500f,
+(float16_t)-0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)-0.0903930664062f,(float16_t)0.9960937500000f,
+(float16_t)-0.0949707031250f,(float16_t)0.9956054687500f,
+(float16_t)-0.0995483398438f,(float16_t)0.9951171875000f,
+(float16_t)-0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)-0.1087036132812f,(float16_t)0.9941406250000f,
+(float16_t)-0.1132812500000f,(float16_t)0.9936523437500f,
+(float16_t)-0.1178588867188f,(float16_t)0.9931640625000f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1269531250000f,(float16_t)0.9916992187500f,
+(float16_t)-0.1315917968750f,(float16_t)0.9912109375000f,
+(float16_t)-0.1361083984375f,(float16_t)0.9907226562500f,
+(float16_t)-0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)-0.1452636718750f,(float16_t)0.9892578125000f,
+(float16_t)-0.1497802734375f,(float16_t)0.9887695312500f,
+(float16_t)-0.1542968750000f,(float16_t)0.9877929687500f,
+(float16_t)-0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)-0.1634521484375f,(float16_t)0.9863281250000f,
+(float16_t)-0.1679687500000f,(float16_t)0.9858398437500f,
+(float16_t)-0.1724853515625f,(float16_t)0.9848632812500f,
+(float16_t)-0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)-0.1815185546875f,(float16_t)0.9833984375000f,
+(float16_t)-0.1860351562500f,(float16_t)0.9824218750000f,
+(float16_t)-0.1905517578125f,(float16_t)0.9814453125000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.1995849609375f,(float16_t)0.9799804687500f,
+(float16_t)-0.2041015625000f,(float16_t)0.9790039062500f,
+(float16_t)-0.2086181640625f,(float16_t)0.9780273437500f,
+(float16_t)-0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)-0.2176513671875f,(float16_t)0.9760742187500f,
+(float16_t)-0.2220458984375f,(float16_t)0.9750976562500f,
+(float16_t)-0.2265625000000f,(float16_t)0.9741210937500f,
+(float16_t)-0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)-0.2354736328125f,(float16_t)0.9716796875000f,
+(float16_t)-0.2399902343750f,(float16_t)0.9707031250000f,
+(float16_t)-0.2445068359375f,(float16_t)0.9697265625000f,
+(float16_t)-0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)-0.2534179687500f,(float16_t)0.9672851562500f,
+(float16_t)-0.2578125000000f,(float16_t)0.9663085937500f,
+(float16_t)-0.2622070312500f,(float16_t)0.9648437500000f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.2712402343750f,(float16_t)0.9624023437500f,
+(float16_t)-0.2756347656250f,(float16_t)0.9614257812500f,
+(float16_t)-0.2800292968750f,(float16_t)0.9599609375000f,
+(float16_t)-0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)-0.2888183593750f,(float16_t)0.9575195312500f,
+(float16_t)-0.2932128906250f,(float16_t)0.9560546875000f,
+(float16_t)-0.2976074218750f,(float16_t)0.9545898437500f,
+(float16_t)-0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)-0.3063964843750f,(float16_t)0.9521484375000f,
+(float16_t)-0.3107910156250f,(float16_t)0.9506835937500f,
+(float16_t)-0.3151855468750f,(float16_t)0.9492187500000f,
+(float16_t)-0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)-0.3239746093750f,(float16_t)0.9462890625000f,
+(float16_t)-0.3281250000000f,(float16_t)0.9448242187500f,
+(float16_t)-0.3325195312500f,(float16_t)0.9428710937500f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3413085937500f,(float16_t)0.9399414062500f,
+(float16_t)-0.3454589843750f,(float16_t)0.9384765625000f,
+(float16_t)-0.3498535156250f,(float16_t)0.9370117187500f,
+(float16_t)-0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)-0.3583984375000f,(float16_t)0.9335937500000f,
+(float16_t)-0.3627929687500f,(float16_t)0.9316406250000f,
+(float16_t)-0.3669433593750f,(float16_t)0.9301757812500f,
+(float16_t)-0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)-0.3754882812500f,(float16_t)0.9267578125000f,
+(float16_t)-0.3798828125000f,(float16_t)0.9252929687500f,
+(float16_t)-0.3840332031250f,(float16_t)0.9233398437500f,
+(float16_t)-0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)-0.3925781250000f,(float16_t)0.9199218750000f,
+(float16_t)-0.3967285156250f,(float16_t)0.9179687500000f,
+(float16_t)-0.4011230468750f,(float16_t)0.9160156250000f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4094238281250f,(float16_t)0.9121093750000f,
+(float16_t)-0.4135742187500f,(float16_t)0.9106445312500f,
+(float16_t)-0.4177246093750f,(float16_t)0.9086914062500f,
+(float16_t)-0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)-0.4262695312500f,(float16_t)0.9047851562500f,
+(float16_t)-0.4304199218750f,(float16_t)0.9028320312500f,
+(float16_t)-0.4345703125000f,(float16_t)0.9008789062500f,
+(float16_t)-0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)-0.4426269531250f,(float16_t)0.8964843750000f,
+(float16_t)-0.4467773437500f,(float16_t)0.8945312500000f,
+(float16_t)-0.4509277343750f,(float16_t)0.8925781250000f,
+(float16_t)-0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)-0.4592285156250f,(float16_t)0.8881835937500f,
+(float16_t)-0.4633789062500f,(float16_t)0.8862304687500f,
+(float16_t)-0.4672851562500f,(float16_t)0.8842773437500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.4753417968750f,(float16_t)0.8798828125000f,
+(float16_t)-0.4794921875000f,(float16_t)0.8774414062500f,
+(float16_t)-0.4836425781250f,(float16_t)0.8754882812500f,
+(float16_t)-0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)-0.4914550781250f,(float16_t)0.8706054687500f,
+(float16_t)-0.4956054687500f,(float16_t)0.8686523437500f,
+(float16_t)-0.4995117187500f,(float16_t)0.8662109375000f,
+(float16_t)-0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)-0.5073242187500f,(float16_t)0.8618164062500f,
+(float16_t)-0.5112304687500f,(float16_t)0.8593750000000f,
+(float16_t)-0.5156250000000f,(float16_t)0.8569335937500f,
+(float16_t)-0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)-0.5234375000000f,(float16_t)0.8520507812500f,
+(float16_t)-0.5273437500000f,(float16_t)0.8496093750000f,
+(float16_t)-0.5312500000000f,(float16_t)0.8471679687500f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5390625000000f,(float16_t)0.8422851562500f,
+(float16_t)-0.5429687500000f,(float16_t)0.8398437500000f,
+(float16_t)-0.5463867187500f,(float16_t)0.8374023437500f,
+(float16_t)-0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)-0.5541992187500f,(float16_t)0.8325195312500f,
+(float16_t)-0.5581054687500f,(float16_t)0.8295898437500f,
+(float16_t)-0.5620117187500f,(float16_t)0.8271484375000f,
+(float16_t)-0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)-0.5693359375000f,(float16_t)0.8217773437500f,
+(float16_t)-0.5732421875000f,(float16_t)0.8193359375000f,
+(float16_t)-0.5771484375000f,(float16_t)0.8168945312500f,
+(float16_t)-0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)-0.5844726562500f,(float16_t)0.8115234375000f,
+(float16_t)-0.5883789062500f,(float16_t)0.8085937500000f,
+(float16_t)-0.5917968750000f,(float16_t)0.8061523437500f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.5996093750000f,(float16_t)0.8002929687500f,
+(float16_t)-0.6030273437500f,(float16_t)0.7978515625000f,
+(float16_t)-0.6069335937500f,(float16_t)0.7949218750000f,
+(float16_t)-0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)-0.6142578125000f,(float16_t)0.7890625000000f,
+(float16_t)-0.6176757812500f,(float16_t)0.7866210937500f,
+(float16_t)-0.6210937500000f,(float16_t)0.7836914062500f,
+(float16_t)-0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)-0.6284179687500f,(float16_t)0.7778320312500f,
+(float16_t)-0.6318359375000f,(float16_t)0.7749023437500f,
+(float16_t)-0.6357421875000f,(float16_t)0.7719726562500f,
+(float16_t)-0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)-0.6425781250000f,(float16_t)0.7661132812500f,
+(float16_t)-0.6459960937500f,(float16_t)0.7631835937500f,
+(float16_t)-0.6499023437500f,(float16_t)0.7602539062500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.6567382812500f,(float16_t)0.7543945312500f,
+(float16_t)-0.6601562500000f,(float16_t)0.7509765625000f,
+(float16_t)-0.6635742187500f,(float16_t)0.7480468750000f,
+(float16_t)-0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)-0.6704101562500f,(float16_t)0.7421875000000f,
+(float16_t)-0.6738281250000f,(float16_t)0.7387695312500f,
+(float16_t)-0.6772460937500f,(float16_t)0.7358398437500f,
+(float16_t)-0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)-0.6840820312500f,(float16_t)0.7294921875000f,
+(float16_t)-0.6875000000000f,(float16_t)0.7265625000000f,
+(float16_t)-0.6904296875000f,(float16_t)0.7231445312500f,
+(float16_t)-0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)-0.6972656250000f,(float16_t)0.7167968750000f,
+(float16_t)-0.7006835937500f,(float16_t)0.7133789062500f,
+(float16_t)-0.7036132812500f,(float16_t)0.7104492187500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7104492187500f,(float16_t)0.7036132812500f,
+(float16_t)-0.7133789062500f,(float16_t)0.7006835937500f,
+(float16_t)-0.7167968750000f,(float16_t)0.6972656250000f,
+(float16_t)-0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)-0.7231445312500f,(float16_t)0.6904296875000f,
+(float16_t)-0.7265625000000f,(float16_t)0.6875000000000f,
+(float16_t)-0.7294921875000f,(float16_t)0.6840820312500f,
+(float16_t)-0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)-0.7358398437500f,(float16_t)0.6772460937500f,
+(float16_t)-0.7387695312500f,(float16_t)0.6738281250000f,
+(float16_t)-0.7421875000000f,(float16_t)0.6704101562500f,
+(float16_t)-0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)-0.7480468750000f,(float16_t)0.6635742187500f,
+(float16_t)-0.7509765625000f,(float16_t)0.6601562500000f,
+(float16_t)-0.7543945312500f,(float16_t)0.6567382812500f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.7602539062500f,(float16_t)0.6499023437500f,
+(float16_t)-0.7631835937500f,(float16_t)0.6459960937500f,
+(float16_t)-0.7661132812500f,(float16_t)0.6425781250000f,
+(float16_t)-0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)-0.7719726562500f,(float16_t)0.6357421875000f,
+(float16_t)-0.7749023437500f,(float16_t)0.6318359375000f,
+(float16_t)-0.7778320312500f,(float16_t)0.6284179687500f,
+(float16_t)-0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)-0.7836914062500f,(float16_t)0.6210937500000f,
+(float16_t)-0.7866210937500f,(float16_t)0.6176757812500f,
+(float16_t)-0.7890625000000f,(float16_t)0.6142578125000f,
+(float16_t)-0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)-0.7949218750000f,(float16_t)0.6069335937500f,
+(float16_t)-0.7978515625000f,(float16_t)0.6030273437500f,
+(float16_t)-0.8002929687500f,(float16_t)0.5996093750000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8061523437500f,(float16_t)0.5917968750000f,
+(float16_t)-0.8085937500000f,(float16_t)0.5883789062500f,
+(float16_t)-0.8115234375000f,(float16_t)0.5844726562500f,
+(float16_t)-0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)-0.8168945312500f,(float16_t)0.5771484375000f,
+(float16_t)-0.8193359375000f,(float16_t)0.5732421875000f,
+(float16_t)-0.8217773437500f,(float16_t)0.5693359375000f,
+(float16_t)-0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)-0.8271484375000f,(float16_t)0.5620117187500f,
+(float16_t)-0.8295898437500f,(float16_t)0.5581054687500f,
+(float16_t)-0.8325195312500f,(float16_t)0.5541992187500f,
+(float16_t)-0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)-0.8374023437500f,(float16_t)0.5463867187500f,
+(float16_t)-0.8398437500000f,(float16_t)0.5429687500000f,
+(float16_t)-0.8422851562500f,(float16_t)0.5390625000000f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8471679687500f,(float16_t)0.5312500000000f,
+(float16_t)-0.8496093750000f,(float16_t)0.5273437500000f,
+(float16_t)-0.8520507812500f,(float16_t)0.5234375000000f,
+(float16_t)-0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)-0.8569335937500f,(float16_t)0.5156250000000f,
+(float16_t)-0.8593750000000f,(float16_t)0.5112304687500f,
+(float16_t)-0.8618164062500f,(float16_t)0.5073242187500f,
+(float16_t)-0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)-0.8662109375000f,(float16_t)0.4995117187500f,
+(float16_t)-0.8686523437500f,(float16_t)0.4956054687500f,
+(float16_t)-0.8706054687500f,(float16_t)0.4914550781250f,
+(float16_t)-0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)-0.8754882812500f,(float16_t)0.4836425781250f,
+(float16_t)-0.8774414062500f,(float16_t)0.4794921875000f,
+(float16_t)-0.8798828125000f,(float16_t)0.4753417968750f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.8842773437500f,(float16_t)0.4672851562500f,
+(float16_t)-0.8862304687500f,(float16_t)0.4633789062500f,
+(float16_t)-0.8881835937500f,(float16_t)0.4592285156250f,
+(float16_t)-0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)-0.8925781250000f,(float16_t)0.4509277343750f,
+(float16_t)-0.8945312500000f,(float16_t)0.4467773437500f,
+(float16_t)-0.8964843750000f,(float16_t)0.4426269531250f,
+(float16_t)-0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)-0.9008789062500f,(float16_t)0.4345703125000f,
+(float16_t)-0.9028320312500f,(float16_t)0.4304199218750f,
+(float16_t)-0.9047851562500f,(float16_t)0.4262695312500f,
+(float16_t)-0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)-0.9086914062500f,(float16_t)0.4177246093750f,
+(float16_t)-0.9106445312500f,(float16_t)0.4135742187500f,
+(float16_t)-0.9121093750000f,(float16_t)0.4094238281250f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9160156250000f,(float16_t)0.4011230468750f,
+(float16_t)-0.9179687500000f,(float16_t)0.3967285156250f,
+(float16_t)-0.9199218750000f,(float16_t)0.3925781250000f,
+(float16_t)-0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)-0.9233398437500f,(float16_t)0.3840332031250f,
+(float16_t)-0.9252929687500f,(float16_t)0.3798828125000f,
+(float16_t)-0.9267578125000f,(float16_t)0.3754882812500f,
+(float16_t)-0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)-0.9301757812500f,(float16_t)0.3669433593750f,
+(float16_t)-0.9316406250000f,(float16_t)0.3627929687500f,
+(float16_t)-0.9335937500000f,(float16_t)0.3583984375000f,
+(float16_t)-0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)-0.9370117187500f,(float16_t)0.3498535156250f,
+(float16_t)-0.9384765625000f,(float16_t)0.3454589843750f,
+(float16_t)-0.9399414062500f,(float16_t)0.3413085937500f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9428710937500f,(float16_t)0.3325195312500f,
+(float16_t)-0.9448242187500f,(float16_t)0.3281250000000f,
+(float16_t)-0.9462890625000f,(float16_t)0.3239746093750f,
+(float16_t)-0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)-0.9492187500000f,(float16_t)0.3151855468750f,
+(float16_t)-0.9506835937500f,(float16_t)0.3107910156250f,
+(float16_t)-0.9521484375000f,(float16_t)0.3063964843750f,
+(float16_t)-0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)-0.9545898437500f,(float16_t)0.2976074218750f,
+(float16_t)-0.9560546875000f,(float16_t)0.2932128906250f,
+(float16_t)-0.9575195312500f,(float16_t)0.2888183593750f,
+(float16_t)-0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)-0.9599609375000f,(float16_t)0.2800292968750f,
+(float16_t)-0.9614257812500f,(float16_t)0.2756347656250f,
+(float16_t)-0.9624023437500f,(float16_t)0.2712402343750f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9648437500000f,(float16_t)0.2622070312500f,
+(float16_t)-0.9663085937500f,(float16_t)0.2578125000000f,
+(float16_t)-0.9672851562500f,(float16_t)0.2534179687500f,
+(float16_t)-0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)-0.9697265625000f,(float16_t)0.2445068359375f,
+(float16_t)-0.9707031250000f,(float16_t)0.2399902343750f,
+(float16_t)-0.9716796875000f,(float16_t)0.2354736328125f,
+(float16_t)-0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)-0.9741210937500f,(float16_t)0.2265625000000f,
+(float16_t)-0.9750976562500f,(float16_t)0.2220458984375f,
+(float16_t)-0.9760742187500f,(float16_t)0.2176513671875f,
+(float16_t)-0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)-0.9780273437500f,(float16_t)0.2086181640625f,
+(float16_t)-0.9790039062500f,(float16_t)0.2041015625000f,
+(float16_t)-0.9799804687500f,(float16_t)0.1995849609375f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9814453125000f,(float16_t)0.1905517578125f,
+(float16_t)-0.9824218750000f,(float16_t)0.1860351562500f,
+(float16_t)-0.9833984375000f,(float16_t)0.1815185546875f,
+(float16_t)-0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)-0.9848632812500f,(float16_t)0.1724853515625f,
+(float16_t)-0.9858398437500f,(float16_t)0.1679687500000f,
+(float16_t)-0.9863281250000f,(float16_t)0.1634521484375f,
+(float16_t)-0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)-0.9877929687500f,(float16_t)0.1542968750000f,
+(float16_t)-0.9887695312500f,(float16_t)0.1497802734375f,
+(float16_t)-0.9892578125000f,(float16_t)0.1452636718750f,
+(float16_t)-0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)-0.9907226562500f,(float16_t)0.1361083984375f,
+(float16_t)-0.9912109375000f,(float16_t)0.1315917968750f,
+(float16_t)-0.9916992187500f,(float16_t)0.1269531250000f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9931640625000f,(float16_t)0.1178588867188f,
+(float16_t)-0.9936523437500f,(float16_t)0.1132812500000f,
+(float16_t)-0.9941406250000f,(float16_t)0.1087036132812f,
+(float16_t)-0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)-0.9951171875000f,(float16_t)0.0995483398438f,
+(float16_t)-0.9956054687500f,(float16_t)0.0949707031250f,
+(float16_t)-0.9960937500000f,(float16_t)0.0903930664062f,
+(float16_t)-0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)-0.9965820312500f,(float16_t)0.0812377929688f,
+(float16_t)-0.9970703125000f,(float16_t)0.0765991210938f,
+(float16_t)-0.9975585937500f,(float16_t)0.0720214843750f,
+(float16_t)-0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)-0.9980468750000f,(float16_t)0.0628662109375f,
+(float16_t)-0.9985351562500f,(float16_t)0.0582580566406f,
+(float16_t)-0.9985351562500f,(float16_t)0.0536499023438f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9990234375000f,(float16_t)0.0444641113281f,
+(float16_t)-0.9990234375000f,(float16_t)0.0398864746094f,
+(float16_t)-0.9995117187500f,(float16_t)0.0352783203125f,
+(float16_t)-0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)-0.9995117187500f,(float16_t)0.0260772705078f,
+(float16_t)-1.0000000000000f,(float16_t)0.0214691162109f,
+(float16_t)-1.0000000000000f,(float16_t)0.0168762207031f,
+(float16_t)-1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)-1.0000000000000f,(float16_t)0.0076713562012f,
+(float16_t)-1.0000000000000f,(float16_t)0.0030670166016f,
+(float16_t)-1.0000000000000f,(float16_t)-0.0015335083008f,
+(float16_t)-1.0000000000000f,(float16_t)-0.0061340332031f,
+(float16_t)-1.0000000000000f,(float16_t)-0.0107345581055f,
+(float16_t)-1.0000000000000f,(float16_t)-0.0153427124023f,
+(float16_t)-1.0000000000000f,(float16_t)-0.0199432373047f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0291442871094f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0337524414062f,
+(float16_t)-0.9990234375000f,(float16_t)-0.0383300781250f,
+(float16_t)-0.9990234375000f,(float16_t)-0.0429382324219f,
+(float16_t)-0.9990234375000f,(float16_t)-0.0475463867188f,
+(float16_t)-0.9985351562500f,(float16_t)-0.0521240234375f,
+(float16_t)-0.9985351562500f,(float16_t)-0.0567321777344f,
+(float16_t)-0.9980468750000f,(float16_t)-0.0613098144531f,
+(float16_t)-0.9980468750000f,(float16_t)-0.0659179687500f,
+(float16_t)-0.9975585937500f,(float16_t)-0.0704956054688f,
+(float16_t)-0.9970703125000f,(float16_t)-0.0750732421875f,
+(float16_t)-0.9965820312500f,(float16_t)-0.0797119140625f,
+(float16_t)-0.9965820312500f,(float16_t)-0.0842895507812f,
+(float16_t)-0.9960937500000f,(float16_t)-0.0888671875000f,
+(float16_t)-0.9956054687500f,(float16_t)-0.0934448242188f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9946289062500f,(float16_t)-0.1026000976562f,
+(float16_t)-0.9941406250000f,(float16_t)-0.1071777343750f,
+(float16_t)-0.9936523437500f,(float16_t)-0.1117553710938f,
+(float16_t)-0.9931640625000f,(float16_t)-0.1163330078125f,
+(float16_t)-0.9926757812500f,(float16_t)-0.1209106445312f,
+(float16_t)-0.9921875000000f,(float16_t)-0.1254882812500f,
+(float16_t)-0.9916992187500f,(float16_t)-0.1300048828125f,
+(float16_t)-0.9907226562500f,(float16_t)-0.1345214843750f,
+(float16_t)-0.9902343750000f,(float16_t)-0.1391601562500f,
+(float16_t)-0.9897460937500f,(float16_t)-0.1436767578125f,
+(float16_t)-0.9887695312500f,(float16_t)-0.1481933593750f,
+(float16_t)-0.9882812500000f,(float16_t)-0.1528320312500f,
+(float16_t)-0.9873046875000f,(float16_t)-0.1573486328125f,
+(float16_t)-0.9868164062500f,(float16_t)-0.1618652343750f,
+(float16_t)-0.9858398437500f,(float16_t)-0.1663818359375f,
+(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f,
+(float16_t)-0.9843750000000f,(float16_t)-0.1755371093750f,
+(float16_t)-0.9838867187500f,(float16_t)-0.1800537109375f,
+(float16_t)-0.9829101562500f,(float16_t)-0.1845703125000f,
+(float16_t)-0.9819335937500f,(float16_t)-0.1890869140625f,
+(float16_t)-0.9809570312500f,(float16_t)-0.1936035156250f,
+(float16_t)-0.9799804687500f,(float16_t)-0.1981201171875f,
+(float16_t)-0.9794921875000f,(float16_t)-0.2026367187500f,
+(float16_t)-0.9785156250000f,(float16_t)-0.2071533203125f,
+(float16_t)-0.9775390625000f,(float16_t)-0.2116699218750f,
+(float16_t)-0.9765625000000f,(float16_t)-0.2160644531250f,
+(float16_t)-0.9755859375000f,(float16_t)-0.2205810546875f,
+(float16_t)-0.9741210937500f,(float16_t)-0.2250976562500f,
+(float16_t)-0.9731445312500f,(float16_t)-0.2296142578125f,
+(float16_t)-0.9721679687500f,(float16_t)-0.2340087890625f,
+(float16_t)-0.9711914062500f,(float16_t)-0.2385253906250f,
+(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f,
+(float16_t)-0.9687500000000f,(float16_t)-0.2474365234375f,
+(float16_t)-0.9677734375000f,(float16_t)-0.2519531250000f,
+(float16_t)-0.9667968750000f,(float16_t)-0.2563476562500f,
+(float16_t)-0.9653320312500f,(float16_t)-0.2607421875000f,
+(float16_t)-0.9643554687500f,(float16_t)-0.2651367187500f,
+(float16_t)-0.9628906250000f,(float16_t)-0.2697753906250f,
+(float16_t)-0.9619140625000f,(float16_t)-0.2741699218750f,
+(float16_t)-0.9604492187500f,(float16_t)-0.2785644531250f,
+(float16_t)-0.9589843750000f,(float16_t)-0.2829589843750f,
+(float16_t)-0.9580078125000f,(float16_t)-0.2873535156250f,
+(float16_t)-0.9565429687500f,(float16_t)-0.2917480468750f,
+(float16_t)-0.9550781250000f,(float16_t)-0.2961425781250f,
+(float16_t)-0.9536132812500f,(float16_t)-0.3005371093750f,
+(float16_t)-0.9521484375000f,(float16_t)-0.3049316406250f,
+(float16_t)-0.9511718750000f,(float16_t)-0.3093261718750f,
+(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f,
+(float16_t)-0.9482421875000f,(float16_t)-0.3181152343750f,
+(float16_t)-0.9467773437500f,(float16_t)-0.3225097656250f,
+(float16_t)-0.9453125000000f,(float16_t)-0.3266601562500f,
+(float16_t)-0.9433593750000f,(float16_t)-0.3310546875000f,
+(float16_t)-0.9418945312500f,(float16_t)-0.3354492187500f,
+(float16_t)-0.9404296875000f,(float16_t)-0.3398437500000f,
+(float16_t)-0.9389648437500f,(float16_t)-0.3439941406250f,
+(float16_t)-0.9375000000000f,(float16_t)-0.3483886718750f,
+(float16_t)-0.9355468750000f,(float16_t)-0.3527832031250f,
+(float16_t)-0.9340820312500f,(float16_t)-0.3569335937500f,
+(float16_t)-0.9326171875000f,(float16_t)-0.3613281250000f,
+(float16_t)-0.9306640625000f,(float16_t)-0.3657226562500f,
+(float16_t)-0.9291992187500f,(float16_t)-0.3698730468750f,
+(float16_t)-0.9272460937500f,(float16_t)-0.3742675781250f,
+(float16_t)-0.9257812500000f,(float16_t)-0.3784179687500f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.9218750000000f,(float16_t)-0.3869628906250f,
+(float16_t)-0.9204101562500f,(float16_t)-0.3911132812500f,
+(float16_t)-0.9184570312500f,(float16_t)-0.3955078125000f,
+(float16_t)-0.9165039062500f,(float16_t)-0.3996582031250f,
+(float16_t)-0.9150390625000f,(float16_t)-0.4038085937500f,
+(float16_t)-0.9130859375000f,(float16_t)-0.4079589843750f,
+(float16_t)-0.9111328125000f,(float16_t)-0.4123535156250f,
+(float16_t)-0.9091796875000f,(float16_t)-0.4165039062500f,
+(float16_t)-0.9072265625000f,(float16_t)-0.4206542968750f,
+(float16_t)-0.9052734375000f,(float16_t)-0.4248046875000f,
+(float16_t)-0.9033203125000f,(float16_t)-0.4289550781250f,
+(float16_t)-0.9013671875000f,(float16_t)-0.4331054687500f,
+(float16_t)-0.8994140625000f,(float16_t)-0.4372558593750f,
+(float16_t)-0.8974609375000f,(float16_t)-0.4414062500000f,
+(float16_t)-0.8955078125000f,(float16_t)-0.4455566406250f,
+(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f,
+(float16_t)-0.8911132812500f,(float16_t)-0.4536132812500f,
+(float16_t)-0.8891601562500f,(float16_t)-0.4577636718750f,
+(float16_t)-0.8867187500000f,(float16_t)-0.4619140625000f,
+(float16_t)-0.8847656250000f,(float16_t)-0.4660644531250f,
+(float16_t)-0.8828125000000f,(float16_t)-0.4699707031250f,
+(float16_t)-0.8803710937500f,(float16_t)-0.4741210937500f,
+(float16_t)-0.8784179687500f,(float16_t)-0.4780273437500f,
+(float16_t)-0.8759765625000f,(float16_t)-0.4821777343750f,
+(float16_t)-0.8740234375000f,(float16_t)-0.4863281250000f,
+(float16_t)-0.8715820312500f,(float16_t)-0.4902343750000f,
+(float16_t)-0.8691406250000f,(float16_t)-0.4941406250000f,
+(float16_t)-0.8671875000000f,(float16_t)-0.4982910156250f,
+(float16_t)-0.8647460937500f,(float16_t)-0.5024414062500f,
+(float16_t)-0.8623046875000f,(float16_t)-0.5063476562500f,
+(float16_t)-0.8598632812500f,(float16_t)-0.5102539062500f,
+(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f,
+(float16_t)-0.8554687500000f,(float16_t)-0.5180664062500f,
+(float16_t)-0.8530273437500f,(float16_t)-0.5219726562500f,
+(float16_t)-0.8505859375000f,(float16_t)-0.5258789062500f,
+(float16_t)-0.8481445312500f,(float16_t)-0.5297851562500f,
+(float16_t)-0.8457031250000f,(float16_t)-0.5336914062500f,
+(float16_t)-0.8432617187500f,(float16_t)-0.5375976562500f,
+(float16_t)-0.8408203125000f,(float16_t)-0.5415039062500f,
+(float16_t)-0.8383789062500f,(float16_t)-0.5454101562500f,
+(float16_t)-0.8359375000000f,(float16_t)-0.5493164062500f,
+(float16_t)-0.8330078125000f,(float16_t)-0.5532226562500f,
+(float16_t)-0.8305664062500f,(float16_t)-0.5566406250000f,
+(float16_t)-0.8281250000000f,(float16_t)-0.5605468750000f,
+(float16_t)-0.8256835937500f,(float16_t)-0.5644531250000f,
+(float16_t)-0.8227539062500f,(float16_t)-0.5683593750000f,
+(float16_t)-0.8203125000000f,(float16_t)-0.5722656250000f,
+(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f,
+(float16_t)-0.8149414062500f,(float16_t)-0.5795898437500f,
+(float16_t)-0.8120117187500f,(float16_t)-0.5834960937500f,
+(float16_t)-0.8095703125000f,(float16_t)-0.5869140625000f,
+(float16_t)-0.8066406250000f,(float16_t)-0.5908203125000f,
+(float16_t)-0.8041992187500f,(float16_t)-0.5942382812500f,
+(float16_t)-0.8012695312500f,(float16_t)-0.5981445312500f,
+(float16_t)-0.7988281250000f,(float16_t)-0.6020507812500f,
+(float16_t)-0.7958984375000f,(float16_t)-0.6054687500000f,
+(float16_t)-0.7929687500000f,(float16_t)-0.6093750000000f,
+(float16_t)-0.7900390625000f,(float16_t)-0.6127929687500f,
+(float16_t)-0.7875976562500f,(float16_t)-0.6162109375000f,
+(float16_t)-0.7846679687500f,(float16_t)-0.6201171875000f,
+(float16_t)-0.7817382812500f,(float16_t)-0.6235351562500f,
+(float16_t)-0.7788085937500f,(float16_t)-0.6274414062500f,
+(float16_t)-0.7758789062500f,(float16_t)-0.6308593750000f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.7700195312500f,(float16_t)-0.6381835937500f,
+(float16_t)-0.7670898437500f,(float16_t)-0.6416015625000f,
+(float16_t)-0.7641601562500f,(float16_t)-0.6450195312500f,
+(float16_t)-0.7612304687500f,(float16_t)-0.6484375000000f,
+(float16_t)-0.7583007812500f,(float16_t)-0.6518554687500f,
+(float16_t)-0.7553710937500f,(float16_t)-0.6552734375000f,
+(float16_t)-0.7519531250000f,(float16_t)-0.6591796875000f,
+(float16_t)-0.7490234375000f,(float16_t)-0.6625976562500f,
+(float16_t)-0.7460937500000f,(float16_t)-0.6660156250000f,
+(float16_t)-0.7431640625000f,(float16_t)-0.6694335937500f,
+(float16_t)-0.7397460937500f,(float16_t)-0.6728515625000f,
+(float16_t)-0.7368164062500f,(float16_t)-0.6762695312500f,
+(float16_t)-0.7338867187500f,(float16_t)-0.6796875000000f,
+(float16_t)-0.7304687500000f,(float16_t)-0.6826171875000f,
+(float16_t)-0.7275390625000f,(float16_t)-0.6860351562500f,
+(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f,
+(float16_t)-0.7211914062500f,(float16_t)-0.6928710937500f,
+(float16_t)-0.7177734375000f,(float16_t)-0.6962890625000f,
+(float16_t)-0.7148437500000f,(float16_t)-0.6997070312500f,
+(float16_t)-0.7114257812500f,(float16_t)-0.7026367187500f,
+(float16_t)-0.7080078125000f,(float16_t)-0.7060546875000f,
+(float16_t)-0.7050781250000f,(float16_t)-0.7094726562500f,
+(float16_t)-0.7016601562500f,(float16_t)-0.7124023437500f,
+(float16_t)-0.6982421875000f,(float16_t)-0.7158203125000f,
+(float16_t)-0.6953125000000f,(float16_t)-0.7187500000000f,
+(float16_t)-0.6918945312500f,(float16_t)-0.7221679687500f,
+(float16_t)-0.6884765625000f,(float16_t)-0.7250976562500f,
+(float16_t)-0.6850585937500f,(float16_t)-0.7285156250000f,
+(float16_t)-0.6816406250000f,(float16_t)-0.7314453125000f,
+(float16_t)-0.6782226562500f,(float16_t)-0.7348632812500f,
+(float16_t)-0.6748046875000f,(float16_t)-0.7377929687500f,
+(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f,
+(float16_t)-0.6679687500000f,(float16_t)-0.7441406250000f,
+(float16_t)-0.6645507812500f,(float16_t)-0.7470703125000f,
+(float16_t)-0.6611328125000f,(float16_t)-0.7500000000000f,
+(float16_t)-0.6577148437500f,(float16_t)-0.7534179687500f,
+(float16_t)-0.6542968750000f,(float16_t)-0.7563476562500f,
+(float16_t)-0.6508789062500f,(float16_t)-0.7592773437500f,
+(float16_t)-0.6474609375000f,(float16_t)-0.7622070312500f,
+(float16_t)-0.6440429687500f,(float16_t)-0.7651367187500f,
+(float16_t)-0.6401367187500f,(float16_t)-0.7680664062500f,
+(float16_t)-0.6367187500000f,(float16_t)-0.7709960937500f,
+(float16_t)-0.6333007812500f,(float16_t)-0.7739257812500f,
+(float16_t)-0.6293945312500f,(float16_t)-0.7768554687500f,
+(float16_t)-0.6259765625000f,(float16_t)-0.7797851562500f,
+(float16_t)-0.6225585937500f,(float16_t)-0.7827148437500f,
+(float16_t)-0.6186523437500f,(float16_t)-0.7856445312500f,
+(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f,
+(float16_t)-0.6118164062500f,(float16_t)-0.7910156250000f,
+(float16_t)-0.6079101562500f,(float16_t)-0.7939453125000f,
+(float16_t)-0.6044921875000f,(float16_t)-0.7968750000000f,
+(float16_t)-0.6005859375000f,(float16_t)-0.7993164062500f,
+(float16_t)-0.5971679687500f,(float16_t)-0.8022460937500f,
+(float16_t)-0.5932617187500f,(float16_t)-0.8051757812500f,
+(float16_t)-0.5893554687500f,(float16_t)-0.8076171875000f,
+(float16_t)-0.5859375000000f,(float16_t)-0.8105468750000f,
+(float16_t)-0.5820312500000f,(float16_t)-0.8129882812500f,
+(float16_t)-0.5781250000000f,(float16_t)-0.8159179687500f,
+(float16_t)-0.5747070312500f,(float16_t)-0.8183593750000f,
+(float16_t)-0.5708007812500f,(float16_t)-0.8212890625000f,
+(float16_t)-0.5668945312500f,(float16_t)-0.8237304687500f,
+(float16_t)-0.5629882812500f,(float16_t)-0.8261718750000f,
+(float16_t)-0.5595703125000f,(float16_t)-0.8291015625000f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.5517578125000f,(float16_t)-0.8339843750000f,
+(float16_t)-0.5478515625000f,(float16_t)-0.8364257812500f,
+(float16_t)-0.5439453125000f,(float16_t)-0.8388671875000f,
+(float16_t)-0.5400390625000f,(float16_t)-0.8417968750000f,
+(float16_t)-0.5361328125000f,(float16_t)-0.8442382812500f,
+(float16_t)-0.5322265625000f,(float16_t)-0.8466796875000f,
+(float16_t)-0.5283203125000f,(float16_t)-0.8491210937500f,
+(float16_t)-0.5244140625000f,(float16_t)-0.8515625000000f,
+(float16_t)-0.5205078125000f,(float16_t)-0.8540039062500f,
+(float16_t)-0.5166015625000f,(float16_t)-0.8559570312500f,
+(float16_t)-0.5126953125000f,(float16_t)-0.8583984375000f,
+(float16_t)-0.5087890625000f,(float16_t)-0.8608398437500f,
+(float16_t)-0.5048828125000f,(float16_t)-0.8632812500000f,
+(float16_t)-0.5009765625000f,(float16_t)-0.8657226562500f,
+(float16_t)-0.4968261718750f,(float16_t)-0.8676757812500f,
+(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f,
+(float16_t)-0.4887695312500f,(float16_t)-0.8725585937500f,
+(float16_t)-0.4848632812500f,(float16_t)-0.8745117187500f,
+(float16_t)-0.4809570312500f,(float16_t)-0.8769531250000f,
+(float16_t)-0.4768066406250f,(float16_t)-0.8789062500000f,
+(float16_t)-0.4726562500000f,(float16_t)-0.8813476562500f,
+(float16_t)-0.4687500000000f,(float16_t)-0.8833007812500f,
+(float16_t)-0.4645996093750f,(float16_t)-0.8857421875000f,
+(float16_t)-0.4604492187500f,(float16_t)-0.8876953125000f,
+(float16_t)-0.4565429687500f,(float16_t)-0.8896484375000f,
+(float16_t)-0.4523925781250f,(float16_t)-0.8916015625000f,
+(float16_t)-0.4482421875000f,(float16_t)-0.8940429687500f,
+(float16_t)-0.4440917968750f,(float16_t)-0.8959960937500f,
+(float16_t)-0.4399414062500f,(float16_t)-0.8979492187500f,
+(float16_t)-0.4357910156250f,(float16_t)-0.8999023437500f,
+(float16_t)-0.4316406250000f,(float16_t)-0.9018554687500f,
+(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f,
+(float16_t)-0.4233398437500f,(float16_t)-0.9057617187500f,
+(float16_t)-0.4191894531250f,(float16_t)-0.9077148437500f,
+(float16_t)-0.4150390625000f,(float16_t)-0.9096679687500f,
+(float16_t)-0.4108886718750f,(float16_t)-0.9116210937500f,
+(float16_t)-0.4067382812500f,(float16_t)-0.9135742187500f,
+(float16_t)-0.4023437500000f,(float16_t)-0.9155273437500f,
+(float16_t)-0.3981933593750f,(float16_t)-0.9174804687500f,
+(float16_t)-0.3940429687500f,(float16_t)-0.9189453125000f,
+(float16_t)-0.3896484375000f,(float16_t)-0.9208984375000f,
+(float16_t)-0.3854980468750f,(float16_t)-0.9228515625000f,
+(float16_t)-0.3813476562500f,(float16_t)-0.9243164062500f,
+(float16_t)-0.3769531250000f,(float16_t)-0.9262695312500f,
+(float16_t)-0.3728027343750f,(float16_t)-0.9277343750000f,
+(float16_t)-0.3684082031250f,(float16_t)-0.9296875000000f,
+(float16_t)-0.3642578125000f,(float16_t)-0.9311523437500f,
+(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f,
+(float16_t)-0.3557128906250f,(float16_t)-0.9345703125000f,
+(float16_t)-0.3513183593750f,(float16_t)-0.9360351562500f,
+(float16_t)-0.3469238281250f,(float16_t)-0.9379882812500f,
+(float16_t)-0.3427734375000f,(float16_t)-0.9394531250000f,
+(float16_t)-0.3383789062500f,(float16_t)-0.9409179687500f,
+(float16_t)-0.3339843750000f,(float16_t)-0.9423828125000f,
+(float16_t)-0.3295898437500f,(float16_t)-0.9443359375000f,
+(float16_t)-0.3251953125000f,(float16_t)-0.9458007812500f,
+(float16_t)-0.3210449218750f,(float16_t)-0.9472656250000f,
+(float16_t)-0.3166503906250f,(float16_t)-0.9487304687500f,
+(float16_t)-0.3122558593750f,(float16_t)-0.9501953125000f,
+(float16_t)-0.3078613281250f,(float16_t)-0.9516601562500f,
+(float16_t)-0.3034667968750f,(float16_t)-0.9526367187500f,
+(float16_t)-0.2990722656250f,(float16_t)-0.9541015625000f,
+(float16_t)-0.2946777343750f,(float16_t)-0.9555664062500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)-0.2858886718750f,(float16_t)-0.9584960937500f,
+(float16_t)-0.2814941406250f,(float16_t)-0.9594726562500f,
+(float16_t)-0.2770996093750f,(float16_t)-0.9609375000000f,
+(float16_t)-0.2727050781250f,(float16_t)-0.9619140625000f,
+(float16_t)-0.2683105468750f,(float16_t)-0.9633789062500f,
+(float16_t)-0.2636718750000f,(float16_t)-0.9643554687500f,
+(float16_t)-0.2592773437500f,(float16_t)-0.9658203125000f,
+(float16_t)-0.2548828125000f,(float16_t)-0.9667968750000f,
+(float16_t)-0.2504882812500f,(float16_t)-0.9682617187500f,
+(float16_t)-0.2459716796875f,(float16_t)-0.9692382812500f,
+(float16_t)-0.2414550781250f,(float16_t)-0.9702148437500f,
+(float16_t)-0.2370605468750f,(float16_t)-0.9716796875000f,
+(float16_t)-0.2325439453125f,(float16_t)-0.9726562500000f,
+(float16_t)-0.2280273437500f,(float16_t)-0.9736328125000f,
+(float16_t)-0.2236328125000f,(float16_t)-0.9746093750000f,
+(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f,
+(float16_t)-0.2145996093750f,(float16_t)-0.9765625000000f,
+(float16_t)-0.2100830078125f,(float16_t)-0.9775390625000f,
+(float16_t)-0.2055664062500f,(float16_t)-0.9785156250000f,
+(float16_t)-0.2010498046875f,(float16_t)-0.9794921875000f,
+(float16_t)-0.1966552734375f,(float16_t)-0.9804687500000f,
+(float16_t)-0.1921386718750f,(float16_t)-0.9814453125000f,
+(float16_t)-0.1876220703125f,(float16_t)-0.9824218750000f,
+(float16_t)-0.1829833984375f,(float16_t)-0.9829101562500f,
+(float16_t)-0.1784667968750f,(float16_t)-0.9838867187500f,
+(float16_t)-0.1739501953125f,(float16_t)-0.9848632812500f,
+(float16_t)-0.1694335937500f,(float16_t)-0.9853515625000f,
+(float16_t)-0.1649169921875f,(float16_t)-0.9863281250000f,
+(float16_t)-0.1604003906250f,(float16_t)-0.9868164062500f,
+(float16_t)-0.1558837890625f,(float16_t)-0.9877929687500f,
+(float16_t)-0.1512451171875f,(float16_t)-0.9882812500000f,
+(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f,
+(float16_t)-0.1422119140625f,(float16_t)-0.9897460937500f,
+(float16_t)-0.1375732421875f,(float16_t)-0.9907226562500f,
+(float16_t)-0.1330566406250f,(float16_t)-0.9912109375000f,
+(float16_t)-0.1285400390625f,(float16_t)-0.9916992187500f,
+(float16_t)-0.1239624023438f,(float16_t)-0.9921875000000f,
+(float16_t)-0.1193847656250f,(float16_t)-0.9926757812500f,
+(float16_t)-0.1148071289062f,(float16_t)-0.9931640625000f,
+(float16_t)-0.1102294921875f,(float16_t)-0.9941406250000f,
+(float16_t)-0.1056518554688f,(float16_t)-0.9946289062500f,
+(float16_t)-0.1010742187500f,(float16_t)-0.9951171875000f,
+(float16_t)-0.0964965820312f,(float16_t)-0.9951171875000f,
+(float16_t)-0.0919189453125f,(float16_t)-0.9956054687500f,
+(float16_t)-0.0873413085938f,(float16_t)-0.9960937500000f,
+(float16_t)-0.0827636718750f,(float16_t)-0.9965820312500f,
+(float16_t)-0.0781250000000f,(float16_t)-0.9970703125000f,
+(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f,
+(float16_t)-0.0689697265625f,(float16_t)-0.9975585937500f,
+(float16_t)-0.0643920898438f,(float16_t)-0.9980468750000f,
+(float16_t)-0.0597839355469f,(float16_t)-0.9980468750000f,
+(float16_t)-0.0552062988281f,(float16_t)-0.9985351562500f,
+(float16_t)-0.0505981445312f,(float16_t)-0.9985351562500f,
+(float16_t)-0.0459899902344f,(float16_t)-0.9990234375000f,
+(float16_t)-0.0414123535156f,(float16_t)-0.9990234375000f,
+(float16_t)-0.0368041992188f,(float16_t)-0.9995117187500f,
+(float16_t)-0.0321960449219f,(float16_t)-0.9995117187500f,
+(float16_t)-0.0276031494141f,(float16_t)-0.9995117187500f,
+(float16_t)-0.0230102539062f,(float16_t)-0.9995117187500f,
+(float16_t)-0.0184020996094f,(float16_t)-1.0000000000000f,
+(float16_t)-0.0138015747070f,(float16_t)-1.0000000000000f,
+(float16_t)-0.0092010498047f,(float16_t)-1.0000000000000f,
+(float16_t)-0.0046005249023f,(float16_t)-1.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0184020996094f,
+(float16_t)0.9995117187500f,(float16_t)0.0368041992188f,
+(float16_t)0.9985351562500f,(float16_t)0.0552062988281f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9956054687500f,(float16_t)0.0919189453125f,
+(float16_t)0.9941406250000f,(float16_t)0.1102294921875f,
+(float16_t)0.9916992187500f,(float16_t)0.1285400390625f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9863281250000f,(float16_t)0.1649169921875f,
+(float16_t)0.9829101562500f,(float16_t)0.1829833984375f,
+(float16_t)0.9794921875000f,(float16_t)0.2010498046875f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9716796875000f,(float16_t)0.2370605468750f,
+(float16_t)0.9667968750000f,(float16_t)0.2548828125000f,
+(float16_t)0.9619140625000f,(float16_t)0.2727050781250f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9516601562500f,(float16_t)0.3078613281250f,
+(float16_t)0.9458007812500f,(float16_t)0.3251953125000f,
+(float16_t)0.9394531250000f,(float16_t)0.3427734375000f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9262695312500f,(float16_t)0.3769531250000f,
+(float16_t)0.9189453125000f,(float16_t)0.3940429687500f,
+(float16_t)0.9116210937500f,(float16_t)0.4108886718750f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8959960937500f,(float16_t)0.4440917968750f,
+(float16_t)0.8876953125000f,(float16_t)0.4604492187500f,
+(float16_t)0.8789062500000f,(float16_t)0.4768066406250f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8608398437500f,(float16_t)0.5087890625000f,
+(float16_t)0.8515625000000f,(float16_t)0.5244140625000f,
+(float16_t)0.8417968750000f,(float16_t)0.5400390625000f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.8212890625000f,(float16_t)0.5708007812500f,
+(float16_t)0.8105468750000f,(float16_t)0.5859375000000f,
+(float16_t)0.7993164062500f,(float16_t)0.6005859375000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7768554687500f,(float16_t)0.6293945312500f,
+(float16_t)0.7651367187500f,(float16_t)0.6440429687500f,
+(float16_t)0.7534179687500f,(float16_t)0.6577148437500f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.7285156250000f,(float16_t)0.6850585937500f,
+(float16_t)0.7158203125000f,(float16_t)0.6982421875000f,
+(float16_t)0.7026367187500f,(float16_t)0.7114257812500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6762695312500f,(float16_t)0.7368164062500f,
+(float16_t)0.6625976562500f,(float16_t)0.7490234375000f,
+(float16_t)0.6484375000000f,(float16_t)0.7612304687500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.6201171875000f,(float16_t)0.7846679687500f,
+(float16_t)0.6054687500000f,(float16_t)0.7958984375000f,
+(float16_t)0.5908203125000f,(float16_t)0.8066406250000f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5605468750000f,(float16_t)0.8281250000000f,
+(float16_t)0.5454101562500f,(float16_t)0.8383789062500f,
+(float16_t)0.5297851562500f,(float16_t)0.8481445312500f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4982910156250f,(float16_t)0.8671875000000f,
+(float16_t)0.4821777343750f,(float16_t)0.8759765625000f,
+(float16_t)0.4660644531250f,(float16_t)0.8847656250000f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.4331054687500f,(float16_t)0.9013671875000f,
+(float16_t)0.4165039062500f,(float16_t)0.9091796875000f,
+(float16_t)0.3996582031250f,(float16_t)0.9165039062500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3657226562500f,(float16_t)0.9306640625000f,
+(float16_t)0.3483886718750f,(float16_t)0.9375000000000f,
+(float16_t)0.3310546875000f,(float16_t)0.9433593750000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2961425781250f,(float16_t)0.9550781250000f,
+(float16_t)0.2785644531250f,(float16_t)0.9604492187500f,
+(float16_t)0.2607421875000f,(float16_t)0.9653320312500f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.2250976562500f,(float16_t)0.9741210937500f,
+(float16_t)0.2071533203125f,(float16_t)0.9785156250000f,
+(float16_t)0.1890869140625f,(float16_t)0.9819335937500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.1528320312500f,(float16_t)0.9882812500000f,
+(float16_t)0.1345214843750f,(float16_t)0.9907226562500f,
+(float16_t)0.1163330078125f,(float16_t)0.9931640625000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0797119140625f,(float16_t)0.9965820312500f,
+(float16_t)0.0613098144531f,(float16_t)0.9980468750000f,
+(float16_t)0.0429382324219f,(float16_t)0.9990234375000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)0.0061340332031f,(float16_t)1.0000000000000f,
+(float16_t)-0.0122680664062f,(float16_t)1.0000000000000f,
+(float16_t)-0.0306701660156f,(float16_t)0.9995117187500f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.0674438476562f,(float16_t)0.9975585937500f,
+(float16_t)-0.0858154296875f,(float16_t)0.9960937500000f,
+(float16_t)-0.1041259765625f,(float16_t)0.9946289062500f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1406250000000f,(float16_t)0.9902343750000f,
+(float16_t)-0.1588134765625f,(float16_t)0.9873046875000f,
+(float16_t)-0.1770019531250f,(float16_t)0.9843750000000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2131347656250f,(float16_t)0.9770507812500f,
+(float16_t)-0.2310791015625f,(float16_t)0.9731445312500f,
+(float16_t)-0.2489013671875f,(float16_t)0.9687500000000f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.2844238281250f,(float16_t)0.9584960937500f,
+(float16_t)-0.3020019531250f,(float16_t)0.9531250000000f,
+(float16_t)-0.3195800781250f,(float16_t)0.9477539062500f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.3542480468750f,(float16_t)0.9350585937500f,
+(float16_t)-0.3713378906250f,(float16_t)0.9287109375000f,
+(float16_t)-0.3884277343750f,(float16_t)0.9213867187500f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4221191406250f,(float16_t)0.9067382812500f,
+(float16_t)-0.4387207031250f,(float16_t)0.8984375000000f,
+(float16_t)-0.4550781250000f,(float16_t)0.8906250000000f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.4875488281250f,(float16_t)0.8730468750000f,
+(float16_t)-0.5034179687500f,(float16_t)0.8637695312500f,
+(float16_t)-0.5195312500000f,(float16_t)0.8544921875000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5502929687500f,(float16_t)0.8349609375000f,
+(float16_t)-0.5659179687500f,(float16_t)0.8247070312500f,
+(float16_t)-0.5810546875000f,(float16_t)0.8139648437500f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6103515625000f,(float16_t)0.7919921875000f,
+(float16_t)-0.6250000000000f,(float16_t)0.7807617187500f,
+(float16_t)-0.6391601562500f,(float16_t)0.7690429687500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.6669921875000f,(float16_t)0.7451171875000f,
+(float16_t)-0.6806640625000f,(float16_t)0.7324218750000f,
+(float16_t)-0.6938476562500f,(float16_t)0.7202148437500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7202148437500f,(float16_t)0.6938476562500f,
+(float16_t)-0.7324218750000f,(float16_t)0.6806640625000f,
+(float16_t)-0.7451171875000f,(float16_t)0.6669921875000f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.7690429687500f,(float16_t)0.6391601562500f,
+(float16_t)-0.7807617187500f,(float16_t)0.6250000000000f,
+(float16_t)-0.7919921875000f,(float16_t)0.6103515625000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8139648437500f,(float16_t)0.5810546875000f,
+(float16_t)-0.8247070312500f,(float16_t)0.5659179687500f,
+(float16_t)-0.8349609375000f,(float16_t)0.5502929687500f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8544921875000f,(float16_t)0.5195312500000f,
+(float16_t)-0.8637695312500f,(float16_t)0.5034179687500f,
+(float16_t)-0.8730468750000f,(float16_t)0.4875488281250f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.8906250000000f,(float16_t)0.4550781250000f,
+(float16_t)-0.8984375000000f,(float16_t)0.4387207031250f,
+(float16_t)-0.9067382812500f,(float16_t)0.4221191406250f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9213867187500f,(float16_t)0.3884277343750f,
+(float16_t)-0.9287109375000f,(float16_t)0.3713378906250f,
+(float16_t)-0.9350585937500f,(float16_t)0.3542480468750f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9477539062500f,(float16_t)0.3195800781250f,
+(float16_t)-0.9531250000000f,(float16_t)0.3020019531250f,
+(float16_t)-0.9584960937500f,(float16_t)0.2844238281250f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9687500000000f,(float16_t)0.2489013671875f,
+(float16_t)-0.9731445312500f,(float16_t)0.2310791015625f,
+(float16_t)-0.9770507812500f,(float16_t)0.2131347656250f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9843750000000f,(float16_t)0.1770019531250f,
+(float16_t)-0.9873046875000f,(float16_t)0.1588134765625f,
+(float16_t)-0.9902343750000f,(float16_t)0.1406250000000f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9946289062500f,(float16_t)0.1041259765625f,
+(float16_t)-0.9960937500000f,(float16_t)0.0858154296875f,
+(float16_t)-0.9975585937500f,(float16_t)0.0674438476562f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9995117187500f,(float16_t)0.0306701660156f,
+(float16_t)-1.0000000000000f,(float16_t)0.0122680664062f,
+(float16_t)-1.0000000000000f,(float16_t)-0.0061340332031f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f,
+(float16_t)-0.9990234375000f,(float16_t)-0.0429382324219f,
+(float16_t)-0.9980468750000f,(float16_t)-0.0613098144531f,
+(float16_t)-0.9965820312500f,(float16_t)-0.0797119140625f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9931640625000f,(float16_t)-0.1163330078125f,
+(float16_t)-0.9907226562500f,(float16_t)-0.1345214843750f,
+(float16_t)-0.9882812500000f,(float16_t)-0.1528320312500f,
+(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f,
+(float16_t)-0.9819335937500f,(float16_t)-0.1890869140625f,
+(float16_t)-0.9785156250000f,(float16_t)-0.2071533203125f,
+(float16_t)-0.9741210937500f,(float16_t)-0.2250976562500f,
+(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f,
+(float16_t)-0.9653320312500f,(float16_t)-0.2607421875000f,
+(float16_t)-0.9604492187500f,(float16_t)-0.2785644531250f,
+(float16_t)-0.9550781250000f,(float16_t)-0.2961425781250f,
+(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f,
+(float16_t)-0.9433593750000f,(float16_t)-0.3310546875000f,
+(float16_t)-0.9375000000000f,(float16_t)-0.3483886718750f,
+(float16_t)-0.9306640625000f,(float16_t)-0.3657226562500f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.9165039062500f,(float16_t)-0.3996582031250f,
+(float16_t)-0.9091796875000f,(float16_t)-0.4165039062500f,
+(float16_t)-0.9013671875000f,(float16_t)-0.4331054687500f,
+(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f,
+(float16_t)-0.8847656250000f,(float16_t)-0.4660644531250f,
+(float16_t)-0.8759765625000f,(float16_t)-0.4821777343750f,
+(float16_t)-0.8671875000000f,(float16_t)-0.4982910156250f,
+(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f,
+(float16_t)-0.8481445312500f,(float16_t)-0.5297851562500f,
+(float16_t)-0.8383789062500f,(float16_t)-0.5454101562500f,
+(float16_t)-0.8281250000000f,(float16_t)-0.5605468750000f,
+(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f,
+(float16_t)-0.8066406250000f,(float16_t)-0.5908203125000f,
+(float16_t)-0.7958984375000f,(float16_t)-0.6054687500000f,
+(float16_t)-0.7846679687500f,(float16_t)-0.6201171875000f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.7612304687500f,(float16_t)-0.6484375000000f,
+(float16_t)-0.7490234375000f,(float16_t)-0.6625976562500f,
+(float16_t)-0.7368164062500f,(float16_t)-0.6762695312500f,
+(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f,
+(float16_t)-0.7114257812500f,(float16_t)-0.7026367187500f,
+(float16_t)-0.6982421875000f,(float16_t)-0.7158203125000f,
+(float16_t)-0.6850585937500f,(float16_t)-0.7285156250000f,
+(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f,
+(float16_t)-0.6577148437500f,(float16_t)-0.7534179687500f,
+(float16_t)-0.6440429687500f,(float16_t)-0.7651367187500f,
+(float16_t)-0.6293945312500f,(float16_t)-0.7768554687500f,
+(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f,
+(float16_t)-0.6005859375000f,(float16_t)-0.7993164062500f,
+(float16_t)-0.5859375000000f,(float16_t)-0.8105468750000f,
+(float16_t)-0.5708007812500f,(float16_t)-0.8212890625000f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.5400390625000f,(float16_t)-0.8417968750000f,
+(float16_t)-0.5244140625000f,(float16_t)-0.8515625000000f,
+(float16_t)-0.5087890625000f,(float16_t)-0.8608398437500f,
+(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f,
+(float16_t)-0.4768066406250f,(float16_t)-0.8789062500000f,
+(float16_t)-0.4604492187500f,(float16_t)-0.8876953125000f,
+(float16_t)-0.4440917968750f,(float16_t)-0.8959960937500f,
+(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f,
+(float16_t)-0.4108886718750f,(float16_t)-0.9116210937500f,
+(float16_t)-0.3940429687500f,(float16_t)-0.9189453125000f,
+(float16_t)-0.3769531250000f,(float16_t)-0.9262695312500f,
+(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f,
+(float16_t)-0.3427734375000f,(float16_t)-0.9394531250000f,
+(float16_t)-0.3251953125000f,(float16_t)-0.9458007812500f,
+(float16_t)-0.3078613281250f,(float16_t)-0.9516601562500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)-0.2727050781250f,(float16_t)-0.9619140625000f,
+(float16_t)-0.2548828125000f,(float16_t)-0.9667968750000f,
+(float16_t)-0.2370605468750f,(float16_t)-0.9716796875000f,
+(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f,
+(float16_t)-0.2010498046875f,(float16_t)-0.9794921875000f,
+(float16_t)-0.1829833984375f,(float16_t)-0.9829101562500f,
+(float16_t)-0.1649169921875f,(float16_t)-0.9863281250000f,
+(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f,
+(float16_t)-0.1285400390625f,(float16_t)-0.9916992187500f,
+(float16_t)-0.1102294921875f,(float16_t)-0.9941406250000f,
+(float16_t)-0.0919189453125f,(float16_t)-0.9956054687500f,
+(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f,
+(float16_t)-0.0552062988281f,(float16_t)-0.9985351562500f,
+(float16_t)-0.0368041992188f,(float16_t)-0.9995117187500f,
+(float16_t)-0.0184020996094f,(float16_t)-1.0000000000000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9970703125000f,(float16_t)0.0735473632812f,
+(float16_t)0.9892578125000f,(float16_t)0.1467285156250f,
+(float16_t)0.9755859375000f,(float16_t)0.2191162109375f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.9331054687500f,(float16_t)0.3598632812500f,
+(float16_t)0.9038085937500f,(float16_t)0.4274902343750f,
+(float16_t)0.8701171875000f,(float16_t)0.4929199218750f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.7885742187500f,(float16_t)0.6152343750000f,
+(float16_t)0.7407226562500f,(float16_t)0.6713867187500f,
+(float16_t)0.6894531250000f,(float16_t)0.7241210937500f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.5756835937500f,(float16_t)0.8173828125000f,
+(float16_t)0.5141601562500f,(float16_t)0.8579101562500f,
+(float16_t)0.4497070312500f,(float16_t)0.8930664062500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.3137207031250f,(float16_t)0.9497070312500f,
+(float16_t)0.2429199218750f,(float16_t)0.9702148437500f,
+(float16_t)0.1710205078125f,(float16_t)0.9853515625000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)0.0245361328125f,(float16_t)0.9995117187500f,
+(float16_t)-0.0490722656250f,(float16_t)0.9990234375000f,
+(float16_t)-0.1224365234375f,(float16_t)0.9926757812500f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.2666015625000f,(float16_t)0.9638671875000f,
+(float16_t)-0.3369140625000f,(float16_t)0.9414062500000f,
+(float16_t)-0.4052734375000f,(float16_t)0.9140625000000f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.5351562500000f,(float16_t)0.8447265625000f,
+(float16_t)-0.5957031250000f,(float16_t)0.8032226562500f,
+(float16_t)-0.6533203125000f,(float16_t)0.7573242187500f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.7573242187500f,(float16_t)0.6533203125000f,
+(float16_t)-0.8032226562500f,(float16_t)0.5957031250000f,
+(float16_t)-0.8447265625000f,(float16_t)0.5351562500000f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9140625000000f,(float16_t)0.4052734375000f,
+(float16_t)-0.9414062500000f,(float16_t)0.3369140625000f,
+(float16_t)-0.9638671875000f,(float16_t)0.2666015625000f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9926757812500f,(float16_t)0.1224365234375f,
+(float16_t)-0.9990234375000f,(float16_t)0.0490722656250f,
+(float16_t)-0.9995117187500f,(float16_t)-0.0245361328125f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9853515625000f,(float16_t)-0.1710205078125f,
+(float16_t)-0.9702148437500f,(float16_t)-0.2429199218750f,
+(float16_t)-0.9497070312500f,(float16_t)-0.3137207031250f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.8930664062500f,(float16_t)-0.4497070312500f,
+(float16_t)-0.8579101562500f,(float16_t)-0.5141601562500f,
+(float16_t)-0.8173828125000f,(float16_t)-0.5756835937500f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.7241210937500f,(float16_t)-0.6894531250000f,
+(float16_t)-0.6713867187500f,(float16_t)-0.7407226562500f,
+(float16_t)-0.6152343750000f,(float16_t)-0.7885742187500f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.4929199218750f,(float16_t)-0.8701171875000f,
+(float16_t)-0.4274902343750f,(float16_t)-0.9038085937500f,
+(float16_t)-0.3598632812500f,(float16_t)-0.9331054687500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)-0.2191162109375f,(float16_t)-0.9755859375000f,
+(float16_t)-0.1467285156250f,(float16_t)-0.9892578125000f,
+(float16_t)-0.0735473632812f,(float16_t)-0.9970703125000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.9570312500000f,(float16_t)0.2902832031250f,
+(float16_t)0.8315429687500f,(float16_t)0.5556640625000f,
+(float16_t)0.6342773437500f,(float16_t)0.7729492187500f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)0.0980224609375f,(float16_t)0.9951171875000f,
+(float16_t)-0.1950683593750f,(float16_t)0.9809570312500f,
+(float16_t)-0.4714355468750f,(float16_t)0.8818359375000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.8818359375000f,(float16_t)0.4714355468750f,
+(float16_t)-0.9809570312500f,(float16_t)0.1950683593750f,
+(float16_t)-0.9951171875000f,(float16_t)-0.0980224609375f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,
+(float16_t)-0.7729492187500f,(float16_t)-0.6342773437500f,
+(float16_t)-0.5556640625000f,(float16_t)-0.8315429687500f,
+(float16_t)-0.2902832031250f,(float16_t)-0.9570312500000f,
+(float16_t)1.0000000000000f,(float16_t)0.0000000000000f,
+(float16_t)0.3825683593750f,(float16_t)0.9238281250000f,
+(float16_t)-0.7070312500000f,(float16_t)0.7070312500000f,
+(float16_t)-0.9238281250000f,(float16_t)-0.3825683593750f,};
+
+#endif
+
+
+
+#endif /* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES) */
+#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+#endif /* if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
index 2143739f..9b46bb35 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctions.c
@@ -1,46 +1,66 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        CompexMathFunctions.c
- * Description:  Combination of all comlex math function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_cmplx_conj_f32.c"
-#include "arm_cmplx_conj_q15.c"
-#include "arm_cmplx_conj_q31.c"
-#include "arm_cmplx_dot_prod_f32.c"
-#include "arm_cmplx_dot_prod_q15.c"
-#include "arm_cmplx_dot_prod_q31.c"
-#include "arm_cmplx_mag_f32.c"
-#include "arm_cmplx_mag_q15.c"
-#include "arm_cmplx_mag_q31.c"
-#include "arm_cmplx_mag_squared_f32.c"
-#include "arm_cmplx_mag_squared_q15.c"
-#include "arm_cmplx_mag_squared_q31.c"
-#include "arm_cmplx_mult_cmplx_f32.c"
-#include "arm_cmplx_mult_cmplx_q15.c"
-#include "arm_cmplx_mult_cmplx_q31.c"
-#include "arm_cmplx_mult_real_f32.c"
-#include "arm_cmplx_mult_real_q15.c"
-#include "arm_cmplx_mult_real_q31.c"
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CompexMathFunctions.c
+ * Description:  Combination of all comlex math function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_cmplx_conj_f32.c"
+#include "arm_cmplx_conj_q15.c"
+#include "arm_cmplx_conj_q31.c"
+#include "arm_cmplx_dot_prod_f32.c"
+#include "arm_cmplx_dot_prod_q15.c"
+#include "arm_cmplx_dot_prod_q31.c"
+#include "arm_cmplx_mag_f32.c"
+#include "arm_cmplx_mag_f64.c"
+
+#if (defined (ARM_MATH_HELIUM) || defined(ARM_MATH_MVEI))  && !defined(ARM_MATH_AUTOVECTORIZE)
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE)
+  #include "arm_cmplx_mag_q15.c"
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q15_MVE)
+  #include "arm_cmplx_mag_fast_q15.c"
+  #endif 
+  
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_FAST_SQRT_Q31_MVE)
+  #include "arm_cmplx_mag_q31.c"
+  #endif
+#else
+  #include "arm_cmplx_mag_q15.c"
+  #include "arm_cmplx_mag_fast_q15.c"
+  #include "arm_cmplx_mag_q31.c"
+#endif
+
+#include "arm_cmplx_mag_squared_f32.c"
+#include "arm_cmplx_mag_squared_f64.c"
+#include "arm_cmplx_mag_squared_q15.c"
+#include "arm_cmplx_mag_squared_q31.c"
+#include "arm_cmplx_mult_cmplx_f32.c"
+#include "arm_cmplx_mult_cmplx_f64.c"
+#include "arm_cmplx_mult_cmplx_q15.c"
+#include "arm_cmplx_mult_cmplx_q31.c"
+#include "arm_cmplx_mult_real_f32.c"
+#include "arm_cmplx_mult_real_q15.c"
+#include "arm_cmplx_mult_real_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c
new file mode 100755
index 00000000..d2c77842
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/ComplexMathFunctionsF16.c
@@ -0,0 +1,32 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        CompexMathFunctionsF16.c
+ * Description:  Combination of all complex math function f16 source files.
+ *
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_cmplx_conj_f16.c"
+#include "arm_cmplx_dot_prod_f16.c"
+#include "arm_cmplx_mag_f16.c"
+#include "arm_cmplx_mag_squared_f16.c"
+#include "arm_cmplx_mult_cmplx_f16.c"
+#include "arm_cmplx_mult_real_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c
new file mode 100755
index 00000000..6cf871e2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c
@@ -0,0 +1,185 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_conj_f16.c
+ * Description:  Floating-point complex conjugate
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_conj Complex Conjugate
+
+  Conjugates the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the destination data where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of <code>2*numSamples</code> values.
+
+  The underlying algorithm is used:
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
+      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_conj
+  @{
+ */
+
+/**
+  @brief         Floating-point complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_conj_f16(
+    const float16_t * pSrc,
+    float16_t * pDst,
+    uint32_t numSamples)
+{
+    static const float16_t cmplx_conj_sign[8] = { 1.0f, -1.0f, 1.0f, -1.0f, 1.0f, -1.0f, 1.0f, -1.0f };
+    uint32_t blockSize = numSamples * CMPLX_DIM;   /* loop counters */
+    uint32_t blkCnt;
+    f16x8_t vecSrc;
+    f16x8_t vecSign;
+
+    /*
+     * load sign vector
+     */
+    vecSign = *(f16x8_t *) cmplx_conj_sign;
+
+    /* Compute 4 real samples at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst,vmulq(vecSrc, vecSign));
+        /*
+         * Decrement the blkCnt loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+        blkCnt--;
+    }
+
+     /* Tail */
+    blkCnt = (blockSize & 0x7) >> 1;
+
+    while (blkCnt > 0U)
+    {
+      /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+  
+      /* Calculate Complex Conjugate and store result in destination buffer. */
+      *pDst++ =  *pSrc++;
+      *pDst++ = -(_Float16)*pSrc++;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+}
+
+#else
+void arm_cmplx_conj_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_conj group
+ */
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
index ae20bbb2..5920a778 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f32.c
@@ -1,161 +1,213 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_conj_f32.c
- * Description:  Floating-point complex conjugate
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @defgroup cmplx_conj Complex Conjugate
-
-  Conjugates the elements of a complex data vector.
-
-  The <code>pSrc</code> points to the source data and
-  <code>pDst</code> points to the destination data where the result should be written.
-  <code>numSamples</code> specifies the number of complex samples
-  and the data in each array is stored in an interleaved fashion
-  (real, imag, real, imag, ...).
-  Each array has a total of <code>2*numSamples</code> values.
-
-  The underlying algorithm is used:
-  <pre>
-  for (n = 0; n < numSamples; n++) {
-      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
-      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
-  }
-  </pre>
-
-  There are separate functions for floating-point, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup cmplx_conj
-  @{
- */
-
-/**
-  @brief         Floating-point complex conjugate.
-  @param[in]     pSrc        points to the input vector
-  @param[out]    pDst        points to the output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
- */
-
-
-void arm_cmplx_conj_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined(ARM_MATH_NEON)
-   float32x4_t zero;
-   float32x4x2_t vec;
-
-   zero = vdupq_n_f32(0.0);
-
-   /* Compute 4 outputs at a time */
-   blkCnt = numSamples >> 2U;
-
-   while (blkCnt > 0U)
-   {
-     /* C[0]+jC[1] = A[0]+(-1)*jA[1] */
-     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
-     vec = vld2q_f32(pSrc);
-     vec.val[1] = vsubq_f32(zero,vec.val[1]);
-     vst2q_f32(pDst,vec);
-
-     /* Increment pointers */
-     pSrc += 8;
-     pDst += 8;
-        
-     /* Decrement the loop counter */
-     blkCnt--;
-   }
-
-   /* Tail */
-   blkCnt = numSamples & 0x3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
-
-    /* Calculate Complex Conjugate and store result in destination buffer. */
-    *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined (ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
-
-    /* Calculate Complex Conjugate and store result in destination buffer. */
-    *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_conj group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_conj_f32.c
+ * Description:  Floating-point complex conjugate
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_conj Complex Conjugate
+
+  Conjugates the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the destination data where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of <code>2*numSamples</code> values.
+
+  The underlying algorithm is used:
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)  ] =  pSrc[(2*n)  ];    // real part
+      pDst[(2*n)+1] = -pSrc[(2*n)+1];    // imag part
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_conj
+  @{
+ */
+
+/**
+  @brief         Floating-point complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_conj_f32(
+    const float32_t * pSrc,
+    float32_t * pDst,
+    uint32_t numSamples)
+{
+    static const float32_t cmplx_conj_sign[4] = { 1.0f, -1.0f, 1.0f, -1.0f };
+    uint32_t blockSize = numSamples * CMPLX_DIM;   /* loop counters */
+    uint32_t blkCnt;
+    f32x4_t vecSrc;
+    f32x4_t vecSign;
+
+    /*
+     * load sign vector
+     */
+    vecSign = *(f32x4_t *) cmplx_conj_sign;
+
+    /* Compute 4 real samples at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrc);
+        vst1q(pDst,vmulq(vecSrc, vecSign));
+        /*
+         * Decrement the blkCnt loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+        blkCnt--;
+    }
+
+     /* Tail */
+    blkCnt = (blockSize & 0x3) >> 1;
+
+    while (blkCnt > 0U)
+    {
+      /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+  
+      /* Calculate Complex Conjugate and store result in destination buffer. */
+      *pDst++ =  *pSrc++;
+      *pDst++ = -*pSrc++;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+}
+
+#else
+void arm_cmplx_conj_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+   float32x4_t zero;
+   float32x4x2_t vec;
+
+   zero = vdupq_n_f32(0.0f);
+
+   /* Compute 4 outputs at a time */
+   blkCnt = numSamples >> 2U;
+
+   while (blkCnt > 0U)
+   {
+     /* C[0]+jC[1] = A[0]+(-1)*jA[1] */
+     /* Calculate Complex Conjugate and then store the results in the destination buffer. */
+     vec = vld2q_f32(pSrc);
+     vec.val[1] = vsubq_f32(zero,vec.val[1]);
+     vst2q_f32(pDst,vec);
+
+     /* Increment pointers */
+     pSrc += 8;
+     pDst += 8;
+        
+     /* Decrement the loop counter */
+     blkCnt--;
+   }
+
+   /* Tail */
+   blkCnt = numSamples & 0x3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined (ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    *pDst++ = -*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_conj group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
index d7fdc28b..c076eff6 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
@@ -1,157 +1,207 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_conj_q15.c
- * Description:  Q15 complex conjugate
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_conj
-  @{
- */
-
-/**
-  @brief         Q15 complex conjugate.
-  @param[in]     pSrc        points to the input vector
-  @param[out]    pDst        points to the output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
- */
-
-void arm_cmplx_conj_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t in1;                                     /* Temporary input variable */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in2, in3, in4;                           /* Temporary input variables */
-#endif
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
-
-    /* Calculate Complex Conjugate and store result in destination buffer. */
-
-    #if defined (ARM_MATH_DSP)
-    in1 = read_q15x2_ia ((q15_t **) &pSrc);
-    in2 = read_q15x2_ia ((q15_t **) &pSrc);
-    in3 = read_q15x2_ia ((q15_t **) &pSrc);
-    in4 = read_q15x2_ia ((q15_t **) &pSrc);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    in1 = __QASX(0, in1);
-    in2 = __QASX(0, in2);
-    in3 = __QASX(0, in3);
-    in4 = __QASX(0, in4);
-#else
-    in1 = __QSAX(0, in1);
-    in2 = __QSAX(0, in2);
-    in3 = __QSAX(0, in3);
-    in4 = __QSAX(0, in4);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
-    in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
-    in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
-    in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
-
-    write_q15x2_ia (&pDst, in1);
-    write_q15x2_ia (&pDst, in2);
-    write_q15x2_ia (&pDst, in3);
-    write_q15x2_ia (&pDst, in4);
-#else
-    *pDst++ =  *pSrc++;
-    in1 = *pSrc++;
-    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
-
-    *pDst++ =  *pSrc++;
-    in1 = *pSrc++;
-    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
-
-    *pDst++ =  *pSrc++;
-    in1 = *pSrc++;
-    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
-
-    *pDst++ =  *pSrc++;
-    in1 = *pSrc++;
-    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
-
-    /* Calculate Complex Conjugate and store result in destination buffer. */
-    *pDst++ =  *pSrc++;
-    in1 = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __SSAT(-in1, 16);
-#else
-    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_conj group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_conj_q15.c
+ * Description:  Q15 complex conjugate
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_conj
+  @{
+ */
+
+/**
+  @brief         Q15 complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q15 value -1 (0x8000) is saturated to the maximum allowable positive value 0x7FFF.
+ */
+
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_cmplx_conj_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+    uint32_t blockSize = numSamples * CMPLX_DIM;   /* loop counters */
+    uint32_t blkCnt;
+    q31_t in1; 
+
+    q15x8x2_t vecSrc;
+    q15x8_t zero;
+
+    zero = vdupq_n_s16(0);
+
+    /* Compute 8 real samples at a time */
+    blkCnt = blockSize >> 4U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld2q(pSrc);
+        vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]);
+        vst2q(pDst,vecSrc);
+        /*
+         * Decrement the blkCnt loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 16;
+        pDst += 16;
+        blkCnt --;
+    }
+    
+     /* Tail */
+    blkCnt = (blockSize & 0xF) >> 1;
+
+    while (blkCnt > 0U)
+    {
+      /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+  
+      /* Calculate Complex Conjugate and store result in destination buffer. */
+      *pDst++ =  *pSrc++;
+      in1 = *pSrc++;
+      *pDst++ = __SSAT(-in1, 16);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+#else
+void arm_cmplx_conj_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in1;                                     /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in2, in3, in4;                           /* Temporary input variables */
+#endif
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+
+    #if defined (ARM_MATH_DSP)
+    in1 = read_q15x2_ia ((q15_t **) &pSrc);
+    in2 = read_q15x2_ia ((q15_t **) &pSrc);
+    in3 = read_q15x2_ia ((q15_t **) &pSrc);
+    in4 = read_q15x2_ia ((q15_t **) &pSrc);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    in1 = __QASX(0, in1);
+    in2 = __QASX(0, in2);
+    in3 = __QASX(0, in3);
+    in4 = __QASX(0, in4);
+#else
+    in1 = __QSAX(0, in1);
+    in2 = __QSAX(0, in2);
+    in3 = __QSAX(0, in3);
+    in4 = __QSAX(0, in4);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    in1 = ((uint32_t) in1 >> 16) | ((uint32_t) in1 << 16);
+    in2 = ((uint32_t) in2 >> 16) | ((uint32_t) in2 << 16);
+    in3 = ((uint32_t) in3 >> 16) | ((uint32_t) in3 << 16);
+    in4 = ((uint32_t) in4 >> 16) | ((uint32_t) in4 << 16);
+
+    write_q15x2_ia (&pDst, in1);
+    write_q15x2_ia (&pDst, in2);
+    write_q15x2_ia (&pDst, in3);
+    write_q15x2_ia (&pDst, in4);
+#else
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in1 = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __SSAT(-in1, 16);
+#else
+    *pDst++ = (in1 == (q15_t) 0x8000) ? (q15_t) 0x7fff : -in1;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_conj group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
index c3cbdbf1..ec1b5b70 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q31.c
@@ -1,137 +1,193 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_conj_q31.c
- * Description:  Q31 complex conjugate
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_conj
-  @{
- */
-
-/**
-  @brief         Q31 complex conjugate.
-  @param[in]     pSrc        points to the input vector
-  @param[out]    pDst        points to the output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
- */
-
-void arm_cmplx_conj_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t in;                                      /* Temporary input variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
-
-    /* Calculate Complex Conjugate and store result in destination buffer. */
-    *pDst++ =  *pSrc++;
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    *pDst++ =  *pSrc++;
-    in =  *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    *pDst++ =  *pSrc++;
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    *pDst++ =  *pSrc++;
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
-
-    /* Calculate Complex Conjugate and store result in destination buffer. */
-    *pDst++ =  *pSrc++;
-    in = *pSrc++;
-#if defined (ARM_MATH_DSP)
-    *pDst++ = __QSUB(0, in);
-#else
-    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_conj group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_conj_q31.c
+ * Description:  Q31 complex conjugate
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_conj
+  @{
+ */
+
+/**
+  @brief         Q31 complex conjugate.
+  @param[in]     pSrc        points to the input vector
+  @param[out]    pDst        points to the output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   The Q31 value -1 (0x80000000) is saturated to the maximum allowable positive value 0x7FFFFFFF.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_conj_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+
+    uint32_t blockSize = numSamples * CMPLX_DIM;   /* loop counters */
+    uint32_t blkCnt;
+    q31x4x2_t vecSrc;
+    q31_t in;                                      /* Temporary input variable */
+    q31x4_t zero;
+
+    zero = vdupq_n_s32(0);
+
+   
+    /* Compute 4 real samples at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+
+        vecSrc = vld2q(pSrc);
+        vecSrc.val[1] = vqsubq(zero, vecSrc.val[1]);
+        vst2q(pDst,vecSrc);
+        /*
+         * Decrement the blkCnt loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+        blkCnt --;
+    }
+
+     /* Tail */
+    blkCnt = (blockSize & 0x7) >> 1;
+
+    while (blkCnt > 0U)
+    {
+      /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+  
+      /* Calculate Complex Conjugate and store result in destination buffer. */
+      *pDst++ =  *pSrc++;
+      in = *pSrc++;
+      *pDst++ = __QSUB(0, in);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+
+}
+#else
+
+void arm_cmplx_conj_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary input variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    *pDst++ =  *pSrc++;
+    in =  *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] + jC[1] = A[0]+ j(-1)A[1] */
+
+    /* Calculate Complex Conjugate and store result in destination buffer. */
+    *pDst++ =  *pSrc++;
+    in = *pSrc++;
+#if defined (ARM_MATH_DSP)
+    *pDst++ = __QSUB(0, in);
+#else
+    *pDst++ = (in == INT32_MIN) ? INT32_MAX : -in;
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_conj group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c
new file mode 100755
index 00000000..ff45a9fc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c
@@ -0,0 +1,288 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_dot_prod_f16.c
+ * Description:  Floating-point complex dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_dot_prod Complex Dot Product
+
+  Computes the dot product of two complex vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  The <code>pSrcA</code> points to the first complex input vector and
+  <code>pSrcB</code> points to the second complex input vector.
+  <code>numSamples</code> specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of <code>2*numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  realResult = 0;
+  imagResult = 0;
+  for (n = 0; n < numSamples; n++) {
+      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_dot_prod
+  @{
+ */
+
+/**
+  @brief         Floating-point complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_cmplx_dot_prod_f16(
+    const float16_t * pSrcA,
+    const float16_t * pSrcB,
+    uint32_t numSamples,
+    float16_t * realResult,
+    float16_t * imagResult)
+{
+    int32_t         blkCnt;
+    float16_t       real_sum, imag_sum;
+    f16x8_t         vecSrcA, vecSrcB;
+    f16x8_t         vec_acc = vdupq_n_f16(0.0f16);
+    f16x8_t         vecSrcC, vecSrcD;
+
+    blkCnt = (numSamples >> 3);
+    blkCnt -= 1;
+    if (blkCnt > 0) {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q( pSrcA);
+        vecSrcB = vld1q( pSrcB);
+        pSrcA += 8;
+        pSrcB += 8;
+
+        while (blkCnt > 0) {
+            vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 8;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 8;
+
+            vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 8;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 8;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+
+        vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 7);
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp16q(blkCnt);
+            pSrcA += 8;
+            pSrcB += 8;
+
+            vecSrcA = vldrhq_z_f16(pSrcA, p);
+            vecSrcB = vldrhq_z_f16(pSrcB, p);
+            vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+
+            blkCnt -= 8;
+        }
+    } else {
+        /* small vector */
+        blkCnt = numSamples * CMPLX_DIM;
+        vec_acc = vdupq_n_f16(0.0f16);
+
+        do {
+            mve_pred16_t    p = vctp16q(blkCnt);
+
+            vecSrcA = vldrhq_z_f16(pSrcA, p);
+            vecSrcB = vldrhq_z_f16(pSrcB, p);
+
+            vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+
+            /*
+             * Decrement the blkCnt loop counter
+             * Advance vector source and destination pointers
+             */
+            pSrcA += 8;
+            pSrcB += 8;
+            blkCnt -= 8;
+        }
+        while (blkCnt > 0);
+    }
+
+    /* Sum the partial parts */
+    mve_cmplx_sum_intra_r_i_f16(vec_acc, real_sum, imag_sum);
+
+    /*
+     * Store the real and imaginary results in the destination buffers
+     */
+    *realResult = real_sum;
+    *imagResult = imag_sum;
+}
+
+#else
+void arm_cmplx_dot_prod_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        uint32_t numSamples,
+        float16_t * realResult,
+        float16_t * imagResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        _Float16 real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result variables */
+        _Float16 a0,b0,c0,d0;
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store real and imaginary result in destination buffer. */
+  *realResult = real_sum;
+  *imagResult = imag_sum;
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_dot_prod group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
index 167b865c..af60d32b 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f32.c
@@ -1,233 +1,340 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_dot_prod_f32.c
- * Description:  Floating-point complex dot product
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @defgroup cmplx_dot_prod Complex Dot Product
-
-  Computes the dot product of two complex vectors.
-  The vectors are multiplied element-by-element and then summed.
-
-  The <code>pSrcA</code> points to the first complex input vector and
-  <code>pSrcB</code> points to the second complex input vector.
-  <code>numSamples</code> specifies the number of complex samples
-  and the data in each array is stored in an interleaved fashion
-  (real, imag, real, imag, ...).
-  Each array has a total of <code>2*numSamples</code> values.
-
-  The underlying algorithm is used:
-
-  <pre>
-  realResult = 0;
-  imagResult = 0;
-  for (n = 0; n < numSamples; n++) {
-      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
-      imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
-  }
-  </pre>
-
-  There are separate functions for floating-point, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup cmplx_dot_prod
-  @{
- */
-
-/**
-  @brief         Floating-point complex dot product.
-  @param[in]     pSrcA       points to the first input vector
-  @param[in]     pSrcB       points to the second input vector
-  @param[in]     numSamples  number of samples in each vector
-  @param[out]    realResult  real part of the result returned here
-  @param[out]    imagResult  imaginary part of the result returned here
-  @return        none
- */
-
-void arm_cmplx_dot_prod_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        uint32_t numSamples,
-        float32_t * realResult,
-        float32_t * imagResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result variables */
-        float32_t a0,b0,c0,d0;
-
-#if defined(ARM_MATH_NEON)
-    float32x4x2_t vec1,vec2,vec3,vec4;
-    float32x4_t accR,accI;
-    float32x2_t accum = vdup_n_f32(0);
-
-    accR = vdupq_n_f32(0.0);
-    accI = vdupq_n_f32(0.0);
-
-    /* Loop unrolling: Compute 8 outputs at a time */
-    blkCnt = numSamples >> 3U;
-
-    while (blkCnt > 0U)
-    {
-	/* C = (A[0]+jA[1])*(B[0]+jB[1]) + ...  */
-        /* Calculate dot product and then store the result in a temporary buffer. */
-
-	vec1 = vld2q_f32(pSrcA);
-        vec2 = vld2q_f32(pSrcB);
-
-	/* Increment pointers */
-        pSrcA += 8;
-        pSrcB += 8;
-
-	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
-        accR = vmlaq_f32(accR,vec1.val[0],vec2.val[0]);
-        accR = vmlsq_f32(accR,vec1.val[1],vec2.val[1]);
-
-	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
-        accI = vmlaq_f32(accI,vec1.val[1],vec2.val[0]);
-        accI = vmlaq_f32(accI,vec1.val[0],vec2.val[1]);
-
-        vec3 = vld2q_f32(pSrcA);
-        vec4 = vld2q_f32(pSrcB);
-	
-	/* Increment pointers */
-        pSrcA += 8;
-        pSrcB += 8;
-
-	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
-        accR = vmlaq_f32(accR,vec3.val[0],vec4.val[0]);
-        accR = vmlsq_f32(accR,vec3.val[1],vec4.val[1]);
-
-	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
-        accI = vmlaq_f32(accI,vec3.val[1],vec4.val[0]);
-        accI = vmlaq_f32(accI,vec3.val[0],vec4.val[1]);
-
-        /* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    accum = vpadd_f32(vget_low_f32(accR), vget_high_f32(accR));
-    real_sum += accum[0] + accum[1];
-
-    accum = vpadd_f32(vget_low_f32(accI), vget_high_f32(accI));
-    imag_sum += accum[0] + accum[1];
-
-    /* Tail */
-    blkCnt = numSamples & 0x7;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += a0 * c0;
-    imag_sum += a0 * d0;
-    real_sum -= b0 * d0;
-    imag_sum += b0 * c0;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += a0 * c0;
-    imag_sum += a0 * d0;
-    real_sum -= b0 * d0;
-    imag_sum += b0 * c0;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += a0 * c0;
-    imag_sum += a0 * d0;
-    real_sum -= b0 * d0;
-    imag_sum += b0 * c0;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += a0 * c0;
-    imag_sum += a0 * d0;
-    real_sum -= b0 * d0;
-    imag_sum += b0 * c0;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += a0 * c0;
-    imag_sum += a0 * d0;
-    real_sum -= b0 * d0;
-    imag_sum += b0 * c0;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store real and imaginary result in destination buffer. */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**
-  @} end of cmplx_dot_prod group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_dot_prod_f32.c
+ * Description:  Floating-point complex dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_dot_prod Complex Dot Product
+
+  Computes the dot product of two complex vectors.
+  The vectors are multiplied element-by-element and then summed.
+
+  The <code>pSrcA</code> points to the first complex input vector and
+  <code>pSrcB</code> points to the second complex input vector.
+  <code>numSamples</code> specifies the number of complex samples
+  and the data in each array is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  Each array has a total of <code>2*numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  realResult = 0;
+  imagResult = 0;
+  for (n = 0; n < numSamples; n++) {
+      realResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      imagResult += pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_dot_prod
+  @{
+ */
+
+/**
+  @brief         Floating-point complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_dot_prod_f32(
+    const float32_t * pSrcA,
+    const float32_t * pSrcB,
+    uint32_t numSamples,
+    float32_t * realResult,
+    float32_t * imagResult)
+{
+    int32_t         blkCnt;
+    float32_t       real_sum, imag_sum;
+    f32x4_t         vecSrcA, vecSrcB;
+    f32x4_t         vec_acc = vdupq_n_f32(0.0f);
+    f32x4_t         vecSrcC, vecSrcD;
+
+    blkCnt = numSamples >> 2;
+    blkCnt -= 1;
+    if (blkCnt > 0) {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        pSrcA += 4;
+        pSrcB += 4;
+
+        while (blkCnt > 0) {
+            vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 4;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 4;
+
+            vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 4;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 4;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+         /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        vec_acc = vcmlaq(vec_acc, vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+
+        vec_acc = vcmlaq(vec_acc, vecSrcC, vecSrcD);
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 3);
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp32q(blkCnt);
+            pSrcA += 4;
+            pSrcB += 4;
+            vecSrcA = vldrwq_z_f32(pSrcA, p);
+            vecSrcB = vldrwq_z_f32(pSrcB, p);
+            vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+            blkCnt -= 4;
+        }
+    } else {
+        /* small vector */
+        blkCnt = numSamples * CMPLX_DIM;
+        vec_acc = vdupq_n_f32(0.0f);
+
+        do {
+            mve_pred16_t    p = vctp32q(blkCnt);
+
+            vecSrcA = vldrwq_z_f32(pSrcA, p);
+            vecSrcB = vldrwq_z_f32(pSrcB, p);
+
+            vec_acc = vcmlaq_m(vec_acc, vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+
+            /*
+             * Decrement the blkCnt loop counter
+             * Advance vector source and destination pointers
+             */
+            pSrcA += 4;
+            pSrcB += 4;
+            blkCnt -= 4;
+        }
+        while (blkCnt > 0);
+    }
+
+    real_sum = vgetq_lane(vec_acc, 0) + vgetq_lane(vec_acc, 2);
+    imag_sum = vgetq_lane(vec_acc, 1) + vgetq_lane(vec_acc, 3);
+
+    /*
+     * Store the real and imaginary results in the destination buffers
+     */
+    *realResult = real_sum;
+    *imagResult = imag_sum;
+}
+
+#else
+void arm_cmplx_dot_prod_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        uint32_t numSamples,
+        float32_t * realResult,
+        float32_t * imagResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t real_sum = 0.0f, imag_sum = 0.0f;    /* Temporary result variables */
+        float32_t a0,b0,c0,d0;
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    float32x4x2_t vec1,vec2,vec3,vec4;
+    float32x4_t accR,accI;
+    float32x2_t accum = vdup_n_f32(0);
+
+    accR = vdupq_n_f32(0.0f);
+    accI = vdupq_n_f32(0.0f);
+
+    /* Loop unrolling: Compute 8 outputs at a time */
+    blkCnt = numSamples >> 3U;
+
+    while (blkCnt > 0U)
+    {
+	/* C = (A[0]+jA[1])*(B[0]+jB[1]) + ...  */
+        /* Calculate dot product and then store the result in a temporary buffer. */
+
+	      vec1 = vld2q_f32(pSrcA);
+        vec2 = vld2q_f32(pSrcB);
+
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        accR = vmlaq_f32(accR,vec1.val[0],vec2.val[0]);
+        accR = vmlsq_f32(accR,vec1.val[1],vec2.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        accI = vmlaq_f32(accI,vec1.val[1],vec2.val[0]);
+        accI = vmlaq_f32(accI,vec1.val[0],vec2.val[1]);
+
+        vec3 = vld2q_f32(pSrcA);
+        vec4 = vld2q_f32(pSrcB);
+	
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        accR = vmlaq_f32(accR,vec3.val[0],vec4.val[0]);
+        accR = vmlsq_f32(accR,vec3.val[1],vec4.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        accI = vmlaq_f32(accI,vec3.val[1],vec4.val[0]);
+        accI = vmlaq_f32(accI,vec3.val[0],vec4.val[1]);
+
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(accR), vget_high_f32(accR));
+    real_sum += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+    accum = vpadd_f32(vget_low_f32(accI), vget_high_f32(accI));
+    imag_sum += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+    /* Tail */
+    blkCnt = numSamples & 0x7;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += a0 * c0;
+    imag_sum += a0 * d0;
+    real_sum -= b0 * d0;
+    imag_sum += b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store real and imaginary result in destination buffer. */
+  *realResult = real_sum;
+  *imagResult = imag_sum;
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_dot_prod group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
index 5947958f..1910d8ad 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q15.c
@@ -1,154 +1,256 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_dot_prod_q15.c
- * Description:  Processing function for the Q15 Complex Dot product
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_dot_prod
-  @{
- */
-
-/**
-  @brief         Q15 complex dot product.
-  @param[in]     pSrcA       points to the first input vector
-  @param[in]     pSrcB       points to the second input vector
-  @param[in]     numSamples  number of samples in each vector
-  @param[out]    realResult  real part of the result returned here
-  @param[out]    imagResult  imaginary part of the result returned her
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
-                   These are accumulated in a 64-bit accumulator with 34.30 precision.
-                   As a final step, the accumulators are converted to 8.24 format.
-                   The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
- */
-
-void arm_cmplx_dot_prod_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        uint32_t numSamples,
-        q31_t * realResult,
-        q31_t * imagResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
-        q15_t a0,b0,c0,d0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += (q31_t)a0 * c0;
-    imag_sum += (q31_t)a0 * d0;
-    real_sum -= (q31_t)b0 * d0;
-    imag_sum += (q31_t)b0 * c0;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += (q31_t)a0 * c0;
-    imag_sum += (q31_t)a0 * d0;
-    real_sum -= (q31_t)b0 * d0;
-    imag_sum += (q31_t)b0 * c0;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += (q31_t)a0 * c0;
-    imag_sum += (q31_t)a0 * d0;
-    real_sum -= (q31_t)b0 * d0;
-    imag_sum += (q31_t)b0 * c0;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += (q31_t)a0 * c0;
-    imag_sum += (q31_t)a0 * d0;
-    real_sum -= (q31_t)b0 * d0;
-    imag_sum += (q31_t)b0 * c0;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += (q31_t)a0 * c0;
-    imag_sum += (q31_t)a0 * d0;
-    real_sum -= (q31_t)b0 * d0;
-    imag_sum += (q31_t)b0 * c0;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store real and imaginary result in 8.24 format  */
-  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
-  *realResult = (q31_t) (real_sum >> 6);
-  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
-  *imagResult = (q31_t) (imag_sum >> 6);
-}
-
-/**
-  @} end of cmplx_dot_prod group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_dot_prod_q15.c
+ * Description:  Processing function for the Q15 Complex Dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_dot_prod
+  @{
+ */
+
+/**
+  @brief         Q15 complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned her
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The intermediate 1.15 by 1.15 multiplications are performed with full precision and yield a 2.30 result.
+                   These are accumulated in a 64-bit accumulator with 34.30 precision.
+                   As a final step, the accumulators are converted to 8.24 format.
+                   The return results <code>realResult</code> and <code>imagResult</code> are in 8.24 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_cmplx_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t numSamples,
+        q31_t * realResult,
+        q31_t * imagResult)
+{
+    int32_t         blkCnt;
+    q63_t           accReal = 0LL;
+    q63_t           accImag = 0LL;
+    q15x8_t         vecSrcA, vecSrcB;
+    q15x8_t         vecSrcC, vecSrcD;
+
+    blkCnt = (numSamples >> 3);
+    blkCnt -= 1;
+    if (blkCnt > 0) {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        pSrcA += 8;
+        pSrcB += 8;
+
+        while (blkCnt > 0) {
+
+            accReal = vmlsldavaq(accReal, vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 8;
+
+            accImag = vmlaldavaxq(accImag, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 8;
+
+            accReal = vmlsldavaq(accReal, vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 8;
+
+            accImag = vmlaldavaxq(accImag, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 8;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        accReal = vmlsldavaq(accReal, vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        accImag = vmlaldavaxq(accImag, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+
+        accReal = vmlsldavaq(accReal, vecSrcC, vecSrcD);
+        vecSrcA = vld1q(pSrcA);
+
+        accImag = vmlaldavaxq(accImag, vecSrcC, vecSrcD);
+        vecSrcB = vld1q(pSrcB);
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 7);
+        do {
+            mve_pred16_t    p = vctp16q(blkCnt);
+
+            pSrcA += 8;
+            pSrcB += 8;
+
+            vecSrcA = vldrhq_z_s16(pSrcA, p);
+            vecSrcB = vldrhq_z_s16(pSrcB, p);
+
+            accReal = vmlsldavaq_p(accReal, vecSrcA, vecSrcB, p);
+            accImag = vmlaldavaxq_p(accImag, vecSrcA, vecSrcB, p);
+
+            blkCnt -= 8;
+        }
+        while ((int32_t) blkCnt > 0);
+    } else {
+        blkCnt = numSamples * CMPLX_DIM;
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp16q(blkCnt);
+
+            vecSrcA = vldrhq_z_s16(pSrcA, p);
+            vecSrcB = vldrhq_z_s16(pSrcB, p);
+
+            accReal = vmlsldavaq_p(accReal, vecSrcA, vecSrcB, p);
+            accImag = vmlaldavaxq_p(accImag, vecSrcA, vecSrcB, p);
+
+            /*
+             * Decrement the blkCnt loop counter
+             * Advance vector source and destination pointers
+             */
+            pSrcA += 8;
+            pSrcB += 8;
+            blkCnt -= 8;
+        }
+    }
+    *realResult = asrl(accReal, (14 - 8));
+    *imagResult = asrl(accImag, (14 - 8));
+}
+#else
+void arm_cmplx_dot_prod_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        uint32_t numSamples,
+        q31_t * realResult,
+        q31_t * imagResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
+        q15_t a0,b0,c0,d0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += (q31_t)a0 * c0;
+    imag_sum += (q31_t)a0 * d0;
+    real_sum -= (q31_t)b0 * d0;
+    imag_sum += (q31_t)b0 * c0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store real and imaginary result in 8.24 format  */
+  /* Convert real data in 34.30 to 8.24 by 6 right shifts */
+  *realResult = (q31_t) (real_sum >> 6);
+  /* Convert imaginary data in 34.30 to 8.24 by 6 right shifts */
+  *imagResult = (q31_t) (imag_sum >> 6);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_dot_prod group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
index 9f82e8e0..fac85bd0 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_q31.c
@@ -1,153 +1,259 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_dot_prod_q31.c
- * Description:  Q31 complex dot product
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_dot_prod
-  @{
- */
-
-/**
-  @brief         Q31 complex dot product.
-  @param[in]     pSrcA       points to the first input vector
-  @param[in]     pSrcB       points to the second input vector
-  @param[in]     numSamples  number of samples in each vector
-  @param[out]    realResult  real part of the result returned here
-  @param[out]    imagResult  imaginary part of the result returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
-                   The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
-                   Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
-                   The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
-                   Input down scaling is not required.
- */
-
-void arm_cmplx_dot_prod_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        uint32_t numSamples,
-        q63_t * realResult,
-        q63_t * imagResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
-        q31_t a0,b0,c0,d0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += ((q63_t)a0 * c0) >> 14;
-    imag_sum += ((q63_t)a0 * d0) >> 14;
-    real_sum -= ((q63_t)b0 * d0) >> 14;
-    imag_sum += ((q63_t)b0 * c0) >> 14;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += ((q63_t)a0 * c0) >> 14;
-    imag_sum += ((q63_t)a0 * d0) >> 14;
-    real_sum -= ((q63_t)b0 * d0) >> 14;
-    imag_sum += ((q63_t)b0 * c0) >> 14;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += ((q63_t)a0 * c0) >> 14;
-    imag_sum += ((q63_t)a0 * d0) >> 14;
-    real_sum -= ((q63_t)b0 * d0) >> 14;
-    imag_sum += ((q63_t)b0 * c0) >> 14;
-
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += ((q63_t)a0 * c0) >> 14;
-    imag_sum += ((q63_t)a0 * d0) >> 14;
-    real_sum -= ((q63_t)b0 * d0) >> 14;
-    imag_sum += ((q63_t)b0 * c0) >> 14;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    a0 = *pSrcA++;
-    b0 = *pSrcA++;
-    c0 = *pSrcB++;
-    d0 = *pSrcB++;
-
-    real_sum += ((q63_t)a0 * c0) >> 14;
-    imag_sum += ((q63_t)a0 * d0) >> 14;
-    real_sum -= ((q63_t)b0 * d0) >> 14;
-    imag_sum += ((q63_t)b0 * c0) >> 14;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store real and imaginary result in 16.48 format  */
-  *realResult = real_sum;
-  *imagResult = imag_sum;
-}
-
-/**
-  @} end of cmplx_dot_prod group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_dot_prod_q31.c
+ * Description:  Q31 complex dot product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_dot_prod
+  @{
+ */
+
+/**
+  @brief         Q31 complex dot product.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     numSamples  number of samples in each vector
+  @param[out]    realResult  real part of the result returned here
+  @param[out]    imagResult  imaginary part of the result returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The intermediate 1.31 by 1.31 multiplications are performed with 64-bit precision and then shifted to 16.48 format.
+                   The internal real and imaginary accumulators are in 16.48 format and provide 15 guard bits.
+                   Additions are nonsaturating and no overflow will occur as long as <code>numSamples</code> is less than 32768.
+                   The return results <code>realResult</code> and <code>imagResult</code> are in 16.48 format.
+                   Input down scaling is not required.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t numSamples,
+        q63_t * realResult,
+        q63_t * imagResult)
+{
+    int32_t         blkCnt;
+    q63_t           accReal = 0LL;
+    q63_t           accImag = 0LL;
+    q31x4_t         vecSrcA, vecSrcB;
+    q31x4_t         vecSrcC, vecSrcD;
+
+    blkCnt = numSamples >> 2;
+    blkCnt -= 1;
+    if (blkCnt > 0) {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        pSrcA += 4;
+        pSrcB += 4;
+
+        while (blkCnt > 0) {
+
+            accReal = vrmlsldavhaq(accReal, vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 4;
+
+            accImag = vrmlaldavhaxq(accImag, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 4;
+
+            accReal = vrmlsldavhaq(accReal, vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 4;
+
+            accImag = vrmlaldavhaxq(accImag, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 4;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        accReal = vrmlsldavhaq(accReal, vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        accImag = vrmlaldavhaxq(accImag, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+
+        accReal = vrmlsldavhaq(accReal, vecSrcC, vecSrcD);
+        vecSrcA = vld1q(pSrcA);
+
+        accImag = vrmlaldavhaxq(accImag, vecSrcC, vecSrcD);
+        vecSrcB = vld1q(pSrcB);
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 3);
+        do {
+            mve_pred16_t    p = vctp32q(blkCnt);
+
+            pSrcA += 4;
+            pSrcB += 4;
+
+            vecSrcA = vldrwq_z_s32(pSrcA, p);
+            vecSrcB = vldrwq_z_s32(pSrcB, p);
+
+            accReal = vrmlsldavhaq_p(accReal, vecSrcA, vecSrcB, p);
+            accImag = vrmlaldavhaxq_p(accImag, vecSrcA, vecSrcB, p);
+
+            blkCnt -= 4;
+        }
+        while ((int32_t) blkCnt > 0);
+    } else {
+        blkCnt = numSamples * CMPLX_DIM;
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp32q(blkCnt);
+
+            vecSrcA = vldrwq_z_s32(pSrcA, p);
+            vecSrcB = vldrwq_z_s32(pSrcB, p);
+
+            accReal = vrmlsldavhaq_p(accReal, vecSrcA, vecSrcB, p);
+            accImag = vrmlaldavhaxq_p(accImag, vecSrcA, vecSrcB, p);
+
+            /*
+             * Decrement the blkCnt loop counter
+             * Advance vector source and destination pointers
+             */
+            pSrcA += 4;
+            pSrcB += 4;
+            blkCnt -= 4;
+        }
+    }
+    *realResult = asrl(accReal, (14 - 8));
+    *imagResult = asrl(accImag, (14 - 8));
+
+}
+
+#else
+void arm_cmplx_dot_prod_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        uint32_t numSamples,
+        q63_t * realResult,
+        q63_t * imagResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t real_sum = 0, imag_sum = 0;              /* Temporary result variables */
+        q31_t a0,b0,c0,d0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    a0 = *pSrcA++;
+    b0 = *pSrcA++;
+    c0 = *pSrcB++;
+    d0 = *pSrcB++;
+
+    real_sum += ((q63_t)a0 * c0) >> 14;
+    imag_sum += ((q63_t)a0 * d0) >> 14;
+    real_sum -= ((q63_t)b0 * d0) >> 14;
+    imag_sum += ((q63_t)b0 * c0) >> 14;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store real and imaginary result in 16.48 format  */
+  *realResult = real_sum;
+  *imagResult = imag_sum;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_dot_prod group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c
new file mode 100755
index 00000000..1f935987
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c
@@ -0,0 +1,241 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_f16.c
+ * Description:  Floating-point complex magnitude
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_mag Complex Magnitude
+
+  Computes the magnitude of the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of <code>2*numSamples</code> values;
+  the output array has a total of <code>numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+void arm_cmplx_mag_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples)
+{
+    int32_t blockSize = numSamples;  /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+    f16x8x2_t vecSrc;
+    f16x8_t sum;
+
+    /* Compute 4 complex samples at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        q15x8_t newtonStartVec;
+        f16x8_t sumHalf, invSqrt;
+
+        vecSrc = vld2q(pSrc);  
+        pSrc += 16;
+        sum = vmulq(vecSrc.val[0], vecSrc.val[0]);
+        sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]);
+
+        /*
+         * inlined Fast SQRT using inverse SQRT newton-raphson method
+         */
+
+        /* compute initial value */
+        newtonStartVec = vdupq_n_s16(INVSQRT_MAGIC_F16) - vshrq((q15x8_t) sum, 1);
+        sumHalf = sum * 0.5f;
+        /*
+         * compute 3 x iterations
+         *
+         * The more iterations, the more accuracy.
+         * If you need to trade a bit of accuracy for more performance,
+         * you can comment out the 3rd use of the macro.
+         */
+        INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, (f16x8_t) newtonStartVec);
+        INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, invSqrt);
+        INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, invSqrt);
+        /*
+         * set negative values to 0
+         */
+        invSqrt = vdupq_m(invSqrt, (float16_t)0.0f, vcmpltq(invSqrt, (float16_t)0.0f));
+        /*
+         * sqrt(x) = x * invSqrt(x)
+         */
+        sum = vmulq(sum, invSqrt);
+        vstrhq_f16(pDst, sum); 
+        pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        q15x8_t newtonStartVec;
+        f16x8_t sumHalf, invSqrt;
+
+        vecSrc = vld2q((float16_t const *)pSrc);
+        sum = vmulq(vecSrc.val[0], vecSrc.val[0]);
+        sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]);
+
+        /*
+         * inlined Fast SQRT using inverse SQRT newton-raphson method
+         */
+
+        /* compute initial value */
+        newtonStartVec = vdupq_n_s16(INVSQRT_MAGIC_F16) - vshrq((q15x8_t) sum, 1);
+        sumHalf = vmulq(sum, (float16_t)0.5);
+        /*
+         * compute 2 x iterations
+         */
+        INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, (f16x8_t) newtonStartVec);
+        INVSQRT_NEWTON_MVE_F16(invSqrt, sumHalf, invSqrt);
+        /*
+         * set negative values to 0
+         */
+        invSqrt = vdupq_m(invSqrt, (float16_t)0.0, vcmpltq(invSqrt, (float16_t)0.0));
+        /*
+         * sqrt(x) = x * invSqrt(x)
+         */
+        sum = vmulq(sum, invSqrt);
+        vstrhq_p_f16(pDst, sum, p0);
+    }
+}
+
+#else
+void arm_cmplx_mag_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  _Float16 real, imag;                      /* Temporary variables to hold input values */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f16((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f16((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f16((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f16((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f16((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_mag group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
index 128ecb96..aac6fba8 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f32.c
@@ -1,188 +1,273 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mag_f32.c
- * Description:  Floating-point complex magnitude
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @defgroup cmplx_mag Complex Magnitude
-
-  Computes the magnitude of the elements of a complex data vector.
-
-  The <code>pSrc</code> points to the source data and
-  <code>pDst</code> points to the where the result should be written.
-  <code>numSamples</code> specifies the number of complex samples
-  in the input array and the data is stored in an interleaved fashion
-  (real, imag, real, imag, ...).
-  The input array has a total of <code>2*numSamples</code> values;
-  the output array has a total of <code>numSamples</code> values.
-
-  The underlying algorithm is used:
-
-  <pre>
-  for (n = 0; n < numSamples; n++) {
-      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
-  }
-  </pre>
-
-  There are separate functions for floating-point, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup cmplx_mag
-  @{
- */
-
-/**
-  @brief         Floating-point complex magnitude.
-  @param[in]     pSrc        points to input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
- */
-
-void arm_cmplx_mag_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t numSamples)
-{
-  uint32_t blkCnt;                               /* loop counter */
-  float32_t real, imag;                      /* Temporary variables to hold input values */
-
-#if defined(ARM_MATH_NEON)
-
-  float32x4x2_t vecA;
-  float32x4_t vRealA;
-  float32x4_t vImagA;
-  float32x4_t vMagSqA;
-
-  float32x4x2_t vecB;
-  float32x4_t vRealB;
-  float32x4_t vImagB;
-  float32x4_t vMagSqB;
-
-  /* Loop unrolling: Compute 8 outputs at a time */
-  blkCnt = numSamples >> 3;
-
-  while (blkCnt > 0U)
-  {
-    /* out = sqrt((real * real) + (imag * imag)) */
-
-    vecA = vld2q_f32(pSrc);
-    pSrc += 8;
-
-    vecB = vld2q_f32(pSrc);
-    pSrc += 8;
-
-    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
-    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
-    vMagSqA = vaddq_f32(vRealA, vImagA);
-
-    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
-    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
-    vMagSqB = vaddq_f32(vRealB, vImagB);
-
-    /* Store the result in the destination buffer. */
-    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqA));
-    pDst += 4;
-
-    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqB));
-    pDst += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  blkCnt = numSamples & 7;
-
-#else
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    /* store result in destination buffer. */
-    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    /* store result in destination buffer. */
-    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_mag group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_f32.c
+ * Description:  Floating-point complex magnitude
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_mag Complex Magnitude
+
+  Computes the magnitude of the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of <code>2*numSamples</code> values;
+  the output array has a total of <code>numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_vec_math.h"
+#endif
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+void arm_cmplx_mag_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+    int32_t blockSize = numSamples;  /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+    f32x4x2_t vecSrc;
+    f32x4_t sum;
+    float32_t real, imag;                      /* Temporary variables to hold input values */
+
+    /* Compute 4 complex samples at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        q31x4_t newtonStartVec;
+        f32x4_t sumHalf, invSqrt;
+
+        vecSrc = vld2q(pSrc);  
+        pSrc += 8;
+        sum = vmulq(vecSrc.val[0], vecSrc.val[0]);
+        sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]);
+
+        /*
+         * inlined Fast SQRT using inverse SQRT newton-raphson method
+         */
+
+        /* compute initial value */
+        newtonStartVec = vdupq_n_s32(INVSQRT_MAGIC_F32) - vshrq((q31x4_t) sum, 1);
+        sumHalf = sum * 0.5f;
+        /*
+         * compute 3 x iterations
+         *
+         * The more iterations, the more accuracy.
+         * If you need to trade a bit of accuracy for more performance,
+         * you can comment out the 3rd use of the macro.
+         */
+        INVSQRT_NEWTON_MVE_F32(invSqrt, sumHalf, (f32x4_t) newtonStartVec);
+        INVSQRT_NEWTON_MVE_F32(invSqrt, sumHalf, invSqrt);
+        INVSQRT_NEWTON_MVE_F32(invSqrt, sumHalf, invSqrt);
+        /*
+         * set negative values to 0
+         */
+        invSqrt = vdupq_m(invSqrt, 0.0f, vcmpltq(invSqrt, 0.0f));
+        /*
+         * sqrt(x) = x * invSqrt(x)
+         */
+        sum = vmulq(sum, invSqrt);
+        vst1q(pDst, sum); 
+        pDst += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    while (blkCnt > 0U)
+    {
+      /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+  
+      real = *pSrc++;
+      imag = *pSrc++;
+  
+      /* store result in destination buffer. */
+      arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+void arm_cmplx_mag_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  float32_t real, imag;                      /* Temporary variables to hold input values */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  float32x4x2_t vecA;
+  float32x4_t vRealA;
+  float32x4_t vImagA;
+  float32x4_t vMagSqA;
+
+  float32x4x2_t vecB;
+  float32x4_t vRealB;
+  float32x4_t vImagB;
+  float32x4_t vMagSqB;
+
+  /* Loop unrolling: Compute 8 outputs at a time */
+  blkCnt = numSamples >> 3;
+
+  while (blkCnt > 0U)
+  {
+    /* out = sqrt((real * real) + (imag * imag)) */
+
+    vecA = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vecB = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
+    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
+    vMagSqA = vaddq_f32(vRealA, vImagA);
+
+    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
+    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
+    vMagSqB = vaddq_f32(vRealB, vImagB);
+
+    /* Store the result in the destination buffer. */
+    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqA));
+    pDst += 4;
+
+    vst1q_f32(pDst, __arm_vec_sqrt_f32_neon(vMagSqB));
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  blkCnt = numSamples & 7;
+
+#else
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    arm_sqrt_f32((real * real) + (imag * imag), pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f64.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f64.c
new file mode 100644
index 00000000..c2bcd568
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f64.c
@@ -0,0 +1,100 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_f64.c
+ * Description:  Floating-point complex magnitude
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_mag Complex Magnitude
+
+  Computes the magnitude of the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of <code>2*numSamples</code> values;
+  the output array has a total of <code>numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = sqrt(pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2);
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+void arm_cmplx_mag_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t numSamples)
+{
+  uint32_t blkCnt;                               /* loop counter */
+  float64_t real, imag;                      /* Temporary variables to hold input values */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    *pDst++ = sqrt((real * real) + (imag * imag));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_fast_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_fast_q15.c
new file mode 100755
index 00000000..b11234eb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_fast_q15.c
@@ -0,0 +1,223 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_fast_q15.c
+ * Description:  Q15 complex magnitude
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Q15 complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
+                   Fast functions are less accurate. This function will tend to clamp to 0
+                   the too small values. So sqrt(x*x) = x will not always be true.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_cmplx_mag_fast_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+
+    int32_t blockSize = numSamples;  /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8x2_t vecSrc;
+    q15x8_t sum;
+    q31_t in;
+    q31_t acc0;
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld2q(pSrc);  
+        pSrc += 16;
+        sum = vqaddq(vmulhq(vecSrc.val[0], vecSrc.val[0]),
+                     vmulhq(vecSrc.val[1], vecSrc.val[1]));
+
+        sum = vshrq(sum, 1);
+
+        sum = FAST_VSQRT_Q15(sum);
+
+        vst1q(pDst, sum); 
+        pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+
+    while (blkCnt > 0U)
+    {
+      /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+  
+      in = read_q15x2_ia ((q15_t **) &pSrc);
+      acc0 = __SMUAD(in, in);
+  
+      /* store result in 2.14 format in destination buffer. */
+      arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+  
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+void arm_cmplx_mag_fast_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t acc0;                                    /* Accumulators */
+#else
+       q15_t real, imag;                              /* Temporary input variables */
+       q31_t acc0, acc1;                              /* Accumulators */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
index a5b45b5a..1b207849 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
@@ -1,162 +1,268 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mag_q15.c
- * Description:  Q15 complex magnitude
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_mag
-  @{
- */
-
-/**
-  @brief         Q15 complex magnitude.
-  @param[in]     pSrc        points to input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
- */
-
-void arm_cmplx_mag_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_DSP)
-        q31_t in;
-        q31_t acc0;                                    /* Accumulators */
-#else
-       q15_t real, imag;                              /* Temporary input variables */
-       q31_t acc0, acc1;                              /* Accumulators */
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-
-#if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-#else
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-
-    /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-
-#if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-
-    /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
-#else
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-
-    /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_mag group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_q15.c
+ * Description:  Q15 complex magnitude
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Q15 complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
+ */
+
+/* Sqrt q31 is used otherwise accuracy is not good enough
+           for small values and for some applications it is
+           an issue.
+        */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_cmplx_mag_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+
+    int32_t blockSize = numSamples;  /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8x2_t vecSrc;
+    q31x4_t prod0;
+    q31x4_t prod1;
+
+    q31_t in;
+    q31_t acc0;
+    q31x4_t acc0V;
+    q31x4_t acc1V;
+
+    q31_t res;
+    q15x8_t resV;
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld2q(pSrc);  
+        pSrc += 16;
+
+        acc0V = vdupq_n_s32(0);
+        acc1V = vdupq_n_s32(0);
+
+        prod0 = vmullbq_int_s16(vecSrc.val[0], vecSrc.val[0]);
+        acc0V = vqaddq_s32(acc0V,prod0);
+
+        prod0 = vmullbq_int_s16(vecSrc.val[1], vecSrc.val[1]);
+        acc0V = vqaddq_s32(acc0V,prod0);
+
+
+        prod1 = vmulltq_int_s16(vecSrc.val[0], vecSrc.val[0]);
+        acc1V = vqaddq_s32(acc1V,prod1);
+
+        prod1 = vmulltq_int_s16(vecSrc.val[1], vecSrc.val[1]);
+        acc1V = vqaddq_s32(acc1V,prod1);
+
+       
+
+        acc0V = vshrq(acc0V, 1);
+        acc1V = vshrq(acc1V, 1);
+
+        acc0V = FAST_VSQRT_Q31(acc0V);
+        acc1V = FAST_VSQRT_Q31(acc1V);
+
+        resV = vdupq_n_s16(0);
+        resV = vqshrnbq_n_s32(resV,acc0V,16);
+        resV = vqshrntq_n_s32(resV,acc1V,16);
+
+        vst1q(pDst, resV); 
+        pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+
+    while (blkCnt > 0U)
+    {
+      /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+  
+      in = read_q15x2_ia ((q15_t **) &pSrc);
+      acc0 = __SMUAD(in, in);
+  
+      /* store result in 2.14 format in destination buffer. */
+      arm_sqrt_q31(acc0  >> 1 , &res);
+      *pDst++ = res >> 16;
+  
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+void arm_cmplx_mag_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        q31_t res; /* temporary result */
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t acc0;                                    /* Accumulators */
+#else
+       q15_t real, imag;                              /* Temporary input variables */
+       q31_t acc0, acc1;                              /* Accumulators */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 2.14 format in destination buffer. */
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
+ 
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
index fe26d5b1..57a72f5f 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q31.c
@@ -1,130 +1,201 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mag_q31.c
- * Description:  Q31 complex magnitude
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_mag
-  @{
- */
-
-/**
-  @brief         Q31 complex magnitude.
-  @param[in]     pSrc        points to input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
-                   Input down scaling is not required.
- */
-
-void arm_cmplx_mag_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t real, imag;                              /* Temporary input variables */
-        q31_t acc0, acc1;                              /* Accumulators */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-
-    /* store result in 2.30 format in destination buffer. */
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-
-    /* store result in 2.30 format in destination buffer. */
-    arm_sqrt_q31(acc0 + acc1, pDst++);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_mag group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_q31.c
+ * Description:  Q31 complex magnitude
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag
+  @{
+ */
+
+/**
+  @brief         Q31 complex magnitude.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 2.30 format.
+                   Input down scaling is not required.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_cmplx_mag_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+    int32_t blockSize = numSamples;  /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+
+    q31x4x2_t vecSrc;
+    q31x4_t sum;
+
+    q31_t real, imag;                              /* Temporary input variables */
+    q31_t acc0, acc1;                              /* Accumulators */
+
+    /* Compute 4 complex samples at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld2q(pSrc);
+
+        sum = vqaddq(vmulhq(vecSrc.val[0], vecSrc.val[0]),
+                     vmulhq(vecSrc.val[1], vecSrc.val[1]));
+
+        sum = vshrq(sum, 1);
+
+        /*
+
+        This function is using a table. There are compilations flags to avoid
+        including this table (and in this case, arm_cmplx_maq_q31 must not
+        be built and linked.)
+
+        */
+        sum = FAST_VSQRT_Q31(sum);
+
+        vst1q(pDst, sum);
+
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        pSrc += 8;
+        pDst += 4;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 3;
+    while (blkCnt > 0U)
+    {
+      /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+  
+      real = *pSrc++;
+      imag = *pSrc++;
+      acc0 = (q31_t) (((q63_t) real * real) >> 33);
+      acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+  
+      /* store result in 2.30 format in destination buffer. */
+      arm_sqrt_q31(acc0 + acc1, pDst++);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+void arm_cmplx_mag_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+    /* store result in 2.30 format in destination buffer. */
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+    /* store result in 2.30 format in destination buffer. */
+    arm_sqrt_q31(acc0 + acc1, pDst++);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_mag group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c
new file mode 100755
index 00000000..df3cbec9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c
@@ -0,0 +1,174 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_f16.c
+ * Description:  Floating-point complex magnitude squared
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_mag_squared Complex Magnitude Squared
+
+  Computes the magnitude squared of the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of <code>2*numSamples</code> values;
+  the output array has a total of <code>numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mag_squared_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples)
+{
+    int32_t blockSize = numSamples;  /* loop counters */
+    f16x8x2_t vecSrc;
+    f16x8_t sum;
+
+    /* Compute 4 complex samples at a time */
+    while (blockSize > 0)
+    {
+        mve_pred16_t p = vctp16q(blockSize);
+        vecSrc = vld2q(pSrc);
+        sum = vmulq_m(vuninitializedq_f16(),vecSrc.val[0], vecSrc.val[0],p);
+        sum = vfmaq_m(sum, vecSrc.val[1], vecSrc.val[1],p);
+        vstrhq_p_f16(pDst, sum,p);
+
+        pSrc += 16;
+        pDst += 8;
+        
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blockSize-= 8;
+    }
+
+}
+
+#else
+void arm_cmplx_mag_squared_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        _Float16 real, imag;                          /* Temporary input variables */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_mag_squared group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
index 8092df92..861585f1 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f32.c
@@ -1,184 +1,235 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mag_squared_f32.c
- * Description:  Floating-point complex magnitude squared
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @defgroup cmplx_mag_squared Complex Magnitude Squared
-
-  Computes the magnitude squared of the elements of a complex data vector.
-
-  The <code>pSrc</code> points to the source data and
-  <code>pDst</code> points to the where the result should be written.
-  <code>numSamples</code> specifies the number of complex samples
-  in the input array and the data is stored in an interleaved fashion
-  (real, imag, real, imag, ...).
-  The input array has a total of <code>2*numSamples</code> values;
-  the output array has a total of <code>numSamples</code> values.
-
-  The underlying algorithm is used:
-
-  <pre>
-  for (n = 0; n < numSamples; n++) {
-      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
-  }
-  </pre>
-
-  There are separate functions for floating-point, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup cmplx_mag_squared
-  @{
- */
-
-/**
-  @brief         Floating-point complex magnitude squared.
-  @param[in]     pSrc        points to input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
- */
-
-void arm_cmplx_mag_squared_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t real, imag;                          /* Temporary input variables */
-
-#if defined(ARM_MATH_NEON)
-  float32x4x2_t vecA;
-  float32x4_t vRealA;
-  float32x4_t vImagA;
-  float32x4_t vMagSqA;
-
-  float32x4x2_t vecB;
-  float32x4_t vRealB;
-  float32x4_t vImagB;
-  float32x4_t vMagSqB;
-
-  /* Loop unrolling: Compute 8 outputs at a time */
-  blkCnt = numSamples >> 3;
-
-  while (blkCnt > 0U)
-  {
-    /* out = sqrt((real * real) + (imag * imag)) */
-
-    vecA = vld2q_f32(pSrc);
-    pSrc += 8;
-
-    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
-    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
-    vMagSqA = vaddq_f32(vRealA, vImagA);
-
-    vecB = vld2q_f32(pSrc);
-    pSrc += 8;
-
-    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
-    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
-    vMagSqB = vaddq_f32(vRealB, vImagB);
-
-    /* Store the result in the destination buffer. */
-    vst1q_f32(pDst, vMagSqA);
-    pDst += 4;
-
-    vst1q_f32(pDst, vMagSqB);
-    pDst += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  blkCnt = numSamples & 7;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    *pDst++ = (real * real) + (imag * imag);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    *pDst++ = (real * real) + (imag * imag);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    *pDst++ = (real * real) + (imag * imag);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    *pDst++ = (real * real) + (imag * imag);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-
-    /* store result in destination buffer. */
-    *pDst++ = (real * real) + (imag * imag);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_mag_squared group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_f32.c
+ * Description:  Floating-point complex magnitude squared
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup cmplx_mag_squared Complex Magnitude Squared
+
+  Computes the magnitude squared of the elements of a complex data vector.
+
+  The <code>pSrc</code> points to the source data and
+  <code>pDst</code> points to the where the result should be written.
+  <code>numSamples</code> specifies the number of complex samples
+  in the input array and the data is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The input array has a total of <code>2*numSamples</code> values;
+  the output array has a total of <code>numSamples</code> values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[n] = pSrc[(2*n)+0]^2 + pSrc[(2*n)+1]^2;
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mag_squared_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+    int32_t blockSize = numSamples;  /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+    f32x4x2_t vecSrc;
+    f32x4_t sum;
+    float32_t real, imag;                          /* Temporary input variables */
+
+    /* Compute 4 complex samples at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld2q(pSrc);
+        sum = vmulq(vecSrc.val[0], vecSrc.val[0]);
+        sum = vfmaq(sum, vecSrc.val[1], vecSrc.val[1]);
+        vst1q(pDst, sum);
+
+        pSrc += 8;
+        pDst += 4;
+        
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+    while (blkCnt > 0U)
+    {
+      /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+  
+      real = *pSrc++;
+      imag = *pSrc++;
+  
+      /* store result in destination buffer. */
+      *pDst++ = (real * real) + (imag * imag);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+}
+
+#else
+void arm_cmplx_mag_squared_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t real, imag;                          /* Temporary input variables */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+  float32x4x2_t vecA;
+  float32x4_t vRealA;
+  float32x4_t vImagA;
+  float32x4_t vMagSqA;
+
+  float32x4x2_t vecB;
+  float32x4_t vRealB;
+  float32x4_t vImagB;
+  float32x4_t vMagSqB;
+
+  /* Loop unrolling: Compute 8 outputs at a time */
+  blkCnt = numSamples >> 3;
+
+  while (blkCnt > 0U)
+  {
+    /* out = sqrt((real * real) + (imag * imag)) */
+
+    vecA = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vRealA = vmulq_f32(vecA.val[0], vecA.val[0]);
+    vImagA = vmulq_f32(vecA.val[1], vecA.val[1]);
+    vMagSqA = vaddq_f32(vRealA, vImagA);
+
+    vecB = vld2q_f32(pSrc);
+    pSrc += 8;
+
+    vRealB = vmulq_f32(vecB.val[0], vecB.val[0]);
+    vImagB = vmulq_f32(vecB.val[1], vecB.val[1]);
+    vMagSqB = vaddq_f32(vRealB, vImagB);
+
+    /* Store the result in the destination buffer. */
+    vst1q_f32(pDst, vMagSqA);
+    pDst += 4;
+
+    vst1q_f32(pDst, vMagSqB);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  blkCnt = numSamples & 7;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of cmplx_mag_squared group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f64.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f64.c
new file mode 100644
index 00000000..fde0321e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f64.c
@@ -0,0 +1,76 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_f64.c
+ * Description:  Floating-point complex magnitude squared
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Floating-point complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+void arm_cmplx_mag_squared_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float64_t real, imag;                          /* Temporary input variables */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (real * real) + (imag * imag);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of cmplx_mag_squared group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
index 908f3bc1..42fc442e 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
@@ -1,161 +1,221 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mag_squared_q15.c
- * Description:  Q15 complex magnitude squared
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_mag_squared
-  @{
- */
-
-/**
-  @brief         Q15 complex magnitude squared.
-  @param[in]     pSrc        points to input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
- */
-
-void arm_cmplx_mag_squared_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_DSP)
-        q31_t in;
-        q31_t acc0;                                    /* Accumulators */
-#else
-        q15_t real, imag;                              /* Temporary input variables */
-        q31_t acc0, acc1;                              /* Accumulators */
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-
-#if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    /* store result in 3.13 format in destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    *pDst++ = (q15_t) (acc0 >> 17);
-
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-    *pDst++ = (q15_t) (acc0 >> 17);
-#else
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-    /* store result in 3.13 format in destination buffer. */
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-
-#if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    acc0 = __SMUAD(in, in);
-
-    /* store result in 3.13 format in destination buffer. */
-    *pDst++ = (q15_t) (acc0 >> 17);
-#else
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = ((q31_t) real * real);
-    acc1 = ((q31_t) imag * imag);
-
-    /* store result in 3.13 format in destination buffer. */
-    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_mag_squared group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_q15.c
+ * Description:  Q15 complex magnitude squared
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Q15 complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mag_squared_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+  int32_t blockSize = numSamples;  /* loop counters */
+  uint32_t  blkCnt;           /* loop counters */
+  q31_t in;
+  q31_t acc0;                                    /* Accumulators */
+  q15x8x2_t vecSrc;
+  q15x8_t vReal, vImag;
+  q15x8_t vMagSq;
+
+  
+  blkCnt = blockSize >> 3;
+  while (blkCnt > 0U)
+  {
+    vecSrc = vld2q(pSrc);
+    vReal = vmulhq(vecSrc.val[0], vecSrc.val[0]);
+    vImag = vmulhq(vecSrc.val[1], vecSrc.val[1]);
+    vMagSq = vqaddq(vReal, vImag);
+    vMagSq = vshrq(vMagSq, 1);
+
+    vst1q(pDst, vMagSq);
+
+    pSrc += 16;
+    pDst += 8;
+    /*
+     * Decrement the blkCnt loop counter
+     * Advance vector source and destination pointers
+     */
+    blkCnt --;
+  }
+
+  /*
+   * tail
+   */
+  blkCnt = blockSize & 7;
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+#else
+void arm_cmplx_mag_squared_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t acc0;                                    /* Accumulators */
+#else
+        q15_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+    *pDst++ = (q15_t) (acc0 >> 17);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+#if defined (ARM_MATH_DSP)
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    acc0 = __SMUAD(in, in);
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (acc0 >> 17);
+#else
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = ((q31_t) real * real);
+    acc1 = ((q31_t) imag * imag);
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) (((q63_t) acc0 + acc1) >> 17);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_mag_squared group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
index f16ff7ae..4ccde36e 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q31.c
@@ -1,129 +1,187 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mag_squared_q31.c
- * Description:  Q31 complex magnitude squared
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup cmplx_mag_squared
-  @{
- */
-
-/**
-  @brief         Q31 complex magnitude squared.
-  @param[in]     pSrc        points to input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
-                   Input down scaling is not required.
- */
-
-void arm_cmplx_mag_squared_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t real, imag;                              /* Temporary input variables */
-        q31_t acc0, acc1;                              /* Accumulators */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    /* store the result in 3.29 format in the destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    *pDst++ = acc0 + acc1;
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
-
-    real = *pSrc++;
-    imag = *pSrc++;
-    acc0 = (q31_t) (((q63_t) real * real) >> 33);
-    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
-
-    /* store result in 3.29 format in destination buffer. */
-    *pDst++ = acc0 + acc1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of cmplx_mag_squared group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mag_squared_q31.c
+ * Description:  Q31 complex magnitude squared
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup cmplx_mag_squared
+  @{
+ */
+
+/**
+  @brief         Q31 complex magnitude squared.
+  @param[in]     pSrc        points to input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+                   Input down scaling is not required.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mag_squared_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+    int32_t blockSize = numSamples;  /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4x2_t vecSrc;
+    q31x4_t vReal, vImag;
+    q31x4_t vMagSq;
+    q31_t real, imag;                              /* Temporary input variables */
+    q31_t acc0, acc1;                              /* Accumulators */
+
+    /* Compute 4 complex samples at a time */
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld2q(pSrc);
+        vReal = vmulhq(vecSrc.val[0], vecSrc.val[0]);
+        vImag = vmulhq(vecSrc.val[1], vecSrc.val[1]);
+        vMagSq = vqaddq(vReal, vImag);
+        vMagSq = vshrq(vMagSq, 1);
+
+        vst1q(pDst, vMagSq);
+
+        pSrc += 8;
+        pDst += 4;
+        /*
+         * Decrement the blkCnt loop counter
+         * Advance vector source and destination pointers
+         */
+        blkCnt --;
+    } 
+
+    /* Tail */
+    blkCnt = blockSize & 3;
+    while (blkCnt > 0U)
+    {
+      /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+  
+      real = *pSrc++;
+      imag = *pSrc++;
+      acc0 = (q31_t) (((q63_t) real * real) >> 33);
+      acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+  
+      /* store result in 3.29 format in destination buffer. */
+      *pDst++ = acc0 + acc1;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+void arm_cmplx_mag_squared_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t real, imag;                              /* Temporary input variables */
+        q31_t acc0, acc1;                              /* Accumulators */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    /* store the result in 3.29 format in the destination buffer. */
+    *pDst++ = acc0 + acc1;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    *pDst++ = acc0 + acc1;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    *pDst++ = acc0 + acc1;
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+    *pDst++ = acc0 + acc1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
+
+    real = *pSrc++;
+    imag = *pSrc++;
+    acc0 = (q31_t) (((q63_t) real * real) >> 33);
+    acc1 = (q31_t) (((q63_t) imag * imag) >> 33);
+
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = acc0 + acc1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of cmplx_mag_squared group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c
new file mode 100755
index 00000000..68e1d1b9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c
@@ -0,0 +1,271 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_f16.c
+ * Description:  Floating-point complex-by-complex multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
+
+  Multiplies a complex vector by another complex vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter <code>numSamples</code> represents the number of complex
+  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
+  real values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Floating-point complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mult_cmplx_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t numSamples)
+{
+     int32_t         blkCnt;
+    f16x8_t         vecSrcA, vecSrcB;
+    f16x8_t         vecSrcC, vecSrcD;
+    f16x8_t         vec_acc;
+
+    blkCnt = (numSamples >> 3);
+    blkCnt -= 1;
+    if (blkCnt > 0) {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        pSrcA += 8;
+        pSrcB += 8;
+
+        while (blkCnt > 0) {
+            vec_acc = vcmulq(vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 8;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 8;
+            vst1q(pDst, vec_acc);
+            pDst += 8;
+
+            vec_acc = vcmulq(vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 8;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 8;
+            vst1q(pDst, vec_acc);
+            pDst += 8;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        vec_acc = vcmulq(vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+        vst1q(pDst, vec_acc);
+        pDst += 8;
+
+        vec_acc = vcmulq(vecSrcC, vecSrcD);
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+        vst1q(pDst, vec_acc);
+        pDst += 8;
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 7);
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp16q(blkCnt);
+            pSrcA += 8;
+            pSrcB += 8;
+
+            vecSrcA = vldrhq_z_f16(pSrcA, p);
+            vecSrcB = vldrhq_z_f16(pSrcB, p);
+            vec_acc = vcmulq_m(vuninitializedq_f16(),vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+
+            vstrhq_p_f16(pDst, vec_acc, p);
+            pDst += 8;
+
+            blkCnt -= 8;
+        }
+    } else {
+        /* small vector */
+        blkCnt = numSamples * CMPLX_DIM;
+
+        do {
+            mve_pred16_t    p = vctp16q(blkCnt);
+
+            vecSrcA = vldrhq_z_f16(pSrcA, p);
+            vecSrcB = vldrhq_z_f16(pSrcB, p);
+
+            vec_acc = vcmulq_m(vuninitializedq_f16(),vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+            vstrhq_p_f16(pDst, vec_acc, p);
+            pDst += 8;
+
+            /*
+             * Decrement the blkCnt loop counter
+             * Advance vector source and destination pointers
+             */
+            pSrcA += 8;
+            pSrcB += 8;
+            blkCnt -= 8;
+        }
+        while (blkCnt > 0);
+    }
+
+}
+
+
+#else
+void arm_cmplx_mult_cmplx_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        float16_t * pDst,
+        uint32_t numSamples)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+    _Float16 a, b, c, d;  /* Temporary variables to store real and imaginary values */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
index ee758829..5d2c66c4 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f32.c
@@ -1,194 +1,305 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mult_cmplx_f32.c
- * Description:  Floating-point complex-by-complex multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
-
-  Multiplies a complex vector by another complex vector and generates a complex result.
-  The data in the complex arrays is stored in an interleaved fashion
-  (real, imag, real, imag, ...).
-  The parameter <code>numSamples</code> represents the number of complex
-  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
-  real values.
-
-  The underlying algorithm is used:
-
-  <pre>
-  for (n = 0; n < numSamples; n++) {
-      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
-      pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
-  }
-  </pre>
-
-  There are separate functions for floating-point, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup CmplxByCmplxMult
-  @{
- */
-
-/**
-  @brief         Floating-point complex-by-complex multiplication.
-  @param[in]     pSrcA       points to first input vector
-  @param[in]     pSrcB       points to second input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
- */
-
-void arm_cmplx_mult_cmplx_f32(
-  const float32_t * pSrcA,
-  const float32_t * pSrcB,
-        float32_t * pDst,
-        uint32_t numSamples)
-{
-    uint32_t blkCnt;                               /* Loop counter */
-    float32_t a, b, c, d;  /* Temporary variables to store real and imaginary values */
-
-#if defined(ARM_MATH_NEON)
-    float32x4x2_t va, vb;
-    float32x4_t real, imag;
-    float32x4x2_t outCplx;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        va = vld2q_f32(pSrcA);  // load & separate real/imag pSrcA (de-interleave 2)
-        vb = vld2q_f32(pSrcB);  // load & separate real/imag pSrcB
-
-	/* Increment pointers */
-        pSrcA += 8;
-        pSrcB += 8;
-	
-	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
-        outCplx.val[0] = vmulq_f32(va.val[0], vb.val[0]);
-        outCplx.val[0] = vmlsq_f32(outCplx.val[0], va.val[1], vb.val[1]);
-
-	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
-        outCplx.val[1] = vmulq_f32(va.val[0], vb.val[1]);
-        outCplx.val[1] = vmlaq_f32(outCplx.val[1], va.val[1], vb.val[0]);
-
-        vst2q_f32(pDst, outCplx);
-
-	/* Increment pointer */
-        pDst += 8;
-
-	/* Decrement the loop counter */
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = numSamples & 3;
-
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    /* store result in destination buffer. */
-    *pDst++ = (a * c) - (b * d);
-    *pDst++ = (a * d) + (b * c);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (a * c) - (b * d);
-    *pDst++ = (a * d) + (b * c);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (a * c) - (b * d);
-    *pDst++ = (a * d) + (b * c);
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (a * c) - (b * d);
-    *pDst++ = (a * d) + (b * c);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store result in destination buffer. */
-    *pDst++ = (a * c) - (b * d);
-    *pDst++ = (a * d) + (b * c);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of CmplxByCmplxMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_f32.c
+ * Description:  Floating-point complex-by-complex multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup CmplxByCmplxMult Complex-by-Complex Multiplication
+
+  Multiplies a complex vector by another complex vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter <code>numSamples</code> represents the number of complex
+  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
+  real values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pDst[(2*n)+0] = pSrcA[(2*n)+0] * pSrcB[(2*n)+0] - pSrcA[(2*n)+1] * pSrcB[(2*n)+1];
+      pDst[(2*n)+1] = pSrcA[(2*n)+0] * pSrcB[(2*n)+1] + pSrcA[(2*n)+1] * pSrcB[(2*n)+0];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Floating-point complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mult_cmplx_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+     int32_t         blkCnt;
+    f32x4_t         vecSrcA, vecSrcB;
+    f32x4_t         vecSrcC, vecSrcD;
+    f32x4_t         vec_acc;
+
+    blkCnt = numSamples >> 2;
+    blkCnt -= 1;
+    if (blkCnt > 0) {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        pSrcA += 4;
+        pSrcB += 4;
+
+        while (blkCnt > 0) {
+            vec_acc = vcmulq(vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 4;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 4;
+            vst1q(pDst, vec_acc);
+            pDst += 4;
+
+            vec_acc = vcmulq(vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 4;
+
+            vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 4;
+            vst1q(pDst, vec_acc);
+            pDst += 4;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        vec_acc = vcmulq(vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+        vst1q(pDst, vec_acc);
+        pDst += 4;
+
+        vec_acc = vcmulq(vecSrcC, vecSrcD);
+        vec_acc = vcmlaq_rot90(vec_acc, vecSrcC, vecSrcD);
+        vst1q(pDst, vec_acc);
+        pDst += 4;
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 3);
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp32q(blkCnt);
+            pSrcA += 4;
+            pSrcB += 4;
+
+            vecSrcA = vldrwq_z_f32(pSrcA, p);
+            vecSrcB = vldrwq_z_f32(pSrcB, p);
+            vec_acc = vcmulq_m(vuninitializedq_f32(),vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+
+            vstrwq_p_f32(pDst, vec_acc, p);
+            pDst += 4;
+
+            blkCnt -= 4;
+        }
+    } else {
+        /* small vector */
+        blkCnt = numSamples * CMPLX_DIM;
+        vec_acc = vdupq_n_f32(0.0f);
+
+        do {
+            mve_pred16_t    p = vctp32q(blkCnt);
+
+            vecSrcA = vldrwq_z_f32(pSrcA, p);
+            vecSrcB = vldrwq_z_f32(pSrcB, p);
+
+            vec_acc = vcmulq_m(vuninitializedq_f32(),vecSrcA, vecSrcB, p);
+            vec_acc = vcmlaq_rot90_m(vec_acc, vecSrcA, vecSrcB, p);
+            vstrwq_p_f32(pDst, vec_acc, p);
+            pDst += 4;
+
+            /*
+             * Decrement the blkCnt loop counter
+             * Advance vector source and destination pointers
+             */
+            pSrcA += 4;
+            pSrcB += 4;
+            blkCnt -= 4;
+        }
+        while (blkCnt > 0);
+    }
+
+}
+
+#else
+void arm_cmplx_mult_cmplx_f32(
+  const float32_t * pSrcA,
+  const float32_t * pSrcB,
+        float32_t * pDst,
+        uint32_t numSamples)
+{
+    uint32_t blkCnt;                               /* Loop counter */
+    float32_t a, b, c, d;  /* Temporary variables to store real and imaginary values */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    float32x4x2_t va, vb;
+    float32x4x2_t outCplx;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        va = vld2q_f32(pSrcA);  // load & separate real/imag pSrcA (de-interleave 2)
+        vb = vld2q_f32(pSrcB);  // load & separate real/imag pSrcB
+
+	/* Increment pointers */
+        pSrcA += 8;
+        pSrcB += 8;
+	
+	/* Re{C} = Re{A}*Re{B} - Im{A}*Im{B} */
+        outCplx.val[0] = vmulq_f32(va.val[0], vb.val[0]);
+        outCplx.val[0] = vmlsq_f32(outCplx.val[0], va.val[1], vb.val[1]);
+
+	/* Im{C} = Re{A}*Im{B} + Im{A}*Re{B} */
+        outCplx.val[1] = vmulq_f32(va.val[0], vb.val[1]);
+        outCplx.val[1] = vmlaq_f32(outCplx.val[1], va.val[1], vb.val[0]);
+
+        vst2q_f32(pDst, outCplx);
+
+	/* Increment pointer */
+        pDst += 8;
+
+	/* Decrement the loop counter */
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = numSamples & 3;
+
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f64.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f64.c
new file mode 100644
index 00000000..75a044c4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f64.c
@@ -0,0 +1,83 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_f64.c
+ * Description:  Floating-point complex-by-complex multiplication
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Floating-point complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+void arm_cmplx_mult_cmplx_f64(
+  const float64_t * pSrcA,
+  const float64_t * pSrcB,
+        float64_t * pDst,
+        uint32_t numSamples)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+  float64_t a, b, c, d;  /* Temporary variables to store real and imaginary values */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in destination buffer. */
+    *pDst++ = (a * c) - (b * d);
+    *pDst++ = (a * d) + (b * c);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
index e490822a..53fbe58d 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q15.c
@@ -1,136 +1,258 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mult_cmplx_q15.c
- * Description:  Q15 complex-by-complex multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup CmplxByCmplxMult
-  @{
- */
-
-/**
-  @brief         Q15 complex-by-complex multiplication.
-  @param[in]     pSrcA       points to first input vector
-  @param[in]     pSrcB       points to second input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
- */
-
-void arm_cmplx_mult_cmplx_q15(
-  const q15_t * pSrcA,
-  const q15_t * pSrcB,
-        q15_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q15_t a, b, c, d;                              /* Temporary variables */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    /* store result in 3.13 format in destination buffer. */
-    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
-    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
-    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
-    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
-    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store result in 3.13 format in destination buffer. */
-    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
-    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of CmplxByCmplxMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_q15.c
+ * Description:  Q15 complex-by-complex multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Q15 complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.15 by 1.15 multiplications and finally output is converted into 3.13 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mult_cmplx_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+   int32_t         blkCnt;
+    q15x8_t         vecSrcA, vecSrcB;
+    q15x8_t         vecSrcC, vecSrcD;
+    q15x8_t         vecDst;
+
+    blkCnt = (numSamples >> 3);
+    blkCnt -= 1;
+    if (blkCnt > 0) 
+    {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        pSrcA += 8;
+        pSrcB += 8;
+
+        while (blkCnt > 0) 
+        {
+
+            /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
+            vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 8;
+
+            /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
+            vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 8;
+
+            vstrhq_s16(pDst, vshrq(vecDst, 2));
+            pDst += 8;
+
+            vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 8;
+
+            vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 8;
+
+            vstrhq_s16(pDst, vshrq(vecDst, 2));
+            pDst += 8;
+
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+
+        vstrhq_s16(pDst, vshrq(vecDst, 2));
+        pDst += 8;
+
+        vecDst = vqdmlsdhq(vuninitializedq_s16(), vecSrcC, vecSrcD);
+        vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD);
+
+        vstrhq_s16(pDst, vshrq(vecDst, 2));
+        pDst += 8;
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 7);
+        do 
+        {
+            mve_pred16_t    p = vctp16q(blkCnt);
+
+            pSrcA += 8;
+            pSrcB += 8;
+
+            vecSrcA = vldrhq_z_s16(pSrcA, p);
+            vecSrcB = vldrhq_z_s16(pSrcB, p);
+
+            vecDst = vqdmlsdhq_m(vuninitializedq_s16(), vecSrcA, vecSrcB, p);
+            vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p);
+
+            vecDst = vshrq_m(vuninitializedq_s16(), vecDst, 2, p);
+            vstrhq_p_s16(pDst, vecDst, p);
+            pDst += 8;
+
+            blkCnt -= 8;
+        }
+        while ((int32_t) blkCnt > 0);
+    } 
+    else 
+    {
+        blkCnt = numSamples * CMPLX_DIM;
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp16q(blkCnt);
+
+            vecSrcA = vldrhq_z_s16(pSrcA, p);
+            vecSrcB = vldrhq_z_s16(pSrcB, p);
+
+            vecDst = vqdmlsdhq_m(vuninitializedq_s16(), vecSrcA, vecSrcB, p);
+            vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p);
+
+            vecDst = vshrq_m(vuninitializedq_s16(), vecDst, 2, p);
+            vstrhq_p_s16(pDst, vecDst, p);
+
+            pDst += 8;
+            pSrcA += 8;
+            pSrcB += 8;
+
+            blkCnt -= 8;
+    }
+  }
+}
+#else
+void arm_cmplx_mult_cmplx_q15(
+  const q15_t * pSrcA,
+  const q15_t * pSrcB,
+        q15_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t a, b, c, d;                              /* Temporary variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in 3.13 format in destination buffer. */
+    *pDst++ = (q15_t) ( (((q31_t) a * c) >> 17) - (((q31_t) b * d) >> 17) );
+    *pDst++ = (q15_t) ( (((q31_t) a * d) >> 17) + (((q31_t) b * c) >> 17) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
index 88fd8702..7f945619 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_q31.c
@@ -1,137 +1,253 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mult_cmplx_q31.c
- * Description:  Q31 complex-by-complex multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup CmplxByCmplxMult
-  @{
- */
-
-/**
-  @brief         Q31 complex-by-complex multiplication.
-  @param[in]     pSrcA       points to first input vector
-  @param[in]     pSrcB       points to second input vector
-  @param[out]    pDst        points to output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
-                   Input down scaling is not required.
- */
-
-void arm_cmplx_mult_cmplx_q31(
-  const q31_t * pSrcA,
-  const q31_t * pSrcB,
-        q31_t * pDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t a, b, c, d;                              /* Temporary variables */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    /* store result in 3.29 format in destination buffer. */
-    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
-    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
-    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
-    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
-    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
-    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
-
-    a = *pSrcA++;
-    b = *pSrcA++;
-    c = *pSrcB++;
-    d = *pSrcB++;
-
-    /* store result in 3.29 format in destination buffer. */
-    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
-    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of CmplxByCmplxMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_cmplx_q31.c
+ * Description:  Q31 complex-by-complex multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByCmplxMult
+  @{
+ */
+
+/**
+  @brief         Q31 complex-by-complex multiplication.
+  @param[in]     pSrcA       points to first input vector
+  @param[in]     pSrcB       points to second input vector
+  @param[out]    pDst        points to output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function implements 1.31 by 1.31 multiplications and finally output is converted into 3.29 format.
+                   Input down scaling is not required.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_cmplx_mult_cmplx_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+    int32_t         blkCnt;
+    q31x4_t         vecSrcA, vecSrcB;
+    q31x4_t         vecSrcC, vecSrcD;
+    q31x4_t         vecDst;
+
+    blkCnt = numSamples >> 2;
+    blkCnt -= 1;
+    if (blkCnt > 0) {
+        /* should give more freedom to generate stall free code */
+        vecSrcA = vld1q(pSrcA);
+        vecSrcB = vld1q(pSrcB);
+        pSrcA += 4;
+        pSrcB += 4;
+
+        while (blkCnt > 0) {
+
+            /* C[2 * i] = A[2 * i] * B[2 * i] - A[2 * i + 1] * B[2 * i + 1].  */
+            vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcA, vecSrcB);
+            vecSrcC = vld1q(pSrcA);
+            pSrcA += 4;
+
+            /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i].  */
+            vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB);
+            vecSrcD = vld1q(pSrcB);
+            pSrcB += 4;
+
+            vst1q(pDst, vshrq(vecDst, 2));
+            pDst += 4;
+
+            vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcC, vecSrcD);
+            vecSrcA = vld1q(pSrcA);
+            pSrcA += 4;
+
+            vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD);
+            vecSrcB = vld1q(pSrcB);
+            pSrcB += 4;
+
+            vst1q(pDst, vshrq(vecDst, 2));
+            pDst += 4;
+
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /* process last elements out of the loop avoid the armclang breaking the SW pipeline */
+        vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcA, vecSrcB);
+        vecSrcC = vld1q(pSrcA);
+
+        vecDst = vqdmladhxq(vecDst, vecSrcA, vecSrcB);
+        vecSrcD = vld1q(pSrcB);
+
+        vst1q(pDst, vshrq(vecDst, 2));
+        pDst += 4;
+
+        vecDst = vqdmlsdhq(vuninitializedq_s32(), vecSrcC, vecSrcD);
+        vecDst = vqdmladhxq(vecDst, vecSrcC, vecSrcD);
+
+        vst1q(pDst, vshrq(vecDst, 2));
+        pDst += 4;
+
+        /*
+         * tail
+         */
+        blkCnt = CMPLX_DIM * (numSamples & 3);
+        do {
+            mve_pred16_t    p = vctp32q(blkCnt);
+
+            pSrcA += 4;
+            pSrcB += 4;
+
+            vecSrcA = vldrwq_z_s32(pSrcA, p);
+            vecSrcB = vldrwq_z_s32(pSrcB, p);
+
+            vecDst = vqdmlsdhq_m(vuninitializedq_s32(), vecSrcA, vecSrcB, p);
+            vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p);
+
+            vecDst = vshrq_m(vuninitializedq_s32(), vecDst, 2, p);
+            vstrwq_p_s32(pDst, vecDst, p);
+            pDst += 4;
+
+            blkCnt -= 4;
+        }
+        while ((int32_t) blkCnt > 0);
+    } else {
+        blkCnt = numSamples * CMPLX_DIM;
+        while (blkCnt > 0) {
+            mve_pred16_t    p = vctp32q(blkCnt);
+
+            vecSrcA = vldrwq_z_s32(pSrcA, p);
+            vecSrcB = vldrwq_z_s32(pSrcB, p);
+
+            vecDst = vqdmlsdhq_m(vuninitializedq_s32(), vecSrcA, vecSrcB, p);
+            vecDst = vqdmladhxq_m(vecDst, vecSrcA, vecSrcB, p);
+
+            vecDst = vshrq_m(vuninitializedq_s32(), vecDst, 2, p);
+            vstrwq_p_s32(pDst, vecDst, p);
+
+            pDst += 4;
+            pSrcA += 4;
+            pSrcB += 4;
+
+            blkCnt -= 4;
+        }
+    }
+}
+#else
+void arm_cmplx_mult_cmplx_q31(
+  const q31_t * pSrcA,
+  const q31_t * pSrcB,
+        q31_t * pDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t a, b, c, d;                              /* Temporary variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i] * B[2 * i    ] - A[2 * i + 1] * B[2 * i + 1]. */
+    /* C[2 * i + 1] = A[2 * i] * B[2 * i + 1] + A[2 * i + 1] * B[2 * i    ]. */
+
+    a = *pSrcA++;
+    b = *pSrcA++;
+    c = *pSrcB++;
+    d = *pSrcB++;
+
+    /* store result in 3.29 format in destination buffer. */
+    *pDst++ = (q31_t) ( (((q63_t) a * c) >> 33) - (((q63_t) b * d) >> 33) );
+    *pDst++ = (q31_t) ( (((q63_t) a * d) >> 33) + (((q63_t) b * c) >> 33) );
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of CmplxByCmplxMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c
new file mode 100755
index 00000000..f5909fc8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c
@@ -0,0 +1,194 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_real_f16.c
+ * Description:  Floating-point complex by real multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup CmplxByRealMult Complex-by-Real Multiplication
+
+  Multiplies a complex vector by a real vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter <code>numSamples</code> represents the number of complex
+  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
+  real values while the real array has a total of <code>numSamples</code>
+  real values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
+      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup CmplxByRealMult
+  @{
+ */
+
+/**
+  @brief         Floating-point complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mult_real_f16(
+  const float16_t * pSrcCmplx,
+  const float16_t * pSrcReal,
+        float16_t * pCmplxDst,
+        uint32_t numSamples)
+{
+    static const uint16_t stride_cmplx_x_real_16[8] = {
+        0, 0, 1, 1, 2, 2, 3, 3
+        };
+    uint32_t blockSizeC = numSamples * CMPLX_DIM;   /* loop counters */
+    uint32_t blkCnt;
+    f16x8_t rVec;
+    f16x8_t cmplxVec;
+    f16x8_t dstVec;
+    uint16x8_t strideVec;
+
+
+    /* stride vector for pairs of real generation */
+    strideVec = vld1q(stride_cmplx_x_real_16);
+
+    /* Compute 4 complex outputs at a time */
+    blkCnt = blockSizeC >> 3;
+    while (blkCnt > 0U) 
+    {
+        cmplxVec = vld1q(pSrcCmplx);
+        rVec = vldrhq_gather_shifted_offset_f16(pSrcReal, strideVec);
+        dstVec = vmulq(cmplxVec, rVec);
+        vst1q(pCmplxDst, dstVec);
+
+        pSrcReal += 4;
+        pSrcCmplx += 8;
+        pCmplxDst += 8;
+        blkCnt--;
+    }
+
+    blkCnt = blockSizeC & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+
+        cmplxVec = vld1q(pSrcCmplx);
+        rVec = vldrhq_gather_shifted_offset_f16(pSrcReal, strideVec);
+        dstVec = vmulq(cmplxVec, rVec);
+        vstrhq_p_f16(pCmplxDst, dstVec, p0);
+    }
+}
+
+#else
+void arm_cmplx_mult_real_f16(
+  const float16_t * pSrcCmplx,
+  const float16_t * pSrcReal,
+        float16_t * pCmplxDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float16_t in;                                  /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of CmplxByRealMult group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
index 2b7d087c..bc0f59b2 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f32.c
@@ -1,169 +1,224 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mult_real_f32.c
- * Description:  Floating-point complex by real multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @defgroup CmplxByRealMult Complex-by-Real Multiplication
-
-  Multiplies a complex vector by a real vector and generates a complex result.
-  The data in the complex arrays is stored in an interleaved fashion
-  (real, imag, real, imag, ...).
-  The parameter <code>numSamples</code> represents the number of complex
-  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
-  real values while the real array has a total of <code>numSamples</code>
-  real values.
-
-  The underlying algorithm is used:
-
-  <pre>
-  for (n = 0; n < numSamples; n++) {
-      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
-      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
-  }
-  </pre>
-
-  There are separate functions for floating-point, Q15, and Q31 data types.
- */
-
-/**
-  @addtogroup CmplxByRealMult
-  @{
- */
-
-/**
-  @brief         Floating-point complex-by-real multiplication.
-  @param[in]     pSrcCmplx   points to complex input vector
-  @param[in]     pSrcReal    points to real input vector
-  @param[out]    pCmplxDst   points to complex output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
- */
-
-void arm_cmplx_mult_real_f32(
-  const float32_t * pSrcCmplx,
-  const float32_t * pSrcReal,
-        float32_t * pCmplxDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t in;                                  /* Temporary variable */
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t r;
-    float32x4x2_t ab,outCplx;
-
-    /* Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-        ab = vld2q_f32(pSrcCmplx);  // load & separate real/imag pSrcA (de-interleave 2)
-        r = vld1q_f32(pSrcReal);  // load & separate real/imag pSrcB
-
-	/* Increment pointers */
-        pSrcCmplx += 8;
-        pSrcReal += 4;
-
-        outCplx.val[0] = vmulq_f32(ab.val[0], r);
-        outCplx.val[1] = vmulq_f32(ab.val[1], r);
-
-        vst2q_f32(pCmplxDst, outCplx);
-        pCmplxDst += 8;
-
-        blkCnt--;
-    }
-
-    /* Tail */
-    blkCnt = numSamples & 3;
-#else
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
-
-    in = *pSrcReal++;
-    /* store result in destination buffer. */
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-
-    in = *pSrcReal++;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-
-    in = *pSrcReal++;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-
-    in = *pSrcReal++;
-    *pCmplxDst++ = *pSrcCmplx++* in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
-
-    in = *pSrcReal++;
-    /* store result in destination buffer. */
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of CmplxByRealMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_real_f32.c
+ * Description:  Floating-point complex by real multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @defgroup CmplxByRealMult Complex-by-Real Multiplication
+
+  Multiplies a complex vector by a real vector and generates a complex result.
+  The data in the complex arrays is stored in an interleaved fashion
+  (real, imag, real, imag, ...).
+  The parameter <code>numSamples</code> represents the number of complex
+  samples processed.  The complex arrays have a total of <code>2*numSamples</code>
+  real values while the real array has a total of <code>numSamples</code>
+  real values.
+
+  The underlying algorithm is used:
+
+  <pre>
+  for (n = 0; n < numSamples; n++) {
+      pCmplxDst[(2*n)+0] = pSrcCmplx[(2*n)+0] * pSrcReal[n];
+      pCmplxDst[(2*n)+1] = pSrcCmplx[(2*n)+1] * pSrcReal[n];
+  }
+  </pre>
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+/**
+  @addtogroup CmplxByRealMult
+  @{
+ */
+
+/**
+  @brief         Floating-point complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mult_real_f32(
+  const float32_t * pSrcCmplx,
+  const float32_t * pSrcReal,
+        float32_t * pCmplxDst,
+        uint32_t numSamples)
+{
+    static const uint32_t stride_cmplx_x_real_32[4] = { 0, 0, 1, 1 };
+
+    uint32_t blockSizeC = numSamples * CMPLX_DIM;   /* loop counters */
+    uint32_t blkCnt;
+    f32x4_t rVec;
+    f32x4_t cmplxVec;
+    f32x4_t dstVec;
+    uint32x4_t strideVec;
+    float32_t in;  
+
+
+    /* stride vector for pairs of real generation */
+    strideVec = vld1q(stride_cmplx_x_real_32);
+
+    /* Compute 4 complex outputs at a time */
+    blkCnt = blockSizeC >> 2;
+    while (blkCnt > 0U) 
+    {
+        cmplxVec = vld1q(pSrcCmplx);
+        rVec = vldrwq_gather_shifted_offset_f32(pSrcReal, strideVec);
+        dstVec = vmulq(cmplxVec, rVec);
+        vst1q(pCmplxDst, dstVec);
+
+        pSrcReal += 2;
+        pSrcCmplx += 4;
+        pCmplxDst += 4;
+        blkCnt--;
+    }
+
+    blkCnt = (blockSizeC & 3) >> 1; 
+    while (blkCnt > 0U)
+    {
+      /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+      /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+  
+      in = *pSrcReal++;
+      /* store result in destination buffer. */
+      *pCmplxDst++ = *pSrcCmplx++ * in;
+      *pCmplxDst++ = *pSrcCmplx++ * in;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+void arm_cmplx_mult_real_f32(
+  const float32_t * pSrcCmplx,
+  const float32_t * pSrcReal,
+        float32_t * pCmplxDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t in;                                  /* Temporary variable */
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+    float32x4_t r;
+    float32x4x2_t ab,outCplx;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        ab = vld2q_f32(pSrcCmplx);  // load & separate real/imag pSrcA (de-interleave 2)
+        r = vld1q_f32(pSrcReal);  // load & separate real/imag pSrcB
+
+	/* Increment pointers */
+        pSrcCmplx += 8;
+        pSrcReal += 4;
+
+        outCplx.val[0] = vmulq_f32(ab.val[0], r);
+        outCplx.val[1] = vmulq_f32(ab.val[1], r);
+
+        vst2q_f32(pCmplxDst, outCplx);
+        pCmplxDst += 8;
+
+        blkCnt--;
+    }
+
+    /* Tail */
+    blkCnt = numSamples & 3;
+#else
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = *pSrcCmplx++* in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store result in destination buffer. */
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = *pSrcCmplx++ * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of CmplxByRealMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
index b6d3cb81..a43383b7 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
@@ -1,182 +1,238 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mult_real_q15.c
- * Description:  Q15 complex by real multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup CmplxByRealMult
-  @{
- */
-
-/**
-  @brief         Q15 complex-by-real multiplication.
-  @param[in]     pSrcCmplx   points to complex input vector
-  @param[in]     pSrcReal    points to real input vector
-  @param[out]    pCmplxDst   points to complex output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-void arm_cmplx_mult_real_q15(
-  const q15_t * pSrcCmplx,
-  const q15_t * pSrcReal,
-        q15_t * pCmplxDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q15_t in;                                      /* Temporary variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-#if defined (ARM_MATH_DSP)
-        q31_t inA1, inA2;                              /* Temporary variables to hold input data */
-        q31_t inB1;                                    /* Temporary variables to hold input data */
-        q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
-        q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
-#endif
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
-
-#if defined (ARM_MATH_DSP)
-    /* read 2 complex numbers both real and imaginary from complex input buffer */
-    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
-    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
-    /* read 2 real values at a time from real input buffer */
-    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
-
-    /* multiply complex number with real numbers */
-#ifndef ARM_MATH_BIG_ENDIAN
-    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-#else
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2         * (q15_t) inB1);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* saturate the result */
-    out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15U, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
-
-    /* pack real and imaginary outputs and store them to destination */
-    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
-    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
-
-    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
-    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
-    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
-    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
-#else
-    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
-    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
-    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
-    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
-    out2 = (q15_t) __SSAT(mul2 >> 15U, 16);
-    out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
-    out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
-
-    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
-    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
-#else
-    in = *pSrcReal++;
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-
-    in = *pSrcReal++;
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-
-    in = *pSrcReal++;
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-
-    in = *pSrcReal++;
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
-
-    in = *pSrcReal++;
-    /* store the result in the destination buffer. */
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of CmplxByRealMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_real_q15.c
+ * Description:  Q15 complex by real multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByRealMult
+  @{
+ */
+
+/**
+  @brief         Q15 complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_cmplx_mult_real_q15(
+  const q15_t * pSrcCmplx,
+  const q15_t * pSrcReal,
+        q15_t * pCmplxDst,
+        uint32_t numSamples)
+{
+  static const uint16_t stride_cmplx_x_real_16[8] = {
+      0, 0, 1, 1, 2, 2, 3, 3
+      };
+  q15x8_t rVec;
+  q15x8_t cmplxVec;
+  q15x8_t dstVec;
+  uint16x8_t strideVec;
+  uint32_t blockSizeC = numSamples * CMPLX_DIM;   /* loop counters */
+  uint32_t blkCnt;
+  q15_t in;  
+
+  /*
+  * stride vector for pairs of real generation
+  */
+  strideVec = vld1q(stride_cmplx_x_real_16);
+
+  blkCnt = blockSizeC >> 3;
+
+  while (blkCnt > 0U) 
+  {
+    cmplxVec = vld1q(pSrcCmplx);
+    rVec = vldrhq_gather_shifted_offset_s16(pSrcReal, strideVec);
+    dstVec = vqdmulhq(cmplxVec, rVec);
+    vst1q(pCmplxDst, dstVec);
+
+    pSrcReal += 4;
+    pSrcCmplx += 8;
+    pCmplxDst += 8;
+    blkCnt --;
+  }
+
+  /* Tail */
+  blkCnt = (blockSizeC & 7) >> 1;
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store the result in the destination buffer. */
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_cmplx_mult_real_q15(
+  const q15_t * pSrcCmplx,
+  const q15_t * pSrcReal,
+        q15_t * pCmplxDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q15_t in;                                      /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+#if defined (ARM_MATH_DSP)
+        q31_t inA1, inA2;                              /* Temporary variables to hold input data */
+        q31_t inB1;                                    /* Temporary variables to hold input data */
+        q15_t out1, out2, out3, out4;                  /* Temporary variables to hold output data */
+        q31_t mul1, mul2, mul3, mul4;                  /* Temporary variables to hold intermediate data */
+#endif
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+#if defined (ARM_MATH_DSP)
+    /* read 2 complex numbers both real and imaginary from complex input buffer */
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    /* read 2 real values at a time from real input buffer */
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
+
+    /* multiply complex number with real numbers */
+#ifndef ARM_MATH_BIG_ENDIAN
+    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
+    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
+#else
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
+    mul3 = (q31_t) ((q15_t) inA2         * (q15_t) inB1);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* saturate the result */
+    out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
+    out2 = (q15_t) __SSAT(mul2 >> 15U, 16);
+    out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
+    out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
+
+    /* pack real and imaginary outputs and store them to destination */
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
+
+    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1));
+    mul3 = (q31_t) ((q15_t) (inA2)       * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) (inB1 >> 16));
+#else
+    mul2 = (q31_t) ((q15_t) (inA1 >> 16) * (q15_t) (inB1 >> 16));
+    mul1 = (q31_t) ((q15_t) inA1         * (q15_t) (inB1 >> 16));
+    mul4 = (q31_t) ((q15_t) (inA2 >> 16) * (q15_t) inB1);
+    mul3 = (q31_t) ((q15_t) inA2 * (q15_t) inB1);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    out1 = (q15_t) __SSAT(mul1 >> 15U, 16);
+    out2 = (q15_t) __SSAT(mul2 >> 15U, 16);
+    out3 = (q15_t) __SSAT(mul3 >> 15U, 16);
+    out4 = (q15_t) __SSAT(mul4 >> 15U, 16);
+
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
+    write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
+#else
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    in = *pSrcReal++;
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+    /* store the result in the destination buffer. */
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+    *pCmplxDst++ = (q15_t) __SSAT((((q31_t) *pSrcCmplx++ * in) >> 15), 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of CmplxByRealMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
index f3142b0a..de13757d 100644
--- a/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q31.c
@@ -1,148 +1,204 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mult_real_q31.c
- * Description:  Q31 complex by real multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupCmplxMath
- */
-
-/**
-  @addtogroup CmplxByRealMult
-  @{
- */
-
-/**
-  @brief         Q31 complex-by-real multiplication.
-  @param[in]     pSrcCmplx   points to complex input vector
-  @param[in]     pSrcReal    points to real input vector
-  @param[out]    pCmplxDst   points to complex output vector
-  @param[in]     numSamples  number of samples in each vector
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
- */
-
-void arm_cmplx_mult_real_q31(
-  const q31_t * pSrcCmplx,
-  const q31_t * pSrcReal,
-        q31_t * pCmplxDst,
-        uint32_t numSamples)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t in;                                      /* Temporary variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = numSamples >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
-
-    in = *pSrcReal++;
-#if defined (ARM_MATH_DSP)
-    /* store saturated result in 1.31 format to destination buffer */
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-#else
-    /* store result in destination buffer. */
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-#endif
-
-    in = *pSrcReal++;
-#if defined (ARM_MATH_DSP)
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-#else
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-#endif
-
-    in = *pSrcReal++;
-#if defined (ARM_MATH_DSP)
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-#else
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-#endif
-
-    in = *pSrcReal++;
-#if defined (ARM_MATH_DSP)
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-#else
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = numSamples % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
-    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
-
-    in = *pSrcReal++;
-#if defined (ARM_MATH_DSP)
-    /* store saturated result in 1.31 format to destination buffer */
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
-#else
-    /* store result in destination buffer. */
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
-#endif
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of CmplxByRealMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mult_real_q31.c
+ * Description:  Q31 complex by real multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/complex_math_functions.h"
+
+/**
+  @ingroup groupCmplxMath
+ */
+
+/**
+  @addtogroup CmplxByRealMult
+  @{
+ */
+
+/**
+  @brief         Q31 complex-by-real multiplication.
+  @param[in]     pSrcCmplx   points to complex input vector
+  @param[in]     pSrcReal    points to real input vector
+  @param[out]    pCmplxDst   points to complex output vector
+  @param[in]     numSamples  number of samples in each vector
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_cmplx_mult_real_q31(
+  const q31_t * pSrcCmplx,
+  const q31_t * pSrcReal,
+        q31_t * pCmplxDst,
+        uint32_t numSamples)
+{
+
+    static const uint32_t stride_cmplx_x_real_32[4] = {
+        0, 0, 1, 1
+    };
+    q31x4_t rVec;
+    q31x4_t cmplxVec;
+    q31x4_t dstVec;
+    uint32x4_t strideVec;
+    uint32_t blockSizeC = numSamples * CMPLX_DIM;   /* loop counters */
+    uint32_t blkCnt;
+    q31_t in;
+
+    /*
+     * stride vector for pairs of real generation
+     */
+    strideVec = vld1q(stride_cmplx_x_real_32);
+
+    /* Compute 4 complex outputs at a time */
+    blkCnt = blockSizeC >> 2;
+    while (blkCnt > 0U) 
+    {
+        cmplxVec = vld1q(pSrcCmplx);
+        rVec = vldrwq_gather_shifted_offset_s32(pSrcReal, strideVec);
+        dstVec = vqdmulhq(cmplxVec, rVec);
+        vst1q(pCmplxDst, dstVec);
+
+        pSrcReal += 2;
+        pSrcCmplx += 4;
+        pCmplxDst += 4;
+        blkCnt --;
+    }
+
+    blkCnt = (blockSizeC & 3) >> 1; 
+    while (blkCnt > 0U)
+    {
+      /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+      /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+  
+      in = *pSrcReal++;
+      /* store saturated result in 1.31 format to destination buffer */
+      *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+      *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+#else
+void arm_cmplx_mult_real_q31(
+  const q31_t * pSrcCmplx,
+  const q31_t * pSrcReal,
+        q31_t * pCmplxDst,
+        uint32_t numSamples)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t in;                                      /* Temporary variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = numSamples >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    /* store saturated result in 1.31 format to destination buffer */
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = numSamples % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C[2 * i    ] = A[2 * i    ] * B[i]. */
+    /* C[2 * i + 1] = A[2 * i + 1] * B[i]. */
+
+    in = *pSrcReal++;
+#if defined (ARM_MATH_DSP)
+    /* store saturated result in 1.31 format to destination buffer */
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+    *pCmplxDst++ = (__SSAT((q31_t) (((q63_t) *pSrcCmplx++ * in) >> 32), 31) << 1);
+#else
+    /* store result in destination buffer. */
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+    *pCmplxDst++ = (q31_t) clip_q63_to_q31(((q63_t) *pSrcCmplx++ * in) >> 31);
+#endif
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of CmplxByRealMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
index edd3bf2b..9abd3281 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/ControllerFunctions.c
@@ -1,37 +1,46 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        ControllerFunctions.c
- * Description:  Combination of all controller function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_pid_init_f32.c"
-#include "arm_pid_init_q15.c"
-#include "arm_pid_init_q31.c"
-#include "arm_pid_reset_f32.c"
-#include "arm_pid_reset_q15.c"
-#include "arm_pid_reset_q31.c"
-#include "arm_sin_cos_f32.c"
-#include "arm_sin_cos_q31.c"
-
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        ControllerFunctions.c
+ * Description:  Combination of all controller function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_pid_init_f32.c"
+#include "arm_pid_init_q15.c"
+#include "arm_pid_init_q31.c"
+#include "arm_pid_reset_f32.c"
+#include "arm_pid_reset_q15.c"
+#include "arm_pid_reset_q31.c"
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+#include "arm_sin_cos_f32.c"
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+#include "arm_sin_cos_q31.c"
+#endif
+
+#endif
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
index 0e4d5d65..384994bd 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_f32.c
@@ -1,75 +1,75 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_pid_init_f32.c
- * Description:  Floating-point PID Control initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup PID
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point PID Control.
-  @param[in,out] S               points to an instance of the PID structure
-  @param[in]     resetStateFlag
-                   - value = 0: no change in state
-                   - value = 1: reset state
-  @return        none
-
-  @par           Details
-                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
-                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
-                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
-                   also sets the state variables to all zeros.
- */
-
-void arm_pid_init_f32(
-  arm_pid_instance_f32 * S,
-  int32_t resetStateFlag)
-{
-  /* Derived coefficient A0 */
-  S->A0 = S->Kp + S->Ki + S->Kd;
-
-  /* Derived coefficient A1 */
-  S->A1 = (-S->Kp) - ((float32_t) 2.0 * S->Kd);
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if (resetStateFlag)
-  {
-    /* Reset state to zero, The size will be always 3 samples */
-    memset(S->state, 0, 3U * sizeof(float32_t));
-  }
-
-}
-
-/**
-  @} end of PID group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_init_f32.c
+ * Description:  Floating-point PID Control initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point PID Control.
+  @param[in,out] S               points to an instance of the PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
+ */
+
+void arm_pid_init_f32(
+  arm_pid_instance_f32 * S,
+  int32_t resetStateFlag)
+{
+  /* Derived coefficient A0 */
+  S->A0 = S->Kp + S->Ki + S->Kd;
+
+  /* Derived coefficient A1 */
+  S->A1 = (-S->Kp) - ((float32_t) 2.0f * S->Kd);
+
+  /* Derived coefficient A2 */
+  S->A2 = S->Kd;
+
+  /* Check whether state needs reset or not */
+  if (resetStateFlag)
+  {
+    /* Reset state to zero, The size will be always 3 samples */
+    memset(S->state, 0, 3U * sizeof(float32_t));
+  }
+
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
index 3f82711b..e1f510b3 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q15.c
@@ -1,95 +1,95 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_pid_init_q15.c
- * Description:  Q15 PID Control initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup PID
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 PID Control.
-  @param[in,out] S               points to an instance of the Q15 PID structure
-  @param[in]     resetStateFlag
-                   - value = 0: no change in state
-                   - value = 1: reset state
-  @return        none
-
-  @par           Details
-                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
-                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
-                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
-                   also sets the state variables to all zeros.
- */
-
-void arm_pid_init_q15(
-  arm_pid_instance_q15 * S,
-  int32_t resetStateFlag)
-{
-
-#if defined (ARM_MATH_DSP)
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficients and pack into A1 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
-#else
-  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
-#endif
-
-#else
-
-  q31_t temp;                                    /* to store the sum */
-
-  /* Derived coefficient A0 */
-  temp = S->Kp + S->Ki + S->Kd;
-  S->A0 = (q15_t) __SSAT(temp, 16);
-
-  /* Derived coefficients and pack into A1 */
-  temp = -(S->Kd + S->Kd + S->Kp);
-  S->A1 = (q15_t) __SSAT(temp, 16);
-  S->A2 = S->Kd;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* Check whether state needs reset or not */
-  if (resetStateFlag)
-  {
-    /* Reset state to zero, The size will be always 3 samples */
-    memset(S->state, 0, 3U * sizeof(q15_t));
-  }
-
-}
-
-/**
-  @} end of PID group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_init_q15.c
+ * Description:  Q15 PID Control initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 PID Control.
+  @param[in,out] S               points to an instance of the Q15 PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
+ */
+
+void arm_pid_init_q15(
+  arm_pid_instance_q15 * S,
+  int32_t resetStateFlag)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  /* Derived coefficient A0 */
+  S->A0 = __QADD16(__QADD16(S->Kp, S->Ki), S->Kd);
+
+  /* Derived coefficients and pack into A1 */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+  S->A1 = __PKHBT(-__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), S->Kd, 16);
+#else
+  S->A1 = __PKHBT(S->Kd, -__QADD16(__QADD16(S->Kd, S->Kd), S->Kp), 16);
+#endif
+
+#else
+
+  q31_t temp;                                    /* to store the sum */
+
+  /* Derived coefficient A0 */
+  temp = S->Kp + S->Ki + S->Kd;
+  S->A0 = (q15_t) __SSAT(temp, 16);
+
+  /* Derived coefficients and pack into A1 */
+  temp = -(S->Kd + S->Kd + S->Kp);
+  S->A1 = (q15_t) __SSAT(temp, 16);
+  S->A2 = S->Kd;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* Check whether state needs reset or not */
+  if (resetStateFlag)
+  {
+    /* Reset state to zero, The size will be always 3 samples */
+    memset(S->state, 0, 3U * sizeof(q15_t));
+  }
+
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
index 680d4634..53df5ee5 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_init_q31.c
@@ -1,92 +1,92 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_pid_init_q31.c
- * Description:  Q31 PID Control initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup PID
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 PID Control.
-  @param[in,out] S               points to an instance of the Q31 PID structure
-  @param[in]     resetStateFlag
-                   - value = 0: no change in state
-                   - value = 1: reset state
-  @return        none
-
-  @par           Details
-                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
-                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
-                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
-                   also sets the state variables to all zeros.
- */
-
-void arm_pid_init_q31(
-  arm_pid_instance_q31 * S,
-  int32_t resetStateFlag)
-{
-
-#if defined (ARM_MATH_DSP)
-
-  /* Derived coefficient A0 */
-  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
-
-  /* Derived coefficient A1 */
-  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
-
-#else
-
-  q31_t temp;                                    /* to store the sum */
-
-  /* Derived coefficient A0 */
-  temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
-  S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
-
-  /* Derived coefficient A1 */
-  temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
-  S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* Derived coefficient A2 */
-  S->A2 = S->Kd;
-
-  /* Check whether state needs reset or not */
-  if (resetStateFlag)
-  {
-    /* Reset state to zero, The size will be always 3 samples */
-    memset(S->state, 0, 3U * sizeof(q31_t));
-  }
-
-}
-
-/**
-  @} end of PID group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_init_q31.c
+ * Description:  Q31 PID Control initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 PID Control.
+  @param[in,out] S               points to an instance of the Q31 PID structure
+  @param[in]     resetStateFlag
+                   - value = 0: no change in state
+                   - value = 1: reset state
+  @return        none
+
+  @par           Details
+                   The <code>resetStateFlag</code> specifies whether to set state to zero or not. \n
+                   The function computes the structure fields: <code>A0</code>, <code>A1</code> <code>A2</code>
+                   using the proportional gain( \c Kp), integral gain( \c Ki) and derivative gain( \c Kd)
+                   also sets the state variables to all zeros.
+ */
+
+void arm_pid_init_q31(
+  arm_pid_instance_q31 * S,
+  int32_t resetStateFlag)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  /* Derived coefficient A0 */
+  S->A0 = __QADD(__QADD(S->Kp, S->Ki), S->Kd);
+
+  /* Derived coefficient A1 */
+  S->A1 = -__QADD(__QADD(S->Kd, S->Kd), S->Kp);
+
+#else
+
+  q31_t temp;                                    /* to store the sum */
+
+  /* Derived coefficient A0 */
+  temp = clip_q63_to_q31((q63_t) S->Kp + S->Ki);
+  S->A0 = clip_q63_to_q31((q63_t) temp + S->Kd);
+
+  /* Derived coefficient A1 */
+  temp = clip_q63_to_q31((q63_t) S->Kd + S->Kd);
+  S->A1 = -clip_q63_to_q31((q63_t) temp + S->Kp);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* Derived coefficient A2 */
+  S->A2 = S->Kd;
+
+  /* Check whether state needs reset or not */
+  if (resetStateFlag)
+  {
+    /* Reset state to zero, The size will be always 3 samples */
+    memset(S->state, 0, 3U * sizeof(q31_t));
+  }
+
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
index ed1038e4..cb267adb 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_f32.c
@@ -1,54 +1,54 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_pid_reset_f32.c
- * Description:  Floating-point PID Control reset function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup PID
-  @{
- */
-
-/**
-  @brief         Reset function for the floating-point PID Control.
-  @param[in,out] S  points to an instance of the floating-point PID structure
-  @return        none
-
-  @par           Details
-                   The function resets the state buffer to zeros.
- */
-
-void arm_pid_reset_f32(
-  arm_pid_instance_f32 * S)
-{
-  /* Reset state to zero, The size will be always 3 samples */
-  memset(S->state, 0, 3U * sizeof(float32_t));
-}
-
-/**
-  @} end of PID group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_reset_f32.c
+ * Description:  Floating-point PID Control reset function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Reset function for the floating-point PID Control.
+  @param[in,out] S  points to an instance of the floating-point PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
+void arm_pid_reset_f32(
+  arm_pid_instance_f32 * S)
+{
+  /* Reset state to zero, The size will be always 3 samples */
+  memset(S->state, 0, 3U * sizeof(float32_t));
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
index f61391ef..aa4076ec 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q15.c
@@ -1,54 +1,54 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_pid_reset_q15.c
- * Description:  Q15 PID Control reset function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup PID
-  @{
- */
-
-/**
-  @brief         Reset function for the Q15 PID Control.
-  @param[in,out] S  points to an instance of the Q15 PID structure
-  @return        none
-
-  @par           Details
-                   The function resets the state buffer to zeros.
- */
-
-void arm_pid_reset_q15(
-  arm_pid_instance_q15 * S)
-{
-  /* Reset state to zero, The size will be always 3 samples */
-  memset(S->state, 0, 3U * sizeof(q15_t));
-}
-
-/**
-  @} end of PID group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_reset_q15.c
+ * Description:  Q15 PID Control reset function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Reset function for the Q15 PID Control.
+  @param[in,out] S  points to an instance of the Q15 PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
+void arm_pid_reset_q15(
+  arm_pid_instance_q15 * S)
+{
+  /* Reset state to zero, The size will be always 3 samples */
+  memset(S->state, 0, 3U * sizeof(q15_t));
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
index 2853ea9d..3e9c39fe 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_pid_reset_q31.c
@@ -1,54 +1,54 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_pid_reset_q31.c
- * Description:  Q31 PID Control reset function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup PID
-  @{
- */
-
-/**
-  @brief         Reset function for the Q31 PID Control.
-  @param[in,out] S  points to an instance of the Q31 PID structure
-  @return        none
-
-  @par           Details
-                   The function resets the state buffer to zeros.
- */
-
-void arm_pid_reset_q31(
-  arm_pid_instance_q31 * S)
-{
-  /* Reset state to zero, The size will be always 3 samples */
-  memset(S->state, 0, 3U * sizeof(q31_t));
-}
-
-/**
-  @} end of PID group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_pid_reset_q31.c
+ * Description:  Q31 PID Control reset function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+
+/**
+  @addtogroup PID
+  @{
+ */
+
+/**
+  @brief         Reset function for the Q31 PID Control.
+  @param[in,out] S  points to an instance of the Q31 PID structure
+  @return        none
+
+  @par           Details
+                   The function resets the state buffer to zeros.
+ */
+
+void arm_pid_reset_q31(
+  arm_pid_instance_q31 * S)
+{
+  /* Reset state to zero, The size will be always 3 samples */
+  memset(S->state, 0, 3U * sizeof(q31_t));
+}
+
+/**
+  @} end of PID group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
index 438e4d47..e6d9d90f 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_f32.c
@@ -1,146 +1,146 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sin_cos_f32.c
- * Description:  Sine and Cosine calculation for floating-point values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupController
- */
-
-/**
-  @defgroup SinCos Sine Cosine
-
-  Computes the trigonometric sine and cosine values using a combination of table lookup
-  and linear interpolation.
-  There are separate functions for Q31 and floating-point data types.
-  The input to the floating-point version is in degrees while the
-  fixed-point Q31 have a scaled input with the range
-  [-1 0.9999] mapping to [-180 +180] degrees.
-
-  The floating point function also allows values that are out of the usual range. When this happens, the function will
-  take extra time to adjust the input value to the range of [-180 180].
-
-  The result is accurate to 5 digits after the decimal point.
-
-  The implementation is based on table lookup using 360 values together with linear interpolation.
-  The steps used are:
-   -# Calculation of the nearest integer table index.
-   -# Compute the fractional portion (fract) of the input.
-   -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
-   -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
-   -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
-   -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
- */
-
-/**
-  @addtogroup SinCos
-  @{
- */
-
-/**
-  @brief         Floating-point sin_cos function.
-  @param[in]     theta    input value in degrees
-  @param[out]    pSinVal  points to processed sine output
-  @param[out]    pCosVal  points to processed cosine output
-  @return        none
- */
-
-void arm_sin_cos_f32(
-  float32_t theta,
-  float32_t * pSinVal,
-  float32_t * pCosVal)
-{
-  float32_t fract, in;                             /* Temporary input, output variables */
-  uint16_t indexS, indexC;                         /* Index variable */
-  float32_t f1, f2, d1, d2;                        /* Two nearest output values */
-  float32_t Dn, Df;
-  float32_t temp, findex;
-
-  /* input x is in degrees */
-  /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
-  in = theta * 0.00277777777778f;
-
-  if (in < 0.0f)
-  {
-    in = -in;
-  }
-
-  in = in - (int32_t)in;
-
-  /* Calculate the nearest index */
-  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
-  indexS = ((uint16_t)findex) & 0x1ff;
-  indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
-
-  /* Calculation of fractional value */
-  fract = findex - (float32_t) indexS;
-
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 =  sinTable_f32[indexC  ];
-  f2 =  sinTable_f32[indexC+1];
-  d1 = -sinTable_f32[indexS  ];
-  d2 = -sinTable_f32[indexS+1];
-
-  temp = (1.0f - fract) * f1 + fract * f2;
-
-  Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
-  Df = f2 - f1;          /* delta between the values of the functions */
-
-  temp = Dn * (d1 + d2) - 2 * Df;
-  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
-  temp = fract * temp + d1 * Dn;
-
-  /* Calculation of cosine value */
-  *pCosVal = fract * temp + f1;
-
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_f32[indexS  ];
-  f2 = sinTable_f32[indexS+1];
-  d1 = sinTable_f32[indexC  ];
-  d2 = sinTable_f32[indexC+1];
-
-  temp = (1.0f - fract) * f1 + fract * f2;
-
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn * (d1 + d2) - 2 * Df;
-  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
-  temp = fract * temp + d1 * Dn;
-
-  /* Calculation of sine value */
-  *pSinVal = fract * temp + f1;
-
-  if (theta < 0.0f)
-  {
-    *pSinVal = -*pSinVal;
-  }
-}
-
-/**
-  @} end of SinCos group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_cos_f32.c
+ * Description:  Sine and Cosine calculation for floating-point values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupController
+ */
+
+/**
+  @defgroup SinCos Sine Cosine
+
+  Computes the trigonometric sine and cosine values using a combination of table lookup
+  and linear interpolation.
+  There are separate functions for Q31 and floating-point data types.
+  The input to the floating-point version is in degrees while the
+  fixed-point Q31 have a scaled input with the range
+  [-1 0.9999] mapping to [-180 +180] degrees.
+
+  The floating point function also allows values that are out of the usual range. When this happens, the function will
+  take extra time to adjust the input value to the range of [-180 180].
+
+  The result is accurate to 5 digits after the decimal point.
+
+  The implementation is based on table lookup using 360 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index.
+   -# Compute the fractional portion (fract) of the input.
+   -# Fetch the value corresponding to \c index from sine table to \c y0 and also value from \c index+1 to \c y1.
+   -# Sine value is computed as <code> *psinVal = y0 + (fract * (y1 - y0))</code>.
+   -# Fetch the value corresponding to \c index from cosine table to \c y0 and also value from \c index+1 to \c y1.
+   -# Cosine value is computed as <code> *pcosVal = y0 + (fract * (y1 - y0))</code>.
+ */
+
+/**
+  @addtogroup SinCos
+  @{
+ */
+
+/**
+  @brief         Floating-point sin_cos function.
+  @param[in]     theta    input value in degrees
+  @param[out]    pSinVal  points to processed sine output
+  @param[out]    pCosVal  points to processed cosine output
+  @return        none
+ */
+
+void arm_sin_cos_f32(
+  float32_t theta,
+  float32_t * pSinVal,
+  float32_t * pCosVal)
+{
+  float32_t fract, in;                             /* Temporary input, output variables */
+  uint16_t indexS, indexC;                         /* Index variable */
+  float32_t f1, f2, d1, d2;                        /* Two nearest output values */
+  float32_t Dn, Df;
+  float32_t temp, findex;
+
+  /* input x is in degrees */
+  /* Scale input, divide input by 360, for cosine add 0.25 (pi/2) to read sine table */
+  in = theta * 0.00277777777778f;
+
+  if (in < 0.0f)
+  {
+    in = -in;
+  }
+
+  in = in - (int32_t)in;
+
+  /* Calculate the nearest index */
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  indexS = ((uint16_t)findex) & 0x1ff;
+  indexC = (indexS + (FAST_MATH_TABLE_SIZE / 4)) & 0x1ff;
+
+  /* Calculation of fractional value */
+  fract = findex - (float32_t) indexS;
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 =  sinTable_f32[indexC  ];
+  f2 =  sinTable_f32[indexC+1];
+  d1 = -sinTable_f32[indexS  ];
+  d2 = -sinTable_f32[indexS+1];
+
+  temp = (1.0f - fract) * f1 + fract * f2;
+
+  Dn = 0.0122718463030f; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+  Df = f2 - f1;          /* delta between the values of the functions */
+
+  temp = Dn * (d1 + d2) - 2 * Df;
+  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+  temp = fract * temp + d1 * Dn;
+
+  /* Calculation of cosine value */
+  *pCosVal = fract * temp + f1;
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 = sinTable_f32[indexS  ];
+  f2 = sinTable_f32[indexS+1];
+  d1 = sinTable_f32[indexC  ];
+  d2 = sinTable_f32[indexC+1];
+
+  temp = (1.0f - fract) * f1 + fract * f2;
+
+  Df = f2 - f1; // delta between the values of the functions
+  temp = Dn * (d1 + d2) - 2 * Df;
+  temp = fract * temp + (3 * Df - (d2 + 2 * d1) * Dn);
+  temp = fract * temp + d1 * Dn;
+
+  /* Calculation of sine value */
+  *pSinVal = fract * temp + f1;
+
+  if (theta < 0.0f)
+  {
+    *pSinVal = -*pSinVal;
+  }
+}
+
+/**
+  @} end of SinCos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
index dcc45aa5..990c891d 100644
--- a/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
+++ b/Libraries/CMSIS/DSP/Source/ControllerFunctions/arm_sin_cos_q31.c
@@ -1,110 +1,110 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sin_cos_q31.c
- * Description:  Cosine & Sine calculation for Q31 values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupController
- */
-
-/**
-  @addtogroup SinCos
-  @{
- */
-
-/**
-  @brief         Q31 sin_cos function.
-  @param[in]     theta    scaled input value in degrees
-  @param[out]    pSinVal  points to processed sine output
-  @param[out]    pCosVal  points to processed cosine output
-  @return        none
-
-  The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
- */
-
-void arm_sin_cos_q31(
-  q31_t theta,
-  q31_t * pSinVal,
-  q31_t * pCosVal)
-{
-  q31_t fract;                                     /* Temporary input, output variables */
-  uint16_t indexS, indexC;                         /* Index variable */
-  q31_t f1, f2, d1, d2;                            /* Two nearest output values */
-  q31_t Dn, Df;
-  q63_t temp;
-
-  /* Calculate the nearest index */
-  indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT;
-  indexC = (indexS + 128) & 0x1ff;
-
-  /* Calculation of fractional value */
-  fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
-
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 =  sinTable_q31[indexC  ];
-  f2 =  sinTable_q31[indexC+1];
-  d1 = -sinTable_q31[indexS  ];
-  d2 = -sinTable_q31[indexS+1];
-
-  Dn = 0x1921FB5; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
-  Df = f2 - f1;   /* delta between the values of the functions */
-
-  temp = Dn * ((q63_t)d1 + d2);
-  temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract * (temp >> 31);
-  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
-  temp = (q63_t)fract * (temp >> 31);
-  temp = temp + (q63_t)d1 * Dn;
-  temp = (q63_t)fract * (temp >> 31);
-
-  /* Calculation of cosine value */
-  *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
-
-  /* Read two nearest values of input value from the cos & sin tables */
-  f1 = sinTable_q31[indexS ];
-  f2 = sinTable_q31[indexS+1];
-  d1 = sinTable_q31[indexC ];
-  d2 = sinTable_q31[indexC+1];
-
-  Df = f2 - f1; // delta between the values of the functions
-  temp = Dn * ((q63_t)d1 + d2);
-  temp = temp - ((q63_t)Df << 32);
-  temp = (q63_t)fract * (temp >> 31);
-  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
-  temp = (q63_t)fract * (temp >> 31);
-  temp = temp + (q63_t)d1 * Dn;
-  temp = (q63_t)fract * (temp >> 31);
-
-  /* Calculation of sine value */
-  *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
-}
-
-/**
-  @} end of SinCos group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_cos_q31.c
+ * Description:  Cosine & Sine calculation for Q31 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/controller_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupController
+ */
+
+/**
+  @addtogroup SinCos
+  @{
+ */
+
+/**
+  @brief         Q31 sin_cos function.
+  @param[in]     theta    scaled input value in degrees
+  @param[out]    pSinVal  points to processed sine output
+  @param[out]    pCosVal  points to processed cosine output
+  @return        none
+
+  The Q31 input value is in the range [-1 0.999999] and is mapped to a degree value in the range [-180 179].
+ */
+
+void arm_sin_cos_q31(
+  q31_t theta,
+  q31_t * pSinVal,
+  q31_t * pCosVal)
+{
+  q31_t fract;                                     /* Temporary input, output variables */
+  uint16_t indexS, indexC;                         /* Index variable */
+  q31_t f1, f2, d1, d2;                            /* Two nearest output values */
+  q31_t Dn, Df;
+  q63_t temp;
+
+  /* Calculate the nearest index */
+  indexS = (uint32_t)theta >> CONTROLLER_Q31_SHIFT;
+  indexC = (indexS + 128) & 0x1ff;
+
+  /* Calculation of fractional value */
+  fract = (theta - (indexS << CONTROLLER_Q31_SHIFT)) << 8;
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 =  sinTable_q31[indexC  ];
+  f2 =  sinTable_q31[indexC+1];
+  d1 = -sinTable_q31[indexS  ];
+  d2 = -sinTable_q31[indexS+1];
+
+  Dn = 0x1921FB5; /* delta between the two points (fixed), in this case 2*pi/FAST_MATH_TABLE_SIZE */
+  Df = f2 - f1;   /* delta between the values of the functions */
+
+  temp = Dn * ((q63_t)d1 + d2);
+  temp = temp - ((q63_t)Df << 32);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + (q63_t)d1 * Dn;
+  temp = (q63_t)fract * (temp >> 31);
+
+  /* Calculation of cosine value */
+  *pCosVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
+
+  /* Read two nearest values of input value from the cos & sin tables */
+  f1 = sinTable_q31[indexS ];
+  f2 = sinTable_q31[indexS+1];
+  d1 = sinTable_q31[indexC ];
+  d2 = sinTable_q31[indexC+1];
+
+  Df = f2 - f1; // delta between the values of the functions
+  temp = Dn * ((q63_t)d1 + d2);
+  temp = temp - ((q63_t)Df << 32);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + ((3 * (q63_t)Df << 31) - (d2 + ((q63_t)d1 << 1)) * Dn);
+  temp = (q63_t)fract * (temp >> 31);
+  temp = temp + (q63_t)d1 * Dn;
+  temp = (q63_t)fract * (temp >> 31);
+
+  /* Calculation of sine value */
+  *pSinVal = clip_q63_to_q31((temp >> 31) + (q63_t)f1);
+}
+
+/**
+  @} end of SinCos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c
new file mode 100644
index 00000000..0abcbc5f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctions.c
@@ -0,0 +1,51 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BayesFunctions.c
+ * Description:  Combination of all distance function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_boolean_distance.c"
+#include "arm_braycurtis_distance_f32.c"
+#include "arm_canberra_distance_f32.c"
+#include "arm_chebyshev_distance_f32.c"
+#include "arm_chebyshev_distance_f64.c"
+#include "arm_cityblock_distance_f32.c"
+#include "arm_cityblock_distance_f64.c"
+#include "arm_correlation_distance_f32.c"
+#include "arm_cosine_distance_f32.c"
+#include "arm_cosine_distance_f64.c"
+#include "arm_dice_distance.c"
+#include "arm_euclidean_distance_f32.c"
+#include "arm_euclidean_distance_f64.c"
+#include "arm_hamming_distance.c"
+#include "arm_jaccard_distance.c"
+#include "arm_jensenshannon_distance_f32.c"
+#include "arm_kulsinski_distance.c"
+#include "arm_minkowski_distance_f32.c"
+#include "arm_rogerstanimoto_distance.c"
+#include "arm_russellrao_distance.c"
+#include "arm_sokalmichener_distance.c"
+#include "arm_sokalsneath_distance.c"
+#include "arm_yule_distance.c"
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c
new file mode 100755
index 00000000..a0be2d44
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/DistanceFunctionsF16.c
@@ -0,0 +1,36 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        DistanceFunctions.c
+ * Description:  Combination of all distance function f16 source files.
+ *
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_braycurtis_distance_f16.c"
+#include "arm_canberra_distance_f16.c"
+#include "arm_chebyshev_distance_f16.c"
+#include "arm_cityblock_distance_f16.c"
+#include "arm_correlation_distance_f16.c"
+#include "arm_cosine_distance_f16.c"
+#include "arm_euclidean_distance_f16.c"
+#include "arm_jensenshannon_distance_f16.c"
+#include "arm_minkowski_distance_f16.c"
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance.c
new file mode 100755
index 00000000..57873b1e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance.c
@@ -0,0 +1,80 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_linear_init_f32.c
+ * Description:  SVM Linear Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+#endif
+
+
+#define TT
+#define TF 
+#define FT
+#define EXT _TT_TF_FT
+#include "arm_boolean_distance_template.h"
+
+#undef TT
+#undef FF
+#undef TF
+#undef FT 
+#undef EXT
+#define TF 
+#define FT
+#define EXT _TF_FT
+#include "arm_boolean_distance_template.h"
+
+#undef TT
+#undef FF
+#undef TF
+#undef FT 
+#undef EXT
+#define TT
+#define FF
+#define TF 
+#define FT
+#define EXT _TT_FF_TF_FT
+#include "arm_boolean_distance_template.h"
+
+#undef TT
+#undef FF
+#undef TF
+#undef FT 
+#undef EXT
+#define TT
+#define EXT _TT
+#include "arm_boolean_distance_template.h"
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h
new file mode 100755
index 00000000..eb2e2af9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_boolean_distance_template.h
@@ -0,0 +1,551 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_boolean_distance.c
+ * Description:  Templates for boolean distances
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+
+/**
+ * @defgroup DISTANCEF Distance Functions
+ *
+ * Computes Distances between vectors. 
+ *
+ * Distance functions are useful in a lot of algorithms.
+ *
+ */
+
+
+/**
+ * @addtogroup DISTANCEF
+ * @{
+ */
+
+
+
+
+#define _FUNC(A,B) A##B 
+
+#define FUNC(EXT) _FUNC(arm_boolean_distance, EXT)
+
+/**
+ * @brief        Elements of boolean distances
+ *
+ * Different values which are used to compute boolean distances
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return None
+ *
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_common_tables.h"
+
+void FUNC(EXT)(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+#ifdef TT
+       , uint32_t *cTT
+#endif
+#ifdef FF
+       , uint32_t *cFF
+#endif
+#ifdef TF
+       , uint32_t *cTF
+#endif
+#ifdef FT
+       , uint32_t *cFT
+#endif
+       )
+{
+
+#ifdef TT
+    uint32_t _ctt=0;
+#endif
+#ifdef FF
+    uint32_t _cff=0;
+#endif
+#ifdef TF
+    uint32_t _ctf=0;
+#endif
+#ifdef FT
+    uint32_t _cft=0;
+#endif
+    uint32_t        a, b, ba, bb;
+    int shift;
+    const uint8_t  *pA8 = (const uint8_t *) pA;
+    const uint8_t  *pB8 = (const uint8_t *) pB;
+
+    /* handle vector blocks */
+    uint32_t         blkCnt = numberOfBools / 128;
+
+
+
+    while (blkCnt > 0U) {
+        uint8x16_t      vecA = vld1q((const uint8_t *) pA8);
+        uint8x16_t      vecB = vld1q((const uint8_t *) pB8);
+
+#ifdef TT
+        uint8x16_t      vecTT = vecA & vecB;
+        vecTT = vldrbq_gather_offset_u8(hwLUT, vecTT);
+        _ctt += vaddvq(vecTT);
+#endif
+#ifdef FF
+        uint8x16_t      vecFF = vmvnq(vecA) & vmvnq(vecB);
+        vecFF = vldrbq_gather_offset_u8(hwLUT, vecFF);
+        _cff += vaddvq(vecFF);
+#endif
+#ifdef TF
+        uint8x16_t      vecTF = vecA & vmvnq(vecB);
+        vecTF = vldrbq_gather_offset_u8(hwLUT, vecTF);
+        _ctf += vaddvq(vecTF);
+#endif
+#ifdef FT
+        uint8x16_t      vecFT = vmvnq(vecA) & vecB;
+        vecFT = vldrbq_gather_offset_u8(hwLUT, vecFT);
+        _cft += vaddvq(vecFT);
+#endif
+
+        pA8 += 16;
+        pB8 += 16;
+        blkCnt--;
+
+    }
+
+    pA = (const uint32_t *)pA8;
+    pB = (const uint32_t *)pB8;
+
+    blkCnt = numberOfBools & 0x7F;
+    while(blkCnt >= 32)
+    {
+       a = *pA++;
+       b = *pB++;
+       shift = 0;
+       while(shift < 32)
+       {
+          ba = a & 1;
+          bb = b & 1;
+          a = a >> 1;
+          b = b >> 1;
+
+#ifdef TT
+          _ctt += (ba && bb);
+#endif
+#ifdef FF
+          _cff += ((1 ^ ba) && (1 ^ bb));
+#endif
+#ifdef TF
+          _ctf += (ba && (1 ^ bb));
+#endif
+#ifdef FT
+          _cft += ((1 ^ ba) && bb);
+#endif
+          shift ++;
+       }
+
+       blkCnt -= 32;
+    }
+
+    a = *pA++;
+    b = *pB++;
+
+    a = a >> (32 - blkCnt);
+    b = b >> (32 - blkCnt);
+
+    while(blkCnt > 0)
+    {
+          ba = a & 1;
+          bb = b & 1;
+          a = a >> 1;
+
+          b = b >> 1;
+#ifdef TT
+          _ctt += (ba && bb);
+#endif
+#ifdef FF
+          _cff += ((1 ^ ba) && (1 ^ bb));
+#endif
+#ifdef TF
+          _ctf += (ba && (1 ^ bb));
+#endif
+#ifdef FT
+          _cft += ((1 ^ ba) && bb);
+#endif
+          blkCnt --;
+    }
+
+#ifdef TT
+    *cTT = _ctt;
+#endif
+#ifdef FF
+    *cFF = _cff;
+#endif
+#ifdef TF
+    *cTF = _ctf;
+#endif
+#ifdef FT
+    *cFT = _cft;
+#endif
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+
+void FUNC(EXT)(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+#ifdef TT
+       , uint32_t *cTT
+#endif
+#ifdef FF
+       , uint32_t *cFF
+#endif
+#ifdef TF
+       , uint32_t *cTF
+#endif
+#ifdef FT
+       , uint32_t *cFT
+#endif
+       )
+{
+#ifdef TT
+    uint32_t _ctt=0;
+#endif
+#ifdef FF
+    uint32_t _cff=0;
+#endif
+#ifdef TF
+    uint32_t _ctf=0;
+#endif
+#ifdef FT
+    uint32_t _cft=0;
+#endif
+    uint32_t nbBoolBlock;
+    uint32_t a,b,ba,bb;
+    int shift;
+    uint32x4_t aV, bV;
+#ifdef TT
+    uint32x4_t cttV;
+#endif
+#ifdef FF
+    uint32x4_t cffV;
+#endif
+#ifdef TF
+    uint32x4_t ctfV;
+#endif
+#ifdef FT
+    uint32x4_t cftV;
+#endif
+    uint8x16_t tmp;
+    uint16x8_t tmp2;
+    uint32x4_t tmp3;
+    uint64x2_t tmp4;
+#ifdef TT
+    uint64x2_t tmp4tt;
+#endif
+#ifdef FF
+    uint64x2_t tmp4ff;
+#endif
+#ifdef TF
+    uint64x2_t tmp4tf;
+#endif
+#ifdef FT
+    uint64x2_t tmp4ft;
+#endif
+
+#ifdef TT
+    tmp4tt = vdupq_n_u64(0);
+#endif
+#ifdef FF
+    tmp4ff = vdupq_n_u64(0);
+#endif
+#ifdef TF
+    tmp4tf = vdupq_n_u64(0);
+#endif
+#ifdef FT
+    tmp4ft = vdupq_n_u64(0);
+#endif
+
+    nbBoolBlock = numberOfBools >> 7;
+    while(nbBoolBlock > 0)
+    {
+       aV = vld1q_u32(pA);
+       bV = vld1q_u32(pB);
+       pA += 4;
+       pB += 4;
+
+#ifdef TT
+       cttV = vandq_u32(aV,bV);
+#endif
+#ifdef FF
+       cffV = vandq_u32(vmvnq_u32(aV),vmvnq_u32(bV));
+#endif
+#ifdef TF
+       ctfV = vandq_u32(aV,vmvnq_u32(bV));
+#endif
+#ifdef FT
+       cftV = vandq_u32(vmvnq_u32(aV),bV);
+#endif
+
+#ifdef TT
+       tmp = vcntq_u8(vreinterpretq_u8_u32(cttV));
+       tmp2 = vpaddlq_u8(tmp);
+       tmp3 = vpaddlq_u16(tmp2);
+       tmp4 = vpaddlq_u32(tmp3);
+       tmp4tt = vaddq_u64(tmp4tt, tmp4);
+#endif
+
+#ifdef FF
+       tmp = vcntq_u8(vreinterpretq_u8_u32(cffV));
+       tmp2 = vpaddlq_u8(tmp);
+       tmp3 = vpaddlq_u16(tmp2);
+       tmp4 = vpaddlq_u32(tmp3);
+       tmp4ff = vaddq_u64(tmp4ff, tmp4);
+#endif
+
+#ifdef TF
+       tmp = vcntq_u8(vreinterpretq_u8_u32(ctfV));
+       tmp2 = vpaddlq_u8(tmp);
+       tmp3 = vpaddlq_u16(tmp2);
+       tmp4 = vpaddlq_u32(tmp3);
+       tmp4tf = vaddq_u64(tmp4tf, tmp4);
+#endif 
+
+#ifdef FT
+       tmp = vcntq_u8(vreinterpretq_u8_u32(cftV));
+       tmp2 = vpaddlq_u8(tmp);
+       tmp3 = vpaddlq_u16(tmp2);
+       tmp4 = vpaddlq_u32(tmp3);
+       tmp4ft = vaddq_u64(tmp4ft, tmp4);
+#endif
+
+
+       nbBoolBlock --;
+    }
+
+#ifdef TT
+    _ctt += vgetq_lane_u64(tmp4tt, 0) + vgetq_lane_u64(tmp4tt, 1);
+#endif
+#ifdef FF
+    _cff +=vgetq_lane_u64(tmp4ff, 0) + vgetq_lane_u64(tmp4ff, 1);
+#endif
+#ifdef TF
+    _ctf += vgetq_lane_u64(tmp4tf, 0) + vgetq_lane_u64(tmp4tf, 1);
+#endif
+#ifdef FT
+    _cft += vgetq_lane_u64(tmp4ft, 0) + vgetq_lane_u64(tmp4ft, 1);
+#endif
+
+    nbBoolBlock = numberOfBools & 0x7F;
+    while(nbBoolBlock >= 32)
+    {
+       a = *pA++;
+       b = *pB++;
+       shift = 0;
+       while(shift < 32)
+       {
+          ba = a & 1;
+          bb = b & 1;
+          a = a >> 1;
+          b = b >> 1;
+
+#ifdef TT
+          _ctt += (ba && bb);
+#endif
+#ifdef FF
+          _cff += ((1 ^ ba) && (1 ^ bb));
+#endif
+#ifdef TF
+          _ctf += (ba && (1 ^ bb));
+#endif
+#ifdef FT
+          _cft += ((1 ^ ba) && bb);
+#endif
+          shift ++;
+       }
+
+       nbBoolBlock -= 32;
+    }
+
+    a = *pA++;
+    b = *pB++;
+
+    a = a >> (32 - nbBoolBlock);
+    b = b >> (32 - nbBoolBlock);
+
+    while(nbBoolBlock > 0)
+    {
+          ba = a & 1;
+          bb = b & 1;
+          a = a >> 1;
+
+          b = b >> 1;
+#ifdef TT
+          _ctt += (ba && bb);
+#endif
+#ifdef FF
+          _cff += ((1 ^ ba) && (1 ^ bb));
+#endif
+#ifdef TF
+          _ctf += (ba && (1 ^ bb));
+#endif
+#ifdef FT
+          _cft += ((1 ^ ba) && bb);
+#endif
+          nbBoolBlock --;
+    }
+
+#ifdef TT
+    *cTT = _ctt;
+#endif
+#ifdef FF
+    *cFF = _cff;
+#endif
+#ifdef TF
+    *cTF = _ctf;
+#endif
+#ifdef FT
+    *cFT = _cft;
+#endif
+}
+
+#else
+
+void FUNC(EXT)(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+#ifdef TT
+       , uint32_t *cTT
+#endif
+#ifdef FF
+       , uint32_t *cFF
+#endif
+#ifdef TF
+       , uint32_t *cTF
+#endif
+#ifdef FT
+       , uint32_t *cFT
+#endif
+       )
+{
+  
+#ifdef TT
+    uint32_t _ctt=0;
+#endif
+#ifdef FF
+    uint32_t _cff=0;
+#endif
+#ifdef TF
+    uint32_t _ctf=0;
+#endif
+#ifdef FT
+    uint32_t _cft=0;
+#endif
+    uint32_t a,b,ba,bb;
+    int shift;
+
+    while(numberOfBools >= 32)
+    {
+       a = *pA++;
+       b = *pB++;
+       shift = 0;
+       while(shift < 32)
+       {
+          ba = a & 1;
+          bb = b & 1;
+          a = a >> 1;
+          b = b >> 1;
+#ifdef TT
+          _ctt += (ba && bb);
+#endif
+#ifdef FF
+          _cff += ((1 ^ ba) && (1 ^ bb));
+#endif
+#ifdef TF
+          _ctf += (ba && (1 ^ bb));
+#endif
+#ifdef FT
+          _cft += ((1 ^ ba) && bb);
+#endif
+          shift ++;
+       }
+
+       numberOfBools -= 32;
+    }
+
+    a = *pA++;
+    b = *pB++;
+
+    a = a >> (32 - numberOfBools);
+    b = b >> (32 - numberOfBools);
+
+    while(numberOfBools > 0)
+    {
+          ba = a & 1;
+          bb = b & 1;
+          a = a >> 1;
+          b = b >> 1;
+
+#ifdef TT
+          _ctt += (ba && bb);
+#endif
+#ifdef FF
+          _cff += ((1 ^ ba) && (1 ^ bb));
+#endif
+#ifdef TF
+          _ctf += (ba && (1 ^ bb));
+#endif
+#ifdef FT
+          _cft += ((1 ^ ba) && bb);
+#endif
+          numberOfBools --;
+    }
+
+#ifdef TT
+    *cTT = _ctt;
+#endif
+#ifdef FF
+    *cFF = _cff;
+#endif
+#ifdef TF 
+    *cTF = _ctf;
+#endif
+#ifdef FT
+    *cFT = _cft;
+#endif
+}
+#endif
+#endif /* defined(ARM_MATH_MVEI) */
+
+
+/**
+ * @} end of DISTANCEF group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f16.c
new file mode 100755
index 00000000..be5537ef
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f16.c
@@ -0,0 +1,158 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_braycurtis_distance_f16.c
+ * Description:  Bray-Curtis distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+ * @ingroup groupDistance
+ */
+
+/**
+ * @defgroup FloatDist Float Distances
+ *
+ * Distances between two vectors of float values.
+ */
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup braycurtis Bray-Curtis distance
+
+  Bray-Curtis distance between two vectors
+ */
+
+/**
+  @addtogroup braycurtis
+  @{
+ */
+
+
+/**
+ * @brief        Bray-Curtis distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+float16_t arm_braycurtis_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    _Float16        accumDiff = 0.0f, accumSum = 0.0f;
+    uint32_t        blkCnt;
+    f16x8_t         a, b, c, accumDiffV, accumSumV;
+
+
+    accumDiffV = vdupq_n_f16(0.0f);
+    accumSumV = vdupq_n_f16(0.0f);
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        c = vabdq(a, b);
+        accumDiffV = vaddq(accumDiffV, c);
+
+        c = vaddq_f16(a, b);
+        c = vabsq_f16(c);
+        accumSumV = vaddq(accumSumV, c);
+
+        pA += 8;
+        pB += 8;
+        blkCnt--;
+    }
+
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        a = vldrhq_z_f16(pA, p0);
+        b = vldrhq_z_f16(pB, p0);
+
+        c = vabdq(a, b);
+        accumDiffV = vaddq_m(accumDiffV, accumDiffV, c, p0);
+
+        c = vaddq_f16(a, b);
+        c = vabsq_f16(c);
+        accumSumV = vaddq_m(accumSumV, accumSumV, c, p0);
+    }
+
+    accumDiff = vecAddAcrossF16Mve(accumDiffV);
+    accumSum = vecAddAcrossF16Mve(accumSumV);
+
+    /*
+       It is assumed that accumSum is not zero. Since it is the sum of several absolute
+       values it would imply that all of them are zero. It is very unlikely for long vectors.
+     */
+    return (accumDiff / accumSum);
+}
+#else
+
+float16_t arm_braycurtis_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+   _Float16 accumDiff=0.0f16, accumSum=0.0f16, tmpA, tmpB;
+
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      accumDiff += (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB));
+      accumSum += (_Float16)fabsf((float32_t)((_Float16)tmpA + (_Float16)tmpB));
+      blockSize --;
+   }
+   /*
+
+   It is assumed that accumSum is not zero. Since it is the sum of several absolute
+   values it would imply that all of them are zero. It is very unlikely for long vectors.
+
+   */
+   return(accumDiff / accumSum);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of braycurtis group
+ */
+
+
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c
new file mode 100755
index 00000000..ae13c358
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_braycurtis_distance_f32.c
@@ -0,0 +1,187 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_braycurtis_distance_f32.c
+ * Description:  Bray-Curtis distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+/**
+  @addtogroup braycurtis
+  @{
+ */
+
+
+/**
+ * @brief        Bray-Curtis distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    float32_t       accumDiff = 0.0f, accumSum = 0.0f;
+    uint32_t        blkCnt;
+    f32x4_t         a, b, c, accumDiffV, accumSumV;
+
+
+    accumDiffV = vdupq_n_f32(0.0f);
+    accumSumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        c = vabdq(a, b);
+        accumDiffV = vaddq(accumDiffV, c);
+
+        c = vaddq_f32(a, b);
+        c = vabsq_f32(c);
+        accumSumV = vaddq(accumSumV, c);
+
+        pA += 4;
+        pB += 4;
+        blkCnt--;
+    }
+
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        a = vldrwq_z_f32(pA, p0);
+        b = vldrwq_z_f32(pB, p0);
+
+        c = vabdq(a, b);
+        accumDiffV = vaddq_m(accumDiffV, accumDiffV, c, p0);
+
+        c = vaddq_f32(a, b);
+        c = vabsq_f32(c);
+        accumSumV = vaddq_m(accumSumV, accumSumV, c, p0);
+    }
+
+    accumDiff = vecAddAcrossF32Mve(accumDiffV);
+    accumSum = vecAddAcrossF32Mve(accumSumV);
+
+    /*
+       It is assumed that accumSum is not zero. Since it is the sum of several absolute
+       values it would imply that all of them are zero. It is very unlikely for long vectors.
+     */
+    return (accumDiff / accumSum);
+}
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accumDiff=0.0f, accumSum=0.0f;
+   uint32_t blkCnt;
+   float32x4_t a,b,c,accumDiffV, accumSumV;
+   float32x2_t accumV2;
+
+   accumDiffV = vdupq_n_f32(0.0f);
+   accumSumV = vdupq_n_f32(0.0f);
+
+   blkCnt = blockSize >> 2;
+   while(blkCnt > 0)
+   {
+        a = vld1q_f32(pA);
+        b = vld1q_f32(pB);
+
+        c = vabdq_f32(a,b);
+        accumDiffV = vaddq_f32(accumDiffV,c);
+
+        c = vaddq_f32(a,b);
+        c = vabsq_f32(c);
+        accumSumV = vaddq_f32(accumSumV,c);
+
+        pA += 4;
+        pB += 4;
+        blkCnt --;
+   }
+   accumV2 = vpadd_f32(vget_low_f32(accumDiffV),vget_high_f32(accumDiffV));
+   accumDiff = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+
+   accumV2 = vpadd_f32(vget_low_f32(accumSumV),vget_high_f32(accumSumV));
+   accumSum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+
+   blkCnt = blockSize & 3;
+   while(blkCnt > 0)
+   {
+      accumDiff += fabsf(*pA - *pB);
+      accumSum += fabsf(*pA++ + *pB++);
+      blkCnt --;
+   }
+   /*
+
+   It is assumed that accumSum is not zero. Since it is the sum of several absolute
+   values it would imply that all of them are zero. It is very unlikely for long vectors.
+
+   */
+   return(accumDiff / accumSum);
+}
+
+#else
+float32_t arm_braycurtis_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accumDiff=0.0f, accumSum=0.0f, tmpA, tmpB;
+
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      accumDiff += fabsf(tmpA - tmpB);
+      accumSum += fabsf(tmpA + tmpB);
+      blockSize --;
+   }
+   /*
+
+   It is assumed that accumSum is not zero. Since it is the sum of several absolute
+   values it would imply that all of them are zero. It is very unlikely for long vectors.
+
+   */
+   return(accumDiff / accumSum);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of braycurtis group
+ */
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f16.c
new file mode 100755
index 00000000..bcefc919
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f16.c
@@ -0,0 +1,171 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_canberra_distance_f16.c
+ * Description:  Canberra distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup Canberra Canberra distance
+
+  Canberra distance
+ */
+
+
+/**
+  @addtogroup Canberra
+  @{
+ */
+
+
+/**
+ * @brief        Canberra distance between two vectors
+ *
+ * This function may divide by zero when samples pA[i] and pB[i] are both zero.
+ * The result of the computation will be correct. So the division per zero may be
+ * ignored.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+float16_t arm_canberra_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    _Float16       accum = 0.0f16;
+    uint32_t         blkCnt;
+    f16x8_t         a, b, c, accumV;
+
+    accumV = vdupq_n_f16(0.0f);
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        c = vabdq(a, b);
+
+        a = vabsq(a);
+        b = vabsq(b);
+        a = vaddq(a, b);
+
+        /* 
+         * May divide by zero when a and b have both the same lane at zero.
+         */
+        a = vrecip_hiprec_f16(a);
+
+        /*
+         * Force result of a division by 0 to 0. It the behavior of the
+         * sklearn canberra function.
+         */
+        a = vdupq_m_n_f16(a, 0.0f, vcmpeqq(a, 0.0f));
+        c = vmulq(c, a);
+        accumV = vaddq(accumV, c);
+
+        pA += 8;
+        pB += 8;
+        blkCnt--;
+    }
+
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        a = vldrhq_z_f16(pA, p0);
+        b = vldrhq_z_f16(pB, p0);
+
+        c = vabdq(a, b);
+
+        a = vabsq(a);
+        b = vabsq(b);
+        a = vaddq(a, b);
+
+        /* 
+         * May divide by zero when a and b have both the same lane at zero.
+         */
+        a = vrecip_hiprec_f16(a);
+
+        /*
+         * Force result of a division by 0 to 0. It the behavior of the
+         * sklearn canberra function.
+         */
+        a = vdupq_m_n_f16(a, 0.0f, vcmpeqq(a, 0.0f));
+        c = vmulq(c, a);
+        accumV = vaddq_m(accumV, accumV, c, p0);
+    }
+
+    accum = vecAddAcrossF16Mve(accumV);
+
+    return (accum);
+}
+
+
+#else
+float16_t arm_canberra_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+   _Float16 accum=0.0f, tmpA, tmpB,diff,sum;
+
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+
+      diff = fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB));
+      sum = (_Float16)fabsf((float32_t)tmpA) + (_Float16)fabsf((float32_t)tmpB);
+      if (((_Float16)tmpA != 0.0f16) || ((_Float16)tmpB != 0.0f16))
+      {
+         accum += ((_Float16)diff / (_Float16)sum);
+      }
+      blockSize --;
+   }
+   return(accum);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Canberra group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c
new file mode 100755
index 00000000..c786c045
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_canberra_distance_f32.c
@@ -0,0 +1,222 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_canberra_distance_f32.c
+ * Description:  Canberra distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @addtogroup Canberra
+  @{
+ */
+
+
+/**
+ * @brief        Canberra distance between two vectors
+ *
+ * This function may divide by zero when samples pA[i] and pB[i] are both zero.
+ * The result of the computation will be correct. So the division per zero may be
+ * ignored.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    float32_t       accum = 0.0f;
+    uint32_t         blkCnt;
+    f32x4_t         a, b, c, accumV;
+
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        c = vabdq(a, b);
+
+        a = vabsq(a);
+        b = vabsq(b);
+        a = vaddq(a, b);
+
+        /* 
+         * May divide by zero when a and b have both the same lane at zero.
+         */
+        a = vrecip_medprec_f32(a);
+
+        /*
+         * Force result of a division by 0 to 0. It the behavior of the
+         * sklearn canberra function.
+         */
+        a = vdupq_m_n_f32(a, 0.0f, vcmpeqq(a, 0.0f));
+        c = vmulq(c, a);
+        accumV = vaddq(accumV, c);
+
+        pA += 4;
+        pB += 4;
+        blkCnt--;
+    }
+
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        a = vldrwq_z_f32(pA, p0);
+        b = vldrwq_z_f32(pB, p0);
+
+        c = vabdq(a, b);
+
+        a = vabsq(a);
+        b = vabsq(b);
+        a = vaddq(a, b);
+
+        /* 
+         * May divide by zero when a and b have both the same lane at zero.
+         */
+        a = vrecip_medprec_f32(a);
+
+        /*
+         * Force result of a division by 0 to 0. It the behavior of the
+         * sklearn canberra function.
+         */
+        a = vdupq_m_n_f32(a, 0.0f, vcmpeqq(a, 0.0f));
+        c = vmulq(c, a);
+        accumV = vaddq_m(accumV, accumV, c, p0);
+    }
+
+    accum = vecAddAcrossF32Mve(accumV);
+
+    return (accum);
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accum=0.0f, tmpA, tmpB,diff,sum;
+   uint32_t blkCnt;
+   float32x4_t a,b,c,accumV;
+   float32x2_t accumV2;
+   uint32x4_t   isZeroV;
+   float32x4_t zeroV = vdupq_n_f32(0.0f);
+
+   accumV = vdupq_n_f32(0.0f);
+
+   blkCnt = blockSize >> 2;
+   while(blkCnt > 0)
+   {
+        a = vld1q_f32(pA);
+        b = vld1q_f32(pB);
+
+        c = vabdq_f32(a,b);
+
+        a = vabsq_f32(a);
+        b = vabsq_f32(b);
+        a = vaddq_f32(a,b);
+        isZeroV = vceqq_f32(a,zeroV);
+
+        /* 
+         * May divide by zero when a and b have both the same lane at zero.
+         */
+        a = vinvq_f32(a);
+        
+        /*
+         * Force result of a division by 0 to 0. It the behavior of the
+         * sklearn canberra function.
+         */
+        a = vreinterpretq_f32_s32(vbicq_s32(vreinterpretq_s32_f32(a),vreinterpretq_s32_u32(isZeroV)));
+        c = vmulq_f32(c,a);
+        accumV = vaddq_f32(accumV,c);
+
+        pA += 4;
+        pB += 4;
+        blkCnt --;
+   }
+   accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV));
+   accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+
+
+   blkCnt = blockSize & 3;
+   while(blkCnt > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+
+      diff = fabsf(tmpA - tmpB);
+      sum = fabsf(tmpA) + fabsf(tmpB);
+      if ((tmpA != 0.0f) || (tmpB != 0.0f))
+      {
+         accum += (diff / sum);
+      }
+      blkCnt --;
+   }
+   return(accum);
+}
+
+#else
+float32_t arm_canberra_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accum=0.0f, tmpA, tmpB,diff,sum;
+
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+
+      diff = fabsf(tmpA - tmpB);
+      sum = fabsf(tmpA) + fabsf(tmpB);
+      if ((tmpA != 0.0f) || (tmpB != 0.0f))
+      {
+         accum += (diff / sum);
+      }
+      blockSize --;
+   }
+   return(accum);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Canberra group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f16.c
new file mode 100755
index 00000000..8dec141f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f16.c
@@ -0,0 +1,146 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_chebyshev_distance_f16.c
+ * Description:  Chebyshev distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup Chebyshev Chebyshev distance
+
+  Chebyshev distance
+ */
+
+/**
+  @addtogroup Chebyshev
+  @{
+ */
+
+
+/**
+ * @brief        Chebyshev distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float16_t arm_chebyshev_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;     /* loop counters */
+    f16x8_t         vecA, vecB;
+    f16x8_t         vecDiff = vdupq_n_f16(0.0);
+    float16_t       maxValue = 0.0f16;
+
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U) {
+        vecA = vld1q(pA);
+        pA += 8;
+        vecB = vld1q(pB);
+        pB += 8;
+        /*
+         * update per-lane max.
+         */
+        vecDiff = vmaxnmaq(vsubq(vecA, vecB), vecDiff);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        vecA = vldrhq_z_f16(pA, p0);
+        vecB = vldrhq_z_f16(pB, p0);
+
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        vecDiff = vmaxnmaq_m(vecDiff, vsubq(vecA, vecB), p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    return vmaxnmavq(maxValue, vecDiff);
+}
+
+#else
+float16_t arm_chebyshev_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+   _Float16 diff=0.0f,  maxVal,tmpA, tmpB;
+
+   tmpA = *pA++;
+   tmpB = *pB++;
+   diff = (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB));
+   maxVal = diff;
+   blockSize--;
+
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      diff = (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB));
+      if ((_Float16)diff > (_Float16)maxVal)
+      {
+        maxVal = diff;
+      }
+      blockSize --;
+   }
+  
+   return(maxVal);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Chebyshev group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c
new file mode 100755
index 00000000..41da72d7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f32.c
@@ -0,0 +1,213 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_chebyshev_distance_f32.c
+ * Description:  Chebyshev distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @addtogroup Chebyshev
+  @{
+ */
+
+
+/**
+ * @brief        Chebyshev distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;     /* loop counters */
+    f32x4_t         vecA, vecB;
+    f32x4_t         vecDiff = vdupq_n_f32(0.0);
+    float32_t       maxValue = 0.0;
+
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U) {
+        vecA = vld1q(pA);
+        pA += 4;
+        vecB = vld1q(pB);
+        pB += 4;
+        /*
+         * update per-lane max.
+         */
+        vecDiff = vmaxnmaq(vsubq(vecA, vecB), vecDiff);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        vecA = vldrwq_z_f32(pA, p0);
+        vecB = vldrwq_z_f32(pB, p0);
+
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        vecDiff = vmaxnmaq_m(vecDiff, vsubq(vecA, vecB), p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    return vmaxnmavq(maxValue, vecDiff);
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t diff=0.0f, maxVal=0.0f, tmpA, tmpB;
+   uint32_t blkCnt;
+   float32x4_t a,b,diffV, maxValV;
+   float32x2_t maxValV2;
+
+   if (blockSize <= 3)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      diff = fabsf(tmpA - tmpB);
+      maxVal = diff;
+      blockSize--;
+   
+      while(blockSize > 0)
+      {
+         tmpA = *pA++;
+         tmpB = *pB++;
+         diff = fabsf(tmpA - tmpB);
+         if (diff > maxVal)
+         {
+           maxVal = diff;
+         }
+         blockSize --;
+      }
+   }
+   else
+   {
+
+      a = vld1q_f32(pA);
+      b = vld1q_f32(pB);
+      pA += 4;
+      pB += 4;
+
+      diffV = vabdq_f32(a,b);
+
+      blockSize -= 4;
+
+      maxValV = diffV;
+
+  
+      blkCnt = blockSize >> 2;
+      while(blkCnt > 0)
+      {
+           a = vld1q_f32(pA);
+           b = vld1q_f32(pB);
+   
+           diffV = vabdq_f32(a,b);
+           maxValV = vmaxq_f32(maxValV, diffV);
+   
+           pA += 4;
+           pB += 4;
+           blkCnt --;
+      }
+      maxValV2 = vpmax_f32(vget_low_f32(maxValV),vget_high_f32(maxValV));
+      maxValV2 = vpmax_f32(maxValV2,maxValV2);
+      maxVal = vget_lane_f32(maxValV2,0);
+
+  
+      blkCnt = blockSize & 3;
+      while(blkCnt > 0)
+      {
+         tmpA = *pA++;
+         tmpB = *pB++;
+         diff = fabsf(tmpA - tmpB);
+         if (diff > maxVal)
+         {
+            maxVal = diff;
+         }
+         blkCnt --;
+      }
+   }
+   return(maxVal);
+}
+
+#else
+float32_t arm_chebyshev_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t diff=0.0f,  maxVal,tmpA, tmpB;
+
+   tmpA = *pA++;
+   tmpB = *pB++;
+   diff = fabsf(tmpA - tmpB);
+   maxVal = diff;
+   blockSize--;
+
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      diff = fabsf(tmpA - tmpB);
+      if (diff > maxVal)
+      {
+        maxVal = diff;
+      }
+      blockSize --;
+   }
+  
+   return(maxVal);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Chebyshev group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f64.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f64.c
new file mode 100644
index 00000000..899159dd
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_chebyshev_distance_f64.c
@@ -0,0 +1,76 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_chebyshev_distance_f64.c
+ * Description:  Chebyshev distance between two vectors
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @addtogroup Chebyshev
+  @{
+ */
+
+
+/**
+ * @brief        Chebyshev distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float64_t arm_chebyshev_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize)
+{
+   float64_t diff=0.,  maxVal,tmpA, tmpB;
+
+   tmpA = *pA++;
+   tmpB = *pB++;
+   diff = fabs(tmpA - tmpB);
+   maxVal = diff;
+   blockSize--;
+
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      diff = fabs(tmpA - tmpB);
+      if (diff > maxVal)
+      {
+        maxVal = diff;
+      }
+      blockSize --;
+   }
+  
+   return(maxVal);
+}
+
+/**
+ * @} end of Chebyshev group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f16.c
new file mode 100755
index 00000000..44b3bdfe
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f16.c
@@ -0,0 +1,128 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cityblock_distance_f16.c
+ * Description:  Cityblock (Manhattan) distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup Manhattan Cityblock (Manhattan) distance
+
+  Cityblock (Manhattan) distance
+ */
+
+/**
+  @addtogroup Manhattan
+  @{
+ */
+
+
+/**
+ * @brief        Cityblock (Manhattan) distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float16_t arm_cityblock_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    f16x8_t         a, b, accumV, tempV;
+
+    accumV = vdupq_n_f16(0.0f);
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        tempV = vabdq(a, b);
+        accumV = vaddq(accumV, tempV);
+
+        pA += 8;
+        pB += 8;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        a = vldrhq_z_f16(pA, p0);
+        b = vldrhq_z_f16(pB, p0);
+
+        tempV = vabdq(a, b);
+        accumV = vaddq_m(accumV, accumV, tempV, p0);
+    }
+
+    return vecAddAcrossF16Mve(accumV);
+}
+
+#else
+float16_t arm_cityblock_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+   _Float16 accum,tmpA, tmpB;
+
+   accum = 0.0f16;
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      accum  += (_Float16)fabsf((float32_t)((_Float16)tmpA - (_Float16)tmpB));
+      
+      blockSize --;
+   }
+  
+   return(accum);
+}
+#endif
+
+/**
+ * @} end of Manhattan group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c
new file mode 100755
index 00000000..08d406a2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f32.c
@@ -0,0 +1,157 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cityblock_distance_f32.c
+ * Description:  Cityblock (Manhattan) distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+  @addtogroup Manhattan
+  @{
+ */
+
+
+/**
+ * @brief        Cityblock (Manhattan) distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    f32x4_t         a, b, accumV, tempV;
+
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        tempV = vabdq(a, b);
+        accumV = vaddq(accumV, tempV);
+
+        pA += 4;
+        pB += 4;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        a = vldrwq_z_f32(pA, p0);
+        b = vldrwq_z_f32(pB, p0);
+
+        tempV = vabdq(a, b);
+        accumV = vaddq_m(accumV, accumV, tempV, p0);
+    }
+
+    return vecAddAcrossF32Mve(accumV);
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accum=0.0f, tmpA, tmpB;
+   uint32_t blkCnt;
+   float32x4_t a,b,accumV, tempV;
+   float32x2_t accumV2;
+
+   accumV = vdupq_n_f32(0.0f);
+
+   blkCnt = blockSize >> 2;
+   while(blkCnt > 0)
+   {
+        a = vld1q_f32(pA);
+        b = vld1q_f32(pB);
+ 
+        tempV = vabdq_f32(a,b);
+        accumV = vaddq_f32(accumV, tempV);
+ 
+        pA += 4;
+        pB += 4;
+        blkCnt --;
+   }
+   accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV));
+   accumV2 = vpadd_f32(accumV2,accumV2);
+   accum = vget_lane_f32(accumV2,0);
+   
+
+   blkCnt = blockSize & 3;
+   while(blkCnt > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      accum += fabsf(tmpA - tmpB);
+      
+      blkCnt --;
+   }
+   return(accum);
+}
+
+#else
+float32_t arm_cityblock_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accum,tmpA, tmpB;
+
+   accum = 0.0f;
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      accum  += fabsf(tmpA - tmpB);
+      
+      blockSize --;
+   }
+  
+   return(accum);
+}
+#endif
+#endif
+
+/**
+ * @} end of Manhattan group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f64.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f64.c
new file mode 100644
index 00000000..46c0a6df
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cityblock_distance_f64.c
@@ -0,0 +1,67 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cityblock_distance_f64.c
+ * Description:  Cityblock (Manhattan) distance between two vectors
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+  @addtogroup Manhattan
+  @{
+ */
+
+
+/**
+ * @brief        Cityblock (Manhattan) distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float64_t arm_cityblock_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize)
+{
+   float64_t accum,tmpA, tmpB;
+
+   accum = 0.;
+   while(blockSize > 0)
+   {
+      tmpA = *pA++;
+      tmpB = *pB++;
+      accum  += fabs(tmpA - tmpB);
+      
+      blockSize --;
+   }
+  
+   return(accum);
+}
+
+/**
+ * @} end of Manhattan group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f16.c
new file mode 100755
index 00000000..7517cece
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f16.c
@@ -0,0 +1,99 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlation_distance_f16.c
+ * Description:  Correlation distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup Correlation Correlation distance
+
+  Correlation distance
+ */
+
+/**
+  @addtogroup Correlation
+  @{
+ */
+
+
+/**
+ * @brief        Correlation distance between two vectors
+ *
+ * The input vectors are modified in place !
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float16_t arm_correlation_distance_f16(float16_t *pA,float16_t *pB, uint32_t blockSize)
+{
+    float16_t ma,mb,pwra,pwrb,dot,tmp;
+
+    arm_mean_f16(pA, blockSize, &ma);
+    arm_mean_f16(pB, blockSize, &mb);
+
+    arm_offset_f16(pA, -(_Float16)ma, pA, blockSize);
+    arm_offset_f16(pB, -(_Float16)mb, pB, blockSize);
+
+    arm_power_f16(pA, blockSize, &pwra);
+    arm_power_f16(pB, blockSize, &pwrb);
+
+    arm_dot_prod_f16(pA,pB,blockSize,&dot);
+
+    dot = (_Float16)dot / (_Float16)blockSize;
+    pwra = (_Float16)pwra / (_Float16)blockSize;
+    pwrb = (_Float16)pwrb / (_Float16)blockSize;
+
+    arm_sqrt_f16((_Float16)pwra * (_Float16)pwrb,&tmp);
+ 
+    return(1.0f16 - (_Float16)dot / (_Float16)tmp);
+
+   
+}
+
+
+
+/**
+ * @} end of Correlation group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c
new file mode 100755
index 00000000..2578016e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_correlation_distance_f32.c
@@ -0,0 +1,84 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlation_distance_f32.c
+ * Description:  Correlation distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+/**
+  @addtogroup Correlation
+  @{
+ */
+
+
+/**
+ * @brief        Correlation distance between two vectors
+ *
+ * The input vectors are modified in place !
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float32_t arm_correlation_distance_f32(float32_t *pA,float32_t *pB, uint32_t blockSize)
+{
+    float32_t ma,mb,pwra,pwrb,dot,tmp;
+
+    arm_mean_f32(pA, blockSize, &ma);
+    arm_mean_f32(pB, blockSize, &mb);
+
+    arm_offset_f32(pA, -ma, pA, blockSize);
+    arm_offset_f32(pB, -mb, pB, blockSize);
+
+    arm_power_f32(pA, blockSize, &pwra);
+    arm_power_f32(pB, blockSize, &pwrb);
+
+    arm_dot_prod_f32(pA,pB,blockSize,&dot);
+
+    dot = dot / blockSize;
+    pwra = pwra / blockSize;
+    pwrb = pwrb / blockSize;
+
+    arm_sqrt_f32(pwra * pwrb,&tmp);
+ 
+    return(1.0f - dot / tmp);
+
+   
+}
+
+
+
+/**
+ * @} end of Correlation group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f16.c
new file mode 100755
index 00000000..20f890ba
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f16.c
@@ -0,0 +1,88 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cosine_distance_f16.c
+ * Description:  Cosine distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup CosineDist Cosine distance
+
+  Cosine distance
+ */
+
+
+/**
+  @addtogroup CosineDist
+  @{
+ */
+
+
+
+/**
+ * @brief        Cosine distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ * @par           Description
+ *                  cosine_distance(u,v) is 1 - u . v / (Norm(u) Norm(v))
+ */
+
+float16_t arm_cosine_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    float16_t pwra,pwrb,dot,tmp;
+
+    arm_power_f16(pA, blockSize, &pwra);
+    arm_power_f16(pB, blockSize, &pwrb);
+
+    arm_dot_prod_f16(pA,pB,blockSize,&dot);
+
+    arm_sqrt_f16((_Float16)pwra * (_Float16)pwrb, &tmp);
+    return(1.0f16 - (_Float16)dot / (_Float16)tmp);
+
+}
+
+
+
+/**
+ * @} end of CosineDist group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c
new file mode 100755
index 00000000..014bff00
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f32.c
@@ -0,0 +1,72 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cosine_distance_f32.c
+ * Description:  Cosine distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @addtogroup CosineDist
+  @{
+ */
+
+
+
+/**
+ * @brief        Cosine distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ * @par           Description
+ *                  cosine_distance(u,v) is 1 - u . v / (Norm(u) Norm(v))
+ */
+
+float32_t arm_cosine_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    float32_t pwra,pwrb,dot,tmp;
+
+    arm_power_f32(pA, blockSize, &pwra);
+    arm_power_f32(pB, blockSize, &pwrb);
+
+    arm_dot_prod_f32(pA,pB,blockSize,&dot);
+
+    arm_sqrt_f32(pwra * pwrb, &tmp);
+    return(1.0f - dot / tmp);
+
+}
+
+
+
+/**
+ * @} end of CosineDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f64.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f64.c
new file mode 100644
index 00000000..c7443a6b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_cosine_distance_f64.c
@@ -0,0 +1,70 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cosine_distance_f64.c
+ * Description:  Cosine distance between two vectors
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @addtogroup CosineDist
+  @{
+ */
+
+
+
+/**
+ * @brief        Cosine distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+float64_t arm_cosine_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize)
+{
+    float64_t pwra,pwrb,dot,tmp;
+
+    arm_power_f64(pA, blockSize, &pwra);
+    arm_power_f64(pB, blockSize, &pwrb);
+
+    arm_dot_prod_f64(pA,pB,blockSize,&dot);
+
+    tmp = sqrt(pwra * pwrb);
+    return(1. - dot / tmp);
+
+}
+
+
+
+/**
+ * @} end of CosineDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c
new file mode 100755
index 00000000..cae963a6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_dice_distance.c
@@ -0,0 +1,92 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dice_distance.c
+ * Description:  Dice distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+
+/**
+ * @ingroup groupDistance
+ * @{
+ */
+
+/**
+ * @defgroup BoolDist Boolean Distances
+ *
+ * Distances between two vectors of boolean values.
+ *
+ * Booleans are packed in 32 bit words.
+ * numberOfBooleans argument is the number of booleans and not the
+ * number of words.
+ *
+ * Bits are packed in big-endian mode (because of behavior of numpy packbits in
+ * in version < 1.17)
+ */
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+/**
+ * @brief        Dice distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_dice_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0,ctf=0,cft=0;
+
+    arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft);
+
+    return(1.0*(ctf + cft) / (2.0*ctt + cft + ctf));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
+
+/**
+ * @} end of groupDistance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f16.c
new file mode 100755
index 00000000..64d5d4a6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f16.c
@@ -0,0 +1,131 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_euclidean_distance_f16.c
+ * Description:  Euclidean distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup Euclidean Euclidean distance
+
+  Euclidean distance
+ */
+
+
+/**
+  @addtogroup Euclidean
+  @{
+ */
+
+
+/**
+ * @brief        Euclidean distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+float16_t arm_euclidean_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    float16_t       tmp;
+    f16x8_t         a, b, accumV, tempV;
+
+    accumV = vdupq_n_f16(0.0f);
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        tempV = vsubq(a, b);
+        accumV = vfmaq(accumV, tempV, tempV);
+
+        pA += 8;
+        pB += 8;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        a = vldrhq_z_f16(pA, p0);
+        b = vldrhq_z_f16(pB, p0);
+
+        tempV = vsubq(a, b);
+        accumV = vfmaq_m(accumV, tempV, tempV, p0);
+    }
+
+    arm_sqrt_f16(vecAddAcrossF16Mve(accumV), &tmp);
+    return (tmp);
+}
+
+#else
+float16_t arm_euclidean_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+   _Float16 accum=0.0f,tmp;
+   float16_t result;
+
+   while(blockSize > 0)
+   {
+      tmp = (_Float16)*pA++ - (_Float16)*pB++;
+      accum += SQ(tmp);
+      blockSize --;
+   }
+   arm_sqrt_f16(accum,&result);
+   return(result);
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Euclidean group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c
new file mode 100755
index 00000000..e226617e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f32.c
@@ -0,0 +1,152 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_euclidean_distance_f32.c
+ * Description:  Euclidean distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+/**
+  @addtogroup Euclidean
+  @{
+ */
+
+
+/**
+ * @brief        Euclidean distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    float32_t       tmp;
+    f32x4_t         a, b, accumV, tempV;
+
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        tempV = vsubq(a, b);
+        accumV = vfmaq(accumV, tempV, tempV);
+
+        pA += 4;
+        pB += 4;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        a = vldrwq_z_f32(pA, p0);
+        b = vldrwq_z_f32(pB, p0);
+
+        tempV = vsubq(a, b);
+        accumV = vfmaq_m(accumV, tempV, tempV, p0);
+    }
+
+    arm_sqrt_f32(vecAddAcrossF32Mve(accumV), &tmp);
+    return (tmp);
+}
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accum=0.0f,tmp;
+   uint32_t blkCnt;
+   float32x4_t a,b,accumV;
+   float32x2_t accumV2;
+
+   accumV = vdupq_n_f32(0.0f);
+   blkCnt = blockSize >> 2;
+   while(blkCnt > 0)
+   {
+        a = vld1q_f32(pA);
+        b = vld1q_f32(pB);
+
+        a = vsubq_f32(a,b);
+        accumV = vmlaq_f32(accumV,a,a);
+        pA += 4;
+        pB += 4;
+        blkCnt --;
+   }
+   accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV));
+   accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+
+   blkCnt = blockSize & 3;
+   while(blkCnt > 0)
+   {
+      tmp = *pA++ - *pB++;
+      accum += SQ(tmp);
+      blkCnt --;
+   }
+   arm_sqrt_f32(accum,&tmp);
+   return(tmp);
+}
+
+#else
+float32_t arm_euclidean_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+   float32_t accum=0.0f,tmp;
+
+   while(blockSize > 0)
+   {
+      tmp = *pA++ - *pB++;
+      accum += SQ(tmp);
+      blockSize --;
+   }
+   arm_sqrt_f32(accum,&tmp);
+   return(tmp);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Euclidean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f64.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f64.c
new file mode 100644
index 00000000..8c8dfde5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_euclidean_distance_f64.c
@@ -0,0 +1,66 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_euclidean_distance_f64.c
+ * Description:  Euclidean distance between two vectors
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+/**
+  @addtogroup Euclidean
+  @{
+ */
+
+
+/**
+ * @brief        Euclidean distance between two vectors
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+float64_t arm_euclidean_distance_f64(const float64_t *pA,const float64_t *pB, uint32_t blockSize)
+{
+   float64_t accum=0.,tmp;
+
+   while(blockSize > 0)
+   {
+      tmp = *pA++ - *pB++;
+      accum += SQ(tmp);
+      blockSize --;
+   }
+   tmp = sqrt(accum);
+   return(tmp);
+}
+
+/**
+ * @} end of Euclidean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c
new file mode 100755
index 00000000..f95c46eb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_hamming_distance.c
@@ -0,0 +1,70 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_hamming_distance.c
+ * Description:  Hamming distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+extern void arm_boolean_distance_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+
+/**
+ * @brief        Hamming distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_hamming_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctf=0,cft=0;
+
+    arm_boolean_distance_TF_FT(pA, pB, numberOfBools, &ctf, &cft);
+
+    return(1.0*(ctf + cft) / numberOfBools);
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c
new file mode 100755
index 00000000..26617a5d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jaccard_distance.c
@@ -0,0 +1,72 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_jaccard_distance.c
+ * Description:  Jaccard distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+/**
+ * @brief        Jaccard distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_jaccard_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0,ctf=0,cft=0;
+
+    arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft);
+
+    return(1.0*(ctf + cft) / (ctt + cft + ctf));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f16.c
new file mode 100755
index 00000000..b31ef348
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f16.c
@@ -0,0 +1,177 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_jensenshannon_distance_f16.c
+ * Description:  Jensen-Shannon distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup JensenShannon Jensen-Shannon distance
+
+  Jensen-Shannon distance
+ */
+
+
+/**
+  @addtogroup JensenShannon
+  @{
+ */
+
+#if !defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_AUTOVECTORIZE)
+/// @private
+__STATIC_INLINE float16_t rel_entr(float16_t x, float16_t y)
+{
+    return ((_Float16)x * (_Float16)logf((float32_t)((_Float16)x / (_Float16)y)));
+}
+#endif
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+float16_t arm_jensenshannon_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    float16_t       tmp;
+    f16x8_t         a, b, t, tmpV, accumV;
+
+    accumV = vdupq_n_f16(0.0f);
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        t = vaddq(a, b);
+        t = vmulq(t, 0.5f);
+
+        tmpV = vmulq(a, vrecip_medprec_f16(t));
+        tmpV = vlogq_f16(tmpV);
+        accumV = vfmaq(accumV, a, tmpV);
+
+        tmpV = vmulq_f16(b, vrecip_medprec_f16(t));
+        tmpV = vlogq_f16(tmpV);
+        accumV = vfmaq(accumV, b, tmpV);
+
+        pA += 8;
+        pB += 8;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        a = vldrhq_z_f16(pA, p0);
+        b = vldrhq_z_f16(pB, p0);
+
+        t = vaddq(a, b);
+        t = vmulq(t, 0.5f);
+
+        tmpV = vmulq_f16(a, vrecip_medprec_f16(t));
+        tmpV = vlogq_f16(tmpV);
+        accumV = vfmaq_m_f16(accumV, a, tmpV, p0);
+
+        tmpV = vmulq_f16(b, vrecip_medprec_f16(t));
+        tmpV = vlogq_f16(tmpV);
+        accumV = vfmaq_m_f16(accumV, b, tmpV, p0);
+
+    }
+
+    arm_sqrt_f16((_Float16)vecAddAcrossF16Mve(accumV) / 2.0f16, &tmp);
+    return (tmp);
+}
+
+#else
+
+
+/**
+ * @brief        Jensen-Shannon distance between two vectors
+ *
+ * This function is assuming that elements of second vector are > 0
+ * and 0 only when the corresponding element of first vector is 0.
+ * Otherwise the result of the computation does not make sense
+ * and for speed reasons, the cases returning NaN or Infinity are not
+ * managed.
+ *
+ * When the function is computing x log (x / y) with x == 0 and y == 0,
+ * it will compute the right result (0) but a division by zero will occur
+ * and should be ignored in client code.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+
+float16_t arm_jensenshannon_distance_f16(const float16_t *pA,const float16_t *pB, uint32_t blockSize)
+{
+    _Float16 left, right,sum, tmp;
+    float16_t result;
+    uint32_t i;
+
+    left = 0.0f16; 
+    right = 0.0f16;
+    for(i=0; i < blockSize; i++)
+    {
+      tmp = ((_Float16)pA[i] + (_Float16)pB[i]) / 2.0f16;
+      left  += (_Float16)rel_entr(pA[i], tmp);
+      right += (_Float16)rel_entr(pB[i], tmp);
+    }
+
+
+    sum = left + right;
+    arm_sqrt_f16((_Float16)sum/2.0f16, &result);
+    return(result);
+
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of JensenShannon group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c
new file mode 100755
index 00000000..5f1a44cc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_jensenshannon_distance_f32.c
@@ -0,0 +1,247 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_jensenshannon_distance_f32.c
+ * Description:  Jensen-Shannon distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @addtogroup JensenShannon
+  @{
+ */
+
+#if !defined(ARM_MATH_MVEF) || defined(ARM_MATH_AUTOVECTORIZE)
+/// @private
+__STATIC_INLINE float32_t rel_entr(float32_t x, float32_t y)
+{
+    return (x * logf(x / y));
+}
+#endif
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    float32_t       tmp;
+    f32x4_t         a, b, t, tmpV, accumV;
+
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        t = vaddq(a, b);
+        t = vmulq(t, 0.5f);
+
+        tmpV = vmulq(a, vrecip_medprec_f32(t));
+        tmpV = vlogq_f32(tmpV);
+        accumV = vfmaq(accumV, a, tmpV);
+
+        tmpV = vmulq_f32(b, vrecip_medprec_f32(t));
+        tmpV = vlogq_f32(tmpV);
+        accumV = vfmaq(accumV, b, tmpV);
+
+        pA += 4;
+        pB += 4;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        a = vldrwq_z_f32(pA, p0);
+        b = vldrwq_z_f32(pB, p0);
+
+        t = vaddq(a, b);
+        t = vmulq(t, 0.5f);
+
+        tmpV = vmulq_f32(a, vrecip_medprec_f32(t));
+        tmpV = vlogq_f32(tmpV);
+        accumV = vfmaq_m_f32(accumV, a, tmpV, p0);
+
+        tmpV = vmulq_f32(b, vrecip_medprec_f32(t));
+        tmpV = vlogq_f32(tmpV);
+        accumV = vfmaq_m_f32(accumV, b, tmpV, p0);
+
+    }
+
+    arm_sqrt_f32(vecAddAcrossF32Mve(accumV) / 2.0f, &tmp);
+    return (tmp);
+}
+
+#else
+
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+
+/**
+ * @brief        Jensen-Shannon distance between two vectors
+ *
+ * This function is assuming that elements of second vector are > 0
+ * and 0 only when the corresponding element of first vector is 0.
+ * Otherwise the result of the computation does not make sense
+ * and for speed reasons, the cases returning NaN or Infinity are not
+ * managed.
+ *
+ * When the function is computing x log (x / y) with x == 0 and y == 0,
+ * it will compute the right result (0) but a division by zero will occur
+ * and should be ignored in client code.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+
+float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    float32_t accum, result, tmp,a,b;
+    uint32_t blkCnt;
+    float32x4_t aV,bV,t, tmpV, accumV;
+    float32x2_t accumV2;
+
+    accum = 0.0f; 
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while(blkCnt > 0)
+    {
+      aV = vld1q_f32(pA);
+      bV = vld1q_f32(pB);
+      t = vaddq_f32(aV,bV);
+      t = vmulq_n_f32(t, 0.5f);
+
+      tmpV = vmulq_f32(aV, vinvq_f32(t));
+      tmpV = vlogq_f32(tmpV);
+      accumV = vmlaq_f32(accumV, aV, tmpV);
+
+
+      tmpV = vmulq_f32(bV, vinvq_f32(t));
+      tmpV = vlogq_f32(tmpV);
+      accumV = vmlaq_f32(accumV, bV, tmpV);
+
+      pA += 4;
+      pB += 4;
+
+
+      blkCnt --;
+    }
+
+    accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV));
+    accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+
+    blkCnt = blockSize & 3;
+    while(blkCnt > 0)
+    {
+      a = *pA;
+      b = *pB;
+      tmp = (a + b) / 2.0f;
+      accum += rel_entr(a, tmp);
+      accum += rel_entr(b, tmp);
+
+      pA++;
+      pB++;
+
+      blkCnt --;
+    }
+
+
+    arm_sqrt_f32(accum/2.0f, &result);
+    return(result);
+
+}
+
+#else
+
+
+/**
+ * @brief        Jensen-Shannon distance between two vectors
+ *
+ * This function is assuming that elements of second vector are > 0
+ * and 0 only when the corresponding element of first vector is 0.
+ * Otherwise the result of the computation does not make sense
+ * and for speed reasons, the cases returning NaN or Infinity are not
+ * managed.
+ *
+ * When the function is computing x log (x / y) with x == 0 and y == 0,
+ * it will compute the right result (0) but a division by zero will occur
+ * and should be ignored in client code.
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    blockSize  vector length
+ * @return distance
+ *
+ */
+
+
+float32_t arm_jensenshannon_distance_f32(const float32_t *pA,const float32_t *pB, uint32_t blockSize)
+{
+    float32_t left, right,sum, result, tmp;
+    uint32_t i;
+
+    left = 0.0f; 
+    right = 0.0f;
+    for(i=0; i < blockSize; i++)
+    {
+      tmp = (pA[i] + pB[i]) / 2.0f;
+      left  += rel_entr(pA[i], tmp);
+      right += rel_entr(pB[i], tmp);
+    }
+
+
+    sum = left + right;
+    arm_sqrt_f32(sum/2.0f, &result);
+    return(result);
+
+}
+
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of JensenShannon group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c
new file mode 100755
index 00000000..239dc0e5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_kulsinski_distance.c
@@ -0,0 +1,73 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_kulsinski_distance.c
+ * Description:  Kulsinski distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+
+/**
+ * @brief        Kulsinski distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_kulsinski_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0,ctf=0,cft=0;
+
+    arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft);
+
+    return(1.0*(ctf + cft - ctt + numberOfBools) / (cft + ctf + numberOfBools));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f16.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f16.c
new file mode 100755
index 00000000..c5300ab0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f16.c
@@ -0,0 +1,137 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_minkowski_distance_f16.c
+ * Description:  Minkowski distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup FloatDist
+ */
+
+/**
+  @defgroup Minkowski Minkowski distance
+
+  Minkowski distance
+ */
+
+/**
+  @addtogroup Minkowski
+  @{
+ */
+
+
+/**
+ * @brief        Minkowski distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    order      Distance order
+ * @param[in]    blockSize  Number of samples
+ * @return distance
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+float16_t arm_minkowski_distance_f16(const float16_t *pA,const float16_t *pB, int32_t order, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    f16x8_t         a, b, tmpV, sumV;
+
+    sumV = vdupq_n_f16(0.0f);
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        tmpV = vabdq(a, b);
+        tmpV = vpowq_f16(tmpV, vdupq_n_f16(order));
+        sumV = vaddq(sumV, tmpV);
+
+        pA += 8;
+        pB += 8;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        a = vldrhq_z_f16(pA, p0);
+        b = vldrhq_z_f16(pB, p0);
+
+        tmpV = vabdq(a, b);
+        tmpV = vpowq_f16(tmpV, vdupq_n_f16(order));
+        sumV = vaddq_m(sumV, sumV, tmpV, p0);
+    }
+
+    return (powf((float32_t)vecAddAcrossF16Mve(sumV), (1.0f / (float32_t) order)));
+}
+
+
+#else
+
+
+float16_t arm_minkowski_distance_f16(const float16_t *pA,const float16_t *pB, int32_t order, uint32_t blockSize)
+{
+    _Float16 sum;
+    uint32_t i;
+
+    sum = 0.0f16; 
+    for(i=0; i < blockSize; i++)
+    {
+       sum += (_Float16)powf(fabsf((float32_t)((_Float16)pA[i] - (_Float16)pB[i])),order);
+    }
+
+
+    return(_Float16)(powf((float32_t)sum,(1.0f/(float32_t)order)));
+
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Minkowski group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c
new file mode 100755
index 00000000..b881fc1f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_minkowski_distance_f32.c
@@ -0,0 +1,188 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_minkowski_distance_f32.c
+ * Description:  Minkowski distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @addtogroup Minkowski
+  @{
+ */
+
+/* 6.14 bug */
+#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6100100) && (__ARMCC_VERSION < 6150001)
+ 
+__attribute__((weak)) float __powisf2(float a, int b)
+{ 
+    const int recip = b < 0;
+    float r = 1;
+    while (1)
+    {
+        if (b & 1)
+            r *= a;
+        b /= 2;
+        if (b == 0)
+            break;
+        a *= a;
+    }
+    return recip ? 1/r : r;
+}
+#endif 
+
+/**
+ * @brief        Minkowski distance between two vectors
+ *
+ * @param[in]    pA         First vector
+ * @param[in]    pB         Second vector
+ * @param[in]    order      Distance order
+ * @param[in]    blockSize  Number of samples
+ * @return distance
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    f32x4_t         a, b, tmpV, sumV;
+
+    sumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U) {
+        a = vld1q(pA);
+        b = vld1q(pB);
+
+        tmpV = vabdq(a, b);
+        tmpV = vpowq_f32(tmpV, vdupq_n_f32(order));
+        sumV = vaddq(sumV, tmpV);
+
+        pA += 4;
+        pB += 4;
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        a = vldrwq_z_f32(pA, p0);
+        b = vldrwq_z_f32(pB, p0);
+
+        tmpV = vabdq(a, b);
+        tmpV = vpowq_f32(tmpV, vdupq_n_f32(order));
+        sumV = vaddq_m(sumV, sumV, tmpV, p0);
+    }
+
+    return (powf(vecAddAcrossF32Mve(sumV), (1.0f / (float32_t) order)));
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize)
+{
+    float32_t sum;
+    uint32_t blkCnt;
+    float32x4_t sumV,aV,bV, tmpV, n;
+    float32x2_t sumV2;
+
+    sum = 0.0f; 
+    sumV = vdupq_n_f32(0.0f);
+    n = vdupq_n_f32(order);
+
+    blkCnt = blockSize >> 2;
+    while(blkCnt > 0)
+    {
+       aV = vld1q_f32(pA);
+       bV = vld1q_f32(pB);
+       pA += 4;
+       pB += 4;
+
+       tmpV = vabdq_f32(aV,bV);
+       tmpV = vpowq_f32(tmpV,n);
+       sumV = vaddq_f32(sumV, tmpV);
+
+
+       blkCnt --;
+    }
+
+    sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+    sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1);
+
+    blkCnt = blockSize & 3;
+    while(blkCnt > 0)
+    {
+       sum += powf(fabsf(*pA++ - *pB++),order);
+
+       blkCnt --;
+    }
+
+
+    return(powf(sum,(1.0f/order)));
+
+}
+
+#else
+
+
+float32_t arm_minkowski_distance_f32(const float32_t *pA,const float32_t *pB, int32_t order, uint32_t blockSize)
+{
+    float32_t sum;
+    uint32_t i;
+
+    sum = 0.0f; 
+    for(i=0; i < blockSize; i++)
+    {
+       sum += powf(fabsf(pA[i] - pB[i]),order);
+    }
+
+
+    return(powf(sum,(1.0f/order)));
+
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of Minkowski group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c
new file mode 100755
index 00000000..b918fadb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_rogerstanimoto_distance.c
@@ -0,0 +1,75 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rogerstanimoto_distance.c
+ * Description:  Roger Stanimoto distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+extern void arm_boolean_distance_TT_FF_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       , uint32_t *cFF
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+/**
+ * @brief        Rogers Tanimoto distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_rogerstanimoto_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0,cff=0,ctf=0,cft=0,r;
+
+    arm_boolean_distance_TT_FF_TF_FT(pA, pB, numberOfBools, &ctt,&cff, &ctf, &cft);
+
+    r = 2*(ctf + cft);
+
+    return(1.0*r / (r + ctt + cff));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c
new file mode 100755
index 00000000..0698a64a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_russellrao_distance.c
@@ -0,0 +1,72 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_russellrao_distance.c
+ * Description:  Russell-Rao distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+
+extern void arm_boolean_distance_TT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       );
+
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+/**
+ * @brief        Russell-Rao distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_russellrao_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0;
+
+
+    arm_boolean_distance_TT(pA, pB, numberOfBools, &ctt);
+
+
+    return(1.0f*(numberOfBools - ctt) / ((float32_t)numberOfBools));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c
new file mode 100755
index 00000000..8015c97a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_sokalmichener_distance.c
@@ -0,0 +1,76 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sokalmichener_distance.c
+ * Description:  Sokal-Michener distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+extern void arm_boolean_distance_TT_FF_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       , uint32_t *cFF
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+/**
+ * @brief        Sokal-Michener distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_sokalmichener_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0,cff=0,cft=0,ctf=0;
+    float32_t r,s;
+
+    arm_boolean_distance_TT_FF_TF_FT(pA, pB, numberOfBools, &ctt, &cff, &ctf, &cft);
+
+   r = 2.0*(ctf + cft);
+   s = 1.0*(cff + ctt);
+
+    return(r / (s+r));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c
new file mode 100755
index 00000000..93d8e50e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_sokalsneath_distance.c
@@ -0,0 +1,74 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sokalsneath_distance.c
+ * Description:  Sokal-Sneath distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+extern void arm_boolean_distance_TT_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+/**
+ * @brief        Sokal-Sneath distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_sokalsneath_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0,cft=0,ctf=0;
+    float32_t r;
+
+    arm_boolean_distance_TT_TF_FT(pA, pB, numberOfBools, &ctt, &ctf, &cft);
+
+    r = 2.0*(ctf + cft);
+
+    return(r / (r + ctt));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c
new file mode 100755
index 00000000..54afebfa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/DistanceFunctions/arm_yule_distance.c
@@ -0,0 +1,74 @@
+
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_yule_distance.c
+ * Description:  Yule distance between two vectors
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/distance_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+extern void arm_boolean_distance_TT_FF_TF_FT(const uint32_t *pA
+       , const uint32_t *pB
+       , uint32_t numberOfBools
+       , uint32_t *cTT
+       , uint32_t *cFF
+       , uint32_t *cTF
+       , uint32_t *cFT
+       );
+
+/**
+  @addtogroup BoolDist
+  @{
+ */
+
+
+/**
+ * @brief        Yule distance between two vectors
+ *
+ * @param[in]    pA              First vector of packed booleans
+ * @param[in]    pB              Second vector of packed booleans
+ * @param[in]    numberOfBools   Number of booleans
+ * @return distance
+ *
+ */
+
+float32_t arm_yule_distance(const uint32_t *pA, const uint32_t *pB, uint32_t numberOfBools)
+{
+    uint32_t ctt=0,cff=0,ctf=0,cft=0,r;
+
+    arm_boolean_distance_TT_FF_TF_FT(pA, pB, numberOfBools, &ctt,&cff, &ctf, &cft);
+
+    r = 2*(ctf * cft);
+
+    return(1.0*r / (r/2.0 + ctt * cff));
+}
+
+
+/**
+ * @} end of BoolDist group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
index a8566788..a129205f 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctions.c
@@ -1,37 +1,74 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        FastMathFunctions.c
- * Description:  Combination of all fast math function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_cos_f32.c"
-#include "arm_cos_q15.c"
-#include "arm_cos_q31.c"
-#include "arm_sin_f32.c"
-#include "arm_sin_q15.c"
-#include "arm_sin_q31.c"
-#include "arm_sqrt_q15.c"
-#include "arm_sqrt_q31.c"
-
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FastMathFunctions.c
+ * Description:  Combination of all fast math function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+#include "arm_cos_f32.c"
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
+#include "arm_cos_q15.c"
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+#include "arm_cos_q31.c"
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
+#include "arm_sin_f32.c"
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
+#include "arm_sin_q15.c"
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
+#include "arm_sin_q31.c"
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q31)
+#include "arm_sqrt_q31.c"
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SQRT_Q15)
+#include "arm_sqrt_q15.c"
+#endif 
+
+#endif
+
+#include "arm_vexp_f32.c"
+#include "arm_vexp_f64.c"
+#include "arm_vlog_f32.c"
+#include "arm_vlog_f64.c"
+#include "arm_divide_q15.c"
+#include "arm_divide_q31.c"
+#include "arm_vlog_q31.c"
+#include "arm_vlog_q15.c"
+
+
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c
new file mode 100755
index 00000000..a14e8998
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/FastMathFunctionsF16.c
@@ -0,0 +1,31 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FastMathFunctions.c
+ * Description:  Combination of all fast math function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_vexp_f16.c"
+#include "arm_vlog_f16.c"
+#include "arm_vinverse_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
index 78207d83..de037c87 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_f32.c
@@ -1,122 +1,121 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cos_f32.c
- * Description:  Fast cosine calculation for floating-point values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @defgroup cos Cosine
-
-  Computes the trigonometric cosine function using a combination of table lookup
-  and linear interpolation.  There are separate functions for
-  Q15, Q31, and floating-point data types.
-  The input to the floating-point version is in radians while the
-  fixed-point Q15 and Q31 have a scaled input with the range
-  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
-  value of 2*pi wraps around to 0.
-
-  The implementation is based on table lookup using 256 values together with linear interpolation.
-  The steps used are:
-   -# Calculation of the nearest integer table index
-   -# Compute the fractional portion (fract) of the table index.
-   -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
-
-  where
-  <pre>
-     b = Table[index];
-     c = Table[index+1];
-  </pre>
- */
-
-/**
-  @addtogroup cos
-  @{
- */
-
-/**
-  @brief         Fast approximation to the trigonometric cosine function for floating-point data.
-  @param[in]     x  input value in radians
-  @return        cos(x)
- */
-
-float32_t arm_cos_f32(
-  float32_t x)
-{
-  float32_t cosVal, fract, in;                   /* Temporary input, output variables */
-  uint16_t index;                                /* Index variable */
-  float32_t a, b;                                /* Two nearest output values */
-  int32_t n;
-  float32_t findex;
-
-  /* input x is in radians */
-  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
-  in = x * 0.159154943092f + 0.25f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if (in < 0.0f)
-  {
-    n--;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
-  index = (uint16_t)findex;
-
-  /* when "in" is exactly 1, we need to rotate the index down to 0 */
-  if (index >= FAST_MATH_TABLE_SIZE) {
-    index = 0;
-    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
-  }
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) index;
-
-  /* Read two nearest values of input value from the cos table */
-  a = sinTable_f32[index];
-  b = sinTable_f32[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (1.0f - fract) * a + fract * b;
-
-  /* Return output value */
-  return (cosVal);
-}
-
-/**
-  @} end of cos group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_f32.c
+ * Description:  Fast cosine calculation for floating-point values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @defgroup cos Cosine
+
+  Computes the trigonometric cosine function using a combination of table lookup
+  and linear interpolation.  There are separate functions for
+  Q15, Q31, and floating-point data types.
+  The input to the floating-point version is in radians while the
+  fixed-point Q15 and Q31 have a scaled input with the range
+  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+  value of 2*pi wraps around to 0.
+
+  The implementation is based on table lookup using 512 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index
+   -# Compute the fractional portion (fract) of the table index.
+   -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
+
+  where
+  <pre>
+     a = Table[index];
+     b = Table[index+1];
+  </pre>
+ */
+
+/**
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for floating-point data.
+  @param[in]     x  input value in radians
+  @return        cos(x)
+ */
+float32_t arm_cos_f32(
+  float32_t x)
+{
+  float32_t cosVal, fract, in;                   /* Temporary input, output variables */
+  uint16_t index;                                /* Index variable */
+  float32_t a, b;                                /* Two nearest output values */
+  int32_t n;
+  float32_t findex;
+
+  /* input x is in radians */
+  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi, add 0.25 (pi/2) to read sine table */
+  in = x * 0.159154943092f + 0.25f;
+
+  /* Calculation of floor value of input */
+  n = (int32_t) in;
+
+  /* Make negative values towards -infinity */
+  if (in < 0.0f)
+  {
+    n--;
+  }
+
+  /* Map input value to [0 1] */
+  in = in - (float32_t) n;
+
+  /* Calculation of index of the table */
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  index = (uint16_t)findex;
+
+  /* when "in" is exactly 1, we need to rotate the index down to 0 */
+  if (index >= FAST_MATH_TABLE_SIZE) {
+    index = 0;
+    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
+  }
+
+  /* fractional value calculation */
+  fract = findex - (float32_t) index;
+
+  /* Read two nearest values of input value from the cos table */
+  a = sinTable_f32[index];
+  b = sinTable_f32[index+1];
+
+  /* Linear interpolation process */
+  cosVal = (1.0f - fract) * a + fract * b;
+
+  /* Return output value */
+  return (cosVal);
+}
+
+/**
+  @} end of cos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
index aef47daa..6b552f11 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q15.c
@@ -1,84 +1,84 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cos_q15.c
- * Description:  Fast cosine calculation for Q15 values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @addtogroup cos
-  @{
- */
-
-/**
-  @brief         Fast approximation to the trigonometric cosine function for Q15 data.
-  @param[in]     x  Scaled input value in radians
-  @return        cos(x)
-
-  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
- */
-
-q15_t arm_cos_q15(
-  q15_t x)
-{
-  q15_t cosVal;                                  /* Temporary input, output variables */
-  int32_t index;                                 /* Index variable */
-  q15_t a, b;                                    /* Two nearest output values */
-  q15_t fract;                                   /* Temporary values for fractional values */
-
-  /* add 0.25 (pi/2) to read sine table */
-  x = (uint16_t)x + 0x2000;
-  if (x < 0)
-  { /* convert negative numbers to corresponding positive ones */
-    x = (uint16_t)x + 0x8000;
-  }
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q15[index];
-  b = sinTable_q15[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (q31_t) (0x8000 - fract) * a >> 16;
-  cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16);
-
-  /* Return output value */
-  return (cosVal << 1);
-}
-
-/**
-  @} end of cos group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_q15.c
+ * Description:  Fast cosine calculation for Q15 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for Q15 data.
+  @param[in]     x  Scaled input value in radians
+  @return        cos(x)
+
+  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q15_t arm_cos_q15(
+  q15_t x)
+{
+  q15_t cosVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q15_t a, b;                                    /* Two nearest output values */
+  q15_t fract;                                   /* Temporary values for fractional values */
+
+  /* add 0.25 (pi/2) to read sine table */
+  x = (uint16_t)x + 0x2000;
+  if (x < 0)
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint16_t)x + 0x8000;
+  }
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q15[index];
+  b = sinTable_q15[index+1];
+
+  /* Linear interpolation process */
+  cosVal = (q31_t) (0x8000 - fract) * a >> 16;
+  cosVal = (q15_t) ((((q31_t) cosVal << 16) + ((q31_t) fract * b)) >> 16);
+
+  /* Return output value */
+  return (cosVal << 1);
+}
+
+/**
+  @} end of cos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
index fa42eee2..8386c8f2 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_cos_q31.c
@@ -1,84 +1,84 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cos_q31.c
- * Description:  Fast cosine calculation for Q31 values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @addtogroup cos
-  @{
- */
-
-/**
-  @brief         Fast approximation to the trigonometric cosine function for Q31 data.
-  @param[in]     x  Scaled input value in radians
-  @return        cos(x)
-
-  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
- */
-
-q31_t arm_cos_q31(
-  q31_t x)
-{
-  q31_t cosVal;                                  /* Temporary input, output variables */
-  int32_t index;                                 /* Index variable */
-  q31_t a, b;                                    /* Two nearest output values */
-  q31_t fract;                                   /* Temporary values for fractional values */
-
-  /* add 0.25 (pi/2) to read sine table */
-  x = (uint32_t)x + 0x20000000;
-  if (x < 0)
-  { /* convert negative numbers to corresponding positive ones */
-    x = (uint32_t)x + 0x80000000;
-  }
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q31[index];
-  b = sinTable_q31[index+1];
-
-  /* Linear interpolation process */
-  cosVal = (q63_t) (0x80000000 - fract) * a >> 32;
-  cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32);
-
-  /* Return output value */
-  return (cosVal << 1);
-}
-
-/**
-  @} end of cos group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_q31.c
+ * Description:  Fast cosine calculation for Q31 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup cos
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric cosine function for Q31 data.
+  @param[in]     x  Scaled input value in radians
+  @return        cos(x)
+
+  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q31_t arm_cos_q31(
+  q31_t x)
+{
+  q31_t cosVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q31_t a, b;                                    /* Two nearest output values */
+  q31_t fract;                                   /* Temporary values for fractional values */
+
+  /* add 0.25 (pi/2) to read sine table */
+  x = (uint32_t)x + 0x20000000;
+  if (x < 0)
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint32_t)x + 0x80000000;
+  }
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q31[index];
+  b = sinTable_q31[index+1];
+
+  /* Linear interpolation process */
+  cosVal = (q63_t) (0x80000000 - fract) * a >> 32;
+  cosVal = (q31_t) ((((q63_t) cosVal << 32) + ((q63_t) fract * b)) >> 32);
+
+  /* Return output value */
+  return (cosVal << 1);
+}
+
+/**
+  @} end of cos group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q15.c
new file mode 100755
index 00000000..57dd806c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q15.c
@@ -0,0 +1,110 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_q15.c
+ * Description:  Fast cosine calculation for Q15 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+#include <stdlib.h>
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @defgroup divide Fixed point division
+
+ */
+
+/**
+  @addtogroup divide
+  @{
+ */
+
+/**
+  @brief         Fixed point division
+  @param[in]     numerator    Numerator
+  @param[in]     denominator  Denominator
+  @param[out]    quotient     Quotient value normalized between -1.0 and 1.0
+  @param[out]    shift        Shift left value to get the unnormalized quotient
+  @return        error status
+
+  When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced
+  to the saturated negative or positive value.
+ */
+
+arm_status arm_divide_q15(q15_t numerator,
+  q15_t denominator,
+  q15_t *quotient,
+  int16_t *shift)
+{
+  int16_t sign=0;
+  q31_t temp;
+  int16_t shiftForNormalizing;
+
+  *shift = 0;
+
+  sign = (numerator>>15) ^ (denominator>>15);
+
+  if (denominator == 0)
+  {
+     if (sign)
+     {
+        *quotient = 0x8000;
+     }
+     else
+     {
+        *quotient = 0x7FFF;
+     }
+     return(ARM_MATH_NANINF);
+  }
+
+  numerator = abs(numerator);
+  denominator = abs(denominator);
+  
+  temp = ((q31_t)numerator << 15) / ((q31_t)denominator);
+
+  shiftForNormalizing= 17 - __CLZ(temp);
+  if (shiftForNormalizing > 0)
+  {
+     *shift = shiftForNormalizing;
+     temp = temp >> shiftForNormalizing;
+  }
+
+  if (sign)
+  {
+    temp = -temp;
+  }
+
+  *quotient=temp;
+
+  return(ARM_MATH_SUCCESS);
+}
+
+/**
+  @} end of divide group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q31.c
new file mode 100755
index 00000000..846d968c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_divide_q31.c
@@ -0,0 +1,110 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cos_q31.c
+ * Description:  Fast cosine calculation for Q31 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+#include <stdlib.h>
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @defgroup divide Fixed point division
+
+ */
+
+/**
+  @addtogroup divide
+  @{
+ */
+
+/**
+  @brief         Fixed point division
+  @param[in]     numerator    Numerator
+  @param[in]     denominator  Denominator
+  @param[out]    quotient     Quotient value normalized between -1.0 and 1.0
+  @param[out]    shift        Shift left value to get the unnormalized quotient
+  @return        error status
+
+  When dividing by 0, an error ARM_MATH_NANINF is returned. And the quotient is forced
+  to the saturated negative or positive value.
+ */
+
+arm_status arm_divide_q31(q31_t numerator,
+  q31_t denominator,
+  q31_t *quotient,
+  int16_t *shift)
+{
+  int16_t sign=0;
+  q63_t temp;
+  int16_t shiftForNormalizing;
+
+  *shift = 0;
+
+  sign = (numerator>>31) ^ (denominator>>31);
+
+  if (denominator == 0)
+  {
+     if (sign)
+     {
+        *quotient = 0x80000000;
+     }
+     else
+     {
+        *quotient = 0x7FFFFFFF;
+     }
+     return(ARM_MATH_NANINF);
+  }
+
+  numerator = abs(numerator);
+  denominator = abs(denominator);
+
+  temp = ((q63_t)numerator << 31) / ((q63_t)denominator);
+
+  shiftForNormalizing= 32 - __CLZ(temp >> 31);
+  if (shiftForNormalizing > 0)
+  {
+     *shift = shiftForNormalizing;
+     temp = temp >> shiftForNormalizing;
+  }
+
+  if (sign)
+  {
+    temp = -temp;
+  }
+
+  *quotient=(q31_t)temp;
+
+  return(ARM_MATH_SUCCESS);
+}
+
+/**
+  @} end of divide group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
index 674765ed..2fcd6bb1 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_f32.c
@@ -1,122 +1,122 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sin_f32.c
- * Description:  Fast sine calculation for floating-point values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @defgroup sin Sine
-
-  Computes the trigonometric sine function using a combination of table lookup
-  and linear interpolation.  There are separate functions for
-  Q15, Q31, and floating-point data types.
-  The input to the floating-point version is in radians while the
-  fixed-point Q15 and Q31 have a scaled input with the range
-  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
-  value of 2*pi wraps around to 0.
-
-  The implementation is based on table lookup using 256 values together with linear interpolation.
-  The steps used are:
-   -# Calculation of the nearest integer table index
-   -# Compute the fractional portion (fract) of the table index.
-   -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
-
-  where
-  <pre>
-     b = Table[index];
-     c = Table[index+1];
-  </pre>
- */
-
-/**
-  @addtogroup sin
-  @{
- */
-
-/**
-  @brief         Fast approximation to the trigonometric sine function for floating-point data.
-  @param[in]     x  input value in radians.
-  @return        sin(x)
- */
-
-float32_t arm_sin_f32(
-  float32_t x)
-{
-  float32_t sinVal, fract, in;                   /* Temporary input, output variables */
-  uint16_t index;                                /* Index variable */
-  float32_t a, b;                                /* Two nearest output values */
-  int32_t n;
-  float32_t findex;
-
-  /* input x is in radians */
-  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */
-  in = x * 0.159154943092f;
-
-  /* Calculation of floor value of input */
-  n = (int32_t) in;
-
-  /* Make negative values towards -infinity */
-  if (in < 0.0f)
-  {
-    n--;
-  }
-
-  /* Map input value to [0 1] */
-  in = in - (float32_t) n;
-
-  /* Calculation of index of the table */
-  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
-  index = (uint16_t)findex;
-
-  /* when "in" is exactly 1, we need to rotate the index down to 0 */
-  if (index >= FAST_MATH_TABLE_SIZE) {
-    index = 0;
-    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
-  }
-
-  /* fractional value calculation */
-  fract = findex - (float32_t) index;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_f32[index];
-  b = sinTable_f32[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (1.0f - fract) * a + fract * b;
-
-  /* Return output value */
-  return (sinVal);
-}
-
-/**
-  @} end of sin group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_f32.c
+ * Description:  Fast sine calculation for floating-point values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @defgroup sin Sine
+
+  Computes the trigonometric sine function using a combination of table lookup
+  and linear interpolation.  There are separate functions for
+  Q15, Q31, and floating-point data types.
+  The input to the floating-point version is in radians while the
+  fixed-point Q15 and Q31 have a scaled input with the range
+  [0 +0.9999] mapping to [0 2*pi).  The fixed-point range is chosen so that a
+  value of 2*pi wraps around to 0.
+
+  The implementation is based on table lookup using 512 values together with linear interpolation.
+  The steps used are:
+   -# Calculation of the nearest integer table index
+   -# Compute the fractional portion (fract) of the table index.
+   -# The final result equals <code>(1.0f-fract)*a + fract*b;</code>
+
+  where
+  <pre>
+     b = Table[index];
+     c = Table[index+1];
+  </pre>
+ */
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for floating-point data.
+  @param[in]     x  input value in radians.
+  @return        sin(x)
+ */
+
+float32_t arm_sin_f32(
+  float32_t x)
+{
+  float32_t sinVal, fract, in;                   /* Temporary input, output variables */
+  uint16_t index;                                /* Index variable */
+  float32_t a, b;                                /* Two nearest output values */
+  int32_t n;
+  float32_t findex;
+
+  /* input x is in radians */
+  /* Scale input to [0 1] range from [0 2*PI] , divide input by 2*pi */
+  in = x * 0.159154943092f;
+
+  /* Calculation of floor value of input */
+  n = (int32_t) in;
+
+  /* Make negative values towards -infinity */
+  if (in < 0.0f)
+  {
+    n--;
+  }
+
+  /* Map input value to [0 1] */
+  in = in - (float32_t) n;
+
+  /* Calculation of index of the table */
+  findex = (float32_t)FAST_MATH_TABLE_SIZE * in;
+  index = (uint16_t)findex;
+
+  /* when "in" is exactly 1, we need to rotate the index down to 0 */
+  if (index >= FAST_MATH_TABLE_SIZE) {
+    index = 0;
+    findex -= (float32_t)FAST_MATH_TABLE_SIZE;
+  }
+
+  /* fractional value calculation */
+  fract = findex - (float32_t) index;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_f32[index];
+  b = sinTable_f32[index+1];
+
+  /* Linear interpolation process */
+  sinVal = (1.0f - fract) * a + fract * b;
+
+  /* Return output value */
+  return (sinVal);
+}
+
+/**
+  @} end of sin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
index edc8b38a..81f0d627 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q15.c
@@ -1,77 +1,83 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sin_q15.c
- * Description:  Fast sine calculation for Q15 values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @addtogroup sin
-  @{
- */
-
-/**
-  @brief         Fast approximation to the trigonometric sine function for Q15 data.
-  @param[in]     x  Scaled input value in radians
-  @return        sin(x)
-
-  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
- */
-
-q15_t arm_sin_q15(
-  q15_t x)
-{
-  q15_t sinVal;                                  /* Temporary input, output variables */
-  int32_t index;                                 /* Index variable */
-  q15_t a, b;                                    /* Two nearest output values */
-  q15_t fract;                                   /* Temporary values for fractional values */
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q15[index];
-  b = sinTable_q15[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (q31_t) (0x8000 - fract) * a >> 16;
-  sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16);
-
-  /* Return output value */
-  return (sinVal << 1);
-}
-
-/**
-  @} end of sin group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_q15.c
+ * Description:  Fast sine calculation for Q15 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for Q15 data.
+  @param[in]     x  Scaled input value in radians
+  @return        sin(x)
+
+  The Q15 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q15_t arm_sin_q15(
+  q15_t x)
+{
+  q15_t sinVal;                                  /* Temporary input, output variables */
+  int32_t index;                                 /* Index variable */
+  q15_t a, b;                                    /* Two nearest output values */
+  q15_t fract;                                   /* Temporary values for fractional values */
+
+  
+  if (x < 0)
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint16_t)x + 0x8000;
+  }
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q15_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q15_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q15[index];
+  b = sinTable_q15[index+1];
+
+  /* Linear interpolation process */
+  sinVal = (q31_t) (0x8000 - fract) * a >> 16;
+  sinVal = (q15_t) ((((q31_t) sinVal << 16) + ((q31_t) fract * b)) >> 16);
+
+  /* Return output value */
+  return (sinVal << 1);
+}
+
+/**
+  @} end of sin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
index 849cc11a..06262fd5 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sin_q31.c
@@ -1,77 +1,82 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sin_q31.c
- * Description:  Fast sine calculation for Q31 values
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @addtogroup sin
-  @{
- */
-
-/**
-  @brief         Fast approximation to the trigonometric sine function for Q31 data.
-  @param[in]     x  Scaled input value in radians
-  @return        sin(x)
-
-  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
- */
-
-q31_t arm_sin_q31(
-  q31_t x)
-{
-  q31_t sinVal;                                  /* Temporary variables for input, output */
-  int32_t index;                                 /* Index variable */
-  q31_t a, b;                                    /* Two nearest output values */
-  q31_t fract;                                   /* Temporary values for fractional values */
-
-  /* Calculate the nearest index */
-  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
-
-  /* Calculation of fractional value */
-  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
-
-  /* Read two nearest values of input value from the sin table */
-  a = sinTable_q31[index];
-  b = sinTable_q31[index+1];
-
-  /* Linear interpolation process */
-  sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
-  sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
-
-  /* Return output value */
-  return (sinVal << 1);
-}
-
-/**
-  @} end of sin group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sin_q31.c
+ * Description:  Fast sine calculation for Q31 values
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup sin
+  @{
+ */
+
+/**
+  @brief         Fast approximation to the trigonometric sine function for Q31 data.
+  @param[in]     x  Scaled input value in radians
+  @return        sin(x)
+
+  The Q31 input value is in the range [0 +0.9999] and is mapped to a radian value in the range [0 2*PI).
+ */
+
+q31_t arm_sin_q31(
+  q31_t x)
+{
+  q31_t sinVal;                                  /* Temporary variables for input, output */
+  int32_t index;                                 /* Index variable */
+  q31_t a, b;                                    /* Two nearest output values */
+  q31_t fract;                                   /* Temporary values for fractional values */
+
+  if (x < 0)
+  { /* convert negative numbers to corresponding positive ones */
+    x = (uint32_t)x + 0x80000000;
+  }
+
+  /* Calculate the nearest index */
+  index = (uint32_t)x >> FAST_MATH_Q31_SHIFT;
+
+  /* Calculation of fractional value */
+  fract = (x - (index << FAST_MATH_Q31_SHIFT)) << 9;
+
+  /* Read two nearest values of input value from the sin table */
+  a = sinTable_q31[index];
+  b = sinTable_q31[index+1];
+
+  /* Linear interpolation process */
+  sinVal = (q63_t) (0x80000000 - fract) * a >> 32;
+  sinVal = (q31_t) ((((q63_t) sinVal << 32) + ((q63_t) fract * b)) >> 32);
+
+  /* Return output value */
+  return (sinVal << 1);
+}
+
+/**
+  @} end of sin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
index 1dc7bc4d..defeebe8 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q15.c
@@ -1,144 +1,123 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sqrt_q15.c
- * Description:  Q15 square root function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @addtogroup SQRT
-  @{
- */
-
-/**
-  @brief         Q15 square root function.
-  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
-  @param[out]    pOut  points to square root of input value
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : input value is positive
-                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
- */
-
-arm_status arm_sqrt_q15(
-  q15_t in,
-  q15_t * pOut)
-{
-  q31_t bits_val1;
-  q15_t number, temp1, var1, signBits1, half;
-  float32_t temp_float1;
-  union
-  {
-    q31_t fracval;
-    float32_t floatval;
-  } tempconv;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if (number > 0)
-  {
-    signBits1 = __CLZ(number) - 17;
-
-    /* Shift by the number of signBits1 */
-    if ((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /* Convert to float */
-    temp_float1 = number * 3.051757812500000e-005f;
-    /* Store as integer */
-    tempconv.floatval = temp_float1;
-    bits_val1 = tempconv.fracval;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
-    /* Store as float */
-    tempconv.fracval = bits_val1;
-    temp_float1 = tempconv.floatval;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 16384);
-
-    /* 1st iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 2nd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-    /* 3rd iteration */
-    var1 = ((q15_t) ((q31_t) var1 * (0x3000 -
-                                     ((q15_t)
-                                      ((((q15_t)
-                                         (((q31_t) var1 * var1) >> 15)) *
-                                        (q31_t) half) >> 15))) >> 15)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q15_t) (((q31_t) temp1 * var1) >> 15)) << 1;
-
-    /* Shift the output down accordingly */
-    if ((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**
-  @} end of SQRT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sqrt_q15.c
+ * Description:  Q15 square root function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup SQRT
+  @{
+ */
+
+/**
+  @brief         Q15 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x0000 to 0x7FFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+
+#define Q12QUARTER 0x2000
+arm_status arm_sqrt_q15(
+  q15_t in,
+  q15_t * pOut)
+{
+  q15_t number, var1, signBits1,temp;
+
+  number = in;
+
+  /* If the input is a positive number then compute the signBits. */
+  if (number > 0)
+  {
+    signBits1 = __CLZ(number) - 17;
+
+    /* Shift by the number of signBits1 */
+    if ((signBits1 % 2) == 0)
+    {
+      number = number << signBits1;
+    }
+    else
+    {
+      number = number << (signBits1 - 1);
+    }
+    /* Start value for 1/sqrt(x) for the Newton iteration */
+    var1 = sqrt_initial_lut_q15[(number>> 11) - (Q12QUARTER >> 11)];
+
+    /* 0.5 var1 * (3 - number * var1 * var1) */
+    /* 1st iteration */
+
+   temp = ((q31_t) var1 * var1) >> 12;
+   temp = ((q31_t) number * temp) >> 15;
+   temp = 0x3000 - temp; 
+   var1 = ((q31_t) var1 * temp) >> 13;
+
+   temp = ((q31_t) var1 * var1) >> 12;
+   temp = ((q31_t) number * temp) >> 15;
+   temp = 0x3000 - temp; 
+   var1 = ((q31_t) var1 * temp) >> 13;
+
+   temp = ((q31_t) var1 * var1) >> 12;
+   temp = ((q31_t) number * temp) >> 15;
+   temp = 0x3000 - temp; 
+   var1 = ((q31_t) var1 * temp) >> 13;
+
+    /* Multiply the inverse square root with the original value */
+
+    var1 = ((q15_t) (((q31_t) number * var1) >> 12));
+
+    /* Shift the output down accordingly */
+    if ((signBits1 % 2) == 0)
+    {
+      var1 = var1 >> (signBits1 / 2);
+    }
+    else
+    {
+      var1 = var1 >> ((signBits1 - 1) / 2);
+    }
+    *pOut = var1;
+
+
+    return (ARM_MATH_SUCCESS);
+  }
+  /* If the number is a negative number then store zero as its square root value */
+  else
+  {
+    *pOut = 0;
+
+    return (ARM_MATH_ARGUMENT_ERROR);
+  }
+}
+
+/**
+  @} end of SQRT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
index 9f2a731f..8747670d 100644
--- a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_sqrt_q31.c
@@ -1,144 +1,126 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_sqrt_q31.c
- * Description:  Q31 square root function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupFastMath
- */
-
-/**
-  @addtogroup SQRT
-  @{
- */
-
-/**
-  @brief         Q31 square root function.
-  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
-  @param[out]    pOut  points to square root of input value
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : input value is positive
-                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
- */
-
-arm_status arm_sqrt_q31(
-  q31_t in,
-  q31_t * pOut)
-{
-  q31_t bits_val1;
-  q31_t number, temp1, var1, signBits1, half;
-  float32_t temp_float1;
-  union
-  {
-    q31_t fracval;
-    float32_t floatval;
-  } tempconv;
-
-  number = in;
-
-  /* If the input is a positive number then compute the signBits. */
-  if (number > 0)
-  {
-    signBits1 = __CLZ(number) - 1;
-
-    /* Shift by the number of signBits1 */
-    if ((signBits1 % 2) == 0)
-    {
-      number = number << signBits1;
-    }
-    else
-    {
-      number = number << (signBits1 - 1);
-    }
-
-    /* Calculate half value of the number */
-    half = number >> 1;
-    /* Store the number for later use */
-    temp1 = number;
-
-    /* Convert to float */
-    temp_float1 = number * 4.6566128731e-010f;
-    /* Store as integer */
-    tempconv.floatval = temp_float1;
-    bits_val1 = tempconv.fracval;
-    /* Subtract the shifted value from the magic number to give intial guess */
-    bits_val1 = 0x5f3759df - (bits_val1 >> 1);  /* gives initial guess */
-    /* Store as float */
-    tempconv.fracval = bits_val1;
-    temp_float1 = tempconv.floatval;
-    /* Convert to integer format */
-    var1 = (q31_t) (temp_float1 * 1073741824);
-
-    /* 1st iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 2nd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-    /* 3rd iteration */
-    var1 = ((q31_t) ((q63_t) var1 * (0x30000000 -
-                                     ((q31_t)
-                                      ((((q31_t)
-                                         (((q63_t) var1 * var1) >> 31)) *
-                                        (q63_t) half) >> 31))) >> 31)) << 2;
-
-    /* Multiply the inverse square root with the original value */
-    var1 = ((q31_t) (((q63_t) temp1 * var1) >> 31)) << 1;
-
-    /* Shift the output down accordingly */
-    if ((signBits1 % 2) == 0)
-    {
-      var1 = var1 >> (signBits1 / 2);
-    }
-    else
-    {
-      var1 = var1 >> ((signBits1 - 1) / 2);
-    }
-    *pOut = var1;
-
-    return (ARM_MATH_SUCCESS);
-  }
-  /* If the number is a negative number then store zero as its square root value */
-  else
-  {
-    *pOut = 0;
-
-    return (ARM_MATH_ARGUMENT_ERROR);
-  }
-}
-
-/**
-  @} end of SQRT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sqrt_q31.c
+ * Description:  Q31 square root function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup SQRT
+  @{
+ */
+
+/**
+  @brief         Q31 square root function.
+  @param[in]     in    input value.  The range of the input value is [0 +1) or 0x00000000 to 0x7FFFFFFF
+  @param[out]    pOut  points to square root of input value
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : input value is positive
+                   - \ref ARM_MATH_ARGUMENT_ERROR : input value is negative; *pOut is set to 0
+ */
+#define Q28QUARTER 0x20000000 
+
+arm_status arm_sqrt_q31(
+  q31_t in,
+  q31_t * pOut)
+{
+  q31_t number, var1, signBits1 ,temp;
+ 
+  number = in;
+
+  /* If the input is a positive number then compute the signBits. */
+  if (number > 0)
+  {
+    signBits1 = __CLZ(number) - 1;
+
+    /* Shift by the number of signBits1 */
+    if ((signBits1 % 2) == 0)
+    {
+      number = number << signBits1;
+    }
+    else
+    {
+      number = number << (signBits1 - 1);
+    }
+
+    /* Start value for 1/sqrt(x) for the Newton iteration */
+    var1 = sqrt_initial_lut_q31[(number>> 26) - (Q28QUARTER >> 26)];
+
+    /* 0.5 var1 * (3 - number * var1 * var1) */
+
+    /* 1st iteration */
+
+    temp = ((q63_t) var1 * var1) >> 28;
+    temp = ((q63_t) number * temp) >> 31;
+    temp = 0x30000000 - temp; 
+    var1 = ((q63_t) var1 * temp) >> 29;
+
+    
+    /* 2nd iteration */
+    temp = ((q63_t) var1 * var1) >> 28;
+    temp = ((q63_t) number * temp) >> 31;
+    temp = 0x30000000 - temp; 
+    var1 = ((q63_t) var1 * temp) >> 29;
+
+    /* 3nd iteration */
+    temp = ((q63_t) var1 * var1) >> 28;
+    temp = ((q63_t) number * temp) >> 31;
+    temp = 0x30000000 - temp; 
+    var1 = ((q63_t) var1 * temp) >> 29;
+
+    /* Multiply the inverse square root with the original value */
+    var1 = ((q31_t) (((q63_t) number * var1) >> 28));
+
+    /* Shift the output down accordingly */
+    if ((signBits1 % 2) == 0)
+    {
+      var1 = var1 >> (signBits1 / 2);
+    }
+    else
+    {
+      var1 = var1 >> ((signBits1 - 1) / 2);
+    }
+    *pOut = var1;
+
+    return (ARM_MATH_SUCCESS);
+  }
+  /* If the number is a negative number then store zero as its square root value */
+  else
+  {
+    *pOut = 0;
+
+    return (ARM_MATH_ARGUMENT_ERROR);
+  }
+}
+
+/**
+  @} end of SQRT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f16.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f16.c
new file mode 100755
index 00000000..dd7c06ee
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f16.c
@@ -0,0 +1,82 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_f16.c
+ * Description:  Fast vectorized log
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include "arm_common_tables.h"
+
+#include "arm_vec_math_f16.h"
+
+
+void arm_vexp_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt; 
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+   f16x8_t src;
+   f16x8_t dst;
+
+   blkCnt = blockSize >> 3;
+
+   while (blkCnt > 0U)
+   {
+      src = vld1q(pSrc);
+      dst = vexpq_f16(src);
+      vst1q(pDst, dst);
+
+      pSrc += 8;
+      pDst += 8;
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+
+   blkCnt = blockSize & 7;
+#else
+   blkCnt = blockSize;
+#endif
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+  
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = (_Float16)expf((float32_t)*pSrc++);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c
new file mode 100755
index 00000000..43b2a86d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f32.c
@@ -0,0 +1,97 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_f32.c
+ * Description:  Fast vectorized log
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM) || defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_vec_math.h"
+#endif
+
+void arm_vexp_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt; 
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+   f32x4_t src;
+   f32x4_t dst;
+
+   blkCnt = blockSize >> 2;
+
+   while (blkCnt > 0U)
+   {
+      src = vld1q(pSrc);
+      dst = vexpq_f32(src);
+      vst1q(pDst, dst);
+
+      pSrc += 4;
+      pDst += 4;
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+
+   blkCnt = blockSize & 3;
+#else
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+   f32x4_t src;
+   f32x4_t dst;
+
+   blkCnt = blockSize >> 2;
+
+   while (blkCnt > 0U)
+   {
+      src = vld1q_f32(pSrc);
+      dst = vexpq_f32(src);
+      vst1q_f32(pDst, dst);
+
+      pSrc += 4;
+      pDst += 4;
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+
+   blkCnt = blockSize & 3;
+#else
+   blkCnt = blockSize;
+#endif
+#endif
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+  
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = expf(*pSrc++);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f64.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f64.c
new file mode 100644
index 00000000..76f80ff5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vexp_f64.c
@@ -0,0 +1,51 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_f64.c
+ * Description:  Fast vectorized log
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+void arm_vexp_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt; 
+
+   blkCnt = blockSize;
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+  
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = exp(*pSrc++);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vinverse_f16.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vinverse_f16.c
new file mode 100755
index 00000000..1067d02f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vinverse_f16.c
@@ -0,0 +1,79 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vinverse_f16.c
+ * Description:  Fast vectorized inverse
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include "arm_common_tables.h"
+
+#include "arm_vec_math_f16.h"
+
+void arm_vinverse_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt; 
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+   f16x8_t src;
+   f16x8_t dst;
+
+   blkCnt = blockSize >> 3;
+
+   while (blkCnt > 0U)
+   {
+      src = vld1q(pSrc);
+      dst = vrecip_hiprec_f16(src);
+      vst1q(pDst, dst);
+
+      pSrc += 8;
+      pDst += 8;
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+
+   blkCnt = blockSize & 7;
+#else
+   blkCnt = blockSize;
+#endif
+
+   while (blkCnt > 0U)
+   {
+      
+      *pDst++ = 1.0f16 / (_Float16)*pSrc++;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f16.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f16.c
new file mode 100755
index 00000000..0821d5ab
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f16.c
@@ -0,0 +1,222 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_f16.c
+ * Description:  Fast vectorized log
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions_f16.h"
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/* Degree of the polynomial approximation */
+#define NB_DEG_LOGF16 3
+
+/*
+Related to the Log2 of the number of approximations.
+For instance, with 3 there are 1 + 2^3 polynomials
+*/
+#define NB_DIV_LOGF16 3
+
+/* Length of the LUT table */
+#define NB_LUT_LOGF16 (NB_DEG_LOGF16+1)*(1 + (1<<NB_DIV_LOGF16))
+
+
+/*
+
+LUT of polynomial approximations.
+
+Could be generated with:
+
+ClearAll[lut, coefs, nb, deg];
+nb = 3;
+deg = 3;
+lut = Table[
+   MiniMaxApproximation[
+     Log[x/2^nb + i], {x, {10^-6, 1.0/2^nb}, deg, 0},
+     MaxIterations -> 1000][[2, 1]], {i, 1, 2, (1.0/2^nb)}];
+coefs = Chop@Flatten[CoefficientList[lut, x]];
+
+*/
+static float16_t lut_logf16[NB_LUT_LOGF16]={
+   0,0.125,-0.00781197,0.00063974,0.117783,
+   0.111111,-0.00617212,0.000447935,0.223144,
+   0.1,-0.00499952,0.000327193,0.318454,0.0909091,
+   -0.00413191,0.000246234,0.405465,0.0833333,
+   -0.00347199,0.000189928,0.485508,0.0769231,
+   -0.00295841,0.00014956,0.559616,0.0714286,
+   -0.0025509,0.000119868,0.628609,0.0666667,
+   -0.00222213,0.0000975436,0.693147,
+   0.0625,-0.00195305,0.0000804357};
+
+
+float16_t logf16_scalar(float16_t x)
+{
+    int16_t i =  arm_typecast_s16_f16(x);
+
+    int32_t vecExpUnBiased = (i >> 10) - 15;
+    i = i - (vecExpUnBiased << 10);
+    float16_t vecTmpFlt1 = arm_typecast_f16_s16(i);
+
+    float16_t *lut;
+    int n;
+    float16_t tmp,v;
+
+    tmp = ((_Float16)vecTmpFlt1 - 1.0f16) * (1 << NB_DIV_LOGF16);
+    n = (int)floor((double)tmp);
+    v = (_Float16)tmp - (_Float16)n;
+
+    lut = lut_logf16 + n * (1+NB_DEG_LOGF16);
+
+    float16_t res = lut[NB_DEG_LOGF16-1];
+    for(int j=NB_DEG_LOGF16-2; j >=0 ; j--)
+    {
+       res = (_Float16)lut[j] + (_Float16)v * (_Float16)res;
+    }
+
+    res = (_Float16)res + 0.693147f16 * (_Float16)vecExpUnBiased;
+
+
+    return(res);
+}
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_common_tables.h"
+#include "arm_vec_math_f16.h"
+
+
+float16x8_t vlogq_lut_f16(float16x8_t vecIn)
+{
+    int16x8_t i =  vreinterpretq_s16_f16(vecIn);
+
+    int16x8_t vecExpUnBiased = vsubq_n_s16(vshrq_n_s16(i,10), 15);
+    i = vsubq_s16(i,vshlq_n_s16(vecExpUnBiased,10));
+    float16x8_t vecTmpFlt1 = vreinterpretq_f16_s16(i);
+
+
+    float16x8_t lutV;
+    int16x8_t n;
+    int16x8_t offset;
+
+    float16x8_t tmp,v,res;
+
+    tmp = vmulq_n_f16(vsubq_n_f16(vecTmpFlt1,1.0f16),(_Float16)(1 << NB_DIV_LOGF16));
+
+    n = vcvtq_s16_f16(tmp);
+    v = vsubq_f16(tmp,vcvtq_f16_s16(n));
+
+
+    offset = vmulq_n_s16(n,(1+NB_DEG_LOGF16));
+    offset = vaddq_n_s16(offset,NB_DEG_LOGF16-1);
+
+    res = vldrhq_gather_shifted_offset_f16(lut_logf16,(uint16x8_t)offset);
+    offset = vsubq_n_s16(offset,1);
+
+    for(int j=NB_DEG_LOGF16-2; j >=0 ; j--)
+    {
+       lutV = vldrhq_gather_shifted_offset_f16(lut_logf16,(uint16x8_t)offset);
+       res = vfmaq_f16(lutV,v,res);
+       offset = vsubq_n_s16(offset,1);
+
+    }
+
+    res = vfmaq_n_f16(res,vcvtq_f16_s16(vecExpUnBiased),0.693147f16);
+
+
+    return(res);
+
+}
+
+#endif
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup vlog
+  @{
+ */
+
+/**
+  @brief         Floating-point vector of log values.
+  @param[in]     pSrc       points to the input vector
+  @param[out]    pDst       points to the output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+
+
+void arm_vlog_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt;
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+   f16x8_t src;
+   f16x8_t dst;
+
+   blkCnt = blockSize >> 3;
+
+   while (blkCnt > 0U)
+   {
+      src = vld1q(pSrc);
+      dst = vlogq_lut_f16(src);
+      vst1q(pDst, dst);
+
+      pSrc += 8;
+      pDst += 8;
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+
+   blkCnt = blockSize & 7;
+#else
+   blkCnt = blockSize;
+#endif
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = logf16_scalar(*pSrc++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
+
+
+
+/**
+  @} end of vlog group
+ */
+
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c
new file mode 100755
index 00000000..888a11f3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f32.c
@@ -0,0 +1,119 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_f32.c
+ * Description:  Fast vectorized log
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+
+/**
+  @ingroup groupFastMath
+ */
+
+
+/**
+  @defgroup vlog Vector Log
+
+  Compute the log values of a vector of samples.
+
+ */
+
+/**
+  @addtogroup vlog
+  @{
+ */
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM) || defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_vec_math.h"
+#endif
+
+void arm_vlog_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt; 
+
+#if (defined(ARM_MATH_MVEF) || defined(ARM_MATH_HELIUM)) && !defined(ARM_MATH_AUTOVECTORIZE)
+   f32x4_t src;
+   f32x4_t dst;
+
+   blkCnt = blockSize >> 2;
+
+   while (blkCnt > 0U)
+   {
+      src = vld1q(pSrc);
+      dst = vlogq_f32(src);
+      vst1q(pDst, dst);
+
+      pSrc += 4;
+      pDst += 4;
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+
+   blkCnt = blockSize & 3;
+#else
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_NEON_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+   f32x4_t src;
+   f32x4_t dst;
+
+   blkCnt = blockSize >> 2;
+
+   while (blkCnt > 0U)
+   {
+      src = vld1q_f32(pSrc);
+      dst = vlogq_f32(src);
+      vst1q_f32(pDst, dst);
+
+      pSrc += 4;
+      pDst += 4;
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+
+   blkCnt = blockSize & 3;
+#else
+   blkCnt = blockSize;
+#endif
+#endif
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+  
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = logf(*pSrc++);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
+
+/**
+  @} end of vlog group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f64.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f64.c
new file mode 100644
index 00000000..a60fff69
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_f64.c
@@ -0,0 +1,51 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_f64.c
+ * Description:  Fast vectorized log
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+#include "arm_common_tables.h"
+
+void arm_vlog_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+   uint32_t blkCnt; 
+
+   blkCnt = blockSize;
+
+   while (blkCnt > 0U)
+   {
+      /* C = log(A) */
+  
+      /* Calculate log and store result in destination buffer. */
+      *pDst++ = log(*pSrc++);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+   }
+}
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q15.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q15.c
new file mode 100755
index 00000000..896988dc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q15.c
@@ -0,0 +1,264 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_q15
+ * Description:  Q15 vector log
+ *
+ * $Date:        19 July 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "dsp/fast_math_functions.h"
+
+
+#define LOG_Q15_ACCURACY 15
+
+/* Bit to represent the normalization factor
+   It is Ceiling[Log2[LOG_Q15_ACCURACY]] of the previous value.
+   The Log2 algorithm is assuming that the value x is
+   1 <= x < 2.
+
+   But input value could be as small a 2^-LOG_Q15_ACCURACY
+   which would give an integer part of -15.
+*/
+#define LOG_Q15_INTEGER_PART 4
+
+/* 2.0 in q14 */
+#define LOQ_Q15_THRESHOLD (1u << LOG_Q15_ACCURACY)
+
+/* HALF */
+#define LOQ_Q15_Q16_HALF LOQ_Q15_THRESHOLD
+#define LOQ_Q15_Q14_HALF (LOQ_Q15_Q16_HALF >> 2)
+
+
+/* 1.0 / Log2[Exp[1]] in q15 */
+#define LOG_Q15_INVLOG2EXP 0x58b9u
+
+
+/* Clay Turner algorithm */
+static uint16_t arm_scalar_log_q15(uint16_t src)
+{
+   int i;
+
+   int16_t c = __CLZ(src)-16;
+   int16_t normalization=0;
+
+   /* 0.5 in q11 */
+   uint16_t inc = LOQ_Q15_Q16_HALF >> (LOG_Q15_INTEGER_PART + 1);
+
+   /* Will compute y = log2(x) for 1 <= x < 2.0 */
+   uint16_t x;
+
+   /* q11 */
+   uint16_t y=0;
+
+   /* q11 */
+   int16_t tmp;
+
+
+   /* Normalize and convert to q14 format */
+   x = src;
+   if ((c-1) < 0)
+   {
+     x = x >> (1-c);
+   }
+   else
+   {
+     x = x << (c-1);
+   }
+   normalization = c;
+
+
+
+   /* Compute the Log2. Result is in q11 instead of q16
+      because we know 0 <= y < 1.0 but
+      we want a result allowing to do a
+      product on int16 rather than having to go
+      through int32
+   */
+   for(i = 0; i < LOG_Q15_ACCURACY ; i++)
+   {
+      x = (((int32_t)x*x)) >> (LOG_Q15_ACCURACY - 1);
+
+      if (x >= LOQ_Q15_THRESHOLD)
+      {
+         y += inc ;
+         x = x >> 1;
+      }
+      inc = inc >> 1;
+   }
+
+
+   /*
+      Convert the Log2 to Log and apply normalization.
+      We compute (y - normalisation) * (1 / Log2[e]).
+
+   */
+
+   /* q11 */
+   //tmp = y - ((int32_t)normalization << (LOG_Q15_ACCURACY + 1));
+   tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART));
+
+   /* q4.11 */
+   y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15;
+
+   return(y);
+
+}
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+
+q15x8_t vlogq_q15(q15x8_t src)
+{
+
+   int i;
+
+   int16x8_t c = vclzq_s16(src);
+   int16x8_t normalization = c;
+
+
+   /* 0.5 in q11 */
+   uint16_t inc  = LOQ_Q15_Q16_HALF >> (LOG_Q15_INTEGER_PART + 1);
+
+   /* Will compute y = log2(x) for 1 <= x < 2.0 */
+   uint16x8_t x;
+
+
+   /* q11 */
+   uint16x8_t y = vdupq_n_u16(0);
+
+
+   /* q11 */
+   int16x8_t vtmp;
+
+
+   mve_pred16_t p;
+
+   /* Normalize and convert to q14 format */
+
+
+   vtmp = vsubq_n_s16(c,1);
+   x = vshlq_u16((uint16x8_t)src,vtmp);
+
+
+   /* Compute the Log2. Result is in q11 instead of q16
+      because we know 0 <= y < 1.0 but
+      we want a result allowing to do a
+      product on int16 rather than having to go
+      through int32
+   */
+   for(i = 0; i < LOG_Q15_ACCURACY ; i++)
+   {
+      x = vmulhq_u16(x,x);
+      x = vshlq_n_u16(x,2);
+
+
+      p = vcmphiq_u16(x,vdupq_n_u16(LOQ_Q15_THRESHOLD));
+      y = vaddq_m_n_u16(y, y,inc,p);
+      x = vshrq_m_n_u16(x,x,1,p);
+
+      inc = inc >> 1;
+   }
+
+
+   /*
+      Convert the Log2 to Log and apply normalization.
+      We compute (y - normalisation) * (1 / Log2[e]).
+
+   */
+
+   /* q11 */
+   // tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART));
+   vtmp = vshlq_n_s16(normalization,LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART);
+   vtmp = vsubq_s16((int16x8_t)y,vtmp);
+
+
+
+   /* q4.11 */
+   // y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15;
+   vtmp = vqdmulhq_n_s16(vtmp,LOG_Q15_INVLOG2EXP);
+
+   return(vtmp);
+}
+#endif
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup vlog
+  @{
+ */
+
+/**
+  @brief         q15 vector of log values.
+  @param[in]     pSrc       points to the input vector in q15
+  @param[out]    pDst       points to the output vector in q4.11
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+ */
+
+void arm_vlog_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t  blkCnt;           /* loop counters */
+
+  #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+  q15x8_t src;
+  q15x8_t dst;
+
+  blkCnt = blockSize >> 3;
+
+  while (blkCnt > 0U)
+  {
+      src = vld1q(pSrc);
+      dst = vlogq_q15(src);
+      vst1q(pDst, dst);
+
+      pSrc += 8;
+      pDst += 8;
+      /* Decrement loop counter */
+      blkCnt--;
+  }
+
+  blkCnt = blockSize & 7;
+  #else
+  blkCnt = blockSize;
+  #endif
+
+  while (blkCnt > 0U)
+  {
+     *pDst++ = arm_scalar_log_q15(*pSrc++);
+
+     /* Decrement loop counter */
+     blkCnt--;
+  }
+}
+
+/**
+  @} end of vlog group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q31.c b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q31.c
new file mode 100755
index 00000000..00538594
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FastMathFunctions/arm_vlog_q31.c
@@ -0,0 +1,258 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_vlog_q31
+ * Description:  Q31 vector log
+ *
+ * $Date:        19 July 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/fast_math_functions.h"
+
+#define LOG_Q31_ACCURACY 31
+
+/* Bit to represent the normalization factor
+   It is Ceiling[Log2[LOG_Q31_ACCURACY]] of the previous value.
+   The Log2 algorithm is assuming that the value x is
+   1 <= x < 2.
+
+   But input value could be as small a 2^-LOG_Q31_ACCURACY
+   which would give an integer part of -31.
+*/
+#define LOG_Q31_INTEGER_PART 5
+
+/* 2.0 in Q30 */
+#define LOQ_Q31_THRESHOLD (1u << LOG_Q31_ACCURACY)
+
+/* HALF */
+#define LOQ_Q31_Q32_HALF LOQ_Q31_THRESHOLD
+#define LOQ_Q31_Q30_HALF (LOQ_Q31_Q32_HALF >> 2)
+
+
+/* 1.0 / Log2[Exp[1]] in Q31 */
+#define LOG_Q31_INVLOG2EXP 0x58b90bfbuL
+
+/* Clay Turner algorithm */
+static uint32_t arm_scalar_log_q31(uint32_t src)
+{
+   int32_t i;
+
+   int32_t c = __CLZ(src);
+   int32_t normalization=0;
+
+   /* 0.5 in q26 */
+   uint32_t inc = LOQ_Q31_Q32_HALF >> (LOG_Q31_INTEGER_PART + 1);
+
+   /* Will compute y = log2(x) for 1 <= x < 2.0 */
+   uint32_t x;
+
+   /* q26 */
+   uint32_t y=0;
+
+   /* q26 */
+   int32_t tmp;
+
+
+   /* Normalize and convert to q30 format */
+   x = src;
+   if ((c-1) < 0)
+   {
+     x = x >> (1-c);
+   }
+   else
+   {
+     x = x << (c-1);
+   }
+   normalization = c;
+
+   /* Compute the Log2. Result is in q26
+      because we know 0 <= y < 1.0 but
+      do not want to use q32 to allow
+      following computation with less instructions.
+   */
+   for(i = 0; i < LOG_Q31_ACCURACY ; i++)
+   {
+      x = ((int64_t)x*x)  >> (LOG_Q31_ACCURACY - 1);
+
+      if (x >= LOQ_Q31_THRESHOLD)
+      {
+         y += inc ;
+         x = x >> 1;
+      }
+      inc = inc >> 1;
+   }
+
+   /*
+      Convert the Log2 to Log and apply normalization.
+      We compute (y - normalisation) * (1 / Log2[e]).
+
+   */
+
+   /* q26 */
+   tmp = (int32_t)y - (normalization << (LOG_Q31_ACCURACY - LOG_Q31_INTEGER_PART));
+
+
+   /* q5.26 */
+   y = ((int64_t)tmp * LOG_Q31_INVLOG2EXP) >> 31;
+
+
+
+   return(y);
+
+}
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+
+q31x4_t vlogq_q31(q31x4_t src)
+{
+
+   int32_t i;
+
+   int32x4_t c = vclzq_s32(src);
+   int32x4_t normalization = c;
+
+
+   /* 0.5 in q11 */
+   uint32_t inc  = LOQ_Q31_Q32_HALF >> (LOG_Q31_INTEGER_PART + 1);
+
+   /* Will compute y = log2(x) for 1 <= x < 2.0 */
+   uint32x4_t x;
+
+
+   /* q11 */
+   uint32x4_t y = vdupq_n_u32(0);
+
+
+   /* q11 */
+   int32x4_t vtmp;
+
+
+   mve_pred16_t p;
+
+   /* Normalize and convert to q14 format */
+
+
+   vtmp = vsubq_n_s32(c,1);
+   x = vshlq_u32((uint32x4_t)src,vtmp);
+
+
+    /* Compute the Log2. Result is in Q26
+      because we know 0 <= y < 1.0 but
+      do not want to use Q32 to allow
+      following computation with less instructions.
+   */
+   for(i = 0; i < LOG_Q31_ACCURACY ; i++)
+   {
+      x = vmulhq_u32(x,x);
+      x = vshlq_n_u32(x,2);
+
+
+      p = vcmphiq_u32(x,vdupq_n_u32(LOQ_Q31_THRESHOLD));
+      y = vaddq_m_n_u32(y, y,inc,p);
+      x = vshrq_m_n_u32(x,x,1,p);
+
+      inc = inc >> 1;
+   }
+
+
+   /*
+      Convert the Log2 to Log and apply normalization.
+      We compute (y - normalisation) * (1 / Log2[e]).
+
+   */
+
+   /* q11 */
+   // tmp = (int16_t)y - (normalization << (LOG_Q15_ACCURACY - LOG_Q15_INTEGER_PART));
+   vtmp = vshlq_n_s32(normalization,LOG_Q31_ACCURACY - LOG_Q31_INTEGER_PART);
+   vtmp = vsubq_s32((int32x4_t)y,vtmp);
+
+
+
+   /* q4.11 */
+   // y = ((int32_t)tmp * LOG_Q15_INVLOG2EXP) >> 15;
+   vtmp = vqdmulhq_n_s32(vtmp,LOG_Q31_INVLOG2EXP);
+
+   return(vtmp);
+}
+#endif
+
+/**
+  @ingroup groupFastMath
+ */
+
+/**
+  @addtogroup vlog
+  @{
+ */
+
+/**
+  @brief         q31 vector of log values.
+  @param[in]     pSrc       points to the input vector in q31
+  @param[out]    pDst       points to the output vector q5.26
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+ */
+void arm_vlog_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t  blkCnt;           /* loop counters */
+
+  #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  q31x4_t src;
+  q31x4_t dst;
+
+  blkCnt = blockSize >> 2;
+
+  while (blkCnt > 0U)
+  {
+      src = vld1q(pSrc);
+      dst = vlogq_q31(src);
+      vst1q(pDst, dst);
+
+      pSrc += 4;
+      pDst += 4;
+      /* Decrement loop counter */
+      blkCnt--;
+  }
+
+  blkCnt = blockSize & 3;
+  #else
+  blkCnt = blockSize;
+  #endif
+
+  while (blkCnt > 0U)
+  {
+     *pDst++=arm_scalar_log_q31(*pSrc++);
+
+     blkCnt--;
+  }
+
+}
+
+/**
+  @} end of vlog group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
index aa2947a6..e1b26fd7 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctions.c
@@ -1,127 +1,139 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        FilteringFunctions.c
- * Description:  Combination of all filtering function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_biquad_cascade_df1_32x64_init_q31.c"
-#include "arm_biquad_cascade_df1_32x64_q31.c"
-#include "arm_biquad_cascade_df1_f32.c"
-#include "arm_biquad_cascade_df1_fast_q15.c"
-#include "arm_biquad_cascade_df1_fast_q31.c"
-#include "arm_biquad_cascade_df1_init_f32.c"
-#include "arm_biquad_cascade_df1_init_q15.c"
-#include "arm_biquad_cascade_df1_init_q31.c"
-#include "arm_biquad_cascade_df1_q15.c"
-#include "arm_biquad_cascade_df1_q31.c"
-#include "arm_biquad_cascade_df2T_f32.c"
-#include "arm_biquad_cascade_df2T_f64.c"
-#include "arm_biquad_cascade_df2T_init_f32.c"
-#include "arm_biquad_cascade_df2T_init_f64.c"
-#include "arm_biquad_cascade_stereo_df2T_f32.c"
-#include "arm_biquad_cascade_stereo_df2T_init_f32.c"
-#include "arm_conv_f32.c"
-#include "arm_conv_fast_opt_q15.c"
-#include "arm_conv_fast_q15.c"
-#include "arm_conv_fast_q31.c"
-#include "arm_conv_opt_q15.c"
-#include "arm_conv_opt_q7.c"
-#include "arm_conv_partial_f32.c"
-#include "arm_conv_partial_fast_opt_q15.c"
-#include "arm_conv_partial_fast_q15.c"
-#include "arm_conv_partial_fast_q31.c"
-#include "arm_conv_partial_opt_q15.c"
-#include "arm_conv_partial_opt_q7.c"
-#include "arm_conv_partial_q15.c"
-#include "arm_conv_partial_q31.c"
-#include "arm_conv_partial_q7.c"
-#include "arm_conv_q15.c"
-#include "arm_conv_q31.c"
-#include "arm_conv_q7.c"
-#include "arm_correlate_f32.c"
-#include "arm_correlate_fast_opt_q15.c"
-#include "arm_correlate_fast_q15.c"
-#include "arm_correlate_fast_q31.c"
-#include "arm_correlate_opt_q15.c"
-#include "arm_correlate_opt_q7.c"
-#include "arm_correlate_q15.c"
-#include "arm_correlate_q31.c"
-#include "arm_correlate_q7.c"
-#include "arm_fir_decimate_f32.c"
-#include "arm_fir_decimate_fast_q15.c"
-#include "arm_fir_decimate_fast_q31.c"
-#include "arm_fir_decimate_init_f32.c"
-#include "arm_fir_decimate_init_q15.c"
-#include "arm_fir_decimate_init_q31.c"
-#include "arm_fir_decimate_q15.c"
-#include "arm_fir_decimate_q31.c"
-#include "arm_fir_f32.c"
-#include "arm_fir_fast_q15.c"
-#include "arm_fir_fast_q31.c"
-#include "arm_fir_init_f32.c"
-#include "arm_fir_init_q15.c"
-#include "arm_fir_init_q31.c"
-#include "arm_fir_init_q7.c"
-#include "arm_fir_interpolate_f32.c"
-#include "arm_fir_interpolate_init_f32.c"
-#include "arm_fir_interpolate_init_q15.c"
-#include "arm_fir_interpolate_init_q31.c"
-#include "arm_fir_interpolate_q15.c"
-#include "arm_fir_interpolate_q31.c"
-#include "arm_fir_lattice_f32.c"
-#include "arm_fir_lattice_init_f32.c"
-#include "arm_fir_lattice_init_q15.c"
-#include "arm_fir_lattice_init_q31.c"
-#include "arm_fir_lattice_q15.c"
-#include "arm_fir_lattice_q31.c"
-#include "arm_fir_q15.c"
-#include "arm_fir_q31.c"
-#include "arm_fir_q7.c"
-#include "arm_fir_sparse_f32.c"
-#include "arm_fir_sparse_init_f32.c"
-#include "arm_fir_sparse_init_q15.c"
-#include "arm_fir_sparse_init_q31.c"
-#include "arm_fir_sparse_init_q7.c"
-#include "arm_fir_sparse_q15.c"
-#include "arm_fir_sparse_q31.c"
-#include "arm_fir_sparse_q7.c"
-#include "arm_iir_lattice_f32.c"
-#include "arm_iir_lattice_init_f32.c"
-#include "arm_iir_lattice_init_q15.c"
-#include "arm_iir_lattice_init_q31.c"
-#include "arm_iir_lattice_q15.c"
-#include "arm_iir_lattice_q31.c"
-#include "arm_lms_f32.c"
-#include "arm_lms_init_f32.c"
-#include "arm_lms_init_q15.c"
-#include "arm_lms_init_q31.c"
-#include "arm_lms_norm_f32.c"
-#include "arm_lms_norm_init_f32.c"
-#include "arm_lms_norm_init_q15.c"
-#include "arm_lms_norm_init_q31.c"
-#include "arm_lms_norm_q15.c"
-#include "arm_lms_norm_q31.c"
-#include "arm_lms_q15.c"
-#include "arm_lms_q31.c"
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FilteringFunctions.c
+ * Description:  Combination of all filtering function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_biquad_cascade_df1_32x64_init_q31.c"
+#include "arm_biquad_cascade_df1_32x64_q31.c"
+#include "arm_biquad_cascade_df1_f32.c"
+#include "arm_biquad_cascade_df1_fast_q15.c"
+#include "arm_biquad_cascade_df1_fast_q31.c"
+#include "arm_biquad_cascade_df1_init_f32.c"
+#include "arm_biquad_cascade_df1_init_q15.c"
+#include "arm_biquad_cascade_df1_init_q31.c"
+#include "arm_biquad_cascade_df1_q15.c"
+#include "arm_biquad_cascade_df1_q31.c"
+#include "arm_biquad_cascade_df2T_f32.c"
+#include "arm_biquad_cascade_df2T_f64.c"
+#include "arm_biquad_cascade_df2T_init_f32.c"
+#include "arm_biquad_cascade_df2T_init_f64.c"
+#include "arm_biquad_cascade_stereo_df2T_f32.c"
+#include "arm_biquad_cascade_stereo_df2T_init_f32.c"
+#include "arm_conv_f32.c"
+#include "arm_conv_fast_opt_q15.c"
+#include "arm_conv_fast_q15.c"
+#include "arm_conv_fast_q31.c"
+#include "arm_conv_opt_q15.c"
+#include "arm_conv_opt_q7.c"
+#include "arm_conv_partial_f32.c"
+#include "arm_conv_partial_fast_opt_q15.c"
+#include "arm_conv_partial_fast_q15.c"
+#include "arm_conv_partial_fast_q31.c"
+#include "arm_conv_partial_opt_q15.c"
+#include "arm_conv_partial_opt_q7.c"
+#include "arm_conv_partial_q15.c"
+#include "arm_conv_partial_q31.c"
+#include "arm_conv_partial_q7.c"
+#include "arm_conv_q15.c"
+#include "arm_conv_q31.c"
+#include "arm_conv_q7.c"
+#include "arm_correlate_f32.c"
+#include "arm_correlate_f64.c"
+#include "arm_correlate_fast_opt_q15.c"
+#include "arm_correlate_fast_q15.c"
+#include "arm_correlate_fast_q31.c"
+#include "arm_correlate_opt_q15.c"
+#include "arm_correlate_opt_q7.c"
+#include "arm_correlate_q15.c"
+#include "arm_correlate_q31.c"
+#include "arm_correlate_q7.c"
+#include "arm_fir_decimate_f32.c"
+#include "arm_fir_decimate_fast_q15.c"
+#include "arm_fir_decimate_fast_q31.c"
+#include "arm_fir_decimate_init_f32.c"
+#include "arm_fir_decimate_init_q15.c"
+#include "arm_fir_decimate_init_q31.c"
+#include "arm_fir_decimate_q15.c"
+#include "arm_fir_decimate_q31.c"
+#include "arm_fir_f32.c"
+#include "arm_fir_f64.c"
+#include "arm_fir_fast_q15.c"
+#include "arm_fir_fast_q31.c"
+#include "arm_fir_init_f32.c"
+#include "arm_fir_init_f64.c"
+#include "arm_fir_init_q15.c"
+#include "arm_fir_init_q31.c"
+#include "arm_fir_init_q7.c"
+#include "arm_fir_interpolate_f32.c"
+#include "arm_fir_interpolate_init_f32.c"
+#include "arm_fir_interpolate_init_q15.c"
+#include "arm_fir_interpolate_init_q31.c"
+#include "arm_fir_interpolate_q15.c"
+#include "arm_fir_interpolate_q31.c"
+#include "arm_fir_lattice_f32.c"
+#include "arm_fir_lattice_init_f32.c"
+#include "arm_fir_lattice_init_q15.c"
+#include "arm_fir_lattice_init_q31.c"
+#include "arm_fir_lattice_q15.c"
+#include "arm_fir_lattice_q31.c"
+#include "arm_fir_q15.c"
+#include "arm_fir_q31.c"
+#include "arm_fir_q7.c"
+#include "arm_fir_sparse_f32.c"
+#include "arm_fir_sparse_init_f32.c"
+#include "arm_fir_sparse_init_q15.c"
+#include "arm_fir_sparse_init_q31.c"
+#include "arm_fir_sparse_init_q7.c"
+#include "arm_fir_sparse_q15.c"
+#include "arm_fir_sparse_q31.c"
+#include "arm_fir_sparse_q7.c"
+#include "arm_iir_lattice_f32.c"
+#include "arm_iir_lattice_init_f32.c"
+#include "arm_iir_lattice_init_q15.c"
+#include "arm_iir_lattice_init_q31.c"
+#include "arm_iir_lattice_q15.c"
+#include "arm_iir_lattice_q31.c"
+#include "arm_lms_f32.c"
+#include "arm_lms_init_f32.c"
+#include "arm_lms_init_q15.c"
+#include "arm_lms_init_q31.c"
+#include "arm_lms_norm_f32.c"
+#include "arm_lms_norm_init_f32.c"
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
+#include "arm_lms_norm_init_q15.c"
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
+#include "arm_lms_norm_init_q31.c"
+#endif
+#endif
+#include "arm_lms_norm_q15.c"
+#include "arm_lms_norm_q31.c"
+#include "arm_lms_q15.c"
+#include "arm_lms_q31.c"
+
+#include "arm_levinson_durbin_f32.c"
+#include "arm_levinson_durbin_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c
new file mode 100755
index 00000000..759e4058
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/FilteringFunctionsF16.c
@@ -0,0 +1,36 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        FilteringFunctions.c
+ * Description:  Combination of all filtering function f16 source files.
+ *
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_fir_f16.c"
+#include "arm_fir_init_f16.c"
+#include "arm_biquad_cascade_df1_f16.c"
+#include "arm_biquad_cascade_df1_init_f16.c"
+#include "arm_biquad_cascade_df2T_f16.c"
+#include "arm_biquad_cascade_df2T_init_f16.c"
+#include "arm_biquad_cascade_stereo_df2T_f16.c"
+#include "arm_biquad_cascade_stereo_df2T_init_f16.c"
+#include "arm_correlate_f16.c"
+#include "arm_levinson_durbin_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
index 80e8f58e..565b494b 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_init_q31.c
@@ -1,94 +1,94 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_32x64_init_q31.c
- * Description:  High precision Q31 Biquad cascade filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1_32x64
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 Biquad cascade 32x64 filter.
-  @param[in,out] S           points to an instance of the high precision Q31 Biquad cascade filter structure
-  @param[in]     numStages    number of 2nd order stages in the filter
-  @param[in]     pCoeffs      points to the filter coefficients
-  @param[in]     pState       points to the state buffer
-  @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format
-  @return        none
-
-  @par           Coefficient and State Ordering
-                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
-  <pre>
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-  </pre>
-                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
-                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
-                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
-  @par
-                   The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
-                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
-                   The state variables are arranged in the state array as:
-  <pre>
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-  </pre>
-                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
-                   The state array has a total length of <code>4*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
- */
-
-void arm_biquad_cas_df1_32x64_init_q31(
-        arm_biquad_cas_df1_32x64_ins_q31 * S,
-        uint8_t numStages,
-  const q31_t * pCoeffs,
-        q63_t * pState,
-        uint8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q63_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of BiquadCascadeDF1_32x64 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_32x64_init_q31.c
+ * Description:  High precision Q31 Biquad cascade filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1_32x64
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 Biquad cascade 32x64 filter.
+  @param[in,out] S           points to an instance of the high precision Q31 Biquad cascade filter structure
+  @param[in]     numStages    number of 2nd order stages in the filter
+  @param[in]     pCoeffs      points to the filter coefficients
+  @param[in]     pState       points to the state buffer
+  @param[in]     postShift    Shift to be applied after the accumulator.  Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> points to state variables array and size of each state variable is 1.63 format.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the state array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cas_df1_32x64_init_q31(
+        arm_biquad_cas_df1_32x64_ins_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q63_t * pState,
+        uint8_t postShift)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign postShift to be applied to the output */
+  S->postShift = postShift;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q63_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF1_32x64 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
index e7e41ed7..2c8c911b 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_32x64_q31.c
@@ -1,458 +1,807 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_32x64_q31.c
- * Description:  High precision Q31 Biquad cascade filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
-
-  This function implements a high precision Biquad cascade filter which operates on
-  Q31 data values.  The filter coefficients are in 1.31 format and the state variables
-  are in 1.63 format.  The double precision state variables reduce quantization noise
-  in the filter and provide a cleaner output.
-  These filters are particularly useful when implementing filters in which the
-  singularities are close to the unit circle.  This is common for low pass or high
-  pass filters with very low cutoff frequencies.
-
-  The function operates on blocks of input and output data
-  and each call to the function processes <code>blockSize</code> samples through
-  the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays
-  containing <code>blockSize</code> Q31 values.
-
-  @par           Algorithm
-                   Each Biquad stage implements a second order filter using the difference equation:
-  <pre>
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-  </pre>
-                   A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
-                   \image html Biquad.gif "Single Biquad filter stage"
-                   Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-                   Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-                   Pay careful attention to the sign of the feedback coefficients.
-                   Some design tools use the difference equation
-  <pre>
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
-  </pre>
-                   In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-  @par
-                   Higher order filters are realized as a cascade of second order sections.
-                   <code>numStages</code> refers to the number of second order stages used.
-                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
-                   A 9th order filter would be realized with <code>numStages=5</code> second order stages
-                   with the coefficients for one of the stages configured as a first order filter
-                   (<code>b2=0</code> and <code>a2=0</code>).
-  @par
-                   The <code>pState</code> points to state variables array.
-                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision.
-                   The state variables are arranged in the array as:
-  <pre>
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-  </pre>
-  @par
-                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
-                   The state array has a total length of <code>4*numStages</code> values of data in 1.63 format.
-                   The state variables are updated after each block of data is processed, the coefficients are untouched.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-
-  @par           Init Function
-                   There is also an associated initialization function which performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
-
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Set the values in the state buffer to zeros before static initialization.
-                   For example, to statically initialize the filter instance structure use
-  <pre>
-      arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
-  </pre>
-                   where <code>numStages</code> is the number of Biquad stages in the filter;
-                   <code>pState</code> is the address of the state buffer;
-                   <code>pCoeffs</code> is the address of the coefficient buffer;
-                   <code>postShift</code> shift to be applied which is described in detail below.
-  @par           Fixed-Point Behavior
-                   Care must be taken while using Biquad Cascade 32x64 filter function.
-                   Following issues must be considered:
-                   - Scaling of coefficients
-                   - Filter gain
-                   - Overflow and saturation
-
-  @par
-                   Filter coefficients are represented as fractional values and
-                   restricted to lie in the range <code>[-1 +1)</code>.
-                   The processing function has an additional scaling parameter <code>postShift</code>
-                   which allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
-                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
-                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
-                   This essentially scales the filter coefficients by <code>2^postShift</code>.
-                   For example, to realize the coefficients
-  <pre>
-     {1.5, -0.8, 1.2, 1.6, -0.9}
-  </pre>
-                   set the Coefficient array to:
-  <pre>
-     {0.75, -0.4, 0.6, 0.8, -0.45}
-  </pre>
-                   and set <code>postShift=1</code>
-  @par
-                   The second thing to keep in mind is the gain through the filter.
-                   The frequency response of a Biquad filter is a function of its coefficients.
-                   It is possible for the gain through the filter to exceed 1.0 meaning that the
-                   filter increases the amplitude of certain frequencies.
-                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0
-                   and these are saturated or overflowed based on the implementation of the filter.
-                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0
-                   or the input signal must be scaled down so that the combination of input and filter are never overflowed.
-  @par
-                   The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
-                   This is described in the function specific documentation below.
- */
-
-/**
-  @addtogroup BiquadCascadeDF1_32x64
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 Biquad cascade 32x64 filter.
-  @param[in]     S         points to an instance of the high precision Q31 Biquad cascade filter
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process
-  @return        none
-
-  @par           Details
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clip.
-                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
-                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
-                   1.31 format by discarding the low 32 bits.
-  @par
-                   Two related functions are provided in the CMSIS DSP library.
-                   - \ref arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
-                   - \ref arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
- */
-
-void arm_biquad_cas_df1_32x64_q31(
-  const arm_biquad_cas_df1_32x64_ins_q31 * S,
-        q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        q31_t *pIn = pSrc;                             /* input pointer initialization */
-        q31_t *pOut = pDst;                            /* output pointer initialization */
-        q63_t *pState = S->pState;                     /* state pointer initialization */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* coeff pointer initialization */
-        q63_t acc;                                     /* accumulator */
-        q31_t Xn1, Xn2;                                /* Input Filter state variables */
-        q63_t Yn1, Yn2;                                /* Output Filter state variables */
-        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
-        q31_t Xn;                                      /* temporary input */
-        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
-        uint32_t sample, stage = S->numStages;         /* loop counters */
-        q31_t acc_l, acc_h;                            /* temporary output */
-        uint32_t uShift = ((uint32_t) S->postShift + 1U);
-        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = (q31_t) (pState[0]);
-    Xn2 = (q31_t) (pState[1]);
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* Variable acc hold output value that is being computed and stored in destination buffer
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    sample = blockSize >> 2U;
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn * b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 * b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 * b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut = acc_h;
-
-      /* Read the second input into Xn2, to reuse the value */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc +=  b1 * x[n-1] */
-      acc = (q63_t) Xn * b1;
-
-      /* acc =  b0 * x[n] */
-      acc += (q63_t) Xn2 * b0;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn1 * b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Read the third input into Xn1, to reuse the value */
-      Xn1 = *pIn++;
-
-      /* The result is converted to 1.31 */
-      /* Store the output in the destination buffer. */
-      *(pOut + 1U) = acc_h;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn1 * b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn2 * b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn * b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* The result is converted to 1.63, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 2U) = acc_h;
-
-      /* Read the fourth input into Xn, to reuse the value */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn * b0;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 * b1;
-
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 * b2;
-
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn2, a1);
-
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn1, a2);
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *(pOut + 3U) = acc_h;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* update output pointer */
-      pOut += 4U;
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    sample = blockSize & 0x3U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-
-      /* acc =  b0 * x[n] */
-      acc = (q63_t) Xn * b0;
-      /* acc +=  b1 * x[n-1] */
-      acc += (q63_t) Xn1 * b1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q63_t) Xn2 * b2;
-      /* acc +=  a1 * y[n-1] */
-      acc += mult32x64(Yn1, a1);
-      /* acc +=  a2 * y[n-2] */
-      acc += mult32x64(Yn2, a2);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-
-      /* The result is converted to 1.63, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store the output in the destination buffer in 1.31 format. */
-      *pOut++ = acc_h;
-      /* Yn1 = acc << shift; */
-
-      /* Store the output in the destination buffer in 1.31 format. */
-/*    *pOut++ = (q31_t) (acc >> (32 - shift));  */
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* The first stage output is given as input to the second stage. */
-    pIn = pDst;
-
-    /* Reset to destination buffer working pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = (q63_t) Xn1;
-    *pState++ = (q63_t) Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while (--stage);
-
-}
-
-/**
-  @} end of BiquadCascadeDF1_32x64 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_32x64_q31.c
+ * Description:  High precision Q31 Biquad cascade filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup BiquadCascadeDF1_32x64 High Precision Q31 Biquad Cascade Filter
+
+  This function implements a high precision Biquad cascade filter which operates on
+  Q31 data values.  The filter coefficients are in 1.31 format and the state variables
+  are in 1.63 format.  The double precision state variables reduce quantization noise
+  in the filter and provide a cleaner output.
+  These filters are particularly useful when implementing filters in which the
+  singularities are close to the unit circle.  This is common for low pass or high
+  pass filters with very low cutoff frequencies.
+
+  The function operates on blocks of input and output data
+  and each call to the function processes <code>blockSize</code> samples through
+  the filter. <code>pSrc</code> and <code>pDst</code> points to input and output arrays
+  containing <code>blockSize</code> Q31 values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+  </pre>
+                   A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+                   \image html Biquad.gif "Single Biquad filter stage"
+                   Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+                   Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+                   Pay careful attention to the sign of the feedback coefficients.
+                   Some design tools use the difference equation
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+  </pre>
+                   In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   <code>numStages</code> refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+                   A 9th order filter would be realized with <code>numStages=5</code> second order stages
+                   with the coefficients for one of the stages configured as a first order filter
+                   (<code>b2=0</code> and <code>a2=0</code>).
+  @par
+                   The <code>pState</code> points to state variables array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code> and each state variable in 1.63 format to improve precision.
+                   The state variables are arranged in the array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+  @par
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values of data in 1.63 format.
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+  @par           Init Function
+                   There is also an associated initialization function which performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, postShift, pState. Also set all of the values in pState to zero.
+
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   For example, to statically initialize the filter instance structure use
+  <pre>
+      arm_biquad_cas_df1_32x64_ins_q31 S1 = {numStages, pState, pCoeffs, postShift};
+  </pre>
+                   where <code>numStages</code> is the number of Biquad stages in the filter;
+                   <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>postShift</code> shift to be applied which is described in detail below.
+  @par           Fixed-Point Behavior
+                   Care must be taken while using Biquad Cascade 32x64 filter function.
+                   Following issues must be considered:
+                   - Scaling of coefficients
+                   - Filter gain
+                   - Overflow and saturation
+
+  @par
+                   Filter coefficients are represented as fractional values and
+                   restricted to lie in the range <code>[-1 +1)</code>.
+                   The processing function has an additional scaling parameter <code>postShift</code>
+                   which allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+                   This essentially scales the filter coefficients by <code>2^postShift</code>.
+                   For example, to realize the coefficients
+  <pre>
+     {1.5, -0.8, 1.2, 1.6, -0.9}
+  </pre>
+                   set the Coefficient array to:
+  <pre>
+     {0.75, -0.4, 0.6, 0.8, -0.45}
+  </pre>
+                   and set <code>postShift=1</code>
+  @par
+                   The second thing to keep in mind is the gain through the filter.
+                   The frequency response of a Biquad filter is a function of its coefficients.
+                   It is possible for the gain through the filter to exceed 1.0 meaning that the
+                   filter increases the amplitude of certain frequencies.
+                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0
+                   and these are saturated or overflowed based on the implementation of the filter.
+                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0
+                   or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+  @par
+                   The third item to consider is the overflow and saturation behavior of the fixed-point Q31 version.
+                   This is described in the function specific documentation below.
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1_32x64
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 Biquad cascade 32x64 filter.
+  @param[in]     S         points to an instance of the high precision Q31 Biquad cascade filter
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Details
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
+                   1.31 format by discarding the low 32 bits.
+  @par
+                   Two related functions are provided in the CMSIS DSP library.
+                   - \ref arm_biquad_cascade_df1_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q63 accumulator.
+                   - \ref arm_biquad_cascade_df1_fast_q31() implements a Biquad cascade with 32-bit coefficients and state variables with a Q31 accumulator.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+static void arm_biquad_cas_df1_32x64_q31_scalar(const arm_biquad_cas_df1_32x64_ins_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* input pointer initialization */
+        q31_t *pOut = pDst;                            /* output pointer initialization */
+        q63_t *pState = S->pState;                     /* state pointer initialization */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* coeff pointer initialization */
+        q63_t acc;                                     /* accumulator */
+        q31_t Xn1, Xn2;                                /* Input Filter state variables */
+        q63_t Yn1, Yn2;                                /* Output Filter state variables */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn;                                      /* temporary input */
+        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* loop counters */
+        q31_t acc_l, acc_h;                            /* temporary output */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the state values */
+    Xn1 = (q31_t) (pState[0]);
+    Xn2 = (q31_t) (pState[1]);
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn * b0;
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn1 * b1;
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn2 * b2;
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn1, a1);
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn2, a2);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+
+      /* The result is converted to 1.63, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *pOut++ = acc_h;
+      /* Yn1 = acc << shift; */
+
+      /* Store the output in the destination buffer in 1.31 format. */
+/*    *pOut++ = (q31_t) (acc >> (32 - shift));  */
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* The first stage output is given as input to the second stage. */
+    pIn = pDst;
+
+    /* Reset to destination buffer working pointer */
+    pOut = pDst;
+
+    /*  Store the updated state variables back into the pState array */
+    *pState++ = (q63_t) Xn1;
+    *pState++ = (q63_t) Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+  } while (--stage);
+
+}
+
+void arm_biquad_cas_df1_32x64_q31(
+  const arm_biquad_cas_df1_32x64_ins_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    const q31_t *pIn = pSrc;    /*  input pointer initialization  */
+    q31_t    *pOut = pDst;      /*  output pointer initialization */
+    q63_t    *pState = S->pState;   /*  state pointer initialization  */
+    const q31_t    *pCoeffs = S->pCoeffs; /*  coeff pointer initialization  */
+    q31_t     Xn1, Xn2;         /*  Input Filter state variables        */
+    q63_t     Yn1, Yn2;         /*  Output Filter state variables        */
+    q31_t     b0, b1, b2, a1, a2;   /*  Filter coefficients           */
+    int32_t   shift = (int32_t) S->postShift + 1;   /*  Shift to be applied to the output */
+    uint32_t  sample, stage = S->numStages; /*  loop counters                     */
+    q31x4_t vecCoef, vecIn;
+    q63_t     acc;
+
+    if (blockSize <= 3)
+    {
+      arm_biquad_cas_df1_32x64_q31_scalar(S,pSrc,pDst,blockSize);
+    }
+    else
+    {
+      do
+      {
+          uint32_t  i;
+          /*
+           * Reading the coefficients
+           */
+          b0 = *pCoeffs++;
+          b1 = *pCoeffs++;
+          b2 = *pCoeffs++;
+          a1 = *pCoeffs++;
+          a2 = *pCoeffs++;
+  
+          vecCoef[0] = 0;
+          vecCoef[1] = b2;
+          vecCoef[2] = b1;
+          vecCoef[3] = b0;
+          /*
+           * Reading the state values
+           */
+          Xn1 = pState[0];
+          Xn2 = pState[1];
+          Yn1 = pState[2];
+          Yn2 = pState[3];
+  
+          /*
+           * append history with initial samples
+           */
+          q31_t     hist[6];
+          hist[0] = 0;
+          hist[1] = Xn2;
+          hist[2] = Xn1;
+          hist[3] = pIn[0];
+          hist[4] = pIn[1];
+          hist[5] = pIn[2];
+  
+          const q31_t  *pIn1 = hist;
+          q31x4_t vecIn0 = *(q31x4_t *) & pIn[0];
+          q31x4_t vecIn1 = *(q31x4_t *) & pIn[1];
+          q31x4_t vecIn2 = *(q31x4_t *) & pIn[2];
+  
+          i = 3;
+          do
+          {
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              vecIn = vld1q(pIn1);
+              pIn1 += 1;
+              Yn1 = vmlaldavaq(Yn1, vecIn, vecCoef);
+              Yn1 = asrl(Yn1, -shift);
+              /*
+               * Store the output in the destination buffer in 1.31 format.
+               */
+              *pOut++ = (q31_t) (Yn1 >> 32);
+          }
+          while (--i);
+  
+          sample = blockSize - 3;
+          pIn1 = pIn + 3;
+  
+          i = sample / 4;
+          while (i > 0U)
+          {
+  
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef);
+              vecIn = vld1q(pIn1);
+              pIn1 += 1;
+              Yn1 = asrl(Yn1, -shift);
+              /*
+               * Store the output in the destination buffer in 1.31 format.
+               */
+              *pOut++ = (q31_t) (Yn1 >> 32);
+  
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef);
+              vecIn0 = vld1q(pIn1);
+              pIn1 += 1;
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+  
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn2, vecCoef);
+              vecIn1 = vld1q(pIn1);
+              pIn1 += 1;
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+  
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn, vecCoef);
+              vecIn2 = vld1q(pIn1);
+              pIn1 += 1;
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+              /*
+               * Decrement the loop counter
+               */
+              i--;
+          }
+          /*
+           * save input state
+           */
+          Xn2 = vecIn[2];
+          Xn1 = vecIn[3];
+  
+          int       loopRemainder = blockSize - 3 - 4 * ((blockSize - 3) / 4);
+          if (loopRemainder == 1)
+          {
+              /*
+               * remainder
+               */
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef);
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+              /*
+               * save input state
+               */
+              Xn2 = vecIn0[2];
+              Xn1 = vecIn0[3];
+  
+          }
+          else if (loopRemainder == 2)
+          {
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef);
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+  
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef);
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+              /*
+               * save input state
+               */
+              Xn2 = vecIn1[2];
+              Xn1 = vecIn1[3];
+  
+          }
+          else if (loopRemainder == 3)
+          {
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn0, vecCoef);
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+  
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn1, vecCoef);
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+  
+              acc = mult32x64(Yn1, a1);
+              acc += mult32x64(Yn2, a2);
+              Yn2 = Yn1;
+              Yn1 = acc;
+              Yn1 = vmlaldavaq(Yn1, vecIn2, vecCoef);
+              Yn1 = asrl(Yn1, -shift);
+              *pOut++ = (q31_t) (Yn1 >> 32);
+              /*
+               * save input state
+               */
+              Xn2 = vecIn2[2];
+              Xn1 = vecIn2[3];
+  
+          }
+  
+          /*
+           * The first stage output is given as input to the second stage.
+           */
+          pIn = pDst;
+          /*
+           * Reset to destination buffer working pointer
+           */
+          pOut = pDst;
+          /*
+           * Store the updated state variables back into the pState array
+           */
+          *pState++ = (q63_t) Xn1;
+          *pState++ = (q63_t) Xn2;
+          *pState++ = Yn1;
+          *pState++ = Yn2;
+      }
+      while (--stage);
+    }
+}
+#else
+void arm_biquad_cas_df1_32x64_q31(
+  const arm_biquad_cas_df1_32x64_ins_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* input pointer initialization */
+        q31_t *pOut = pDst;                            /* output pointer initialization */
+        q63_t *pState = S->pState;                     /* state pointer initialization */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* coeff pointer initialization */
+        q63_t acc;                                     /* accumulator */
+        q31_t Xn1, Xn2;                                /* Input Filter state variables */
+        q63_t Yn1, Yn2;                                /* Output Filter state variables */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn;                                      /* temporary input */
+        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* loop counters */
+        q31_t acc_l, acc_h;                            /* temporary output */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the state values */
+    Xn1 = (q31_t) (pState[0]);
+    Xn2 = (q31_t) (pState[1]);
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output value that is being computed and stored in destination buffer
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn * b0;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn1 * b1;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn2 * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn1, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn2, a2);
+
+      /* The result is converted to 1.63 , Yn2 variable is reused */
+      Yn2 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *pOut = acc_h;
+
+      /* Read the second input into Xn2, to reuse the value */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc +=  b1 * x[n-1] */
+      acc = (q63_t) Xn * b1;
+
+      /* acc =  b0 * x[n] */
+      acc += (q63_t) Xn2 * b0;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn1 * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn2, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn1, a2);
+
+      /* The result is converted to 1.63, Yn1 variable is reused */
+      Yn1 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Read the third input into Xn1, to reuse the value */
+      Xn1 = *pIn++;
+
+      /* The result is converted to 1.31 */
+      /* Store the output in the destination buffer. */
+      *(pOut + 1U) = acc_h;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn1 * b0;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn2 * b1;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn1, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn2, a2);
+
+      /* The result is converted to 1.63, Yn2 variable is reused  */
+      Yn2 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *(pOut + 2U) = acc_h;
+
+      /* Read the fourth input into Xn, to reuse the value */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn * b0;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn1 * b1;
+
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn2 * b2;
+
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn2, a1);
+
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn1, a2);
+
+      /* The result is converted to 1.63, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *(pOut + 3U) = acc_h;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* update output pointer */
+      pOut += 4U;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+
+      /* acc =  b0 * x[n] */
+      acc = (q63_t) Xn * b0;
+      /* acc +=  b1 * x[n-1] */
+      acc += (q63_t) Xn1 * b1;
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q63_t) Xn2 * b2;
+      /* acc +=  a1 * y[n-1] */
+      acc += mult32x64(Yn1, a1);
+      /* acc +=  a2 * y[n-2] */
+      acc += mult32x64(Yn2, a2);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+
+      /* The result is converted to 1.63, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      acc_h = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store the output in the destination buffer in 1.31 format. */
+      *pOut++ = acc_h;
+      /* Yn1 = acc << shift; */
+
+      /* Store the output in the destination buffer in 1.31 format. */
+/*    *pOut++ = (q31_t) (acc >> (32 - shift));  */
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* The first stage output is given as input to the second stage. */
+    pIn = pDst;
+
+    /* Reset to destination buffer working pointer */
+    pOut = pDst;
+
+    /*  Store the updated state variables back into the pState array */
+    *pState++ = (q63_t) Xn1;
+    *pState++ = (q63_t) Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+  } while (--stage);
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BiquadCascadeDF1_32x64 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f16.c
new file mode 100755
index 00000000..c1ac1401
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f16.c
@@ -0,0 +1,491 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_f16.c
+ * Description:  Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+ */
+
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point Biquad cascade filter.
+  @param[in]     S         points to an instance of the floating-point Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_biquad_cascade_df1_f16(
+  const arm_biquad_casd_df1_inst_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    float16_t *pIn = (float16_t *)pSrc;      /*  source pointer            */
+    float16_t *pOut = pDst;     /*  destination pointer       */
+    float16_t *pState = S->pState;  /*  pState pointer            */
+    const float16_t *pCoeffs = S->pCoeffs;    /*  coefficient pointer       */
+    float16_t Xn1, Xn2, Yn1, Yn2;   /*  Filter pState variables   */
+    float16_t X0, X1, X2, X3;   /*  temporary input           */
+    float16_t X4, X5, X6, X7;   /*  temporary input           */
+    _Float16 lastX, lastY;             /*  X,Y history for tail handling */
+    f16x8_t coeffs;
+    f16x8_t accVec;           /* accumultor vector */
+    uint32_t  sample, stage = S->numStages; /*  loop counters             */
+
+    do
+    {
+        /*
+         * Reading the pState values
+         */
+        Xn1 = pState[0];
+        Xn2 = pState[1];
+        Yn1 = pState[2];
+        Yn2 = pState[3];
+
+        sample = blockSize >> 3U;
+
+        /*
+         * First part of the processing with loop unrolling.  Compute 8 outputs at a time.
+         */
+        while (sample > 0U)
+        {
+            X0 = *pIn++;
+            X1 = *pIn++;
+            X2 = *pIn++;
+            X3 = *pIn++;
+            X4 = *pIn++;
+            X5 = *pIn++;
+            X6 = *pIn++;
+            X7 = *pIn++;
+
+            coeffs = vld1q(pCoeffs);
+            accVec = vmulq(coeffs, X7);
+
+            coeffs = vld1q(&pCoeffs[8]);
+            accVec = vfmaq(accVec, coeffs, X6);
+
+            coeffs = vld1q(&pCoeffs[16]);
+            accVec = vfmaq(accVec, coeffs, X5);
+
+            coeffs = vld1q(&pCoeffs[24]);
+            accVec = vfmaq(accVec, coeffs, X4);
+
+            coeffs = vld1q(&pCoeffs[32]);
+            accVec = vfmaq(accVec, coeffs, X3);
+
+            coeffs = vld1q(&pCoeffs[40]);
+            accVec = vfmaq(accVec, coeffs, X2);
+
+            coeffs = vld1q(&pCoeffs[48]);
+            accVec = vfmaq(accVec, coeffs, X1);
+
+            coeffs = vld1q(&pCoeffs[56]);
+            accVec = vfmaq(accVec, coeffs, X0);
+
+            coeffs = vld1q(&pCoeffs[64]);
+            accVec = vfmaq(accVec, coeffs, Xn1);
+
+            coeffs = vld1q(&pCoeffs[72]);
+            accVec = vfmaq(accVec, coeffs, Xn2);
+
+            coeffs = vld1q(&pCoeffs[80]);
+            accVec = vfmaq(accVec, coeffs, Yn1);
+
+            coeffs = vld1q(&pCoeffs[88]);
+            accVec = vfmaq(accVec, coeffs, Yn2);
+            /*
+             * Store the result in the accumulator in the destination buffer.
+             */
+            vst1q(pOut, accVec);
+            pOut += 8;
+
+            /*
+             * update recurrence
+             */
+            Xn1 = X7;
+            Xn2 = X6;
+            Yn1 = vgetq_lane(accVec, 7);
+            Yn2 = vgetq_lane(accVec, 6);
+            /*
+             * decrement the loop counter
+             */
+            sample--;
+        }
+
+        /*
+         * If the blockSize is not a multiple of 8,
+         * compute any remaining output samples here.
+         */
+        sample = blockSize & 0x7U;
+        if (sample)
+        {
+            /* save previous X, Y for modulo 1 length case */
+            lastX = X7;
+            lastY = Yn1;
+
+            X0 = *pIn++;
+            X1 = *pIn++;
+            X2 = *pIn++;
+            X3 = *pIn++;
+            X4 = *pIn++;
+            X5 = *pIn++;
+            X6 = *pIn++;
+            X7 = *pIn++;
+
+            coeffs = vld1q(pCoeffs);
+            accVec = vmulq(coeffs, X7);
+
+            coeffs = vld1q(&pCoeffs[8]);
+            accVec = vfmaq(accVec, coeffs, X6);
+
+            coeffs = vld1q(&pCoeffs[16]);
+            accVec = vfmaq(accVec, coeffs, X5);
+
+            coeffs = vld1q(&pCoeffs[24]);
+            accVec = vfmaq(accVec, coeffs, X4);
+
+            coeffs = vld1q(&pCoeffs[32]);
+            accVec = vfmaq(accVec, coeffs, X3);
+
+            coeffs = vld1q(&pCoeffs[40]);
+            accVec = vfmaq(accVec, coeffs, X2);
+
+            coeffs = vld1q(&pCoeffs[48]);
+            accVec = vfmaq(accVec, coeffs, X1);
+
+            coeffs = vld1q(&pCoeffs[56]);
+            accVec = vfmaq(accVec, coeffs, X0);
+
+            coeffs = vld1q(&pCoeffs[64]);
+            accVec = vfmaq(accVec, coeffs, Xn1);
+
+            coeffs = vld1q(&pCoeffs[72]);
+            accVec = vfmaq(accVec, coeffs, Xn2);
+
+            coeffs = vld1q(&pCoeffs[80]);
+            accVec = vfmaq(accVec, coeffs, Yn1);
+
+            coeffs = vld1q(&pCoeffs[88]);
+            accVec = vfmaq(accVec, coeffs, Yn2);
+
+            switch(sample)
+            {
+               case 1:
+                 *pOut++ = vgetq_lane(accVec, 0);
+                  Xn1 = X0;
+                  Xn2 = lastX;
+                  Yn1 = vgetq_lane(accVec, 0);
+                  Yn2 = lastY;
+               break;
+               case 2:
+                 *pOut++ = vgetq_lane(accVec, 0);
+                 *pOut++ = vgetq_lane(accVec, 1);
+                 Xn1 = X1;
+                 Xn2 = X0;
+                 Yn1 = vgetq_lane(accVec, 1);
+                 Yn2 = vgetq_lane(accVec, 0);
+               break;
+               case 3:
+                *pOut++ = vgetq_lane(accVec, 0);
+                *pOut++ = vgetq_lane(accVec, 1);
+                *pOut++ = vgetq_lane(accVec, 2);
+                Xn1 = X2;
+                Xn2 = X1;
+                Yn1 = vgetq_lane(accVec, 2);
+                Yn2 = vgetq_lane(accVec, 1);
+               break;
+
+               case 4:
+                *pOut++ = vgetq_lane(accVec, 0);
+                *pOut++ = vgetq_lane(accVec, 1);
+                *pOut++ = vgetq_lane(accVec, 2);
+                *pOut++ = vgetq_lane(accVec, 3);
+                Xn1 = X3;
+                Xn2 = X2;
+                Yn1 = vgetq_lane(accVec, 3);
+                Yn2 = vgetq_lane(accVec, 2);
+               break;
+
+               case 5:
+                *pOut++ = vgetq_lane(accVec, 0);
+                *pOut++ = vgetq_lane(accVec, 1);
+                *pOut++ = vgetq_lane(accVec, 2);
+                *pOut++ = vgetq_lane(accVec, 3);
+                *pOut++ = vgetq_lane(accVec, 4);
+                Xn1 = X4;
+                Xn2 = X3;
+                Yn1 = vgetq_lane(accVec, 4);
+                Yn2 = vgetq_lane(accVec, 3);
+               break;
+
+               case 6:
+                *pOut++ = vgetq_lane(accVec, 0);
+                *pOut++ = vgetq_lane(accVec, 1);
+                *pOut++ = vgetq_lane(accVec, 2);
+                *pOut++ = vgetq_lane(accVec, 3);
+                *pOut++ = vgetq_lane(accVec, 4);
+                *pOut++ = vgetq_lane(accVec, 5);
+                Xn1 = X5;
+                Xn2 = X4;
+                Yn1 = vgetq_lane(accVec, 5);
+                Yn2 = vgetq_lane(accVec, 4);
+               break;
+
+               case 7:
+                *pOut++ = vgetq_lane(accVec, 0);
+                *pOut++ = vgetq_lane(accVec, 1);
+                *pOut++ = vgetq_lane(accVec, 2);
+                *pOut++ = vgetq_lane(accVec, 3);
+                *pOut++ = vgetq_lane(accVec, 4);
+                *pOut++ = vgetq_lane(accVec, 5);
+                *pOut++ = vgetq_lane(accVec, 6);
+                Xn1 = X6;
+                Xn2 = X5;
+                Yn1 = vgetq_lane(accVec, 6);
+                Yn2 = vgetq_lane(accVec, 5);
+               break;
+            }
+        }
+        /*
+         * Store the updated state variables back into the pState array
+         */
+        *pState++ = Xn1;
+        *pState++ = Xn2;
+        *pState++ = Yn1;
+        *pState++ = Yn2;
+
+        pCoeffs += sizeof(arm_biquad_mod_coef_f16) / sizeof(float16_t);
+        /*
+         * The first stage goes from the input buffer to the output buffer.
+         * Subsequent numStages  occur in-place in the output buffer
+         */
+        pIn = pDst;
+        /*
+         * Reset the output pointer
+         */
+        pOut = pDst;
+        /*
+         * decrement the loop counter
+         */
+        stage--;
+    }
+    while (stage > 0U);
+}
+
+#else
+void arm_biquad_cascade_df1_f16(
+  const arm_biquad_casd_df1_inst_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+  const float16_t *pIn = pSrc;                         /* Source pointer */
+        float16_t *pOut = pDst;                        /* Destination pointer */
+        float16_t *pState = S->pState;                 /* pState pointer */
+  const float16_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        _Float16 acc;                                 /* Accumulator */
+        _Float16 b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        _Float16 Xn1, Xn2, Yn1, Yn2;                  /* Filter pState variables */
+        _Float16 Xn;                                  /* Temporary input */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the second input */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the third input */
+      Xn1 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the forth input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset output pointer */
+    pOut = pDst;
+
+    /* decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
+#endif /* #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+#endif /*#if defined(ARM_FLOAT16_SUPPORTED)*/
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
index ea75d3b6..77d862bf 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_f32.c
@@ -1,495 +1,684 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_f32.c
- * Description:  Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
-
-  This set of functions implements arbitrary order recursive (IIR) filters.
-  The filters are implemented as a cascade of second order Biquad sections.
-  The functions support Q15, Q31 and floating-point data types.
-  Fast version of Q15 and Q31 also available.
-
-  The functions operate on blocks of input and output data and each call to the function
-  processes <code>blockSize</code> samples through the filter.
-  <code>pSrc</code> points to the array of input data and
-  <code>pDst</code> points to the array of output data.
-  Both arrays contain <code>blockSize</code> values.
-
-  @par           Algorithm
-                   Each Biquad stage implements a second order filter using the difference equation:
-  <pre>
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-  </pre>
-                  A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
-                  \image html Biquad.gif "Single Biquad filter stage"
-                  Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-                  Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-                  Pay careful attention to the sign of the feedback coefficients.
-                  Some design tools use the difference equation
-  <pre>
-      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
-  </pre>
-                  In this case the feedback coefficients <code>a1</code> and <code>a2</code>
-                  must be negated when used with the CMSIS DSP Library.
-
-  @par
-                   Higher order filters are realized as a cascade of second order sections.
-                   <code>numStages</code> refers to the number of second order stages used.
-                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
-                   A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-
-  @par
-                   The <code>pState</code> points to state variables array.
-                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
-                   The state variables are arranged in the <code>pState</code> array as:
-  <pre>
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-  </pre>
-
-  @par
-                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
-                   The state array has a total length of <code>4*numStages</code> values.
-                   The state variables are updated after each block of data is processed, the coefficients are untouched.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-
-  @par           Init Function
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Set the values in the state buffer to zeros before static initialization.
-                   The code below statically initializes each of the 3 different data type filter instance structures
-  <pre>
-      arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
-      arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
-      arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
-  </pre>
-                   where <code>numStages</code> is the number of Biquad stages in the filter;
-                   <code>pState</code> is the address of the state buffer;
-                   <code>pCoeffs</code> is the address of the coefficient buffer;
-                   <code>postShift</code> shift to be applied.
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
-                   Following issues must be considered:
-                   - Scaling of coefficients
-                   - Filter gain
-                   - Overflow and saturation
-
-  @par           Scaling of coefficients
-                   Filter coefficients are represented as fractional values and
-                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
-                   The fixed-point functions have an additional scaling parameter <code>postShift</code>
-                   which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
-                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
-                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
-                   This essentially scales the filter coefficients by <code>2^postShift</code>.
-                   For example, to realize the coefficients
-  <pre>
-     {1.5, -0.8, 1.2, 1.6, -0.9}
-  </pre>
-                   set the pCoeffs array to:
-  <pre>
-     {0.75, -0.4, 0.6, 0.8, -0.45}
-  </pre>
-                   and set <code>postShift=1</code>
-
-  @par           Filter gain
-                   The frequency response of a Biquad filter is a function of its coefficients.
-                   It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
-                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
-                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
-
-  @par           Overflow and saturation
-                   For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point Biquad cascade filter.
-  @param[in]     S         points to an instance of the floating-point Biquad cascade structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-
-#if defined(ARM_MATH_NEON) 
-void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  const float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-
-  const float32_t *pIn = pSrc;                         /*  source pointer            */
-  float32_t *pOut = pDst;                        /*  destination pointer       */
-  float32_t *pState = S->pState;                 /*  pState pointer            */
-  const float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
-  float32_t acc;                                 /*  Simulates the accumulator */
-  
-  uint32_t sample, stage = S->numStages;         /*  loop counters             */
-
-  float32x4_t Xn;
-  float32x2_t Yn;
-  float32x2_t a;
-  float32x4_t b;
-  
-  float32x4_t x,tmp;
-  float32x2_t t;
-  float32x2x2_t y;
-
-  float32_t Xns;
-
-  while (stage > 0U)
-  {
-    /* Reading the coefficients */
-    Xn = vld1q_f32(pState);
-    Yn = vld1_f32(pState + 2);
-
-    b = vld1q_f32(pCoeffs);
-    b = vrev64q_f32(b);  
-    b = vcombine_f32(vget_high_f32(b), vget_low_f32(b));
-
-    a = vld1_f32(pCoeffs + 3);
-    a = vrev64_f32(a);
-    b[0] = 0.0;
-    pCoeffs += 5;
-    
-    /* Reading the pState values */
-   
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:
-     *
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
-    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    sample = blockSize >> 2U;
-
-    while (sample > 0U)
-    {
-      /* Read the first 4 inputs */
-      x = vld1q_f32(pIn);
-
-      pIn += 4;
-
-      tmp = vextq_f32(Xn, x, 1);
-      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
-      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
-      t = vmla_f32(t, a, Yn);
-      t = vpadd_f32(t, t);
-      Yn = vext_f32(Yn, t, 1);
-
-      tmp = vextq_f32(Xn, x, 2);
-      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
-      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
-      t = vmla_f32(t, a, Yn);
-      t = vpadd_f32(t, t);
-      Yn = vext_f32(Yn, t, 1);
-
-      y.val[0] = Yn;
-
-      tmp = vextq_f32(Xn, x, 3);
-      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
-      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
-      t = vmla_f32(t, a, Yn);
-      t = vpadd_f32(t, t);
-      Yn = vext_f32(Yn, t, 1);
-
-      Xn = x;
-      t = vmul_f32(vget_high_f32(b), vget_high_f32(Xn));
-      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(Xn));
-      t = vmla_f32(t, a, Yn);
-      t = vpadd_f32(t, t);
-      Yn = vext_f32(Yn, t, 1);
-      
-      y.val[1] = Yn;
-
-      tmp = vcombine_f32(y.val[0], y.val[1]);
-
-      /* Store the 4 outputs and increment the pointer */
-      vst1q_f32(pOut, tmp);
-      pOut += 4;
-
-      /* Decrement the loop counter */
-      sample--;
-    }
-
-    /* If the block size is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    sample = blockSize & 0x3U;
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xns = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc =  (b[1] * Xn[2]) + (b[2] * Xn[3]) + (b[3] * Xns) + (a[0] * Yn[0]) + (a[1] * Yn[1]);
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:    */
-      /* Xn2 = Xn1   */
-      /* Xn1 = Xn    */
-      /* Yn2 = Yn1   */
-      /* Yn1 = acc   */
-      Xn[2] = Xn[3];
-      Xn[3] = Xns;
-      Yn[0] = Yn[1];
-      Yn[1] = acc;
-
-      /* Decrement the loop counter */
-      sample--;
-
-    }
-
-    vst1q_f32(pState,vcombine_f32(vrev64_f32(vget_high_f32(Xn)),vrev64_f32(Yn)));
-    pState += 4;
-    /*  Store the updated state variables back into the pState array */
-   
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent numStages  occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* Decrement the loop counter */
-    stage--;
-  }
-}
-
-#else
-void arm_biquad_cascade_df1_f32(
-  const arm_biquad_casd_df1_inst_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-  const float32_t *pIn = pSrc;                         /* Source pointer */
-        float32_t *pOut = pDst;                        /* Destination pointer */
-        float32_t *pState = S->pState;                 /* pState pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t acc;                                 /* Accumulator */
-        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
-        float32_t Xn1, Xn2, Yn1, Yn2;                  /* Filter pState variables */
-        float32_t Xn;                                  /* Temporary input */
-        uint32_t sample, stage = S->numStages;         /* Loop counters */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* Variable acc hold output values that are being computed:
-     *
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    sample = blockSize >> 2U;
-
-    while (sample > 0U)
-    {
-      /* Read the first input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-
-      /* Read the third input */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    sample = blockSize & 0x3U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
-
-      /* Store output in destination buffer. */
-      *pOut++ = acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /* The first stage goes from the input buffer to the output buffer. */
-    /* Subsequent numStages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset output pointer */
-    pOut = pDst;
-
-    /* decrement loop counter */
-    stage--;
-
-  } while (stage > 0U);
-
-}
-
-#endif /* #if defined(ARM_MATH_NEON) */
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_f32.c
+ * Description:  Processing function for the floating-point Biquad cascade DirectFormI(DF1) filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup BiquadCascadeDF1 Biquad Cascade IIR Filters Using Direct Form I Structure
+
+  This set of functions implements arbitrary order recursive (IIR) filters.
+  The filters are implemented as a cascade of second order Biquad sections.
+  The functions support Q15, Q31 and floating-point data types.
+  Fast version of Q15 and Q31 also available.
+
+  The functions operate on blocks of input and output data and each call to the function
+  processes <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to the array of input data and
+  <code>pDst</code> points to the array of output data.
+  Both arrays contain <code>blockSize</code> values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+  </pre>
+                  A Direct Form I algorithm is used with 5 coefficients and 4 state variables per stage.
+                  \image html Biquad.gif "Single Biquad filter stage"
+                  Coefficients <code>b0, b1 and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+                  Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+                  Pay careful attention to the sign of the feedback coefficients.
+                  Some design tools use the difference equation
+  <pre>
+      y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2]
+  </pre>
+                  In this case the feedback coefficients <code>a1</code> and <code>a2</code>
+                  must be negated when used with the CMSIS DSP Library.
+
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   <code>numStages</code> refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+                   \image html BiquadCascade.gif "8th order filter using a cascade of Biquad stages"
+                   A 9th order filter would be realized with <code>numStages=5</code> second order stages with the coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
+
+  @par
+                   The <code>pState</code> points to state variables array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+
+  @par
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Init Function
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+      arm_biquad_casd_df1_inst_f32 S1 = {numStages, pState, pCoeffs};
+      arm_biquad_casd_df1_inst_q15 S2 = {numStages, pState, pCoeffs, postShift};
+      arm_biquad_casd_df1_inst_q31 S3 = {numStages, pState, pCoeffs, postShift};
+  </pre>
+                   where <code>numStages</code> is the number of Biquad stages in the filter;
+                   <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>postShift</code> shift to be applied.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the Biquad Cascade filter functions.
+                   Following issues must be considered:
+                   - Scaling of coefficients
+                   - Filter gain
+                   - Overflow and saturation
+
+  @par           Scaling of coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+                   The fixed-point functions have an additional scaling parameter <code>postShift</code>
+                   which allow the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   \image html BiquadPostshift.gif "Fixed-point Biquad with shift by postShift bits after accumulator"
+                   This essentially scales the filter coefficients by <code>2^postShift</code>.
+                   For example, to realize the coefficients
+  <pre>
+     {1.5, -0.8, 1.2, 1.6, -0.9}
+  </pre>
+                   set the pCoeffs array to:
+  <pre>
+     {0.75, -0.4, 0.6, 0.8, -0.45}
+  </pre>
+                   and set <code>postShift=1</code>
+
+  @par           Filter gain
+                   The frequency response of a Biquad filter is a function of its coefficients.
+                   It is possible for the gain through the filter to exceed 1.0 meaning that the filter increases the amplitude of certain frequencies.
+                   This means that an input signal with amplitude < 1.0 may result in an output > 1.0 and these are saturated or overflowed based on the implementation of the filter.
+                   To avoid this behavior the filter needs to be scaled down such that its peak gain < 1.0 or the input signal must be scaled down so that the combination of input and filter are never overflowed.
+
+  @par           Overflow and saturation
+                   For Q15 and Q31 versions, it is described separately as part of the function specific documentation below.
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point Biquad cascade filter.
+  @param[in]     S         points to an instance of the floating-point Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+    const float32_t *pIn = pSrc;              /*  source pointer            */
+    float32_t *pOut = pDst;             /*  destination pointer       */
+    float32_t *pState = S->pState;      /*  pState pointer            */
+    const float32_t *pCoeffs = S->pCoeffs;    /*  coefficient pointer       */
+    float32_t Xn1, Xn2, Yn1, Yn2;       /*  Filter pState variables   */
+    float32_t lastX, lastY;             /*  X,Y history for tail handling */
+    float32_t X0, X1, X2, X3;           /*  temporary input           */
+    f32x4_t coeffs;
+    f32x4_t accVec;                   /* accumultor vector */
+    uint32_t  sample, stage = S->numStages; /*  loop counters             */
+
+    do
+    {
+        /*
+         * Reading the pState values
+         */
+        Xn1 = pState[0];
+        Xn2 = pState[1];
+        Yn1 = pState[2];
+        Yn2 = pState[3];
+
+        sample = blockSize >> 2U;
+
+        /*
+         * First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+         * second loop below computes the remaining 1 to 3 samples.
+         */
+        while (sample > 0U)
+        {
+            X0 = *pIn++;
+            X1 = *pIn++;
+            X2 = *pIn++;
+            X3 = *pIn++;
+
+            coeffs = vld1q(pCoeffs);
+            accVec = vmulq(coeffs, X3);
+
+            coeffs = vld1q(&pCoeffs[4]);
+            accVec = vfmaq(accVec, coeffs, X2);
+
+            coeffs = vld1q(&pCoeffs[8]);
+            accVec = vfmaq(accVec, coeffs, X1);
+
+            coeffs = vld1q(&pCoeffs[12]);
+            accVec = vfmaq(accVec, coeffs, X0);
+
+            coeffs = vld1q(&pCoeffs[16]);
+            accVec = vfmaq(accVec, coeffs, Xn1);
+
+            coeffs = vld1q(&pCoeffs[20]);
+            accVec = vfmaq(accVec, coeffs, Xn2);
+
+            coeffs = vld1q(&pCoeffs[24]);
+            accVec = vfmaq(accVec, coeffs, Yn1);
+
+            coeffs = vld1q(&pCoeffs[28]);
+            accVec = vfmaq(accVec, coeffs, Yn2);
+            /*
+             * Store the result in the accumulator in the destination buffer.
+             */
+            vst1q(pOut, accVec);
+            pOut += 4;
+
+            /*
+             * update recurrence
+             */
+            Xn1 = X3;
+            Xn2 = X2;
+            Yn1 = vgetq_lane(accVec, 3);
+            Yn2 = vgetq_lane(accVec, 2);
+            /*
+             * decrement the loop counter
+             */
+            sample--;
+        }
+
+        /*
+         * If the blockSize is not a multiple of 4,
+         * compute any remaining output samples here.
+         */
+        sample = blockSize & 0x3U;
+        if (sample)
+        {
+            /* save previous X, Y for modulo 1 length case */
+            lastX = X3;
+            lastY = Yn1;
+
+            X0 = *pIn++;
+            X1 = *pIn++;
+            X2 = *pIn++;
+            X3 = *pIn++;
+
+            coeffs = vld1q(pCoeffs);
+            accVec = vmulq(coeffs, X3);
+
+            coeffs = vld1q(&pCoeffs[4]);
+            accVec = vfmaq(accVec, coeffs, X2);
+
+            coeffs = vld1q(&pCoeffs[8]);
+            accVec = vfmaq(accVec, coeffs, X1);
+
+            coeffs = vld1q(&pCoeffs[12]);
+            accVec = vfmaq(accVec, coeffs, X0);
+
+            coeffs = vld1q(&pCoeffs[16]);
+            accVec = vfmaq(accVec, coeffs, Xn1);
+
+            coeffs = vld1q(&pCoeffs[20]);
+            accVec = vfmaq(accVec, coeffs, Xn2);
+
+            coeffs = vld1q(&pCoeffs[24]);
+            accVec = vfmaq(accVec, coeffs, Yn1);
+
+            coeffs = vld1q(&pCoeffs[28]);
+            accVec = vfmaq(accVec, coeffs, Yn2);
+
+            if (sample == 1)
+            {
+                *pOut++ = vgetq_lane(accVec, 0);
+                Xn1 = X0;
+                Xn2 = lastX;
+                Yn1 = vgetq_lane(accVec, 0);
+                Yn2 = lastY;
+            }
+            else if (sample == 2)
+            {
+                *pOut++ = vgetq_lane(accVec, 0);
+                *pOut++ = vgetq_lane(accVec, 1);
+                Xn1 = X1;
+                Xn2 = X0;
+                Yn1 = vgetq_lane(accVec, 1);
+                Yn2 = vgetq_lane(accVec, 0);
+            }
+            else
+            {
+                *pOut++ = vgetq_lane(accVec, 0);
+                *pOut++ = vgetq_lane(accVec, 1);
+                *pOut++ = vgetq_lane(accVec, 2);
+                Xn1 = X2;
+                Xn2 = X1;
+                Yn1 = vgetq_lane(accVec, 2);
+                Yn2 = vgetq_lane(accVec, 1);
+            }
+        }
+        /*
+         * Store the updated state variables back into the pState array
+         */
+        *pState++ = Xn1;
+        *pState++ = Xn2;
+        *pState++ = Yn1;
+        *pState++ = Yn2;
+
+        pCoeffs += sizeof(arm_biquad_mod_coef_f32) / sizeof(float32_t);
+        /*
+         * The first stage goes from the input buffer to the output buffer.
+         * Subsequent numStages  occur in-place in the output buffer
+         */
+        pIn = pDst;
+        /*
+         * Reset the output pointer
+         */
+        pOut = pDst;
+        /*
+         * decrement the loop counter
+         */
+        stage--;
+    }
+    while (stage > 0U);
+}
+#else
+#if defined(ARM_MATH_NEON)  && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+
+  const float32_t *pIn = pSrc;                         /*  source pointer            */
+  float32_t *pOut = pDst;                        /*  destination pointer       */
+  float32_t *pState = S->pState;                 /*  pState pointer            */
+  const float32_t *pCoeffs = S->pCoeffs;               /*  coefficient pointer       */
+  float32_t acc;                                 /*  Simulates the accumulator */
+  
+  uint32_t sample, stage = S->numStages;         /*  loop counters             */
+
+  float32x4_t Xn;
+  float32x2_t Yn;
+  float32x2_t a;
+  float32x4_t b;
+  
+  float32x4_t x,tmp;
+  float32x2_t t;
+  float32x2x2_t y;
+
+  float32_t Xns;
+
+  while (stage > 0U)
+  {
+    /* Reading the coefficients */
+    Xn = vdupq_n_f32(0.0f);
+
+    Xn = vsetq_lane_f32(pState[0],Xn,2);
+    Xn = vsetq_lane_f32(pState[1],Xn,3);
+    Yn = vset_lane_f32(pState[2],Yn,0);
+    Yn = vset_lane_f32(pState[3],Yn,1);
+  
+    b = vld1q_f32(pCoeffs);
+    b = vrev64q_f32(b);  
+    b = vcombine_f32(vget_high_f32(b), vget_low_f32(b));
+
+    a = vld1_f32(pCoeffs + 3);
+    a = vrev64_f32(a);
+    b = vsetq_lane_f32(0.0f,b,0);
+    pCoeffs += 5;
+    
+    /* Reading the pState values */
+   
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /*      The variable acc hold output values that are being computed:
+     *
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first 4 inputs */
+      x = vld1q_f32(pIn);
+
+      pIn += 4;
+
+      tmp = vextq_f32(Xn, x, 1);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      tmp = vextq_f32(Xn, x, 2);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      y.val[0] = Yn;
+
+      tmp = vextq_f32(Xn, x, 3);
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(tmp));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(tmp));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+
+      Xn = x;
+      t = vmul_f32(vget_high_f32(b), vget_high_f32(Xn));
+      t = vmla_f32(t, vget_low_f32(b), vget_low_f32(Xn));
+      t = vmla_f32(t, a, Yn);
+      t = vpadd_f32(t, t);
+      Yn = vext_f32(Yn, t, 1);
+      
+      y.val[1] = Yn;
+
+      tmp = vcombine_f32(y.val[0], y.val[1]);
+
+      /* Store the 4 outputs and increment the pointer */
+      vst1q_f32(pOut, tmp);
+      pOut += 4;
+
+      /* Decrement the loop counter */
+      sample--;
+    }
+
+    
+    /* If the block size is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    sample = blockSize & 0x3U;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xns = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc =  (vgetq_lane_f32(b, 1) * vgetq_lane_f32(Xn, 2)) 
+      + (vgetq_lane_f32(b, 2) * vgetq_lane_f32(Xn, 3)) 
+      + (vgetq_lane_f32(b, 3) * Xns) 
+      + (vget_lane_f32(a, 0) * vget_lane_f32(Yn, 0)) 
+      + (vget_lane_f32(a, 1) * vget_lane_f32(Yn, 1));
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:    */
+      /* Xn2 = Xn1   */
+      /* Xn1 = Xn    */
+      /* Yn2 = Yn1   */
+      /* Yn1 = acc   */
+      Xn = vsetq_lane_f32(vgetq_lane_f32(Xn, 3),Xn,2);
+      Xn = vsetq_lane_f32(Xns,Xn,3);
+      Yn = vset_lane_f32(vget_lane_f32(Yn, 1),Yn,0);
+      Yn = vset_lane_f32(acc,Yn,1);
+
+      /* Decrement the loop counter */
+      sample--;
+
+    }
+
+    vst1q_f32(pState,vcombine_f32((vget_high_f32(Xn)),(Yn)));
+    pState += 4;
+    /*  Store the updated state variables back into the pState array */
+   
+    /*  The first stage goes from the input buffer to the output buffer. */
+    /*  Subsequent numStages  occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset the output pointer */
+    pOut = pDst;
+
+    /* Decrement the loop counter */
+    stage--;
+  }
+}
+
+#else
+void arm_biquad_cascade_df1_f32(
+  const arm_biquad_casd_df1_inst_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* pState pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc;                                 /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1, Xn2, Yn1, Yn2;                  /* Filter pState variables */
+        float32_t Xn;                                  /* Temporary input */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn2 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the second input */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn1 = (b0 * Xn2) + (b1 * Xn) + (b2 * Xn1) + (a1 * Yn2) + (a2 * Yn1);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the third input */
+      Xn1 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn2 = (b0 * Xn1) + (b1 * Xn2) + (b2 * Xn) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+
+      /* Read the forth input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      Yn1 = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn2) + (a2 * Yn1);
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = (b0 * Xn) + (b1 * Xn1) + (b2 * Xn2) + (a1 * Yn1) + (a2 * Yn2);
+
+      /* Store output in destination buffer. */
+      *pOut++ = acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset output pointer */
+    pOut = pDst;
+
+    /* decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
index 917e028d..65539406 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q15.c
@@ -1,250 +1,250 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_fast_q15.c
- * Description:  Fast processing function for the Q15 Biquad cascade filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 Biquad cascade filter (fast variant).
-  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process per call
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This fast version uses a 32-bit accumulator with 2.30 format.
-                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around and distorts the result.
-                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
-                   The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
- @remark
-                   Refer to \ref arm_biquad_cascade_df1_q15() for a slower implementation of this function
-                   which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
-                   Use the function \ref arm_biquad_cascade_df1_init_q15() to initialize the filter structure.
- */
-
-void arm_biquad_cascade_df1_fast_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-  const q15_t *pIn = pSrc;                             /* Source pointer */
-        q15_t *pOut = pDst;                            /* Destination pointer */
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t acc;                                     /* Accumulator */
-        q31_t in;                                      /* Temporary variable to hold input value */
-        q31_t out;                                     /* Temporary variable to hold output value */
-        q31_t b0;                                      /* Temporary variable to hold bo value */
-        q31_t b1, a1;                                  /* Filter coefficients */
-        q31_t state_in, state_out;                     /* Filter state variables */
-        int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
-        uint32_t sample, stage = S->numStages;         /* Loop counters */
-
-  do
-  {
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = read_q15x2_ia (&pState);
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = read_q15x2_da (&pState);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /* Variable acc hold output values that are being computed:
-     *
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
-    /* Loop unrolling: Compute 2 outputs at a time */
-    sample = blockSize >> 1U;
-
-    while (sample > 0U)
-    {
-
-      /* Read the input */
-      in = read_q15x2_ia ((q15_t **) &pIn);
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-      /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-      state_in  = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-#else
-      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Store the output in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
-#else
-      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      state_in  = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-#else
-      state_in  = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* Decrement loop counter */
-      sample--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    sample = (blockSize & 0x1U);
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      out = __SMUAD(b0, in);
-#else
-      out = __SMUADX(b0, in);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */
-      acc = __SMLAD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
-      acc = __SMLAD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
-      out = __SSAT((acc >> shift), 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-#else
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* The first stage goes from the input buffer to the output buffer. */
-    /* Subsequent (numStages - 1) occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* Store the updated state variables back into the state array */
-    write_q15x2_ia(&pState, state_in);
-    write_q15x2_ia(&pState, state_out);
-
-    /* Decrement loop counter */
-    stage--;
-
-  } while (stage > 0U);
-}
-
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_fast_q15.c
+ * Description:  Fast processing function for the Q15 Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 Biquad cascade filter (fast variant).
+  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25).
+                   The 2.30 accumulator is then shifted by <code>postShift</code> bits and the result truncated to 1.15 format by discarding the low 16 bits.
+ @remark
+                   Refer to \ref arm_biquad_cascade_df1_q15() for a slower implementation of this function
+                   which uses 64-bit accumulation to avoid wrap around distortion. Both the slow and the fast versions use the same instance structure.
+                   Use the function \ref arm_biquad_cascade_df1_init_q15() to initialize the filter structure.
+ */
+
+void arm_biquad_cascade_df1_fast_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t acc;                                     /* Accumulator */
+        q31_t in;                                      /* Temporary variable to hold input value */
+        q31_t out;                                     /* Temporary variable to hold output value */
+        q31_t b0;                                      /* Temporary variable to hold bo value */
+        q31_t b1, a1;                                  /* Filter coefficients */
+        q31_t state_in, state_out;                     /* Filter state variables */
+        int32_t shift = (int32_t) (15 - S->postShift); /* Post shift */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+    /* Read the b0 and 0 coefficients using SIMD  */
+    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the b1 and b2 coefficients using SIMD */
+    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the a1 and a2 coefficients using SIMD */
+    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
+    state_in = read_q15x2_ia (&pState);
+
+    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
+    state_out = read_q15x2_da (&pState);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 2 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 2 outputs at a time */
+    sample = blockSize >> 1U;
+
+    while (sample > 0U)
+    {
+
+      /* Read the input */
+      in = read_q15x2_ia ((q15_t **) &pIn);
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUAD(b0, in);
+      /* acc =  b1 * x[n-1] + acc +=  b2 * x[n-2] + out */
+      acc = __SMLAD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
+      acc = __SMLAD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
+      out = __SSAT((acc >> shift), 16);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
+      state_out = __PKHBT(state_out >> 16, (out), 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUADX(b0, in);
+      /* acc0 =  b1 * x[n-1] , acc0 +=  b2 * x[n-2] + out */
+      acc = __SMLAD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
+      acc = __SMLAD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
+      out = __SSAT((acc >> shift), 16);
+
+      /* Store the output in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in >> 16, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = (blockSize & 0x1U);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      in = *pIn++;
+
+      /* out =  b0 * x[n] + 0 * 0 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      out = __SMUAD(b0, in);
+#else
+      out = __SMUADX(b0, in);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* acc =  b1 * x[n-1], acc +=  b2 * x[n-2] + out */
+      acc = __SMLAD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + acc +=  a2 * y[n-2] */
+      acc = __SMLAD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 and then saturation is applied */
+      out = __SSAT((acc >> shift), 16);
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = (q15_t) out;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent (numStages - 1) occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset the output pointer */
+    pOut = pDst;
+
+    /* Store the updated state variables back into the state array */
+    write_q15x2_ia(&pState, state_in);
+    write_q15x2_ia(&pState, state_out);
+
+    /* Decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
index 4c30cda4..cefa592a 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_fast_q31.c
@@ -1,296 +1,296 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_fast_q31.c
- * Description:  Processing function for the Q31 Fast Biquad cascade DirectFormI(DF1) filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 Biquad cascade filter (fast variant).
-  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process per call
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
-                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
-                   These intermediate results are added to a 2.30 accumulator.
-                   Finally, the accumulator is saturated and converted to a 1.31 result.
-                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
-                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function
-                   arm_biquad_cascade_df1_init_q31() to initialize filter structure.
-  @remark
-                   Refer to \ref arm_biquad_cascade_df1_q31() for a slower implementation of this function
-                   which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure.
-                   Use the function \ref arm_biquad_cascade_df1_init_q31() to initialize the filter structure.
- */
-
-void arm_biquad_cascade_df1_fast_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-  const q31_t *pIn = pSrc;                             /* Source pointer */
-        q31_t *pOut = pDst;                            /* Destination pointer */
-        q31_t *pState = S->pState;                     /* pState pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t acc = 0;                                 /* Accumulator */
-        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
-        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
-        q31_t Xn;                                      /* Temporary input */
-        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
-        uint32_t sample, stage = S->numStages;         /* Loop counters */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* Variables acc ... acc3 hold output values that are being computed:
-     *
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    sample = blockSize >> 2U;
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
-      mult_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b1 * x[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b[2] * x[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-      Yn2 = acc << shift;
-
-      /* Read the second input */
-      Xn2 = *(pIn + 1U);
-
-      /* Store the output in the destination buffer. */
-      *pOut = Yn2;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn2);
-      /* acc +=  b1 * x[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn);
-      /* acc +=  b[2] * x[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn1);
-      /* acc +=  a1 * y[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn2);
-      /* acc +=  a2 * y[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn1);
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Read the third input  */
-      Xn1 = *(pIn + 2U);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 1U) = Yn1;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn1);
-      /* acc +=  b1 * x[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn2);
-      /* acc +=  b[2] * x[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn);
-      /* acc +=  a1 * y[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      Yn2 = acc << shift;
-
-      /* Read the forth input */
-      Xn = *(pIn + 3U);
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 2U) = Yn2;
-      pIn += 4U;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b1 * x[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b[2] * x[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn2);
-      /* acc +=  a2 * y[n-2] */
-      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn1);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      Xn2 = Xn1;
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      Yn1 = acc << shift;
-
-      /* Xn1 = Xn */
-      Xn1 = Xn;
-
-      /* Store the output in the destination buffer. */
-      *(pOut + 3U) = Yn1;
-      pOut += 4U;
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    sample = (blockSize & 0x3U);
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
-      mult_32x32_keep32_R(acc, b0, Xn);
-      /* acc +=  b1 * x[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b1, Xn1);
-      /* acc +=  b[2] * x[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, b2, Xn2);
-      /* acc +=  a1 * y[n-1] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a1, Yn1);
-      /* acc +=  a2 * y[n-2] */
-      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
-      multAcc_32x32_keep32_R(acc, a2, Yn2);
-
-      /* The result is converted to 1.31  */
-      acc = acc << shift;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = acc;
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* The first stage goes from the input buffer to the output buffer. */
-    /* Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /* Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while (--stage);
-}
-
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_fast_q31.c
+ * Description:  Processing function for the Q31 Fast Biquad cascade DirectFormI(DF1) filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 Biquad cascade filter (fast variant).
+  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by two bits and lie in the range [-0.25 +0.25). Use the intialization function
+                   arm_biquad_cascade_df1_init_q31() to initialize filter structure.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_q31() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision. Both the slow and the fast versions use the same instance structure.
+                   Use the function \ref arm_biquad_cascade_df1_init_q31() to initialize the filter structure.
+ */
+
+void arm_biquad_cascade_df1_fast_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+        q31_t *pOut = pDst;                            /* Destination pointer */
+        q31_t *pState = S->pState;                     /* pState pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t acc = 0;                                 /* Accumulator */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
+        q31_t Xn;                                      /* Temporary input */
+        int32_t shift = (int32_t) S->postShift + 1;    /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variables acc ... acc3 hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b1 * Xn1) >> 32);*/
+      mult_32x32_keep32_R(acc, b1, Xn1);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b0 * (Xn))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b0, Xn);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
+
+      /* The result is converted to 1.31 , Yn2 variable is reused */
+      Yn2 = acc << shift;
+
+      /* Read the second input */
+      Xn2 = *(pIn + 1U);
+
+      /* Store the output in the destination buffer. */
+      *pOut = Yn2;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn2)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn2);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn1);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn2);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Read the third input  */
+      Xn1 = *(pIn + 2U);
+
+      /* Store the output in the destination buffer. */
+      *(pOut + 1U) = Yn1;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn1)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn1);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn2);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
+
+      /* The result is converted to 1.31, Yn2 variable is reused  */
+      Yn2 = acc << shift;
+
+      /* Read the forth input */
+      Xn = *(pIn + 3U);
+
+      /* Store the output in the destination buffer. */
+      *(pOut + 2U) = Yn2;
+      pIn += 4U;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn);
+      /* acc +=  b1 * x[n-1] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn1);
+      /* acc +=  b[2] * x[n-2] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
+      /* acc +=  a1 * y[n-1] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn2);
+      /* acc +=  a2 * y[n-2] */
+      /*acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn1);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      Xn2 = Xn1;
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      Yn1 = acc << shift;
+
+      /* Xn1 = Xn */
+      Xn1 = Xn;
+
+      /* Store the output in the destination buffer. */
+      *(pOut + 3U) = Yn1;
+      pOut += 4U;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = (blockSize & 0x3U);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      /* acc = (q31_t) (((q63_t) b0 * (Xn)) >> 32);*/
+      mult_32x32_keep32_R(acc, b0, Xn);
+      /* acc +=  b1 * x[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b1 * (Xn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b1, Xn1);
+      /* acc +=  b[2] * x[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) b2 * (Xn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, b2, Xn2);
+      /* acc +=  a1 * y[n-1] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a1 * (Yn1))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a1, Yn1);
+      /* acc +=  a2 * y[n-2] */
+      /* acc = (q31_t) ((((q63_t) acc << 32) + ((q63_t) a2 * (Yn2))) >> 32);*/
+      multAcc_32x32_keep32_R(acc, a2, Yn2);
+
+      /* The result is converted to 1.31  */
+      acc = acc << shift;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = acc;
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent stages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset to destination pointer */
+    pOut = pDst;
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+  } while (--stage);
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f16.c
new file mode 100755
index 00000000..d18dd3ea
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f16.c
@@ -0,0 +1,166 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_init_f16.c
+ * Description:  Floating-point Biquad cascade DirectFormI(DF1) filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point Biquad cascade filter.
+  @param[in,out] S           points to an instance of the floating-point Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ 
+  @par             For MVE code, an additional buffer of modified coefficients is required.
+                   Its size is numStages and each element of this buffer has type arm_biquad_mod_coef_f16.
+                   So, its total size is 96*numStages float16_t elements.
+
+                   The initialization function which must be used is arm_biquad_cascade_df1_mve_init_f16.
+ */
+
+
+void arm_biquad_cascade_df1_init_f16(
+        arm_biquad_casd_df1_inst_f16 * S,
+        uint8_t numStages,
+  const float16_t * pCoeffs,
+        float16_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float16_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+/*
+
+The computation of the coefficients is done in float32 otherwise the
+resulting filter is too different from the expected one.
+
+*/
+static void generateCoefsFastBiquadF16(float16_t b0, float16_t b1, float16_t b2, float16_t a1, float16_t a2,
+                                arm_biquad_mod_coef_f16 * newCoef)
+{
+    float32_t coeffs[8][12] = {
+        {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, (float32_t)a1, (float32_t)a2},
+        {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, (float32_t)a2, 0.0f},
+        {0.0f, 0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f},
+        {0.0f, 0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f},
+        {0.0f, 0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f},
+        {0.0f, 0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f},
+        {0.0f, (float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f},
+        {(float32_t)b0, (float32_t)b1, (float32_t)b2, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f, 0.0f}
+    };
+
+    for (int i = 0; i < 12; i++)
+    {
+        coeffs[1][i] += ((float32_t)a1 * coeffs[0][i]);
+        coeffs[2][i] += ((float32_t)a1 * coeffs[1][i]) + ((float32_t)a2 * coeffs[0][i]);
+        coeffs[3][i] += ((float32_t)a1 * coeffs[2][i]) + ((float32_t)a2 * coeffs[1][i]);
+        coeffs[4][i] += ((float32_t)a1 * coeffs[3][i]) + ((float32_t)a2 * coeffs[2][i]);
+        coeffs[5][i] += ((float32_t)a1 * coeffs[4][i]) + ((float32_t)a2 * coeffs[3][i]);
+        coeffs[6][i] += ((float32_t)a1 * coeffs[5][i]) + ((float32_t)a2 * coeffs[4][i]);
+        coeffs[7][i] += ((float32_t)a1 * coeffs[6][i]) + ((float32_t)a2 * coeffs[5][i]);
+
+        /*
+         * transpose
+         */
+        newCoef->coeffs[i][0] = (float16_t) coeffs[0][i];
+        newCoef->coeffs[i][1] = (float16_t) coeffs[1][i];
+        newCoef->coeffs[i][2] = (float16_t) coeffs[2][i];
+        newCoef->coeffs[i][3] = (float16_t) coeffs[3][i];
+        newCoef->coeffs[i][4] = (float16_t) coeffs[4][i];
+        newCoef->coeffs[i][5] = (float16_t) coeffs[5][i];
+        newCoef->coeffs[i][6] = (float16_t) coeffs[6][i];
+        newCoef->coeffs[i][7] = (float16_t) coeffs[7][i];
+
+    }
+}
+
+void arm_biquad_cascade_df1_mve_init_f16(arm_biquad_casd_df1_inst_f16 * S,
+                                         uint8_t numStages,
+                                         const float16_t * pCoeffs, 
+                                         arm_biquad_mod_coef_f16 * pCoeffsMod, 
+                                         float16_t * pState)
+{
+    arm_biquad_cascade_df1_init_f16(S, numStages, (float16_t *)pCoeffsMod, pState);
+
+    /* Generate SIMD friendly modified coefs */
+    for (int i = 0; i < numStages; i++)
+    {
+        generateCoefsFastBiquadF16(pCoeffs[0], pCoeffs[1], pCoeffs[2], pCoeffs[3], pCoeffs[4], pCoeffsMod);
+        pCoeffs += 5;
+        pCoeffsMod++;
+    }
+}
+
+#endif
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
+#endif /* #if defined(ARMfloat16_t_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
index b1836426..1614594b 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_f32.c
@@ -1,91 +1,146 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_init_f32.c
- * Description:  Floating-point Biquad cascade DirectFormI(DF1) filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point Biquad cascade filter.
-  @param[in,out] S           points to an instance of the floating-point Biquad cascade structure.
-  @param[in]     numStages   number of 2nd order stages in the filter.
-  @param[in]     pCoeffs     points to the filter coefficients.
-  @param[in]     pState      points to the state buffer.
-  @return        none
-
-  @par           Coefficient and State Ordering
-                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
-  <pre>
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-  </pre>
-
-  @par
-                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
-                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
-                   and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
-  @par
-                   The <code>pState</code> is a pointer to state array.
-                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
-                   The state variables are arranged in the <code>pState</code> array as:
-  <pre>
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-  </pre>
-                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
-                   The state array has a total length of <code>4*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
- */
-
-void arm_biquad_cascade_df1_init_f32(
-        arm_biquad_casd_df1_inst_f32 * S,
-        uint8_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_init_f32.c
+ * Description:  Floating-point Biquad cascade DirectFormI(DF1) filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point Biquad cascade filter.
+  @param[in,out] S           points to an instance of the floating-point Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on. The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ 
+  @par             For MVE code, an additional buffer of modified coefficients is required.
+                   Its size is numStages and each element of this buffer has type arm_biquad_mod_coef_f32.
+                   So, its total size is 32*numStages float32_t elements.
+
+                   The initialization function which must be used is arm_biquad_cascade_df1_mve_init_f32.
+ */
+
+
+void arm_biquad_cascade_df1_init_f32(
+        arm_biquad_casd_df1_inst_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+static void generateCoefsFastBiquadF32(float32_t b0, float32_t b1, float32_t b2, float32_t a1, float32_t a2,
+                                arm_biquad_mod_coef_f32 * newCoef)
+{
+    float32_t coeffs[4][8] = {
+        {0, 0, 0, b0, b1, b2, a1, a2},
+        {0, 0, b0, b1, b2, 0, a2, 0},
+        {0, b0, b1, b2, 0, 0, 0, 0},
+        {b0, b1, b2, 0, 0, 0, 0, 0},
+    };
+
+    for (int i = 0; i < 8; i++)
+    {
+        coeffs[1][i] += a1 * coeffs[0][i];
+        coeffs[2][i] += a1 * coeffs[1][i] + a2 * coeffs[0][i];
+        coeffs[3][i] += a1 * coeffs[2][i] + a2 * coeffs[1][i];
+
+        /*
+         * transpose
+         */
+        newCoef->coeffs[i][0] = (float32_t) coeffs[0][i];
+        newCoef->coeffs[i][1] = (float32_t) coeffs[1][i];
+        newCoef->coeffs[i][2] = (float32_t) coeffs[2][i];
+        newCoef->coeffs[i][3] = (float32_t) coeffs[3][i];
+    }
+}
+
+void arm_biquad_cascade_df1_mve_init_f32(
+      arm_biquad_casd_df1_inst_f32 * S,
+      uint8_t numStages,
+      const float32_t * pCoeffs, 
+      arm_biquad_mod_coef_f32 * pCoeffsMod, 
+      float32_t * pState)
+{
+    arm_biquad_cascade_df1_init_f32(S, numStages, (float32_t *)pCoeffsMod, pState);
+
+    /* Generate SIMD friendly modified coefs */
+    for (int i = 0; i < numStages; i++)
+    {
+        generateCoefsFastBiquadF32(pCoeffs[0], pCoeffs[1], pCoeffs[2], pCoeffs[3], pCoeffs[4], pCoeffsMod);
+        pCoeffs += 5;
+        pCoeffsMod++;
+    }
+}
+#endif 
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
index a57c5d5a..0fa38255 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q15.c
@@ -1,96 +1,96 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_init_q15.c
- * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 Biquad cascade filter.
-  @param[in,out] S           points to an instance of the Q15 Biquad cascade structure.
-  @param[in]     numStages   number of 2nd order stages in the filter.
-  @param[in]     pCoeffs     points to the filter coefficients.
-  @param[in]     pState      points to the state buffer.
-  @param[in]     postShift   Shift to be applied to the accumulator result. Varies according to the coefficients format
-  @return        none
-
-  @par           Coefficient and State Ordering
-                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
-  <pre>
-      {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
-  </pre>
-  @par
-                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
-                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
-                   and so on.  The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values.
-                   The zero coefficient between <code>b1</code> and <code>b2</code> facilities  use of 16-bit SIMD instructions on the Cortex-M4.
-  @par
-                   The state variables are stored in the array <code>pState</code>.
-                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
-                   The state variables are arranged in the <code>pState</code> array as:
-  <pre>
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-  </pre>
-                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
-                   The state array has a total length of <code>4*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
- */
-
-void arm_biquad_cascade_df1_init_q15(
-        arm_biquad_casd_df1_inst_q15 * S,
-        uint8_t numStages,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_init_q15.c
+ * Description:  Q15 Biquad cascade DirectFormI(DF1) filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 Biquad cascade filter.
+  @param[in,out] S           points to an instance of the Q15 Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @param[in]     postShift   Shift to be applied to the accumulator result. Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, 0, b11, b12, a11, a12, b20, 0, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>6*numStages</code> values.
+                   The zero coefficient between <code>b1</code> and <code>b2</code> facilities  use of 16-bit SIMD instructions on the Cortex-M4.
+  @par
+                   The state variables are stored in the array <code>pState</code>.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df1_init_q15(
+        arm_biquad_casd_df1_inst_q15 * S,
+        uint8_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int8_t postShift)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign postShift to be applied to the output */
+  S->postShift = postShift;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
index 301181c6..2b3cb628 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_init_q31.c
@@ -1,95 +1,95 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_init_q31.c
- * Description:  Q31 Biquad cascade DirectFormI(DF1) filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 Biquad cascade filter.
-  @param[in,out] S           points to an instance of the Q31 Biquad cascade structure.
-  @param[in]     numStages   number of 2nd order stages in the filter.
-  @param[in]     pCoeffs     points to the filter coefficients.
-  @param[in]     pState      points to the state buffer.
-  @param[in]     postShift   Shift to be applied after the accumulator.  Varies according to the coefficients format
-  @return        none
-
-  @par           Coefficient and State Ordering
-                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
-  <pre>
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-  </pre>
-  @par
-                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
-                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
-                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
-  @par
-                   The <code>pState</code> points to state variables array.
-                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
-                   The state variables are arranged in the <code>pState</code> array as:
-  <pre>
-      {x[n-1], x[n-2], y[n-1], y[n-2]}
-  </pre>
-                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
-                   The state array has a total length of <code>4*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
- */
-
-void arm_biquad_cascade_df1_init_q31(
-        arm_biquad_casd_df1_inst_q31 * S,
-        uint8_t numStages,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        int8_t postShift)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign postShift to be applied to the output */
-  S->postShift = postShift;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_init_q31.c
+ * Description:  Q31 Biquad cascade DirectFormI(DF1) filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 Biquad cascade filter.
+  @param[in,out] S           points to an instance of the Q31 Biquad cascade structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @param[in]     postShift   Shift to be applied after the accumulator.  Varies according to the coefficients format
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> points to state variables array.
+                   Each Biquad stage has 4 state variables <code>x[n-1], x[n-2], y[n-1],</code> and <code>y[n-2]</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {x[n-1], x[n-2], y[n-1], y[n-2]}
+  </pre>
+                   The 4 state variables for stage 1 are first, then the 4 state variables for stage 2, and so on.
+                   The state array has a total length of <code>4*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df1_init_q31(
+        arm_biquad_casd_df1_inst_q31 * S,
+        uint8_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int8_t postShift)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign postShift to be applied to the output */
+  S->postShift = postShift;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
index 0d3a2f3d..c77a05c4 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q15.c
@@ -1,363 +1,618 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_q15.c
- * Description:  Processing function for the Q15 Biquad cascade DirectFormI(DF1) filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 Biquad cascade filter.
-  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the location where the output result is written
-  @param[in]     blockSize number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits.
-                   Finally, the result is saturated to 1.15 format.
-  @remark
-                   Refer to \ref arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter.
- */
-
-void arm_biquad_cascade_df1_q15(
-  const arm_biquad_casd_df1_inst_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-
-
-#if defined (ARM_MATH_DSP)
-
-  const q15_t *pIn = pSrc;                             /* Source pointer */
-        q15_t *pOut = pDst;                            /* Destination pointer */
-        q31_t in;                                      /* Temporary variable to hold input value */
-        q31_t out;                                     /* Temporary variable to hold output value */
-        q31_t b0;                                      /* Temporary variable to hold bo value */
-        q31_t b1, a1;                                  /* Filter coefficients */
-        q31_t state_in, state_out;                     /* Filter state variables */
-        q31_t acc_l, acc_h;
-        q63_t acc;                                     /* Accumulator */
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        int32_t lShift = (15 - (int32_t) S->postShift);       /* Post shift */
-        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
-        int32_t uShift = (32 - lShift);
-
-  do
-  {
-    /* Read the b0 and 0 coefficients using SIMD  */
-    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
-
-    /* Read the b1 and b2 coefficients using SIMD */
-    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
-
-    /* Read the a1 and a2 coefficients using SIMD */
-    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
-
-    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
-    state_in = read_q15x2_ia (&pState);
-
-    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
-    state_out = read_q15x2_da (&pState);
-
-    /* Apply loop unrolling and compute 2 output values simultaneously. */
-    /*      The variable acc hold output values that are being computed:
-     *
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-    sample = blockSize >> 1U;
-
-    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
-     ** a second loop below computes the remaining 1 sample. */
-    while (sample > 0U)
-    {
-
-      /* Read the input */
-      in = read_q15x2_ia ((q15_t **) &pIn);
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUAD(b0, in);
-
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-      state_in  = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-#else
-      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
-      state_out = __PKHBT(state_out >> 16, (out), 16);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* out =  b0 * x[n] + 0 * 0 */
-      out = __SMUADX(b0, in);
-      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
-#else
-      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      state_in  = __PKHBT(in >> 16, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-#else
-      state_in  = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* Decrement loop counter */
-      sample--;
-    }
-
-    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-
-    if ((blockSize & 0x1U) != 0U)
-    {
-      /* Read the input */
-      in = *pIn++;
-
-      /* out =  b0 * x[n] + 0 * 0 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      out = __SMUAD(b0, in);
-#else
-      out = __SMUADX(b0, in);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
-      acc = __SMLALD(b1, state_in, out);
-      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
-      acc = __SMLALD(a1, state_out, acc);
-
-      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
-      /* Calc lower part of acc */
-      acc_l = acc & 0xffffffff;
-
-      /* Calc upper part of acc */
-      acc_h = (acc >> 32) & 0xffffffff;
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      out = __SSAT(out, 16);
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) out;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
-      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      state_in = __PKHBT(in, state_in, 16);
-      state_out = __PKHBT(out, state_out, 16);
-#else
-      state_in = __PKHBT(state_in >> 16, in, 16);
-      state_out = __PKHBT(state_out >> 16, out, 16);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-    }
-
-    /* The first stage goes from the input wire to the output wire.  */
-    /* Subsequent numStages occur in-place in the output wire  */
-    pIn = pDst;
-
-    /* Reset the output pointer */
-    pOut = pDst;
-
-    /* Store the updated state variables back into the state array */
-    write_q15x2_ia (&pState, state_in);
-    write_q15x2_ia (&pState, state_out);
-
-    /* Decrement loop counter */
-    stage--;
-
-  } while (stage > 0U);
-
-#else
-
-  const q15_t *pIn = pSrc;                             /* Source pointer */
-        q15_t *pOut = pDst;                            /* Destination pointer */
-        q15_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
-        q15_t Xn1, Xn2, Yn1, Yn2;                      /* Filter state variables */
-        q15_t Xn;                                      /* temporary input */
-        q63_t acc;                                     /* Accumulator */
-        int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    pCoeffs++;  // skip the 0 coefficient
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the state values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-    /* The variables acc holds the output value that is computed:
-     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
-    sample = blockSize;
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      /* acc =  b0 * x[n] */
-      acc = (q31_t) b0 *Xn;
-
-      /* acc +=  b1 * x[n-1] */
-      acc += (q31_t) b1 *Xn1;
-      /* acc +=  b[2] * x[n-2] */
-      acc += (q31_t) b2 *Xn2;
-      /* acc +=  a1 * y[n-1] */
-      acc += (q31_t) a1 *Yn1;
-      /* acc +=  a2 * y[n-2] */
-      acc += (q31_t) a2 *Yn2;
-
-      /* The result is converted to 1.31  */
-      acc = __SSAT((acc >> shift), 16);
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as:  */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q15_t) acc;
-
-      /* Store the output in the destination buffer. */
-      *pOut++ = (q15_t) acc;
-
-      /* decrement the loop counter */
-      sample--;
-    }
-
-    /*  The first stage goes from the input buffer to the output buffer. */
-    /*  Subsequent stages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset to destination pointer */
-    pOut = pDst;
-
-    /*  Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-  } while (--stage);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_q15.c
+ * Description:  Processing function for the Q15 Biquad cascade DirectFormI(DF1) filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 Biquad cascade filter.
+  @param[in]     S         points to an instance of the Q15 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the location where the output result is written
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is then shifted by <code>postShift</code> bits to truncate the result to 1.15 format by discarding the low 16 bits.
+                   Finally, the result is saturated to 1.15 format.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_fast_q15() for a faster but less precise implementation of this filter.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_biquad_cascade_df1_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+    const q15_t    *pIn = pSrc; /*  input pointer initialization  */
+    q15_t          *pOut = pDst;        /*  output pointer initialization */
+    int             shift;
+    uint32_t        sample, stages = S->numStages;      /*  loop counters                 */
+    int             postShift = S->postShift;
+    q15x8_t         bCoeffs0, bCoeffs1, bCoeffs2, bCoeffs3;     /*  Coefficients vector           */
+    q15_t          *pState = S->pState; /*  pState pointer initialization */
+    q15x8_t         inVec0;
+    int64_t         acc;
+    const q15_t     *pCoeffs = S->pCoeffs;       /*  coeff pointer initialization  */
+    q31_t           out, out1;
+
+    shift = (15 - postShift) - 32;
+
+    do {
+        q15_t           a2 = pCoeffs[5];
+        q15_t           a1 = pCoeffs[4];
+
+        bCoeffs0 = vdupq_n_s16(0);
+        bCoeffs0[0] = pCoeffs[3];       // b2
+        bCoeffs0[1] = pCoeffs[2];       // b1
+        bCoeffs0[2] = pCoeffs[0];       // b0
+
+        uint32_t        zero = 0;
+        bCoeffs1 = bCoeffs0;
+        bCoeffs1 = vshlcq_s16(bCoeffs1, &zero, 16);
+
+        bCoeffs2 = bCoeffs1;
+        bCoeffs2 = vshlcq_s16(bCoeffs2, &zero, 16);
+
+        bCoeffs3 = bCoeffs2;
+        bCoeffs3 = vshlcq_s16(bCoeffs3, &zero, 16);
+
+        bCoeffs0[6] = a2;
+        bCoeffs0[7] = a1;
+        bCoeffs1[7] = a2;
+        bCoeffs1[6] = a1;
+
+        bCoeffs2 =
+            vsetq_lane_s32(vgetq_lane_s32((q31x4_t) bCoeffs0, 3), (q31x4_t) bCoeffs2, 3);
+        bCoeffs3 =
+            vsetq_lane_s32(vgetq_lane_s32((q31x4_t) bCoeffs1, 3), (q31x4_t) bCoeffs3, 3);
+
+
+        /* 2 first elements are garbage, will be updated with history */
+        inVec0 = vld1q(pIn - 2);
+        pIn += 2;
+
+        inVec0[0] = pState[1];
+        inVec0[1] = pState[0];
+        inVec0[6] = pState[3];
+        inVec0[7] = pState[2];
+
+        acc = vmlaldavq(bCoeffs0, inVec0);
+        acc = sqrshrl_sat48(acc, shift);
+        out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+        inVec0[6] = out1;
+        acc = vmlaldavq(bCoeffs1, inVec0);
+        acc = sqrshrl_sat48(acc, shift);
+        out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+        inVec0[7] = out;
+        *pOut++ = (q15_t) out1;
+        *pOut++ = (q15_t) out;
+
+        acc = vmlaldavq(bCoeffs2, inVec0);
+        acc = sqrshrl_sat48(acc, shift);
+        out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+
+        inVec0[6] = out1;
+        acc = vmlaldavq(bCoeffs3, inVec0);
+        acc = sqrshrl_sat48(acc, shift);
+        out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+        /*
+         * main loop
+         */
+        sample = (blockSize - 4) >> 2U;
+        /* preload (efficient scheduling) */
+        inVec0 = vld1q(pIn);
+        pIn += 4;
+
+        /*
+         * Compute 4 outputs at a time.
+         */
+        while (sample > 0U) {
+
+            inVec0[6] = out1;
+            inVec0[7] = out;
+
+            /* store */
+            *pOut++ = (q15_t) out1;
+            *pOut++ = (q15_t) out;
+
+            /*
+             * in       { x0  x1  x2  x3  x4  x5  yn2  yn1 }
+             *                          x
+             * bCoeffs0 { b2  b1  b0   0   0   0   a2  a1 }
+             *
+             */
+            acc = vmlaldavq(bCoeffs0, inVec0);
+            /* shift + saturate to 16 bit */
+            acc = sqrshrl_sat48(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+            inVec0[6] = out1;
+
+            /*
+             * in       { x0  x1  x2  x3  x4  x5  y0  yn1 }
+             *                          x
+             * bCoeffs1 {  0  b2  b1  b0   0   0  a1  a2 }
+             */
+            acc = vmlaldavq(bCoeffs1, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = (q15_t) out1;
+            *pOut++ = (q15_t) out;
+
+
+            inVec0[7] = out;
+            /*
+             * in       { x0  x1  x2  x3  x4  x5  y0  yp1 }
+             *                         x
+             * bCoeffs2 { 0   0   b2  b1  b0   0  a2  a1 }
+             */
+            acc = vmlaldavq(bCoeffs2, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+            inVec0[6] = out1;
+
+            /*
+             * in       { x0  x1  x2  x3  x4  x5  y0  yp1 }
+             *                         x
+             * bCoeffs2 {  0   0   0  b2  b1  b0  a1  a2  }
+             */
+            acc = vmlaldavq(bCoeffs3, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            inVec0 = vld1q(pIn);
+            pIn += 4;
+
+            /* decrement the loop counter  */
+            sample--;
+        }
+
+        *pOut++ = (q15_t) out1;
+        *pOut++ = (q15_t) out;
+
+        /*
+         * Tail handling
+         */
+        int32_t         loopRemainder = blockSize & 3;
+
+        if (loopRemainder == 3) {
+            inVec0[6] = out1;
+            inVec0[7] = out;
+
+            acc = vmlaldavq(bCoeffs0, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+            inVec0[6] = out1;
+
+            acc = vmlaldavq(bCoeffs1, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = (q15_t) out1;
+            *pOut++ = (q15_t) out;
+
+            inVec0[7] = out;
+            acc = vmlaldavq(bCoeffs2, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+            *pOut++ = (q15_t) out1;
+
+            /* Store the updated state variables back into the pState array */
+            pState[0] = vgetq_lane_s16(inVec0, 4);
+            pState[1] = vgetq_lane_s16(inVec0, 3);
+            pState[3] = out;
+            pState[2] = out1;
+
+        } else if (loopRemainder == 2) {
+            inVec0[6] = out1;
+            inVec0[7] = out;
+
+            acc = vmlaldavq(bCoeffs0, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+            inVec0[6] = out1;
+
+            acc = vmlaldavq(bCoeffs1, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = (q15_t) out1;
+            *pOut++ = (q15_t) out;
+
+            /* Store the updated state variables back into the pState array */
+            pState[0] = vgetq_lane_s16(inVec0, 3);
+            pState[1] = vgetq_lane_s16(inVec0, 2);
+            pState[3] = out1;
+            pState[2] = out;
+        } else if (loopRemainder == 1) {
+
+            inVec0[6] = out1;
+            inVec0[7] = out;
+
+            acc = vmlaldavq(bCoeffs0, inVec0);
+            acc = sqrshrl_sat48(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+            *pOut++ = (q15_t) out1;
+
+            /* Store the updated state variables back into the pState array */
+            pState[0] = vgetq_lane_s16(inVec0, 2);
+            pState[1] = vgetq_lane_s16(inVec0, 1);
+            pState[3] = out;
+            pState[2] = out1;
+
+
+        } else {
+            /* Store the updated state variables back into the pState array */
+            pState[0] = vgetq_lane_s16(inVec0, 1);
+            pState[1] = vgetq_lane_s16(inVec0, 0);
+            pState[3] = out1;
+            pState[2] = out;
+        }
+
+        pState += 4;
+        pCoeffs += 6;
+
+        /*
+         * The first stage goes from the input buffer to the output buffer.
+         * Subsequent stages occur in-place in the output buffer
+         */
+        pIn = pDst;
+        /*
+         * Reset to destination pointer
+         */
+        pOut = pDst;
+    }
+    while (--stages);
+}
+#else
+void arm_biquad_cascade_df1_q15(
+  const arm_biquad_casd_df1_inst_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+
+
+#if defined (ARM_MATH_DSP)
+
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q31_t in;                                      /* Temporary variable to hold input value */
+        q31_t out;                                     /* Temporary variable to hold output value */
+        q31_t b0;                                      /* Temporary variable to hold bo value */
+        q31_t b1, a1;                                  /* Filter coefficients */
+        q31_t state_in, state_out;                     /* Filter state variables */
+        q31_t acc_l, acc_h;
+        q63_t acc;                                     /* Accumulator */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /* Post shift */
+        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
+        int32_t uShift = (32 - lShift);
+
+  do
+  {
+    /* Read the b0 and 0 coefficients using SIMD  */
+    b0 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the b1 and b2 coefficients using SIMD */
+    b1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the a1 and a2 coefficients using SIMD */
+    a1 = read_q15x2_ia ((q15_t **) &pCoeffs);
+
+    /* Read the input state values from the state buffer:  x[n-1], x[n-2] */
+    state_in = read_q15x2_ia (&pState);
+
+    /* Read the output state values from the state buffer:  y[n-1], y[n-2] */
+    state_out = read_q15x2_da (&pState);
+
+    /* Apply loop unrolling and compute 2 output values simultaneously. */
+    /*      The variable acc hold output values that are being computed:
+     *
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+    sample = blockSize >> 1U;
+
+    /* First part of the processing with loop unrolling.  Compute 2 outputs at a time.
+     ** a second loop below computes the remaining 1 sample. */
+    while (sample > 0U)
+    {
+
+      /* Read the input */
+      in = read_q15x2_ia ((q15_t **) &pIn);
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUAD(b0, in);
+
+      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
+      acc = __SMLALD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] +  a2 * y[n-2] */
+      acc = __SMLALD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      out = __SSAT(out, 16);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, (in >> 16), 16);
+      state_out = __PKHBT(state_out >> 16, (out), 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* out =  b0 * x[n] + 0 * 0 */
+      out = __SMUADX(b0, in);
+      /* acc +=  b1 * x[n-1] +  b2 * x[n-2] + out */
+      acc = __SMLALD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
+      acc = __SMLALD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      out = __SSAT(out, 16);
+
+      /* Store the output in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(state_out, out, 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(out, state_out >> 16, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in  = __PKHBT(in >> 16, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in  = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Decrement loop counter */
+      sample--;
+    }
+
+    /* If the blockSize is not a multiple of 2, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+
+    if ((blockSize & 0x1U) != 0U)
+    {
+      /* Read the input */
+      in = *pIn++;
+
+      /* out =  b0 * x[n] + 0 * 0 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      out = __SMUAD(b0, in);
+#else
+      out = __SMUADX(b0, in);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* acc =  b1 * x[n-1] + b2 * x[n-2] + out */
+      acc = __SMLALD(b1, state_in, out);
+      /* acc +=  a1 * y[n-1] + a2 * y[n-2] */
+      acc = __SMLALD(a1, state_out, acc);
+
+      /* The result is converted from 3.29 to 1.31 if postShift = 1, and then saturation is applied */
+      /* Calc lower part of acc */
+      acc_l = acc & 0xffffffff;
+
+      /* Calc upper part of acc */
+      acc_h = (acc >> 32) & 0xffffffff;
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      out = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      out = __SSAT(out, 16);
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = (q15_t) out;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      /* x[n-N], x[n-N-1] are packed together to make state_in of type q31 */
+      /* y[n-N], y[n-N-1] are packed together to make state_out of type q31 */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      state_in = __PKHBT(in, state_in, 16);
+      state_out = __PKHBT(out, state_out, 16);
+#else
+      state_in = __PKHBT(state_in >> 16, in, 16);
+      state_out = __PKHBT(state_out >> 16, out, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+    }
+
+    /* The first stage goes from the input wire to the output wire.  */
+    /* Subsequent numStages occur in-place in the output wire  */
+    pIn = pDst;
+
+    /* Reset the output pointer */
+    pOut = pDst;
+
+    /* Store the updated state variables back into the state array */
+    write_q15x2_ia (&pState, state_in);
+    write_q15x2_ia (&pState, state_out);
+
+    /* Decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+#else
+
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+        q15_t *pOut = pDst;                            /* Destination pointer */
+        q15_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q15_t Xn1, Xn2, Yn1, Yn2;                      /* Filter state variables */
+        q15_t Xn;                                      /* temporary input */
+        q63_t acc;                                     /* Accumulator */
+        int32_t shift = (15 - (int32_t) S->postShift); /* Post shift */
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        uint32_t sample, stage = (uint32_t) S->numStages;     /* Stage loop counter */
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    pCoeffs++;  // skip the 0 coefficient
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the state values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+    /* The variables acc holds the output value that is computed:
+     *    acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    sample = blockSize;
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      /* acc =  b0 * x[n] */
+      acc = (q31_t) b0 *Xn;
+
+      /* acc +=  b1 * x[n-1] */
+      acc += (q31_t) b1 *Xn1;
+      /* acc +=  b[2] * x[n-2] */
+      acc += (q31_t) b2 *Xn2;
+      /* acc +=  a1 * y[n-1] */
+      acc += (q31_t) a1 *Yn1;
+      /* acc +=  a2 * y[n-2] */
+      acc += (q31_t) a2 *Yn2;
+
+      /* The result is converted to 1.31  */
+      acc = __SSAT((acc >> shift), 16);
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as:  */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = (q15_t) acc;
+
+      /* Store the output in the destination buffer. */
+      *pOut++ = (q15_t) acc;
+
+      /* decrement the loop counter */
+      sample--;
+    }
+
+    /*  The first stage goes from the input buffer to the output buffer. */
+    /*  Subsequent stages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset to destination pointer */
+    pOut = pDst;
+
+    /*  Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+  } while (--stage);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
index 5ec32315..d938025e 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df1_q31.c
@@ -1,247 +1,510 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df1_q31.c
- * Description:  Processing function for the Q31 Biquad cascade filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF1
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 Biquad cascade filter.
-  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clip.
-                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
-                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
-                   1.31 format by discarding the low 32 bits.
-  @remark
-                   Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter.
- */
-
-void arm_biquad_cascade_df1_q31(
-  const arm_biquad_casd_df1_inst_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-  const q31_t *pIn = pSrc;                             /* Source pointer */
-        q31_t *pOut = pDst;                            /* Destination pointer */
-        q31_t *pState = S->pState;                     /* pState pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q63_t acc;                                     /* Accumulator */
-        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
-        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
-        q31_t Xn;                                      /* Temporary input */
-        uint32_t uShift = ((uint32_t) S->postShift + 1U);
-        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
-        uint32_t sample, stage = S->numStages;         /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc_l, acc_h;                            /* temporary output variables */
-#endif
-
-  do
-  {
-    /* Reading the coefficients */
-    b0 = *pCoeffs++;
-    b1 = *pCoeffs++;
-    b2 = *pCoeffs++;
-    a1 = *pCoeffs++;
-    a2 = *pCoeffs++;
-
-    /* Reading the pState values */
-    Xn1 = pState[0];
-    Xn2 = pState[1];
-    Yn1 = pState[2];
-    Yn2 = pState[3];
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Apply loop unrolling and compute 4 output values simultaneously. */
-    /* Variable acc hold output values that are being computed:
-     *
-     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
-     */
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    sample = blockSize >> 2U;
-
-    while (sample > 0U)
-    {
-      /* Read the first input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
-
-      /* The result is converted to 1.31 , Yn2 variable is reused */
-      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
-      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the second input */
-      Xn2 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
-      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Read the third input */
-      Xn1 = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
-
-      /* The result is converted to 1.31, Yn2 variable is reused  */
-      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
-      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn2;
-
-      /* Read the forth input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
-
-      /* The result is converted to 1.31, Yn1 variable is reused  */
-      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
-      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
-
-      /* Apply shift for lower part of acc and upper part of acc */
-      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-      /* Store output in destination buffer. */
-      *pOut++ = Yn1;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    sample = blockSize & 0x3U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (sample > 0U)
-    {
-      /* Read the input */
-      Xn = *pIn++;
-
-      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
-      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
-
-      /* The result is converted to 1.31  */
-      acc = acc >> lShift;
-
-      /* Store output in destination buffer. */
-      *pOut++ = (q31_t) acc;
-
-      /* Every time after the output is computed state should be updated. */
-      /* The states should be updated as: */
-      /* Xn2 = Xn1 */
-      /* Xn1 = Xn  */
-      /* Yn2 = Yn1 */
-      /* Yn1 = acc */
-      Xn2 = Xn1;
-      Xn1 = Xn;
-      Yn2 = Yn1;
-      Yn1 = (q31_t) acc;
-
-      /* decrement loop counter */
-      sample--;
-    }
-
-    /* Store the updated state variables back into the pState array */
-    *pState++ = Xn1;
-    *pState++ = Xn2;
-    *pState++ = Yn1;
-    *pState++ = Yn2;
-
-    /* The first stage goes from the input buffer to the output buffer. */
-    /* Subsequent numStages occur in-place in the output buffer */
-    pIn = pDst;
-
-    /* Reset output pointer */
-    pOut = pDst;
-
-    /* decrement loop counter */
-    stage--;
-
-  } while (stage > 0U);
-
-}
-
-/**
-  @} end of BiquadCascadeDF1 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df1_q31.c
+ * Description:  Processing function for the Q31 Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF1
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 Biquad cascade filter.
+  @param[in]     S         points to an instance of the Q31 Biquad cascade structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2 bits and lie in the range [-0.25 +0.25).
+                   After all 5 multiply-accumulates are performed, the 2.62 accumulator is shifted by <code>postShift</code> bits and the result truncated to
+                   1.31 format by discarding the low 32 bits.
+  @remark
+                   Refer to \ref arm_biquad_cascade_df1_fast_q31() for a faster but less precise implementation of this filter.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    const q31_t    *pIn = pSrc; /*  input pointer initialization  */
+    q31_t          *pOut = pDst;        /*  output pointer initialization */
+    int             shift;
+    uint32_t        stages = S->numStages;      /*  loop counters                 */
+    int             postShift = S->postShift;
+    q31x4_t         b0Coeffs, b1Coeffs, a0Coeffs, a1Coeffs;     /*  Coefficients vector           */
+    q31x4_t         stateVec;
+    q31_t          *pState = S->pState; /*  pState pointer initialization */
+    q31x4_t         inVec0;
+    int64_t         acc;
+    const q31_t          *pCoeffs = S->pCoeffs;       /*  coeff pointer initialization  */
+    q31_t           out, out1;
+
+
+    shift = (postShift + 1 + 8);
+
+    do {
+        /*
+         * Reading the coefficients
+         * generates :
+         * Fwd0 { b2  b1  b0  0  }
+         * Fwd1 { 0   b2  b1  b0 }
+         * Bwd0 { 0   0   a2  a1 }
+         * Bwd0 { 0   0   a1  a2 }
+         * (can be moved in init)
+         */
+        b0Coeffs = vdupq_n_s32(0);
+        a0Coeffs = vdupq_n_s32(0);
+
+        b0Coeffs[0] = pCoeffs[2];       // b2
+        b0Coeffs[1] = pCoeffs[1];       // b1
+        b0Coeffs[2] = pCoeffs[0];       // b0
+
+        b1Coeffs = b0Coeffs;
+        uint32_t        zero = 0;
+        b1Coeffs = vshlcq_s32(b1Coeffs, &zero, 32);
+
+        a0Coeffs[2] = pCoeffs[4];
+        a0Coeffs[3] = pCoeffs[3];
+        a1Coeffs = vrev64q_s32(a0Coeffs);
+
+
+        /*
+         * prologue consumes history samples
+         */
+
+        /* 2 first elements are garbage, will be updated with history */
+        inVec0 = vld1q(pIn - 2);
+
+        inVec0[0] = pState[1];
+        inVec0[1] = pState[0];
+
+        stateVec[2] = pState[3];
+        stateVec[3] = pState[2];
+
+        acc = vrmlaldavhq(b0Coeffs, inVec0);
+        acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+        acc = lsll(acc, shift);
+        out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+        stateVec[2] = out;
+        acc = vrmlaldavhq(b1Coeffs, inVec0);
+        acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+
+        acc = lsll(acc, shift);
+        out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+
+        inVec0 = vld1q(pIn);
+        pIn += 2;
+
+        /*
+         * main loop
+         */
+        uint32_t            sample = (blockSize - 2) >> 2U;
+        /*
+         * First part of the processing with loop unrolling.
+         * Compute 4 outputs at a time.
+         */
+        while (sample > 0U) {
+
+            stateVec[3] = out1;
+
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            /*
+             * in         { x0  x1  x2  x3 }
+             *                    x
+             * b0Coeffs   { b2  b1  b0  0  }
+             */
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            /*
+             * out         { 0   0   yn2 yn1 }
+             *                    x
+             * a0Coeffs    { 0   0   a2  a1  }
+             */
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            /*
+             * in         { x0  x1  x2  x3 }
+             *                    x
+             * b0Coeffs   {  0  b2  b1  b0 }
+             */
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            /*
+             * out         { 0   0   y0  yn1 }
+             *                    x
+             * a0Coeffs    { 0   0   a1  a2  }
+             */
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[3] = out1;
+
+            inVec0 = vld1q(pIn);
+            pIn += 2;
+
+            /* unrolled part */
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            inVec0 = vld1q(pIn);
+            pIn += 2;
+
+            sample--;
+        }
+
+        *pOut++ = out;
+        *pOut++ = out1;
+
+        /*
+         * Tail handling
+         */
+        int32_t         loopRemainder = blockSize & 3;
+        if (loopRemainder == 2) {
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[1];
+            pState[1] = inVec0[0];
+            pState[3] = out;
+            pState[2] = out1;
+        } else if (loopRemainder == 1) {
+            stateVec[3] = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[3] = out1;
+
+            inVec0 = vld1q(pIn);
+            pIn += 2;
+
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = out;
+
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[2];
+            pState[1] = inVec0[1];
+            pState[3] = out1;
+            pState[2] = out;
+        } else if (loopRemainder == 0) {
+            stateVec[3] = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            stateVec[2] = out;
+
+            acc = vrmlaldavhq(b1Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a1Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out1 = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = out;
+            *pOut++ = out1;
+
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[3];
+            pState[1] = inVec0[2];
+            pState[3] = out;
+            pState[2] = out1;
+        } else {
+            stateVec[3] = out1;
+
+            acc = vrmlaldavhq(b0Coeffs, inVec0);
+            acc = vrmlaldavhaq(acc, a0Coeffs, stateVec);
+            acc = lsll(acc, shift);
+            out = (q31_t) ((acc >> 32) & 0xffffffff);
+
+            *pOut++ = out;
+
+            /*
+             * Store the updated state variables back into the pState array
+             */
+            pState[0] = inVec0[2];
+            pState[1] = inVec0[1];
+            pState[3] = out1;
+            pState[2] = out;
+        }
+
+
+        pCoeffs += 5;
+        pState += 4;
+
+        /*  The first stage goes from the input buffer to the output buffer. */
+        /*  Subsequent stages occur in-place in the output buffer */
+        pIn = pDst;
+
+        /* Reset to destination pointer */
+        pOut = pDst;
+    }
+    while (--stages);
+}
+#else
+void arm_biquad_cascade_df1_q31(
+  const arm_biquad_casd_df1_inst_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+        q31_t *pOut = pDst;                            /* Destination pointer */
+        q31_t *pState = S->pState;                     /* pState pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q63_t acc;                                     /* Accumulator */
+        q31_t b0, b1, b2, a1, a2;                      /* Filter coefficients */
+        q31_t Xn1, Xn2, Yn1, Yn2;                      /* Filter pState variables */
+        q31_t Xn;                                      /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /* Shift to be applied to the output */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc_l, acc_h;                            /* temporary output variables */
+#endif
+
+  do
+  {
+    /* Reading the coefficients */
+    b0 = *pCoeffs++;
+    b1 = *pCoeffs++;
+    b2 = *pCoeffs++;
+    a1 = *pCoeffs++;
+    a2 = *pCoeffs++;
+
+    /* Reading the pState values */
+    Xn1 = pState[0];
+    Xn2 = pState[1];
+    Yn1 = pState[2];
+    Yn2 = pState[3];
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Apply loop unrolling and compute 4 output values simultaneously. */
+    /* Variable acc hold output values that are being computed:
+     *
+     * acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2]
+     */
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    sample = blockSize >> 2U;
+
+    while (sample > 0U)
+    {
+      /* Read the first input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31 , Yn2 variable is reused */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Read the second input */
+      Xn2 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn2) + ((q63_t) b1 * Xn) + ((q63_t) b2 * Xn1) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Read the third input */
+      Xn1 = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn1) + ((q63_t) b1 * Xn2) + ((q63_t) b2 * Xn) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31, Yn2 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn2 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn2;
+
+      /* Read the forth input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn2) + ((q63_t) a2 * Yn1);
+
+      /* The result is converted to 1.31, Yn1 variable is reused  */
+      acc_l = (acc      ) & 0xffffffff; /* Calc lower part of acc */
+      acc_h = (acc >> 32) & 0xffffffff; /* Calc upper part of acc */
+
+      /* Apply shift for lower part of acc and upper part of acc */
+      Yn1 = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = Yn1;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    sample = blockSize & 0x3U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (sample > 0U)
+    {
+      /* Read the input */
+      Xn = *pIn++;
+
+      /* acc =  b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] + a1 * y[n-1] + a2 * y[n-2] */
+      acc = ((q63_t) b0 * Xn) + ((q63_t) b1 * Xn1) + ((q63_t) b2 * Xn2) + ((q63_t) a1 * Yn1) + ((q63_t) a2 * Yn2);
+
+      /* The result is converted to 1.31  */
+      acc = acc >> lShift;
+
+      /* Store output in destination buffer. */
+      *pOut++ = (q31_t) acc;
+
+      /* Every time after the output is computed state should be updated. */
+      /* The states should be updated as: */
+      /* Xn2 = Xn1 */
+      /* Xn1 = Xn  */
+      /* Yn2 = Yn1 */
+      /* Yn1 = acc */
+      Xn2 = Xn1;
+      Xn1 = Xn;
+      Yn2 = Yn1;
+      Yn1 = (q31_t) acc;
+
+      /* decrement loop counter */
+      sample--;
+    }
+
+    /* Store the updated state variables back into the pState array */
+    *pState++ = Xn1;
+    *pState++ = Xn2;
+    *pState++ = Yn1;
+    *pState++ = Yn2;
+
+    /* The first stage goes from the input buffer to the output buffer. */
+    /* Subsequent numStages occur in-place in the output buffer */
+    pIn = pDst;
+
+    /* Reset output pointer */
+    pOut = pDst;
+
+    /* decrement loop counter */
+    stage--;
+
+  } while (stage > 0U);
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BiquadCascadeDF1 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f16.c
new file mode 100755
index 00000000..a7b1c7ab
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f16.c
@@ -0,0 +1,494 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_f16.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+#if (defined(ARM_MATH_MVE_FLOAT16) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_biquad_cascade_df2T_f16(
+  const arm_biquad_cascade_df2T_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    float16_t *pIn = (float16_t *)pSrc;                  /*  source pointer            */
+    float16_t Xn0, Xn1;
+    float16_t acc0, acc1;
+    float16_t *pOut = pDst;                 /*  destination pointer       */
+    float16_t *pState = S->pState;          /*  State pointer             */
+    uint32_t  sample, stage = S->numStages; /*  loop counters             */
+    float16_t const *pCurCoeffs =          /*  coefficient pointer       */
+                (float16_t const *) S->pCoeffs;
+    f16x8_t b0Coeffs, a0Coeffs;           /*  Coefficients vector       */
+    f16x8_t b1Coeffs, a1Coeffs;           /*  Modified coef. vector     */
+    f16x8_t state;                        /*  State vector              */
+
+    do
+    {
+        /*
+         * temporary carry variable for feeding the 128-bit vector shifter
+         */
+        uint32_t  tmp = 0;
+        /*
+         * Reading the coefficients
+         * b0Coeffs = {b0, b1, b2, x, x, x, x, x}
+         * a0Coeffs = { x, a1, a2, x, x, x, x, x}
+         */
+        b0Coeffs = vld1q(pCurCoeffs);   pCurCoeffs += 2;
+        a0Coeffs = vld1q(pCurCoeffs);   pCurCoeffs += 3;
+        /*
+         * Reading the state values
+         * state = {d1, d2, 0, 0, x, x, x, x}
+         */
+        state = *(f16x8_t *) pState;
+        state = vsetq_lane((float16_t)0.0, state, 2);
+        state = vsetq_lane((float16_t)0.0, state, 3);
+
+        /* b1Coeffs = {0, b0, b1, b2, x, x, x, x} */
+        /* b1Coeffs = { x, x, a1, a2, x, x, x, x} */
+        b1Coeffs = (f16x8_t)vshlcq_s16((int16x8_t)b0Coeffs, &tmp, 16);
+        a1Coeffs = (f16x8_t)vshlcq_s16((int16x8_t)a0Coeffs, &tmp, 16);
+
+        sample = blockSize / 2;
+
+        /* unrolled 2 x */
+        while (sample > 0U)
+        {
+            /*
+             * Read 2 inputs
+             */
+            Xn0 = *pIn++;
+            Xn1 = *pIn++;
+
+            /*
+             * 1st half:
+             * / acc1 \   / b0 \         / d1 \   / 0  \
+             * |  d1  |   | b1 |         | d2 |   | a1 |
+             * |  d2  |   | b2 |         | 0  |   | a2 |
+             * |  x   | = | x  | * Xn1 + | x  | + | x  | x acc1
+             *   ...       ...            ...      ...
+             * \  x   /   \ x  /         \ x  /   \ x  /
+             */
+
+            state = vfmaq(state, b0Coeffs, Xn0);
+            acc0 = vgetq_lane(state, 0);
+            state = vfmaq(state, a0Coeffs, acc0);
+            state = vsetq_lane((float16_t)0.0, state, 3);
+
+            /*
+             * 2nd half:
+             * same as 1st half, but all vector elements shifted down.
+             * /  x   \   / x  \         / x  \   / x  \
+             * | acc1 |   | b0 |         | d1 |   | 0  |
+             * |  d1  |   | b1 |         | d2 |   | a1 |
+             * |  d2  |   | b2 |         | 0  |   | a2 |
+             * |  x   | = | x  | * Xn1 + | x  | + | x  | x acc1
+             *   ...       ...            ...      ...
+             * \  x   /   \ x  /         \ x  /   \ x  /
+             */
+
+            state = vfmaq(state, b1Coeffs, Xn1);
+            acc1 = vgetq_lane(state, 1);
+            state = vfmaq(state, a1Coeffs, acc1);
+
+            /* move d1, d2 up + clearing */
+            /* expect dual move or long move */
+            state = vsetq_lane(vgetq_lane(state, 2), state, 0);
+            state = vsetq_lane(vgetq_lane(state, 3), state, 1);
+            state = vsetq_lane((float16_t)0.0, state, 2);
+            /*
+             * Store the results in the destination buffer.
+             */
+            *pOut++ = acc0;
+            *pOut++ = acc1;
+            /*
+             * decrement the loop counter
+             */
+            sample--;
+        }
+
+        /* compiler does not come back when enabled */
+        /*
+         * tail handling
+         */
+        if (blockSize & 1)
+        {
+            Xn0 = *pIn++;
+            state = vfmaq_n_f16(state, b0Coeffs, Xn0);
+            acc0 = vgetq_lane(state, 0);
+
+            state = vfmaq_n_f16(state, a0Coeffs, acc0);
+            *pOut++ = acc0;
+            *pState++ = vgetq_lane(state, 1);
+            *pState++ = vgetq_lane(state, 2);
+        }
+        else
+        {
+            *pState++ = vgetq_lane(state, 0);
+            *pState++ = vgetq_lane(state, 1);
+        }
+        /*
+         * The current stage input is given as the output to the next stage
+         */
+        pIn = pDst;
+        /*
+         * Reset the output working pointer
+         */
+        pOut = pDst;
+        /*
+         * decrement the loop counter
+         */
+        stage--;
+    }
+    while (stage > 0U);
+}
+#else
+
+void arm_biquad_cascade_df2T_f16(
+  const arm_biquad_cascade_df2T_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+  const float16_t *pIn = pSrc;                         /* Source pointer */
+        float16_t *pOut = pDst;                        /* Destination pointer */
+        float16_t *pState = S->pState;                 /* State pointer */
+  const float16_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        _Float16 acc1;                                /* Accumulator */
+        _Float16 b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        _Float16 Xn1;                                 /* Temporary input */
+        _Float16 d1, d2;                              /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+     /* Reading the coefficients */
+     b0 = pCoeffs[0];
+     b1 = pCoeffs[1];
+     b2 = pCoeffs[2];
+     a1 = pCoeffs[3];
+     a2 = pCoeffs[4];
+
+     /* Reading the state values */
+     d1 = pState[0];
+     d2 = pState[1];
+
+     pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 16 outputs at a time */
+     sample = blockSize >> 4U;
+
+     while (sample > 0U) {
+
+       /* y[n] = b0 * x[n] + d1 */
+       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+       /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+       Xn1 = *pIn++;
+
+       acc1 = b0 * Xn1 + d1;
+
+       d1 = b1 * Xn1 + d2;
+       d1 += a1 * acc1;
+
+       d2 = b2 * Xn1;
+       d2 += a2 * acc1;
+
+       *pOut++ = acc1;
+
+/*  2 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  3 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  4 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  5 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  6 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  7 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  8 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  9 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 10 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 11 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 12 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 13 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 14 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 15 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 16 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+        /* decrement loop counter */
+        sample--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      sample = blockSize & 0xFU;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (sample > 0U) {
+        Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+        /* decrement loop counter */
+        sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      pState[0] = d1;
+      pState[1] = d2;
+
+      pState += 2U;
+
+      /* The current stage output is given as the input to the next stage */
+      pIn = pDst;
+
+      /* Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement loop counter */
+      stage--;
+
+   } while (stage > 0U);
+
+}
+#endif /* #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of BiquadCascadeDF2T group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
index 205fcb64..922a3965 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f32.c
@@ -1,523 +1,652 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df2T_f32.c
- * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
-*/
-
-/**
-  @addtogroup BiquadCascadeDF2T
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
-  @param[in]     S         points to an instance of the filter data structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process
-  @return        none
- */
-
-#if defined(ARM_MATH_NEON) 
-
-void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-   const float32_t *pIn = pSrc;                   /*  source pointer            */
-   float32_t *pOut = pDst;                        /*  destination pointer       */
-   float32_t *pState = S->pState;                 /*  State pointer             */
-   const float32_t *pCoeffs = S->pCoeffs;         /*  coefficient pointer       */
-   float32_t acc1;                                /*  accumulator               */
-   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
-   float32_t Xn1;                                 /*  temporary input           */
-   float32_t d1, d2;                              /*  state variables           */
-   uint32_t sample, stageCnt,stage = S->numStages;         /*   loop counters   */
-
-
-   float32_t Xn2, Xn3, Xn4;                       /*  Input State variables     */
-   float32_t acc2, acc3, acc4;                    /*  accumulator               */
-
-
-   float32_t p0, p1, p2, p3, p4, A1;
-
-   float32x4_t XnV, YnV;
-   float32x4x2_t dV;
-   float32x4_t zeroV = vdupq_n_f32(0.0);
-   float32x4_t t1,t2,t3,t4,b1V,b2V,a1V,a2V,s;
-
-   /* Loop unrolling. Compute 4 outputs at a time */
-   stageCnt = stage >> 2;
-
-   while (stageCnt > 0U)
-   {
-      /* Reading the coefficients */
-      t1 = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      t2 = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      t3 = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      t4 = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      b1V = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      b2V = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      a1V = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      a2V = vld1q_f32(pCoeffs);
-      pCoeffs += 4;
-
-      /* Reading the state values */
-      dV = vld2q_f32(pState);
-
-      sample = blockSize;
-      
-      while (sample > 0U) {
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-         XnV = vdupq_n_f32(*pIn++);
-
-         s = dV.val[0];
-         YnV = s;
-
-         s = vextq_f32(zeroV,dV.val[0],3);
-         YnV = vmlaq_f32(YnV, t1, s);
-
-         s = vextq_f32(zeroV,dV.val[0],2);
-         YnV = vmlaq_f32(YnV, t2, s);
-
-         s = vextq_f32(zeroV,dV.val[0],1);
-         YnV = vmlaq_f32(YnV, t3, s);
-
-         YnV = vmlaq_f32(YnV, t4, XnV);
-
-         s = vextq_f32(XnV,YnV,3);
-
-         dV.val[0] = vmlaq_f32(dV.val[1], s, b1V);
-         dV.val[0] = vmlaq_f32(dV.val[0], YnV, a1V);
-
-         dV.val[1] = vmulq_f32(s, b2V);
-         dV.val[1] = vmlaq_f32(dV.val[1], YnV, a2V);
-
-         *pOut++ = YnV[3];
-
-         sample--;
-      }
-     
-      /* Store the updated state variables back into the state array */
-      vst2q_f32(pState,dV);
-      pState += 8;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stageCnt--;
-
-   } 
-
-   /* Tail */
-   stageCnt = stage & 3;
-   
-   while (stageCnt > 0U)
-   {
-      /* Reading the coefficients */
-      b0 = *pCoeffs++;
-      b1 = *pCoeffs++;
-      b2 = *pCoeffs++;
-      a1 = *pCoeffs++;
-      a2 = *pCoeffs++;
-
-      /*Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      sample = blockSize;
-
-      while (sample > 0U)
-      {
-         /* Read the input */
-         Xn1 = *pIn++;
-
-         /* y[n] = b0 * x[n] + d1 */
-         acc1 = (b0 * Xn1) + d1;
-
-         /* Store the result in the accumulator in the destination buffer. */
-         *pOut++ = acc1;
-
-         /* Every time after the output is computed state should be updated. */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
-
-         /* d2 = b2 * x[n] + a2 * y[n] */
-         d2 = (b2 * Xn1) + (a2 * acc1);
-
-         /* decrement the loop counter */
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      *pState++ = d1;
-      *pState++ = d2;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /*Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement the loop counter */
-      stageCnt--;
-   }
-}
-#else
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_df2T_f32(
-  const arm_biquad_cascade_df2T_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-  const float32_t *pIn = pSrc;                         /* Source pointer */
-        float32_t *pOut = pDst;                        /* Destination pointer */
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t acc1;                                /* Accumulator */
-        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
-        float32_t Xn1;                                 /* Temporary input */
-        float32_t d1, d2;                              /* State variables */
-        uint32_t sample, stage = S->numStages;         /* Loop counters */
-
-  do
-  {
-     /* Reading the coefficients */
-     b0 = pCoeffs[0];
-     b1 = pCoeffs[1];
-     b2 = pCoeffs[2];
-     a1 = pCoeffs[3];
-     a2 = pCoeffs[4];
-
-     /* Reading the state values */
-     d1 = pState[0];
-     d2 = pState[1];
-
-     pCoeffs += 5U;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-     /* Loop unrolling: Compute 16 outputs at a time */
-     sample = blockSize >> 4U;
-
-     while (sample > 0U) {
-
-       /* y[n] = b0 * x[n] + d1 */
-       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-       /* d2 = b2 * x[n] + a2 * y[n] */
-
-/*  1 */
-       Xn1 = *pIn++;
-
-       acc1 = b0 * Xn1 + d1;
-
-       d1 = b1 * Xn1 + d2;
-       d1 += a1 * acc1;
-
-       d2 = b2 * Xn1;
-       d2 += a2 * acc1;
-
-       *pOut++ = acc1;
-
-/*  2 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/*  3 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/*  4 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/*  5 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/*  6 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/*  7 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/*  8 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/*  9 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/* 10 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/* 11 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/* 12 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/* 13 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/* 14 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/* 15 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-/* 16 */
-         Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-        /* decrement loop counter */
-        sample--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      sample = blockSize & 0xFU;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (sample > 0U) {
-        Xn1 = *pIn++;
-
-        acc1 = b0 * Xn1 + d1;
-
-        d1 = b1 * Xn1 + d2;
-        d1 += a1 * acc1;
-
-        d2 = b2 * Xn1;
-        d2 += a2 * acc1;
-
-        *pOut++ = acc1;
-
-        /* decrement loop counter */
-        sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      pState[0] = d1;
-      pState[1] = d2;
-
-      pState += 2U;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /* Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement loop counter */
-      stage--;
-
-   } while (stage > 0U);
-
-}
-LOW_OPTIMIZATION_EXIT
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of BiquadCascadeDF2T group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_f32.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+#if (defined(ARM_MATH_MVEF) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+
+void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    const float32_t *pIn = pSrc;                  /*  source pointer            */
+    float32_t Xn0, Xn1;
+    float32_t acc0, acc1;
+    float32_t *pOut = pDst;                 /*  destination pointer       */
+    float32_t *pState = S->pState;          /*  State pointer             */
+    uint32_t  sample, stage = S->numStages; /*  loop counters             */
+    float32_t const *pCurCoeffs =          /*  coefficient pointer       */
+                (float32_t const *) S->pCoeffs;
+    f32x4_t b0Coeffs, a0Coeffs;           /*  Coefficients vector       */
+    f32x4_t b1Coeffs, a1Coeffs;           /*  Modified coef. vector     */
+    f32x4_t state;                        /*  State vector              */
+
+    do
+    {
+        /*
+         * temporary carry variable for feeding the 128-bit vector shifter
+         */
+        uint32_t  tmp = 0;
+        /*
+         * Reading the coefficients
+         * b0Coeffs = {b0, b1, b2, x}
+         * a0Coeffs = { x, a1, a2, x}
+         */
+        b0Coeffs = vld1q(pCurCoeffs);   pCurCoeffs+= 2;
+        a0Coeffs = vld1q(pCurCoeffs);   pCurCoeffs+= 3;
+        /*
+         * Reading the state values
+         * state = {d1, d2,  0, 0}
+         */
+        state = *(f32x4_t *) pState;
+        state = vsetq_lane(0.0f, state, 2);
+        state = vsetq_lane(0.0f, state, 3);
+
+        /* b1Coeffs = {b0, b1, b2, x} */
+        /* b1Coeffs = { x, x, a1, a2} */
+        b1Coeffs = (f32x4_t)vshlcq_s32((int32x4_t)b0Coeffs, &tmp, 32);
+        a1Coeffs = (f32x4_t)vshlcq_s32((int32x4_t)a0Coeffs, &tmp, 32);
+
+        sample = blockSize / 2;
+
+        /* unrolled 2 x */
+        while (sample > 0U)
+        {
+            /*
+             * Read 2 inputs
+             */
+            Xn0 = *pIn++;
+            Xn1 = *pIn++;
+
+            /*
+             * 1st half:
+             * / acc0 \   / b0 \         / d1 \   / 0  \
+             * |  d1  | = | b1 | * Xn0 + | d2 | + | a1 | x acc0
+             * |  d2  |   | b2 |         | 0  |   | a2 |
+             * \  x   /   \ x  /         \ x  /   \ x  /
+             */
+
+            state = vfmaq(state, b0Coeffs, Xn0);
+            acc0 = vgetq_lane(state, 0);
+            state = vfmaq(state, a0Coeffs, acc0);
+            state = vsetq_lane(0.0f, state, 3);
+
+            /*
+             * 2nd half:
+             * same as 1st half, but all vector elements shifted down.
+             * /  x   \   / x  \         / x  \   / x  \
+             * | acc1 | = | b0 | * Xn1 + | d1 | + | 0  | x acc1
+             * |  d1  |   | b1 |         | d2 |   | a1 |
+             * \  d2  /   \ b2 /         \ 0  /   \ a2 /
+             */
+
+            state = vfmaq(state, b1Coeffs, Xn1);
+            acc1 = vgetq_lane(state, 1);
+            state = vfmaq(state, a1Coeffs, acc1);
+
+            /* move d1, d2 up + clearing */
+            /* expect dual move or long move */
+            state = vsetq_lane(vgetq_lane(state, 2), state, 0);
+            state = vsetq_lane(vgetq_lane(state, 3), state, 1);
+            state = vsetq_lane(0.0f, state, 2);
+            /*
+             * Store the results in the destination buffer.
+             */
+            *pOut++ = acc0;
+            *pOut++ = acc1;
+            /*
+             * decrement the loop counter
+             */
+            sample--;
+        }
+
+        /*
+         * tail handling
+         */
+        if (blockSize & 1)
+        {
+            Xn0 = *pIn++;
+            state = vfmaq(state, b0Coeffs, Xn0);
+            acc0 = vgetq_lane(state, 0);
+
+            state = vfmaq(state, a0Coeffs, acc0);
+            *pOut++ = acc0;
+            *pState++ = vgetq_lane(state, 1);
+            *pState++ = vgetq_lane(state, 2);
+        }
+        else
+        {
+            *pState++ = vgetq_lane(state, 0);
+            *pState++ = vgetq_lane(state, 1);
+        }
+        /*
+         * The current stage output is given as the input to the next stage
+         */
+        pIn = pDst;
+        /*
+         * Reset the output working pointer
+         */
+        pOut = pDst;
+        /*
+         * decrement the loop counter
+         */
+        stage--;
+    }
+    while (stage > 0U);
+}
+#else
+#if defined(ARM_MATH_NEON) 
+
+void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+   const float32_t *pIn = pSrc;                   /*  source pointer            */
+   float32_t *pOut = pDst;                        /*  destination pointer       */
+   float32_t *pState = S->pState;                 /*  State pointer             */
+   const float32_t *pCoeffs = S->pCoeffs;         /*  coefficient pointer       */
+   float32_t acc1;                                /*  accumulator               */
+   float32_t b0, b1, b2, a1, a2;                  /*  Filter coefficients       */
+   float32_t Xn1;                                 /*  temporary input           */
+   float32_t d1, d2;                              /*  state variables           */
+   uint32_t sample, stageCnt,stage = S->numStages;         /*   loop counters   */
+
+
+   float32x4_t XnV, YnV;
+   float32x4x2_t dV;
+   float32x4_t zeroV = vdupq_n_f32(0.0);
+   float32x4_t t1,t2,t3,t4,b1V,b2V,a1V,a2V,s;
+
+   /* Loop unrolling. Compute 4 outputs at a time */
+   stageCnt = stage >> 2;
+
+   while (stageCnt > 0U)
+   {
+      /* Reading the coefficients */
+      t1 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      t2 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      t3 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      t4 = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      b1V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      b2V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      a1V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      a2V = vld1q_f32(pCoeffs);
+      pCoeffs += 4;
+
+      /* Reading the state values */
+      dV = vld2q_f32(pState);
+
+      sample = blockSize;
+      
+      while (sample > 0U) {
+         /* y[n] = b0 * x[n] + d1 */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         /* d2 = b2 * x[n] + a2 * y[n] */
+
+         XnV = vdupq_n_f32(*pIn++);
+
+         s = dV.val[0];
+         YnV = s;
+
+         s = vextq_f32(zeroV,dV.val[0],3);
+         YnV = vmlaq_f32(YnV, t1, s);
+
+         s = vextq_f32(zeroV,dV.val[0],2);
+         YnV = vmlaq_f32(YnV, t2, s);
+
+         s = vextq_f32(zeroV,dV.val[0],1);
+         YnV = vmlaq_f32(YnV, t3, s);
+
+         YnV = vmlaq_f32(YnV, t4, XnV);
+
+         s = vextq_f32(XnV,YnV,3);
+
+         dV.val[0] = vmlaq_f32(dV.val[1], s, b1V);
+         dV.val[0] = vmlaq_f32(dV.val[0], YnV, a1V);
+
+         dV.val[1] = vmulq_f32(s, b2V);
+         dV.val[1] = vmlaq_f32(dV.val[1], YnV, a2V);
+
+         *pOut++ = vgetq_lane_f32(YnV, 3) ;
+
+         sample--;
+      }
+     
+      /* Store the updated state variables back into the state array */
+      vst2q_f32(pState,dV);
+      pState += 8;
+
+      /* The current stage output is given as the input to the next stage */
+      pIn = pDst;
+
+      /*Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement the loop counter */
+      stageCnt--;
+
+   } 
+
+   /* Tail */
+   stageCnt = stage & 3;
+   
+   while (stageCnt > 0U)
+   {
+      /* Reading the coefficients */
+      b0 = *pCoeffs++;
+      b1 = *pCoeffs++;
+      b2 = *pCoeffs++;
+      a1 = *pCoeffs++;
+      a2 = *pCoeffs++;
+
+      /*Reading the state values */
+      d1 = pState[0];
+      d2 = pState[1];
+
+      sample = blockSize;
+
+      while (sample > 0U)
+      {
+         /* Read the input */
+         Xn1 = *pIn++;
+
+         /* y[n] = b0 * x[n] + d1 */
+         acc1 = (b0 * Xn1) + d1;
+
+         /* Store the result in the accumulator in the destination buffer. */
+         *pOut++ = acc1;
+
+         /* Every time after the output is computed state should be updated. */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         d1 = ((b1 * Xn1) + (a1 * acc1)) + d2;
+
+         /* d2 = b2 * x[n] + a2 * y[n] */
+         d2 = (b2 * Xn1) + (a2 * acc1);
+
+         /* decrement the loop counter */
+         sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      *pState++ = d1;
+      *pState++ = d2;
+
+      /* The current stage output is given as the input to the next stage */
+      pIn = pDst;
+
+      /*Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement the loop counter */
+      stageCnt--;
+   }
+}
+#else
+
+void arm_biquad_cascade_df2T_f32(
+  const arm_biquad_cascade_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc1;                                /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1;                                 /* Temporary input */
+        float32_t d1, d2;                              /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+  do
+  {
+     /* Reading the coefficients */
+     b0 = pCoeffs[0];
+     b1 = pCoeffs[1];
+     b2 = pCoeffs[2];
+     a1 = pCoeffs[3];
+     a2 = pCoeffs[4];
+
+     /* Reading the state values */
+     d1 = pState[0];
+     d2 = pState[1];
+
+     pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 16 outputs at a time */
+     sample = blockSize >> 4U;
+
+     while (sample > 0U) {
+
+       /* y[n] = b0 * x[n] + d1 */
+       /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+       /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+       Xn1 = *pIn++;
+
+       acc1 = b0 * Xn1 + d1;
+
+       d1 = b1 * Xn1 + d2;
+       d1 += a1 * acc1;
+
+       d2 = b2 * Xn1;
+       d2 += a2 * acc1;
+
+       *pOut++ = acc1;
+
+/*  2 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  3 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  4 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  5 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  6 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  7 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  8 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/*  9 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 10 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 11 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 12 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 13 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 14 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 15 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+/* 16 */
+         Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+        /* decrement loop counter */
+        sample--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      sample = blockSize & 0xFU;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (sample > 0U) {
+        Xn1 = *pIn++;
+
+        acc1 = b0 * Xn1 + d1;
+
+        d1 = b1 * Xn1 + d2;
+        d1 += a1 * acc1;
+
+        d2 = b2 * Xn1;
+        d2 += a2 * acc1;
+
+        *pOut++ = acc1;
+
+        /* decrement loop counter */
+        sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      pState[0] = d1;
+      pState[1] = d2;
+
+      pState += 2U;
+
+      /* The current stage output is given as the input to the next stage */
+      pIn = pDst;
+
+      /* Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement loop counter */
+      stage--;
+
+   } while (stage > 0U);
+
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
index 3d527a05..521f63b3 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_f64.c
@@ -1,443 +1,443 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df2T_f64.c
- * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
-*/
-
-/**
-  @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
-
-  This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
-  The filters are implemented as a cascade of second order Biquad sections.
-  These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
-  Only floating-point data is supported.
-
-  This function operate on blocks of input and output data and each call to the function
-  processes <code>blockSize</code> samples through the filter.
-  <code>pSrc</code> points to the array of input data and
-  <code>pDst</code> points to the array of output data.
-  Both arrays contain <code>blockSize</code> values.
-
-  @par           Algorithm
-                   Each Biquad stage implements a second order filter using the difference equation:
-  <pre>
-     y[n] = b0 * x[n] + d1
-     d1 = b1 * x[n] + a1 * y[n] + d2
-     d2 = b2 * x[n] + a2 * y[n]
-  </pre>
-                   where d1 and d2 represent the two state values.
-  @par
-                   A Biquad filter using a transposed Direct Form II structure is shown below.
-                   \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
-                   Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
-                   Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
-                   Pay careful attention to the sign of the feedback coefficients.
-                   Some design tools flip the sign of the feedback coefficients:
-  <pre>
-     y[n] = b0 * x[n] + d1;
-     d1 = b1 * x[n] - a1 * y[n] + d2;
-     d2 = b2 * x[n] - a2 * y[n];
-  </pre>
-                   In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
-  @par
-                   Higher order filters are realized as a cascade of second order sections.
-                   <code>numStages</code> refers to the number of second order stages used.
-                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
-                   A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
-                   coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
-  @par
-                   <code>pState</code> points to the state variable array.
-                   Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
-                   The state variables are arranged in the <code>pState</code> array as:
-  <pre>
-      {d11, d12, d21, d22, ...}
-  </pre>
-                   where <code>d1x</code> refers to the state variables for the first Biquad and
-                   <code>d2x</code> refers to the state variables for the second Biquad.
-                   The state array has a total length of <code>2*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
-  @par
-                   The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
-                   The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
-                   That is why the Direct Form I structure supports Q15 and Q31 data types.
-                   The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
-                   Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
-                   The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-
-  @par           Init Functions
-                   There is also an associated initialization function.
-                   The initialization function performs following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Set the values in the state buffer to zeros before static initialization.
-                   For example, to statically initialize the instance structure use
-  <pre>
-      arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
-      arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
-  </pre>
-                   where <code>numStages</code> is the number of Biquad stages in the filter;
-                   <code>pState</code> is the address of the state buffer.
-                   <code>pCoeffs</code> is the address of the coefficient buffer;
-*/
-
-/**
-  @addtogroup BiquadCascadeDF2T
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
-  @param[in]     S         points to an instance of the filter data structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process
-  @return        none
- */
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_df2T_f64(
-  const arm_biquad_cascade_df2T_instance_f64 * S,
-        float64_t * pSrc,
-        float64_t * pDst,
-        uint32_t blockSize)
-{
-
-        float64_t *pIn = pSrc;                         /* Source pointer */
-        float64_t *pOut = pDst;                        /* Destination pointer */
-        float64_t *pState = S->pState;                 /* State pointer */
-        float64_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float64_t acc1;                                /* Accumulator */
-        float64_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
-        float64_t Xn1;                                 /* Temporary input */
-        float64_t d1, d2;                              /* State variables */
-        uint32_t sample, stage = S->numStages;         /* Loop counters */
-
-
-   do
-   {
-      /* Reading the coefficients */
-      b0 = pCoeffs[0];
-      b1 = pCoeffs[1];
-      b2 = pCoeffs[2];
-      a1 = pCoeffs[3];
-      a2 = pCoeffs[4];
-
-      /* Reading the state values */
-      d1 = pState[0];
-      d2 = pState[1];
-
-      pCoeffs += 5U;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 16 outputs at a time */
-      sample = blockSize >> 4U;
-
-      while (sample > 0U) {
-
-         /* y[n] = b0 * x[n] + d1 */
-         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-         /* d2 = b2 * x[n] + a2 * y[n] */
-
-/*  1 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-
-/*  2 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/*  3 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/*  4 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/*  5 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/*  6 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/*  7 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/*  8 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/*  9 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/* 10 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/* 11 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/* 12 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/* 13 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/* 14 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/* 15 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-/* 16 */
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-         /* decrement loop counter */
-         sample--;
-      }
-
-    /* Loop unrolling: Compute remaining outputs */
-      sample = blockSize & 0xFU;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (sample > 0U) {
-         Xn1 = *pIn++;
-
-         acc1 = b0 * Xn1 + d1;
-
-         d1 = b1 * Xn1 + d2;
-         d1 += a1 * acc1;
-
-         d2 = b2 * Xn1;
-         d2 += a2 * acc1;
-
-         *pOut++ = acc1;
-
-         /* decrement loop counter */
-         sample--;
-      }
-
-      /* Store the updated state variables back into the state array */
-      pState[0] = d1;
-      pState[1] = d2;
-
-      pState += 2U;
-
-      /* The current stage input is given as the output to the next stage */
-      pIn = pDst;
-
-      /* Reset the output working pointer */
-      pOut = pDst;
-
-      /* decrement loop counter */
-      stage--;
-
-   } while (stage > 0U);
-
-}
-LOW_OPTIMIZATION_EXIT
-
-/**
-  @} end of BiquadCascadeDF2T group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_f64.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @defgroup BiquadCascadeDF2T Biquad Cascade IIR Filters Using a Direct Form II Transposed Structure
+
+  This set of functions implements arbitrary order recursive (IIR) filters using a transposed direct form II structure.
+  The filters are implemented as a cascade of second order Biquad sections.
+  These functions provide a slight memory savings as compared to the direct form I Biquad filter functions.
+  Only floating-point data is supported.
+
+  This function operate on blocks of input and output data and each call to the function
+  processes <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to the array of input data and
+  <code>pDst</code> points to the array of output data.
+  Both arrays contain <code>blockSize</code> values.
+
+  @par           Algorithm
+                   Each Biquad stage implements a second order filter using the difference equation:
+  <pre>
+     y[n] = b0 * x[n] + d1
+     d1 = b1 * x[n] + a1 * y[n] + d2
+     d2 = b2 * x[n] + a2 * y[n]
+  </pre>
+                   where d1 and d2 represent the two state values.
+  @par
+                   A Biquad filter using a transposed Direct Form II structure is shown below.
+                   \image html BiquadDF2Transposed.gif "Single transposed Direct Form II Biquad"
+                   Coefficients <code>b0, b1, and b2 </code> multiply the input signal <code>x[n]</code> and are referred to as the feedforward coefficients.
+                   Coefficients <code>a1</code> and <code>a2</code> multiply the output signal <code>y[n]</code> and are referred to as the feedback coefficients.
+                   Pay careful attention to the sign of the feedback coefficients.
+                   Some design tools flip the sign of the feedback coefficients:
+  <pre>
+     y[n] = b0 * x[n] + d1;
+     d1 = b1 * x[n] - a1 * y[n] + d2;
+     d2 = b2 * x[n] - a2 * y[n];
+  </pre>
+                   In this case the feedback coefficients <code>a1</code> and <code>a2</code> must be negated when used with the CMSIS DSP Library.
+  @par
+                   Higher order filters are realized as a cascade of second order sections.
+                   <code>numStages</code> refers to the number of second order stages used.
+                   For example, an 8th order filter would be realized with <code>numStages=4</code> second order stages.
+                   A 9th order filter would be realized with <code>numStages=5</code> second order stages with the
+                   coefficients for one of the stages configured as a first order filter (<code>b2=0</code> and <code>a2=0</code>).
+  @par
+                   <code>pState</code> points to the state variable array.
+                   Each Biquad stage has 2 state variables <code>d1</code> and <code>d2</code>.
+                   The state variables are arranged in the <code>pState</code> array as:
+  <pre>
+      {d11, d12, d21, d22, ...}
+  </pre>
+                   where <code>d1x</code> refers to the state variables for the first Biquad and
+                   <code>d2x</code> refers to the state variables for the second Biquad.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+  @par
+                   The CMSIS library contains Biquad filters in both Direct Form I and transposed Direct Form II.
+                   The advantage of the Direct Form I structure is that it is numerically more robust for fixed-point data types.
+                   That is why the Direct Form I structure supports Q15 and Q31 data types.
+                   The transposed Direct Form II structure, on the other hand, requires a wide dynamic range for the state variables <code>d1</code> and <code>d2</code>.
+                   Because of this, the CMSIS library only has a floating-point version of the Direct Form II Biquad.
+                   The advantage of the Direct Form II Biquad is that it requires half the number of state variables, 2 rather than 4, per Biquad stage.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+
+  @par           Init Functions
+                   There is also an associated initialization function.
+                   The initialization function performs following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   For example, to statically initialize the instance structure use
+  <pre>
+      arm_biquad_cascade_df2T_instance_f64 S1 = {numStages, pState, pCoeffs};
+      arm_biquad_cascade_df2T_instance_f32 S1 = {numStages, pState, pCoeffs};
+  </pre>
+                   where <code>numStages</code> is the number of Biquad stages in the filter;
+                   <code>pState</code> is the address of the state buffer.
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+
+void arm_biquad_cascade_df2T_f64(
+  const arm_biquad_cascade_df2T_instance_f64 * S,
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+
+        const float64_t *pIn = pSrc;                   /* Source pointer */
+        float64_t *pOut = pDst;                        /* Destination pointer */
+        float64_t *pState = S->pState;                 /* State pointer */
+        const float64_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float64_t acc1;                                /* Accumulator */
+        float64_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float64_t Xn1;                                 /* Temporary input */
+        float64_t d1, d2;                              /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+
+   do
+   {
+      /* Reading the coefficients */
+      b0 = pCoeffs[0];
+      b1 = pCoeffs[1];
+      b2 = pCoeffs[2];
+      a1 = pCoeffs[3];
+      a2 = pCoeffs[4];
+
+      /* Reading the state values */
+      d1 = pState[0];
+      d2 = pState[1];
+
+      pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 16 outputs at a time */
+      sample = blockSize >> 4U;
+
+      while (sample > 0U) {
+
+         /* y[n] = b0 * x[n] + d1 */
+         /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+         /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+
+/*  2 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  3 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  4 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  5 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  6 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  7 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  8 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/*  9 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 10 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 11 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 12 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 13 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 14 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 15 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+/* 16 */
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+         /* decrement loop counter */
+         sample--;
+      }
+
+    /* Loop unrolling: Compute remaining outputs */
+      sample = blockSize & 0xFU;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (sample > 0U) {
+         Xn1 = *pIn++;
+
+         acc1 = b0 * Xn1 + d1;
+
+         d1 = b1 * Xn1 + d2;
+         d1 += a1 * acc1;
+
+         d2 = b2 * Xn1;
+         d2 += a2 * acc1;
+
+         *pOut++ = acc1;
+
+         /* decrement loop counter */
+         sample--;
+      }
+
+      /* Store the updated state variables back into the state array */
+      pState[0] = d1;
+      pState[1] = d2;
+
+      pState += 2U;
+
+      /* The current stage output is given as the input to the next stage */
+      pIn = pDst;
+
+      /* Reset the output working pointer */
+      pOut = pDst;
+
+      /* decrement loop counter */
+      stage--;
+
+   } while (stage > 0U);
+
+}
+
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f16.c
new file mode 100755
index 00000000..3f619e56
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f16.c
@@ -0,0 +1,114 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_init_f16.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order
+                   in the not Neon version.
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+                   
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+
+                   For Neon version, this array is bigger. If numstages = 4x + y, then the array has size:
+                   32*x + 5*y
+                   and it must be initialized using the function
+                   arm_biquad_cascade_df2T_compute_coefs_f16 which is taking the
+                   standard array coefficient as parameters.
+
+                   But, an array of 8*numstages is a good approximation.
+
+                   Then, the initialization can be done with:
+  <pre>
+                   arm_biquad_cascade_df2T_init_f16(&SNeon, nbCascade, neonCoefs, stateNeon);
+                   arm_biquad_cascade_df2T_compute_coefs_f16(&SNeon,nbCascade,coefs);
+  </pre>
+
+  @par             In this example, neonCoefs is a bigger array of size 8 * numStages.
+                   coefs is the standard array:
+
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+
+
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df2T_init_f16(
+        arm_biquad_cascade_df2T_instance_f16 * S,
+        uint8_t numStages,
+  const float16_t * pCoeffs,
+        float16_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 2 * numStages */
+  memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float16_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
index 1da7f3ec..e3b350c3 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f32.c
@@ -1,211 +1,214 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df2T_init_f32.c
- * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF2T
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-  @param[in,out] S           points to an instance of the filter data structure.
-  @param[in]     numStages   number of 2nd order stages in the filter.
-  @param[in]     pCoeffs     points to the filter coefficients.
-  @param[in]     pState      points to the state buffer.
-  @return        none
-
-  @par           Coefficient and State Ordering
-                   The coefficients are stored in the array <code>pCoeffs</code> in the following order
-                   in the not Neon version.
-  <pre>
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-  </pre>
-                   
-  @par
-                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
-                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
-                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
-
-                   For Neon version, this array is bigger. If numstages = 4x + y, then the array has size:
-                   32*x + 5*y
-                   and it must be initialized using the function
-                   arm_biquad_cascade_df2T_compute_coefs_f32 which is taking the
-                   standard array coefficient as parameters.
-
-                   But, an array of 8*numstages is a good approximation.
-
-                   Then, the initialization can be done with:
-  <pre>
-                   arm_biquad_cascade_df2T_init_f32(&SNeon, nbCascade, neonCoefs, stateNeon);
-                   arm_biquad_cascade_df2T_compute_coefs_f32(&SNeon,nbCascade,coefs);
-  </pre>
-
-  @par             In this example, neonCoefs is a bigger array of size 8 * numStages.
-                   coefs is the standard array:
-
-  <pre>
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-  </pre>
-
-
-  @par
-                   The <code>pState</code> is a pointer to state array.
-                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
-                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
-                   The state array has a total length of <code>2*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
- */
-
-#if defined(ARM_MATH_NEON) 
-/*
-
-Must be called after initializing the biquad instance.
-pCoeffs has size 5 * nbCascade
-Whereas the pCoeffs for the init has size (4*4 + 4*4)* nbCascade 
-
-So this pCoeffs is the one which would be used for the not Neon version.
-The pCoeffs passed in init is bigger than the one for the not Neon version.
-
-*/
-void arm_biquad_cascade_df2T_compute_coefs_f32(
-  arm_biquad_cascade_df2T_instance_f32 * S,
-  uint8_t numStages,
-  float32_t * pCoeffs)
-{
-   uint8_t cnt;
-   float32_t *pDstCoeffs;
-   float32_t b0[4],b1[4],b2[4],a1[4],a2[4];
-
-   pDstCoeffs = S->pCoeffs;
-
-   cnt = numStages >> 2; 
-   while(cnt > 0)
-   {
-      for(int i=0;i<4;i++)
-      {
-        b0[i] = pCoeffs[0];
-        b1[i] = pCoeffs[1];
-        b2[i] = pCoeffs[2];
-        a1[i] = pCoeffs[3];
-        a2[i] = pCoeffs[4];
-        pCoeffs += 5;
-      }
-
-      /* Vec 1 */
-      *pDstCoeffs++ = 0;
-      *pDstCoeffs++ = b0[1];
-      *pDstCoeffs++ = b0[2];
-      *pDstCoeffs++ = b0[3];
-
-      /* Vec 2 */
-      *pDstCoeffs++ = 0;
-      *pDstCoeffs++ = 0;
-      *pDstCoeffs++ = b0[1] * b0[2];
-      *pDstCoeffs++ = b0[2] * b0[3];
-
-      /* Vec 3 */
-      *pDstCoeffs++ = 0;
-      *pDstCoeffs++ = 0;
-      *pDstCoeffs++ = 0;
-      *pDstCoeffs++ = b0[1] * b0[2] * b0[3];
-      
-      /* Vec 4 */
-      *pDstCoeffs++ = b0[0];
-      *pDstCoeffs++ = b0[0] * b0[1];
-      *pDstCoeffs++ = b0[0] * b0[1] * b0[2];
-      *pDstCoeffs++ = b0[0] * b0[1] * b0[2] * b0[3];
-
-      /* Vec 5 */
-      *pDstCoeffs++ = b1[0];
-      *pDstCoeffs++ = b1[1];
-      *pDstCoeffs++ = b1[2];
-      *pDstCoeffs++ = b1[3];
-
-      /* Vec 6 */
-      *pDstCoeffs++ = b2[0];
-      *pDstCoeffs++ = b2[1];
-      *pDstCoeffs++ = b2[2];
-      *pDstCoeffs++ = b2[3];
-
-      /* Vec 7 */
-      *pDstCoeffs++ = a1[0];
-      *pDstCoeffs++ = a1[1];
-      *pDstCoeffs++ = a1[2];
-      *pDstCoeffs++ = a1[3];
-
-      /* Vec 8 */
-      *pDstCoeffs++ = a2[0];
-      *pDstCoeffs++ = a2[1];
-      *pDstCoeffs++ = a2[2];
-      *pDstCoeffs++ = a2[3];
-
-      cnt--;
-   }
-
-   cnt = numStages & 0x3;
-   while(cnt > 0)
-   {
-      *pDstCoeffs++ = *pCoeffs++;
-      *pDstCoeffs++ = *pCoeffs++;
-      *pDstCoeffs++ = *pCoeffs++;
-      *pDstCoeffs++ = *pCoeffs++;
-      *pDstCoeffs++ = *pCoeffs++;
-      cnt--;
-   }
-
-}
-#endif 
-
-void arm_biquad_cascade_df2T_init_f32(
-        arm_biquad_cascade_df2T_instance_f32 * S,
-        uint8_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 2 * numStages */
-  memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of BiquadCascadeDF2T group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_init_f32.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+
+
+#if defined(ARM_MATH_NEON) 
+/**
+  @brief         Compute new coefficient arrays for use in vectorized filter (Neon only).
+  @param[in]     numStages         number of 2nd order stages in the filter.
+  @param[in]     pCoeffs           points to the original filter coefficients.
+  @param[in]     pComputedCoeffs   points to the new computed coefficients for the vectorized Neon version.
+  @return        none
+
+  @par   Size of coefficient arrays:
+            pCoeffs has size 5 * numStages 
+
+            pComputedCoeffs has size 8 * numStages
+
+            pComputedCoeffs is the array to be used in arm_biquad_cascade_df2T_init_f32.
+
+*/
+void arm_biquad_cascade_df2T_compute_coefs_f32(
+  uint8_t numStages,
+  const float32_t * pCoeffs,
+  float32_t * pComputedCoeffs)
+{
+   uint8_t cnt;
+   float32_t b0[4],b1[4],b2[4],a1[4],a2[4];
+
+   cnt = numStages >> 2; 
+   while(cnt > 0)
+   {
+      for(int i=0;i<4;i++)
+      {
+        b0[i] = pCoeffs[0];
+        b1[i] = pCoeffs[1];
+        b2[i] = pCoeffs[2];
+        a1[i] = pCoeffs[3];
+        a2[i] = pCoeffs[4];
+        pCoeffs += 5;
+      }
+
+      /* Vec 1 */
+      *pComputedCoeffs++ = 0;
+      *pComputedCoeffs++ = b0[1];
+      *pComputedCoeffs++ = b0[2];
+      *pComputedCoeffs++ = b0[3];
+
+      /* Vec 2 */
+      *pComputedCoeffs++ = 0;
+      *pComputedCoeffs++ = 0;
+      *pComputedCoeffs++ = b0[1] * b0[2];
+      *pComputedCoeffs++ = b0[2] * b0[3];
+
+      /* Vec 3 */
+      *pComputedCoeffs++ = 0;
+      *pComputedCoeffs++ = 0;
+      *pComputedCoeffs++ = 0;
+      *pComputedCoeffs++ = b0[1] * b0[2] * b0[3];
+      
+      /* Vec 4 */
+      *pComputedCoeffs++ = b0[0];
+      *pComputedCoeffs++ = b0[0] * b0[1];
+      *pComputedCoeffs++ = b0[0] * b0[1] * b0[2];
+      *pComputedCoeffs++ = b0[0] * b0[1] * b0[2] * b0[3];
+
+      /* Vec 5 */
+      *pComputedCoeffs++ = b1[0];
+      *pComputedCoeffs++ = b1[1];
+      *pComputedCoeffs++ = b1[2];
+      *pComputedCoeffs++ = b1[3];
+
+      /* Vec 6 */
+      *pComputedCoeffs++ = b2[0];
+      *pComputedCoeffs++ = b2[1];
+      *pComputedCoeffs++ = b2[2];
+      *pComputedCoeffs++ = b2[3];
+
+      /* Vec 7 */
+      *pComputedCoeffs++ = a1[0];
+      *pComputedCoeffs++ = a1[1];
+      *pComputedCoeffs++ = a1[2];
+      *pComputedCoeffs++ = a1[3];
+
+      /* Vec 8 */
+      *pComputedCoeffs++ = a2[0];
+      *pComputedCoeffs++ = a2[1];
+      *pComputedCoeffs++ = a2[2];
+      *pComputedCoeffs++ = a2[3];
+
+      cnt--;
+   }
+
+   cnt = numStages & 0x3;
+   while(cnt > 0)
+   {
+      *pComputedCoeffs++ = *pCoeffs++;
+      *pComputedCoeffs++ = *pCoeffs++;
+      *pComputedCoeffs++ = *pCoeffs++;
+      *pComputedCoeffs++ = *pCoeffs++;
+      *pComputedCoeffs++ = *pCoeffs++;
+      cnt--;
+   }
+
+}
+#endif 
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order
+                   in the not Neon version.
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+                   
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+
+                   For Neon version, this array is bigger. If numstages = 4x + y, then the array has size:
+                   32*x + 5*y
+                   and it must be initialized using the function
+                   arm_biquad_cascade_df2T_compute_coefs_f32 which is taking the
+                   standard array coefficient as parameters.
+
+                   But, an array of 8*numstages is a good approximation.
+
+                   Then, the initialization can be done with:
+  <pre>
+                   arm_biquad_cascade_df2T_compute_coefs_f32(nbCascade,coefs,computedCoefs);
+                   arm_biquad_cascade_df2T_init_f32(&SNeon, nbCascade, computedCoefs, stateNeon);
+  </pre>
+
+  @par             In this example, computedCoefs is a bigger array of size 8 * numStages.
+                   coefs is the standard array:
+
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+
+
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+void arm_biquad_cascade_df2T_init_f32(
+        arm_biquad_cascade_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 2 * numStages */
+  memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
index 6d17878f..5ab1c9a2 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_df2T_init_f64.c
@@ -1,86 +1,86 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_df2T_init_f64.c
- * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF2T
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-  @param[in,out] S           points to an instance of the filter data structure
-  @param[in]     numStages   number of 2nd order stages in the filter
-  @param[in]     pCoeffs     points to the filter coefficients
-  @param[in]     pState      points to the state buffer
-  @return        none
-
-  @par           Coefficient and State Ordering
-                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
-  <pre>
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-  </pre>
-  @par
-                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
-                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
-                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
-  @par
-                   The <code>pState</code> is a pointer to state array.
-                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
-                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
-                   The state array has a total length of <code>2*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
- */
-
-void arm_biquad_cascade_df2T_init_f64(
-        arm_biquad_cascade_df2T_instance_f64 * S,
-        uint8_t numStages,
-        float64_t * pCoeffs,
-        float64_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 2 * numStages */
-  memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float64_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of BiquadCascadeDF2T group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_df2T_init_f64.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure
+  @param[in]     numStages   number of 2nd order stages in the filter
+  @param[in]     pCoeffs     points to the filter coefficients
+  @param[in]     pState      points to the state buffer
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code>.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_df2T_init_f64(
+        arm_biquad_cascade_df2T_instance_f64 * S,
+        uint8_t numStages,
+        const float64_t * pCoeffs,
+        float64_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 2 * numStages */
+  memset(pState, 0, (2U * (uint32_t) numStages) * sizeof(float64_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f16.c
new file mode 100755
index 00000000..60caf8d2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f16.c
@@ -0,0 +1,434 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_stereo_df2T_f16.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H)
+#pragma GCC warning "Scalar version of arm_biquad_cascade_stereo_df2T_f16 built. Helium version has build issues with gcc."
+#endif 
+
+#if (defined(ARM_MATH_MVE_FLOAT16) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE) && !defined(__CMSIS_GCC_H)
+void arm_biquad_cascade_stereo_df2T_f16(
+  const arm_biquad_cascade_stereo_df2T_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    float16_t *pIn = (float16_t *)pSrc;      /*  source pointer            */
+    float16_t *pOut = pDst;     /*  destination pointer       */
+    float16_t *pState = S->pState;  /*  State pointer             */
+    const float16_t *pCoeffs = S->pCoeffs;    /*  coefficient pointer       */
+    float16_t b0, b1, b2, a1, a2;   /*  Filter coefficients       */
+    uint32_t  sample, stage = S->numStages; /*  loop counters             */
+    static const uint16_t idx2[] = {2, 3, 8, 9, 2, 3, 8, 9};
+    f16x8_t aCoeffs, bCoeffs;
+    float16_t scratch[16];
+    uint16x8_t loadIdxVec;
+    uint16x8_t reshufledIdxVec;
+    uint16_t  startIdx = 0;
+    f16x8_t stateVec0, stateVec1;
+    f16x8_t inVec;
+
+    /*
+     * {0, 1, 0, 1, 0, 1, 0, 1} generator
+     */
+    loadIdxVec = viwdupq_u16(startIdx, 2, 1);
+    reshufledIdxVec = *(uint16x8_t *)&idx2;
+
+    /*
+     * scratch top clearing
+     * layout : [d1a d1b d2a d2b d1a d1b d2a d2b 0 0]
+     */
+    scratch[8] = (float16_t)0.0;
+    scratch[9] = (float16_t)0.0;
+
+    do
+    {
+        /*
+         * Reading the coefficients
+         */
+        b0 = *pCoeffs++;
+        b1 = *pCoeffs++;
+        b2 = *pCoeffs++;
+        a1 = *pCoeffs++;
+        a2 = *pCoeffs++;
+
+        /* aCoeffs = {a1 a1 a2 a2 a1 a1 a2 a2} */
+        aCoeffs = vdupq_n_f16(a1);
+        aCoeffs = vsetq_lane(a2, aCoeffs, 2);
+        aCoeffs = vsetq_lane(a2, aCoeffs, 3);
+        aCoeffs = vsetq_lane(a2, aCoeffs, 6);
+        aCoeffs = vsetq_lane(a2, aCoeffs, 7);
+
+        /* bCoeffs = {b1 b1 b2 b2 b1 b1 b2 b2} */
+        bCoeffs = vdupq_n_f16(b1);
+        bCoeffs = vsetq_lane(b2, bCoeffs, 2);
+        bCoeffs = vsetq_lane(b2, bCoeffs, 3);
+        bCoeffs = vsetq_lane(b2, bCoeffs, 6);
+        bCoeffs = vsetq_lane(b2, bCoeffs, 7);
+
+        /*
+         * Reading the state values
+         * Save into scratch
+         */
+        *(f16x8_t *) scratch = *(f16x8_t *) pState;
+
+        sample = blockSize;
+
+        while (sample > 0U)
+        {
+            /*
+             * step 1
+             *
+             * 0   | acc1a = xn1a * b0 + d1a
+             * 1   | acc1b = xn1b * b0 + d1b
+             * 2   | acc1a = xn1a * b0 + d1a
+             * 3   | acc1b = xn1b * b0 + d1b
+             * 4   |   <repeat>
+             * 5   |   ...
+             */
+
+            /*
+             * load {d1a, d1b, d1a, d1b, d1a, d1b, d1a, d1b}
+             */
+            stateVec0 = vldrhq_gather_shifted_offset((float16_t const *) scratch, loadIdxVec);
+            /*
+             * load {in0 in1 in0 in1 in0 in1 in0 in1}
+             */
+            inVec = vldrhq_gather_shifted_offset_f16(pIn, loadIdxVec);
+
+            stateVec0 = vfmaq(stateVec0, inVec, b0);
+            *pOut++ = vgetq_lane(stateVec0, 0);
+            *pOut++ = vgetq_lane(stateVec0, 1);
+
+            /*
+             * step 2
+             *
+             * 0  | d1a = b1 * xn1a  +  a1 * acc1a  +  d2a
+             * 1  | d1b = b1 * xn1b  +  a1 * acc1b  +  d2b
+             * 2  | d2a = b2 * xn1a  +  a2 * acc1a  +  0
+             * 3  | d2b = b2 * xn1b  +  a2 * acc1b  +  0
+             * 4  |   <repeat>
+             * 5  |   ...
+             */
+
+            /*
+             * load {d2a, d2b, 0, 0, d2a, d2b, 0, 0}
+             */
+            stateVec1 = vldrhq_gather_shifted_offset((float16_t const *) scratch, reshufledIdxVec);
+            stateVec1 = vfmaq(stateVec1, stateVec0, aCoeffs);
+            stateVec1 = vfmaq(stateVec1, inVec, bCoeffs);
+            *(f16x8_t *) scratch = stateVec1;
+
+            pIn = pIn + 2;
+            sample--;
+        }
+
+        /*
+         * Store the updated state variables back into the state array
+         */
+         *pState++ = vgetq_lane(stateVec1, 0);
+         *pState++ = vgetq_lane(stateVec1, 1);
+         *pState++ = vgetq_lane(stateVec1, 2);
+         *pState++ = vgetq_lane(stateVec1, 3);
+
+        /*
+         * The current stage input is given as the output to the next stage
+         */
+        pIn = pDst;
+        /*
+         * Reset the output working pointer
+         */
+        pOut = pDst;
+        /*
+         * decrement the loop counter
+         */
+        stage--;
+    }
+    while (stage > 0U);
+}
+#else
+
+void arm_biquad_cascade_stereo_df2T_f16(
+  const arm_biquad_cascade_stereo_df2T_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+  const float16_t *pIn = pSrc;                         /* Source pointer */
+        float16_t *pOut = pDst;                        /* Destination pointer */
+        float16_t *pState = S->pState;                 /* State pointer */
+  const float16_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        _Float16 acc1a, acc1b;                        /* Accumulator */
+        _Float16 b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        _Float16 Xn1a, Xn1b;                          /* Temporary input */
+        _Float16 d1a, d2a, d1b, d2b;                  /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+    do
+    {
+        /* Reading the coefficients */
+        b0 = pCoeffs[0];
+        b1 = pCoeffs[1];
+        b2 = pCoeffs[2];
+        a1 = pCoeffs[3];
+        a2 = pCoeffs[4];
+
+        /* Reading the state values */
+        d1a = pState[0];
+        d2a = pState[1];
+        d1b = pState[2];
+        d2b = pState[3];
+
+        pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 8 outputs at a time */
+        sample = blockSize >> 3U;
+
+        while (sample > 0U) {
+          /* y[n] = b0 * x[n] + d1 */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  2 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  3 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  4 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  5 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  6 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  7 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  8 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+          /* decrement loop counter */
+          sample--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        sample = blockSize & 0x7U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (sample > 0U) {
+          /* Read the input */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          /* y[n] = b0 * x[n] + d1 */
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          /* Store the result in the accumulator in the destination buffer. */
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          /* Every time after the output is computed state should be updated. */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          /* d2 = b2 * x[n] + a2 * y[n] */
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+          /* decrement loop counter */
+          sample--;
+        }
+
+        /* Store the updated state variables back into the state array */
+        pState[0] = d1a;
+        pState[1] = d2a;
+
+        pState[2] = d1b;
+        pState[3] = d2b;
+
+        pState += 4U;
+
+        /* The current stage output is given as the input to the next stage */
+        pIn = pDst;
+
+        /* Reset the output working pointer */
+        pOut = pDst;
+
+        /* Decrement the loop counter */
+        stage--;
+
+    } while (stage > 0U);
+
+}
+
+#endif /* #if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of BiquadCascadeDF2T group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
index 1b972620..ddd15462 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_f32.c
@@ -1,285 +1,420 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_stereo_df2T_f32.c
- * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
-*/
-
-/**
-  @addtogroup BiquadCascadeDF2T
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
-  @param[in]     S         points to an instance of the filter data structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process
-  @return        none
- */
-
-LOW_OPTIMIZATION_ENTER
-void arm_biquad_cascade_stereo_df2T_f32(
-  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-  const float32_t *pIn = pSrc;                         /* Source pointer */
-        float32_t *pOut = pDst;                        /* Destination pointer */
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t acc1a, acc1b;                        /* Accumulator */
-        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
-        float32_t Xn1a, Xn1b;                          /* Temporary input */
-        float32_t d1a, d2a, d1b, d2b;                  /* State variables */
-        uint32_t sample, stage = S->numStages;         /* Loop counters */
-
-    do
-    {
-        /* Reading the coefficients */
-        b0 = pCoeffs[0];
-        b1 = pCoeffs[1];
-        b2 = pCoeffs[2];
-        a1 = pCoeffs[3];
-        a2 = pCoeffs[4];
-
-        /* Reading the state values */
-        d1a = pState[0];
-        d2a = pState[1];
-        d1b = pState[2];
-        d2b = pState[3];
-
-        pCoeffs += 5U;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 8 outputs at a time */
-        sample = blockSize >> 3U;
-
-        while (sample > 0U) {
-          /* y[n] = b0 * x[n] + d1 */
-          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-          /* d2 = b2 * x[n] + a2 * y[n] */
-
-/*  1 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-/*  2 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-/*  3 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-/*  4 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-/*  5 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-/*  6 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-/*  7 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-/*  8 */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-          /* decrement loop counter */
-          sample--;
-        }
-
-        /* Loop unrolling: Compute remaining outputs */
-        sample = blockSize & 0x7U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        sample = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (sample > 0U) {
-          /* Read the input */
-          Xn1a = *pIn++; /* Channel a */
-          Xn1b = *pIn++; /* Channel b */
-
-          /* y[n] = b0 * x[n] + d1 */
-          acc1a = (b0 * Xn1a) + d1a;
-          acc1b = (b0 * Xn1b) + d1b;
-
-          /* Store the result in the accumulator in the destination buffer. */
-          *pOut++ = acc1a;
-          *pOut++ = acc1b;
-
-          /* Every time after the output is computed state should be updated. */
-          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
-          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
-          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
-
-          /* d2 = b2 * x[n] + a2 * y[n] */
-          d2a = (b2 * Xn1a) + (a2 * acc1a);
-          d2b = (b2 * Xn1b) + (a2 * acc1b);
-
-          /* decrement loop counter */
-          sample--;
-        }
-
-        /* Store the updated state variables back into the state array */
-        pState[0] = d1a;
-        pState[1] = d2a;
-
-        pState[2] = d1b;
-        pState[3] = d2b;
-
-        pState += 4U;
-
-        /* The current stage input is given as the output to the next stage */
-        pIn = pDst;
-
-        /* Reset the output working pointer */
-        pOut = pDst;
-
-        /* Decrement the loop counter */
-        stage--;
-
-    } while (stage > 0U);
-
-}
-LOW_OPTIMIZATION_EXIT
-/**
-  @} end of BiquadCascadeDF2T group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_stereo_df2T_f32.c
+ * Description:  Processing function for floating-point transposed direct form II Biquad cascade filter. 2 channels
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+*/
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in]     S         points to an instance of the filter data structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+#if (defined(ARM_MATH_MVEF) && defined(ARM_MATH_HELIUM_EXPERIMENTAL)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+
+void arm_biquad_cascade_stereo_df2T_f32(
+  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    const float32_t *pIn = pSrc;              /*  source pointer            */
+    float32_t *pOut = pDst;             /*  destination pointer       */
+    float32_t *pState = S->pState;      /*  State pointer             */
+    const float32_t *pCoeffs = S->pCoeffs;    /*  coefficient pointer       */
+    float32_t b0, b1, b2, a1, a2;       /*  Filter coefficients       */
+    uint32_t  sample, stage = S->numStages; /*  loop counters           */
+    float32_t scratch[6];
+    uint32x4_t loadIdxVec;
+    f32x4_t aCoeffs, bCoeffs;
+    f32x4_t stateVec0, stateVec1;
+    f32x4_t inVec;
+    uint32_t  startIdx = 0;
+
+    /*
+     * {0, 1, 0, 1} generator
+     */
+    loadIdxVec = viwdupq_u32(&startIdx, 2, 1);
+
+    /*
+     * scratch top clearing
+     * layout : [d1a d1b d2a d2b 0 0]
+     */
+    scratch[4] = 0.0f;
+    scratch[5] = 0.0f;
+
+    do
+    {
+        /*
+         * Reading the coefficients
+         */
+        b0 = *pCoeffs++;
+        b1 = *pCoeffs++;
+        b2 = *pCoeffs++;
+        a1 = *pCoeffs++;
+        a2 = *pCoeffs++;
+
+        /*
+         * aCoeffs = {a1 a1 a2 a2}
+         */
+        aCoeffs = vdupq_n_f32(a1);
+        aCoeffs = vsetq_lane(a2, aCoeffs, 2);
+        aCoeffs = vsetq_lane(a2, aCoeffs, 3);
+
+        /*
+         * bCoeffs = {b1 b1 b2 b2}
+         */
+        bCoeffs = vdupq_n_f32(b1);
+        bCoeffs = vsetq_lane(b2, bCoeffs, 2);
+        bCoeffs = vsetq_lane(b2, bCoeffs, 3);
+
+        /*
+         * Reading the state values
+         * Save into scratch
+         */
+        *(f32x4_t *) scratch = *(f32x4_t *) pState;
+
+        sample = blockSize;
+
+        while (sample > 0U)
+        {
+            /*
+             * step 1
+             *
+             * 0   | acc1a = xn1a * b0 + d1a
+             * 1   | acc1b = xn1b * b0 + d1b
+             * 2   | acc1a = xn1a * b0 + d1a
+             * 3   | acc1b = xn1b * b0 + d1b
+             */
+            /*
+             * load {d1a, d1b, d1a, d1b}
+             */
+            stateVec0 = (f32x4_t)vldrwq_gather_shifted_offset((uint32_t const *) scratch, loadIdxVec);
+            /*
+             * load {in0 in1 in0 in1}
+             */
+            inVec = (f32x4_t)vldrwq_gather_shifted_offset((uint32_t const *) pIn, loadIdxVec);
+
+            stateVec0 = vfmaq(stateVec0, inVec, b0);
+            *pOut++ = vgetq_lane(stateVec0, 0);
+            *pOut++ = vgetq_lane(stateVec0, 1);
+
+            /*
+             * step 2
+             *
+             * 0  | d1a = b1 * xn1a  +  a1 * acc1a  +  d2a
+             * 1  | d1b = b1 * xn1b  +  a1 * acc1b  +  d2b
+             * 2  | d2a = b2 * xn1a  +  a2 * acc1a  +  0
+             * 3  | d2b = b2 * xn1b  +  a2 * acc1b  +  0
+             */
+
+            /*
+             * load {d2a, d2b, 0, 0}
+             */
+            stateVec1 = *(f32x4_t *) & scratch[2];
+            stateVec1 = vfmaq(stateVec1, stateVec0, aCoeffs);
+            stateVec1 = vfmaq(stateVec1, inVec, bCoeffs);
+            *(f32x4_t *) scratch = stateVec1;
+
+            pIn = pIn + 2;
+            sample--;
+        }
+
+        /*
+         * Store the updated state variables back into the state array
+         */
+        vst1q(pState, stateVec1);
+        pState += 4;
+
+        /*
+         * The current stage output is given as the input to the next stage
+         */
+        pIn = pDst;
+        /*
+         * Reset the output working pointer
+         */
+        pOut = pDst;
+        /*
+         * decrement the loop counter
+         */
+        stage--;
+    }
+    while (stage > 0U);
+}
+
+#else
+
+void arm_biquad_cascade_stereo_df2T_f32(
+  const arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+        float32_t *pOut = pDst;                        /* Destination pointer */
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t acc1a, acc1b;                        /* Accumulator */
+        float32_t b0, b1, b2, a1, a2;                  /* Filter coefficients */
+        float32_t Xn1a, Xn1b;                          /* Temporary input */
+        float32_t d1a, d2a, d1b, d2b;                  /* State variables */
+        uint32_t sample, stage = S->numStages;         /* Loop counters */
+
+    do
+    {
+        /* Reading the coefficients */
+        b0 = pCoeffs[0];
+        b1 = pCoeffs[1];
+        b2 = pCoeffs[2];
+        a1 = pCoeffs[3];
+        a2 = pCoeffs[4];
+
+        /* Reading the state values */
+        d1a = pState[0];
+        d2a = pState[1];
+        d1b = pState[2];
+        d2b = pState[3];
+
+        pCoeffs += 5U;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 8 outputs at a time */
+        sample = blockSize >> 3U;
+
+        while (sample > 0U) {
+          /* y[n] = b0 * x[n] + d1 */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          /* d2 = b2 * x[n] + a2 * y[n] */
+
+/*  1 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  2 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  3 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  4 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  5 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  6 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  7 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+/*  8 */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+          /* decrement loop counter */
+          sample--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        sample = blockSize & 0x7U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        sample = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (sample > 0U) {
+          /* Read the input */
+          Xn1a = *pIn++; /* Channel a */
+          Xn1b = *pIn++; /* Channel b */
+
+          /* y[n] = b0 * x[n] + d1 */
+          acc1a = (b0 * Xn1a) + d1a;
+          acc1b = (b0 * Xn1b) + d1b;
+
+          /* Store the result in the accumulator in the destination buffer. */
+          *pOut++ = acc1a;
+          *pOut++ = acc1b;
+
+          /* Every time after the output is computed state should be updated. */
+          /* d1 = b1 * x[n] + a1 * y[n] + d2 */
+          d1a = ((b1 * Xn1a) + (a1 * acc1a)) + d2a;
+          d1b = ((b1 * Xn1b) + (a1 * acc1b)) + d2b;
+
+          /* d2 = b2 * x[n] + a2 * y[n] */
+          d2a = (b2 * Xn1a) + (a2 * acc1a);
+          d2b = (b2 * Xn1b) + (a2 * acc1b);
+
+          /* decrement loop counter */
+          sample--;
+        }
+
+        /* Store the updated state variables back into the state array */
+        pState[0] = d1a;
+        pState[1] = d2a;
+
+        pState[2] = d1b;
+        pState[3] = d2b;
+
+        pState += 4U;
+
+        /* The current stage output is given as the input to the next stage */
+        pIn = pDst;
+
+        /* Reset the output working pointer */
+        pOut = pDst;
+
+        /* Decrement the loop counter */
+        stage--;
+
+    } while (stage > 0U);
+
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f16.c
new file mode 100755
index 00000000..633fbfef
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f16.c
@@ -0,0 +1,90 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_stereo_df2T_init_f16.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_stereo_df2T_init_f16(
+        arm_biquad_cascade_stereo_df2T_instance_f16 * S,
+        uint8_t numStages,
+  const float16_t * pCoeffs,
+        float16_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float16_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
index f5f297cf..6932b9a4 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_biquad_cascade_stereo_df2T_init_f32.c
@@ -1,86 +1,86 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_biquad_cascade_stereo_df2T_init_f32.c
- * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup BiquadCascadeDF2T
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
-  @param[in,out] S           points to an instance of the filter data structure.
-  @param[in]     numStages   number of 2nd order stages in the filter.
-  @param[in]     pCoeffs     points to the filter coefficients.
-  @param[in]     pState      points to the state buffer.
-  @return        none
-
-  @par           Coefficient and State Ordering
-                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
-  <pre>
-      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
-  </pre>
-  @par
-                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
-                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
-                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
-  @par
-                   The <code>pState</code> is a pointer to state array.
-                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel.
-                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
-                   The state array has a total length of <code>2*numStages</code> values.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
- */
-
-void arm_biquad_cascade_stereo_df2T_init_f32(
-        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
-        uint8_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState)
-{
-  /* Assign filter stages */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always 4 * numStages */
-  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of BiquadCascadeDF2T group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_biquad_cascade_stereo_df2T_init_f32.c
+ * Description:  Initialization function for floating-point transposed direct form II Biquad cascade filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup BiquadCascadeDF2T
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point transposed direct form II Biquad cascade filter.
+  @param[in,out] S           points to an instance of the filter data structure.
+  @param[in]     numStages   number of 2nd order stages in the filter.
+  @param[in]     pCoeffs     points to the filter coefficients.
+  @param[in]     pState      points to the state buffer.
+  @return        none
+
+  @par           Coefficient and State Ordering
+                   The coefficients are stored in the array <code>pCoeffs</code> in the following order:
+  <pre>
+      {b10, b11, b12, a11, a12, b20, b21, b22, a21, a22, ...}
+  </pre>
+  @par
+                   where <code>b1x</code> and <code>a1x</code> are the coefficients for the first stage,
+                   <code>b2x</code> and <code>a2x</code> are the coefficients for the second stage,
+                   and so on.  The <code>pCoeffs</code> array contains a total of <code>5*numStages</code> values.
+  @par
+                   The <code>pState</code> is a pointer to state array.
+                   Each Biquad stage has 2 state variables <code>d1,</code> and <code>d2</code> for each channel.
+                   The 2 state variables for stage 1 are first, then the 2 state variables for stage 2, and so on.
+                   The state array has a total length of <code>2*numStages</code> values.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+ */
+
+void arm_biquad_cascade_stereo_df2T_init_f32(
+        arm_biquad_cascade_stereo_df2T_instance_f32 * S,
+        uint8_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter stages */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always 4 * numStages */
+  memset(pState, 0, (4U * (uint32_t) numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of BiquadCascadeDF2T group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
index 84424ca5..7f2dd81d 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_f32.c
@@ -1,816 +1,964 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_f32.c
- * Description:  Convolution of floating-point sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup Conv Convolution
-
-  Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.
-  Convolution is similar to correlation and is frequently used in filtering and data analysis.
-  The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.
-  The library also provides fast versions of the Q15 and Q31 functions.
-
- @par            Algorithm
-                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and
-                   <code>srcBLen</code> samples respectively. Then the convolution
-  <pre>
-     c[n] = a[n] * b[n]
-  </pre>
-  @par
-                   is defined as
-                   \image html ConvolutionEquation.gif
-  @par
-                   Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>.
-                   <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and
-                   <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
-                   The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result.
-  @par
-                   Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved,
-                   the signal <code>b[n]</code> slides over <code>a[n]</code>.
-                   For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
-  @par
-                   Note that convolution is a commutative operation:
-  <pre>
-     a[n] * b[n] = b[n] * a[n].
-  </pre>
-  @par
-                   This means that switching the A and B arguments to the convolution functions has no effect.
-
-  @par           Fixed-Point Behavior
-                   Convolution requires summing up a large number of intermediate products.
-                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
-                   Refer to the function specific documentation below for further details of the particular algorithm used.
-
-  @par           Fast Versions
-                   Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
-                   the input signals should be scaled down to avoid intermediate overflows.
-
-  @par           Opt Versions
-                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
-                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of floating-point sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
-  @return        none
- */
-
-void arm_conv_f32(
-  const float32_t * pSrcA,
-        uint32_t srcALen,
-  const float32_t * pSrcB,
-        uint32_t srcBLen,
-        float32_t * pDst)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const float32_t *pIn1;                               /* InputA pointer */
-  const float32_t *pIn2;                               /* InputB pointer */
-        float32_t *pOut = pDst;                        /* Output pointer */
-  const float32_t *px;                                 /* Intermediate inputA pointer */
-  const float32_t *py;                                 /* Intermediate inputB pointer */
-  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-        float32_t sum;                                 /* Accumulators */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-        float32_t acc0, acc1, acc2, acc3;              /* Accumulators */
-        float32_t x0, x1, x2, x3, c0;                  /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]
-   * sum = x[0] * y[1] + x[1] * y[0]
-   * ....
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-#if defined(ARM_MATH_NEON)
-    float32x4_t vec1;
-    float32x4_t vec2;
-    float32x4_t res = vdupq_n_f32(0) ;
-    float32x2_t accum = vdup_n_f32(0);
-#endif /* #if defined(ARM_MATH_NEON) */
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-#if defined(ARM_MATH_NEON)
-    res = vdupq_n_f32(0) ;
-    accum = vdup_n_f32(0);
-
-    /* Compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-
-    while (k > 0U)
-    {
-      vec1 = vld1q_f32(px);
-      vec2 = vld1q_f32(py-3);
-      vec2 = vrev64q_f32(vec2);
-      vec2 = vcombine_f32(vget_high_f32(vec2), vget_low_f32(vec2));
-
-      res = vmlaq_f32(res,vec1, vec2);
-
-      /* Increment pointers */
-      px += 4;
-      py -= 4; 
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
-    sum += accum[0] + accum[1];
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count & 3;
-#else
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* x[1] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* x[2] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* x[3] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#endif /* #if defined(ARM_MATH_NEON) */
-
-#else
-    /* Initialize k with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += *px++ * *py--;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-   
-#if defined(ARM_MATH_NEON)
-      float32x4_t c;
-      float32x4_t x1v;
-      float32x4_t x2v;
-      uint32x4_t x1v_u;
-      uint32x4_t x2v_u;
-      uint32x4_t x_u;
-      float32x4_t x;
-      float32x4_t res = vdupq_n_f32(0) ;
-#endif /* #if defined(ARM_MATH_NEON) */
-   
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-       /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-#if defined(ARM_MATH_NEON)
-      res = vdupq_n_f32(0) ;
-
-      x1v = vld1q_f32(px);
-      x2v = vld1q_f32(px+4);
-
-      do
-      {
-        c = vld1q_f32(py-3);
-
-        px += 4;
-        x = x1v;
-        res = vmlaq_n_f32(res,x,c[3]);
-
-	x = vextq_f32(x1v,x2v,1);
-
-        res = vmlaq_n_f32(res,x,c[2]);
-
-        x = vextq_f32(x1v,x2v,2);
-
-	res = vmlaq_n_f32(res,x,c[1]);
-
-	x = vextq_f32(x1v,x2v,3);
-
-	res = vmlaq_n_f32(res,x,c[0]);
-
-        py -= 4; 
-
-        x1v = x2v ;
-        x2v = vld1q_f32(px+4);
-
-      } while (--k);
-      
-      
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen & 0x3;
-
-      x1v = vld1q_f32(px);
-      px += 4;
-
-      while (k > 0U)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py--);
-
-        res = vmlaq_n_f32(res,x1v,c0);
-
-        /* Reuse the present samples for the next MAC */
-        x1v[0] = x1v[1];
-        x1v[1] = x1v[2];
-        x1v[2] = x1v[3];
-
-        x1v[3] = *(px++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      acc0 = res[0];
-      acc1 = res[1];
-      acc2 = res[2];
-      acc3 = res[3];
-
-#else
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *py--;
-        /* Read x[3] sample */
-        x3 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[3] * y[srcBLen - 1] */
-        acc3 += x3 * c0;
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *py--;
-        /* Read x[4] sample */
-        x0 = *(px + 1U);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[srcBLen - 2] */
-        acc3 += x0 * c0;
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *py--;
-        /* Read x[5] sample */
-        x1 = *(px + 2U);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[srcBLen - 2] */
-        acc3 += x1 * c0;
-
-        /* Read y[srcBLen - 4] sample */
-        c0 = *py--;
-        /* Read x[6] sample */
-        x2 = *(px + 3U);
-        px += 4U;
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[3] * y[srcBLen - 4] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[srcBLen - 4] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[srcBLen - 4] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[srcBLen - 4] */
-        acc3 += x2 * c0;
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *py--;
-        /* Read x[7] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-#endif /* #if defined(ARM_MATH_NEON) */
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = acc0;
-      *pOut++ = acc1;
-      *pOut++ = acc2;
-      *pOut++ = acc3;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)*/
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-#if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = srcBLen >> 2U;
-
-#if defined (ARM_MATH_NEON)
-      float32x4_t res = vdupq_n_f32(0) ;
-      float32x4_t x = vdupq_n_f32(0) ;
-      float32x4_t y = vdupq_n_f32(0) ;
-      float32x2_t accum = vdup_n_f32(0) ;
-
-      /* First part of the processing.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        x = vld1q_f32(px);
-        y = vld1q_f32(py-3);
-
-        y = vrev64q_f32(y);
-        y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
-
-        res = vmlaq_f32(res,x,y);
-
-        px += 4 ;
-        py -= 4 ;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
-      sum += accum[0] + accum[1]; 
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen & 0x3U;
-
-#else
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-        sum += *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = srcBLen % 0x4U;
-
-#endif /* if defined (ARM_MATH_NEON) */
-#else
-      /* Initialize blkCnt with number of samples */
-      k = srcBLen;
-
-#endif /* #if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-   * ....
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-   * sum +=  x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = blockSize3 >> 2U;
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t res = vdupq_n_f32(0) ;
-    float32x4_t x = vdupq_n_f32(0) ;
-    float32x4_t y = vdupq_n_f32(0) ;
-    float32x2_t accum = vdup_n_f32(0) ;
-
-    while (k > 0U)
-    {
-      x = vld1q_f32(px);
-      y = vld1q_f32(py-3);
-
-      y = vrev64q_f32(y);
-      y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
-
-      res = vmlaq_f32(res,x,y);
-
-      px += 4 ;
-      py -= 4 ;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
-    sum += accum[0] + accum[1]; 
-
-#else
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += *px++ * *py--;
-
-      /* Decrement loop counter */
-      k--;
-    }
-#endif /* #if defined (ARM_MATH_NEON) */
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = blockSize3 % 0x4U;
-#else
-
-    /* Initialize blkCnt with number of samples */
-    k = blockSize3;
-
-#endif /* #if defined (ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)*/
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum += *px++ * *py--;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
-  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
-        float32_t sum;                                 /* Accumulator */
-        uint32_t i, j;                                 /* Loop counters */
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if (((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ( pIn1[j] * pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = sum;
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_f32.c
+ * Description:  Convolution of floating-point sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup Conv Convolution
+
+  Convolution is a mathematical operation that operates on two finite length vectors to generate a finite length output vector.
+  Convolution is similar to correlation and is frequently used in filtering and data analysis.
+  The CMSIS DSP library contains functions for convolving Q7, Q15, Q31, and floating-point data types.
+  The library also provides fast versions of the Q15 and Q31 functions.
+
+ @par            Algorithm
+                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and
+                   <code>srcBLen</code> samples respectively. Then the convolution
+  <pre>
+     c[n] = a[n] * b[n]
+  </pre>
+  @par
+                   is defined as
+                   \image html ConvolutionEquation.gif
+  @par
+                   Note that <code>c[n]</code> is of length <code>srcALen + srcBLen - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., srcALen + srcBLen - 2</code>.
+                   <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and
+                   <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+                   The output result is written to <code>pDst</code> and the calling function must allocate <code>srcALen+srcBLen-1</code> words for the result.
+  @par
+                   Conceptually, when two signals <code>a[n]</code> and <code>b[n]</code> are convolved,
+                   the signal <code>b[n]</code> slides over <code>a[n]</code>.
+                   For each offset \c n, the overlapping portions of a[n] and b[n] are multiplied and summed together.
+  @par
+                   Note that convolution is a commutative operation:
+  <pre>
+     a[n] * b[n] = b[n] * a[n].
+  </pre>
+  @par
+                   This means that switching the A and B arguments to the convolution functions has no effect.
+
+  @par           Fixed-Point Behavior
+                   Convolution requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15. Cycles for Fast versions are less compared to Q31 and Q15 of conv and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+
+
+void arm_conv_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
+{
+    const float32_t *pIn1 = pSrcA;    /* inputA pointer               */
+    const float32_t *pIn2 = pSrcB;    /* inputB pointer               */
+    /*
+     * Loop to perform MAC operations according to correlation equation
+     */
+    const float32_t *pX;
+    const float32_t *pY;
+    const float32_t *pA;
+    const float32_t *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   block1, block2, block3;
+    uint32_t  vddupStartIdx = 3;
+    uint32x4_t decrIdxVec = vddupq_u32(vddupStartIdx, 1);
+
+    if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA;
+        /*
+         * Swapping the lengths
+         */
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2 - 3;
+
+    for (i = 0; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        float32_t acc0;
+        float32_t acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is incrementing for successive accumulators
+         * Y pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count);
+
+        *pDst++ = acc0;
+        *pDst++ = acc1;
+        pB += 2;
+    }
+
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        float32_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count);
+
+        *pDst++ = acc;
+        pB++;
+    }
+
+    for (i = 0; i <= block2 - 2; i += 2)
+    {
+        uint32_t  count = srcBLen;
+        float32_t acc0 = 0;
+        float32_t acc1 = 0;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, count);
+        *pDst++ = acc0;
+        *pDst++ = acc1;
+        pA += 2;
+    }
+    if (block2 & 1)
+    {
+        uint32_t  count = srcBLen;
+        float32_t acc = 0;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count);
+
+        *pDst++ = acc;
+        pA++;
+    }
+
+    for (i = block3; i >= 2; i -= 2)
+    {
+        int32_t   count = i;
+        float32_t acc0;
+        float32_t acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is decrementing for successive accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count);
+
+        *pDst++ = acc0;
+        *pDst++ = acc1;
+        pA += 2;
+    }
+    for (; i >= 1; i--)
+    {
+        int32_t   count = i;
+        float32_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CONV_SINGLE_F32(acc, pX, pY, count);
+
+        *pDst++ = acc;
+        pA++;
+    }
+}
+#else
+void arm_conv_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
+{
+
+#if defined(ARM_MATH_DSP)
+
+  const float32_t *pIn1;                               /* InputA pointer */
+  const float32_t *pIn2;                               /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
+        float32_t sum;                                 /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+        float32_t acc0, acc1, acc2, acc3, c0;              /* Accumulators */
+#if !defined(ARM_MATH_NEON)
+        float32_t x0, x1, x2, x3;                  /* Temporary variables to hold state and coefficient values */
+#endif
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+#if defined(ARM_MATH_NEON)
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+#endif /* #if defined(ARM_MATH_NEON) */
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    res = vdupq_n_f32(0) ;
+    accum = vdup_n_f32(0);
+
+    /* Compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+
+    while (k > 0U)
+    {
+      vec1 = vld1q_f32(px);
+      vec2 = vld1q_f32(py-3);
+      vec2 = vrev64q_f32(vec2);
+      vec2 = vcombine_f32(vget_high_f32(vec2), vget_low_f32(vec2));
+
+      res = vmlaq_f32(res,vec1, vec2);
+
+      /* Increment pointers */
+      px += 4;
+      py -= 4; 
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count & 3;
+#else
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 1] */
+      sum += *px++ * *py--;
+
+      /* x[1] * y[srcBLen - 2] */
+      sum += *px++ * *py--;
+
+      /* x[2] * y[srcBLen - 3] */
+      sum += *px++ * *py--;
+
+      /* x[3] * y[srcBLen - 4] */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#endif /* #if defined(ARM_MATH_NEON) */
+
+#else /* defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+   
+#if defined(ARM_MATH_NEON)
+      float32x4_t c;
+      float32x4_t x1v;
+      float32x4_t x2v;
+      float32x4_t x;
+      float32x4_t res = vdupq_n_f32(0) ;
+#endif /* #if defined(ARM_MATH_NEON) */
+   
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+
+       /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+#if defined(ARM_MATH_NEON)
+      res = vdupq_n_f32(0) ;
+
+      x1v = vld1q_f32(px);
+      x2v = vld1q_f32(px+4);
+
+      do
+      {
+        c = vld1q_f32(py-3);
+
+        px += 4;
+        x = x1v;
+        res = vmlaq_n_f32(res,x,c[3]);
+
+	x = vextq_f32(x1v,x2v,1);
+
+        res = vmlaq_n_f32(res,x,c[2]);
+
+        x = vextq_f32(x1v,x2v,2);
+
+	res = vmlaq_n_f32(res,x,c[1]);
+
+	x = vextq_f32(x1v,x2v,3);
+
+	res = vmlaq_n_f32(res,x,c[0]);
+
+        py -= 4; 
+
+        x1v = x2v ;
+        x2v = vld1q_f32(px+4);
+
+      } while (--k);
+      
+      
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3;
+
+      x1v = vld1q_f32(px);
+      px += 4;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *(py--);
+
+        res = vmlaq_n_f32(res,x1v,c0);
+
+        /* Reuse the present samples for the next MAC */
+        x1v[0] = x1v[1];
+        x1v[1] = x1v[2];
+        x1v[2] = x1v[3];
+
+        x1v[3] = *(px++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      acc0 = res[0];
+      acc1 = res[1];
+      acc2 = res[2];
+      acc3 = res[3];
+
+#else
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[srcBLen - 1] sample */
+        c0 = *py--;
+        /* Read x[3] sample */
+        x3 = *(px);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[srcBLen - 1] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[1] * y[srcBLen - 1] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[2] * y[srcBLen - 1] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[3] * y[srcBLen - 1] */
+        acc3 += x3 * c0;
+
+        /* Read y[srcBLen - 2] sample */
+        c0 = *py--;
+        /* Read x[4] sample */
+        x0 = *(px + 1U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[srcBLen - 2] */
+        acc0 += x1 * c0;
+        /* acc1 +=  x[2] * y[srcBLen - 2] */
+        acc1 += x2 * c0;
+        /* acc2 +=  x[3] * y[srcBLen - 2] */
+        acc2 += x3 * c0;
+        /* acc3 +=  x[4] * y[srcBLen - 2] */
+        acc3 += x0 * c0;
+
+        /* Read y[srcBLen - 3] sample */
+        c0 = *py--;
+        /* Read x[5] sample */
+        x1 = *(px + 2U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[srcBLen - 3] */
+        acc0 += x2 * c0;
+        /* acc1 +=  x[3] * y[srcBLen - 2] */
+        acc1 += x3 * c0;
+        /* acc2 +=  x[4] * y[srcBLen - 2] */
+        acc2 += x0 * c0;
+        /* acc3 +=  x[5] * y[srcBLen - 2] */
+        acc3 += x1 * c0;
+
+        /* Read y[srcBLen - 4] sample */
+        c0 = *py--;
+        /* Read x[6] sample */
+        x2 = *(px + 3U);
+        px += 4U;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[3] * y[srcBLen - 4] */
+        acc0 += x3 * c0;
+        /* acc1 +=  x[4] * y[srcBLen - 4] */
+        acc1 += x0 * c0;
+        /* acc2 +=  x[5] * y[srcBLen - 4] */
+        acc2 += x1 * c0;
+        /* acc3 +=  x[6] * y[srcBLen - 4] */
+        acc3 += x2 * c0;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *py--;
+        /* Read x[7] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[4] * y[srcBLen - 5] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[5] * y[srcBLen - 5] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[6] * y[srcBLen - 5] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[7] * y[srcBLen - 5] */
+        acc3 += x3 * c0;
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+#endif /* #if defined(ARM_MATH_NEON) */
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = acc0;
+      *pOut++ = acc1;
+      *pOut++ = acc2;
+      *pOut++ = acc3;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)*/
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+#if defined (ARM_MATH_NEON)
+      float32x4_t res = vdupq_n_f32(0) ;
+      float32x4_t x = vdupq_n_f32(0) ;
+      float32x4_t y = vdupq_n_f32(0) ;
+      float32x2_t accum = vdup_n_f32(0) ;
+
+      /* First part of the processing.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        x = vld1q_f32(px);
+        y = vld1q_f32(py-3);
+
+        y = vrev64q_f32(y);
+        y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
+
+        res = vmlaq_f32(res,x,y);
+
+        px += 4 ;
+        py -= 4 ;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+      sum += accum[0] + accum[1]; 
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3U;
+
+#else
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#endif /* if defined (ARM_MATH_NEON) */
+#else
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined(ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = blockSize3 >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x4_t x = vdupq_n_f32(0) ;
+    float32x4_t y = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0) ;
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py-3);
+
+      y = vrev64q_f32(y);
+      y = vcombine_f32(vget_high_f32(y), vget_low_f32(y));
+
+      res = vmlaq_f32(res,x,y);
+
+      px += 4 ;
+      py -= 4 ;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1]; 
+
+#else
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      sum += *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum += *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      sum += *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+#endif /* #if defined (ARM_MATH_NEON) */
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = blockSize3 % 0x4U;
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_NEON) || defined (ARM_MATH_LOOPUNROLL)*/
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0.0f;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ( pIn1[j] * pIn2[i - j]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    pDst[i] = sum;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
index b2144add..06629f1a 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_opt_q15.c
@@ -1,366 +1,366 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_fast_opt_q15.c
- * Description:  Fast Q15 Convolution
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q15 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
-  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
-  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This fast version uses a 32-bit accumulator with 2.30 format.
-                   The accumulator maintains full precision of the intermediate multiplication results
-                   but provides only a single guard bit. There is no saturation on intermediate additions.
-                   Thus, if the accumulator overflows it wraps around and distorts the result.
-                   The input signals should be scaled down to avoid intermediate overflows.
-                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
-                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
-                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
-
-  @remark
-                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
- */
-
-void arm_conv_fast_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2)
-{
-        q31_t acc0;                                    /* Accumulators */
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-        q15_t *py;                                     /* Intermediate inputB pointer */
-        uint32_t j, k, blkCnt;                         /* Loop counter */
-        uint32_t tapCnt;                               /* Loop count */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc1, acc2, acc3;                        /* Accumulators */
-        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-        q31_t y1, y2;                                  /* State variables */
-#endif
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* Pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  k = srcBLen >> 2U;
-
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  k = srcBLen % 0x4U;
-
-#else
-
-  /* Initialize k with number of samples */
-  k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-
-  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (srcALen + srcBLen - 1U) >> 2;
-
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = read_q15x2_ia (&pScr1);
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = read_q15x2_ia (&pScr1);
-
-    tapCnt = (srcBLen) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia ((q15_t **) &pIn2);
-      y2 = read_q15x2_ia ((q15_t **) &pIn2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x2, y2, acc0);
-      acc2 = __SMLAD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3U;
-
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4U;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (srcALen + srcBLen - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1U;
-
-    while (tapCnt > 0U)
-    {
-
-      /* Read next two samples from scratch1 buffer */
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while (tapCnt > 0U)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-       Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1U;
-  }
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_fast_opt_q15.c
+ * Description:  Fast Q15 Convolution
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results
+                   but provides only a single guard bit. There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+ */
+
+void arm_conv_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q31_t acc0;                                    /* Accumulators */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* Pointer to take end of scratch2 buffer */
+  pScr2 = pScratch2 + srcBLen - 1;
+
+  /* points to smaller length sequence */
+  px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  k = srcBLen >> 2U;
+
+  /* Copy smaller length input sequence in reverse order into second scratch buffer */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  k = srcBLen % 0x4U;
+
+#else
+
+  /* Initialize k with number of samples */
+  k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Initialze temporary scratch pointer */
+  pScr1 = pScratch1;
+
+  /* Assuming scratch1 buffer is aligned by 32-bit */
+  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+
+  /* Initialization of pIn2 pointer */
+  pIn2 = py;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumulate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumulate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumulate */
+      acc0 = __SMLAD(x2, y2, acc0);
+      acc2 = __SMLAD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+      acc1 = __SMLADX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate convolution for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch1 buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
index fc3ca73d..5337a82e 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q15.c
@@ -1,663 +1,663 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_fast_q15.c
- * Description:  Fast Q15 Convolution
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q15 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This fast version uses a 32-bit accumulator with 2.30 format.
-                   The accumulator maintains full precision of the intermediate multiplication results
-                   but provides only a single guard bit. There is no saturation on intermediate additions.
-                   Thus, if the accumulator overflows it wraps around and distorts the result.
-                   The input signals should be scaled down to avoid intermediate overflows.
-                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
-                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
-                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
-
-  @remark
-                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
- */
-
-void arm_conv_fast_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst)
-{
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]
-   * sum = x[0] * y[1] + x[1] * y[0]
-   * ....
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while ((count < 4U) && (blockSize1 > 0U))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between
-     * inputA samples and inputB samples */
-    k = count;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD
-     * So, py is incremented by 1 */
-    py = py + 1U;
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1U);
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* --------------------
-   * Stage2 process
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      py = py - 1U;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = read_q15x2 ((q15_t *) px);
-      /* read x[1], x[2] samples */
-      x1 = read_q15x2 ((q15_t *) px + 1);
-	  px += 2U;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = read_q15x2_da ((q15_t **) &py);
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLADX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLADX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[3], x[4] */
-        x3 = read_q15x2 ((q15_t *) px + 1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLADX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLADX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = read_q15x2_da ((q15_t **) &py);
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLADX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLADX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = read_q15x2 ((q15_t *) px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = read_q15x2 ((q15_t *) px + 3);
-		px += 4U;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLADX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLADX(x1, c0, acc3);
-
-      } while (--k);
-
-      /* For the next MAC operations, SIMD is not used
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py+1);
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[7] */
-        x3 = read_q15x2 ((q15_t *) px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = read_q15x2 ((q15_t *) py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-		px += 2U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-      }
-
-      if (k == 3U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = read_q15x2 ((q15_t *) py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x0, c0, acc0);
-        acc1 = __SMLADX(x1, c0, acc1);
-        acc2 = __SMLADX(x3, c0, acc2);
-        acc3 = __SMLADX(x2, c0, acc3);
-
-        /* Read y[srcBLen - 7] */
-		c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[10] */
-        x3 =  read_q15x2 ((q15_t *) px + 2);
-		px += 3U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD(x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16));
-      write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16));
-#else
-      write_q15x2_ia (&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16));
-      write_q15x2_ia (&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16));
-#endif /*#ifndef  ARM_MATH_BIG_ENDIAN*/
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) *px++ * *py--);
-        sum += ((q31_t) *px++ * *py--);
-        sum += ((q31_t) *px++ * *py--);
-        sum += ((q31_t) *px++ * *py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) *px++ * *py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) *px++ * *py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-   * ....
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-   * sum +=  x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  pIn2 = pSrc2 - 1U;
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2U;
-
-  while ((j > 0U) && (blockSize3 > 0U))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
-       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
-       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD
-     * So, py is incremented by 1 */
-    py = py + 1U;
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4U;
-
-    while (k > 0U)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement  loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1U;
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum = __SMLAD(*px++, *py--, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (sum >> 15);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_fast_q15.c
+ * Description:  Fast Q15 Convolution
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results
+                   but provides only a single guard bit. There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+ */
+
+void arm_conv_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* For loop unrolling by 4, this stage is divided into two. */
+  /* First part of this stage computes the MAC operations less than 4 */
+  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
+
+  /* The first part of the stage starts here */
+  while ((count < 4U) && (blockSize1 > 0U))
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Loop over number of MAC operations between
+     * inputA samples and inputB samples */
+    k = count;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* The second part of the stage starts here */
+  /* The internal loop, over count, is unrolled by 4 */
+  /* To, read the last two inputB samples using SIMD:
+   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
+  py = py - 1;
+
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* For the next MAC operations, the pointer py is used without SIMD
+     * So, py is incremented by 1 */
+    py = py + 1U;
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + (count - 1U);
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is the index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* --------------------
+   * Stage2 process
+   * -------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unroll over blockSize2, by 4 */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      py = py - 1U;
+
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = read_q15x2 ((q15_t *) px);
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+	  px += 2U;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read the last two inputB samples using SIMD:
+         * y[srcBLen - 1] and y[srcBLen - 2] */
+        c0 = read_q15x2_da ((q15_t **) &py);
+
+        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+        acc0 = __SMLADX(x0, c0, acc0);
+
+        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+        acc1 = __SMLADX(x1, c0, acc1);
+
+        /* Read x[2], x[3] */
+        x2 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[3], x[4] */
+        x3 = read_q15x2 ((q15_t *) px + 1);
+
+        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+        acc2 = __SMLADX(x2, c0, acc2);
+
+        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+        acc3 = __SMLADX(x3, c0, acc3);
+
+        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+        c0 = read_q15x2_da ((q15_t **) &py);
+
+        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+        acc0 = __SMLADX(x2, c0, acc0);
+
+        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+        acc1 = __SMLADX(x3, c0, acc1);
+
+        /* Read x[4], x[5] */
+        x0 = read_q15x2 ((q15_t *) px + 2);
+
+        /* Read x[5], x[6] */
+        x1 = read_q15x2 ((q15_t *) px + 3);
+		px += 4U;
+
+        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+        acc2 = __SMLADX(x0, c0, acc2);
+
+        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+        acc3 = __SMLADX(x1, c0, acc3);
+
+      } while (--k);
+
+      /* For the next MAC operations, SIMD is not used
+       * So, the 16 bit pointer if inputB, py is updated */
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      if (k == 1U)
+      {
+        /* Read y[srcBLen - 5] */
+        c0 = *(py+1);
+
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[7] */
+        x3 = read_q15x2 ((q15_t *) px);
+		px++;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD(x0, c0, acc0);
+        acc1 = __SMLAD(x1, c0, acc1);
+        acc2 = __SMLADX(x1, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      if (k == 2U)
+      {
+        /* Read y[srcBLen - 5], y[srcBLen - 6] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+		px += 2U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x0, c0, acc0);
+        acc1 = __SMLADX(x1, c0, acc1);
+        acc2 = __SMLADX(x3, c0, acc2);
+        acc3 = __SMLADX(x2, c0, acc3);
+      }
+
+      if (k == 3U)
+      {
+        /* Read y[srcBLen - 5], y[srcBLen - 6] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x0, c0, acc0);
+        acc1 = __SMLADX(x1, c0, acc1);
+        acc2 = __SMLADX(x3, c0, acc2);
+        acc3 = __SMLADX(x2, c0, acc3);
+
+        /* Read y[srcBLen - 7] */
+		c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[10] */
+        x3 =  read_q15x2 ((q15_t *) px + 2);
+		px += 3U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x1, c0, acc0);
+        acc1 = __SMLAD(x2, c0, acc1);
+        acc2 = __SMLADX(x2, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT((acc0 >> 15), (acc1 >> 15), 16));
+      write_q15x2_ia (&pOut, __PKHBT((acc2 >> 15), (acc3 >> 15), 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT((acc1 >> 15), (acc0 >> 15), 16));
+      write_q15x2_ia (&pOut, __PKHBT((acc3 >> 15), (acc2 >> 15), 16));
+#endif /*#ifndef  ARM_MATH_BIG_ENDIAN*/
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+        sum += ((q31_t) *px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) *px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q31_t) *px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  pIn2 = pSrc2 - 1U;
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  /* For loop unrolling by 4, this stage is divided into two. */
+  /* First part of this stage computes the MAC operations greater than 4 */
+  /* Second part of this stage computes the MAC operations less than or equal to 4 */
+
+  /* The first part of the stage starts here */
+  j = blockSize3 >> 2U;
+
+  while ((j > 0U) && (blockSize3 > 0U))
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = blockSize3 >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
+       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
+       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
+      sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* For the next MAC operations, the pointer py is used without SIMD
+     * So, py is incremented by 1 */
+    py = py + 1U;
+
+    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = blockSize3 % 0x4U;
+
+    while (k > 0U)
+    {
+      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement  loop counter */
+    blockSize3--;
+
+    j--;
+  }
+
+  /* The second part of the stage starts here */
+  /* SIMD is not used for the next MAC operations,
+   * so pointer py is updated to read only one sample at a time */
+  py = py + 1U;
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = blockSize3;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum = __SMLAD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (sum >> 15);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
index c3943f00..133c322c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_fast_q31.c
@@ -1,558 +1,558 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_fast_q31.c
- * Description:  Fast Q31 Convolution
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q31 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence.
-  @param[in]     srcALen    length of the first input sequence.
-  @param[in]     pSrcB      points to the second input sequence.
-  @param[in]     srcBLen    length of the second input sequence.
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
-                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
-                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
-                   Finally, the accumulator is saturated and converted to a 1.31 result.
-  @par
-                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
-                   In order to avoid overflows completely the input signals must be scaled down.
-                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
-                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
-  @remark
-                   Refer to \ref arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
- */
-
-void arm_conv_fast_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst)
-{
-  const q31_t *pIn1;                                   /* InputA pointer */
-  const q31_t *pIn2;                                   /* InputB pointer */
-        q31_t *pOut = pDst;                            /* Output pointer */
-  const q31_t *px;                                     /* Intermediate inputA pointer */
-  const q31_t *py;                                     /* Intermediate inputB pointer */
-  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]
-   * sum = x[0] * y[1] + x[1] * y[0]
-   * ....
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* x[1] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* x[2] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* x[3] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum << 1;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *py--;
-        /* Read x[3] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[3] * y[srcBLen - 1] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *py--;
-        /* Read x[4] sample */
-        x0 = *px++;
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc3 +=  x[4] * y[srcBLen - 2] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *py--;
-        /* Read x[5] sample */
-        x1 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc1 +=  x[3] * y[srcBLen - 3] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc2 +=  x[4] * y[srcBLen - 3] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc3 +=  x[5] * y[srcBLen - 3] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-
-        /* Read y[srcBLen - 4] sample */
-        c0 = *py--;
-        /* Read x[6] sample */
-        x2 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[srcBLen - 4] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc1 +=  x[4] * y[srcBLen - 4] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc2 +=  x[5] * y[srcBLen - 4] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc3 +=  x[6] * y[srcBLen - 4] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *py--;
-        /* Read x[7] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (acc0 << 1);
-      *pOut++ = (q31_t) (acc1 << 1);
-      *pOut++ = (q31_t) (acc2 << 1);
-      *pOut++ = (q31_t) (acc3 << 1);
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-   * ....
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-   * sum +=  x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py--))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = sum << 1;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_fast_q31.c
+ * Description:  Fast Q31 Convolution
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence.
+  @param[in]     srcALen    length of the first input sequence.
+  @param[in]     pSrcB      points to the second input sequence.
+  @param[in]     srcBLen    length of the second input sequence.
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+  @remark
+                   Refer to \ref arm_conv_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
+ */
+
+void arm_conv_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 1] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* x[1] * y[srcBLen - 2] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* x[2] * y[srcBLen - 3] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* x[3] * y[srcBLen - 4] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = sum << 1;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unroll over blockSize2, by 4 */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[srcBLen - 1] sample */
+        c0 = *py--;
+        /* Read x[3] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[srcBLen - 1] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc1 +=  x[1] * y[srcBLen - 1] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc2 +=  x[2] * y[srcBLen - 1] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc3 +=  x[3] * y[srcBLen - 1] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+
+        /* Read y[srcBLen - 2] sample */
+        c0 = *py--;
+        /* Read x[4] sample */
+        x0 = *px++;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[srcBLen - 2] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc1 +=  x[2] * y[srcBLen - 2] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc2 +=  x[3] * y[srcBLen - 2] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
+        /* acc3 +=  x[4] * y[srcBLen - 2] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+
+        /* Read y[srcBLen - 3] sample */
+        c0 = *py--;
+        /* Read x[5] sample */
+        x1 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[2] * y[srcBLen - 3] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc1 +=  x[3] * y[srcBLen - 3] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
+        /* acc2 +=  x[4] * y[srcBLen - 3] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc3 +=  x[5] * y[srcBLen - 3] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
+
+
+        /* Read y[srcBLen - 4] sample */
+        c0 = *py--;
+        /* Read x[6] sample */
+        x2 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[3] * y[srcBLen - 4] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
+        /* acc1 +=  x[4] * y[srcBLen - 4] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc2 +=  x[5] * y[srcBLen - 4] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc3 +=  x[6] * y[srcBLen - 4] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
+
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *py--;
+        /* Read x[7] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[srcBLen - 5] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc1 +=  x[5] * y[srcBLen - 5] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc2 +=  x[6] * y[srcBLen - 5] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc3 +=  x[7] * y[srcBLen - 5] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (acc0 << 1);
+      *pOut++ = (q31_t) (acc1 << 1);
+      *pOut++ = (q31_t) (acc2 << 1);
+      *pOut++ = (q31_t) (acc3 << 1);
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum << 1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum << 1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = blockSize3 >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = blockSize3 % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py--))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = sum << 1;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
index 68391032..1f3efe00 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q15.c
@@ -1,362 +1,362 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_opt_q15.c
- * Description:  Convolution of Q15 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q15 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
-  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   This approach provides 33 guard bits and there is no risk of overflow.
-                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
-  @remark
-                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
- */
-
-void arm_conv_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2)
-{
-        q63_t acc0;                                    /* Accumulators */
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-        q15_t *py;                                     /* Intermediate inputB pointer */
-        uint32_t j, k, blkCnt;                         /* Loop counter */
-        uint32_t tapCnt;                               /* Loop count */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc1, acc2, acc3;                        /* Accumulators */
-        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
-        q31_t y1, y2;                                  /* State variables */
-#endif
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* Pointer to take end of scratch2 buffer */
-  pScr2 = pScratch2 + srcBLen - 1;
-
-  /* points to smaller length sequence */
-  px = pIn2;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  k = srcBLen >> 2U;
-
-  /* Copy smaller length input sequence in reverse order into second scratch buffer */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-    *pScr2-- = *px++;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  k = srcBLen % 0x4U;
-
-#else
-
-  /* Initialize k with number of samples */
-  k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    *pScr2-- = *px++;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* Initialze temporary scratch pointer */
-  pScr1 = pScratch1;
-
-  /* Assuming scratch1 buffer is aligned by 32-bit */
-  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-
-  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = py;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (srcALen + srcBLen - 1U) >> 2;
-
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = read_q15x2_ia (&pScr1);
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = read_q15x2_ia (&pScr1);
-
-    tapCnt = (srcBLen) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia ((q15_t **) &pIn2);
-      y2 = read_q15x2_ia ((q15_t **) &pIn2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x1, y1, acc0);
-      acc2 = __SMLALD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x2, y2, acc0);
-      acc2 = __SMLALD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3U;
-
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 4U;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (srcALen + srcBLen - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1U;
-
-    while (tapCnt > 0U)
-    {
-
-      /* Read next two samples from scratch1 buffer */
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while (tapCnt > 0U)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-       Then store the output in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch1 += 1U;
-  }
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_opt_q15.c
+ * Description:  Convolution of Q15 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+  @remark
+                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
+ */
+
+void arm_conv_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q63_t acc0;                                    /* Accumulators */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables to hold state and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* Pointer to take end of scratch2 buffer */
+  pScr2 = pScratch2 + srcBLen - 1;
+
+  /* points to smaller length sequence */
+  px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  k = srcBLen >> 2U;
+
+  /* Copy smaller length input sequence in reverse order into second scratch buffer */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  k = srcBLen % 0x4U;
+
+#else
+
+  /* Initialize k with number of samples */
+  k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    *pScr2-- = *px++;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Initialze temporary scratch pointer */
+  pScr1 = pScratch1;
+
+  /* Assuming scratch1 buffer is aligned by 32-bit */
+  /* Fill (srcBLen - 1U) zeros in scratch1 buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+
+  /* Initialization of pIn2 pointer */
+  pIn2 = py;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumulate */
+      acc0 = __SMLALD(x1, y1, acc0);
+      acc2 = __SMLALD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumulate */
+      acc1 = __SMLALDX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumulate */
+      acc0 = __SMLALD(x2, y2, acc0);
+      acc2 = __SMLALD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y1, acc3);
+      acc1 = __SMLALDX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate convolution for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch1 buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
index 3ca938e4..1f12f0d2 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_opt_q7.c
@@ -1,360 +1,360 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_opt_q7.c
- * Description:  Convolution of Q7 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q7 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
-  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
-                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
-                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
-                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
- */
-
-void arm_conv_opt_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2)
-{
-        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
-        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
-        q15_t x4;                                      /* Temporary input variable */
-        q15_t *py;                                     /* Temporary input2 pointer */
-        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
-        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
-        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-  const q7_t *px;                                      /* Temporary input1 pointer */
-        q7_t *pOut = pDst;                             /* Output pointer */
-        q7_t out0, out1, out2, out3;                   /* Temporary variables */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* points to smaller length sequence */
-  px = pIn2 + srcBLen - 1;
-
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcBLen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) *px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) *px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) *px--;
-    *pScr2++ = x4;
-    x4 = (q15_t) *px--;
-    *pScr2++ = x4;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = srcBLen % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) *px--;
-    *pScr2++ = x4;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* Fill (srcBLen - 1U) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-   ** a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-   ** No loop unrolling is used. */
-  k = srcALen % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-  /* Initialization of pIn2 pointer */
-  pIn2 = (q7_t *) py;
-
-  pScr2 = py;
-
-  /* Actual convolution process starts here */
-  blkCnt = (srcALen + srcBLen - 1U) >> 2U;
-
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = read_q15x2_ia (&pScr1);
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = read_q15x2_ia (&pScr1);
-
-    tapCnt = (srcBLen) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia (&pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia (&pScr2);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3U;
-
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    out0 = (q7_t) (__SSAT(acc0 >> 7U, 8));
-    out1 = (q7_t) (__SSAT(acc1 >> 7U, 8));
-    out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
-    out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
-
-    write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4U;
-  }
-
-  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
-
-  /* Calculate convolution for remaining samples of Bigger length sequence */
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1U;
-
-    while (tapCnt > 0U)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1U;
-  }
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_opt_q7.c
+ * Description:  Convolution of Q7 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+ */
+
+void arm_conv_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
+        q15_t x4;                                      /* Temporary input variable */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+  const q7_t *px;                                      /* Temporary input1 pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+        q7_t out0, out1, out2, out3;                   /* Temporary variables */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* points to smaller length sequence */
+  px = pIn2 + srcBLen - 1;
+
+  /* Apply loop unrolling and do 4 Copies simultaneously. */
+  k = srcBLen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+   ** a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+   ** No loop unrolling is used. */
+  k = srcBLen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) *px--;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy (srcALen) samples in scratch buffer */
+  /* Apply loop unrolling and do 4 Copies simultaneously. */
+  k = srcALen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+   ** a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+   ** No loop unrolling is used. */
+  k = srcALen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) * pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement the loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+  /* Initialization of pIn2 pointer */
+  pIn2 = (q7_t *) py;
+
+  pScr2 = py;
+
+  /* Actual convolution process starts here */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2U;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      /* multiply and accumulate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumulate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      acc0 = __SMLAD(x2, y1, acc0);
+
+      acc2 = __SMLAD(x1, y1, acc2);
+
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pScr2);
+      acc1 += (*pScr1++ * *pScr2);
+      acc2 += (*pScr1++ * *pScr2);
+      acc3 += (*pScr1++ * *pScr2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    out0 = (q7_t) (__SSAT(acc0 >> 7U, 8));
+    out1 = (q7_t) (__SSAT(acc1 >> 7U, 8));
+    out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
+    out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
+
+    write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+  /* Calculate convolution for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+      acc0 += (*pScr1++ * *pScr2++);
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
index 53bc9a3a..a8a9bd1a 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_f32.c
@@ -1,676 +1,678 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_f32.c
- * Description:  Partial convolution of floating-point sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup PartialConv Partial Convolution
-
-  Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.
-  Each function has two additional arguments.
-  <code>firstIndex</code> specifies the starting index of the subset of output samples.
-  <code>numPoints</code> is the number of output samples to compute.
-  The function computes the output in the range
-  <code>[firstIndex, ..., firstIndex+numPoints-1]</code>.
-  The output array <code>pDst</code> contains <code>numPoints</code> values.
-
-  The allowable range of output indices is [0 srcALen+srcBLen-2].
-  If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.
-  Otherwise the functions return ARM_MATH_SUCCESS.
-  \note Refer to \ref arm_conv_f32() for details on fixed point behavior.
-
-  @par           Fast Versions
-                   Fast versions are supported for Q31 and Q15 of partial convolution.
-                   Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
-                   the input signals should be scaled down to avoid intermediate overflows.
-
-  @par           Opt Versions
-                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
-                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of partial convolution
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of floating-point sequences.
-  @param[in]     pSrcA       points to the first input sequence
-  @param[in]     srcALen     length of the first input sequence
-  @param[in]     pSrcB       points to the second input sequence
-  @param[in]     srcBLen     length of the second input sequence
-  @param[out]    pDst        points to the location where the output result is written
-  @param[in]     firstIndex  is the first output sample to start with
-  @param[in]     numPoints   is the number of output points to be computed
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
- */
-
-arm_status arm_conv_partial_f32(
-  const float32_t * pSrcA,
-        uint32_t srcALen,
-  const float32_t * pSrcB,
-        uint32_t srcBLen,
-        float32_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
-  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
-        float32_t *pOut = pDst;                        /* Output pointer */
-  const float32_t *px;                                 /* Intermediate inputA pointer */
-  const float32_t *py;                                 /* Intermediate inputB pointer */
-  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
-        float32_t sum;                                 /* Accumulator */
-        uint32_t j, k, count, blkCnt, check;
-        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        float32_t acc0, acc1, acc2, acc3;              /* Accumulator */
-        float32_t x0, x1, x2, x3, c0;                  /* Temporary variables */
-#endif
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
-    blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally
-     * divided into three stages according to the number of multiplications that has to be
-     * taken place between inputA samples and inputB samples. In the first stage of the
-     * algorithm, the multiplications increase by one for every iteration.
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.
-     * In the third stage of the algorithm, the multiplications decrease by one
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------
-     * Initializations of stage1
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]
-     * sum = x[0] * y[1] + x[1] * y[0]
-     * ....
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from firstIndex
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1U + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc1 = pIn2 + firstIndex;
-    py = pSrc1;
-
-    /* ------------------------
-     * Stage1 process
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while (blockSize1 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* x[1] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* x[2] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* x[3] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize k with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc1;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------
-     * Initializations of stage2
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-     * ....
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-     */
-
-    /* Working pointer of inputA */
-    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      pSrc1 = pIn1;
-    }
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0U;
-
-    /* -------------------
-     * Stage2 process
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-     * So, to loop unroll over blockSize2,
-     * srcBLen should be greater than or equal to 4 */
-    if (srcBLen >= 4U)
-    {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      blkCnt = ((uint32_t) blockSize2 >> 2U);
-
-      while (blkCnt > 0U)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0.0f;
-        acc1 = 0.0f;
-        acc2 = 0.0f;
-        acc3 = 0.0f;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *px++;
-        x1 = *px++;
-        x2 = *px++;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *py--;
-          /* Read x[3] sample */
-          x3 = *px++;
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += x0 * c0;
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += x1 * c0;
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += x2 * c0;
-          /* acc3 +=  x[3] * y[srcBLen - 1] */
-          acc3 += x3 * c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *py--;
-          /* Read x[4] sample */
-          x0 = *px++;
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += x1 * c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += x2 * c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += x3 * c0;
-          /* acc3 +=  x[4] * y[srcBLen - 2] */
-          acc3 += x0 * c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *py--;
-          /* Read x[5] sample */
-          x1 = *px++;
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += x2 * c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += x3 * c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += x0 * c0;
-          /* acc3 +=  x[5] * y[srcBLen - 2] */
-          acc3 += x1 * c0;
-
-          /* Read y[srcBLen - 4] sample */
-          c0 = *py--;
-          /* Read x[6] sample */
-          x2 = *px++;
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[3] * y[srcBLen - 4] */
-          acc0 += x3 * c0;
-          /* acc1 +=  x[4] * y[srcBLen - 4] */
-          acc1 += x0 * c0;
-          /* acc2 +=  x[5] * y[srcBLen - 4] */
-          acc2 += x1 * c0;
-          /* acc3 +=  x[6] * y[srcBLen - 4] */
-          acc3 += x2 * c0;
-
-        } while (--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        while (k > 0U)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *py--;
-          /* Read x[7] sample */
-          x3 = *px++;
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += x0 * c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += x1 * c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += x2 * c0;
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 += x3 * c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = acc0;
-        *pOut++ = acc1;
-        *pOut++ = acc2;
-        *pOut++ = acc3;
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4U;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      blkCnt = (uint32_t) blockSize2 % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 outputs at a time */
-        k = srcBLen >> 2U;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-          sum += *px++ * *py--;
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Loop unrolling: Compute remaining outputs */
-        k = srcBLen % 0x4U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0.0f;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += *px++ * *py--;
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------
-     * Initializations of stage3
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-     * ....
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-     * sum +=  x[srcALen-1] * y[srcBLen-1]
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The blockSize3 variable holds the number of MAC operations performed */
-    count = srcBLen - 1U;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* -------------------
-     * Stage3 process
-     * ------------------*/
-
-    while (blockSize3 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum += *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum += *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
-  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
-        float32_t sum;                                 /* Accumulator */
-        uint32_t i, j;                                 /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0.0f;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0U; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if (((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ( pIn1[j] * pIn2[i - j]);
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = sum;
-    }
-
-    /* Set status as ARM_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_f32.c
+ * Description:  Partial convolution of floating-point sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup PartialConv Partial Convolution
+
+  Partial Convolution is equivalent to Convolution except that a subset of the output samples is generated.
+  Each function has two additional arguments.
+  <code>firstIndex</code> specifies the starting index of the subset of output samples.
+  <code>numPoints</code> is the number of output samples to compute.
+  The function computes the output in the range
+  <code>[firstIndex, ..., firstIndex+numPoints-1]</code>.
+  The output array <code>pDst</code> contains <code>numPoints</code> values.
+
+  The allowable range of output indices is [0 srcALen+srcBLen-2].
+  If the requested subset does not fall in this range then the functions return ARM_MATH_ARGUMENT_ERROR.
+  Otherwise the functions return ARM_MATH_SUCCESS.
+  \note Refer to \ref arm_conv_f32() for details on fixed point behavior.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15 of partial convolution.
+                   Cycles for Fast versions are less compared to Q31 and Q15 of partial conv and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7. Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of partial convolution
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of floating-point sequences.
+  @param[in]     pSrcA       points to the first input sequence
+  @param[in]     srcALen     length of the first input sequence
+  @param[in]     pSrcB       points to the second input sequence
+  @param[in]     srcBLen     length of the second input sequence
+  @param[out]    pDst        points to the location where the output result is written
+  @param[in]     firstIndex  is the first output sample to start with
+  @param[in]     numPoints   is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+ */
+
+arm_status arm_conv_partial_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+#if defined (ARM_MATH_DSP)
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1, *pSrc2;                      /* Intermediate pointers */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc0, acc1, acc2, acc3;              /* Accumulator */
+        float32_t x0, x1, x2, x3, c0;                  /* Temporary variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints) : 0;
+    blockSize2 = ((int32_t) check - blockSize3) - (blockSize1 + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc1 = pIn2 + firstIndex;
+    py = pSrc1;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* The first stage starts here */
+    while (blockSize1 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* x[0] * y[srcBLen - 1] */
+        sum += *px++ * *py--;
+
+        /* x[1] * y[srcBLen - 2] */
+        sum += *px++ * *py--;
+
+        /* x[2] * y[srcBLen - 3] */
+        sum += *px++ * *py--;
+
+        /* x[3] * y[srcBLen - 4] */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc1;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        /* Set all accumulators to zero */
+        acc0 = 0.0f;
+        acc1 = 0.0f;
+        acc2 = 0.0f;
+        acc3 = 0.0f;
+
+        /* read x[0], x[1], x[2] samples */
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read y[srcBLen - 1] sample */
+          c0 = *py--;
+          /* Read x[3] sample */
+          x3 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[0] * y[srcBLen - 1] */
+          acc0 += x0 * c0;
+          /* acc1 +=  x[1] * y[srcBLen - 1] */
+          acc1 += x1 * c0;
+          /* acc2 +=  x[2] * y[srcBLen - 1] */
+          acc2 += x2 * c0;
+          /* acc3 +=  x[3] * y[srcBLen - 1] */
+          acc3 += x3 * c0;
+
+          /* Read y[srcBLen - 2] sample */
+          c0 = *py--;
+          /* Read x[4] sample */
+          x0 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[1] * y[srcBLen - 2] */
+          acc0 += x1 * c0;
+          /* acc1 +=  x[2] * y[srcBLen - 2] */
+          acc1 += x2 * c0;
+          /* acc2 +=  x[3] * y[srcBLen - 2] */
+          acc2 += x3 * c0;
+          /* acc3 +=  x[4] * y[srcBLen - 2] */
+          acc3 += x0 * c0;
+
+          /* Read y[srcBLen - 3] sample */
+          c0 = *py--;
+          /* Read x[5] sample */
+          x1 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[2] * y[srcBLen - 3] */
+          acc0 += x2 * c0;
+          /* acc1 +=  x[3] * y[srcBLen - 2] */
+          acc1 += x3 * c0;
+          /* acc2 +=  x[4] * y[srcBLen - 2] */
+          acc2 += x0 * c0;
+          /* acc3 +=  x[5] * y[srcBLen - 2] */
+          acc3 += x1 * c0;
+
+          /* Read y[srcBLen - 4] sample */
+          c0 = *py--;
+          /* Read x[6] sample */
+          x2 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[3] * y[srcBLen - 4] */
+          acc0 += x3 * c0;
+          /* acc1 +=  x[4] * y[srcBLen - 4] */
+          acc1 += x0 * c0;
+          /* acc2 +=  x[5] * y[srcBLen - 4] */
+          acc2 += x1 * c0;
+          /* acc3 +=  x[6] * y[srcBLen - 4] */
+          acc3 += x2 * c0;
+
+        } while (--k);
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Read y[srcBLen - 5] sample */
+          c0 = *py--;
+          /* Read x[7] sample */
+          x3 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[4] * y[srcBLen - 5] */
+          acc0 += x0 * c0;
+          /* acc1 +=  x[5] * y[srcBLen - 5] */
+          acc1 += x1 * c0;
+          /* acc2 +=  x[6] * y[srcBLen - 5] */
+          acc2 += x2 * c0;
+          /* acc3 +=  x[7] * y[srcBLen - 5] */
+          acc3 += x3 * c0;
+
+          /* Reuse the present samples for the next MAC */
+          x0 = x1;
+          x1 = x2;
+          x2 = x3;
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = acc0;
+        *pOut++ = acc1;
+        *pOut++ = acc2;
+        *pOut++ = acc3;
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += *px++ * *py--;
+          sum += *px++ * *py--;
+          sum += *px++ * *py--;
+          sum += *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = sum;
+
+        /* Increment MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0.0f;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = sum;
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The blockSize3 variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    if (firstIndex > srcALen)
+    {
+       pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U);
+    }
+    else
+    {
+       pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    while (blockSize3 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+        sum += *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+        sum += *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+        sum += *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum += *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float32_t *pIn1 = pSrcA;                       /* InputA pointer */
+  const float32_t *pIn2 = pSrcB;                       /* InputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Loop to calculate convolution for output length number of values */
+    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
+    {
+      /* Initialize sum with zero to carry on MAC operations */
+      sum = 0.0f;
+
+      /* Loop to perform MAC operations according to convolution equation */
+      for (j = 0U; j <= i; j++)
+      {
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
+        {
+          /* z[i] += x[i-j] * y[j] */
+          sum += ( pIn1[j] * pIn2[i - j]);
+        }
+      }
+
+      /* Store the output in the destination buffer */
+      pDst[i] = sum;
+    }
+
+    /* Set status as ARM_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#endif /* defined(ARM_MATH_DSP) */
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
index ae640f2f..a6b9ecf3 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_opt_q15.c
@@ -1,387 +1,387 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_fast_opt_q15.c
- * Description:  Fast Q15 Partial convolution
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q15 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
-  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen)
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-
-  @remark
-                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
- */
-
-arm_status arm_conv_partial_fast_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints,
-        q15_t * pScratch1,
-        q15_t * pScratch2)
-{
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-        q31_t acc0;                                    /* Accumulator */
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-        q15_t *py;                                     /* Intermediate inputB pointer */
-        uint32_t j, k, blkCnt;                         /* Loop counter */
-        uint32_t tapCnt;                               /* Loop count */
-        arm_status status;                             /* Status variable */
-        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
-        q31_t y1;                                      /* State variables */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc1, acc2, acc3;                        /* Accumulator */
-        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
-        q31_t y2;                                      /* State variables */
-#endif
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = srcBLen >> 2U;
-
-    /* Copy smaller length input sequence in reverse order into second scratch buffer */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = srcBLen % 0x4U;
-
-#else
-
-    /* Initialize k with number of samples */
-    k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Assuming scratch1 buffer is aligned by 32-bit */
-    /* Fill (srcBLen - 1U) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = (numPoints) >> 2;
-
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = read_q15x2_ia (&pScr1);
-
-      tapCnt = (srcBLen) >> 2U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = read_q15x2_ia ((q15_t **) &pIn2);
-        y2 = read_q15x2_ia ((q15_t **) &pIn2);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = read_q15x2_ia (&pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x2, y2, acc0);
-        acc2 = __SMLAD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-        acc1 = __SMLADX(x3, y2, acc1);
-
-        x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc3 = __SMLADX(x3, y2, acc3);
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3U;
-
-      while (tapCnt > 0U)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3U;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the results in the accumulators in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4U;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numPoints & 0x3;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numPoints;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1U;
-
-      while (tapCnt > 0U)
-      {
-        /* Read next two samples from scratch1 buffer */
-        x1 = read_q15x2_ia (&pScr1);
-
-        /* Read two samples from smaller buffer */
-        y1 = read_q15x2_ia ((q15_t **) &pIn2);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while (tapCnt > 0U)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-       ** Then store the output in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1U;
-
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_fast_opt_q15.c
+ * Description:  Fast Q15 Partial convolution
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+arm_status arm_conv_partial_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+        q31_t acc0;                                    /* Accumulator */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+        arm_status status;                             /* Status variable */
+        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
+        q31_t y1;                                      /* State variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulator */
+        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t y2;                                      /* State variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Temporary pointer for scratch2 */
+    py = pScratch2;
+
+    /* pointer to take end of scratch2 buffer */
+    pScr2 = pScratch2 + srcBLen - 1;
+
+    /* points to smaller length sequence */
+    px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = srcBLen >> 2U;
+
+    /* Copy smaller length input sequence in reverse order into second scratch buffer */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = srcBLen % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Initialze temporary scratch pointer */
+    pScr1 = pScratch1;
+
+    /* Assuming scratch1 buffer is aligned by 32-bit */
+    /* Fill (srcBLen - 1U) zeros in scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update temporary scratch pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+    /* Copy (srcALen) samples in scratch buffer */
+    arm_copy_q15(pIn1, pScr1, srcALen);
+
+    /* Update pointers */
+    pScr1 += srcALen;
+
+    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Initialization of pIn2 pointer */
+    pIn2 = py;
+
+    pScratch1 += firstIndex;
+
+    pOut = pDst + firstIndex;
+
+    /* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = (numPoints) >> 2;
+
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Read two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* Read next two samples from scratch1 buffer */
+      x2 = read_q15x2_ia (&pScr1);
+
+      tapCnt = (srcBLen) >> 2U;
+
+      while (tapCnt > 0U)
+      {
+
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+        y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        /* multiply and accumulate */
+        acc0 = __SMLAD(x1, y1, acc0);
+        acc2 = __SMLAD(x2, y1, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumulate */
+        acc1 = __SMLADX(x3, y1, acc1);
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* multiply and accumulate */
+        acc0 = __SMLAD(x2, y2, acc0);
+        acc2 = __SMLAD(x1, y2, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x1, x2, 0);
+#else
+        x3 = __PKHBT(x2, x1, 0);
+#endif
+
+        acc3 = __SMLADX(x3, y1, acc3);
+        acc1 = __SMLADX(x3, y2, acc1);
+
+        x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumulate */
+        acc3 = __SMLADX(x3, y2, acc3);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Update scratch pointer for remaining samples of smaller length sequence */
+      pScr1 -= 4U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      tapCnt = (srcBLen) & 3U;
+
+      while (tapCnt > 0U)
+      {
+        /* accumulate the results */
+        acc0 += (*pScr1++ * *pIn2);
+        acc1 += (*pScr1++ * *pIn2);
+        acc2 += (*pScr1++ * *pIn2);
+        acc3 += (*pScr1++ * *pIn2++);
+
+        pScr1 -= 3U;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the results in the accumulators in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 4U;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numPoints & 0x3;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    /* Calculate convolution for remaining samples of Bigger length sequence */
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+
+      tapCnt = (srcBLen) >> 1U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* Read two samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        /* multiply and accumulate */
+        acc0 = __SMLAD(x1, y1, acc0);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      tapCnt = (srcBLen) & 1U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      while (tapCnt > 0U)
+      {
+        /* accumulate the results */
+        acc0 += (*pScr1++ * *pIn2++);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       ** Then store the output in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 1U;
+
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
index 92e74873..3e928180 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q15.c
@@ -1,700 +1,707 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_fast_q15.c
- * Description:  Fast Q15 Partial convolution
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q15 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-  @remark
-                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
- */
-
-arm_status arm_conv_partial_fast_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints)
-{
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
-        uint32_t j, k, count, blkCnt, check;
-        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally
-     * divided into three stages according to the number of multiplications that has to be
-     * taken place between inputA samples and inputB samples. In the first stage of the
-     * algorithm, the multiplications increase by one for every iteration.
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.
-     * In the third stage of the algorithm, the multiplications decrease by one
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------
-     * Initializations of stage1
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]
-     * sum = x[0] * y[1] + x[1] * y[0]
-     * ....
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from firstIndex
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1U + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------
-     * Stage1 process
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while ((count < 4U) && (blockSize1 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between
-       * inputA samples and inputB samples */
-      k = count;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while (blockSize1 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD
-         So, py is incremented by 1 */
-      py = py + 1U;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-         No loop unrolling is used. */
-      k = count % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1U;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------
-     * Initializations of stage2
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-     * ....
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-     */
-
-    /* Working pointer of inputA */
-    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      pSrc1 = pIn1;
-    }
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0U;
-
-    /* -------------------
-     * Stage2 process
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-     * So, to loop unroll over blockSize2,
-     * srcBLen should be greater than or equal to 4 */
-    if (srcBLen >= 4U)
-    {
-      /* Loop unrolling: Compute 4 outputs at a time */
-      blkCnt = ((uint32_t) blockSize2 >> 2U);
-
-      while (blkCnt > 0U)
-      {
-        py = py - 1U;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-
-        /* read x[0], x[1] samples */
-        x0 = read_q15x2 ((q15_t *) px);
-        /* read x[1], x[2] samples */
-        x1 = read_q15x2 ((q15_t *) px + 1);
-        px += 2U;
-
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read the last two inputB samples using SIMD:
-           * y[srcBLen - 1] and y[srcBLen - 2] */
-          c0 = read_q15x2_da ((q15_t **) &py);
-
-          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-          acc0 = __SMLADX(x0, c0, acc0);
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-          acc1 = __SMLADX(x1, c0, acc1);
-
-          /* Read x[2], x[3] */
-          x2 = read_q15x2 ((q15_t *) px);
-
-          /* Read x[3], x[4] */
-          x3 = read_q15x2 ((q15_t *) px + 1);
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-          acc2 = __SMLADX(x2, c0, acc2);
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-          acc3 = __SMLADX(x3, c0, acc3);
-
-          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-          c0 = read_q15x2_da ((q15_t **) &py);
-
-          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-          acc0 = __SMLADX(x2, c0, acc0);
-
-          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-          acc1 = __SMLADX(x3, c0, acc1);
-
-          /* Read x[4], x[5] */
-          x0 = read_q15x2 ((q15_t *) px + 2);
-
-          /* Read x[5], x[6] */
-          x1 = read_q15x2 ((q15_t *) px + 3);
-          px += 4U;
-
-          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-          acc2 = __SMLADX(x0, c0, acc2);
-
-          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-          acc3 = __SMLADX(x1, c0, acc3);
-
-        } while (--k);
-
-        /* For the next MAC operations, SIMD is not used
-           So, the 16 bit pointer if inputB, py is updated */
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-           No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        if (k == 1U)
-        {
-          /* Read y[srcBLen - 5] */
-          c0 = *(py + 1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-          c0 = c0 << 16U;
-#else
-          c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-          /* Read x[7] */
-          x3 = read_q15x2 ((q15_t *) px);
-          px++;
-
-          /* Perform the multiply-accumulate */
-          acc0 = __SMLAD (x0, c0, acc0);
-          acc1 = __SMLAD (x1, c0, acc1);
-          acc2 = __SMLADX(x1, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        if (k == 2U)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-          c0 = read_q15x2 ((q15_t *) py);
-
-          /* Read x[7], x[8] */
-          x3 = read_q15x2 ((q15_t *) px);
-
-          /* Read x[9] */
-          x2 = read_q15x2 ((q15_t *) px + 1);
-          px += 2U;
-
-          /* Perform the multiply-accumulate */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-        }
-
-        if (k == 3U)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-          c0 = read_q15x2 ((q15_t *) py);
-
-          /* Read x[7], x[8] */
-          x3 = read_q15x2 ((q15_t *) px);
-
-          /* Read x[9] */
-          x2 = read_q15x2 ((q15_t *) px + 1);
-
-          /* Perform the multiply-accumulate */
-          acc0 = __SMLADX(x0, c0, acc0);
-          acc1 = __SMLADX(x1, c0, acc1);
-          acc2 = __SMLADX(x3, c0, acc2);
-          acc3 = __SMLADX(x2, c0, acc3);
-
-          c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-          c0 = c0 << 16U;
-#else
-          c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-          /* Read x[10] */
-          x3 =  read_q15x2 ((q15_t *) px + 2);
-          px += 3U;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLADX(x1, c0, acc0);
-          acc1 = __SMLAD (x2, c0, acc1);
-          acc2 = __SMLADX(x2, c0, acc2);
-          acc3 = __SMLADX(x3, c0, acc3);
-        }
-
-        /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-        write_q15x2_ia (&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16));
-        write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16));
-#else
-        write_q15x2_ia (&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16));
-        write_q15x2_ia (&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16));
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4U;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-         No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4U;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-           a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) *px++ * *py--);
-          sum += ((q31_t) *px++ * *py--);
-          sum += ((q31_t) *px++ * *py--);
-          sum += ((q31_t) *px++ * *py--);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum += ((q31_t) *px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) *px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (sum >> 15);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------
-     * Initializations of stage3
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-     * ....
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-     * sum +=  x[srcALen-1] * y[srcBLen-1]
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1U;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    pIn2 = pSrc2 - 1U;
-    py = pIn2;
-
-    /* -------------------
-     * Stage3 process
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2U;
-
-    while ((j > 0U) && (blockSize3 > 0))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD
-         So, py is incremented by 1 */
-      py = py + 1U;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-         No loop unrolling is used. */
-      k = count % 0x4U;
-
-      while (k > 0U)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1U;
-
-    while (blockSize3 > 0)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLAD(*px++, *py--, sum);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (sum >> 15);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement the MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_fast_q15.c
+ * Description:  Fast Q15 Partial convolution
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+  @remark
+                   Refer to \ref arm_conv_partial_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+arm_status arm_conv_partial_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations less than 4 */
+    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    while ((count < 4U) && (blockSize1 > 0))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Loop over number of MAC operations between
+       * inputA samples and inputB samples */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* The second part of the stage starts here */
+    /* The internal loop, over count, is unrolled by 4 */
+    /* To, read the last two inputB samples using SIMD:
+     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
+    py = py - 1;
+
+    while (blockSize1 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+         So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+         No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2 - 1U;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is the index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        py = py - 1U;
+
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
+
+
+        /* read x[0], x[1] samples */
+        x0 = read_q15x2 ((q15_t *) px);
+        /* read x[1], x[2] samples */
+        x1 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
+
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read the last two inputB samples using SIMD:
+           * y[srcBLen - 1] and y[srcBLen - 2] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+          acc0 = __SMLADX(x0, c0, acc0);
+
+          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+          acc1 = __SMLADX(x1, c0, acc1);
+
+          /* Read x[2], x[3] */
+          x2 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[3], x[4] */
+          x3 = read_q15x2 ((q15_t *) px + 1);
+
+          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+          acc2 = __SMLADX(x2, c0, acc2);
+
+          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+          acc3 = __SMLADX(x3, c0, acc3);
+
+          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+          acc0 = __SMLADX(x2, c0, acc0);
+
+          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+          acc1 = __SMLADX(x3, c0, acc1);
+
+          /* Read x[4], x[5] */
+          x0 = read_q15x2 ((q15_t *) px + 2);
+
+          /* Read x[5], x[6] */
+          x1 = read_q15x2 ((q15_t *) px + 3);
+          px += 4U;
+
+          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+          acc2 = __SMLADX(x0, c0, acc2);
+
+          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+          acc3 = __SMLADX(x1, c0, acc3);
+
+        } while (--k);
+
+        /* For the next MAC operations, SIMD is not used
+           So, the 16 bit pointer if inputB, py is updated */
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+           No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        if (k == 1U)
+        {
+          /* Read y[srcBLen - 5] */
+          c0 = *(py + 1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[7] */
+          x3 = read_q15x2 ((q15_t *) px);
+          px++;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLAD (x0, c0, acc0);
+          acc1 = __SMLAD (x1, c0, acc1);
+          acc2 = __SMLADX(x1, c0, acc2);
+          acc3 = __SMLADX(x3, c0, acc3);
+        }
+
+        if (k == 2U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+          px += 2U;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLADX(x0, c0, acc0);
+          acc1 = __SMLADX(x1, c0, acc1);
+          acc2 = __SMLADX(x3, c0, acc2);
+          acc3 = __SMLADX(x2, c0, acc3);
+        }
+
+        if (k == 3U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLADX(x0, c0, acc0);
+          acc1 = __SMLADX(x1, c0, acc1);
+          acc2 = __SMLADX(x3, c0, acc2);
+          acc3 = __SMLADX(x2, c0, acc3);
+
+          c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[10] */
+          x3 =  read_q15x2 ((q15_t *) px + 2);
+          px += 3U;
+
+          /* Perform the multiply-accumulates */
+          acc0 = __SMLADX(x1, c0, acc0);
+          acc1 = __SMLAD (x2, c0, acc1);
+          acc2 = __SMLADX(x2, c0, acc2);
+          acc3 = __SMLADX(x3, c0, acc3);
+        }
+
+        /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+        write_q15x2_ia (&pOut, __PKHBT(acc0 >> 15, acc1 >> 15, 16));
+        write_q15x2_ia (&pOut, __PKHBT(acc2 >> 15, acc3 >> 15, 16));
+#else
+        write_q15x2_ia (&pOut, __PKHBT(acc1 >> 15, acc0 >> 15, 16));
+        write_q15x2_ia (&pOut, __PKHBT(acc3 >> 15, acc2 >> 15, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+
+      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+         No loop unrolling is used. */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+           a second loop below computes MACs for the remaining 1 to 3 samples. */
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+          sum += ((q31_t) *px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += ((q31_t) *px++ * *py--);
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (sum >> 15);
+
+        /* Increment the pointer pIn1 index, count by 1 */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += ((q31_t) *px++ * *py--);
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (sum >> 15);
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    if (firstIndex > srcALen)
+    {
+       pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U);
+    }
+    else
+    {
+       pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    pIn2 = pSrc2 - 1U;
+    py = pIn2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations greater than 4 */
+    /* Second part of this stage computes the MAC operations less than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    j = count >> 2U;
+
+    while ((j > 0U) && (blockSize3 > 0))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
+         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
+         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLADX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+         So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+         No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pIn2;
+
+      /* Decrement the MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+
+      j--;
+    }
+
+    /* The second part of the stage starts here */
+    /* SIMD is not used for the next MAC operations,
+     * so pointer py is updated to read only one sample at a time */
+    py = py + 1U;
+
+    while (blockSize3 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum = __SMLAD(*px++, *py--, sum);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (sum >> 15);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement the MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
index f906b5ce..65269bc9 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_fast_q31.c
@@ -1,618 +1,625 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_fast_q31.c
- * Description:  Fast Q31 Partial convolution
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q31 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-
-  @remark
-                   Refer to \ref arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
- */
-
-arm_status arm_conv_partial_fast_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints)
-{
-  const q31_t *pIn1;                                   /* InputA pointer */
-  const q31_t *pIn2;                                   /* InputB pointer */
-        q31_t *pOut = pDst;                            /* Output pointer */
-  const q31_t *px;                                     /* Intermediate inputA pointer */
-  const q31_t *py;                                     /* Intermediate inputB pointer */
-  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q31_t sum;                                     /* Accumulators */
-        uint32_t j, k, count, check, blkCnt;
-        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-        q31_t x0, x1, x2, x3, c0;
-#endif
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally
-     * divided into three stages according to the number of multiplications that has to be
-     * taken place between inputA samples and inputB samples. In the first stage of the
-     * algorithm, the multiplications increase by one for every iteration.
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.
-     * In the third stage of the algorithm, the multiplications decrease by one
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------
-     * Initializations of stage1
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]
-     * sum = x[0] * y[1] + x[1] * y[0]
-     * ....
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from firstIndex
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1U + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------
-     * Stage1 process
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while (blockSize1 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* x[1] * y[srcBLen - 2] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* x[2] * y[srcBLen - 3] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* x[3] * y[srcBLen - 4] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize k with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------
-     * Initializations of stage2
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-     * ....
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-     */
-
-    /* Working pointer of inputA */
-    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      pSrc1 = pIn1;
-    }
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0U;
-
-    /* -------------------
-     * Stage2 process
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-     * So, to loop unroll over blockSize2,
-     * srcBLen should be greater than or equal to 4 */
-    if (srcBLen >= 4U)
-    {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-      blkCnt = ((uint32_t) blockSize2 >> 2U);
-
-      while (blkCnt > 0U)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *px++;
-        x1 = *px++;
-        x2 = *px++;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *py--;
-          /* Read x[3] sample */
-          x3 = *px++;
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc3 +=  x[3] * y[srcBLen - 1] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *py--;
-          /* Read x[4] sample */
-          x0 = *px++;
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc3 +=  x[4] * y[srcBLen - 2] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *py--;
-          /* Read x[5] sample */
-          x1 = *px++;
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc3 +=  x[5] * y[srcBLen - 2] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-          /* Read y[srcBLen - 4] sample */
-          c0 = *py--;
-          /* Read x[6] sample */
-          x2 = *px++;
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[3] * y[srcBLen - 4] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-          /* acc1 +=  x[4] * y[srcBLen - 4] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc2 +=  x[5] * y[srcBLen - 4] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc3 +=  x[6] * y[srcBLen - 4] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-        } while (--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        while (k > 0U)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *py--;
-          /* Read x[7] sample */
-          x3 = *px++;
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (acc0 << 1);
-        *pOut++ = (q31_t) (acc1 << 1);
-        *pOut++ = (q31_t) (acc2 << 1);
-        *pOut++ = (q31_t) (acc3 << 1);
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4U;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      blkCnt = (uint32_t) blockSize2 % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 outputs at a time */
-        k = srcBLen >> 2U;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) * px++ * (*py--))) >> 32);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Loop unrolling: Compute remaining outputs */
-        k = srcBLen % 0x4U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) *px++ * (*py--))) >> 32);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum << 1;
-
-        /* Increment MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum = (q31_t) ((((q63_t) sum << 32) +
-                          ((q63_t) *px++ * (*py--))) >> 32);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = sum << 1;
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------
-     * Initializations of stage3
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-     * ....
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-     * sum +=  x[srcALen-1] * y[srcBLen-1]
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1U;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* -------------------
-     * Stage3 process
-     * ------------------*/
-
-    while (blockSize3 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py--))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = sum << 1;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_fast_q31.c
+ * Description:  Fast Q31 Partial convolution
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
+ */
+
+arm_status arm_conv_partial_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t j, k, count, check, blkCnt;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :  (int32_t)numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* The first stage starts here */
+    while (blockSize1 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* x[0] * y[srcBLen - 1] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* x[1] * y[srcBLen - 2] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* x[2] * y[srcBLen - 3] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* x[3] * y[srcBLen - 4] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum << 1;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
+
+        /* read x[0], x[1], x[2] samples */
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read y[srcBLen - 1] sample */
+          c0 = *py--;
+          /* Read x[3] sample */
+          x3 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[0] * y[srcBLen - 1] */
+          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+          /* acc1 +=  x[1] * y[srcBLen - 1] */
+          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+          /* acc2 +=  x[2] * y[srcBLen - 1] */
+          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+          /* acc3 +=  x[3] * y[srcBLen - 1] */
+          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+          /* Read y[srcBLen - 2] sample */
+          c0 = *py--;
+          /* Read x[4] sample */
+          x0 = *px++;
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[1] * y[srcBLen - 2] */
+          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
+          /* acc1 +=  x[2] * y[srcBLen - 2] */
+          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
+          /* acc2 +=  x[3] * y[srcBLen - 2] */
+          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
+          /* acc3 +=  x[4] * y[srcBLen - 2] */
+          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+          /* Read y[srcBLen - 3] sample */
+          c0 = *py--;
+          /* Read x[5] sample */
+          x1 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[2] * y[srcBLen - 3] */
+          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
+          /* acc1 +=  x[3] * y[srcBLen - 2] */
+          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
+          /* acc2 +=  x[4] * y[srcBLen - 2] */
+          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
+          /* acc3 +=  x[5] * y[srcBLen - 2] */
+          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
+
+          /* Read y[srcBLen - 4] sample */
+          c0 = *py--;
+          /* Read x[6] sample */
+          x2 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[3] * y[srcBLen - 4] */
+          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
+          /* acc1 +=  x[4] * y[srcBLen - 4] */
+          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
+          /* acc2 +=  x[5] * y[srcBLen - 4] */
+          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
+          /* acc3 +=  x[6] * y[srcBLen - 4] */
+          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
+
+        } while (--k);
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Read y[srcBLen - 5] sample */
+          c0 = *py--;
+          /* Read x[7] sample */
+          x3 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[4] * y[srcBLen - 5] */
+          acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+          /* acc1 +=  x[5] * y[srcBLen - 5] */
+          acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+          /* acc2 +=  x[6] * y[srcBLen - 5] */
+          acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+          /* acc3 +=  x[7] * y[srcBLen - 5] */
+          acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+          /* Reuse the present samples for the next MAC */
+          x0 = x1;
+          x1 = x2;
+          x2 = x3;
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q31_t) (acc0 << 1);
+        *pOut++ = (q31_t) (acc1 << 1);
+        *pOut++ = (q31_t) (acc2 << 1);
+        *pOut++ = (q31_t) (acc3 << 1);
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum = (q31_t) ((((q63_t) sum << 32) +
+                          ((q63_t) * px++ * (*py--))) >> 32);
+          sum = (q31_t) ((((q63_t) sum << 32) +
+                          ((q63_t) * px++ * (*py--))) >> 32);
+          sum = (q31_t) ((((q63_t) sum << 32) +
+                          ((q63_t) * px++ * (*py--))) >> 32);
+          sum = (q31_t) ((((q63_t) sum << 32) +
+                          ((q63_t) * px++ * (*py--))) >> 32);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum = (q31_t) ((((q63_t) sum << 32) +
+                          ((q63_t) *px++ * (*py--))) >> 32);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = sum << 1;
+
+        /* Increment MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum = (q31_t) ((((q63_t) sum << 32) +
+                          ((q63_t) *px++ * (*py--))) >> 32);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = sum << 1;
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    if (firstIndex > srcALen)
+    {
+       pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U);
+    }
+    else
+    {
+       pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    while (blockSize3 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py--))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = sum << 1;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
index 05c3284f..7a9d6b18 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q15.c
@@ -1,386 +1,386 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_opt_q15.c
- * Description:  Partial convolution of Q15 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q15 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-
-  @remark
-                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
- */
-
-arm_status arm_conv_partial_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints,
-        q15_t * pScratch1,
-        q15_t * pScratch2)
-{
-
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
-        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
-        q63_t acc0;                                    /* Accumulator */
-        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
-        q31_t y1;                                      /* State variables */
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-        q15_t *py;                                     /* Intermediate inputB pointer */
-        uint32_t j, k, blkCnt;                         /* Loop counter */
-        uint32_t tapCnt;                               /* Loop count */
-        arm_status status;                             /* Status variable */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc1, acc2, acc3;                        /* Accumulator */
-        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
-        q31_t y2;                                      /* State variables */
-#endif
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2 + srcBLen - 1;
-
-    /* points to smaller length sequence */
-    px = pIn2;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = srcBLen >> 2U;
-
-    /* Copy smaller length input sequence in reverse order into second scratch buffer */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-      *pScr2-- = *px++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = srcBLen % 0x4U;
-
-#else
-
-    /* Initialize k with number of samples */
-    k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      *pScr2-- = *px++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Assuming scratch1 buffer is aligned by 32-bit */
-    /* Fill (srcBLen - 1U) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
-
-    /* Copy (srcALen) samples in scratch buffer */
-    arm_copy_q15(pIn1, pScr1, srcALen);
-
-    /* Update pointers */
-    pScr1 += srcALen;
-
-    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = py;
-
-    pScratch1 += firstIndex;
-
-    pOut = pDst + firstIndex;
-
-    /* Actual convolution process starts here */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = (numPoints) >> 2;
-
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = read_q15x2_ia (&pScr1);
-
-      tapCnt = (srcBLen) >> 2U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read four samples from smaller buffer */
-        y1 = read_q15x2_ia ((q15_t **) &pIn2);
-        y2 = read_q15x2_ia ((q15_t **) &pIn2);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x1, y1, acc0);
-        acc2 = __SMLALD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLALDX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = read_q15x2_ia (&pScr1);
-
-        /* multiply and accumlate */
-        acc0 = __SMLALD(x2, y2, acc0);
-        acc2 = __SMLALD(x1, y2, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y1, acc3);
-        acc1 = __SMLALDX(x3, y2, acc1);
-
-        x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLALDX(x3, y2, acc3);
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3U;
-
-      while (tapCnt > 0U)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2);
-        acc1 += (*pScr1++ * *pIn2);
-        acc2 += (*pScr1++ * *pIn2);
-        acc3 += (*pScr1++ * *pIn2++);
-
-        pScr1 -= 3U;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the results in the accumulators in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 4U;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numPoints & 0x3;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numPoints;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1U;
-
-      while (tapCnt > 0U)
-      {
-        /* Read next two samples from scratch1 buffer */
-        x1 = read_q15x2_ia (&pScr1);
-
-        /* Read two samples from smaller buffer */
-        y1 = read_q15x2_ia ((q15_t **) &pIn2);
-
-        acc0 = __SMLALD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while (tapCnt > 0U)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pIn2++);
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-       ** Then store the output in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-      /* Initialization of inputB pointer */
-      pIn2 = py;
-
-      pScratch1 += 1U;
-
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_opt_q15.c
+ * Description:  Partial convolution of Q15 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer of size min(srcALen, srcBLen).
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+ */
+
+arm_status arm_conv_partial_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch1 */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch1 */
+        q63_t acc0;                                    /* Accumulator */
+        q31_t x1;                                      /* Temporary variables to hold state and coefficient values */
+        q31_t y1;                                      /* State variables */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+        q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, k, blkCnt;                         /* Loop counter */
+        uint32_t tapCnt;                               /* Loop count */
+        arm_status status;                             /* Status variable */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulator */
+        q31_t x2, x3;                                  /* Temporary variables to hold state and coefficient values */
+        q31_t y2;                                      /* State variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Temporary pointer for scratch2 */
+    py = pScratch2;
+
+    /* pointer to take end of scratch2 buffer */
+    pScr2 = pScratch2 + srcBLen - 1;
+
+    /* points to smaller length sequence */
+    px = pIn2;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = srcBLen >> 2U;
+
+    /* Copy smaller length input sequence in reverse order into second scratch buffer */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = srcBLen % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      *pScr2-- = *px++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Initialze temporary scratch pointer */
+    pScr1 = pScratch1;
+
+    /* Assuming scratch1 buffer is aligned by 32-bit */
+    /* Fill (srcBLen - 1U) zeros in scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update temporary scratch pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Copy bigger length sequence(srcALen) samples in scratch1 buffer */
+
+    /* Copy (srcALen) samples in scratch buffer */
+    arm_copy_q15(pIn1, pScr1, srcALen);
+
+    /* Update pointers */
+    pScr1 += srcALen;
+
+    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Initialization of pIn2 pointer */
+    pIn2 = py;
+
+    pScratch1 += firstIndex;
+
+    pOut = pDst + firstIndex;
+
+    /* Actual convolution process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = (numPoints) >> 2;
+
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Read two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* Read next two samples from scratch1 buffer */
+      x2 = read_q15x2_ia (&pScr1);
+
+      tapCnt = (srcBLen) >> 2U;
+
+      while (tapCnt > 0U)
+      {
+
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+        y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        /* multiply and accumulate */
+        acc0 = __SMLALD(x1, y1, acc0);
+        acc2 = __SMLALD(x2, y1, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumulate */
+        acc1 = __SMLALDX(x3, y1, acc1);
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* multiply and accumulate */
+        acc0 = __SMLALD(x2, y2, acc0);
+        acc2 = __SMLALD(x1, y2, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x1, x2, 0);
+#else
+        x3 = __PKHBT(x2, x1, 0);
+#endif
+
+        acc3 = __SMLALDX(x3, y1, acc3);
+        acc1 = __SMLALDX(x3, y2, acc1);
+
+        x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        acc3 = __SMLALDX(x3, y2, acc3);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Update scratch pointer for remaining samples of smaller length sequence */
+      pScr1 -= 4U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      tapCnt = (srcBLen) & 3U;
+
+      while (tapCnt > 0U)
+      {
+        /* accumulate the results */
+        acc0 += (*pScr1++ * *pIn2);
+        acc1 += (*pScr1++ * *pIn2);
+        acc2 += (*pScr1++ * *pIn2);
+        acc3 += (*pScr1++ * *pIn2++);
+
+        pScr1 -= 3U;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the results in the accumulators in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 4U;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numPoints & 0x3;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numPoints;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    /* Calculate convolution for remaining samples of Bigger length sequence */
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+
+      tapCnt = (srcBLen) >> 1U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* Read two samples from smaller buffer */
+        y1 = read_q15x2_ia ((q15_t **) &pIn2);
+
+        acc0 = __SMLALD(x1, y1, acc0);
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      tapCnt = (srcBLen) & 1U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      while (tapCnt > 0U)
+      {
+        /* accumulate the results */
+        acc0 += (*pScr1++ * *pIn2++);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       ** Then store the output in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+      /* Initialization of inputB pointer */
+      pIn2 = py;
+
+      pScratch1 += 1U;
+
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
index 5ac2af41..a5c16c50 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_opt_q7.c
@@ -1,390 +1,390 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_opt_q7.c
- * Description:  Partial convolution of Q7 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q7 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
- */
-
-arm_status arm_conv_partial_opt_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints,
-        q15_t * pScratch1,
-        q15_t * pScratch2)
-{
-        q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
-        q15_t x4;                                      /* Temporary input variable */
-  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
-        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
-  const q7_t *px;                                      /* Temporary input1 pointer */
-        q15_t *py;                                     /* Temporary input2 pointer */
-        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-        arm_status status;
-        q7_t *pOut = pDst;                             /* Output pointer */
-        q7_t out0, out1, out2, out3;                   /* Temporary variables */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* pointer to take end of scratch2 buffer */
-    pScr2 = pScratch2;
-
-    /* points to smaller length sequence */
-    px = pIn2 + srcBLen - 1;
-
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcBLen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) *px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) *px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) *px--;
-      *pScr2++ = x4;
-      x4 = (q15_t) *px--;
-      *pScr2++ = x4;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcBLen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) *px--;
-      *pScr2++ = x4;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Initialze temporary scratch pointer */
-    pScr1 = pScratch1;
-
-    /* Fill (srcBLen - 1U) zeros in scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update temporary scratch pointer */
-    pScr1 += (srcBLen - 1U);
-
-    /* Copy (srcALen) samples in scratch buffer */
-    /* Apply loop unrolling and do 4 Copies simultaneously. */
-    k = srcALen >> 2U;
-
-    /* First part of the processing with loop unrolling copies 4 data points at a time.
-     ** a second loop below copies for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner */
-      x4 = (q15_t) *pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) *pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) *pIn1++;
-      *pScr1++ = x4;
-      x4 = (q15_t) *pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, copy remaining samples here.
-     ** No loop unrolling is used. */
-    k = srcALen % 0x4U;
-
-    while (k > 0U)
-    {
-      /* copy second buffer in reversal manner for remaining samples */
-      x4 = (q15_t) *pIn1++;
-      *pScr1++ = x4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-    arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-    /* Update pointer */
-    pScr1 += (srcBLen - 1U);
-
-
-    /* Temporary pointer for scratch2 */
-    py = pScratch2;
-
-    /* Initialization of pIn2 pointer */
-    pIn2 = (q7_t *) py;
-
-    pScr2 = py;
-
-    pOut = pDst + firstIndex;
-
-    pScratch1 += firstIndex;
-
-    /* Actual convolution process starts here */
-    blkCnt = (numPoints) >> 2;
-
-    while (blkCnt > 0)
-    {
-      /* Initialize temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumulators */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Read two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* Read next two samples from scratch1 buffer */
-      x2 = read_q15x2_ia (&pScr1);
-
-      tapCnt = (srcBLen) >> 2U;
-
-      while (tapCnt > 0U)
-      {
-        /* Read four samples from smaller buffer */
-        y1 = read_q15x2_ia (&pScr2);
-
-        /* multiply and accumlate */
-        acc0 = __SMLAD(x1, y1, acc0);
-        acc2 = __SMLAD(x2, y1, acc2);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        /* multiply and accumlate */
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = read_q15x2_ia (&pScr1);
-
-        /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x1, x2, 0);
-#else
-        x3 = __PKHBT(x2, x1, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        /* Read four samples from smaller buffer */
-        y1 = read_q15x2_ia (&pScr2);
-
-        acc0 = __SMLAD(x2, y1, acc0);
-
-        acc2 = __SMLAD(x1, y1, acc2);
-
-        acc1 = __SMLADX(x3, y1, acc1);
-
-        x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        x3 = __PKHBT(x2, x1, 0);
-#else
-        x3 = __PKHBT(x1, x2, 0);
-#endif
-
-        acc3 = __SMLADX(x3, y1, acc3);
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* Update scratch pointer for remaining samples of smaller length sequence */
-      pScr1 -= 4U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      tapCnt = (srcBLen) & 3U;
-
-      while (tapCnt > 0U)
-      {
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2);
-        acc1 += (*pScr1++ * *pScr2);
-        acc2 += (*pScr1++ * *pScr2);
-        acc3 += (*pScr1++ * *pScr2++);
-
-        pScr1 -= 3U;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      out0 = (q7_t) (__SSAT(acc0 >> 7U, 8));
-      out1 = (q7_t) (__SSAT(acc1 >> 7U, 8));
-      out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
-      out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
-
-      write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 4U;
-    }
-
-    blkCnt = (numPoints) & 0x3;
-
-    /* Calculate convolution for remaining samples of Bigger length sequence */
-    while (blkCnt > 0)
-    {
-      /* Initialze temporary scratch pointer as scratch1 */
-      pScr1 = pScratch1;
-
-      /* Clear Accumlators */
-      acc0 = 0;
-
-      tapCnt = (srcBLen) >> 1U;
-
-      while (tapCnt > 0U)
-      {
-
-        /* Read next two samples from scratch1 buffer */
-        x1 = read_q15x2_ia (&pScr1);
-
-        /* Read two samples from smaller buffer */
-        y1 = read_q15x2_ia (&pScr2);
-
-        acc0 = __SMLAD(x1, y1, acc0);
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tapCnt = (srcBLen) & 1U;
-
-      /* apply same above for remaining samples of smaller length sequence */
-      while (tapCnt > 0U)
-      {
-
-        /* accumlate the results */
-        acc0 += (*pScr1++ * *pScr2++);
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      blkCnt--;
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
-
-      /* Initialization of inputB pointer */
-      pScr2 = py;
-
-      pScratch1 += 1U;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_opt_q7.c
+ * Description:  Partial convolution of Q7 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+ */
+
+arm_status arm_conv_partial_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pScr2, *pScr1;                          /* Intermediate pointers for scratch pointers */
+        q15_t x4;                                      /* Temporary input variable */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+  const q7_t *px;                                      /* Temporary input1 pointer */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+        arm_status status;
+        q7_t *pOut = pDst;                             /* Output pointer */
+        q7_t out0, out1, out2, out3;                   /* Temporary variables */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* pointer to take end of scratch2 buffer */
+    pScr2 = pScratch2;
+
+    /* points to smaller length sequence */
+    px = pIn2 + srcBLen - 1;
+
+    /* Apply loop unrolling and do 4 Copies simultaneously. */
+    k = srcBLen >> 2U;
+
+    /* First part of the processing with loop unrolling copies 4 data points at a time.
+     ** a second loop below copies for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, copy remaining samples here.
+     ** No loop unrolling is used. */
+    k = srcBLen % 0x4U;
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      x4 = (q15_t) *px--;
+      *pScr2++ = x4;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Initialze temporary scratch pointer */
+    pScr1 = pScratch1;
+
+    /* Fill (srcBLen - 1U) zeros in scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update temporary scratch pointer */
+    pScr1 += (srcBLen - 1U);
+
+    /* Copy (srcALen) samples in scratch buffer */
+    /* Apply loop unrolling and do 4 Copies simultaneously. */
+    k = srcALen >> 2U;
+
+    /* First part of the processing with loop unrolling copies 4 data points at a time.
+     ** a second loop below copies for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner */
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, copy remaining samples here.
+     ** No loop unrolling is used. */
+    k = srcALen % 0x4U;
+
+    while (k > 0U)
+    {
+      /* copy second buffer in reversal manner for remaining samples */
+      x4 = (q15_t) *pIn1++;
+      *pScr1++ = x4;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+    arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+    /* Update pointer */
+    pScr1 += (srcBLen - 1U);
+
+
+    /* Temporary pointer for scratch2 */
+    py = pScratch2;
+
+    /* Initialization of pIn2 pointer */
+    pIn2 = (q7_t *) py;
+
+    pScr2 = py;
+
+    pOut = pDst + firstIndex;
+
+    pScratch1 += firstIndex;
+
+    /* Actual convolution process starts here */
+    blkCnt = (numPoints) >> 2;
+
+    while (blkCnt > 0)
+    {
+      /* Initialize temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumulators */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Read two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* Read next two samples from scratch1 buffer */
+      x2 = read_q15x2_ia (&pScr1);
+
+      tapCnt = (srcBLen) >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia (&pScr2);
+
+        /* multiply and accumulate */
+        acc0 = __SMLAD(x1, y1, acc0);
+        acc2 = __SMLAD(x2, y1, acc2);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        /* multiply and accumulate */
+        acc1 = __SMLADX(x3, y1, acc1);
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x1, x2, 0);
+#else
+        x3 = __PKHBT(x2, x1, 0);
+#endif
+
+        acc3 = __SMLADX(x3, y1, acc3);
+
+        /* Read four samples from smaller buffer */
+        y1 = read_q15x2_ia (&pScr2);
+
+        acc0 = __SMLAD(x2, y1, acc0);
+
+        acc2 = __SMLAD(x1, y1, acc2);
+
+        acc1 = __SMLADX(x3, y1, acc1);
+
+        x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        x3 = __PKHBT(x2, x1, 0);
+#else
+        x3 = __PKHBT(x1, x2, 0);
+#endif
+
+        acc3 = __SMLADX(x3, y1, acc3);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Update scratch pointer for remaining samples of smaller length sequence */
+      pScr1 -= 4U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      tapCnt = (srcBLen) & 3U;
+
+      while (tapCnt > 0U)
+      {
+        /* accumulate the results */
+        acc0 += (*pScr1++ * *pScr2);
+        acc1 += (*pScr1++ * *pScr2);
+        acc2 += (*pScr1++ * *pScr2);
+        acc3 += (*pScr1++ * *pScr2++);
+
+        pScr1 -= 3U;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the result in the accumulator in the destination buffer. */
+      out0 = (q7_t) (__SSAT(acc0 >> 7U, 8));
+      out1 = (q7_t) (__SSAT(acc1 >> 7U, 8));
+      out2 = (q7_t) (__SSAT(acc2 >> 7U, 8));
+      out3 = (q7_t) (__SSAT(acc3 >> 7U, 8));
+
+      write_q7x4_ia (&pOut, __PACKq7(out0, out1, out2, out3));
+
+      /* Initialization of inputB pointer */
+      pScr2 = py;
+
+      pScratch1 += 4U;
+    }
+
+    blkCnt = (numPoints) & 0x3;
+
+    /* Calculate convolution for remaining samples of Bigger length sequence */
+    while (blkCnt > 0)
+    {
+      /* Initialze temporary scratch pointer as scratch1 */
+      pScr1 = pScratch1;
+
+      /* Clear Accumlators */
+      acc0 = 0;
+
+      tapCnt = (srcBLen) >> 1U;
+
+      while (tapCnt > 0U)
+      {
+
+        /* Read next two samples from scratch1 buffer */
+        x1 = read_q15x2_ia (&pScr1);
+
+        /* Read two samples from smaller buffer */
+        y1 = read_q15x2_ia (&pScr2);
+
+        acc0 = __SMLAD(x1, y1, acc0);
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      tapCnt = (srcBLen) & 1U;
+
+      /* apply same above for remaining samples of smaller length sequence */
+      while (tapCnt > 0U)
+      {
+
+        /* accumulate the results */
+        acc0 += (*pScr1++ * *pScr2++);
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      blkCnt--;
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
+
+      /* Initialization of inputB pointer */
+      pScr2 = py;
+
+      pScratch1 += 1U;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
index 15ea7960..cfab5168 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q15.c
@@ -1,752 +1,759 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_q15.c
- * Description:  Partial convolution of Q15 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q15 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-
-  @remark
-                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
-  @remark
-                   Refer to \ref arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
- */
-
-arm_status arm_conv_partial_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints)
-{
-
-#if defined (ARM_MATH_DSP)
-
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
-        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
-        uint32_t j, k, count, blkCnt, check;
-        arm_status status;                             /* Status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally
-     * divided into three stages according to the number of multiplications that has to be
-     * taken place between inputA samples and inputB samples. In the first stage of the
-     * algorithm, the multiplications increase by one for every iteration.
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.
-     * In the third stage of the algorithm, the multiplications decrease by one
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------
-     * Initializations of stage1
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]
-     * sum = x[0] * y[1] + x[1] * y[0]
-     * ....
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from firstIndex
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1U + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------
-     * Stage1 process
-     * ----------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations less than 4 */
-    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    while ((count < 4U) && (blockSize1 > 0U))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Loop over number of MAC operations between
-       * inputA samples and inputB samples */
-      k = count;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* The second part of the stage starts here */
-    /* The internal loop, over count, is unrolled by 4 */
-    /* To, read the last two inputB samples using SIMD:
-     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-    py = py - 1;
-
-    while (blockSize1 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD
-       * So, py is incremented by 1 */
-      py = py + 1U;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-         No loop unrolling is used. */
-      k = count % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2 - 1U;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------
-     * Initializations of stage2
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-     * ....
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-     */
-
-    /* Working pointer of inputA */
-    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      pSrc1 = pIn1;
-    }
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0U;
-
-    /* -------------------
-     * Stage2 process
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-     * So, to loop unroll over blockSize2,
-     * srcBLen should be greater than or equal to 4 */
-    if (srcBLen >= 4U)
-    {
-      /* Loop unrolling: Compute 4 outputs at a time */
-      blkCnt = ((uint32_t) blockSize2 >> 2U);
-
-      while (blkCnt > 0U)
-      {
-        py = py - 1U;
-
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-
-        /* read x[0], x[1] samples */
-        x0 = read_q15x2 ((q15_t *) px);
-        /* read x[1], x[2] samples */
-        x1 = read_q15x2 ((q15_t *) px + 1);
-        px += 2U;
-
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read the last two inputB samples using SIMD:
-           * y[srcBLen - 1] and y[srcBLen - 2] */
-          c0 = read_q15x2_da ((q15_t **) &py);
-
-          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-          acc0 = __SMLALDX(x0, c0, acc0);
-
-          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-          acc1 = __SMLALDX(x1, c0, acc1);
-
-          /* Read x[2], x[3] */
-          x2 = read_q15x2 ((q15_t *) px);
-
-          /* Read x[3], x[4] */
-          x3 = read_q15x2 ((q15_t *) px + 1);
-
-          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-          acc2 = __SMLALDX(x2, c0, acc2);
-
-          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-          acc3 = __SMLALDX(x3, c0, acc3);
-
-          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-          c0 = read_q15x2_da ((q15_t **) &py);
-
-          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-          acc0 = __SMLALDX(x2, c0, acc0);
-
-          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-          acc1 = __SMLALDX(x3, c0, acc1);
-
-          /* Read x[4], x[5] */
-          x0 = read_q15x2 ((q15_t *) px + 2);
-
-          /* Read x[5], x[6] */
-          x1 = read_q15x2 ((q15_t *) px + 3);
-          px += 4U;
-
-          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-          acc2 = __SMLALDX(x0, c0, acc2);
-
-          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-          acc3 = __SMLALDX(x1, c0, acc3);
-
-        } while (--k);
-
-        /* For the next MAC operations, SIMD is not used
-         * So, the 16 bit pointer if inputB, py is updated */
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        if (k == 1U)
-        {
-          /* Read y[srcBLen - 5] */
-          c0 = *(py+1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-          c0 = c0 << 16U;
-#else
-          c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-          /* Read x[7] */
-          x3 = read_q15x2 ((q15_t *) px);
-          px++;
-
-          /* Perform the multiply-accumulate */
-          acc0 = __SMLALD (x0, c0, acc0);
-          acc1 = __SMLALD (x1, c0, acc1);
-          acc2 = __SMLALDX(x1, c0, acc2);
-          acc3 = __SMLALDX(x3, c0, acc3);
-        }
-
-        if (k == 2U)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-          c0 = read_q15x2 ((q15_t *) py);
-
-          /* Read x[7], x[8] */
-          x3 = read_q15x2 ((q15_t *) px);
-
-          /* Read x[9] */
-          x2 = read_q15x2 ((q15_t *) px + 1);
-          px += 2U;
-
-          /* Perform the multiply-accumulate */
-          acc0 = __SMLALDX(x0, c0, acc0);
-          acc1 = __SMLALDX(x1, c0, acc1);
-          acc2 = __SMLALDX(x3, c0, acc2);
-          acc3 = __SMLALDX(x2, c0, acc3);
-        }
-
-        if (k == 3U)
-        {
-          /* Read y[srcBLen - 5], y[srcBLen - 6] */
-          c0 = read_q15x2 ((q15_t *) py);
-
-          /* Read x[7], x[8] */
-          x3 = read_q15x2 ((q15_t *) px);
-
-          /* Read x[9] */
-          x2 = read_q15x2 ((q15_t *) px + 1);
-
-          /* Perform the multiply-accumulate */
-          acc0 = __SMLALDX(x0, c0, acc0);
-          acc1 = __SMLALDX(x1, c0, acc1);
-          acc2 = __SMLALDX(x3, c0, acc2);
-          acc3 = __SMLALDX(x2, c0, acc3);
-
-          c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-          c0 = c0 << 16U;
-#else
-          c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-          /* Read x[10] */
-          x3 =  read_q15x2 ((q15_t *) px + 2);
-          px += 3U;
-
-          /* Perform the multiply-accumulates */
-          acc0 = __SMLALDX(x1, c0, acc0);
-          acc1 = __SMLALD (x2, c0, acc1);
-          acc2 = __SMLALDX(x2, c0, acc2);
-          acc3 = __SMLALDX(x3, c0, acc3);
-        }
-
-        /* Store the results in the accumulators in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4U;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-
-      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-         No loop unrolling is used. */
-      blkCnt = (uint32_t) blockSize2 % 0x4U;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-           a second loop below computes MACs for the remaining 1 to 3 samples. */
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) ((q31_t) *px++ * *py--);
-          sum += (q63_t) ((q31_t) *px++ * *py--);
-          sum += (q63_t) ((q31_t) *px++ * *py--);
-          sum += (q63_t) ((q31_t) *px++ * *py--);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) ((q31_t) *px++ * *py--);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) ((q31_t) *px++ * *py--);
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------
-     * Initializations of stage3
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-     * ....
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-     * sum +=  x[srcALen-1] * y[srcBLen-1]
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1U;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    pIn2 = pSrc2 - 1U;
-    py = pIn2;
-
-    /* -------------------
-     * Stage3 process
-     * ------------------*/
-
-    /* For loop unrolling by 4, this stage is divided into two. */
-    /* First part of this stage computes the MAC operations greater than 4 */
-    /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-    /* The first part of the stage starts here */
-    j = count >> 2U;
-
-    while ((j > 0U) && (blockSize3 > 0U))
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
-         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
-         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* For the next MAC operations, the pointer py is used without SIMD
-       * So, py is incremented by 1 */
-      py = py + 1U;
-
-      /* If the count is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = count % 0x4U;
-
-      while (k > 0U)
-      {
-        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pIn2;
-
-      /* Decrement MAC count */
-      count--;
-
-      /* Decrement loop counter */
-      blockSize3--;
-
-      j--;
-    }
-
-    /* The second part of the stage starts here */
-    /* SIMD is not used for the next MAC operations,
-     * so pointer py is updated to read only one sample at a time */
-    py = py + 1U;
-
-    while (blockSize3 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = count;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum = __SMLALD(*px++, *py--, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
-  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
-        q63_t sum;                                     /* Accumulator */
-        uint32_t i, j;                                 /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0U; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if (((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q31_t) pIn1[j] * pIn2[i - j]);
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_q15.c
+ * Description:  Partial convolution of Q15 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_conv_partial_opt_q15() for a faster implementation of this function using scratch buffers.
+ */
+
+arm_status arm_conv_partial_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulator */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        uint32_t j, k, count, blkCnt, check;
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :  (int32_t)numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations less than 4 */
+    /* Second part of this stage computes the MAC operations greater than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    while ((count < 4U) && (blockSize1 > 0))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Loop over number of MAC operations between
+       * inputA samples and inputB samples */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* The second part of the stage starts here */
+    /* The internal loop, over count, is unrolled by 4 */
+    /* To, read the last two inputB samples using SIMD:
+     * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
+    py = py - 1;
+
+    while (blockSize1 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+       * So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+         No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2 - 1U;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is the index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        py = py - 1U;
+
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
+
+
+        /* read x[0], x[1] samples */
+        x0 = read_q15x2 ((q15_t *) px);
+        /* read x[1], x[2] samples */
+        x1 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
+
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read the last two inputB samples using SIMD:
+           * y[srcBLen - 1] and y[srcBLen - 2] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+          acc0 = __SMLALDX(x0, c0, acc0);
+
+          /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+          acc1 = __SMLALDX(x1, c0, acc1);
+
+          /* Read x[2], x[3] */
+          x2 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[3], x[4] */
+          x3 = read_q15x2 ((q15_t *) px + 1);
+
+          /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+          acc2 = __SMLALDX(x2, c0, acc2);
+
+          /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+          acc3 = __SMLALDX(x3, c0, acc3);
+
+          /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+          c0 = read_q15x2_da ((q15_t **) &py);
+
+          /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+          acc0 = __SMLALDX(x2, c0, acc0);
+
+          /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+          acc1 = __SMLALDX(x3, c0, acc1);
+
+          /* Read x[4], x[5] */
+          x0 = read_q15x2 ((q15_t *) px + 2);
+
+          /* Read x[5], x[6] */
+          x1 = read_q15x2 ((q15_t *) px + 3);
+          px += 4U;
+
+          /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+          acc2 = __SMLALDX(x0, c0, acc2);
+
+          /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+          acc3 = __SMLALDX(x1, c0, acc3);
+
+        } while (--k);
+
+        /* For the next MAC operations, SIMD is not used
+         * So, the 16 bit pointer if inputB, py is updated */
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        if (k == 1U)
+        {
+          /* Read y[srcBLen - 5] */
+          c0 = *(py+1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[7] */
+          x3 = read_q15x2 ((q15_t *) px);
+          px++;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALD (x0, c0, acc0);
+          acc1 = __SMLALD (x1, c0, acc1);
+          acc2 = __SMLALDX(x1, c0, acc2);
+          acc3 = __SMLALDX(x3, c0, acc3);
+        }
+
+        if (k == 2U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+          px += 2U;
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALDX(x0, c0, acc0);
+          acc1 = __SMLALDX(x1, c0, acc1);
+          acc2 = __SMLALDX(x3, c0, acc2);
+          acc3 = __SMLALDX(x2, c0, acc3);
+        }
+
+        if (k == 3U)
+        {
+          /* Read y[srcBLen - 5], y[srcBLen - 6] */
+          c0 = read_q15x2 ((q15_t *) py);
+
+          /* Read x[7], x[8] */
+          x3 = read_q15x2 ((q15_t *) px);
+
+          /* Read x[9] */
+          x2 = read_q15x2 ((q15_t *) px + 1);
+
+          /* Perform the multiply-accumulate */
+          acc0 = __SMLALDX(x0, c0, acc0);
+          acc1 = __SMLALDX(x1, c0, acc1);
+          acc2 = __SMLALDX(x3, c0, acc2);
+          acc3 = __SMLALDX(x2, c0, acc3);
+
+          c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+          c0 = c0 << 16U;
+#else
+          c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+          /* Read x[10] */
+          x3 =  read_q15x2 ((q15_t *) px + 2);
+          px += 3U;
+
+          /* Perform the multiply-accumulates */
+          acc0 = __SMLALDX(x1, c0, acc0);
+          acc1 = __SMLALD (x2, c0, acc1);
+          acc2 = __SMLALDX(x2, c0, acc2);
+          acc3 = __SMLALDX(x3, c0, acc3);
+        }
+
+        /* Store the results in the accumulators in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+        write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+         No loop unrolling is used. */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+           a second loop below computes MACs for the remaining 1 to 3 samples. */
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
+
+        /* Increment the pointer pIn1 index, count by 1 */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) ((q31_t) *px++ * *py--);
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    if (firstIndex > srcALen)
+    {
+       pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U);
+    }
+    else
+    {
+       pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    pIn2 = pSrc2 - 1U;
+    py = pIn2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    /* For loop unrolling by 4, this stage is divided into two. */
+    /* First part of this stage computes the MAC operations greater than 4 */
+    /* Second part of this stage computes the MAC operations less than or equal to 4 */
+
+    /* The first part of the stage starts here */
+    j = count >> 2U;
+
+    while ((j > 0U) && (blockSize3 > 0))
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
+         * with y[srcBLen - 1], y[srcBLen - 2] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+        /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
+         * with y[srcBLen - 3], y[srcBLen - 4] respectively */
+        sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* For the next MAC operations, the pointer py is used without SIMD
+       * So, py is incremented by 1 */
+      py = py + 1U;
+
+      /* If the count is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = count % 0x4U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pIn2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement loop counter */
+      blockSize3--;
+
+      j--;
+    }
+
+    /* The second part of the stage starts here */
+    /* SIMD is not used for the next MAC operations,
+     * so pointer py is updated to read only one sample at a time */
+    py = py + 1U;
+
+    while (blockSize3 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = count;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum = __SMLALD(*px++, *py--, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Loop to calculate convolution for output length number of values */
+    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
+    {
+      /* Initialize sum with zero to carry on MAC operations */
+      sum = 0;
+
+      /* Loop to perform MAC operations according to convolution equation */
+      for (j = 0U; j <= i; j++)
+      {
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
+        {
+          /* z[i] += x[i-j] * y[j] */
+          sum += ((q31_t) pIn1[j] * pIn2[i - j]);
+        }
+      }
+
+      /* Store the output in the destination buffer */
+      pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
index b8042ef5..bcd52983 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q31.c
@@ -1,634 +1,640 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_q31.c
- * Description:  Partial convolution of Q31 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q31 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-
-  @remark
-                   Refer to \ref arm_conv_partial_fast_q31() for a faster but less precise implementation of this function.
- */
-
-arm_status arm_conv_partial_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const q31_t *pIn1;                                   /* InputA pointer */
-  const q31_t *pIn2;                                   /* InputB pointer */
-        q31_t *pOut = pDst;                            /* Output pointer */
-  const q31_t *px;                                     /* Intermediate inputA pointer */
-  const q31_t *py;                                     /* Intermediate inputB pointer */
-  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q63_t sum;                                     /* Accumulator */
-        uint32_t j, k, count, blkCnt, check;
-        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc0, acc1, acc2;                        /* Accumulator */
-        q31_t x0, x1, x2, c0;                          /* Temporary variables */
-#endif
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally
-     * divided into three stages according to the number of multiplications that has to be
-     * taken place between inputA samples and inputB samples. In the first stage of the
-     * algorithm, the multiplications increase by one for every iteration.
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.
-     * In the third stage of the algorithm, the multiplications decrease by one
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------
-     * Initializations of stage1
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]
-     * sum = x[0] * y[1] + x[1] * y[0]
-     * ....
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from firstIndex
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1U + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------
-     * Stage1 process
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while (blockSize1 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* x[0] * y[srcBLen - 1] */
-        sum += (q63_t) *px++ * (*py--);
-
-        /* x[1] * y[srcBLen - 2] */
-        sum += (q63_t) *px++ * (*py--);
-
-        /* x[2] * y[srcBLen - 3] */
-        sum += (q63_t) *px++ * (*py--);
-
-        /* x[3] * y[srcBLen - 4] */
-        sum += (q63_t) *px++ * (*py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize k with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) *px++ * (*py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------
-     * Initializations of stage2
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-     * ....
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-     */
-
-    /* Working pointer of inputA */
-    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      pSrc1 = pIn1;
-    }
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* count is index by which the pointer pIn1 to be incremented */
-    count = 0U;
-
-    /* -------------------
-     * Stage2 process
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-     * So, to loop unroll over blockSize2,
-     * srcBLen should be greater than or equal to 4 */
-    if (srcBLen >= 4U)
-    {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unroll over blkCnt */
-      blkCnt = blockSize2 / 3;
-
-      while (blkCnt > 0U)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-
-        /* read x[0], x[1] samples */
-        x0 = *px++;
-        x1 = *px++;
-
-        /* Apply loop unrolling and compute 3 MACs simultaneously. */
-        k = srcBLen / 3;
-
-        /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *(py);
-
-          /* Read x[2] sample */
-          x2 = *(px);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[0] * y[srcBLen - 1] */
-          acc0 += (q63_t) x0 * c0;
-          /* acc1 +=  x[1] * y[srcBLen - 1] */
-          acc1 += (q63_t) x1 * c0;
-          /* acc2 +=  x[2] * y[srcBLen - 1] */
-          acc2 += (q63_t) x2 * c0;
-
-          /* Read y[srcBLen - 2] sample */
-          c0 = *(py - 1U);
-
-          /* Read x[3] sample */
-          x0 = *(px + 1U);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[1] * y[srcBLen - 2] */
-          acc0 += (q63_t) x1 * c0;
-          /* acc1 +=  x[2] * y[srcBLen - 2] */
-          acc1 += (q63_t) x2 * c0;
-          /* acc2 +=  x[3] * y[srcBLen - 2] */
-          acc2 += (q63_t) x0 * c0;
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *(py - 2U);
-
-          /* Read x[4] sample */
-          x1 = *(px + 2U);
-
-          /* Perform the multiply-accumulate */
-          /* acc0 +=  x[2] * y[srcBLen - 3] */
-          acc0 += (q63_t) x2 * c0;
-          /* acc1 +=  x[3] * y[srcBLen - 2] */
-          acc1 += (q63_t) x0 * c0;
-          /* acc2 +=  x[4] * y[srcBLen - 2] */
-          acc2 += (q63_t) x1 * c0;
-
-
-          px += 3U;
-
-          py -= 3U;
-
-        } while (--k);
-
-        /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen - (3 * (srcBLen / 3));
-
-        while (k > 0U)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *py--;
-          /* Read x[7] sample */
-          x2 = *px++;
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += (q63_t) x0 * c0;
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += (q63_t) x1 * c0;
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += (q63_t) x2 * c0;
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (acc0 >> 31);
-        *pOut++ = (q31_t) (acc1 >> 31);
-        *pOut++ = (q31_t) (acc2 >> 31);
-
-        /* Increment the pointer pIn1 index, count by 3 */
-        count += 3U;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 outputs at a time */
-        k = srcBLen >> 2U;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) *px++ * (*py--);
-          sum += (q63_t) *px++ * (*py--);
-          sum += (q63_t) *px++ * (*py--);
-          sum += (q63_t) *px++ * (*py--);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Loop unrolling: Compute remaining outputs */
-        k = srcBLen % 0x4U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) *px++ * *py--;
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += (q63_t) *px++ * *py--;
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q31_t) (sum >> 31);
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------
-     * Initializations of stage3
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-     * ....
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-     * sum +=  x[srcALen-1] * y[srcBLen-1]
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The blockSize3 variable holds the number of MAC operations performed */
-    count = srcBLen - 1U;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* -------------------
-     * Stage3 process
-     * ------------------*/
-
-    while (blockSize3 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        sum += (q63_t) *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum += (q63_t) *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        sum += (q63_t) *px++ * *py--;
-
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum += (q63_t) *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += (q63_t) *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
-  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
-        q63_t sum;                                     /* Accumulator */
-        uint32_t i, j;                                 /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0U; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if (((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q63_t) pIn1[j] * pIn2[i - j]);
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q31_t) (sum >> 31U);
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_q31.c
+ * Description:  Partial convolution of Q31 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_fast_q31() for a faster but less precise implementation of this function.
+ */
+
+arm_status arm_conv_partial_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+
+#if defined(ARM_MATH_DSP)
+
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulator */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 :  (int32_t)numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* The first stage starts here */
+    while (blockSize1 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* x[0] * y[srcBLen - 1] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[1] * y[srcBLen - 2] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[2] * y[srcBLen - 3] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* x[3] * y[srcBLen - 4] */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * (*py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unroll over blkCnt */
+      blkCnt = blockSize2 / 3;
+
+      while (blkCnt > 0U)
+      {
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+
+        /* read x[0], x[1] samples */
+        x0 = *px++;
+        x1 = *px++;
+
+        /* Apply loop unrolling and compute 3 MACs simultaneously. */
+        k = srcBLen / 3;
+
+        /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 2 samples. */
+        do
+        {
+          /* Read y[srcBLen - 1] sample */
+          c0 = *(py);
+
+          /* Read x[2] sample */
+          x2 = *(px);
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[0] * y[srcBLen - 1] */
+          acc0 += (q63_t) x0 * c0;
+          /* acc1 +=  x[1] * y[srcBLen - 1] */
+          acc1 += (q63_t) x1 * c0;
+          /* acc2 +=  x[2] * y[srcBLen - 1] */
+          acc2 += (q63_t) x2 * c0;
+
+          /* Read y[srcBLen - 2] sample */
+          c0 = *(py - 1U);
+
+          /* Read x[3] sample */
+          x0 = *(px + 1U);
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[1] * y[srcBLen - 2] */
+          acc0 += (q63_t) x1 * c0;
+          /* acc1 +=  x[2] * y[srcBLen - 2] */
+          acc1 += (q63_t) x2 * c0;
+          /* acc2 +=  x[3] * y[srcBLen - 2] */
+          acc2 += (q63_t) x0 * c0;
+
+          /* Read y[srcBLen - 3] sample */
+          c0 = *(py - 2U);
+
+          /* Read x[4] sample */
+          x1 = *(px + 2U);
+
+          /* Perform the multiply-accumulate */
+          /* acc0 +=  x[2] * y[srcBLen - 3] */
+          acc0 += (q63_t) x2 * c0;
+          /* acc1 +=  x[3] * y[srcBLen - 2] */
+          acc1 += (q63_t) x0 * c0;
+          /* acc2 +=  x[4] * y[srcBLen - 2] */
+          acc2 += (q63_t) x1 * c0;
+
+
+          px += 3U;
+
+          py -= 3U;
+
+        } while (--k);
+
+        /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen - (3 * (srcBLen / 3));
+
+        while (k > 0U)
+        {
+          /* Read y[srcBLen - 5] sample */
+          c0 = *py--;
+          /* Read x[7] sample */
+          x2 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[4] * y[srcBLen - 5] */
+          acc0 += (q63_t) x0 * c0;
+          /* acc1 +=  x[5] * y[srcBLen - 5] */
+          acc1 += (q63_t) x1 * c0;
+          /* acc2 +=  x[6] * y[srcBLen - 5] */
+          acc2 += (q63_t) x2 * c0;
+
+          /* Reuse the present samples for the next MAC */
+          x0 = x1;
+          x1 = x2;
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q31_t) (acc0 >> 31);
+        *pOut++ = (q31_t) (acc1 >> 31);
+        *pOut++ = (q31_t) (acc2 >> 31);
+
+        /* Increment the pointer pIn1 index, count by 3 */
+        count += 3U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+          sum += (q63_t) *px++ * (*py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q31_t) (sum >> 31);
+
+        /* Increment MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += (q63_t) *px++ * *py--;
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q31_t) (sum >> 31);
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The blockSize3 variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    if (firstIndex > srcALen)
+    {
+       pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U);
+    }
+    else
+    {
+       pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    while (blockSize3 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Loop to calculate convolution for output length number of values */
+    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
+    {
+      /* Initialize sum with zero to carry on MAC operations */
+      sum = 0;
+
+      /* Loop to perform MAC operations according to convolution equation */
+      for (j = 0U; j <= i; j++)
+      {
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
+        {
+          /* z[i] += x[i-j] * y[j] */
+          sum += ((q63_t) pIn1[j] * pIn2[i - j]);
+        }
+      }
+
+      /* Store the output in the destination buffer */
+      pDst[i] = (q31_t) (sum >> 31U);
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
index 882e6c5c..0532c51e 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_partial_q7.c
@@ -1,753 +1,759 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_partial_q7.c
- * Description:  Partial convolution of Q7 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup PartialConv
-  @{
- */
-
-/**
-  @brief         Partial convolution of Q7 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written
-  @param[in]     firstIndex is the first output sample to start with
-  @param[in]     numPoints  is the number of output points to be computed
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
-
-  @remark
-                   Refer to \ref arm_conv_partial_opt_q7() for a faster implementation of this function.
- */
-
-arm_status arm_conv_partial_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        uint32_t firstIndex,
-        uint32_t numPoints)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const q7_t *pIn1;                                    /* InputA pointer */
-  const q7_t *pIn2;                                    /* InputB pointer */
-        q7_t *pOut = pDst;                             /* Output pointer */
-  const q7_t *px;                                      /* Intermediate inputA pointer */
-  const q7_t *py;                                      /* Intermediate inputB pointer */
-  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-        q31_t sum;                                     /* Accumulator */
-        uint32_t j, k, count, blkCnt, check;           /* Loop counters */
-        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
-        q31_t input1, input2;                          /* Temporary input variables */
-        q15_t in1, in2;                                /* Temporary input variables */
-        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* The algorithm implementation is based on the lengths of the inputs. */
-    /* srcB is always made to slide across srcA. */
-    /* So srcBLen is always considered as shorter or equal to srcALen */
-    if (srcALen >= srcBLen)
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcA;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcB;
-    }
-    else
-    {
-      /* Initialization of inputA pointer */
-      pIn1 = pSrcB;
-
-      /* Initialization of inputB pointer */
-      pIn2 = pSrcA;
-
-      /* srcBLen is always considered as shorter or equal to srcALen */
-      j = srcBLen;
-      srcBLen = srcALen;
-      srcALen = j;
-    }
-
-    /* Conditions to check which loopCounter holds
-     * the first and last indices of the output samples to be calculated. */
-    check = firstIndex + numPoints;
-    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
-    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
-    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
-    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t) numPoints) : 0;
-    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
-    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
-
-    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-    /* The function is internally
-     * divided into three stages according to the number of multiplications that has to be
-     * taken place between inputA samples and inputB samples. In the first stage of the
-     * algorithm, the multiplications increase by one for every iteration.
-     * In the second stage of the algorithm, srcBLen number of multiplications are done.
-     * In the third stage of the algorithm, the multiplications decrease by one
-     * for every iteration. */
-
-    /* Set the output pointer to point to the firstIndex
-     * of the output sample to be calculated. */
-    pOut = pDst + firstIndex;
-
-    /* --------------------------
-     * Initializations of stage1
-     * -------------------------*/
-
-    /* sum = x[0] * y[0]
-     * sum = x[0] * y[1] + x[1] * y[0]
-     * ....
-     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-     */
-
-    /* In this stage the MAC operations are increased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed.
-       Since the partial convolution starts from firstIndex
-       Number of Macs to be performed is firstIndex + 1 */
-    count = 1U + firstIndex;
-
-    /* Working pointer of inputA */
-    px = pIn1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + firstIndex;
-    py = pSrc2;
-
-    /* ------------------------
-     * Stage1 process
-     * ----------------------*/
-
-    /* The first stage starts here */
-    while (blockSize1 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* x[0] , x[1] */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[srcBLen - 1] , y[srcBLen - 2] */
-        in1 = (q15_t) *py--;
-        in2 = (q15_t) *py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* x[0] * y[srcBLen - 1] */
-        /* x[1] * y[srcBLen - 2] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* x[2] , x[3] */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* y[srcBLen - 3] , y[srcBLen - 4] */
-        in1 = (q15_t) *py--;
-        in2 = (q15_t) *py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* x[2] * y[srcBLen - 3] */
-        /* x[3] * y[srcBLen - 4] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize k with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      py = ++pSrc2;
-      px = pIn1;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Decrement loop counter */
-      blockSize1--;
-    }
-
-    /* --------------------------
-     * Initializations of stage2
-     * ------------------------*/
-
-    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-     * ....
-     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-     */
-
-    /* Working pointer of inputA */
-    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
-    {
-      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
-    }
-    else
-    {
-      pSrc1 = pIn1;
-    }
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* count is the index by which the pointer pIn1 to be incremented */
-    count = 0U;
-
-    /* -------------------
-     * Stage2 process
-     * ------------------*/
-
-    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-     * So, to loop unroll over blockSize2,
-     * srcBLen should be greater than or equal to 4 */
-    if (srcBLen >= 4U)
-    {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      blkCnt = ((uint32_t) blockSize2 >> 2U);
-
-      while (blkCnt > 0U)
-      {
-        /* Set all accumulators to zero */
-        acc0 = 0;
-        acc1 = 0;
-        acc2 = 0;
-        acc3 = 0;
-
-        /* read x[0], x[1], x[2] samples */
-        x0 = *px++;
-        x1 = *px++;
-        x2 = *px++;
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        k = srcBLen >> 2U;
-
-        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-        do
-        {
-          /* Read y[srcBLen - 1] sample */
-          c0 = *py--;
-          /* Read y[srcBLen - 2] sample */
-          c1 = *py--;
-
-          /* Read x[3] sample */
-          x3 = *px++;
-
-          /* x[0] and x[1] are packed */
-          in1 = (q15_t) x0;
-          in2 = (q15_t) x1;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
-          in1 = (q15_t) c0;
-          in2 = (q15_t) c1;
-
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
-          acc0 = __SMLAD(input1, input2, acc0);
-
-          /* x[1] and x[2] are packed */
-          in1 = (q15_t) x1;
-          in2 = (q15_t) x2;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
-          acc1 = __SMLAD(input1, input2, acc1);
-
-          /* x[2] and x[3] are packed */
-          in1 = (q15_t) x2;
-          in2 = (q15_t) x3;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
-          acc2 = __SMLAD(input1, input2, acc2);
-
-          /* Read x[4] sample */
-          x0 = *px++;
-
-          /* x[3] and x[4] are packed */
-          in1 = (q15_t) x3;
-          in2 = (q15_t) x0;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
-          acc3 = __SMLAD(input1, input2, acc3);
-
-          /* Read y[srcBLen - 3] sample */
-          c0 = *py--;
-          /* Read y[srcBLen - 4] sample */
-          c1 = *py--;
-
-          /* Read x[5] sample */
-          x1 = *px++;
-
-          /* x[2] and x[3] are packed */
-          in1 = (q15_t) x2;
-          in2 = (q15_t) x3;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
-          in1 = (q15_t) c0;
-          in2 = (q15_t) c1;
-
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
-          acc0 = __SMLAD(input1, input2, acc0);
-
-          /* x[3] and x[4] are packed */
-          in1 = (q15_t) x3;
-          in2 = (q15_t) x0;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
-          acc1 = __SMLAD(input1, input2, acc1);
-
-          /* x[4] and x[5] are packed */
-          in1 = (q15_t) x0;
-          in2 = (q15_t) x1;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
-          acc2 = __SMLAD(input1, input2, acc2);
-
-          /* Read x[6] sample */
-          x2 = *px++;
-
-          /* x[5] and x[6] are packed */
-          in1 = (q15_t) x1;
-          in2 = (q15_t) x2;
-
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
-          acc3 = __SMLAD(input1, input2, acc3);
-
-        } while (--k);
-
-        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        k = srcBLen % 0x4U;
-
-        while (k > 0U)
-        {
-          /* Read y[srcBLen - 5] sample */
-          c0 = *py--;
-          /* Read x[7] sample */
-          x3 = *px++;
-
-          /* Perform the multiply-accumulates */
-          /* acc0 +=  x[4] * y[srcBLen - 5] */
-          acc0 += ((q31_t) x0 * c0);
-          /* acc1 +=  x[5] * y[srcBLen - 5] */
-          acc1 += ((q31_t) x1 * c0);
-          /* acc2 +=  x[6] * y[srcBLen - 5] */
-          acc2 += ((q31_t) x2 * c0);
-          /* acc3 +=  x[7] * y[srcBLen - 5] */
-          acc3 += ((q31_t) x3 * c0);
-
-          /* Reuse the present samples for the next MAC */
-          x0 = x1;
-          x1 = x2;
-          x2 = x3;
-
-          /* Decrement the loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8));
-        *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8));
-
-        /* Increment the pointer pIn1 index, count by 4 */
-        count += 4U;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      blkCnt = (uint32_t) blockSize2 % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 outputs at a time */
-        k = srcBLen >> 2U;
-
-        while (k > 0U)
-        {
-          /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) *px++;
-          in2 = (q15_t) *px++;
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) *py--;
-          in2 = (q15_t) *py--;
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Perform the multiply-accumulate */
-          sum = __SMLAD(input1, input2, sum);
-
-          /* Reading two inputs of SrcA buffer and packing */
-          in1 = (q15_t) *px++;
-          in2 = (q15_t) *px++;
-          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Reading two inputs of SrcB buffer and packing */
-          in1 = (q15_t) *py--;
-          in2 = (q15_t) *py--;
-          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-          /* Perform the multiply-accumulate */
-          sum = __SMLAD(input1, input2, sum);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Loop unrolling: Compute remaining outputs */
-        k = srcBLen % 0x4U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-        /* Increment the pointer pIn1 index, count by 1 */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement loop counter */
-        blkCnt--;
-      }
-    }
-    else
-    {
-      /* If the srcBLen is not a multiple of 4,
-       * the blockSize2 loop cannot be unrolled by 4 */
-      blkCnt = (uint32_t) blockSize2;
-
-      while (blkCnt > 0U)
-      {
-        /* Accumulator is made zero for every iteration */
-        sum = 0;
-
-        /* srcBLen number of MACS should be performed */
-        k = srcBLen;
-
-        while (k > 0U)
-        {
-          /* Perform the multiply-accumulate */
-          sum += ((q31_t) * px++ * *py--);
-
-          /* Decrement loop counter */
-          k--;
-        }
-
-        /* Store the result in the accumulator in the destination buffer. */
-        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-        /* Increment the MAC count */
-        count++;
-
-        /* Update the inputA and inputB pointers for next MAC calculation */
-        px = pSrc1 + count;
-        py = pSrc2;
-
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    }
-
-
-    /* --------------------------
-     * Initializations of stage3
-     * -------------------------*/
-
-    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-     * ....
-     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-     * sum +=  x[srcALen-1] * y[srcBLen-1]
-     */
-
-    /* In this stage the MAC operations are decreased by 1 for every iteration.
-       The count variable holds the number of MAC operations performed */
-    count = srcBLen - 1U;
-
-    /* Working pointer of inputA */
-    pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-    px = pSrc1;
-
-    /* Working pointer of inputB */
-    pSrc2 = pIn2 + (srcBLen - 1U);
-    py = pSrc2;
-
-    /* -------------------
-     * Stage3 process
-     * ------------------*/
-
-    while (blockSize3 > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      k = count >> 2U;
-
-      while (k > 0U)
-      {
-        /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-        in1 = (q15_t) *py--;
-        in2 = (q15_t) *py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-        in1 = (q15_t) *py--;
-        in2 = (q15_t) *py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = count % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-        sum += ((q31_t) * px++ * *py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = ++pSrc1;
-      py = pSrc2;
-
-      /* Decrement MAC count */
-      count--;
-
-      /* Decrement the loop counter */
-      blockSize3--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
-  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
-        q31_t sum;                                     /* Accumulator */
-        uint32_t i, j;                                 /* Loop counters */
-        arm_status status;                             /* Status of Partial convolution */
-
-  /* Check for range of output samples to be calculated */
-  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
-  {
-    /* Set status as ARM_MATH_ARGUMENT_ERROR */
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Loop to calculate convolution for output length number of values */
-    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
-    {
-      /* Initialize sum with zero to carry on MAC operations */
-      sum = 0;
-
-      /* Loop to perform MAC operations according to convolution equation */
-      for (j = 0U; j <= i; j++)
-      {
-        /* Check the array limitations */
-        if (((i - j) < srcBLen) && (j < srcALen))
-        {
-          /* z[i] += x[i-j] * y[j] */
-          sum += ((q15_t) pIn1[j] * (pIn2[i - j]));
-        }
-      }
-
-      /* Store the output in the destination buffer */
-      pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of PartialConv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_partial_q7.c
+ * Description:  Partial convolution of Q7 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup PartialConv
+  @{
+ */
+
+/**
+  @brief         Partial convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written
+  @param[in]     firstIndex is the first output sample to start with
+  @param[in]     numPoints  is the number of output points to be computed
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : requested subset is not in the range [0 srcALen+srcBLen-2]
+
+  @remark
+                   Refer to \ref arm_conv_partial_opt_q7() for a faster implementation of this function.
+ */
+
+arm_status arm_conv_partial_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        uint32_t firstIndex,
+        uint32_t numPoints)
+{
+
+#if defined(ARM_MATH_DSP)
+
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t j, k, count, blkCnt, check;           /* Loop counters */
+        int32_t blockSize1, blockSize2, blockSize3;    /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulator */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* The algorithm implementation is based on the lengths of the inputs. */
+    /* srcB is always made to slide across srcA. */
+    /* So srcBLen is always considered as shorter or equal to srcALen */
+    if (srcALen >= srcBLen)
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcA;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcB;
+    }
+    else
+    {
+      /* Initialization of inputA pointer */
+      pIn1 = pSrcB;
+
+      /* Initialization of inputB pointer */
+      pIn2 = pSrcA;
+
+      /* srcBLen is always considered as shorter or equal to srcALen */
+      j = srcBLen;
+      srcBLen = srcALen;
+      srcALen = j;
+    }
+
+    /* Conditions to check which loopCounter holds
+     * the first and last indices of the output samples to be calculated. */
+    check = firstIndex + numPoints;
+    blockSize3 = ((int32_t)check > (int32_t)srcALen) ? (int32_t)check - (int32_t)srcALen : 0;
+    blockSize3 = ((int32_t)firstIndex > (int32_t)srcALen - 1) ? blockSize3 - (int32_t)firstIndex + (int32_t)srcALen : blockSize3;
+    blockSize1 = ((int32_t) srcBLen - 1) - (int32_t) firstIndex;
+    blockSize1 = (blockSize1 > 0) ? ((check > (srcBLen - 1U)) ? blockSize1 : (int32_t)numPoints) : 0;
+    blockSize2 = (int32_t) check - ((blockSize3 + blockSize1) + (int32_t) firstIndex);
+    blockSize2 = (blockSize2 > 0) ? blockSize2 : 0;
+
+    /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+    /* The function is internally
+     * divided into three stages according to the number of multiplications that has to be
+     * taken place between inputA samples and inputB samples. In the first stage of the
+     * algorithm, the multiplications increase by one for every iteration.
+     * In the second stage of the algorithm, srcBLen number of multiplications are done.
+     * In the third stage of the algorithm, the multiplications decrease by one
+     * for every iteration. */
+
+    /* Set the output pointer to point to the firstIndex
+     * of the output sample to be calculated. */
+    pOut = pDst + firstIndex;
+
+    /* --------------------------
+     * Initializations of stage1
+     * -------------------------*/
+
+    /* sum = x[0] * y[0]
+     * sum = x[0] * y[1] + x[1] * y[0]
+     * ....
+     * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+     */
+
+    /* In this stage the MAC operations are increased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed.
+       Since the partial convolution starts from firstIndex
+       Number of Macs to be performed is firstIndex + 1 */
+    count = 1U + firstIndex;
+
+    /* Working pointer of inputA */
+    px = pIn1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + firstIndex;
+    py = pSrc2;
+
+    /* ------------------------
+     * Stage1 process
+     * ----------------------*/
+
+    /* The first stage starts here */
+    while (blockSize1 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* x[0] , x[1] */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* y[srcBLen - 1] , y[srcBLen - 2] */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* x[0] * y[srcBLen - 1] */
+        /* x[1] * y[srcBLen - 2] */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* x[2] , x[3] */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* y[srcBLen - 3] , y[srcBLen - 4] */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* x[2] * y[srcBLen - 3] */
+        /* x[3] * y[srcBLen - 4] */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize k with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q31_t) * px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      py = ++pSrc2;
+      px = pIn1;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Decrement loop counter */
+      blockSize1--;
+    }
+
+    /* --------------------------
+     * Initializations of stage2
+     * ------------------------*/
+
+    /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+     * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+     * ....
+     * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+     */
+
+    /* Working pointer of inputA */
+    if ((int32_t)firstIndex - (int32_t)srcBLen + 1 > 0)
+    {
+      pSrc1 = pIn1 + firstIndex - srcBLen + 1;
+    }
+    else
+    {
+      pSrc1 = pIn1;
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* count is the index by which the pointer pIn1 to be incremented */
+    count = 0U;
+
+    /* -------------------
+     * Stage2 process
+     * ------------------*/
+
+    /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+     * So, to loop unroll over blockSize2,
+     * srcBLen should be greater than or equal to 4 */
+    if (srcBLen >= 4U)
+    {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      blkCnt = ((uint32_t) blockSize2 >> 2U);
+
+      while (blkCnt > 0U)
+      {
+        /* Set all accumulators to zero */
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
+
+        /* read x[0], x[1], x[2] samples */
+        x0 = *px++;
+        x1 = *px++;
+        x2 = *px++;
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        k = srcBLen >> 2U;
+
+        /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+         ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+        do
+        {
+          /* Read y[srcBLen - 1] sample */
+          c0 = *py--;
+          /* Read y[srcBLen - 2] sample */
+          c1 = *py--;
+
+          /* Read x[3] sample */
+          x3 = *px++;
+
+          /* x[0] and x[1] are packed */
+          in1 = (q15_t) x0;
+          in2 = (q15_t) x1;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
+          in1 = (q15_t) c0;
+          in2 = (q15_t) c1;
+
+          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
+          acc0 = __SMLAD(input1, input2, acc0);
+
+          /* x[1] and x[2] are packed */
+          in1 = (q15_t) x1;
+          in2 = (q15_t) x2;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
+          acc1 = __SMLAD(input1, input2, acc1);
+
+          /* x[2] and x[3] are packed */
+          in1 = (q15_t) x2;
+          in2 = (q15_t) x3;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
+          acc2 = __SMLAD(input1, input2, acc2);
+
+          /* Read x[4] sample */
+          x0 = *px++;
+
+          /* x[3] and x[4] are packed */
+          in1 = (q15_t) x3;
+          in2 = (q15_t) x0;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
+          acc3 = __SMLAD(input1, input2, acc3);
+
+          /* Read y[srcBLen - 3] sample */
+          c0 = *py--;
+          /* Read y[srcBLen - 4] sample */
+          c1 = *py--;
+
+          /* Read x[5] sample */
+          x1 = *px++;
+
+          /* x[2] and x[3] are packed */
+          in1 = (q15_t) x2;
+          in2 = (q15_t) x3;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
+          in1 = (q15_t) c0;
+          in2 = (q15_t) c1;
+
+          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
+          acc0 = __SMLAD(input1, input2, acc0);
+
+          /* x[3] and x[4] are packed */
+          in1 = (q15_t) x3;
+          in2 = (q15_t) x0;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
+          acc1 = __SMLAD(input1, input2, acc1);
+
+          /* x[4] and x[5] are packed */
+          in1 = (q15_t) x0;
+          in2 = (q15_t) x1;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
+          acc2 = __SMLAD(input1, input2, acc2);
+
+          /* Read x[6] sample */
+          x2 = *px++;
+
+          /* x[5] and x[6] are packed */
+          in1 = (q15_t) x1;
+          in2 = (q15_t) x2;
+
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
+          acc3 = __SMLAD(input1, input2, acc3);
+
+        } while (--k);
+
+        /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        k = srcBLen % 0x4U;
+
+        while (k > 0U)
+        {
+          /* Read y[srcBLen - 5] sample */
+          c0 = *py--;
+          /* Read x[7] sample */
+          x3 = *px++;
+
+          /* Perform the multiply-accumulates */
+          /* acc0 +=  x[4] * y[srcBLen - 5] */
+          acc0 += ((q31_t) x0 * c0);
+          /* acc1 +=  x[5] * y[srcBLen - 5] */
+          acc1 += ((q31_t) x1 * c0);
+          /* acc2 +=  x[6] * y[srcBLen - 5] */
+          acc2 += ((q31_t) x2 * c0);
+          /* acc3 +=  x[7] * y[srcBLen - 5] */
+          acc3 += ((q31_t) x3 * c0);
+
+          /* Reuse the present samples for the next MAC */
+          x0 = x1;
+          x1 = x2;
+          x2 = x3;
+
+          /* Decrement the loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q7_t) (__SSAT(acc0 >> 7, 8));
+        *pOut++ = (q7_t) (__SSAT(acc1 >> 7, 8));
+        *pOut++ = (q7_t) (__SSAT(acc2 >> 7, 8));
+        *pOut++ = (q7_t) (__SSAT(acc3 >> 7, 8));
+
+        /* Increment the pointer pIn1 index, count by 4 */
+        count += 4U;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      blkCnt = (uint32_t) blockSize2 % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 outputs at a time */
+        k = srcBLen >> 2U;
+
+        while (k > 0U)
+        {
+          /* Reading two inputs of SrcA buffer and packing */
+          in1 = (q15_t) *px++;
+          in2 = (q15_t) *px++;
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* Reading two inputs of SrcB buffer and packing */
+          in1 = (q15_t) *py--;
+          in2 = (q15_t) *py--;
+          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* Perform the multiply-accumulate */
+          sum = __SMLAD(input1, input2, sum);
+
+          /* Reading two inputs of SrcA buffer and packing */
+          in1 = (q15_t) *px++;
+          in2 = (q15_t) *px++;
+          input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* Reading two inputs of SrcB buffer and packing */
+          in1 = (q15_t) *py--;
+          in2 = (q15_t) *py--;
+          input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+          /* Perform the multiply-accumulate */
+          sum = __SMLAD(input1, input2, sum);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Loop unrolling: Compute remaining outputs */
+        k = srcBLen % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += ((q31_t) * px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
+
+        /* Increment the pointer pIn1 index, count by 1 */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement loop counter */
+        blkCnt--;
+      }
+    }
+    else
+    {
+      /* If the srcBLen is not a multiple of 4,
+       * the blockSize2 loop cannot be unrolled by 4 */
+      blkCnt = (uint32_t) blockSize2;
+
+      while (blkCnt > 0U)
+      {
+        /* Accumulator is made zero for every iteration */
+        sum = 0;
+
+        /* srcBLen number of MACS should be performed */
+        k = srcBLen;
+
+        while (k > 0U)
+        {
+          /* Perform the multiply-accumulate */
+          sum += ((q31_t) * px++ * *py--);
+
+          /* Decrement loop counter */
+          k--;
+        }
+
+        /* Store the result in the accumulator in the destination buffer. */
+        *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
+
+        /* Increment the MAC count */
+        count++;
+
+        /* Update the inputA and inputB pointers for next MAC calculation */
+        px = pSrc1 + count;
+        py = pSrc2;
+
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    }
+
+
+    /* --------------------------
+     * Initializations of stage3
+     * -------------------------*/
+
+    /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+     * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+     * ....
+     * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+     * sum +=  x[srcALen-1] * y[srcBLen-1]
+     */
+
+    /* In this stage the MAC operations are decreased by 1 for every iteration.
+       The count variable holds the number of MAC operations performed */
+    count = srcBLen - 1U;
+
+    /* Working pointer of inputA */
+    if (firstIndex > srcALen)
+    {
+       pSrc1 = (pIn1 + firstIndex) - (srcBLen - 1U);
+    }
+    else
+    {
+       pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+    }
+    px = pSrc1;
+
+    /* Working pointer of inputB */
+    pSrc2 = pIn2 + (srcBLen - 1U);
+    py = pSrc2;
+
+    /* -------------------
+     * Stage3 process
+     * ------------------*/
+
+    while (blockSize3 > 0)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      k = count >> 2U;
+
+      while (k > 0U)
+      {
+        /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+        /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+        /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+        /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = count % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+        sum += ((q31_t) * px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(sum >> 7, 8));
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = ++pSrc1;
+      py = pSrc2;
+
+      /* Decrement MAC count */
+      count--;
+
+      /* Decrement the loop counter */
+      blockSize3--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+        arm_status status;                             /* Status of Partial convolution */
+
+  /* Check for range of output samples to be calculated */
+  if ((firstIndex + numPoints) > ((srcALen + (srcBLen - 1U))))
+  {
+    /* Set status as ARM_MATH_ARGUMENT_ERROR */
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Loop to calculate convolution for output length number of values */
+    for (i = firstIndex; i <= (firstIndex + numPoints - 1); i++)
+    {
+      /* Initialize sum with zero to carry on MAC operations */
+      sum = 0;
+
+      /* Loop to perform MAC operations according to convolution equation */
+      for (j = 0U; j <= i; j++)
+      {
+        /* Check the array limitations */
+        if (((i - j) < srcBLen) && (j < srcALen))
+        {
+          /* z[i] += x[i-j] * y[j] */
+          sum += ((q15_t) pIn1[j] * (pIn2[i - j]));
+        }
+      }
+
+      /* Store the output in the destination buffer */
+      pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of PartialConv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
index 8e37ac75..0a28b959 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q15.c
@@ -1,696 +1,858 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_q15.c
- * Description:  Convolution of Q15 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q15 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   This approach provides 33 guard bits and there is no risk of overflow.
-                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
-
-  @remark
-                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
-  @remark
-                   Refer to \ref arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
- */
-
-void arm_conv_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst)
-{
-
-#if defined (ARM_MATH_DSP)
-
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]
-   * sum = x[0] * y[1] + x[1] * y[0]
-   * ....
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations less than 4 */
-  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  while ((count < 4U) && (blockSize1 > 0U))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Loop over number of MAC operations between
-     * inputA samples and inputB samples */
-    k = count;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* The second part of the stage starts here */
-  /* The internal loop, over count, is unrolled by 4 */
-  /* To, read the last two inputB samples using SIMD:
-   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
-  py = py - 1;
-
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD
-     * So, py is incremented by 1 */
-    py = py + 1U;
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + (count - 1U);
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      py = py - 1U;
-
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = read_q15x2 ((q15_t *) px);
-
-      /* read x[1], x[2] samples */
-      x1 = read_q15x2 ((q15_t *) px + 1);
-      px += 2U;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the last two inputB samples using SIMD:
-         * y[srcBLen - 1] and y[srcBLen - 2] */
-        c0 = read_q15x2_da ((q15_t **) &py);
-
-        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
-        acc0 = __SMLALDX(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
-        acc1 = __SMLALDX(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[3], x[4] */
-        x3 = read_q15x2 ((q15_t *) px + 1);
-
-        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
-        acc2 = __SMLALDX(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
-        acc3 = __SMLALDX(x3, c0, acc3);
-
-        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
-        c0 = read_q15x2_da ((q15_t **) &py);
-
-        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
-        acc0 = __SMLALDX(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
-        acc1 = __SMLALDX(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = read_q15x2 ((q15_t *) px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = read_q15x2 ((q15_t *) px + 3);
-
-        px += 4U;
-
-        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
-        acc2 = __SMLALDX(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
-        acc3 = __SMLALDX(x1, c0, acc3);
-
-      } while (--k);
-
-      /* For the next MAC operations, SIMD is not used
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[srcBLen - 5] */
-        c0 = *(py + 1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[7] */
-        x3 = read_q15x2 ((q15_t *) px);
-        px++;
-
-        /* Perform the multiply-accumulate */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = read_q15x2 ((q15_t *) py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-        px += 2U;
-
-        /* Perform the multiply-accumulate */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-      }
-
-      if (k == 3U)
-      {
-        /* Read y[srcBLen - 5], y[srcBLen - 6] */
-        c0 = read_q15x2 ((q15_t *) py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-
-        /* Perform the multiply-accumulate */
-        acc0 = __SMLALDX(x0, c0, acc0);
-        acc1 = __SMLALDX(x1, c0, acc1);
-        acc2 = __SMLALDX(x3, c0, acc2);
-        acc3 = __SMLALDX(x2, c0, acc3);
-
-        c0 = *(py-1);
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[10] */
-        x3 =  read_q15x2 ((q15_t *) px + 2);
-        px += 3U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD(x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-#ifndef  ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) *px++ * *py--);
-        sum += (q63_t) ((q31_t) *px++ * *py--);
-        sum += (q63_t) ((q31_t) *px++ * *py--);
-        sum += (q63_t) ((q31_t) *px++ * *py--);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) ((q31_t) *px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) ((q31_t) *px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-   * ....
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-   * sum +=  x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The blockSize3 variable holds the number of MAC operations performed */
-  blockSize3 = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  pIn2 = pSrc2 - 1U;
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  /* For loop unrolling by 4, this stage is divided into two. */
-  /* First part of this stage computes the MAC operations greater than 4 */
-  /* Second part of this stage computes the MAC operations less than or equal to 4 */
-
-  /* The first part of the stage starts here */
-  j = blockSize3 >> 2U;
-
-  while ((j > 0U) && (blockSize3 > 0U))
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3 >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
-       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
-      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
-       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
-      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* For the next MAC operations, the pointer py is used without SIMD
-     * So, py is incremented by 1 */
-    py = py + 1U;
-
-    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = blockSize3 % 0x4U;
-
-    while (k > 0U)
-    {
-      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement loop counter */
-    blockSize3--;
-
-    j--;
-  }
-
-  /* The second part of the stage starts here */
-  /* SIMD is not used for the next MAC operations,
-   * so pointer py is updated to read only one sample at a time */
-  py = py + 1U;
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = blockSize3;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum = __SMLALD(*px++, *py--, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
-  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
-        q63_t sum;                                     /* Accumulator */
-        uint32_t i, j;                                 /* Loop counters */
-
-  /* Loop to calculate convolution for output length number of values */
-  for (i = 0; i < (srcALen + srcBLen - 1); i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if (((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q31_t) pIn1[j] * pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
-  }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_q15.c
+ * Description:  Convolution of Q15 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+  @remark
+                   Refer to \ref arm_conv_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_conv_opt_q15() for a faster implementation of this function using scratch buffers.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+
+void arm_conv_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+    const q15_t    *pIn1 = pSrcA;     /* inputA pointer               */
+    const q15_t    *pIn2 = pSrcB;     /* inputB pointer               */
+    /*
+     * Loop to perform MAC operations according to correlation equation
+     */
+    const q15_t    *pX;
+    const q15_t    *pY;
+    const q15_t    *pA;
+    const q15_t    *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   block1, block2, block3;
+
+
+    uint16x8_t decrIdxVec = vddupq_u16(7, 1);
+
+
+    if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA;
+        /*
+         * Swapping the lengths
+         */
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2 - 7;
+
+    for (i = 0; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count);
+        *pDst++ = (q15_t) acc0;
+        *pDst++ = (q15_t) acc1;
+        pB += 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count);
+        *pDst++ = (q15_t) acc;
+        pB++;
+    }
+    
+    for (i = 0; i <= block2 - 4; i += 4)
+    {
+        uint32_t  count = srcBLen;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+        int64_t   acc2 = 0LL;
+        int64_t   acc3 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, count);
+        *pDst++ = (q15_t) acc0;
+        *pDst++ = (q15_t) acc1;
+        *pDst++ = (q15_t) acc2;
+        *pDst++ = (q15_t) acc3;
+
+        pA += 4;
+    }
+    for (; i <= block2 - 2; i += 2)
+    {
+        uint32_t  count = srcBLen;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, count);
+        *pDst++ = (q15_t) acc0;
+        *pDst++ = (q15_t) acc1;
+
+        pA += 2;
+    }
+    if (block2 & 1)
+    {
+        uint32_t  count = srcBLen;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count);
+        *pDst++ = (q15_t) acc;
+        pA++;
+    }
+
+    for (i = block3; i >= 1; i -= 2)
+    {
+        uint32_t  count = i;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count);
+        *pDst++ = (q15_t) acc0;
+        *pDst++ = (q15_t) acc1;
+        pA += 2;
+    }
+    for (; i >= 1; i--)
+    {
+        uint32_t  count = i;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q15(acc, pX, pY, count);
+        *pDst++ = (q15_t) acc;
+        pA++;
+    }
+}
+#else
+void arm_conv_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables to hold state and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* For loop unrolling by 4, this stage is divided into two. */
+  /* First part of this stage computes the MAC operations less than 4 */
+  /* Second part of this stage computes the MAC operations greater than or equal to 4 */
+
+  /* The first part of the stage starts here */
+  while ((count < 4U) && (blockSize1 > 0U))
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Loop over number of MAC operations between
+     * inputA samples and inputB samples */
+    k = count;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      sum = __SMLALD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* The second part of the stage starts here */
+  /* The internal loop, over count, is unrolled by 4 */
+  /* To, read the last two inputB samples using SIMD:
+   * y[srcBLen] and y[srcBLen-1] coefficients, py is decremented by 1 */
+  py = py - 1;
+
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0], x[1] are multiplied with y[srcBLen - 1], y[srcBLen - 2] respectively */
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+      /* x[2], x[3] are multiplied with y[srcBLen - 3], y[srcBLen - 4] respectively */
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* For the next MAC operations, the pointer py is used without SIMD
+     * So, py is incremented by 1 */
+    py = py + 1U;
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum = __SMLALD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + (count - 1U);
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen] * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is the index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      py = py - 1U;
+
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = read_q15x2 ((q15_t *) px);
+
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+      px += 2U;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read the last two inputB samples using SIMD:
+         * y[srcBLen - 1] and y[srcBLen - 2] */
+        c0 = read_q15x2_da ((q15_t **) &py);
+
+        /* acc0 +=  x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2] */
+        acc0 = __SMLALDX(x0, c0, acc0);
+
+        /* acc1 +=  x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2] */
+        acc1 = __SMLALDX(x1, c0, acc1);
+
+        /* Read x[2], x[3] */
+        x2 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[3], x[4] */
+        x3 = read_q15x2 ((q15_t *) px + 1);
+
+        /* acc2 +=  x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2] */
+        acc2 = __SMLALDX(x2, c0, acc2);
+
+        /* acc3 +=  x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2] */
+        acc3 = __SMLALDX(x3, c0, acc3);
+
+        /* Read y[srcBLen - 3] and y[srcBLen - 4] */
+        c0 = read_q15x2_da ((q15_t **) &py);
+
+        /* acc0 +=  x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4] */
+        acc0 = __SMLALDX(x2, c0, acc0);
+
+        /* acc1 +=  x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4] */
+        acc1 = __SMLALDX(x3, c0, acc1);
+
+        /* Read x[4], x[5] */
+        x0 = read_q15x2 ((q15_t *) px + 2);
+
+        /* Read x[5], x[6] */
+        x1 = read_q15x2 ((q15_t *) px + 3);
+
+        px += 4U;
+
+        /* acc2 +=  x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4] */
+        acc2 = __SMLALDX(x0, c0, acc2);
+
+        /* acc3 +=  x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4] */
+        acc3 = __SMLALDX(x1, c0, acc3);
+
+      } while (--k);
+
+      /* For the next MAC operations, SIMD is not used
+       * So, the 16 bit pointer if inputB, py is updated */
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      if (k == 1U)
+      {
+        /* Read y[srcBLen - 5] */
+        c0 = *(py + 1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[7] */
+        x3 = read_q15x2 ((q15_t *) px);
+        px++;
+
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALD(x0, c0, acc0);
+        acc1 = __SMLALD(x1, c0, acc1);
+        acc2 = __SMLALDX(x1, c0, acc2);
+        acc3 = __SMLALDX(x3, c0, acc3);
+      }
+
+      if (k == 2U)
+      {
+        /* Read y[srcBLen - 5], y[srcBLen - 6] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
+
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALDX(x0, c0, acc0);
+        acc1 = __SMLALDX(x1, c0, acc1);
+        acc2 = __SMLALDX(x3, c0, acc2);
+        acc3 = __SMLALDX(x2, c0, acc3);
+      }
+
+      if (k == 3U)
+      {
+        /* Read y[srcBLen - 5], y[srcBLen - 6] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALDX(x0, c0, acc0);
+        acc1 = __SMLALDX(x1, c0, acc1);
+        acc2 = __SMLALDX(x3, c0, acc2);
+        acc3 = __SMLALDX(x2, c0, acc3);
+
+        c0 = *(py-1);
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[10] */
+        x3 =  read_q15x2 ((q15_t *) px + 2);
+        px += 3U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLALDX(x1, c0, acc0);
+        acc1 = __SMLALD(x2, c0, acc1);
+        acc2 = __SMLALDX(x2, c0, acc2);
+        acc3 = __SMLALDX(x3, c0, acc3);
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+#ifndef  ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+      write_q15x2_ia (&pOut, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /*      #ifndef  ARM_MATH_BIG_ENDIAN    */
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) ((q31_t) *px++ * *py--);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q15_t) (__SSAT(sum >> 15, 16));
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+  blockSize3 = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  pIn2 = pSrc2 - 1U;
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  /* For loop unrolling by 4, this stage is divided into two. */
+  /* First part of this stage computes the MAC operations greater than 4 */
+  /* Second part of this stage computes the MAC operations less than or equal to 4 */
+
+  /* The first part of the stage starts here */
+  j = blockSize3 >> 2U;
+
+  while ((j > 0U) && (blockSize3 > 0U))
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = blockSize3 >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[srcALen - srcBLen + 1], x[srcALen - srcBLen + 2] are multiplied
+       * with y[srcBLen - 1], y[srcBLen - 2] respectively */
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+      /* x[srcALen - srcBLen + 3], x[srcALen - srcBLen + 4] are multiplied
+       * with y[srcBLen - 3], y[srcBLen - 4] respectively */
+      sum = __SMLALDX(read_q15x2_ia ((q15_t **) &px), read_q15x2_da ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* For the next MAC operations, the pointer py is used without SIMD
+     * So, py is incremented by 1 */
+    py = py + 1U;
+
+    /* If the blockSize3 is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = blockSize3 % 0x4U;
+
+    while (k > 0U)
+    {
+      /* sum += x[srcALen - srcBLen + 5] * y[srcBLen - 5] */
+      sum = __SMLALD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement loop counter */
+    blockSize3--;
+
+    j--;
+  }
+
+  /* The second part of the stage starts here */
+  /* SIMD is not used for the next MAC operations,
+   * so pointer py is updated to read only one sample at a time */
+  py = py + 1U;
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = blockSize3;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum = __SMLALD(*px++, *py--, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q15_t) (__SSAT((sum >> 15), 16));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+
+  /* Loop to calculate convolution for output length number of values */
+  for (i = 0; i < (srcALen + srcBLen - 1); i++)
+  {
+    /* Initialize sum with zero to carry on MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q31_t) pIn1[j] * pIn2[i - j]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    pDst[i] = (q15_t) __SSAT((sum >> 15U), 16U);
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
index 590819b0..ee37824f 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q31.c
@@ -1,581 +1,745 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_q31.c
- * Description:  Convolution of Q31 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q31 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   There is no saturation on intermediate additions.
-                   Thus, if the accumulator overflows it wraps around and distorts the result.
-                   The input signals should be scaled down to avoid intermediate overflows.
-                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
-                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
-                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
-
-  @remark
-                   Refer to \ref arm_conv_fast_q31() for a faster but less precise implementation of this function.
- */
-
-void arm_conv_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const q31_t *pIn1;                                   /* InputA pointer */
-  const q31_t *pIn2;                                   /* InputB pointer */
-        q31_t *pOut = pDst;                            /* Output pointer */
-  const q31_t *px;                                     /* Intermediate inputA pointer */
-  const q31_t *py;                                     /* Intermediate inputB pointer */
-  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
-        q63_t sum;                                     /* Accumulators */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc0, acc1, acc2;                        /* Accumulators */
-        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]
-   * sum = x[0] * y[1] + x[1] * y[0]
-   * ....
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) *px++ * (*py--);
-
-      /* x[1] * y[srcBLen - 2] */
-      sum += (q63_t) *px++ * (*py--);
-
-      /* x[2] * y[srcBLen - 3] */
-      sum += (q63_t) *px++ * (*py--);
-
-      /* x[3] * y[srcBLen - 4] */
-      sum += (q63_t) *px++ * (*py--);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#else
-
-    /* Initialize k with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) *px++ * *py--;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *(py);
-        /* Read x[3] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[srcBLen - 1] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[srcBLen - 1] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[srcBLen - 1] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[srcBLen - 2] sample */
-        c0 = *(py - 1U);
-        /* Read x[4] sample */
-        x0 = *(px + 1U);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[srcBLen - 2] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *(py - 2U);
-        /* Read x[5] sample */
-        x1 = *(px + 2U);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[2] * y[srcBLen - 3] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[srcBLen - 2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[srcBLen - 2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3U;
-        py -= 3U;
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while (k > 0U)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *py--;
-        /* Read x[7] sample */
-        x2 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (acc0 >> 31);
-      *pOut++ = (q31_t) (acc1 >> 31);
-      *pOut++ = (q31_t) (acc2 >> 31);
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-      k = srcBLen >> 2U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) *px++ * *py--;
-        sum += (q63_t) *px++ * *py--;
-        sum += (q63_t) *px++ * *py--;
-        sum += (q63_t) *px++ * *py--;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = srcBLen % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) *px++ * *py--;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q31_t) (sum >> 31);
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-   * ....
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-   * sum +=  x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = blockSize3 >> 2U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      sum += (q63_t) *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum += (q63_t) *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      sum += (q63_t) *px++ * *py--;
-
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum += (q63_t) *px++ * *py--;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = blockSize3 % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    k = blockSize3;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum += (q63_t) *px++ * *py--;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q31_t) (sum >> 31);
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
-  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
-        q63_t sum;                                     /* Accumulators */
-        uint32_t i, j;                                 /* Loop counters */
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if (((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q31_t) (sum >> 31U);
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_q31.c
+ * Description:  Convolution of Q31 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down the inputs by log2(min(srcALen, srcBLen)) (log2 is read as log to the base 2) times to avoid overflows,
+                   as maximum of min(srcALen, srcBLen) number of additions are carried internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_conv_fast_q31() for a faster but less precise implementation of this function.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+
+void arm_conv_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+    const q31_t    *pIn1 = pSrcA;     /* inputA pointer               */
+    const q31_t    *pIn2 = pSrcB;     /* inputB pointer               */
+    /*
+     * Loop to perform MAC operations according to correlation equation
+     */
+    const q31_t    *pX;
+    const q31_t    *pY;
+    const q31_t    *pA;
+    const q31_t    *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   block1, block2, block3;
+    uint32_t  vddupStartIdx = 3;
+    uint32x4_t decrIdxVec = vddupq_u32(vddupStartIdx, 1);
+
+    if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA;
+        /*
+         * Swapping the lengths
+         */
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2 - 3;
+
+    for (i = 0; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count);
+
+        *pDst++ = (q31_t) acc0;
+        *pDst++ = (q31_t) acc1;
+        pB += 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count);
+
+        *pDst++ = (q31_t) acc;
+        pB++;
+    }
+
+    for (i = 0; i <= block2 - 4; i += 4)
+    {
+        uint32_t  count = srcBLen;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+        int64_t   acc2 = 0LL;
+        int64_t   acc3 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, count);
+        *pDst++ = (q31_t) acc0;
+        *pDst++ = (q31_t) acc1;
+        *pDst++ = (q31_t) acc2;
+        *pDst++ = (q31_t) acc3;
+
+        pA += 4;
+    }
+
+    for (; i <= block2 - 2; i += 2)
+    {
+        uint32_t  count = srcBLen;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, count);
+        *pDst++ = (q31_t) acc0;
+        *pDst++ = (q31_t) acc1;
+
+        pA += 2;
+    }
+    if (block2 & 1)
+    {
+        uint32_t  count = srcBLen;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count);
+        *pDst++ = (q31_t) acc;
+        pA++;
+    }
+
+    for (i = block3; i >= 2; i -= 2)
+    {
+        uint32_t  count = i;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count);
+        *pDst++ = (q31_t) acc0;
+        *pDst++ = (q31_t) acc1;
+        pA += 2;
+    }
+
+    for (; i >= 1; i--)
+    {
+        uint32_t  count = i;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q31(acc, pX, pY, count);
+        *pDst++ = (q31_t) acc;
+        pA++;
+    }
+
+}
+
+#else
+void arm_conv_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1, *pSrc2;                          /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[1] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[2] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* x[3] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * (*py--);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q31_t) (sum >> 31);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unroll by 3 */
+    blkCnt = blockSize2 / 3;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+
+      /* Apply loop unrolling and compute 3 MACs simultaneously. */
+      k = srcBLen / 3;
+
+      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
+      do
+      {
+        /* Read y[srcBLen - 1] sample */
+        c0 = *(py);
+        /* Read x[3] sample */
+        x2 = *(px);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[srcBLen - 1] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[1] * y[srcBLen - 1] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[2] * y[srcBLen - 1] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Read y[srcBLen - 2] sample */
+        c0 = *(py - 1U);
+        /* Read x[4] sample */
+        x0 = *(px + 1U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[srcBLen - 2] */
+        acc0 += ((q63_t) x1 * c0);
+        /* acc1 +=  x[2] * y[srcBLen - 2] */
+        acc1 += ((q63_t) x2 * c0);
+        /* acc2 +=  x[3] * y[srcBLen - 2] */
+        acc2 += ((q63_t) x0 * c0);
+
+        /* Read y[srcBLen - 3] sample */
+        c0 = *(py - 2U);
+        /* Read x[5] sample */
+        x1 = *(px + 2U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[srcBLen - 3] */
+        acc0 += ((q63_t) x2 * c0);
+        /* acc1 +=  x[3] * y[srcBLen - 2] */
+        acc1 += ((q63_t) x0 * c0);
+        /* acc2 +=  x[4] * y[srcBLen - 2] */
+        acc2 += ((q63_t) x1 * c0);
+
+        /* update scratch pointers */
+        px += 3U;
+        py -= 3U;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen - (3 * (srcBLen / 3));
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *py--;
+        /* Read x[7] sample */
+        x2 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[srcBLen - 5] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[5] * y[srcBLen - 5] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[6] * y[srcBLen - 5] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (acc0 >> 31);
+      *pOut++ = (q31_t) (acc1 >> 31);
+      *pOut++ = (q31_t) (acc2 >> 31);
+
+      /* Increment the pointer pIn1 index, count by 3 */
+      count += 3U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py--;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q31_t) (sum >> 31);
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = blockSize3 >> 2U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = blockSize3 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += (q63_t) *px++ * *py--;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q31_t) (sum >> 31);
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB;                           /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i, j;                                 /* Loop counters */
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q63_t) pIn1[j] * pIn2[i - j]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    pDst[i] = (q31_t) (sum >> 31U);
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
index f7491cfb..e29a16dd 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_conv_q7.c
@@ -1,700 +1,860 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_conv_q7.c
- * Description:  Convolution of Q7 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Conv
-  @{
- */
-
-/**
-  @brief         Convolution of Q7 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
-                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
-                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
-                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
-  @remark
-                   Refer to \ref arm_conv_opt_q7() for a faster implementation of this function.
- */
-
-void arm_conv_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const q7_t *pIn1;                                    /* InputA pointer */
-  const q7_t *pIn2;                                    /* InputB pointer */
-        q7_t *pOut = pDst;                             /* Output pointer */
-  const q7_t *px;                                      /* Intermediate inputA pointer */
-  const q7_t *py;                                      /* Intermediate inputB pointer */
-  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
-        q31_t sum;                                     /* Accumulators */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-        q31_t input1, input2;                          /* Temporary input variables */
-        q15_t in1, in2;                                /* Temporary input variables */
-        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-  }
-
-  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[0]
-   * sum = x[0] * y[1] + x[1] * y[0]
-   * ....
-   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-    while (k > 0U)
-    {
-      /* x[0] , x[1] */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* y[srcBLen - 1] , y[srcBLen - 2] */
-      in1 = (q15_t) *py--;
-      in2 = (q15_t) *py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* x[0] * y[srcBLen - 1] */
-      /* x[1] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[2] , x[3] */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* y[srcBLen - 3] , y[srcBLen - 4] */
-      in1 = (q15_t) *py--;
-      in2 = (q15_t) *py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* x[2] * y[srcBLen - 3] */
-      /* x[3] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#else
-
-    /* Initialize k with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += ((q15_t) *px++ * *py--);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pIn2 + count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
-   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[srcBLen - 1] sample */
-        c0 = *py--;
-        /* Read y[srcBLen - 2] sample */
-        c1 = *py--;
-
-        /* Read x[3] sample */
-        x3 = *px++;
-
-        /* x[0] and x[1] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[1] and x[2] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[4] sample */
-        x0 = *px++;
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-        /* Read y[srcBLen - 3] sample */
-        c0 = *py--;
-        /* Read y[srcBLen - 4] sample */
-        c1 = *py--;
-
-        /* Read x[5] sample */
-        x1 = *px++;
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[4] and x[5] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[6] sample */
-        x2 = *px++;
-
-        /* x[5] and x[6] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *py--;
-        /* Read x[7] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[srcBLen - 5] */
-        acc0 += ((q15_t) x0 * c0);
-        /* acc1 +=  x[5] * y[srcBLen - 5] */
-        acc1 += ((q15_t) x1 * c0);
-        /* acc2 +=  x[6] * y[srcBLen - 5] */
-        acc2 += ((q15_t) x2 * c0);
-        /* acc3 +=  x[7] * y[srcBLen - 5] */
-        acc3 += ((q15_t) x3 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
-      *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8));
-      *pOut++ = (q7_t) (__SSAT(acc2 >> 7U, 8));
-      *pOut++ = (q7_t) (__SSAT(acc3 >> 7U, 8));
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize2 % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-      k = srcBLen >> 2U;
-
-      while (k > 0U)
-      {
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) *py--;
-        in2 = (q15_t) *py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Perform the multiply-accumulate */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) *py--;
-        in2 = (q15_t) *py--;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Perform the multiply-accumulate */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = srcBLen % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) *px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) *px++ * *py--);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pSrc2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
-   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
-   * ....
-   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
-   * sum +=  x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The blockSize3 variable holds the number of MAC operations performed */
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  pSrc2 = pIn2 + (srcBLen - 1U);
-  py = pSrc2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = blockSize3 >> 2U;
-
-    while (k > 0U)
-    {
-      /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
-      in1 = (q15_t) *py--;
-      in2 = (q15_t) *py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
-      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
-      in1 = (q15_t) *py--;
-      in2 = (q15_t) *py--;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
-      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = blockSize3 % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    k = blockSize3;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
-      sum += ((q15_t) *px++ * *py--);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pSrc2;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
-  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
-        q31_t sum;                                     /* Accumulator */
-        uint32_t i, j;                                 /* Loop counters */
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if (((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q15_t) pIn1[j] * pIn2[i - j]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of Conv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_conv_q7.c
+ * Description:  Convolution of Q7 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Conv
+  @{
+ */
+
+/**
+  @brief         Convolution of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length srcALen+srcBLen-1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+  @remark
+                   Refer to \ref arm_conv_opt_q7() for a faster implementation of this function.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+
+#include "arm_vec_filtering.h"
+
+void arm_conv_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
+{
+    const q7_t     *pIn1 = pSrcA;     /* inputA pointer               */
+    const q7_t     *pIn2 = pSrcB;     /* inputB pointer               */
+    /*
+     * Loop to perform MAC operations according to correlation equation
+     */
+    const q7_t     *pX;
+    const q7_t     *pY;
+    const q7_t     *pA;
+    const q7_t     *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   block1, block2, block3;
+    uint8_t   vddupStartIdx = 15;
+    uint8x16_t decrIdxVec = vddupq_u8(vddupStartIdx, 1);
+
+    if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA;
+        /*
+         * Swapping the lengths
+         */
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2 - 15;
+
+    for (i = 0; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        int32_t   acc0 = 0;
+        int32_t   acc1 = 0;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_DUAL_INC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count);
+        *pDst++ = (q7_t) acc0;
+        *pDst++ = (q7_t) acc1;
+        pB += 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        int32_t   acc = 0;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count);
+        *pDst++ = (q7_t) acc;
+        pB++;
+    }
+
+    for (i = 0; i <= block2 - 4; i += 4)
+    {
+        uint32_t  count = srcBLen;
+        int32_t   acc0 = 0;
+        int32_t   acc1 = 0;
+        int32_t   acc2 = 0;
+        int32_t   acc3 = 0;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, count);
+        *pDst++ = (q7_t) acc0;
+        *pDst++ = (q7_t) acc1;
+        *pDst++ = (q7_t) acc2;
+        *pDst++ = (q7_t) acc3;
+        pA += 4;
+    }
+    for (; i <= block2 - 2; i += 2)
+    {
+        uint32_t  count = srcBLen;
+        int32_t   acc0 = 0;
+        int32_t   acc1 = 0;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CONV_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, count);
+        *pDst++ = (q7_t) acc0;
+        *pDst++ = (q7_t) acc1;
+        pA += 2;
+    }
+    if (block2 & 1)
+    {
+        uint32_t  count = srcBLen;
+        int32_t   acc = 0;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count);
+        *pDst++ = (q7_t) acc;
+        pA++;
+    }
+
+    for (i = block3; i >= 1; i -= 2)
+    {
+        uint32_t  count = i;
+        int32_t   acc0 = 0;
+        int32_t   acc1 = 0;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count);
+        *pDst++ = (q7_t) acc0;
+        *pDst++ = (q7_t) acc1;
+        pA += 2;
+    }
+    for (; i >= 1; i--)
+    {
+        uint32_t  count = i;
+        int32_t   acc = 0;
+
+        pX = pA;
+        pY = pB;
+
+        MVE_INTR_CONV_SINGLE_Q7(acc, pX, pY, count);
+        *pDst++ = (q7_t) acc;
+        pA++;
+    }
+}
+
+#else
+void arm_conv_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1, *pSrc2;                           /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+  }
+
+  /* conv(x,y) at n = x[n] * y[0] + x[n-1] * y[1] + x[n-2] * y[2] + ...+ x[n-N+1] * y[N -1] */
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[0]
+   * sum = x[0] * y[1] + x[1] * y[0]
+   * ....
+   * sum = x[0] * y[srcBlen - 1] + x[1] * y[srcBlen - 2] +...+ x[srcBLen - 1] * y[0]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[0] , x[1] */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* y[srcBLen - 1] , y[srcBLen - 2] */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* x[0] * y[srcBLen - 1] */
+      /* x[1] * y[srcBLen - 2] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* x[2] , x[3] */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* y[srcBLen - 3] , y[srcBLen - 4] */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* x[2] * y[srcBLen - 3] */
+      /* x[3] * y[srcBLen - 4] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += ((q15_t) *px++ * *py--);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pIn2 + count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[srcBLen-1] + x[1] * y[srcBLen-2] +...+ x[srcBLen-1] * y[0]
+   * sum = x[1] * y[srcBLen-1] + x[2] * y[srcBLen-2] +...+ x[srcBLen]   * y[0]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[srcBLen-1] + x[srcALen] * y[srcBLen-2] +...+ x[srcALen-1] * y[0]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[srcBLen - 1] sample */
+        c0 = *py--;
+        /* Read y[srcBLen - 2] sample */
+        c1 = *py--;
+
+        /* Read x[3] sample */
+        x3 = *px++;
+
+        /* x[0] and x[1] are packed */
+        in1 = (q15_t) x0;
+        in2 = (q15_t) x1;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* y[srcBLen - 1]   and y[srcBLen - 2] are packed */
+        in1 = (q15_t) c0;
+        in2 = (q15_t) c1;
+
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc0 += x[0] * y[srcBLen - 1] + x[1] * y[srcBLen - 2]  */
+        acc0 = __SMLAD(input1, input2, acc0);
+
+        /* x[1] and x[2] are packed */
+        in1 = (q15_t) x1;
+        in2 = (q15_t) x2;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc1 += x[1] * y[srcBLen - 1] + x[2] * y[srcBLen - 2]  */
+        acc1 = __SMLAD(input1, input2, acc1);
+
+        /* x[2] and x[3] are packed */
+        in1 = (q15_t) x2;
+        in2 = (q15_t) x3;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc2 += x[2] * y[srcBLen - 1] + x[3] * y[srcBLen - 2]  */
+        acc2 = __SMLAD(input1, input2, acc2);
+
+        /* Read x[4] sample */
+        x0 = *px++;
+
+        /* x[3] and x[4] are packed */
+        in1 = (q15_t) x3;
+        in2 = (q15_t) x0;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc3 += x[3] * y[srcBLen - 1] + x[4] * y[srcBLen - 2]  */
+        acc3 = __SMLAD(input1, input2, acc3);
+
+        /* Read y[srcBLen - 3] sample */
+        c0 = *py--;
+        /* Read y[srcBLen - 4] sample */
+        c1 = *py--;
+
+        /* Read x[5] sample */
+        x1 = *px++;
+
+        /* x[2] and x[3] are packed */
+        in1 = (q15_t) x2;
+        in2 = (q15_t) x3;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* y[srcBLen - 3] and y[srcBLen - 4] are packed */
+        in1 = (q15_t) c0;
+        in2 = (q15_t) c1;
+
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc0 += x[2] * y[srcBLen - 3] + x[3] * y[srcBLen - 4]  */
+        acc0 = __SMLAD(input1, input2, acc0);
+
+        /* x[3] and x[4] are packed */
+        in1 = (q15_t) x3;
+        in2 = (q15_t) x0;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc1 += x[3] * y[srcBLen - 3] + x[4] * y[srcBLen - 4]  */
+        acc1 = __SMLAD(input1, input2, acc1);
+
+        /* x[4] and x[5] are packed */
+        in1 = (q15_t) x0;
+        in2 = (q15_t) x1;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc2 += x[4] * y[srcBLen - 3] + x[5] * y[srcBLen - 4]  */
+        acc2 = __SMLAD(input1, input2, acc2);
+
+        /* Read x[6] sample */
+        x2 = *px++;
+
+        /* x[5] and x[6] are packed */
+        in1 = (q15_t) x1;
+        in2 = (q15_t) x2;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc3 += x[5] * y[srcBLen - 3] + x[6] * y[srcBLen - 4]  */
+        acc3 = __SMLAD(input1, input2, acc3);
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *py--;
+        /* Read x[7] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[srcBLen - 5] */
+        acc0 += ((q15_t) x0 * c0);
+        /* acc1 +=  x[5] * y[srcBLen - 5] */
+        acc1 += ((q15_t) x1 * c0);
+        /* acc2 +=  x[6] * y[srcBLen - 5] */
+        acc2 += ((q15_t) x2 * c0);
+        /* acc3 +=  x[7] * y[srcBLen - 5] */
+        acc3 += ((q15_t) x3 * c0);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(acc0 >> 7U, 8));
+      *pOut++ = (q7_t) (__SSAT(acc1 >> 7U, 8));
+      *pOut++ = (q7_t) (__SSAT(acc2 >> 7U, 8));
+      *pOut++ = (q7_t) (__SSAT(acc3 >> 7U, 8));
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
+      {
+
+        /* Reading two inputs of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Reading two inputs of SrcB buffer and packing */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Perform the multiply-accumulate */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Reading two inputs of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Reading two inputs of SrcB buffer and packing */
+        in1 = (q15_t) *py--;
+        in2 = (q15_t) *py--;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Perform the multiply-accumulate */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py--);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py--);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pSrc2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[srcBLen-1] + x[srcALen-srcBLen+2] * y[srcBLen-2] +...+ x[srcALen-1] * y[1]
+   * sum += x[srcALen-srcBLen+2] * y[srcBLen-1] + x[srcALen-srcBLen+3] * y[srcBLen-2] +...+ x[srcALen-1] * y[2]
+   * ....
+   * sum +=  x[srcALen-2] * y[srcBLen-1] + x[srcALen-1] * y[srcBLen-2]
+   * sum +=  x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The blockSize3 variable holds the number of MAC operations performed */
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  pSrc2 = pIn2 + (srcBLen - 1U);
+  py = pSrc2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = blockSize3 >> 2U;
+
+    while (k > 0U)
+    {
+      /* Reading two inputs, x[srcALen - srcBLen + 1] and x[srcALen - srcBLen + 2] of SrcA buffer and packing */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* Reading two inputs, y[srcBLen - 1] and y[srcBLen - 2] of SrcB buffer and packing */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* sum += x[srcALen - srcBLen + 1] * y[srcBLen - 1] */
+      /* sum += x[srcALen - srcBLen + 2] * y[srcBLen - 2] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Reading two inputs, x[srcALen - srcBLen + 3] and x[srcALen - srcBLen + 4] of SrcA buffer and packing */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* Reading two inputs, y[srcBLen - 3] and y[srcBLen - 4] of SrcB buffer and packing */
+      in1 = (q15_t) *py--;
+      in2 = (q15_t) *py--;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* sum += x[srcALen - srcBLen + 3] * y[srcBLen - 3] */
+      /* sum += x[srcALen - srcBLen + 4] * y[srcBLen - 4] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = blockSize3 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = blockSize3;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum +=  x[srcALen-1] * y[srcBLen-1] */
+      sum += ((q15_t) *px++ * *py--);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut++ = (q7_t) (__SSAT(sum >> 7U, 8));
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pSrc2;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB;                            /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i, j;                                 /* Loop counters */
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i < (srcALen + srcBLen - 1U); i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q15_t) pIn1[j] * pIn2[i - j]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    pDst[i] = (q7_t) __SSAT((sum >> 7U), 8U);
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Conv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f16.c
new file mode 100755
index 00000000..5924b7ac
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f16.c
@@ -0,0 +1,1159 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_f16.c
+ * Description:  Correlation of floating-point sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup Corr Correlation
+
+  Correlation is a mathematical operation that is similar to convolution.
+  As with convolution, correlation uses two signals to produce a third signal.
+  The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
+  Correlation is commonly used to measure the similarity between two signals.
+  It has applications in pattern recognition, cryptanalysis, and searching.
+  The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
+  Fast versions of the Q15 and Q31 functions are also provided.
+
+  @par           Algorithm
+                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
+                   The convolution of the two signals is denoted by
+  <pre>
+      c[n] = a[n] * b[n]
+  </pre>
+                   In correlation, one of the signals is flipped in time
+  <pre>
+       c[n] = a[n] * b[-n]
+  </pre>
+  @par
+                   and this is mathematically defined as
+                   \image html CorrelateEquation.gif
+  @par
+                   The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+                   The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
+                   The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
+
+  @note
+                   The <code>pDst</code> should be initialized to all zeros before being used.
+
+  @par           Fixed-Point Behavior
+                   Correlation requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+
+#define MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F16(acc0, acc1, pX, pY, count)                            \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, xVec, yVec;                                                       \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        yVec = vldrhq_f16(&pSrcY[-1]);                                                              \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    k = count % 0x8U;                                                                               \
+    /* use predication to finalize MAC sum */                                                       \
+    /* acc1 requires 1 additional sample  */                                                        \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */                               \
+    mve_pred16_t p0 = vctp16q(k+1);                                                      \
+    xVec = vld1q(pSrcX); pSrcX += 8;                                                    \
+    yVec = vldrhq_f16(&pSrcY[-1]);                                                                  \
+    acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec,p0);                                                  \
+    /* acc0 requires exact number of sample  */                                                     \
+    /* disable extra lanes in final MAC computation  */                                             \
+    p0 = vctp16q(k);                                                                     \
+    yVec = vld1q(pSrcY); pSrcY += 8;                                                    \
+    acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec,p0);                                                  \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+}
+
+#define MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count)                                                \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   accVec, xVec, yVec;                                                                 \
+    uint16_t    k;                                                                                  \
+                                                                                                    \
+    accVec = vdupq_n_f16(0.0f);                                                                     \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        accVec = vfmaq(accVec, xVec, yVec);                                                         \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* Loop with tail predication expected here  */                                                 \
+    k = count % 0x8U;                                                                               \
+    if (k > 0U)                                                                                     \
+    {                                                                                               \
+        mve_pred16_t p0 = vctp16q(k);                                                    \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        accVec = vfmaq_m(accVec, xVec, yVec, p0);                                                   \
+    }                                                                                               \
+                                                                                                    \
+  acc = vecAddAcrossF16Mve(accVec);                                                                 \
+}
+
+#define MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F16(acc0, acc1, acc2, acc3, pX, pY, count)              \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, acc2Vec, acc3Vec, xVec, yVec;                                     \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc2Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc3Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        xVec = vldrhq_f16(&pSrcX[2]);                                                               \
+        acc2Vec = vfmaq_f16(acc2Vec, xVec, yVec);                                                   \
+        xVec = vldrhq_f16(&pSrcX[3]);                                                               \
+        acc3Vec = vfmaq_f16(acc3Vec, xVec, yVec);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* loop + tail predication expected here  */                                                    \
+    k = count % 0x8U;                                                                               \
+    if (k > 0U)                                                                                     \
+    {                                                                                               \
+        mve_pred16_t p0 = vctp16q(k);                                                    \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0);                                             \
+        xVec = vldrhq_f16(&pSrcX[2]);                                                               \
+        acc2Vec = vfmaq_m_f16(acc2Vec, xVec, yVec, p0);                                             \
+        xVec = vldrhq_f16(&pSrcX[3]);                                                               \
+        acc3Vec = vfmaq_m_f16(acc3Vec, xVec, yVec, p0);                                             \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0);                                             \
+    }                                                                                               \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+    acc2 = vecAddAcrossF16Mve(acc2Vec);                                                             \
+    acc3 = vecAddAcrossF16Mve(acc3Vec);                                                             \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F16(acc0, acc1, pX, pY, count)                          \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, xVec, yVec;                                                       \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = count >> 3;                                                                                 \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* loop + tail predication expected here  */                                                    \
+    k = count % 0x8U;                                                                               \
+    if (k > 0U)                                                                                     \
+    {                                                                                               \
+        mve_pred16_t p0 = vctp16q(k);                                                    \
+        yVec = vld1q(pSrcY); pSrcY += 8;;                                               \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0);                                             \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0);                                             \
+    }                                                                                               \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+}
+
+#define MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F16(acc0, acc1, pX, pY, count)                            \
+{                                                                                                   \
+    float16_t const *pSrcX, *pSrcY;                                                                 \
+    f16x8_t   acc0Vec, acc1Vec, xVec, yVec;                                                       \
+    uint32_t    k;                                                                                  \
+                                                                                                    \
+    acc0Vec = vdupq_n_f16(0.0f);                                                                    \
+    acc1Vec = vdupq_n_f16(0.0f);                                                                    \
+    pSrcX = (float16_t const *) pX;                                                                 \
+    pSrcY = (float16_t const *) pY;                                                                 \
+    k = (count-1) >> 3;                                                                             \
+                                                                                                    \
+    while (k > 0U)                                                                                  \
+    {                                                                                               \
+        yVec = vld1q(pSrcY); pSrcY += 8;                                                \
+        xVec = vldrhq_f16(&pSrcX[1]);                                                               \
+        acc1Vec = vfmaq_f16(acc1Vec, xVec, yVec);                                                   \
+        xVec = vld1q(pSrcX); pSrcX += 8;                                                \
+        acc0Vec = vfmaq_f16(acc0Vec, xVec, yVec);                                                   \
+        /*  Decrement the loop counter   */                                                         \
+        k--;                                                                                        \
+    }                                                                                               \
+    /* use predication to finalize MAC sum */                                                       \
+    /* acc1 requires exact number of sample (count-1)  */                                           \
+    /* disable extra lanes in final MAC computation  */                                             \
+    k = (count-1) % 0x8U;                                                                           \
+    mve_pred16_t p0 = vctp16q(k);                                                        \
+    yVec = vld1q(pSrcY); pSrcY += 8;                                                    \
+    xVec = vldrhq_f16(&pSrcX[1]);                                                                   \
+    acc1Vec = vfmaq_m_f16(acc1Vec, xVec, yVec, p0);                                                 \
+    /* acc0 requires 1 additional sample  (count) */                                                \
+    /* so add 1 to unmask an extra lane  in final MAC computation  */                               \
+    p0 = vctp16q(k+1);                                                                   \
+    xVec = vld1q(pSrcX); pSrcX += 8;                                                    \
+    acc0Vec = vfmaq_m_f16(acc0Vec, xVec, yVec, p0);                                                 \
+                                                                                                    \
+    acc0 = vecAddAcrossF16Mve(acc0Vec);                                                             \
+    acc1 = vecAddAcrossF16Mve(acc1Vec);                                                             \
+}
+
+
+
+void arm_correlate_f16(
+  const float16_t * pSrcA,
+        uint32_t srcALen,
+  const float16_t * pSrcB,
+        uint32_t srcBLen,
+        float16_t * pDst)
+{
+    float16_t *pIn1 = (float16_t *)pSrcA;                    /* inputA pointer               */
+    float16_t *pIn2 = (float16_t *)pSrcB + (srcBLen - 1U);   /* inputB pointer               */
+    float16_t *pX;
+    float16_t *pY;
+    float16_t *pA;
+    float16_t *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   inv = 2U;         /* Reverse order flag */
+    uint32_t  tot = 0U;         /* Length */
+    int32_t   block1, block2, block3;
+    int32_t   incr;
+
+    tot = ((srcALen + srcBLen) - 2U);
+    if (srcALen > srcBLen)
+    {
+        /*
+         * Calculating the number of zeros to be padded to the output
+         */
+        j = srcALen - srcBLen;
+        /*
+         * Initialize the pointer after zero padding
+         */
+        pDst += j;
+    }
+    else if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = (float16_t *)pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = (float16_t *)pSrcA + (srcALen - 1U);
+        /*
+         * Initialisation of the pointer after zero padding
+         */
+        pDst = pDst + tot;
+        /*
+         * Swapping the lengths
+         */
+
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+        /*
+         * Setting the reverse flag
+         */
+        inv = -2;
+
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2;
+    incr = inv / 2;
+
+    for (i = 0U; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        _Float16 acc0;
+        _Float16 acc1;
+        /*
+         * compute 2 accumulators per loop
+         * size is incrementing for second accumulator
+         * Y pointer is decrementing for second accumulator
+         */
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F16(acc0, acc1, pX, pY, count);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pB -= 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        _Float16 acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count);
+
+        *pDst = acc;
+        pDst += incr;
+        pB--;
+    }
+
+    for (i = 0U; i <= block2 - 4; i += 4)
+    {
+        _Float16 acc0;
+        _Float16 acc1;
+        _Float16 acc2;
+        _Float16 acc3;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F16(acc0, acc1, acc2, acc3, pX, pY, srcBLen);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        *pDst = acc2;
+        pDst += incr;
+        *pDst = acc3;
+        pDst += incr;
+        pA += 4;
+    }
+
+    for (; i <= block2 - 2; i += 2)
+    {
+        _Float16 acc0;
+        _Float16 acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F16(acc0, acc1, pX, pY, srcBLen);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pA += 2;
+    }
+
+    if (block2 & 1)
+    {
+        _Float16 acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, srcBLen);
+
+        *pDst = acc;
+        pDst += incr;
+        pA++;
+    }
+
+    for (i = block3 - 1; i >= 0; i -= 2)
+    {
+
+        uint32_t  count = (i + 1);
+        _Float16 acc0;
+        _Float16 acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is decrementing for second accumulator
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F16(acc0, acc1, pX, pY, count);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pA += 2;
+
+    }
+    for (; i >= 0; i--)
+    {
+        uint32_t  count = (i + 1);
+        _Float16 acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F16(acc, pX, pY, count);
+
+        *pDst = acc;
+        pDst += incr;
+        pA++;
+    }
+}
+
+#else
+void arm_correlate_f16(
+  const float16_t * pSrcA,
+        uint32_t srcALen,
+  const float16_t * pSrcB,
+        uint32_t srcBLen,
+        float16_t * pDst)
+{
+
+#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_AUTOVECTORIZE)
+  
+  const float16_t *pIn1;                               /* InputA pointer */
+  const float16_t *pIn2;                               /* InputB pointer */
+        float16_t *pOut = pDst;                        /* Output pointer */
+  const float16_t *px;                                 /* Intermediate inputA pointer */
+  const float16_t *py;                                 /* Intermediate inputB pointer */
+  const float16_t *pSrc1;
+        _Float16 sum;
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;                         /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+    _Float16 acc0, acc1, acc2, acc3,c0;                    /* Accumulators */
+    _Float16 x0, x1, x2, x3;                        /* temporary variables for holding input and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we assume zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding has to be done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f16;
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* x[1] * y[srcBLen - 3] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* x[2] * y[srcBLen - 2] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* x[3] * y[srcBLen - 1] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL)  */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0.0f16;
+      acc1 = 0.0f16;
+      acc2 = 0.0f16;
+      acc3 = 0.0f16;
+
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *(py++);
+        /* Read x[3] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[0] */
+        acc0 += (_Float16)x0 * (_Float16)c0;
+        /* acc1 +=  x[1] * y[0] */
+        acc1 += (_Float16)x1 * (_Float16)c0;
+        /* acc2 +=  x[2] * y[0] */
+        acc2 += (_Float16)x2 * (_Float16)c0;
+        /* acc3 +=  x[3] * y[0] */
+        acc3 += (_Float16)x3 * (_Float16)c0;
+
+        /* Read y[1] sample */
+        c0 = *(py++);
+        /* Read x[4] sample */
+        x0 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[1] */
+        acc0 += (_Float16)x1 * (_Float16)c0;
+        /* acc1 +=  x[2] * y[1] */
+        acc1 += (_Float16)x2 * (_Float16)c0;
+        /* acc2 +=  x[3] * y[1] */
+        acc2 += (_Float16)x3 * (_Float16)c0;
+        /* acc3 +=  x[4] * y[1] */
+        acc3 += (_Float16)x0 * (_Float16)c0;
+
+        /* Read y[2] sample */
+        c0 = *(py++);
+        /* Read x[5] sample */
+        x1 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[2] */
+        acc0 += (_Float16)x2 * (_Float16)c0;
+        /* acc1 +=  x[3] * y[2] */
+        acc1 += (_Float16)x3 * (_Float16)c0;
+        /* acc2 +=  x[4] * y[2] */
+        acc2 += (_Float16)x0 * (_Float16)c0;
+        /* acc3 +=  x[5] * y[2] */
+        acc3 += (_Float16)x1 * (_Float16)c0;
+
+        /* Read y[3] sample */
+        c0 = *(py++);
+        /* Read x[6] sample */
+        x2 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[3] * y[3] */
+        acc0 += (_Float16)x3 * (_Float16)c0;
+        /* acc1 +=  x[4] * y[3] */
+        acc1 += (_Float16)x0 * (_Float16)c0;
+        /* acc2 +=  x[5] * y[3] */
+        acc2 += (_Float16)x1 * (_Float16)c0;
+        /* acc3 +=  x[6] * y[3] */
+        acc3 += (_Float16)x2 * (_Float16)c0;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *(py++);
+        /* Read x[7] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 += (_Float16)x0 * (_Float16)c0;
+        /* acc1 +=  x[5] * y[4] */
+        acc1 += (_Float16)x1 * (_Float16)c0;
+        /* acc2 +=  x[6] * y[4] */
+        acc2 += (_Float16)x2 * (_Float16)c0;
+        /* acc3 +=  x[7] * y[4] */
+        acc3 += (_Float16)x3 * (_Float16)c0;
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = acc0;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = acc1;
+      pOut += inc;
+
+      *pOut = acc2;
+      pOut += inc;
+
+      *pOut = acc3;
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL)  */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f16;
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (_Float16)*px++ * (_Float16)*py++;
+        sum += (_Float16)*px++ * (_Float16)*py++;
+        sum += (_Float16)*px++ * (_Float16)*py++;
+        sum += (_Float16)*px++ * (_Float16)*py++;
+
+        /* Decrement loop counter */
+        k--;
+      }
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (_Float16)*px++ * (_Float16)*py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f16;
+
+      /* Loop over srcBLen */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (_Float16)*px++ * (_Float16)*py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f16;
+
+#if defined (ARM_MATH_LOOPUNROLL) 
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL)  */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (_Float16)*px++ * (_Float16)*py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float16_t *pIn1 = pSrcA;                       /* inputA pointer */
+  const float16_t *pIn2 = pSrcB + (srcBLen - 1U);      /* inputB pointer */
+        _Float16 sum;                                 /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we assume zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using convolution but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+
+  }
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0.0f16;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if ((((i - j) < srcBLen) && (j < srcALen)))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += (_Float16)pIn1[j] * (_Float16)pIn2[-((int32_t) i - (int32_t) j)];
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = sum;
+    else
+      *pDst++ = sum;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Corr group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
index 9aa648b7..41a69a67 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f32.c
@@ -1,893 +1,1095 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_f32.c
- * Description:  Correlation of floating-point sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup Corr Correlation
-
-  Correlation is a mathematical operation that is similar to convolution.
-  As with convolution, correlation uses two signals to produce a third signal.
-  The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
-  Correlation is commonly used to measure the similarity between two signals.
-  It has applications in pattern recognition, cryptanalysis, and searching.
-  The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
-  Fast versions of the Q15 and Q31 functions are also provided.
-
-  @par           Algorithm
-                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
-                   The convolution of the two signals is denoted by
-  <pre>
-      c[n] = a[n] * b[n]
-  </pre>
-                   In correlation, one of the signals is flipped in time
-  <pre>
-       c[n] = a[n] * b[-n]
-  </pre>
-  @par
-                   and this is mathematically defined as
-                   \image html CorrelateEquation.gif
-  @par
-                   The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
-                   The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
-                   The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
-
-  @note
-                   The <code>pDst</code> should be initialized to all zeros before being used.
-
-  @par           Fixed-Point Behavior
-                   Correlation requires summing up a large number of intermediate products.
-                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
-                   Refer to the function specific documentation below for further details of the particular algorithm used.
-
-  @par           Fast Versions
-                   Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
-                   the input signals should be scaled down to avoid intermediate overflows.
-
-  @par           Opt Versions
-                   Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
-                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of floating-point sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @return        none
- */
-
-void arm_correlate_f32(
-  const float32_t * pSrcA,
-        uint32_t srcALen,
-  const float32_t * pSrcB,
-        uint32_t srcBLen,
-        float32_t * pDst)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-  
-  const float32_t *pIn1;                               /* InputA pointer */
-  const float32_t *pIn2;                               /* InputB pointer */
-        float32_t *pOut = pDst;                        /* Output pointer */
-  const float32_t *px;                                 /* Intermediate inputA pointer */
-  const float32_t *py;                                 /* Intermediate inputB pointer */
-  const float32_t *pSrc1;
-        float32_t sum;
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-        uint32_t outBlockSize;                         /* Loop counter */
-        int32_t inc = 1;                               /* Destination address modifier */
-
-#if defined (ARM_MATH_LOOPUNROLL) || defined (ARM_MATH_NEON)
-  float32_t acc0, acc1, acc2, acc3;                    /* Accumulators */
-  float32_t x0, x1, x2, x3, c0;                        /* temporary variables for holding input and coefficient values */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we assume zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
-
-    /* When srcALen > srcBLen, zero padding has to be done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-  }
-
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]
-   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
-   * ....
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1U);
-  py = pSrc1;
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t x,y;
-    float32x4_t res = vdupq_n_f32(0) ;
-    float32x2_t accum = vdup_n_f32(0);
-
-    while (k > 0U)
-    {
-      x = vld1q_f32(px);
-      y = vld1q_f32(py);
-
-      res = vmlaq_f32(res,x, y);
-
-      px += 4;
-      py += 4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
-    sum += accum[0] + accum[1];
-
-    k = count & 0x3;
-#else
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += *px++ * *py++;
-
-      /* x[1] * y[srcBLen - 3] */
-      sum += *px++ * *py++;
-
-      /* x[2] * y[srcBLen - 2] */
-      sum += *px++ * *py++;
-
-      /* x[3] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#endif /* #if defined(ARM_MATH_NEON) */
-#else
-
-    /* Initialize k with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum += *px++ * *py++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = blockSize2 >> 2U;
-
-#if defined(ARM_MATH_NEON)
-      float32x4_t c;
-      float32x4_t x1v;
-      float32x4_t x2v;
-      uint32x4_t x1v_u;
-      uint32x4_t x2v_u;
-      float32x4_t x;
-      uint32x4_t x_u;
-      float32x4_t res = vdupq_n_f32(0) ;
-#endif /* #if defined(ARM_MATH_NEON) */
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-#if defined(ARM_MATH_NEON)
-      /* Compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      res = vdupq_n_f32(0) ;
-
-      x1v = vld1q_f32(px);
-      px += 4;
-      do
-      {
-        x2v = vld1q_f32(px);
-        c = vld1q_f32(py);
-
-        py += 4;
-
-        x = x1v;
-        res = vmlaq_n_f32(res,x,c[0]);
-
-        x = vextq_f32(x1v,x2v,1);
-
-        res = vmlaq_n_f32(res,x,c[1]);
-
-        x = vextq_f32(x1v,x2v,2);
-
-	res = vmlaq_n_f32(res,x,c[2]);
-
-        x = vextq_f32(x1v,x2v,3);
-
-	res = vmlaq_n_f32(res,x,c[3]);
-
-        x1v = x2v;
-        px+=4;
-        x2v = vld1q_f32(px);
-
-      } while (--k);
-      
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen & 0x3;
-
-      while (k > 0U)
-      {
-        /* Read y[srcBLen - 5] sample */
-        c0 = *(py++);
-
-        res = vmlaq_n_f32(res,x1v,c0);
-
-        /* Reuse the present samples for the next MAC */
-        x1v[0] = x1v[1];
-        x1v[1] = x1v[2];
-        x1v[2] = x1v[3];
-
-        x1v[3] = *(px++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      px-=1;
-
-      acc0 = res[0];
-      acc1 = res[1];
-      acc2 = res[2];
-      acc3 = res[3];
-#else
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py++);
-        /* Read x[3] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[3] * y[0] */
-        acc3 += x3 * c0;
-
-        /* Read y[1] sample */
-        c0 = *(py++);
-        /* Read x[4] sample */
-        x0 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += x1 * c0;
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += x2 * c0;
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += x3 * c0;
-        /* acc3 +=  x[4] * y[1] */
-        acc3 += x0 * c0;
-
-        /* Read y[2] sample */
-        c0 = *(py++);
-        /* Read x[5] sample */
-        x1 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += x2 * c0;
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += x3 * c0;
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += x0 * c0;
-        /* acc3 +=  x[5] * y[2] */
-        acc3 += x1 * c0;
-
-        /* Read y[3] sample */
-        c0 = *(py++);
-        /* Read x[6] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[3] * y[3] */
-        acc0 += x3 * c0;
-        /* acc1 +=  x[4] * y[3] */
-        acc1 += x0 * c0;
-        /* acc2 +=  x[5] * y[3] */
-        acc2 += x1 * c0;
-        /* acc3 +=  x[6] * y[3] */
-        acc3 += x2 * c0;
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-        /* Read x[7] sample */
-        x3 = *(px++);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += x0 * c0;
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += x1 * c0;
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += x2 * c0;
-        /* acc3 +=  x[7] * y[4] */
-        acc3 += x3 * c0;
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-#endif /* #if defined(ARM_MATH_NEON) */
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = acc0;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = acc1;
-      pOut += inc;
-
-      *pOut = acc2;
-      pOut += inc;
-
-      *pOut = acc3;
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize2 % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-      k = srcBLen >> 2U;
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t x,y;
-    float32x4_t res = vdupq_n_f32(0) ;
-    float32x2_t accum = vdup_n_f32(0);
-
-    while (k > 0U)
-    {
-      x = vld1q_f32(px);
-      y = vld1q_f32(py);
-
-      res = vmlaq_f32(res,x, y);
-
-      px += 4;
-      py += 4;
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
-    sum += accum[0] + accum[1];
-#else
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-        sum += *px++ * *py++;
-
-        /* Decrement loop counter */
-        k--;
-      }
-#endif /* #if defined(ARM_MATH_NEON) */
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0.0f;
-
-      /* Loop over srcBLen */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * ....
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
-   * sum +=  x[srcALen-1] * y[0]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-#if defined(ARM_MATH_NEON)
-    float32x4_t x,y;
-    float32x4_t res = vdupq_n_f32(0) ;
-    float32x2_t accum = vdup_n_f32(0);
-
-    while (k > 0U)
-    {
-      x = vld1q_f32(px);
-      y = vld1q_f32(py);
-
-      res = vmlaq_f32(res,x, y);
-
-      px += 4;
-      py += 4;
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
-    sum += accum[0] + accum[1];
-#else
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += *px++ * *py++;
-
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += *px++ * *py++;
-
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += *px++ * *py++;
-
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += *px++ * *py++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-#endif /* #if defined (ARM_MATH_NEON) */
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += *px++ * *py++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const float32_t *pIn1 = pSrcA;                       /* inputA pointer */
-  const float32_t *pIn2 = pSrcB + (srcBLen - 1U);      /* inputB pointer */
-        float32_t sum;                                 /* Accumulator */
-        uint32_t i = 0U, j;                            /* Loop counters */
-        uint32_t inv = 0U;                             /* Reverse order flag */
-        uint32_t tot = 0U;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two
-   * inputs of same length. But to improve the performance, we assume zeroes
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2U);
-
-  if (srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if (srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1U);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0U; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0.0f;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if ((((i - j) < srcBLen) && (j < srcALen)))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += pIn1[j] * pIn2[-((int32_t) i - j)];
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    if (inv == 1)
-      *pDst-- = sum;
-    else
-      *pDst++ = sum;
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_f32.c
+ * Description:  Correlation of floating-point sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup Corr Correlation
+
+  Correlation is a mathematical operation that is similar to convolution.
+  As with convolution, correlation uses two signals to produce a third signal.
+  The underlying algorithms in correlation and convolution are identical except that one of the inputs is flipped in convolution.
+  Correlation is commonly used to measure the similarity between two signals.
+  It has applications in pattern recognition, cryptanalysis, and searching.
+  The CMSIS library provides correlation functions for Q7, Q15, Q31 and floating-point data types.
+  Fast versions of the Q15 and Q31 functions are also provided.
+
+  @par           Algorithm
+                   Let <code>a[n]</code> and <code>b[n]</code> be sequences of length <code>srcALen</code> and <code>srcBLen</code> samples respectively.
+                   The convolution of the two signals is denoted by
+  <pre>
+      c[n] = a[n] * b[n]
+  </pre>
+                   In correlation, one of the signals is flipped in time
+  <pre>
+       c[n] = a[n] * b[-n]
+  </pre>
+  @par
+                   and this is mathematically defined as
+                   \image html CorrelateEquation.gif
+  @par
+                   The <code>pSrcA</code> points to the first input vector of length <code>srcALen</code> and <code>pSrcB</code> points to the second input vector of length <code>srcBLen</code>.
+                   The result <code>c[n]</code> is of length <code>2 * max(srcALen, srcBLen) - 1</code> and is defined over the interval <code>n=0, 1, 2, ..., (2 * max(srcALen, srcBLen) - 2)</code>.
+                   The output result is written to <code>pDst</code> and the calling function must allocate <code>2 * max(srcALen, srcBLen) - 1</code> words for the result.
+
+  @note
+                   The <code>pDst</code> should be initialized to all zeros before being used.
+
+  @par           Fixed-Point Behavior
+                   Correlation requires summing up a large number of intermediate products.
+                   As such, the Q7, Q15, and Q31 functions run a risk of overflow and saturation.
+                   Refer to the function specific documentation below for further details of the particular algorithm used.
+
+  @par           Fast Versions
+                   Fast versions are supported for Q31 and Q15.  Cycles for Fast versions are less compared to Q31 and Q15 of correlate and the design requires
+                   the input signals should be scaled down to avoid intermediate overflows.
+
+  @par           Opt Versions
+                   Opt versions are supported for Q15 and Q7.  Design uses internal scratch buffer for getting good optimisation.
+                   These versions are optimised in cycles and consumes more memory (Scratch memory) compared to Q15 and Q7 versions of correlate
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+
+
+void arm_correlate_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
+{
+    const float32_t *pIn1 = pSrcA;    /* inputA pointer               */
+    const float32_t *pIn2 = pSrcB + (srcBLen - 1U);   /* inputB pointer               */
+    const float32_t *pX, *pY;
+    const float32_t *pA, *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   inv = 4U;         /* Reverse order flag */
+    uint32_t  tot = 0U;         /* Length */
+    int32_t   block1, block2, block3;
+    int32_t   incr;
+
+    tot = ((srcALen + srcBLen) - 2U);
+    if (srcALen > srcBLen)
+    {
+        /*
+         * Calculating the number of zeros to be padded to the output
+         */
+        j = srcALen - srcBLen;
+        /*
+         * Initialize the pointer after zero padding
+         */
+        pDst += j;
+    }
+    else if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA + (srcALen - 1U);
+        /*
+         * Initialisation of the pointer after zero padding
+         */
+        pDst = pDst + tot;
+        /*
+         * Swapping the lengths
+         */
+
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+        /*
+         * Setting the reverse flag
+         */
+        inv = -4;
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2;
+    incr = inv / 4;
+
+    for (i = 0U; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        float32_t acc0;
+        float32_t acc1;
+
+        /*
+         * compute 2 accumulators per loop
+         * size is incrementing for second accumulator
+         * Y pointer is decrementing for second accumulator
+         */
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_F32(acc0, acc1, pX, pY, count);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pB -= 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        float32_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count);
+
+        *pDst = acc;
+        pDst += incr;
+        pB--;
+    }
+
+    for (i = 0U; i <= block2 - 4; i += 4)
+    {
+        float32_t acc0;
+        float32_t acc1;
+        float32_t acc2;
+        float32_t acc3;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_F32(acc0, acc1, acc2, acc3, pX, pY, srcBLen);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        *pDst = acc2;
+        pDst += incr;
+        *pDst = acc3;
+        pDst += incr;
+        pA += 4;
+    }
+
+    for (; i <= block2 - 2; i += 2)
+    {
+        float32_t acc0;
+        float32_t acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_F32(acc0, acc1, pX, pY, srcBLen);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pA += 2;
+    }
+
+    if (block2 & 1)
+    {
+        float32_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, srcBLen);
+
+        *pDst = acc;
+        pDst += incr;
+        pA++;
+    }
+
+    for (i = block3 - 1; i >= 0; i -= 2)
+    {
+
+        uint32_t  count = (i + 1);
+        float32_t acc0;
+        float32_t acc1;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is decrementing for second accumulator
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_F32(acc0, acc1, pX, pY, count);
+
+        *pDst = acc0;
+        pDst += incr;
+        *pDst = acc1;
+        pDst += incr;
+        pA += 2;
+
+    }
+    for (; i >= 0; i--)
+    {
+        uint32_t  count = (i + 1);
+        float32_t acc;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_F32(acc, pX, pY, count);
+
+        *pDst = acc;
+        pDst += incr;
+        pA++;
+    }
+}
+
+#else
+void arm_correlate_f32(
+  const float32_t * pSrcA,
+        uint32_t srcALen,
+  const float32_t * pSrcB,
+        uint32_t srcBLen,
+        float32_t * pDst)
+{
+
+#if defined(ARM_MATH_DSP) && !defined(ARM_MATH_AUTOVECTORIZE)
+  
+  const float32_t *pIn1;                               /* InputA pointer */
+  const float32_t *pIn2;                               /* InputB pointer */
+        float32_t *pOut = pDst;                        /* Output pointer */
+  const float32_t *px;                                 /* Intermediate inputA pointer */
+  const float32_t *py;                                 /* Intermediate inputB pointer */
+  const float32_t *pSrc1;
+        float32_t sum;
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;                         /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+    float32_t acc0, acc1, acc2, acc3,c0;                    /* Accumulators */
+#if !defined(ARM_MATH_NEON)
+    float32_t x0, x1, x2, x3;                        /* temporary variables for holding input and coefficient values */
+#endif
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we assume zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding has to be done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+
+    k = count & 0x3;
+#else
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] */
+      sum += *px++ * *py++;
+
+      /* x[1] * y[srcBLen - 3] */
+      sum += *px++ * *py++;
+
+      /* x[2] * y[srcBLen - 2] */
+      sum += *px++ * *py++;
+
+      /* x[3] * y[srcBLen - 1] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+#if defined(ARM_MATH_NEON)
+      float32x4_t c;
+      float32x4_t x1v;
+      float32x4_t x2v;
+      float32x4_t x;
+      float32x4_t res = vdupq_n_f32(0) ;
+#endif /* #if defined(ARM_MATH_NEON) */
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+
+#if defined(ARM_MATH_NEON)
+      /* Compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      res = vdupq_n_f32(0) ;
+
+      x1v = vld1q_f32(px);
+      px += 4;
+      do
+      {
+        x2v = vld1q_f32(px);
+        c = vld1q_f32(py);
+
+        py += 4;
+
+        x = x1v;
+        res = vmlaq_n_f32(res,x,c[0]);
+
+        x = vextq_f32(x1v,x2v,1);
+
+        res = vmlaq_n_f32(res,x,c[1]);
+
+        x = vextq_f32(x1v,x2v,2);
+
+	res = vmlaq_n_f32(res,x,c[2]);
+
+        x = vextq_f32(x1v,x2v,3);
+
+	res = vmlaq_n_f32(res,x,c[3]);
+
+        x1v = x2v;
+        px+=4;
+      } while (--k);
+      
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen & 0x3;
+
+      while (k > 0U)
+      {
+        /* Read y[srcBLen - 5] sample */
+        c0 = *(py++);
+
+        res = vmlaq_n_f32(res,x1v,c0);
+
+        /* Reuse the present samples for the next MAC */
+        x1v[0] = x1v[1];
+        x1v[1] = x1v[2];
+        x1v[2] = x1v[3];
+
+        x1v[3] = *(px++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      px-=1;
+
+      acc0 = res[0];
+      acc1 = res[1];
+      acc2 = res[2];
+      acc3 = res[3];
+#else
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *(py++);
+        /* Read x[3] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[0] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[1] * y[0] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[2] * y[0] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[3] * y[0] */
+        acc3 += x3 * c0;
+
+        /* Read y[1] sample */
+        c0 = *(py++);
+        /* Read x[4] sample */
+        x0 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[1] */
+        acc0 += x1 * c0;
+        /* acc1 +=  x[2] * y[1] */
+        acc1 += x2 * c0;
+        /* acc2 +=  x[3] * y[1] */
+        acc2 += x3 * c0;
+        /* acc3 +=  x[4] * y[1] */
+        acc3 += x0 * c0;
+
+        /* Read y[2] sample */
+        c0 = *(py++);
+        /* Read x[5] sample */
+        x1 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[2] */
+        acc0 += x2 * c0;
+        /* acc1 +=  x[3] * y[2] */
+        acc1 += x3 * c0;
+        /* acc2 +=  x[4] * y[2] */
+        acc2 += x0 * c0;
+        /* acc3 +=  x[5] * y[2] */
+        acc3 += x1 * c0;
+
+        /* Read y[3] sample */
+        c0 = *(py++);
+        /* Read x[6] sample */
+        x2 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[3] * y[3] */
+        acc0 += x3 * c0;
+        /* acc1 +=  x[4] * y[3] */
+        acc1 += x0 * c0;
+        /* acc2 +=  x[5] * y[3] */
+        acc2 += x1 * c0;
+        /* acc3 +=  x[6] * y[3] */
+        acc3 += x2 * c0;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *(py++);
+        /* Read x[7] sample */
+        x3 = *(px++);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 += x0 * c0;
+        /* acc1 +=  x[5] * y[4] */
+        acc1 += x1 * c0;
+        /* acc2 +=  x[6] * y[4] */
+        acc2 += x2 * c0;
+        /* acc3 +=  x[7] * y[4] */
+        acc3 += x3 * c0;
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+#endif /* #if defined(ARM_MATH_NEON) */
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = acc0;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = acc1;
+      pOut += inc;
+
+      *pOut = acc2;
+      pOut += inc;
+
+      *pOut = acc3;
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+#else
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+        sum += *px++ * *py++;
+
+        /* Decrement loop counter */
+        k--;
+      }
+#endif /* #if defined(ARM_MATH_NEON) */
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.0f;
+
+      /* Loop over srcBLen */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+#if defined(ARM_MATH_NEON)
+    float32x4_t x,y;
+    float32x4_t res = vdupq_n_f32(0) ;
+    float32x2_t accum = vdup_n_f32(0);
+
+    while (k > 0U)
+    {
+      x = vld1q_f32(px);
+      y = vld1q_f32(py);
+
+      res = vmlaq_f32(res,x, y);
+
+      px += 4;
+      py += 4;
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    accum = vpadd_f32(vget_low_f32(res), vget_high_f32(res));
+    sum += accum[0] + accum[1];
+#else
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+#endif /* #if defined (ARM_MATH_NEON) */
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) || defined(ARM_MATH_NEON) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const float32_t *pIn1 = pSrcA;                       /* inputA pointer */
+  const float32_t *pIn2 = pSrcB + (srcBLen - 1U);      /* inputB pointer */
+        float32_t sum;                                 /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we assume zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using convolution but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+
+  }
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0.0f;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if ((((i - j) < srcBLen) && (j < srcALen)))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)];
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = sum;
+    else
+      *pDst++ = sum;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f64.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f64.c
new file mode 100644
index 00000000..95edd40f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_f64.c
@@ -0,0 +1,365 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_f64.c
+ * Description:  Correlation of floating-point sequences
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of floating-point sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+ */
+
+void arm_correlate_f64(
+  const float64_t * pSrcA,
+        uint32_t srcALen,
+  const float64_t * pSrcB,
+        uint32_t srcBLen,
+        float64_t * pDst)
+{
+  const float64_t *pIn1;                               /* InputA pointer */
+  const float64_t *pIn2;                               /* InputB pointer */
+        float64_t *pOut = pDst;                        /* Output pointer */
+  const float64_t *px;                                 /* Intermediate inputA pointer */
+  const float64_t *py;                                 /* Intermediate inputB pointer */
+  const float64_t *pSrc1;
+        float64_t sum;
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;                         /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we assume zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding has to be done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen-2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.;
+
+    /* Initialize k with number of samples */
+    k = count;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen]   * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.;
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0.;
+
+      /* Loop over srcBLen */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0.;
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
index 31fc6805..0b37b187 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_opt_q15.c
@@ -1,345 +1,345 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_fast_opt_q15.c
- * Description:  Fast Q15 Correlation
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q15 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence.
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This fast version uses a 32-bit accumulator with 2.30 format.
-                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   There is no saturation on intermediate additions.
-                   Thus, if the accumulator overflows it wraps around and distorts the result.
-                   The input signals should be scaled down to avoid intermediate overflows.
-                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
-                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
-                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
-
-  @remark
-                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
- */
-
-void arm_correlate_fast_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch)
-{
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q31_t acc0;                                    /* Accumulators */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q15_t *pScr1 = pScratch;                       /* Temporary pointer for scratch */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
-        int32_t inc = 1;                               /* Destination address modifier */
-        uint32_t tapCnt;                               /* Loop count */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc1, acc2, acc3;                        /* Accumulators */
-        q31_t x1, x2, x3;                              /* Temporary variables for holding input and coefficient values */
-        q31_t y1, y2;                                  /* State variables */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-  }
-
-  pScr1 = pScratch;
-
-  /* Fill (srcBLen - 1U) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1U);
-
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-
-  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (srcALen + srcBLen - 1U) >> 2;
-
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch buffer */
-    x1 = read_q15x2_ia (&pScr1);
-
-    /* Read next two samples from scratch buffer */
-    x2 = read_q15x2_ia (&pScr1);
-
-    tapCnt = (srcBLen) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia ((q15_t **) &pIn2);
-      y2 = read_q15x2_ia ((q15_t **) &pIn2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x2, y2, acc0);
-      acc2 = __SMLAD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-      acc1 = __SMLADX(x3, y2, acc1);
-
-      x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y2, acc3);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3U;
-
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15U, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15U, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15U, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15U, 16));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4U;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (srcALen + srcBLen - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1U;
-
-    while (tapCnt > 0U)
-    {
-
-      /* Read next two samples from scratch buffer */
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while (tapCnt > 0U)
-    {
-
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-     ** Then store the output in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1U;
-  }
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_fast_opt_q15.c
+ * Description:  Fast Q15 Correlation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence.
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+void arm_correlate_fast_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q31_t acc0;                                    /* Accumulators */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1 = pScratch;                       /* Temporary pointer for scratch */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
+        int32_t inc = 1;                               /* Destination address modifier */
+        uint32_t tapCnt;                               /* Loop count */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables for holding input and coefficient values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  pScr1 = pScratch;
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pIn2;
+
+
+  /* Actual correlation process starts here */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumulate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumulate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumulate */
+      acc0 = __SMLAD(x2, y2, acc0);
+      acc2 = __SMLAD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+      acc1 = __SMLADX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the results in the accumulators in the destination buffer. */
+    *pOut = (__SSAT(acc0 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc1 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc2 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc3 >> 15U, 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 4U;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate correlation for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+     ** Then store the output in the destination buffer. */
+    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 1U;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
index 0c0f12a0..7d8857ad 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q15.c
@@ -1,614 +1,614 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_fast_q15.c
- * Description:  Fast Q15 Correlation
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q15 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This fast version uses a 32-bit accumulator with 2.30 format.
-                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   There is no saturation on intermediate additions.
-                   Thus, if the accumulator overflows it wraps around and distorts the result.
-                   The input signals should be scaled down to avoid intermediate overflows.
-                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
-                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
-                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
-
-  @remark
-                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
- */
-
-void arm_correlate_fast_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst)
-{
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-  const q15_t *pSrc1;                                  /* Intermediate pointers */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-        uint32_t outBlockSize;
-        int32_t inc = 1;                               /* Destination address modifier */
-
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
-   * ....
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1U);
-  py = pSrc1;
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-       No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      /* x[0] * y[srcBLen - 1] */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement the loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* --------------------
-   * Stage2 process
-   * -------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = read_q15x2 ((q15_t *) px);
-      /* read x[1], x[2] samples */
-      x1 = read_q15x2 ((q15_t *) px + 1);
-	  px += 2U;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:
-         * y[0] and y[1] */
-        c0 = read_q15x2_ia ((q15_t **) &py);
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLAD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[3], x[4] */
-        x3 = read_q15x2 ((q15_t *) px + 1);
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLAD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLAD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-        c0 = read_q15x2_ia ((q15_t **) &py);
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLAD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLAD(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = read_q15x2 ((q15_t *) px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = read_q15x2 ((q15_t *) px + 3);
-		px += 4U;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLAD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLAD(x1, c0, acc3);
-
-      } while (--k);
-
-      /* For the next MAC operations, SIMD is not used
-       * So, the 16 bit pointer if inputB, py is updated */
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[4] */
-        c0 = *py;
-
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[7] */
-        x3 = read_q15x2 ((q15_t *) px);
-		px++;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD (x0, c0, acc0);
-        acc1 = __SMLAD (x1, c0, acc1);
-        acc2 = __SMLADX(x1, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[4], y[5] */
-        c0 = read_q15x2 ((q15_t *) py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-		px += 2U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-      }
-
-      if (k == 3U)
-      {
-        /* Read y[4], y[5] */
-        c0 = read_q15x2_ia ((q15_t **) &py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLAD(x0, c0, acc0);
-        acc1 = __SMLAD(x1, c0, acc1);
-        acc2 = __SMLAD(x3, c0, acc2);
-        acc3 = __SMLAD(x2, c0, acc3);
-
-        c0 = (*py);
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[10] */
-        x3 = read_q15x2 ((q15_t *) px + 2);
-		px += 3U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLADX(x1, c0, acc0);
-        acc1 = __SMLAD (x2, c0, acc1);
-        acc2 = __SMLADX(x2, c0, acc2);
-        acc3 = __SMLADX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (acc0 >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (acc1 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc2 >> 15);
-      pOut += inc;
-
-      *pOut = (q15_t) (acc3 >> 15);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) *px++ * *py++);
-        sum += ((q31_t) *px++ * *py++);
-        sum += ((q31_t) *px++ * *py++);
-        sum += ((q31_t) *px++ * *py++);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q31_t) * px++ * *py++);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q31_t) *px++ * *py++);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (sum >> 15);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * ....
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
-   * sum +=  x[srcALen-1] * y[0]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulates */
-      sum = __SMLAD(*px++, *py++, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (sum >> 15);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement the MAC count */
-    count--;
-
-    /* Decrement the loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_fast_q15.c
+ * Description:  Fast Q15 Correlation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q15 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen) to avoid overflow since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.30 accumulator is right shifted by 15 bits and then saturated to 1.15 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_q15() for a slower implementation of this function which uses a 64-bit accumulator to avoid wrap around distortion.
+ */
+
+void arm_correlate_fast_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
+
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first loop starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+       No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* x[0] * y[srcBLen - 1] */
+      sum = __SMLAD(*px++, *py++, sum);
+
+      /* Decrement the loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q15_t) (sum >> 15);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is the index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* --------------------
+   * Stage2 process
+   * -------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unroll over blockSize2, by 4 */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = read_q15x2 ((q15_t *) px);
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+	  px += 2U;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read the first two inputB samples using SIMD:
+         * y[0] and y[1] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
+        acc0 = __SMLAD(x0, c0, acc0);
+
+        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
+        acc1 = __SMLAD(x1, c0, acc1);
+
+        /* Read x[2], x[3] */
+        x2 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[3], x[4] */
+        x3 = read_q15x2 ((q15_t *) px + 1);
+
+        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
+        acc2 = __SMLAD(x2, c0, acc2);
+
+        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
+        acc3 = __SMLAD(x3, c0, acc3);
+
+        /* Read y[2] and y[3] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
+        acc0 = __SMLAD(x2, c0, acc0);
+
+        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
+        acc1 = __SMLAD(x3, c0, acc1);
+
+        /* Read x[4], x[5] */
+        x0 = read_q15x2 ((q15_t *) px + 2);
+
+        /* Read x[5], x[6] */
+        x1 = read_q15x2 ((q15_t *) px + 3);
+		px += 4U;
+
+        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
+        acc2 = __SMLAD(x0, c0, acc2);
+
+        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
+        acc3 = __SMLAD(x1, c0, acc3);
+
+      } while (--k);
+
+      /* For the next MAC operations, SIMD is not used
+       * So, the 16 bit pointer if inputB, py is updated */
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      if (k == 1U)
+      {
+        /* Read y[4] */
+        c0 = *py;
+
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[7] */
+        x3 = read_q15x2 ((q15_t *) px);
+		px++;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD (x0, c0, acc0);
+        acc1 = __SMLAD (x1, c0, acc1);
+        acc2 = __SMLADX(x1, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      if (k == 2U)
+      {
+        /* Read y[4], y[5] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+		px += 2U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD(x0, c0, acc0);
+        acc1 = __SMLAD(x1, c0, acc1);
+        acc2 = __SMLAD(x3, c0, acc2);
+        acc3 = __SMLAD(x2, c0, acc3);
+      }
+
+      if (k == 3U)
+      {
+        /* Read y[4], y[5] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLAD(x0, c0, acc0);
+        acc1 = __SMLAD(x1, c0, acc1);
+        acc2 = __SMLAD(x3, c0, acc2);
+        acc3 = __SMLAD(x2, c0, acc3);
+
+        c0 = (*py);
+        /* Read y[6] */
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[10] */
+        x3 = read_q15x2 ((q15_t *) px + 2);
+		px += 3U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLADX(x1, c0, acc0);
+        acc1 = __SMLAD (x2, c0, acc1);
+        acc2 = __SMLADX(x2, c0, acc2);
+        acc3 = __SMLADX(x3, c0, acc3);
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (acc0 >> 15);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = (q15_t) (acc1 >> 15);
+      pOut += inc;
+
+      *pOut = (q15_t) (acc2 >> 15);
+      pOut += inc;
+
+      *pOut = (q15_t) (acc3 >> 15);
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+        sum += ((q31_t) *px++ * *py++);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q31_t) * px++ * *py++);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (sum >> 15);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q31_t) *px++ * *py++);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (sum >> 15);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum = __SMLAD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulates */
+      sum = __SMLAD(*px++, *py++, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q15_t) (sum >> 15);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement the MAC count */
+    count--;
+
+    /* Decrement the loop counter */
+    blockSize3--;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
index 8686c52b..e3d2bbf8 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_fast_q31.c
@@ -1,601 +1,601 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_fast_q31.c
- * Description:  Fast Q31 Correlation
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q31 sequences (fast version).
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
-                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
-                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
-                   Finally, the accumulator is saturated and converted to a 1.31 result.
-  @par
-                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
-                   In order to avoid overflows completely the input signals must be scaled down.
-                   The input signals should be scaled down to avoid intermediate overflows.
-                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
-                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
-
- @remark
-                   Refer to \ref arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
- */
-
-void arm_correlate_fast_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst)
-{
-  const q31_t *pIn1;                                   /* InputA pointer */
-  const q31_t *pIn2;                                   /* InputB pointer */
-        q31_t *pOut = pDst;                            /* Output pointer */
-  const q31_t *px;                                     /* Intermediate inputA pointer */
-  const q31_t *py;                                     /* Intermediate inputB pointer */
-  const q31_t *pSrc1;                                  /* Intermediate pointers */
-        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-        uint32_t outBlockSize;
-        int32_t inc = 1;                               /* Destination address modifier */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-
-  }
-
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
-   * ....
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1U);
-  py = pSrc1;
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* x[1] * y[srcBLen - 3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* x[2] * y[srcBLen - 2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* x[3] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum << 1;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unroll over blockSize2, by 4 */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *py++;
-        /* Read x[3] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[1] * y[0] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[2] * y[0] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[3] * y[0] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-
-        /* Read y[1] sample */
-        c0 = *py++;
-        /* Read x[4] sample */
-        x0 = *px++;
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc1 +=  x[2] * y[1] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc2 +=  x[3] * y[1] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc3 +=  x[4] * y[1] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-
-        /* Read y[2] sample */
-        c0 = *py++;
-        /* Read x[5] sample */
-        x1 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc1 +=  x[3] * y[2] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc2 +=  x[4] * y[2] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc3 +=  x[5] * y[2] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
-
-
-        /* Read y[3] sample */
-        c0 = *py++;
-        /* Read x[6] sample */
-        x2 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[3] * y[3] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
-        /* acc1 +=  x[4] * y[3] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc2 +=  x[5] * y[3] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc3 +=  x[6] * y[3] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
-
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Read y[4] sample */
-        c0 = *py++;
-        /* Read x[7] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-        /* acc3 +=  x[7] * y[4] */
-        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (acc0 << 1);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q31_t) (acc1 << 1);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc2 << 1);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc3 << 1);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 4 */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py++))) >> 32);
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py++))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py++))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum << 1;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum = (q31_t) ((((q63_t) sum << 32) +
-                        ((q63_t) *px++ * (*py++))) >> 32);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = sum << 1;
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * ....
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
-   * sum +=  x[srcALen-1] * y[0]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1U;
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum = (q31_t) ((((q63_t) sum << 32) +
-                      ((q63_t) *px++ * (*py++))) >> 32);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = sum << 1;
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement MAC count */
-    count--;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_fast_q31.c
+ * Description:  Fast Q31 Correlation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q31 sequences (fast version).
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are accumulated in a 32-bit register in 2.30 format.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+
+ @remark
+                   Refer to \ref arm_correlate_q31() for a slower implementation of this function which uses 64-bit accumulation to provide higher precision.
+ */
+
+void arm_correlate_fast_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* x[1] * y[srcBLen - 3] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* x[2] * y[srcBLen - 2] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* x[3] * y[srcBLen - 1] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum << 1;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unroll over blockSize2, by 4 */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *py++;
+        /* Read x[3] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[0] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc1 +=  x[1] * y[0] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc2 +=  x[2] * y[0] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc3 +=  x[3] * y[0] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+
+        /* Read y[1] sample */
+        c0 = *py++;
+        /* Read x[4] sample */
+        x0 = *px++;
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[1] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc1 +=  x[2] * y[1] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc2 +=  x[3] * y[1] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x3 * c0)) >> 32);
+        /* acc3 +=  x[4] * y[1] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+
+        /* Read y[2] sample */
+        c0 = *py++;
+        /* Read x[5] sample */
+        x1 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[2] * y[2] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc1 +=  x[3] * y[2] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x3 * c0)) >> 32);
+        /* acc2 +=  x[4] * y[2] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc3 +=  x[5] * y[2] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x1 * c0)) >> 32);
+
+
+        /* Read y[3] sample */
+        c0 = *py++;
+        /* Read x[6] sample */
+        x2 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[3] * y[3] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x3 * c0)) >> 32);
+        /* acc1 +=  x[4] * y[3] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc2 +=  x[5] * y[3] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc3 +=  x[6] * y[3] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x2 * c0)) >> 32);
+
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *py++;
+        /* Read x[7] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+        /* acc1 +=  x[5] * y[4] */
+        acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+        /* acc2 +=  x[6] * y[4] */
+        acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+        /* acc3 +=  x[7] * y[4] */
+        acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q31_t) (acc0 << 1);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = (q31_t) (acc1 << 1);
+      pOut += inc;
+
+      *pOut = (q31_t) (acc2 << 1);
+      pOut += inc;
+
+      *pOut = (q31_t) (acc3 << 1);
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 4 */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py++))) >> 32);
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py++))) >> 32);
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py++))) >> 32);
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py++))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py++))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum << 1;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum = (q31_t) ((((q63_t) sum << 32) +
+                        ((q63_t) *px++ * (*py++))) >> 32);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = sum << 1;
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = ((pIn1 + srcALen) - srcBLen) + 1U;
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum = (q31_t) ((((q63_t) sum << 32) +
+                      ((q63_t) *px++ * (*py++))) >> 32);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = sum << 1;
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
index ae0ab454..00bb0889 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q15.c
@@ -1,341 +1,341 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_opt_q15.c
- * Description:  Correlation of Q15 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q15 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   This approach provides 33 guard bits and there is no risk of overflow.
-                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
-
- @remark
-                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
- */
-
-void arm_correlate_opt_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst,
-        q15_t * pScratch)
-{
-        q63_t acc0;                                    /* Accumulators */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q15_t *pScr1;                                  /* Temporary pointer for scratch1 */
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
-        int32_t inc = 1;                               /* Output pointer increment */
-        uint32_t tapCnt;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc1, acc2, acc3;                        /* Accumulators */
-        q31_t x1, x2, x3;                              /* Temporary variables for holding input1 and input2 values */
-        q31_t y1, y2;                                  /* State variables */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (srcALen * 2U) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-  }
-
-  pScr1 = pScratch;
-
-  /* Fill (srcBLen - 1U) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  arm_copy_q15(pIn1, pScr1, srcALen);
-
-  /* Update pointers */
-  pScr1 += srcALen;
-
-
-  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Temporary pointer for scratch2 */
-  py = pIn2;
-
-
-  /* Actual correlation process starts here */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (srcALen + srcBLen - 1U) >> 2;
-
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = read_q15x2_ia (&pScr1);
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = read_q15x2_ia (&pScr1);
-
-    tapCnt = (srcBLen) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia ((q15_t **) &pIn2);
-      y2 = read_q15x2_ia ((q15_t **) &pIn2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x1, y1, acc0);
-      acc2 = __SMLALD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLALDX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* multiply and accumlate */
-      acc0 = __SMLALD(x2, y2, acc0);
-      acc2 = __SMLALD(x1, y2, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y1, acc3);
-      acc1 = __SMLALDX(x3, y2, acc1);
-
-      x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLALDX(x3, y2, acc3);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3U;
-
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2);
-      acc1 += (*pScr1++ * *pIn2);
-      acc2 += (*pScr1++ * *pIn2);
-      acc3 += (*pScr1++ * *pIn2++);
-
-      pScr1 -= 3U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-
-    /* Store the results in the accumulators in the destination buffer. */
-    *pOut = (__SSAT(acc0 >> 15U, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc1 >> 15U, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc2 >> 15U, 16));
-    pOut += inc;
-    *pOut = (__SSAT(acc3 >> 15U, 16));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 4U;
-  }
-
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (srcALen + srcBLen - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1U;
-
-    while (tapCnt > 0U)
-    {
-
-      /* Read next two samples from scratch1 buffer */
-      acc0 += (*pScr1++ * *pIn2++);
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pIn2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
-       Then store the output in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pIn2 = py;
-
-    pScratch += 1U;
-  }
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_opt_q15.c
+ * Description:  Correlation of Q15 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch   points to scratch buffer of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+ @remark
+                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+ */
+
+void arm_correlate_opt_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst,
+        q15_t * pScratch)
+{
+        q63_t acc0;                                    /* Accumulators */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q15_t *pScr1;                                  /* Temporary pointer for scratch1 */
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+        uint32_t j, blkCnt, outBlockSize;              /* Loop counter */
+        int32_t inc = 1;                               /* Output pointer increment */
+        uint32_t tapCnt;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x1, x2, x3;                              /* Temporary variables for holding input1 and input2 values */
+        q31_t y1, y2;                                  /* State variables */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (srcALen * 2U) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  pScr1 = pScratch;
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy (srcALen) samples in scratch buffer */
+  arm_copy_q15(pIn1, pScr1, srcALen);
+
+  /* Update pointers */
+  pScr1 += srcALen;
+
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pIn2;
+
+
+  /* Actual correlation process starts here */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia ((q15_t **) &pIn2);
+      y2 = read_q15x2_ia ((q15_t **) &pIn2);
+
+      /* multiply and accumulate */
+      acc0 = __SMLALD(x1, y1, acc0);
+      acc2 = __SMLALD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumulate */
+      acc1 = __SMLALDX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* multiply and accumulate */
+      acc0 = __SMLALD(x2, y2, acc0);
+      acc2 = __SMLALD(x1, y2, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y1, acc3);
+      acc1 = __SMLALDX(x3, y2, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLALDX(x3, y2, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2);
+      acc1 += (*pScr1++ * *pIn2);
+      acc2 += (*pScr1++ * *pIn2);
+      acc3 += (*pScr1++ * *pIn2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+
+    /* Store the results in the accumulators in the destination buffer. */
+    *pOut = (__SSAT(acc0 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc1 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc2 >> 15U, 16));
+    pOut += inc;
+    *pOut = (__SSAT(acc3 >> 15U, 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 4U;
+  }
+
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (srcALen + srcBLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Calculate correlation for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+
+      /* Read next two samples from scratch1 buffer */
+      acc0 += (*pScr1++ * *pIn2++);
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pIn2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* The result is in 2.30 format.  Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pOut = (q15_t) (__SSAT((acc0 >> 15), 16));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pIn2 = py;
+
+    pScratch += 1U;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
index 10c6e709..145ba2ae 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_opt_q7.c
@@ -1,388 +1,388 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_opt_q7.c
- * Description:  Correlation of Q7 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q7 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
-  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
-                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
-                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
-                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
- */
-
-void arm_correlate_opt_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst,
-        q15_t * pScratch1,
-        q15_t * pScratch2)
-{
-        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
-        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
-        q15_t x4;                                      /* Temporary input variable */
-        q15_t *py;                                     /* Temporary input2 pointer */
-        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
-        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
-        int32_t inc = 1;                               /* Output pointer increment */
-        uint32_t outBlockSize;                         /* Loop counter */
-        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
-        q7_t *pOut = pDst;                             /* Output pointer */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (srcALen * 2U) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-  }
-
-
-  /* Copy (srcBLen) samples in scratch buffer */
-  k = srcBLen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-     a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) *pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) *pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) *pIn2++;
-    *pScr2++ = x4;
-    x4 = (q15_t) *pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-     No loop unrolling is used. */
-  k = srcBLen % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) *pIn2++;
-    *pScr2++ = x4;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* Fill (srcBLen - 1U) zeros in scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update temporary scratch pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Copy (srcALen) samples in scratch buffer */
-  /* Apply loop unrolling and do 4 Copies simultaneously. */
-  k = srcALen >> 2U;
-
-  /* First part of the processing with loop unrolling copies 4 data points at a time.
-     a second loop below copies for the remaining 1 to 3 samples. */
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner */
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-    x4 = (q15_t) *pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement loop counter */
-    k--;
-  }
-
-  /* If the count is not a multiple of 4, copy remaining samples here.
-     No loop unrolling is used. */
-  k = srcALen % 0x4U;
-
-  while (k > 0U)
-  {
-    /* copy second buffer in reversal manner for remaining samples */
-    x4 = (q15_t) * pIn1++;
-    *pScr1++ = x4;
-
-    /* Decrement the loop counter */
-    k--;
-  }
-
-  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
-  arm_fill_q15(0, pScr1, (srcBLen - 1U));
-
-  /* Update pointer */
-  pScr1 += (srcBLen - 1U);
-
-  /* Temporary pointer for scratch2 */
-  py = pScratch2;
-
-  /* Initialization of pScr2 pointer */
-  pScr2 = pScratch2;
-
-  /* Actual correlation process starts here */
-  blkCnt = (srcALen + srcBLen - 1U) >> 2;
-
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Read two samples from scratch1 buffer */
-    x1 = read_q15x2_ia (&pScr1);
-
-    /* Read next two samples from scratch1 buffer */
-    x2 = read_q15x2_ia (&pScr1);
-
-    tapCnt = (srcBLen) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia (&pScr2);
-
-      /* multiply and accumlate */
-      acc0 = __SMLAD(x1, y1, acc0);
-      acc2 = __SMLAD(x2, y1, acc2);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      /* multiply and accumlate */
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      /* Read next two samples from scratch1 buffer */
-      x1 = read_q15x2_ia (&pScr1);
-
-      /* pack input data */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x1, x2, 0);
-#else
-      x3 = __PKHBT(x2, x1, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Read four samples from smaller buffer */
-      y1 = read_q15x2_ia (&pScr2);
-
-      acc0 = __SMLAD(x2, y1, acc0);
-
-      acc2 = __SMLAD(x1, y1, acc2);
-
-      acc1 = __SMLADX(x3, y1, acc1);
-
-      x2 = read_q15x2_ia (&pScr1);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      x3 = __PKHBT(x2, x1, 0);
-#else
-      x3 = __PKHBT(x1, x2, 0);
-#endif
-
-      acc3 = __SMLADX(x3, y1, acc3);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Update scratch pointer for remaining samples of smaller length sequence */
-    pScr1 -= 4U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    tapCnt = (srcBLen) & 3U;
-
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2);
-      acc1 += (*pScr1++ * *pScr2);
-      acc2 += (*pScr1++ * *pScr2);
-      acc3 += (*pScr1++ * *pScr2++);
-
-      pScr1 -= 3U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc1 >> 7U, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc2 >> 7U, 8));
-    pOut += inc;
-    *pOut = (q7_t) (__SSAT(acc3 >> 7U, 8));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 4U;
-  }
-
-  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
-
-  /* Calculate correlation for remaining samples of Bigger length sequence */
-  while (blkCnt > 0)
-  {
-    /* Initialze temporary scratch pointer as scratch1 */
-    pScr1 = pScratch1;
-
-    /* Clear Accumlators */
-    acc0 = 0;
-
-    tapCnt = (srcBLen) >> 1U;
-
-    while (tapCnt > 0U)
-    {
-      acc0 += (*pScr1++ * *pScr2++);
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    tapCnt = (srcBLen) & 1U;
-
-    /* apply same above for remaining samples of smaller length sequence */
-    while (tapCnt > 0U)
-    {
-      /* accumlate the results */
-      acc0 += (*pScr1++ * *pScr2++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    blkCnt--;
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
-    pOut += inc;
-
-    /* Initialization of inputB pointer */
-    pScr2 = py;
-
-    pScratch1 += 1U;
-  }
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_opt_q7.c
+ * Description:  Correlation of Q7 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @param[in]     pScratch1  points to scratch buffer(of type q15_t) of size max(srcALen, srcBLen) + 2*min(srcALen, srcBLen) - 2.
+  @param[in]     pScratch2  points to scratch buffer (of type q15_t) of size min(srcALen, srcBLen).
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and then saturated to 1.7 format.
+ */
+
+void arm_correlate_opt_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst,
+        q15_t * pScratch1,
+        q15_t * pScratch2)
+{
+        q15_t *pScr1 = pScratch1;                      /* Temporary pointer for scratch */
+        q15_t *pScr2 = pScratch2;                      /* Temporary pointer for scratch */
+        q15_t x4;                                      /* Temporary input variable */
+        q15_t *py;                                     /* Temporary input2 pointer */
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+  const q7_t *pIn1, *pIn2;                             /* InputA and inputB pointer */
+        uint32_t j, k, blkCnt, tapCnt;                 /* Loop counter */
+        int32_t inc = 1;                               /* Output pointer increment */
+        uint32_t outBlockSize;                         /* Loop counter */
+        q31_t x1, x2, x3, y1;                          /* Temporary input variables */
+        q7_t *pOut = pDst;                             /* Output pointer */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (srcALen * 2U) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+
+  /* Copy (srcBLen) samples in scratch buffer */
+  k = srcBLen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+     a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+     No loop unrolling is used. */
+  k = srcBLen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) *pIn2++;
+    *pScr2++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros in scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update temporary scratch pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Copy (srcALen) samples in scratch buffer */
+  /* Apply loop unrolling and do 4 Copies simultaneously. */
+  k = srcALen >> 2U;
+
+  /* First part of the processing with loop unrolling copies 4 data points at a time.
+     a second loop below copies for the remaining 1 to 3 samples. */
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner */
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+    x4 = (q15_t) *pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement loop counter */
+    k--;
+  }
+
+  /* If the count is not a multiple of 4, copy remaining samples here.
+     No loop unrolling is used. */
+  k = srcALen % 0x4U;
+
+  while (k > 0U)
+  {
+    /* copy second buffer in reversal manner for remaining samples */
+    x4 = (q15_t) * pIn1++;
+    *pScr1++ = x4;
+
+    /* Decrement the loop counter */
+    k--;
+  }
+
+  /* Fill (srcBLen - 1U) zeros at end of scratch buffer */
+  arm_fill_q15(0, pScr1, (srcBLen - 1U));
+
+  /* Update pointer */
+  pScr1 += (srcBLen - 1U);
+
+  /* Temporary pointer for scratch2 */
+  py = pScratch2;
+
+  /* Initialization of pScr2 pointer */
+  pScr2 = pScratch2;
+
+  /* Actual correlation process starts here */
+  blkCnt = (srcALen + srcBLen - 1U) >> 2;
+
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Read two samples from scratch1 buffer */
+    x1 = read_q15x2_ia (&pScr1);
+
+    /* Read next two samples from scratch1 buffer */
+    x2 = read_q15x2_ia (&pScr1);
+
+    tapCnt = (srcBLen) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      /* multiply and accumulate */
+      acc0 = __SMLAD(x1, y1, acc0);
+      acc2 = __SMLAD(x2, y1, acc2);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      /* multiply and accumulate */
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      /* Read next two samples from scratch1 buffer */
+      x1 = read_q15x2_ia (&pScr1);
+
+      /* pack input data */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x1, x2, 0);
+#else
+      x3 = __PKHBT(x2, x1, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Read four samples from smaller buffer */
+      y1 = read_q15x2_ia (&pScr2);
+
+      acc0 = __SMLAD(x2, y1, acc0);
+
+      acc2 = __SMLAD(x1, y1, acc2);
+
+      acc1 = __SMLADX(x3, y1, acc1);
+
+      x2 = read_q15x2_ia (&pScr1);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      x3 = __PKHBT(x2, x1, 0);
+#else
+      x3 = __PKHBT(x1, x2, 0);
+#endif
+
+      acc3 = __SMLADX(x3, y1, acc3);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Update scratch pointer for remaining samples of smaller length sequence */
+    pScr1 -= 4U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    tapCnt = (srcBLen) & 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pScr2);
+      acc1 += (*pScr1++ * *pScr2);
+      acc2 += (*pScr1++ * *pScr2);
+      acc3 += (*pScr1++ * *pScr2++);
+
+      pScr1 -= 3U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
+    pOut += inc;
+    *pOut = (q7_t) (__SSAT(acc1 >> 7U, 8));
+    pOut += inc;
+    *pOut = (q7_t) (__SSAT(acc2 >> 7U, 8));
+    pOut += inc;
+    *pOut = (q7_t) (__SSAT(acc3 >> 7U, 8));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 4U;
+  }
+
+  blkCnt = (srcALen + srcBLen - 1U) & 0x3;
+
+  /* Calculate correlation for remaining samples of Bigger length sequence */
+  while (blkCnt > 0)
+  {
+    /* Initialze temporary scratch pointer as scratch1 */
+    pScr1 = pScratch1;
+
+    /* Clear Accumlators */
+    acc0 = 0;
+
+    tapCnt = (srcBLen) >> 1U;
+
+    while (tapCnt > 0U)
+    {
+      acc0 += (*pScr1++ * *pScr2++);
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    tapCnt = (srcBLen) & 1U;
+
+    /* apply same above for remaining samples of smaller length sequence */
+    while (tapCnt > 0U)
+    {
+      /* accumulate the results */
+      acc0 += (*pScr1++ * *pScr2++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    blkCnt--;
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q7_t) (__SSAT(acc0 >> 7U, 8));
+    pOut += inc;
+
+    /* Initialization of inputB pointer */
+    pScr2 = py;
+
+    pScratch1 += 1U;
+  }
+
+}
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
index c8474959..2dd16d72 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q15.c
@@ -1,696 +1,903 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_q15.c
- * Description:  Correlation of Q15 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q15 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   This approach provides 33 guard bits and there is no risk of overflow.
-                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
-
-  @remark
-                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
-  @remark
-                   Refer to \ref arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
- */
-
-void arm_correlate_q15(
-  const q15_t * pSrcA,
-        uint32_t srcALen,
-  const q15_t * pSrcB,
-        uint32_t srcBLen,
-        q15_t * pDst)
-{
-
-#if defined (ARM_MATH_DSP)
-
-  const q15_t *pIn1;                                   /* InputA pointer */
-  const q15_t *pIn2;                                   /* InputB pointer */
-        q15_t *pOut = pDst;                            /* Output pointer */
-        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
-  const q15_t *px;                                     /* Intermediate inputA pointer */
-  const q15_t *py;                                     /* Intermediate inputB pointer */
-  const q15_t *pSrc1;                                  /* Intermediate pointers */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables for holding input and coefficient values */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-        uint32_t outBlockSize;
-        int32_t inc = 1;                               /* Destination address modifier */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (srcALen * 2U) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-  }
-
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
-   * ....
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1U);
-  py = pSrc1;
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first loop starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
-      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
-      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum = __SMLALD(*px++, *py++, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is the index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = read_q15x2 ((q15_t *) px);
-
-      /* read x[1], x[2] samples */
-      x1 = read_q15x2 ((q15_t *) px + 1);
-      px += 2U;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read the first two inputB samples using SIMD:
-         * y[0] and y[1] */
-        c0 = read_q15x2_ia ((q15_t **) &py);
-
-        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
-        acc0 = __SMLALD(x0, c0, acc0);
-
-        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLALD(x1, c0, acc1);
-
-        /* Read x[2], x[3] */
-        x2 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[3], x[4] */
-        x3 = read_q15x2 ((q15_t *) px + 1);
-
-        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
-        acc2 = __SMLALD(x2, c0, acc2);
-
-        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
-        acc3 = __SMLALD(x3, c0, acc3);
-
-        /* Read y[2] and y[3] */
-        c0 = read_q15x2_ia ((q15_t **) &py);
-
-        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
-        acc0 = __SMLALD(x2, c0, acc0);
-
-        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
-        acc1 = __SMLALD(x3, c0, acc1);
-
-        /* Read x[4], x[5] */
-        x0 = read_q15x2 ((q15_t *) px + 2);
-
-        /* Read x[5], x[6] */
-        x1 = read_q15x2 ((q15_t *) px + 3);
-        px += 4U;
-
-        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
-        acc2 = __SMLALD(x0, c0, acc2);
-
-        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
-        acc3 = __SMLALD(x1, c0, acc3);
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      if (k == 1U)
-      {
-        /* Read y[4] */
-        c0 = *py;
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[7] */
-        x3 = read_q15x2 ((q15_t *) px);
-        px++;
-
-        /* Perform the multiply-accumulate */
-        acc0 = __SMLALD (x0, c0, acc0);
-        acc1 = __SMLALD (x1, c0, acc1);
-        acc2 = __SMLALDX(x1, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      if (k == 2U)
-      {
-        /* Read y[4], y[5] */
-        c0 = read_q15x2 ((q15_t *) py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-        px += 2U;
-
-        /* Perform the multiply-accumulate */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALD(x3, c0, acc2);
-        acc3 = __SMLALD(x2, c0, acc3);
-      }
-
-      if (k == 3U)
-      {
-        /* Read y[4], y[5] */
-        c0 = read_q15x2_ia ((q15_t **) &py);
-
-        /* Read x[7], x[8] */
-        x3 = read_q15x2 ((q15_t *) px);
-
-        /* Read x[9] */
-        x2 = read_q15x2 ((q15_t *) px + 1);
-
-        /* Perform the multiply-accumulate */
-        acc0 = __SMLALD(x0, c0, acc0);
-        acc1 = __SMLALD(x1, c0, acc1);
-        acc2 = __SMLALD(x3, c0, acc2);
-        acc3 = __SMLALD(x2, c0, acc3);
-
-        c0 = (*py);
-
-        /* Read y[6] */
-#ifdef  ARM_MATH_BIG_ENDIAN
-        c0 = c0 << 16U;
-#else
-        c0 = c0 & 0x0000FFFF;
-#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
-
-        /* Read x[10] */
-        x3 = read_q15x2 ((q15_t *) px + 2);
-        px += 3U;
-
-        /* Perform the multiply-accumulates */
-        acc0 = __SMLALDX(x1, c0, acc0);
-        acc1 = __SMLALD (x2, c0, acc1);
-        acc2 = __SMLALDX(x2, c0, acc2);
-        acc3 = __SMLALDX(x3, c0, acc3);
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(acc0 >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc1 >> 15, 16));
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc2 >> 15, 16));
-      pOut += inc;
-
-      *pOut = (q15_t) (__SSAT(acc3 >> 15, 16));
-      pOut += inc;
-
-      /* Increment the count by 4 as 4 output values are computed */
-      count += 4U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = blockSize2 % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q63_t) *px++ * *py++);
-        sum += ((q63_t) *px++ * *py++);
-        sum += ((q63_t) *px++ * *py++);
-        sum += ((q63_t) *px++ * *py++);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += ((q63_t) *px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment count by 1, as one output value is computed */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q63_t) *px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * ....
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
-   * sum +=  x[srcALen-1] * y[0]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-    /* Apply loop unrolling and compute 4 MACs simultaneously. */
-    k = count >> 2U;
-
-    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* If the count is not a multiple of 4, compute any remaining MACs here.
-     ** No loop unrolling is used. */
-    k = count % 0x4U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum = __SMLALD(*px++, *py++, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement MAC count */
-    count--;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
-  const q15_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
-        q63_t sum;                                     /* Accumulators */
-        uint32_t i = 0U, j;                            /* Loop counters */
-        uint32_t inv = 0U;                             /* Reverse order flag */
-        uint32_t tot = 0U;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two
-   * inputs of same length. But to improve the performance, we include zeroes
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2U);
-
-  if (srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if (srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1U);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-  }
-
-  /* Loop to calculate convolution for output length number of values */
-  for (i = 0U; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry on MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if (((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    if (inv == 1)
-      *pDst-- = (q15_t) __SSAT((sum >> 15U), 16U);
-    else
-      *pDst++ = (q15_t) __SSAT((sum >> 15U), 16U);
-  }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_q15.c
+ * Description:  Correlation of Q15 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q15 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both inputs are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+
+  @remark
+                   Refer to \ref arm_correlate_fast_q15() for a faster but less precise version of this function.
+  @remark
+                   Refer to \ref arm_correlate_opt_q15() for a faster implementation of this function using scratch buffers.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+
+void arm_correlate_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+    const q15_t    *pIn1 = pSrcA;     /* inputA pointer               */
+    const q15_t    *pIn2 = pSrcB + (srcBLen - 1U);    /* inputB pointer               */
+    /*
+     * Loop to perform MAC operations according to correlation equation
+     */
+    const q15_t    *pX;
+    const q15_t    *pY;
+    const q15_t    *pA;
+    const q15_t    *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   inv = 2U;         /* Reverse order flag */
+    uint32_t  tot = 0U;         /* Length */
+    int32_t   block1, block2, block3;
+    int32_t   incr;
+
+    tot = ((srcALen + srcBLen) - 2U);
+    if (srcALen > srcBLen)
+    {
+        /*
+         * Calculating the number of zeros to be padded to the output
+         */
+        j = srcALen - srcBLen;
+        /*
+         * Initialize the pointer after zero padding
+         */
+        pDst += j;
+    }
+    else if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA + (srcALen - 1U);
+        /*
+         * Initialisation of the pointer after zero padding
+         */
+        pDst = pDst + tot;
+        /*
+         * Swapping the lengths
+         */
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+        /*
+         * Setting the reverse flag
+         */
+        inv = -2;
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2;
+    incr = inv / 2;
+
+    for (i = 0U; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        /*
+         * compute 2 accumulators per loop
+         * size is incrementing for second accumulator
+         * Y pointer is decrementing for second accumulator
+         */
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q15(acc0, acc1, pX, pY, count);
+
+        *pDst = (q15_t) acc0;
+        pDst += incr;
+        *pDst = (q15_t) acc1;
+        pDst += incr;
+        pB -= 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count);
+
+        *pDst = (q15_t) acc;
+        pDst += incr;
+        pB--;
+    }
+
+    for (i = 0U; i <= block2 - 4; i += 4)
+    {
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+        int64_t   acc2 = 0LL;
+        int64_t   acc3 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q15(acc0, acc1, acc2, acc3, pX, pY, srcBLen);
+
+        *pDst = (q15_t) acc0;
+        pDst += incr;
+        *pDst = (q15_t) acc1;
+        pDst += incr;
+        *pDst = (q15_t) acc2;
+        pDst += incr;
+        *pDst = (q15_t) acc3;
+        pDst += incr;
+        pA += 4;
+    }
+
+    for (; i <= block2 - 2; i += 2)
+    {
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q15(acc0, acc1, pX, pY, srcBLen);
+
+        *pDst = (q15_t) acc0;
+        pDst += incr;
+        *pDst = (q15_t) acc1;
+        pDst += incr;
+        pA += 2;
+    }
+
+    if (block2 & 1)
+    {
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, srcBLen);
+
+        *pDst = (q15_t) acc;
+        pDst += incr;
+        pA++;
+    }
+
+    for (i = block3 - 1; i >= 0; i -= 2)
+    {
+
+        uint32_t  count = (i + 1);
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is decrementing for second accumulator
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q15(acc0, acc1, pX, pY, count);
+
+        *pDst = (q15_t) acc0;
+        pDst += incr;
+        *pDst = (q15_t) acc1;
+        pDst += incr;
+        pA += 2;
+
+    }
+    for (; i >= 0; i--)
+    {
+        uint32_t  count = (i + 1);
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q15(acc, pX, pY, count);
+
+        *pDst = (q15_t) acc;
+        pDst += incr;
+        pA++;
+    }
+}
+
+#else
+void arm_correlate_q15(
+  const q15_t * pSrcA,
+        uint32_t srcALen,
+  const q15_t * pSrcB,
+        uint32_t srcBLen,
+        q15_t * pDst)
+{
+
+#if defined (ARM_MATH_DSP)
+
+  const q15_t *pIn1;                                   /* InputA pointer */
+  const q15_t *pIn2;                                   /* InputB pointer */
+        q15_t *pOut = pDst;                            /* Output pointer */
+        q63_t sum, acc0, acc1, acc2, acc3;             /* Accumulators */
+  const q15_t *px;                                     /* Intermediate inputA pointer */
+  const q15_t *py;                                     /* Intermediate inputB pointer */
+  const q15_t *pSrc1;                                  /* Intermediate pointers */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary input variables for holding input and coefficient values */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (srcALen * 2U) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first loop starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 4] , x[1] * y[srcBLen - 3] */
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+      /* x[3] * y[srcBLen - 1] , x[2] * y[srcBLen - 2] */
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum = __SMLALD(*px++, *py++, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is the index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = read_q15x2 ((q15_t *) px);
+
+      /* read x[1], x[2] samples */
+      x1 = read_q15x2 ((q15_t *) px + 1);
+      px += 2U;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read the first two inputB samples using SIMD:
+         * y[0] and y[1] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* acc0 +=  x[0] * y[0] + x[1] * y[1] */
+        acc0 = __SMLALD(x0, c0, acc0);
+
+        /* acc1 +=  x[1] * y[0] + x[2] * y[1] */
+        acc1 = __SMLALD(x1, c0, acc1);
+
+        /* Read x[2], x[3] */
+        x2 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[3], x[4] */
+        x3 = read_q15x2 ((q15_t *) px + 1);
+
+        /* acc2 +=  x[2] * y[0] + x[3] * y[1] */
+        acc2 = __SMLALD(x2, c0, acc2);
+
+        /* acc3 +=  x[3] * y[0] + x[4] * y[1] */
+        acc3 = __SMLALD(x3, c0, acc3);
+
+        /* Read y[2] and y[3] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* acc0 +=  x[2] * y[2] + x[3] * y[3] */
+        acc0 = __SMLALD(x2, c0, acc0);
+
+        /* acc1 +=  x[3] * y[2] + x[4] * y[3] */
+        acc1 = __SMLALD(x3, c0, acc1);
+
+        /* Read x[4], x[5] */
+        x0 = read_q15x2 ((q15_t *) px + 2);
+
+        /* Read x[5], x[6] */
+        x1 = read_q15x2 ((q15_t *) px + 3);
+        px += 4U;
+
+        /* acc2 +=  x[4] * y[2] + x[5] * y[3] */
+        acc2 = __SMLALD(x0, c0, acc2);
+
+        /* acc3 +=  x[5] * y[2] + x[6] * y[3] */
+        acc3 = __SMLALD(x1, c0, acc3);
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      if (k == 1U)
+      {
+        /* Read y[4] */
+        c0 = *py;
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[7] */
+        x3 = read_q15x2 ((q15_t *) px);
+        px++;
+
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALD (x0, c0, acc0);
+        acc1 = __SMLALD (x1, c0, acc1);
+        acc2 = __SMLALDX(x1, c0, acc2);
+        acc3 = __SMLALDX(x3, c0, acc3);
+      }
+
+      if (k == 2U)
+      {
+        /* Read y[4], y[5] */
+        c0 = read_q15x2 ((q15_t *) py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+        px += 2U;
+
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALD(x0, c0, acc0);
+        acc1 = __SMLALD(x1, c0, acc1);
+        acc2 = __SMLALD(x3, c0, acc2);
+        acc3 = __SMLALD(x2, c0, acc3);
+      }
+
+      if (k == 3U)
+      {
+        /* Read y[4], y[5] */
+        c0 = read_q15x2_ia ((q15_t **) &py);
+
+        /* Read x[7], x[8] */
+        x3 = read_q15x2 ((q15_t *) px);
+
+        /* Read x[9] */
+        x2 = read_q15x2 ((q15_t *) px + 1);
+
+        /* Perform the multiply-accumulate */
+        acc0 = __SMLALD(x0, c0, acc0);
+        acc1 = __SMLALD(x1, c0, acc1);
+        acc2 = __SMLALD(x3, c0, acc2);
+        acc3 = __SMLALD(x2, c0, acc3);
+
+        c0 = (*py);
+
+        /* Read y[6] */
+#ifdef  ARM_MATH_BIG_ENDIAN
+        c0 = c0 << 16U;
+#else
+        c0 = c0 & 0x0000FFFF;
+#endif /* #ifdef  ARM_MATH_BIG_ENDIAN */
+
+        /* Read x[10] */
+        x3 = read_q15x2 ((q15_t *) px + 2);
+        px += 3U;
+
+        /* Perform the multiply-accumulates */
+        acc0 = __SMLALDX(x1, c0, acc0);
+        acc1 = __SMLALD (x2, c0, acc1);
+        acc2 = __SMLALDX(x2, c0, acc2);
+        acc3 = __SMLALDX(x3, c0, acc3);
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (__SSAT(acc0 >> 15, 16));
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = (q15_t) (__SSAT(acc1 >> 15, 16));
+      pOut += inc;
+
+      *pOut = (q15_t) (__SSAT(acc2 >> 15, 16));
+      pOut += inc;
+
+      *pOut = (q15_t) (__SSAT(acc3 >> 15, 16));
+      pOut += inc;
+
+      /* Increment the count by 4 as 4 output values are computed */
+      count += 4U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* If the blockSize2 is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = blockSize2 % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+        sum += ((q63_t) *px++ * *py++);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += ((q63_t) *px++ * *py++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment count by 1, as one output value is computed */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q63_t) *px++ * *py++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q15_t) (__SSAT(sum >> 15, 16));
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = (pIn1 + srcALen) - (srcBLen - 1U);
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+    /* Apply loop unrolling and compute 4 MACs simultaneously. */
+    k = count >> 2U;
+
+    /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+     ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] , sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+      /* sum += x[srcALen - srcBLen + 2] * y[1] , sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum = __SMLALD(read_q15x2_ia ((q15_t **) &px), read_q15x2_ia ((q15_t **) &py), sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* If the count is not a multiple of 4, compute any remaining MACs here.
+     ** No loop unrolling is used. */
+    k = count % 0x4U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum = __SMLALD(*px++, *py++, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q15_t) (__SSAT((sum >> 15), 16));
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  const q15_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q15_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we include zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using convolution but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+  }
+
+  /* Loop to calculate convolution for output length number of values */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry on MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q31_t) pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = (q15_t) __SSAT((sum >> 15U), 16U);
+    else
+      *pDst++ = (q15_t) __SSAT((sum >> 15U), 16U);
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
index 60c1b703..a5f15fec 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q31.c
@@ -1,682 +1,879 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_q31.c
- * Description:  Correlation of Q31 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q31 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   There is no saturation on intermediate additions.
-                   Thus, if the accumulator overflows it wraps around and distorts the result.
-                   The input signals should be scaled down to avoid intermediate overflows.
-                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
-                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
-                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
-
-  @remark
-                   Refer to \ref arm_correlate_fast_q31() for a faster but less precise implementation of this function.
- */
-
-void arm_correlate_q31(
-  const q31_t * pSrcA,
-        uint32_t srcALen,
-  const q31_t * pSrcB,
-        uint32_t srcBLen,
-        q31_t * pDst)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const q31_t *pIn1;                                   /* InputA pointer */
-  const q31_t *pIn2;                                   /* InputB pointer */
-        q31_t *pOut = pDst;                            /* Output pointer */
-  const q31_t *px;                                     /* Intermediate inputA pointer */
-  const q31_t *py;                                     /* Intermediate inputB pointer */
-  const q31_t *pSrc1;                                  /* Intermediate pointers */
-        q63_t sum;                                     /* Accumulators */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-        uint32_t outBlockSize;
-        int32_t inc = 1;                               /* Destination address modifier */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc0, acc1, acc2;                        /* Accumulators */
-        q31_t x0, x1, x2, c0;                          /* Temporary variables for holding input and coefficient values */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-  }
-
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
-   * ....
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1U);
-  py = pSrc1;
-
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-    while (k > 0U)
-    {
-      /* x[0] * y[srcBLen - 4] */
-      sum += (q63_t) *px++ * (*py++);
-
-      /* x[1] * y[srcBLen - 3] */
-      sum += (q63_t) *px++ * (*py++);
-
-      /* x[2] * y[srcBLen - 2] */
-      sum += (q63_t) *px++ * (*py++);
-
-      /* x[3] * y[srcBLen - 1] */
-      sum += (q63_t) *px++ * (*py++);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#else
-
-    /* Initialize k with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q63_t) *px++ * (*py++);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unroll by 3 */
-    blkCnt = blockSize2 / 3;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-
-      /* read x[0], x[1] samples */
-      x0 = *px++;
-      x1 = *px++;
-
-      /* Apply loop unrolling and compute 3 MACs simultaneously. */
-      k = srcBLen / 3;
-
-      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *(py);
-        /* Read x[2] sample */
-        x2 = *(px);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[0] * y[0] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[1] * y[0] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[2] * y[0] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Read y[1] sample */
-        c0 = *(py + 1U);
-        /* Read x[3] sample */
-        x0 = *(px + 1U);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[1] * y[1] */
-        acc0 += ((q63_t) x1 * c0);
-        /* acc1 +=  x[2] * y[1] */
-        acc1 += ((q63_t) x2 * c0);
-        /* acc2 +=  x[3] * y[1] */
-        acc2 += ((q63_t) x0 * c0);
-
-        /* Read y[2] sample */
-        c0 = *(py + 2U);
-        /* Read x[4] sample */
-        x1 = *(px + 2U);
-
-        /* Perform the multiply-accumulate */
-        /* acc0 +=  x[2] * y[2] */
-        acc0 += ((q63_t) x2 * c0);
-        /* acc1 +=  x[3] * y[2] */
-        acc1 += ((q63_t) x0 * c0);
-        /* acc2 +=  x[4] * y[2] */
-        acc2 += ((q63_t) x1 * c0);
-
-        /* update scratch pointers */
-        px += 3U;
-        py += 3U;
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen - (3 * (srcBLen / 3));
-
-      while (k > 0U)
-      {
-        /* Read y[4] sample */
-        c0 = *(py++);
-
-        /* Read x[7] sample */
-        x2 = *(px++);
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += ((q63_t) x0 * c0);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += ((q63_t) x1 * c0);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += ((q63_t) x2 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (acc0 >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q31_t) (acc1 >> 31);
-      pOut += inc;
-
-      *pOut = (q31_t) (acc2 >> 31);
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 3 */
-      count += 3U;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-      k = srcBLen >> 2U;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulates */
-        sum += (q63_t) *px++ * *py++;
-        sum += (q63_t) *px++ * *py++;
-        sum += (q63_t) *px++ * *py++;
-        sum += (q63_t) *px++ * *py++;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = srcBLen % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += (q63_t) *px++ * *py++;
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q31_t) (sum >> 31);
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * ....
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
-   * sum +=  x[srcALen-1] * y[0]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum += (q63_t) *px++ * *py++;
-
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      sum += (q63_t) *px++ * *py++;
-
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum += (q63_t) *px++ * *py++;
-
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      sum += (q63_t) *px++ * *py++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (q63_t) *px++ * *py++;
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q31_t) (sum >> 31);
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement MAC count */
-    count--;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
-  const q31_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
-        q63_t sum;                                     /* Accumulators */
-        uint32_t i = 0U, j;                            /* Loop counters */
-        uint32_t inv = 0U;                             /* Reverse order flag */
-        uint32_t tot = 0U;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two
-   * inputs of same length. But to improve the performance, we include zeroes
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted
-   * using correlation but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2U);
-
-  if (srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if (srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1U);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-  }
-
-  /* Loop to calculate correlation for output length number of times */
-  for (i = 0U; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to correlation equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if (((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    if (inv == 1)
-      *pDst-- = (q31_t) (sum >> 31U);
-    else
-      *pDst++ = (q31_t) (sum >> 31U);
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_q31.c
+ * Description:  Correlation of Q31 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q31 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   Thus, if the accumulator overflows it wraps around and distorts the result.
+                   The input signals should be scaled down to avoid intermediate overflows.
+                   Scale down one of the inputs by 1/min(srcALen, srcBLen)to avoid overflows since a
+                   maximum of min(srcALen, srcBLen) number of additions is carried internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+  @remark
+                   Refer to \ref arm_correlate_fast_q31() for a faster but less precise implementation of this function.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+#include "arm_vec_filtering.h"
+void arm_correlate_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+    const q31_t    *pIn1 = pSrcA;     /* inputA pointer               */
+    const q31_t    *pIn2 = pSrcB + (srcBLen - 1U);    /* inputB pointer               */
+    /*
+     * Loop to perform MAC operations according to correlation equation
+     */
+    const q31_t    *pX;
+    const q31_t    *pY;
+    const q31_t    *pA;
+    const q31_t    *pB;
+    int32_t   i = 0U, j = 0;    /* loop counters */
+    int32_t   inv = 4;          /* Reverse order flag */
+    uint32_t  tot = 0U;         /* Length */
+    int32_t   block1, block2, block3;
+    int32_t   incr;
+
+    tot = ((srcALen + srcBLen) - 2U);
+    if (srcALen > srcBLen)
+    {
+        /*
+         * Calculating the number of zeros to be padded to the output
+         */
+        j = srcALen - srcBLen;
+        /*
+         * Initialize the pointer after zero padding
+         */
+        pDst += j;
+    }
+    else if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA + (srcALen - 1U);
+        /*
+         * Initialization of the pointer after zero padding
+         */
+        pDst = pDst + tot;
+        /*
+         * Swapping the lengths
+         */
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+        /*
+         * Setting the reverse flag
+         */
+        inv = -4;
+
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+    pA = pIn1;
+    pB = pIn2;
+    incr = inv / 4;
+
+    for (i = 0U; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        /* compute 2 accumulators per loop */
+        /* size is incrementing for second accumulator */
+        /* Y pointer is decrementing for second accumulator */
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q31(acc0, acc1, pX, pY, count);
+
+        *pDst = (q31_t) acc0;
+        pDst += incr;
+        *pDst = (q31_t) acc1;
+        pDst += incr;
+        pB -= 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count);
+
+        *pDst = (q31_t) acc;
+        pDst += incr;
+        pB--;
+    }
+
+    for (i = 0U; i <= block2 - 4; i += 4)
+    {
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+        int64_t   acc2 = 0LL;
+        int64_t   acc3 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /* compute 4 accumulators per loop */
+        /* size is fixed for all accumulators */
+        /* X pointer is incrementing for successive accumulators */
+        MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q31(acc0, acc1, acc2, acc3, pX, pY, srcBLen);
+
+        *pDst = (q31_t) acc0;
+        pDst += incr;
+        *pDst = (q31_t) acc1;
+        pDst += incr;
+        *pDst = (q31_t) acc2;
+        pDst += incr;
+        *pDst = (q31_t) acc3;
+        pDst += incr;
+        pA += 4;
+    }
+
+    for (; i <= block2 - 2; i += 2)
+    {
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /* compute 2 accumulators per loop */
+        /* size is fixed for all accumulators */
+        /* X pointer is incrementing for second accumulator */
+        MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q31(acc0, acc1, pX, pY, srcBLen);
+
+        *pDst = (q31_t) acc0;
+        pDst += incr;
+        *pDst = (q31_t) acc1;
+        pDst += incr;
+        pA += 2;
+    }
+
+    if (block2 & 1)
+    {
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, srcBLen);
+
+        *pDst = (q31_t) acc;
+        pDst += incr;
+        pA++;
+    }
+
+    for (i = block3 - 1; i >= 0; i -= 2)
+    {
+
+        uint32_t  count = (i + 1);
+        int64_t   acc0 = 0LL;
+        int64_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /* compute 2 accumulators per loop */
+        /* size is decrementing for second accumulator */
+        /* X pointer is incrementing for second accumulator */
+        MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q31(acc0, acc1, pX, pY, count);
+
+        *pDst = (q31_t) acc0;
+        pDst += incr;
+        *pDst = (q31_t) acc1;
+        pDst += incr;
+        pA += 2;
+
+    }
+    for (; i >= 0; i--)
+    {
+        uint32_t  count = (i + 1);
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q31(acc, pX, pY, count);
+
+        *pDst = (q31_t) acc;
+        pDst += incr;
+        pA++;
+    }
+}
+#else
+void arm_correlate_q31(
+  const q31_t * pSrcA,
+        uint32_t srcALen,
+  const q31_t * pSrcB,
+        uint32_t srcBLen,
+        q31_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q31_t *pIn1;                                   /* InputA pointer */
+  const q31_t *pIn2;                                   /* InputB pointer */
+        q31_t *pOut = pDst;                            /* Output pointer */
+  const q31_t *px;                                     /* Intermediate inputA pointer */
+  const q31_t *py;                                     /* Intermediate inputB pointer */
+  const q31_t *pSrc1;                                  /* Intermediate pointers */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;                               /* Destination address modifier */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables for holding input and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[0] * y[srcBLen - 4] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[1] * y[srcBLen - 3] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[2] * y[srcBLen - 2] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* x[3] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += (q63_t) *px++ * (*py++);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q31_t) (sum >> 31);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unroll by 3 */
+    blkCnt = blockSize2 / 3;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+
+      /* read x[0], x[1] samples */
+      x0 = *px++;
+      x1 = *px++;
+
+      /* Apply loop unrolling and compute 3 MACs simultaneously. */
+      k = srcBLen / 3;
+
+      /* First part of the processing with loop unrolling.  Compute 3 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 2 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *(py);
+        /* Read x[2] sample */
+        x2 = *(px);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[0] * y[0] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[1] * y[0] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[2] * y[0] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Read y[1] sample */
+        c0 = *(py + 1U);
+        /* Read x[3] sample */
+        x0 = *(px + 1U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[1] * y[1] */
+        acc0 += ((q63_t) x1 * c0);
+        /* acc1 +=  x[2] * y[1] */
+        acc1 += ((q63_t) x2 * c0);
+        /* acc2 +=  x[3] * y[1] */
+        acc2 += ((q63_t) x0 * c0);
+
+        /* Read y[2] sample */
+        c0 = *(py + 2U);
+        /* Read x[4] sample */
+        x1 = *(px + 2U);
+
+        /* Perform the multiply-accumulate */
+        /* acc0 +=  x[2] * y[2] */
+        acc0 += ((q63_t) x2 * c0);
+        /* acc1 +=  x[3] * y[2] */
+        acc1 += ((q63_t) x0 * c0);
+        /* acc2 +=  x[4] * y[2] */
+        acc2 += ((q63_t) x1 * c0);
+
+        /* update scratch pointers */
+        px += 3U;
+        py += 3U;
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 3, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen - (3 * (srcBLen / 3));
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *(py++);
+
+        /* Read x[7] sample */
+        x2 = *(px++);
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 += ((q63_t) x0 * c0);
+        /* acc1 +=  x[5] * y[4] */
+        acc1 += ((q63_t) x1 * c0);
+        /* acc2 +=  x[6] * y[4] */
+        acc2 += ((q63_t) x2 * c0);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q31_t) (acc0 >> 31);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = (q31_t) (acc1 >> 31);
+      pOut += inc;
+
+      *pOut = (q31_t) (acc2 >> 31);
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 3 */
+      count += 3U;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 - 3 * (blockSize2 / 3);
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulates */
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+        sum += (q63_t) *px++ * *py++;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q31_t) (sum >> 31);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += (q63_t) *px++ * *py++;
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q31_t) (sum >> 31);
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      sum += (q63_t) *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (q63_t) *px++ * *py++;
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q31_t) (sum >> 31);
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q31_t *pIn1 = pSrcA;                           /* InputA pointer */
+  const q31_t *pIn2 = pSrcB + (srcBLen - 1U);          /* InputB pointer */
+        q63_t sum;                                     /* Accumulators */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we include zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using correlation but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+  }
+
+  /* Loop to calculate correlation for output length number of times */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to correlation equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q63_t) pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = (q31_t) (sum >> 31U);
+    else
+      *pDst++ = (q31_t) (sum >> 31U);
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
index 0fa49ec4..0b924e82 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_correlate_q7.c
@@ -1,800 +1,1002 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_correlate_q7.c
- * Description:  Correlation of Q7 sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup Corr
-  @{
- */
-
-/**
-  @brief         Correlation of Q7 sequences.
-  @param[in]     pSrcA      points to the first input sequence
-  @param[in]     srcALen    length of the first input sequence
-  @param[in]     pSrcB      points to the second input sequence
-  @param[in]     srcBLen    length of the second input sequence
-  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
-                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
-                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
-                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
-
- @remark
-                   Refer to \ref arm_correlate_opt_q7() for a faster implementation of this function.
- */
-
-void arm_correlate_q7(
-  const q7_t * pSrcA,
-        uint32_t srcALen,
-  const q7_t * pSrcB,
-        uint32_t srcBLen,
-        q7_t * pDst)
-{
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-  const q7_t *pIn1;                                    /* InputA pointer */
-  const q7_t *pIn2;                                    /* InputB pointer */
-        q7_t *pOut = pDst;                             /* Output pointer */
-  const q7_t *px;                                      /* Intermediate inputA pointer */
-  const q7_t *py;                                      /* Intermediate inputB pointer */
-  const q7_t *pSrc1;                                   /* Intermediate pointers */
-        q31_t sum;                                     /* Accumulators */
-        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
-        uint32_t j, k, count, blkCnt;                  /* Loop counters */
-        uint32_t outBlockSize;
-        int32_t inc = 1;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
-        q31_t input1, input2;                          /* Temporary input variables */
-        q15_t in1, in2;                                /* Temporary input variables */
-        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables for holding input and coefficient values */
-#endif
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and the destination pointer modifier, inc is set to -1 */
-  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
-  /* But to improve the performance,
-   * we include zeroes in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
-  /* If srcALen < srcBLen,
-   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
-  if (srcALen >= srcBLen)
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcA;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcB;
-
-    /* Number of output samples is calculated */
-    outBlockSize = (2U * srcALen) - 1U;
-
-    /* When srcALen > srcBLen, zero padding is done to srcB
-     * to make their lengths equal.
-     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
-     * number of output samples are made zero */
-    j = outBlockSize - (srcALen + (srcBLen - 1U));
-
-    /* Updating the pointer position to non zero value */
-    pOut += j;
-  }
-  else
-  {
-    /* Initialization of inputA pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization of inputB pointer */
-    pIn2 = pSrcA;
-
-    /* srcBLen is always considered as shorter or equal to srcALen */
-    j = srcBLen;
-    srcBLen = srcALen;
-    srcALen = j;
-
-    /* CORR(x, y) = Reverse order(CORR(y, x)) */
-    /* Hence set the destination pointer to point to the last output sample */
-    pOut = pDst + ((srcALen + srcBLen) - 2U);
-
-    /* Destination address modifier is set to -1 */
-    inc = -1;
-  }
-
-  /* The function is internally
-   * divided into three stages according to the number of multiplications that has to be
-   * taken place between inputA samples and inputB samples. In the first stage of the
-   * algorithm, the multiplications increase by one for every iteration.
-   * In the second stage of the algorithm, srcBLen number of multiplications are done.
-   * In the third stage of the algorithm, the multiplications decrease by one
-   * for every iteration. */
-
-  /* The algorithm is implemented in three stages.
-     The loop counters of each stage is initiated here. */
-  blockSize1 = srcBLen - 1U;
-  blockSize2 = srcALen - (srcBLen - 1U);
-  blockSize3 = blockSize1;
-
-  /* --------------------------
-   * Initializations of stage1
-   * -------------------------*/
-
-  /* sum = x[0] * y[srcBlen - 1]
-   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
-   * ....
-   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
-   */
-
-  /* In this stage the MAC operations are increased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = 1U;
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  pSrc1 = pIn2 + (srcBLen - 1U);
-  py = pSrc1;
-
-  /* ------------------------
-   * Stage1 process
-   * ----------------------*/
-
-  /* The first stage starts here */
-  while (blockSize1 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-    while (k > 0U)
-    {
-      /* x[0] , x[1] */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[srcBLen - 4] , y[srcBLen - 3] */
-      in1 = (q15_t) *py++;
-      in2 = (q15_t) *py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* x[0] * y[srcBLen - 4] */
-      /* x[1] * y[srcBLen - 3] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[2] , x[3] */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* y[srcBLen - 2] , y[srcBLen - 1] */
-      in1 = (q15_t) *py++;
-      in2 = (q15_t) *py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
-
-      /* x[2] * y[srcBLen - 2] */
-      /* x[3] * y[srcBLen - 1] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#else
-
-    /* Initialize k with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* x[0] * y[srcBLen - 1] */
-      sum += (q31_t) ((q15_t) *px++ * *py++);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    py = pSrc1 - count;
-    px = pIn1;
-
-    /* Increment MAC count */
-    count++;
-
-    /* Decrement loop counter */
-    blockSize1--;
-  }
-
-  /* --------------------------
-   * Initializations of stage2
-   * ------------------------*/
-
-  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
-   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
-   * ....
-   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   */
-
-  /* Working pointer of inputA */
-  px = pIn1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* count is index by which the pointer pIn1 to be incremented */
-  count = 0U;
-
-  /* -------------------
-   * Stage2 process
-   * ------------------*/
-
-  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
-   * So, to loop unroll over blockSize2,
-   * srcBLen should be greater than or equal to 4 */
-  if (srcBLen >= 4U)
-  {
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = blockSize2 >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Set all accumulators to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* read x[0], x[1], x[2] samples */
-      x0 = *px++;
-      x1 = *px++;
-      x2 = *px++;
-
-      /* Apply loop unrolling and compute 4 MACs simultaneously. */
-      k = srcBLen >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
-       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
-      do
-      {
-        /* Read y[0] sample */
-        c0 = *py++;
-        /* Read y[1] sample */
-        c1 = *py++;
-
-        /* Read x[3] sample */
-        x3 = *px++;
-
-        /* x[0] and x[1] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* y[0] and y[1] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc0 += x[0] * y[0] + x[1] * y[1]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[1] and x[2] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc1 += x[1] * y[0] + x[2] * y[1] */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc2 += x[2] * y[0] + x[3] * y[1]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[4] sample */
-        x0 = *px++;
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc3 += x[3] * y[0] + x[4] * y[1]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-        /* Read y[2] sample */
-        c0 = *py++;
-        /* Read y[3] sample */
-        c1 = *py++;
-
-        /* Read x[5] sample */
-        x1 = *px++;
-
-        /* x[2] and x[3] are packed */
-        in1 = (q15_t) x2;
-        in2 = (q15_t) x3;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* y[2] and y[3] are packed */
-        in1 = (q15_t) c0;
-        in2 = (q15_t) c1;
-
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc0 += x[2] * y[2] + x[3] * y[3]  */
-        acc0 = __SMLAD(input1, input2, acc0);
-
-        /* x[3] and x[4] are packed */
-        in1 = (q15_t) x3;
-        in2 = (q15_t) x0;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc1 += x[3] * y[2] + x[4] * y[3]  */
-        acc1 = __SMLAD(input1, input2, acc1);
-
-        /* x[4] and x[5] are packed */
-        in1 = (q15_t) x0;
-        in2 = (q15_t) x1;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc2 += x[4] * y[2] + x[5] * y[3]  */
-        acc2 = __SMLAD(input1, input2, acc2);
-
-        /* Read x[6] sample */
-        x2 = *px++;
-
-        /* x[5] and x[6] are packed */
-        in1 = (q15_t) x1;
-        in2 = (q15_t) x2;
-
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* acc3 += x[5] * y[2] + x[6] * y[3]  */
-        acc3 = __SMLAD(input1, input2, acc3);
-
-      } while (--k);
-
-      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
-       ** No loop unrolling is used. */
-      k = srcBLen % 0x4U;
-
-      while (k > 0U)
-      {
-        /* Read y[4] sample */
-        c0 = *py++;
-        /* Read x[7] sample */
-        x3 = *px++;
-
-        /* Perform the multiply-accumulates */
-        /* acc0 +=  x[4] * y[4] */
-        acc0 += ((q15_t) x0 * c0);
-        /* acc1 +=  x[5] * y[4] */
-        acc1 += ((q15_t) x1 * c0);
-        /* acc2 +=  x[6] * y[4] */
-        acc2 += ((q15_t) x2 * c0);
-        /* acc3 +=  x[7] * y[4] */
-        acc3 += ((q15_t) x3 * c0);
-
-        /* Reuse the present samples for the next MAC */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(acc0 >> 7, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc1 >> 7, 8));
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc2 >> 7, 8));
-      pOut += inc;
-
-      *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
-      pOut += inc;
-
-	  count += 4U;
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize2 % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize2;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-      k = srcBLen >> 2U;
-
-      while (k > 0U)
-      {
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) *py++;
-        in2 = (q15_t) *py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Perform the multiply-accumulate */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Reading two inputs of SrcA buffer and packing */
-        in1 = (q15_t) *px++;
-        in2 = (q15_t) *px++;
-        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Reading two inputs of SrcB buffer and packing */
-        in1 = (q15_t) *py++;
-        in2 = (q15_t) *py++;
-        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-        /* Perform the multiply-accumulate */
-        sum = __SMLAD(input1, input2, sum);
-
-        /* Decrement loop counter */
-        k--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      k = srcBLen % 0x4U;
-
-#else
-
-      /* Initialize blkCnt with number of samples */
-      k = srcBLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) *px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the pointer pIn1 index, count by 1 */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-  }
-  else
-  {
-    /* If the srcBLen is not a multiple of 4,
-     * the blockSize2 loop cannot be unrolled by 4 */
-    blkCnt = blockSize2;
-
-    while (blkCnt > 0U)
-    {
-      /* Accumulator is made zero for every iteration */
-      sum = 0;
-
-      /* srcBLen number of MACS should be performed */
-      k = srcBLen;
-
-      while (k > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum += ((q15_t) *px++ * *py++);
-
-        /* Decrement the loop counter */
-        k--;
-      }
-
-      /* Store the result in the accumulator in the destination buffer. */
-      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
-      /* Destination pointer is updated according to the address modifier, inc */
-      pOut += inc;
-
-      /* Increment the MAC count */
-      count++;
-
-      /* Update the inputA and inputB pointers for next MAC calculation */
-      px = pIn1 + count;
-      py = pIn2;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-  }
-
-
-  /* --------------------------
-   * Initializations of stage3
-   * -------------------------*/
-
-  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
-   * ....
-   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
-   * sum +=  x[srcALen-1] * y[0]
-   */
-
-  /* In this stage the MAC operations are decreased by 1 for every iteration.
-     The count variable holds the number of MAC operations performed */
-  count = srcBLen - 1U;
-
-  /* Working pointer of inputA */
-  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
-  px = pSrc1;
-
-  /* Working pointer of inputB */
-  py = pIn2;
-
-  /* -------------------
-   * Stage3 process
-   * ------------------*/
-
-  while (blockSize3 > 0U)
-  {
-    /* Accumulator is made zero for every iteration */
-    sum = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    k = count >> 2U;
-
-    while (k > 0U)
-    {
-      /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* y[0] , y[1] */
-      in1 = (q15_t) *py++;
-      in2 = (q15_t) *py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* sum += x[srcALen - srcBLen + 1] * y[0] */
-      /* sum += x[srcALen - srcBLen + 2] * y[1] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
-      in1 = (q15_t) *px++;
-      in2 = (q15_t) *px++;
-      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* y[2] , y[3] */
-      in1 = (q15_t) *py++;
-      in2 = (q15_t) *py++;
-      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
-
-      /* sum += x[srcALen - srcBLen + 3] * y[2] */
-      /* sum += x[srcALen - srcBLen + 4] * y[3] */
-      sum = __SMLAD(input1, input2, sum);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    k = count % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    k = count;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (k > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += ((q15_t) *px++ * *py++);
-
-      /* Decrement loop counter */
-      k--;
-    }
-
-    /* Store the result in the accumulator in the destination buffer. */
-    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
-    /* Destination pointer is updated according to the address modifier, inc */
-    pOut += inc;
-
-    /* Update the inputA and inputB pointers for next MAC calculation */
-    px = ++pSrc1;
-    py = pIn2;
-
-    /* Decrement MAC count */
-    count--;
-
-    /* Decrement loop counter */
-    blockSize3--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
-  const q7_t *pIn2 = pSrcB + (srcBLen - 1U);           /* InputB pointer */
-        q31_t sum;                                     /* Accumulator */
-        uint32_t i = 0U, j;                            /* Loop counters */
-        uint32_t inv = 0U;                             /* Reverse order flag */
-        uint32_t tot = 0U;                             /* Length */
-
-  /* The algorithm implementation is based on the lengths of the inputs. */
-  /* srcB is always made to slide across srcA. */
-  /* So srcBLen is always considered as shorter or equal to srcALen */
-  /* But CORR(x, y) is reverse of CORR(y, x) */
-  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
-  /* and a varaible, inv is set to 1 */
-  /* If lengths are not equal then zero pad has to be done to  make the two
-   * inputs of same length. But to improve the performance, we include zeroes
-   * in the output instead of zero padding either of the the inputs*/
-  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * starting of the output buffer */
-  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
-   * ending of the output buffer */
-  /* Once the zero padding is done the remaining of the output is calcualted
-   * using convolution but with the shorter signal time shifted. */
-
-  /* Calculate the length of the remaining sequence */
-  tot = ((srcALen + srcBLen) - 2U);
-
-  if (srcALen > srcBLen)
-  {
-    /* Calculating the number of zeros to be padded to the output */
-    j = srcALen - srcBLen;
-
-    /* Initialise the pointer after zero padding */
-    pDst += j;
-  }
-
-  else if (srcALen < srcBLen)
-  {
-    /* Initialization to inputB pointer */
-    pIn1 = pSrcB;
-
-    /* Initialization to the end of inputA pointer */
-    pIn2 = pSrcA + (srcALen - 1U);
-
-    /* Initialisation of the pointer after zero padding */
-    pDst = pDst + tot;
-
-    /* Swapping the lengths */
-    j = srcALen;
-    srcALen = srcBLen;
-    srcBLen = j;
-
-    /* Setting the reverse flag */
-    inv = 1;
-  }
-
-  /* Loop to calculate convolution for output length number of times */
-  for (i = 0U; i <= tot; i++)
-  {
-    /* Initialize sum with zero to carry out MAC operations */
-    sum = 0;
-
-    /* Loop to perform MAC operations according to convolution equation */
-    for (j = 0U; j <= i; j++)
-    {
-      /* Check the array limitations */
-      if (((i - j) < srcBLen) && (j < srcALen))
-      {
-        /* z[i] += x[i-j] * y[j] */
-        sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - j)]);
-      }
-    }
-
-    /* Store the output in the destination buffer */
-    if (inv == 1)
-      *pDst-- = (q7_t) __SSAT((sum >> 7U), 8U);
-    else
-      *pDst++ = (q7_t) __SSAT((sum >> 7U), 8U);
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of Corr group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_correlate_q7.c
+ * Description:  Correlation of Q7 sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup Corr
+  @{
+ */
+
+/**
+  @brief         Correlation of Q7 sequences.
+  @param[in]     pSrcA      points to the first input sequence
+  @param[in]     srcALen    length of the first input sequence
+  @param[in]     pSrcB      points to the second input sequence
+  @param[in]     srcBLen    length of the second input sequence
+  @param[out]    pDst       points to the location where the output result is written.  Length 2 * max(srcALen, srcBLen) - 1.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both the inputs are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   This approach provides 17 guard bits and there is no risk of overflow as long as <code>max(srcALen, srcBLen)<131072</code>.
+                   The 18.14 result is then truncated to 18.7 format by discarding the low 7 bits and saturated to 1.7 format.
+
+ @remark
+                   Refer to \ref arm_correlate_opt_q7() for a faster implementation of this function.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_helium_utils.h"
+
+#include "arm_vec_filtering.h"
+void arm_correlate_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
+{
+    const q7_t     *pIn1 = pSrcA;                     /* inputA pointer               */
+    const q7_t     *pIn2 = pSrcB + (srcBLen - 1U);    /* inputB pointer               */
+    const q7_t     *pX, *pY;
+    const q7_t     *pA, *pB;
+    int32_t   i = 0U, j = 0;                    /* loop counters */
+    int32_t   inv = 1U;                         /* Reverse order flag */
+    uint32_t  tot = 0U;                         /* Length */
+    int32_t   block1, block2, block3;
+    int32_t   incr;
+
+    tot = ((srcALen + srcBLen) - 2U);
+    if (srcALen > srcBLen)
+    {
+        /*
+         * Calculating the number of zeros to be padded to the output
+         */
+        j = srcALen - srcBLen;
+        /*
+         * Initialize the pointer after zero padding
+         */
+        pDst += j;
+    }
+    else if (srcALen < srcBLen)
+    {
+        /*
+         * Initialization to inputB pointer
+         */
+        pIn1 = pSrcB;
+        /*
+         * Initialization to the end of inputA pointer
+         */
+        pIn2 = pSrcA + (srcALen - 1U);
+        /*
+         * Initialisation of the pointer after zero padding
+         */
+        pDst = pDst + tot;
+        /*
+         * Swapping the lengths
+         */
+        j = srcALen;
+        srcALen = srcBLen;
+        srcBLen = j;
+        /*
+         * Setting the reverse flag
+         */
+        inv = -1;
+    }
+
+    block1 = srcBLen - 1;
+    block2 = srcALen - srcBLen + 1;
+    block3 = srcBLen - 1;
+
+    pA = pIn1;
+    pB = pIn2;
+    incr = inv;
+
+    for (i = 0U; i <= block1 - 2; i += 2)
+    {
+        uint32_t  count = i + 1;
+        int32_t   acc0 = 0;
+        int32_t   acc1 = 0;
+
+        /*
+         * compute 2 accumulators per loop
+         * size is incrementing for second accumulator
+         * Y pointer is decrementing for second accumulator
+         */
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_DUAL_DEC_Y_INC_SIZE_Q7(acc0, acc1, pX, pY, count);
+
+        *pDst = (q7_t) acc0;
+        pDst += incr;
+        *pDst = (q7_t) acc1;
+        pDst += incr;
+        pB -= 2;
+    }
+    for (; i < block1; i++)
+    {
+        uint32_t  count = i + 1;
+        int32_t   acc = 0;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count);
+
+        *pDst = (q7_t) acc;
+        pDst += incr;
+        pB--;
+    }
+
+    for (i = 0U; i <= block2 - 4; i += 4)
+    {
+        int32_t   acc0 = 0;
+        int32_t   acc1 = 0;
+        int32_t   acc2 = 0;
+        int32_t   acc3 = 0;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 4 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for successive accumulators
+         */
+        MVE_INTR_CORR_QUAD_INC_X_FIXED_SIZE_Q7(acc0, acc1, acc2, acc3, pX, pY, srcBLen);
+
+        *pDst = (q7_t) acc0;
+        pDst += incr;
+        *pDst = (q7_t) acc1;
+        pDst += incr;
+        *pDst = (q7_t) acc2;
+        pDst += incr;
+        *pDst = (q7_t) acc3;
+        pDst += incr;
+
+        pA += 4;
+    }
+
+    for (; i <= block2 - 2; i += 2)
+    {
+        int32_t   acc0 = 0LL;
+        int32_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is fixed for all accumulators
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_FIXED_SIZE_Q7(acc0, acc1, pX, pY, srcBLen);
+
+        *pDst = (q7_t) acc0;
+        pDst += incr;
+        *pDst = (q7_t) acc1;
+        pDst += incr;
+        pA += 2;
+    }
+
+    if (block2 & 1)
+    {
+        int32_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, srcBLen);
+
+        *pDst = (q7_t) acc;
+        pDst += incr;
+        pA++;
+    }
+
+    for (i = block3 - 1; i >= 0; i -= 2)
+    {
+        uint32_t  count = (i + 1);
+        int32_t   acc0 = 0LL;
+        int32_t   acc1 = 0LL;
+
+        pX = pA;
+        pY = pB;
+        /*
+         * compute 2 accumulators per loop
+         * size is decrementing for second accumulator
+         * X pointer is incrementing for second accumulator
+         */
+        MVE_INTR_CORR_DUAL_INC_X_DEC_SIZE_Q7(acc0, acc1, pX, pY, count);
+
+        *pDst = (q7_t) acc0;
+        pDst += incr;
+        *pDst = (q7_t) acc1;
+        pDst += incr;
+        pA += 2;
+
+    }
+    for (; i >= 0; i--)
+    {
+        uint32_t  count = (i + 1);
+        int64_t   acc = 0LL;
+
+        pX = pA;
+        pY = pB;
+        MVE_INTR_CORR_SINGLE_Q7(acc, pX, pY, count);
+
+        *pDst = (q7_t) acc;
+        pDst += incr;
+        pA++;
+    }
+}
+
+#else
+void arm_correlate_q7(
+  const q7_t * pSrcA,
+        uint32_t srcALen,
+  const q7_t * pSrcB,
+        uint32_t srcBLen,
+        q7_t * pDst)
+{
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+  const q7_t *pIn1;                                    /* InputA pointer */
+  const q7_t *pIn2;                                    /* InputB pointer */
+        q7_t *pOut = pDst;                             /* Output pointer */
+  const q7_t *px;                                      /* Intermediate inputA pointer */
+  const q7_t *py;                                      /* Intermediate inputB pointer */
+  const q7_t *pSrc1;                                   /* Intermediate pointers */
+        q31_t sum;                                     /* Accumulators */
+        uint32_t blockSize1, blockSize2, blockSize3;   /* Loop counters */
+        uint32_t j, k, count, blkCnt;                  /* Loop counters */
+        uint32_t outBlockSize;
+        int32_t inc = 1;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc0, acc1, acc2, acc3;                  /* Accumulators */
+        q31_t input1, input2;                          /* Temporary input variables */
+        q15_t in1, in2;                                /* Temporary input variables */
+        q7_t x0, x1, x2, x3, c0, c1;                   /* Temporary variables for holding input and coefficient values */
+#endif
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and the destination pointer modifier, inc is set to -1 */
+  /* If srcALen > srcBLen, zero pad has to be done to srcB to make the two inputs of same length */
+  /* But to improve the performance,
+   * we include zeroes in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the starting of the output buffer */
+  /* If srcALen < srcBLen,
+   * (srcALen - srcBLen) zeroes has to included in the ending of the output buffer */
+  if (srcALen >= srcBLen)
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcA;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcB;
+
+    /* Number of output samples is calculated */
+    outBlockSize = (2U * srcALen) - 1U;
+
+    /* When srcALen > srcBLen, zero padding is done to srcB
+     * to make their lengths equal.
+     * Instead, (outBlockSize - (srcALen + srcBLen - 1))
+     * number of output samples are made zero */
+    j = outBlockSize - (srcALen + (srcBLen - 1U));
+
+    /* Updating the pointer position to non zero value */
+    pOut += j;
+  }
+  else
+  {
+    /* Initialization of inputA pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization of inputB pointer */
+    pIn2 = pSrcA;
+
+    /* srcBLen is always considered as shorter or equal to srcALen */
+    j = srcBLen;
+    srcBLen = srcALen;
+    srcALen = j;
+
+    /* CORR(x, y) = Reverse order(CORR(y, x)) */
+    /* Hence set the destination pointer to point to the last output sample */
+    pOut = pDst + ((srcALen + srcBLen) - 2U);
+
+    /* Destination address modifier is set to -1 */
+    inc = -1;
+  }
+
+  /* The function is internally
+   * divided into three stages according to the number of multiplications that has to be
+   * taken place between inputA samples and inputB samples. In the first stage of the
+   * algorithm, the multiplications increase by one for every iteration.
+   * In the second stage of the algorithm, srcBLen number of multiplications are done.
+   * In the third stage of the algorithm, the multiplications decrease by one
+   * for every iteration. */
+
+  /* The algorithm is implemented in three stages.
+     The loop counters of each stage is initiated here. */
+  blockSize1 = srcBLen - 1U;
+  blockSize2 = srcALen - (srcBLen - 1U);
+  blockSize3 = blockSize1;
+
+  /* --------------------------
+   * Initializations of stage1
+   * -------------------------*/
+
+  /* sum = x[0] * y[srcBlen - 1]
+   * sum = x[0] * y[srcBlen - 2] + x[1] * y[srcBlen - 1]
+   * ....
+   * sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen - 1] * y[srcBLen - 1]
+   */
+
+  /* In this stage the MAC operations are increased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = 1U;
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  pSrc1 = pIn2 + (srcBLen - 1U);
+  py = pSrc1;
+
+  /* ------------------------
+   * Stage1 process
+   * ----------------------*/
+
+  /* The first stage starts here */
+  while (blockSize1 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[0] , x[1] */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+      /* y[srcBLen - 4] , y[srcBLen - 3] */
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+      /* x[0] * y[srcBLen - 4] */
+      /* x[1] * y[srcBLen - 3] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* x[2] , x[3] */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+      /* y[srcBLen - 2] , y[srcBLen - 1] */
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16);
+
+      /* x[2] * y[srcBLen - 2] */
+      /* x[3] * y[srcBLen - 1] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize k with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* x[0] * y[srcBLen - 1] */
+      sum += (q31_t) ((q15_t) *px++ * *py++);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    py = pSrc1 - count;
+    px = pIn1;
+
+    /* Increment MAC count */
+    count++;
+
+    /* Decrement loop counter */
+    blockSize1--;
+  }
+
+  /* --------------------------
+   * Initializations of stage2
+   * ------------------------*/
+
+  /* sum = x[0] * y[0] + x[1] * y[1] +...+ x[srcBLen-1] * y[srcBLen-1]
+   * sum = x[1] * y[0] + x[2] * y[1] +...+ x[srcBLen] * y[srcBLen-1]
+   * ....
+   * sum = x[srcALen-srcBLen-2] * y[0] + x[srcALen-srcBLen-1] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   */
+
+  /* Working pointer of inputA */
+  px = pIn1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* count is index by which the pointer pIn1 to be incremented */
+  count = 0U;
+
+  /* -------------------
+   * Stage2 process
+   * ------------------*/
+
+  /* Stage2 depends on srcBLen as in this stage srcBLen number of MACS are performed.
+   * So, to loop unroll over blockSize2,
+   * srcBLen should be greater than or equal to 4 */
+  if (srcBLen >= 4U)
+  {
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = blockSize2 >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Set all accumulators to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* read x[0], x[1], x[2] samples */
+      x0 = *px++;
+      x1 = *px++;
+      x2 = *px++;
+
+      /* Apply loop unrolling and compute 4 MACs simultaneously. */
+      k = srcBLen >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 MACs at a time.
+       ** a second loop below computes MACs for the remaining 1 to 3 samples. */
+      do
+      {
+        /* Read y[0] sample */
+        c0 = *py++;
+        /* Read y[1] sample */
+        c1 = *py++;
+
+        /* Read x[3] sample */
+        x3 = *px++;
+
+        /* x[0] and x[1] are packed */
+        in1 = (q15_t) x0;
+        in2 = (q15_t) x1;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* y[0] and y[1] are packed */
+        in1 = (q15_t) c0;
+        in2 = (q15_t) c1;
+
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc0 += x[0] * y[0] + x[1] * y[1]  */
+        acc0 = __SMLAD(input1, input2, acc0);
+
+        /* x[1] and x[2] are packed */
+        in1 = (q15_t) x1;
+        in2 = (q15_t) x2;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc1 += x[1] * y[0] + x[2] * y[1] */
+        acc1 = __SMLAD(input1, input2, acc1);
+
+        /* x[2] and x[3] are packed */
+        in1 = (q15_t) x2;
+        in2 = (q15_t) x3;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc2 += x[2] * y[0] + x[3] * y[1]  */
+        acc2 = __SMLAD(input1, input2, acc2);
+
+        /* Read x[4] sample */
+        x0 = *px++;
+
+        /* x[3] and x[4] are packed */
+        in1 = (q15_t) x3;
+        in2 = (q15_t) x0;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc3 += x[3] * y[0] + x[4] * y[1]  */
+        acc3 = __SMLAD(input1, input2, acc3);
+
+        /* Read y[2] sample */
+        c0 = *py++;
+        /* Read y[3] sample */
+        c1 = *py++;
+
+        /* Read x[5] sample */
+        x1 = *px++;
+
+        /* x[2] and x[3] are packed */
+        in1 = (q15_t) x2;
+        in2 = (q15_t) x3;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* y[2] and y[3] are packed */
+        in1 = (q15_t) c0;
+        in2 = (q15_t) c1;
+
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc0 += x[2] * y[2] + x[3] * y[3]  */
+        acc0 = __SMLAD(input1, input2, acc0);
+
+        /* x[3] and x[4] are packed */
+        in1 = (q15_t) x3;
+        in2 = (q15_t) x0;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc1 += x[3] * y[2] + x[4] * y[3]  */
+        acc1 = __SMLAD(input1, input2, acc1);
+
+        /* x[4] and x[5] are packed */
+        in1 = (q15_t) x0;
+        in2 = (q15_t) x1;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc2 += x[4] * y[2] + x[5] * y[3]  */
+        acc2 = __SMLAD(input1, input2, acc2);
+
+        /* Read x[6] sample */
+        x2 = *px++;
+
+        /* x[5] and x[6] are packed */
+        in1 = (q15_t) x1;
+        in2 = (q15_t) x2;
+
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* acc3 += x[5] * y[2] + x[6] * y[3]  */
+        acc3 = __SMLAD(input1, input2, acc3);
+
+      } while (--k);
+
+      /* If the srcBLen is not a multiple of 4, compute any remaining MACs here.
+       ** No loop unrolling is used. */
+      k = srcBLen % 0x4U;
+
+      while (k > 0U)
+      {
+        /* Read y[4] sample */
+        c0 = *py++;
+        /* Read x[7] sample */
+        x3 = *px++;
+
+        /* Perform the multiply-accumulates */
+        /* acc0 +=  x[4] * y[4] */
+        acc0 += ((q15_t) x0 * c0);
+        /* acc1 +=  x[5] * y[4] */
+        acc1 += ((q15_t) x1 * c0);
+        /* acc2 +=  x[6] * y[4] */
+        acc2 += ((q15_t) x2 * c0);
+        /* acc3 +=  x[7] * y[4] */
+        acc3 += ((q15_t) x3 * c0);
+
+        /* Reuse the present samples for the next MAC */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q7_t) (__SSAT(acc0 >> 7, 8));
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      *pOut = (q7_t) (__SSAT(acc1 >> 7, 8));
+      pOut += inc;
+
+      *pOut = (q7_t) (__SSAT(acc2 >> 7, 8));
+      pOut += inc;
+
+      *pOut = (q7_t) (__SSAT(acc3 >> 7, 8));
+      pOut += inc;
+
+	  count += 4U;
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize2 % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize2;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+      k = srcBLen >> 2U;
+
+      while (k > 0U)
+      {
+
+        /* Reading two inputs of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Reading two inputs of SrcB buffer and packing */
+        in1 = (q15_t) *py++;
+        in2 = (q15_t) *py++;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Perform the multiply-accumulate */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Reading two inputs of SrcA buffer and packing */
+        in1 = (q15_t) *px++;
+        in2 = (q15_t) *px++;
+        input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Reading two inputs of SrcB buffer and packing */
+        in1 = (q15_t) *py++;
+        in2 = (q15_t) *py++;
+        input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+        /* Perform the multiply-accumulate */
+        sum = __SMLAD(input1, input2, sum);
+
+        /* Decrement loop counter */
+        k--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      k = srcBLen % 0x4U;
+
+#else
+
+      /* Initialize blkCnt with number of samples */
+      k = srcBLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the pointer pIn1 index, count by 1 */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+  }
+  else
+  {
+    /* If the srcBLen is not a multiple of 4,
+     * the blockSize2 loop cannot be unrolled by 4 */
+    blkCnt = blockSize2;
+
+    while (blkCnt > 0U)
+    {
+      /* Accumulator is made zero for every iteration */
+      sum = 0;
+
+      /* srcBLen number of MACS should be performed */
+      k = srcBLen;
+
+      while (k > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum += ((q15_t) *px++ * *py++);
+
+        /* Decrement the loop counter */
+        k--;
+      }
+
+      /* Store the result in the accumulator in the destination buffer. */
+      *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
+      /* Destination pointer is updated according to the address modifier, inc */
+      pOut += inc;
+
+      /* Increment the MAC count */
+      count++;
+
+      /* Update the inputA and inputB pointers for next MAC calculation */
+      px = pIn1 + count;
+      py = pIn2;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+  }
+
+
+  /* --------------------------
+   * Initializations of stage3
+   * -------------------------*/
+
+  /* sum += x[srcALen-srcBLen+1] * y[0] + x[srcALen-srcBLen+2] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * sum += x[srcALen-srcBLen+2] * y[0] + x[srcALen-srcBLen+3] * y[1] +...+ x[srcALen-1] * y[srcBLen-1]
+   * ....
+   * sum +=  x[srcALen-2] * y[0] + x[srcALen-1] * y[1]
+   * sum +=  x[srcALen-1] * y[0]
+   */
+
+  /* In this stage the MAC operations are decreased by 1 for every iteration.
+     The count variable holds the number of MAC operations performed */
+  count = srcBLen - 1U;
+
+  /* Working pointer of inputA */
+  pSrc1 = pIn1 + (srcALen - (srcBLen - 1U));
+  px = pSrc1;
+
+  /* Working pointer of inputB */
+  py = pIn2;
+
+  /* -------------------
+   * Stage3 process
+   * ------------------*/
+
+  while (blockSize3 > 0U)
+  {
+    /* Accumulator is made zero for every iteration */
+    sum = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    k = count >> 2U;
+
+    while (k > 0U)
+    {
+      /* x[srcALen - srcBLen + 1] , x[srcALen - srcBLen + 2]  */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* y[0] , y[1] */
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* sum += x[srcALen - srcBLen + 1] * y[0] */
+      /* sum += x[srcALen - srcBLen + 2] * y[1] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* x[srcALen - srcBLen + 3] , x[srcALen - srcBLen + 4] */
+      in1 = (q15_t) *px++;
+      in2 = (q15_t) *px++;
+      input1 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* y[2] , y[3] */
+      in1 = (q15_t) *py++;
+      in2 = (q15_t) *py++;
+      input2 = ((q31_t) in1 & 0x0000FFFF) | ((q31_t) in2 << 16U);
+
+      /* sum += x[srcALen - srcBLen + 3] * y[2] */
+      /* sum += x[srcALen - srcBLen + 4] * y[3] */
+      sum = __SMLAD(input1, input2, sum);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    k = count % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    k = count;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (k > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += ((q15_t) *px++ * *py++);
+
+      /* Decrement loop counter */
+      k--;
+    }
+
+    /* Store the result in the accumulator in the destination buffer. */
+    *pOut = (q7_t) (__SSAT(sum >> 7U, 8));
+    /* Destination pointer is updated according to the address modifier, inc */
+    pOut += inc;
+
+    /* Update the inputA and inputB pointers for next MAC calculation */
+    px = ++pSrc1;
+    py = pIn2;
+
+    /* Decrement MAC count */
+    count--;
+
+    /* Decrement loop counter */
+    blockSize3--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  const q7_t *pIn1 = pSrcA;                            /* InputA pointer */
+  const q7_t *pIn2 = pSrcB + (srcBLen - 1U);           /* InputB pointer */
+        q31_t sum;                                     /* Accumulator */
+        uint32_t i = 0U, j;                            /* Loop counters */
+        uint32_t inv = 0U;                             /* Reverse order flag */
+        uint32_t tot = 0U;                             /* Length */
+
+  /* The algorithm implementation is based on the lengths of the inputs. */
+  /* srcB is always made to slide across srcA. */
+  /* So srcBLen is always considered as shorter or equal to srcALen */
+  /* But CORR(x, y) is reverse of CORR(y, x) */
+  /* So, when srcBLen > srcALen, output pointer is made to point to the end of the output buffer */
+  /* and a varaible, inv is set to 1 */
+  /* If lengths are not equal then zero pad has to be done to  make the two
+   * inputs of same length. But to improve the performance, we include zeroes
+   * in the output instead of zero padding either of the the inputs*/
+  /* If srcALen > srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * starting of the output buffer */
+  /* If srcALen < srcBLen, (srcALen - srcBLen) zeroes has to included in the
+   * ending of the output buffer */
+  /* Once the zero padding is done the remaining of the output is calcualted
+   * using convolution but with the shorter signal time shifted. */
+
+  /* Calculate the length of the remaining sequence */
+  tot = ((srcALen + srcBLen) - 2U);
+
+  if (srcALen > srcBLen)
+  {
+    /* Calculating the number of zeros to be padded to the output */
+    j = srcALen - srcBLen;
+
+    /* Initialise the pointer after zero padding */
+    pDst += j;
+  }
+
+  else if (srcALen < srcBLen)
+  {
+    /* Initialization to inputB pointer */
+    pIn1 = pSrcB;
+
+    /* Initialization to the end of inputA pointer */
+    pIn2 = pSrcA + (srcALen - 1U);
+
+    /* Initialisation of the pointer after zero padding */
+    pDst = pDst + tot;
+
+    /* Swapping the lengths */
+    j = srcALen;
+    srcALen = srcBLen;
+    srcBLen = j;
+
+    /* Setting the reverse flag */
+    inv = 1;
+  }
+
+  /* Loop to calculate convolution for output length number of times */
+  for (i = 0U; i <= tot; i++)
+  {
+    /* Initialize sum with zero to carry out MAC operations */
+    sum = 0;
+
+    /* Loop to perform MAC operations according to convolution equation */
+    for (j = 0U; j <= i; j++)
+    {
+      /* Check the array limitations */
+      if (((i - j) < srcBLen) && (j < srcALen))
+      {
+        /* z[i] += x[i-j] * y[j] */
+        sum += ((q15_t) pIn1[j] * pIn2[-((int32_t) i - (int32_t) j)]);
+      }
+    }
+
+    /* Store the output in the destination buffer */
+    if (inv == 1)
+      *pDst-- = (q7_t) __SSAT((sum >> 7U), 8U);
+    else
+      *pDst++ = (q7_t) __SSAT((sum >> 7U), 8U);
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Corr group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
index d91543c6..443efa02 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_f32.c
@@ -1,703 +1,951 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_f32.c
- * Description:  FIR decimation for floating-point sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator
-
-  These functions combine an FIR filter together with a decimator.
-  They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.
-  Conceptually, the functions are equivalent to the block diagram below:
-  \image html FIRDecimator.gif "Components included in the FIR Decimator functions"
-  When decimating by a factor of <code>M</code>, the signal should be prefiltered by a lowpass filter with a normalized
-  cutoff frequency of <code>1/M</code> in order to prevent aliasing distortion.
-  The user of the function is responsible for providing the filter coefficients.
-
-  The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.
-  Instead of calculating all of the FIR filter outputs and discarding <code>M-1</code> out of every <code>M</code>, only the
-  samples output by the decimator are computed.
-  The functions operate on blocks of input and output data.
-  <code>pSrc</code> points to an array of <code>blockSize</code> input values and
-  <code>pDst</code> points to an array of <code>blockSize/M</code> output values.
-  In order to have an integer number of output samples <code>blockSize</code>
-  must always be a multiple of the decimation factor <code>M</code>.
-
-  The library provides separate functions for Q15, Q31 and floating-point data types.
-
-  @par           Algorithm:
-                   The FIR portion of the algorithm uses the standard form filter:
-  <pre>
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-  </pre>
-                   where, <code>b[n]</code> are the filter coefficients.
-  @par
-                   The <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
-                   Coefficients are stored in time reversed order.
-  @par
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
-                   Samples in the state buffer are stored in the order:
-  @par
-  <pre>
-      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-  </pre>
-                   The state variables are updated after each block of data is processed, the coefficients are untouched.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-
- @par            Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   - Checks to make sure that the size of the input is a multiple of the decimation factor.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   The code below statically initializes each of the 3 different data type filter instance structures
-  <pre>
-      arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
-      arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
-      arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
-  </pre>
-                   where <code>M</code> is the decimation factor; <code>numTaps</code> is the number of filter coefficients in the filter;
-                   <code>pCoeffs</code> is the address of the coefficient buffer;
-                   <code>pState</code> is the address of the state buffer.
-                   Be sure to set the values in the state buffer to zeros when doing static initialization.
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the fixed-point versions of the FIR decimate filter functions.
-                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-                   Refer to the function specific documentation below for usage guidelines.
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Processing function for floating-point FIR decimator.
-  @param[in]     S         points to an instance of the floating-point FIR decimator structure
-  @param[in]     pSrc      points to the block of input data
-  @param[out]    pDst      points to the block of output data
-  @param[in]     blockSize number of samples to process
-  @return        none
- */
-
-#if defined(ARM_MATH_NEON)
-void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  const float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px;                                 /* Temporary pointer for state buffer */
-  const float32_t *pb;                           /* Temporary pointer for coefficient buffer */
-  float32_t sum0;                                /* Accumulator */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-  uint32_t blkCntN4;
-  float32_t *px0, *px1, *px2, *px3;
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-
-  float32x4_t accv,acc0v,acc1v,acc2v,acc3v;
-  float32x4_t x0v, x1v, x2v, x3v;
-  float32x4_t c0v;
-  float32x2_t temp;
-  float32x4_t sum0v;
- 
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 4;
-  blkCntN4 = outBlockSize - (4 * blkCnt);
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 * decimation factor number of new input samples into the state buffer */
-    i = 4 * S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulators to zero */
-    acc0v = vdupq_n_f32(0.0);
-    acc1v = vdupq_n_f32(0.0);
-    acc2v = vdupq_n_f32(0.0);
-    acc3v = vdupq_n_f32(0.0);
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-    px2 = pState + 2 * S->M;
-    px3 = pState + 3 * S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps. 
-     ** Repeat until we've computed numTaps-4 coefficients. */
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0v = vld1q_f32(pb);
-      pb += 4;
-
-      /* Read x[n-numTaps-1] sample for acc0 */
-      x0v = vld1q_f32(px0);
-      x1v = vld1q_f32(px1);
-      x2v = vld1q_f32(px2);
-      x3v = vld1q_f32(px3);
-
-      px0 += 4;
-      px1 += 4;
-      px2 += 4;
-      px3 += 4;
-     
-      acc0v = vmlaq_f32(acc0v, x0v, c0v);
-      acc1v = vmlaq_f32(acc1v, x1v, c0v);
-      acc2v = vmlaq_f32(acc2v, x2v, c0v);
-      acc3v = vmlaq_f32(acc3v, x3v, c0v);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    temp = vpadd_f32(vget_low_f32(acc0v),vget_high_f32(acc0v));
-    accv[0] = temp[0] + temp[1];
-
-    temp = vpadd_f32(vget_low_f32(acc1v),vget_high_f32(acc1v));
-    accv[1] = temp[0] + temp[1];
-
-    temp = vpadd_f32(vget_low_f32(acc2v),vget_high_f32(acc2v));
-    accv[2] = temp[0] + temp[1];
-
-    temp = vpadd_f32(vget_low_f32(acc3v),vget_high_f32(acc3v));
-    accv[3] = temp[0] + temp[1];
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      accv[0] += x0 * c0;
-      accv[1] += x1 * c0;
-      accv[2] += x2 * c0;
-      accv[3] += x3 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + 4 * S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    vst1q_f32(pDst,accv);
-    pDst += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  while (blkCntN4 > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCurnt++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    sum0v =  vdupq_n_f32(0.0);
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Loop over the number of taps.
-     ** Repeat until we've computed numTaps-4 coefficients. */
-    while (tapCnt > 0U)
-    {
-      c0v = vld1q_f32(pb);
-      pb += 4;
-
-      x0v = vld1q_f32(px);
-      px += 4;
-
-      sum0v = vmlaq_f32(sum0v, x0v, c0v);
-      
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    temp = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
-    sum0 = temp[0] + temp[1];
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = sum0;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  i = (numTaps - 1U) >> 2;
-
-  /* Copy data */
-  while (i > 0U)
-  {
-    sum0v = vld1q_f32(pState);
-    vst1q_f32(pStateCurnt,sum0v);
-    pState += 4;
-    pStateCurnt += 4;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1U) % 0x04U;
-
-  /* Copy data */
-  while (i > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-}
-#else
-void arm_fir_decimate_f32(
-  const arm_fir_decimate_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *pStateCur;                          /* Points to the current sample of the state */
-        float32_t *px0;                                /* Temporary pointer for state buffer */
-  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
-        float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-        float32_t acc0;                                /* Accumulator */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        float32_t *px1, *px2, *px3;
-        float32_t x1, x2, x3;
-        float32_t acc1, acc2, acc3;
-#endif
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (numTaps - 1U);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 samples at a time */
-  blkCnt = outBlockSize >> 2U;
-
-  /* Samples loop unrolled by 4 */
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 * decimation factor number of new input samples into the state buffer */
-    i = S->M * 4;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulators to zero */
-    acc0 = 0.0f;
-    acc1 = 0.0f;
-    acc2 = 0.0f;
-    acc3 = 0.0f;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-    px2 = pState + 2 * S->M;
-    px3 = pState + 3 * S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample for acc0 */
-      x0 = *(px0++);
-      /* Read x[n-numTaps-1] sample for acc1 */
-      x1 = *(px1++);
-      /* Read x[n-numTaps-1] sample for acc2 */
-      x2 = *(px2++);
-      /* Read x[n-numTaps-1] sample for acc3 */
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch state variables for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 4;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = acc0;
-    *pDst++ = acc1;
-    *pDst++ = acc2;
-    *pDst++ = acc3;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining samples */
-  blkCnt = outBlockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = outBlockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0.0f;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = acc0;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x04U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_f32.c
+ * Description:  FIR decimation for floating-point sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR_decimate Finite Impulse Response (FIR) Decimator
+
+  These functions combine an FIR filter together with a decimator.
+  They are used in multirate systems for reducing the sample rate of a signal without introducing aliasing distortion.
+  Conceptually, the functions are equivalent to the block diagram below:
+  \image html FIRDecimator.gif "Components included in the FIR Decimator functions"
+  When decimating by a factor of <code>M</code>, the signal should be prefiltered by a lowpass filter with a normalized
+  cutoff frequency of <code>1/M</code> in order to prevent aliasing distortion.
+  The user of the function is responsible for providing the filter coefficients.
+
+  The FIR decimator functions provided in the CMSIS DSP Library combine the FIR filter and the decimator in an efficient manner.
+  Instead of calculating all of the FIR filter outputs and discarding <code>M-1</code> out of every <code>M</code>, only the
+  samples output by the decimator are computed.
+  The functions operate on blocks of input and output data.
+  <code>pSrc</code> points to an array of <code>blockSize</code> input values and
+  <code>pDst</code> points to an array of <code>blockSize/M</code> output values.
+  In order to have an integer number of output samples <code>blockSize</code>
+  must always be a multiple of the decimation factor <code>M</code>.
+
+  The library provides separate functions for Q15, Q31 and floating-point data types.
+
+  @par           Algorithm:
+                   The FIR portion of the algorithm uses the standard form filter:
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+                   where, <code>b[n]</code> are the filter coefficients.
+  @par
+                   The <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+  @par
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the order:
+  @par
+  <pre>
+      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par            Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   - Checks to make sure that the size of the input is a multiple of the decimation factor.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, M (decimation factor), pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+      arm_fir_decimate_instance_f32 S = {M, numTaps, pCoeffs, pState};
+      arm_fir_decimate_instance_q31 S = {M, numTaps, pCoeffs, pState};
+      arm_fir_decimate_instance_q15 S = {M, numTaps, pCoeffs, pState};
+  </pre>
+                   where <code>M</code> is the decimation factor; <code>numTaps</code> is the number of filter coefficients in the filter;
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>pState</code> is the address of the state buffer.
+                   Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR decimate filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR decimator.
+  @param[in]     S         points to an instance of the floating-point FIR decimator structure
+  @param[in]     pSrc      points to the block of input data
+  @param[out]    pDst      points to the block of output data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+    float32_t *pState = S->pState;  /* State pointer */
+    const float32_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */
+    float32_t *pStateCurnt;     /* Points to the current sample of the state */
+    const float32_t *px, *pb;         /* Temporary pointers for state and coefficient buffers */
+    uint32_t  numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+    uint32_t  i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;   /* Loop counters */
+    uint32_t  blkCntN4;
+    const float32_t *px0, *px1, *px2, *px3;
+    f32x4_t accv, acc0v, acc1v, acc2v, acc3v;
+    f32x4_t x0v, x1v, x2v, x3v;
+    f32x4_t c0v;
+
+    /*
+     * S->pState buffer contains previous frame (numTaps - 1) samples
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + (numTaps - 1U);
+    /*
+     * Total number of output samples to be computed
+     */
+    blkCnt = outBlockSize / 4;
+    blkCntN4 = outBlockSize - (4 * blkCnt);
+
+    while (blkCnt > 0U)
+    {
+        /*
+         * Copy 4 * decimation factor number of new input samples into the state buffer
+         */
+        i = (4 * S->M) >> 2;
+        do
+        {
+            vst1q(pStateCurnt, vld1q((const float32_t *)pSrc));
+            pSrc += 4;
+            pStateCurnt += 4;
+            i--;
+        }
+        while (i > 0U);
+
+        /*
+         * Set accumulators to zero
+         */
+        acc0v = vdupq_n_f32(0.0f);
+        acc1v = vdupq_n_f32(0.0f);
+        acc2v = vdupq_n_f32(0.0f);
+        acc3v = vdupq_n_f32(0.0f);
+
+        /*
+         * Initialize state pointer for all the samples
+         */
+        px0 = pState;
+        px1 = pState + S->M;
+        px2 = pState + 2 * S->M;
+        px3 = pState + 3 * S->M;
+        /*
+         * Initialize coeff pointer
+         */
+        pb = pCoeffs;
+        /*
+         * Loop unrolling.  Process 4 taps at a time.
+         */
+        tapCnt = numTaps >> 2;
+        /*
+         * Loop over the number of taps.  Unroll by a factor of 4.
+         * Repeat until we've computed numTaps-4 coefficients.
+         */
+        while (tapCnt > 0U)
+        {
+            /*
+             * Read the b[numTaps-1] coefficient
+             */
+            c0v = vld1q((const float32_t *)pb);
+            pb += 4;
+            /*
+             * Read x[n-numTaps-1] sample for acc0
+             */
+            x0v = vld1q(px0);
+            x1v = vld1q(px1);
+            x2v = vld1q(px2);
+            x3v = vld1q(px3);
+            px0 += 4;
+            px1 += 4;
+            px2 += 4;
+            px3 += 4;
+
+            acc0v = vfmaq(acc0v, x0v, c0v);
+            acc1v = vfmaq(acc1v, x1v, c0v);
+            acc2v = vfmaq(acc2v, x2v, c0v);
+            acc3v = vfmaq(acc3v, x3v, c0v);
+            /*
+             * Decrement the loop counter
+             */
+            tapCnt--;
+        }
+
+        /*
+         * If the filter length is not a multiple of 4, compute the remaining filter taps
+         * should be tail predicated
+         */
+        tapCnt = numTaps % 0x4U;
+        if (tapCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(tapCnt);
+            /*
+             * Read the b[numTaps-1] coefficient
+             */
+            c0v = vldrwq_z_f32(pb, p0);
+            pb += 4;
+            /*
+             * Read x[n-numTaps-1] sample for acc0
+             */
+            x0v = vld1q(px0);
+            x1v = vld1q(px1);
+            x2v = vld1q(px2);
+            x3v = vld1q(px3);
+            px0 += 4;
+            px1 += 4;
+            px2 += 4;
+            px3 += 4;
+
+            acc0v = vfmaq_f32(acc0v, x0v, c0v);
+            acc1v = vfmaq_f32(acc1v, x1v, c0v);
+            acc2v = vfmaq_f32(acc2v, x2v, c0v);
+            acc3v = vfmaq_f32(acc3v, x3v, c0v);
+        }
+
+        /* reduction */
+        accv[0] = vecAddAcrossF32Mve(acc0v);
+        accv[1] = vecAddAcrossF32Mve(acc1v);
+        accv[2] = vecAddAcrossF32Mve(acc2v);
+        accv[3] = vecAddAcrossF32Mve(acc3v);
+
+        /*
+         * Advance the state pointer by the decimation factor
+         * to process the next group of decimation factor number samples
+         */
+        pState = pState + 4 * S->M;
+        /*
+         * The result is in the accumulator, store in the destination buffer.
+         */
+        vst1q(pDst, accv);
+        pDst += 4;
+
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    while (blkCntN4 > 0U)
+    {
+        /*
+         * Copy decimation factor number of new input samples into the state buffer
+         */
+        i = S->M;
+        do
+        {
+            *pStateCurnt++ = *pSrc++;
+        }
+        while (--i);
+        /*
+         * Set accumulator to zero
+         */
+        acc0v = vdupq_n_f32(0.0f);
+        /*
+         * Initialize state pointer
+         */
+        px = pState;
+        /*
+         * Initialize coeff pointer
+         */
+        pb = pCoeffs;
+        /*
+         * Loop unrolling.  Process 4 taps at a time.
+         */
+        tapCnt = numTaps >> 2;
+        /*
+         * Loop over the number of taps.  Unroll by a factor of 4.
+         * Repeat until we've computed numTaps-4 coefficients.
+         */
+        while (tapCnt > 0U)
+        {
+            c0v = vldrwq_f32(pb);
+            x0v = vldrwq_f32(px);
+            pb += 4;
+            px += 4;
+            acc0v = vfmaq_f32(acc0v, x0v, c0v);
+            /*
+             * Decrement the loop counter
+             */
+            tapCnt--;
+        }
+        tapCnt = numTaps % 0x4U;
+        if (tapCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(tapCnt);
+            c0v = vldrwq_z_f32(pb, p0);
+            x0v = vldrwq_f32(px);
+            acc0v = vfmaq_f32(acc0v, x0v, c0v);
+        }
+        accv[0] = vecAddAcrossF32Mve(acc0v);
+
+        /*
+         * Advance the state pointer by the decimation factor
+         * * to process the next group of decimation factor number samples
+         */
+        pState = pState + S->M;
+        /*
+         * The result is in the accumulator, store in the destination buffer.
+         */
+        *pDst++ = accv[0];
+        /*
+         * Decrement the loop counter
+         */
+        blkCntN4--;
+    }
+
+    /*
+     * Processing is complete.
+     * Now copy the last numTaps - 1 samples to the start of the state buffer.
+     * This prepares the state buffer for the next function call.
+     */
+
+    pStateCurnt = S->pState;
+    blkCnt =(numTaps - 1) >> 2;
+    while (blkCnt > 0U)
+    {
+        vst1q(pStateCurnt, vldrwq_f32(pState));
+        pState += 4;
+        pStateCurnt += 4;
+        blkCnt--;
+    }
+    blkCnt = (numTaps - 1) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0);
+    }
+}
+#else
+#if defined(ARM_MATH_NEON)
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *px;                                 /* Temporary pointer for state buffer */
+  const float32_t *pb;                           /* Temporary pointer for coefficient buffer */
+  float32_t sum0;                                /* Accumulator */
+  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
+  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+  uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+  uint32_t blkCntN4;
+  float32_t *px0, *px1, *px2, *px3;
+  float32_t x1, x2, x3;
+
+  float32x4_t accv,acc0v,acc1v,acc2v,acc3v;
+  float32x4_t x0v, x1v, x2v, x3v;
+  float32x4_t c0v;
+  float32x2_t temp;
+  float32x4_t sum0v;
+ 
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 4;
+  blkCntN4 = outBlockSize - (4 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = 4 * S->M;
+
+    do
+    {
+      *pStateCurnt++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0v = vdupq_n_f32(0.0);
+    acc1v = vdupq_n_f32(0.0);
+    acc2v = vdupq_n_f32(0.0);
+    acc3v = vdupq_n_f32(0.0);
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Loop over the number of taps. 
+     ** Repeat until we've computed numTaps-4 coefficients. */
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0v = vld1q_f32(pb);
+      pb += 4;
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0v = vld1q_f32(px0);
+      x1v = vld1q_f32(px1);
+      x2v = vld1q_f32(px2);
+      x3v = vld1q_f32(px3);
+
+      px0 += 4;
+      px1 += 4;
+      px2 += 4;
+      px3 += 4;
+     
+      acc0v = vmlaq_f32(acc0v, x0v, c0v);
+      acc1v = vmlaq_f32(acc1v, x1v, c0v);
+      acc2v = vmlaq_f32(acc2v, x2v, c0v);
+      acc3v = vmlaq_f32(acc3v, x3v, c0v);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    temp = vpadd_f32(vget_low_f32(acc0v),vget_high_f32(acc0v));
+    accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,0);
+
+    temp = vpadd_f32(vget_low_f32(acc1v),vget_high_f32(acc1v));
+    accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,1);
+
+    temp = vpadd_f32(vget_low_f32(acc2v),vget_high_f32(acc2v));
+    accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,2);
+
+    temp = vpadd_f32(vget_low_f32(acc3v),vget_high_f32(acc3v));
+    accv = vsetq_lane_f32(vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1),accv,3);
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch  state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      accv = vsetq_lane_f32(vgetq_lane_f32(accv, 0) + x0 * c0,accv,0);
+      accv = vsetq_lane_f32(vgetq_lane_f32(accv, 1) + x1 * c0,accv,1);
+      accv = vsetq_lane_f32(vgetq_lane_f32(accv, 2) + x2 * c0,accv,2);
+      accv = vsetq_lane_f32(vgetq_lane_f32(accv, 3) + x3 * c0,accv,3);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + 4 * S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    vst1q_f32(pDst,accv);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN4 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCurnt++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0v =  vdupq_n_f32(0.0);
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Loop over the number of taps.
+     ** Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
+    {
+      c0v = vld1q_f32(pb);
+      pb += 4;
+
+      x0v = vld1q_f32(px);
+      px += 4;
+
+      sum0v = vmlaq_f32(sum0v, x0v, c0v);
+      
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    temp = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
+    sum0 = vget_lane_f32(temp, 0) + vget_lane_f32(temp, 1);
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = sum0;
+
+    /* Decrement the loop counter */
+    blkCntN4--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+  i = (numTaps - 1U) >> 2;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    sum0v = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,sum0v);
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+}
+#else
+void arm_fir_decimate_f32(
+  const arm_fir_decimate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                          /* Points to the current sample of the state */
+        float32_t *px0;                                /* Temporary pointer for state buffer */
+  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
+        float32_t acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t *px1, *px2, *px3;
+        float32_t x1, x2, x3;
+        float32_t acc1, acc2, acc3;
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0 = 0.0f;
+    acc1 = 0.0f;
+    acc2 = 0.0f;
+    acc3 = 0.0f;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 4;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = acc0;
+    *pDst++ = acc1;
+    *pDst++ = acc2;
+    *pDst++ = acc3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0.0f;
+
+    /* Initialize state pointer */
+    px0 = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = acc0;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+#endif /*defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
index c782392e..15bbb78a 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q15.c
@@ -1,595 +1,595 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_fast_q15.c
- * Description:  Fast Q15 FIR Decimator
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 FIR decimator (fast variant).
-  @param[in]     S          points to an instance of the Q15 FIR decimator structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of input samples to process per call
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This fast version uses a 32-bit accumulator with 2.30 format.
-                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around and distorts the result.
-                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).
-                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
-  @remark
-                   Refer to \ref arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
-                   Both the slow and the fast versions use the same instance structure.
-                   Use function \ref arm_fir_decimate_init_q15() to initialize the filter structure.
- */
-
-#if defined (ARM_MATH_DSP)
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCur;                              /* Points to the current sample of the state */
-        q15_t *px;                                     /* Temporary pointer for state buffer */
-  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-        q31_t sum0;                                    /* Accumulators */
-        q31_t acc0, acc1;
-        q15_t *px0, *px1;
-        uint32_t blkCntN3;
-        uint32_t numTaps = S->numTaps;                 /* Number of taps */
-        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 2 * decimation factor number of new input samples into the state buffer */
-    i = S->M * 2;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = read_q15x2_ia (&px0);
-      x1 = read_q15x2_ia (&px1);
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = read_q15x2_ia (&px0);
-      x1 = read_q15x2_ia (&px1);
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch state variables for acc0, acc1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc1 = __SMLAD(x1, c0, acc1);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  while (blkCntN3 > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
-      x0 = read_q15x2_ia (&px);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
-      c1 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = read_q15x2_ia (&px);
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c1, sum0);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLAD(x0, c0, sum0);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-  i = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1U) % 0x04U;
-
-  /* Copy data */
-  while (i > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-}
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-void arm_fir_decimate_fast_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCur;                              /* Points to the current sample of the state */
-        q15_t *px;                                     /* Temporary pointer for state buffer */
-  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-        q31_t sum0;                                    /* Accumulators */
-        q31_t acc0, acc1;
-        q15_t *px0, *px1;
-        uint32_t blkCntN3;
-        uint32_t numTaps = S->numTaps;                 /* Number of taps */
-        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 2 * decimation factor number of new input samples into the state buffer */
-    i = S->M * 2;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-    px1 = pState + S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  while (blkCntN3 > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-  i = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1U) % 0x04U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-}
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_fast_q15.c
+ * Description:  Fast Q15 FIR Decimator
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR decimator (fast variant).
+  @param[in]     S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (log2 is read as log to the base 2).
+                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+  @remark
+                   Refer to \ref arm_fir_decimate_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.
+                   Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_decimate_init_q15() to initialize the filter structure.
+ */
+
+#if defined (ARM_MATH_DSP)
+
+void arm_fir_decimate_fast_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulators */
+        q31_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc1 = __SMLAD(x1, c0, acc1);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc1 = __SMLAD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch state variables for acc0, acc1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc1 = __SMLAD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+      c1 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLAD(x0, c0, sum0);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLAD(x0, c1, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLAD(x0, c0, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  i = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+}
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+void arm_fir_decimate_fast_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q31_t sum0;                                    /* Accumulators */
+        q31_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the Read b[numTaps-1] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  i = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+}
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
index f9a686d2..993f7ac7 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_fast_q31.c
@@ -1,390 +1,390 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_fast_q31.c
- * Description:  Fast Q31 FIR Decimator
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 FIR decimator (fast variant).
-  @param[in]     S          points to an instance of the Q31 FIR decimator structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
-                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
-                   These intermediate results are added to a 2.30 accumulator.
-                   Finally, the accumulator is saturated and converted to a 1.31 result.
-                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
-                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
-
-  @remark
-                   Refer to \ref arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
-                   Both the slow and the fast versions use the same instance structure.
-                   Use function \ref arm_fir_decimate_init_q31() to initialize the filter structure.
- */
-
-void arm_fir_decimate_fast_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCur;                              /* Points to the current sample of the state */
-        q31_t *px0;                                    /* Temporary pointer for state buffer */
-  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-        q63_t acc0;                                    /* Accumulator */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t *px1, *px2, *px3;
-        q31_t x1, x2, x3;
-        q63_t acc1, acc2, acc3;
-#endif
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (numTaps - 1U);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 samples at a time */
-  blkCnt = outBlockSize >> 2U;
-
-  /* Samples loop unrolled by 4 */
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 * decimation factor number of new input samples into the state buffer */
-    i = S->M * 4;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-    px2 = pState + 2 * S->M;
-    px3 = pState + 3 * S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample for acc0 */
-      x0 = *(px0++);
-      /* Read x[n-numTaps-1] sample for acc1 */
-      x1 = *(px1++);
-      /* Read x[n-numTaps-1] sample for acc2 */
-      x2 = *(px2++);
-      /* Read x[n-numTaps-1] sample for acc3 */
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch state variables for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
-      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
-      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 4;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-    *pDst++ = (q31_t) (acc2 << 1);
-    *pDst++ = (q31_t) (acc3 << 1);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining samples */
-  blkCnt = outBlockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = outBlockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x04U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_fast_q31.c
+ * Description:  Fast Q31 FIR Decimator
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR decimator (fast variant).
+  @param[in]     S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+
+  @remark
+                   Refer to \ref arm_fir_decimate_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.
+                   Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_decimate_init_q31() to initialize the filter structure.
+ */
+
+void arm_fir_decimate_fast_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *px0;                                    /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t *px1, *px2, *px3;
+        q31_t x1, x2, x3;
+        q63_t acc1, acc2, acc3;
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+      acc1 = (q31_t) ((((q63_t) acc1 << 32) + ((q63_t) x1 * c0)) >> 32);
+      acc2 = (q31_t) ((((q63_t) acc2 << 32) + ((q63_t) x2 * c0)) >> 32);
+      acc3 = (q31_t) ((((q63_t) acc3 << 32) + ((q63_t) x3 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 4;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+    *pDst++ = (q31_t) (acc1 << 1);
+    *pDst++ = (q31_t) (acc2 << 1);
+    *pDst++ = (q31_t) (acc3 << 1);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = (q31_t) ((((q63_t) acc0 << 32) + ((q63_t) x0 * c0)) >> 32);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
index 851fba29..de31b9f4 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_f32.c
@@ -1,105 +1,105 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_init_f32.c
- * Description:  Floating-point FIR Decimator initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point FIR decimator.
-  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
-  @param[in]     numTaps    number of coefficients in the filter
-  @param[in]     M          decimation factor
-  @param[in]     pCoeffs    points to the filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     blockSize  number of input samples to process per call
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS      : Operation successful
-                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_f32()</code>.
-                   <code>M</code> is the decimation factor.
- */
-
-arm_status arm_fir_decimate_init_f32(
-        arm_fir_decimate_instance_f32 * S,
-        uint16_t numTaps,
-        uint8_t M,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if ((blockSize % M) != 0U)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation Factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_init_f32.c
+ * Description:  Floating-point FIR Decimator initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR decimator.
+  @param[in,out] S          points to an instance of the floating-point FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_f32()</code>.
+                   <code>M</code> is the decimation factor.
+ */
+
+arm_status arm_fir_decimate_init_f32(
+        arm_fir_decimate_instance_f32 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The size of the input block must be a multiple of the decimation factor */
+  if ((blockSize % M) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    /* Assign Decimation Factor */
+    S->M = M;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
index 1c9894f4..b43df2a0 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q15.c
@@ -1,106 +1,106 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_init_q15.c
- * Description:  Initialization function for the Q15 FIR Decimator
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 FIR decimator.
-  @param[in,out] S          points to an instance of the Q15 FIR decimator structure
-  @param[in]     numTaps    number of coefficients in the filter
-  @param[in]     M          decimation factor
-  @param[in]     pCoeffs    points to the filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     blockSize  number of input samples to process
-  @return        execution  status
-                   - \ref ARM_MATH_SUCCESS      : Operation successful
-                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples
-                   to the call <code>arm_fir_decimate_q15()</code>.
-                   <code>M</code> is the decimation factor.
- */
-
-arm_status arm_fir_decimate_init_q15(
-        arm_fir_decimate_instance_q15 * S,
-        uint16_t numTaps,
-        uint8_t M,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if ((blockSize % M) != 0U)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation Factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_init_q15.c
+ * Description:  Initialization function for the Q15 FIR Decimator
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR decimator.
+  @param[in,out] S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process
+  @return        execution  status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples
+                   to the call <code>arm_fir_decimate_q15()</code>.
+                   <code>M</code> is the decimation factor.
+ */
+
+arm_status arm_fir_decimate_init_q15(
+        arm_fir_decimate_instance_q15 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The size of the input block must be a multiple of the decimation factor */
+  if ((blockSize % M) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    /* Assign Decimation Factor */
+    S->M = M;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
index 6317ec85..7a9490a3 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_init_q31.c
@@ -1,105 +1,105 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_init_q31.c
- * Description:  Initialization function for Q31 FIR Decimation filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 FIR decimator.
-  @param[in,out] S          points to an instance of the Q31 FIR decimator structure
-  @param[in]     numTaps    number of coefficients in the filter
-  @param[in]     M          decimation factor
-  @param[in]     pCoeffs    points to the filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     blockSize  number of input samples to process
-  @return        execution  status
-                   - \ref ARM_MATH_SUCCESS      : Operation successful
-                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_q31()</code>.
-                   <code>M</code> is the decimation factor.
- */
-
-arm_status arm_fir_decimate_init_q31(
-        arm_fir_decimate_instance_q31 * S,
-        uint16_t numTaps,
-        uint8_t M,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The size of the input block must be a multiple of the decimation factor */
-  if ((blockSize % M) != 0U)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
-    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    /* Assign Decimation Factor */
-    S->M = M;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-}
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_init_q31.c
+ * Description:  Initialization function for Q31 FIR Decimation filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR decimator.
+  @param[in,out] S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     numTaps    number of coefficients in the filter
+  @param[in]     M          decimation factor
+  @param[in]     pCoeffs    points to the filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of input samples to process
+  @return        execution  status
+                   - \ref ARM_MATH_SUCCESS      : Operation successful
+                   - \ref ARM_MATH_LENGTH_ERROR : <code>blockSize</code> is not a multiple of <code>M</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> words where <code>blockSize</code> is the number of input samples passed to <code>arm_fir_decimate_q31()</code>.
+                   <code>M</code> is the decimation factor.
+ */
+
+arm_status arm_fir_decimate_init_q31(
+        arm_fir_decimate_instance_q31 * S,
+        uint16_t numTaps,
+        uint8_t M,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The size of the input block must be a multiple of the decimation factor */
+  if ((blockSize % M) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer. The size is always (blockSize + numTaps - 1) */
+    memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    /* Assign Decimation Factor */
+    S->M = M;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+}
+
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
index 4179194d..21f18e5c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q15.c
@@ -1,595 +1,851 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_q15.c
- * Description:  Q15 FIR Decimator
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 FIR decimator.
-  @param[in]     S          points to an instance of the Q15 FIR decimator structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of input samples to process per call
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
-
- @remark
-                   Refer to \ref arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function.
- */
-
-#if defined (ARM_MATH_DSP)
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCur;                              /* Points to the current sample of the state */
-        q15_t *px;                                     /* Temporary pointer for state buffer */
-  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-        q63_t sum0;                                    /* Accumulators */
-        q63_t acc0, acc1;
-        q15_t *px0, *px1;
-        uint32_t blkCntN3;
-        uint32_t numTaps = S->numTaps;                 /* Number of taps */
-        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 2 * decimation factor number of new input samples into the state buffer */
-    i = S->M * 2;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
-      x0 = read_q15x2_ia (&px0);
-      x1 = read_q15x2_ia (&px1);
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = read_q15x2_ia (&px0);
-      x1 = read_q15x2_ia (&px1);
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch state variables for acc0, acc1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc1 = __SMLALD(x1, c0, acc1);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  while (blkCntN3 > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
-      x0 = read_q15x2_ia (&px);
-
-      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
-      c1 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
-      x0 = read_q15x2_ia (&px);
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c1, sum0);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 = __SMLALD(x0, c0, sum0);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-  i = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1U) % 0x04U;
-
-  /* Copy data */
-  while (i > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-}
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-void arm_fir_decimate_q15(
-  const arm_fir_decimate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCur;                              /* Points to the current sample of the state */
-        q15_t *px;                                     /* Temporary pointer for state buffer */
-  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
-        q63_t sum0;                                    /* Accumulators */
-        q63_t acc0, acc1;
-        q15_t *px0, *px1;
-        uint32_t blkCntN3;
-        uint32_t numTaps = S->numTaps;                 /* Number of taps */
-        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (numTaps - 1U);
-
-  /* Total number of output samples to be computed */
-  blkCnt = outBlockSize / 2;
-  blkCntN3 = outBlockSize - (2 * blkCnt);
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 2 * decimation factor number of new input samples into the state buffer */
-    i = S->M * 2;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-    acc1 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-    px1 = pState + S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the Read b[numTaps-1] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-      x1 = *px1++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 2;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  while (blkCntN3 > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    sum0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px++;
-
-      /* Perform the multiply-accumulate */
-      sum0 += x0 * c0;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* Store filter output, smlad returns the values in 2.14 format */
-    /* so downsacle by 15 to get output in 1.15 */
-    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-    /* Decrement loop counter */
-    blkCntN3--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-  i = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-  i = (numTaps - 1U) % 0x04U;
-
-  /* copy data */
-  while (i > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-}
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_q15.c
+ * Description:  Q15 FIR Decimator
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR decimator.
+  @param[in]     S          points to an instance of the Q15 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+ @remark
+                   Refer to \ref arm_fir_decimate_fast_q15() for a faster but less precise implementation of this function.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+    q15_t    *pState = S->pState;   /* State pointer */
+    const q15_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q15_t    *pStateCurnt;      /* Points to the current sample of the state */
+    const q15_t    *px, *pb;          /* Temporary pointers for state and coefficient buffers */
+    uint32_t  numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+    uint32_t  i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;   /* Loop counters */
+    uint32_t  blkCntN4;
+    const q15_t  *px0, *px1, *px2, *px3;
+    q63_t     acc0v, acc1v, acc2v, acc3v;
+    q15x8_t x0v, x1v, x2v, x3v;
+    q15x8_t c0v;
+
+    /*
+     * S->pState buffer contains previous frame (numTaps - 1) samples
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + (numTaps - 1U);
+    /*
+     * Total number of output samples to be computed
+     */
+    blkCnt = outBlockSize / 4;
+    blkCntN4 = outBlockSize - (4 * blkCnt);
+
+    while (blkCnt > 0U)
+    {
+        /*
+         * Need extra temp variables as 4 * S->M is not necessarily a multiple of 8
+         * and cause final tail predicated post incremented pointers to jump ahead
+         */
+        const q15_t      *pSrcTmp = pSrc;
+        q15_t      *pStateCurntTmp = pStateCurnt;
+
+        /*
+         * Copy 4 * decimation factor number of new input samples into the state buffer
+         */
+        i = (4 * S->M) >> 3;
+        while (i > 0U)
+        {
+            vstrhq_s16(pStateCurntTmp, vldrhq_s16(pSrcTmp));
+            pSrcTmp += 8;
+            pStateCurntTmp += 8;
+            i--;
+        }
+        i = (4 * S->M) & 7;
+        if (i > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(i);
+            vstrhq_p_s16(pStateCurntTmp, vldrhq_s16(pSrcTmp), p0);
+        }
+
+        pSrc += (4 * S->M);
+        pStateCurnt += (4 * S->M);
+
+        /*
+         * Clear all accumulators
+         */
+        acc0v = 0LL;
+        acc1v = 0LL;
+        acc2v = 0LL;
+        acc3v = 0LL;
+        /*
+         * Initialize state pointer for all the samples
+         */
+        px0 = pState;
+        px1 = pState + S->M;
+        px2 = pState + 2 * S->M;
+        px3 = pState + 3 * S->M;
+        /*
+         * Initialize coeff. pointer
+         */
+        pb = pCoeffs;
+
+        tapCnt = numTaps >> 3;
+        /*
+         * Loop over the number of taps.  Unroll by a factor of 4.
+         * Repeat until we've computed numTaps-4 coefficients.
+         */
+        while (tapCnt > 0U)
+        {
+            /*
+             * Read the b[numTaps-1] coefficient
+             */
+            c0v = vldrhq_s16(pb);
+            pb += 8;
+            /*
+             * Read x[n-numTaps-1] sample for acc0
+             */
+            x0v = vld1q(px0);
+            x1v = vld1q(px1);
+            x2v = vld1q(px2);
+            x3v = vld1q(px3);
+            px0 += 8;
+            px1 += 8;
+            px2 += 8;
+            px3 += 8;
+
+            acc0v = vmlaldavaq(acc0v, x0v, c0v);
+            acc1v = vmlaldavaq(acc1v, x1v, c0v);
+            acc2v = vmlaldavaq(acc2v, x2v, c0v);
+            acc3v = vmlaldavaq(acc3v, x3v, c0v);
+            /*
+             * Decrement the loop counter
+             */
+            tapCnt--;
+        }
+
+        /*
+         * If the filter length is not a multiple of 4, compute the remaining filter taps
+         * should be tail predicated
+         */
+        tapCnt = numTaps & 7;
+        if (tapCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(tapCnt);
+            /*
+             * Read the b[numTaps-1] coefficient
+             */
+            c0v = vldrhq_z_s16(pb, p0);
+            pb += 8;
+            /*
+             * Read x[n-numTaps-1] sample for acc0
+             */
+            x0v = vld1q(px0);
+            x1v = vld1q(px1);
+            x2v = vld1q(px2);
+            x3v = vld1q(px3);
+            px0 += 8;
+            px1 += 8;
+            px2 += 8;
+            px3 += 8;
+
+            acc0v = vmlaldavaq(acc0v, x0v, c0v);
+            acc1v = vmlaldavaq(acc1v, x1v, c0v);
+            acc2v = vmlaldavaq(acc2v, x2v, c0v);
+            acc3v = vmlaldavaq(acc3v, x3v, c0v);
+        }
+
+        acc0v = asrl(acc0v, 15);
+        acc1v = asrl(acc1v, 15);
+        acc2v = asrl(acc2v, 15);
+        acc3v = asrl(acc3v, 15);
+        /*
+         * store in the destination buffer.
+         */
+        *pDst++ = (q15_t) __SSAT((q31_t) acc0v, 16);
+        *pDst++ = (q15_t) __SSAT((q31_t) acc1v, 16);;
+        *pDst++ = (q15_t) __SSAT((q31_t) acc2v, 16);;
+        *pDst++ = (q15_t) __SSAT((q31_t) acc3v, 16);;
+
+        /*
+         * Advance the state pointer by the decimation factor
+         * to process the next group of decimation factor number samples
+         */
+        pState = pState + 4 * S->M;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    while (blkCntN4 > 0U)
+    {
+        /*
+         * Copy decimation factor number of new input samples into the state buffer
+         */
+        i = S->M;
+        do
+        {
+            *pStateCurnt++ = *pSrc++;
+        }
+        while (--i);
+        /*
+         * Set accumulator to zero
+         */
+        acc0v = 0LL;
+        /*
+         * Initialize state pointer
+         */
+        px = pState;
+        /*
+         * Initialize coeff. pointer
+         */
+        pb = pCoeffs;
+
+        tapCnt = numTaps >> 3;
+        while (tapCnt > 0U)
+        {
+            c0v = vldrhq_s16(pb);
+            x0v = vldrhq_s16(px);
+            pb += 8;
+            px += 8;
+            acc0v = vmlaldavaq(acc0v, x0v, c0v);
+            /*
+             * Decrement the loop counter
+             */
+            tapCnt--;
+        }
+
+        tapCnt = numTaps & 7;
+        if (tapCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(tapCnt);
+            c0v = vldrhq_z_s16(pb, p0);
+            x0v = vldrhq_z_s16(px, p0);
+            acc0v = vmlaldavaq_p(acc0v, x0v, c0v, p0);
+        }
+
+        acc0v = asrl(acc0v, 15);
+
+        /*
+         * Advance the state pointer by the decimation factor
+         * to process the next group of decimation factor number samples
+         */
+        pState = pState + S->M;
+        /*
+         * The result is in the accumulator, store in the destination buffer.
+         */
+        *pDst++ = (q15_t) __SSAT((q31_t) acc0v, 16);
+        /*
+         * Decrement the loop counter
+         */
+        blkCntN4--;
+    }
+
+    /*
+     * Processing is complete.
+     * Now copy the last numTaps - 1 samples to the start of the state buffer.
+     * This prepares the state buffer for the next function call.
+     */
+
+    pStateCurnt = S->pState;
+    blkCnt = (numTaps - 1) >> 3;
+    while (blkCnt > 0U)
+    {
+        vstrhq_s16(pStateCurnt, vldrhq_s16(pState));
+        pState += 8;
+        pStateCurnt += 8;
+        blkCnt--;
+    }
+    blkCnt = (numTaps - 1) & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0);
+    }  
+}
+#else
+#if defined (ARM_MATH_DSP)
+
+void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulators */
+        q63_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t c1;                                      /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2]sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc1 = __SMLALD(x1, c0, acc1);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficient */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px0);
+      x1 = read_q15x2_ia (&px1);
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc1 = __SMLALD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch state variables for acc0, acc1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc1 = __SMLALD(x1, c0, acc1);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] and b[numTaps-2] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Read x[n-numTaps-1] and x[n-numTaps-2] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Read the b[numTaps-3] and b[numTaps-4] coefficients */
+      c1 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLALD(x0, c0, sum0);
+
+      /* Read x[n-numTaps-2] and x[n-numTaps-3] sample */
+      x0 = read_q15x2_ia (&px);
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLALD(x0, c1, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 = __SMLALD(x0, c0, sum0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+  i = (numTaps - 1U) >> 2U;
+ 
+  /* copy data */
+  while (i > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* Copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+}
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+void arm_fir_decimate_q15(
+  const arm_fir_decimate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q15_t x0, x1, c0;                              /* Temporary variables to hold state and coefficient values */
+        q63_t sum0;                                    /* Accumulators */
+        q63_t acc0, acc1;
+        q15_t *px0, *px1;
+        uint32_t blkCntN3;
+        uint32_t numTaps = S->numTaps;                 /* Number of taps */
+        uint32_t i, blkCnt, tapCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+  /* Total number of output samples to be computed */
+  blkCnt = outBlockSize / 2;
+  blkCntN3 = outBlockSize - (2 * blkCnt);
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 2 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 2;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+    acc1 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+    px1 = pState + S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the Read b[numTaps-1] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] for sample 0 and for sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] for sample 0 and sample 1 */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+      x1 = *px1++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 2;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+    *pDst++ = (q15_t) (__SSAT((acc1 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  while (blkCntN3 > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    sum0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px++;
+
+      /* Perform the multiply-accumulate */
+      sum0 += x0 * c0;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* Store filter output, smlad returns the values in 2.14 format */
+    /* so downsacle by 15 to get output in 1.15 */
+    *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+    /* Decrement loop counter */
+    blkCntN3--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  i = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  i = (numTaps - 1U) % 0x04U;
+
+  /* copy data */
+  while (i > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+}
+
+#endif /* #if defined (ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) */
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
index 41cea049..77bfc168 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_decimate_q31.c
@@ -1,387 +1,634 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_decimate_q31.c
- * Description:  Q31 FIR Decimator
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_decimate
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 FIR decimator.
-  @param[in]     S          points to an instance of the Q31 FIR decimator structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clip.
-                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
-                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
-
- @remark
-                   Refer to \ref arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function.
- */
-
-void arm_fir_decimate_q31(
-  const arm_fir_decimate_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCur;                              /* Points to the current sample of the state */
-        q31_t *px0;                                    /* Temporary pointer for state buffer */
-  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
-        q63_t acc0;                                    /* Accumulator */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t *px1, *px2, *px3;
-        q31_t x1, x2, x3;
-        q63_t acc1, acc2, acc3;
-#endif
-
-  /* S->pState buffer contains previous frame (numTaps - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (numTaps - 1U);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 samples at a time */
-  blkCnt = outBlockSize >> 2U;
-
-  /* Samples loop unrolled by 4 */
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 * decimation factor number of new input samples into the state buffer */
-    i = S->M * 4;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer for all the samples */
-    px0 = pState;
-    px1 = pState + S->M;
-    px2 = pState + 2 * S->M;
-    px3 = pState + 3 * S->M;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-1] sample for acc0 */
-      x0 = *(px0++);
-      /* Read x[n-numTaps-1] sample for acc1 */
-      x1 = *(px1++);
-      /* Read x[n-numTaps-1] sample for acc2 */
-      x2 = *(px2++);
-      /* Read x[n-numTaps-1] sample for acc3 */
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-      acc1 += (q63_t) x1 * c0;
-      acc2 += (q63_t) x2 * c0;
-      acc3 += (q63_t) x3 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-      acc1 += (q63_t) x1 * c0;
-      acc2 += (q63_t) x2 * c0;
-      acc3 += (q63_t) x3 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-      acc1 += (q63_t) x1 * c0;
-      acc2 += (q63_t) x2 * c0;
-      acc3 += (q63_t) x3 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-      acc1 += (q63_t) x1 * c0;
-      acc2 += (q63_t) x2 * c0;
-      acc3 += (q63_t) x3 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch state variables for acc0, acc1, acc2, acc3 */
-      x0 = *(px0++);
-      x1 = *(px1++);
-      x2 = *(px2++);
-      x3 = *(px3++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-      acc1 += (q63_t) x1 * c0;
-      acc2 += (q63_t) x2 * c0;
-      acc3 += (q63_t) x3 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M * 4;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31);
-    *pDst++ = (q31_t) (acc1 >> 31);
-    *pDst++ = (q31_t) (acc2 >> 31);
-    *pDst++ = (q31_t) (acc3 >> 31);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining samples */
-  blkCnt = outBlockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = outBlockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy decimation factor number of new input samples into the state buffer */
-    i = S->M;
-
-    do
-    {
-      *pStateCur++ = *pSrc++;
-
-    } while (--i);
-
-    /* Set accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px0 = pState;
-
-    /* Initialize coeff pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-1] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-2] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-3] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *pb++;
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of taps */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *pb++;
-
-      /* Fetch 1 state variable */
-      x0 = *px0++;
-
-      /* Perform the multiply-accumulate */
-      acc0 += (q63_t) x0 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by the decimation factor
-     * to process the next group of decimation factor number samples */
-    pState = pState + S->M;
-
-    /* The result is in the accumulator, store in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x04U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR_decimate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_decimate_q31.c
+ * Description:  Q31 FIR Decimator
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_decimate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR decimator.
+  @param[in]     S          points to an instance of the Q31 FIR decimator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits (where log2 is read as log to the base 2).
+                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+
+ @remark
+                   Refer to \ref arm_fir_decimate_fast_q31() for a faster but less precise implementation of this function.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_fir_decimate_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    q31_t    *pState = S->pState;   /* State pointer */
+    const q31_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q31_t    *pStateCurnt;      /* Points to the current sample of the state */
+    const q31_t    *px, *pb;          /* Temporary pointers for state and coefficient buffers */
+    uint32_t  numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+    uint32_t  i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;   /* Loop counters */
+    uint32_t  blkCntN4;
+    const q31_t    *px0, *px1, *px2, *px3;
+    q63_t     acc0v, acc1v, acc2v, acc3v;
+    q31x4_t x0v, x1v, x2v, x3v;
+    q31x4_t c0v;
+
+    /*
+     * S->pState buffer contains previous frame (numTaps - 1) samples
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + (numTaps - 1U);
+    /*
+     * Total number of output samples to be computed
+     */
+    blkCnt = outBlockSize / 4;
+    blkCntN4 = outBlockSize - (4 * blkCnt);
+
+    while (blkCnt > 0U)
+    {
+        /*
+         * Copy 4 * decimation factor number of new input samples into the state buffer
+         */
+        i = (4 * S->M) >> 2;
+        do
+        {
+            vst1q(pStateCurnt, vldrwq_s32(pSrc));
+            pSrc += 4;
+            pStateCurnt += 4;
+            i--;
+        }
+        while (i > 0U);
+
+        /*
+         * Clear all accumulators
+         */
+        acc0v = 0LL;
+        acc1v = 0LL;
+        acc2v = 0LL;
+        acc3v = 0LL;
+        /*
+         * Initialize state pointer for all the samples
+         */
+        px0 = pState;
+        px1 = pState + S->M;
+        px2 = pState + 2 * S->M;
+        px3 = pState + 3 * S->M;
+        /*
+         * Initialize coeff. pointer
+         */
+        pb = pCoeffs;
+        /*
+         * Loop unrolling.  Process 4 taps at a time.
+         */
+        tapCnt = numTaps >> 2;
+        /*
+         * Loop over the number of taps.  Unroll by a factor of 4.
+         * Repeat until we've computed numTaps-4 coefficients.
+         */
+        while (tapCnt > 0U)
+        {
+            /*
+             * Read the b[numTaps-1] coefficient
+             */
+            c0v = vldrwq_s32(pb);
+            pb += 4;
+            /*
+             * Read x[n-numTaps-1] sample for acc0
+             */
+            x0v = vld1q(px0);
+            x1v = vld1q(px1);
+            x2v = vld1q(px2);
+            x3v = vld1q(px3);
+            px0 += 4;
+            px1 += 4;
+            px2 += 4;
+            px3 += 4;
+
+            acc0v = vrmlaldavhaq(acc0v, x0v, c0v);
+            acc1v = vrmlaldavhaq(acc1v, x1v, c0v);
+            acc2v = vrmlaldavhaq(acc2v, x2v, c0v);
+            acc3v = vrmlaldavhaq(acc3v, x3v, c0v);
+            /*
+             * Decrement the loop counter
+             */
+            tapCnt--;
+        }
+
+        /*
+         * If the filter length is not a multiple of 4, compute the remaining filter taps
+         * should be tail predicated
+         */
+        tapCnt = numTaps % 0x4U;
+        if (tapCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(tapCnt);
+            /*
+             * Read the b[numTaps-1] coefficient
+             */
+            c0v = vldrwq_z_s32(pb, p0);
+            pb += 4;
+            /*
+             * Read x[n-numTaps-1] sample for acc0
+             */
+            x0v = vld1q(px0);
+            x1v = vld1q(px1);
+            x2v = vld1q(px2);
+            x3v = vld1q(px3);
+            px0 += 4;
+            px1 += 4;
+            px2 += 4;
+            px3 += 4;
+
+            acc0v = vrmlaldavhaq(acc0v, x0v, c0v);
+            acc1v = vrmlaldavhaq(acc1v, x1v, c0v);
+            acc2v = vrmlaldavhaq(acc2v, x2v, c0v);
+            acc3v = vrmlaldavhaq(acc3v, x3v, c0v);
+        }
+
+        acc0v = asrl(acc0v, 31 - 8);
+        acc1v = asrl(acc1v, 31 - 8);
+        acc2v = asrl(acc2v, 31 - 8);
+        acc3v = asrl(acc3v, 31 - 8);
+        /*
+         * store in the destination buffer.
+         */
+        *pDst++ = (q31_t) acc0v;
+        *pDst++ = (q31_t) acc1v;
+        *pDst++ = (q31_t) acc2v;
+        *pDst++ = (q31_t) acc3v;
+
+        /*
+         * Advance the state pointer by the decimation factor
+         * to process the next group of decimation factor number samples
+         */
+        pState = pState + 4 * S->M;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    while (blkCntN4 > 0U)
+    {
+        /*
+         * Copy decimation factor number of new input samples into the state buffer
+         */
+        i = S->M;
+        do
+        {
+            *pStateCurnt++ = *pSrc++;
+        }
+        while (--i);
+        /*
+         * Set accumulator to zero
+         */
+        acc0v = 0LL;
+        /*
+         * Initialize state pointer
+         */
+        px = pState;
+        /*
+         * Initialize coeff. pointer
+         */
+        pb = pCoeffs;
+        /*
+         * Loop unrolling.  Process 4 taps at a time.
+         */
+        tapCnt = numTaps >> 2;
+        /*
+         * Loop over the number of taps.  Unroll by a factor of 4.
+         * Repeat until we've computed numTaps-4 coefficients.
+         */
+        while (tapCnt > 0U)
+        {
+            c0v = vldrwq_s32(pb);
+            x0v = vldrwq_s32(px);
+            pb += 4;
+            px += 4;
+            acc0v = vrmlaldavhaq(acc0v, x0v, c0v);
+            /*
+             * Decrement the loop counter
+             */
+            tapCnt--;
+        }
+        tapCnt = numTaps % 0x4U;
+        if (tapCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(tapCnt);
+            c0v = vldrwq_z_s32(pb, p0);
+            x0v = vldrwq_z_s32(px, p0);
+            acc0v = vrmlaldavhaq_p(acc0v, x0v, c0v, p0);
+        }
+        acc0v = asrl(acc0v, 31 - 8);
+
+        /*
+         * Advance the state pointer by the decimation factor
+         * * to process the next group of decimation factor number samples
+         */
+        pState = pState + S->M;
+        /*
+         * The result is in the accumulator, store in the destination buffer.
+         */
+        *pDst++ = (q31_t) acc0v;
+        /*
+         * Decrement the loop counter
+         */
+        blkCntN4--;
+    }
+
+    /*
+     * Processing is complete.
+     * Now copy the last numTaps - 1 samples to the start of the state buffer.
+     * This prepares the state buffer for the next function call.
+     */
+    pStateCurnt = S->pState;
+    blkCnt = (numTaps - 1) >> 2;
+    while (blkCnt > 0U)
+    {
+        vst1q(pStateCurnt, vldrwq_s32(pState));
+        pState += 4;
+        pStateCurnt += 4;
+        blkCnt--;
+    }
+    blkCnt = (numTaps - 1) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_s32(pStateCurnt, vldrwq_s32(pState), p0);
+    }
+}
+#else
+void arm_fir_decimate_q31(
+  const arm_fir_decimate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *px0;                                    /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t x0, c0;                                  /* Temporary variables to hold state and coefficient values */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt, outBlockSize = blockSize / S->M;  /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t *px1, *px2, *px3;
+        q31_t x1, x2, x3;
+        q63_t acc1, acc2, acc3;
+#endif
+
+  /* S->pState buffer contains previous frame (numTaps - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (numTaps - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 samples at a time */
+  blkCnt = outBlockSize >> 2U;
+
+  /* Samples loop unrolled by 4 */
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 * decimation factor number of new input samples into the state buffer */
+    i = S->M * 4;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer for all the samples */
+    px0 = pState;
+    px1 = pState + S->M;
+    px2 = pState + 2 * S->M;
+    px3 = pState + 3 * S->M;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-1] sample for acc0 */
+      x0 = *(px0++);
+      /* Read x[n-numTaps-1] sample for acc1 */
+      x1 = *(px1++);
+      /* Read x[n-numTaps-1] sample for acc2 */
+      x2 = *(px2++);
+      /* Read x[n-numTaps-1] sample for acc3 */
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-2] sample for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch state variables for acc0, acc1, acc2, acc3 */
+      x0 = *(px0++);
+      x1 = *(px1++);
+      x2 = *(px2++);
+      x3 = *(px3++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+      acc1 += (q63_t) x1 * c0;
+      acc2 += (q63_t) x2 * c0;
+      acc3 += (q63_t) x3 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M * 4;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31);
+    *pDst++ = (q31_t) (acc1 >> 31);
+    *pDst++ = (q31_t) (acc2 >> 31);
+    *pDst++ = (q31_t) (acc3 >> 31);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining samples */
+  blkCnt = outBlockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = outBlockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy decimation factor number of new input samples into the state buffer */
+    i = S->M;
+
+    do
+    {
+      *pStateCur++ = *pSrc++;
+
+    } while (--i);
+
+    /* Set accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px0 = pState;
+
+    /* Initialize coeff pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-1] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-2] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-3] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *pb++;
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of taps */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *pb++;
+
+      /* Fetch 1 state variable */
+      x0 = *px0++;
+
+      /* Perform the multiply-accumulate */
+      acc0 += (q63_t) x0 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by the decimation factor
+     * to process the next group of decimation factor number samples */
+    pState = pState + S->M;
+
+    /* The result is in the accumulator, store in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x04U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+/**
+  @} end of FIR_decimate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f16.c
new file mode 100755
index 00000000..f89c2d37
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f16.c
@@ -0,0 +1,940 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_f16.c
+ * Description:  Floating-point FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupFilters
+ */
+
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR filter.
+  @param[in]     S          points to an instance of the floating-point FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define FIR_F32_MAX_COEF_BLK        8
+
+#define FIR_F16_CORE(pSamples, c, NB_TAPS)                                 \
+        vecAcc0 = vdupq_n_f16(0.0f16);                                     \
+        for (int i = 0; i < NB_TAPS; i++) {                                \
+            vecIn0 = vld1q(&pSamples[i]);                                  \
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c[i]);                        \
+        }
+
+#define NB_TAPS 4
+__STATIC_INLINE void arm_fir_f16_1_4_mve(const arm_fir_instance_f16 * S, 
+    const float16_t * __restrict pSrc, 
+    float16_t * __restrict pDst, uint32_t blockSize)
+{
+    float16_t      *pState = S->pState;     /* State pointer */
+    const float16_t *pCoeffs = S->pCoeffs;  /* Coefficient pointer */
+    float16_t      *pStateCur;              /* Points to the current sample of the state */
+    const float16_t *pSamples;              /* Temporary pointer to the sample buffer */
+    float16_t      *pOutput;                /* Temporary pointer to the output buffer */
+    const float16_t *pTempSrc;              /* Temporary pointer to the source data */
+    float16_t      *pTempDest;              /* Temporary pointer to the destination buffer */
+    uint32_t        numTaps = S->numTaps;   /* Number of filter coefficients in the filter */
+    int32_t         blkCnt;
+    float16x8_t         vecIn0;
+    float16x8_t         vecAcc0;
+    float16_t       c[NB_TAPS];
+
+
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur = &(pState[(numTaps - 1u)]);
+    /*
+     * Copy new data into state so that we obtain a continuous sample buffer
+     * containing both the tail end of the old data and the new data.
+     */
+    pSamples = pState;
+    pTempSrc = pSrc;
+    pOutput = pDst;
+
+    for (int i = 0; i < NB_TAPS; i++)
+        c[i] = pCoeffs[i];
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0) {
+        /*
+         * Save 8 input samples in the history buffer
+         */
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 8;
+        pTempSrc += 8;
+
+        FIR_F16_CORE(pSamples, c, NB_TAPS);
+
+        vst1q(pOutput, vecAcc0);
+
+        pOutput += 8;
+        pSamples += 8;
+
+        blkCnt--;
+    }
+
+    blkCnt = blockSize & 7;
+    if (blkCnt)
+    {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 8;
+        pTempSrc += 8;
+
+        FIR_F16_CORE(pSamples, c, NB_TAPS);
+
+        vstrhq_p_f16(pOutput, vecAcc0, p0);
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = numTaps >> 3;
+    while (blkCnt > 0) {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 8;
+        pTempDest += 8;
+        blkCnt--;
+    }
+    blkCnt = numTaps & 7;
+    if (blkCnt > 0) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+        vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0);
+    }
+
+}
+#undef NB_TAPS
+
+#define NB_TAPS 8
+__STATIC_INLINE void arm_fir_f16_5_8_mve(const arm_fir_instance_f16 * S, 
+    const float16_t * __restrict pSrc, 
+    float16_t * __restrict pDst, uint32_t blockSize)
+{
+    float16_t      *pState = S->pState;     /* State pointer */
+    const float16_t *pCoeffs = S->pCoeffs;  /* Coefficient pointer */
+    float16_t      *pStateCur;              /* Points to the current sample of the state */
+    const float16_t *pSamples;              /* Temporary pointer to the sample buffer */
+    float16_t      *pOutput;                /* Temporary pointer to the output buffer */
+    const float16_t *pTempSrc;              /* Temporary pointer to the source data */
+    float16_t      *pTempDest;              /* Temporary pointer to the destination buffer */
+    uint32_t        numTaps = S->numTaps;   /* Number of filter coefficients in the filter */
+    int32_t         blkCnt;
+    float16x8_t         vecIn0;
+    float16x8_t         vecAcc0;
+    float16_t       c[NB_TAPS];
+
+
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur = &(pState[(numTaps - 1u)]);
+    /*
+     * Copy new data into state so that we obtain a continuous sample buffer
+     * containing both the tail end of the old data and the new data.
+     */
+    pSamples = pState;
+    pTempSrc = pSrc;
+    pOutput = pDst;
+
+    for (int i = 0; i < NB_TAPS; i++)
+        c[i] = pCoeffs[i];
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0) {
+        /*
+         * Save 8 input samples in the history buffer
+         */
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 8;
+        pTempSrc += 8;
+
+        FIR_F16_CORE(pSamples, c, NB_TAPS);
+
+        vst1q(pOutput, vecAcc0);
+
+        pOutput += 8;
+        pSamples += 8;
+
+        blkCnt--;
+    }
+
+    blkCnt = blockSize & 7;
+    if (blkCnt)
+    {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 8;
+        pTempSrc += 8;
+
+        FIR_F16_CORE(pSamples, c, NB_TAPS);
+
+        vstrhq_p_f16(pOutput, vecAcc0, p0);
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = numTaps >> 3;
+    while (blkCnt > 0) {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 8;
+        pTempDest += 8;
+        blkCnt--;
+    }
+    blkCnt = numTaps & 7;
+    if (blkCnt > 0) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+        vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0);
+    }
+
+}
+#undef NB_TAPS
+
+void arm_fir_f16(const arm_fir_instance_f16 * S, 
+  const float16_t * pSrc, 
+  float16_t * pDst, 
+  uint32_t blockSize)
+{
+    float16_t *pRefStatePtr = S->pState + ROUND_UP(blockSize, 8);
+    float16_t *pState = pRefStatePtr ;      /* State pointer */
+    const float16_t *pCoeffs = S->pCoeffs;      /* Coefficient pointer */
+    const float16_t *pSamples;  /* Temporary pointer to the sample buffer */
+    float16_t      *pOutput;    /* Temporary pointer to the output buffer */
+    const float16_t *pTempSrc;  /* Temporary pointer to the source data */
+    float16_t      *pTempDest;  /* Temporary pointer to the destination buffer */
+    uint32_t        numTaps = S->numTaps;       /* Number of filter coefficients in the filter */
+    uint32_t        blkCnt;
+    float16_t       c0, c1, c2, c3;
+    float16_t       c4, c5, c6, c7;
+
+    /*
+     * [1 to 8 taps] specialized routines
+     */
+    if (numTaps <= 4) {
+        arm_fir_f16_1_4_mve(S, pSrc, pDst, blockSize);
+        return;
+    } else if (numTaps <= 8) {
+        arm_fir_f16_5_8_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+
+    pTempSrc = pSrc;
+    pTempDest = &(pState[(numTaps - 1u)]);
+    int             cnt = blockSize;
+    do {
+        mve_pred16_t    p0 = vctp16q(cnt);
+        vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0);
+        pTempDest += 8;
+        pTempSrc += 8;
+        cnt -= 8;
+    } while (cnt > 0);
+
+    float16_t      *partial_accu_ptr = S->pState;
+
+    pSamples = pState;
+    c0 = *pCoeffs++;
+    c1 = *pCoeffs++;
+    c2 = *pCoeffs++;
+    c3 = *pCoeffs++;
+    c4 = *pCoeffs++;
+    c5 = *pCoeffs++;
+    c6 = *pCoeffs++;
+    c7 = *pCoeffs++;
+
+    cnt = blockSize >> 3;
+    while (cnt > 0) {
+        float16x8_t     vecAcc0;
+        float16x8_t     vecIn0;
+
+        vecIn0 = vld1q(pSamples);
+        vecAcc0 = vmulq(vecIn0, c0);
+        vecIn0 = vld1q(&pSamples[1]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+        vecIn0 = vld1q(&pSamples[2]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+        vecIn0 = vld1q(&pSamples[3]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+        vecIn0 = vld1q(&pSamples[4]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+        vecIn0 = vld1q(&pSamples[5]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+        vecIn0 = vld1q(&pSamples[6]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+        vecIn0 = vld1q(&pSamples[7]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+        pSamples += 8;
+        vst1q(partial_accu_ptr, vecAcc0);
+        cnt--;
+        partial_accu_ptr += 8;
+    }
+
+    cnt = blockSize & 7;
+    if (cnt > 0) {
+        float16x8_t     vecAcc0;
+        float16x8_t     vecIn0;
+
+        mve_pred16_t p0 = vctp16q(cnt);
+
+
+        vecIn0 = vld1q(pSamples);
+        vecAcc0 = vmulq(vecIn0, c0);
+        vecIn0 = vld1q(&pSamples[1]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+        vecIn0 = vld1q(&pSamples[2]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+        vecIn0 = vld1q(&pSamples[3]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+        vecIn0 = vld1q(&pSamples[4]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+        vecIn0 = vld1q(&pSamples[5]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+        vecIn0 = vld1q(&pSamples[6]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+        vecIn0 = vld1q(&pSamples[7]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+        vstrhq_p_f16(partial_accu_ptr, vecAcc0,p0);
+    }
+
+    int             localTaps = numTaps - FIR_F32_MAX_COEF_BLK;
+    int             sample_offset = FIR_F32_MAX_COEF_BLK;
+    while (localTaps > FIR_F32_MAX_COEF_BLK) {
+        c0 = *pCoeffs++;
+        c1 = *pCoeffs++;
+        c2 = *pCoeffs++;
+        c3 = *pCoeffs++;
+        c4 = *pCoeffs++;
+        c5 = *pCoeffs++;
+        c6 = *pCoeffs++;
+        c7 = *pCoeffs++;
+
+        partial_accu_ptr = S->pState;
+        pSamples = pState + sample_offset;
+        int  cnt = blockSize >> 3;
+        while (cnt > 0) {
+            float16x8_t     vecAcc0;
+            float16x8_t     vecIn0;
+
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            pSamples += 8;
+            vecAcc0 += vld1q_f16(partial_accu_ptr);
+            vst1q(partial_accu_ptr, vecAcc0);
+            cnt--;
+            partial_accu_ptr += 8;
+        }
+
+        cnt = blockSize & 7;
+        if (cnt > 0) {
+            float16x8_t     vecAcc0;
+            float16x8_t     vecIn0;
+
+            mve_pred16_t p0 = vctp16q(cnt);
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            vecAcc0 += vld1q_f16(partial_accu_ptr);
+            vstrhq_p_f16(partial_accu_ptr, vecAcc0,p0);
+        }
+
+        localTaps -= FIR_F32_MAX_COEF_BLK;
+        sample_offset += FIR_F32_MAX_COEF_BLK;
+    }
+
+    pSamples = pState + sample_offset;
+
+    if (localTaps > 4) {
+        c0 = *pCoeffs++;
+        c1 = *pCoeffs++;
+        c2 = *pCoeffs++;
+        c3 = *pCoeffs++;
+        c4 = *pCoeffs++;
+        c5 = *pCoeffs++;
+        c6 = *pCoeffs++;
+        c7 = *pCoeffs++;
+        pOutput = pDst;
+
+        partial_accu_ptr = S->pState;
+        cnt = blockSize >> 3;
+        while (cnt > 0) {
+            float16x8_t     vecAcc0;
+            float16x8_t     vecIn0;
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            pSamples += 8;
+            float16x8_t     pap = vld1q_f16(partial_accu_ptr);
+            vst1q(pOutput, vecAcc0 + pap);
+            cnt--;
+            partial_accu_ptr += 8;
+            pOutput += 8;
+        }
+
+        cnt = blockSize & 7;
+        if (cnt > 0) {
+            float16x8_t     vecAcc0;
+            float16x8_t     vecIn0;
+
+            mve_pred16_t p0 = vctp16q(cnt);
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            float16x8_t     pap = vld1q_f16(partial_accu_ptr);
+            vstrhq_p_f16(pOutput, vecAcc0 + pap, p0);
+            pOutput += cnt;
+        }
+
+    } else {
+        c0 = *pCoeffs++;
+        c1 = *pCoeffs++;
+        c2 = *pCoeffs++;
+        c3 = *pCoeffs++;
+        pOutput = pDst;
+
+        partial_accu_ptr = S->pState;
+        cnt = blockSize >> 3;
+        while (cnt > 0) {
+            float16x8_t     vecAcc0;
+            float16x8_t     vecIn0;
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            pSamples += 8;
+            float16x8_t     pap = vld1q_f16(partial_accu_ptr);
+            vst1q(pOutput, vecAcc0 + pap);
+            cnt--;
+            partial_accu_ptr += 8;
+            pOutput += 8;
+        }
+
+        cnt = blockSize & 7;
+        if (cnt > 0) {
+            float16x8_t     vecAcc0;
+            float16x8_t     vecIn0;
+
+            mve_pred16_t p0 = vctp16q(cnt);
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            float16x8_t     pap = vld1q_f16(partial_accu_ptr);
+            vstrhq_p_f16(pOutput, vecAcc0 + pap, p0);
+            pOutput += cnt;
+        }
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = numTaps >> 3;
+    while (blkCnt > 0U) {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 8;
+        pTempDest += 8;
+        blkCnt--;
+    }
+    blkCnt = numTaps & 7;
+    if (blkCnt > 0U) {
+        mve_pred16_t    p0 = vctp16q(blkCnt);
+        vstrhq_p_f16(pTempDest, vld1q(pTempSrc), p0);
+    }
+}
+
+#else
+
+void arm_fir_f16(
+  const arm_fir_instance_f16 * S,
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        float16_t *pState = S->pState;                 /* State pointer */
+  const float16_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float16_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float16_t *px;                                 /* Temporary pointer for state buffer */
+  const float16_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        _Float16 acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        _Float16 acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
+        _Float16 x0, x1, x2, x3, x4, x5, x6, x7;               /* Temporary variables to hold state values */
+        _Float16 c0;                                           /* Temporary variable to hold coefficient value */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 8 output values simultaneously.
+   * The variables acc0 ... acc7 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+
+  blkCnt = blockSize >> 3U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0.0f;
+    acc1 = 0.0f;
+    acc2 = 0.0f;
+    acc3 = 0.0f;
+    acc4 = 0.0f;
+    acc5 = 0.0f;
+    acc6 = 0.0f;
+    acc7 = 0.0f;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* This is separated from the others to avoid
+     * a call to __aeabi_memmove which would be slower
+     */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Read the first 7 samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+    x3 = *px++;
+    x4 = *px++;
+    x5 = *px++;
+    x6 = *px++;
+
+    /* Loop unrolling: process 8 taps at a time. */
+    tapCnt = numTaps >> 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample */
+      x7 = *(px++);
+
+      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
+      acc0 += x0 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
+      acc1 += x1 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
+      acc2 += x2 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
+      acc3 += x3 * c0;
+
+      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
+      acc4 += x4 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
+      acc5 += x5 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
+      acc6 += x6 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
+      acc7 += x7 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x1 * c0;
+      acc1 += x2 * c0;
+      acc2 += x3 * c0;
+      acc3 += x4 * c0;
+      acc4 += x5 * c0;
+      acc5 += x6 * c0;
+      acc6 += x7 * c0;
+      acc7 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x2 * c0;
+      acc1 += x3 * c0;
+      acc2 += x4 * c0;
+      acc3 += x5 * c0;
+      acc4 += x6 * c0;
+      acc5 += x7 * c0;
+      acc6 += x0 * c0;
+      acc7 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x3 * c0;
+      acc1 += x4 * c0;
+      acc2 += x5 * c0;
+      acc3 += x6 * c0;
+      acc4 += x7 * c0;
+      acc5 += x0 * c0;
+      acc6 += x1 * c0;
+      acc7 += x2 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x3 = *(px++);
+      /* Perform the multiply-accumulates */
+      acc0 += x4 * c0;
+      acc1 += x5 * c0;
+      acc2 += x6 * c0;
+      acc3 += x7 * c0;
+      acc4 += x0 * c0;
+      acc5 += x1 * c0;
+      acc6 += x2 * c0;
+      acc7 += x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x4 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x5 * c0;
+      acc1 += x6 * c0;
+      acc2 += x7 * c0;
+      acc3 += x0 * c0;
+      acc4 += x1 * c0;
+      acc5 += x2 * c0;
+      acc6 += x3 * c0;
+      acc7 += x4 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x5 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x6 * c0;
+      acc1 += x7 * c0;
+      acc2 += x0 * c0;
+      acc3 += x1 * c0;
+      acc4 += x2 * c0;
+      acc5 += x3 * c0;
+      acc6 += x4 * c0;
+      acc7 += x5 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x6 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x7 * c0;
+      acc1 += x0 * c0;
+      acc2 += x1 * c0;
+      acc3 += x2 * c0;
+      acc4 += x3 * c0;
+      acc5 += x4 * c0;
+      acc6 += x5 * c0;
+      acc7 += x6 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    tapCnt = numTaps % 0x8U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x7 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+      acc4 += x4 * c0;
+      acc5 += x5 * c0;
+      acc6 += x6 * c0;
+      acc7 += x7 * c0;
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+      x3 = x4;
+      x4 = x5;
+      x5 = x6;
+      x6 = x7;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by 8 to process the next group of 8 samples */
+    pState = pState + 8;
+
+    /* The results in the 8 accumulators, store in the destination buffer. */
+    *pDst++ = acc0;
+    *pDst++ = acc1;
+    *pDst++ = acc2;
+    *pDst++ = acc3;
+    *pDst++ = acc4;
+    *pDst++ = acc5;
+    *pDst++ = acc6;
+    *pDst++ = acc7;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x8U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0.0f;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    while (i > 0U)
+    {
+      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+      acc0 += (_Float16)*px++ * (_Float16)*pb++;
+
+      i--;
+    }
+
+    /* Store result in destination buffer. */
+    *pDst++ = acc0;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+#endif /* #if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+* @} end of FIR group
+*/
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
index 8e5c7773..f8c1d806 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f32.c
@@ -1,715 +1,1285 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_f32.c
- * Description:  Floating-point FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup FIR Finite Impulse Response (FIR) Filters
-
-  This set of functions implements Finite Impulse Response (FIR) filters
-  for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.
-  The functions operate on blocks of input and output data and each call to the function processes
-  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
-  <code>pDst</code> points to input and output arrays containing <code>blockSize</code> values.
-
-  @par           Algorithm
-                   The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.
-                   Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>.
-  <pre>
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-  </pre>
-  @par
-                   \image html FIR.GIF "Finite Impulse Response filter"
-  @par
-                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
-                   Coefficients are stored in time reversed order.
-  @par
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
-                   Samples in the state buffer are stored in the following order.
-  @par
-  <pre>
-      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-  </pre>
-  @par
-                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>.
-                   The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,
-                   to be avoided and yields a significant speed improvement.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-                   There are separate instance structure declarations for each of the 4 supported data types.
-
-  @par           Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Set the values in the state buffer to zeros before static initialization.
-                   The code below statically initializes each of the 4 different data type filter instance structures
-  <pre>
-      arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
-      arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
-      arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
-      arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};
-  </pre>
-                   where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
-                   <code>pCoeffs</code> is the address of the coefficient buffer.
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the fixed-point versions of the FIR filter functions.
-                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-                   Refer to the function specific documentation below for usage guidelines.
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Processing function for floating-point FIR filter.
-  @param[in]     S          points to an instance of the floating-point FIR filter structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-#if defined(ARM_MATH_NEON)
-
-void arm_fir_f32(
-const arm_fir_instance_f32 * S,
-const float32_t * pSrc,
-float32_t * pDst,
-uint32_t blockSize)
-{
-   float32_t *pState = S->pState;                 /* State pointer */
-   const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
-   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-   float32_t *px;                                 /* Temporary pointers for state buffer */
-   const float32_t *pb;                           /* Temporary pointers for coefficient buffer */
-   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-   float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,x,b,accv;
-   uint32x4_t x0_u,x1_u,x2_u,xa_u,xb_u;
-   float32_t acc;
-
-   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-   /* pStateCurnt points to the location where the new input data should be written */
-   pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-   /* Loop unrolling */
-   blkCnt = blockSize >> 3;
-
-   while (blkCnt > 0U)
-   {
-      /* Copy 8 samples at a time into state buffers */
-      samples0 = vld1q_f32(pSrc);
-      vst1q_f32(pStateCurnt,samples0);
-
-      pStateCurnt += 4;
-      pSrc += 4 ;
-
-      samples1 = vld1q_f32(pSrc);
-      vst1q_f32(pStateCurnt,samples1);
-
-      pStateCurnt += 4;
-      pSrc += 4 ;
-
-      /* Set the accumulators to zero */
-      accv0 = vdupq_n_f32(0);
-      accv1 = vdupq_n_f32(0);
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize coefficient pointer */
-      pb = pCoeffs;
-
-      /* Loop unroling */
-      i = numTaps >> 2;
-
-      /* Perform the multiply-accumulates */
-      x0 = vld1q_f32(px);
-      x1 = vld1q_f32(px + 4);
-
-      while(i > 0)
-      {
-         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-         x2 = vld1q_f32(px + 8);
-         b = vld1q_f32(pb);
-         xa = x0;
-         xb = x1;
-         accv0 = vmlaq_n_f32(accv0,xa,b[0]);
-         accv1 = vmlaq_n_f32(accv1,xb,b[0]);
-
-         xa = vextq_f32(x0,x1,1);
-         xb = vextq_f32(x1,x2,1);
-         
-	 accv0 = vmlaq_n_f32(accv0,xa,b[1]);
-         accv1 = vmlaq_n_f32(accv1,xb,b[1]);
-
-	 xa = vextq_f32(x0,x1,2);
-         xb = vextq_f32(x1,x2,2);
-
-         accv0 = vmlaq_n_f32(accv0,xa,b[2]);
-         accv1 = vmlaq_n_f32(accv1,xb,b[2]);
-
-	 xa = vextq_f32(x0,x1,3);
-	 xb = vextq_f32(x1,x2,3);
-         
- 	 accv0 = vmlaq_n_f32(accv0,xa,b[3]);
-         accv1 = vmlaq_n_f32(accv1,xb,b[3]);
-
-         pb += 4;
-         x0 = x1;
-         x1 = x2;
-         px += 4;
-         i--;
-
-      }
-
-      /* Tail */
-      i = numTaps & 3;
-      x2 = vld1q_f32(px + 8);
-
-      /* Perform the multiply-accumulates */
-      switch(i)
-      {
-         case 3:
-         {
-           accv0 = vmlaq_n_f32(accv0,x0,*pb);
-           accv1 = vmlaq_n_f32(accv1,x1,*pb);
-
-           pb++;
-
-	   xa = vextq_f32(x0,x1,1);
-	   xb = vextq_f32(x1,x2,1);
-
-           accv0 = vmlaq_n_f32(accv0,xa,*pb);
-           accv1 = vmlaq_n_f32(accv1,xb,*pb);
-
-           pb++;
-
-           xa = vextq_f32(x0,x1,2);
-           xb = vextq_f32(x1,x2,2);
-           
-	   accv0 = vmlaq_n_f32(accv0,xa,*pb);
-           accv1 = vmlaq_n_f32(accv1,xb,*pb);
-
-         }
-         break;
-         case 2:
-         {
-           accv0 = vmlaq_n_f32(accv0,x0,*pb);
-           accv1 = vmlaq_n_f32(accv1,x1,*pb);
-
-           pb++;
-
-           xa = vextq_f32(x0,x1,1);
-           xb = vextq_f32(x1,x2,1);
-           
-	   accv0 = vmlaq_n_f32(accv0,xa,*pb);
-           accv1 = vmlaq_n_f32(accv1,xb,*pb);
-
-         }
-         break;
-         case 1:
-         {
-           
-           accv0 = vmlaq_n_f32(accv0,x0,*pb);
-           accv1 = vmlaq_n_f32(accv1,x1,*pb);
-
-         }
-         break;
-         default:
-         break;
-      }
-
-      /* The result is stored in the destination buffer. */
-      vst1q_f32(pDst,accv0);
-      pDst += 4;
-      vst1q_f32(pDst,accv1);
-      pDst += 4;
-
-      /* Advance state pointer by 8 for the next 8 samples */
-      pState = pState + 8;
-
-      blkCnt--;
-   }
-
-   /* Tail */
-   blkCnt = blockSize & 0x7;
-
-   while (blkCnt > 0U)
-   {
-      /* Copy one sample at a time into state buffer */
-      *pStateCurnt++ = *pSrc++;
-
-      /* Set the accumulator to zero */
-      acc = 0.0f;
-
-      /* Initialize state pointer */
-      px = pState;
-
-      /* Initialize Coefficient pointer */
-      pb = pCoeffs;
-
-      i = numTaps;
-
-      /* Perform the multiply-accumulates */
-      do
-      {
-         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-         acc += *px++ * *pb++;
-         i--;
-
-      } while (i > 0U);
-
-      /* The result is stored in the destination buffer. */
-      *pDst++ = acc;
-
-      /* Advance state pointer by 1 for the next sample */
-      pState = pState + 1;
-
-      blkCnt--;
-   }
-
-   /* Processing is complete.
-   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-   /* Points to the start of the state buffer */
-   pStateCurnt = S->pState;
-
-   /* Copy numTaps number of values */
-   tapCnt = numTaps - 1U;
-
-   /* Copy data */
-   while (tapCnt > 0U)
-   {
-      *pStateCurnt++ = *pState++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-   }
-
-}
-#else
-void arm_fir_f32(
-  const arm_fir_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-        float32_t *px;                                 /* Temporary pointer for state buffer */
-  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
-        float32_t acc0;                                /* Accumulator */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
-        float32_t x0, x1, x2, x3, x4, x5, x6, x7;               /* Temporary variables to hold state values */
-        float32_t c0;                                           /* Temporary variable to hold coefficient value */
-#endif
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 8 output values simultaneously.
-   * The variables acc0 ... acc7 hold output values that are being computed:
-   *
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-   */
-
-  blkCnt = blockSize >> 3U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 new input samples into the state buffer. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0.0f;
-    acc1 = 0.0f;
-    acc2 = 0.0f;
-    acc3 = 0.0f;
-    acc4 = 0.0f;
-    acc5 = 0.0f;
-    acc6 = 0.0f;
-    acc7 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* This is separated from the others to avoid
-     * a call to __aeabi_memmove which would be slower
-     */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Read the first 7 samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *px++;
-    x1 = *px++;
-    x2 = *px++;
-    x3 = *px++;
-    x4 = *px++;
-    x5 = *px++;
-    x6 = *px++;
-
-    /* Loop unrolling: process 8 taps at a time. */
-    tapCnt = numTaps >> 3U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-3] sample */
-      x7 = *(px++);
-
-      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
-      acc0 += x0 * c0;
-
-      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
-      acc1 += x1 * c0;
-
-      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
-      acc2 += x2 * c0;
-
-      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
-      acc3 += x3 * c0;
-
-      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
-      acc4 += x4 * c0;
-
-      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
-      acc5 += x5 * c0;
-
-      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
-      acc6 += x6 * c0;
-
-      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
-      acc7 += x7 * c0;
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulate */
-      acc0 += x1 * c0;
-      acc1 += x2 * c0;
-      acc2 += x3 * c0;
-      acc3 += x4 * c0;
-      acc4 += x5 * c0;
-      acc5 += x6 * c0;
-      acc6 += x7 * c0;
-      acc7 += x0 * c0;
-
-      /* Read the b[numTaps-3] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x2 * c0;
-      acc1 += x3 * c0;
-      acc2 += x4 * c0;
-      acc3 += x5 * c0;
-      acc4 += x6 * c0;
-      acc5 += x7 * c0;
-      acc6 += x0 * c0;
-      acc7 += x1 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x3 * c0;
-      acc1 += x4 * c0;
-      acc2 += x5 * c0;
-      acc3 += x6 * c0;
-      acc4 += x7 * c0;
-      acc5 += x0 * c0;
-      acc6 += x1 * c0;
-      acc7 += x2 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x3 = *(px++);
-      /* Perform the multiply-accumulates */
-      acc0 += x4 * c0;
-      acc1 += x5 * c0;
-      acc2 += x6 * c0;
-      acc3 += x7 * c0;
-      acc4 += x0 * c0;
-      acc5 += x1 * c0;
-      acc6 += x2 * c0;
-      acc7 += x3 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x4 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x5 * c0;
-      acc1 += x6 * c0;
-      acc2 += x7 * c0;
-      acc3 += x0 * c0;
-      acc4 += x1 * c0;
-      acc5 += x2 * c0;
-      acc6 += x3 * c0;
-      acc7 += x4 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x5 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x6 * c0;
-      acc1 += x7 * c0;
-      acc2 += x0 * c0;
-      acc3 += x1 * c0;
-      acc4 += x2 * c0;
-      acc5 += x3 * c0;
-      acc6 += x4 * c0;
-      acc7 += x5 * c0;
-
-      /* Read the b[numTaps-4] coefficient */
-      c0 = *(pb++);
-
-      /* Read x[n-numTaps-6] sample */
-      x6 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x7 * c0;
-      acc1 += x0 * c0;
-      acc2 += x1 * c0;
-      acc3 += x2 * c0;
-      acc4 += x3 * c0;
-      acc5 += x4 * c0;
-      acc6 += x5 * c0;
-      acc7 += x6 * c0;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    tapCnt = numTaps % 0x8U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x7 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += x0 * c0;
-      acc1 += x1 * c0;
-      acc2 += x2 * c0;
-      acc3 += x3 * c0;
-      acc4 += x4 * c0;
-      acc5 += x5 * c0;
-      acc6 += x6 * c0;
-      acc7 += x7 * c0;
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-      x3 = x4;
-      x4 = x5;
-      x5 = x6;
-      x6 = x7;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by 8 to process the next group of 8 samples */
-    pState = pState + 8;
-
-    /* The results in the 8 accumulators, store in the destination buffer. */
-    *pDst++ = acc0;
-    *pDst++ = acc1;
-    *pDst++ = acc2;
-    *pDst++ = acc3;
-    *pDst++ = acc4;
-    *pDst++ = acc5;
-    *pDst++ = acc6;
-    *pDst++ = acc7;
-
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining output samples */
-  blkCnt = blockSize % 0x8U;
-
-#else
-
-  /* Initialize blkCnt with number of taps */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0.0f;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc0 += *px++ * *pb++;
-
-      i--;
-    } while (i > 0U);
-
-    /* Store result in destination buffer. */
-    *pDst++ = acc0;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-#endif /* #if defined(ARM_MATH_NEON) */
-/**
-* @} end of FIR group
-*/
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_f32.c
+ * Description:  Floating-point FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR Finite Impulse Response (FIR) Filters
+
+  This set of functions implements Finite Impulse Response (FIR) filters
+  for Q7, Q15, Q31, and floating-point data types.  Fast versions of Q15 and Q31 are also provided.
+  The functions operate on blocks of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> points to input and output arrays containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   The FIR filter algorithm is based upon a sequence of multiply-accumulate (MAC) operations.
+                   Each filter coefficient <code>b[n]</code> is multiplied by a state variable which equals a previous input sample <code>x[n]</code>.
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+  @par
+                   \image html FIR.GIF "Finite Impulse Response filter"
+  @par
+                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+  @par
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the following order.
+  @par
+  <pre>
+      {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[n](==pSrc[0]), x[n+1](==pSrc[1]), ..., x[n+blockSize-1](==pSrc[blockSize-1])}
+  </pre>
+  @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code>.
+                   The increased state buffer length allows circular addressing, which is traditionally used in the FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 4 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 4 different data type filter instance structures
+  <pre>
+      arm_fir_instance_f32 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q31 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q15 S = {numTaps, pState, pCoeffs};
+      arm_fir_instance_q7 S =  {numTaps, pState, pCoeffs};
+  </pre>
+                   where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer.
+  @par          Initialization of Helium version
+                 For Helium version the array of coefficients must be padded with zero to contain
+                 a full number of lanes.
+
+                 The array length L must be a multiple of x. L = x * a :
+                 - x is 4  for f32
+                 - x is 4  for q31
+                 - x is 4  for f16 (so managed like the f32 version and not like the q15 one)
+                 - x is 8  for q15
+                 - x is 16 for q7
+
+                 The additional coefficients 
+                 (x * a - numTaps) must be set to 0.
+                 numTaps is still set to its right value in the init function. It means that
+                 the implementation may require to read more coefficients due to the vectorization and
+                 to avoid having to manage too many different cases in the code.
+
+                
+  @par          Helium state buffer
+                 The state buffer must contain some additional temporary data
+                 used during the computation but which is not the state of the FIR.
+                 The first A samples are temporary data.
+                 The remaining samples are the state of the FIR filter.
+  @par                 
+                 So the state buffer has size <code> numTaps + A + blockSize - 1 </code> :
+                 - A is blockSize for f32
+                 - A is 8*ceil(blockSize/8) for f16
+                 - A is 8*ceil(blockSize/4) for q31
+                 - A is 0 for other datatypes (q15 and q7)
+
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR filter.
+  @param[in]     S          points to an instance of the floating-point FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define FIR_F32_MAX_COEF_BLK        8
+
+#define FIR_F32_CORE(pSamples, c, NB_TAPS)                                 \
+        vecAcc0 = vdupq_n_f32(0.0f);                                       \
+        for (int i = 0; i < NB_TAPS; i++) {                                \
+            vecIn0 = vld1q(&pSamples[i]);                                  \
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c[i]);                        \
+        }
+
+
+#define NB_TAPS 4
+__STATIC_INLINE void arm_fir_f32_1_4_mve(const arm_fir_instance_f32 * S, 
+  const float32_t * __restrict pSrc, 
+  float32_t * __restrict pDst, uint32_t blockSize)
+{
+    float32_t *pRefStatePtr = S->pState + blockSize;
+    float32_t      *pState = pRefStatePtr; /* State pointer */
+    const float32_t *pCoeffs = S->pCoeffs;      /* Coefficient pointer */
+    float32_t      *pStateCur;  /* Points to the current sample of the state */
+    const float32_t *pSamples;  /* Temporary pointer to the sample buffer */
+    float32_t      *pOutput;    /* Temporary pointer to the output buffer */
+    const float32_t *pTempSrc;  /* Temporary pointer to the source data */
+    float32_t      *pTempDest;  /* Temporary pointer to the destination buffer */
+    uint32_t        numTaps = S->numTaps;       /* Number of filter coefficients in the filter */
+    int32_t         blkCnt;
+    float32x4_t         vecIn0;
+    float32x4_t         vecAcc0;
+    float32_t       c[NB_TAPS];
+    const float32_t *pCoeffsCur = pCoeffs;
+
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur = &(pState[(numTaps - 1u)]);
+    pTempSrc = pSrc;
+
+    pSamples = pState;
+    pOutput = pDst;
+
+    for (int i = 0; i < NB_TAPS; i++)
+        c[i] = *pCoeffsCur++;
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0) {
+        /*
+         * Save 4 input samples in the history buffer
+         */
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 4;
+        pTempSrc += 4;
+
+        FIR_F32_CORE(pSamples, c, NB_TAPS);
+
+        vst1q(pOutput, vecAcc0);
+
+        pOutput += 4;
+        pSamples += 4;
+
+        blkCnt--;
+    }
+
+    blkCnt = blockSize & 3;
+    if (blkCnt)
+    {
+        mve_pred16_t    p0 = vctp32q(blkCnt);
+
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 4;
+        pTempSrc += 4;
+
+        FIR_F32_CORE(pSamples, c, NB_TAPS);
+
+        vstrwq_p_f32(pOutput, vecAcc0, p0);
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = numTaps - 1;
+    do {
+        mve_pred16_t    p = vctp32q(blkCnt);
+
+        vstrwq_p_f32(pTempDest, vldrwq_z_f32(pTempSrc, p), p);
+        pTempSrc += 4;
+        pTempDest += 4;
+        blkCnt -= 4;
+    }
+    while (blkCnt > 0);
+}
+#undef NB_TAPS
+
+__STATIC_INLINE void arm_fir_f32_5_8_mve(const arm_fir_instance_f32 * S, 
+  const float32_t * __restrict pSrc, 
+  float32_t * __restrict pDst, uint32_t blockSize)
+{
+    float32_t *pRefStatePtr = S->pState + blockSize;
+    float32_t *pState = pRefStatePtr;      /* State pointer */
+    const float32_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */
+    const float32_t *pSamples;          /* Temporary pointer to the sample buffer */
+    const float32_t *pTempSrc;          /* Temporary pointer to the source data */
+    float32_t *pTempDest;               /* Temporary pointer to the destination buffer */
+    uint32_t  numTaps = S->numTaps;     /* Number of filter coefficients in the filter */
+    int32_t  blkCnt;
+    float32_t c0, c1, c2, c3;
+    float32_t c4, c5, c6, c7;
+
+
+    pTempSrc = pSrc;
+    pTempDest = &(pState[(numTaps - 1u)]);
+    int cnt = blockSize;
+    do {
+        mve_pred16_t p0 = vctp32q(cnt);
+        vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0);
+        pTempDest += 4;
+        pTempSrc += 4;
+        cnt -= 4;
+    } while(cnt > 0);
+
+
+
+    pSamples = pState;
+    c0 = *pCoeffs++;
+    c1 = *pCoeffs++;
+    c2 = *pCoeffs++;
+    c3 = *pCoeffs++;
+    c4 = *pCoeffs++;
+    c5 = *pCoeffs++;
+    c6 = *pCoeffs++;
+    c7 = *pCoeffs++;
+
+    cnt = blockSize >> 2;
+    while(cnt > 0) 
+    {
+        float32x4_t vecAcc0;
+        float32x4_t vecIn0;
+
+        vecIn0 = vld1q(pSamples);
+        vecAcc0 = vmulq(vecIn0, c0);
+        vecIn0 = vld1q(&pSamples[1]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+        vecIn0 = vld1q(&pSamples[2]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+        vecIn0 = vld1q(&pSamples[3]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+        vecIn0 = vld1q(&pSamples[4]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+        vecIn0 = vld1q(&pSamples[5]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+        vecIn0 = vld1q(&pSamples[6]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+        vecIn0 = vld1q(&pSamples[7]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+        pSamples += 4;
+        vst1q(pDst, vecAcc0);
+        cnt--;
+        pDst += 4;
+    }
+
+    cnt = blockSize & 3;
+    if (cnt > 0) 
+    {
+        float32x4_t vecAcc0;
+        float32x4_t vecIn0;
+
+        mve_pred16_t p0 = vctp32q(cnt);
+
+        vecIn0 = vld1q(pSamples);
+        vecAcc0 = vmulq(vecIn0, c0);
+        vecIn0 = vld1q(&pSamples[1]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+        vecIn0 = vld1q(&pSamples[2]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+        vecIn0 = vld1q(&pSamples[3]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+        vecIn0 = vld1q(&pSamples[4]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+        vecIn0 = vld1q(&pSamples[5]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+        vecIn0 = vld1q(&pSamples[6]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+        vecIn0 = vld1q(&pSamples[7]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+        vstrwq_p_f32(pDst, vecAcc0,p0);
+    }
+
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+    blkCnt = numTaps;
+    while (blkCnt > 0)
+    {
+        *pTempDest++ = *pTempSrc++;
+        blkCnt--;
+    }
+}
+
+
+
+void arm_fir_f32(
+const arm_fir_instance_f32 * S,
+const float32_t * pSrc,
+float32_t * pDst,
+uint32_t blockSize)
+{
+    /* 
+       S->pState is the arm_fir_partial_accu
+       S->pState + blockSize is the FIR state
+    */
+    float32_t *pRefStatePtr = S->pState + blockSize;
+    float32_t *pState = pRefStatePtr ;      /* State pointer */
+    const float32_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */
+    const float32_t *pSamples;          /* Temporary pointer to the sample buffer */
+    float32_t *pOutput;                 /* Temporary pointer to the output buffer */
+    const float32_t *pTempSrc;          /* Temporary pointer to the source data */
+    float32_t *pTempDest;               /* Temporary pointer to the destination buffer */
+    uint32_t  numTaps = S->numTaps;     /* Number of filter coefficients in the filter */
+    uint32_t  blkCnt;
+    float32_t c0, c1, c2, c3;
+    float32_t c4, c5, c6, c7;
+
+    /*
+     * [1 to 8 taps] specialized routines
+     */
+    if (numTaps <= 4)
+    {
+        arm_fir_f32_1_4_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 8)
+    {
+        arm_fir_f32_5_8_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+
+    pTempSrc = pSrc;
+    pTempDest = &(pState[(numTaps - 1u)]);
+    int cnt = blockSize;
+    do {
+        mve_pred16_t p0 = vctp32q(cnt);
+        vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0);
+        pTempDest += 4;
+        pTempSrc += 4;
+        cnt -= 4;
+    } while(cnt > 0);
+
+    float32_t *partial_accu_ptr = S->pState;
+
+    pSamples = pState;
+    c0 = *pCoeffs++;
+    c1 = *pCoeffs++;
+    c2 = *pCoeffs++;
+    c3 = *pCoeffs++;
+    c4 = *pCoeffs++;
+    c5 = *pCoeffs++;
+    c6 = *pCoeffs++;
+    c7 = *pCoeffs++;
+
+    cnt = blockSize >> 2;
+    while(cnt > 0) {
+        float32x4_t vecAcc0;
+        float32x4_t vecIn0;
+
+        vecIn0 = vld1q(pSamples);
+        vecAcc0 = vmulq(vecIn0, c0);
+        vecIn0 = vld1q(&pSamples[1]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+        vecIn0 = vld1q(&pSamples[2]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+        vecIn0 = vld1q(&pSamples[3]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+        vecIn0 = vld1q(&pSamples[4]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+        vecIn0 = vld1q(&pSamples[5]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+        vecIn0 = vld1q(&pSamples[6]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+        vecIn0 = vld1q(&pSamples[7]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+        pSamples += 4;
+        vst1q(partial_accu_ptr, vecAcc0);
+        cnt--;
+        partial_accu_ptr += 4;
+    }
+
+    cnt = blockSize & 3;
+    if (cnt > 0) 
+    {
+        float32x4_t vecAcc0;
+        float32x4_t vecIn0;
+
+        mve_pred16_t p0 = vctp32q(cnt);
+
+        vecIn0 = vld1q(pSamples);
+        vecAcc0 = vmulq(vecIn0, c0);
+        vecIn0 = vld1q(&pSamples[1]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+        vecIn0 = vld1q(&pSamples[2]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+        vecIn0 = vld1q(&pSamples[3]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+        vecIn0 = vld1q(&pSamples[4]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+        vecIn0 = vld1q(&pSamples[5]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+        vecIn0 = vld1q(&pSamples[6]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+        vecIn0 = vld1q(&pSamples[7]);
+        vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+        vstrwq_p_f32(partial_accu_ptr, vecAcc0,p0);
+    }
+
+    int localTaps = numTaps - FIR_F32_MAX_COEF_BLK;
+    int sample_offset = FIR_F32_MAX_COEF_BLK;
+    while (localTaps > FIR_F32_MAX_COEF_BLK) {
+        c0 = *pCoeffs++;
+        c1 = *pCoeffs++;
+        c2 = *pCoeffs++;
+        c3 = *pCoeffs++;
+        c4 = *pCoeffs++;
+        c5 = *pCoeffs++;
+        c6 = *pCoeffs++;
+        c7 = *pCoeffs++;
+
+        partial_accu_ptr = S->pState;
+        pSamples = pState + sample_offset;
+        int cnt = blockSize >> 2;
+        while(cnt > 0) {
+            float32x4_t vecAcc0;
+            float32x4_t vecIn0;
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            pSamples += 4;
+            vecAcc0 += vld1q_f32(partial_accu_ptr);
+            vst1q(partial_accu_ptr, vecAcc0);
+            cnt--;
+            partial_accu_ptr += 4;
+        }
+
+        cnt = blockSize & 3;
+        if (cnt > 0) {
+            float32x4_t vecAcc0;
+            float32x4_t vecIn0;
+
+            mve_pred16_t p0 = vctp32q(cnt);
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            vecAcc0 += vld1q_f32(partial_accu_ptr);
+            vstrwq_p_f32(partial_accu_ptr, vecAcc0,p0);
+        }
+
+        localTaps -= FIR_F32_MAX_COEF_BLK;
+        sample_offset += FIR_F32_MAX_COEF_BLK;
+    }
+
+    pSamples = pState + sample_offset;
+
+    if (localTaps > 4) {
+        c0 = *pCoeffs++;
+        c1 = *pCoeffs++;
+        c2 = *pCoeffs++;
+        c3 = *pCoeffs++;
+        c4 = *pCoeffs++;
+        c5 = *pCoeffs++;
+        c6 = *pCoeffs++;
+        c7 = *pCoeffs++;
+        pOutput = pDst;
+
+        partial_accu_ptr = S->pState;
+        cnt = blockSize  >> 2;
+        while(cnt > 0) {
+            float32x4_t vecAcc0;
+            float32x4_t vecIn0;
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            pSamples += 4;
+            float32x4_t pap = vld1q_f32(partial_accu_ptr);
+            vst1q(pOutput, vecAcc0+pap);
+            cnt--;
+            partial_accu_ptr += 4;
+            pOutput += 4;
+        }
+
+        cnt = blockSize  & 3;
+        if (cnt > 0) {
+            float32x4_t vecAcc0;
+            float32x4_t vecIn0;
+
+            mve_pred16_t p0 = vctp32q(cnt);
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            vecIn0 = vld1q(&pSamples[4]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c4);
+            vecIn0 = vld1q(&pSamples[5]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c5);
+            vecIn0 = vld1q(&pSamples[6]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c6);
+            vecIn0 = vld1q(&pSamples[7]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c7);
+            float32x4_t pap = vld1q_f32(partial_accu_ptr);
+            vstrwq_p_f32(pOutput, vecAcc0+pap,p0);
+            pOutput += cnt;
+        }
+    }
+    else {
+        c0 = *pCoeffs++;
+        c1 = *pCoeffs++;
+        c2 = *pCoeffs++;
+        c3 = *pCoeffs++;
+        pOutput = pDst;
+
+        partial_accu_ptr = S->pState;
+        cnt = blockSize >> 2;
+        while(cnt > 0) {
+            float32x4_t vecAcc0;
+            float32x4_t vecIn0;
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            pSamples += 4;
+            float32x4_t pap = vld1q_f32(partial_accu_ptr);
+            vst1q(pOutput, vecAcc0+pap);
+            cnt--;
+            partial_accu_ptr += 4;
+            pOutput += 4;
+        }
+
+        cnt = blockSize & 3;
+        if (cnt > 0) {
+            float32x4_t vecAcc0;
+            float32x4_t vecIn0;
+
+            mve_pred16_t p0 = vctp32q(cnt);
+
+            vecIn0 = vld1q(pSamples);
+            vecAcc0 = vmulq(vecIn0, c0);
+            vecIn0 = vld1q(&pSamples[1]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c1);
+            vecIn0 = vld1q(&pSamples[2]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c2);
+            vecIn0 = vld1q(&pSamples[3]);
+            vecAcc0 = vfmaq(vecAcc0, vecIn0, c3);
+            float32x4_t pap = vld1q_f32(partial_accu_ptr);
+            vstrwq_p_f32(pOutput, vecAcc0+pap,p0);
+            pOutput += cnt;
+        }
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pRefStatePtr[blockSize];
+    pTempDest = pRefStatePtr;
+
+    blkCnt = numTaps >> 2;
+    while (blkCnt > 0)
+    {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 4;
+        pTempDest += 4;
+        blkCnt--;
+    }
+    blkCnt = numTaps & 3;
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_f32(pTempDest, vld1q(pTempSrc), p0);
+    }
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+void arm_fir_f32(
+const arm_fir_instance_f32 * S,
+const float32_t * pSrc,
+float32_t * pDst,
+uint32_t blockSize)
+{
+   float32_t *pState = S->pState;                 /* State pointer */
+   const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
+   float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+   float32_t *px;                                 /* Temporary pointers for state buffer */
+   const float32_t *pb;                           /* Temporary pointers for coefficient buffer */
+   uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+   uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+   float32x4_t accv0,accv1,samples0,samples1,x0,x1,x2,xa,xb,b;
+   float32_t acc;
+
+   /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+   /* pStateCurnt points to the location where the new input data should be written */
+   pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+   /* Loop unrolling */
+   blkCnt = blockSize >> 3;
+
+   while (blkCnt > 0U)
+   {
+      /* Copy 8 samples at a time into state buffers */
+      samples0 = vld1q_f32(pSrc);
+      vst1q_f32(pStateCurnt,samples0);
+
+      pStateCurnt += 4;
+      pSrc += 4 ;
+
+      samples1 = vld1q_f32(pSrc);
+      vst1q_f32(pStateCurnt,samples1);
+
+      pStateCurnt += 4;
+      pSrc += 4 ;
+
+      /* Set the accumulators to zero */
+      accv0 = vdupq_n_f32(0);
+      accv1 = vdupq_n_f32(0);
+
+      /* Initialize state pointer */
+      px = pState;
+
+      /* Initialize coefficient pointer */
+      pb = pCoeffs;
+
+      /* Loop unroling */
+      i = numTaps >> 2;
+
+      /* Perform the multiply-accumulates */
+      x0 = vld1q_f32(px);
+      x1 = vld1q_f32(px + 4);
+
+      while(i > 0)
+      {
+         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+         x2 = vld1q_f32(px + 8);
+         b = vld1q_f32(pb);
+         xa = x0;
+         xb = x1;
+         accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 0));
+         accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 0));
+
+         xa = vextq_f32(x0,x1,1);
+         xb = vextq_f32(x1,x2,1);
+
+         accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 1));
+         accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 1));
+
+         xa = vextq_f32(x0,x1,2);
+         xb = vextq_f32(x1,x2,2);
+
+         accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 2));
+         accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 2));
+
+         xa = vextq_f32(x0,x1,3);
+         xb = vextq_f32(x1,x2,3);
+
+         accv0 = vmlaq_n_f32(accv0,xa,vgetq_lane_f32(b, 3));
+         accv1 = vmlaq_n_f32(accv1,xb,vgetq_lane_f32(b, 3));
+
+         pb += 4;
+         x0 = x1;
+         x1 = x2;
+         px += 4;
+         i--;
+
+      }
+
+      /* Tail */
+      i = numTaps & 3;
+      x2 = vld1q_f32(px + 8);
+
+      /* Perform the multiply-accumulates */
+      switch(i)
+      {
+         case 3:
+         {
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+           pb++;
+
+           xa = vextq_f32(x0,x1,1);
+           xb = vextq_f32(x1,x2,1);
+
+           accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+           pb++;
+
+           xa = vextq_f32(x0,x1,2);
+           xb = vextq_f32(x1,x2,2);
+
+           accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+         }
+         break;
+         case 2:
+         {
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+           pb++;
+
+           xa = vextq_f32(x0,x1,1);
+           xb = vextq_f32(x1,x2,1);
+
+           accv0 = vmlaq_n_f32(accv0,xa,*pb);
+           accv1 = vmlaq_n_f32(accv1,xb,*pb);
+
+         }
+         break;
+         case 1:
+         {
+
+           accv0 = vmlaq_n_f32(accv0,x0,*pb);
+           accv1 = vmlaq_n_f32(accv1,x1,*pb);
+
+         }
+         break;
+         default:
+         break;
+      }
+
+      /* The result is stored in the destination buffer. */
+      vst1q_f32(pDst,accv0);
+      pDst += 4;
+      vst1q_f32(pDst,accv1);
+      pDst += 4;
+
+      /* Advance state pointer by 8 for the next 8 samples */
+      pState = pState + 8;
+
+      blkCnt--;
+   }
+
+   /* Tail */
+   blkCnt = blockSize & 0x7;
+
+   while (blkCnt > 0U)
+   {
+      /* Copy one sample at a time into state buffer */
+      *pStateCurnt++ = *pSrc++;
+
+      /* Set the accumulator to zero */
+      acc = 0.0f;
+
+      /* Initialize state pointer */
+      px = pState;
+
+      /* Initialize Coefficient pointer */
+      pb = pCoeffs;
+
+      i = numTaps;
+
+      /* Perform the multiply-accumulates */
+      do
+      {
+         /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+         acc += *px++ * *pb++;
+         i--;
+
+      } while (i > 0U);
+
+      /* The result is stored in the destination buffer. */
+      *pDst++ = acc;
+
+      /* Advance state pointer by 1 for the next sample */
+      pState = pState + 1;
+
+      blkCnt--;
+   }
+
+   /* Processing is complete.
+   ** Now copy the last numTaps - 1 samples to the starting of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+   /* Points to the start of the state buffer */
+   pStateCurnt = S->pState;
+
+   /* Copy numTaps number of values */
+   tapCnt = numTaps - 1U;
+
+   /* Copy data */
+   while (tapCnt > 0U)
+   {
+      *pStateCurnt++ = *pState++;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+   }
+
+}
+#else
+void arm_fir_f32(
+  const arm_fir_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px;                                 /* Temporary pointer for state buffer */
+  const float32_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        float32_t acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc1, acc2, acc3, acc4, acc5, acc6, acc7;     /* Accumulators */
+        float32_t x0, x1, x2, x3, x4, x5, x6, x7;               /* Temporary variables to hold state values */
+        float32_t c0;                                           /* Temporary variable to hold coefficient value */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 8 output values simultaneously.
+   * The variables acc0 ... acc7 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+
+  blkCnt = blockSize >> 3U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0.0f;
+    acc1 = 0.0f;
+    acc2 = 0.0f;
+    acc3 = 0.0f;
+    acc4 = 0.0f;
+    acc5 = 0.0f;
+    acc6 = 0.0f;
+    acc7 = 0.0f;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* This is separated from the others to avoid
+     * a call to __aeabi_memmove which would be slower
+     */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Read the first 7 samples from the state buffer:  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+    x3 = *px++;
+    x4 = *px++;
+    x5 = *px++;
+    x6 = *px++;
+
+    /* Loop unrolling: process 8 taps at a time. */
+    tapCnt = numTaps >> 3U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-3] sample */
+      x7 = *(px++);
+
+      /* acc0 +=  b[numTaps-1] * x[n-numTaps] */
+      acc0 += x0 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-1] */
+      acc1 += x1 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-2] */
+      acc2 += x2 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-3] */
+      acc3 += x3 * c0;
+
+      /* acc4 +=  b[numTaps-1] * x[n-numTaps-4] */
+      acc4 += x4 * c0;
+
+      /* acc1 +=  b[numTaps-1] * x[n-numTaps-5] */
+      acc5 += x5 * c0;
+
+      /* acc2 +=  b[numTaps-1] * x[n-numTaps-6] */
+      acc6 += x6 * c0;
+
+      /* acc3 +=  b[numTaps-1] * x[n-numTaps-7] */
+      acc7 += x7 * c0;
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulate */
+      acc0 += x1 * c0;
+      acc1 += x2 * c0;
+      acc2 += x3 * c0;
+      acc3 += x4 * c0;
+      acc4 += x5 * c0;
+      acc5 += x6 * c0;
+      acc6 += x7 * c0;
+      acc7 += x0 * c0;
+
+      /* Read the b[numTaps-3] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x2 * c0;
+      acc1 += x3 * c0;
+      acc2 += x4 * c0;
+      acc3 += x5 * c0;
+      acc4 += x6 * c0;
+      acc5 += x7 * c0;
+      acc6 += x0 * c0;
+      acc7 += x1 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x3 * c0;
+      acc1 += x4 * c0;
+      acc2 += x5 * c0;
+      acc3 += x6 * c0;
+      acc4 += x7 * c0;
+      acc5 += x0 * c0;
+      acc6 += x1 * c0;
+      acc7 += x2 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x3 = *(px++);
+      /* Perform the multiply-accumulates */
+      acc0 += x4 * c0;
+      acc1 += x5 * c0;
+      acc2 += x6 * c0;
+      acc3 += x7 * c0;
+      acc4 += x0 * c0;
+      acc5 += x1 * c0;
+      acc6 += x2 * c0;
+      acc7 += x3 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x4 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x5 * c0;
+      acc1 += x6 * c0;
+      acc2 += x7 * c0;
+      acc3 += x0 * c0;
+      acc4 += x1 * c0;
+      acc5 += x2 * c0;
+      acc6 += x3 * c0;
+      acc7 += x4 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x5 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x6 * c0;
+      acc1 += x7 * c0;
+      acc2 += x0 * c0;
+      acc3 += x1 * c0;
+      acc4 += x2 * c0;
+      acc5 += x3 * c0;
+      acc6 += x4 * c0;
+      acc7 += x5 * c0;
+
+      /* Read the b[numTaps-4] coefficient */
+      c0 = *(pb++);
+
+      /* Read x[n-numTaps-6] sample */
+      x6 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x7 * c0;
+      acc1 += x0 * c0;
+      acc2 += x1 * c0;
+      acc3 += x2 * c0;
+      acc4 += x3 * c0;
+      acc5 += x4 * c0;
+      acc6 += x5 * c0;
+      acc7 += x6 * c0;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    tapCnt = numTaps % 0x8U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x7 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += x0 * c0;
+      acc1 += x1 * c0;
+      acc2 += x2 * c0;
+      acc3 += x3 * c0;
+      acc4 += x4 * c0;
+      acc5 += x5 * c0;
+      acc6 += x6 * c0;
+      acc7 += x7 * c0;
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+      x3 = x4;
+      x4 = x5;
+      x5 = x6;
+      x6 = x7;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by 8 to process the next group of 8 samples */
+    pState = pState + 8;
+
+    /* The results in the 8 accumulators, store in the destination buffer. */
+    *pDst++ = acc0;
+    *pDst++ = acc1;
+    *pDst++ = acc2;
+    *pDst++ = acc3;
+    *pDst++ = acc4;
+    *pDst++ = acc5;
+    *pDst++ = acc6;
+    *pDst++ = acc7;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x8U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0.0f;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    while (i > 0U)
+    {
+      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+      acc0 += *px++ * *pb++;
+
+      i--;
+    }
+
+    /* Store result in destination buffer. */
+    *pDst++ = acc0;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+* @} end of FIR group
+*/
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f64.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f64.c
new file mode 100644
index 00000000..62e7e998
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_f64.c
@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_f64.c
+ * Description:  Floating-point FIR filter processing function
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR filter.
+  @param[in]     S          points to an instance of the floating-point FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_fir_f64(
+  const arm_fir_instance_f64 * S,
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+        float64_t *pState = S->pState;                 /* State pointer */
+  const float64_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float64_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float64_t *px;                                 /* Temporary pointer for state buffer */
+  const float64_t *pb;                                 /* Temporary pointer for coefficient buffer */
+        float64_t acc0;                                /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0.;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    while (i > 0U)
+    {
+      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+      acc0 += *px++ * *pb++;
+
+      i--;
+    }
+
+    /* Store result in destination buffer. */
+    *pDst++ = acc0;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+* @} end of FIR group
+*/
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
index c81c809e..ccd3ed8e 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q15.c
@@ -1,332 +1,332 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_fast_q15.c
- * Description:  Q15 Fast FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 FIR filter (fast version).
-  @param[in]     S          points to an instance of the Q15 FIR filter structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This fast version uses a 32-bit accumulator with 2.30 format.
-                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around and distorts the result.
-                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
-                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
-
-  @remark
-                   Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.
-                   Use function \ref arm_fir_init_q15() to initialize the filter structure.
- */
-
-void arm_fir_fast_q15(
-  const arm_fir_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q15_t *px;                                     /* Temporary pointer for state buffer */
-  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q31_t acc0;                                    /* Accumulators */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc1, acc2, acc3;                        /* Accumulators */
-        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 output values simultaneously.
-   * The variables acc0 ... acc3 hold output values that are being computed:
-   *
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-   */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 new input samples into the state buffer. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = read_q15x2_ia (&px);
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = read_q15x2_ia (&px);
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLAD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = read_q15x2_ia (&px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLAD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = read_q15x2_ia (&px);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLAD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLADX(x1, c0, acc3);
-
-      /* Decrement tap count */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
-       This is always be 2 taps since the filter length is even. */
-    if ((numTaps & 0x3U) != 0U)
-    {
-      /* Read last two coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLAD(x0, c0, acc0);
-      acc2 = __SMLAD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = read_q15x2 (px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLADX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLADX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
-       Then store the 4 outputs in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining output samples */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of taps */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1U;
-
-    do
-    {
-      acc0 += (q31_t) *px++ * *pb++;
-	  acc0 += (q31_t) *px++ * *pb++;
-
-      tapCnt--;
-    }
-    while (tapCnt > 0U);
-
-    /* The result is in 2.30 format. Convert to 1.15 with saturation.
-       Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_fast_q15.c
+ * Description:  Q15 Fast FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR filter (fast version).
+  @param[in]     S          points to an instance of the Q15 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This fast version uses a 32-bit accumulator with 2.30 format.
+                   The accumulator maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+                   The 2.30 accumulator is then truncated to 2.15 format and saturated to yield the 1.15 result.
+
+  @remark
+                   Refer to \ref arm_fir_q15() for a slower implementation of this function which uses 64-bit accumulation to avoid wrap around distortion.  Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_init_q15() to initialize the filter structure.
+ */
+
+void arm_fir_fast_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
+    px = pState;
+
+    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
+    pb = pCoeffs;
+
+    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
+    x0 = read_q15x2_ia (&px);
+
+    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
+    x2 = read_q15x2_ia (&px);
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc0 = __SMLAD(x0, c0, acc0);
+
+      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
+      acc2 = __SMLAD(x2, c0, acc2);
+
+      /* pack  x[n-N-1] and x[n-N-2] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read state x[n-N-4], x[n-N-5] */
+      x0 = read_q15x2_ia (&px);
+
+      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack  x[n-N-3] and x[n-N-4] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
+      acc3 = __SMLADX(x1, c0, acc3);
+
+      /* Read coefficients b[N-2], b[N-3] */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
+      acc0 = __SMLAD(x2, c0, acc0);
+
+      /* Read state x[n-N-6], x[n-N-7] with offset */
+      x2 = read_q15x2_ia (&px);
+
+      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
+      acc2 = __SMLAD(x0, c0, acc2);
+
+      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack  x[n-N-5] and x[n-N-6] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
+      acc3 = __SMLADX(x1, c0, acc3);
+
+      /* Decrement tap count */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
+       This is always be 2 taps since the filter length is even. */
+    if ((numTaps & 0x3U) != 0U)
+    {
+      /* Read last two coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulates */
+      acc0 = __SMLAD(x0, c0, acc0);
+      acc2 = __SMLAD(x2, c0, acc2);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read last state variables */
+      x0 = read_q15x2 (px);
+
+      /* Perform the multiply-accumulates */
+      acc1 = __SMLADX(x1, c0, acc1);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* Perform the multiply-accumulates */
+      acc3 = __SMLADX(x1, c0, acc3);
+    }
+
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+       Then store the 4 outputs in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy two samples into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Use SIMD to hold states and coefficients */
+    px = pState;
+    pb = pCoeffs;
+
+    tapCnt = numTaps >> 1U;
+
+    do
+    {
+      acc0 += (q31_t) *px++ * *pb++;
+	  acc0 += (q31_t) *px++ * *pb++;
+
+      tapCnt--;
+    }
+    while (tapCnt > 0U);
+
+    /* The result is in 2.30 format. Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
index 009e4e99..bc628c9f 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_fast_q31.c
@@ -1,324 +1,322 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_fast_q31.c
- * Description:  Processing function for the Q31 Fast FIR filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 FIR filter (fast version).
-  @param[in]     S          points to an instance of the Q31 structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
-                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
-                   These intermediate results are added to a 2.30 accumulator.
-                   Finally, the accumulator is saturated and converted to a 1.31 result.
-                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
-                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
-
- @remark
-                   Refer to \ref arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.
-                   Use function \ref arm_fir_init_q31() to initialize the filter structure.
- */
-
-IAR_ONLY_LOW_OPTIMIZATION_ENTER
-void arm_fir_fast_q31(
-  const arm_fir_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q31_t *px;                                     /* Temporary pointer for state buffer */
-  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q31_t acc0;                                    /* Accumulators */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc1, acc2, acc3;                        /* Accumulators */
-        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 output values simultaneously.
-   * The variables acc0 ... acc3 hold output values that are being computed:
-   *
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-   */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 new input samples into the state buffer. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first 3 samples from the state buffer:
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *px++;
-    x1 = *px++;
-    x2 = *px++;
-
-    /* Loop unrolling. Process 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-       Repeat until we've computed numTaps-4 coefficients. */
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *px;
-
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      multAcc_32x32_keep32_R(acc0, x0, c0);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      multAcc_32x32_keep32_R(acc1, x1, c0);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      multAcc_32x32_keep32_R(acc2, x2, c0);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      multAcc_32x32_keep32_R(acc3, x3, c0);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb + 1U);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px + 1U);
-
-      /* Perform the multiply-accumulates */
-      multAcc_32x32_keep32_R(acc0, x1, c0);
-      multAcc_32x32_keep32_R(acc1, x2, c0);
-      multAcc_32x32_keep32_R(acc2, x3, c0);
-      multAcc_32x32_keep32_R(acc3, x0, c0);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 2U);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px + 2U);
-
-      /* Perform the multiply-accumulates */
-      multAcc_32x32_keep32_R(acc0, x2, c0);
-      multAcc_32x32_keep32_R(acc1, x3, c0);
-      multAcc_32x32_keep32_R(acc2, x0, c0);
-      multAcc_32x32_keep32_R(acc3, x1, c0);
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb + 3U);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px + 3U);
-
-      /* Perform the multiply-accumulates */
-      multAcc_32x32_keep32_R(acc0, x3, c0);
-      multAcc_32x32_keep32_R(acc1, x0, c0);
-      multAcc_32x32_keep32_R(acc2, x1, c0);
-      multAcc_32x32_keep32_R(acc3, x2, c0);
-
-      /* update coefficient pointer */
-      pb += 4U;
-      px += 4U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      multAcc_32x32_keep32_R(acc0, x0, c0);
-      multAcc_32x32_keep32_R(acc1, x1, c0);
-      multAcc_32x32_keep32_R(acc2, x2, c0);
-      multAcc_32x32_keep32_R(acc3, x3, c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31
-       Then store the 4 outputs in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-    *pDst++ = (q31_t) (acc1 << 1);
-    *pDst++ = (q31_t) (acc2 << 1);
-    *pDst++ = (q31_t) (acc3 << 1);
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining output samples */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of taps */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      multAcc_32x32_keep32_R(acc0, (*px++), (*pb++));
-      i--;
-    } while (i > 0U);
-
-    /* The result is in 2.30 format. Convert to 1.31
-       Then store the output in the destination buffer. */
-    *pDst++ = (q31_t) (acc0 << 1);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-IAR_ONLY_LOW_OPTIMIZATION_EXIT
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_fast_q31.c
+ * Description:  Processing function for the Q31 Fast FIR filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR filter (fast version).
+  @param[in]     S          points to an instance of the Q31 structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   This function is optimized for speed at the expense of fixed-point precision and overflow protection.
+                   The result of each 1.31 x 1.31 multiplication is truncated to 2.30 format.
+                   These intermediate results are added to a 2.30 accumulator.
+                   Finally, the accumulator is saturated and converted to a 1.31 result.
+                   The fast version has the same overflow behavior as the standard version and provides less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+
+ @remark
+                   Refer to \ref arm_fir_q31() for a slower implementation of this function which uses a 64-bit accumulator to provide higher precision.  Both the slow and the fast versions use the same instance structure.
+                   Use function \ref arm_fir_init_q31() to initialize the filter structure.
+ */
+
+void arm_fir_fast_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px;                                     /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, x3, c0;                      /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the first 3 samples from the state buffer:
+     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+
+    /* Loop unrolling. Process 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps] coefficient */
+      c0 = *pb;
+
+      /* Read x[n-numTaps-3] sample */
+      x3 = *px;
+
+      /* acc0 +=  b[numTaps] * x[n-numTaps] */
+      multAcc_32x32_keep32_R(acc0, x0, c0);
+
+      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
+      multAcc_32x32_keep32_R(acc1, x1, c0);
+
+      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
+      multAcc_32x32_keep32_R(acc2, x2, c0);
+
+      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
+      multAcc_32x32_keep32_R(acc3, x3, c0);
+
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb + 1U);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px + 1U);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x1, c0);
+      multAcc_32x32_keep32_R(acc1, x2, c0);
+      multAcc_32x32_keep32_R(acc2, x3, c0);
+      multAcc_32x32_keep32_R(acc3, x0, c0);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb + 2U);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px + 2U);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x2, c0);
+      multAcc_32x32_keep32_R(acc1, x3, c0);
+      multAcc_32x32_keep32_R(acc2, x0, c0);
+      multAcc_32x32_keep32_R(acc3, x1, c0);
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *(pb + 3U);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px + 3U);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x3, c0);
+      multAcc_32x32_keep32_R(acc1, x0, c0);
+      multAcc_32x32_keep32_R(acc2, x1, c0);
+      multAcc_32x32_keep32_R(acc3, x2, c0);
+
+      /* update coefficient pointer */
+      pb += 4U;
+      px += 4U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x3 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      multAcc_32x32_keep32_R(acc0, x0, c0);
+      multAcc_32x32_keep32_R(acc1, x1, c0);
+      multAcc_32x32_keep32_R(acc2, x2, c0);
+      multAcc_32x32_keep32_R(acc3, x3, c0);
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.31
+       Then store the 4 outputs in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+    *pDst++ = (q31_t) (acc1 << 1);
+    *pDst++ = (q31_t) (acc2 << 1);
+    *pDst++ = (q31_t) (acc3 << 1);
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    do
+    {
+      multAcc_32x32_keep32_R(acc0, (*px++), (*pb++));
+      i--;
+    } while (i > 0U);
+
+    /* The result is in 2.30 format. Convert to 1.31
+       Then store the output in the destination buffer. */
+    *pDst++ = (q31_t) (acc0 << 1);
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f16.c
new file mode 100755
index 00000000..34913432
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f16.c
@@ -0,0 +1,105 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_f16.c
+ * Description:  Floating-point FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR filter.
+  @param[in,out] S          points to an instance of the floating-point FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed per call
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples (except for Helium - see below), where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f16()</code>.
+  @par          Initialization of Helium version
+                 For Helium version the array of coefficients must be a multiple of 4 (4a) even if less
+                 then 4a coefficients are defined in the FIR. The additional coefficients 
+                 (4a - numTaps) must be set to 0.
+                 numTaps is still set to its right value in the init function. It means that
+                 the implementation may require to read more coefficients due to the vectorization and
+                 to avoid having to manage too many different cases in the code.
+
+
+  @par          Helium state buffer
+                 The state buffer must contain some additional temporary data
+                 used during the computation but which is not the state of the FIR.
+                 The first 8*ceil(blockSize/8) samples are temporary data.
+                 The remaining samples are the state of the FIR filter.
+                 So the state buffer has size <code> numTaps + 8*ceil(blockSize/8) + blockSize - 1 </code>
+
+ */
+
+void arm_fir_init_f16(
+        arm_fir_instance_f16 * S,
+        uint16_t numTaps,
+  const float16_t * pCoeffs,
+        float16_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+  memset(pState, 0, (numTaps + (blockSize - 1U) + ROUND_UP(blockSize, 8)) * sizeof(float16_t));
+#else
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float16_t));
+#endif 
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
index 80024008..e0a58755 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f32.c
@@ -1,81 +1,99 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_init_f32.c
- * Description:  Floating-point FIR filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point FIR filter.
-  @param[in,out] S          points to an instance of the floating-point FIR filter structure
-  @param[in] 	 numTaps    number of filter coefficients in the filter
-  @param[in]     pCoeffs    points to the filter coefficients buffer
-  @param[in]     pState     points to the state buffer
-  @param[in]     blockSize  number of samples processed per call
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f32()</code>.
- */
-
-void arm_fir_init_f32(
-        arm_fir_instance_f32 * S,
-        uint16_t numTaps,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_f32.c
+ * Description:  Floating-point FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR filter.
+  @param[in,out] S          points to an instance of the floating-point FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed per call
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables and some working memory for the Helium version.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples (except for Helium - see below), where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f32()</code>.
+  @par          Initialization of Helium version
+                 For Helium version the array of coefficients must be a multiple of 4 (4a) even if less
+                 then 4a coefficients are defined in the FIR. The additional coefficients 
+                 (4a - numTaps) must be set to 0.
+                 numTaps is still set to its right value in the init function. It means that
+                 the implementation may require to read more coefficients due to the vectorization and
+                 to avoid having to manage too many different cases in the code.
+
+  @par          Helium state buffer
+                 The state buffer must contain some additional temporary data
+                 used during the computation but which is not the state of the FIR.
+                 The first blockSize samples are temporary data.
+                 The remaining samples are the state of the FIR filter.
+                 So the state buffer has size <code> numTaps + 2 * blockSize - 1 </code>
+
+ */
+
+void arm_fir_init_f32(
+        arm_fir_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+  memset(pState, 0, (numTaps + (blockSize - 1U) + blockSize) * sizeof(float32_t));
+#else
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
+#endif
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f64.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f64.c
new file mode 100644
index 00000000..8c578b50
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_f64.c
@@ -0,0 +1,95 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_f64.c
+ * Description:  Floating-point FIR filter initialization function
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR filter.
+  @param[in,out] S          points to an instance of the floating-point FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed per call
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables and some working memory for the Helium version.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples (except for Helium - see below), where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_f32()</code>.
+  @par          Initialization of Helium version
+                 For Helium version the array of coefficients must be a multiple of 4 (4a) even if less
+                 then 4a coefficients are defined in the FIR. The additional coefficients 
+                 (4a - numTaps) must be set to 0.
+                 numTaps is still set to its right value in the init function. It means that
+                 the implementation may require to read more coefficients due to the vectorization and
+                 to avoid having to manage too many different cases in the code.
+
+  @par          Helium state buffer
+                 The state buffer must contain some additional temporary data
+                 used during the computation but which is not the state of the FIR.
+                 The first blockSize samples are temporary data.
+                 The remaining samples are the state of the FIR filter.
+                 So the state buffer has size <code> numTaps + 2 * blockSize - 1 </code>
+
+ */
+
+void arm_fir_init_f64(
+        arm_fir_instance_f64 * S,
+        uint16_t numTaps,
+  const float64_t * pCoeffs,
+        float64_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float64_t));
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
index 66c69c0f..3682fb09 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q15.c
@@ -1,137 +1,145 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_init_q15.c
- * Description:  Q15 FIR filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 FIR filter.
-  @param[in,out] S          points to an instance of the Q15 FIR filter structure.
-  @param[in] 	 numTaps    number of filter coefficients in the filter. Must be even and greater than or equal to 4.
-  @param[in]     pCoeffs    points to the filter coefficients buffer.
-  @param[in]     pState     points to the state buffer.
-  @param[in]     blockSize  number of samples processed per call.
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>numTaps</code> is not greater than or equal to 4 and even
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   Note that <code>numTaps</code> must be even and greater than or equal to 4.
-                   To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
-                   For example, to implement a filter with <code>numTaps=3</code> and coefficients
-  <pre>
-      {0.3, -0.8, 0.3}
-  </pre>
-                   set <code>numTaps=4</code> and use the coefficients:
-  <pre>
-      {0.3, -0.8, 0.3, 0}.
-  </pre>
-                   Similarly, to implement a two point filter
-  <pre>
-      {0.3, -0.3}
-  </pre>
-                   set <code>numTaps=4</code> and use the coefficients:
-  <pre>
-      {0.3, -0.3, 0, 0}.
-  </pre>
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3  and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
- */
-
-arm_status arm_fir_init_q15(
-        arm_fir_instance_q15 * S,
-        uint16_t numTaps,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        uint32_t blockSize)
-{
-  arm_status status;
-
-#if defined (ARM_MATH_DSP)
-
-  /* The Number of filter coefficients in the filter must be even and at least 4 */
-  if (numTaps & 0x1U)
-  {
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-  else
-  {
-    /* Assign filter taps */
-    S->numTaps = numTaps;
-
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Clear the state buffer.  The size is always (blockSize + numTaps ) */
-    memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-
-#else
-
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  status = ARM_MATH_SUCCESS;
-
-  return (status);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_q15.c
+ * Description:  Q15 FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR filter.
+  @param[in,out] S          points to an instance of the Q15 FIR filter structure.
+  @param[in] 	 numTaps    number of filter coefficients in the filter. Must be even and greater than or equal to 4.
+  @param[in]     pCoeffs    points to the filter coefficients buffer.
+  @param[in]     pState     points to the state buffer.
+  @param[in]     blockSize  number of samples processed per call.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>numTaps</code> is not greater than or equal to 4 and even
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   Note that <code>numTaps</code> must be even and greater than or equal to 4.
+                   To implement an odd length filter simply increase <code>numTaps</code> by 1 and set the last coefficient to zero.
+                   For example, to implement a filter with <code>numTaps=3</code> and coefficients
+  <pre>
+      {0.3, -0.8, 0.3}
+  </pre>
+                   set <code>numTaps=4</code> and use the coefficients:
+  <pre>
+      {0.3, -0.8, 0.3, 0}.
+  </pre>
+                   Similarly, to implement a two point filter
+  <pre>
+      {0.3, -0.3}
+  </pre>
+                   set <code>numTaps=4</code> and use the coefficients:
+  <pre>
+      {0.3, -0.3, 0, 0}.
+  </pre>
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize</code>, when running on Cortex-M4 and Cortex-M3  and is of length <code>numTaps+blockSize-1</code>, when running on Cortex-M0 where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q15()</code>.
+ 
+  @par          Initialization of Helium version
+                   For Helium version the array of coefficients must be a multiple of 8 (8a) even if less
+                   then 8a coefficients are defined in the FIR. The additional coefficients 
+                   (8a - numTaps) must be set to 0.
+                   numTaps is still set to its right value in the init function. It means that
+                   the implementation may require to read more coefficients due to the vectorization and
+                   to avoid having to manage too many different cases in the code.
+ */
+
+arm_status arm_fir_init_q15(
+        arm_fir_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+#if defined (ARM_MATH_DSP)
+
+  /* The Number of filter coefficients in the filter must be even and at least 4 */
+  if (numTaps & 0x1U)
+  {
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+  else
+  {
+    /* Assign filter taps */
+    S->numTaps = numTaps;
+
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Clear the state buffer.  The size is always (blockSize + numTaps ) */
+    memset(pState, 0, (numTaps + (blockSize)) * sizeof(q15_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+
+#else
+
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  status = ARM_MATH_SUCCESS;
+
+  return (status);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
index 00de3e10..96d1fdde 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q31.c
@@ -1,80 +1,100 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_init_q31.c
- * Description:  Q31 FIR filter initialization function.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 FIR filter.
-  @param[in,out] S          points to an instance of the Q31 FIR filter structure
-  @param[in] 	 numTaps    number of filter coefficients in the filter
-  @param[in]     pCoeffs    points to the filter coefficients buffer
-  @param[in]     pState     points to the state buffer
-  @param[in]     blockSize  number of samples processed
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q31()</code>.
- */
-
-void arm_fir_init_q31(
-        arm_fir_instance_q31 * S,
-        uint16_t numTaps,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_q31.c
+ * Description:  Q31 FIR filter initialization function.
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR filter.
+  @param[in,out] S          points to an instance of the Q31 FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples (except for Helium - see below), where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q31()</code>.
+
+   @par          Initialization of Helium version
+                   For Helium version the array of coefficients must be a multiple of 4 (4a) even if less
+                   then 4a coefficients are defined in the FIR. The additional coefficients 
+                   (4a - numTaps) must be set to 0.
+                   numTaps is still set to its right value in the init function. It means that
+                   the implementation may require to read more coefficients due to the vectorization and
+                   to avoid having to manage too many different cases in the code.
+  
+    @par          Helium state buffer
+                   The state buffer must contain some additional temporary data
+                   used during the computation but which is not the state of the FIR.
+                   The first 2*4*ceil(blockSize/4) samples are temporary data.
+                   The remaining samples are the state of the FIR filter.
+                   So the state buffer has size <code> numTaps + 8*ceil(blockSize/4) + blockSize - 1 </code>
+  
+ */
+
+void arm_fir_init_q31(
+        arm_fir_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+  memset(pState, 0, (numTaps + (blockSize - 1U) + 2*ROUND_UP(blockSize, 4)) * sizeof(q31_t));
+  #else
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+  #endif
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
index 1adb2e2a..1ad05a55 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_init_q7.c
@@ -1,81 +1,90 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_init_q7.c
- * Description:  Q7 FIR filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q7 FIR filter.
-  @param[in,out] S          points to an instance of the Q7 FIR filter structure
-  @param[in] 	 numTaps    number of filter coefficients in the filter
-  @param[in]     pCoeffs    points to the filter coefficients buffer
-  @param[in]     pState     points to the state buffer
-  @param[in]     blockSize  number of samples processed
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q7()</code>.
- */
-
-void arm_fir_init_q7(
-        arm_fir_instance_q7 * S,
-        uint16_t numTaps,
-  const q7_t * pCoeffs,
-        q7_t * pState,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_init_q7.c
+ * Description:  Q7 FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q7 FIR filter.
+  @param[in,out] S          points to an instance of the Q7 FIR filter structure
+  @param[in] 	 numTaps    number of filter coefficients in the filter
+  @param[in]     pCoeffs    points to the filter coefficients buffer
+  @param[in]     pState     points to the state buffer
+  @param[in]     blockSize  number of samples processed
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_q7()</code>.
+  
+  @par          Initialization of Helium version
+                   For Helium version the array of coefficients must be a multiple of 16 (16a) even if less
+                   then 16a coefficients are defined in the FIR. The additional coefficients 
+                   (16a - numTaps) must be set to 0.
+                   numTaps is still set to its right value in the init function. It means that
+                   the implementation may require to read more coefficients due to the vectorization and
+                   to avoid having to manage too many different cases in the code.
+
+ */
+
+void arm_fir_init_q7(
+        arm_fir_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer. The size is always (blockSize + numTaps - 1) */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q7_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
index 471f25fe..b6a6ecb7 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_f32.c
@@ -1,914 +1,1252 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_interpolate_f32.c
- * Description:  Floating-point FIR interpolation sequences
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
-
-  These functions combine an upsampler (zero stuffer) and an FIR filter.
-  They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
-  Conceptually, the functions are equivalent to the block diagram below:
-  \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
-  After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized
-  cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum.
-  The user of the function is responsible for providing the filter coefficients.
-
-  The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
-  The upsampler inserts <code>L-1</code> zeros between each sample.
-  Instead of multiplying by these zero values, the FIR filter is designed to skip them.
-  This leads to an efficient implementation without any wasted effort.
-  The functions operate on blocks of input and output data.
-  <code>pSrc</code> points to an array of <code>blockSize</code> input values and
-  <code>pDst</code> points to an array of <code>blockSize*L</code> output values.
-
-  The library provides separate functions for Q15, Q31, and floating-point data types.
-
-  @par           Algorithm
-                   The functions use a polyphase filter structure:
-  <pre>
-      y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
-      y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
-      ...
-      y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
-  </pre>
-                   This approach is more efficient than straightforward upsample-then-filter algorithms.
-                   With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter.
-  @par
-                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
-                   <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the
-                   initialization functions.
-                   Internally, the function divides the FIR filter's impulse response into shorter filters of length
-                   <code>phaseLength=numTaps/L</code>.
-                   Coefficients are stored in time reversed order.
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>.
-                   Samples in the state buffer are stored in the order:
-  <pre>
-     {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
-  </pre>
-  @par
-                   The state variables are updated after each block of data is processed, the coefficients are untouched.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-
-  @par           Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   The code below statically initializes each of the 3 different data type filter instance structures
-  <pre>
-      arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
-      arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
-      arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
-  </pre>
-  @par
-                   where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the
-                   length of each of the shorter FIR filters used internally,
-                   <code>pCoeffs</code> is the address of the coefficient buffer;
-                   <code>pState</code> is the address of the state buffer.
-                   Be sure to set the values in the state buffer to zeros when doing static initialization.
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
-                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-                   Refer to the function specific documentation below for usage guidelines.
- */
-
-/**
-  @addtogroup FIR_Interpolate
-  @{
- */
-
-/**
-  @brief         Processing function for floating-point FIR interpolator.
-  @param[in]     S          points to an instance of the floating-point FIR interpolator structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-#if defined(ARM_MATH_NEON)
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  const float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *ptr1;                               /* Temporary pointers for state buffer */
-  const float32_t *ptr2;                         /* Temporary pointers for coefficient buffer */
-  float32_t sum0;                                /* Accumulators */
-  float32_t x0, c0;                              /* Temporary variables to hold state and coefficient values */
-  uint32_t i, blkCnt, j;                         /* Loop counters */
-  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
-  float32_t acc0, acc1, acc2, acc3;
-  float32_t x1, x2, x3;
-  uint32_t blkCntN4;
-  float32_t c1, c2, c3;
-
-  float32x4_t sum0v;
-  float32x4_t accV,accV0,accV1;
-  float32x4_t x0v,x1v,x2v,xa,xb;
-  uint32x4_t x0v_u,x1v_u,x2v_u,xa_u,xb_u;
-  float32x2_t tempV;
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = S->pState + (phaseLen - 1U);
-
-  /* Initialise  blkCnt */
-  blkCnt = blockSize >> 3;
-  blkCntN4 = blockSize & 7;
-
-  /* Loop unrolling */
-  while (blkCnt > 0U)
-  {
-    /* Copy new input samples into the state buffer */
-    sum0v = vld1q_f32(pSrc);
-    vst1q_f32(pStateCurnt,sum0v);
-    pSrc += 4;
-    pStateCurnt += 4;
-
-    sum0v = vld1q_f32(pSrc);
-    vst1q_f32(pStateCurnt,sum0v);
-    pSrc += 4;
-    pStateCurnt += 4;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      accV0 = vdupq_n_f32(0.0);
-      accV1 = vdupq_n_f32(0.0);
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2U;
-     
-      x0v = vld1q_f32(ptr1);
-      x1v = vld1q_f32(ptr1 + 4);
-	
-      while (tapCnt > 0U)
-      {
-        /* Read the input samples */
-        x2v = vld1q_f32(ptr1 + 8);
-
-        /* Read the coefficients */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        accV0 = vmlaq_n_f32(accV0,x0v,c0);
-        accV1 = vmlaq_n_f32(accV1,x1v,c0);
-       
-        /* Read the coefficients, inputs and perform multiply-accumulate */
-        c1 = *(ptr2 + S->L);
-	
-        xa = vextq_f32(x0v,x1v,1);
-        xb = vextq_f32(x1v,x2v,1);
-
-        accV0 = vmlaq_n_f32(accV0,xa,c1);
-        accV1 = vmlaq_n_f32(accV1,xb,c1);
-
-        /* Read the coefficients, inputs and perform multiply-accumulate */
-        c2 = *(ptr2 + S->L * 2);
-	
-        xa = vextq_f32(x0v,x1v,2);
-        xb = vextq_f32(x1v,x2v,2);
-        
-	accV0 = vmlaq_n_f32(accV0,xa,c2);
-        accV1 = vmlaq_n_f32(accV1,xb,c2);
-
-        /* Read the coefficients, inputs and perform multiply-accumulate */
-        c3 = *(ptr2 + S->L * 3);
-
-        xa = vextq_f32(x0v,x1v,3);
-        xb = vextq_f32(x1v,x2v,3);
-        
-	accV0 = vmlaq_n_f32(accV0,xa,c3);
-        accV1 = vmlaq_n_f32(accV1,xb,c3);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-        ptr1 += 4;
-        x0v = x1v;
-        x1v = x2v;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4U;
-
-      x2v = vld1q_f32(ptr1 + 8);
-
-      switch (tapCnt)
-      {
-        case 3:
-             c0 = *(ptr2);
-             accV0 = vmlaq_n_f32(accV0,x0v,c0);
-             accV1 = vmlaq_n_f32(accV1,x1v,c0);
-             ptr2 += S->L;
-
-             c0 = *(ptr2);
-
-             xa = vextq_f32(x0v,x1v,1);
-             xb = vextq_f32(x1v,x2v,1);
-
-             accV0 = vmlaq_n_f32(accV0,xa,c0);
-             accV1 = vmlaq_n_f32(accV1,xb,c0);
-             ptr2 += S->L;
-
-             c0 = *(ptr2);
-
-             xa = vextq_f32(x0v,x1v,2);
-             xb = vextq_f32(x1v,x2v,2);
-             
-	     accV0 = vmlaq_n_f32(accV0,xa,c0);
-             accV1 = vmlaq_n_f32(accV1,xb,c0);
-             ptr2 += S->L;
-
-        break;
-
-        case 2:
-             c0 = *(ptr2);
-             accV0 = vmlaq_n_f32(accV0,x0v,c0);
-             accV1 = vmlaq_n_f32(accV1,x1v,c0);
-             ptr2 += S->L;
-
-             c0 = *(ptr2);
-
-             xa = vextq_f32(x0v,x1v,1);
-             xb = vextq_f32(x1v,x2v,1);
-             
-	     accV0 = vmlaq_n_f32(accV0,xa,c0);
-             accV1 = vmlaq_n_f32(accV1,xb,c0);
-             ptr2 += S->L;
-
-        break;
-
-        case 1:
-             c0 = *(ptr2);
-             accV0 = vmlaq_n_f32(accV0,x0v,c0);
-             accV1 = vmlaq_n_f32(accV1,x1v,c0);
-             ptr2 += S->L;
-
-        break;
-
-        default:
-        break;
-        
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst = accV0[0];
-      *(pDst + S->L) = accV0[1];
-      *(pDst + 2 * S->L) = accV0[2];
-      *(pDst + 3 * S->L) = accV0[3];
-
-      *(pDst + 4 * S->L) = accV1[0];
-      *(pDst + 5 * S->L) = accV1[1];
-      *(pDst + 6 * S->L) = accV1[2];
-      *(pDst + 7 * S->L) = accV1[3];
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 8;
-
-    pDst += S->L * 7;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-
-  while (blkCntN4 > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      sum0v = vdupq_n_f32(0.0);
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2U;
-
-      while (tapCnt > 0U)
-      {
-        /* Read the coefficient */
-        x1v[0] = *(ptr2);
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the input sample */
-        x0v = vld1q_f32(ptr1);
-        ptr1 += 4;
-
-        /* Read the coefficient */
-        x1v[1] = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the coefficient */
-        x1v[2] = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Read the coefficient */
-        x1v[3] = *(ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        sum0v = vmlaq_f32(sum0v,x0v,x1v);
-       
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      tempV = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
-      sum0 = tempV[0] + tempV[1];
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4U;
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += *(ptr1++) * (*ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum0;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCntN4--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-  tapCnt = (phaseLen - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    sum0v = vld1q_f32(pState);
-    vst1q_f32(pStateCurnt,sum0v);
-    pState += 4;
-    pStateCurnt += 4;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  tapCnt = (phaseLen - 1U) % 0x04U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-#else
-
-void arm_fir_interpolate_f32(
-  const arm_fir_interpolate_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *pStateCur;                          /* Points to the current sample of the state */
-        float32_t *ptr1;                               /* Temporary pointer for state buffer */
-  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
-        float32_t sum0;                                /* Accumulators */
-        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
-        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-        uint32_t j;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        float32_t acc0, acc1, acc2, acc3;
-        float32_t x0, x1, x2, x3;
-        float32_t c0, c1, c2, c3;
-#endif
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (phaseLen - 1U);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0.0f;
-      acc1 = 0.0f;
-      acc2 = 0.0f;
-      acc3 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-         Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2U;
-
-      x0 = *(ptr1++);
-      x1 = *(ptr1++);
-      x2 = *(ptr1++);
-
-      while (tapCnt > 0U)
-      {
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Read the coefficient */
-        c1 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x1 * c1;
-        acc1 += x2 * c1;
-        acc2 += x3 * c1;
-        acc3 += x0 * c1;
-
-        /* Read the coefficient */
-        c2 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x2 * c2;
-        acc1 += x3 * c2;
-        acc2 += x0 * c2;
-        acc3 += x1 * c2;
-
-        /* Read the coefficient */
-        c3 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x2 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x3 * c3;
-        acc1 += x0 * c3;
-        acc2 += x1 * c3;
-        acc3 += x2 * c3;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4U;
-
-      while (tapCnt > 0U)
-      {
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += x0 * c0;
-        acc1 += x1 * c0;
-        acc2 += x2 * c0;
-        acc3 += x3 * c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *(pDst           ) = acc0;
-      *(pDst +     S->L) = acc1;
-      *(pDst + 2 * S->L) = acc2;
-      *(pDst + 3 * S->L) = acc3;
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 4;
-
-    pDst += S->L * 3;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length.
-         Repeat until we've computed numTaps-(4*S->L) coefficients. */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-     /* Loop unrolling: Compute 4 outputs at a time */
-      tapCnt = phaseLen >> 2U;
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += *ptr1++ * *ptr2;
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        sum0 += *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        sum0 += *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        sum0 += *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      tapCnt = phaseLen % 0x4U;
-
-#else
-
-      /* Initialize tapCnt with number of samples */
-      tapCnt = phaseLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += *ptr1++ * *ptr2;
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum0;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  tapCnt = (phaseLen - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  tapCnt = (phaseLen - 1U) % 0x04U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = (phaseLen - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *pStateCur;                        /* Points to the current sample of the state */
-        float32_t *ptr1;                               /* Temporary pointer for state buffer */
-  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
-        float32_t sum0;                                /* Accumulators */
-        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
-        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (phaseLen - 1U);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0.0f;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1U);
-
-      /* Loop over the polyPhase length */
-      tapCnt = phaseLen;
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += *ptr1++ * *ptr2;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = sum0;
-
-      /* Decrement loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-  tapCnt = phaseLen - 1U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of FIR_Interpolate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_f32.c
+ * Description:  Floating-point FIR interpolation sequences
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @defgroup FIR_Interpolate Finite Impulse Response (FIR) Interpolator
+
+  These functions combine an upsampler (zero stuffer) and an FIR filter.
+  They are used in multirate systems for increasing the sample rate of a signal without introducing high frequency images.
+  Conceptually, the functions are equivalent to the block diagram below:
+  \image html FIRInterpolator.gif "Components included in the FIR Interpolator functions"
+  After upsampling by a factor of <code>L</code>, the signal should be filtered by a lowpass filter with a normalized
+  cutoff frequency of <code>1/L</code> in order to eliminate high frequency copies of the spectrum.
+  The user of the function is responsible for providing the filter coefficients.
+
+  The FIR interpolator functions provided in the CMSIS DSP Library combine the upsampler and FIR filter in an efficient manner.
+  The upsampler inserts <code>L-1</code> zeros between each sample.
+  Instead of multiplying by these zero values, the FIR filter is designed to skip them.
+  This leads to an efficient implementation without any wasted effort.
+  The functions operate on blocks of input and output data.
+  <code>pSrc</code> points to an array of <code>blockSize</code> input values and
+  <code>pDst</code> points to an array of <code>blockSize*L</code> output values.
+
+  The library provides separate functions for Q15, Q31, and floating-point data types.
+
+  @par           Algorithm
+                   The functions use a polyphase filter structure:
+  <pre>
+      y[n] = b[0] * x[n] + b[L]   * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
+      y[n+1] = b[1] * x[n] + b[L+1] * x[n-1] + ... + b[L*(phaseLength-1)+1] * x[n-phaseLength+1]
+      ...
+      y[n+(L-1)] = b[L-1] * x[n] + b[2*L-1] * x[n-1] + ....+ b[L*(phaseLength-1)+(L-1)] * x[n-phaseLength+1]
+  </pre>
+                   This approach is more efficient than straightforward upsample-then-filter algorithms.
+                   With this method the computation is reduced by a factor of <code>1/L</code> when compared to using a standard FIR filter.
+  @par
+                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code> and this is checked by the
+                   initialization functions.
+                   Internally, the function divides the FIR filter's impulse response into shorter filters of length
+                   <code>phaseLength=numTaps/L</code>.
+                   Coefficients are stored in time reversed order.
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>blockSize + phaseLength - 1</code>.
+                   Samples in the state buffer are stored in the order:
+  <pre>
+     {x[n-phaseLength+1], x[n-phaseLength], x[n-phaseLength-1], x[n-phaseLength-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+  @par
+                   The state variables are updated after each block of data is processed, the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable array should be allocated separately.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   - Checks to make sure that the length of the filter is a multiple of the interpolation factor.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   L (interpolation factor), pCoeffs, phaseLength (numTaps / L), pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+      arm_fir_interpolate_instance_f32 S = {L, phaseLength, pCoeffs, pState};
+      arm_fir_interpolate_instance_q31 S = {L, phaseLength, pCoeffs, pState};
+      arm_fir_interpolate_instance_q15 S = {L, phaseLength, pCoeffs, pState};
+  </pre>
+  @par
+                   where <code>L</code> is the interpolation factor; <code>phaseLength=numTaps/L</code> is the
+                   length of each of the shorter FIR filters used internally,
+                   <code>pCoeffs</code> is the address of the coefficient buffer;
+                   <code>pState</code> is the address of the state buffer.
+                   Be sure to set the values in the state buffer to zeros when doing static initialization.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR interpolate filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point FIR interpolator.
+  @param[in]     S          points to an instance of the floating-point FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+static void arm_fir_interpolate2_f32_mve(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+    float32_t *pState = S->pState;  /* State pointer */
+    const float32_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */
+    float32_t *pStateCurnt;     /* Points to the current sample of the state */
+    const float32_t *ptr1, *ptr2;     /* Temporary pointers for state and coefficient buffers */
+    uint32_t  tapCnt;
+    uint32_t  blkCnt;           /* Loop counters */
+    uint16_t  phaseLen = S->phaseLength;    /* Length of each polyphase filter component */
+    uint32_t  strides[4] = { 0, 1 * 2, 2 * 2, 3 * 2 };
+    uint32x4_t vec_strides0 = vld1q_u32(strides);
+    uint32x4_t vec_strides1 = vec_strides0 + 1;
+    f32x4_t acc0, acc1;
+
+    /*
+     * S->pState buffer contains previous frame (phaseLen - 1) samples
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + (phaseLen - 1U);
+    /*
+     * Total number of intput samples
+     */
+    blkCnt = blockSize;
+    /*
+     * Loop over the blockSize.
+     */
+    while (blkCnt > 0U)
+    {
+        /*
+         * Copy new input sample into the state buffer
+         */
+        *pStateCurnt++ = *pSrc++;
+        /*
+         * Initialize state pointer
+         */
+        ptr1 = pState;
+
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        /*
+         * Initialize coefficient pointer
+         */
+        ptr2 = pCoeffs;
+
+        tapCnt = phaseLen >> 2;
+        while (tapCnt > 0U)
+        {
+            f32x4_t vecCoef, vecState;
+
+            vecState = vldrwq_f32(ptr1);
+
+            vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides1);
+            acc1 = vfmaq_f32(acc1, vecState, vecCoef);
+
+            vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides0);
+            acc0 = vfmaq_f32(acc0, vecState, vecCoef);
+
+            ptr2 += 4 * 2;
+            ptr1 += 4;
+            /*
+             * Decrement the loop counter
+             */
+            tapCnt--;
+        }
+
+        tapCnt = phaseLen & 3;
+        if (tapCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(tapCnt);
+            f32x4_t vecCoef, vecState;
+
+            vecState = vldrwq_z_f32(ptr1, p0);
+
+            vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides1, p0);
+            acc1 = vfmaq_f32(acc1, vecState, vecCoef);
+            vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides0, p0);
+            acc0 = vfmaq_f32(acc0, vecState, vecCoef);
+
+        }
+        *pDst++ = vecAddAcrossF32Mve(acc1);
+        *pDst++ = vecAddAcrossF32Mve(acc0);
+
+        /*
+         * Advance the state pointer by 1
+         * * to process the next group of interpolation factor number samples
+         */
+        pState = pState + 1;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * Processing is complete.
+     * ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+     * ** This prepares the state buffer for the next function call.
+     */
+
+    /*
+     * Points to the start of the state buffer
+     */
+    pStateCurnt = S->pState;
+    blkCnt = (phaseLen - 1U) >> 2;
+    while (blkCnt > 0U)
+    {
+        vst1q(pStateCurnt, vldrwq_f32(pState));
+        pState += 4;
+        pStateCurnt += 4;
+        blkCnt--;
+    }
+    blkCnt = (phaseLen - 1U) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0);
+    }
+}
+
+void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+    float32_t *pState = S->pState;  /* State pointer */
+    const float32_t *pCoeffs = S->pCoeffs;    /* Coefficient pointer */
+    float32_t *pStateCurnt;     /* Points to the current sample of the state */
+    const float32_t *ptr1, *ptr2;     /* Temporary pointers for state and coefficient buffers */
+    uint32_t  tapCnt;
+    uint32_t  i, blkCnt;        /* Loop counters */
+    uint16_t  phaseLen = S->phaseLength;    /* Length of each polyphase filter component */
+    uint32_t  strides[4] = { 0, 1 * S->L, 2 * S->L, 3 * S->L };
+    uint32_t  stridesM[4] = { 4, 3, 2, 1 };
+    uint32x4_t vec_stridesM =  vld1q_u32(stridesM);
+    uint32x4_t vec_strides =  vld1q_u32(strides);
+    f32x4_t acc;
+
+
+    if ( S->L == 2 ) {
+        arm_fir_interpolate2_f32_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+
+    /*
+     * S->pState buffer contains previous frame (phaseLen - 1) samples
+     */
+    /*
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + (phaseLen - 1U);
+    /*
+     * Total number of intput samples
+     */
+    blkCnt = blockSize;
+    /*
+     * Loop over the blockSize.
+     */
+    while (blkCnt > 0U)
+    {
+        /*
+         * Copy new input sample into the state buffer
+         */
+        *pStateCurnt++ = *pSrc++;
+        /*
+         * Loop over the Interpolation factor.
+         */
+        i = S->L;
+        while (i > 0U)
+        {
+            /*
+             * Initialize state pointer
+             */
+            ptr1 = pState;
+            if (i >= 4)
+            {
+                float32_t state0, state1, state2, state3;
+                acc = vdupq_n_f32(0.0f);
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U) - 4;
+                tapCnt = phaseLen >> 2;
+                while (tapCnt > 0U)
+                {
+                    f32x4_t vecCoef;
+                    const float32_t *pCoef = ptr2;
+
+                    state0 = ptr1[0];
+                    state1 = ptr1[1];
+                    state2 = ptr1[2];
+                    state3 = ptr1[3];
+                    ptr1 += 4;
+
+                    vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state0);
+
+                    vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state1);
+
+                    vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state2);
+
+                    vecCoef = vldrwq_gather_shifted_offset_f32(pCoef, vec_stridesM);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state3);
+
+                    ptr2 = ptr2 + 4 * S->L;
+                    /*
+                     * Decrement the loop counter
+                     */
+                    tapCnt--;
+                }
+
+                tapCnt = phaseLen & 3;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp32q(tapCnt);
+                    f32x4_t vecCoef;
+                    const float32_t *pCoef = ptr2;
+
+                    state0 = ptr1[0];
+                    state1 = ptr1[1];
+                    state2 = ptr1[2];
+                    state3 = ptr1[3];
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state0);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state1);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state2);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_f32(pCoef, vec_stridesM, p0);
+                    pCoef += S->L;
+                    acc = vfmaq_n_f32(acc, vecCoef, state3);
+                }
+
+                vst1q(pDst,  acc);
+                pDst += 4;
+                i -= 4;
+            }
+            else
+            {
+                acc = vdupq_n_f32(0.0f);
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U);
+
+                tapCnt = phaseLen >> 2;
+                while (tapCnt > 0U)
+                {
+                    f32x4_t vecCoef, vecState;
+
+                    vecState = vldrwq_f32(ptr1);
+                    ptr1 += 4;
+
+                    vecCoef = vldrwq_gather_shifted_offset_f32(ptr2, vec_strides);
+                    ptr2 += 4 * S->L;
+                    acc = vfmaq_f32(acc, vecState, vecCoef);
+                    /*
+                     * Decrement the loop counter
+                     */
+                    tapCnt--;
+                }
+
+                tapCnt = phaseLen & 3;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp32q(tapCnt);
+                    f32x4_t vecCoef, vecState;
+
+                    vecState = vldrwq_z_f32(ptr1, p0);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_f32(ptr2, vec_strides, p0);
+                    acc = vfmaq_f32(acc, vecState, vecCoef);
+                }
+                *pDst++ = vecAddAcrossF32Mve(acc);
+                /*
+                 * Decrement the loop counter
+                 */
+                i--;
+            }
+        }
+
+        /*
+         * Advance the state pointer by 1
+         * * to process the next group of interpolation factor number samples
+         */
+        pState = pState + 1;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * Processing is complete.
+     * ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+     * ** This prepares the state buffer for the next function call.
+     */
+
+    /*
+     * Points to the start of the state buffer
+     */
+    pStateCurnt = S->pState;
+    blkCnt = (phaseLen - 1U) >> 2;
+    while (blkCnt > 0U)
+    {
+        vst1q(pStateCurnt, vldrwq_f32(pState));
+        pState += 4;
+        pStateCurnt += 4;
+        blkCnt--;
+    }
+    blkCnt = (phaseLen - 1U) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_f32(pStateCurnt, vldrwq_f32(pState), p0);
+    }
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;         /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *ptr1;                               /* Temporary pointers for state buffer */
+  const float32_t *ptr2;                         /* Temporary pointers for coefficient buffer */
+  float32_t sum0;                                /* Accumulators */
+  float32_t c0;                              /* Temporary variables to hold state and coefficient values */
+  uint32_t i, blkCnt, j;                         /* Loop counters */
+  uint16_t phaseLen = S->phaseLength, tapCnt;    /* Length of each polyphase filter component */
+  uint32_t blkCntN4;
+  float32_t c1, c2, c3;
+
+  float32x4_t sum0v;
+  float32x4_t accV0,accV1;
+  float32x4_t x0v,x1v,x2v,xa,xb;
+  float32x2_t tempV;
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = S->pState + (phaseLen - 1U);
+
+  /* Initialise  blkCnt */
+  blkCnt = blockSize >> 3;
+  blkCntN4 = blockSize & 7;
+
+  /* Loop unrolling */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input samples into the state buffer */
+    sum0v = vld1q_f32(pSrc);
+    vst1q_f32(pStateCurnt,sum0v);
+    pSrc += 4;
+    pStateCurnt += 4;
+
+    sum0v = vld1q_f32(pSrc);
+    vst1q_f32(pStateCurnt,sum0v);
+    pSrc += 4;
+    pStateCurnt += 4;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      accV0 = vdupq_n_f32(0.0);
+      accV1 = vdupq_n_f32(0.0);
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+     
+      x0v = vld1q_f32(ptr1);
+      x1v = vld1q_f32(ptr1 + 4);
+  
+      while (tapCnt > 0U)
+      {
+        /* Read the input samples */
+        x2v = vld1q_f32(ptr1 + 8);
+
+        /* Read the coefficients */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        accV0 = vmlaq_n_f32(accV0,x0v,c0);
+        accV1 = vmlaq_n_f32(accV1,x1v,c0);
+       
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c1 = *(ptr2 + S->L);
+  
+        xa = vextq_f32(x0v,x1v,1);
+        xb = vextq_f32(x1v,x2v,1);
+
+        accV0 = vmlaq_n_f32(accV0,xa,c1);
+        accV1 = vmlaq_n_f32(accV1,xb,c1);
+
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c2 = *(ptr2 + S->L * 2);
+  
+        xa = vextq_f32(x0v,x1v,2);
+        xb = vextq_f32(x1v,x2v,2);
+        
+        accV0 = vmlaq_n_f32(accV0,xa,c2);
+        accV1 = vmlaq_n_f32(accV1,xb,c2);
+
+        /* Read the coefficients, inputs and perform multiply-accumulate */
+        c3 = *(ptr2 + S->L * 3);
+
+        xa = vextq_f32(x0v,x1v,3);
+        xb = vextq_f32(x1v,x2v,3);
+        
+        accV0 = vmlaq_n_f32(accV0,xa,c3);
+        accV1 = vmlaq_n_f32(accV1,xb,c3);
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+        ptr1 += 4;
+        x0v = x1v;
+        x1v = x2v;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      x2v = vld1q_f32(ptr1 + 8);
+
+      switch (tapCnt)
+      {
+        case 3:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,1);
+             xb = vextq_f32(x1v,x2v,1);
+
+             accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,2);
+             xb = vextq_f32(x1v,x2v,2);
+             
+             accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+        break;
+
+        case 2:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+             c0 = *(ptr2);
+
+             xa = vextq_f32(x0v,x1v,1);
+             xb = vextq_f32(x1v,x2v,1);
+             
+             accV0 = vmlaq_n_f32(accV0,xa,c0);
+             accV1 = vmlaq_n_f32(accV1,xb,c0);
+             ptr2 += S->L;
+
+        break;
+
+        case 1:
+             c0 = *(ptr2);
+             accV0 = vmlaq_n_f32(accV0,x0v,c0);
+             accV1 = vmlaq_n_f32(accV1,x1v,c0);
+             ptr2 += S->L;
+
+        break;
+
+        default:
+        break;
+        
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst = vgetq_lane_f32(accV0, 0);
+      *(pDst + S->L) = vgetq_lane_f32(accV0, 1);
+      *(pDst + 2 * S->L) = vgetq_lane_f32(accV0, 2);
+      *(pDst + 3 * S->L) = vgetq_lane_f32(accV0, 3);
+
+      *(pDst + 4 * S->L) = vgetq_lane_f32(accV1, 0);
+      *(pDst + 5 * S->L) = vgetq_lane_f32(accV1, 1);
+      *(pDst + 6 * S->L) = vgetq_lane_f32(accV1, 2);
+      *(pDst + 7 * S->L) = vgetq_lane_f32(accV1, 3);
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 8;
+
+    pDst += S->L * 7;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+
+  while (blkCntN4 > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0v = vdupq_n_f32(0.0);
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+       ** Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the coefficient */
+        x1v = vsetq_lane_f32(*(ptr2),x1v,0);
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the input sample */
+        x0v = vld1q_f32(ptr1);
+        ptr1 += 4;
+
+        /* Read the coefficient */
+        x1v = vsetq_lane_f32(*(ptr2),x1v,1);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the coefficient */
+        x1v = vsetq_lane_f32(*(ptr2),x1v,2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Read the coefficient */
+        x1v = vsetq_lane_f32(*(ptr2),x1v,3);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0v = vmlaq_f32(sum0v,x0v,x1v);
+       
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      tempV = vpadd_f32(vget_low_f32(sum0v),vget_high_f32(sum0v));
+      sum0 = vget_lane_f32(tempV, 0) + vget_lane_f32(tempV, 1);
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *(ptr1++) * (*ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = sum0;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCntN4--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    sum0v = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,sum0v);
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+#else
+
+void arm_fir_interpolate_f32(
+  const arm_fir_interpolate_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                          /* Points to the current sample of the state */
+        float32_t *ptr1;                               /* Temporary pointer for state buffer */
+  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
+        float32_t sum0;                                /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t acc0, acc1, acc2, acc3;
+        float32_t x0, x1, x2, x3;
+        float32_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      acc0 = 0.0f;
+      acc1 = 0.0f;
+      acc2 = 0.0f;
+      acc3 = 0.0f;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x0 * c0;
+        acc1 += x1 * c0;
+        acc2 += x2 * c0;
+        acc3 += x3 * c0;
+
+        /* Read the coefficient */
+        c1 = *(ptr2 + S->L);
+
+        /* Read the input sample */
+        x0 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x1 * c1;
+        acc1 += x2 * c1;
+        acc2 += x3 * c1;
+        acc3 += x0 * c1;
+
+        /* Read the coefficient */
+        c2 = *(ptr2 + S->L * 2);
+
+        /* Read the input sample */
+        x1 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x2 * c2;
+        acc1 += x3 * c2;
+        acc2 += x0 * c2;
+        acc3 += x1 * c2;
+
+        /* Read the coefficient */
+        c3 = *(ptr2 + S->L * 3);
+
+        /* Read the input sample */
+        x2 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x3 * c3;
+        acc1 += x0 * c3;
+        acc2 += x1 * c3;
+        acc3 += x2 * c3;
+
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += x0 * c0;
+        acc1 += x1 * c0;
+        acc2 += x2 * c0;
+        acc3 += x3 * c0;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* update states for next sample processing */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *(pDst           ) = acc0;
+      *(pDst +     S->L) = acc1;
+      *(pDst + 2 * S->L) = acc2;
+      *(pDst + 3 * S->L) = acc3;
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 4;
+
+    pDst += S->L * 3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0.0f;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0 += *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = sum0;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCur;                        /* Points to the current sample of the state */
+        float32_t *ptr1;                               /* Temporary pointer for state buffer */
+  const float32_t *ptr2;                               /* Temporary pointer for coefficient buffer */
+        float32_t sum0;                                /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+  /* Total number of intput samples */
+  blkCnt = blockSize;
+
+  /* Loop over the blockSize. */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0.0f;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (i - 1U);
+
+      /* Loop over the polyPhase length */
+      tapCnt = phaseLen;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += *ptr1++ * *ptr2;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = sum0;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  tapCnt = phaseLen - 1U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
index 3309463d..67bdff9c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_f32.c
@@ -1,106 +1,106 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_interpolate_init_f32.c
- * Description:  Floating-point FIR interpolator initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Interpolate
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point FIR interpolator.
-  @param[in,out] S         points to an instance of the floating-point FIR interpolator structure
-  @param[in]     L         upsample factor
-  @param[in]     numTaps   number of filter coefficients in the filter
-  @param[in]     pCoeffs   points to the filter coefficient buffer
-  @param[in]     pState    points to the state buffer
-  @param[in]     blockSize number of input samples to process per call
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
-                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_f32()</code>.
- */
-
-arm_status arm_fir_interpolate_init_f32(
-        arm_fir_interpolate_instance_f32 * S,
-        uint8_t L,
-        uint16_t numTaps,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if ((numTaps % L) != 0U)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of FIR_Interpolate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_init_f32.c
+ * Description:  Floating-point FIR interpolator initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR interpolator.
+  @param[in,out] S         points to an instance of the floating-point FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_f32()</code>.
+ */
+
+arm_status arm_fir_interpolate_init_f32(
+        arm_fir_interpolate_instance_f32 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The filter length must be a multiple of the interpolation factor */
+  if ((numTaps % L) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Assign Interpolation factor */
+    S->L = L;
+
+    /* Assign polyPhaseLength */
+    S->phaseLength = numTaps / L;
+
+    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(float32_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
index bae10c77..7436aa43 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q15.c
@@ -1,106 +1,106 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_interpolate_init_q15.c
- * Description:  Q15 FIR interpolator initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Interpolate
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 FIR interpolator.
-  @param[in,out] S         points to an instance of the Q15 FIR interpolator structure
-  @param[in]     L         upsample factor
-  @param[in]     numTaps   number of filter coefficients in the filter
-  @param[in]     pCoeffs   points to the filter coefficient buffer
-  @param[in]     pState    points to the state buffer
-  @param[in]     blockSize number of input samples to process per call
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
-
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
-  </pre>
-                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
-                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q15()</code>.
- */
-
-arm_status arm_fir_interpolate_init_q15(
-        arm_fir_interpolate_instance_q15 * S,
-        uint8_t L,
-        uint16_t numTaps,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if ((numTaps % L) != 0U)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of FIR_Interpolate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_init_q15.c
+ * Description:  Q15 FIR interpolator initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR interpolator.
+  @param[in,out] S         points to an instance of the Q15 FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  </pre>
+                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q15()</code>.
+ */
+
+arm_status arm_fir_interpolate_init_q15(
+        arm_fir_interpolate_instance_q15 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The filter length must be a multiple of the interpolation factor */
+  if ((numTaps % L) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Assign Interpolation factor */
+    S->L = L;
+
+    /* Assign polyPhaseLength */
+    S->phaseLength = numTaps / L;
+
+    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q15_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
index 40c86008..15f9e0d3 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_init_q31.c
@@ -1,105 +1,105 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_interpolate_init_q31.c
- * Description:  Q31 FIR interpolator initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Interpolate
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 FIR interpolator.
-  @param[in,out] S         points to an instance of the Q31 FIR interpolator structure
-  @param[in]     L         upsample factor
-  @param[in]     numTaps   number of filter coefficients in the filter
-  @param[in]     pCoeffs   points to the filter coefficient buffer
-  @param[in]     pState    points to the state buffer
-  @param[in]     blockSize number of input samples to process per call
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
- 
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
-  </pre>
-                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
-  @par
-                   <code>pState</code> points to the array of state variables.
-                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
-                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q31()</code>.
- */
-
-arm_status arm_fir_interpolate_init_q31(
-        arm_fir_interpolate_instance_q31 * S,
-        uint8_t L,
-        uint16_t numTaps,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        uint32_t blockSize)
-{
-  arm_status status;
-
-  /* The filter length must be a multiple of the interpolation factor */
-  if ((numTaps % L) != 0U)
-  {
-    /* Set status as ARM_MATH_LENGTH_ERROR */
-    status = ARM_MATH_LENGTH_ERROR;
-  }
-  else
-  {
-    /* Assign coefficient pointer */
-    S->pCoeffs = pCoeffs;
-
-    /* Assign Interpolation factor */
-    S->L = L;
-
-    /* Assign polyPhaseLength */
-    S->phaseLength = numTaps / L;
-
-    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
-    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t));
-
-    /* Assign state pointer */
-    S->pState = pState;
-
-    status = ARM_MATH_SUCCESS;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of FIR_Interpolate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_init_q31.c
+ * Description:  Q31 FIR interpolator initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR interpolator.
+  @param[in,out] S         points to an instance of the Q31 FIR interpolator structure
+  @param[in]     L         upsample factor
+  @param[in]     numTaps   number of filter coefficients in the filter
+  @param[in]     pCoeffs   points to the filter coefficient buffer
+  @param[in]     pState    points to the state buffer
+  @param[in]     blockSize number of input samples to process per call
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : filter length <code>numTaps</code> is not a multiple of the interpolation factor <code>L</code>
+ 
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+      {b[numTaps-1], b[numTaps-2], b[numTaps-2], ..., b[1], b[0]}
+  </pre>
+                   The length of the filter <code>numTaps</code> must be a multiple of the interpolation factor <code>L</code>.
+  @par
+                   <code>pState</code> points to the array of state variables.
+                   <code>pState</code> is of length <code>(numTaps/L)+blockSize-1</code> words
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_fir_interpolate_q31()</code>.
+ */
+
+arm_status arm_fir_interpolate_init_q31(
+        arm_fir_interpolate_instance_q31 * S,
+        uint8_t L,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        uint32_t blockSize)
+{
+  arm_status status;
+
+  /* The filter length must be a multiple of the interpolation factor */
+  if ((numTaps % L) != 0U)
+  {
+    /* Set status as ARM_MATH_LENGTH_ERROR */
+    status = ARM_MATH_LENGTH_ERROR;
+  }
+  else
+  {
+    /* Assign coefficient pointer */
+    S->pCoeffs = pCoeffs;
+
+    /* Assign Interpolation factor */
+    S->L = L;
+
+    /* Assign polyPhaseLength */
+    S->phaseLength = numTaps / L;
+
+    /* Clear state buffer and size of buffer is always phaseLength + blockSize - 1 */
+    memset(pState, 0, (blockSize + ((uint32_t) S->phaseLength - 1U)) * sizeof(q31_t));
+
+    /* Assign state pointer */
+    S->pState = pState;
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  return (status);
+}
+
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
index ad5194a5..523e1557 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q15.c
@@ -1,479 +1,774 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_interpolate_q15.c
- * Description:  Q15 FIR interpolation
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Interpolate
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 FIR interpolator.
-  @param[in]     S          points to an instance of the Q15 FIR interpolator structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
- */
-
-void arm_fir_interpolate_q15(
-  const arm_fir_interpolate_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCur;                              /* Points to the current sample of the state */
-        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
-  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
-        q63_t sum0;                                    /* Accumulators */
-        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
-        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-        uint32_t j;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc0, acc1, acc2, acc3;
-        q15_t x0, x1, x2, x3;
-        q15_t c0, c1, c2, c3;
-#endif
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (phaseLen - 1U);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-         Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2U;
-
-      x0 = *(ptr1++);
-      x1 = *(ptr1++);
-      x2 = *(ptr1++);
-
-      while (tapCnt > 0U)
-      {
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 * c0;
-        acc1 += (q63_t) x1 * c0;
-        acc2 += (q63_t) x2 * c0;
-        acc3 += (q63_t) x3 * c0;
-
-        /* Read the coefficient */
-        c1 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 * c1;
-        acc1 += (q63_t) x2 * c1;
-        acc2 += (q63_t) x3 * c1;
-        acc3 += (q63_t) x0 * c1;
-
-        /* Read the coefficient */
-        c2 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x2 * c2;
-        acc1 += (q63_t) x3 * c2;
-        acc2 += (q63_t) x0 * c2;
-        acc3 += (q63_t) x1 * c2;
-
-        /* Read the coefficient */
-        c3 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x2 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x3 * c3;
-        acc1 += (q63_t) x0 * c3;
-        acc2 += (q63_t) x1 * c3;
-        acc3 += (q63_t) x2 * c3;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4U;
-
-      while (tapCnt > 0U)
-      {
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 * c0;
-        acc1 += (q63_t) x1 * c0;
-        acc2 += (q63_t) x2 * c0;
-        acc3 += (q63_t) x3 * c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *(pDst           ) = (q15_t) (__SSAT((acc0 >> 15), 16));
-      *(pDst +     S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
-      *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16));
-      *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16));
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 4;
-
-    pDst += S->L * 3;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length.
-         Repeat until we've computed numTaps-(4*S->L) coefficients. */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-     /* Loop unrolling: Compute 4 outputs at a time */
-      tapCnt = phaseLen >> 2U;
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      tapCnt = phaseLen % 0x4U;
-
-#else
-
-      /* Initialize tapCnt with number of samples */
-      tapCnt = phaseLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  tapCnt = (phaseLen - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  tapCnt = (phaseLen - 1U) % 0x04U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = (phaseLen - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCur;                              /* Points to the current sample of the state */
-        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
-  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
-        q63_t sum0;                                    /* Accumulators */
-        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
-        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (phaseLen - 1U);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1U);
-
-      /* Loop over the polyPhase length */
-      tapCnt = phaseLen;
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += ((q63_t) *ptr1++ * *ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* Store the result after converting to 1.15 format in the destination buffer. */
-      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
-
-      /* Decrement loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-  tapCnt = phaseLen - 1U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of FIR_Interpolate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_q15.c
+ * Description:  Q15 FIR interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR interpolator.
+  @param[in]     S          points to an instance of the Q15 FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+    q15_t    *pState = S->pState;   /* State pointer */
+    const q15_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q15_t    *pStateCurnt;      /* Points to the current sample of the state */
+    const q15_t    *ptr1, *ptr2;      /* Temporary pointers for state and coefficient buffers */
+
+    uint32_t  i, blkCnt;        /* Loop counters */
+    uint16_t  phaseLen = S->phaseLength;    /* Length of each polyphase filter component */
+    uint16_t  strides[8] = {
+        0, 1 * S->L, 2 * S->L, 3 * S->L,
+        4 * S->L, 5 * S->L, 6 * S->L, 7 * S->L
+        };
+    uint16x8_t vec_strides0 = *(uint16x8_t *) strides;
+    uint16x8_t vec_strides1 = vec_strides0 + 1;
+    uint16x8_t vec_strides2 = vec_strides0 + 2;
+    uint16x8_t vec_strides3 = vec_strides0 + 3;
+    q15x8_t vecState, vecCoef;
+
+    /*
+     * S->pState buffer contains previous frame (phaseLen - 1) samples
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + ((q15_t) phaseLen - 1);
+    /*
+     * Total number of intput samples
+     */
+    blkCnt = blockSize;
+    /*
+     * Loop over the blockSize.
+     */
+    while (blkCnt > 0U)
+    {
+        /*
+         * Copy new input sample into the state buffer
+         */
+        *pStateCurnt++ = *pSrc++;
+        /*
+         * Loop over the Interpolation factor.
+         */
+        i = S->L;
+        while (i > 0U)
+        {
+            /*
+             * Initialize state pointer
+             */
+            ptr1 = pState;
+            if (i >= 4)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1 - 3U);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+                q63_t     acc2 = 0LL;
+                q63_t     acc3 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides3);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+                    acc3 = vmlaldavaq(acc3, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides3, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc3 = vmlaldavaq(acc3, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                acc1 = asrl(acc1, 15);
+                acc2 = asrl(acc2, 15);
+                acc3 = asrl(acc3, 15);
+
+                *pDst++ = (q15_t) __SSAT(acc0, 16);
+                *pDst++ = (q15_t) __SSAT(acc1, 16);
+                *pDst++ = (q15_t) __SSAT(acc2, 16);
+                *pDst++ = (q15_t) __SSAT(acc3, 16);
+                i -= 4;
+            }
+            else if (i >= 3)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U - 2);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+                q63_t     acc2 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides2);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides2, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc2 = vmlaldavaq(acc2, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                acc1 = asrl(acc1, 15);
+                acc2 = asrl(acc2, 15);
+
+                *pDst++ = (q15_t) __SSAT(acc0, 16);;
+                *pDst++ = (q15_t) __SSAT(acc1, 16);;
+                *pDst++ = (q15_t) __SSAT(acc2, 16);;
+                i -= 3;
+            }
+            else if (i >= 2)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U - 1);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides1);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides1, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc1 = vmlaldavaq(acc1, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                acc1 = asrl(acc1, 15);
+
+                *pDst++ = (q15_t) __SSAT(acc0, 16);
+                *pDst++ = (q15_t) __SSAT(acc1, 16);
+                i -= 2;
+            }
+            else
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U);
+
+                q63_t     acc0 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 3;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrhq_s16(ptr1);
+                    vecCoef = vldrhq_gather_shifted_offset_s16(ptr2, vec_strides0);
+
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+
+                    ptr1 += 8;
+                    ptr2 = ptr2 + S->L * 8;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 7;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp16q(tapCnt);
+
+                    vecState = vldrhq_z_s16(ptr1, p0);
+                    vecCoef = vldrhq_gather_shifted_offset_z_s16(ptr2, vec_strides0, p0);
+                    acc0 = vmlaldavaq(acc0, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 15);
+                *pDst++ = (q15_t) __SSAT(acc0, 16);
+                /*
+                 * Decrement the loop counter
+                 */
+                i--;
+            }
+        }
+        /*
+         * Advance the state pointer by 1
+         * * to process the next group of interpolation factor number samples
+         */
+        pState = pState + 1;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * Processing is complete.
+     * Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     * This prepares the state buffer for the next function call.
+     */
+
+    /*
+     * Points to the start of the state buffer
+     */
+    pStateCurnt = S->pState;
+    blkCnt = (phaseLen - 1U) >> 3;
+    while (blkCnt > 0U)
+    {
+        vstrhq_s16(pStateCurnt, vldrhq_s16(pState));
+        pState += 8;
+        pStateCurnt += 8;
+        blkCnt--;
+    }
+    blkCnt = (phaseLen - 1U) & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vstrhq_p_s16(pStateCurnt, vldrhq_s16(pState), p0);
+    }
+}
+#else
+void arm_fir_interpolate_q15(
+  const arm_fir_interpolate_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2, acc3;
+        q15_t x0, x1, x2, x3;
+        q15_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Read the coefficient */
+        c1 = *(ptr2 + S->L);
+
+        /* Read the input sample */
+        x0 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x1 * c1;
+        acc1 += (q63_t) x2 * c1;
+        acc2 += (q63_t) x3 * c1;
+        acc3 += (q63_t) x0 * c1;
+
+        /* Read the coefficient */
+        c2 = *(ptr2 + S->L * 2);
+
+        /* Read the input sample */
+        x1 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x2 * c2;
+        acc1 += (q63_t) x3 * c2;
+        acc2 += (q63_t) x0 * c2;
+        acc3 += (q63_t) x1 * c2;
+
+        /* Read the coefficient */
+        c3 = *(ptr2 + S->L * 3);
+
+        /* Read the input sample */
+        x2 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x3 * c3;
+        acc1 += (q63_t) x0 * c3;
+        acc2 += (q63_t) x1 * c3;
+        acc3 += (q63_t) x2 * c3;
+
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* update states for next sample processing */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *(pDst           ) = (q15_t) (__SSAT((acc0 >> 15), 16));
+      *(pDst +     S->L) = (q15_t) (__SSAT((acc1 >> 15), 16));
+      *(pDst + 2 * S->L) = (q15_t) (__SSAT((acc2 >> 15), 16));
+      *(pDst + 3 * S->L) = (q15_t) (__SSAT((acc3 >> 15), 16));
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 4;
+
+    pDst += S->L * 3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCur;                              /* Points to the current sample of the state */
+        q15_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q15_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+  /* Total number of intput samples */
+  blkCnt = blockSize;
+
+  /* Loop over the blockSize. */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (i - 1U);
+
+      /* Loop over the polyPhase length */
+      tapCnt = phaseLen;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += ((q63_t) *ptr1++ * *ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* Store the result after converting to 1.15 format in the destination buffer. */
+      *pDst++ = (q15_t) (__SSAT((sum0 >> 15), 16));
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  tapCnt = phaseLen - 1U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEI)*/
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
index ee79cdbf..ea217603 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_interpolate_q31.c
@@ -1,481 +1,773 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_interpolate_q31.c
- * Description:  Q31 FIR interpolation
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Interpolate
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 FIR interpolator.
-  @param[in]     S          points to an instance of the Q31 FIR interpolator structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clip.
-                   In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>.
-                   since <code>numTaps/L</code> additions occur per output sample.
-                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
- */
-
-void arm_fir_interpolate_q31(
-  const arm_fir_interpolate_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCur;                              /* Points to the current sample of the state */
-        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
-  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
-        q63_t sum0;                                    /* Accumulators */
-        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
-        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-        uint32_t j;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc0, acc1, acc2, acc3;
-        q31_t x0, x1, x2, x3;
-        q31_t c0, c1, c2, c3;
-#endif
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (phaseLen - 1U);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-    *pStateCur++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = (S->L);
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      acc0 = 0;
-      acc1 = 0;
-      acc2 = 0;
-      acc3 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length. Unroll by a factor of 4.
-         Repeat until we've computed numTaps-(4*S->L) coefficients. */
-      tapCnt = phaseLen >> 2U;
-
-      x0 = *(ptr1++);
-      x1 = *(ptr1++);
-      x2 = *(ptr1++);
-
-      while (tapCnt > 0U)
-      {
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 * c0;
-        acc1 += (q63_t) x1 * c0;
-        acc2 += (q63_t) x2 * c0;
-        acc3 += (q63_t) x3 * c0;
-
-        /* Read the coefficient */
-        c1 = *(ptr2 + S->L);
-
-        /* Read the input sample */
-        x0 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x1 * c1;
-        acc1 += (q63_t) x2 * c1;
-        acc2 += (q63_t) x3 * c1;
-        acc3 += (q63_t) x0 * c1;
-
-        /* Read the coefficient */
-        c2 = *(ptr2 + S->L * 2);
-
-        /* Read the input sample */
-        x1 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x2 * c2;
-        acc1 += (q63_t) x3 * c2;
-        acc2 += (q63_t) x0 * c2;
-        acc3 += (q63_t) x1 * c2;
-
-        /* Read the coefficient */
-        c3 = *(ptr2 + S->L * 3);
-
-        /* Read the input sample */
-        x2 = *(ptr1++);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x3 * c3;
-        acc1 += (q63_t) x0 * c3;
-        acc2 += (q63_t) x1 * c3;
-        acc3 += (q63_t) x2 * c3;
-
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += 4 * S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
-      tapCnt = phaseLen % 0x4U;
-
-      while (tapCnt > 0U)
-      {
-        /* Read the input sample */
-        x3 = *(ptr1++);
-
-        /* Read the coefficient */
-        c0 = *(ptr2);
-
-        /* Perform the multiply-accumulate */
-        acc0 += (q63_t) x0 * c0;
-        acc1 += (q63_t) x1 * c0;
-        acc2 += (q63_t) x2 * c0;
-        acc3 += (q63_t) x3 * c0;
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* update states for next sample processing */
-        x0 = x1;
-        x1 = x2;
-        x2 = x3;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *(pDst           ) = (q31_t) (acc0 >> 31);
-      *(pDst +     S->L) = (q31_t) (acc1 >> 31);
-      *(pDst + 2 * S->L) = (q31_t) (acc2 >> 31);
-      *(pDst + 3 * S->L) = (q31_t) (acc3 >> 31);
-
-      pDst++;
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 4;
-
-    pDst += S->L * 3;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-
-    /* Address modifier index of coefficient buffer */
-    j = 1U;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (S->L - j);
-
-      /* Loop over the polyPhase length.
-         Repeat until we've computed numTaps-(4*S->L) coefficients. */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-     /* Loop unrolling: Compute 4 outputs at a time */
-      tapCnt = phaseLen >> 2U;
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-        ptr2 += S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      tapCnt = phaseLen % 0x4U;
-
-#else
-
-      /* Initialize tapCnt with number of samples */
-      tapCnt = phaseLen;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += (q63_t) *ptr1++ * *ptr2;
-
-        /* Upsampling is done by stuffing L-1 zeros between each sample.
-         * So instead of multiplying zeros with coefficients,
-         * Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum0 >> 31);
-
-      /* Increment the address modifier index of coefficient buffer */
-      j++;
-
-      /* Decrement the loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  tapCnt = (phaseLen - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  tapCnt = (phaseLen - 1U) % 0x04U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = (phaseLen - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCur;                              /* Points to the current sample of the state */
-        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
-  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
-        q63_t sum0;                                    /* Accumulators */
-        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
-        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
-
-  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
-  /* pStateCur points to the location where the new input data should be written */
-  pStateCur = S->pState + (phaseLen - 1U);
-
-  /* Total number of intput samples */
-  blkCnt = blockSize;
-
-  /* Loop over the blockSize. */
-  while (blkCnt > 0U)
-  {
-    /* Copy new input sample into the state buffer */
-    *pStateCur++ = *pSrc++;
-
-    /* Loop over the Interpolation factor. */
-    i = S->L;
-
-    while (i > 0U)
-    {
-      /* Set accumulator to zero */
-      sum0 = 0;
-
-      /* Initialize state pointer */
-      ptr1 = pState;
-
-      /* Initialize coefficient pointer */
-      ptr2 = pCoeffs + (i - 1U);
-
-      /* Loop over the polyPhase length */
-      tapCnt = phaseLen;
-
-      while (tapCnt > 0U)
-      {
-        /* Perform the multiply-accumulate */
-        sum0 += ((q63_t) *ptr1++ * *ptr2);
-
-        /* Increment the coefficient pointer by interpolation factor times. */
-        ptr2 += S->L;
-
-        /* Decrement the loop counter */
-        tapCnt--;
-      }
-
-      /* The result is in the accumulator, store in the destination buffer. */
-      *pDst++ = (q31_t) (sum0 >> 31);
-
-      /* Decrement loop counter */
-      i--;
-    }
-
-    /* Advance the state pointer by 1
-     * to process the next group of interpolation factor number samples */
-    pState = pState + 1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
-   ** This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCur = S->pState;
-
-  tapCnt = phaseLen - 1U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of FIR_Interpolate group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_interpolate_q31.c
+ * Description:  Q31 FIR interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Interpolate
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR interpolator.
+  @param[in]     S          points to an instance of the Q31 FIR interpolator structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by <code>1/(numTaps/L)</code>.
+                   since <code>numTaps/L</code> additions occur per output sample.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is truncated to 1.32 format and then saturated to 1.31 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_fir_interpolate_q31(
+  const arm_fir_interpolate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    q31_t    *pState = S->pState;   /* State pointer */
+    const q31_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q31_t    *pStateCurnt;      /* Points to the current sample of the state */
+    const q31_t    *ptr1, *ptr2;      /* Temporary pointers for state and coefficient buffers */
+
+    uint32_t  i, blkCnt;        /* Loop counters */
+    uint16_t  phaseLen = S->phaseLength;    /* Length of each polyphase filter component */
+    uint32_t  strides[4] = { 0, 1 * S->L, 2 * S->L, 3 * S->L };
+    uint32x4_t vec_strides0 =  vld1q_u32(strides);
+    uint32x4_t vec_strides1 = vec_strides0 + 1;
+    uint32x4_t vec_strides2 = vec_strides0 + 2;
+    uint32x4_t vec_strides3 = vec_strides0 + 3;
+    q31x4_t vecState, vecCoef;
+
+    /*
+     * S->pState buffer contains previous frame (phaseLen - 1) samples
+     * pStateCurnt points to the location where the new input data should be written
+     */
+    pStateCurnt = S->pState + ((q31_t) phaseLen - 1);
+    /*
+     * Total number of intput samples
+     */
+    blkCnt = blockSize;
+    /*
+     * Loop over the blockSize.
+     */
+    while (blkCnt > 0U)
+    {
+        /*
+         * Copy new input sample into the state buffer
+         */
+        *pStateCurnt++ = *pSrc++;
+        /*
+         * Loop over the Interpolation factor.
+         */
+        i = S->L;
+        while (i > 0U)
+        {
+            /*
+             * Initialize state pointer
+             */
+            ptr1 = pState;
+            if (i >= 4)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1 - 3U);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+                q63_t     acc2 = 0LL;
+                q63_t     acc3 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 2;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrwq_s32(ptr1);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides3);
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides2);
+                    acc1 = vrmlaldavhaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1);
+                    acc2 = vrmlaldavhaq(acc2, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0);
+                    acc3 = vrmlaldavhaq(acc3, vecState, vecCoef);
+
+                    ptr1 += 4;
+                    ptr2 = ptr2 + S->L * 4;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 3;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp32q(tapCnt);
+
+                    vecState = vldrwq_z_s32(ptr1, p0);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides3, p0);
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides2, p0);
+                    acc1 = vrmlaldavhaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0);
+                    acc2 = vrmlaldavhaq(acc2, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0);
+                    acc3 = vrmlaldavhaq(acc3, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 31 - 8);
+                acc1 = asrl(acc1, 31 - 8);
+                acc2 = asrl(acc2, 31 - 8);
+                acc3 = asrl(acc3, 31 - 8);
+
+                *pDst++ = (q31_t) acc0;
+                *pDst++ = (q31_t) acc1;
+                *pDst++ = (q31_t) acc2;
+                *pDst++ = (q31_t) acc3;
+                i -= 4;
+            }
+            else if (i >= 3)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U - 2);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+                q63_t     acc2 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 2;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrwq_s32(ptr1);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides2);
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1);
+                    acc1 = vrmlaldavhaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0);
+                    acc2 = vrmlaldavhaq(acc2, vecState, vecCoef);
+
+                    ptr1 += 4;
+                    ptr2 = ptr2 + S->L * 4;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 3;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp32q(tapCnt);
+
+                    vecState = vldrwq_z_s32(ptr1, p0);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides2, p0);
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0);
+                    acc1 = vrmlaldavhaq(acc1, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0);
+                    acc2 = vrmlaldavhaq(acc2, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 31 - 8);
+                acc1 = asrl(acc1, 31 - 8);
+                acc2 = asrl(acc2, 31 - 8);
+
+                *pDst++ = (q31_t) acc0;
+                *pDst++ = (q31_t) acc1;
+                *pDst++ = (q31_t) acc2;
+                i -= 3;
+            }
+            else if (i >= 2)
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U - 1);
+
+                q63_t     acc0 = 0LL;
+                q63_t     acc1 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 2;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrwq_s32(ptr1);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides1);
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0);
+                    acc1 = vrmlaldavhaq(acc1, vecState, vecCoef);
+
+                    ptr1 += 4;
+                    ptr2 = ptr2 + S->L * 4;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 3;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp32q(tapCnt);
+
+                    vecState = vldrwq_z_s32(ptr1, p0);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides1, p0);
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0);
+                    acc1 = vrmlaldavhaq(acc1, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 31 - 8);
+                acc1 = asrl(acc1, 31 - 8);
+
+                *pDst++ = (q31_t) acc0;
+                *pDst++ = (q31_t) acc1;
+                i -= 2;
+            }
+            else
+            {
+                /*
+                 * Initialize coefficient pointer
+                 */
+                ptr2 = pCoeffs + (i - 1U);
+
+                q63_t     acc0 = 0LL;
+
+                uint32_t  tapCnt = phaseLen >> 2;
+                while (tapCnt > 0U)
+                {
+                    vecState = vldrwq_s32(ptr1);
+                    vecCoef = vldrwq_gather_shifted_offset_s32(ptr2, vec_strides0);
+
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+
+                    ptr1 += 4;
+                    ptr2 = ptr2 + S->L * 4;
+                    tapCnt--;
+                }
+                tapCnt = phaseLen & 3;
+                if (tapCnt > 0U)
+                {
+                    mve_pred16_t p0 = vctp32q(tapCnt);
+
+                    vecState = vldrwq_z_s32(ptr1, p0);
+                    vecCoef = vldrwq_gather_shifted_offset_z_s32(ptr2, vec_strides0, p0);
+                    acc0 = vrmlaldavhaq(acc0, vecState, vecCoef);
+                }
+
+                acc0 = asrl(acc0, 31 - 8);
+                *pDst++ = (q31_t) acc0;
+                /*
+                 * Decrement the loop counter
+                 */
+                i--;
+            }
+        }
+        /*
+         * Advance the state pointer by 1
+         * * to process the next group of interpolation factor number samples
+         */
+        pState = pState + 1;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * Processing is complete.
+     * ** Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     * ** This prepares the state buffer for the next function call.
+     */
+
+    /*
+     * Points to the start of the state buffer
+     */
+    pStateCurnt = S->pState;
+    blkCnt = (phaseLen - 1U) >> 2;
+    while (blkCnt > 0U)
+    {
+        vst1q(pStateCurnt, vldrwq_s32(pState));
+        pState += 4;
+        pStateCurnt += 4;
+        blkCnt--;
+    }
+    blkCnt = (phaseLen - 1U) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_s32(pStateCurnt, vldrwq_s32(pState), p0);
+    }
+}
+#else
+void arm_fir_interpolate_q31(
+  const arm_fir_interpolate_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+        uint32_t j;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc0, acc1, acc2, acc3;
+        q31_t x0, x1, x2, x3;
+        q31_t c0, c1, c2, c3;
+#endif
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = (S->L);
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      acc0 = 0;
+      acc1 = 0;
+      acc2 = 0;
+      acc3 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length. Unroll by a factor of 4.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+      tapCnt = phaseLen >> 2U;
+
+      x0 = *(ptr1++);
+      x1 = *(ptr1++);
+      x2 = *(ptr1++);
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Read the coefficient */
+        c1 = *(ptr2 + S->L);
+
+        /* Read the input sample */
+        x0 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x1 * c1;
+        acc1 += (q63_t) x2 * c1;
+        acc2 += (q63_t) x3 * c1;
+        acc3 += (q63_t) x0 * c1;
+
+        /* Read the coefficient */
+        c2 = *(ptr2 + S->L * 2);
+
+        /* Read the input sample */
+        x1 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x2 * c2;
+        acc1 += (q63_t) x3 * c2;
+        acc2 += (q63_t) x0 * c2;
+        acc3 += (q63_t) x1 * c2;
+
+        /* Read the coefficient */
+        c3 = *(ptr2 + S->L * 3);
+
+        /* Read the input sample */
+        x2 = *(ptr1++);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x3 * c3;
+        acc1 += (q63_t) x0 * c3;
+        acc2 += (q63_t) x1 * c3;
+        acc3 += (q63_t) x2 * c3;
+
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += 4 * S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* If the polyPhase length is not a multiple of 4, compute the remaining filter taps */
+      tapCnt = phaseLen % 0x4U;
+
+      while (tapCnt > 0U)
+      {
+        /* Read the input sample */
+        x3 = *(ptr1++);
+
+        /* Read the coefficient */
+        c0 = *(ptr2);
+
+        /* Perform the multiply-accumulate */
+        acc0 += (q63_t) x0 * c0;
+        acc1 += (q63_t) x1 * c0;
+        acc2 += (q63_t) x2 * c0;
+        acc3 += (q63_t) x3 * c0;
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* update states for next sample processing */
+        x0 = x1;
+        x1 = x2;
+        x2 = x3;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *(pDst           ) = (q31_t) (acc0 >> 31);
+      *(pDst +     S->L) = (q31_t) (acc1 >> 31);
+      *(pDst + 2 * S->L) = (q31_t) (acc2 >> 31);
+      *(pDst + 3 * S->L) = (q31_t) (acc3 >> 31);
+
+      pDst++;
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 4;
+
+    pDst += S->L * 3;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Address modifier index of coefficient buffer */
+    j = 1U;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (S->L - j);
+
+      /* Loop over the polyPhase length.
+         Repeat until we've computed numTaps-(4*S->L) coefficients. */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+     /* Loop unrolling: Compute 4 outputs at a time */
+      tapCnt = phaseLen >> 2U;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      tapCnt = phaseLen % 0x4U;
+
+#else
+
+      /* Initialize tapCnt with number of samples */
+      tapCnt = phaseLen;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += (q63_t) *ptr1++ * *ptr2;
+
+        /* Upsampling is done by stuffing L-1 zeros between each sample.
+         * So instead of multiplying zeros with coefficients,
+         * Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = (q31_t) (sum0 >> 31);
+
+      /* Increment the address modifier index of coefficient buffer */
+      j++;
+
+      /* Decrement the loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last phaseLen - 1 samples to the satrt of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  tapCnt = (phaseLen - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  tapCnt = (phaseLen - 1U) % 0x04U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = (phaseLen - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCur;                              /* Points to the current sample of the state */
+        q31_t *ptr1;                                   /* Temporary pointer for state buffer */
+  const q31_t *ptr2;                                   /* Temporary pointer for coefficient buffer */
+        q63_t sum0;                                    /* Accumulators */
+        uint32_t i, blkCnt, tapCnt;                    /* Loop counters */
+        uint32_t phaseLen = S->phaseLength;            /* Length of each polyphase filter component */
+
+  /* S->pState buffer contains previous frame (phaseLen - 1) samples */
+  /* pStateCur points to the location where the new input data should be written */
+  pStateCur = S->pState + (phaseLen - 1U);
+
+  /* Total number of intput samples */
+  blkCnt = blockSize;
+
+  /* Loop over the blockSize. */
+  while (blkCnt > 0U)
+  {
+    /* Copy new input sample into the state buffer */
+    *pStateCur++ = *pSrc++;
+
+    /* Loop over the Interpolation factor. */
+    i = S->L;
+
+    while (i > 0U)
+    {
+      /* Set accumulator to zero */
+      sum0 = 0;
+
+      /* Initialize state pointer */
+      ptr1 = pState;
+
+      /* Initialize coefficient pointer */
+      ptr2 = pCoeffs + (i - 1U);
+
+      /* Loop over the polyPhase length */
+      tapCnt = phaseLen;
+
+      while (tapCnt > 0U)
+      {
+        /* Perform the multiply-accumulate */
+        sum0 += ((q63_t) *ptr1++ * *ptr2);
+
+        /* Increment the coefficient pointer by interpolation factor times. */
+        ptr2 += S->L;
+
+        /* Decrement the loop counter */
+        tapCnt--;
+      }
+
+      /* The result is in the accumulator, store in the destination buffer. */
+      *pDst++ = (q31_t) (sum0 >> 31);
+
+      /* Decrement loop counter */
+      i--;
+    }
+
+    /* Advance the state pointer by 1
+     * to process the next group of interpolation factor number samples */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+   ** Now copy the last phaseLen - 1 samples to the start of the state buffer.
+   ** This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCur = S->pState;
+
+  tapCnt = phaseLen - 1U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+/**
+  @} end of FIR_Interpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
index 8577fee3..77ea75c1 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_f32.c
@@ -1,453 +1,453 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_lattice_f32.c
- * Description:  Processing function for floating-point FIR Lattice filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
-
-  This set of functions implements Finite Impulse Response (FIR) lattice filters
-  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
-  variety of adaptive filter applications. The filter structure is feedforward and
-  the net impulse response is finite length.
-  The functions operate on blocks
-  of input and output data and each call to the function processes
-  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
-  <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
-
-  @par           Algorithm
-                   \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
-                   The following difference equation is implemented:
-  @par
-  <pre>
-      f0[n] = g0[n] = x[n]
-      fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
-      gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
-      y[n] = fM[n]
-  </pre>
-  @par
-                   <code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>.
-                   Reflection Coefficients are stored in the following order.
-  @par
-  <pre>
-      {k1, k2, ..., kM}
-  </pre>
-                   where M is number of stages
-  @par
-                   <code>pState</code> points to a state array of size <code>numStages</code>.
-                   The state variables (g values) hold previous inputs and are stored in the following order.
-  <pre>
-    {g0[n], g1[n], g2[n] ...gM-1[n]}
-  </pre>
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-
-  @par           Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
-  <pre>
-      arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
-      arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
-      arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
-  </pre>
-  @par
-                   where <code>numStages</code> is the number of stages in the filter;
-                   <code>pState</code> is the address of the state buffer;
-                   <code>pCoeffs</code> is the address of the coefficient buffer.
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
-                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-                   Refer to the function specific documentation below for usage guidelines.
- */
-
-/**
-  @addtogroup FIR_Lattice
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point FIR lattice filter.
-  @param[in]     S          points to an instance of the floating-point FIR lattice structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-
-void arm_fir_lattice_f32(
-  const arm_fir_lattice_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *px;                                 /* Temporary state pointer */
-  const float32_t *pk;                                 /* Temporary coefficient pointer */
-        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-        uint32_t blkCnt, stageCnt;                     /* Loop counters */
-        float32_t fcurr0, fnext0, gnext0, gcurr0;      /* Temporary variables */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        float32_t fcurr1, fnext1, gnext1;              /* Temporary variables for second sample in loop unrolling */
-        float32_t fcurr2, fnext2, gnext2;              /* Temporary variables for third sample in loop unrolling */
-        float32_t fcurr3, fnext3, gnext3;              /* Temporary variables for fourth sample in loop unrolling */
-#endif
-
-  gcurr0 = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-    fcurr1 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* Read g0(n-1) from state buffer */
-    gcurr0 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = (gcurr0 * (*pk)) + fcurr0;
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = (fcurr0 * (*pk)) + gcurr0;
-
-    /* Process second sample for first tap */
-    fnext1 = (fcurr0 * (*pk)) + fcurr1;
-    gnext1 = (fcurr1 * (*pk)) + fcurr0;
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurr2 = *pSrc++;
-    fcurr3 = *pSrc++;
-
-    /* Process third sample for first tap */
-    fnext2 = (fcurr1 * (*pk)) + fcurr2;
-    gnext2 = (fcurr2 * (*pk)) + fcurr1;
-
-    /* Process fourth sample for first tap */
-    fnext3 = (fcurr2 * (*pk  )) + fcurr3;
-    gnext3 = (fcurr3 * (*pk++)) + fcurr2;
-
-    /* Copy only last input sample into the state buffer
-       which will be used for next samples processing */
-    *px++ = fcurr3;
-
-    /* Update of f values for next coefficient set processing */
-    fcurr0 = fnext0;
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-    fcurr3 = fnext3;
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1U) >> 2U;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-       Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while (stageCnt > 0U)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext0 = (gcurr0 * (*pk)) + fcurr0;
-
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext1 = (gnext0 * (*pk)) + fcurr1;
-
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext2 = (gnext1 * (*pk)) + fcurr2;
-
-      /* Process fourth sample for 2nd, 6th .. tap */
-      fnext3 = (gnext2 * (*pk)) + fcurr3;
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      /* Calculation of state values for next stage */
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-
-      gnext1 = (fcurr1 * (*pk)) + gnext0;
-
-      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g2(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurr0 = (gcurr0 * (*pk)) + fnext0;
-
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurr1 = (gnext0 * (*pk)) + fnext1;
-
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurr2 = (gnext1 * (*pk)) + fnext2;
-
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurr3 = (gnext2 * (*pk)) + fnext3;
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-
-      gnext1 = (fnext1 * (*pk)) + gnext0;
-
-      gnext0 = (fnext0 * (*pk++)) + gcurr0;
-
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g3(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext0 = (gcurr0 * (*pk)) + fcurr0;
-
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext1 = (gnext0 * (*pk)) + fcurr1;
-
-      /* Process third sample for 4th, 8th .. tap */
-      fnext2 = (gnext1 * (*pk)) + fcurr2;
-
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext3 = (gnext2 * (*pk)) + fcurr3;
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-
-      gnext1 = (fcurr1 * (*pk)) + gnext0;
-
-      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurr0 = (gcurr0 * (*pk)) + fnext0;
-
-      /* Process second sample for 5th, 9th .. tap */
-      fcurr1 = (gnext0 * (*pk)) + fnext1;
-
-      /* Process third sample for 5th, 9th .. tap */
-      fcurr2 = (gnext1 * (*pk)) + fnext2;
-
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurr3 = (gnext2 * (*pk)) + fnext3;
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext3 = (fnext3 * (*pk)) + gnext2;
-
-      gnext2 = (fnext2 * (*pk)) + gnext1;
-
-      gnext1 = (fnext1 * (*pk)) + gnext0;
-
-      gnext0 = (fnext0 * (*pk++)) + gcurr0;
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1U) % 0x4U;
-
-    while (stageCnt > 0U)
-    {
-      gcurr0 = *px;
-
-      /* save g value in state buffer */
-      *px++ = gnext3;
-
-      /* Process four samples for last three taps here */
-      fnext0 = (gcurr0 * (*pk)) + fcurr0;
-
-      fnext1 = (gnext0 * (*pk)) + fcurr1;
-
-      fnext2 = (gnext1 * (*pk)) + fcurr2;
-
-      fnext3 = (gnext2 * (*pk)) + fcurr3;
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext3 = (fcurr3 * (*pk)) + gnext2;
-
-      gnext2 = (fcurr2 * (*pk)) + gnext1;
-
-      gnext1 = (fcurr1 * (*pk)) + gnext0;
-
-      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
-
-      /* Update of f values for next coefficient set processing */
-      fcurr0 = fnext0;
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-      fcurr3 = fnext3;
-
-      stageCnt--;
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr0;
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-    *pDst++ = fcurr3;
-
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* read g2(n) from state buffer */
-    gcurr0 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = (gcurr0 * (*pk)) + fcurr0;
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = (fcurr0 * (*pk++)) + gcurr0;
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr0;
-
-    /* f1(n) is saved in fcurr0 for next stage processing */
-    fcurr0 = fnext0;
-
-    stageCnt = (numStages - 1U);
-
-    /* stage loop */
-    while (stageCnt > 0U)
-    {
-      /* read g2(n) from state buffer */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext0;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext0 = (gcurr0 * (*pk)) + fcurr0;
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
-
-      /* f1(n) is saved in fcurr0 for next stage processing */
-      fcurr0 = fnext0;
-
-      stageCnt--;
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr0;
-
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_f32.c
+ * Description:  Processing function for floating-point FIR Lattice filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR_Lattice Finite Impulse Response (FIR) Lattice Filters
+
+  This set of functions implements Finite Impulse Response (FIR) lattice filters
+  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
+  variety of adaptive filter applications. The filter structure is feedforward and
+  the net impulse response is finite length.
+  The functions operate on blocks
+  of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   \image html FIRLattice.gif "Finite Impulse Response Lattice filter"
+                   The following difference equation is implemented:
+  @par
+  <pre>
+      f0[n] = g0[n] = x[n]
+      fm[n] = fm-1[n] + km * gm-1[n-1] for m = 1, 2, ...M
+      gm[n] = km * fm-1[n] + gm-1[n-1] for m = 1, 2, ...M
+      y[n] = fM[n]
+  </pre>
+  @par
+                   <code>pCoeffs</code> points to tha array of reflection coefficients of size <code>numStages</code>.
+                   Reflection Coefficients are stored in the following order.
+  @par
+  <pre>
+      {k1, k2, ..., kM}
+  </pre>
+                   where M is number of stages
+  @par
+                   <code>pState</code> points to a state array of size <code>numStages</code>.
+                   The state variables (g values) hold previous inputs and are stored in the following order.
+  <pre>
+    {g0[n], g1[n], g2[n] ...gM-1[n]}
+  </pre>
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+  <pre>
+      arm_fir_lattice_instance_f32 S = {numStages, pState, pCoeffs};
+      arm_fir_lattice_instance_q31 S = {numStages, pState, pCoeffs};
+      arm_fir_lattice_instance_q15 S = {numStages, pState, pCoeffs};
+  </pre>
+  @par
+                   where <code>numStages</code> is the number of stages in the filter;
+                   <code>pState</code> is the address of the state buffer;
+                   <code>pCoeffs</code> is the address of the coefficient buffer.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the FIR Lattice filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point FIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_fir_lattice_f32(
+  const arm_fir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* Temporary state pointer */
+  const float32_t *pk;                                 /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        float32_t fcurr0, fnext0, gnext0, gcurr0;      /* Temporary variables */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t fcurr1, fnext1, gnext1;              /* Temporary variables for second sample in loop unrolling */
+        float32_t fcurr2, fnext2, gnext2;              /* Temporary variables for third sample in loop unrolling */
+        float32_t fcurr3, fnext3, gnext3;              /* Temporary variables for fourth sample in loop unrolling */
+#endif
+
+  gcurr0 = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Read two samples from input buffer */
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+    fcurr1 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* Process first sample for first tap */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (fcurr0 * (*pk)) + gcurr0;
+
+    /* Process second sample for first tap */
+    fnext1 = (fcurr0 * (*pk)) + fcurr1;
+    gnext1 = (fcurr1 * (*pk)) + fcurr0;
+
+    /* Read next two samples from input buffer */
+    /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
+
+    /* Process third sample for first tap */
+    fnext2 = (fcurr1 * (*pk)) + fcurr2;
+    gnext2 = (fcurr2 * (*pk)) + fcurr1;
+
+    /* Process fourth sample for first tap */
+    fnext3 = (fcurr2 * (*pk  )) + fcurr3;
+    gnext3 = (fcurr3 * (*pk++)) + fcurr2;
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = fcurr3;
+
+    /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
+    fcurr1 = fnext1;
+    fcurr2 = fnext2;
+    fcurr3 = fnext3;
+
+    /* Loop unrolling.  Process 4 taps at a time . */
+    stageCnt = (numStages - 1U) >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numStages-3 coefficients. */
+
+    /* Process 2nd, 3rd, 4th and 5th taps ... here */
+    while (stageCnt > 0U)
+    {
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Process first sample for 2nd, 6th .. tap */
+      /* Sample processing for K2, K6.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      /* Process second sample for 2nd, 6th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+      /* Process third sample for 2nd, 6th .. tap */
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+      /* Process fourth sample for 2nd, 6th .. tap */
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (fcurr3 * (*pk)) + gnext2;
+
+      gnext2 = (fcurr2 * (*pk)) + gnext1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g2(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K3, K7.... */
+      /* Process first sample for 3rd, 7th .. tap */
+      /* f3(n) = f2(n) +  K3 * g2(n-1) */
+      fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
+      /* Process second sample for 3rd, 7th .. tap */
+      fcurr1 = (gnext0 * (*pk)) + fnext1;
+
+      /* Process third sample for 3rd, 7th .. tap */
+      fcurr2 = (gnext1 * (*pk)) + fnext2;
+
+      /* Process fourth sample for 3rd, 7th .. tap */
+      fcurr3 = (gnext2 * (*pk)) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g3(n) = f2(n) * K3  +  g2(n-1) */
+      gnext3 = (fnext3 * (*pk)) + gnext2;
+
+      gnext2 = (fnext2 * (*pk)) + gnext1;
+
+      gnext1 = (fnext1 * (*pk)) + gnext0;
+
+      gnext0 = (fnext0 * (*pk++)) + gcurr0;
+
+
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g3(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K4, K8.... */
+      /* Process first sample for 4th, 8th .. tap */
+      /* f4(n) = f3(n) +  K4 * g3(n-1) */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      /* Process second sample for 4th, 8th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+      /* Process third sample for 4th, 8th .. tap */
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+      /* Process fourth sample for 4th, 8th .. tap */
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
+
+      /* g4(n) = f3(n) * K4  +  g3(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (fcurr3 * (*pk)) + gnext2;
+
+      gnext2 = (fcurr2 * (*pk)) + gnext1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g4(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K5, K9.... */
+      /* Process first sample for 5th, 9th .. tap */
+      /* f5(n) = f4(n) +  K5 * g4(n-1) */
+      fcurr0 = (gcurr0 * (*pk)) + fnext0;
+
+      /* Process second sample for 5th, 9th .. tap */
+      fcurr1 = (gnext0 * (*pk)) + fnext1;
+
+      /* Process third sample for 5th, 9th .. tap */
+      fcurr2 = (gnext1 * (*pk)) + fnext2;
+
+      /* Process fourth sample for 5th, 9th .. tap */
+      fcurr3 = (gnext2 * (*pk)) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g5(n) = f4(n) * K5  +  g4(n-1) */
+      gnext3 = (fnext3 * (*pk)) + gnext2;
+
+      gnext2 = (fnext2 * (*pk)) + gnext1;
+
+      gnext1 = (fnext1 * (*pk)) + gnext0;
+
+      gnext0 = (fnext0 * (*pk++)) + gcurr0;
+
+      stageCnt--;
+    }
+
+    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+    stageCnt = (numStages - 1U) % 0x4U;
+
+    while (stageCnt > 0U)
+    {
+      gcurr0 = *px;
+
+      /* save g value in state buffer */
+      *px++ = gnext3;
+
+      /* Process four samples for last three taps here */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      fnext1 = (gnext0 * (*pk)) + fcurr1;
+
+      fnext2 = (gnext1 * (*pk)) + fcurr2;
+
+      fnext3 = (gnext2 * (*pk)) + fcurr3;
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      gnext3 = (fcurr3 * (*pk)) + gnext2;
+
+      gnext2 = (fcurr2 * (*pk)) + gnext1;
+
+      gnext1 = (fcurr1 * (*pk)) + gnext0;
+
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+      /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
+      fcurr1 = fnext1;
+      fcurr2 = fnext2;
+      fcurr3 = fnext3;
+
+      stageCnt--;
+    }
+
+    /* The results in the 4 accumulators, store in the destination buffer. */
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+    *pDst++ = fcurr1;
+    *pDst++ = fcurr2;
+    *pDst++ = fcurr3;
+
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+    /* save g1(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g2(n) from state buffer */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (gcurr0 * (*pk)) + fcurr0;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (fcurr0 * (*pk++)) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
index c6aade1f..a3a0c224 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_f32.c
@@ -1,70 +1,70 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_lattice_init_f32.c
- * Description:  Floating-point FIR Lattice filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Lattice
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point FIR lattice filter.
-  @param[in]     S          points to an instance of the floating-point FIR lattice structure
-  @param[in]     numStages  number of filter stages
-  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
-  @param[in]     pState     points to the state buffer.  The array is of length numStages
-  @return        none
- */
-
-void arm_fir_lattice_init_f32(
-        arm_fir_lattice_instance_f32 * S,
-        uint16_t numStages,
-  const float32_t * pCoeffs,
-        float32_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_init_f32.c
+ * Description:  Floating-point FIR Lattice filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point FIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
+
+void arm_fir_lattice_init_f32(
+        arm_fir_lattice_instance_f32 * S,
+        uint16_t numStages,
+  const float32_t * pCoeffs,
+        float32_t * pState)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always numStages */
+  memset(pState, 0, (numStages) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
index 1cdfea36..3996d484 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q15.c
@@ -1,70 +1,70 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_lattice_init_q15.c
- * Description:  Q15 FIR Lattice filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Lattice
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 FIR lattice filter.
-  @param[in]     S          points to an instance of the Q15 FIR lattice structure
-  @param[in]     numStages  number of filter stages
-  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
-  @param[in]     pState     points to the state buffer.  The array is of length numStages
-  @return        none
- */
-
-void arm_fir_lattice_init_q15(
-        arm_fir_lattice_instance_q15 * S,
-        uint16_t numStages,
-  const q15_t * pCoeffs,
-        q15_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_init_q15.c
+ * Description:  Q15 FIR Lattice filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
+
+void arm_fir_lattice_init_q15(
+        arm_fir_lattice_instance_q15 * S,
+        uint16_t numStages,
+  const q15_t * pCoeffs,
+        q15_t * pState)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always numStages */
+  memset(pState, 0, (numStages) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
index 0aef4ea4..4a91b590 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_init_q31.c
@@ -1,70 +1,70 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_lattice_init_q31.c
- * Description:  Q31 FIR lattice filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Lattice
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 FIR lattice filter.
-  @param[in]     S          points to an instance of the Q31 FIR lattice structure
-  @param[in]     numStages  number of filter stages
-  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
-  @param[in]     pState     points to the state buffer.  The array is of length numStages
-  @return        none
- */
-
-void arm_fir_lattice_init_q31(
-        arm_fir_lattice_instance_q31 * S,
-        uint16_t numStages,
-  const q31_t * pCoeffs,
-        q31_t * pState)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always numStages */
-  memset(pState, 0, (numStages) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_init_q31.c
+ * Description:  Q31 FIR lattice filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 FIR lattice structure
+  @param[in]     numStages  number of filter stages
+  @param[in]     pCoeffs    points to the coefficient buffer.  The array is of length numStages
+  @param[in]     pState     points to the state buffer.  The array is of length numStages
+  @return        none
+ */
+
+void arm_fir_lattice_init_q31(
+        arm_fir_lattice_instance_q31 * S,
+        uint16_t numStages,
+  const q31_t * pCoeffs,
+        q31_t * pState)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always numStages */
+  memset(pState, 0, (numStages) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
index 59a000b8..14b7076d 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q15.c
@@ -1,506 +1,506 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_lattice_q15.c
- * Description:  Q15 FIR lattice filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Lattice
-  @{
- */
-
-/**
-  @brief         Processing function for Q15 FIR lattice filter.
-  @param[in]     S          points to an instance of the Q15 FIR lattice structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-
-void arm_fir_lattice_q15(
-  const arm_fir_lattice_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *px;                                     /* Temporary state pointer */
-  const q15_t *pk;                                     /* Temporary coefficient pointer */
-        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-        uint32_t blkCnt, stageCnt;                     /* Loop counters */
-        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
-  q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
-  q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
-#endif
-
-  gcurr0 = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-    fcurr1 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* Read g0(n-1) from state buffer */
-    gcurr0 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
-    fnext0 = __SSAT(fnext0, 16);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + gcurr0;
-    gnext0 = __SSAT(gnext0, 16);
-
-    /* Process second sample for first tap */
-    fnext1 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + fcurr1;
-    fnext1 = __SSAT(fnext1, 16);
-    gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr0;
-    gnext1 = __SSAT(gnext1, 16);
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurr2 = *pSrc++;
-    fcurr3 = *pSrc++;
-
-    /* Process third sample for first tap */
-    fnext2 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr2;
-    fnext2 = __SSAT(fnext2, 16);
-    gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + fcurr1;
-    gnext2 = __SSAT(gnext2, 16);
-
-    /* Process fourth sample for first tap */
-    fnext3 = (q31_t) ((fcurr2 * (*pk  )) >> 15U) + fcurr3;
-    fnext3 = __SSAT(fnext3, 16);
-    gnext3 = (q31_t) ((fcurr3 * (*pk++)) >> 15U) + fcurr2;
-    gnext3 = __SSAT(gnext3, 16);
-
-    /* Copy only last input sample into the state buffer
-       which will be used for next samples processing */
-    *px++ = (q15_t) fcurr3;
-
-    /* Update of f values for next coefficient set processing */
-    fcurr0 = fnext0;
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-    fcurr3 = fnext3;
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1U) >> 2U;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-       Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while (stageCnt > 0U)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext3;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f1(n) = f0(n) +  K1 * g0(n-1) */
-      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
-      fnext0 = __SSAT(fnext0, 16);
-
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      /* Process fourth sample for 2nd, 6th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      /* Calculation of state values for next stage */
-      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
-      gnext1 = __SSAT(gnext1, 16);
-
-      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
-      gnext0 = __SSAT(gnext0, 16);
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext3;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
-      fcurr0 = __SSAT(fcurr0, 16);
-
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
-      fcurr1 = __SSAT(fcurr1, 16);
-
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
-      fcurr2 = __SSAT(fcurr2, 16);
-
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
-      fcurr3 = __SSAT(fcurr3, 16);
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
-      gnext1 = __SSAT(gnext1, 16);
-
-      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
-      gnext0 = __SSAT(gnext0, 16);
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext3;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
-      fnext0 = __SSAT(fnext0, 16);
-
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      /* Process third sample for 4th, 8th .. tap */
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
-      gnext1 = __SSAT(gnext1, 16);
-
-      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
-      gnext0 = __SSAT(gnext0, 16);
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = (q15_t) gnext3;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
-      fcurr0 = __SSAT(fcurr0, 16);
-
-      /* Process second sample for 5th, 9th .. tap */
-      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
-      fcurr1 = __SSAT(fcurr1, 16);
-
-      /* Process third sample for 5th, 9th .. tap */
-      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
-      fcurr2 = __SSAT(fcurr2, 16);
-
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
-      fcurr3 = __SSAT(fcurr3, 16);
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
-      gnext1 = __SSAT(gnext1, 16);
-
-      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
-      gnext0 = __SSAT(gnext0, 16);
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1U) % 0x4U;
-
-    while (stageCnt > 0U)
-    {
-      gcurr0 = *px;
-
-      /* save g value in state buffer */
-      *px++ = (q15_t) gnext3;
-
-      /* Process four samples for last three taps here */
-      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
-      fnext0 = __SSAT(fnext0, 16);
-
-      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
-      fnext1 = __SSAT(fnext1, 16);
-
-      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
-      fnext2 = __SSAT(fnext2, 16);
-
-      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
-      fnext3 = __SSAT(fnext3, 16);
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
-      gnext3 = __SSAT(gnext3, 16);
-
-      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
-      gnext2 = __SSAT(gnext2, 16);
-
-      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
-      gnext1 = __SSAT(gnext1, 16);
-
-      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
-      gnext0 = __SSAT(gnext0, 16);
-
-      /* Update of f values for next coefficient set processing */
-      fcurr0 = fnext0;
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-      fcurr3 = fnext3;
-
-      stageCnt--;
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pDst, __PKHBT(fcurr0, fcurr1, 16));
-    write_q15x2_ia (&pDst, __PKHBT(fcurr2, fcurr3, 16));
-#else
-    write_q15x2_ia (&pDst, __PKHBT(fcurr1, fcurr0, 16));
-    write_q15x2_ia (&pDst, __PKHBT(fcurr3, fcurr2, 16));
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* read g2(n) from state buffer */
-    gcurr0 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
-    fnext0 = __SSAT(fnext0, 16);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
-    gnext0 = __SSAT(gnext0, 16);
-
-    /* save g1(n) in state buffer */
-    *px++ = (q15_t) fcurr0;
-
-    /* f1(n) is saved in fcurr0 for next stage processing */
-    fcurr0 = fnext0;
-
-    stageCnt = (numStages - 1U);
-
-    /* stage loop */
-    while (stageCnt > 0U)
-    {
-      /* read g2(n) from state buffer */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = (q15_t) gnext0;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
-      fnext0 = __SSAT(fnext0, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
-      gnext0 = __SSAT(gnext0, 16);
-
-      /* f1(n) is saved in fcurr0 for next stage processing */
-      fcurr0 = fnext0;
-
-      stageCnt--;
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurr0, 16);
-
-    blkCnt--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* read g0(n-1) from state buffer */
-    gcurr0 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
-    fnext0 = __SSAT(fnext, 16);
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
-    gnext0 = __SSAT(gnext0, 16);
-
-    /* save f0(n) in state buffer */
-    *px++ = (q15_t) fcurr0;
-
-    /* f1(n) is saved in fcurr for next stage processing */
-    fcurr0 = fnext0;
-
-    stageCnt = (numStages - 1U);
-
-    /* stage loop */
-    while (stageCnt > 0U)
-    {
-      /* read g1(n-1) from state buffer */
-      gcurr0 = *px;
-
-      /* save g0(n-1) in state buffer */
-      *px++ = (q15_t) gnext0;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
-      fnext0 = __SSAT(fnext0, 16);
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
-      gnext0 = __SSAT(gnext0, 16);
-
-      /* f1(n) is saved in fcurr0 for next stage processing */
-      fcurr0 = fnext0;
-
-      stageCnt--;
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = __SSAT(fcurr0, 16);
-
-    blkCnt--;
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of FIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_q15.c
+ * Description:  Q15 FIR lattice filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_fir_lattice_q15(
+  const arm_fir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *px;                                     /* Temporary state pointer */
+  const q15_t *pk;                                     /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
+  q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
+  q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
+#endif
+
+  gcurr0 = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Read two samples from input buffer */
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+    fcurr1 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* Process first sample for first tap */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext0, 16);
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
+
+    /* Process second sample for first tap */
+    fnext1 = (q31_t) ((fcurr0 * (*pk)) >> 15U) + fcurr1;
+    fnext1 = __SSAT(fnext1, 16);
+    gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr0;
+    gnext1 = __SSAT(gnext1, 16);
+
+    /* Read next two samples from input buffer */
+    /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
+
+    /* Process third sample for first tap */
+    fnext2 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + fcurr2;
+    fnext2 = __SSAT(fnext2, 16);
+    gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + fcurr1;
+    gnext2 = __SSAT(gnext2, 16);
+
+    /* Process fourth sample for first tap */
+    fnext3 = (q31_t) ((fcurr2 * (*pk  )) >> 15U) + fcurr3;
+    fnext3 = __SSAT(fnext3, 16);
+    gnext3 = (q31_t) ((fcurr3 * (*pk++)) >> 15U) + fcurr2;
+    gnext3 = __SSAT(gnext3, 16);
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = (q15_t) fcurr3;
+
+    /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
+    fcurr1 = fnext1;
+    fcurr2 = fnext2;
+    fcurr3 = fnext3;
+
+    /* Loop unrolling.  Process 4 taps at a time . */
+    stageCnt = (numStages - 1U) >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numStages-3 coefficients. */
+
+    /* Process 2nd, 3rd, 4th and 5th taps ... here */
+    while (stageCnt > 0U)
+    {
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Process first sample for 2nd, 6th .. tap */
+      /* Sample processing for K2, K6.... */
+      /* f1(n) = f0(n) +  K1 * g0(n-1) */
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* Process second sample for 2nd, 6th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
+
+      /* Process third sample for 2nd, 6th .. tap */
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
+
+      /* Process fourth sample for 2nd, 6th .. tap */
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Sample processing for K3, K7.... */
+      /* Process first sample for 3rd, 7th .. tap */
+      /* f3(n) = f2(n) +  K3 * g2(n-1) */
+      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+      fcurr0 = __SSAT(fcurr0, 16);
+
+      /* Process second sample for 3rd, 7th .. tap */
+      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+      fcurr1 = __SSAT(fcurr1, 16);
+
+      /* Process third sample for 3rd, 7th .. tap */
+      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+      fcurr2 = __SSAT(fcurr2, 16);
+
+      /* Process fourth sample for 3rd, 7th .. tap */
+      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+      fcurr3 = __SSAT(fcurr3, 16);
+
+      /* Calculation of state values for next stage */
+      /* g3(n) = f2(n) * K3  +  g2(n-1) */
+      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Sample processing for K4, K8.... */
+      /* Process first sample for 4th, 8th .. tap */
+      /* f4(n) = f3(n) +  K4 * g3(n-1) */
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* Process second sample for 4th, 8th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
+
+      /* Process third sample for 4th, 8th .. tap */
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
+
+      /* Process fourth sample for 4th, 8th .. tap */
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
+
+      /* g4(n) = f3(n) * K4  +  g3(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g4(n) in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Sample processing for K5, K9.... */
+      /* Process first sample for 5th, 9th .. tap */
+      /* f5(n) = f4(n) +  K5 * g4(n-1) */
+      fcurr0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fnext0;
+      fcurr0 = __SSAT(fcurr0, 16);
+
+      /* Process second sample for 5th, 9th .. tap */
+      fcurr1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fnext1;
+      fcurr1 = __SSAT(fcurr1, 16);
+
+      /* Process third sample for 5th, 9th .. tap */
+      fcurr2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fnext2;
+      fcurr2 = __SSAT(fcurr2, 16);
+
+      /* Process fourth sample for 5th, 9th .. tap */
+      fcurr3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fnext3;
+      fcurr3 = __SSAT(fcurr3, 16);
+
+      /* Calculation of state values for next stage */
+      /* g5(n) = f4(n) * K5  +  g4(n-1) */
+      gnext3 = (q31_t) ((fnext3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fnext2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fnext1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fnext0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      stageCnt--;
+    }
+
+    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+    stageCnt = (numStages - 1U) % 0x4U;
+
+    while (stageCnt > 0U)
+    {
+      gcurr0 = *px;
+
+      /* save g value in state buffer */
+      *px++ = (q15_t) gnext3;
+
+      /* Process four samples for last three taps here */
+      fnext0 = (q31_t) ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      fnext1 = (q31_t) ((gnext0 * (*pk)) >> 15U) + fcurr1;
+      fnext1 = __SSAT(fnext1, 16);
+
+      fnext2 = (q31_t) ((gnext1 * (*pk)) >> 15U) + fcurr2;
+      fnext2 = __SSAT(fnext2, 16);
+
+      fnext3 = (q31_t) ((gnext2 * (*pk)) >> 15U) + fcurr3;
+      fnext3 = __SSAT(fnext3, 16);
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      gnext3 = (q31_t) ((fcurr3 * (*pk)) >> 15U) + gnext2;
+      gnext3 = __SSAT(gnext3, 16);
+
+      gnext2 = (q31_t) ((fcurr2 * (*pk)) >> 15U) + gnext1;
+      gnext2 = __SSAT(gnext2, 16);
+
+      gnext1 = (q31_t) ((fcurr1 * (*pk)) >> 15U) + gnext0;
+      gnext1 = __SSAT(gnext1, 16);
+
+      gnext0 = (q31_t) ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
+      fcurr1 = fnext1;
+      fcurr2 = fnext2;
+      fcurr3 = fnext3;
+
+      stageCnt--;
+    }
+
+    /* The results in the 4 accumulators, store in the destination buffer. */
+    /* y(n) = fN(n) */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(fcurr0, fcurr1, 16));
+    write_q15x2_ia (&pDst, __PKHBT(fcurr2, fcurr3, 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(fcurr1, fcurr0, 16));
+    write_q15x2_ia (&pDst, __PKHBT(fcurr3, fcurr2, 16));
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext0, 16);
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
+
+    /* save g1(n) in state buffer */
+    *px++ = (q15_t) fcurr0;
+
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g2(n) from state buffer */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = (q15_t) gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (((q31_t) gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (((q31_t) fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = __SSAT(fcurr0, 16);
+
+    blkCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+    fnext0 = __SSAT(fnext, 16);
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+    gnext0 = __SSAT(gnext0, 16);
+
+    /* save f0(n) in state buffer */
+    *px++ = (q15_t) fcurr0;
+
+    /* f1(n) is saved in fcurr for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g1(n-1) from state buffer */
+      gcurr0 = *px;
+
+      /* save g0(n-1) in state buffer */
+      *px++ = (q15_t) gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = ((gcurr0 * (*pk)) >> 15U) + fcurr0;
+      fnext0 = __SSAT(fnext0, 16);
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = ((fcurr0 * (*pk++)) >> 15U) + gcurr0;
+      gnext0 = __SSAT(gnext0, 16);
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = __SSAT(fcurr0, 16);
+
+    blkCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
index 9d292956..3b835518 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_lattice_q31.c
@@ -1,505 +1,505 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_lattice_q31.c
- * Description:  Q31 FIR lattice filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Lattice
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 FIR lattice filter.
-  @param[in]     S          points to an instance of the Q31 FIR lattice structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
- */
-
-void arm_fir_lattice_q31(
-  const arm_fir_lattice_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *px;                                     /* Temporary state pointer */
-  const q31_t *pk;                                     /* Temporary coefficient pointer */
-        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
-        uint32_t blkCnt, stageCnt;                     /* Loop counters */
-        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
-
-#if (1)
-//#if !defined(ARM_MATH_CM0_FAMILY)
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
-        q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
-        q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
-#endif
-
-  gcurr0 = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Read two samples from input buffer */
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-    fcurr1 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* Read g0(n-1) from state buffer */
-    gcurr0 = *px;
-
-    /* Process first sample for first tap */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-    fnext0 = (fnext0 << 1U) + fcurr0;
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
-    gnext0 = (gnext0 << 1U) + gcurr0;
-
-    /* Process second sample for first tap */
-    fnext1 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
-    fnext1 = (fnext1 << 1U) + fcurr1;
-    gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
-    gnext1 = (gnext1 << 1U) + fcurr0;
-
-    /* Read next two samples from input buffer */
-    /* f0(n+2) = x(n+2) */
-    fcurr2 = *pSrc++;
-    fcurr3 = *pSrc++;
-
-    /* Process third sample for first tap */
-    fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
-    fnext2 = (fnext2 << 1U) + fcurr2;
-    gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
-    gnext2 = (gnext2 << 1U) + fcurr1;
-
-    /* Process fourth sample for first tap */
-    fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk  )) >> 32U);
-    fnext3 = (fnext3 << 1U) + fcurr3;
-    gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk++)) >> 32U);
-    gnext3 = (gnext3 << 1U) + fcurr2;
-
-    /* Copy only last input sample into the state buffer
-       which will be used for next samples processing */
-    *px++ = fcurr3;
-
-    /* Update of f values for next coefficient set processing */
-    fcurr0 = fnext0;
-    fcurr1 = fnext1;
-    fcurr2 = fnext2;
-    fcurr3 = fnext3;
-
-    /* Loop unrolling.  Process 4 taps at a time . */
-    stageCnt = (numStages - 1U) >> 2U;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-       Repeat until we've computed numStages-3 coefficients. */
-
-    /* Process 2nd, 3rd, 4th and 5th taps ... here */
-    while (stageCnt > 0U)
-    {
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Process first sample for 2nd, 6th .. tap */
-      /* Sample processing for K2, K6.... */
-      /* f1(n) = f0(n) +  K1 * g0(n-1) */
-      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-      fnext0 = (fnext0 << 1U) + fcurr0;
-
-      /* Process second sample for 2nd, 6th .. tap */
-      /* for sample 2 processing */
-      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
-      fnext1 = (fnext1 << 1U) + fcurr1;
-
-      /* Process third sample for 2nd, 6th .. tap */
-      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
-      fnext2 = (fnext2 << 1U) + fcurr2;
-
-      /* Process fourth sample for 2nd, 6th .. tap */
-      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
-      fnext3 = (fnext3 << 1U) + fcurr3;
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      /* Calculation of state values for next stage */
-      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
-      gnext3 = (gnext3 << 1U) + gnext2;
-
-      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
-      gnext2 = (gnext2 << 1U) + gnext1;
-
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
-      gnext1 = (gnext1 << 1U) + gnext0;
-
-      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
-      gnext0 = (gnext0 << 1U) + gcurr0;
-
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Sample processing for K3, K7.... */
-      /* Process first sample for 3rd, 7th .. tap */
-      /* f3(n) = f2(n) +  K3 * g2(n-1) */
-      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-      fcurr0 = (fcurr0 << 1U) + fnext0;
-
-      /* Process second sample for 3rd, 7th .. tap */
-      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
-      fcurr1 = (fcurr1 << 1U) + fnext1;
-
-      /* Process third sample for 3rd, 7th .. tap */
-      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
-      fcurr2 = (fcurr2 << 1U) + fnext2;
-
-      /* Process fourth sample for 3rd, 7th .. tap */
-      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
-      fcurr3 = (fcurr3 << 1U) + fnext3;
-
-      /* Calculation of state values for next stage */
-      /* g3(n) = f2(n) * K3  +  g2(n-1) */
-      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
-      gnext3 = (gnext3 << 1U) + gnext2;
-
-      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
-      gnext2 = (gnext2 << 1U) + gnext1;
-
-      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
-      gnext1 = (gnext1 << 1U) + gnext0;
-
-      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
-      gnext0 = (gnext0 << 1U) + gcurr0;
-
-      /* Read g1(n-1), g3(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Sample processing for K4, K8.... */
-      /* Process first sample for 4th, 8th .. tap */
-      /* f4(n) = f3(n) +  K4 * g3(n-1) */
-      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-      fnext0 = (fnext0 << 1U) + fcurr0;
-
-      /* Process second sample for 4th, 8th .. tap */
-      /* for sample 2 processing */
-      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
-      fnext1 = (fnext1 << 1U) + fcurr1;
-
-      /* Process third sample for 4th, 8th .. tap */
-      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
-      fnext2 = (fnext2 << 1U) + fcurr2;
-
-      /* Process fourth sample for 4th, 8th .. tap */
-      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
-      fnext3 = (fnext3 << 1U) + fcurr3;
-
-      /* g4(n) = f3(n) * K4  +  g3(n-1) */
-      /* Calculation of state values for next stage */
-      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
-      gnext3 = (gnext3 << 1U) + gnext2;
-
-      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
-      gnext2 = (gnext2 << 1U) + gnext1;
-
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
-      gnext1 = (gnext1 << 1U) + gnext0;
-
-      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
-      gnext0 = (gnext0 << 1U) + gcurr0;
-
-      /* Read g2(n-1), g4(n-1) .... from state */
-      gcurr0 = *px;
-
-      /* save g4(n) in state buffer */
-      *px++ = gnext3;
-
-      /* Sample processing for K5, K9.... */
-      /* Process first sample for 5th, 9th .. tap */
-      /* f5(n) = f4(n) +  K5 * g4(n-1) */
-      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-      fcurr0 = (fcurr0 << 1U) + fnext0;
-
-      /* Process second sample for 5th, 9th .. tap */
-      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
-      fcurr1 = (fcurr1 << 1U) + fnext1;
-
-      /* Process third sample for 5th, 9th .. tap */
-      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
-      fcurr2 = (fcurr2 << 1U) + fnext2;
-
-      /* Process fourth sample for 5th, 9th .. tap */
-      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
-      fcurr3 = (fcurr3 << 1U) + fnext3;
-
-      /* Calculation of state values for next stage */
-      /* g5(n) = f4(n) * K5  +  g4(n-1) */
-      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
-      gnext3 = (gnext3 << 1U) + gnext2;
-
-      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
-      gnext2 = (gnext2 << 1U) + gnext1;
-
-      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
-      gnext1 = (gnext1 << 1U) + gnext0;
-
-      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
-      gnext0 = (gnext0 << 1U) + gcurr0;
-
-      stageCnt--;
-    }
-
-    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
-    stageCnt = (numStages - 1U) % 0x4U;
-
-    while (stageCnt > 0U)
-    {
-      gcurr0 = *px;
-
-      /* save g value in state buffer */
-      *px++ = gnext3;
-
-      /* Process four samples for last three taps here */
-      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-      fnext0 = (fnext0 << 1U) + fcurr0;
-
-      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
-      fnext1 = (fnext1 << 1U) + fcurr1;
-
-      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
-      fnext2 = (fnext2 << 1U) + fcurr2;
-
-      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
-      fnext3 = (fnext3 << 1U) + fcurr3;
-
-      /* g1(n) = f0(n) * K1  +  g0(n-1) */
-      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
-      gnext3 = (gnext3 << 1U) + gnext2;
-
-      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
-      gnext2 = (gnext2 << 1U) + gnext1;
-
-      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
-      gnext1 = (gnext1 << 1U) + gnext0;
-
-      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
-      gnext0 = (gnext0 << 1U) + gcurr0;
-
-      /* Update of f values for next coefficient set processing */
-      fcurr0 = fnext0;
-      fcurr1 = fnext1;
-      fcurr2 = fnext2;
-      fcurr3 = fnext3;
-
-      stageCnt--;
-    }
-
-    /* The results in the 4 accumulators, store in the destination buffer. */
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr0;
-    *pDst++ = fcurr1;
-    *pDst++ = fcurr2;
-    *pDst++ = fcurr3;
-
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* read g2(n) from state buffer */
-    gcurr0 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-    fnext0 = (fnext0 << 1U) + fcurr0;
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
-    gnext0 = (gnext0 << 1U) + gcurr0;
-
-    /* save g1(n) in state buffer */
-    *px++ = fcurr0;
-
-    /* f1(n) is saved in fcurr0 for next stage processing */
-    fcurr0 = fnext0;
-
-    stageCnt = (numStages - 1U);
-
-    /* stage loop */
-    while (stageCnt > 0U)
-    {
-      /* read g2(n) from state buffer */
-      gcurr0 = *px;
-
-      /* save g1(n) in state buffer */
-      *px++ = gnext0;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-      fnext0 = (fnext0 << 1U) + fcurr0;
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
-      gnext0 = (gnext0 << 1U) + gcurr0;
-
-      /* f1(n) is saved in fcurr0 for next stage processing */
-      fcurr0 = fnext0;
-
-      stageCnt--;
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr0;
-
-    blkCnt--;
-  }
-
-#else
-/* alternate version for CM0_FAMILY */
-
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* f0(n) = x(n) */
-    fcurr0 = *pSrc++;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pk = pCoeffs;
-
-    /* read g0(n-1) from state buffer */
-    gcurr0 = *px;
-
-    /* for sample 1 processing */
-    /* f1(n) = f0(n) +  K1 * g0(n-1) */
-    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-    fnext0 = (fnext << 1U) + fcurr0;
-
-    /* g1(n) = f0(n) * K1  +  g0(n-1) */
-    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
-    gnext0 = (gnext0 << 1U) + gcurr0;
-
-    /* save f0(n) in state buffer */
-    *px++ = fcurr0;
-
-    /* f1(n) is saved in fcurr for next stage processing */
-    fcurr0 = fnext0;
-
-    stageCnt = (numStages - 1U);
-
-    /* stage loop */
-    while (stageCnt > 0U)
-    {
-      /* read g1(n-1) from state buffer */
-      gcurr0 = *px;
-
-      /* save g0(n-1) in state buffer */
-      *px++ = gnext0;
-
-      /* Sample processing for K2, K3.... */
-      /* f2(n) = f1(n) +  K2 * g1(n-1) */
-      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
-      fnext0 = (fnext0 << 1U) + fcurr0;
-
-      /* g2(n) = f1(n) * K2  +  g1(n-1) */
-      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
-      gnext0 = (gnext0 << 1U) + gcurr0;
-
-      /* f1(n) is saved in fcurr0 for next stage processing */
-      fcurr0 = fnext0;
-
-      stageCnt--;
-    }
-
-    /* y(n) = fN(n) */
-    *pDst++ = fcurr0;
-
-    blkCnt--;
-  }
-
-#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
-
-}
-
-/**
-  @} end of FIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_lattice_q31.c
+ * Description:  Q31 FIR lattice filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 FIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 FIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   In order to avoid overflows the input signal must be scaled down by 2*log2(numStages) bits.
+ */
+
+void arm_fir_lattice_q31(
+  const arm_fir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* Temporary state pointer */
+  const q31_t *pk;                                     /* Temporary coefficient pointer */
+        uint32_t numStages = S->numStages;             /* Number of stages in the filter */
+        uint32_t blkCnt, stageCnt;                     /* Loop counters */
+        q31_t fcurr0, fnext0, gnext0, gcurr0;          /* Temporary variables */
+
+#if (1)
+//#if !defined(ARM_MATH_CM0_FAMILY)
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t fcurr1, fnext1, gnext1;                  /* Temporary variables for second sample in loop unrolling */
+        q31_t fcurr2, fnext2, gnext2;                  /* Temporary variables for third sample in loop unrolling */
+        q31_t fcurr3, fnext3, gnext3;                  /* Temporary variables for fourth sample in loop unrolling */
+#endif
+
+  gcurr0 = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Read two samples from input buffer */
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+    fcurr1 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* Read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* Process first sample for first tap */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext0 << 1U) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* Process second sample for first tap */
+    fnext1 = (q31_t) (((q63_t) fcurr0 * (*pk)) >> 32U);
+    fnext1 = (fnext1 << 1U) + fcurr1;
+    gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+    gnext1 = (gnext1 << 1U) + fcurr0;
+
+    /* Read next two samples from input buffer */
+    /* f0(n+2) = x(n+2) */
+    fcurr2 = *pSrc++;
+    fcurr3 = *pSrc++;
+
+    /* Process third sample for first tap */
+    fnext2 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+    fnext2 = (fnext2 << 1U) + fcurr2;
+    gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+    gnext2 = (gnext2 << 1U) + fcurr1;
+
+    /* Process fourth sample for first tap */
+    fnext3 = (q31_t) (((q63_t) fcurr2 * (*pk  )) >> 32U);
+    fnext3 = (fnext3 << 1U) + fcurr3;
+    gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk++)) >> 32U);
+    gnext3 = (gnext3 << 1U) + fcurr2;
+
+    /* Copy only last input sample into the state buffer
+       which will be used for next samples processing */
+    *px++ = fcurr3;
+
+    /* Update of f values for next coefficient set processing */
+    fcurr0 = fnext0;
+    fcurr1 = fnext1;
+    fcurr2 = fnext2;
+    fcurr3 = fnext3;
+
+    /* Loop unrolling.  Process 4 taps at a time . */
+    stageCnt = (numStages - 1U) >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numStages-3 coefficients. */
+
+    /* Process 2nd, 3rd, 4th and 5th taps ... here */
+    while (stageCnt > 0U)
+    {
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Process first sample for 2nd, 6th .. tap */
+      /* Sample processing for K2, K6.... */
+      /* f1(n) = f0(n) +  K1 * g0(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* Process second sample for 2nd, 6th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      /* Process third sample for 2nd, 6th .. tap */
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      /* Process fourth sample for 2nd, 6th .. tap */
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K3, K7.... */
+      /* Process first sample for 3rd, 7th .. tap */
+      /* f3(n) = f2(n) +  K3 * g2(n-1) */
+      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fcurr0 = (fcurr0 << 1U) + fnext0;
+
+      /* Process second sample for 3rd, 7th .. tap */
+      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fcurr1 = (fcurr1 << 1U) + fnext1;
+
+      /* Process third sample for 3rd, 7th .. tap */
+      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fcurr2 = (fcurr2 << 1U) + fnext2;
+
+      /* Process fourth sample for 3rd, 7th .. tap */
+      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fcurr3 = (fcurr3 << 1U) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g3(n) = f2(n) * K3  +  g2(n-1) */
+      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Read g1(n-1), g3(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K4, K8.... */
+      /* Process first sample for 4th, 8th .. tap */
+      /* f4(n) = f3(n) +  K4 * g3(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* Process second sample for 4th, 8th .. tap */
+      /* for sample 2 processing */
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      /* Process third sample for 4th, 8th .. tap */
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      /* Process fourth sample for 4th, 8th .. tap */
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g4(n) = f3(n) * K4  +  g3(n-1) */
+      /* Calculation of state values for next stage */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Read g2(n-1), g4(n-1) .... from state */
+      gcurr0 = *px;
+
+      /* save g4(n) in state buffer */
+      *px++ = gnext3;
+
+      /* Sample processing for K5, K9.... */
+      /* Process first sample for 5th, 9th .. tap */
+      /* f5(n) = f4(n) +  K5 * g4(n-1) */
+      fcurr0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fcurr0 = (fcurr0 << 1U) + fnext0;
+
+      /* Process second sample for 5th, 9th .. tap */
+      fcurr1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fcurr1 = (fcurr1 << 1U) + fnext1;
+
+      /* Process third sample for 5th, 9th .. tap */
+      fcurr2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fcurr2 = (fcurr2 << 1U) + fnext2;
+
+      /* Process fourth sample for 5th, 9th .. tap */
+      fcurr3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fcurr3 = (fcurr3 << 1U) + fnext3;
+
+      /* Calculation of state values for next stage */
+      /* g5(n) = f4(n) * K5  +  g4(n-1) */
+      gnext3 = (q31_t) (((q63_t) fnext3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fnext2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fnext1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fnext0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      stageCnt--;
+    }
+
+    /* If the (filter length -1) is not a multiple of 4, compute the remaining filter taps */
+    stageCnt = (numStages - 1U) % 0x4U;
+
+    while (stageCnt > 0U)
+    {
+      gcurr0 = *px;
+
+      /* save g value in state buffer */
+      *px++ = gnext3;
+
+      /* Process four samples for last three taps here */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      fnext1 = (q31_t) (((q63_t) gnext0 * (*pk)) >> 32U);
+      fnext1 = (fnext1 << 1U) + fcurr1;
+
+      fnext2 = (q31_t) (((q63_t) gnext1 * (*pk)) >> 32U);
+      fnext2 = (fnext2 << 1U) + fcurr2;
+
+      fnext3 = (q31_t) (((q63_t) gnext2 * (*pk)) >> 32U);
+      fnext3 = (fnext3 << 1U) + fcurr3;
+
+      /* g1(n) = f0(n) * K1  +  g0(n-1) */
+      gnext3 = (q31_t) (((q63_t) fcurr3 * (*pk)) >> 32U);
+      gnext3 = (gnext3 << 1U) + gnext2;
+
+      gnext2 = (q31_t) (((q63_t) fcurr2 * (*pk)) >> 32U);
+      gnext2 = (gnext2 << 1U) + gnext1;
+
+      gnext1 = (q31_t) (((q63_t) fcurr1 * (*pk)) >> 32U);
+      gnext1 = (gnext1 << 1U) + gnext0;
+
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* Update of f values for next coefficient set processing */
+      fcurr0 = fnext0;
+      fcurr1 = fnext1;
+      fcurr2 = fnext2;
+      fcurr3 = fnext3;
+
+      stageCnt--;
+    }
+
+    /* The results in the 4 accumulators, store in the destination buffer. */
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+    *pDst++ = fcurr1;
+    *pDst++ = fcurr2;
+    *pDst++ = fcurr3;
+
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g2(n) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext0 << 1U) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* save g1(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr0 for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g2(n) from state buffer */
+      gcurr0 = *px;
+
+      /* save g1(n) in state buffer */
+      *px++ = gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+
+    blkCnt--;
+  }
+
+#else
+/* alternate version for CM0_FAMILY */
+
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* f0(n) = x(n) */
+    fcurr0 = *pSrc++;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pk = pCoeffs;
+
+    /* read g0(n-1) from state buffer */
+    gcurr0 = *px;
+
+    /* for sample 1 processing */
+    /* f1(n) = f0(n) +  K1 * g0(n-1) */
+    fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+    fnext0 = (fnext << 1U) + fcurr0;
+
+    /* g1(n) = f0(n) * K1  +  g0(n-1) */
+    gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+    gnext0 = (gnext0 << 1U) + gcurr0;
+
+    /* save f0(n) in state buffer */
+    *px++ = fcurr0;
+
+    /* f1(n) is saved in fcurr for next stage processing */
+    fcurr0 = fnext0;
+
+    stageCnt = (numStages - 1U);
+
+    /* stage loop */
+    while (stageCnt > 0U)
+    {
+      /* read g1(n-1) from state buffer */
+      gcurr0 = *px;
+
+      /* save g0(n-1) in state buffer */
+      *px++ = gnext0;
+
+      /* Sample processing for K2, K3.... */
+      /* f2(n) = f1(n) +  K2 * g1(n-1) */
+      fnext0 = (q31_t) (((q63_t) gcurr0 * (*pk)) >> 32U);
+      fnext0 = (fnext0 << 1U) + fcurr0;
+
+      /* g2(n) = f1(n) * K2  +  g1(n-1) */
+      gnext0 = (q31_t) (((q63_t) fcurr0 * (*pk++)) >> 32U);
+      gnext0 = (gnext0 << 1U) + gcurr0;
+
+      /* f1(n) is saved in fcurr0 for next stage processing */
+      fcurr0 = fnext0;
+
+      stageCnt--;
+    }
+
+    /* y(n) = fN(n) */
+    *pDst++ = fcurr0;
+
+    blkCnt--;
+  }
+
+#endif /* #if !defined(ARM_MATH_CM0_FAMILY) */
+
+}
+
+/**
+  @} end of FIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
index 48506a83..f00959b8 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q15.c
@@ -1,332 +1,732 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_q15.c
- * Description:  Q15 FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 FIR filter.
-  @param[in]     S          points to an instance of the Q15 FIR filter structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
-
-  @remark
-                   Refer to \ref arm_fir_fast_q15() for a faster but less precise implementation of this function.
- */
-
-void arm_fir_q15(
-  const arm_fir_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q15_t *px;                                     /* Temporary pointer for state buffer */
-  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q63_t acc0;                                    /* Accumulators */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc1, acc2, acc3;                        /* Accumulators */
-        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
-#endif
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 output values simultaneously.
-   * The variables acc0 ... acc3 hold output values that are being computed:
-   *
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-   */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 new input samples into the state buffer. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
-    px = pState;
-
-    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
-    pb = pCoeffs;
-
-    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
-    x0 = read_q15x2_ia (&px);
-
-    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
-    x2 = read_q15x2_ia (&px);
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc0 = __SMLALD(x0, c0, acc0);
-
-      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack  x[n-N-1] and x[n-N-2] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read state x[n-N-4], x[n-N-5] */
-      x0 = read_q15x2_ia (&px);
-
-      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-3] and x[n-N-4] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Read coefficients b[N-2], b[N-3] */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
-      acc0 = __SMLALD(x2, c0, acc0);
-
-      /* Read state x[n-N-6], x[n-N-7] with offset */
-      x2 = read_q15x2_ia (&px);
-
-      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
-      acc2 = __SMLALD(x0, c0, acc2);
-
-      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack  x[n-N-5] and x[n-N-6] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
-      acc3 = __SMLALDX(x1, c0, acc3);
-
-      /* Decrement tap count */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
-       This is always be 2 taps since the filter length is even. */
-    if ((numTaps & 0x3U) != 0U)
-    {
-      /* Read last two coefficients */
-      c0 = read_q15x2_ia ((q15_t **) &pb);
-
-      /* Perform the multiply-accumulates */
-      acc0 = __SMLALD(x0, c0, acc0);
-      acc2 = __SMLALD(x2, c0, acc2);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x2, x0, 0);
-#else
-      x1 = __PKHBT(x0, x2, 0);
-#endif
-
-      /* Read last state variables */
-      x0 = read_q15x2 (px);
-
-      /* Perform the multiply-accumulates */
-      acc1 = __SMLALDX(x1, c0, acc1);
-
-      /* pack state variables */
-#ifndef ARM_MATH_BIG_ENDIAN
-      x1 = __PKHBT(x0, x2, 0);
-#else
-      x1 = __PKHBT(x2, x0, 0);
-#endif
-
-      /* Perform the multiply-accumulates */
-      acc3 = __SMLALDX(x1, c0, acc3);
-    }
-
-    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
-       Then store the 4 outputs in the destination buffer. */
-#ifndef ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
-#else
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
-    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining output samples */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of taps */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy two samples into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Use SIMD to hold states and coefficients */
-    px = pState;
-    pb = pCoeffs;
-
-    tapCnt = numTaps >> 1U;
-
-    do
-    {
-      acc0 += (q31_t) *px++ * *pb++;
-	  acc0 += (q31_t) *px++ * *pb++;
-
-      tapCnt--;
-    }
-    while (tapCnt > 0U);
-
-    /* The result is in 2.30 format. Convert to 1.15 with saturation.
-       Then store the output in the destination buffer. */
-    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_q15.c
+ * Description:  Q15 FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 FIR filter.
+  @param[in]     S          points to an instance of the Q15 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+
+  @remark
+                   Refer to \ref arm_fir_fast_q15() for a faster but less precise implementation of this function.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MVE_ASRL_SAT16(acc, shift)          ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff)
+
+
+#define FIR_Q15_CORE(pOutput, nbAcc, nbVecTaps, pSample, vecCoeffs)        \
+        for (int j = 0; j < nbAcc; j++) {                                  \
+            const q15_t    *pSmp = &pSample[j];                            \
+            q63_t           acc[4];                                        \
+                                                                           \
+            acc[j] = 0;                                                    \
+            for (int i = 0; i < nbVecTaps; i++) {                          \
+                vecIn0 = vld1q(pSmp + 8 * i);                  \
+                acc[j] = vmlaldavaq(acc[j], vecIn0, vecCoeffs[i]);         \
+            }                                                              \
+            *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc[j], 15);               \
+        }
+
+#define FIR_Q15_MAIN_CORE()                                                                  \
+{                                                                                            \
+    q15_t          *pState = S->pState;     /* State pointer */                              \
+    const q15_t    *pCoeffs = S->pCoeffs;   /* Coefficient pointer */                        \
+    q15_t          *pStateCur;              /* Points to the current sample of the state */  \
+    const q15_t    *pSamples;               /* Temporary pointer to the sample buffer */     \
+    q15_t          *pOutput;                /* Temporary pointer to the output buffer */     \
+    const q15_t    *pTempSrc;               /* Temporary pointer to the source data */       \
+    q15_t          *pTempDest;              /* Temporary pointer to the destination buffer */\
+    uint32_t        numTaps = S->numTaps;   /* Number of filter coefficients in the filter */\
+    int32_t         blkCnt;                                                                  \
+    q15x8_t         vecIn0;                                                                  \
+                                                                                             \
+    /*                                                                                       \
+     * load coefs                                                                            \
+     */                                                                                      \
+    q15x8_t         vecCoeffs[NBVECTAPS];                                                    \
+                                                                                             \
+    for (int i = 0; i < NBVECTAPS; i++)                                                      \
+        vecCoeffs[i] = vldrhq_s16(pCoeffs + 8 * i);                                          \
+                                                                                             \
+    /*                                                                                       \
+     * pState points to state array which contains previous frame (numTaps - 1) samples      \
+     * pStateCur points to the location where the new input data should be written           \
+     */                                                                                      \
+    pStateCur = &(pState[(numTaps - 1u)]);                                                   \
+    pTempSrc = pSrc;                                                                         \
+    pSamples = pState;                                                                       \
+    pOutput = pDst;                                                                          \
+                                                                                             \
+    blkCnt = blockSize >> 2;                                                                 \
+    while (blkCnt > 0) {                                                                     \
+        /*                                                                                   \
+         * Save 4 input samples in the history buffer                                        \
+         */                                                                                  \
+        vstrhq_s32(pStateCur, vldrhq_s32(pTempSrc));                                         \
+        pStateCur += 4;                                                                      \
+        pTempSrc += 4;                                                                       \
+                                                                                             \
+        FIR_Q15_CORE(pOutput, 4, NBVECTAPS, pSamples, vecCoeffs);                            \
+        pSamples += 4;                                                                       \
+                                                                                             \
+        blkCnt--;                                                                            \
+    }                                                                                        \
+                                                                                             \
+    /* tail */                                                                               \
+    int32_t        residual = blockSize & 3;                                                \
+                                                                                             \
+    for (int i = 0; i < residual; i++)                                                       \
+        *pStateCur++ = *pTempSrc++;                                                          \
+                                                                                             \
+    FIR_Q15_CORE(pOutput, residual, NBVECTAPS, pSamples, vecCoeffs);                         \
+                                                                                             \
+    /*                                                                                       \
+     * Copy the samples back into the history buffer start                                   \
+     */                                                                                      \
+    pTempSrc = &pState[blockSize];                                                           \
+    pTempDest = pState;                                                                      \
+                                                                                             \
+    /* current compiler limitation */                                                        \
+    blkCnt = (numTaps - 1) >> 3;                                                             \
+    while (blkCnt > 0)                                                                       \
+    {                                                                                        \
+        vstrhq_s16(pTempDest, vldrhq_s16(pTempSrc));                                         \
+        pTempSrc += 8;                                                                       \
+        pTempDest += 8;                                                                      \
+        blkCnt--;                                                                            \
+    }                                                                                        \
+    blkCnt = (numTaps - 1) & 7;                                                              \
+    if (blkCnt > 0)                                                                          \
+    {                                                                                        \
+        mve_pred16_t p = vctp16q(blkCnt);                                                    \
+        vstrhq_p_s16(pTempDest, vldrhq_z_s16(pTempSrc, p), p);                               \
+    }                                                                                        \
+}
+    
+static void arm_fir_q15_25_32_mve(const arm_fir_instance_q15 * S, 
+  const q15_t * __restrict pSrc,
+  q15_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 32
+    #define NBVECTAPS (NBTAPS / 8)
+    FIR_Q15_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+static void arm_fir_q15_17_24_mve(const arm_fir_instance_q15 * S, 
+  const q15_t * __restrict pSrc,
+  q15_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 24
+    #define NBVECTAPS (NBTAPS / 8)
+    FIR_Q15_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+static void arm_fir_q15_9_16_mve(const arm_fir_instance_q15 * S, 
+  const q15_t * __restrict pSrc,
+  q15_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 16
+    #define NBVECTAPS (NBTAPS / 8)
+    FIR_Q15_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+static void arm_fir_q15_1_8_mve(const arm_fir_instance_q15 * S, 
+  const q15_t * __restrict pSrc, 
+  q15_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 8
+    #define NBVECTAPS (NBTAPS / 8)
+    FIR_Q15_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+void arm_fir_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+    q15_t    *pState = S->pState;   /* State pointer */
+    const q15_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q15_t    *pStateCur;        /* Points to the current sample of the state */
+    const q15_t    *pSamples;         /* Temporary pointer to the sample buffer */
+    q15_t    *pOutput;          /* Temporary pointer to the output buffer */
+    const q15_t    *pTempSrc;         /* Temporary pointer to the source data */
+    q15_t    *pTempDest;        /* Temporary pointer to the destination buffer */
+    uint32_t  numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+    uint32_t  blkCnt;
+    q15x8_t vecIn0;
+    uint32_t  tapsBlkCnt = (numTaps + 7) / 8;
+    q63_t     acc0, acc1, acc2, acc3;
+
+
+int32_t nbTaps = (numTaps + 7) >> 3;
+
+switch(nbTaps) {
+
+    case 1:
+        arm_fir_q15_1_8_mve(S, pSrc, pDst, blockSize);
+        return;
+    case 2:
+        arm_fir_q15_9_16_mve(S, pSrc, pDst, blockSize);
+        return;
+    case 3:
+        arm_fir_q15_17_24_mve(S, pSrc, pDst, blockSize);
+        return;
+    case 4:
+        arm_fir_q15_25_32_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur   = &(pState[(numTaps - 1u)]);
+    pTempSrc    = pSrc;
+    pSamples    = pState;
+    pOutput     = pDst;
+    blkCnt      = blockSize >> 2;
+
+    while (blkCnt > 0U)
+    {
+        const q15_t    *pCoeffsTmp = pCoeffs;
+        const q15_t    *pSamplesTmp = pSamples;
+
+        acc0 = 0LL;
+        acc1 = 0LL;
+        acc2 = 0LL;
+        acc3 = 0LL;
+
+        /*
+         * Save 8 input samples in the history buffer
+         */
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 8;
+        pTempSrc += 8;
+
+        int       i = tapsBlkCnt;
+        while (i > 0)
+        {
+            /*
+             * load 8 coefs
+             */
+            q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp;
+
+            vecIn0 = vld1q(pSamplesTmp);
+            acc0 =  vmlaldavaq(acc0, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[1]);
+            acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[2]);
+            acc2 = vmlaldavaq(acc2, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[3]);
+            acc3 = vmlaldavaq(acc3, vecIn0, vecCoeffs);
+
+            pSamplesTmp += 8;
+            pCoeffsTmp += 8;
+            /*
+             * Decrement the taps block loop counter
+             */
+            i--;
+        }
+
+        *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15);
+        *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15);
+        *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15);
+        *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc3, 15);
+
+        pSamples += 4;
+        /*
+         * Decrement the sample block loop counter
+         */
+        blkCnt--;
+    }
+
+    uint32_t  residual = blockSize & 3;
+    switch (residual)
+    {
+    case 3:
+        {
+            const q15_t    *pCoeffsTmp = pCoeffs;
+            const q15_t    *pSamplesTmp = pSamples;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+            acc2 = 0LL;
+
+            /*
+             * Save 8 input samples in the history buffer
+             */
+            *(q15x8_t *) pStateCur = *(q15x8_t *) pTempSrc;
+            pStateCur += 8;
+            pTempSrc += 8;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                /*
+                 * load 8 coefs
+                 */
+                q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[2]);
+                acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[4]);
+                acc2 = vmlaldavaq(acc2, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 8;
+                pCoeffsTmp += 8;
+                /*
+                 * Decrement the taps block loop counter
+                 */
+                i--;
+            }
+
+            acc0 = asrl(acc0, 15);
+            acc1 = asrl(acc1, 15);
+            acc2 = asrl(acc2, 15);
+
+            *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15);
+            *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15);
+            *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc2, 15);
+        }
+        break;
+
+    case 2:
+        {
+            const q15_t    *pCoeffsTmp = pCoeffs;
+            const q15_t    *pSamplesTmp = pSamples;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+            /*
+             * Save 8 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 8;
+            pTempSrc += 8;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                /*
+                 * load 8 coefs
+                 */
+                q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[2]);
+                acc1 = vmlaldavaq(acc1, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 8;
+                pCoeffsTmp += 8;
+                /*
+                 * Decrement the taps block loop counter
+                 */
+                i--;
+            }
+
+            *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15);
+            *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc1, 15);
+        }
+        break;
+
+    case 1:
+        {
+            const q15_t    *pCoeffsTmp = pCoeffs;
+            const q15_t    *pSamplesTmp = pSamples;
+
+            acc0 = 0LL;
+
+            /*
+             * Save 8 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 8;
+            pTempSrc += 8;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                /*
+                 * load 8 coefs
+                 */
+                q15x8_t vecCoeffs = *(q15x8_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vmlaldavaq(acc0, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 8;
+                pCoeffsTmp += 8;
+                /*
+                 * Decrement the taps block loop counter
+                 */
+                i--;
+            }
+
+            *pOutput++ = (q15_t) MVE_ASRL_SAT16(acc0, 15);
+        }
+        break;
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = numTaps >> 3;
+    while (blkCnt > 0U)
+    {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 8;
+        pTempDest += 8;
+        blkCnt--;
+    }
+    blkCnt = numTaps & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vstrhq_p_s16(pTempDest, vld1q(pTempSrc), p0);
+    }
+}
+
+#else
+void arm_fir_q15(
+  const arm_fir_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px;                                     /* Temporary pointer for state buffer */
+  const q15_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q63_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2, acc3;                        /* Accumulators */
+        q31_t x0, x1, x2, c0;                          /* Temporary variables to hold state and coefficient values */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Typecast q15_t pointer to q31_t pointer for state reading in q31_t */
+    px = pState;
+
+    /* Typecast q15_t pointer to q31_t pointer for coefficient reading in q31_t */
+    pb = pCoeffs;
+
+    /* Read the first two samples from the state buffer:  x[n-N], x[n-N-1] */
+    x0 = read_q15x2_ia (&px);
+
+    /* Read the third and forth samples from the state buffer: x[n-N-2], x[n-N-3] */
+    x2 = read_q15x2_ia (&px);
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-(numTaps%4) coefficients. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the first two coefficients using SIMD:  b[N] and b[N-1] coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc0 = __SMLALD(x0, c0, acc0);
+
+      /* acc2 +=  b[N] * x[n-N-2] + b[N-1] * x[n-N-3] */
+      acc2 = __SMLALD(x2, c0, acc2);
+
+      /* pack  x[n-N-1] and x[n-N-2] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read state x[n-N-4], x[n-N-5] */
+      x0 = read_q15x2_ia (&px);
+
+      /* acc1 +=  b[N] * x[n-N-1] + b[N-1] * x[n-N-2] */
+      acc1 = __SMLALDX(x1, c0, acc1);
+
+      /* pack  x[n-N-3] and x[n-N-4] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* acc3 +=  b[N] * x[n-N-3] + b[N-1] * x[n-N-4] */
+      acc3 = __SMLALDX(x1, c0, acc3);
+
+      /* Read coefficients b[N-2], b[N-3] */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* acc0 +=  b[N-2] * x[n-N-2] + b[N-3] * x[n-N-3] */
+      acc0 = __SMLALD(x2, c0, acc0);
+
+      /* Read state x[n-N-6], x[n-N-7] with offset */
+      x2 = read_q15x2_ia (&px);
+
+      /* acc2 +=  b[N-2] * x[n-N-4] + b[N-3] * x[n-N-5] */
+      acc2 = __SMLALD(x0, c0, acc2);
+
+      /* acc1 +=  b[N-2] * x[n-N-3] + b[N-3] * x[n-N-4] */
+      acc1 = __SMLALDX(x1, c0, acc1);
+
+      /* pack  x[n-N-5] and x[n-N-6] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* acc3 +=  b[N-2] * x[n-N-5] + b[N-3] * x[n-N-6] */
+      acc3 = __SMLALDX(x1, c0, acc3);
+
+      /* Decrement tap count */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps.
+       This is always be 2 taps since the filter length is even. */
+    if ((numTaps & 0x3U) != 0U)
+    {
+      /* Read last two coefficients */
+      c0 = read_q15x2_ia ((q15_t **) &pb);
+
+      /* Perform the multiply-accumulates */
+      acc0 = __SMLALD(x0, c0, acc0);
+      acc2 = __SMLALD(x2, c0, acc2);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x2, x0, 0);
+#else
+      x1 = __PKHBT(x0, x2, 0);
+#endif
+
+      /* Read last state variables */
+      x0 = read_q15x2 (px);
+
+      /* Perform the multiply-accumulates */
+      acc1 = __SMLALDX(x1, c0, acc1);
+
+      /* pack state variables */
+#ifndef ARM_MATH_BIG_ENDIAN
+      x1 = __PKHBT(x0, x2, 0);
+#else
+      x1 = __PKHBT(x2, x0, 0);
+#endif
+
+      /* Perform the multiply-accumulates */
+      acc3 = __SMLALDX(x1, c0, acc3);
+    }
+
+    /* The results in the 4 accumulators are in 2.30 format. Convert to 1.15 with saturation.
+       Then store the 4 outputs in the destination buffer. */
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc0 >> 15), 16), __SSAT((acc1 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc2 >> 15), 16), __SSAT((acc3 >> 15), 16), 16));
+#else
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc1 >> 15), 16), __SSAT((acc0 >> 15), 16), 16));
+    write_q15x2_ia (&pDst, __PKHBT(__SSAT((acc3 >> 15), 16), __SSAT((acc2 >> 15), 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy two samples into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Use SIMD to hold states and coefficients */
+    px = pState;
+    pb = pCoeffs;
+
+    tapCnt = numTaps >> 1U;
+
+    while (tapCnt > 0U)
+    {
+      acc0 += (q31_t) *px++ * *pb++;
+	    acc0 += (q31_t) *px++ * *pb++;
+
+      tapCnt--;
+    }
+    
+
+    /* The result is in 2.30 format. Convert to 1.15 with saturation.
+       Then store the output in the destination buffer. */
+    *pDst++ = (q15_t) (__SSAT((acc0 >> 15), 16));
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
index 518f87ae..40fe5270 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q31.c
@@ -1,288 +1,1162 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_q31.c
- * Description:  Q31 FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Processing function for Q31 FIR filter.
-  @param[in]     S          points to an instance of the Q31 FIR filter structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clip.
-                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
-                   After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
-
- @remark
-                   Refer to \ref arm_fir_fast_q31() for a faster but less precise implementation of this filter.
- */
-
-void arm_fir_q31(
-  const arm_fir_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q31_t *px;                                     /* Temporary pointer for state buffer */
-  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
-        q63_t acc0;                                    /* Accumulator */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q63_t acc1, acc2;                              /* Accumulators */
-        q31_t x0, x1, x2;                              /* Temporary variables to hold state values */
-        q31_t c0;                                      /* Temporary variable to hold coefficient value */
-#endif
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 output values simultaneously.
-   * The variables acc0 ... acc3 hold output values that are being computed:
-   *
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-   */
-
-  blkCnt = blockSize / 3;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 3 new input samples into the state buffer. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first 2 samples from the state buffer: x[n-numTaps], x[n-numTaps-1] */
-    x0 = *px++;
-    x1 = *px++;
-
-    /* Loop unrolling: process 3 taps at a time. */
-    tapCnt = numTaps / 3;
-
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-2] sample */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 1U);
-      x0 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x1 * c0);
-      acc1 += ((q63_t) x2 * c0);
-      acc2 += ((q63_t) x0 * c0);
-
-      /* Read the coefficient and state */
-      c0 = *(pb + 2U);
-      x1 = *(px++);
-
-      /* update coefficient pointer */
-      pb += 3U;
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x2 * c0);
-      acc1 += ((q63_t) x0 * c0);
-      acc2 += ((q63_t) x1 * c0);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    tapCnt = numTaps % 0x3U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x2 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q63_t) x0 * c0);
-      acc1 += ((q63_t) x1 * c0);
-      acc2 += ((q63_t) x2 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Advance the state pointer by 3 to process the next group of 3 samples */
-    pState = pState + 3;
-
-    /* The result is in 2.30 format. Convert to 1.31 and store in destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31U);
-    *pDst++ = (q31_t) (acc1 >> 31U);
-    *pDst++ = (q31_t) (acc2 >> 31U);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining output samples */
-  blkCnt = blockSize % 0x3U;
-
-#else
-
-  /* Initialize blkCnt with number of taps */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
-      acc0 += (q63_t) *px++ * *pb++;
-
-      i--;
-    } while (i > 0U);
-
-    /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */
-    *pDst++ = (q31_t) (acc0 >> 31U);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_q31.c
+ * Description:  Q31 FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for Q31 FIR filter.
+  @param[in]     S          points to an instance of the Q31 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by log2(numTaps) bits.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+
+ @remark
+                   Refer to \ref arm_fir_fast_q31() for a faster but less precise implementation of this filter.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+#define FIR_Q31_CORE(nbAcc, nbVecTaps, pSample, vecCoeffs)                 \
+        for (int j = 0; j < nbAcc; j++) {                                  \
+            const q31_t    *pSmp = &pSamples[j];                           \
+            q31x4_t         vecIn0;                                        \
+            q63_t           acc[4];                                        \
+                                                                           \
+            acc[j] = 0;                                                    \
+            for (int i = 0; i < nbVecTaps; i++) {                          \
+                vecIn0 = vld1q(pSmp + 4 * i);                  \
+                acc[j] = vrmlaldavhaq(acc[j], vecIn0, vecCoeffs[i]);       \
+            }                                                              \
+            *pOutput++ = (q31_t)asrl(acc[j], 23);                          \
+        }
+
+
+#define FIR_Q31_CORE_STR_PARTIAL(nbAcc, nbVecTaps, pSample, vecCoeffs)     \
+        for (int j = 0; j < nbAcc; j++) {                                  \
+            const q31_t    *pSmp = &pSamples[j];                           \
+            q31x4_t         vecIn0;                                        \
+                                                                           \
+            acc[j] = 0;                                                    \
+            for (int i = 0; i < nbVecTaps; i++) {                          \
+                vecIn0 = vld1q(pSmp + 4 * i);                  \
+                acc[j] = vrmlaldavhaq(acc[j], vecIn0, vecCoeffs[i]);       \
+            }                                                              \
+            *arm_fir_partial_accu_ptr++ = acc[j];                          \
+        }
+
+
+#define FIR_Q31_CORE_LD_PARTIAL(nbAcc, nbVecTaps, pSample, vecCoeffs)      \
+        for (int j = 0; j < nbAcc; j++) {                                  \
+            const q31_t    *pSmp = &pSamples[j];                           \
+            q31x4_t         vecIn0;                                        \
+                                                                           \
+            acc[j] = *arm_fir_partial_accu_ptr++;                          \
+                                                                           \
+            for (int i = 0; i < nbVecTaps; i++) {                          \
+                vecIn0 = vld1q(pSmp + 4 * i);                  \
+                acc[j] = vrmlaldavhaq(acc[j], vecIn0, vecCoeffs[i]);       \
+            }                                                              \
+            *pOutput++ = (q31_t)asrl(acc[j], 23);                          \
+        }
+
+                      
+#define FIR_Q31_MAIN_CORE()                                                              \
+{                                                                                        \
+    q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4);                          \
+    q31_t      *pState = pRefStatePtr; /* State pointer */                               \
+    const q31_t *pCoeffs = S->pCoeffs;  /* Coefficient pointer */                        \
+    q31_t       *pStateCur;             /* Points to the current sample of the state */  \
+    const q31_t *pSamples;              /* Temporary pointer to the sample buffer */     \
+    q31_t       *pOutput;               /* Temporary pointer to the output buffer */     \
+    const q31_t *pTempSrc;              /* Temporary pointer to the source data */       \
+    q31_t       *pTempDest;             /* Temporary pointer to the destination buffer */\
+    uint32_t     numTaps = S->numTaps;  /* Number of filter coefficients in the filter */\
+    int32_t      blkCnt;                                                                 \
+                                                                                         \
+    /*                                                                                   \
+     * load coefs                                                                        \
+     */                                                                                  \
+    q31x4_t         vecCoeffs[NBVECTAPS];                                                \
+                                                                                         \
+    for (int i = 0; i < NBVECTAPS; i++)                                                  \
+        vecCoeffs[i] = vld1q(pCoeffs + 4 * i);                                           \
+                                                                                         \
+    /*                                                                                   \
+     * pState points to state array which contains previous frame (numTaps - 1) samples  \
+     * pStateCur points to the location where the new input data should be written       \
+     */                                                                                  \
+    pStateCur = &(pState[(numTaps - 1u)]);                                               \
+    pTempSrc = pSrc;                                                                     \
+    pSamples = pState;                                                                   \
+    pOutput = pDst;                                                                      \
+                                                                                         \
+    blkCnt = blockSize >> 2;                                                             \
+    while (blkCnt > 0) {                                                                 \
+        /*                                                                               \
+         * Save 4 input samples in the history buffer                                    \
+         */                                                                              \
+        vstrwq_s32(pStateCur, vldrwq_s32(pTempSrc));                                     \
+        pStateCur += 4;                                                                  \
+        pTempSrc += 4;                                                                   \
+                                                                                         \
+        FIR_Q31_CORE(4, NBVECTAPS, pSamples, vecCoeffs);                                 \
+                                                                                         \
+        pSamples += 4;                                                                   \
+        /*                                                                               \
+         * Decrement the sample block loop counter                                       \
+         */                                                                              \
+        blkCnt--;                                                                        \
+    }                                                                                    \
+                                                                                         \
+    /* tail */                                                                           \
+    int32_t        residual = blockSize & 3;                                             \
+    switch (residual) {                                                                  \
+      case 3:                                                                            \
+          {                                                                              \
+              for (int i = 0; i < residual; i++)                                         \
+                  *pStateCur++ = *pTempSrc++;                                            \
+                                                                                         \
+              FIR_Q31_CORE(3, NBVECTAPS, pSamples, vecCoeffs);                           \
+          }                                                                              \
+          break;                                                                         \
+                                                                                         \
+      case 2:                                                                            \
+          {                                                                              \
+              for (int i = 0; i < residual; i++)                                         \
+                  *pStateCur++ = *pTempSrc++;                                            \
+                                                                                         \
+               FIR_Q31_CORE(2, NBVECTAPS, pSamples, vecCoeffs);                          \
+          }                                                                              \
+          break;                                                                         \
+                                                                                         \
+      case 1:                                                                            \
+          {                                                                              \
+              for (int i = 0; i < residual; i++)                                         \
+                  *pStateCur++ = *pTempSrc++;                                            \
+                                                                                         \
+              FIR_Q31_CORE(1, NBVECTAPS, pSamples, vecCoeffs);                           \
+          }                                                                              \
+          break;                                                                         \
+    }                                                                                    \
+                                                                                         \
+    /*                                                                                   \
+     * Copy the samples back into the history buffer start                               \
+     */                                                                                  \
+    pTempSrc = &pState[blockSize];                                                       \
+    pTempDest = pState;                                                                  \
+                                                                                         \
+    blkCnt =(numTaps - 1) >> 2;                                                          \
+    while (blkCnt > 0)                                                                   \
+    {                                                                                    \
+        vstrwq_s32(pTempDest, vldrwq_s32(pTempSrc));                                     \
+        pTempSrc += 4;                                                                   \
+        pTempDest += 4;                                                                  \
+        blkCnt--;                                                                        \
+    }                                                                                    \
+    blkCnt = (numTaps - 1) & 3;                                                          \
+    if (blkCnt > 0)                                                                      \
+    {                                                                                    \
+        mve_pred16_t p0 = vctp32q(blkCnt);                                               \
+        vstrwq_p_s32(pTempDest, vldrwq_z_s32(pTempSrc, p0), p0);                         \
+    }                                                                                    \
+}
+
+static void arm_fir_q31_1_4_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst, uint32_t blockSize)
+{
+    q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4);
+    q31_t      *pState = pRefStatePtr; /* State pointer */
+    const q31_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q31_t    *pStateCur;        /* Points to the current sample of the state */
+    const q31_t    *pSamples;         /* Temporary pointer to the sample buffer */
+    q31_t    *pOutput;          /* Temporary pointer to the output buffer */
+    const q31_t    *pTempSrc;         /* Temporary pointer to the source data */
+    q31_t    *pTempDest;        /* Temporary pointer to the destination buffer */
+    uint32_t  numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+    uint32_t  blkCnt;
+    q31x4_t vecIn0;
+
+
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur = &(pState[(numTaps - 1u)]);
+    pTempSrc = pSrc;
+    pSamples = pState;
+    pOutput = pDst;
+
+    q63_t     acc0=0, acc1=0, acc2=0, acc3=0;
+    /*
+     * load 4 coefs
+     */
+    q31x4_t vecCoeffs = *(q31x4_t *) pCoeffs;
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        const q31_t    *pSamplesTmp = pSamples;
+
+        /*
+         * Save 4 input samples in the history buffer
+         */
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 4;
+        pTempSrc += 4;
+
+        vecIn0 = vld1q(pSamplesTmp);
+        acc0 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+        vecIn0 = vld1q(&pSamplesTmp[1]);
+        acc1 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+        vecIn0 = vld1q(&pSamplesTmp[2]);
+        acc2 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+        vecIn0 = vld1q(&pSamplesTmp[3]);
+        acc3 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+        acc0 = asrl(acc0, 23);
+        acc1 = asrl(acc1, 23);
+        acc2 = asrl(acc2, 23);
+        acc3 = asrl(acc3, 23);
+
+        *pOutput++ = (q31_t) acc0;
+        *pOutput++ = (q31_t) acc1;
+        *pOutput++ = (q31_t) acc2;
+        *pOutput++ = (q31_t) acc3;
+
+        pSamples += 4;
+        /*
+         * Decrement the sample block loop counter
+         */
+        blkCnt--;
+    }
+
+    uint32_t  residual = blockSize & 3;
+    switch (residual)
+    {
+    case 3:
+        {
+            /*
+             * Save 4 input samples in the history buffer
+             */
+            *(q31x4_t *) pStateCur = *(q31x4_t *) pTempSrc;
+            pStateCur += 4;
+            pTempSrc += 4;
+
+            vecIn0 = vld1q(pSamples);
+            acc0 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamples[1]);
+            acc1 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamples[2]);
+            acc2 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+            acc0 = asrl(acc0, 23);
+            acc1 = asrl(acc1, 23);
+            acc2 = asrl(acc2, 23);
+
+            *pOutput++ = (q31_t) acc0;
+            *pOutput++ = (q31_t) acc1;
+            *pOutput++ = (q31_t) acc2;
+        }
+        break;
+
+    case 2:
+        {
+            /*
+             * Save 4 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 4;
+            pTempSrc += 4;
+
+            vecIn0 = vld1q(pSamples);
+            acc0 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamples[1]);
+            acc1 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+            acc0 = asrl(acc0, 23);
+            acc1 = asrl(acc1, 23);
+
+            *pOutput++ = (q31_t) acc0;
+            *pOutput++ = (q31_t) acc1;
+        }
+        break;
+
+    case 1:
+        {
+            /*
+             * Save 4 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 4;
+            pTempSrc += 4;
+
+            vecIn0 = vld1q(pSamples);
+            acc0 = vrmlaldavhq(vecIn0, vecCoeffs);
+
+            acc0 = asrl(acc0, 23);
+
+            *pOutput++ = (q31_t) acc0;
+        }
+        break;
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = (numTaps-1) >> 2;
+    while (blkCnt > 0U)
+    {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 4;
+        pTempDest += 4;
+        blkCnt--;
+    }
+    blkCnt = (numTaps-1) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_s32(pTempDest, vld1q(pTempSrc), p0);
+    }
+}
+
+
+
+static void arm_fir_q31_5_8_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 8
+    #define NBVECTAPS (NBTAPS / 4)
+    FIR_Q31_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+static void arm_fir_q31_9_12_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 12
+    #define NBVECTAPS (NBTAPS / 4)
+    FIR_Q31_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+static void arm_fir_q31_13_16_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 16
+    #define NBVECTAPS (NBTAPS / 4)
+    FIR_Q31_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+static void arm_fir_q31_17_20_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 20
+    #define NBVECTAPS (NBTAPS / 4)
+    FIR_Q31_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+static void arm_fir_q31_21_24_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 24
+    #define NBVECTAPS (NBTAPS / 4)
+    FIR_Q31_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+static void arm_fir_q31_25_28_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 28
+    #define NBVECTAPS (NBTAPS / 4)
+    FIR_Q31_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+static void arm_fir_q31_29_32_mve(const arm_fir_instance_q31 * S, 
+    const q31_t * __restrict pSrc, 
+    q31_t * __restrict pDst,
+                               uint32_t blockSize)
+{
+    q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4);
+    q31_t      *pState = pRefStatePtr; /* State pointer */
+    const q31_t    *pCoeffs = S->pCoeffs;       /* Coefficient pointer */
+    q31_t          *pStateCur;  /* Points to the current sample of the state */
+    const q31_t    *pSamples;   /* Temporary pointer to the sample buffer */
+    q31_t          *pOutput;    /* Temporary pointer to the output buffer */
+    const q31_t    *pTempSrc;   /* Temporary pointer to the source data */
+    q31_t          *pTempDest;  /* Temporary pointer to the destination buffer */
+    uint32_t        numTaps = S->numTaps;       /* Number of filter coefficients in the filter */
+    int32_t         blkCnt;
+    q63_t           acc0, acc1, acc2, acc3;
+
+#define MAX_VECT_BATCH 7
+
+    /*
+     * pre-load 28 1st coefs
+     */
+    q31x4_t         vecCoeffs0 = vld1q(pCoeffs + 4 * 0);
+    q31x4_t         vecCoeffs1 = vld1q(pCoeffs + 4 * 1);
+    q31x4_t         vecCoeffs2 = vld1q(pCoeffs + 4 * 2);
+    q31x4_t         vecCoeffs3 = vld1q(pCoeffs + 4 * 3);
+    q31x4_t         vecCoeffs4 = vld1q(pCoeffs + 4 * 4);
+    q31x4_t         vecCoeffs5 = vld1q(pCoeffs + 4 * 5);
+    q31x4_t         vecCoeffs6 = vld1q(pCoeffs + 4 * 6);
+
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur = &(pState[(numTaps - 1u)]);
+    pTempSrc = pSrc;
+    pSamples = pState;
+
+    q63_t          *arm_fir_partial_accu_ptr = (q63_t*)S->pState;
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0) {
+        /*
+         * Save 4 input samples in the history buffer
+         */
+        vstrwq_s32(pStateCur, vldrwq_s32(pTempSrc));
+        pStateCur += 4;
+        pTempSrc += 4;
+
+        const q31_t    *pSmp;
+        q31x4_t         vecIn0;
+
+        pSmp = &pSamples[0];
+
+        vecIn0 = vld1q(pSmp);
+        acc0 = vrmlaldavhq(vecIn0, vecCoeffs0);
+        vecIn0 = vld1q(pSmp + 4 * 1);
+        acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs1);
+        vecIn0 = vld1q(pSmp + 4 * 2);
+        acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs2);
+        vecIn0 = vld1q(pSmp + 4 * 3);
+        acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs3);
+        vecIn0 = vld1q(pSmp + 4 * 4);
+        acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs4);
+        vecIn0 = vld1q(pSmp + 4 * 5);
+        acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs5);
+        vecIn0 = vld1q(pSmp + 4 * 6);
+        acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs6);
+
+        *arm_fir_partial_accu_ptr++ = acc0;
+
+        pSmp = &pSamples[1];
+
+        vecIn0 = vld1q(pSmp);
+        acc1 = vrmlaldavhq(vecIn0, vecCoeffs0);
+        vecIn0 = vld1q(pSmp + 4 * 1);
+        acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs1);
+        vecIn0 = vld1q(pSmp + 4 * 2);
+        acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs2);
+        vecIn0 = vld1q(pSmp + 4 * 3);
+        acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs3);
+        vecIn0 = vld1q(pSmp + 4 * 4);
+        acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs4);
+        vecIn0 = vld1q(pSmp + 4 * 5);
+        acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs5);
+        vecIn0 = vld1q(pSmp + 4 * 6);
+        acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs6);
+
+        *arm_fir_partial_accu_ptr++ = acc1;
+
+        pSmp = &pSamples[2];
+
+        vecIn0 = vld1q(pSmp);
+        acc2 = vrmlaldavhq(vecIn0, vecCoeffs0);
+        vecIn0 = vld1q(pSmp + 4 * 1);
+        acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs1);
+        vecIn0 = vld1q(pSmp + 4 * 2);
+        acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs2);
+        vecIn0 = vld1q(pSmp + 4 * 3);
+        acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs3);
+        vecIn0 = vld1q(pSmp + 4 * 4);
+        acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs4);
+        vecIn0 = vld1q(pSmp + 4 * 5);
+        acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs5);
+        vecIn0 = vld1q(pSmp + 4 * 6);
+        acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs6);
+        *arm_fir_partial_accu_ptr++ = acc2;
+
+        pSmp = &pSamples[3];
+
+        vecIn0 = vld1q(pSmp);
+        acc3 = vrmlaldavhq(vecIn0, vecCoeffs0);
+        vecIn0 = vld1q(pSmp + 4 * 1);
+        acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs1);
+        vecIn0 = vld1q(pSmp + 4 * 2);
+        acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs2);
+        vecIn0 = vld1q(pSmp + 4 * 3);
+        acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs3);
+        vecIn0 = vld1q(pSmp + 4 * 4);
+        acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs4);
+        vecIn0 = vld1q(pSmp + 4 * 5);
+        acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs5);
+        vecIn0 = vld1q(pSmp + 4 * 6);
+        acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs6);
+
+        *arm_fir_partial_accu_ptr++ = acc3;
+
+        pSamples += 4;
+        /*
+         * Decrement the sample block loop counter
+         */
+        blkCnt--;
+    }
+
+
+    /* reminder */
+
+    /* load last 4 coef */
+    vecCoeffs0 = vld1q(pCoeffs + 4 * MAX_VECT_BATCH);
+    arm_fir_partial_accu_ptr = (q63_t*)S->pState;
+    pOutput = pDst;
+    pSamples = pState + (MAX_VECT_BATCH * 4);
+
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0) {
+        q31x4_t         vecIn0;
+
+        /* reload intermediate MAC */
+        acc0 = *arm_fir_partial_accu_ptr++;
+        acc1 = *arm_fir_partial_accu_ptr++;
+        acc2 = *arm_fir_partial_accu_ptr++;
+        acc3 = *arm_fir_partial_accu_ptr++;
+
+
+        vecIn0 = vld1q(&pSamples[0]);
+        acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs0);
+
+        vecIn0 = vld1q(&pSamples[1]);
+        acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs0);
+
+        vecIn0 = vld1q(&pSamples[2]);
+        acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs0);
+
+        vecIn0 = vld1q(&pSamples[3]);
+        acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs0);
+
+        *pOutput++ = asrl(acc0, 23);
+        *pOutput++ = asrl(acc1, 23);
+        *pOutput++ = asrl(acc2, 23);
+        *pOutput++ = asrl(acc3, 23);
+
+        pSamples += 4;
+        /*
+         * Decrement the sample block loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = numTaps - 1;
+    do {
+        mve_pred16_t    p = vctp32q(blkCnt);
+
+        vstrwq_p_s32(pTempDest, vldrwq_z_s32(pTempSrc, p), p);
+        pTempSrc += 4;
+        pTempDest += 4;
+        blkCnt -= 4;
+    }
+    while (blkCnt > 0);
+}
+
+
+
+void arm_fir_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    q31_t *pRefStatePtr = S->pState + 2*ROUND_UP(blockSize, 4);
+    q31_t      *pState = pRefStatePtr; /* State pointer */
+    const q31_t    *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q31_t    *pStateCur;        /* Points to the current sample of the state */
+    const q31_t    *pSamples;         /* Temporary pointer to the sample buffer */
+    q31_t    *pOutput;          /* Temporary pointer to the output buffer */
+    const q31_t    *pTempSrc;         /* Temporary pointer to the source data */
+    q31_t    *pTempDest;        /* Temporary pointer to the destination buffer */
+    uint32_t  numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+    uint32_t  blkCnt;
+    q31x4_t vecIn0;
+    uint32_t  tapsBlkCnt = (numTaps + 3) / 4;
+    q63_t     acc0, acc1, acc2, acc3;
+    q31x4_t vecCoeffs;
+
+
+    /*
+     * [1 to 32 taps] specialized routines
+     */
+    if (numTaps <= 4)
+    {
+        arm_fir_q31_1_4_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 8)
+    {
+        arm_fir_q31_5_8_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 12)
+    {
+        arm_fir_q31_9_12_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 16)
+    {
+        arm_fir_q31_13_16_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 20)
+    {
+        arm_fir_q31_17_20_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 24)
+    {
+        arm_fir_q31_21_24_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 28)
+    {
+        arm_fir_q31_25_28_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if ((numTaps <= 32)  && (blockSize >= 32))
+    {
+        arm_fir_q31_29_32_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur   = &(pState[(numTaps - 1u)]);
+    pSamples    = pState;
+    pTempSrc    = pSrc;
+    pOutput     = pDst;
+    blkCnt      = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        const q31_t    *pCoeffsTmp = pCoeffs;
+        const q31_t    *pSamplesTmp = pSamples;
+
+        acc0 = 0LL;
+        acc1 = 0LL;
+        acc2 = 0LL;
+        acc3 = 0LL;
+
+        /*
+         * Save 4 input samples in the history buffer
+         */
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 4;
+        pTempSrc += 4;
+
+        int       i = tapsBlkCnt;
+        while (i > 0)
+        {
+            /*
+             * load 4 coefs
+             */
+            vecCoeffs = *(q31x4_t *) pCoeffsTmp;
+
+            vecIn0 = vld1q(pSamplesTmp);
+            acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[1]);
+            acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[2]);
+            acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[3]);
+            acc3 = vrmlaldavhaq(acc3, vecIn0, vecCoeffs);
+
+            pSamplesTmp += 4;
+            pCoeffsTmp += 4;
+            /*
+             * Decrement the taps block loop counter
+             */
+            i--;
+        }
+
+        /* .54-> .31 conversion and store accumulators */
+        acc0 = asrl(acc0, 23);
+        acc1 = asrl(acc1, 23);
+        acc2 = asrl(acc2, 23);
+        acc3 = asrl(acc3, 23);
+
+        *pOutput++ = (q31_t) acc0;
+        *pOutput++ = (q31_t) acc1;
+        *pOutput++ = (q31_t) acc2;
+        *pOutput++ = (q31_t) acc3;
+
+        pSamples += 4;
+
+        /*
+         * Decrement the sample block loop counter
+         */
+        blkCnt--;
+    }
+
+    int32_t  residual = blockSize & 3;
+    switch (residual)
+    {
+    case 3:
+        {
+            const q31_t    *pCoeffsTmp = pCoeffs;
+            const q31_t    *pSamplesTmp = pSamples;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+            acc2 = 0LL;
+
+            /*
+             * Save 4 input samples in the history buffer
+             */
+            *(q31x4_t *) pStateCur = *(q31x4_t *) pTempSrc;
+            pStateCur += 4;
+            pTempSrc += 4;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                vecCoeffs = *(q31x4_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[1]);
+                acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[2]);
+                acc2 = vrmlaldavhaq(acc2, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 4;
+                pCoeffsTmp += 4;
+                i--;
+            }
+
+            acc0 = asrl(acc0, 23);
+            acc1 = asrl(acc1, 23);
+            acc2 = asrl(acc2, 23);
+
+            *pOutput++ = (q31_t) acc0;
+            *pOutput++ = (q31_t) acc1;
+            *pOutput++ = (q31_t) acc2;
+        }
+        break;
+
+    case 2:
+        {
+            const q31_t    *pCoeffsTmp = pCoeffs;
+            const q31_t    *pSamplesTmp = pSamples;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+
+            /*
+             * Save 4 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 4;
+            pTempSrc += 4;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                vecCoeffs = *(q31x4_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[1]);
+                acc1 = vrmlaldavhaq(acc1, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 4;
+                pCoeffsTmp += 4;
+                i--;
+            }
+
+            acc0 = asrl(acc0, 23);
+            acc1 = asrl(acc1, 23);
+
+            *pOutput++ = (q31_t) acc0;
+            *pOutput++ = (q31_t) acc1;
+        }
+        break;
+
+    case 1:
+        {
+            const q31_t    *pCoeffsTmp = pCoeffs;
+            const q31_t    *pSamplesTmp = pSamples;
+
+            acc0 = 0LL;
+
+            /*
+             * Save 4 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 4;
+            pTempSrc += 4;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                vecCoeffs = *(q31x4_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vrmlaldavhaq(acc0, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 4;
+                pCoeffsTmp += 4;
+                i--;
+            }
+
+            acc0 = asrl(acc0, 23);
+
+            *pOutput++ = (q31_t) acc0;
+        }
+        break;
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = (numTaps - 1U) >> 2;
+    while (blkCnt > 0)
+    {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 4;
+        pTempDest += 4;
+        blkCnt--;
+    }
+    blkCnt = (numTaps - 1U) & 3;
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vstrwq_p_s32(pTempDest, vld1q(pTempSrc), p0);
+    }
+}
+
+#else
+void arm_fir_q31(
+  const arm_fir_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px;                                     /* Temporary pointer for state buffer */
+  const q31_t *pb;                                     /* Temporary pointer for coefficient buffer */
+        q63_t acc0;                                    /* Accumulator */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q63_t acc1, acc2;                              /* Accumulators */
+        q31_t x0, x1, x2;                              /* Temporary variables to hold state values */
+        q31_t c0;                                      /* Temporary variable to hold coefficient value */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+
+  blkCnt = blockSize / 3;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 3 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the first 2 samples from the state buffer: x[n-numTaps], x[n-numTaps-1] */
+    x0 = *px++;
+    x1 = *px++;
+
+    /* Loop unrolling: process 3 taps at a time. */
+    tapCnt = numTaps / 3;
+
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps] coefficient */
+      c0 = *pb;
+
+      /* Read x[n-numTaps-2] sample */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x0 * c0);
+      acc1 += ((q63_t) x1 * c0);
+      acc2 += ((q63_t) x2 * c0);
+
+      /* Read the coefficient and state */
+      c0 = *(pb + 1U);
+      x0 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x1 * c0);
+      acc1 += ((q63_t) x2 * c0);
+      acc2 += ((q63_t) x0 * c0);
+
+      /* Read the coefficient and state */
+      c0 = *(pb + 2U);
+      x1 = *(px++);
+
+      /* update coefficient pointer */
+      pb += 3U;
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x2 * c0);
+      acc1 += ((q63_t) x0 * c0);
+      acc2 += ((q63_t) x1 * c0);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    tapCnt = numTaps % 0x3U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x2 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q63_t) x0 * c0);
+      acc1 += ((q63_t) x1 * c0);
+      acc2 += ((q63_t) x2 * c0);
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Advance the state pointer by 3 to process the next group of 3 samples */
+    pState = pState + 3;
+
+    /* The result is in 2.30 format. Convert to 1.31 and store in destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31U);
+    *pDst++ = (q31_t) (acc1 >> 31U);
+    *pDst++ = (q31_t) (acc2 >> 31U);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x3U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    do
+    {
+      /* acc =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0] */
+      acc0 += (q63_t) *px++ * *pb++;
+
+      i--;
+    } while (i > 0U);
+
+    /* Result is in 2.62 format. Convert to 1.31 and store in destination buffer. */
+    *pDst++ = (q31_t) (acc0 >> 31U);
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
old mode 100644
new mode 100755
index 7c9f5bf2..c05fa321
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_q7.c
@@ -1,323 +1,714 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_q7.c
- * Description:  Q7 FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR
-  @{
- */
-
-/**
-  @brief         Processing function for Q7 FIR filter.
-  @param[in]     S          points to an instance of the Q7 FIR filter structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
-                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   The accumulator is converted to 18.7 format by discarding the low 7 bits.
-                   Finally, the result is truncated to 1.7 format.
- */
-
-void arm_fir_q7(
-  const arm_fir_instance_q7 * S,
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        q7_t *pState = S->pState;                      /* State pointer */
-  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-        q7_t *pStateCurnt;                             /* Points to the current sample of the state */
-        q7_t *px;                                      /* Temporary pointer for state buffer */
-  const q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
-        q31_t acc0;                                    /* Accumulators */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t acc1, acc2, acc3;                        /* Accumulators */
-        q7_t x0, x1, x2, x3, c0;                       /* Temporary variables to hold state */
-#endif
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 output values simultaneously.
-   * The variables acc0 ... acc3 hold output values that are being computed:
-   *
-   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
-   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
-   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
-   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
-   */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy 4 new input samples into the state buffer. */
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set all accumulators to zero */
-    acc0 = 0;
-    acc1 = 0;
-    acc2 = 0;
-    acc3 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the first 3 samples from the state buffer:
-     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
-    x0 = *px++;
-    x1 = *px++;
-    x2 = *px++;
-
-    /* Loop unrolling. Process 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Loop over the number of taps.  Unroll by a factor of 4.
-       Repeat until we've computed numTaps-4 coefficients. */
-    while (tapCnt > 0U)
-    {
-      /* Read the b[numTaps] coefficient */
-      c0 = *pb;
-
-      /* Read x[n-numTaps-3] sample */
-      x3 = *px;
-
-      /* acc0 +=  b[numTaps] * x[n-numTaps] */
-      acc0 += ((q15_t) x0 * c0);
-
-      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
-      acc1 += ((q15_t) x1 * c0);
-
-      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
-      acc2 += ((q15_t) x2 * c0);
-
-      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Read the b[numTaps-1] coefficient */
-      c0 = *(pb + 1U);
-
-      /* Read x[n-numTaps-4] sample */
-      x0 = *(px + 1U);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x1 * c0);
-      acc1 += ((q15_t) x2 * c0);
-      acc2 += ((q15_t) x3 * c0);
-      acc3 += ((q15_t) x0 * c0);
-
-      /* Read the b[numTaps-2] coefficient */
-      c0 = *(pb + 2U);
-
-      /* Read x[n-numTaps-5] sample */
-      x1 = *(px + 2U);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x2 * c0);
-      acc1 += ((q15_t) x3 * c0);
-      acc2 += ((q15_t) x0 * c0);
-      acc3 += ((q15_t) x1 * c0);
-
-      /* Read the b[numTaps-3] coefficients */
-      c0 = *(pb + 3U);
-
-      /* Read x[n-numTaps-6] sample */
-      x2 = *(px + 3U);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x3 * c0);
-      acc1 += ((q15_t) x0 * c0);
-      acc2 += ((q15_t) x1 * c0);
-      acc3 += ((q15_t) x2 * c0);
-
-      /* update coefficient pointer */
-      pb += 4U;
-      px += 4U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read coefficients */
-      c0 = *(pb++);
-
-      /* Fetch 1 state variable */
-      x3 = *(px++);
-
-      /* Perform the multiply-accumulates */
-      acc0 += ((q15_t) x0 * c0);
-      acc1 += ((q15_t) x1 * c0);
-      acc2 += ((q15_t) x2 * c0);
-      acc3 += ((q15_t) x3 * c0);
-
-      /* Reuse the present sample states for next sample */
-      x0 = x1;
-      x1 = x2;
-      x2 = x3;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31
-       Then store the 4 outputs in the destination buffer. */
-    acc0 = __SSAT((acc0 >> 7U), 8);
-    *pDst++ = acc0;
-    acc1 = __SSAT((acc1 >> 7U), 8);
-    *pDst++ = acc1;
-    acc2 = __SSAT((acc2 >> 7U), 8);
-    *pDst++ = acc2;
-    acc3 = __SSAT((acc3 >> 7U), 8);
-    *pDst++ = acc3;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining output samples */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of taps */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Copy one sample at a time into state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Set the accumulator to zero */
-    acc0 = 0;
-
-    /* Initialize state pointer */
-    px = pState;
-
-    /* Initialize Coefficient pointer */
-    pb = pCoeffs;
-
-    i = numTaps;
-
-    /* Perform the multiply-accumulates */
-    do
-    {
-      acc0 += (q15_t) * (px++) * (*(pb++));
-      i--;
-    } while (i > 0U);
-
-    /* The result is in 2.14 format. Convert to 1.7
-       Then store the output in the destination buffer. */
-    *pDst++ = __SSAT((acc0 >> 7U), 8);
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the state buffer */
-  pStateCurnt = S->pState;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of taps */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  /* Copy remaining data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_q7.c
+ * Description:  Q7 FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR
+  @{
+ */
+
+/**
+  @brief         Processing function for Q7 FIR filter.
+  @param[in]     S          points to an instance of the Q7 FIR filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is converted to 18.7 format by discarding the low 7 bits.
+                   Finally, the result is truncated to 1.7 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define FIR_Q7_CORE(pOutput, nbAcc, nbVecTaps, pSample, vecCoeffs)         \
+        for (int j = 0; j < nbAcc; j++) {                                  \
+            const q7_t     *pSmp = &pSample[j];                            \
+            q31_t           acc[4];                                        \
+                                                                           \
+            acc[j] = 0;                                                    \
+            for (int i = 0; i < nbVecTaps; i++) {                          \
+                vecIn0 = vld1q(pSmp + 16 * i);                   \
+                acc[j] = vmladavaq(acc[j], vecIn0, vecCoeffs[i]);          \
+            }                                                              \
+            *pOutput++ = (q7_t) __SSAT((acc[j] >> 7U), 8);                 \
+        }
+
+#define FIR_Q7_MAIN_CORE()                                                                  \
+{                                                                                           \
+     q7_t          *pState = S->pState;     /* State pointer */                             \
+    const q7_t    *pCoeffs = S->pCoeffs;   /* Coefficient pointer */                        \
+    q7_t          *pStateCur;              /* Points to the current sample of the state */  \
+    const q7_t    *pSamples;               /* Temporary pointer to the sample buffer */     \
+    q7_t          *pOutput;                /* Temporary pointer to the output buffer */     \
+    const q7_t    *pTempSrc;               /* Temporary pointer to the source data */       \
+    q7_t          *pTempDest;              /* Temporary pointer to the destination buffer */\
+    uint32_t       numTaps = S->numTaps;   /* Number of filter coefficients in the filter */\
+    int32_t        blkCnt;                                                                  \
+    q7x16_t        vecIn0;                                                                  \
+                                                                                            \
+    /*                                                                                      \
+     * load coefs                                                                           \
+     */                                                                                     \
+    q7x16_t         vecCoeffs[NBVECTAPS];                                                   \
+                                                                                            \
+    for (int i = 0; i < NBVECTAPS; i++)                                                     \
+        vecCoeffs[i] = vldrbq_s8(pCoeffs + 16 * i);                               \
+                                                                                            \
+    /*                                                                                      \
+     * pState points to state array which contains previous frame (numTaps - 1) samples     \
+     * pStateCur points to the location where the new input data should be written          \
+     */                                                                                     \
+    pStateCur = &(pState[(numTaps - 1u)]);                                                  \
+    pTempSrc = pSrc;                                                                        \
+    pSamples = pState;                                                                      \
+    pOutput = pDst;                                                                         \
+                                                                                            \
+    blkCnt = blockSize >> 2;                                                                \
+    while (blkCnt > 0) {                                                                   \
+        /*                                                                                  \
+         * Save 4 input samples in the history buffer                                       \
+         */                                                                                 \
+        vstrbq_s32(pStateCur, vldrbq_s32(pTempSrc));                                        \
+        pStateCur += 4;                                                                     \
+        pTempSrc += 4;                                                                      \
+                                                                                            \
+        FIR_Q7_CORE(pOutput, 4, NBVECTAPS, pSamples, vecCoeffs);                            \
+        pSamples += 4;                                                                      \
+                                                                                            \
+        blkCnt--;                                                                           \
+    }                                                                                       \
+                                                                                            \
+    /* tail */                                                                              \
+    int32_t        residual = blockSize & 3;                                               \
+                                                                                            \
+    for (int i = 0; i < residual; i++)                                                      \
+        *pStateCur++ = *pTempSrc++;                                                         \
+                                                                                            \
+    FIR_Q7_CORE(pOutput, residual, NBVECTAPS, pSamples, vecCoeffs);                         \
+                                                                                            \
+                                                                                            \
+    /*                                                                                      \
+     * Copy the samples back into the history buffer start                                  \
+     */                                                                                     \
+    pTempSrc = &pState[blockSize];                                                          \
+    pTempDest = pState;                                                                     \
+    blkCnt = numTaps - 1;                                                                   \
+    do {                                                                                    \
+        mve_pred16_t    p = vctp8q(blkCnt);                                                 \
+                                                                                            \
+        vstrbq_p_s8(pTempDest, vldrbq_z_s8(pTempSrc, p), p);                                \
+        pTempSrc += 16;                                                           \
+        pTempDest += 16;                                                          \
+        blkCnt -= 16;                                                             \
+    }                                                                                       \
+    while (blkCnt > 0);                                                                     \
+}
+
+
+static void arm_fir_q7_49_64_mve(const arm_fir_instance_q7 * S,
+  const q7_t * __restrict pSrc,
+  q7_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 64
+    #define NBVECTAPS (NBTAPS / 16)
+    FIR_Q7_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+void arm_fir_q7_33_48_mve(const arm_fir_instance_q7 * S,
+  const q7_t * __restrict pSrc,
+  q7_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 48
+    #define NBVECTAPS (NBTAPS / 16)
+    FIR_Q7_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+static void arm_fir_q7_17_32_mve(const arm_fir_instance_q7 * S,
+  const q7_t * __restrict pSrc,
+  q7_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 32
+    #define NBVECTAPS (NBTAPS / 16)
+    FIR_Q7_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+
+void arm_fir_q7_1_16_mve(const arm_fir_instance_q7 * S,
+  const q7_t * __restrict pSrc,
+  q7_t * __restrict pDst, uint32_t blockSize)
+{
+    #define NBTAPS 16
+    #define NBVECTAPS (NBTAPS / 16)
+    FIR_Q7_MAIN_CORE();
+    #undef NBVECTAPS
+    #undef NBTAPS
+}
+
+void arm_fir_q7(
+  const arm_fir_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+    q7_t     *pState = S->pState;   /* State pointer */
+    const q7_t     *pCoeffs = S->pCoeffs; /* Coefficient pointer */
+    q7_t     *pStateCur;        /* Points to the current sample of the state */
+    const q7_t     *pSamples;         /* Temporary pointer to the sample buffer */
+    q7_t     *pOutput;          /* Temporary pointer to the output buffer */
+    const q7_t     *pTempSrc;         /* Temporary pointer to the source data */
+    q7_t     *pTempDest;        /* Temporary pointer to the destination buffer */
+    uint32_t  numTaps = S->numTaps; /* Number of filter coefficients in the filter */
+    uint32_t  blkCnt;
+    q7x16_t  vecIn0;
+    uint32_t  tapsBlkCnt = (numTaps + 15) / 16;
+    q31_t     acc0, acc1, acc2, acc3;
+    q7x16_t  vecCoeffs;
+
+    if (numTaps <= 16)
+    {
+        /*
+         * [1 to 16 taps] specialized routine
+         */
+        arm_fir_q7_1_16_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 32)
+    {
+        /*
+         * [17 to 32 taps] specialized routine
+         */
+        arm_fir_q7_17_32_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 48)
+    {
+        /*
+         * [33 to 48 taps] specialized routine
+         */
+        arm_fir_q7_33_48_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+    else if (numTaps <= 64)
+    {
+        /*
+         * [49 to 64 taps] specialized routine
+         */
+        arm_fir_q7_49_64_mve(S, pSrc, pDst, blockSize);
+        return;
+    }
+
+    /*
+     * pState points to state array which contains previous frame (numTaps - 1) samples
+     * pStateCur points to the location where the new input data should be written
+     */
+    pStateCur   = &(pState[(numTaps - 1u)]);
+    pSamples    = pState;
+    pTempSrc    = pSrc;
+    pOutput     = pDst;
+    blkCnt      = blockSize >> 2;
+
+    /*
+     * outer samples loop
+     */
+    while (blkCnt > 0U)
+    {
+        const q7_t     *pCoeffsTmp = pCoeffs;
+        const q7_t     *pSamplesTmp = pSamples;
+
+        acc0 = 0;
+        acc1 = 0;
+        acc2 = 0;
+        acc3 = 0;
+        /*
+         * Save 16 input samples in the history buffer
+         */
+        vst1q(pStateCur, vld1q(pTempSrc));
+        pStateCur += 16;
+        pTempSrc += 16;
+
+        /*
+         * inner coefficients loop
+         */
+        int       i = tapsBlkCnt;
+        while (i > 0)
+        {
+            /*
+             * load 16 coefs
+             */
+            vecCoeffs = *(q7x16_t *) pCoeffsTmp;
+
+            vecIn0 = vld1q(pSamplesTmp);
+            acc0 = vmladavaq(acc0, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[1]);
+            acc1 = vmladavaq(acc1, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[2]);
+            acc2 = vmladavaq(acc2, vecIn0, vecCoeffs);
+
+            vecIn0 = vld1q(&pSamplesTmp[3]);
+            acc3 = vmladavaq(acc3, vecIn0, vecCoeffs);
+
+            pSamplesTmp += 16;
+            pCoeffsTmp += 16;
+            /*
+             * Decrement the taps block loop counter
+             */
+            i--;
+        }
+        /*
+         * Store the 1.7 format filter output in destination buffer
+         */
+        *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8);
+        *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8);
+        *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8);
+        *pOutput++ = (q7_t) __SSAT((acc3 >> 7U), 8);
+
+        pSamples += 4;
+        /*
+         * Decrement the sample block loop counter
+         */
+        blkCnt--;
+    }
+
+    uint32_t  residual = blockSize & 3;
+    switch (residual)
+    {
+    case 3:
+        {
+            const q7_t     *pCoeffsTmp = pCoeffs;
+            const q7_t     *pSamplesTmp = pSamples;
+
+            acc0 = 0;
+            acc1 = 0;
+            acc2 = 0;
+            /*
+             * Save 16 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 16;
+            pTempSrc += 16;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                vecCoeffs = *(q7x16_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vmladavaq(acc0, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[4]);
+                acc1 = vmladavaq(acc1, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[8]);
+                acc2 = vmladavaq(acc2, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 16;
+                pCoeffsTmp += 16;
+                i--;
+            }
+
+            *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8);
+            *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8);
+            *pOutput++ = (q7_t) __SSAT((acc2 >> 7U), 8);
+        }
+        break;
+
+    case 2:
+        {
+            const q7_t     *pCoeffsTmp = pCoeffs;
+            const q7_t     *pSamplesTmp = pSamples;
+
+            acc0 = 0;
+            acc1 = 0;
+            /*
+             * Save 16 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 16;
+            pTempSrc += 16;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                vecCoeffs = *(q7x16_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vmladavaq(acc0, vecIn0, vecCoeffs);
+
+                vecIn0 = vld1q(&pSamplesTmp[4]);
+                acc1 = vmladavaq(acc1, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 16;
+                pCoeffsTmp += 16;
+                i--;
+            }
+
+            *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8);
+            *pOutput++ = (q7_t) __SSAT((acc1 >> 7U), 8);
+        }
+        break;
+
+    case 1:
+        {
+            const q7_t     *pCoeffsTmp = pCoeffs;
+            const q7_t     *pSamplesTmp = pSamples;
+
+            acc0 = 0;
+            /*
+             * Save 16 input samples in the history buffer
+             */
+            vst1q(pStateCur, vld1q(pTempSrc));
+            pStateCur += 16;
+            pTempSrc += 16;
+
+            int       i = tapsBlkCnt;
+            while (i > 0)
+            {
+                vecCoeffs = *(q7x16_t *) pCoeffsTmp;
+
+                vecIn0 = vld1q(pSamplesTmp);
+                acc0 = vmladavaq(acc0, vecIn0, vecCoeffs);
+
+                pSamplesTmp += 16;
+                pCoeffsTmp += 16;
+                i--;
+            }
+            *pOutput++ = (q7_t) __SSAT((acc0 >> 7U), 8);
+        }
+        break;
+    }
+
+    /*
+     * Copy the samples back into the history buffer start
+     */
+    pTempSrc = &pState[blockSize];
+    pTempDest = pState;
+
+    blkCnt = numTaps >> 4;
+    while (blkCnt > 0U)
+    {
+        vst1q(pTempDest, vld1q(pTempSrc));
+        pTempSrc += 16;
+        pTempDest += 16;
+        blkCnt--;
+    }
+    blkCnt = numTaps & 0xF;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp8q(blkCnt);
+        vstrbq_p_s8(pTempDest, vld1q(pTempSrc), p0);
+    }
+}
+#else
+void arm_fir_q7(
+  const arm_fir_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        q7_t *pState = S->pState;                      /* State pointer */
+  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
+        q7_t *pStateCurnt;                             /* Points to the current sample of the state */
+        q7_t *px;                                      /* Temporary pointer for state buffer */
+  const q7_t *pb;                                      /* Temporary pointer for coefficient buffer */
+        q31_t acc0;                                    /* Accumulators */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t i, tapCnt, blkCnt;                    /* Loop counters */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t acc1, acc2, acc3;                        /* Accumulators */
+        q7_t x0, x1, x2, x3, c0;                       /* Temporary variables to hold state */
+#endif
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 output values simultaneously.
+   * The variables acc0 ... acc3 hold output values that are being computed:
+   *
+   *    acc0 =  b[numTaps-1] * x[n-numTaps-1] + b[numTaps-2] * x[n-numTaps-2] + b[numTaps-3] * x[n-numTaps-3] +...+ b[0] * x[0]
+   *    acc1 =  b[numTaps-1] * x[n-numTaps]   + b[numTaps-2] * x[n-numTaps-1] + b[numTaps-3] * x[n-numTaps-2] +...+ b[0] * x[1]
+   *    acc2 =  b[numTaps-1] * x[n-numTaps+1] + b[numTaps-2] * x[n-numTaps]   + b[numTaps-3] * x[n-numTaps-1] +...+ b[0] * x[2]
+   *    acc3 =  b[numTaps-1] * x[n-numTaps+2] + b[numTaps-2] * x[n-numTaps+1] + b[numTaps-3] * x[n-numTaps]   +...+ b[0] * x[3]
+   */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy 4 new input samples into the state buffer. */
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set all accumulators to zero */
+    acc0 = 0;
+    acc1 = 0;
+    acc2 = 0;
+    acc3 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the first 3 samples from the state buffer:
+     *  x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2] */
+    x0 = *px++;
+    x1 = *px++;
+    x2 = *px++;
+
+    /* Loop unrolling. Process 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Loop over the number of taps.  Unroll by a factor of 4.
+       Repeat until we've computed numTaps-4 coefficients. */
+    while (tapCnt > 0U)
+    {
+      /* Read the b[numTaps] coefficient */
+      c0 = *pb;
+
+      /* Read x[n-numTaps-3] sample */
+      x3 = *px;
+
+      /* acc0 +=  b[numTaps] * x[n-numTaps] */
+      acc0 += ((q15_t) x0 * c0);
+
+      /* acc1 +=  b[numTaps] * x[n-numTaps-1] */
+      acc1 += ((q15_t) x1 * c0);
+
+      /* acc2 +=  b[numTaps] * x[n-numTaps-2] */
+      acc2 += ((q15_t) x2 * c0);
+
+      /* acc3 +=  b[numTaps] * x[n-numTaps-3] */
+      acc3 += ((q15_t) x3 * c0);
+
+      /* Read the b[numTaps-1] coefficient */
+      c0 = *(pb + 1U);
+
+      /* Read x[n-numTaps-4] sample */
+      x0 = *(px + 1U);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x1 * c0);
+      acc1 += ((q15_t) x2 * c0);
+      acc2 += ((q15_t) x3 * c0);
+      acc3 += ((q15_t) x0 * c0);
+
+      /* Read the b[numTaps-2] coefficient */
+      c0 = *(pb + 2U);
+
+      /* Read x[n-numTaps-5] sample */
+      x1 = *(px + 2U);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x2 * c0);
+      acc1 += ((q15_t) x3 * c0);
+      acc2 += ((q15_t) x0 * c0);
+      acc3 += ((q15_t) x1 * c0);
+
+      /* Read the b[numTaps-3] coefficients */
+      c0 = *(pb + 3U);
+
+      /* Read x[n-numTaps-6] sample */
+      x2 = *(px + 3U);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x3 * c0);
+      acc1 += ((q15_t) x0 * c0);
+      acc2 += ((q15_t) x1 * c0);
+      acc3 += ((q15_t) x2 * c0);
+
+      /* update coefficient pointer */
+      pb += 4U;
+      px += 4U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read coefficients */
+      c0 = *(pb++);
+
+      /* Fetch 1 state variable */
+      x3 = *(px++);
+
+      /* Perform the multiply-accumulates */
+      acc0 += ((q15_t) x0 * c0);
+      acc1 += ((q15_t) x1 * c0);
+      acc2 += ((q15_t) x2 * c0);
+      acc3 += ((q15_t) x3 * c0);
+
+      /* Reuse the present sample states for next sample */
+      x0 = x1;
+      x1 = x2;
+      x2 = x3;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* The results in the 4 accumulators are in 2.62 format. Convert to 1.31
+       Then store the 4 outputs in the destination buffer. */
+    acc0 = __SSAT((acc0 >> 7U), 8);
+    *pDst++ = acc0;
+    acc1 = __SSAT((acc1 >> 7U), 8);
+    *pDst++ = acc1;
+    acc2 = __SSAT((acc2 >> 7U), 8);
+    *pDst++ = acc2;
+    acc3 = __SSAT((acc3 >> 7U), 8);
+    *pDst++ = acc3;
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining output samples */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of taps */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Copy one sample at a time into state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Set the accumulator to zero */
+    acc0 = 0;
+
+    /* Initialize state pointer */
+    px = pState;
+
+    /* Initialize Coefficient pointer */
+    pb = pCoeffs;
+
+    i = numTaps;
+
+    /* Perform the multiply-accumulates */
+    while (i > 0U)
+    {
+      acc0 += (q15_t) * (px++) * (*(pb++));
+      i--;
+    }
+
+    /* The result is in 2.14 format. Convert to 1.7
+       Then store the output in the destination buffer. */
+    *pDst++ = __SSAT((acc0 >> 7U), 8);
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the state buffer */
+  pStateCurnt = S->pState;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of taps */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  /* Copy remaining data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of FIR group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
index d31ba4ce..e6f4d78c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_f32.c
@@ -1,341 +1,341 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_f32.c
- * Description:  Floating-point sparse FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
-
-  This group of functions implements sparse FIR filters.
-  Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
-  Sparse filters are used for simulating reflections in communications and audio applications.
-
-  There are separate functions for Q7, Q15, Q31, and floating-point data types.
-  The functions operate on blocks  of input and output data and each call to the function processes
-  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
-  <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.
-
-  @par           Algorithm
-                   The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients.
-                   This is in addition to the coefficient array <code>b</code>.
-                   The implementation essentially skips the multiplications by zero and leads to an efficient realization.
-  <pre>
-      y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
-  </pre>
-  @par
-                   \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"
-  @par
-                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>;
-                   <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>;
-                   <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where
-                   <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array.
-                   Some of the processing functions also require temporary working buffers.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
-                   There are separate instance structure declarations for each of the 4 supported data types.
-
-  @par           Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Set the values in the state buffer to zeros before static initialization.
-                   The code below statically initializes each of the 4 different data type filter instance structures
-  <pre>
-      arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-      arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-      arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-      arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
-  </pre>
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
-                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-                   Refer to the function specific documentation below for usage guidelines.
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point sparse FIR filter.
-  @param[in]     S           points to an instance of the floating-point sparse FIR structure
-  @param[in]     pSrc        points to the block of input data
-  @param[out]    pDst        points to the block of output data
-  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
-  @param[in]     blockSize   number of input samples to process
-  @return        none
- */
-
-void arm_fir_sparse_f32(
-        arm_fir_sparse_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        float32_t * pScratchIn,
-        uint32_t blockSize)
-{
-        float32_t *pState = S->pState;                 /* State pointer */
-  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *px;                                 /* Scratch buffer pointer */
-        float32_t *py = pState;                        /* Temporary pointers for state buffer */
-        float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
-        float32_t *pOut;                               /* Destination pointer */
-        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-        int32_t readIndex;                             /* Read index of the state buffer */
-        uint32_t tapCnt, blkCnt;                       /* loop counters */
-        float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, (int32_t *) pSrc, 1, blockSize);
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pOut = pDst;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    *pOut++ = *px++ * coeff;
-
-    *pOut++ = *px++ * coeff;
-
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplication and store in destination buffer */
-    *pOut++ = *px++ * coeff;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time. */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      *pOut++ += *px++ * coeff;
-
-      *pOut++ += *px++ * coeff;
-
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      *pOut++ += *px++ * coeff;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement tap loop counter */
-    tapCnt--;
-  }
-
-  /* Compute last tap without the final read of pTapDelay */
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pOut = pDst;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    *pOut++ += *px++ * coeff;
-    *pOut++ += *px++ * coeff;
-    *pOut++ += *px++ * coeff;
-    *pOut++ += *px++ * coeff;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    *pOut++ += *px++ * coeff;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_f32.c
+ * Description:  Floating-point sparse FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup FIR_Sparse Finite Impulse Response (FIR) Sparse Filters
+
+  This group of functions implements sparse FIR filters.
+  Sparse FIR filters are equivalent to standard FIR filters except that most of the coefficients are equal to zero.
+  Sparse filters are used for simulating reflections in communications and audio applications.
+
+  There are separate functions for Q7, Q15, Q31, and floating-point data types.
+  The functions operate on blocks  of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> points to input and output arrays respectively containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   The sparse filter instant structure contains an array of tap indices <code>pTapDelay</code> which specifies the locations of the non-zero coefficients.
+                   This is in addition to the coefficient array <code>b</code>.
+                   The implementation essentially skips the multiplications by zero and leads to an efficient realization.
+  <pre>
+      y[n] = b[0] * x[n-pTapDelay[0]] + b[1] * x[n-pTapDelay[1]] + b[2] * x[n-pTapDelay[2]] + ...+ b[numTaps-1] * x[n-pTapDelay[numTaps-1]]
+  </pre>
+  @par
+                   \image html FIRSparse.gif "Sparse FIR filter.  b[n] represents the filter coefficients"
+  @par
+                   <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>;
+                   <code>pTapDelay</code> points to an array of nonzero indices and is also of size <code>numTaps</code>;
+                   <code>pState</code> points to a state array of size <code>maxDelay + blockSize</code>, where
+                   <code>maxDelay</code> is the largest offset value that is ever used in the <code>pTapDelay</code> array.
+                   Some of the processing functions also require temporary working buffers.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient and offset arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 4 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, pTapDelay, maxDelay, stateIndex, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros before static initialization.
+                   The code below statically initializes each of the 4 different data type filter instance structures
+  <pre>
+      arm_fir_sparse_instance_f32 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q31 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q15 S = {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+      arm_fir_sparse_instance_q7 S =  {numTaps, 0, pState, pCoeffs, maxDelay, pTapDelay};
+  </pre>
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the sparse FIR filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point sparse FIR filter.
+  @param[in]     S           points to an instance of the floating-point sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+ */
+
+void arm_fir_sparse_f32(
+        arm_fir_sparse_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        float32_t * pScratchIn,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+  const float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *px;                                 /* Scratch buffer pointer */
+        float32_t *py = pState;                        /* Temporary pointers for state buffer */
+        float32_t *pb = pScratchIn;                    /* Temporary pointers for scratch buffer */
+        float32_t *pOut;                               /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        float32_t coeff = *pCoeffs++;                  /* Read the first coefficient value */
+
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1, (int32_t *) pSrc, 1, blockSize);
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplications and store in destination buffer */
+    *pOut++ = *px++ * coeff;
+
+    *pOut++ = *px++ * coeff;
+
+    *pOut++ = *px++ * coeff;
+
+    *pOut++ = *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in destination buffer */
+    *pOut++ = *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pOut++ += *px++ * coeff;
+
+      *pOut++ += *px++ * coeff;
+
+      *pOut++ += *px++ * coeff;
+
+      *pOut++ += *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pOut++ += *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement tap loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+    *pOut++ += *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pOut++ += *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
index 978ca465..dce0d6f7 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_f32.c
@@ -1,93 +1,93 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_init_f32.c
- * Description:  Floating-point sparse FIR filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point sparse FIR filter.
-  @param[in,out] S          points to an instance of the floating-point sparse FIR structure
-  @param[in]     numTaps    number of nonzero coefficients in the filter
-  @param[in]     pCoeffs    points to the array of filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     pTapDelay  points to the array of offset times
-  @param[in]     maxDelay   maximum offset time supported
-  @param[in]     blockSize  number of samples that will be processed per block
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
-                   <code>pState</code> holds the filter's state variables and must be of length
-                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
-                   is the maximum number of delay line values.
-                   <code>blockSize</code> is the 
-                   number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
- */
-
-void arm_fir_sparse_init_f32(
-        arm_fir_sparse_instance_f32 * S,
-        uint16_t numTaps,
-  const float32_t * pCoeffs,
-        float32_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0U;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_f32.c
+ * Description:  Floating-point sparse FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point sparse FIR filter.
+  @param[in,out] S          points to an instance of the floating-point sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the 
+                   number of samples processed by the <code>arm_fir_sparse_f32()</code> function.
+ */
+
+void arm_fir_sparse_init_f32(
+        arm_fir_sparse_instance_f32 * S,
+        uint16_t numTaps,
+  const float32_t * pCoeffs,
+        float32_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
index 5f6ab549..6a48743e 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q15.c
@@ -1,93 +1,93 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_init_q15.c
- * Description:  Q15 sparse FIR filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 sparse FIR filter.
-  @param[in,out] S          points to an instance of the Q15 sparse FIR structure
-  @param[in]     numTaps    number of nonzero coefficients in the filter
-  @param[in]     pCoeffs    points to the array of filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     pTapDelay  points to the array of offset times
-  @param[in]     maxDelay   maximum offset time supported
-  @param[in]     blockSize  number of samples that will be processed per block
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
-                   <code>pState</code> holds the filter's state variables and must be of length
-                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
-                   is the maximum number of delay line values.
-                   <code>blockSize</code> is the
-                   number of words processed by <code>arm_fir_sparse_q15()</code> function.
- */
-
-void arm_fir_sparse_init_q15(
-        arm_fir_sparse_instance_q15 * S,
-        uint16_t numTaps,
-  const q15_t * pCoeffs,
-        q15_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0U;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_q15.c
+ * Description:  Q15 sparse FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q15 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the
+                   number of words processed by <code>arm_fir_sparse_q15()</code> function.
+ */
+
+void arm_fir_sparse_init_q15(
+        arm_fir_sparse_instance_q15 * S,
+        uint16_t numTaps,
+  const q15_t * pCoeffs,
+        q15_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
index ec9232c6..a333f1cc 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q31.c
@@ -1,92 +1,92 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_init_q31.c
- * Description:  Q31 sparse FIR filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 sparse FIR filter.
-  @param[in,out] S          points to an instance of the Q31 sparse FIR structure
-  @param[in]     numTaps    number of nonzero coefficients in the filter
-  @param[in]     pCoeffs    points to the array of filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     pTapDelay  points to the array of offset times
-  @param[in]     maxDelay   maximum offset time supported
-  @param[in]     blockSize  number of samples that will be processed per block
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
-                   <code>pState</code> holds the filter's state variables and must be of length
-                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
-                   is the maximum number of delay line values.
-                   <code>blockSize</code> is the number of words processed by <code>arm_fir_sparse_q31()</code> function.
- */
-
-void arm_fir_sparse_init_q31(
-        arm_fir_sparse_instance_q31 * S,
-        uint16_t numTaps,
-  const q31_t * pCoeffs,
-        q31_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0U;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_q31.c
+ * Description:  Q31 sparse FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q31 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the number of words processed by <code>arm_fir_sparse_q31()</code> function.
+ */
+
+void arm_fir_sparse_init_q31(
+        arm_fir_sparse_instance_q31 * S,
+        uint16_t numTaps,
+  const q31_t * pCoeffs,
+        q31_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
index f72ea255..3e2b9c9a 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_init_q7.c
@@ -1,93 +1,93 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_init_q7.c
- * Description:  Q7 sparse FIR filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q7 sparse FIR filter.
-  @param[in,out] S          points to an instance of the Q7 sparse FIR structure
-  @param[in]     numTaps    number of nonzero coefficients in the filter
-  @param[in]     pCoeffs    points to the array of filter coefficients
-  @param[in]     pState     points to the state buffer
-  @param[in]     pTapDelay  points to the array of offset times
-  @param[in]     maxDelay   maximum offset time supported
-  @param[in]     blockSize  number of samples that will be processed per block
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
-                   <code>pState</code> holds the filter's state variables and must be of length
-                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
-                   is the maximum number of delay line values.
-                   <code>blockSize</code> is the
-                   number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
- */
-
-void arm_fir_sparse_init_q7(
-        arm_fir_sparse_instance_q7 * S,
-        uint16_t numTaps,
-  const q7_t * pCoeffs,
-        q7_t * pState,
-        int32_t * pTapDelay,
-        uint16_t maxDelay,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Assign TapDelay pointer */
-  S->pTapDelay = pTapDelay;
-
-  /* Assign MaxDelay */
-  S->maxDelay = maxDelay;
-
-  /* reset the stateIndex to 0 */
-  S->stateIndex = 0U;
-
-  /* Clear state buffer and size is always maxDelay + blockSize */
-  memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_init_q7.c
+ * Description:  Q7 sparse FIR filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q7 sparse FIR filter.
+  @param[in,out] S          points to an instance of the Q7 sparse FIR structure
+  @param[in]     numTaps    number of nonzero coefficients in the filter
+  @param[in]     pCoeffs    points to the array of filter coefficients
+  @param[in]     pState     points to the state buffer
+  @param[in]     pTapDelay  points to the array of offset times
+  @param[in]     maxDelay   maximum offset time supported
+  @param[in]     blockSize  number of samples that will be processed per block
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> holds the filter coefficients and has length <code>numTaps</code>.
+                   <code>pState</code> holds the filter's state variables and must be of length
+                   <code>maxDelay + blockSize</code>, where <code>maxDelay</code>
+                   is the maximum number of delay line values.
+                   <code>blockSize</code> is the
+                   number of samples processed by the <code>arm_fir_sparse_q7()</code> function.
+ */
+
+void arm_fir_sparse_init_q7(
+        arm_fir_sparse_instance_q7 * S,
+        uint16_t numTaps,
+  const q7_t * pCoeffs,
+        q7_t * pState,
+        int32_t * pTapDelay,
+        uint16_t maxDelay,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Assign TapDelay pointer */
+  S->pTapDelay = pTapDelay;
+
+  /* Assign MaxDelay */
+  S->maxDelay = maxDelay;
+
+  /* reset the stateIndex to 0 */
+  S->stateIndex = 0U;
+
+  /* Clear state buffer and size is always maxDelay + blockSize */
+  memset(pState, 0, (maxDelay + blockSize) * sizeof(q7_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
index 99002b8b..60669225 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q15.c
@@ -1,341 +1,341 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_q15.c
- * Description:  Q15 sparse FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 sparse FIR filter.
-  @param[in]     S           points to an instance of the Q15 sparse FIR structure
-  @param[in]     pSrc        points to the block of input data
-  @param[out]    pDst        points to the block of output data
-  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
-  @param[in]     pScratchOut points to a temporary buffer of size blockSize
-  @param[in]     blockSize   number of input samples to process per call
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 32-bit accumulator.
-                   The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
-                   Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
-                   If the accumulator result overflows it will wrap around rather than saturate.
-                   After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
-                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
- */
-
-void arm_fir_sparse_q15(
-        arm_fir_sparse_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        q15_t * pScratchIn,
-        q31_t * pScratchOut,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *px;                                     /* Temporary pointers for scratch buffer */
-        q15_t *py = pState;                            /* Temporary pointers for state buffer */
-        q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-        q15_t *pOut = pDst;                            /* Working pointer for output */
-        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-        int32_t readIndex;                             /* Read index of the state buffer */
-        uint32_t tapCnt, blkCnt;                       /* loop counters */
-        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
-        q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t in1, in2;                                /* Temporary variables */
-#endif
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q15(py, (int32_t) delaySize, &S->stateIndex, 1,pSrc, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
-                       pb, pb, (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
-                         pb, pb, (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time. */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) *px++ * coeff;
-      *pScratchOut++ += (q31_t) *px++ * coeff;
-      *pScratchOut++ += (q31_t) *px++ * coeff;
-      *pScratchOut++ += (q31_t) *px++ * coeff;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      *pScratchOut++ += (q31_t) *px++ * coeff;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Compute last tap without the final read of pTapDelay */
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
-                       pb, pb, (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    *pScratchOut++ += (q31_t) *px++ * coeff;
-    *pScratchOut++ += (q31_t) *px++ * coeff;
-    *pScratchOut++ += (q31_t) *px++ * coeff;
-    *pScratchOut++ += (q31_t) *px++ * coeff;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    *pScratchOut++ += (q31_t) *px++ * coeff;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* All the output values are in pScratchOut buffer.
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    in1 = *pScr2++;
-    in2 = *pScr2++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
-#else
-    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    in1 = *pScr2++;
-    in2 = *pScr2++;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
-#else
-    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_q15.c
+ * Description:  Q15 sparse FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q15 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     pScratchOut points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process per call
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 32-bit accumulator.
+                   The 1.15 x 1.15 multiplications yield a 2.30 result and these are added to a 2.30 accumulator.
+                   Thus the full precision of the multiplications is maintained but there is only a single guard bit in the accumulator.
+                   If the accumulator result overflows it will wrap around rather than saturate.
+                   After all multiply-accumulates are performed, the 2.30 accumulator is truncated to 2.15 format and then saturated to 1.15 format.
+                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ */
+
+void arm_fir_sparse_q15(
+        arm_fir_sparse_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        q15_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+  const q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *px;                                     /* Temporary pointers for scratch buffer */
+        q15_t *py = pState;                            /* Temporary pointers for state buffer */
+        q15_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q15_t *pOut = pDst;                            /* Working pointer for output */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
+        q15_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in1, in2;                                /* Temporary variables */
+#endif
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_q15(py, (int32_t) delaySize, &S->stateIndex, 1,pSrc, 1, blockSize);
+
+  /* Loop over the number of taps. */
+  tapCnt = numTaps;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                       pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                         pb, pb, (int32_t) blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      *pScratchOut++ += (q31_t) *px++ * coeff;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q15(py, (int32_t) delaySize, &readIndex, 1,
+                       pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    *pScratchOut++ += (q31_t) *px++ * coeff;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* All the output values are in pScratchOut buffer.
+     Convert them into 1.15 format, saturate and store in the destination buffer. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in1 = *pScr2++;
+    in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    in1 = *pScr2++;
+    in2 = *pScr2++;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in1 >> 15, 16), (q15_t) __SSAT(in2 >> 15, 16), 16));
+#else
+    write_q15x2_ia (&pOut, __PKHBT((q15_t) __SSAT(in2 >> 15, 16), (q15_t) __SSAT(in1 >> 15, 16), 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    *pOut++ = (q15_t) __SSAT(*pScr2++ >> 15, 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
index 7c924316..33c66df4 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q31.c
@@ -1,357 +1,357 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_q31.c
- * Description:  Q31 sparse FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 sparse FIR filter.
-  @param[in]     S           points to an instance of the Q31 sparse FIR structure
-  @param[in]     pSrc        points to the block of input data
-  @param[out]    pDst        points to the block of output data
-  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
-  @param[in]     blockSize   number of input samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 32-bit accumulator.
-                   The 1.31 x 1.31 multiplications are truncated to 2.30 format.
-                   This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
-                   If the accumulator result overflows, it wraps around rather than saturate.
-                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
- */
-
-void arm_fir_sparse_q31(
-        arm_fir_sparse_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        q31_t * pScratchIn,
-        uint32_t blockSize)
-{
-        q31_t *pState = S->pState;                     /* State pointer */
-  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *px;                                     /* Scratch buffer pointer */
-        q31_t *py = pState;                            /* Temporary pointers for state buffer */
-        q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
-        q31_t *pOut;                                   /* Destination pointer */
-        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-        int32_t readIndex;                             /* Read index of the state buffer */
-        uint32_t tapCnt, blkCnt;                       /* loop counters */
-        q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
-        q31_t in;
-        q63_t out;                                     /* Temporary output variable */
-
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
-                        (int32_t *) pSrc, 1, blockSize);
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pOut = pDst;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplications and store in destination buffer */
-    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
-
-    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
-
-    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
-
-    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplication and store in destination buffer */
-    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pOut = pDst;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time. */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) *px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) *px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) *px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      out = *pOut;
-      out += ((q63_t) *px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      out = *pOut;
-      out += ((q63_t) *px++ * coeff) >> 32;
-      *pOut++ = (q31_t) (out);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement tap loop counter */
-    tapCnt--;
-  }
-
-  /* Compute last tap without the final read of pTapDelay */
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
-                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pOut = pDst;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    out = *pOut;
-    out += ((q63_t) * px++ * coeff) >> 32;
-    *pOut++ = (q31_t) (out);
-
-    out = *pOut;
-    out += ((q63_t) * px++ * coeff) >> 32;
-    *pOut++ = (q31_t) (out);
-
-    out = *pOut;
-    out += ((q63_t) * px++ * coeff) >> 32;
-    *pOut++ = (q31_t) (out);
-
-    out = *pOut;
-    out += ((q63_t) * px++ * coeff) >> 32;
-    *pOut++ = (q31_t) (out);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    out = *pOut;
-    out += ((q63_t) *px++ * coeff) >> 32;
-    *pOut++ = (q31_t) (out);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Working output pointer is updated */
-  pOut = pDst;
-
-  /* Output is converted into 1.31 format. */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    in = *pOut << 1;
-    *pOut++ = in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_q31.c
+ * Description:  Q31 sparse FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q31 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 32-bit accumulator.
+                   The 1.31 x 1.31 multiplications are truncated to 2.30 format.
+                   This leads to loss of precision on the intermediate multiplications and provides only a single guard bit.
+                   If the accumulator result overflows, it wraps around rather than saturate.
+                   In order to avoid overflows the input signal or coefficients must be scaled down by log2(numTaps) bits.
+ */
+
+void arm_fir_sparse_q31(
+        arm_fir_sparse_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        q31_t * pScratchIn,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+  const q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *px;                                     /* Scratch buffer pointer */
+        q31_t *py = pState;                            /* Temporary pointers for state buffer */
+        q31_t *pb = pScratchIn;                        /* Temporary pointers for scratch buffer */
+        q31_t *pOut;                                   /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t coeff = *pCoeffs++;                      /* Read the first coefficient value */
+        q31_t in;
+        q63_t out;                                     /* Temporary output variable */
+
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_f32((int32_t *) py, delaySize, &S->stateIndex, 1,
+                        (int32_t *) pSrc, 1, blockSize);
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplications and store in destination buffer */
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in destination buffer */
+    *pOut++ = (q31_t) (((q63_t) *px++ * coeff) >> 32);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                         (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      out = *pOut;
+      out += ((q63_t) *px++ * coeff) >> 32;
+      *pOut++ = (q31_t) (out);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement tap loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_f32((int32_t *) py, delaySize, &readIndex, 1,
+                       (int32_t *) pb, (int32_t *) pb, blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pOut = pDst;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    out = *pOut;
+    out += ((q63_t) * px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    out = *pOut;
+    out += ((q63_t) *px++ * coeff) >> 32;
+    *pOut++ = (q31_t) (out);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Working output pointer is updated */
+  pOut = pDst;
+
+  /* Output is converted into 1.31 format. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+    in = *pOut << 1;
+    *pOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    in = *pOut << 1;
+    *pOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
index 9e3de091..e47d889c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_fir_sparse_q7.c
@@ -1,341 +1,341 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fir_sparse_q7.c
- * Description:  Q7 sparse FIR filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup FIR_Sparse
-  @{
- */
-
-/**
-  @brief         Processing function for the Q7 sparse FIR filter.
-  @param[in]     S           points to an instance of the Q7 sparse FIR structure
-  @param[in]     pSrc        points to the block of input data
-  @param[out]    pDst        points to the block of output data
-  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
-  @param[in]     pScratchOut points to a temporary buffer of size blockSize
-  @param[in]     blockSize   number of input samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
-                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   The accumulator is then converted to 18.7 format by discarding the low 7 bits.
-                   Finally, the result is truncated to 1.7 format.
- */
-
-void arm_fir_sparse_q7(
-        arm_fir_sparse_instance_q7 * S,
-  const q7_t * pSrc,
-        q7_t * pDst,
-        q7_t * pScratchIn,
-        q31_t * pScratchOut,
-        uint32_t blockSize)
-{
-        q7_t *pState = S->pState;                      /* State pointer */
-  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
-        q7_t *px;                                      /* Scratch buffer pointer */
-        q7_t *py = pState;                             /* Temporary pointers for state buffer */
-        q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
-        q7_t *pOut = pDst;                             /* Destination pointer */
-        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
-        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
-        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
-        int32_t readIndex;                             /* Read index of the state buffer */
-        uint32_t tapCnt, blkCnt;                       /* loop counters */
-        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
-        q31_t in;
-        q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q7_t in1, in2, in3, in4;
-#endif
-
-  /* BlockSize of Input samples are copied into the state buffer */
-  /* StateIndex points to the starting position to write in the state buffer */
-  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, blockSize);
-
-  /* Loop over the number of taps. */
-  tapCnt = numTaps;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
-                   pb, pb, (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiplication and store in the scratch buffer */
-    *pScratchOut++ = ((q31_t) *px++ * coeff);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Load the coefficient value and
-   * increment the coefficient buffer for the next set of state values */
-  coeff = *pCoeffs++;
-
-  /* Read Index, from where the state buffer should be read, is calculated. */
-  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-  /* Wraparound of readIndex */
-  if (readIndex < 0)
-  {
-    readIndex += (int32_t) delaySize;
-  }
-
-  /* Loop over the number of taps. */
-  tapCnt = (uint32_t) numTaps - 2U;
-
-  while (tapCnt > 0U)
-  {
-    /* Working pointer for state buffer is updated */
-    py = pState;
-
-    /* blockSize samples are read from the state buffer */
-    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
-                        pb, pb, (int32_t) blockSize, 1, blockSize);
-
-    /* Working pointer for the scratch buffer of state values */
-    px = pb;
-
-    /* Working pointer for scratch buffer of output values */
-    pScratchOut = pScr2;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time. */
-    blkCnt = blockSize >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-      in = *pScratchOut + ((q31_t) * px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = blockSize % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* Perform Multiply-Accumulate */
-      in = *pScratchOut + ((q31_t) *px++ * coeff);
-      *pScratchOut++ = in;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Load the coefficient value and
-     * increment the coefficient buffer for the next set of state values */
-    coeff = *pCoeffs++;
-
-    /* Read Index, from where the state buffer should be read, is calculated. */
-    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
-
-    /* Wraparound of readIndex */
-    if (readIndex < 0)
-    {
-      readIndex += (int32_t) delaySize;
-    }
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Compute last tap without the final read of pTapDelay */
-
-  /* Working pointer for state buffer is updated */
-  py = pState;
-
-  /* blockSize samples are read from the state buffer */
-  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
-                      pb, pb, (int32_t) blockSize, 1, blockSize);
-
-  /* Working pointer for the scratch buffer of state values */
-  px = pb;
-
-  /* Working pointer for scratch buffer of output values */
-  pScratchOut = pScr2;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    in = *pScratchOut + ((q31_t) *px++ * coeff);
-    *pScratchOut++ = in;
-    in = *pScratchOut + ((q31_t) *px++ * coeff);
-    *pScratchOut++ = in;
-    in = *pScratchOut + ((q31_t) *px++ * coeff);
-    *pScratchOut++ = in;
-    in = *pScratchOut + ((q31_t) *px++ * coeff);
-    *pScratchOut++ = in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Perform Multiply-Accumulate */
-    in = *pScratchOut + ((q31_t) *px++ * coeff);
-    *pScratchOut++ = in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* All the output values are in pScratchOut buffer.
-     Convert them into 1.15 format, saturate and store in the destination buffer. */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time. */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-    in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    write_q7x4_ia (&pOut, __PACKq7(in1, in2, in3, in4));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of FIR_Sparse group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fir_sparse_q7.c
+ * Description:  Q7 sparse FIR filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup FIR_Sparse
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q7 sparse FIR filter.
+  @param[in]     S           points to an instance of the Q7 sparse FIR structure
+  @param[in]     pSrc        points to the block of input data
+  @param[out]    pDst        points to the block of output data
+  @param[in]     pScratchIn  points to a temporary buffer of size blockSize
+  @param[in]     pScratchOut points to a temporary buffer of size blockSize
+  @param[in]     blockSize   number of input samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.7 format and multiplications yield a 2.14 result.
+                   The 2.14 intermediate results are accumulated in a 32-bit accumulator in 18.14 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   The accumulator is then converted to 18.7 format by discarding the low 7 bits.
+                   Finally, the result is truncated to 1.7 format.
+ */
+
+void arm_fir_sparse_q7(
+        arm_fir_sparse_instance_q7 * S,
+  const q7_t * pSrc,
+        q7_t * pDst,
+        q7_t * pScratchIn,
+        q31_t * pScratchOut,
+        uint32_t blockSize)
+{
+        q7_t *pState = S->pState;                      /* State pointer */
+  const q7_t *pCoeffs = S->pCoeffs;                    /* Coefficient pointer */
+        q7_t *px;                                      /* Scratch buffer pointer */
+        q7_t *py = pState;                             /* Temporary pointers for state buffer */
+        q7_t *pb = pScratchIn;                         /* Temporary pointers for scratch buffer */
+        q7_t *pOut = pDst;                             /* Destination pointer */
+        int32_t *pTapDelay = S->pTapDelay;             /* Pointer to the array containing offset of the non-zero tap values. */
+        uint32_t delaySize = S->maxDelay + blockSize;  /* state length */
+        uint16_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter  */
+        int32_t readIndex;                             /* Read index of the state buffer */
+        uint32_t tapCnt, blkCnt;                       /* loop counters */
+        q31_t *pScr2 = pScratchOut;                    /* Working pointer for scratch buffer of output values */
+        q31_t in;
+        q7_t coeff = *pCoeffs++;                       /* Read the coefficient value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q7_t in1, in2, in3, in4;
+#endif
+
+  /* BlockSize of Input samples are copied into the state buffer */
+  /* StateIndex points to the starting position to write in the state buffer */
+  arm_circularWrite_q7(py, (int32_t) delaySize, &S->stateIndex, 1, pSrc, 1, blockSize);
+
+  /* Loop over the number of taps. */
+  tapCnt = numTaps;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                   pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiplication and store in the scratch buffer */
+    *pScratchOut++ = ((q31_t) *px++ * coeff);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Load the coefficient value and
+   * increment the coefficient buffer for the next set of state values */
+  coeff = *pCoeffs++;
+
+  /* Read Index, from where the state buffer should be read, is calculated. */
+  readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+  /* Wraparound of readIndex */
+  if (readIndex < 0)
+  {
+    readIndex += (int32_t) delaySize;
+  }
+
+  /* Loop over the number of taps. */
+  tapCnt = (uint32_t) numTaps - 2U;
+
+  while (tapCnt > 0U)
+  {
+    /* Working pointer for state buffer is updated */
+    py = pState;
+
+    /* blockSize samples are read from the state buffer */
+    arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                        pb, pb, (int32_t) blockSize, 1, blockSize);
+
+    /* Working pointer for the scratch buffer of state values */
+    px = pb;
+
+    /* Working pointer for scratch buffer of output values */
+    pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time. */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+      in = *pScratchOut + ((q31_t) * px++ * coeff);
+      *pScratchOut++ = in;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = blockSize % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* Perform Multiply-Accumulate */
+      in = *pScratchOut + ((q31_t) *px++ * coeff);
+      *pScratchOut++ = in;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Load the coefficient value and
+     * increment the coefficient buffer for the next set of state values */
+    coeff = *pCoeffs++;
+
+    /* Read Index, from where the state buffer should be read, is calculated. */
+    readIndex = (int32_t) (S->stateIndex - blockSize) - *pTapDelay++;
+
+    /* Wraparound of readIndex */
+    if (readIndex < 0)
+    {
+      readIndex += (int32_t) delaySize;
+    }
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Compute last tap without the final read of pTapDelay */
+
+  /* Working pointer for state buffer is updated */
+  py = pState;
+
+  /* blockSize samples are read from the state buffer */
+  arm_circularRead_q7(py, (int32_t) delaySize, &readIndex, 1,
+                      pb, pb, (int32_t) blockSize, 1, blockSize);
+
+  /* Working pointer for the scratch buffer of state values */
+  px = pb;
+
+  /* Working pointer for scratch buffer of output values */
+  pScratchOut = pScr2;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Perform Multiply-Accumulate */
+    in = *pScratchOut + ((q31_t) *px++ * coeff);
+    *pScratchOut++ = in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* All the output values are in pScratchOut buffer.
+     Convert them into 1.15 format, saturate and store in the destination buffer. */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time. */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    in1 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+    in2 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+    in3 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+    in4 = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+
+    write_q7x4_ia (&pOut, __PACKq7(in1, in2, in3, in4));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    *pOut++ = (q7_t) __SSAT(*pScr2++ >> 7, 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+
+/**
+  @} end of FIR_Sparse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
index cc8bff68..bf0b178c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_f32.c
@@ -1,354 +1,354 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_iir_lattice_f32.c
- * Description:  Floating-point IIR Lattice filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
-
-  This set of functions implements lattice filters
-  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
-  variety of adaptive filter applications. The filter structure has feedforward and
-  feedback components and the net impulse response is infinite length.
-  The functions operate on blocks
-  of input and output data and each call to the function processes
-  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
-  <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
-
-  @par           Algorithm
-                   \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
-  @par
-  <pre>
-      fN(n)   = x(n)
-      fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1
-      gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
-      y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
-  </pre>
-  @par
-                   <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
-                   Reflection Coefficients are stored in time-reversed order.
-  @par
-  <pre>
-     {kN, kN-1, ..., k1}
-  </pre>
-  @par
-                  <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
-                  Ladder coefficients are stored in time-reversed order.
-  <pre>
-      {vN, vN-1, ..., v0}
-  </pre>
-  @par
-                   <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
-                   The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
-                   The state variables are updated after each block of data is processed; the coefficients are untouched.
-
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter.
-                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-
-  @par           Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
-  <pre>
-      arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
-      arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
-      arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
-  </pre>
-  @par
-                   where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
-                   <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
-                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-                   Refer to the function specific documentation below for usage guidelines.
- */
-
-/**
-  @addtogroup IIR_Lattice
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point IIR lattice filter.
-  @param[in]     S          points to an instance of the floating-point IIR lattice structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-
-void arm_iir_lattice_f32(
-  const arm_iir_lattice_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{       
-        float32_t *pState = S->pState;                   /* State pointer */
-        float32_t *pStateCur;                            /* State current pointer */
-        float32_t acc;                                   /* Accumlator */
-        float32_t fnext1, fnext2, gcurr1, gnext;         /* Temporary variables for lattice stages */
-        float32_t *px1, *px2, *pk, *pv;                  /* Temporary pointers for state and coef */
-        uint32_t numStages = S->numStages;               /* Number of stages */
-        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        float32_t gcurr2;                                /* Temporary variables for lattice stages */
-        float32_t k1, k2;
-        float32_t v1, v2, v3, v4;
-#endif
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  /* Sample processing */
-  while (blkCnt > 0U)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fnext2 = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0.0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = (numStages) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Read gN-1(n-1) from state buffer */
-      gcurr1 = *px1;
-
-      /* read reflection coefficient kN */
-      k1 = *pk;
-
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* read ladder coefficient vN */
-      v1 = *pv;
-
-      /* read next reflection coefficient kN-1 */
-      k2 = *(pk + 1U);
-
-      /* Read gN-2(n-1) from state buffer */
-      gcurr2 = *(px1 + 1U);
-
-      /* read next ladder coefficient vN-1 */
-      v2 = *(pv + 1U);
-
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN(n)   = kN * fN-1(n) + gN-1(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read reflection coefficient kN-2 */
-      k1 = *(pk + 2U);
-
-      /* write gN(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Read gN-3(n-1) from state buffer */
-      gcurr1 = *(px1 + 2U);
-
-      /* y(n) += gN(n) * vN  */
-      acc += (gnext * v1);
-
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fnext1 = fnext2 - (k1 * gcurr1);
-
-      /* gN-1(n)   = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = gcurr2 + (k2 * fnext2);
-
-      /* Read gN-4(n-1) from state buffer */
-      gcurr2 = *(px1 + 3U);
-
-      /* y(n) += gN-1(n) * vN-1  */
-      acc += (gnext * v2);
-
-      /* read reflection coefficient kN-3 */
-      k2 = *(pk + 3U);
-
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext2 = fnext1 - (k2 * gcurr2);
-
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = gcurr1 + (k1 * fnext1);
-
-      /* read ladder coefficient vN-2 */
-      v3 = *(pv + 2U);
-
-      /* y(n) += gN-2(n) * vN-2  */
-      acc += (gnext * v3);
-
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointer */
-      pk += 4U;
-
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = (fnext2 * k2) + gcurr2;
-
-      /* read next ladder coefficient vN-3 */
-      v4 = *(pv + 3U);
-
-      /* y(n) += gN-4(n) * vN-4  */
-      acc += (gnext * v4);
-
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* update pointers */
-      px1 += 4U;
-      pv += 4U;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numStages % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numStages;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      gcurr1 = *px1++;
-      /* Process sample for last taps */
-      fnext1 = fnext2 - ((*pk) * gcurr1);
-      gnext = (fnext1 * (*pk++)) + gcurr1;
-      /* Output samples for last taps */
-      acc += (gnext * (*pv++));
-      *px2++ = gnext;
-      fnext2 = fnext1;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (fnext2 * (*pv));
-
-    *px2++ = fnext2;
-
-    /* write out into pDst */
-    *pDst++ = acc;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCur = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  /* Copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = numStages >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = numStages % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  tapCnt = numStages;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of IIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_f32.c
+ * Description:  Floating-point IIR Lattice filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup IIR_Lattice Infinite Impulse Response (IIR) Lattice Filters
+
+  This set of functions implements lattice filters
+  for Q15, Q31 and floating-point data types.  Lattice filters are used in a
+  variety of adaptive filter applications. The filter structure has feedforward and
+  feedback components and the net impulse response is infinite length.
+  The functions operate on blocks
+  of input and output data and each call to the function processes
+  <code>blockSize</code> samples through the filter.  <code>pSrc</code> and
+  <code>pDst</code> point to input and output arrays containing <code>blockSize</code> values.
+
+  @par           Algorithm
+                   \image html IIRLattice.gif "Infinite Impulse Response Lattice filter"
+  @par
+  <pre>
+      fN(n)   = x(n)
+      fm-1(n) = fm(n) - km * gm-1(n-1)   for m = N, N-1, ..., 1
+      gm(n)   = km * fm-1(n) + gm-1(n-1) for m = N, N-1, ..., 1
+      y(n)    = vN * gN(n) + vN-1 * gN-1(n) + ...+ v0 * g0(n)
+  </pre>
+  @par
+                   <code>pkCoeffs</code> points to array of reflection coefficients of size <code>numStages</code>.
+                   Reflection Coefficients are stored in time-reversed order.
+  @par
+  <pre>
+     {kN, kN-1, ..., k1}
+  </pre>
+  @par
+                  <code>pvCoeffs</code> points to the array of ladder coefficients of size <code>(numStages+1)</code>.
+                  Ladder coefficients are stored in time-reversed order.
+  <pre>
+      {vN, vN-1, ..., v0}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numStages + blockSize</code>.
+                   The state variables shown in the figure above (the g values) are stored in the <code>pState</code> array.
+                   The state variables are updated after each block of data is processed; the coefficients are untouched.
+
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter.
+                   Coefficient arrays may be shared among several instances while state variable arrays cannot be shared.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numStages, pkCoeffs, pvCoeffs, pState. Also set all of the values in pState to zero.
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Set the values in the state buffer to zeros and then manually initialize the instance structure as follows:
+  <pre>
+      arm_iir_lattice_instance_f32 S = {numStages, pState, pkCoeffs, pvCoeffs};
+      arm_iir_lattice_instance_q31 S = {numStages, pState, pkCoeffs, pvCoeffs};
+      arm_iir_lattice_instance_q15 S = {numStages, pState, pkCoeffs, pvCoeffs};
+  </pre>
+  @par
+                   where <code>numStages</code> is the number of stages in the filter; <code>pState</code> points to the state buffer array;
+                   <code>pkCoeffs</code> points to array of the reflection coefficients; <code>pvCoeffs</code> points to the array of ladder coefficients.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the IIR lattice filter functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point IIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_f32(
+  const arm_iir_lattice_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{       
+        float32_t *pState = S->pState;                   /* State pointer */
+        float32_t *pStateCur;                            /* State current pointer */
+        float32_t acc;                                   /* Accumlator */
+        float32_t fnext1, fnext2, gcurr1, gnext;         /* Temporary variables for lattice stages */
+        float32_t *px1, *px2, *pk, *pv;                  /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;               /* Number of stages */
+        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        float32_t gcurr2;                                /* Temporary variables for lattice stages */
+        float32_t k1, k2;
+        float32_t v1, v2, v3, v4;
+#endif
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fnext2 = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0.0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Read gN-1(n-1) from state buffer */
+      gcurr1 = *px1;
+
+      /* read reflection coefficient kN */
+      k1 = *pk;
+
+      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+      fnext1 = fnext2 - (k1 * gcurr1);
+
+      /* read ladder coefficient vN */
+      v1 = *pv;
+
+      /* read next reflection coefficient kN-1 */
+      k2 = *(pk + 1U);
+
+      /* Read gN-2(n-1) from state buffer */
+      gcurr2 = *(px1 + 1U);
+
+      /* read next ladder coefficient vN-1 */
+      v2 = *(pv + 1U);
+
+      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
+      fnext2 = fnext1 - (k2 * gcurr2);
+
+      /* gN(n)   = kN * fN-1(n) + gN-1(n-1) */
+      gnext = gcurr1 + (k1 * fnext1);
+
+      /* read reflection coefficient kN-2 */
+      k1 = *(pk + 2U);
+
+      /* write gN(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Read gN-3(n-1) from state buffer */
+      gcurr1 = *(px1 + 2U);
+
+      /* y(n) += gN(n) * vN  */
+      acc += (gnext * v1);
+
+      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
+      fnext1 = fnext2 - (k1 * gcurr1);
+
+      /* gN-1(n)   = kN-1 * fN-2(n) + gN-2(n-1) */
+      gnext = gcurr2 + (k2 * fnext2);
+
+      /* Read gN-4(n-1) from state buffer */
+      gcurr2 = *(px1 + 3U);
+
+      /* y(n) += gN-1(n) * vN-1  */
+      acc += (gnext * v2);
+
+      /* read reflection coefficient kN-3 */
+      k2 = *(pk + 3U);
+
+      /* write gN-1(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
+      fnext2 = fnext1 - (k2 * gcurr2);
+
+      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
+      gnext = gcurr1 + (k1 * fnext1);
+
+      /* read ladder coefficient vN-2 */
+      v3 = *(pv + 2U);
+
+      /* y(n) += gN-2(n) * vN-2  */
+      acc += (gnext * v3);
+
+      /* write gN-2(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* update pointer */
+      pk += 4U;
+
+      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
+      gnext = (fnext2 * k2) + gcurr2;
+
+      /* read next ladder coefficient vN-3 */
+      v4 = *(pv + 3U);
+
+      /* y(n) += gN-4(n) * vN-4  */
+      acc += (gnext * v4);
+
+      /* write gN-3(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* update pointers */
+      px1 += 4U;
+      pv += 4U;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numStages % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numStages;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      gcurr1 = *px1++;
+      /* Process sample for last taps */
+      fnext1 = fnext2 - ((*pk) * gcurr1);
+      gnext = (fnext1 * (*pk++)) + gcurr1;
+      /* Output samples for last taps */
+      acc += (gnext * (*pv++));
+      *px2++ = gnext;
+      fnext2 = fnext1;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += (fnext2 * (*pv));
+
+    *px2++ = fnext2;
+
+    /* write out into pDst */
+    *pDst++ = acc;
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = numStages >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  tapCnt = numStages;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
index 459ed92d..389e1ea8 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_f32.c
@@ -1,77 +1,77 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_iir_lattice_init_f32.c
- * Description:  Floating-point IIR lattice filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup IIR_Lattice
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point IIR lattice filter.
-  @param[in]     S          points to an instance of the floating-point IIR lattice structure
-  @param[in]     numStages  number of stages in the filter
-  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
-  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
-  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-
-void arm_iir_lattice_init_f32(
-  arm_iir_lattice_instance_f32 * S,
-  uint16_t numStages,
-  float32_t * pkCoeffs,
-  float32_t * pvCoeffs,
-  float32_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of IIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_init_f32.c
+ * Description:  Floating-point IIR lattice filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point IIR lattice filter.
+  @param[in]     S          points to an instance of the floating-point IIR lattice structure
+  @param[in]     numStages  number of stages in the filter
+  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_init_f32(
+  arm_iir_lattice_instance_f32 * S,
+  uint16_t numStages,
+  float32_t * pkCoeffs,
+  float32_t * pvCoeffs,
+  float32_t * pState,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign reflection coefficient pointer */
+  S->pkCoeffs = pkCoeffs;
+
+  /* Assign ladder coefficient pointer */
+  S->pvCoeffs = pvCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numStages */
+  memset(pState, 0, (numStages + blockSize) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
index 1e16932e..873c342a 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q15.c
@@ -1,77 +1,77 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_iir_lattice_init_q15.c
- * Description:  Q15 IIR lattice filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup IIR_Lattice
-  @{
- */
-
-/**
-  @brief     Initialization function for the Q15 IIR lattice filter.
-  @param[in] S          points to an instance of the Q15 IIR lattice structure
-  @param[in] numStages  number of stages in the filter
-  @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
-  @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
-  @param[in] pState     points to state buffer.  The array is of length numStages+blockSize
-  @param[in] blockSize  number of samples to process
-  @return        none
- */
-
-void arm_iir_lattice_init_q15(
-  arm_iir_lattice_instance_q15 * S,
-  uint16_t numStages,
-  q15_t * pkCoeffs,
-  q15_t * pvCoeffs,
-  q15_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of IIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_init_q15.c
+ * Description:  Q15 IIR lattice filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief     Initialization function for the Q15 IIR lattice filter.
+  @param[in] S          points to an instance of the Q15 IIR lattice structure
+  @param[in] numStages  number of stages in the filter
+  @param[in] pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in] pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in] pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in] blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_init_q15(
+  arm_iir_lattice_instance_q15 * S,
+  uint16_t numStages,
+  q15_t * pkCoeffs,
+  q15_t * pvCoeffs,
+  q15_t * pState,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign reflection coefficient pointer */
+  S->pkCoeffs = pkCoeffs;
+
+  /* Assign ladder coefficient pointer */
+  S->pvCoeffs = pvCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numStages */
+  memset(pState, 0, (numStages + blockSize) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
index a1efae0f..59b26d3c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_init_q31.c
@@ -1,77 +1,77 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_iir_lattice_init_q31.c
- * Description:  Initialization function for the Q31 IIR lattice filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup IIR_Lattice
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 IIR lattice filter.
-  @param[in]     S          points to an instance of the Q31 IIR lattice structure
-  @param[in]     numStages  number of stages in the filter
-  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
-  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
-  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-
-void arm_iir_lattice_init_q31(
-  arm_iir_lattice_instance_q31 * S,
-  uint16_t numStages,
-  q31_t * pkCoeffs,
-  q31_t * pvCoeffs,
-  q31_t * pState,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numStages = numStages;
-
-  /* Assign reflection coefficient pointer */
-  S->pkCoeffs = pkCoeffs;
-
-  /* Assign ladder coefficient pointer */
-  S->pvCoeffs = pvCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numStages */
-  memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-}
-
-/**
-  @} end of IIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_init_q31.c
+ * Description:  Initialization function for the Q31 IIR lattice filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 IIR lattice structure
+  @param[in]     numStages  number of stages in the filter
+  @param[in]     pkCoeffs   points to reflection coefficient buffer.  The array is of length numStages
+  @param[in]     pvCoeffs   points to ladder coefficient buffer.  The array is of length numStages+1
+  @param[in]     pState     points to state buffer.  The array is of length numStages+blockSize
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+
+void arm_iir_lattice_init_q31(
+  arm_iir_lattice_instance_q31 * S,
+  uint16_t numStages,
+  q31_t * pkCoeffs,
+  q31_t * pvCoeffs,
+  q31_t * pState,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numStages = numStages;
+
+  /* Assign reflection coefficient pointer */
+  S->pkCoeffs = pkCoeffs;
+
+  /* Assign ladder coefficient pointer */
+  S->pvCoeffs = pvCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numStages */
+  memset(pState, 0, (numStages + blockSize) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
index 2651dd56..d3cf7f66 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q15.c
@@ -1,396 +1,396 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_iir_lattice_q15.c
- * Description:  Q15 IIR Lattice filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup IIR_Lattice
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 IIR lattice filter.
-  @param[in]     S          points to an instance of the Q15 IIR lattice structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
- */
-
-void arm_iir_lattice_q15(
-  const arm_iir_lattice_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-        q15_t *pStateCur;                              /* State current pointer */
-        q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
-        q63_t acc;                                     /* Accumlator */
-        q15_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
-        uint32_t numStages = S->numStages;             /* Number of stages */
-        uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
-        q15_t out;                                     /* Temporary variable for output */
-
-#if defined (ARM_MATH_DSP) && defined (ARM_MATH_LOOPUNROLL)
-        q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
-        q31_t v;                                       /* Temporary variable for ladder coefficient */
-#endif
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-#if defined (ARM_MATH_DSP)
-
-  /* Sample processing */
-  while (blkCnt > 0U)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-    fnext = __SSAT(fnext, 16);
-
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-    gnext = __SSAT(gnext, 16);
-
-    /* write gN(n) into state for next sample processing */
-    *px2++ = (q15_t) gnext;
-
-    /* y(n) += gN(n) * vN */
-    acc += (q31_t) ((gnext * (*pv++)));
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = (numStages - 1U) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Process sample for 2nd, 6th ...taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = (q15_t) gnext1;
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write gN-2(n) into state */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-1 and vN-2 at a time */
-      v = read_q15x2_ia (&pv);
-
-      /* Pack gN-1(n) and gN-2(n) */
-
-#ifndef  ARM_MATH_BIG_ENDIAN
-      gnext = __PKHBT(gnext1, gnext2, 16);
-#else
-      gnext = __PKHBT(gnext2, gnext1, 16);
-#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
-
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext1 = (q15_t) __SSAT(gnext, 16);
-      /* write  gN-3(n) for the next sample process */
-      *px2++ = (q15_t) gnext1;
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
-      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
-      fcurr = __SSAT(fcurr, 16);
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
-      gnext2 = (q15_t) __SSAT(gnext, 16);
-      /* write      gN-4(n) for the next sample process */
-      *px2++ = (q15_t) gnext2;
-
-      /* Read vN-3 and vN-4 at a time */
-      v = read_q15x2_ia (&pv);
-
-      /* Pack gN-3(n) and gN-4(n) */
-#ifndef ARM_MATH_BIG_ENDIAN
-      gnext = __PKHBT(gnext1, gnext2, 16);
-#else
-      gnext = __PKHBT(gnext2, gnext1, 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc = __SMLALD(gnext, v, acc);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    fnext = fcurr;
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = (numStages - 1U) % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    tapCnt = (numStages - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-
-      /* Output samples for last taps */
-      acc += (q31_t) (((q31_t) gnext * (*pv++)));
-      *px2++ = (q15_t) gnext;
-      fcurr = fnext;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) (((q31_t) fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCur = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  /* copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = numStages >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = numStages % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  tapCnt = (numStages - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  /* Sample processing */
-  while (blkCnt > 0U)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    tapCnt = numStages;
-
-    while (tapCnt > 0U)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext = fcurr - ((gcurr * (*pk)) >> 15);
-      fnext = __SSAT(fnext, 16);
-
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext = ((fnext * (*pk++)) >> 15) + gcurr;
-      gnext = __SSAT(gnext, 16);
-
-      /* Output samples */
-      /* y(n) += gN(n) * vN */
-      acc += (q31_t) ((gnext * (*pv++)));
-
-      /* write gN(n) into state for next sample processing */
-      *px2++ = (q15_t) gnext;
-
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += (q31_t) ((fnext * (*pv++)));
-
-    out = (q15_t) __SSAT(acc >> 15, 16);
-    *px2++ = (q15_t) fnext;
-
-    /* write out into pDst */
-    *pDst++ = out;
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCur = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-/**
-  @} end of IIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_q15.c
+ * Description:  Q15 IIR Lattice filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q15 IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+ */
+
+void arm_iir_lattice_q15(
+  const arm_iir_lattice_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pStateCur;                              /* State current pointer */
+        q31_t fcurr, fnext = 0, gcurr = 0, gnext;      /* Temporary variables for lattice stages */
+        q63_t acc;                                     /* Accumlator */
+        q15_t *px1, *px2, *pk, *pv;                    /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;             /* Number of stages */
+        uint32_t blkCnt, tapCnt;                       /* Temporary variables for counts */
+        q15_t out;                                     /* Temporary variable for output */
+
+#if defined (ARM_MATH_DSP) && defined (ARM_MATH_LOOPUNROLL)
+        q15_t gnext1, gnext2;                          /* Temporary variables for lattice stages */
+        q31_t v;                                       /* Temporary variable for ladder coefficient */
+#endif
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+#if defined (ARM_MATH_DSP)
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    /* Process sample for first tap */
+    gcurr = *px1++;
+    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+    fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+    fnext = __SSAT(fnext, 16);
+
+    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+    gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+    gnext = __SSAT(gnext, 16);
+
+    /* write gN(n) into state for next sample processing */
+    *px2++ = (q15_t) gnext;
+
+    /* y(n) += gN(n) * vN */
+    acc += (q31_t) ((gnext * (*pv++)));
+
+    /* Update f values for next coefficient processing */
+    fcurr = fnext;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages - 1U) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Process sample for 2nd, 6th ...taps */
+      /* Read gN-2(n-1) from state buffer */
+      gcurr = *px1++;
+      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
+      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
+      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+      gnext1 = (q15_t) __SSAT(gnext, 16);
+      /* write gN-1(n) into state for next sample processing */
+      *px2++ = (q15_t) gnext1;
+
+      /* Process sample for 3nd, 7th ...taps */
+      /* Read gN-3(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 3rd, 7th .. taps */
+      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
+      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
+      fcurr = __SSAT(fcurr, 16);
+      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
+      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
+      gnext2 = (q15_t) __SSAT(gnext, 16);
+      /* write gN-2(n) into state */
+      *px2++ = (q15_t) gnext2;
+
+      /* Read vN-1 and vN-2 at a time */
+      v = read_q15x2_ia (&pv);
+
+      /* Pack gN-1(n) and gN-2(n) */
+
+#ifndef  ARM_MATH_BIG_ENDIAN
+      gnext = __PKHBT(gnext1, gnext2, 16);
+#else
+      gnext = __PKHBT(gnext2, gnext1, 16);
+#endif /* #ifndef  ARM_MATH_BIG_ENDIAN */
+
+      /* y(n) += gN-1(n) * vN-1  */
+      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
+      /* y(n) += gN-2(n) * vN-2  */
+      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
+      acc = __SMLALD(gnext, v, acc);
+
+      /* Process sample for 4th, 8th ...taps */
+      /* Read gN-4(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 4th, 8th .. taps */
+      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
+      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+      /* gN-3(n) = kN-3 * fN-1(n) + gN-1(n-1) */
+      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+      gnext1 = (q15_t) __SSAT(gnext, 16);
+      /* write  gN-3(n) for the next sample process */
+      *px2++ = (q15_t) gnext1;
+
+      /* Process sample for 5th, 9th ...taps */
+      /* Read gN-5(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 5th, 9th .. taps */
+      /* fN-5(n) = fN-4(n) - kN-4 * gN-5(n-1) */
+      fcurr = fnext - (((q31_t) gcurr * (*pk)) >> 15);
+      fcurr = __SSAT(fcurr, 16);
+      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
+      gnext = (((q31_t) fcurr * (*pk++)) >> 15) + gcurr;
+      gnext2 = (q15_t) __SSAT(gnext, 16);
+      /* write      gN-4(n) for the next sample process */
+      *px2++ = (q15_t) gnext2;
+
+      /* Read vN-3 and vN-4 at a time */
+      v = read_q15x2_ia (&pv);
+
+      /* Pack gN-3(n) and gN-4(n) */
+#ifndef ARM_MATH_BIG_ENDIAN
+      gnext = __PKHBT(gnext1, gnext2, 16);
+#else
+      gnext = __PKHBT(gnext2, gnext1, 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* y(n) += gN-4(n) * vN-4  */
+      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
+      /* y(n) += gN-3(n) * vN-3  */
+      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
+      acc = __SMLALD(gnext, v, acc);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    fnext = fcurr;
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = (numStages - 1U) % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample for last taps */
+      fnext = fcurr - (((q31_t) gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+      gnext = (((q31_t) fnext * (*pk++)) >> 15) + gcurr;
+      gnext = __SSAT(gnext, 16);
+
+      /* Output samples for last taps */
+      acc += (q31_t) (((q31_t) gnext * (*pv++)));
+      *px2++ = (q15_t) gnext;
+      fcurr = fnext;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += (q31_t) (((q31_t) fnext * (*pv++)));
+
+    out = (q15_t) __SSAT(acc >> 15, 16);
+    *px2++ = (q15_t) fnext;
+
+    /* write out into pDst */
+    *pDst++ = out;
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = numStages >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCur, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    tapCnt = numStages;
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample */
+      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+      fnext = fcurr - ((gcurr * (*pk)) >> 15);
+      fnext = __SSAT(fnext, 16);
+
+      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+      gnext = ((fnext * (*pk++)) >> 15) + gcurr;
+      gnext = __SSAT(gnext, 16);
+
+      /* Output samples */
+      /* y(n) += gN(n) * vN */
+      acc += (q31_t) ((gnext * (*pv++)));
+
+      /* write gN(n) into state for next sample processing */
+      *px2++ = (q15_t) gnext;
+
+      /* Update f values for next coefficient processing */
+      fcurr = fnext;
+
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += (q31_t) ((fnext * (*pv++)));
+
+    out = (q15_t) __SSAT(acc >> 15, 16);
+    *px2++ = (q15_t) fnext;
+
+    /* write out into pDst */
+    *pDst++ = out;
+
+    /* Advance the state pointer by 1 to process the next group of samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  tapCnt = numStages;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
index d0348fe4..63344955 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_iir_lattice_q31.c
@@ -1,356 +1,356 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_iir_lattice_q31.c
- * Description:  Q31 IIR Lattice filter processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup IIR_Lattice
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 IIR lattice filter.
-  @param[in]     S          points to an instance of the Q31 IIR lattice structure
-  @param[in]     pSrc       points to the block of input data
-  @param[out]    pDst       points to the block of output data
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clip.
-                   In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
-                   After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
- */
-
-void arm_iir_lattice_q31(
-  const arm_iir_lattice_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{       
-        q31_t *pState = S->pState;                       /* State pointer */
-        q31_t *pStateCur;                                /* State current pointer */
-        q31_t fcurr, fnext = 0, gcurr = 0, gnext;        /* Temporary variables for lattice stages */
-        q63_t acc;                                       /* Accumlator */
-        q31_t *px1, *px2, *pk, *pv;                      /* Temporary pointers for state and coef */
-        uint32_t numStages = S->numStages;               /* Number of stages */
-        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
-
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-#if defined (ARM_MATH_DSP)
-
-  /* Sample processing */
-  while (blkCnt > 0U)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    /* Process sample for first tap */
-    gcurr = *px1++;
-    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
-
-    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-    gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-
-    /* write gN-1(n-1) into state for next sample processing */
-    *px2++ = gnext;
-
-    /* y(n) += gN(n) * vN */
-    acc += ((q63_t) gnext * *pv++);
-
-    /* Update f values for next coefficient processing */
-    fcurr = fnext;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = (numStages - 1U) >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Process sample for 2nd, 6th ...taps */
-      /* Read gN-2(n-1) from state buffer */
-      gcurr = *px1++;
-      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
-      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-1(n) * vN-1  */
-      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-1(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Process sample for 3nd, 7th ...taps */
-      /* Read gN-3(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 3rd, 7th .. taps */
-      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
-      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-2(n) * vN-2  */
-      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-2(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Process sample for 4th, 8th ...taps */
-      /* Read gN-4(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 4th, 8th .. taps */
-      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
-      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-      /* y(n) += gN-3(n) * vN-3  */
-      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
-      acc += ((q63_t) gnext * *pv++);
-      /* write gN-3(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Process sample for 5th, 9th ...taps */
-      /* Read gN-5(n-1) from state buffer */
-      gcurr = *px1++;
-      /* Process sample for 5th, 9th .. taps */
-      /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
-      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
-      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
-      /* y(n) += gN-4(n) * vN-4  */
-      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
-      acc += ((q63_t) gnext * *pv++);
-
-      /* write gN-4(n) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    fnext = fcurr;
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = (numStages - 1U) % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    tapCnt = (numStages - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      gcurr = *px1++;
-      /* Process sample for last taps */
-      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
-      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
-
-      /* Output samples for last taps */
-      acc += ((q63_t) gnext * *pv++);
-      *px2++ = gnext;
-      fcurr = fnext;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += ((q63_t) fnext * *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31U);
-
-    /* Advance the state pointer by 4 to process the next group of 4 samples */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCur = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  /* Copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = numStages >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = numStages % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  tapCnt = (numStages - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  /* Sample processing */
-  while (blkCnt > 0U)
-  {
-    /* Read Sample from input buffer */
-    /* fN(n) = x(n) */
-    fcurr = *pSrc++;
-
-    /* Initialize Ladder coeff pointer */
-    pv = &S->pvCoeffs[0];
-
-    /* Initialize Reflection coeff pointer */
-    pk = &S->pkCoeffs[0];
-
-    /* Initialize state read pointer */
-    px1 = pState;
-
-    /* Initialize state write pointer */
-    px2 = pState;
-
-    /* Set accumulator to zero */
-    acc = 0;
-
-    tapCnt = numStages;
-
-    while (tapCnt > 0U)
-    {
-      gcurr = *px1++;
-      /* Process sample */
-      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
-      fnext = clip_q63_to_q31(((q63_t) fcurr - ((q31_t) (((q63_t) gcurr * (*pk  )) >> 31))));
-
-      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
-      gnext = clip_q63_to_q31(((q63_t) gcurr + ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
-
-      /* Output samples */
-      /* y(n) += gN(n) * vN */
-      acc += ((q63_t) gnext * *pv++);
-
-      /* write gN-1(n-1) into state for next sample processing */
-      *px2++ = gnext;
-
-      /* Update f values for next coefficient processing */
-      fcurr = fnext;
-
-      tapCnt--;
-    }
-
-    /* y(n) += g0(n) * v0 */
-    acc += ((q63_t) fnext * *pv++);
-
-    *px2++ = fnext;
-
-    /* write out into pDst */
-    *pDst++ = (q31_t) (acc >> 31U);
-
-    /* Advance the state pointer by 1 to process the next group of samples */
-    pState = pState + 1U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
-     for the preperation of next frame process */
-
-  /* Points to the start of the state buffer */
-  pStateCur = &S->pState[0];
-  pState = &S->pState[blockSize];
-
-  tapCnt = numStages;
-
-  /* Copy data */
-  while (tapCnt > 0U)
-  {
-    *pStateCur++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-/**
-  @} end of IIR_Lattice group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_iir_lattice_q31.c
+ * Description:  Q31 IIR Lattice filter processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup IIR_Lattice
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 IIR lattice filter.
+  @param[in]     S          points to an instance of the Q31 IIR lattice structure
+  @param[in]     pSrc       points to the block of input data
+  @param[out]    pDst       points to the block of output data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by 2*log2(numStages) bits.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is saturated to 1.32 format and then truncated to 1.31 format.
+ */
+
+void arm_iir_lattice_q31(
+  const arm_iir_lattice_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{       
+        q31_t *pState = S->pState;                       /* State pointer */
+        q31_t *pStateCur;                                /* State current pointer */
+        q31_t fcurr, fnext = 0, gcurr = 0, gnext;        /* Temporary variables for lattice stages */
+        q63_t acc;                                       /* Accumlator */
+        q31_t *px1, *px2, *pk, *pv;                      /* Temporary pointers for state and coef */
+        uint32_t numStages = S->numStages;               /* Number of stages */
+        uint32_t blkCnt, tapCnt;                         /* Temporary variables for counts */
+
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+#if defined (ARM_MATH_DSP)
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    /* Process sample for first tap */
+    gcurr = *px1++;
+    /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+    fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+
+    /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+    gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
+    /* write gN-1(n-1) into state for next sample processing */
+    *px2++ = gnext;
+
+    /* y(n) += gN(n) * vN */
+    acc += ((q63_t) gnext * *pv++);
+
+    /* Update f values for next coefficient processing */
+    fcurr = fnext;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = (numStages - 1U) >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Process sample for 2nd, 6th ...taps */
+      /* Read gN-2(n-1) from state buffer */
+      gcurr = *px1++;
+      /* fN-2(n) = fN-1(n) - kN-1 * gN-2(n-1) */
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-1(n) = kN-1 * fN-2(n) + gN-2(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+      /* y(n) += gN-1(n) * vN-1  */
+      /* process for gN-5(n) * vN-5, gN-9(n) * vN-9 ... */
+      acc += ((q63_t) gnext * *pv++);
+      /* write gN-1(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Process sample for 3nd, 7th ...taps */
+      /* Read gN-3(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 3rd, 7th .. taps */
+      /* fN-3(n) = fN-2(n) - kN-2 * gN-3(n-1) */
+      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-2(n) = kN-2 * fN-3(n) + gN-3(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
+      /* y(n) += gN-2(n) * vN-2  */
+      /* process for gN-6(n) * vN-6, gN-10(n) * vN-10 ... */
+      acc += ((q63_t) gnext * *pv++);
+      /* write gN-2(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Process sample for 4th, 8th ...taps */
+      /* Read gN-4(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 4th, 8th .. taps */
+      /* fN-4(n) = fN-3(n) - kN-3 * gN-4(n-1) */
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-3(n) = kN-3 * fN-4(n) + gN-4(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+      /* y(n) += gN-3(n) * vN-3  */
+      /* process for gN-7(n) * vN-7, gN-11(n) * vN-11 ... */
+      acc += ((q63_t) gnext * *pv++);
+      /* write gN-3(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Process sample for 5th, 9th ...taps */
+      /* Read gN-5(n-1) from state buffer */
+      gcurr = *px1++;
+      /* Process sample for 5th, 9th .. taps */
+      /* fN-5(n) = fN-4(n) - kN-4 * gN-1(n-1) */
+      fcurr = __QSUB(fnext, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      /* gN-4(n) = kN-4 * fN-5(n) + gN-5(n-1) */
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fcurr * (*pk++)) >> 31));
+      /* y(n) += gN-4(n) * vN-4  */
+      /* process for gN-8(n) * vN-8, gN-12(n) * vN-12 ... */
+      acc += ((q63_t) gnext * *pv++);
+
+      /* write gN-4(n) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    fnext = fcurr;
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = (numStages - 1U) % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample for last taps */
+      fnext = __QSUB(fcurr, (q31_t) (((q63_t) gcurr * (*pk  )) >> 31));
+      gnext = __QADD(gcurr, (q31_t) (((q63_t) fnext * (*pk++)) >> 31));
+
+      /* Output samples for last taps */
+      acc += ((q63_t) gnext * *pv++);
+      *px2++ = gnext;
+      fcurr = fnext;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += ((q63_t) fnext * *pv++);
+
+    *px2++ = fnext;
+
+    /* write out into pDst */
+    *pDst++ = (q31_t) (acc >> 31U);
+
+    /* Advance the state pointer by 4 to process the next group of 4 samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  /* Copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = numStages >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = numStages % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  tapCnt = (numStages - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  /* Sample processing */
+  while (blkCnt > 0U)
+  {
+    /* Read Sample from input buffer */
+    /* fN(n) = x(n) */
+    fcurr = *pSrc++;
+
+    /* Initialize Ladder coeff pointer */
+    pv = &S->pvCoeffs[0];
+
+    /* Initialize Reflection coeff pointer */
+    pk = &S->pkCoeffs[0];
+
+    /* Initialize state read pointer */
+    px1 = pState;
+
+    /* Initialize state write pointer */
+    px2 = pState;
+
+    /* Set accumulator to zero */
+    acc = 0;
+
+    tapCnt = numStages;
+
+    while (tapCnt > 0U)
+    {
+      gcurr = *px1++;
+      /* Process sample */
+      /* fN-1(n) = fN(n) - kN * gN-1(n-1) */
+      fnext = clip_q63_to_q31(((q63_t) fcurr - ((q31_t) (((q63_t) gcurr * (*pk  )) >> 31))));
+
+      /* gN(n) = kN * fN-1(n) + gN-1(n-1) */
+      gnext = clip_q63_to_q31(((q63_t) gcurr + ((q31_t) (((q63_t) fnext * (*pk++)) >> 31))));
+
+      /* Output samples */
+      /* y(n) += gN(n) * vN */
+      acc += ((q63_t) gnext * *pv++);
+
+      /* write gN-1(n-1) into state for next sample processing */
+      *px2++ = gnext;
+
+      /* Update f values for next coefficient processing */
+      fcurr = fnext;
+
+      tapCnt--;
+    }
+
+    /* y(n) += g0(n) * v0 */
+    acc += ((q63_t) fnext * *pv++);
+
+    *px2++ = fnext;
+
+    /* write out into pDst */
+    *pDst++ = (q31_t) (acc >> 31U);
+
+    /* Advance the state pointer by 1 to process the next group of samples */
+    pState = pState + 1U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete. Now copy last S->numStages samples to start of the buffer
+     for the preperation of next frame process */
+
+  /* Points to the start of the state buffer */
+  pStateCur = &S->pState[0];
+  pState = &S->pState[blockSize];
+
+  tapCnt = numStages;
+
+  /* Copy data */
+  while (tapCnt > 0U)
+  {
+    *pStateCur++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/**
+  @} end of IIR_Lattice group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f16.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f16.c
new file mode 100755
index 00000000..36108c20
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f16.c
@@ -0,0 +1,276 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_levinson_durbin_f16.c
+ * Description:  f16 version of Levinson Durbin algorithm
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions_f16.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup LD Levinson Durbin Algorithm
+
+ */
+
+/**
+  @addtogroup LD
+  @{
+ */
+
+/**
+  @brief         Levinson Durbin
+  @param[in]     phi      autocovariance vector starting with lag 0 (length is nbCoefs + 1)
+  @param[out]    a        autoregressive coefficients
+  @param[out]    err      prediction error (variance)
+  @param[in]     nbCoefs  number of autoregressive coefficients
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H)
+#pragma GCC warning "Scalar version of arm_levinson_durbin_f16 built. Helium version has build issues with gcc."
+#endif 
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) &&  !defined(__CMSIS_GCC_H)
+
+#include "arm_helium_utils.h"
+
+#define LANE4567_MASK 0xFF00
+
+void arm_levinson_durbin_f16(const float16_t *phi,
+  float16_t *a, 
+  float16_t *err,
+  int nbCoefs)
+{
+   _Float16 e;
+   static const uint16_t revOffsetArray[8] = {7,6,5,4,3,2,1,0};
+
+   a[0] = (_Float16)phi[1] / (_Float16)phi[0];
+
+   e = (_Float16)phi[0] - (_Float16)phi[1] * (_Float16)a[0];
+   for(int p=1; p < nbCoefs; p++)
+   {
+      _Float16 suma = 0.0f16;
+      _Float16 sumb = 0.0f16;
+      f16x8_t vecA,vecRevPhi,vecPhi,vecSumA, vecSumB;
+      _Float16 k;
+      uint32_t blkCnt; 
+      const float16_t *pPhi,*pRevPhi,*pA;
+      uint16x8_t revOffset;
+
+      int nb,j,i;
+
+      revOffset = vld1q(revOffsetArray);
+      vecSumA = vdupq_n_f16(0.0f16);
+      vecSumB = vdupq_n_f16(0.0f16);
+
+      pRevPhi = &phi[p-7];
+      pPhi = &phi[1];
+      pA = a;
+
+      i = 0;
+      blkCnt = p >> 3;
+      while(blkCnt > 0)
+      {
+         vecA = vld1q(pA);
+         pA += 8;
+
+         vecPhi = vld1q(pPhi);
+         pPhi += 8;
+
+         vecRevPhi = vldrhq_gather_shifted_offset_f16(pRevPhi,revOffset);
+         pRevPhi -= 8;
+
+         vecSumA = vfmaq(vecSumA,vecA,vecRevPhi);
+         vecSumB = vfmaq(vecSumB,vecA,vecPhi);
+
+         i += 8;
+         blkCnt--;
+
+      }
+
+      suma = vecAddAcrossF16Mve(vecSumA);
+      sumb = vecAddAcrossF16Mve(vecSumB);
+
+      blkCnt = p & 7;
+      while(blkCnt > 0)
+      {
+         suma += (_Float16)a[i] * (_Float16)phi[p - i];
+         sumb += (_Float16)a[i] * (_Float16)phi[i + 1];
+
+         i++;
+         blkCnt--;
+      }
+
+      k = ((_Float16)phi[p+1] - suma)/((_Float16)phi[0] - sumb);
+
+      f16x8_t vecRevA,tmp;
+      static int16_t orgOffsetArray[8]={0,1,2,3,-1,-2,-3,-4};
+      static const int16_t offsetIncArray[8]={4,4,4,4,-4,-4,-4,-4};
+
+      uint16x8_t offset,offsetInc,vecTmp;
+
+
+      offset = vld1q_u16((uint16_t*)orgOffsetArray);
+      vecTmp = vdupq_n_u16(p);
+
+      offset = vaddq_m_u16(offset,offset,vecTmp,LANE4567_MASK);
+      offsetInc = vld1q_u16((uint16_t*)offsetIncArray);
+
+      nb = p >> 3;
+      j=0;
+      for(int i = 0; i < nb ; i++)
+      {
+          
+          /*
+            x0=a[j] - k * a[p-1-j];
+            x1=a[j+1] - k * a[p-2-j];
+            x3=a[p-1-j] - k * a[j];
+            x4=a[p-2-j] - k * a[j+1];
+
+            a[j] = x0;
+            a[j+1] = x1;
+            a[p-1-j] = x2;
+            a[p-2-j] = x3;
+          */
+
+          uint64_t tmpa,tmpb;
+          vecA = vldrhq_gather_shifted_offset_f16(a,offset);
+
+          
+          tmpa = vgetq_lane_u64((uint64x2_t)vecA,0);
+          tmpb = vgetq_lane_u64((uint64x2_t)vecA,1);
+          vecRevA = (f16x8_t) vsetq_lane_u64(tmpb,(uint64x2_t)vecRevA,0);
+          vecRevA = (f16x8_t) vsetq_lane_u64(tmpa,(uint64x2_t)vecRevA,1);
+          
+
+          tmp = vsubq(vecA,vmulq_n_f16(vecRevA,k));
+          vstrhq_scatter_shifted_offset_f16(a, offset, tmp);
+
+          offset = vaddq(offset,offsetInc);
+ 
+          j+=4;
+
+      }
+
+      blkCnt = p & 7;
+
+      if (blkCnt)
+      {
+         nb = blkCnt >> 1;
+         for(int i =0;i < nb ; i++)
+         {
+             _Float16 x,y;
+   
+             x=(_Float16)a[j] - (_Float16)k * (_Float16)a[p-1-j];
+             y=(_Float16)a[p-1-j] - (_Float16)k * (_Float16)a[j];
+   
+             a[j] = x;
+             a[p-1-j] = y;
+   
+             j++;
+         }
+   
+         nb = blkCnt & 1;
+         if (nb)
+         {
+               a[j]=(_Float16)a[j]- (_Float16)k * (_Float16)a[p-1-j];
+         }
+      }
+
+     
+      a[p] = k;
+      e = e * (1.0f16 - k*k);
+
+
+   }
+   *err = e;
+}
+
+#else
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+void arm_levinson_durbin_f16(const float16_t *phi,
+  float16_t *a, 
+  float16_t *err,
+  int nbCoefs)
+{
+   _Float16 e;
+
+   a[0] = (_Float16)phi[1] / (_Float16)phi[0];
+
+   e = (_Float16)phi[0] - (_Float16)phi[1] * (_Float16)a[0];
+   for(int p=1; p < nbCoefs; p++)
+   {
+      _Float16 suma=0.0f16;
+      _Float16 sumb=0.0f16;
+      _Float16 k;
+      int nb,j;
+
+      for(int i=0; i < p; i++)
+      {
+         suma += (_Float16)a[i] * (_Float16)phi[p - i];
+         sumb += (_Float16)a[i] * (_Float16)phi[i + 1];
+      }
+
+      k = ((_Float16)phi[p+1]-suma)/((_Float16)phi[0] - sumb);
+
+
+      nb = p >> 1;
+      j=0;
+      for(int i =0;i < nb ; i++)
+      {
+          _Float16 x,y;
+
+          x=(_Float16)a[j] - (_Float16)k * (_Float16)a[p-1-j];
+          y=(_Float16)a[p-1-j] - (_Float16)k * (_Float16)a[j];
+
+          a[j] = x;
+          a[p-1-j] = y;
+
+          j++;
+      }
+
+      nb = p & 1;
+      if (nb)
+      {
+            a[j]=(_Float16)a[j]- (_Float16)k * (_Float16)a[p-1-j];
+      }
+
+      a[p] = k;
+      e = e * (1.0f16 - k*k);
+
+
+   }
+   *err = e;
+}
+#endif /* defined(ARM_FLOAT16_SUPPORTED */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of LD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f32.c
new file mode 100755
index 00000000..b244048c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_f32.c
@@ -0,0 +1,279 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_levinson_durbin_f32.c
+ * Description:  f32 version of Levinson Durbin algorithm
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup LD Levinson Durbin Algorithm
+
+ */
+
+/**
+  @addtogroup LD
+  @{
+ */
+
+/**
+  @brief         Levinson Durbin
+  @param[in]     phi      autocovariance vector starting with lag 0 (length is nbCoefs + 1)
+  @param[out]    a        autoregressive coefficients
+  @param[out]    err      prediction error (variance)
+  @param[in]     nbCoefs  number of autoregressive coefficients
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H)
+#pragma GCC warning "Scalar version of arm_levinson_durbin_f32 built. Helium version has build issues with gcc."
+#endif 
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) &&  !defined(__CMSIS_GCC_H)
+
+#include "arm_helium_utils.h"
+
+#define LANE23_MASK 0xFF00
+
+void arm_levinson_durbin_f32(const float32_t *phi,
+  float32_t *a, 
+  float32_t *err,
+  int nbCoefs)
+{
+   float32_t e;
+   static const uint32_t revOffsetArray[4] = {3,2,1,0};
+
+   a[0] = phi[1] / phi[0];
+
+   e = phi[0] - phi[1] * a[0];
+   for(int p=1; p < nbCoefs; p++)
+   {
+      float32_t suma = 0.0f;
+      float32_t sumb = 0.0f;
+      f32x4_t vecA,vecRevPhi,vecPhi,vecSumA, vecSumB;
+      float32_t k;
+      uint32_t blkCnt; 
+      const float32_t *pPhi,*pRevPhi,*pA;
+      uint32x4_t revOffset;
+
+      int nb,j,i;
+
+      revOffset = vld1q(revOffsetArray);
+      vecSumA = vdupq_n_f32(0.0f);
+      vecSumB = vdupq_n_f32(0.0f);
+
+      pRevPhi = &phi[p-3];
+      pPhi = &phi[1];
+      pA = a;
+
+      i = 0;
+      blkCnt = p >> 2;
+      while(blkCnt > 0)
+      {
+         vecA = vld1q(pA);
+         pA += 4;
+
+         vecPhi = vld1q(pPhi);
+         pPhi += 4;
+
+         vecRevPhi = vldrwq_gather_shifted_offset_f32(pRevPhi,revOffset);
+         pRevPhi -= 4;
+
+         vecSumA = vfmaq(vecSumA,vecA,vecRevPhi);
+         vecSumB = vfmaq(vecSumB,vecA,vecPhi);
+
+         i += 4;
+         blkCnt--;
+
+      }
+
+      suma = vecAddAcrossF32Mve(vecSumA);
+      sumb = vecAddAcrossF32Mve(vecSumB);
+
+      blkCnt = p & 3;
+      while(blkCnt > 0)
+      {
+         suma += a[i] * phi[p - i];
+         sumb += a[i] * phi[i + 1];
+
+         i++;
+         blkCnt--;
+      }
+
+      k = (phi[p+1] - suma)/(phi[0] - sumb);
+
+      f32x4_t vecRevA,tmp;
+      static int32_t orgOffsetArray[4]={0,1,-1,-2};
+      static const int32_t offsetIncArray[4]={2,2,-2,-2};
+
+      uint32x4_t offset,offsetInc,vecTmp;
+
+
+      offset = vld1q_u32((uint32_t*)orgOffsetArray);
+      vecTmp = vdupq_n_u32(p);
+
+      offset = vaddq_m_u32(offset,offset,vecTmp,LANE23_MASK);
+      offsetInc = vld1q_u32((uint32_t*)offsetIncArray);
+
+      nb = p >> 2;
+      j=0;
+      for(int i = 0; i < nb ; i++)
+      {
+          
+          /*
+            x0=a[j] - k * a[p-1-j];
+            x1=a[j+1] - k * a[p-2-j];
+            x3=a[p-1-j] - k * a[j];
+            x4=a[p-2-j] - k * a[j+1];
+
+            a[j] = x0;
+            a[j+1] = x1;
+            a[p-1-j] = x2;
+            a[p-2-j] = x3;
+          */
+
+          uint64_t tmpa,tmpb;
+          vecA = vldrwq_gather_shifted_offset_f32(a,offset);
+
+          
+          tmpa = vgetq_lane_u64((uint64x2_t)vecA,0);
+          tmpb = vgetq_lane_u64((uint64x2_t)vecA,1);
+          vecRevA = (f32x4_t) vsetq_lane_u64(tmpb,(uint64x2_t)vecRevA,0);
+          vecRevA = (f32x4_t) vsetq_lane_u64(tmpa,(uint64x2_t)vecRevA,1);
+          
+
+          tmp = vsubq(vecA,vmulq_n_f32(vecRevA,k));
+          vstrwq_scatter_shifted_offset_f32(a, offset, tmp);
+
+          offset = vaddq(offset,offsetInc);
+ 
+          j+=2;
+
+      }
+
+      switch(p & 3)
+      {
+         case 3:
+         {
+            float32_t x,y;
+            x = a[j] - k * a[p-1-j];
+            y = a[p-1-j] - k * a[j];
+
+            a[j] = x;
+            a[p-1-j] = y;
+
+            a[j+1] = a[j+1] - k * a[p-1-(j+1)];
+         }
+         break;
+
+         case 2:
+         {
+            float32_t x,y;
+            x = a[j] - k * a[p-1-j];
+            y = a[p-1-j] - k * a[j];
+
+            a[j] = x;
+            a[p-1-j] = y;
+         }
+         break;
+
+         case 1:
+            a[j] = a[j]- k * a[p-1-j];
+         break;
+      }
+
+      a[p] = k;
+      e = e * (1.0f - k*k);
+
+
+   }
+   *err = e;
+}
+
+#else
+void arm_levinson_durbin_f32(const float32_t *phi,
+  float32_t *a, 
+  float32_t *err,
+  int nbCoefs)
+{
+   float32_t e;
+   int p;
+
+   a[0] = phi[1] / phi[0];
+
+   e = phi[0] - phi[1] * a[0];
+   for(p=1; p < nbCoefs; p++)
+   {
+      float32_t suma=0.0f;
+      float32_t sumb=0.0f;
+      float32_t k;
+      int nb,j,i;
+
+      for(i=0; i < p; i++)
+      {
+         suma += a[i] * phi[p - i];
+         sumb += a[i] * phi[i + 1];
+      }
+
+      k = (phi[p+1]-suma)/(phi[0] - sumb);
+
+
+      nb = p >> 1;
+      j=0;
+      for(i =0; i < nb ; i++)
+      {
+          float32_t x,y;
+
+          x=a[j] - k * a[p-1-j];
+          y=a[p-1-j] - k * a[j];
+
+          a[j] = x;
+          a[p-1-j] = y;
+
+          j++;
+      }
+
+      nb = p & 1;
+      if (nb)
+      {
+            a[j]=a[j]- k * a[p-1-j];
+      }
+
+      a[p] = k;
+      e = e * (1.0f - k*k);
+
+
+   }
+   *err = e;
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of LD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_q31.c
new file mode 100755
index 00000000..1788d971
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_levinson_durbin_q31.c
@@ -0,0 +1,379 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_levinson_durbin_q31.c
+ * Description:  q31 version of Levinson Durbin algorithm
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+#define ONE_Q31 0x7FFFFFFFL
+#define TWO_Q30 0x7FFFFFFFL
+
+#define HALF_Q31 0x00008000L
+#define ONE_Q15 0x7FFF
+#define HALF_Q15 0x3FFF
+#define LOWPART_MASK 0x07FFF
+
+__STATIC_FORCEINLINE q31_t mul32x16(q31_t a, q15_t b)
+{
+  q31_t r = ((q63_t)a * (q63_t)b) >> 15;
+
+  return(r);
+  
+}
+
+__STATIC_FORCEINLINE q31_t mul32x32(q31_t a, q31_t b)
+{
+  //q31_t r = __SSAT(((q63_t)a * b) >> 31,31);
+  q31_t r = ((q63_t)a * b) >> 31;
+
+  return(r);
+  
+}
+
+__STATIC_FORCEINLINE q31_t divide(q31_t n, q31_t d)
+{
+  arm_status status;
+  int16_t shift;
+  q15_t inverse;
+  q31_t r;
+  // We are computing:
+  // n / d = n / (h + l) where h and l are the high end and low end part.
+  // 1 / (h + l) = 1 / h (1 - l / h)
+  // Our division algorithm has a shift. So it is returning a scaled value sh.
+  // So we need a << shift to convert 1/ sh to 1/h.
+  // In below code, we are organizing the computation differently. Instead of computing:
+  // 1 / h (1 - l / h) 
+  // we are computing
+  // 1 / h (2 - (l + h) / h) 
+  // 1 / h (2 - d / h)
+  // Also, we are not computing 1/h in Q15 but in Q14.
+  // 2 is expressed in Q30.
+  // So at the end of all computation we need a << 2
+
+  // Result is in Q14 because of use of HALF_Q15 instead of ONE_Q15.
+  status=arm_divide_q15(HALF_Q15,d>>16,&inverse,&shift);
+  (void)status;
+  
+  // d is used instead of l
+  // So we will need to substract to 2 instead of 1.
+  r = mul32x16(d,inverse);
+  r = TWO_Q30 - (r << shift);
+  r = mul32x16(r, inverse);
+  r = mul32x32(r,n) ;
+  r = r << (shift + 2);
+  
+  return(r);
+  
+}
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup LD Levinson Durbin Algorithm
+
+ */
+
+/**
+  @addtogroup LD
+  @{
+ */
+
+/**
+  @brief         Levinson Durbin
+  @param[in]     phi      autocovariance vector starting with lag 0 (length is nbCoefs + 1)
+  @param[out]    a        autoregressive coefficients
+  @param[out]    err      prediction error (variance)
+  @param[in]     nbCoefs  number of autoregressive coefficients
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H)
+#pragma GCC warning "Scalar version of arm_levinson_durbin_q31 built. Helium version has build issues with gcc."
+#endif 
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) &&  !defined(__CMSIS_GCC_H)
+
+#define LANE23_MASK 0xFF00
+
+#include "arm_helium_utils.h"
+void arm_levinson_durbin_q31(const q31_t *phi,
+  q31_t *a, 
+  q31_t *err,
+  int nbCoefs)
+{
+    q31_t e;
+
+    static const uint32_t revOffsetArray[4] = {3,2,1,0};
+
+   //a[0] = phi[1] / phi[0];
+   a[0] = divide(phi[1], phi[0]);
+   
+
+   //e = phi[0] - phi[1] * a[0];
+   e = phi[0] - mul32x32(phi[1],a[0]);
+
+   for(int p=1; p < nbCoefs; p++)
+   {
+      q63_t suma=0;
+      q63_t sumb=0;
+      q31x4_t vecA,vecRevPhi,vecPhi;
+      q31_t k;
+      uint32_t blkCnt; 
+      const q31_t *pPhi,*pRevPhi,*pA;
+      uint32x4_t revOffset;
+
+      
+      int nb,j,i;
+
+      revOffset = vld1q(revOffsetArray);
+
+      pRevPhi = &phi[p-3];
+      pPhi = &phi[1];
+      pA = a;
+
+      i = 0;
+      blkCnt = p >> 2;
+      while(blkCnt > 0)
+      {
+         vecA = vld1q(pA);
+         pA += 4;
+
+         vecPhi = vld1q(pPhi);
+         pPhi += 4;
+
+         vecRevPhi = vldrwq_gather_shifted_offset_s32(pRevPhi,revOffset);
+         pRevPhi -= 4;
+
+         suma = vmlaldavaq(suma,vecA,vecRevPhi);
+         sumb = vmlaldavaq(sumb,vecA,vecPhi); 
+
+         i += 4;
+         blkCnt--;
+      }
+
+
+      blkCnt = p & 3;
+      while(blkCnt > 0)
+      {
+         suma += ((q63_t)a[i] * phi[p - i]);
+         sumb += ((q63_t)a[i] * phi[i + 1]);
+
+         i++;
+         blkCnt--;
+      }
+
+      suma = asrl(suma, 31);
+      sumb = asrl(sumb, 31);
+
+
+
+      //k = (phi[p+1]-suma)/(phi[0] - sumb);
+      k = divide(phi[p+1]-(q31_t)suma,phi[0] - (q31_t)sumb);
+
+      q31x4_t vecRevA,tmp;
+      static int32_t orgOffsetArray[4]={0,1,-1,-2};
+      static const int32_t offsetIncArray[4]={2,2,-2,-2};
+
+      uint32x4_t offset,offsetInc,vecTmp;
+
+
+      offset = vld1q_u32((uint32_t*)orgOffsetArray);
+      vecTmp = vdupq_n_u32(p);
+
+      offset = vaddq_m_u32(offset,offset,vecTmp,LANE23_MASK);
+      offsetInc = vld1q_u32((uint32_t*)offsetIncArray);
+
+
+      nb = p >> 2;
+      j=0;
+      for(int i =0;i < nb ; i++)
+      {
+        /*
+          q31_t x0,x1,x2,x3;
+
+          //x = a[j] - k * a[p-1-j];
+          x0 = a[j] - mul32x32(k,a[p-1-j]);
+          x1 = a[j+1] - mul32x32(k,a[p-2-j]);
+
+          //y = a[p-1-j] - k * a[j];
+          x2 = a[p-1-j] - mul32x32(k , a[j]);
+          x3 = a[p-2-j] - mul32x32(k , a[j+1]);
+
+          a[j] = x0;
+          a[j+1] = x1;
+          a[p-1-j] = x2;
+          a[p-2-j] = x3;
+        */
+
+          uint64_t tmpa,tmpb;
+          vecA = vldrwq_gather_shifted_offset_s32(a,offset);
+
+          
+          tmpa = vgetq_lane_u64((uint64x2_t)vecA,0);
+          tmpb = vgetq_lane_u64((uint64x2_t)vecA,1);
+          vecRevA = (q31x4_t) vsetq_lane_u64(tmpb,(uint64x2_t)vecRevA,0);
+          vecRevA = (q31x4_t) vsetq_lane_u64(tmpa,(uint64x2_t)vecRevA,1);
+          
+
+          tmp = vsubq(vecA,vqdmulhq_n_s32(vecRevA,k));
+          vstrwq_scatter_shifted_offset_s32(a, offset, tmp);
+
+          offset = vaddq(offset,offsetInc);
+
+          j+=2;
+      }
+
+      switch(p & 3)
+      {
+         case 3:
+         {
+          q31_t x,y;
+
+          //x = a[j] - k * a[p-1-j];
+          x = a[j] - mul32x32(k,a[p-1-j]);
+
+          //y = a[p-1-j] - k * a[j];
+          y = a[p-1-j] - mul32x32(k , a[j]);
+
+          a[j] = x;
+          a[p-1-j] = y;
+
+          //a[j] = a[j]- k * a[p-1-j];
+          a[j+1] = a[j+1] - mul32x32(k,a[p-2-j]);
+         }
+         break;
+
+         case 2:
+         {
+          q31_t x,y;
+
+          //x = a[j] - k * a[p-1-j];
+          x = a[j] - mul32x32(k,a[p-1-j]);
+
+          //y = a[p-1-j] - k * a[j];
+          y = a[p-1-j] - mul32x32(k , a[j]);
+
+          a[j] = x;
+          a[p-1-j] = y;
+         }
+         break;
+
+         case 1:
+            //a[j] = a[j]- k * a[p-1-j];
+            a[j] = a[j] - mul32x32(k,a[p-1-j]);
+         break;
+      }
+
+      a[p] = k;
+
+      // e = e * (1 - k*k);
+      e = mul32x32(e,ONE_Q31 - mul32x32(k,k));
+
+
+   }
+   *err = e;
+}
+
+#else
+
+void arm_levinson_durbin_q31(const q31_t *phi,
+  q31_t *a, 
+  q31_t *err,
+  int nbCoefs)
+{
+   q31_t e;
+   int p;
+
+   //a[0] = phi[1] / phi[0];
+   a[0] = divide(phi[1], phi[0]);
+   
+
+   //e = phi[0] - phi[1] * a[0];
+   e = phi[0] - mul32x32(phi[1],a[0]);
+
+   for(p=1; p < nbCoefs; p++)
+   {
+      q63_t suma=0;
+      q63_t sumb=0;
+      q31_t k;
+      int nb,j,i;
+
+      for(i=0; i < p; i++)
+      {
+         suma += ((q63_t)a[i] * phi[p - i]);
+         sumb += ((q63_t)a[i] * phi[i + 1]);
+      }
+
+      suma = suma >> 31;
+      sumb = sumb >> 31;
+
+
+
+      //k = (phi[p+1]-suma)/(phi[0] - sumb);
+      k = divide(phi[p+1]-(q31_t)suma,phi[0] - (q31_t)sumb);
+
+
+      nb = p >> 1;
+      j=0;
+      for(i =0;i < nb ; i++)
+      {
+          q31_t x,y;
+
+          //x = a[j] - k * a[p-1-j];
+          x = a[j] - mul32x32(k,a[p-1-j]);
+
+          //y = a[p-1-j] - k * a[j];
+          y = a[p-1-j] - mul32x32(k , a[j]);
+
+          a[j] = x;
+          a[p-1-j] = y;
+
+          j++;
+      }
+
+      nb = p & 1;
+      if (nb)
+      {
+            //a[j] = a[j]- k * a[p-1-j];
+            a[j] = a[j] - mul32x32(k,a[p-1-j]);
+      }
+
+      a[p] = k;
+
+      // e = e * (1 - k*k);
+      e = mul32x32(e,ONE_Q31 - mul32x32(k,k));
+
+
+   }
+   *err = e;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of LD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
index edcb8e30..99cbeb42 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_f32.c
@@ -1,533 +1,533 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_f32.c
- * Description:  Processing function for the floating-point LMS filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup LMS Least Mean Square (LMS) Filters
-
-  LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
-  LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
-  Adaptive filters are often used in communication systems, equalizers, and noise removal.
-  The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
-  The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
-
-  An LMS filter consists of two components as shown below.
-  The first component is a standard transversal or FIR filter.
-  The second component is a coefficient update mechanism.
-  The LMS filter has two input signals.
-  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
-  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
-  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
-  This "error signal" tends towards zero as the filter adapts.
-  The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
-  \image html LMS.gif "Internal structure of the Least Mean Square filter"
-
-  The functions operate on blocks of data and each call to the function processes
-  <code>blockSize</code> samples through the filter.
-  <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
-  <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
-  All arrays contain <code>blockSize</code> values.
-
-  The functions operate on a block-by-block basis.
-  Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
-  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
-
-  @par           Algorithm
-                   The output signal <code>y[n]</code> is computed by a standard FIR filter:
-  <pre>
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-  </pre>
-
-  @par
-                   The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
-  <pre>
-      e[n] = d[n] - y[n].
-  </pre>
-
-  @par
-                   After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis:
-  <pre>
-      b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
-  </pre>
-                   where <code>mu</code> is the step size and controls the rate of coefficient convergence.
-  @par
-                   In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
-                   Coefficients are stored in time reversed order.
-  @par
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-  @par
-                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
-                   Samples in the state buffer are stored in the order:
-  @par
-  <pre>
-     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-  </pre>
-  @par
-                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
-                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
-                   to be avoided and yields a significant speed improvement.
-                   The state variables are updated after each block of data is processed.
-  @par           Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter and
-                   coefficient and state arrays cannot be shared among instances.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-
-  @par           Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
-
-  @par
-                 Use of the initialization function is optional.
-                 However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                 To place an instance structure into a const data section, the instance structure must be manually initialized.
-                 Set the values in the state buffer to zeros before static initialization.
-                 The code below statically initializes each of the 3 different data type filter instance structures
-  <pre>
-     arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
-     arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
-     arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
-  </pre>
-                 where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
-                 <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.
-
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the Q15 and Q31 versions of the LMS filter.
-                   The following issues must be considered:
-                   - Scaling of coefficients
-                   - Overflow and saturation
-
-  @par           Scaling of Coefficients
-                   Filter coefficients are represented as fractional values and
-                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
-                   The fixed-point functions have an additional scaling parameter <code>postShift</code>.
-                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
-                   This essentially scales the filter coefficients by <code>2^postShift</code> and
-                   allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
-                   The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
-
-  @par           Overflow and Saturation
-                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
-                   described separately as part of the function specific documentation below.
- */
-
-/**
-  @addtogroup LMS
-  @{
- */
-
-/**
-  @brief         Processing function for floating-point LMS filter.
-  @param[in]     S          points to an instance of the floating-point LMS filter structure
-  @param[in]     pSrc       points to the block of input data
-  @param[in]     pRef       points to the block of reference data
-  @param[out]    pOut       points to the block of output data
-  @param[out]    pErr       points to the block of error data
-  @param[in]     blockSize  number of samples to process
-  @return        none
- */
-#if defined(ARM_MATH_NEON)
-void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  const float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w = 0.0f;                            /* weight factor */
-
-  float32x4_t tempV, sumV, xV, bV;
-  float32x2_t tempV2;
-
-  e = 0.0f;
-  d = 0.0f;
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-    sumV = vdupq_n_f32(0.0);
-
-    /* Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      xV = vld1q_f32(px);
-      bV = vld1q_f32(pb);
-      sumV = vmlaq_f32(sumV, xV, bV);
-
-      px += 4; 
-      pb += 4;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
-    sum = tempV2[0] + tempV2[1];
-
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for the updating filter coefficients */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      xV = vld1q_f32(px);
-      bV = vld1q_f32(pb);
-      px += 4;
-      bV = vmlaq_n_f32(bV,xV,w);
-
-      vst1q_f32(pb,bV); 
-      pb += 4;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      *pb = *pb + (w * (*px++));
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Process 4 taps at a time for (numTaps - 1U) samples copy */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    tempV = vld1q_f32(pState);
-    vst1q_f32(pStateCurnt,tempV); 
-    pState += 4;
-    pStateCurnt += 4;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-  /* Copy the remaining q31_t data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-
-}
-#else
-void arm_lms_f32(
-  const arm_lms_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pRef,
-        float32_t * pOut,
-        float32_t * pErr,
-        uint32_t blockSize)
-{       
-        float32_t *pState = S->pState;                 /* State pointer */
-        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-        float32_t mu = S->mu;                          /* Adaptive factor */
-        float32_t acc, e;                              /* Accumulator, error */
-        float32_t w;                                   /* Weight factor */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-
-  /* Initializations of error,  difference, Coefficient update */
-  e = 0.0f;
-  w = 0.0f;
-
-  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (*px++) * (*pb++);
-
-      acc += (*px++) * (*pb++);
-
-      acc += (*px++) * (*pb++);
-
-      acc += (*px++) * (*pb++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = acc;
-
-    /* Compute and store error */
-    e = (float32_t) *pRef++ - acc;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    w = e * mu;
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of samples */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of LMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_f32.c
+ * Description:  Processing function for the floating-point LMS filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup LMS Least Mean Square (LMS) Filters
+
+  LMS filters are a class of adaptive filters that are able to "learn" an unknown transfer functions.
+  LMS filters use a gradient descent method in which the filter coefficients are updated based on the instantaneous error signal.
+  Adaptive filters are often used in communication systems, equalizers, and noise removal.
+  The CMSIS DSP Library contains LMS filter functions that operate on Q15, Q31, and floating-point data types.
+  The library also contains normalized LMS filters in which the filter coefficient adaptation is indepedent of the level of the input signal.
+
+  An LMS filter consists of two components as shown below.
+  The first component is a standard transversal or FIR filter.
+  The second component is a coefficient update mechanism.
+  The LMS filter has two input signals.
+  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+  This "error signal" tends towards zero as the filter adapts.
+  The LMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+  \image html LMS.gif "Internal structure of the Least Mean Square filter"
+
+  The functions operate on blocks of data and each call to the function processes
+  <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
+  <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
+  All arrays contain <code>blockSize</code> values.
+
+  The functions operate on a block-by-block basis.
+  Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
+  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+  @par           Algorithm
+                   The output signal <code>y[n]</code> is computed by a standard FIR filter:
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+
+  @par
+                   The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
+  <pre>
+      e[n] = d[n] - y[n].
+  </pre>
+
+  @par
+                   After each sample of the error signal is computed, the filter coefficients <code>b[k]</code> are updated on a sample-by-sample basis:
+  <pre>
+      b[k] = b[k] + e[n] * mu * x[n-k],  for k=0, 1, ..., numTaps-1
+  </pre>
+                   where <code>mu</code> is the step size and controls the rate of coefficient convergence.
+  @par
+                   In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+  @par
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+  @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the order:
+  @par
+  <pre>
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+  @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
+                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed.
+  @par           Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter and
+                   coefficient and state arrays cannot be shared among instances.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, mu, postShift (not for f32), pState. Also set all of the values in pState to zero.
+
+  @par
+                 Use of the initialization function is optional.
+                 However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                 To place an instance structure into a const data section, the instance structure must be manually initialized.
+                 Set the values in the state buffer to zeros before static initialization.
+                 The code below statically initializes each of the 3 different data type filter instance structures
+  <pre>
+     arm_lms_instance_f32 S = {numTaps, pState, pCoeffs, mu};
+     arm_lms_instance_q31 S = {numTaps, pState, pCoeffs, mu, postShift};
+     arm_lms_instance_q15 S = {numTaps, pState, pCoeffs, mu, postShift};
+  </pre>
+                 where <code>numTaps</code> is the number of filter coefficients in the filter; <code>pState</code> is the address of the state buffer;
+                 <code>pCoeffs</code> is the address of the coefficient buffer; <code>mu</code> is the step size parameter; and <code>postShift</code> is the shift applied to coefficients.
+
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the LMS filter.
+                   The following issues must be considered:
+                   - Scaling of coefficients
+                   - Overflow and saturation
+
+  @par           Scaling of Coefficients
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+                   The fixed-point functions have an additional scaling parameter <code>postShift</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   This essentially scales the filter coefficients by <code>2^postShift</code> and
+                   allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
+
+  @par           Overflow and Saturation
+                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+                   described separately as part of the function specific documentation below.
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point LMS filter.
+  @param[in]     S          points to an instance of the floating-point LMS filter structure
+  @param[in]     pSrc       points to the block of input data
+  @param[in]     pRef       points to the block of reference data
+  @param[out]    pOut       points to the block of output data
+  @param[out]    pErr       points to the block of error data
+  @param[in]     blockSize  number of samples to process
+  @return        none
+ */
+#if defined(ARM_MATH_NEON)
+void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pRef,
+  float32_t * pOut,
+  float32_t * pErr,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+  float32_t mu = S->mu;                          /* Adaptive factor */
+  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+  uint32_t tapCnt, blkCnt;                       /* Loop counters */
+  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
+  float32_t w = 0.0f;                            /* weight factor */
+
+  float32x4_t tempV, sumV, xV, bV;
+  float32x2_t tempV2;
+
+  e = 0.0f;
+  d = 0.0f;
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Set the accumulator to zero */
+    sum = 0.0f;
+    sumV = vdupq_n_f32(0.0);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      sumV = vmlaq_f32(sumV, xV, bV);
+
+      px += 4; 
+      pb += 4;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+    sum = vget_lane_f32(tempV2, 0) + vget_lane_f32(tempV2, 1);
+
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* The result in the accumulator, store in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Compute and store error */
+    d = (float32_t) (*pRef++);
+    e = d - sum;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for the updating filter coefficients */
+    w = e * mu;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      px += 4;
+      bV = vmlaq_n_f32(bV,xV,w);
+
+      vst1q_f32(pb,bV); 
+      pb += 4;
+
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb = *pb + (w * (*px++));
+      pb++;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+
+  /* Processing is complete. Now copy the last numTaps - 1 samples to the
+     satrt of the state buffer. This prepares the state buffer for the
+     next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* Process 4 taps at a time for (numTaps - 1U) samples copy */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    tempV = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,tempV); 
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+  /* Copy the remaining q31_t data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+
+}
+#else
+void arm_lms_f32(
+  const arm_lms_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize)
+{       
+        float32_t *pState = S->pState;                 /* State pointer */
+        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+        float32_t mu = S->mu;                          /* Adaptive factor */
+        float32_t acc, e;                              /* Accumulator, error */
+        float32_t w;                                   /* Weight factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  w = 0.0f;
+
+  /* S->pState points to state array which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Set the accumulator to zero */
+    acc = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = acc;
+
+    /* Compute and store error */
+    e = (float32_t) *pRef++ - acc;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for updating filter coefficients */
+    w = e * mu;
+
+    /* Initialize pState pointer */
+    /* Advance state pointer by 1 for the next sample */
+    px = pState++;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
index d1618e01..cf472afd 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_f32.c
@@ -1,81 +1,81 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_init_f32.c
- * Description:  Floating-point LMS filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup LMS
-  @{
- */
-
-/**
-  @brief         Initialization function for floating-point LMS filter.
-  @param[in]     S          points to an instance of the floating-point LMS filter structure
-  @param[in]     numTaps    number of filter coefficients
-  @param[in]     pCoeffs    points to coefficient buffer
-  @param[in]     pState     points to state buffer
-  @param[in]     mu         step size that controls filter coefficient updates
-  @param[in]     blockSize  number of samples to process
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   The initial filter coefficients serve as a starting point for the adaptive filter.
-                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_f32()</code>.
- */
-
-void arm_lms_init_f32(
-  arm_lms_instance_f32 * S,
-  uint16_t numTaps,
-  float32_t * pCoeffs,
-  float32_t * pState,
-  float32_t mu,
-  uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps */
-  memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-}
-
-/**
-  @} end of LMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_init_f32.c
+ * Description:  Floating-point LMS filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Initialization function for floating-point LMS filter.
+  @param[in]     S          points to an instance of the floating-point LMS filter structure
+  @param[in]     numTaps    number of filter coefficients
+  @param[in]     pCoeffs    points to coefficient buffer
+  @param[in]     pState     points to state buffer
+  @param[in]     mu         step size that controls filter coefficient updates
+  @param[in]     blockSize  number of samples to process
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_f32()</code>.
+ */
+
+void arm_lms_init_f32(
+  arm_lms_instance_f32 * S,
+  uint16_t numTaps,
+  float32_t * pCoeffs,
+  float32_t * pState,
+  float32_t mu,
+  uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps */
+  memset(pState, 0, (numTaps + (blockSize - 1)) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
index 56c361b3..31c2bff2 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q15.c
@@ -1,92 +1,92 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_init_q15.c
- * Description:  Q15 LMS filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup LMS
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 LMS filter.
-  @param[in]     S          points to an instance of the Q15 LMS filter structure.
-  @param[in]     numTaps    number of filter coefficients.
-  @param[in]     pCoeffs    points to coefficient buffer.
-  @param[in]     pState     points to state buffer.
-  @param[in]     mu         step size that controls filter coefficient updates.
-  @param[in]     blockSize  number of samples to process.
-  @param[in]     postShift  bit shift applied to coefficients.
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   The initial filter coefficients serve as a starting point for the adaptive filter.
-                   <code>pState</code> points to the array of state variables and size of array is
-                   <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of
-                   input samples processed by each call to <code>arm_lms_q15()</code>.
- */
-
-void arm_lms_init_q15(
-  arm_lms_instance_q15 * S,
-  uint16_t numTaps,
-  q15_t * pCoeffs,
-  q15_t * pState,
-  q15_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-}
-
-/**
-  @} end of LMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_init_q15.c
+ * Description:  Q15 LMS filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 LMS filter.
+  @param[in]     S          points to an instance of the Q15 LMS filter structure.
+  @param[in]     numTaps    number of filter coefficients.
+  @param[in]     pCoeffs    points to coefficient buffer.
+  @param[in]     pState     points to state buffer.
+  @param[in]     mu         step size that controls filter coefficient updates.
+  @param[in]     blockSize  number of samples to process.
+  @param[in]     postShift  bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to the array of state variables and size of array is
+                   <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of
+                   input samples processed by each call to <code>arm_lms_q15()</code>.
+ */
+
+void arm_lms_init_q15(
+  arm_lms_instance_q15 * S,
+  uint16_t numTaps,
+  q15_t * pCoeffs,
+  q15_t * pState,
+  q15_t mu,
+  uint32_t blockSize,
+  uint32_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Assign postShift value to be applied */
+  S->postShift = postShift;
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
index 559296a5..e657a938 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_init_q31.c
@@ -1,92 +1,92 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_init_q31.c
- * Description:  Q31 LMS filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup LMS
-  @{
- */
-
-/**
-  @brief         Initialization function for Q31 LMS filter.
-  @param[in]     S          points to an instance of the Q31 LMS filter structure
-  @param[in]     numTaps    number of filter coefficients
-  @param[in]     pCoeffs    points to coefficient buffer
-  @param[in]     pState     points to state buffer
-  @param[in]     mu         step size that controls filter coefficient updates
-  @param[in]     blockSize  number of samples to process
-  @param[in]     postShift  bit shift applied to coefficients
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   The initial filter coefficients serve as a starting point for the adaptive filter.
-                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
-                   where <code>blockSize</code> is the number of input samples processed by each call to
-                   <code>arm_lms_q31()</code>.
- */
-
-void arm_lms_init_q31(
-  arm_lms_instance_q31 * S,
-  uint16_t numTaps,
-  q31_t * pCoeffs,
-  q31_t * pState,
-  q31_t mu,
-  uint32_t blockSize,
-  uint32_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Assign postShift value to be applied */
-  S->postShift = postShift;
-}
-
-/**
-  @} end of LMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_init_q31.c
+ * Description:  Q31 LMS filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Initialization function for Q31 LMS filter.
+  @param[in]     S          points to an instance of the Q31 LMS filter structure
+  @param[in]     numTaps    number of filter coefficients
+  @param[in]     pCoeffs    points to coefficient buffer
+  @param[in]     pState     points to state buffer
+  @param[in]     mu         step size that controls filter coefficient updates
+  @param[in]     blockSize  number of samples to process
+  @param[in]     postShift  bit shift applied to coefficients
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+                   where <code>blockSize</code> is the number of input samples processed by each call to
+                   <code>arm_lms_q31()</code>.
+ */
+
+void arm_lms_init_q31(
+  arm_lms_instance_q31 * S,
+  uint16_t numTaps,
+  q31_t * pCoeffs,
+  q31_t * pState,
+  q31_t mu,
+  uint32_t blockSize,
+  uint32_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Assign postShift value to be applied */
+  S->postShift = postShift;
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
index 244de7f9..85f8211c 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_f32.c
@@ -1,564 +1,564 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_norm_f32.c
- * Description:  Processing function for the floating-point NLMS filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @defgroup LMS_NORM Normalized LMS Filters
-
-  This set of functions implements a commonly used adaptive filter.
-  It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
-  factor which increases the adaptation rate of the filter.
-  The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
-
-  A normalized least mean square (NLMS) filter consists of two components as shown below.
-  The first component is a standard transversal or FIR filter.
-  The second component is a coefficient update mechanism.
-  The NLMS filter has two input signals.
-  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
-  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
-  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
-  This "error signal" tends towards zero as the filter adapts.
-  The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
-  \image html LMS.gif "Internal structure of the NLMS adaptive filter"
-
-  The functions operate on blocks of data and each call to the function processes
-  <code>blockSize</code> samples through the filter.
-  <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
-  <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
-  All arrays contain <code>blockSize</code> values.
-
-  The functions operate on a block-by-block basis.
-  Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
-  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
-
- @par            Algorithm
-                   The output signal <code>y[n]</code> is computed by a standard FIR filter:
-  <pre>
-      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
-  </pre>
-
- @par
-                   The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
-  <pre>
-      e[n] = d[n] - y[n].
-  </pre>
-
- @par
-                   After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
-  <pre>
-     E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
-  </pre>
-                   The filter coefficients <code>b[k]</code> are then updated on a sample-by-sample basis:
-  <pre>
-      b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
-  </pre>
-                   where <code>mu</code> is the step size and controls the rate of coefficient convergence.
- @par
-                   In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
-                   Coefficients are stored in time reversed order.
- @par
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
- @par
-                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
-                   Samples in the state buffer are stored in the order:
- @par
-  <pre>
-     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
-  </pre>
- @par
-                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
-                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
-                   to be avoided and yields a significant speed improvement.
-                   The state variables are updated after each block of data is processed.
-
- @par            Instance Structure
-                   The coefficients and state variables for a filter are stored together in an instance data structure.
-                   A separate instance structure must be defined for each filter and
-                   coefficient and state arrays cannot be shared among instances.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-
- @par            Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Zeros out the values in the state buffer.
-                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
-                   numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
-                   For Q7, Q15, and Q31 the following fields must also be initialized;
-                   recipTable, postShift
- @par
-                   Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
- @par            Fixed-Point Behavior
-                   Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
-                   The following issues must be considered:
-                   - Scaling of coefficients
-                   - Overflow and saturation
-
- @par            Scaling of Coefficients
-                   Filter coefficients are represented as fractional values and
-                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
-                   The fixed-point functions have an additional scaling parameter <code>postShift</code>.
-                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
-                   This essentially scales the filter coefficients by <code>2^postShift</code> and
-                   allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
-                   The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
-
- @par            Overflow and Saturation
-                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
-                   described separately as part of the function specific documentation below.
- */
-
-/**
-  @addtogroup LMS_NORM
-  @{
- */
-
-/**
-  @brief         Processing function for floating-point normalized LMS filter.
-  @param[in]     S         points to an instance of the floating-point normalized LMS filter structure
-  @param[in]     pSrc      points to the block of input data
-  @param[in]     pRef      points to the block of reference data
-  @param[out]    pOut      points to the block of output data
-  @param[out]    pErr      points to the block of error data
-  @param[in]     blockSize number of samples to process
-  @return        none
- */
-
-#if defined(ARM_MATH_NEON)
-void arm_lms_norm_f32(
-  arm_lms_norm_instance_f32 * S,
-  const float32_t * pSrc,
-  float32_t * pRef,
-  float32_t * pOut,
-  float32_t * pErr,
-  uint32_t blockSize)
-{
-  float32_t *pState = S->pState;                 /* State pointer */
-  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-  float32_t mu = S->mu;                          /* Adaptive factor */
-  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-  uint32_t tapCnt, blkCnt;                       /* Loop counters */
-  float32_t energy;                              /* Energy of the input */
-  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
-  float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
-
-  float32x4_t tempV, sumV, xV, bV;
-  float32x2_t tempV2;
-
-  /* Initializations of error,  difference, Coefficient update */
-  e = 0.0f;
-  d = 0.0f;
-  w = 0.0f;
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* Loop over blockSize number of values */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    sum = 0.0f;
-    sumV = vdupq_n_f32(0.0);
-
-    /* Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      xV = vld1q_f32(px);
-      bV = vld1q_f32(pb);
-      sumV = vmlaq_f32(sumV, xV, bV);
-
-      px += 4; 
-      pb += 4;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
-    sum = tempV2[0] + tempV2[1];
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      sum += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* The result in the accumulator, store in the destination buffer. */
-    *pOut++ = sum;
-
-    /* Compute and store error */
-    d = (float32_t) (*pRef++);
-    e = d - sum;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coeff pointer */
-    pb = (pCoeffs);
-
-    /* Process 4 taps at a time. */
-    tapCnt = numTaps >> 2;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      xV = vld1q_f32(px);
-      bV = vld1q_f32(pb);
-      px += 4;
-      bV = vmlaq_n_f32(bV,xV,w);
-
-      vst1q_f32(pb,bV); 
-      pb += 4;
-
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
-    tapCnt = numTaps % 0x4U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete. Now copy the last numTaps - 1 samples to the
-     satrt of the state buffer. This prepares the state buffer for the
-     next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* Process 4 taps at a time for (numTaps - 1U)/4 samples copy */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  /* copy data */
-  while (tapCnt > 0U)
-  {
-    tempV = vld1q_f32(pState);
-    vst1q_f32(pStateCurnt,tempV); 
-    pState += 4;
-    pStateCurnt += 4;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-  /* Calculate remaining number of copies */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-  /* Copy the remaining q31_t data */
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement the loop counter */
-    tapCnt--;
-  }
-
-}
-#else
-void arm_lms_norm_f32(
-        arm_lms_norm_instance_f32 * S,
-  const float32_t * pSrc,
-        float32_t * pRef,
-        float32_t * pOut,
-        float32_t * pErr,
-        uint32_t blockSize)
-{
-        float32_t *pState = S->pState;                 /* State pointer */
-        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
-        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
-        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
-        float32_t mu = S->mu;                          /* Adaptive factor */
-        float32_t acc, e;                              /* Accumulator, error */
-        float32_t w;                                   /* Weight factor */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-        float32_t energy;                              /* Energy of the input */
-        float32_t x0, in;                              /* Temporary variable to hold input sample and state */
-
-  /* Initializations of error,  difference, Coefficient update */
-  e = 0.0f;
-  w = 0.0f;
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= x0 * x0;
-    energy += in * in;
-
-    /* Set the accumulator to zero */
-    acc = 0.0f;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (*px++) * (*pb++);
-
-      acc += (*px++) * (*pb++);
-
-      acc += (*px++) * (*pb++);
-
-      acc += (*px++) * (*pb++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (*px++) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = acc;
-
-    /* Compute and store error */
-    e = (float32_t) *pRef++ - acc;
-    *pErr++ = e;
-
-    /* Calculation of Weighting factor for updating filter coefficients */
-    /* epsilon value 0.000000119209289f */
-    w = (e * mu) / (energy + 0.000000119209289f);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      *pb += w * (*px++);
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = energy;
-  S->x0 = x0;
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of samples */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-/**
-  @} end of LMS_NORM group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_f32.c
+ * Description:  Processing function for the floating-point NLMS filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @defgroup LMS_NORM Normalized LMS Filters
+
+  This set of functions implements a commonly used adaptive filter.
+  It is related to the Least Mean Square (LMS) adaptive filter and includes an additional normalization
+  factor which increases the adaptation rate of the filter.
+  The CMSIS DSP Library contains normalized LMS filter functions that operate on Q15, Q31, and floating-point data types.
+
+  A normalized least mean square (NLMS) filter consists of two components as shown below.
+  The first component is a standard transversal or FIR filter.
+  The second component is a coefficient update mechanism.
+  The NLMS filter has two input signals.
+  The "input" feeds the FIR filter while the "reference input" corresponds to the desired output of the FIR filter.
+  That is, the FIR filter coefficients are updated so that the output of the FIR filter matches the reference input.
+  The filter coefficient update mechanism is based on the difference between the FIR filter output and the reference input.
+  This "error signal" tends towards zero as the filter adapts.
+  The NLMS processing functions accept the input and reference input signals and generate the filter output and error signal.
+  \image html LMS.gif "Internal structure of the NLMS adaptive filter"
+
+  The functions operate on blocks of data and each call to the function processes
+  <code>blockSize</code> samples through the filter.
+  <code>pSrc</code> points to input signal, <code>pRef</code> points to reference signal,
+  <code>pOut</code> points to output signal and <code>pErr</code> points to error signal.
+  All arrays contain <code>blockSize</code> values.
+
+  The functions operate on a block-by-block basis.
+  Internally, the filter coefficients <code>b[n]</code> are updated on a sample-by-sample basis.
+  The convergence of the LMS filter is slower compared to the normalized LMS algorithm.
+
+ @par            Algorithm
+                   The output signal <code>y[n]</code> is computed by a standard FIR filter:
+  <pre>
+      y[n] = b[0] * x[n] + b[1] * x[n-1] + b[2] * x[n-2] + ...+ b[numTaps-1] * x[n-numTaps+1]
+  </pre>
+
+ @par
+                   The error signal equals the difference between the reference signal <code>d[n]</code> and the filter output:
+  <pre>
+      e[n] = d[n] - y[n].
+  </pre>
+
+ @par
+                   After each sample of the error signal is computed the instanteous energy of the filter state variables is calculated:
+  <pre>
+     E = x[n]^2 + x[n-1]^2 + ... + x[n-numTaps+1]^2.
+  </pre>
+                   The filter coefficients <code>b[k]</code> are then updated on a sample-by-sample basis:
+  <pre>
+      b[k] = b[k] + e[n] * (mu/E) * x[n-k],  for k=0, 1, ..., numTaps-1
+  </pre>
+                   where <code>mu</code> is the step size and controls the rate of coefficient convergence.
+ @par
+                   In the APIs, <code>pCoeffs</code> points to a coefficient array of size <code>numTaps</code>.
+                   Coefficients are stored in time reversed order.
+ @par
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+ @par
+                   <code>pState</code> points to a state array of size <code>numTaps + blockSize - 1</code>.
+                   Samples in the state buffer are stored in the order:
+ @par
+  <pre>
+     {x[n-numTaps+1], x[n-numTaps], x[n-numTaps-1], x[n-numTaps-2]....x[0], x[1], ..., x[blockSize-1]}
+  </pre>
+ @par
+                   Note that the length of the state buffer exceeds the length of the coefficient array by <code>blockSize-1</code> samples.
+                   The increased state buffer length allows circular addressing, which is traditionally used in FIR filters,
+                   to be avoided and yields a significant speed improvement.
+                   The state variables are updated after each block of data is processed.
+
+ @par            Instance Structure
+                   The coefficients and state variables for a filter are stored together in an instance data structure.
+                   A separate instance structure must be defined for each filter and
+                   coefficient and state arrays cannot be shared among instances.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+
+ @par            Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Zeros out the values in the state buffer.
+                   To do this manually without calling the init function, assign the follow subfields of the instance structure:
+                   numTaps, pCoeffs, mu, energy, x0, pState. Also set all of the values in pState to zero.
+                   For Q7, Q15, and Q31 the following fields must also be initialized;
+                   recipTable, postShift
+ @par
+                   Instance structure cannot be placed into a const data section and it is recommended to use the initialization function.
+ @par            Fixed-Point Behavior
+                   Care must be taken when using the Q15 and Q31 versions of the normalised LMS filter.
+                   The following issues must be considered:
+                   - Scaling of coefficients
+                   - Overflow and saturation
+
+ @par            Scaling of Coefficients (fixed point versions)
+                   Filter coefficients are represented as fractional values and
+                   coefficients are restricted to lie in the range <code>[-1 +1)</code>.
+                   The fixed-point functions have an additional scaling parameter <code>postShift</code>.
+                   At the output of the filter's accumulator is a shift register which shifts the result by <code>postShift</code> bits.
+                   This essentially scales the filter coefficients by <code>2^postShift</code> and
+                   allows the filter coefficients to exceed the range <code>[+1 -1)</code>.
+                   The value of <code>postShift</code> is set by the user based on the expected gain through the system being modeled.
+
+ @par            Overflow and Saturation (fixed point versions)
+                   Overflow and saturation behavior of the fixed-point Q15 and Q31 versions are
+                   described separately as part of the function specific documentation below.
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Processing function for floating-point normalized LMS filter.
+  @param[in]     S         points to an instance of the floating-point normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+ */
+
+#if defined(ARM_MATH_NEON)
+void arm_lms_norm_f32(
+  arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+  float32_t * pRef,
+  float32_t * pOut,
+  float32_t * pErr,
+  uint32_t blockSize)
+{
+  float32_t *pState = S->pState;                 /* State pointer */
+  float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+  float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+  float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+  float32_t mu = S->mu;                          /* Adaptive factor */
+  uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+  uint32_t tapCnt, blkCnt;                       /* Loop counters */
+  float32_t energy;                              /* Energy of the input */
+  float32_t sum, e, d;                           /* accumulator, error, reference data sample */
+  float32_t w, x0, in;                           /* weight factor, temporary variable to hold input sample and state */
+
+  float32x4_t tempV, sumV, xV, bV;
+  float32x2_t tempV2;
+
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  d = 0.0f;
+  w = 0.0f;
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* Loop over blockSize number of values */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy -= x0 * x0;
+    energy += in * in;
+
+    /* Set the accumulator to zero */
+    sum = 0.0f;
+    sumV = vdupq_n_f32(0.0);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      sumV = vmlaq_f32(sumV, xV, bV);
+
+      px += 4; 
+      pb += 4;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+    tempV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+    sum = vget_lane_f32(tempV2, 0) + vget_lane_f32(tempV2, 1);
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      sum += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* The result in the accumulator, store in the destination buffer. */
+    *pOut++ = sum;
+
+    /* Compute and store error */
+    d = (float32_t) (*pRef++);
+    e = d - sum;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for updating filter coefficients */
+    /* epsilon value 0.000000119209289f */
+    w = (e * mu) / (energy + 0.000000119209289f);
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coeff pointer */
+    pb = (pCoeffs);
+
+    /* Process 4 taps at a time. */
+    tapCnt = numTaps >> 2;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      xV = vld1q_f32(px);
+      bV = vld1q_f32(pb);
+      px += 4;
+      bV = vmlaq_n_f32(bV,xV,w);
+
+      vst1q_f32(pb,bV); 
+      pb += 4;
+
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* If the filter length is not a multiple of 4, compute the remaining filter taps */
+    tapCnt = numTaps % 0x4U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  S->energy = energy;
+  S->x0 = x0;
+
+  /* Processing is complete. Now copy the last numTaps - 1 samples to the
+     satrt of the state buffer. This prepares the state buffer for the
+     next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* Process 4 taps at a time for (numTaps - 1U)/4 samples copy */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  /* copy data */
+  while (tapCnt > 0U)
+  {
+    tempV = vld1q_f32(pState);
+    vst1q_f32(pStateCurnt,tempV); 
+    pState += 4;
+    pStateCurnt += 4;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+  /* Calculate remaining number of copies */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+  /* Copy the remaining q31_t data */
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement the loop counter */
+    tapCnt--;
+  }
+
+}
+#else
+void arm_lms_norm_f32(
+        arm_lms_norm_instance_f32 * S,
+  const float32_t * pSrc,
+        float32_t * pRef,
+        float32_t * pOut,
+        float32_t * pErr,
+        uint32_t blockSize)
+{
+        float32_t *pState = S->pState;                 /* State pointer */
+        float32_t *pCoeffs = S->pCoeffs;               /* Coefficient pointer */
+        float32_t *pStateCurnt;                        /* Points to the current sample of the state */
+        float32_t *px, *pb;                            /* Temporary pointers for state and coefficient buffers */
+        float32_t mu = S->mu;                          /* Adaptive factor */
+        float32_t acc, e;                              /* Accumulator, error */
+        float32_t w;                                   /* Weight factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        float32_t energy;                              /* Energy of the input */
+        float32_t x0, in;                              /* Temporary variable to hold input sample and state */
+
+  /* Initializations of error,  difference, Coefficient update */
+  e = 0.0f;
+  w = 0.0f;
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy -= x0 * x0;
+    energy += in * in;
+
+    /* Set the accumulator to zero */
+    acc = 0.0f;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      acc += (*px++) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (*px++) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = acc;
+
+    /* Compute and store error */
+    e = (float32_t) *pRef++ - acc;
+    *pErr++ = e;
+
+    /* Calculation of Weighting factor for updating filter coefficients */
+    /* epsilon value 0.000000119209289f */
+    w = (e * mu) / (energy + 0.000000119209289f);
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      *pb += w * (*px++);
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Save energy and x0 values for the next frame */
+  S->energy = energy;
+  S->x0 = x0;
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
index 632510fe..b0b7ea50 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_f32.c
@@ -1,92 +1,92 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_norm_init_f32.c
- * Description:  Floating-point NLMS filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup LMS_NORM
-  @{
- */
-
-/**
-  @brief         Initialization function for floating-point normalized LMS filter.
-  @param[in]     S         points to an instance of the floating-point LMS filter structure
-  @param[in]     numTaps   number of filter coefficients
-  @param[in]     pCoeffs   points to coefficient buffer
-  @param[in]     pState    points to state buffer
-  @param[in]     mu        step size that controls filter coefficient updates
-  @param[in]     blockSize number of samples to process
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   The initial filter coefficients serve as a starting point for the adaptive filter.
-                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
-                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_f32()</code>.
- */
-
-void arm_lms_norm_init_f32(
-        arm_lms_norm_instance_f32 * S,
-        uint16_t numTaps,
-        float32_t * pCoeffs,
-        float32_t * pState,
-        float32_t mu,
-        uint32_t blockSize)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialise Energy to zero */
-  S->energy = 0.0f;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0.0f;
-}
-
-/**
-  @} end of LMS_NORM group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_init_f32.c
+ * Description:  Floating-point NLMS filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Initialization function for floating-point normalized LMS filter.
+  @param[in]     S         points to an instance of the floating-point LMS filter structure
+  @param[in]     numTaps   number of filter coefficients
+  @param[in]     pCoeffs   points to coefficient buffer
+  @param[in]     pState    points to state buffer
+  @param[in]     mu        step size that controls filter coefficient updates
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_f32()</code>.
+ */
+
+void arm_lms_norm_init_f32(
+        arm_lms_norm_instance_f32 * S,
+        uint16_t numTaps,
+        float32_t * pCoeffs,
+        float32_t * pState,
+        float32_t mu,
+        uint32_t blockSize)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(float32_t));
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Initialise Energy to zero */
+  S->energy = 0.0f;
+
+  /* Initialise x0 to zero */
+  S->x0 = 0.0f;
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
index 11b5f39f..5bbfc420 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q15.c
@@ -1,98 +1,98 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_norm_init_q15.c
- * Description:  Q15 NLMS filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @addtogroup LMS_NORM
-  @{
- */
-
-/**
-  @brief         Initialization function for Q15 normalized LMS filter.
-  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure.
-  @param[in]     numTaps   number of filter coefficients.
-  @param[in]     pCoeffs   points to coefficient buffer.
-  @param[in]     pState    points to state buffer.
-  @param[in]     mu        step size that controls filter coefficient updates.
-  @param[in]     blockSize number of samples to process.
-  @param[in]     postShift bit shift applied to coefficients.
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   The initial filter coefficients serve as a starting point for the adaptive filter.
-                   <code>pState</code> points to the array of state variables and size of array is
-                   <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
-                   by each call to <code>arm_lms_norm_q15()</code>.
- */
-
-void arm_lms_norm_init_q15(
-        arm_lms_norm_instance_q15 * S,
-        uint16_t numTaps,
-        q15_t * pCoeffs,
-        q15_t * pState,
-        q15_t mu,
-        uint32_t blockSize,
-        uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q15_t *) armRecipTableQ15;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-}
-
-/**
-  @} end of LMS_NORM group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_init_q15.c
+ * Description:  Q15 NLMS filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Initialization function for Q15 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure.
+  @param[in]     numTaps   number of filter coefficients.
+  @param[in]     pCoeffs   points to coefficient buffer.
+  @param[in]     pState    points to state buffer.
+  @param[in]     mu        step size that controls filter coefficient updates.
+  @param[in]     blockSize number of samples to process.
+  @param[in]     postShift bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to the array of state variables and size of array is
+                   <code>numTaps+blockSize-1</code> samples, where <code>blockSize</code> is the number of input samples processed
+                   by each call to <code>arm_lms_norm_q15()</code>.
+ */
+
+void arm_lms_norm_init_q15(
+        arm_lms_norm_instance_q15 * S,
+        uint16_t numTaps,
+        q15_t * pCoeffs,
+        q15_t * pState,
+        q15_t mu,
+        uint32_t blockSize,
+        uint8_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q15_t));
+
+  /* Assign post Shift value applied to coefficients */
+  S->postShift = postShift;
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Initialize reciprocal pointer table */
+  S->recipTable = (q15_t *) armRecipTableQ15;
+
+  /* Initialise Energy to zero */
+  S->energy = 0;
+
+  /* Initialise x0 to zero */
+  S->x0 = 0;
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
index 79d629fc..cc429b00 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_init_q31.c
@@ -1,97 +1,97 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_norm_init_q31.c
- * Description:  Q31 NLMS filter initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @addtogroup LMS_NORM
-  @{
- */
-
-/**
-  @brief         Initialization function for Q31 normalized LMS filter.
-  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure.
-  @param[in]     numTaps   number of filter coefficients.
-  @param[in]     pCoeffs   points to coefficient buffer.
-  @param[in]     pState    points to state buffer.
-  @param[in]     mu        step size that controls filter coefficient updates.
-  @param[in]     blockSize number of samples to process.
-  @param[in]     postShift bit shift applied to coefficients.
-  @return        none
-
-  @par           Details
-                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
-  <pre>
-     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
-  </pre>
-                   The initial filter coefficients serve as a starting point for the adaptive filter.
-                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
-                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
- */
-
-void arm_lms_norm_init_q31(
-        arm_lms_norm_instance_q31 * S,
-        uint16_t numTaps,
-        q31_t * pCoeffs,
-        q31_t * pState,
-        q31_t mu,
-        uint32_t blockSize,
-        uint8_t postShift)
-{
-  /* Assign filter taps */
-  S->numTaps = numTaps;
-
-  /* Assign coefficient pointer */
-  S->pCoeffs = pCoeffs;
-
-  /* Clear state buffer and size is always blockSize + numTaps - 1 */
-  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
-
-  /* Assign post Shift value applied to coefficients */
-  S->postShift = postShift;
-
-  /* Assign state pointer */
-  S->pState = pState;
-
-  /* Assign Step size value */
-  S->mu = mu;
-
-  /* Initialize reciprocal pointer table */
-  S->recipTable = (q31_t *) armRecipTableQ31;
-
-  /* Initialise Energy to zero */
-  S->energy = 0;
-
-  /* Initialise x0 to zero */
-  S->x0 = 0;
-}
-
-/**
-  @} end of LMS_NORM group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_init_q31.c
+ * Description:  Q31 NLMS filter initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Initialization function for Q31 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure.
+  @param[in]     numTaps   number of filter coefficients.
+  @param[in]     pCoeffs   points to coefficient buffer.
+  @param[in]     pState    points to state buffer.
+  @param[in]     mu        step size that controls filter coefficient updates.
+  @param[in]     blockSize number of samples to process.
+  @param[in]     postShift bit shift applied to coefficients.
+  @return        none
+
+  @par           Details
+                   <code>pCoeffs</code> points to the array of filter coefficients stored in time reversed order:
+  <pre>
+     {b[numTaps-1], b[numTaps-2], b[N-2], ..., b[1], b[0]}
+  </pre>
+                   The initial filter coefficients serve as a starting point for the adaptive filter.
+                   <code>pState</code> points to an array of length <code>numTaps+blockSize-1</code> samples,
+                   where <code>blockSize</code> is the number of input samples processed by each call to <code>arm_lms_norm_q31()</code>.
+ */
+
+void arm_lms_norm_init_q31(
+        arm_lms_norm_instance_q31 * S,
+        uint16_t numTaps,
+        q31_t * pCoeffs,
+        q31_t * pState,
+        q31_t mu,
+        uint32_t blockSize,
+        uint8_t postShift)
+{
+  /* Assign filter taps */
+  S->numTaps = numTaps;
+
+  /* Assign coefficient pointer */
+  S->pCoeffs = pCoeffs;
+
+  /* Clear state buffer and size is always blockSize + numTaps - 1 */
+  memset(pState, 0, (numTaps + (blockSize - 1U)) * sizeof(q31_t));
+
+  /* Assign post Shift value applied to coefficients */
+  S->postShift = postShift;
+
+  /* Assign state pointer */
+  S->pState = pState;
+
+  /* Assign Step size value */
+  S->mu = mu;
+
+  /* Initialize reciprocal pointer table */
+  S->recipTable = (q31_t *) armRecipTableQ31;
+
+  /* Initialise Energy to zero */
+  S->energy = 0;
+
+  /* Initialise x0 to zero */
+  S->x0 = 0;
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
index 14bbdc71..b07efdda 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q15.c
@@ -1,297 +1,297 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_norm_q15.c
- * Description:  Processing function for Q15 normalized LMS filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup LMS_NORM
-  @{
- */
-
-/**
-  @brief         Processing function for Q15 normalized LMS filter.
-  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure
-  @param[in]     pSrc      points to the block of input data
-  @param[in]     pRef      points to the block of reference data
-  @param[out]    pOut      points to the block of output data
-  @param[out]    pErr      points to the block of error data
-  @param[in]     blockSize number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   Both coefficients and state variables are represented in 1.15 format and
-                   multiplications yield a 2.30 result. The 2.30 intermediate results are
-                   accumulated in a 64-bit accumulator in 34.30 format.
-                   There is no risk of internal overflow with this approach and the full
-                   precision of intermediate multiplications is preserved. After all additions
-                   have been performed, the accumulator is truncated to 34.15 format by
-                   discarding low 15 bits. Lastly, the accumulator is saturated to yield a
-                   result in 1.15 format.
- @par
-  	               In this filter, filter coefficients are updated for each sample and the
-                   updation of filter cofficients are saturted.
- */
-
-void arm_lms_norm_q15(
-        arm_lms_norm_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pRef,
-        q15_t * pOut,
-        q15_t * pErr,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-        q15_t mu = S->mu;                              /* Adaptive factor */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-        q63_t acc;                                     /* Accumulator */
-        q31_t energy;                                  /* Energy of the input */
-        q15_t e = 0, d = 0;                            /* Error, reference data sample */
-        q15_t w = 0, in;                               /* Weight factor and state */
-        q15_t x0;                                      /* Temporary variable to hold input sample */
-        q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-        q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-        q31_t coef;                                    /* Temporary variable for coefficient */
-        q31_t acc_l, acc_h;                            /* Temporary input */
-        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-        int32_t uShift = (32 - lShift);
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy -= (((q31_t) x0 * (x0)) >> 15);
-    energy += (((q31_t) in * (in)) >> 15);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
-      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16U);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    d = *pRef++;
-    e = d - (q15_t) acc;
-    *pErr++ = e;
-
-    /* Calculation of 1/energy */
-    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, &oneByEnergy, S->recipTable);
-
-    /* Calculation of e * mu value */
-    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
-
-    /* Calculation of (e * mu) * (1/energy) value */
-    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
-
-    /* Weighting factor for the normalized version */
-    w = (q15_t) __SSAT((q31_t) acc, 16);
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT(coef, 16);
-
-      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT(coef, 16);
-
-      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT(coef, 16);
-
-      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT(coef, 16);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT(coef, 16);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q15_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
-    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of samples */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of LMS_NORM group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_q15.c
+ * Description:  Processing function for Q15 normalized LMS filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q15 normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and
+                   multiplications yield a 2.30 result. The 2.30 intermediate results are
+                   accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full
+                   precision of intermediate multiplications is preserved. After all additions
+                   have been performed, the accumulator is truncated to 34.15 format by
+                   discarding low 15 bits. Lastly, the accumulator is saturated to yield a
+                   result in 1.15 format.
+ @par
+  	               In this filter, filter coefficients are updated for each sample and the
+                   updation of filter cofficients are saturted.
+ */
+
+void arm_lms_norm_q15(
+        arm_lms_norm_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q15_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q31_t energy;                                  /* Energy of the input */
+        q15_t e = 0, d = 0;                            /* Error, reference data sample */
+        q15_t w = 0, in;                               /* Weight factor and state */
+        q15_t x0;                                      /* Temporary variable to hold input sample */
+        q15_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
+        q15_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
+        q31_t coef;                                    /* Temporary variable for coefficient */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
+        int32_t uShift = (32 - lShift);
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy -= (((q31_t) x0 * (x0)) >> 15);
+    energy += (((q31_t) in * (in)) >> 15);
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    /* Apply shift for lower part of acc and upper part of acc */
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Converting the result to 1.15 format and saturate the output */
+    acc = __SSAT(acc, 16U);
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q15_t) acc;
+
+    /* Compute and store error */
+    d = *pRef++;
+    e = d - (q15_t) acc;
+    *pErr++ = e;
+
+    /* Calculation of 1/energy */
+    postShift = arm_recip_q15((q15_t) energy + DELTA_Q15, &oneByEnergy, S->recipTable);
+
+    /* Calculation of e * mu value */
+    errorXmu = (q15_t) (((q31_t) e * mu) >> 15);
+
+    /* Calculation of (e * mu) * (1/energy) value */
+    acc = (((q31_t) errorXmu * oneByEnergy) >> (15 - postShift));
+
+    /* Weighting factor for the normalized version */
+    w = (q15_t) __SSAT((q31_t) acc, 16);
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) *pb + (((q31_t) w * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT(coef, 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Save energy and x0 values for the next frame */
+  S->energy = (q15_t) energy;
+  S->x0 = x0;
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
index 34cc34a8..6375d8ff 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_norm_q31.c
@@ -1,311 +1,311 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_norm_q31.c
- * Description:  Processing function for the Q31 NLMS filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup LMS_NORM
-  @{
- */
-
-/**
-  @brief         Processing function for Q31 normalized LMS filter.
-  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure
-  @param[in]     pSrc      points to the block of input data
-  @param[in]     pRef      points to the block of reference data
-  @param[out]    pOut      points to the block of output data
-  @param[out]    pErr      points to the block of error data
-  @param[in]     blockSize number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate
-                   multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clip.
-                   In order to avoid overflows completely the input signal must be scaled down by
-                   log2(numTaps) bits. The reference signal should not be scaled down.
-                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
-                   and saturated to 1.31 format to yield the final result.
-                   The output signal and error signal are in 1.31 format.
- @par
-  	               In this filter, filter coefficients are updated for each sample and the
-                   updation of filter cofficients are saturted.
- */
-
-void arm_lms_norm_q31(
-        arm_lms_norm_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pRef,
-        q31_t * pOut,
-        q31_t * pErr,
-        uint32_t blockSize)
-{
-        q31_t *pState = S->pState;                     /* State pointer */
-        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-        q31_t mu = S->mu;                              /* Adaptive factor */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-        q63_t acc;                                     /* Accumulator */
-        q63_t energy;                                  /* Energy of the input */
-        q31_t e = 0;                                   /* Error data sample */
-        q31_t w = 0, in;                               /* Weight factor and state */
-        q31_t x0;                                      /* Temporary variable to hold input sample */
-        q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
-        q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
-        q31_t coef;                                    /* Temporary variable for coef */
-        q31_t acc_l, acc_h;                            /* Temporary input */
-        uint32_t uShift = ((uint32_t) S->postShift + 1U);
-        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
-
-  energy = S->energy;
-  x0 = S->x0;
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Read the sample from input buffer */
-    in = *pSrc++;
-
-    /* Update the energy calculation */
-    energy = (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
-    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* acc +=  b[N] * x[n-N] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-1] * x[n-N-1] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-2] * x[n-N-2] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-3] * x[n-N-3] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Calculates the reciprocal of energy */
-    postShift = arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
-
-    /* Calculation of product of (e * mu) */
-    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Weighting factor for the normalized version */
-    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Read the sample from state buffer */
-    x0 = *pState;
-
-    /* Advance state pointer by 1 for the next sample */
-    pState = pState + 1;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Save energy and x0 values for the next frame */
-  S->energy = (q31_t) energy;
-  S->x0 = x0;
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of samples */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of LMS_NORM group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_norm_q31.c
+ * Description:  Processing function for the Q31 NLMS filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS_NORM
+  @{
+ */
+
+/**
+  @brief         Processing function for Q31 normalized LMS filter.
+  @param[in]     S         points to an instance of the Q31 normalized LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clip.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(numTaps) bits. The reference signal should not be scaled down.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+                   and saturated to 1.31 format to yield the final result.
+                   The output signal and error signal are in 1.31 format.
+ @par
+  	               In this filter, filter coefficients are updated for each sample and the
+                   updation of filter cofficients are saturted.
+ */
+
+void arm_lms_norm_q31(
+        arm_lms_norm_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize)
+{
+        q31_t *pState = S->pState;                     /* State pointer */
+        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q31_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q63_t energy;                                  /* Energy of the input */
+        q31_t e = 0;                                   /* Error data sample */
+        q31_t w = 0, in;                               /* Weight factor and state */
+        q31_t x0;                                      /* Temporary variable to hold input sample */
+        q31_t errorXmu, oneByEnergy;                   /* Temporary variables to store error and mu product and reciprocal of energy */
+        q31_t postShift;                               /* Post shift to be applied to weight after reciprocal calculation */
+        q31_t coef;                                    /* Temporary variable for coef */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
+
+  energy = S->energy;
+  x0 = S->x0;
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Read the sample from input buffer */
+    in = *pSrc++;
+
+    /* Update the energy calculation */
+    energy = (q31_t) ((((q63_t) energy << 32) - (((q63_t) x0 * x0) << 1)) >> 32);
+    energy = (q31_t) (((((q63_t) in * in) << 1) + (energy << 32)) >> 32);
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-1] * x[n-N-1] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-2] * x[n-N-2] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-3] * x[n-N-3] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Converting the result to 1.31 format */
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q31_t) acc;
+
+    /* Compute and store error */
+    e = *pRef++ - (q31_t) acc;
+    *pErr++ = e;
+
+    /* Calculates the reciprocal of energy */
+    postShift = arm_recip_q31(energy + DELTA_Q31, &oneByEnergy, &S->recipTable[0]);
+
+    /* Calculation of product of (e * mu) */
+    errorXmu = (q31_t) (((q63_t) e * mu) >> 31);
+
+    /* Weighting factor for the normalized version */
+    w = clip_q63_to_q31(((q63_t) errorXmu * oneByEnergy) >> (31 - postShift));
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+
+      /* coef is in 2.30 format */
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      /* get coef in 1.31 format by left shifting */
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      /* update coefficient buffer to next coefficient */
+      pb++;
+
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) (((q63_t) w * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Read the sample from state buffer */
+    x0 = *pState;
+
+    /* Advance state pointer by 1 for the next sample */
+    pState = pState + 1;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Save energy and x0 values for the next frame */
+  S->energy = (q31_t) energy;
+  S->x0 = x0;
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS_NORM group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
index ce4fd31b..76cab032 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q15.c
@@ -1,262 +1,262 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_q15.c
- * Description:  Processing function for Q15 LMS filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup LMS
-  @{
- */
-
-/**
-  @brief         Processing function for Q15 LMS filter.
-  @param[in]     S         points to an instance of the Q15 LMS filter structure
-  @param[in]     pSrc      points to the block of input data
-  @param[in]     pRef      points to the block of reference data
-  @param[out]    pOut      points to the block of output data
-  @param[out]    pErr      points to the block of error data
-  @param[in]     blockSize number of samples to process
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
-                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
-                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
-  @par
-                   In this filter, filter coefficients are updated for each sample and
-                   the updation of filter cofficients are saturted.
- */
-
-void arm_lms_q15(
-  const arm_lms_instance_q15 * S,
-  const q15_t * pSrc,
-        q15_t * pRef,
-        q15_t * pOut,
-        q15_t * pErr,
-        uint32_t blockSize)
-{
-        q15_t *pState = S->pState;                     /* State pointer */
-        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-        q15_t mu = S->mu;                              /* Adaptive factor */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-        q63_t acc;                                     /* Accumulator */
-        q15_t e = 0;                                   /* Error of data sample */
-        q15_t alpha;                                   /* Intermediate constant for taps update */
-        q31_t coef;                                    /* Temporary variable for coefficient */
-        q31_t acc_l, acc_h;                            /* Temporary input */
-        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
-        int32_t uShift = (32 - lShift);
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
-      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
-      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    /* Apply shift for lower part of acc and upper part of acc */
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Converting the result to 1.15 format and saturate the output */
-    acc = __SSAT(acc, 16U);
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q15_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q15_t) acc;
-    *pErr++ = (q15_t) e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
-      *pb++ = (q15_t) __SSAT((coef), 16);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
-    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of samples */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of LMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_q15.c
+ * Description:  Processing function for Q15 LMS filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 LMS filter.
+  @param[in]     S         points to an instance of the Q15 LMS filter structure
+  @param[in]     pSrc      points to the block of input data
+  @param[in]     pRef      points to the block of reference data
+  @param[out]    pOut      points to the block of output data
+  @param[out]    pErr      points to the block of error data
+  @param[in]     blockSize number of samples to process
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   Both coefficients and state variables are represented in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   There is no risk of internal overflow with this approach and the full precision of intermediate multiplications is preserved.
+                   After all additions have been performed, the accumulator is truncated to 34.15 format by discarding low 15 bits.
+                   Lastly, the accumulator is saturated to yield a result in 1.15 format.
+  @par
+                   In this filter, filter coefficients are updated for each sample and
+                   the updation of filter cofficients are saturted.
+ */
+
+void arm_lms_q15(
+  const arm_lms_instance_q15 * S,
+  const q15_t * pSrc,
+        q15_t * pRef,
+        q15_t * pOut,
+        q15_t * pErr,
+        uint32_t blockSize)
+{
+        q15_t *pState = S->pState;                     /* State pointer */
+        q15_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q15_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q15_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q15_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q15_t e = 0;                                   /* Error of data sample */
+        q15_t alpha;                                   /* Intermediate constant for taps update */
+        q31_t coef;                                    /* Temporary variable for coefficient */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        int32_t lShift = (15 - (int32_t) S->postShift);       /*  Post shift  */
+        int32_t uShift = (32 - lShift);
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] + b[N-1] * x[n-N-1] */
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+      acc = __SMLALD(read_q15x2_ia (&px), read_q15x2_ia (&pb), acc);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += (q63_t) (((q31_t) (*px++) * (*pb++)));
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    /* Apply shift for lower part of acc and upper part of acc */
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Converting the result to 1.15 format and saturate the output */
+    acc = __SSAT(acc, 16U);
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q15_t) acc;
+
+    /* Compute and store error */
+    e = *pRef++ - (q15_t) acc;
+    *pErr++ = (q15_t) e;
+
+    /* Compute alpha i.e. intermediate constant for taps update */
+    alpha = (q15_t) (((q31_t) e * (mu)) >> 15);
+
+    /* Initialize pState pointer */
+    /* Advance state pointer by 1 for the next sample */
+    px = pState++;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) *pb + (((q31_t) alpha * (*px++)) >> 15);
+      *pb++ = (q15_t) __SSAT((coef), 16);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+    write_q15x2_ia (&pStateCurnt, read_q15x2_ia (&pState));
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
index b9f7a73d..1ed61f27 100644
--- a/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
+++ b/Libraries/CMSIS/DSP/Source/FilteringFunctions/arm_lms_q31.c
@@ -1,283 +1,283 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_lms_q31.c
- * Description:  Processing function for the Q31 LMS filter
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupFilters
- */
-
-/**
-  @addtogroup LMS
-  @{
- */
-
-/**
-  @brief         Processing function for Q31 LMS filter.
-  @param[in]     S         points to an instance of the Q31 LMS filter structure.
-  @param[in]     pSrc      points to the block of input data.
-  @param[in]     pRef      points to the block of reference data.
-  @param[out]    pOut      points to the block of output data.
-  @param[out]    pErr      points to the block of error data.
-  @param[in]     blockSize number of samples to process.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate
-                   multiplication results but provides only a single guard bit.
-                   Thus, if the accumulator result overflows it wraps around rather than clips.
-                   In order to avoid overflows completely the input signal must be scaled down by
-                   log2(numTaps) bits.
-                   The reference signal should not be scaled down.
-                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
-                   and saturated to 1.31 format to yield the final result.
-                   The output signal and error signal are in 1.31 format.
- @par
-                   In this filter, filter coefficients are updated for each sample and
-                   the updation of filter cofficients are saturted.
- */
-
-void arm_lms_q31(
-  const arm_lms_instance_q31 * S,
-  const q31_t * pSrc,
-        q31_t * pRef,
-        q31_t * pOut,
-        q31_t * pErr,
-        uint32_t blockSize)
-{       
-        q31_t *pState = S->pState;                     /* State pointer */
-        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
-        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
-        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
-        q31_t mu = S->mu;                              /* Adaptive factor */
-        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
-        uint32_t tapCnt, blkCnt;                       /* Loop counters */
-        q63_t acc;                                     /* Accumulator */
-        q31_t e = 0;                                   /* Error of data sample */
-        q31_t alpha;                                   /* Intermediate constant for taps update */
-        q31_t coef;                                    /* Temporary variable for coef */
-        q31_t acc_l, acc_h;                            /* Temporary input */
-        uint32_t uShift = ((uint32_t) S->postShift + 1U);
-        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
-
-  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
-  /* pStateCurnt points to the location where the new input data should be written */
-  pStateCurnt = &(S->pState[(numTaps - 1U)]);
-
-  /* initialise loop count */
-  blkCnt = blockSize;
-
-  while (blkCnt > 0U)
-  {
-    /* Copy the new input sample into the state buffer */
-    *pStateCurnt++ = *pSrc++;
-
-    /* Initialize pState pointer */
-    px = pState;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-    /* Set the accumulator to zero */
-    acc = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      /* acc +=  b[N] * x[n-N] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-1] * x[n-N-1] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-2] * x[n-N-2] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* acc +=  b[N-3] * x[n-N-3] */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      acc += ((q63_t) (*px++)) * (*pb++);
-
-      /* Decrement the loop counter */
-      tapCnt--;
-    }
-
-    /* Converting the result to 1.31 format */
-    /* Calc lower part of acc */
-    acc_l = acc & 0xffffffff;
-
-    /* Calc upper part of acc */
-    acc_h = (acc >> 32) & 0xffffffff;
-
-    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
-
-    /* Store the result from accumulator into the destination buffer. */
-    *pOut++ = (q31_t) acc;
-
-    /* Compute and store error */
-    e = *pRef++ - (q31_t) acc;
-    *pErr++ = e;
-
-    /* Compute alpha i.e. intermediate constant for taps update */
-    alpha = (q31_t) (((q63_t) e * mu) >> 31);
-
-    /* Initialize pState pointer */
-    /* Advance state pointer by 1 for the next sample */
-    px = pState++;
-
-    /* Initialize coefficient pointer */
-    pb = pCoeffs;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 taps at a time. */
-    tapCnt = numTaps >> 2U;
-
-    /* Update filter coefficients */
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-
-      /* coef is in 2.30 format */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      /* get coef in 1.31 format by left shifting */
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      /* update coefficient buffer to next coefficient */
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining taps */
-    tapCnt = numTaps % 0x4U;
-
-#else
-
-    /* Initialize tapCnt with number of samples */
-    tapCnt = numTaps;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (tapCnt > 0U)
-    {
-      /* Perform the multiply-accumulate */
-      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
-      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
-      pb++;
-
-      /* Decrement loop counter */
-      tapCnt--;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Processing is complete.
-     Now copy the last numTaps - 1 samples to the start of the state buffer.
-     This prepares the state buffer for the next function call. */
-
-  /* Points to the start of the pState buffer */
-  pStateCurnt = S->pState;
-
-  /* copy data */
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 taps at a time. */
-  tapCnt = (numTaps - 1U) >> 2U;
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining taps */
-  tapCnt = (numTaps - 1U) % 0x4U;
-
-#else
-
-  /* Initialize tapCnt with number of samples */
-  tapCnt = (numTaps - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (tapCnt > 0U)
-  {
-    *pStateCurnt++ = *pState++;
-
-    /* Decrement loop counter */
-    tapCnt--;
-  }
-
-}
-
-/**
-  @} end of LMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_lms_q31.c
+ * Description:  Processing function for the Q31 LMS filter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/filtering_functions.h"
+
+/**
+  @ingroup groupFilters
+ */
+
+/**
+  @addtogroup LMS
+  @{
+ */
+
+/**
+  @brief         Processing function for Q31 LMS filter.
+  @param[in]     S         points to an instance of the Q31 LMS filter structure.
+  @param[in]     pSrc      points to the block of input data.
+  @param[in]     pRef      points to the block of reference data.
+  @param[out]    pOut      points to the block of output data.
+  @param[out]    pErr      points to the block of error data.
+  @param[in]     blockSize number of samples to process.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit.
+                   Thus, if the accumulator result overflows it wraps around rather than clips.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(numTaps) bits.
+                   The reference signal should not be scaled down.
+                   After all multiply-accumulates are performed, the 2.62 accumulator is shifted
+                   and saturated to 1.31 format to yield the final result.
+                   The output signal and error signal are in 1.31 format.
+ @par
+                   In this filter, filter coefficients are updated for each sample and
+                   the updation of filter cofficients are saturted.
+ */
+
+void arm_lms_q31(
+  const arm_lms_instance_q31 * S,
+  const q31_t * pSrc,
+        q31_t * pRef,
+        q31_t * pOut,
+        q31_t * pErr,
+        uint32_t blockSize)
+{       
+        q31_t *pState = S->pState;                     /* State pointer */
+        q31_t *pCoeffs = S->pCoeffs;                   /* Coefficient pointer */
+        q31_t *pStateCurnt;                            /* Points to the current sample of the state */
+        q31_t *px, *pb;                                /* Temporary pointers for state and coefficient buffers */
+        q31_t mu = S->mu;                              /* Adaptive factor */
+        uint32_t numTaps = S->numTaps;                 /* Number of filter coefficients in the filter */
+        uint32_t tapCnt, blkCnt;                       /* Loop counters */
+        q63_t acc;                                     /* Accumulator */
+        q31_t e = 0;                                   /* Error of data sample */
+        q31_t alpha;                                   /* Intermediate constant for taps update */
+        q31_t coef;                                    /* Temporary variable for coef */
+        q31_t acc_l, acc_h;                            /* Temporary input */
+        uint32_t uShift = ((uint32_t) S->postShift + 1U);
+        uint32_t lShift = 32U - uShift;                /*  Shift to be applied to the output */
+
+  /* S->pState points to buffer which contains previous frame (numTaps - 1) samples */
+  /* pStateCurnt points to the location where the new input data should be written */
+  pStateCurnt = &(S->pState[(numTaps - 1U)]);
+
+  /* initialise loop count */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* Copy the new input sample into the state buffer */
+    *pStateCurnt++ = *pSrc++;
+
+    /* Initialize pState pointer */
+    px = pState;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+    /* Set the accumulator to zero */
+    acc = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      /* acc +=  b[N] * x[n-N] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-1] * x[n-N-1] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-2] * x[n-N-2] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* acc +=  b[N-3] * x[n-N-3] */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      acc += ((q63_t) (*px++)) * (*pb++);
+
+      /* Decrement the loop counter */
+      tapCnt--;
+    }
+
+    /* Converting the result to 1.31 format */
+    /* Calc lower part of acc */
+    acc_l = acc & 0xffffffff;
+
+    /* Calc upper part of acc */
+    acc_h = (acc >> 32) & 0xffffffff;
+
+    acc = (uint32_t) acc_l >> lShift | acc_h << uShift;
+
+    /* Store the result from accumulator into the destination buffer. */
+    *pOut++ = (q31_t) acc;
+
+    /* Compute and store error */
+    e = *pRef++ - (q31_t) acc;
+    *pErr++ = e;
+
+    /* Compute alpha i.e. intermediate constant for taps update */
+    alpha = (q31_t) (((q63_t) e * mu) >> 31);
+
+    /* Initialize pState pointer */
+    /* Advance state pointer by 1 for the next sample */
+    px = pState++;
+
+    /* Initialize coefficient pointer */
+    pb = pCoeffs;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 taps at a time. */
+    tapCnt = numTaps >> 2U;
+
+    /* Update filter coefficients */
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+
+      /* coef is in 2.30 format */
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      /* get coef in 1.31 format by left shifting */
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      /* update coefficient buffer to next coefficient */
+      pb++;
+
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining taps */
+    tapCnt = numTaps % 0x4U;
+
+#else
+
+    /* Initialize tapCnt with number of samples */
+    tapCnt = numTaps;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (tapCnt > 0U)
+    {
+      /* Perform the multiply-accumulate */
+      coef = (q31_t) (((q63_t) alpha * (*px++)) >> (32));
+      *pb = clip_q63_to_q31((q63_t) * pb + (coef << 1U));
+      pb++;
+
+      /* Decrement loop counter */
+      tapCnt--;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Processing is complete.
+     Now copy the last numTaps - 1 samples to the start of the state buffer.
+     This prepares the state buffer for the next function call. */
+
+  /* Points to the start of the pState buffer */
+  pStateCurnt = S->pState;
+
+  /* copy data */
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 taps at a time. */
+  tapCnt = (numTaps - 1U) >> 2U;
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining taps */
+  tapCnt = (numTaps - 1U) % 0x4U;
+
+#else
+
+  /* Initialize tapCnt with number of samples */
+  tapCnt = (numTaps - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (tapCnt > 0U)
+  {
+    *pStateCurnt++ = *pState++;
+
+    /* Decrement loop counter */
+    tapCnt--;
+  }
+
+}
+
+/**
+  @} end of LMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c
new file mode 100755
index 00000000..8462395e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctions.c
@@ -0,0 +1,41 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        InterpolationFunctions.c
+ * Description:  Combination of all interpolation function source files.
+ *
+ * $Date:        22. July 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_bilinear_interp_f32.c"
+#include "arm_bilinear_interp_q15.c"
+#include "arm_bilinear_interp_q31.c"
+#include "arm_bilinear_interp_q7.c"
+#include "arm_linear_interp_f32.c"
+#include "arm_linear_interp_q15.c"
+#include "arm_linear_interp_q31.c"
+#include "arm_linear_interp_q7.c"
+#include "arm_spline_interp_f32.c"
+#include "arm_spline_interp_init_f32.c"
+
+
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c
new file mode 100755
index 00000000..d778de9d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/InterpolationFunctionsF16.c
@@ -0,0 +1,33 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        InterpolationFunctions.c
+ * Description:  Combination of all interpolation function source files.
+ *
+ * $Date:        22. July 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_bilinear_interp_f16.c"
+#include "arm_linear_interp_f16.c"
+
+
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f16.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f16.c
new file mode 100755
index 00000000..799ed78c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f16.c
@@ -0,0 +1,168 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bilinear_interp_f16.c
+ * Description:  Floating-point bilinear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+   * @defgroup BilinearInterpolate Bilinear Interpolation
+   *
+   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
+   * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
+   * determines values between the grid points.
+   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
+   * Bilinear interpolation is often used in image processing to rescale images.
+   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
+   *
+   * <b>Algorithm</b>
+   * \par
+   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
+   * For floating-point, the instance structure is defined as:
+   * <pre>
+   *   typedef struct
+   *   {
+   *     uint16_t numRows;
+   *     uint16_t numCols;
+   *     float16_t *pData;
+   * } arm_bilinear_interp_instance_f16;
+   * </pre>
+   *
+   * \par
+   * where <code>numRows</code> specifies the number of rows in the table;
+   * <code>numCols</code> specifies the number of columns in the table;
+   * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
+   * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
+   * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
+   *
+   * \par
+   * Let <code>(x, y)</code> specify the desired interpolation point.  Then define:
+   * <pre>
+   *     XF = floor(x)
+   *     YF = floor(y)
+   * </pre>
+   * \par
+   * The interpolated output point is computed as:
+   * <pre>
+   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
+   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
+   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
+   * </pre>
+   * Note that the coordinates (x, y) contain integer and fractional components.
+   * The integer components specify which portion of the table to use while the
+   * fractional components control the interpolation processor.
+   *
+   * \par
+   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
+   */
+
+
+  /**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+
+  /**
+  * @brief  Floating-point bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate.
+  * @param[in]     Y  interpolation coordinate.
+  * @return out interpolated value.
+  */
+  float16_t arm_bilinear_interp_f16(
+  const arm_bilinear_interp_instance_f16 * S,
+  float16_t X,
+  float16_t Y)
+  {
+    float16_t out;
+    float16_t f00, f01, f10, f11;
+    float16_t *pData = S->pData;
+    int32_t xIndex, yIndex, index;
+    float16_t xdiff, ydiff;
+    float16_t b1, b2, b3, b4;
+
+    xIndex = (int32_t) X;
+    yIndex = (int32_t) Y;
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (xIndex < 0 || xIndex > (S->numCols - 2) || yIndex < 0 || yIndex > (S->numRows - 2))
+    {
+      return (0);
+    }
+
+    /* Calculation of index for two nearest points in X-direction */
+    index = (xIndex ) + (yIndex ) * S->numCols;
+
+
+    /* Read two nearest points in X-direction */
+    f00 = pData[index];
+    f01 = pData[index + 1];
+
+    /* Calculation of index for two nearest points in Y-direction */
+    index = (xIndex ) + (yIndex+1) * S->numCols;
+
+
+    /* Read two nearest points in Y-direction */
+    f10 = pData[index];
+    f11 = pData[index + 1];
+
+    /* Calculation of intermediate values */
+    b1 = f00;
+    b2 = (_Float16)f01 - (_Float16)f00;
+    b3 = (_Float16)f10 - (_Float16)f00;
+    b4 = (_Float16)f00 - (_Float16)f01 - (_Float16)f10 + (_Float16)f11;
+
+    /* Calculation of fractional part in X */
+    xdiff = (_Float16)X - (_Float16)xIndex;
+
+    /* Calculation of fractional part in Y */
+    ydiff = (_Float16)Y - (_Float16)yIndex;
+
+    /* Calculation of bi-linear interpolated output */
+    out = (_Float16)b1 + (_Float16)b2 * (_Float16)xdiff + 
+    (_Float16)b3 * (_Float16)ydiff + (_Float16)b4 * (_Float16)xdiff * (_Float16)ydiff;
+
+    /* return to application */
+    return (out);
+  }
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f32.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f32.c
new file mode 100755
index 00000000..fc001d72
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_f32.c
@@ -0,0 +1,161 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bilinear_interp_f32.c
+ * Description:  Floating-point bilinear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+   * @defgroup BilinearInterpolate Bilinear Interpolation
+   *
+   * Bilinear interpolation is an extension of linear interpolation applied to a two dimensional grid.
+   * The underlying function <code>f(x, y)</code> is sampled on a regular grid and the interpolation process
+   * determines values between the grid points.
+   * Bilinear interpolation is equivalent to two step linear interpolation, first in the x-dimension and then in the y-dimension.
+   * Bilinear interpolation is often used in image processing to rescale images.
+   * The CMSIS DSP library provides bilinear interpolation functions for Q7, Q15, Q31, and floating-point data types.
+   *
+   * <b>Algorithm</b>
+   * \par
+   * The instance structure used by the bilinear interpolation functions describes a two dimensional data table.
+   * For floating-point, the instance structure is defined as:
+   * <pre>
+   *   typedef struct
+   *   {
+   *     uint16_t numRows;
+   *     uint16_t numCols;
+   *     float32_t *pData;
+   * } arm_bilinear_interp_instance_f32;
+   * </pre>
+   *
+   * \par
+   * where <code>numRows</code> specifies the number of rows in the table;
+   * <code>numCols</code> specifies the number of columns in the table;
+   * and <code>pData</code> points to an array of size <code>numRows*numCols</code> values.
+   * The data table <code>pTable</code> is organized in row order and the supplied data values fall on integer indexes.
+   * That is, table element (x,y) is located at <code>pTable[x + y*numCols]</code> where x and y are integers.
+   *
+   * \par
+   * Let <code>(x, y)</code> specify the desired interpolation point.  Then define:
+   * <pre>
+   *     XF = floor(x)
+   *     YF = floor(y)
+   * </pre>
+   * \par
+   * The interpolated output point is computed as:
+   * <pre>
+   *  f(x, y) = f(XF, YF) * (1-(x-XF)) * (1-(y-YF))
+   *           + f(XF+1, YF) * (x-XF)*(1-(y-YF))
+   *           + f(XF, YF+1) * (1-(x-XF))*(y-YF)
+   *           + f(XF+1, YF+1) * (x-XF)*(y-YF)
+   * </pre>
+   * Note that the coordinates (x, y) contain integer and fractional components.
+   * The integer components specify which portion of the table to use while the
+   * fractional components control the interpolation processor.
+   *
+   * \par
+   * if (x,y) are outside of the table boundary, Bilinear interpolation returns zero output.
+   */
+
+
+  /**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+
+  /**
+  * @brief  Floating-point bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate.
+  * @param[in]     Y  interpolation coordinate.
+  * @return out interpolated value.
+  */
+  float32_t arm_bilinear_interp_f32(
+  const arm_bilinear_interp_instance_f32 * S,
+  float32_t X,
+  float32_t Y)
+  {
+    float32_t out;
+    float32_t f00, f01, f10, f11;
+    float32_t *pData = S->pData;
+    int32_t xIndex, yIndex, index;
+    float32_t xdiff, ydiff;
+    float32_t b1, b2, b3, b4;
+
+    xIndex = (int32_t) X;
+    yIndex = (int32_t) Y;
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (xIndex < 0 || xIndex > (S->numCols - 2) || yIndex < 0 || yIndex > (S->numRows - 2))
+    {
+      return (0);
+    }
+
+    /* Calculation of index for two nearest points in X-direction */
+    index = (xIndex ) + (yIndex ) * S->numCols;
+
+
+    /* Read two nearest points in X-direction */
+    f00 = pData[index];
+    f01 = pData[index + 1];
+
+    /* Calculation of index for two nearest points in Y-direction */
+    index = (xIndex ) + (yIndex+1) * S->numCols;
+
+
+    /* Read two nearest points in Y-direction */
+    f10 = pData[index];
+    f11 = pData[index + 1];
+
+    /* Calculation of intermediate values */
+    b1 = f00;
+    b2 = f01 - f00;
+    b3 = f10 - f00;
+    b4 = f00 - f01 - f10 + f11;
+
+    /* Calculation of fractional part in X */
+    xdiff = X - xIndex;
+
+    /* Calculation of fractional part in Y */
+    ydiff = Y - yIndex;
+
+    /* Calculation of bi-linear interpolated output */
+    out = b1 + b2 * xdiff + b3 * ydiff + b4 * xdiff * ydiff;
+
+    /* return to application */
+    return (out);
+  }
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q15.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q15.c
new file mode 100755
index 00000000..67267366
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q15.c
@@ -0,0 +1,121 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_q15.c
+ * Description:  Q15 linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+  /**
+  * @brief  Q15 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  q15_t arm_bilinear_interp_q15(
+  arm_bilinear_interp_instance_q15 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q63_t acc = 0;                               /* output */
+    q31_t out;                                   /* Temporary output */
+    q15_t x1, x2, y1, y2;                        /* Nearest output values */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    int32_t rI, cI;                              /* Row and column indices */
+    q15_t *pYData = S->pData;                    /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (rI < 0 || rI > (S->numCols - 2) || cI < 0 || cI > (S->numRows - 2))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* xfract should be in 12.20 format */
+    xfract = (X & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
+    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+    /* 20 bits for the fractional part */
+    /* yfract should be in 12.20 format */
+    yfract = (Y & 0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
+    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 13.51 format */
+
+    /* x1 is in 1.15(q15), xfract in 12.20 format and out is in 13.35 format */
+    /* convert 13.35 to 13.31 by right shifting  and out is in 1.31 */
+    out = (q31_t) (((q63_t) x1 * (0x0FFFFF - xfract)) >> 4U);
+    acc = ((q63_t) out * (0x0FFFFF - yfract));
+
+    /* x2 * (xfract) * (1-yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) x2 * (0x0FFFFF - yfract)) >> 4U);
+    acc += ((q63_t) out * (xfract));
+
+    /* y1 * (1 - xfract) * (yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) y1 * (0x0FFFFF - xfract)) >> 4U);
+    acc += ((q63_t) out * (yfract));
+
+    /* y2 * (xfract) * (yfract)  in 1.51 and adding to acc */
+    out = (q31_t) (((q63_t) y2 * (xfract)) >> 4U);
+    acc += ((q63_t) out * (yfract));
+
+    /* acc is in 13.51 format and down shift acc by 36 times */
+    /* Convert out to 1.15 format */
+    return ((q15_t)(acc >> 36));
+  }
+
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q31.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q31.c
new file mode 100755
index 00000000..cc8560ec
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q31.c
@@ -0,0 +1,119 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_q31.c
+ * Description:  Q31 linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+
+/**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+ /**
+  * @brief  Q31 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  q31_t arm_bilinear_interp_q31(
+  arm_bilinear_interp_instance_q31 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q31_t out;                                   /* Temporary output */
+    q31_t acc = 0;                               /* output */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    q31_t x1, x2, y1, y2;                        /* Nearest output values */
+    int32_t rI, cI;                              /* Row and column indices */
+    q31_t *pYData = S->pData;                    /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (rI < 0 || rI > (S->numCols - 2) || cI < 0 || cI > (S->numRows - 2))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* shift left xfract by 11 to keep 1.31 format */
+    xfract = (X & 0x000FFFFF) << 11U;
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[(rI) + (int32_t)nCols * (cI)    ];
+    x2 = pYData[(rI) + (int32_t)nCols * (cI) + 1];
+
+    /* 20 bits for the fractional part */
+    /* shift left yfract by 11 to keep 1.31 format */
+    yfract = (Y & 0x000FFFFF) << 11U;
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[(rI) + (int32_t)nCols * (cI + 1)    ];
+    y2 = pYData[(rI) + (int32_t)nCols * (cI + 1) + 1];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 3.29(q29) format */
+    out = ((q31_t) (((q63_t) x1  * (0x7FFFFFFF - xfract)) >> 32));
+    acc = ((q31_t) (((q63_t) out * (0x7FFFFFFF - yfract)) >> 32));
+
+    /* x2 * (xfract) * (1-yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) x2 * (0x7FFFFFFF - yfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (xfract) >> 32));
+
+    /* y1 * (1 - xfract) * (yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) y1 * (0x7FFFFFFF - xfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+    /* y2 * (xfract) * (yfract)  in 3.29(q29) and adding to acc */
+    out = ((q31_t) ((q63_t) y2 * (xfract) >> 32));
+    acc += ((q31_t) ((q63_t) out * (yfract) >> 32));
+
+    /* Convert acc to 1.31(q31) format */
+    return ((q31_t)(acc << 2));
+  }
+
+
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q7.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q7.c
new file mode 100755
index 00000000..204342e3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_bilinear_interp_q7.c
@@ -0,0 +1,117 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_q7.c
+ * Description:  Q7 linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+
+/**
+   * @addtogroup BilinearInterpolate
+   * @{
+   */
+
+/**
+  * @brief  Q7 bilinear interpolation.
+  * @param[in,out] S  points to an instance of the interpolation structure.
+  * @param[in]     X  interpolation coordinate in 12.20 format.
+  * @param[in]     Y  interpolation coordinate in 12.20 format.
+  * @return out interpolated value.
+  */
+  q7_t arm_bilinear_interp_q7(
+  arm_bilinear_interp_instance_q7 * S,
+  q31_t X,
+  q31_t Y)
+  {
+    q63_t acc = 0;                               /* output */
+    q31_t out;                                   /* Temporary output */
+    q31_t xfract, yfract;                        /* X, Y fractional parts */
+    q7_t x1, x2, y1, y2;                         /* Nearest output values */
+    int32_t rI, cI;                              /* Row and column indices */
+    q7_t *pYData = S->pData;                     /* pointer to output table values */
+    uint32_t nCols = S->numCols;                 /* num of rows */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    rI = ((X & (q31_t)0xFFF00000) >> 20);
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    cI = ((Y & (q31_t)0xFFF00000) >> 20);
+
+    /* Care taken for table outside boundary */
+    /* Returns zero output when values are outside table boundary */
+    if (rI < 0 || rI > (S->numCols - 2) || cI < 0 || cI > (S->numRows - 2))
+    {
+      return (0);
+    }
+
+    /* 20 bits for the fractional part */
+    /* xfract should be in 12.20 format */
+    xfract = (X & (q31_t)0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    x1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI)    ];
+    x2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI) + 1];
+
+    /* 20 bits for the fractional part */
+    /* yfract should be in 12.20 format */
+    yfract = (Y & (q31_t)0x000FFFFF);
+
+    /* Read two nearest output values from the index */
+    y1 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1)    ];
+    y2 = pYData[((uint32_t)rI) + nCols * ((uint32_t)cI + 1) + 1];
+
+    /* Calculation of x1 * (1-xfract ) * (1-yfract) and acc is in 16.47 format */
+    out = ((x1 * (0xFFFFF - xfract)));
+    acc = (((q63_t) out * (0xFFFFF - yfract)));
+
+    /* x2 * (xfract) * (1-yfract)  in 2.22 and adding to acc */
+    out = ((x2 * (0xFFFFF - yfract)));
+    acc += (((q63_t) out * (xfract)));
+
+    /* y1 * (1 - xfract) * (yfract)  in 2.22 and adding to acc */
+    out = ((y1 * (0xFFFFF - xfract)));
+    acc += (((q63_t) out * (yfract)));
+
+    /* y2 * (xfract) * (yfract)  in 2.22 and adding to acc */
+    out = ((y2 * (yfract)));
+    acc += (((q63_t) out * (xfract)));
+
+    /* acc in 16.47 format and down shift by 40 to convert to 1.7 format */
+    return ((q7_t)(acc >> 40));
+  }
+
+  /**
+   * @} end of BilinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f16.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f16.c
new file mode 100755
index 00000000..f4ae1e1e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f16.c
@@ -0,0 +1,132 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_f16.c
+ * Description:  Floating-point linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+   * @defgroup LinearInterpolate Linear Interpolation
+   *
+   * Linear interpolation is a method of curve fitting using linear polynomials.
+   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
+   *
+   * \par
+   * \image html LinearInterp.gif "Linear interpolation"
+   *
+   * \par
+   * A  Linear Interpolate function calculates an output value(y), for the input(x)
+   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
+   *
+   * \par Algorithm:
+   * <pre>
+   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+   *       where x0, x1 are nearest values of input x
+   *             y0, y1 are nearest values to output y
+   * </pre>
+   *
+   * \par
+   * This set of functions implements Linear interpolation process
+   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
+   * sample of data and each call to the function returns a single processed value.
+   * <code>S</code> points to an instance of the Linear Interpolate function data structure.
+   * <code>x</code> is the input sample value. The functions returns the output value.
+   *
+   * \par
+   * if x is outside of the table boundary, Linear interpolation returns first value of the table
+   * if x is below input range and returns last value of table if x is above range.
+   */
+
+/**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+  /**
+   * @brief  Process function for the floating-point Linear Interpolation Function.
+   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
+   * @param[in]     x  input sample to process
+   * @return y processed output sample.
+   *
+   */
+  float16_t arm_linear_interp_f16(
+  arm_linear_interp_instance_f16 * S,
+  float16_t x)
+  {
+    float16_t y;
+    float16_t x0, x1;                            /* Nearest input values */
+    float16_t y0, y1;                            /* Nearest output values */
+    float16_t xSpacing = S->xSpacing;            /* spacing between input values */
+    int32_t i;                                   /* Index variable */
+    float16_t *pYData = S->pYData;               /* pointer to output table */
+
+    /* Calculation of index */
+    i = (int32_t) (((_Float16)x - (_Float16)S->x1) / (_Float16)xSpacing);
+
+    if (i < 0)
+    {
+      /* Iniatilize output for below specified range as least output value of table */
+      y = pYData[0];
+    }
+    else if ((uint32_t)i >= (S->nValues - 1))
+    {
+      /* Iniatilize output for above specified range as last output value of table */
+      y = pYData[S->nValues - 1];
+    }
+    else
+    {
+      /* Calculation of nearest input values */
+      x0 = (_Float16)S->x1 +  (_Float16)i      * (_Float16)xSpacing;
+      x1 = (_Float16)S->x1 + (_Float16)(i + 1) * (_Float16)xSpacing;
+
+      /* Read of nearest output values */
+      y0 = pYData[i];
+      y1 = pYData[i + 1];
+
+      /* Calculation of output */
+      y = (_Float16)y0 + ((_Float16)x - (_Float16)x0) * 
+      (((_Float16)y1 - (_Float16)y0) / ((_Float16)x1 - (_Float16)x0));
+
+    }
+
+    /* returns output value */
+    return (y);
+  }
+
+  /**
+   * @} end of LinearInterpolate group
+   */
+
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f32.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f32.c
new file mode 100755
index 00000000..fc60bec4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_f32.c
@@ -0,0 +1,125 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_f32.c
+ * Description:  Floating-point linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+   * @defgroup LinearInterpolate Linear Interpolation
+   *
+   * Linear interpolation is a method of curve fitting using linear polynomials.
+   * Linear interpolation works by effectively drawing a straight line between two neighboring samples and returning the appropriate point along that line
+   *
+   * \par
+   * \image html LinearInterp.gif "Linear interpolation"
+   *
+   * \par
+   * A  Linear Interpolate function calculates an output value(y), for the input(x)
+   * using linear interpolation of the input values x0, x1( nearest input values) and the output values y0 and y1(nearest output values)
+   *
+   * \par Algorithm:
+   * <pre>
+   *       y = y0 + (x - x0) * ((y1 - y0)/(x1-x0))
+   *       where x0, x1 are nearest values of input x
+   *             y0, y1 are nearest values to output y
+   * </pre>
+   *
+   * \par
+   * This set of functions implements Linear interpolation process
+   * for Q7, Q15, Q31, and floating-point data types.  The functions operate on a single
+   * sample of data and each call to the function returns a single processed value.
+   * <code>S</code> points to an instance of the Linear Interpolate function data structure.
+   * <code>x</code> is the input sample value. The functions returns the output value.
+   *
+   * \par
+   * if x is outside of the table boundary, Linear interpolation returns first value of the table
+   * if x is below input range and returns last value of table if x is above range.
+   */
+
+/**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+  /**
+   * @brief  Process function for the floating-point Linear Interpolation Function.
+   * @param[in,out] S  is an instance of the floating-point Linear Interpolation structure
+   * @param[in]     x  input sample to process
+   * @return y processed output sample.
+   *
+   */
+  float32_t arm_linear_interp_f32(
+  arm_linear_interp_instance_f32 * S,
+  float32_t x)
+  {
+    float32_t y;
+    float32_t x0, x1;                            /* Nearest input values */
+    float32_t y0, y1;                            /* Nearest output values */
+    float32_t xSpacing = S->xSpacing;            /* spacing between input values */
+    int32_t i;                                   /* Index variable */
+    float32_t *pYData = S->pYData;               /* pointer to output table */
+
+    /* Calculation of index */
+    i = (int32_t) ((x - S->x1) / xSpacing);
+
+    if (i < 0)
+    {
+      /* Iniatilize output for below specified range as least output value of table */
+      y = pYData[0];
+    }
+    else if ((uint32_t)i >= (S->nValues - 1))
+    {
+      /* Iniatilize output for above specified range as last output value of table */
+      y = pYData[S->nValues - 1];
+    }
+    else
+    {
+      /* Calculation of nearest input values */
+      x0 = S->x1 +  i      * xSpacing;
+      x1 = S->x1 + (i + 1) * xSpacing;
+
+      /* Read of nearest output values */
+      y0 = pYData[i];
+      y1 = pYData[i + 1];
+
+      /* Calculation of output */
+      y = y0 + (x - x0) * ((y1 - y0) / (x1 - x0));
+
+    }
+
+    /* returns output value */
+    return (y);
+  }
+
+  /**
+   * @} end of LinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q15.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q15.c
new file mode 100755
index 00000000..e6339f30
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q15.c
@@ -0,0 +1,101 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_q15.c
+ * Description:  Q15 linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+  /**
+   *
+   * @brief  Process function for the Q15 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q15 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+  q15_t arm_linear_interp_q15(
+  const q15_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q63_t y;                                     /* output */
+    q15_t y0, y1;                                /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    int32_t index;                               /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    index = ((x & (int32_t)0xFFF00000) >> 20);
+
+    if (index >= (int32_t)(nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else if (index < 0)
+    {
+      return (pYData[0]);
+    }
+    else
+    {
+      /* 20 bits for the fractional part */
+      /* fract is in 12.20 format */
+      fract = (x & 0x000FFFFF);
+
+      /* Read two nearest output values from the index */
+      y0 = pYData[index];
+      y1 = pYData[index + 1];
+
+      /* Calculation of y0 * (1-fract) and y is in 13.35 format */
+      y = ((q63_t) y0 * (0xFFFFF - fract));
+
+      /* Calculation of (y0 * (1-fract) + y1 * fract) and y is in 13.35 format */
+      y += ((q63_t) y1 * (fract));
+
+      /* convert y to 1.15 format */
+      return (q15_t) (y >> 20);
+    }
+  }
+
+
+  /**
+   * @} end of LinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q31.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q31.c
new file mode 100755
index 00000000..f0c75604
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q31.c
@@ -0,0 +1,103 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_q31.c
+ * Description:  Q31 linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+
+/**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+  /**
+   *
+   * @brief  Process function for the Q31 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q31 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   *
+   */
+  q31_t arm_linear_interp_q31(
+  const q31_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q31_t y;                                     /* output */
+    q31_t y0, y1;                                /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    int32_t index;                               /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    index = ((x & (q31_t)0xFFF00000) >> 20);
+
+    if (index >= (int32_t)(nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else if (index < 0)
+    {
+      return (pYData[0]);
+    }
+    else
+    {
+      /* 20 bits for the fractional part */
+      /* shift left by 11 to keep fract in 1.31 format */
+      fract = (x & 0x000FFFFF) << 11;
+
+      /* Read two nearest output values from the index in 1.31(q31) format */
+      y0 = pYData[index];
+      y1 = pYData[index + 1];
+
+      /* Calculation of y0 * (1-fract) and y is in 2.30 format */
+      y = ((q31_t) ((q63_t) y0 * (0x7FFFFFFF - fract) >> 32));
+
+      /* Calculation of y0 * (1-fract) + y1 *fract and y is in 2.30 format */
+      y += ((q31_t) (((q63_t) y1 * fract) >> 32));
+
+      /* Convert y to 1.31 format */
+      return (y << 1U);
+    }
+  }
+
+
+
+  /**
+   * @} end of LinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q7.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q7.c
new file mode 100755
index 00000000..8d154325
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_linear_interp_q7.c
@@ -0,0 +1,99 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_linear_interp_q7.c
+ * Description:  Q7 linear interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+
+/**
+   * @addtogroup LinearInterpolate
+   * @{
+   */
+
+  /**
+   *
+   * @brief  Process function for the Q7 Linear Interpolation Function.
+   * @param[in] pYData   pointer to Q7 Linear Interpolation table
+   * @param[in] x        input sample to process
+   * @param[in] nValues  number of table values
+   * @return y processed output sample.
+   *
+   * \par
+   * Input sample <code>x</code> is in 12.20 format which contains 12 bits for table index and 20 bits for fractional part.
+   * This function can support maximum of table size 2^12.
+   */
+  q7_t arm_linear_interp_q7(
+  const q7_t * pYData,
+  q31_t x,
+  uint32_t nValues)
+  {
+    q31_t y;                                     /* output */
+    q7_t y0, y1;                                 /* Nearest output values */
+    q31_t fract;                                 /* fractional part */
+    uint32_t index;                              /* Index to read nearest output values */
+
+    /* Input is in 12.20 format */
+    /* 12 bits for the table index */
+    /* Index value calculation */
+    if (x < 0)
+    {
+      return (pYData[0]);
+    }
+    index = (x >> 20) & 0xfff;
+
+    if (index >= (nValues - 1))
+    {
+      return (pYData[nValues - 1]);
+    }
+    else
+    {
+      /* 20 bits for the fractional part */
+      /* fract is in 12.20 format */
+      fract = (x & 0x000FFFFF);
+
+      /* Read two nearest output values from the index and are in 1.7(q7) format */
+      y0 = pYData[index];
+      y1 = pYData[index + 1];
+
+      /* Calculation of y0 * (1-fract ) and y is in 13.27(q27) format */
+      y = ((y0 * (0xFFFFF - fract)));
+
+      /* Calculation of y1 * fract + y0 * (1-fract) and y is in 13.27(q27) format */
+      y += (y1 * fract);
+
+      /* convert y to 1.7(q7) format */
+      return (q7_t) (y >> 20);
+     }
+  }
+  /**
+   * @} end of LinearInterpolate group
+   */
+
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_f32.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_f32.c
new file mode 100644
index 00000000..3e3d0918
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_f32.c
@@ -0,0 +1,283 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_spline_interp_f32.c
+ * Description:  Floating-point cubic spline interpolation
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+  @defgroup SplineInterpolate Cubic Spline Interpolation
+ 
+  Spline interpolation is a method of interpolation where the interpolant
+  is a piecewise-defined polynomial called "spline". 
+ 
+  @par Introduction
+
+  Given a function f defined on the interval [a,b], a set of n nodes x(i) 
+  where a=x(1)<x(2)<...<x(n)=b and a set of n values y(i) = f(x(i)), 
+  a cubic spline interpolant S(x) is defined as: 
+
+  <pre>
+          S1(x)       x(1) < x < x(2)
+  S(x) =   ...         
+          Sn-1(x)   x(n-1) < x < x(n)
+  </pre>
+
+  where
+
+  <pre> 
+  Si(x) = a_i+b_i(x-xi)+c_i(x-xi)^2+d_i(x-xi)^3    i=1, ..., n-1
+  </pre>
+ 
+  @par Algorithm
+
+  Having defined h(i) = x(i+1) - x(i)
+
+  <pre>
+  h(i-1)c(i-1)+2[h(i-1)+h(i)]c(i)+h(i)c(i+1) = 3/h(i)*[a(i+1)-a(i)]-3/h(i-1)*[a(i)-a(i-1)]    i=2, ..., n-1
+  </pre>
+
+  It is possible to write the previous conditions in matrix form (Ax=B).
+  In order to solve the system two boundary conidtions are needed.
+  - Natural spline: S1''(x1)=2*c(1)=0 ; Sn''(xn)=2*c(n)=0
+  In matrix form:
+
+  <pre>
+  |  1        0         0  ...    0         0           0     ||  c(1)  | |                        0                        |
+  | h(0) 2[h(0)+h(1)] h(1) ...    0         0           0     ||  c(2)  | |      3/h(2)*[a(3)-a(2)]-3/h(1)*[a(2)-a(1)]      |
+  | ...      ...       ... ...   ...       ...         ...    ||  ...   |=|                       ...                       |
+  |  0        0         0  ... h(n-2) 2[h(n-2)+h(n-1)] h(n-1) || c(n-1) | | 3/h(n-1)*[a(n)-a(n-1)]-3/h(n-2)*[a(n-1)-a(n-2)] |
+  |  0        0         0  ...    0         0           1     ||  c(n)  | |                        0                        |
+  </pre>
+
+  - Parabolic runout spline: S1''(x1)=2*c(1)=S2''(x2)=2*c(2) ; Sn-1''(xn-1)=2*c(n-1)=Sn''(xn)=2*c(n)
+  In matrix form:
+
+  <pre>
+  |  1       -1         0  ...    0         0           0     ||  c(1)  | |                        0                        |
+  | h(0) 2[h(0)+h(1)] h(1) ...    0         0           0     ||  c(2)  | |      3/h(2)*[a(3)-a(2)]-3/h(1)*[a(2)-a(1)]      |
+  | ...      ...       ... ...   ...       ...         ...    ||  ...   |=|                       ...                       |
+  |  0        0         0  ... h(n-2) 2[h(n-2)+h(n-1)] h(n-1) || c(n-1) | | 3/h(n-1)*[a(n)-a(n-1)]-3/h(n-2)*[a(n-1)-a(n-2)] |
+  |  0        0         0  ...    0        -1           1     ||  c(n)  | |                        0                        |
+  </pre>
+
+  A is a tridiagonal matrix (a band matrix of bandwidth 3) of size N=n+1. The factorization
+  algorithms (A=LU) can be simplified considerably because a large number of zeros appear
+  in regular patterns. The Crout method has been used:
+  1) Solve LZ=B
+
+  <pre>
+  u(1,2) = A(1,2)/A(1,1)
+  z(1)   = B(1)/l(11)
+ 
+  FOR i=2, ..., N-1
+    l(i,i)   = A(i,i)-A(i,i-1)u(i-1,i)
+    u(i,i+1) = a(i,i+1)/l(i,i)
+    z(i)     = [B(i)-A(i,i-1)z(i-1)]/l(i,i)
+  
+  l(N,N) = A(N,N)-A(N,N-1)u(N-1,N)
+  z(N)   = [B(N)-A(N,N-1)z(N-1)]/l(N,N)
+  </pre>
+
+  2) Solve UX=Z
+
+  <pre>
+  c(N)=z(N)
+  
+  FOR i=N-1, ..., 1
+    c(i)=z(i)-u(i,i+1)c(i+1) 
+  </pre>
+
+  c(i) for i=1, ..., n-1 are needed to compute the n-1 polynomials. 
+  b(i) and d(i) are computed as:
+  - b(i) = [y(i+1)-y(i)]/h(i)-h(i)*[c(i+1)+2*c(i)]/3 
+  - d(i) = [c(i+1)-c(i)]/[3*h(i)] 
+  Moreover, a(i)=y(i).
+
+ @par Behaviour outside the given intervals
+
+  It is possible to compute the interpolated vector for x values outside the 
+  input range (xq<x(1); xq>x(n)). The coefficients used to compute the y values for
+  xq<x(1) are going to be the ones used for the first interval, while for xq>x(n) the 
+  coefficients used for the last interval.
+ 
+ */
+
+/**
+  @addtogroup SplineInterpolate
+  @{
+ */
+
+/**
+ * @brief Processing function for the floating-point cubic spline interpolation.
+ * @param[in]  S          points to an instance of the floating-point spline structure.
+ * @param[in]  xq         points to the x values of the interpolated data points.
+ * @param[out] pDst       points to the block of output data.
+ * @param[in]  blockSize  number of samples of output data.
+ */
+
+void arm_spline_f32(
+        arm_spline_instance_f32 * S, 
+  const float32_t * xq,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    const float32_t * x = S->x;
+    const float32_t * y = S->y;
+    int32_t n = S->n_x;
+
+    /* Coefficients (a==y for i<=n-1) */
+    float32_t * b = (S->coeffs);
+    float32_t * c = (S->coeffs)+(n-1);
+    float32_t * d = (S->coeffs)+(2*(n-1));    
+
+    const float32_t * pXq = xq;
+    int32_t blkCnt = (int32_t)blockSize;
+    int32_t blkCnt2;
+    int32_t i;
+    float32_t x_sc;
+
+#ifdef ARM_MATH_NEON
+    float32x4_t xiv;
+    float32x4_t aiv;
+    float32x4_t biv;
+    float32x4_t civ;
+    float32x4_t div;
+
+    float32x4_t xqv;
+
+    float32x4_t temp;
+    float32x4_t diff;
+    float32x4_t yv;
+#endif
+
+    /* Create output for x(i)<x<x(i+1) */
+    for (i=0; i<n-1; i++)
+    {
+#ifdef ARM_MATH_NEON
+        xiv = vdupq_n_f32(x[i]);
+
+        aiv = vdupq_n_f32(y[i]);
+        biv = vdupq_n_f32(b[i]);
+        civ = vdupq_n_f32(c[i]);
+        div = vdupq_n_f32(d[i]);
+
+        while( *(pXq+4) <= x[i+1] && blkCnt > 4 )
+        {
+            /* Load [xq(k) xq(k+1) xq(k+2) xq(k+3)] */
+            xqv = vld1q_f32(pXq);
+            pXq+=4;
+        
+            /* Compute [xq(k)-x(i) xq(k+1)-x(i) xq(k+2)-x(i) xq(k+3)-x(i)] */
+            diff = vsubq_f32(xqv, xiv);
+            temp = diff;
+        
+            /* y(i) = a(i) + ... */
+            yv = aiv;
+            /* ... + b(i)*(x-x(i)) + ... */
+            yv = vmlaq_f32(yv, biv, temp);
+            /* ... + c(i)*(x-x(i))^2 + ... */
+            temp = vmulq_f32(temp, diff);
+            yv = vmlaq_f32(yv, civ, temp);
+            /* ... + d(i)*(x-x(i))^3 */
+            temp = vmulq_f32(temp, diff);
+            yv = vmlaq_f32(yv, div, temp);
+        
+            /* Store [y(k) y(k+1) y(k+2) y(k+3)] */
+            vst1q_f32(pDst, yv);
+            pDst+=4;
+        
+            blkCnt-=4;
+        }
+#endif
+        while( *pXq <= x[i+1] && blkCnt > 0 )
+        {
+            x_sc = *pXq++;
+
+            *pDst = y[i]+b[i]*(x_sc-x[i])+c[i]*(x_sc-x[i])*(x_sc-x[i])+d[i]*(x_sc-x[i])*(x_sc-x[i])*(x_sc-x[i]);
+
+            pDst++;
+            blkCnt--;
+        }
+    }
+
+    /* Create output for remaining samples (x>=x(n)) */
+#ifdef ARM_MATH_NEON
+    /* Compute 4 outputs at a time */
+    blkCnt2 = blkCnt >> 2;
+
+    while(blkCnt2 > 0) 
+    { 
+        /* Load [xq(k) xq(k+1) xq(k+2) xq(k+3)] */ 
+        xqv = vld1q_f32(pXq);
+        pXq+=4;
+                                                         
+        /* Compute [xq(k)-x(i) xq(k+1)-x(i) xq(k+2)-x(i) xq(k+3)-x(i)] */
+        diff = vsubq_f32(xqv, xiv);
+        temp = diff; 
+
+        /* y(i) = a(i) + ... */ 
+        yv = aiv; 
+        /* ... + b(i)*(x-x(i)) + ... */ 
+        yv = vmlaq_f32(yv, biv, temp);
+        /* ... + c(i)*(x-x(i))^2 + ... */
+        temp = vmulq_f32(temp, diff);
+        yv = vmlaq_f32(yv, civ, temp);
+        /* ... + d(i)*(x-x(i))^3 */
+        temp = vmulq_f32(temp, diff);
+        yv = vmlaq_f32(yv, div, temp);
+
+        /* Store [y(k) y(k+1) y(k+2) y(k+3)] */
+        vst1q_f32(pDst, yv);
+        pDst+=4;
+
+        blkCnt2--;
+    } 
+
+    /* Tail */
+    blkCnt2 = blkCnt & 3;                                      
+#else                                                        
+    blkCnt2 = blkCnt;                                          
+#endif
+
+    while(blkCnt2 > 0)                                       
+    { 
+        x_sc = *pXq++; 
+  
+        *pDst = y[i-1]+b[i-1]*(x_sc-x[i-1])+c[i-1]*(x_sc-x[i-1])*(x_sc-x[i-1])+d[i-1]*(x_sc-x[i-1])*(x_sc-x[i-1])*(x_sc-x[i-1]);
+ 
+        pDst++; 
+        blkCnt2--;   
+    }   
+}
+
+/**
+  @} end of SplineInterpolate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_init_f32.c b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_init_f32.c
new file mode 100644
index 00000000..ae3f2da0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/InterpolationFunctions/arm_spline_interp_init_f32.c
@@ -0,0 +1,175 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_spline_interp_init_f32.c
+ * Description:  Floating-point cubic spline initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/interpolation_functions.h"
+
+/**
+  @ingroup groupInterpolation
+ */
+
+/**
+  @addtogroup SplineInterpolate
+  @{
+
+  @par Initialization function
+
+  The initialization function takes as input two arrays that the user has to allocate:
+  <code>coeffs</code> will contain the b, c, and d coefficients for the (n-1) intervals 
+  (n is the number of known points), hence its size must be 3*(n-1); <code>tempBuffer</code>
+  is temporally used for internal computations and its size is n+n-1.
+
+  @par
+
+  The x input array must be strictly sorted in ascending order and it must
+  not contain twice the same value (x(i)<x(i+1)).
+ 
+*/
+
+/**
+ * @brief Initialization function for the floating-point cubic spline interpolation.
+ * @param[in,out] S           points to an instance of the floating-point spline structure.
+ * @param[in]     type        type of cubic spline interpolation (boundary conditions)
+ * @param[in]     x           points to the x values of the known data points.
+ * @param[in]     y           points to the y values of the known data points.
+ * @param[in]     n           number of known data points.
+ * @param[in]     coeffs      coefficients array for b, c, and d
+ * @param[in]     tempBuffer  buffer array for internal computations
+ *
+ */
+
+void arm_spline_init_f32(
+        arm_spline_instance_f32 * S,
+        arm_spline_type type,
+  const float32_t * x,
+  const float32_t * y,
+        uint32_t n, 
+        float32_t * coeffs,
+        float32_t * tempBuffer)
+{
+    /*** COEFFICIENTS COMPUTATION ***/
+    /* Type (boundary conditions):
+        - Natural spline          ( S1''(x1) = 0 ; Sn''(xn) = 0 )
+        - Parabolic runout spline ( S1''(x1) = S2''(x2) ; Sn-1''(xn-1) = Sn''(xn) ) */
+    
+    /* (n-1)-long buffers for b, c, and d coefficients */
+    float32_t * b = coeffs;
+    float32_t * c = coeffs+(n-1);
+    float32_t * d = coeffs+(2*(n-1));    
+
+    float32_t * u = tempBuffer;   /* (n-1)-long scratch buffer for u elements */
+    float32_t * z = tempBuffer+(n-1); /* n-long scratch buffer for z elements */
+
+    float32_t hi, hm1; /* h(i) and h(i-1) */
+    float32_t Bi; /* B(i), i-th element of matrix B=LZ */
+    float32_t li; /* l(i), i-th element of matrix L    */
+    float32_t cp1; /* Temporary value for c(i+1) */
+
+    int32_t i; /* Loop counter */
+
+    S->x = x;
+    S->y = y;
+    S->n_x = n;
+
+    /* == Solve LZ=B to obtain z(i) and u(i) == */
+
+    /* -- Row 1 -- */
+    /* B(0) = 0, not computed */
+    /* u(1,2) = a(1,2)/a(1,1) = a(1,2) */
+    if(type == ARM_SPLINE_NATURAL)
+        u[0] = 0;  /* a(1,2) = 0 */
+    else if(type == ARM_SPLINE_PARABOLIC_RUNOUT)
+        u[0] = -1; /* a(1,2) = -1 */
+
+    z[0] = 0;  /* z(1) = B(1)/a(1,1) = 0 always */
+
+    /* -- Rows 2 to N-1 (N=n+1) -- */
+    hm1 = x[1] - x[0]; /* Initialize h(i-1) = h(1) = x(2)-x(1) */
+
+    for (i=1; i<(int32_t)n-1; i++)
+    {
+        /* Compute B(i) */
+        hi = x[i+1]-x[i];
+        Bi = 3*(y[i+1]-y[i])/hi - 3*(y[i]-y[i-1])/hm1;
+
+        /* l(i) = a(i)-a(i,i-1)*u(i-1) = 2[h(i-1)+h(i)]-h(i-1)*u(i-1) */
+        li = 2*(hi+hm1) - hm1*u[i-1];
+
+        /* u(i) = a(i,i+1)/l(i) = h(i)/l(i) */
+        u[i] = hi/li;
+
+        /* z(i) = [B(i)-h(i-1)*z(i-1)]/l(i) */
+        z[i] = (Bi-hm1*z[i-1])/li;
+
+        /* Update h(i-1) for next iteration */
+        hm1 = hi;
+    }
+
+    /* -- Row N -- */
+    /* l(N) = a(N,N)-a(N,N-1)u(N-1) */
+    /* z(N) = [-a(N,N-1)z(N-1)]/l(N) */
+    if(type == ARM_SPLINE_NATURAL)
+    {
+        /* li = 1;     a(N,N) = 1; a(N,N-1) = 0 */
+        z[n-1] = 0; /* a(N,N-1) = 0 */
+    }
+    else if(type == ARM_SPLINE_PARABOLIC_RUNOUT)
+    {
+        li = 1+u[n-2];      /* a(N,N) = 1; a(N,N-1) = -1 */
+        z[n-1] = z[n-2]/li; /* a(N,N-1) = -1 */
+    }
+
+    /* == Solve UX = Z to obtain c(i) and    */
+    /*    compute b(i) and d(i) from c(i) == */
+
+    cp1 = z[n-1]; /* Initialize c(i+1) = c(N) = z(N) */
+
+    for (i=n-2; i>=0; i--) 
+    {
+        /* c(i) = z(i)-u(i+1)c(i+1) */
+        c[i] = z[i]-u[i]*cp1;
+
+        hi = x[i+1]-x[i];
+        /* b(i) = [y(i+1)-y(i)]/h(i)-h(i)*[c(i+1)+2*c(i)]/3 */
+        b[i] = (y[i+1]-y[i])/hi-hi*(cp1+2*c[i])/3;
+
+        /* d(i) = [c(i+1)-c(i)]/[3*h(i)] */
+        d[i] = (cp1-c[i])/(3*hi);
+
+        /* Update c(i+1) for next iteration */
+        cp1 = c[i];
+    }
+
+    /* == Finally, store the coefficients in the instance == */
+
+    S->coeffs = coeffs;
+}
+
+/**
+  @} end of SplineInterpolate group
+ */
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
index 79d7be23..d4fa42c1 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctions.c
@@ -1,53 +1,74 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        MatrixFunctions.c
- * Description:  Combination of all matrix function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_mat_add_f32.c"
-#include "arm_mat_add_q15.c"
-#include "arm_mat_add_q31.c"
-#include "arm_mat_cmplx_mult_f32.c"
-#include "arm_mat_cmplx_mult_q15.c"
-#include "arm_mat_cmplx_mult_q31.c"
-#include "arm_mat_init_f32.c"
-#include "arm_mat_init_q15.c"
-#include "arm_mat_init_q31.c"
-#include "arm_mat_inverse_f32.c"
-#include "arm_mat_inverse_f64.c"
-#include "arm_mat_mult_f32.c"
-#include "arm_mat_mult_fast_q15.c"
-#include "arm_mat_mult_fast_q31.c"
-#include "arm_mat_mult_q15.c"
-#include "arm_mat_mult_q31.c"
-#include "arm_mat_scale_f32.c"
-#include "arm_mat_scale_q15.c"
-#include "arm_mat_scale_q31.c"
-#include "arm_mat_sub_f32.c"
-#include "arm_mat_sub_q15.c"
-#include "arm_mat_sub_q31.c"
-#include "arm_mat_trans_f32.c"
-#include "arm_mat_trans_q15.c"
-#include "arm_mat_trans_q31.c"
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        MatrixFunctions.c
+ * Description:  Combination of all matrix function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_mat_add_f32.c"
+#include "arm_mat_add_q15.c"
+#include "arm_mat_add_q31.c"
+#include "arm_mat_cmplx_mult_f32.c"
+#include "arm_mat_cmplx_mult_q15.c"
+#include "arm_mat_cmplx_mult_q31.c"
+#include "arm_mat_init_f32.c"
+#include "arm_mat_init_q15.c"
+#include "arm_mat_init_q31.c"
+#include "arm_mat_inverse_f32.c"
+#include "arm_mat_inverse_f64.c"
+#include "arm_mat_mult_f64.c"
+#include "arm_mat_mult_f32.c"
+#include "arm_mat_mult_fast_q15.c"
+#include "arm_mat_mult_fast_q31.c"
+#include "arm_mat_mult_q7.c"
+#include "arm_mat_mult_q15.c"
+#include "arm_mat_mult_q31.c"
+#include "arm_mat_mult_opt_q31.c"
+#include "arm_mat_scale_f32.c"
+#include "arm_mat_scale_q15.c"
+#include "arm_mat_scale_q31.c"
+#include "arm_mat_sub_f64.c"
+#include "arm_mat_sub_f32.c"
+#include "arm_mat_sub_q15.c"
+#include "arm_mat_sub_q31.c"
+#include "arm_mat_trans_f32.c"
+#include "arm_mat_trans_f64.c"
+#include "arm_mat_trans_q7.c"
+#include "arm_mat_trans_q15.c"
+#include "arm_mat_trans_q31.c"
+#include "arm_mat_vec_mult_f32.c"
+#include "arm_mat_vec_mult_q31.c"
+#include "arm_mat_vec_mult_q15.c"
+#include "arm_mat_vec_mult_q7.c"
+#include "arm_mat_cmplx_trans_f32.c"
+#include "arm_mat_cmplx_trans_q31.c"
+#include "arm_mat_cmplx_trans_q15.c"
+#include "arm_mat_cholesky_f64.c"
+#include "arm_mat_cholesky_f32.c"
+#include "arm_mat_solve_upper_triangular_f32.c"
+#include "arm_mat_solve_lower_triangular_f32.c"
+#include "arm_mat_solve_upper_triangular_f64.c"
+#include "arm_mat_solve_lower_triangular_f64.c"
+#include "arm_mat_ldlt_f32.c"
+#include "arm_mat_ldlt_f64.c"
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c
new file mode 100755
index 00000000..9d3a41fb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/MatrixFunctionsF16.c
@@ -0,0 +1,41 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        MatrixFunctions.c
+ * Description:  Combination of all matrix function f16 source files.
+ *
+ * $Date:        18. March 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_mat_add_f16.c"
+#include "arm_mat_sub_f16.c"
+#include "arm_mat_trans_f16.c"
+#include "arm_mat_scale_f16.c"
+#include "arm_mat_mult_f16.c"
+#include "arm_mat_vec_mult_f16.c"
+#include "arm_mat_cmplx_trans_f16.c"
+#include "arm_mat_cmplx_mult_f16.c"
+#include "arm_mat_inverse_f16.c"
+#include "arm_mat_init_f16.c"
+#include "arm_mat_cholesky_f16.c"
+#include "arm_mat_solve_upper_triangular_f16.c"
+#include "arm_mat_solve_lower_triangular_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f16.c
new file mode 100755
index 00000000..2db2c2a2
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f16.c
@@ -0,0 +1,217 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_add_f16.c
+ * Description:  Floating-point matrix addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixAdd
+  @{
+ */
+
+
+/**
+  @brief         Floating-point matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_add_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+  arm_matrix_instance_f16 * pDst)
+{
+    arm_status status;  
+    uint32_t  numSamples;       /* total number of elements in the matrix  */
+    float16_t *pDataA, *pDataB, *pDataDst;
+    f16x8_t vecA, vecB, vecDst;
+    float16_t const *pSrcAVec;
+    float16_t const *pSrcBVec;
+    uint32_t  blkCnt;           /* loop counters */
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (float16_t const *) pDataA;
+    pSrcBVec = (float16_t const *) pDataB;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif
+ {
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 3;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* Add and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 8;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 8;
+        vecDst = vaddq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  
+        pDataDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcAVec); 
+        vecB = vld1q(pSrcBVec); 
+        vecDst = vaddq_m(vecDst, vecA, vecB, p0);
+        vstrhq_p(pDataDst, vecDst, p0);
+    }
+    /* set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+  return (status);
+}
+#else
+
+arm_status arm_mat_add_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float16_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float16_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++;
+
+      *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++;
+
+      *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++;
+
+      *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = (_Float16)*pInA++ + (_Float16)*pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixAdd group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
index 7f9ec085..879c8f8f 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_f32.c
@@ -1,232 +1,304 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_add_f32.c
- * Description:  Floating-point matrix addition
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup MatrixAdd Matrix Addition
-
-  Adds two matrices.
-  \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
-
-  The functions check to make sure that
-  <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
-  number of rows and columns.
- */
-
-/**
-  @addtogroup MatrixAdd
-  @{
- */
-
-
-/**
-  @brief         Floating-point matrix addition.
-  @param[in]     pSrcA      points to first input matrix structure
-  @param[in]     pSrcB      points to second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
- */
-#if defined(ARM_MATH_NEON)
-/*
-
-Neon version is assuming the matrix is small enough.
-So no blocking is used for taking into account cache effects.
-For big matrix, there exist better libraries for Neon.
-
-*/
-arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif
-  {
-    float32x4_t vec1;
-    float32x4_t vec2;
-    float32x4_t res;
-
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-    blkCnt = numSamples >> 2U;
-
-    /* Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      vec1 = vld1q_f32(pIn1);
-      vec2 = vld1q_f32(pIn2);
-      res = vaddq_f32(vec1, vec2);
-      vst1q_f32(pOut, res);
-
-      /* update pointers to process next samples */
-      pIn1 += 4U;
-      pIn2 += 4U;
-      pOut += 4U;
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-      /* Add and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) + (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#else
-arm_status arm_mat_add_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-      (pSrcA->numCols != pSrcB->numCols) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcA->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-
-      /* Add and store result in destination buffer. */
-      *pOut++ = *pInA++ + *pInB++;
-
-      *pOut++ = *pInA++ + *pInB++;
-
-      *pOut++ = *pInA++ + *pInB++;
-
-      *pOut++ = *pInA++ + *pInB++;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-
-      /* Add and store result in destination buffer. */
-      *pOut++ = *pInA++ + *pInB++;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of MatrixAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_add_f32.c
+ * Description:  Floating-point matrix addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixAdd Matrix Addition
+
+  Adds two matrices.
+  \image html MatrixAddition.gif "Addition of two 3 x 3 matrices"
+
+  The functions check to make sure that
+  <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
+  number of rows and columns.
+ */
+
+/**
+  @addtogroup MatrixAdd
+  @{
+ */
+
+
+/**
+  @brief         Floating-point matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+    arm_status status;  
+    uint32_t  numSamples;       /* total number of elements in the matrix  */
+    float32_t *pDataA, *pDataB, *pDataDst;
+    f32x4_t vecA, vecB, vecDst;
+    float32_t const *pSrcAVec;
+    float32_t const *pSrcBVec;
+    uint32_t  blkCnt;           /* loop counters */
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (float32_t const *) pDataA;
+    pSrcBVec = (float32_t const *) pDataB;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif
+ {
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 2;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* Add and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 4;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 4;
+        vecDst = vaddq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  
+        pDataDst += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcAVec); 
+        vecB = vld1q(pSrcBVec); 
+        vecDst = vaddq_m(vecDst, vecA, vecB, p0);
+        vstrwq_p(pDataDst, vecDst, p0);
+    }
+    /* set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+  return (status);
+}
+#else
+#if defined(ARM_MATH_NEON)
+/*
+
+Neon version is assuming the matrix is small enough.
+So no blocking is used for taking into account cache effects.
+For big matrix, there exist better libraries for Neon.
+
+*/
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A  */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B  */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer   */
+
+
+  uint32_t numSamples;                           /* total number of elements in the matrix  */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif
+  {
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
+    /* Total number of samples in the input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+    blkCnt = numSamples >> 2U;
+
+    /* Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+      /* Add and then store the results in the destination buffer. */
+      vec1 = vld1q_f32(pIn1);
+      vec2 = vld1q_f32(pIn2);
+      res = vaddq_f32(vec1, vec2);
+      vst1q_f32(pOut, res);
+
+      /* update pointers to process next samples */
+      pIn1 += 4U;
+      pIn2 += 4U;
+      pOut += 4U;
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = numSamples % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+      /* Add and then store the results in the destination buffer. */
+      *pOut++ = (*pIn1++) + (*pIn2++);
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_add_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      *pOut++ = *pInA++ + *pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add and store result in destination buffer. */
+      *pOut++ = *pInA++ + *pInB++;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
index 1e892fb3..e27b72fa 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q15.c
@@ -1,149 +1,227 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_add_q15.c
- * Description:  Q15 matrix addition
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixAdd
-  @{
- */
-
-/**
-  @brief         Q15 matrix addition.
-  @param[in]     pSrcA      points to first input matrix structure
-  @param[in]     pSrcB      points to second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-arm_status arm_mat_add_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst)
-{
-        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-        
-        uint32_t numSamples;                           /* total number of elements in the matrix */
-        uint32_t blkCnt;                               /* loop counters */
-        arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-      (pSrcA->numCols != pSrcB->numCols) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcA->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-
-      /* Add, saturate and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
-
-      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
-#else
-      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
-
-      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
-
-      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
-
-      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-
-      /* Add, saturate and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
-#else
-      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_add_q15.c
+ * Description:  Q15 matrix addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixAdd
+  @{
+ */
+
+/**
+  @brief         Q15 matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_add_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst)
+{
+    uint32_t        numSamples;       /* total number of elements in the matrix  */
+    q15_t          *pDataA, *pDataB, *pDataDst;
+    q15x8_t       vecA, vecB, vecDst;
+    q15_t const   *pSrcAVec;
+    q15_t const   *pSrcBVec;
+    uint32_t        blkCnt;           /* loop counters */
+    arm_status status;                             /* status of matrix addition */
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (q15_t const *) pDataA;
+    pSrcBVec = (q15_t const *) pDataB;
+
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 3;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* Add and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); pSrcAVec += 8;
+        vecB = vld1q(pSrcBVec); pSrcBVec += 8;
+        vecDst = vqaddq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  pDataDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = numSamples & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcAVec); pSrcAVec += 8;
+        vecB = vld1q(pSrcBVec); pSrcBVec += 8;
+        vecDst = vqaddq_m(vecDst, vecA, vecB, p0);
+        vstrhq_p(pDataDst, vecDst, p0);
+    }
+  /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_add_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+        
+        uint32_t numSamples;                           /* total number of elements in the matrix */
+        uint32_t blkCnt;                               /* loop counters */
+        arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
+
+      write_q15x2_ia (&pOut, __QADD16(read_q15x2_ia (&pInA), read_q15x2_ia (&pInB)));
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) *pInA++ + *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
index a9616f35..57f67e71 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_add_q31.c
@@ -1,139 +1,216 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_add_q31.c
- * Description:  Q31 matrix addition
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixAdd
-  @{
- */
-
-/**
-  @brief         Q31 matrix addition.
-  @param[in]     pSrcA      points to first input matrix structure
-  @param[in]     pSrcB      points to second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
- */
-
-arm_status arm_mat_add_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix addition */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-      (pSrcA->numCols != pSrcB->numCols) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcA->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-
-      /* Add, saturate and store result in destination buffer. */
-      *pOut++ = __QADD(*pInA++, *pInB++);
-
-      *pOut++ = __QADD(*pInA++, *pInB++);
-
-      *pOut++ = __QADD(*pInA++, *pInB++);
-
-      *pOut++ = __QADD(*pInA++, *pInB++);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) + B(m,n) */
-
-      /* Add, saturate and store result in destination buffer. */
-      *pOut++ = __QADD(*pInA++, *pInB++);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixAdd group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_add_q31.c
+ * Description:  Q31 matrix addition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixAdd
+  @{
+ */
+
+/**
+  @brief         Q31 matrix addition.
+  @param[in]     pSrcA      points to first input matrix structure
+  @param[in]     pSrcB      points to second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_add_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+    arm_status status;                             /* status of matrix addition */
+    uint32_t        numSamples;       /* total number of elements in the matrix  */
+    q31_t          *pDataA, *pDataB, *pDataDst;
+    q31x4_t       vecA, vecB, vecDst;
+    q31_t const   *pSrcAVec;
+    q31_t const   *pSrcBVec;
+    uint32_t        blkCnt;           /* loop counters */
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (q31_t const *) pDataA;
+    pSrcBVec = (q31_t const *) pDataB;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+  {
+     /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 2;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* Add and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 4;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 4;
+        vecDst = vqaddq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  
+        pDataDst += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 4;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 4;
+        vecDst = vqaddq_m(vecDst, vecA, vecB, p0);
+        vstrwq_p(pDataDst, vecDst, p0);
+    }
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_add_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix addition */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) + B(m,n) */
+
+      /* Add, saturate and store result in destination buffer. */
+      *pOut++ = __QADD(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixAdd group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f16.c
new file mode 100755
index 00000000..9c8acef6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f16.c
@@ -0,0 +1,256 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cholesky_f16.c
+ * Description:  Floating-point Cholesky decomposition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixChol
+  @{
+ */
+
+/**
+   * @brief Floating-point Cholesky decomposition of positive-definite matrix.
+   * @param[in]  pSrc   points to the instance of the input floating-point matrix structure.
+   * @param[out] pDst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_DECOMPOSITION_FAILURE      : Input matrix cannot be decomposed
+   * @par
+   * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
+   * The decomposition of A is returning a lower triangular matrix U such that A = U U^t
+   */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_cholesky_f16(
+  const arm_matrix_instance_f16 * pSrc,
+        arm_matrix_instance_f16 * pDst)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    int i,j,k;
+    int n = pSrc->numRows;
+    _Float16 invSqrtVj;
+    float16_t *pA,*pG;
+    int kCnt;
+
+    mve_pred16_t p0;
+
+    f16x8_t acc, acc0, acc1, acc2, acc3;
+    f16x8_t vecGi;
+    f16x8_t vecGj,vecGj0,vecGj1,vecGj2,vecGj3;
+
+
+    pA = pSrc->pData;
+    pG = pDst->pData;
+    
+    for(i=0 ;i < n ; i++)
+    {
+       for(j=i ; j+3 < n ; j+=4)
+       {
+          acc0 = vdupq_n_f16(0.0f16);
+          acc0[0]=pA[(j + 0) * n + i];
+
+          acc1 = vdupq_n_f16(0.0f16);
+          acc1[0]=pA[(j + 1) * n + i];
+
+          acc2 = vdupq_n_f16(0.0f16);
+          acc2[0]=pA[(j + 2) * n + i];
+
+          acc3 = vdupq_n_f16(0.0f16);
+          acc3[0]=pA[(j + 3) * n + i];
+
+          kCnt = i;
+          for(k=0; k < i ; k+=8)
+          {
+             p0 = vctp16q(kCnt);
+
+             vecGi=vldrhq_z_f16(&pG[i * n + k],p0);
+             
+             vecGj0=vldrhq_z_f16(&pG[(j + 0) * n + k],p0);
+             vecGj1=vldrhq_z_f16(&pG[(j + 1) * n + k],p0);
+             vecGj2=vldrhq_z_f16(&pG[(j + 2) * n + k],p0);
+             vecGj3=vldrhq_z_f16(&pG[(j + 3) * n + k],p0);
+
+             acc0 = vfmsq_m(acc0, vecGi, vecGj0, p0);
+             acc1 = vfmsq_m(acc1, vecGi, vecGj1, p0);
+             acc2 = vfmsq_m(acc2, vecGi, vecGj2, p0);
+             acc3 = vfmsq_m(acc3, vecGi, vecGj3, p0);
+
+             kCnt -= 8;
+          }
+          pG[(j + 0) * n + i] = vecAddAcrossF16Mve(acc0);
+          pG[(j + 1) * n + i] = vecAddAcrossF16Mve(acc1);
+          pG[(j + 2) * n + i] = vecAddAcrossF16Mve(acc2);
+          pG[(j + 3) * n + i] = vecAddAcrossF16Mve(acc3);
+       }
+
+       for(; j < n ; j++)
+       {
+
+          kCnt = i;
+          acc = vdupq_n_f16(0.0f16);
+          acc[0] = pA[j * n + i];
+
+          for(k=0; k < i ; k+=8)
+          {
+             p0 = vctp16q(kCnt);
+
+             vecGi=vldrhq_z_f16(&pG[i * n + k],p0);
+             vecGj=vldrhq_z_f16(&pG[j * n + k],p0);
+
+             acc = vfmsq_m(acc, vecGi, vecGj,p0);
+
+             kCnt -= 8;
+          }
+          pG[j * n + i] = vecAddAcrossF16Mve(acc);
+       }
+
+       if ((_Float16)pG[i * n + i] <= 0.0f16)
+       {
+         return(ARM_MATH_DECOMPOSITION_FAILURE);
+       }
+
+       invSqrtVj = 1.0f16/(_Float16)sqrtf((float32_t)pG[i * n + i]);
+       for(j=i; j < n ; j++)
+       {
+         pG[j * n + i] = (_Float16)pG[j * n + i] * (_Float16)invSqrtVj ;
+       }
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_cholesky_f16(
+  const arm_matrix_instance_f16 * pSrc,
+        arm_matrix_instance_f16 * pDst)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    int i,j,k;
+    int n = pSrc->numRows;
+    float16_t invSqrtVj;
+    float16_t *pA,*pG;
+
+    pA = pSrc->pData;
+    pG = pDst->pData;
+    
+
+    for(i=0 ; i < n ; i++)
+    {
+       for(j=i ; j < n ; j++)
+       {
+          pG[j * n + i] = pA[j * n + i];
+
+          for(k=0; k < i ; k++)
+          {
+             pG[j * n + i] = (_Float16)pG[j * n + i] - (_Float16)pG[i * n + k] * (_Float16)pG[j * n + k];
+          }
+       }
+
+       if ((_Float16)pG[i * n + i] <= 0.0f16)
+       {
+         return(ARM_MATH_DECOMPOSITION_FAILURE);
+       }
+
+       /* The division is done in float32 for accuracy reason and
+       because doing it in f16 would not have any impact on the performances.
+       */
+       invSqrtVj = 1.0f/sqrtf((float32_t)pG[i * n + i]);
+       for(j=i ; j < n ; j++)
+       {
+         pG[j * n + i] = (_Float16)pG[j * n + i] * (_Float16)invSqrtVj ;
+       }
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixChol group
+ */
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f32.c
new file mode 100755
index 00000000..94b96895
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f32.c
@@ -0,0 +1,438 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cholesky_f32.c
+ * Description:  Floating-point Cholesky decomposition
+ *
+ * $Date:        05 October 2021
+ * $Revision:    V1.9.1
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixChol Cholesky and LDLT decompositions
+
+  Computes the Cholesky or LDL^t decomposition of a matrix.
+
+
+  If the input matrix does not have a decomposition, then the 
+  algorithm terminates and returns error status ARM_MATH_DECOMPOSITION_FAILURE.
+ */
+
+/**
+  @addtogroup MatrixChol
+  @{
+ */
+
+/**
+   * @brief Floating-point Cholesky decomposition of positive-definite matrix.
+   * @param[in]  pSrc   points to the instance of the input floating-point matrix structure.
+   * @param[out] pDst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_DECOMPOSITION_FAILURE      : Input matrix cannot be decomposed
+   * @par
+   * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
+   * The decomposition of A is returning a lower triangular matrix U such that A = U U^t
+   */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_cholesky_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    int i,j,k;
+    int n = pSrc->numRows;
+    float32_t invSqrtVj;
+    float32_t *pA,*pG;
+    int kCnt;
+
+    mve_pred16_t p0;
+
+    f32x4_t acc, acc0, acc1, acc2, acc3;
+    f32x4_t vecGi;
+    f32x4_t vecGj,vecGj0,vecGj1,vecGj2,vecGj3;
+
+
+    pA = pSrc->pData;
+    pG = pDst->pData;
+    
+    for(i=0 ;i < n ; i++)
+    {
+       for(j=i ; j+3 < n ; j+=4)
+       {
+          pG[(j + 0) * n + i] = pA[(j + 0) * n + i];
+          pG[(j + 1) * n + i] = pA[(j + 1) * n + i];
+          pG[(j + 2) * n + i] = pA[(j + 2) * n + i];
+          pG[(j + 3) * n + i] = pA[(j + 3) * n + i];
+
+          kCnt = i;
+          acc0 = vdupq_n_f32(0.0f);
+          acc1 = vdupq_n_f32(0.0f);
+          acc2 = vdupq_n_f32(0.0f);
+          acc3 = vdupq_n_f32(0.0f);
+
+          for(k=0; k < i ; k+=4)
+          {
+             p0 = vctp32q(kCnt);
+
+             vecGi=vldrwq_z_f32(&pG[i * n + k],p0);
+             
+             vecGj0=vldrwq_z_f32(&pG[(j + 0) * n + k],p0);
+             vecGj1=vldrwq_z_f32(&pG[(j + 1) * n + k],p0);
+             vecGj2=vldrwq_z_f32(&pG[(j + 2) * n + k],p0);
+             vecGj3=vldrwq_z_f32(&pG[(j + 3) * n + k],p0);
+
+             acc0 = vfmaq_m(acc0, vecGi, vecGj0, p0);
+             acc1 = vfmaq_m(acc1, vecGi, vecGj1, p0);
+             acc2 = vfmaq_m(acc2, vecGi, vecGj2, p0);
+             acc3 = vfmaq_m(acc3, vecGi, vecGj3, p0);
+
+             kCnt -= 4;
+          }
+          pG[(j + 0) * n + i] -= vecAddAcrossF32Mve(acc0);
+          pG[(j + 1) * n + i] -= vecAddAcrossF32Mve(acc1);
+          pG[(j + 2) * n + i] -= vecAddAcrossF32Mve(acc2);
+          pG[(j + 3) * n + i] -= vecAddAcrossF32Mve(acc3);
+       }
+
+       for(; j < n ; j++)
+       {
+          pG[j * n + i] = pA[j * n + i];
+
+          kCnt = i;
+          acc = vdupq_n_f32(0.0f);
+
+          for(k=0; k < i ; k+=4)
+          {
+             p0 = vctp32q(kCnt);
+
+             vecGi=vldrwq_z_f32(&pG[i * n + k],p0);
+             vecGj=vldrwq_z_f32(&pG[j * n + k],p0);
+
+             acc = vfmaq_m(acc, vecGi, vecGj,p0);
+
+             kCnt -= 4;
+          }
+          pG[j * n + i] -= vecAddAcrossF32Mve(acc);
+       }
+
+       if (pG[i * n + i] <= 0.0f)
+       {
+         return(ARM_MATH_DECOMPOSITION_FAILURE);
+       }
+
+       invSqrtVj = 1.0f/sqrtf(pG[i * n + i]);
+       for(j=i; j < n ; j++)
+       {
+         pG[j * n + i] = pG[j * n + i] * invSqrtVj ;
+       }
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_cholesky_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    int i,j,k;
+    int n = pSrc->numRows;
+    float32_t invSqrtVj;
+    float32_t *pA,*pG;
+    int kCnt;
+
+
+    f32x4_t acc, acc0, acc1, acc2, acc3;
+    f32x4_t vecGi;
+    f32x4_t vecGj,vecGj0,vecGj1,vecGj2,vecGj3;
+#if !defined(__aarch64__)
+    f32x2_t tmp = vdup_n_f32(0);   
+#endif    
+    float32_t sum=0.0f;
+    float32_t sum0=0.0f,sum1=0.0f,sum2=0.0f,sum3=0.0f;
+
+
+    pA = pSrc->pData;
+    pG = pDst->pData;
+    
+    for(i=0 ;i < n ; i++)
+    {
+       for(j=i ; j+3 < n ; j+=4)
+       {
+          pG[(j + 0) * n + i] = pA[(j + 0) * n + i];
+          pG[(j + 1) * n + i] = pA[(j + 1) * n + i];
+          pG[(j + 2) * n + i] = pA[(j + 2) * n + i];
+          pG[(j + 3) * n + i] = pA[(j + 3) * n + i];
+
+          acc0 = vdupq_n_f32(0.0f);
+          acc1 = vdupq_n_f32(0.0f);
+          acc2 = vdupq_n_f32(0.0f);
+          acc3 = vdupq_n_f32(0.0f);
+
+          kCnt = i >> 2;
+          k=0;
+          while(kCnt > 0)
+          {
+
+             vecGi=vld1q_f32(&pG[i * n + k]);
+             
+             vecGj0=vld1q_f32(&pG[(j + 0) * n + k]);
+             vecGj1=vld1q_f32(&pG[(j + 1) * n + k]);
+             vecGj2=vld1q_f32(&pG[(j + 2) * n + k]);
+             vecGj3=vld1q_f32(&pG[(j + 3) * n + k]);
+
+             acc0 = vfmaq_f32(acc0, vecGi, vecGj0);
+             acc1 = vfmaq_f32(acc1, vecGi, vecGj1);
+             acc2 = vfmaq_f32(acc2, vecGi, vecGj2);
+             acc3 = vfmaq_f32(acc3, vecGi, vecGj3);
+
+             kCnt--;
+             k+=4;
+          }
+
+#if defined(__aarch64__)
+          sum0 = vpadds_f32(vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0)));
+          sum1 = vpadds_f32(vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1)));
+          sum2 = vpadds_f32(vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2)));
+          sum3 = vpadds_f32(vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3)));
+
+#else
+          tmp = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
+          sum0 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
+
+          tmp = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1));
+          sum1 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
+
+          tmp = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2));
+          sum2 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
+
+          tmp = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3));
+          sum3 = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
+#endif
+
+          kCnt = i & 3;
+          while(kCnt > 0)
+          {
+
+             sum0 = sum0 + pG[i * n + k] * pG[(j + 0) * n + k];
+             sum1 = sum1 + pG[i * n + k] * pG[(j + 1) * n + k];
+             sum2 = sum2 + pG[i * n + k] * pG[(j + 2) * n + k];
+             sum3 = sum3 + pG[i * n + k] * pG[(j + 3) * n + k];
+             kCnt--;
+             k++;
+          }
+
+          pG[(j + 0) * n + i] -= sum0;
+          pG[(j + 1) * n + i] -= sum1;
+          pG[(j + 2) * n + i] -= sum2;
+          pG[(j + 3) * n + i] -= sum3;
+       }
+
+       for(; j < n ; j++)
+       {
+          pG[j * n + i] = pA[j * n + i];
+
+          acc = vdupq_n_f32(0.0f);
+
+          kCnt = i >> 2;
+          k=0;
+          while(kCnt > 0)
+          {
+
+             vecGi=vld1q_f32(&pG[i * n + k]);
+             vecGj=vld1q_f32(&pG[j * n + k]);
+
+             acc = vfmaq_f32(acc, vecGi, vecGj);
+
+             kCnt--;
+             k+=4;
+          }
+
+#if defined(__aarch64__)
+          sum = vpadds_f32(vpadd_f32(vget_low_f32(acc), vget_high_f32(acc)));
+#else
+          tmp = vpadd_f32(vget_low_f32(acc), vget_high_f32(acc));
+          sum = vget_lane_f32(tmp, 0) + vget_lane_f32(tmp, 1);
+#endif
+
+          kCnt = i & 3;
+          while(kCnt > 0)
+          {
+             sum = sum + pG[i * n + k] * pG[(j + 0) * n + k];
+
+            
+             kCnt--;
+             k++;
+          }
+
+          pG[j * n + i] -= sum;
+       }
+
+       if (pG[i * n + i] <= 0.0f)
+       {
+         return(ARM_MATH_DECOMPOSITION_FAILURE);
+       }
+
+       invSqrtVj = 1.0f/sqrtf(pG[i * n + i]);
+       for(j=i; j < n ; j++)
+       {
+         pG[j * n + i] = pG[j * n + i] * invSqrtVj ;
+       }
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_cholesky_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    int i,j,k;
+    int n = pSrc->numRows;
+    float32_t invSqrtVj;
+    float32_t *pA,*pG;
+
+    pA = pSrc->pData;
+    pG = pDst->pData;
+    
+
+    for(i=0 ; i < n ; i++)
+    {
+       for(j=i ; j < n ; j++)
+       {
+          pG[j * n + i] = pA[j * n + i];
+
+          for(k=0; k < i ; k++)
+          {
+             pG[j * n + i] = pG[j * n + i] - pG[i * n + k] * pG[j * n + k];
+          }
+       }
+
+       if (pG[i * n + i] <= 0.0f)
+       {
+         return(ARM_MATH_DECOMPOSITION_FAILURE);
+       }
+
+       invSqrtVj = 1.0f/sqrtf(pG[i * n + i]);
+       for(j=i ; j < n ; j++)
+       {
+         pG[j * n + i] = pG[j * n + i] * invSqrtVj ;
+       }
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixChol group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f64.c
new file mode 100755
index 00000000..4e095d06
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cholesky_f64.c
@@ -0,0 +1,122 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cholesky_f64.c
+ * Description:  Floating-point Cholesky decomposition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixChol
+  @{
+ */
+
+/**
+   * @brief Floating-point Cholesky decomposition of positive-definite matrix.
+   * @param[in]  pSrc   points to the instance of the input floating-point matrix structure.
+   * @param[out] pDst   points to the instance of the output floating-point matrix structure.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_DECOMPOSITION_FAILURE      : Input matrix cannot be decomposed
+   * @par
+   * If the matrix is ill conditioned or only semi-definite, then it is better using the LDL^t decomposition.
+   * The decomposition of A is returning a lower triangular matrix U such that A = U U^t
+   */
+
+
+arm_status arm_mat_cholesky_f64(
+  const arm_matrix_instance_f64 * pSrc,
+        arm_matrix_instance_f64 * pDst)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    int i,j,k;
+    int n = pSrc->numRows;
+    float64_t invSqrtVj;
+    float64_t *pA,*pG;
+
+    pA = pSrc->pData;
+    pG = pDst->pData;
+    
+
+    for(i=0 ; i < n ; i++)
+    {
+       for(j=i ; j < n ; j++)
+       {
+          pG[j * n + i] = pA[j * n + i];
+
+          for(k=0; k < i ; k++)
+          {
+             pG[j * n + i] = pG[j * n + i] - pG[i * n + k] * pG[j * n + k];
+          }
+       }
+
+       if (pG[i * n + i] <= 0.0)
+       {
+         return(ARM_MATH_DECOMPOSITION_FAILURE);
+       }
+
+       invSqrtVj = 1.0/sqrt(pG[i * n + i]);
+       for(j=i ; j < n ; j++)
+       {
+         pG[j * n + i] = pG[j * n + i] * invSqrtVj ;
+       }
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixChol group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f16.c
new file mode 100755
index 00000000..f5666962
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f16.c
@@ -0,0 +1,935 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_mult_f16.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup CmplxMatrixMult
+  @{
+ */
+
+/**
+  @brief         Floating-point Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H)
+#pragma GCC warning "Scalar version of arm_mat_cmplx_mult_f16 built. Helium version has build issues with gcc."
+#endif 
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) &&  !defined(__CMSIS_GCC_H)
+
+#include "arm_helium_utils.h"
+
+#define DONTCARE            0 /* inactive lane content */
+
+
+__STATIC_FORCEINLINE arm_status arm_mat_cmplx_mult_f16_2x2_mve(
+    const arm_matrix_instance_f16 * pSrcA,
+    const arm_matrix_instance_f16 * pSrcB,
+    arm_matrix_instance_f16 * pDst)
+{
+#define MATRIX_DIM 2
+    float16_t const *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    float16_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    float16_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint16x8_t     vecColBOffs0,vecColAOffs0,vecColAOffs1;
+    float16_t       *pInA0 = pInA;
+    f16x8_t        acc0, acc1;
+    f16x8_t        vecB, vecA0, vecA1;
+    f16x8_t        vecTmp;
+    uint16_t         tmp;
+    static const uint16_t offsetB0[8] = { 0, 1,
+        MATRIX_DIM * CMPLX_DIM, MATRIX_DIM * CMPLX_DIM + 1,
+        2, 3,
+        MATRIX_DIM * CMPLX_DIM + 2 , MATRIX_DIM * CMPLX_DIM + 3,
+    };
+
+
+    vecColBOffs0 = vldrhq_u16((uint16_t const *) offsetB0);
+
+    tmp = 0;
+    vecColAOffs0 = viwdupq_u16(tmp, 4, 1);
+
+    tmp = (CMPLX_DIM * MATRIX_DIM);
+    vecColAOffs1 = vecColAOffs0 + (uint16_t)(CMPLX_DIM * MATRIX_DIM);
+
+
+    pInB = (float16_t const *)pSrcB->pData;
+
+    vecA0 = vldrhq_gather_shifted_offset_f16(pInA0, vecColAOffs0);
+    vecA1 = vldrhq_gather_shifted_offset_f16(pInA0, vecColAOffs1);
+
+
+    vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    acc0 = vcmulq(vecA0, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA0, vecB);
+
+    acc1 = vcmulq(vecA1, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA1, vecB);
+
+
+    /*
+     * Compute
+     *  re0+re1 | im0+im1 | re0+re1 | im0+im1
+     *  re2+re3 | im2+im3 | re2+re3 | im2+im3
+     */
+
+    vecTmp = (f16x8_t) vrev64q_s32((int32x4_t) acc0);
+    vecTmp = vaddq(vecTmp, acc0);
+
+
+    *(float32_t *)(&pOut[0 * CMPLX_DIM * MATRIX_DIM]) = ((f32x4_t)vecTmp)[0];
+    *(float32_t *)(&pOut[0 * CMPLX_DIM * MATRIX_DIM + CMPLX_DIM]) = ((f32x4_t)vecTmp)[2];
+
+    vecTmp = (f16x8_t) vrev64q_s32((int32x4_t) acc1);
+    vecTmp = vaddq(vecTmp, acc1);
+
+    *(float32_t *)(&pOut[1 * CMPLX_DIM * MATRIX_DIM]) = ((f32x4_t)vecTmp)[0];
+    *(float32_t *)(&pOut[1 * CMPLX_DIM * MATRIX_DIM + CMPLX_DIM]) = ((f32x4_t)vecTmp)[2];
+
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+#undef MATRIX_DIM
+}
+
+
+
+__STATIC_FORCEINLINE arm_status arm_mat_cmplx_mult_f16_3x3_mve(
+    const arm_matrix_instance_f16 * pSrcA,
+    const arm_matrix_instance_f16 * pSrcB,
+    arm_matrix_instance_f16 * pDst)
+{
+#define MATRIX_DIM 3
+    float16_t const *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    float16_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    float16_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint16x8_t     vecColBOffs0;
+    float16_t       *pInA0 = pInA;
+    float16_t       *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM;
+    float16_t       *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM;
+    f16x8_t        acc0, acc1, acc2;
+    f16x8_t        vecB, vecA0, vecA1, vecA2;
+    static const uint16_t offsetB0[8] = { 0, 1,
+        MATRIX_DIM * CMPLX_DIM, MATRIX_DIM * CMPLX_DIM + 1,
+        2 * MATRIX_DIM * CMPLX_DIM, 2 * MATRIX_DIM * CMPLX_DIM + 1,
+        DONTCARE, DONTCARE
+    };
+
+    
+    /* enable predication to disable upper half complex vector element */
+    mve_pred16_t p0 = vctp16q(MATRIX_DIM * CMPLX_DIM);
+
+    vecColBOffs0 = vldrhq_u16((uint16_t const *) offsetB0);
+
+    pInB = (float16_t const *)pSrcB->pData;
+
+    vecA0 = vldrhq_f16(pInA0);
+    vecA1 = vldrhq_f16(pInA1);
+    vecA2 = vldrhq_f16(pInA2);
+
+    vecB = vldrhq_gather_shifted_offset_z(pInB, vecColBOffs0, p0);
+
+    acc0 = vcmulq(vecA0, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA0, vecB);
+
+    acc1 = vcmulq(vecA1, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA1, vecB);
+
+    acc2 = vcmulq(vecA2, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA2, vecB);
+
+    mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]);
+    pOut += CMPLX_DIM;
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrhq_gather_shifted_offset_z(pInB, vecColBOffs0, p0);
+
+    acc0 = vcmulq(vecA0, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA0, vecB);
+
+    acc1 = vcmulq(vecA1, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA1, vecB);
+
+    acc2 = vcmulq(vecA2, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA2, vecB);
+
+    mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]);
+    pOut += CMPLX_DIM;
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrhq_gather_shifted_offset_z(pInB, vecColBOffs0, p0);
+
+    acc0 = vcmulq(vecA0, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA0, vecB);
+
+    acc1 = vcmulq(vecA1, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA1, vecB);
+
+    acc2 = vcmulq(vecA2, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA2, vecB);
+
+    mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+#undef MATRIX_DIM
+}
+
+
+
+
+__STATIC_FORCEINLINE arm_status arm_mat_cmplx_mult_f16_4x4_mve(
+    const arm_matrix_instance_f16 * pSrcA,
+    const arm_matrix_instance_f16 * pSrcB,
+    arm_matrix_instance_f16 * pDst)
+{
+#define MATRIX_DIM 4
+    float16_t const *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    float16_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    float16_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint16x8_t     vecColBOffs0;
+    float16_t       *pInA0 = pInA;
+    float16_t       *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM;
+    float16_t       *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM;
+    float16_t       *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM;
+    f16x8_t        acc0, acc1, acc2, acc3;
+    f16x8_t        vecB, vecA;
+    static const uint16_t offsetB0[8] = { 0, 1,
+        MATRIX_DIM * CMPLX_DIM, MATRIX_DIM * CMPLX_DIM + 1,
+        2 * MATRIX_DIM * CMPLX_DIM, 2 * MATRIX_DIM * CMPLX_DIM + 1,
+        3 * MATRIX_DIM * CMPLX_DIM, 3 * MATRIX_DIM * CMPLX_DIM + 1
+    };
+
+    vecColBOffs0 = vldrhq_u16((uint16_t const *) offsetB0);
+
+    pInB = (float16_t const *)pSrcB->pData;
+
+    vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrhq_f16(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+
+    mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]);
+    pOut += CMPLX_DIM;
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrhq_f16(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+
+    mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]);
+    pOut += CMPLX_DIM;
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrhq_f16(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+
+    mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]);
+    pOut += CMPLX_DIM;
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrhq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrhq_f16(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrhq_f16(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+
+    mve_cmplx_sum_intra_vec_f16(acc0, &pOut[0 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc1, &pOut[1 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc2, &pOut[2 * CMPLX_DIM * MATRIX_DIM]);
+    mve_cmplx_sum_intra_vec_f16(acc3, &pOut[3 * CMPLX_DIM * MATRIX_DIM]);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+#undef MATRIX_DIM
+}
+
+
+
+arm_status arm_mat_cmplx_mult_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+  arm_matrix_instance_f16 * pDst)
+{
+    float16_t const *pInB = (float16_t const *) pSrcB->pData;   /* input data matrix pointer B */
+    float16_t const *pInA = (float16_t const *) pSrcA->pData;   /* input data matrix pointer A */
+    float16_t *pOut = pDst->pData;  /* output data matrix pointer */
+    float16_t *px;              /* Temporary output data matrix pointer */
+    uint16_t  numRowsA = pSrcA->numRows;    /* number of rows of input matrix A    */
+    uint16_t  numColsB = pSrcB->numCols;    /* number of columns of input matrix B */
+    uint16_t  numColsA = pSrcA->numCols;    /* number of columns of input matrix A */
+    uint16_t  col, i = 0U, row = numRowsA;  /* loop counters */
+    arm_status status;          /* status of matrix multiplication */
+    uint16x8_t vecOffs, vecColBOffs;
+    uint32_t  blkCnt,rowCnt;           /* loop counters */
+
+    #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*
+     * small squared matrix specialized routines
+     */
+    if (numRowsA == numColsB && numColsB == numColsA)
+    {
+        if (numRowsA == 1)
+        {
+            pOut[0] = (_Float16)pInA[0] * (_Float16)pInB[0] - (_Float16)pInA[1] * (_Float16)pInB[1];
+            pOut[1] = (_Float16)pInA[0] * (_Float16)pInB[1] + (_Float16)pInA[1] * (_Float16)pInB[0];
+            return (ARM_MATH_SUCCESS);
+        }
+        else if  (numRowsA == 2)
+            return arm_mat_cmplx_mult_f16_2x2_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 3)
+            return arm_mat_cmplx_mult_f16_3x3_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 4)
+            return arm_mat_cmplx_mult_f16_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+
+    vecColBOffs[0] = 0;
+    vecColBOffs[1] = 1;
+    vecColBOffs[2] = numColsB * CMPLX_DIM;
+    vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1;
+    vecColBOffs[4] = 2*numColsB * CMPLX_DIM;
+    vecColBOffs[5] = 2*(numColsB * CMPLX_DIM) + 1;
+    vecColBOffs[6] = 3*numColsB * CMPLX_DIM;
+    vecColBOffs[7] = 3*(numColsB * CMPLX_DIM) + 1;
+
+    /*
+     * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB
+     */
+
+    /*
+     * row loop
+     */
+    rowCnt = row >> 2;
+    while (rowCnt > 0u)
+    {
+        /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i * CMPLX_DIM;
+        i = i + 4 * numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (float16_t const *) pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec;
+            float16_t const *pInA0 = pInA;
+            float16_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM;
+            float16_t const *pInA2 = pInA1 + numColsA * CMPLX_DIM;
+            float16_t const *pInA3 = pInA2 + numColsA * CMPLX_DIM;
+            f16x8_t acc0, acc1, acc2, acc3;
+
+            acc0 = vdupq_n_f16(0.0f16);
+            acc1 = vdupq_n_f16(0.0f16);
+            acc2 = vdupq_n_f16(0.0f16);
+            acc3 = vdupq_n_f16(0.0f16);
+
+            pSrcA0Vec = (float16_t const *) pInA0;
+            pSrcA1Vec = (float16_t const *) pInA1;
+            pSrcA2Vec = (float16_t const *) pInA2;
+            pSrcA3Vec = (float16_t const *) pInA3;
+
+            vecOffs = vecColBOffs;
+
+            /*
+             * process 1 x 4 block output
+             */
+            blkCnt = (numColsA * CMPLX_DIM) >> 3;
+            while (blkCnt > 0U)
+            {
+                f16x8_t vecB, vecA;
+
+                vecB = vldrhq_gather_shifted_offset_f16(pInB, vecOffs);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vaddq_n_u16(vecOffs , (uint16_t) (numColsB * 4 * CMPLX_DIM));
+
+                vecA = vld1q(pSrcA0Vec);  pSrcA0Vec += 8;
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+                vecA = vld1q(pSrcA1Vec);  pSrcA1Vec += 8;
+                acc1 = vcmlaq(acc1, vecA, vecB);
+                acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+                vecA = vld1q(pSrcA2Vec);  pSrcA2Vec += 8;
+                acc2 = vcmlaq(acc2, vecA, vecB);
+                acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+                vecA = vld1q(pSrcA3Vec);  pSrcA3Vec += 8;
+                acc3 = vcmlaq(acc3, vecA, vecB);
+                acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+                blkCnt--;
+            }
+            /*
+             * Unsupported addressing mode compiler crash
+             */
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 7;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp16q(blkCnt);
+                f16x8_t vecB, vecA;
+
+                vecB = vldrhq_gather_shifted_offset_z_f16(pInB, vecOffs, p0);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM));
+
+                vecA = vld1q(pSrcA0Vec);
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+                vecA = vld1q(pSrcA1Vec);
+                acc1 = vcmlaq(acc1, vecA, vecB);
+                acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+                vecA = vld1q(pSrcA2Vec);
+                acc2 = vcmlaq(acc2, vecA, vecB);
+                acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+                vecA = vld1q(pSrcA3Vec);
+                acc3 = vcmlaq(acc3, vecA, vecB);
+                acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+            }
+
+
+            mve_cmplx_sum_intra_vec_f16(acc0, &px[0 * CMPLX_DIM * numColsB + 0]);
+            mve_cmplx_sum_intra_vec_f16(acc1, &px[1 * CMPLX_DIM * numColsB + 0]);
+            mve_cmplx_sum_intra_vec_f16(acc2, &px[2 * CMPLX_DIM * numColsB + 0]);
+            mve_cmplx_sum_intra_vec_f16(acc3, &px[3 * CMPLX_DIM * numColsB + 0]);
+           
+            px += CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (float16_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM;
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += (numColsA * 4) * CMPLX_DIM;
+        /*
+         * Decrement the row loop counter
+         */
+        rowCnt --;
+
+    }
+
+    rowCnt = row & 3;
+    while (rowCnt > 0u)
+    {
+           /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i * CMPLX_DIM;
+        i = i + numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (float16_t const *) pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            float16_t const *pSrcA0Vec;
+            float16_t const *pInA0 = pInA;
+            f16x8_t acc0;
+
+            acc0 = vdupq_n_f16(0.0f16);
+
+            pSrcA0Vec = (float16_t const *) pInA0;
+           
+            vecOffs = vecColBOffs;
+
+            /*
+             * process 1 x 4 block output
+             */
+            blkCnt = (numColsA * CMPLX_DIM) >> 3;
+            while (blkCnt > 0U)
+            {
+                f16x8_t vecB, vecA;
+
+                vecB = vldrhq_gather_shifted_offset(pInB, vecOffs);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (4*numColsB * CMPLX_DIM));
+
+                vecA = vld1q(pSrcA0Vec);  
+                pSrcA0Vec += 8;
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+                
+
+                blkCnt--;
+            }
+
+
+            /*
+             * tail
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 7;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp16q(blkCnt);
+                f16x8_t vecB, vecA;
+
+                vecB = vldrhq_gather_shifted_offset_z(pInB, vecOffs, p0);
+               
+                vecA = vld1q(pSrcA0Vec);
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+            }
+
+            mve_cmplx_sum_intra_vec_f16(acc0, &px[0]);
+
+           
+            px += CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (float16_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM;
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += numColsA  * CMPLX_DIM;
+        rowCnt--;
+    }
+
+    /*
+     * set status as ARM_MATH_SUCCESS
+     */
+    status = ARM_MATH_SUCCESS;
+ }
+    /*
+     * Return to application
+     */
+    return (status);
+}
+#else
+
+arm_status arm_mat_cmplx_mult_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float16_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float16_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float16_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float16_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  _Float16 sumReal, sumImag;                    /* Accumulator */
+  _Float16 a1, b1, c1, d1;
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  _Float16 a0, b0, c0, d0;
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal = 0.0f16;
+        sumImag = 0.0f16;
+
+        /* Initiate pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+
+          /* Reading real part of complex matrix A */
+          a0 = *pIn1;
+
+          /* Reading real part of complex matrix B */
+          c0 = *pIn2;
+
+          /* Reading imaginary part of complex matrix A */
+          b0 = *(pIn1 + 1U);
+
+          /* Reading imaginary part of complex matrix B */
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          a0 = *(pIn1     );
+          c0 = *(pIn2     );
+          b0 = *(pIn1 + 1U);
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop count */
+          colCnt--;
+        }
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sumReal;
+        *px++ = sumImag;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixMult group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
index 448122a6..5add938b 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_f32.c
@@ -1,631 +1,1407 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_cmplx_mult_f32.c
- * Description:  Floating-point matrix multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup CmplxMatrixMult  Complex Matrix Multiplication
-
-  Complex Matrix multiplication is only defined if the number of columns of the
-  first matrix equals the number of rows of the second matrix.
-  Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
-  in an <code>M x P</code> matrix.
-  @par
-  When matrix size checking is enabled, the functions check:
-   - that the inner dimensions of <code>pSrcA</code> and <code>pSrcB</code> are equal;
-   - that the size of the output matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
- */
-
-
-/**
-  @addtogroup CmplxMatrixMult
-  @{
- */
-
-/**
-  @brief         Floating-point Complex matrix multiplication.
-  @param[in]     pSrcA      points to first input complex matrix structure
-  @param[in]     pSrcB      points to second input complex matrix structure
-  @param[out]    pDst       points to output complex matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
- */
-#if defined(ARM_MATH_NEON)
-arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-  float32_t sumReal1, sumImag1;                  /* accumulator */
-  float32_t a0, b0, c0, d0;
-  float32_t a1, a1B,b1, b1B, c1, d1;
-  float32_t sumReal2, sumImag2;                  /* accumulator */
-
-
-  float32x4x2_t a0V, a1V;
-  float32x4_t accR0,accI0, accR1,accI1,tempR, tempI;
-  float32x2_t accum = vdup_n_f32(0);
-  float32_t *pIn1B = pSrcA->pData;    
-
-  uint16_t col, i = 0U, j, rowCnt, row = numRowsA, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-  float32_t sumReal1B, sumImag1B; 
-  float32_t sumReal2B, sumImag2B; 
-  float32_t *pxB;  
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-
-    rowCnt = row >> 1;
-
-    /* Row loop */
-    while (rowCnt > 0U)
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-      pxB = px + 2 * numColsB;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0U;
-
-      /* Column loop */
-      while (col > 0U)
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal1 = 0.0f;
-        sumImag1 = 0.0f;
-        sumReal1B = 0.0f;
-        sumImag1B = 0.0f;
-
-        sumReal2 = 0.0f;
-        sumImag2 = 0.0f;
-        sumReal2B = 0.0f;
-        sumImag2B = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-        pIn1B = pIn1 + 2*numColsA;
-
-        accR0 = vdupq_n_f32(0.0);
-        accI0 = vdupq_n_f32(0.0);
-        accR1 = vdupq_n_f32(0.0);
-        accI1 = vdupq_n_f32(0.0);
-
-        /* Compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* Reading real part of complex matrix A */
-          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
-          a1V = vld2q_f32(pIn1B);  // load & separate real/imag pSrcA (de-interleave 2)
-
-          pIn1 += 8;
-          pIn1B += 8;
-
-          tempR[0] = *pIn2;
-          tempI[0] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          tempR[1] = *pIn2;
-          tempI[1] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          tempR[2] = *pIn2;
-          tempI[2] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          tempR[3] = *pIn2;
-          tempI[3] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
-          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
-
-          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
-          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
-
-          accR1 = vmlaq_f32(accR1,a1V.val[0],tempR);
-          accR1 = vmlsq_f32(accR1,a1V.val[1],tempI);
-
-          accI1 = vmlaq_f32(accI1,a1V.val[1],tempR);
-          accI1 = vmlaq_f32(accI1,a1V.val[0],tempI);
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
-        sumReal1 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
-        sumImag1 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(accR1), vget_high_f32(accR1));
-        sumReal1B += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(accI1), vget_high_f32(accI1));
-        sumImag1B += accum[0] + accum[1];
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        colCnt = numColsA & 3;
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
-          a1 = *pIn1;
-          a1B = *pIn1B;
-
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1U);
-          b1B = *(pIn1B + 1U);
-
-          d1 = *(pIn2 + 1U);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          sumReal1B += a1B * c1;
-          sumImag1B += b1B * c1;
-
-          pIn1 += 2U;
-          pIn1B += 2U;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          sumReal2B -= b1B * d1;
-          sumImag2B += a1B * d1;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        sumReal1 += sumReal2;
-        sumImag1 += sumImag2;
-
-        sumReal1B += sumReal2B;
-        sumImag1B += sumImag2B;
-
-        /* Store the result in the destination buffer */
-        *px++ = sumReal1;
-        *px++ = sumImag1;
-        *pxB++ = sumReal1B;
-        *pxB++ = sumImag1B;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + 2U * j;
-
-        /* Decrement the column loop counter */
-        col--;
-      } 
-
-      /* Update the pointer pInA to point to the  starting address of the next 2 row */
-      i = i + 2*numColsB;
-      pInA = pInA + 4 * numColsA;
-
-      /* Decrement the row loop counter */
-      rowCnt--;
-    }
-
-    rowCnt = row & 1;
-    while (rowCnt > 0U)
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0U;
-
-      /* Column loop */
-      while (col > 0U)
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal1 = 0.0f;
-        sumImag1 = 0.0f;
-
-        sumReal2 = 0.0f;
-        sumImag2 = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        accR0 = vdupq_n_f32(0.0);
-        accI0 = vdupq_n_f32(0.0);
-
-        /* Compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2;
-
-        /* Matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* Reading real part of complex matrix A */
-          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
-          pIn1 += 8;
-
-          tempR[0] = *pIn2;
-          tempI[0] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          tempR[1] = *pIn2;
-          tempI[1] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          tempR[2] = *pIn2;
-          tempI[2] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          tempR[3] = *pIn2;
-          tempI[3] = *(pIn2 + 1U);
-          pIn2 += 2 * numColsB;
-
-          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
-          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
-
-          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
-          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
-        sumReal1 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
-        sumImag1 += accum[0] + accum[1];
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        colCnt = numColsA & 3;
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
-          a1 = *pIn1;
-          c1 = *pIn2;
-
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          sumReal1 += a1 * c1;
-          sumImag1 += b1 * c1;
-
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          sumReal2 -= b1 * d1;
-          sumImag2 += a1 * d1;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        sumReal1 += sumReal2;
-        sumImag1 += sumImag2;
-
-        /* Store the result in the destination buffer */
-        *px++ = sumReal1;
-        *px++ = sumImag1;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + 2U * j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } 
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + 2 * numColsA;
-
-      /* Decrement the row loop counter */
-      rowCnt--;
-
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#else
-arm_status arm_mat_cmplx_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
-  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-  float32_t sumReal, sumImag;                    /* Accumulator */
-  float32_t a1, b1, c1, d1;
-  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  float32_t a0, b0, c0, d0;
-#endif
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0U;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal = 0.0f;
-        sumImag = 0.0f;
-
-        /* Initiate pointer pIn1 to point to starting address of column being processed */
-        pIn1 = pInA;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-
-          /* Reading real part of complex matrix A */
-          a0 = *pIn1;
-
-          /* Reading real part of complex matrix B */
-          c0 = *pIn2;
-
-          /* Reading imaginary part of complex matrix A */
-          b0 = *(pIn1 + 1U);
-
-          /* Reading imaginary part of complex matrix B */
-          d0 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += a0 * c0;
-          sumImag += b0 * c0;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= b0 * d0;
-          sumImag += a0 * d0;
-
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          a1 = *(pIn1     );
-          c1 = *(pIn2     );
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += a1 * c1;
-          sumImag += b1 * c1;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= b1 * d1;
-          sumImag += a1 * d1;
-
-          a0 = *(pIn1     );
-          c0 = *(pIn2     );
-          b0 = *(pIn1 + 1U);
-          d0 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += a0 * c0;
-          sumImag += b0 * c0;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= b0 * d0;
-          sumImag += a0 * d0;
-
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          a1 = *(pIn1     );
-          c1 = *(pIn2     );
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += a1 * c1;
-          sumImag += b1 * c1;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= b1 * d1;
-          sumImag += a1 * d1;
-
-          /* Decrement loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        colCnt = numColsA;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-          a1 = *(pIn1     );
-          c1 = *(pIn2     );
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += a1 * c1;
-          sumImag += b1 * c1;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= b1 * d1;
-          sumImag += a1 * d1;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Store result in destination buffer */
-        *px++ = sumReal;
-        *px++ = sumImag;
-
-        /* Update pointer pIn2 to point to starting address of next column */
-        j++;
-        pIn2 = pSrcB->pData + 2U * j;
-
-        /* Decrement column loop counter */
-        col--;
-
-      } while (col > 0U);
-
-      /* Update pointer pInA to point to starting address of next row */
-      i = i + numColsB;
-      pInA = pInA + 2 * numColsA;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_mult_f32.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup CmplxMatrixMult  Complex Matrix Multiplication
+
+  Complex Matrix multiplication is only defined if the number of columns of the
+  first matrix equals the number of rows of the second matrix.
+  Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
+  in an <code>M x P</code> matrix.
+  @par
+  When matrix size checking is enabled, the functions check:
+   - that the inner dimensions of <code>pSrcA</code> and <code>pSrcB</code> are equal;
+   - that the size of the output matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
+ */
+
+
+/**
+  @addtogroup CmplxMatrixMult
+  @{
+ */
+
+/**
+  @brief         Floating-point Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+#define MATRIX_DIM2 2
+#define MATRIX_DIM3 3
+#define MATRIX_DIM4 4
+
+__STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_2x2_mve(
+    const arm_matrix_instance_f32 * pSrcA,
+    const arm_matrix_instance_f32 * pSrcB,
+    arm_matrix_instance_f32 * pDst)
+{
+    float32_t const *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    float32_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    float32_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs0;
+    float32_t       *pInA0 = pInA;
+    float32_t       *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM2;
+    f32x4_t    acc0, acc1;
+    f32x4_t    vecB, vecA;
+
+    static const uint32_t offsetB0[4] = { 0, 1,
+        MATRIX_DIM2 * CMPLX_DIM, MATRIX_DIM2 * CMPLX_DIM + 1
+    };
+
+    vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0);
+
+    pInB = (float32_t const *)pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc1[1] + acc1[3];
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = acc1[1] + acc1[3];
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+__STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_3x3_mve(
+    const arm_matrix_instance_f32 * pSrcA,
+    const arm_matrix_instance_f32 * pSrcB,
+    arm_matrix_instance_f32 * pDst)
+{
+    float32_t const *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    float32_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    float32_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs0, vecColBOffs1;
+    float32_t       *pInA0 = pInA;
+    float32_t       *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM3;
+    float32_t       *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM3;
+    f32x4_t    acc0, acc1, acc2;
+    f32x4_t    vecB, vecA;
+    /* enable predication to disable upper half complex vector element */
+    mve_pred16_t p0 = vctp32q(CMPLX_DIM);
+
+    static const uint32_t offsetB0[4] = { 0, 1,
+        MATRIX_DIM3 * CMPLX_DIM, MATRIX_DIM3 * CMPLX_DIM + 1
+    };
+    static const uint32_t offsetB1[4] = { 2 * MATRIX_DIM3 * CMPLX_DIM, 2 * MATRIX_DIM3 * CMPLX_DIM + 1,
+       INACTIVELANE, INACTIVELANE
+    };
+
+    vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0);
+    vecColBOffs1 = vldrwq_u32((uint32_t const *) offsetB1);
+
+    pInB = (float32_t const *)pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+
+    vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0);
+
+    vecA = vldrwq_f32(&pInA0[4]);
+    acc0 = vcmlaq(acc0, vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA1[4]);
+    acc1 = vcmlaq(acc1, vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA2[4]);
+    acc2 = vcmlaq(acc2, vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3];
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+     vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0);
+
+    vecA = vldrwq_f32(&pInA0[4]);
+    acc0 = vcmlaq(acc0, vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA1[4]);
+    acc1 = vcmlaq(acc1, vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA2[4]);
+    acc2 = vcmlaq(acc2, vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3];
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+     vecB = vldrwq_gather_shifted_offset_z(pInB, vecColBOffs1, p0);
+
+    vecA = vldrwq_f32(&pInA0[4]);
+    acc0 = vcmlaq(acc0, vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA1[4]);
+    acc1 = vcmlaq(acc1, vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA2[4]);
+    acc2 = vcmlaq(acc2, vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc1[1] + acc1[3];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = acc2[0] + acc2[2];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = acc2[1] + acc2[3];
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+__STATIC_INLINE arm_status arm_mat_cmplx_mult_f32_4x4_mve(
+    const arm_matrix_instance_f32 * pSrcA,
+    const arm_matrix_instance_f32 * pSrcB,
+    arm_matrix_instance_f32 * pDst)
+{
+    float32_t const *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    float32_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    float32_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs0, vecColBOffs1;
+    float32_t       *pInA0 = pInA;
+    float32_t       *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM4;
+    float32_t       *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM4;
+    float32_t       *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM4;
+    f32x4_t    acc0, acc1, acc2, acc3;
+    f32x4_t    vecB, vecA;
+
+    static const uint32_t offsetB0[4] = { 0, 1,
+        MATRIX_DIM4 * CMPLX_DIM, MATRIX_DIM4 * CMPLX_DIM + 1
+    };
+    static const uint32_t offsetB1[4] = { 2 * MATRIX_DIM4 * CMPLX_DIM, 2 * MATRIX_DIM4 * CMPLX_DIM + 1,
+        3 * MATRIX_DIM4 * CMPLX_DIM, 3 * MATRIX_DIM4 * CMPLX_DIM + 1
+    };
+
+    vecColBOffs0 = vldrwq_u32((uint32_t const *) offsetB0);
+    vecColBOffs1 = vldrwq_u32((uint32_t const *) offsetB1);
+
+    pInB = (float32_t const *)pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_f32(&pInA0[4]);
+    acc0 = vcmlaq(acc0, vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA1[4]);
+    acc1 = vcmlaq(acc1, vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA2[4]);
+    acc2 = vcmlaq(acc2, vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA3[4]);
+    acc3 = vcmlaq(acc3, vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3];
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_f32(&pInA0[4]);
+    acc0 = vcmlaq(acc0, vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA1[4]);
+    acc1 = vcmlaq(acc1, vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA2[4]);
+    acc2 = vcmlaq(acc2, vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA3[4]);
+    acc3 = vcmlaq(acc3, vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3];
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_f32(&pInA0[4]);
+    acc0 = vcmlaq(acc0, vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA1[4]);
+    acc1 = vcmlaq(acc1, vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA2[4]);
+    acc2 = vcmlaq(acc2, vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA3[4]);
+    acc3 = vcmlaq(acc3, vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3];
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+
+    vecA = vldrwq_f32(pInA0);
+    acc0 = vcmulq(vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA1);
+    acc1 = vcmulq(vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA2);
+    acc2 = vcmulq(vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(pInA3);
+    acc3 = vcmulq(vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_f32(&pInA0[4]);
+    acc0 = vcmlaq(acc0, vecA, vecB);
+    acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA1[4]);
+    acc1 = vcmlaq(acc1, vecA, vecB);
+    acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA2[4]);
+    acc2 = vcmlaq(acc2, vecA, vecB);
+    acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+
+    vecA = vldrwq_f32(&pInA3[4]);
+    acc3 = vcmlaq(acc3, vecA, vecB);
+    acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc0[0] + acc0[2];
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc0[1] + acc0[3];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc1[0] + acc1[2];
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc1[1] + acc1[3];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc2[0] + acc2[2];
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc2[1] + acc2[3];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = acc3[0] + acc3[2];
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = acc3[1] + acc3[3];
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+    float32_t const *pInB = (float32_t const *) pSrcB->pData;   /* input data matrix pointer B */
+    float32_t const *pInA = (float32_t const *) pSrcA->pData;   /* input data matrix pointer A */
+    float32_t *pOut = pDst->pData;  /* output data matrix pointer */
+    float32_t *px;              /* Temporary output data matrix pointer */
+    uint16_t  numRowsA = pSrcA->numRows;    /* number of rows of input matrix A    */
+    uint16_t  numColsB = pSrcB->numCols;    /* number of columns of input matrix B */
+    uint16_t  numColsA = pSrcA->numCols;    /* number of columns of input matrix A */
+    uint16_t  col, i = 0U, row = numRowsA;  /* loop counters */
+    arm_status status;          /* status of matrix multiplication */
+    uint32x4_t vecOffs, vecColBOffs;
+    uint32_t  blkCnt, rowCnt;           /* loop counters */
+
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+  {
+
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /*
+     * small squared matrix specialized routines
+     */
+    if (numRowsA == numColsB && numColsB == numColsA)
+    {
+        if (numRowsA == 1)
+        {
+            pOut[0] = pInA[0] * pInB[0] - pInA[1] * pInB[1];
+            pOut[1] = pInA[0] * pInB[1] + pInA[1] * pInB[0];
+            return (ARM_MATH_SUCCESS);
+        }
+        else if (numRowsA == 2)
+            return arm_mat_cmplx_mult_f32_2x2_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 3)
+            return arm_mat_cmplx_mult_f32_3x3_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 4)
+            return arm_mat_cmplx_mult_f32_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+
+    vecColBOffs[0] = 0;
+    vecColBOffs[1] = 1;
+    vecColBOffs[2] = numColsB * CMPLX_DIM;
+    vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1;
+
+    /*
+     * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB
+     */
+
+    /*
+     * row loop
+     */
+    rowCnt = row >> 2;
+    while (rowCnt > 0u)
+    {
+        /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i * CMPLX_DIM;
+        i = i + 4 * numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (float32_t const *) pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec;
+            float32_t const *pInA0 = pInA;
+            float32_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM;
+            float32_t const *pInA2 = pInA1 + numColsA * CMPLX_DIM;
+            float32_t const *pInA3 = pInA2 + numColsA * CMPLX_DIM;
+            f32x4_t acc0, acc1, acc2, acc3;
+
+            acc0 = vdupq_n_f32(0.0f);
+            acc1 = vdupq_n_f32(0.0f);
+            acc2 = vdupq_n_f32(0.0f);
+            acc3 = vdupq_n_f32(0.0f);
+
+            pSrcA0Vec = (float32_t const *) pInA0;
+            pSrcA1Vec = (float32_t const *) pInA1;
+            pSrcA2Vec = (float32_t const *) pInA2;
+            pSrcA3Vec = (float32_t const *) pInA3;
+
+            vecOffs = vecColBOffs;
+
+            /*
+             * process 1 x 4 block output
+             */
+            blkCnt = (numColsA * CMPLX_DIM) >> 2;
+            while (blkCnt > 0U)
+            {
+                f32x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset(pInB, vecOffs);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM);
+
+                vecA = vld1q(pSrcA0Vec);  pSrcA0Vec += 4;
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+                vecA = vld1q(pSrcA1Vec); pSrcA1Vec += 4;
+                acc1 = vcmlaq(acc1, vecA, vecB);
+                acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+                vecA = vld1q(pSrcA2Vec);  pSrcA2Vec += 4;
+                acc2 = vcmlaq(acc2, vecA, vecB);
+                acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+                vecA = vld1q(pSrcA3Vec);  pSrcA3Vec += 4;
+                acc3 = vcmlaq(acc3, vecA, vecB);
+                acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+                blkCnt--;
+            }
+            
+
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+                f32x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM);
+
+                vecA = vld1q(pSrcA0Vec);
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+                vecA = vld1q(pSrcA1Vec);
+                acc1 = vcmlaq(acc1, vecA, vecB);
+                acc1 = vcmlaq_rot90(acc1, vecA, vecB);
+                vecA = vld1q(pSrcA2Vec);
+                acc2 = vcmlaq(acc2, vecA, vecB);
+                acc2 = vcmlaq_rot90(acc2, vecA, vecB);
+                vecA = vld1q(pSrcA3Vec);
+                acc3 = vcmlaq(acc3, vecA, vecB);
+                acc3 = vcmlaq_rot90(acc3, vecA, vecB);
+
+            }
+
+            px[0 * CMPLX_DIM * numColsB + 0] = acc0[0] + acc0[2];
+            px[0 * CMPLX_DIM * numColsB + 1] = acc0[1] + acc0[3];
+            px[1 * CMPLX_DIM * numColsB + 0] = acc1[0] + acc1[2];
+            px[1 * CMPLX_DIM * numColsB + 1] = acc1[1] + acc1[3];
+            px[2 * CMPLX_DIM * numColsB + 0] = acc2[0] + acc2[2];
+            px[2 * CMPLX_DIM * numColsB + 1] = acc2[1] + acc2[3];
+            px[3 * CMPLX_DIM * numColsB + 0] = acc3[0] + acc3[2];
+            px[3 * CMPLX_DIM * numColsB + 1] = acc3[1] + acc3[3];
+            px += CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (float32_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM;
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += (numColsA * 4) * CMPLX_DIM;
+        /*
+         * Decrement the row loop counter
+         */
+        rowCnt --;
+
+    }
+
+    rowCnt = row & 3;
+    while (rowCnt > 0u)
+    {
+           /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i * CMPLX_DIM;
+        i = i + numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (float32_t const *) pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            float32_t const *pSrcA0Vec;
+            float32_t const *pInA0 = pInA;
+            f32x4_t acc0;
+
+            acc0 = vdupq_n_f32(0.0f);
+
+            pSrcA0Vec = (float32_t const *) pInA0;
+           
+            vecOffs = vecColBOffs;
+
+            /*
+             * process 1 x 4 block output
+             */
+            blkCnt = (numColsA * CMPLX_DIM) >> 2;
+            while (blkCnt > 0U)
+            {
+                f32x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset(pInB, vecOffs);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM);
+
+                vecA = vld1q(pSrcA0Vec);  
+                pSrcA0Vec += 4;
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+                
+
+                blkCnt--;
+            }
+
+
+            /*
+             * tail
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+                f32x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0);
+               
+                vecA = vld1q(pSrcA0Vec);
+                acc0 = vcmlaq(acc0, vecA, vecB);
+                acc0 = vcmlaq_rot90(acc0, vecA, vecB);
+
+            }
+
+            px[0] = acc0[0] + acc0[2];
+            px[1] = acc0[1] + acc0[3];
+           
+            px += CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (float32_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM;
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += numColsA  * CMPLX_DIM;
+        rowCnt--;
+    }
+
+    
+      /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
+  float32_t sumReal1, sumImag1;                  /* accumulator */
+  float32_t a1, a1B,b1, b1B, c1, d1;
+  float32_t sumReal2, sumImag2;                  /* accumulator */
+
+
+  float32x4x2_t a0V, a1V;
+  float32x4_t accR0,accI0, accR1,accI1,tempR, tempI;
+  float32x2_t accum = vdup_n_f32(0);
+  float32_t *pIn1B = pSrcA->pData;    
+
+  uint16_t col, i = 0U, j, rowCnt, row = numRowsA, colCnt;      /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+  float32_t sumReal1B, sumImag1B; 
+  float32_t sumReal2B, sumImag2B; 
+  float32_t *pxB;  
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+  {
+
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+
+    rowCnt = row >> 1;
+
+    /* Row loop */
+    while (rowCnt > 0U)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+      pxB = px + 2 * numColsB;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      while (col > 0U)
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal1 = 0.0f;
+        sumImag1 = 0.0f;
+        sumReal1B = 0.0f;
+        sumImag1B = 0.0f;
+
+        sumReal2 = 0.0f;
+        sumImag2 = 0.0f;
+        sumReal2B = 0.0f;
+        sumImag2B = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+        pIn1B = pIn1 + 2*numColsA;
+
+        accR0 = vdupq_n_f32(0.0);
+        accI0 = vdupq_n_f32(0.0);
+        accR1 = vdupq_n_f32(0.0);
+        accI1 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* Reading real part of complex matrix A */
+          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          a1V = vld2q_f32(pIn1B);  // load & separate real/imag pSrcA (de-interleave 2)
+
+          pIn1 += 8;
+          pIn1B += 8;
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,0);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,0);
+          pIn2 += 2 * numColsB;
+
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,1);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,1);
+          pIn2 += 2 * numColsB;
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,2);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,2);
+          pIn2 += 2 * numColsB;
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,3);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,3);
+          pIn2 += 2 * numColsB;
+
+          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
+          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
+
+          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
+          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
+
+          accR1 = vmlaq_f32(accR1,a1V.val[0],tempR);
+          accR1 = vmlsq_f32(accR1,a1V.val[1],tempI);
+
+          accI1 = vmlaq_f32(accI1,a1V.val[1],tempR);
+          accI1 = vmlaq_f32(accI1,a1V.val[0],tempI);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
+        sumReal1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
+        sumImag1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(accR1), vget_high_f32(accR1));
+        sumReal1B += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(accI1), vget_high_f32(accI1));
+        sumImag1B += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a1 = *pIn1;
+          a1B = *pIn1B;
+
+          c1 = *pIn2;
+
+          b1 = *(pIn1 + 1U);
+          b1B = *(pIn1B + 1U);
+
+          d1 = *(pIn2 + 1U);
+
+          sumReal1 += a1 * c1;
+          sumImag1 += b1 * c1;
+
+          sumReal1B += a1B * c1;
+          sumImag1B += b1B * c1;
+
+          pIn1 += 2U;
+          pIn1B += 2U;
+          pIn2 += 2 * numColsB;
+
+          sumReal2 -= b1 * d1;
+          sumImag2 += a1 * d1;
+
+          sumReal2B -= b1B * d1;
+          sumImag2B += a1B * d1;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        sumReal1 += sumReal2;
+        sumImag1 += sumImag2;
+
+        sumReal1B += sumReal2B;
+        sumImag1B += sumImag2B;
+
+        /* Store the result in the destination buffer */
+        *px++ = sumReal1;
+        *px++ = sumImag1;
+        *pxB++ = sumReal1B;
+        *pxB++ = sumImag1B;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement the column loop counter */
+        col--;
+      } 
+
+      /* Update the pointer pInA to point to the  starting address of the next 2 row */
+      i = i + 2*numColsB;
+      pInA = pInA + 4 * numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+    }
+
+    rowCnt = row & 1;
+    while (rowCnt > 0U)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      while (col > 0U)
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal1 = 0.0f;
+        sumImag1 = 0.0f;
+
+        sumReal2 = 0.0f;
+        sumImag2 = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+
+        accR0 = vdupq_n_f32(0.0);
+        accI0 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* Reading real part of complex matrix A */
+          a0V = vld2q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          pIn1 += 8;
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,0);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,0);
+          pIn2 += 2 * numColsB;
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,1);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,1);
+          pIn2 += 2 * numColsB;
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,2);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,2);
+          pIn2 += 2 * numColsB;
+
+          tempR = vsetq_lane_f32(*pIn2,tempR,3);
+          tempI = vsetq_lane_f32(*(pIn2 + 1U),tempI,3);
+          pIn2 += 2 * numColsB;
+
+          accR0 = vmlaq_f32(accR0,a0V.val[0],tempR);
+          accR0 = vmlsq_f32(accR0,a0V.val[1],tempI);
+
+          accI0 = vmlaq_f32(accI0,a0V.val[1],tempR);
+          accI0 = vmlaq_f32(accI0,a0V.val[0],tempI);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(accR0), vget_high_f32(accR0));
+        sumReal1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(accI0), vget_high_f32(accI0));
+        sumImag1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a1 = *pIn1;
+          c1 = *pIn2;
+
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          sumReal1 += a1 * c1;
+          sumImag1 += b1 * c1;
+
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          sumReal2 -= b1 * d1;
+          sumImag2 += a1 * d1;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        sumReal1 += sumReal2;
+        sumImag1 += sumImag2;
+
+        /* Store the result in the destination buffer */
+        *px++ = sumReal1;
+        *px++ = sumImag1;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement the column loop counter */
+        col--;
+
+      } 
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_cmplx_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  float32_t sumReal, sumImag;                    /* Accumulator */
+  float32_t a1, b1, c1, d1;
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  float32_t a0, b0, c0, d0;
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal = 0.0f;
+        sumImag = 0.0f;
+
+        /* Initiate pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+
+          /* Reading real part of complex matrix A */
+          a0 = *pIn1;
+
+          /* Reading real part of complex matrix B */
+          c0 = *pIn2;
+
+          /* Reading imaginary part of complex matrix A */
+          b0 = *(pIn1 + 1U);
+
+          /* Reading imaginary part of complex matrix B */
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          a0 = *(pIn1     );
+          c0 = *(pIn2     );
+          b0 = *(pIn1 + 1U);
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a0 * c0;
+          sumImag += b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b0 * d0;
+          sumImag += a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop count */
+          colCnt--;
+        }
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += a1 * c1;
+          sumImag += b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= b1 * d1;
+          sumImag += a1 * d1;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sumReal;
+        *px++ = sumImag;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
index 9c417aa6..30e2f2f6 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q15.c
@@ -1,340 +1,595 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cmplx_mat_mult_q15.c
- * Description:  Q15 complex matrix multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup CmplxMatrixMult
-  @{
- */
-
-/**
-  @brief         Q15 Complex matrix multiplication.
-  @param[in]     pSrcA      points to first input complex matrix structure
-  @param[in]     pSrcB      points to second input complex matrix structure
-  @param[out]    pDst       points to output complex matrix structure
-  @param[in]     pScratch   points to an array for storing intermediate results
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Conditions for optimum performance
-                   Input, output and state buffers should be aligned by 32-bit
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator. The inputs to the
-                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
-                   truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
- */
-
-arm_status arm_mat_cmplx_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst,
-        q15_t                   * pScratch)
-{
-        q15_t *pSrcBT = pScratch;                      /* input data matrix pointer for transpose */
-        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
-        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
-        q15_t *px;                                     /* Temporary output data matrix pointer */
-        uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-        uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-        uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-        uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A */
-        q63_t sumReal, sumImag;                        /* accumulator */
-        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
-        arm_status status;                             /* Status of matrix multiplication */
-
-#if defined (ARM_MATH_DSP)
-        q31_t prod1, prod2;
-        q31_t pSourceA, pSourceB;
-#else
-        q15_t a, b, c, d;
-#endif /* #if defined (ARM_MATH_DSP) */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* The pointer px is set to starting address of column being processed */
-      px = pSrcBT + i;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Apply loop unrolling and exchange the columns with row elements */
-      col = numColsB >> 2;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-         a second loop below computes the remaining 1 to 3 samples. */
-      while (col > 0U)
-      {
-        /* Read two elements from row */
-        write_q15x2 (px, read_q15x2_ia (&pInB));
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from row */
-        write_q15x2 (px, read_q15x2_ia (&pInB));
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from row */
-        write_q15x2 (px, read_q15x2_ia (&pInB));
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB * 2;
-
-        /* Read two elements from row */
-        write_q15x2 (px, read_q15x2_ia (&pInB));
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        col = numColsB;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (col > 0U)
-      {
-        /* Read two elements from row */
-        write_q15x2 (px, read_q15x2_ia (&pInB));
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB * 2;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      i = i + 2U;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Reset variables for usage in following multiplication process */
-    row = numRowsA;
-    i = 0U;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set variable sum, that acts as accumulator, to zero */
-        sumReal = 0;
-        sumImag = 0;
-
-        /* Initiate pointer pInA to point to starting address of column being processed */
-        pInA = pSrcA->pData + i * 2;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 1U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-#if defined (ARM_MATH_DSP)
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
-          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
-          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-          /* read real and imag values from pSrcA buffer */
-          a = *pInA;
-          b = *(pInA + 1U);
-          /* read real and imag values from pSrcB buffer */
-          c = *pInB;
-          d = *(pInB + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a *c;
-          sumImag += (q31_t) a *d;
-          sumReal -= (q31_t) b *d;
-          sumImag += (q31_t) b *c;
-
-          /* read next real and imag values from pSrcA buffer */
-          a = *(pInA + 2U);
-          b = *(pInA + 3U);
-          /* read next real and imag values from pSrcB buffer */
-          c = *(pInB + 2U);
-          d = *(pInB + 3U);
-
-          /* update pointer */
-          pInA += 4U;
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a * c;
-          sumImag += (q31_t) a * d;
-          sumReal -= (q31_t) b * d;
-          sumImag += (q31_t) b * c;
-          /* update pointer */
-          pInB += 4U;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* process odd column samples */
-        if ((numColsA & 0x1U) > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-#if defined (ARM_MATH_DSP)
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
-          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
-
-          /* Multiply and Accumlates */
-#ifdef ARM_MATH_BIG_ENDIAN
-          prod1 = -__SMUSD(pSourceA, pSourceB);
-#else
-          prod1 = __SMUSD(pSourceA, pSourceB);
-#endif
-          prod2 = __SMUADX(pSourceA, pSourceB);
-          sumReal += (q63_t) prod1;
-          sumImag += (q63_t) prod2;
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          a = *pInA++;
-          b = *pInA++;
-          c = *pInB++;
-          d = *pInB++;
-
-          /* Multiply and Accumlates */
-          sumReal += (q31_t) a * c;
-          sumImag += (q31_t) a * d;
-          sumReal -= (q31_t) b * d;
-          sumImag += (q31_t) b * c;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-        }
-
-        /* Saturate and store result in destination buffer */
-        *px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
-        *px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
-
-        /* Decrement column loop counter */
-        col--;
-
-      } while (col > 0U);
-
-      i = i + numColsA;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cmplx_mat_mult_q15.c
+ * Description:  Q15 complex matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup CmplxMatrixMult
+  @{
+ */
+
+/**
+  @brief         Q15 Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @param[in]     pScratch   points to an array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Conditions for optimum performance
+                   Input, output and state buffers should be aligned by 32-bit
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator. The inputs to the
+                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow. The 34.30 result is then
+                   truncated to 34.15 format by discarding the low 15 bits and then saturated to 1.15 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MVE_ASRL_SAT16(acc, shift)          ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff)
+
+arm_status arm_mat_cmplx_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pScratch)
+{
+    q15_t const *pInA = (q15_t const *) pSrcA->pData;   /* input data matrix pointer A of Q15 type */
+    q15_t const *pInB = (q15_t const *) pSrcB->pData;   /* input data matrix pointer B of Q15 type */
+    q15_t const *pInB2;
+    q15_t       *px;               /* Temporary output data matrix pointer */
+    uint32_t     numRowsA = pSrcA->numRows;    /* number of rows of input matrix A    */
+    uint32_t     numColsB = pSrcB->numCols;    /* number of columns of input matrix B */
+    uint32_t     numColsA = pSrcA->numCols;    /* number of columns of input matrix A */
+    uint32_t     numRowsB = pSrcB->numRows;    /* number of rows of input matrix A    */
+    uint32_t     col, i = 0u, j, row = numRowsB;   /* loop counters */
+    uint32_t  blkCnt;           /* loop counters */
+    uint16x8_t vecOffs, vecColBOffs;
+    arm_status status;                             /* Status of matrix multiplication */
+    (void)pScratch;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    vecColBOffs[0] = 0;
+    vecColBOffs[1] = 1;
+    vecColBOffs[2] = numColsB * CMPLX_DIM;
+    vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1;
+    vecColBOffs[4] = 2 * numColsB * CMPLX_DIM;
+    vecColBOffs[5] = 2 * (numColsB * CMPLX_DIM) + 1;
+    vecColBOffs[6] = 3 * numColsB * CMPLX_DIM;
+    vecColBOffs[7] = 3 * (numColsB * CMPLX_DIM) + 1;
+
+    /*
+     * Reset the variables for the usage in the following multiplication process
+     */
+    i = 0;
+    row = numRowsA;
+    px = pDst->pData;
+
+    /*
+     * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB
+     */
+
+    /*
+     * row loop
+     */
+    while (row > 0u)
+    {
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB >> 1;
+        j = 0;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            q15_t const *pSrcAVec;
+            //, *pSrcBVec, *pSrcB2Vec;
+            q15x8_t vecA, vecB, vecB2;
+            q63_t     acc0, acc1, acc2, acc3;
+
+            /*
+             * Initiate the pointer pIn1 to point to the starting address of the column being processed
+             */
+            pInA = pSrcA->pData + i;
+            pInB = pSrcB->pData + j;
+            pInB2 = pInB + CMPLX_DIM;
+
+            j += 2 * CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+
+            /*
+             * Initiate the pointers
+             * - current Matrix A rows
+             * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB)
+             */
+            pSrcAVec = (q15_t const *) pInA;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+            acc2 = 0LL;
+            acc3 = 0LL;
+
+            vecOffs = vecColBOffs;
+          
+
+            blkCnt = (numColsA * CMPLX_DIM) >> 3;
+            while (blkCnt > 0U)
+            {
+                vecA = vld1q(pSrcAVec); 
+                pSrcAVec += 8;
+                vecB = vldrhq_gather_shifted_offset(pInB, vecOffs);
+
+                acc0 = vmlsldavaq_s16(acc0, vecA, vecB);
+                acc1 = vmlaldavaxq_s16(acc1, vecA, vecB);
+                vecB2 = vldrhq_gather_shifted_offset(pInB2, vecOffs);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM));
+
+                acc2 = vmlsldavaq_s16(acc2, vecA, vecB2);
+                acc3 = vmlaldavaxq_s16(acc3, vecA, vecB2);
+
+                blkCnt--;
+            }
+
+            /*
+             * tail
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 7;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp16q(blkCnt);
+                vecB = vldrhq_gather_shifted_offset(pInB, vecOffs);
+
+                vecA = vldrhq_z_s16(pSrcAVec, p0);
+
+                acc0 = vmlsldavaq_s16(acc0, vecA, vecB);
+                acc1 = vmlaldavaxq_s16(acc1, vecA, vecB);
+                vecB2 = vldrhq_gather_shifted_offset(pInB2, vecOffs);
+
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM));
+
+                acc2 = vmlsldavaq_s16(acc2, vecA, vecB2);
+                acc3 = vmlaldavaxq_s16(acc3, vecA, vecB2);
+
+            }
+            /*
+             * Convert to 1.15, Store the results (1 x 2 block) in the destination buffer
+             */
+            *px++ = (q15_t)MVE_ASRL_SAT16(acc0, 15);
+            *px++ = (q15_t)MVE_ASRL_SAT16(acc1, 15);
+            *px++ = (q15_t)MVE_ASRL_SAT16(acc2, 15);
+            *px++ = (q15_t)MVE_ASRL_SAT16(acc3, 15);
+        }
+
+        col = numColsB & 1;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+
+            q15_t const *pSrcAVec;
+            //, *pSrcBVec, *pSrcB2Vec;
+            q15x8_t vecA, vecB;
+            q63_t     acc0, acc1;
+
+            /*
+             * Initiate the pointer pIn1 to point to the starting address of the column being processed
+             */
+            pInA = pSrcA->pData + i;
+            pInB = pSrcB->pData + j;
+
+            j += CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+
+            /*
+             * Initiate the pointers
+             * - current Matrix A rows
+             * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB)
+             */
+            pSrcAVec = (q15_t const *) pInA;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+           
+
+            vecOffs = vecColBOffs;
+           
+            
+
+            blkCnt = (numColsA * CMPLX_DIM) >> 3;
+            while (blkCnt > 0U)
+            {
+                vecA = vld1q(pSrcAVec); 
+                pSrcAVec += 8;
+                vecB = vldrhq_gather_shifted_offset(pInB, vecOffs);
+
+                acc0 = vmlsldavaq_s16(acc0, vecA, vecB);
+                acc1 = vmlaldavaxq_s16(acc1, vecA, vecB);
+                /*
+                 * move Matrix B read offsets, 4 rows down
+                 */
+                vecOffs = vaddq_n_u16(vecOffs, (uint16_t) (numColsB * 4 * CMPLX_DIM));
+
+                blkCnt--;
+            }
+
+            /*
+             * tail
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 7;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp16q(blkCnt);
+                vecB = vldrhq_gather_shifted_offset(pInB, vecOffs);
+                vecA = vldrhq_z_s16(pSrcAVec, p0);
+
+                acc0 = vmlsldavaq_s16(acc0, vecA, vecB);
+                acc1 = vmlaldavaxq_s16(acc1, vecA, vecB);
+               
+            }
+            /*
+             * Convert to 1.15, Store the results (1 x 2 block) in the destination buffer
+             */
+            *px++ = (q15_t)MVE_ASRL_SAT16(acc0, 15);
+            *px++ = (q15_t)MVE_ASRL_SAT16(acc1, 15);
+           
+        }
+
+        i = i + numColsA * CMPLX_DIM;
+        
+        /*
+         * Decrement the row loop counter
+         */
+        row--;
+    }
+
+
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_cmplx_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pScratch)
+{
+        q15_t *pSrcBT = pScratch;                      /* input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* number of rows of input matrix A */
+        q63_t sumReal, sumImag;                        /* accumulator */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+
+#if defined (ARM_MATH_DSP)
+        q31_t prod1, prod2;
+        q31_t pSourceA, pSourceB;
+#else
+        q15_t a, b, c, d;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose */
+    do
+    {
+      /* The pointer px is set to starting address of column being processed */
+      px = pSrcBT + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Apply loop unrolling and exchange the columns with row elements */
+      col = numColsB >> 2;
+
+      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+         a second loop below computes the remaining 1 to 3 samples. */
+      while (col > 0U)
+      {
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
+       ** No loop unrolling is used. */
+      col = numColsB % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        col = numColsB;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read two elements from row */
+        write_q15x2 (px, read_q15x2_ia (&pInB));
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB * 2;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i = i + 2U;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Reset variables for usage in following multiplication process */
+    row = numRowsA;
+    i = 0U;
+    px = pDst->pData;
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
+      pInB = pSrcBT;
+
+      /* column loop */
+      do
+      {
+        /* Set variable sum, that acts as accumulator, to zero */
+        sumReal = 0;
+        sumImag = 0;
+
+        /* Initiate pointer pInA to point to starting address of column being processed */
+        pInA = pSrcA->pData + i * 2;
+
+        /* Apply loop unrolling and compute 2 MACs simultaneously. */
+        colCnt = numColsA >> 1U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+#if defined (ARM_MATH_DSP)
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+          /* read real and imag values from pSrcA buffer */
+          a = *pInA;
+          b = *(pInA + 1U);
+          /* read real and imag values from pSrcB buffer */
+          c = *pInB;
+          d = *(pInB + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q31_t) a *c;
+          sumImag += (q31_t) a *d;
+          sumReal -= (q31_t) b *d;
+          sumImag += (q31_t) b *c;
+
+          /* read next real and imag values from pSrcA buffer */
+          a = *(pInA + 2U);
+          b = *(pInA + 3U);
+          /* read next real and imag values from pSrcB buffer */
+          c = *(pInB + 2U);
+          d = *(pInB + 3U);
+
+          /* update pointer */
+          pInA += 4U;
+
+          /* Multiply and Accumlates */
+          sumReal += (q31_t) a * c;
+          sumImag += (q31_t) a * d;
+          sumReal -= (q31_t) b * d;
+          sumImag += (q31_t) b * c;
+          /* update pointer */
+          pInB += 4U;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* process odd column samples */
+        if ((numColsA & 0x1U) > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+#if defined (ARM_MATH_DSP)
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          pSourceA = read_q15x2_ia ((q15_t **) &pInA);
+          pSourceB = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumlates */
+#ifdef ARM_MATH_BIG_ENDIAN
+          prod1 = -__SMUSD(pSourceA, pSourceB);
+#else
+          prod1 = __SMUSD(pSourceA, pSourceB);
+#endif
+          prod2 = __SMUADX(pSourceA, pSourceB);
+          sumReal += (q63_t) prod1;
+          sumImag += (q63_t) prod2;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a = *pInA++;
+          b = *pInA++;
+          c = *pInB++;
+          d = *pInB++;
+
+          /* Multiply and Accumlates */
+          sumReal += (q31_t) a * c;
+          sumImag += (q31_t) a * d;
+          sumReal -= (q31_t) b * d;
+          sumImag += (q31_t) b * c;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+        }
+
+        /* Saturate and store result in destination buffer */
+        *px++ = (q15_t) (__SSAT(sumReal >> 15, 16));
+        *px++ = (q15_t) (__SSAT(sumImag >> 15, 16));
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      i = i + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
index 0060fcb7..ee784a6b 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_mult_q31.c
@@ -1,283 +1,1061 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_cmplx_mult_q31.c
- * Description:  Floating-point matrix multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup CmplxMatrixMult
-  @{
- */
-
-/**
-  @brief         Q31 Complex matrix multiplication.
-  @param[in]     pSrcA      points to first input complex matrix structure
-  @param[in]     pSrcB      points to second input complex matrix structure
-  @param[out]    pDst       points to output complex matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate
-                   multiplication results but provides only a single guard bit. There is no saturation
-                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
-                   distorts the result. The input signals should be scaled down to avoid intermediate
-                   overflows. The input is thus scaled down by log2(numColsA) bits
-                   to avoid overflows, as a total of numColsA additions are performed internally.
-                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
- */
-
-arm_status arm_mat_cmplx_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
-  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-  q63_t sumReal, sumImag;                        /* Accumulator */
-  q31_t a1, b1, c1, d1;
-  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  q31_t a0, b0, c0, d0;
-#endif
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + 2 * i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0U;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sumReal = 0.0;
-        sumImag = 0.0;
-
-        /* Initiate pointer pIn1 to point to starting address of column being processed */
-        pIn1 = pInA;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Apply loop unrolling and compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-
-          /* Reading real part of complex matrix A */
-          a0 = *pIn1;
-
-          /* Reading real part of complex matrix B */
-          c0 = *pIn2;
-
-          /* Reading imaginary part of complex matrix A */
-          b0 = *(pIn1 + 1U);
-
-          /* Reading imaginary part of complex matrix B */
-          d0 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += (q63_t) a0 * c0;
-          sumImag += (q63_t) b0 * c0;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= (q63_t) b0 * d0;
-          sumImag += (q63_t) a0 * d0;
-
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          a1 = *(pIn1     );
-          c1 = *(pIn2     );
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += (q63_t) a1 * c1;
-          sumImag += (q63_t) b1 * c1;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= (q63_t) b1 * d1;
-          sumImag += (q63_t) a1 * d1;
-
-          a0 = *(pIn1     );
-          c0 = *(pIn2     );
-          b0 = *(pIn1 + 1U);
-          d0 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += (q63_t) a0 * c0;
-          sumImag += (q63_t) b0 * c0;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= (q63_t) b0 * d0;
-          sumImag += (q63_t) a0 * d0;
-
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          a1 = *(pIn1     );
-          c1 = *(pIn2     );
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += (q63_t) a1 * c1;
-          sumImag += (q63_t) b1 * c1;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= (q63_t) b1 * d1;
-          sumImag += (q63_t) a1 * d1;
-
-          /* Decrement loop count */
-          colCnt--;
-        }
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4U;
-
-#else
-
-        /* Initialize blkCnt with number of samples */
-        colCnt = numColsA;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-          a1 = *(pIn1     );
-          c1 = *(pIn2     );
-          b1 = *(pIn1 + 1U);
-          d1 = *(pIn2 + 1U);
-
-          /* Multiply and Accumlates */
-          sumReal += (q63_t) a1 * c1;
-          sumImag += (q63_t) b1 * c1;
-
-          /* update pointers */
-          pIn1 += 2U;
-          pIn2 += 2 * numColsB;
-
-          /* Multiply and Accumlates */
-          sumReal -= (q63_t) b1 * d1;
-          sumImag += (q63_t) a1 * d1;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Store result in destination buffer */
-        *px++ = (q31_t) clip_q63_to_q31(sumReal >> 31);
-        *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31);
-
-        /* Update pointer pIn2 to point to starting address of next column */
-        j++;
-        pIn2 = pSrcB->pData + 2U * j;
-
-        /* Decrement column loop counter */
-        col--;
-
-      } while (col > 0U);
-
-      /* Update pointer pInA to point to starting address of next row */
-      i = i + numColsB;
-      pInA = pInA + 2 * numColsA;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_mult_q31.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup CmplxMatrixMult
+  @{
+ */
+
+/**
+  @brief         Q31 Complex matrix multiplication.
+  @param[in]     pSrcA      points to first input complex matrix structure
+  @param[in]     pSrcB      points to second input complex matrix structure
+  @param[out]    pDst       points to output complex matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit. There is no saturation
+                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
+                   distorts the result. The input signals should be scaled down to avoid intermediate
+                   overflows. The input is thus scaled down by log2(numColsA) bits
+                   to avoid overflows, as a total of numColsA additions are performed internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+#define MATRIX_DIM2 2
+#define MATRIX_DIM3 3
+#define MATRIX_DIM4 4
+
+__STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_2x2_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t const     *pInB = pSrcB->pData;   /* input data matrix pointer B */
+    q31_t const     *pInA = pSrcA->pData;   /* input data matrix pointer A */
+    q31_t           *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t     vecColBOffs0;
+    q31_t const     *pInA0 = pInA;
+    q31_t const     *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM2;
+    q63_t            acc0, acc1, acc2, acc3;
+    q31x4_t          vecB, vecA;
+
+    static const uint32_t offsetB0[4] = {
+        0, 1,
+        MATRIX_DIM2 * CMPLX_DIM, MATRIX_DIM2 * CMPLX_DIM + 1
+    };
+
+    vecColBOffs0 = vldrwq_u32(offsetB0);
+
+    pInB = (q31_t const *) pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc3, 31);
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    pOut += CMPLX_DIM;
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM2 + 1] = (q31_t) asrl(acc3, 31);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_3x3_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t const     *pInB = pSrcB->pData;   /* input data matrix pointer B */
+    q31_t const     *pInA = pSrcA->pData;   /* input data matrix pointer A */
+    q31_t           *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t     vecColBOffs0, vecColBOffs1;
+    q31_t const     *pInA0 = pInA;
+    q31_t const     *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM3;
+    q31_t const     *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM3;
+    q63_t            acc0, acc1, acc2, acc3;
+    q31x4_t          vecB, vecB1, vecA;
+    /*
+     * enable predication to disable upper half complex vector element
+     */
+    mve_pred16_t p0 = vctp32q(CMPLX_DIM);
+
+    static const uint32_t offsetB0[4] = {
+        0, 1,
+        MATRIX_DIM3 * CMPLX_DIM, MATRIX_DIM3 * CMPLX_DIM + 1
+    };
+    static const uint32_t offsetB1[4] = {
+        2 * MATRIX_DIM3 * CMPLX_DIM, 2 * MATRIX_DIM3 * CMPLX_DIM + 1,
+        INACTIVELANE, INACTIVELANE
+    };
+
+    vecColBOffs0 = vldrwq_u32(offsetB0);
+    vecColBOffs1 = vldrwq_u32(offsetB1);
+
+    pInB = (q31_t const *) pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_z_s32(&pInA0[4], p0);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_z_s32(&pInA1[4], p0);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31);
+
+    vecA = vldrwq_s32(pInA2);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_z_s32(&pInA2[4], p0);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31);
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_z_s32(&pInA0[4], p0);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_z_s32(&pInA1[4], p0);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31);
+
+    vecA = vldrwq_s32(pInA2);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_z_s32(&pInA2[4], p0);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31);
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_z_s32(&pInA0[4], p0);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_z_s32(&pInA1[4], p0);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc3, 31);
+
+    vecA = vldrwq_s32(pInA2);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_z_s32(&pInA2[4], p0);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[2 * CMPLX_DIM * MATRIX_DIM3 + 1] = (q31_t) asrl(acc1, 31);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_cmplx_mult_q31_4x4_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t const     *pInB = pSrcB->pData;   /* input data matrix pointer B */
+    q31_t const     *pInA = pSrcA->pData;   /* input data matrix pointer A */
+    q31_t           *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t    vecColBOffs0, vecColBOffs1;
+    q31_t const     *pInA0 = pInA;
+    q31_t const     *pInA1 = pInA0 + CMPLX_DIM * MATRIX_DIM4;
+    q31_t const     *pInA2 = pInA1 + CMPLX_DIM * MATRIX_DIM4;
+    q31_t const     *pInA3 = pInA2 + CMPLX_DIM * MATRIX_DIM4;
+    q63_t            acc0, acc1, acc2, acc3;
+    q31x4_t        vecB, vecB1, vecA;
+
+    static const uint32_t offsetB0[4] = {
+        0, 1,
+        MATRIX_DIM4 * CMPLX_DIM, MATRIX_DIM4 * CMPLX_DIM + 1
+    };
+    static const uint32_t offsetB1[4] = {
+        2 * MATRIX_DIM4 * CMPLX_DIM, 2 * MATRIX_DIM4 * CMPLX_DIM + 1,
+        3 * MATRIX_DIM4 * CMPLX_DIM, 3 * MATRIX_DIM4 * CMPLX_DIM + 1
+    };
+
+    vecColBOffs0 = vldrwq_u32(offsetB0);
+    vecColBOffs1 = vldrwq_u32(offsetB1);
+
+    pInB = (q31_t const *) pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA0[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA1[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+
+    vecA = vldrwq_s32(pInA2);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA3);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA2[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA3[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA0[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA1[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+
+    vecA = vldrwq_s32(pInA2);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA3);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA2[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA3[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+    pOut += CMPLX_DIM;
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA0[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA1[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+
+    vecA = vldrwq_s32(pInA2);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA3);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA2[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA3[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+    pOut += CMPLX_DIM;
+
+    /*
+     * move to next B column
+     */
+    pInB = pInB + CMPLX_DIM;
+
+    vecB = vldrwq_gather_shifted_offset(pInB, vecColBOffs0);
+    vecB1 = vldrwq_gather_shifted_offset(pInB, vecColBOffs1);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA1);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA0[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA1[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[0 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[1 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+
+    vecA = vldrwq_s32(pInA2);
+    acc0 = vmlsldavq_s32(vecA, vecB);
+    acc1 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(pInA3);
+    acc2 = vmlsldavq_s32(vecA, vecB);
+    acc3 = vmlaldavxq_s32(vecA, vecB);
+
+    vecA = vldrwq_s32(&pInA2[4]);
+    acc0 = vmlsldavaq_s32(acc0, vecA, vecB1);
+    acc1 = vmlaldavaxq_s32(acc1, vecA, vecB1);
+
+    vecA = vldrwq_s32(&pInA3[4]);
+    acc2 = vmlsldavaq_s32(acc2, vecA, vecB1);
+    acc3 = vmlaldavaxq_s32(acc3, vecA, vecB1);
+
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc0, 31);
+    pOut[2 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc1, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 0] = (q31_t) asrl(acc2, 31);
+    pOut[3 * CMPLX_DIM * MATRIX_DIM4 + 1] = (q31_t) asrl(acc3, 31);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+arm_status arm_mat_cmplx_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+    q31_t const *pInB = (q31_t const *) pSrcB->pData;   /* input data matrix pointer B */
+    q31_t const *pInA = (q31_t const *) pSrcA->pData;   /* input data matrix pointer A */
+    q31_t *pOut = pDst->pData;  /* output data matrix pointer */
+    q31_t *px;              /* Temporary output data matrix pointer */
+    uint16_t  numRowsA = pSrcA->numRows;    /* number of rows of input matrix A    */
+    uint16_t  numColsB = pSrcB->numCols;    /* number of columns of input matrix B */
+    uint16_t  numColsA = pSrcA->numCols;    /* number of columns of input matrix A */
+    uint16_t  col, i = 0U, row = numRowsA;  /* loop counters */
+    arm_status status;          /* status of matrix multiplication */
+    uint32x4_t vecOffs, vecColBOffs;
+    uint32_t  blkCnt, rowCnt;           /* loop counters */
+
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+  {
+
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /*
+     * small squared matrix specialized routines
+     */
+    if (numRowsA == numColsB && numColsB == numColsA)
+    {
+        if (numRowsA == 1)
+        {
+          q63_t sumReal = (q63_t) pInA[0] * pInB[0];
+          sumReal -= (q63_t) pInA[1] * pInB[1];
+
+          q63_t sumImag = (q63_t) pInA[0] * pInB[1];
+          sumImag += (q63_t) pInA[1] * pInB[0];
+       
+          /* Store result in destination buffer */
+          pOut[0] = (q31_t) clip_q63_to_q31(sumReal >> 31);
+          pOut[1] = (q31_t) clip_q63_to_q31(sumImag >> 31);
+          return (ARM_MATH_SUCCESS);
+        }
+        else if (numRowsA == 2)
+            return arm_mat_cmplx_mult_q31_2x2_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 3)
+            return arm_mat_cmplx_mult_q31_3x3_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 4)
+            return arm_mat_cmplx_mult_q31_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+
+    vecColBOffs[0] = 0;
+    vecColBOffs[1] = 1;
+    vecColBOffs[2] = numColsB * CMPLX_DIM;
+    vecColBOffs[3] = (numColsB * CMPLX_DIM) + 1;
+
+    /*
+     * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB
+     */
+
+    /*
+     * row loop
+     */
+    rowCnt = row >> 1;
+    while (rowCnt > 0u)
+    {
+        /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i * CMPLX_DIM;
+        i = i + 2 * numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (q31_t const *) pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            q31_t const *pSrcA0Vec, *pSrcA1Vec;
+            q31_t const *pInA0 = pInA;
+            q31_t const *pInA1 = pInA0 + numColsA * CMPLX_DIM;
+            q63_t   acc0, acc1, acc2, acc3;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+            acc2 = 0LL;
+            acc3 = 0LL;
+
+            pSrcA0Vec = (q31_t const *) pInA0;
+            pSrcA1Vec = (q31_t const *) pInA1;
+            
+
+            vecOffs = vecColBOffs;
+
+            /*
+             * process 1 x 2 block output
+             */
+            blkCnt = (numColsA * CMPLX_DIM) >> 2;
+            while (blkCnt > 0U)
+            {
+                q31x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset(pInB, vecOffs);
+                /*
+                 * move Matrix B read offsets, 2 rows down
+                 */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM);
+
+
+                vecA = vld1q(pSrcA0Vec);  
+                pSrcA0Vec += 4;
+                acc0 =  vmlsldavaq(acc0, vecA, vecB);
+                acc1 =  vmlaldavaxq(acc1, vecA, vecB);
+
+                
+                vecA = vld1q(pSrcA1Vec); 
+                pSrcA1Vec += 4;
+               
+                acc2 =  vmlsldavaq(acc2, vecA, vecB);
+                acc3 =  vmlaldavaxq(acc3, vecA, vecB);
+
+
+                blkCnt--;
+            }
+            
+
+            /*
+             * tail
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+                q31x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0);
+
+                /*
+                 * move Matrix B read offsets, 2 rows down
+                 */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM);
+               
+                
+                vecA = vld1q(pSrcA0Vec);
+                acc0 =  vmlsldavaq(acc0, vecA, vecB);
+                acc1 =  vmlaldavaxq(acc1, vecA, vecB);
+                vecA = vld1q(pSrcA1Vec);
+                acc2 =  vmlsldavaq(acc2, vecA, vecB);
+                acc3 =  vmlaldavaxq(acc3, vecA, vecB);
+                
+
+            }
+
+            px[0 * CMPLX_DIM * numColsB + 0] = (q31_t) clip_q63_to_q31(acc0 >> 31);
+            px[0 * CMPLX_DIM * numColsB + 1] = (q31_t) clip_q63_to_q31(acc1 >> 31);
+            px[1 * CMPLX_DIM * numColsB + 0] = (q31_t) clip_q63_to_q31(acc2 >> 31);
+            px[1 * CMPLX_DIM * numColsB + 1] = (q31_t) clip_q63_to_q31(acc3 >> 31);
+            px += CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (q31_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM;
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += (numColsA * 2) * CMPLX_DIM;
+        /*
+         * Decrement the row loop counter
+         */
+        rowCnt --;
+
+    }
+
+    rowCnt = row & 1;
+    while (rowCnt > 0u)
+    {
+        /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i * CMPLX_DIM;
+        i = i + numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (q31_t const *) pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            q31_t const *pSrcA0Vec;
+            q31_t const *pInA0 = pInA;
+            q63_t acc0,acc1;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+
+            pSrcA0Vec = (q31_t const *) pInA0;
+           
+            vecOffs = vecColBOffs;
+
+            /*
+             * process 1 x 2 block output
+             */
+            blkCnt = (numColsA * CMPLX_DIM) >> 2;
+            while (blkCnt > 0U)
+            {
+                q31x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset(pInB, vecOffs);
+                /*
+                 * move Matrix B read offsets, 2 rows down
+                 */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM);
+               
+                vecA = vld1q(pSrcA0Vec);  
+                pSrcA0Vec += 4;
+                acc0 =  vmlsldavaq(acc0, vecA, vecB);
+                acc1 =  vmlaldavaxq(acc1, vecA, vecB);
+                
+
+                blkCnt--;
+            }
+
+
+            /*
+             * tail
+             */
+            blkCnt = (numColsA * CMPLX_DIM) & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+                q31x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0);
+
+                /*
+                 * move Matrix B read offsets, 2 rows down
+                 */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 2 * CMPLX_DIM);
+               
+                vecA = vld1q(pSrcA0Vec);
+               
+
+                acc0 =  vmlsldavaq(acc0, vecA, vecB);
+                acc1 =  vmlaldavaxq(acc1, vecA, vecB);
+
+
+            }
+
+            px[0] = (q31_t) clip_q63_to_q31(acc0 >> 31);
+            px[1] = (q31_t) clip_q63_to_q31(acc1 >> 31);
+
+           
+            px += CMPLX_DIM;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (q31_t const *) pSrcB->pData + (numColsB - col) * CMPLX_DIM;
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += numColsA  * CMPLX_DIM;
+        rowCnt--;
+    }
+
+    
+      /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_cmplx_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  q63_t sumReal, sumImag;                        /* Accumulator */
+  q31_t a1, b1, c1, d1;
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt; /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t a0, b0, c0, d0;
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + 2 * i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sumReal = 0.0;
+        sumImag = 0.0;
+
+        /* Initiate pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Apply loop unrolling and compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+
+          /* Reading real part of complex matrix A */
+          a0 = *pIn1;
+
+          /* Reading real part of complex matrix B */
+          c0 = *pIn2;
+
+          /* Reading imaginary part of complex matrix A */
+          b0 = *(pIn1 + 1U);
+
+          /* Reading imaginary part of complex matrix B */
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a0 * c0;
+          sumImag += (q63_t) b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b0 * d0;
+          sumImag += (q63_t) a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
+
+          a0 = *(pIn1     );
+          c0 = *(pIn2     );
+          b0 = *(pIn1 + 1U);
+          d0 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a0 * c0;
+          sumImag += (q63_t) b0 * c0;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b0 * d0;
+          sumImag += (q63_t) a0 * d0;
+
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
+
+          /* Decrement loop count */
+          colCnt--;
+        }
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize blkCnt with number of samples */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          a1 = *(pIn1     );
+          c1 = *(pIn2     );
+          b1 = *(pIn1 + 1U);
+          d1 = *(pIn2 + 1U);
+
+          /* Multiply and Accumlates */
+          sumReal += (q63_t) a1 * c1;
+          sumImag += (q63_t) b1 * c1;
+
+          /* update pointers */
+          pIn1 += 2U;
+          pIn2 += 2 * numColsB;
+
+          /* Multiply and Accumlates */
+          sumReal -= (q63_t) b1 * d1;
+          sumImag += (q63_t) a1 * d1;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = (q31_t) clip_q63_to_q31(sumReal >> 31);
+        *px++ = (q31_t) clip_q63_to_q31(sumImag >> 31);
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        j++;
+        pIn2 = pSrcB->pData + 2U * j;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + 2 * numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f16.c
new file mode 100755
index 00000000..5eda8c3c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f16.c
@@ -0,0 +1,131 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_trans_f16.c
+ * Description:  Floating-point complex matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixComplexTrans
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_cmplx_trans_f16(const arm_matrix_instance_f16 * pSrc, arm_matrix_instance_f16 * pDst)
+{
+    return arm_mat_cmplx_trans_16bit(pSrc->numRows, pSrc->numCols, (uint16_t *) pSrc->pData,
+                                   pDst->numRows, pDst->numCols, (uint16_t *) pDst->pData);
+}
+
+#else
+arm_status arm_mat_cmplx_trans_f16(
+  const arm_matrix_instance_f16 * pSrc,
+  arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float16_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float16_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nColumns = pSrc->numCols;             /* number of columns */
+  uint16_t col, i = 0U, row = nRows;             /* loop counters */
+  arm_status status;                             /* status of matrix transpose  */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop     */
+    do
+    {
+      /* The pointer px is set to starting address of the column being processed */
+      px = pOut + CMPLX_DIM * i;
+
+      /* Initialize column loop counter */
+      col = nColumns;
+
+      while (col > 0U)
+      {
+        /* Read and store the input element in the destination */
+        px[0] = *pIn++; // real
+        px[1] = *pIn++; // imag
+
+        /* Update the pointer px to point to the next row of the transposed matrix */
+        px += CMPLX_DIM * nRows;
+
+        /* Decrement the column loop counter */
+        col--;
+      }
+      i++;
+
+      /* Decrement the row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end  */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixTrans group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f32.c
new file mode 100755
index 00000000..222f349e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_f32.c
@@ -0,0 +1,133 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_trans_f32.c
+ * Description:  Floating-point complex matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixComplexTrans Complex Matrix Transpose
+
+  Tranposes a complex matrix.
+
+  Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
+  \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
+ */
+
+/**
+  @addtogroup MatrixComplexTrans
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_cmplx_trans_f32(const arm_matrix_instance_f32 * pSrc, arm_matrix_instance_f32 * pDst)
+{
+    return arm_mat_cmplx_trans_32bit(pSrc->numRows, pSrc->numCols, (uint32_t *) pSrc->pData,
+                                   pDst->numRows, pDst->numCols, (uint32_t *) pDst->pData);
+}
+
+#else
+arm_status arm_mat_cmplx_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nColumns = pSrc->numCols;             /* number of columns */
+  uint16_t col, i = 0U, row = nRows;             /* loop counters */
+  arm_status status;                             /* status of matrix transpose  */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop     */
+    do
+    {
+      /* The pointer px is set to starting address of the column being processed */
+      px = pOut + CMPLX_DIM * i;
+
+      /* Initialize column loop counter */
+      col = nColumns;
+
+      while (col > 0U)
+      {
+        /* Read and store the input element in the destination */
+        px[0] = *pIn++; // real
+        px[1] = *pIn++; // imag
+
+        /* Update the pointer px to point to the next row of the transposed matrix */
+        px += CMPLX_DIM * nRows;
+
+        /* Decrement the column loop counter */
+        col--;
+      }
+      i++;
+
+      /* Decrement the row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end  */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q15.c
new file mode 100755
index 00000000..8a3724ee
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q15.c
@@ -0,0 +1,124 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_trans_q31.c
+ * Description:  Q15 complex matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixComplexTrans
+  @{
+ */
+
+/**
+  @brief         Q15 complex matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_cmplx_trans_q15(const arm_matrix_instance_q15 * pSrc, arm_matrix_instance_q15 * pDst)
+{
+    return arm_mat_cmplx_trans_16bit(pSrc->numRows, pSrc->numCols, (uint16_t *) pSrc->pData,
+                                   pDst->numRows, pDst->numCols, (uint16_t *) pDst->pData);
+}
+
+
+#else
+arm_status arm_mat_cmplx_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+  arm_matrix_instance_q15 * pDst)
+{
+  q15_t *pSrcA = pSrc->pData;                    /* input data matrix pointer */
+  q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of nRows */
+  uint16_t nColumns = pSrc->numCols;             /* number of nColumns */
+  uint16_t col, row = nRows, i = 0U;             /* row and column loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop     */
+    do
+    {
+      /* The pointer pOut is set to starting address of the column being processed */
+      pOut = pDst->pData + CMPLX_DIM * i;
+
+      /* Initialize column loop counter */
+      col = nColumns;
+
+      while (col > 0U)
+      {
+        /* Read and store the input element in the destination */
+        pOut[0] = *pSrcA++; //real
+        pOut[1] = *pSrcA++; //imag
+
+        /* Update the pointer pOut to point to the next row of the transposed matrix */
+        pOut += CMPLX_DIM *nRows;
+
+        /* Decrement the column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement the row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+ * @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q31.c
new file mode 100755
index 00000000..a8612a30
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_cmplx_trans_q31.c
@@ -0,0 +1,129 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_cmplx_trans_q31.c
+ * Description:  Q31 complex matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+
+/**
+  @addtogroup MatrixComplexTrans
+  @{
+ */
+
+/**
+  @brief         Q31 complex matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+arm_status arm_mat_cmplx_trans_q31(const arm_matrix_instance_q31 * pSrc, arm_matrix_instance_q31 * pDst)
+{
+    return arm_mat_cmplx_trans_32bit(pSrc->numRows, pSrc->numCols, (uint32_t *) pSrc->pData,
+                                   pDst->numRows, pDst->numCols, (uint32_t *) pDst->pData);
+}
+
+
+#else
+arm_status arm_mat_cmplx_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+  arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer  */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer  */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of nRows */
+  uint16_t nColumns = pSrc->numCols;             /* number of nColumns  */
+  uint16_t col, i = 0U, row = nRows;             /* loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop     */
+    do
+    {
+      /* The pointer px is set to starting address of the column being processed */
+      px = pOut + CMPLX_DIM * i;
+
+      /* Initialize column loop counter */
+      col = nColumns;
+
+      while (col > 0U)
+      {
+        /* Read and store the input element in the destination */
+        px[0] = *pIn++; // real
+        px[1] = *pIn++; // imag
+
+        /* Update the pointer px to point to the next row of the transposed matrix */
+        px += CMPLX_DIM * nRows;
+
+        /* Decrement the column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement the row loop counter */
+      row--;
+
+    }
+    while (row > 0U);            /* row loop end */
+
+    /* set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+ * @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f16.c
new file mode 100755
index 00000000..6a48102d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f16.c
@@ -0,0 +1,74 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_init_f16.c
+ * Description:  Floating-point matrix initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInit
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix initialization.
+  @param[in,out] S         points to an instance of the floating-point matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
+
+void arm_mat_init_f16(
+  arm_matrix_instance_f16 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  float16_t * pData)
+{
+  /* Assign Number of Rows */
+  S->numRows = nRows;
+
+  /* Assign Number of Columns */
+  S->numCols = nColumns;
+
+  /* Assign Data pointer */
+  S->pData = pData;
+}
+
+/**
+  @} end of MatrixInit group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
index 5fcd1219..d2a52013 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_f32.c
@@ -1,76 +1,76 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_init_f32.c
- * Description:  Floating-point matrix initialization
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup MatrixInit Matrix Initialization
- 
-  Initializes the underlying matrix data structure.
-  The functions set the <code>numRows</code>,
-  <code>numCols</code>, and <code>pData</code> fields
-  of the matrix data structure.
- */
-
-/**
-  @addtogroup MatrixInit
-  @{
- */
-
-/**
-  @brief         Floating-point matrix initialization.
-  @param[in,out] S         points to an instance of the floating-point matrix structure
-  @param[in]     nRows     number of rows in the matrix
-  @param[in]     nColumns  number of columns in the matrix
-  @param[in]     pData     points to the matrix data array
-  @return        none
- */
-
-void arm_mat_init_f32(
-  arm_matrix_instance_f32 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  float32_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**
-  @} end of MatrixInit group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_init_f32.c
+ * Description:  Floating-point matrix initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixInit Matrix Initialization
+ 
+  Initializes the underlying matrix data structure.
+  The functions set the <code>numRows</code>,
+  <code>numCols</code>, and <code>pData</code> fields
+  of the matrix data structure.
+ */
+
+/**
+  @addtogroup MatrixInit
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix initialization.
+  @param[in,out] S         points to an instance of the floating-point matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
+
+void arm_mat_init_f32(
+  arm_matrix_instance_f32 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  float32_t * pData)
+{
+  /* Assign Number of Rows */
+  S->numRows = nRows;
+
+  /* Assign Number of Columns */
+  S->numCols = nColumns;
+
+  /* Assign Data pointer */
+  S->pData = pData;
+}
+
+/**
+  @} end of MatrixInit group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
index 28d8d65a..33942b50 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q15.c
@@ -1,67 +1,67 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_init_q15.c
- * Description:  Q15 matrix initialization
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixInit
-  @{
- */
-
-/**
-  @brief         Q15 matrix initialization.
-  @param[in,out] S         points to an instance of the floating-point matrix structure
-  @param[in]     nRows     number of rows in the matrix
-  @param[in]     nColumns  number of columns in the matrix
-  @param[in]     pData     points to the matrix data array
-  @return        none
- */
-
-void arm_mat_init_q15(
-  arm_matrix_instance_q15 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q15_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**
-  @} end of MatrixInit group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_init_q15.c
+ * Description:  Q15 matrix initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixInit
+  @{
+ */
+
+/**
+  @brief         Q15 matrix initialization.
+  @param[in,out] S         points to an instance of the floating-point matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
+
+void arm_mat_init_q15(
+  arm_matrix_instance_q15 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  q15_t * pData)
+{
+  /* Assign Number of Rows */
+  S->numRows = nRows;
+
+  /* Assign Number of Columns */
+  S->numCols = nColumns;
+
+  /* Assign Data pointer */
+  S->pData = pData;
+}
+
+/**
+  @} end of MatrixInit group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
index b691edea..ab735d06 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_init_q31.c
@@ -1,72 +1,72 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_init_q31.c
- * Description:  Q31 matrix initialization
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup MatrixInit Matrix Initialization
- 
- */
-
-/**
-  @addtogroup MatrixInit
-  @{
- */
-
-/**
-  @brief         Q31 matrix initialization.
-  @param[in,out] S         points to an instance of the Q31 matrix structure
-  @param[in]     nRows     number of rows in the matrix
-  @param[in]     nColumns  number of columns in the matrix
-  @param[in]     pData     points to the matrix data array
-  @return        none
- */
-
-void arm_mat_init_q31(
-  arm_matrix_instance_q31 * S,
-  uint16_t nRows,
-  uint16_t nColumns,
-  q31_t * pData)
-{
-  /* Assign Number of Rows */
-  S->numRows = nRows;
-
-  /* Assign Number of Columns */
-  S->numCols = nColumns;
-
-  /* Assign Data pointer */
-  S->pData = pData;
-}
-
-/**
-  @} end of MatrixInit group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_init_q31.c
+ * Description:  Q31 matrix initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixInit Matrix Initialization
+ 
+ */
+
+/**
+  @addtogroup MatrixInit
+  @{
+ */
+
+/**
+  @brief         Q31 matrix initialization.
+  @param[in,out] S         points to an instance of the Q31 matrix structure
+  @param[in]     nRows     number of rows in the matrix
+  @param[in]     nColumns  number of columns in the matrix
+  @param[in]     pData     points to the matrix data array
+  @return        none
+ */
+
+void arm_mat_init_q31(
+  arm_matrix_instance_q31 * S,
+  uint16_t nRows,
+  uint16_t nColumns,
+  q31_t * pData)
+{
+  /* Assign Number of Rows */
+  S->numRows = nRows;
+
+  /* Assign Number of Columns */
+  S->numCols = nColumns;
+
+  /* Assign Data pointer */
+  S->pData = pData;
+}
+
+/**
+  @} end of MatrixInit group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f16.c
new file mode 100755
index 00000000..90bc06d0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f16.c
@@ -0,0 +1,891 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_inverse_f16.c
+ * Description:  Floating-point matrix inverse
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix inverse.
+  @param[in]     pSrc      points to input matrix structure. The source matrix is modified by the function.
+  @param[out]    pDst      points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_inverse_f16(
+  const arm_matrix_instance_f16 * pSrc,
+  arm_matrix_instance_f16 * pDst)
+{
+    float16_t *pIn = pSrc->pData;   /* input data matrix pointer */
+    float16_t *pOut = pDst->pData;  /* output data matrix pointer */
+    float16_t *pInT1, *pInT2;   /* Temporary input data matrix pointer */
+    float16_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */
+    float16_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;    /* Temporary input and output data matrix pointer */
+
+    uint32_t  numRows = pSrc->numRows;  /* Number of rows in the matrix  */
+    uint32_t  numCols = pSrc->numCols;  /* Number of Cols in the matrix  */
+    float16_t *pTmpA, *pTmpB;
+
+    _Float16 in = 0.0f16;        /* Temporary input values  */
+    uint32_t  i, rowCnt, flag = 0U, j, loopCnt, l;   /* loop counters */
+    arm_status status;          /* status of matrix inverse */
+    uint32_t  blkCnt;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+   /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
+     || (pSrc->numRows != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *     1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+        /*
+         * Working pointer for destination matrix
+         */
+        pOutT1 = pOut;
+        /*
+         * Loop over the number of rows
+         */
+        rowCnt = numRows;
+        /*
+         * Making the destination matrix as identity matrix
+         */
+        while (rowCnt > 0U)
+        {
+            /*
+             * Writing all zeroes in lower triangle of the destination matrix
+             */
+            j = numRows - rowCnt;
+            while (j > 0U)
+            {
+                *pOutT1++ = 0.0f16;
+                j--;
+            }
+            /*
+             * Writing all ones in the diagonal of the destination matrix
+             */
+            *pOutT1++ = 1.0f16;
+            /*
+             * Writing all zeroes in upper triangle of the destination matrix
+             */
+            j = rowCnt - 1U;
+            while (j > 0U)
+            {
+                *pOutT1++ = 0.0f16;
+                j--;
+            }
+            /*
+             * Decrement the loop counter
+             */
+            rowCnt--;
+        }
+
+        /*
+         * Loop over the number of columns of the input matrix.
+         * All the elements in each column are processed by the row operations
+         */
+        loopCnt = numCols;
+        /*
+         * Index modifier to navigate through the columns
+         */
+        l = 0U;
+        while (loopCnt > 0U)
+        {
+            /*
+             * Check if the pivot element is zero..
+             * If it is zero then interchange the row with non zero row below.
+             * If there is no non zero element to replace in the rows below,
+             * then the matrix is Singular.
+             */
+
+            /*
+             * Working pointer for the input matrix that points
+             * * to the pivot element of the particular row
+             */
+            pInT1 = pIn + (l * numCols);
+            /*
+             * Working pointer for the destination matrix that points
+             * * to the pivot element of the particular row
+             */
+            pOutT1 = pOut + (l * numCols);
+            /*
+             * Temporary variable to hold the pivot value
+             */
+            in = *pInT1;
+            
+
+            /*
+             * Check if the pivot element is zero
+             */
+            if ((_Float16)*pInT1 == 0.0f16)
+            {
+                /*
+                 * Loop over the number rows present below
+                 */
+                for (i = 1U; i < numRows-l; i++)
+                {
+                    /*
+                     * Update the input and destination pointers
+                     */
+                    pInT2 = pInT1 + (numCols * i);
+                    pOutT2 = pOutT1 + (numCols * i);
+                    /*
+                     * Check if there is a non zero pivot element to
+                     * * replace in the rows below
+                     */
+                    if ((_Float16)*pInT2 != 0.0f16)
+                    {
+                        f16x8_t vecA, vecB;
+                        /*
+                         * Loop over number of columns
+                         * * to the right of the pilot element
+                         */
+                        pTmpA = pInT1;
+                        pTmpB = pInT2;
+                        blkCnt = (numCols - l) >> 3;
+                        while (blkCnt > 0U)
+                        {
+                            
+                            vecA = vldrhq_f16(pTmpA);
+                            vecB = vldrhq_f16(pTmpB);
+                            vstrhq_f16(pTmpB, vecA);
+                            vstrhq_f16(pTmpA, vecB);
+
+                            pTmpA += 8;
+                            pTmpB += 8;
+                            /*
+                             * Decrement the blockSize loop counter
+                             */
+                            blkCnt--;
+                        }
+                        /*
+                         * tail
+                         * (will be merged thru tail predication)
+                         */
+                        blkCnt = (numCols - l) & 7;
+                        if (blkCnt > 0U)
+                        {
+                            mve_pred16_t p0 = vctp16q(blkCnt);
+
+                            vecA = vldrhq_f16(pTmpA);
+                            vecB = vldrhq_f16(pTmpB);
+                            vstrhq_p_f16(pTmpB, vecA, p0);
+                            vstrhq_p_f16(pTmpA, vecB, p0);
+                        }
+
+                        pInT1 += numCols - l;
+                        pInT2 += numCols - l;
+                        pTmpA = pOutT1;
+                        pTmpB = pOutT2;
+                        blkCnt = numCols >> 3;
+                        while (blkCnt > 0U)
+                        {
+
+                            vecA = vldrhq_f16(pTmpA);
+                            vecB = vldrhq_f16(pTmpB);
+                            vstrhq_f16(pTmpB, vecA);
+                            vstrhq_f16(pTmpA, vecB);
+                            pTmpA += 8;
+                            pTmpB += 8;
+                            /*
+                             * Decrement the blockSize loop counter
+                             */
+                            blkCnt--;
+                        }
+                        /*
+                         * tail
+                         */
+                        blkCnt = numCols & 7;
+                        if (blkCnt > 0U)
+                        {
+                            mve_pred16_t p0 = vctp16q(blkCnt);
+
+                            vecA = vldrhq_f16(pTmpA);
+                            vecB = vldrhq_f16(pTmpB);
+                            vstrhq_p_f16(pTmpB, vecA, p0);
+                            vstrhq_p_f16(pTmpA, vecB, p0);
+                        }
+
+                        pOutT1 += numCols;
+                        pOutT2 += numCols;
+                        /*
+                         * Flag to indicate whether exchange is done or not
+                         */
+                        flag = 1U;
+
+                        /*
+                         * Break after exchange is done
+                         */
+                        break;
+                    }
+              
+                }
+            }
+
+            /*
+             * Update the status if the matrix is singular
+             */
+            if ((flag != 1U) && (in == 0.0f16))
+            {
+                return ARM_MATH_SINGULAR;
+            }
+
+            /*
+             * Points to the pivot row of input and destination matrices
+             */
+            pPivotRowIn = pIn + (l * numCols);
+            pPivotRowDst = pOut + (l * numCols);
+
+            /*
+             * Temporary pointers to the pivot row pointers
+             */
+            pInT1 = pPivotRowIn;
+            pOutT1 = pPivotRowDst;
+
+            /*
+             * Pivot element of the row
+             */
+            in = *(pIn + (l * numCols));
+
+            pTmpA = pInT1;
+
+            f16x8_t invIn = vdupq_n_f16(1.0f16 / in);
+
+            blkCnt = (numCols - l) >> 3;
+            f16x8_t vecA;
+            while (blkCnt > 0U)
+            {
+                *(f16x8_t *) pTmpA = *(f16x8_t *) pTmpA * invIn;
+                pTmpA += 8;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+            /*
+             * tail
+             */
+            blkCnt = (numCols - l) & 7;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp16q(blkCnt);
+                
+
+                vecA = vldrhq_f16(pTmpA);
+                vecA = vecA * invIn;
+                vstrhq_p_f16(pTmpA, vecA, p0);
+            }
+
+            pInT1 += numCols - l;
+            /*
+             * Loop over number of columns
+             * * to the right of the pilot element
+             */
+
+            pTmpA = pOutT1;
+            blkCnt = numCols >> 3;
+            while (blkCnt > 0U)
+            {
+                *(f16x8_t *) pTmpA = *(f16x8_t *) pTmpA *invIn;
+                pTmpA += 8;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = numCols & 7;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp16q(blkCnt);
+
+                vecA = vldrhq_f16(pTmpA);
+                vecA = vecA * invIn;
+                vstrhq_p_f16(pTmpA, vecA, p0);
+            }
+
+            pOutT1 += numCols;
+
+            /*
+             * Replace the rows with the sum of that row and a multiple of row i
+             * * so that each new element in column i above row i is zero.
+             */
+
+            /*
+             * Temporary pointers for input and destination matrices
+             */
+            pInT1 = pIn;
+            pOutT1 = pOut;
+
+            for (i = 0U; i < numRows; i++)
+            {
+                /*
+                 * Check for the pivot element
+                 */
+                if (i == l)
+                {
+                    /*
+                     * If the processing element is the pivot element,
+                     * only the columns to the right are to be processed
+                     */
+                    pInT1 += numCols - l;
+                    pOutT1 += numCols;
+                }
+                else
+                {
+                    /*
+                     * Element of the reference row
+                     */
+
+                    /*
+                     * Working pointers for input and destination pivot rows
+                     */
+                    pPRT_in = pPivotRowIn;
+                    pPRT_pDst = pPivotRowDst;
+                    /*
+                     * Loop over the number of columns to the right of the pivot element,
+                     * to replace the elements in the input matrix
+                     */
+
+                    in = *pInT1;
+                    f16x8_t tmpV = vdupq_n_f16(in);
+
+                    blkCnt = (numCols - l) >> 3;
+                    while (blkCnt > 0U)
+                    {
+                        f16x8_t vec1, vec2;
+                        /*
+                         * Replace the element by the sum of that row
+                         * and a multiple of the reference row
+                         */
+                        vec1 = vldrhq_f16(pInT1);
+                        vec2 = vldrhq_f16(pPRT_in);
+                        vec1 = vfmsq_f16(vec1, tmpV, vec2);
+                        vstrhq_f16(pInT1, vec1);
+                        pPRT_in += 8;
+                        pInT1 += 8;
+                        /*
+                         * Decrement the blockSize loop counter
+                         */
+                        blkCnt--;
+                    }
+                    /*
+                     * tail
+                     * (will be merged thru tail predication)
+                     */
+                    blkCnt = (numCols - l) & 7;
+                    if (blkCnt > 0U)
+                    {
+                        f16x8_t vec1, vec2;
+                        mve_pred16_t p0 = vctp16q(blkCnt);
+
+                        vec1 = vldrhq_f16(pInT1);
+                        vec2 = vldrhq_f16(pPRT_in);
+                        vec1 = vfmsq_f16(vec1, tmpV, vec2);
+                        vstrhq_p_f16(pInT1, vec1, p0);
+                        pInT1 += blkCnt;
+                    }
+
+                    blkCnt = numCols >> 3;
+                    while (blkCnt > 0U)
+                    {
+                        f16x8_t vec1, vec2;
+
+                        /*
+                         * Replace the element by the sum of that row
+                         * and a multiple of the reference row
+                         */
+                        vec1 = vldrhq_f16(pOutT1);
+                        vec2 = vldrhq_f16(pPRT_pDst);
+                        vec1 = vfmsq_f16(vec1, tmpV, vec2);
+                        vstrhq_f16(pOutT1, vec1);
+                        pPRT_pDst += 8;
+                        pOutT1 += 8;
+                        /*
+                         * Decrement the blockSize loop counter
+                         */
+                        blkCnt--;
+                    }
+                    /*
+                     * tail
+                     * (will be merged thru tail predication)
+                     */
+                    blkCnt = numCols & 7;
+                    if (blkCnt > 0U)
+                    {
+                        f16x8_t vec1, vec2;
+                        mve_pred16_t p0 = vctp16q(blkCnt);
+
+                        vec1 = vldrhq_f16(pOutT1);
+                        vec2 = vldrhq_f16(pPRT_pDst);
+                        vec1 = vfmsq_f16(vec1, tmpV, vec2);
+                        vstrhq_p_f16(pOutT1, vec1, p0);
+
+                        pInT2 += blkCnt;
+                        pOutT1 += blkCnt;
+                    }
+                }
+                /*
+                 * Increment the temporary input pointer
+                 */
+                pInT1 = pInT1 + l;
+            }
+            /*
+             * Increment the input pointer
+             */
+            pIn++;
+            /*
+             * Decrement the loop counter
+             */
+            loopCnt--;
+            /*
+             * Increment the index modifier
+             */
+            l++;
+        }
+
+        /*
+         * Set status as ARM_MATH_SUCCESS
+         */
+        status = ARM_MATH_SUCCESS;
+
+        if ((flag != 1U) && (in == 0.0f16))
+        {
+            pIn = pSrc->pData;
+            for (i = 0; i < numRows * numCols; i++)
+            {
+                if ((_Float16)pIn[i] != 0.0f16)
+                    break;
+            }
+
+            if (i == numRows * numCols)
+                status = ARM_MATH_SINGULAR;
+        }
+  }
+  /* Return to application */
+  return (status);
+}
+
+#else
+
+arm_status arm_mat_inverse_f16(
+  const arm_matrix_instance_f16 * pSrc,
+        arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float16_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float16_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float16_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float16_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+  _Float16 Xchg, in = 0.0f16, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k,l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _                  _         _         _
+     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
+     *                     |           |        |   =   |           |
+     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f16;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f16;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f16;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+
+      /* Check if the pivot element is zero */
+      if ((_Float16)*pInT1 == 0.0f16)
+      {
+        /* Loop over the number rows present below */
+
+        for (i = 1U; i < numRows-l; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * i);
+          pOutT2 = pOutT1 + (numCols * i);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if ((_Float16)*pInT2 != 0.0f16)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f16))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l);
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l);
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = (_Float16)in1 - ((_Float16)in * (_Float16)*pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = (_Float16)in1 - ((_Float16)in * (_Float16)*pPRT_pDst++);
+
+            /* Decrement loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement loop counter */
+        k--;
+
+        /* Increment pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && ((_Float16)in == 0.0f16))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if ((_Float16)pIn[i] != 0.0f16)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixInv group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
index df84b4d9..b0ef7608 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f32.c
@@ -1,1127 +1,1570 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_inverse_f32.c
- * Description:  Floating-point matrix inverse
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup MatrixInv Matrix Inverse
-
-  Computes the inverse of a matrix.
-
-  The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero).
-  The function checks that the input and output matrices are square and of the same size.
-
-  Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
-  inversion of floating-point matrices.
-
-  @par Algorithm
-  The Gauss-Jordan method is used to find the inverse.
-  The algorithm performs a sequence of elementary row-operations until it
-  reduces the input matrix to an identity matrix. Applying the same sequence
-  of elementary row-operations to an identity matrix yields the inverse matrix.
-  If the input matrix is singular, then the algorithm terminates and returns error status
-  <code>ARM_MATH_SINGULAR</code>.
-  \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
- */
-
-/**
-  @addtogroup MatrixInv
-  @{
- */
-
-/**
-  @brief         Floating-point matrix inverse.
-  @param[in]     pSrc      points to input matrix structure
-  @param[out]    pDst      points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
- */
-#if defined(ARM_MATH_NEON)
-arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
-  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-  float32_t maxC;                                /* maximum value in the column */
-
-  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-  float32x4_t vec1;
-  float32x4_t vec2;
-  float32x4_t tmpV;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
-     || (pSrc->numRows != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-   /*--------------------------------------------------------------------------------------------------------------
-   * Matrix Inverse can be solved using elementary row operations.
-   *
-   *  Gauss-Jordan Method:
-   *
-   *     1. First combine the identity matrix and the input matrix separated by a bar to form an
-   *        augmented matrix as follows:
-   *              _                  _         _         _
-   *             |  a11  a12 | 1   0  |       |  X11 X12  |
-   *             |           |        |   =   |           |
-   *             |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
-   *
-   *    2. In our implementation, pDst Matrix is used as identity matrix.
-   *
-   *    3. Begin with the first row. Let i = 1.
-   *
-   *      4. Check to see if the pivot for column i is the greatest of the column.
-   *       The pivot is the element of the main diagonal that is on the current row.
-   *       For instance, if working with row i, then the pivot element is aii.
-   *       If the pivot is not the most significant of the columns, exchange that row with a row
-   *       below it that does contain the most significant value in column i. If the most
-   *         significant value of the column is zero, then an inverse to that matrix does not exist.
-   *       The most significant value of the column is the absolute maximum.
-   *
-   *      5. Divide every element of row i by the pivot.
-   *
-   *      6. For every row below and  row i, replace that row with the sum of that row and
-   *       a multiple of row i so that each new element in column i below row i is zero.
-   *
-   *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-   *       for every element below and above the main diagonal.
-   *
-   *    8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
-   *       Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
-   *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while (rowCnt > 0U)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1U;
-
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement the loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0U;
-
-    while (loopCnt > 0U)
-    {
-      /* Check if the pivot element is zero..
-       * If it is zero then interchange the row with non zero row below.
-       * If there is no non zero element to replace in the rows below,
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Grab the most significant value from column l */
-      maxC = 0;
-
-      for (i = l; i < numRows; i++)
-      {
-        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
-        pInT1 += numCols;
-      }
-
-      /* Update the status if the matrix is singular */
-      if (maxC == 0.0f)
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Restore pInT1 */
-      pInT1 = pIn;
-
-      /* Destination pointer modifier */
-      k = 1U;
-
-      /* Check if the pivot element is the most significant of the column */
-      if ( (in > 0.0f ? in : -in) != maxC)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1U);
-
-        while (i > 0U)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Look for the most significant element to
-           * replace in the rows below */
-          if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
-          {
-            /* Loop over number of columns
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while (j > 0U)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while (j > 0U)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1U;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement the loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if ((flag != 1U) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *pPivotRowIn;
-      tmpV = vdupq_n_f32(1.0/in);
-
-      /* Loop over number of columns
-       * to the right of the pilot element */
-      j = (numCols - l) >> 2;
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the input matrix
-         * by the pivot element */
-        vec1 = vld1q_f32(pInT1);
-
-        vec1 = vmulq_f32(vec1, tmpV);
-        vst1q_f32(pInT1, vec1);
-        pInT1 += 4;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Tail */
-      j = (numCols - l) & 3;
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the input matrix
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols >> 2;
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the destination matrix
-         * by the pivot element */
-        vec1 = vld1q_f32(pInT2);
-
-        vec1 = vmulq_f32(vec1, tmpV);
-        vst1q_f32(pInT2, vec1);
-        pInT2 += 4;
-      
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Tail */
-      j = numCols & 3;
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the destination matrix
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0U;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while (k > 0U)
-      {
-        /* Check for the pivot element */
-        if (i == l)
-        {
-          /* If the processing element is the pivot element,
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-          tmpV = vdupq_n_f32(in);
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,
-             to replace the elements in the input matrix */
-          j = (numCols - l) >> 2;
-	  
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            vec1 = vld1q_f32(pInT1);
-            vec2 = vld1q_f32(pPRT_in);
-            vec1 = vmlsq_f32(vec1, tmpV, vec2);
-            vst1q_f32(pInT1, vec1);
-            pPRT_in += 4;
-            pInT1 += 4;
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-	  /* Tail */
-          j = (numCols - l) & 3;
-
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to
-             replace the elements in the destination matrix */
-          j = numCols >> 2;
-
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            vec1 = vld1q_f32(pInT2);
-            vec2 = vld1q_f32(pPRT_pDst);
-            vec1 = vmlsq_f32(vec1, tmpV, vec2);
-            vst1q_f32(pInT2, vec1);
-            pPRT_pDst += 4;
-            pInT2 += 4;
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-	  /* Tail */
-          j = numCols & 3;
-
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment the temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement the loop counter */
-        k--;
-
-        /* Increment the pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if ((flag != 1U) && (in == 0.0f))
-    {
-      pIn = pSrc->pData;
-      for (i = 0; i < numRows * numCols; i++)
-      {
-        if (pIn[i] != 0.0f)
-            break;
-      }
-
-      if (i == numRows * numCols)
-        status = ARM_MATH_SINGULAR;
-    }
-  }
-  /* Return to application */
-  return (status);
-}
-#else
-arm_status arm_mat_inverse_f32(
-  const arm_matrix_instance_f32 * pSrc,
-        arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
-  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-#if defined (ARM_MATH_DSP)
-  float32_t maxC;                                /* maximum value in the column */
-
-  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) ||
-      (pDst->numRows != pDst->numCols) ||
-      (pSrc->numRows != pDst->numRows)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------
-     * Matrix Inverse can be solved using elementary row operations.
-     *
-     *  Gauss-Jordan Method:
-     *
-     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
-     *        augmented matrix as follows:
-     *                      _                  _         _         _
-     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
-     *                     |           |        |   =   |           |
-     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
-     *
-     *      2. In our implementation, pDst Matrix is used as identity matrix.
-     *
-     *      3. Begin with the first row. Let i = 1.
-     *
-     *      4. Check to see if the pivot for column i is the greatest of the column.
-     *         The pivot is the element of the main diagonal that is on the current row.
-     *         For instance, if working with row i, then the pivot element is aii.
-     *         If the pivot is not the most significant of the columns, exchange that row with a row
-     *         below it that does contain the most significant value in column i. If the most
-     *         significant value of the column is zero, then an inverse to that matrix does not exist.
-     *         The most significant value of the column is the absolute maximum.
-     *
-     *      5. Divide every element of row i by the pivot.
-     *
-     *      6. For every row below and  row i, replace that row with the sum of that row and
-     *         a multiple of row i so that each new element in column i below row i is zero.
-     *
-     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-     *         for every element below and above the main diagonal.
-     *
-     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
-     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
-     *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while (rowCnt > 0U)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1U;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0U;
-
-    while (loopCnt > 0U)
-    {
-      /* Check if the pivot element is zero..
-       * If it is zero then interchange the row with non zero row below.
-       * If there is no non zero element to replace in the rows below,
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Grab the most significant value from column l */
-      maxC = 0;
-      for (i = l; i < numRows; i++)
-      {
-        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
-        pInT1 += numCols;
-      }
-
-      /* Update the status if the matrix is singular */
-      if (maxC == 0.0f)
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Restore pInT1  */
-      pInT1 = pIn;
-
-      /* Destination pointer modifier */
-      k = 1U;
-
-      /* Check if the pivot element is the most significant of the column */
-      if ( (in > 0.0f ? in : -in) != maxC)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1U);
-
-        while (i > 0U)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Look for the most significant element to
-           * replace in the rows below */
-          if ((*pInT2 > 0.0f ? *pInT2: -*pInT2) == maxC)
-          {
-            /* Loop over number of columns
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while (j > 0U)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while (j > 0U)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-
-              /* Decrement loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1U;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if ((flag != 1U) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *pPivotRowIn;
-
-      /* Loop over number of columns
-       * to the right of the pilot element */
-      j = (numCols - l);
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the input matrix
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols;
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the destination matrix
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0U;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while (k > 0U)
-      {
-        /* Check for the pivot element */
-        if (i == l)
-        {
-          /* If the processing element is the pivot element,
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,
-             to replace the elements in the input matrix */
-          j = (numCols - l);
-
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to
-             replace the elements in the destination matrix */
-          j = numCols;
-
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement loop counter */
-        k--;
-
-        /* Increment pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#else
-
-  float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) ||
-      (pDst->numRows != pDst->numCols) ||
-      (pSrc->numRows != pDst->numRows)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------
-     * Matrix Inverse can be solved using elementary row operations.
-     *
-     *  Gauss-Jordan Method:
-     *
-     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
-     *        augmented matrix as follows:
-     *                      _  _          _     _      _   _         _         _
-     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
-     *                     |  |            | | |        |   |   =   |           |
-     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
-     *
-     *      2. In our implementation, pDst Matrix is used as identity matrix.
-     *
-     *      3. Begin with the first row. Let i = 1.
-     *
-     *      4. Check to see if the pivot for row i is zero.
-     *         The pivot is the element of the main diagonal that is on the current row.
-     *         For instance, if working with row i, then the pivot element is aii.
-     *         If the pivot is zero, exchange that row with a row below it that does not
-     *         contain a zero in column i. If this is not possible, then an inverse
-     *         to that matrix does not exist.
-     *
-     *      5. Divide every element of row i by the pivot.
-     *
-     *      6. For every row below and  row i, replace that row with the sum of that row and
-     *         a multiple of row i so that each new element in column i below row i is zero.
-     *
-     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-     *         for every element below and above the main diagonal.
-     *
-     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
-     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
-     *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while (rowCnt > 0U)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0f;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1U;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0f;
-        j--;
-      }
-
-      /* Decrement loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0U;
-
-    while (loopCnt > 0U)
-    {
-      /* Check if the pivot element is zero..
-       * If it is zero then interchange the row with non zero row below.
-       * If there is no non zero element to replace in the rows below,
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1U;
-
-      /* Check if the pivot element is zero */
-      if (*pInT1 == 0.0f)
-      {
-        /* Loop over the number rows present below */
-        for (i = (l + 1U); i < numRows; i++)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to
-           * replace in the rows below */
-          if (*pInT2 != 0.0f)
-          {
-            /* Loop over number of columns
-             * to the right of the pilot element */
-            for (j = 0U; j < (numCols - l); j++)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-            }
-
-            for (j = 0U; j < numCols; j++)
-            {
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1U;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if ((flag != 1U) && (in == 0.0f))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pOutT1 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns
-       * to the right of the pilot element */
-      for (j = 0U; j < (numCols - l); j++)
-      {
-        /* Divide each element of the row of the input matrix
-         * by the pivot element */
-        *pInT1 = *pInT1 / in;
-        pInT1++;
-      }
-      for (j = 0U; j < numCols; j++)
-      {
-        /* Divide each element of the row of the destination matrix
-         * by the pivot element */
-        *pOutT1 = *pOutT1 / in;
-        pOutT1++;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pOutT1 = pOut;
-
-      for (i = 0U; i < numRows; i++)
-      {
-        /* Check for the pivot element */
-        if (i == l)
-        {
-          /* If the processing element is the pivot element,
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-          pOutT1 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,
-             to replace the elements in the input matrix */
-          for (j = 0U; j < (numCols - l); j++)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            *pInT1 = *pInT1 - (in * *pPRT_in++);
-            pInT1++;
-          }
-
-          /* Loop over the number of columns to
-             replace the elements in the destination matrix */
-          for (j = 0U; j < numCols; j++)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
-            pOutT1++;
-          }
-
-        }
-
-        /* Increment temporary input pointer */
-        pInT1 = pInT1 + l;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if ((flag != 1U) && (in == 0.0f))
-    {
-      pIn = pSrc->pData;
-      for (i = 0; i < numRows * numCols; i++)
-      {
-        if (pIn[i] != 0.0f)
-            break;
-      }
-
-      if (i == numRows * numCols)
-        status = ARM_MATH_SINGULAR;
-    }
-  }
-
-  /* Return to application */
-  return (status);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of MatrixInv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_inverse_f32.c
+ * Description:  Floating-point matrix inverse
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixInv Matrix Inverse
+
+  Computes the inverse of a matrix.
+
+  The inverse is defined only if the input matrix is square and non-singular (the determinant is non-zero).
+  The function checks that the input and output matrices are square and of the same size.
+
+  Matrix inversion is numerically sensitive and the CMSIS DSP library only supports matrix
+  inversion of floating-point matrices.
+
+  @par Algorithm
+  The Gauss-Jordan method is used to find the inverse.
+  The algorithm performs a sequence of elementary row-operations until it
+  reduces the input matrix to an identity matrix. Applying the same sequence
+  of elementary row-operations to an identity matrix yields the inverse matrix.
+  If the input matrix is singular, then the algorithm terminates and returns error status
+  <code>ARM_MATH_SINGULAR</code>.
+  \image html MatrixInverse.gif "Matrix Inverse of a 3 x 3 matrix using Gauss-Jordan Method"
+ */
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix inverse.
+  @param[in]     pSrc      points to input matrix structure. The source matrix is modified by the function.
+  @param[out]    pDst      points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst)
+{
+    float32_t *pIn = pSrc->pData;   /* input data matrix pointer */
+    float32_t *pOut = pDst->pData;  /* output data matrix pointer */
+    float32_t *pInT1, *pInT2;   /* Temporary input data matrix pointer */
+    float32_t *pOutT1, *pOutT2; /* Temporary output data matrix pointer */
+    float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;    /* Temporary input and output data matrix pointer */
+
+    uint32_t  numRows = pSrc->numRows;  /* Number of rows in the matrix  */
+    uint32_t  numCols = pSrc->numCols;  /* Number of Cols in the matrix  */
+    float32_t *pTmpA, *pTmpB;
+
+    float32_t in = 0.0f;        /* Temporary input values  */
+    uint32_t  i, rowCnt, flag = 0U, j, loopCnt, l;   /* loop counters */
+    arm_status status;          /* status of matrix inverse */
+    uint32_t  blkCnt;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+   /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
+     || (pSrc->numRows != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *     1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+        /*
+         * Working pointer for destination matrix
+         */
+        pOutT1 = pOut;
+        /*
+         * Loop over the number of rows
+         */
+        rowCnt = numRows;
+        /*
+         * Making the destination matrix as identity matrix
+         */
+        while (rowCnt > 0U)
+        {
+            /*
+             * Writing all zeroes in lower triangle of the destination matrix
+             */
+            j = numRows - rowCnt;
+            while (j > 0U)
+            {
+                *pOutT1++ = 0.0f;
+                j--;
+            }
+            /*
+             * Writing all ones in the diagonal of the destination matrix
+             */
+            *pOutT1++ = 1.0f;
+            /*
+             * Writing all zeroes in upper triangle of the destination matrix
+             */
+            j = rowCnt - 1U;
+            while (j > 0U)
+            {
+                *pOutT1++ = 0.0f;
+                j--;
+            }
+            /*
+             * Decrement the loop counter
+             */
+            rowCnt--;
+        }
+
+        /*
+         * Loop over the number of columns of the input matrix.
+         * All the elements in each column are processed by the row operations
+         */
+        loopCnt = numCols;
+        /*
+         * Index modifier to navigate through the columns
+         */
+        l = 0U;
+        while (loopCnt > 0U)
+        {
+            /*
+             * Check if the pivot element is zero..
+             * If it is zero then interchange the row with non zero row below.
+             * If there is no non zero element to replace in the rows below,
+             * then the matrix is Singular.
+             */
+
+            /*
+             * Working pointer for the input matrix that points
+             * * to the pivot element of the particular row
+             */
+            pInT1 = pIn + (l * numCols);
+            /*
+             * Working pointer for the destination matrix that points
+             * * to the pivot element of the particular row
+             */
+            pOutT1 = pOut + (l * numCols);
+            /*
+             * Temporary variable to hold the pivot value
+             */
+            in = *pInT1;
+           
+
+            /*
+             * Check if the pivot element is zero
+             */
+            if (*pInT1 == 0.0f)
+            {
+                /*
+                 * Loop over the number rows present below
+                 */
+                for (i = 1U; i < numRows-l; i++)
+                {
+                    /*
+                     * Update the input and destination pointers
+                     */
+                    pInT2 = pInT1 + (numCols * i);
+                    pOutT2 = pOutT1 + (numCols * i);
+                    /*
+                     * Check if there is a non zero pivot element to
+                     * * replace in the rows below
+                     */
+                    if (*pInT2 != 0.0f)
+                    {
+                        f32x4_t vecA, vecB;
+                        /*
+                         * Loop over number of columns
+                         * * to the right of the pilot element
+                         */
+                        pTmpA = pInT1;
+                        pTmpB = pInT2;
+                        blkCnt = (numCols - l) >> 2;
+                        while (blkCnt > 0U)
+                        {
+                            
+                            vecA = vldrwq_f32(pTmpA);
+                            vecB = vldrwq_f32(pTmpB);
+                            vstrwq_f32(pTmpB, vecA);
+                            vstrwq_f32(pTmpA, vecB);
+
+                            pTmpA += 4;
+                            pTmpB += 4;
+                            /*
+                             * Decrement the blockSize loop counter
+                             */
+                            blkCnt--;
+                        }
+                        /*
+                         * tail
+                         * (will be merged thru tail predication)
+                         */
+                        blkCnt = (numCols - l) & 3;
+                        if (blkCnt > 0U)
+                        {
+                            mve_pred16_t p0 = vctp32q(blkCnt);
+
+                            vecA = vldrwq_f32(pTmpA);
+                            vecB = vldrwq_f32(pTmpB);
+                            vstrwq_p_f32(pTmpB, vecA, p0);
+                            vstrwq_p_f32(pTmpA, vecB, p0);
+                        }
+
+                        pInT1 += numCols - l;
+                        pInT2 += numCols - l;
+                        pTmpA = pOutT1;
+                        pTmpB = pOutT2;
+                        blkCnt = numCols >> 2;
+                        while (blkCnt > 0U)
+                        {
+
+                            vecA = vldrwq_f32(pTmpA);
+                            vecB = vldrwq_f32(pTmpB);
+                            vstrwq_f32(pTmpB, vecA);
+                            vstrwq_f32(pTmpA, vecB);
+                            pTmpA += 4;
+                            pTmpB += 4;
+                            /*
+                             * Decrement the blockSize loop counter
+                             */
+                            blkCnt--;
+                        }
+                        /*
+                         * tail
+                         */
+                        blkCnt = numCols & 3;
+                        if (blkCnt > 0U)
+                        {
+                            mve_pred16_t p0 = vctp32q(blkCnt);
+
+                            vecA = vldrwq_f32(pTmpA);
+                            vecB = vldrwq_f32(pTmpB);
+                            vstrwq_p_f32(pTmpB, vecA, p0);
+                            vstrwq_p_f32(pTmpA, vecB, p0);
+                        }
+
+                        pOutT1 += numCols;
+                        pOutT2 += numCols;
+                        /*
+                         * Flag to indicate whether exchange is done or not
+                         */
+                        flag = 1U;
+
+                        /*
+                         * Break after exchange is done
+                         */
+                        break;
+                    }
+                    
+                }
+            }
+
+            /*
+             * Update the status if the matrix is singular
+             */
+            if ((flag != 1U) && (in == 0.0f))
+            {
+                return ARM_MATH_SINGULAR;
+            }
+
+            /*
+             * Points to the pivot row of input and destination matrices
+             */
+            pPivotRowIn = pIn + (l * numCols);
+            pPivotRowDst = pOut + (l * numCols);
+
+            /*
+             * Temporary pointers to the pivot row pointers
+             */
+            pInT1 = pPivotRowIn;
+            pOutT1 = pPivotRowDst;
+
+            /*
+             * Pivot element of the row
+             */
+            in = *(pIn + (l * numCols));
+
+            pTmpA = pInT1;
+
+            f32x4_t invIn = vdupq_n_f32(1.0f / in);
+
+            blkCnt = (numCols - l) >> 2;
+            f32x4_t vecA;
+            while (blkCnt > 0U)
+            {
+                *(f32x4_t *) pTmpA = *(f32x4_t *) pTmpA * invIn;
+                pTmpA += 4;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+            /*
+             * tail
+             */
+            blkCnt = (numCols - l) & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+                
+
+                vecA = vldrwq_f32(pTmpA);
+                vecA = vecA * invIn;
+                vstrwq_p_f32(pTmpA, vecA, p0);
+            }
+
+            pInT1 += numCols - l;
+            /*
+             * Loop over number of columns
+             * * to the right of the pilot element
+             */
+
+            pTmpA = pOutT1;
+            blkCnt = numCols >> 2;
+            while (blkCnt > 0U)
+            {
+                *(f32x4_t *) pTmpA = *(f32x4_t *) pTmpA *invIn;
+                pTmpA += 4;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = numCols & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+
+                vecA = vldrwq_f32(pTmpA);
+                vecA = vecA * invIn;
+                vstrwq_p_f32(pTmpA, vecA, p0);
+            }
+
+            pOutT1 += numCols;
+
+            /*
+             * Replace the rows with the sum of that row and a multiple of row i
+             * * so that each new element in column i above row i is zero.
+             */
+
+            /*
+             * Temporary pointers for input and destination matrices
+             */
+            pInT1 = pIn;
+            pOutT1 = pOut;
+
+            for (i = 0U; i < numRows; i++)
+            {
+                /*
+                 * Check for the pivot element
+                 */
+                if (i == l)
+                {
+                    /*
+                     * If the processing element is the pivot element,
+                     * only the columns to the right are to be processed
+                     */
+                    pInT1 += numCols - l;
+                    pOutT1 += numCols;
+                }
+                else
+                {
+                    /*
+                     * Element of the reference row
+                     */
+
+                    /*
+                     * Working pointers for input and destination pivot rows
+                     */
+                    pPRT_in = pPivotRowIn;
+                    pPRT_pDst = pPivotRowDst;
+                    /*
+                     * Loop over the number of columns to the right of the pivot element,
+                     * to replace the elements in the input matrix
+                     */
+
+                    in = *pInT1;
+                    f32x4_t tmpV = vdupq_n_f32(in);
+
+                    blkCnt = (numCols - l) >> 2;
+                    while (blkCnt > 0U)
+                    {
+                        f32x4_t vec1, vec2;
+                        /*
+                         * Replace the element by the sum of that row
+                         * and a multiple of the reference row
+                         */
+                        vec1 = vldrwq_f32(pInT1);
+                        vec2 = vldrwq_f32(pPRT_in);
+                        vec1 = vfmsq_f32(vec1, tmpV, vec2);
+                        vstrwq_f32(pInT1, vec1);
+                        pPRT_in += 4;
+                        pInT1 += 4;
+                        /*
+                         * Decrement the blockSize loop counter
+                         */
+                        blkCnt--;
+                    }
+                    /*
+                     * tail
+                     * (will be merged thru tail predication)
+                     */
+                    blkCnt = (numCols - l) & 3;
+                    if (blkCnt > 0U)
+                    {
+                        f32x4_t vec1, vec2;
+                        mve_pred16_t p0 = vctp32q(blkCnt);
+
+                        vec1 = vldrwq_f32(pInT1);
+                        vec2 = vldrwq_f32(pPRT_in);
+                        vec1 = vfmsq_f32(vec1, tmpV, vec2);
+                        vstrwq_p_f32(pInT1, vec1, p0);
+                        pInT1 += blkCnt;
+                    }
+
+                    blkCnt = numCols >> 2;
+                    while (blkCnt > 0U)
+                    {
+                        f32x4_t vec1, vec2;
+
+                        /*
+                         * Replace the element by the sum of that row
+                         * and a multiple of the reference row
+                         */
+                        vec1 = vldrwq_f32(pOutT1);
+                        vec2 = vldrwq_f32(pPRT_pDst);
+                        vec1 = vfmsq_f32(vec1, tmpV, vec2);
+                        vstrwq_f32(pOutT1, vec1);
+                        pPRT_pDst += 4;
+                        pOutT1 += 4;
+                        /*
+                         * Decrement the blockSize loop counter
+                         */
+                        blkCnt--;
+                    }
+                    /*
+                     * tail
+                     * (will be merged thru tail predication)
+                     */
+                    blkCnt = numCols & 3;
+                    if (blkCnt > 0U)
+                    {
+                        f32x4_t vec1, vec2;
+                        mve_pred16_t p0 = vctp32q(blkCnt);
+
+                        vec1 = vldrwq_f32(pOutT1);
+                        vec2 = vldrwq_f32(pPRT_pDst);
+                        vec1 = vfmsq_f32(vec1, tmpV, vec2);
+                        vstrwq_p_f32(pOutT1, vec1, p0);
+
+                        pInT2 += blkCnt;
+                        pOutT1 += blkCnt;
+                    }
+                }
+                /*
+                 * Increment the temporary input pointer
+                 */
+                pInT1 = pInT1 + l;
+            }
+            /*
+             * Increment the input pointer
+             */
+            pIn++;
+            /*
+             * Decrement the loop counter
+             */
+            loopCnt--;
+            /*
+             * Increment the index modifier
+             */
+            l++;
+        }
+
+        /*
+         * Set status as ARM_MATH_SUCCESS
+         */
+        status = ARM_MATH_SUCCESS;
+
+        if ((flag != 1U) && (in == 0.0f))
+        {
+            pIn = pSrc->pData;
+            for (i = 0; i < numRows * numCols; i++)
+            {
+                if (pIn[i] != 0.0f)
+                    break;
+            }
+
+            if (i == numRows * numCols)
+                status = ARM_MATH_SINGULAR;
+        }
+  }
+  /* Return to application */
+  return (status);
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+
+  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+  float32x4_t vec1;
+  float32x4_t vec2;
+  float32x4_t tmpV;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) || (pDst->numRows != pDst->numCols)
+     || (pSrc->numRows != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+   /*--------------------------------------------------------------------------------------------------------------
+   * Matrix Inverse can be solved using elementary row operations.
+   *
+   *  Gauss-Jordan Method:
+   *
+   *     1. First combine the identity matrix and the input matrix separated by a bar to form an
+   *        augmented matrix as follows:
+   *              _                  _         _         _
+   *             |  a11  a12 | 1   0  |       |  X11 X12  |
+   *             |           |        |   =   |           |
+   *             |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+   *
+   *    2. In our implementation, pDst Matrix is used as identity matrix.
+   *
+   *    3. Begin with the first row. Let i = 1.
+   *
+   *    4. Check to see if the pivot for row i is zero.
+   *       The pivot is the element of the main diagonal that is on the current row.
+   *       For instance, if working with row i, then the pivot element is aii.
+   *       If the pivot is zero, exchange that row with a row below it that does not
+   *       contain a zero in column i. If this is not possible, then an inverse
+   *       to that matrix does not exist.
+   *
+   *      5. Divide every element of row i by the pivot.
+   *
+   *      6. For every row below and  row i, replace that row with the sum of that row and
+   *       a multiple of row i so that each new element in column i below row i is zero.
+   *
+   *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+   *       for every element below and above the main diagonal.
+   *
+   *    8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+   *       Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+   *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Decrement the loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Check if the pivot element is zero */
+      if (*pInT1 == 0.0f)
+      {
+        /* Loop over the number rows present below */
+        for (i = 1U; i < numRows - l; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * i);
+          pOutT2 = pOutT1 + (numCols * i);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if (*pInT2 != 0.0f)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+         
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+      tmpV = vdupq_n_f32(1.0f/in);
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l) >> 2;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        vec1 = vld1q_f32(pInT1);
+
+        vec1 = vmulq_f32(vec1, tmpV);
+        vst1q_f32(pInT1, vec1);
+        pInT1 += 4;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Tail */
+      j = (numCols - l) & 3;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols >> 2;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        vec1 = vld1q_f32(pInT2);
+
+        vec1 = vmulq_f32(vec1, tmpV);
+        vst1q_f32(pInT2, vec1);
+        pInT2 += 4;
+      
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Tail */
+      j = numCols & 3;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+          tmpV = vdupq_n_f32(in);
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l) >> 2;
+	  
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            vec1 = vld1q_f32(pInT1);
+            vec2 = vld1q_f32(pPRT_in);
+            vec1 = vmlsq_f32(vec1, tmpV, vec2);
+            vst1q_f32(pInT1, vec1);
+            pPRT_in += 4;
+            pInT1 += 4;
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+	  /* Tail */
+          j = (numCols - l) & 3;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = in1 - (in * *pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols >> 2;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            vec1 = vld1q_f32(pInT2);
+            vec2 = vld1q_f32(pPRT_pDst);
+            vec1 = vmlsq_f32(vec1, tmpV, vec2);
+            vst1q_f32(pInT2, vec1);
+            pPRT_pDst += 4;
+            pInT2 += 4;
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+	  /* Tail */
+          j = numCols & 3;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = in1 - (in * *pPRT_pDst++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment the temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement the loop counter */
+        k--;
+
+        /* Increment the pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && (in == 0.0f))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if (pIn[i] != 0.0f)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_inverse_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float32_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float32_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+#if defined (ARM_MATH_DSP)
+
+  float32_t Xchg, in = 0.0f, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k,l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _                  _         _         _
+     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
+     *                     |           |        |   =   |           |
+     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+    
+
+      /* Check if the pivot element is zero */
+      if (*pInT1 == 0.0f)
+      {
+        /* Loop over the number rows present below */
+
+        for (i = 1U; i < numRows - l; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * i);
+          pOutT2 = pOutT1 + (numCols * i);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if (*pInT2 != 0.0f)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+
+          /* Decrement loop counter */
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l);
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l);
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = in1 - (in * *pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = in1 - (in * *pPRT_pDst++);
+
+            /* Decrement loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement loop counter */
+        k--;
+
+        /* Increment pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+
+#else
+
+  float32_t Xchg, in = 0.0f;                     /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0f;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0f;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Check if the pivot element is zero */
+      if (*pInT1 == 0.0f)
+      {
+        /* Loop over the number rows present below */
+        for (i = 1U; i < numRows-l; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * i);
+          pOutT2 = pOutT1 + (numCols * i);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if (*pInT2 != 0.0f)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            for (j = 0U; j < (numCols - l); j++)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+            }
+
+            for (j = 0U; j < numCols; j++)
+            {
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+        }
+      }
+
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0f))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pOutT1 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *(pIn + (l * numCols));
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      for (j = 0U; j < (numCols - l); j++)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        *pInT1 = *pInT1 / in;
+        pInT1++;
+      }
+      for (j = 0U; j < numCols; j++)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        *pOutT1 = *pOutT1 / in;
+        pOutT1++;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pOutT1 = pOut;
+
+      for (i = 0U; i < numRows; i++)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+          pOutT1 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          for (j = 0U; j < (numCols - l); j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pInT1 = *pInT1 - (in * *pPRT_in++);
+            pInT1++;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          for (j = 0U; j < numCols; j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
+            pOutT1++;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && (in == 0.0f))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if (pIn[i] != 0.0f)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
index 17390c80..bf99a792 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_inverse_f64.c
@@ -1,673 +1,644 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_inverse_f64.c
- * Description:  Floating-point matrix inverse
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-
-/**
-  @addtogroup MatrixInv
-  @{
- */
-
-/**
-  @brief         Floating-point (64 bit) matrix inverse.
-  @param[in]     pSrc      points to input matrix structure
-  @param[out]    pDst      points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
- */
-
-arm_status arm_mat_inverse_f64(
-  const arm_matrix_instance_f64 * pSrc,
-        arm_matrix_instance_f64 * pDst)
-{
-  float64_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float64_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
-  float64_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
-  float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
-  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
-  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
-
-#if defined (ARM_MATH_DSP)
-  float64_t maxC;                                /* maximum value in the column */
-
-  float64_t Xchg, in = 0.0, in1;                /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) ||
-      (pDst->numRows != pDst->numCols) ||
-      (pSrc->numRows != pDst->numRows)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------
-     * Matrix Inverse can be solved using elementary row operations.
-     *
-     *  Gauss-Jordan Method:
-     *
-     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
-     *        augmented matrix as follows:
-     *                      _                  _         _         _
-     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
-     *                     |           |        |   =   |           |
-     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
-     *
-     *      2. In our implementation, pDst Matrix is used as identity matrix.
-     *
-     *      3. Begin with the first row. Let i = 1.
-     *
-     *      4. Check to see if the pivot for column i is the greatest of the column.
-     *         The pivot is the element of the main diagonal that is on the current row.
-     *         For instance, if working with row i, then the pivot element is aii.
-     *         If the pivot is not the most significant of the columns, exchange that row with a row
-     *         below it that does contain the most significant value in column i. If the most
-     *         significant value of the column is zero, then an inverse to that matrix does not exist.
-     *         The most significant value of the column is the absolute maximum.
-     *
-     *      5. Divide every element of row i by the pivot.
-     *
-     *      6. For every row below and  row i, replace that row with the sum of that row and
-     *         a multiple of row i so that each new element in column i below row i is zero.
-     *
-     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-     *         for every element below and above the main diagonal.
-     *
-     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
-     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
-     *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while (rowCnt > 0U)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1U;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0;
-        j--;
-      }
-
-      /* Decrement loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0U;
-
-    while (loopCnt > 0U)
-    {
-      /* Check if the pivot element is zero..
-       * If it is zero then interchange the row with non zero row below.
-       * If there is no non zero element to replace in the rows below,
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Grab the most significant value from column l */
-      maxC = 0;
-      for (i = l; i < numRows; i++)
-      {
-        maxC = *pInT1 > 0 ? (*pInT1 > maxC ? *pInT1 : maxC) : (-*pInT1 > maxC ? -*pInT1 : maxC);
-        pInT1 += numCols;
-      }
-
-      /* Update the status if the matrix is singular */
-      if (maxC == 0.0)
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Restore pInT1  */
-      pInT1 = pIn;
-
-      /* Destination pointer modifier */
-      k = 1U;
-
-      /* Check if the pivot element is the most significant of the column */
-      if ( (in > 0.0 ? in : -in) != maxC)
-      {
-        /* Loop over the number rows present below */
-        i = numRows - (l + 1U);
-
-        while (i > 0U)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Look for the most significant element to
-           * replace in the rows below */
-          if ((*pInT2 > 0.0 ? *pInT2: -*pInT2) == maxC)
-          {
-            /* Loop over number of columns
-             * to the right of the pilot element */
-            j = numCols - l;
-
-            while (j > 0U)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-
-              /* Decrement the loop counter */
-              j--;
-            }
-
-            /* Loop over number of columns of the destination matrix */
-            j = numCols;
-
-            while (j > 0U)
-            {
-              /* Exchange the row elements of the destination matrix */
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-
-              /* Decrement loop counter */
-              j--;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1U;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-
-          /* Decrement loop counter */
-          i--;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if ((flag != 1U) && (in == 0.0))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pInT2 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *pPivotRowIn;
-
-      /* Loop over number of columns
-       * to the right of the pilot element */
-      j = (numCols - l);
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the input matrix
-         * by the pivot element */
-        in1 = *pInT1;
-        *pInT1++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Loop over number of columns of the destination matrix */
-      j = numCols;
-
-      while (j > 0U)
-      {
-        /* Divide each element of the row of the destination matrix
-         * by the pivot element */
-        in1 = *pInT2;
-        *pInT2++ = in1 / in;
-
-        /* Decrement the loop counter */
-        j--;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pInT2 = pOut;
-
-      /* index used to check for pivot element */
-      i = 0U;
-
-      /* Loop over number of rows */
-      /*  to be replaced by the sum of that row and a multiple of row i */
-      k = numRows;
-
-      while (k > 0U)
-      {
-        /* Check for the pivot element */
-        if (i == l)
-        {
-          /* If the processing element is the pivot element,
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-
-          pInT2 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,
-             to replace the elements in the input matrix */
-          j = (numCols - l);
-
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            in1 = *pInT1;
-            *pInT1++ = in1 - (in * *pPRT_in++);
-
-            /* Decrement the loop counter */
-            j--;
-          }
-
-          /* Loop over the number of columns to
-             replace the elements in the destination matrix */
-          j = numCols;
-
-          while (j > 0U)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            in1 = *pInT2;
-            *pInT2++ = in1 - (in * *pPRT_pDst++);
-
-            /* Decrement loop counter */
-            j--;
-          }
-
-        }
-
-        /* Increment temporary input pointer */
-        pInT1 = pInT1 + l;
-
-        /* Decrement loop counter */
-        k--;
-
-        /* Increment pivot index */
-        i++;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-
-#else
-
-  float64_t Xchg, in = 0.0;                     /* Temporary input values  */
-  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k, l;      /* loop counters */
-  arm_status status;                             /* status of matrix inverse */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pSrc->numCols) ||
-      (pDst->numRows != pDst->numCols) ||
-      (pSrc->numRows != pDst->numRows)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-
-    /*--------------------------------------------------------------------------------------------------------------
-     * Matrix Inverse can be solved using elementary row operations.
-     *
-     *  Gauss-Jordan Method:
-     *
-     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
-     *        augmented matrix as follows:
-     *                      _  _          _     _      _   _         _         _
-     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
-     *                     |  |            | | |        |   |   =   |           |
-     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
-     *
-     *      2. In our implementation, pDst Matrix is used as identity matrix.
-     *
-     *      3. Begin with the first row. Let i = 1.
-     *
-     *      4. Check to see if the pivot for row i is zero.
-     *         The pivot is the element of the main diagonal that is on the current row.
-     *         For instance, if working with row i, then the pivot element is aii.
-     *         If the pivot is zero, exchange that row with a row below it that does not
-     *         contain a zero in column i. If this is not possible, then an inverse
-     *         to that matrix does not exist.
-     *
-     *      5. Divide every element of row i by the pivot.
-     *
-     *      6. For every row below and  row i, replace that row with the sum of that row and
-     *         a multiple of row i so that each new element in column i below row i is zero.
-     *
-     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
-     *         for every element below and above the main diagonal.
-     *
-     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
-     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
-     *----------------------------------------------------------------------------------------------------------------*/
-
-    /* Working pointer for destination matrix */
-    pOutT1 = pOut;
-
-    /* Loop over the number of rows */
-    rowCnt = numRows;
-
-    /* Making the destination matrix as identity matrix */
-    while (rowCnt > 0U)
-    {
-      /* Writing all zeroes in lower triangle of the destination matrix */
-      j = numRows - rowCnt;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0;
-        j--;
-      }
-
-      /* Writing all ones in the diagonal of the destination matrix */
-      *pOutT1++ = 1.0;
-
-      /* Writing all zeroes in upper triangle of the destination matrix */
-      j = rowCnt - 1U;
-      while (j > 0U)
-      {
-        *pOutT1++ = 0.0;
-        j--;
-      }
-
-      /* Decrement loop counter */
-      rowCnt--;
-    }
-
-    /* Loop over the number of columns of the input matrix.
-       All the elements in each column are processed by the row operations */
-    loopCnt = numCols;
-
-    /* Index modifier to navigate through the columns */
-    l = 0U;
-
-    while (loopCnt > 0U)
-    {
-      /* Check if the pivot element is zero..
-       * If it is zero then interchange the row with non zero row below.
-       * If there is no non zero element to replace in the rows below,
-       * then the matrix is Singular. */
-
-      /* Working pointer for the input matrix that points
-       * to the pivot element of the particular row  */
-      pInT1 = pIn + (l * numCols);
-
-      /* Working pointer for the destination matrix that points
-       * to the pivot element of the particular row  */
-      pOutT1 = pOut + (l * numCols);
-
-      /* Temporary variable to hold the pivot value */
-      in = *pInT1;
-
-      /* Destination pointer modifier */
-      k = 1U;
-
-      /* Check if the pivot element is zero */
-      if (*pInT1 == 0.0)
-      {
-        /* Loop over the number rows present below */
-        for (i = (l + 1U); i < numRows; i++)
-        {
-          /* Update the input and destination pointers */
-          pInT2 = pInT1 + (numCols * l);
-          pOutT2 = pOutT1 + (numCols * k);
-
-          /* Check if there is a non zero pivot element to
-           * replace in the rows below */
-          if (*pInT2 != 0.0)
-          {
-            /* Loop over number of columns
-             * to the right of the pilot element */
-            for (j = 0U; j < (numCols - l); j++)
-            {
-              /* Exchange the row elements of the input matrix */
-              Xchg = *pInT2;
-              *pInT2++ = *pInT1;
-              *pInT1++ = Xchg;
-            }
-
-            for (j = 0U; j < numCols; j++)
-            {
-              Xchg = *pOutT2;
-              *pOutT2++ = *pOutT1;
-              *pOutT1++ = Xchg;
-            }
-
-            /* Flag to indicate whether exchange is done or not */
-            flag = 1U;
-
-            /* Break after exchange is done */
-            break;
-          }
-
-          /* Update the destination pointer modifier */
-          k++;
-        }
-      }
-
-      /* Update the status if the matrix is singular */
-      if ((flag != 1U) && (in == 0.0))
-      {
-        return ARM_MATH_SINGULAR;
-      }
-
-      /* Points to the pivot row of input and destination matrices */
-      pPivotRowIn = pIn + (l * numCols);
-      pPivotRowDst = pOut + (l * numCols);
-
-      /* Temporary pointers to the pivot row pointers */
-      pInT1 = pPivotRowIn;
-      pOutT1 = pPivotRowDst;
-
-      /* Pivot element of the row */
-      in = *(pIn + (l * numCols));
-
-      /* Loop over number of columns
-       * to the right of the pilot element */
-      for (j = 0U; j < (numCols - l); j++)
-      {
-        /* Divide each element of the row of the input matrix
-         * by the pivot element */
-        *pInT1 = *pInT1 / in;
-        pInT1++;
-      }
-      for (j = 0U; j < numCols; j++)
-      {
-        /* Divide each element of the row of the destination matrix
-         * by the pivot element */
-        *pOutT1 = *pOutT1 / in;
-        pOutT1++;
-      }
-
-      /* Replace the rows with the sum of that row and a multiple of row i
-       * so that each new element in column i above row i is zero.*/
-
-      /* Temporary pointers for input and destination matrices */
-      pInT1 = pIn;
-      pOutT1 = pOut;
-
-      for (i = 0U; i < numRows; i++)
-      {
-        /* Check for the pivot element */
-        if (i == l)
-        {
-          /* If the processing element is the pivot element,
-             only the columns to the right are to be processed */
-          pInT1 += numCols - l;
-          pOutT1 += numCols;
-        }
-        else
-        {
-          /* Element of the reference row */
-          in = *pInT1;
-
-          /* Working pointers for input and destination pivot rows */
-          pPRT_in = pPivotRowIn;
-          pPRT_pDst = pPivotRowDst;
-
-          /* Loop over the number of columns to the right of the pivot element,
-             to replace the elements in the input matrix */
-          for (j = 0U; j < (numCols - l); j++)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            *pInT1 = *pInT1 - (in * *pPRT_in++);
-            pInT1++;
-          }
-
-          /* Loop over the number of columns to
-             replace the elements in the destination matrix */
-          for (j = 0U; j < numCols; j++)
-          {
-            /* Replace the element by the sum of that row
-               and a multiple of the reference row  */
-            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
-            pOutT1++;
-          }
-
-        }
-
-        /* Increment temporary input pointer */
-        pInT1 = pInT1 + l;
-      }
-
-      /* Increment the input pointer */
-      pIn++;
-
-      /* Decrement the loop counter */
-      loopCnt--;
-
-      /* Increment the index modifier */
-      l++;
-    }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-
-    if ((flag != 1U) && (in == 0.0))
-    {
-      pIn = pSrc->pData;
-      for (i = 0; i < numRows * numCols; i++)
-      {
-        if (pIn[i] != 0.0)
-            break;
-      }
-
-      if (i == numRows * numCols)
-        status = ARM_MATH_SINGULAR;
-    }
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixInv group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_inverse_f64.c
+ * Description:  Floating-point matrix inverse
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+  @brief         Floating-point (64 bit) matrix inverse.
+  @param[in]     pSrc      points to input matrix structure. The source matrix is modified by the function.
+  @param[out]    pDst      points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_SINGULAR      : Input matrix is found to be singular (non-invertible)
+ */
+
+arm_status arm_mat_inverse_f64(
+  const arm_matrix_instance_f64 * pSrc,
+        arm_matrix_instance_f64 * pDst)
+{
+  float64_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float64_t *pInT1, *pInT2;                      /* Temporary input data matrix pointer */
+  float64_t *pOutT1, *pOutT2;                    /* Temporary output data matrix pointer */
+  float64_t *pPivotRowIn, *pPRT_in, *pPivotRowDst, *pPRT_pDst;  /* Temporary input and output data matrix pointer */
+  uint32_t numRows = pSrc->numRows;              /* Number of rows in the matrix  */
+  uint32_t numCols = pSrc->numCols;              /* Number of Cols in the matrix  */
+
+#if defined (ARM_MATH_DSP)
+
+  float64_t Xchg, in = 0.0, in1;                /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, k,l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _                  _         _         _
+     *                     |  a11  a12 | 1   0  |       |  X11 X12  |
+     *                     |           |        |   =   |           |
+     *                     |_ a21  a22 | 0   1 _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, pSrc).
+     *         Therefore, the matrix to the right of the bar is our solution(pDst matrix, pDst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+    
+
+      /* Check if the pivot element is zero */
+      if (*pInT1 == 0.0)
+      {
+        /* Loop over the number rows present below */
+
+        for (i = 1U; i < numRows - l; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * i);
+          pOutT2 = pOutT1 + (numCols * i);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if (*pInT2 != 0.0)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            j = numCols - l;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+
+              /* Decrement the loop counter */
+              j--;
+            }
+
+            /* Loop over number of columns of the destination matrix */
+            j = numCols;
+
+            while (j > 0U)
+            {
+              /* Exchange the row elements of the destination matrix */
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+
+              /* Decrement loop counter */
+              j--;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+
+
+          /* Decrement loop counter */
+        }
+      }
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pInT2 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *pPivotRowIn;
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      j = (numCols - l);
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        in1 = *pInT1;
+        *pInT1++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Loop over number of columns of the destination matrix */
+      j = numCols;
+
+      while (j > 0U)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        in1 = *pInT2;
+        *pInT2++ = in1 / in;
+
+        /* Decrement the loop counter */
+        j--;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pInT2 = pOut;
+
+      /* index used to check for pivot element */
+      i = 0U;
+
+      /* Loop over number of rows */
+      /*  to be replaced by the sum of that row and a multiple of row i */
+      k = numRows;
+
+      while (k > 0U)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+
+          pInT2 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          j = (numCols - l);
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT1;
+            *pInT1++ = in1 - (in * *pPRT_in++);
+
+            /* Decrement the loop counter */
+            j--;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          j = numCols;
+
+          while (j > 0U)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            in1 = *pInT2;
+            *pInT2++ = in1 - (in * *pPRT_pDst++);
+
+            /* Decrement loop counter */
+            j--;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+
+        /* Decrement loop counter */
+        k--;
+
+        /* Increment pivot index */
+        i++;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+
+#else
+
+  float64_t Xchg, in = 0.0;                     /* Temporary input values  */
+  uint32_t i, rowCnt, flag = 0U, j, loopCnt, l;      /* loop counters */
+  arm_status status;                             /* status of matrix inverse */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pDst->numRows != pDst->numCols) ||
+      (pSrc->numRows != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    /*--------------------------------------------------------------------------------------------------------------
+     * Matrix Inverse can be solved using elementary row operations.
+     *
+     *  Gauss-Jordan Method:
+     *
+     *      1. First combine the identity matrix and the input matrix separated by a bar to form an
+     *        augmented matrix as follows:
+     *                      _  _          _     _      _   _         _         _
+     *                     |  |  a11  a12  | | | 1   0  |   |       |  X11 X12  |
+     *                     |  |            | | |        |   |   =   |           |
+     *                     |_ |_ a21  a22 _| | |_0   1 _|  _|       |_ X21 X21 _|
+     *
+     *      2. In our implementation, pDst Matrix is used as identity matrix.
+     *
+     *      3. Begin with the first row. Let i = 1.
+     *
+     *      4. Check to see if the pivot for row i is zero.
+     *         The pivot is the element of the main diagonal that is on the current row.
+     *         For instance, if working with row i, then the pivot element is aii.
+     *         If the pivot is zero, exchange that row with a row below it that does not
+     *         contain a zero in column i. If this is not possible, then an inverse
+     *         to that matrix does not exist.
+     *
+     *      5. Divide every element of row i by the pivot.
+     *
+     *      6. For every row below and  row i, replace that row with the sum of that row and
+     *         a multiple of row i so that each new element in column i below row i is zero.
+     *
+     *      7. Move to the next row and column and repeat steps 2 through 5 until you have zeros
+     *         for every element below and above the main diagonal.
+     *
+     *      8. Now an identical matrix is formed to the left of the bar(input matrix, src).
+     *         Therefore, the matrix to the right of the bar is our solution(dst matrix, dst).
+     *----------------------------------------------------------------------------------------------------------------*/
+
+    /* Working pointer for destination matrix */
+    pOutT1 = pOut;
+
+    /* Loop over the number of rows */
+    rowCnt = numRows;
+
+    /* Making the destination matrix as identity matrix */
+    while (rowCnt > 0U)
+    {
+      /* Writing all zeroes in lower triangle of the destination matrix */
+      j = numRows - rowCnt;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Writing all ones in the diagonal of the destination matrix */
+      *pOutT1++ = 1.0;
+
+      /* Writing all zeroes in upper triangle of the destination matrix */
+      j = rowCnt - 1U;
+      while (j > 0U)
+      {
+        *pOutT1++ = 0.0;
+        j--;
+      }
+
+      /* Decrement loop counter */
+      rowCnt--;
+    }
+
+    /* Loop over the number of columns of the input matrix.
+       All the elements in each column are processed by the row operations */
+    loopCnt = numCols;
+
+    /* Index modifier to navigate through the columns */
+    l = 0U;
+
+    while (loopCnt > 0U)
+    {
+      /* Check if the pivot element is zero..
+       * If it is zero then interchange the row with non zero row below.
+       * If there is no non zero element to replace in the rows below,
+       * then the matrix is Singular. */
+
+      /* Working pointer for the input matrix that points
+       * to the pivot element of the particular row  */
+      pInT1 = pIn + (l * numCols);
+
+      /* Working pointer for the destination matrix that points
+       * to the pivot element of the particular row  */
+      pOutT1 = pOut + (l * numCols);
+
+      /* Temporary variable to hold the pivot value */
+      in = *pInT1;
+
+      /* Check if the pivot element is zero */
+      if (*pInT1 == 0.0)
+      {
+        /* Loop over the number rows present below */
+        for (i = 1U; i < numRows-l; i++)
+        {
+          /* Update the input and destination pointers */
+          pInT2 = pInT1 + (numCols * i);
+          pOutT2 = pOutT1 + (numCols * i);
+
+          /* Check if there is a non zero pivot element to
+           * replace in the rows below */
+          if (*pInT2 != 0.0)
+          {
+            /* Loop over number of columns
+             * to the right of the pilot element */
+            for (j = 0U; j < (numCols - l); j++)
+            {
+              /* Exchange the row elements of the input matrix */
+              Xchg = *pInT2;
+              *pInT2++ = *pInT1;
+              *pInT1++ = Xchg;
+            }
+
+            for (j = 0U; j < numCols; j++)
+            {
+              Xchg = *pOutT2;
+              *pOutT2++ = *pOutT1;
+              *pOutT1++ = Xchg;
+            }
+
+            /* Flag to indicate whether exchange is done or not */
+            flag = 1U;
+
+            /* Break after exchange is done */
+            break;
+          }
+        }
+      }
+
+
+      /* Update the status if the matrix is singular */
+      if ((flag != 1U) && (in == 0.0))
+      {
+        return ARM_MATH_SINGULAR;
+      }
+
+      /* Points to the pivot row of input and destination matrices */
+      pPivotRowIn = pIn + (l * numCols);
+      pPivotRowDst = pOut + (l * numCols);
+
+      /* Temporary pointers to the pivot row pointers */
+      pInT1 = pPivotRowIn;
+      pOutT1 = pPivotRowDst;
+
+      /* Pivot element of the row */
+      in = *(pIn + (l * numCols));
+
+      /* Loop over number of columns
+       * to the right of the pilot element */
+      for (j = 0U; j < (numCols - l); j++)
+      {
+        /* Divide each element of the row of the input matrix
+         * by the pivot element */
+        *pInT1 = *pInT1 / in;
+        pInT1++;
+      }
+      for (j = 0U; j < numCols; j++)
+      {
+        /* Divide each element of the row of the destination matrix
+         * by the pivot element */
+        *pOutT1 = *pOutT1 / in;
+        pOutT1++;
+      }
+
+      /* Replace the rows with the sum of that row and a multiple of row i
+       * so that each new element in column i above row i is zero.*/
+
+      /* Temporary pointers for input and destination matrices */
+      pInT1 = pIn;
+      pOutT1 = pOut;
+
+      for (i = 0U; i < numRows; i++)
+      {
+        /* Check for the pivot element */
+        if (i == l)
+        {
+          /* If the processing element is the pivot element,
+             only the columns to the right are to be processed */
+          pInT1 += numCols - l;
+          pOutT1 += numCols;
+        }
+        else
+        {
+          /* Element of the reference row */
+          in = *pInT1;
+
+          /* Working pointers for input and destination pivot rows */
+          pPRT_in = pPivotRowIn;
+          pPRT_pDst = pPivotRowDst;
+
+          /* Loop over the number of columns to the right of the pivot element,
+             to replace the elements in the input matrix */
+          for (j = 0U; j < (numCols - l); j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pInT1 = *pInT1 - (in * *pPRT_in++);
+            pInT1++;
+          }
+
+          /* Loop over the number of columns to
+             replace the elements in the destination matrix */
+          for (j = 0U; j < numCols; j++)
+          {
+            /* Replace the element by the sum of that row
+               and a multiple of the reference row  */
+            *pOutT1 = *pOutT1 - (in * *pPRT_pDst++);
+            pOutT1++;
+          }
+
+        }
+
+        /* Increment temporary input pointer */
+        pInT1 = pInT1 + l;
+      }
+
+      /* Increment the input pointer */
+      pIn++;
+
+      /* Decrement the loop counter */
+      loopCnt--;
+
+      /* Increment the index modifier */
+      l++;
+    }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    if ((flag != 1U) && (in == 0.0))
+    {
+      pIn = pSrc->pData;
+      for (i = 0; i < numRows * numCols; i++)
+      {
+        if (pIn[i] != 0.0)
+            break;
+      }
+
+      if (i == numRows * numCols)
+        status = ARM_MATH_SINGULAR;
+    }
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f32.c
new file mode 100755
index 00000000..7e5ecbdd
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f32.c
@@ -0,0 +1,507 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_ldl_f32.c
+ * Description:  Floating-point LDL decomposition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+
+
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+
+/// @private
+#define SWAP_ROWS_F32(A,i,j)                 \
+  {                                      \
+    int cnt = n;                         \
+                                         \
+    for(int w=0;w < n; w+=4)             \
+    {                                    \
+       f32x4_t tmpa,tmpb;                \
+       mve_pred16_t p0 = vctp32q(cnt);   \
+                                         \
+       tmpa=vldrwq_z_f32(&A[i*n + w],p0);\
+       tmpb=vldrwq_z_f32(&A[j*n + w],p0);\
+                                         \
+       vstrwq_p(&A[i*n + w], tmpb, p0);  \
+       vstrwq_p(&A[j*n + w], tmpa, p0);  \
+                                         \
+       cnt -= 4;                         \
+    }                                    \
+  }
+
+/// @private
+#define SWAP_COLS_F32(A,i,j)     \
+  for(int w=0;w < n; w++)    \
+  {                          \
+     float32_t tmp;          \
+     tmp = A[w*n + i];       \
+     A[w*n + i] = A[w*n + j];\
+     A[w*n + j] = tmp;       \
+  }
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixChol
+  @{
+ */
+
+/**
+   * @brief Floating-point LDL^t decomposition of positive semi-definite matrix.
+   * @param[in]  pSrc   points to the instance of the input floating-point matrix structure.
+   * @param[out] pl   points to the instance of the output floating-point triangular matrix structure.
+   * @param[out] pd   points to the instance of the output floating-point diagonal matrix structure.
+   * @param[out] pp   points to the instance of the output floating-point permutation vector.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_DECOMPOSITION_FAILURE      : Input matrix cannot be decomposed
+   * @par
+   *  Computes the LDL^t decomposition of a matrix A such that P A P^t = L D L^t.
+   */
+arm_status arm_mat_ldlt_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pl,
+  arm_matrix_instance_f32 * pd,
+  uint16_t * pp)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pl->numRows != pl->numCols) ||
+      (pd->numRows != pd->numCols) ||
+      (pl->numRows != pd->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    const int n=pSrc->numRows;
+    int fullRank = 1, diag,k;
+    float32_t *pA;
+
+    memcpy(pl->pData,pSrc->pData,n*n*sizeof(float32_t));
+    pA = pl->pData;
+
+    int cnt = n;
+    uint16x8_t vecP;
+
+    for(int k=0;k < n; k+=8)
+    {
+      mve_pred16_t p0;
+      p0 = vctp16q(cnt);
+
+      vecP = vidupq_u16((uint16_t)k, 1);
+
+      vstrhq_p(&pp[k], vecP, p0);
+
+      cnt -= 8;
+    }
+
+
+    for(k=0;k < n; k++)
+    {
+        /* Find pivot */
+        float32_t m=F32_MIN,a;
+        int j=k;
+
+
+        for(int r=k;r<n;r++)
+        {
+           if (pA[r*n+r] > m)
+           {
+             m = pA[r*n+r];
+             j = r;
+           }
+        }
+
+        if(j != k)
+        {
+          SWAP_ROWS_F32(pA,k,j);
+          SWAP_COLS_F32(pA,k,j);
+        }
+
+
+        pp[k] = j;
+
+        a = pA[k*n+k];
+
+        if (fabsf(a) < 1.0e-8f)
+        {
+
+            fullRank = 0;
+            break;
+        }
+
+        float32_t invA;
+
+        invA = 1.0f / a;
+
+        int32x4_t vecOffs;
+        int w;
+        vecOffs = vidupq_u32((uint32_t)0, 1);
+        vecOffs = vmulq_n_s32(vecOffs,n);
+
+        for(w=k+1; w<n; w+=4)
+        {
+          int cnt = n - k - 1;
+
+          f32x4_t vecX;
+
+          f32x4_t vecA;
+          f32x4_t vecW0,vecW1, vecW2, vecW3;
+
+          mve_pred16_t p0;
+
+          vecW0 = vdupq_n_f32(pA[(w + 0)*n+k]);
+          vecW1 = vdupq_n_f32(pA[(w + 1)*n+k]);
+          vecW2 = vdupq_n_f32(pA[(w + 2)*n+k]);
+          vecW3 = vdupq_n_f32(pA[(w + 3)*n+k]);
+
+          for(int x=k+1;x<n;x += 4)
+          {
+             p0 = vctp32q(cnt);
+
+             //pA[w*n+x] = pA[w*n+x] - pA[w*n+k] * (pA[x*n+k] * invA);
+
+
+             vecX = vldrwq_gather_shifted_offset_z_f32(&pA[x*n+k], (uint32x4_t)vecOffs, p0);
+             vecX = vmulq_m_n_f32(vuninitializedq_f32(),vecX,invA,p0);
+
+
+             vecA = vldrwq_z_f32(&pA[(w + 0)*n+x],p0);
+             vecA = vfmsq_m(vecA, vecW0, vecX, p0);
+             vstrwq_p(&pA[(w + 0)*n+x], vecA, p0);
+
+             vecA = vldrwq_z_f32(&pA[(w + 1)*n+x],p0);
+             vecA = vfmsq_m(vecA, vecW1, vecX, p0);
+             vstrwq_p(&pA[(w + 1)*n+x], vecA, p0);
+
+             vecA = vldrwq_z_f32(&pA[(w + 2)*n+x],p0);
+             vecA = vfmsq_m(vecA, vecW2, vecX, p0);
+             vstrwq_p(&pA[(w + 2)*n+x], vecA, p0);
+
+             vecA = vldrwq_z_f32(&pA[(w + 3)*n+x],p0);
+             vecA = vfmsq_m(vecA, vecW3, vecX, p0);
+             vstrwq_p(&pA[(w + 3)*n+x], vecA, p0);
+
+             cnt -= 4;
+          }
+        }
+
+        for(; w<n; w++)
+        {
+          int cnt = n - k - 1;
+
+          f32x4_t vecA,vecX,vecW;
+
+
+          mve_pred16_t p0;
+
+          vecW = vdupq_n_f32(pA[w*n+k]);
+
+          for(int x=k+1;x<n;x += 4)
+          {
+             p0 = vctp32q(cnt);
+
+             //pA[w*n+x] = pA[w*n+x] - pA[w*n+k] * (pA[x*n+k] * invA);
+
+             vecA = vldrwq_z_f32(&pA[w*n+x],p0);
+
+             vecX = vldrwq_gather_shifted_offset_z_f32(&pA[x*n+k], (uint32x4_t)vecOffs, p0);
+             vecX = vmulq_m_n_f32(vuninitializedq_f32(),vecX,invA,p0);
+
+             vecA = vfmsq_m(vecA, vecW, vecX, p0);
+
+             vstrwq_p(&pA[w*n+x], vecA, p0);
+
+             cnt -= 4;
+          }
+        }
+
+        for(int w=k+1;w<n;w++)
+        {
+               pA[w*n+k] = pA[w*n+k] * invA;
+        }
+
+
+
+    }
+
+
+
+    diag=k;
+    if (!fullRank)
+    {
+      diag--;
+      for(int row=0; row < n;row++)
+      {
+        mve_pred16_t p0;
+        int cnt= n-k;
+        f32x4_t zero=vdupq_n_f32(0.0f);
+
+        for(int col=k; col < n;col += 4)
+        {
+           p0 = vctp32q(cnt);
+
+           vstrwq_p(&pl->pData[row*n+col], zero, p0);
+
+           cnt -= 4;
+        }
+      }
+    }
+
+    for(int row=0; row < n;row++)
+    {
+       mve_pred16_t p0;
+       int cnt= n-row-1;
+       f32x4_t zero=vdupq_n_f32(0.0f);
+
+       for(int col=row+1; col < n;col+=4)
+       {
+         p0 = vctp32q(cnt);
+
+         vstrwq_p(&pl->pData[row*n+col], zero, p0);
+
+         cnt -= 4;
+       }
+    }
+
+    for(int d=0; d < diag;d++)
+    {
+      pd->pData[d*n+d] = pl->pData[d*n+d];
+      pl->pData[d*n+d] = 1.0;
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+
+  /* Return to application */
+  return (status);
+}
+#else
+
+/// @private
+#define SWAP_ROWS_F32(A,i,j)     \
+  for(w=0;w < n; w++)    \
+  {                          \
+     float32_t tmp;          \
+     tmp = A[i*n + w];       \
+     A[i*n + w] = A[j*n + w];\
+     A[j*n + w] = tmp;       \
+  }
+
+/// @private
+#define SWAP_COLS_F32(A,i,j)     \
+  for(w=0;w < n; w++)    \
+  {                          \
+     float32_t tmp;          \
+     tmp = A[w*n + i];       \
+     A[w*n + i] = A[w*n + j];\
+     A[w*n + j] = tmp;       \
+  }
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixChol
+  @{
+ */
+
+/**
+   * @brief Floating-point LDL^t decomposition of positive semi-definite matrix.
+   * @param[in]  pSrc   points to the instance of the input floating-point matrix structure.
+   * @param[out] pl   points to the instance of the output floating-point triangular matrix structure.
+   * @param[out] pd   points to the instance of the output floating-point diagonal matrix structure.
+   * @param[out] pp   points to the instance of the output floating-point permutation vector.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_DECOMPOSITION_FAILURE      : Input matrix cannot be decomposed
+   * @par
+   *  Computes the LDL^t decomposition of a matrix A such that P A P^t = L D L^t.
+   */
+arm_status arm_mat_ldlt_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pl,
+  arm_matrix_instance_f32 * pd,
+  uint16_t * pp)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pl->numRows != pl->numCols) ||
+      (pd->numRows != pd->numCols) ||
+      (pl->numRows != pd->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    const int n=pSrc->numRows;
+    int fullRank = 1, diag,k;
+    float32_t *pA;
+    int row,d;
+
+    memcpy(pl->pData,pSrc->pData,n*n*sizeof(float32_t));
+    pA = pl->pData;
+
+    for(k=0;k < n; k++)
+    {
+      pp[k] = k;
+    }
+
+
+    for(k=0;k < n; k++)
+    {
+        /* Find pivot */
+        float32_t m=F32_MIN,a;
+        int j=k;
+
+
+        int r;
+        int w;
+
+        for(r=k;r<n;r++)
+        {
+           if (pA[r*n+r] > m)
+           {
+             m = pA[r*n+r];
+             j = r;
+           }
+        }
+
+        if(j != k)
+        {
+          SWAP_ROWS_F32(pA,k,j);
+          SWAP_COLS_F32(pA,k,j);
+        }
+
+
+        pp[k] = j;
+
+        a = pA[k*n+k];
+
+        if (fabsf(a) < 1.0e-8f)
+        {
+
+            fullRank = 0;
+            break;
+        }
+
+        for(w=k+1;w<n;w++)
+        {
+          int x;
+          for(x=k+1;x<n;x++)
+          {
+             pA[w*n+x] = pA[w*n+x] - pA[w*n+k] * pA[x*n+k] / a;
+          }
+        }
+
+        for(w=k+1;w<n;w++)
+        {
+               pA[w*n+k] = pA[w*n+k] / a;
+        }
+
+
+
+    }
+
+
+
+    diag=k;
+    if (!fullRank)
+    {
+      diag--;
+      for(row=0; row < n;row++)
+      {
+        int col;
+        for(col=k; col < n;col++)
+        {
+           pl->pData[row*n+col]=0.0;
+        }
+      }
+    }
+
+    for(row=0; row < n;row++)
+    {
+       int col;
+       for(col=row+1; col < n;col++)
+       {
+         pl->pData[row*n+col] = 0.0;
+       }
+    }
+
+    for(d=0; d < diag;d++)
+    {
+      pd->pData[d*n+d] = pl->pData[d*n+d];
+      pl->pData[d*n+d] = 1.0;
+    }
+
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixChol group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f64.c
new file mode 100755
index 00000000..36deadc9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_ldlt_f64.c
@@ -0,0 +1,227 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_ldl_f64.c
+ * Description:  Floating-point LDL decomposition
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+#include <math.h>
+
+
+
+/// @private
+#define SWAP_ROWS_F64(A,i,j) \
+{                            \
+  int w;                     \
+  for(w=0;w < n; w++)        \
+  {                          \
+     float64_t tmp;          \
+     tmp = A[i*n + w];       \
+     A[i*n + w] = A[j*n + w];\
+     A[j*n + w] = tmp;       \
+  }                          \
+}
+
+/// @private
+#define SWAP_COLS_F64(A,i,j) \
+{                            \
+  int w;                     \
+  for(w=0;w < n; w++)        \
+  {                          \
+     float64_t tmp;          \
+     tmp = A[w*n + i];       \
+     A[w*n + i] = A[w*n + j];\
+     A[w*n + j] = tmp;       \
+  }                          \
+}
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixChol
+  @{
+ */
+
+/**
+   * @brief Floating-point LDL^t decomposition of positive semi-definite matrix.
+   * @param[in]  pSrc   points to the instance of the input floating-point matrix structure.
+   * @param[out] pl   points to the instance of the output floating-point triangular matrix structure.
+   * @param[out] pd   points to the instance of the output floating-point diagonal matrix structure.
+   * @param[out] pp   points to the instance of the output floating-point permutation vector.
+   * @return The function returns ARM_MATH_SIZE_MISMATCH, if the dimensions do not match.
+   * @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+                   - \ref ARM_MATH_DECOMPOSITION_FAILURE      : Input matrix cannot be decomposed
+   * @par
+   *  Computes the LDL^t decomposition of a matrix A such that P A P^t = L D L^t.
+   */
+
+arm_status arm_mat_ldlt_f64(
+  const arm_matrix_instance_f64 * pSrc,
+  arm_matrix_instance_f64 * pl,
+  arm_matrix_instance_f64 * pd,
+  uint16_t * pp)
+{
+
+  arm_status status;                             /* status of matrix inverse */
+ 
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pSrc->numCols) ||
+      (pl->numRows != pl->numCols) ||
+      (pd->numRows != pd->numCols) ||
+      (pl->numRows != pd->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    const int n=pSrc->numRows;
+    int fullRank = 1, diag,k;
+    float64_t *pA;
+
+    memcpy(pl->pData,pSrc->pData,n*n*sizeof(float64_t));
+    pA = pl->pData;
+
+    for(k=0;k < n; k++)
+    {
+      pp[k] = k;
+    }
+
+
+    for(k=0;k < n; k++)
+    {
+        /* Find pivot */
+        float64_t m=F64_MIN,a;
+        int w,r,j=k; 
+
+
+        for(r=k;r<n;r++)
+        {
+           if (pA[r*n+r] > m)
+           {
+             m = pA[r*n+r];
+             j = r;
+           }
+        }
+
+        if(j != k)
+        {
+          SWAP_ROWS_F64(pA,k,j);
+          SWAP_COLS_F64(pA,k,j);
+        }
+
+
+        pp[k] = j;
+
+        a = pA[k*n+k];
+
+        if (fabs(a) < 1.0e-18)
+        {
+
+            fullRank = 0;
+            break;
+        }
+
+        for(w=k+1;w<n;w++)
+        {
+          int x;
+          for(x=k+1;x<n;x++)
+          {
+             pA[w*n+x] = pA[w*n+x] - pA[w*n+k] * pA[x*n+k] / a;
+          }
+        }
+
+        for(w=k+1;w<n;w++)
+        {
+               pA[w*n+k] = pA[w*n+k] / a;
+        }
+
+        
+
+    }
+
+
+
+    diag=k;
+    if (!fullRank)
+    {
+      diag--;
+      {
+        int row;
+        for(row=0; row < n;row++)
+        {
+          int col;
+          for(col=k; col < n;col++)
+          {
+             pl->pData[row*n+col]=0.0;
+          }
+        }
+      }
+    }
+
+    {
+      int row;
+      for(row=0; row < n;row++)
+      {
+         int col;
+         for(col=row+1; col < n;col++)
+         {
+           pl->pData[row*n+col] = 0.0;
+         }
+      }
+    }
+
+    {
+      int d;
+      for(d=0; d < diag;d++)
+      {
+        pd->pData[d*n+d] = pl->pData[d*n+d];
+        pl->pData[d*n+d] = 1.0;
+      }
+    }
+  
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixChol group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f16.c
new file mode 100755
index 00000000..3d3e8209
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f16.c
@@ -0,0 +1,763 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_f16.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+ * @ingroup groupMatrix
+ */
+
+
+/**
+ * @addtogroup MatrixMult
+ * @{
+ */
+
+/**
+ * @brief Floating-point matrix multiplication.
+ * @param[in]       *pSrcA points to the first input matrix structure
+ * @param[in]       *pSrcB points to the second input matrix structure
+ * @param[out]      *pDst points to output matrix structure
+ * @return     		The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+__STATIC_FORCEINLINE arm_status arm_mat_mult_f16_2x2_mve(
+    const arm_matrix_instance_f16 *pSrcA,
+    const arm_matrix_instance_f16 *pSrcB,
+    arm_matrix_instance_f16 *pDst)
+{
+    static const uint16_t offsetA[8] = { 0, 0, 2, 2, 0, 0, 2, 2 };
+    /* offsetB allows to read and duplicate 1 row of B */
+    static const uint16_t offsetB[8] = { 0, 1, 0, 1, 0, 1, 0, 1 };
+    uint16x8_t    vecOffsA, vecOffsB;
+    f16x8_t       vecInA, vecInB, vecDst;
+    float16_t      *pOut = pDst->pData;  /* output data matrix pointer */
+
+    /*
+     * load initial offsets
+     */
+    vecOffsA = vldrhq_u16((uint16_t const *) offsetA);
+    vecOffsB = vldrhq_u16((uint16_t const *) offsetB);
+    /*
+     * load {a00 a00 a10 a10 x x x x }
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * load {b00 b01 b00 b01 x x x x }
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  { a00 b00       a00 b01
+     *    a10 b00       a10 b01
+     *       x             x
+     *       x             x   }
+     */
+    vecDst = vmulq(vecInA, vecInB);
+    /*
+     * move to 2nd column of matrix A
+     */
+    vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 1);
+    /*
+     * load {a01 a01 a11 a11 x x x x}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * move to next B row
+     */
+    vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 2);
+    /*
+     * load {b10, b11, b10, b11, x x x x }
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  { a00 b00 + a01 b10   a00 b01 + a01 b11
+     *    a10 b00 + a11 b10     a10 b01 + a11 b11
+     *             x                    x
+     *             x                    x       }
+     */
+    vecDst = vfmaq(vecDst, vecInA, vecInB);
+
+    mve_pred16_t p0 = vctp16q(2*2);
+    /*
+     * Store the result in the destination buffer
+     * (lower half of the vector)
+     */
+    vstrhq_p(pOut, vecDst, p0);
+
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+
+__STATIC_FORCEINLINE arm_status arm_mat_mult_f16_3x3_mve(
+    const arm_matrix_instance_f16 *pSrcA,
+    const arm_matrix_instance_f16 *pSrcB,
+    arm_matrix_instance_f16 *pDst)
+{
+    static const uint16_t offsetA[8] = { 0, 0, 0, 3, 3, 3, 6, 6 };
+    /* offsetB allows to read and duplicate 1 row of B */
+    static const uint16_t offsetB[8] = { 0, 1, 2, 0, 1, 2, 0, 1 };
+    uint16x8_t    vecOffsA, vecOffsB;
+    f16x8_t       vecInA, vecInB, vecDst;
+    float16_t      *pOut = pDst->pData;  /* output data matrix pointer */
+
+    /*
+     * load initial offsets
+     */
+    vecOffsA = vldrhq_u16((uint16_t const *) offsetA);
+    vecOffsB = vldrhq_u16((uint16_t const *) offsetB);
+
+    /*
+     * load {a00 a00 a00 a10 a10 a10 a20 a20}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * load {b00 b01 b02 b00 b01 b02 b00 b01}
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  { a00 b00       a00 b01     a00 b02
+     *    a10 b00       a10 b01     a10 b02
+     *    a20 b00       a20 b01}
+     */
+    vecDst = vmulq(vecInA, vecInB);
+
+    /*
+     * move to 2nd column of matrix A
+     */
+    vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 1);
+    /*
+     * load {a01 a01 a01 a11 a11 a11 a21 a21}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * move to next B row
+     */
+    vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 3);
+    /*
+     * load {b10, b11, b12, b10, b11, b12, b10, b11}
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  { a00 b00 + a01 b10   a00 b01 + a01 b11     a00 b02 + a01 b12
+     *    a10 b00 + a11 b10     a10 b01 + a11 b11     a10 b02 + a11 b12
+     *    a20 b00 + a21 b10     a20 b01 + a21 b11   }
+     */
+    vecDst = vfmaq(vecDst, vecInA, vecInB);
+    /*
+     * move to 3rd column of matrix A
+     */
+    vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 1);
+    /*
+     * load {a02 a02 a02 a12 a12 a12 a22 a22}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * move to next B row
+     */
+    vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 3);
+    /*
+     * load {b20, b21, b22, b20, b21, b22, b20, b21}
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  {a00 b00 + a01 b10 + a02 b20  a00 b01 + a01 b11 + a02 b21     a00 b02 + a01 b12 + a02 b22},
+     *   a10 b00 + a11 b10 + a12 b20    a10 b01 + a11 b11 + a12 b21     a10 b02 + a11 b12 + a12 b22},
+     *   a20 b00 + a21 b10 + a22 b20    a20 b01 + a21 b11 + a22 b21   }
+     */
+    vecDst = vfmaq(vecDst, vecInA, vecInB);
+
+    /*
+     * Store the result in the destination buffer
+     */
+    vst1q(pOut, vecDst); pOut += 8;
+
+    /* last element computed in scalar mode
+     * a20 b02 + a21 b12 + a22 b22
+     */
+    _Float16 * pA = (_Float16 *)pSrcA->pData;
+    _Float16 * pB = (_Float16 *)pSrcB->pData;
+    *pOut = pA[2*3] * pB[2] + pA[2*3+1] * pB[3+2] + pA[2*3+2] * pB[2*3+2];
+
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+
+
+__STATIC_FORCEINLINE arm_status arm_mat_mult_f16_4x4_mve(
+    const arm_matrix_instance_f16 *pSrcA,
+    const arm_matrix_instance_f16 *pSrcB,
+    arm_matrix_instance_f16 *pDst)
+{
+    /* offsetA allows to read and duplicate 2 successive column elements of A */
+    static const uint16_t offsetA[8] = { 0, 0, 0, 0, 4, 4, 4, 4 };
+    /* offsetB allows to read and duplicate 1 row of B */
+    static const uint16_t offsetB[8] = { 0, 1, 2, 3, 0, 1, 2, 3 };
+    uint16x8_t    vecOffsA, vecOffsB;
+    f16x8_t       vecInA, vecInB, vecDst0, vecDst1;
+    float16_t      *pOut = pDst->pData;  /* output data matrix pointer */
+
+    /*
+     * load initial offsets
+     */
+    vecOffsA = vldrhq_u16((uint16_t const *) offsetA);
+    vecOffsB = vldrhq_u16((uint16_t const *) offsetB);
+
+    /*
+     * load {a00 a00 a00 a00 a10 a10 a10 a10}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * load {b00 b01 b02 b03 b00 b01 b02 b03}
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  { a00 b00       a00 b01     a00 b02     a00 b03
+     *    a10 b00       a10 b01     a10 b02     a10 b03 }
+     */
+    vecDst0 = vmulq(vecInA, vecInB);
+    /*
+     * jump 2 x A rows (2nd half of matrix)
+     */
+    vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8);
+    /*
+     * load {a20 a20 a20 a20 a30 a30 a30 a30}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     *  { a20 b00       a20 b01     a20 b02     a20 b03
+     *    a30 b00       a30 b01     a30 b02 +   a31 b12 }
+     */
+    vecDst1 = vmulq(vecInA, vecInB);
+    /*
+     * rewind back to top half of the A matrix (2nd column)
+     */
+    vecOffsA = vsubq(vecOffsA, (uint16_t) 7);
+    /*
+     * load {a01 a01 a01 a01 a11 a11 a11 a11}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * move to next B row
+     */
+    vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 4);
+    /*
+     * load {b10, b11, b12, b13, b10, b11, b12, b13}
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  { a00 b00 + a01 b10         a00 b01 + a01 b11       a00 b02 + a01 b12       a00 b03 + a01 b13
+     *    a10 b00 + a11 b10         a10 b01 + a11 b11       a10 b02 + a11 b12       a10 b03 + a11 b13 }
+     */
+    vecDst0 = vfmaq(vecDst0, vecInA, vecInB);
+    /*
+     * jump 2 x A rows (2nd half of matrix)
+     */
+    vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8);
+    /*
+     * load {a21 a21 a21 a21 a31 a31 a31 a31}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     *  {a20 b00 + a21 b10      a20 b01 + a21 b11       a20 b02 + a21 b12       a20 b03 + a21 b13
+     *   a30 b00 + a31 b10      a30 b01 + a31 b11       a30 b02 + a31 b12       a30 b03 + a31 b13 }
+     */
+    vecDst1 = vfmaq(vecDst1, vecInA, vecInB);
+
+    /*
+     * rewind back to top half of the A matrix (3rd column)
+     */
+    vecOffsA = vsubq(vecOffsA, (uint16_t) 7);
+    /*
+     * load {a02 a02 a02 a02 a12 a12 a12 a12}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * move to next B row
+     */
+    vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 4);
+    /*
+     * load {b20, b21, b22, b23, b20, b21, b22, b23}
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     *  { a00 b00 + a01 b10 + a02 b20    a00 b01 + a01 b11 + a02 b21    a00 b02 + a01 b12 + a02 b22   a00 b03 + a01 b13 + a02 b23
+     *    a10 b00 + a11 b10 + a12 b20    a10 b01 + a11 b11 + a12 b21    a10 b02 + a11 b12 + a12 b22   a10 b03 + a11 b13 + a12 b23 }
+     */
+    vecDst0 = vfmaq(vecDst0, vecInA, vecInB);
+    /*
+     * jump 2 x A rows
+     */
+    vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8);
+
+    /*
+     * load {a22 a22 a22 a22 a32 a32 a32 a32}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     *  {a20 b00 + a21 b10 + a22 b20   a20 b01 + a21 b11 + a22 b21  a20 b02 + a21 b12 + a22 b22    a20 b03 + a21 b13 + a22 b23
+     *   a30 b00 + a31 b10 + a32 b20   a30 b01 + a31 b11 + a32 b21  a30 b02 + a31 b12 + a32 b22    a30 b03 + a31 b13 + a32 b23 }
+     */
+    vecDst1 = vfmaq(vecDst1, vecInA, vecInB);
+
+    /*
+     * rewind back to top half of the A matrix (4th column)
+     */
+    vecOffsA = vsubq(vecOffsA, (uint16_t) 7);
+    /*
+     * load {a03 a03 a03 a03 a13 a13 a13 a13}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     * move to next B row
+     */
+    vecOffsB = vaddq_n_u16(vecOffsB, (uint16_t) 4);
+    /*
+     * load {b30, b31, b32, b33, b30, b31, b32, b33}
+     */
+    vecInB = vldrhq_gather_shifted_offset((float16_t const *) pSrcB->pData, vecOffsB);
+    /*
+     * { a00 b00 +...+ a03 b30,    a00 b01 +...+ a03 b31,   a00 b02 +...+ a03 b32,   a00 b03 +...+ a03 b33
+     *   a10 b00 +...+ a13 b30,    a10 b01 +...+ a13 b31,   a10 b02 +...+ a13 b32,   a10 b03 +...+ a13 b33 }
+     */
+    vecDst0 = vfmaq(vecDst0, vecInA, vecInB);
+    /*
+     * jump 2 x A rows
+     */
+    vecOffsA = vaddq_n_u16(vecOffsA, (uint16_t) 8);
+    /*
+     * load {a23 a23 a23 a23 a33 a33 a33 a33}
+     */
+    vecInA = vldrhq_gather_shifted_offset((float16_t const *) pSrcA->pData, vecOffsA);
+    /*
+     *  {a20 b00 +...+ a23 b30,   a20 b01 +...+ a23 b31,   a20 b02 +...+ a23 b32,   a20 b03 +...+ a23 b33
+     *   a30 b00 +...+ a33 b30,   a30 b01 +...+ a33 b31,   a30 b02 +...+ a33 b32,   a30 b03 +...+ a33 b33 }
+     */
+    vecDst1 = vfmaq(vecDst1, vecInA, vecInB);
+
+    /*
+     * Store the result in the destination buffer
+     */
+    vst1q(pOut, vecDst0); pOut += 8;
+    vst1q(pOut, vecDst1);
+
+    return (ARM_MATH_SUCCESS);
+}
+
+
+arm_status arm_mat_mult_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+  arm_matrix_instance_f16 * pDst)
+{
+       float16_t  *pInB = pSrcB->pData;        /* input data matrix pointer B */
+    float16_t  *pInA = pSrcA->pData;        /* input data matrix pointer A  */
+    float16_t  *pOut = pDst->pData;         /* output data matrix pointer */
+    int         numRowsA = pSrcA->numRows;  /* number of rows of input matrix A */
+    int         numColsB = pSrcB->numCols;  /* number of columns of input matrix B */
+    int         numColsA = pSrcA->numCols;  /* number of columns of input matrix A */
+    uint32_t    blkCnt;                     /* loop counters */
+    int         i;
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    return(ARM_MATH_SIZE_MISMATCH);
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+{
+    /* small squared matrix specialized routines */
+    if(numRowsA == numColsB && numColsB == numColsA) {
+        if(numRowsA == 2)
+            return arm_mat_mult_f16_2x2_mve(pSrcA, pSrcB, pDst);
+        else if(numRowsA == 3)
+            return arm_mat_mult_f16_3x3_mve(pSrcA, pSrcB, pDst);
+        else if(numRowsA == 4)
+            return arm_mat_mult_f16_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+
+    /* main loop process 4 rows */
+    i = numRowsA / 4;
+    while(i > 0)
+    {
+        float16_t   *pInA0, *pInA1, *pInA2, *pInA3;
+        float16_t   *pInB0;
+        float16_t   *pOut0, *pOut1, *pOut2, *pOut3;
+        f16x8_t    vecMac0, vecMac1, vecMac2, vecMac3;
+        f16x8_t    vecInB;
+
+        /* pointers to 4 consecutive output rows */
+        pOut0 = pOut;
+        pOut1 = pOut0 + numColsB;
+        pOut2 = pOut1 + numColsB;
+        pOut3 = pOut2 + numColsB;
+        pInB0 = pInB;
+
+        int       k = numColsB >> 3;
+        while(k > 0)
+        {
+            /* pointers to 4 consecutive Matrix A rows */
+            pInA0 = pInA;
+            pInA1 = pInA0 + numColsA;
+            pInA2 = pInA1 + numColsA;
+            pInA3 = pInA2 + numColsA;
+
+            vecMac0 = vdupq_n_f16(0.0f16);
+            vecMac1 = vdupq_n_f16(0.0f16);
+            vecMac2 = vdupq_n_f16(0.0f16);
+            vecMac3 = vdupq_n_f16(0.0f16);
+
+            blkCnt = numColsA;
+
+            while (blkCnt > 0U)
+            {
+                /*
+                 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3..., bi,4n+7}
+                 */
+                vecInB = *(f16x8_t *)pInB0; /* vldrhq_f16(pInB0, 0); */
+
+                vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+                vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+                vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+                vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++);
+
+                pInB0 = pInB0 + numColsB;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+
+            /* Store the results (4 x 8 block) in the destination buffer */
+            vst1q(pOut0, vecMac0);  pOut0 += 8;
+            vst1q(pOut1, vecMac1);  pOut1 += 8;
+            vst1q(pOut2, vecMac2);  pOut2 += 8;
+            vst1q(pOut3, vecMac3);  pOut3 += 8;
+            /*
+             * rewind
+             */
+            pInB0 -= (numColsB * numColsA) - 8;
+            k--;
+        }
+
+        int       colBLeft = numColsB & 7;
+        if (colBLeft)
+        {
+            pInA0 = pInA;
+            pInA1 = pInA0 + numColsA;
+            pInA2 = pInA1 + numColsA;
+            pInA3 = pInA2 + numColsA;
+            mve_pred16_t p0 = vctp16q(colBLeft);
+
+            vecMac0 = vdupq_n_f16(0.0f16);
+            vecMac1 = vdupq_n_f16(0.0f16);
+            vecMac2 = vdupq_n_f16(0.0f16);
+            vecMac3 = vdupq_n_f16(0.0f16);
+
+            blkCnt = numColsA;
+
+            while (blkCnt > 0U)
+            {
+                /*
+                 * load {bi,4n+0, bi,4n+1, bi,4n+2, ..bi,4n+colBLeft-1, 0, ..}
+                 */
+                vecInB = vldrhq_z_f16(pInB0, p0);
+
+                vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+                vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+                vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+                vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++);
+
+                pInB0 = pInB0 + numColsB;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+
+            /* Store the results (4 x colBLeft block) in the destination buffer */
+            vstrhq_p_f16(pOut0, vecMac0, p0);
+            vstrhq_p_f16(pOut1, vecMac1, p0);
+            vstrhq_p_f16(pOut2, vecMac2, p0);
+            vstrhq_p_f16(pOut3, vecMac3, p0);
+        }
+
+        pInA += 4 * numColsA;
+        pOut += 4 * numColsB;
+        i--;
+    }
+
+    /*
+     * non multiple of 4 rows for Matrix A
+     * process single row
+     */
+    if (numRowsA & 3)
+    {
+        i = numRowsA & 3;
+        do
+        {
+            float16_t   *pInA0;
+            float16_t   *pInB0;
+            float16_t   *pOut0;
+            f16x8_t    vecInB;
+            f16x8_t    vecMac0;
+
+            pOut0 = pOut;
+            pInB0 = pInB;
+
+            int       k = numColsB >> 3;
+            while(k > 0)
+            {
+                pInA0 = pInA;
+
+                vecMac0 = vdupq_n_f16(0.0f16);
+                blkCnt = numColsA;
+
+                while (blkCnt > 0U)
+                {
+                    /*
+                     * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3, ...bi,4n+7}
+                     */
+                    vecInB = *(f16x8_t *)pInB0; /* vldrhq_f16(pInB0, 0); */
+
+                    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+
+                    pInB0 = pInB0 + numColsB;
+                    /*
+                     * Decrement the blockSize loop counter
+                     */
+                    blkCnt--;
+                }
+                /* Store the results (1 x 8 block) in the destination buffer */
+                vst1q(pOut0, vecMac0);   pOut0 += 8;
+                /*
+                 * rewind
+                 */
+                pInB0 -= (numColsB * numColsA) - 8;
+                k--;
+            }
+
+            int  colBLeft = numColsB & 7;
+            if (colBLeft)
+            {
+                pInA0 = pInA;
+                mve_pred16_t p0 = vctp16q(colBLeft);
+
+                vecMac0 = vdupq_n_f16(0.0f16);
+                blkCnt = numColsA;
+
+                while (blkCnt > 0U)
+                {
+                    /*
+                     * load {bi,4n+0, bi,4n+1, bi,4n+2, ..., bi,4n+colBLeft, 0, ...}
+                     */
+                    vecInB = vldrhq_z_f16(pInB0, p0);
+
+                    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+
+                    pInB0 = pInB0 + numColsB;
+                    /*
+                     * Decrement the blockSize loop counter
+                     */
+                    blkCnt--;
+                }
+                /* Store the results (1 x colBLeft block) in the destination buffer */
+                vstrhq_p_f16(pOut0, vecMac0, p0);
+            }
+
+            pInA += 1 * numColsA;
+            pOut += 1 * numColsB;
+        }
+        while (--i);
+    }
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+  }
+}
+#else
+
+
+arm_status arm_mat_mult_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float16_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float16_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float16_t *pInB = pSrcB->pData;                /* Input data matrix pointer B */
+  float16_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float16_t *px;                                 /* Temporary output data matrix pointer */
+  _Float16 sum;                                 /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0.0f16;
+
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (_Float16)*pIn1++ * (_Float16)*pIn2;
+          pIn2 += numColsB;
+
+          sum += (_Float16)*pIn1++ * (_Float16)*pIn2;
+          pIn2 += numColsB;
+
+          sum += (_Float16)*pIn1++ * (_Float16)*pIn2;
+          pIn2 += numColsB;
+
+          sum += (_Float16)*pIn1++ * (_Float16)*pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (_Float16)*pIn1++ * (_Float16)*pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sum;
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixMult group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
index 35517d60..d1fd9eac 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f32.c
@@ -1,534 +1,1001 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_mult_f32.c
- * Description:  Floating-point matrix multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
- * @ingroup groupMatrix
- */
-
-/**
- * @defgroup MatrixMult Matrix Multiplication
- *
- * Multiplies two matrices.
- *
- * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
-
- * Matrix multiplication is only defined if the number of columns of the
- * first matrix equals the number of rows of the second matrix.
- * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
- * in an <code>M x P</code> matrix.
- * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
- * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
- * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
- */
-
-
-/**
- * @addtogroup MatrixMult
- * @{
- */
-
-/**
- * @brief Floating-point matrix multiplication.
- * @param[in]       *pSrcA points to the first input matrix structure
- * @param[in]       *pSrcB points to the second input matrix structure
- * @param[out]      *pDst points to output matrix structure
- * @return     		The function returns either
- * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
- */
-#if defined(ARM_MATH_NEON)
-
-#define GROUPOFROWS 8
-
-arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
-
-
-  float32_t in1, in2, in3, in4;
-  uint16_t col, i = 0U, j, row = numRowsA, rowCnt, colCnt;      /* loop counters */
-  arm_status status;                             /* status of matrix multiplication */
-
-  float32x4_t a0V, a1V, a2V, a3V, a4V, a5V, a6V, a7V;
-  float32x4_t acc0,acc1,acc2,acc3,acc4,acc5,acc6,acc7,temp;
-  float32x2_t accum = vdup_n_f32(0);
-  float32_t *pIn1B = pSrcA->pData;    
-  float32_t *pIn1C = pSrcA->pData;    
-  float32_t *pIn1D = pSrcA->pData;  
-  float32_t *pIn1E = pSrcA->pData; 
-  float32_t *pIn1F = pSrcA->pData; 
-  float32_t *pIn1G = pSrcA->pData; 
-  float32_t *pIn1H = pSrcA->pData;   
-
-  float32_t *pxB,*pxC, *pxD, *pxE, *pxF, *pxG, *pxH;                                 /* Temporary output data matrix pointer */
-  float32_t sum0,sum1, sum2,sum3, sum4, sum5 , sum6, sum7;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* Row loop */
-    rowCnt = row >> 3;
-
-    while(rowCnt > 0)
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + GROUPOFROWS*i;
-      pxB = px + numColsB;
-      pxC = px + 2*numColsB;
-      pxD = px + 3*numColsB;
-      pxE = px + 4*numColsB;
-      pxF = px + 5*numColsB;
-      pxG = px + 6*numColsB;
-      pxH = px + 7*numColsB;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0U;
-
-      /* Column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum0 = 0.0f;
-        sum1 = 0.0f;
-        sum2 = 0.0f;
-        sum3 = 0.0f;
-        sum4 = 0.0f;
-        sum5 = 0.0f;
-        sum6 = 0.0f;
-        sum7 = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-        pIn1B = pIn1 + numColsA;
-        pIn1C = pIn1 + 2*numColsA;
-        pIn1D = pIn1 + 3*numColsA;
-        pIn1E = pIn1 + 4*numColsA;
-        pIn1F = pIn1 + 5*numColsA;
-        pIn1G = pIn1 + 6*numColsA;
-        pIn1H = pIn1 + 7*numColsA;
-
-        acc0 = vdupq_n_f32(0.0);
-        acc1 = vdupq_n_f32(0.0);
-        acc2 = vdupq_n_f32(0.0);
-        acc3 = vdupq_n_f32(0.0);
-        acc4 = vdupq_n_f32(0.0);
-        acc5 = vdupq_n_f32(0.0);
-        acc6 = vdupq_n_f32(0.0);
-        acc7 = vdupq_n_f32(0.0);
-
-        /* Compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2U;
-
-        /* Matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
-          a0V = vld1q_f32(pIn1);  
-          a1V = vld1q_f32(pIn1B);  
-          a2V = vld1q_f32(pIn1C); 
-          a3V = vld1q_f32(pIn1D); 
-          a4V = vld1q_f32(pIn1E); 
-          a5V = vld1q_f32(pIn1F); 
-          a6V = vld1q_f32(pIn1G); 
-          a7V = vld1q_f32(pIn1H); 
-
-	  pIn1 += 4;
-          pIn1B += 4;
-          pIn1C += 4;
-          pIn1D += 4;
-          pIn1E += 4;
-          pIn1F += 4;
-          pIn1G += 4;
-          pIn1H += 4;
-          
-          temp[0] = *pIn2;
-          pIn2 += numColsB;
-          temp[1] = *pIn2;
-          pIn2 += numColsB;
-          temp[2] = *pIn2;
-          pIn2 += numColsB;
-          temp[3] = *pIn2;
-          pIn2 += numColsB;
-
-          acc0 = vmlaq_f32(acc0,a0V,temp);
-          acc1 = vmlaq_f32(acc1,a1V,temp);
-          acc2 = vmlaq_f32(acc2,a2V,temp);
-          acc3 = vmlaq_f32(acc3,a3V,temp);
-          acc4 = vmlaq_f32(acc4,a4V,temp);
-          acc5 = vmlaq_f32(acc5,a5V,temp);
-          acc6 = vmlaq_f32(acc6,a6V,temp);
-          acc7 = vmlaq_f32(acc7,a7V,temp);
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
-        sum0 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1));
-        sum1 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2));
-        sum2 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3));
-        sum3 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(acc4), vget_high_f32(acc4));
-        sum4 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(acc5), vget_high_f32(acc5));
-        sum5 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(acc6), vget_high_f32(acc6));
-        sum6 += accum[0] + accum[1];
-
-        accum = vpadd_f32(vget_low_f32(acc7), vget_high_f32(acc7));
-        sum7 += accum[0] + accum[1];
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        colCnt = numColsA & 3;
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
-          sum0 += *pIn1++ * (*pIn2);
-          sum1 += *pIn1B++ * (*pIn2);
-          sum2 += *pIn1C++ * (*pIn2);
-          sum3 += *pIn1D++ * (*pIn2);
-          sum4 += *pIn1E++ * (*pIn2);
-          sum5 += *pIn1F++ * (*pIn2);
-          sum6 += *pIn1G++ * (*pIn2);
-          sum7 += *pIn1H++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum0;
-        *pxB++ = sum1;
-        *pxC++ = sum2;
-        *pxD++ = sum3;
-        *pxE++ = sum4;
-        *pxF++ = sum5;
-        *pxG++ = sum6;
-        *pxH++ = sum7;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while (col > 0U);
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + GROUPOFROWS*numColsA;
-
-      /* Decrement the row loop counter */
-      rowCnt--;
-    } 
-
-    /*
-
-    i was the index of a group of rows computed by previous loop.
-    Now i is the index of a row since below code is computing row per row
-    and no more group of row per group of rows.
-
-    */
-
-    i = GROUPOFROWS*i;
-    rowCnt = row & 7;
-
-    while(rowCnt > 0)
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, the column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, the pIn2 pointer is set
-       ** to the starting address of the pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      j = 0U;
-
-      /* Column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
-        pIn1 = pInA;
-
-        acc0 = vdupq_n_f32(0.0);
-
-        /* Compute 4 MACs simultaneously. */
-        colCnt = numColsA >> 2U;
-
-        /* Matrix multiplication   */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
-          a0V = vld1q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
-          pIn1 += 4;
-          
-          temp[0] = *pIn2;
-          pIn2 += numColsB;
-          temp[1] = *pIn2;
-          pIn2 += numColsB;
-          temp[2] = *pIn2;
-          pIn2 += numColsB;
-          temp[3] = *pIn2;
-          pIn2 += numColsB;
-
-          acc0 = vmlaq_f32(acc0,a0V,temp);
-
-          /* Decrement the loop count */
-          colCnt--;
-        }
-
-        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
-        sum += accum[0] + accum[1];
-
-        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
-         ** No loop unrolling is used. */
-        colCnt = numColsA % 0x4U;
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
-          sum += *pIn1++ * (*pIn2);
-          pIn2 += numColsB;
-
-          /* Decrement the loop counter */
-          colCnt--;
-        }
-
-        /* Store the result in the destination buffer */
-        *px++ = sum;
-
-        /* Update the pointer pIn2 to point to the  starting address of the next column */
-        j++;
-        pIn2 = pSrcB->pData + j;
-
-        /* Decrement the column loop counter */
-        col--;
-
-      } while (col > 0U);
-
-
-      /* Update the pointer pInA to point to the  starting address of the next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement the row loop counter */
-      rowCnt--;
-
-    } 
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#else
-arm_status arm_mat_mult_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
-  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
-  float32_t *pInB = pSrcB->pData;                /* Input data matrix pointer B */
-  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  float32_t sum;                                 /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
-  arm_status status;                             /* Status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0.0f;
-
-        /* Initialize pointer pIn1 to point to starting address of column being processed */
-        pIn1 = pInA;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 MACs at a time. */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* Perform the multiply-accumulates */
-          sum += *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          sum += *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          sum += *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          sum += *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Loop unrolling: Compute remaining MACs */
-        colCnt = numColsA % 0x4U;
-
-#else
-
-        /* Initialize cntCnt with number of columns */
-        colCnt = numColsA;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* Perform the multiply-accumulates */
-          sum += *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Store result in destination buffer */
-        *px++ = sum;
-
-        /* Decrement column loop counter */
-        col--;
-
-        /* Update pointer pIn2 to point to starting address of next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while (col > 0U);
-
-      /* Update pointer pInA to point to starting address of next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
- * @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_f32.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+#if defined(ARM_MATH_NEON)
+#define GROUPOFROWS 8
+#endif
+
+/**
+ * @ingroup groupMatrix
+ */
+
+/**
+ * @defgroup MatrixMult Matrix Multiplication
+ *
+ * Multiplies two matrices.
+ *
+ * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
+
+ * Matrix multiplication is only defined if the number of columns of the
+ * first matrix equals the number of rows of the second matrix.
+ * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
+ * in an <code>M x P</code> matrix.
+ * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
+ * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
+ * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
+ */
+
+
+/**
+ * @addtogroup MatrixMult
+ * @{
+ */
+
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MATRIX_DIM3 3 
+#define MATRIX_DIM4 4 
+
+__STATIC_INLINE  arm_status arm_mat_mult_f32_2x2_mve(
+    const arm_matrix_instance_f32 *pSrcA,
+    const arm_matrix_instance_f32 *pSrcB,
+    arm_matrix_instance_f32 *pDst)
+{
+    /* {a00, a00, a10, a10} */
+    static const uint32_t  offsetA0[4] = { 0, 0, 2, 2 };
+    /* {b00, b01, b00, b01} */
+    static const uint32_t  offsetB0[4] = { 0, 1, 0, 1 };
+    /* {a01, a01, a11, a11} */
+    static const uint32_t  offsetA1[4] = { 1, 1, 3, 3 };
+    /* {b10, b11, b10, b11} */
+    static const uint32_t  offsetB1[4] = { 2, 3, 2, 3 };
+
+    uint32x4_t vecOffsA, vecOffsB;
+    f32x4_t vecInA, vecInB, vecDst;
+
+    vecOffsA = vldrwq_u32((uint32_t const *) offsetA0);
+    vecOffsB = vldrwq_u32((uint32_t const *) offsetB0);
+
+    vecInA = vldrwq_gather_shifted_offset((float32_t const *) pSrcA->pData, vecOffsA);
+    vecInB = vldrwq_gather_shifted_offset((float32_t const *) pSrcB->pData, vecOffsB);
+
+    vecDst = vmulq(vecInA, vecInB);
+
+    vecOffsA = vldrwq_u32((uint32_t const *) offsetA1);
+    vecOffsB = vldrwq_u32((uint32_t const *) offsetB1);
+
+    vecInA = vldrwq_gather_shifted_offset((float32_t const *) pSrcA->pData, vecOffsA);
+    vecInB = vldrwq_gather_shifted_offset((float32_t const *) pSrcB->pData, vecOffsB);
+
+    vecDst = vfmaq(vecDst, vecInA, vecInB);
+
+    vstrwq_f32(pDst->pData, vecDst);
+
+    return (ARM_MATH_SUCCESS);
+
+}
+
+
+/*
+ * A  =  {{a00, a01, a02},
+ *        {a10, a11, a12},
+ *        {a20, a21, a22}}
+ * B  =  {{b00, b01, b02},
+ *        {b10, b11, b12},
+ *        {b20, b21, b22}}
+ *
+ * Dst = {{a00 b00 + a01 b10 + a02 b20, a00 b01 + a01 b11 + a02 b21, a00 b02 + a01 b12 + a02 b22},
+ *        {a10 b00 + a11 b10 + a12 b20, a10 b01 + a11 b11 + a12 b21, a10 b02 + a11 b12 + a12 b22},
+ *        {a20 b00 + a21 b10 + a22 b20, a20 b01 + a21 b11 + a22 b21, a20 b02 + a21 b12 + a22 b22}}
+ */
+__STATIC_INLINE  arm_status arm_mat_mult_f32_3x3_mve(
+    const arm_matrix_instance_f32 *pSrcA,
+    const arm_matrix_instance_f32 *pSrcB,
+    arm_matrix_instance_f32 *pDst)
+{
+    float32_t   *pInB = pSrcB->pData; /* input data matrix pointer B */
+    float32_t   *pInA = pSrcA->pData; /* input data matrix pointer A  */
+    float32_t   *pOut = pDst->pData;  /* output data matrix pointer */
+    float32_t   *pInA0, *pInA1, *pInA2;
+    f32x4_t    vecMac0, vecMac1, vecMac2;
+    f32x4_t    vecInB;
+    float32_t const *pSrBVec;
+
+    pSrBVec = (float32_t const *) pInB;
+
+    pInA0 = pInA;
+    pInA1 = pInA0 + MATRIX_DIM3;
+    pInA2 = pInA1 + MATRIX_DIM3;
+    /* enable predication to disable last (4th) vector element */
+    mve_pred16_t p0 = vctp32q(MATRIX_DIM3);
+
+    /*
+     * load {b0,0, b0,1, b0,2, 0}
+     */
+    vecInB = vldrwq_z_f32(pSrBVec, p0);  
+    pSrBVec += MATRIX_DIM3;
+
+    vecMac0 = vmulq(vecInB, *pInA0++);
+    vecMac1 = vmulq(vecInB, *pInA1++);
+    vecMac2 = vmulq(vecInB, *pInA2++);
+    /*
+     * load {b1,0, b1,1, b1,2, 0}
+     */
+    vecInB = vldrwq_z_f32(pSrBVec, p0);  
+    pSrBVec += MATRIX_DIM3;
+
+    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+    vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+    vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+    /*
+     * load {b2,0, b2,1 , b2,2, 0}
+     */
+    vecInB = vldrwq_z_f32(pSrBVec, p0);  
+    pSrBVec += MATRIX_DIM3;
+
+    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+    vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+    vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+
+    /* partial vector stores */
+    vstrwq_p_f32(pOut, vecMac0, p0); 
+    pOut += MATRIX_DIM3;
+    vstrwq_p_f32(pOut, vecMac1, p0); 
+    pOut += MATRIX_DIM3;
+    vstrwq_p_f32(pOut, vecMac2, p0);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+
+__STATIC_INLINE arm_status arm_mat_mult_f32_4x4_mve(
+    const arm_matrix_instance_f32 *pSrcA,
+    const arm_matrix_instance_f32 *pSrcB,
+    arm_matrix_instance_f32 *pDst)
+{
+    float32_t const *pSrBVec;
+    float32_t *pInB = pSrcB->pData; /* input data matrix pointer B */
+    float32_t *pInA = pSrcA->pData; /* input data matrix pointer A  */
+    float32_t *pOut = pDst->pData;  /* output data matrix pointer */
+    float32_t *pInA0, *pInA1, *pInA2, *pInA3;
+    f32x4_t vecMac0, vecMac1, vecMac2, vecMac3;
+    f32x4_t vecInB;
+
+    pSrBVec = (float32_t const *) pInB;
+
+    pInA0 = pInA;
+    pInA1 = pInA0 + MATRIX_DIM4;
+    pInA2 = pInA1 + MATRIX_DIM4;
+    pInA3 = pInA2 + MATRIX_DIM4;
+    /*
+     * load {b0,0, b0,1, b0,2, b0,3}
+     */
+    vecInB = vld1q(pSrBVec);  
+    pSrBVec += MATRIX_DIM4;
+
+    vecMac0 = vmulq(vecInB, *pInA0++);
+    vecMac1 = vmulq(vecInB, *pInA1++);
+    vecMac2 = vmulq(vecInB, *pInA2++);
+    vecMac3 = vmulq(vecInB, *pInA3++);
+    /*
+     * load {b1,0, b1,1, b1,2, b1,3}
+     */
+    vecInB = vld1q(pSrBVec);  
+    pSrBVec += MATRIX_DIM4;
+
+    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+    vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+    vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+    vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++);
+    /*
+     * load {b2,0, b2,1, b2,2, b2,3}
+     */
+    vecInB = vld1q(pSrBVec);  
+    pSrBVec += MATRIX_DIM4;
+
+    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+    vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+    vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+    vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++);
+    /*
+     * load {b3,0, b3,1, b3,2, b3,3}
+     */
+    vecInB = vld1q(pSrBVec);  
+    pSrBVec += MATRIX_DIM4;
+
+    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+    vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+    vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+    vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++);
+
+    vst1q(pOut, vecMac0);  
+    pOut += MATRIX_DIM4;
+    vst1q(pOut, vecMac1);  
+    pOut += MATRIX_DIM4;
+    vst1q(pOut, vecMac2);  
+    pOut += MATRIX_DIM4;
+    vst1q(pOut, vecMac3);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+/**
+ * @brief Floating-point matrix multiplication.
+ * @param[in]       *pSrcA points to the first input matrix structure
+ * @param[in]       *pSrcB points to the second input matrix structure
+ * @param[out]      *pDst points to output matrix structure
+ * @return          The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+    float32_t  *pInB = pSrcB->pData;        /* input data matrix pointer B */
+    float32_t  *pInA = pSrcA->pData;        /* input data matrix pointer A  */
+    float32_t  *pOut = pDst->pData;         /* output data matrix pointer */
+    int         numRowsA = pSrcA->numRows;  /* number of rows of input matrix A */
+    int         numColsB = pSrcB->numCols;  /* number of columns of input matrix B */
+    int         numColsA = pSrcA->numCols;  /* number of columns of input matrix A */
+    uint32_t    blkCnt;                     /* loop counters */
+    uint32_t    i;
+    arm_status status; 
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+      /* small squared matrix specialized routines */
+    if(numRowsA == numColsB && numColsB == numColsA) {
+        if (numRowsA == 1)
+        {
+           pOut[0] = pInA[0] * pInB[0];
+           return(ARM_MATH_SUCCESS);
+        }
+        else if(numRowsA == 2)
+            return arm_mat_mult_f32_2x2_mve(pSrcA, pSrcB, pDst);
+        else if(numRowsA == 3)
+            return arm_mat_mult_f32_3x3_mve(pSrcA, pSrcB, pDst);
+        else if(numRowsA == 4)
+            return arm_mat_mult_f32_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+
+    /* main loop process 4 rows */
+    i = numRowsA >> 2;
+    while (i > 0U)
+    {
+        float32_t *pInA0, *pInA1, *pInA2, *pInA3;
+        float32_t *pInB0;
+        float32_t *pOut0, *pOut1, *pOut2, *pOut3;
+        f32x4_t vecMac0, vecMac1, vecMac2, vecMac3;
+        f32x4_t vecInB;
+
+        /* pointers to 4 consecutive output rows */
+        pOut0 = pOut;
+        pOut1 = pOut0 + numColsB;
+        pOut2 = pOut1 + numColsB;
+        pOut3 = pOut2 + numColsB;
+        pInB0 = pInB;
+
+        uint32_t  k = numColsB >> 2;
+        while (k > 0U)
+        {
+            /* pointers to 4 consecutive Matrix A rows */
+            pInA0 = pInA;
+            pInA1 = pInA0 + numColsA;
+            pInA2 = pInA1 + numColsA;
+            pInA3 = pInA2 + numColsA;
+
+            vecMac0 = vdupq_n_f32(0.0f);
+            vecMac1 = vdupq_n_f32(0.0f);
+            vecMac2 = vdupq_n_f32(0.0f);
+            vecMac3 = vdupq_n_f32(0.0f);
+
+            blkCnt = numColsA;
+
+            while (blkCnt > 0U)
+            {
+                /*
+                 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
+                 */
+                vecInB = *(f32x4_t *)pInB0; /* vldrwq_f32(pInB0, 0); */
+
+                vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+                vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+                vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+                vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++);
+
+                pInB0 = pInB0 + numColsB;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+
+            /* Store the results (4 x 4 block) in the destination buffer */
+            vst1q(pOut0, vecMac0);  
+            pOut0 += 4;
+            vst1q(pOut1, vecMac1);  
+            pOut1 += 4;
+            vst1q(pOut2, vecMac2);  
+            pOut2 += 4;
+            vst1q(pOut3, vecMac3);  
+            pOut3 += 4;
+
+            /*
+             * rewind
+             */
+            pInB0 -= (numColsB * numColsA) - 4;
+            k--;
+        }
+
+        int       colBLeft = numColsB & 3;
+        if (colBLeft)
+        {
+            pInA0 = pInA;
+            pInA1 = pInA0 + numColsA;
+            pInA2 = pInA1 + numColsA;
+            pInA3 = pInA2 + numColsA;
+            mve_pred16_t p0 = vctp32q(colBLeft);
+
+            vecMac0 = vdupq_n_f32(0.0f);
+            vecMac1 = vdupq_n_f32(0.0f);
+            vecMac2 = vdupq_n_f32(0.0f);
+            vecMac3 = vdupq_n_f32(0.0f);
+
+            blkCnt = numColsA;
+
+            while (blkCnt > 0U)
+            {
+                /*
+                 * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
+                 */
+                vecInB = vldrwq_z_f32(pInB0, p0);
+
+                vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+                vecMac1 = vfmaq(vecMac1, vecInB, *pInA1++);
+                vecMac2 = vfmaq(vecMac2, vecInB, *pInA2++);
+                vecMac3 = vfmaq(vecMac3, vecInB, *pInA3++);
+
+                pInB0 = pInB0 + numColsB;
+                /*
+                 * Decrement the blockSize loop counter
+                 */
+                blkCnt--;
+            }
+
+            /* Store the results (4 x colBLeft block) in the destination buffer */
+            vstrwq_p_f32(pOut0, vecMac0, p0);
+            vstrwq_p_f32(pOut1, vecMac1, p0);
+            vstrwq_p_f32(pOut2, vecMac2, p0);
+            vstrwq_p_f32(pOut3, vecMac3, p0);
+        }
+
+        /* move to next rows */
+        pInA += 4 * numColsA;
+        pOut += 4 * numColsB;
+        i--;
+    }
+
+    /*
+     * non multiple of 4 rows for Matrix A
+     * process single row
+     */
+    if (numRowsA & 3)
+    {
+        i = numRowsA & 3;
+        while (i > 0U)
+        {
+            float32_t   *pInA0;
+            float32_t   *pInB0;
+            float32_t   *pOut0;
+            f32x4_t    vecInB;
+            f32x4_t    vecMac0;
+
+            pOut0 = pOut;
+            pInB0 = pInB;
+
+            uint32_t       k = numColsB >> 2;
+            while (k > 0U)
+            {
+                pInA0 = pInA;
+
+                vecMac0 = vdupq_n_f32(0.0f);
+                blkCnt = numColsA;
+                while (blkCnt > 0U)
+                {
+                    /*
+                     * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
+                     */
+                    vecInB = *(f32x4_t *)pInB0; /* vldrwq_f32(pInB0, 0); */
+
+                    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+
+                    pInB0 = pInB0 + numColsB;
+                    /*
+                     * Decrement the blockSize loop counter
+                     */
+                    blkCnt--;
+                }
+
+                /* Store the results (1 x 4 block) in the destination buffer */
+                vst1q(pOut0, vecMac0);  
+                pOut0 += 4;
+
+                /*
+                 * rewind
+                 */
+                pInB0 -= (numColsB * numColsA) - 4;
+                k--;
+            }
+
+            int       colBLeft = numColsB & 3;
+            if (colBLeft)
+            {
+                pInA0 = pInA;
+                mve_pred16_t p0 = vctp32q(colBLeft);
+
+                vecMac0 = vdupq_n_f32(0.0f);
+                blkCnt = numColsA;
+                while (blkCnt > 0U)
+                {
+                    /*
+                     * load {bi,4n+0, bi,4n+1, bi,4n+2, bi,4n+3}
+                     */
+                    vecInB = vldrwq_z_f32(pInB0, p0);
+
+                    vecMac0 = vfmaq(vecMac0, vecInB, *pInA0++);
+
+                    pInB0 = pInB0 + numColsB;
+                    /*
+                     * Decrement the blockSize loop counter
+                     */
+                    blkCnt--;
+                }
+                /* Store the results (1 x colBLeft block) in the destination buffer */
+                vstrwq_p_f32(pOut0, vecMac0, p0);
+            }
+
+            /* move to next row */
+            pInA += 1 * numColsA;
+            pOut += 1 * numColsB;
+            i--;
+        }
+        
+      }
+      status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+
+#if defined(ARM_MATH_NEON)
+/**
+ * @brief Floating-point matrix multiplication.
+ * @param[in]       *pSrcA points to the first input matrix structure
+ * @param[in]       *pSrcB points to the second input matrix structure
+ * @param[out]      *pDst points to output matrix structure
+ * @return          The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A  */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  float32_t sum;                                 /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* number of columns of input matrix A */
+
+
+  uint16_t col, i = 0U, j, row = numRowsA, rowCnt, colCnt;      /* loop counters */
+  arm_status status;                             /* status of matrix multiplication */
+
+  float32x4_t a0V, a1V, a2V, a3V, a4V, a5V, a6V, a7V;
+  float32x4_t acc0,acc1,acc2,acc3,acc4,acc5,acc6,acc7,temp;
+  float32x2_t accum = vdup_n_f32(0);
+  float32_t *pIn1B = pSrcA->pData;    
+  float32_t *pIn1C = pSrcA->pData;    
+  float32_t *pIn1D = pSrcA->pData;  
+  float32_t *pIn1E = pSrcA->pData; 
+  float32_t *pIn1F = pSrcA->pData; 
+  float32_t *pIn1G = pSrcA->pData; 
+  float32_t *pIn1H = pSrcA->pData;   
+
+  float32_t *pxB,*pxC, *pxD, *pxE, *pxF, *pxG, *pxH;                                 /* Temporary output data matrix pointer */
+  float32_t sum0,sum1, sum2,sum3, sum4, sum5 , sum6, sum7;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*      #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* Row loop */
+    rowCnt = row >> 3;
+
+    while(rowCnt > 0)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + GROUPOFROWS*i;
+      pxB = px + numColsB;
+      pxC = px + 2*numColsB;
+      pxD = px + 3*numColsB;
+      pxE = px + 4*numColsB;
+      pxF = px + 5*numColsB;
+      pxG = px + 6*numColsB;
+      pxH = px + 7*numColsB;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum0 = 0.0f;
+        sum1 = 0.0f;
+        sum2 = 0.0f;
+        sum3 = 0.0f;
+        sum4 = 0.0f;
+        sum5 = 0.0f;
+        sum6 = 0.0f;
+        sum7 = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+        pIn1B = pIn1 + numColsA;
+        pIn1C = pIn1 + 2*numColsA;
+        pIn1D = pIn1 + 3*numColsA;
+        pIn1E = pIn1 + 4*numColsA;
+        pIn1F = pIn1 + 5*numColsA;
+        pIn1G = pIn1 + 6*numColsA;
+        pIn1H = pIn1 + 7*numColsA;
+
+        acc0 = vdupq_n_f32(0.0);
+        acc1 = vdupq_n_f32(0.0);
+        acc2 = vdupq_n_f32(0.0);
+        acc3 = vdupq_n_f32(0.0);
+        acc4 = vdupq_n_f32(0.0);
+        acc5 = vdupq_n_f32(0.0);
+        acc6 = vdupq_n_f32(0.0);
+        acc7 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* Matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a0V = vld1q_f32(pIn1);  
+          a1V = vld1q_f32(pIn1B);  
+          a2V = vld1q_f32(pIn1C); 
+          a3V = vld1q_f32(pIn1D); 
+          a4V = vld1q_f32(pIn1E); 
+          a5V = vld1q_f32(pIn1F); 
+          a6V = vld1q_f32(pIn1G); 
+          a7V = vld1q_f32(pIn1H); 
+
+	      pIn1 += 4;
+          pIn1B += 4;
+          pIn1C += 4;
+          pIn1D += 4;
+          pIn1E += 4;
+          pIn1F += 4;
+          pIn1G += 4;
+          pIn1H += 4;
+          
+          temp = vsetq_lane_f32(*pIn2,temp,0);
+          pIn2 += numColsB;
+          temp = vsetq_lane_f32(*pIn2,temp,1);
+          pIn2 += numColsB;
+          temp = vsetq_lane_f32(*pIn2,temp,2);
+          pIn2 += numColsB;
+          temp = vsetq_lane_f32(*pIn2,temp,3);
+          pIn2 += numColsB;
+
+          acc0 = vmlaq_f32(acc0,a0V,temp);
+          acc1 = vmlaq_f32(acc1,a1V,temp);
+          acc2 = vmlaq_f32(acc2,a2V,temp);
+          acc3 = vmlaq_f32(acc3,a3V,temp);
+          acc4 = vmlaq_f32(acc4,a4V,temp);
+          acc5 = vmlaq_f32(acc5,a5V,temp);
+          acc6 = vmlaq_f32(acc6,a6V,temp);
+          acc7 = vmlaq_f32(acc7,a7V,temp);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
+        sum0 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(acc1), vget_high_f32(acc1));
+        sum1 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(acc2), vget_high_f32(acc2));
+        sum2 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(acc3), vget_high_f32(acc3));
+        sum3 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(acc4), vget_high_f32(acc4));
+        sum4 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(acc5), vget_high_f32(acc5));
+        sum5 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(acc6), vget_high_f32(acc6));
+        sum6 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        accum = vpadd_f32(vget_low_f32(acc7), vget_high_f32(acc7));
+        sum7 += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA & 3;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          sum0 += *pIn1++ * (*pIn2);
+          sum1 += *pIn1B++ * (*pIn2);
+          sum2 += *pIn1C++ * (*pIn2);
+          sum3 += *pIn1D++ * (*pIn2);
+          sum4 += *pIn1E++ * (*pIn2);
+          sum5 += *pIn1F++ * (*pIn2);
+          sum6 += *pIn1G++ * (*pIn2);
+          sum7 += *pIn1H++ * (*pIn2);
+          pIn2 += numColsB;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        /* Store the result in the destination buffer */
+        *px++ = sum0;
+        *pxB++ = sum1;
+        *pxC++ = sum2;
+        *pxD++ = sum3;
+        *pxE++ = sum4;
+        *pxF++ = sum5;
+        *pxG++ = sum6;
+        *pxH++ = sum7;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + j;
+
+        /* Decrement the column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + GROUPOFROWS*numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+    } 
+
+    /*
+
+    i was the index of a group of rows computed by previous loop.
+    Now i is the index of a row since below code is computing row per row
+    and no more group of row per group of rows.
+
+    */
+
+    i = GROUPOFROWS*i;
+    rowCnt = row & 7;
+
+    while(rowCnt > 0)
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, the column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, the pIn2 pointer is set
+       ** to the starting address of the pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      j = 0U;
+
+      /* Column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0.0f;
+
+        /* Initiate the pointer pIn1 to point to the starting address of the column being processed */
+        pIn1 = pInA;
+
+        acc0 = vdupq_n_f32(0.0);
+
+        /* Compute 4 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* Matrix multiplication   */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          a0V = vld1q_f32(pIn1);  // load & separate real/imag pSrcA (de-interleave 2)
+          pIn1 += 4;
+          
+          temp = vsetq_lane_f32(*pIn2,temp,0);
+          pIn2 += numColsB;
+          temp = vsetq_lane_f32(*pIn2,temp,1);
+          pIn2 += numColsB;
+          temp = vsetq_lane_f32(*pIn2,temp,2);
+          pIn2 += numColsB;
+          temp = vsetq_lane_f32(*pIn2,temp,3);
+          pIn2 += numColsB;
+
+          acc0 = vmlaq_f32(acc0,a0V,temp);
+
+          /* Decrement the loop count */
+          colCnt--;
+        }
+
+        accum = vpadd_f32(vget_low_f32(acc0), vget_high_f32(acc0));
+        sum += vget_lane_f32(accum, 0) + vget_lane_f32(accum, 1);
+
+        /* If the columns of pSrcA is not a multiple of 4, compute any remaining MACs here.
+         ** No loop unrolling is used. */
+        colCnt = numColsA % 0x4U;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1)*b(1,1) + a(1,2)*b(2,1) + ... + a(m,p)*b(p,n) */
+          sum += *pIn1++ * (*pIn2);
+          pIn2 += numColsB;
+
+          /* Decrement the loop counter */
+          colCnt--;
+        }
+
+        /* Store the result in the destination buffer */
+        *px++ = sum;
+
+        /* Update the pointer pIn2 to point to the  starting address of the next column */
+        j++;
+        pIn2 = pSrcB->pData + j;
+
+        /* Decrement the column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+
+      /* Update the pointer pInA to point to the  starting address of the next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+
+    } 
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+/**
+ * @brief Floating-point matrix multiplication.
+ * @param[in]       *pSrcA points to the first input matrix structure
+ * @param[in]       *pSrcB points to the second input matrix structure
+ * @param[out]      *pDst points to output matrix structure
+ * @return          The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+arm_status arm_mat_mult_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* Input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  float32_t sum;                                 /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0.0f;
+
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,p) = a(m,1) * b(1,p) + a(m,2) * b(2,p) + .... + a(m,n) * b(n,p) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,p) = a(m,1) * b(1,p) + a(m,2) * b(2,p) + .... + a(m,n) * b(n,p) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sum;
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f64.c
new file mode 100755
index 00000000..a7bdf2d5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_f64.c
@@ -0,0 +1,202 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_f64.c
+ * Description:  Floating-point matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+ * @ingroup groupMatrix
+ */
+
+/**
+ * @defgroup MatrixMult Matrix Multiplication
+ *
+ * Multiplies two matrices.
+ *
+ * \image html MatrixMultiplication.gif "Multiplication of two 3 x 3 matrices"
+
+ * Matrix multiplication is only defined if the number of columns of the
+ * first matrix equals the number of rows of the second matrix.
+ * Multiplying an <code>M x N</code> matrix with an <code>N x P</code> matrix results
+ * in an <code>M x P</code> matrix.
+ * When matrix size checking is enabled, the functions check: (1) that the inner dimensions of
+ * <code>pSrcA</code> and <code>pSrcB</code> are equal; and (2) that the size of the output
+ * matrix equals the outer dimensions of <code>pSrcA</code> and <code>pSrcB</code>.
+ */
+
+
+/**
+ * @addtogroup MatrixMult
+ * @{
+ */
+
+/**
+ * @brief Floating-point matrix multiplication.
+ * @param[in]       *pSrcA points to the first input matrix structure
+ * @param[in]       *pSrcB points to the second input matrix structure
+ * @param[out]      *pDst points to output matrix structure
+ * @return     		The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ */
+
+
+arm_status arm_mat_mult_f64(
+  const arm_matrix_instance_f64 * pSrcA,
+  const arm_matrix_instance_f64 * pSrcB,
+        arm_matrix_instance_f64 * pDst)
+{
+  float64_t *pIn1 = pSrcA->pData;                /* Input data matrix pointer A */
+  float64_t *pIn2 = pSrcB->pData;                /* Input data matrix pointer B */
+  float64_t *pInA = pSrcA->pData;                /* Input data matrix pointer A */
+  float64_t *pInB = pSrcB->pData;                /* Input data matrix pointer B */
+  float64_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  float64_t *px;                                 /* Temporary output data matrix pointer */
+  float64_t sum;                                 /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint64_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0.0;
+
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = sum;
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+
+/**
+ * @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
index 384974e0..62ddcaf8 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q15.c
@@ -1,483 +1,483 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_mult_fast_q15.c
- * Description:  Q15 matrix multiplication (fast variant)
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixMult
-  @{
- */
-
-/**
-  @brief         Q15 matrix multiplication (fast variant).
-  @param[in]     pSrcA      points to the first input matrix structure
-  @param[in]     pSrcB      points to the second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @param[in]     pState     points to the array for storing intermediate results
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The difference between the function \ref arm_mat_mult_q15() and this fast variant is that
-                   the fast variant use a 32-bit rather than a 64-bit accumulator.
-                   The result of each 1.15 x 1.15 multiplication is truncated to
-                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
-                   format. Finally, the accumulator is saturated and converted to a 1.15 result.
-  @par
-                   The fast version has the same overflow behavior as the standard version but provides
-                   less precision since it discards the low 16 bits of each multiplication result.
-                   In order to avoid overflows completely the input signals must be scaled down.
-                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
-                   as a total of numColsA additions are computed internally for each output element.
-  @remark
-                   Refer to \ref arm_mat_mult_q15() for a slower implementation of this function
-                   which uses 64-bit accumulation to provide higher precision.
- */
-
-arm_status arm_mat_mult_fast_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst,
-        q15_t                   * pState)
-{
-        q31_t sum;                                     /* Accumulator */
-        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
-        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
-        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
-        q15_t *px;                                     /* Temporary output data matrix pointer */
-        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
-        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix A */
-        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
-        arm_status status;                             /* Status of matrix multiplication */
-
-#if defined (ARM_MATH_DSP)
-        q31_t in;                                      /* Temporary variable to hold the input value */
-        q31_t inA1, inB1, inA2, inB2;
-        q31_t sum2, sum3, sum4;
-        q15_t *pInA2, *pInB2, *px2;
-        uint32_t j = 0;
-#else
-        q15_t in;                                      /* Temporary variable to hold the input value */
-        q15_t inA1, inB1, inA2, inB2;
-#endif /* #if defined (ARM_MATH_DSP) */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* The pointer px is set to starting address of column being processed */
-      px = pSrcBT + i;
-
-      /* Apply loop unrolling and exchange columns with row elements */
-      col = numColsB >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while (col > 0U)
-      {
-
-#if defined (ARM_MATH_DSP)
-
-        /* Read two elements from row */
-        in = read_q15x2_ia ((q15_t **) &pInB);
-
-        /* Unpack and store one element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) in;
-#else
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store second element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#else
-        *px = (q15_t) in;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB;
-
-        in = read_q15x2_ia ((q15_t **) &pInB);
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) in;
-#else
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-        px += numRowsB;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#else
-        *px = (q15_t) in;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-        px += numRowsB;
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-        /* Read one element from row */
-        in = *pInB++;
-
-        /* Store one element in destination */
-        *px = in;
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB;
-
-        in = *pInB++;
-        *px = in;
-        px += numRowsB;
-
-        in = *pInB++;
-        *px = in;
-        px += numRowsB;
-
-        in = *pInB++;
-        *px = in;
-        px += numRowsB;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4U;
-
-      while (col > 0U)
-      {
-        /* Read and store input element in destination */
-        *px = *pInB++;
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Reset variables for usage in following multiplication process */
-    row = numRowsA;
-    i = 0U;
-    px = pDst->pData;
-
-#if defined (ARM_MATH_DSP)
-    /* Process two rows from matrix A at a time and output two rows at a time */
-    row = row >> 1U;
-    px2 = px + numColsB;
-#endif
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    while (row > 0U)
-    {
-      /* For every row wise process, column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
-      pInB = pSrcBT;
-
-#if defined (ARM_MATH_DSP)
-      /* Process two (transposed) columns from matrix B at a time */
-      col = col >> 1U;
-      j = 0;
-#endif
-
-      /* column loop */
-      while (col > 0U)
-      {
-        /* Set variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate pointer pInA to point to starting address of column being processed */
-        pInA = pSrcA->pData + i;
-
-#if defined (ARM_MATH_DSP)
-        sum2 = 0;
-        sum3 = 0;
-        sum4 = 0;
-        pInB  = pSrcBT + j;
-        pInA2 = pInA + numColsA;
-        pInB2 = pInB + numRowsB;
-
-        /* Read in two elements at once - alows dual MAC instruction */
-        colCnt = numColsA >> 1U;
-#else
-        colCnt = numColsA >> 2U;
-#endif
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-#if defined (ARM_MATH_DSP)
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          inA1 = read_q15x2_ia ((q15_t **) &pInA);
-          inB1 = read_q15x2_ia ((q15_t **) &pInB);
-
-          inA2 = read_q15x2_ia ((q15_t **) &pInA2);
-          inB2 = read_q15x2_ia ((q15_t **) &pInB2);
-
-          /* Multiply and Accumlates */
-          sum  = __SMLAD(inA1, inB1, sum);
-          sum2 = __SMLAD(inA1, inB2, sum2);
-          sum3 = __SMLAD(inA2, inB1, sum3);
-          sum4 = __SMLAD(inA2, inB2, sum4);
-#else
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          /* Multiply and Accumlates */
-          sum += inA1 * inB1;
-
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-          sum += inA2 * inB2;
-
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          sum += inA1 * inB1;
-
-          inA2 = *pInA++;
-          inB2 = *pInB++;
-          sum += inA2 * inB2;
-#endif /* #if defined (ARM_MATH_DSP) */
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* process odd column samples */
-#if defined (ARM_MATH_DSP)
-        if (numColsA & 1U) {
-          inA1 = *pInA++;
-          inB1 = *pInB++;
-          inA2 = *pInA2++;
-          inB2 = *pInB2++;
-          sum  += inA1 * inB1;
-          sum2 += inA1 * inB2;
-          sum3 += inA2 * inB1;
-          sum4 += inA2 * inB2;
-        }
-#else
-        colCnt = numColsA % 0x4U;
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-          sum += (q31_t) *pInA++ * *pInB++;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-#endif /* #if defined (ARM_MATH_DSP) */
-
-        /* Saturate and store result in destination buffer */
-        *px++  = (q15_t) (sum >> 15);
-
-#if defined (ARM_MATH_DSP)
-        *px++  = (q15_t) (sum2 >> 15);
-        *px2++ = (q15_t) (sum3 >> 15);
-        *px2++ = (q15_t) (sum4 >> 15);
-        j += numRowsB * 2;
-#endif
-
-        /* Decrement column loop counter */
-        col--;
-
-      }
-
-      i = i + numColsA;
-
-#if defined (ARM_MATH_DSP)
-      i = i + numColsA;
-      px = px2 + (numColsB & 1U);
-      px2 = px + numColsB;
-#endif
-
-      /* Decrement row loop counter */
-      row--;
-
-    }
-
-    /* Compute any remaining odd row/column below */
-
-#if defined (ARM_MATH_DSP)
-
-    /* Compute remaining output column */
-    if (numColsB & 1U) {
-
-      /* Avoid redundant computation of last element */
-      row = numRowsA & (~0x1);
-
-      /* Point to remaining unfilled column in output matrix */
-      px = pDst->pData + numColsB-1;
-      pInA = pSrcA->pData;
-
-      /* row loop */
-      while (row > 0)
-      {
-
-        /* point to last column in matrix B */
-        pInB  = pSrcBT + numRowsB * (numColsB-1);
-
-        /* Set variable sum, that acts as accumulator, to zero */
-        sum  = 0;
-
-        /* Compute 4 columns at once */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          inA1 = read_q15x2_ia ((q15_t **) &pInA);
-          inA2 = read_q15x2_ia ((q15_t **) &pInA);
-          inB1 = read_q15x2_ia ((q15_t **) &pInB);
-          inB2 = read_q15x2_ia ((q15_t **) &pInB);
-
-          sum  = __SMLAD(inA1, inB1, sum);
-          sum  = __SMLAD(inA2, inB2, sum);
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        colCnt = numColsA & 3U;
-        while (colCnt > 0U) {
-          sum += (q31_t) (*pInA++) * (*pInB++);
-          colCnt--;
-        }
-
-        /* Store result in destination buffer */
-        *px = (q15_t) (sum  >> 15);
-        px += numColsB;
-
-        /* Decrement row loop counter */
-        row--;
-      }
-    }
-
-    /* Compute remaining output row */
-    if (numRowsA & 1U) {
-
-      /* point to last row in output matrix */
-      px = pDst->pData + (numColsB) * (numRowsA-1);
-
-      pInB  = pSrcBT;
-      col = numColsB;
-      i = 0U;
-
-      /* col loop */
-      while (col > 0)
-      {
-        /* point to last row in matrix A */
-        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
-
-        /* Set variable sum, that acts as accumulator, to zero */
-        sum  = 0;
-
-        /* Compute 4 columns at once */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          inA1 = read_q15x2_ia ((q15_t **) &pInA);
-          inA2 = read_q15x2_ia ((q15_t **) &pInA);
-          inB1 = read_q15x2_ia ((q15_t **) &pInB);
-          inB2 = read_q15x2_ia ((q15_t **) &pInB);
-
-          sum  = __SMLAD(inA1, inB1, sum);
-          sum  = __SMLAD(inA2, inB2, sum);
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        colCnt = numColsA % 4U;
-        while (colCnt > 0U) {
-          sum += (q31_t) (*pInA++) * (*pInB++);
-
-          colCnt--;
-        }
-
-        /* Store result in destination buffer */
-        *px++ = (q15_t) (sum  >> 15);
-
-        /* Decrement column loop counter */
-        col--;
-      }
-    }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_fast_q15.c
+ * Description:  Q15 matrix multiplication (fast variant)
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q15 matrix multiplication (fast variant).
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @param[in]     pState     points to the array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The difference between the function \ref arm_mat_mult_q15() and this fast variant is that
+                   the fast variant use a 32-bit rather than a 64-bit accumulator.
+                   The result of each 1.15 x 1.15 multiplication is truncated to
+                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+                   format. Finally, the accumulator is saturated and converted to a 1.15 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides
+                   less precision since it discards the low 16 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+                   as a total of numColsA additions are computed internally for each output element.
+  @remark
+                   Refer to \ref arm_mat_mult_q15() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision.
+ */
+
+arm_status arm_mat_mult_fast_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pState)
+{
+        q31_t sum;                                     /* Accumulator */
+        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix B */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+
+#if defined (ARM_MATH_DSP)
+        q31_t in;                                      /* Temporary variable to hold the input value */
+        q31_t inA1, inB1, inA2, inB2;
+        q31_t sum2, sum3, sum4;
+        q15_t *pInA2, *pInB2, *px2;
+        uint32_t j = 0;
+#else
+        q15_t in;                                      /* Temporary variable to hold the input value */
+        q15_t inA1, inB1, inA2, inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose */
+    do
+    {
+      /* The pointer px is set to starting address of column being processed */
+      px = pSrcBT + i;
+
+      /* Apply loop unrolling and exchange columns with row elements */
+      col = numColsB >> 2U;
+
+      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+       ** a second loop below computes the remaining 1 to 3 samples. */
+      while (col > 0U)
+      {
+
+#if defined (ARM_MATH_DSP)
+
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pInB);
+
+        /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) in;
+#else
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        in = read_q15x2_ia ((q15_t **) &pInB);
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) in;
+#else
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+        px += numRowsB;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *px = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+        px += numRowsB;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+        /* Read one element from row */
+        in = *pInB++;
+
+        /* Store one element in destination */
+        *px = in;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        in = *pInB++;
+        *px = in;
+        px += numRowsB;
+
+        in = *pInB++;
+        *px = in;
+        px += numRowsB;
+
+        in = *pInB++;
+        *px = in;
+        px += numRowsB;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
+       ** No loop unrolling is used. */
+      col = numColsB % 0x4U;
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pInB++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += numRowsB;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Reset variables for usage in following multiplication process */
+    row = numRowsA;
+    i = 0U;
+    px = pDst->pData;
+
+#if defined (ARM_MATH_DSP)
+    /* Process two rows from matrix A at a time and output two rows at a time */
+    row = row >> 1U;
+    px2 = px + numColsB;
+#endif
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    while (row > 0U)
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
+      pInB = pSrcBT;
+
+#if defined (ARM_MATH_DSP)
+      /* Process two (transposed) columns from matrix B at a time */
+      col = col >> 1U;
+      j = 0;
+#endif
+
+      /* column loop */
+      while (col > 0U)
+      {
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initiate pointer pInA to point to starting address of column being processed */
+        pInA = pSrcA->pData + i;
+
+#if defined (ARM_MATH_DSP)
+        sum2 = 0;
+        sum3 = 0;
+        sum4 = 0;
+        pInB  = pSrcBT + j;
+        pInA2 = pInA + numColsA;
+        pInB2 = pInB + numRowsB;
+
+        /* Read in two elements at once - allows dual MAC instruction */
+        colCnt = numColsA >> 1U;
+#else
+        colCnt = numColsA >> 2U;
+#endif
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+#if defined (ARM_MATH_DSP)
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+
+          inA2 = read_q15x2_ia ((q15_t **) &pInA2);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB2);
+
+          /* Multiply and Accumulates */
+          sum  = __SMLAD(inA1, inB1, sum);
+          sum2 = __SMLAD(inA1, inB2, sum2);
+          sum3 = __SMLAD(inA2, inB1, sum3);
+          sum4 = __SMLAD(inA2, inB2, sum4);
+#else
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = *pInA++;
+          inB1 = *pInB++;
+          /* Multiply and Accumulates */
+          sum += inA1 * inB1;
+
+          inA2 = *pInA++;
+          inB2 = *pInB++;
+          sum += inA2 * inB2;
+
+          inA1 = *pInA++;
+          inB1 = *pInB++;
+          sum += inA1 * inB1;
+
+          inA2 = *pInA++;
+          inB2 = *pInB++;
+          sum += inA2 * inB2;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* process odd column samples */
+#if defined (ARM_MATH_DSP)
+        if (numColsA & 1U) {
+          inA1 = *pInA++;
+          inB1 = *pInB++;
+          inA2 = *pInA2++;
+          inB2 = *pInB2++;
+          sum  += inA1 * inB1;
+          sum2 += inA1 * inB2;
+          sum3 += inA2 * inB1;
+          sum4 += inA2 * inB2;
+        }
+#else
+        colCnt = numColsA % 0x4U;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          sum += (q31_t) *pInA++ * *pInB++;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+#endif /* #if defined (ARM_MATH_DSP) */
+
+        /* Saturate and store result in destination buffer */
+        *px++  = (q15_t) (sum >> 15);
+
+#if defined (ARM_MATH_DSP)
+        *px++  = (q15_t) (sum2 >> 15);
+        *px2++ = (q15_t) (sum3 >> 15);
+        *px2++ = (q15_t) (sum4 >> 15);
+        j += numRowsB * 2;
+#endif
+
+        /* Decrement column loop counter */
+        col--;
+
+      }
+
+      i = i + numColsA;
+
+#if defined (ARM_MATH_DSP)
+      i = i + numColsA;
+      px = px2 + (numColsB & 1U);
+      px2 = px + numColsB;
+#endif
+
+      /* Decrement row loop counter */
+      row--;
+
+    }
+
+    /* Compute any remaining odd row/column below */
+
+#if defined (ARM_MATH_DSP)
+
+    /* Compute remaining output column */
+    if (numColsB & 1U) {
+
+      /* Avoid redundant computation of last element */
+      row = numRowsA & (~0x1);
+
+      /* Point to remaining unfilled column in output matrix */
+      px = pDst->pData + numColsB-1;
+      pInA = pSrcA->pData;
+
+      /* row loop */
+      while (row > 0)
+      {
+
+        /* point to last column in matrix B */
+        pInB  = pSrcBT + numRowsB * (numColsB-1);
+
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum  = 0;
+
+        /* Compute 4 columns at once */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
+
+          sum  = __SMLAD(inA1, inB1, sum);
+          sum  = __SMLAD(inA2, inB2, sum);
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        colCnt = numColsA & 3U;
+        while (colCnt > 0U) {
+          sum += (q31_t) (*pInA++) * (*pInB++);
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px = (q15_t) (sum  >> 15);
+        px += numColsB;
+
+        /* Decrement row loop counter */
+        row--;
+      }
+    }
+
+    /* Compute remaining output row */
+    if (numRowsA & 1U) {
+
+      /* point to last row in output matrix */
+      px = pDst->pData + (numColsB) * (numRowsA-1);
+
+      pInB  = pSrcBT;
+      col = numColsB;
+      i = 0U;
+
+      /* col loop */
+      while (col > 0)
+      {
+        /* point to last row in matrix A */
+        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
+
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum  = 0;
+
+        /* Compute 4 columns at once */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
+
+          sum  = __SMLAD(inA1, inB1, sum);
+          sum  = __SMLAD(inA2, inB2, sum);
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        colCnt = numColsA % 4U;
+        while (colCnt > 0U) {
+          sum += (q31_t) (*pInA++) * (*pInB++);
+
+          colCnt--;
+        }
+
+        /* Store result in destination buffer */
+        *px++ = (q15_t) (sum  >> 15);
+
+        /* Decrement column loop counter */
+        col--;
+      }
+    }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
index 0d753f7a..99a42328 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_fast_q31.c
@@ -1,374 +1,374 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_mult_fast_q31.c
- * Description:  Q31 matrix multiplication (fast variant)
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixMult
-  @{
- */
-
-/**
-  @brief         Q31 matrix multiplication (fast variant).
-  @param[in]     pSrcA      points to the first input matrix structure
-  @param[in]     pSrcB      points to the second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The difference between the function \ref arm_mat_mult_q31() and this fast variant is that
-                   the fast variant use a 32-bit rather than a 64-bit accumulator.
-                   The result of each 1.31 x 1.31 multiplication is truncated to
-                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
-                   format. Finally, the accumulator is saturated and converted to a 1.31 result.
-  @par
-                   The fast version has the same overflow behavior as the standard version but provides
-                   less precision since it discards the low 32 bits of each multiplication result.
-                   In order to avoid overflows completely the input signals must be scaled down.
-                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
-                   as a total of numColsA additions are computed internally for each output element.
-  @remark
-                   Refer to \ref arm_mat_mult_q31() for a slower implementation of this function
-                   which uses 64-bit accumulation to provide higher precision.
- */
-
-arm_status arm_mat_mult_fast_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
-  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
-  q31_t *pInA2;
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q31_t *px2;
-  q31_t sum1, sum2, sum3, sum4;                  /* Accumulator */
-  q31_t inA1, inA2, inB1, inB2;
-  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-  uint32_t col, i = 0U, j, row = numRowsA, colCnt;  /* Loop counters */
-  arm_status status;                             /* Status of matrix multiplication */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    px = pDst->pData;
-
-    row = row >> 1U;
-    px2 = px + numColsB;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    while (row > 0U)
-    {
-      /* For every row wise process, column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
-      pInB = pSrcB->pData;
-
-      j = 0U;
-
-      col = col >> 1U;
-
-      /* column loop */
-      while (col > 0U)
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum1 = 0;
-        sum2 = 0;
-        sum3 = 0;
-        sum4 = 0;
-        
-        /* Initiate data pointers */
-        pInA = pSrcA->pData + i;
-        pInB = pSrcB->pData + j;
-        pInA2 = pInA + numColsA;
-        
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          inA1 = *pInA++;
-          inB1 = pInB[0];
-          inA2 = *pInA2++;
-          inB2 = pInB[1];
-          pInB += numColsB;
-
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(inA1, inB1, sum1);
-          sum2 = __SMMLA(inA1, inB2, sum2);
-          sum3 = __SMMLA(inA2, inB1, sum3);
-          sum4 = __SMMLA(inA2, inB2, sum4);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
-          sum2 = (q31_t) ((((q63_t) sum2 << 32) + ((q63_t) inA1 * inB2)) >> 32);
-          sum3 = (q31_t) ((((q63_t) sum3 << 32) + ((q63_t) inA2 * inB1)) >> 32);
-          sum4 = (q31_t) ((((q63_t) sum4 << 32) + ((q63_t) inA2 * inB2)) >> 32);
-#endif
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
-        *px++  = sum1 << 1;
-        *px++  = sum2 << 1;
-        *px2++ = sum3 << 1;
-        *px2++ = sum4 << 1;
-
-        j += 2;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      i = i + (numColsA << 1U);
-      px  = px2 + (numColsB & 1U);
-      px2 = px  +  numColsB;
-
-      /* Decrement row loop counter */
-      row--;
-    }
-
-    /* Compute any remaining odd row/column below */
-
-    /* Compute remaining output column */
-    if (numColsB & 1U) {
-
-      /* Avoid redundant computation of last element */
-      row = numRowsA & (~1U);
-
-      /* Point to remaining unfilled column in output matrix */
-      px = pDst->pData + numColsB-1;
-      pInA = pSrcA->pData;
-
-      /* row loop */
-      while (row > 0)
-      {
-
-        /* point to last column in matrix B */
-        pInB  = pSrcB->pData + numColsB-1;
-
-        /* Set variable sum1, that acts as accumulator, to zero */
-        sum1  = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 columns at a time. */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(*pInA++, *pInB, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
-#endif
-          pInB += numColsB;
-
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(*pInA++, *pInB, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
-#endif
-          pInB += numColsB;
-
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(*pInA++, *pInB, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
-#endif
-          pInB += numColsB;
-
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(*pInA++, *pInB, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
-#endif
-          pInB += numColsB;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Loop unrolling: Compute remaining column */
-        colCnt = numColsA % 4U;
-
-#else
-
-        /* Initialize colCnt with number of columns */
-        colCnt = numColsA;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (colCnt > 0U) {
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(*pInA++, *pInB, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
-#endif
-          pInB += numColsB;
-          
-          colCnt--;
-        }
-
-        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
-        *px = sum1 << 1;
-        px += numColsB;
-
-        /* Decrement row loop counter */
-        row--;
-      }
-    }
-
-    /* Compute remaining output row */
-    if (numRowsA & 1U) {
-
-      /* point to last row in output matrix */
-      px = pDst->pData + (numColsB) * (numRowsA-1);
-
-      col = numColsB;
-      i = 0U;
-
-      /* col loop */
-      while (col > 0)
-      {
-
-        /* point to last row in matrix A */
-        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
-        pInB  = pSrcB->pData + i;
-
-        /* Set variable sum1, that acts as accumulator, to zero */
-        sum1  = 0;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 columns at a time. */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          inA1 = *pInA++;
-          inA2 = *pInA++;
-          inB1 = *pInB;
-          pInB += numColsB;
-          inB2 = *pInB;
-          pInB += numColsB;
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(inA1, inB1, sum1);
-          sum1 = __SMMLA(inA2, inB2, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
-#endif
-
-          inA1 = *pInA++;
-          inA2 = *pInA++;
-          inB1 = *pInB;
-          pInB += numColsB;
-          inB2 = *pInB;
-          pInB += numColsB;
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(inA1, inB1, sum1);
-          sum1 = __SMMLA(inA2, inB2, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
-#endif
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Loop unrolling: Compute remaining column */
-        colCnt = numColsA % 4U;
-
-#else
-
-        /* Initialize colCnt with number of columns */
-        colCnt = numColsA;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (colCnt > 0U) {
-#if defined (ARM_MATH_DSP)
-          sum1 = __SMMLA(*pInA++, *pInB, sum1);
-#else
-          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
-#endif
-          pInB += numColsB;
-
-          colCnt--;
-        }
-
-        /* Saturate and store the result in the destination buffer */
-        *px++ = sum1 << 1;
-        i++;
-
-        /* Decrement col loop counter */
-        col--;
-      }
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_fast_q31.c
+ * Description:  Q31 matrix multiplication (fast variant)
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q31 matrix multiplication (fast variant).
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The difference between the function \ref arm_mat_mult_q31() and this fast variant is that
+                   the fast variant use a 32-bit rather than a 64-bit accumulator.
+                   The result of each 1.31 x 1.31 multiplication is truncated to
+                   2.30 format. These intermediate results are accumulated in a 32-bit register in 2.30
+                   format. Finally, the accumulator is saturated and converted to a 1.31 result.
+  @par
+                   The fast version has the same overflow behavior as the standard version but provides
+                   less precision since it discards the low 32 bits of each multiplication result.
+                   In order to avoid overflows completely the input signals must be scaled down.
+                   Scale down one of the input matrices by log2(numColsA) bits to avoid overflows,
+                   as a total of numColsA additions are computed internally for each output element.
+  @remark
+                   Refer to \ref arm_mat_mult_q31() for a slower implementation of this function
+                   which uses 64-bit accumulation to provide higher precision.
+ */
+
+arm_status arm_mat_mult_fast_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA2;
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  q31_t *px2;
+  q31_t sum1, sum2, sum3, sum4;                  /* Accumulator */
+  q31_t inA1, inA2, inB1, inB2;
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, j, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    px = pDst->pData;
+
+    row = row >> 1U;
+    px2 = px + numColsB;
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    while (row > 0U)
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pInB = pSrcB->pData;
+
+      j = 0U;
+
+      col = col >> 1U;
+
+      /* column loop */
+      while (col > 0U)
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum1 = 0;
+        sum2 = 0;
+        sum3 = 0;
+        sum4 = 0;
+        
+        /* Initiate data pointers */
+        pInA = pSrcA->pData + i;
+        pInB = pSrcB->pData + j;
+        pInA2 = pInA + numColsA;
+        
+        colCnt = numColsA;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          inA1 = *pInA++;
+          inB1 = pInB[0];
+          inA2 = *pInA2++;
+          inB2 = pInB[1];
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum2 = __SMMLA(inA1, inB2, sum2);
+          sum3 = __SMMLA(inA2, inB1, sum3);
+          sum4 = __SMMLA(inA2, inB2, sum4);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum2 = (q31_t) ((((q63_t) sum2 << 32) + ((q63_t) inA1 * inB2)) >> 32);
+          sum3 = (q31_t) ((((q63_t) sum3 << 32) + ((q63_t) inA2 * inB1)) >> 32);
+          sum4 = (q31_t) ((((q63_t) sum4 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
+        *px++  = sum1 << 1;
+        *px++  = sum2 << 1;
+        *px2++ = sum3 << 1;
+        *px2++ = sum4 << 1;
+
+        j += 2;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i = i + (numColsA << 1U);
+      px  = px2 + (numColsB & 1U);
+      px2 = px  +  numColsB;
+
+      /* Decrement row loop counter */
+      row--;
+    }
+
+    /* Compute any remaining odd row/column below */
+
+    /* Compute remaining output column */
+    if (numColsB & 1U) {
+
+      /* Avoid redundant computation of last element */
+      row = numRowsA & (~1U);
+
+      /* Point to remaining unfilled column in output matrix */
+      px = pDst->pData + numColsB-1;
+      pInA = pSrcA->pData;
+
+      /* row loop */
+      while (row > 0)
+      {
+
+        /* point to last column in matrix B */
+        pInB  = pSrcB->pData + numColsB-1;
+
+        /* Set variable sum1, that acts as accumulator, to zero */
+        sum1  = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 columns at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining column */
+        colCnt = numColsA % 4U;
+
+#else
+
+        /* Initialize colCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U) {
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+          
+          colCnt--;
+        }
+
+        /* Convert the result from 2.30 to 1.31 format and store in destination buffer */
+        *px = sum1 << 1;
+        px += numColsB;
+
+        /* Decrement row loop counter */
+        row--;
+      }
+    }
+
+    /* Compute remaining output row */
+    if (numRowsA & 1U) {
+
+      /* point to last row in output matrix */
+      px = pDst->pData + (numColsB) * (numRowsA-1);
+
+      col = numColsB;
+      i = 0U;
+
+      /* col loop */
+      while (col > 0)
+      {
+
+        /* point to last row in matrix A */
+        pInA = pSrcA->pData + (numRowsA-1) * numColsA;
+        pInB  = pSrcB->pData + i;
+
+        /* Set variable sum1, that acts as accumulator, to zero */
+        sum1  = 0;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 columns at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          inA1 = *pInA++;
+          inA2 = *pInA++;
+          inB1 = *pInB;
+          pInB += numColsB;
+          inB2 = *pInB;
+          pInB += numColsB;
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
+
+          inA1 = *pInA++;
+          inA2 = *pInA++;
+          inB1 = *pInB;
+          pInB += numColsB;
+          inB2 = *pInB;
+          pInB += numColsB;
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(inA1, inB1, sum1);
+          sum1 = __SMMLA(inA2, inB2, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA1 * inB1)) >> 32);
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) inA2 * inB2)) >> 32);
+#endif
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining column */
+        colCnt = numColsA % 4U;
+
+#else
+
+        /* Initialize colCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U) {
+#if defined (ARM_MATH_DSP)
+          sum1 = __SMMLA(*pInA++, *pInB, sum1);
+#else
+          sum1 = (q31_t) ((((q63_t) sum1 << 32) + ((q63_t) *pInA++ * *pInB)) >> 32);
+#endif
+          pInB += numColsB;
+
+          colCnt--;
+        }
+
+        /* Saturate and store the result in the destination buffer */
+        *px++ = sum1 << 1;
+        i++;
+
+        /* Decrement col loop counter */
+        col--;
+      }
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_opt_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_opt_q31.c
new file mode 100755
index 00000000..91b1bcd5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_opt_q31.c
@@ -0,0 +1,784 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_opt_q31.c
+ * Description:  Q31 matrix multiplication
+ *
+ * $Date:        3 Nov 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q31 matrix multiplication.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @param[in]  pState  points to the array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit. There is no saturation
+                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
+                   distorts the result. The input signals should be scaled down to avoid intermediate
+                   overflows. The input is thus scaled down by log2(numColsA) bits
+                   to avoid overflows, as a total of numColsA additions are performed internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+  @remark
+                   Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function.
+  @remark
+                   This function is a faster implementation of arm_mat_mult_q31 for MVE but it is requiring 
+                   additional storage for intermediate results.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MATRIX_DIM2 2
+#define MATRIX_DIM3 3
+#define MATRIX_DIM4 4
+
+__STATIC_INLINE arm_status arm_mat_mult_opt_q31_2x2_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q31_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q31_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs;
+    q31_t       *pInA0 = pInA;
+    q31_t       *pInA1 = pInA0 + MATRIX_DIM2;
+    q63_t        acc0, acc1;
+    q31x4_t      vecB, vecA0, vecA1;
+    /* enable predication to disable half of vector elements */
+    mve_pred16_t p0 = vctp32q(MATRIX_DIM2);
+
+    vecColBOffs = vidupq_u32((uint32_t)0, 1);
+    vecColBOffs = vecColBOffs * MATRIX_DIM2;
+
+    pInB = pSrcB->pData;
+
+    /* load 1st B column (partial load) */
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    /* load A rows */
+    vecA0 = vldrwq_s32(pInA0);
+    vecA1 = vldrwq_s32(pInA1);
+
+    acc0 = vrmlaldavhq(vecA0, vecB);
+    acc1 = vrmlaldavhq(vecA1, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+
+    pOut[0 * MATRIX_DIM2] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM2] = (q31_t) acc1;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    acc0 = vrmlaldavhq(vecA0, vecB);
+    acc1 = vrmlaldavhq(vecA1, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+
+    pOut[0 * MATRIX_DIM2] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM2] = (q31_t) acc1;
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+__STATIC_INLINE arm_status arm_mat_mult_opt_q31_3x3_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q31_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q31_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs;
+    q31_t       *pInA0 = pInA;
+    q31_t       *pInA1 = pInA0 + MATRIX_DIM3;
+    q31_t       *pInA2 = pInA1 + MATRIX_DIM3;
+    q63_t        acc0, acc1, acc2;
+    q31x4_t      vecB, vecA;
+    /* enable predication to disable last (4th) vector element */
+    mve_pred16_t p0 = vctp32q(MATRIX_DIM3);
+
+    vecColBOffs = vidupq_u32((uint32_t)0, 1);
+    vecColBOffs = vecColBOffs * MATRIX_DIM3;
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+
+    pOut[0 * MATRIX_DIM3] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM3] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM3] = (q31_t) acc2;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+
+    pOut[0 * MATRIX_DIM3] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM3] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM3] = (q31_t) acc2;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+
+    pOut[0 * MATRIX_DIM3] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM3] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM3] = (q31_t) acc2;
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_mult_opt_q31_4x4_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q31_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q31_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs;
+    q31_t       *pInA0 = pInA;
+    q31_t       *pInA1 = pInA0 + MATRIX_DIM4;
+    q31_t       *pInA2 = pInA1 + MATRIX_DIM4;
+    q31_t       *pInA3 = pInA2 + MATRIX_DIM4;
+    q63_t        acc0, acc1, acc2, acc3;
+    q31x4_t      vecB, vecA;
+
+    vecColBOffs = vidupq_u32((uint32_t)0, 4);
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+arm_status arm_mat_mult_opt_q31(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst,
+    q31_t *pState)
+{
+    q31_t          *pInA = pSrcA->pData;        /* input data matrix pointer A */
+    q31_t          *pInB = pSrcB->pData;        /* input data matrix pointer B */
+    q31_t          *pInA2;
+    q31_t          *pInB2;
+    q31_t          *px;         /* Temporary output data matrix pointer */
+    q31_t          *px2;        /* Temporary output data matrix pointer */
+    uint32_t        numRowsA = pSrcA->numRows;  /* number of rows of input matrix A    */
+    uint32_t        numColsB = pSrcB->numCols;  /* number of columns of input matrix B */
+    uint32_t        numColsA = pSrcA->numCols;  /* number of columns of input matrix A */
+    uint32_t        numRowsB = pSrcB->numRows;  /* number of rows of input matrix A    */
+    uint32_t        col, i = 0u, j, row = numRowsB;     /* loop counters */
+    q31_t          *pSrcBT = pState;     /* input data matrix pointer for transpose */
+    uint32_t        blkCnt;     /* loop counters */
+    arm_status      status;                            /* Status of matrix multiplication */
+    arm_matrix_instance_q31 BT;
+#ifdef ARM_MATH_MATRIX_CHECK
+
+    /* Check for matrix mismatch condition */
+    if ((pSrcA->numCols != pSrcB->numRows) ||
+        (pSrcA->numRows != pDst->numRows) || (pSrcB->numCols != pDst->numCols)) {
+        /* Set status as ARM_MATH_SIZE_MISMATCH */
+        status = ARM_MATH_SIZE_MISMATCH;
+    } else
+#endif                          /* #ifdef ARM_MATH_MATRIX_CHECK */
+    {
+
+         /* small squared matrix specialized routines */
+    if(numRowsA == numColsB && numColsB == numColsA) {
+        if (numRowsA == 1)
+        {
+          q63_t sum =  (q63_t) *pInA * *pInB;
+          pDst->pData[0] = (q31_t)(sum >> 31);
+          return (ARM_MATH_SUCCESS);
+        }
+        else if(numRowsA == 2)
+            return arm_mat_mult_opt_q31_2x2_mve(pSrcA, pSrcB, pDst);
+        else if(numRowsA == 3)
+            return arm_mat_mult_opt_q31_3x3_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 4)
+            return arm_mat_mult_opt_q31_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+
+
+        /*
+         * Matrix transpose
+         */
+        BT.numRows = numColsB;
+        BT.numCols = numRowsB;
+        BT.pData = pSrcBT;
+
+        arm_mat_trans_q31(pSrcB, &BT);
+
+
+        /*
+         * Reset the variables for the usage in the following multiplication process
+         */
+        i = 0;
+        row = numRowsA >> 1;
+        px = pDst->pData;
+        px2 = px + numColsB;
+
+        /*
+         * main loop
+         * compute 2 x 2 output blocks
+         * with dot products (Matrix A rows * Transposed MAtrix B rows)
+         */
+        while (row > 0u) {
+            /*
+             * For every row wise process, the column loop counter is to be initiated
+             * Compute 2 columns and 2 rows in parrallel
+             */
+            col = numColsB >> 1;
+            j = 0;
+
+            /*
+             * column pair loop
+             */
+            while (col > 0u) {
+                q31_t const    *pSrcAVec, *pSrcBVec, *pSrcA2Vec, *pSrcB2Vec;
+                q31x4_t         vecA, vecA2, vecB, vecB2;
+                q63_t           acc0, acc1, acc2, acc3;
+
+                /*
+                 * Initiate the pointers
+                 * - 2 x consecutive Matrix A rows (i increment is 2 x numColsA)
+                 * - 2 x consecutive Matrix B' rows (j increment is 2 x numRowsB)
+                 */
+                pInA = pSrcA->pData + i;
+                pInA2 = pInA + numColsA;
+                pInB = pSrcBT + j;
+                pInB2 = pInB + numRowsB;
+
+
+                pSrcAVec = (q31_t const *) pInA;
+                pSrcA2Vec = (q31_t const *) pInA2;
+                pSrcBVec = (q31_t const *) pInB;
+                pSrcB2Vec = (q31_t const *) pInB2;
+
+                acc0 = 0LL;
+                acc1 = 0LL;
+                acc2 = 0LL;
+                acc3 = 0LL;
+
+                /* load scheduling */
+                vecA = vld1q(pSrcAVec);
+                pSrcAVec += 4;
+
+                blkCnt = (numColsA / 4);
+                while (blkCnt > 0U) {
+                    vecB = vld1q(pSrcBVec);
+                    pSrcBVec += 4;
+                    acc0 = vrmlaldavhaq(acc0, vecA, vecB);
+                    vecA2 = vld1q(pSrcA2Vec);
+                    pSrcA2Vec += 4;
+                    acc1 = vrmlaldavhaq(acc1, vecA2, vecB);
+                    vecB2 = vld1q(pSrcB2Vec);
+                    pSrcB2Vec += 4;
+                    acc2 = vrmlaldavhaq(acc2, vecA, vecB2);
+                    vecA = vld1q(pSrcAVec);
+                    pSrcAVec += 4;
+                    acc3 = vrmlaldavhaq(acc3, vecA2, vecB2);
+
+                    blkCnt--;
+                }
+                /*
+                 * tail
+                 * (will be merged thru tail predication)
+                 */
+                blkCnt = (numColsA & 3);
+                if (blkCnt > 0U) {
+                    mve_pred16_t    p0 = vctp32q(blkCnt);
+                    vecB = vld1q(pSrcBVec);
+                    acc0 = vrmlaldavhaq_p(acc0, vecA, vecB, p0);
+                    vecA2 = vld1q(pSrcA2Vec);
+                    acc1 = vrmlaldavhaq_p(acc1, vecA2, vecB, p0);
+                    vecB2 = vld1q(pSrcB2Vec);
+                    acc2 = vrmlaldavhaq_p(acc2, vecA, vecB2, p0);
+                    vecA = vld1q(pSrcAVec);
+                    acc3 = vrmlaldavhaq_p(acc3, vecA2, vecB2, p0);
+                }
+
+                /* Convert to 1.31 */
+                acc0 = asrl(acc0, 23);
+                acc1 = asrl(acc1, 23);
+                acc2 = asrl(acc2, 23);
+                acc3 = asrl(acc3, 23);
+
+                /* Store the results (2 x 2 block) in the destination buffer */
+                *px++ = (q31_t) acc0;
+                *px++ = (q31_t) acc2;
+                *px2++ = (q31_t) acc1;
+                *px2++ = (q31_t) acc3;
+
+                j += numRowsB * 2;
+                /*
+                 * Decrement the column pair loop counter
+                 */
+                col--;
+
+            }
+
+            i = i + numColsA * 2;
+            px = px2 + (numColsB & 1u);
+            px2 = px + numColsB;
+            /*
+             * Decrement the row pair loop counter
+             */
+            row--;
+        }
+
+        /*
+         * Compute remaining row and/or column below
+         */
+        if (numColsB & 1u) {
+            row = numRowsA & (~0x1);    //avoid redundant computation
+            px = pDst->pData + numColsB - 1;
+            i = 0;
+
+            /*
+             * row loop
+             */
+            while (row > 0) {
+                q31_t const    *pSrcAVec, *pSrcBVec;
+                q31x4_t         vecA, vecB;
+                q63_t           acc0;
+
+                /*
+                 * point to last column in matrix B
+                 */
+                pInB = pSrcBT + numRowsB * (numColsB - 1);
+                pInA = pSrcA->pData + i;
+
+                pSrcAVec = (q31_t const *) pInA;
+                pSrcBVec = (q31_t const *) pInB;
+
+                /* single dot-product */
+                acc0 = 0LL;
+                blkCnt = (numColsA / 4);
+                while (blkCnt > 0U) {
+                    vecA = vld1q(pSrcAVec);
+                    pSrcAVec += 4;
+                    vecB = vld1q(pSrcBVec);
+                    pSrcBVec += 4;
+                    acc0 = vrmlaldavhaq(acc0, vecA, vecB);
+
+                    blkCnt--;
+                }
+                /*
+                 * tail
+                 * (will be merged thru tail predication)
+                 */
+                blkCnt = (numColsA & 3);
+                if (blkCnt > 0U) {
+                    mve_pred16_t    p0 = vctp32q(blkCnt);
+                    vecA = vld1q(pSrcAVec);
+                    vecB = vld1q(pSrcBVec);
+                    acc0 = vrmlaldavhaq_p(acc0, vecA, vecB, p0);
+                }
+
+                acc0 = asrl(acc0, 23);
+                *px = (q31_t) acc0;
+
+                px += numColsB;
+
+                i += numColsA;
+                /*
+                 * Decrement the row loop counter
+                 */
+                row--;
+            }
+        }
+
+        if (numRowsA & 1u) {
+            col = numColsB;
+            i = 0u;
+            /*
+             * point to last row in output matrix
+             */
+            px = pDst->pData + (numColsB) * (numRowsA - 1);
+            /*
+             * col loop
+             */
+            while (col > 0) {
+                q31_t const    *pSrcAVec, *pSrcBVec;
+                q31x4_t         vecA, vecB;
+                q63_t           acc0;
+
+                /*
+                 * point to last row in matrix A
+                 */
+                pInA = pSrcA->pData + (numRowsA - 1) * numColsA;
+                pInB = pSrcBT + i;
+
+                /*
+                 * Set the variable sum, that acts as accumulator, to zero
+                 */
+                pSrcAVec = (q31_t const *) pInA;
+                pSrcBVec = (q31_t const *) pInB;
+                acc0 = 0LL;
+
+                blkCnt = (numColsA / 4);
+                while (blkCnt > 0U) {
+                    vecA = vld1q(pSrcAVec);
+                    pSrcAVec += 4;
+                    vecB = vld1q(pSrcBVec);
+                    pSrcBVec += 4;
+                    acc0 = vrmlaldavhaq(acc0, vecA, vecB);
+
+                    blkCnt--;
+                }
+                /*
+                 * tail
+                 * (will be merged thru tail predication)
+                 */
+                blkCnt = (numColsA & 3);
+                if (blkCnt > 0U) {
+                    mve_pred16_t    p0 = vctp32q(blkCnt);
+                    vecA = vld1q(pSrcAVec);
+                    vecB = vld1q(pSrcBVec);
+                    acc0 = vrmlaldavhaq_p(acc0, vecA, vecB, p0);
+                }
+
+                acc0 = asrl(acc0, 23);
+                *px++ = (q31_t) acc0;
+
+                i += numColsA;
+                /*
+                 * Decrement the col loop counter
+                 */
+                col--;
+            }
+        }
+        /* Set status as ARM_MATH_SUCCESS */
+        status = ARM_MATH_SUCCESS;
+    }
+    /*
+     * Return to application
+     */
+    return (status);
+}
+
+#else
+arm_status arm_mat_mult_opt_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst,
+        q31_t *pState)
+{
+  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  q63_t sum;                                     /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+  (void)pState;
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Convert result from 2.62 to 1.31 format and store in destination buffer */
+        *px++ = (q31_t) (sum >> 31);
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
index 4a3bde84..3e1172c5 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q15.c
@@ -1,357 +1,843 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_mult_q15.c
- * Description:  Q15 matrix multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixMult
-  @{
- */
-
-/**
-  @brief         Q15 matrix multiplication.
-  @param[in]     pSrcA      points to the first input matrix structure
-  @param[in]     pSrcB      points to the second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @param[in]     pState     points to the array for storing intermediate results (Unused)
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator. The inputs to the
-                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
-                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
-                   This approach provides 33 guard bits and there is no risk of overflow.
-                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits
-                   and then saturated to 1.15 format.
-  @par
-                   Refer to \ref arm_mat_mult_fast_q15() for a faster but less precise version of this function.
- */
-
-arm_status arm_mat_mult_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst,
-        q15_t                   * pState)
-{
-        q63_t sum;                                     /* Accumulator */
-
-#if defined (ARM_MATH_DSP)                             /* != CM0 */
-
-        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
-        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
-        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
-        q15_t *px;                                     /* Temporary output data matrix pointer */
-        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
-        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix A */
-        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
-        arm_status status;                             /* Status of matrix multiplication */
-        
-        q31_t in;                                      /* Temporary variable to hold the input value */
-        q31_t inA1, inB1, inA2, inB2;
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Matrix transpose */
-    do
-    {
-      /* The pointer px is set to starting address of column being processed */
-      px = pSrcBT + i;
-
-      /* Apply loop unrolling and exchange columns with row elements */
-      col = numColsB >> 2U;
-
-      /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while (col > 0U)
-      {
-        /* Read two elements from row */
-        in = read_q15x2_ia ((q15_t **) &pInB);
-
-        /* Unpack and store one element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) in;
-#else
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB;
-
-        /* Unpack and store second element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#else
-        *px = (q15_t) in;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB;
-
-        /* Read two elements from row */
-        in = read_q15x2_ia ((q15_t **) &pInB);
-
-        /* Unpack and store one element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) in;
-#else
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-        px += numRowsB;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        *px = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#else
-        *px = (q15_t) in;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-        px += numRowsB;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      /* If the columns of pSrcB is not a multiple of 4, compute any remaining output samples here.
-       ** No loop unrolling is used. */
-      col = numColsB % 0x4U;
-
-      while (col > 0U)
-      {
-        /* Read and store input element in destination */
-        *px = *pInB++;
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += numRowsB;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Reset variables for usage in following multiplication process */
-    row = numRowsA;
-    i = 0U;
-    px = pDst->pData;
-
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* For every row wise process, column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
-      pInB = pSrcBT;
-
-      /* column loop */
-      do
-      {
-        /* Set variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate pointer pInA to point to starting address of column being processed */
-        pInA = pSrcA->pData + i;
-
-        /* Apply loop unrolling and compute 2 MACs simultaneously. */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* read real and imag values from pSrcA and pSrcB buffer */
-          inA1 = read_q15x2_ia ((q15_t **) &pInA);
-          inB1 = read_q15x2_ia ((q15_t **) &pInB);
-
-          inA2 = read_q15x2_ia ((q15_t **) &pInA);
-          inB2 = read_q15x2_ia ((q15_t **) &pInB);
-
-          /* Multiply and Accumlates */
-          sum = __SMLALD(inA1, inB1, sum);
-          sum = __SMLALD(inA2, inB2, sum);
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* process remaining column samples */
-        colCnt = numColsA % 0x4U;
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-          sum += *pInA++ * *pInB++;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Saturate and store result in destination buffer */
-        *px = (q15_t) (__SSAT((sum >> 15), 16));
-        px++;
-
-        /* Decrement column loop counter */
-        col--;
-
-      } while (col > 0U);
-
-      i = i + numColsA;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-        q15_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
-        q15_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
-        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
-        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
-        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
-        q15_t *px;                                     /* Temporary output data matrix pointer */
-        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A    */
-        uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
-        arm_status status;                             /* Status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of the row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initiate pointer pIn1 to point to starting address of pSrcA */
-        pIn1 = pInA;
-
-        /* Matrix A columns number of MAC operations are to be performed */
-        colCnt = numColsA;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* Perform multiply-accumulates */
-          sum += (q31_t) * pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Convert result from 34.30 to 1.15 format and store saturated value in destination buffer */
-
-        /* Saturate and store result in destination buffer */
-        *px++ = (q15_t) __SSAT((sum >> 15), 16);
-
-        /* Decrement column loop counter */
-        col--;
-
-        /* Update pointer pIn2 to point to starting address of next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while (col > 0U);
-
-      /* Update pointer pSrcA to point to starting address of next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_q15.c
+ * Description:  Q15 matrix multiplication
+ *
+ * $Date:        3 Nov 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q15 matrix multiplication.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @param[in]     pState     points to the array for storing intermediate results
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator. The inputs to the
+                   multiplications are in 1.15 format and multiplications yield a 2.30 result.
+                   The 2.30 intermediate results are accumulated in a 64-bit accumulator in 34.30 format.
+                   This approach provides 33 guard bits and there is no risk of overflow.
+                   The 34.30 result is then truncated to 34.15 format by discarding the low 15 bits
+                   and then saturated to 1.15 format.
+  @par
+                   Refer to \ref arm_mat_mult_fast_q15() for a faster but less precise version of this function.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MVE_ASRL_SAT16(acc, shift)          ((sqrshrl_sat48(acc, -(32-shift)) >> 32) & 0xffffffff)
+
+#define MATRIX_DIM2 2
+#define MATRIX_DIM3 3
+#define MATRIX_DIM4 4
+
+__STATIC_INLINE arm_status arm_mat_mult_q15_2x2_mve(
+    const arm_matrix_instance_q15 * pSrcA,
+    const arm_matrix_instance_q15 * pSrcB,
+    arm_matrix_instance_q15 * pDst)
+{
+    q15_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q15_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q15_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint16x8_t  vecColBOffs;
+    q15_t       *pInA0 = pInA;
+    q15_t       *pInA1 = pInA0 + MATRIX_DIM2;
+    q63_t        acc0, acc1;
+    q15x8_t     vecB, vecA0, vecA1;
+    mve_pred16_t p0 = vctp16q(MATRIX_DIM2);
+
+    vecColBOffs = vidupq_u16((uint32_t)0, 2); /* MATRIX_DIM2 */
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0);
+
+    vecA0 = vldrhq_s16(pInA0);
+    vecA1 = vldrhq_s16(pInA1);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+
+    pOut[0 * MATRIX_DIM2] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM2] = (q15_t) __SSAT(acc1, 16);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+
+    pOut[0 * MATRIX_DIM2] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM2] = (q15_t) __SSAT(acc1, 16);
+
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+__STATIC_INLINE arm_status arm_mat_mult_q15_3x3_mve(
+    const arm_matrix_instance_q15 * pSrcA,
+    const arm_matrix_instance_q15 * pSrcB,
+    arm_matrix_instance_q15 * pDst)
+{
+    q15_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q15_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q15_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint16x8_t vecColBOffs;
+    q15_t       *pInA0 = pInA;
+    q15_t       *pInA1 = pInA0 + MATRIX_DIM3;
+    q15_t       *pInA2 = pInA1 + MATRIX_DIM3;
+    q63_t        acc0, acc1, acc2;
+    q15x8_t    vecB, vecA0, vecA1, vecA2;
+    mve_pred16_t p0 = vctp16q(MATRIX_DIM3);
+
+    vecColBOffs = vidupq_u16((uint32_t)0, 1);
+    vecColBOffs = vecColBOffs * MATRIX_DIM3;
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0);
+
+    vecA0 = vldrhq_s16(pInA0);
+    vecA1 = vldrhq_s16(pInA1);
+    vecA2 = vldrhq_s16(pInA2);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+    acc2 = vmlaldavq(vecA2, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+    acc2 = asrl(acc2, 15);
+
+    pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16);
+    pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+    acc2 = vmlaldavq(vecA2, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+    acc2 = asrl(acc2, 15);
+
+    pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16);
+    pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+    acc2 = vmlaldavq(vecA2, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+    acc2 = asrl(acc2, 15);
+
+    pOut[0 * MATRIX_DIM3] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM3] = (q15_t) __SSAT(acc1, 16);
+    pOut[2 * MATRIX_DIM3] = (q15_t) __SSAT(acc2, 16);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+__STATIC_INLINE arm_status arm_mat_mult_q15_4x4_mve(
+    const arm_matrix_instance_q15 * pSrcA,
+    const arm_matrix_instance_q15 * pSrcB,
+    arm_matrix_instance_q15 * pDst)
+{
+    q15_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q15_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q15_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint16x8_t vecColBOffs;
+    q15_t       *pInA0 = pInA;
+    q15_t       *pInA1 = pInA0 + MATRIX_DIM4;
+    q15_t       *pInA2 = pInA1 + MATRIX_DIM4;
+    q15_t       *pInA3 = pInA2 + MATRIX_DIM4;
+    q63_t        acc0, acc1, acc2, acc3;
+    q15x8_t     vecB, vecA0, vecA1, vecA2, vecA3;
+    mve_pred16_t p0 = vctp16q(MATRIX_DIM4);
+
+    vecColBOffs = vidupq_u16((uint32_t)0, 4);
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16((q15_t const *)pInB, vecColBOffs, p0);
+
+    vecA0 = vldrhq_s16(pInA0);
+    vecA1 = vldrhq_s16(pInA1);
+    vecA2 = vldrhq_s16(pInA2);
+    vecA3 = vldrhq_s16(pInA3);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+    acc2 = vmlaldavq(vecA2, vecB);
+    acc3 = vmlaldavq(vecA3, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+    acc2 = asrl(acc2, 15);
+    acc3 = asrl(acc3, 15);
+
+    pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16);
+    pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16);
+    pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+    acc2 = vmlaldavq(vecA2, vecB);
+    acc3 = vmlaldavq(vecA3, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+    acc2 = asrl(acc2, 15);
+    acc3 = asrl(acc3, 15);
+
+    pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16);
+    pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16);
+    pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16);
+
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+    acc2 = vmlaldavq(vecA2, vecB);
+    acc3 = vmlaldavq(vecA3, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+    acc2 = asrl(acc2, 15);
+    acc3 = asrl(acc3, 15);
+
+    pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16);
+    pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16);
+    pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16);
+
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrhq_gather_shifted_offset_z_s16(pInB, vecColBOffs, p0);
+
+    acc0 = vmlaldavq(vecA0, vecB);
+    acc1 = vmlaldavq(vecA1, vecB);
+    acc2 = vmlaldavq(vecA2, vecB);
+    acc3 = vmlaldavq(vecA3, vecB);
+
+    acc0 = asrl(acc0, 15);
+    acc1 = asrl(acc1, 15);
+    acc2 = asrl(acc2, 15);
+    acc3 = asrl(acc3, 15);
+
+    pOut[0 * MATRIX_DIM4] = (q15_t) __SSAT(acc0, 16);
+    pOut[1 * MATRIX_DIM4] = (q15_t) __SSAT(acc1, 16);
+    pOut[2 * MATRIX_DIM4] = (q15_t) __SSAT(acc2, 16);
+    pOut[3 * MATRIX_DIM4] = (q15_t) __SSAT(acc3, 16);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+arm_status arm_mat_mult_q15(
+    const arm_matrix_instance_q15 * pSrcA,
+    const arm_matrix_instance_q15 * pSrcB,
+    arm_matrix_instance_q15 * pDst,
+    q15_t * pState)
+{
+    q15_t          *pInA = pSrcA->pData;        /* input data matrix pointer A */
+    q15_t          *pInB = pSrcB->pData;        /* input data matrix pointer B */
+    q15_t          *pInA2;
+    q15_t          *pInB2;
+    q15_t          *px;         /* Temporary output data matrix pointer */
+    q15_t          *px2;        /* Temporary output data matrix pointer */
+    uint32_t        numRowsA = pSrcA->numRows;  /* number of rows of input matrix A    */
+    uint32_t        numColsB = pSrcB->numCols;  /* number of columns of input matrix B */
+    uint32_t        numColsA = pSrcA->numCols;  /* number of columns of input matrix A */
+    uint32_t        numRowsB = pSrcB->numRows;  /* number of rows of input matrix A    */
+    uint32_t        col, i = 0u, j, row = numRowsB;     /* loop counters */
+    q15_t          *pSrcBT = pState;    /* input data matrix pointer for transpose */
+    uint32_t        blkCnt;     /* loop counters */
+    arm_status      status;                             /* Status of matrix multiplication */
+    arm_matrix_instance_q15 BT;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+    /* Check for matrix mismatch condition */
+    if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+    {
+        /* Set status as ARM_MATH_SIZE_MISMATCH */
+        status = ARM_MATH_SIZE_MISMATCH;
+    }
+    else
+#endif
+    {
+        /* small squared matrix specialized routines */
+        if (numRowsA == numColsB && numColsB == numColsA) {
+
+            if (numRowsA == 1) {
+                q63_t           sum;
+                sum = pInA[0] * pInB[0];
+                pDst->pData[0] = (q15_t) __SSAT((sum >> 15), 16);
+                return (ARM_MATH_SUCCESS);
+            } else if (numRowsA == 2)
+                return arm_mat_mult_q15_2x2_mve(pSrcA, pSrcB, pDst);
+            else if (numRowsA == 3)
+                return arm_mat_mult_q15_3x3_mve(pSrcA, pSrcB, pDst);
+            else if (numRowsA == 4)
+                return arm_mat_mult_q15_4x4_mve(pSrcA, pSrcB, pDst);
+        }
+
+        /*
+         * Matrix transpose
+         */
+
+        BT.numRows = numColsB;
+        BT.numCols = numRowsB;
+        BT.pData = pSrcBT;
+
+        arm_mat_trans_q15(pSrcB, &BT);
+
+
+        /*
+         * Reset the variables for the usage in the following multiplication process
+         */
+        i = 0;
+        row = numRowsA >> 1;
+        px = pDst->pData;
+        px2 = px + numColsB;
+
+        /*
+         * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB
+         */
+
+        /*
+         * row loop
+         */
+        while (row > 0u) {
+            /*
+             * For every row wise process, the column loop counter is to be initiated
+             */
+            col = numColsB >> 1;
+            /*
+             * For every row wise process, the pIn2 pointer is set
+             * to the starting address of the transposed pSrcB data
+             */
+            pInB = pSrcBT;
+            pInB2 = pInB + numRowsB;
+            j = 0;
+
+            /*
+             * column loop
+             */
+            while (col > 0u) {
+                q15_t const    *pSrcAVec, *pSrcBVec, *pSrcA2Vec, *pSrcB2Vec;
+                q15x8_t         vecA, vecA2, vecB, vecB2;
+                q63_t           acc0, acc1, acc2, acc3;
+
+                /*
+                 * Initiate the pointer pIn1 to point to the starting address of the column being processed
+                 */
+                pInA = pSrcA->pData + i;
+                pInA2 = pInA + numColsA;
+                pInB = pSrcBT + j;
+                pInB2 = pInB + numRowsB;
+
+
+                pSrcAVec = (q15_t const *) pInA;
+                pSrcA2Vec = (q15_t const *) pInA2;
+                pSrcBVec = (q15_t const *) pInB;
+                pSrcB2Vec = (q15_t const *) pInB2;
+
+                acc0 = 0LL;
+                acc1 = 0LL;
+                acc2 = 0LL;
+                acc3 = 0LL;
+
+                vecA = vld1q(pSrcAVec);
+                pSrcAVec += 8;
+
+                blkCnt = numColsA / 8;
+                while (blkCnt > 0U) {
+                    vecB = vld1q(pSrcBVec);
+                    pSrcBVec += 8;
+                    acc0 = vmlaldavaq(acc0, vecA, vecB);
+                    vecA2 = vld1q(pSrcA2Vec);
+                    pSrcA2Vec += 8;
+                    acc1 = vmlaldavaq(acc1, vecA2, vecB);
+                    vecB2 = vld1q(pSrcB2Vec);
+                    pSrcB2Vec += 8;
+                    acc2 = vmlaldavaq(acc2, vecA, vecB2);
+                    vecA = vld1q(pSrcAVec);
+                    pSrcAVec += 8;
+                    acc3 = vmlaldavaq(acc3, vecA2, vecB2);
+
+                    blkCnt--;
+                }
+                /*
+                 * tail
+                 */
+                blkCnt = numColsA & 7;
+                if (blkCnt > 0U) {
+                    mve_pred16_t    p0 = vctp16q(blkCnt);
+                    vecB = vld1q(pSrcBVec);
+                    acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0);
+                    vecA2 = vld1q(pSrcA2Vec);
+                    acc1 = vmlaldavaq_p(acc1, vecA2, vecB, p0);
+                    vecB2 = vld1q(pSrcB2Vec);
+                    acc2 = vmlaldavaq_p(acc2, vecA, vecB2, p0);
+                    vecA = vld1q(pSrcAVec);
+                    acc3 = vmlaldavaq_p(acc3, vecA2, vecB2, p0);
+                }
+
+                *px++ = (q15_t) MVE_ASRL_SAT16(acc0, 15);
+                *px++ = (q15_t) MVE_ASRL_SAT16(acc2, 15);
+                *px2++ = (q15_t) MVE_ASRL_SAT16(acc1, 15);
+                *px2++ = (q15_t) MVE_ASRL_SAT16(acc3, 15);
+                j += numRowsB * 2;
+                /*
+                 * Decrement the column loop counter
+                 */
+                col--;
+
+            }
+
+            i = i + numColsA * 2;
+            px = px2 + (numColsB & 1u);
+            px2 = px + numColsB;
+            /*
+             * Decrement the row loop counter
+             */
+            row--;
+        }
+
+        /*
+         * Compute remaining row and/or column below
+         */
+
+        if (numColsB & 1u) {
+            row = numRowsA & (~0x1);    //avoid redundant computation
+            px = pDst->pData + numColsB - 1;
+            i = 0;
+
+            /*
+             * row loop
+             */
+            while (row > 0) {
+                q15_t const    *pSrcAVec, *pSrcBVec;
+                q15x8_t         vecA, vecB;
+                q63_t           acc0;
+
+                /*
+                 * point to last column in matrix B
+                 */
+                pInB = pSrcBT + numRowsB * (numColsB - 1);
+                pInA = pSrcA->pData + i;
+
+                pSrcAVec = (q15_t const *) pInA;
+                pSrcBVec = (q15_t const *) pInB;
+
+                acc0 = 0LL;
+                blkCnt = (numColsA) / 8;
+                while (blkCnt > 0U) {
+                    vecA = vld1q(pSrcAVec);
+                    pSrcAVec += 8;
+                    vecB = vld1q(pSrcBVec);
+                    pSrcBVec += 8;
+                    acc0 = vmlaldavaq(acc0, vecA, vecB);
+
+                    blkCnt--;
+                }
+                /*
+                 * tail
+                 */
+                blkCnt = (numColsA & 7);
+                if (blkCnt > 0U) {
+                    mve_pred16_t    p0 = vctp16q(blkCnt);
+                    vecA = vld1q(pSrcAVec);
+                    vecB = vld1q(pSrcBVec);
+                    acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0);
+                }
+
+                *px = (q15_t) MVE_ASRL_SAT16(acc0, 15);
+
+                px += numColsB;
+
+                i += numColsA;
+                /*
+                 * Decrement the row loop counter
+                 */
+                row--;
+            }
+        }
+
+        if (numRowsA & 1u) {
+            col = numColsB;
+            i = 0u;
+            /*
+             * point to last row in output matrix
+             */
+            px = pDst->pData + (numColsB) * (numRowsA - 1);
+            /*
+             * col loop
+             */
+            while (col > 0) {
+                q15_t const    *pSrcAVec, *pSrcBVec;
+                q15x8_t         vecA, vecB;
+                q63_t           acc0;
+
+                /*
+                 * point to last row in matrix A
+                 */
+                pInA = pSrcA->pData + (numRowsA - 1) * numColsA;
+                pInB = pSrcBT + i;
+
+                /*
+                 * Set the variable sum, that acts as accumulator, to zero
+                 */
+                pSrcAVec = (q15_t const *) pInA;
+                pSrcBVec = (q15_t const *) pInB;
+                acc0 = 0LL;
+
+                blkCnt = ((numColsA) / 8);
+                while (blkCnt > 0U) {
+                    vecA = vld1q(pSrcAVec);
+                    pSrcAVec += 8;
+                    vecB = vld1q(pSrcBVec);
+                    pSrcBVec += 8;
+                    acc0 = vmlaldavaq(acc0, vecA, vecB);
+
+                    blkCnt--;
+                }
+                /*
+                 * tail
+                 */
+                blkCnt = (numColsA & 7);
+                if (blkCnt > 0U) {
+                    mve_pred16_t    p0 = vctp16q(blkCnt);
+                    vecA = vld1q(pSrcAVec);
+                    vecB = vld1q(pSrcBVec);
+                    acc0 = vmlaldavaq_p(acc0, vecA, vecB, p0);
+                }
+
+                *px++ = (q15_t) MVE_ASRL_SAT16(acc0, 15);
+
+                i += numColsA;
+
+                /*
+                 * Decrement the col loop counter
+                 */
+                col--;
+            }
+        }
+
+        /* Set status as ARM_MATH_SUCCESS */
+        status = ARM_MATH_SUCCESS;
+    }
+    /* Return to application */
+    return (status);
+}
+
+#else 
+arm_status arm_mat_mult_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst,
+        q15_t                   * pState)
+{
+        q63_t sum;                                     /* Accumulator */
+
+#if defined (ARM_MATH_DSP)                             /* != CM0 */
+
+        q15_t *pSrcBT = pState;                        /* Input data matrix pointer for transpose */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsB = pSrcB->numRows;            /* Number of rows of input matrix B */
+        uint32_t col, i = 0U, row = numRowsB, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+
+        q31_t inA1, inB1, inA2, inB2;
+        arm_matrix_instance_q15 BT;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+  {
+
+    BT.numRows = numColsB;
+    BT.numCols = numRowsB;
+    BT.pData = pSrcBT;
+
+    arm_mat_trans_q15(pSrcB,&BT);
+    /* Reset variables for usage in following multiplication process */
+    row = numRowsA;
+    i = 0U;
+    px = pDst->pData;
+
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of transposed pSrcB data */
+      pInB = pSrcBT;
+
+      /* column loop */
+      do
+      {
+        /* Set variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initiate pointer pInA to point to starting address of column being processed */
+        pInA = pSrcA->pData + i;
+
+        /* Apply loop unrolling and compute 2 MACs simultaneously. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* read real and imag values from pSrcA and pSrcB buffer */
+          inA1 = read_q15x2_ia ((q15_t **) &pInA);
+          inB1 = read_q15x2_ia ((q15_t **) &pInB);
+
+          inA2 = read_q15x2_ia ((q15_t **) &pInA);
+          inB2 = read_q15x2_ia ((q15_t **) &pInB);
+
+          /* Multiply and Accumulates */
+          sum = __SMLALD(inA1, inB1, sum);
+          sum = __SMLALD(inA2, inB2, sum);
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* process remaining column samples */
+        colCnt = numColsA % 0x4U;
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+          sum += *pInA++ * *pInB++;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Saturate and store result in destination buffer */
+        *px = (q15_t) (__SSAT((sum >> 15), 16));
+        px++;
+
+        /* Decrement column loop counter */
+        col--;
+
+      } while (col > 0U);
+
+      i = i + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+        q15_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+        q15_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+        q15_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A of Q15 type */
+        q15_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B of Q15 type */
+        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+        q15_t *px;                                     /* Temporary output data matrix pointer */
+        uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+        uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+        uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A    */
+        uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+        arm_status status;                             /* Status of matrix multiplication */
+        (void)pState;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of the row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initiate pointer pIn1 to point to starting address of pSrcA */
+        pIn1 = pInA;
+
+        /* Matrix A columns number of MAC operations are to be performed */
+        colCnt = numColsA;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform multiply-accumulates */
+          sum += (q31_t) * pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Convert result from 34.30 to 1.15 format and store saturated value in destination buffer */
+
+        /* Saturate and store result in destination buffer */
+        *px++ = (q15_t) __SSAT((sum >> 15), 16);
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pSrcA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
index 88c87910..18738279 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q31.c
@@ -1,196 +1,761 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_mult_q31.c
- * Description:  Q31 matrix multiplication
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixMult
-  @{
- */
-
-/**
-  @brief         Q31 matrix multiplication.
-  @param[in]     pSrcA      points to the first input matrix structure
-  @param[in]     pSrcB      points to the second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The accumulator has a 2.62 format and maintains full precision of the intermediate
-                   multiplication results but provides only a single guard bit. There is no saturation
-                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
-                   distorts the result. The input signals should be scaled down to avoid intermediate
-                   overflows. The input is thus scaled down by log2(numColsA) bits
-                   to avoid overflows, as a total of numColsA additions are performed internally.
-                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
-  @remark
-                   Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function.
- */
-
-arm_status arm_mat_mult_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
-  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
-  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
-  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  q63_t sum;                                     /* Accumulator */
-  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
-  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
-  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
-  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
-  arm_status status;                             /* Status of matrix multiplication */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numCols != pSrcB->numRows) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcB->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
-    /* row loop */
-    do
-    {
-      /* Output pointer is set to starting address of row being processed */
-      px = pOut + i;
-
-      /* For every row wise process, column loop counter is to be initiated */
-      col = numColsB;
-
-      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
-      pIn2 = pSrcB->pData;
-
-      /* column loop */
-      do
-      {
-        /* Set the variable sum, that acts as accumulator, to zero */
-        sum = 0;
-
-        /* Initialize pointer pIn1 to point to starting address of column being processed */
-        pIn1 = pInA;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        /* Loop unrolling: Compute 4 MACs at a time. */
-        colCnt = numColsA >> 2U;
-
-        /* matrix multiplication */
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          sum += (q63_t) *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Loop unrolling: Compute remaining MACs */
-        colCnt = numColsA % 0x4U;
-
-#else
-
-        /* Initialize cntCnt with number of columns */
-        colCnt = numColsA;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-        while (colCnt > 0U)
-        {
-          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
-
-          /* Perform the multiply-accumulates */
-          sum += (q63_t) *pIn1++ * *pIn2;
-          pIn2 += numColsB;
-
-          /* Decrement loop counter */
-          colCnt--;
-        }
-
-        /* Convert result from 2.62 to 1.31 format and store in destination buffer */
-        *px++ = (q31_t) (sum >> 31);
-
-        /* Decrement column loop counter */
-        col--;
-
-        /* Update pointer pIn2 to point to starting address of next column */
-        pIn2 = pInB + (numColsB - col);
-
-      } while (col > 0U);
-
-      /* Update pointer pInA to point to starting address of next row */
-      i = i + numColsB;
-      pInA = pInA + numColsA;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixMult group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_q31.c
+ * Description:  Q31 matrix multiplication
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+  @brief         Q31 matrix multiplication.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The accumulator has a 2.62 format and maintains full precision of the intermediate
+                   multiplication results but provides only a single guard bit. There is no saturation
+                   on intermediate additions. Thus, if the accumulator overflows it wraps around and
+                   distorts the result. The input signals should be scaled down to avoid intermediate
+                   overflows. The input is thus scaled down by log2(numColsA) bits
+                   to avoid overflows, as a total of numColsA additions are performed internally.
+                   The 2.62 accumulator is right shifted by 31 bits and saturated to 1.31 format to yield the final result.
+  @remark
+                   Refer to \ref arm_mat_mult_fast_q31() for a faster but less precise implementation of this function.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#define MATRIX_DIM2 2
+#define MATRIX_DIM3 3
+#define MATRIX_DIM4 4
+
+__STATIC_INLINE arm_status arm_mat_mult_q31_2x2_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q31_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q31_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs;
+    q31_t       *pInA0 = pInA;
+    q31_t       *pInA1 = pInA0 + MATRIX_DIM2;
+    q63_t        acc0, acc1;
+    q31x4_t      vecB, vecA0, vecA1;
+    /* enable predication to disable half of vector elements */
+    mve_pred16_t p0 = vctp32q(MATRIX_DIM2);
+
+    vecColBOffs = vidupq_u32((uint32_t)0, 1);
+    vecColBOffs = vecColBOffs * MATRIX_DIM2;
+
+    pInB = pSrcB->pData;
+
+    /* load 1st B column (partial load) */
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    /* load A rows */
+    vecA0 = vldrwq_s32(pInA0);
+    vecA1 = vldrwq_s32(pInA1);
+
+    acc0 = vrmlaldavhq(vecA0, vecB);
+    acc1 = vrmlaldavhq(vecA1, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+
+    pOut[0 * MATRIX_DIM2] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM2] = (q31_t) acc1;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    acc0 = vrmlaldavhq(vecA0, vecB);
+    acc1 = vrmlaldavhq(vecA1, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+
+    pOut[0 * MATRIX_DIM2] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM2] = (q31_t) acc1;
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+
+__STATIC_INLINE arm_status arm_mat_mult_q31_3x3_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q31_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q31_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs;
+    q31_t       *pInA0 = pInA;
+    q31_t       *pInA1 = pInA0 + MATRIX_DIM3;
+    q31_t       *pInA2 = pInA1 + MATRIX_DIM3;
+    q63_t        acc0, acc1, acc2;
+    q31x4_t      vecB, vecA;
+    /* enable predication to disable last (4th) vector element */
+    mve_pred16_t p0 = vctp32q(MATRIX_DIM3);
+
+    vecColBOffs = vidupq_u32((uint32_t)0, 1);
+    vecColBOffs = vecColBOffs * MATRIX_DIM3;
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+
+    pOut[0 * MATRIX_DIM3] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM3] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM3] = (q31_t) acc2;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+
+    pOut[0 * MATRIX_DIM3] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM3] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM3] = (q31_t) acc2;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_z_s32(pInB, vecColBOffs, p0);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+
+    pOut[0 * MATRIX_DIM3] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM3] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM3] = (q31_t) acc2;
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+__STATIC_INLINE arm_status arm_mat_mult_q31_4x4_mve(
+    const arm_matrix_instance_q31 * pSrcA,
+    const arm_matrix_instance_q31 * pSrcB,
+    arm_matrix_instance_q31 * pDst)
+{
+    q31_t       *pInB = pSrcB->pData;  /* input data matrix pointer B */
+    q31_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q31_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint32x4_t   vecColBOffs;
+    q31_t       *pInA0 = pInA;
+    q31_t       *pInA1 = pInA0 + MATRIX_DIM4;
+    q31_t       *pInA2 = pInA1 + MATRIX_DIM4;
+    q31_t       *pInA3 = pInA2 + MATRIX_DIM4;
+    q63_t        acc0, acc1, acc2, acc3;
+    q31x4_t      vecB, vecA;
+
+    vecColBOffs = vidupq_u32((uint32_t)0, 4);
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrwq_gather_shifted_offset_s32(pInB, vecColBOffs);
+
+    vecA = vldrwq_s32(pInA0);
+    acc0 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA1);
+    acc1 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA2);
+    acc2 = vrmlaldavhq(vecA, vecB);
+    vecA = vldrwq_s32(pInA3);
+    acc3 = vrmlaldavhq(vecA, vecB);
+
+    acc0 = asrl(acc0, 23);
+    acc1 = asrl(acc1, 23);
+    acc2 = asrl(acc2, 23);
+    acc3 = asrl(acc3, 23);
+
+    pOut[0 * MATRIX_DIM4] = (q31_t) acc0;
+    pOut[1 * MATRIX_DIM4] = (q31_t) acc1;
+    pOut[2 * MATRIX_DIM4] = (q31_t) acc2;
+    pOut[3 * MATRIX_DIM4] = (q31_t) acc3;
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+arm_status arm_mat_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+    q31_t const *pInB = (q31_t const *)pSrcB->pData;  /* input data matrix pointer B */
+    q31_t const *pInA = (q31_t const *)pSrcA->pData;  /* input data matrix pointer A */
+    q31_t      *pOut = pDst->pData;   /* output data matrix pointer */
+    q31_t      *px;               /* Temporary output data matrix pointer */
+    uint16_t    numRowsA = pSrcA->numRows;    /* number of rows of input matrix A    */
+    uint16_t    numColsB = pSrcB->numCols;    /* number of columns of input matrix B */
+    uint16_t    numColsA = pSrcA->numCols;    /* number of columns of input matrix A */
+    uint16_t    col, i = 0U, row = numRowsA;  /* loop counters */
+    arm_status  status;          /* status of matrix multiplication */
+    uint32x4_t  vecOffs, vecColBOffs;
+    uint32_t    blkCnt, rowCnt;           /* loop counters */
+
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+     /* small squared matrix specialized routines */
+    if(numRowsA == numColsB && numColsB == numColsA) {
+        if (numRowsA == 1)
+        {
+          q63_t sum =  (q63_t) *pInA * *pInB;
+          pOut[0] = (q31_t)(sum >> 31);
+          return (ARM_MATH_SUCCESS);
+        }
+        else if(numRowsA == 2)
+            return arm_mat_mult_q31_2x2_mve(pSrcA, pSrcB, pDst);
+        else if(numRowsA == 3)
+            return arm_mat_mult_q31_3x3_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 4)
+            return arm_mat_mult_q31_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+
+    vecColBOffs = vidupq_u32((uint32_t)0, 1);
+    vecColBOffs = vecColBOffs * (uint32_t) (numColsB);
+
+    /*
+     * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB
+     */
+
+    /*
+     * row loop
+     */
+    rowCnt = row >> 2;
+    while (rowCnt > 0U)
+    {
+        /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i;
+        i = i + 4 * numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (q31_t const *)pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0U)
+        {
+                    /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            q31_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec;
+            q31_t const   *pInA0 = pInA;
+            q31_t const   *pInA1 = pInA0 + numColsA;
+            q31_t const   *pInA2 = pInA1 + numColsA;
+            q31_t const   *pInA3 = pInA2 + numColsA;
+            q63_t          acc0, acc1, acc2, acc3;
+
+            acc0 = 0LL;
+            acc1 = 0LL;
+            acc2 = 0LL;
+            acc3 = 0LL;
+
+            pSrcA0Vec = (q31_t const *) pInA0;
+            pSrcA1Vec = (q31_t const *) pInA1;
+            pSrcA2Vec = (q31_t const *) pInA2;
+            pSrcA3Vec = (q31_t const *) pInA3;
+
+            vecOffs = vecColBOffs;
+
+            /* process 1 x 4 block output */
+            blkCnt = numColsA >> 2;
+            while (blkCnt > 0U)
+            {
+                q31x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset(pInB, vecOffs);
+                /* move Matrix B read offsets, 4 rows down */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 4);
+
+                vecA = vld1q(pSrcA0Vec);  pSrcA0Vec += 4;
+                acc0 = vrmlaldavhaq(acc0, vecA, vecB);
+                vecA = vld1q(pSrcA1Vec);  pSrcA1Vec += 4;
+                acc1 = vrmlaldavhaq(acc1, vecA, vecB);
+                vecA = vld1q(pSrcA2Vec);  pSrcA2Vec += 4;
+                acc2 = vrmlaldavhaq(acc2, vecA, vecB);
+                vecA = vld1q(pSrcA3Vec);  pSrcA3Vec += 4;
+                acc3 = vrmlaldavhaq(acc3, vecA, vecB);
+                blkCnt--;
+            }
+
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = numColsA & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+                q31x4_t   vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0);
+                //vecOffs = vecOffs + (uint32_t) (numColsB * 4);
+
+                vecA = vld1q(pSrcA0Vec);  pSrcA0Vec += 4;
+                acc0 = vrmlaldavhaq(acc0, vecA, vecB);
+                vecA = vld1q(pSrcA1Vec);  pSrcA1Vec += 4;
+                acc1 = vrmlaldavhaq(acc1, vecA, vecB);
+                vecA = vld1q(pSrcA2Vec);  pSrcA2Vec += 4;
+                acc2 = vrmlaldavhaq(acc2, vecA, vecB);
+                vecA = vld1q(pSrcA3Vec);  pSrcA3Vec += 4;
+                acc3 = vrmlaldavhaq(acc3, vecA, vecB);
+            }
+
+            acc0 = asrl(acc0, 23);
+            acc1 = asrl(acc1, 23);
+            acc2 = asrl(acc2, 23);
+            acc3 = asrl(acc3, 23);
+
+            px[0] = (q31_t) acc0;
+            px[1 * numColsB] = (q31_t) acc1;
+            px[2 * numColsB] = (q31_t) acc2;
+            px[3 * numColsB] = (q31_t) acc3;
+            px++;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (q31_t const *)pSrcB->pData + (numColsB - col);
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += (numColsA * 4);
+        /*
+         * Decrement the row loop counter
+         */
+        rowCnt --;
+
+    }
+    rowCnt = row & 3;
+    while (rowCnt > 0U)
+    {
+             /*
+         * Output pointer is set to starting address of the row being processed
+         */
+        px = pOut + i;
+        i = i + numColsB;
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB;
+        /*
+         * For every row wise process, the pInB pointer is set
+         * to the starting address of the pSrcB data
+         */
+        pInB = (q31_t const *)pSrcB->pData;
+        /*
+         * column loop
+         */
+        while (col > 0U)
+        {
+            /*
+             * generate 4 columns elements
+             */
+            /*
+             * Matrix A columns number of MAC operations are to be performed
+             */
+
+            q31_t const *pSrcA0Vec;
+            q31_t const   *pInA0 = pInA;
+            q63_t          acc0;
+
+            acc0 = 0LL;
+           
+
+            pSrcA0Vec = (q31_t const *) pInA0;
+           
+            vecOffs = vecColBOffs;
+
+            /* process 1 x 4 block output */
+            blkCnt = numColsA >> 2;
+            while (blkCnt > 0U)
+            {
+                q31x4_t vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset(pInB, vecOffs);
+                /* move Matrix B read offsets, 4 rows down */
+                vecOffs = vecOffs + (uint32_t) (numColsB * 4);
+
+                vecA = vld1q(pSrcA0Vec);  pSrcA0Vec += 4;
+                acc0 = vrmlaldavhaq(acc0, vecA, vecB);
+              
+                blkCnt--;
+            }
+
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = numColsA & 3;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp32q(blkCnt);
+                q31x4_t   vecB, vecA;
+
+                vecB = vldrwq_gather_shifted_offset_z(pInB, vecOffs, p0);
+                //vecOffs = vecOffs + (uint32_t) (numColsB * 4);
+
+                vecA = vld1q(pSrcA0Vec);  
+                pSrcA0Vec += 4;
+                acc0 = vrmlaldavhaq(acc0, vecA, vecB);
+                
+            }
+
+            acc0 = asrl(acc0, 23);
+           
+
+            px[0] = (q31_t) acc0;
+            px++;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+            /*
+             * Update the pointer pInB to point to the  starting address of the next column
+             */
+            pInB = (q31_t const *)pSrcB->pData + (numColsB - col);
+        }
+
+        /*
+         * Update the pointer pInA to point to the  starting address of the next row
+         */
+        pInA += numColsA;
+        /*
+         * Decrement the row loop counter
+         */
+        rowCnt--;
+    }
+
+    /*
+     * set status as ARM_MATH_SUCCESS
+     */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_mult_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn1 = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pIn2 = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pInA = pSrcA->pData;                    /* Input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* Input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  q63_t sum;                                     /* Accumulator */
+  uint16_t numRowsA = pSrcA->numRows;            /* Number of rows of input matrix A */
+  uint16_t numColsB = pSrcB->numCols;            /* Number of columns of input matrix B */
+  uint16_t numColsA = pSrcA->numCols;            /* Number of columns of input matrix A */
+  uint32_t col, i = 0U, row = numRowsA, colCnt;  /* Loop counters */
+  arm_status status;                             /* Status of matrix multiplication */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+    /* row loop */
+    do
+    {
+      /* Output pointer is set to starting address of row being processed */
+      px = pOut + i;
+
+      /* For every row wise process, column loop counter is to be initiated */
+      col = numColsB;
+
+      /* For every row wise process, pIn2 pointer is set to starting address of pSrcB data */
+      pIn2 = pSrcB->pData;
+
+      /* column loop */
+      do
+      {
+        /* Set the variable sum, that acts as accumulator, to zero */
+        sum = 0;
+
+        /* Initialize pointer pIn1 to point to starting address of column being processed */
+        pIn1 = pInA;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        /* Loop unrolling: Compute 4 MACs at a time. */
+        colCnt = numColsA >> 2U;
+
+        /* matrix multiplication */
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Loop unrolling: Compute remaining MACs */
+        colCnt = numColsA % 0x4U;
+
+#else
+
+        /* Initialize cntCnt with number of columns */
+        colCnt = numColsA;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+        while (colCnt > 0U)
+        {
+          /* c(m,n) = a(1,1) * b(1,1) + a(1,2) * b(2,1) + .... + a(m,p) * b(p,n) */
+
+          /* Perform the multiply-accumulates */
+          sum += (q63_t) *pIn1++ * *pIn2;
+          pIn2 += numColsB;
+
+          /* Decrement loop counter */
+          colCnt--;
+        }
+
+        /* Convert result from 2.62 to 1.31 format and store in destination buffer */
+        *px++ = (q31_t) (sum >> 31);
+
+        /* Decrement column loop counter */
+        col--;
+
+        /* Update pointer pIn2 to point to starting address of next column */
+        pIn2 = pInB + (numColsB - col);
+
+      } while (col > 0U);
+
+      /* Update pointer pInA to point to starting address of next row */
+      i = i + numColsB;
+      pInA = pInA + numColsA;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q7.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q7.c
new file mode 100755
index 00000000..3ce0fe60
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_mult_q7.c
@@ -0,0 +1,678 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_mult_q7.c
+ * Description:  Q15 matrix multiplication
+ *
+ * $Date:        23 April 2021
+ *
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixMult
+  @{
+ */
+
+/**
+ * @brief Q7 matrix multiplication
+ * @param[in]       *pSrcA points to the first input matrix structure
+ * @param[in]       *pSrcB points to the second input matrix structure
+ * @param[out]      *pDst points to output matrix structure
+ * @param[in]       *pState points to the array for storing intermediate results (Unused in some versions)
+ * @return          The function returns either
+ * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
+ *
+ * @details
+ * <b>Scaling and Overflow Behavior:</b>
+ *
+ * \par
+ * The function is implemented using a 32-bit internal accumulator saturated to 1.7 format.
+ *
+ *
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+__STATIC_FORCEINLINE arm_status arm_mat_mult_q7_2x2_mve(
+    const arm_matrix_instance_q7 * pSrcA,
+    const arm_matrix_instance_q7 * pSrcB,
+    arm_matrix_instance_q7 * pDst)
+{
+    const uint32_t MATRIX_DIM = 2;
+    q7_t const *pInB = (q7_t const *)pSrcB->pData;  /* input data matrix pointer B */
+    q7_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q7_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint8x16_t vecColBOffs;
+    q7_t       *pInA0 = pInA;
+    q7_t       *pInA1 = pInA0 + MATRIX_DIM;
+    q31_t       acc0, acc1;
+    q7x16_t    vecB, vecA0, vecA1;
+    mve_pred16_t p0 = vctp8q(MATRIX_DIM);
+
+    vecColBOffs = vidupq_u8((uint32_t)0, 2); /* MATRIX_DIM */
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    vecA0 = vldrbq_s8(pInA0);
+    vecA1 = vldrbq_s8(pInA1);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+__STATIC_FORCEINLINE arm_status arm_mat_mult_q7_3x3_mve(
+    const arm_matrix_instance_q7 * pSrcA,
+    const arm_matrix_instance_q7 * pSrcB,
+    arm_matrix_instance_q7 * pDst)
+{
+    const uint8_t  MATRIX_DIM = 3;
+    q7_t const     *pInB = (q7_t const *)pSrcB->pData;  /* input data matrix pointer B */
+    q7_t           *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q7_t           *pOut = pDst->pData;   /* output data matrix pointer */
+    uint8x16_t     vecColBOffs;
+    q7_t           *pInA0 = pInA;
+    q7_t           *pInA1 = pInA0 + MATRIX_DIM;
+    q7_t           *pInA2 = pInA1 + MATRIX_DIM;
+    q31_t           acc0, acc1, acc2;
+    q7x16_t        vecB, vecA0, vecA1, vecA2;
+    mve_pred16_t    p0 = vctp8q(MATRIX_DIM);
+
+    vecColBOffs = vidupq_u8((uint32_t)0, 1);
+    vecColBOffs = vecColBOffs * MATRIX_DIM;
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    vecA0 = vldrbq_s8(pInA0);
+    vecA1 = vldrbq_s8(pInA1);
+    vecA2 = vldrbq_s8(pInA2);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+    acc2 = vmladavq_s8(vecA2, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+    acc2 = vmladavq_s8(vecA2, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+    acc2 = vmladavq_s8(vecA2, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+
+__STATIC_FORCEINLINE arm_status arm_mat_mult_q7_4x4_mve(
+    const arm_matrix_instance_q7 * pSrcA,
+    const arm_matrix_instance_q7 * pSrcB,
+    arm_matrix_instance_q7 * pDst)
+{
+    const uint32_t MATRIX_DIM = 4;
+    q7_t const *pInB = (q7_t const *)pSrcB->pData;  /* input data matrix pointer B */
+    q7_t       *pInA = pSrcA->pData;  /* input data matrix pointer A */
+    q7_t       *pOut = pDst->pData;   /* output data matrix pointer */
+    uint8x16_t vecColBOffs;
+    q7_t       *pInA0 = pInA;
+    q7_t       *pInA1 = pInA0 + MATRIX_DIM;
+    q7_t       *pInA2 = pInA1 + MATRIX_DIM;
+    q7_t       *pInA3 = pInA2 + MATRIX_DIM;
+    q31_t       acc0, acc1, acc2, acc3;
+    q7x16_t    vecB, vecA0, vecA1, vecA2, vecA3;
+    mve_pred16_t p0 = vctp8q(MATRIX_DIM);
+
+    vecColBOffs = vidupq_u8((uint32_t)0, 4);
+
+    pInB = pSrcB->pData;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    vecA0 = vldrbq_s8(pInA0);
+    vecA1 = vldrbq_s8(pInA1);
+    vecA2 = vldrbq_s8(pInA2);
+    vecA3 = vldrbq_s8(pInA3);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+    acc2 = vmladavq_s8(vecA2, vecB);
+    acc3 = vmladavq_s8(vecA3, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8);
+    pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+    acc2 = vmladavq_s8(vecA2, vecB);
+    acc3 = vmladavq_s8(vecA3, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8);
+    pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+    acc2 = vmladavq_s8(vecA2, vecB);
+    acc3 = vmladavq_s8(vecA3, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8);
+    pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8);
+    pOut++;
+
+    /* move to next B column */
+    pInB = pInB + 1;
+
+    vecB = vldrbq_gather_offset_z(pInB, vecColBOffs, p0);
+
+    acc0 = vmladavq_s8(vecA0, vecB);
+    acc1 = vmladavq_s8(vecA1, vecB);
+    acc2 = vmladavq_s8(vecA2, vecB);
+    acc3 = vmladavq_s8(vecA3, vecB);
+
+    pOut[0 * MATRIX_DIM] = (q7_t) __SSAT(acc0 >> 7, 8);
+    pOut[1 * MATRIX_DIM] = (q7_t) __SSAT(acc1 >> 7, 8);
+    pOut[2 * MATRIX_DIM] = (q7_t) __SSAT(acc2 >> 7, 8);
+    pOut[3 * MATRIX_DIM] = (q7_t) __SSAT(acc3 >> 7, 8);
+    /*
+     * Return to application
+     */
+    return (ARM_MATH_SUCCESS);
+}
+
+arm_status arm_mat_mult_q7(
+    const arm_matrix_instance_q7 * pSrcA,
+    const arm_matrix_instance_q7 * pSrcB,
+    arm_matrix_instance_q7 * pDst,
+    q7_t * pState)
+{
+    q7_t    *pInA = pSrcA->pData;  /* input data matrix pointer A of Q7 type */
+    q7_t    *pInB = pSrcB->pData;  /* input data matrix pointer B of Q7 type */
+    q7_t    *pInA2;
+    q7_t    *pInB2;
+    q7_t    *px;               /* Temporary output data matrix pointer */
+    q7_t    *px2;              /* Temporary output data matrix pointer */
+    uint32_t  numRowsA = pSrcA->numRows;    /* number of rows of input matrix A    */
+    uint32_t  numColsB = pSrcB->numCols;    /* number of columns of input matrix B */
+    uint32_t  numColsA = pSrcA->numCols;    /* number of columns of input matrix A */
+    uint32_t  numRowsB = pSrcB->numRows;    /* number of rows of input matrix A    */
+    uint32_t  col, i = 0u, j, row = numRowsB;   /* loop counters */
+    q7_t    *pSrcBT = pState;   /* input data matrix pointer for transpose */
+    uint32_t  blkCnt;           /* loop counters */
+    arm_status status;                            /* status of matrix multiplication */
+    arm_matrix_instance_q7 BT;
+
+
+   #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+  {
+    /* small squared matrix specialized routines */
+    if(numRowsA == numColsB && numColsB == numColsA) {
+        if(numRowsA == 2)
+            return arm_mat_mult_q7_2x2_mve(pSrcA, pSrcB, pDst);
+        else if(numRowsA == 3)
+            return arm_mat_mult_q7_3x3_mve(pSrcA, pSrcB, pDst);
+        else if (numRowsA == 4)
+            return arm_mat_mult_q7_4x4_mve(pSrcA, pSrcB, pDst);
+    }
+    /*
+     * Matrix transpose
+     */
+
+    BT.numRows = numColsB;
+    BT.numCols = numRowsB;
+    BT.pData = pSrcBT;
+
+    arm_mat_trans_q7(pSrcB, &BT);
+
+    /*
+     * Reset the variables for the usage in the following multiplication process
+     */
+    i = 0;
+    row = numRowsA >> 1;
+    px = pDst->pData;
+    px2 = px + numColsB;
+
+    /*
+     * The following loop performs the dot-product of each row in pSrcA with each column in pSrcB
+     */
+
+    /*
+     * row loop
+     */
+    while (row > 0u)
+    {
+        /*
+         * For every row wise process, the column loop counter is to be initiated
+         */
+        col = numColsB >> 1;
+        /*
+         * For every row wise process, the pIn2 pointer is set
+         * to the starting address of the transposed pSrcB data
+         */
+        pInB = pSrcBT;
+        pInB2 = pInB + numRowsB;
+        j = 0;
+
+        /*
+         * column loop
+         */
+        while (col > 0u)
+        {
+            q7_t const     *pSrcAVec, *pSrcBVec, *pSrcA2Vec, *pSrcB2Vec;
+            q7x16_t        vecA, vecA2, vecB, vecB2;
+            q31_t           acc0, acc1, acc2, acc3;
+
+            /*
+             * Initiate the pointer pIn1 to point to the starting address of the column being processed
+             */
+            pInA = pSrcA->pData + i;
+            pInA2 = pInA + numColsA;
+            pInB = pSrcBT + j;
+            pInB2 = pInB + numRowsB;
+
+            pSrcAVec = (q7_t const *) pInA;
+            pSrcA2Vec = (q7_t const *)pInA2;
+            pSrcBVec = (q7_t const *) pInB;
+            pSrcB2Vec = (q7_t const *)pInB2;
+
+            acc0 = 0L;
+            acc1 = 0L;
+            acc2 = 0L;
+            acc3 = 0L;
+
+            vecA = vld1q(pSrcAVec);  
+            pSrcAVec += 16;
+
+            blkCnt = numColsA >> 4;
+            while (blkCnt > 0U)
+            {
+                vecB = vld1q(pSrcBVec);  
+                pSrcBVec += 16;
+                acc0 = vmladavaq_s8(acc0, vecA, vecB);
+                vecA2 = vld1q(pSrcA2Vec);  
+                pSrcA2Vec += 16;
+                acc1 = vmladavaq_s8(acc1, vecA2, vecB);
+                vecB2 = vld1q(pSrcB2Vec);  
+                pSrcB2Vec += 16;
+                acc2 = vmladavaq_s8(acc2, vecA, vecB2);
+                vecA = vld1q(pSrcAVec);  
+                pSrcAVec += 16;
+                acc3 = vmladavaq_s8(acc3, vecA2, vecB2);
+
+                blkCnt--;
+            }
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = numColsA & 0xF;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp8q(blkCnt);
+                vecB = vld1q(pSrcBVec);
+                acc0 = vmladavaq_p_s8(acc0, vecA, vecB, p0);
+                vecA2 = vld1q(pSrcA2Vec);
+                acc1 = vmladavaq_p_s8(acc1, vecA2, vecB, p0);
+                vecB2 = vld1q(pSrcB2Vec);
+                acc2 = vmladavaq_p_s8(acc2, vecA, vecB2, p0);
+                vecA = vld1q(pSrcAVec);
+                acc3 = vmladavaq_p_s8(acc3, vecA2, vecB2, p0);
+            }
+
+            *px++ = (q7_t) __SSAT(acc0 >> 7, 8);
+            *px++ = (q7_t) __SSAT(acc2 >> 7, 8);
+            *px2++ = (q7_t) __SSAT(acc1 >> 7, 8);
+            *px2++ = (q7_t) __SSAT(acc3 >> 7, 8);
+            j += numRowsB * 2;
+            /*
+             * Decrement the column loop counter
+             */
+            col--;
+
+        }
+
+        i = i + numColsA * 2;
+        px = px2 + (numColsB & 1u);
+        px2 = px + numColsB;
+        /*
+         * Decrement the row loop counter
+         */
+        row--;
+    }
+
+    /*
+     * Compute remaining row and/or column below
+     */
+
+    if (numColsB & 1u)
+    {
+        row = numRowsA & (~0x1);    //avoid redundant computation
+        px = pDst->pData + numColsB - 1;
+        i = 0;
+
+        /*
+         * row loop
+         */
+        while (row > 0)
+        {
+            q7_t const   *pSrcAVec, *pSrcBVec;
+            q7x16_t       vecA, vecB;
+            q63_t           acc0;
+
+            /*
+             * point to last column in matrix B
+             */
+            pInB = pSrcBT + numRowsB * (numColsB - 1);
+            pInA = pSrcA->pData + i;
+
+            pSrcAVec = (q7_t const *) pInA;
+            pSrcBVec = (q7_t const *) pInB;
+
+            acc0 = 0LL;
+            blkCnt = (numColsA) >> 4;
+            while (blkCnt > 0U)
+            {
+                vecA = vld1q(pSrcAVec);  
+                pSrcAVec += 16;
+                vecB = vld1q(pSrcBVec);  
+                pSrcBVec += 16;
+                acc0 = vmladavaq_s8(acc0, vecA, vecB);
+
+                blkCnt--;
+            }
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = numColsA & 0xF;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp8q(blkCnt);
+                vecA = vld1q(pSrcAVec);
+                vecB = vld1q(pSrcBVec);
+                acc0 = vmladavaq_p_s8(acc0, vecA, vecB, p0);
+            }
+
+            *px = (q7_t) __SSAT(acc0 >> 7, 8);
+
+            px += numColsB;
+
+            i += numColsA;
+            /*
+             * Decrement the row loop counter
+             */
+            row--;
+        }
+    }
+
+    if (numRowsA & 1u)
+    {
+        col = numColsB;
+        i = 0u;
+        /*
+         * point to last row in output matrix
+         */
+        px = pDst->pData + (numColsB) * (numRowsA - 1);
+        /*
+         * col loop
+         */
+        while (col > 0)
+        {
+            q7_t const    *pSrcAVec, *pSrcBVec;
+            q7x16_t       vecA, vecB;
+            q63_t           acc0;
+
+            /*
+             * point to last row in matrix A
+             */
+            pInA = pSrcA->pData + (numRowsA - 1) * numColsA;
+            pInB = pSrcBT + i;
+
+            /*
+             * Set the variable sum, that acts as accumulator, to zero
+             */
+            pSrcAVec = (q7_t const *) pInA;
+            pSrcBVec = (q7_t const *) pInB;
+            acc0 = 0LL;
+
+            blkCnt = (numColsA) >> 4;
+            while (blkCnt > 0U)
+            {
+                vecA = vld1q(pSrcAVec); 
+                pSrcAVec += 16;
+                vecB = vld1q(pSrcBVec); 
+                pSrcBVec += 16;
+                acc0 = vmladavaq_s8(acc0, vecA, vecB);
+
+                blkCnt--;
+            }
+            /*
+             * tail
+             * (will be merged thru tail predication)
+             */
+            blkCnt = numColsA & 0xF;
+            if (blkCnt > 0U)
+            {
+                mve_pred16_t p0 = vctp8q(blkCnt);
+                vecA = vld1q(pSrcAVec);
+                vecB = vld1q(pSrcBVec);
+                acc0 = vmladavaq_p_s8(acc0, vecA, vecB, p0);
+            }
+
+            *px++ = (q7_t) __SSAT(acc0 >> 7, 8);
+
+            i += numColsA;
+
+            /*
+             * Decrement the col loop counter
+             */
+            col--;
+        }
+    }
+    /*
+     * Return to application
+     */
+     status = ARM_MATH_SUCCESS;
+    }
+    return(status);
+}
+#else
+arm_status arm_mat_mult_q7(const arm_matrix_instance_q7 *pSrcA, const arm_matrix_instance_q7 *pSrcB, arm_matrix_instance_q7 *pDst, q7_t *pState)
+{
+    q31_t sum; /* accumulator */
+    q7_t *pIn1 = pSrcA->pData;                    /* input data matrix pointer A */
+    q7_t *pIn2 = pSrcB->pData;                    /* input data matrix pointer B */
+    q7_t *pInA = pSrcA->pData;                    /* input data matrix pointer A of Q7 type */
+    q7_t *pInB = pSrcB->pData;                    /* input data matrix pointer B of Q7 type */
+    q7_t *pOut = pDst->pData;                     /* output data matrix pointer */
+    q7_t *px;                                     /* Temporary output data matrix pointer */
+    uint16_t numColsB = pSrcB->numCols;           /* number of columns of input matrix B */
+    uint16_t numColsA = pSrcA->numCols;           /* number of columns of input matrix A */
+    uint16_t numRowsA = pSrcA->numRows;           /* number of rows of input matrix A    */
+    uint16_t col, i = 0U, row = numRowsA, colCnt; /* loop counters */
+    arm_status status;                            /* status of matrix multiplication */
+
+    (void)pState;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numCols != pSrcB->numRows) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcB->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+    {
+        /* The following loop performs the dot-product of each row in pSrcA with each column in pSrcB */
+        /* row loop */
+        do {
+            /* Output pointer is set to starting address of the row being processed */
+            px = pOut + i;
+
+            /* For every row wise process, the column loop counter is to be initiated */
+            col = numColsB;
+
+            /* For every row wise process, the pIn2 pointer is set
+             ** to the starting address of the pSrcB data */
+            pIn2 = pSrcB->pData;
+
+            /* column loop */
+            do {
+                /* Set the variable sum, that acts as accumulator, to zero */
+                sum = 0;
+
+                /* Initiate the pointer pIn1 to point to the starting address of pSrcA */
+                pIn1 = pInA;
+
+                /* Matrix A columns number of MAC operations are to be performed */
+                colCnt = numColsA;
+
+                /* matrix multiplication */
+                while (colCnt > 0U) {
+                    /* c(m,n) = a(1,1)*b(1,1) + a(1,2) * b(2,1) + .... + a(m,p)*b(p,n) */
+                    /* Perform the multiply-accumulates */
+                    sum += (q31_t)*pIn1++ * *pIn2;
+                    pIn2 += numColsB;
+
+                    /* Decrement the loop counter */
+                    colCnt--;
+                }
+
+                /* Convert the result from 34.30 to 1.15 format and store the saturated value in destination buffer */
+                /* Saturate and store the result in the destination buffer */
+                *px++ = (q7_t)__SSAT((sum >> 7), 8);
+
+                /* Decrement the column loop counter */
+                col--;
+
+                /* Update the pointer pIn2 to point to the  starting address of the next column */
+                pIn2 = pInB + (numColsB - col);
+
+            } while (col > 0U);
+
+            /* Update the pointer pSrcA to point to the  starting address of the next row */
+            i = i + numColsB;
+            pInA = pInA + numColsA;
+
+            /* Decrement the row loop counter */
+            row--;
+
+        } while (row > 0U);
+
+        /* set status as ARM_MATH_SUCCESS */
+        status = ARM_MATH_SUCCESS;
+    }
+
+    /* Return to application */
+    return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f16.c
new file mode 100755
index 00000000..fc2193d6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f16.c
@@ -0,0 +1,208 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_scale_f16.c
+ * Description:  Multiplies a floating-point matrix by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixScale
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix scaling.
+  @param[in]     pSrc       points to input matrix
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_scale_f16(
+  const arm_matrix_instance_f16 * pSrc,
+  float16_t scale,
+  arm_matrix_instance_f16 * pDst)
+{
+  arm_status status;                             /* status of matrix scaling     */
+  #ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    float16_t *pIn = pSrc->pData;   /* input data matrix pointer */
+    float16_t *pOut = pDst->pData;  /* output data matrix pointer */
+    uint32_t  numSamples;           /* total number of elements in the matrix */
+    uint32_t  blkCnt;               /* loop counters */
+    f16x8_t vecIn, vecOut, vecScale;
+    float16_t const *pInVec;
+
+    pInVec = (float16_t const *) pIn;
+
+    vecScale = vdupq_n_f16(scale);
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+    blkCnt = numSamples >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C(m,n) = A(m,n) * scale
+         * Scaling and results are stored in the destination buffer.
+         */
+        vecIn = vld1q(pInVec); 
+        pInVec += 8;
+
+        vecOut = vmulq_f16(vecIn, vecScale);
+
+        vst1q(pOut, vecOut); 
+        pOut += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecIn = vld1q(pInVec); 
+        vecOut = vecIn * scale;
+
+        vstrhq_p(pOut, vecOut, p0);
+    }
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+}
+#else
+
+arm_status arm_mat_scale_f16(
+  const arm_matrix_instance_f16 * pSrc,
+        float16_t                 scale,
+        arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pIn = pSrc->pData;                  /* Input data matrix pointer */
+  float16_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  uint32_t numSamples;                           /* Total number of elements in the matrix */
+  uint32_t blkCnt;                               /* Loop counters */
+  arm_status status;                             /* Status of matrix scaling */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (_Float16)(*pIn++) * (_Float16)scale;
+      *pOut++ = (_Float16)(*pIn++) * (_Float16)scale;
+      *pOut++ = (_Float16)(*pIn++) * (_Float16)scale;
+      *pOut++ = (_Float16)(*pIn++) * (_Float16)scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (_Float16)(*pIn++) * (_Float16)scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixScale group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
index 91c56b10..daebbb34 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_f32.c
@@ -1,221 +1,287 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_scale_f32.c
- * Description:  Multiplies a floating-point matrix by a scalar
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup MatrixScale Matrix Scale
-
-  Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the
-  matrix by the scalar.  For example:
-  \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
-
-  The function checks to make sure that the input and output matrices are of the same size.
-
-  In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by
-  a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
-  The shift allows the gain of the scaling operation to exceed 1.0.
-  The overall scale factor applied to the fixed-point data is
-  <pre>
-      scale = scaleFract * 2^shift.
-  </pre>
- */
-
-/**
-  @addtogroup MatrixScale
-  @{
- */
-
-/**
-  @brief         Floating-point matrix scaling.
-  @param[in]     pSrc       points to input matrix
-  @param[in]     scale      scale factor to be applied
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
- */
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  float32_t scale,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix scaling     */
-
-
-  float32_t in1, in2, in3, in4;                  /* temporary variables */
-  float32_t out1, out2, out3, out4;              /* temporary variables */
-
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    float32x4_t vec1;
-    float32x4_t res;
-
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-    blkCnt = numSamples >> 2;
-
-    /* Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* Scaling and results are stored in the destination buffer. */
-      vec1 = vld1q_f32(pIn);
-      res = vmulq_f32(vec1, vdupq_n_f32(scale));
-      vst1q_f32(pOut, res);
-
-      /* update pointers to process next sampels */
-      pIn += 4U;
-      pOut += 4U;
-
-      /* Decrement the numSamples loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * scale */
-      /* The results are stored in the destination buffer. */
-      *pOut++ = (*pIn++) * scale;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#else
-arm_status arm_mat_scale_f32(
-  const arm_matrix_instance_f32 * pSrc,
-        float32_t                 scale,
-        arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* Input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
-  uint32_t numSamples;                           /* Total number of elements in the matrix */
-  uint32_t blkCnt;                               /* Loop counters */
-  arm_status status;                             /* Status of matrix scaling */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numRows) ||
-      (pSrc->numCols != pDst->numCols)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * scale */
-
-      /* Scale and store result in destination buffer. */
-      *pOut++ = (*pIn++) * scale;
-      *pOut++ = (*pIn++) * scale;
-      *pOut++ = (*pIn++) * scale;
-      *pOut++ = (*pIn++) * scale;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * scale */
-
-      /* Scale and store result in destination buffer. */
-      *pOut++ = (*pIn++) * scale;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of MatrixScale group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_scale_f32.c
+ * Description:  Multiplies a floating-point matrix by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixScale Matrix Scale
+
+  Multiplies a matrix by a scalar.  This is accomplished by multiplying each element in the
+  matrix by the scalar.  For example:
+  \image html MatrixScale.gif "Matrix Scaling of a 3 x 3 matrix"
+
+  The function checks to make sure that the input and output matrices are of the same size.
+
+  In the fixed-point Q15 and Q31 functions, <code>scale</code> is represented by
+  a fractional multiplication <code>scaleFract</code> and an arithmetic shift <code>shift</code>.
+  The shift allows the gain of the scaling operation to exceed 1.0.
+  The overall scale factor applied to the fixed-point data is
+  <pre>
+      scale = scaleFract * 2^shift.
+  </pre>
+ */
+
+/**
+  @addtogroup MatrixScale
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix scaling.
+  @param[in]     pSrc       points to input matrix
+  @param[in]     scale      scale factor to be applied
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  float32_t scale,
+  arm_matrix_instance_f32 * pDst)
+{
+  arm_status status;                             /* status of matrix scaling     */
+  #ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    float32_t *pIn = pSrc->pData;   /* input data matrix pointer */
+    float32_t *pOut = pDst->pData;  /* output data matrix pointer */
+    uint32_t  numSamples;           /* total number of elements in the matrix */
+    uint32_t  blkCnt;               /* loop counters */
+    f32x4_t vecIn, vecOut;
+    float32_t const *pInVec;
+
+    pInVec = (float32_t const *) pIn;
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+    blkCnt = numSamples >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C(m,n) = A(m,n) * scale
+         * Scaling and results are stored in the destination buffer.
+         */
+        vecIn = vld1q(pInVec); 
+        pInVec += 4;
+
+        vecOut = vecIn * scale;
+
+        vst1q(pOut, vecOut); 
+        pOut += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecIn = vld1q(pInVec); 
+        vecOut = vecIn * scale;
+
+        vstrwq_p(pOut, vecOut, p0);
+    }
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+
+}
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  float32_t scale,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix scaling     */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) || (pSrc->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    float32x4_t vec1;
+    float32x4_t res;
+
+    /* Total number of samples in the input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+    blkCnt = numSamples >> 2;
+
+    /* Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+      /* Scaling and results are stored in the destination buffer. */
+      vec1 = vld1q_f32(pIn);
+      res = vmulq_f32(vec1, vdupq_n_f32(scale));
+      vst1q_f32(pOut, res);
+
+      /* update pointers to process next sampels */
+      pIn += 4U;
+      pOut += 4U;
+
+      /* Decrement the numSamples loop counter */
+      blkCnt--;
+    }
+
+    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = numSamples % 0x4U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+      /* The results are stored in the destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_scale_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        float32_t                 scale,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* Input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* Output data matrix pointer */
+  uint32_t numSamples;                           /* Total number of elements in the matrix */
+  uint32_t blkCnt;                               /* Loop counters */
+  arm_status status;                             /* Status of matrix scaling */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * scale */
+
+      /* Scale and store result in destination buffer. */
+      *pOut++ = (*pIn++) * scale;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
index 79566702..8292880f 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q15.c
@@ -1,170 +1,249 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_scale_q15.c
- * Description:  Multiplies a Q15 matrix by a scalar
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixScale
-  @{
- */
-
-/**
-  @brief         Q15 matrix scaling.
-  @param[in]     pSrc        points to input matrix
-  @param[in]     scaleFract  fractional portion of the scale factor
-  @param[in]     shift       number of bits to shift the result by
-  @param[out]    pDst        points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
-                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
- */
-
-arm_status arm_mat_scale_q15(
-  const arm_matrix_instance_q15 * pSrc,
-        q15_t                     scaleFract,
-        int32_t                   shift,
-        arm_matrix_instance_q15 * pDst)
-{
-        q15_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
-        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
-        uint32_t numSamples;                           /* Total number of elements in the matrix */
-        uint32_t blkCnt;                               /* Loop counter */
-        arm_status status;                             /* Status of matrix scaling */
-        int32_t kShift = 15 - shift;                   /* Total shift to apply after scaling */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t inA1, inA2;
-        q31_t out1, out2, out3, out4;                  /* Temporary output variables */
-        q15_t in1, in2, in3, in4;                      /* Temporary input variables */
-#endif
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numRows) ||
-      (pSrc->numCols != pDst->numCols)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * k */
-
-#if defined (ARM_MATH_DSP)
-      /* read 2 times 2 samples at a time from source */
-      inA1 = read_q15x2_ia ((q15_t **) &pIn);
-      inA2 = read_q15x2_ia ((q15_t **) &pIn);
-
-      /* Scale inputs and store result in temporary variables
-       * in single cycle by packing the outputs */
-      out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
-      out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
-      out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
-      out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
-
-      /* apply shifting */
-      out1 = out1 >> kShift;
-      out2 = out2 >> kShift;
-      out3 = out3 >> kShift;
-      out4 = out4 >> kShift;
-
-      /* saturate the output */
-      in1 = (q15_t) (__SSAT(out1, 16));
-      in2 = (q15_t) (__SSAT(out2, 16));
-      in3 = (q15_t) (__SSAT(out3, 16));
-      in4 = (q15_t) (__SSAT(out4, 16));
-
-      /* store result to destination */
-      write_q15x2_ia (&pOut, __PKHBT(in2, in1, 16));
-      write_q15x2_ia (&pOut, __PKHBT(in4, in3, 16));
-
-#else
-      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
-      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
-      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
-      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * k */
-
-      /* Scale, saturate and store result in destination buffer. */
-      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixScale group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_scale_q15.c
+ * Description:  Multiplies a Q15 matrix by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixScale
+  @{
+ */
+
+/**
+  @brief         Q15 matrix scaling.
+  @param[in]     pSrc        points to input matrix
+  @param[in]     scaleFract  fractional portion of the scale factor
+  @param[in]     shift       number of bits to shift the result by
+  @param[out]    pDst        points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.15 format.
+                   These are multiplied to yield a 2.30 intermediate result and this is shifted with saturation to 1.15 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_scale_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        q15_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q15 * pDst)
+{
+  arm_status status;                             /* Status of matrix scaling */
+  q15_t *pIn = pSrc->pData;       /* input data matrix pointer */
+  q15_t *pOut = pDst->pData;      /* output data matrix pointer */
+  uint32_t  numSamples;           /* total number of elements in the matrix */
+  uint32_t  blkCnt;               /* loop counters */
+  q15x8_t vecIn, vecOut;
+  q15_t const *pInVec;
+  int32_t totShift = shift + 1;   /* shift to apply after scaling */
+  
+  pInVec = (q15_t const *) pIn;
+
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+    blkCnt = numSamples >> 3;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C(m,n) = A(m,n) * scale
+         * Scaling and results are stored in the destination buffer.
+         */
+        vecIn = vld1q(pInVec); pInVec += 8;
+
+        /* multiply input with scaler value */
+        vecOut = vmulhq(vecIn, vdupq_n_s16(scaleFract));
+         /* apply shifting */
+        vecOut = vqshlq_r(vecOut, totShift);
+
+        vst1q(pOut, vecOut); pOut += 8;
+
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = numSamples & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecIn = vld1q(pInVec); pInVec += 8;
+        vecOut = vmulhq(vecIn, vdupq_n_s16(scaleFract));
+        vecOut = vqshlq_r(vecOut, totShift);
+        vstrhq_p(pOut, vecOut, p0);
+    }
+     /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_scale_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        q15_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
+        q15_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+        uint32_t numSamples;                           /* Total number of elements in the matrix */
+        uint32_t blkCnt;                               /* Loop counter */
+        arm_status status;                             /* Status of matrix scaling */
+        int32_t kShift = 15 - shift;                   /* Total shift to apply after scaling */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t inA1, inA2;
+        q31_t out1, out2, out3, out4;                  /* Temporary output variables */
+        q15_t in1, in2, in3, in4;                      /* Temporary input variables */
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+#if defined (ARM_MATH_DSP)
+      /* read 2 times 2 samples at a time from source */
+      inA1 = read_q15x2_ia ((q15_t **) &pIn);
+      inA2 = read_q15x2_ia ((q15_t **) &pIn);
+
+      /* Scale inputs and store result in temporary variables
+       * in single cycle by packing the outputs */
+      out1 = (q31_t) ((q15_t) (inA1 >> 16) * scaleFract);
+      out2 = (q31_t) ((q15_t) (inA1      ) * scaleFract);
+      out3 = (q31_t) ((q15_t) (inA2 >> 16) * scaleFract);
+      out4 = (q31_t) ((q15_t) (inA2      ) * scaleFract);
+
+      /* apply shifting */
+      out1 = out1 >> kShift;
+      out2 = out2 >> kShift;
+      out3 = out3 >> kShift;
+      out4 = out4 >> kShift;
+
+      /* saturate the output */
+      in1 = (q15_t) (__SSAT(out1, 16));
+      in2 = (q15_t) (__SSAT(out2, 16));
+      in3 = (q15_t) (__SSAT(out3, 16));
+      in4 = (q15_t) (__SSAT(out4, 16));
+
+      /* store result to destination */
+      write_q15x2_ia (&pOut, __PKHBT(in2, in1, 16));
+      write_q15x2_ia (&pOut, __PKHBT(in4, in3, 16));
+
+#else
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+      /* Scale, saturate and store result in destination buffer. */
+      *pOut++ = (q15_t) (__SSAT(((q31_t) (*pIn++) * scaleFract) >> kShift, 16));
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
index 7f2fe8b0..33c08680 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_scale_q31.c
@@ -1,164 +1,242 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_scale_q31.c
- * Description:  Multiplies a Q31 matrix by a scalar
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixScale
-  @{
- */
-
-/**
-  @brief         Q31 matrix scaling.
-  @param[in]     pSrc        points to input matrix
-  @param[in]     scaleFract  fractional portion of the scale factor
-  @param[in]     shift       number of bits to shift the result by
-  @param[out]    pDst        points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
-                   These are multiplied to yield a 2.62 intermediate result which is shifted with saturation to 1.31 format.
- */
-
-arm_status arm_mat_scale_q31(
-  const arm_matrix_instance_q31 * pSrc,
-        q31_t                     scaleFract,
-        int32_t                   shift,
-        arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
-  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
-  uint32_t numSamples;                           /* Total number of elements in the matrix */
-  uint32_t blkCnt;                               /* Loop counter */
-  arm_status status;                             /* Status of matrix scaling */
-  int32_t kShift = shift + 1;                    /* Shift to apply after scaling */
-  q31_t in, out;                                 /* Temporary variabels */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numRows) ||
-      (pSrc->numCols != pDst->numCols)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * k */
-
-      /* Scale, saturate and store result in destination buffer. */
-      in = *pIn++;                                 /* read four inputs from source */
-      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
-      out = in << kShift;                          /* apply shifting */
-      if (in != (out >> kShift))                   /* saturate the results. */
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pOut++ = out;                               /* Store result destination */
-
-      in = *pIn++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pOut++ = out;
-
-      in = *pIn++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pOut++ = out;
-
-      in = *pIn++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pOut++ = out;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) * k */
-
-      /* Scale, saturate and store result in destination buffer. */
-      in = *pIn++;
-      in = ((q63_t) in * scaleFract) >> 32;
-      out = in << kShift;
-      if (in != (out >> kShift))
-        out = 0x7FFFFFFF ^ (in >> 31);
-      *pOut++ = out;
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixScale group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_scale_q31.c
+ * Description:  Multiplies a Q31 matrix by a scalar
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixScale
+  @{
+ */
+
+/**
+  @brief         Q31 matrix scaling.
+  @param[in]     pSrc        points to input matrix
+  @param[in]     scaleFract  fractional portion of the scale factor
+  @param[in]     shift       number of bits to shift the result by
+  @param[out]    pDst        points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The input data <code>*pSrc</code> and <code>scaleFract</code> are in 1.31 format.
+                   These are multiplied to yield a 2.62 intermediate result which is shifted with saturation to 1.31 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_scale_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        q31_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q31 * pDst)
+{
+    q31_t *pIn = pSrc->pData;       /* input data matrix pointer */
+    q31_t *pOut = pDst->pData;      /* output data matrix pointer */
+    uint32_t  numSamples;           /* total number of elements in the matrix */
+    uint32_t  blkCnt;               /* loop counters */
+    q31x4_t vecIn, vecOut;
+    q31_t const *pInVec;
+    int32_t totShift = shift + 1;   /* shift to apply after scaling */
+    arm_status status;                             /* Status of matrix scaling */
+
+    pInVec = (q31_t const *) pIn;
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+  {
+
+     /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+    blkCnt = numSamples >> 2;
+    while (blkCnt > 0U)
+    {
+        /*
+         * C(m,n) = A(m,n) * scale
+         * Scaling and results are stored in the destination buffer.
+         */
+        vecIn = vld1q(pInVec); 
+        pInVec += 4;
+        /* multiply input with scaler value */
+        vecOut = vmulhq(vecIn, vdupq_n_s32(scaleFract));
+        /* apply shifting */
+        vecOut = vqshlq_r(vecOut, totShift);
+
+        vst1q(pOut, vecOut); 
+        pOut += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecIn = vld1q(pInVec); 
+        pInVec += 4;
+        vecOut = vmulhq(vecIn, vdupq_n_s32(scaleFract));
+        vecOut = vqshlq_r(vecOut, totShift);
+        vstrwq_p(pOut, vecOut, p0);
+    }
+     /* Set status as ARM_MATH_SUCCESS */
+     status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_scale_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        q31_t                     scaleFract,
+        int32_t                   shift,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn = pSrc->pData;                      /* Input data matrix pointer */
+  q31_t *pOut = pDst->pData;                     /* Output data matrix pointer */
+  uint32_t numSamples;                           /* Total number of elements in the matrix */
+  uint32_t blkCnt;                               /* Loop counter */
+  arm_status status;                             /* Status of matrix scaling */
+  int32_t kShift = shift + 1;                    /* Shift to apply after scaling */
+  q31_t in, out;                                 /* Temporary variabels */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numRows) ||
+      (pSrc->numCols != pDst->numCols)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrc->numRows * pSrc->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+      /* Scale, saturate and store result in destination buffer. */
+      in = *pIn++;                                 /* read four inputs from source */
+      in = ((q63_t) in * scaleFract) >> 32;        /* multiply input with scaler value */
+      out = in << kShift;                          /* apply shifting */
+      if (in != (out >> kShift))                   /* saturate the results. */
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;                               /* Store result destination */
+
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) * k */
+
+      /* Scale, saturate and store result in destination buffer. */
+      in = *pIn++;
+      in = ((q63_t) in * scaleFract) >> 32;
+      out = in << kShift;
+      if (in != (out >> kShift))
+        out = 0x7FFFFFFF ^ (in >> 31);
+      *pOut++ = out;
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixScale group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f16.c
new file mode 100755
index 00000000..8dafc143
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f16.c
@@ -0,0 +1,234 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_solve_lower_triangular_f16.c
+ * Description:  Solve linear system LT X = A with LT lower triangular matrix
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+
+   /**
+   * @brief Solve LT . X = A where LT is a lower triangular matrix
+   * @param[in]  lt  The lower triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of LT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+   */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+  arm_status arm_mat_solve_lower_triangular_f16(
+  const arm_matrix_instance_f16 * lt,
+  const arm_matrix_instance_f16 * a,
+  arm_matrix_instance_f16 * dst)
+  {
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((lt->numRows != lt->numCols) ||
+      (lt->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* a1 b1 c1   x1 = a1
+          b2 c2   x2   a2
+             c3   x3   a3
+
+    x3 = a3 / c3 
+    x2 = (a2 - c2 x3) / b2
+
+    */
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float16_t *pX = dst->pData;
+    float16_t *pLT = lt->pData;
+    float16_t *pA = a->pData;
+
+    float16_t *lt_row;
+    float16_t *a_col;
+
+    _Float16 invLT;
+
+    f16x8_t vecA;
+    f16x8_t vecX;
+
+    for(i=0; i < n ; i++)
+    {
+
+      for(j=0; j+7 < cols; j += 8)
+      {
+            vecA = vld1q_f16(&pA[i * cols + j]);
+
+            for(k=0; k < i; k++)
+            {
+                vecX = vld1q_f16(&pX[cols*k+j]);
+                vecA = vfmsq(vecA,vdupq_n_f16(pLT[n*i + k]),vecX);
+            }
+
+            if ((_Float16)pLT[n*i + i]==0.0f16)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+
+            invLT = 1.0f16 / (_Float16)pLT[n*i + i];
+            vecA = vmulq(vecA,vdupq_n_f16(invLT));
+            vst1q(&pX[i*cols+j],vecA);
+
+       }
+
+       for(; j < cols; j ++)
+       {
+            a_col = &pA[j];
+            lt_row = &pLT[n*i];
+
+            _Float16 tmp=a_col[i * cols];
+            
+            for(k=0; k < i; k++)
+            {
+                tmp -= (_Float16)lt_row[k] * (_Float16)pX[cols*k+j];
+            }
+
+            if ((_Float16)lt_row[i]==0.0f16)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / (_Float16)lt_row[i];
+            pX[i*cols+j] = tmp;
+        }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+  arm_status arm_mat_solve_lower_triangular_f16(
+  const arm_matrix_instance_f16 * lt,
+  const arm_matrix_instance_f16 * a,
+  arm_matrix_instance_f16 * dst)
+  {
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((lt->numRows != lt->numCols) ||
+      (lt->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* a1 b1 c1   x1 = a1
+          b2 c2   x2   a2
+             c3   x3   a3
+
+    x3 = a3 / c3 
+    x2 = (a2 - c2 x3) / b2
+
+    */
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float16_t *pX = dst->pData;
+    float16_t *pLT = lt->pData;
+    float16_t *pA = a->pData;
+
+    float16_t *lt_row;
+    float16_t *a_col;
+
+    for(j=0; j < cols; j ++)
+    {
+       a_col = &pA[j];
+
+       for(i=0; i < n ; i++)
+       {
+            lt_row = &pLT[n*i];
+
+            float16_t tmp=a_col[i * cols];
+            
+            for(k=0; k < i; k++)
+            {
+                tmp -= (_Float16)lt_row[k] * (_Float16)pX[cols*k+j];
+            }
+
+            if ((_Float16)lt_row[i]==0.0f16)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = (_Float16)tmp / (_Float16)lt_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixInv group
+ */
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f32.c
new file mode 100755
index 00000000..c7cdecc3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f32.c
@@ -0,0 +1,333 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_solve_lower_triangular_f32.c
+ * Description:  Solve linear system LT X = A with LT lower triangular matrix
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+
+   /**
+   * @brief Solve LT . X = A where LT is a lower triangular matrix
+   * @param[in]  lt  The lower triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of LT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+   */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+  arm_status arm_mat_solve_lower_triangular_f32(
+  const arm_matrix_instance_f32 * lt,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst)
+  {
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((lt->numRows != lt->numCols) ||
+      (lt->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* a1 b1 c1   x1 = a1
+          b2 c2   x2   a2
+             c3   x3   a3
+
+    x3 = a3 / c3 
+    x2 = (a2 - c2 x3) / b2
+
+    */
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float32_t *pX = dst->pData;
+    float32_t *pLT = lt->pData;
+    float32_t *pA = a->pData;
+
+    float32_t *lt_row;
+    float32_t *a_col;
+
+    float32_t invLT;
+
+    f32x4_t vecA;
+    f32x4_t vecX;
+
+    for(i=0; i < n ; i++)
+    {
+
+      for(j=0; j+3 < cols; j += 4)
+      {
+            vecA = vld1q_f32(&pA[i * cols + j]);
+
+            for(k=0; k < i; k++)
+            {
+                vecX = vld1q_f32(&pX[cols*k+j]);
+                vecA = vfmsq(vecA,vdupq_n_f32(pLT[n*i + k]),vecX);
+            }
+
+            if (pLT[n*i + i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+
+            invLT = 1.0f / pLT[n*i + i];
+            vecA = vmulq(vecA,vdupq_n_f32(invLT));
+            vst1q(&pX[i*cols+j],vecA);
+
+       }
+
+       for(; j < cols; j ++)
+       {
+            a_col = &pA[j];
+            lt_row = &pLT[n*i];
+
+            float32_t tmp=a_col[i * cols];
+            
+            for(k=0; k < i; k++)
+            {
+                tmp -= lt_row[k] * pX[cols*k+j];
+            }
+
+            if (lt_row[i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / lt_row[i];
+            pX[i*cols+j] = tmp;
+        }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+  arm_status arm_mat_solve_lower_triangular_f32(
+  const arm_matrix_instance_f32 * lt,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst)
+  {
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((lt->numRows != lt->numCols) ||
+      (lt->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* a1 b1 c1   x1 = a1
+          b2 c2   x2   a2
+             c3   x3   a3
+
+    x3 = a3 / c3 
+    x2 = (a2 - c2 x3) / b2
+
+    */
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float32_t *pX = dst->pData;
+    float32_t *pLT = lt->pData;
+    float32_t *pA = a->pData;
+
+    float32_t *lt_row;
+    float32_t *a_col;
+
+    float32_t invLT;
+
+    f32x4_t vecA;
+    f32x4_t vecX;
+
+    for(i=0; i < n ; i++)
+    {
+
+      for(j=0; j+3 < cols; j += 4)
+      {
+            vecA = vld1q_f32(&pA[i * cols + j]);
+
+            for(k=0; k < i; k++)
+            {
+                vecX = vld1q_f32(&pX[cols*k+j]);
+                vecA = vfmsq_f32(vecA,vdupq_n_f32(pLT[n*i + k]),vecX);
+            }
+
+            if (pLT[n*i + i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+
+            invLT = 1.0f / pLT[n*i + i];
+            vecA = vmulq_f32(vecA,vdupq_n_f32(invLT));
+            vst1q_f32(&pX[i*cols+j],vecA);
+
+       }
+
+       for(; j < cols; j ++)
+       {
+            a_col = &pA[j];
+            lt_row = &pLT[n*i];
+
+            float32_t tmp=a_col[i * cols];
+            
+            for(k=0; k < i; k++)
+            {
+                tmp -= lt_row[k] * pX[cols*k+j];
+            }
+
+            if (lt_row[i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / lt_row[i];
+            pX[i*cols+j] = tmp;
+        }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+  arm_status arm_mat_solve_lower_triangular_f32(
+  const arm_matrix_instance_f32 * lt,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst)
+  {
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((lt->numRows != lt->numCols) ||
+      (lt->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* a1 b1 c1   x1 = a1
+          b2 c2   x2   a2
+             c3   x3   a3
+
+    x3 = a3 / c3 
+    x2 = (a2 - c2 x3) / b2
+
+    */
+    int i,j,k,n,cols;
+
+    float32_t *pX = dst->pData;
+    float32_t *pLT = lt->pData;
+    float32_t *pA = a->pData;
+
+    float32_t *lt_row;
+    float32_t *a_col;
+
+    n = dst->numRows;
+    cols = dst -> numCols;
+
+
+    for(j=0; j < cols; j ++)
+    {
+       a_col = &pA[j];
+
+       for(i=0; i < n ; i++)
+       {
+            float32_t tmp=a_col[i * cols];
+
+            lt_row = &pLT[n*i];
+            
+            for(k=0; k < i; k++)
+            {
+                tmp -= lt_row[k] * pX[cols*k+j];
+            }
+
+            if (lt_row[i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / lt_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f64.c
new file mode 100755
index 00000000..d54ff679
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_lower_triangular_f64.c
@@ -0,0 +1,124 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_solve_lower_triangular_f64.c
+ * Description:  Solve linear system LT X = A with LT lower triangular matrix
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+
+   /**
+   * @brief Solve LT . X = A where LT is a lower triangular matrix
+   * @param[in]  lt  The lower triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of LT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+   */
+  arm_status arm_mat_solve_lower_triangular_f64(
+  const arm_matrix_instance_f64 * lt,
+  const arm_matrix_instance_f64 * a,
+  arm_matrix_instance_f64 * dst)
+  {
+  arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((lt->numRows != lt->numCols) ||
+      (lt->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* a1 b1 c1   x1 = a1
+          b2 c2   x2   a2
+             c3   x3   a3
+
+    x3 = a3 / c3 
+    x2 = (a2 - c2 x3) / b2
+
+    */
+    int i,j,k,n,cols;
+
+    float64_t *pX = dst->pData;
+    float64_t *pLT = lt->pData;
+    float64_t *pA = a->pData;
+
+    float64_t *lt_row;
+    float64_t *a_col;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    for(j=0; j < cols; j ++)
+    {
+       a_col = &pA[j];
+
+       for(i=0; i < n ; i++)
+       {
+            float64_t tmp=a_col[i * cols];
+
+            lt_row = &pLT[n*i];
+
+            for(k=0; k < i; k++)
+            {
+                tmp -= lt_row[k] * pX[cols*k+j];
+            }
+
+            if (lt_row[i]==0.0)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / lt_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  /* Return to application */
+  return (status);
+}
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f16.c
new file mode 100755
index 00000000..332280f0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f16.c
@@ -0,0 +1,226 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_solve_upper_triangular_f16.c
+ * Description:  Solve linear system UT X = A with UT upper triangular matrix
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+   * @brief Solve UT . X = A where UT is an upper triangular matrix
+   * @param[in]  ut  The upper triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of UT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+  */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+  arm_status arm_mat_solve_upper_triangular_f16(
+  const arm_matrix_instance_f16 * ut,
+  const arm_matrix_instance_f16 * a,
+  arm_matrix_instance_f16 * dst)
+  {
+arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((ut->numRows != ut->numCols) ||
+      (ut->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float16_t *pX = dst->pData;
+    float16_t *pUT = ut->pData;
+    float16_t *pA = a->pData;
+
+    float16_t *ut_row;
+    float16_t *a_col;
+
+    _Float16 invUT;
+
+    f16x8_t vecA;
+    f16x8_t vecX;
+    
+    for(i=n-1; i >= 0 ; i--)
+    {
+      for(j=0; j+7 < cols; j +=8)
+      {
+            vecA = vld1q_f16(&pA[i * cols + j]);
+            
+            for(k=n-1; k > i; k--)
+            {
+                vecX = vld1q_f16(&pX[cols*k+j]);          
+                vecA = vfmsq(vecA,vdupq_n_f16(pUT[n*i + k]),vecX);
+            }
+
+            if ((_Float16)pUT[n*i + i]==0.0f16)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+
+            invUT = 1.0f16 / (_Float16)pUT[n*i + i];
+            vecA = vmulq(vecA,vdupq_n_f16(invUT));
+           
+
+            vst1q(&pX[i*cols+j],vecA);
+      }
+
+      for(; j < cols; j ++)
+      {
+            a_col = &pA[j];
+
+            ut_row = &pUT[n*i];
+
+            _Float16 tmp=a_col[i * cols];
+            
+            for(k=n-1; k > i; k--)
+            {
+                tmp -= (_Float16)ut_row[k] * (_Float16)pX[cols*k+j];
+            }
+
+            if ((_Float16)ut_row[i]==0.0f16)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / (_Float16)ut_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#else
+  arm_status arm_mat_solve_upper_triangular_f16(
+  const arm_matrix_instance_f16 * ut,
+  const arm_matrix_instance_f16 * a,
+  arm_matrix_instance_f16 * dst)
+  {
+arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((ut->numRows != ut->numCols) ||
+      (ut->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float16_t *pX = dst->pData;
+    float16_t *pUT = ut->pData;
+    float16_t *pA = a->pData;
+
+    float16_t *ut_row;
+    float16_t *a_col;
+
+    for(j=0; j < cols; j ++)
+    {
+       a_col = &pA[j];
+
+       for(i=n-1; i >= 0 ; i--)
+       {
+            ut_row = &pUT[n*i];
+
+            float16_t tmp=a_col[i * cols];
+            
+            for(k=n-1; k > i; k--)
+            {
+                tmp -= (_Float16)ut_row[k] * (_Float16)pX[cols*k+j];
+            }
+
+            if ((_Float16)ut_row[i]==0.0f16)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = (_Float16)tmp / (_Float16)ut_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixInv group
+ */
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f32.c
new file mode 100755
index 00000000..f58dfbd9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f32.c
@@ -0,0 +1,319 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_solve_upper_triangular_f32.c
+ * Description:  Solve linear system UT X = A with UT upper triangular matrix
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+   * @brief Solve UT . X = A where UT is an upper triangular matrix
+   * @param[in]  ut  The upper triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of UT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+  */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+  arm_status arm_mat_solve_upper_triangular_f32(
+  const arm_matrix_instance_f32 * ut,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst)
+  {
+arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((ut->numRows != ut->numCols) ||
+      (ut->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float32_t *pX = dst->pData;
+    float32_t *pUT = ut->pData;
+    float32_t *pA = a->pData;
+
+    float32_t *ut_row;
+    float32_t *a_col;
+
+    float32_t invUT;
+
+    f32x4_t vecA;
+    f32x4_t vecX;
+    
+    for(i=n-1; i >= 0 ; i--)
+    {
+      for(j=0; j+3 < cols; j +=4)
+      {
+            vecA = vld1q_f32(&pA[i * cols + j]);
+            
+            for(k=n-1; k > i; k--)
+            {
+                vecX = vld1q_f32(&pX[cols*k+j]);          
+                vecA = vfmsq(vecA,vdupq_n_f32(pUT[n*i + k]),vecX);
+            }
+
+            if (pUT[n*i + i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+
+            invUT = 1.0f / pUT[n*i + i];
+            vecA = vmulq(vecA,vdupq_n_f32(invUT));
+           
+
+            vst1q(&pX[i*cols+j],vecA);
+      }
+
+      for(; j < cols; j ++)
+      {
+            a_col = &pA[j];
+
+            ut_row = &pUT[n*i];
+
+            float32_t tmp=a_col[i * cols];
+            
+            for(k=n-1; k > i; k--)
+            {
+                tmp -= ut_row[k] * pX[cols*k+j];
+            }
+
+            if (ut_row[i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / ut_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+  arm_status arm_mat_solve_upper_triangular_f32(
+  const arm_matrix_instance_f32 * ut,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst)
+  {
+arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((ut->numRows != ut->numCols) ||
+      (ut->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    int i,j,k,n,cols;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    float32_t *pX = dst->pData;
+    float32_t *pUT = ut->pData;
+    float32_t *pA = a->pData;
+
+    float32_t *ut_row;
+    float32_t *a_col;
+
+    float32_t invUT;
+
+    f32x4_t vecA;
+    f32x4_t vecX;
+    
+    for(i=n-1; i >= 0 ; i--)
+    {
+      for(j=0; j+3 < cols; j +=4)
+      {
+            vecA = vld1q_f32(&pA[i * cols + j]);
+            
+            for(k=n-1; k > i; k--)
+            {
+                vecX = vld1q_f32(&pX[cols*k+j]);          
+                vecA = vfmsq_f32(vecA,vdupq_n_f32(pUT[n*i + k]),vecX);
+            }
+
+            if (pUT[n*i + i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+
+            invUT = 1.0f / pUT[n*i + i];
+            vecA = vmulq_f32(vecA,vdupq_n_f32(invUT));
+           
+
+            vst1q_f32(&pX[i*cols+j],vecA);
+      }
+
+      for(; j < cols; j ++)
+      {
+            a_col = &pA[j];
+
+            ut_row = &pUT[n*i];
+
+            float32_t tmp=a_col[i * cols];
+            
+            for(k=n-1; k > i; k--)
+            {
+                tmp -= ut_row[k] * pX[cols*k+j];
+            }
+
+            if (ut_row[i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / ut_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+#else
+  arm_status arm_mat_solve_upper_triangular_f32(
+  const arm_matrix_instance_f32 * ut,
+  const arm_matrix_instance_f32 * a,
+  arm_matrix_instance_f32 * dst)
+  {
+arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((ut->numRows != ut->numCols) ||
+      (ut->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    int i,j,k,n,cols;
+
+    float32_t *pX = dst->pData;
+    float32_t *pUT = ut->pData;
+    float32_t *pA = a->pData;
+
+    float32_t *ut_row;
+    float32_t *a_col;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    for(j=0; j < cols; j ++)
+    {
+       a_col = &pA[j];
+
+       for(i=n-1; i >= 0 ; i--)
+       {
+            float32_t tmp=a_col[i * cols];
+
+            ut_row = &pUT[n*i];
+
+            for(k=n-1; k > i; k--)
+            {
+                tmp -= ut_row[k] * pX[cols*k+j];
+            }
+
+            if (ut_row[i]==0.0f)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / ut_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f64.c
new file mode 100755
index 00000000..248273d4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_solve_upper_triangular_f64.c
@@ -0,0 +1,120 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_solve_upper_triangular_f64.c
+ * Description:  Solve linear system UT X = A with UT upper triangular matrix
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixInv
+  @{
+ */
+
+/**
+   * @brief Solve UT . X = A where UT is an upper triangular matrix
+   * @param[in]  ut  The upper triangular matrix
+   * @param[in]  a  The matrix a
+   * @param[out] dst The solution X of UT . X = A
+   * @return The function returns ARM_MATH_SINGULAR, if the system can't be solved.
+  */
+  arm_status arm_mat_solve_upper_triangular_f64(
+  const arm_matrix_instance_f64 * ut,
+  const arm_matrix_instance_f64 * a,
+  arm_matrix_instance_f64 * dst)
+  {
+arm_status status;                             /* status of matrix inverse */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((ut->numRows != ut->numCols) ||
+      (ut->numRows != a->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+
+    int i,j,k,n,cols;
+
+    float64_t *pX = dst->pData;
+    float64_t *pUT = ut->pData;
+    float64_t *pA = a->pData;
+
+    float64_t *ut_row;
+    float64_t *a_col;
+
+    n = dst->numRows;
+    cols = dst->numCols;
+
+    for(j=0; j < cols; j ++)
+    {
+       a_col = &pA[j];
+
+       for(i=n-1; i >= 0 ; i--)
+       {
+            float64_t tmp=a_col[i * cols];
+
+            ut_row = &pUT[n*i];
+
+            for(k=n-1; k > i; k--)
+            {
+                tmp -= ut_row[k] * pX[cols*k+j];
+            }
+
+            if (ut_row[i]==0.0)
+            {
+              return(ARM_MATH_SINGULAR);
+            }
+            tmp = tmp / ut_row[i];
+            pX[i*cols+j] = tmp;
+       }
+
+    }
+    status = ARM_MATH_SUCCESS;
+
+  }
+
+  
+  /* Return to application */
+  return (status);
+}
+
+
+/**
+  @} end of MatrixInv group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f16.c
new file mode 100755
index 00000000..13291b8c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f16.c
@@ -0,0 +1,215 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_f16.c
+ * Description:  Floating-point matrix subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_sub_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+  arm_matrix_instance_f16 * pDst)
+{
+    arm_status status;                             /* status of matrix subtraction */
+    uint32_t  numSamples;       /* total number of elements in the matrix  */
+    float16_t *pDataA, *pDataB, *pDataDst;
+    f16x8_t vecA, vecB, vecDst;
+    float16_t const *pSrcAVec;
+    float16_t const *pSrcBVec;
+    uint32_t  blkCnt;           /* loop counters */
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (float16_t const *) pDataA;
+    pSrcBVec = (float16_t const *) pDataB;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 3;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* sub and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 8;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 8;
+        vecDst = vsubq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  
+        pDataDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = numSamples & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcAVec); 
+        vecB = vld1q(pSrcBVec); 
+        vecDst = vsubq_m(vecDst, vecA, vecB, p0);
+        vstrhq_p(pDataDst, vecDst, p0);
+    }
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+
+arm_status arm_mat_sub_f16(
+  const arm_matrix_instance_f16 * pSrcA,
+  const arm_matrix_instance_f16 * pSrcB,
+        arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float16_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float16_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++);
+      *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++);
+      *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++);
+      *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (_Float16)(*pInA++) - (_Float16)(*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixSub group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
index 4f812a6c..e9a17d1b 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f32.c
@@ -1,226 +1,298 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_sub_f32.c
- * Description:  Floating-point matrix subtraction
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup MatrixSub Matrix Subtraction
-
-  Subtract two matrices.
-  \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
-
-  The functions check to make sure that
-  <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
-  number of rows and columns.
- */
-
-/**
-  @addtogroup MatrixSub
-  @{
- */
-
-/**
-  @brief         Floating-point matrix subtraction.
-  @param[in]     pSrcA      points to the first input matrix structure
-  @param[in]     pSrcB      points to the second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
- */
-
-#if defined(ARM_MATH_NEON)
-arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
-
-
-  float32_t inA1, inA2, inB1, inB2, out1, out2;  /* temporary variables */
-
-
-  uint32_t numSamples;                           /* total number of elements in the matrix  */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-     (pSrcA->numCols != pSrcB->numCols) ||
-     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-  {
-    float32x4_t vec1;
-    float32x4_t vec2;
-    float32x4_t res;
-
-    /* Total number of samples in the input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-    blkCnt = numSamples >> 2U;
-
-    /* Compute 4 outputs at a time.
-     ** a second loop below computes the remaining 1 to 3 samples. */
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      /* Read values from source A */
-      vec1 = vld1q_f32(pIn1);
-      vec2 = vld1q_f32(pIn2);
-      res = vsubq_f32(vec1, vec2);
-      vst1q_f32(pOut, res);
-
-      /* Update pointers to process next samples */
-      pIn1 += 4U;
-      pIn2 += 4U;
-      pOut += 4U;
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
-     ** No loop unrolling is used. */
-    blkCnt = numSamples % 0x4U;
-
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-      /* Subtract and then store the results in the destination buffer. */
-      *pOut++ = (*pIn1++) - (*pIn2++);
-
-      /* Decrement the loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#else
-arm_status arm_mat_sub_f32(
-  const arm_matrix_instance_f32 * pSrcA,
-  const arm_matrix_instance_f32 * pSrcB,
-        arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
-  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-      (pSrcA->numCols != pSrcB->numCols) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcA->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-
-      /* Subtract and store result in destination buffer. */
-      *pOut++ = (*pInA++) - (*pInB++);
-      *pOut++ = (*pInA++) - (*pInB++);
-      *pOut++ = (*pInA++) - (*pInB++);
-      *pOut++ = (*pInA++) - (*pInB++);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-
-      /* Subtract and store result in destination buffer. */
-      *pOut++ = (*pInA++) - (*pInB++);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-/**
-  @} end of MatrixSub group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_f32.c
+ * Description:  Floating-point matrix subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixSub Matrix Subtraction
+
+  Subtract two matrices.
+  \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
+
+  The functions check to make sure that
+  <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
+  number of rows and columns.
+ */
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+    arm_status status;                             /* status of matrix subtraction */
+    uint32_t  numSamples;       /* total number of elements in the matrix  */
+    float32_t *pDataA, *pDataB, *pDataDst;
+    f32x4_t vecA, vecB, vecDst;
+    float32_t const *pSrcAVec;
+    float32_t const *pSrcBVec;
+    uint32_t  blkCnt;           /* loop counters */
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (float32_t const *) pDataA;
+    pSrcBVec = (float32_t const *) pDataB;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 2;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* sub and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 4;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 4;
+        vecDst = vsubq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  
+        pDataDst += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = numSamples & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcAVec); 
+        vecB = vld1q(pSrcBVec); 
+        vecDst = vsubq_m(vecDst, vecA, vecB, p0);
+        vstrwq_p(pDataDst, vecDst, p0);
+    }
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn1 = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pIn2 = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer  */
+
+
+  uint32_t numSamples;                           /* total number of elements in the matrix  */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+     (pSrcA->numCols != pSrcB->numCols) ||
+     (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    float32x4_t vec1;
+    float32x4_t vec2;
+    float32x4_t res;
+
+    /* Total number of samples in the input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+    blkCnt = numSamples >> 2U;
+
+    /* Compute 4 outputs at a time.
+     ** a second loop below computes the remaining 1 to 3 samples. */
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+      /* Subtract and then store the results in the destination buffer. */
+      /* Read values from source A */
+      vec1 = vld1q_f32(pIn1);
+      vec2 = vld1q_f32(pIn2);
+      res = vsubq_f32(vec1, vec2);
+      vst1q_f32(pOut, res);
+
+      /* Update pointers to process next samples */
+      pIn1 += 4U;
+      pIn2 += 4U;
+      pOut += 4U;
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* If the numSamples is not a multiple of 4, compute any remaining output samples here.
+     ** No loop unrolling is used. */
+    blkCnt = numSamples % 0x4U;
+
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+      /* Subtract and then store the results in the destination buffer. */
+      *pOut++ = (*pIn1++) - (*pIn2++);
+
+      /* Decrement the loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_sub_f32(
+  const arm_matrix_instance_f32 * pSrcA,
+  const arm_matrix_instance_f32 * pSrcB,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float32_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of MatrixSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f64.c
new file mode 100755
index 00000000..245a76d0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_f64.c
@@ -0,0 +1,143 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_f64.c
+ * Description:  Floating-point matrix subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixSub Matrix Subtraction
+
+  Subtract two matrices.
+  \image html MatrixSubtraction.gif "Subraction of two 3 x 3 matrices"
+
+  The functions check to make sure that
+  <code>pSrcA</code>, <code>pSrcB</code>, and <code>pDst</code> have the same
+  number of rows and columns.
+ */
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+arm_status arm_mat_sub_f64(
+  const arm_matrix_instance_f64 * pSrcA,
+  const arm_matrix_instance_f64 * pSrcB,
+        arm_matrix_instance_f64 * pDst)
+{
+  float64_t *pInA = pSrcA->pData;                /* input data matrix pointer A */
+  float64_t *pInB = pSrcB->pData;                /* input data matrix pointer B */
+  float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
+
+  uint64_t numSamples;                           /* total number of elements in the matrix */
+  uint64_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint64_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+      *pOut++ = (*pInA++) - (*pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+  @} end of MatrixSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
index 37496ea7..c9f9c830 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q15.c
@@ -1,144 +1,219 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_sub_q15.c
- * Description:  Q15 Matrix subtraction
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixSub
-  @{
- */
-
-/**
-  @brief         Q15 matrix subtraction.
-  @param[in]     pSrcA      points to the first input matrix structure
-  @param[in]     pSrcB      points to the second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
- */
-
-arm_status arm_mat_sub_q15(
-  const arm_matrix_instance_q15 * pSrcA,
-  const arm_matrix_instance_q15 * pSrcB,
-        arm_matrix_instance_q15 * pDst)
-{
-        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-
-        uint32_t numSamples;                           /* total number of elements in the matrix */
-        uint32_t blkCnt;                               /* loop counters  */
-        arm_status status;                             /* status of matrix subtraction  */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-      (pSrcA->numCols != pSrcB->numCols) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcA->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-
-      /* Subtract, Saturate and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
-      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
-#else
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-
-      /* Subtract and store result in destination buffer. */
-#if defined (ARM_MATH_DSP)
-      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
-#else
-      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
-#endif
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixSub group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_q15.c
+ * Description:  Q15 Matrix subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Q15 matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+arm_status arm_mat_sub_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst)
+{
+    uint32_t        numSamples;       /* total number of elements in the matrix  */
+    q15_t          *pDataA, *pDataB, *pDataDst;
+    q15x8_t       vecA, vecB, vecDst;
+    q15_t const   *pSrcAVec;
+    q15_t const   *pSrcBVec;
+    uint32_t        blkCnt;           /* loop counters */
+    arm_status status;                             /* status of matrix subtraction  */
+
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (q15_t const *) pDataA;
+    pSrcBVec = (q15_t const *) pDataB;
+
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+        /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 3;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* sub and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); pSrcAVec += 8;
+        vecB = vld1q(pSrcBVec); pSrcBVec += 8;
+        vecDst = vqsubq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  pDataDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecA = vld1q(pSrcAVec); pSrcAVec += 8;
+        vecB = vld1q(pSrcBVec); pSrcBVec += 8;
+        vecDst = vqsubq_m(vecDst, vecA, vecB, p0);
+        vstrhq_p(pDataDst, vecDst, p0);
+    }
+     status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_sub_q15(
+  const arm_matrix_instance_q15 * pSrcA,
+  const arm_matrix_instance_q15 * pSrcB,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+        q15_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+
+        uint32_t numSamples;                           /* total number of elements in the matrix */
+        uint32_t blkCnt;                               /* loop counters  */
+        arm_status status;                             /* status of matrix subtraction  */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract, Saturate and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+      write_q15x2_ia (&pOut, __QSUB16(read_q15x2_ia ((q15_t **) &pInA), read_q15x2_ia ((q15_t **) &pInB)));
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract and store result in destination buffer. */
+#if defined (ARM_MATH_DSP)
+      *pOut++ = (q15_t) __QSUB16(*pInA++, *pInB++);
+#else
+      *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ - *pInB++), 16);
+#endif
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
index 8a5e6930..5045b298 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_sub_q31.c
@@ -1,139 +1,218 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_sub_q31.c
- * Description:  Q31 matrix subtraction
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixSub
-  @{
- */
-
-/**
-  @brief         Q31 matrix subtraction.
-  @param[in]     pSrcA      points to the first input matrix structure
-  @param[in]     pSrcB      points to the second input matrix structure
-  @param[out]    pDst       points to output matrix structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
- */
-
-arm_status arm_mat_sub_q31(
-  const arm_matrix_instance_q31 * pSrcA,
-  const arm_matrix_instance_q31 * pSrcB,
-        arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
-  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-
-  uint32_t numSamples;                           /* total number of elements in the matrix */
-  uint32_t blkCnt;                               /* loop counters */
-  arm_status status;                             /* status of matrix subtraction */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrcA->numRows != pSrcB->numRows) ||
-      (pSrcA->numCols != pSrcB->numCols) ||
-      (pSrcA->numRows != pDst->numRows)  ||
-      (pSrcA->numCols != pDst->numCols)    )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Total number of samples in input matrix */
-    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-    /* Loop unrolling: Compute 4 outputs at a time */
-    blkCnt = numSamples >> 2U;
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-
-      /* Subtract, saturate and then store the results in the destination buffer. */
-      *pOut++ = __QSUB(*pInA++, *pInB++);
-
-      *pOut++ = __QSUB(*pInA++, *pInB++);
-
-      *pOut++ = __QSUB(*pInA++, *pInB++);
-
-      *pOut++ = __QSUB(*pInA++, *pInB++);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Loop unrolling: Compute remaining outputs */
-    blkCnt = numSamples % 0x4U;
-
-#else
-
-    /* Initialize blkCnt with number of samples */
-    blkCnt = numSamples;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-    while (blkCnt > 0U)
-    {
-      /* C(m,n) = A(m,n) - B(m,n) */
-
-      /* Subtract, saturate and store result in destination buffer. */
-      *pOut++ = __QSUB(*pInA++, *pInB++);
-
-      /* Decrement loop counter */
-      blkCnt--;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixSub group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_sub_q31.c
+ * Description:  Q31 matrix subtraction
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixSub
+  @{
+ */
+
+/**
+  @brief         Q31 matrix subtraction.
+  @param[in]     pSrcA      points to the first input matrix structure
+  @param[in]     pSrcB      points to the second input matrix structure
+  @param[out]    pDst       points to output matrix structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range [0x80000000 0x7FFFFFFF] are saturated.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_sub_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+    uint32_t        numSamples;       /* total number of elements in the matrix  */
+    q31_t          *pDataA, *pDataB, *pDataDst;
+    q31x4_t       vecA, vecB, vecDst;
+    q31_t const   *pSrcAVec;
+    q31_t const   *pSrcBVec;
+    uint32_t        blkCnt;           /* loop counters */
+    arm_status status;                             /* status of matrix subtraction */
+
+    pDataA = pSrcA->pData;
+    pDataB = pSrcB->pData;
+    pDataDst = pDst->pData;
+    pSrcAVec = (q31_t const *) pDataA;
+    pSrcBVec = (q31_t const *) pDataB;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+  {
+
+    /*
+     * Total number of samples in the input matrix
+     */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+    blkCnt = numSamples >> 2;
+    while (blkCnt > 0U)
+    {
+        /* C(m,n) = A(m,n) + B(m,n) */
+        /* sub and then store the results in the destination buffer. */
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 4;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 4;
+        vecDst = vqsubq(vecA, vecB);
+        vst1q(pDataDst, vecDst);  
+        pDataDst += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = numSamples & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+        vecA = vld1q(pSrcAVec); 
+        pSrcAVec += 4;
+        vecB = vld1q(pSrcBVec); 
+        pSrcBVec += 4;
+        vecDst = vqsubq_m(vecDst, vecA, vecB, p0);
+        vstrwq_p(pDataDst, vecDst, p0);
+    }
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+arm_status arm_mat_sub_q31(
+  const arm_matrix_instance_q31 * pSrcA,
+  const arm_matrix_instance_q31 * pSrcB,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pInA = pSrcA->pData;                    /* input data matrix pointer A */
+  q31_t *pInB = pSrcB->pData;                    /* input data matrix pointer B */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+
+  uint32_t numSamples;                           /* total number of elements in the matrix */
+  uint32_t blkCnt;                               /* loop counters */
+  arm_status status;                             /* status of matrix subtraction */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrcA->numRows != pSrcB->numRows) ||
+      (pSrcA->numCols != pSrcB->numCols) ||
+      (pSrcA->numRows != pDst->numRows)  ||
+      (pSrcA->numCols != pDst->numCols)    )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Total number of samples in input matrix */
+    numSamples = (uint32_t) pSrcA->numRows * pSrcA->numCols;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+    /* Loop unrolling: Compute 4 outputs at a time */
+    blkCnt = numSamples >> 2U;
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract, saturate and then store the results in the destination buffer. */
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Loop unrolling: Compute remaining outputs */
+    blkCnt = numSamples % 0x4U;
+
+#else
+
+    /* Initialize blkCnt with number of samples */
+    blkCnt = numSamples;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+    while (blkCnt > 0U)
+    {
+      /* C(m,n) = A(m,n) - B(m,n) */
+
+      /* Subtract, saturate and store result in destination buffer. */
+      *pOut++ = __QSUB(*pInA++, *pInB++);
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixSub group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f16.c
new file mode 100755
index 00000000..8a41ccbc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f16.c
@@ -0,0 +1,202 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_f16.c
+ * Description:  Floating-point matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_trans_f16(
+  const arm_matrix_instance_f16 * pSrc,
+  arm_matrix_instance_f16 * pDst)
+{
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    if (pDst->numRows == pDst->numCols)
+    {
+        if (pDst->numCols == 1)
+        {
+          pDst->pData[0] = pSrc->pData[0];
+          return(ARM_MATH_SUCCESS);
+        }
+        if (pDst->numCols == 2)
+            return arm_mat_trans_16bit_2x2((uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+        if (pDst->numCols == 3)
+            return arm_mat_trans_16bit_3x3_mve((uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+        if (pDst->numCols == 4)
+            return arm_mat_trans_16bit_4x4_mve((uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+    }
+
+    arm_mat_trans_16bit_generic(pSrc->numRows, pSrc->numCols, (uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+      /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+
+arm_status arm_mat_trans_f16(
+  const arm_matrix_instance_f16 * pSrc,
+        arm_matrix_instance_f16 * pDst)
+{
+  float16_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float16_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float16_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer px is set to starting address of column being processed */
+      px = pOut + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixTrans group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
index f0029494..b4116630 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f32.c
@@ -1,284 +1,325 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_trans_f32.c
- * Description:  Floating-point matrix transpose
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2017 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @defgroup MatrixTrans Matrix Transpose
-
-  Tranposes a matrix.
-
-  Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
-  \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
- */
-
-/**
-  @addtogroup MatrixTrans
-  @{
- */
-
-/**
-  @brief         Floating-point matrix transpose.
-  @param[in]     pSrc      points to input matrix
-  @param[out]    pDst      points to output matrix
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
- */
-
-#if defined(ARM_MATH_NEON)
-
-arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-  arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of rows */
-  uint16_t nColumns = pSrc->numCols;             /* number of columns */
-
-  uint16_t blkCnt, rowCnt, i = 0U, row = nRows;          /* loop counters */
-  arm_status status;                             /* status of matrix transpose  */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* Row loop */
-    rowCnt = row >> 2;
-    while (rowCnt > 0U)
-    {
-      float32x4_t row0V,row1V,row2V,row3V;
-      float32x4x2_t ra0,ra1,rb0,rb1;
-
-      blkCnt = nColumns >> 2;
-
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      /* Compute 4 outputs at a time.
-       ** a second loop below computes the remaining 1 to 3 samples. */
-      while (blkCnt > 0U)        /* Column loop */
-      {
-        row0V = vld1q_f32(pIn);
-        row1V = vld1q_f32(pIn + 1 * nColumns);
-        row2V = vld1q_f32(pIn + 2 * nColumns);
-        row3V = vld1q_f32(pIn + 3 * nColumns);
-        pIn += 4;
-
-        ra0 = vzipq_f32(row0V,row2V);
-        ra1 = vzipq_f32(row1V,row3V);
-
-        rb0 = vzipq_f32(ra0.val[0],ra1.val[0]);
-        rb1 = vzipq_f32(ra0.val[1],ra1.val[1]);
-
-        vst1q_f32(px,rb0.val[0]);
-        px += nRows;
-
-        vst1q_f32(px,rb0.val[1]);
-        px += nRows;
-
-        vst1q_f32(px,rb1.val[0]);
-        px += nRows;
-
-        vst1q_f32(px,rb1.val[1]);
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      /* Perform matrix transpose for last 3 samples here. */
-      blkCnt = nColumns % 0x4U;
-
-      while (blkCnt > 0U)
-      {
-        /* Read and store the input element in the destination */
-        *px++ = *pIn;
-        *px++ = *(pIn + 1 * nColumns);
-        *px++ = *(pIn + 2 * nColumns);
-        *px++ = *(pIn + 3 * nColumns);
-        
-        px += (nRows - 4);
-        pIn++;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-
-      i += 4;
-      pIn += 3 * nColumns;
-
-      /* Decrement the row loop counter */
-      rowCnt--;
-
-    }         /* Row loop end  */
-
-    rowCnt = row & 3;
-    while (rowCnt > 0U)
-    {
-      blkCnt = nColumns ;
-      /* The pointer px is set to starting address of the column being processed */
-      px = pOut + i;
-
-      while (blkCnt > 0U)
-      {
-        /* Read and store the input element in the destination */
-        *px = *pIn++;
-
-        /* Update the pointer px to point to the next row of the transposed matrix */
-        px += nRows;
-
-        /* Decrement the column loop counter */
-        blkCnt--;
-      }
-      i++;
-      rowCnt -- ;
-    }
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#else
-arm_status arm_mat_trans_f32(
-  const arm_matrix_instance_f32 * pSrc,
-        arm_matrix_instance_f32 * pDst)
-{
-  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
-  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
-  float32_t *px;                                 /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of rows */
-  uint16_t nCols = pSrc->numCols;                /* number of columns */
-  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) ||
-      (pSrc->numCols != pDst->numRows)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop */
-    do
-    {
-      /* Pointer px is set to starting address of column being processed */
-      px = pOut + i;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      col = nCols >> 2U;
-
-      while (col > 0U)        /* column loop */
-      {
-        /* Read and store input element in destination */
-        *px = *pIn++;
-        /* Update pointer px to point to next row of transposed matrix */
-        px += nRows;
-
-        *px = *pIn++;
-        px += nRows;
-
-        *px = *pIn++;
-        px += nRows;
-
-        *px = *pIn++;
-        px += nRows;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      col = nCols % 0x4U;
-
-#else
-
-      /* Initialize col with number of samples */
-      col = nCols;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (col > 0U)
-      {
-        /* Read and store input element in destination */
-        *px = *pIn++;
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += nRows;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);          /* row loop end */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
- * @} end of MatrixTrans group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_f32.c
+ * Description:  Floating-point matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixTrans Matrix Transpose
+
+  Tranposes a matrix.
+
+  Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
+  \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst)
+{
+  arm_status status;                             /* status of matrix transpose  */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+  {
+    if (pDst->numRows == pDst->numCols)
+    {
+        if (pDst->numCols == 2)
+            return arm_mat_trans_32bit_2x2_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+        if (pDst->numCols == 3)
+            return arm_mat_trans_32bit_3x3_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+        if (pDst->numCols == 4)
+            return arm_mat_trans_32bit_4x4_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+    }
+
+    arm_mat_trans_32bit_generic_mve(pSrc->numRows, pSrc->numCols, (uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+  arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nColumns = pSrc->numCols;             /* number of columns */
+
+  uint16_t blkCnt, rowCnt, i = 0U, row = nRows;          /* loop counters */
+  arm_status status;                             /* status of matrix transpose  */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* Row loop */
+    rowCnt = row >> 2;
+    while (rowCnt > 0U)
+    {
+      float32x4_t row0V,row1V,row2V,row3V;
+      float32x4x2_t ra0,ra1,rb0,rb1;
+
+      blkCnt = nColumns >> 2;
+
+      /* The pointer px is set to starting address of the column being processed */
+      px = pOut + i;
+
+      /* Compute 4 outputs at a time.
+       ** a second loop below computes the remaining 1 to 3 samples. */
+      while (blkCnt > 0U)        /* Column loop */
+      {
+        row0V = vld1q_f32(pIn);
+        row1V = vld1q_f32(pIn + 1 * nColumns);
+        row2V = vld1q_f32(pIn + 2 * nColumns);
+        row3V = vld1q_f32(pIn + 3 * nColumns);
+        pIn += 4;
+
+        ra0 = vzipq_f32(row0V,row2V);
+        ra1 = vzipq_f32(row1V,row3V);
+
+        rb0 = vzipq_f32(ra0.val[0],ra1.val[0]);
+        rb1 = vzipq_f32(ra0.val[1],ra1.val[1]);
+
+        vst1q_f32(px,rb0.val[0]);
+        px += nRows;
+
+        vst1q_f32(px,rb0.val[1]);
+        px += nRows;
+
+        vst1q_f32(px,rb1.val[0]);
+        px += nRows;
+
+        vst1q_f32(px,rb1.val[1]);
+        px += nRows;
+
+        /* Decrement the column loop counter */
+        blkCnt--;
+      }
+
+      /* Perform matrix transpose for last 3 samples here. */
+      blkCnt = nColumns % 0x4U;
+
+      while (blkCnt > 0U)
+      {
+        /* Read and store the input element in the destination */
+        *px++ = *pIn;
+        *px++ = *(pIn + 1 * nColumns);
+        *px++ = *(pIn + 2 * nColumns);
+        *px++ = *(pIn + 3 * nColumns);
+        
+        px += (nRows - 4);
+        pIn++;
+
+        /* Decrement the column loop counter */
+        blkCnt--;
+      }
+
+      i += 4;
+      pIn += 3 * nColumns;
+
+      /* Decrement the row loop counter */
+      rowCnt--;
+
+    }         /* Row loop end  */
+
+    rowCnt = row & 3;
+    while (rowCnt > 0U)
+    {
+      blkCnt = nColumns ;
+      /* The pointer px is set to starting address of the column being processed */
+      px = pOut + i;
+
+      while (blkCnt > 0U)
+      {
+        /* Read and store the input element in the destination */
+        *px = *pIn++;
+
+        /* Update the pointer px to point to the next row of the transposed matrix */
+        px += nRows;
+
+        /* Decrement the column loop counter */
+        blkCnt--;
+      }
+      i++;
+      rowCnt -- ;
+    }
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_trans_f32(
+  const arm_matrix_instance_f32 * pSrc,
+        arm_matrix_instance_f32 * pDst)
+{
+  float32_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float32_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float32_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer px is set to starting address of column being processed */
+      px = pOut + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f64.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f64.c
new file mode 100755
index 00000000..57b5043f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_f64.c
@@ -0,0 +1,155 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_f64.c
+ * Description:  Floating-point matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @defgroup MatrixTrans Matrix Transpose
+
+  Tranposes a matrix.
+
+  Transposing an <code>M x N</code> matrix flips it around the center diagonal and results in an <code>N x M</code> matrix.
+  \image html MatrixTranspose.gif "Transpose of a 3 x 3 matrix"
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Floating-point matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+
+arm_status arm_mat_trans_f64(
+  const arm_matrix_instance_f64 * pSrc,
+        arm_matrix_instance_f64 * pDst)
+{
+  float64_t *pIn = pSrc->pData;                  /* input data matrix pointer */
+  float64_t *pOut = pDst->pData;                 /* output data matrix pointer */
+  float64_t *px;                                 /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint64_t col, row = nRows, i = 0U;             /* Loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer px is set to starting address of column being processed */
+      px = pOut + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+
+/**
+ * @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
index 3774e836..e2c2c932 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q15.c
@@ -1,182 +1,233 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_trans_q15.c
- * Description:  Q15 matrix transpose
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixTrans
-  @{
- */
-
-/**
-  @brief         Q15 matrix transpose.
-  @param[in]     pSrc      points to input matrix
-  @param[out]    pDst      points to output matrix
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
- */
-
-arm_status arm_mat_trans_q15(
-  const arm_matrix_instance_q15 * pSrc,
-        arm_matrix_instance_q15 * pDst)
-{
-        q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
-        uint16_t nRows = pSrc->numRows;                /* number of rows */
-        uint16_t nCols = pSrc->numCols;                /* number of columns */
-        uint32_t col, row = nRows, i = 0U;             /* Loop counters */
-        arm_status status;                             /* status of matrix transpose */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t in;                                      /* variable to hold temporary output  */
-#endif
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) ||
-      (pSrc->numCols != pDst->numRows)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop */
-    do
-    {
-      /* Pointer pOut is set to starting address of column being processed */
-      pOut = pDst->pData + i;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      col = nCols >> 2U;
-
-      while (col > 0U)        /* column loop */
-      {
-        /* Read two elements from row */
-        in = read_q15x2_ia ((q15_t **) &pIn);
-
-        /* Unpack and store one element in  destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *pOut = (q15_t) in;
-#else
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update pointer pOut to point to next row of transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store second element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#else
-        *pOut = (q15_t) in;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update  pointer pOut to point to next row of transposed matrix */
-        pOut += nRows;
-
-        /* Read two elements from row */
-        in = read_q15x2_ia ((q15_t **) &pIn);
-
-        /* Unpack and store one element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *pOut = (q15_t) in;
-#else
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update pointer pOut to point to next row of transposed matrix */
-        pOut += nRows;
-
-        /* Unpack and store second element in destination */
-#ifndef ARM_MATH_BIG_ENDIAN
-        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
-#else
-        *pOut = (q15_t) in;
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* Update pointer pOut to point to next row of transposed matrix */
-        pOut += nRows;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      col = nCols % 0x4U;
-
-#else
-
-      /* Initialize col with number of samples */
-      col = nCols;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (col > 0U)
-      {
-        /* Read and store input element in destination */
-        *pOut = *pIn++;
-
-        /* Update pointer pOut to point to next row of transposed matrix */
-        pOut += nRows;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);          /* row loop end */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixTrans group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_q15.c
+ * Description:  Q15 matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Q15 matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+ 
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+
+arm_status arm_mat_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        arm_matrix_instance_q15 * pDst)
+{
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    if (pDst->numRows == pDst->numCols)
+    {
+        if (pDst->numCols == 1)
+        {
+          pDst->pData[0] = pSrc->pData[0];
+          return(ARM_MATH_SUCCESS);
+        }
+        if (pDst->numCols == 2)
+            return arm_mat_trans_16bit_2x2((uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+        if (pDst->numCols == 3)
+            return arm_mat_trans_16bit_3x3_mve((uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+        if (pDst->numCols == 4)
+            return arm_mat_trans_16bit_4x4_mve((uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+    }
+
+    arm_mat_trans_16bit_generic(pSrc->numRows, pSrc->numCols, (uint16_t  *)pSrc->pData, (uint16_t  *)pDst->pData);
+      /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_trans_q15(
+  const arm_matrix_instance_q15 * pSrc,
+        arm_matrix_instance_q15 * pDst)
+{
+        q15_t *pIn = pSrc->pData;                      /* input data matrix pointer */
+        q15_t *pOut = pDst->pData;                     /* output data matrix pointer */
+        uint16_t nRows = pSrc->numRows;                /* number of rows */
+        uint16_t nCols = pSrc->numCols;                /* number of columns */
+        uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+        arm_status status;                             /* status of matrix transpose */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;                                      /* variable to hold temporary output  */
+#endif
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer pOut is set to starting address of column being processed */
+      pOut = pDst->pData + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pIn);
+
+        /* Unpack and store one element in  destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) in;
+#else
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update  pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Read two elements from row */
+        in = read_q15x2_ia ((q15_t **) &pIn);
+
+        /* Unpack and store one element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) in;
+#else
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Unpack and store second element in destination */
+#ifndef ARM_MATH_BIG_ENDIAN
+        *pOut = (q15_t) ((in & (q31_t) 0xffff0000) >> 16);
+#else
+        *pOut = (q15_t) in;
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *pOut = *pIn++;
+
+        /* Update pointer pOut to point to next row of transposed matrix */
+        pOut += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
index d6efd598..2c772547 100644
--- a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q31.c
@@ -1,146 +1,191 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mat_trans_q31.c
- * Description:  Q31 matrix transpose
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupMatrix
- */
-
-/**
-  @addtogroup MatrixTrans
-  @{
- */
-
-/**
-  @brief         Q31 matrix transpose.
-  @param[in]     pSrc      points to input matrix
-  @param[out]    pDst      points to output matrix
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS       : Operation successful
-                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
- */
-
-arm_status arm_mat_trans_q31(
-  const arm_matrix_instance_q31 * pSrc,
-        arm_matrix_instance_q31 * pDst)
-{
-  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
-  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
-  q31_t *px;                                     /* Temporary output data matrix pointer */
-  uint16_t nRows = pSrc->numRows;                /* number of rows */
-  uint16_t nCols = pSrc->numCols;                /* number of columns */
-  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
-  arm_status status;                             /* status of matrix transpose */
-
-#ifdef ARM_MATH_MATRIX_CHECK
-
-  /* Check for matrix mismatch condition */
-  if ((pSrc->numRows != pDst->numCols) ||
-      (pSrc->numCols != pDst->numRows)   )
-  {
-    /* Set status as ARM_MATH_SIZE_MISMATCH */
-    status = ARM_MATH_SIZE_MISMATCH;
-  }
-  else
-
-#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
-
-  {
-    /* Matrix transpose by exchanging the rows with columns */
-    /* row loop */
-    do
-    {
-      /* Pointer px is set to starting address of column being processed */
-      px = pOut + i;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-      /* Loop unrolling: Compute 4 outputs at a time */
-      col = nCols >> 2U;
-
-      while (col > 0U)        /* column loop */
-      {
-        /* Read and store input element in destination */
-        *px = *pIn++;
-        /* Update pointer px to point to next row of transposed matrix */
-        px += nRows;
-
-        *px = *pIn++;
-        px += nRows;
-
-        *px = *pIn++;
-        px += nRows;
-
-        *px = *pIn++;
-        px += nRows;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      /* Loop unrolling: Compute remaining outputs */
-      col = nCols % 0x4U;
-
-#else
-
-      /* Initialize col with number of samples */
-      col = nCols;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-      while (col > 0U)
-      {
-        /* Read and store input element in destination */
-        *px = *pIn++;
-
-        /* Update pointer px to point to next row of transposed matrix */
-        px += nRows;
-
-        /* Decrement column loop counter */
-        col--;
-      }
-
-      i++;
-
-      /* Decrement row loop counter */
-      row--;
-
-    } while (row > 0U);          /* row loop end */
-
-    /* Set status as ARM_MATH_SUCCESS */
-    status = ARM_MATH_SUCCESS;
-  }
-
-  /* Return to application */
-  return (status);
-}
-
-/**
-  @} end of MatrixTrans group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_q31.c
+ * Description:  Q31 matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Q31 matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+arm_status arm_mat_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        arm_matrix_instance_q31 * pDst)
+{
+  arm_status status;                             /* status of matrix transpose */
+  #ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    if (pDst->numRows == pDst->numCols)
+    {
+        if (pDst->numCols == 2)
+            return arm_mat_trans_32bit_2x2_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+        if (pDst->numCols == 3)
+            return arm_mat_trans_32bit_3x3_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+        if (pDst->numCols == 4)
+            return arm_mat_trans_32bit_4x4_mve((uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+    }
+
+    arm_mat_trans_32bit_generic_mve(pSrc->numRows, pSrc->numCols, (uint32_t *)pSrc->pData, (uint32_t *)pDst->pData);
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#else
+arm_status arm_mat_trans_q31(
+  const arm_matrix_instance_q31 * pSrc,
+        arm_matrix_instance_q31 * pDst)
+{
+  q31_t *pIn = pSrc->pData;                      /* input data matrix pointer */
+  q31_t *pOut = pDst->pData;                     /* output data matrix pointer */
+  q31_t *px;                                     /* Temporary output data matrix pointer */
+  uint16_t nRows = pSrc->numRows;                /* number of rows */
+  uint16_t nCols = pSrc->numCols;                /* number of columns */
+  uint32_t col, row = nRows, i = 0U;             /* Loop counters */
+  arm_status status;                             /* status of matrix transpose */
+
+#ifdef ARM_MATH_MATRIX_CHECK
+
+  /* Check for matrix mismatch condition */
+  if ((pSrc->numRows != pDst->numCols) ||
+      (pSrc->numCols != pDst->numRows)   )
+  {
+    /* Set status as ARM_MATH_SIZE_MISMATCH */
+    status = ARM_MATH_SIZE_MISMATCH;
+  }
+  else
+
+#endif /* #ifdef ARM_MATH_MATRIX_CHECK */
+
+  {
+    /* Matrix transpose by exchanging the rows with columns */
+    /* row loop */
+    do
+    {
+      /* Pointer px is set to starting address of column being processed */
+      px = pOut + i;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+      /* Loop unrolling: Compute 4 outputs at a time */
+      col = nCols >> 2U;
+
+      while (col > 0U)        /* column loop */
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        *px = *pIn++;
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      /* Loop unrolling: Compute remaining outputs */
+      col = nCols % 0x4U;
+
+#else
+
+      /* Initialize col with number of samples */
+      col = nCols;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+      while (col > 0U)
+      {
+        /* Read and store input element in destination */
+        *px = *pIn++;
+
+        /* Update pointer px to point to next row of transposed matrix */
+        px += nRows;
+
+        /* Decrement column loop counter */
+        col--;
+      }
+
+      i++;
+
+      /* Decrement row loop counter */
+      row--;
+
+    } while (row > 0U);          /* row loop end */
+
+    /* Set status as ARM_MATH_SUCCESS */
+    status = ARM_MATH_SUCCESS;
+  }
+
+  /* Return to application */
+  return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q7.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q7.c
new file mode 100755
index 00000000..a500d055
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_trans_q7.c
@@ -0,0 +1,171 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_trans_q7.c
+ * Description:  Q7 matrix transpose
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupMatrix
+ */
+
+/**
+  @addtogroup MatrixTrans
+  @{
+ */
+
+/**
+  @brief         Q7 matrix transpose.
+  @param[in]     pSrc      points to input matrix
+  @param[out]    pDst      points to output matrix
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS       : Operation successful
+                   - \ref ARM_MATH_SIZE_MISMATCH : Matrix size check failed
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+arm_status arm_mat_trans_q7(const arm_matrix_instance_q7 *pSrc, arm_matrix_instance_q7 *pDst)
+{
+
+    uint16x8_t    vecOffs;
+    uint32_t        i;
+    uint32_t        blkCnt;
+    uint8_t const  *pDataC;
+    uint8_t        *pDataDestR;
+    uint16x8_t    vecIn;
+
+    const uint8_t   * pDataSrc=(const uint8_t  *)pSrc->pData;
+    uint8_t   * pDataDst=(uint8_t  *)pDst->pData;
+
+#ifdef ARM_MATH_MATRIX_CHECK
+    /* Check for matrix mismatch condition */
+    if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows))
+    {
+        /* Set status as ARM_MATH_SIZE_MISMATCH */
+        return ARM_MATH_SIZE_MISMATCH;
+    }
+#endif
+
+    vecOffs = vidupq_u16((uint32_t)0, 1);
+    vecOffs = vecOffs * pSrc->numCols;
+
+    i = pSrc->numCols;
+    do
+    {
+        pDataC = (uint8_t const *) pDataSrc;
+        pDataDestR = (uint8_t*)pDataDst;
+
+        blkCnt = pSrc->numRows >> 3;
+        while (blkCnt > 0U)
+        {
+            /* widened loads */
+            vecIn = vldrbq_gather_offset_u16(pDataC, vecOffs);
+            vstrbq_u16(pDataDestR, vecIn);  
+            pDataDestR += 8;
+            pDataC = pDataC + pSrc->numCols * 8;
+            /*
+             * Decrement the blockSize loop counter
+             */
+            blkCnt--;
+        }
+
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = pSrc->numRows & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+            vecIn = vldrbq_gather_offset_u16(pDataC, vecOffs);
+            vstrbq_p_u16(pDataDestR, vecIn, p0);
+        }
+        pDataSrc += 1;
+        pDataDst += pSrc->numRows;
+    }
+    while (--i);
+
+    return (ARM_MATH_SUCCESS);
+}
+#else
+arm_status arm_mat_trans_q7(const arm_matrix_instance_q7 *pSrc, arm_matrix_instance_q7 *pDst)
+{
+    q7_t *pSrcA = pSrc->pData;         /* input data matrix pointer */
+    q7_t *pOut = pDst->pData;          /* output data matrix pointer */
+    uint16_t nRows = pSrc->numRows;    /* number of nRows */
+    uint16_t nColumns = pSrc->numCols; /* number of nColumns */
+    uint16_t col, row = nRows, i = 0U; /* row and column loop counters */
+    arm_status status;                 /* status of matrix transpose */
+
+
+#ifdef ARM_MATH_MATRIX_CHECK
+    /* Check for matrix mismatch condition */
+    if ((pSrc->numRows != pDst->numCols) || (pSrc->numCols != pDst->numRows)) {
+        /* Set status as ARM_MATH_SIZE_MISMATCH */
+        status = ARM_MATH_SIZE_MISMATCH;
+    } else
+#endif /*    #ifdef ARM_MATH_MATRIX_CHECK    */
+
+    {
+        /* Matrix transpose by exchanging the rows with columns */
+        /* row loop     */
+        do {
+            /* The pointer pOut is set to starting address of the column being processed */
+            pOut = pDst->pData + i;
+
+            /* Initialize column loop counter */
+            col = nColumns;
+
+
+            while (col > 0U) {
+                /* Read and store the input element in the destination */
+                *pOut = *pSrcA++;
+
+                /* Update the pointer pOut to point to the next row of the transposed matrix */
+                pOut += nRows;
+
+                /* Decrement the column loop counter */
+                col--;
+            }
+
+            i++;
+
+            /* Decrement the row loop counter */
+            row--;
+
+        } while (row > 0U);
+
+        /* set status as ARM_MATH_SUCCESS */
+        status = ARM_MATH_SUCCESS;
+    }
+    /* Return to application */
+    return (status);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+
+/**
+  @} end of MatrixTrans group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f16.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f16.c
new file mode 100755
index 00000000..f592f6fa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f16.c
@@ -0,0 +1,396 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_vec_mult_f16.c
+ * Description:  Floating-point matrix and vector multiplication
+ *
+ * $Date:        23 April 2021
+ *
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+ * @ingroup groupMatrix
+ */
+
+
+/**
+ * @addtogroup MatrixVectMult
+ * @{
+ */
+
+/**
+ * @brief Floating-point matrix and vector multiplication.
+ * @param[in]       *pSrcMat points to the input matrix structure
+ * @param[in]       *pVec points to input vector
+ * @param[out]      *pDst points to output vector
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mat_vec_mult_f16(
+    const arm_matrix_instance_f16   *pSrcMat,
+    const float16_t                 *pSrcVec,
+    float16_t                       *pDstVec)
+{
+    uint32_t         numRows = pSrcMat->numRows;
+    uint32_t         numCols = pSrcMat->numCols;
+    const float16_t *pSrcA = pSrcMat->pData;
+    const float16_t *pInA0;
+    const float16_t *pInA1;
+    float16_t       *px;
+    int32_t          row;
+    uint32_t         blkCnt;           /* loop counters */
+
+    row = numRows;
+    px = pDstVec;
+
+    /*
+     * compute 4 rows in parallel
+     */
+    while (row >= 4)
+    {
+        const float16_t     *pInA2, *pInA3;
+        float16_t const    *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f16x8_t            vecIn, acc0, acc1, acc2, acc3;
+        float16_t const     *pSrcVecPtr = pSrcVec;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec =  pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        acc2 = vdupq_n_f16(0.0f);
+        acc3 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U)
+        {
+            f16x8_t vecA;
+
+            vecIn = vld1q(pInVec);      
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);    
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);  
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);  
+            pSrcA2Vec += 8;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);  
+            pSrcA3Vec += 8;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+            f16x8_t vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vld1q(pSrcA0Vec);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        *px++ = vecAddAcrossF16Mve(acc0);
+        *px++ = vecAddAcrossF16Mve(acc1);
+        *px++ = vecAddAcrossF16Mve(acc2);
+        *px++ = vecAddAcrossF16Mve(acc3);
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2)
+    {
+        float16_t const    *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f16x8_t            vecIn, acc0, acc1;
+        float16_t const     *pSrcVecPtr = pSrcVec;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U)
+        {
+            f16x8_t vecA;
+
+            vecIn = vld1q(pInVec);      
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);    
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);    
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+            f16x8_t vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vld1q(pSrcA0Vec);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        *px++ = vecAddAcrossF16Mve(acc0);
+        *px++ = vecAddAcrossF16Mve(acc1);
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1)
+    {
+        f16x8_t             vecIn, acc0;
+        float16_t const     *pSrcA0Vec, *pInVec;
+        float16_t const      *pSrcVecPtr = pSrcVec;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U)
+        {
+            f16x8_t vecA;
+
+            vecIn = vld1q(pInVec);      
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);    
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+            f16x8_t vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vld1q(pSrcA0Vec);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        *px++ = vecAddAcrossF16Mve(acc0);
+    }
+}
+#else
+void arm_mat_vec_mult_f16(const arm_matrix_instance_f16 *pSrcMat, const float16_t *pVec, float16_t *pDst)
+{
+    uint32_t numRows = pSrcMat->numRows;
+    uint32_t numCols = pSrcMat->numCols;
+    const float16_t *pSrcA = pSrcMat->pData;
+    const float16_t *pInA1;      /* input data matrix pointer A of Q31 type */
+    const float16_t *pInA2;      /* input data matrix pointer A of Q31 type */
+    const float16_t *pInA3;      /* input data matrix pointer A of Q31 type */
+    const float16_t *pInA4;      /* input data matrix pointer A of Q31 type */
+    const float16_t *pInVec;     /* input data matrix pointer B of Q31 type */
+    float16_t *px;               /* Temporary output data matrix pointer */
+    uint16_t i, row, colCnt; /* loop counters */
+    float16_t matData, matData2, vecData, vecData2;
+
+
+    /* Process 4 rows at a time */
+    row = numRows >> 2;
+    i = 0u;
+    px = pDst;
+
+    /* The following loop performs the dot-product of each row in pSrcA with the vector */
+    /* row loop */
+    while (row > 0) {
+        /* For every row wise process, the pInVec pointer is set
+         ** to the starting address of the vector */
+        pInVec = pVec;
+
+        /* Initialize accumulators */
+        float16_t sum1 = 0.0f16;
+        float16_t sum2 = 0.0f16;
+        float16_t sum3 = 0.0f16;
+        float16_t sum4 = 0.0f16;
+
+        /* Loop unrolling: process 2 columns per iteration */
+        colCnt = numCols;
+
+        /* Initialize pointers to the starting address of the column being processed */
+        pInA1 = pSrcA + i;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        pInA4 = pInA3 + numCols;
+
+
+        // Main loop: matrix-vector multiplication
+        while (colCnt > 0u) {
+            // Read 2 values from vector
+            vecData = *(pInVec)++;
+            // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate
+            matData = *(pInA1)++;
+            sum1 += (_Float16)matData * (_Float16)vecData;
+            matData = *(pInA2)++;
+            sum2 += (_Float16)matData * (_Float16)vecData;
+            matData = *(pInA3)++;
+            sum3 += (_Float16)matData * (_Float16)vecData;
+            matData = *(pInA4)++;
+            sum4 += (_Float16)matData * (_Float16)vecData;
+
+            // Decrement the loop counter
+            colCnt--;
+        }
+
+        /* Saturate and store the result in the destination buffer */
+        *px++ = sum1;
+        *px++ = sum2;
+        *px++ = sum3;
+        *px++ = sum4;
+
+        i = i + numCols * 4;
+
+        /* Decrement the row loop counter */
+        row--;
+    }
+
+    /* process any remaining rows */
+    row = numRows & 3u;
+    while (row > 0) {
+
+        float16_t sum = 0.0f16;
+        pInVec = pVec;
+        pInA1 = pSrcA + i;
+
+        colCnt = numCols >> 1;
+
+        while (colCnt > 0) {
+            vecData = *(pInVec)++;
+            vecData2 = *(pInVec)++;
+            matData = *(pInA1)++;
+            matData2 = *(pInA1)++;
+            sum += (_Float16)matData * (_Float16)vecData;
+            sum += (_Float16)matData2 * (_Float16)vecData2;
+            colCnt--;
+        }
+        // process remainder of row
+        colCnt = numCols & 1u;
+        while (colCnt > 0) {
+            sum += (_Float16)*pInA1++ * (_Float16)*pInVec++;
+            colCnt--;
+        }
+
+        *px++ = sum;
+        i = i + numCols;
+        row--;
+    }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixMult group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f32.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f32.c
new file mode 100755
index 00000000..b112d349
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_f32.c
@@ -0,0 +1,399 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_vec_mult_f32.c
+ * Description:  Floating-point matrix and vector multiplication
+ *
+ * $Date:        23 April 2021
+ *
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+
+/**
+ * @ingroup groupMatrix
+ */
+
+/**
+ * @defgroup MatrixVectMult Matrix Vector Multiplication
+ *
+ * Multiplies a matrix and a vector.
+ *
+ */
+
+/**
+ * @addtogroup MatrixVectMult
+ * @{
+ */
+
+/**
+ * @brief Floating-point matrix and vector multiplication.
+ * @param[in]       *pSrcMat points to the input matrix structure
+ * @param[in]       *pVec points to input vector
+ * @param[out]      *pDst points to output vector
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mat_vec_mult_f32(
+    const arm_matrix_instance_f32   *pSrcMat,
+    const float32_t                 *pSrcVec,
+    float32_t                       *pDstVec)
+{
+    uint32_t         numRows = pSrcMat->numRows;
+    uint32_t         numCols = pSrcMat->numCols;
+    const float32_t *pSrcA = pSrcMat->pData;
+    const float32_t *pInA0;
+    const float32_t *pInA1;
+    float32_t       *px;
+    int32_t          row;
+    uint32_t         blkCnt;           /* loop counters */
+
+    row = numRows;
+    px = pDstVec;
+
+    /*
+     * compute 4 rows in parallel
+     */
+    while (row >= 4)
+    {
+        const float32_t     *pInA2, *pInA3;
+        float32_t const    *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f32x4_t            vecIn, acc0, acc1, acc2, acc3;
+        float32_t const     *pSrcVecPtr = pSrcVec;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec =  pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        acc2 = vdupq_n_f32(0.0f);
+        acc3 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U)
+        {
+            f32x4_t vecA;
+
+            vecIn = vld1q(pInVec);      
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);    
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);  
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);  
+            pSrcA2Vec += 4;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);  
+            pSrcA3Vec += 4;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+            f32x4_t vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vld1q(pSrcA0Vec);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        *px++ = vecAddAcrossF32Mve(acc0);
+        *px++ = vecAddAcrossF32Mve(acc1);
+        *px++ = vecAddAcrossF32Mve(acc2);
+        *px++ = vecAddAcrossF32Mve(acc3);
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2)
+    {
+        float32_t const    *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f32x4_t            vecIn, acc0, acc1;
+        float32_t const     *pSrcVecPtr = pSrcVec;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U)
+        {
+            f32x4_t vecA;
+
+            vecIn = vld1q(pInVec);      
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);    
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);    
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+            f32x4_t vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vld1q(pSrcA0Vec);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        *px++ = vecAddAcrossF32Mve(acc0);
+        *px++ = vecAddAcrossF32Mve(acc1);
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1)
+    {
+        f32x4_t             vecIn, acc0;
+        float32_t const     *pSrcA0Vec, *pInVec;
+        float32_t const      *pSrcVecPtr = pSrcVec;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U)
+        {
+            f32x4_t vecA;
+
+            vecIn = vld1q(pInVec);      
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);    
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+            f32x4_t vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vld1q(pSrcA0Vec);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        *px++ = vecAddAcrossF32Mve(acc0);
+    }
+}
+#else
+
+void arm_mat_vec_mult_f32(const arm_matrix_instance_f32 *pSrcMat, const float32_t *pVec, float32_t *pDst)
+{
+    uint32_t numRows = pSrcMat->numRows;
+    uint32_t numCols = pSrcMat->numCols;
+    const float32_t *pSrcA = pSrcMat->pData;
+    const float32_t *pInA1;      /* input data matrix pointer A of Q31 type */
+    const float32_t *pInA2;      /* input data matrix pointer A of Q31 type */
+    const float32_t *pInA3;      /* input data matrix pointer A of Q31 type */
+    const float32_t *pInA4;      /* input data matrix pointer A of Q31 type */
+    const float32_t *pInVec;     /* input data matrix pointer B of Q31 type */
+    float32_t *px;               /* Temporary output data matrix pointer */
+    uint16_t i, row, colCnt; /* loop counters */
+    float32_t matData, matData2, vecData, vecData2;
+
+
+    /* Process 4 rows at a time */
+    row = numRows >> 2;
+    i = 0u;
+    px = pDst;
+
+    /* The following loop performs the dot-product of each row in pSrcA with the vector */
+    /* row loop */
+    while (row > 0) {
+        /* Initialize accumulators */
+        float32_t sum1 = 0.0f;
+        float32_t sum2 = 0.0f;
+        float32_t sum3 = 0.0f;
+        float32_t sum4 = 0.0f;
+
+        /* For every row wise process, the pInVec pointer is set
+         ** to the starting address of the vector */
+        pInVec = pVec;
+
+        /* Loop unrolling: process 2 columns per iteration */
+        colCnt = numCols;
+
+        /* Initialize pointers to the starting address of the column being processed */
+        pInA1 = pSrcA + i;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        pInA4 = pInA3 + numCols;
+
+
+        // Main loop: matrix-vector multiplication
+        while (colCnt > 0u) {
+            // Read 2 values from vector
+            vecData = *(pInVec)++;
+            // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate
+            matData = *(pInA1)++;
+            sum1 += matData * vecData;
+            matData = *(pInA2)++;
+            sum2 += matData * vecData;
+            matData = *(pInA3)++;
+            sum3 += matData * vecData;
+            matData = *(pInA4)++;
+            sum4 += matData * vecData;
+
+            // Decrement the loop counter
+            colCnt--;
+        }
+
+        /* Saturate and store the result in the destination buffer */
+        *px++ = sum1;
+        *px++ = sum2;
+        *px++ = sum3;
+        *px++ = sum4;
+
+        i = i + numCols * 4;
+
+        /* Decrement the row loop counter */
+        row--;
+    }
+
+    /* process any remaining rows */
+    row = numRows & 3u;
+    while (row > 0) {
+
+        float32_t sum = 0.0f;
+        pInVec = pVec;
+        pInA1 = pSrcA + i;
+
+        colCnt = numCols >> 1;
+        while (colCnt > 0) {
+            vecData = *(pInVec)++;
+            vecData2 = *(pInVec)++;
+            matData = *(pInA1)++;
+            matData2 = *(pInA1)++;
+            sum += matData * vecData;
+            sum += matData2 * vecData2;
+            colCnt--;
+        }
+        // process remainder of row
+        colCnt = numCols & 1u;
+
+
+        while (colCnt > 0) {
+            sum += *pInA1++ * *pInVec++;
+            colCnt--;
+        }
+
+        *px++ = sum;
+        i = i + numCols;
+        row--;
+    }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q15.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q15.c
new file mode 100755
index 00000000..a2acd259
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q15.c
@@ -0,0 +1,388 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_vec_mult_q15.c
+ * Description:  Q15 matrix and vector multiplication
+ *
+ * $Date:        23 April 2021
+ *
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+ * @ingroup groupMatrix
+ */
+
+
+
+/**
+ * @addtogroup MatrixVectMult
+ * @{
+ */
+
+/**
+ * @brief Q15 matrix and vector multiplication.
+ * @param[in]       *pSrcMat points to the input matrix structure
+ * @param[in]       *pVec points to input vector
+ * @param[out]      *pDst points to output vector
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mat_vec_mult_q15(
+    const arm_matrix_instance_q15 * pSrcMat,
+    const q15_t     *pSrcVec,
+    q15_t           *pDstVec)
+{
+    const q15_t *pMatSrc = pSrcMat->pData;
+    const q15_t *pMat0, *pMat1;
+    uint32_t     numRows = pSrcMat->numRows;
+    uint32_t     numCols = pSrcMat->numCols;
+    q15_t       *px;
+    int32_t      row;
+    uint16_t     blkCnt;           /* loop counters */
+
+    row = numRows;
+    px = pDstVec;
+
+    /*
+     * compute 3x64-bit accumulators per loop
+     */
+    while (row >= 3)
+    {
+        q15_t const *pMat0Vec, *pMat1Vec, *pMat2Vec, *pVec;
+        const q15_t  *pMat2;
+        q15_t const  *pSrcVecPtr = pSrcVec;
+        q63_t         acc0, acc1, acc2;
+        q15x8_t     vecMatA0, vecMatA1, vecMatA2, vecIn;
+
+
+        pVec = pSrcVec;
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+        pMat1 = pMat0 + numCols;
+        pMat2 = pMat1 + numCols;
+
+        acc0 = 0LL;
+        acc1 = 0LL;
+        acc2 = 0LL;
+
+        pMat0Vec = pMat0;
+        pMat1Vec = pMat1;
+        pMat2Vec = pMat2;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 8;
+            vecMatA1 = vld1q(pMat1Vec); 
+            pMat1Vec += 8;
+            vecMatA2 = vld1q(pMat2Vec); 
+            pMat2Vec += 8;
+            vecIn = vld1q(pVec);        
+            pVec += 8;
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+            acc2 = vmlaldavaq(acc2, vecIn, vecMatA2);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecMatA1 = vld1q(pMat1Vec);
+            vecMatA2 = vld1q(pMat2Vec);
+            vecIn = vldrhq_z_s16(pVec, p0);
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+            acc2 = vmlaldavaq(acc2, vecIn, vecMatA2);
+        }
+
+        *px++ = MVE_ASRL_SAT16(acc0, 15);
+        *px++ = MVE_ASRL_SAT16(acc1, 15);
+        *px++ = MVE_ASRL_SAT16(acc2, 15);
+
+        pMatSrc += numCols * 3;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 3;
+    }
+
+    /*
+     * process any remaining rows pair
+     */
+    if (row >= 2)
+    {
+        q15_t const *pMat0Vec, *pMat1Vec, *pVec;
+        q15_t const  *pSrcVecPtr = pSrcVec;
+        q63_t         acc0, acc1;
+        q15x8_t     vecMatA0, vecMatA1, vecIn;
+
+        /*
+         * For every row wise process, the pInVec pointer is set
+         * to the starting address of the vector
+         */
+        pVec = pSrcVec;
+
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+        pMat1 = pMat0 + numCols;
+
+        acc0 = 0LL;
+        acc1 = 0LL;
+
+        pMat0Vec = pMat0;
+        pMat1Vec = pMat1;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 8;
+            vecMatA1 = vld1q(pMat1Vec); 
+            pMat1Vec += 8;
+            vecIn = vld1q(pVec);        
+            pVec += 8;
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+
+            blkCnt--;
+        }
+
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecMatA1 = vld1q(pMat1Vec);
+            vecIn = vldrhq_z_s16(pVec, p0);
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+        }
+
+        *px++ = MVE_ASRL_SAT16(acc0, 15);
+        *px++ = MVE_ASRL_SAT16(acc1, 15);
+
+        pMatSrc += numCols * 2;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 2;
+    }
+
+    if (row >= 1)
+    {
+        q15_t const *pMat0Vec, *pVec;
+        q15_t const  *pSrcVecPtr = pSrcVec;
+        q63_t         acc0;
+        q15x8_t     vecMatA0, vecIn;
+
+        /*
+         * For every row wise process, the pInVec pointer is set
+         * to the starting address of the vector
+         */
+        pVec = pSrcVec;
+
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+
+        acc0 = 0LL;
+
+        pMat0Vec = pMat0;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 8;
+            vecIn = vld1q(pVec);        
+            pVec += 8;
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp16q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecIn = vldrhq_z_s16(pVec, p0);
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+        }
+        *px++ = MVE_ASRL_SAT16(acc0, 15);
+    }
+}
+
+#else
+void arm_mat_vec_mult_q15(const arm_matrix_instance_q15 *pSrcMat, const q15_t *pVec, q15_t *pDst)
+{
+    uint32_t numRows = pSrcMat->numRows;
+    uint32_t numCols = pSrcMat->numCols;
+    const q15_t *pSrcA = pSrcMat->pData;
+    const q15_t *pInA1;      /* input data matrix pointer A of Q15 type */
+    const q15_t *pInA2;      /* input data matrix pointer A of Q15 type */
+    const q15_t *pInA3;      /* input data matrix pointer A of Q15 type */
+    const q15_t *pInA4;      /* input data matrix pointer A of Q15 type */
+    const q15_t *pInVec;     /* input data matrix pointer B of Q15 type */
+    q15_t *px;               /* Temporary output data matrix pointer */
+    uint16_t i, row, colCnt; /* loop counters */
+    q31_t matData, matData2, vecData, vecData2;
+
+
+    /* Process 4 rows at a time */
+    row = numRows >> 2;
+    i = 0u;
+    px = pDst;
+
+    /* The following loop performs the dot-product of each row in pSrcA with the vector */
+    /* row loop */
+    while (row > 0) {
+        /* Initialize accumulators */
+        q63_t sum1 = 0;
+        q63_t sum2 = 0;
+        q63_t sum3 = 0;
+        q63_t sum4 = 0;
+
+        /* For every row wise process, the pInVec pointer is set
+         ** to the starting address of the vector */
+        pInVec = pVec;
+
+        /* Loop unrolling: process 2 columns per iteration */
+        colCnt = numCols >> 1;
+
+        /* Initialize pointers to the starting address of the column being processed */
+        pInA1 = pSrcA + i;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        pInA4 = pInA3 + numCols;
+
+        // Main loop: matrix-vector multiplication
+        while (colCnt > 0u) {
+            // Read 2 values from vector
+            vecData = read_q15x2_ia ((q15_t **) &pInVec);
+
+            // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate
+            matData =  read_q15x2_ia ((q15_t **) &pInA1);
+            sum1 = __SMLALD(matData, vecData, sum1);
+            matData = read_q15x2_ia ((q15_t **) &pInA2);
+            sum2 = __SMLALD(matData, vecData, sum2);
+            matData = read_q15x2_ia ((q15_t **) &pInA3);
+            sum3 = __SMLALD(matData, vecData, sum3);
+            matData = read_q15x2_ia ((q15_t **) &pInA4);
+            sum4 = __SMLALD(matData, vecData, sum4);
+
+            // Decrement the loop counter
+            colCnt--;
+        }
+
+        /* process any remaining columns */
+        colCnt = numCols & 1u;
+        if (numCols & 1u) {
+            vecData = *pInVec++;
+            sum1 += (q63_t)*pInA1++ * vecData;
+            sum2 += (q63_t)*pInA2++ * vecData;
+            sum3 += (q63_t)*pInA3++ * vecData;
+            sum4 += (q63_t)*pInA4++ * vecData;
+        }
+
+        /* Saturate and store the result in the destination buffer */
+        *px++ = (q15_t)(__SSAT((sum1 >> 15), 16));
+        *px++ = (q15_t)(__SSAT((sum2 >> 15), 16));
+        *px++ = (q15_t)(__SSAT((sum3 >> 15), 16));
+        *px++ = (q15_t)(__SSAT((sum4 >> 15), 16));
+
+        i = i + numCols * 4;
+
+        /* Decrement the row loop counter */
+        row--;
+    }
+
+    /* process any remaining rows */
+    row = numRows & 3u;
+    while (row > 0) {
+
+        q63_t sum = 0;
+        pInVec = pVec;
+        pInA1 = pSrcA + i;
+
+        // loop unrolling - process 4 elements at a time
+        colCnt = numCols >> 2;
+
+        while (colCnt > 0) {
+            vecData = read_q15x2_ia ((q15_t **) &pInVec);
+            vecData2 = read_q15x2_ia ((q15_t **) &pInVec);
+            matData = read_q15x2_ia ((q15_t **) &pInA1);
+            matData2 = read_q15x2_ia ((q15_t **) &pInA1);
+            sum = __SMLALD(matData, vecData, sum);
+            sum = __SMLALD(matData2, vecData2, sum);
+            colCnt--;
+        }
+
+        // process remainder of row
+        colCnt = numCols & 3u;
+        while (colCnt > 0) {
+            sum += (q63_t)*pInA1++ * *pInVec++;
+            colCnt--;
+        }
+        *px++ = (q15_t)(__SSAT((sum >> 15), 16));
+        i = i + numCols;
+        row--;
+    }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+ * @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q31.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q31.c
new file mode 100755
index 00000000..9f491eab
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q31.c
@@ -0,0 +1,376 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_vec_mult_q31.c
+ * Description:  Q31 matrix and vector multiplication
+ *
+ * $Date:        23 April 2021
+ *
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+ * @ingroup groupMatrix
+ */
+
+
+
+/**
+ * @addtogroup MatrixVectMult
+ * @{
+ */
+
+/**
+ * @brief Q31 matrix and vector multiplication.
+ * @param[in]       *pSrcMat points to the input matrix structure
+ * @param[in]       *pVec points to the input vector
+ * @param[out]      *pDst points to the output vector
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_mat_vec_mult_q31(
+    const arm_matrix_instance_q31 * pSrcMat,
+    const q31_t     *pSrcVec,
+    q31_t           *pDstVec)
+{
+    const q31_t *pMatSrc = pSrcMat->pData;
+    const q31_t *pMat0, *pMat1;
+    uint32_t     numRows = pSrcMat->numRows;
+    uint32_t     numCols = pSrcMat->numCols;
+    q31_t       *px;
+    int32_t      row;
+    uint16_t     blkCnt;           /* loop counters */
+
+    row = numRows;
+    px = pDstVec;
+
+    /*
+     * compute 3x64-bit accumulators per loop
+     */
+    while (row >= 3)
+    {
+        q31_t const *pMat0Vec, *pMat1Vec, *pMat2Vec, *pVec;
+        const q31_t  *pMat2;
+        q31_t const  *pSrcVecPtr = pSrcVec;
+        q63_t         acc0, acc1, acc2;
+        q31x4_t     vecMatA0, vecMatA1, vecMatA2, vecIn;
+
+
+        pVec = pSrcVec;
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+        pMat1 = pMat0 + numCols;
+        pMat2 = pMat1 + numCols;
+
+        acc0 = 0LL;
+        acc1 = 0LL;
+        acc2 = 0LL;
+
+        pMat0Vec = pMat0;
+        pMat1Vec = pMat1;
+        pMat2Vec = pMat2;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 4;
+            vecMatA1 = vld1q(pMat1Vec); 
+            pMat1Vec += 4;
+            vecMatA2 = vld1q(pMat2Vec); 
+            pMat2Vec += 4;
+            vecIn = vld1q(pVec);        
+            pVec += 4;
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+            acc2 = vmlaldavaq(acc2, vecIn, vecMatA2);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecMatA1 = vld1q(pMat1Vec);
+            vecMatA2 = vld1q(pMat2Vec);
+            vecIn = vldrwq_z_s32(pVec, p0);
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+            acc2 = vmlaldavaq(acc2, vecIn, vecMatA2);
+        }
+
+        *px++ = asrl(acc0, 31);
+        *px++ = asrl(acc1, 31);
+        *px++ = asrl(acc2, 31);
+
+        pMatSrc += numCols * 3;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 3;
+    }
+
+    /*
+     * process any remaining rows pair
+     */
+    if (row >= 2)
+    {
+        q31_t const *pMat0Vec, *pMat1Vec, *pVec;
+        q31_t const  *pSrcVecPtr = pSrcVec;
+        q63_t         acc0, acc1;
+        q31x4_t     vecMatA0, vecMatA1, vecIn;
+
+        /*
+         * For every row wise process, the pInVec pointer is set
+         * to the starting address of the vector
+         */
+        pVec = pSrcVec;
+
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+        pMat1 = pMat0 + numCols;
+
+        acc0 = 0LL;
+        acc1 = 0LL;
+
+        pMat0Vec = pMat0;
+        pMat1Vec = pMat1;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 4;
+            vecMatA1 = vld1q(pMat1Vec); 
+            pMat1Vec += 4;
+            vecIn = vld1q(pVec);        
+            pVec += 4;
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+
+            blkCnt--;
+        }
+
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecMatA1 = vld1q(pMat1Vec);
+            vecIn = vldrwq_z_s32(pVec, p0);
+
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmlaldavaq(acc1, vecIn, vecMatA1);
+        }
+
+        *px++ = asrl(acc0, 31);
+        *px++ = asrl(acc1, 31);
+
+        pMatSrc += numCols * 2;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 2;
+    }
+
+    if (row >= 1)
+    {
+        q31_t const *pMat0Vec, *pVec;
+        q31_t const  *pSrcVecPtr = pSrcVec;
+        q63_t         acc0;
+        q31x4_t     vecMatA0, vecIn;
+
+        /*
+         * For every row wise process, the pInVec pointer is set
+         * to the starting address of the vector
+         */
+        pVec = pSrcVec;
+
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+
+        acc0 = 0LL;
+
+        pMat0Vec = pMat0;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 4;
+            vecIn = vld1q(pVec);        
+            pVec += 4;
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp32q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecIn = vldrwq_z_s32(pVec, p0);
+            acc0 = vmlaldavaq(acc0, vecIn, vecMatA0);
+        }
+
+        *px++ = asrl(acc0, 31);
+    }
+}
+#else
+void arm_mat_vec_mult_q31(const arm_matrix_instance_q31 *pSrcMat, const q31_t *pVec, q31_t *pDst)
+{
+    uint32_t numRows = pSrcMat->numRows;
+    uint32_t numCols = pSrcMat->numCols;
+    const q31_t *pSrcA = pSrcMat->pData;
+    const q31_t *pInA1;      /* input data matrix pointer A of Q31 type */
+    const q31_t *pInA2;      /* input data matrix pointer A of Q31 type */
+    const q31_t *pInA3;      /* input data matrix pointer A of Q31 type */
+    const q31_t *pInA4;      /* input data matrix pointer A of Q31 type */
+    const q31_t *pInVec;     /* input data matrix pointer B of Q31 type */
+    q31_t *px;               /* Temporary output data matrix pointer */
+    uint16_t i, row, colCnt; /* loop counters */
+    q31_t matData, matData2, vecData, vecData2;
+
+
+    /* Process 4 rows at a time */
+    row = numRows >> 2;
+    i = 0u;
+    px = pDst;
+
+    /* The following loop performs the dot-product of each row in pSrcA with the vector */
+    /* row loop */
+    while (row > 0) {
+        /* Initialize accumulators */
+        q63_t sum1 = 0;
+        q63_t sum2 = 0;
+        q63_t sum3 = 0;
+        q63_t sum4 = 0;
+
+        /* For every row wise process, the pInVec pointer is set
+         ** to the starting address of the vector */
+        pInVec = pVec;
+
+        /* Loop unrolling: process 2 columns per iteration */
+        colCnt = numCols;
+
+        /* Initialize pointers to the starting address of the column being processed */
+        pInA1 = pSrcA + i;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        pInA4 = pInA3 + numCols;
+
+
+        // Main loop: matrix-vector multiplication
+        while (colCnt > 0u) {
+            // Read 2 values from vector
+            vecData = *(pInVec)++;
+
+            // Read 8 values from the matrix - 2 values from each of 4 rows, and do multiply accumulate
+            matData = *(pInA1)++;
+            sum1 += (q63_t)matData * vecData;
+            matData = *(pInA2)++;
+            sum2 += (q63_t)matData * vecData;
+            matData = *(pInA3)++;
+            sum3 += (q63_t)matData * vecData;
+            matData = *(pInA4)++;
+            sum4 += (q63_t)matData * vecData;
+
+            // Decrement the loop counter
+            colCnt--;
+        }
+
+        /* Saturate and store the result in the destination buffer */
+        *px++ = (q31_t)(sum1 >> 31);
+        *px++ = (q31_t)(sum2 >> 31);
+        *px++ = (q31_t)(sum3 >> 31);
+        *px++ = (q31_t)(sum4 >> 31);
+
+        i = i + numCols * 4;
+
+        /* Decrement the row loop counter */
+        row--;
+    }
+
+    /* process any remaining rows */
+    row = numRows & 3u;
+    while (row > 0) {
+
+        q63_t sum = 0;
+        pInVec = pVec;
+        pInA1 = pSrcA + i;
+
+        colCnt = numCols >> 1;
+
+        while (colCnt > 0) {
+            vecData = *(pInVec)++;
+            vecData2 = *(pInVec)++;
+            matData = *(pInA1)++;
+            matData2 = *(pInA1)++;
+            sum += (q63_t)matData * vecData;
+            sum += (q63_t)matData2 * vecData2;
+            colCnt--;
+        }
+
+        // process remainder of row
+        colCnt = numCols & 1u;
+        while (colCnt > 0) {
+            sum += (q63_t)*pInA1++ * *pInVec++;
+            colCnt--;
+        }
+
+        *px++ = (q31_t)(sum >> 31);
+        i = i + numCols;
+        row--;
+    }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+ * @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q7.c b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q7.c
new file mode 100755
index 00000000..4ff43bc5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/MatrixFunctions/arm_mat_vec_mult_q7.c
@@ -0,0 +1,420 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mat_vec_mult_q7.c
+ * Description:  Q7 matrix and vector multiplication
+ *
+ * $Date:        23 April 2021
+ *
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/matrix_functions.h"
+
+/**
+ * @ingroup groupMatrix
+ */
+
+
+
+/**
+ * @addtogroup MatrixVectMult
+ * @{
+ */
+
+/**
+ * @brief Q7 matrix and vector multiplication.
+ * @param[in]       *pSrcMat points to the input matrix structure
+ * @param[in]       *pVec points to the input vector
+ * @param[out]      *pDst points to the output vector
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mat_vec_mult_q7(
+    const arm_matrix_instance_q7 * pSrcMat,
+    const q7_t     *pSrcVec,
+    q7_t           *pDstVec)
+{
+    const q7_t *pMatSrc = pSrcMat->pData;
+    const q7_t *pMat0, *pMat1;
+    uint32_t     numRows = pSrcMat->numRows;
+    uint32_t     numCols = pSrcMat->numCols;
+    q7_t       *px;
+    int32_t      row;
+    uint16_t     blkCnt;           /* loop counters */
+
+    row = numRows;
+    px = pDstVec;
+
+    /*
+     * compute 4x64-bit accumulators per loop
+     */
+    while (row >= 4)
+    {
+        q7_t const *pMat0Vec, *pMat1Vec, *pMat2Vec, *pMat3Vec, *pVec;
+        const q7_t  *pMat2, *pMat3;
+        q7_t const  *pSrcVecPtr = pSrcVec;
+        q31_t        acc0, acc1, acc2, acc3;
+        q7x16_t      vecMatA0, vecMatA1, vecMatA2, vecMatA3, vecIn;
+
+        pVec = pSrcVec;
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+        pMat1 = pMat0 + numCols;
+        pMat2 = pMat1 + numCols;
+        pMat3 = pMat2 + numCols;
+
+        acc0 = 0L;
+        acc1 = 0L;
+        acc2 = 0L;
+        acc3 = 0L;
+
+        pMat0Vec = pMat0;
+        pMat1Vec = pMat1;
+        pMat2Vec = pMat2;
+        pMat3Vec = pMat3;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 4;
+        while (blkCnt > 0U)
+        {
+
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 16;
+            vecMatA1 = vld1q(pMat1Vec); 
+            pMat1Vec += 16;
+            vecMatA2 = vld1q(pMat2Vec); 
+            pMat2Vec += 16;
+            vecMatA3 = vld1q(pMat3Vec); 
+            pMat3Vec += 16;
+            vecIn = vld1q(pVec);        
+            pVec += 16;
+
+            acc0 = vmladavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmladavaq(acc1, vecIn, vecMatA1);
+            acc2 = vmladavaq(acc2, vecIn, vecMatA2);
+            acc3 = vmladavaq(acc3, vecIn, vecMatA3);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 0xF;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp8q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecMatA1 = vld1q(pMat1Vec);
+            vecMatA2 = vld1q(pMat2Vec);
+            vecMatA3 = vld1q(pMat3Vec);
+            vecIn = vldrbq_z_s8(pVec, p0);
+
+            acc0 = vmladavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmladavaq(acc1, vecIn, vecMatA1);
+            acc2 = vmladavaq(acc2, vecIn, vecMatA2);
+            acc3 = vmladavaq(acc3, vecIn, vecMatA3);
+        }
+
+        *px++ = __SSAT(acc0 >> 7, 8);
+        *px++ = __SSAT(acc1 >> 7, 8);
+        *px++ = __SSAT(acc2 >> 7, 8);
+        *px++ = __SSAT(acc3 >> 7, 8);
+
+        pMatSrc += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * process any remaining rows pair
+     */
+    if (row >= 2)
+    {
+        q7_t const  *pMat0Vec, *pMat1Vec, *pVec;
+        q7_t const  *pSrcVecPtr = pSrcVec;
+        q31_t         acc0, acc1;
+        q7x16_t     vecMatA0, vecMatA1, vecIn;
+
+        /*
+         * For every row wise process, the pInVec pointer is set
+         * to the starting address of the vector
+         */
+        pVec = pSrcVec;
+
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+        pMat1 = pMat0 + numCols;
+
+        acc0 = 0;
+        acc1 = 0;
+
+        pMat0Vec = pMat0;
+        pMat1Vec = pMat1;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 4;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 16;
+            vecMatA1 = vld1q(pMat1Vec); 
+            pMat1Vec += 16;
+            vecIn = vld1q(pVec);        
+            pVec += 16;
+
+            acc0 = vmladavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmladavaq(acc1, vecIn, vecMatA1);
+
+            blkCnt--;
+        }
+
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 0xF;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp8q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecMatA1 = vld1q(pMat1Vec);
+            vecIn = vldrbq_z_s8(pVec, p0);
+
+            acc0 = vmladavaq(acc0, vecIn, vecMatA0);
+            acc1 = vmladavaq(acc1, vecIn, vecMatA1);
+        }
+
+        *px++ = __SSAT(acc0 >> 7, 8);
+        *px++ = __SSAT(acc1 >> 7, 8);
+
+        pMatSrc += numCols * 2;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 2;
+    }
+
+    if (row >= 1)
+    {
+        q7_t const  *pMat0Vec, *pVec;
+        q7_t const  *pSrcVecPtr = pSrcVec;
+        q31_t         acc0;
+        q7x16_t     vecMatA0, vecIn;
+
+        /*
+         * For every row wise process, the pInVec pointer is set
+         * to the starting address of the vector
+         */
+        pVec = pSrcVec;
+
+        /*
+         * Initialize the pointer pIn1 to point to the starting address of the column being processed
+         */
+        pMat0 = pMatSrc;
+
+        acc0 = 0LL;
+
+        pMat0Vec = pMat0;
+        pVec = pSrcVecPtr;
+
+        blkCnt = numCols >> 4;
+        while (blkCnt > 0U)
+        {
+            vecMatA0 = vld1q(pMat0Vec); 
+            pMat0Vec += 16;
+            vecIn = vld1q(pVec);        
+            pVec += 16;
+
+            acc0 = vmladavaq(acc0, vecIn, vecMatA0);
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 0xF;
+        if (blkCnt > 0U)
+        {
+            mve_pred16_t p0 = vctp8q(blkCnt);
+
+            vecMatA0 = vld1q(pMat0Vec);
+            vecIn = vldrbq_z_s8(pVec, p0);
+            acc0 = vmladavaq(acc0, vecIn, vecMatA0);
+        }
+        *px++ = __SSAT(acc0 >> 7, 8);
+    }
+}
+
+#else
+void arm_mat_vec_mult_q7(const arm_matrix_instance_q7 *pSrcMat, const q7_t *pVec, q7_t *pDst)
+{
+    uint32_t numRows = pSrcMat->numRows;
+    uint32_t numCols = pSrcMat->numCols;
+    const q7_t *pSrcA = pSrcMat->pData;
+    const q7_t *pInA1;       /* input data matrix pointer of Q7 type */
+    const q7_t *pInA2;       /* input data matrix pointer of Q7 type */
+    const q7_t *pInA3;       /* input data matrix pointer of Q7 type */
+    const q7_t *pInA4;       /* input data matrix pointer of Q7 type */
+    const q7_t *pInVec;      /* input data vector pointer of Q7 type */
+    q7_t *px;                /* output data pointer */
+    uint32_t i, row, colCnt; /* loop counters */
+
+    q31_t matData, matData2, vecData, vecData2;
+
+
+    /* Process 4 rows at a time */
+    row = numRows >> 2;
+    i = 0u;
+    px = pDst;
+
+
+
+    /* The following loop performs the dot-product of each row in pSrcA with the vector */
+    while (row > 0) {
+        /* Initialize accumulators */
+        q31_t sum1 = 0;
+        q31_t sum2 = 0;
+        q31_t sum3 = 0;
+        q31_t sum4 = 0;
+
+        /* For every row wise process, the pInVec pointer is set
+         ** to the starting address of the vector */
+        pInVec = pVec;
+
+        /* Loop unrolling: process 4 columns per iteration */
+        colCnt = numCols >> 2;
+
+        /* Initialize row pointers so we can track 4 rows at once */
+        pInA1 = pSrcA + i;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        pInA4 = pInA3 + numCols;
+
+
+        // Inner loop: matrix-vector multiplication
+
+        while (colCnt > 0u) {
+            // Read 4 values from vector
+            vecData = read_q7x4_ia ((q7_t **) &pInVec);
+            vecData2 = __SXTB16(__ROR(vecData, 8));
+            vecData = __SXTB16(vecData);
+            // Read 16 values from the matrix - 4 values from each of 4 rows, and do multiply accumulate
+            matData = read_q7x4_ia ((q7_t **) &pInA1);
+            matData2 = __SXTB16(__ROR(matData, 8));
+            matData = __SXTB16(matData);
+            sum1 = __SMLAD(matData, vecData, sum1);
+            sum1 = __SMLAD(matData2, vecData2, sum1);
+            matData = read_q7x4_ia ((q7_t **) &pInA2);
+            matData2 = __SXTB16(__ROR(matData, 8));
+            matData = __SXTB16(matData);
+            sum2 = __SMLAD(matData, vecData, sum2);
+            sum2 = __SMLAD(matData2, vecData2, sum2);
+            matData = read_q7x4_ia ((q7_t **) &pInA3);
+            matData2 = __SXTB16(__ROR(matData, 8));
+            matData = __SXTB16(matData);
+            sum3 = __SMLAD(matData, vecData, sum3);
+            sum3 = __SMLAD(matData2, vecData2, sum3);
+            matData = read_q7x4_ia ((q7_t **) &pInA4);
+            matData2 = __SXTB16(__ROR(matData, 8));
+            matData = __SXTB16(matData);
+            sum4 = __SMLAD(matData, vecData, sum4);
+            sum4 = __SMLAD(matData2, vecData2, sum4);
+
+            // Decrement the loop counter
+            colCnt--;
+        }
+
+        /* process any remaining columns */
+
+        colCnt = numCols & 3u;
+
+        while (colCnt > 0) {
+            vecData = *pInVec++;
+            sum1 += *pInA1++ * vecData;
+            sum2 += *pInA2++ * vecData;
+            sum3 += *pInA3++ * vecData;
+            sum4 += *pInA4++ * vecData;
+            colCnt--;
+        }
+
+        /* Saturate and store the result in the destination buffer */
+        *px++ = (q7_t)(__SSAT((sum1 >> 7), 8));
+        *px++ = (q7_t)(__SSAT((sum2 >> 7), 8));
+        *px++ = (q7_t)(__SSAT((sum3 >> 7), 8));
+        *px++ = (q7_t)(__SSAT((sum4 >> 7), 8));
+
+        i = i + numCols * 4;
+
+        /* Decrement the row loop counter */
+        row--;
+    }
+
+    /* process any remaining rows */
+    row = numRows & 3u;
+    while (row > 0) {
+
+        q31_t sum = 0;
+        pInVec = pVec;
+        pInA1 = pSrcA + i;
+
+        // loop unrolling - process 4 elements at a time
+        colCnt = numCols >> 2;
+
+        while (colCnt > 0) {
+            vecData = read_q7x4_ia ((q7_t **) &pInVec);
+            vecData2 = __SXTB16(__ROR(vecData, 8));
+            vecData = __SXTB16(vecData);
+            matData = read_q7x4_ia ((q7_t **) &pInA1);
+            matData2 = __SXTB16(__ROR(matData, 8));
+            matData = __SXTB16(matData);
+            sum = __SMLAD(matData, vecData, sum);
+            sum = __SMLAD(matData2, vecData2, sum);
+            colCnt--;
+        }
+
+        // process remainder of row
+        colCnt = numCols & 3u;
+        while (colCnt > 0) {
+            sum += *pInA1++ * *pInVec++;
+            colCnt--;
+        }
+        *px++ = (q7_t)(__SSAT((sum >> 7), 8));
+        i = i + numCols;
+        row--;
+    }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+ * @} end of MatrixMult group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c
new file mode 100755
index 00000000..7c48178e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/QuaternionMathFunctions.c
@@ -0,0 +1,34 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        QuaternionMathFunctions.c
+ * Description:  Combination of all quaternion math function source files.
+ *
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_quaternion_norm_f32.c"
+#include "arm_quaternion_inverse_f32.c"
+#include "arm_quaternion_conjugate_f32.c"
+#include "arm_quaternion_normalize_f32.c"
+#include "arm_quaternion_product_single_f32.c"
+#include "arm_quaternion_product_f32.c"
+#include "arm_quaternion2rotation_f32.c"
+#include "arm_rotation2quaternion_f32.c"
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion2rotation_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion2rotation_f32.c
new file mode 100755
index 00000000..21053415
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion2rotation_f32.c
@@ -0,0 +1,181 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quaternion2rotation_f32.c
+ * Description:  Floating-point quaternion 2 rotation conversion
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupQuaternionMath
+ */
+
+/**
+  @defgroup QuatConv Quaternion conversions
+
+  Conversions between quaternion and rotation representations.
+ */
+
+/**
+  @ingroup QuatConv
+ */
+
+/**
+  @defgroup QuatRot Quaternion to Rotation
+
+  Conversions from quaternion to rotation.
+ */
+
+/**
+  @addtogroup QuatRot
+  @{
+ */
+
+/**
+   @brief Conversion of quaternion to equivalent rotation matrix.
+   @param[in]       pInputQuaternions points to an array of normalized quaternions
+   @param[out]      pOutputRotations points to an array of 3x3 rotations (in row order)
+   @param[in]       nbQuaternions number of quaternions in the array
+   @return none.
+  
+   @par
+   Format of rotation matrix
+   
+   
+   The quaternion a + ib + jc + kd is converted into rotation matrix:
+   <pre>
+     a^2 + b^2 - c^2 - d^2                 2bc - 2ad                 2bd + 2ac
+                 2bc + 2ad     a^2 - b^2 + c^2 - d^2                 2cd - 2ab
+                 2bd - 2ac                 2cd + 2ab     a^2 - b^2 - c^2 + d^2
+   </pre>
+   Rotation matrix is saved in row order : R00 R01 R02 R10 R11 R12 R20 R21 R22
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_quaternion2rotation_f32(const float32_t *pInputQuaternions, 
+    float32_t *pOutputRotations, 
+    uint32_t nbQuaternions)
+{
+  f32x4_t vec0,vec1, vec2 ,vec3;
+  float32_t q2q3, tmp1, tmp2 ;
+
+  for(uint32_t nb=0; nb < nbQuaternions; nb++)
+  {
+
+    // q0 q1 q2 q3
+    vec0 = vld1q(pInputQuaternions);
+
+    // q0^2 q1^2 q2^2 q3^2
+    vec1 = vmulq(vec0,vec0);
+
+    // q0^2 q1q0 q2q0 q3q0
+    vec2 = vmulq_n_f32(vec0, vgetq_lane(vec0,0));
+
+    // 2 (q0^2 q1q0 q2q0 q3q0)
+    vec2 = vmulq_n_f32(vec2, 2.0f);
+    
+
+    // 2 q2q3
+    q2q3 = vgetq_lane(vec0,2) * vgetq_lane(vec0,3);
+    q2q3 = q2q3 * 2.0f;
+
+    // 2 (q0q1 q1^2 q2q1 q3q1)
+    vec3 = vmulq_n_f32(vec0, vgetq_lane(vec0,1));
+    vec3 = vmulq_n_f32(vec3, 2.0f);
+   
+
+    
+    vec0 = vsetq_lane(vgetq_lane(vec1,0) + vgetq_lane(vec1,1),vec0,0);
+    vec0 = vsetq_lane(vgetq_lane(vec0,0) - vgetq_lane(vec1,2),vec0,0);
+    vec0 = vsetq_lane(vgetq_lane(vec0,0) - vgetq_lane(vec1,3),vec0,0);
+    vec0 = vsetq_lane(vgetq_lane(vec3,2) - vgetq_lane(vec2,3),vec0,1);
+    vec0 = vsetq_lane(vgetq_lane(vec3,3) + vgetq_lane(vec2,2),vec0,2);
+    vec0 = vsetq_lane(vgetq_lane(vec3,2) + vgetq_lane(vec2,3),vec0,3);
+
+    vst1q(pOutputRotations, vec0);
+    pOutputRotations += 4;
+
+    tmp1 = vgetq_lane(vec1,0) - vgetq_lane(vec1,1);
+    tmp2 = vgetq_lane(vec1,2) - vgetq_lane(vec1,3);
+
+  
+    vec0 = vsetq_lane(tmp1 + tmp2,vec0,0);
+    vec0 = vsetq_lane(q2q3 - vgetq_lane(vec2,1) ,vec0,1);
+    vec0 = vsetq_lane(vgetq_lane(vec3,3) - vgetq_lane(vec2,2),vec0,2);
+    vec0 = vsetq_lane(q2q3 + vgetq_lane(vec2,1) ,vec0,3);
+
+    vst1q(pOutputRotations, vec0);
+    pOutputRotations += 4;
+
+    *pOutputRotations = tmp1 - tmp2;
+    pOutputRotations ++;
+
+    pInputQuaternions += 4;
+  }
+}
+
+#else
+void arm_quaternion2rotation_f32(const float32_t *pInputQuaternions, 
+    float32_t *pOutputRotations, 
+    uint32_t nbQuaternions)
+{
+   uint32_t nb;
+   for(nb=0; nb < nbQuaternions; nb++)
+   {
+        float32_t q00 = SQ(pInputQuaternions[0 + nb * 4]);
+        float32_t q11 = SQ(pInputQuaternions[1 + nb * 4]);
+        float32_t q22 = SQ(pInputQuaternions[2 + nb * 4]);
+        float32_t q33 = SQ(pInputQuaternions[3 + nb * 4]);
+        float32_t q01 =  pInputQuaternions[0 + nb * 4]*pInputQuaternions[1 + nb * 4];
+        float32_t q02 =  pInputQuaternions[0 + nb * 4]*pInputQuaternions[2 + nb * 4];
+        float32_t q03 =  pInputQuaternions[0 + nb * 4]*pInputQuaternions[3 + nb * 4];
+        float32_t q12 =  pInputQuaternions[1 + nb * 4]*pInputQuaternions[2 + nb * 4];
+        float32_t q13 =  pInputQuaternions[1 + nb * 4]*pInputQuaternions[3 + nb * 4];
+        float32_t q23 =  pInputQuaternions[2 + nb * 4]*pInputQuaternions[3 + nb * 4];
+
+        float32_t xx = q00 + q11 - q22 - q33;
+        float32_t yy = q00 - q11 + q22 - q33;
+        float32_t zz = q00 - q11 - q22 + q33;
+        float32_t xy = 2*(q12 - q03);
+        float32_t xz = 2*(q13 + q02);
+        float32_t yx = 2*(q12 + q03);
+        float32_t yz = 2*(q23 - q01);
+        float32_t zx = 2*(q13 - q02);
+        float32_t zy = 2*(q23 + q01);
+
+        pOutputRotations[0 + nb * 9] = xx; pOutputRotations[1 + nb * 9] = xy; pOutputRotations[2 + nb * 9] = xz;
+        pOutputRotations[3 + nb * 9] = yx; pOutputRotations[4 + nb * 9] = yy; pOutputRotations[5 + nb * 9] = yz;
+        pOutputRotations[6 + nb * 9] = zx; pOutputRotations[7 + nb * 9] = zy; pOutputRotations[8 + nb * 9] = zz;
+   }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of QuatRot group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_conjugate_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_conjugate_f32.c
new file mode 100755
index 00000000..213a5bbc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_conjugate_f32.c
@@ -0,0 +1,98 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quaternion_conjugate_f32.c
+ * Description:  Floating-point quaternion conjugate
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupQuaternionMath
+ */
+
+/**
+  @defgroup QuatConjugate Quaternion Conjugate
+
+  Compute the conjugate of a quaternion.
+ */
+
+/**
+  @addtogroup QuatConjugate
+  @{
+ */
+
+/**
+  @brief         Floating-point quaternion conjugates.
+  @param[in]     pInputQuaternions            points to the input vector of quaternions
+  @param[out]    pConjugateQuaternions        points to the output vector of conjugate quaternions
+  @param[in]     nbQuaternions                number of quaternions in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_quaternion_conjugate_f32(const float32_t *pInputQuaternions, 
+    float32_t *pConjugateQuaternions, 
+    uint32_t nbQuaternions)
+{
+   f32x4_t vec1;
+
+   for(uint32_t i=0; i < nbQuaternions; i++)
+   {
+      vec1 = vld1q(pInputQuaternions);
+      
+
+      vec1 = vsetq_lane_f32(-vgetq_lane(vec1, 0),vec1,0);
+      vec1 = vnegq_f32(vec1);
+
+      vst1q(pConjugateQuaternions, vec1);
+
+
+      pInputQuaternions   += 4;
+      pConjugateQuaternions += 4;
+   }
+}
+#else
+void arm_quaternion_conjugate_f32(const float32_t *pInputQuaternions, 
+    float32_t *pConjugateQuaternions, 
+    uint32_t nbQuaternions)
+{
+   uint32_t i;
+   for(i=0; i < nbQuaternions; i++)
+   {
+
+      pConjugateQuaternions[4 * i + 0] = pInputQuaternions[4 * i + 0];
+      pConjugateQuaternions[4 * i + 1] = -pInputQuaternions[4 * i + 1];
+      pConjugateQuaternions[4 * i + 2] = -pInputQuaternions[4 * i + 2];
+      pConjugateQuaternions[4 * i + 3] = -pInputQuaternions[4 * i + 3];
+   }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of QuatConjugate group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_inverse_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_inverse_f32.c
new file mode 100755
index 00000000..d82bbbf1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_inverse_f32.c
@@ -0,0 +1,114 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quaternion_inverse_f32.c
+ * Description:  Floating-point quaternion inverse
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupQuaternionMath
+ */
+
+/**
+  @defgroup QuatInverse Quaternion Inverse
+
+  Compute the inverse of a quaternion.
+ */
+
+/**
+  @addtogroup QuatInverse
+  @{
+ */
+
+/**
+  @brief         Floating-point quaternion inverse.
+  @param[in]     pInputQuaternions            points to the input vector of quaternions
+  @param[out]    pInverseQuaternions          points to the output vector of inverse quaternions
+  @param[in]     nbQuaternions                number of quaternions in each vector
+  @return        none
+ */
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_quaternion_inverse_f32(const float32_t *pInputQuaternions, 
+  float32_t *pInverseQuaternions,
+  uint32_t nbQuaternions)
+{
+   f32x4_t vec1,vec2;
+   float32_t squaredSum;
+
+   for(uint32_t i=0; i < nbQuaternions; i++)
+   {
+     
+      vec1 = vld1q(pInputQuaternions);
+      vec2 = vmulq(vec1,vec1);
+      squaredSum = vecAddAcrossF32Mve(vec2);
+      
+
+      vec1 = vmulq_n_f32(vec1, 1.0f / squaredSum);
+      vec1 = vsetq_lane_f32(-vgetq_lane(vec1, 0),vec1,0);
+      vec1 = vnegq_f32(vec1);
+
+      vst1q(pInverseQuaternions, vec1);
+
+
+      pInputQuaternions   += 4;
+      pInverseQuaternions += 4;
+
+   }
+}
+
+#else
+void arm_quaternion_inverse_f32(const float32_t *pInputQuaternions, 
+  float32_t *pInverseQuaternions,
+  uint32_t nbQuaternions)
+{
+   float32_t temp;
+
+   uint32_t i;
+   for(i=0; i < nbQuaternions; i++)
+   {
+
+      temp = SQ(pInputQuaternions[4 * i + 0]) +
+             SQ(pInputQuaternions[4 * i + 1]) +
+             SQ(pInputQuaternions[4 * i + 2]) +
+             SQ(pInputQuaternions[4 * i + 3]);
+
+      pInverseQuaternions[4 * i + 0] = pInputQuaternions[4 * i + 0] / temp;
+      pInverseQuaternions[4 * i + 1] = -pInputQuaternions[4 * i + 1] / temp;
+      pInverseQuaternions[4 * i + 2] = -pInputQuaternions[4 * i + 2] / temp;
+      pInverseQuaternions[4 * i + 3] = -pInputQuaternions[4 * i + 3] / temp;
+   }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of QuatInverse group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_norm_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_norm_f32.c
new file mode 100755
index 00000000..af6653a0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_norm_f32.c
@@ -0,0 +1,102 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quaternion_norm_f32.c
+ * Description:  Floating-point quaternion Norm
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupQuaternionMath
+ */
+
+/**
+  @defgroup QuatNorm Quaternion Norm
+
+  Compute the norm of a quaternion.
+ */
+
+/**
+  @addtogroup QuatNorm
+  @{
+ */
+
+/**
+  @brief         Floating-point quaternion Norm.
+  @param[in]     pInputQuaternions       points to the input vector of quaternions
+  @param[out]    pNorms                  points to the output vector of norms
+  @param[in]     nbQuaternions           number of quaternions in the input vector
+  @return        none
+ */
+
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_quaternion_norm_f32(const float32_t *pInputQuaternions, 
+  float32_t *pNorms,
+  uint32_t nbQuaternions)
+{
+  f32x4_t vec1;
+  float32_t squaredSum;
+
+  for(uint32_t i=0; i < nbQuaternions; i++)
+  {
+       vec1 = vld1q(pInputQuaternions);
+       vec1 = vmulq(vec1,vec1);
+       squaredSum = vecAddAcrossF32Mve(vec1);
+       arm_sqrt_f32(squaredSum,pNorms);
+
+       pInputQuaternions+= 4;
+       pNorms ++;
+  }
+
+}
+
+#else
+
+void arm_quaternion_norm_f32(const float32_t *pInputQuaternions, 
+  float32_t *pNorms,
+  uint32_t nbQuaternions)
+{
+   float32_t temp;
+   uint32_t i;
+
+   for(i=0; i < nbQuaternions; i++)
+   {
+      temp = SQ(pInputQuaternions[4 * i + 0]) +
+             SQ(pInputQuaternions[4 * i + 1]) +
+             SQ(pInputQuaternions[4 * i + 2]) +
+             SQ(pInputQuaternions[4 * i + 3]);
+      pNorms[i] = sqrtf(temp);
+   }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of QuatNorm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_normalize_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_normalize_f32.c
new file mode 100755
index 00000000..605e558b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_normalize_f32.c
@@ -0,0 +1,107 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quaternion_normalize_f32.c
+ * Description:  Floating-point quaternion normalization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupQuaternionMath
+ */
+
+/**
+  @defgroup QuatNormalized Quaternion normalization
+
+  Compute a normalized quaternion.
+ */
+
+/**
+  @addtogroup QuatNormalized
+  @{
+ */
+
+/**
+  @brief         Floating-point normalization of quaternions.
+  @param[in]     pInputQuaternions            points to the input vector of quaternions
+  @param[out]    pNormalizedQuaternions       points to the output vector of normalized quaternions
+  @param[in]     nbQuaternions                number of quaternions in each vector
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_quaternion_normalize_f32(const float32_t *pInputQuaternions, 
+    float32_t *pNormalizedQuaternions, 
+    uint32_t nbQuaternions)
+{
+   f32x4_t vec1,vec2;
+   float32_t squaredSum,norm;
+
+   for(uint32_t i=0; i < nbQuaternions; i++)
+   {
+      vec1 = vld1q(pInputQuaternions);
+      vec2 = vmulq(vec1,vec1);
+      squaredSum = vecAddAcrossF32Mve(vec2);
+      arm_sqrt_f32(squaredSum,&norm);
+      vec1 = vmulq_n_f32(vec1, 1.0f / norm);
+      vst1q(pNormalizedQuaternions, vec1);
+
+      pInputQuaternions += 4;
+      pNormalizedQuaternions += 4;
+
+   }
+}
+
+#else
+void arm_quaternion_normalize_f32(const float32_t *pInputQuaternions, 
+    float32_t *pNormalizedQuaternions, 
+    uint32_t nbQuaternions)
+{
+   float32_t temp;
+
+   uint32_t i;
+   for(i=0; i < nbQuaternions; i++)
+   {
+      temp = SQ(pInputQuaternions[4 * i + 0]) +
+             SQ(pInputQuaternions[4 * i + 1]) +
+             SQ(pInputQuaternions[4 * i + 2]) +
+             SQ(pInputQuaternions[4 * i + 3]);
+      temp = sqrtf(temp);
+
+      pNormalizedQuaternions[4 * i + 0] = pInputQuaternions[4 * i + 0] / temp;
+      pNormalizedQuaternions[4 * i + 1] = pInputQuaternions[4 * i + 1] / temp;
+      pNormalizedQuaternions[4 * i + 2] = pInputQuaternions[4 * i + 2] / temp;
+      pNormalizedQuaternions[4 * i + 3] = pInputQuaternions[4 * i + 3] / temp;
+   }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of QuatNormalized group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_f32.c
new file mode 100755
index 00000000..83ebf5ef
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_f32.c
@@ -0,0 +1,149 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quaternion_product_f32.c
+ * Description:  Floating-point quaternion product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+/**
+  @ingroup groupQuaternionMath
+ */
+
+/**
+  @defgroup QuatProd Quaternion Product
+
+  Compute the product of quaternions.
+ */
+
+/**
+  @ingroup QuatProd
+ */
+
+/**
+  @defgroup QuatProdVect Elementwise Quaternion Product
+
+  Compute the elementwise product of quaternions.
+ */
+
+/**
+  @addtogroup QuatProdVect
+  @{
+ */
+
+/**
+  @brief         Floating-point elementwise product two quaternions.
+  @param[in]     qa                  first array of quaternions
+  @param[in]     qb                  second array of quaternions
+  @param[out]    qr                   elementwise product of quaternions
+  @param[in]     nbQuaternions       number of quaternions in the array
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_quaternion_product_f32(const float32_t *qa, 
+    const float32_t *qb, 
+    float32_t *qr,
+    uint32_t nbQuaternions)
+{
+    static uint32_t patternA[4] = { 0, 1, 0, 1 };
+    static uint32_t patternB[4] = { 3, 2, 3, 2 };
+    static uint32_t patternC[4] = { 3, 2, 1, 0 };
+    static float32_t   signA[4] = { -1, -1, 1, 1 };
+
+    uint32x4_t vecA = vld1q_u32(patternA);
+    uint32x4_t vecB = vld1q_u32(patternB);
+    uint32x4_t vecC = vld1q_u32(patternC);
+    f32x4_t vecSignA = vld1q_f32(signA);
+
+    while (nbQuaternions > 0U)
+    {
+        f32x4_t vecTmpA, vecTmpB, vecAcc;
+
+        vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecA);
+        vecTmpB = vld1q(qb);
+        /*
+         * vcmul(r, [a1, a2, a1, a2], [b1, b2, b3, b4], 0)
+         */
+        vecAcc = vcmulq(vecTmpA, vecTmpB);
+        /*
+         * vcmla(r, [a1, a2, a1, a2], [b1, b2, b3, b4], 90)
+         */
+        vecAcc = vcmlaq_rot90(vecAcc, vecTmpA, vecTmpB);
+
+        vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecB);
+        vecTmpB = vldrwq_gather_shifted_offset_f32(qb, vecC);
+        /*
+         * build [-b4, -b3, b2, b1]
+         */
+        vecTmpB = vecTmpB * vecSignA;
+        /*
+         * vcmla(r, [a4, a3, a4, a3], [-b4, -b3, b2, b1], 270)
+         */
+        vecAcc = vcmlaq_rot270(vecAcc, vecTmpA, vecTmpB);
+        /*
+         * vcmla(r, [a4, a3, a4, a3], [-b4, -b3, b2, b1], 0)
+         */
+        vecAcc = vcmlaq(vecAcc, vecTmpA, vecTmpB);
+        /*
+         * store accumulator
+         */
+        vst1q_f32(qr, vecAcc);
+
+        /* move to next quaternion */
+        qa += 4;
+        qb += 4;
+        qr += 4;
+
+        nbQuaternions--;
+    }
+}
+
+#else
+
+void arm_quaternion_product_f32(const float32_t *qa, 
+    const float32_t *qb, 
+    float32_t *qr,
+    uint32_t nbQuaternions)
+{
+   uint32_t i;
+   for(i=0; i < nbQuaternions; i++)
+   {
+     arm_quaternion_product_single_f32(qa, qb, qr);
+
+     qa += 4;
+     qb += 4;
+     qr += 4;
+   }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of QuatProdVect group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_single_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_single_f32.c
new file mode 100755
index 00000000..96f23e99
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_quaternion_product_single_f32.c
@@ -0,0 +1,107 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quaternion_product_single_f32.c
+ * Description:  Floating-point quaternion product
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+
+/**
+  @ingroup QuatProd
+ */
+
+/**
+  @defgroup QuatProdSingle Quaternion Product
+
+  Compute the  product of two quaternions.
+ */
+
+/**
+  @addtogroup QuatProdSingle
+  @{
+ */
+
+/**
+  @brief         Floating-point product of two quaternions.
+  @param[in]     qa       first quaternion
+  @param[in]     qb       second quaternion
+  @param[out]    qr       product of two quaternions
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_quaternion_product_single_f32(const float32_t *qa, 
+    const float32_t *qb, 
+    float32_t *qr)
+{
+    static uint32_t patternA[4] = { 0, 1, 0, 1 };
+    static uint32_t patternB[4] = { 3, 2, 3, 2 };
+    static uint32_t patternC[4] = { 3, 2, 1, 0 };
+    static float32_t signA[4] = { -1, -1, 1, 1 };
+
+    uint32x4_t vecA = vld1q_u32(patternA);
+    uint32x4_t vecB = vld1q_u32(patternB);
+    uint32x4_t vecC = vld1q_u32(patternC);
+    f32x4_t vecSignA = vld1q_f32(signA);
+
+
+    f32x4_t vecTmpA, vecTmpB, vecAcc;
+
+    vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecA);
+    vecTmpB = vld1q_f32(qb);
+
+    vecAcc = vcmulq_f32(vecTmpA, vecTmpB);
+    vecAcc = vcmlaq_rot90_f32(vecAcc, vecTmpA, vecTmpB);
+
+    vecTmpA = vldrwq_gather_shifted_offset_f32(qa, vecB);
+    vecTmpB = vldrwq_gather_shifted_offset_f32(qb, vecC);
+
+    vecTmpB = vecTmpB * vecSignA;
+
+    vecAcc = vcmlaq_rot270_f32(vecAcc, vecTmpA, vecTmpB);
+    vecAcc = vcmlaq_f32(vecAcc, vecTmpA, vecTmpB);
+
+    vst1q_f32(qr, vecAcc);
+}
+
+#else
+void arm_quaternion_product_single_f32(const float32_t *qa, 
+    const float32_t *qb, 
+    float32_t *qr)
+{
+    qr[0] = qa[0] * qb[0] - qa[1] * qb[1] - qa[2] * qb[2] - qa[3] * qb[3];
+    qr[1] = qa[0] * qb[1] + qa[1] * qb[0] + qa[2] * qb[3] - qa[3] * qb[2];
+    qr[2] = qa[0] * qb[2] + qa[2] * qb[0] + qa[3] * qb[1] - qa[1] * qb[3];
+    qr[3] = qa[0] * qb[3] + qa[3] * qb[0] + qa[1] * qb[2] - qa[2] * qb[1];
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of QuatProdSingle group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_rotation2quaternion_f32.c b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_rotation2quaternion_f32.c
new file mode 100755
index 00000000..5d57492b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/QuaternionMathFunctions/arm_rotation2quaternion_f32.c
@@ -0,0 +1,225 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rotation2quaternion_f32.c
+ * Description:  Floating-point rotation to quaternion conversion
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/quaternion_math_functions.h"
+#include <math.h>
+
+#define RI(x,y) r[(3*(x) + (y))]
+
+
+/**
+  @ingroup QuatConv
+ */
+
+/**
+  @defgroup RotQuat Rotation to Quaternion
+
+  Conversions from rotation to quaternion.
+ */
+
+/**
+  @addtogroup RotQuat
+  @{
+ */
+
+/**
+ * @brief Conversion of a rotation matrix to an equivalent quaternion.
+ * @param[in]       pInputRotations points to an array 3x3 rotation matrix (in row order)
+ * @param[out]      pOutputQuaternions points to an array quaternions
+ * @param[in]       nbQuaternions number of quaternions in the array
+ * @return none.
+ *
+ * q and -q are representing the same rotation. This ambiguity must be taken into
+ * account when using the output of this function.
+ * 
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+#define R00  vgetq_lane(q1,0)
+#define R01  vgetq_lane(q1,1)
+#define R02  vgetq_lane(q1,2)
+#define R10  vgetq_lane(q1,3)
+#define R11  vgetq_lane(q2,0)
+#define R12  vgetq_lane(q2,1)
+#define R20  vgetq_lane(q2,2)
+#define R21  vgetq_lane(q2,3)
+#define R22  ro22
+
+void arm_rotation2quaternion_f32(const float32_t *pInputRotations, 
+    float32_t *pOutputQuaternions,  
+    uint32_t nbQuaternions)
+{
+   float32_t ro22, trace;
+   f32x4_t q1,q2, q; 
+
+   float32_t doubler;
+   float32_t s;
+
+   q = vdupq_n_f32(0.0f);
+
+   for(uint32_t nb=0; nb < nbQuaternions; nb++)
+   {
+      q1 = vld1q(pInputRotations);
+      pInputRotations += 4;
+
+      q2 = vld1q(pInputRotations);
+      pInputRotations += 4;
+
+      ro22 = *pInputRotations++;
+
+      trace = R00 + R11 + R22;
+
+
+      if (trace > 0)
+      {
+        (void)arm_sqrt_f32(trace + 1.0f, &doubler) ; // invs=4*qw
+        doubler = 2.0f*doubler;
+        s = 1.0f / doubler;
+
+        q1 = vmulq_n_f32(q1,s);
+        q2 = vmulq_n_f32(q2,s);
+
+        q[0] = 0.25f * doubler;
+        q[1] = R21 - R12;
+        q[2] = R02 - R20;
+        q[3] = R10 - R01;
+      }
+      else if ((R00 > R11) && (R00 > R22) )
+      {
+        (void)arm_sqrt_f32(1.0f + R00 - R11 - R22,&doubler); // invs=4*qx
+        doubler = 2.0f*doubler;
+        s = 1.0f / doubler;
+
+        q1 = vmulq_n_f32(q1,s);
+        q2 = vmulq_n_f32(q2,s);
+
+        q[0] = R21 - R12;
+        q[1] = 0.25f * doubler;
+        q[2] = R01 + R10;
+        q[3] = R02 + R20;
+      }
+      else if (R11 > R22)
+      {
+        (void)arm_sqrt_f32(1.0f + R11 - R00 - R22,&doubler); // invs=4*qy
+        doubler = 2.0f*doubler;
+        s = 1.0f / doubler;
+
+        q1 = vmulq_n_f32(q1,s);
+        q2 = vmulq_n_f32(q2,s);
+
+        q[0] = R02 - R20;
+        q[1] = R01 + R10;
+        q[2] = 0.25f * doubler;
+        q[3] = R12 + R21;
+      }
+      else
+      {
+        (void)arm_sqrt_f32(1.0f + R22 - R00 - R11,&doubler); // invs=4*qz
+        doubler = 2.0f*doubler;
+        s = 1.0f / doubler;
+
+        q1 = vmulq_n_f32(q1,s);
+        q2 = vmulq_n_f32(q2,s);
+
+        q[0] = R10 - R01;
+        q[1] = R02 + R20;
+        q[2] = R12 + R21;
+        q[3] = 0.25f * doubler;
+      }
+
+      vst1q(pOutputQuaternions, q);
+      pOutputQuaternions += 4;
+
+   }
+}
+
+#else
+void arm_rotation2quaternion_f32(const float32_t *pInputRotations, 
+    float32_t *pOutputQuaternions,  
+    uint32_t nbQuaternions)
+{
+   uint32_t nb;
+   for(nb=0; nb < nbQuaternions; nb++)
+   {
+       const float32_t *r=&pInputRotations[nb*9];
+       float32_t *q=&pOutputQuaternions[nb*4];
+
+       float32_t trace = RI(0,0) + RI(1,1) + RI(2,2);
+
+       float32_t doubler;
+       float32_t s;
+
+
+
+      if (trace > 0.0f)
+      {
+        doubler = sqrtf(trace + 1.0f) * 2.0f; // invs=4*qw
+        s = 1.0f / doubler;
+        q[0] = 0.25f * doubler;
+        q[1] = (RI(2,1) - RI(1,2)) * s;
+        q[2] = (RI(0,2) - RI(2,0)) * s;
+        q[3] = (RI(1,0) - RI(0,1)) * s;
+      }
+      else if ((RI(0,0) > RI(1,1)) && (RI(0,0) > RI(2,2)) )
+      {
+        doubler = sqrtf(1.0f + RI(0,0) - RI(1,1) - RI(2,2)) * 2.0f; // invs=4*qx
+        s = 1.0f / doubler;
+        q[0] = (RI(2,1) - RI(1,2)) * s;
+        q[1] = 0.25f * doubler;
+        q[2] = (RI(0,1) + RI(1,0)) * s;
+        q[3] = (RI(0,2) + RI(2,0)) * s;
+      }
+      else if (RI(1,1) > RI(2,2))
+      {
+        doubler = sqrtf(1.0f + RI(1,1) - RI(0,0) - RI(2,2)) * 2.0f; // invs=4*qy
+        s = 1.0f / doubler;
+        q[0] = (RI(0,2) - RI(2,0)) * s;
+        q[1] = (RI(0,1) + RI(1,0)) * s;
+        q[2] = 0.25f * doubler;
+        q[3] = (RI(1,2) + RI(2,1)) * s;
+      }
+      else
+      {
+        doubler = sqrtf(1.0f + RI(2,2) - RI(0,0) - RI(1,1)) * 2.0f; // invs=4*qz
+        s = 1.0f / doubler;
+        q[0] = (RI(1,0) - RI(0,1)) * s;
+        q[1] = (RI(0,2) + RI(2,0)) * s;
+        q[2] = (RI(1,2) + RI(2,1)) * s;
+        q[3] = 0.25f * doubler;
+      }
+
+    }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of RotQuat group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c
new file mode 100644
index 00000000..85f19b9e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/SVMFunctions.c
@@ -0,0 +1,36 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BayesFunctions.c
+ * Description:  Combination of all SVM function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_svm_linear_init_f32.c"
+#include "arm_svm_linear_predict_f32.c"
+#include "arm_svm_polynomial_init_f32.c"
+#include "arm_svm_polynomial_predict_f32.c"
+#include "arm_svm_rbf_init_f32.c"
+#include "arm_svm_rbf_predict_f32.c"
+#include "arm_svm_sigmoid_init_f32.c"
+#include "arm_svm_sigmoid_predict_f32.c"
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c
new file mode 100755
index 00000000..74d26652
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/SVMFunctionsF16.c
@@ -0,0 +1,36 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        BayesFunctions.c
+ * Description:  Combination of all SVM function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_svm_linear_init_f16.c"
+#include "arm_svm_linear_predict_f16.c"
+#include "arm_svm_polynomial_init_f16.c"
+#include "arm_svm_polynomial_predict_f16.c"
+#include "arm_svm_rbf_init_f16.c"
+#include "arm_svm_rbf_predict_f16.c"
+#include "arm_svm_sigmoid_init_f16.c"
+#include "arm_svm_sigmoid_predict_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f16.c
new file mode 100755
index 00000000..a3ebc7f7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f16.c
@@ -0,0 +1,98 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_linear_init_f16.c
+ * Description:  SVM Linear Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+ * @defgroup groupSVM SVM Functions
+ *
+ */
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup linearsvm Linear SVM
+
+  Linear SVM classifier
+ */
+
+/**
+ * @addtogroup linearsvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM linear instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      Parameters for the SVM function
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @return none.
+ *
+ */
+
+
+void arm_svm_linear_init_f16(arm_svm_linear_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t *classes)
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+}
+
+
+
+/**
+ * @} end of linearsvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c
new file mode 100755
index 00000000..75395aa9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_init_f32.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_linear_init_f32.c
+ * Description:  SVM Linear Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+ * @defgroup groupSVM SVM Functions
+ *
+ */
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup linearsvm Linear SVM
+
+  Linear SVM classifier
+ */
+
+/**
+ * @addtogroup linearsvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM linear instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      Parameters for the SVM function
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @return none.
+ *
+ */
+
+
+void arm_svm_linear_init_f32(arm_svm_linear_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t *classes)
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+}
+
+
+
+/**
+ * @} end of linearsvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c
new file mode 100755
index 00000000..fe907e5e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c
@@ -0,0 +1,314 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_linear_predict_f16.c
+ * Description:  SVM Linear Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup linearsvm
+ * @{
+ */
+
+
+/**
+ * @brief SVM linear prediction
+ * @param[in]    S          Pointer to an instance of the linear SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_svm_linear_predict_f16(
+    const arm_svm_linear_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float16_t *pSupport = S->supportVectors;
+    const float16_t *pSrcA = pSupport;
+    const float16_t *pInA0;
+    const float16_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float16_t *pDualCoef = S->dualCoefficients;
+    _Float16       sum = S->intercept;
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) 
+    {
+        const float16_t *pInA2, *pInA3;
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1, acc2, acc3;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        acc2 = vdupq_n_f16(0.0f);
+        acc3 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 8;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 8;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA2Vec, p0);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA3Vec, p0);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        acc0 = vmulq_n_f16(acc0,*pDualCoef++);
+        acc0 = vfmaq_n_f16(acc0,acc1,*pDualCoef++);
+        acc0 = vfmaq_n_f16(acc0,acc2,*pDualCoef++);
+        acc0 = vfmaq_n_f16(acc0,acc3,*pDualCoef++);
+
+        sum += (_Float16)vecAddAcrossF16Mve(acc0);
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parallel
+     */
+    if (row >= 2) {
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        acc0 = vmulq_n_f16(acc0,*pDualCoef++);
+        acc0 = vfmaq_n_f16(acc0,acc1,*pDualCoef++);
+
+        sum += (_Float16)vecAddAcrossF16Mve(acc0);
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f16x8_t         vecIn, acc0;
+        float16_t const *pSrcA0Vec, *pInVec;
+        float16_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        sum += (_Float16)*pDualCoef++ * (_Float16)vecAddAcrossF16Mve(acc0);
+
+    }
+
+    *pResult = S->classes[STEP(sum)];
+}
+
+#else
+void arm_svm_linear_predict_f16(
+    const arm_svm_linear_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+    _Float16 sum=S->intercept;
+    _Float16 dot=0;
+    uint32_t i,j;
+    const float16_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = (_Float16)dot + (_Float16)in[j]* (_Float16)*pSupport++;
+        }
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)dot;
+    }
+    *pResult=S->classes[STEP(sum)];
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of linearsvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c
new file mode 100755
index 00000000..caf09df0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_linear_predict_f32.c
@@ -0,0 +1,461 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_linear_predict_f32.c
+ * Description:  SVM Linear Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup linearsvm
+ * @{
+ */
+
+
+/**
+ * @brief SVM linear prediction
+ * @param[in]    S          Pointer to an instance of the linear SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_svm_linear_predict_f32(
+    const arm_svm_linear_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float32_t *pSupport = S->supportVectors;
+    const float32_t *pSrcA = pSupport;
+    const float32_t *pInA0;
+    const float32_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float32_t *pDualCoef = S->dualCoefficients;
+    float32_t       sum = S->intercept;
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) 
+    {
+        const float32_t *pInA2, *pInA3;
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1, acc2, acc3;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        acc2 = vdupq_n_f32(0.0f);
+        acc3 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 4;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 4;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA2Vec, p0);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA3Vec, p0);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+
+        acc0 = vmulq_n_f32(acc0,*pDualCoef++);
+        acc0 = vfmaq_n_f32(acc0,acc1,*pDualCoef++);
+        acc0 = vfmaq_n_f32(acc0,acc2,*pDualCoef++);
+        acc0 = vfmaq_n_f32(acc0,acc3,*pDualCoef++);
+
+        sum += vecAddAcrossF32Mve(acc0);
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parallel
+     */
+    if (row >= 2) {
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        acc0 = vmulq_n_f32(acc0,*pDualCoef++);
+        acc0 = vfmaq_n_f32(acc0,acc1,*pDualCoef++);
+
+        sum += vecAddAcrossF32Mve(acc0);
+
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f32x4_t         vecIn, acc0;
+        float32_t const *pSrcA0Vec, *pInVec;
+        float32_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        sum += *pDualCoef++ * vecAddAcrossF32Mve(acc0);
+
+    }
+
+    *pResult = S->classes[STEP(sum)];
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+void arm_svm_linear_predict_f32(
+    const arm_svm_linear_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum = S->intercept;
+   
+    float32_t dot;
+    float32x4_t dotV; 
+
+    float32x4_t accuma,accumb,accumc,accumd,accum;
+    float32x2_t accum2;
+    float32x4_t vec1;
+
+    float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
+
+    uint32_t blkCnt;   
+    uint32_t vectorBlkCnt;   
+
+    const float32_t *pIn = in;
+
+    const float32_t *pSupport = S->supportVectors;
+
+    const float32_t *pSupporta = S->supportVectors;
+    const float32_t *pSupportb;
+    const float32_t *pSupportc;
+    const float32_t *pSupportd;
+
+    pSupportb = pSupporta + S->vectorDimension;
+    pSupportc = pSupportb + S->vectorDimension;
+    pSupportd = pSupportc + S->vectorDimension;
+
+    const float32_t *pDualCoefs = S->dualCoefficients;
+
+    vectorBlkCnt = S->nbOfSupportVectors >> 2;
+
+    while (vectorBlkCnt > 0U)
+    {
+        accuma = vdupq_n_f32(0);
+        accumb = vdupq_n_f32(0);
+        accumc = vdupq_n_f32(0);
+        accumd = vdupq_n_f32(0);
+
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2a = vld1q_f32(pSupporta);
+            vec2b = vld1q_f32(pSupportb);
+            vec2c = vld1q_f32(pSupportc);
+            vec2d = vld1q_f32(pSupportd);
+
+            pIn += 4;
+            pSupporta += 4;
+            pSupportb += 4;
+            pSupportc += 4;
+            pSupportd += 4;
+
+            accuma = vmlaq_f32(accuma, vec1,vec2a);
+            accumb = vmlaq_f32(accumb, vec1,vec2b);
+            accumc = vmlaq_f32(accumc, vec1,vec2c);
+            accumd = vmlaq_f32(accumd, vec1,vec2d);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
+
+        accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
+
+        accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
+
+        accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3);
+
+            pIn++;
+
+            blkCnt -- ;
+        }
+
+        vec1 = vld1q_f32(pDualCoefs);
+        pDualCoefs += 4; 
+
+        accum = vmulq_f32(vec1,dotV);
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+        pSupporta += 3*S->vectorDimension;
+        pSupportb += 3*S->vectorDimension;
+        pSupportc += 3*S->vectorDimension;
+        pSupportd += 3*S->vectorDimension;
+
+        vectorBlkCnt -- ;
+    }
+
+    pSupport = pSupporta;
+    vectorBlkCnt = S->nbOfSupportVectors & 3;
+    while (vectorBlkCnt > 0U)
+    {
+        accum = vdupq_n_f32(0);
+        dot = 0.0f;
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2 = vld1q_f32(pSupport);
+            pIn += 4;
+            pSupport += 4;
+
+            accum = vmlaq_f32(accum, vec1,vec2);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+            dot = dot + *pIn++ * *pSupport++;
+
+            blkCnt -- ;
+        }
+
+        sum += *pDualCoefs++ * dot;
+        vectorBlkCnt -- ;
+    }
+
+    *pResult=S->classes[STEP(sum)];
+}
+#else
+void arm_svm_linear_predict_f32(
+    const arm_svm_linear_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum=S->intercept;
+    float32_t dot=0;
+    uint32_t i,j;
+    const float32_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = dot + in[j]* *pSupport++;
+        }
+        sum += S->dualCoefficients[i] * dot;
+    }
+    *pResult=S->classes[STEP(sum)];
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of linearsvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f16.c
new file mode 100755
index 00000000..558ab450
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f16.c
@@ -0,0 +1,103 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_polynomial_init_f16.c
+ * Description:  SVM Polynomial Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup polysvm Polynomial SVM
+
+  Polynomial SVM classifier
+ */
+
+/**
+ * @addtogroup polysvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM polynomial instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    degree                 Polynomial degree
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+
+void arm_svm_polynomial_init_f16(arm_svm_polynomial_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t *classes,
+  int32_t      degree,
+  float16_t coef0,
+  float16_t gamma
+  )
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+   S->degree = degree;
+   S->coef0 = coef0;
+   S->gamma = gamma;
+}
+
+
+
+/**
+ * @} end of polysvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c
new file mode 100755
index 00000000..7d33cd79
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_init_f32.c
@@ -0,0 +1,97 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_polynomial_init_f32.c
+ * Description:  SVM Polynomial Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup polysvm Polynomial SVM
+
+  Polynomial SVM classifier
+ */
+
+/**
+ * @addtogroup polysvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM polynomial instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    degree                 Polynomial degree
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+
+void arm_svm_polynomial_init_f32(arm_svm_polynomial_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t *classes,
+  int32_t      degree,
+  float32_t coef0,
+  float32_t gamma
+  )
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+   S->degree = degree;
+   S->coef0 = coef0;
+   S->gamma = gamma;
+}
+
+
+
+/**
+ * @} end of polysvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c
new file mode 100755
index 00000000..724f286d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c
@@ -0,0 +1,369 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_polynomial_predict_f16.c
+ * Description:  SVM Polynomial Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+#if !defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_AUTOVECTORIZE)
+
+/*
+
+_Float16 is not supported in g++ so we avoid putting _Float16 definitions
+in the public headers.
+
+This function should at some point be moved in FastMath.
+
+*/
+__STATIC_INLINE float16_t arm_exponent_f16(float16_t x, int32_t nb)
+{
+    float16_t r = x;
+    nb --;
+    while(nb > 0)
+    {
+        r = (_Float16)r * (_Float16)x;
+        nb--;
+    }
+    return(r);
+}
+#endif
+
+/**
+ * @addtogroup polysvm
+ * @{
+ */
+
+
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+/**
+ * @brief SVM polynomial prediction
+ * @param[in]    S          Pointer to an instance of the polynomial SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+void arm_svm_polynomial_predict_f16(
+    const arm_svm_polynomial_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float16_t *pSupport = S->supportVectors;
+    const float16_t *pSrcA = pSupport;
+    const float16_t *pInA0;
+    const float16_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float16_t *pDualCoef = S->dualCoefficients;
+    _Float16       sum = S->intercept;
+    f16x8_t         vSum = vdupq_n_f16(0.0f);
+
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) {
+        const float16_t *pInA2, *pInA3;
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1, acc2, acc3;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        acc2 = vdupq_n_f16(0.0f);
+        acc3 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 8;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 8;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA2Vec, p0);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA3Vec, p0);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc2), vtmp, 2);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc3), vtmp, 3);
+
+        vSum = vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                             arm_vec_exponent_f16
+                             (vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0), 
+                                S->degree),vctp16q(4));
+        
+        pDualCoef += 4;
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2) {
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1);
+
+        vSum = vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                             arm_vec_exponent_f16
+                             (vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0), S->degree), 
+                             vctp16q(2));
+        
+        pDualCoef += 2;
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f16x8_t         vecIn, acc0;
+        float16_t const *pSrcA0Vec, *pInVec;
+        float16_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+        vSum = vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                             arm_vec_exponent_f16
+                             (vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0), S->degree), 
+                             vctp16q(1));
+    }
+    sum += (_Float16)vecAddAcrossF16Mve(vSum);
+
+    
+    *pResult = S->classes[STEP(sum)];
+}
+
+#else
+
+
+/**
+ * @brief SVM polynomial prediction
+ * @param[in]    S          Pointer to an instance of the polynomial SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+void arm_svm_polynomial_predict_f16(
+    const arm_svm_polynomial_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+    _Float16 sum=S->intercept;
+    _Float16 dot=0;
+    uint32_t i,j;
+    const float16_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = (_Float16)dot + (_Float16)in[j]* (_Float16)*pSupport++;
+        }
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)arm_exponent_f16((_Float16)S->gamma * (_Float16)dot + (_Float16)S->coef0, S->degree);
+    }
+
+    *pResult=S->classes[STEP(sum)];
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of polysvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c
new file mode 100755
index 00000000..13b1f84c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f32.c
@@ -0,0 +1,490 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_polynomial_predict_f32.c
+ * Description:  SVM Polynomial Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include "arm_vec_math.h"
+#endif
+
+/**
+ * @addtogroup polysvm
+ * @{
+ */
+
+
+/**
+ * @brief SVM polynomial prediction
+ * @param[in]    S          Pointer to an instance of the polynomial SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+void arm_svm_polynomial_predict_f32(
+    const arm_svm_polynomial_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float32_t *pSupport = S->supportVectors;
+    const float32_t *pSrcA = pSupport;
+    const float32_t *pInA0;
+    const float32_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float32_t *pDualCoef = S->dualCoefficients;
+    float32_t       sum = S->intercept;
+    f32x4_t         vSum = vdupq_n_f32(0.0f);
+
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) {
+        const float32_t *pInA2, *pInA3;
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1, acc2, acc3;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        acc2 = vdupq_n_f32(0.0f);
+        acc3 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 4;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 4;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA2Vec, p0);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA3Vec, p0);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3);
+
+        vSum = vfmaq_f32(vSum, vld1q(pDualCoef),
+                             arm_vec_exponent_f32
+                             (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree));
+        
+        pDualCoef += 4;
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2) {
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
+
+        vSum = vfmaq_m_f32(vSum, vld1q(pDualCoef),
+                             arm_vec_exponent_f32
+                             (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree), 
+                             vctp32q(2));
+        
+        pDualCoef += 2;
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f32x4_t         vecIn, acc0;
+        float32_t const *pSrcA0Vec, *pInVec;
+        float32_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+        vSum = vfmaq_m_f32(vSum, vld1q(pDualCoef),
+                             arm_vec_exponent_f32
+                             (vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0), S->degree), 
+                             vctp32q(1));
+    }
+    sum += vecAddAcrossF32Mve(vSum);
+
+    
+    *pResult = S->classes[STEP(sum)];
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+void arm_svm_polynomial_predict_f32(
+    const arm_svm_polynomial_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum = S->intercept;
+   
+    float32_t dot;
+    float32x4_t dotV; 
+
+    float32x4_t accuma,accumb,accumc,accumd,accum;
+    float32x2_t accum2;
+    float32x4_t vec1;
+    float32x4_t coef0 = vdupq_n_f32(S->coef0);
+
+    float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
+
+    uint32_t blkCnt;   
+    uint32_t vectorBlkCnt;   
+
+    const float32_t *pIn = in;
+
+    const float32_t *pSupport = S->supportVectors;
+
+    const float32_t *pSupporta = S->supportVectors;
+    const float32_t *pSupportb;
+    const float32_t *pSupportc;
+    const float32_t *pSupportd;
+
+    pSupportb = pSupporta + S->vectorDimension;
+    pSupportc = pSupportb + S->vectorDimension;
+    pSupportd = pSupportc + S->vectorDimension;
+
+    const float32_t *pDualCoefs = S->dualCoefficients;
+
+    vectorBlkCnt = S->nbOfSupportVectors >> 2;
+    while (vectorBlkCnt > 0U)
+    {
+        accuma = vdupq_n_f32(0);
+        accumb = vdupq_n_f32(0);
+        accumc = vdupq_n_f32(0);
+        accumd = vdupq_n_f32(0);
+
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2a = vld1q_f32(pSupporta);
+            vec2b = vld1q_f32(pSupportb);
+            vec2c = vld1q_f32(pSupportc);
+            vec2d = vld1q_f32(pSupportd);
+
+            pIn += 4;
+            pSupporta += 4;
+            pSupportb += 4;
+            pSupportc += 4;
+            pSupportd += 4;
+
+            accuma = vmlaq_f32(accuma, vec1,vec2a);
+            accumb = vmlaq_f32(accumb, vec1,vec2b);
+            accumc = vmlaq_f32(accumc, vec1,vec2c);
+            accumd = vmlaq_f32(accumd, vec1,vec2d);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
+
+        accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
+
+        accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
+
+        accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3);
+
+            pIn++;
+
+            blkCnt -- ;
+        }
+
+        vec1 = vld1q_f32(pDualCoefs);
+        pDualCoefs += 4; 
+
+        // To vectorize later
+        dotV = vmulq_n_f32(dotV, S->gamma);
+        dotV = vaddq_f32(dotV, coef0);
+
+        dotV = arm_vec_exponent_f32(dotV,S->degree);
+
+        accum = vmulq_f32(vec1,dotV);
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+        pSupporta += 3*S->vectorDimension;
+        pSupportb += 3*S->vectorDimension;
+        pSupportc += 3*S->vectorDimension;
+        pSupportd += 3*S->vectorDimension;
+
+        vectorBlkCnt -- ;
+    }
+
+    pSupport = pSupporta;
+    vectorBlkCnt = S->nbOfSupportVectors & 3;
+
+    while (vectorBlkCnt > 0U)
+    {
+        accum = vdupq_n_f32(0);
+        dot = 0.0f;
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2 = vld1q_f32(pSupport);
+            pIn += 4;
+            pSupport += 4;
+
+            accum = vmlaq_f32(accum, vec1,vec2);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+            dot = dot + *pIn++ * *pSupport++;
+
+            blkCnt -- ;
+        }
+
+        sum += *pDualCoefs++ * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree);
+        vectorBlkCnt -- ;
+    }
+
+    *pResult=S->classes[STEP(sum)];
+}
+#else
+void arm_svm_polynomial_predict_f32(
+    const arm_svm_polynomial_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum=S->intercept;
+    float32_t dot=0;
+    uint32_t i,j;
+    const float32_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = dot + in[j]* *pSupport++;
+        }
+        sum += S->dualCoefficients[i] * arm_exponent_f32(S->gamma * dot + S->coef0, S->degree);
+    }
+
+    *pResult=S->classes[STEP(sum)];
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+
+/**
+ * @} end of polysvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f16.c
new file mode 100755
index 00000000..43de2498
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f16.c
@@ -0,0 +1,97 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_rbf_init_f16.c
+ * Description:  SVM Radial Basis Function Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup rbfsvm RBF SVM
+
+  RBF SVM classifier
+ */
+
+
+/**
+ * @addtogroup rbfsvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM radial basis function instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_rbf_init_f16(arm_svm_rbf_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t *classes,
+  float16_t gamma
+  )
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+   S->gamma = gamma;
+}
+
+
+
+/**
+ * @} end of rbfsvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c
new file mode 100755
index 00000000..77bf2824
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_init_f32.c
@@ -0,0 +1,91 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_rbf_init_f32.c
+ * Description:  SVM Radial Basis Function Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup rbfsvm RBF SVM
+
+  RBF SVM classifier
+ */
+
+
+/**
+ * @addtogroup rbfsvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM radial basis function instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      points to an instance of the polynomial SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_rbf_init_f32(arm_svm_rbf_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t *classes,
+  float32_t gamma
+  )
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+   S->gamma = gamma;
+}
+
+
+
+/**
+ * @} end of rbfsvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c
new file mode 100755
index 00000000..91afcc1a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c
@@ -0,0 +1,352 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_rbf_predict_f16.c
+ * Description:  SVM Radial Basis Function Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup rbfsvm
+ * @{
+ */
+
+
+/**
+ * @brief SVM rbf prediction
+ * @param[in]    S         Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in        Pointer to input vector
+ * @param[out]   pResult   decision value
+ * @return none.
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+void arm_svm_rbf_predict_f16(
+    const arm_svm_rbf_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float16_t *pSupport = S->supportVectors;
+    const float16_t *pSrcA = pSupport;
+    const float16_t *pInA0;
+    const float16_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float16_t *pDualCoef = S->dualCoefficients;
+    _Float16       sum = S->intercept;
+    f16x8_t         vSum = vdupq_n_f16(0.0f16);
+
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) {
+        const float16_t *pInA2, *pInA3;
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1, acc2, acc3;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f16);
+        acc1 = vdupq_n_f16(0.0f16);
+        acc2 = vdupq_n_f16(0.0f16);
+        acc3 = vdupq_n_f16(0.0f16);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+            f16x8_t         vecDif;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 8;
+            vecDif = vsubq(vecIn, vecA);
+            acc2 = vfmaq(acc2, vecDif, vecDif);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 8;
+            vecDif = vsubq(vecIn, vecA);
+            acc3 = vfmaq(acc3, vecDif, vecDif);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+            f16x8_t         vecDif;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+            vecA = vldrhq_z_f16(pSrcA2Vec, p0);;
+            vecDif = vsubq(vecIn, vecA);
+            acc2 = vfmaq(acc2, vecDif, vecDif);
+            vecA = vldrhq_z_f16(pSrcA3Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc3 = vfmaq(acc3, vecDif, vecDif);
+        }
+        /*
+         * Sum the partial parts
+         */
+
+        //sum += *pDualCoef++ * expf(-S->gamma * vecReduceF16Mve(acc0));
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc2), vtmp, 2);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc3), vtmp, 3);
+
+        vSum =
+            vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                      vexpq_f16(vmulq_n_f16(vtmp, -(_Float16)S->gamma)),vctp16q(4));
+        pDualCoef += 4;
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2) {
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f16);
+        acc1 = vdupq_n_f16(0.0f16);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+            f16x8_t         vecDif;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);;
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA, vecDif;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1);
+
+        vSum =
+            vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                        vexpq_f16(vmulq_n_f16(vtmp, -(_Float16)S->gamma)), vctp16q(2));
+        pDualCoef += 2;
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f16x8_t         vecIn, acc0;
+        float16_t const *pSrcA0Vec, *pInVec;
+        float16_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA, vecDif;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA, vecDif;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+
+        vSum =
+            vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                        vexpq_f16(vmulq_n_f16(vtmp, -(_Float16)S->gamma)), vctp16q(1));
+
+    }
+
+
+    sum += (_Float16)vecAddAcrossF16Mve(vSum);
+    *pResult = S->classes[STEP(sum)];
+}
+
+#else
+void arm_svm_rbf_predict_f16(
+    const arm_svm_rbf_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+    _Float16 sum=S->intercept;
+    _Float16 dot=00.f16;
+    uint32_t i,j;
+    const float16_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0.0f16;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = dot + SQ((_Float16)in[j] - (_Float16) *pSupport);
+            pSupport++;
+        }
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)expf((float32_t)(-(_Float16)S->gamma * (_Float16)dot));
+    }
+    *pResult=S->classes[STEP(sum)];
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of rbfsvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c
new file mode 100755
index 00000000..d3c43bf6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f32.c
@@ -0,0 +1,523 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_rbf_predict_f32.c
+ * Description:  SVM Radial Basis Function Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup rbfsvm
+ * @{
+ */
+
+
+/**
+ * @brief SVM rbf prediction
+ * @param[in]    S         Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in        Pointer to input vector
+ * @param[out]   pResult   decision value
+ * @return none.
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+void arm_svm_rbf_predict_f32(
+    const arm_svm_rbf_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float32_t *pSupport = S->supportVectors;
+    const float32_t *pSrcA = pSupport;
+    const float32_t *pInA0;
+    const float32_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float32_t *pDualCoef = S->dualCoefficients;
+    float32_t       sum = S->intercept;
+    f32x4_t         vSum = vdupq_n_f32(0);
+
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) {
+        const float32_t *pInA2, *pInA3;
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1, acc2, acc3;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        acc2 = vdupq_n_f32(0.0f);
+        acc3 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+            f32x4_t         vecDif;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 4;
+            vecDif = vsubq(vecIn, vecA);
+            acc2 = vfmaq(acc2, vecDif, vecDif);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 4;
+            vecDif = vsubq(vecIn, vecA);
+            acc3 = vfmaq(acc3, vecDif, vecDif);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+            f32x4_t         vecDif;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+            vecA = vldrwq_z_f32(pSrcA2Vec, p0);;
+            vecDif = vsubq(vecIn, vecA);
+            acc2 = vfmaq(acc2, vecDif, vecDif);
+            vecA = vldrwq_z_f32(pSrcA3Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc3 = vfmaq(acc3, vecDif, vecDif);
+        }
+        /*
+         * Sum the partial parts
+         */
+
+        //sum += *pDualCoef++ * expf(-S->gamma * vecReduceF32Mve(acc0));
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3);
+
+        vSum =
+            vfmaq_f32(vSum, vld1q(pDualCoef),
+                      vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)));
+        pDualCoef += 4;
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2) {
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+            f32x4_t         vecDif;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);;
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA, vecDif;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc1 = vfmaq(acc1, vecDif, vecDif);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
+
+        vSum =
+            vfmaq_m_f32(vSum, vld1q(pDualCoef),
+                        vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)), vctp32q(2));
+        pDualCoef += 2;
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f32x4_t         vecIn, acc0;
+        float32_t const *pSrcA0Vec, *pInVec;
+        float32_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA, vecDif;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA, vecDif;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            vecDif = vsubq(vecIn, vecA);
+            acc0 = vfmaq(acc0, vecDif, vecDif);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+
+        vSum =
+            vfmaq_m_f32(vSum, vld1q(pDualCoef),
+                        vexpq_f32(vmulq_n_f32(vtmp, -S->gamma)), vctp32q(1));
+
+    }
+
+
+    sum += vecAddAcrossF32Mve(vSum);
+    *pResult = S->classes[STEP(sum)];
+}
+
+
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+
+void arm_svm_rbf_predict_f32(
+    const arm_svm_rbf_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum = S->intercept;
+   
+    float32_t dot;
+    float32x4_t dotV; 
+
+    float32x4_t accuma,accumb,accumc,accumd,accum;
+    float32x2_t accum2;
+    float32x4_t temp;
+    float32x4_t vec1;
+
+    float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
+
+    uint32_t blkCnt;   
+    uint32_t vectorBlkCnt;   
+
+    const float32_t *pIn = in;
+
+    const float32_t *pSupport = S->supportVectors;
+
+    const float32_t *pSupporta = S->supportVectors;
+    const float32_t *pSupportb;
+    const float32_t *pSupportc;
+    const float32_t *pSupportd;
+
+    pSupportb = pSupporta + S->vectorDimension;
+    pSupportc = pSupportb + S->vectorDimension;
+    pSupportd = pSupportc + S->vectorDimension;
+
+    const float32_t *pDualCoefs = S->dualCoefficients;
+
+
+    vectorBlkCnt = S->nbOfSupportVectors >> 2;
+    while (vectorBlkCnt > 0U)
+    {
+        accuma = vdupq_n_f32(0);
+        accumb = vdupq_n_f32(0);
+        accumc = vdupq_n_f32(0);
+        accumd = vdupq_n_f32(0);
+
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2a = vld1q_f32(pSupporta);
+            vec2b = vld1q_f32(pSupportb);
+            vec2c = vld1q_f32(pSupportc);
+            vec2d = vld1q_f32(pSupportd);
+
+            pIn += 4;
+            pSupporta += 4;
+            pSupportb += 4;
+            pSupportc += 4;
+            pSupportd += 4;
+
+            temp = vsubq_f32(vec1, vec2a);
+            accuma = vmlaq_f32(accuma, temp, temp);
+
+            temp = vsubq_f32(vec1, vec2b);
+            accumb = vmlaq_f32(accumb, temp, temp);
+
+            temp = vsubq_f32(vec1, vec2c);
+            accumc = vmlaq_f32(accumc, temp, temp);
+
+            temp = vsubq_f32(vec1, vec2d);
+            accumd = vmlaq_f32(accumd, temp, temp);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
+
+        accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
+
+        accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
+
+        accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + SQ(*pIn - *pSupporta), dotV,0);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + SQ(*pIn - *pSupportb), dotV,1);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + SQ(*pIn - *pSupportc), dotV,2);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + SQ(*pIn - *pSupportd), dotV,3);
+
+            pSupporta++;
+            pSupportb++;
+            pSupportc++;
+            pSupportd++;
+
+            pIn++;
+
+            blkCnt -- ;
+        }
+
+        vec1 = vld1q_f32(pDualCoefs);
+        pDualCoefs += 4; 
+
+        // To vectorize later
+        dotV = vmulq_n_f32(dotV, -S->gamma);
+        dotV = vexpq_f32(dotV);
+
+        accum = vmulq_f32(vec1,dotV);
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+        pSupporta += 3*S->vectorDimension;
+        pSupportb += 3*S->vectorDimension;
+        pSupportc += 3*S->vectorDimension;
+        pSupportd += 3*S->vectorDimension;
+
+        vectorBlkCnt -- ;
+    }
+
+    pSupport = pSupporta;
+    vectorBlkCnt = S->nbOfSupportVectors & 3;
+
+    while (vectorBlkCnt > 0U)
+    {
+        accum = vdupq_n_f32(0);
+        dot = 0.0f;
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2 = vld1q_f32(pSupport);
+            pIn += 4;
+            pSupport += 4;
+
+            temp = vsubq_f32(vec1,vec2);
+            accum = vmlaq_f32(accum, temp,temp);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+
+            dot = dot + SQ(*pIn - *pSupport);
+            pIn++;
+            pSupport++;
+
+            blkCnt -- ;
+        }
+
+        sum += *pDualCoefs++ * expf(-S->gamma * dot);
+        vectorBlkCnt -- ;
+    }
+
+    *pResult=S->classes[STEP(sum)];
+}
+#else
+void arm_svm_rbf_predict_f32(
+    const arm_svm_rbf_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum=S->intercept;
+    float32_t dot=0;
+    uint32_t i,j;
+    const float32_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = dot + SQ(in[j] - *pSupport);
+            pSupport++;
+        }
+        sum += S->dualCoefficients[i] * expf(-S->gamma * dot);
+    }
+    *pResult=S->classes[STEP(sum)];
+}
+#endif
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of rbfsvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f16.c
new file mode 100755
index 00000000..7a27417f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f16.c
@@ -0,0 +1,98 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_sigmoid_predict_f16.c
+ * Description:  SVM Sigmoid Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup sigmoidsvm Sigmoid SVM
+
+  Sigmoid SVM classifier
+ */
+
+/**
+ * @addtogroup sigmoidsvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM sigmoid instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      points to an instance of the rbf SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_sigmoid_init_f16(arm_svm_sigmoid_instance_f16 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float16_t intercept,
+  const float16_t *dualCoefficients,
+  const float16_t *supportVectors,
+  const int32_t *classes,
+  float16_t coef0,
+  float16_t gamma
+  )
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+   S->coef0 = coef0;
+   S->gamma = gamma;
+}
+
+
+/**
+ * @} end of sigmoidsvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c
new file mode 100755
index 00000000..a7f16c28
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_init_f32.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_sigmoid_predict_f32.c
+ * Description:  SVM Sigmoid Instance Initialization
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupSVM
+ */
+
+/**
+  @defgroup sigmoidsvm Sigmoid SVM
+
+  Sigmoid SVM classifier
+ */
+
+/**
+ * @addtogroup sigmoidsvm
+ * @{
+ */
+
+
+/**
+ * @brief        SVM sigmoid instance init function
+ *
+ * Classes are integer used as output of the function (instead of having -1,1
+ * as class values).
+ *
+ * @param[in]    S                      points to an instance of the rbf SVM structure.
+ * @param[in]    nbOfSupportVectors     Number of support vectors
+ * @param[in]    vectorDimension        Dimension of vector space
+ * @param[in]    intercept              Intercept
+ * @param[in]    dualCoefficients       Array of dual coefficients
+ * @param[in]    supportVectors         Array of support vectors
+ * @param[in]    classes                Array of 2 classes ID
+ * @param[in]    coef0                  coeff0 (scikit-learn terminology)
+ * @param[in]    gamma                  gamma (scikit-learn terminology)
+ * @return none.
+ *
+ */
+
+void arm_svm_sigmoid_init_f32(arm_svm_sigmoid_instance_f32 *S, 
+  uint32_t nbOfSupportVectors,
+  uint32_t vectorDimension,
+  float32_t intercept,
+  const float32_t *dualCoefficients,
+  const float32_t *supportVectors,
+  const int32_t *classes,
+  float32_t coef0,
+  float32_t gamma
+  )
+{
+   S->nbOfSupportVectors = nbOfSupportVectors;
+   S->vectorDimension = vectorDimension;
+   S->intercept = intercept;
+   S->dualCoefficients = dualCoefficients;
+   S->supportVectors = supportVectors;
+   S->classes = classes;
+   S->coef0 = coef0;
+   S->gamma = gamma;
+}
+
+
+/**
+ * @} end of sigmoidsvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c
new file mode 100755
index 00000000..e2d541fb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c
@@ -0,0 +1,333 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_sigmoid_predict_f16.c
+ * Description:  SVM Sigmoid Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+ * @addtogroup sigmoidsvm
+ * @{
+ */
+
+
+
+/**
+ * @brief SVM sigmoid prediction
+ * @param[in]    S        Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in       Pointer to input vector
+ * @param[out]   pResult  Decision value
+ * @return none.
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+void arm_svm_sigmoid_predict_f16(
+    const arm_svm_sigmoid_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float16_t *pSupport = S->supportVectors;
+    const float16_t *pSrcA = pSupport;
+    const float16_t *pInA0;
+    const float16_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float16_t *pDualCoef = S->dualCoefficients;
+    _Float16       sum = S->intercept;
+    f16x8_t         vSum = vdupq_n_f16(0.0f);
+
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) {
+        const float16_t *pInA2, *pInA3;
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1, acc2, acc3;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        acc2 = vdupq_n_f16(0.0f);
+        acc3 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 8;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 8;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA2Vec, p0);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA3Vec, p0);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc2), vtmp, 2);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc3), vtmp, 3);
+
+        vSum =
+            vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                      vtanhq_f16(vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0)),vctp16q(4));
+
+        pDualCoef += 4;
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2) {
+        float16_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f16x8_t         vecIn, acc0, acc1;
+        float16_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+        acc1 = vdupq_n_f16(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 8;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrhq_z_f16(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc1), vtmp, 1);
+
+        vSum =
+            vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                        vtanhq_f16(vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0)),
+                        vctp16q(2));
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f16x8_t         vecIn, acc0;
+        float16_t const *pSrcA0Vec, *pInVec;
+        float16_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f16(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 3;
+        while (blkCnt > 0U) {
+            f16x8_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 8;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 8;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 7;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp16q(blkCnt);
+            f16x8_t         vecA;
+
+            vecIn = vldrhq_z_f16(pInVec, p0);
+            vecA = vldrhq_z_f16(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f16x8_t         vtmp = vuninitializedq_f16();
+        vtmp = vsetq_lane(vecAddAcrossF16Mve(acc0), vtmp, 0);
+
+        vSum =
+            vfmaq_m_f16(vSum, vld1q(pDualCoef),
+                        vtanhq_f16(vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0)),
+                        vctp16q(1));
+    }
+    sum += (_Float16)vecAddAcrossF16Mve(vSum);
+
+    *pResult = S->classes[STEP(sum)];
+}
+
+#else
+void arm_svm_sigmoid_predict_f16(
+    const arm_svm_sigmoid_instance_f16 *S,
+    const float16_t * in,
+    int32_t * pResult)
+{
+    _Float16 sum=S->intercept;
+    _Float16 dot=0.0f16;
+    uint32_t i,j;
+    const float16_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0.0f16;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = (_Float16)dot + (_Float16)in[j] * (_Float16)*pSupport++;
+        }
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)tanhf((float32_t)((_Float16)S->gamma * (_Float16)dot + (_Float16)S->coef0));
+    }
+    *pResult=S->classes[STEP(sum)];
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of sigmoidsvm group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c
new file mode 100755
index 00000000..37c8a080
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f32.c
@@ -0,0 +1,487 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_svm_sigmoid_predict_f32.c
+ * Description:  SVM Sigmoid Classifier
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/svm_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+ * @addtogroup sigmoidsvm
+ * @{
+ */
+
+
+
+/**
+ * @brief SVM sigmoid prediction
+ * @param[in]    S        Pointer to an instance of the rbf SVM structure.
+ * @param[in]    in       Pointer to input vector
+ * @param[out]   pResult  Decision value
+ * @return none.
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+void arm_svm_sigmoid_predict_f32(
+    const arm_svm_sigmoid_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+        /* inlined Matrix x Vector function interleaved with dot prod */
+    uint32_t        numRows = S->nbOfSupportVectors;
+    uint32_t        numCols = S->vectorDimension;
+    const float32_t *pSupport = S->supportVectors;
+    const float32_t *pSrcA = pSupport;
+    const float32_t *pInA0;
+    const float32_t *pInA1;
+    uint32_t         row;
+    uint32_t         blkCnt;     /* loop counters */
+    const float32_t *pDualCoef = S->dualCoefficients;
+    float32_t       sum = S->intercept;
+    f32x4_t         vSum = vdupq_n_f32(0.0f);
+
+    row = numRows;
+
+    /*
+     * compute 4 rows in parrallel
+     */
+    while (row >= 4) {
+        const float32_t *pInA2, *pInA3;
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pSrcA2Vec, *pSrcA3Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1, acc2, acc3;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 4 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        pInA2 = pInA1 + numCols;
+        pInA3 = pInA2 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        acc2 = vdupq_n_f32(0.0f);
+        acc3 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+        pSrcA2Vec = pInA2;
+        pSrcA3Vec = pInA3;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vld1q(pSrcA2Vec);
+            pSrcA2Vec += 4;
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vld1q(pSrcA3Vec);
+            pSrcA3Vec += 4;
+            acc3 = vfmaq(acc3, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA2Vec, p0);
+            acc2 = vfmaq(acc2, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA3Vec, p0);
+            acc3 = vfmaq(acc3, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc2), vtmp, 2);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc3), vtmp, 3);
+
+        vSum =
+            vfmaq_f32(vSum, vld1q(pDualCoef),
+                      vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)));
+
+        pDualCoef += 4;
+
+        pSrcA += numCols * 4;
+        /*
+         * Decrement the row loop counter
+         */
+        row -= 4;
+    }
+
+    /*
+     * compute 2 rows in parrallel
+     */
+    if (row >= 2) {
+        float32_t const *pSrcA0Vec, *pSrcA1Vec, *pInVec;
+        f32x4_t         vecIn, acc0, acc1;
+        float32_t const *pSrcVecPtr = in;
+
+        /*
+         * Initialize the pointers to 2 consecutive MatrixA rows
+         */
+        pInA0 = pSrcA;
+        pInA1 = pInA0 + numCols;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+        acc1 = vdupq_n_f32(0.0f);
+        pSrcA0Vec = pInA0;
+        pSrcA1Vec = pInA1;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vld1q(pSrcA1Vec);
+            pSrcA1Vec += 4;
+            acc1 = vfmaq(acc1, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+            vecA = vldrwq_z_f32(pSrcA1Vec, p0);
+            acc1 = vfmaq(acc1, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc1), vtmp, 1);
+
+        vSum =
+            vfmaq_m_f32(vSum, vld1q(pDualCoef),
+                        vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)),
+                        vctp32q(2));
+
+        pSrcA += numCols * 2;
+        row -= 2;
+    }
+
+    if (row >= 1) {
+        f32x4_t         vecIn, acc0;
+        float32_t const *pSrcA0Vec, *pInVec;
+        float32_t const *pSrcVecPtr = in;
+        /*
+         * Initialize the pointers to last MatrixA row
+         */
+        pInA0 = pSrcA;
+        /*
+         * Initialize the vector pointer
+         */
+        pInVec = pSrcVecPtr;
+        /*
+         * reset accumulators
+         */
+        acc0 = vdupq_n_f32(0.0f);
+
+        pSrcA0Vec = pInA0;
+
+        blkCnt = numCols >> 2;
+        while (blkCnt > 0U) {
+            f32x4_t         vecA;
+
+            vecIn = vld1q(pInVec);
+            pInVec += 4;
+            vecA = vld1q(pSrcA0Vec);
+            pSrcA0Vec += 4;
+            acc0 = vfmaq(acc0, vecIn, vecA);
+
+            blkCnt--;
+        }
+        /*
+         * tail
+         * (will be merged thru tail predication)
+         */
+        blkCnt = numCols & 3;
+        if (blkCnt > 0U) {
+            mve_pred16_t    p0 = vctp32q(blkCnt);
+            f32x4_t         vecA;
+
+            vecIn = vldrwq_z_f32(pInVec, p0);
+            vecA = vldrwq_z_f32(pSrcA0Vec, p0);
+            acc0 = vfmaq(acc0, vecIn, vecA);
+        }
+        /*
+         * Sum the partial parts
+         */
+        f32x4_t         vtmp = vuninitializedq_f32();
+        vtmp = vsetq_lane(vecAddAcrossF32Mve(acc0), vtmp, 0);
+
+        vSum =
+            vfmaq_m_f32(vSum, vld1q(pDualCoef),
+                        vtanhq_f32(vaddq_n_f32(vmulq_n_f32(vtmp, S->gamma), S->coef0)),
+                        vctp32q(1));
+    }
+    sum += vecAddAcrossF32Mve(vSum);
+
+    *pResult = S->classes[STEP(sum)];
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+#include "NEMath.h"
+
+void arm_svm_sigmoid_predict_f32(
+    const arm_svm_sigmoid_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum = S->intercept;
+   
+    float32_t dot;
+    float32x4_t dotV; 
+
+    float32x4_t accuma,accumb,accumc,accumd,accum;
+    float32x2_t accum2;
+    float32x4_t vec1;
+    float32x4_t coef0 = vdupq_n_f32(S->coef0);
+
+    float32x4_t vec2,vec2a,vec2b,vec2c,vec2d;
+
+    uint32_t blkCnt;   
+    uint32_t vectorBlkCnt;   
+
+    const float32_t *pIn = in;
+
+    const float32_t *pSupport = S->supportVectors;
+
+    const float32_t *pSupporta = S->supportVectors;
+    const float32_t *pSupportb;
+    const float32_t *pSupportc;
+    const float32_t *pSupportd;
+
+    pSupportb = pSupporta + S->vectorDimension;
+    pSupportc = pSupportb + S->vectorDimension;
+    pSupportd = pSupportc + S->vectorDimension;
+
+    const float32_t *pDualCoefs = S->dualCoefficients;
+
+    vectorBlkCnt = S->nbOfSupportVectors >> 2;
+    while (vectorBlkCnt > 0U)
+    {
+        accuma = vdupq_n_f32(0);
+        accumb = vdupq_n_f32(0);
+        accumc = vdupq_n_f32(0);
+        accumd = vdupq_n_f32(0);
+
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2a = vld1q_f32(pSupporta);
+            vec2b = vld1q_f32(pSupportb);
+            vec2c = vld1q_f32(pSupportc);
+            vec2d = vld1q_f32(pSupportd);
+
+            pIn += 4;
+            pSupporta += 4;
+            pSupportb += 4;
+            pSupportc += 4;
+            pSupportd += 4;
+
+            accuma = vmlaq_f32(accuma, vec1,vec2a);
+            accumb = vmlaq_f32(accumb, vec1,vec2b);
+            accumc = vmlaq_f32(accumc, vec1,vec2c);
+            accumd = vmlaq_f32(accumd, vec1,vec2d);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accuma),vget_high_f32(accuma));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,0);
+
+        accum2 = vpadd_f32(vget_low_f32(accumb),vget_high_f32(accumb));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,1);
+
+        accum2 = vpadd_f32(vget_low_f32(accumc),vget_high_f32(accumc));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,2);
+
+        accum2 = vpadd_f32(vget_low_f32(accumd),vget_high_f32(accumd));
+        dotV = vsetq_lane_f32(vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1),dotV,3);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,0) + *pIn * *pSupporta++, dotV,0);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,1) + *pIn * *pSupportb++, dotV,1);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,2) + *pIn * *pSupportc++, dotV,2);
+            dotV = vsetq_lane_f32(vgetq_lane_f32(dotV,3) + *pIn * *pSupportd++, dotV,3);
+
+            pIn++;
+
+            blkCnt -- ;
+        }
+
+        vec1 = vld1q_f32(pDualCoefs);
+        pDualCoefs += 4; 
+
+        // To vectorize later
+        dotV = vmulq_n_f32(dotV, S->gamma);
+        dotV = vaddq_f32(dotV, coef0);
+
+        dotV = vtanhq_f32(dotV);
+
+        accum = vmulq_f32(vec1,dotV);
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        sum += vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+        pSupporta += 3*S->vectorDimension;
+        pSupportb += 3*S->vectorDimension;
+        pSupportc += 3*S->vectorDimension;
+        pSupportd += 3*S->vectorDimension;
+
+        vectorBlkCnt -- ;
+    }
+
+    pSupport = pSupporta;
+    vectorBlkCnt = S->nbOfSupportVectors & 3;
+
+    while (vectorBlkCnt > 0U)
+    {
+        accum = vdupq_n_f32(0);
+        dot = 0.0f;
+        pIn = in;
+
+        blkCnt = S->vectorDimension >> 2;
+        while (blkCnt > 0U)
+        {
+        
+            vec1 = vld1q_f32(pIn);
+            vec2 = vld1q_f32(pSupport);
+            pIn += 4;
+            pSupport += 4;
+
+            accum = vmlaq_f32(accum, vec1,vec2);
+
+            blkCnt -- ;
+        }
+        accum2 = vpadd_f32(vget_low_f32(accum),vget_high_f32(accum));
+        dot = vget_lane_f32(accum2, 0) + vget_lane_f32(accum2, 1);
+
+
+        blkCnt = S->vectorDimension & 3;
+        while (blkCnt > 0U)
+        {
+            dot = dot + *pIn++ * *pSupport++;
+
+            blkCnt -- ;
+        }
+
+        sum += *pDualCoefs++ * tanhf(S->gamma * dot + S->coef0);
+        vectorBlkCnt -- ;
+    }
+
+    *pResult=S->classes[STEP(sum)];
+}
+#else
+void arm_svm_sigmoid_predict_f32(
+    const arm_svm_sigmoid_instance_f32 *S,
+    const float32_t * in,
+    int32_t * pResult)
+{
+    float32_t sum=S->intercept;
+    float32_t dot=0;
+    uint32_t i,j;
+    const float32_t *pSupport = S->supportVectors;
+
+    for(i=0; i < S->nbOfSupportVectors; i++)
+    {
+        dot=0;
+        for(j=0; j < S->vectorDimension; j++)
+        {
+            dot = dot + in[j]* *pSupport++;
+        }
+        sum += S->dualCoefficients[i] * tanhf(S->gamma * dot + S->coef0);
+    }
+    *pResult=S->classes[STEP(sum)];
+}
+
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of sigmoidsvm group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
index ae74d027..53f6b86c 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
@@ -1,53 +1,95 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        StatisticsFunctions.c
- * Description:  Combination of all statistics function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_max_f32.c"
-#include "arm_max_q15.c"
-#include "arm_max_q31.c"
-#include "arm_max_q7.c"
-#include "arm_mean_f32.c"
-#include "arm_mean_q15.c"
-#include "arm_mean_q31.c"
-#include "arm_mean_q7.c"
-#include "arm_min_f32.c"
-#include "arm_min_q15.c"
-#include "arm_min_q31.c"
-#include "arm_min_q7.c"
-#include "arm_power_f32.c"
-#include "arm_power_q15.c"
-#include "arm_power_q31.c"
-#include "arm_power_q7.c"
-#include "arm_rms_f32.c"
-#include "arm_rms_q15.c"
-#include "arm_rms_q31.c"
-#include "arm_std_f32.c"
-#include "arm_std_q15.c"
-#include "arm_std_q31.c"
-#include "arm_var_f32.c"
-#include "arm_var_q15.c"
-#include "arm_var_q31.c"
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        StatisticsFunctions.c
+ * Description:  Combination of all statistics function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_entropy_f32.c"
+#include "arm_entropy_f64.c"
+#include "arm_kullback_leibler_f32.c"
+#include "arm_kullback_leibler_f64.c"
+#include "arm_logsumexp_dot_prod_f32.c"
+#include "arm_logsumexp_f32.c"
+#include "arm_max_f32.c"
+#include "arm_max_f64.c"
+#include "arm_max_q15.c"
+#include "arm_max_q31.c"
+#include "arm_max_q7.c"
+#include "arm_max_no_idx_f32.c"
+#include "arm_max_no_idx_f64.c"
+#include "arm_max_no_idx_q31.c"
+#include "arm_max_no_idx_q15.c"
+#include "arm_max_no_idx_q7.c"
+#include "arm_mean_f32.c"
+#include "arm_mean_f64.c"
+#include "arm_mean_q15.c"
+#include "arm_mean_q31.c"
+#include "arm_mean_q7.c"
+#include "arm_min_f32.c"
+#include "arm_min_f64.c"
+#include "arm_min_q15.c"
+#include "arm_min_q31.c"
+#include "arm_min_q7.c"
+#include "arm_min_no_idx_f32.c"
+#include "arm_min_no_idx_f64.c"
+#include "arm_min_no_idx_q31.c"
+#include "arm_min_no_idx_q15.c"
+#include "arm_min_no_idx_q7.c"
+#include "arm_power_f32.c"
+#include "arm_power_f64.c"
+#include "arm_power_q15.c"
+#include "arm_power_q31.c"
+#include "arm_power_q7.c"
+#include "arm_rms_f32.c"
+#include "arm_rms_q15.c"
+#include "arm_rms_q31.c"
+#include "arm_std_f32.c"
+#include "arm_std_f64.c"
+#include "arm_std_q15.c"
+#include "arm_std_q31.c"
+#include "arm_var_f32.c"
+#include "arm_var_f64.c"
+#include "arm_var_q15.c"
+#include "arm_var_q31.c"
+#include "arm_absmax_f32.c"
+#include "arm_absmax_f64.c"
+#include "arm_absmax_q15.c"
+#include "arm_absmax_q31.c"
+#include "arm_absmax_q7.c"
+#include "arm_absmin_f32.c"
+#include "arm_absmin_f64.c"
+#include "arm_absmin_q15.c"
+#include "arm_absmin_q31.c"
+#include "arm_absmin_q7.c"
+#include "arm_absmax_no_idx_f32.c"
+#include "arm_absmax_no_idx_f64.c"
+#include "arm_absmax_no_idx_q15.c"
+#include "arm_absmax_no_idx_q31.c"
+#include "arm_absmax_no_idx_q7.c"
+#include "arm_absmin_no_idx_f32.c"
+#include "arm_absmin_no_idx_f64.c"
+#include "arm_absmin_no_idx_q15.c"
+#include "arm_absmin_no_idx_q31.c"
+#include "arm_absmin_no_idx_q7.c"
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c
new file mode 100755
index 00000000..00d4c706
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c
@@ -0,0 +1,45 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        StatisticsFunctions.c
+ * Description:  Combination of all statistics function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_max_f16.c"
+#include "arm_min_f16.c"
+#include "arm_mean_f16.c"
+#include "arm_power_f16.c"
+#include "arm_rms_f16.c"
+#include "arm_std_f16.c"
+#include "arm_var_f16.c"
+#include "arm_entropy_f16.c"
+#include "arm_kullback_leibler_f16.c"
+#include "arm_logsumexp_dot_prod_f16.c"
+#include "arm_logsumexp_f16.c"
+#include "arm_max_no_idx_f16.c"
+#include "arm_min_no_idx_f16.c"
+#include "arm_absmax_f16.c"
+#include "arm_absmin_f16.c"
+#include "arm_absmax_no_idx_f16.c"
+#include "arm_absmin_no_idx_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f16.c
new file mode 100755
index 00000000..4241eb5d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f16.c
@@ -0,0 +1,274 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_f16.c
+ * Description:  Maximum value of a absolute values of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmax_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+      uint16_t        blkCnt;           /* loop counters */
+    f16x8_t       vecSrc;
+    float16_t const *pSrcVec;
+    f16x8_t       curExtremValVec = vdupq_n_f16(F16_ABSMIN);
+    float16_t       maxValue = F16_ABSMIN;
+    uint16_t        idx = blockSize;
+    uint16x8_t    indexVec;
+    uint16x8_t    curExtremIdxVec;
+    mve_pred16_t    p0;
+
+
+    indexVec = vidupq_u16((uint32_t)0, 1);
+    curExtremIdxVec = vdupq_n_u16(0);
+
+    pSrcVec = (float16_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrhq_f16(pSrcVec);  
+        pSrcVec += 8;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = indexVec +  8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        vecSrc = vldrhq_f16(pSrcVec);  
+        pSrcVec += 8;
+        vecSrc = vabsq(vecSrc);
+
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(vecSrc, curExtremValVec, p0);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmvq(maxValue, curExtremValVec);
+    /*
+     * set index for lower values to max possible index
+     */
+    p0 = vcmpgeq(curExtremValVec, maxValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0);
+    /*
+     * Get min index which is thus for a max value
+     */
+    idx = vminvq(idx, indexVec);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = maxValue;
+}
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmax_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+        float16_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out;                                                                             \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmax_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+        float16_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = (_Float16)fabsf((float32_t)*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (_Float16)fabsf((float32_t)*pSrc++);
+
+    /* compare for the maximum value */
+    if ((_Float16)out < (_Float16)maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f32.c
new file mode 100755
index 00000000..a571ae0d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f32.c
@@ -0,0 +1,260 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_f32.c
+ * Description:  Maximum value of absolute values of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup AbsMax Absolute Maximum
+
+  Computes the maximum value of absolute values of an array of data.
+  The function returns both the maximum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmax_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t blkSize = blockSize;
+    f32x4_t vecSrc;
+    f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMIN);
+    float32_t maxValue = F32_ABSMIN;
+    uint32_t idx = blockSize;
+    uint32x4_t indexVec;
+    uint32x4_t curExtremIdxVec;
+    uint32_t curIdx = 0;
+    mve_pred16_t p0;
+
+
+    indexVec = vidupq_wb_u32(&curIdx, 1);
+    curExtremIdxVec = vdupq_n_u32(0);
+
+    do {
+        mve_pred16_t p = vctp32q(blkSize);
+
+        vecSrc = vldrwq_z_f32((float32_t const *) pSrc, p);
+        vecSrc = vabsq_m(vuninitializedq_f32(), vecSrc, p);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(vecSrc, curExtremValVec, p);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        /* Does TP detection works here ?? */
+        indexVec = vidupq_wb_u32(&curIdx, 1);
+
+        blkSize -= 4;
+        pSrc += 4;
+    }
+    while (blkSize > 0);
+
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmvq(maxValue, curExtremValVec);
+    /*
+     * set index for lower values to max possible index
+     */
+    p0 = vcmpgeq(curExtremValVec, maxValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0);
+    /*
+     * Get min index which is thus for a max value
+     */
+    idx = vminvq(idx, indexVec);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = maxValue;
+}
+
+
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmax_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0.0f) ? out : -out;                                                                             \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmax_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabsf(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = fabsf(*pSrc++);
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f64.c
new file mode 100644
index 00000000..987c32ca
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_f64.c
@@ -0,0 +1,92 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_f64.c
+ * Description:  Maximum value of absolute values of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+void arm_absmax_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex)
+{
+        float64_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabs(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = fabs(*pSrc++);
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f16.c
new file mode 100755
index 00000000..82820c62
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f16.c
@@ -0,0 +1,228 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_no_idx_f16.c
+ * Description:  Maximum value of a absolute values of a floating-point vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmax_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+   uint16_t  blkCnt;           /* loop counters */
+    f16x8_t vecSrc;
+    float16_t const *pSrcVec;
+    f16x8_t curExtremValVec = vdupq_n_f16(F16_ABSMIN);
+    float16_t maxValue = F16_ABSMIN;
+    mve_pred16_t p0;
+
+
+    pSrcVec = (float16_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrhq_f16(pSrcVec);  
+        pSrcVec += 8;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxnmaq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        vecSrc = vldrhq_f16(pSrcVec);  
+        pSrcVec += 8;
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxnmaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmavq(maxValue, curExtremValVec);
+    *pResult = maxValue;
+}
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmax_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        float16_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                           \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out;                                                                             \
+                                                                                             \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmax_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        float16_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = (_Float16)fabsf((float32_t)*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (_Float16)fabsf((float32_t)*pSrc++);
+
+    /* compare for the maximum value */
+    if ((_Float16)out < (_Float16)maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f32.c
new file mode 100755
index 00000000..13d99bab
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f32.c
@@ -0,0 +1,225 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_no_idx_f32.c
+ * Description:  Maximum value of absolute values of a floating-point vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmax_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    f32x4_t vecSrc;
+    float32_t const *pSrcVec;
+    f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMIN);
+    float32_t maxValue = F32_ABSMIN;
+    mve_pred16_t p0;
+
+
+    pSrcVec = (float32_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrwq_f32(pSrcVec);  
+        pSrcVec += 4;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxnmaq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0)
+    {
+        vecSrc = vldrwq_f32(pSrcVec);  
+        pSrcVec += 4;
+        p0 = vctp32q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxnmaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmavq(maxValue, curExtremValVec);
+    *pResult = maxValue;
+}
+
+
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmax_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        float32_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0.0f) ? out : -out;                                                                             \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0.0f) ? cur_absmax : -cur_absmax;                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmax_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        float32_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabsf(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = fabsf(*pSrc++);
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f64.c
new file mode 100755
index 00000000..23e34005
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_f64.c
@@ -0,0 +1,87 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_no_idx_f64.c
+ * Description:  Maximum value of absolute values of a floating-point vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+void arm_absmax_no_idx_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult)
+{
+        float64_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabs(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = fabs(*pSrc++);
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+}
+
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q15.c
new file mode 100755
index 00000000..941f2ddc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q15.c
@@ -0,0 +1,220 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_no_idx_q15.c
+ * Description:  Maximum value of absolute values of a Q15 vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmax_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    uint16_t        blkCnt;           /* loop counters */
+    q15x8_t       vecSrc;
+    q15_t   const *pSrcVec;
+    uint16x8_t    curExtremValVec = vdupq_n_s16(Q15_ABSMIN);
+    q15_t           maxValue = Q15_ABSMIN;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q15_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxaq(curExtremValVec, vecSrc);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxavq(maxValue, (q15x8_t)curExtremValVec);
+    *pResult = maxValue;
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmax_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        q15_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q15_t)__QSUB16(0, out);                                                                           \
+                                                                                              \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmax_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+       q15_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+    pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q31.c
new file mode 100755
index 00000000..8275a535
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q31.c
@@ -0,0 +1,220 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_no_idx_q31.c
+ * Description:  Maximum value of absolute values of a Q31 vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmax_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q31x4_t       vecSrc;
+    q31_t   const *pSrcVec;
+    uint32x4_t    curExtremValVec = vdupq_n_s32(Q31_ABSMIN);
+    q31_t           maxValue = Q31_ABSMIN;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxaq(curExtremValVec, vecSrc);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        p0 = vctp32q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxavq(maxValue, (q31x4_t)curExtremValVec);
+    *pResult = maxValue;
+}
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmax_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        q31_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                           \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q31_t)__QSUB(0, out);                                                                           \
+                                                                                              \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmax_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        q31_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+    pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q7.c
new file mode 100755
index 00000000..8eaca9b7
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_no_idx_q7.c
@@ -0,0 +1,224 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_no_idx_q7.c
+ * Description:  Maximum value of absolute values of a Q7 vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include <stdint.h>
+#include "arm_helium_utils.h"
+
+
+
+void arm_absmax_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q7x16_t        vecSrc;
+    q7_t   const *pSrcVec;
+    uint8x16_t     curExtremValVec = vdupq_n_s8(Q7_ABSMIN);
+    q7_t            maxValue = Q7_ABSMIN;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q7_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxaq(curExtremValVec, vecSrc);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        p0 = vctp8q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxavq(maxValue, (q7x16_t)curExtremValVec);
+    *pResult = maxValue;
+}
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmax_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+        q7_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                           \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q7_t)__QSUB8(0, out);                                                                           \
+                                                                                              \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmax_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+       q7_t maxVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+    pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q15.c
new file mode 100755
index 00000000..7a7816d5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q15.c
@@ -0,0 +1,236 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_q15.c
+ * Description:  Maximum value of absolute values of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmax_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+      int32_t         blkCnt;     /* loop counters */
+    q15x8_t         extremValVec = vdupq_n_s16(Q15_ABSMIN);
+    q15_t           maxValue = Q15_ABSMIN;
+    uint16x8_t      indexVec;
+    uint16x8_t      extremIdxVec;
+    mve_pred16_t    p0;
+    uint16_t        extremIdxArr[8];
+
+    indexVec = vidupq_u16(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp16q(blkCnt);
+        q15x8_t         extremIdxVal = vld1q_z_s16(pSrc, p);
+
+        extremIdxVal = vqabsq(extremIdxVal);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u16(extremIdxArr, indexVec, p0);
+
+        indexVec += 8;
+        pSrc += 8;
+        blkCnt -= 8;
+    }
+    while (blkCnt > 0);
+
+
+    /* Get max value across the vector   */
+    maxValue = vmaxvq(maxValue, extremValVec);
+
+    /* set index for lower values to max possible index   */
+    p0 = vcmpgeq(extremValVec, maxValue);
+    extremIdxVec = vld1q_u16(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u16(blockSize - 1), p0);
+    *pIndex = vminvq(blockSize - 1, indexVec);
+    *pResult = maxValue;
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmax_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+        q15_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q15_t)__QSUB16(0, out);                                                                           \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q15_t)__QSUB16(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmax_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+       q15_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+    pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q31.c
new file mode 100755
index 00000000..99b38f3f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q31.c
@@ -0,0 +1,236 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_q31.c
+ * Description:  Maximum value of absolute values of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmax_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t         blkCnt;     /* loop counters */
+    q31x4_t         extremValVec = vdupq_n_s32(Q31_ABSMIN);
+    q31_t           maxValue = Q31_ABSMIN;
+    uint32x4_t      indexVec;
+    uint32x4_t      extremIdxVec;
+    mve_pred16_t    p0;
+    uint32_t        extremIdxArr[4];
+
+    indexVec = vidupq_u32(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp32q(blkCnt);
+        q31x4_t         extremIdxVal = vld1q_z_s32(pSrc, p);
+
+        extremIdxVal = vqabsq(extremIdxVal);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u32(extremIdxArr, indexVec, p0);
+
+        indexVec += 4;
+        pSrc += 4;
+        blkCnt -= 4;
+    }
+    while (blkCnt > 0);
+
+
+    /* Get max value across the vector   */
+    maxValue = vmaxvq(maxValue, extremValVec);
+
+    /* set index for lower values to max possible index   */
+    p0 = vcmpgeq(extremValVec, maxValue);
+    extremIdxVec = vld1q_u32(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u32(blockSize - 1), p0);
+    *pIndex = vminvq(blockSize - 1, indexVec);
+    *pResult = maxValue;  
+}
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmax_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q31_t)__QSUB(0, out);                                                                           \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q31_t)__QSUB(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmax_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+    pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q7.c
new file mode 100755
index 00000000..12596672
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmax_q7.c
@@ -0,0 +1,294 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmax_q7.c
+ * Description:  Maximum value of absolute values of a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMax
+  @{
+ */
+
+/**
+  @brief         Maximum value of absolute values of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include <stdint.h>
+#include "arm_helium_utils.h"
+
+#define MAX_BLKSZ_S8  (UINT8_MAX+1)
+
+static void arm_small_blk_absmax_q7(
+    const q7_t * pSrc,
+    uint16_t blockSize,
+    q7_t * pResult,
+    uint32_t * pIndex)
+{
+    int32_t        blkCnt;     /* loop counters */
+    q7x16_t        extremValVec = vdupq_n_s8(Q7_ABSMIN);
+    q7_t           maxValue = Q7_ABSMIN;
+    uint8x16_t     indexVec;
+    uint8x16_t     extremIdxVec;
+    mve_pred16_t   p0;
+    uint8_t        extremIdxArr[16];
+
+    indexVec = vidupq_u8(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp8q(blkCnt);
+        q7x16_t         extremIdxVal = vld1q_z_s8(pSrc, p);
+
+        extremIdxVal = vqabsq(extremIdxVal);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u8(extremIdxArr, indexVec, p0);
+
+        indexVec += 16;
+        pSrc += 16;
+        blkCnt -= 16;
+    }
+    while (blkCnt > 0);
+
+
+    /* Get max value across the vector   */
+    maxValue = vmaxvq(maxValue, extremValVec);
+
+    /* set index for lower values to max possible index   */
+    p0 = vcmpgeq(extremValVec, maxValue);
+    extremIdxVec = vld1q_u8(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u8(blockSize - 1), p0);
+    *pIndex = vminvq_u8(blockSize - 1, indexVec);
+    *pResult = maxValue;
+}
+
+void arm_absmax_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t   totalSize = blockSize;
+
+    if (totalSize <= MAX_BLKSZ_S8)
+    {
+        arm_small_blk_absmax_q7(pSrc, blockSize, pResult, pIndex);
+    }
+    else
+    {
+        uint32_t  curIdx = 0;
+        q7_t      curBlkExtr = Q7_MIN;
+        uint32_t  curBlkPos = 0;
+        uint32_t  curBlkIdx = 0;
+        /*
+         * process blocks of 255 elts
+         */
+        while (totalSize >= MAX_BLKSZ_S8)
+        {
+            const q7_t     *curSrc = pSrc;
+
+            arm_small_blk_absmax_q7(curSrc, MAX_BLKSZ_S8, pResult, pIndex);
+            if (*pResult > curBlkExtr)
+            {
+                /*
+                 * update partial extrema
+                 */
+                curBlkExtr = *pResult;
+                curBlkPos = *pIndex;
+                curBlkIdx = curIdx;
+            }
+            curIdx++;
+            pSrc += MAX_BLKSZ_S8;
+            totalSize -= MAX_BLKSZ_S8;
+        }
+        /*
+         * remainder
+         */
+        arm_small_blk_absmax_q7(pSrc, totalSize, pResult, pIndex);
+        if (*pResult > curBlkExtr)
+        {
+            curBlkExtr = *pResult;
+            curBlkPos = *pIndex;
+            curBlkIdx = curIdx;
+        }
+        *pIndex = curBlkIdx * MAX_BLKSZ_S8 + curBlkPos;
+        *pResult = curBlkExtr;
+    }
+}
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmax_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+        q7_t cur_absmax, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q7_t)__QSUB8(0, out);                                                                           \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmax to next consecutive values one by one */                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmax = *pSrc++;                                                                                     \
+    cur_absmax = (cur_absmax > 0) ? cur_absmax : (q7_t)__QSUB8(0, cur_absmax);                                                                 \
+    if (cur_absmax > out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmax;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmax_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+       q7_t maxVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+    pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMax group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f16.c
new file mode 100755
index 00000000..b450b551
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f16.c
@@ -0,0 +1,276 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_f16.c
+ * Description:  Minimum value of absolute values of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmin_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+    uint16_t  blkCnt;           /* loop counters */
+    f16x8_t vecSrc;
+    float16_t const *pSrcVec;
+    f16x8_t curExtremValVec = vdupq_n_f16(F16_ABSMAX);
+    float16_t minValue = F16_ABSMAX;
+    uint16_t  idx = blockSize;
+    uint16x8_t indexVec;
+    uint16x8_t curExtremIdxVec;
+    mve_pred16_t p0;
+
+
+    indexVec = vidupq_u16((uint32_t)0, 1);
+    curExtremIdxVec = vdupq_n_u16(0);
+
+    pSrcVec = (float16_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrhq_f16(pSrcVec);  
+        pSrcVec += 8;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = indexVec +  8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        p0 = vctp16q(blkCnt);
+
+        vecSrc = vldrhq_f16(pSrcVec);  
+        pSrcVec += 8;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpleq_m(vecSrc, curExtremValVec, p0);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to max possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0);
+    /*
+     * Get min index which is thus for a max value
+     */
+    idx = vminvq(idx, indexVec);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmin_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+        float16_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out;                                                                             \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmin_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+        float16_t minVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabsf(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (_Float16)fabsf((float32_t)*pSrc++);
+
+    /* compare for the minimum value */
+    if ((_Float16)out > (_Float16)minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f32.c
new file mode 100755
index 00000000..3a963227
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f32.c
@@ -0,0 +1,279 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_f32.c
+ * Description:  Minimum value of absolute values of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup AbsMin Absolute Minimum
+
+  Computes the minimum value of absolute values of an array of data.
+  The function returns both the minimum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmin_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t  blkCnt;           /* loop counters */
+    f32x4_t vecSrc;
+    float32_t const *pSrcVec;
+    f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMAX);
+    float32_t minValue = F32_ABSMAX;
+    uint32_t  idx = blockSize;
+    uint32x4_t indexVec;
+    uint32x4_t curExtremIdxVec;
+    mve_pred16_t p0;
+
+
+    indexVec = vidupq_u32((uint32_t)0, 1);
+    curExtremIdxVec = vdupq_n_u32(0);
+
+    pSrcVec = (float32_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrwq_f32(pSrcVec);  
+        pSrcVec += 4;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = indexVec +  4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0)
+    {
+        p0 = vctp32q(blkCnt);
+
+        vecSrc = vldrwq_f32(pSrcVec);  
+        pSrcVec += 4;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpleq_m(vecSrc, curExtremValVec, p0);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to max possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0);
+    /*
+     * Get min index which is thus for a max value
+     */
+    idx = vminvq(idx, indexVec);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmin_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0.0f) ? out : -out;                                                                             \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmin_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+       float32_t minVal, out;                         /* Temporary variables to store the output value. */
+       uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabsf(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = fabsf(*pSrc++);
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f64.c
new file mode 100644
index 00000000..7aac9700
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_f64.c
@@ -0,0 +1,90 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_f64.c
+ * Description:  Minimum value of absolute values of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+void arm_absmin_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex)
+{
+       float64_t minVal, out;                         /* Temporary variables to store the output value. */
+       uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabs(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = fabs(*pSrc++);
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f16.c
new file mode 100755
index 00000000..6c54f9f5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f16.c
@@ -0,0 +1,230 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_no_idx_f16.c
+ * Description:  Minimum value of absolute values of a floating-point vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmin_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+   int32_t  blkCnt;           /* loop counters */
+    f16x8_t vecSrc;
+    float16_t const *pSrcVec;
+    f16x8_t curExtremValVec = vdupq_n_f16(F16_ABSMAX);
+    float16_t minValue = F16_ABSMAX;
+    mve_pred16_t p0;
+
+
+    pSrcVec = (float16_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminnmaq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminnmaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmavq(minValue, curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmin_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        float16_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                          \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out;                                                                             \
+                                                                                              \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmin_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        float16_t minVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabsf(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (_Float16)fabsf((float32_t)*pSrc++);
+
+    /* compare for the minimum value */
+    if ((_Float16)out > (_Float16)minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f32.c
new file mode 100755
index 00000000..c7108daa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f32.c
@@ -0,0 +1,226 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_no_idx_f32.c
+ * Description:  Minimum value of absolute values of a floating-point vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_absmin_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    f32x4_t vecSrc;
+    float32_t const *pSrcVec;
+    f32x4_t curExtremValVec = vdupq_n_f32(F32_ABSMAX);
+    float32_t minValue = F32_ABSMAX;
+    mve_pred16_t p0;
+
+
+    pSrcVec = (float32_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrwq_f32(pSrcVec);  
+        pSrcVec += 4;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminnmaq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0)
+    {
+        vecSrc = vldrwq_f32(pSrcVec);  
+        pSrcVec += 4;
+        p0 = vctp32q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminnmaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmavq(minValue, curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_LOOPUNROLL)
+void arm_absmin_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        float32_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                           \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0.0f) ? out : -out;                                                                             \
+                                                                                              \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0.0f) ? cur_absmin : -cur_absmin;                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmin_no_idx_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+       float32_t minVal, out;                         /* Temporary variables to store the output value. */
+       uint32_t blkCnt;                     /* Loop counter */
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabsf(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = fabsf(*pSrc++);
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+}
+
+#endif /* defined(ARM_MATH_LOOPUNROLL) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f64.c
new file mode 100755
index 00000000..ac1e9263
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_f64.c
@@ -0,0 +1,84 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_no_idx_f64.c
+ * Description:  Minimum value of absolute values of a floating-point vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+void arm_absmin_no_idx_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult)
+{
+       float64_t minVal, out;                         /* Temporary variables to store the output value. */
+       uint32_t blkCnt;                     /* Loop counter */
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = fabs(*pSrc++);
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = fabs(*pSrc++);
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+}
+
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q15.c
new file mode 100755
index 00000000..76a17886
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q15.c
@@ -0,0 +1,222 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_no_idx_q15.c
+ * Description:  Minimum value of absolute values of a Q15 vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmin_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    uint16_t        blkCnt;           /* loop counters */
+    q15x8_t       vecSrc;
+    q15_t   const *pSrcVec;
+    uint16x8_t    curExtremValVec = vdupq_n_s16(Q15_ABSMAX);
+    q15_t           minValue = Q15_ABSMAX;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q15_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminaq(curExtremValVec, vecSrc);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminavq(minValue, (q15x8_t)curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmin_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        q15_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                           \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q15_t)__QSUB16(0, out);                                                                           \
+                                                                                             \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmin_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+       q15_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+    pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q31.c
new file mode 100755
index 00000000..b52db172
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q31.c
@@ -0,0 +1,221 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_no_idx_q31.c
+ * Description:  Minimum value of absolute values of a Q31 vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmin_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q31x4_t       vecSrc;
+    q31_t   const *pSrcVec;
+    uint32x4_t    curExtremValVec = vdupq_n_s32(Q31_ABSMAX);
+    q31_t           minValue = Q31_ABSMAX;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminaq(curExtremValVec, vecSrc);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        p0 = vctp32q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminavq(minValue, (q31x4_t)curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmin_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        q31_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                           \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q31_t)__QSUB(0, out);                                                                           \
+                                                                                              \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmin_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        q31_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+    pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q7.c
new file mode 100755
index 00000000..f60f113d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_no_idx_q7.c
@@ -0,0 +1,223 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_no_idx_q7.c
+ * Description:  Minimum value of absolute values of a Q7 vector
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include <stdint.h>
+#include "arm_helium_utils.h"
+
+
+
+void arm_absmin_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q7x16_t        vecSrc;
+    q7_t   const *pSrcVec;
+    uint8x16_t     curExtremValVec = vdupq_n_s8(Q7_ABSMAX);
+    q7_t            minValue = Q7_ABSMAX;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q7_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminaq(curExtremValVec, vecSrc);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        p0 = vctp8q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminaq_m(curExtremValVec, vecSrc, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminavq(minValue, (q7x16_t)curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmin_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+        q7_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt;                     /* Loop counter */                                   \
+                                                                                                            \
+                                                                                           \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q7_t)__QSUB8(0, out);                                                                           \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+}
+#else
+void arm_absmin_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+        q7_t minVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt;                     /* Loop counter */
+
+
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+    pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q15.c
new file mode 100755
index 00000000..e4d0704a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q15.c
@@ -0,0 +1,269 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_q15.c
+ * Description:  Minimum value of absolute values of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmin_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+      uint16_t        blkCnt;           /* loop counters */
+    q15x8_t       vecSrc;
+    q15_t const   *pSrcVec;
+    q15x8_t       curExtremValVec = vdupq_n_s16(Q15_ABSMAX);
+    q15_t           minValue = Q15_ABSMAX;
+    uint16_t        idx = blockSize;
+    uint16x8_t    indexVec;
+    uint16x8_t    curExtremIdxVec;
+    uint32_t        startIdx = 0;
+    mve_pred16_t    p0;
+
+
+    indexVec = vidupq_wb_u16(&startIdx, 1);
+    curExtremIdxVec = vdupq_n_u16(0);
+
+    pSrcVec = (q15_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = vidupq_wb_u16(&startIdx, 1);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        vecSrc = vabsq(vecSrc);
+
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq_m(vecSrc, curExtremValVec, p0);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to min possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0);
+    /*
+     * Get min index which is thus for a min value
+     */
+    idx = vminvq(idx, indexVec);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmin_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+        q15_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q15_t)__QSUB16(0, out);                                                                           \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q15_t)__QSUB16(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmin_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+       q15_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q15_t) 0x8000) ? 0x7fff : -*pSrc);
+    pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q31.c
new file mode 100755
index 00000000..21c769b8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q31.c
@@ -0,0 +1,269 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_q31.c
+ * Description:  Minimum value of absolute values of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_absmin_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+      uint16_t        blkCnt;           /* loop counters */
+    q31x4_t       vecSrc;
+    q31_t const   *pSrcVec;
+    q31x4_t       curExtremValVec = vdupq_n_s32(Q31_ABSMAX);
+    q31_t           minValue = Q31_ABSMAX;
+    uint16_t        idx = blockSize;
+    uint32x4_t    indexVec;
+    uint32x4_t    curExtremIdxVec;
+    uint32_t        startIdx = 0;
+    mve_pred16_t    p0;
+
+
+    indexVec = vidupq_wb_u32(&startIdx, 1);
+    curExtremIdxVec = vdupq_n_u32(0);
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = vidupq_wb_u32(&startIdx, 1);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        vecSrc = vabsq(vecSrc);
+
+        p0 = vctp32q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq_m(vecSrc, curExtremValVec, p0);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to min possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0);
+    /*
+     * Get min index which is thus for a min value
+     */
+    idx = vminvq(idx, indexVec);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmin_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q31_t)__QSUB(0, out);                                                                           \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q31_t)__QSUB(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmin_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == INT32_MIN) ? INT32_MAX : -*pSrc);
+    pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q7.c
new file mode 100755
index 00000000..2889891e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_absmin_q7.c
@@ -0,0 +1,322 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_absmin_q7.c
+ * Description:  Minimum value of absolute values of a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup AbsMin
+  @{
+ */
+
+/**
+  @brief         Minimum value of absolute values of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include <stdint.h>
+#include "arm_helium_utils.h"
+
+#define MAX_BLKSZ_S8  (UINT8_MAX+1)
+
+static void arm_small_blk_absmin_q7(
+    const q7_t        *pSrc,
+    uint32_t     blockSize,
+    q7_t        *pResult,
+    uint32_t    *pIndex)
+{
+    uint16_t        blkCnt;           /* loop counters */
+    q7x16_t       vecSrc;
+    q7_t const   *pSrcVec;
+    q7x16_t       curExtremValVec = vdupq_n_s8(Q7_ABSMAX);
+    q7_t           minValue = Q7_ABSMAX;
+    uint16_t       idx = blockSize - 1;
+    uint8x16_t    indexVec;
+    uint8x16_t    curExtremIdxVec;
+    uint32_t       startIdx = 0;
+    mve_pred16_t   p0;
+
+
+    indexVec = vidupq_wb_u8(&startIdx, 1);
+    curExtremIdxVec = vdupq_n_u8(0);
+
+    pSrcVec = (q7_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        vecSrc = vabsq(vecSrc);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = vidupq_wb_u8(&startIdx, 1);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0U)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        vecSrc = vabsq(vecSrc);
+
+        p0 = vctp8q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq_m(vecSrc, curExtremValVec, p0);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to min possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    idx = vminvq_p_u8(idx, curExtremIdxVec, p0);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+
+void arm_absmin_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+     int32_t   totalSize = blockSize;
+
+    if (totalSize <= MAX_BLKSZ_S8)
+    {
+        arm_small_blk_absmin_q7(pSrc, blockSize, pResult, pIndex);
+    }
+    else
+    {
+        uint32_t  curIdx = 0;
+        q7_t      curBlkExtr = Q7_MAX;
+        uint32_t  curBlkPos = 0;
+        uint32_t  curBlkIdx = 0;
+        /*
+         * process blocks of 255 elts
+         */
+        while (totalSize >= MAX_BLKSZ_S8)
+        {
+            const q7_t     *curSrc = pSrc;
+
+            arm_small_blk_absmin_q7(curSrc, MAX_BLKSZ_S8, pResult, pIndex);
+            if (*pResult < curBlkExtr)
+            {
+                /*
+                 * update partial extrema
+                 */
+                curBlkExtr = *pResult;
+                curBlkPos = *pIndex;
+                curBlkIdx = curIdx;
+            }
+            curIdx++;
+            pSrc += MAX_BLKSZ_S8;
+            totalSize -= MAX_BLKSZ_S8;
+        }
+        /*
+         * remainder
+         */
+        arm_small_blk_absmin_q7(pSrc, totalSize, pResult, pIndex);
+        if (*pResult < curBlkExtr)
+        {
+            curBlkExtr = *pResult;
+            curBlkPos = *pIndex;
+            curBlkIdx = curIdx;
+        }
+        *pIndex = curBlkIdx * MAX_BLKSZ_S8 + curBlkPos;
+        *pResult = curBlkExtr;
+    }
+}
+
+#else
+#if defined(ARM_MATH_DSP)
+void arm_absmin_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+        q7_t cur_absmin, out;                     /* Temporary variables to store the output value. */\
+        uint32_t blkCnt, outIndex;                     /* Loop counter */                                   \
+        uint32_t index;                                /* index of maximum value */                         \
+                                                                                                            \
+  /* Initialize index value to zero. */                                                                     \
+  outIndex = 0U;                                                                                            \
+  /* Load first input value that act as reference value for comparision */                                  \
+  out = *pSrc++;                                                                                            \
+  out = (out > 0) ? out : (q7_t)__QSUB8(0, out);                                                                           \
+  /* Initialize index of extrema value. */                                                                  \
+  index = 0U;                                                                                               \
+                                                                                                            \
+  /* Loop unrolling: Compute 4 outputs at a time */                                                         \
+  blkCnt = (blockSize - 1U) >> 2U;                                                                          \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    /* Initialize cur_absmin to next consecutive values one by one */                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                \
+    /* compare for the extrema value */                                                                     \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      /* Update the extrema value and it's index */                                                         \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 1U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 2U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 3U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                          \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = index + 4U;                                                                                \
+    }                                                                                                       \
+                                                                                                            \
+    index += 4U;                                                                                            \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Loop unrolling: Compute remaining outputs */                                                           \
+  blkCnt = (blockSize - 1U) % 4U;                                                                           \
+                                                                                                            \
+                                                                                                            \
+  while (blkCnt > 0U)                                                                                       \
+  {                                                                                                         \
+    cur_absmin = *pSrc++;                                                                                     \
+    cur_absmin = (cur_absmin > 0) ? cur_absmin : (q7_t)__QSUB8(0, cur_absmin);                                                                 \
+    if (cur_absmin < out)                                                                         \
+    {                                                                                                       \
+      out = cur_absmin;                                                                                       \
+      outIndex = blockSize - blkCnt;                                                                        \
+    }                                                                                                       \
+                                                                                                            \
+    /* Decrement loop counter */                                                                            \
+    blkCnt--;                                                                                               \
+  }                                                                                                         \
+                                                                                                            \
+  /* Store the extrema value and it's index into destination pointers */                                    \
+  *pResult = out;                                                                                           \
+  *pIndex = outIndex;  
+}
+#else
+void arm_absmin_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+        q7_t minVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+  pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = (*pSrc > 0) ? *pSrc : ((*pSrc == (q7_t) 0x80) ? (q7_t) 0x7f : -*pSrc);
+    pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_DSP) */
+#endif /* defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of AbsMin group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f16.c
new file mode 100755
index 00000000..9611fd74
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f16.c
@@ -0,0 +1,140 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f16.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup Entropy Entropy
+
+  Computes the entropy of a distribution
+
+ */
+
+/**
+ * @addtogroup Entropy
+ * @{
+ */
+
+
+/**
+ * @brief Entropy
+ *
+ * @param[in]  pSrcA        Array of input values.
+ * @param[in]  blockSize    Number of samples in the input array.
+ * @return     Entropy      -Sum(p ln p)
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+float16_t arm_entropy_f16(const float16_t * pSrcA,uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    _Float16       accum=0.0f16,p;
+
+
+    blkCnt = blockSize;
+
+    f16x8_t         vSum = vdupq_n_f16(0.0f);
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3U;
+
+    while (blkCnt > 0U)
+    {
+        f16x8_t         vecIn = vld1q(pSrcA);
+
+        vSum = vaddq_f16(vSum, vmulq(vecIn, vlogq_f16(vecIn)));
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrcA += 8;
+        blkCnt --;
+    }
+
+    accum = vecAddAcrossF16Mve(vSum);
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+    while(blkCnt > 0)
+    {
+       p = *pSrcA++;
+       accum += p * (_Float16)logf((float32_t)p);
+       
+       blkCnt--;
+    
+    }
+
+    return (-accum);
+}
+
+#else
+
+float16_t arm_entropy_f16(const float16_t * pSrcA,uint32_t blockSize)
+{
+    const float16_t *pIn;
+    uint32_t blkCnt;
+    _Float16 accum, p;
+ 
+    pIn = pSrcA;
+    blkCnt = blockSize;
+
+    accum = 0.0f;
+
+    while(blkCnt > 0)
+    {
+       p = *pIn++;
+       accum += p * (_Float16)logf((float32_t)p);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of Entropy group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c
new file mode 100755
index 00000000..a2160c16
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f32.c
@@ -0,0 +1,174 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f32.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup Entropy
+ * @{
+ */
+
+
+/**
+ * @brief Entropy
+ *
+ * @param[in]  pSrcA        Array of input values.
+ * @param[in]  blockSize    Number of samples in the input array.
+ * @return     Entropy      -Sum(p ln p)
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize)
+{
+    uint32_t        blkCnt;
+    float32_t       accum=0.0f,p;
+
+
+    blkCnt = blockSize;
+
+    f32x4_t         vSum = vdupq_n_f32(0.0f);
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+
+    while (blkCnt > 0U)
+    {
+        f32x4_t         vecIn = vld1q(pSrcA);
+
+        vSum = vaddq_f32(vSum, vmulq(vecIn, vlogq_f32(vecIn)));
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrcA += 4;
+        blkCnt --;
+    }
+
+    accum = vecAddAcrossF32Mve(vSum);
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+    while(blkCnt > 0)
+    {
+       p = *pSrcA++;
+       accum += p * logf(p);
+       
+       blkCnt--;
+    
+    }
+
+    return (-accum);
+}
+
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "NEMath.h"
+
+float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize)
+{
+    const float32_t *pIn;
+    uint32_t blkCnt;
+    float32_t accum, p;
+
+    float32x4_t accumV;
+    float32x2_t accumV2;
+    float32x4_t tmpV, tmpV2;
+ 
+    pIn = pSrcA;
+
+    accum = 0.0f;
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while(blkCnt > 0)
+    {
+      tmpV = vld1q_f32(pIn);
+      pIn += 4;
+
+      tmpV2 = vlogq_f32(tmpV);
+      accumV = vmlaq_f32(accumV, tmpV, tmpV2);
+       
+      blkCnt--;
+    
+    }
+
+    accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV));
+    accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+    
+
+    blkCnt = blockSize & 3;
+    while(blkCnt > 0)
+    {
+       p = *pIn++;
+       accum += p * logf(p);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+
+#else
+float32_t arm_entropy_f32(const float32_t * pSrcA,uint32_t blockSize)
+{
+    const float32_t *pIn;
+    uint32_t blkCnt;
+    float32_t accum, p;
+ 
+    pIn = pSrcA;
+    blkCnt = blockSize;
+
+    accum = 0.0f;
+
+    while(blkCnt > 0)
+    {
+       p = *pIn++;
+       accum += p * logf(p);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of Entropy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c
new file mode 100755
index 00000000..d671791c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_entropy_f64.c
@@ -0,0 +1,73 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f64.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+ * @addtogroup Entropy
+ * @{
+ */
+
+/**
+ * @brief Entropy
+ *
+ * @param[in]  pSrcA        Array of input values.
+ * @param[in]  blockSize    Number of samples in the input array.
+ * @return     Entropy      -Sum(p ln p)
+ *
+ */
+
+float64_t arm_entropy_f64(const float64_t * pSrcA, uint32_t blockSize)
+{
+    const float64_t *pIn;
+    uint32_t blkCnt;
+    float64_t accum, p;
+ 
+    pIn = pSrcA;
+    blkCnt = blockSize;
+
+    accum = 0.0;
+
+    while(blkCnt > 0)
+    {
+        p = *pIn++;
+
+        accum += p * log(p);
+       
+        blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+
+/**
+ * @} end of Entropy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c
new file mode 100755
index 00000000..98ac097f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c
@@ -0,0 +1,152 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f16.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup Kullback-Leibler Kullback-Leibler divergence
+
+  Computes the Kullback-Leibler divergence between two distributions
+
+ */
+
+
+/**
+ * @addtogroup Kullback-Leibler
+ * @{
+ */
+
+
+/**
+ * @brief Kullback-Leibler
+ *
+ * Distribution A may contain 0 with Neon version.
+ * Result will be right but some exception flags will be set.
+ *
+ * Distribution B must not contain 0 probability.
+ *
+ * @param[in]  *pSrcA         points to an array of input values for probaility distribution A.
+ * @param[in]  *pSrcB         points to an array of input values for probaility distribution B.
+ * @param[in]  blockSize      number of samples in the input array.
+ * @return Kullback-Leibler divergence D(A || B)
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+float16_t arm_kullback_leibler_f16(const float16_t * pSrcA,const float16_t * pSrcB,uint32_t blockSize)
+{
+    uint32_t blkCnt;
+    _Float16 accum, pA,pB;
+ 
+    
+    blkCnt = blockSize;
+
+    accum = 0.0f16;
+
+    f16x8_t         vSum = vdupq_n_f16(0.0f16);
+    blkCnt = blockSize >> 3;
+    while(blkCnt > 0)
+    {
+        f16x8_t         vecA = vld1q(pSrcA);
+        f16x8_t         vecB = vld1q(pSrcB);
+        f16x8_t         vRatio;
+
+        vRatio = vdiv_f16(vecB, vecA);
+        vSum = vaddq_f16(vSum, vmulq(vecA, vlogq_f16(vRatio)));
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrcA += 8;
+        pSrcB += 8;
+        blkCnt --;
+    }
+
+    accum = vecAddAcrossF16Mve(vSum);
+
+    blkCnt = blockSize & 7;
+    while(blkCnt > 0)
+    {
+       pA = *pSrcA++;
+       pB = *pSrcB++;
+       accum += pA * (_Float16)logf((float32_t)pB / (float32_t)pA);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+
+#else
+float16_t arm_kullback_leibler_f16(const float16_t * pSrcA,const float16_t * pSrcB,uint32_t blockSize)
+{
+    const float16_t *pInA, *pInB;
+    uint32_t blkCnt;
+    _Float16 accum, pA,pB;
+ 
+    pInA = pSrcA;
+    pInB = pSrcB;
+    blkCnt = blockSize;
+
+    accum = 0.0f;
+
+    while(blkCnt > 0)
+    {
+       pA = *pInA++;
+       pB = *pInB++;
+       accum += pA * (_Float16)logf((float32_t)pB / (float32_t)pA);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of Kullback-Leibler group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c
new file mode 100755
index 00000000..45a9624c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f32.c
@@ -0,0 +1,193 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f32.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup Kullback-Leibler
+ * @{
+ */
+
+
+/**
+ * @brief Kullback-Leibler
+ *
+ * Distribution A may contain 0 with Neon version.
+ * Result will be right but some exception flags will be set.
+ *
+ * Distribution B must not contain 0 probability.
+ *
+ * @param[in]  *pSrcA         points to an array of input values for probaility distribution A.
+ * @param[in]  *pSrcB         points to an array of input values for probaility distribution B.
+ * @param[in]  blockSize      number of samples in the input array.
+ * @return Kullback-Leibler divergence D(A || B)
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSize)
+{
+    uint32_t blkCnt;
+    float32_t accum, pA,pB;
+ 
+    
+    blkCnt = blockSize;
+
+    accum = 0.0f;
+
+    f32x4_t         vSum = vdupq_n_f32(0.0f);
+    blkCnt = blockSize >> 2;
+    while(blkCnt > 0)
+    {
+        f32x4_t         vecA = vld1q(pSrcA);
+        f32x4_t         vecB = vld1q(pSrcB);
+        f32x4_t         vRatio;
+
+        vRatio = vdiv_f32(vecB, vecA);
+        vSum = vaddq_f32(vSum, vmulq(vecA, vlogq_f32(vRatio)));
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrcA += 4;
+        pSrcB += 4;
+        blkCnt --;
+    }
+
+    accum = vecAddAcrossF32Mve(vSum);
+
+    blkCnt = blockSize & 3;
+    while(blkCnt > 0)
+    {
+       pA = *pSrcA++;
+       pB = *pSrcB++;
+       accum += pA * logf(pB / pA);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "NEMath.h"
+
+float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSize)
+{
+    const float32_t *pInA, *pInB;
+    uint32_t blkCnt;
+    float32_t accum, pA,pB;
+
+    float32x4_t accumV;
+    float32x2_t accumV2;
+    float32x4_t tmpVA, tmpVB,tmpV;
+ 
+    pInA = pSrcA;
+    pInB = pSrcB;
+
+    accum = 0.0f;
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while(blkCnt > 0)
+    {
+      tmpVA = vld1q_f32(pInA);
+      pInA += 4;
+
+      tmpVB = vld1q_f32(pInB);
+      pInB += 4;
+
+      tmpV = vinvq_f32(tmpVA);
+      tmpVB = vmulq_f32(tmpVB, tmpV);
+      tmpVB = vlogq_f32(tmpVB);
+
+      accumV = vmlaq_f32(accumV, tmpVA, tmpVB);
+       
+      blkCnt--;
+    
+    }
+
+    accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV));
+    accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+
+    blkCnt = blockSize & 3;
+    while(blkCnt > 0)
+    {
+       pA = *pInA++;
+       pB = *pInB++;
+       accum += pA * logf(pB/pA);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+
+#else
+float32_t arm_kullback_leibler_f32(const float32_t * pSrcA,const float32_t * pSrcB,uint32_t blockSize)
+{
+    const float32_t *pInA, *pInB;
+    uint32_t blkCnt;
+    float32_t accum, pA,pB;
+ 
+    pInA = pSrcA;
+    pInB = pSrcB;
+    blkCnt = blockSize;
+
+    accum = 0.0f;
+
+    while(blkCnt > 0)
+    {
+       pA = *pInA++;
+       pB = *pInB++;
+       accum += pA * logf(pB / pA);
+       
+       blkCnt--;
+    
+    }
+
+    return(-accum);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of Kullback-Leibler group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c
new file mode 100755
index 00000000..b43b2186
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f64.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#include <limits.h>
+#include <math.h>
+
+/**
+ * @addtogroup Kullback-Leibler
+ * @{
+ */
+
+/**
+ * @brief Kullback-Leibler
+ *
+ * @param[in]  *pSrcA         points to an array of input values for probaility distribution A.
+ * @param[in]  *pSrcB         points to an array of input values for probaility distribution B.
+ * @param[in]  blockSize      number of samples in the input array.
+ * @return Kullback-Leibler divergence D(A || B)
+ *
+ */
+
+float64_t arm_kullback_leibler_f64(const float64_t * pSrcA, const float64_t * pSrcB, uint32_t blockSize)
+{
+    const float64_t *pInA, *pInB;
+    uint32_t blkCnt;
+    float64_t accum, pA,pB;
+ 
+    pInA = pSrcA;
+    pInB = pSrcB;
+    blkCnt = blockSize;
+
+    accum = 0.0;
+
+    while(blkCnt > 0)
+    {
+        pA = *pInA++;
+        pB = *pInB++;
+
+        accum += pA * log(pB / pA);
+       
+        blkCnt--;
+    }
+
+    return(-accum);
+}
+
+/**
+ * @} end of Kullback-Leibler group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f16.c
new file mode 100755
index 00000000..a35ac0e8
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f16.c
@@ -0,0 +1,84 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f16.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup LogSumExp LogSumExp
+
+  LogSumExp optimizations to compute sum of probabilities with Gaussian distributions
+
+ */
+
+/**
+ * @addtogroup LogSumExp
+ * @{
+ */
+
+
+/**
+ * @brief Dot product with log arithmetic
+ *
+ * Vectors are containing the log of the samples
+ *
+ * @param[in]       *pSrcA points to the first input vector
+ * @param[in]       *pSrcB points to the second input vector
+ * @param[in]       blockSize number of samples in each vector
+ * @param[in]       *pTmpBuffer temporary buffer of length blockSize
+ * @return The log of the dot product.
+ *
+ */
+
+
+float16_t arm_logsumexp_dot_prod_f16(const float16_t * pSrcA,
+  const float16_t * pSrcB,
+  uint32_t blockSize,
+  float16_t *pTmpBuffer)
+{
+    float16_t result;
+    arm_add_f16((float16_t*)pSrcA, (float16_t*)pSrcB, pTmpBuffer, blockSize);
+
+    result = arm_logsumexp_f16(pTmpBuffer, blockSize);
+    return(result);
+}
+
+/**
+ * @} end of LogSumExp group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c
new file mode 100755
index 00000000..d2a94dac
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_dot_prod_f32.c
@@ -0,0 +1,68 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f32.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup LogSumExp
+ * @{
+ */
+
+
+/**
+ * @brief Dot product with log arithmetic
+ *
+ * Vectors are containing the log of the samples
+ *
+ * @param[in]       *pSrcA points to the first input vector
+ * @param[in]       *pSrcB points to the second input vector
+ * @param[in]       blockSize number of samples in each vector
+ * @param[in]       *pTmpBuffer temporary buffer of length blockSize
+ * @return The log of the dot product.
+ *
+ */
+
+
+float32_t arm_logsumexp_dot_prod_f32(const float32_t * pSrcA,
+  const float32_t * pSrcB,
+  uint32_t blockSize,
+  float32_t *pTmpBuffer)
+{
+    float32_t result;
+    arm_add_f32((float32_t*)pSrcA, (float32_t*)pSrcB, pTmpBuffer, blockSize);
+
+    result = arm_logsumexp_f32(pTmpBuffer, blockSize);
+    return(result);
+}
+
+/**
+ * @} end of LogSumExp group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c
new file mode 100755
index 00000000..84d4843c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c
@@ -0,0 +1,172 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f16.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup LogSumExp
+ * @{
+ */
+
+
+/**
+ * @brief Computation of the LogSumExp
+ *
+ * In probabilistic computations, the dynamic of the probability values can be very
+ * wide because they come from gaussian functions.
+ * To avoid underflow and overflow issues, the values are represented by their log.
+ * In this representation, multiplying the original exp values is easy : their logs are added.
+ * But adding the original exp values is requiring some special handling and it is the
+ * goal of the LogSumExp function.
+ *
+ * If the values are x1...xn, the function is computing:
+ *
+ * ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that
+ * rounding issues are minimised.
+ *
+ * The max xm of the values is extracted and the function is computing:
+ * xm + ln(exp(x1 - xm) + ... + exp(xn - xm))
+ *
+ * @param[in]  *in         Pointer to an array of input values.
+ * @param[in]  blockSize   Number of samples in the input array.
+ * @return LogSumExp
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
+float16_t arm_logsumexp_f16(const float16_t *in, uint32_t blockSize)
+{
+    float16_t       maxVal;
+    const float16_t *pIn;
+    int32_t         blkCnt;
+    _Float16       accum=0.0f16;
+    _Float16       tmp;
+
+
+    arm_max_no_idx_f16((float16_t *) in, blockSize, &maxVal);
+
+
+    blkCnt = blockSize;
+    pIn = in;
+
+
+    f16x8_t         vSum = vdupq_n_f16(0.0f16);
+    blkCnt = blockSize >> 3;
+    while(blkCnt > 0)
+    {
+        f16x8_t         vecIn = vld1q(pIn);
+        f16x8_t         vecExp;
+
+        vecExp = vexpq_f16(vsubq_n_f16(vecIn, maxVal));
+
+        vSum = vaddq_f16(vSum, vecExp);
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pIn += 8;
+        blkCnt --;
+    }
+
+    /* sum + log */
+    accum = vecAddAcrossF16Mve(vSum);
+
+    blkCnt = blockSize & 0x7;
+    while(blkCnt > 0)
+    {
+       tmp = *pIn++;
+       accum += (_Float16)expf((float32_t)((_Float16)tmp - (_Float16)maxVal));
+       blkCnt--;
+    
+    }
+
+    accum = (_Float16)maxVal + (_Float16)logf((float32_t)accum);
+
+    return (accum);
+}
+
+#else
+float16_t arm_logsumexp_f16(const float16_t *in, uint32_t blockSize)
+{
+    _Float16 maxVal;
+    _Float16 tmp;
+    const float16_t *pIn;
+    uint32_t blkCnt;
+    _Float16 accum;
+ 
+    pIn = in;
+    blkCnt = blockSize;
+
+    maxVal = *pIn++;
+    blkCnt--;
+
+    while(blkCnt > 0)
+    {
+       tmp = *pIn++;
+
+       if (tmp > maxVal)
+       {
+          maxVal = tmp;
+       }
+       blkCnt--;
+    
+    }
+
+    blkCnt = blockSize;
+    pIn = in;
+    accum = 0;
+    while(blkCnt > 0)
+    {
+       tmp = *pIn++;
+       accum += (_Float16)expf((float32_t)((_Float16)tmp - (_Float16)maxVal));
+       blkCnt--;
+    
+    }
+    accum = (_Float16)maxVal + (_Float16)logf((float32_t)accum);
+
+    return(accum);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of LogSumExp group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c
new file mode 100755
index 00000000..72a5d3a4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c
@@ -0,0 +1,277 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_logsumexp_f32.c
+ * Description:  LogSumExp
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+ * @addtogroup LogSumExp
+ * @{
+ */
+
+
+/**
+ * @brief Computation of the LogSumExp
+ *
+ * In probabilistic computations, the dynamic of the probability values can be very
+ * wide because they come from gaussian functions.
+ * To avoid underflow and overflow issues, the values are represented by their log.
+ * In this representation, multiplying the original exp values is easy : their logs are added.
+ * But adding the original exp values is requiring some special handling and it is the
+ * goal of the LogSumExp function.
+ *
+ * If the values are x1...xn, the function is computing:
+ *
+ * ln(exp(x1) + ... + exp(xn)) and the computation is done in such a way that
+ * rounding issues are minimised.
+ *
+ * The max xm of the values is extracted and the function is computing:
+ * xm + ln(exp(x1 - xm) + ... + exp(xn - xm))
+ *
+ * @param[in]  *in         Pointer to an array of input values.
+ * @param[in]  blockSize   Number of samples in the input array.
+ * @return LogSumExp
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math.h"
+
+float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize)
+{
+    float32_t       maxVal;
+    const float32_t *pIn;
+    int32_t         blkCnt;
+    float32_t       accum=0.0f;
+    float32_t       tmp;
+
+
+    arm_max_no_idx_f32((float32_t *) in, blockSize, &maxVal);
+
+
+    blkCnt = blockSize;
+    pIn = in;
+
+
+    f32x4_t         vSum = vdupq_n_f32(0.0f);
+    blkCnt = blockSize >> 2;
+    while(blkCnt > 0)
+    {
+        f32x4_t         vecIn = vld1q(pIn);
+        f32x4_t         vecExp;
+
+        vecExp = vexpq_f32(vsubq_n_f32(vecIn, maxVal));
+
+        vSum = vaddq_f32(vSum, vecExp);
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pIn += 4;
+        blkCnt --;
+    }
+
+    /* sum + log */
+    accum = vecAddAcrossF32Mve(vSum);
+
+    blkCnt = blockSize & 0x3;
+    while(blkCnt > 0)
+    {
+       tmp = *pIn++;
+       accum += expf(tmp - maxVal);
+       blkCnt--;
+    
+    }
+
+    accum = maxVal + logf(accum);
+
+    return (accum);
+}
+
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "NEMath.h"
+float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize)
+{
+    float32_t maxVal;
+    float32_t tmp;
+    float32x4_t tmpV, tmpVb;
+    float32x4_t maxValV;
+    uint32x4_t idxV;
+    float32x4_t accumV;
+    float32x2_t accumV2;
+
+    const float32_t *pIn;
+    uint32_t blkCnt;
+    float32_t accum;
+ 
+    pIn = in;
+
+    blkCnt = blockSize;
+
+    if (blockSize <= 3)
+    {
+      maxVal = *pIn++;
+      blkCnt--;
+
+      while(blkCnt > 0)
+      {
+         tmp = *pIn++;
+  
+         if (tmp > maxVal)
+         {
+            maxVal = tmp;
+         }
+         blkCnt--;
+      }
+    }
+    else
+    {
+      maxValV = vld1q_f32(pIn);
+      pIn += 4;
+      blkCnt = (blockSize - 4) >> 2;
+
+      while(blkCnt > 0)
+      {
+         tmpVb = vld1q_f32(pIn);
+         pIn += 4;
+  
+         idxV = vcgtq_f32(tmpVb, maxValV);
+         maxValV = vbslq_f32(idxV, tmpVb, maxValV );
+
+         blkCnt--;
+      }
+
+      accumV2 = vpmax_f32(vget_low_f32(maxValV),vget_high_f32(maxValV));
+      accumV2 = vpmax_f32(accumV2,accumV2);
+      maxVal = vget_lane_f32(accumV2, 0) ;
+
+      blkCnt = (blockSize - 4) & 3;
+
+      while(blkCnt > 0)
+      {
+         tmp = *pIn++;
+  
+         if (tmp > maxVal)
+         {
+            maxVal = tmp;
+         }
+         blkCnt--;
+      }
+
+    }
+
+    
+
+    maxValV = vdupq_n_f32(maxVal);
+    pIn = in;
+    accum = 0;
+    accumV = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+
+    while(blkCnt > 0)
+    {
+       tmpV = vld1q_f32(pIn);
+       pIn += 4;
+       tmpV = vsubq_f32(tmpV, maxValV);
+       tmpV = vexpq_f32(tmpV);
+       accumV = vaddq_f32(accumV, tmpV);
+
+       blkCnt--;
+    
+    }
+    accumV2 = vpadd_f32(vget_low_f32(accumV),vget_high_f32(accumV));
+    accum = vget_lane_f32(accumV2, 0) + vget_lane_f32(accumV2, 1);
+
+    blkCnt = blockSize & 0x3;
+    while(blkCnt > 0)
+    {
+       tmp = *pIn++;
+       accum += expf(tmp - maxVal);
+       blkCnt--;
+    
+    }
+
+    accum = maxVal + logf(accum);
+
+    return(accum);
+}
+#else
+float32_t arm_logsumexp_f32(const float32_t *in, uint32_t blockSize)
+{
+    float32_t maxVal;
+    float32_t tmp;
+    const float32_t *pIn;
+    uint32_t blkCnt;
+    float32_t accum;
+ 
+    pIn = in;
+    blkCnt = blockSize;
+
+    maxVal = *pIn++;
+    blkCnt--;
+
+    while(blkCnt > 0)
+    {
+       tmp = *pIn++;
+
+       if (tmp > maxVal)
+       {
+          maxVal = tmp;
+       }
+       blkCnt--;
+    
+    }
+
+    blkCnt = blockSize;
+    pIn = in;
+    accum = 0;
+    while(blkCnt > 0)
+    {
+       tmp = *pIn++;
+       accum += expf(tmp - maxVal);
+       blkCnt--;
+    
+    }
+    accum = maxVal + logf(accum);
+
+    return(accum);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of LogSumExp group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f16.c
new file mode 100755
index 00000000..b5017f14
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f16.c
@@ -0,0 +1,246 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_f16.c
+ * Description:  Maximum value of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_max_f16(
+  const float16_t * pSrc,
+  uint32_t blockSize,
+  float16_t * pResult,
+  uint32_t * pIndex)
+{
+     int32_t blkCnt;
+    f16x8_t vecSrc;
+    f16x8_t curExtremValVec = vdupq_n_f16(F16_MIN);
+    float16_t maxValue = F16_MIN;
+    uint32_t idx = blockSize;
+    uint16x8_t indexVec;
+    uint16x8_t curExtremIdxVec;
+    uint32_t curIdx = 0;
+    mve_pred16_t p0;
+    float16_t tmp;
+
+
+    indexVec = vidupq_wb_u16(&curIdx, 1);
+    curExtremIdxVec = vdupq_n_u16(0);
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrhq_f16(pSrc);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = vidupq_wb_u16(&curIdx, 1);
+
+        pSrc += 8;
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmvq(maxValue, curExtremValVec);
+    /*
+     * set index for lower values to max possible index
+     */
+    p0 = vcmpgeq(curExtremValVec, maxValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0);
+    /*
+     * Get min index which is thus for a max value
+     */
+    idx = vminvq(idx, indexVec);
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+
+    while (blkCnt > 0)
+    {
+      /* Initialize tmp to the next consecutive values one by one */
+      tmp = *pSrc++;
+
+      /* compare for the maximum value */
+      if ((_Float16)maxValue < (_Float16)tmp)
+      {
+        /* Update the maximum value and it's index */
+        maxValue = tmp;
+        idx = blockSize - blkCnt;
+      }
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = maxValue;
+}
+
+#else
+void arm_max_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+        float16_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if ((_Float16)out < (_Float16)maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if ((_Float16)out < (_Float16)maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if ((_Float16)out < (_Float16)maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if ((_Float16)out < (_Float16)maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if ((_Float16)out < (_Float16)maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Max group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
index f6ffafe0..d82b0390 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f32.c
@@ -1,271 +1,365 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_max_f32.c
- * Description:  Maximum value of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#if defined(ARM_MATH_NEON)
-#include <limits.h>
-#endif
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @defgroup Max Maximum
-
-  Computes the maximum value of an array of data.
-  The function returns both the maximum value and its position within the array.
-  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
- */
-
-/**
-  @addtogroup Max
-  @{
- */
-
-/**
-  @brief         Maximum value of a floating-point vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    maximum value returned here
-  @param[out]    pIndex     index of maximum value returned here
-  @return        none
- */
-#if defined(ARM_MATH_NEON)
-void arm_max_f32(
-  const float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  float32x4_t outV, srcV;
-  float32x2_t outV2;
-
-  uint32x4_t idxV;
-  uint32x4_t maxIdx={ULONG_MAX,ULONG_MAX,ULONG_MAX,ULONG_MAX};
-  uint32x4_t index={4,5,6,7};
-  uint32x4_t delta={4,4,4,4};
-  uint32x4_t countV={0,1,2,3};
-  uint32x2_t countV2;
-
-  /* Initialise the count value. */
-  count = 0U;
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-
-  /* Load first input value that act as reference value for comparison */
-  if (blockSize <= 3)
-  {
-      out = *pSrc++;
-
-      blkCnt = blockSize - 1;
-
-      while (blkCnt > 0U)
-      {
-        /* Initialize maxVal to the next consecutive values one by one */
-        maxVal1 = *pSrc++;
-    
-        /* compare for the maximum value */
-        if (out < maxVal1)
-        {
-          /* Update the maximum value and it's index */
-          out = maxVal1;
-          outIndex = blockSize - blkCnt;
-        }
-    
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-  }
-  else
-  {
-      outV = vld1q_f32(pSrc);
-      pSrc += 4;
- 
-      /* Compute 4 outputs at a time */
-      blkCnt = (blockSize - 4 ) >> 2U;
-    
-      while (blkCnt > 0U)
-      {
-        srcV = vld1q_f32(pSrc);
-        pSrc += 4;
-    
-        idxV = vcgtq_f32(srcV, outV);
-        outV = vbslq_f32(idxV, srcV, outV );
-        countV = vbslq_u32(idxV, index,countV );
-    
-        index = vaddq_u32(index,delta);
-    
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    
-      outV2 = vpmax_f32(vget_low_f32(outV),vget_high_f32(outV));
-      outV2 = vpmax_f32(outV2,outV2);
-      out = outV2[0];
-    
-      idxV = vceqq_f32(outV, vdupq_n_f32(out));
-      countV = vbslq_u32(idxV, countV,maxIdx);
-      
-      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
-      countV2 = vpmin_u32(countV2,countV2);
-      outIndex = countV2[0];
-    
-      /* if (blockSize - 1U) is not multiple of 4 */
-      blkCnt = (blockSize - 4 ) % 4U;
-    
-      while (blkCnt > 0U)
-      {
-        /* Initialize maxVal to the next consecutive values one by one */
-        maxVal1 = *pSrc++;
-    
-        /* compare for the maximum value */
-        if (out < maxVal1)
-        {
-          /* Update the maximum value and it's index */
-          out = maxVal1;
-          outIndex = blockSize - blkCnt ;
-        }
-    
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    
-      
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-#else
-void arm_max_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult,
-        uint32_t * pIndex)
-{
-        float32_t maxVal, out;                         /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = index + 1U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 2U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 3U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-/**
-  @} end of Max group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_f32.c
+ * Description:  Maximum value of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup Max Maximum
+
+  Computes the maximum value of an array of data.
+  The function returns both the maximum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_max_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex)
+{
+    uint32_t blkCnt; 
+    f32x4_t vecSrc;
+    f32x4_t curExtremValVec = vdupq_n_f32(F32_MIN);
+    float32_t maxValue = F32_MIN;
+    uint32_t idx = blockSize;
+    uint32x4_t indexVec;
+    uint32x4_t curExtremIdxVec;
+    uint32_t curIdx = 0;
+    mve_pred16_t p0;
+    float32_t tmp;
+
+
+    indexVec = vidupq_wb_u32(&curIdx, 1);
+    curExtremIdxVec = vdupq_n_u32(0);
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_f32(pSrc);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = vidupq_wb_u32(&curIdx, 1);
+
+        pSrc += 4;
+        /* Decrement the loop counter */
+        blkCnt--;
+    }
+
+
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmvq(maxValue, curExtremValVec);
+    /*
+     * set index for lower values to max possible index
+     */
+    p0 = vcmpgeq(curExtremValVec, maxValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0);
+    /*
+     * Get min index which is thus for a max value
+     */
+    idx = vminvq(idx, indexVec);
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+    while (blkCnt > 0U)
+    {
+      /* Initialize tmp to the next consecutive values one by one */
+      tmp = *pSrc++;
+
+      /* compare for the maximum value */
+      if (maxValue < tmp)
+      {
+        /* Update the maximum value and it's index */
+        maxValue = tmp;
+        idx = blockSize - blkCnt;
+      }
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = maxValue;
+}
+
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_max_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex)
+{
+  float32_t maxVal1, out;               /* Temporary variables to store the output value. */
+  uint32_t blkCnt, outIndex;              /* loop counter */
+
+  float32x4_t outV, srcV;
+  float32x2_t outV2;
+
+  uint32x4_t idxV;
+  uint32x4_t maxIdx;
+  static const uint32_t indexInit[4]={4,5,6,7};
+  static const uint32_t countVInit[4]={0,1,2,3};
+
+  uint32x4_t index;
+  uint32x4_t delta;
+  uint32x4_t countV;
+  uint32x2_t countV2;
+
+  maxIdx = vdupq_n_u32(ULONG_MAX);
+  delta = vdupq_n_u32(4);
+  index = vld1q_u32(indexInit);
+  countV = vld1q_u32(countVInit);
+
+
+  /* Initialise the index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparison */
+  if (blockSize <= 3)
+  {
+      out = *pSrc++;
+
+      blkCnt = blockSize - 1;
+
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out < maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+  else
+  {
+      outV = vld1q_f32(pSrc);
+      pSrc += 4;
+ 
+      /* Compute 4 outputs at a time */
+      blkCnt = (blockSize - 4 ) >> 2U;
+    
+      while (blkCnt > 0U)
+      {
+        srcV = vld1q_f32(pSrc);
+        pSrc += 4;
+    
+        idxV = vcgtq_f32(srcV, outV);
+        outV = vbslq_f32(idxV, srcV, outV );
+        countV = vbslq_u32(idxV, index,countV );
+    
+        index = vaddq_u32(index,delta);
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      outV2 = vpmax_f32(vget_low_f32(outV),vget_high_f32(outV));
+      outV2 = vpmax_f32(outV2,outV2);
+      out = vget_lane_f32(outV2, 0);
+    
+      idxV = vceqq_f32(outV, vdupq_n_f32(out));
+      countV = vbslq_u32(idxV, countV,maxIdx);
+      
+      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
+      countV2 = vpmin_u32(countV2,countV2);
+      outIndex = vget_lane_u32(countV2,0); 
+    
+      /* if (blockSize - 1U) is not multiple of 4 */
+      blkCnt = (blockSize - 4 ) % 4U;
+    
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out < maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt ;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#else
+void arm_max_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f64.c
new file mode 100644
index 00000000..83612190
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_f64.c
@@ -0,0 +1,90 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_f64.c
+ * Description:  Maximum value of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+void arm_max_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex)
+{
+        float64_t maxVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c
new file mode 100755
index 00000000..f989f603
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c
@@ -0,0 +1,144 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_no_idx_f16.c
+ * Description:  Maximum value of a floating-point vector without returning the index
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_max_no_idx_f16(
+    const float16_t *pSrc,
+    uint32_t   blockSize,
+    float16_t *pResult)
+{
+   f16x8_t     vecSrc;
+   f16x8_t     curExtremValVec = vdupq_n_f16(F16_MIN);
+   float16_t   maxValue = F16_MIN;
+   float16_t   newVal;
+   uint32_t    blkCnt;
+
+   /* Loop unrolling: Compute 4 outputs at a time */
+   blkCnt = blockSize >> 3U;
+
+   while (blkCnt > 0U)
+   {
+
+        vecSrc = vldrhq_f16(pSrc);
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxnmq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 8;
+        blkCnt --;
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmvq(maxValue, curExtremValVec);
+
+    blkCnt = blockSize & 7;
+
+    while (blkCnt > 0U)
+    {
+        newVal = *pSrc++;
+
+        /* compare for the maximum value */
+        if ((_Float16)maxValue < (_Float16)newVal)
+        {
+            /* Update the maximum value and it's index */
+            maxValue = newVal;
+        }
+
+        blkCnt --;
+    }
+
+    *pResult = maxValue;
+}
+
+#else
+
+void arm_max_no_idx_f16(
+    const float16_t *pSrc,
+    uint32_t   blockSize,
+    float16_t *pResult)
+{
+   float16_t   maxValue = F16_MIN;
+   float16_t   newVal;
+
+   while (blockSize > 0U)
+   {
+       newVal = *pSrc++;
+   
+       /* compare for the maximum value */
+       if ((_Float16)maxValue < (_Float16)newVal)
+       {
+           /* Update the maximum value and it's index */
+           maxValue = newVal;
+       }
+   
+       blockSize --;
+   }
+    
+   *pResult = maxValue;
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Max group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c
new file mode 100755
index 00000000..9a2a015a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f32.c
@@ -0,0 +1,138 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_no_idx_f32.c
+ * Description:  Maximum value of a floating-point vector without returning the index
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_max_no_idx_f32(
+    const float32_t *pSrc,
+    uint32_t   blockSize,
+    float32_t *pResult)
+{
+   f32x4_t     vecSrc;
+   f32x4_t     curExtremValVec = vdupq_n_f32(F32_MIN);
+   float32_t   maxValue = F32_MIN;
+   float32_t   newVal;
+   uint32_t    blkCnt;
+
+   /* Loop unrolling: Compute 4 outputs at a time */
+   blkCnt = blockSize >> 2U;
+
+   while (blkCnt > 0U)
+   {
+
+        vecSrc = vldrwq_f32(pSrc);
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxnmq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 4;
+        blkCnt --;
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxnmvq(maxValue, curExtremValVec);
+
+    blkCnt = blockSize & 3;
+
+    while (blkCnt > 0U)
+    {
+        newVal = *pSrc++;
+
+        /* compare for the maximum value */
+        if (maxValue < newVal)
+        {
+            /* Update the maximum value and it's index */
+            maxValue = newVal;
+        }
+
+        blkCnt --;
+    }
+
+    *pResult = maxValue;
+}
+
+#else
+
+void arm_max_no_idx_f32(
+    const float32_t *pSrc,
+    uint32_t   blockSize,
+    float32_t *pResult)
+{
+   float32_t   maxValue = F32_MIN;
+   float32_t   newVal;
+
+   while (blockSize > 0U)
+   {
+       newVal = *pSrc++;
+   
+       /* compare for the maximum value */
+       if (maxValue < newVal)
+       {
+           /* Update the maximum value and it's index */
+           maxValue = newVal;
+       }
+   
+       blockSize --;
+   }
+    
+   *pResult = maxValue;
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f64.c
new file mode 100644
index 00000000..7eca31c5
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_no_idx_f64.c
+ * Description:  Maximum value of a floating-point vector without returning the index
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+void arm_max_no_idx_f64(
+    const float64_t *pSrc,
+    uint32_t   blockSize,
+    float64_t *pResult)
+{
+   float64_t   maxValue = F64_MIN;
+   float64_t   newVal;
+
+   while (blockSize > 0U)
+   {
+       newVal = *pSrc++;
+   
+       /* compare for the maximum value */
+       if (maxValue < newVal)
+       {
+           /* Update the maximum value and it's index */
+           maxValue = newVal;
+       }
+   
+       blockSize --;
+   }
+    
+   *pResult = maxValue;
+}
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q15.c
new file mode 100755
index 00000000..2adea1ad
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q15.c
@@ -0,0 +1,142 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_no_idx_q15.c
+ * Description:  Maximum value of a q15 vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a q15 vector without index.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_max_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q15x8_t       vecSrc;
+    q15_t const *pSrcVec;
+    q15x8_t       curExtremValVec = vdupq_n_s16(Q15_MIN);
+    q15_t           maxValue = Q15_MIN;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q15_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxq_m(curExtremValVec, vecSrc, curExtremValVec, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxvq(maxValue, curExtremValVec);
+    *pResult = maxValue;
+}
+
+#else
+void arm_max_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+  q15_t maxVal1, out;       /* Temporary variables to store the output value. */     
+  uint32_t blkCnt;              /* loop counter */                                 
+                                                                                   
+  /* Load first input value that act as reference value for comparision */         
+  out = *pSrc++;                                                                   
+                                                                                   
+  blkCnt = (blockSize - 1U);                                                       
+                                                                                   
+                                                                                   
+  while (blkCnt > 0U)                                                              
+  {                                                                                
+    /* Initialize maxVal to the next consecutive values one by one */              
+    maxVal1 = *pSrc++;                                                             
+                                                                                   
+    /* compare for the maximum value */                                            
+    if (out < maxVal1)                                                             
+    {                                                                              
+      /* Update the maximum value */                                               
+      out = maxVal1;                                                               
+    }                                                                              
+                                                                                   
+    /* Decrement the loop counter */                                               
+    blkCnt--;                                                                      
+  }                                                                                
+                                                                                   
+  /* Store the maximum value into destination pointer */                           
+  *pResult = out;
+}
+
+#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q31.c
new file mode 100755
index 00000000..9c7a425c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q31.c
@@ -0,0 +1,142 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_no_idx_q31.c
+ * Description:  Maximum value of a q31 vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a q31 vector without index.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_max_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q31x4_t       vecSrc;
+    q31_t const *pSrcVec;
+    q31x4_t       curExtremValVec = vdupq_n_s32(Q31_MIN);
+    q31_t           maxValue = Q31_MIN;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        p0 = vctp32q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxq_m(curExtremValVec, vecSrc, curExtremValVec, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxvq(maxValue, curExtremValVec);
+    *pResult = maxValue;
+}
+
+#else
+void arm_max_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+  q31_t maxVal1, out;       /* Temporary variables to store the output value. */    
+  uint32_t blkCnt;              /* loop counter */                                  
+                                                                                    
+  /* Load first input value that act as reference value for comparision */          
+  out = *pSrc++;                                                                    
+                                                                                    
+  blkCnt = (blockSize - 1U);                                                        
+                                                                                    
+                                                                                    
+  while (blkCnt > 0U)                                                               
+  {                                                                                 
+    /* Initialize maxVal to the next consecutive values one by one */               
+    maxVal1 = *pSrc++;                                                              
+                                                                                    
+    /* compare for the maximum value */                                             
+    if (out < maxVal1)                                                              
+    {                                                                               
+      /* Update the maximum value */                                                
+      out = maxVal1;                                                                
+    }                                                                               
+                                                                                    
+    /* Decrement the loop counter */                                                
+    blkCnt--;                                                                       
+  }                                                                                 
+                                                                                    
+  /* Store the maximum value into destination pointer */                            
+  *pResult = out;
+}
+
+#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q7.c
new file mode 100755
index 00000000..a6a61b74
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_no_idx_q7.c
@@ -0,0 +1,143 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_no_idx_q7.c
+ * Description:  Maximum value of a q7 vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a q7 vector without index.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_max_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q7x16_t       vecSrc;
+    q7_t const *pSrcVec;
+    q7x16_t       curExtremValVec = vdupq_n_s8(Q7_MIN);
+    q7_t           maxValue = Q7_MIN;
+    mve_pred16_t    p0;
+
+
+    pSrcVec = (q7_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        /*
+         * update per-lane max.
+         */
+        curExtremValVec = vmaxq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        p0 = vctp8q(blkCnt);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+         curExtremValVec = vmaxq_m(curExtremValVec, vecSrc, curExtremValVec, p0);
+    }
+    /*
+     * Get max value across the vector
+     */
+    maxValue = vmaxvq(maxValue, curExtremValVec);
+    *pResult = maxValue;
+}
+
+#else
+
+void arm_max_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+  q7_t maxVal1, out;       /* Temporary variables to store the output value. */     
+  uint32_t blkCnt;              /* loop counter */                                  
+                                                                                    
+  /* Load first input value that act as reference value for comparision */          
+  out = *pSrc++;                                                                    
+                                                                                    
+  blkCnt = (blockSize - 1U);                                                        
+                                                                                    
+                                                                                    
+  while (blkCnt > 0U)                                                               
+  {                                                                                 
+    /* Initialize maxVal to the next consecutive values one by one */               
+    maxVal1 = *pSrc++;                                                              
+                                                                                    
+    /* compare for the maximum value */                                             
+    if (out < maxVal1)                                                              
+    {                                                                               
+      /* Update the maximum value */                                                
+      out = maxVal1;                                                                
+    }                                                                               
+                                                                                    
+    /* Decrement the loop counter */                                                
+    blkCnt--;                                                                       
+  }                                                                                 
+                                                                                    
+  /* Store the maximum value into destination pointer */                            
+  *pResult = out;
+}
+
+#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
index dbead54f..5715e37b 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q15.c
@@ -1,148 +1,201 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_max_q15.c
- * Description:  Maximum value of a Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup Max
-  @{
- */
-
-/**
-  @brief         Maximum value of a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    maximum value returned here
-  @param[out]    pIndex     index of maximum value returned here
-  @return        none
- */
-
-void arm_max_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult,
-        uint32_t * pIndex)
-{
-        q15_t maxVal, out;                             /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = index + 1U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 2U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 3U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**
-  @} end of Max group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_q15.c
+ * Description:  Maximum value of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_max_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t         blkCnt;     /* loop counters */
+    q15x8_t         extremValVec = vdupq_n_s16(Q15_MIN);
+    q15_t           maxValue = Q15_MIN;
+    uint16x8_t      indexVec;
+    uint16x8_t      extremIdxVec;
+    mve_pred16_t    p0;
+    uint16_t        extremIdxArr[8];
+
+    indexVec = vidupq_u16(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp16q(blkCnt);
+        q15x8_t         extremIdxVal = vld1q_z_s16(pSrc, p);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u16(extremIdxArr, indexVec, p0);
+
+        indexVec += 8;
+        pSrc += 8;
+        blkCnt -= 8;
+    }
+    while (blkCnt > 0);
+
+
+    /* Get max value across the vector   */
+    maxValue = vmaxvq(maxValue, extremValVec);
+
+    /* set index for lower values to max possible index   */
+    p0 = vcmpgeq(extremValVec, maxValue);
+    extremIdxVec = vld1q_u16(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u16(blockSize - 1), p0);
+    *pIndex = vminvq(blockSize - 1, indexVec);
+    *pResult = maxValue;
+}
+
+#else
+void arm_max_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+        q15_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
index 5c6badfb..fed900b8 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q31.c
@@ -1,148 +1,202 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_max_q31.c
- * Description:  Maximum value of a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup Max
-  @{
- */
-
-/**
-  @brief         Maximum value of a Q31 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    maximum value returned here
-  @param[out]    pIndex     index of maximum value returned here
-  @return        none
- */
-
-void arm_max_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult,
-        uint32_t * pIndex)
-{
-        q31_t maxVal, out;                             /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = index + 1U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 2U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 3U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**
-  @} end of Max group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_q31.c
+ * Description:  Maximum value of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_max_q31(
+    const q31_t * pSrc,
+    uint32_t blockSize,
+    q31_t * pResult,
+    uint32_t * pIndex)
+{
+    int32_t         blkCnt;     /* loop counters */
+    q31x4_t         extremValVec = vdupq_n_s32(Q31_MIN);
+    q31_t           maxValue = Q31_MIN;
+    uint32x4_t      indexVec;
+    uint32x4_t      extremIdxVec;
+    mve_pred16_t    p0;
+    uint32_t        extremIdxArr[4];
+
+    indexVec = vidupq_u32(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp32q(blkCnt);
+        q31x4_t         extremIdxVal = vld1q_z_s32(pSrc, p);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u32(extremIdxArr, indexVec, p0);
+
+        indexVec += 4;
+        pSrc += 4;
+        blkCnt -= 4;
+    }
+    while (blkCnt > 0);
+
+
+    /* Get max value across the vector   */
+    maxValue = vmaxvq(maxValue, extremValVec);
+
+    /* set index for lower values to max possible index   */
+    p0 = vcmpgeq(extremValVec, maxValue);
+    extremIdxVec = vld1q_u32(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u32(blockSize - 1), p0);
+    *pIndex = vminvq(blockSize - 1, indexVec);
+    *pResult = maxValue;
+}
+
+#else
+void arm_max_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t maxVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
index d4977e5f..5deae648 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_max_q7.c
@@ -1,148 +1,256 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_max_q7.c
- * Description:  Maximum value of a Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup Max
-  @{
- */
-
-/**
-  @brief         Maximum value of a Q7 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    maximum value returned here
-  @param[out]    pIndex     index of maximum value returned here
-  @return        none
- */
-
-void arm_max_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q7_t * pResult,
-        uint32_t * pIndex)
-{
-        q7_t maxVal, out;                              /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = index + 1U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 2U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 3U;
-    }
-
-    maxVal = *pSrc++;
-    if (out < maxVal)
-    {
-      out = maxVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize maxVal to the next consecutive values one by one */
-    maxVal = *pSrc++;
-
-    /* compare for the maximum value */
-    if (out < maxVal)
-    {
-      /* Update the maximum value and it's index */
-      out = maxVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**
-  @} end of Max group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_max_q7.c
+ * Description:  Maximum value of a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Max
+  @{
+ */
+
+/**
+  @brief         Maximum value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    maximum value returned here
+  @param[out]    pIndex     index of maximum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+static void arm_small_blk_max_q7(
+    const q7_t * pSrc,
+    uint16_t blockSize,
+    q7_t * pResult,
+    uint32_t * pIndex)
+{
+    int32_t        blkCnt;     /* loop counters */
+    q7x16_t        extremValVec = vdupq_n_s8(Q7_MIN);
+    q7_t           maxValue = Q7_MIN;
+    uint8x16_t     indexVec;
+    uint8x16_t     extremIdxVec;
+    mve_pred16_t   p0;
+    uint8_t        extremIdxArr[16];
+
+    indexVec = vidupq_u8(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp8q(blkCnt);
+        q7x16_t         extremIdxVal = vld1q_z_s8(pSrc, p);
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpgeq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u8(extremIdxArr, indexVec, p0);
+
+        indexVec += 16;
+        pSrc += 16;
+        blkCnt -= 16;
+    }
+    while (blkCnt > 0);
+
+
+    /* Get max value across the vector   */
+    maxValue = vmaxvq(maxValue, extremValVec);
+
+    /* set index for lower values to max possible index   */
+    p0 = vcmpgeq(extremValVec, maxValue);
+    extremIdxVec = vld1q_u8(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u8(blockSize - 1), p0);
+    *pIndex = vminvq_u8(blockSize - 1, indexVec);
+    *pResult = maxValue;
+}
+
+void arm_max_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t   totalSize = blockSize;
+    const uint16_t sub_blk_sz = UINT8_MAX + 1;
+
+    if (totalSize <= sub_blk_sz)
+    {
+        arm_small_blk_max_q7(pSrc, blockSize, pResult, pIndex);
+    }
+    else
+    {
+        uint32_t  curIdx = 0;
+        q7_t      curBlkExtr = Q7_MIN;
+        uint32_t  curBlkPos = 0;
+        uint32_t  curBlkIdx = 0;
+        /*
+         * process blocks of 255 elts
+         */
+        while (totalSize >= sub_blk_sz)
+        {
+            const q7_t     *curSrc = pSrc;
+
+            arm_small_blk_max_q7(curSrc, sub_blk_sz, pResult, pIndex);
+            if (*pResult > curBlkExtr)
+            {
+                /*
+                 * update partial extrema
+                 */
+                curBlkExtr = *pResult;
+                curBlkPos = *pIndex;
+                curBlkIdx = curIdx;
+            }
+            curIdx++;
+            pSrc += sub_blk_sz;
+            totalSize -= sub_blk_sz;
+        }
+        /*
+         * remainder
+         */
+        arm_small_blk_max_q7(pSrc, totalSize, pResult, pIndex);
+        if (*pResult > curBlkExtr)
+        {
+            curBlkExtr = *pResult;
+            curBlkPos = *pIndex;
+            curBlkIdx = curIdx;
+        }
+        *pIndex = curBlkIdx * sub_blk_sz + curBlkPos;
+        *pResult = curBlkExtr;
+    }
+}
+#else
+void arm_max_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+        q7_t maxVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = index + 1U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 2U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 3U;
+    }
+
+    maxVal = *pSrc++;
+    if (out < maxVal)
+    {
+      out = maxVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize maxVal to the next consecutive values one by one */
+    maxVal = *pSrc++;
+
+    /* compare for the maximum value */
+    if (out < maxVal)
+    {
+      /* Update the maximum value and it's index */
+      out = maxVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Max group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f16.c
new file mode 100755
index 00000000..d296482e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f16.c
@@ -0,0 +1,152 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_f16.c
+ * Description:  Mean value of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup mean Mean
+
+  Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
+  </pre>
+
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    mean value returned here.
+  @return        none
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mean_f16(
+  const float16_t * pSrc,
+  uint32_t blockSize,
+  float16_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    f16x8_t vecSrc;
+    f16x8_t sumVec = vdupq_n_f16(0.0f16);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t p = vctp16q(blkCnt);
+
+        vecSrc = vldrhq_z_f16((float16_t const *) pSrc, p);
+        sumVec = vaddq_m_f16(sumVec, sumVec, vecSrc, p);
+
+        blkCnt -= 8;
+        pSrc += 8;
+    }
+    while (blkCnt > 0);
+
+    *pResult = (_Float16)vecAddAcrossF16Mve(sumVec) / (_Float16) blockSize;
+}
+
+
+#else
+
+void arm_mean_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float16_t sum = 0.0f;                          /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += (_Float16)*pSrc++;
+
+    sum += (_Float16)*pSrc++;
+
+    sum += (_Float16)*pSrc++;
+
+    sum += (_Float16)*pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += (_Float16)*pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = ((_Float16)sum / (_Float16)blockSize);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of mean group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
index 3373f822..dd6d817a 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f32.c
@@ -1,166 +1,198 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mean_f32.c
- * Description:  Mean value of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @defgroup mean Mean
-
-  Calculates the mean of the input vector. Mean is defined as the average of the elements in the vector.
-  The underlying algorithm is used:
-
-  <pre>
-      Result = (pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]) / blockSize;
-  </pre>
-
-  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
- */
-
-/**
-  @addtogroup mean
-  @{
- */
-
-/**
-  @brief         Mean value of a floating-point vector.
-  @param[in]     pSrc       points to the input vector.
-  @param[in]     blockSize  number of samples in input vector.
-  @param[out]    pResult    mean value returned here.
-  @return        none
- */
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_mean_f32(
-  const float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* Temporary result storage */
-  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
-  float32x2_t sumV2;
-
-  uint32_t blkCnt;                               /* Loop counter */
-
-  float32_t in1, in2, in3, in4;
-  float32x4_t inV;
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    inV = vld1q_f32(pSrc);
-    sumV = vaddq_f32(sumV, inV);
-    
-    pSrc += 4;
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
-  sum = sumV2[0] + sumV2[1];
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 3;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store the result to the destination */
-  *pResult = sum / (float32_t) blockSize;
-}
-#else
-void arm_mean_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t sum = 0.0f;                          /* Temporary result storage */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    sum += *pSrc++;
-
-    sum += *pSrc++;
-
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store result to destination */
-  *pResult = (sum / blockSize);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of mean group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_f32.c
+ * Description:  Mean value of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    mean value returned here.
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_mean_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    f32x4_t vecSrc;
+    f32x4_t sumVec = vdupq_n_f32(0.0f);
+    float32_t sum = 0.0f; 
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_f32(pSrc);
+        sumVec = vaddq_f32(sumVec, vecSrc);
+
+        blkCnt --;
+        pSrc += 4;
+    }
+
+    sum = vecAddAcrossF32Mve(sumVec);
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+    while (blkCnt > 0U)
+    {
+      /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+      sum += *pSrc++;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    *pResult = sum / (float32_t) blockSize;
+}
+
+
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_mean_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+  float32_t sum = 0.0f;                          /* Temporary result storage */
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+
+  uint32_t blkCnt;                               /* Loop counter */
+
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    inV = vld1q_f32(pSrc);
+    sumV = vaddq_f32(sumV, inV);
+    
+    pSrc += 4;
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store the result to the destination */
+  *pResult = sum / (float32_t) blockSize;
+}
+#else
+void arm_mean_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (sum / blockSize);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f64.c
new file mode 100644
index 00000000..72e6f351
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_f64.c
+ * Description:  Mean value of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    mean value returned here.
+  @return        none
+ */
+void arm_mean_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float64_t sum = 0.;                            /* Temporary result storage */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (sum / blockSize);
+}
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
index 09e6da95..f8af0eda 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q15.c
@@ -1,114 +1,156 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mean_q15.c
- * Description:  Mean value of a Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup mean
-  @{
- */
-
-/**
-  @brief         Mean value of a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    mean value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   The input is represented in 1.15 format and is accumulated in a 32-bit
-                   accumulator in 17.15 format.
-                   There is no risk of internal overflow with this approach, and the
-                   full precision of intermediate result is preserved.
-                   Finally, the accumulator is truncated to yield a result of 1.15 format.
- */
-
-void arm_mean_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t sum = 0;                                 /* Temporary result storage */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t in;
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    sum += ((in << 16U) >> 16U);
-    sum +=  (in >> 16U);
-
-    in = read_q15x2_ia ((q15_t **) &pSrc);
-    sum += ((in << 16U) >> 16U);
-    sum +=  (in >> 16U);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store result to destination */
-  *pResult = (q15_t) (sum / (int32_t) blockSize);
-}
-
-/**
-  @} end of mean group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_q15.c
+ * Description:  Mean value of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.15 format and is accumulated in a 32-bit
+                   accumulator in 17.15 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.15 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_mean_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t  vecSrc;
+    q31_t     sum = 0L;
+
+    /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrhq_s16(pSrc);
+        /*
+         * sum lanes
+         */
+        sum = vaddvaq(sum, vecSrc);
+
+        blkCnt--;
+        pSrc += 8;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x7;
+
+    while (blkCnt > 0U)
+    {
+       /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+       sum += *pSrc++;
+
+       /* Decrement loop counter */
+       blkCnt--;
+    }
+
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+    /* Store the result to the destination */
+    *pResult = (q15_t) (sum / (int32_t) blockSize);
+}
+#else
+void arm_mean_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    sum += ((in << 16U) >> 16U);
+    sum +=  (in >> 16U);
+
+    in = read_q15x2_ia ((q15_t **) &pSrc);
+    sum += ((in << 16U) >> 16U);
+    sum +=  (in >> 16U);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (q15_t) (sum / (int32_t) blockSize);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
index 7667ad82..b33ed00c 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q31.c
@@ -1,110 +1,149 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mean_q31.c
- * Description:  Mean value of a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup mean
-  @{
- */
-
-/**
-  @brief         Mean value of a Q31 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    mean value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   The input is represented in 1.31 format and is accumulated in a 64-bit
-                   accumulator in 33.31 format.
-                   There is no risk of internal overflow with this approach, and the
-                   full precision of intermediate result is preserved.
-                   Finally, the accumulator is truncated to yield a result of 1.31 format.
- */
-
-void arm_mean_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Temporary result storage */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    sum += *pSrc++;
-
-    sum += *pSrc++;
-
-    sum += *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store result to destination */
-  *pResult = (q31_t) (sum / blockSize);
-}
-
-/**
-  @} end of mean group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_q31.c
+ * Description:  Mean value of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.31 format and is accumulated in a 64-bit
+                   accumulator in 33.31 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.31 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_mean_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecSrc;
+    q63_t     sum = 0LL;
+
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+
+        vecSrc = vldrwq_s32(pSrc);
+        /*
+         * sum lanes
+         */
+        sum = vaddlvaq(sum, vecSrc);
+
+        blkCnt --;
+        pSrc += 4;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 0x3;
+
+    while (blkCnt > 0U)
+    {
+      /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+      sum += *pSrc++;
+      blkCnt --;
+    }
+
+    *pResult = arm_div_q63_to_q31(sum, blockSize);
+}
+#else
+void arm_mean_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    sum += *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (q31_t) (sum / blockSize);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
index 3f90ea8e..8cb68b26 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_mean_q7.c
@@ -1,112 +1,153 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_mean_q7.c
- * Description:  Mean value of a Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup mean
-  @{
- */
-
-/**
-  @brief         Mean value of a Q7 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    mean value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   The input is represented in 1.7 format and is accumulated in a 32-bit
-                   accumulator in 25.7 format.
-                   There is no risk of internal overflow with this approach, and the
-                   full precision of intermediate result is preserved.
-                   Finally, the accumulator is truncated to yield a result of 1.7 format.
- */
-
-void arm_mean_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q7_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t sum = 0;                                 /* Temporary result storage */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t in;
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = read_q7x4_ia ((q7_t **) &pSrc);
-    sum += ((in << 24U) >> 24U);
-    sum += ((in << 16U) >> 24U);
-    sum += ((in <<  8U) >> 24U);
-    sum +=  (in >> 24U);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  /* Store result to destination */
-  *pResult = (q7_t) (sum / (int32_t) blockSize);
-}
-
-/**
-  @} end of mean group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mean_q7.c
+ * Description:  Mean value of a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup mean
+  @{
+ */
+
+/**
+  @brief         Mean value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.7 format and is accumulated in a 32-bit
+                   accumulator in 25.7 format.
+                   There is no risk of internal overflow with this approach, and the
+                   full precision of intermediate result is preserved.
+                   Finally, the accumulator is truncated to yield a result of 1.7 format.
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_mean_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+    q31_t     sum = 0L;
+
+
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrbq_s8(pSrc);
+        /*
+         * sum lanes
+         */
+        sum = vaddvaq(sum, vecSrc);
+
+        blkCnt--;
+        pSrc += 16;
+    }
+
+    blkCnt = blockSize & 0xF;
+    while (blkCnt > 0U)
+    {
+      /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+      sum += *pSrc++;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+    /* Store the result to the destination */
+    *pResult = (q7_t) (sum / (int32_t) blockSize);
+}
+#else
+void arm_mean_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    in = read_q7x4_ia ((q7_t **) &pSrc);
+    sum += ((in << 24U) >> 24U);
+    sum += ((in << 16U) >> 24U);
+    sum += ((in <<  8U) >> 24U);
+    sum +=  (in >> 24U);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+    sum += *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  /* Store result to destination */
+  *pResult = (q7_t) (sum / (int32_t) blockSize);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of mean group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f16.c
new file mode 100755
index 00000000..3ff9db4f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f16.c
@@ -0,0 +1,240 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_f16.c
+ * Description:  Minimum value of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_min_f16(
+  const float16_t * pSrc,
+  uint32_t blockSize,
+  float16_t * pResult,
+  uint32_t * pIndex)
+{
+    int32_t  blkCnt;           /* loop counters */
+    f16x8_t vecSrc;
+    float16_t const *pSrcVec;
+    f16x8_t curExtremValVec = vdupq_n_f16(F16_MAX);
+    float16_t minValue = F16_MAX;
+    uint32_t  idx = blockSize;
+    uint16x8_t indexVec;
+    uint16x8_t curExtremIdxVec;
+    mve_pred16_t p0;
+
+    indexVec = vidupq_u16((uint32_t)0, 1);
+    curExtremIdxVec = vdupq_n_u16(0);
+
+    pSrcVec = (float16_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrhq_f16(pSrcVec);  pSrcVec += 8;
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = indexVec + 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0)
+    {
+        vecSrc = vldrhq_f16(pSrcVec);  pSrcVec += 8;
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq_m(vecSrc, curExtremValVec, p0);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to min possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u16(blockSize), p0);
+    /*
+     * Get min index which is thus for a min value
+     */
+    idx = vminvq(idx, indexVec);
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+#else
+
+void arm_min_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult,
+        uint32_t * pIndex)
+{
+        float16_t minVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if ((_Float16)out > (_Float16)minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if ((_Float16)out > (_Float16)minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if ((_Float16)out > (_Float16)minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if ((_Float16)out > (_Float16)minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if ((_Float16)out > (_Float16)minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Min group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
index f6504aaf..ad8a4720 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f32.c
@@ -1,268 +1,363 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_min_f32.c
- * Description:  Minimum value of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include <limits.h>
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @defgroup Min Minimum
-
-  Computes the minimum value of an array of data.
-  The function returns both the minimum value and its position within the array.
-  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
- */
-
-/**
-  @addtogroup Min
-  @{
- */
-
-/**
-  @brief         Minimum value of a floating-point vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    minimum value returned here
-  @param[out]    pIndex     index of minimum value returned here
-  @return        none
- */
-#if defined(ARM_MATH_NEON)
-void arm_min_f32(
-  const float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult,
-  uint32_t * pIndex)
-{
-  float32_t maxVal1, maxVal2, out;               /* Temporary variables to store the output value. */
-  uint32_t blkCnt, outIndex, count;              /* loop counter */
-
-  float32x4_t outV, srcV;
-  float32x2_t outV2;
-
-  uint32x4_t idxV;
-  uint32x4_t maxIdx={ULONG_MAX,ULONG_MAX,ULONG_MAX,ULONG_MAX};
-  uint32x4_t index={4,5,6,7};
-  uint32x4_t delta={4,4,4,4};
-  uint32x4_t countV={0,1,2,3};
-  uint32x2_t countV2;
-
-  /* Initialise the count value. */
-  count = 0U;
-
-  /* Initialise the index value to zero. */
-  outIndex = 0U;
-
-  /* Load first input value that act as reference value for comparison */
-  if (blockSize <= 3)
-  {
-      out = *pSrc++;
-
-      blkCnt = blockSize - 1;
-
-      while (blkCnt > 0U)
-      {
-        /* Initialize maxVal to the next consecutive values one by one */
-        maxVal1 = *pSrc++;
-    
-        /* compare for the maximum value */
-        if (out > maxVal1)
-        {
-          /* Update the maximum value and it's index */
-          out = maxVal1;
-          outIndex = blockSize - blkCnt;
-        }
-    
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-  }
-  else
-  {
-      outV = vld1q_f32(pSrc);
-      pSrc += 4;
-    
-      /* Compute 4 outputs at a time */
-      blkCnt = (blockSize - 4 ) >> 2U;
-    
-      while (blkCnt > 0U)
-      {
-        srcV = vld1q_f32(pSrc);
-        pSrc += 4;
-    
-        idxV = vcltq_f32(srcV, outV);
-        outV = vbslq_f32(idxV, srcV, outV );
-        countV = vbslq_u32(idxV, index,countV );
-    
-        index = vaddq_u32(index,delta);
-    
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-    
-      outV2 = vpmin_f32(vget_low_f32(outV),vget_high_f32(outV));
-      outV2 = vpmin_f32(outV2,outV2);
-      out = outV2[0];
-    
-      idxV = vceqq_f32(outV, vdupq_n_f32(out));
-      countV = vbslq_u32(idxV, countV,maxIdx);
-      
-      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
-      countV2 = vpmin_u32(countV2,countV2);
-      outIndex = countV2[0];
-    
-      /* if (blockSize - 1U) is not multiple of 4 */
-      blkCnt = (blockSize - 4 ) % 4U;
-    
-      while (blkCnt > 0U)
-      {
-        /* Initialize maxVal to the next consecutive values one by one */
-        maxVal1 = *pSrc++;
-    
-        /* compare for the maximum value */
-        if (out > maxVal1)
-        {
-          /* Update the maximum value and it's index */
-          out = maxVal1;
-          outIndex = blockSize - blkCnt ;
-        }
-    
-        /* Decrement the loop counter */
-        blkCnt--;
-      }
-  }
-
-  /* Store the maximum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-#else
-void arm_min_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult,
-        uint32_t * pIndex)
-{
-        float32_t minVal, out;                         /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = index + 1U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 2U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 3U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the minimum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of Min group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_f32.c
+ * Description:  Minimum value of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup Min Minimum
+
+  Computes the minimum value of an array of data.
+  The function returns both the minimum value and its position within the array.
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_min_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    f32x4_t vecSrc;
+    float32_t const *pSrcVec;
+    f32x4_t curExtremValVec = vdupq_n_f32(F32_MAX);
+    float32_t minValue = F32_MAX;
+    uint32_t  idx = blockSize;
+    uint32x4_t indexVec;
+    uint32x4_t curExtremIdxVec;
+    float32_t tmp;
+    mve_pred16_t p0;
+
+    indexVec = vidupq_u32((uint32_t)0, 1);
+    curExtremIdxVec = vdupq_n_u32(0);
+
+    pSrcVec = (float32_t const *) pSrc;
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_f32(pSrcVec);  
+        pSrcVec += 4;
+        /*
+         * Get current max per lane and current index per lane
+         * when a max is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = indexVec +  4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to max possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u32(blockSize), p0);
+    /*
+     * Get min index which is thus for a max value
+     */
+    idx = vminvq(idx, indexVec);
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0x3;
+
+    while (blkCnt > 0U)
+    {
+      /* Initialize minVal to the next consecutive values one by one */
+      tmp = *pSrc++;
+  
+      /* compare for the minimum value */
+      if (minValue > tmp)
+      {
+        /* Update the minimum value and it's index */
+        minValue = tmp;
+        idx = blockSize - blkCnt;
+      }
+      blkCnt--;
+    }
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_min_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult,
+  uint32_t * pIndex)
+{
+  float32_t maxVal1, out;               /* Temporary variables to store the output value. */
+  uint32_t blkCnt, outIndex;              /* loop counter */
+
+  float32x4_t outV, srcV;
+  float32x2_t outV2;
+
+  uint32x4_t idxV;
+  static const uint32_t indexInit[4]={4,5,6,7};
+  static const uint32_t countVInit[4]={0,1,2,3};
+  uint32x4_t maxIdx;
+  uint32x4_t index;
+  uint32x4_t delta;
+  uint32x4_t countV;
+  uint32x2_t countV2;
+
+  maxIdx = vdupq_n_u32(ULONG_MAX);
+  delta = vdupq_n_u32(4);
+  index = vld1q_u32(indexInit);
+  countV = vld1q_u32(countVInit);
+
+  /* Initialise the index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparison */
+  if (blockSize <= 3)
+  {
+      out = *pSrc++;
+
+      blkCnt = blockSize - 1;
+
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out > maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+  else
+  {
+      outV = vld1q_f32(pSrc);
+      pSrc += 4;
+    
+      /* Compute 4 outputs at a time */
+      blkCnt = (blockSize - 4 ) >> 2U;
+    
+      while (blkCnt > 0U)
+      {
+        srcV = vld1q_f32(pSrc);
+        pSrc += 4;
+    
+        idxV = vcltq_f32(srcV, outV);
+        outV = vbslq_f32(idxV, srcV, outV );
+        countV = vbslq_u32(idxV, index,countV );
+    
+        index = vaddq_u32(index,delta);
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+    
+      outV2 = vpmin_f32(vget_low_f32(outV),vget_high_f32(outV));
+      outV2 = vpmin_f32(outV2,outV2);
+      out = vget_lane_f32(outV2,0); 
+    
+      idxV = vceqq_f32(outV, vdupq_n_f32(out));
+      countV = vbslq_u32(idxV, countV,maxIdx);
+      
+      countV2 = vpmin_u32(vget_low_u32(countV),vget_high_u32(countV));
+      countV2 = vpmin_u32(countV2,countV2);
+      outIndex = vget_lane_u32(countV2,0); 
+    
+      /* if (blockSize - 1U) is not multiple of 4 */
+      blkCnt = (blockSize - 4 ) % 4U;
+    
+      while (blkCnt > 0U)
+      {
+        /* Initialize maxVal to the next consecutive values one by one */
+        maxVal1 = *pSrc++;
+    
+        /* compare for the maximum value */
+        if (out > maxVal1)
+        {
+          /* Update the maximum value and it's index */
+          out = maxVal1;
+          outIndex = blockSize - blkCnt ;
+        }
+    
+        /* Decrement the loop counter */
+        blkCnt--;
+      }
+  }
+
+  /* Store the maximum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#else
+void arm_min_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult,
+        uint32_t * pIndex)
+{
+        float32_t minVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f64.c
new file mode 100644
index 00000000..ef25f920
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_f64.c
@@ -0,0 +1,90 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_f64.c
+ * Description:  Minimum value of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+void arm_min_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult,
+        uint32_t * pIndex)
+{
+        float64_t minVal, out;                         /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f16.c
new file mode 100755
index 00000000..5b4c0d66
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f16.c
@@ -0,0 +1,144 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_no_idx_f16.c
+ * Description:  Minimum value of a floating-point vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_min_no_idx_f16(
+    const float16_t *pSrc,
+    uint32_t   blockSize,
+    float16_t *pResult)
+{
+   f16x8_t     vecSrc;
+   f16x8_t     curExtremValVec = vdupq_n_f16(F16_MAX);
+   float16_t   minValue = F16_MAX;
+   float16_t   newVal;
+   uint32_t    blkCnt;
+
+   /* Loop unrolling: Compute 4 outputs at a time */
+   blkCnt = blockSize >> 3U;
+
+   while (blkCnt > 0U)
+   {
+
+        vecSrc = vldrhq_f16(pSrc);
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminnmq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 8;
+        blkCnt --;
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmvq(minValue, curExtremValVec);
+
+    blkCnt = blockSize & 7;
+
+    while (blkCnt > 0U)
+    {
+        newVal = *pSrc++;
+
+        /* compare for the minimum value */
+        if ((_Float16)minValue > (_Float16)newVal)
+        {
+            /* Update the minimum value and it's index */
+            minValue = newVal;
+        }
+
+        blkCnt --;
+    }
+
+    *pResult = minValue;
+}
+
+#else
+
+void arm_min_no_idx_f16(
+    const float16_t *pSrc,
+    uint32_t   blockSize,
+    float16_t *pResult)
+{
+   float16_t   minValue = F16_MAX;
+   float16_t   newVal;
+
+   while (blockSize > 0U)
+   {
+       newVal = *pSrc++;
+   
+       /* compare for the minimum value */
+       if ((_Float16)minValue > (_Float16)newVal)
+       {
+           /* Update the minimum value and it's index */
+           minValue = newVal;
+       }
+   
+       blockSize --;
+   }
+    
+   *pResult = minValue;
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Min group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f32.c
new file mode 100755
index 00000000..ea7c137d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f32.c
@@ -0,0 +1,138 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_no_idx_f32.c
+ * Description:  Minimum value of a floating-point vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+#if (defined(ARM_MATH_NEON) || defined(ARM_MATH_MVEF)) && !defined(ARM_MATH_AUTOVECTORIZE)
+#include <limits.h>
+#endif
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_min_no_idx_f32(
+    const float32_t *pSrc,
+    uint32_t   blockSize,
+    float32_t *pResult)
+{
+   f32x4_t     vecSrc;
+   f32x4_t     curExtremValVec = vdupq_n_f32(F32_MAX);
+   float32_t   minValue = F32_MAX;
+   float32_t   newVal;
+   uint32_t    blkCnt;
+
+   /* Loop unrolling: Compute 4 outputs at a time */
+   blkCnt = blockSize >> 2U;
+
+   while (blkCnt > 0U)
+   {
+
+        vecSrc = vldrwq_f32(pSrc);
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminnmq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 4;
+        blkCnt --;
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminnmvq(minValue, curExtremValVec);
+
+    blkCnt = blockSize & 3;
+
+    while (blkCnt > 0U)
+    {
+        newVal = *pSrc++;
+
+        /* compare for the minimum value */
+        if (minValue > newVal)
+        {
+            /* Update the minimum value and it's index */
+            minValue = newVal;
+        }
+
+        blkCnt --;
+    }
+
+    *pResult = minValue;
+}
+
+#else
+
+void arm_min_no_idx_f32(
+    const float32_t *pSrc,
+    uint32_t   blockSize,
+    float32_t *pResult)
+{
+   float32_t   minValue = F32_MAX;
+   float32_t   newVal;
+
+   while (blockSize > 0U)
+   {
+       newVal = *pSrc++;
+   
+       /* compare for the minimum value */
+       if (minValue > newVal)
+       {
+           /* Update the minimum value and it's index */
+           minValue = newVal;
+       }
+   
+       blockSize --;
+   }
+    
+   *pResult = minValue;
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f64.c
new file mode 100755
index 00000000..6e69572d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_f64.c
@@ -0,0 +1,75 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_no_idx_f64.c
+ * Description:  Maximum value of a floating-point vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Maximum value of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+void arm_min_no_idx_f64(
+    const float64_t *pSrc,
+    uint32_t   blockSize,
+    float64_t *pResult)
+{
+   float64_t   minValue = F64_MAX;
+   float64_t   newVal;
+
+   while (blockSize > 0U)
+   {
+       newVal = *pSrc++;
+   
+       /* compare for the minimum value */
+       if (minValue > newVal)
+       {
+           /* Update the minimum value and it's index */
+           minValue = newVal;
+       }
+   
+       blockSize --;
+   }
+    
+   *pResult = minValue;
+}
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q15.c
new file mode 100755
index 00000000..207f9ea9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q15.c
@@ -0,0 +1,142 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_no_idx_q15.c
+ * Description:  Minimum value of a q15 vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a q15 vector without index.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_min_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q15x8_t vecSrc;
+    q15_t const *pSrcVec;
+    q15x8_t curExtremValVec = vdupq_n_s16(Q15_MAX);
+    q15_t minValue = Q15_MAX;
+    mve_pred16_t p0;
+
+
+    pSrcVec = (q15_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 8;
+        p0 = vctp16q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminq_m(curExtremValVec, vecSrc, curExtremValVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminvq(minValue, curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+void arm_min_no_idx_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+  q15_t minVal1, out;       /* Temporary variables to store the output value. */    
+  uint32_t blkCnt;              /* loop counter */                                  
+                                                                                    
+  /* Load first input value that act as reference value for comparision */          
+  out = *pSrc++;                                                                    
+                                                                                    
+  blkCnt = (blockSize - 1U);                                                        
+                                                                                    
+                                                                                    
+  while (blkCnt > 0U)                                                               
+  {                                                                                 
+    /* Initialize minVal to the next consecutive values one by one */               
+    minVal1 = *pSrc++;                                                              
+                                                                                    
+    /* compare for the minimum value */                                             
+    if (out > minVal1)                                                              
+    {                                                                               
+      /* Update the minimum value */                                                
+      out = minVal1;                                                                
+    }                                                                               
+                                                                                    
+    /* Decrement the loop counter */                                                
+    blkCnt--;                                                                       
+  }                                                                                 
+                                                                                    
+  /* Store the minimum value into destination pointer */                            
+  *pResult = out;
+}
+
+#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q31.c
new file mode 100755
index 00000000..e425db4f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q31.c
@@ -0,0 +1,141 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_no_idx_q31.c
+ * Description:  Minimum value of a q31 vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a q31 vector without index.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+void arm_min_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q31x4_t vecSrc;
+    q31_t const *pSrcVec;
+    q31x4_t curExtremValVec = vdupq_n_s32(Q31_MAX);
+    q31_t minValue = Q31_MAX;
+    mve_pred16_t p0;
+
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    if (blkCnt > 0)
+    {
+        vecSrc = vldrwq_s32(pSrcVec);  
+        pSrcVec += 4;
+        p0 = vctp32q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminq_m(curExtremValVec, vecSrc, curExtremValVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminvq(minValue, curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+void arm_min_no_idx_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+  q31_t minVal1, out;       /* Temporary variables to store the output value. */    
+  uint32_t blkCnt;              /* loop counter */                                  
+                                                                                    
+  /* Load first input value that act as reference value for comparision */          
+  out = *pSrc++;                                                                    
+                                                                                    
+  blkCnt = (blockSize - 1U);                                                        
+                                                                                    
+                                                                                    
+  while (blkCnt > 0U)                                                               
+  {                                                                                 
+    /* Initialize minVal to the next consecutive values one by one */               
+    minVal1 = *pSrc++;                                                              
+                                                                                    
+    /* compare for the minimum value */                                             
+    if (out > minVal1)                                                              
+    {                                                                               
+      /* Update the minimum value */                                                
+      out = minVal1;                                                                
+    }                                                                               
+                                                                                    
+    /* Decrement the loop counter */                                                
+    blkCnt--;                                                                       
+  }                                                                                 
+                                                                                    
+  /* Store the minimum value into destination pointer */                            
+  *pResult = out;
+}
+
+#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q7.c
new file mode 100755
index 00000000..2ee9a994
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_no_idx_q7.c
@@ -0,0 +1,141 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_no_idx_q7.c
+ * Description:  Minimum value of a q7 vector without returning the index
+ *
+ * $Date:        16 November 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a q7 vector without index.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_min_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+    q7_t const *pSrcVec;
+    q7x16_t curExtremValVec = vdupq_n_s8(Q7_MAX);
+    q7_t minValue = Q7_MAX;
+    mve_pred16_t p0;
+
+
+    pSrcVec = (q7_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        /*
+         * update per-lane min.
+         */
+        curExtremValVec = vminq(vecSrc, curExtremValVec);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 0xF;
+    if (blkCnt > 0)
+    {
+        vecSrc = vld1q(pSrcVec); 
+        pSrcVec += 16;
+        p0 = vctp8q(blkCnt);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+         curExtremValVec = vminq_m(curExtremValVec, vecSrc, curExtremValVec, p0);
+    }
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminvq(minValue, curExtremValVec);
+    *pResult = minValue;
+}
+
+#else
+void arm_min_no_idx_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult)
+{
+  q7_t minVal1, out;       /* Temporary variables to store the output value. */    
+  uint32_t blkCnt;              /* loop counter */                                  
+                                                                                    
+  /* Load first input value that act as reference value for comparision */          
+  out = *pSrc++;                                                                    
+                                                                                    
+  blkCnt = (blockSize - 1U);                                                        
+                                                                                    
+                                                                                    
+  while (blkCnt > 0U)                                                               
+  {                                                                                 
+    /* Initialize minVal to the next consecutive values one by one */               
+    minVal1 = *pSrc++;                                                              
+                                                                                    
+    /* compare for the minimum value */                                             
+    if (out > minVal1)                                                              
+    {                                                                               
+      /* Update the minimum value */                                                
+      out = minVal1;                                                                
+    }                                                                               
+                                                                                    
+    /* Decrement the loop counter */                                                
+    blkCnt--;                                                                       
+  }                                                                                 
+                                                                                    
+  /* Store the minimum value into destination pointer */                            
+  *pResult = out;
+}
+
+#endif /* #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE) */
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
index 67fd49e9..f31019db 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q15.c
@@ -1,149 +1,203 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_min_q15.c
- * Description:  Minimum value of a Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-
-/**
-  @addtogroup Min
-  @{
- */
-
-/**
-  @brief         Minimum value of a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    minimum value returned here
-  @param[out]    pIndex     index of minimum value returned here
-  @return        none
- */
-
-void arm_min_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult,
-        uint32_t * pIndex)
-{
-        q15_t minVal, out;                             /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = index + 1U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 2U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 3U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the minimum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**
-  @} end of Min group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_q15.c
+ * Description:  Minimum value of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_min_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+
+    int32_t         blkCnt;     /* loop counters */
+    q15x8_t         extremValVec = vdupq_n_s16(Q15_MAX);
+    q15_t           minValue = Q15_MAX;
+    uint16x8_t      indexVec;
+    uint16x8_t      extremIdxVec;
+    mve_pred16_t    p0;
+    uint16_t        extremIdxArr[8];
+
+    indexVec = vidupq_u16(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp16q(blkCnt);
+        q15x8_t         extremIdxVal = vld1q_z_s16(pSrc, p);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u16(extremIdxArr, indexVec, p0);
+
+        indexVec += 8;
+        pSrc += 8;
+        blkCnt -= 8;
+    }
+    while (blkCnt > 0);
+
+    /* Get min value across the vector   */
+    minValue = vminvq(minValue, extremValVec);
+
+    /* set index for lower values to min possible index   */
+    p0 = vcmpleq(extremValVec, minValue);
+    extremIdxVec = vld1q_u16(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u16(blockSize - 1), p0);
+    *pIndex = vminvq(blockSize - 1, indexVec);
+    *pResult = minValue;
+ 
+}
+#else
+void arm_min_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult,
+        uint32_t * pIndex)
+{
+        q15_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
index c3621734..c993004c 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q31.c
@@ -1,149 +1,203 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_min_q31.c
- * Description:  Minimum value of a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-
-/**
-  @addtogroup Min
-  @{
- */
-
-/**
-  @brief         Minimum value of a Q31 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    minimum value returned here
-  @param[out]    pIndex     index of minimum value returned here
-  @return        none
- */
-
-void arm_min_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult,
-        uint32_t * pIndex)
-{
-        q31_t minVal, out;                             /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = index + 1U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 2U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 3U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the minimum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**
-  @} end of Min group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_q31.c
+ * Description:  Minimum value of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_min_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t         blkCnt;     /* loop counters */
+    q31x4_t         extremValVec = vdupq_n_s32(Q31_MAX);
+    q31_t           minValue = Q31_MAX;
+    uint32x4_t      indexVec;
+    uint32x4_t      extremIdxVec;
+    mve_pred16_t    p0;
+    uint32_t        extremIdxArr[4];
+
+    indexVec = vidupq_u32(0U, 1);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp32q(blkCnt);
+        q31x4_t         extremIdxVal = vld1q_z_s32(pSrc, p);
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq_m(extremIdxVal, extremValVec, p);
+
+        extremValVec = vorrq_m(extremValVec, extremIdxVal, extremIdxVal, p0);
+        /* store per-lane extrema indexes */
+        vst1q_p_u32(extremIdxArr, indexVec, p0);
+
+        indexVec += 4;
+        pSrc += 4;
+        blkCnt -= 4;
+    }
+    while (blkCnt > 0);
+
+
+    /* Get min value across the vector   */
+    minValue = vminvq(minValue, extremValVec);
+
+    /* set index for lower values to min possible index   */
+    p0 = vcmpleq(extremValVec, minValue);
+    extremIdxVec = vld1q_u32(extremIdxArr);
+
+    indexVec = vpselq(extremIdxVec, vdupq_n_u32(blockSize - 1), p0);
+    *pIndex = vminvq(blockSize - 1, indexVec);
+    *pResult = minValue;
+}
+
+#else
+void arm_min_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult,
+        uint32_t * pIndex)
+{
+        q31_t minVal, out;                             /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
index 43296301..3e5aae53 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_min_q7.c
@@ -1,149 +1,284 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_min_q7.c
- * Description:  Minimum value of a Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-
-/**
-  @addtogroup Min
-  @{
- */
-
-/**
-  @brief         Minimum value of a Q7 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    minimum value returned here
-  @param[out]    pIndex     index of minimum value returned here
-  @return        none
- */
-
-void arm_min_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q7_t * pResult,
-        uint32_t * pIndex)
-{
-        q7_t minVal, out;                              /* Temporary variables to store the output value. */
-        uint32_t blkCnt, outIndex;                     /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        uint32_t index;                                /* index of maximum value */
-#endif
-
-  /* Initialise index value to zero. */
-  outIndex = 0U;
-  /* Load first input value that act as reference value for comparision */
-  out = *pSrc++;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  /* Initialise index of maximum value. */
-  index = 0U;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = (blockSize - 1U) >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = index + 1U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 2U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 3U;
-    }
-
-    minVal = *pSrc++;
-    if (out > minVal)
-    {
-      out = minVal;
-      outIndex = index + 4U;
-    }
-
-    index += 4U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = (blockSize - 1U) % 4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = (blockSize - 1U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* Initialize minVal to the next consecutive values one by one */
-    minVal = *pSrc++;
-
-    /* compare for the minimum value */
-    if (out > minVal)
-    {
-      /* Update the minimum value and it's index */
-      out = minVal;
-      outIndex = blockSize - blkCnt;
-    }
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store the minimum value and it's index into destination pointers */
-  *pResult = out;
-  *pIndex = outIndex;
-}
-
-/**
-  @} end of Min group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_min_q7.c
+ * Description:  Minimum value of a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup Min
+  @{
+ */
+
+/**
+  @brief         Minimum value of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    minimum value returned here
+  @param[out]    pIndex     index of minimum value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+static void arm_small_blk_min_q7(
+    const q7_t * pSrc,
+    uint8_t blockSize,
+    q7_t * pResult,
+    uint32_t * pIndex)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t        vecSrc;
+    q7x16_t        curExtremValVec = vdupq_n_s8(Q7_MAX);
+    q7_t            minValue = Q7_MAX,temp;
+    uint32_t        idx = blockSize;
+    uint8x16_t      indexVec;
+    uint8x16_t      curExtremIdxVec;
+    mve_pred16_t    p0;
+
+
+    indexVec = vidupq_u8((uint32_t)0, 1);
+    curExtremIdxVec = vdupq_n_u8(0);
+
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrbq_s8(pSrc);  
+        pSrc += 16;
+        /*
+         * Get current min per lane and current index per lane
+         * when a min is selected
+         */
+        p0 = vcmpleq(vecSrc, curExtremValVec);
+        curExtremValVec = vpselq(vecSrc, curExtremValVec, p0);
+        curExtremIdxVec = vpselq(indexVec, curExtremIdxVec, p0);
+
+        indexVec = indexVec +  16;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    
+    /*
+     * Get min value across the vector
+     */
+    minValue = vminvq(minValue, curExtremValVec);
+    /*
+     * set index for lower values to min possible index
+     */
+    p0 = vcmpleq(curExtremValVec, minValue);
+    indexVec = vpselq(curExtremIdxVec, vdupq_n_u8(blockSize), p0);
+    /*
+     * Get min index which is thus for a min value
+     */
+    idx = vminvq(idx, indexVec);
+
+    blkCnt = blockSize & 0xF;
+    while (blkCnt > 0U)
+    {
+      /* Initialize minVal to the next consecutive values one by one */
+      temp = *pSrc++;
+  
+      /* compare for the minimum value */
+      if (minValue > temp)
+      {
+        /* Update the minimum value and it's index */
+        minValue = temp;
+        idx = blockSize - blkCnt;
+      }
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+    /*
+     * Save result
+     */
+    *pIndex = idx;
+    *pResult = minValue;
+}
+
+void arm_min_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+    int32_t   totalSize = blockSize;
+
+    if (totalSize <= UINT8_MAX)
+    {
+        arm_small_blk_min_q7(pSrc, blockSize, pResult, pIndex);
+    }
+    else
+    {
+        uint32_t  curIdx = 0;
+        q7_t      curBlkExtr = Q7_MAX;
+        uint32_t  curBlkPos = 0;
+        uint32_t  curBlkIdx = 0;
+        /*
+         * process blocks of 255 elts
+         */
+        while (totalSize >= UINT8_MAX)
+        {
+            const q7_t     *curSrc = pSrc;
+
+            arm_small_blk_min_q7(curSrc, UINT8_MAX, pResult, pIndex);
+            if (*pResult < curBlkExtr)
+            {
+                /*
+                 * update partial extrema
+                 */
+                curBlkExtr = *pResult;
+                curBlkPos = *pIndex;
+                curBlkIdx = curIdx;
+            }
+            curIdx++;
+            pSrc += UINT8_MAX;
+            totalSize -= UINT8_MAX;
+        }
+        /*
+         * remainder
+         */
+        arm_small_blk_min_q7(pSrc, totalSize, pResult, pIndex);
+        if (*pResult < curBlkExtr)
+        {
+            curBlkExtr = *pResult;
+            curBlkPos = *pIndex;
+            curBlkIdx = curIdx;
+        }
+        *pIndex = curBlkIdx * UINT8_MAX + curBlkPos;
+        *pResult = curBlkExtr;
+    }
+}
+#else
+void arm_min_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q7_t * pResult,
+        uint32_t * pIndex)
+{
+        q7_t minVal, out;                              /* Temporary variables to store the output value. */
+        uint32_t blkCnt, outIndex;                     /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        uint32_t index;                                /* index of maximum value */
+#endif
+
+  /* Initialise index value to zero. */
+  outIndex = 0U;
+  /* Load first input value that act as reference value for comparision */
+  out = *pSrc++;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  /* Initialise index of maximum value. */
+  index = 0U;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = (blockSize - 1U) >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = index + 1U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 2U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 3U;
+    }
+
+    minVal = *pSrc++;
+    if (out > minVal)
+    {
+      out = minVal;
+      outIndex = index + 4U;
+    }
+
+    index += 4U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = (blockSize - 1U) % 4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = (blockSize - 1U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* Initialize minVal to the next consecutive values one by one */
+    minVal = *pSrc++;
+
+    /* compare for the minimum value */
+    if (out > minVal)
+    {
+      /* Update the minimum value and it's index */
+      out = minVal;
+      outIndex = blockSize - blkCnt;
+    }
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store the minimum value and it's index into destination pointers */
+  *pResult = out;
+  *pIndex = outIndex;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Min group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f16.c
new file mode 100755
index 00000000..fd135ebf
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f16.c
@@ -0,0 +1,152 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_f16.c
+ * Description:  Sum of the squares of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupStats
+ */
+
+
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_power_f16(
+  const float16_t * pSrc,
+  uint32_t blockSize,
+  float16_t * pResult)
+{
+    int32_t         blkCnt;     /* loop counters */
+    f16x8_t         vecSrc;
+    f16x8_t         sumVec = vdupq_n_f16(0.0f);
+
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp16q(blkCnt);
+
+        vecSrc = vldrhq_z_f16((float16_t const *) pSrc, p);
+        /*
+         * sum lanes
+         */
+        sumVec = vfmaq_m(sumVec, vecSrc, vecSrc, p);
+
+        blkCnt -= 8;
+        pSrc += 8;
+    }
+    while (blkCnt > 0);
+
+    *pResult = vecAddAcrossF16Mve(sumVec);
+}
+#else
+
+void arm_power_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        _Float16 sum = 0.0f16;                          /* Temporary result storage */
+        _Float16 in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result to destination */
+  *pResult = sum;
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of power group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
index abf444b1..ce12e57e 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f32.c
@@ -1,175 +1,229 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_power_f32.c
- * Description:  Sum of the squares of the elements of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @defgroup power Power
-
-  Calculates the sum of the squares of the elements in the input vector.
-  The underlying algorithm is used:
-
-  <pre>
-      Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
-  </pre>
-
-  There are separate functions for floating point, Q31, Q15, and Q7 data types.
- */
-
-/**
-  @addtogroup power
-  @{
- */
-
-/**
-  @brief         Sum of the squares of the elements of a floating-point vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    sum of the squares value returned here
-  @return        none
- */
-#if defined(ARM_MATH_NEON)
-void arm_power_f32(
-  const float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* accumulator */
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
-  float32x2_t sumV2;
-  float32x4_t inV;
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    inV = vld1q_f32(pSrc);
-    sumV = vmlaq_f32(sumV, inV, inV);
-    pSrc += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
-  sum = sumV2[0] + sumV2[1];
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* compute power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Store the result to the destination */
-  *pResult = sum;
-}
-#else
-void arm_power_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t sum = 0.0f;                          /* Temporary result storage */
-        float32_t in;                                  /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power and store result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-
-    in = *pSrc++;
-    sum += in * in;
-
-    in = *pSrc++;
-    sum += in * in;
-
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power and store result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store result to destination */
-  *pResult = sum;
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of power group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_f32.c
+ * Description:  Sum of the squares of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup power Power
+
+  Calculates the sum of the squares of the elements in the input vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + pSrc[2] * pSrc[2] + ... + pSrc[blockSize-1] * pSrc[blockSize-1];
+  </pre>
+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
+
+  Since the result is not divided by the length, those functions are in fact computing
+  something which is more an energy than a power.
+
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_power_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+    uint32_t        blkCnt;     /* loop counters */
+    f32x4_t         vecSrc;
+    f32x4_t         sumVec = vdupq_n_f32(0.0f);
+    float32_t       sum = 0.0f;
+    float32_t in;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_f32(pSrc);
+        /*
+         * sum lanes
+         */
+        sumVec = vfmaq(sumVec, vecSrc, vecSrc);
+
+        blkCnt --;
+        pSrc += 4;
+    }
+    sum = vecAddAcrossF32Mve(sumVec);
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0x3;
+    while (blkCnt > 0U)
+    {
+      /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+  
+      /* Compute Power and store result in a temporary variable, sum. */
+      in = *pSrc++;
+      sum += in * in;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    *pResult = sum;
+}
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_power_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* compute power and then store the result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Store the result to the destination */
+  *pResult = sum;
+}
+#else
+void arm_power_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result to destination */
+  *pResult = sum;
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f64.c
new file mode 100644
index 00000000..057e9f7c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_f64.c
@@ -0,0 +1,77 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_f64.c
+ * Description:  Sum of the squares of the elements of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+ */
+void arm_power_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float64_t sum = 0.;                          /* Temporary result storage */
+        float64_t in;                                  /* Temporary variable to store input value */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result to destination */
+  *pResult = sum;
+}
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
index 62e567f3..37a02c06 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q15.c
@@ -1,132 +1,177 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_power_q15.c
- * Description:  Sum of the squares of the elements of a Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup power
-  @{
- */
-
-/**
-  @brief         Sum of the squares of the elements of a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    sum of the squares value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   The input is represented in 1.15 format.
-                   Intermediate multiplication yields a 2.30 format, and this
-                   result is added without saturation to a 64-bit accumulator in 34.30 format.
-                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
-                   full precision of the intermediate multiplication is preserved.
-                   Finally, the return result is in 34.30 format.
- */
-
-void arm_power_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q63_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Temporary result storage */
-        q15_t in;                                      /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in32;                                    /* Temporary variable to store packed input value */
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power and store result in a temporary variable, sum. */
-#if defined (ARM_MATH_DSP)
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sum = __SMLALD(in32, in32, sum);
-
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sum = __SMLALD(in32, in32, sum);
-#else
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power and store result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store result in 34.30 format */
-  *pResult = sum;
-}
-
-/**
-  @} end of power group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_q15.c
+ * Description:  Sum of the squares of the elements of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 34.30 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_power_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecSrc;
+    q63_t     sum = 0LL;
+    q15_t in;
+
+   /* Compute 8 outputs at a time */
+    blkCnt = blockSize >> 3U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrhq_s16(pSrc);
+        /*
+         * sum lanes
+         */
+        sum = vmlaldavaq(sum, vecSrc, vecSrc);
+
+        blkCnt --;
+        pSrc += 8;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0x7;
+    while (blkCnt > 0U)
+    {
+      /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+  
+      /* Compute Power and store result in a temporary variable, sum. */
+      in = *pSrc++;
+      sum += ((q31_t) in * in);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    *pResult = sum;
+}
+#else
+void arm_power_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store packed input value */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+#else
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in 34.30 format */
+  *pResult = sum;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
index aa51d0fe..a39b3a70 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q31.c
@@ -1,121 +1,165 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_power_q31.c
- * Description:  Sum of the squares of the elements of a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup power
-  @{
- */
-
-/**
-  @brief         Sum of the squares of the elements of a Q31 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    sum of the squares value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   The input is represented in 1.31 format.
-                   Intermediate multiplication yields a 2.62 format, and this
-                   result is truncated to 2.48 format by discarding the lower 14 bits.
-                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
-                   With 15 guard bits in the accumulator, there is no risk of overflow, and the
-                   full precision of the intermediate multiplication is preserved.
-                   Finally, the return result is in 16.48 format.
- */
-
-void arm_power_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q63_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Temporary result storage */
-        q31_t in;                                      /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and store result in a temporary variable sum, providing 15 guard bits. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14U;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14U;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14U;
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power and store result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q63_t) in * in) >> 14U;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store results in 16.48 format */
-  *pResult = sum;
-}
-
-/**
-  @} end of power group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_q31.c
+ * Description:  Sum of the squares of the elements of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.31 format.
+                   Intermediate multiplication yields a 2.62 format, and this
+                   result is truncated to 2.48 format by discarding the lower 14 bits.
+                   The 2.48 result is then added without saturation to a 64-bit accumulator in 16.48 format.
+                   With 15 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 16.48 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_power_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
+{
+    uint32_t     blkCnt;           /* loop counters */
+    q31x4_t     vecSrc;
+    q63_t       sum = 0LL;
+    q31_t       in;
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_s32(pSrc);
+        /*
+         * sum lanes
+         */
+        sum = vrmlaldavhaq(sum, vecSrc, vecSrc);
+
+        blkCnt --;
+        pSrc += 4;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0x3;
+    while (blkCnt > 0U)
+    {
+       /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+       /* Compute Power and store result in a temporary variable, sum. */
+       in = *pSrc++;
+       sum += ((q63_t) in * in) >> 8;
+
+       /* Decrement loop counter */
+       blkCnt--;
+    }
+
+    *pResult = asrl(sum, 6);
+}
+#else
+void arm_power_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q63_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power then shift intermediate results by 14 bits to maintain 16.48 format and store result in a temporary variable sum, providing 15 guard bits. */
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q63_t) in * in) >> 14U;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store results in 16.48 format */
+  *pResult = sum;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
index eefa8bae..1f2f6628 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_power_q7.c
@@ -1,136 +1,180 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_power_q7.c
- * Description:  Sum of the squares of the elements of a Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup power
-  @{
- */
-
-/**
-  @brief         Sum of the squares of the elements of a Q7 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    sum of the squares value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 32-bit internal accumulator.
-                   The input is represented in 1.7 format.
-                   Intermediate multiplication yields a 2.14 format, and this
-                   result is added without saturation to an accumulator in 18.14 format.
-                   With 17 guard bits in the accumulator, there is no risk of overflow, and the
-                   full precision of the intermediate multiplication is preserved.
-                   Finally, the return result is in 18.14 format.
- */
-
-void arm_power_q7(
-  const q7_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t sum = 0;                                 /* Temporary result storage */
-        q7_t in;                                       /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in32;                                    /* Temporary variable to store packed input value */
-        q31_t in1, in2;                                /* Temporary variables to store input value */
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power and store result in a temporary variable, sum. */
-#if defined (ARM_MATH_DSP)
-    in32 = read_q7x4_ia ((q7_t **) &pSrc);
-
-    in1 = __SXTB16(__ROR(in32, 8));
-    in2 = __SXTB16(in32);
-
-    /* calculate power and accumulate to accumulator */
-    sum = __SMLAD(in1, in1, sum);
-    sum = __SMLAD(in2, in2, sum);
-#else
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute Power and store result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += ((q15_t) in * in);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Store result in 18.14 format */
-  *pResult = sum;
-}
-
-/**
-  @} end of power group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_power_q7.c
+ * Description:  Sum of the squares of the elements of a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup power
+  @{
+ */
+
+/**
+  @brief         Sum of the squares of the elements of a Q7 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    sum of the squares value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 32-bit internal accumulator.
+                   The input is represented in 1.7 format.
+                   Intermediate multiplication yields a 2.14 format, and this
+                   result is added without saturation to an accumulator in 18.14 format.
+                   With 17 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the return result is in 18.14 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_power_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecSrc;
+    q31_t   sum = 0LL;
+    q7_t in;
+
+   /* Compute 16 outputs at a time */
+    blkCnt = blockSize >> 4U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrbq_s8(pSrc);
+        /*
+         * sum lanes
+         */
+        sum = vmladavaq(sum, vecSrc, vecSrc);
+
+        blkCnt--;
+        pSrc += 16;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    while (blkCnt > 0U)
+    {
+       /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+       /* Compute Power and store result in a temporary variable, sum. */
+       in = *pSrc++;
+       sum += ((q15_t) in * in);
+
+       /* Decrement loop counter */
+       blkCnt--;
+    }
+
+    *pResult = sum;
+}
+#else
+void arm_power_q7(
+  const q7_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Temporary result storage */
+        q7_t in;                                       /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store packed input value */
+        q31_t in1, in2;                                /* Temporary variables to store input value */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q7x4_ia ((q7_t **) &pSrc);
+
+    in1 = __SXTB16(__ROR(in32, 8));
+    in2 = __SXTB16(in32);
+
+    /* calculate power and accumulate to accumulator */
+    sum = __SMLAD(in1, in1, sum);
+    sum = __SMLAD(in2, in2, sum);
+#else
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute Power and store result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += ((q15_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Store result in 18.14 format */
+  *pResult = sum;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of power group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f16.c
new file mode 100755
index 00000000..42a00efb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f16.c
@@ -0,0 +1,147 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rms_f16.c
+ * Description:  Root mean square value of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup RMS Root mean square (RMS)
+
+  Calculates the Root Mean Square of the elements in the input vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
+  </pre>
+
+  There are separate functions for floating point, Q31, and Q15 data types.
+ */
+
+/**
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_rms_f16(
+  const float16_t * pSrc,
+  uint32_t blockSize,
+  float16_t * pResult)
+{
+    float16_t pow = 0.0f;
+
+    arm_power_f16(pSrc, blockSize, &pow);
+
+    /* Compute Rms and store the result in the destination */
+    arm_sqrt_f16((_Float16)pow / (_Float16) blockSize, pResult);
+}
+#else
+
+void arm_rms_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        _Float16 sum = 0.0f16;                          /* Temporary result storage */
+        _Float16 in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sum. */
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ( in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Rms and store result in destination */
+  arm_sqrt_f16((_Float16)sum / (_Float16) blockSize, pResult);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of RMS group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
index 4f316fbe..cb45752b 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_f32.c
@@ -1,176 +1,192 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rms_f32.c
- * Description:  Root mean square value of the elements of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @defgroup RMS Root mean square (RMS)
-
-  Calculates the Root Mean Square of the elements in the input vector.
-  The underlying algorithm is used:
-
-  <pre>
-      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
-  </pre>
-
-  There are separate functions for floating point, Q31, and Q15 data types.
- */
-
-/**
-  @addtogroup RMS
-  @{
- */
-
-/**
-  @brief         Root Mean Square of the elements of a floating-point vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    root mean square value returned here
-  @return        none
- */
-#if defined(ARM_MATH_NEON)
-void arm_rms_f32(
-  const float32_t * pSrc,
-  uint32_t blockSize,
-  float32_t * pResult)
-{
-  float32_t sum = 0.0f;                          /* accumulator */
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
-  float32x2_t sumV2;
-  float32x4_t inV;
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    inV = vld1q_f32(pSrc);
-    sumV = vmlaq_f32(sumV, inV, inV);
-    pSrc += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
-  sum = sumV2[0] + sumV2[1];
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* compute power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Rms and store the result in the destination */
-  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
-}
-#else
-void arm_rms_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t sum = 0.0f;                          /* Temporary result storage */
-        float32_t in;                                  /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable, sum. */
-    sum += in * in;
-
-    in = *pSrc++;
-    sum += in * in;
-
-    in = *pSrc++;
-    sum += in * in;
-
-    in = *pSrc++;
-    sum += in * in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable. */
-    sum += ( in * in);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Rms and store result in destination */
-  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of RMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rms_f32.c
+ * Description:  Root mean square value of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup RMS Root mean square (RMS)
+
+  Calculates the Root Mean Square of the elements in the input vector.
+  The underlying algorithm is used:
+
+  <pre>
+      Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));
+  </pre>
+
+  There are separate functions for floating point, Q31, and Q15 data types.
+ */
+
+/**
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_rms_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+    float32_t pow = 0.0f;
+
+    arm_power_f32(pSrc, blockSize, &pow);
+
+    /* Compute Rms and store the result in the destination */
+    arm_sqrt_f32(pow / (float32_t) blockSize, pResult);
+}
+#else
+#if defined(ARM_MATH_NEON) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_rms_f32(
+  const float32_t * pSrc,
+  uint32_t blockSize,
+  float32_t * pResult)
+{
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* compute power and then store the result in a temporary variable, sum. */
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Rms and store the result in the destination */
+  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
+}
+#else
+void arm_rms_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t in;                                  /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sum. */
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    in = *pSrc++;
+    sum += in * in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ( in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Rms and store result in destination */
+  arm_sqrt_f32(sum / (float32_t) blockSize, pResult);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of RMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
index c8a0a138..da925eb0 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q15.c
@@ -1,134 +1,149 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rms_q15.c
- * Description:  Root Mean Square of the elements of a Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup RMS
-  @{
- */
-
-/**
-  @brief         Root Mean Square of the elements of a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    root mean square value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   The input is represented in 1.15 format.
-                   Intermediate multiplication yields a 2.30 format, and this
-                   result is added without saturation to a 64-bit accumulator in 34.30 format.
-                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
-                   full precision of the intermediate multiplication is preserved.
-                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
-                   15 bits, and then saturated to yield a result in 1.15 format.
- */
-
-void arm_rms_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Temporary result storage */
-        q15_t in;                                      /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in32;                                    /* Temporary variable to store input value */
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    /* Compute sum of squares and store result in a temporary variable. */
-#if defined (ARM_MATH_DSP)
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sum = __SMLALD(in32, in32, sum);
-
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sum = __SMLALD(in32, in32, sum);
-#else
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q31_t) in * in);
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable. */
-    sum += ((q31_t) in * in);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Truncating and saturating the accumulator to 1.15 format */
-  /* Store result in destination */
-  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
-}
-
-/**
-  @} end of RMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rms_q15.c
+ * Description:  Root Mean Square of the elements of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_rms_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    q63_t pow = 0.0f;
+    q15_t normalizedPower;
+
+    arm_power_q15(pSrc, blockSize, &pow);
+
+    normalizedPower=__SSAT((pow / (q63_t) blockSize) >> 15,16);
+    arm_sqrt_q15(normalizedPower, pResult);
+}
+#else
+void arm_rms_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store input value */
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    /* Compute sum of squares and store result in a temporary variable. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sum = __SMLALD(in32, in32, sum);
+#else
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q31_t) in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ((q31_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Truncating and saturating the accumulator to 1.15 format */
+  /* Store result in destination */
+  arm_sqrt_q15(__SSAT((sum / (q63_t)blockSize) >> 15, 16), pResult);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of RMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
index 4cf086fe..ba39b7b7 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_rms_q31.c
@@ -1,124 +1,141 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rms_q31.c
- * Description:  Root Mean Square of the elements of a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup RMS
-  @{
- */
-
-/**
-  @brief         Root Mean Square of the elements of a Q31 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    root mean square value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The input is represented in 1.31 format, and intermediate multiplication
-                   yields a 2.62 format.
-                   The accumulator maintains full precision of the intermediate multiplication results,
-                   but provides only a single guard bit.
-                   There is no saturation on intermediate additions.
-                   If the accumulator overflows, it wraps around and distorts the result.
-                   In order to avoid overflows completely, the input signal must be scaled down by
-                   log2(blockSize) bits, as a total of blockSize additions are performed internally.
-                   Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
- */
-
-void arm_rms_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        uint64_t sum = 0;                              /* Temporary result storage (can get never negative. changed type from q63 to uint64 */
-        q31_t in;                                      /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable, sum. */
-    sum += ((q63_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in);
-
-    in = *pSrc++;
-    sum += ((q63_t) in * in);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable. */
-    sum += ((q63_t) in * in);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
-  /* Compute Rms and store result in destination vector */
-  arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
-}
-
-/**
-  @} end of RMS group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rms_q31.c
+ * Description:  Root Mean Square of the elements of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup RMS
+  @{
+ */
+
+/**
+  @brief         Root Mean Square of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    root mean square value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, and intermediate multiplication
+                   yields a 2.62 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a single guard bit.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows, it wraps around and distorts the result.
+                   In order to avoid overflows completely, the input signal must be scaled down by
+                   log2(blockSize) bits, as a total of blockSize additions are performed internally.
+                   Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_rms_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    q63_t pow = 0.0f;
+    q31_t normalizedPower;
+    arm_power_q31(pSrc, blockSize, &pow);
+
+    normalizedPower=clip_q63_to_q31((pow / (q63_t) blockSize) >> 17);
+    arm_sqrt_q31(normalizedPower, pResult);
+
+}
+
+#else
+void arm_rms_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        uint64_t sum = 0;                              /* Temporary result storage (can get never negative. changed type from q63 to uint64 */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sum. */
+    sum += ((q63_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
+
+    in = *pSrc++;
+    sum += ((q63_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable. */
+    sum += ((q63_t) in * in);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Convert data in 2.62 to 1.31 by 31 right shifts and saturate */
+  /* Compute Rms and store result in destination vector */
+  arm_sqrt_q31(clip_q63_to_q31((sum / (q63_t) blockSize) >> 31), pResult);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of RMS group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f16.c
new file mode 100755
index 00000000..951d1651
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f16.c
@@ -0,0 +1,67 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_f16.c
+ * Description:  Standard deviation of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupStats
+ */
+
+
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
+ */
+void arm_std_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+  float16_t var;
+  arm_var_f16(pSrc,blockSize,&var);
+  arm_sqrt_f16(var, pResult);
+}
+
+/**
+  @} end of STD group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
index 214a794f..682443d9 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f32.c
@@ -1,188 +1,83 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_std_f32.c
- * Description:  Standard deviation of the elements of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @defgroup STD Standard deviation
-
-  Calculates the standard deviation of the elements in the input vector.
-  The underlying algorithm is used:
-
-  <pre>
-      Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
-
-      sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
-      sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
-  </pre>
-
-  There are separate functions for floating point, Q31, and Q15 data types.
- */
-
-/**
-  @addtogroup STD
-  @{
- */
-
-/**
-  @brief         Standard deviation of the elements of a floating-point vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    standard deviation value returned here
-  @return        none
- */
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_std_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult)
-{
-  float32_t var;
-  arm_var_f32(pSrc,blockSize,&var);
-  arm_sqrt_f32(var, pResult);
-}
-#else
-void arm_std_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t sum = 0.0f;                          /* Temporary result storage */
-        float32_t sumOfSquares = 0.0f;                 /* Sum of squares */
-        float32_t in;                                  /* Temporary variable to store input value */
-
-#ifndef ARM_MATH_CM0_FAMILY
-        float32_t meanOfSquares, mean, squareOfMean;   /* Temporary variables */
-#else
-        float32_t squareOfSum;                         /* Square of Sum */
-        float32_t var;                                 /* Temporary varaince storage */
-#endif
-
-  if (blockSize <= 1U)
-  {
-    *pResult = 0;
-    return;
-  }
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    sumOfSquares += in * in;
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += in * in;
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += in * in;
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += in * in;
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    sumOfSquares += ( in * in);
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-#ifndef ARM_MATH_CM0_FAMILY
-
-  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
-  meanOfSquares = sumOfSquares / ((float32_t) blockSize - 1.0f);
-
-  /* Compute mean of all input values */
-  mean = sum / (float32_t) blockSize;
-
-  /* Compute square of mean */
-  squareOfMean = (mean * mean) * (((float32_t) blockSize) /
-                                  ((float32_t) blockSize - 1.0f));
-
-  /* Compute standard deviation and store result to destination */
-  arm_sqrt_f32((meanOfSquares - squareOfMean), pResult);
-
-#else
-  /* Run the below code for Cortex-M0 */
-
-  /* Compute square of sum */
-  squareOfSum = ((sum * sum) / (float32_t) blockSize);
-
-  /* Compute variance */
-  var = ((sumOfSquares - squareOfSum) / (float32_t) (blockSize - 1.0f));
-
-  /* Compute standard deviation and store result in destination */
-  arm_sqrt_f32(var, pResult);
-
-#endif /* #ifndef ARM_MATH_CM0_FAMILY */
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of STD group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_f32.c
+ * Description:  Standard deviation of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup STD Standard deviation
+
+  Calculates the standard deviation of the elements in the input vector.
+
+  The float implementation is relying on arm_var_f32 which is using a two-pass algorithm
+  to avoid problem of numerical instabilities and cancellation errors.
+
+  Fixed point versions are using the standard textbook algorithm since the fixed point
+  numerical behavior is different from the float one.
+
+  Algorithm for fixed point versions is summarized below:
+
+
+  <pre>
+      Result = sqrt((sumOfSquares - sum<sup>2</sup> / blockSize) / (blockSize - 1))
+
+      sumOfSquares = pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]
+      sum = pSrc[0] + pSrc[1] + pSrc[2] + ... + pSrc[blockSize-1]
+  </pre>
+
+  There are separate functions for floating point, Q31, and Q15 data types.
+ */
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
+ */
+void arm_std_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+  float32_t var;
+  arm_var_f32(pSrc,blockSize,&var);
+  arm_sqrt_f32(var, pResult);
+}
+
+/**
+  @} end of STD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f64.c
new file mode 100644
index 00000000..620ec048
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_f64.c
@@ -0,0 +1,59 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_f64.c
+ * Description:  Standard deviation of the elements of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
+ */
+void arm_std_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult)
+{
+  float64_t var;
+  arm_var_f64(pSrc,blockSize,&var);
+  *pResult = sqrt(var);
+}
+
+/**
+  @} end of STD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
index 70d142db..74ee4f12 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q15.c
@@ -1,161 +1,173 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_std_q15.c
- * Description:  Standard deviation of an array of Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup STD
-  @{
- */
-
-/**
-  @brief         Standard deviation of the elements of a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    standard deviation value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   The input is represented in 1.15 format.
-                   Intermediate multiplication yields a 2.30 format, and this
-                   result is added without saturation to a 64-bit accumulator in 34.30 format.
-                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
-                   full precision of the intermediate multiplication is preserved.
-                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
-                   15 bits, and then saturated to yield a result in 1.15 format.
- */
-
-void arm_std_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t sum = 0;                                 /* Accumulator */
-        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
-        q63_t sumOfSquares = 0;                        /* Sum of squares */
-        q15_t in;                                      /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-  q31_t in32;                                    /* Temporary variable to store input value */
-#endif
-
-  if (blockSize <= 1U)
-  {
-    *pResult = 0;
-    return;
-  }
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    /* Compute sum and store result in a temporary variable, sum. */
-#if defined (ARM_MATH_DSP)
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
-    sum += ((in32 << 16U) >> 16U);
-    sum +=  (in32 >> 16U);
-
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
-    sum += ((in32 << 16U) >> 16U);
-    sum +=  (in32 >> 16U);
-#else
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    sumOfSquares += (in * in);
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
-  /* mean of squares minus the square of mean. */
-  /* Compute standard deviation and store result in destination */
-  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);
-}
-
-/**
-  @} end of STD group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_q15.c
+ * Description:  Standard deviation of an array of Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    standard deviation value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_std_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    q15_t var=0;
+
+    arm_var_q15(pSrc, blockSize, &var);
+    arm_sqrt_q15(var,pResult);
+}
+#else
+void arm_std_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Accumulator */
+        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+  q31_t in32;                                    /* Temporary variable to store input value */
+#endif
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+#else
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += (in * in);
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* mean of squares minus the square of mean. */
+  /* Compute standard deviation and store result in destination */
+  arm_sqrt_q15(__SSAT((meanOfSquares - squareOfMean) >> 15U, 16U), pResult);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of STD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
index 1452a695..63170e79 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_std_q31.c
@@ -1,147 +1,159 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_std_q31.c
- * Description:  Standard deviation of the elements of a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup STD
-  @{
- */
-
-/**
-  @brief         Standard deviation of the elements of a Q31 vector.
-  @param[in]     pSrc       points to the input vector.
-  @param[in]     blockSize  number of samples in input vector.
-  @param[out]    pResult    standard deviation value returned here.
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The input is represented in 1.31 format, which is then downshifted by 8 bits
-                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
-                   The accumulator maintains full precision of the intermediate multiplication results,
-                   but provides only a 16 guard bits.
-                   There is no saturation on intermediate additions.
-                   If the accumulator overflows it wraps around and distorts the result.
-                   In order to avoid overflows completely the input signal must be scaled down by
-                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
-                   After division, internal variables should be Q18.46
-                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
- */
-
-void arm_std_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Accumulator */
-        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
-        q63_t sumOfSquares = 0;                        /* Sum of squares */
-        q31_t in;                                      /* Temporary variable to store input value */
-
-  if (blockSize <= 1U)
-  {
-    *pResult = 0;
-    return;
-  }
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++ >> 8U;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    sumOfSquares += ((q63_t) (in) * (in));
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
-    sum += in;
-
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
-    sum += in;
-
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++ >> 8U;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    sumOfSquares += ((q63_t) (in) * (in));
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
-
-  /* Compute square of mean */
-  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
-  /* Compute standard deviation and store result in destination */
-  arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult);
-}
-
-/**
-  @} end of STD group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_std_q31.c
+ * Description:  Standard deviation of the elements of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup STD
+  @{
+ */
+
+/**
+  @brief         Standard deviation of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector.
+  @param[in]     blockSize  number of samples in input vector.
+  @param[out]    pResult    standard deviation value returned here.
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, which is then downshifted by 8 bits
+                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   but provides only a 16 guard bits.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+                   After division, internal variables should be Q18.46
+                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_std_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    q31_t var=0;
+
+    arm_var_q31(pSrc, blockSize, &var);
+    arm_sqrt_q31(var, pResult);
+}
+#else
+void arm_std_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Accumulator */
+        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* Compute standard deviation and store result in destination */
+  arm_sqrt_q31((meanOfSquares - squareOfMean) >> 15U, pResult);
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of STD group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f16.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f16.c
new file mode 100755
index 00000000..0e3ade59
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f16.c
@@ -0,0 +1,209 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_f16.c
+ * Description:  Variance of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions_f16.h"
+
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupStats
+ */
+
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+
+void arm_var_f16(
+           const float16_t * pSrc,
+                 uint32_t blockSize,
+                 float16_t * pResult)
+{
+    int32_t         blkCnt;     /* loop counters */
+    f16x8_t         vecSrc;
+    f16x8_t         sumVec = vdupq_n_f16(0.0f16);
+    float16_t       fMean;
+
+    if (blockSize <= 1U) {
+        *pResult = 0;
+        return;
+    }
+
+
+    arm_mean_f16(pSrc, blockSize, &fMean);
+
+    blkCnt = blockSize;
+    do {
+        mve_pred16_t    p = vctp16q(blkCnt);
+
+        vecSrc = vldrhq_z_f16((float16_t const *) pSrc, p);
+        /*
+         * sum lanes
+         */
+        vecSrc = vsubq_m(vuninitializedq_f16(), vecSrc, fMean, p);
+        sumVec = vfmaq_m(sumVec, vecSrc, vecSrc, p);
+
+        blkCnt -= 8;
+        pSrc += 8;
+    }
+    while (blkCnt > 0);
+    
+    /* Variance */
+    *pResult = (_Float16)vecAddAcrossF16Mve(sumVec) / (_Float16) (blockSize - 1.0f16);
+}
+#else
+
+void arm_var_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        _Float16 sum = 0.0f;                          /* Temporary result storage */
+        _Float16 fSum = 0.0f;
+        _Float16 fMean, fValue;
+  const float16_t * pInput = pSrc;
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += (_Float16)*pInput++;
+    sum += (_Float16)*pInput++;
+    sum += (_Float16)*pInput++;
+    sum += (_Float16)*pInput++;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += (_Float16)*pInput++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  fMean = (_Float16)sum / (_Float16) blockSize;
+
+  pInput = pSrc;
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    fValue = (_Float16)*pInput++ - (_Float16)fMean;
+    fSum += (_Float16)fValue * (_Float16)fValue;
+
+    fValue = (_Float16)*pInput++ - (_Float16)fMean;
+    fSum += (_Float16)fValue * (_Float16)fValue;
+
+    fValue = (_Float16)*pInput++ - (_Float16)fMean;
+    fSum += (_Float16)fValue * (_Float16)fValue;
+
+    fValue = (_Float16)*pInput++ - (_Float16)fMean;
+    fSum += (_Float16)fValue * (_Float16)fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    fValue = (_Float16)*pInput++ - (_Float16)fMean;
+    fSum += (_Float16)fValue * (_Float16)fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Variance */
+  *pResult = (_Float16)fSum / ((_Float16)blockSize - 1.0f16);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of variance group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
index 18f5806f..7ff344c7 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f32.c
@@ -1,234 +1,293 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_var_f32.c
- * Description:  Variance of the elements of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @defgroup variance  Variance
-
-  Calculates the variance of the elements in the input vector.
-  The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
-
-  <pre>
-      Result = sum(element - meanOfElements)^2) / numElement - 1
-
-      meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
-  </pre>
-
-  There are separate functions for floating point, Q31, and Q15 data types.
- */
-
-/**
-  @addtogroup variance
-  @{
- */
-
-/**
-  @brief         Variance of the elements of a floating-point vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    variance value returned here
-  @return        none
- */
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_var_f32(
-           const float32_t * pSrc,
-                 uint32_t blockSize,
-                 float32_t * pResult)
-{
-  float32_t mean;
-
-  float32_t sum = 0.0f;                          /* accumulator */
-  float32_t in;                                  /* Temporary variable to store input value */
-  uint32_t blkCnt;                               /* loop counter */
-
-  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
-  float32x2_t sumV2;
-  float32x4_t inV;
-  float32x4_t avg;
-
-  arm_mean_f32(pSrc,blockSize,&mean);
-  avg = vdupq_n_f32(mean);
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* Compute Power and then store the result in a temporary variable, sum. */
-    inV = vld1q_f32(pSrc);
-    inV = vsubq_f32(inV, avg);
-    sumV = vmlaq_f32(sumV, inV, inV);
-    pSrc += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
-  sum = sumV2[0] + sumV2[1];
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize % 0x4U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* compute power and then store the result in a temporary variable, sum. */
-    in = *pSrc++;
-    in = in - mean;
-    sum += in * in;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* Variance */
-  *pResult = sum / (float32_t)(blockSize - 1.0f);
-
-}
-
-#else
-void arm_var_f32(
-  const float32_t * pSrc,
-        uint32_t blockSize,
-        float32_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        float32_t sum = 0.0f;                          /* Temporary result storage */
-        float32_t fSum = 0.0f;
-        float32_t fMean, fValue;
-  const float32_t * pInput = pSrc;
-
-  if (blockSize <= 1U)
-  {
-    *pResult = 0;
-    return;
-  }
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-
-    sum += *pInput++;
-    sum += *pInput++;
-    sum += *pInput++;
-    sum += *pInput++;
-
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-
-    sum += *pInput++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
-  fMean = sum / (float32_t) blockSize;
-
-  pInput = pSrc;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    fValue = *pInput++ - fMean;
-    fSum += fValue * fValue;
-
-    fValue = *pInput++ - fMean;
-    fSum += fValue * fValue;
-
-    fValue = *pInput++ - fMean;
-    fSum += fValue * fValue;
-
-    fValue = *pInput++ - fMean;
-    fSum += fValue * fValue;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    fValue = *pInput++ - fMean;
-    fSum += fValue * fValue;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Variance */
-  *pResult = fSum / (float32_t)(blockSize - 1.0f);
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of variance group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_f32.c
+ * Description:  Variance of the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @defgroup variance  Variance
+
+  Calculates the variance of the elements in the input vector.
+  The underlying algorithm used is the direct method sometimes referred to as the two-pass method:
+
+  <pre>
+      Result = sum(element - meanOfElements)^2) / numElement - 1
+
+      meanOfElements = ( pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] ) / blockSize
+  </pre>
+
+  There are separate functions for floating point, Q31, and Q15 data types.
+ */
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+void arm_var_f32(
+           const float32_t * pSrc,
+                 uint32_t blockSize,
+                 float32_t * pResult)
+{
+    uint32_t         blkCnt;     /* loop counters */
+    f32x4_t         vecSrc;
+    f32x4_t         sumVec = vdupq_n_f32(0.0f);
+    float32_t       fMean;
+    float32_t sum = 0.0f;                          /* accumulator */
+    float32_t in;                                  /* Temporary variable to store input value */
+
+    if (blockSize <= 1U) {
+        *pResult = 0;
+        return;
+    }
+
+    arm_mean_f32(pSrc, blockSize, &fMean);
+
+    /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+
+        vecSrc = vldrwq_f32(pSrc);
+        /*
+         * sum lanes
+         */
+        vecSrc = vsubq(vecSrc, fMean);
+        sumVec = vfmaq(sumVec, vecSrc, vecSrc);
+
+        blkCnt --;
+        pSrc += 4;
+    }
+
+    sum = vecAddAcrossF32Mve(sumVec);
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0x3;
+    while (blkCnt > 0U)
+    {
+       in = *pSrc++ - fMean;
+       sum += in * in;
+
+       /* Decrement loop counter */
+       blkCnt--;
+    }
+   
+    /* Variance */
+    *pResult = sum / (float32_t) (blockSize - 1);
+}
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_var_f32(
+           const float32_t * pSrc,
+                 uint32_t blockSize,
+                 float32_t * pResult)
+{
+  float32_t mean;
+
+  float32_t sum = 0.0f;                          /* accumulator */
+  float32_t in;                                  /* Temporary variable to store input value */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t sumV = vdupq_n_f32(0.0f);                          /* Temporary result storage */
+  float32x2_t sumV2;
+  float32x4_t inV;
+  float32x4_t avg;
+
+  arm_mean_f32(pSrc,blockSize,&mean);
+  avg = vdupq_n_f32(mean);
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* Compute Power and then store the result in a temporary variable, sum. */
+    inV = vld1q_f32(pSrc);
+    inV = vsubq_f32(inV, avg);
+    sumV = vmlaq_f32(sumV, inV, inV);
+    pSrc += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  sumV2 = vpadd_f32(vget_low_f32(sumV),vget_high_f32(sumV));
+  sum = vget_lane_f32(sumV2, 0) + vget_lane_f32(sumV2, 1);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize % 0x4U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + A[2] * A[2] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* compute power and then store the result in a temporary variable, sum. */
+    in = *pSrc++;
+    in = in - mean;
+    sum += in * in;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* Variance */
+  *pResult = sum / (float32_t)(blockSize - 1.0f);
+
+}
+
+#else
+void arm_var_f32(
+  const float32_t * pSrc,
+        uint32_t blockSize,
+        float32_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float32_t sum = 0.0f;                          /* Temporary result storage */
+        float32_t fSum = 0.0f;
+        float32_t fMean, fValue;
+  const float32_t * pInput = pSrc;
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += *pInput++;
+    sum += *pInput++;
+    sum += *pInput++;
+    sum += *pInput++;
+
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += *pInput++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  fMean = sum / (float32_t) blockSize;
+
+  pInput = pSrc;
+
+#if defined (ARM_MATH_LOOPUNROLL) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Variance */
+  *pResult = fSum / (float32_t)(blockSize - 1.0f);
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of variance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f64.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f64.c
new file mode 100644
index 00000000..6fd106aa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_f64.c
@@ -0,0 +1,100 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_f64.c
+ * Description:  Variance of the elements of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a floating-point vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+ */
+void arm_var_f64(
+  const float64_t * pSrc,
+        uint32_t blockSize,
+        float64_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        float64_t sum = 0.;                          /* Temporary result storage */
+        float64_t fSum = 0.;
+        float64_t fMean, fValue;
+  const float64_t * pInput = pSrc;
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
+
+    sum += *pInput++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
+  fMean = sum / (float64_t) blockSize;
+
+  pInput = pSrc;
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    fValue = *pInput++ - fMean;
+    fSum += fValue * fValue;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Variance */
+  *pResult = fSum / (float64_t)(blockSize - 1.);
+}
+
+/**
+  @} end of variance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
index 42185227..e15c6aa6 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q15.c
@@ -1,164 +1,230 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_var_q15.c
- * Description:  Variance of an array of Q15 type
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup variance
-  @{
- */
-
-/**
-  @brief         Variance of the elements of a Q15 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    variance value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using a 64-bit internal accumulator.
-                   The input is represented in 1.15 format.
-                   Intermediate multiplication yields a 2.30 format, and this
-                   result is added without saturation to a 64-bit accumulator in 34.30 format.
-                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
-                   full precision of the intermediate multiplication is preserved.
-                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
-                   15 bits, and then saturated to yield a result in 1.15 format.
- */
-
-void arm_var_q15(
-  const q15_t * pSrc,
-        uint32_t blockSize,
-        q15_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q31_t sum = 0;                                 /* Accumulator */
-        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
-        q63_t sumOfSquares = 0;                        /* Sum of squares */
-        q15_t in;                                      /* Temporary variable to store input value */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in32;                                    /* Temporary variable to store input value */
-#endif
-
-  if (blockSize <= 1U)
-  {
-    *pResult = 0;
-    return;
-  }
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    /* Compute sum and store result in a temporary variable, sum. */
-#if defined (ARM_MATH_DSP)
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
-    sum += ((in32 << 16U) >> 16U);
-    sum +=  (in32 >> 16U);
-
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
-    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
-    sum += ((in32 << 16U) >> 16U);
-    sum +=  (in32 >> 16U);
-#else
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-
-    in = *pSrc++;
-    sumOfSquares += (in * in);
-    sum += in;
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-#if defined (ARM_MATH_DSP)
-    sumOfSquares = __SMLALD(in, in, sumOfSquares);
-#else
-    sumOfSquares += (in * in);
-#endif /* #if defined (ARM_MATH_DSP) */
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
-
-  /* Compute square of mean */
-  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
-  /* mean of squares minus the square of mean. */
-  *pResult = (meanOfSquares - squareOfMean) >> 15U;
-}
-
-/**
-  @} end of variance group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_q15.c
+ * Description:  Variance of an array of Q15 type
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a Q15 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using a 64-bit internal accumulator.
+                   The input is represented in 1.15 format.
+                   Intermediate multiplication yields a 2.30 format, and this
+                   result is added without saturation to a 64-bit accumulator in 34.30 format.
+                   With 33 guard bits in the accumulator, there is no risk of overflow, and the
+                   full precision of the intermediate multiplication is preserved.
+                   Finally, the 34.30 result is truncated to 34.15 format by discarding the lower
+                   15 bits, and then saturated to yield a result in 1.15 format.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_var_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+    uint32_t  blkCnt;     /* loop counters */
+    q15x8_t         vecSrc;
+    q63_t           sumOfSquares = 0LL;
+    q63_t           meanOfSquares, squareOfMean;        /* square of mean and mean of square */
+    q63_t           sum = 0LL;
+    q15_t in; 
+
+    if (blockSize <= 1U) {
+        *pResult = 0;
+        return;
+    }
+
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrhq_s16(pSrc);
+        /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
+        /* Compute Sum of squares of the input samples
+         * and then store the result in a temporary variable, sumOfSquares. */
+
+        sumOfSquares = vmlaldavaq_s16(sumOfSquares, vecSrc, vecSrc);
+        sum = vaddvaq_s16(sum, vecSrc);
+
+        blkCnt --;
+        pSrc += 8;
+    }
+
+    /* Tail */
+    blkCnt = blockSize & 7;
+    while (blkCnt > 0U)
+    {
+      /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+      /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+      in = *pSrc++;
+      /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+#if defined (ARM_MATH_DSP)
+      sumOfSquares = __SMLALD(in, in, sumOfSquares);
+#else
+      sumOfSquares += (in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+      /* Compute sum and store result in a temporary variable, sum. */
+      sum += in;
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+
+    /* Compute Mean of squares of the input samples
+     * and then store the result in a temporary variable, meanOfSquares. */
+    meanOfSquares = arm_div_q63_to_q31(sumOfSquares, (blockSize - 1U));
+
+    /* Compute square of mean */
+    squareOfMean = arm_div_q63_to_q31((q63_t)sum * sum, (q31_t)(blockSize * (blockSize - 1U)));
+
+    /* mean of the squares minus the square of the mean. */
+    *pResult = (meanOfSquares - squareOfMean) >> 15;
+}
+#else
+void arm_var_q15(
+  const q15_t * pSrc,
+        uint32_t blockSize,
+        q15_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q31_t sum = 0;                                 /* Accumulator */
+        q31_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q15_t in;                                      /* Temporary variable to store input value */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in32;                                    /* Temporary variable to store input value */
+#endif
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    /* Compute sum and store result in a temporary variable, sum. */
+#if defined (ARM_MATH_DSP)
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+
+    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    sumOfSquares = __SMLALD(in32, in32, sumOfSquares);
+    sum += ((in32 << 16U) >> 16U);
+    sum +=  (in32 >> 16U);
+#else
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+
+    in = *pSrc++;
+    sumOfSquares += (in * in);
+    sum += in;
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+#if defined (ARM_MATH_DSP)
+    sumOfSquares = __SMLALD(in, in, sumOfSquares);
+#else
+    sumOfSquares += (in * in);
+#endif /* #if defined (ARM_MATH_DSP) */
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (q31_t) (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = (q31_t) ((q63_t) sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* mean of squares minus the square of mean. */
+  *pResult = (meanOfSquares - squareOfMean) >> 15U;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of variance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
index 6b552db5..45b6b66b 100644
--- a/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
+++ b/Libraries/CMSIS/DSP/Source/StatisticsFunctions/arm_var_q31.c
@@ -1,147 +1,214 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_var_q31.c
- * Description:  Variance of an array of Q31 type
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupStats
- */
-
-/**
-  @addtogroup variance
-  @{
- */
-
-/**
-  @brief         Variance of the elements of a Q31 vector.
-  @param[in]     pSrc       points to the input vector
-  @param[in]     blockSize  number of samples in input vector
-  @param[out]    pResult    variance value returned here
-  @return        none
-
-  @par           Scaling and Overflow Behavior
-                   The function is implemented using an internal 64-bit accumulator.
-                   The input is represented in 1.31 format, which is then downshifted by 8 bits
-                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
-                   The accumulator maintains full precision of the intermediate multiplication results,
-                   but provides only a 16 guard bits.
-                   There is no saturation on intermediate additions.
-                   If the accumulator overflows it wraps around and distorts the result.
-                   In order to avoid overflows completely the input signal must be scaled down by
-                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
-                   After division, internal variables should be Q18.46
-                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
- */
-
-void arm_var_q31(
-  const q31_t * pSrc,
-        uint32_t blockSize,
-        q31_t * pResult)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-        q63_t sum = 0;                                 /* Temporary result storage */
-        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
-        q63_t sumOfSquares = 0;                        /* Sum of squares */
-        q31_t in;                                      /* Temporary variable to store input value */
-
-  if (blockSize <= 1U)
-  {
-    *pResult = 0;
-    return;
-  }
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++ >> 8U;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    sumOfSquares += ((q63_t) (in) * (in));
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
-    sum += in;
-
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
-    sum += in;
-
-    in = *pSrc++ >> 8U;
-    sumOfSquares += ((q63_t) (in) * (in));
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
-    /* C = A[0] + A[1] + ... + A[blockSize-1] */
-
-    in = *pSrc++ >> 8U;
-    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
-    sumOfSquares += ((q63_t) (in) * (in));
-    /* Compute sum and store result in a temporary variable, sum. */
-    sum += in;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
-  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
-
-  /* Compute square of mean */
-  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
-
-  /* Compute variance and store result in destination */
-  *pResult = (meanOfSquares - squareOfMean) >> 15U;
-}
-
-/**
-  @} end of variance group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_var_q31.c
+ * Description:  Variance of an array of Q31 type
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/statistics_functions.h"
+
+/**
+  @ingroup groupStats
+ */
+
+/**
+  @addtogroup variance
+  @{
+ */
+
+/**
+  @brief         Variance of the elements of a Q31 vector.
+  @param[in]     pSrc       points to the input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    variance value returned here
+  @return        none
+
+  @par           Scaling and Overflow Behavior
+                   The function is implemented using an internal 64-bit accumulator.
+                   The input is represented in 1.31 format, which is then downshifted by 8 bits
+                   which yields 1.23, and intermediate multiplication yields a 2.46 format.
+                   The accumulator maintains full precision of the intermediate multiplication results,
+                   and as a consequence has only 16 guard bits.
+                   There is no saturation on intermediate additions.
+                   If the accumulator overflows it wraps around and distorts the result.
+                   In order to avoid overflows completely the input signal must be scaled down by
+                   log2(blockSize)-8 bits, as a total of blockSize additions are performed internally.
+                   After division, internal variables should be Q18.46
+                   Finally, the 18.46 accumulator is right shifted by 15 bits to yield a 1.31 format value.
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_var_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+    uint32_t  blkCnt;     /* loop counters */
+    q31x4_t         vecSrc;
+    q63_t           sumOfSquares = 0LL;
+    q63_t           meanOfSquares, squareOfMean;        /* square of mean and mean of square */
+    q63_t           sum = 0LL;
+    q31_t in; 
+
+    if (blockSize <= 1U) {
+        *pResult = 0;
+        return;
+    }
+
+
+   /* Compute 4 outputs at a time */
+    blkCnt = blockSize >> 2U;
+    while (blkCnt > 0U)
+    {
+        vecSrc = vldrwq_s32(pSrc);
+        /* C = (A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1]) */
+        /* Compute Sum of squares of the input samples
+         * and then store the result in a temporary variable, sumOfSquares. */
+
+        /* downscale */
+        vecSrc = vshrq(vecSrc, 8);
+        sumOfSquares = vmlaldavaq(sumOfSquares, vecSrc, vecSrc);
+        sum = vaddlvaq(sum, vecSrc);
+
+        blkCnt --;
+        pSrc += 4;
+    }
+
+    
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0x3;
+    while (blkCnt > 0U)
+    {
+       /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+       /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+       in = *pSrc++ >> 8U;
+       /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+       sumOfSquares += ((q63_t) (in) * (in));
+       /* Compute sum and store result in a temporary variable, sum. */
+       sum += in;
+   
+       /* Decrement loop counter */
+       blkCnt--;
+    }
+
+    /* Compute Mean of squares of the input samples
+     * and then store the result in a temporary variable, meanOfSquares. */
+    meanOfSquares = sumOfSquares / (q63_t) (blockSize - 1U);
+
+    /* Compute square of mean */
+    squareOfMean = sum * sum / (q63_t) (blockSize * (blockSize - 1U));
+
+    /* Compute standard deviation and then store the result to the destination */
+    *pResult = asrl(meanOfSquares - squareOfMean, 15U);
+}
+#else
+void arm_var_q31(
+  const q31_t * pSrc,
+        uint32_t blockSize,
+        q31_t * pResult)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+        q63_t sum = 0;                                 /* Temporary result storage */
+        q63_t meanOfSquares, squareOfMean;             /* Square of mean and mean of square */
+        q63_t sumOfSquares = 0;                        /* Sum of squares */
+        q31_t in;                                      /* Temporary variable to store input value */
+
+  if (blockSize <= 1U)
+  {
+    *pResult = 0;
+    return;
+  }
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    in = *pSrc++ >> 8U;
+    sumOfSquares += ((q63_t) (in) * (in));
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A[0] * A[0] + A[1] * A[1] + ... + A[blockSize-1] * A[blockSize-1] */
+    /* C = A[0] + A[1] + ... + A[blockSize-1] */
+
+    in = *pSrc++ >> 8U;
+    /* Compute sum of squares and store result in a temporary variable, sumOfSquares. */
+    sumOfSquares += ((q63_t) (in) * (in));
+    /* Compute sum and store result in a temporary variable, sum. */
+    sum += in;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Compute Mean of squares and store result in a temporary variable, meanOfSquares. */
+  meanOfSquares = (sumOfSquares / (q63_t)(blockSize - 1U));
+
+  /* Compute square of mean */
+  squareOfMean = ( sum * sum / (q63_t)(blockSize * (blockSize - 1U)));
+
+  /* Compute variance and store result in destination */
+  *pResult = (meanOfSquares - squareOfMean) >> 15U;
+}
+#endif
+/**
+  @} end of variance group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
index d1ab9d42..ca8b1b6c 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctions.c
@@ -1,48 +1,63 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        SupportFunctions.c
- * Description:  Combination of all support function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_copy_f32.c"
-#include "arm_copy_q15.c"
-#include "arm_copy_q31.c"
-#include "arm_copy_q7.c"
-#include "arm_fill_f32.c"
-#include "arm_fill_q15.c"
-#include "arm_fill_q31.c"
-#include "arm_fill_q7.c"
-#include "arm_float_to_q15.c"
-#include "arm_float_to_q31.c"
-#include "arm_float_to_q7.c"
-#include "arm_q15_to_float.c"
-#include "arm_q15_to_q31.c"
-#include "arm_q15_to_q7.c"
-#include "arm_q31_to_float.c"
-#include "arm_q31_to_q15.c"
-#include "arm_q31_to_q7.c"
-#include "arm_q7_to_float.c"
-#include "arm_q7_to_q15.c"
-#include "arm_q7_to_q31.c"
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        SupportFunctions.c
+ * Description:  Combination of all support function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_barycenter_f32.c"
+#include "arm_bitonic_sort_f32.c"
+#include "arm_bubble_sort_f32.c"
+#include "arm_copy_f32.c"
+#include "arm_copy_f64.c"
+#include "arm_copy_q15.c"
+#include "arm_copy_q31.c"
+#include "arm_copy_q7.c"
+#include "arm_fill_f32.c"
+#include "arm_fill_f64.c"
+#include "arm_fill_q15.c"
+#include "arm_fill_q31.c"
+#include "arm_fill_q7.c"
+#include "arm_heap_sort_f32.c"
+#include "arm_insertion_sort_f32.c"
+#include "arm_merge_sort_f32.c"
+#include "arm_merge_sort_init_f32.c"
+#include "arm_quick_sort_f32.c"
+#include "arm_selection_sort_f32.c"
+#include "arm_sort_f32.c"
+#include "arm_sort_init_f32.c"
+#include "arm_weighted_sum_f32.c"
+
+#include "arm_float_to_q15.c"
+#include "arm_float_to_q31.c"
+#include "arm_float_to_q7.c"
+#include "arm_q15_to_float.c"
+#include "arm_q15_to_q31.c"
+#include "arm_q15_to_q7.c"
+#include "arm_q31_to_float.c"
+#include "arm_q31_to_q15.c"
+#include "arm_q31_to_q7.c"
+#include "arm_q7_to_float.c"
+#include "arm_q7_to_q15.c"
+#include "arm_q7_to_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c
new file mode 100755
index 00000000..0e39d8d1
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/SupportFunctionsF16.c
@@ -0,0 +1,36 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        SupportFunctions.c
+ * Description:  Combination of all support function source files.
+ *
+ * $Date:        16. March 2020
+ * $Revision:    V1.1.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019-2020 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_copy_f16.c"
+#include "arm_fill_f16.c"
+#include "arm_f16_to_q15.c"
+#include "arm_f16_to_float.c"
+#include "arm_q15_to_f16.c"
+#include "arm_float_to_f16.c"
+#include "arm_weighted_sum_f16.c"
+#include "arm_barycenter_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f16.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f16.c
new file mode 100755
index 00000000..6dfe55c9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f16.c
@@ -0,0 +1,274 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_barycenter_f16.c
+ * Description:  Barycenter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+#include <limits.h>
+#include <math.h>
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @defgroup barycenter Barycenter
+
+  Barycenter of weighted vectors
+ */
+
+/**
+  @addtogroup barycenter
+  @{
+ */
+
+
+/**
+ * @brief Barycenter
+ *
+ *
+ * @param[in]    *in         List of vectors
+ * @param[in]    *weights    Weights of the vectors
+ * @param[out]   *out        Barycenter
+ * @param[in]    nbVectors   Number of vectors
+ * @param[in]    vecDim      Dimension of space (vector dimension)
+ * @return       None
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_barycenter_f16(const float16_t *in, 
+  const float16_t *weights, 
+  float16_t *out, 
+  uint32_t nbVectors,
+  uint32_t vecDim)
+{
+    const float16_t *pIn, *pW;
+    const float16_t *pIn1, *pIn2, *pIn3, *pIn4;
+    float16_t      *pOut;
+    uint32_t        blkCntVector, blkCntSample;
+    float16_t       accum, w;
+
+    blkCntVector = nbVectors;
+    blkCntSample = vecDim;
+
+    accum = 0.0f;
+
+    pW = weights;
+    pIn = in;
+
+
+    arm_fill_f16(0.0f, out, vecDim);
+
+
+    /* Sum */
+    pIn1 = pIn;
+    pIn2 = pIn1 + vecDim;
+    pIn3 = pIn2 + vecDim;
+    pIn4 = pIn3 + vecDim;
+
+    blkCntVector = nbVectors >> 2;
+    while (blkCntVector > 0) 
+    {
+        f16x8_t         outV, inV1, inV2, inV3, inV4;
+        float16_t       w1, w2, w3, w4;
+
+        pOut = out;
+        w1 = *pW++;
+        w2 = *pW++;
+        w3 = *pW++;
+        w4 = *pW++;
+        accum += (_Float16)w1 + (_Float16)w2 + (_Float16)w3 + (_Float16)w4;
+
+        blkCntSample = vecDim >> 3;
+        while (blkCntSample > 0) {
+            outV = vld1q((const float16_t *) pOut);
+            inV1 = vld1q(pIn1);
+            inV2 = vld1q(pIn2);
+            inV3 = vld1q(pIn3);
+            inV4 = vld1q(pIn4);
+            outV = vfmaq(outV, inV1, w1);
+            outV = vfmaq(outV, inV2, w2);
+            outV = vfmaq(outV, inV3, w3);
+            outV = vfmaq(outV, inV4, w4);
+            vst1q(pOut, outV);
+
+            pOut += 8;
+            pIn1 += 8;
+            pIn2 += 8;
+            pIn3 += 8;
+            pIn4 += 8;
+
+            blkCntSample--;
+        }
+
+        blkCntSample = vecDim & 7;
+        while (blkCntSample > 0) {
+            *pOut = (_Float16)*pOut + (_Float16)*pIn1++ * (_Float16)w1;
+            *pOut = (_Float16)*pOut + (_Float16)*pIn2++ * (_Float16)w2;
+            *pOut = (_Float16)*pOut + (_Float16)*pIn3++ * (_Float16)w3;
+            *pOut = (_Float16)*pOut + (_Float16)*pIn4++ * (_Float16)w4;
+            pOut++;
+            blkCntSample--;
+        }
+
+        pIn1 += 3 * vecDim;
+        pIn2 += 3 * vecDim;
+        pIn3 += 3 * vecDim;
+        pIn4 += 3 * vecDim;
+
+        blkCntVector--;
+    }
+
+    pIn = pIn1;
+
+    blkCntVector = nbVectors & 3;
+    while (blkCntVector > 0) 
+    {
+        f16x8_t         inV, outV;
+
+        pOut = out;
+        w = *pW++;
+        accum += (_Float16)w;
+
+        blkCntSample = vecDim >> 3;
+        while (blkCntSample > 0) 
+        {
+            outV = vld1q_f16(pOut);
+            inV = vld1q_f16(pIn);
+            outV = vfmaq(outV, inV, w);
+            vst1q_f16(pOut, outV);
+            pOut += 8;
+            pIn += 8;
+
+            blkCntSample--;
+        }
+
+        blkCntSample = vecDim & 7;
+        while (blkCntSample > 0) 
+        {
+            *pOut = (_Float16)*pOut + (_Float16)*pIn++ * (_Float16)w;
+            pOut++;
+            blkCntSample--;
+        }
+
+        blkCntVector--;
+    }
+
+    /* Normalize */
+    pOut = out;
+    accum = 1.0f16 / (_Float16)accum;
+
+    blkCntSample = vecDim >> 3;
+    while (blkCntSample > 0) 
+    {
+        f16x8_t         tmp;
+
+        tmp = vld1q((const float16_t *) pOut);
+        tmp = vmulq(tmp, accum);
+        vst1q(pOut, tmp);
+        pOut += 8;
+        blkCntSample--;
+    }
+
+    blkCntSample = vecDim & 7;
+    while (blkCntSample > 0) 
+    {
+        *pOut = (_Float16)*pOut * (_Float16)accum;
+        pOut++;
+        blkCntSample--;
+    }
+}
+#else
+void arm_barycenter_f16(const float16_t *in, const float16_t *weights, float16_t *out, uint32_t nbVectors,uint32_t vecDim)
+{
+
+   const float16_t *pIn,*pW;
+   float16_t *pOut;
+   uint32_t blkCntVector,blkCntSample;
+   float16_t accum, w;
+
+   blkCntVector = nbVectors;
+   blkCntSample = vecDim;
+
+   accum = 0.0f16;
+
+   pW = weights;
+   pIn = in;
+
+   /* Set counters to 0 */
+   blkCntSample = vecDim;
+   pOut = out;
+
+   while(blkCntSample > 0)
+   {
+         *pOut = 0.0f16;
+         pOut++;
+         blkCntSample--;
+   }
+
+   /* Sum */
+   while(blkCntVector > 0)
+   {
+      pOut = out;
+      w = *pW++;
+      accum += (_Float16)w;
+
+      blkCntSample = vecDim;
+      while(blkCntSample > 0)
+      {
+          *pOut = (_Float16)*pOut + (_Float16)*pIn++ * (_Float16)w;
+          pOut++;
+          blkCntSample--;
+      }
+
+      blkCntVector--;
+   }
+
+   /* Normalize */
+   blkCntSample = vecDim;
+   pOut = out;
+
+   while(blkCntSample > 0)
+   {
+         *pOut = (_Float16)*pOut / (_Float16)accum;
+         pOut++;
+         blkCntSample--;
+   }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of barycenter group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f32.c
new file mode 100755
index 00000000..817bb588
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_barycenter_f32.c
@@ -0,0 +1,414 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_barycenter_f32.c
+ * Description:  Barycenter
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+#include <limits.h>
+#include <math.h>
+
+
+/**
+  @ingroup barycenter
+ */
+
+
+/**
+ * @brief Barycenter
+ *
+ *
+ * @param[in]    *in         List of vectors
+ * @param[in]    *weights    Weights of the vectors
+ * @param[out]   *out        Barycenter
+ * @param[in]    nbVectors   Number of vectors
+ * @param[in]    vecDim      Dimension of space (vector dimension)
+ * @return       None
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_barycenter_f32(const float32_t *in, 
+  const float32_t *weights, 
+  float32_t *out, 
+  uint32_t nbVectors,
+  uint32_t vecDim)
+{
+    const float32_t *pIn, *pW;
+    const float32_t *pIn1, *pIn2, *pIn3, *pIn4;
+    float32_t      *pOut;
+    uint32_t        blkCntVector, blkCntSample;
+    float32_t       accum, w;
+
+    blkCntVector = nbVectors;
+    blkCntSample = vecDim;
+
+    accum = 0.0f;
+
+    pW = weights;
+    pIn = in;
+
+
+    arm_fill_f32(0.0f, out, vecDim);
+
+
+    /* Sum */
+    pIn1 = pIn;
+    pIn2 = pIn1 + vecDim;
+    pIn3 = pIn2 + vecDim;
+    pIn4 = pIn3 + vecDim;
+
+    blkCntVector = nbVectors >> 2;
+    while (blkCntVector > 0) 
+    {
+        f32x4_t         outV, inV1, inV2, inV3, inV4;
+        float32_t       w1, w2, w3, w4;
+
+        pOut = out;
+        w1 = *pW++;
+        w2 = *pW++;
+        w3 = *pW++;
+        w4 = *pW++;
+        accum += w1 + w2 + w3 + w4;
+
+        blkCntSample = vecDim >> 2;
+        while (blkCntSample > 0) {
+            outV = vld1q((const float32_t *) pOut);
+            inV1 = vld1q(pIn1);
+            inV2 = vld1q(pIn2);
+            inV3 = vld1q(pIn3);
+            inV4 = vld1q(pIn4);
+            outV = vfmaq(outV, inV1, w1);
+            outV = vfmaq(outV, inV2, w2);
+            outV = vfmaq(outV, inV3, w3);
+            outV = vfmaq(outV, inV4, w4);
+            vst1q(pOut, outV);
+
+            pOut += 4;
+            pIn1 += 4;
+            pIn2 += 4;
+            pIn3 += 4;
+            pIn4 += 4;
+
+            blkCntSample--;
+        }
+
+        blkCntSample = vecDim & 3;
+        while (blkCntSample > 0) {
+            *pOut = *pOut + *pIn1++ * w1;
+            *pOut = *pOut + *pIn2++ * w2;
+            *pOut = *pOut + *pIn3++ * w3;
+            *pOut = *pOut + *pIn4++ * w4;
+            pOut++;
+            blkCntSample--;
+        }
+
+        pIn1 += 3 * vecDim;
+        pIn2 += 3 * vecDim;
+        pIn3 += 3 * vecDim;
+        pIn4 += 3 * vecDim;
+
+        blkCntVector--;
+    }
+
+    pIn = pIn1;
+
+    blkCntVector = nbVectors & 3;
+    while (blkCntVector > 0) 
+    {
+        f32x4_t         inV, outV;
+
+        pOut = out;
+        w = *pW++;
+        accum += w;
+
+        blkCntSample = vecDim >> 2;
+        while (blkCntSample > 0) 
+        {
+            outV = vld1q_f32(pOut);
+            inV = vld1q_f32(pIn);
+            outV = vfmaq(outV, inV, w);
+            vst1q_f32(pOut, outV);
+            pOut += 4;
+            pIn += 4;
+
+            blkCntSample--;
+        }
+
+        blkCntSample = vecDim & 3;
+        while (blkCntSample > 0) 
+        {
+            *pOut = *pOut + *pIn++ * w;
+            pOut++;
+            blkCntSample--;
+        }
+
+        blkCntVector--;
+    }
+
+    /* Normalize */
+    pOut = out;
+    accum = 1.0f / accum;
+
+    blkCntSample = vecDim >> 2;
+    while (blkCntSample > 0) 
+    {
+        f32x4_t         tmp;
+
+        tmp = vld1q((const float32_t *) pOut);
+        tmp = vmulq(tmp, accum);
+        vst1q(pOut, tmp);
+        pOut += 4;
+        blkCntSample--;
+    }
+
+    blkCntSample = vecDim & 3;
+    while (blkCntSample > 0) 
+    {
+        *pOut = *pOut * accum;
+        pOut++;
+        blkCntSample--;
+    }
+}
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+void arm_barycenter_f32(const float32_t *in, const float32_t *weights, float32_t *out, uint32_t nbVectors,uint32_t vecDim)
+{
+
+   const float32_t *pIn,*pW, *pIn1, *pIn2, *pIn3, *pIn4;
+   float32_t *pOut;
+   uint32_t blkCntVector,blkCntSample;
+   float32_t accum, w,w1,w2,w3,w4;
+
+   float32x4_t tmp, inV,outV, inV1, inV2, inV3, inV4;
+
+   blkCntVector = nbVectors;
+   blkCntSample = vecDim;
+
+   accum = 0.0f;
+
+   pW = weights;
+   pIn = in;
+
+   /* Set counters to 0 */
+   tmp = vdupq_n_f32(0.0f);
+   pOut = out;
+
+   blkCntSample = vecDim >> 2;
+   while(blkCntSample > 0)
+   {
+         vst1q_f32(pOut, tmp);
+         pOut += 4;
+         blkCntSample--;
+   }
+
+   blkCntSample = vecDim & 3;
+   while(blkCntSample > 0)
+   {
+         *pOut = 0.0f;
+         pOut++;
+         blkCntSample--;
+   }
+
+   /* Sum */
+  
+   pIn1 = pIn;
+   pIn2 = pIn1 + vecDim;
+   pIn3 = pIn2 + vecDim;
+   pIn4 = pIn3 + vecDim;
+   
+   blkCntVector = nbVectors >> 2;
+   while(blkCntVector > 0)
+   {
+      pOut = out;
+      w1 = *pW++;
+      w2 = *pW++;
+      w3 = *pW++;
+      w4 = *pW++;
+      accum += w1 + w2 + w3 + w4;
+
+      blkCntSample = vecDim >> 2;
+      while(blkCntSample > 0)
+      {
+          outV = vld1q_f32(pOut);
+          inV1 = vld1q_f32(pIn1);
+          inV2 = vld1q_f32(pIn2);
+          inV3 = vld1q_f32(pIn3);
+          inV4 = vld1q_f32(pIn4);
+          outV = vmlaq_n_f32(outV,inV1,w1);
+          outV = vmlaq_n_f32(outV,inV2,w2);
+          outV = vmlaq_n_f32(outV,inV3,w3);
+          outV = vmlaq_n_f32(outV,inV4,w4);
+          vst1q_f32(pOut, outV);
+          pOut += 4;
+          pIn1 += 4;
+          pIn2 += 4;
+          pIn3 += 4;
+          pIn4 += 4;
+
+          blkCntSample--;
+      }
+
+      blkCntSample = vecDim & 3;
+      while(blkCntSample > 0)
+      {
+          *pOut = *pOut + *pIn1++ * w1;
+          *pOut = *pOut + *pIn2++ * w2;
+          *pOut = *pOut + *pIn3++ * w3;
+          *pOut = *pOut + *pIn4++ * w4;
+          pOut++;
+          blkCntSample--;
+      }
+
+      pIn1 += 3*vecDim;
+      pIn2 += 3*vecDim;
+      pIn3 += 3*vecDim;
+      pIn4 += 3*vecDim;
+
+      blkCntVector--;
+   }
+
+   pIn = pIn1;
+
+   blkCntVector = nbVectors & 3;
+   while(blkCntVector > 0)
+   {
+      pOut = out;
+      w = *pW++;
+      accum += w;
+
+      blkCntSample = vecDim >> 2;
+      while(blkCntSample > 0)
+      {
+          outV = vld1q_f32(pOut);
+          inV = vld1q_f32(pIn);
+          outV = vmlaq_n_f32(outV,inV,w);
+          vst1q_f32(pOut, outV);
+          pOut += 4;
+          pIn += 4;
+
+          blkCntSample--;
+      }
+      
+      blkCntSample = vecDim & 3;
+      while(blkCntSample > 0)
+      {
+          *pOut = *pOut + *pIn++ * w;
+          pOut++;
+          blkCntSample--;
+      }
+
+      blkCntVector--;
+   }
+
+   /* Normalize */
+   pOut = out;
+   accum = 1.0f / accum;
+
+   blkCntSample = vecDim >> 2;
+   while(blkCntSample > 0)
+   {
+         tmp = vld1q_f32(pOut);
+         tmp = vmulq_n_f32(tmp,accum);
+         vst1q_f32(pOut, tmp);
+         pOut += 4;
+         blkCntSample--;
+   }
+
+   blkCntSample = vecDim & 3;
+   while(blkCntSample > 0)
+   {
+         *pOut = *pOut * accum;
+         pOut++;
+         blkCntSample--;
+   }
+
+}
+#else
+void arm_barycenter_f32(const float32_t *in, const float32_t *weights, float32_t *out, uint32_t nbVectors,uint32_t vecDim)
+{
+
+   const float32_t *pIn,*pW;
+   float32_t *pOut;
+   uint32_t blkCntVector,blkCntSample;
+   float32_t accum, w;
+
+   blkCntVector = nbVectors;
+   blkCntSample = vecDim;
+
+   accum = 0.0f;
+
+   pW = weights;
+   pIn = in;
+
+   /* Set counters to 0 */
+   blkCntSample = vecDim;
+   pOut = out;
+
+   while(blkCntSample > 0)
+   {
+         *pOut = 0.0f;
+         pOut++;
+         blkCntSample--;
+   }
+
+   /* Sum */
+   while(blkCntVector > 0)
+   {
+      pOut = out;
+      w = *pW++;
+      accum += w;
+
+      blkCntSample = vecDim;
+      while(blkCntSample > 0)
+      {
+          *pOut = *pOut + *pIn++ * w;
+          pOut++;
+          blkCntSample--;
+      }
+
+      blkCntVector--;
+   }
+
+   /* Normalize */
+   blkCntSample = vecDim;
+   pOut = out;
+
+   while(blkCntSample > 0)
+   {
+         *pOut = *pOut / accum;
+         pOut++;
+         blkCntSample--;
+   }
+
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of barycenter group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_bitonic_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_bitonic_sort_f32.c
new file mode 100644
index 00000000..e9612b1b
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_bitonic_sort_f32.c
@@ -0,0 +1,1039 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bitonic_sort_f32.c
+ * Description:  Floating point bitonic sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+#include "arm_sorting.h"
+
+
+#if !defined(ARM_MATH_NEON)
+
+static void arm_bitonic_sort_core_f32(float32_t *pSrc, uint32_t n, uint8_t dir)
+{
+    uint32_t step;
+    uint32_t k, j;
+    float32_t *leftPtr, *rightPtr;
+    float32_t temp;
+
+    step = n>>1;
+    leftPtr = pSrc;
+    rightPtr = pSrc+n-1;
+
+    for(k=0; k<step; k++)
+    {
+	if(dir == (*leftPtr > *rightPtr))
+	{
+            // Swap
+	    temp=*leftPtr;
+	    *leftPtr=*rightPtr;
+	    *rightPtr=temp;
+	}
+
+	leftPtr++;  // Move right
+	rightPtr--; // Move left
+    }
+
+    // Merge
+    for(step=(n>>2); step>0; step/=2)
+    {
+	for(j=0; j<n; j=j+step*2)
+	{
+	    leftPtr  = pSrc+j;
+	    rightPtr = pSrc+j+step;
+
+	    for(k=0; k<step; k++)
+	    {
+		if(*leftPtr > *rightPtr)
+		{
+		    // Swap
+	    	    temp=*leftPtr;
+		    *leftPtr=*rightPtr;
+		    *rightPtr=temp;
+		}
+
+		leftPtr++;
+		rightPtr++;
+	    }
+	}
+    }
+}
+#endif
+
+#if defined(ARM_MATH_NEON)
+
+
+static float32x4x2_t arm_bitonic_resort_8_f32(float32x4_t a, float32x4_t b, uint8_t dir)
+{
+    /* Start with two vectors:
+     * +---+---+---+---+
+     * | a | b | c | d |
+     * +---+---+---+---+
+     * +---+---+---+---+
+     * | e | f | g | h |
+     * +---+---+---+---+
+     * All the elements of the first are guaranteed to be less than or equal to
+     * all of the elements in the second, and both vectors are bitonic.
+     * We need to perform these operations to completely sort both lists:
+     * vminmax([abcd],[efgh]) 
+     * vminmax([acbd],[egfh]) 
+     */
+    vtrn128_64q(a, b);
+    /* +---+---+---+---+
+     * | a | b | e | f |
+     * +---+---+---+---+
+     * +---+---+---+---+
+     * | c | d | g | h |
+     * +---+---+---+---+
+     */
+    if(dir)
+        vminmaxq(a, b);
+    else
+        vminmaxq(b, a);
+    
+    vtrn128_32q(a, b);
+    /* +---+---+---+---+
+     * | a | c | e | g |
+     * +---+---+---+---+
+     * +---+---+---+---+
+     * | b | d | f | h |
+     * +---+---+---+---+
+     */
+    if(dir)
+        vminmaxq(a, b);
+    else
+        vminmaxq(b, a);
+    
+    return vzipq_f32(a, b);
+}
+
+
+static float32x4x2_t arm_bitonic_merge_8_f32(float32x4_t a, float32x4_t b, uint8_t dir)
+{
+    /* a and b are guaranteed to be bitonic */
+    // Reverse the element of the second vector
+    b = vrev128q_f32(b);
+
+    // Compare the two vectors
+    if(dir)
+        vminmaxq(a, b);
+    else
+    vminmaxq(b, a);
+
+    // Merge the two vectors
+    float32x4x2_t ab = arm_bitonic_resort_8_f32(a, b, dir);
+
+    return ab;
+}
+
+static void arm_bitonic_resort_16_f32(float32_t * pOut, float32x4x2_t a, float32x4x2_t b, uint8_t dir)
+{
+    /* Start with two vectors:
+     * +---+---+---+---+---+---+---+---+
+     * | a | b | c | d | e | f | g | h |
+     * +---+---+---+---+---+---+---+---+
+     * +---+---+---+---+---+---+---+---+
+     * | i | j | k | l | m | n | o | p |
+     * +---+---+---+---+---+---+---+---+
+     * All the elements of the first are guaranteed to be less than or equal to
+     * all of the elements in the second, and both vectors are bitonic.
+     * We need to perform these operations to completely sort both lists:
+     * vminmax([abcd],[efgh]) vminmax([ijkl],[mnop])
+     * vminmax([abef],[cdgh]) vminmax([ijmn],[klop])
+     * vminmax([acef],[bdfh]) vminmax([ikmo],[jlmp])
+     */
+
+    vtrn256_128q(a, b);
+    /* +---+---+---+---+---+---+---+---+
+     * | a | b | c | d | i | j | k | l |
+     * +---+---+---+---+---+---+---+---+
+     * +---+---+---+---+---+---+---+---+
+     * | e | f | g | h | m | n | o | p |
+     * +---+---+---+---+---+---+---+---+
+     */
+    if(dir)
+        vminmax256q(a, b);
+    else
+        vminmax256q(b, a);
+    
+    vtrn256_64q(a, b);
+    
+    /* +---+---+---+---+---+---+---+---+
+     * | a | b | e | f | i | j | m | n |
+     * +---+---+---+---+---+---+---+---+
+     * +---+---+---+---+---+---+---+---+
+     * | c | d | g | h | k | l | o | p |
+     * +---+---+---+---+---+---+---+---+
+     */
+    if(dir)
+        vminmax256q(a, b);
+    else
+        vminmax256q(b, a);
+    
+    vtrn256_32q(a, b);
+    /* We now have:
+     * +---+---+---+---+---+---+---+---+
+     * | a | c | e | g | i | k | m | o |
+     * +---+---+---+---+---+---+---+---+
+     * +---+---+---+---+---+---+---+---+
+     * | b | d | f | h | j | l | n | p |
+     * +---+---+---+---+---+---+---+---+
+     */
+    if(dir)
+        vminmax256q(a, b);
+    else
+        vminmax256q(b, a);
+    
+    float32x4x2_t out1 = vzipq_f32(a.val[0], b.val[0]);
+    float32x4x2_t out2 = vzipq_f32(a.val[1], b.val[1]);
+    
+    vst1q_f32(pOut, out1.val[0]);
+    vst1q_f32(pOut+4, out1.val[1]);
+    vst1q_f32(pOut+8, out2.val[0]);
+    vst1q_f32(pOut+12, out2.val[1]);
+} 
+
+static void arm_bitonic_merge_16_f32(float32_t * pOut, float32x4x2_t a, float32x4x2_t b, uint8_t dir)
+{
+    // Merge two preordered float32x4x2_t
+    vrev256q_f32(b);
+
+    if(dir)
+        vminmax256q(a, b);
+    else
+        vminmax256q(b, a);
+
+    arm_bitonic_resort_16_f32(pOut, a, b, dir);
+}
+
+static void arm_bitonic_sort_16_f32(float32_t *pSrc, float32_t *pDst, uint8_t dir)
+{
+    float32x4_t a;
+    float32x4_t b;
+    float32x4_t c;
+    float32x4_t d;
+
+    // Load 16 samples
+    a = vld1q_f32(pSrc);
+    b = vld1q_f32(pSrc+4);
+    c = vld1q_f32(pSrc+8); 
+    d = vld1q_f32(pSrc+12);
+    
+    // Bitonic sorting network for 4 samples x 4 times
+    if(dir)
+    {
+        vminmaxq(a, b);
+        vminmaxq(c, d);
+        
+        vminmaxq(a, d);
+        vminmaxq(b, c);
+        
+        vminmaxq(a, b);
+        vminmaxq(c, d);
+    }
+    else
+    {
+        vminmaxq(b, a);
+        vminmaxq(d, c);
+        
+        vminmaxq(d, a);
+        vminmaxq(c, b);
+        
+        vminmaxq(b, a);
+        vminmaxq(d, c);
+    }
+
+    float32x4x2_t ab = vtrnq_f32 (a, b);
+    float32x4x2_t cd = vtrnq_f32 (c, d);
+    
+    // Transpose 4 ordered arrays of 4 samples
+    a = vcombine_f32(vget_low_f32(ab.val[0]), vget_low_f32(cd.val[0]));
+    b = vcombine_f32(vget_low_f32(ab.val[1]), vget_low_f32(cd.val[1]));
+    c = vcombine_f32(vget_high_f32(ab.val[0]), vget_high_f32(cd.val[0]));
+    d = vcombine_f32(vget_high_f32(ab.val[1]), vget_high_f32(cd.val[1]));
+
+    // Merge pairs of arrays of 4 samples
+    ab = arm_bitonic_merge_8_f32(a, b, dir);
+    cd = arm_bitonic_merge_8_f32(c, d, dir);
+    
+    // Merge arrays of 8 samples
+    arm_bitonic_merge_16_f32(pDst, ab, cd, dir);
+}
+
+
+
+
+
+static void arm_bitonic_merge_32_f32(float32_t * pSrc, float32x4x2_t ab1, float32x4x2_t ab2, float32x4x2_t cd1, float32x4x2_t cd2, uint8_t dir)
+{
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1, cd1);
+        vminmax256q(ab2, cd2);
+    }
+    else
+    {
+        vminmax256q(cd1, ab1);
+        vminmax256q(cd2, ab2);
+    }
+    //Transpose 256
+    float32x4_t temp;
+
+    temp = ab2.val[0];
+    ab2.val[0] = cd1.val[0];
+    cd1.val[0] = temp;
+    temp = ab2.val[1];
+    ab2.val[1] = cd1.val[1];
+    cd1.val[1] = temp;
+
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1, cd1);
+        vminmax256q(ab2, cd2);
+    }
+    else
+    {
+        vminmax256q(cd1, ab1);
+        vminmax256q(cd2, ab2);
+    }
+    
+    //Transpose 128
+    arm_bitonic_merge_16_f32(pSrc+0,  ab1, cd1, dir);
+    arm_bitonic_merge_16_f32(pSrc+16, ab2, cd2, dir);
+}
+
+static void arm_bitonic_merge_64_f32(float32_t * pSrc, uint8_t dir)
+{
+    float32x4x2_t ab1, ab2, ab3, ab4;
+    float32x4x2_t cd1, cd2, cd3, cd4;
+
+    //Load and reverse second array
+    ab1.val[0] = vld1q_f32(pSrc+0 );
+    ab1.val[1] = vld1q_f32(pSrc+4 );
+    ab2.val[0] = vld1q_f32(pSrc+8 ); 
+    ab2.val[1] = vld1q_f32(pSrc+12);
+    ab3.val[0] = vld1q_f32(pSrc+16);
+    ab3.val[1] = vld1q_f32(pSrc+20);
+    ab4.val[0] = vld1q_f32(pSrc+24); 
+    ab4.val[1] = vld1q_f32(pSrc+28);
+
+    vldrev128q_f32(cd4.val[1], pSrc+32);
+    vldrev128q_f32(cd4.val[0], pSrc+36);
+    vldrev128q_f32(cd3.val[1], pSrc+40);
+    vldrev128q_f32(cd3.val[0], pSrc+44);
+    vldrev128q_f32(cd2.val[1], pSrc+48);
+    vldrev128q_f32(cd2.val[0], pSrc+52);
+    vldrev128q_f32(cd1.val[1], pSrc+56);
+    vldrev128q_f32(cd1.val[0], pSrc+60);
+    
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1, cd1);
+        vminmax256q(ab2, cd2);
+        vminmax256q(ab3, cd3);
+        vminmax256q(ab4, cd4);
+    }
+    else
+    {
+        vminmax256q(cd1, ab1);
+        vminmax256q(cd2, ab2);
+        vminmax256q(cd3, ab3);
+        vminmax256q(cd4, ab4);
+    }
+
+    //Transpose 512
+    float32x4_t temp;
+
+    temp = ab3.val[0];
+    ab3.val[0] = cd1.val[0];
+    cd1.val[0] = temp;
+    temp = ab3.val[1];
+    ab3.val[1] = cd1.val[1];
+    cd1.val[1] = temp;
+    temp = ab4.val[0];
+    ab4.val[0] = cd2.val[0];
+    cd2.val[0] = temp;
+    temp = ab4.val[1];
+    ab4.val[1] = cd2.val[1];
+    cd2.val[1] = temp;
+
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1, cd1);
+        vminmax256q(ab2, cd2);
+        vminmax256q(ab3, cd3);
+        vminmax256q(ab4, cd4);
+    }
+    else
+    {
+        vminmax256q(cd1, ab1);
+        vminmax256q(cd2, ab2);
+        vminmax256q(cd3, ab3);
+        vminmax256q(cd4, ab4);
+    }
+    
+    //Transpose 256
+    arm_bitonic_merge_32_f32(pSrc+0,  ab1, ab2, cd1, cd2, dir);
+    arm_bitonic_merge_32_f32(pSrc+32, ab3, ab4, cd3, cd4, dir);
+}
+
+static void arm_bitonic_merge_128_f32(float32_t * pSrc, uint8_t dir)
+{
+    float32x4x2_t ab1, ab2, ab3, ab4, ab5, ab6, ab7, ab8;
+    float32x4x2_t cd1, cd2, cd3, cd4, cd5, cd6, cd7, cd8;
+
+    //Load and reverse second array
+    ab1.val[0] = vld1q_f32(pSrc+0 );
+    ab1.val[1] = vld1q_f32(pSrc+4 );
+    ab2.val[0] = vld1q_f32(pSrc+8 ); 
+    ab2.val[1] = vld1q_f32(pSrc+12);
+    ab3.val[0] = vld1q_f32(pSrc+16);
+    ab3.val[1] = vld1q_f32(pSrc+20);
+    ab4.val[0] = vld1q_f32(pSrc+24); 
+    ab4.val[1] = vld1q_f32(pSrc+28);
+    ab5.val[0] = vld1q_f32(pSrc+32);
+    ab5.val[1] = vld1q_f32(pSrc+36);
+    ab6.val[0] = vld1q_f32(pSrc+40); 
+    ab6.val[1] = vld1q_f32(pSrc+44);
+    ab7.val[0] = vld1q_f32(pSrc+48);
+    ab7.val[1] = vld1q_f32(pSrc+52);
+    ab8.val[0] = vld1q_f32(pSrc+56); 
+    ab8.val[1] = vld1q_f32(pSrc+60);
+
+    vldrev128q_f32(cd8.val[1], pSrc+64);
+    vldrev128q_f32(cd8.val[0], pSrc+68);
+    vldrev128q_f32(cd7.val[1], pSrc+72);
+    vldrev128q_f32(cd7.val[0], pSrc+76);
+    vldrev128q_f32(cd6.val[1], pSrc+80);
+    vldrev128q_f32(cd6.val[0], pSrc+84);
+    vldrev128q_f32(cd5.val[1], pSrc+88);
+    vldrev128q_f32(cd5.val[0], pSrc+92);
+    vldrev128q_f32(cd4.val[1], pSrc+96);
+    vldrev128q_f32(cd4.val[0], pSrc+100);
+    vldrev128q_f32(cd3.val[1], pSrc+104);
+    vldrev128q_f32(cd3.val[0], pSrc+108);
+    vldrev128q_f32(cd2.val[1], pSrc+112);
+    vldrev128q_f32(cd2.val[0], pSrc+116);
+    vldrev128q_f32(cd1.val[1], pSrc+120);
+    vldrev128q_f32(cd1.val[0], pSrc+124);
+    
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1, cd1);
+        vminmax256q(ab2, cd2);
+        vminmax256q(ab3, cd3);
+        vminmax256q(ab4, cd4);
+        vminmax256q(ab5, cd5);
+        vminmax256q(ab6, cd6);
+        vminmax256q(ab7, cd7);
+        vminmax256q(ab8, cd8);
+    }
+    else
+    {
+        vminmax256q(cd1, ab1);
+        vminmax256q(cd2, ab2);
+        vminmax256q(cd3, ab3);
+        vminmax256q(cd4, ab4);
+        vminmax256q(cd5, ab5);
+        vminmax256q(cd6, ab6);
+        vminmax256q(cd7, ab7);
+        vminmax256q(cd8, ab8);
+    }
+    
+    //Transpose
+    float32x4_t temp;
+
+    temp = ab5.val[0];
+    ab5.val[0] = cd1.val[0];
+    cd1.val[0] = temp;
+    temp = ab5.val[1];
+    ab5.val[1] = cd1.val[1];
+    cd1.val[1] = temp;
+    temp = ab6.val[0];
+    ab6.val[0] = cd2.val[0];
+    cd2.val[0] = temp;
+    temp = ab6.val[1];
+    ab6.val[1] = cd2.val[1];
+    cd2.val[1] = temp;
+    temp = ab7.val[0];
+    ab7.val[0] = cd3.val[0];
+    cd3.val[0] = temp;
+    temp = ab7.val[1];
+    ab7.val[1] = cd3.val[1];
+    cd3.val[1] = temp;
+    temp = ab8.val[0];
+    ab8.val[0] = cd4.val[0];
+    cd4.val[0] = temp;
+    temp = ab8.val[1];
+    ab8.val[1] = cd4.val[1];
+    cd4.val[1] = temp;
+
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1, cd1);
+        vminmax256q(ab2, cd2);
+        vminmax256q(ab3, cd3);
+        vminmax256q(ab4, cd4);
+        vminmax256q(ab5, cd5);
+        vminmax256q(ab6, cd6);
+        vminmax256q(ab7, cd7);
+        vminmax256q(ab8, cd8);
+    }
+    else
+    {
+        vminmax256q(cd1, ab1);
+        vminmax256q(cd2, ab2);
+        vminmax256q(cd3, ab3);
+        vminmax256q(cd4, ab4);
+        vminmax256q(cd5, ab5);
+        vminmax256q(cd6, ab6);
+        vminmax256q(cd7, ab7);
+        vminmax256q(cd8, ab8);
+    }
+
+    vst1q_f32(pSrc,     ab1.val[0]);
+    vst1q_f32(pSrc+4,   ab1.val[1]);
+    vst1q_f32(pSrc+8,   ab2.val[0]);
+    vst1q_f32(pSrc+12,  ab2.val[1]);
+    vst1q_f32(pSrc+16,  ab3.val[0]);
+    vst1q_f32(pSrc+20,  ab3.val[1]);
+    vst1q_f32(pSrc+24,  ab4.val[0]);
+    vst1q_f32(pSrc+28,  ab4.val[1]);
+    vst1q_f32(pSrc+32,  cd1.val[0]);
+    vst1q_f32(pSrc+36,  cd1.val[1]);
+    vst1q_f32(pSrc+40,  cd2.val[0]);
+    vst1q_f32(pSrc+44,  cd2.val[1]);
+    vst1q_f32(pSrc+48,  cd3.val[0]);
+    vst1q_f32(pSrc+52,  cd3.val[1]);
+    vst1q_f32(pSrc+56,  cd4.val[0]);
+    vst1q_f32(pSrc+60,  cd4.val[1]);
+    vst1q_f32(pSrc+64,  ab5.val[0]);
+    vst1q_f32(pSrc+68,  ab5.val[1]);
+    vst1q_f32(pSrc+72,  ab6.val[0]);
+    vst1q_f32(pSrc+76,  ab6.val[1]);
+    vst1q_f32(pSrc+80,  ab7.val[0]);
+    vst1q_f32(pSrc+84,  ab7.val[1]);
+    vst1q_f32(pSrc+88,  ab8.val[0]);
+    vst1q_f32(pSrc+92,  ab8.val[1]);
+    vst1q_f32(pSrc+96,  cd5.val[0]);
+    vst1q_f32(pSrc+100, cd5.val[1]);
+    vst1q_f32(pSrc+104, cd6.val[0]);
+    vst1q_f32(pSrc+108, cd6.val[1]);
+    vst1q_f32(pSrc+112, cd7.val[0]);
+    vst1q_f32(pSrc+116, cd7.val[1]);
+    vst1q_f32(pSrc+120, cd8.val[0]);
+    vst1q_f32(pSrc+124, cd8.val[1]);
+
+    //Transpose
+    arm_bitonic_merge_64_f32(pSrc+0 , dir);
+    arm_bitonic_merge_64_f32(pSrc+64, dir);
+}
+
+static void arm_bitonic_merge_256_f32(float32_t * pSrc, uint8_t dir)
+{
+    float32x4x2_t ab1, ab2, ab3, ab4, ab5, ab6, ab7, ab8;
+    float32x4x2_t ab9, ab10, ab11, ab12, ab13, ab14, ab15, ab16;
+    float32x4x2_t cd1, cd2, cd3, cd4, cd5, cd6, cd7, cd8;
+    float32x4x2_t cd9, cd10, cd11, cd12, cd13, cd14, cd15, cd16;
+
+    //Load and reverse second array
+    ab1.val[0]  = vld1q_f32(pSrc+0  );
+    ab1.val[1]  = vld1q_f32(pSrc+4  );
+    ab2.val[0]  = vld1q_f32(pSrc+8  ); 
+    ab2.val[1]  = vld1q_f32(pSrc+12 );
+    ab3.val[0]  = vld1q_f32(pSrc+16 );
+    ab3.val[1]  = vld1q_f32(pSrc+20 );
+    ab4.val[0]  = vld1q_f32(pSrc+24 ); 
+    ab4.val[1]  = vld1q_f32(pSrc+28 );
+    ab5.val[0]  = vld1q_f32(pSrc+32 );
+    ab5.val[1]  = vld1q_f32(pSrc+36 );
+    ab6.val[0]  = vld1q_f32(pSrc+40 ); 
+    ab6.val[1]  = vld1q_f32(pSrc+44 );
+    ab7.val[0]  = vld1q_f32(pSrc+48 );
+    ab7.val[1]  = vld1q_f32(pSrc+52 );
+    ab8.val[0]  = vld1q_f32(pSrc+56 ); 
+    ab8.val[1]  = vld1q_f32(pSrc+60 );
+    ab9.val[0]  = vld1q_f32(pSrc+64 );
+    ab9.val[1]  = vld1q_f32(pSrc+68 );
+    ab10.val[0] = vld1q_f32(pSrc+72 ); 
+    ab10.val[1] = vld1q_f32(pSrc+76 );
+    ab11.val[0] = vld1q_f32(pSrc+80 );
+    ab11.val[1] = vld1q_f32(pSrc+84 );
+    ab12.val[0] = vld1q_f32(pSrc+88 ); 
+    ab12.val[1] = vld1q_f32(pSrc+92 );
+    ab13.val[0] = vld1q_f32(pSrc+96 );
+    ab13.val[1] = vld1q_f32(pSrc+100);
+    ab14.val[0] = vld1q_f32(pSrc+104); 
+    ab14.val[1] = vld1q_f32(pSrc+108);
+    ab15.val[0] = vld1q_f32(pSrc+112);
+    ab15.val[1] = vld1q_f32(pSrc+116);
+    ab16.val[0] = vld1q_f32(pSrc+120); 
+    ab16.val[1] = vld1q_f32(pSrc+124);
+
+    vldrev128q_f32(cd16.val[1], pSrc+128);
+    vldrev128q_f32(cd16.val[0], pSrc+132);
+    vldrev128q_f32(cd15.val[1], pSrc+136);
+    vldrev128q_f32(cd15.val[0], pSrc+140);
+    vldrev128q_f32(cd14.val[1], pSrc+144);
+    vldrev128q_f32(cd14.val[0], pSrc+148);
+    vldrev128q_f32(cd13.val[1], pSrc+152);
+    vldrev128q_f32(cd13.val[0], pSrc+156);
+    vldrev128q_f32(cd12.val[1], pSrc+160);
+    vldrev128q_f32(cd12.val[0], pSrc+164);
+    vldrev128q_f32(cd11.val[1], pSrc+168);
+    vldrev128q_f32(cd11.val[0], pSrc+172);
+    vldrev128q_f32(cd10.val[1], pSrc+176);
+    vldrev128q_f32(cd10.val[0], pSrc+180);
+    vldrev128q_f32(cd9.val[1] , pSrc+184);
+    vldrev128q_f32(cd9.val[0] , pSrc+188);
+    vldrev128q_f32(cd8.val[1] , pSrc+192);
+    vldrev128q_f32(cd8.val[0] , pSrc+196);
+    vldrev128q_f32(cd7.val[1] , pSrc+200);
+    vldrev128q_f32(cd7.val[0] , pSrc+204);
+    vldrev128q_f32(cd6.val[1] , pSrc+208);
+    vldrev128q_f32(cd6.val[0] , pSrc+212);
+    vldrev128q_f32(cd5.val[1] , pSrc+216);
+    vldrev128q_f32(cd5.val[0] , pSrc+220);
+    vldrev128q_f32(cd4.val[1] , pSrc+224);
+    vldrev128q_f32(cd4.val[0] , pSrc+228);
+    vldrev128q_f32(cd3.val[1] , pSrc+232);
+    vldrev128q_f32(cd3.val[0] , pSrc+236);
+    vldrev128q_f32(cd2.val[1] , pSrc+240);
+    vldrev128q_f32(cd2.val[0] , pSrc+244);
+    vldrev128q_f32(cd1.val[1] , pSrc+248);
+    vldrev128q_f32(cd1.val[0] , pSrc+252);
+    
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1 , cd1 );
+        vminmax256q(ab2 , cd2 );
+        vminmax256q(ab3 , cd3 );
+        vminmax256q(ab4 , cd4 );
+        vminmax256q(ab5 , cd5 );
+        vminmax256q(ab6 , cd6 );
+        vminmax256q(ab7 , cd7 );
+        vminmax256q(ab8 , cd8 );
+        vminmax256q(ab9 , cd9 );
+        vminmax256q(ab10, cd10);
+        vminmax256q(ab11, cd11);
+        vminmax256q(ab12, cd12);
+        vminmax256q(ab13, cd13);
+        vminmax256q(ab14, cd14);
+        vminmax256q(ab15, cd15);
+        vminmax256q(ab16, cd16);
+    }
+    else
+    {
+        vminmax256q(cd1 , ab1 );
+        vminmax256q(cd2 , ab2 );
+        vminmax256q(cd3 , ab3 );
+        vminmax256q(cd4 , ab4 );
+        vminmax256q(cd5 , ab5 );
+        vminmax256q(cd6 , ab6 );
+        vminmax256q(cd7 , ab7 );
+        vminmax256q(cd8 , ab8 );
+        vminmax256q(cd9 , ab9 );
+        vminmax256q(cd10, ab10);
+        vminmax256q(cd11, ab11);
+        vminmax256q(cd12, ab12);
+        vminmax256q(cd13, ab13);
+        vminmax256q(cd14, ab14);
+        vminmax256q(cd15, ab15);
+        vminmax256q(cd16, ab16);
+    }
+
+    //Transpose
+    float32x4_t temp;
+
+    temp = ab9.val[0];
+    ab9.val[0] = cd1.val[0];
+    cd1.val[0] = temp;
+    temp = ab9.val[1];
+    ab9.val[1] = cd1.val[1];
+    cd1.val[1] = temp;
+    temp = ab10.val[0];
+    ab10.val[0] = cd2.val[0];
+    cd2.val[0] = temp;
+    temp = ab10.val[1];
+    ab10.val[1] = cd2.val[1];
+    cd2.val[1] = temp;
+    temp = ab11.val[0];
+    ab11.val[0] = cd3.val[0];
+    cd3.val[0] = temp;
+    temp = ab11.val[1];
+    ab11.val[1] = cd3.val[1];
+    cd3.val[1] = temp;
+    temp = ab12.val[0];
+    ab12.val[0] = cd4.val[0];
+    cd4.val[0] = temp;
+    temp = ab12.val[1];
+    ab12.val[1] = cd4.val[1];
+    cd4.val[1] = temp;
+    temp = ab13.val[0];
+    ab13.val[0] = cd5.val[0];
+    cd5.val[0] = temp;
+    temp = ab13.val[1];
+    ab13.val[1] = cd5.val[1];
+    cd5.val[1] = temp;
+    temp = ab14.val[0];
+    ab14.val[0] = cd6.val[0];
+    cd6.val[0] = temp;
+    temp = ab14.val[1];
+    ab14.val[1] = cd6.val[1];
+    cd6.val[1] = temp;
+    temp = ab15.val[0];
+    ab15.val[0] = cd7.val[0];
+    cd7.val[0] = temp;
+    temp = ab15.val[1];
+    ab15.val[1] = cd7.val[1];
+    cd7.val[1] = temp;
+    temp = ab16.val[0];
+    ab16.val[0] = cd8.val[0];
+    cd8.val[0] = temp;
+    temp = ab16.val[1];
+    ab16.val[1] = cd8.val[1];
+    cd8.val[1] = temp;
+
+    //Compare
+    if(dir)
+    {
+        vminmax256q(ab1 , cd1 );
+        vminmax256q(ab2 , cd2 );
+        vminmax256q(ab3 , cd3 );
+        vminmax256q(ab4 , cd4 );
+        vminmax256q(ab5 , cd5 );
+        vminmax256q(ab6 , cd6 );
+        vminmax256q(ab7 , cd7 );
+        vminmax256q(ab8 , cd8 );
+        vminmax256q(ab9 , cd9 );
+        vminmax256q(ab10, cd10);
+        vminmax256q(ab11, cd11);
+        vminmax256q(ab12, cd12);
+        vminmax256q(ab13, cd13);
+        vminmax256q(ab14, cd14);
+        vminmax256q(ab15, cd15);
+        vminmax256q(ab16, cd16);
+    }
+    else
+    {
+        vminmax256q(cd1 , ab1 );
+        vminmax256q(cd2 , ab2 );
+        vminmax256q(cd3 , ab3 );
+        vminmax256q(cd4 , ab4 );
+        vminmax256q(cd5 , ab5 );
+        vminmax256q(cd6 , ab6 );
+        vminmax256q(cd7 , ab7 );
+        vminmax256q(cd8 , ab8 );
+        vminmax256q(cd9 , ab9 );
+        vminmax256q(cd10, ab10);
+        vminmax256q(cd11, ab11);
+        vminmax256q(cd12, ab12);
+        vminmax256q(cd13, ab13);
+        vminmax256q(cd14, ab14);
+        vminmax256q(cd15, ab15);
+        vminmax256q(cd16, ab16);
+    }
+
+    vst1q_f32(pSrc,     ab1.val[0] );
+    vst1q_f32(pSrc+4,   ab1.val[1] );
+    vst1q_f32(pSrc+8,   ab2.val[0] );
+    vst1q_f32(pSrc+12,  ab2.val[1] );
+    vst1q_f32(pSrc+16,  ab3.val[0] );
+    vst1q_f32(pSrc+20,  ab3.val[1] );
+    vst1q_f32(pSrc+24,  ab4.val[0] );
+    vst1q_f32(pSrc+28,  ab4.val[1] );
+    vst1q_f32(pSrc+32,  ab5.val[0] );
+    vst1q_f32(pSrc+36,  ab5.val[1] );
+    vst1q_f32(pSrc+40,  ab6.val[0] );
+    vst1q_f32(pSrc+44,  ab6.val[1] );
+    vst1q_f32(pSrc+48,  ab7.val[0] );
+    vst1q_f32(pSrc+52,  ab7.val[1] );
+    vst1q_f32(pSrc+56,  ab8.val[0] );
+    vst1q_f32(pSrc+60,  ab8.val[1] );
+    vst1q_f32(pSrc+64,  cd1.val[0] );
+    vst1q_f32(pSrc+68,  cd1.val[1] );
+    vst1q_f32(pSrc+72,  cd2.val[0] );
+    vst1q_f32(pSrc+76,  cd2.val[1] );
+    vst1q_f32(pSrc+80,  cd3.val[0] );
+    vst1q_f32(pSrc+84,  cd3.val[1] );
+    vst1q_f32(pSrc+88,  cd4.val[0] );
+    vst1q_f32(pSrc+92,  cd4.val[1] );
+    vst1q_f32(pSrc+96,  cd5.val[0] );
+    vst1q_f32(pSrc+100, cd5.val[1] );
+    vst1q_f32(pSrc+104, cd6.val[0] );
+    vst1q_f32(pSrc+108, cd6.val[1] );
+    vst1q_f32(pSrc+112, cd7.val[0] );
+    vst1q_f32(pSrc+116, cd7.val[1] );
+    vst1q_f32(pSrc+120, cd8.val[0] );
+    vst1q_f32(pSrc+124, cd8.val[1] );
+    vst1q_f32(pSrc+128, ab9.val[0] );
+    vst1q_f32(pSrc+132, ab9.val[1] );
+    vst1q_f32(pSrc+136, ab10.val[0]);
+    vst1q_f32(pSrc+140, ab10.val[1]);
+    vst1q_f32(pSrc+144, ab11.val[0]);
+    vst1q_f32(pSrc+148, ab11.val[1]);
+    vst1q_f32(pSrc+152, ab12.val[0]);
+    vst1q_f32(pSrc+156, ab12.val[1]);
+    vst1q_f32(pSrc+160, ab13.val[0]);
+    vst1q_f32(pSrc+164, ab13.val[1]);
+    vst1q_f32(pSrc+168, ab14.val[0]);
+    vst1q_f32(pSrc+172, ab14.val[1]);
+    vst1q_f32(pSrc+176, ab15.val[0]);
+    vst1q_f32(pSrc+180, ab15.val[1]);
+    vst1q_f32(pSrc+184, ab16.val[0]);
+    vst1q_f32(pSrc+188, ab16.val[1]);
+    vst1q_f32(pSrc+192, cd9.val[0] );
+    vst1q_f32(pSrc+196, cd9.val[1] );
+    vst1q_f32(pSrc+200, cd10.val[0]);
+    vst1q_f32(pSrc+204, cd10.val[1]);
+    vst1q_f32(pSrc+208, cd11.val[0]);
+    vst1q_f32(pSrc+212, cd11.val[1]);
+    vst1q_f32(pSrc+216, cd12.val[0]);
+    vst1q_f32(pSrc+220, cd12.val[1]);
+    vst1q_f32(pSrc+224, cd13.val[0]);
+    vst1q_f32(pSrc+228, cd13.val[1]);
+    vst1q_f32(pSrc+232, cd14.val[0]);
+    vst1q_f32(pSrc+236, cd14.val[1]);
+    vst1q_f32(pSrc+240, cd15.val[0]);
+    vst1q_f32(pSrc+244, cd15.val[1]);
+    vst1q_f32(pSrc+248, cd16.val[0]);
+    vst1q_f32(pSrc+252, cd16.val[1]);
+
+    //Transpose
+    arm_bitonic_merge_128_f32(pSrc+0  , dir);
+    arm_bitonic_merge_128_f32(pSrc+128, dir);
+}
+
+#define SWAP(a,i,j)                            \
+    temp = vgetq_lane_f32(a, j);                   \
+    a = vsetq_lane_f32(vgetq_lane_f32(a, i), a, j);\
+    a = vsetq_lane_f32(temp, a, i);
+
+static float32x4_t arm_bitonic_sort_4_f32(float32x4_t a, uint8_t dir)
+{
+    float32_t temp;
+
+
+    if( dir==(vgetq_lane_f32(a, 0) > vgetq_lane_f32(a, 1)) )
+    {
+        SWAP(a,0,1);
+    }
+    if( dir==(vgetq_lane_f32(a, 2) > vgetq_lane_f32(a, 3)) )
+    {
+       SWAP(a,2,3);
+    }
+
+    if( dir==(vgetq_lane_f32(a, 0) > vgetq_lane_f32(a, 3)) )
+    {
+      SWAP(a,0,3);
+    }
+    if( dir==(vgetq_lane_f32(a, 1) > vgetq_lane_f32(a, 2)) )
+    {
+      SWAP(a,1,2);
+    }
+
+    if( dir==(vgetq_lane_f32(a, 0) > vgetq_lane_f32(a, 1)) )
+    {
+      SWAP(a,0,1);
+    }
+    if( dir==(vgetq_lane_f32(a, 2)>vgetq_lane_f32(a, 3)) )
+    {
+      SWAP(a,2,3);
+    }
+
+    return a;
+}
+
+static float32x4x2_t arm_bitonic_sort_8_f32(float32x4_t a, float32x4_t b, uint8_t dir)
+{
+    a = arm_bitonic_sort_4_f32(a, dir);
+    b = arm_bitonic_sort_4_f32(b, dir);
+    return arm_bitonic_merge_8_f32(a, b, dir);
+}
+
+
+
+#endif
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @defgroup Sorting Vector sorting algorithms
+
+  Sort the elements of a vector
+
+  There are separate functions for floating-point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+/**
+   * @private
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   */
+void arm_bitonic_sort_f32(
+const arm_sort_instance_f32 * S, 
+      float32_t * pSrc,
+      float32_t * pDst, 
+      uint32_t blockSize)
+{
+    uint16_t s, i;
+    uint8_t dir = S->dir;
+
+#ifdef ARM_MATH_NEON
+    (void)s;
+
+    float32_t * pOut;
+    uint16_t counter = blockSize>>5;
+
+    if( (blockSize & (blockSize-1)) == 0 ) // Powers of 2 only
+    {
+        if(pSrc == pDst) // in-place
+            pOut = pSrc;
+        else
+    	    pOut = pDst;
+    
+        float32x4x2_t ab1, ab2;
+        float32x4x2_t cd1, cd2;
+
+	if(blockSize == 1)
+		pOut = pSrc;
+	else if(blockSize == 2)
+	{
+            float32_t temp;
+            
+            if( dir==(pSrc[0]>pSrc[1]) )
+            {
+                temp = pSrc[1];
+                pOut[1] = pSrc[0];
+                pOut[0] = temp;
+            }
+	    else
+		pOut = pSrc;
+	}
+	else if(blockSize == 4)
+        {
+    	    float32x4_t a = vld1q_f32(pSrc);
+
+    	    a = arm_bitonic_sort_4_f32(a, dir);
+
+    	    vst1q_f32(pOut, a);
+        }
+        else if(blockSize == 8)
+        {
+            float32x4_t a;
+            float32x4_t b;
+            float32x4x2_t ab;
+        
+            a = vld1q_f32(pSrc);
+            b = vld1q_f32(pSrc+4);
+        
+            ab = arm_bitonic_sort_8_f32(a, b, dir);
+
+            vst1q_f32(pOut,   ab.val[0]);
+            vst1q_f32(pOut+4, ab.val[1]);
+        }
+        else if(blockSize >=16)
+        {
+            // Order 16 bits long vectors
+            for(i=0; i<blockSize; i=i+16)
+                arm_bitonic_sort_16_f32(pSrc+i, pOut+i, dir);
+        
+            // Merge
+            for(i=0; i<counter; i++)
+            {
+                // Load and reverse second vector
+                ab1.val[0] = vld1q_f32(pOut+32*i+0 );
+                ab1.val[1] = vld1q_f32(pOut+32*i+4 );
+                ab2.val[0] = vld1q_f32(pOut+32*i+8 ); 
+                ab2.val[1] = vld1q_f32(pOut+32*i+12);
+
+                vldrev128q_f32(cd2.val[1], pOut+32*i+16);
+                vldrev128q_f32(cd2.val[0], pOut+32*i+20);
+                vldrev128q_f32(cd1.val[1], pOut+32*i+24);
+                vldrev128q_f32(cd1.val[0], pOut+32*i+28);
+
+                arm_bitonic_merge_32_f32(pOut+32*i, ab1, ab2, cd1, cd2, dir);
+            }
+        
+            counter = counter>>1;
+            for(i=0; i<counter; i++)
+                arm_bitonic_merge_64_f32(pOut+64*i, dir);
+        
+            counter = counter>>1;
+            for(i=0; i<counter; i++)
+                arm_bitonic_merge_128_f32(pOut+128*i, dir);
+        
+            counter = counter>>1;
+            for(i=0; i<counter; i++)
+                arm_bitonic_merge_256_f32(pOut+256*i, dir);
+
+            // Etc...
+        }
+    }
+
+#else
+
+    float32_t * pA;
+
+    if(pSrc != pDst) // out-of-place
+    {   
+        memcpy(pDst, pSrc, blockSize*sizeof(float32_t) );
+        pA = pDst;
+    }
+    else
+        pA = pSrc;
+
+
+    if( (blockSize & (blockSize-1)) == 0 ) // Powers of 2 only
+    {
+        for(s=2; s<=blockSize; s=s*2)
+        {
+    	    for(i=0; i<blockSize; i=i+s)
+    	        arm_bitonic_sort_core_f32(pA+i, s, dir);
+        }
+    }
+#endif
+}
+
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_bubble_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_bubble_sort_f32.c
new file mode 100644
index 00000000..640778de
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_bubble_sort_f32.c
@@ -0,0 +1,104 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bubble_sort_f32.c
+ * Description:  Floating point bubble sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+#include "arm_sorting.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+/**
+   * @private
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   *
+   * @par        Algorithm
+   *               The bubble sort algorithm is a simple comparison algorithm that
+   *               reads the elements of a vector from the beginning to the end,
+   *               compares the adjacent ones and swaps them if they are in the 
+   *               wrong order. The procedure is repeated until there is nothing 
+   *               left to swap. Bubble sort is fast for input vectors that are
+   *               nearly sorted.
+   *
+   * @par          It's an in-place algorithm. In order to obtain an out-of-place
+   *               function, a memcpy of the source vector is performed
+   */
+
+void arm_bubble_sort_f32(
+  const arm_sort_instance_f32 * S, 
+        float32_t * pSrc, 
+        float32_t * pDst, 
+        uint32_t blockSize)
+{
+    uint8_t dir = S->dir;
+    uint32_t i;
+    uint8_t swapped =1;
+    float32_t * pA;
+    float32_t temp;
+
+    if(pSrc != pDst) // out-of-place
+    {
+	memcpy(pDst, pSrc, blockSize*sizeof(float32_t) );
+	pA = pDst;
+    }
+    else
+	pA = pSrc;
+
+    while(swapped==1) // If nothing has been swapped after one loop stop
+    {
+	swapped=0;
+
+        for(i=0; i<blockSize-1; i++)
+	{
+	    if(dir==(pA[i]>pA[i+1]))
+	    {
+		// Swap
+		temp = pA[i];
+		pA[i] = pA[i+1];
+		pA[i+1] = temp;
+
+		// Update flag
+		swapped = 1;
+	    }
+	}
+
+	blockSize--;
+    }
+}
+
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f16.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f16.c
new file mode 100755
index 00000000..d441332a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f16.c
@@ -0,0 +1,130 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_f16.c
+ * Description:  Copies the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupSupport
+ */
+
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a f16 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_copy_f16(
+  const float16_t * pSrc,
+  float16_t * pDst,
+  uint32_t blockSize)
+{
+    do {
+        mve_pred16_t    p = vctp16q(blockSize);
+
+        vstrhq_p_f16(pDst,
+        vldrhq_z_f16((float16_t const *) pSrc, p), p);
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+        blockSize -= 8;
+    }
+    while ((int32_t) blockSize > 0);
+}
+
+#else
+
+void arm_copy_f16(
+  const float16_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicCopy group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
index a4eb6060..d739f7cb 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f32.c
@@ -1,152 +1,192 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_copy_f32.c
- * Description:  Copies the elements of a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @defgroup copy Vector Copy
-
-  Copies sample by sample from source vector to destination vector.
-
-  <pre>
-      pDst[n] = pSrc[n];   0 <= n < blockSize.
-  </pre>
-
-  There are separate functions for floating point, Q31, Q15, and Q7 data types.
- */
-
-/**
-  @addtogroup copy
-  @{
- */
-
-/**
-  @brief         Copies the elements of a floating-point vector.
-  @param[in]     pSrc       points to input vector
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_copy_f32(
-  const float32_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-  float32x4_t inV;
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    inV = vld1q_f32(pSrc);
-    vst1q_f32(pDst, inV);
-    pSrc += 4;
-    pDst += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 3;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-    /* Copy and then store the results in the destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-#else
-void arm_copy_f32(
-  const float32_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* Copy and store result in destination buffer */
-    *pDst++ = *pSrc++;
-    *pDst++ = *pSrc++;
-    *pDst++ = *pSrc++;
-    *pDst++ = *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* Copy and store result in destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-/**
-  @} end of BasicCopy group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_f32.c
+ * Description:  Copies the elements of a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @defgroup copy Vector Copy
+
+  Copies sample by sample from source vector to destination vector.
+
+  <pre>
+      pDst[n] = pSrc[n];   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_copy_f32(
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time */
+  while (blkCnt > 0U)
+  {
+      vstrwq_f32(pDst, vldrwq_f32(pSrc));
+      /*
+       * Decrement the blockSize loop counter
+       * Advance vector source and destination pointers
+       */
+      pSrc += 4;
+      pDst += 4;
+      blkCnt --;
+  }
+
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+    
+}
+
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_copy_f32(
+  const float32_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t inV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+    /* Copy and then store the results in the destination buffer */
+    inV = vld1q_f32(pSrc);
+    vst1q_f32(pDst, inV);
+    pSrc += 4;
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+    /* Copy and then store the results in the destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_copy_f32(
+  const float32_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f64.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f64.c
new file mode 100644
index 00000000..ec1df54f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_f64.c
@@ -0,0 +1,71 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_f64.c
+ * Description:  Copies the elements of a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a floating-point vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+void arm_copy_f64(
+  const float64_t * pSrc,
+        float64_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
index 0a356e7f..c657b541 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q15.c
@@ -1,96 +1,130 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_copy_q15.c
- * Description:  Copies the elements of a Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup copy
-  @{
- */
-
-/**
-  @brief         Copies the elements of a Q15 vector.
-  @param[in]     pSrc       points to input vector
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_copy_q15(
-  const q15_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* read 2 times 2 samples at a time */
-    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
-    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* Copy and store result in destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-
-/**
-  @} end of BasicCopy group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_q15.c
+ * Description:  Copies the elements of a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a Q15 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_copy_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;
+
+  blkCnt = blockSize >> 3;
+  while (blkCnt > 0U)
+  {
+      vstrhq_s16(pDst,vldrhq_s16(pSrc));
+      /*
+       * Decrement the blockSize loop counter
+       * Advance vector source and destination pointers
+       */
+      pSrc += 8;
+      pDst += 8;
+      blkCnt --;
+  }
+
+  blkCnt = blockSize & 7;
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_copy_q15(
+  const q15_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* read 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+    write_q15x2_ia (&pDst, read_q15x2_ia ((q15_t **) &pSrc));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
index 72217158..8e06bdac 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q31.c
@@ -1,98 +1,135 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_copy_q31.c
- * Description:  Copies the elements of a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup copy
-  @{
- */
-
-/**
-  @brief         Copies the elements of a Q31 vector.
-  @param[in]     pSrc       points to input vector
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_copy_q31(
-  const q31_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* Copy and store result in destination buffer */
-    *pDst++ = *pSrc++;
-    *pDst++ = *pSrc++;
-    *pDst++ = *pSrc++;
-    *pDst++ = *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* Copy and store result in destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-
-/**
-  @} end of BasicCopy group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_q31.c
+ * Description:  Copies the elements of a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a Q31 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_copy_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time */
+  while (blkCnt > 0U)
+  {
+        vstrwq_s32(pDst,vldrwq_s32(pSrc));
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+        blkCnt --;
+  }
+
+  blkCnt = blockSize & 3;
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+    
+}
+
+#else
+void arm_copy_q31(
+  const q31_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
index 3d358885..63f1cb94 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_copy_q7.c
@@ -1,95 +1,132 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_copy_q7.c
- * Description:  Copies the elements of a Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup copy
-  @{
- */
-
-/**
-  @brief         Copies the elements of a Q7 vector.
-  @param[in]     pSrc       points to input vector
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_copy_q7(
-  const q7_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* read 4 samples at a time */
-    write_q7x4_ia (&pDst, read_q7x4_ia ((q7_t **) &pSrc));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A */
-
-    /* Copy and store result in destination buffer */
-    *pDst++ = *pSrc++;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-
-/**
-  @} end of BasicCopy group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_copy_q7.c
+ * Description:  Copies the elements of a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup copy
+  @{
+ */
+
+/**
+  @brief         Copies the elements of a Q7 vector.
+  @param[in]     pSrc       points to input vector
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_copy_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+
+  uint32_t blkCnt;  
+
+  blkCnt = blockSize >> 4;
+  while (blkCnt > 0U)
+  {
+
+        vstrbq_s8(pDst,vldrbq_s8(pSrc));
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 16;
+        pDst += 16;
+        blkCnt --;
+  }
+
+  blkCnt = blockSize & 0xF;
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+#else
+void arm_copy_q7(
+  const q7_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* read 4 samples at a time */
+    write_q7x4_ia (&pDst, read_q7x4_ia ((q7_t **) &pSrc));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A */
+
+    /* Copy and store result in destination buffer */
+    *pDst++ = *pSrc++;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of BasicCopy group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_float.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_float.c
new file mode 100755
index 00000000..a0043539
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_float.c
@@ -0,0 +1,134 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q15.c
+ * Description:  Converts the elements of the floating-point vector to Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup f16_to_x  Convert 16-bit floating point value
+ */
+
+/**
+  @addtogroup f16_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the f16 vector to f32 vector.
+  @param[in]     pSrc       points to the f16 input vector
+  @param[out]    pDst       points to the f32 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H)
+#pragma GCC warning "Scalar version of arm_f16_to_float built. Helium version has build issues with gcc."
+#endif 
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) &&  !defined(__CMSIS_GCC_H)
+
+void arm_f16_to_float(
+  const float16_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    int32_t  blkCnt;           /* loop counters */
+    float16x8_t vecDst;
+    float32x4x2_t tmp;
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        vecDst = vldrhq_f16(pSrc);          
+        pSrc += 8;
+
+        tmp.val[0] = vcvtbq_f32_f16(vecDst);
+        tmp.val[1] = vcvttq_f32_f16(vecDst);
+        vst2q(pDst,tmp);
+        
+        pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    while (blkCnt > 0)
+    {
+
+        *pDst++ = (float32_t) *pSrc++;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+}
+
+#else
+void arm_f16_to_float(
+  const float16_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    const float16_t *pIn = pSrc;      /* Src pointer */
+    uint32_t  blkCnt;           /* loop counter */
+
+    /*
+     * Loop over blockSize number of values
+     */
+    blkCnt = blockSize;
+
+    while (blkCnt > 0U)
+    {
+
+        *pDst++ = (float32_t) * pIn++;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of f16_to_x group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_q15.c
new file mode 100755
index 00000000..bb425d13
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_f16_to_q15.c
@@ -0,0 +1,157 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q15.c
+ * Description:  Converts the elements of the floating-point vector to Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup f16_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the f16 vector to Q15 vector.
+  @param[in]     pSrc       points to the f16 input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
+  </pre>
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+
+  @note
+                   In order to apply rounding in scalar version, the library should be rebuilt with the ROUNDING macro
+                   defined in the preprocessor section of project options.
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_f16_to_q15(
+  const float16_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+    float16_t       maxQ = (float16_t) Q15_MAX;
+    float16x8_t         vecDst;
+
+
+    do {
+        mve_pred16_t    p = vctp16q(blockSize);
+
+        vecDst = vldrhq_z_f16((float16_t const *) pSrc, p);
+        /* C = A * 32767 */
+        /* convert from float to Q15 and then store the results in the destination buffer */
+        vecDst = vmulq_m(vuninitializedq_f16(), vecDst, maxQ, p);
+
+        vstrhq_p_s16(pDst,
+            vcvtaq_m(vuninitializedq_s16(), vecDst, p), p);
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 8;
+        pDst += 8;
+        blockSize -= 8;
+    }
+    while ((int32_t) blockSize > 0);
+}
+
+#else
+
+void arm_f16_to_q15(
+  const float16_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+    const float16_t *pIn = pSrc;      /* Src pointer */
+    uint32_t  blkCnt;           /* loop counter */
+#ifdef ARM_MATH_ROUNDING
+    float16_t in;
+#endif                          /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /*
+     * Loop over blockSize number of values
+     */
+    blkCnt = blockSize;
+
+    while (blkCnt > 0U)
+    {
+
+#ifdef ARM_MATH_ROUNDING
+
+        /*
+         * C = A * 65536
+         */
+        /*
+         * convert from float to Q31 and then store the results in the destination buffer
+         */
+        in = *pIn++;
+        in = (in * 32768.0);
+        in += in > 0.0 ? 0.5 : -0.5;
+        *pDst++ = clip_q31_to_q15((q31_t) (in));
+
+#else
+
+        /*
+         * C = A * 32768
+         */
+        /*
+         * convert from float to Q31 and then store the results in the destination buffer
+         */
+        *pDst++ = clip_q31_to_q15((q31_t) ((_Float16)*pIn++ * 32768.0f16));
+
+#endif                          /*      #ifdef ARM_MATH_ROUNDING        */
+
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of f16_to_x group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f16.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f16.c
new file mode 100755
index 00000000..0b08f12c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f16.c
@@ -0,0 +1,127 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_f16.c
+ * Description:  Fills a constant value into a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupSupport
+ */
+
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a f16 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_fill_f16(
+  float16_t value,
+  float16_t * pDst,
+  uint32_t blockSize)
+{
+     do {
+        mve_pred16_t    p = vctp16q(blockSize);
+
+        vstrhq_p_f16(pDst,
+            vdupq_m_n_f16(vuninitializedq_f16(), value, p), p);
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pDst += 8;
+        blockSize -= 8;
+    }
+    while ((int32_t) blockSize > 0);
+}
+#else
+void arm_fill_f16(
+  float16_t value,
+  float16_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Fill group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
index e4f9301e..50cdd8fc 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f32.c
@@ -1,151 +1,189 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fill_f32.c
- * Description:  Fills a constant value into a floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @defgroup Fill Vector Fill
-
-  Fills the destination vector with a constant value.
-
-  <pre>
-      pDst[n] = value;   0 <= n < blockSize.
-  </pre>
-
-  There are separate functions for floating point, Q31, Q15, and Q7 data types.
- */
-
-/**
-  @addtogroup Fill
-  @{
- */
-
-/**
-  @brief         Fills a constant value into a floating-point vector.
-  @param[in]     value      input value to be filled
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* loop counter */
-
-
-  float32x4_t inV = vdupq_n_f32(value);
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    vst1q_f32(pDst, inV);
-    pDst += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 3;
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-    /* Fill the value in the destination buffer */
-    *pDst++ = value;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-#else
-void arm_fill_f32(
-  float32_t value,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* Fill value in destination buffer */
-    *pDst++ = value;
-    *pDst++ = value;
-    *pDst++ = value;
-    *pDst++ = value;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* Fill value in destination buffer */
-    *pDst++ = value;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-/**
-  @} end of Fill group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_f32.c
+ * Description:  Fills a constant value into a floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @defgroup Fill Vector Fill
+
+  Fills the destination vector with a constant value.
+
+  <pre>
+      pDst[n] = value;   0 <= n < blockSize.
+  </pre>
+
+  There are separate functions for floating point, Q31, Q15, and Q7 data types.
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a floating-point vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_fill_f32(
+  float32_t value,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time */
+  while (blkCnt > 0U)
+  {
+
+    vstrwq_f32(pDst,vdupq_n_f32(value));
+    /*
+     * Decrement the blockSize loop counter
+     * Advance vector source and destination pointers
+     */
+    pDst += 4;
+    blkCnt --;
+  }
+
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_fill_f32(
+  float32_t value,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* loop counter */
+
+
+  float32x4_t inV = vdupq_n_f32(value);
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+    /* Fill the value in the destination buffer */
+    vst1q_f32(pDst, inV);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+    /* Fill the value in the destination buffer */
+    *pDst++ = value;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_fill_f32(
+  float32_t value,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f64.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f64.c
new file mode 100644
index 00000000..4bc2700d
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_f64.c
@@ -0,0 +1,71 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_f64.c
+ * Description:  Fills a constant value into a floating-point vector
+ *
+ * $Date:        13 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a floating-point vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+void arm_fill_f64(
+  float64_t value,
+  float64_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
index 6296678f..997a728d 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q15.c
@@ -1,100 +1,134 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fill_q15.c
- * Description:  Fills a constant value into a Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup Fill
-  @{
- */
-
-/**
-  @brief         Fills a constant value into a Q15 vector.
-  @param[in]     value      input value to be filled
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_fill_q15(
-  q15_t value,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-  /* Packing two 16 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PKHBT(value, value, 16U);
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* fill 2 times 2 samples at a time */
-    write_q15x2_ia (&pDst, packedValue);
-    write_q15x2_ia (&pDst, packedValue);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* Fill value in destination buffer */
-    *pDst++ = value;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-
-/**
-  @} end of Fill group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_q15.c
+ * Description:  Fills a constant value into a Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a Q15 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_fill_q15(
+  q15_t value,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;  
+  blkCnt = blockSize >> 3;
+  while (blkCnt > 0U)
+  {
+
+        vstrhq_s16(pDst,vdupq_n_s16(value));
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pDst += 8;
+        blkCnt --;
+    }
+
+  blkCnt = blockSize & 7;
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+#else
+void arm_fill_q15(
+  q15_t value,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t packedValue;                             /* value packed to 32 bits */
+
+  /* Packing two 16 bit values to 32 bit value in order to use SIMD */
+  packedValue = __PKHBT(value, value, 16U);
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* fill 2 times 2 samples at a time */
+    write_q15x2_ia (&pDst, packedValue);
+    write_q15x2_ia (&pDst, packedValue);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
index 001b8620..7da5fb6a 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q31.c
@@ -1,98 +1,135 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fill_q31.c
- * Description:  Fills a constant value into a Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup Fill
-  @{
- */
-
-/**
-  @brief         Fills a constant value into a Q31 vector.
-  @param[in]     value      input value to be filled
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_fill_q31(
-  q31_t value,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* Fill value in destination buffer */
-    *pDst++ = value;
-    *pDst++ = value;
-    *pDst++ = value;
-    *pDst++ = value;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* Fill value in destination buffer */
-    *pDst++ = value;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-
-/**
-  @} end of Fill group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_q31.c
+ * Description:  Fills a constant value into a Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a Q31 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_fill_q31(
+        q31_t value,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+  uint32_t blkCnt;
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time */
+  while (blkCnt > 0U)
+  {
+
+        vstrwq_s32(pDst,vdupq_n_s32(value));
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pDst += 4;
+        blkCnt --;
+  }
+
+  blkCnt = blockSize & 3;
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+    
+}
+
+#else
+void arm_fill_q31(
+  q31_t value,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
index 0c32aa0f..830fc732 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_fill_q7.c
@@ -1,99 +1,133 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_fill_q7.c
- * Description:  Fills a constant value into a Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup Fill
-  @{
- */
-
-/**
-  @brief         Fills a constant value into a Q7 vector.
-  @param[in]     value      input value to be filled
-  @param[out]    pDst       points to output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
- */
-
-void arm_fill_q7(
-  q7_t value,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  uint32_t blkCnt;                               /* Loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-  q31_t packedValue;                             /* value packed to 32 bits */
-
-  /* Packing four 8 bit values to 32 bit value in order to use SIMD */
-  packedValue = __PACKq7(value, value, value, value);
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* fill 4 samples at a time */
-    write_q7x4_ia (&pDst, packedValue);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = value */
-
-    /* Fill value in destination buffer */
-    *pDst++ = value;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-}
-
-/**
-  @} end of Fill group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_fill_q7.c
+ * Description:  Fills a constant value into a Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Fill
+  @{
+ */
+
+/**
+  @brief         Fills a constant value into a Q7 vector.
+  @param[in]     value      input value to be filled
+  @param[out]    pDst       points to output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_fill_q7(
+  q7_t value,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt; 
+
+  blkCnt = blockSize >> 4;
+  while (blkCnt > 0U)
+  {
+
+        vstrbq_s8(pDst,vdupq_n_s8(value));
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pDst += 16;
+        blkCnt --;
+    }
+
+  blkCnt = blockSize & 0xF;
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_fill_q7(
+  q7_t value,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;                               /* Loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+  q31_t packedValue;                             /* value packed to 32 bits */
+
+  /* Packing four 8 bit values to 32 bit value in order to use SIMD */
+  packedValue = __PACKq7(value, value, value, value);
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* fill 4 samples at a time */
+    write_q7x4_ia (&pDst, packedValue);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = value */
+
+    /* Fill value in destination buffer */
+    *pDst++ = value;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of Fill group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_f16.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_f16.c
new file mode 100755
index 00000000..d627a8ad
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_f16.c
@@ -0,0 +1,131 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q15.c
+ * Description:  Converts the elements of the floating-point vector to Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup float_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the floating-point vector to f16 vector.
+  @param[in]     pSrc       points to the f32 input vector
+  @param[out]    pDst       points to the f16 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) && defined(__CMSIS_GCC_H)
+#pragma GCC warning "Scalar version of arm_float_to_f16 built. Helium version has build issues with gcc."
+#endif 
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE) &&  !defined(__CMSIS_GCC_H)
+
+void arm_float_to_f16(
+  const float32_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    int32_t  blkCnt;           /* loop counters */
+    float32x4x2_t tmp;
+    float16x8_t vecDst;
+    float32_t const *pSrcVec;
+
+
+    pSrcVec = (float32_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        /* convert from float32 to float16 and then store the results in the destination buffer */
+        tmp = vld2q(pSrcVec);   pSrcVec += 8;
+        /* narrow / merge */
+        vecDst = vcvtbq_f16_f32(vecDst, tmp.val[0]);
+        vecDst = vcvttq_f16_f32(vecDst, tmp.val[1]);
+        vst1q(pDst, vecDst);    pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        tmp = vld2q(pSrcVec);
+        vecDst = vcvtbq_f16_f32(vecDst, tmp.val[0]);
+        vecDst = vcvttq_f16_f32(vecDst, tmp.val[1]);
+        vstrhq_p(pDst, vecDst, p0);
+    }
+}
+
+#else
+
+void arm_float_to_f16(
+  const float32_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+    const float32_t *pIn = pSrc;      /* Src pointer */
+    uint32_t  blkCnt;           /* loop counter */
+
+    /*
+     * Loop over blockSize number of values
+     */
+    blkCnt = blockSize;
+
+    while (blkCnt > 0U)
+    {
+
+        *pDst++ = (float16_t) * pIn++;
+        /*
+         * Decrement the loop counter
+         */
+        blkCnt--;
+    }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of float_to_x group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
index a3c8bb2b..8061c9f2 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q15.c
@@ -1,244 +1,308 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_float_to_q15.c
- * Description:  Converts the elements of the floating-point vector to Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup float_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the floating-point vector to Q15 vector.
-  @param[in]     pSrc       points to the floating-point input vector
-  @param[out]    pDst       points to the Q15 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
-  </pre>
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
-
-  @note
-                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
-                   defined in the preprocessor section of project options.
- */
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_float_to_q15(
-  const float32_t * pSrc,
-  q15_t * pDst,
-  uint32_t blockSize)
-{
-  const float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-  float32_t in;
-  float32x4_t inV;
-  #ifdef ARM_MATH_ROUNDING
-  float32x4_t zeroV = vdupq_n_f32(0.0f);
-  float32x4_t pHalf = vdupq_n_f32(0.5f / 32768.0f);
-  float32x4_t mHalf = vdupq_n_f32(-0.5f / 32768.0f);
-  float32x4_t r;
-  uint32x4_t cmp;
-  #endif
-
-  int32x4_t cvt;
-  int16x4_t outV;
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* Convert from float to q15 and then store the results in the destination buffer */
-    inV = vld1q_f32(pIn);
-    cmp = vcgtq_f32(inV,zeroV);
-    r = vbslq_f32(cmp,pHalf,mHalf);
-    inV = vaddq_f32(inV, r);
-
-    pIn += 4;
-
-    cvt = vcvtq_n_s32_f32(inV,15);
-    outV = vqmovn_s32(cvt);
-
-    vst1_s16(pDst, outV);
-    pDst += 4;
-
-#else
-
-    /* C = A * 32768 */
-    /* Convert from float to q15 and then store the results in the destination buffer */
-    inV = vld1q_f32(pIn);
-
-    cvt = vcvtq_n_s32_f32(inV,15);
-    outV = vqmovn_s32(cvt);
-
-    vst1_s16(pDst, outV);
-    pDst += 4;
-    pIn += 4;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 3;
-
-  while (blkCnt > 0U)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 32768 */
-    /* Convert from float to q15 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* Convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-#else
-void arm_float_to_q15(
-  const float32_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const float32_t *pIn = pSrc;                         /* Source pointer */
-
-#ifdef ARM_MATH_ROUNDING
-        float32_t in;
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * 32768 */
-
-    /* convert from float to Q15 and store result in destination buffer */
-#ifdef ARM_MATH_ROUNDING
-
-    in = (*pIn++ * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = (*pIn++ * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = (*pIn++ * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-    in = (*pIn++ * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * 32768 */
-
-    /* convert from float to Q15 and store result in destination buffer */
-#ifdef ARM_MATH_ROUNDING
-
-    in = (*pIn++ * 32768.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
-
-#else
-
-    /* C = A * 32768 */
-    /* Convert from float to q15 and then store the results in the destination buffer */
-    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of float_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q15.c
+ * Description:  Converts the elements of the floating-point vector to Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup float_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the floating-point vector to Q15 vector.
+  @param[in]     pSrc       points to the floating-point input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q15_t)(pSrc[n] * 32768);   0 <= n < blockSize.
+  </pre>
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q15 range [0x8000 0x7FFF] are saturated.
+
+  @note
+                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+                   defined in the preprocessor section of project options.
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_float_to_q15(
+  const float32_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+    uint32_t         blkCnt;
+    float32_t       maxQ = (float32_t) Q15_MAX;
+    f32x4x2_t       tmp;
+    q15x8_t         vecDst;
+#ifdef ARM_MATH_ROUNDING
+    float32_t in;
+#endif
+
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U) 
+    {
+        /* C = A * 32768 */
+        /* convert from float to q15 and then store the results in the destination buffer */
+        tmp = vld2q(pSrc);
+
+        tmp.val[0] = vmulq(tmp.val[0], maxQ);
+        tmp.val[1] = vmulq(tmp.val[1], maxQ);
+
+        vecDst = vqmovnbq(vecDst, vcvtaq_s32_f32(tmp.val[0]));
+        vecDst = vqmovntq(vecDst, vcvtaq_s32_f32(tmp.val[1]));
+        vst1q(pDst, vecDst);
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+        pDst += 8;
+        pSrc += 8;
+    }
+
+    blkCnt = blockSize & 7;
+    while (blkCnt > 0U)
+    {
+      /* C = A * 32768 */
+
+      /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+      in = (*pSrc++ * 32768.0f);
+      in += in > 0.0f ? 0.5f : -0.5f;
+      *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+      /* C = A * 32768 */
+      /* Convert from float to q15 and then store the results in the destination buffer */
+      *pDst++ = (q15_t) __SSAT((q31_t) (*pSrc++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_float_to_q15(
+  const float32_t * pSrc,
+  q15_t * pDst,
+  uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 32768.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 32768.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  float32_t in;
+  #endif
+
+  int32x4_t cvt;
+  int16x4_t outV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+
+    pIn += 4;
+
+    cvt = vcvtq_n_s32_f32(inV,15);
+    outV = vqmovn_s32(cvt);
+
+    vst1_s16(pDst, outV);
+    pDst += 4;
+
+#else
+
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+
+    cvt = vcvtq_n_s32_f32(inV,15);
+    outV = vqmovn_s32(cvt);
+
+    vst1_s16(pDst, outV);
+    pDst += 4;
+    pIn += 4;
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    in = *pIn++;
+    in = (in * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_float_to_q15(
+  const float32_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 32768 */
+
+    /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 32768 */
+
+    /* convert from float to Q15 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 32768.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q15_t) (__SSAT((q31_t) (in), 16));
+
+#else
+
+    /* C = A * 32768 */
+    /* Convert from float to q15 and then store the results in the destination buffer */
+    *pDst++ = (q15_t) __SSAT((q31_t) (*pIn++ * 32768.0f), 16);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of float_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
index 214987f2..a222e499 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q31.c
@@ -1,252 +1,314 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_float_to_q31.c
- * Description:  Converts the elements of the floating-point vector to Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
- * @defgroup float_to_x  Convert 32-bit floating point value
- */
-
-/**
-  @addtogroup float_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the floating-point vector to Q31 vector.
-  @param[in]     pSrc       points to the floating-point input vector
-  @param[out]    pDst       points to the Q31 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.
-  </pre>
-
-  @par           Scaling and Overflow Behavior
-                   The function uses saturating arithmetic.
-                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
-
-  @note
-                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
-                   defined in the preprocessor section of project options.
- */
-
-#if defined(ARM_MATH_NEON)
-void arm_float_to_q31(
-  const float32_t * pSrc,
-  q31_t * pDst,
-  uint32_t blockSize)
-{
-  const float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-  float32_t in;
-  float32x4_t inV;
-  #ifdef ARM_MATH_ROUNDING
-  float32x4_t zeroV = vdupq_n_f32(0.0f);
-  float32x4_t pHalf = vdupq_n_f32(0.5f / 2147483648.0f);
-  float32x4_t mHalf = vdupq_n_f32(-0.5f / 2147483648.0f);
-  float32x4_t r;
-  uint32x4_t cmp;
-  #endif
-
-  int32x4_t outV;
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 32768 */
-    /* Convert from float to Q31 and then store the results in the destination buffer */
-    inV = vld1q_f32(pIn);
-    cmp = vcgtq_f32(inV,zeroV);
-    r = vbslq_f32(cmp,pHalf,mHalf);
-    inV = vaddq_f32(inV, r);
-
-    pIn += 4;
-
-    outV = vcvtq_n_s32_f32(inV,31);
-
-    vst1q_s32(pDst, outV);
-    pDst += 4;
-
-#else
-
-    /* C = A * 2147483648 */
-    /* Convert from float to Q31 and then store the results in the destination buffer */
-    inV = vld1q_f32(pIn);
-
-    outV = vcvtq_n_s32_f32(inV,31);
-
-    vst1q_s32(pDst, outV);
-    pDst += 4;
-    pIn += 4;
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 3;
-
-  while (blkCnt > 0U)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-
-    /* C = A * 2147483648 */
-    /* Convert from float to Q31 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* Convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-
-}
-#else
-void arm_float_to_q31(
-  const float32_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const float32_t *pIn = pSrc;                         /* Source pointer */
-
-#ifdef ARM_MATH_ROUNDING
-        float32_t in;
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * 2147483648 */
-
-    /* convert from float to Q31 and store result in destination buffer */
-#ifdef ARM_MATH_ROUNDING
-
-    in = (*pIn++ * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = (*pIn++ * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = (*pIn++ * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-    in = (*pIn++ * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* Convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * 2147483648 */
-
-    /* convert from float to Q31 and store result in destination buffer */
-#ifdef ARM_MATH_ROUNDING
-
-    in = (*pIn++ * 2147483648.0f);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = clip_q63_to_q31((q63_t) (in));
-
-#else
-
-    /* C = A * 2147483648 */
-    /* Convert from float to Q31 and then store the results in the destination buffer */
-    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of float_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q31.c
+ * Description:  Converts the elements of the floating-point vector to Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup float_to_x  Convert 32-bit floating point value
+ */
+
+/**
+  @addtogroup float_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the floating-point vector to Q31 vector.
+  @param[in]     pSrc       points to the floating-point input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q31_t)(pSrc[n] * 2147483648);   0 <= n < blockSize.
+  </pre>
+
+  @par           Scaling and Overflow Behavior
+                   The function uses saturating arithmetic.
+                   Results outside of the allowable Q31 range[0x80000000 0x7FFFFFFF] are saturated.
+
+  @note
+                   In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+                   defined in the preprocessor section of project options.
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_float_to_q31(
+  const float32_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+    uint32_t         blkCnt;
+    float32_t       maxQ = (float32_t) Q31_MAX;
+    f32x4_t         vecDst;
+#ifdef ARM_MATH_ROUNDING
+    float32_t in;
+#endif
+
+
+    blkCnt = blockSize >> 2U;
+
+    /* Compute 4 outputs at a time. */
+    while (blkCnt > 0U)
+    {
+
+        vecDst = vldrwq_f32(pSrc);
+        /* C = A * 2147483648 */
+        /* convert from float to Q31 and then store the results in the destination buffer */
+        vecDst = vmulq(vecDst, maxQ);
+
+        vstrwq_s32(pDst, vcvtaq_s32_f32(vecDst));
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pSrc += 4;
+        pDst += 4;
+        blkCnt --;
+    }
+
+    blkCnt = blockSize & 3;
+
+    while (blkCnt > 0U)
+    {
+       /* C = A * 2147483648 */
+   
+       /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+       in = (*pSrc++ * 2147483648.0f);
+       in += in > 0.0f ? 0.5f : -0.5f;
+       *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+       /* C = A * 2147483648 */
+       /* Convert from float to Q31 and then store the results in the destination buffer */
+       *pDst++ = clip_q63_to_q31((q63_t) (*pSrc++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+       /* Decrement loop counter */
+       blkCnt--;
+  }
+}
+#else
+#if defined(ARM_MATH_NEON)
+void arm_float_to_q31(
+  const float32_t * pSrc,
+  q31_t * pDst,
+  uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32_t in;
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 2147483648.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 2147483648.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
+
+  int32x4_t outV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+
+    /* C = A * 32768 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+
+    pIn += 4;
+
+    outV = vcvtq_n_s32_f32(inV,31);
+
+    vst1q_s32(pDst, outV);
+    pDst += 4;
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+
+    outV = vcvtq_n_s32_f32(inV,31);
+
+    vst1q_s32(pDst, outV);
+    pDst += 4;
+    pIn += 4;
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    in = *pIn++;
+    in = (in * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+
+}
+#else
+void arm_float_to_q31(
+  const float32_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 2147483648 */
+
+    /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 2147483648 */
+
+    /* convert from float to Q31 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 2147483648.0f);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = clip_q63_to_q31((q63_t) (in));
+
+#else
+
+    /* C = A * 2147483648 */
+    /* Convert from float to Q31 and then store the results in the destination buffer */
+    *pDst++ = clip_q63_to_q31((q63_t) (*pIn++ * 2147483648.0f));
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of float_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
index 3b7d6c6c..27af5206 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_float_to_q7.c
@@ -1,253 +1,330 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_float_to_q7.c
- * Description:  Converts the elements of the floating-point vector to Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup float_to_x
-  @{
- */
-
-/**
- * @brief Converts the elements of the floating-point vector to Q7 vector.
- * @param[in]       *pSrc points to the floating-point input vector
- * @param[out]      *pDst points to the Q7 output vector
- * @param[in]       blockSize length of the input vector
- * @return none.
- *
- *\par Description:
- * \par
- * The equation used for the conversion process is:
- * <pre>
- * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.
- * </pre>
- * \par Scaling and Overflow Behavior:
- * \par
- * The function uses saturating arithmetic.
- * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
- * \note
- * In order to apply rounding, the library should be rebuilt with the ROUNDING macro
- * defined in the preprocessor section of project options.
- */
-
-#if defined(ARM_MATH_NEON)
-void arm_float_to_q7(
-  const float32_t * pSrc,
-  q7_t * pDst,
-  uint32_t blockSize)
-{
-  const float32_t *pIn = pSrc;                         /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-  float32_t in;
-  float32x4_t inV;
-  #ifdef ARM_MATH_ROUNDING
-  float32x4_t zeroV = vdupq_n_f32(0.0f);
-  float32x4_t pHalf = vdupq_n_f32(0.5f / 128.0f);
-  float32x4_t mHalf = vdupq_n_f32(-0.5f / 128.0f);
-  float32x4_t r;
-  uint32x4_t cmp;
-  #endif
-
-  int32x4_t cvt;
-  int16x4_t cvt1,cvt2;
-  int8x8_t outV;
-
-  blkCnt = blockSize >> 3U;
-
-  /* Compute 8 outputs at a time.
-   ** a second loop below computes the remaining 1 to 7 samples. */
-  while (blkCnt > 0U)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* Convert from float to q7 and then store the results in the destination buffer */
-    inV = vld1q_f32(pIn);
-    cmp = vcgtq_f32(inV,zeroV);
-    r = vbslq_f32(cmp,pHalf,mHalf);
-    inV = vaddq_f32(inV, r);
-    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
-    pIn += 4;
-
-    inV = vld1q_f32(pIn);
-    cmp = vcgtq_f32(inV,zeroV);
-    r = vbslq_f32(cmp,pHalf,mHalf);
-    inV = vaddq_f32(inV, r);
-    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
-    pIn += 4;
-    
-    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
-    vst1_s8(pDst, outV);
-    pDst += 8;
-
-#else
-
-    /* C = A * 128 */
-    /* Convert from float to q7 and then store the results in the destination buffer */
-    inV = vld1q_f32(pIn);
-    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
-    pIn += 4;
-
-    inV = vld1q_f32(pIn);
-    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
-    pIn += 4;
-
-    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
-
-    vst1_s8(pDst, outV);
-    pDst += 8;
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 7;
-
-  while (blkCnt > 0U)
-  {
-
-#ifdef ARM_MATH_ROUNDING
-    /* C = A * 128 */
-    /* Convert from float to q7 and then store the results in the destination buffer */
-    in = *pIn++;
-    in = (in * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    /* C = A * 128 */
-    /* Convert from float to q7 and then store the results in the destination buffer */
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /*      #ifdef ARM_MATH_ROUNDING        */
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-}
-#else
-void arm_float_to_q7(
-  const float32_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const float32_t *pIn = pSrc;                         /* Source pointer */
-
-#ifdef ARM_MATH_ROUNDING
-        float32_t in;
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * 128 */
-
-    /* Convert from float to q7 and store result in destination buffer */
-#ifdef ARM_MATH_ROUNDING
-
-    in = (*pIn++ * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = (*pIn++ * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = (*pIn++ * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-    in = (*pIn++ * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = A * 128 */
-
-    /* Convert from float to q7 and store result in destination buffer */
-#ifdef ARM_MATH_ROUNDING
-
-    in = (*pIn++ * 128);
-    in += in > 0.0f ? 0.5f : -0.5f;
-    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
-
-#else
-
-    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
-
-#endif /* #ifdef ARM_MATH_ROUNDING */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of float_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_float_to_q7.c
+ * Description:  Converts the elements of the floating-point vector to Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup float_to_x
+  @{
+ */
+
+/**
+ * @brief Converts the elements of the floating-point vector to Q7 vector.
+ * @param[in]       *pSrc points to the floating-point input vector
+ * @param[out]      *pDst points to the Q7 output vector
+ * @param[in]       blockSize length of the input vector
+ * @return none.
+ *
+ *\par Description:
+ * \par
+ * The equation used for the conversion process is:
+ * <pre>
+ * 	pDst[n] = (q7_t)(pSrc[n] * 128);   0 <= n < blockSize.
+ * </pre>
+ * \par Scaling and Overflow Behavior:
+ * \par
+ * The function uses saturating arithmetic.
+ * Results outside of the allowable Q7 range [0x80 0x7F] will be saturated.
+ * \note
+ * In order to apply rounding, the library should be rebuilt with the ROUNDING macro
+ * defined in the preprocessor section of project options.
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_float_to_q7(
+  const float32_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+    uint32_t         blkCnt;     /* loop counters */
+    float32_t       maxQ = powf(2.0, 7);
+    f32x4x4_t       tmp;
+    q15x8_t         evVec, oddVec;
+    q7x16_t         vecDst;
+    float32_t const *pSrcVec;
+#ifdef ARM_MATH_ROUNDING
+    float32_t in;
+#endif
+
+    pSrcVec = (float32_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U) {
+        tmp = vld4q(pSrcVec);
+        pSrcVec += 16;
+        /*
+         * C = A * 128.0
+         * convert from float to q7 and then store the results in the destination buffer
+         */
+        tmp.val[0] = vmulq(tmp.val[0], maxQ);
+        tmp.val[1] = vmulq(tmp.val[1], maxQ);
+        tmp.val[2] = vmulq(tmp.val[2], maxQ);
+        tmp.val[3] = vmulq(tmp.val[3], maxQ);
+
+        /*
+         * convert and pack evens
+         */
+        evVec = vqmovnbq(evVec, vcvtaq_s32_f32(tmp.val[0]));
+        evVec = vqmovntq(evVec, vcvtaq_s32_f32(tmp.val[2]));
+        /*
+         * convert and pack odds
+         */
+        oddVec = vqmovnbq(oddVec, vcvtaq_s32_f32(tmp.val[1]));
+        oddVec = vqmovntq(oddVec, vcvtaq_s32_f32(tmp.val[3]));
+        /*
+         * merge
+         */
+        vecDst = vqmovnbq(vecDst, evVec);
+        vecDst = vqmovntq(vecDst, oddVec);
+
+        vst1q(pDst, vecDst);
+        pDst += 16;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+  blkCnt = blockSize & 0xF;
+  while (blkCnt > 0U)
+  {
+    /* C = A * 128 */
+
+    /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pSrcVec++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    *pDst++ = (q7_t) __SSAT((q31_t) (*pSrcVec++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#else
+#if defined(ARM_MATH_NEON)
+void arm_float_to_q7(
+  const float32_t * pSrc,
+  q7_t * pDst,
+  uint32_t blockSize)
+{
+  const float32_t *pIn = pSrc;                         /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  float32x4_t inV;
+  #ifdef ARM_MATH_ROUNDING
+  float32_t in;
+  float32x4_t zeroV = vdupq_n_f32(0.0f);
+  float32x4_t pHalf = vdupq_n_f32(0.5f / 128.0f);
+  float32x4_t mHalf = vdupq_n_f32(-0.5f / 128.0f);
+  float32x4_t r;
+  uint32x4_t cmp;
+  #endif
+
+  int16x4_t cvt1,cvt2;
+  int8x8_t outV;
+
+  blkCnt = blockSize >> 3U;
+
+  /* Compute 8 outputs at a time.
+   ** a second loop below computes the remaining 1 to 7 samples. */
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+
+    inV = vld1q_f32(pIn);
+    cmp = vcgtq_f32(inV,zeroV);
+    r = vbslq_f32(cmp,pHalf,mHalf);
+    inV = vaddq_f32(inV, r);
+    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+    
+    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
+    vst1_s8(pDst, outV);
+    pDst += 8;
+
+#else
+
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    inV = vld1q_f32(pIn);
+    cvt1 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+
+    inV = vld1q_f32(pIn);
+    cvt2 = vqmovn_s32(vcvtq_n_s32_f32(inV,7));
+    pIn += 4;
+
+    outV = vqmovn_s16(vcombine_s16(cvt1,cvt2));
+
+    vst1_s8(pDst, outV);
+    pDst += 8;
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 7;
+
+  while (blkCnt > 0U)
+  {
+
+#ifdef ARM_MATH_ROUNDING
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    in = *pIn++;
+    in = (in * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    /* C = A * 128 */
+    /* Convert from float to q7 and then store the results in the destination buffer */
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /*      #ifdef ARM_MATH_ROUNDING        */
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+}
+#else
+void arm_float_to_q7(
+  const float32_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const float32_t *pIn = pSrc;                         /* Source pointer */
+
+#ifdef ARM_MATH_ROUNDING
+        float32_t in;
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 128 */
+
+    /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+    *pDst++ = __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = A * 128 */
+
+    /* Convert from float to q7 and store result in destination buffer */
+#ifdef ARM_MATH_ROUNDING
+
+    in = (*pIn++ * 128);
+    in += in > 0.0f ? 0.5f : -0.5f;
+    *pDst++ = (q7_t) (__SSAT((q15_t) (in), 8));
+
+#else
+
+    *pDst++ = (q7_t) __SSAT((q31_t) (*pIn++ * 128.0f), 8);
+
+#endif /* #ifdef ARM_MATH_ROUNDING */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of float_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_heap_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_heap_sort_f32.c
new file mode 100644
index 00000000..5a46caa3
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_heap_sort_f32.c
@@ -0,0 +1,119 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_heap_sort_f32.c
+ * Description:  Floating point heap sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+#include "arm_sorting.h"
+
+
+
+static void arm_heapify(float32_t * pSrc, uint32_t n, uint32_t i, uint8_t dir)
+{
+    /* Put all the elements of pSrc in heap order */
+    uint32_t k = i; // Initialize largest/smallest as root 
+    uint32_t l = 2*i + 1; // left = 2*i + 1 
+    uint32_t r = 2*i + 2; // right = 2*i + 2 
+    float32_t temp;
+
+    if (l < n && dir==(pSrc[l] > pSrc[k]) )
+        k = l; 
+
+    if (r < n && dir==(pSrc[r] > pSrc[k]) )
+        k = r; 
+
+    if (k != i) 
+    { 
+	temp = pSrc[i];
+	pSrc[i]=pSrc[k];
+	pSrc[k]=temp;
+
+        arm_heapify(pSrc, n, k, dir); 
+    }
+}
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+/**
+   * @private
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   *
+   * @par        Algorithm
+   *               The heap sort algorithm is a comparison algorithm that
+   *               divides the input array into a sorted and an unsorted region, 
+   *               and shrinks the unsorted region by extracting the largest 
+   *               element and moving it to the sorted region. A heap data 
+   *               structure is used to find the maximum.
+   *
+   * @par          It's an in-place algorithm. In order to obtain an out-of-place
+   *               function, a memcpy of the source vector is performed.
+   */
+void arm_heap_sort_f32(
+  const arm_sort_instance_f32 * S, 
+        float32_t * pSrc, 
+        float32_t * pDst, 
+        uint32_t blockSize)
+{
+    float32_t * pA;
+    int32_t i;
+    float32_t temp;
+
+    if(pSrc != pDst) // out-of-place
+    {   
+        memcpy(pDst, pSrc, blockSize*sizeof(float32_t) );
+        pA = pDst;
+    }
+    else
+        pA = pSrc;
+
+    // Build the heap array so that the largest value is the root
+    for (i = blockSize/2 - 1; i >= 0; i--) 
+        arm_heapify(pA, blockSize, i, S->dir); 
+
+    for (i = blockSize - 1; i >= 0; i--)
+    {
+        // Swap
+	temp = pA[i];
+	pA[i] = pA[0];
+        pA[0] = temp;
+
+        // Restore heap order
+	arm_heapify(pA, i, 0, S->dir);
+    }
+}
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_insertion_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_insertion_sort_f32.c
new file mode 100644
index 00000000..4e850438
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_insertion_sort_f32.c
@@ -0,0 +1,93 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_insertion_sort_f32.c
+ * Description:  Floating point insertion sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+#include "arm_sorting.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+/**
+   * @private
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   *
+   * @par        Algorithm
+   *               The insertion sort is a simple sorting algorithm that
+   *               reads all the element of the input array and removes one element 
+   *               at a time, finds the location it belongs in the final sorted list, 
+   *               and inserts it there. 
+   *
+   * @par          It's an in-place algorithm. In order to obtain an out-of-place
+   *               function, a memcpy of the source vector is performed.
+   */
+
+void arm_insertion_sort_f32(
+  const arm_sort_instance_f32 * S, 
+        float32_t *pSrc, 
+        float32_t* pDst, 
+        uint32_t blockSize)
+{
+    float32_t * pA;
+    uint8_t dir = S->dir;
+    uint32_t i, j;
+    float32_t temp;
+
+    if(pSrc != pDst) // out-of-place
+    {   
+        memcpy(pDst, pSrc, blockSize*sizeof(float32_t) );
+        pA = pDst;
+    }
+    else
+        pA = pSrc;
+ 
+    // Real all the element of the input array
+    for(i=0; i<blockSize; i++)
+    {
+	// Move the i-th element to the right position
+        for (j = i; j>0 && dir==(pA[j]<pA[j-1]); j--)
+        {
+	    // Swap
+            temp = pA[j];
+	    pA[j] = pA[j-1];
+	    pA[j-1] = temp;
+        }
+    }
+} 
+
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_f32.c
new file mode 100644
index 00000000..5c212013
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_f32.c
@@ -0,0 +1,127 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_merge_sort_f32.c
+ * Description:  Floating point merge sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+#include "arm_sorting.h"
+
+
+static void topDownMerge(float32_t * pA, uint32_t begin, uint32_t middle, uint32_t end, float32_t * pB, uint8_t dir)
+{
+    /* Left  array is pA[begin:middle-1]
+     * Right Array is pA[middle:end-1] 
+     * They are merged in pB
+     */
+
+    uint32_t i = begin;
+    uint32_t j = middle;
+    uint32_t k;
+ 
+    // Read all the elements in the sublist
+    for (k = begin; k < end; k++)
+    {
+	// Merge 
+        if (i < middle && (j >= end || dir==(pA[i] <= pA[j])) )
+        {
+            pB[k] = pA[i];
+            i++;
+        }
+        else
+        {
+            pB[k] = pA[j];
+            j++;
+        }
+    }
+}
+
+static void arm_merge_sort_core_f32(float32_t * pB, uint32_t begin, uint32_t end, float32_t * pA, uint8_t dir)
+{
+    if((int32_t)end - (int32_t)begin >= 2 )           // If run size != 1 divide
+    {                                 
+        int32_t middle = (end + begin) / 2;           // Take the middle point
+
+        arm_merge_sort_core_f32(pA, begin,  middle, pB, dir);  // Sort the left part
+        arm_merge_sort_core_f32(pA, middle,    end, pB, dir);  // Sort the right part
+
+        topDownMerge(pB, begin, middle, end, pA, dir);
+    }
+}
+
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+/**
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   *
+   * @par        Algorithm
+   *               The merge sort algorithm is a comparison algorithm that
+   *               divide the input array in sublists and merge them to produce
+   *               longer sorted sublists until there is only one list remaining.
+   *
+   * @par          A work array is always needed. It must be allocated by the user 
+   *               linked to the instance at initialization time.
+   *
+   * @par          It's an in-place algorithm. In order to obtain an out-of-place
+   *               function, a memcpy of the source vector is performed
+   */
+
+
+void arm_merge_sort_f32(
+  const arm_merge_sort_instance_f32 * S, 
+        float32_t *pSrc, 
+        float32_t *pDst, 
+        uint32_t blockSize)
+{
+    float32_t * pA;
+
+    /* Out-of-place */ 
+    if(pSrc != pDst)
+    {
+        memcpy(pDst, pSrc, blockSize*sizeof(float32_t));
+        pA = pDst;
+    }
+    else
+        pA = pSrc;
+
+    /* A working buffer is needed */
+    memcpy(S->buffer, pSrc, blockSize*sizeof(float32_t));
+
+    arm_merge_sort_core_f32(S->buffer, 0, blockSize, pA, S->dir);
+}
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_init_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_init_f32.c
new file mode 100644
index 00000000..bd93a00f
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_merge_sort_init_f32.c
@@ -0,0 +1,53 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_merge_sort_init_f32.c
+ * Description:  Floating point merge sort initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+
+  /**
+   * @param[in,out]  S            points to an instance of the sorting structure.
+   * @param[in]      dir          Sorting order.
+   * @param[in]      buffer       Working buffer.
+   */
+void arm_merge_sort_init_f32(arm_merge_sort_instance_f32 * S, arm_sort_dir dir, float32_t * buffer)
+{
+    S->dir    = dir;
+    S->buffer = buffer;
+}
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_f16.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_f16.c
new file mode 100755
index 00000000..22a7eaaa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_f16.c
@@ -0,0 +1,155 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_float.c
+ * Description:  Converts the elements of the Q15 vector to floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q15_to_x  Convert 16-bit fixed point value
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to f16 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the f16 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (float16_t) pSrc[n] / 32768;   0 <= n < blockSize.
+  </pre>
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_q15_to_f16(
+  const q15_t * pSrc,
+  float16_t * pDst,
+  uint32_t blockSize)
+{
+    int32_t  blkCnt;           /* loop counters */
+    q15x8_t vecDst;
+    q15_t const *pSrcVec;
+
+    pSrcVec = (q15_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0)
+    {
+        /* C = (float16_t) A / 32768 */
+        /* convert from q15 to float and then store the results in the destination buffer */
+        vecDst = vld1q(pSrcVec);   pSrcVec += 8;
+        vstrhq(pDst, vcvtq_n_f16_s16(vecDst, 15));  pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 7;
+    if (blkCnt > 0)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+        vecDst = vld1q(pSrcVec);   pSrcVec += 8;
+        vstrhq_p(pDst, vcvtq_n_f16_s16(vecDst, 15), p0);
+    }
+}
+#else
+
+void arm_q15_to_f16(
+  const q15_t * pSrc,
+        float16_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float16_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((_Float16) * pIn++ / 32768.0f16);
+    *pDst++ = ((_Float16) * pIn++ / 32768.0f16);
+    *pDst++ = ((_Float16) * pIn++ / 32768.0f16);
+    *pDst++ = ((_Float16) * pIn++ / 32768.0f16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float16_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((_Float16) *pIn++ / 32768.0f16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of q15_to_x group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
index a87946cc..1a20defe 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_float.c
@@ -1,166 +1,207 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q15_to_float.c
- * Description:  Converts the elements of the Q15 vector to floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
- * @defgroup q15_to_x  Convert 16-bit Integer value
- */
-
-/**
-  @addtogroup q15_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q15 vector to floating-point vector.
-  @param[in]     pSrc       points to the Q15 input vector
-  @param[out]    pDst       points to the floating-point output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.
-  </pre>
- */
-
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_q15_to_float(
-  const q15_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  const q15_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-  int16x8_t inV;
-  int32x4_t inV0, inV1;
-  float32x4_t outV;
-
-  blkCnt = blockSize >> 3U;
-
-  /* Compute 8 outputs at a time.
-   ** a second loop below computes the remaining 1 to 7 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    inV = vld1q_s16(pIn);
-    pIn += 8;
-
-    inV0 = vmovl_s16(vget_low_s16(inV));
-    inV1 = vmovl_s16(vget_high_s16(inV));
-
-    outV = vcvtq_n_f32_s32(inV0,15);
-    vst1q_f32(pDst, outV);
-    pDst += 4;
-
-    outV = vcvtq_n_f32_s32(inV1,15);
-    vst1q_f32(pDst, outV);
-    pDst += 4;
-  
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 7;
-
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 32768 */
-    /* convert from q15 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-#else
-void arm_q15_to_float(
-  const q15_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q15_t *pIn = pSrc;                             /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 32768 */
-
-    /* Convert from q15 to float and store result in destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 32768 */
-
-    /* Convert from q15 to float and store result in destination buffer */
-    *pDst++ = ((float32_t) *pIn++ / 32768.0f);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of q15_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_float.c
+ * Description:  Converts the elements of the Q15 vector to floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q15_to_x  Convert 16-bit fixed point value
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (float32_t) pSrc[n] / 32768;   0 <= n < blockSize.
+  </pre>
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q15_to_float(
+  const q15_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  uint32_t blkCnt;
+
+  q15x8_t vecDst;
+  q15_t const *pSrcVec;
+
+  pSrcVec = (q15_t const *) pSrc;
+  blkCnt = blockSize >> 2;
+  while (blkCnt > 0U)
+  {
+      /* C = (float32_t) A / 32768 */
+      /* convert from q15 to float and then store the results in the destination buffer */
+      vecDst = vldrhq_s32(pSrcVec);
+      pSrcVec += 4;
+      vstrwq(pDst, vcvtq_n_f32_s32((int32x4_t)vecDst, 15));
+      pDst += 4;
+      /*
+       * Decrement the blockSize loop counter
+       */
+      blkCnt--;
+  }
+
+  blkCnt = blockSize & 3;
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pSrcVec++ / 32768.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_q15_to_float(
+  const q15_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  const q15_t *pIn = pSrc;                             /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  int16x8_t inV;
+  int32x4_t inV0, inV1;
+  float32x4_t outV;
+
+  blkCnt = blockSize >> 3U;
+
+  /* Compute 8 outputs at a time.
+   ** a second loop below computes the remaining 1 to 7 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+    /* convert from q15 to float and then store the results in the destination buffer */
+    inV = vld1q_s16(pIn);
+    pIn += 8;
+
+    inV0 = vmovl_s16(vget_low_s16(inV));
+    inV1 = vmovl_s16(vget_high_s16(inV));
+
+    outV = vcvtq_n_f32_s32(inV0,15);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inV1,15);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 8, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 7;
+
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+    /* convert from q15 to float and then store the results in the destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q15_to_float(
+  const q15_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+    *pDst++ = ((float32_t) * pIn++ / 32768.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 32768 */
+
+    /* Convert from q15 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 32768.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of q15_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
index c7451215..468b997b 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q31.c
@@ -1,138 +1,182 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q15_to_q31.c
- * Description:  Converts the elements of the Q15 vector to Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup q15_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q15 vector to Q31 vector.
-  @param[in]     pSrc       points to the Q15 input vector
-  @param[out]    pDst       points to the Q31 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
-  </pre>
- */
-
-void arm_q15_to_q31(
-  const q15_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q15_t *pIn = pSrc;                             /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-        q31_t in1, in2;
-        q31_t out1, out2, out3, out4;
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q31_t)A << 16 */
-
-    /* Convert from q15 to q31 and store result in destination buffer */
-    in1 = read_q15x2_ia ((q15_t **) &pIn);
-    in2 = read_q15x2_ia ((q15_t **) &pIn);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    /* extract lower 16 bits to 32 bit result */
-    out1 = in1 << 16U;
-    /* extract upper 16 bits to 32 bit result */
-    out2 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out3 = in2 << 16U;
-    /* extract upper 16 bits to 32 bit result */
-    out4 = in2 & 0xFFFF0000;
-
-#else
-
-    /* extract upper 16 bits to 32 bit result */
-    out1 = in1 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out2 = in1 << 16U;
-    /* extract upper 16 bits to 32 bit result */
-    out3 = in2 & 0xFFFF0000;
-    /* extract lower 16 bits to 32 bit result */
-    out4 = in2 << 16U;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    *pDst++ = out1;
-    *pDst++ = out2;
-    *pDst++ = out3;
-    *pDst++ = out4;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q31_t) A << 16 */
-
-    /* Convert from q15 to q31 and store result in destination buffer */
-    *pDst++ = (q31_t) *pIn++ << 16;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of q15_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_q31.c
+ * Description:  Converts the elements of the Q15 vector to Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to Q31 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q31_t) pSrc[n] << 16;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q15_to_q31(
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+
+  uint32_t blkCnt;
+
+  q31x4_t         vecDst;
+
+  blkCnt = blockSize>> 2;
+  while (blkCnt > 0U)
+  {
+
+        /* C = (q31_t)A << 16 */
+        /* convert from q15 to q31 and then store the results in the destination buffer */
+        /* load q15 + 32-bit widening */
+        vecDst = vldrhq_s32((q15_t const *) pSrc);
+        vecDst = vshlq_n(vecDst, 16);
+        vstrwq_s32(pDst, vecDst);
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pDst += 4;
+        pSrc += 4;
+        blkCnt --;
+    }
+
+  blkCnt = blockSize & 3;
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) *pSrc++ << 16;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q15_to_q31(
+  const q15_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+        q31_t in1, in2;
+        q31_t out1, out2, out3, out4;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t)A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    in1 = read_q15x2_ia ((q15_t **) &pIn);
+    in2 = read_q15x2_ia ((q15_t **) &pIn);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    /* extract lower 16 bits to 32 bit result */
+    out1 = in1 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out2 = in1 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out3 = in2 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out4 = in2 & 0xFFFF0000;
+
+#else
+
+    /* extract upper 16 bits to 32 bit result */
+    out1 = in1 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out2 = in1 << 16U;
+    /* extract upper 16 bits to 32 bit result */
+    out3 = in2 & 0xFFFF0000;
+    /* extract lower 16 bits to 32 bit result */
+    out4 = in2 << 16U;
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    *pDst++ = out1;
+    *pDst++ = out2;
+    *pDst++ = out3;
+    *pDst++ = out4;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 16 */
+
+    /* Convert from q15 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) *pIn++ << 16;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of q15_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
index 4f90d561..8fbd4710 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q15_to_q7.c
@@ -1,146 +1,190 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q15_to_q7.c
- * Description:  Converts the elements of the Q15 vector to Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup q15_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q15 vector to Q7 vector.
-  @param[in]     pSrc       points to the Q15 input vector
-  @param[out]    pDst       points to the Q7 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.
-  </pre>
- */
-
-void arm_q15_to_q7(
-  const q15_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q15_t *pIn = pSrc;                             /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in1, in2;
-        q31_t out1, out2;
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q7_t) A >> 8 */
-
-    /* Convert from q15 to q7 and store result in destination buffer */
-#if defined (ARM_MATH_DSP)
-
-    in1 = read_q15x2_ia ((q15_t **) &pIn);
-    in2 = read_q15x2_ia ((q15_t **) &pIn);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHBT(in2, in1, 16);
-
-#else
-
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in1, in2, 16);
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* rotate packed value by 24 */
-    out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
-
-    /* anding with 0xff00ff00 to get two 8 bit values */
-    out1 = out1 & 0xFF00FF00;
-    /* anding with 0x00ff00ff to get two 8 bit values */
-    out2 = out2 & 0x00FF00FF;
-
-    /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
-    out1 = out1 | out2;
-
-    /* store 4 samples at a time to destiantion buffer */
-    write_q7x4_ia (&pDst, out1);
-
-#else
-
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q7_t) A >> 8 */
-
-    /* Convert from q15 to q7 and store result in destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 8);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of q15_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q15_to_q7.c
+ * Description:  Converts the elements of the Q15 vector to Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q15_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q15 vector to Q7 vector.
+  @param[in]     pSrc       points to the Q15 input vector
+  @param[out]    pDst       points to the Q7 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q7_t) pSrc[n] >> 8;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q15_to_q7(
+  const q15_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8x2_t tmp;
+    q15_t const *pSrcVec;
+    q7x16_t vecDst;
+
+
+    pSrcVec = (q15_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        /* C = (q7_t) A >> 8 */
+        /* convert from q15 to q7 and then store the results in the destination buffer */
+        tmp = vld2q(pSrcVec);   
+        pSrcVec += 16;
+        vecDst = vqshrnbq_n_s16(vecDst, tmp.val[0], 8);
+        vecDst = vqshrntq_n_s16(vecDst, tmp.val[1], 8);
+        vst1q(pDst, vecDst);    
+        pDst += 16;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+  blkCnt = blockSize & 0xF;
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) A >> 8 */
+
+    /* Convert from q15 to q7 and store result in destination buffer */
+    *pDst++ = (q7_t) (*pSrcVec++ >> 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q15_to_q7(
+  const q15_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q15_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in1, in2;
+        q31_t out1, out2;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) A >> 8 */
+
+    /* Convert from q15 to q7 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in1 = read_q15x2_ia ((q15_t **) &pIn);
+    in2 = read_q15x2_ia ((q15_t **) &pIn);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    out1 = __PKHTB(in2, in1, 16);
+    out2 = __PKHBT(in2, in1, 16);
+
+#else
+
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHBT(in1, in2, 16);
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* rotate packed value by 24 */
+    out2 = ((uint32_t) out2 << 8) | ((uint32_t) out2 >> 24);
+
+    /* anding with 0xff00ff00 to get two 8 bit values */
+    out1 = out1 & 0xFF00FF00;
+    /* anding with 0x00ff00ff to get two 8 bit values */
+    out2 = out2 & 0x00FF00FF;
+
+    /* oring two values(contains two 8 bit values) to get four packed 8 bit values */
+    out1 = out1 | out2;
+
+    /* store 4 samples at a time to destiantion buffer */
+    write_q7x4_ia (&pDst, out1);
+
+#else
+
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) A >> 8 */
+
+    /* Convert from q15 to q7 and store result in destination buffer */
+    *pDst++ = (q7_t) (*pIn++ >> 8);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of q15_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
index 8ff9e7b5..ce7ce422 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_float.c
@@ -1,159 +1,202 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q31_to_float.c
- * Description:  Converts the elements of the Q31 vector to floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
- * @defgroup q31_to_x  Convert 32-bit Integer value
- */
-
-/**
-  @addtogroup q31_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q31 vector to floating-point vector.
-  @param[in]     pSrc       points to the Q31 input vector
-  @param[out]    pDst       points to the floating-point output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.
-  </pre>
- */
-
-#if defined(ARM_MATH_NEON_EXPERIMENTAL)
-void arm_q31_to_float(
-  const q31_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-  const q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-  int32x4_t inV;
-  float32x4_t outV;
-
-  blkCnt = blockSize >> 2U;
-
-  /* Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* Convert from q31 to float and then store the results in the destination buffer */
-    inV = vld1q_s32(pIn);
-    pIn += 4;
-
-    outV = vcvtq_n_f32_s32(inV,31);
-
-    vst1q_f32(pDst, outV);
-    pDst += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 3;
-
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 2147483648 */
-    /* Convert from q31 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-#else
-void arm_q31_to_float(
-  const q31_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  const q31_t *pIn = pSrc;                             /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 2147483648 */
-
-    /* Convert from q31 to float and store result in destination buffer */
-    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
-    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 2147483648 */
-
-    /* Convert from q31 to float and store result in destination buffer */
-    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of q31_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q31_to_float.c
+ * Description:  Converts the elements of the Q31 vector to floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q31_to_x  Convert 32-bit fixed point value
+ */
+
+/**
+  @addtogroup q31_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q31 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (float32_t) pSrc[n] / 2147483648;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q31_to_float(
+  const q31_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4_t vecDst;
+    q31_t const *pSrcVec;
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /* C = (float32_t) A / 2147483648 */
+        /* convert from q31 to float and then store the results in the destination buffer */
+        vecDst = vld1q(pSrcVec);   
+        pSrcVec += 4;
+        vstrwq(pDst, vcvtq_n_f32_s32(vecDst, 31));  
+        pDst += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = blockSize & 3;
+    while (blkCnt > 0U)
+    {
+      /* C = (float32_t) A / 2147483648 */
+  
+      /* Convert from q31 to float and store result in destination buffer */
+      *pDst++ = ((float32_t) *pSrcVec++ / 2147483648.0f);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+#if defined(ARM_MATH_NEON_EXPERIMENTAL)
+void arm_q31_to_float(
+  const q31_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  int32x4_t inV;
+  float32x4_t outV;
+
+  blkCnt = blockSize >> 2U;
+
+  /* Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+    /* Convert from q31 to float and then store the results in the destination buffer */
+    inV = vld1q_s32(pIn);
+    pIn += 4;
+
+    outV = vcvtq_n_f32_s32(inV,31);
+
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 3;
+
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+    /* Convert from q31 to float and then store the results in the destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 2147483648.0f);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q31_to_float(
+  const q31_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  const q31_t *pIn = pSrc;                             /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+
+    /* Convert from q31 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 2147483648 */
+
+    /* Convert from q31 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) *pIn++ / 2147483648.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of q31_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
index 8dac98d2..a25a2bb1 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q15.c
@@ -1,134 +1,181 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q31_to_q15.c
- * Description:  Converts the elements of the Q31 vector to Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup q31_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q31 vector to Q15 vector.
-  @param[in]     pSrc       points to the Q31 input vector
-  @param[out]    pDst       points to the Q15 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.
-  </pre>
- */
-
-void arm_q31_to_q15(
-  const q31_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q31_t *pIn = pSrc;                             /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in1, in2, in3, in4;
-        q31_t out1, out2;
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q15_t) (A >> 16) */
-
-    /* Convert from q31 to q15 and store result in destination buffer */
-#if defined (ARM_MATH_DSP)
-
-    in1 = *pIn++;
-    in2 = *pIn++;
-    in3 = *pIn++;
-    in4 = *pIn++;
-
-    /* pack two higher 16-bit values from two 32-bit values */
-#ifndef ARM_MATH_BIG_ENDIAN
-    out1 = __PKHTB(in2, in1, 16);
-    out2 = __PKHTB(in4, in3, 16);
-#else
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHTB(in3, in4, 16);
-#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
-
-    write_q15x2_ia (&pDst, out1);
-    write_q15x2_ia (&pDst, out2);
-
-#else
-
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q15_t) (A >> 16) */
-
-    /* Convert from q31 to q15 and store result in destination buffer */
-    *pDst++ = (q15_t) (*pIn++ >> 16);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of q31_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q31_to_q15.c
+ * Description:  Converts the elements of the Q31 vector to Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q31_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q31 vector to Q15 vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q15_t) pSrc[n] >> 16;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q31_to_q15(
+  const q31_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4x2_t tmp;
+    q15x8_t vecDst;
+    q31_t const *pSrcVec;
+
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /* C = (q15_t) A >> 16 */
+        /* convert from q31 to q15 and then store the results in the destination buffer */
+        tmp = vld2q(pSrcVec);   
+        pSrcVec += 8;
+        vecDst = vshrnbq_n_s32(vecDst, tmp.val[0], 16);
+        vecDst = vshrntq_n_s32(vecDst, tmp.val[1], 16);
+        vst1q(pDst, vecDst);    
+        pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 7;
+    while (blkCnt > 0U)
+    {
+      /* C = (q15_t) (A >> 16) */
+  
+      /* Convert from q31 to q15 and store result in destination buffer */
+      *pDst++ = (q15_t) (*pSrcVec++ >> 16);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+
+#else
+void arm_q31_to_q15(
+  const q31_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in1, in2, in3, in4;
+        q31_t out1, out2;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) (A >> 16) */
+
+    /* Convert from q31 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in1 = *pIn++;
+    in2 = *pIn++;
+    in3 = *pIn++;
+    in4 = *pIn++;
+
+    /* pack two higher 16-bit values from two 32-bit values */
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __PKHTB(in2, in1, 16);
+    out2 = __PKHTB(in4, in3, 16);
+#else
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHTB(in3, in4, 16);
+#endif /* #ifdef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2_ia (&pDst, out1);
+    write_q15x2_ia (&pDst, out2);
+
+#else
+
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) (A >> 16) */
+
+    /* Convert from q31 to q15 and store result in destination buffer */
+    *pDst++ = (q15_t) (*pIn++ >> 16);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of q31_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
index 80433d04..16fbe186 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q31_to_q7.c
@@ -1,110 +1,169 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q31_to_q7.c
- * Description:  Converts the elements of the Q31 vector to Q7 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup q31_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q31 vector to Q7 vector.
-  @param[in]     pSrc       points to the Q31 input vector
-  @param[out]    pDst       points to the Q7 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.
-  </pre>
- */
-
-void arm_q31_to_q7(
-  const q31_t * pSrc,
-        q7_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q31_t *pIn = pSrc;                             /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  q7_t out1, out2, out3, out4;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q7_t) (A >> 24) */
-
-    /* Convert from q31 to q7 and store result in destination buffer */
-
-    out1 = (q7_t) (*pIn++ >> 24);
-    out2 = (q7_t) (*pIn++ >> 24);
-    out3 = (q7_t) (*pIn++ >> 24);
-    out4 = (q7_t) (*pIn++ >> 24);
-    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q7_t) (A >> 24) */
-
-    /* Convert from q31 to q7 and store result in destination buffer */
-    *pDst++ = (q7_t) (*pIn++ >> 24);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of q31_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q31_to_q7.c
+ * Description:  Converts the elements of the Q31 vector to Q7 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q31_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q31 vector to Q7 vector.
+  @param[in]     pSrc       points to the Q31 input vector
+  @param[out]    pDst       points to the Q7 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q7_t) pSrc[n] >> 24;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q31_to_q7(
+  const q31_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q31x4x4_t tmp;
+    q15x8_t evVec, oddVec;
+    q7x16_t  vecDst;
+    q31_t const *pSrcVec;
+
+    pSrcVec = (q31_t const *) pSrc;
+    blkCnt = blockSize >> 4;
+    while (blkCnt > 0U)
+    {
+        tmp = vld4q(pSrcVec);  
+        pSrcVec += 16;
+        /* C = (q7_t) A >> 24 */
+        /* convert from q31 to q7 and then store the results in the destination buffer */
+        /*
+         * narrow and pack evens
+         */
+        evVec = vshrnbq_n_s32(evVec, tmp.val[0], 16);
+        evVec = vshrntq_n_s32(evVec, tmp.val[2], 16);
+        /*
+         * narrow and pack odds
+         */
+        oddVec = vshrnbq_n_s32(oddVec, tmp.val[1], 16);
+        oddVec = vshrntq_n_s32(oddVec, tmp.val[3], 16);
+        /*
+         * narrow & merge
+         */
+        vecDst = vshrnbq_n_s16(vecDst, evVec, 8);
+        vecDst = vshrntq_n_s16(vecDst, oddVec, 8);
+
+        vst1q(pDst, vecDst);    
+        pDst += 16;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+    /*
+     * tail
+     */
+    blkCnt = blockSize & 0xF;
+    while (blkCnt > 0U)
+    {
+      /* C = (q7_t) (A >> 24) */
+  
+      /* Convert from q31 to q7 and store result in destination buffer */
+      *pDst++ = (q7_t) (*pSrcVec++ >> 24);
+  
+      /* Decrement loop counter */
+      blkCnt--;
+    }
+}
+#else
+void arm_q31_to_q7(
+  const q31_t * pSrc,
+        q7_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q31_t *pIn = pSrc;                             /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  q7_t out1, out2, out3, out4;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) (A >> 24) */
+
+    /* Convert from q31 to q7 and store result in destination buffer */
+
+    out1 = (q7_t) (*pIn++ >> 24);
+    out2 = (q7_t) (*pIn++ >> 24);
+    out3 = (q7_t) (*pIn++ >> 24);
+    out4 = (q7_t) (*pIn++ >> 24);
+    write_q7x4_ia (&pDst, __PACKq7(out1, out2, out3, out4));
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q7_t) (A >> 24) */
+
+    /* Convert from q31 to q7 and store result in destination buffer */
+    *pDst++ = (q7_t) (*pIn++ >> 24);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of q31_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
index eee0d988..9cbf8ad0 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_float.c
@@ -1,179 +1,218 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q7_to_float.c
- * Description:  Converts the elements of the Q7 vector to floating-point vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
- * @defgroup q7_to_x  Convert 8-bit Integer value
- */
-
-/**
-  @addtogroup q7_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q7 vector to floating-point vector.
-  @param[in]     pSrc       points to the Q7 input vector
-  @param[out]    pDst       points to the floating-point output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
- @par            Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.
-  </pre>
- */
-
-#if defined(ARM_MATH_NEON)
-void arm_q7_to_float(
-  const q7_t * pSrc,
-  float32_t * pDst,
-  uint32_t blockSize)
-{
-  const q7_t *pIn = pSrc;                              /* Src pointer */
-  uint32_t blkCnt;                               /* loop counter */
-
-  int8x16_t inV;
-  int16x8_t inVLO, inVHI;
-  int32x4_t inVLL, inVLH, inVHL, inVHH;
-  float32x4_t outV;
-
-  blkCnt = blockSize >> 4U;
-
-  /* Compute 16 outputs at a time.
-   ** a second loop below computes the remaining 1 to 15 samples. */
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 128 */
-    /* Convert from q7 to float and then store the results in the destination buffer */
-    inV = vld1q_s8(pIn);
-    pIn += 16;
-
-    inVLO = vmovl_s8(vget_low_s8(inV));
-    inVHI = vmovl_s8(vget_high_s8(inV));
-
-    inVLL = vmovl_s16(vget_low_s16(inVLO));
-    inVLH = vmovl_s16(vget_high_s16(inVLO));
-    inVHL = vmovl_s16(vget_low_s16(inVHI));
-    inVHH = vmovl_s16(vget_high_s16(inVHI));
-
-    outV = vcvtq_n_f32_s32(inVLL,7);
-    vst1q_f32(pDst, outV);
-    pDst += 4;
-
-    outV = vcvtq_n_f32_s32(inVLH,7);
-    vst1q_f32(pDst, outV);
-    pDst += 4;
-
-    outV = vcvtq_n_f32_s32(inVHL,7);
-    vst1q_f32(pDst, outV);
-    pDst += 4;
-
-    outV = vcvtq_n_f32_s32(inVHH,7);
-    vst1q_f32(pDst, outV);
-    pDst += 4;
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-
-  /* If the blockSize is not a multiple of 16, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  blkCnt = blockSize & 0xF;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 128 */
-    /* Convert from q7 to float and then store the results in the destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement the loop counter */
-    blkCnt--;
-  }
-}
-#else
-void arm_q7_to_float(
-  const q7_t * pSrc,
-        float32_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q7_t *pIn = pSrc;                              /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 128 */
-
-    /* Convert from q7 to float and store result in destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (float32_t) A / 128 */
-
-    /* Convert from q7 to float and store result in destination buffer */
-    *pDst++ = ((float32_t) * pIn++ / 128.0f);
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-#endif /* #if defined(ARM_MATH_NEON) */
-
-/**
-  @} end of q7_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q7_to_float.c
+ * Description:  Converts the elements of the Q7 vector to floating-point vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup q7_to_x  Convert 8-bit fixed point value
+ */
+
+/**
+  @addtogroup q7_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q7 vector to floating-point vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the floating-point output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+ @par            Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (float32_t) pSrc[n] / 128;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q7_to_float(
+  const q7_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+    uint32_t  blkCnt;           /* loop counters */
+    q7x16_t vecDst;
+    q7_t const *pSrcVec;
+
+    pSrcVec = (q7_t const *) pSrc;
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+        /* C = (float32_t) A / 32768 */
+        /* convert from q7 to float and then store the results in the destination buffer */
+        vecDst = vldrbq_s32(pSrcVec);    
+        pSrcVec += 4;
+        vstrwq(pDst, vcvtq_n_f32_s32((int32x4_t)vecDst, 7));   
+        pDst += 4;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+  blkCnt = blockSize & 3;
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+
+    /* Convert from q7 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pSrcVec++ / 128.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+#else
+#if defined(ARM_MATH_NEON)
+void arm_q7_to_float(
+  const q7_t * pSrc,
+  float32_t * pDst,
+  uint32_t blockSize)
+{
+  const q7_t *pIn = pSrc;                              /* Src pointer */
+  uint32_t blkCnt;                               /* loop counter */
+
+  int8x16_t inV;
+  int16x8_t inVLO, inVHI;
+  int32x4_t inVLL, inVLH, inVHL, inVHH;
+  float32x4_t outV;
+
+  blkCnt = blockSize >> 4U;
+
+  /* Compute 16 outputs at a time.
+   ** a second loop below computes the remaining 1 to 15 samples. */
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+    /* Convert from q7 to float and then store the results in the destination buffer */
+    inV = vld1q_s8(pIn);
+    pIn += 16;
+
+    inVLO = vmovl_s8(vget_low_s8(inV));
+    inVHI = vmovl_s8(vget_high_s8(inV));
+
+    inVLL = vmovl_s16(vget_low_s16(inVLO));
+    inVLH = vmovl_s16(vget_high_s16(inVLO));
+    inVHL = vmovl_s16(vget_low_s16(inVHI));
+    inVHH = vmovl_s16(vget_high_s16(inVHI));
+
+    outV = vcvtq_n_f32_s32(inVLL,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVLH,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVHL,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    outV = vcvtq_n_f32_s32(inVHH,7);
+    vst1q_f32(pDst, outV);
+    pDst += 4;
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+
+  /* If the blockSize is not a multiple of 16, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  blkCnt = blockSize & 0xF;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+    /* Convert from q7 to float and then store the results in the destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement the loop counter */
+    blkCnt--;
+  }
+}
+#else
+void arm_q7_to_float(
+  const q7_t * pSrc,
+        float32_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+
+    /* Convert from q7 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (float32_t) A / 128 */
+
+    /* Convert from q7 to float and store result in destination buffer */
+    *pDst++ = ((float32_t) * pIn++ / 128.0f);
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* #if defined(ARM_MATH_NEON) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of q7_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
index 78dae9e6..afe3e799 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q15.c
@@ -1,143 +1,188 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q7_to_q15.c
- * Description:  Converts the elements of the Q7 vector to Q15 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup q7_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q7 vector to Q15 vector.
-  @param[in]     pSrc       points to the Q7 input vector
-  @param[out]    pDst       points to the Q15 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.
-  </pre>
- */
-
-void arm_q7_to_q15(
-  const q7_t * pSrc,
-        q15_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q7_t *pIn = pSrc;                              /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
-        q31_t in;
-        q31_t in1, in2;
-        q31_t out1, out2;
-#endif
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q15_t) A << 8 */
-
-    /* Convert from q7 to q15 and store result in destination buffer */
-#if defined (ARM_MATH_DSP)
-
-    in = read_q7x4_ia ((q7_t **) &pIn);
-
-    /* rotatate in by 8 and extend two q7_t values to q15_t values */
-    in1 = __SXTB16(__ROR(in, 8));
-
-    /* extend remainig two q7_t values to q15_t values */
-    in2 = __SXTB16(in);
-
-    in1 = in1 << 8U;
-    in2 = in2 << 8U;
-
-    in1 = in1 & 0xFF00FF00;
-    in2 = in2 & 0xFF00FF00;
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    out2 = __PKHTB(in1, in2, 16);
-    out1 = __PKHBT(in2, in1, 16);
-#else
-    out1 = __PKHTB(in1, in2, 16);
-    out2 = __PKHBT(in2, in1, 16);
-#endif
-
-    write_q15x2_ia (&pDst, out1);
-    write_q15x2_ia (&pDst, out2);
-
-#else
-
-    *pDst++ = (q15_t) *pIn++ << 8;
-    *pDst++ = (q15_t) *pIn++ << 8;
-    *pDst++ = (q15_t) *pIn++ << 8;
-    *pDst++ = (q15_t) *pIn++ << 8;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q15_t) A << 8 */
-
-    /* Convert from q7 to q15 and store result in destination buffer */
-    *pDst++ = (q15_t) * pIn++ << 8;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of q7_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q7_to_q15.c
+ * Description:  Converts the elements of the Q7 vector to Q15 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q7_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q7 vector to Q15 vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the Q15 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q15_t) pSrc[n] << 8;   0 <= n < blockSize.
+  </pre>
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q7_to_q15(
+  const q7_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+
+    uint32_t  blkCnt;           /* loop counters */
+    q15x8_t vecDst;
+    q7_t const *pSrcVec;
+
+
+    pSrcVec = (q7_t const *) pSrc;
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0U)
+    {
+        /* C = (q15_t) A << 8 */
+        /* convert from q7 to q15 and then store the results in the destination buffer */
+        /* load q7 + 32-bit widening */
+        vecDst = vldrbq_s16(pSrcVec);    
+        pSrcVec += 8;
+        vecDst = vecDst << 8;
+        vstrhq(pDst, vecDst);   
+        pDst += 8;
+        /*
+         * Decrement the blockSize loop counter
+         */
+        blkCnt--;
+    }
+
+  blkCnt = blockSize & 7;
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) A << 8 */
+
+    /* Convert from q7 to q15 and store result in destination buffer */
+    *pDst++ = (q15_t) * pSrcVec++ << 8;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#else
+void arm_q7_to_q15(
+  const q7_t * pSrc,
+        q15_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL) && defined (ARM_MATH_DSP)
+        q31_t in;
+        q31_t in1, in2;
+        q31_t out1, out2;
+#endif
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) A << 8 */
+
+    /* Convert from q7 to q15 and store result in destination buffer */
+#if defined (ARM_MATH_DSP)
+
+    in = read_q7x4_ia ((q7_t **) &pIn);
+
+    /* rotatate in by 8 and extend two q7_t values to q15_t values */
+    in1 = __SXTB16(__ROR(in, 8));
+
+    /* extend remainig two q7_t values to q15_t values */
+    in2 = __SXTB16(in);
+
+    in1 = in1 << 8U;
+    in2 = in2 << 8U;
+
+    in1 = in1 & 0xFF00FF00;
+    in2 = in2 & 0xFF00FF00;
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out2 = __PKHTB(in1, in2, 16);
+    out1 = __PKHBT(in2, in1, 16);
+#else
+    out1 = __PKHTB(in1, in2, 16);
+    out2 = __PKHBT(in2, in1, 16);
+#endif
+
+    write_q15x2_ia (&pDst, out1);
+    write_q15x2_ia (&pDst, out2);
+
+#else
+
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+    *pDst++ = (q15_t) *pIn++ << 8;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q15_t) A << 8 */
+
+    /* Convert from q7 to q15 and store result in destination buffer */
+    *pDst++ = (q15_t) * pIn++ << 8;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of q7_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
index 9d5cde94..f48affdb 100644
--- a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_q7_to_q31.c
@@ -1,121 +1,164 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_q7_to_q31.c
- * Description:  Converts the elements of the Q7 vector to Q31 vector
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupSupport
- */
-
-/**
-  @addtogroup q7_to_x
-  @{
- */
-
-/**
-  @brief         Converts the elements of the Q7 vector to Q31 vector.
-  @param[in]     pSrc       points to the Q7 input vector
-  @param[out]    pDst       points to the Q31 output vector
-  @param[in]     blockSize  number of samples in each vector
-  @return        none
-
-  @par           Details
-                   The equation used for the conversion process is:
-  <pre>
-      pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.
-  </pre>
- */
-
-void arm_q7_to_q31(
-  const q7_t * pSrc,
-        q31_t * pDst,
-        uint32_t blockSize)
-{
-        uint32_t blkCnt;                               /* Loop counter */
-  const q7_t *pIn = pSrc;                              /* Source pointer */
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        q31_t in;
-
-  /* Loop unrolling: Compute 4 outputs at a time */
-  blkCnt = blockSize >> 2U;
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q31_t) A << 24 */
-
-    /* Convert from q7 to q31 and store result in destination buffer */
-    in = read_q7x4_ia ((q7_t **) &pIn);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (in & 0xFF000000);
-
-#else
-
-    *pDst++ = (in & 0xFF000000);
-    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
-    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
-
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-  /* Loop unrolling: Compute remaining outputs */
-  blkCnt = blockSize % 0x4U;
-
-#else
-
-  /* Initialize blkCnt with number of samples */
-  blkCnt = blockSize;
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-  while (blkCnt > 0U)
-  {
-    /* C = (q31_t) A << 24 */
-
-    /* Convert from q7 to q31 and store result in destination buffer */
-    *pDst++ = (q31_t) * pIn++ << 24;
-
-    /* Decrement loop counter */
-    blkCnt--;
-  }
-
-}
-
-/**
-  @} end of q7_to_x group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_q7_to_q31.c
+ * Description:  Converts the elements of the Q7 vector to Q31 vector
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/support_functions.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup q7_to_x
+  @{
+ */
+
+/**
+  @brief         Converts the elements of the Q7 vector to Q31 vector.
+  @param[in]     pSrc       points to the Q7 input vector
+  @param[out]    pDst       points to the Q31 output vector
+  @param[in]     blockSize  number of samples in each vector
+  @return        none
+
+  @par           Details
+                   The equation used for the conversion process is:
+  <pre>
+      pDst[n] = (q31_t) pSrc[n] << 24;   0 <= n < blockSize.
+  </pre>
+ */
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+void arm_q7_to_q31(
+  const q7_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+    uint32_t blkCnt;   
+    q31x4_t         vecDst;
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0U)
+    {
+
+        /* C = (q31_t)A << 16 */
+        /* convert from q15 to q31 and then store the results in the destination buffer */
+        /* load q15 + 32-bit widening */
+        vecDst = vldrbq_s32((q7_t const *) pSrc);
+        vecDst = vshlq_n(vecDst, 24);
+        vstrwq_s32(pDst, vecDst);
+
+        /*
+         * Decrement the blockSize loop counter
+         * Advance vector source and destination pointers
+         */
+        pDst += 4;
+        pSrc += 4;
+        blkCnt --;
+     }
+
+  blkCnt = blockSize & 3;
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 24 */
+
+    /* Convert from q7 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) *pSrc++ << 24;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+}
+
+#else
+void arm_q7_to_q31(
+  const q7_t * pSrc,
+        q31_t * pDst,
+        uint32_t blockSize)
+{
+        uint32_t blkCnt;                               /* Loop counter */
+  const q7_t *pIn = pSrc;                              /* Source pointer */
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        q31_t in;
+
+  /* Loop unrolling: Compute 4 outputs at a time */
+  blkCnt = blockSize >> 2U;
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 24 */
+
+    /* Convert from q7 to q31 and store result in destination buffer */
+    in = read_q7x4_ia ((q7_t **) &pIn);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+
+    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
+    *pDst++ = (in & 0xFF000000);
+
+#else
+
+    *pDst++ = (in & 0xFF000000);
+    *pDst++ = (__ROR(in, 24)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 16)) & 0xFF000000;
+    *pDst++ = (__ROR(in, 8)) & 0xFF000000;
+
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+  /* Loop unrolling: Compute remaining outputs */
+  blkCnt = blockSize % 0x4U;
+
+#else
+
+  /* Initialize blkCnt with number of samples */
+  blkCnt = blockSize;
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+  while (blkCnt > 0U)
+  {
+    /* C = (q31_t) A << 24 */
+
+    /* Convert from q7 to q31 and store result in destination buffer */
+    *pDst++ = (q31_t) * pIn++ << 24;
+
+    /* Decrement loop counter */
+    blkCnt--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @} end of q7_to_x group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_quick_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_quick_sort_f32.c
new file mode 100644
index 00000000..c6c44d96
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_quick_sort_f32.c
@@ -0,0 +1,181 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_quick_sort_f32.c
+ * Description:  Floating point quick sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_sorting.h"
+
+static uint32_t arm_quick_sort_partition_f32(float32_t *pSrc, int32_t first, int32_t last, uint8_t dir)
+{
+    /* This function will be called */
+    int32_t i, j, pivot_index;
+    float32_t pivot;
+    float32_t temp;
+
+    /* The first element is the pivot */
+    pivot_index = first; 
+    pivot = pSrc[pivot_index];
+
+    /* Initialize indices for do-while loops */
+    i = first - 1;
+    j = last + 1; 
+
+    while(i < j) 
+    {
+        /* The loop will stop as soon as the indices i and j cross each other.
+         *
+         * This event will happen surely since the values of the indices are incremented and 
+         * decrement in the do-while loops that are executed at least once. 
+         * It is impossible to loop forever inside the do-while loops since the pivot is
+         * always an element of the array and the conditions cannot be always true (at least 
+         * the i-th or the j-th element will be equal to the pivot-th element).
+         * For example, in the extreme case of an ordered array the do-while loop related to i will stop
+         * at the first iteration (because pSrc[i]=pSrc[pivot] already), and the loop related to j
+         * will stop after (last-first) iterations (when j=pivot=i=first). j is returned and
+         * j+1 is going to be used as pivot by other calls of the function, until j=pivot=last. */ 
+
+        /* Move indices to the right and to the left */
+        if(dir)
+        {    
+            /* Compare left elements with pivot */
+            do
+            {
+                i++; 
+            } while (pSrc[i] < pivot && i<last);
+       
+            /* Compare right elements with pivot */
+            do
+            {
+                j--; 
+            } while (pSrc[j] > pivot);
+        }
+        else
+        {
+            /* Compare left elements with pivot */
+            do
+            {
+                i++; 
+            } while (pSrc[i] > pivot && i<last);
+        
+            /* Compare right elements with pivot */
+            do
+            {
+                j--; 
+            } while (pSrc[j] < pivot);
+        }
+
+        /* If the indices didn't cross each other */
+        if (i < j) 
+        { 
+            /* i and j are in the wrong position -> Swap */
+            temp=pSrc[i];
+            pSrc[i]=pSrc[j];
+            pSrc[j]=temp;
+        }
+    }
+
+    return j; 
+}
+
+static void arm_quick_sort_core_f32(float32_t *pSrc, int32_t first, int32_t last, uint8_t dir)
+{
+    /* If the array [first ... last] has more than one element */
+    if(first<last)
+    {
+        int32_t pivot;
+
+        /* Compute pivot */
+        pivot = arm_quick_sort_partition_f32(pSrc, first, last, dir);
+
+        /* Iterate algorithm with two sub-arrays [first ... pivot] and [pivot+1 ... last] */
+        arm_quick_sort_core_f32(pSrc, first,   pivot, dir);
+        arm_quick_sort_core_f32(pSrc, pivot+1, last,  dir);
+    }
+}
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+/**
+   * @private
+   * @param[in]      S          points to an instance of the sorting structure.
+   * @param[in,out]  pSrc       points to the block of input data.
+   * @param[out]     pDst       points to the block of output data.
+   * @param[in]      blockSize  number of samples to process.
+   *
+   * @par        Algorithm
+   *                The quick sort algorithm is a comparison algorithm that
+   *                divides the input array into two smaller sub-arrays and 
+   *                recursively sort them. An element of the array (the pivot)
+   *                is chosen, all the elements with values smaller than the 
+   *                pivot are moved before the pivot, while all elements with 
+   *                values greater than the pivot are moved after it (partition).
+   *
+   * @par
+   *                In this implementation the Hoare partition scheme has been 
+   *                used [Hoare, C. A. R. (1 January 1962). "Quicksort". The Computer
+   *                Journal. 5 (1): 10...16.] The first element has always been chosen
+   *                as the pivot. The partition algorithm guarantees that the returned
+   *                pivot is never placed outside the vector, since it is returned only 
+   *                when the pointers crossed each other. In this way it isn't 
+   *                possible to obtain empty partitions and infinite recursion is avoided.
+   *
+   * @par
+   *                It's an in-place algorithm. In order to obtain an out-of-place
+   *                function, a memcpy of the source vector is performed.
+   */
+
+void arm_quick_sort_f32(
+  const arm_sort_instance_f32 * S, 
+        float32_t * pSrc, 
+        float32_t * pDst, 
+        uint32_t blockSize)
+{
+    float32_t * pA;
+
+    /* Out-of-place */
+    if(pSrc != pDst) 
+    {   
+        memcpy(pDst, pSrc, blockSize*sizeof(float32_t) );
+        pA = pDst;
+    }
+    else
+        pA = pSrc;
+
+    arm_quick_sort_core_f32(pA, 0, blockSize-1, S->dir);
+    /* The previous function could be called recursively a maximum 
+     * of (blockSize-1) times, generating a stack consumption of 4*(blockSize-1) bytes. */
+}
+
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_selection_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_selection_sort_f32.c
new file mode 100644
index 00000000..ad534bc0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_selection_sort_f32.c
@@ -0,0 +1,107 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_selection_sort_f32.c
+ * Description:  Floating point selection sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_sorting.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+/**
+   * @private
+   * @param[in]  S          points to an instance of the sorting structure.
+   * @param[in]  pSrc       points to the block of input data.
+   * @param[out] pDst       points to the block of output data
+   * @param[in]  blockSize  number of samples to process.
+   *
+   * @par        Algorithm
+   *               The Selection sort algorithm is a comparison algorithm that
+   *               divides the input array into a sorted and an unsorted sublist 
+   *               (initially the sorted sublist is empty and the unsorted sublist
+   *               is the input array), looks for the smallest (or biggest)
+   *               element in the unsorted sublist, swapping it with the leftmost
+   *               one, and moving the sublists boundary one element to the right.
+   *
+   * @par          It's an in-place algorithm. In order to obtain an out-of-place
+   *               function, a memcpy of the source vector is performed.
+   */
+
+void arm_selection_sort_f32(
+  const arm_sort_instance_f32 * S, 
+        float32_t * pSrc, 
+        float32_t * pDst, 
+        uint32_t blockSize)
+{
+    uint32_t i, j, k;
+    uint8_t dir = S->dir;
+    float32_t temp;
+
+    float32_t * pA;
+
+    if(pSrc != pDst) // out-of-place
+    {
+        memcpy(pDst, pSrc, blockSize*sizeof(float32_t) );
+        pA = pDst;
+    }
+    else
+        pA = pSrc;
+
+    /*  Move the boundary one element to the right */
+    for (i=0; i<blockSize-1; i++)
+    {
+        /* Initialize the minimum/maximum as the first element */
+        k = i;
+
+        /* Look in the unsorted list to find the minimum/maximum value */
+        for (j=i+1; j<blockSize; j++)
+        {
+            if (dir==(pA[j] < pA[k]) )
+            {
+                /* Update value */
+                k = j;
+            }
+        }
+    
+        if (k != i) 
+        {
+            /* Swap the minimum/maximum with the leftmost element */
+            temp=pA[i];
+	    pA[i]=pA[k];
+	    pA[k]=temp;
+        }
+    }
+}
+
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_sort_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_sort_f32.c
new file mode 100644
index 00000000..43786dcb
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_sort_f32.c
@@ -0,0 +1,86 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sort_f32.c
+ * Description:  Floating point sort
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_sorting.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+
+/**
+ * @brief Generic sorting function
+ *
+ * @param[in]  S          points to an instance of the sorting structure.
+ * @param[in]  pSrc       points to the block of input data.
+ * @param[out] pDst       points to the block of output data.
+ * @param[in]  blockSize  number of samples to process.
+ */
+
+void arm_sort_f32(
+  const arm_sort_instance_f32 * S, 
+        float32_t * pSrc, 
+        float32_t * pDst, 
+        uint32_t blockSize)
+{
+    switch(S->alg)
+    {
+        case ARM_SORT_BITONIC:
+        arm_bitonic_sort_f32(S, pSrc, pDst, blockSize);
+        break;
+
+        case ARM_SORT_BUBBLE:
+        arm_bubble_sort_f32(S, pSrc, pDst, blockSize);
+        break;
+
+        case ARM_SORT_HEAP:
+        arm_heap_sort_f32(S, pSrc, pDst, blockSize);
+        break;
+
+        case ARM_SORT_INSERTION:
+        arm_insertion_sort_f32(S, pSrc, pDst, blockSize);
+        break;
+
+        case ARM_SORT_QUICK:
+        arm_quick_sort_f32(S, pSrc, pDst, blockSize);
+        break;
+
+        case ARM_SORT_SELECTION:
+        arm_selection_sort_f32(S, pSrc, pDst, blockSize);
+        break;
+    }
+}
+
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_sort_init_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_sort_init_f32.c
new file mode 100644
index 00000000..72ad9c55
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_sort_init_f32.c
@@ -0,0 +1,54 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_sort_init_f32.c
+ * Description:  Floating point sort initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_sorting.h"
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @addtogroup Sorting
+  @{
+ */
+
+
+  /**
+   * @param[in,out]  S            points to an instance of the sorting structure.
+   * @param[in]      alg          Selected algorithm.
+   * @param[in]      dir          Sorting order.
+   */
+void arm_sort_init_f32(arm_sort_instance_f32 * S, arm_sort_alg alg, arm_sort_dir dir)
+{
+    S->alg         = alg;
+    S->dir         = dir;
+}
+
+/**
+  @} end of Sorting group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f16.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f16.c
new file mode 100755
index 00000000..f9aae6b0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f16.c
@@ -0,0 +1,146 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_weighted_sum_f16.c
+ * Description:  Weighted Sum
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <limits.h>
+#include <math.h>
+
+#include "dsp/support_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+  @defgroup weightedsum Weighted Sum
+
+  Weighted sum of values
+ */
+
+
+/**
+ * @addtogroup weightedsum
+ * @{
+ */
+
+
+/**
+ * @brief Weighted sum
+ *
+ *
+ * @param[in]    *in           Array of input values.
+ * @param[in]    *weigths      Weights
+ * @param[in]    blockSize     Number of samples in the input array.
+ * @return       Weighted sum
+ *
+ */
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+float16_t arm_weighted_sum_f16(const float16_t *in,const float16_t *weigths, uint32_t blockSize)
+{
+    _Float16       accum1, accum2;
+    float16x8_t    accum1V, accum2V;
+    float16x8_t    inV, wV;
+    const float16_t *pIn, *pW;
+    uint32_t        blkCnt;
+
+
+    pIn = in;
+    pW = weigths;
+
+
+    accum1V = vdupq_n_f16(0.0f16);
+    accum2V = vdupq_n_f16(0.0f16);
+
+    blkCnt = blockSize >> 3;
+    while (blkCnt > 0) 
+    {
+        inV = vld1q(pIn);
+        wV = vld1q(pW);
+
+        pIn += 4;
+        pW += 4;
+
+        accum1V = vfmaq(accum1V, inV, wV);
+        accum2V = vaddq(accum2V, wV);
+        blkCnt--;
+    }
+
+    accum1 = vecAddAcrossF16Mve(accum1V);
+    accum2 = vecAddAcrossF16Mve(accum2V);
+
+    blkCnt = blockSize & 7;
+    while(blkCnt > 0)
+    {
+        accum1 += (_Float16)*pIn++ * (_Float16)*pW;
+        accum2 += (_Float16)*pW++;
+        blkCnt--;
+    }
+
+
+    return (accum1 / accum2);
+}
+
+#else
+
+float16_t arm_weighted_sum_f16(const float16_t *in, const float16_t *weigths, uint32_t blockSize)
+{
+
+    _Float16 accum1, accum2;
+    const float16_t *pIn, *pW;
+    uint32_t blkCnt;
+
+
+    pIn = in;
+    pW = weigths;
+
+    accum1=0.0f16;
+    accum2=0.0f16;
+
+    blkCnt = blockSize;
+    while(blkCnt > 0)
+    {
+        accum1 += (_Float16)*pIn++ * (_Float16)*pW;
+        accum2 += (_Float16)*pW++;
+        blkCnt--;
+    }
+
+    return(accum1 / accum2);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of weightedsum group
+ */
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */ 
+
diff --git a/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f32.c b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f32.c
new file mode 100755
index 00000000..dd378615
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/SupportFunctions/arm_weighted_sum_f32.c
@@ -0,0 +1,187 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_weighted_sum_f32.c
+ * Description:  Weighted Sum
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <limits.h>
+#include <math.h>
+
+#include "dsp/support_functions.h"
+
+/**
+ * @addtogroup weightedsum
+ * @{
+ */
+
+
+/**
+ * @brief Weighted sum
+ *
+ *
+ * @param[in]    *in           Array of input values.
+ * @param[in]    *weigths      Weights
+ * @param[in]    blockSize     Number of samples in the input array.
+ * @return       Weighted sum
+ *
+ */
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+
+float32_t arm_weighted_sum_f32(const float32_t *in,const float32_t *weigths, uint32_t blockSize)
+{
+    float32_t       accum1, accum2;
+    f32x4_t         accum1V, accum2V;
+    f32x4_t         inV, wV;
+    const float32_t *pIn, *pW;
+    uint32_t        blkCnt;
+
+
+    pIn = in;
+    pW = weigths;
+
+
+    accum1V = vdupq_n_f32(0.0);
+    accum2V = vdupq_n_f32(0.0);
+
+    blkCnt = blockSize >> 2;
+    while (blkCnt > 0) 
+    {
+        inV = vld1q(pIn);
+        wV = vld1q(pW);
+
+        pIn += 4;
+        pW += 4;
+
+        accum1V = vfmaq(accum1V, inV, wV);
+        accum2V = vaddq(accum2V, wV);
+        blkCnt--;
+    }
+
+    accum1 = vecAddAcrossF32Mve(accum1V);
+    accum2 = vecAddAcrossF32Mve(accum2V);
+
+    blkCnt = blockSize & 3;
+    while(blkCnt > 0)
+    {
+        accum1 += *pIn++ * *pW;
+        accum2 += *pW++;
+        blkCnt--;
+    }
+
+
+    return (accum1 / accum2);
+}
+
+#else
+#if defined(ARM_MATH_NEON)
+
+#include "NEMath.h"
+float32_t arm_weighted_sum_f32(const float32_t *in,const float32_t *weigths, uint32_t blockSize)
+{
+
+    float32_t accum1, accum2;
+    float32x4_t accum1V, accum2V;
+    float32x2_t tempV;
+
+    float32x4_t inV,wV;
+
+    const float32_t *pIn, *pW;
+    uint32_t blkCnt;
+
+
+    pIn = in;
+    pW = weigths;
+
+    accum1=0.0f;
+    accum2=0.0f;
+
+    accum1V = vdupq_n_f32(0.0f);
+    accum2V = vdupq_n_f32(0.0f);
+
+    blkCnt = blockSize >> 2;
+    while(blkCnt > 0)
+    {
+        inV = vld1q_f32(pIn);
+        wV = vld1q_f32(pW);
+
+        pIn += 4; 
+        pW += 4;
+
+        accum1V = vmlaq_f32(accum1V,inV,wV);
+        accum2V = vaddq_f32(accum2V,wV);
+        blkCnt--;
+    }
+
+    tempV = vpadd_f32(vget_low_f32(accum1V),vget_high_f32(accum1V));
+    accum1 = vget_lane_f32(tempV, 0) + vget_lane_f32(tempV, 1);
+
+    tempV = vpadd_f32(vget_low_f32(accum2V),vget_high_f32(accum2V));
+    accum2 = vget_lane_f32(tempV, 0) + vget_lane_f32(tempV, 1);
+
+    blkCnt = blockSize & 3;
+    while(blkCnt > 0)
+    {
+        accum1 += *pIn++ * *pW;
+        accum2 += *pW++;
+        blkCnt--;
+    }
+
+
+    return(accum1 / accum2);
+}
+#else
+float32_t arm_weighted_sum_f32(const float32_t *in, const float32_t *weigths, uint32_t blockSize)
+{
+
+    float32_t accum1, accum2;
+    const float32_t *pIn, *pW;
+    uint32_t blkCnt;
+
+
+    pIn = in;
+    pW = weigths;
+
+    accum1=0.0f;
+    accum2=0.0f;
+
+    blkCnt = blockSize;
+    while(blkCnt > 0)
+    {
+        accum1 += *pIn++ * *pW;
+        accum2 += *pW++;
+        blkCnt--;
+    }
+
+    return(accum1 / accum2);
+}
+#endif
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+ * @} end of weightedsum group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c
index fcd0d955..f327801e 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctions.c
@@ -1,60 +1,83 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        TransformFunctions.c
- * Description:  Combination of all transform function source files.
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_bitreversal.c"
-#include "arm_bitreversal2.c"
-#include "arm_cfft_f32.c"
-#include "arm_cfft_q15.c"
-#include "arm_cfft_q31.c"
-#include "arm_cfft_radix2_f32.c"
-#include "arm_cfft_radix2_init_f32.c"
-#include "arm_cfft_radix2_init_q15.c"
-#include "arm_cfft_radix2_init_q31.c"
-#include "arm_cfft_radix2_q15.c"
-#include "arm_cfft_radix2_q31.c"
-#include "arm_cfft_radix4_f32.c"
-#include "arm_cfft_radix4_init_f32.c"
-#include "arm_cfft_radix4_init_q15.c"
-#include "arm_cfft_radix4_init_q31.c"
-#include "arm_cfft_radix4_q15.c"
-#include "arm_cfft_radix4_q31.c"
-#include "arm_cfft_radix8_f32.c"
-#include "arm_dct4_f32.c"
-#include "arm_dct4_init_f32.c"
-#include "arm_dct4_init_q15.c"
-#include "arm_dct4_init_q31.c"
-#include "arm_dct4_q15.c"
-#include "arm_dct4_q31.c"
-#include "arm_rfft_f32.c"
-#include "arm_rfft_fast_f32.c"
-#include "arm_rfft_fast_init_f32.c"
-#include "arm_rfft_init_f32.c"
-#include "arm_rfft_init_q15.c"
-#include "arm_rfft_init_q31.c"
-#include "arm_rfft_q15.c"
-#include "arm_rfft_q31.c"
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        TransformFunctions.c
+ * Description:  Combination of all transform function source files.
+ *
+ * $Date:        18. March 2019
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_bitreversal.c"
+#include "arm_bitreversal2.c"
+#include "arm_cfft_f32.c"
+#include "arm_cfft_f64.c"
+#include "arm_cfft_q15.c"
+#include "arm_cfft_q31.c"
+#include "arm_cfft_init_f32.c"
+#include "arm_cfft_init_f64.c"
+#include "arm_cfft_init_q15.c"
+#include "arm_cfft_init_q31.c"
+#include "arm_cfft_radix2_f32.c"
+#include "arm_cfft_radix2_q15.c"
+#include "arm_cfft_radix2_q31.c"
+#include "arm_cfft_radix4_f32.c"
+#include "arm_cfft_radix4_q15.c"
+#include "arm_cfft_radix4_q31.c"
+#include "arm_cfft_radix8_f32.c"
+#include "arm_rfft_fast_f32.c"
+#include "arm_rfft_fast_f64.c"
+#include "arm_rfft_fast_init_f32.c"
+#include "arm_rfft_fast_init_f64.c"
+
+#include "arm_mfcc_init_f32.c"
+#include "arm_mfcc_f32.c"
+
+#include "arm_mfcc_init_q31.c"
+#include "arm_mfcc_q31.c"
+
+#include "arm_mfcc_init_q15.c"
+#include "arm_mfcc_q15.c"
+
+/* Deprecated */
+
+#include "arm_dct4_f32.c"
+#include "arm_dct4_init_f32.c"
+#include "arm_dct4_init_q15.c"
+#include "arm_dct4_init_q31.c"
+#include "arm_dct4_q15.c"
+#include "arm_dct4_q31.c"
+
+#include "arm_rfft_f32.c"
+#include "arm_rfft_q15.c"
+#include "arm_rfft_q31.c"
+
+#include "arm_rfft_init_f32.c"
+#include "arm_rfft_init_q15.c"
+#include "arm_rfft_init_q31.c"
+
+#include "arm_cfft_radix4_init_f32.c"
+#include "arm_cfft_radix4_init_q15.c"
+#include "arm_cfft_radix4_init_q31.c"
+
+#include "arm_cfft_radix2_init_f32.c"
+#include "arm_cfft_radix2_init_q15.c"
+#include "arm_cfft_radix2_init_q31.c"
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c
new file mode 100755
index 00000000..b082d447
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/TransformFunctionsF16.c
@@ -0,0 +1,44 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        TransformFunctionsF16.c
+ * Description:  Combination of all transform function f16 source files.
+ *
+ * $Date:        20. April 2020
+ * $Revision:    V1.0.0
+ *
+ * Target Processor: Cortex-M cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "arm_cfft_f16.c"
+#include "arm_cfft_init_f16.c"
+#include "arm_cfft_radix2_f16.c"
+#include "arm_cfft_radix4_f16.c"
+#include "arm_rfft_fast_init_f16.c"
+#include "arm_rfft_fast_f16.c"
+#include "arm_cfft_radix8_f16.c"
+
+#include "arm_bitreversal_f16.c"
+
+#include "arm_mfcc_init_f16.c"
+#include "arm_mfcc_f16.c"
+
+/* Deprecated */
+#include "arm_cfft_radix2_init_f16.c"
+#include "arm_cfft_radix4_init_f16.c"
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
index de95c598..687a9e86 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal.c
@@ -1,229 +1,230 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_bitreversal.c
- * Description:  Bitreversal functions
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @brief         In-place floating-point bit reversal function.
-  @param[in,out] pSrc         points to in-place floating-point data buffer
-  @param[in]     fftSize      length of FFT
-  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-  @param[in]     pBitRevTab   points to bit reversal table
-  @return        none
- */
-
-void arm_bitreversal_f32(
-        float32_t * pSrc,
-        uint16_t fftSize,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab)
-{
-   uint16_t fftLenBy2, fftLenBy2p1;
-   uint16_t i, j;
-   float32_t in;
-
-   /*  Initializations */
-   j = 0U;
-   fftLenBy2 = fftSize >> 1U;
-   fftLenBy2p1 = (fftSize >> 1U) + 1U;
-
-   /* Bit Reversal Implementation */
-   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
-   {
-      if (i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         in = pSrc[2U * i];
-         pSrc[2U * i] = pSrc[2U * j];
-         pSrc[2U * j] = in;
-
-         /*  pSrc[i+1U] <-> pSrc[j+1U] */
-         in = pSrc[(2U * i) + 1U];
-         pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];
-         pSrc[(2U * j) + 1U] = in;
-
-         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-         in = pSrc[2U * (i + fftLenBy2p1)];
-         pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];
-         pSrc[2U * (j + fftLenBy2p1)] = in;
-
-         /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */
-         in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];
-         pSrc[(2U * (i + fftLenBy2p1)) + 1U] =
-         pSrc[(2U * (j + fftLenBy2p1)) + 1U];
-         pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;
-
-      }
-
-      /*  pSrc[i+1U] <-> pSrc[j+1U] */
-      in = pSrc[2U * (i + 1U)];
-      pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];
-      pSrc[2U * (j + fftLenBy2)] = in;
-
-      /*  pSrc[i+2U] <-> pSrc[j+2U] */
-      in = pSrc[(2U * (i + 1U)) + 1U];
-      pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];
-      pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTab;
-
-      /*  Updating the bit reversal index depending on the fft length  */
-      pBitRevTab += bitRevFactor;
-   }
-}
-
-
-/**
-  @brief         In-place Q31 bit reversal function.
-  @param[in,out] pSrc         points to in-place Q31 data buffer.
-  @param[in]     fftLen       length of FFT.
-  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-  @param[in]     pBitRevTab   points to bit reversal table
-  @return        none
-*/
-
-void arm_bitreversal_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab)
-{
-   uint32_t fftLenBy2, fftLenBy2p1, i, j;
-   q31_t in;
-
-   /*  Initializations      */
-   j = 0U;
-   fftLenBy2 = fftLen / 2U;
-   fftLenBy2p1 = (fftLen / 2U) + 1U;
-
-   /* Bit Reversal Implementation */
-   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
-   {
-      if (i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         in = pSrc[2U * i];
-         pSrc[2U * i] = pSrc[2U * j];
-         pSrc[2U * j] = in;
-
-         /*  pSrc[i+1U] <-> pSrc[j+1U] */
-         in = pSrc[(2U * i) + 1U];
-         pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];
-         pSrc[(2U * j) + 1U] = in;
-
-         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
-         in = pSrc[2U * (i + fftLenBy2p1)];
-         pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];
-         pSrc[2U * (j + fftLenBy2p1)] = in;
-
-         /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */
-         in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];
-         pSrc[(2U * (i + fftLenBy2p1)) + 1U] =
-         pSrc[(2U * (j + fftLenBy2p1)) + 1U];
-         pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;
-
-      }
-
-      /*  pSrc[i+1U] <-> pSrc[j+1U] */
-      in = pSrc[2U * (i + 1U)];
-      pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];
-      pSrc[2U * (j + fftLenBy2)] = in;
-
-      /*  pSrc[i+2U] <-> pSrc[j+2U] */
-      in = pSrc[(2U * (i + 1U)) + 1U];
-      pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];
-      pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTab;
-
-      /*  Updating the bit reversal index depending on the fft length */
-      pBitRevTab += bitRevFactor;
-   }
-}
-
-
-
-/**
-  @brief         In-place Q15 bit reversal function.
-  @param[in,out] pSrc16       points to in-place Q15 data buffer
-  @param[in]     fftLen       length of FFT
-  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
-  @param[in]     pBitRevTab   points to bit reversal table
-  @return        none
-*/
-
-void arm_bitreversal_q15(
-        q15_t * pSrc16,
-        uint32_t fftLen,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab)
-{
-   q31_t *pSrc = (q31_t *) pSrc16;
-   q31_t in;
-   uint32_t fftLenBy2, fftLenBy2p1;
-   uint32_t i, j;
-
-   /*  Initializations */
-   j = 0U;
-   fftLenBy2 = fftLen / 2U;
-   fftLenBy2p1 = (fftLen / 2U) + 1U;
-
-   /* Bit Reversal Implementation */
-   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
-   {
-      if (i < j)
-      {
-         /*  pSrc[i] <-> pSrc[j]; */
-         /*  pSrc[i+1U] <-> pSrc[j+1U] */
-         in = pSrc[i];
-         pSrc[i] = pSrc[j];
-         pSrc[j] = in;
-
-         /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
-         /*  pSrc[i + fftLenBy2p1+1U] <-> pSrc[j + fftLenBy2p1+1U] */
-         in = pSrc[i + fftLenBy2p1];
-         pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
-         pSrc[j + fftLenBy2p1] = in;
-      }
-
-      /*  pSrc[i+1U] <-> pSrc[j+fftLenBy2];         */
-      /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1U]  */
-      in = pSrc[i + 1U];
-      pSrc[i + 1U] = pSrc[j + fftLenBy2];
-      pSrc[j + fftLenBy2] = in;
-
-      /*  Reading the index for the bit reversal */
-      j = *pBitRevTab;
-
-      /*  Updating the bit reversal index depending on the fft length  */
-      pBitRevTab += bitRevFactor;
-   }
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bitreversal.c
+ * Description:  Bitreversal functions
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+
+/**
+  @brief         In-place floating-point bit reversal function.
+  @param[in,out] pSrc         points to in-place floating-point data buffer
+  @param[in]     fftSize      length of FFT
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
+ */
+
+void arm_bitreversal_f32(
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
+{
+   uint16_t fftLenBy2, fftLenBy2p1;
+   uint16_t i, j;
+   float32_t in;
+
+   /*  Initializations */
+   j = 0U;
+   fftLenBy2 = fftSize >> 1U;
+   fftLenBy2p1 = (fftSize >> 1U) + 1U;
+
+   /* Bit Reversal Implementation */
+   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
+   {
+      if (i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         in = pSrc[2U * i];
+         pSrc[2U * i] = pSrc[2U * j];
+         pSrc[2U * j] = in;
+
+         /*  pSrc[i+1U] <-> pSrc[j+1U] */
+         in = pSrc[(2U * i) + 1U];
+         pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];
+         pSrc[(2U * j) + 1U] = in;
+
+         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
+         in = pSrc[2U * (i + fftLenBy2p1)];
+         pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];
+         pSrc[2U * (j + fftLenBy2p1)] = in;
+
+         /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */
+         in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (i + fftLenBy2p1)) + 1U] =
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;
+
+      }
+
+      /*  pSrc[i+1U] <-> pSrc[j+1U] */
+      in = pSrc[2U * (i + 1U)];
+      pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];
+      pSrc[2U * (j + fftLenBy2)] = in;
+
+      /*  pSrc[i+2U] <-> pSrc[j+2U] */
+      in = pSrc[(2U * (i + 1U)) + 1U];
+      pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];
+      pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
+
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
+
+      /*  Updating the bit reversal index depending on the fft length  */
+      pBitRevTab += bitRevFactor;
+   }
+}
+
+
+/**
+  @brief         In-place Q31 bit reversal function.
+  @param[in,out] pSrc         points to in-place Q31 data buffer.
+  @param[in]     fftLen       length of FFT.
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
+{
+   uint32_t fftLenBy2, fftLenBy2p1, i, j;
+   q31_t in;
+
+   /*  Initializations      */
+   j = 0U;
+   fftLenBy2 = fftLen / 2U;
+   fftLenBy2p1 = (fftLen / 2U) + 1U;
+
+   /* Bit Reversal Implementation */
+   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
+   {
+      if (i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         in = pSrc[2U * i];
+         pSrc[2U * i] = pSrc[2U * j];
+         pSrc[2U * j] = in;
+
+         /*  pSrc[i+1U] <-> pSrc[j+1U] */
+         in = pSrc[(2U * i) + 1U];
+         pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];
+         pSrc[(2U * j) + 1U] = in;
+
+         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
+         in = pSrc[2U * (i + fftLenBy2p1)];
+         pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];
+         pSrc[2U * (j + fftLenBy2p1)] = in;
+
+         /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */
+         in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (i + fftLenBy2p1)) + 1U] =
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;
+
+      }
+
+      /*  pSrc[i+1U] <-> pSrc[j+1U] */
+      in = pSrc[2U * (i + 1U)];
+      pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];
+      pSrc[2U * (j + fftLenBy2)] = in;
+
+      /*  pSrc[i+2U] <-> pSrc[j+2U] */
+      in = pSrc[(2U * (i + 1U)) + 1U];
+      pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];
+      pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
+
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
+
+      /*  Updating the bit reversal index depending on the fft length */
+      pBitRevTab += bitRevFactor;
+   }
+}
+
+
+
+/**
+  @brief         In-place Q15 bit reversal function.
+  @param[in,out] pSrc16       points to in-place Q15 data buffer
+  @param[in]     fftLen       length of FFT
+  @param[in]     bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table
+  @param[in]     pBitRevTab   points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_q15(
+        q15_t * pSrc16,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab)
+{
+   q31_t *pSrc = (q31_t *) pSrc16;
+   q31_t in;
+   uint32_t fftLenBy2, fftLenBy2p1;
+   uint32_t i, j;
+
+   /*  Initializations */
+   j = 0U;
+   fftLenBy2 = fftLen / 2U;
+   fftLenBy2p1 = (fftLen / 2U) + 1U;
+
+   /* Bit Reversal Implementation */
+   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
+   {
+      if (i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         /*  pSrc[i+1U] <-> pSrc[j+1U] */
+         in = pSrc[i];
+         pSrc[i] = pSrc[j];
+         pSrc[j] = in;
+
+         /*  pSrc[i + fftLenBy2p1] <-> pSrc[j + fftLenBy2p1];  */
+         /*  pSrc[i + fftLenBy2p1+1U] <-> pSrc[j + fftLenBy2p1+1U] */
+         in = pSrc[i + fftLenBy2p1];
+         pSrc[i + fftLenBy2p1] = pSrc[j + fftLenBy2p1];
+         pSrc[j + fftLenBy2p1] = in;
+      }
+
+      /*  pSrc[i+1U] <-> pSrc[j+fftLenBy2];         */
+      /*  pSrc[i+2] <-> pSrc[j+fftLenBy2+1U]  */
+      in = pSrc[i + 1U];
+      pSrc[i + 1U] = pSrc[j + fftLenBy2];
+      pSrc[j + fftLenBy2] = in;
+
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
+
+      /*  Updating the bit reversal index depending on the fft length  */
+      pBitRevTab += bitRevFactor;
+   }
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
index 01c1e769..c16091b1 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.S
@@ -1,216 +1,216 @@
-;/* ----------------------------------------------------------------------
-; * Project:      CMSIS DSP Library
-; * Title:        arm_bitreversal2.S
-; * Description:  arm_bitreversal_32 function done in assembly for maximum speed.
-; *               Called after doing an fft to reorder the output.
-; *               The function is loop unrolled by 2. arm_bitreversal_16 as well.
-; *
-; * $Date:        18. March 2019
-; * $Revision:    V1.5.2
-; *
-; * Target Processor: Cortex-M cores
-; * -------------------------------------------------------------------- */
-;/*
-; * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
-; *
-; * SPDX-License-Identifier: Apache-2.0
-; *
-; * Licensed under the Apache License, Version 2.0 (the License); you may
-; * not use this file except in compliance with the License.
-; * You may obtain a copy of the License at
-; *
-; * www.apache.org/licenses/LICENSE-2.0
-; *
-; * Unless required by applicable law or agreed to in writing, software
-; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
-; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-; * See the License for the specific language governing permissions and
-; * limitations under the License.
-; */
-
-#if   defined ( __CC_ARM )     /* Keil */
-    #define CODESECT AREA     ||.text||, CODE, READONLY, ALIGN=2
-    #define LABEL
-#elif defined ( __IASMARM__ )  /* IAR */
-    #define CODESECT SECTION `.text`:CODE
-    #define PROC
-    #define LABEL
-    #define ENDP
-    #define EXPORT PUBLIC
-#elif defined ( __CSMC__ )	   /* Cosmic */
-	#define	CODESECT	switch .text
-	#define THUMB
-	#define EXPORT	xdef
-	#define PROC	:
-	#define LABEL	:
-	#define ENDP
-	#define arm_bitreversal_32 _arm_bitreversal_32
-#elif defined ( __TI_ARM__ )   /* TI ARM */
-    #define THUMB    .thumb
-    #define CODESECT .text
-    #define EXPORT   .global
-    #define PROC     : .asmfunc
-    #define LABEL    :
-    #define ENDP     .endasmfunc
-    #define END
-#elif defined ( __GNUC__ )     /* GCC */
-    #define THUMB .thumb
-    #define CODESECT .section .text
-    #define EXPORT .global
-    #define PROC :
-    #define LABEL :
-    #define ENDP
-    #define END
-
-    .syntax unified
-#endif
-
-	CODESECT
-	THUMB
-
-;/**
-;  @brief         In-place bit reversal function.
-;  @param[in,out] pSrc        points to the in-place buffer of unknown 32-bit data type
-;  @param[in]     bitRevLen   bit reversal table length
-;  @param[in]     pBitRevTab  points to bit reversal table
-;  @return        none
-; */
-	EXPORT arm_bitreversal_32
-	EXPORT arm_bitreversal_16
-
-#if   defined ( __CC_ARM )     /* Keil */
-#elif defined ( __IASMARM__ )  /* IAR */
-#elif defined ( __CSMC__ )	   /* Cosmic */
-#elif defined ( __TI_ARM__ )   /* TI ARM */
-#elif defined ( __GNUC__ )     /* GCC */
-	.type   arm_bitreversal_16, %function
-	.type   arm_bitreversal_32, %function
-#endif
-
-#if defined (ARM_MATH_CM0_FAMILY)
-
-arm_bitreversal_32 PROC
-	ADDS     r3,r1,#1
-	PUSH     {r4-r6}
-	ADDS     r1,r2,#0
-	LSRS     r3,r3,#1
-arm_bitreversal_32_0 LABEL
-	LDRH     r2,[r1,#2]
-	LDRH     r6,[r1,#0]
-	ADD      r2,r0,r2
-	ADD      r6,r0,r6
-	LDR      r5,[r2,#0]
-	LDR      r4,[r6,#0]
-	STR      r5,[r6,#0]
-	STR      r4,[r2,#0]
-	LDR      r5,[r2,#4]
-	LDR      r4,[r6,#4]
-	STR      r5,[r6,#4]
-	STR      r4,[r2,#4]
-	ADDS     r1,r1,#4
-	SUBS     r3,r3,#1
-	BNE      arm_bitreversal_32_0
-	POP      {r4-r6}
-	BX       lr
-	ENDP
-
-arm_bitreversal_16 PROC
-	ADDS     r3,r1,#1
-	PUSH     {r4-r6}
-	ADDS     r1,r2,#0
-	LSRS     r3,r3,#1
-arm_bitreversal_16_0 LABEL
-	LDRH     r2,[r1,#2]
-	LDRH     r6,[r1,#0]
-    LSRS     r2,r2,#1
-    LSRS     r6,r6,#1
-	ADD      r2,r0,r2
-	ADD      r6,r0,r6
-	LDR      r5,[r2,#0]
-	LDR      r4,[r6,#0]
-	STR      r5,[r6,#0]
-	STR      r4,[r2,#0]
-	ADDS     r1,r1,#4
-	SUBS     r3,r3,#1
-	BNE      arm_bitreversal_16_0
-	POP      {r4-r6}
-	BX       lr
-	ENDP
-
-#else
-
-arm_bitreversal_32 PROC
-	ADDS     r3,r1,#1
-	CMP      r3,#1
-	IT       LS
-	BXLS     lr
-	PUSH     {r4-r9}
-	ADDS     r1,r2,#2
-	LSRS     r3,r3,#2
-arm_bitreversal_32_0 LABEL       ;/* loop unrolled by 2 */
-	LDRH     r8,[r1,#4]
-	LDRH     r9,[r1,#2]
-	LDRH     r2,[r1,#0]
-	LDRH     r12,[r1,#-2]
-	ADD      r8,r0,r8
-	ADD      r9,r0,r9
-	ADD      r2,r0,r2
-	ADD      r12,r0,r12
-	LDR      r7,[r9,#0]
-	LDR      r6,[r8,#0]
-	LDR      r5,[r2,#0]
-	LDR      r4,[r12,#0]
-	STR      r6,[r9,#0]
-	STR      r7,[r8,#0]
-	STR      r5,[r12,#0]
-	STR      r4,[r2,#0]
-	LDR      r7,[r9,#4]
-	LDR      r6,[r8,#4]
-	LDR      r5,[r2,#4]
-	LDR      r4,[r12,#4]
-	STR      r6,[r9,#4]
-	STR      r7,[r8,#4]
-	STR      r5,[r12,#4]
-	STR      r4,[r2,#4]
-	ADDS     r1,r1,#8
-	SUBS     r3,r3,#1
-	BNE      arm_bitreversal_32_0
-	POP      {r4-r9}
-	BX       lr
-	ENDP
-
-arm_bitreversal_16 PROC
-	ADDS     r3,r1,#1
-	CMP      r3,#1
-	IT       LS
-	BXLS     lr
-	PUSH     {r4-r9}
-	ADDS     r1,r2,#2
-	LSRS     r3,r3,#2
-arm_bitreversal_16_0 LABEL       ;/* loop unrolled by 2 */
-	LDRH     r8,[r1,#4]
-	LDRH     r9,[r1,#2]
-	LDRH     r2,[r1,#0]
-	LDRH     r12,[r1,#-2]
-	ADD      r8,r0,r8,LSR #1
-	ADD      r9,r0,r9,LSR #1
-	ADD      r2,r0,r2,LSR #1
-	ADD      r12,r0,r12,LSR #1
-	LDR      r7,[r9,#0]
-	LDR      r6,[r8,#0]
-	LDR      r5,[r2,#0]
-	LDR      r4,[r12,#0]
-	STR      r6,[r9,#0]
-	STR      r7,[r8,#0]
-	STR      r5,[r12,#0]
-	STR      r4,[r2,#0]
-	ADDS     r1,r1,#8
-	SUBS     r3,r3,#1
-	BNE      arm_bitreversal_16_0
-	POP      {r4-r9}
-	BX       lr
-	ENDP
-
-#endif
-
-	END
+;/* ----------------------------------------------------------------------
+; * Project:      CMSIS DSP Library
+; * Title:        arm_bitreversal2.S
+; * Description:  arm_bitreversal_32 function done in assembly for maximum speed.
+; *               Called after doing an fft to reorder the output.
+; *               The function is loop unrolled by 2. arm_bitreversal_16 as well.
+; *
+; * $Date:        18. March 2019
+; * $Revision:    V1.5.2
+; *
+; * Target Processor: Cortex-M cores
+; * -------------------------------------------------------------------- */
+;/*
+; * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
+; *
+; * SPDX-License-Identifier: Apache-2.0
+; *
+; * Licensed under the Apache License, Version 2.0 (the License); you may
+; * not use this file except in compliance with the License.
+; * You may obtain a copy of the License at
+; *
+; * www.apache.org/licenses/LICENSE-2.0
+; *
+; * Unless required by applicable law or agreed to in writing, software
+; * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; * See the License for the specific language governing permissions and
+; * limitations under the License.
+; */
+
+#if   defined ( __CC_ARM )     /* Keil */
+    #define CODESECT AREA     ||.text||, CODE, READONLY, ALIGN=2
+    #define LABEL
+#elif defined ( __IASMARM__ )  /* IAR */
+    #define CODESECT SECTION `.text`:CODE
+    #define PROC
+    #define LABEL
+    #define ENDP
+    #define EXPORT PUBLIC
+#elif defined ( __CSMC__ )	   /* Cosmic */
+	#define	CODESECT	switch .text
+	#define THUMB
+	#define EXPORT	xdef
+	#define PROC	:
+	#define LABEL	:
+	#define ENDP
+	#define arm_bitreversal_32 _arm_bitreversal_32
+#elif defined ( __TI_ARM__ )   /* TI ARM */
+    #define THUMB    .thumb
+    #define CODESECT .text
+    #define EXPORT   .global
+    #define PROC     : .asmfunc
+    #define LABEL    :
+    #define ENDP     .endasmfunc
+    #define END
+#elif defined ( __GNUC__ )     /* GCC */
+    #define THUMB .thumb
+    #define CODESECT .section .text
+    #define EXPORT .global
+    #define PROC :
+    #define LABEL :
+    #define ENDP
+    #define END
+
+    .syntax unified
+#endif
+
+	CODESECT
+	THUMB
+
+;/**
+;  @brief         In-place bit reversal function.
+;  @param[in,out] pSrc        points to the in-place buffer of unknown 32-bit data type
+;  @param[in]     bitRevLen   bit reversal table length
+;  @param[in]     pBitRevTab  points to bit reversal table
+;  @return        none
+; */
+	EXPORT arm_bitreversal_32
+	EXPORT arm_bitreversal_16
+
+#if   defined ( __CC_ARM )     /* Keil */
+#elif defined ( __IASMARM__ )  /* IAR */
+#elif defined ( __CSMC__ )	   /* Cosmic */
+#elif defined ( __TI_ARM__ )   /* TI ARM */
+#elif defined ( __GNUC__ )     /* GCC */
+	.type   arm_bitreversal_16, %function
+	.type   arm_bitreversal_32, %function
+#endif
+
+#if defined (ARM_MATH_CM0_FAMILY)
+
+arm_bitreversal_32 PROC
+	ADDS     r3,r1,#1
+	PUSH     {r4-r6}
+	ADDS     r1,r2,#0
+	LSRS     r3,r3,#1
+arm_bitreversal_32_0 LABEL
+	LDRH     r2,[r1,#2]
+	LDRH     r6,[r1,#0]
+	ADD      r2,r0,r2
+	ADD      r6,r0,r6
+	LDR      r5,[r2,#0]
+	LDR      r4,[r6,#0]
+	STR      r5,[r6,#0]
+	STR      r4,[r2,#0]
+	LDR      r5,[r2,#4]
+	LDR      r4,[r6,#4]
+	STR      r5,[r6,#4]
+	STR      r4,[r2,#4]
+	ADDS     r1,r1,#4
+	SUBS     r3,r3,#1
+	BNE      arm_bitreversal_32_0
+	POP      {r4-r6}
+	BX       lr
+	ENDP
+
+arm_bitreversal_16 PROC
+	ADDS     r3,r1,#1
+	PUSH     {r4-r6}
+	ADDS     r1,r2,#0
+	LSRS     r3,r3,#1
+arm_bitreversal_16_0 LABEL
+	LDRH     r2,[r1,#2]
+	LDRH     r6,[r1,#0]
+    LSRS     r2,r2,#1
+    LSRS     r6,r6,#1
+	ADD      r2,r0,r2
+	ADD      r6,r0,r6
+	LDR      r5,[r2,#0]
+	LDR      r4,[r6,#0]
+	STR      r5,[r6,#0]
+	STR      r4,[r2,#0]
+	ADDS     r1,r1,#4
+	SUBS     r3,r3,#1
+	BNE      arm_bitreversal_16_0
+	POP      {r4-r6}
+	BX       lr
+	ENDP
+
+#else
+
+arm_bitreversal_32 PROC
+	ADDS     r3,r1,#1
+	CMP      r3,#1
+	IT       LS
+	BXLS     lr
+	PUSH     {r4-r9}
+	ADDS     r1,r2,#2
+	LSRS     r3,r3,#2
+arm_bitreversal_32_0 LABEL       ;/* loop unrolled by 2 */
+	LDRH     r8,[r1,#4]
+	LDRH     r9,[r1,#2]
+	LDRH     r2,[r1,#0]
+	LDRH     r12,[r1,#-2]
+	ADD      r8,r0,r8
+	ADD      r9,r0,r9
+	ADD      r2,r0,r2
+	ADD      r12,r0,r12
+	LDR      r7,[r9,#0]
+	LDR      r6,[r8,#0]
+	LDR      r5,[r2,#0]
+	LDR      r4,[r12,#0]
+	STR      r6,[r9,#0]
+	STR      r7,[r8,#0]
+	STR      r5,[r12,#0]
+	STR      r4,[r2,#0]
+	LDR      r7,[r9,#4]
+	LDR      r6,[r8,#4]
+	LDR      r5,[r2,#4]
+	LDR      r4,[r12,#4]
+	STR      r6,[r9,#4]
+	STR      r7,[r8,#4]
+	STR      r5,[r12,#4]
+	STR      r4,[r2,#4]
+	ADDS     r1,r1,#8
+	SUBS     r3,r3,#1
+	BNE      arm_bitreversal_32_0
+	POP      {r4-r9}
+	BX       lr
+	ENDP
+
+arm_bitreversal_16 PROC
+	ADDS     r3,r1,#1
+	CMP      r3,#1
+	IT       LS
+	BXLS     lr
+	PUSH     {r4-r9}
+	ADDS     r1,r2,#2
+	LSRS     r3,r3,#2
+arm_bitreversal_16_0 LABEL       ;/* loop unrolled by 2 */
+	LDRH     r8,[r1,#4]
+	LDRH     r9,[r1,#2]
+	LDRH     r2,[r1,#0]
+	LDRH     r12,[r1,#-2]
+	ADD      r8,r0,r8,LSR #1
+	ADD      r9,r0,r9,LSR #1
+	ADD      r2,r0,r2,LSR #1
+	ADD      r12,r0,r12,LSR #1
+	LDR      r7,[r9,#0]
+	LDR      r6,[r8,#0]
+	LDR      r5,[r2,#0]
+	LDR      r4,[r12,#0]
+	STR      r6,[r9,#0]
+	STR      r7,[r8,#0]
+	STR      r5,[r12,#0]
+	STR      r4,[r2,#0]
+	ADDS     r1,r1,#8
+	SUBS     r3,r3,#1
+	BNE      arm_bitreversal_16_0
+	POP      {r4-r9}
+	BX       lr
+	ENDP
+
+#endif
+
+	END
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c
index 29d57571..77fac1f8 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal2.c
@@ -1,99 +1,134 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_bitreversal2.c
- * Description:  Bitreversal functions
- *
- * $Date:        18. March 2019
- * $Revision:    V1.0.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @brief         In-place 32 bit reversal function.
-  @param[in,out] pSrc        points to in-place buffer of unknown 32-bit data type
-  @param[in]     bitRevLen   bit reversal table length
-  @param[in]     pBitRevTab  points to bit reversal table
-  @return        none
-*/
-
-void arm_bitreversal_32(
-        uint32_t *pSrc, 
-  const uint16_t bitRevLen, 
-  const uint16_t *pBitRevTab)
-{
-  uint32_t a, b, i, tmp;
-
-  for (i = 0; i < bitRevLen; )
-  {
-     a = pBitRevTab[i    ] >> 2;
-     b = pBitRevTab[i + 1] >> 2;
-
-     //real
-     tmp = pSrc[a];
-     pSrc[a] = pSrc[b];
-     pSrc[b] = tmp;
-
-     //complex
-     tmp = pSrc[a+1];
-     pSrc[a+1] = pSrc[b+1];
-     pSrc[b+1] = tmp;
-
-    i += 2;
-  }
-}
-
-
-/**
-  @brief         In-place 16 bit reversal function.
-  @param[in,out] pSrc        points to in-place buffer of unknown 16-bit data type
-  @param[in]     bitRevLen   bit reversal table length
-  @param[in]     pBitRevTab  points to bit reversal table
-  @return        none
-*/
-
-void arm_bitreversal_16(
-        uint16_t *pSrc, 
-  const uint16_t bitRevLen, 
-  const uint16_t *pBitRevTab)
-{
-  uint16_t a, b, i, tmp;
-
-  for (i = 0; i < bitRevLen; )
-  {
-     a = pBitRevTab[i    ] >> 2;
-     b = pBitRevTab[i + 1] >> 2;
-
-     //real
-     tmp = pSrc[a];
-     pSrc[a] = pSrc[b];
-     pSrc[b] = tmp;
-
-     //complex
-     tmp = pSrc[a+1];
-     pSrc[a+1] = pSrc[b+1];
-     pSrc[b+1] = tmp;
-
-    i += 2;
-  }
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bitreversal2.c
+ * Description:  Bitreversal functions
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2019 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+
+/**
+  @brief         In-place 64 bit reversal function.
+  @param[in,out] pSrc        points to in-place buffer of unknown 64-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_64(
+        uint64_t *pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t *pBitRevTab)
+{
+  uint64_t a, b, i, tmp;
+
+  for (i = 0; i < bitRevLen; )
+  {
+     a = pBitRevTab[i    ] >> 2;
+     b = pBitRevTab[i + 1] >> 2;
+
+     //real
+     tmp = pSrc[a];
+     pSrc[a] = pSrc[b];
+     pSrc[b] = tmp;
+
+     //complex
+     tmp = pSrc[a+1];
+     pSrc[a+1] = pSrc[b+1];
+     pSrc[b+1] = tmp;
+
+    i += 2;
+  }
+}
+
+/**
+  @brief         In-place 32 bit reversal function.
+  @param[in,out] pSrc        points to in-place buffer of unknown 32-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_32(
+        uint32_t *pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t *pBitRevTab)
+{
+  uint32_t a, b, i, tmp;
+
+  for (i = 0; i < bitRevLen; )
+  {
+     a = pBitRevTab[i    ] >> 2;
+     b = pBitRevTab[i + 1] >> 2;
+
+     //real
+     tmp = pSrc[a];
+     pSrc[a] = pSrc[b];
+     pSrc[b] = tmp;
+
+     //complex
+     tmp = pSrc[a+1];
+     pSrc[a+1] = pSrc[b+1];
+     pSrc[b+1] = tmp;
+
+    i += 2;
+  }
+}
+
+
+/**
+  @brief         In-place 16 bit reversal function.
+  @param[in,out] pSrc        points to in-place buffer of unknown 16-bit data type
+  @param[in]     bitRevLen   bit reversal table length
+  @param[in]     pBitRevTab  points to bit reversal table
+  @return        none
+*/
+
+void arm_bitreversal_16(
+        uint16_t *pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t *pBitRevTab)
+{
+  uint16_t a, b, i, tmp;
+
+  for (i = 0; i < bitRevLen; )
+  {
+     a = pBitRevTab[i    ] >> 2;
+     b = pBitRevTab[i + 1] >> 2;
+
+     //real
+     tmp = pSrc[a];
+     pSrc[a] = pSrc[b];
+     pSrc[b] = tmp;
+
+     //complex
+     tmp = pSrc[a+1];
+     pSrc[a+1] = pSrc[b+1];
+     pSrc[b+1] = tmp;
+
+    i += 2;
+  }
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal_f16.c
new file mode 100755
index 00000000..2e646368
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_bitreversal_f16.c
@@ -0,0 +1,102 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_bitreversal_f16.c
+ * Description:  Bitreversal functions
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+
+/*
+* @brief  In-place bit reversal function.
+* @param[in, out] *pSrc        points to the in-place buffer of floating-point data type.
+* @param[in]      fftSize      length of the FFT.
+* @param[in]      bitRevFactor bit reversal modifier that supports different size FFTs with the same bit reversal table.
+* @param[in]      *pBitRevTab  points to the bit reversal table.
+* @return none.
+*/
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+void arm_bitreversal_f16(
+float16_t * pSrc,
+uint16_t fftSize,
+uint16_t bitRevFactor,
+const uint16_t * pBitRevTab)
+{
+   uint16_t fftLenBy2, fftLenBy2p1;
+   uint16_t i, j;
+   float16_t in;
+
+   /*  Initializations */
+   j = 0U;
+   fftLenBy2 = fftSize >> 1U;
+   fftLenBy2p1 = (fftSize >> 1U) + 1U;
+
+   /* Bit Reversal Implementation */
+   for (i = 0U; i <= (fftLenBy2 - 2U); i += 2U)
+   {
+      if (i < j)
+      {
+         /*  pSrc[i] <-> pSrc[j]; */
+         in = pSrc[2U * i];
+         pSrc[2U * i] = pSrc[2U * j];
+         pSrc[2U * j] = in;
+
+         /*  pSrc[i+1U] <-> pSrc[j+1U] */
+         in = pSrc[(2U * i) + 1U];
+         pSrc[(2U * i) + 1U] = pSrc[(2U * j) + 1U];
+         pSrc[(2U * j) + 1U] = in;
+
+         /*  pSrc[i+fftLenBy2p1] <-> pSrc[j+fftLenBy2p1] */
+         in = pSrc[2U * (i + fftLenBy2p1)];
+         pSrc[2U * (i + fftLenBy2p1)] = pSrc[2U * (j + fftLenBy2p1)];
+         pSrc[2U * (j + fftLenBy2p1)] = in;
+
+         /*  pSrc[i+fftLenBy2p1+1U] <-> pSrc[j+fftLenBy2p1+1U] */
+         in = pSrc[(2U * (i + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (i + fftLenBy2p1)) + 1U] =
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U];
+         pSrc[(2U * (j + fftLenBy2p1)) + 1U] = in;
+
+      }
+
+      /*  pSrc[i+1U] <-> pSrc[j+1U] */
+      in = pSrc[2U * (i + 1U)];
+      pSrc[2U * (i + 1U)] = pSrc[2U * (j + fftLenBy2)];
+      pSrc[2U * (j + fftLenBy2)] = in;
+
+      /*  pSrc[i+2U] <-> pSrc[j+2U] */
+      in = pSrc[(2U * (i + 1U)) + 1U];
+      pSrc[(2U * (i + 1U)) + 1U] = pSrc[(2U * (j + fftLenBy2)) + 1U];
+      pSrc[(2U * (j + fftLenBy2)) + 1U] = in;
+
+      /*  Reading the index for the bit reversal */
+      j = *pBitRevTab;
+
+      /*  Updating the bit reversal index depending on the fft length  */
+      pBitRevTab += bitRevFactor;
+   }
+}
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f16.c
new file mode 100755
index 00000000..edfc0b4a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f16.c
@@ -0,0 +1,842 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_f32.c
+ * Description:  Combined Radix Decimation in Frequency CFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+#include "arm_common_tables_f16.h"
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_fft.h"
+#include "arm_mve_tables_f16.h"
+
+
+static float16_t arm_inverse_fft_length_f16(uint16_t fftLen)
+{
+  float16_t retValue=1.0;
+
+  switch (fftLen)
+  {
+
+  case 4096U:
+    retValue = (float16_t)0.000244140625f;
+    break;
+
+  case 2048U:
+    retValue = (float16_t)0.00048828125f;
+    break;
+
+  case 1024U:
+    retValue = (float16_t)0.0009765625f;
+    break;
+
+  case 512U:
+    retValue = (float16_t)0.001953125f;
+    break;
+
+  case 256U:
+    retValue = (float16_t)0.00390625f;
+    break;
+
+  case 128U:
+    retValue = (float16_t)0.0078125f;
+    break;
+
+  case 64U:
+    retValue = (float16_t)0.015625f;
+    break;
+
+  case 32U:
+    retValue = (float16_t)0.03125f;
+    break;
+
+  case 16U:
+    retValue = (float16_t)0.0625f;
+    break;
+
+
+  default:
+    break;
+  }
+  return(retValue);
+}
+
+
+static void _arm_radix4_butterfly_f16_mve(const arm_cfft_instance_f16 * S,float16_t * pSrc, uint32_t fftLen)
+{
+    f16x8_t vecTmp0, vecTmp1;
+    f16x8_t vecSum0, vecDiff0, vecSum1, vecDiff1;
+    f16x8_t vecA, vecB, vecC, vecD;
+    uint32_t  blkCnt;
+    uint32_t  n1, n2;
+    uint32_t  stage = 0;
+    int32_t  iter = 1;
+    static const int32_t strides[4] =
+       { ( 0 - 16) * (int32_t)sizeof(float16_t *)
+       , ( 4 - 16) * (int32_t)sizeof(float16_t *)
+       , ( 8 - 16) * (int32_t)sizeof(float16_t *)
+       , (12 - 16) * (int32_t)sizeof(float16_t *)};
+
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+    for (int k = fftLen / 4u; k > 1; k >>= 2)
+    {
+        float16_t const     *p_rearranged_twiddle_tab_stride1 =
+                            &S->rearranged_twiddle_stride1[
+                            S->rearranged_twiddle_tab_stride1_arr[stage]];
+        float16_t const     *p_rearranged_twiddle_tab_stride2 =
+                            &S->rearranged_twiddle_stride2[
+                            S->rearranged_twiddle_tab_stride2_arr[stage]];
+        float16_t const     *p_rearranged_twiddle_tab_stride3 =
+                            &S->rearranged_twiddle_stride3[
+                            S->rearranged_twiddle_tab_stride3_arr[stage]];
+        float16_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            float16_t    *inA = pBase;
+            float16_t    *inB = inA + n2 * CMPLX_DIM;
+            float16_t    *inC = inB + n2 * CMPLX_DIM;
+            float16_t    *inD = inC + n2 * CMPLX_DIM;
+            float16_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            float16_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            float16_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            f16x8_t       vecW;
+
+            blkCnt = n2 / 4;
+            /*
+             * load 2 f16 complex pair
+             */
+            vecA = vldrhq_f16(inA);
+            vecC = vldrhq_f16(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrhq_f16(inB);
+                vecD = vldrhq_f16(inD);
+
+                vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+                vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+                vecSum1 = vecB + vecD;
+                vecDiff1 = vecB - vecD;
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vecSum0 + vecSum1;
+                vst1q(inA, vecTmp0);
+                inA += 8;
+
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vecSum0 - vecSum1;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0);
+                vst1q(inB, vecTmp1);
+                inB += 8;
+
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW1);
+                pW1 +=8;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0);
+                vst1q(inC, vecTmp1);
+                inC += 8;
+
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0);
+                vst1q(inD, vecTmp1);
+                inD += 8;
+
+                vecA = vldrhq_f16(inA);
+                vecC = vldrhq_f16(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /* load scheduling */
+    vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+    vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8);
+
+    blkCnt = (fftLen >> 4);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+        vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+        vecB = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 4);
+        vecD = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 12);
+
+        vecSum1 = vecB + vecD;
+        vecDiff1 = vecB - vecD;
+
+        /* pre-load for next iteration */
+        vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+        vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8);
+
+        vecTmp0 = vecSum0 + vecSum1;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64, (f32x4_t)vecTmp0);
+
+        vecTmp0 = vecSum0 - vecSum1;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 4, (f32x4_t)vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, (f32x4_t)vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 12, (f32x4_t)vecTmp0);
+
+        blkCnt--;
+    }
+
+    /*
+     * End of last stage process
+     */
+}
+
+static void arm_cfft_radix4by2_f16_mve(const arm_cfft_instance_f16 * S, float16_t *pSrc, uint32_t fftLen)
+{
+    float16_t const *pCoefVec;
+    float16_t const  *pCoef = S->pTwiddle;
+    float16_t        *pIn0, *pIn1;
+    uint32_t          n2;
+    uint32_t          blkCnt;
+    f16x8_t         vecIn0, vecIn1, vecSum, vecDiff;
+    f16x8_t         vecCmplxTmp, vecTw;
+
+
+    n2 = fftLen >> 1;
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+    pCoefVec = pCoef;
+
+    blkCnt = n2 / 4;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(f16x8_t *) pIn0;
+        vecIn1 = *(f16x8_t *) pIn1;
+        vecTw = vld1q(pCoefVec);
+        pCoefVec += 8;
+
+        vecSum = vaddq(vecIn0, vecIn1);
+        vecDiff = vsubq(vecIn0, vecIn1);
+
+        vecCmplxTmp = MVE_CMPLX_MULT_FLT_Conj_AxB(vecTw, vecDiff);
+
+        vst1q(pIn0, vecSum);
+        pIn0 += 8;
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 8;
+
+        blkCnt--;
+    }
+
+    _arm_radix4_butterfly_f16_mve(S, pSrc, n2);
+
+    _arm_radix4_butterfly_f16_mve(S, pSrc + fftLen, n2);
+
+    pIn0 = pSrc;
+}
+
+static void _arm_radix4_butterfly_inverse_f16_mve(const arm_cfft_instance_f16 * S,float16_t * pSrc, uint32_t fftLen, float16_t onebyfftLen)
+{
+    f16x8_t vecTmp0, vecTmp1;
+    f16x8_t vecSum0, vecDiff0, vecSum1, vecDiff1;
+    f16x8_t vecA, vecB, vecC, vecD;
+    uint32_t  blkCnt;
+    uint32_t  n1, n2;
+    uint32_t  stage = 0;
+    int32_t  iter = 1;
+    static const int32_t strides[4] = {
+        ( 0 - 16) * (int32_t)sizeof(q31_t *),
+        ( 4 - 16) * (int32_t)sizeof(q31_t *),
+        ( 8 - 16) * (int32_t)sizeof(q31_t *),
+        (12 - 16) * (int32_t)sizeof(q31_t *)
+    };
+
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+    for (int k = fftLen / 4; k > 1; k >>= 2)
+    {
+        float16_t const *p_rearranged_twiddle_tab_stride1 =
+                &S->rearranged_twiddle_stride1[
+                S->rearranged_twiddle_tab_stride1_arr[stage]];
+        float16_t const *p_rearranged_twiddle_tab_stride2 =
+                &S->rearranged_twiddle_stride2[
+                S->rearranged_twiddle_tab_stride2_arr[stage]];
+        float16_t const *p_rearranged_twiddle_tab_stride3 =
+                &S->rearranged_twiddle_stride3[
+                S->rearranged_twiddle_tab_stride3_arr[stage]];
+
+        float16_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            float16_t    *inA = pBase;
+            float16_t    *inB = inA + n2 * CMPLX_DIM;
+            float16_t    *inC = inB + n2 * CMPLX_DIM;
+            float16_t    *inD = inC + n2 * CMPLX_DIM;
+            float16_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            float16_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            float16_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            f16x8_t       vecW;
+
+            blkCnt = n2 / 4;
+            /*
+             * load 2 f32 complex pair
+             */
+            vecA = vldrhq_f16(inA);
+            vecC = vldrhq_f16(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrhq_f16(inB);
+                vecD = vldrhq_f16(inD);
+
+                vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+                vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+                vecSum1 = vecB + vecD;
+                vecDiff1 = vecB - vecD;
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vecSum0 + vecSum1;
+                vst1q(inA, vecTmp0);
+                inA += 8;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vecSum0 - vecSum1;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0);
+                vst1q(inB, vecTmp1);
+                inB += 8;
+
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW1);
+                pW1 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0);
+                vst1q(inC, vecTmp1);
+                inC += 8;
+
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0);
+                vst1q(inD, vecTmp1);
+                inD += 8;
+
+                vecA = vldrhq_f16(inA);
+                vecC = vldrhq_f16(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /*
+     * load scheduling
+     */
+    vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+    vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8);
+
+    blkCnt = (fftLen >> 4);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+        vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+        vecB = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 4);
+        vecD = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 12);
+
+        vecSum1 = vecB + vecD;
+        vecDiff1 = vecB - vecD;
+
+        vecA = (f16x8_t)vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+        vecC = (f16x8_t)vldrwq_gather_base_f32(vecScGathAddr, 8);
+
+        vecTmp0 = vecSum0 + vecSum1;
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64, (f32x4_t)vecTmp0);
+
+        vecTmp0 = vecSum0 - vecSum1;
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 4, (f32x4_t)vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, (f32x4_t)vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 12, (f32x4_t)vecTmp0);
+
+        blkCnt--;
+    }
+
+    /*
+     * End of last stage process
+     */
+}
+
+static void arm_cfft_radix4by2_inverse_f16_mve(const arm_cfft_instance_f16 * S,float16_t *pSrc, uint32_t fftLen)
+{
+    float16_t const *pCoefVec;
+    float16_t const  *pCoef = S->pTwiddle;
+    float16_t        *pIn0, *pIn1;
+    uint32_t          n2;
+    float16_t         onebyfftLen = arm_inverse_fft_length_f16(fftLen);
+    uint32_t          blkCnt;
+    f16x8_t         vecIn0, vecIn1, vecSum, vecDiff;
+    f16x8_t         vecCmplxTmp, vecTw;
+
+
+    n2 = fftLen >> 1;
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+    pCoefVec = pCoef;
+
+    blkCnt = n2 / 4;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(f16x8_t *) pIn0;
+        vecIn1 = *(f16x8_t *) pIn1;
+        vecTw = vld1q(pCoefVec);
+        pCoefVec += 8;
+
+        vecSum = vaddq(vecIn0, vecIn1);
+        vecDiff = vsubq(vecIn0, vecIn1);
+
+        vecCmplxTmp = MVE_CMPLX_MULT_FLT_AxB(vecTw, vecDiff);
+
+        vst1q(pIn0, vecSum);
+        pIn0 += 8;
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 8;
+
+        blkCnt--;
+    }
+
+    _arm_radix4_butterfly_inverse_f16_mve(S, pSrc, n2, onebyfftLen);
+
+    _arm_radix4_butterfly_inverse_f16_mve(S, pSrc + fftLen, n2, onebyfftLen);
+}
+
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point complex FFT.
+  @param[in]     S              points to an instance of the floating-point CFFT structure
+  @param[in,out] p1             points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+
+void arm_cfft_f16(
+  const arm_cfft_instance_f16 * S,
+        float16_t * pSrc,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+        uint32_t fftLen = S->fftLen;
+
+        if (ifftFlag == 1U) {
+
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_inverse_f16_mve(S, pSrc, fftLen, arm_inverse_fft_length_f16(S->fftLen));
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_inverse_f16_mve(S, pSrc, fftLen);
+                break;
+            }
+        } else {
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_f16_mve(S, pSrc, fftLen);
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_f16_mve(S, pSrc, fftLen);
+                break;
+            }
+        }
+
+
+        if (bitReverseFlag)
+        {
+
+            arm_bitreversal_16_inpl_mve((uint16_t*)pSrc, S->bitRevLength, S->pBitRevTable);
+
+        }
+}
+
+#else
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+extern void arm_bitreversal_16(
+        uint16_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
+
+
+extern void arm_cfft_radix4by2_f16(
+    float16_t * pSrc,
+    uint32_t fftLen,
+    const float16_t * pCoef);
+
+extern void arm_radix4_butterfly_f16(
+        float16_t * pSrc,
+        uint16_t fftLen,
+  const float16_t * pCoef,
+        uint16_t twidCoefModifier);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @defgroup ComplexFFT Complex FFT Functions
+
+  @par
+                   The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
+                   Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
+                   than the DFT, especially for long lengths.
+                   The algorithms described in this section
+                   operate on complex data.  A separate set of functions is devoted to handling
+                   of real sequences.
+  @par
+                   There are separate algorithms for handling floating-point, Q15, and Q31 data
+                   types.  The algorithms available for each data type are described next.
+  @par
+                   The FFT functions operate in-place.  That is, the array holding the input data
+                   will also be used to hold the corresponding result.  The input data is complex
+                   and contains <code>2*fftLen</code> interleaved values as shown below.
+                   <pre>{real[0], imag[0], real[1], imag[1], ...} </pre>
+                   The FFT result will be contained in the same array and the frequency domain
+                   values will have the same interleaving.
+
+  @par Floating-point
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
+                   stages are performed along with a single radix-2 or radix-4 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of <code>fftLen</code> when computing the forward transform.  The
+                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   For the MVE version, the new arm_cfft_init_f32 initialization function is
+                   <b>mandatory</b>. <b>Compilation flags are available to include only the required tables for the
+                   needed FFTs.</b> Other FFT versions can continue to be initialized as
+                   explained below.
+  @par
+                   For not MVE versions, pre-initialized data structures containing twiddle factors
+                   and bit reversal tables are provided and defined in <code>arm_const_structs.h</code>.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_f32.  For example:
+  @par
+                   <code>arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)</code>
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_f32 function follows:
+  @code
+                   const static arm_cfft_instance_f32 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_f32_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_f32_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_f32_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_f32_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_f32_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_f32_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_f32_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_f32_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_f32_len4096;
+                         break;
+                     }
+  @endcode
+  @par
+                   The new arm_cfft_init_f32 can also be used.
+  @par Q15 and Q31
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
+                   stages are performed along with a single radix-2 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of <code>fftLen</code> when computing the forward transform.  The
+                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   Pre-initialized data structures containing twiddle factors and bit reversal
+                   tables are provided and defined in <code>arm_const_structs.h</code>.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_q31. For example:
+  @par
+                   <code>arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)</code>
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_q31 function follows:
+  @code
+                   const static arm_cfft_instance_q31 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_q31_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_q31_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_q31_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_q31_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_q31_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_q31_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_q31_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_q31_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_q31_len4096;
+                         break;
+                     }
+  @endcode
+
+ */
+
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point complex FFT.
+  @param[in]     S              points to an instance of the floating-point CFFT structure
+  @param[in,out] p1             points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+void arm_cfft_f16(
+    const arm_cfft_instance_f16 * S,
+    float16_t * p1,
+    uint8_t ifftFlag,
+    uint8_t bitReverseFlag)
+{
+    uint32_t  L = S->fftLen, l;
+    float16_t invL, * pSrc;
+
+    if (ifftFlag == 1U)
+    {
+        /*  Conjugate input data  */
+        pSrc = p1 + 1;
+        for(l=0; l<L; l++)
+        {
+            *pSrc = -(_Float16)*pSrc;
+            pSrc += 2;
+        }
+    }
+
+    switch (L)
+    {
+
+        case 16:
+        case 64:
+        case 256:
+        case 1024:
+        case 4096:
+        arm_radix4_butterfly_f16  (p1, L, (float16_t*)S->pTwiddle, 1U);
+        break;
+
+        case 32:
+        case 128:
+        case 512:
+        case 2048:
+        arm_cfft_radix4by2_f16  ( p1, L, (float16_t*)S->pTwiddle);
+        break;
+
+    }
+
+    if ( bitReverseFlag )
+        arm_bitreversal_16((uint16_t*)p1, S->bitRevLength,(uint16_t*)S->pBitRevTable);
+
+    if (ifftFlag == 1U)
+    {
+        invL = 1.0f16/(_Float16)L;
+        /*  Conjugate and scale output data */
+        pSrc = p1;
+        for(l=0; l<L; l++)
+        {
+            *pSrc++ *=   (_Float16)invL ;
+            *pSrc  = -(_Float16)(*pSrc) * (_Float16)invL;
+            pSrc++;
+        }
+    }
+}
+#endif /* if defined(ARM_FLOAT16_SUPPORTED) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
old mode 100644
new mode 100755
index 15dbb8f5..0b33e8ea
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f32.c
@@ -1,629 +1,1192 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_f32.c
- * Description:  Combined Radix Decimation in Frequency CFFT Floating point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-extern void arm_radix8_butterfly_f32(
-        float32_t * pSrc,
-        uint16_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier);
-
-extern void arm_bitreversal_32(
-        uint32_t * pSrc,
-  const uint16_t bitRevLen,
-  const uint16_t * pBitRevTable);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @defgroup ComplexFFT Complex FFT Functions
- 
-  @par
-                   The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
-                   Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
-                   than the DFT, especially for long lengths.
-                   The algorithms described in this section
-                   operate on complex data.  A separate set of functions is devoted to handling
-                   of real sequences.
-  @par
-                   There are separate algorithms for handling floating-point, Q15, and Q31 data
-                   types.  The algorithms available for each data type are described next.
-  @par
-                   The FFT functions operate in-place.  That is, the array holding the input data
-                   will also be used to hold the corresponding result.  The input data is complex
-                   and contains <code>2*fftLen</code> interleaved values as shown below.
-                   <pre>{real[0], imag[0], real[1], imag[1], ...} </pre>
-                   The FFT result will be contained in the same array and the frequency domain
-                   values will have the same interleaving.
- 
-  @par Floating-point
-                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
-                   stages are performed along with a single radix-2 or radix-4 stage, as needed.
-                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-                   a different twiddle factor table.
-  @par
-                   The function uses the standard FFT definition and output values may grow by a
-                   factor of <code>fftLen</code> when computing the forward transform.  The
-                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
-                   calculation and this matches the textbook definition of the inverse FFT.
-  @par
-                   Pre-initialized data structures containing twiddle factors and bit reversal
-                   tables are provided and defined in <code>arm_const_structs.h</code>.  Include
-                   this header in your function and then pass one of the constant structures as
-                   an argument to arm_cfft_f32.  For example:
-  @par
-                   <code>arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)</code>
-  @par
-                   computes a 64-point inverse complex FFT including bit reversal.
-                   The data structures are treated as constant data and not modified during the
-                   calculation.  The same data structure can be reused for multiple transforms
-                   including mixing forward and inverse transforms.
-  @par
-                   Earlier releases of the library provided separate radix-2 and radix-4
-                   algorithms that operated on floating-point data.  These functions are still
-                   provided but are deprecated.  The older functions are slower and less general
-                   than the new functions.
-  @par
-                   An example of initialization of the constants for the arm_cfft_f32 function follows:
-  @code
-                   const static arm_cfft_instance_f32 *S;
-                   ...
-                     switch (length) {
-                       case 16:
-                         S = &arm_cfft_sR_f32_len16;
-                         break;
-                       case 32:
-                         S = &arm_cfft_sR_f32_len32;
-                         break;
-                       case 64:
-                         S = &arm_cfft_sR_f32_len64;
-                         break;
-                       case 128:
-                         S = &arm_cfft_sR_f32_len128;
-                         break;
-                       case 256:
-                         S = &arm_cfft_sR_f32_len256;
-                         break;
-                       case 512:
-                         S = &arm_cfft_sR_f32_len512;
-                         break;
-                       case 1024:
-                         S = &arm_cfft_sR_f32_len1024;
-                         break;
-                       case 2048:
-                         S = &arm_cfft_sR_f32_len2048;
-                         break;
-                       case 4096:
-                         S = &arm_cfft_sR_f32_len4096;
-                         break;
-                     }
-  @endcode
-  @par Q15 and Q31
-                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
-                   stages are performed along with a single radix-2 stage, as needed.
-                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
-                   a different twiddle factor table.
-  @par
-                   The function uses the standard FFT definition and output values may grow by a
-                   factor of <code>fftLen</code> when computing the forward transform.  The
-                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
-                   calculation and this matches the textbook definition of the inverse FFT.
-  @par
-                   Pre-initialized data structures containing twiddle factors and bit reversal
-                   tables are provided and defined in <code>arm_const_structs.h</code>.  Include
-                   this header in your function and then pass one of the constant structures as
-                   an argument to arm_cfft_q31. For example:
-  @par
-                   <code>arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)</code>
-  @par
-                   computes a 64-point inverse complex FFT including bit reversal.
-                   The data structures are treated as constant data and not modified during the
-                   calculation.  The same data structure can be reused for multiple transforms
-                   including mixing forward and inverse transforms.
-  @par
-                   Earlier releases of the library provided separate radix-2 and radix-4
-                   algorithms that operated on floating-point data.  These functions are still
-                   provided but are deprecated.  The older functions are slower and less general
-                   than the new functions.
-  @par
-                   An example of initialization of the constants for the arm_cfft_q31 function follows:
-  @code
-                   const static arm_cfft_instance_q31 *S;
-                   ...
-                     switch (length) {
-                       case 16:
-                         S = &arm_cfft_sR_q31_len16;
-                         break;
-                       case 32:
-                         S = &arm_cfft_sR_q31_len32;
-                         break;
-                       case 64:
-                         S = &arm_cfft_sR_q31_len64;
-                         break;
-                       case 128:
-                         S = &arm_cfft_sR_q31_len128;
-                         break;
-                       case 256:
-                         S = &arm_cfft_sR_q31_len256;
-                         break;
-                       case 512:
-                         S = &arm_cfft_sR_q31_len512;
-                         break;
-                       case 1024:
-                         S = &arm_cfft_sR_q31_len1024;
-                         break;
-                       case 2048:
-                         S = &arm_cfft_sR_q31_len2048;
-                         break;
-                       case 4096:
-                         S = &arm_cfft_sR_q31_len4096;
-                         break;
-                     }
-  @endcode
- 
- */
-
-void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
-{
-  uint32_t    L  = S->fftLen;
-  float32_t * pCol1, * pCol2, * pMid1, * pMid2;
-  float32_t * p2 = p1 + L;
-  const float32_t * tw = (float32_t *) S->pTwiddle;
-  float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
-  float32_t m0, m1, m2, m3;
-  uint32_t l;
-
-  pCol1 = p1;
-  pCol2 = p2;
-
-  /* Define new length */
-  L >>= 1;
-
-  /* Initialize mid pointers */
-  pMid1 = p1 + L;
-  pMid2 = p2 + L;
-
-  /* do two dot Fourier transform */
-  for (l = L >> 2; l > 0; l-- )
-  {
-    t1[0] = p1[0];
-    t1[1] = p1[1];
-    t1[2] = p1[2];
-    t1[3] = p1[3];
-
-    t2[0] = p2[0];
-    t2[1] = p2[1];
-    t2[2] = p2[2];
-    t2[3] = p2[3];
-
-    t3[0] = pMid1[0];
-    t3[1] = pMid1[1];
-    t3[2] = pMid1[2];
-    t3[3] = pMid1[3];
-
-    t4[0] = pMid2[0];
-    t4[1] = pMid2[1];
-    t4[2] = pMid2[2];
-    t4[3] = pMid2[3];
-
-    *p1++ = t1[0] + t2[0];
-    *p1++ = t1[1] + t2[1];
-    *p1++ = t1[2] + t2[2];
-    *p1++ = t1[3] + t2[3];    /* col 1 */
-
-    t2[0] = t1[0] - t2[0];
-    t2[1] = t1[1] - t2[1];
-    t2[2] = t1[2] - t2[2];
-    t2[3] = t1[3] - t2[3];    /* for col 2 */
-
-    *pMid1++ = t3[0] + t4[0];
-    *pMid1++ = t3[1] + t4[1];
-    *pMid1++ = t3[2] + t4[2];
-    *pMid1++ = t3[3] + t4[3]; /* col 1 */
-
-    t4[0] = t4[0] - t3[0];
-    t4[1] = t4[1] - t3[1];
-    t4[2] = t4[2] - t3[2];
-    t4[3] = t4[3] - t3[3];    /* for col 2 */
-
-    twR = *tw++;
-    twI = *tw++;
-
-    /* multiply by twiddle factors */
-    m0 = t2[0] * twR;
-    m1 = t2[1] * twI;
-    m2 = t2[1] * twR;
-    m3 = t2[0] * twI;
-
-    /* R  =  R  *  Tr - I * Ti */
-    *p2++ = m0 + m1;
-    /* I  =  I  *  Tr + R * Ti */
-    *p2++ = m2 - m3;
-
-    /* use vertical symmetry */
-    /*  0.9988 - 0.0491i <==> -0.0491 - 0.9988i */
-    m0 = t4[0] * twI;
-    m1 = t4[1] * twR;
-    m2 = t4[1] * twI;
-    m3 = t4[0] * twR;
-
-    *pMid2++ = m0 - m1;
-    *pMid2++ = m2 + m3;
-
-    twR = *tw++;
-    twI = *tw++;
-
-    m0 = t2[2] * twR;
-    m1 = t2[3] * twI;
-    m2 = t2[3] * twR;
-    m3 = t2[2] * twI;
-
-    *p2++ = m0 + m1;
-    *p2++ = m2 - m3;
-
-    m0 = t4[2] * twI;
-    m1 = t4[3] * twR;
-    m2 = t4[3] * twI;
-    m3 = t4[2] * twR;
-
-    *pMid2++ = m0 - m1;
-    *pMid2++ = m2 + m3;
-  }
-
-  /* first col */
-  arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 2U);
-
-  /* second col */
-  arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 2U);
-}
-
-void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
-{
-    uint32_t    L  = S->fftLen >> 1;
-    float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
-    const float32_t *tw2, *tw3, *tw4;
-    float32_t * p2 = p1 + L;
-    float32_t * p3 = p2 + L;
-    float32_t * p4 = p3 + L;
-    float32_t t2[4], t3[4], t4[4], twR, twI;
-    float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1;
-    float32_t m0, m1, m2, m3;
-    uint32_t l, twMod2, twMod3, twMod4;
-
-    pCol1 = p1;         /* points to real values by default */
-    pCol2 = p2;
-    pCol3 = p3;
-    pCol4 = p4;
-    pEnd1 = p2 - 1;     /* points to imaginary values by default */
-    pEnd2 = p3 - 1;
-    pEnd3 = p4 - 1;
-    pEnd4 = pEnd3 + L;
-
-    tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle;
-
-    L >>= 1;
-
-    /* do four dot Fourier transform */
-
-    twMod2 = 2;
-    twMod3 = 4;
-    twMod4 = 6;
-
-    /* TOP */
-    p1ap3_0 = p1[0] + p3[0];
-    p1sp3_0 = p1[0] - p3[0];
-    p1ap3_1 = p1[1] + p3[1];
-    p1sp3_1 = p1[1] - p3[1];
-
-    /* col 2 */
-    t2[0] = p1sp3_0 + p2[1] - p4[1];
-    t2[1] = p1sp3_1 - p2[0] + p4[0];
-    /* col 3 */
-    t3[0] = p1ap3_0 - p2[0] - p4[0];
-    t3[1] = p1ap3_1 - p2[1] - p4[1];
-    /* col 4 */
-    t4[0] = p1sp3_0 - p2[1] + p4[1];
-    t4[1] = p1sp3_1 + p2[0] - p4[0];
-    /* col 1 */
-    *p1++ = p1ap3_0 + p2[0] + p4[0];
-    *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-    /* Twiddle factors are ones */
-    *p2++ = t2[0];
-    *p2++ = t2[1];
-    *p3++ = t3[0];
-    *p3++ = t3[1];
-    *p4++ = t4[0];
-    *p4++ = t4[1];
-
-    tw2 += twMod2;
-    tw3 += twMod3;
-    tw4 += twMod4;
-
-    for (l = (L - 2) >> 1; l > 0; l-- )
-    {
-      /* TOP */
-      p1ap3_0 = p1[0] + p3[0];
-      p1sp3_0 = p1[0] - p3[0];
-      p1ap3_1 = p1[1] + p3[1];
-      p1sp3_1 = p1[1] - p3[1];
-      /* col 2 */
-      t2[0] = p1sp3_0 + p2[1] - p4[1];
-      t2[1] = p1sp3_1 - p2[0] + p4[0];
-      /* col 3 */
-      t3[0] = p1ap3_0 - p2[0] - p4[0];
-      t3[1] = p1ap3_1 - p2[1] - p4[1];
-      /* col 4 */
-      t4[0] = p1sp3_0 - p2[1] + p4[1];
-      t4[1] = p1sp3_1 + p2[0] - p4[0];
-      /* col 1 - top */
-      *p1++ = p1ap3_0 + p2[0] + p4[0];
-      *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-      /* BOTTOM */
-      p1ap3_1 = pEnd1[-1] + pEnd3[-1];
-      p1sp3_1 = pEnd1[-1] - pEnd3[-1];
-      p1ap3_0 = pEnd1[ 0] + pEnd3[0];
-      p1sp3_0 = pEnd1[ 0] - pEnd3[0];
-      /* col 2 */
-      t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1;
-      t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
-      /* col 3 */
-      t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
-      t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0];
-      /* col 4 */
-      t4[2] = pEnd2[ 0] - pEnd4[ 0] - p1sp3_1;
-      t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
-      /* col 1 - Bottom */
-      *pEnd1-- = p1ap3_0 + pEnd2[ 0] + pEnd4[ 0];
-      *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
-
-      /* COL 2 */
-      /* read twiddle factors */
-      twR = *tw2++;
-      twI = *tw2++;
-      /* multiply by twiddle factors */
-      /*  let    Z1 = a + i(b),   Z2 = c + i(d) */
-      /*   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d) */
-
-      /* Top */
-      m0 = t2[0] * twR;
-      m1 = t2[1] * twI;
-      m2 = t2[1] * twR;
-      m3 = t2[0] * twI;
-
-      *p2++ = m0 + m1;
-      *p2++ = m2 - m3;
-      /* use vertical symmetry col 2 */
-      /* 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i */
-      /* Bottom */
-      m0 = t2[3] * twI;
-      m1 = t2[2] * twR;
-      m2 = t2[2] * twI;
-      m3 = t2[3] * twR;
-
-      *pEnd2-- = m0 - m1;
-      *pEnd2-- = m2 + m3;
-
-      /* COL 3 */
-      twR = tw3[0];
-      twI = tw3[1];
-      tw3 += twMod3;
-      /* Top */
-      m0 = t3[0] * twR;
-      m1 = t3[1] * twI;
-      m2 = t3[1] * twR;
-      m3 = t3[0] * twI;
-
-      *p3++ = m0 + m1;
-      *p3++ = m2 - m3;
-      /* use vertical symmetry col 3 */
-      /* 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i */
-      /* Bottom */
-      m0 = -t3[3] * twR;
-      m1 =  t3[2] * twI;
-      m2 =  t3[2] * twR;
-      m3 =  t3[3] * twI;
-
-      *pEnd3-- = m0 - m1;
-      *pEnd3-- = m3 - m2;
-
-      /* COL 4 */
-      twR = tw4[0];
-      twI = tw4[1];
-      tw4 += twMod4;
-      /* Top */
-      m0 = t4[0] * twR;
-      m1 = t4[1] * twI;
-      m2 = t4[1] * twR;
-      m3 = t4[0] * twI;
-
-      *p4++ = m0 + m1;
-      *p4++ = m2 - m3;
-      /* use vertical symmetry col 4 */
-      /* 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i */
-      /* Bottom */
-      m0 = t4[3] * twI;
-      m1 = t4[2] * twR;
-      m2 = t4[2] * twI;
-      m3 = t4[3] * twR;
-
-      *pEnd4-- = m0 - m1;
-      *pEnd4-- = m2 + m3;
-    }
-
-    /* MIDDLE */
-    /* Twiddle factors are */
-    /*  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i */
-    p1ap3_0 = p1[0] + p3[0];
-    p1sp3_0 = p1[0] - p3[0];
-    p1ap3_1 = p1[1] + p3[1];
-    p1sp3_1 = p1[1] - p3[1];
-
-    /* col 2 */
-    t2[0] = p1sp3_0 + p2[1] - p4[1];
-    t2[1] = p1sp3_1 - p2[0] + p4[0];
-    /* col 3 */
-    t3[0] = p1ap3_0 - p2[0] - p4[0];
-    t3[1] = p1ap3_1 - p2[1] - p4[1];
-    /* col 4 */
-    t4[0] = p1sp3_0 - p2[1] + p4[1];
-    t4[1] = p1sp3_1 + p2[0] - p4[0];
-    /* col 1 - Top */
-    *p1++ = p1ap3_0 + p2[0] + p4[0];
-    *p1++ = p1ap3_1 + p2[1] + p4[1];
-
-    /* COL 2 */
-    twR = tw2[0];
-    twI = tw2[1];
-
-    m0 = t2[0] * twR;
-    m1 = t2[1] * twI;
-    m2 = t2[1] * twR;
-    m3 = t2[0] * twI;
-
-    *p2++ = m0 + m1;
-    *p2++ = m2 - m3;
-    /* COL 3 */
-    twR = tw3[0];
-    twI = tw3[1];
-
-    m0 = t3[0] * twR;
-    m1 = t3[1] * twI;
-    m2 = t3[1] * twR;
-    m3 = t3[0] * twI;
-
-    *p3++ = m0 + m1;
-    *p3++ = m2 - m3;
-    /* COL 4 */
-    twR = tw4[0];
-    twI = tw4[1];
-
-    m0 = t4[0] * twR;
-    m1 = t4[1] * twI;
-    m2 = t4[1] * twR;
-    m3 = t4[0] * twI;
-
-    *p4++ = m0 + m1;
-    *p4++ = m2 - m3;
-
-    /* first col */
-    arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 4U);
-
-    /* second col */
-    arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 4U);
-
-    /* third col */
-    arm_radix8_butterfly_f32 (pCol3, L, (float32_t *) S->pTwiddle, 4U);
-
-    /* fourth col */
-    arm_radix8_butterfly_f32 (pCol4, L, (float32_t *) S->pTwiddle, 4U);
-}
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point complex FFT.
-  @param[in]     S              points to an instance of the floating-point CFFT structure
-  @param[in,out] p1             points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        none
- */
-
-void arm_cfft_f32(
-  const arm_cfft_instance_f32 * S,
-        float32_t * p1,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag)
-{
-  uint32_t  L = S->fftLen, l;
-  float32_t invL, * pSrc;
-
-  if (ifftFlag == 1U)
-  {
-    /* Conjugate input data */
-    pSrc = p1 + 1;
-    for (l = 0; l < L; l++)
-    {
-      *pSrc = -*pSrc;
-      pSrc += 2;
-    }
-  }
-
-  switch (L)
-  {
-  case 16:
-  case 128:
-  case 1024:
-    arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1);
-    break;
-  case 32:
-  case 256:
-  case 2048:
-    arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1);
-    break;
-  case 64:
-  case 512:
-  case 4096:
-    arm_radix8_butterfly_f32 ( p1, L, (float32_t *) S->pTwiddle, 1);
-    break;
-  }
-
-  if ( bitReverseFlag )
-    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
-
-  if (ifftFlag == 1U)
-  {
-    invL = 1.0f / (float32_t)L;
-
-    /* Conjugate and scale output data */
-    pSrc = p1;
-    for (l= 0; l < L; l++)
-    {
-      *pSrc++ *=   invL ;
-      *pSrc    = -(*pSrc) * invL;
-      pSrc++;
-    }
-  }
-}
-
-/**
-  @} end of ComplexFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_f32.c
+ * Description:  Combined Radix Decimation in Frequency CFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_fft.h"
+#include "arm_mve_tables.h"
+
+
+static float32_t arm_inverse_fft_length_f32(uint16_t fftLen)
+{
+  float32_t retValue=1.0;
+
+  switch (fftLen)
+  {
+
+  case 4096U:
+    retValue = 0.000244140625;
+    break;
+
+  case 2048U:
+    retValue = 0.00048828125;
+    break;
+
+  case 1024U:
+    retValue = 0.0009765625f;
+    break;
+
+  case 512U:
+    retValue = 0.001953125;
+    break;
+
+  case 256U:
+    retValue = 0.00390625f;
+    break;
+
+  case 128U:
+    retValue = 0.0078125;
+    break;
+
+  case 64U:
+    retValue = 0.015625f;
+    break;
+
+  case 32U:
+    retValue = 0.03125;
+    break;
+
+  case 16U:
+    retValue = 0.0625f;
+    break;
+
+
+  default:
+    break;
+  }
+  return(retValue);
+}
+
+
+
+
+static void _arm_radix4_butterfly_f32_mve(const arm_cfft_instance_f32 * S,float32_t * pSrc, uint32_t fftLen)
+{
+    f32x4_t     vecTmp0, vecTmp1;
+    f32x4_t     vecSum0, vecDiff0, vecSum1, vecDiff1;
+    f32x4_t     vecA, vecB, vecC, vecD;
+    uint32_t    blkCnt;
+    uint32_t    n1, n2;
+    uint32_t    stage = 0;
+    int32_t     iter = 1;
+    static const int32_t strides[4] = {
+        (0 - 16) * (int32_t)sizeof(q31_t *),
+        (1 - 16) * (int32_t)sizeof(q31_t *),
+        (8 - 16) * (int32_t)sizeof(q31_t *),
+        (9 - 16) * (int32_t)sizeof(q31_t *)
+    };
+
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+    for (int k = fftLen / 4u; k > 1; k >>= 2)
+    {
+        float32_t const     *p_rearranged_twiddle_tab_stride1 =
+                            &S->rearranged_twiddle_stride1[
+                            S->rearranged_twiddle_tab_stride1_arr[stage]];
+        float32_t const     *p_rearranged_twiddle_tab_stride2 =
+                            &S->rearranged_twiddle_stride2[
+                            S->rearranged_twiddle_tab_stride2_arr[stage]];
+        float32_t const     *p_rearranged_twiddle_tab_stride3 =
+                            &S->rearranged_twiddle_stride3[
+                            S->rearranged_twiddle_tab_stride3_arr[stage]];
+
+        float32_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            float32_t    *inA = pBase;
+            float32_t    *inB = inA + n2 * CMPLX_DIM;
+            float32_t    *inC = inB + n2 * CMPLX_DIM;
+            float32_t    *inD = inC + n2 * CMPLX_DIM;
+            float32_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            float32_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            float32_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            f32x4_t            vecW;
+
+            blkCnt = n2 / 2;
+            /*
+             * load 2 f32 complex pair
+             */
+            vecA = vldrwq_f32(inA);
+            vecC = vldrwq_f32(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrwq_f32(inB);
+                vecD = vldrwq_f32(inD);
+
+                vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+                vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+                vecSum1 = vecB + vecD;
+                vecDiff1 = vecB - vecD;
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vecSum0 + vecSum1;
+                vst1q(inA, vecTmp0);
+                inA += 4;
+
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vecSum0 - vecSum1;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0);
+                vst1q(inB, vecTmp1);
+                inB += 4;
+
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW1);
+                pW1 +=4;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0);
+                vst1q(inC, vecTmp1);
+                inC += 4;
+
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_Conj_AxB(vecW, vecTmp0);
+                vst1q(inD, vecTmp1);
+                inD += 4;
+
+                vecA = vldrwq_f32(inA);
+                vecC = vldrwq_f32(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /* load scheduling */
+    vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+    vecC = vldrwq_gather_base_f32(vecScGathAddr, 16);
+
+    blkCnt = (fftLen >> 3);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+        vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+        vecB = vldrwq_gather_base_f32(vecScGathAddr, 8);
+        vecD = vldrwq_gather_base_f32(vecScGathAddr, 24);
+
+        vecSum1 = vecB + vecD;
+        vecDiff1 = vecB - vecD;
+
+        /* pre-load for next iteration */
+        vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+        vecC = vldrwq_gather_base_f32(vecScGathAddr, 16);
+
+        vecTmp0 = vecSum0 + vecSum1;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64, vecTmp0);
+
+        vecTmp0 = vecSum0 - vecSum1;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 16, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 24, vecTmp0);
+
+        blkCnt--;
+    }
+
+    /*
+     * End of last stage process
+     */
+}
+
+static void arm_cfft_radix4by2_f32_mve(const arm_cfft_instance_f32 * S, float32_t *pSrc, uint32_t fftLen)
+{
+    float32_t const *pCoefVec;
+    float32_t const  *pCoef = S->pTwiddle;
+    float32_t        *pIn0, *pIn1;
+    uint32_t          n2;
+    uint32_t          blkCnt;
+    f32x4_t         vecIn0, vecIn1, vecSum, vecDiff;
+    f32x4_t         vecCmplxTmp, vecTw;
+
+
+    n2 = fftLen >> 1;
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+    pCoefVec = pCoef;
+
+    blkCnt = n2 / 2;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(f32x4_t *) pIn0;
+        vecIn1 = *(f32x4_t *) pIn1;
+        vecTw = vld1q(pCoefVec);
+        pCoefVec += 4;
+
+        vecSum = vecIn0 + vecIn1;
+        vecDiff = vecIn0 - vecIn1;
+
+        vecCmplxTmp = MVE_CMPLX_MULT_FLT_Conj_AxB(vecTw, vecDiff);
+
+        vst1q(pIn0, vecSum);
+        pIn0 += 4;
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 4;
+
+        blkCnt--;
+    }
+
+    _arm_radix4_butterfly_f32_mve(S, pSrc, n2);
+
+    _arm_radix4_butterfly_f32_mve(S, pSrc + fftLen, n2);
+
+    pIn0 = pSrc;
+}
+
+static void _arm_radix4_butterfly_inverse_f32_mve(const arm_cfft_instance_f32 * S,float32_t * pSrc, uint32_t fftLen, float32_t onebyfftLen)
+{
+    f32x4_t vecTmp0, vecTmp1;
+    f32x4_t vecSum0, vecDiff0, vecSum1, vecDiff1;
+    f32x4_t vecA, vecB, vecC, vecD;
+    uint32_t  blkCnt;
+    uint32_t  n1, n2;
+    uint32_t  stage = 0;
+    int32_t  iter = 1;
+    static const int32_t strides[4] = {
+        (0 - 16) * (int32_t)sizeof(q31_t *),
+        (1 - 16) * (int32_t)sizeof(q31_t *),
+        (8 - 16) * (int32_t)sizeof(q31_t *),
+        (9 - 16) * (int32_t)sizeof(q31_t *)
+    };
+
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+    for (int k = fftLen / 4; k > 1; k >>= 2)
+    {
+        float32_t const *p_rearranged_twiddle_tab_stride1 =
+                &S->rearranged_twiddle_stride1[
+                S->rearranged_twiddle_tab_stride1_arr[stage]];
+        float32_t const *p_rearranged_twiddle_tab_stride2 =
+                &S->rearranged_twiddle_stride2[
+                S->rearranged_twiddle_tab_stride2_arr[stage]];
+        float32_t const *p_rearranged_twiddle_tab_stride3 =
+                &S->rearranged_twiddle_stride3[
+                S->rearranged_twiddle_tab_stride3_arr[stage]];
+
+        float32_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            float32_t    *inA = pBase;
+            float32_t    *inB = inA + n2 * CMPLX_DIM;
+            float32_t    *inC = inB + n2 * CMPLX_DIM;
+            float32_t    *inD = inC + n2 * CMPLX_DIM;
+            float32_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            float32_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            float32_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            f32x4_t       vecW;
+
+            blkCnt = n2 / 2;
+            /*
+             * load 2 f32 complex pair
+             */
+            vecA = vldrwq_f32(inA);
+            vecC = vldrwq_f32(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrwq_f32(inB);
+                vecD = vldrwq_f32(inD);
+
+                vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+                vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+                vecSum1 = vecB + vecD;
+                vecDiff1 = vecB - vecD;
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vecSum0 + vecSum1;
+                vst1q(inA, vecTmp0);
+                inA += 4;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vecSum0 - vecSum1;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0);
+                vst1q(inB, vecTmp1);
+                inB += 4;
+
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW1);
+                pW1 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0);
+                vst1q(inC, vecTmp1);
+                inC += 4;
+
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FLT_AxB(vecW, vecTmp0);
+                vst1q(inD, vecTmp1);
+                inD += 4;
+
+                vecA = vldrwq_f32(inA);
+                vecC = vldrwq_f32(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32 ((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /*
+     * load scheduling
+     */
+    vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+    vecC = vldrwq_gather_base_f32(vecScGathAddr, 16);
+
+    blkCnt = (fftLen >> 3);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vecA + vecC;  /* vecSum0 = vaddq(vecA, vecC) */
+        vecDiff0 = vecA - vecC; /* vecSum0 = vsubq(vecA, vecC) */
+
+        vecB = vldrwq_gather_base_f32(vecScGathAddr, 8);
+        vecD = vldrwq_gather_base_f32(vecScGathAddr, 24);
+
+        vecSum1 = vecB + vecD;
+        vecDiff1 = vecB - vecD;
+
+        vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);
+        vecC = vldrwq_gather_base_f32(vecScGathAddr, 16);
+
+        vecTmp0 = vecSum0 + vecSum1;
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64, vecTmp0);
+
+        vecTmp0 = vecSum0 - vecSum1;
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 8, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_A_ixB(vecDiff0, vecDiff1);
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 16, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_A_ixB(vecDiff0, vecDiff1);
+        vecTmp0 = vecTmp0 * onebyfftLen;
+        vstrwq_scatter_base_f32(vecScGathAddr, -64 + 24, vecTmp0);
+
+        blkCnt--;
+    }
+
+    /*
+     * End of last stage process
+     */
+}
+
+static void arm_cfft_radix4by2_inverse_f32_mve(const arm_cfft_instance_f32 * S,float32_t *pSrc, uint32_t fftLen)
+{
+    float32_t const *pCoefVec;
+    float32_t const  *pCoef = S->pTwiddle;
+    float32_t        *pIn0, *pIn1;
+    uint32_t          n2;
+    float32_t         onebyfftLen = arm_inverse_fft_length_f32(fftLen);
+    uint32_t          blkCnt;
+    f32x4_t         vecIn0, vecIn1, vecSum, vecDiff;
+    f32x4_t         vecCmplxTmp, vecTw;
+
+
+    n2 = fftLen >> 1;
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+    pCoefVec = pCoef;
+
+    blkCnt = n2 / 2;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(f32x4_t *) pIn0;
+        vecIn1 = *(f32x4_t *) pIn1;
+        vecTw = vld1q(pCoefVec);
+        pCoefVec += 4;
+
+        vecSum = vecIn0 + vecIn1;
+        vecDiff = vecIn0 - vecIn1;
+
+        vecCmplxTmp = MVE_CMPLX_MULT_FLT_AxB(vecTw, vecDiff);
+
+        vst1q(pIn0, vecSum);
+        pIn0 += 4;
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 4;
+
+        blkCnt--;
+    }
+
+    _arm_radix4_butterfly_inverse_f32_mve(S, pSrc, n2, onebyfftLen);
+
+    _arm_radix4_butterfly_inverse_f32_mve(S, pSrc + fftLen, n2, onebyfftLen);
+}
+
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point complex FFT.
+  @param[in]     S              points to an instance of the floating-point CFFT structure
+  @param[in,out] p1             points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+
+void arm_cfft_f32(
+  const arm_cfft_instance_f32 * S,
+        float32_t * pSrc,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+        uint32_t fftLen = S->fftLen;
+
+        if (ifftFlag == 1U) {
+
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_inverse_f32_mve(S, pSrc, fftLen, arm_inverse_fft_length_f32(S->fftLen));
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_inverse_f32_mve(S, pSrc, fftLen);
+                break;
+            }
+        } else {
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_f32_mve(S, pSrc, fftLen);
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_f32_mve(S, pSrc, fftLen);
+                break;
+            }
+        }
+
+
+        if (bitReverseFlag)
+        {
+
+            arm_bitreversal_32_inpl_mve((uint32_t*)pSrc, S->bitRevLength, S->pBitRevTable);
+
+        }
+}
+
+
+#else
+extern void arm_radix8_butterfly_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+extern void arm_bitreversal_32(
+        uint32_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @defgroup ComplexFFT Complex FFT Functions
+
+  @par
+                   The Fast Fourier Transform (FFT) is an efficient algorithm for computing the
+                   Discrete Fourier Transform (DFT).  The FFT can be orders of magnitude faster
+                   than the DFT, especially for long lengths.
+                   The algorithms described in this section
+                   operate on complex data.  A separate set of functions is devoted to handling
+                   of real sequences.
+  @par
+                   There are separate algorithms for handling floating-point, Q15, and Q31 data
+                   types.  The algorithms available for each data type are described next.
+  @par
+                   The FFT functions operate in-place.  That is, the array holding the input data
+                   will also be used to hold the corresponding result.  The input data is complex
+                   and contains <code>2*fftLen</code> interleaved values as shown below.
+                   <pre>{real[0], imag[0], real[1], imag[1], ...} </pre>
+                   The FFT result will be contained in the same array and the frequency domain
+                   values will have the same interleaving.
+
+  @par Floating-point
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-8
+                   stages are performed along with a single radix-2 or radix-4 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of <code>fftLen</code> when computing the forward transform.  The
+                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   For the MVE version, the new arm_cfft_init_f32 initialization function is
+                   <b>mandatory</b>. <b>Compilation flags are available to include only the required tables for the
+                   needed FFTs.</b> Other FFT versions can continue to be initialized as
+                   explained below.
+  @par
+                   For not MVE versions, pre-initialized data structures containing twiddle factors
+                   and bit reversal tables are provided and defined in <code>arm_const_structs.h</code>.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_f32.  For example:
+  @par
+                   <code>arm_cfft_f32(arm_cfft_sR_f32_len64, pSrc, 1, 1)</code>
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_f32 function follows:
+  @code
+                   const static arm_cfft_instance_f32 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_f32_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_f32_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_f32_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_f32_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_f32_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_f32_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_f32_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_f32_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_f32_len4096;
+                         break;
+                     }
+  @endcode
+  @par
+                   The new arm_cfft_init_f32 can also be used.
+  @par Q15 and Q31
+                   The floating-point complex FFT uses a mixed-radix algorithm.  Multiple radix-4
+                   stages are performed along with a single radix-2 stage, as needed.
+                   The algorithm supports lengths of [16, 32, 64, ..., 4096] and each length uses
+                   a different twiddle factor table.
+  @par
+                   The function uses the standard FFT definition and output values may grow by a
+                   factor of <code>fftLen</code> when computing the forward transform.  The
+                   inverse transform includes a scale of <code>1/fftLen</code> as part of the
+                   calculation and this matches the textbook definition of the inverse FFT.
+  @par
+                   Pre-initialized data structures containing twiddle factors and bit reversal
+                   tables are provided and defined in <code>arm_const_structs.h</code>.  Include
+                   this header in your function and then pass one of the constant structures as
+                   an argument to arm_cfft_q31. For example:
+  @par
+                   <code>arm_cfft_q31(arm_cfft_sR_q31_len64, pSrc, 1, 1)</code>
+  @par
+                   computes a 64-point inverse complex FFT including bit reversal.
+                   The data structures are treated as constant data and not modified during the
+                   calculation.  The same data structure can be reused for multiple transforms
+                   including mixing forward and inverse transforms.
+  @par
+                   Earlier releases of the library provided separate radix-2 and radix-4
+                   algorithms that operated on floating-point data.  These functions are still
+                   provided but are deprecated.  The older functions are slower and less general
+                   than the new functions.
+  @par
+                   An example of initialization of the constants for the arm_cfft_q31 function follows:
+  @code
+                   const static arm_cfft_instance_q31 *S;
+                   ...
+                     switch (length) {
+                       case 16:
+                         S = &arm_cfft_sR_q31_len16;
+                         break;
+                       case 32:
+                         S = &arm_cfft_sR_q31_len32;
+                         break;
+                       case 64:
+                         S = &arm_cfft_sR_q31_len64;
+                         break;
+                       case 128:
+                         S = &arm_cfft_sR_q31_len128;
+                         break;
+                       case 256:
+                         S = &arm_cfft_sR_q31_len256;
+                         break;
+                       case 512:
+                         S = &arm_cfft_sR_q31_len512;
+                         break;
+                       case 1024:
+                         S = &arm_cfft_sR_q31_len1024;
+                         break;
+                       case 2048:
+                         S = &arm_cfft_sR_q31_len2048;
+                         break;
+                       case 4096:
+                         S = &arm_cfft_sR_q31_len4096;
+                         break;
+                     }
+  @endcode
+
+ */
+
+void arm_cfft_radix8by2_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
+{
+  uint32_t    L  = S->fftLen;
+  float32_t * pCol1, * pCol2, * pMid1, * pMid2;
+  float32_t * p2 = p1 + L;
+  const float32_t * tw = (float32_t *) S->pTwiddle;
+  float32_t t1[4], t2[4], t3[4], t4[4], twR, twI;
+  float32_t m0, m1, m2, m3;
+  uint32_t l;
+
+  pCol1 = p1;
+  pCol2 = p2;
+
+  /* Define new length */
+  L >>= 1;
+
+  /* Initialize mid pointers */
+  pMid1 = p1 + L;
+  pMid2 = p2 + L;
+
+  /* do two dot Fourier transform */
+  for (l = L >> 2; l > 0; l-- )
+  {
+    t1[0] = p1[0];
+    t1[1] = p1[1];
+    t1[2] = p1[2];
+    t1[3] = p1[3];
+
+    t2[0] = p2[0];
+    t2[1] = p2[1];
+    t2[2] = p2[2];
+    t2[3] = p2[3];
+
+    t3[0] = pMid1[0];
+    t3[1] = pMid1[1];
+    t3[2] = pMid1[2];
+    t3[3] = pMid1[3];
+
+    t4[0] = pMid2[0];
+    t4[1] = pMid2[1];
+    t4[2] = pMid2[2];
+    t4[3] = pMid2[3];
+
+    *p1++ = t1[0] + t2[0];
+    *p1++ = t1[1] + t2[1];
+    *p1++ = t1[2] + t2[2];
+    *p1++ = t1[3] + t2[3];    /* col 1 */
+
+    t2[0] = t1[0] - t2[0];
+    t2[1] = t1[1] - t2[1];
+    t2[2] = t1[2] - t2[2];
+    t2[3] = t1[3] - t2[3];    /* for col 2 */
+
+    *pMid1++ = t3[0] + t4[0];
+    *pMid1++ = t3[1] + t4[1];
+    *pMid1++ = t3[2] + t4[2];
+    *pMid1++ = t3[3] + t4[3]; /* col 1 */
+
+    t4[0] = t4[0] - t3[0];
+    t4[1] = t4[1] - t3[1];
+    t4[2] = t4[2] - t3[2];
+    t4[3] = t4[3] - t3[3];    /* for col 2 */
+
+    twR = *tw++;
+    twI = *tw++;
+
+    /* multiply by twiddle factors */
+    m0 = t2[0] * twR;
+    m1 = t2[1] * twI;
+    m2 = t2[1] * twR;
+    m3 = t2[0] * twI;
+
+    /* R  =  R  *  Tr - I * Ti */
+    *p2++ = m0 + m1;
+    /* I  =  I  *  Tr + R * Ti */
+    *p2++ = m2 - m3;
+
+    /* use vertical symmetry */
+    /*  0.9988 - 0.0491i <==> -0.0491 - 0.9988i */
+    m0 = t4[0] * twI;
+    m1 = t4[1] * twR;
+    m2 = t4[1] * twI;
+    m3 = t4[0] * twR;
+
+    *pMid2++ = m0 - m1;
+    *pMid2++ = m2 + m3;
+
+    twR = *tw++;
+    twI = *tw++;
+
+    m0 = t2[2] * twR;
+    m1 = t2[3] * twI;
+    m2 = t2[3] * twR;
+    m3 = t2[2] * twI;
+
+    *p2++ = m0 + m1;
+    *p2++ = m2 - m3;
+
+    m0 = t4[2] * twI;
+    m1 = t4[3] * twR;
+    m2 = t4[3] * twI;
+    m3 = t4[2] * twR;
+
+    *pMid2++ = m0 - m1;
+    *pMid2++ = m2 + m3;
+  }
+
+  /* first col */
+  arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 2U);
+
+  /* second col */
+  arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 2U);
+}
+
+void arm_cfft_radix8by4_f32 (arm_cfft_instance_f32 * S, float32_t * p1)
+{
+    uint32_t    L  = S->fftLen >> 1;
+    float32_t * pCol1, *pCol2, *pCol3, *pCol4, *pEnd1, *pEnd2, *pEnd3, *pEnd4;
+    const float32_t *tw2, *tw3, *tw4;
+    float32_t * p2 = p1 + L;
+    float32_t * p3 = p2 + L;
+    float32_t * p4 = p3 + L;
+    float32_t t2[4], t3[4], t4[4], twR, twI;
+    float32_t p1ap3_0, p1sp3_0, p1ap3_1, p1sp3_1;
+    float32_t m0, m1, m2, m3;
+    uint32_t l, twMod2, twMod3, twMod4;
+
+    pCol1 = p1;         /* points to real values by default */
+    pCol2 = p2;
+    pCol3 = p3;
+    pCol4 = p4;
+    pEnd1 = p2 - 1;     /* points to imaginary values by default */
+    pEnd2 = p3 - 1;
+    pEnd3 = p4 - 1;
+    pEnd4 = pEnd3 + L;
+
+    tw2 = tw3 = tw4 = (float32_t *) S->pTwiddle;
+
+    L >>= 1;
+
+    /* do four dot Fourier transform */
+
+    twMod2 = 2;
+    twMod3 = 4;
+    twMod4 = 6;
+
+    /* TOP */
+    p1ap3_0 = p1[0] + p3[0];
+    p1sp3_0 = p1[0] - p3[0];
+    p1ap3_1 = p1[1] + p3[1];
+    p1sp3_1 = p1[1] - p3[1];
+
+    /* col 2 */
+    t2[0] = p1sp3_0 + p2[1] - p4[1];
+    t2[1] = p1sp3_1 - p2[0] + p4[0];
+    /* col 3 */
+    t3[0] = p1ap3_0 - p2[0] - p4[0];
+    t3[1] = p1ap3_1 - p2[1] - p4[1];
+    /* col 4 */
+    t4[0] = p1sp3_0 - p2[1] + p4[1];
+    t4[1] = p1sp3_1 + p2[0] - p4[0];
+    /* col 1 */
+    *p1++ = p1ap3_0 + p2[0] + p4[0];
+    *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+    /* Twiddle factors are ones */
+    *p2++ = t2[0];
+    *p2++ = t2[1];
+    *p3++ = t3[0];
+    *p3++ = t3[1];
+    *p4++ = t4[0];
+    *p4++ = t4[1];
+
+    tw2 += twMod2;
+    tw3 += twMod3;
+    tw4 += twMod4;
+
+    for (l = (L - 2) >> 1; l > 0; l-- )
+    {
+      /* TOP */
+      p1ap3_0 = p1[0] + p3[0];
+      p1sp3_0 = p1[0] - p3[0];
+      p1ap3_1 = p1[1] + p3[1];
+      p1sp3_1 = p1[1] - p3[1];
+      /* col 2 */
+      t2[0] = p1sp3_0 + p2[1] - p4[1];
+      t2[1] = p1sp3_1 - p2[0] + p4[0];
+      /* col 3 */
+      t3[0] = p1ap3_0 - p2[0] - p4[0];
+      t3[1] = p1ap3_1 - p2[1] - p4[1];
+      /* col 4 */
+      t4[0] = p1sp3_0 - p2[1] + p4[1];
+      t4[1] = p1sp3_1 + p2[0] - p4[0];
+      /* col 1 - top */
+      *p1++ = p1ap3_0 + p2[0] + p4[0];
+      *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+      /* BOTTOM */
+      p1ap3_1 = pEnd1[-1] + pEnd3[-1];
+      p1sp3_1 = pEnd1[-1] - pEnd3[-1];
+      p1ap3_0 = pEnd1[ 0] + pEnd3[0];
+      p1sp3_0 = pEnd1[ 0] - pEnd3[0];
+      /* col 2 */
+      t2[2] = pEnd2[0] - pEnd4[0] + p1sp3_1;
+      t2[3] = pEnd1[0] - pEnd3[0] - pEnd2[-1] + pEnd4[-1];
+      /* col 3 */
+      t3[2] = p1ap3_1 - pEnd2[-1] - pEnd4[-1];
+      t3[3] = p1ap3_0 - pEnd2[ 0] - pEnd4[ 0];
+      /* col 4 */
+      t4[2] = pEnd2[ 0] - pEnd4[ 0] - p1sp3_1;
+      t4[3] = pEnd4[-1] - pEnd2[-1] - p1sp3_0;
+      /* col 1 - Bottom */
+      *pEnd1-- = p1ap3_0 + pEnd2[ 0] + pEnd4[ 0];
+      *pEnd1-- = p1ap3_1 + pEnd2[-1] + pEnd4[-1];
+
+      /* COL 2 */
+      /* read twiddle factors */
+      twR = *tw2++;
+      twI = *tw2++;
+      /* multiply by twiddle factors */
+      /*  let    Z1 = a + i(b),   Z2 = c + i(d) */
+      /*   =>  Z1 * Z2  =  (a*c - b*d) + i(b*c + a*d) */
+
+      /* Top */
+      m0 = t2[0] * twR;
+      m1 = t2[1] * twI;
+      m2 = t2[1] * twR;
+      m3 = t2[0] * twI;
+
+      *p2++ = m0 + m1;
+      *p2++ = m2 - m3;
+      /* use vertical symmetry col 2 */
+      /* 0.9997 - 0.0245i  <==>  0.0245 - 0.9997i */
+      /* Bottom */
+      m0 = t2[3] * twI;
+      m1 = t2[2] * twR;
+      m2 = t2[2] * twI;
+      m3 = t2[3] * twR;
+
+      *pEnd2-- = m0 - m1;
+      *pEnd2-- = m2 + m3;
+
+      /* COL 3 */
+      twR = tw3[0];
+      twI = tw3[1];
+      tw3 += twMod3;
+      /* Top */
+      m0 = t3[0] * twR;
+      m1 = t3[1] * twI;
+      m2 = t3[1] * twR;
+      m3 = t3[0] * twI;
+
+      *p3++ = m0 + m1;
+      *p3++ = m2 - m3;
+      /* use vertical symmetry col 3 */
+      /* 0.9988 - 0.0491i  <==>  -0.9988 - 0.0491i */
+      /* Bottom */
+      m0 = -t3[3] * twR;
+      m1 =  t3[2] * twI;
+      m2 =  t3[2] * twR;
+      m3 =  t3[3] * twI;
+
+      *pEnd3-- = m0 - m1;
+      *pEnd3-- = m3 - m2;
+
+      /* COL 4 */
+      twR = tw4[0];
+      twI = tw4[1];
+      tw4 += twMod4;
+      /* Top */
+      m0 = t4[0] * twR;
+      m1 = t4[1] * twI;
+      m2 = t4[1] * twR;
+      m3 = t4[0] * twI;
+
+      *p4++ = m0 + m1;
+      *p4++ = m2 - m3;
+      /* use vertical symmetry col 4 */
+      /* 0.9973 - 0.0736i  <==>  -0.0736 + 0.9973i */
+      /* Bottom */
+      m0 = t4[3] * twI;
+      m1 = t4[2] * twR;
+      m2 = t4[2] * twI;
+      m3 = t4[3] * twR;
+
+      *pEnd4-- = m0 - m1;
+      *pEnd4-- = m2 + m3;
+    }
+
+    /* MIDDLE */
+    /* Twiddle factors are */
+    /*  1.0000  0.7071-0.7071i  -1.0000i  -0.7071-0.7071i */
+    p1ap3_0 = p1[0] + p3[0];
+    p1sp3_0 = p1[0] - p3[0];
+    p1ap3_1 = p1[1] + p3[1];
+    p1sp3_1 = p1[1] - p3[1];
+
+    /* col 2 */
+    t2[0] = p1sp3_0 + p2[1] - p4[1];
+    t2[1] = p1sp3_1 - p2[0] + p4[0];
+    /* col 3 */
+    t3[0] = p1ap3_0 - p2[0] - p4[0];
+    t3[1] = p1ap3_1 - p2[1] - p4[1];
+    /* col 4 */
+    t4[0] = p1sp3_0 - p2[1] + p4[1];
+    t4[1] = p1sp3_1 + p2[0] - p4[0];
+    /* col 1 - Top */
+    *p1++ = p1ap3_0 + p2[0] + p4[0];
+    *p1++ = p1ap3_1 + p2[1] + p4[1];
+
+    /* COL 2 */
+    twR = tw2[0];
+    twI = tw2[1];
+
+    m0 = t2[0] * twR;
+    m1 = t2[1] * twI;
+    m2 = t2[1] * twR;
+    m3 = t2[0] * twI;
+
+    *p2++ = m0 + m1;
+    *p2++ = m2 - m3;
+    /* COL 3 */
+    twR = tw3[0];
+    twI = tw3[1];
+
+    m0 = t3[0] * twR;
+    m1 = t3[1] * twI;
+    m2 = t3[1] * twR;
+    m3 = t3[0] * twI;
+
+    *p3++ = m0 + m1;
+    *p3++ = m2 - m3;
+    /* COL 4 */
+    twR = tw4[0];
+    twI = tw4[1];
+
+    m0 = t4[0] * twR;
+    m1 = t4[1] * twI;
+    m2 = t4[1] * twR;
+    m3 = t4[0] * twI;
+
+    *p4++ = m0 + m1;
+    *p4++ = m2 - m3;
+
+    /* first col */
+    arm_radix8_butterfly_f32 (pCol1, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* second col */
+    arm_radix8_butterfly_f32 (pCol2, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* third col */
+    arm_radix8_butterfly_f32 (pCol3, L, (float32_t *) S->pTwiddle, 4U);
+
+    /* fourth col */
+    arm_radix8_butterfly_f32 (pCol4, L, (float32_t *) S->pTwiddle, 4U);
+}
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point complex FFT.
+  @param[in]     S              points to an instance of the floating-point CFFT structure
+  @param[in,out] p1             points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+void arm_cfft_f32(
+  const arm_cfft_instance_f32 * S,
+        float32_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+  uint32_t  L = S->fftLen, l;
+  float32_t invL, * pSrc;
+
+  if (ifftFlag == 1U)
+  {
+    /* Conjugate input data */
+    pSrc = p1 + 1;
+    for (l = 0; l < L; l++)
+    {
+      *pSrc = -*pSrc;
+      pSrc += 2;
+    }
+  }
+
+  switch (L)
+  {
+  case 16:
+  case 128:
+  case 1024:
+    arm_cfft_radix8by2_f32 ( (arm_cfft_instance_f32 *) S, p1);
+    break;
+  case 32:
+  case 256:
+  case 2048:
+    arm_cfft_radix8by4_f32 ( (arm_cfft_instance_f32 *) S, p1);
+    break;
+  case 64:
+  case 512:
+  case 4096:
+    arm_radix8_butterfly_f32 ( p1, L, (float32_t *) S->pTwiddle, 1);
+    break;
+  }
+
+  if ( bitReverseFlag )
+    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
+
+  if (ifftFlag == 1U)
+  {
+    invL = 1.0f / (float32_t)L;
+
+    /* Conjugate and scale output data */
+    pSrc = p1;
+    for (l= 0; l < L; l++)
+    {
+      *pSrc++ *=   invL ;
+      *pSrc    = -(*pSrc) * invL;
+      pSrc++;
+    }
+  }
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c
new file mode 100644
index 00000000..d686eb8c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_f64.c
@@ -0,0 +1,318 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_f64.c
+ * Description:  Combined Radix Decimation in Frequency CFFT Double Precision Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+
+extern void arm_radix4_butterfly_f64(
+        float64_t * pSrc,
+        uint16_t fftLen,
+  const float64_t * pCoef,
+        uint16_t twidCoefModifier);
+
+extern void arm_bitreversal_64(
+        uint64_t * pSrc,
+  const uint16_t   bitRevLen,
+  const uint16_t * pBitRevTable);
+
+/**
+* @} end of ComplexFFT group
+*/
+
+/* ----------------------------------------------------------------------
+ * Internal helper function used by the FFTs
+ * ---------------------------------------------------------------------- */
+
+/*
+* @brief  Core function for the Double Precision floating-point CFFT butterfly process.
+* @param[in, out] *pSrc            points to the in-place buffer of F64 data type.
+* @param[in]      fftLen           length of the FFT.
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+* @return none.
+*/
+
+void arm_radix4_butterfly_f64(
+        float64_t * pSrc,
+        uint16_t fftLen,
+  const float64_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+
+   float64_t co1, co2, co3, si1, si2, si3;
+   uint32_t ia1, ia2, ia3;
+   uint32_t i0, i1, i2, i3;
+   uint32_t n1, n2, j, k;
+
+   float64_t t1, t2, r1, r2, s1, s2;
+
+
+   /*  Initializations for the fft calculation */
+   n2 = fftLen;
+   n1 = n2;
+   for (k = fftLen; k > 1U; k >>= 2U)
+   {
+      /*  Initializations for the fft calculation */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  FFT Calculation */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            /* xa + xc */
+            r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];
+
+            /* xa - xc */
+            r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];
+
+            /* ya + yc */
+            s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+
+            /* ya - yc */
+            s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+            /* xb + xd */
+            t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+            /* xa' = xa + xb + xc + xd */
+            pSrc[2U * i0] = r1 + t1;
+
+            /* xa + xc -(xb + xd) */
+            r1 = r1 - t1;
+
+            /* yb + yd */
+            t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+
+            /* ya' = ya + yb + yc + yd */
+            pSrc[(2U * i0) + 1U] = s1 + t2;
+
+            /* (ya + yc) - (yb + yd) */
+            s1 = s1 - t2;
+
+            /* (yb - yd) */
+            t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+
+            /* (xb - xd) */
+            t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = (r1 * co2) + (s1 * si2);
+
+            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2);
+
+            /* (xa - xc) + (yb - yd) */
+            r1 = r2 + t1;
+
+            /* (xa - xc) - (yb - yd) */
+            r2 = r2 - t1;
+
+            /* (ya - yc) -  (xb - xd) */
+            s1 = s2 - t2;
+
+            /* (ya - yc) +  (xb - xd) */
+            s2 = s2 + t2;
+
+            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = (r1 * co1) + (s1 * si1);
+
+            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1);
+
+            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = (r2 * co3) + (s2 * si3);
+
+            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3);
+
+            i0 += n1;
+         } while ( i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+}
+
+/*
+* @brief  Core function for the Double Precision floating-point CFFT butterfly process.
+* @param[in, out] *pSrc            points to the in-place buffer of F64 data type.
+* @param[in]      fftLen           length of the FFT.
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+* @return none.
+*/
+
+void arm_cfft_radix4by2_f64(
+    float64_t * pSrc,
+    uint32_t fftLen,
+    const float64_t * pCoef)
+{
+    uint32_t i, l;
+    uint32_t n2, ia;
+    float64_t xt, yt, cosVal, sinVal;
+    float64_t p0, p1,p2,p3,a0,a1;
+
+    n2 = fftLen >> 1;
+    ia = 0;
+    for (i = 0; i < n2; i++)
+    {
+        cosVal = pCoef[2*ia];
+        sinVal = pCoef[2*ia + 1];
+        ia++;
+
+        l = i + n2;
+
+        /*  Butterfly implementation */
+        a0 = pSrc[2 * i] + pSrc[2 * l];
+        xt = pSrc[2 * i] - pSrc[2 * l];
+
+        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+        a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+        p0 = xt * cosVal;
+        p1 = yt * sinVal;
+        p2 = yt * cosVal;
+        p3 = xt * sinVal;
+
+        pSrc[2 * i]     = a0;
+        pSrc[2 * i + 1] = a1;
+
+        pSrc[2 * l]     = p0 + p1;
+        pSrc[2 * l + 1] = p2 - p3;
+
+    }
+
+    // first col
+    arm_radix4_butterfly_f64( pSrc, n2, (float64_t*)pCoef, 2U);
+    // second col
+    arm_radix4_butterfly_f64( pSrc + fftLen, n2, (float64_t*)pCoef, 2U);
+
+}
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Double Precision floating-point complex FFT.
+  @param[in]     S              points to an instance of the Double Precision floating-point CFFT structure
+  @param[in,out] p1             points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+void arm_cfft_f64(
+  const arm_cfft_instance_f64 * S,
+        float64_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+    uint32_t  L = S->fftLen, l;
+    float64_t invL, * pSrc;
+
+    if (ifftFlag == 1U)
+    {
+        /*  Conjugate input data  */
+        pSrc = p1 + 1;
+        for(l=0; l<L; l++)
+        {
+            *pSrc = -*pSrc;
+            pSrc += 2;
+        }
+    }
+
+    switch (L)
+    {
+        case 16:
+        case 64:
+        case 256:
+        case 1024:
+        case 4096:
+        arm_radix4_butterfly_f64  (p1, L, (float64_t*)S->pTwiddle, 1U);
+        break;
+
+        case 32:
+        case 128:
+        case 512:
+        case 2048:
+        arm_cfft_radix4by2_f64  ( p1, L, (float64_t*)S->pTwiddle);
+        break;
+
+    }
+
+    if ( bitReverseFlag )
+        arm_bitreversal_64((uint64_t*)p1, S->bitRevLength,S->pBitRevTable);
+
+    if (ifftFlag == 1U)
+    {
+        invL = 1.0 / (float64_t)L;
+        /*  Conjugate and scale output data */
+        pSrc = p1;
+        for(l=0; l<L; l++)
+        {
+            *pSrc++ *=   invL ;
+            *pSrc  = -(*pSrc) * invL;
+            pSrc++;
+        }
+    }
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f16.c
new file mode 100755
index 00000000..fdf887ba
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f16.c
@@ -0,0 +1,363 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_init_f16.c
+ * Description:  Initialization function for cfft f16 instance
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define FFTINIT(EXT,SIZE)                                           \
+  S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength;        \
+  S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable;         \
+  S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle;
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the cfft f16 function
+  @param[in,out] S              points to an instance of the floating-point CFFT structure
+  @param[in]     fftLen         fft length (number of complex samples)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+
+  @par          Use of this function is mandatory only for the MVE version of the FFT.
+                Other versions can still initialize directly the data structure using 
+                variables declared in arm_const_structs.h
+ */
+
+#include "dsp/transform_functions_f16.h"
+#include "arm_common_tables_f16.h"
+#include "arm_const_structs_f16.h"
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_vec_fft.h"
+#include "arm_mve_tables_f16.h"
+
+arm_status arm_cfft_radix4by2_rearrange_twiddles_f16(arm_cfft_instance_f16 *S, int twidCoefModifier)
+{
+                                                                  
+        switch (S->fftLen >> (twidCoefModifier - 1)) {  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F16_4096)
+        case 4096U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_f16;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_4096_f16;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_f16;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_4096_f16;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_f16;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_4096_f16;                                                     
+            break; 
+#endif                                  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F16_1024) || defined(ARM_TABLE_TWIDDLECOEF_F16_2048)                                                                                                  
+        case 1024U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_f16;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_1024_f16;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_f16;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_1024_f16;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_f16;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_1024_f16;                                                                          
+            break;                                                                                 
+ #endif 
+
+ #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+    || defined(ARM_TABLE_TWIDDLECOEF_F16_256) || defined(ARM_TABLE_TWIDDLECOEF_F16_512)                                                                                              
+        case 256U:                                                                                 
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_f16;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_256_f16;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_f16;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_256_f16;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_f16;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_256_f16;    
+
+            break;                     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F16_64) || defined(ARM_TABLE_TWIDDLECOEF_F16_128)
+        case 64U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_f16;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_64_f16;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_f16;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_64_f16;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_f16;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_64_f16;                                                                         
+            break;  
+#endif                                                                               
+              
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F16_16) || defined(ARM_TABLE_TWIDDLECOEF_F16_32)                                                                                                                                                                                                             
+        case 16U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_f16;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_16_f16;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_f16;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_16_f16;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_f16;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_16_f16;                                                                       
+            break;  
+#endif                                                                               
+                                                                                                   
+        default:  
+            return(ARM_MATH_ARGUMENT_ERROR);                                                                                 
+            break;                                                                                 
+            /* invalid sizes already filtered */                                                   
+        }                                                                                          
+
+        return(ARM_MATH_SUCCESS);
+
+}
+
+arm_status arm_cfft_init_f16(
+  arm_cfft_instance_f16 * S,
+  uint16_t fftLen)
+{
+
+        /*  Initialise the default arm status */                                
+        arm_status status = ARM_MATH_SUCCESS;                                   
+                                                                                
+        /*  Initialise the FFT length */                                        
+        S->fftLen = fftLen;                                                     
+                                                                                
+        /*  Initialise the Twiddle coefficient pointer */                       
+        S->pTwiddle = NULL;                         
+                                                                                
+                                                                                
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {                                                    
+            /*  Initializations of structure parameters for 4096 point FFT */   
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_F16_4096))                                                          
+        case 4096U:  
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096;   
+            S->pTwiddle = (float16_t *)twiddleCoefF16_4096;       
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1);               
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F16_2048))                                                                                                         
+            /*  Initializations of structure parameters for 2048 point FFT */   
+        case 2048U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048;
+            S->pTwiddle = (float16_t *)twiddleCoefF16_2048;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2);           
+            break;     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F16_1024))                                                                                                                   
+            /*  Initializations of structure parameters for 1024 point FFT */   
+        case 1024U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; 
+            S->pTwiddle = (float16_t *)twiddleCoefF16_1024;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_F16_512))                                                            
+            /*  Initializations of structure parameters for 512 point FFT */    
+        case 512U:                                                              
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512;  
+            S->pTwiddle = (float16_t *)twiddleCoefF16_512;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_F16_256))                                                           
+        case 256U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; 
+            S->pTwiddle = (float16_t *)twiddleCoefF16_256;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1);           
+            break;  
+#endif                                                            
+                 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_F16_128))                                                                                                                           
+        case 128U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; 
+            S->pTwiddle = (float16_t *)twiddleCoefF16_128;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_F16_64))                                                                                                                       
+        case 64U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64;  
+            S->pTwiddle = (float16_t *)twiddleCoefF16_64;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_F16_32))                                                                                                                           
+        case 32U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32;  
+            S->pTwiddle = (float16_t *)twiddleCoefF16_32;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 2);           
+            break;                                                              
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_F16_16))                                                                                                                                 
+        case 16U:                                                               
+            /*  Initializations of structure parameters for 16 point FFT */     
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; 
+            S->pTwiddle = (float16_t *)twiddleCoefF16_16;           
+            status=arm_cfft_radix4by2_rearrange_twiddles_f16(S, 1);           
+            break;                                                              
+#endif                                                                             
+                                                                                
+        default:                                                                
+            /*  Reporting argument error if fftSize is not valid value */       
+            status = ARM_MATH_ARGUMENT_ERROR;                                   
+            break;                                                              
+        }                                                                       
+                                                                                
+                                                                                
+        return (status);     
+}
+#else
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+arm_status arm_cfft_init_f16(
+  arm_cfft_instance_f16 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */
+        arm_status status = ARM_MATH_SUCCESS;
+
+        /*  Initialise the FFT length */
+        S->fftLen = fftLen;
+
+        /*  Initialise the Twiddle coefficient pointer */
+        S->pTwiddle = NULL;
+
+
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
+            /*  Initializations of structure parameters for 4096 point FFT */
+        case 4096U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f16,4096);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
+            /*  Initializations of structure parameters for 2048 point FFT */
+        case 2048U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f16,2048);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
+            /*  Initializations of structure parameters for 1024 point FFT */
+        case 1024U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f16,1024);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
+            /*  Initializations of structure parameters for 512 point FFT */
+        case 512U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f16,512);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
+        case 256U:
+            FFTINIT(f16,256);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
+        case 128U:
+            FFTINIT(f16,128);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
+        case 64U:
+            FFTINIT(f16,64);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
+        case 32U:
+            FFTINIT(f16,32);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
+        case 16U:
+            /*  Initializations of structure parameters for 16 point FFT */
+            FFTINIT(f16,16);
+            break;
+#endif
+
+        default:
+            /*  Reporting argument error if fftSize is not valid value */
+            status = ARM_MATH_ARGUMENT_ERROR;
+            break;
+        }
+
+
+        return (status);
+}
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c
new file mode 100755
index 00000000..abfab4af
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f32.c
@@ -0,0 +1,358 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_init_f32.c
+ * Description:  Initialization function for cfft f32 instance
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define FFTINIT(EXT,SIZE)                                           \
+  S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength;        \
+  S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable;         \
+  S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle;
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the cfft f32 function
+  @param[in,out] S              points to an instance of the floating-point CFFT structure
+  @param[in]     fftLen         fft length (number of complex samples)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+
+  @par          Use of this function is mandatory only for the MVE version of the FFT.
+                Other versions can still initialize directly the data structure using 
+                variables declared in arm_const_structs.h
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_vec_fft.h"
+#include "arm_mve_tables.h"
+
+arm_status arm_cfft_radix4by2_rearrange_twiddles_f32(arm_cfft_instance_f32 *S, int twidCoefModifier)
+{
+                                                                  
+        switch (S->fftLen >> (twidCoefModifier - 1)) {  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)                                                                                                
+        case 4096U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_f32;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_4096_f32;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_f32;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_4096_f32;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_f32;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_4096_f32;                                                     
+            break; 
+#endif                                  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F32_1024) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)                                                                                                  
+        case 1024U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_f32;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_1024_f32;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_f32;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_1024_f32;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_f32;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_1024_f32;                                                                          
+            break;                                                                                 
+ #endif 
+
+ #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F32_256) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)                                                                                                 
+        case 256U:                                                                                 
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_f32;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_256_f32;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_f32;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_256_f32;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_f32;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_256_f32;    
+
+            break;                     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F32_64) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
+        case 64U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_f32;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_64_f32;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_f32;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_64_f32;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_f32;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_64_f32;                                                                         
+            break;  
+#endif                                                                               
+              
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) \
+            || defined(ARM_TABLE_TWIDDLECOEF_F32_16) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)                                                                                                                                                                                                               
+        case 16U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_f32;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_16_f32;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_f32;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_16_f32;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_f32;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_16_f32;                                                                       
+            break;  
+#endif                                                                               
+                                                                                                   
+        default:  
+            return(ARM_MATH_ARGUMENT_ERROR);                                                                                 
+            break;                                                                                 
+            /* invalid sizes already filtered */                                                   
+        }                                                                                          
+
+        return(ARM_MATH_SUCCESS);
+
+}
+
+arm_status arm_cfft_init_f32(
+  arm_cfft_instance_f32 * S,
+  uint16_t fftLen)
+{
+
+        /*  Initialise the default arm status */                                
+        arm_status status = ARM_MATH_SUCCESS;                                   
+                                                                                
+        /*  Initialise the FFT length */                                        
+        S->fftLen = fftLen;                                                     
+                                                                                
+        /*  Initialise the Twiddle coefficient pointer */                       
+        S->pTwiddle = NULL;                         
+                                                                                
+                                                                                
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {                                                    
+            /*  Initializations of structure parameters for 4096 point FFT */   
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_F32_4096))                     
+        case 4096U:  
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096;   
+            S->pTwiddle = (float32_t *)twiddleCoef_4096;       
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1);               
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048))                                                
+            /*  Initializations of structure parameters for 2048 point FFT */   
+        case 2048U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048;
+            S->pTwiddle = (float32_t *)twiddleCoef_2048;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2);           
+            break;     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024))                                                           
+            /*  Initializations of structure parameters for 1024 point FFT */   
+        case 1024U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; 
+            S->pTwiddle = (float32_t *)twiddleCoef_1024;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512))                     
+            /*  Initializations of structure parameters for 512 point FFT */    
+        case 512U:                                                              
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512;  
+            S->pTwiddle = (float32_t *)twiddleCoef_512;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256))                                                           
+        case 256U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; 
+            S->pTwiddle = (float32_t *)twiddleCoef_256;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1);           
+            break;  
+#endif                                                            
+                 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128))                                                                                                                          
+        case 128U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; 
+            S->pTwiddle = (float32_t *)twiddleCoef_128;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64))                                                                                                                      
+        case 64U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64;  
+            S->pTwiddle = (float32_t *)twiddleCoef_64;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32))                                                                                                                           
+        case 32U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32;  
+            S->pTwiddle = (float32_t *)twiddleCoef_32;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 2);           
+            break;                                                              
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16))                                                                                                                                
+        case 16U:                                                               
+            /*  Initializations of structure parameters for 16 point FFT */     
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; 
+            S->pTwiddle = (float32_t *)twiddleCoef_16;           
+            status=arm_cfft_radix4by2_rearrange_twiddles_f32(S, 1);           
+            break;                                                              
+#endif                                                                             
+                                                                                
+        default:                                                                
+            /*  Reporting argument error if fftSize is not valid value */       
+            status = ARM_MATH_ARGUMENT_ERROR;                                   
+            break;                                                              
+        }                                                                       
+                                                                                
+                                                                                
+        return (status);     
+}
+#else
+arm_status arm_cfft_init_f32(
+  arm_cfft_instance_f32 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */
+        arm_status status = ARM_MATH_SUCCESS;
+
+        /*  Initialise the FFT length */
+        S->fftLen = fftLen;
+
+        /*  Initialise the Twiddle coefficient pointer */
+        S->pTwiddle = NULL;
+
+
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
+            /*  Initializations of structure parameters for 4096 point FFT */
+        case 4096U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f32,4096);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
+            /*  Initializations of structure parameters for 2048 point FFT */
+        case 2048U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f32,2048);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
+            /*  Initializations of structure parameters for 1024 point FFT */
+        case 1024U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f32,1024);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
+            /*  Initializations of structure parameters for 512 point FFT */
+        case 512U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f32,512);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
+        case 256U:
+            FFTINIT(f32,256);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
+        case 128U:
+            FFTINIT(f32,128);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
+        case 64U:
+            FFTINIT(f32,64);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
+        case 32U:
+            FFTINIT(f32,32);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
+        case 16U:
+            /*  Initializations of structure parameters for 16 point FFT */
+            FFTINIT(f32,16);
+            break;
+#endif
+
+        default:
+            /*  Reporting argument error if fftSize is not valid value */
+            status = ARM_MATH_ARGUMENT_ERROR;
+            break;
+        }
+
+
+        return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c
new file mode 100755
index 00000000..26bee3e4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_f64.c
@@ -0,0 +1,150 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_init_f64.c
+ * Description:  Initialization function for cfft f64 instance
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define FFTINIT(EXT,SIZE)                                           \
+  S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength;        \
+  S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable;         \
+  S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle;
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the cfft f64 function
+  @param[in,out] S              points to an instance of the floating-point CFFT structure
+  @param[in]     fftLen         fft length (number of complex samples)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+
+  @par          Use of this function is mandatory only for the MVE version of the FFT.
+                Other versions can still initialize directly the data structure using 
+                variables declared in arm_const_structs.h
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+
+arm_status arm_cfft_init_f64(
+  arm_cfft_instance_f64 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */
+        arm_status status = ARM_MATH_SUCCESS;
+
+        /*  Initialise the FFT length */
+        S->fftLen = fftLen;
+
+        /*  Initialise the Twiddle coefficient pointer */
+        S->pTwiddle = NULL;
+
+
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_4096) && defined(ARM_TABLE_BITREVIDX_FLT_4096))
+            /*  Initializations of structure parameters for 4096 point FFT */
+        case 4096U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f64,4096);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048))
+            /*  Initializations of structure parameters for 2048 point FFT */
+        case 2048U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f64,2048);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024))
+            /*  Initializations of structure parameters for 1024 point FFT */
+        case 1024U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f64,1024);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_512) && defined(ARM_TABLE_BITREVIDX_FLT_512))
+            /*  Initializations of structure parameters for 512 point FFT */
+        case 512U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(f64,512);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_256) && defined(ARM_TABLE_BITREVIDX_FLT_256))
+        case 256U:
+            FFTINIT(f64,256);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_128) && defined(ARM_TABLE_BITREVIDX_FLT_128))
+        case 128U:
+            FFTINIT(f64,128);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_64) && defined(ARM_TABLE_BITREVIDX_FLT_64))
+        case 64U:
+            FFTINIT(f64,64);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_32) && defined(ARM_TABLE_BITREVIDX_FLT_32))
+        case 32U:
+            FFTINIT(f64,32);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_f64_16) && defined(ARM_TABLE_BITREVIDX_FLT_16))
+        case 16U:
+            /*  Initializations of structure parameters for 16 point FFT */
+            FFTINIT(f64,16);
+            break;
+#endif
+
+        default:
+            /*  Reporting argument error if fftSize is not valid value */
+            status = ARM_MATH_ARGUMENT_ERROR;
+            break;
+        }
+
+
+        return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c
new file mode 100755
index 00000000..3cf6e3a6
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q15.c
@@ -0,0 +1,356 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_init_q15.c
+ * Description:  Initialization function for cfft q15 instance
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define FFTINIT(EXT,SIZE)                                           \
+  S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength;        \
+  S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable;         \
+  S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle;
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the cfft q15 function
+  @param[in,out] S              points to an instance of the floating-point CFFT structure
+  @param[in]     fftLen         fft length (number of complex samples)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+
+  @par          Use of this function is mandatory only for the MVE version of the FFT.
+                Other versions can still initialize directly the data structure using 
+                variables declared in arm_const_structs.h
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+#if defined(ARM_MATH_MVEI)  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_vec_fft.h"
+#include "arm_mve_tables.h"
+
+
+arm_status arm_cfft_radix4by2_rearrange_twiddles_q15(arm_cfft_instance_q15 *S, int twidCoefModifier)
+{
+                                                                  
+        switch (S->fftLen >> (twidCoefModifier - 1)) {  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096))
+        case 4096U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_q15;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_4096_q15;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_q15;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_4096_q15;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_q15;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_4096_q15;                                                     
+            break; 
+#endif                                  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048))                                                                                                   
+        case 1024U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_q15;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_1024_q15;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_q15;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_1024_q15;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_q15;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_1024_q15;                                                                          
+            break;                                                                                 
+ #endif 
+
+ #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256)) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512))                                                                                                  
+        case 256U:                                                                                 
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_q15;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_256_q15;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_q15;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_256_q15;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_q15;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_256_q15;    
+
+            break;                     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64)) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128))
+        case 64U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_q15;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_64_q15;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_q15;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_64_q15;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_q15;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_64_q15;                                                                         
+            break;  
+#endif                                                                               
+              
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16)) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32))                                                                                                                                                                                                                
+        case 16U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_q15;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_16_q15;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_q15;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_16_q15;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_q15;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_16_q15;                                                                       
+            break;  
+#endif                                                                               
+                                                                                                   
+        default:  
+            return(ARM_MATH_ARGUMENT_ERROR);                                                                                 
+            break;                                                                                 
+            /* invalid sizes already filtered */                                                   
+        }                                                                                          
+
+        return(ARM_MATH_SUCCESS);
+
+}
+
+
+
+arm_status arm_cfft_init_q15(
+  arm_cfft_instance_q15 * S,
+  uint16_t fftLen)
+{
+
+        /*  Initialise the default arm status */                                
+        arm_status status = ARM_MATH_SUCCESS;                                   
+                                                                                
+        /*  Initialise the FFT length */                                        
+        S->fftLen = fftLen;                                                     
+                                                                                
+        /*  Initialise the Twiddle coefficient pointer */                       
+        S->pTwiddle = NULL;                         
+                                                                                
+                                                                                
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {                                                    
+            /*  Initializations of structure parameters for 4096 point FFT */   
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q15_4096))                                                           
+        case 4096U:  
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096;   
+            S->pTwiddle = (q15_t *)twiddleCoef_4096_q15;       
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1);               
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q15_2048))                                                                                                        
+            /*  Initializations of structure parameters for 2048 point FFT */   
+        case 2048U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048;
+            S->pTwiddle = (q15_t *)twiddleCoef_2048_q15;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2);           
+            break;     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q15_1024))                                                                                                                  
+            /*  Initializations of structure parameters for 1024 point FFT */   
+        case 1024U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; 
+            S->pTwiddle = (q15_t *)twiddleCoef_1024_q15;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q15_512))                                                           
+            /*  Initializations of structure parameters for 512 point FFT */    
+        case 512U:                                                              
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512;  
+            S->pTwiddle = (q15_t *)twiddleCoef_512_q15;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q15_256))                                                           
+        case 256U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; 
+            S->pTwiddle = (q15_t *)twiddleCoef_256_q15;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1);           
+            break;  
+#endif                                                            
+                 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q15_128))                                                                                                                          
+        case 128U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; 
+            S->pTwiddle = (q15_t *)twiddleCoef_128_q15;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q15_64))                                                                                                                      
+        case 64U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64;  
+            S->pTwiddle = (q15_t *)twiddleCoef_64_q15;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q15_32))                                                                                                                           
+        case 32U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32;  
+            S->pTwiddle = (q15_t *)twiddleCoef_32_q15;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 2);           
+            break;                                                              
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q15_16))                                                                                                                                
+        case 16U:                                                               
+            /*  Initializations of structure parameters for 16 point FFT */     
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; 
+            S->pTwiddle = (q15_t *)twiddleCoef_16_q15;           
+            status=arm_cfft_radix4by2_rearrange_twiddles_q15(S, 1);           
+            break;                                                              
+#endif                                                                             
+                                                                         
+        default:                                                                
+            /*  Reporting argument error if fftSize is not valid value */       
+            status = ARM_MATH_ARGUMENT_ERROR;                                   
+            break;                                                              
+        }                                                                       
+                                                                                
+                                                                                
+        return (status);     
+}
+#else
+arm_status arm_cfft_init_q15(
+  arm_cfft_instance_q15 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */
+        arm_status status = ARM_MATH_SUCCESS;
+
+        /*  Initialise the FFT length */
+        S->fftLen = fftLen;
+
+        /*  Initialise the Twiddle coefficient pointer */
+        S->pTwiddle = NULL;
+
+
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+            /*  Initializations of structure parameters for 4096 point FFT */
+        case 4096U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q15,4096);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+            /*  Initializations of structure parameters for 2048 point FFT */
+        case 2048U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q15,2048);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+            /*  Initializations of structure parameters for 1024 point FFT */
+        case 1024U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q15,1024);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+            /*  Initializations of structure parameters for 512 point FFT */
+        case 512U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q15,512);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+        case 256U:
+            FFTINIT(q15,256);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+        case 128U:
+            FFTINIT(q15,128);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+        case 64U:
+            FFTINIT(q15,64);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+        case 32U:
+            FFTINIT(q15,32);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+        case 16U:
+            /*  Initializations of structure parameters for 16 point FFT */
+            FFTINIT(q15,16);
+            break;
+#endif
+
+        default:
+            /*  Reporting argument error if fftSize is not valid value */
+            status = ARM_MATH_ARGUMENT_ERROR;
+            break;
+        }
+
+
+        return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c
new file mode 100755
index 00000000..3722a680
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_init_q31.c
@@ -0,0 +1,356 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_init_q31.c
+ * Description:  Initialization function for cfft q31 instance
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#define FFTINIT(EXT,SIZE)                                           \
+  S->bitRevLength = arm_cfft_sR_##EXT##_len##SIZE.bitRevLength;        \
+  S->pBitRevTable = arm_cfft_sR_##EXT##_len##SIZE.pBitRevTable;         \
+  S->pTwiddle = arm_cfft_sR_##EXT##_len##SIZE.pTwiddle;
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the cfft q31 function
+  @param[in,out] S              points to an instance of the floating-point CFFT structure
+  @param[in]     fftLen         fft length (number of complex samples)
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+
+  @par          Use of this function is mandatory only for the MVE version of the FFT.
+                Other versions can still initialize directly the data structure using 
+                variables declared in arm_const_structs.h
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+#if defined(ARM_MATH_MVEI)  && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_vec_fft.h"
+#include "arm_mve_tables.h"
+
+
+arm_status arm_cfft_radix4by2_rearrange_twiddles_q31(arm_cfft_instance_q31 *S, int twidCoefModifier)
+{
+                                                                  
+        switch (S->fftLen >> (twidCoefModifier - 1)) {  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096))
+        case 4096U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_4096_q31;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_4096_q31;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_4096_q31;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_4096_q31;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_4096_q31;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_4096_q31;                                                     
+            break; 
+#endif                                  
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048))                                                                                                   
+        case 1024U:                                                                                
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_1024_q31;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_1024_q31;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_1024_q31;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_1024_q31;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_1024_q31;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_1024_q31;                                                                          
+            break;                                                                                 
+ #endif 
+
+ #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256)) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512))                                                                                                  
+        case 256U:                                                                                 
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_256_q31;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_256_q31;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_256_q31;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_256_q31;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_256_q31;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_256_q31;    
+
+            break;                     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64)) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128))
+        case 64U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_64_q31;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_64_q31;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_64_q31;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_64_q31;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_64_q31;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_64_q31;                                                                         
+            break;  
+#endif                                                                               
+              
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16)) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32))                                                                                                                                                                                                                
+        case 16U:                                                                                  
+            S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_16_q31;
+            S->rearranged_twiddle_stride1  =  rearranged_twiddle_stride1_16_q31;     
+
+            S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_16_q31;
+            S->rearranged_twiddle_stride2  =  rearranged_twiddle_stride2_16_q31;    
+
+            S->rearranged_twiddle_tab_stride3_arr = rearranged_twiddle_tab_stride3_arr_16_q31;
+            S->rearranged_twiddle_stride3  =  rearranged_twiddle_stride3_16_q31;                                                                       
+            break;  
+#endif                                                                               
+                                                                                                   
+        default:  
+            return(ARM_MATH_ARGUMENT_ERROR);                                                                                 
+            break;                                                                                 
+            /* invalid sizes already filtered */                                                   
+        }                                                                                          
+
+        return(ARM_MATH_SUCCESS);
+
+}
+
+
+
+arm_status arm_cfft_init_q31(
+  arm_cfft_instance_q31 * S,
+  uint16_t fftLen)
+{
+
+        /*  Initialise the default arm status */                                
+        arm_status status = ARM_MATH_SUCCESS;                                   
+                                                                                
+        /*  Initialise the FFT length */                                        
+        S->fftLen = fftLen;                                                     
+                                                                                
+        /*  Initialise the Twiddle coefficient pointer */                       
+        S->pTwiddle = NULL;                         
+                                                                                
+                                                                                
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {                                                    
+            /*  Initializations of structure parameters for 4096 point FFT */   
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_4096) && defined(ARM_TABLE_TWIDDLECOEF_Q31_4096))                                                           
+        case 4096U:  
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_4096;   
+            S->pTwiddle = (q31_t *)twiddleCoef_4096_q31;       
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1);               
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_2048) && defined(ARM_TABLE_TWIDDLECOEF_Q31_2048))                                                                                                        
+            /*  Initializations of structure parameters for 2048 point FFT */   
+        case 2048U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_2048;
+            S->pTwiddle = (q31_t *)twiddleCoef_2048_q31;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2);           
+            break;     
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_1024) && defined(ARM_TABLE_TWIDDLECOEF_Q31_1024))                                                                                                                  
+            /*  Initializations of structure parameters for 1024 point FFT */   
+        case 1024U:                                                             
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH;      
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_1024; 
+            S->pTwiddle = (q31_t *)twiddleCoef_1024_q31;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_512) && defined(ARM_TABLE_TWIDDLECOEF_Q31_512))                                                           
+            /*  Initializations of structure parameters for 512 point FFT */    
+        case 512U:                                                              
+            /*  Initialise the bit reversal table modifier */                   
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_512;  
+            S->pTwiddle = (q31_t *)twiddleCoef_512_q31;         
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_256) && defined(ARM_TABLE_TWIDDLECOEF_Q31_256))                                                           
+        case 256U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_256; 
+            S->pTwiddle = (q31_t *)twiddleCoef_256_q31;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1);           
+            break;  
+#endif                                                            
+                 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_128) && defined(ARM_TABLE_TWIDDLECOEF_Q31_128))                                                                                                                          
+        case 128U:                                                              
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH;       
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_128; 
+            S->pTwiddle = (q31_t *)twiddleCoef_128_q31;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_64) && defined(ARM_TABLE_TWIDDLECOEF_Q31_64))                                                                                                                      
+        case 64U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_64;  
+            S->pTwiddle = (q31_t *)twiddleCoef_64_q31;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1);           
+            break;                                                              
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_32) && defined(ARM_TABLE_TWIDDLECOEF_Q31_32))                                                                                                                           
+        case 32U:                                                               
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_32;  
+            S->pTwiddle = (q31_t *)twiddleCoef_32_q31;          
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 2);           
+            break;                                                              
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_BITREVIDX_FXT_16) && defined(ARM_TABLE_TWIDDLECOEF_Q31_16))                                                                                                                                
+        case 16U:                                                               
+            /*  Initializations of structure parameters for 16 point FFT */     
+            S->bitRevLength = ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH;        
+            S->pBitRevTable = (uint16_t *)armBitRevIndexTable_fixed_16; 
+            S->pTwiddle = (q31_t *)twiddleCoef_16_q31;           
+            status=arm_cfft_radix4by2_rearrange_twiddles_q31(S, 1);           
+            break;                                                              
+#endif                                                                             
+                                                                         
+        default:                                                                
+            /*  Reporting argument error if fftSize is not valid value */       
+            status = ARM_MATH_ARGUMENT_ERROR;                                   
+            break;                                                              
+        }                                                                       
+                                                                                
+                                                                                
+        return (status);     
+}
+#else
+arm_status arm_cfft_init_q31(
+  arm_cfft_instance_q31 * S,
+  uint16_t fftLen)
+{
+        /*  Initialise the default arm status */
+        arm_status status = ARM_MATH_SUCCESS;
+
+        /*  Initialise the FFT length */
+        S->fftLen = fftLen;
+
+        /*  Initialise the Twiddle coefficient pointer */
+        S->pTwiddle = NULL;
+
+
+        /*  Initializations of Instance structure depending on the FFT length */
+        switch (S->fftLen) {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+            /*  Initializations of structure parameters for 4096 point FFT */
+        case 4096U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q31,4096);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+            /*  Initializations of structure parameters for 2048 point FFT */
+        case 2048U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q31,2048);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+            /*  Initializations of structure parameters for 1024 point FFT */
+        case 1024U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q31,1024);
+
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+            /*  Initializations of structure parameters for 512 point FFT */
+        case 512U:
+            /*  Initialise the bit reversal table modifier */
+            FFTINIT(q31,512);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+        case 256U:
+            FFTINIT(q31,256);
+            break;
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+        case 128U:
+            FFTINIT(q31,128);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+        case 64U:
+            FFTINIT(q31,64);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+        case 32U:
+            FFTINIT(q31,32);
+            break;
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+        case 16U:
+            /*  Initializations of structure parameters for 16 point FFT */
+            FFTINIT(q31,16);
+            break;
+#endif
+
+        default:
+            /*  Reporting argument error if fftSize is not valid value */
+            status = ARM_MATH_ARGUMENT_ERROR;
+            break;
+        }
+
+
+        return (status);
+}
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
index a47dd02f..1ee42e0a 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q15.c
@@ -1,332 +1,893 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_q15.c
- * Description:  Combined Radix Decimation in Q15 Frequency CFFT processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-extern void arm_radix4_butterfly_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef,
-        uint32_t twidCoefModifier);
-
-extern void arm_radix4_butterfly_inverse_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef,
-        uint32_t twidCoefModifier);
-
-extern void arm_bitreversal_16(
-        uint16_t * pSrc,
-  const uint16_t bitRevLen,
-  const uint16_t * pBitRevTable);
-
-void arm_cfft_radix4by2_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef);
-
-void arm_cfft_radix4by2_inverse_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Processing function for Q15 complex FFT.
-  @param[in]     S               points to an instance of Q15 CFFT structure
-  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        none
- */
-
-void arm_cfft_q15(
-  const arm_cfft_instance_q15 * S,
-        q15_t * p1,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag)
-{
-  uint32_t L = S->fftLen;
-
-  if (ifftFlag == 1U)
-  {
-     switch (L)
-     {
-     case 16:
-     case 64:
-     case 256:
-     case 1024:
-     case 4096:
-       arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
-       break;
-
-     case 32:
-     case 128:
-     case 512:
-     case 2048:
-       arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle );
-       break;
-     }
-  }
-  else
-  {
-     switch (L)
-     {
-     case 16:
-     case 64:
-     case 256:
-     case 1024:
-     case 4096:
-       arm_radix4_butterfly_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
-       break;
-
-     case 32:
-     case 128:
-     case 512:
-     case 2048:
-       arm_cfft_radix4by2_q15  ( p1, L, S->pTwiddle );
-       break;
-     }
-  }
-
-  if ( bitReverseFlag )
-    arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable);
-}
-
-/**
-  @} end of ComplexFFT group
- */
-
-void arm_cfft_radix4by2_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef)
-{
-        uint32_t i;
-        uint32_t n2;
-        q15_t p0, p1, p2, p3;
-#if defined (ARM_MATH_DSP)
-        q31_t T, S, R;
-        q31_t coeff, out1, out2;
-  const q15_t *pC = pCoef;
-        q15_t *pSi = pSrc;
-        q15_t *pSl = pSrc + fftLen;
-#else
-        uint32_t l;
-        q15_t xt, yt, cosVal, sinVal;
-#endif
-
-  n2 = fftLen >> 1U;
-
-#if defined (ARM_MATH_DSP)
-
-  for (i = n2; i > 0; i--)
-  {
-      coeff = read_q15x2_ia ((q15_t **) &pC);
-
-      T = read_q15x2 (pSi);
-      T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
-
-      S = read_q15x2 (pSl);
-      S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
-
-      R = __QSUB16(T, S);
-
-      write_q15x2_ia (&pSi, __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      out1 = __SMUAD(coeff, R) >> 16U;
-      out2 = __SMUSDX(coeff, R);
-#else
-      out1 = __SMUSDX(R, coeff) >> 16U;
-      out2 = __SMUAD(coeff, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-      write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-  }
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  for (i = 0; i < n2; i++)
-  {
-     cosVal = pCoef[2 * i];
-     sinVal = pCoef[2 * i + 1];
-
-     l = i + n2;
-
-     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
-
-     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
-
-     pSrc[2 * l]     = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) +
-                        ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
-
-     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) -
-                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))   );
-  }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* first col */
-  arm_radix4_butterfly_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
-
-  /* second col */
-  arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
-
-  n2 = fftLen >> 1U;
-  for (i = 0; i < n2; i++)
-  {
-     p0 = pSrc[4 * i + 0];
-     p1 = pSrc[4 * i + 1];
-     p2 = pSrc[4 * i + 2];
-     p3 = pSrc[4 * i + 3];
-
-     p0 <<= 1U;
-     p1 <<= 1U;
-     p2 <<= 1U;
-     p3 <<= 1U;
-
-     pSrc[4 * i + 0] = p0;
-     pSrc[4 * i + 1] = p1;
-     pSrc[4 * i + 2] = p2;
-     pSrc[4 * i + 3] = p3;
-  }
-
-}
-
-void arm_cfft_radix4by2_inverse_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef)
-{
-        uint32_t i;
-        uint32_t n2;
-        q15_t p0, p1, p2, p3;
-#if defined (ARM_MATH_DSP)
-        q31_t T, S, R;
-        q31_t coeff, out1, out2;
-  const q15_t *pC = pCoef;
-        q15_t *pSi = pSrc;
-        q15_t *pSl = pSrc + fftLen;
-#else
-        uint32_t l;
-        q15_t xt, yt, cosVal, sinVal;
-#endif
-
-  n2 = fftLen >> 1U;
-
-#if defined (ARM_MATH_DSP)
-
-  for (i = n2; i > 0; i--)
-  {
-     coeff = read_q15x2_ia ((q15_t **) &pC);
-
-     T = read_q15x2 (pSi);
-     T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
-
-     S = read_q15x2 (pSl);
-     S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
-
-     R = __QSUB16(T, S);
-
-     write_q15x2_ia (&pSi, __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-     out1 = __SMUSD(coeff, R) >> 16U;
-     out2 = __SMUADX(coeff, R);
-#else
-     out1 = __SMUADX(R, coeff) >> 16U;
-     out2 = __SMUSD(__QSUB(0, coeff), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-     write_q15x2_ia (&pSl, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-  }
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  for (i = 0; i < n2; i++)
-  {
-     cosVal = pCoef[2 * i];
-     sinVal = pCoef[2 * i + 1];
-
-     l = i + n2;
-
-     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
-
-     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
-
-     pSrc[2 * l]      = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) -
-                         ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
-
-     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) +
-                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))  );
-  }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-  /* first col */
-  arm_radix4_butterfly_inverse_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
-
-  /* second col */
-  arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
-
-  n2 = fftLen >> 1U;
-  for (i = 0; i < n2; i++)
-  {
-     p0 = pSrc[4 * i + 0];
-     p1 = pSrc[4 * i + 1];
-     p2 = pSrc[4 * i + 2];
-     p3 = pSrc[4 * i + 3];
-
-     p0 <<= 1U;
-     p1 <<= 1U;
-     p2 <<= 1U;
-     p3 <<= 1U;
-
-     pSrc[4 * i + 0] = p0;
-     pSrc[4 * i + 1] = p1;
-     pSrc[4 * i + 2] = p2;
-     pSrc[4 * i + 3] = p3;
-  }
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_q15.c
+ * Description:  Combined Radix Decimation in Q15 Frequency CFFT processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_vec_fft.h"
+
+
+static void _arm_radix4_butterfly_q15_mve(
+    const arm_cfft_instance_q15 * S,
+    q15_t   *pSrc,
+    uint32_t fftLen)
+{
+    q15x8_t vecTmp0, vecTmp1;
+    q15x8_t vecSum0, vecDiff0, vecSum1, vecDiff1;
+    q15x8_t vecA, vecB, vecC, vecD;
+    uint32_t  blkCnt;
+    uint32_t  n1, n2;
+    uint32_t  stage = 0;
+    int32_t  iter = 1;
+    static const int32_t strides[4] = {
+        (0 - 16) * (int32_t)sizeof(q15_t *), (4 - 16) * (int32_t)sizeof(q15_t *),
+        (8 - 16) * (int32_t)sizeof(q15_t *), (12 - 16) * (int32_t)sizeof(q15_t *)
+    };
+
+    /*
+     * Process first stages
+     * Each stage in middle stages provides two down scaling of the input
+     */
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+
+    for (int k = fftLen / 4u; k > 1; k >>= 2u)
+    {
+        q15_t const *p_rearranged_twiddle_tab_stride2 =
+            &S->rearranged_twiddle_stride2[
+            S->rearranged_twiddle_tab_stride2_arr[stage]];
+        q15_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[
+            S->rearranged_twiddle_tab_stride3_arr[stage]];
+        q15_t const *p_rearranged_twiddle_tab_stride1 =
+            &S->rearranged_twiddle_stride1[
+            S->rearranged_twiddle_tab_stride1_arr[stage]];
+
+        q15_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            q15_t    *inA = pBase;
+            q15_t    *inB = inA + n2 * CMPLX_DIM;
+            q15_t    *inC = inB + n2 * CMPLX_DIM;
+            q15_t    *inD = inC + n2 * CMPLX_DIM;
+            q15_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            q15_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            q15_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            q15x8_t    vecW;
+
+            blkCnt = n2 / 4;
+            /*
+             * load 4 x q15 complex pair
+             */
+            vecA = vldrhq_s16(inA);
+            vecC = vldrhq_s16(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrhq_s16(inB);
+                vecD = vldrhq_s16(inD);
+
+                vecSum0 = vhaddq(vecA, vecC);
+                vecDiff0 = vhsubq(vecA, vecC);
+
+                vecSum1 = vhaddq(vecB, vecD);
+                vecDiff1 = vhsubq(vecB, vecD);
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vhaddq(vecSum0, vecSum1);
+                vst1q(inA, vecTmp0);
+                inA += 8;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vhsubq(vecSum0, vecSum1);
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q15x8_t);
+
+                vst1q(inB, vecTmp1);
+                inB += 8;
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW1);
+                pW1 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q15x8_t);
+                vst1q(inC, vecTmp1);
+                inC += 8;
+
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q15x8_t);
+                vst1q(inD, vecTmp1);
+                inD += 8;
+
+                vecA = vldrhq_s16(inA);
+                vecC = vldrhq_s16(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32 ((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /*
+     * load scheduling
+     */
+    vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+    vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8);
+
+    blkCnt = (fftLen >> 4);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vhaddq(vecA, vecC);
+        vecDiff0 = vhsubq(vecA, vecC);
+
+        vecB = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 4);
+        vecD = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 12);
+
+        vecSum1 = vhaddq(vecB, vecD);
+        vecDiff1 = vhsubq(vecB, vecD);
+        /*
+         * pre-load for next iteration
+         */
+        vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+        vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8);
+
+        vecTmp0 = vhaddq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64, (int32x4_t) vecTmp0);
+
+        vecTmp0 = vhsubq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (int32x4_t) vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (int32x4_t) vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (int32x4_t) vecTmp0);
+
+        blkCnt--;
+    }
+
+}
+
+static void arm_cfft_radix4by2_q15_mve(const arm_cfft_instance_q15 *S, q15_t *pSrc, uint32_t fftLen)
+{
+    uint32_t n2;
+    q15_t *pIn0;
+    q15_t *pIn1;
+    const q15_t *pCoef = S->pTwiddle;
+    uint32_t     blkCnt;
+    q15x8_t    vecIn0, vecIn1, vecSum, vecDiff;
+    q15x8_t    vecCmplxTmp, vecTw;
+    q15_t  const *pCoefVec;
+
+    n2 = fftLen >> 1;
+
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+    pCoefVec = pCoef;
+
+    blkCnt = n2 / 4;
+
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(q15x8_t *) pIn0;
+        vecIn1 = *(q15x8_t *) pIn1;
+
+        vecIn0 = vecIn0 >> 1;
+        vecIn1 = vecIn1 >> 1;
+        vecSum = vhaddq(vecIn0, vecIn1);
+        vst1q(pIn0, vecSum);
+        pIn0 += 8;
+
+        vecTw = vld1q(pCoefVec);
+        pCoefVec += 8;
+
+        vecDiff = vhsubq(vecIn0, vecIn1);
+        vecCmplxTmp = MVE_CMPLX_MULT_FX_AxConjB(vecDiff, vecTw, q15x8_t);
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 8;
+
+        blkCnt--;
+    }
+
+    _arm_radix4_butterfly_q15_mve(S, pSrc, n2);
+
+    _arm_radix4_butterfly_q15_mve(S, pSrc + fftLen, n2);
+
+
+    pIn0 = pSrc;
+    blkCnt = (fftLen << 1) >> 3;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(q15x8_t *) pIn0;
+        vecIn0 = vecIn0 << 1;
+        vst1q(pIn0, vecIn0);
+        pIn0 += 8;
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = (fftLen << 1) & 7;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+
+        vecIn0 = *(q15x8_t *) pIn0;
+        vecIn0 = vecIn0 << 1;
+        vstrhq_p(pIn0, vecIn0, p0);
+    }
+}
+
+static void _arm_radix4_butterfly_inverse_q15_mve(const arm_cfft_instance_q15 *S,q15_t *pSrc, uint32_t fftLen)
+{
+    q15x8_t vecTmp0, vecTmp1;
+    q15x8_t vecSum0, vecDiff0, vecSum1, vecDiff1;
+    q15x8_t vecA, vecB, vecC, vecD;
+    uint32_t  blkCnt;
+    uint32_t  n1, n2;
+    uint32_t  stage = 0;
+    int32_t  iter = 1;
+    static const int32_t strides[4] = {
+        (0 - 16) * (int32_t)sizeof(q15_t *), (4 - 16) * (int32_t)sizeof(q15_t *),
+        (8 - 16) * (int32_t)sizeof(q15_t *), (12 - 16) * (int32_t)sizeof(q15_t *)
+    };
+
+
+    /*
+     * Process first stages
+     * Each stage in middle stages provides two down scaling of the input
+     */
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+
+    for (int k = fftLen / 4u; k > 1; k >>= 2u)
+    {
+        q15_t const *p_rearranged_twiddle_tab_stride2 =
+            &S->rearranged_twiddle_stride2[
+            S->rearranged_twiddle_tab_stride2_arr[stage]];
+        q15_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[
+            S->rearranged_twiddle_tab_stride3_arr[stage]];
+        q15_t const *p_rearranged_twiddle_tab_stride1 =
+            &S->rearranged_twiddle_stride1[
+            S->rearranged_twiddle_tab_stride1_arr[stage]];
+
+        q15_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            q15_t    *inA = pBase;
+            q15_t    *inB = inA + n2 * CMPLX_DIM;
+            q15_t    *inC = inB + n2 * CMPLX_DIM;
+            q15_t    *inD = inC + n2 * CMPLX_DIM;
+            q15_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            q15_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            q15_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            q15x8_t    vecW;
+
+
+            blkCnt = n2 / 4;
+            /*
+             * load 4 x q15 complex pair
+             */
+            vecA = vldrhq_s16(inA);
+            vecC = vldrhq_s16(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrhq_s16(inB);
+                vecD = vldrhq_s16(inD);
+
+                vecSum0 = vhaddq(vecA, vecC);
+                vecDiff0 = vhsubq(vecA, vecC);
+
+                vecSum1 = vhaddq(vecB, vecD);
+                vecDiff1 = vhsubq(vecB, vecD);
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vhaddq(vecSum0, vecSum1);
+                vst1q(inA, vecTmp0);
+                inA += 8;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vhsubq(vecSum0, vecSum1);
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q15x8_t);
+
+                vst1q(inB, vecTmp1);
+                inB += 8;
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW1);
+                pW1 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q15x8_t);
+                vst1q(inC, vecTmp1);
+                inC += 8;
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 8;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q15x8_t);
+                vst1q(inD, vecTmp1);
+                inD += 8;
+
+                vecA = vldrhq_s16(inA);
+                vecC = vldrhq_s16(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /*
+     * load scheduling
+     */
+    vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+    vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8);
+
+    blkCnt = (fftLen >> 4);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vhaddq(vecA, vecC);
+        vecDiff0 = vhsubq(vecA, vecC);
+
+        vecB = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 4);
+        vecD = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 12);
+
+        vecSum1 = vhaddq(vecB, vecD);
+        vecDiff1 = vhsubq(vecB, vecD);
+        /*
+         * pre-load for next iteration
+         */
+        vecA = (q15x8_t) vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+        vecC = (q15x8_t) vldrwq_gather_base_s32(vecScGathAddr, 8);
+
+        vecTmp0 = vhaddq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64, (int32x4_t) vecTmp0);
+
+        vecTmp0 = vhsubq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 4, (int32x4_t) vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, (int32x4_t) vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 12, (int32x4_t) vecTmp0);
+
+        blkCnt--;
+    }
+}
+
+static void arm_cfft_radix4by2_inverse_q15_mve(const arm_cfft_instance_q15 *S, q15_t *pSrc, uint32_t fftLen)
+{
+    uint32_t n2;
+    q15_t *pIn0;
+    q15_t *pIn1;
+    const q15_t *pCoef = S->pTwiddle;
+
+    uint32_t     blkCnt;
+    q15x8_t    vecIn0, vecIn1, vecSum, vecDiff;
+    q15x8_t    vecCmplxTmp, vecTw;
+    q15_t  const *pCoefVec;
+
+    n2 = fftLen >> 1;
+
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+    pCoefVec = pCoef;
+
+    blkCnt = n2 / 4;
+
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(q15x8_t *) pIn0;
+        vecIn1 = *(q15x8_t *) pIn1;
+
+        vecIn0 = vecIn0 >> 1;
+        vecIn1 = vecIn1 >> 1;
+        vecSum = vhaddq(vecIn0, vecIn1);
+        vst1q(pIn0, vecSum);
+        pIn0 += 8;
+
+        vecTw = vld1q(pCoefVec);
+        pCoefVec += 8;
+
+        vecDiff = vhsubq(vecIn0, vecIn1);
+        vecCmplxTmp = vqrdmlsdhq(vuninitializedq_s16() , vecDiff, vecTw);
+        vecCmplxTmp = vqrdmladhxq(vecCmplxTmp, vecDiff, vecTw);
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 8;
+
+        blkCnt--;
+    }
+
+
+    _arm_radix4_butterfly_inverse_q15_mve(S, pSrc, n2);
+
+    _arm_radix4_butterfly_inverse_q15_mve(S, pSrc + fftLen, n2);
+
+    pIn0 = pSrc;
+    blkCnt = (fftLen << 1) >> 3;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = *(q15x8_t *) pIn0;
+        vecIn0 = vecIn0 << 1;
+        vst1q(pIn0, vecIn0);
+        pIn0 += 8;
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = (fftLen << 1) & 7;
+    while (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp16q(blkCnt);
+
+        vecIn0 = *(q15x8_t *) pIn0;
+        vecIn0 = vecIn0 << 1;
+        vstrhq_p(pIn0, vecIn0, p0);
+    }
+}
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 complex FFT.
+  @param[in]     S               points to an instance of Q15 CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+void arm_cfft_q15(
+  const arm_cfft_instance_q15 * S,
+        q15_t * pSrc,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+        uint32_t fftLen = S->fftLen;
+
+        if (ifftFlag == 1U) {
+
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_inverse_q15_mve(S, pSrc, fftLen);
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_inverse_q15_mve(S, pSrc, fftLen);
+                break;
+            }
+        } else {
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_q15_mve(S, pSrc, fftLen);
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_q15_mve(S, pSrc, fftLen);
+                break;
+            }
+        }
+
+
+        if (bitReverseFlag)
+        {
+
+            arm_bitreversal_16_inpl_mve((uint16_t*)pSrc, S->bitRevLength, S->pBitRevTable);
+
+        }
+}
+
+#else
+
+extern void arm_radix4_butterfly_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_radix4_butterfly_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_bitreversal_16(
+        uint16_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
+
+void arm_cfft_radix4by2_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef);
+
+void arm_cfft_radix4by2_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for Q15 complex FFT.
+  @param[in]     S               points to an instance of Q15 CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+
+void arm_cfft_q15(
+  const arm_cfft_instance_q15 * S,
+        q15_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+  uint32_t L = S->fftLen;
+
+  if (ifftFlag == 1U)
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_inverse_q15 ( p1, L, (q15_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_inverse_q15 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+  else
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_q15  ( p1, L, (q15_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_q15  ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+
+  if ( bitReverseFlag )
+    arm_bitreversal_16 ((uint16_t*) p1, S->bitRevLength, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_cfft_radix4by2_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef)
+{
+        uint32_t i;
+        uint32_t n2;
+        q15_t p0, p1, p2, p3;
+#if defined (ARM_MATH_DSP)
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+  const q15_t *pC = pCoef;
+        q15_t *pSi = pSrc;
+        q15_t *pSl = pSrc + fftLen;
+#else
+        uint32_t l;
+        q15_t xt, yt, cosVal, sinVal;
+#endif
+
+  n2 = fftLen >> 1U;
+
+#if defined (ARM_MATH_DSP)
+
+  for (i = n2; i > 0; i--)
+  {
+      coeff = read_q15x2_ia ((q15_t **) &pC);
+
+      T = read_q15x2 (pSi);
+      T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+      S = read_q15x2 (pSl);
+      S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+      R = __QSUB16(T, S);
+
+      write_q15x2_ia (&pSi, __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      out1 = __SMUAD(coeff, R) >> 16U;
+      out2 = __SMUSDX(coeff, R);
+#else
+      out1 = __SMUSDX(R, coeff) >> 16U;
+      out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      write_q15x2_ia (&pSl, (q31_t)__PKHBT( out1, out2, 0 ) );
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+     pSrc[2 * l]     = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) +
+                        ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
+
+     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) -
+                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))   );
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* first col */
+  arm_radix4_butterfly_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     p2 = pSrc[4 * i + 2];
+     p3 = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     p2 <<= 1U;
+     p3 <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = p2;
+     pSrc[4 * i + 3] = p3;
+  }
+
+}
+
+void arm_cfft_radix4by2_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef)
+{
+        uint32_t i;
+        uint32_t n2;
+        q15_t p0, p1, p2, p3;
+#if defined (ARM_MATH_DSP)
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+  const q15_t *pC = pCoef;
+        q15_t *pSi = pSrc;
+        q15_t *pSl = pSrc + fftLen;
+#else
+        uint32_t l;
+        q15_t xt, yt, cosVal, sinVal;
+#endif
+
+  n2 = fftLen >> 1U;
+
+#if defined (ARM_MATH_DSP)
+
+  for (i = n2; i > 0; i--)
+  {
+     coeff = read_q15x2_ia ((q15_t **) &pC);
+
+     T = read_q15x2 (pSi);
+     T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+     S = read_q15x2 (pSl);
+     S = __SHADD16(S, 0); /* this is just a SIMD arithmetic shift right by 1 */
+
+     R = __QSUB16(T, S);
+
+     write_q15x2_ia (&pSi, __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+     out1 = __SMUSD(coeff, R) >> 16U;
+     out2 = __SMUADX(coeff, R);
+#else
+     out1 = __SMUADX(R, coeff) >> 16U;
+     out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+     write_q15x2_ia (&pSl, (q31_t)__PKHBT( out1, out2, 0 ));
+  }
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =           (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+     pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+     yt =               (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+     pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+     pSrc[2 * l]      = (((int16_t) (((q31_t) xt * cosVal) >> 16U)) -
+                         ((int16_t) (((q31_t) yt * sinVal) >> 16U))  );
+
+     pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16U)) +
+                        ((int16_t) (((q31_t) xt * sinVal) >> 16U))  );
+  }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+  /* first col */
+  arm_radix4_butterfly_inverse_q15( pSrc,          n2, (q15_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_inverse_q15( pSrc + fftLen, n2, (q15_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     p2 = pSrc[4 * i + 2];
+     p3 = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     p2 <<= 1U;
+     p3 <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = p2;
+     pSrc[4 * i + 3] = p3;
+  }
+}
+
+#endif /* defined(ARM_MATH_MVEI) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
index 785942fd..78ce5053 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_q31.c
@@ -1,254 +1,847 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_q31.c
- * Description:  Combined Radix Decimation in Frequency CFFT fixed point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-extern void arm_radix4_butterfly_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint32_t twidCoefModifier);
-
-extern void arm_radix4_butterfly_inverse_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint32_t twidCoefModifier);
-
-extern void arm_bitreversal_32(
-        uint32_t * pSrc,
-  const uint16_t bitRevLen,
-  const uint16_t * pBitRevTable);
-
-void arm_cfft_radix4by2_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef);
-
-void arm_cfft_radix4by2_inverse_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 complex FFT.
-  @param[in]     S               points to an instance of the fixed-point CFFT structure
-  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        none
- */
-
-void arm_cfft_q31(
-  const arm_cfft_instance_q31 * S,
-        q31_t * p1,
-        uint8_t ifftFlag,
-        uint8_t bitReverseFlag)
-{
-  uint32_t L = S->fftLen;
-
-  if (ifftFlag == 1U)
-  {
-     switch (L)
-     {
-     case 16:
-     case 64:
-     case 256:
-     case 1024:
-     case 4096:
-       arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
-       break;
-
-     case 32:
-     case 128:
-     case 512:
-     case 2048:
-       arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle );
-       break;
-     }
-  }
-  else
-  {
-     switch (L)
-     {
-     case 16:
-     case 64:
-     case 256:
-     case 1024:
-     case 4096:
-       arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
-       break;
-
-     case 32:
-     case 128:
-     case 512:
-     case 2048:
-       arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle );
-       break;
-     }
-  }
-
-  if ( bitReverseFlag )
-    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
-}
-
-/**
-  @} end of ComplexFFT group
- */
-
-void arm_cfft_radix4by2_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef)
-{
-        uint32_t i, l;
-        uint32_t n2;
-        q31_t xt, yt, cosVal, sinVal;
-        q31_t p0, p1;
-
-  n2 = fftLen >> 1U;
-  for (i = 0; i < n2; i++)
-  {
-     cosVal = pCoef[2 * i];
-     sinVal = pCoef[2 * i + 1];
-
-     l = i + n2;
-
-     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
-     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
-
-     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
-     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
-
-     mult_32x32_keep32_R(p0, xt, cosVal);
-     mult_32x32_keep32_R(p1, yt, cosVal);
-     multAcc_32x32_keep32_R(p0, yt, sinVal);
-     multSub_32x32_keep32_R(p1, xt, sinVal);
-
-     pSrc[2 * l]     = p0 << 1;
-     pSrc[2 * l + 1] = p1 << 1;
-  }
-
-  /* first col */
-  arm_radix4_butterfly_q31 (pSrc,          n2, (q31_t*)pCoef, 2U);
-
-  /* second col */
-  arm_radix4_butterfly_q31 (pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
-
-  n2 = fftLen >> 1U;
-  for (i = 0; i < n2; i++)
-  {
-     p0 = pSrc[4 * i + 0];
-     p1 = pSrc[4 * i + 1];
-     xt = pSrc[4 * i + 2];
-     yt = pSrc[4 * i + 3];
-
-     p0 <<= 1U;
-     p1 <<= 1U;
-     xt <<= 1U;
-     yt <<= 1U;
-
-     pSrc[4 * i + 0] = p0;
-     pSrc[4 * i + 1] = p1;
-     pSrc[4 * i + 2] = xt;
-     pSrc[4 * i + 3] = yt;
-  }
-
-}
-
-void arm_cfft_radix4by2_inverse_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef)
-{
-  uint32_t i, l;
-  uint32_t n2;
-  q31_t xt, yt, cosVal, sinVal;
-  q31_t p0, p1;
-
-  n2 = fftLen >> 1U;
-  for (i = 0; i < n2; i++)
-  {
-     cosVal = pCoef[2 * i];
-     sinVal = pCoef[2 * i + 1];
-
-     l = i + n2;
-
-     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
-     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
-
-     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
-     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
-
-     mult_32x32_keep32_R(p0, xt, cosVal);
-     mult_32x32_keep32_R(p1, yt, cosVal);
-     multSub_32x32_keep32_R(p0, yt, sinVal);
-     multAcc_32x32_keep32_R(p1, xt, sinVal);
-
-     pSrc[2 * l]     = p0 << 1U;
-     pSrc[2 * l + 1] = p1 << 1U;
-  }
-
-  /* first col */
-  arm_radix4_butterfly_inverse_q31( pSrc,          n2, (q31_t*)pCoef, 2U);
-
-  /* second col */
-  arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
-
-  n2 = fftLen >> 1U;
-  for (i = 0; i < n2; i++)
-  {
-     p0 = pSrc[4 * i + 0];
-     p1 = pSrc[4 * i + 1];
-     xt = pSrc[4 * i + 2];
-     yt = pSrc[4 * i + 3];
-
-     p0 <<= 1U;
-     p1 <<= 1U;
-     xt <<= 1U;
-     yt <<= 1U;
-
-     pSrc[4 * i + 0] = p0;
-     pSrc[4 * i + 1] = p1;
-     pSrc[4 * i + 2] = xt;
-     pSrc[4 * i + 3] = yt;
-  }
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_q31.c
+ * Description:  Combined Radix Decimation in Frequency CFFT fixed point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_vec_fft.h"
+
+
+static void _arm_radix4_butterfly_q31_mve(
+    const arm_cfft_instance_q31 * S,
+    q31_t   *pSrc,
+    uint32_t fftLen)
+{
+    q31x4_t vecTmp0, vecTmp1;
+    q31x4_t vecSum0, vecDiff0, vecSum1, vecDiff1;
+    q31x4_t vecA, vecB, vecC, vecD;
+    uint32_t  blkCnt;
+    uint32_t  n1, n2;
+    uint32_t  stage = 0;
+    int32_t  iter = 1;
+    static const int32_t strides[4] = {
+        (0 - 16) * (int32_t)sizeof(q31_t *), (1 - 16) * (int32_t)sizeof(q31_t *),
+        (8 - 16) * (int32_t)sizeof(q31_t *), (9 - 16) * (int32_t)sizeof(q31_t *)
+    };
+
+
+    /*
+     * Process first stages
+     * Each stage in middle stages provides two down scaling of the input
+     */
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+
+    for (int k = fftLen / 4u; k > 1; k >>= 2u)
+    {
+        q31_t const *p_rearranged_twiddle_tab_stride2 =
+            &S->rearranged_twiddle_stride2[
+            S->rearranged_twiddle_tab_stride2_arr[stage]];
+        q31_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[
+            S->rearranged_twiddle_tab_stride3_arr[stage]];
+        q31_t const *p_rearranged_twiddle_tab_stride1 =
+            &S->rearranged_twiddle_stride1[
+            S->rearranged_twiddle_tab_stride1_arr[stage]];
+
+        q31_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            q31_t    *inA = pBase;
+            q31_t    *inB = inA + n2 * CMPLX_DIM;
+            q31_t    *inC = inB + n2 * CMPLX_DIM;
+            q31_t    *inD = inC + n2 * CMPLX_DIM;
+            q31_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            q31_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            q31_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            q31x4_t    vecW;
+
+
+            blkCnt = n2 / 2;
+            /*
+             * load 2 x q31 complex pair
+             */
+            vecA = vldrwq_s32(inA);
+            vecC = vldrwq_s32(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrwq_s32(inB);
+                vecD = vldrwq_s32(inD);
+
+                vecSum0 = vhaddq(vecA, vecC);
+                vecDiff0 = vhsubq(vecA, vecC);
+
+                vecSum1 = vhaddq(vecB, vecD);
+                vecDiff1 = vhsubq(vecB, vecD);
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vhaddq(vecSum0, vecSum1);
+                vst1q(inA, vecTmp0);
+                inA += 4;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vhsubq(vecSum0, vecSum1);
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q31x4_t);
+
+                vst1q(inB, vecTmp1);
+                inB += 4;
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW1);
+                pW1 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q31x4_t);
+                vst1q(inC, vecTmp1);
+                inC += 4;
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxB(vecW, vecTmp0, q31x4_t);
+                vst1q(inD, vecTmp1);
+                inD += 4;
+
+                vecA = vldrwq_s32(inA);
+                vecC = vldrwq_s32(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * End of 1st stages process
+     * data is in 11.21(q21) format for the 1024 point as there are 3 middle stages
+     * data is in 9.23(q23) format for the 256 point as there are 2 middle stages
+     * data is in 7.25(q25) format for the 64 point as there are 1 middle stage
+     * data is in 5.27(q27) format for the 16 point as there are no middle stages
+     */
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /*
+     * load scheduling
+     */
+    vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+    vecC = vldrwq_gather_base_s32(vecScGathAddr, 16);
+
+    blkCnt = (fftLen >> 3);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vhaddq(vecA, vecC);
+        vecDiff0 = vhsubq(vecA, vecC);
+
+        vecB = vldrwq_gather_base_s32(vecScGathAddr, 8);
+        vecD = vldrwq_gather_base_s32(vecScGathAddr, 24);
+
+        vecSum1 = vhaddq(vecB, vecD);
+        vecDiff1 = vhsubq(vecB, vecD);
+        /*
+         * pre-load for next iteration
+         */
+        vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+        vecC = vldrwq_gather_base_s32(vecScGathAddr, 16);
+
+        vecTmp0 = vhaddq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64, vecTmp0);
+
+        vecTmp0 = vhsubq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 16, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 24, vecTmp0);
+
+        blkCnt--;
+    }
+
+    /*
+     * output is in 11.21(q21) format for the 1024 point
+     * output is in 9.23(q23) format for the 256 point
+     * output is in 7.25(q25) format for the 64 point
+     * output is in 5.27(q27) format for the 16 point
+     */
+}
+
+
+static void arm_cfft_radix4by2_q31_mve(const arm_cfft_instance_q31 *S, q31_t *pSrc, uint32_t fftLen)
+{
+    uint32_t     n2;
+    q31_t       *pIn0;
+    q31_t       *pIn1;
+    const q31_t *pCoef = S->pTwiddle;
+    uint32_t     blkCnt;
+    q31x4_t    vecIn0, vecIn1, vecSum, vecDiff;
+    q31x4_t    vecCmplxTmp, vecTw;
+
+    n2 = fftLen >> 1;
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+
+    blkCnt = n2 / 2;
+
+    while (blkCnt > 0U)
+    {
+        vecIn0 = vld1q_s32(pIn0);
+        vecIn1 = vld1q_s32(pIn1);
+
+        vecIn0 = vecIn0 >> 1;
+        vecIn1 = vecIn1 >> 1;
+        vecSum = vhaddq(vecIn0, vecIn1);
+        vst1q(pIn0, vecSum);
+        pIn0 += 4;
+
+        vecTw = vld1q_s32(pCoef);
+        pCoef += 4;
+        vecDiff = vhsubq(vecIn0, vecIn1);
+
+        vecCmplxTmp = MVE_CMPLX_MULT_FX_AxConjB(vecDiff, vecTw, q31x4_t);
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 4;
+
+        blkCnt--;
+    }
+
+   _arm_radix4_butterfly_q31_mve(S, pSrc, n2);
+
+   _arm_radix4_butterfly_q31_mve(S, pSrc + fftLen, n2);
+
+    pIn0 = pSrc;
+    blkCnt = (fftLen << 1) >> 2;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = vld1q_s32(pIn0);
+        vecIn0 = vecIn0 << 1;
+        vst1q(pIn0, vecIn0);
+        pIn0 += 4;
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = (fftLen << 1) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+
+        vecIn0 = vld1q_s32(pIn0);
+        vecIn0 = vecIn0 << 1;
+        vstrwq_p(pIn0, vecIn0, p0);
+    }
+
+}
+
+static void _arm_radix4_butterfly_inverse_q31_mve(
+    const arm_cfft_instance_q31 *S,
+    q31_t   *pSrc,
+    uint32_t fftLen)
+{
+    q31x4_t vecTmp0, vecTmp1;
+    q31x4_t vecSum0, vecDiff0, vecSum1, vecDiff1;
+    q31x4_t vecA, vecB, vecC, vecD;
+    uint32_t  blkCnt;
+    uint32_t  n1, n2;
+    uint32_t  stage = 0;
+    int32_t  iter = 1;
+    static const int32_t strides[4] = {
+        (0 - 16) * (int32_t)sizeof(q31_t *), (1 - 16) * (int32_t)sizeof(q31_t *),
+        (8 - 16) * (int32_t)sizeof(q31_t *), (9 - 16) * (int32_t)sizeof(q31_t *)
+    };
+
+    /*
+     * Process first stages
+     * Each stage in middle stages provides two down scaling of the input
+     */
+    n2 = fftLen;
+    n1 = n2;
+    n2 >>= 2u;
+
+    for (int k = fftLen / 4u; k > 1; k >>= 2u)
+    {
+        q31_t const *p_rearranged_twiddle_tab_stride2 =
+            &S->rearranged_twiddle_stride2[
+            S->rearranged_twiddle_tab_stride2_arr[stage]];
+        q31_t const *p_rearranged_twiddle_tab_stride3 = &S->rearranged_twiddle_stride3[
+            S->rearranged_twiddle_tab_stride3_arr[stage]];
+        q31_t const *p_rearranged_twiddle_tab_stride1 =
+            &S->rearranged_twiddle_stride1[
+            S->rearranged_twiddle_tab_stride1_arr[stage]];
+
+        q31_t * pBase = pSrc;
+        for (int i = 0; i < iter; i++)
+        {
+            q31_t    *inA = pBase;
+            q31_t    *inB = inA + n2 * CMPLX_DIM;
+            q31_t    *inC = inB + n2 * CMPLX_DIM;
+            q31_t    *inD = inC + n2 * CMPLX_DIM;
+            q31_t const *pW1 = p_rearranged_twiddle_tab_stride1;
+            q31_t const *pW2 = p_rearranged_twiddle_tab_stride2;
+            q31_t const *pW3 = p_rearranged_twiddle_tab_stride3;
+            q31x4_t    vecW;
+
+            blkCnt = n2 / 2;
+            /*
+             * load 2 x q31 complex pair
+             */
+            vecA = vldrwq_s32(inA);
+            vecC = vldrwq_s32(inC);
+            while (blkCnt > 0U)
+            {
+                vecB = vldrwq_s32(inB);
+                vecD = vldrwq_s32(inD);
+
+                vecSum0 = vhaddq(vecA, vecC);
+                vecDiff0 = vhsubq(vecA, vecC);
+
+                vecSum1 = vhaddq(vecB, vecD);
+                vecDiff1 = vhsubq(vecB, vecD);
+                /*
+                 * [ 1 1 1 1 ] * [ A B C D ]' .* 1
+                 */
+                vecTmp0 = vhaddq(vecSum0, vecSum1);
+                vst1q(inA, vecTmp0);
+                inA += 4;
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'
+                 */
+                vecTmp0 = vhsubq(vecSum0, vecSum1);
+                /*
+                 * [ 1 -1 1 -1 ] * [ A B C D ]'.* W2
+                 */
+                vecW = vld1q(pW2);
+                pW2 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q31x4_t);
+
+                vst1q(inB, vecTmp1);
+                inB += 4;
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 -i -1 +i ] * [ A B C D ]'.* W1
+                 */
+                vecW = vld1q(pW1);
+                pW1 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q31x4_t);
+                vst1q(inC, vecTmp1);
+                inC += 4;
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'
+                 */
+                vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+                /*
+                 * [ 1 +i -1 -i ] * [ A B C D ]'.* W3
+                 */
+                vecW = vld1q(pW3);
+                pW3 += 4;
+                vecTmp1 = MVE_CMPLX_MULT_FX_AxConjB(vecTmp0, vecW, q31x4_t);
+                vst1q(inD, vecTmp1);
+                inD += 4;
+
+                vecA = vldrwq_s32(inA);
+                vecC = vldrwq_s32(inC);
+
+                blkCnt--;
+            }
+            pBase +=  CMPLX_DIM * n1;
+        }
+        n1 = n2;
+        n2 >>= 2u;
+        iter = iter << 2;
+        stage++;
+    }
+
+    /*
+     * End of 1st stages process
+     * data is in 11.21(q21) format for the 1024 point as there are 3 middle stages
+     * data is in 9.23(q23) format for the 256 point as there are 2 middle stages
+     * data is in 7.25(q25) format for the 64 point as there are 1 middle stage
+     * data is in 5.27(q27) format for the 16 point as there are no middle stages
+     */
+
+    /*
+     * start of Last stage process
+     */
+    uint32x4_t vecScGathAddr = vld1q_u32((uint32_t*)strides);
+    vecScGathAddr = vecScGathAddr + (uint32_t) pSrc;
+
+    /*
+     * load scheduling
+     */
+    vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+    vecC = vldrwq_gather_base_s32(vecScGathAddr, 16);
+
+    blkCnt = (fftLen >> 3);
+    while (blkCnt > 0U)
+    {
+        vecSum0 = vhaddq(vecA, vecC);
+        vecDiff0 = vhsubq(vecA, vecC);
+
+        vecB = vldrwq_gather_base_s32(vecScGathAddr, 8);
+        vecD = vldrwq_gather_base_s32(vecScGathAddr, 24);
+
+        vecSum1 = vhaddq(vecB, vecD);
+        vecDiff1 = vhsubq(vecB, vecD);
+        /*
+         * pre-load for next iteration
+         */
+        vecA = vldrwq_gather_base_wb_s32(&vecScGathAddr, 64);
+        vecC = vldrwq_gather_base_s32(vecScGathAddr, 16);
+
+        vecTmp0 = vhaddq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64, vecTmp0);
+
+        vecTmp0 = vhsubq(vecSum0, vecSum1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 8, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_ADD_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 16, vecTmp0);
+
+        vecTmp0 = MVE_CMPLX_SUB_FX_A_ixB(vecDiff0, vecDiff1);
+        vstrwq_scatter_base_s32(vecScGathAddr, -64 + 24, vecTmp0);
+
+        blkCnt--;
+    }
+    /*
+     * output is in 11.21(q21) format for the 1024 point
+     * output is in 9.23(q23) format for the 256 point
+     * output is in 7.25(q25) format for the 64 point
+     * output is in 5.27(q27) format for the 16 point
+     */
+}
+
+static void arm_cfft_radix4by2_inverse_q31_mve(const arm_cfft_instance_q31 *S, q31_t *pSrc, uint32_t fftLen)
+{
+    uint32_t     n2;
+    q31_t       *pIn0;
+    q31_t       *pIn1;
+    const q31_t *pCoef = S->pTwiddle;
+
+    //uint16_t     twidCoefModifier = arm_cfft_radix2_twiddle_factor(S->fftLen);
+    //q31_t        twidIncr = (2 * twidCoefModifier * sizeof(q31_t));
+    uint32_t     blkCnt;
+    //uint64x2_t   vecOffs;
+    q31x4_t    vecIn0, vecIn1, vecSum, vecDiff;
+    q31x4_t    vecCmplxTmp, vecTw;
+
+    n2 = fftLen >> 1;
+
+    pIn0 = pSrc;
+    pIn1 = pSrc + fftLen;
+    //vecOffs[0] = 0;
+    //vecOffs[1] = (uint64_t) twidIncr;
+    blkCnt = n2 / 2;
+
+    while (blkCnt > 0U)
+    {
+        vecIn0 = vld1q_s32(pIn0);
+        vecIn1 = vld1q_s32(pIn1);
+
+        vecIn0 = vecIn0 >> 1;
+        vecIn1 = vecIn1 >> 1;
+        vecSum = vhaddq(vecIn0, vecIn1);
+        vst1q(pIn0, vecSum);
+        pIn0 += 4;
+
+        //vecTw = (q31x4_t) vldrdq_gather_offset_s64(pCoef, vecOffs);
+        vecTw = vld1q_s32(pCoef);
+        pCoef += 4;
+        vecDiff = vhsubq(vecIn0, vecIn1);
+
+        vecCmplxTmp = MVE_CMPLX_MULT_FX_AxB(vecDiff, vecTw, q31x4_t);
+        vst1q(pIn1, vecCmplxTmp);
+        pIn1 += 4;
+
+        //vecOffs = vaddq((q31x4_t) vecOffs, 2 * twidIncr);
+        blkCnt--;
+    }
+
+    _arm_radix4_butterfly_inverse_q31_mve(S, pSrc, n2);
+
+    _arm_radix4_butterfly_inverse_q31_mve(S, pSrc + fftLen, n2);
+
+    pIn0 = pSrc;
+    blkCnt = (fftLen << 1) >> 2;
+    while (blkCnt > 0U)
+    {
+        vecIn0 = vld1q_s32(pIn0);
+        vecIn0 = vecIn0 << 1;
+        vst1q(pIn0, vecIn0);
+        pIn0 += 4;
+        blkCnt--;
+    }
+    /*
+     * tail
+     * (will be merged thru tail predication)
+     */
+    blkCnt = (fftLen << 1) & 3;
+    if (blkCnt > 0U)
+    {
+        mve_pred16_t p0 = vctp32q(blkCnt);
+
+        vecIn0 = vld1q_s32(pIn0);
+        vecIn0 = vecIn0 << 1;
+        vstrwq_p(pIn0, vecIn0, p0);
+    }
+
+}
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 complex FFT.
+  @param[in]     S               points to an instance of the fixed-point CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+void arm_cfft_q31(
+  const arm_cfft_instance_q31 * S,
+        q31_t * pSrc,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+        uint32_t fftLen = S->fftLen;
+
+        if (ifftFlag == 1U) {
+
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_inverse_q31_mve(S, pSrc, fftLen);
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_inverse_q31_mve(S, pSrc, fftLen);
+                break;
+            }
+        } else {
+            switch (fftLen) {
+            case 16:
+            case 64:
+            case 256:
+            case 1024:
+            case 4096:
+                _arm_radix4_butterfly_q31_mve(S, pSrc, fftLen);
+                break;
+
+            case 32:
+            case 128:
+            case 512:
+            case 2048:
+                arm_cfft_radix4by2_q31_mve(S, pSrc, fftLen);
+                break;
+            }
+        }
+
+
+        if (bitReverseFlag)
+        {
+
+            arm_bitreversal_32_inpl_mve((uint32_t*)pSrc, S->bitRevLength, S->pBitRevTable);
+
+        }
+}
+#else
+
+extern void arm_radix4_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_radix4_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+extern void arm_bitreversal_32(
+        uint32_t * pSrc,
+  const uint16_t bitRevLen,
+  const uint16_t * pBitRevTable);
+
+void arm_cfft_radix4by2_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef);
+
+void arm_cfft_radix4by2_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef);
+
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 complex FFT.
+  @param[in]     S               points to an instance of the fixed-point CFFT structure
+  @param[in,out] p1              points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        none
+ */
+void arm_cfft_q31(
+  const arm_cfft_instance_q31 * S,
+        q31_t * p1,
+        uint8_t ifftFlag,
+        uint8_t bitReverseFlag)
+{
+  uint32_t L = S->fftLen;
+
+  if (ifftFlag == 1U)
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_inverse_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_inverse_q31 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+  else
+  {
+     switch (L)
+     {
+     case 16:
+     case 64:
+     case 256:
+     case 1024:
+     case 4096:
+       arm_radix4_butterfly_q31 ( p1, L, (q31_t*)S->pTwiddle, 1 );
+       break;
+
+     case 32:
+     case 128:
+     case 512:
+     case 2048:
+       arm_cfft_radix4by2_q31 ( p1, L, S->pTwiddle );
+       break;
+     }
+  }
+
+  if ( bitReverseFlag )
+    arm_bitreversal_32 ((uint32_t*) p1, S->bitRevLength, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_cfft_radix4by2_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef)
+{
+        uint32_t i, l;
+        uint32_t n2;
+        q31_t xt, yt, cosVal, sinVal;
+        q31_t p0, p1;
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
+
+     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
+
+     mult_32x32_keep32_R(p0, xt, cosVal);
+     mult_32x32_keep32_R(p1, yt, cosVal);
+     multAcc_32x32_keep32_R(p0, yt, sinVal);
+     multSub_32x32_keep32_R(p1, xt, sinVal);
+
+     pSrc[2 * l]     = p0 << 1;
+     pSrc[2 * l + 1] = p1 << 1;
+  }
+
+
+  /* first col */
+  arm_radix4_butterfly_q31 (pSrc,          n2, (q31_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_q31 (pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     xt = pSrc[4 * i + 2];
+     yt = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     xt <<= 1U;
+     yt <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = xt;
+     pSrc[4 * i + 3] = yt;
+  }
+
+}
+
+void arm_cfft_radix4by2_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef)
+{
+  uint32_t i, l;
+  uint32_t n2;
+  q31_t xt, yt, cosVal, sinVal;
+  q31_t p0, p1;
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     cosVal = pCoef[2 * i];
+     sinVal = pCoef[2 * i + 1];
+
+     l = i + n2;
+
+     xt =          (pSrc[2 * i] >> 2U) - (pSrc[2 * l] >> 2U);
+     pSrc[2 * i] = (pSrc[2 * i] >> 2U) + (pSrc[2 * l] >> 2U);
+
+     yt =              (pSrc[2 * i + 1] >> 2U) - (pSrc[2 * l + 1] >> 2U);
+     pSrc[2 * i + 1] = (pSrc[2 * l + 1] >> 2U) + (pSrc[2 * i + 1] >> 2U);
+
+     mult_32x32_keep32_R(p0, xt, cosVal);
+     mult_32x32_keep32_R(p1, yt, cosVal);
+     multSub_32x32_keep32_R(p0, yt, sinVal);
+     multAcc_32x32_keep32_R(p1, xt, sinVal);
+
+     pSrc[2 * l]     = p0 << 1U;
+     pSrc[2 * l + 1] = p1 << 1U;
+  }
+
+  /* first col */
+  arm_radix4_butterfly_inverse_q31( pSrc,          n2, (q31_t*)pCoef, 2U);
+
+  /* second col */
+  arm_radix4_butterfly_inverse_q31( pSrc + fftLen, n2, (q31_t*)pCoef, 2U);
+
+  n2 = fftLen >> 1U;
+  for (i = 0; i < n2; i++)
+  {
+     p0 = pSrc[4 * i + 0];
+     p1 = pSrc[4 * i + 1];
+     xt = pSrc[4 * i + 2];
+     yt = pSrc[4 * i + 3];
+
+     p0 <<= 1U;
+     p1 <<= 1U;
+     xt <<= 1U;
+     yt <<= 1U;
+
+     pSrc[4 * i + 0] = p0;
+     pSrc[4 * i + 1] = p1;
+     pSrc[4 * i + 2] = xt;
+     pSrc[4 * i + 3] = yt;
+  }
+}
+#endif /* defined(ARM_MATH_MVEI) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f16.c
new file mode 100755
index 00000000..8863fbc9
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f16.c
@@ -0,0 +1,475 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_f16.c
+ * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+void arm_radix2_butterfly_f16(
+        float16_t * pSrc,
+        uint32_t fftLen,
+  const float16_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_f16(
+        float16_t * pSrc,
+        uint32_t fftLen,
+  const float16_t * pCoef,
+        uint16_t twidCoefModifier,
+        float16_t onebyfftLen);
+
+extern void arm_bitreversal_f16(
+        float16_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Radix-2 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f16 and will be removed in the future
+  @param[in]     S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix2_f16(
+const arm_cfft_radix2_instance_f16 * S,
+      float16_t * pSrc)
+{
+
+   if (S->ifftFlag == 1U)
+   {
+      /* Complex IFFT radix-2 */
+      arm_radix2_butterfly_inverse_f16(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /* Complex FFT radix-2 */
+      arm_radix2_butterfly_f16(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier);
+   }
+
+   if (S->bitReverseFlag == 1U)
+   {
+      /* Bit Reversal */
+      arm_bitreversal_f16(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
+
+}
+
+
+/**
+  @} end of ComplexFFT group
+ */
+
+
+
+/* ----------------------------------------------------------------------
+** Internal helper function used by the FFTs
+** ------------------------------------------------------------------- */
+
+/*
+* @brief  Core function for the floating-point CFFT butterfly process.
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
+* @param[in]      fftLen           length of the FFT.
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+* @return none.
+*/
+
+void arm_radix2_butterfly_f16(
+float16_t * pSrc,
+uint32_t fftLen,
+const float16_t * pCoef,
+uint16_t twidCoefModifier)
+{
+
+   uint32_t i, j, k, l;
+   uint32_t n1, n2, ia;
+   float16_t xt, yt, cosVal, sinVal;
+   float16_t p0, p1, p2, p3;
+   float16_t a0, a1;
+
+#if defined (ARM_MATH_DSP)
+
+   /*  Initializations for the first stage */
+   n2 = fftLen >> 1;
+   ia = 0;
+   i = 0;
+
+   // loop for groups
+   for (k = n2; k > 0; k--)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+
+      /*  Twiddle coefficients index modifier */
+      ia += twidCoefModifier;
+
+      /*  index calculation for the input as, */
+      /*  pSrc[i + 0], pSrc[i + fftLen/1] */
+      l = i + n2;
+
+      /*  Butterfly implementation */
+      a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+      xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+
+      yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+      a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+
+      p0 = (_Float16)xt * (_Float16)cosVal;
+      p1 = (_Float16)yt * (_Float16)sinVal;
+      p2 = (_Float16)yt * (_Float16)cosVal;
+      p3 = (_Float16)xt * (_Float16)sinVal;
+
+      pSrc[2 * i]     = a0;
+      pSrc[2 * i + 1] = a1;
+
+      pSrc[2 * l]     = (_Float16)p0 + (_Float16)p1;
+      pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3;
+
+      i++;
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = n2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+            xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+
+            yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+            a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+
+            p0 = (_Float16)xt * (_Float16)cosVal;
+            p1 = (_Float16)yt * (_Float16)sinVal;
+            p2 = (_Float16)yt * (_Float16)cosVal;
+            p3 = (_Float16)xt * (_Float16)sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = (_Float16)p0 + (_Float16)p1;
+            pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3;
+
+            i += n1;
+         } while ( i < fftLen );                        // butterfly loop end
+         j++;
+      } while ( j < n2);                          // groups loop end
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += 2)
+   {
+      a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * i + 2];
+      xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * i + 2];
+
+      yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * i + 3];
+      a1 = (_Float16)pSrc[2 * i + 3] + (_Float16)pSrc[2 * i + 1];
+
+      pSrc[2 * i] = a0;
+      pSrc[2 * i + 1] = a1;
+      pSrc[2 * i + 2] = xt;
+      pSrc[2 * i + 3] = yt;
+   }                             // groups loop end
+
+#else
+
+   n2 = fftLen;
+
+   // loop for stage
+   for (k = fftLen; k > 1; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+            xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+
+            yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+            a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+
+            p0 = (_Float16)xt * (_Float16)cosVal;
+            p1 = (_Float16)yt * (_Float16)sinVal;
+            p2 = (_Float16)yt * (_Float16)cosVal;
+            p3 = (_Float16)xt * (_Float16)sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = (_Float16)p0 + (_Float16)p1;
+            pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3;
+
+            i += n1;
+         } while (i < fftLen);
+         j++;
+      } while (j < n2);
+      twidCoefModifier <<= 1U;
+   }
+
+#endif //    #if defined (ARM_MATH_DSP)
+
+}
+
+
+void arm_radix2_butterfly_inverse_f16(
+float16_t * pSrc,
+uint32_t fftLen,
+const float16_t * pCoef,
+uint16_t twidCoefModifier,
+float16_t onebyfftLen)
+{
+
+   uint32_t i, j, k, l;
+   uint32_t n1, n2, ia;
+   float16_t xt, yt, cosVal, sinVal;
+   float16_t p0, p1, p2, p3;
+   float16_t a0, a1;
+
+#if defined (ARM_MATH_DSP)
+
+   n2 = fftLen >> 1;
+   ia = 0;
+
+   // loop for groups
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia += twidCoefModifier;
+
+      l = i + n2;
+      a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+      xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+
+      yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+      a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+
+      p0 = (_Float16)xt * (_Float16)cosVal;
+      p1 = (_Float16)yt * (_Float16)sinVal;
+      p2 = (_Float16)yt * (_Float16)cosVal;
+      p3 = (_Float16)xt * (_Float16)sinVal;
+
+      pSrc[2 * i] = a0;
+      pSrc[2 * i + 1] = a1;
+
+      pSrc[2 * l]     = (_Float16)p0 - (_Float16)p1;
+      pSrc[2 * l + 1] = (_Float16)p2 + (_Float16)p3;
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+            xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+
+            yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+            a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+
+            p0 = (_Float16)xt * (_Float16)cosVal;
+            p1 = (_Float16)yt * (_Float16)sinVal;
+            p2 = (_Float16)yt * (_Float16)cosVal;
+            p3 = (_Float16)xt * (_Float16)sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = (_Float16)p0 - (_Float16)p1;
+            pSrc[2 * l + 1] = (_Float16)p2 + (_Float16)p3;
+
+            i += n1;
+         } while ( i < fftLen );                 // butterfly loop end
+         j++;
+      } while (j < n2);                      // groups loop end
+
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += 2)
+   {
+      a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * i + 2];
+      xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * i + 2];
+
+      a1 = (_Float16)pSrc[2 * i + 3] + (_Float16)pSrc[2 * i + 1];
+      yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * i + 3];
+
+      p0 = (_Float16)a0 * (_Float16)onebyfftLen;
+      p2 = (_Float16)xt * (_Float16)onebyfftLen;
+      p1 = (_Float16)a1 * (_Float16)onebyfftLen;
+      p3 = (_Float16)yt * (_Float16)onebyfftLen;
+
+      pSrc[2 * i] = p0;
+      pSrc[2 * i + 1] = p1;
+      pSrc[2 * i + 2] = p2;
+      pSrc[2 * i + 3] = p3;
+   }                             // butterfly loop end
+
+#else
+
+   n2 = fftLen;
+
+   // loop for stage
+   for (k = fftLen; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+            xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+
+            yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+            a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+
+            p0 = (_Float16)xt * (_Float16)cosVal;
+            p1 = (_Float16)yt * (_Float16)sinVal;
+            p2 = (_Float16)yt * (_Float16)cosVal;
+            p3 = (_Float16)xt * (_Float16)sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = (_Float16)p0 - (_Float16)p1;
+            pSrc[2 * l + 1] = (_Float16)p2 + (_Float16)p3;
+
+            i += n1;
+         } while ( i < fftLen );                    // butterfly loop end
+         j++;
+      } while ( j < n2 );                      // groups loop end
+
+      twidCoefModifier = twidCoefModifier << 1U;
+   }                             // stages loop end
+
+   n1 = n2;
+   n2 = n2 >> 1;
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+
+      a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+      xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+
+      a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+      yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+
+      p0 = (_Float16)a0 * (_Float16)onebyfftLen;
+      p2 = (_Float16)xt * (_Float16)onebyfftLen;
+      p1 = (_Float16)a1 * (_Float16)onebyfftLen;
+      p3 = (_Float16)yt * (_Float16)onebyfftLen;
+
+      pSrc[2 * i] = p0;
+      pSrc[2U * l] = p2;
+
+      pSrc[2 * i + 1] = p1;
+      pSrc[2U * l + 1U] = p3;
+   }                             // butterfly loop end
+
+#endif //      #if defined (ARM_MATH_DSP)
+
+}
+
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
index c514fda9..ab218a50 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_f32.c
@@ -1,470 +1,470 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix2_f32.c
- * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier,
-        float32_t onebyfftLen);
-
-extern void arm_bitreversal_f32(
-        float32_t * pSrc,
-        uint16_t fftSize,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Radix-2 CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future
-  @param[in]     S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure
-  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @return        none
- */
-
-void arm_cfft_radix2_f32(
-const arm_cfft_radix2_instance_f32 * S,
-      float32_t * pSrc)
-{
-
-   if (S->ifftFlag == 1U)
-   {
-      /* Complex IFFT radix-2 */
-      arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier, S->onebyfftLen);
-   }
-   else
-   {
-      /* Complex FFT radix-2 */
-      arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
-      S->twidCoefModifier);
-   }
-
-   if (S->bitReverseFlag == 1U)
-   {
-      /* Bit Reversal */
-      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-   }
-
-}
-
-
-/**
-  @} end of ComplexFFT group
- */
-
-
-
-/* ----------------------------------------------------------------------
- ** Internal helper function used by the FFTs
- ** ------------------------------------------------------------------- */
-
-/**
-  brief  Core function for the floating-point CFFT butterfly process.
-  param[in,out] pSrc             points to in-place buffer of floating-point data type
-  param[in]     fftLen           length of the FFT
-  param[in]     pCoef            points to twiddle coefficient buffer
-  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  return        none
- */
-
-void arm_radix2_butterfly_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier)
-{
-
-        uint32_t i, j, k, l;
-        uint32_t n1, n2, ia;
-        float32_t xt, yt, cosVal, sinVal;
-        float32_t p0, p1, p2, p3;
-        float32_t a0, a1;
-
-#if defined (ARM_MATH_DSP)
-
-   /*  Initializations for the first stage */
-   n2 = fftLen >> 1;
-   ia = 0;
-   i = 0;
-
-   // loop for groups
-   for (k = n2; k > 0; k--)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-
-      /*  Twiddle coefficients index modifier */
-      ia += twidCoefModifier;
-
-      /*  index calculation for the input as, */
-      /*  pSrc[i + 0], pSrc[i + fftLen/1] */
-      l = i + n2;
-
-      /*  Butterfly implementation */
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-      p0 = xt * cosVal;
-      p1 = yt * sinVal;
-      p2 = yt * cosVal;
-      p3 = xt * sinVal;
-
-      pSrc[2 * i]     = a0;
-      pSrc[2 * i + 1] = a1;
-
-      pSrc[2 * l]     = p0 + p1;
-      pSrc[2 * l + 1] = p2 - p3;
-
-      i++;
-   }                             // groups loop end
-
-   twidCoefModifier <<= 1U;
-
-   // loop for stage
-   for (k = n2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;
-
-            pSrc[2 * i] = a0;
-            pSrc[2 * i + 1] = a1;
-
-            pSrc[2 * l]     = p0 + p1;
-            pSrc[2 * l + 1] = p2 - p3;
-
-            i += n1;
-         } while ( i < fftLen );                        // butterfly loop end
-         j++;
-      } while ( j < n2);                          // groups loop end
-      twidCoefModifier <<= 1U;
-   }                             // stages loop end
-
-   // loop for butterfly
-   for (i = 0; i < fftLen; i += 2)
-   {
-      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
-      xt = pSrc[2 * i] - pSrc[2 * i + 2];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
-      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
-
-      pSrc[2 * i] = a0;
-      pSrc[2 * i + 1] = a1;
-      pSrc[2 * i + 2] = xt;
-      pSrc[2 * i + 3] = yt;
-   }                             // groups loop end
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-   n2 = fftLen;
-
-   // loop for stage
-   for (k = fftLen; k > 1; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;
-
-            pSrc[2 * i] = a0;
-            pSrc[2 * i + 1] = a1;
-
-            pSrc[2 * l]     = p0 + p1;
-            pSrc[2 * l + 1] = p2 - p3;
-
-            i += n1;
-         } while (i < fftLen);
-         j++;
-      } while (j < n2);
-      twidCoefModifier <<= 1U;
-   }
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-
-void arm_radix2_butterfly_inverse_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier,
-        float32_t onebyfftLen)
-{
-
-        uint32_t i, j, k, l;
-        uint32_t n1, n2, ia;
-        float32_t xt, yt, cosVal, sinVal;
-        float32_t p0, p1, p2, p3;
-        float32_t a0, a1;
-
-#if defined (ARM_MATH_DSP)
-
-   n2 = fftLen >> 1;
-   ia = 0;
-
-   // loop for groups
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia += twidCoefModifier;
-
-      l = i + n2;
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-      p0 = xt * cosVal;
-      p1 = yt * sinVal;
-      p2 = yt * cosVal;
-      p3 = xt * sinVal;
-
-      pSrc[2 * i] = a0;
-      pSrc[2 * i + 1] = a1;
-
-      pSrc[2 * l]     = p0 - p1;
-      pSrc[2 * l + 1] = p2 + p3;
-   }                             // groups loop end
-
-   twidCoefModifier <<= 1U;
-
-   // loop for stage
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia += twidCoefModifier;
-
-         // loop for butterfly
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;
-
-            pSrc[2 * i] = a0;
-            pSrc[2 * i + 1] = a1;
-
-            pSrc[2 * l]     = p0 - p1;
-            pSrc[2 * l + 1] = p2 + p3;
-
-            i += n1;
-         } while ( i < fftLen );                 // butterfly loop end
-         j++;
-      } while (j < n2);                      // groups loop end
-
-      twidCoefModifier <<= 1U;
-   }                             // stages loop end
-
-   // loop for butterfly
-   for (i = 0; i < fftLen; i += 2)
-   {
-      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
-      xt = pSrc[2 * i] - pSrc[2 * i + 2];
-
-      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
-      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
-
-      p0 = a0 * onebyfftLen;
-      p2 = xt * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p3 = yt * onebyfftLen;
-
-      pSrc[2 * i] = p0;
-      pSrc[2 * i + 1] = p1;
-      pSrc[2 * i + 2] = p2;
-      pSrc[2 * i + 3] = p3;
-   }                             // butterfly loop end
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-   n2 = fftLen;
-
-   // loop for stage
-   for (k = fftLen; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups
-      j = 0;
-      do
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly
-         i = j;
-         do
-         {
-            l = i + n2;
-            a0 = pSrc[2 * i] + pSrc[2 * l];
-            xt = pSrc[2 * i] - pSrc[2 * l];
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-
-            p0 = xt * cosVal;
-            p1 = yt * sinVal;
-            p2 = yt * cosVal;
-            p3 = xt * sinVal;
-
-            pSrc[2 * i] = a0;
-            pSrc[2 * i + 1] = a1;
-
-            pSrc[2 * l]     = p0 - p1;
-            pSrc[2 * l + 1] = p2 + p3;
-
-            i += n1;
-         } while ( i < fftLen );                    // butterfly loop end
-         j++;
-      } while ( j < n2 );                      // groups loop end
-
-      twidCoefModifier = twidCoefModifier << 1U;
-   }                             // stages loop end
-
-   n1 = n2;
-   n2 = n2 >> 1;
-
-   // loop for butterfly
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-
-      a0 = pSrc[2 * i] + pSrc[2 * l];
-      xt = pSrc[2 * i] - pSrc[2 * l];
-
-      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-
-      p0 = a0 * onebyfftLen;
-      p2 = xt * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p3 = yt * onebyfftLen;
-
-      pSrc[2 * i] = p0;
-      pSrc[2 * l] = p2;
-
-      pSrc[2 * i + 1] = p1;
-      pSrc[2 * l + 1] = p3;
-   }                             // butterfly loop end
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_f32.c
+ * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+void arm_radix2_butterfly_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
+
+extern void arm_bitreversal_f32(
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Radix-2 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future
+  @param[in]     S    points to an instance of the floating-point Radix-2 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix2_f32(
+const arm_cfft_radix2_instance_f32 * S,
+      float32_t * pSrc)
+{
+
+   if (S->ifftFlag == 1U)
+   {
+      /* Complex IFFT radix-2 */
+      arm_radix2_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /* Complex FFT radix-2 */
+      arm_radix2_butterfly_f32(pSrc, S->fftLen, S->pTwiddle,
+      S->twidCoefModifier);
+   }
+
+   if (S->bitReverseFlag == 1U)
+   {
+      /* Bit Reversal */
+      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
+
+}
+
+
+/**
+  @} end of ComplexFFT group
+ */
+
+
+
+/* ----------------------------------------------------------------------
+ ** Internal helper function used by the FFTs
+ ** ------------------------------------------------------------------- */
+
+/**
+  brief  Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  return        none
+ */
+
+void arm_radix2_butterfly_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        float32_t xt, yt, cosVal, sinVal;
+        float32_t p0, p1, p2, p3;
+        float32_t a0, a1;
+
+#if defined (ARM_MATH_DSP)
+
+   /*  Initializations for the first stage */
+   n2 = fftLen >> 1;
+   ia = 0;
+   i = 0;
+
+   // loop for groups
+   for (k = n2; k > 0; k--)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+
+      /*  Twiddle coefficients index modifier */
+      ia += twidCoefModifier;
+
+      /*  index calculation for the input as, */
+      /*  pSrc[i + 0], pSrc[i + fftLen/1] */
+      l = i + n2;
+
+      /*  Butterfly implementation */
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+      p0 = xt * cosVal;
+      p1 = yt * sinVal;
+      p2 = yt * cosVal;
+      p3 = xt * sinVal;
+
+      pSrc[2 * i]     = a0;
+      pSrc[2 * i + 1] = a1;
+
+      pSrc[2 * l]     = p0 + p1;
+      pSrc[2 * l + 1] = p2 - p3;
+
+      i++;
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = n2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 + p1;
+            pSrc[2 * l + 1] = p2 - p3;
+
+            i += n1;
+         } while ( i < fftLen );                        // butterfly loop end
+         j++;
+      } while ( j < n2);                          // groups loop end
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += 2)
+   {
+      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
+      xt = pSrc[2 * i] - pSrc[2 * i + 2];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
+      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
+
+      pSrc[2 * i] = a0;
+      pSrc[2 * i + 1] = a1;
+      pSrc[2 * i + 2] = xt;
+      pSrc[2 * i + 3] = yt;
+   }                             // groups loop end
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+   n2 = fftLen;
+
+   // loop for stage
+   for (k = fftLen; k > 1; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 + p1;
+            pSrc[2 * l + 1] = p2 - p3;
+
+            i += n1;
+         } while (i < fftLen);
+         j++;
+      } while (j < n2);
+      twidCoefModifier <<= 1U;
+   }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+
+void arm_radix2_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen)
+{
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        float32_t xt, yt, cosVal, sinVal;
+        float32_t p0, p1, p2, p3;
+        float32_t a0, a1;
+
+#if defined (ARM_MATH_DSP)
+
+   n2 = fftLen >> 1;
+   ia = 0;
+
+   // loop for groups
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia += twidCoefModifier;
+
+      l = i + n2;
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+      p0 = xt * cosVal;
+      p1 = yt * sinVal;
+      p2 = yt * cosVal;
+      p3 = xt * sinVal;
+
+      pSrc[2 * i] = a0;
+      pSrc[2 * i + 1] = a1;
+
+      pSrc[2 * l]     = p0 - p1;
+      pSrc[2 * l + 1] = p2 + p3;
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia += twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 - p1;
+            pSrc[2 * l + 1] = p2 + p3;
+
+            i += n1;
+         } while ( i < fftLen );                 // butterfly loop end
+         j++;
+      } while (j < n2);                      // groups loop end
+
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += 2)
+   {
+      a0 = pSrc[2 * i] + pSrc[2 * i + 2];
+      xt = pSrc[2 * i] - pSrc[2 * i + 2];
+
+      a1 = pSrc[2 * i + 3] + pSrc[2 * i + 1];
+      yt = pSrc[2 * i + 1] - pSrc[2 * i + 3];
+
+      p0 = a0 * onebyfftLen;
+      p2 = xt * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p3 = yt * onebyfftLen;
+
+      pSrc[2 * i] = p0;
+      pSrc[2 * i + 1] = p1;
+      pSrc[2 * i + 2] = p2;
+      pSrc[2 * i + 3] = p3;
+   }                             // butterfly loop end
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+   n2 = fftLen;
+
+   // loop for stage
+   for (k = fftLen; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      j = 0;
+      do
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         do
+         {
+            l = i + n2;
+            a0 = pSrc[2 * i] + pSrc[2 * l];
+            xt = pSrc[2 * i] - pSrc[2 * l];
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+
+            p0 = xt * cosVal;
+            p1 = yt * sinVal;
+            p2 = yt * cosVal;
+            p3 = xt * sinVal;
+
+            pSrc[2 * i] = a0;
+            pSrc[2 * i + 1] = a1;
+
+            pSrc[2 * l]     = p0 - p1;
+            pSrc[2 * l + 1] = p2 + p3;
+
+            i += n1;
+         } while ( i < fftLen );                    // butterfly loop end
+         j++;
+      } while ( j < n2 );                      // groups loop end
+
+      twidCoefModifier = twidCoefModifier << 1U;
+   }                             // stages loop end
+
+   n1 = n2;
+   n2 = n2 >> 1;
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+
+      a0 = pSrc[2 * i] + pSrc[2 * l];
+      xt = pSrc[2 * i] - pSrc[2 * l];
+
+      a1 = pSrc[2 * l + 1] + pSrc[2 * i + 1];
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+
+      p0 = a0 * onebyfftLen;
+      p2 = xt * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p3 = yt * onebyfftLen;
+
+      pSrc[2 * i] = p0;
+      pSrc[2 * l] = p2;
+
+      pSrc[2 * i + 1] = p1;
+      pSrc[2 * l + 1] = p3;
+   }                             // butterfly loop end
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f16.c
new file mode 100755
index 00000000..e021a0ea
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f16.c
@@ -0,0 +1,214 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_init_f16.c
+ * Description:  Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+#include "arm_common_tables.h"
+#include "arm_common_tables_f16.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f16 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+arm_status arm_cfft_radix2_init_f16(
+  arm_cfft_radix2_instance_f16 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+   /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+  
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096)
+
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (float16_t *) twiddleCoefF16_4096;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.000244140625;
+    break;
+
+  case 2048U:
+    /*  Initializations of structure parameters for 2048 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 2U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 2U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.00048828125;
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.0009765625f;
+    break;
+
+  case 512U:
+    /*  Initializations of structure parameters for 512 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 8U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 8U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.001953125;
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    S->onebyfftLen = 0.00390625f;
+    break;
+
+  case 128U:
+    /*  Initializations of structure parameters for 128 point FFT */
+    S->twidCoefModifier = 32U;
+    S->bitRevFactor = 32U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
+    S->onebyfftLen = 0.0078125;
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    S->onebyfftLen = 0.015625f;
+    break;
+
+  case 32U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 128U;
+    S->bitRevFactor = 128U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
+    S->onebyfftLen = 0.03125;
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    S->onebyfftLen = 0.0625f;
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+#endif
+#endif
+#endif
+  return (status);
+}
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
index 4a118401..ae9f29a8 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_f32.c
@@ -1,197 +1,209 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix2_init_f32.c
- * Description:  Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
-  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
-  @param[in]     fftLen         length of the FFT
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-  @par
-                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
-
-arm_status arm_cfft_radix2_init_f32(
-  arm_cfft_radix2_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096U:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 2048U:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.00048828125;
-    break;
-
-  case 1024U:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-  case 512U:
-    /*  Initializations of structure parameters for 512 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.001953125;
-    break;
-
-  case 256U:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16U;
-    S->bitRevFactor = 16U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 128U:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32U;
-    S->bitRevFactor = 32U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    S->onebyfftLen = 0.0078125;
-    break;
-
-  case 64U:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64U;
-    S->bitRevFactor = 64U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 32U:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 128U;
-    S->bitRevFactor = 128U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    S->onebyfftLen = 0.03125;
-    break;
-
-  case 16U:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256U;
-    S->bitRevFactor = 256U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of ComplexFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_init_f32.c
+ * Description:  Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix2_init_f32(
+  arm_cfft_radix2_instance_f32 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+   /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (float32_t *) twiddleCoef;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.000244140625;
+    break;
+
+  case 2048U:
+    /*  Initializations of structure parameters for 2048 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 2U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 2U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.00048828125;
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.0009765625f;
+    break;
+
+  case 512U:
+    /*  Initializations of structure parameters for 512 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 8U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 8U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.001953125;
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    S->onebyfftLen = 0.00390625f;
+    break;
+
+  case 128U:
+    /*  Initializations of structure parameters for 128 point FFT */
+    S->twidCoefModifier = 32U;
+    S->bitRevFactor = 32U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
+    S->onebyfftLen = 0.0078125;
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    S->onebyfftLen = 0.015625f;
+    break;
+
+  case 32U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 128U;
+    S->bitRevFactor = 128U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
+    S->onebyfftLen = 0.03125;
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    S->onebyfftLen = 0.0625f;
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+#endif
+#endif
+#endif
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
index a31b5694..68c99308 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q15.c
@@ -1,182 +1,194 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix2_init_q15.c
- * Description:  Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief                        Initialization function for the Q15 CFFT/CIFFT.
-  @deprecated                   Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
-  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure.
-  @param[in]     fftLen         length of the FFT.
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-  @par
-                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
-
-arm_status arm_cfft_radix2_init_q15(
-  arm_cfft_radix2_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096U:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 2048U:
-    /*  Initializations of structure parameters for 2048 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-
-    break;
-
-  case 1024U:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4U;
-    S->bitRevFactor = 4U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 512U:
-    /*  Initializations of structure parameters for 512 point FFT */
-    S->twidCoefModifier = 8U;
-    S->bitRevFactor = 8U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-
-    break;
-
-  case 256U:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16U;
-    S->bitRevFactor = 16U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 128U:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32U;
-    S->bitRevFactor = 32U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-
-    break;
-
-  case 64U:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64U;
-    S->bitRevFactor = 64U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 32U:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128U;
-    S->bitRevFactor = 128U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-
-    break;
-
-  case 16U:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256U;
-    S->bitRevFactor = 256U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of ComplexFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_init_q15.c
+ * Description:  Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief                        Initialization function for the Q15 CFFT/CIFFT.
+  @deprecated                   Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed
+  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure.
+  @param[in]     fftLen         length of the FFT.
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix2_init_q15(
+  arm_cfft_radix2_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+   /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+
+    break;
+
+  case 2048U:
+    /*  Initializations of structure parameters for 2048 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 2U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 2U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
+
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+    S->twidCoefModifier = 4U;
+    S->bitRevFactor = 4U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+
+    break;
+
+  case 512U:
+    /*  Initializations of structure parameters for 512 point FFT */
+    S->twidCoefModifier = 8U;
+    S->bitRevFactor = 8U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
+
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+
+    break;
+
+  case 128U:
+    /*  Initializations of structure parameters for 128 point FFT */
+    S->twidCoefModifier = 32U;
+    S->bitRevFactor = 32U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
+
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+
+    break;
+
+  case 32U:
+    /*  Initializations of structure parameters for 32 point FFT */
+    S->twidCoefModifier = 128U;
+    S->bitRevFactor = 128U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
+
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+
+    break;
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+#endif
+#endif
+#endif
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
index 2cf4fd55..73b8a39f 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_init_q31.c
@@ -1,179 +1,191 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix2_init_q31.c
- * Description:  Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
-  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure
-  @param[in]     fftLen         length of the FFT
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-  @par
-                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
-
-arm_status arm_cfft_radix2_init_q31(
-  arm_cfft_radix2_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096U:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 2048 point FFT */
-  case 2048U:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 2U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 2U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024U:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-    /*  Initializations of structure parameters for 512 point FFT */
-  case 512U:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 8U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 8U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
-    break;
-
-  case 256U:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16U;
-    S->bitRevFactor = 16U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 128U:
-    /*  Initializations of structure parameters for 128 point FFT */
-    S->twidCoefModifier = 32U;
-    S->bitRevFactor = 32U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
-    break;
-
-  case 64U:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64U;
-    S->bitRevFactor = 64U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 32U:
-    /*  Initializations of structure parameters for 32 point FFT */
-    S->twidCoefModifier = 128U;
-    S->bitRevFactor = 128U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
-    break;
-
-  case 16U:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256U;
-    S->bitRevFactor = 256U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of ComplexFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_init_q31.c
+ * Description:  Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix2_init_q31(
+  arm_cfft_radix2_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+
+  /*  Initializations of Instance structure depending on the FFT length */
+  switch (S->fftLen)
+  {
+    /*  Initializations of structure parameters for 4096 point FFT */
+  case 4096U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    break;
+
+    /*  Initializations of structure parameters for 2048 point FFT */
+  case 2048U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 2U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 2U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[1];
+    break;
+
+    /*  Initializations of structure parameters for 1024 point FFT */
+  case 1024U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    break;
+
+    /*  Initializations of structure parameters for 512 point FFT */
+  case 512U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 8U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 8U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[7];
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    break;
+
+  case 128U:
+    /*  Initializations of structure parameters for 128 point FFT */
+    S->twidCoefModifier = 32U;
+    S->bitRevFactor = 32U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[31];
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    break;
+
+  case 32U:
+    /*  Initializations of structure parameters for 32 point FFT */
+    S->twidCoefModifier = 128U;
+    S->bitRevFactor = 128U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[127];
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+#endif
+#endif 
+#endif
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
index fbb809e4..ca15ea18 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q15.c
@@ -1,689 +1,689 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix2_q15.c
- * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef,
-        uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef,
-        uint16_t twidCoefModifier);
-
-void arm_bitreversal_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the fixed-point CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
-  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
-  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @return        none
- */
-
-void arm_cfft_radix2_q15(
-  const arm_cfft_radix2_instance_q15 * S,
-        q15_t * pSrc)
-{
-
-  if (S->ifftFlag == 1U)
-  {
-    arm_radix2_butterfly_inverse_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    arm_radix2_butterfly_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
-  }
-
-  arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**
-  @} end of ComplexFFT group
- */
-
-void arm_radix2_butterfly_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef,
-        uint16_t twidCoefModifier)
-{
-#if defined (ARM_MATH_DSP)
-
-  uint32_t i, j, k, l;
-  uint32_t n1, n2, ia;
-  q15_t in;
-  q31_t T, S, R;
-  q31_t coeff, out1, out2;
-
-  //N = fftLen;
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  // loop for groups
-  for (i = 0; i < n2; i++)
-  {
-    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = read_q15x2 (pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = read_q15x2 (pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-#else
-    out1 = __SMUSDX(R, coeff) >> 16U;
-    out2 = __SMUAD(coeff, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-    ia = ia + twidCoefModifier;
-
-    /* loop for butterfly */
-    i++;
-    l++;
-
-    T = read_q15x2 (pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = read_q15x2 (pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    out1 = __SMUAD(coeff, R) >> 16;
-    out2 = __SMUSDX(coeff, R);
-#else
-
-    out1 = __SMUSDX(R, coeff) >> 16U;
-    out2 = __SMUAD(coeff, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-  } /* groups loop end */
-
-  twidCoefModifier = twidCoefModifier << 1U;
-
-  /* loop for stage */
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    /* loop for groups */
-    for (j = 0; j < n2; j++)
-    {
-      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-      ia = ia + twidCoefModifier;
-
-      /* loop for butterfly */
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = read_q15x2 (pSrc + (2 * i));
-
-        S = read_q15x2 (pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-#else
-        out1 = __SMUSDX(R, coeff) >> 16U;
-        out2 = __SMUAD(coeff, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-        i += n1;
-
-        l = i + n2;
-
-        T = read_q15x2 (pSrc + (2 * i));
-
-        S = read_q15x2 (pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        out1 = __SMUAD(coeff, R) >> 16;
-        out2 = __SMUSDX(coeff, R);
-#else
-        out1 = __SMUSDX(R, coeff) >> 16U;
-        out2 = __SMUAD(coeff, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-      } /* butterfly loop end */
-
-    } /* groups loop end */
-
-    twidCoefModifier = twidCoefModifier << 1U;
-  } /* stages loop end */
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-  ia = ia + twidCoefModifier;
-
-  /* loop for butterfly */
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-
-    T = read_q15x2 (pSrc + (2 * i));
-
-    S = read_q15x2 (pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
-
-    write_q15x2 (pSrc + (2 * l), R);
-
-    i += n1;
-    l = i + n2;
-
-    T = read_q15x2 (pSrc + (2 * i));
-
-    S = read_q15x2 (pSrc + (2 * l));
-
-    R = __QSUB16(T, S);
-
-    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
-
-    write_q15x2 (pSrc + (2 * l), R);
-
-  } /* groups loop end */
-
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-  uint32_t i, j, k, l;
-  uint32_t n1, n2, ia;
-  q15_t xt, yt, cosVal, sinVal;
-
-
-  // N = fftLen;
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  /* loop for groups */
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[(ia * 2)];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    /* loop for butterfly */
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
-
-      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
-                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
-
-      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                          ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    } /* butterfly loop end */
-
-  } /* groups loop end */
-
-  twidCoefModifier = twidCoefModifier << 1U;
-
-  /* loop for stage */
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    /* loop for groups */
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      /* loop for butterfly */
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
-
-        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
-                       ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-        pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
-                            ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-      } /* butterfly loop end */
-
-    } /* groups loop end */
-
-    twidCoefModifier = twidCoefModifier << 1U;
-  } /* stages loop end */
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  /* loop for groups */
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[ia * 2];
-    sinVal = pCoef[(ia * 2) + 1];
-
-    ia = ia + twidCoefModifier;
-
-    /* loop for butterfly */
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2 * l] = xt;
-
-      pSrc[2 * l + 1] = yt;
-
-    } /* butterfly loop end */
-
-  } /* groups loop end */
-
-  twidCoefModifier = twidCoefModifier << 1U;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-
-void arm_radix2_butterfly_inverse_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pCoef,
-        uint16_t twidCoefModifier)
-{
-#if defined (ARM_MATH_DSP)
-
-        uint32_t i, j, k, l;
-        uint32_t n1, n2, ia;
-        q15_t in;
-        q31_t T, S, R;
-        q31_t coeff, out1, out2;
-
-  // N = fftLen;
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  /* loop for groups */
-  for (i = 0; i < n2; i++)
-  {
-    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-    ia = ia + twidCoefModifier;
-
-    l = i + n2;
-
-    T = read_q15x2 (pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = read_q15x2 (pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-    out1 = __SMUADX(R, coeff) >> 16U;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-    ia = ia + twidCoefModifier;
-
-    /* loop for butterfly */
-    i++;
-    l++;
-
-    T = read_q15x2 (pSrc + (2 * i));
-    in = ((int16_t) (T & 0xFFFF)) >> 1;
-    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    S = read_q15x2 (pSrc + (2 * l));
-    in = ((int16_t) (S & 0xFFFF)) >> 1;
-    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
-
-    R = __QSUB16(T, S);
-
-    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    out1 = __SMUSD(coeff, R) >> 16;
-    out2 = __SMUADX(coeff, R);
-#else
-    out1 = __SMUADX(R, coeff) >> 16U;
-    out2 = __SMUSD(__QSUB(0, coeff), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-  } /* groups loop end */
-
-  twidCoefModifier = twidCoefModifier << 1U;
-
-  /* loop for stage */
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    /* loop for groups */
-    for (j = 0; j < n2; j++)
-    {
-      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-      ia = ia + twidCoefModifier;
-
-      /* loop for butterfly */
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-
-        T = read_q15x2 (pSrc + (2 * i));
-
-        S = read_q15x2 (pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-#else
-        out1 = __SMUADX(R, coeff) >> 16U;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-        i += n1;
-
-        l = i + n2;
-
-        T = read_q15x2 (pSrc + (2 * i));
-
-        S = read_q15x2 (pSrc + (2 * l));
-
-        R = __QSUB16(T, S);
-
-        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        out1 = __SMUSD(coeff, R) >> 16;
-        out2 = __SMUADX(coeff, R);
-#else
-        out1 = __SMUADX(R, coeff) >> 16U;
-        out2 = __SMUSD(__QSUB(0, coeff), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-      } /* butterfly loop end */
-
-    } /* groups loop end */
-
-    twidCoefModifier = twidCoefModifier << 1U;
-  } /* stages loop end */
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  /* loop for groups */
-  for (j = 0; j < n2; j++)
-  {
-    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
-
-    ia = ia + twidCoefModifier;
-
-    /* loop for butterfly */
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-
-      T = read_q15x2 (pSrc + (2 * i));
-
-      S = read_q15x2 (pSrc + (2 * l));
-
-      R = __QSUB16(T, S);
-
-      write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
-
-      write_q15x2 (pSrc + (2 * l), R);
-
-    } /* butterfly loop end */
-
-  } /* groups loop end */
-
-  twidCoefModifier = twidCoefModifier << 1U;
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-        uint32_t i, j, k, l;
-        uint32_t n1, n2, ia;
-        q15_t xt, yt, cosVal, sinVal;
-
-  // N = fftLen;
-  n2 = fftLen;
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  /* loop for groups */
-  for (j = 0; j < n2; j++)
-  {
-    cosVal = pCoef[(ia * 2)];
-    sinVal = pCoef[(ia * 2) + 1];
-    ia = ia + twidCoefModifier;
-
-    /* loop for butterfly */
-    for (i = j; i < fftLen; i += n1)
-    {
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
-
-      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
-                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
-
-      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
-
-      pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                         ((int16_t) (((q31_t) xt * sinVal) >> 16)));
-
-    } /* butterfly loop end */
-
-  } /* groups loop end */
-
-  twidCoefModifier = twidCoefModifier << 1U;
-
-  /* loop for stage */
-  for (k = fftLen / 2; k > 2; k = k >> 1)
-  {
-    n1 = n2;
-    n2 = n2 >> 1;
-    ia = 0;
-
-    /* loop for groups */
-    for (j = 0; j < n2; j++)
-    {
-      cosVal = pCoef[(ia * 2)];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      /* loop for butterfly */
-      for (i = j; i < fftLen; i += n1)
-      {
-        l = i + n2;
-        xt = pSrc[2 * i] - pSrc[2 * l];
-        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
-
-        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
-
-        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
-                       ((int16_t) (((q31_t) yt * sinVal) >> 16))  );
-
-        pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
-                           ((int16_t) (((q31_t) xt * sinVal) >> 16))  );
-
-      } /* butterfly loop end */
-
-    } /* groups loop end */
-
-    twidCoefModifier = twidCoefModifier << 1U;
-  } /* stages loop end */
-
-  n1 = n2;
-  n2 = n2 >> 1;
-  ia = 0;
-
-  cosVal = pCoef[(ia * 2)];
-  sinVal = pCoef[(ia * 2) + 1];
-
-  ia = ia + twidCoefModifier;
-
-  /* loop for butterfly */
-  for (i = 0; i < fftLen; i += n1)
-  {
-    l = i + n2;
-    xt = pSrc[2 * i] - pSrc[2 * l];
-    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-    pSrc[2 * l] = xt;
-
-    pSrc[2 * l + 1] = yt;
-
-  } /* groups loop end */
-
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_q15.c
+ * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+void arm_radix2_butterfly_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_bitreversal_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the fixed-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix2_q15(
+  const arm_cfft_radix2_instance_q15 * S,
+        q15_t * pSrc)
+{
+
+  if (S->ifftFlag == 1U)
+  {
+    arm_radix2_butterfly_inverse_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+  else
+  {
+    arm_radix2_butterfly_q15 (pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+
+  arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_radix2_butterfly_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+#if defined (ARM_MATH_DSP)
+
+  uint32_t i, j, k, l;
+  uint32_t n1, n2, ia;
+  q15_t in;
+  q31_t T, S, R;
+  q31_t coeff, out1, out2;
+
+  //N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  // loop for groups
+  for (i = 0; i < n2; i++)
+  {
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUAD(coeff, R) >> 16;
+    out2 = __SMUSDX(coeff, R);
+#else
+    out1 = __SMUSDX(R, coeff) >> 16U;
+    out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    i++;
+    l++;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUAD(coeff, R) >> 16;
+    out2 = __SMUSDX(coeff, R);
+#else
+
+    out1 = __SMUSDX(R, coeff) >> 16U;
+    out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUAD(coeff, R) >> 16;
+        out2 = __SMUSDX(coeff, R);
+#else
+        out1 = __SMUSDX(R, coeff) >> 16U;
+        out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+        i += n1;
+
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUAD(coeff, R) >> 16;
+        out2 = __SMUSDX(coeff, R);
+#else
+        out1 = __SMUSDX(R, coeff) >> 16U;
+        out2 = __SMUAD(coeff, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2U * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+  ia = ia + twidCoefModifier;
+
+  /* loop for butterfly */
+  for (i = 0; i < fftLen; i += n1)
+  {
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+
+    S = read_q15x2 (pSrc + (2 * l));
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
+
+    write_q15x2 (pSrc + (2 * l), R);
+
+    i += n1;
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+
+    S = read_q15x2 (pSrc + (2 * l));
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
+
+    write_q15x2 (pSrc + (2 * l), R);
+
+  } /* groups loop end */
+
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+  uint32_t i, j, k, l;
+  uint32_t n1, n2, ia;
+  q15_t xt, yt, cosVal, sinVal;
+
+
+  // N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    cosVal = pCoef[(ia * 2)];
+    sinVal = pCoef[(ia * 2) + 1];
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
+
+      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+
+      pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+                          ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+        xt = pSrc[2 * i] - pSrc[2 * l];
+        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) +
+                       ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+
+        pSrc[2U * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) -
+                            ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    cosVal = pCoef[ia * 2];
+    sinVal = pCoef[(ia * 2) + 1];
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2 * l] = xt;
+
+      pSrc[2 * l + 1] = yt;
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+
+void arm_radix2_butterfly_inverse_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+#if defined (ARM_MATH_DSP)
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        q15_t in;
+        q31_t T, S, R;
+        q31_t coeff, out1, out2;
+
+  // N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (i = 0; i < n2; i++)
+  {
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    l = i + n2;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUSD(coeff, R) >> 16;
+    out2 = __SMUADX(coeff, R);
+#else
+    out1 = __SMUADX(R, coeff) >> 16U;
+    out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    i++;
+    l++;
+
+    T = read_q15x2 (pSrc + (2 * i));
+    in = ((int16_t) (T & 0xFFFF)) >> 1;
+    T = ((T >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    S = read_q15x2 (pSrc + (2 * l));
+    in = ((int16_t) (S & 0xFFFF)) >> 1;
+    S = ((S >> 1) & 0xFFFF0000) | (in & 0xFFFF);
+
+    R = __QSUB16(T, S);
+
+    write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    out1 = __SMUSD(coeff, R) >> 16;
+    out2 = __SMUADX(coeff, R);
+#else
+    out1 = __SMUADX(R, coeff) >> 16U;
+    out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUSD(coeff, R) >> 16;
+        out2 = __SMUADX(coeff, R);
+#else
+        out1 = __SMUADX(R, coeff) >> 16U;
+        out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+        i += n1;
+
+        l = i + n2;
+
+        T = read_q15x2 (pSrc + (2 * i));
+
+        S = read_q15x2 (pSrc + (2 * l));
+
+        R = __QSUB16(T, S);
+
+        write_q15x2 (pSrc + (2 * i), __SHADD16(T, S));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUSD(coeff, R) >> 16;
+        out2 = __SMUADX(coeff, R);
+#else
+        out1 = __SMUADX(R, coeff) >> 16U;
+        out2 = __SMUSD(__QSUB(0, coeff), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        write_q15x2 (pSrc + (2 * l), (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    coeff = read_q15x2 ((q15_t *)pCoef + (ia * 2U));
+
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+
+      T = read_q15x2 (pSrc + (2 * i));
+
+      S = read_q15x2 (pSrc + (2 * l));
+
+      R = __QSUB16(T, S);
+
+      write_q15x2 (pSrc + (2 * i), __QADD16(T, S));
+
+      write_q15x2 (pSrc + (2 * l), R);
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+        uint32_t i, j, k, l;
+        uint32_t n1, n2, ia;
+        q15_t xt, yt, cosVal, sinVal;
+
+  // N = fftLen;
+  n2 = fftLen;
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  /* loop for groups */
+  for (j = 0; j < n2; j++)
+  {
+    cosVal = pCoef[(ia * 2)];
+    sinVal = pCoef[(ia * 2) + 1];
+    ia = ia + twidCoefModifier;
+
+    /* loop for butterfly */
+    for (i = j; i < fftLen; i += n1)
+    {
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] = ((pSrc[2 * l + 1] >> 1U) +
+                         (pSrc[2 * i + 1] >> 1U)  ) >> 1U;
+
+      pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+                     ((int16_t) (((q31_t) yt * sinVal) >> 16)));
+
+      pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+                         ((int16_t) (((q31_t) xt * sinVal) >> 16)));
+
+    } /* butterfly loop end */
+
+  } /* groups loop end */
+
+  twidCoefModifier = twidCoefModifier << 1U;
+
+  /* loop for stage */
+  for (k = fftLen / 2; k > 2; k = k >> 1)
+  {
+    n1 = n2;
+    n2 = n2 >> 1;
+    ia = 0;
+
+    /* loop for groups */
+    for (j = 0; j < n2; j++)
+    {
+      cosVal = pCoef[(ia * 2)];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      /* loop for butterfly */
+      for (i = j; i < fftLen; i += n1)
+      {
+        l = i + n2;
+        xt = pSrc[2 * i] - pSrc[2 * l];
+        pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+        yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+        pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+        pSrc[2 * l] = (((int16_t) (((q31_t) xt * cosVal) >> 16)) -
+                       ((int16_t) (((q31_t) yt * sinVal) >> 16))  );
+
+        pSrc[2 * l + 1] = (((int16_t) (((q31_t) yt * cosVal) >> 16)) +
+                           ((int16_t) (((q31_t) xt * sinVal) >> 16))  );
+
+      } /* butterfly loop end */
+
+    } /* groups loop end */
+
+    twidCoefModifier = twidCoefModifier << 1U;
+  } /* stages loop end */
+
+  n1 = n2;
+  n2 = n2 >> 1;
+  ia = 0;
+
+  cosVal = pCoef[(ia * 2)];
+  sinVal = pCoef[(ia * 2) + 1];
+
+  ia = ia + twidCoefModifier;
+
+  /* loop for butterfly */
+  for (i = 0; i < fftLen; i += n1)
+  {
+    l = i + n2;
+    xt = pSrc[2 * i] - pSrc[2 * l];
+    pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+    yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+    pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+    pSrc[2 * l] = xt;
+
+    pSrc[2 * l + 1] = yt;
+
+  } /* groups loop end */
+
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
index 27f14080..996e91d3 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix2_q31.c
@@ -1,337 +1,337 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix2_q31.c
- * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-void arm_radix2_butterfly_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint16_t twidCoefModifier);
-
-void arm_radix2_butterfly_inverse_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint16_t twidCoefModifier);
-
-void arm_bitreversal_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the fixed-point CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
-  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
-  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @return        none
- */
-
-void arm_cfft_radix2_q31(
-  const arm_cfft_radix2_instance_q31 * S,
-        q31_t * pSrc)
-{
-
-   if (S->ifftFlag == 1U)
-   {
-      arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
-      S->pTwiddle, S->twidCoefModifier);
-   }
-   else
-   {
-      arm_radix2_butterfly_q31(pSrc, S->fftLen,
-      S->pTwiddle, S->twidCoefModifier);
-   }
-
-   arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-}
-
-/**
-  @} end of ComplexFFT group
- */
-
-void arm_radix2_butterfly_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint16_t twidCoefModifier)
-{
-
-   unsigned i, j, k, l, m;
-   unsigned n1, n2, ia;
-   q31_t xt, yt, cosVal, sinVal;
-   q31_t p0, p1;
-
-   //N = fftLen;
-   n2 = fftLen;
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   // loop for groups
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
-
-      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
-
-      mult_32x32_keep32_R(p0, xt, cosVal);
-      mult_32x32_keep32_R(p1, yt, cosVal);
-      multAcc_32x32_keep32_R(p0, yt, sinVal);
-      multSub_32x32_keep32_R(p1, xt, sinVal);
-
-      pSrc[2U * l] = p0;
-      pSrc[2U * l + 1U] = p1;
-
-   }                             // groups loop end
-
-   twidCoefModifier <<= 1U;
-
-   // loop for stage
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups
-      for (j = 0; j < n2; j++)
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly
-         i = j;
-         m = fftLen / n1;
-         do
-         {
-            l = i + n2;
-            xt = pSrc[2 * i] - pSrc[2 * l];
-            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
-
-            mult_32x32_keep32_R(p0, xt, cosVal);
-            mult_32x32_keep32_R(p1, yt, cosVal);
-            multAcc_32x32_keep32_R(p0, yt, sinVal);
-            multSub_32x32_keep32_R(p1, xt, sinVal);
-
-            pSrc[2U * l] = p0;
-            pSrc[2U * l + 1U] = p1;
-            i += n1;
-            m--;
-         } while ( m > 0);                   // butterfly loop end
-
-      }                           // groups loop end
-
-      twidCoefModifier <<= 1U;
-   }                             // stages loop end
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   cosVal = pCoef[ia * 2];
-   sinVal = pCoef[(ia * 2) + 1];
-   ia = ia + twidCoefModifier;
-
-   // loop for butterfly
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2U * l] = xt;
-
-      pSrc[2U * l + 1U] = yt;
-
-      i += n1;
-      l = i + n2;
-
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2U * l] = xt;
-
-      pSrc[2U * l + 1U] = yt;
-
-   }                             // butterfly loop end
-
-}
-
-
-void arm_radix2_butterfly_inverse_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint16_t twidCoefModifier)
-{
-
-   unsigned i, j, k, l;
-   unsigned n1, n2, ia;
-   q31_t xt, yt, cosVal, sinVal;
-   q31_t p0, p1;
-
-   //N = fftLen;
-   n2 = fftLen;
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   // loop for groups
-   for (i = 0; i < n2; i++)
-   {
-      cosVal = pCoef[ia * 2];
-      sinVal = pCoef[(ia * 2) + 1];
-      ia = ia + twidCoefModifier;
-
-      l = i + n2;
-      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
-      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
-
-      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
-      pSrc[2 * i + 1] =
-        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
-
-      mult_32x32_keep32_R(p0, xt, cosVal);
-      mult_32x32_keep32_R(p1, yt, cosVal);
-      multSub_32x32_keep32_R(p0, yt, sinVal);
-      multAcc_32x32_keep32_R(p1, xt, sinVal);
-
-      pSrc[2U * l] = p0;
-      pSrc[2U * l + 1U] = p1;
-   }                             // groups loop end
-
-   twidCoefModifier = twidCoefModifier << 1U;
-
-   // loop for stage
-   for (k = fftLen / 2; k > 2; k = k >> 1)
-   {
-      n1 = n2;
-      n2 = n2 >> 1;
-      ia = 0;
-
-      // loop for groups
-      for (j = 0; j < n2; j++)
-      {
-         cosVal = pCoef[ia * 2];
-         sinVal = pCoef[(ia * 2) + 1];
-         ia = ia + twidCoefModifier;
-
-         // loop for butterfly
-         for (i = j; i < fftLen; i += n1)
-         {
-            l = i + n2;
-            xt = pSrc[2 * i] - pSrc[2 * l];
-            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
-
-            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
-
-            mult_32x32_keep32_R(p0, xt, cosVal);
-            mult_32x32_keep32_R(p1, yt, cosVal);
-            multSub_32x32_keep32_R(p0, yt, sinVal);
-            multAcc_32x32_keep32_R(p1, xt, sinVal);
-
-            pSrc[2U * l] = p0;
-            pSrc[2U * l + 1U] = p1;
-         }                         // butterfly loop end
-
-      }                           // groups loop end
-
-      twidCoefModifier = twidCoefModifier << 1U;
-   }                             // stages loop end
-
-   n1 = n2;
-   n2 = n2 >> 1;
-   ia = 0;
-
-   cosVal = pCoef[ia * 2];
-   sinVal = pCoef[(ia * 2) + 1];
-   ia = ia + twidCoefModifier;
-
-   // loop for butterfly
-   for (i = 0; i < fftLen; i += n1)
-   {
-      l = i + n2;
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2U * l] = xt;
-
-      pSrc[2U * l + 1U] = yt;
-
-      i += n1;
-      l = i + n2;
-
-      xt = pSrc[2 * i] - pSrc[2 * l];
-      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
-
-      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
-      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
-
-      pSrc[2U * l] = xt;
-
-      pSrc[2U * l + 1U] = yt;
-
-   }                             // butterfly loop end
-
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix2_q31.c
+ * Description:  Radix-2 Decimation in Frequency CFFT & CIFFT Fixed point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+void arm_radix2_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix2_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_bitreversal_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the fixed-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in]     S    points to an instance of the fixed-point CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix2_q31(
+  const arm_cfft_radix2_instance_q31 * S,
+        q31_t * pSrc)
+{
+
+   if (S->ifftFlag == 1U)
+   {
+      arm_radix2_butterfly_inverse_q31(pSrc, S->fftLen,
+      S->pTwiddle, S->twidCoefModifier);
+   }
+   else
+   {
+      arm_radix2_butterfly_q31(pSrc, S->fftLen,
+      S->pTwiddle, S->twidCoefModifier);
+   }
+
+   arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+void arm_radix2_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+
+   unsigned i, j, k, l, m;
+   unsigned n1, n2, ia;
+   q31_t xt, yt, cosVal, sinVal;
+   q31_t p0, p1;
+
+   //N = fftLen;
+   n2 = fftLen;
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   // loop for groups
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] =
+        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+      mult_32x32_keep32_R(p0, xt, cosVal);
+      mult_32x32_keep32_R(p1, yt, cosVal);
+      multAcc_32x32_keep32_R(p0, yt, sinVal);
+      multSub_32x32_keep32_R(p1, xt, sinVal);
+
+      pSrc[2U * l] = p0;
+      pSrc[2U * l + 1U] = p1;
+
+   }                             // groups loop end
+
+   twidCoefModifier <<= 1U;
+
+   // loop for stage
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      for (j = 0; j < n2; j++)
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly
+         i = j;
+         m = fftLen / n1;
+         do
+         {
+            l = i + n2;
+            xt = pSrc[2 * i] - pSrc[2 * l];
+            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+            mult_32x32_keep32_R(p0, xt, cosVal);
+            mult_32x32_keep32_R(p1, yt, cosVal);
+            multAcc_32x32_keep32_R(p0, yt, sinVal);
+            multSub_32x32_keep32_R(p1, xt, sinVal);
+
+            pSrc[2U * l] = p0;
+            pSrc[2U * l + 1U] = p1;
+            i += n1;
+            m--;
+         } while ( m > 0);                   // butterfly loop end
+
+      }                           // groups loop end
+
+      twidCoefModifier <<= 1U;
+   }                             // stages loop end
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   cosVal = pCoef[ia * 2];
+   sinVal = pCoef[(ia * 2) + 1];
+   ia = ia + twidCoefModifier;
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+      i += n1;
+      l = i + n2;
+
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+   }                             // butterfly loop end
+
+}
+
+
+void arm_radix2_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+
+   unsigned i, j, k, l;
+   unsigned n1, n2, ia;
+   q31_t xt, yt, cosVal, sinVal;
+   q31_t p0, p1;
+
+   //N = fftLen;
+   n2 = fftLen;
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   // loop for groups
+   for (i = 0; i < n2; i++)
+   {
+      cosVal = pCoef[ia * 2];
+      sinVal = pCoef[(ia * 2) + 1];
+      ia = ia + twidCoefModifier;
+
+      l = i + n2;
+      xt = (pSrc[2 * i] >> 1U) - (pSrc[2 * l] >> 1U);
+      pSrc[2 * i] = ((pSrc[2 * i] >> 1U) + (pSrc[2 * l] >> 1U)) >> 1U;
+
+      yt = (pSrc[2 * i + 1] >> 1U) - (pSrc[2 * l + 1] >> 1U);
+      pSrc[2 * i + 1] =
+        ((pSrc[2 * l + 1] >> 1U) + (pSrc[2 * i + 1] >> 1U)) >> 1U;
+
+      mult_32x32_keep32_R(p0, xt, cosVal);
+      mult_32x32_keep32_R(p1, yt, cosVal);
+      multSub_32x32_keep32_R(p0, yt, sinVal);
+      multAcc_32x32_keep32_R(p1, xt, sinVal);
+
+      pSrc[2U * l] = p0;
+      pSrc[2U * l + 1U] = p1;
+   }                             // groups loop end
+
+   twidCoefModifier = twidCoefModifier << 1U;
+
+   // loop for stage
+   for (k = fftLen / 2; k > 2; k = k >> 1)
+   {
+      n1 = n2;
+      n2 = n2 >> 1;
+      ia = 0;
+
+      // loop for groups
+      for (j = 0; j < n2; j++)
+      {
+         cosVal = pCoef[ia * 2];
+         sinVal = pCoef[(ia * 2) + 1];
+         ia = ia + twidCoefModifier;
+
+         // loop for butterfly
+         for (i = j; i < fftLen; i += n1)
+         {
+            l = i + n2;
+            xt = pSrc[2 * i] - pSrc[2 * l];
+            pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]) >> 1U;
+
+            yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+            pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]) >> 1U;
+
+            mult_32x32_keep32_R(p0, xt, cosVal);
+            mult_32x32_keep32_R(p1, yt, cosVal);
+            multSub_32x32_keep32_R(p0, yt, sinVal);
+            multAcc_32x32_keep32_R(p1, xt, sinVal);
+
+            pSrc[2U * l] = p0;
+            pSrc[2U * l + 1U] = p1;
+         }                         // butterfly loop end
+
+      }                           // groups loop end
+
+      twidCoefModifier = twidCoefModifier << 1U;
+   }                             // stages loop end
+
+   n1 = n2;
+   n2 = n2 >> 1;
+   ia = 0;
+
+   cosVal = pCoef[ia * 2];
+   sinVal = pCoef[(ia * 2) + 1];
+   ia = ia + twidCoefModifier;
+
+   // loop for butterfly
+   for (i = 0; i < fftLen; i += n1)
+   {
+      l = i + n2;
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+      i += n1;
+      l = i + n2;
+
+      xt = pSrc[2 * i] - pSrc[2 * l];
+      pSrc[2 * i] = (pSrc[2 * i] + pSrc[2 * l]);
+
+      yt = pSrc[2 * i + 1] - pSrc[2 * l + 1];
+      pSrc[2 * i + 1] = (pSrc[2 * l + 1] + pSrc[2 * i + 1]);
+
+      pSrc[2U * l] = xt;
+
+      pSrc[2U * l + 1U] = yt;
+
+   }                             // butterfly loop end
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f16.c
new file mode 100755
index 00000000..1fc5169a
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f16.c
@@ -0,0 +1,1272 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_f16.c
+ * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+extern void arm_bitreversal_f16(
+        float16_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+void arm_radix4_butterfly_f16(
+        float16_t * pSrc,
+        uint16_t fftLen,
+  const float16_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix4_butterfly_inverse_f16(
+        float16_t * pSrc,
+        uint16_t fftLen,
+  const float16_t * pCoef,
+        uint16_t twidCoefModifier,
+        float16_t onebyfftLen);
+
+
+void arm_cfft_radix4by2_f16(
+    float16_t * pSrc,
+    uint32_t fftLen,
+    const float16_t * pCoef);
+
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/*
+* @brief  Core function for the floating-point CFFT butterfly process.
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
+* @param[in]      fftLen           length of the FFT.
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+* @return none.
+*/
+
+void arm_cfft_radix4by2_f16(
+    float16_t * pSrc,
+    uint32_t fftLen,
+    const float16_t * pCoef)
+{
+    uint32_t i, l;
+    uint32_t n2, ia;
+    float16_t xt, yt, cosVal, sinVal;
+    float16_t p0, p1,p2,p3,a0,a1;
+
+    n2 = fftLen >> 1;
+    ia = 0;
+    for (i = 0; i < n2; i++)
+    {
+        cosVal = pCoef[2*ia];
+        sinVal = pCoef[2*ia + 1];
+        ia++;
+
+        l = i + n2;
+       
+        /*  Butterfly implementation */
+        a0 = (_Float16)pSrc[2 * i] + (_Float16)pSrc[2 * l];
+        xt = (_Float16)pSrc[2 * i] - (_Float16)pSrc[2 * l];
+  
+        yt = (_Float16)pSrc[2 * i + 1] - (_Float16)pSrc[2 * l + 1];
+        a1 = (_Float16)pSrc[2 * l + 1] + (_Float16)pSrc[2 * i + 1];
+  
+        p0 = (_Float16)xt * (_Float16)cosVal;
+        p1 = (_Float16)yt * (_Float16)sinVal;
+        p2 = (_Float16)yt * (_Float16)cosVal;
+        p3 = (_Float16)xt * (_Float16)sinVal;
+  
+        pSrc[2 * i]     = a0;
+        pSrc[2 * i + 1] = a1;
+  
+        pSrc[2 * l]     = (_Float16)p0 + (_Float16)p1;
+        pSrc[2 * l + 1] = (_Float16)p2 - (_Float16)p3;
+
+    }
+
+    // first col
+    arm_radix4_butterfly_f16( pSrc, n2, (float16_t*)pCoef, 2U);
+    // second col
+    arm_radix4_butterfly_f16( pSrc + fftLen, n2, (float16_t*)pCoef, 2U);
+
+}
+
+
+/**
+  @brief         Processing function for the floating-point Radix-4 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f16 and will be removed in the future.
+  @param[in]     S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix4_f16(
+  const arm_cfft_radix4_instance_f16 * S,
+        float16_t * pSrc)
+{
+   if (S->ifftFlag == 1U)
+   {
+      /*  Complex IFFT radix-4  */
+      arm_radix4_butterfly_inverse_f16(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /*  Complex FFT radix-4  */
+      arm_radix4_butterfly_f16(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+   }
+
+   if (S->bitReverseFlag == 1U)
+   {
+      /*  Bit Reversal */
+      arm_bitreversal_f16(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
+
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+/* ----------------------------------------------------------------------
+ * Internal helper function used by the FFTs
+ * ---------------------------------------------------------------------- */
+
+/*
+* @brief  Core function for the floating-point CFFT butterfly process.
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
+* @param[in]      fftLen           length of the FFT.
+* @param[in]      *pCoef           points to the twiddle coefficient buffer.
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+* @return none.
+*/
+
+void arm_radix4_butterfly_f16(
+float16_t * pSrc,
+uint16_t fftLen,
+const float16_t * pCoef,
+uint16_t twidCoefModifier)
+{
+
+   float16_t co1, co2, co3, si1, si2, si3;
+   uint32_t ia1, ia2, ia3;
+   uint32_t i0, i1, i2, i3;
+   uint32_t n1, n2, j, k;
+
+#if defined (ARM_MATH_DSP)
+
+   /* Run the below code for Cortex-M4 and Cortex-M3 */
+
+   float16_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+   float16_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+   Ybminusd;
+   float16_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+   float16_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+   float16_t *ptr1;
+   float16_t p0,p1,p2,p3,p4,p5;
+   float16_t a0,a1,a2,a3,a4,a5,a6,a7;
+
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
+
+   /* n2 = fftLen/4 */
+   n2 >>= 2U;
+   i0 = 0U;
+   ia1 = 0U;
+
+   j = n2;
+
+   /*  Calculation of first stage */
+   do
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
+
+      xaIn = pSrc[(2U * i0)];
+      yaIn = pSrc[(2U * i0) + 1U];
+
+      xbIn = pSrc[(2U * i1)];
+      ybIn = pSrc[(2U * i1) + 1U];
+
+      xcIn = pSrc[(2U * i2)];
+      ycIn = pSrc[(2U * i2) + 1U];
+
+      xdIn = pSrc[(2U * i3)];
+      ydIn = pSrc[(2U * i3) + 1U];
+
+      /* xa + xc */
+      Xaplusc = (_Float16)xaIn + (_Float16)xcIn;
+      /* xb + xd */
+      Xbplusd = (_Float16)xbIn + (_Float16)xdIn;
+      /* ya + yc */
+      Yaplusc = (_Float16)yaIn + (_Float16)ycIn;
+      /* yb + yd */
+      Ybplusd = (_Float16)ybIn + (_Float16)ydIn;
+
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      co2 = pCoef[ia2 * 2U];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+
+      /* xa - xc */
+      Xaminusc = (_Float16)xaIn - (_Float16)xcIn;
+      /* xb - xd */
+      Xbminusd = (_Float16)xbIn - (_Float16)xdIn;
+      /* ya - yc */
+      Yaminusc = (_Float16)yaIn - (_Float16)ycIn;
+      /* yb - yd */
+      Ybminusd = (_Float16)ybIn - (_Float16)ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd;
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd;
+
+      /* (xa - xc) + (yb - yd) */
+      Xb12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yb12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd);
+      /* (xa + xc) - (xb + xd) */
+      Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd);
+      /* (ya + yc) - (yb + yd) */
+      Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd);
+      /* (xa - xc) - (yb - yd) */
+      Xd12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yd12C_out = ((_Float16)Xbminusd + (_Float16)Yaminusc);
+
+      co1 = pCoef[ia1 * 2U];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+
+      /*  index calculation for the coefficients */
+      ia3 = ia2 + ia1;
+      co3 = pCoef[ia3 * 2U];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+
+      Xb12_out = (_Float16)Xb12C_out * (_Float16)co1;
+      Yb12_out = (_Float16)Yb12C_out * (_Float16)co1;
+      Xc12_out = (_Float16)Xc12C_out * (_Float16)co2;
+      Yc12_out = (_Float16)Yc12C_out * (_Float16)co2;
+      Xd12_out = (_Float16)Xd12C_out * (_Float16)co3;
+      Yd12_out = (_Float16)Yd12C_out * (_Float16)co3;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      //Xb12_out -= Yb12C_out * si1;
+      p0 = (_Float16)Yb12C_out * (_Float16)si1;
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      //Yb12_out += Xb12C_out * si1;
+      p1 = (_Float16)Xb12C_out * (_Float16)si1;
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      //Xc12_out -= Yc12C_out * si2;
+      p2 = (_Float16)Yc12C_out * (_Float16)si2;
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      //Yc12_out += Xc12C_out * si2;
+      p3 = (_Float16)Xc12C_out * (_Float16)si2;
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      //Xd12_out -= Yd12C_out * si3;
+      p4 = (_Float16)Yd12C_out * (_Float16)si3;
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      //Yd12_out += Xd12C_out * si3;
+      p5 = (_Float16)Xd12C_out * (_Float16)si3;
+
+      Xb12_out += (_Float16)p0;
+      Yb12_out -= (_Float16)p1;
+      Xc12_out += (_Float16)p2;
+      Yc12_out -= (_Float16)p3;
+      Xd12_out += (_Float16)p4;
+      Yd12_out -= (_Float16)p5;
+
+      /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+      pSrc[2U * i1] = Xc12_out;
+
+      /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+      pSrc[(2U * i1) + 1U] = Yc12_out;
+
+      /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+      pSrc[2U * i2] = Xb12_out;
+
+      /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+      pSrc[(2U * i2) + 1U] = Yb12_out;
+
+      /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+      pSrc[2U * i3] = Xd12_out;
+
+      /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+      pSrc[(2U * i3) + 1U] = Yd12_out;
+
+      /*  Twiddle coefficients index modifier */
+      ia1 += twidCoefModifier;
+
+      /*  Updating input index */
+      i0++;
+
+   }
+   while (--j);
+
+   twidCoefModifier <<= 2U;
+
+   /*  Calculation of second stage to excluding last stage */
+   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 += twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            xaIn = pSrc[(2U * i0)];
+            yaIn = pSrc[(2U * i0) + 1U];
+
+            xbIn = pSrc[(2U * i1)];
+            ybIn = pSrc[(2U * i1) + 1U];
+
+            xcIn = pSrc[(2U * i2)];
+            ycIn = pSrc[(2U * i2) + 1U];
+
+            xdIn = pSrc[(2U * i3)];
+            ydIn = pSrc[(2U * i3) + 1U];
+
+            /* xa - xc */
+            Xaminusc = (_Float16)xaIn - (_Float16)xcIn;
+            /* (xb - xd) */
+            Xbminusd = (_Float16)xbIn - (_Float16)xdIn;
+            /* ya - yc */
+            Yaminusc = (_Float16)yaIn - (_Float16)ycIn;
+            /* (yb - yd) */
+            Ybminusd = (_Float16)ybIn - (_Float16)ydIn;
+
+            /* xa + xc */
+            Xaplusc = (_Float16)xaIn + (_Float16)xcIn;
+            /* xb + xd */
+            Xbplusd = (_Float16)xbIn + (_Float16)xdIn;
+            /* ya + yc */
+            Yaplusc = (_Float16)yaIn + (_Float16)ycIn;
+            /* yb + yd */
+            Ybplusd = (_Float16)ybIn + (_Float16)ydIn;
+
+            /* (xa - xc) + (yb - yd) */
+            Xb12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd);
+            /* (ya - yc) -  (xb - xd) */
+            Yb12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd);
+            /* xa + xc -(xb + xd) */
+            Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd);
+            /* (ya + yc) - (yb + yd) */
+            Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd);
+            /* (xa - xc) - (yb - yd) */
+            Xd12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd);
+            /* (ya - yc) +  (xb - xd) */
+            Yd12C_out = ((_Float16)Xbminusd + (_Float16)Yaminusc);
+
+            pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd;
+            pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd;
+
+            Xb12_out = (_Float16)Xb12C_out * (_Float16)co1;
+            Yb12_out = (_Float16)Yb12C_out * (_Float16)co1;
+            Xc12_out = (_Float16)Xc12C_out * (_Float16)co2;
+            Yc12_out = (_Float16)Yc12C_out * (_Float16)co2;
+            Xd12_out = (_Float16)Xd12C_out * (_Float16)co3;
+            Yd12_out = (_Float16)Yd12C_out * (_Float16)co3;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            //Xb12_out -= Yb12C_out * si1;
+            p0 = (_Float16)Yb12C_out * (_Float16)si1;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            //Yb12_out += Xb12C_out * si1;
+            p1 = (_Float16)Xb12C_out * (_Float16)si1;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            //Xc12_out -= Yc12C_out * si2;
+            p2 = (_Float16)Yc12C_out * (_Float16)si2;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            //Yc12_out += Xc12C_out * si2;
+            p3 = (_Float16)Xc12C_out * (_Float16)si2;
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            //Xd12_out -= Yd12C_out * si3;
+            p4 = (_Float16)Yd12C_out * (_Float16)si3;
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            //Yd12_out += Xd12C_out * si3;
+            p5 = (_Float16)Xd12C_out * (_Float16)si3;
+
+            Xb12_out += (_Float16)p0;
+            Yb12_out -= (_Float16)p1;
+            Xc12_out += (_Float16)p2;
+            Yc12_out -= (_Float16)p3;
+            Xd12_out += (_Float16)p4;
+            Yd12_out -= (_Float16)p5;
+
+            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = Xc12_out;
+
+            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = Yc12_out;
+
+            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = Xb12_out;
+
+            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = Yb12_out;
+
+            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = Xd12_out;
+
+            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = Yd12_out;
+
+            i0 += n1;
+         } while (i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+
+   j = fftLen >> 2;
+   ptr1 = &pSrc[0];
+
+   /*  Calculations of last stage */
+   do
+   {
+      xaIn = ptr1[0];
+      yaIn = ptr1[1];
+      xbIn = ptr1[2];
+      ybIn = ptr1[3];
+      xcIn = ptr1[4];
+      ycIn = ptr1[5];
+      xdIn = ptr1[6];
+      ydIn = ptr1[7];
+
+      /* xa + xc */
+      Xaplusc = (_Float16)xaIn + (_Float16)xcIn;
+
+      /* xa - xc */
+      Xaminusc = (_Float16)xaIn - (_Float16)xcIn;
+
+      /* ya + yc */
+      Yaplusc = (_Float16)yaIn + (_Float16)ycIn;
+
+      /* ya - yc */
+      Yaminusc = (_Float16)yaIn - (_Float16)ycIn;
+
+      /* xb + xd */
+      Xbplusd = (_Float16)xbIn + (_Float16)xdIn;
+
+      /* yb + yd */
+      Ybplusd = (_Float16)ybIn + (_Float16)ydIn;
+
+      /* (xb-xd) */
+      Xbminusd = (_Float16)xbIn - (_Float16)xdIn;
+
+      /* (yb-yd) */
+      Ybminusd = (_Float16)ybIn - (_Float16)ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      a0 = ((_Float16)Xaplusc + (_Float16)Xbplusd);
+      /* ya' = ya + yb + yc + yd */
+      a1 = ((_Float16)Yaplusc + (_Float16)Ybplusd);
+      /* xc' = (xa-xb+xc-xd) */
+      a2 = ((_Float16)Xaplusc - (_Float16)Xbplusd);
+      /* yc' = (ya-yb+yc-yd) */
+      a3 = ((_Float16)Yaplusc - (_Float16)Ybplusd);
+      /* xb' = (xa+yb-xc-yd) */
+      a4 = ((_Float16)Xaminusc + (_Float16)Ybminusd);
+      /* yb' = (ya-xb-yc+xd) */
+      a5 = ((_Float16)Yaminusc - (_Float16)Xbminusd);
+      /* xd' = (xa-yb-xc+yd)) */
+      a6 = ((_Float16)Xaminusc - (_Float16)Ybminusd);
+      /* yd' = (ya+xb-yc-xd) */
+      a7 = ((_Float16)Xbminusd + (_Float16)Yaminusc);
+
+      ptr1[0] = a0;
+      ptr1[1] = a1;
+      ptr1[2] = a2;
+      ptr1[3] = a3;
+      ptr1[4] = a4;
+      ptr1[5] = a5;
+      ptr1[6] = a6;
+      ptr1[7] = a7;
+
+      /* increment pointer by 8 */
+      ptr1 += 8U;
+   } while (--j);
+
+#else
+
+   float16_t t1, t2, r1, r2, s1, s2;
+
+   /* Run the below code for Cortex-M0 */
+
+   /*  Initializations for the fft calculation */
+   n2 = fftLen;
+   n1 = n2;
+   for (k = fftLen; k > 1U; k >>= 2U)
+   {
+      /*  Initializations for the fft calculation */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  FFT Calculation */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            /* xa + xc */
+            r1 = (_Float16)pSrc[(2U * i0)] + (_Float16)pSrc[(2U * i2)];
+
+            /* xa - xc */
+            r2 = (_Float16)pSrc[(2U * i0)] - (_Float16)pSrc[(2U * i2)];
+
+            /* ya + yc */
+            s1 = (_Float16)pSrc[(2U * i0) + 1U] + (_Float16)pSrc[(2U * i2) + 1U];
+
+            /* ya - yc */
+            s2 = (_Float16)pSrc[(2U * i0) + 1U] - (_Float16)pSrc[(2U * i2) + 1U];
+
+            /* xb + xd */
+            t1 = (_Float16)pSrc[2U * i1] + (_Float16)pSrc[2U * i3];
+
+            /* xa' = xa + xb + xc + xd */
+            pSrc[2U * i0] = (_Float16)r1 + (_Float16)t1;
+
+            /* xa + xc -(xb + xd) */
+            r1 = (_Float16)r1 - (_Float16)t1;
+
+            /* yb + yd */
+            t2 = (_Float16)pSrc[(2U * i1) + 1U] + (_Float16)pSrc[(2U * i3) + 1U];
+
+            /* ya' = ya + yb + yc + yd */
+            pSrc[(2U * i0) + 1U] = (_Float16)s1 + (_Float16)t2;
+
+            /* (ya + yc) - (yb + yd) */
+            s1 = (_Float16)s1 - (_Float16)t2;
+
+            /* (yb - yd) */
+            t1 = (_Float16)pSrc[(2U * i1) + 1U] - (_Float16)pSrc[(2U * i3) + 1U];
+
+            /* (xb - xd) */
+            t2 = (_Float16)pSrc[2U * i1] - (_Float16)pSrc[2U * i3];
+
+            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = ((_Float16)r1 * (_Float16)co2) + ((_Float16)s1 * (_Float16)si2);
+
+            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = ((_Float16)s1 * (_Float16)co2) - ((_Float16)r1 * (_Float16)si2);
+
+            /* (xa - xc) + (yb - yd) */
+            r1 = (_Float16)r2 + (_Float16)t1;
+
+            /* (xa - xc) - (yb - yd) */
+            r2 = (_Float16)r2 - (_Float16)t1;
+
+            /* (ya - yc) -  (xb - xd) */
+            s1 = (_Float16)s2 - (_Float16)t2;
+
+            /* (ya - yc) +  (xb - xd) */
+            s2 = (_Float16)s2 + (_Float16)t2;
+
+            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = ((_Float16)r1 * (_Float16)co1) + ((_Float16)s1 * (_Float16)si1);
+
+            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = ((_Float16)s1 * (_Float16)co1) - ((_Float16)r1 * (_Float16)si1);
+
+            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = ((_Float16)r2 * (_Float16)co3) + ((_Float16)s2 * (_Float16)si3);
+
+            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = ((_Float16)s2 * (_Float16)co3) - ((_Float16)r2 * (_Float16)si3);
+
+            i0 += n1;
+         } while ( i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+/*
+* @brief  Core function for the floating-point CIFFT butterfly process.
+* @param[in, out] *pSrc            points to the in-place buffer of floating-point data type.
+* @param[in]      fftLen           length of the FFT.
+* @param[in]      *pCoef           points to twiddle coefficient buffer.
+* @param[in]      twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+* @param[in]      onebyfftLen      value of 1/fftLen.
+* @return none.
+*/
+
+void arm_radix4_butterfly_inverse_f16(
+float16_t * pSrc,
+uint16_t fftLen,
+const float16_t * pCoef,
+uint16_t twidCoefModifier,
+float16_t onebyfftLen)
+{
+   float16_t co1, co2, co3, si1, si2, si3;
+   uint32_t ia1, ia2, ia3;
+   uint32_t i0, i1, i2, i3;
+   uint32_t n1, n2, j, k;
+
+#if defined (ARM_MATH_DSP)
+
+   float16_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+   float16_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+   Ybminusd;
+   float16_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+   float16_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+   float16_t *ptr1;
+   float16_t p0,p1,p2,p3,p4,p5,p6,p7;
+   float16_t a0,a1,a2,a3,a4,a5,a6,a7;
+
+
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
+
+   /* n2 = fftLen/4 */
+   n2 >>= 2U;
+   i0 = 0U;
+   ia1 = 0U;
+
+   j = n2;
+
+   /*  Calculation of first stage */
+   do
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
+
+      /*  Butterfly implementation */
+      xaIn = pSrc[(2U * i0)];
+      yaIn = pSrc[(2U * i0) + 1U];
+
+      xcIn = pSrc[(2U * i2)];
+      ycIn = pSrc[(2U * i2) + 1U];
+
+      xbIn = pSrc[(2U * i1)];
+      ybIn = pSrc[(2U * i1) + 1U];
+
+      xdIn = pSrc[(2U * i3)];
+      ydIn = pSrc[(2U * i3) + 1U];
+
+      /* xa + xc */
+      Xaplusc = (_Float16)xaIn + (_Float16)xcIn;
+      /* xb + xd */
+      Xbplusd = (_Float16)xbIn + (_Float16)xdIn;
+      /* ya + yc */
+      Yaplusc = (_Float16)yaIn + (_Float16)ycIn;
+      /* yb + yd */
+      Ybplusd = (_Float16)ybIn + (_Float16)ydIn;
+
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      co2 = pCoef[ia2 * 2U];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+
+      /* xa - xc */
+      Xaminusc = (_Float16)xaIn - (_Float16)xcIn;
+      /* xb - xd */
+      Xbminusd = (_Float16)xbIn - (_Float16)xdIn;
+      /* ya - yc */
+      Yaminusc = (_Float16)yaIn - (_Float16)ycIn;
+      /* yb - yd */
+      Ybminusd = (_Float16)ybIn - (_Float16)ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd;
+
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd;
+
+      /* (xa - xc) - (yb - yd) */
+      Xb12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yb12C_out = ((_Float16)Yaminusc + (_Float16)Xbminusd);
+      /* (xa + xc) - (xb + xd) */
+      Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd);
+      /* (ya + yc) - (yb + yd) */
+      Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd);
+      /* (xa - xc) + (yb - yd) */
+      Xd12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd);
+      /* (ya - yc) - (xb - xd) */
+      Yd12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd);
+
+      co1 = pCoef[ia1 * 2U];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+
+      /*  index calculation for the coefficients */
+      ia3 = ia2 + ia1;
+      co3 = pCoef[ia3 * 2U];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+
+      Xb12_out = (_Float16)Xb12C_out * (_Float16)co1;
+      Yb12_out = (_Float16)Yb12C_out * (_Float16)co1;
+      Xc12_out = (_Float16)Xc12C_out * (_Float16)co2;
+      Yc12_out = (_Float16)Yc12C_out * (_Float16)co2;
+      Xd12_out = (_Float16)Xd12C_out * (_Float16)co3;
+      Yd12_out = (_Float16)Yd12C_out * (_Float16)co3;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      //Xb12_out -= Yb12C_out * si1;
+      p0 = (_Float16)Yb12C_out * (_Float16)si1;
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      //Yb12_out += Xb12C_out * si1;
+      p1 = (_Float16)Xb12C_out * (_Float16)si1;
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      //Xc12_out -= Yc12C_out * si2;
+      p2 = (_Float16)Yc12C_out * (_Float16)si2;
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      //Yc12_out += Xc12C_out * si2;
+      p3 = (_Float16)Xc12C_out * (_Float16)si2;
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      //Xd12_out -= Yd12C_out * si3;
+      p4 = (_Float16)Yd12C_out * (_Float16)si3;
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      //Yd12_out += Xd12C_out * si3;
+      p5 =(_Float16) Xd12C_out * (_Float16)si3;
+
+      Xb12_out -= (_Float16)p0;
+      Yb12_out += (_Float16)p1;
+      Xc12_out -= (_Float16)p2;
+      Yc12_out += (_Float16)p3;
+      Xd12_out -= (_Float16)p4;
+      Yd12_out += (_Float16)p5;
+
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      pSrc[2U * i1] = Xc12_out;
+
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      pSrc[(2U * i1) + 1U] = Yc12_out;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      pSrc[2U * i2] = Xb12_out;
+
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      pSrc[(2U * i2) + 1U] = Yb12_out;
+
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      pSrc[2U * i3] = Xd12_out;
+
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      pSrc[(2U * i3) + 1U] = Yd12_out;
+
+      /*  Twiddle coefficients index modifier */
+      ia1 = ia1 + twidCoefModifier;
+
+      /*  Updating input index */
+      i0 = i0 + 1U;
+
+   } while (--j);
+
+   twidCoefModifier <<= 2U;
+
+   /*  Calculation of second stage to excluding last stage */
+   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            xaIn = pSrc[(2U * i0)];
+            yaIn = pSrc[(2U * i0) + 1U];
+
+            xbIn = pSrc[(2U * i1)];
+            ybIn = pSrc[(2U * i1) + 1U];
+
+            xcIn = pSrc[(2U * i2)];
+            ycIn = pSrc[(2U * i2) + 1U];
+
+            xdIn = pSrc[(2U * i3)];
+            ydIn = pSrc[(2U * i3) + 1U];
+
+            /* xa - xc */
+            Xaminusc = (_Float16)xaIn - (_Float16)xcIn;
+            /* (xb - xd) */
+            Xbminusd = (_Float16)xbIn - (_Float16)xdIn;
+            /* ya - yc */
+            Yaminusc = (_Float16)yaIn - (_Float16)ycIn;
+            /* (yb - yd) */
+            Ybminusd = (_Float16)ybIn - (_Float16)ydIn;
+
+            /* xa + xc */
+            Xaplusc = (_Float16)xaIn + (_Float16)xcIn;
+            /* xb + xd */
+            Xbplusd = (_Float16)xbIn + (_Float16)xdIn;
+            /* ya + yc */
+            Yaplusc = (_Float16)yaIn + (_Float16)ycIn;
+            /* yb + yd */
+            Ybplusd = (_Float16)ybIn + (_Float16)ydIn;
+
+            /* (xa - xc) - (yb - yd) */
+            Xb12C_out = ((_Float16)Xaminusc - (_Float16)Ybminusd);
+            /* (ya - yc) +  (xb - xd) */
+            Yb12C_out = ((_Float16)Yaminusc + (_Float16)Xbminusd);
+            /* xa + xc -(xb + xd) */
+            Xc12C_out = ((_Float16)Xaplusc - (_Float16)Xbplusd);
+            /* (ya + yc) - (yb + yd) */
+            Yc12C_out = ((_Float16)Yaplusc - (_Float16)Ybplusd);
+            /* (xa - xc) + (yb - yd) */
+            Xd12C_out = ((_Float16)Xaminusc + (_Float16)Ybminusd);
+            /* (ya - yc) -  (xb - xd) */
+            Yd12C_out = ((_Float16)Yaminusc - (_Float16)Xbminusd);
+
+            pSrc[(2U * i0)] = (_Float16)Xaplusc + (_Float16)Xbplusd;
+            pSrc[(2U * i0) + 1U] = (_Float16)Yaplusc + (_Float16)Ybplusd;
+
+            Xb12_out = (_Float16)Xb12C_out * (_Float16)co1;
+            Yb12_out = (_Float16)Yb12C_out * (_Float16)co1;
+            Xc12_out = (_Float16)Xc12C_out * (_Float16)co2;
+            Yc12_out = (_Float16)Yc12C_out * (_Float16)co2;
+            Xd12_out = (_Float16)Xd12C_out * (_Float16)co3;
+            Yd12_out = (_Float16)Yd12C_out * (_Float16)co3;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            //Xb12_out -= Yb12C_out * si1;
+            p0 = (_Float16)Yb12C_out * (_Float16)si1;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            //Yb12_out += Xb12C_out * si1;
+            p1 = (_Float16)Xb12C_out * (_Float16)si1;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            //Xc12_out -= Yc12C_out * si2;
+            p2 = (_Float16)Yc12C_out * (_Float16)si2;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            //Yc12_out += Xc12C_out * si2;
+            p3 = (_Float16)Xc12C_out * (_Float16)si2;
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            //Xd12_out -= Yd12C_out * si3;
+            p4 = (_Float16)Yd12C_out * (_Float16)si3;
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            //Yd12_out += Xd12C_out * si3;
+            p5 = (_Float16)Xd12C_out * (_Float16)si3;
+
+            Xb12_out -= (_Float16)p0;
+            Yb12_out += (_Float16)p1;
+            Xc12_out -= (_Float16)p2;
+            Yc12_out += (_Float16)p3;
+            Xd12_out -= (_Float16)p4;
+            Yd12_out += (_Float16)p5;
+
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = Xc12_out;
+
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = Yc12_out;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = Xb12_out;
+
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = Yb12_out;
+
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = Xd12_out;
+
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = Yd12_out;
+
+            i0 += n1;
+         } while (i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+   /*  Initializations of last stage */
+
+   j = fftLen >> 2;
+   ptr1 = &pSrc[0];
+
+   /*  Calculations of last stage */
+   do
+   {
+      xaIn = ptr1[0];
+      yaIn = ptr1[1];
+      xbIn = ptr1[2];
+      ybIn = ptr1[3];
+      xcIn = ptr1[4];
+      ycIn = ptr1[5];
+      xdIn = ptr1[6];
+      ydIn = ptr1[7];
+
+      /*  Butterfly implementation */
+      /* xa + xc */
+      Xaplusc = (_Float16)xaIn + (_Float16)xcIn;
+
+      /* xa - xc */
+      Xaminusc = (_Float16)xaIn - (_Float16)xcIn;
+
+      /* ya + yc */
+      Yaplusc = (_Float16)yaIn + (_Float16)ycIn;
+
+      /* ya - yc */
+      Yaminusc = (_Float16)yaIn - (_Float16)ycIn;
+
+      /* xb + xd */
+      Xbplusd = (_Float16)xbIn + (_Float16)xdIn;
+
+      /* yb + yd */
+      Ybplusd = (_Float16)ybIn + (_Float16)ydIn;
+
+      /* (xb-xd) */
+      Xbminusd = (_Float16)xbIn - (_Float16)xdIn;
+
+      /* (yb-yd) */
+      Ybminusd = (_Float16)ybIn - (_Float16)ydIn;
+
+      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
+      a0 = ((_Float16)Xaplusc + (_Float16)Xbplusd);
+      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
+      a1 = ((_Float16)Yaplusc + (_Float16)Ybplusd);
+      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
+      a2 = ((_Float16)Xaplusc - (_Float16)Xbplusd);
+      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
+      a3 = ((_Float16)Yaplusc - (_Float16)Ybplusd);
+      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
+      a4 = ((_Float16)Xaminusc - (_Float16)Ybminusd);
+      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
+      a5 = ((_Float16)Yaminusc + (_Float16)Xbminusd);
+      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
+      a6 = ((_Float16)Xaminusc + (_Float16)Ybminusd);
+      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
+      a7 = ((_Float16)Yaminusc - (_Float16)Xbminusd);
+
+      p0 = (_Float16)a0 * (_Float16)onebyfftLen;
+      p1 = (_Float16)a1 * (_Float16)onebyfftLen;
+      p2 = (_Float16)a2 * (_Float16)onebyfftLen;
+      p3 = (_Float16)a3 * (_Float16)onebyfftLen;
+      p4 = (_Float16)a4 * (_Float16)onebyfftLen;
+      p5 = (_Float16)a5 * (_Float16)onebyfftLen;
+      p6 = (_Float16)a6 * (_Float16)onebyfftLen;
+      p7 = (_Float16)a7 * (_Float16)onebyfftLen;
+
+      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
+      ptr1[0] = p0;
+      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
+      ptr1[1] = p1;
+      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
+      ptr1[2] = p2;
+      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
+      ptr1[3] = p3;
+      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
+      ptr1[4] = p4;
+      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
+      ptr1[5] = p5;
+      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
+      ptr1[6] = p6;
+      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
+      ptr1[7] = p7;
+
+      /* increment source pointer by 8 for next calculations */
+      ptr1 = ptr1 + 8U;
+
+   } while (--j);
+
+#else
+
+   float16_t t1, t2, r1, r2, s1, s2;
+
+   /* Run the below code for Cortex-M0 */
+
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
+
+   /*  Calculation of first stage */
+   for (k = fftLen; k > 4U; k >>= 2U)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            /* xa + xc */
+            r1 = (_Float16)pSrc[(2U * i0)] + (_Float16)pSrc[(2U * i2)];
+
+            /* xa - xc */
+            r2 = (_Float16)pSrc[(2U * i0)] - (_Float16)pSrc[(2U * i2)];
+
+            /* ya + yc */
+            s1 = (_Float16)pSrc[(2U * i0) + 1U] + (_Float16)pSrc[(2U * i2) + 1U];
+
+            /* ya - yc */
+            s2 = (_Float16)pSrc[(2U * i0) + 1U] - (_Float16)pSrc[(2U * i2) + 1U];
+
+            /* xb + xd */
+            t1 = (_Float16)pSrc[2U * i1] + (_Float16)pSrc[2U * i3];
+
+            /* xa' = xa + xb + xc + xd */
+            pSrc[2U * i0] = (_Float16)r1 + (_Float16)t1;
+
+            /* xa + xc -(xb + xd) */
+            r1 = (_Float16)r1 - (_Float16)t1;
+
+            /* yb + yd */
+            t2 = (_Float16)pSrc[(2U * i1) + 1U] + (_Float16)pSrc[(2U * i3) + 1U];
+
+            /* ya' = ya + yb + yc + yd */
+            pSrc[(2U * i0) + 1U] = (_Float16)s1 + (_Float16)t2;
+
+            /* (ya + yc) - (yb + yd) */
+            s1 = (_Float16)s1 - (_Float16)t2;
+
+            /* (yb - yd) */
+            t1 = (_Float16)pSrc[(2U * i1) + 1U] - (_Float16)pSrc[(2U * i3) + 1U];
+
+            /* (xb - xd) */
+            t2 = (_Float16)pSrc[2U * i1] - (_Float16)pSrc[2U * i3];
+
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = ((_Float16)r1 * (_Float16)co2) - ((_Float16)s1 * (_Float16)si2);
+
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = ((_Float16)s1 * (_Float16)co2) + ((_Float16)r1 * (_Float16)si2);
+
+            /* (xa - xc) - (yb - yd) */
+            r1 = (_Float16)r2 - (_Float16)t1;
+
+            /* (xa - xc) + (yb - yd) */
+            r2 = (_Float16)r2 + (_Float16)t1;
+
+            /* (ya - yc) +  (xb - xd) */
+            s1 = (_Float16)s2 + (_Float16)t2;
+
+            /* (ya - yc) -  (xb - xd) */
+            s2 = (_Float16)s2 - (_Float16)t2;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = ((_Float16)r1 * (_Float16)co1) - ((_Float16)s1 * (_Float16)si1);
+
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = ((_Float16)s1 * (_Float16)co1) + ((_Float16)r1 * (_Float16)si1);
+
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = ((_Float16)r2 * (_Float16)co3) - ((_Float16)s2 * (_Float16)si3);
+
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = ((_Float16)s2 * (_Float16)co3) + ((_Float16)r2 * (_Float16)si3);
+
+            i0 += n1;
+         } while ( i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+   /*  Initializations of last stage */
+   n1 = n2;
+   n2 >>= 2U;
+
+   /*  Calculations of last stage */
+   for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
+
+      /*  Butterfly implementation */
+      /* xa + xc */
+      r1 = (_Float16)pSrc[2U * i0] + (_Float16)pSrc[2U * i2];
+
+      /* xa - xc */
+      r2 = (_Float16)pSrc[2U * i0] - (_Float16)pSrc[2U * i2];
+
+      /* ya + yc */
+      s1 = (_Float16)pSrc[(2U * i0) + 1U] + (_Float16)pSrc[(2U * i2) + 1U];
+
+      /* ya - yc */
+      s2 = (_Float16)pSrc[(2U * i0) + 1U] - (_Float16)pSrc[(2U * i2) + 1U];
+
+      /* xc + xd */
+      t1 = (_Float16)pSrc[2U * i1] + (_Float16)pSrc[2U * i3];
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[2U * i0] = ((_Float16)r1 + (_Float16)t1) * (_Float16)onebyfftLen;
+
+      /* (xa + xb) - (xc + xd) */
+      r1 = (_Float16)r1 - (_Float16)t1;
+
+      /* yb + yd */
+      t2 = (_Float16)pSrc[(2U * i1) + 1U] + (_Float16)pSrc[(2U * i3) + 1U];
+
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2U * i0) + 1U] = ((_Float16)s1 + (_Float16)t2) * (_Float16)onebyfftLen;
+
+      /* (ya + yc) - (yb + yd) */
+      s1 = (_Float16)s1 - (_Float16)t2;
+
+      /* (yb-yd) */
+      t1 = (_Float16)pSrc[(2U * i1) + 1U] - (_Float16)pSrc[(2U * i3) + 1U];
+
+      /* (xb-xd) */
+      t2 = (_Float16)pSrc[2U * i1] - (_Float16)pSrc[2U * i3];
+
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      pSrc[2U * i1] = (_Float16)r1 * (_Float16)onebyfftLen;
+
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      pSrc[(2U * i1) + 1U] = (_Float16)s1 * (_Float16)onebyfftLen;
+
+      /* (xa - xc) - (yb-yd) */
+      r1 = (_Float16)r2 - (_Float16)t1;
+
+      /* (xa - xc) + (yb-yd) */
+      r2 = (_Float16)r2 + (_Float16)t1;
+
+      /* (ya - yc) + (xb-xd) */
+      s1 = (_Float16)s2 + (_Float16)t2;
+
+      /* (ya - yc) - (xb-xd) */
+      s2 = (_Float16)s2 - (_Float16)t2;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      pSrc[2U * i2] = (_Float16)r1 * (_Float16)onebyfftLen;
+
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      pSrc[(2U * i2) + 1U] = (_Float16)s1 * (_Float16)onebyfftLen;
+
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      pSrc[2U * i3] = (_Float16)r2 * (_Float16)onebyfftLen;
+
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      pSrc[(2U * i3) + 1U] = (_Float16)s2 * (_Float16)onebyfftLen;
+   }
+
+#endif /* #if defined (ARM_MATH_DSP) */
+}
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
index 675a3037..9d9d4d56 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_f32.c
@@ -1,1200 +1,1203 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix4_f32.c
- * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-extern void arm_bitreversal_f32(
-        float32_t * pSrc,
-        uint16_t fftSize,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab);
-
-void arm_radix4_butterfly_f32(
-        float32_t * pSrc,
-        uint16_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier);
-
-void arm_radix4_butterfly_inverse_f32(
-        float32_t * pSrc,
-        uint16_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier,
-        float32_t onebyfftLen);
-
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point Radix-4 CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
-  @param[in]     S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure
-  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @return        none
- */
-
-void arm_cfft_radix4_f32(
-  const arm_cfft_radix4_instance_f32 * S,
-        float32_t * pSrc)
-{
-   if (S->ifftFlag == 1U)
-   {
-      /*  Complex IFFT radix-4  */
-      arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier, S->onebyfftLen);
-   }
-   else
-   {
-      /*  Complex FFT radix-4  */
-      arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
-   }
-
-   if (S->bitReverseFlag == 1U)
-   {
-      /*  Bit Reversal */
-      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-   }
-
-}
-
-/**
-  @} end of ComplexFFT group
- */
-
-/* ----------------------------------------------------------------------
- * Internal helper function used by the FFTs
- * ---------------------------------------------------------------------- */
-
-/**
-  brief         Core function for the floating-point CFFT butterfly process.
-  param[in,out] pSrc             points to the in-place buffer of floating-point data type
-  param[in]     fftLen           length of the FFT
-  param[in]     pCoef            points to the twiddle coefficient buffer
-  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  return        none
- */
-
-void arm_radix4_butterfly_f32(
-        float32_t * pSrc,
-        uint16_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier)
-{
-        float32_t co1, co2, co3, si1, si2, si3;
-        uint32_t ia1, ia2, ia3;
-        uint32_t i0, i1, i2, i3;
-        uint32_t n1, n2, j, k;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-        Ybminusd;
-        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-        float32_t *ptr1;
-        float32_t p0,p1,p2,p3,p4,p5;
-        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
-
-   /*  Initializations for the first stage */
-   n2 = fftLen;
-   n1 = n2;
-
-   /* n2 = fftLen/4 */
-   n2 >>= 2U;
-   i0 = 0U;
-   ia1 = 0U;
-
-   j = n2;
-
-   /*  Calculation of first stage */
-   do
-   {
-      /*  index calculation for the input as, */
-      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-      i1 = i0 + n2;
-      i2 = i1 + n2;
-      i3 = i2 + n2;
-
-      xaIn = pSrc[(2U * i0)];
-      yaIn = pSrc[(2U * i0) + 1U];
-
-      xbIn = pSrc[(2U * i1)];
-      ybIn = pSrc[(2U * i1) + 1U];
-
-      xcIn = pSrc[(2U * i2)];
-      ycIn = pSrc[(2U * i2) + 1U];
-
-      xdIn = pSrc[(2U * i3)];
-      ydIn = pSrc[(2U * i3) + 1U];
-
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      co2 = pCoef[ia2 * 2U];
-      si2 = pCoef[(ia2 * 2U) + 1U];
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-      /* xb - xd */
-      Xbminusd = xbIn - xdIn;
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-      /* yb - yd */
-      Ybminusd = ybIn - ydIn;
-
-      /* xa' = xa + xb + xc + xd */
-      pSrc[(2U * i0)] = Xaplusc + Xbplusd;
-      /* ya' = ya + yb + yc + yd */
-      pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
-
-      /* (xa - xc) + (yb - yd) */
-      Xb12C_out = (Xaminusc + Ybminusd);
-      /* (ya - yc) + (xb - xd) */
-      Yb12C_out = (Yaminusc - Xbminusd);
-      /* (xa + xc) - (xb + xd) */
-      Xc12C_out = (Xaplusc - Xbplusd);
-      /* (ya + yc) - (yb + yd) */
-      Yc12C_out = (Yaplusc - Ybplusd);
-      /* (xa - xc) - (yb - yd) */
-      Xd12C_out = (Xaminusc - Ybminusd);
-      /* (ya - yc) + (xb - xd) */
-      Yd12C_out = (Xbminusd + Yaminusc);
-
-      co1 = pCoef[ia1 * 2U];
-      si1 = pCoef[(ia1 * 2U) + 1U];
-
-      /*  index calculation for the coefficients */
-      ia3 = ia2 + ia1;
-      co3 = pCoef[ia3 * 2U];
-      si3 = pCoef[(ia3 * 2U) + 1U];
-
-      Xb12_out = Xb12C_out * co1;
-      Yb12_out = Yb12C_out * co1;
-      Xc12_out = Xc12C_out * co2;
-      Yc12_out = Yc12C_out * co2;
-      Xd12_out = Xd12C_out * co3;
-      Yd12_out = Yd12C_out * co3;
-
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      //Xb12_out -= Yb12C_out * si1;
-      p0 = Yb12C_out * si1;
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      //Yb12_out += Xb12C_out * si1;
-      p1 = Xb12C_out * si1;
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      //Xc12_out -= Yc12C_out * si2;
-      p2 = Yc12C_out * si2;
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      //Yc12_out += Xc12C_out * si2;
-      p3 = Xc12C_out * si2;
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      //Xd12_out -= Yd12C_out * si3;
-      p4 = Yd12C_out * si3;
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      //Yd12_out += Xd12C_out * si3;
-      p5 = Xd12C_out * si3;
-
-      Xb12_out += p0;
-      Yb12_out -= p1;
-      Xc12_out += p2;
-      Yc12_out -= p3;
-      Xd12_out += p4;
-      Yd12_out -= p5;
-
-      /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-      pSrc[2U * i1] = Xc12_out;
-
-      /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-      pSrc[(2U * i1) + 1U] = Yc12_out;
-
-      /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-      pSrc[2U * i2] = Xb12_out;
-
-      /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-      pSrc[(2U * i2) + 1U] = Yb12_out;
-
-      /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-      pSrc[2U * i3] = Xd12_out;
-
-      /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-      pSrc[(2U * i3) + 1U] = Yd12_out;
-
-      /*  Twiddle coefficients index modifier */
-      ia1 += twidCoefModifier;
-
-      /*  Updating input index */
-      i0++;
-
-   }
-   while (--j);
-
-   twidCoefModifier <<= 2U;
-
-   /*  Calculation of second stage to excluding last stage */
-   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
-   {
-      /*  Initializations for the first stage */
-      n1 = n2;
-      n2 >>= 2U;
-      ia1 = 0U;
-
-      /*  Calculation of first stage */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[(ia1 * 2U)];
-         si1 = pCoef[(ia1 * 2U) + 1U];
-         co2 = pCoef[(ia2 * 2U)];
-         si2 = pCoef[(ia2 * 2U) + 1U];
-         co3 = pCoef[(ia3 * 2U)];
-         si3 = pCoef[(ia3 * 2U) + 1U];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 += twidCoefModifier;
-
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            xaIn = pSrc[(2U * i0)];
-            yaIn = pSrc[(2U * i0) + 1U];
-
-            xbIn = pSrc[(2U * i1)];
-            ybIn = pSrc[(2U * i1) + 1U];
-
-            xcIn = pSrc[(2U * i2)];
-            ycIn = pSrc[(2U * i2) + 1U];
-
-            xdIn = pSrc[(2U * i3)];
-            ydIn = pSrc[(2U * i3) + 1U];
-
-            /* xa - xc */
-            Xaminusc = xaIn - xcIn;
-            /* (xb - xd) */
-            Xbminusd = xbIn - xdIn;
-            /* ya - yc */
-            Yaminusc = yaIn - ycIn;
-            /* (yb - yd) */
-            Ybminusd = ybIn - ydIn;
-
-            /* xa + xc */
-            Xaplusc = xaIn + xcIn;
-            /* xb + xd */
-            Xbplusd = xbIn + xdIn;
-            /* ya + yc */
-            Yaplusc = yaIn + ycIn;
-            /* yb + yd */
-            Ybplusd = ybIn + ydIn;
-
-            /* (xa - xc) + (yb - yd) */
-            Xb12C_out = (Xaminusc + Ybminusd);
-            /* (ya - yc) -  (xb - xd) */
-            Yb12C_out = (Yaminusc - Xbminusd);
-            /* xa + xc -(xb + xd) */
-            Xc12C_out = (Xaplusc - Xbplusd);
-            /* (ya + yc) - (yb + yd) */
-            Yc12C_out = (Yaplusc - Ybplusd);
-            /* (xa - xc) - (yb - yd) */
-            Xd12C_out = (Xaminusc - Ybminusd);
-            /* (ya - yc) +  (xb - xd) */
-            Yd12C_out = (Xbminusd + Yaminusc);
-
-            pSrc[(2U * i0)] = Xaplusc + Xbplusd;
-            pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
-
-            Xb12_out = Xb12C_out * co1;
-            Yb12_out = Yb12C_out * co1;
-            Xc12_out = Xc12C_out * co2;
-            Yc12_out = Yc12C_out * co2;
-            Xd12_out = Xd12C_out * co3;
-            Yd12_out = Yd12C_out * co3;
-
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            //Xb12_out -= Yb12C_out * si1;
-            p0 = Yb12C_out * si1;
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            //Yb12_out += Xb12C_out * si1;
-            p1 = Xb12C_out * si1;
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            //Xc12_out -= Yc12C_out * si2;
-            p2 = Yc12C_out * si2;
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            //Yc12_out += Xc12C_out * si2;
-            p3 = Xc12C_out * si2;
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            //Xd12_out -= Yd12C_out * si3;
-            p4 = Yd12C_out * si3;
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            //Yd12_out += Xd12C_out * si3;
-            p5 = Xd12C_out * si3;
-
-            Xb12_out += p0;
-            Yb12_out -= p1;
-            Xc12_out += p2;
-            Yc12_out -= p3;
-            Xd12_out += p4;
-            Yd12_out -= p5;
-
-            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-            pSrc[2U * i1] = Xc12_out;
-
-            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-            pSrc[(2U * i1) + 1U] = Yc12_out;
-
-            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-            pSrc[2U * i2] = Xb12_out;
-
-            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-            pSrc[(2U * i2) + 1U] = Yb12_out;
-
-            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-            pSrc[2U * i3] = Xd12_out;
-
-            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-            pSrc[(2U * i3) + 1U] = Yd12_out;
-
-            i0 += n1;
-         } while (i0 < fftLen);
-         j++;
-      } while (j <= (n2 - 1U));
-      twidCoefModifier <<= 2U;
-   }
-
-   j = fftLen >> 2;
-   ptr1 = &pSrc[0];
-
-   /*  Calculations of last stage */
-   do
-   {
-      xaIn = ptr1[0];
-      yaIn = ptr1[1];
-      xbIn = ptr1[2];
-      ybIn = ptr1[3];
-      xcIn = ptr1[4];
-      ycIn = ptr1[5];
-      xdIn = ptr1[6];
-      ydIn = ptr1[7];
-
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /* (xb-xd) */
-      Xbminusd = xbIn - xdIn;
-
-      /* (yb-yd) */
-      Ybminusd = ybIn - ydIn;
-
-      /* xa' = xa + xb + xc + xd */
-      a0 = (Xaplusc + Xbplusd);
-      /* ya' = ya + yb + yc + yd */
-      a1 = (Yaplusc + Ybplusd);
-      /* xc' = (xa-xb+xc-xd) */
-      a2 = (Xaplusc - Xbplusd);
-      /* yc' = (ya-yb+yc-yd) */
-      a3 = (Yaplusc - Ybplusd);
-      /* xb' = (xa+yb-xc-yd) */
-      a4 = (Xaminusc + Ybminusd);
-      /* yb' = (ya-xb-yc+xd) */
-      a5 = (Yaminusc - Xbminusd);
-      /* xd' = (xa-yb-xc+yd)) */
-      a6 = (Xaminusc - Ybminusd);
-      /* yd' = (ya+xb-yc-xd) */
-      a7 = (Xbminusd + Yaminusc);
-
-      ptr1[0] = a0;
-      ptr1[1] = a1;
-      ptr1[2] = a2;
-      ptr1[3] = a3;
-      ptr1[4] = a4;
-      ptr1[5] = a5;
-      ptr1[6] = a6;
-      ptr1[7] = a7;
-
-      /* increment pointer by 8 */
-      ptr1 += 8U;
-   } while (--j);
-
-#else
-
-        float32_t t1, t2, r1, r2, s1, s2;
-
-   /* Initializations for the fft calculation */
-   n2 = fftLen;
-   n1 = n2;
-   for (k = fftLen; k > 1U; k >>= 2U)
-   {
-      /*  Initializations for the fft calculation */
-      n1 = n2;
-      n2 >>= 2U;
-      ia1 = 0U;
-
-      /*  FFT Calculation */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2U];
-         si1 = pCoef[(ia1 * 2U) + 1U];
-         co2 = pCoef[ia2 * 2U];
-         si2 = pCoef[(ia2 * 2U) + 1U];
-         co3 = pCoef[ia3 * 2U];
-         si3 = pCoef[(ia3 * 2U) + 1U];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 = ia1 + twidCoefModifier;
-
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            /* xa + xc */
-            r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];
-
-            /* xa - xc */
-            r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];
-
-            /* ya + yc */
-            s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
-
-            /* ya - yc */
-            s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
-
-            /* xb + xd */
-            t1 = pSrc[2U * i1] + pSrc[2U * i3];
-
-            /* xa' = xa + xb + xc + xd */
-            pSrc[2U * i0] = r1 + t1;
-
-            /* xa + xc -(xb + xd) */
-            r1 = r1 - t1;
-
-            /* yb + yd */
-            t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
-
-            /* ya' = ya + yb + yc + yd */
-            pSrc[(2U * i0) + 1U] = s1 + t2;
-
-            /* (ya + yc) - (yb + yd) */
-            s1 = s1 - t2;
-
-            /* (yb - yd) */
-            t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
-
-            /* (xb - xd) */
-            t2 = pSrc[2U * i1] - pSrc[2U * i3];
-
-            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-            pSrc[2U * i1] = (r1 * co2) + (s1 * si2);
-
-            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-            pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2);
-
-            /* (xa - xc) + (yb - yd) */
-            r1 = r2 + t1;
-
-            /* (xa - xc) - (yb - yd) */
-            r2 = r2 - t1;
-
-            /* (ya - yc) -  (xb - xd) */
-            s1 = s2 - t2;
-
-            /* (ya - yc) +  (xb - xd) */
-            s2 = s2 + t2;
-
-            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-            pSrc[2U * i2] = (r1 * co1) + (s1 * si1);
-
-            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-            pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1);
-
-            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-            pSrc[2U * i3] = (r2 * co3) + (s2 * si3);
-
-            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-            pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3);
-
-            i0 += n1;
-         } while ( i0 < fftLen);
-         j++;
-      } while (j <= (n2 - 1U));
-      twidCoefModifier <<= 2U;
-   }
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-}
-
-/**
-  brief         Core function for the floating-point CIFFT butterfly process.
-  param[in,out] pSrc             points to the in-place buffer of floating-point data type
-  param[in]     fftLen           length of the FFT
-  param[in]     pCoef            points to twiddle coefficient buffer
-  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-  param[in]     onebyfftLen      value of 1/fftLen
-  return        none
- */
-
-void arm_radix4_butterfly_inverse_f32(
-        float32_t * pSrc,
-        uint16_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier,
-        float32_t onebyfftLen)
-{
-        float32_t co1, co2, co3, si1, si2, si3;
-        uint32_t ia1, ia2, ia3;
-        uint32_t i0, i1, i2, i3;
-        uint32_t n1, n2, j, k;
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
-        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
-        Ybminusd;
-        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
-        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
-        float32_t *ptr1;
-        float32_t p0,p1,p2,p3,p4,p5,p6,p7;
-        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
-
-
-   /*  Initializations for the first stage */
-   n2 = fftLen;
-   n1 = n2;
-
-   /* n2 = fftLen/4 */
-   n2 >>= 2U;
-   i0 = 0U;
-   ia1 = 0U;
-
-   j = n2;
-
-   /*  Calculation of first stage */
-   do
-   {
-      /*  index calculation for the input as, */
-      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-      i1 = i0 + n2;
-      i2 = i1 + n2;
-      i3 = i2 + n2;
-
-      /*  Butterfly implementation */
-      xaIn = pSrc[(2U * i0)];
-      yaIn = pSrc[(2U * i0) + 1U];
-
-      xcIn = pSrc[(2U * i2)];
-      ycIn = pSrc[(2U * i2) + 1U];
-
-      xbIn = pSrc[(2U * i1)];
-      ybIn = pSrc[(2U * i1) + 1U];
-
-      xdIn = pSrc[(2U * i3)];
-      ydIn = pSrc[(2U * i3) + 1U];
-
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      co2 = pCoef[ia2 * 2U];
-      si2 = pCoef[(ia2 * 2U) + 1U];
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-      /* xb - xd */
-      Xbminusd = xbIn - xdIn;
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-      /* yb - yd */
-      Ybminusd = ybIn - ydIn;
-
-      /* xa' = xa + xb + xc + xd */
-      pSrc[(2U * i0)] = Xaplusc + Xbplusd;
-
-      /* ya' = ya + yb + yc + yd */
-      pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
-
-      /* (xa - xc) - (yb - yd) */
-      Xb12C_out = (Xaminusc - Ybminusd);
-      /* (ya - yc) + (xb - xd) */
-      Yb12C_out = (Yaminusc + Xbminusd);
-      /* (xa + xc) - (xb + xd) */
-      Xc12C_out = (Xaplusc - Xbplusd);
-      /* (ya + yc) - (yb + yd) */
-      Yc12C_out = (Yaplusc - Ybplusd);
-      /* (xa - xc) + (yb - yd) */
-      Xd12C_out = (Xaminusc + Ybminusd);
-      /* (ya - yc) - (xb - xd) */
-      Yd12C_out = (Yaminusc - Xbminusd);
-
-      co1 = pCoef[ia1 * 2U];
-      si1 = pCoef[(ia1 * 2U) + 1U];
-
-      /*  index calculation for the coefficients */
-      ia3 = ia2 + ia1;
-      co3 = pCoef[ia3 * 2U];
-      si3 = pCoef[(ia3 * 2U) + 1U];
-
-      Xb12_out = Xb12C_out * co1;
-      Yb12_out = Yb12C_out * co1;
-      Xc12_out = Xc12C_out * co2;
-      Yc12_out = Yc12C_out * co2;
-      Xd12_out = Xd12C_out * co3;
-      Yd12_out = Yd12C_out * co3;
-
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      //Xb12_out -= Yb12C_out * si1;
-      p0 = Yb12C_out * si1;
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      //Yb12_out += Xb12C_out * si1;
-      p1 = Xb12C_out * si1;
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      //Xc12_out -= Yc12C_out * si2;
-      p2 = Yc12C_out * si2;
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      //Yc12_out += Xc12C_out * si2;
-      p3 = Xc12C_out * si2;
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      //Xd12_out -= Yd12C_out * si3;
-      p4 = Yd12C_out * si3;
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      //Yd12_out += Xd12C_out * si3;
-      p5 = Xd12C_out * si3;
-
-      Xb12_out -= p0;
-      Yb12_out += p1;
-      Xc12_out -= p2;
-      Yc12_out += p3;
-      Xd12_out -= p4;
-      Yd12_out += p5;
-
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      pSrc[2U * i1] = Xc12_out;
-
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      pSrc[(2U * i1) + 1U] = Yc12_out;
-
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      pSrc[2U * i2] = Xb12_out;
-
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      pSrc[(2U * i2) + 1U] = Yb12_out;
-
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      pSrc[2U * i3] = Xd12_out;
-
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      pSrc[(2U * i3) + 1U] = Yd12_out;
-
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      /*  Updating input index */
-      i0 = i0 + 1U;
-
-   } while (--j);
-
-   twidCoefModifier <<= 2U;
-
-   /*  Calculation of second stage to excluding last stage */
-   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
-   {
-      /*  Initializations for the first stage */
-      n1 = n2;
-      n2 >>= 2U;
-      ia1 = 0U;
-
-      /*  Calculation of first stage */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2U];
-         si1 = pCoef[(ia1 * 2U) + 1U];
-         co2 = pCoef[ia2 * 2U];
-         si2 = pCoef[(ia2 * 2U) + 1U];
-         co3 = pCoef[ia3 * 2U];
-         si3 = pCoef[(ia3 * 2U) + 1U];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 = ia1 + twidCoefModifier;
-
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            xaIn = pSrc[(2U * i0)];
-            yaIn = pSrc[(2U * i0) + 1U];
-
-            xbIn = pSrc[(2U * i1)];
-            ybIn = pSrc[(2U * i1) + 1U];
-
-            xcIn = pSrc[(2U * i2)];
-            ycIn = pSrc[(2U * i2) + 1U];
-
-            xdIn = pSrc[(2U * i3)];
-            ydIn = pSrc[(2U * i3) + 1U];
-
-            /* xa - xc */
-            Xaminusc = xaIn - xcIn;
-            /* (xb - xd) */
-            Xbminusd = xbIn - xdIn;
-            /* ya - yc */
-            Yaminusc = yaIn - ycIn;
-            /* (yb - yd) */
-            Ybminusd = ybIn - ydIn;
-
-            /* xa + xc */
-            Xaplusc = xaIn + xcIn;
-            /* xb + xd */
-            Xbplusd = xbIn + xdIn;
-            /* ya + yc */
-            Yaplusc = yaIn + ycIn;
-            /* yb + yd */
-            Ybplusd = ybIn + ydIn;
-
-            /* (xa - xc) - (yb - yd) */
-            Xb12C_out = (Xaminusc - Ybminusd);
-            /* (ya - yc) +  (xb - xd) */
-            Yb12C_out = (Yaminusc + Xbminusd);
-            /* xa + xc -(xb + xd) */
-            Xc12C_out = (Xaplusc - Xbplusd);
-            /* (ya + yc) - (yb + yd) */
-            Yc12C_out = (Yaplusc - Ybplusd);
-            /* (xa - xc) + (yb - yd) */
-            Xd12C_out = (Xaminusc + Ybminusd);
-            /* (ya - yc) -  (xb - xd) */
-            Yd12C_out = (Yaminusc - Xbminusd);
-
-            pSrc[(2U * i0)] = Xaplusc + Xbplusd;
-            pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
-
-            Xb12_out = Xb12C_out * co1;
-            Yb12_out = Yb12C_out * co1;
-            Xc12_out = Xc12C_out * co2;
-            Yc12_out = Yc12C_out * co2;
-            Xd12_out = Xd12C_out * co3;
-            Yd12_out = Yd12C_out * co3;
-
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            //Xb12_out -= Yb12C_out * si1;
-            p0 = Yb12C_out * si1;
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            //Yb12_out += Xb12C_out * si1;
-            p1 = Xb12C_out * si1;
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            //Xc12_out -= Yc12C_out * si2;
-            p2 = Yc12C_out * si2;
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            //Yc12_out += Xc12C_out * si2;
-            p3 = Xc12C_out * si2;
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            //Xd12_out -= Yd12C_out * si3;
-            p4 = Yd12C_out * si3;
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            //Yd12_out += Xd12C_out * si3;
-            p5 = Xd12C_out * si3;
-
-            Xb12_out -= p0;
-            Yb12_out += p1;
-            Xc12_out -= p2;
-            Yc12_out += p3;
-            Xd12_out -= p4;
-            Yd12_out += p5;
-
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            pSrc[2U * i1] = Xc12_out;
-
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            pSrc[(2U * i1) + 1U] = Yc12_out;
-
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            pSrc[2U * i2] = Xb12_out;
-
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            pSrc[(2U * i2) + 1U] = Yb12_out;
-
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            pSrc[2U * i3] = Xd12_out;
-
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            pSrc[(2U * i3) + 1U] = Yd12_out;
-
-            i0 += n1;
-         } while (i0 < fftLen);
-         j++;
-      } while (j <= (n2 - 1U));
-      twidCoefModifier <<= 2U;
-   }
-   /*  Initializations of last stage */
-
-   j = fftLen >> 2;
-   ptr1 = &pSrc[0];
-
-   /*  Calculations of last stage */
-   do
-   {
-      xaIn = ptr1[0];
-      yaIn = ptr1[1];
-      xbIn = ptr1[2];
-      ybIn = ptr1[3];
-      xcIn = ptr1[4];
-      ycIn = ptr1[5];
-      xdIn = ptr1[6];
-      ydIn = ptr1[7];
-
-      /*  Butterfly implementation */
-      /* xa + xc */
-      Xaplusc = xaIn + xcIn;
-
-      /* xa - xc */
-      Xaminusc = xaIn - xcIn;
-
-      /* ya + yc */
-      Yaplusc = yaIn + ycIn;
-
-      /* ya - yc */
-      Yaminusc = yaIn - ycIn;
-
-      /* xb + xd */
-      Xbplusd = xbIn + xdIn;
-
-      /* yb + yd */
-      Ybplusd = ybIn + ydIn;
-
-      /* (xb-xd) */
-      Xbminusd = xbIn - xdIn;
-
-      /* (yb-yd) */
-      Ybminusd = ybIn - ydIn;
-
-      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
-      a0 = (Xaplusc + Xbplusd);
-      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
-      a1 = (Yaplusc + Ybplusd);
-      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
-      a2 = (Xaplusc - Xbplusd);
-      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
-      a3 = (Yaplusc - Ybplusd);
-      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
-      a4 = (Xaminusc - Ybminusd);
-      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
-      a5 = (Yaminusc + Xbminusd);
-      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
-      a6 = (Xaminusc + Ybminusd);
-      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
-      a7 = (Yaminusc - Xbminusd);
-
-      p0 = a0 * onebyfftLen;
-      p1 = a1 * onebyfftLen;
-      p2 = a2 * onebyfftLen;
-      p3 = a3 * onebyfftLen;
-      p4 = a4 * onebyfftLen;
-      p5 = a5 * onebyfftLen;
-      p6 = a6 * onebyfftLen;
-      p7 = a7 * onebyfftLen;
-
-      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
-      ptr1[0] = p0;
-      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
-      ptr1[1] = p1;
-      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
-      ptr1[2] = p2;
-      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
-      ptr1[3] = p3;
-      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
-      ptr1[4] = p4;
-      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
-      ptr1[5] = p5;
-      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
-      ptr1[6] = p6;
-      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
-      ptr1[7] = p7;
-
-      /* increment source pointer by 8 for next calculations */
-      ptr1 = ptr1 + 8U;
-
-   } while (--j);
-
-#else
-
-        float32_t t1, t2, r1, r2, s1, s2;
-
-   /*  Initializations for the first stage */
-   n2 = fftLen;
-   n1 = n2;
-
-   /*  Calculation of first stage */
-   for (k = fftLen; k > 4U; k >>= 2U)
-   {
-      /*  Initializations for the first stage */
-      n1 = n2;
-      n2 >>= 2U;
-      ia1 = 0U;
-
-      /*  Calculation of first stage */
-      j = 0;
-      do
-      {
-         /*  index calculation for the coefficients */
-         ia2 = ia1 + ia1;
-         ia3 = ia2 + ia1;
-         co1 = pCoef[ia1 * 2U];
-         si1 = pCoef[(ia1 * 2U) + 1U];
-         co2 = pCoef[ia2 * 2U];
-         si2 = pCoef[(ia2 * 2U) + 1U];
-         co3 = pCoef[ia3 * 2U];
-         si3 = pCoef[(ia3 * 2U) + 1U];
-
-         /*  Twiddle coefficients index modifier */
-         ia1 = ia1 + twidCoefModifier;
-
-         i0 = j;
-         do
-         {
-            /*  index calculation for the input as, */
-            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-            i1 = i0 + n2;
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-
-            /* xa + xc */
-            r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];
-
-            /* xa - xc */
-            r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];
-
-            /* ya + yc */
-            s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
-
-            /* ya - yc */
-            s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
-
-            /* xb + xd */
-            t1 = pSrc[2U * i1] + pSrc[2U * i3];
-
-            /* xa' = xa + xb + xc + xd */
-            pSrc[2U * i0] = r1 + t1;
-
-            /* xa + xc -(xb + xd) */
-            r1 = r1 - t1;
-
-            /* yb + yd */
-            t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
-
-            /* ya' = ya + yb + yc + yd */
-            pSrc[(2U * i0) + 1U] = s1 + t2;
-
-            /* (ya + yc) - (yb + yd) */
-            s1 = s1 - t2;
-
-            /* (yb - yd) */
-            t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
-
-            /* (xb - xd) */
-            t2 = pSrc[2U * i1] - pSrc[2U * i3];
-
-            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-            pSrc[2U * i1] = (r1 * co2) - (s1 * si2);
-
-            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-            pSrc[(2U * i1) + 1U] = (s1 * co2) + (r1 * si2);
-
-            /* (xa - xc) - (yb - yd) */
-            r1 = r2 - t1;
-
-            /* (xa - xc) + (yb - yd) */
-            r2 = r2 + t1;
-
-            /* (ya - yc) +  (xb - xd) */
-            s1 = s2 + t2;
-
-            /* (ya - yc) -  (xb - xd) */
-            s2 = s2 - t2;
-
-            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-            pSrc[2U * i2] = (r1 * co1) - (s1 * si1);
-
-            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-            pSrc[(2U * i2) + 1U] = (s1 * co1) + (r1 * si1);
-
-            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-            pSrc[2U * i3] = (r2 * co3) - (s2 * si3);
-
-            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-            pSrc[(2U * i3) + 1U] = (s2 * co3) + (r2 * si3);
-
-            i0 += n1;
-         } while ( i0 < fftLen);
-         j++;
-      } while (j <= (n2 - 1U));
-      twidCoefModifier <<= 2U;
-   }
-   /*  Initializations of last stage */
-   n1 = n2;
-   n2 >>= 2U;
-
-   /*  Calculations of last stage */
-   for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
-   {
-      /*  index calculation for the input as, */
-      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
-      i1 = i0 + n2;
-      i2 = i1 + n2;
-      i3 = i2 + n2;
-
-      /*  Butterfly implementation */
-      /* xa + xc */
-      r1 = pSrc[2U * i0] + pSrc[2U * i2];
-
-      /* xa - xc */
-      r2 = pSrc[2U * i0] - pSrc[2U * i2];
-
-      /* ya + yc */
-      s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
-
-      /* ya - yc */
-      s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
-
-      /* xc + xd */
-      t1 = pSrc[2U * i1] + pSrc[2U * i3];
-
-      /* xa' = xa + xb + xc + xd */
-      pSrc[2U * i0] = (r1 + t1) * onebyfftLen;
-
-      /* (xa + xb) - (xc + xd) */
-      r1 = r1 - t1;
-
-      /* yb + yd */
-      t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
-
-      /* ya' = ya + yb + yc + yd */
-      pSrc[(2U * i0) + 1U] = (s1 + t2) * onebyfftLen;
-
-      /* (ya + yc) - (yb + yd) */
-      s1 = s1 - t2;
-
-      /* (yb-yd) */
-      t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
-
-      /* (xb-xd) */
-      t2 = pSrc[2U * i1] - pSrc[2U * i3];
-
-      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-      pSrc[2U * i1] = r1 * onebyfftLen;
-
-      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-      pSrc[(2U * i1) + 1U] = s1 * onebyfftLen;
-
-      /* (xa - xc) - (yb-yd) */
-      r1 = r2 - t1;
-
-      /* (xa - xc) + (yb-yd) */
-      r2 = r2 + t1;
-
-      /* (ya - yc) + (xb-xd) */
-      s1 = s2 + t2;
-
-      /* (ya - yc) - (xb-xd) */
-      s2 = s2 - t2;
-
-      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-      pSrc[2U * i2] = r1 * onebyfftLen;
-
-      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-      pSrc[(2U * i2) + 1U] = s1 * onebyfftLen;
-
-      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-      pSrc[2U * i3] = r2 * onebyfftLen;
-
-      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-      pSrc[(2U * i3) + 1U] = s2 * onebyfftLen;
-   }
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-}
-
-
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_f32.c
+ * Description:  Radix-4 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+extern void arm_bitreversal_f32(
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+void arm_radix4_butterfly_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+void arm_radix4_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
+
+
+
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+
+/**
+  @brief         Processing function for the floating-point Radix-4 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in]     S    points to an instance of the floating-point Radix-4 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ */
+
+void arm_cfft_radix4_f32(
+  const arm_cfft_radix4_instance_f32 * S,
+        float32_t * pSrc)
+{
+   if (S->ifftFlag == 1U)
+   {
+      /*  Complex IFFT radix-4  */
+      arm_radix4_butterfly_inverse_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier, S->onebyfftLen);
+   }
+   else
+   {
+      /*  Complex FFT radix-4  */
+      arm_radix4_butterfly_f32(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+   }
+
+   if (S->bitReverseFlag == 1U)
+   {
+      /*  Bit Reversal */
+      arm_bitreversal_f32(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+   }
+
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+/* ----------------------------------------------------------------------
+ * Internal helper function used by the FFTs
+ * ---------------------------------------------------------------------- */
+
+/**
+  brief         Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to the twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  return        none
+ */
+
+void arm_radix4_butterfly_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier)
+{
+        float32_t co1, co2, co3, si1, si2, si3;
+        uint32_t ia1, ia2, ia3;
+        uint32_t i0, i1, i2, i3;
+        uint32_t n1, n2, j, k;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+        Ybminusd;
+        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+        float32_t *ptr1;
+        float32_t p0,p1,p2,p3,p4,p5;
+        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
+
+   /* n2 = fftLen/4 */
+   n2 >>= 2U;
+   i0 = 0U;
+   ia1 = 0U;
+
+   j = n2;
+
+   /*  Calculation of first stage */
+   do
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
+
+      xaIn = pSrc[(2U * i0)];
+      yaIn = pSrc[(2U * i0) + 1U];
+
+      xbIn = pSrc[(2U * i1)];
+      ybIn = pSrc[(2U * i1) + 1U];
+
+      xcIn = pSrc[(2U * i2)];
+      ycIn = pSrc[(2U * i2) + 1U];
+
+      xdIn = pSrc[(2U * i3)];
+      ydIn = pSrc[(2U * i3) + 1U];
+
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
+
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      co2 = pCoef[ia2 * 2U];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
+      /* xb - xd */
+      Xbminusd = xbIn - xdIn;
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
+      /* yb - yd */
+      Ybminusd = ybIn - ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[(2U * i0)] = Xaplusc + Xbplusd;
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
+
+      /* (xa - xc) + (yb - yd) */
+      Xb12C_out = (Xaminusc + Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yb12C_out = (Yaminusc - Xbminusd);
+      /* (xa + xc) - (xb + xd) */
+      Xc12C_out = (Xaplusc - Xbplusd);
+      /* (ya + yc) - (yb + yd) */
+      Yc12C_out = (Yaplusc - Ybplusd);
+      /* (xa - xc) - (yb - yd) */
+      Xd12C_out = (Xaminusc - Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yd12C_out = (Xbminusd + Yaminusc);
+
+      co1 = pCoef[ia1 * 2U];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+
+      /*  index calculation for the coefficients */
+      ia3 = ia2 + ia1;
+      co3 = pCoef[ia3 * 2U];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+
+      Xb12_out = Xb12C_out * co1;
+      Yb12_out = Yb12C_out * co1;
+      Xc12_out = Xc12C_out * co2;
+      Yc12_out = Yc12C_out * co2;
+      Xd12_out = Xd12C_out * co3;
+      Yd12_out = Yd12C_out * co3;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      //Xb12_out -= Yb12C_out * si1;
+      p0 = Yb12C_out * si1;
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      //Yb12_out += Xb12C_out * si1;
+      p1 = Xb12C_out * si1;
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      //Xc12_out -= Yc12C_out * si2;
+      p2 = Yc12C_out * si2;
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      //Yc12_out += Xc12C_out * si2;
+      p3 = Xc12C_out * si2;
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      //Xd12_out -= Yd12C_out * si3;
+      p4 = Yd12C_out * si3;
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      //Yd12_out += Xd12C_out * si3;
+      p5 = Xd12C_out * si3;
+
+      Xb12_out += p0;
+      Yb12_out -= p1;
+      Xc12_out += p2;
+      Yc12_out -= p3;
+      Xd12_out += p4;
+      Yd12_out -= p5;
+
+      /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+      pSrc[2U * i1] = Xc12_out;
+
+      /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+      pSrc[(2U * i1) + 1U] = Yc12_out;
+
+      /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+      pSrc[2U * i2] = Xb12_out;
+
+      /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+      pSrc[(2U * i2) + 1U] = Yb12_out;
+
+      /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+      pSrc[2U * i3] = Xd12_out;
+
+      /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+      pSrc[(2U * i3) + 1U] = Yd12_out;
+
+      /*  Twiddle coefficients index modifier */
+      ia1 += twidCoefModifier;
+
+      /*  Updating input index */
+      i0++;
+
+   }
+   while (--j);
+
+   twidCoefModifier <<= 2U;
+
+   /*  Calculation of second stage to excluding last stage */
+   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[(ia1 * 2U)];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[(ia2 * 2U)];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[(ia3 * 2U)];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 += twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            xaIn = pSrc[(2U * i0)];
+            yaIn = pSrc[(2U * i0) + 1U];
+
+            xbIn = pSrc[(2U * i1)];
+            ybIn = pSrc[(2U * i1) + 1U];
+
+            xcIn = pSrc[(2U * i2)];
+            ycIn = pSrc[(2U * i2) + 1U];
+
+            xdIn = pSrc[(2U * i3)];
+            ydIn = pSrc[(2U * i3) + 1U];
+
+            /* xa - xc */
+            Xaminusc = xaIn - xcIn;
+            /* (xb - xd) */
+            Xbminusd = xbIn - xdIn;
+            /* ya - yc */
+            Yaminusc = yaIn - ycIn;
+            /* (yb - yd) */
+            Ybminusd = ybIn - ydIn;
+
+            /* xa + xc */
+            Xaplusc = xaIn + xcIn;
+            /* xb + xd */
+            Xbplusd = xbIn + xdIn;
+            /* ya + yc */
+            Yaplusc = yaIn + ycIn;
+            /* yb + yd */
+            Ybplusd = ybIn + ydIn;
+
+            /* (xa - xc) + (yb - yd) */
+            Xb12C_out = (Xaminusc + Ybminusd);
+            /* (ya - yc) -  (xb - xd) */
+            Yb12C_out = (Yaminusc - Xbminusd);
+            /* xa + xc -(xb + xd) */
+            Xc12C_out = (Xaplusc - Xbplusd);
+            /* (ya + yc) - (yb + yd) */
+            Yc12C_out = (Yaplusc - Ybplusd);
+            /* (xa - xc) - (yb - yd) */
+            Xd12C_out = (Xaminusc - Ybminusd);
+            /* (ya - yc) +  (xb - xd) */
+            Yd12C_out = (Xbminusd + Yaminusc);
+
+            pSrc[(2U * i0)] = Xaplusc + Xbplusd;
+            pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
+
+            Xb12_out = Xb12C_out * co1;
+            Yb12_out = Yb12C_out * co1;
+            Xc12_out = Xc12C_out * co2;
+            Yc12_out = Yc12C_out * co2;
+            Xd12_out = Xd12C_out * co3;
+            Yd12_out = Yd12C_out * co3;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            //Xb12_out -= Yb12C_out * si1;
+            p0 = Yb12C_out * si1;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            //Yb12_out += Xb12C_out * si1;
+            p1 = Xb12C_out * si1;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            //Xc12_out -= Yc12C_out * si2;
+            p2 = Yc12C_out * si2;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            //Yc12_out += Xc12C_out * si2;
+            p3 = Xc12C_out * si2;
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            //Xd12_out -= Yd12C_out * si3;
+            p4 = Yd12C_out * si3;
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            //Yd12_out += Xd12C_out * si3;
+            p5 = Xd12C_out * si3;
+
+            Xb12_out += p0;
+            Yb12_out -= p1;
+            Xc12_out += p2;
+            Yc12_out -= p3;
+            Xd12_out += p4;
+            Yd12_out -= p5;
+
+            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = Xc12_out;
+
+            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = Yc12_out;
+
+            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = Xb12_out;
+
+            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = Yb12_out;
+
+            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = Xd12_out;
+
+            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = Yd12_out;
+
+            i0 += n1;
+         } while (i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+
+   j = fftLen >> 2;
+   ptr1 = &pSrc[0];
+
+   /*  Calculations of last stage */
+   do
+   {
+      xaIn = ptr1[0];
+      yaIn = ptr1[1];
+      xbIn = ptr1[2];
+      ybIn = ptr1[3];
+      xcIn = ptr1[4];
+      ycIn = ptr1[5];
+      xdIn = ptr1[6];
+      ydIn = ptr1[7];
+
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
+
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
+
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
+
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
+
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
+
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
+
+      /* (xb-xd) */
+      Xbminusd = xbIn - xdIn;
+
+      /* (yb-yd) */
+      Ybminusd = ybIn - ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      a0 = (Xaplusc + Xbplusd);
+      /* ya' = ya + yb + yc + yd */
+      a1 = (Yaplusc + Ybplusd);
+      /* xc' = (xa-xb+xc-xd) */
+      a2 = (Xaplusc - Xbplusd);
+      /* yc' = (ya-yb+yc-yd) */
+      a3 = (Yaplusc - Ybplusd);
+      /* xb' = (xa+yb-xc-yd) */
+      a4 = (Xaminusc + Ybminusd);
+      /* yb' = (ya-xb-yc+xd) */
+      a5 = (Yaminusc - Xbminusd);
+      /* xd' = (xa-yb-xc+yd)) */
+      a6 = (Xaminusc - Ybminusd);
+      /* yd' = (ya+xb-yc-xd) */
+      a7 = (Xbminusd + Yaminusc);
+
+      ptr1[0] = a0;
+      ptr1[1] = a1;
+      ptr1[2] = a2;
+      ptr1[3] = a3;
+      ptr1[4] = a4;
+      ptr1[5] = a5;
+      ptr1[6] = a6;
+      ptr1[7] = a7;
+
+      /* increment pointer by 8 */
+      ptr1 += 8U;
+   } while (--j);
+
+#else
+
+        float32_t t1, t2, r1, r2, s1, s2;
+
+   /* Initializations for the fft calculation */
+   n2 = fftLen;
+   n1 = n2;
+   for (k = fftLen; k > 1U; k >>= 2U)
+   {
+      /*  Initializations for the fft calculation */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  FFT Calculation */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            /* xa + xc */
+            r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];
+
+            /* xa - xc */
+            r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];
+
+            /* ya + yc */
+            s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+
+            /* ya - yc */
+            s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+            /* xb + xd */
+            t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+            /* xa' = xa + xb + xc + xd */
+            pSrc[2U * i0] = r1 + t1;
+
+            /* xa + xc -(xb + xd) */
+            r1 = r1 - t1;
+
+            /* yb + yd */
+            t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+
+            /* ya' = ya + yb + yc + yd */
+            pSrc[(2U * i0) + 1U] = s1 + t2;
+
+            /* (ya + yc) - (yb + yd) */
+            s1 = s1 - t2;
+
+            /* (yb - yd) */
+            t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+
+            /* (xb - xd) */
+            t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+            /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = (r1 * co2) + (s1 * si2);
+
+            /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = (s1 * co2) - (r1 * si2);
+
+            /* (xa - xc) + (yb - yd) */
+            r1 = r2 + t1;
+
+            /* (xa - xc) - (yb - yd) */
+            r2 = r2 - t1;
+
+            /* (ya - yc) -  (xb - xd) */
+            s1 = s2 - t2;
+
+            /* (ya - yc) +  (xb - xd) */
+            s2 = s2 + t2;
+
+            /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = (r1 * co1) + (s1 * si1);
+
+            /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = (s1 * co1) - (r1 * si1);
+
+            /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = (r2 * co3) + (s2 * si3);
+
+            /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = (s2 * co3) - (r2 * si3);
+
+            i0 += n1;
+         } while ( i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+}
+
+/**
+  brief         Core function for the floating-point CIFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type
+  param[in]     fftLen           length of the FFT
+  param[in]     pCoef            points to twiddle coefficient buffer
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  param[in]     onebyfftLen      value of 1/fftLen
+  return        none
+ */
+
+void arm_radix4_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen)
+{
+        float32_t co1, co2, co3, si1, si2, si3;
+        uint32_t ia1, ia2, ia3;
+        uint32_t i0, i1, i2, i3;
+        uint32_t n1, n2, j, k;
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+        float32_t xaIn, yaIn, xbIn, ybIn, xcIn, ycIn, xdIn, ydIn;
+        float32_t Xaplusc, Xbplusd, Yaplusc, Ybplusd, Xaminusc, Xbminusd, Yaminusc,
+        Ybminusd;
+        float32_t Xb12C_out, Yb12C_out, Xc12C_out, Yc12C_out, Xd12C_out, Yd12C_out;
+        float32_t Xb12_out, Yb12_out, Xc12_out, Yc12_out, Xd12_out, Yd12_out;
+        float32_t *ptr1;
+        float32_t p0,p1,p2,p3,p4,p5,p6,p7;
+        float32_t a0,a1,a2,a3,a4,a5,a6,a7;
+
+
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
+
+   /* n2 = fftLen/4 */
+   n2 >>= 2U;
+   i0 = 0U;
+   ia1 = 0U;
+
+   j = n2;
+
+   /*  Calculation of first stage */
+   do
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
+
+      /*  Butterfly implementation */
+      xaIn = pSrc[(2U * i0)];
+      yaIn = pSrc[(2U * i0) + 1U];
+
+      xcIn = pSrc[(2U * i2)];
+      ycIn = pSrc[(2U * i2) + 1U];
+
+      xbIn = pSrc[(2U * i1)];
+      ybIn = pSrc[(2U * i1) + 1U];
+
+      xdIn = pSrc[(2U * i3)];
+      ydIn = pSrc[(2U * i3) + 1U];
+
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
+
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      co2 = pCoef[ia2 * 2U];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
+      /* xb - xd */
+      Xbminusd = xbIn - xdIn;
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
+      /* yb - yd */
+      Ybminusd = ybIn - ydIn;
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[(2U * i0)] = Xaplusc + Xbplusd;
+
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
+
+      /* (xa - xc) - (yb - yd) */
+      Xb12C_out = (Xaminusc - Ybminusd);
+      /* (ya - yc) + (xb - xd) */
+      Yb12C_out = (Yaminusc + Xbminusd);
+      /* (xa + xc) - (xb + xd) */
+      Xc12C_out = (Xaplusc - Xbplusd);
+      /* (ya + yc) - (yb + yd) */
+      Yc12C_out = (Yaplusc - Ybplusd);
+      /* (xa - xc) + (yb - yd) */
+      Xd12C_out = (Xaminusc + Ybminusd);
+      /* (ya - yc) - (xb - xd) */
+      Yd12C_out = (Yaminusc - Xbminusd);
+
+      co1 = pCoef[ia1 * 2U];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+
+      /*  index calculation for the coefficients */
+      ia3 = ia2 + ia1;
+      co3 = pCoef[ia3 * 2U];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+
+      Xb12_out = Xb12C_out * co1;
+      Yb12_out = Yb12C_out * co1;
+      Xc12_out = Xc12C_out * co2;
+      Yc12_out = Yc12C_out * co2;
+      Xd12_out = Xd12C_out * co3;
+      Yd12_out = Yd12C_out * co3;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      //Xb12_out -= Yb12C_out * si1;
+      p0 = Yb12C_out * si1;
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      //Yb12_out += Xb12C_out * si1;
+      p1 = Xb12C_out * si1;
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      //Xc12_out -= Yc12C_out * si2;
+      p2 = Yc12C_out * si2;
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      //Yc12_out += Xc12C_out * si2;
+      p3 = Xc12C_out * si2;
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      //Xd12_out -= Yd12C_out * si3;
+      p4 = Yd12C_out * si3;
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      //Yd12_out += Xd12C_out * si3;
+      p5 = Xd12C_out * si3;
+
+      Xb12_out -= p0;
+      Yb12_out += p1;
+      Xc12_out -= p2;
+      Yc12_out += p3;
+      Xd12_out -= p4;
+      Yd12_out += p5;
+
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      pSrc[2U * i1] = Xc12_out;
+
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      pSrc[(2U * i1) + 1U] = Yc12_out;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      pSrc[2U * i2] = Xb12_out;
+
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      pSrc[(2U * i2) + 1U] = Yb12_out;
+
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      pSrc[2U * i3] = Xd12_out;
+
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      pSrc[(2U * i3) + 1U] = Yd12_out;
+
+      /*  Twiddle coefficients index modifier */
+      ia1 = ia1 + twidCoefModifier;
+
+      /*  Updating input index */
+      i0 = i0 + 1U;
+
+   } while (--j);
+
+   twidCoefModifier <<= 2U;
+
+   /*  Calculation of second stage to excluding last stage */
+   for (k = fftLen >> 2U; k > 4U; k >>= 2U)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            xaIn = pSrc[(2U * i0)];
+            yaIn = pSrc[(2U * i0) + 1U];
+
+            xbIn = pSrc[(2U * i1)];
+            ybIn = pSrc[(2U * i1) + 1U];
+
+            xcIn = pSrc[(2U * i2)];
+            ycIn = pSrc[(2U * i2) + 1U];
+
+            xdIn = pSrc[(2U * i3)];
+            ydIn = pSrc[(2U * i3) + 1U];
+
+            /* xa - xc */
+            Xaminusc = xaIn - xcIn;
+            /* (xb - xd) */
+            Xbminusd = xbIn - xdIn;
+            /* ya - yc */
+            Yaminusc = yaIn - ycIn;
+            /* (yb - yd) */
+            Ybminusd = ybIn - ydIn;
+
+            /* xa + xc */
+            Xaplusc = xaIn + xcIn;
+            /* xb + xd */
+            Xbplusd = xbIn + xdIn;
+            /* ya + yc */
+            Yaplusc = yaIn + ycIn;
+            /* yb + yd */
+            Ybplusd = ybIn + ydIn;
+
+            /* (xa - xc) - (yb - yd) */
+            Xb12C_out = (Xaminusc - Ybminusd);
+            /* (ya - yc) +  (xb - xd) */
+            Yb12C_out = (Yaminusc + Xbminusd);
+            /* xa + xc -(xb + xd) */
+            Xc12C_out = (Xaplusc - Xbplusd);
+            /* (ya + yc) - (yb + yd) */
+            Yc12C_out = (Yaplusc - Ybplusd);
+            /* (xa - xc) + (yb - yd) */
+            Xd12C_out = (Xaminusc + Ybminusd);
+            /* (ya - yc) -  (xb - xd) */
+            Yd12C_out = (Yaminusc - Xbminusd);
+
+            pSrc[(2U * i0)] = Xaplusc + Xbplusd;
+            pSrc[(2U * i0) + 1U] = Yaplusc + Ybplusd;
+
+            Xb12_out = Xb12C_out * co1;
+            Yb12_out = Yb12C_out * co1;
+            Xc12_out = Xc12C_out * co2;
+            Yc12_out = Yc12C_out * co2;
+            Xd12_out = Xd12C_out * co3;
+            Yd12_out = Yd12C_out * co3;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            //Xb12_out -= Yb12C_out * si1;
+            p0 = Yb12C_out * si1;
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            //Yb12_out += Xb12C_out * si1;
+            p1 = Xb12C_out * si1;
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            //Xc12_out -= Yc12C_out * si2;
+            p2 = Yc12C_out * si2;
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            //Yc12_out += Xc12C_out * si2;
+            p3 = Xc12C_out * si2;
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            //Xd12_out -= Yd12C_out * si3;
+            p4 = Yd12C_out * si3;
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            //Yd12_out += Xd12C_out * si3;
+            p5 = Xd12C_out * si3;
+
+            Xb12_out -= p0;
+            Yb12_out += p1;
+            Xc12_out -= p2;
+            Yc12_out += p3;
+            Xd12_out -= p4;
+            Yd12_out += p5;
+
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = Xc12_out;
+
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = Yc12_out;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = Xb12_out;
+
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = Yb12_out;
+
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = Xd12_out;
+
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = Yd12_out;
+
+            i0 += n1;
+         } while (i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+   /*  Initializations of last stage */
+
+   j = fftLen >> 2;
+   ptr1 = &pSrc[0];
+
+   /*  Calculations of last stage */
+   do
+   {
+      xaIn = ptr1[0];
+      yaIn = ptr1[1];
+      xbIn = ptr1[2];
+      ybIn = ptr1[3];
+      xcIn = ptr1[4];
+      ycIn = ptr1[5];
+      xdIn = ptr1[6];
+      ydIn = ptr1[7];
+
+      /*  Butterfly implementation */
+      /* xa + xc */
+      Xaplusc = xaIn + xcIn;
+
+      /* xa - xc */
+      Xaminusc = xaIn - xcIn;
+
+      /* ya + yc */
+      Yaplusc = yaIn + ycIn;
+
+      /* ya - yc */
+      Yaminusc = yaIn - ycIn;
+
+      /* xb + xd */
+      Xbplusd = xbIn + xdIn;
+
+      /* yb + yd */
+      Ybplusd = ybIn + ydIn;
+
+      /* (xb-xd) */
+      Xbminusd = xbIn - xdIn;
+
+      /* (yb-yd) */
+      Ybminusd = ybIn - ydIn;
+
+      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
+      a0 = (Xaplusc + Xbplusd);
+      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
+      a1 = (Yaplusc + Ybplusd);
+      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
+      a2 = (Xaplusc - Xbplusd);
+      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
+      a3 = (Yaplusc - Ybplusd);
+      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
+      a4 = (Xaminusc - Ybminusd);
+      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
+      a5 = (Yaminusc + Xbminusd);
+      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
+      a6 = (Xaminusc + Ybminusd);
+      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
+      a7 = (Yaminusc - Xbminusd);
+
+      p0 = a0 * onebyfftLen;
+      p1 = a1 * onebyfftLen;
+      p2 = a2 * onebyfftLen;
+      p3 = a3 * onebyfftLen;
+      p4 = a4 * onebyfftLen;
+      p5 = a5 * onebyfftLen;
+      p6 = a6 * onebyfftLen;
+      p7 = a7 * onebyfftLen;
+
+      /* xa' = (xa+xb+xc+xd) * onebyfftLen */
+      ptr1[0] = p0;
+      /* ya' = (ya+yb+yc+yd) * onebyfftLen */
+      ptr1[1] = p1;
+      /* xc' = (xa-xb+xc-xd) * onebyfftLen */
+      ptr1[2] = p2;
+      /* yc' = (ya-yb+yc-yd) * onebyfftLen  */
+      ptr1[3] = p3;
+      /* xb' = (xa-yb-xc+yd) * onebyfftLen */
+      ptr1[4] = p4;
+      /* yb' = (ya+xb-yc-xd) * onebyfftLen */
+      ptr1[5] = p5;
+      /* xd' = (xa-yb-xc+yd) * onebyfftLen */
+      ptr1[6] = p6;
+      /* yd' = (ya-xb-yc+xd) * onebyfftLen */
+      ptr1[7] = p7;
+
+      /* increment source pointer by 8 for next calculations */
+      ptr1 = ptr1 + 8U;
+
+   } while (--j);
+
+#else
+
+        float32_t t1, t2, r1, r2, s1, s2;
+
+   /*  Initializations for the first stage */
+   n2 = fftLen;
+   n1 = n2;
+
+   /*  Calculation of first stage */
+   for (k = fftLen; k > 4U; k >>= 2U)
+   {
+      /*  Initializations for the first stage */
+      n1 = n2;
+      n2 >>= 2U;
+      ia1 = 0U;
+
+      /*  Calculation of first stage */
+      j = 0;
+      do
+      {
+         /*  index calculation for the coefficients */
+         ia2 = ia1 + ia1;
+         ia3 = ia2 + ia1;
+         co1 = pCoef[ia1 * 2U];
+         si1 = pCoef[(ia1 * 2U) + 1U];
+         co2 = pCoef[ia2 * 2U];
+         si2 = pCoef[(ia2 * 2U) + 1U];
+         co3 = pCoef[ia3 * 2U];
+         si3 = pCoef[(ia3 * 2U) + 1U];
+
+         /*  Twiddle coefficients index modifier */
+         ia1 = ia1 + twidCoefModifier;
+
+         i0 = j;
+         do
+         {
+            /*  index calculation for the input as, */
+            /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+            i1 = i0 + n2;
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+
+            /* xa + xc */
+            r1 = pSrc[(2U * i0)] + pSrc[(2U * i2)];
+
+            /* xa - xc */
+            r2 = pSrc[(2U * i0)] - pSrc[(2U * i2)];
+
+            /* ya + yc */
+            s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+
+            /* ya - yc */
+            s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+            /* xb + xd */
+            t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+            /* xa' = xa + xb + xc + xd */
+            pSrc[2U * i0] = r1 + t1;
+
+            /* xa + xc -(xb + xd) */
+            r1 = r1 - t1;
+
+            /* yb + yd */
+            t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+
+            /* ya' = ya + yb + yc + yd */
+            pSrc[(2U * i0) + 1U] = s1 + t2;
+
+            /* (ya + yc) - (yb + yd) */
+            s1 = s1 - t2;
+
+            /* (yb - yd) */
+            t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+
+            /* (xb - xd) */
+            t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+            /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+            pSrc[2U * i1] = (r1 * co2) - (s1 * si2);
+
+            /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+            pSrc[(2U * i1) + 1U] = (s1 * co2) + (r1 * si2);
+
+            /* (xa - xc) - (yb - yd) */
+            r1 = r2 - t1;
+
+            /* (xa - xc) + (yb - yd) */
+            r2 = r2 + t1;
+
+            /* (ya - yc) +  (xb - xd) */
+            s1 = s2 + t2;
+
+            /* (ya - yc) -  (xb - xd) */
+            s2 = s2 - t2;
+
+            /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+            pSrc[2U * i2] = (r1 * co1) - (s1 * si1);
+
+            /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+            pSrc[(2U * i2) + 1U] = (s1 * co1) + (r1 * si1);
+
+            /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+            pSrc[2U * i3] = (r2 * co3) - (s2 * si3);
+
+            /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+            pSrc[(2U * i3) + 1U] = (s2 * co3) + (r2 * si3);
+
+            i0 += n1;
+         } while ( i0 < fftLen);
+         j++;
+      } while (j <= (n2 - 1U));
+      twidCoefModifier <<= 2U;
+   }
+   /*  Initializations of last stage */
+   n1 = n2;
+   n2 >>= 2U;
+
+   /*  Calculations of last stage */
+   for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
+   {
+      /*  index calculation for the input as, */
+      /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2], pSrc[i0 + 3fftLen/4] */
+      i1 = i0 + n2;
+      i2 = i1 + n2;
+      i3 = i2 + n2;
+
+      /*  Butterfly implementation */
+      /* xa + xc */
+      r1 = pSrc[2U * i0] + pSrc[2U * i2];
+
+      /* xa - xc */
+      r2 = pSrc[2U * i0] - pSrc[2U * i2];
+
+      /* ya + yc */
+      s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+
+      /* ya - yc */
+      s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+      /* xc + xd */
+      t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+      /* xa' = xa + xb + xc + xd */
+      pSrc[2U * i0] = (r1 + t1) * onebyfftLen;
+
+      /* (xa + xb) - (xc + xd) */
+      r1 = r1 - t1;
+
+      /* yb + yd */
+      t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+
+      /* ya' = ya + yb + yc + yd */
+      pSrc[(2U * i0) + 1U] = (s1 + t2) * onebyfftLen;
+
+      /* (ya + yc) - (yb + yd) */
+      s1 = s1 - t2;
+
+      /* (yb-yd) */
+      t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+
+      /* (xb-xd) */
+      t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+      /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+      pSrc[2U * i1] = r1 * onebyfftLen;
+
+      /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+      pSrc[(2U * i1) + 1U] = s1 * onebyfftLen;
+
+      /* (xa - xc) - (yb-yd) */
+      r1 = r2 - t1;
+
+      /* (xa - xc) + (yb-yd) */
+      r2 = r2 + t1;
+
+      /* (ya - yc) + (xb-xd) */
+      s1 = s2 + t2;
+
+      /* (ya - yc) - (xb-xd) */
+      s2 = s2 - t2;
+
+      /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+      pSrc[2U * i2] = r1 * onebyfftLen;
+
+      /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+      pSrc[(2U * i2) + 1U] = s1 * onebyfftLen;
+
+      /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+      pSrc[2U * i3] = r2 * onebyfftLen;
+
+      /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+      pSrc[(2U * i3) + 1U] = s2 * onebyfftLen;
+   }
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+}
+
+
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f16.c
new file mode 100755
index 00000000..cb45cd80
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f16.c
@@ -0,0 +1,171 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_init_f16.c
+ * Description:  Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+#include "arm_common_tables.h"
+#include "arm_common_tables_f16.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superceded by \ref arm_cfft_f16 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+arm_status arm_cfft_radix4_init_f16(
+  arm_cfft_radix4_instance_f16 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+    /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F16_4096)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (float16_t *) twiddleCoefF16;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.000244140625;
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.0009765625f;
+    break;
+
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    S->onebyfftLen = 0.00390625f;
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    S->onebyfftLen = 0.015625f;
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    S->onebyfftLen = 0.0625f;
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+#endif
+#endif
+#endif
+  return (status);
+}
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
index 539206de..b3aabbb2 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_f32.c
@@ -1,156 +1,168 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix4_init_f32.c
- * Description:  Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be removed in the future.
-  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
-  @param[in]     fftLen         length of the FFT
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-  @par
-                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
- */
-
-arm_status arm_cfft_radix4_init_f32(
-  arm_cfft_radix4_instance_f32 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (float32_t *) twiddleCoef;
-
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-
-  case 4096U:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.000244140625;
-    break;
-
-  case 1024U:
-    /*  Initializations of structure parameters for 1024 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    /*  Initialise the 1/fftLen Value */
-    S->onebyfftLen = 0.0009765625f;
-    break;
-
-
-  case 256U:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16U;
-    S->bitRevFactor = 16U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    S->onebyfftLen = 0.00390625f;
-    break;
-
-  case 64U:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64U;
-    S->bitRevFactor = 64U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    S->onebyfftLen = 0.015625f;
-    break;
-
-  case 16U:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256U;
-    S->bitRevFactor = 256U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    S->onebyfftLen = 0.0625f;
-    break;
-
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of ComplexFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_init_f32.c
+ * Description:  Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superceded by \ref arm_cfft_f32 and will be removed in the future.
+  @param[in,out] S              points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_cfft_radix4_init_f32(
+  arm_cfft_radix4_instance_f32 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+   /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (float32_t *) twiddleCoef;
+
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.000244140625;
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    /*  Initialise the 1/fftLen Value */
+    S->onebyfftLen = 0.0009765625f;
+    break;
+
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    S->onebyfftLen = 0.00390625f;
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    S->onebyfftLen = 0.015625f;
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    S->onebyfftLen = 0.0625f;
+    break;
+
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+#endif
+#endif
+#endif
+  
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
index 1d830096..77742439 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q15.c
@@ -1,145 +1,157 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix4_init_q15.c
- * Description:  Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-
-/**
-  @brief Initialization function for the Q15 CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
-  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure
-  @param[in]     fftLen         length of the FFT
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-  @par
-                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
- */
-
-arm_status arm_cfft_radix4_init_q15(
-  arm_cfft_radix4_instance_q15 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLen)
-  {
-  case 4096U:
-    /*  Initializations of structure parameters for 4096 point FFT */
-
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-
-    break;
-
-  case 1024U:
-    /*  Initializations of structure parameters for 1024 point FFT */
-    S->twidCoefModifier = 4U;
-    S->bitRevFactor = 4U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-
-    break;
-
-  case 256U:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16U;
-    S->bitRevFactor = 16U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-
-    break;
-
-  case 64U:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64U;
-    S->bitRevFactor = 64U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-
-    break;
-
-  case 16U:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256U;
-    S->bitRevFactor = 256U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of ComplexFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_init_q15.c
+ * Description:  Radix-4 Decimation in Frequency Q15 FFT & IFFT initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+
+/**
+  @brief Initialization function for the Q15 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q15 CFFT/CIFFT structure
+  @param[in]     fftLen         length of the FFT
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_cfft_radix4_init_q15(
+  arm_cfft_radix4_instance_q15 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q15_t *) twiddleCoef_4096_q15;
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLen)
+  {
+  case 4096U:
+    /*  Initializations of structure parameters for 4096 point FFT */
+
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+
+    break;
+
+  case 1024U:
+    /*  Initializations of structure parameters for 1024 point FFT */
+    S->twidCoefModifier = 4U;
+    S->bitRevFactor = 4U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+
+    break;
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+#endif
+#endif 
+#endif
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
index 964b4c8a..04ba393a 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_init_q31.c
@@ -1,141 +1,154 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix4_init_q31.c
- * Description:  Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-
-  @brief         Initialization function for the Q31 CFFT/CIFFT.
-  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
-  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure.
-  @param[in]     fftLen         length of the FFT.
-  @param[in]     ifftFlag       flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
-  @par
-                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
-*/
-
-arm_status arm_cfft_radix4_init_q31(
-  arm_cfft_radix4_instance_q31 * S,
-  uint16_t fftLen,
-  uint8_t ifftFlag,
-  uint8_t bitReverseFlag)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-  /*  Initialise the FFT length */
-  S->fftLen = fftLen;
-  /*  Initialise the Twiddle coefficient pointer */
-  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
-  /*  Initialise the Flag for selection of CFFT or CIFFT */
-  S->ifftFlag = ifftFlag;
-  /*  Initialise the Flag for calculation Bit reversal or not */
-  S->bitReverseFlag = bitReverseFlag;
-
-  /*  Initializations of Instance structure depending on the FFT length */
-  switch (S->fftLen)
-  {
-    /*  Initializations of structure parameters for 4096 point FFT */
-  case 4096U:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 1U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 1U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) armBitRevTable;
-    break;
-
-    /*  Initializations of structure parameters for 1024 point FFT */
-  case 1024U:
-    /*  Initialise the twiddle coef modifier value */
-    S->twidCoefModifier = 4U;
-    /*  Initialise the bit reversal table modifier */
-    S->bitRevFactor = 4U;
-    /*  Initialise the bit reversal table pointer */
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
-    break;
-
-  case 256U:
-    /*  Initializations of structure parameters for 256 point FFT */
-    S->twidCoefModifier = 16U;
-    S->bitRevFactor = 16U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
-    break;
-
-  case 64U:
-    /*  Initializations of structure parameters for 64 point FFT */
-    S->twidCoefModifier = 64U;
-    S->bitRevFactor = 64U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
-    break;
-
-  case 16U:
-    /*  Initializations of structure parameters for 16 point FFT */
-    S->twidCoefModifier = 256U;
-    S->bitRevFactor = 256U;
-    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
-    break;
-
-  default:
-    /*  Reporting argument error if fftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  return (status);
-}
-
-/**
-  @} end of ComplexFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_init_q31.c
+ * Description:  Radix-4 Decimation in Frequency Q31 FFT & IFFT initialization function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+
+  @brief         Initialization function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function. It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in,out] S              points to an instance of the Q31 CFFT/CIFFT structure.
+  @param[in]     fftLen         length of the FFT.
+  @param[in]     ifftFlag       flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>ifftFlag</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlag for calculation of CIFFT otherwise  CFFT is calculated
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   The parameter <code>fftLen</code> Specifies length of CFFT/CIFFT process. Supported FFT Lengths are 16, 64, 256, 1024.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+*/
+
+arm_status arm_cfft_radix4_init_q31(
+  arm_cfft_radix4_instance_q31 * S,
+  uint16_t fftLen,
+  uint8_t ifftFlag,
+  uint8_t bitReverseFlag)
+{
+
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+  /*  Initialise the FFT length */
+  S->fftLen = fftLen;
+  /*  Initialise the Twiddle coefficient pointer */
+  S->pTwiddle = (q31_t *) twiddleCoef_4096_q31;
+  /*  Initialise the Flag for selection of CFFT or CIFFT */
+  S->ifftFlag = ifftFlag;
+  /*  Initialise the Flag for calculation Bit reversal or not */
+  S->bitReverseFlag = bitReverseFlag;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
+
+  /*  Initializations of Instance structure depending on the FFT length */
+  switch (S->fftLen)
+  {
+    /*  Initializations of structure parameters for 4096 point FFT */
+  case 4096U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 1U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 1U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) armBitRevTable;
+    break;
+
+    /*  Initializations of structure parameters for 1024 point FFT */
+  case 1024U:
+    /*  Initialise the twiddle coef modifier value */
+    S->twidCoefModifier = 4U;
+    /*  Initialise the bit reversal table modifier */
+    S->bitRevFactor = 4U;
+    /*  Initialise the bit reversal table pointer */
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[3];
+    break;
+
+  case 256U:
+    /*  Initializations of structure parameters for 256 point FFT */
+    S->twidCoefModifier = 16U;
+    S->bitRevFactor = 16U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[15];
+    break;
+
+  case 64U:
+    /*  Initializations of structure parameters for 64 point FFT */
+    S->twidCoefModifier = 64U;
+    S->bitRevFactor = 64U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[63];
+    break;
+
+  case 16U:
+    /*  Initializations of structure parameters for 16 point FFT */
+    S->twidCoefModifier = 256U;
+    S->bitRevFactor = 256U;
+    S->pBitRevTable = (uint16_t *) & armBitRevTable[255];
+    break;
+
+  default:
+    /*  Reporting argument error if fftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+#endif
+#endif
+#endif
+  return (status);
+}
+
+/**
+  @} end of ComplexFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
index 825a16b5..159f1a8b 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q15.c
@@ -1,1809 +1,1809 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix4_q15.c
- * Description:  This file has function definition of Radix-4 FFT & IFFT function and
- *               In-place bit reversal using bit reversal table
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-
-void arm_radix4_butterfly_q15(
-        q15_t * pSrc16,
-        uint32_t fftLen,
-  const q15_t * pCoef16,
-        uint32_t twidCoefModifier);
-
-void arm_radix4_butterfly_inverse_q15(
-        q15_t * pSrc16,
-        uint32_t fftLen,
-  const q15_t * pCoef16,
-        uint32_t twidCoefModifier);
-
-void arm_bitreversal_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-
-/**
-  @brief               Processing function for the Q15 CFFT/CIFFT.
-  @deprecated          Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
-  @param[in]     S     points to an instance of the Q15 CFFT/CIFFT structure.
-  @param[in,out] pSrc  points to the complex data buffer. Processing occurs in-place.
-  @return        none
- 
-  @par Input and output formats:
-                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-                 Hence the output format is different for different FFT sizes.
-                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
-  @par
-                 \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"
-                 \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"
- */
-
-void arm_cfft_radix4_q15(
-  const arm_cfft_radix4_instance_q15 * S,
-        q15_t * pSrc)
-{
-  if (S->ifftFlag == 1U)
-  {
-    /*  Complex IFFT radix-4  */
-    arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    /*  Complex FFT radix-4  */
-    arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
-  }
-
-  if (S->bitReverseFlag == 1U)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-/**
-  @} end of ComplexFFT group
- */
-
-/*
- * Radix-4 FFT algorithm used is :
- *
- * Input real and imaginary data:
- * x(n) = xa + j * ya
- * x(n+N/4 ) = xb + j * yb
- * x(n+N/2 ) = xc + j * yc
- * x(n+3N 4) = xd + j * yd
- *
- *
- * Output real and imaginary data:
- * x(4r) = xa'+ j * ya'
- * x(4r+1) = xb'+ j * yb'
- * x(4r+2) = xc'+ j * yc'
- * x(4r+3) = xd'+ j * yd'
- *
- *
- * Twiddle factors for radix-4 FFT:
- * Wn = co1 + j * (- si1)
- * W2n = co2 + j * (- si2)
- * W3n = co3 + j * (- si3)
- 
- * The real and imaginary output values for the radix-4 butterfly are
- * xa' = xa + xb + xc + xd
- * ya' = ya + yb + yc + yd
- * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
- * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
- * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
- * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
- * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
- * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
- *
- */
-
-/**
-  @brief         Core function for the Q15 CFFT butterfly process.
-  @param[in,out] pSrc16          points to the in-place buffer of Q15 data type
-  @param[in]     fftLen           length of the FFT
-  @param[in]     pCoef16         points to twiddle coefficient buffer
-  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  @return        none
- */
-
-void arm_radix4_butterfly_q15(
-        q15_t * pSrc16,
-        uint32_t fftLen,
-  const q15_t * pCoef16,
-        uint32_t twidCoefModifier)
-{
-
-#if defined (ARM_MATH_DSP)
-
-        q31_t R, S, T, U;
-        q31_t C1, C2, C3, out1, out2;
-        uint32_t n1, n2, ic, i0, j, k;
-
-        q15_t *ptr1;
-        q15_t *pSi0;
-        q15_t *pSi1;
-        q15_t *pSi2;
-        q15_t *pSi3;
-
-        q31_t xaya, xbyb, xcyc, xdyd;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-
-  /* Index for twiddle coefficient */
-  ic = 0U;
-
-  /* Index for input read and output write */
-  j = n2;
-
-  pSi0 = pSrc16;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /* Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T = read_q15x2 (pSi0);
-    T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
-    T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycles */
-/*
-    in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes 3 cycles
-     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
-*/
-
-    /* Read yc (real), xc(imag) input */
-    S = read_q15x2 (pSi2);
-    S = __SHADD16(S, 0);
-    S = __SHADD16(S, 0);
-
-    /* R = packed((ya + yc), (xa + xc) ) */
-    R = __QADD16(T, S);
-
-    /* S = packed((ya - yc), (xa - xc) ) */
-    S = __QSUB16(T, S);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T = read_q15x2 (pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* Read yd (real), xd(imag) input */
-    U = read_q15x2 (pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed((yb + yd), (xb + xd) ) */
-    T = __QADD16(T, U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    write_q15x2_ia (&pSi0, __SHADD16(R, T));
-
-    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
-    R = __QSUB16(R, T);
-
-    /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUAD(C2, R) >> 16U;
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = __SMUSDX(C2, R);
-#else
-    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUSDX(R, C2) >> 16U;
-    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out2 = __SMUAD(C2, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /*  Reading i0+fftLen/4 */
-    /* T = packed(yb, xb) */
-    T = read_q15x2 (pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-    /*  Butterfly calculations */
-    /* U = packed(yd, xd) */
-    U = read_q15x2 (pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed(yb-yd, xb-xd) */
-    T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QASX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QSAX(S, T);
-#else
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QSAX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QASX(S, T);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
-    /*  Butterfly process for the i0+fftLen/2 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUAD(C1, S) >> 16U;
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = __SMUSDX(C1, S);
-#else
-    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUSDX(S, C1) >> 16U;
-    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out2 = __SMUAD(C1, S);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* writing output(xb', yb') in little endian format */
-    write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
-
-    /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUAD(C3, R) >> 16U;
-    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = __SMUSDX(C3, R);
-#else
-    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUSDX(R, C3) >> 16U;
-    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out2 = __SMUAD(C3, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* writing output(xd', yd') in little endian format */
-    write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-  } while (--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2U;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ic = 0U;
-
-    for (j = 0U; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
-      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
-      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      pSi0 = pSrc16 + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T = read_q15x2 (pSi0);
-
-        /* Read yc (real), xc(imag) input */
-        S = read_q15x2 (pSi2);
-
-        /* R = packed( (ya + yc), (xa + xc)) */
-        R = __QADD16(T, S);
-
-        /* S = packed((ya - yc), (xa - xc)) */
-        S = __QSUB16(T, S);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T = read_q15x2 (pSi1);
-
-        /* Read yd (real), xd(imag) input */
-        U = read_q15x2 (pSi3);
-
-        /* T = packed( (yb + yd), (xb + xd)) */
-        T = __QADD16(T, U);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = __SHADD16(R, T);
-        out1 = __SHADD16(out1, 0);
-        write_q15x2 (pSi0, out1);
-        pSi0 += 2 * n1;
-
-        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
-        R = __SHSUB16(R, T);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUAD(C2, R) >> 16U;
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = __SMUSDX(C2, R);
-#else
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUSDX(R, C2) >> 16U;
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out2 = __SMUAD(C2, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T = read_q15x2 (pSi1);
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-        pSi1 += 2 * n1;
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U = read_q15x2 (pSi3);
-
-        /* T = packed(yb-yd, xb-xd) */
-        T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHASX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHSAX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUAD(C1, S) >> 16U;
-        out2 = __SMUSDX(C1, S);
-#else
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHSAX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHASX(S, T);
-
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSDX(S, C1) >> 16U;
-        out2 = __SMUAD(C1, S);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-        pSi2 += 2 * n1;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        out1 = __SMUAD(C3, R) >> 16U;
-        out2 = __SMUSDX(C3, R);
-#else
-        out1 = __SMUSDX(R, C3) >> 16U;
-        out2 = __SMUAD(C3, R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-        pSi3 += 2 * n1;
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2U;
-  }
-  /* end of middle stage process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-
-  ptr1 = &pSrc16[0];
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xaya = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* Read xd (real), yd(imag) input */
-    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* R = packed((ya + yc), (xa + xc)) */
-    R = __QADD16(xaya, xcyc);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8U;
-
-
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    write_q15x2_ia (&ptr1, __SHADD16(R, T));
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
-
-    /* S = packed((ya - yc), (xa - xc)) */
-    S = __QSUB16(xaya, xcyc);
-
-    /* Read yd (real), xd(imag) input */
-    /* T = packed( (yb - yd), (xb - xd))  */
-    U = __QSUB16(xbyb, xdyd);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    write_q15x2_ia (&ptr1, __SHSAX(S, U));
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    write_q15x2_ia (&ptr1, __SHASX(S, U));
-#else
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    write_q15x2_ia (&ptr1, __SHASX(S, U));
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    write_q15x2_ia (&ptr1, __SHSAX(S, U));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-  } while (--j);
-
-  /* end of last stage process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-
-#else /* #if defined (ARM_MATH_DSP) */
-
-        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-
-  /* Index for twiddle coefficient */
-  ic = 0U;
-
-  /* Index for input read and output write */
-  i0 = 0U;
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2U] >> 2U;
-    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2U] >> 2U;
-    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;
-
-    /* R0 = (ya + yc) */
-    R0 = __SSAT(T0 + S0, 16U);
-    /* R1 = (xa + xc) */
-    R1 = __SSAT(T1 + S1, 16U);
-
-    /* S0 = (ya - yc) */
-    S0 = __SSAT(T0 - S0, 16);
-    /* S1 = (xa - xc) */
-    S1 = __SSAT(T1 - S1, 16);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2U] >> 2U;
-    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
-
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2U] >> 2U;
-    U1 = pSrc16[(i3 * 2U) + 1] >> 2U;
-
-    /* T0 = (yb + yd) */
-    T0 = __SSAT(T0 + U0, 16U);
-    /* T1 = (xb + xd) */
-    T1 = __SSAT(T1 + U1, 16U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* ya' = ya + yb + yc + yd */
-    /* xa' = xa + xb + xc + xd */
-    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
-    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
-
-    /* R0 = (ya + yc) - (yb + yd) */
-    /* R1 = (xa + xc) - (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16U);
-    R1 = __SSAT(R1 - T1, 16U);
-
-    /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2U * ic * 2U];
-    Si2 = pCoef16[(2U * ic * 2U) + 1];
-
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U);
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U);
-
-    /*  Reading i0+fftLen/4 */
-    /* input is down scale by 4 to avoid overflow */
-    /* T0 = yb, T1 =  xb */
-    T0 = pSrc16[i1 * 2U] >> 2;
-    T1 = pSrc16[(i1 * 2U) + 1] >> 2;
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2U] = out1;
-    pSrc16[(i1 * 2U) + 1] = out2;
-
-    /*  Butterfly calculations */
-    /* input is down scale by 4 to avoid overflow */
-    /* U0 = yd, U1 = xd */
-    U0 = pSrc16[i3 * 2U] >> 2;
-    U1 = pSrc16[(i3 * 2U) + 1] >> 2;
-    /* T0 = yb-yd */
-    T0 = __SSAT(T0 - U0, 16);
-    /* T1 = xb-xd */
-    T1 = __SSAT(T1 - U1, 16);
-
-    /* R1 = (ya-yc) + (xb- xd),  R0 = (xa-xc) - (yb-yd)) */
-    R0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16);
-    R1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
-
-    /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */
-    S0 = (q15_t) __SSAT(((q31_t) S0 + T1), 16U);
-    S1 = (q15_t) __SSAT(((q31_t) S1 - T0), 16U);
-
-    /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2U];
-    Si1 = pCoef16[(ic * 2U) + 1];
-    /*  Butterfly process for the i0+fftLen/2 sample */
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = (q15_t) ((Si1 * S1 + Co1 * S0) >> 16);
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16);
-
-    /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2U] = out1;
-    pSrc16[(i2 * 2U) + 1] = out2;
-
-    /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3U * (ic * 2U)];
-    Si3 = pCoef16[(3U * (ic * 2U)) + 1];
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-    /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U);
-    /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U);
-    /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2U] = out1;
-    pSrc16[(i3 * 2U) + 1] = out2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1U;
-
-  } while (--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2U;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ic = 0U;
-
-    for (j = 0U; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2U];
-      Si1 = pCoef16[(ic * 2U) + 1U];
-      Co2 = pCoef16[2U * (ic * 2U)];
-      Si2 = pCoef16[(2U * (ic * 2U)) + 1U];
-      Co3 = pCoef16[3U * (ic * 2U)];
-      Si3 = pCoef16[(3U * (ic * 2U)) + 1U];
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2U];
-        T1 = pSrc16[(i0 * 2U) + 1U];
-
-        /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2U];
-        S1 = pSrc16[(i2 * 2U) + 1U];
-
-        /* R0 = (ya + yc), R1 = (xa + xc) */
-        R0 = __SSAT(T0 + S0, 16);
-        R1 = __SSAT(T1 + S1, 16);
-
-        /* S0 = (ya - yc), S1 =(xa - xc) */
-        S0 = __SSAT(T0 - S0, 16);
-        S1 = __SSAT(T1 - S1, 16);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2U];
-        T1 = pSrc16[(i1 * 2U) + 1U];
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2U];
-        U1 = pSrc16[(i3 * 2U) + 1U];
-
-
-        /* T0 = (yb + yd), T1 = (xb + xd) */
-        T0 = __SSAT(T0 + U0, 16);
-        T1 = __SSAT(T1 + U1, 16);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;
-        out2 = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;
-
-        pSrc16[i0 * 2U] = out1;
-        pSrc16[(2U * i0) + 1U] = out2;
-
-        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1U) - (T0 >> 1U);
-        R1 = (R1 >> 1U) - (T1 >> 1U);
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U);
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U);
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2U];
-        T1 = pSrc16[(i1 * 2U) + 1U];
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2U] = out1;
-        pSrc16[(i1 * 2U) + 1U] = out2;
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2U];
-        U1 = pSrc16[(i3 * 2U) + 1U];
-
-        /* T0 = yb-yd, T1 = xb-xd */
-        T0 = __SSAT(T0 - U0, 16);
-        T1 = __SSAT(T1 - U1, 16);
-
-        /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */
-        R0 = (S0 >> 1U) - (T1 >> 1U);
-        R1 = (S1 >> 1U) + (T0 >> 1U);
-
-        /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */
-        S0 = (S0 >> 1U) + (T1 >> 1U);
-        S1 = (S1 >> 1U) - (T0 >> 1U);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (q15_t) ((Co1 * S0 + Si1 * S1) >> 16U);
-
-        out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16U);
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        pSrc16[i2 * 2U] = out1;
-        pSrc16[(i2 * 2U) + 1U] = out2;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U);
-
-        out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U);
-        /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
-        pSrc16[i3 * 2U] = out1;
-        pSrc16[(i3 * 2U) + 1U] = out2;
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2U;
-  }
-  /* end of middle stage process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  n1 = n2;
-  n2 >>= 2U;
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2U];
-    T1 = pSrc16[(i0 * 2U) + 1U];
-
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2U];
-    S1 = pSrc16[(i2 * 2U) + 1U];
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16U);
-    R1 = __SSAT(T1 + S1, 16U);
-
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16U);
-    S1 = __SSAT(T1 - S1, 16U);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2U];
-    T1 = pSrc16[(i1 * 2U) + 1U];
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2U];
-    U1 = pSrc16[(i3 * 2U) + 1U];
-
-    /* T0 = (yb + yd), T1 = (xb + xd)) */
-    T0 = __SSAT(T0 + U0, 16U);
-    T1 = __SSAT(T1 + U1, 16U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
-    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1U) - (T0 >> 1U);
-    R1 = (R1 >> 1U) - (T1 >> 1U);
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2U];
-    T1 = pSrc16[(i1 * 2U) + 1U];
-
-    /*  writing the butterfly processed i0 + fftLen/4 sample */
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2U] = R0;
-    pSrc16[(i1 * 2U) + 1U] = R1;
-
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2U];
-    U1 = pSrc16[(i3 * 2U) + 1U];
-    /* T0 = (yb - yd), T1 = (xb - xd)  */
-    T0 = __SSAT(T0 - U0, 16U);
-    T1 = __SSAT(T1 - U1, 16U);
-
-    /*  writing the butterfly processed i0 + fftLen/2 sample */
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    pSrc16[i2 * 2U] = (S0 >> 1U) + (T1 >> 1U);
-    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);
-
-    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    pSrc16[i3 * 2U] = (S0 >> 1U) - (T1 >> 1U);
-    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);
-
-  }
-
-  /* end of last stage process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
-
-
-/**
-  @brief         Core function for the Q15 CIFFT butterfly process.
-  @param[in,out] pSrc16           points to the in-place buffer of Q15 data type
-  @param[in]     fftLen           length of the FFT
-  @param[in]     pCoef16          points to twiddle coefficient buffer
-  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-  @return        none
- */
-
-/*
- * Radix-4 IFFT algorithm used is :
- *
- * CIFFT uses same twiddle coefficients as CFFT function
- *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
- *
- *
- * IFFT is implemented with following changes in equations from FFT
- *
- * Input real and imaginary data:
- * x(n) = xa + j * ya
- * x(n+N/4 ) = xb + j * yb
- * x(n+N/2 ) = xc + j * yc
- * x(n+3N 4) = xd + j * yd
- *
- *
- * Output real and imaginary data:
- * x(4r) = xa'+ j * ya'
- * x(4r+1) = xb'+ j * yb'
- * x(4r+2) = xc'+ j * yc'
- * x(4r+3) = xd'+ j * yd'
- *
- *
- * Twiddle factors for radix-4 IFFT:
- * Wn = co1 + j * (si1)
- * W2n = co2 + j * (si2)
- * W3n = co3 + j * (si3)
- 
- * The real and imaginary output values for the radix-4 butterfly are
- * xa' = xa + xb + xc + xd
- * ya' = ya + yb + yc + yd
- * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
- * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
- * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
- * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
- * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
- * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
- *
- */
-
-void arm_radix4_butterfly_inverse_q15(
-        q15_t * pSrc16,
-        uint32_t fftLen,
-  const q15_t * pCoef16,
-        uint32_t twidCoefModifier)
-{
-
-#if defined (ARM_MATH_DSP)
-
-        q31_t R, S, T, U;
-        q31_t C1, C2, C3, out1, out2;
-        uint32_t n1, n2, ic, i0, j, k;
-        
-        q15_t *ptr1;
-        q15_t *pSi0;
-        q15_t *pSi1;
-        q15_t *pSi2;
-        q15_t *pSi3;
-        
-        q31_t xaya, xbyb, xcyc, xdyd;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-
-  /* Index for twiddle coefficient */
-  ic = 0U;
-
-  /* Index for input read and output write */
-  j = n2;
-
-  pSi0 = pSrc16;
-  pSi1 = pSi0 + 2 * n2;
-  pSi2 = pSi1 + 2 * n2;
-  pSi3 = pSi2 + 2 * n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T = read_q15x2 (pSi0);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* Read yc (real), xc(imag) input */
-    S = read_q15x2 (pSi2);
-    S = __SHADD16(S, 0);
-    S = __SHADD16(S, 0);
-
-    /* R = packed((ya + yc), (xa + xc) ) */
-    R = __QADD16(T, S);
-
-    /* S = packed((ya - yc), (xa - xc) ) */
-    S = __QSUB16(T, S);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T = read_q15x2 (pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* Read yd (real), xd(imag) input */
-    U = read_q15x2 (pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed((yb + yd), (xb + xd) ) */
-    T = __QADD16(T, U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    write_q15x2_ia (&pSi0, __SHADD16(R, T));
-
-    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
-    R = __QSUB16(R, T);
-
-    /* co2 & si2 are read from SIMD Coefficient pointer */
-    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out1 = __SMUSD(C2, R) >> 16U;
-    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out2 = __SMUADX(C2, R);
-#else
-    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-    out1 = __SMUADX(C2, R) >> 16U;
-    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-    out2 = __SMUSD(__QSUB16(0, C2), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /*  Reading i0+fftLen/4 */
-    /* T = packed(yb, xb) */
-    T = read_q15x2 (pSi1);
-    T = __SHADD16(T, 0);
-    T = __SHADD16(T, 0);
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    write_q15x2_ia (&pSi1, (q31_t) ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-    /*  Butterfly calculations */
-    /* U = packed(yd, xd) */
-    U = read_q15x2 (pSi3);
-    U = __SHADD16(U, 0);
-    U = __SHADD16(U, 0);
-
-    /* T = packed(yb-yd, xb-xd) */
-    T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QSAX(S, T);
-    /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
-    S = __QASX(S, T);
-#else
-    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-    R = __QASX(S, T);
-    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-    S = __QSAX(S, T);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* co1 & si1 are read from SIMD Coefficient pointer */
-    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
-    /*  Butterfly process for the i0+fftLen/2 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out1 = __SMUSD(C1, S) >> 16U;
-    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out2 = __SMUADX(C1, S);
-#else
-    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-    out1 = __SMUADX(C1, S) >> 16U;
-    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-    out2 = __SMUSD(__QSUB16(0, C1), S);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* writing output(xb', yb') in little endian format */
-    write_q15x2_ia (&pSi2, ((out2) & 0xFFFF0000) | ((out1) & 0x0000FFFF));
-
-    /* co3 & si3 are read from SIMD Coefficient pointer */
-    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out1 = __SMUSD(C3, R) >> 16U;
-    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out2 = __SMUADX(C3, R);
-#else
-    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-    out1 = __SMUADX(C3, R) >> 16U;
-    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-    out2 = __SMUSD(__QSUB16(0, C3), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-    /* writing output(xd', yd') in little endian format */
-    write_q15x2_ia (&pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-  } while (--j);
-  /* data is in 4.11(q11) format */
-
-  /* end of first stage process */
-
-
-  /* start of middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2U;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ic = 0U;
-
-    for (j = 0U; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
-      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
-      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      pSi0 = pSrc16 + 2 * j;
-      pSi1 = pSi0 + 2 * n2;
-      pSi2 = pSi1 + 2 * n2;
-      pSi3 = pSi2 + 2 * n2;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T = read_q15x2 (pSi0);
-
-        /* Read yc (real), xc(imag) input */
-        S = read_q15x2 (pSi2);
-
-        /* R = packed( (ya + yc), (xa + xc)) */
-        R = __QADD16(T, S);
-
-        /* S = packed((ya - yc), (xa - xc)) */
-        S = __QSUB16(T, S);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T = read_q15x2 (pSi1);
-
-        /* Read yd (real), xd(imag) input */
-        U = read_q15x2 (pSi3);
-
-        /* T = packed( (yb + yd), (xb + xd)) */
-        T = __QADD16(T, U);
-
-        /*  writing the butterfly processed i0 sample */
-
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        out1 = __SHADD16(R, T);
-        out1 = __SHADD16(out1, 0);
-        write_q15x2 (pSi0, out1);
-        pSi0 += 2 * n1;
-
-        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
-        R = __SHSUB16(R, T);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out1 = __SMUSD(C2, R) >> 16U;
-
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out2 = __SMUADX(C2, R);
-#else
-        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        out1 = __SMUADX(R, C2) >> 16U;
-
-        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
-        out2 = __SMUSD(__QSUB16(0, C2), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T = read_q15x2 (pSi1);
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
-        write_q15x2 (pSi1, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-        pSi1 += 2 * n1;
-
-        /*  Butterfly calculations */
-
-        /* Read yd (real), xd(imag) input */
-        U = read_q15x2 (pSi3);
-
-        /* T = packed(yb-yd, xb-xd) */
-        T = __QSUB16(T, U);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHSAX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHASX(S, T);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUSD(C1, S) >> 16U;
-        out2 = __SMUADX(C1, S);
-#else
-        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
-        R = __SHASX(S, T);
-
-        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
-        S = __SHSAX(S, T);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = __SMUADX(S, C1) >> 16U;
-        out2 = __SMUSD(__QSUB16(0, C1), S);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
-        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
-        write_q15x2 (pSi2, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-        pSi2 += 2 * n1;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        out1 = __SMUSD(C3, R) >> 16U;
-        out2 = __SMUADX(C3, R);
-#else
-        out1 = __SMUADX(C3, R) >> 16U;
-        out2 = __SMUSD(__QSUB16(0, C3), R);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
-        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
-        write_q15x2 (pSi3, ((out2) & 0xFFFF0000) | (out1 & 0x0000FFFF));
-        pSi3 += 2 * n1;
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2U;
-  }
-  /* end of middle stage process */
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point */
-  /* data is in 6.10(q10) format for the 64 point */
-  /* data is in 4.12(q12) format for the 16 point */
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-
-  ptr1 = &pSrc16[0];
-
-  /* start of last stage process */
-
-  /*  Butterfly implementation */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xaya = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* Read xb (real), yb(imag) input */
-    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* Read xc (real), yc(imag) input */
-    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* Read xd (real), yd(imag) input */
-    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
-
-    /* R = packed((ya + yc), (xa + xc)) */
-    R = __QADD16(xaya, xcyc);
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8U;
-
-
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    write_q15x2_ia (&ptr1, __SHADD16(R, T));
-
-    /* T = packed((yb + yd), (xb + xd)) */
-    T = __QADD16(xbyb, xdyd);
-
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
-
-    /* S = packed((ya - yc), (xa - xc)) */
-    S = __QSUB16(xaya, xcyc);
-
-    /* Read yd (real), xd(imag) input */
-    /* T = packed( (yb - yd), (xb - xd))  */
-    U = __QSUB16(xbyb, xdyd);
-
-#ifndef ARM_MATH_BIG_ENDIAN
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    write_q15x2_ia (&ptr1, __SHASX(S, U));
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    write_q15x2_ia (&ptr1, __SHSAX(S, U));
-#else
-    /* xb' = (xa+yb-xc-yd) */
-    /* yb' = (ya-xb-yc+xd) */
-    write_q15x2_ia (&ptr1, __SHSAX(S, U));
-
-    /* xd' = (xa-yb-xc+yd) */
-    /* yd' = (ya+xb-yc-xd) */
-    write_q15x2_ia (&ptr1, __SHASX(S, U));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-  } while (--j);
-
-  /* end of last stage  process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-
-#else /* arm_radix4_butterfly_inverse_q15 */
-
-        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
-        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
-        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-
-  /* Index for twiddle coefficient */
-  ic = 0U;
-
-  /* Index for input read and output write */
-  i0 = 0U;
-
-  j = n2;
-
-  /* Input is in 1.15(q15) format */
-
-  /*  Start of first stage process */
-  do
-  {
-    /*  Butterfly implementation */
-
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2U] >> 2U;
-    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2U] >> 2U;
-    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16U);
-    R1 = __SSAT(T1 + S1, 16U);
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16U);
-    S1 = __SSAT(T1 - S1, 16U);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* input is down scale by 4 to avoid overflow */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2U] >> 2U;
-    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
-    /* Read yd (real), xd(imag) input */
-    /* input is down scale by 4 to avoid overflow */
-    U0 = pSrc16[i3 * 2U] >> 2U;
-    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;
-
-    /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16U);
-    T1 = __SSAT(T1 + U1, 16U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
-    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */
-    R0 = __SSAT(R0 - T0, 16U);
-    R1 = __SSAT(R1 - T1, 16U);
-    /* co2 & si2 are read from Coefficient pointer */
-    Co2 = pCoef16[2U * ic * 2U];
-    Si2 = pCoef16[(2U * ic * 2U) + 1U];
-    /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
-    out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16U);
-    /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-    out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16U);
-
-    /*  Reading i0+fftLen/4 */
-    /* input is down scale by 4 to avoid overflow */
-    /* T0 = yb, T1 = xb */
-    T0 = pSrc16[i1 * 2U] >> 2U;
-    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
-
-    /* writing the butterfly processed i0 + fftLen/4 sample */
-    /* writing output(xc', yc') in little endian format */
-    pSrc16[i1 * 2U] = out1;
-    pSrc16[(i1 * 2U) + 1U] = out2;
-
-    /*  Butterfly calculations */
-    /* input is down scale by 4 to avoid overflow */
-    /* U0 = yd, U1 = xd) */
-    U0 = pSrc16[i3 * 2U] >> 2U;
-    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;
-
-    /* T0 = yb-yd, T1 = xb-xd) */
-    T0 = __SSAT(T0 - U0, 16U);
-    T1 = __SSAT(T1 - U1, 16U);
-    /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
-    R0 = (q15_t) __SSAT((q31_t) (S0 + T1), 16);
-    R1 = (q15_t) __SSAT((q31_t) (S1 - T0), 16);
-    /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
-    S0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16);
-    S1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
-
-    /* co1 & si1 are read from Coefficient pointer */
-    Co1 = pCoef16[ic * 2U];
-    Si1 = pCoef16[(ic * 2U) + 1U];
-    /*  Butterfly process for the i0+fftLen/2 sample */
-    /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
-    out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U);
-    /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-    out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U);
-    /* writing output(xb', yb') in little endian format */
-    pSrc16[i2 * 2U] = out1;
-    pSrc16[(i2 * 2U) + 1U] = out2;
-
-    /* Co3 & si3 are read from Coefficient pointer */
-    Co3 = pCoef16[3U * ic * 2U];
-    Si3 = pCoef16[(3U * ic * 2U) + 1U];
-    /*  Butterfly process for the i0+3fftLen/4 sample */
-    /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
-    out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U);
-    /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-    out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U);
-    /* writing output(xd', yd') in little endian format */
-    pSrc16[i3 * 2U] = out1;
-    pSrc16[(i3 * 2U) + 1U] = out2;
-
-    /*  Twiddle coefficients index modifier */
-    ic = ic + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1U;
-
-  } while (--j);
-
-  /*  End of first stage process */
-
-  /* data is in 4.11(q11) format */
-
-
-  /*  Start of Middle stage process */
-
-  /*  Twiddle coefficients index modifier */
-  twidCoefModifier <<= 2U;
-
-  /*  Calculation of Middle stage */
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the middle stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ic = 0U;
-
-    for (j = 0U; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      Co1 = pCoef16[ic * 2U];
-      Si1 = pCoef16[(ic * 2U) + 1U];
-      Co2 = pCoef16[2U * ic * 2U];
-      Si2 = pCoef16[2U * ic * 2U + 1U];
-      Co3 = pCoef16[3U * ic * 2U];
-      Si3 = pCoef16[(3U * ic * 2U) + 1U];
-
-      /*  Twiddle coefficients index modifier */
-      ic = ic + twidCoefModifier;
-
-      /*  Butterfly implementation */
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Reading i0, i0+fftLen/2 inputs */
-        /* Read ya (real), xa(imag) input */
-        T0 = pSrc16[i0 * 2U];
-        T1 = pSrc16[(i0 * 2U) + 1U];
-
-        /* Read yc (real), xc(imag) input */
-        S0 = pSrc16[i2 * 2U];
-        S1 = pSrc16[(i2 * 2U) + 1U];
-
-
-        /* R0 = (ya + yc), R1 = (xa + xc) */
-        R0 = __SSAT(T0 + S0, 16U);
-        R1 = __SSAT(T1 + S1, 16U);
-        /* S0 = (ya - yc), S1 = (xa - xc) */
-        S0 = __SSAT(T0 - S0, 16U);
-        S1 = __SSAT(T1 - S1, 16U);
-
-        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2U];
-        T1 = pSrc16[(i1 * 2U) + 1U];
-
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2U];
-        U1 = pSrc16[(i3 * 2U) + 1U];
-
-        /* T0 = (yb + yd), T1 = (xb + xd) */
-        T0 = __SSAT(T0 + U0, 16U);
-        T1 = __SSAT(T1 + U1, 16U);
-
-        /*  writing the butterfly processed i0 sample */
-        /* xa' = xa + xb + xc + xd */
-        /* ya' = ya + yb + yc + yd */
-        pSrc16[i0 * 2U] = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;
-        pSrc16[(i0 * 2U) + 1U] = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;
-
-        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-        R0 = (R0 >> 1U) - (T0 >> 1U);
-        R1 = (R1 >> 1U) - (T1 >> 1U);
-
-        /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
-        out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16);
-        /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-        out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16);
-
-        /*  Reading i0+3fftLen/4 */
-        /* Read yb (real), xb(imag) input */
-        T0 = pSrc16[i1 * 2U];
-        T1 = pSrc16[(i1 * 2U) + 1U];
-
-        /*  writing the butterfly processed i0 + fftLen/4 sample */
-        /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
-        /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
-        pSrc16[i1 * 2U] = out1;
-        pSrc16[(i1 * 2U) + 1U] = out2;
-
-        /*  Butterfly calculations */
-        /* Read yd (real), xd(imag) input */
-        U0 = pSrc16[i3 * 2U];
-        U1 = pSrc16[(i3 * 2U) + 1U];
-
-        /* T0 = yb-yd, T1 = xb-xd) */
-        T0 = __SSAT(T0 - U0, 16U);
-        T1 = __SSAT(T1 - U1, 16U);
-
-        /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
-        R0 = (S0 >> 1U) + (T1 >> 1U);
-        R1 = (S1 >> 1U) - (T0 >> 1U);
-
-        /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
-        S0 = (S0 >> 1U) - (T1 >> 1U);
-        S1 = (S1 >> 1U) + (T0 >> 1U);
-
-        /*  Butterfly process for the i0+fftLen/2 sample */
-        out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U);
-        out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U);
-        /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
-        /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
-        pSrc16[i2 * 2U] = out1;
-        pSrc16[(i2 * 2U) + 1U] = out2;
-
-        /*  Butterfly process for the i0+3fftLen/4 sample */
-        out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U);
-
-        out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U);
-        /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
-        /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
-        pSrc16[i3 * 2U] = out1;
-        pSrc16[(i3 * 2U) + 1U] = out2;
-
-
-      }
-    }
-    /*  Twiddle coefficients index modifier */
-    twidCoefModifier <<= 2U;
-  }
-  /*  End of Middle stages process */
-
-
-  /* data is in 10.6(q6) format for the 1024 point */
-  /* data is in 8.8(q8) format for the 256 point   */
-  /* data is in 6.10(q10) format for the 64 point  */
-  /* data is in 4.12(q12) format for the 16 point  */
-
-  /* start of last stage process */
-
-
-  /*  Initializations for the last stage */
-  n1 = n2;
-  n2 >>= 2U;
-
-  /*  Butterfly implementation */
-  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Reading i0, i0+fftLen/2 inputs */
-    /* Read ya (real), xa(imag) input */
-    T0 = pSrc16[i0 * 2U];
-    T1 = pSrc16[(i0 * 2U) + 1U];
-    /* Read yc (real), xc(imag) input */
-    S0 = pSrc16[i2 * 2U];
-    S1 = pSrc16[(i2 * 2U) + 1U];
-
-    /* R0 = (ya + yc), R1 = (xa + xc) */
-    R0 = __SSAT(T0 + S0, 16U);
-    R1 = __SSAT(T1 + S1, 16U);
-    /* S0 = (ya - yc), S1 = (xa - xc) */
-    S0 = __SSAT(T0 - S0, 16U);
-    S1 = __SSAT(T1 - S1, 16U);
-
-    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2U];
-    T1 = pSrc16[(i1 * 2U) + 1U];
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2U];
-    U1 = pSrc16[(i3 * 2U) + 1U];
-
-    /* T0 = (yb + yd), T1 = (xb + xd) */
-    T0 = __SSAT(T0 + U0, 16U);
-    T1 = __SSAT(T1 + U1, 16U);
-
-    /*  writing the butterfly processed i0 sample */
-    /* xa' = xa + xb + xc + xd */
-    /* ya' = ya + yb + yc + yd */
-    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
-    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
-
-    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
-    R0 = (R0 >> 1U) - (T0 >> 1U);
-    R1 = (R1 >> 1U) - (T1 >> 1U);
-
-    /* Read yb (real), xb(imag) input */
-    T0 = pSrc16[i1 * 2U];
-    T1 = pSrc16[(i1 * 2U) + 1U];
-
-    /*  writing the butterfly processed i0 + fftLen/4 sample */
-    /* xc' = (xa-xb+xc-xd) */
-    /* yc' = (ya-yb+yc-yd) */
-    pSrc16[i1 * 2U] = R0;
-    pSrc16[(i1 * 2U) + 1U] = R1;
-
-    /* Read yd (real), xd(imag) input */
-    U0 = pSrc16[i3 * 2U];
-    U1 = pSrc16[(i3 * 2U) + 1U];
-    /* T0 = (yb - yd), T1 = (xb - xd) */
-    T0 = __SSAT(T0 - U0, 16U);
-    T1 = __SSAT(T1 - U1, 16U);
-
-    /*  writing the butterfly processed i0 + fftLen/2 sample */
-    /* xb' = (xa-yb-xc+yd) */
-    /* yb' = (ya+xb-yc-xd) */
-    pSrc16[i2 * 2U] = (S0 >> 1U) - (T1 >> 1U);
-    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);
-
-
-    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
-    /* xd' = (xa+yb-xc-yd) */
-    /* yd' = (ya-xb-yc+xd) */
-    pSrc16[i3 * 2U] = (S0 >> 1U) + (T1 >> 1U);
-    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);
-  }
-  /* end of last stage  process */
-
-  /* output is in 11.5(q5) format for the 1024 point */
-  /* output is in 9.7(q7) format for the 256 point   */
-  /* output is in 7.9(q9) format for the 64 point  */
-  /* output is in 5.11(q11) format for the 16 point  */
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_q15.c
+ * Description:  This file has function definition of Radix-4 FFT & IFFT function and
+ *               In-place bit reversal using bit reversal table
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+
+void arm_radix4_butterfly_q15(
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier);
+
+void arm_radix4_butterfly_inverse_q15(
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier);
+
+void arm_bitreversal_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+
+/**
+  @brief               Processing function for the Q15 CFFT/CIFFT.
+  @deprecated          Do not use this function.  It has been superseded by \ref arm_cfft_q15 and will be removed in the future.
+  @param[in]     S     points to an instance of the Q15 CFFT/CIFFT structure.
+  @param[in,out] pSrc  points to the complex data buffer. Processing occurs in-place.
+  @return        none
+ 
+  @par Input and output formats:
+                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                 Hence the output format is different for different FFT sizes.
+                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+  @par
+                 \image html CFFTQ15.gif "Input and Output Formats for Q15 CFFT"
+                 \image html CIFFTQ15.gif "Input and Output Formats for Q15 CIFFT"
+ */
+
+void arm_cfft_radix4_q15(
+  const arm_cfft_radix4_instance_q15 * S,
+        q15_t * pSrc)
+{
+  if (S->ifftFlag == 1U)
+  {
+    /*  Complex IFFT radix-4  */
+    arm_radix4_butterfly_inverse_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+  else
+  {
+    /*  Complex FFT radix-4  */
+    arm_radix4_butterfly_q15(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+
+  if (S->bitReverseFlag == 1U)
+  {
+    /*  Bit Reversal */
+    arm_bitreversal_q15(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+  }
+
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+/*
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
+
+/**
+  @brief         Core function for the Q15 CFFT butterfly process.
+  @param[in,out] pSrc16          points to the in-place buffer of Q15 data type
+  @param[in]     fftLen           length of the FFT
+  @param[in]     pCoef16         points to twiddle coefficient buffer
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+void arm_radix4_butterfly_q15(
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier)
+{
+
+#if defined (ARM_MATH_DSP)
+
+        q31_t R, S, T, U;
+        q31_t C1, C2, C3, out1, out2;
+        uint32_t n1, n2, ic, i0, j, k;
+
+        q15_t *ptr1;
+        q15_t *pSi0;
+        q15_t *pSi1;
+        q15_t *pSi2;
+        q15_t *pSi3;
+
+        q31_t xaya, xbyb, xcyc, xdyd;
+
+  /* Total process is divided into three stages */
+
+  /* process first stage, middle stages, & last stage */
+
+  /*  Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+
+  /* Index for twiddle coefficient */
+  ic = 0U;
+
+  /* Index for input read and output write */
+  j = n2;
+
+  pSi0 = pSrc16;
+  pSi1 = pSi0 + 2 * n2;
+  pSi2 = pSi1 + 2 * n2;
+  pSi3 = pSi2 + 2 * n2;
+
+  /* Input is in 1.15(q15) format */
+
+  /*  start of first stage process */
+  do
+  {
+    /*  Butterfly implementation */
+
+    /* Reading i0, i0+fftLen/2 inputs */
+    /* Read ya (real), xa(imag) input */
+    T = read_q15x2 (pSi0);
+    T = __SHADD16(T, 0); /* this is just a SIMD arithmetic shift right by 1 */
+    T = __SHADD16(T, 0); /* it turns out doing this twice is 2 cycles, the alternative takes 3 cycles */
+/*
+    in = ((int16_t) (T & 0xFFFF)) >> 2;       // alternative code that takes 3 cycles
+     T = ((T >> 2) & 0xFFFF0000) | (in & 0xFFFF);
+*/
+
+    /* Read yc (real), xc(imag) input */
+    S = read_q15x2 (pSi2);
+    S = __SHADD16(S, 0);
+    S = __SHADD16(S, 0);
+
+    /* R = packed((ya + yc), (xa + xc) ) */
+    R = __QADD16(T, S);
+
+    /* S = packed((ya - yc), (xa - xc) ) */
+    S = __QSUB16(T, S);
+
+    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+    /* Read yb (real), xb(imag) input */
+    T = read_q15x2 (pSi1);
+    T = __SHADD16(T, 0);
+    T = __SHADD16(T, 0);
+
+    /* Read yd (real), xd(imag) input */
+    U = read_q15x2 (pSi3);
+    U = __SHADD16(U, 0);
+    U = __SHADD16(U, 0);
+
+    /* T = packed((yb + yd), (xb + xd) ) */
+    T = __QADD16(T, U);
+
+    /*  writing the butterfly processed i0 sample */
+    /* xa' = xa + xb + xc + xd */
+    /* ya' = ya + yb + yc + yd */
+    write_q15x2_ia (&pSi0, __SHADD16(R, T));
+
+    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
+    R = __QSUB16(R, T);
+
+    /* co2 & si2 are read from SIMD Coefficient pointer */
+    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+    out1 = __SMUAD(C2, R) >> 16U;
+    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+    out2 = __SMUSDX(C2, R);
+#else
+    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+    out1 = __SMUSDX(R, C2) >> 16U;
+    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+    out2 = __SMUAD(C2, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /*  Reading i0+fftLen/4 */
+    /* T = packed(yb, xb) */
+    T = read_q15x2 (pSi1);
+    T = __SHADD16(T, 0);
+    T = __SHADD16(T, 0);
+
+    /* writing the butterfly processed i0 + fftLen/4 sample */
+    /* writing output(xc', yc') in little endian format */
+    write_q15x2_ia (&pSi1, (q31_t) __PKHBT( out1, out2, 0 ));
+
+    /*  Butterfly calculations */
+    /* U = packed(yd, xd) */
+    U = read_q15x2 (pSi3);
+    U = __SHADD16(U, 0);
+    U = __SHADD16(U, 0);
+
+    /* T = packed(yb-yd, xb-xd) */
+    T = __QSUB16(T, U);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+    R = __QASX(S, T);
+    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
+    S = __QSAX(S, T);
+#else
+    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+    R = __QSAX(S, T);
+    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
+    S = __QASX(S, T);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* co1 & si1 are read from SIMD Coefficient pointer */
+    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+    /*  Butterfly process for the i0+fftLen/2 sample */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+    out1 = __SMUAD(C1, S) >> 16U;
+    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+    out2 = __SMUSDX(C1, S);
+#else
+    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+    out1 = __SMUSDX(S, C1) >> 16U;
+    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+    out2 = __SMUAD(C1, S);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* writing output(xb', yb') in little endian format */
+    write_q15x2_ia (&pSi2, __PKHBT( out1, out2, 0 ));
+
+    /* co3 & si3 are read from SIMD Coefficient pointer */
+    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
+    /*  Butterfly process for the i0+3fftLen/4 sample */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
+    out1 = __SMUAD(C3, R) >> 16U;
+    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
+    out2 = __SMUSDX(C3, R);
+#else
+    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
+    out1 = __SMUSDX(R, C3) >> 16U;
+    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
+    out2 = __SMUAD(C3, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* writing output(xd', yd') in little endian format */
+    write_q15x2_ia (&pSi3, __PKHBT( out1, out2, 0 ));
+
+    /*  Twiddle coefficients index modifier */
+    ic = ic + twidCoefModifier;
+
+  } while (--j);
+  /* data is in 4.11(q11) format */
+
+  /* end of first stage process */
+
+
+  /* start of middle stage process */
+
+  /*  Twiddle coefficients index modifier */
+  twidCoefModifier <<= 2U;
+
+  /*  Calculation of Middle stage */
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the middle stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ic = 0U;
+
+    for (j = 0U; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
+
+      /*  Twiddle coefficients index modifier */
+      ic = ic + twidCoefModifier;
+
+      pSi0 = pSrc16 + 2 * j;
+      pSi1 = pSi0 + 2 * n2;
+      pSi2 = pSi1 + 2 * n2;
+      pSi3 = pSi2 + 2 * n2;
+
+      /*  Butterfly implementation */
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  Reading i0, i0+fftLen/2 inputs */
+        /* Read ya (real), xa(imag) input */
+        T = read_q15x2 (pSi0);
+
+        /* Read yc (real), xc(imag) input */
+        S = read_q15x2 (pSi2);
+
+        /* R = packed( (ya + yc), (xa + xc)) */
+        R = __QADD16(T, S);
+
+        /* S = packed((ya - yc), (xa - xc)) */
+        S = __QSUB16(T, S);
+
+        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+        /* Read yb (real), xb(imag) input */
+        T = read_q15x2 (pSi1);
+
+        /* Read yd (real), xd(imag) input */
+        U = read_q15x2 (pSi3);
+
+        /* T = packed( (yb + yd), (xb + xd)) */
+        T = __QADD16(T, U);
+
+        /*  writing the butterfly processed i0 sample */
+
+        /* xa' = xa + xb + xc + xd */
+        /* ya' = ya + yb + yc + yd */
+        out1 = __SHADD16(R, T);
+        out1 = __SHADD16(out1, 0);
+        write_q15x2 (pSi0, out1);
+        pSi0 += 2 * n1;
+
+        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
+        R = __SHSUB16(R, T);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
+        out1 = __SMUAD(C2, R) >> 16U;
+
+        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        out2 = __SMUSDX(C2, R);
+#else
+        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        out1 = __SMUSDX(R, C2) >> 16U;
+
+        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
+        out2 = __SMUAD(C2, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /*  Reading i0+3fftLen/4 */
+        /* Read yb (real), xb(imag) input */
+        T = read_q15x2 (pSi1);
+
+        /*  writing the butterfly processed i0 + fftLen/4 sample */
+        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        write_q15x2 (pSi1, __PKHBT( out1, out2, 0 ));
+        pSi1 += 2 * n1;
+
+        /*  Butterfly calculations */
+
+        /* Read yd (real), xd(imag) input */
+        U = read_q15x2 (pSi3);
+
+        /* T = packed(yb-yd, xb-xd) */
+        T = __QSUB16(T, U);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+        R = __SHASX(S, T);
+
+        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
+        S = __SHSAX(S, T);
+
+
+        /*  Butterfly process for the i0+fftLen/2 sample */
+        out1 = __SMUAD(C1, S) >> 16U;
+        out2 = __SMUSDX(C1, S);
+#else
+        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+        R = __SHSAX(S, T);
+
+        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
+        S = __SHASX(S, T);
+
+
+        /*  Butterfly process for the i0+fftLen/2 sample */
+        out1 = __SMUSDX(S, C1) >> 16U;
+        out2 = __SMUAD(C1, S);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+        write_q15x2 (pSi2, __PKHBT( out1, out2, 0 ));
+        pSi2 += 2 * n1;
+
+        /*  Butterfly process for the i0+3fftLen/4 sample */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUAD(C3, R) >> 16U;
+        out2 = __SMUSDX(C3, R);
+#else
+        out1 = __SMUSDX(R, C3) >> 16U;
+        out2 = __SMUAD(C3, R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
+        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
+        write_q15x2 (pSi3, __PKHBT( out1, out2, 0 ));
+        pSi3 += 2 * n1;
+      }
+    }
+    /*  Twiddle coefficients index modifier */
+    twidCoefModifier <<= 2U;
+  }
+  /* end of middle stage process */
+
+
+  /* data is in 10.6(q6) format for the 1024 point */
+  /* data is in 8.8(q8) format for the 256 point */
+  /* data is in 6.10(q10) format for the 64 point */
+  /* data is in 4.12(q12) format for the 16 point */
+
+  /*  Initializations for the last stage */
+  j = fftLen >> 2;
+
+  ptr1 = &pSrc16[0];
+
+  /* start of last stage process */
+
+  /*  Butterfly implementation */
+  do
+  {
+    /* Read xa (real), ya(imag) input */
+    xaya = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* Read xb (real), yb(imag) input */
+    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* Read xc (real), yc(imag) input */
+    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* Read xd (real), yd(imag) input */
+    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* R = packed((ya + yc), (xa + xc)) */
+    R = __QADD16(xaya, xcyc);
+
+    /* T = packed((yb + yd), (xb + xd)) */
+    T = __QADD16(xbyb, xdyd);
+
+    /* pointer updation for writing */
+    ptr1 = ptr1 - 8U;
+
+
+    /* xa' = xa + xb + xc + xd */
+    /* ya' = ya + yb + yc + yd */
+    write_q15x2_ia (&ptr1, __SHADD16(R, T));
+
+    /* T = packed((yb + yd), (xb + xd)) */
+    T = __QADD16(xbyb, xdyd);
+
+    /* xc' = (xa-xb+xc-xd) */
+    /* yc' = (ya-yb+yc-yd) */
+    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
+
+    /* S = packed((ya - yc), (xa - xc)) */
+    S = __QSUB16(xaya, xcyc);
+
+    /* Read yd (real), xd(imag) input */
+    /* T = packed( (yb - yd), (xb - xd))  */
+    U = __QSUB16(xbyb, xdyd);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xb' = (xa+yb-xc-yd) */
+    /* yb' = (ya-xb-yc+xd) */
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
+
+    /* xd' = (xa-yb-xc+yd) */
+    /* yd' = (ya+xb-yc-xd) */
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
+#else
+    /* xb' = (xa+yb-xc-yd) */
+    /* yb' = (ya-xb-yc+xd) */
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
+
+    /* xd' = (xa-yb-xc+yd) */
+    /* yd' = (ya+xb-yc-xd) */
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+  } while (--j);
+
+  /* end of last stage process */
+
+  /* output is in 11.5(q5) format for the 1024 point */
+  /* output is in 9.7(q7) format for the 256 point   */
+  /* output is in 7.9(q9) format for the 64 point  */
+  /* output is in 5.11(q11) format for the 16 point  */
+
+
+#else /* #if defined (ARM_MATH_DSP) */
+
+        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+
+  /* Total process is divided into three stages */
+
+  /* process first stage, middle stages, & last stage */
+
+  /*  Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+
+  /* Index for twiddle coefficient */
+  ic = 0U;
+
+  /* Index for input read and output write */
+  i0 = 0U;
+  j = n2;
+
+  /* Input is in 1.15(q15) format */
+
+  /*  start of first stage process */
+  do
+  {
+    /*  Butterfly implementation */
+
+    /*  index calculation for the input as, */
+    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /*  Reading i0, i0+fftLen/2 inputs */
+
+    /* input is down scale by 4 to avoid overflow */
+    /* Read ya (real), xa(imag) input */
+    T0 = pSrc16[i0 * 2U] >> 2U;
+    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;
+
+    /* input is down scale by 4 to avoid overflow */
+    /* Read yc (real), xc(imag) input */
+    S0 = pSrc16[i2 * 2U] >> 2U;
+    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;
+
+    /* R0 = (ya + yc) */
+    R0 = __SSAT(T0 + S0, 16U);
+    /* R1 = (xa + xc) */
+    R1 = __SSAT(T1 + S1, 16U);
+
+    /* S0 = (ya - yc) */
+    S0 = __SSAT(T0 - S0, 16);
+    /* S1 = (xa - xc) */
+    S1 = __SSAT(T1 - S1, 16);
+
+    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+    /* input is down scale by 4 to avoid overflow */
+    /* Read yb (real), xb(imag) input */
+    T0 = pSrc16[i1 * 2U] >> 2U;
+    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
+
+    /* input is down scale by 4 to avoid overflow */
+    /* Read yd (real), xd(imag) input */
+    U0 = pSrc16[i3 * 2U] >> 2U;
+    U1 = pSrc16[(i3 * 2U) + 1] >> 2U;
+
+    /* T0 = (yb + yd) */
+    T0 = __SSAT(T0 + U0, 16U);
+    /* T1 = (xb + xd) */
+    T1 = __SSAT(T1 + U1, 16U);
+
+    /*  writing the butterfly processed i0 sample */
+    /* ya' = ya + yb + yc + yd */
+    /* xa' = xa + xb + xc + xd */
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
+
+    /* R0 = (ya + yc) - (yb + yd) */
+    /* R1 = (xa + xc) - (xb + xd) */
+    R0 = __SSAT(R0 - T0, 16U);
+    R1 = __SSAT(R1 - T1, 16U);
+
+    /* co2 & si2 are read from Coefficient pointer */
+    Co2 = pCoef16[2U * ic * 2U];
+    Si2 = pCoef16[(2U * ic * 2U) + 1];
+
+    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+    out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U);
+    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+    out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U);
+
+    /*  Reading i0+fftLen/4 */
+    /* input is down scale by 4 to avoid overflow */
+    /* T0 = yb, T1 =  xb */
+    T0 = pSrc16[i1 * 2U] >> 2;
+    T1 = pSrc16[(i1 * 2U) + 1] >> 2;
+
+    /* writing the butterfly processed i0 + fftLen/4 sample */
+    /* writing output(xc', yc') in little endian format */
+    pSrc16[i1 * 2U] = out1;
+    pSrc16[(i1 * 2U) + 1] = out2;
+
+    /*  Butterfly calculations */
+    /* input is down scale by 4 to avoid overflow */
+    /* U0 = yd, U1 = xd */
+    U0 = pSrc16[i3 * 2U] >> 2;
+    U1 = pSrc16[(i3 * 2U) + 1] >> 2;
+    /* T0 = yb-yd */
+    T0 = __SSAT(T0 - U0, 16);
+    /* T1 = xb-xd */
+    T1 = __SSAT(T1 - U1, 16);
+
+    /* R1 = (ya-yc) + (xb- xd),  R0 = (xa-xc) - (yb-yd)) */
+    R0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16);
+    R1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
+
+    /* S1 = (ya-yc) - (xb- xd), S0 = (xa-xc) + (yb-yd)) */
+    S0 = (q15_t) __SSAT(((q31_t) S0 + T1), 16U);
+    S1 = (q15_t) __SSAT(((q31_t) S1 - T0), 16U);
+
+    /* co1 & si1 are read from Coefficient pointer */
+    Co1 = pCoef16[ic * 2U];
+    Si1 = pCoef16[(ic * 2U) + 1];
+    /*  Butterfly process for the i0+fftLen/2 sample */
+    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+    out1 = (q15_t) ((Si1 * S1 + Co1 * S0) >> 16);
+    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+    out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16);
+
+    /* writing output(xb', yb') in little endian format */
+    pSrc16[i2 * 2U] = out1;
+    pSrc16[(i2 * 2U) + 1] = out2;
+
+    /* Co3 & si3 are read from Coefficient pointer */
+    Co3 = pCoef16[3U * (ic * 2U)];
+    Si3 = pCoef16[(3U * (ic * 2U)) + 1];
+    /*  Butterfly process for the i0+3fftLen/4 sample */
+    /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
+    out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U);
+    /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
+    out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U);
+    /* writing output(xd', yd') in little endian format */
+    pSrc16[i3 * 2U] = out1;
+    pSrc16[(i3 * 2U) + 1] = out2;
+
+    /*  Twiddle coefficients index modifier */
+    ic = ic + twidCoefModifier;
+
+    /*  Updating input index */
+    i0 = i0 + 1U;
+
+  } while (--j);
+  /* data is in 4.11(q11) format */
+
+  /* end of first stage process */
+
+
+  /* start of middle stage process */
+
+  /*  Twiddle coefficients index modifier */
+  twidCoefModifier <<= 2U;
+
+  /*  Calculation of Middle stage */
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the middle stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ic = 0U;
+
+    for (j = 0U; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      Co1 = pCoef16[ic * 2U];
+      Si1 = pCoef16[(ic * 2U) + 1U];
+      Co2 = pCoef16[2U * (ic * 2U)];
+      Si2 = pCoef16[(2U * (ic * 2U)) + 1U];
+      Co3 = pCoef16[3U * (ic * 2U)];
+      Si3 = pCoef16[(3U * (ic * 2U)) + 1U];
+
+      /*  Twiddle coefficients index modifier */
+      ic = ic + twidCoefModifier;
+
+      /*  Butterfly implementation */
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  index calculation for the input as, */
+        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
+        i1 = i0 + n2;
+        i2 = i1 + n2;
+        i3 = i2 + n2;
+
+        /*  Reading i0, i0+fftLen/2 inputs */
+        /* Read ya (real), xa(imag) input */
+        T0 = pSrc16[i0 * 2U];
+        T1 = pSrc16[(i0 * 2U) + 1U];
+
+        /* Read yc (real), xc(imag) input */
+        S0 = pSrc16[i2 * 2U];
+        S1 = pSrc16[(i2 * 2U) + 1U];
+
+        /* R0 = (ya + yc), R1 = (xa + xc) */
+        R0 = __SSAT(T0 + S0, 16);
+        R1 = __SSAT(T1 + S1, 16);
+
+        /* S0 = (ya - yc), S1 =(xa - xc) */
+        S0 = __SSAT(T0 - S0, 16);
+        S1 = __SSAT(T1 - S1, 16);
+
+        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+        /* Read yb (real), xb(imag) input */
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
+
+        /* Read yd (real), xd(imag) input */
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
+
+
+        /* T0 = (yb + yd), T1 = (xb + xd) */
+        T0 = __SSAT(T0 + U0, 16);
+        T1 = __SSAT(T1 + U1, 16);
+
+        /*  writing the butterfly processed i0 sample */
+
+        /* xa' = xa + xb + xc + xd */
+        /* ya' = ya + yb + yc + yd */
+        out1 = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;
+        out2 = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;
+
+        pSrc16[i0 * 2U] = out1;
+        pSrc16[(2U * i0) + 1U] = out2;
+
+        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
+        R0 = (R0 >> 1U) - (T0 >> 1U);
+        R1 = (R1 >> 1U) - (T1 >> 1U);
+
+        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
+        out1 = (q15_t) ((Co2 * R0 + Si2 * R1) >> 16U);
+
+        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        out2 = (q15_t) ((-Si2 * R0 + Co2 * R1) >> 16U);
+
+        /*  Reading i0+3fftLen/4 */
+        /* Read yb (real), xb(imag) input */
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
+
+        /*  writing the butterfly processed i0 + fftLen/4 sample */
+        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        pSrc16[i1 * 2U] = out1;
+        pSrc16[(i1 * 2U) + 1U] = out2;
+
+        /*  Butterfly calculations */
+
+        /* Read yd (real), xd(imag) input */
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
+
+        /* T0 = yb-yd, T1 = xb-xd */
+        T0 = __SSAT(T0 - U0, 16);
+        T1 = __SSAT(T1 - U1, 16);
+
+        /* R0 = (ya-yc) + (xb- xd), R1 = (xa-xc) - (yb-yd)) */
+        R0 = (S0 >> 1U) - (T1 >> 1U);
+        R1 = (S1 >> 1U) + (T0 >> 1U);
+
+        /* S0 = (ya-yc) - (xb- xd), S1 = (xa-xc) + (yb-yd)) */
+        S0 = (S0 >> 1U) + (T1 >> 1U);
+        S1 = (S1 >> 1U) - (T0 >> 1U);
+
+        /*  Butterfly process for the i0+fftLen/2 sample */
+        out1 = (q15_t) ((Co1 * S0 + Si1 * S1) >> 16U);
+
+        out2 = (q15_t) ((-Si1 * S0 + Co1 * S1) >> 16U);
+
+        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+        pSrc16[i2 * 2U] = out1;
+        pSrc16[(i2 * 2U) + 1U] = out2;
+
+        /*  Butterfly process for the i0+3fftLen/4 sample */
+        out1 = (q15_t) ((Si3 * R1 + Co3 * R0) >> 16U);
+
+        out2 = (q15_t) ((-Si3 * R0 + Co3 * R1) >> 16U);
+        /* xd' = (xa-yb-xc+yd)* Co3 + (ya+xb-yc-xd)* (si3) */
+        /* yd' = (ya+xb-yc-xd)* Co3 - (xa-yb-xc+yd)* (si3) */
+        pSrc16[i3 * 2U] = out1;
+        pSrc16[(i3 * 2U) + 1U] = out2;
+      }
+    }
+    /*  Twiddle coefficients index modifier */
+    twidCoefModifier <<= 2U;
+  }
+  /* end of middle stage process */
+
+
+  /* data is in 10.6(q6) format for the 1024 point */
+  /* data is in 8.8(q8) format for the 256 point */
+  /* data is in 6.10(q10) format for the 64 point */
+  /* data is in 4.12(q12) format for the 16 point */
+
+  /*  Initializations for the last stage */
+  n1 = n2;
+  n2 >>= 2U;
+
+  /* start of last stage process */
+
+  /*  Butterfly implementation */
+  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
+  {
+    /*  index calculation for the input as, */
+    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /*  Reading i0, i0+fftLen/2 inputs */
+    /* Read ya (real), xa(imag) input */
+    T0 = pSrc16[i0 * 2U];
+    T1 = pSrc16[(i0 * 2U) + 1U];
+
+    /* Read yc (real), xc(imag) input */
+    S0 = pSrc16[i2 * 2U];
+    S1 = pSrc16[(i2 * 2U) + 1U];
+
+    /* R0 = (ya + yc), R1 = (xa + xc) */
+    R0 = __SSAT(T0 + S0, 16U);
+    R1 = __SSAT(T1 + S1, 16U);
+
+    /* S0 = (ya - yc), S1 = (xa - xc) */
+    S0 = __SSAT(T0 - S0, 16U);
+    S1 = __SSAT(T1 - S1, 16U);
+
+    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+    /* Read yb (real), xb(imag) input */
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
+    /* Read yd (real), xd(imag) input */
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
+
+    /* T0 = (yb + yd), T1 = (xb + xd)) */
+    T0 = __SSAT(T0 + U0, 16U);
+    T1 = __SSAT(T1 + U1, 16U);
+
+    /*  writing the butterfly processed i0 sample */
+    /* xa' = xa + xb + xc + xd */
+    /* ya' = ya + yb + yc + yd */
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
+
+    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
+    R0 = (R0 >> 1U) - (T0 >> 1U);
+    R1 = (R1 >> 1U) - (T1 >> 1U);
+    /* Read yb (real), xb(imag) input */
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
+
+    /*  writing the butterfly processed i0 + fftLen/4 sample */
+    /* xc' = (xa-xb+xc-xd) */
+    /* yc' = (ya-yb+yc-yd) */
+    pSrc16[i1 * 2U] = R0;
+    pSrc16[(i1 * 2U) + 1U] = R1;
+
+    /* Read yd (real), xd(imag) input */
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
+    /* T0 = (yb - yd), T1 = (xb - xd)  */
+    T0 = __SSAT(T0 - U0, 16U);
+    T1 = __SSAT(T1 - U1, 16U);
+
+    /*  writing the butterfly processed i0 + fftLen/2 sample */
+    /* xb' = (xa+yb-xc-yd) */
+    /* yb' = (ya-xb-yc+xd) */
+    pSrc16[i2 * 2U] = (S0 >> 1U) + (T1 >> 1U);
+    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);
+
+    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
+    /* xd' = (xa-yb-xc+yd) */
+    /* yd' = (ya+xb-yc-xd) */
+    pSrc16[i3 * 2U] = (S0 >> 1U) - (T1 >> 1U);
+    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);
+
+  }
+
+  /* end of last stage process */
+
+  /* output is in 11.5(q5) format for the 1024 point */
+  /* output is in 9.7(q7) format for the 256 point   */
+  /* output is in 7.9(q9) format for the 64 point  */
+  /* output is in 5.11(q11) format for the 16 point  */
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
+
+
+/**
+  @brief         Core function for the Q15 CIFFT butterfly process.
+  @param[in,out] pSrc16           points to the in-place buffer of Q15 data type
+  @param[in]     fftLen           length of the FFT
+  @param[in]     pCoef16          points to twiddle coefficient buffer
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
+ */
+
+/*
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT function
+ *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
+
+void arm_radix4_butterfly_inverse_q15(
+        q15_t * pSrc16,
+        uint32_t fftLen,
+  const q15_t * pCoef16,
+        uint32_t twidCoefModifier)
+{
+
+#if defined (ARM_MATH_DSP)
+
+        q31_t R, S, T, U;
+        q31_t C1, C2, C3, out1, out2;
+        uint32_t n1, n2, ic, i0, j, k;
+        
+        q15_t *ptr1;
+        q15_t *pSi0;
+        q15_t *pSi1;
+        q15_t *pSi2;
+        q15_t *pSi3;
+        
+        q31_t xaya, xbyb, xcyc, xdyd;
+
+  /* Total process is divided into three stages */
+
+  /* process first stage, middle stages, & last stage */
+
+  /*  Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+
+  /* Index for twiddle coefficient */
+  ic = 0U;
+
+  /* Index for input read and output write */
+  j = n2;
+
+  pSi0 = pSrc16;
+  pSi1 = pSi0 + 2 * n2;
+  pSi2 = pSi1 + 2 * n2;
+  pSi3 = pSi2 + 2 * n2;
+
+  /* Input is in 1.15(q15) format */
+
+  /*  start of first stage process */
+  do
+  {
+    /*  Butterfly implementation */
+
+    /*  Reading i0, i0+fftLen/2 inputs */
+    /* Read ya (real), xa(imag) input */
+    T = read_q15x2 (pSi0);
+    T = __SHADD16(T, 0);
+    T = __SHADD16(T, 0);
+
+    /* Read yc (real), xc(imag) input */
+    S = read_q15x2 (pSi2);
+    S = __SHADD16(S, 0);
+    S = __SHADD16(S, 0);
+
+    /* R = packed((ya + yc), (xa + xc) ) */
+    R = __QADD16(T, S);
+
+    /* S = packed((ya - yc), (xa - xc) ) */
+    S = __QSUB16(T, S);
+
+    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+    /* Read yb (real), xb(imag) input */
+    T = read_q15x2 (pSi1);
+    T = __SHADD16(T, 0);
+    T = __SHADD16(T, 0);
+
+    /* Read yd (real), xd(imag) input */
+    U = read_q15x2 (pSi3);
+    U = __SHADD16(U, 0);
+    U = __SHADD16(U, 0);
+
+    /* T = packed((yb + yd), (xb + xd) ) */
+    T = __QADD16(T, U);
+
+    /*  writing the butterfly processed i0 sample */
+    /* xa' = xa + xb + xc + xd */
+    /* ya' = ya + yb + yc + yd */
+    write_q15x2_ia (&pSi0, __SHADD16(R, T));
+
+    /* R = packed((ya + yc) - (yb + yd), (xa + xc)- (xb + xd)) */
+    R = __QSUB16(R, T);
+
+    /* co2 & si2 are read from SIMD Coefficient pointer */
+    C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+    out1 = __SMUSD(C2, R) >> 16U;
+    /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+    out2 = __SMUADX(C2, R);
+#else
+    /* xc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+    out1 = __SMUADX(C2, R) >> 16U;
+    /* yc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+    out2 = __SMUSD(__QSUB16(0, C2), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /*  Reading i0+fftLen/4 */
+    /* T = packed(yb, xb) */
+    T = read_q15x2 (pSi1);
+    T = __SHADD16(T, 0);
+    T = __SHADD16(T, 0);
+
+    /* writing the butterfly processed i0 + fftLen/4 sample */
+    /* writing output(xc', yc') in little endian format */
+    write_q15x2_ia (&pSi1, (q31_t) __PKHBT( out1, out2, 0 ));
+
+    /*  Butterfly calculations */
+    /* U = packed(yd, xd) */
+    U = read_q15x2 (pSi3);
+    U = __SHADD16(U, 0);
+    U = __SHADD16(U, 0);
+
+    /* T = packed(yb-yd, xb-xd) */
+    T = __QSUB16(T, U);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+    R = __QSAX(S, T);
+    /* S = packed((ya-yc) + (xb- xd),  (xa-xc) - (yb-yd)) */
+    S = __QASX(S, T);
+#else
+    /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+    R = __QASX(S, T);
+    /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
+    S = __QSAX(S, T);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* co1 & si1 are read from SIMD Coefficient pointer */
+    C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+    /*  Butterfly process for the i0+fftLen/2 sample */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+    out1 = __SMUSD(C1, S) >> 16U;
+    /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+    out2 = __SMUADX(C1, S);
+#else
+    /* xb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+    out1 = __SMUADX(C1, S) >> 16U;
+    /* yb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+    out2 = __SMUSD(__QSUB16(0, C1), S);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* writing output(xb', yb') in little endian format */
+    write_q15x2_ia (&pSi2, __PKHBT( out1, out2, 0 ));
+
+    /* co3 & si3 are read from SIMD Coefficient pointer */
+    C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
+    /*  Butterfly process for the i0+3fftLen/4 sample */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
+    out1 = __SMUSD(C3, R) >> 16U;
+    /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
+    out2 = __SMUADX(C3, R);
+#else
+    /* xd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
+    out1 = __SMUADX(C3, R) >> 16U;
+    /* yd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
+    out2 = __SMUSD(__QSUB16(0, C3), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+    /* writing output(xd', yd') in little endian format */
+    write_q15x2_ia (&pSi3, __PKHBT( out1, out2, 0 ));
+
+    /*  Twiddle coefficients index modifier */
+    ic = ic + twidCoefModifier;
+
+  } while (--j);
+  /* data is in 4.11(q11) format */
+
+  /* end of first stage process */
+
+
+  /* start of middle stage process */
+
+  /*  Twiddle coefficients index modifier */
+  twidCoefModifier <<= 2U;
+
+  /*  Calculation of Middle stage */
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the middle stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ic = 0U;
+
+    for (j = 0U; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      C1 = read_q15x2 ((q15_t *) pCoef16 + (2U * ic));
+      C2 = read_q15x2 ((q15_t *) pCoef16 + (4U * ic));
+      C3 = read_q15x2 ((q15_t *) pCoef16 + (6U * ic));
+
+      /*  Twiddle coefficients index modifier */
+      ic = ic + twidCoefModifier;
+
+      pSi0 = pSrc16 + 2 * j;
+      pSi1 = pSi0 + 2 * n2;
+      pSi2 = pSi1 + 2 * n2;
+      pSi3 = pSi2 + 2 * n2;
+
+      /*  Butterfly implementation */
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  Reading i0, i0+fftLen/2 inputs */
+        /* Read ya (real), xa(imag) input */
+        T = read_q15x2 (pSi0);
+
+        /* Read yc (real), xc(imag) input */
+        S = read_q15x2 (pSi2);
+
+        /* R = packed( (ya + yc), (xa + xc)) */
+        R = __QADD16(T, S);
+
+        /* S = packed((ya - yc), (xa - xc)) */
+        S = __QSUB16(T, S);
+
+        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+        /* Read yb (real), xb(imag) input */
+        T = read_q15x2 (pSi1);
+
+        /* Read yd (real), xd(imag) input */
+        U = read_q15x2 (pSi3);
+
+        /* T = packed( (yb + yd), (xb + xd)) */
+        T = __QADD16(T, U);
+
+        /*  writing the butterfly processed i0 sample */
+
+        /* xa' = xa + xb + xc + xd */
+        /* ya' = ya + yb + yc + yd */
+        out1 = __SHADD16(R, T);
+        out1 = __SHADD16(out1, 0);
+        write_q15x2 (pSi0, out1);
+        pSi0 += 2 * n1;
+
+        /* R = packed( (ya + yc) - (yb + yd), (xa + xc) - (xb + xd)) */
+        R = __SHSUB16(R, T);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
+        out1 = __SMUSD(C2, R) >> 16U;
+
+        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        out2 = __SMUADX(C2, R);
+#else
+        /* (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        out1 = __SMUADX(R, C2) >> 16U;
+
+        /* (ya-yb+yc-yd)* (si2) + (xa-xb+xc-xd)* co2 */
+        out2 = __SMUSD(__QSUB16(0, C2), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /*  Reading i0+3fftLen/4 */
+        /* Read yb (real), xb(imag) input */
+        T = read_q15x2 (pSi1);
+
+        /*  writing the butterfly processed i0 + fftLen/4 sample */
+        /* xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2) */
+        /* yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2) */
+        write_q15x2 (pSi1, __PKHBT( out1, out2, 0 ));
+        pSi1 += 2 * n1;
+
+        /*  Butterfly calculations */
+
+        /* Read yd (real), xd(imag) input */
+        U = read_q15x2 (pSi3);
+
+        /* T = packed(yb-yd, xb-xd) */
+        T = __QSUB16(T, U);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+        R = __SHSAX(S, T);
+
+        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
+        S = __SHASX(S, T);
+
+        /*  Butterfly process for the i0+fftLen/2 sample */
+        out1 = __SMUSD(C1, S) >> 16U;
+        out2 = __SMUADX(C1, S);
+#else
+        /* R = packed((ya-yc) + (xb- xd) , (xa-xc) - (yb-yd)) */
+        R = __SHASX(S, T);
+
+        /* S = packed((ya-yc) - (xb- xd),  (xa-xc) + (yb-yd)) */
+        S = __SHSAX(S, T);
+
+        /*  Butterfly process for the i0+fftLen/2 sample */
+        out1 = __SMUADX(S, C1) >> 16U;
+        out2 = __SMUSD(__QSUB16(0, C1), S);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1) */
+        /* yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1) */
+        write_q15x2 (pSi2, __PKHBT( out1, out2, 0 ));
+        pSi2 += 2 * n1;
+
+        /*  Butterfly process for the i0+3fftLen/4 sample */
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        out1 = __SMUSD(C3, R) >> 16U;
+        out2 = __SMUADX(C3, R);
+#else
+        out1 = __SMUADX(C3, R) >> 16U;
+        out2 = __SMUSD(__QSUB16(0, C3), R);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3) */
+        /* yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3) */
+        write_q15x2 (pSi3, __PKHBT( out1, out2, 0 ));
+        pSi3 += 2 * n1;
+      }
+    }
+    /*  Twiddle coefficients index modifier */
+    twidCoefModifier <<= 2U;
+  }
+  /* end of middle stage process */
+
+  /* data is in 10.6(q6) format for the 1024 point */
+  /* data is in 8.8(q8) format for the 256 point */
+  /* data is in 6.10(q10) format for the 64 point */
+  /* data is in 4.12(q12) format for the 16 point */
+
+  /*  Initializations for the last stage */
+  j = fftLen >> 2;
+
+  ptr1 = &pSrc16[0];
+
+  /* start of last stage process */
+
+  /*  Butterfly implementation */
+  do
+  {
+    /* Read xa (real), ya(imag) input */
+    xaya = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* Read xb (real), yb(imag) input */
+    xbyb = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* Read xc (real), yc(imag) input */
+    xcyc = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* Read xd (real), yd(imag) input */
+    xdyd = read_q15x2_ia ((q15_t **) &ptr1);
+
+    /* R = packed((ya + yc), (xa + xc)) */
+    R = __QADD16(xaya, xcyc);
+
+    /* T = packed((yb + yd), (xb + xd)) */
+    T = __QADD16(xbyb, xdyd);
+
+    /* pointer updation for writing */
+    ptr1 = ptr1 - 8U;
+
+
+    /* xa' = xa + xb + xc + xd */
+    /* ya' = ya + yb + yc + yd */
+    write_q15x2_ia (&ptr1, __SHADD16(R, T));
+
+    /* T = packed((yb + yd), (xb + xd)) */
+    T = __QADD16(xbyb, xdyd);
+
+    /* xc' = (xa-xb+xc-xd) */
+    /* yc' = (ya-yb+yc-yd) */
+    write_q15x2_ia (&ptr1, __SHSUB16(R, T));
+
+    /* S = packed((ya - yc), (xa - xc)) */
+    S = __QSUB16(xaya, xcyc);
+
+    /* Read yd (real), xd(imag) input */
+    /* T = packed( (yb - yd), (xb - xd))  */
+    U = __QSUB16(xbyb, xdyd);
+
+#ifndef ARM_MATH_BIG_ENDIAN
+    /* xb' = (xa+yb-xc-yd) */
+    /* yb' = (ya-xb-yc+xd) */
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
+
+    /* xd' = (xa-yb-xc+yd) */
+    /* yd' = (ya+xb-yc-xd) */
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
+#else
+    /* xb' = (xa+yb-xc-yd) */
+    /* yb' = (ya-xb-yc+xd) */
+    write_q15x2_ia (&ptr1, __SHSAX(S, U));
+
+    /* xd' = (xa-yb-xc+yd) */
+    /* yd' = (ya+xb-yc-xd) */
+    write_q15x2_ia (&ptr1, __SHASX(S, U));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+  } while (--j);
+
+  /* end of last stage  process */
+
+  /* output is in 11.5(q5) format for the 1024 point */
+  /* output is in 9.7(q7) format for the 256 point   */
+  /* output is in 7.9(q9) format for the 64 point  */
+  /* output is in 5.11(q11) format for the 16 point  */
+
+
+#else /* arm_radix4_butterfly_inverse_q15 */
+
+        q15_t R0, R1, S0, S1, T0, T1, U0, U1;
+        q15_t Co1, Si1, Co2, Si2, Co3, Si3, out1, out2;
+        uint32_t n1, n2, ic, i0, i1, i2, i3, j, k;
+
+  /* Total process is divided into three stages */
+
+  /* process first stage, middle stages, & last stage */
+
+  /*  Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+
+  /* Index for twiddle coefficient */
+  ic = 0U;
+
+  /* Index for input read and output write */
+  i0 = 0U;
+
+  j = n2;
+
+  /* Input is in 1.15(q15) format */
+
+  /*  Start of first stage process */
+  do
+  {
+    /*  Butterfly implementation */
+
+    /*  index calculation for the input as, */
+    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /*  Reading i0, i0+fftLen/2 inputs */
+    /* input is down scale by 4 to avoid overflow */
+    /* Read ya (real), xa(imag) input */
+    T0 = pSrc16[i0 * 2U] >> 2U;
+    T1 = pSrc16[(i0 * 2U) + 1U] >> 2U;
+    /* input is down scale by 4 to avoid overflow */
+    /* Read yc (real), xc(imag) input */
+    S0 = pSrc16[i2 * 2U] >> 2U;
+    S1 = pSrc16[(i2 * 2U) + 1U] >> 2U;
+
+    /* R0 = (ya + yc), R1 = (xa + xc) */
+    R0 = __SSAT(T0 + S0, 16U);
+    R1 = __SSAT(T1 + S1, 16U);
+    /* S0 = (ya - yc), S1 = (xa - xc) */
+    S0 = __SSAT(T0 - S0, 16U);
+    S1 = __SSAT(T1 - S1, 16U);
+
+    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+    /* input is down scale by 4 to avoid overflow */
+    /* Read yb (real), xb(imag) input */
+    T0 = pSrc16[i1 * 2U] >> 2U;
+    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
+    /* Read yd (real), xd(imag) input */
+    /* input is down scale by 4 to avoid overflow */
+    U0 = pSrc16[i3 * 2U] >> 2U;
+    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;
+
+    /* T0 = (yb + yd), T1 = (xb + xd) */
+    T0 = __SSAT(T0 + U0, 16U);
+    T1 = __SSAT(T1 + U1, 16U);
+
+    /*  writing the butterfly processed i0 sample */
+    /* xa' = xa + xb + xc + xd */
+    /* ya' = ya + yb + yc + yd */
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
+
+    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc)- (xb + xd) */
+    R0 = __SSAT(R0 - T0, 16U);
+    R1 = __SSAT(R1 - T1, 16U);
+    /* co2 & si2 are read from Coefficient pointer */
+    Co2 = pCoef16[2U * ic * 2U];
+    Si2 = pCoef16[(2U * ic * 2U) + 1U];
+    /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
+    out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16U);
+    /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
+    out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16U);
+
+    /*  Reading i0+fftLen/4 */
+    /* input is down scale by 4 to avoid overflow */
+    /* T0 = yb, T1 = xb */
+    T0 = pSrc16[i1 * 2U] >> 2U;
+    T1 = pSrc16[(i1 * 2U) + 1U] >> 2U;
+
+    /* writing the butterfly processed i0 + fftLen/4 sample */
+    /* writing output(xc', yc') in little endian format */
+    pSrc16[i1 * 2U] = out1;
+    pSrc16[(i1 * 2U) + 1U] = out2;
+
+    /*  Butterfly calculations */
+    /* input is down scale by 4 to avoid overflow */
+    /* U0 = yd, U1 = xd) */
+    U0 = pSrc16[i3 * 2U] >> 2U;
+    U1 = pSrc16[(i3 * 2U) + 1U] >> 2U;
+
+    /* T0 = yb-yd, T1 = xb-xd) */
+    T0 = __SSAT(T0 - U0, 16U);
+    T1 = __SSAT(T1 - U1, 16U);
+    /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
+    R0 = (q15_t) __SSAT((q31_t) (S0 + T1), 16);
+    R1 = (q15_t) __SSAT((q31_t) (S1 - T0), 16);
+    /* S = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
+    S0 = (q15_t) __SSAT((q31_t) (S0 - T1), 16);
+    S1 = (q15_t) __SSAT((q31_t) (S1 + T0), 16);
+
+    /* co1 & si1 are read from Coefficient pointer */
+    Co1 = pCoef16[ic * 2U];
+    Si1 = pCoef16[(ic * 2U) + 1U];
+    /*  Butterfly process for the i0+fftLen/2 sample */
+    /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
+    out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U);
+    /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
+    out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U);
+    /* writing output(xb', yb') in little endian format */
+    pSrc16[i2 * 2U] = out1;
+    pSrc16[(i2 * 2U) + 1U] = out2;
+
+    /* Co3 & si3 are read from Coefficient pointer */
+    Co3 = pCoef16[3U * ic * 2U];
+    Si3 = pCoef16[(3U * ic * 2U) + 1U];
+    /*  Butterfly process for the i0+3fftLen/4 sample */
+    /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
+    out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U);
+    /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
+    out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U);
+    /* writing output(xd', yd') in little endian format */
+    pSrc16[i3 * 2U] = out1;
+    pSrc16[(i3 * 2U) + 1U] = out2;
+
+    /*  Twiddle coefficients index modifier */
+    ic = ic + twidCoefModifier;
+
+    /*  Updating input index */
+    i0 = i0 + 1U;
+
+  } while (--j);
+
+  /*  End of first stage process */
+
+  /* data is in 4.11(q11) format */
+
+
+  /*  Start of Middle stage process */
+
+  /*  Twiddle coefficients index modifier */
+  twidCoefModifier <<= 2U;
+
+  /*  Calculation of Middle stage */
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the middle stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ic = 0U;
+
+    for (j = 0U; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      Co1 = pCoef16[ic * 2U];
+      Si1 = pCoef16[(ic * 2U) + 1U];
+      Co2 = pCoef16[2U * ic * 2U];
+      Si2 = pCoef16[2U * ic * 2U + 1U];
+      Co3 = pCoef16[3U * ic * 2U];
+      Si3 = pCoef16[(3U * ic * 2U) + 1U];
+
+      /*  Twiddle coefficients index modifier */
+      ic = ic + twidCoefModifier;
+
+      /*  Butterfly implementation */
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  index calculation for the input as, */
+        /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
+        i1 = i0 + n2;
+        i2 = i1 + n2;
+        i3 = i2 + n2;
+
+        /*  Reading i0, i0+fftLen/2 inputs */
+        /* Read ya (real), xa(imag) input */
+        T0 = pSrc16[i0 * 2U];
+        T1 = pSrc16[(i0 * 2U) + 1U];
+
+        /* Read yc (real), xc(imag) input */
+        S0 = pSrc16[i2 * 2U];
+        S1 = pSrc16[(i2 * 2U) + 1U];
+
+
+        /* R0 = (ya + yc), R1 = (xa + xc) */
+        R0 = __SSAT(T0 + S0, 16U);
+        R1 = __SSAT(T1 + S1, 16U);
+        /* S0 = (ya - yc), S1 = (xa - xc) */
+        S0 = __SSAT(T0 - S0, 16U);
+        S1 = __SSAT(T1 - S1, 16U);
+
+        /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+        /* Read yb (real), xb(imag) input */
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
+
+        /* Read yd (real), xd(imag) input */
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
+
+        /* T0 = (yb + yd), T1 = (xb + xd) */
+        T0 = __SSAT(T0 + U0, 16U);
+        T1 = __SSAT(T1 + U1, 16U);
+
+        /*  writing the butterfly processed i0 sample */
+        /* xa' = xa + xb + xc + xd */
+        /* ya' = ya + yb + yc + yd */
+        pSrc16[i0 * 2U] = ((R0 >> 1U) + (T0 >> 1U)) >> 1U;
+        pSrc16[(i0 * 2U) + 1U] = ((R1 >> 1U) + (T1 >> 1U)) >> 1U;
+
+        /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
+        R0 = (R0 >> 1U) - (T0 >> 1U);
+        R1 = (R1 >> 1U) - (T1 >> 1U);
+
+        /* (ya-yb+yc-yd)* (si2) - (xa-xb+xc-xd)* co2 */
+        out1 = (q15_t) ((Co2 * R0 - Si2 * R1) >> 16);
+        /* (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
+        out2 = (q15_t) ((Si2 * R0 + Co2 * R1) >> 16);
+
+        /*  Reading i0+3fftLen/4 */
+        /* Read yb (real), xb(imag) input */
+        T0 = pSrc16[i1 * 2U];
+        T1 = pSrc16[(i1 * 2U) + 1U];
+
+        /*  writing the butterfly processed i0 + fftLen/4 sample */
+        /* xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2) */
+        /* yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2) */
+        pSrc16[i1 * 2U] = out1;
+        pSrc16[(i1 * 2U) + 1U] = out2;
+
+        /*  Butterfly calculations */
+        /* Read yd (real), xd(imag) input */
+        U0 = pSrc16[i3 * 2U];
+        U1 = pSrc16[(i3 * 2U) + 1U];
+
+        /* T0 = yb-yd, T1 = xb-xd) */
+        T0 = __SSAT(T0 - U0, 16U);
+        T1 = __SSAT(T1 - U1, 16U);
+
+        /* R0 = (ya-yc) - (xb- xd) , R1 = (xa-xc) + (yb-yd) */
+        R0 = (S0 >> 1U) + (T1 >> 1U);
+        R1 = (S1 >> 1U) - (T0 >> 1U);
+
+        /* S1 = (ya-yc) + (xb- xd), S1 = (xa-xc) - (yb-yd) */
+        S0 = (S0 >> 1U) - (T1 >> 1U);
+        S1 = (S1 >> 1U) + (T0 >> 1U);
+
+        /*  Butterfly process for the i0+fftLen/2 sample */
+        out1 = (q15_t) ((Co1 * S0 - Si1 * S1) >> 16U);
+        out2 = (q15_t) ((Si1 * S0 + Co1 * S1) >> 16U);
+        /* xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1) */
+        /* yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1) */
+        pSrc16[i2 * 2U] = out1;
+        pSrc16[(i2 * 2U) + 1U] = out2;
+
+        /*  Butterfly process for the i0+3fftLen/4 sample */
+        out1 = (q15_t) ((Co3 * R0 - Si3 * R1) >> 16U);
+
+        out2 = (q15_t) ((Si3 * R0 + Co3 * R1) >> 16U);
+        /* xd' = (xa+yb-xc-yd)* Co3 - (ya-xb-yc+xd)* (si3) */
+        /* yd' = (ya-xb-yc+xd)* Co3 + (xa+yb-xc-yd)* (si3) */
+        pSrc16[i3 * 2U] = out1;
+        pSrc16[(i3 * 2U) + 1U] = out2;
+
+
+      }
+    }
+    /*  Twiddle coefficients index modifier */
+    twidCoefModifier <<= 2U;
+  }
+  /*  End of Middle stages process */
+
+
+  /* data is in 10.6(q6) format for the 1024 point */
+  /* data is in 8.8(q8) format for the 256 point   */
+  /* data is in 6.10(q10) format for the 64 point  */
+  /* data is in 4.12(q12) format for the 16 point  */
+
+  /* start of last stage process */
+
+
+  /*  Initializations for the last stage */
+  n1 = n2;
+  n2 >>= 2U;
+
+  /*  Butterfly implementation */
+  for (i0 = 0U; i0 <= (fftLen - n1); i0 += n1)
+  {
+    /*  index calculation for the input as, */
+    /*  pSrc16[i0 + 0], pSrc16[i0 + fftLen/4], pSrc16[i0 + fftLen/2], pSrc16[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /*  Reading i0, i0+fftLen/2 inputs */
+    /* Read ya (real), xa(imag) input */
+    T0 = pSrc16[i0 * 2U];
+    T1 = pSrc16[(i0 * 2U) + 1U];
+    /* Read yc (real), xc(imag) input */
+    S0 = pSrc16[i2 * 2U];
+    S1 = pSrc16[(i2 * 2U) + 1U];
+
+    /* R0 = (ya + yc), R1 = (xa + xc) */
+    R0 = __SSAT(T0 + S0, 16U);
+    R1 = __SSAT(T1 + S1, 16U);
+    /* S0 = (ya - yc), S1 = (xa - xc) */
+    S0 = __SSAT(T0 - S0, 16U);
+    S1 = __SSAT(T1 - S1, 16U);
+
+    /*  Reading i0+fftLen/4 , i0+3fftLen/4 inputs */
+    /* Read yb (real), xb(imag) input */
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
+    /* Read yd (real), xd(imag) input */
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
+
+    /* T0 = (yb + yd), T1 = (xb + xd) */
+    T0 = __SSAT(T0 + U0, 16U);
+    T1 = __SSAT(T1 + U1, 16U);
+
+    /*  writing the butterfly processed i0 sample */
+    /* xa' = xa + xb + xc + xd */
+    /* ya' = ya + yb + yc + yd */
+    pSrc16[i0 * 2U] = (R0 >> 1U) + (T0 >> 1U);
+    pSrc16[(i0 * 2U) + 1U] = (R1 >> 1U) + (T1 >> 1U);
+
+    /* R0 = (ya + yc) - (yb + yd), R1 = (xa + xc) - (xb + xd) */
+    R0 = (R0 >> 1U) - (T0 >> 1U);
+    R1 = (R1 >> 1U) - (T1 >> 1U);
+
+    /* Read yb (real), xb(imag) input */
+    T0 = pSrc16[i1 * 2U];
+    T1 = pSrc16[(i1 * 2U) + 1U];
+
+    /*  writing the butterfly processed i0 + fftLen/4 sample */
+    /* xc' = (xa-xb+xc-xd) */
+    /* yc' = (ya-yb+yc-yd) */
+    pSrc16[i1 * 2U] = R0;
+    pSrc16[(i1 * 2U) + 1U] = R1;
+
+    /* Read yd (real), xd(imag) input */
+    U0 = pSrc16[i3 * 2U];
+    U1 = pSrc16[(i3 * 2U) + 1U];
+    /* T0 = (yb - yd), T1 = (xb - xd) */
+    T0 = __SSAT(T0 - U0, 16U);
+    T1 = __SSAT(T1 - U1, 16U);
+
+    /*  writing the butterfly processed i0 + fftLen/2 sample */
+    /* xb' = (xa-yb-xc+yd) */
+    /* yb' = (ya+xb-yc-xd) */
+    pSrc16[i2 * 2U] = (S0 >> 1U) - (T1 >> 1U);
+    pSrc16[(i2 * 2U) + 1U] = (S1 >> 1U) + (T0 >> 1U);
+
+
+    /*  writing the butterfly processed i0 + 3fftLen/4 sample */
+    /* xd' = (xa+yb-xc-yd) */
+    /* yd' = (ya-xb-yc+xd) */
+    pSrc16[i3 * 2U] = (S0 >> 1U) + (T1 >> 1U);
+    pSrc16[(i3 * 2U) + 1U] = (S1 >> 1U) - (T0 >> 1U);
+  }
+  /* end of last stage  process */
+
+  /* output is in 11.5(q5) format for the 1024 point */
+  /* output is in 9.7(q7) format for the 256 point   */
+  /* output is in 7.9(q9) format for the 64 point  */
+  /* output is in 5.11(q11) format for the 16 point  */
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
index b7ea7e5e..46c1e478 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix4_q31.c
@@ -1,827 +1,827 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix4_q31.c
- * Description:  This file has function definition of Radix-4 FFT & IFFT function and
- *               In-place bit reversal using bit reversal table
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-void arm_radix4_butterfly_inverse_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint32_t twidCoefModifier);
-
-void arm_radix4_butterfly_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint32_t twidCoefModifier);
-
-void arm_bitreversal_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup ComplexFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 CFFT/CIFFT.
-  @deprecated    Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
-  @param[in]     S    points to an instance of the Q31 CFFT/CIFFT structure
-  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
-  @return        none
- 
-  @par Input and output formats:
-                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-                 Hence the output format is different for different FFT sizes.
-                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
-  @par
-                 \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"
-                 \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"
- */
-
-void arm_cfft_radix4_q31(
-  const arm_cfft_radix4_instance_q31 * S,
-        q31_t * pSrc)
-{
-  if (S->ifftFlag == 1U)
-  {
-    /* Complex IFFT radix-4 */
-    arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
-  }
-  else
-  {
-    /* Complex FFT radix-4 */
-    arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
-  }
-
-  if (S->bitReverseFlag == 1U)
-  {
-    /*  Bit Reversal */
-    arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
-  }
-
-}
-
-/**
-  @} end of ComplexFFT group
- */
-
-/*
- * Radix-4 FFT algorithm used is :
- *
- * Input real and imaginary data:
- * x(n) = xa + j * ya
- * x(n+N/4 ) = xb + j * yb
- * x(n+N/2 ) = xc + j * yc
- * x(n+3N 4) = xd + j * yd
- *
- *
- * Output real and imaginary data:
- * x(4r) = xa'+ j * ya'
- * x(4r+1) = xb'+ j * yb'
- * x(4r+2) = xc'+ j * yc'
- * x(4r+3) = xd'+ j * yd'
- *
- *
- * Twiddle factors for radix-4 FFT:
- * Wn = co1 + j * (- si1)
- * W2n = co2 + j * (- si2)
- * W3n = co3 + j * (- si3)
- *
- *  Butterfly implementation:
- * xa' = xa + xb + xc + xd
- * ya' = ya + yb + yc + yd
- * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
- * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
- * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
- * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
- * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
- * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
- *
- */
-
-/**
-  @brief         Core function for the Q31 CFFT butterfly process.
-  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
-  @param[in]     fftLen           length of the FFT.
-  @param[in]     pCoef            points to twiddle coefficient buffer.
-  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-  @return        none
- */
-
-void arm_radix4_butterfly_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint32_t twidCoefModifier)
-{
-        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-        
-        q31_t xa, xb, xc, xd;
-        q31_t ya, yb, yc, yd;
-        q31_t xa_out, xb_out, xc_out, xd_out;
-        q31_t ya_out, yb_out, yc_out, yd_out;
-        
-        q31_t *ptr1;
-
-  /* Total process is divided into three stages */
-
-  /* process first stage, middle stages, & last stage */
-
-
-  /* start of first stage process */
-
-  /*  Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-  i0 = 0U;
-  ia1 = 0U;
-
-  j = n2;
-
-  /*  Calculation of first stage */
-  do
-  {
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U);
-    /* xa - xc */
-    r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U);
-
-    /* xb + xd */
-    t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U);
-
-    /* ya + yc */
-    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
-    /* ya - yc */
-    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2U * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);
-
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2U * i0) + 1U] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
-    /* xb - xd */
-    t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2U * ia1;
-    co2 = pCoef[(ia2 * 2U)];
-    si2 = pCoef[(ia2 * 2U) + 1U];
-
-    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-    pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
-
-    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-    pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
-
-    /* (xa - xc) + (yb - yd) */
-    r1 = r2 + t1;
-    /* (xa - xc) - (yb - yd) */
-    r2 = r2 - t1;
-
-    /* (ya - yc) - (xb - xd) */
-    s1 = s2 - t2;
-    /* (ya - yc) + (xb - xd) */
-    s2 = s2 + t2;
-
-    co1 = pCoef[(ia1 * 2U)];
-    si1 = pCoef[(ia1 * 2U) + 1U];
-
-    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-    pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
-
-    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-    pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3U * ia1;
-    co3 = pCoef[(ia3 * 2U)];
-    si3 = pCoef[(ia3 * 2U) + 1U];
-
-    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-    pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
-
-    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-    pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1U;
-
-  } while (--j);
-
-  /* end of first stage process */
-
-  /* data is in 5.27(q27) format */
-
-
-  /* start of Middle stages process */
-
-
-  /* each stage in middle stages provides two down scaling of the input */
-
-  twidCoefModifier <<= 2U;
-
-
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ia1 = 0U;
-
-    /*  Calculation of first stage */
-    for (j = 0U; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[(ia1 * 2U)];
-      si1 = pCoef[(ia1 * 2U) + 1U];
-      co2 = pCoef[(ia2 * 2U)];
-      si2 = pCoef[(ia2 * 2U) + 1U];
-      co3 = pCoef[(ia3 * 2U)];
-      si3 = pCoef[(ia3 * 2U) + 1U];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2U * i0] + pSrc[2U * i2];
-        /* xa - xc */
-        r2 = pSrc[2U * i0] - pSrc[2U * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
-        /* ya - yc */
-        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
-
-        /* xb + xd */
-        t1 = pSrc[2U * i1] + pSrc[2U * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2U * i0] = (r1 + t1) >> 2U;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-
-        /* yb + yd */
-        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
-        /* (xb - xd) */
-        t2 = pSrc[2U * i1] - pSrc[2U * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
-        pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U;
-
-        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
-        pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U;
-
-        /* (xa - xc) + (yb - yd) */
-        r1 = r2 + t1;
-        /* (xa - xc) - (yb - yd) */
-        r2 = r2 - t1;
-
-        /* (ya - yc) -  (xb - xd) */
-        s1 = s2 - t2;
-        /* (ya - yc) +  (xb - xd) */
-        s2 = s2 + t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
-        pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
-
-        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
-        pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
-
-        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
-        pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
-                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
-
-        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
-        pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
-      }
-    }
-    twidCoefModifier <<= 2U;
-  }
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* start of Last stage process */
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xa = *ptr1++;
-    ya = *ptr1++;
-
-    /* Read xb (real), yb(imag) input */
-    xb = *ptr1++;
-    yb = *ptr1++;
-
-    /* Read xc (real), yc(imag) input */
-    xc = *ptr1++;
-    yc = *ptr1++;
-
-    /* Read xc (real), yc(imag) input */
-    xd = *ptr1++;
-    yd = *ptr1++;
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8U;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa + yb - xc - yd);
-    yb_out = (ya - xb - yc + xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa - yb - xc + yd);
-    yd_out = (ya + xb - yc - xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-
-  } while (--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-
-}
-
-
-/**
-  @brief         Core function for the Q31 CIFFT butterfly process.
-  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
-  @param[in]     fftLen           length of the FFT.
-  @param[in]     pCoef            points to twiddle coefficient buffer.
-  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-  @return        none
- */
-
-/*
- * Radix-4 IFFT algorithm used is :
- *
- * CIFFT uses same twiddle coefficients as CFFT Function
- *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
- *
- *
- * IFFT is implemented with following changes in equations from FFT
- *
- * Input real and imaginary data:
- * x(n) = xa + j * ya
- * x(n+N/4 ) = xb + j * yb
- * x(n+N/2 ) = xc + j * yc
- * x(n+3N 4) = xd + j * yd
- *
- *
- * Output real and imaginary data:
- * x(4r) = xa'+ j * ya'
- * x(4r+1) = xb'+ j * yb'
- * x(4r+2) = xc'+ j * yc'
- * x(4r+3) = xd'+ j * yd'
- *
- *
- * Twiddle factors for radix-4 IFFT:
- * Wn = co1 + j * (si1)
- * W2n = co2 + j * (si2)
- * W3n = co3 + j * (si3)
- 
- * The real and imaginary output values for the radix-4 butterfly are
- * xa' = xa + xb + xc + xd
- * ya' = ya + yb + yc + yd
- * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
- * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
- * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
- * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
- * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
- * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
- *
- */
-
-void arm_radix4_butterfly_inverse_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pCoef,
-        uint32_t twidCoefModifier)
-{
-        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
-        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
-        q31_t xa, xb, xc, xd;
-        q31_t ya, yb, yc, yd;
-        q31_t xa_out, xb_out, xc_out, xd_out;
-        q31_t ya_out, yb_out, yc_out, yd_out;
-        
-        q31_t *ptr1;
-
-  /* input is be 1.31(q31) format for all FFT sizes */
-  /* Total process is divided into three stages */
-  /* process first stage, middle stages, & last stage */
-
-  /* Start of first stage process */
-
-  /* Initializations for the first stage */
-  n2 = fftLen;
-  n1 = n2;
-  /* n2 = fftLen/4 */
-  n2 >>= 2U;
-  i0 = 0U;
-  ia1 = 0U;
-
-  j = n2;
-
-  do
-  {
-    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
-
-    /*  index calculation for the input as, */
-    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
-    i1 = i0 + n2;
-    i2 = i1 + n2;
-    i3 = i2 + n2;
-
-    /*  Butterfly implementation */
-    /* xa + xc */
-    r1 = (pSrc[2U * i0] >> 4U) + (pSrc[2U * i2] >> 4U);
-    /* xa - xc */
-    r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U);
-
-    /* xb + xd */
-    t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U);
-
-    /* ya + yc */
-    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
-    /* ya - yc */
-    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);
-
-    /* xa' = xa + xb + xc + xd */
-    pSrc[2U * i0] = (r1 + t1);
-    /* (xa + xc) - (xb + xd) */
-    r1 = r1 - t1;
-    /* yb + yd */
-    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);
-    /* ya' = ya + yb + yc + yd */
-    pSrc[(2U * i0) + 1U] = (s1 + t2);
-
-    /* (ya + yc) - (yb + yd) */
-    s1 = s1 - t2;
-
-    /* yb - yd */
-    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
-    /* xb - xd */
-    t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U);
-
-    /*  index calculation for the coefficients */
-    ia2 = 2U * ia1;
-    co2 = pCoef[ia2 * 2U];
-    si2 = pCoef[(ia2 * 2U) + 1U];
-
-    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-    pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
-
-    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-    pSrc[2U * i1 + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
-                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
-
-    /* (xa - xc) - (yb - yd) */
-    r1 = r2 - t1;
-    /* (xa - xc) + (yb - yd) */
-    r2 = r2 + t1;
-
-    /* (ya - yc) + (xb - xd) */
-    s1 = s2 + t2;
-    /* (ya - yc) - (xb - xd) */
-    s2 = s2 - t2;
-
-    co1 = pCoef[ia1 * 2U];
-    si1 = pCoef[(ia1 * 2U) + 1U];
-
-    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-    pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
-
-    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-    pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
-
-    /*  index calculation for the coefficients */
-    ia3 = 3U * ia1;
-    co3 = pCoef[ia3 * 2U];
-    si3 = pCoef[(ia3 * 2U) + 1U];
-
-    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-    pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
-
-    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-    pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
-
-    /*  Twiddle coefficients index modifier */
-    ia1 = ia1 + twidCoefModifier;
-
-    /*  Updating input index */
-    i0 = i0 + 1U;
-
-  } while (--j);
-
-  /* data is in 5.27(q27) format */
-  /* each stage provides two down scaling of the input */
-
-
-  /* Start of Middle stages process */
-
-  twidCoefModifier <<= 2U;
-
-  /*  Calculation of second stage to excluding last stage */
-  for (k = fftLen / 4U; k > 4U; k >>= 2U)
-  {
-    /*  Initializations for the first stage */
-    n1 = n2;
-    n2 >>= 2U;
-    ia1 = 0U;
-
-    for (j = 0; j <= (n2 - 1U); j++)
-    {
-      /*  index calculation for the coefficients */
-      ia2 = ia1 + ia1;
-      ia3 = ia2 + ia1;
-      co1 = pCoef[(ia1 * 2U)];
-      si1 = pCoef[(ia1 * 2U) + 1U];
-      co2 = pCoef[(ia2 * 2U)];
-      si2 = pCoef[(ia2 * 2U) + 1U];
-      co3 = pCoef[(ia3 * 2U)];
-      si3 = pCoef[(ia3 * 2U) + 1U];
-      /*  Twiddle coefficients index modifier */
-      ia1 = ia1 + twidCoefModifier;
-
-      for (i0 = j; i0 < fftLen; i0 += n1)
-      {
-        /*  index calculation for the input as, */
-        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
-        i1 = i0 + n2;
-        i2 = i1 + n2;
-        i3 = i2 + n2;
-
-        /*  Butterfly implementation */
-        /* xa + xc */
-        r1 = pSrc[2U * i0] + pSrc[2U * i2];
-        /* xa - xc */
-        r2 = pSrc[2U * i0] - pSrc[2U * i2];
-
-        /* ya + yc */
-        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
-        /* ya - yc */
-        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
-
-        /* xb + xd */
-        t1 = pSrc[2U * i1] + pSrc[2U * i3];
-
-        /* xa' = xa + xb + xc + xd */
-        pSrc[2U * i0] = (r1 + t1) >> 2U;
-        /* xa + xc -(xb + xd) */
-        r1 = r1 - t1;
-        /* yb + yd */
-        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
-        /* ya' = ya + yb + yc + yd */
-        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;
-
-        /* (ya + yc) - (yb + yd) */
-        s1 = s1 - t2;
-
-        /* (yb - yd) */
-        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
-        /* (xb - xd) */
-        t2 = pSrc[2U * i1] - pSrc[2U * i3];
-
-        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
-        pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32U)) -
-                         ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U;
-
-        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
-        pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
-                                ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
-
-        /* (xa - xc) - (yb - yd) */
-        r1 = r2 - t1;
-        /* (xa - xc) + (yb - yd) */
-        r2 = r2 + t1;
-
-        /* (ya - yc) +  (xb - xd) */
-        s1 = s2 + t2;
-        /* (ya - yc) -  (xb - xd) */
-        s2 = s2 - t2;
-
-        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
-        pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
-                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
-
-        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
-        pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
-                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
-
-        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
-        pSrc[(2U * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
-                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
-
-        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
-        pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
-                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
-      }
-    }
-    twidCoefModifier <<= 2U;
-  }
-
-  /* End of Middle stages process */
-
-  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
-  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
-  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
-  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
-
-
-  /* Start of last stage process */
-
-
-  /*  Initializations for the last stage */
-  j = fftLen >> 2;
-  ptr1 = &pSrc[0];
-
-  /*  Calculations of last stage */
-  do
-  {
-    /* Read xa (real), ya(imag) input */
-    xa = *ptr1++;
-    ya = *ptr1++;
-
-    /* Read xb (real), yb(imag) input */
-    xb = *ptr1++;
-    yb = *ptr1++;
-
-    /* Read xc (real), yc(imag) input */
-    xc = *ptr1++;
-    yc = *ptr1++;
-
-    /* Read xc (real), yc(imag) input */
-    xd = *ptr1++;
-    yd = *ptr1++;
-
-    /* xa' = xa + xb + xc + xd */
-    xa_out = xa + xb + xc + xd;
-
-    /* ya' = ya + yb + yc + yd */
-    ya_out = ya + yb + yc + yd;
-
-    /* pointer updation for writing */
-    ptr1 = ptr1 - 8U;
-
-    /* writing xa' and ya' */
-    *ptr1++ = xa_out;
-    *ptr1++ = ya_out;
-
-    xc_out = (xa - xb + xc - xd);
-    yc_out = (ya - yb + yc - yd);
-
-    /* writing xc' and yc' */
-    *ptr1++ = xc_out;
-    *ptr1++ = yc_out;
-
-    xb_out = (xa - yb - xc + yd);
-    yb_out = (ya + xb - yc - xd);
-
-    /* writing xb' and yb' */
-    *ptr1++ = xb_out;
-    *ptr1++ = yb_out;
-
-    xd_out = (xa + yb - xc - yd);
-    yd_out = (ya - xb - yc + xd);
-
-    /* writing xd' and yd' */
-    *ptr1++ = xd_out;
-    *ptr1++ = yd_out;
-
-  } while (--j);
-
-  /* output is in 11.21(q21) format for the 1024 point */
-  /* output is in 9.23(q23) format for the 256 point */
-  /* output is in 7.25(q25) format for the 64 point */
-  /* output is in 5.27(q27) format for the 16 point */
-
-  /* End of last stage process */
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix4_q31.c
+ * Description:  This file has function definition of Radix-4 FFT & IFFT function and
+ *               In-place bit reversal using bit reversal table
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+void arm_radix4_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+void arm_radix4_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier);
+
+void arm_bitreversal_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup ComplexFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 CFFT/CIFFT.
+  @deprecated    Do not use this function.  It has been superseded by \ref arm_cfft_q31 and will be removed in the future.
+  @param[in]     S    points to an instance of the Q31 CFFT/CIFFT structure
+  @param[in,out] pSrc points to the complex data buffer of size <code>2*fftLen</code>. Processing occurs in-place
+  @return        none
+ 
+  @par Input and output formats:
+                 Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                 Hence the output format is different for different FFT sizes.
+                 The input and output formats for different FFT sizes and number of bits to upscale are mentioned in the tables below for CFFT and CIFFT:
+  @par
+                 \image html CFFTQ31.gif "Input and Output Formats for Q31 CFFT"
+                 \image html CIFFTQ31.gif "Input and Output Formats for Q31 CIFFT"
+ */
+
+void arm_cfft_radix4_q31(
+  const arm_cfft_radix4_instance_q31 * S,
+        q31_t * pSrc)
+{
+  if (S->ifftFlag == 1U)
+  {
+    /* Complex IFFT radix-4 */
+    arm_radix4_butterfly_inverse_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+  else
+  {
+    /* Complex FFT radix-4 */
+    arm_radix4_butterfly_q31(pSrc, S->fftLen, S->pTwiddle, S->twidCoefModifier);
+  }
+
+  if (S->bitReverseFlag == 1U)
+  {
+    /*  Bit Reversal */
+    arm_bitreversal_q31(pSrc, S->fftLen, S->bitRevFactor, S->pBitRevTable);
+  }
+
+}
+
+/**
+  @} end of ComplexFFT group
+ */
+
+/*
+ * Radix-4 FFT algorithm used is :
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 FFT:
+ * Wn = co1 + j * (- si1)
+ * W2n = co2 + j * (- si2)
+ * W3n = co3 + j * (- si3)
+ *
+ *  Butterfly implementation:
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa+yb-xc-yd)* co1 + (ya-xb-yc+xd)* (si1)
+ * yb' = (ya-xb-yc+xd)* co1 - (xa+yb-xc-yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 + (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 - (xa-xb+xc-xd)* (si2)
+ * xd' = (xa-yb-xc+yd)* co3 + (ya+xb-yc-xd)* (si3)
+ * yd' = (ya+xb-yc-xd)* co3 - (xa-yb-xc+yd)* (si3)
+ *
+ */
+
+/**
+  @brief         Core function for the Q31 CFFT butterfly process.
+  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
+  @param[in]     fftLen           length of the FFT.
+  @param[in]     pCoef            points to twiddle coefficient buffer.
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
+ */
+
+void arm_radix4_butterfly_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier)
+{
+        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+        
+        q31_t xa, xb, xc, xd;
+        q31_t ya, yb, yc, yd;
+        q31_t xa_out, xb_out, xc_out, xd_out;
+        q31_t ya_out, yb_out, yc_out, yd_out;
+        
+        q31_t *ptr1;
+
+  /* Total process is divided into three stages */
+
+  /* process first stage, middle stages, & last stage */
+
+
+  /* start of first stage process */
+
+  /*  Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+  i0 = 0U;
+  ia1 = 0U;
+
+  j = n2;
+
+  /*  Calculation of first stage */
+  do
+  {
+    /*  index calculation for the input as, */
+    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
+
+    /*  Butterfly implementation */
+    /* xa + xc */
+    r1 = (pSrc[(2U * i0)] >> 4U) + (pSrc[(2U * i2)] >> 4U);
+    /* xa - xc */
+    r2 = (pSrc[(2U * i0)] >> 4U) - (pSrc[(2U * i2)] >> 4U);
+
+    /* xb + xd */
+    t1 = (pSrc[(2U * i1)] >> 4U) + (pSrc[(2U * i3)] >> 4U);
+
+    /* ya + yc */
+    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
+    /* ya - yc */
+    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);
+
+    /* xa' = xa + xb + xc + xd */
+    pSrc[2U * i0] = (r1 + t1);
+    /* (xa + xc) - (xb + xd) */
+    r1 = r1 - t1;
+    /* yb + yd */
+    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);
+
+    /* ya' = ya + yb + yc + yd */
+    pSrc[(2U * i0) + 1U] = (s1 + t2);
+
+    /* (ya + yc) - (yb + yd) */
+    s1 = s1 - t2;
+
+    /* yb - yd */
+    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
+    /* xb - xd */
+    t2 = (pSrc[(2U * i1)] >> 4U) - (pSrc[(2U * i3)] >> 4U);
+
+    /*  index calculation for the coefficients */
+    ia2 = 2U * ia1;
+    co2 = pCoef[(ia2 * 2U)];
+    si2 = pCoef[(ia2 * 2U) + 1U];
+
+    /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+    pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
+                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
+
+    /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+    pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
+                            ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
+
+    /* (xa - xc) + (yb - yd) */
+    r1 = r2 + t1;
+    /* (xa - xc) - (yb - yd) */
+    r2 = r2 - t1;
+
+    /* (ya - yc) - (xb - xd) */
+    s1 = s2 - t2;
+    /* (ya - yc) + (xb - xd) */
+    s2 = s2 + t2;
+
+    co1 = pCoef[(ia1 * 2U)];
+    si1 = pCoef[(ia1 * 2U) + 1U];
+
+    /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+    pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
+                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
+
+    /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+    pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
+                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
+
+    /*  index calculation for the coefficients */
+    ia3 = 3U * ia1;
+    co3 = pCoef[(ia3 * 2U)];
+    si3 = pCoef[(ia3 * 2U) + 1U];
+
+    /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+    pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
+                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
+
+    /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+    pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
+                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
+
+    /*  Twiddle coefficients index modifier */
+    ia1 = ia1 + twidCoefModifier;
+
+    /*  Updating input index */
+    i0 = i0 + 1U;
+
+  } while (--j);
+
+  /* end of first stage process */
+
+  /* data is in 5.27(q27) format */
+
+
+  /* start of Middle stages process */
+
+
+  /* each stage in middle stages provides two down scaling of the input */
+
+  twidCoefModifier <<= 2U;
+
+
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the first stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ia1 = 0U;
+
+    /*  Calculation of first stage */
+    for (j = 0U; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      ia3 = ia2 + ia1;
+      co1 = pCoef[(ia1 * 2U)];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+      co2 = pCoef[(ia2 * 2U)];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+      co3 = pCoef[(ia3 * 2U)];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+      /*  Twiddle coefficients index modifier */
+      ia1 = ia1 + twidCoefModifier;
+
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  index calculation for the input as, */
+        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+        i1 = i0 + n2;
+        i2 = i1 + n2;
+        i3 = i2 + n2;
+
+        /*  Butterfly implementation */
+        /* xa + xc */
+        r1 = pSrc[2U * i0] + pSrc[2U * i2];
+        /* xa - xc */
+        r2 = pSrc[2U * i0] - pSrc[2U * i2];
+
+        /* ya + yc */
+        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+        /* ya - yc */
+        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+        /* xb + xd */
+        t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+        /* xa' = xa + xb + xc + xd */
+        pSrc[2U * i0] = (r1 + t1) >> 2U;
+        /* xa + xc -(xb + xd) */
+        r1 = r1 - t1;
+
+        /* yb + yd */
+        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+        /* ya' = ya + yb + yc + yd */
+        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;
+
+        /* (ya + yc) - (yb + yd) */
+        s1 = s1 - t2;
+
+        /* (yb - yd) */
+        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+        /* (xb - xd) */
+        t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+        /* xc' = (xa-xb+xc-xd)co2 + (ya-yb+yc-yd)(si2) */
+        pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) +
+                         ((int32_t) (((q63_t) s1 * si2) >> 32))) >> 1U;
+
+        /* yc' = (ya-yb+yc-yd)co2 - (xa-xb+xc-xd)(si2) */
+        pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) -
+                                ((int32_t) (((q63_t) r1 * si2) >> 32))) >> 1U;
+
+        /* (xa - xc) + (yb - yd) */
+        r1 = r2 + t1;
+        /* (xa - xc) - (yb - yd) */
+        r2 = r2 - t1;
+
+        /* (ya - yc) -  (xb - xd) */
+        s1 = s2 - t2;
+        /* (ya - yc) +  (xb - xd) */
+        s2 = s2 + t2;
+
+        /* xb' = (xa+yb-xc-yd)co1 + (ya-xb-yc+xd)(si1) */
+        pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) +
+                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
+
+        /* yb' = (ya-xb-yc+xd)co1 - (xa+yb-xc-yd)(si1) */
+        pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) -
+                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
+
+        /* xd' = (xa-yb-xc+yd)co3 + (ya+xb-yc-xd)(si3) */
+        pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) +
+                         ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
+
+        /* yd' = (ya+xb-yc-xd)co3 - (xa-yb-xc+yd)(si3) */
+        pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) -
+                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
+      }
+    }
+    twidCoefModifier <<= 2U;
+  }
+
+  /* End of Middle stages process */
+
+  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
+  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
+  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
+  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
+
+
+  /* start of Last stage process */
+  /*  Initializations for the last stage */
+  j = fftLen >> 2;
+  ptr1 = &pSrc[0];
+
+  /*  Calculations of last stage */
+  do
+  {
+    /* Read xa (real), ya(imag) input */
+    xa = *ptr1++;
+    ya = *ptr1++;
+
+    /* Read xb (real), yb(imag) input */
+    xb = *ptr1++;
+    yb = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xc = *ptr1++;
+    yc = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xd = *ptr1++;
+    yd = *ptr1++;
+
+    /* xa' = xa + xb + xc + xd */
+    xa_out = xa + xb + xc + xd;
+
+    /* ya' = ya + yb + yc + yd */
+    ya_out = ya + yb + yc + yd;
+
+    /* pointer updation for writing */
+    ptr1 = ptr1 - 8U;
+
+    /* writing xa' and ya' */
+    *ptr1++ = xa_out;
+    *ptr1++ = ya_out;
+
+    xc_out = (xa - xb + xc - xd);
+    yc_out = (ya - yb + yc - yd);
+
+    /* writing xc' and yc' */
+    *ptr1++ = xc_out;
+    *ptr1++ = yc_out;
+
+    xb_out = (xa + yb - xc - yd);
+    yb_out = (ya - xb - yc + xd);
+
+    /* writing xb' and yb' */
+    *ptr1++ = xb_out;
+    *ptr1++ = yb_out;
+
+    xd_out = (xa - yb - xc + yd);
+    yd_out = (ya + xb - yc - xd);
+
+    /* writing xd' and yd' */
+    *ptr1++ = xd_out;
+    *ptr1++ = yd_out;
+
+
+  } while (--j);
+
+  /* output is in 11.21(q21) format for the 1024 point */
+  /* output is in 9.23(q23) format for the 256 point */
+  /* output is in 7.25(q25) format for the 64 point */
+  /* output is in 5.27(q27) format for the 16 point */
+
+  /* End of last stage process */
+
+}
+
+
+/**
+  @brief         Core function for the Q31 CIFFT butterfly process.
+  @param[in,out] pSrc             points to the in-place buffer of Q31 data type.
+  @param[in]     fftLen           length of the FFT.
+  @param[in]     pCoef            points to twiddle coefficient buffer.
+  @param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  @return        none
+ */
+
+/*
+ * Radix-4 IFFT algorithm used is :
+ *
+ * CIFFT uses same twiddle coefficients as CFFT Function
+ *  x[k] = x[n] + (j)k * x[n + fftLen/4] + (-1)k * x[n+fftLen/2] + (-j)k * x[n+3*fftLen/4]
+ *
+ *
+ * IFFT is implemented with following changes in equations from FFT
+ *
+ * Input real and imaginary data:
+ * x(n) = xa + j * ya
+ * x(n+N/4 ) = xb + j * yb
+ * x(n+N/2 ) = xc + j * yc
+ * x(n+3N 4) = xd + j * yd
+ *
+ *
+ * Output real and imaginary data:
+ * x(4r) = xa'+ j * ya'
+ * x(4r+1) = xb'+ j * yb'
+ * x(4r+2) = xc'+ j * yc'
+ * x(4r+3) = xd'+ j * yd'
+ *
+ *
+ * Twiddle factors for radix-4 IFFT:
+ * Wn = co1 + j * (si1)
+ * W2n = co2 + j * (si2)
+ * W3n = co3 + j * (si3)
+ 
+ * The real and imaginary output values for the radix-4 butterfly are
+ * xa' = xa + xb + xc + xd
+ * ya' = ya + yb + yc + yd
+ * xb' = (xa-yb-xc+yd)* co1 - (ya+xb-yc-xd)* (si1)
+ * yb' = (ya+xb-yc-xd)* co1 + (xa-yb-xc+yd)* (si1)
+ * xc' = (xa-xb+xc-xd)* co2 - (ya-yb+yc-yd)* (si2)
+ * yc' = (ya-yb+yc-yd)* co2 + (xa-xb+xc-xd)* (si2)
+ * xd' = (xa+yb-xc-yd)* co3 - (ya-xb-yc+xd)* (si3)
+ * yd' = (ya-xb-yc+xd)* co3 + (xa+yb-xc-yd)* (si3)
+ *
+ */
+
+void arm_radix4_butterfly_inverse_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pCoef,
+        uint32_t twidCoefModifier)
+{
+        uint32_t n1, n2, ia1, ia2, ia3, i0, i1, i2, i3, j, k;
+        q31_t t1, t2, r1, r2, s1, s2, co1, co2, co3, si1, si2, si3;
+        q31_t xa, xb, xc, xd;
+        q31_t ya, yb, yc, yd;
+        q31_t xa_out, xb_out, xc_out, xd_out;
+        q31_t ya_out, yb_out, yc_out, yd_out;
+        
+        q31_t *ptr1;
+
+  /* input is be 1.31(q31) format for all FFT sizes */
+  /* Total process is divided into three stages */
+  /* process first stage, middle stages, & last stage */
+
+  /* Start of first stage process */
+
+  /* Initializations for the first stage */
+  n2 = fftLen;
+  n1 = n2;
+  /* n2 = fftLen/4 */
+  n2 >>= 2U;
+  i0 = 0U;
+  ia1 = 0U;
+
+  j = n2;
+
+  do
+  {
+    /* input is in 1.31(q31) format and provide 4 guard bits for the input */
+
+    /*  index calculation for the input as, */
+    /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+    i1 = i0 + n2;
+    i2 = i1 + n2;
+    i3 = i2 + n2;
+
+    /*  Butterfly implementation */
+    /* xa + xc */
+    r1 = (pSrc[2U * i0] >> 4U) + (pSrc[2U * i2] >> 4U);
+    /* xa - xc */
+    r2 = (pSrc[2U * i0] >> 4U) - (pSrc[2U * i2] >> 4U);
+
+    /* xb + xd */
+    t1 = (pSrc[2U * i1] >> 4U) + (pSrc[2U * i3] >> 4U);
+
+    /* ya + yc */
+    s1 = (pSrc[(2U * i0) + 1U] >> 4U) + (pSrc[(2U * i2) + 1U] >> 4U);
+    /* ya - yc */
+    s2 = (pSrc[(2U * i0) + 1U] >> 4U) - (pSrc[(2U * i2) + 1U] >> 4U);
+
+    /* xa' = xa + xb + xc + xd */
+    pSrc[2U * i0] = (r1 + t1);
+    /* (xa + xc) - (xb + xd) */
+    r1 = r1 - t1;
+    /* yb + yd */
+    t2 = (pSrc[(2U * i1) + 1U] >> 4U) + (pSrc[(2U * i3) + 1U] >> 4U);
+    /* ya' = ya + yb + yc + yd */
+    pSrc[(2U * i0) + 1U] = (s1 + t2);
+
+    /* (ya + yc) - (yb + yd) */
+    s1 = s1 - t2;
+
+    /* yb - yd */
+    t1 = (pSrc[(2U * i1) + 1U] >> 4U) - (pSrc[(2U * i3) + 1U] >> 4U);
+    /* xb - xd */
+    t2 = (pSrc[2U * i1] >> 4U) - (pSrc[2U * i3] >> 4U);
+
+    /*  index calculation for the coefficients */
+    ia2 = 2U * ia1;
+    co2 = pCoef[ia2 * 2U];
+    si2 = pCoef[(ia2 * 2U) + 1U];
+
+    /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+    pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32)) -
+                     ((int32_t) (((q63_t) s1 * si2) >> 32))) << 1U;
+
+    /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+    pSrc[2U * i1 + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32)) +
+                          ((int32_t) (((q63_t) r1 * si2) >> 32))) << 1U;
+
+    /* (xa - xc) - (yb - yd) */
+    r1 = r2 - t1;
+    /* (xa - xc) + (yb - yd) */
+    r2 = r2 + t1;
+
+    /* (ya - yc) + (xb - xd) */
+    s1 = s2 + t2;
+    /* (ya - yc) - (xb - xd) */
+    s2 = s2 - t2;
+
+    co1 = pCoef[ia1 * 2U];
+    si1 = pCoef[(ia1 * 2U) + 1U];
+
+    /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+    pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
+                     ((int32_t) (((q63_t) s1 * si1) >> 32))) << 1U;
+
+    /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+    pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
+                            ((int32_t) (((q63_t) r1 * si1) >> 32))) << 1U;
+
+    /*  index calculation for the coefficients */
+    ia3 = 3U * ia1;
+    co3 = pCoef[ia3 * 2U];
+    si3 = pCoef[(ia3 * 2U) + 1U];
+
+    /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+    pSrc[2U * i3] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
+                     ((int32_t) (((q63_t) s2 * si3) >> 32))) << 1U;
+
+    /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+    pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
+                            ((int32_t) (((q63_t) r2 * si3) >> 32))) << 1U;
+
+    /*  Twiddle coefficients index modifier */
+    ia1 = ia1 + twidCoefModifier;
+
+    /*  Updating input index */
+    i0 = i0 + 1U;
+
+  } while (--j);
+
+  /* data is in 5.27(q27) format */
+  /* each stage provides two down scaling of the input */
+
+
+  /* Start of Middle stages process */
+
+  twidCoefModifier <<= 2U;
+
+  /*  Calculation of second stage to excluding last stage */
+  for (k = fftLen / 4U; k > 4U; k >>= 2U)
+  {
+    /*  Initializations for the first stage */
+    n1 = n2;
+    n2 >>= 2U;
+    ia1 = 0U;
+
+    for (j = 0; j <= (n2 - 1U); j++)
+    {
+      /*  index calculation for the coefficients */
+      ia2 = ia1 + ia1;
+      ia3 = ia2 + ia1;
+      co1 = pCoef[(ia1 * 2U)];
+      si1 = pCoef[(ia1 * 2U) + 1U];
+      co2 = pCoef[(ia2 * 2U)];
+      si2 = pCoef[(ia2 * 2U) + 1U];
+      co3 = pCoef[(ia3 * 2U)];
+      si3 = pCoef[(ia3 * 2U) + 1U];
+      /*  Twiddle coefficients index modifier */
+      ia1 = ia1 + twidCoefModifier;
+
+      for (i0 = j; i0 < fftLen; i0 += n1)
+      {
+        /*  index calculation for the input as, */
+        /*  pSrc[i0 + 0], pSrc[i0 + fftLen/4], pSrc[i0 + fftLen/2U], pSrc[i0 + 3fftLen/4] */
+        i1 = i0 + n2;
+        i2 = i1 + n2;
+        i3 = i2 + n2;
+
+        /*  Butterfly implementation */
+        /* xa + xc */
+        r1 = pSrc[2U * i0] + pSrc[2U * i2];
+        /* xa - xc */
+        r2 = pSrc[2U * i0] - pSrc[2U * i2];
+
+        /* ya + yc */
+        s1 = pSrc[(2U * i0) + 1U] + pSrc[(2U * i2) + 1U];
+        /* ya - yc */
+        s2 = pSrc[(2U * i0) + 1U] - pSrc[(2U * i2) + 1U];
+
+        /* xb + xd */
+        t1 = pSrc[2U * i1] + pSrc[2U * i3];
+
+        /* xa' = xa + xb + xc + xd */
+        pSrc[2U * i0] = (r1 + t1) >> 2U;
+        /* xa + xc -(xb + xd) */
+        r1 = r1 - t1;
+        /* yb + yd */
+        t2 = pSrc[(2U * i1) + 1U] + pSrc[(2U * i3) + 1U];
+        /* ya' = ya + yb + yc + yd */
+        pSrc[(2U * i0) + 1U] = (s1 + t2) >> 2U;
+
+        /* (ya + yc) - (yb + yd) */
+        s1 = s1 - t2;
+
+        /* (yb - yd) */
+        t1 = pSrc[(2U * i1) + 1U] - pSrc[(2U * i3) + 1U];
+        /* (xb - xd) */
+        t2 = pSrc[2U * i1] - pSrc[2U * i3];
+
+        /* xc' = (xa-xb+xc-xd)co2 - (ya-yb+yc-yd)(si2) */
+        pSrc[2U * i1] = (((int32_t) (((q63_t) r1 * co2) >> 32U)) -
+                         ((int32_t) (((q63_t) s1 * si2) >> 32U))) >> 1U;
+
+        /* yc' = (ya-yb+yc-yd)co2 + (xa-xb+xc-xd)(si2) */
+        pSrc[(2U * i1) + 1U] = (((int32_t) (((q63_t) s1 * co2) >> 32U)) +
+                                ((int32_t) (((q63_t) r1 * si2) >> 32U))) >> 1U;
+
+        /* (xa - xc) - (yb - yd) */
+        r1 = r2 - t1;
+        /* (xa - xc) + (yb - yd) */
+        r2 = r2 + t1;
+
+        /* (ya - yc) +  (xb - xd) */
+        s1 = s2 + t2;
+        /* (ya - yc) -  (xb - xd) */
+        s2 = s2 - t2;
+
+        /* xb' = (xa+yb-xc-yd)co1 - (ya-xb-yc+xd)(si1) */
+        pSrc[2U * i2] = (((int32_t) (((q63_t) r1 * co1) >> 32)) -
+                         ((int32_t) (((q63_t) s1 * si1) >> 32))) >> 1U;
+
+        /* yb' = (ya-xb-yc+xd)co1 + (xa+yb-xc-yd)(si1) */
+        pSrc[(2U * i2) + 1U] = (((int32_t) (((q63_t) s1 * co1) >> 32)) +
+                                ((int32_t) (((q63_t) r1 * si1) >> 32))) >> 1U;
+
+        /* xd' = (xa-yb-xc+yd)co3 - (ya+xb-yc-xd)(si3) */
+        pSrc[(2U * i3)] = (((int32_t) (((q63_t) r2 * co3) >> 32)) -
+                           ((int32_t) (((q63_t) s2 * si3) >> 32))) >> 1U;
+
+        /* yd' = (ya+xb-yc-xd)co3 + (xa-yb-xc+yd)(si3) */
+        pSrc[(2U * i3) + 1U] = (((int32_t) (((q63_t) s2 * co3) >> 32)) +
+                                ((int32_t) (((q63_t) r2 * si3) >> 32))) >> 1U;
+      }
+    }
+    twidCoefModifier <<= 2U;
+  }
+
+  /* End of Middle stages process */
+
+  /* data is in 11.21(q21) format for the 1024 point as there are 3 middle stages */
+  /* data is in 9.23(q23) format for the 256 point as there are 2 middle stages */
+  /* data is in 7.25(q25) format for the 64 point as there are 1 middle stage */
+  /* data is in 5.27(q27) format for the 16 point as there are no middle stages */
+
+
+  /* Start of last stage process */
+
+
+  /*  Initializations for the last stage */
+  j = fftLen >> 2;
+  ptr1 = &pSrc[0];
+
+  /*  Calculations of last stage */
+  do
+  {
+    /* Read xa (real), ya(imag) input */
+    xa = *ptr1++;
+    ya = *ptr1++;
+
+    /* Read xb (real), yb(imag) input */
+    xb = *ptr1++;
+    yb = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xc = *ptr1++;
+    yc = *ptr1++;
+
+    /* Read xc (real), yc(imag) input */
+    xd = *ptr1++;
+    yd = *ptr1++;
+
+    /* xa' = xa + xb + xc + xd */
+    xa_out = xa + xb + xc + xd;
+
+    /* ya' = ya + yb + yc + yd */
+    ya_out = ya + yb + yc + yd;
+
+    /* pointer updation for writing */
+    ptr1 = ptr1 - 8U;
+
+    /* writing xa' and ya' */
+    *ptr1++ = xa_out;
+    *ptr1++ = ya_out;
+
+    xc_out = (xa - xb + xc - xd);
+    yc_out = (ya - yb + yc - yd);
+
+    /* writing xc' and yc' */
+    *ptr1++ = xc_out;
+    *ptr1++ = yc_out;
+
+    xb_out = (xa - yb - xc + yd);
+    yb_out = (ya + xb - yc - xd);
+
+    /* writing xb' and yb' */
+    *ptr1++ = xb_out;
+    *ptr1++ = yb_out;
+
+    xd_out = (xa + yb - xc - yd);
+    yd_out = (ya - xb - yc + xd);
+
+    /* writing xd' and yd' */
+    *ptr1++ = xd_out;
+    *ptr1++ = yd_out;
+
+  } while (--j);
+
+  /* output is in 11.21(q21) format for the 1024 point */
+  /* output is in 9.23(q23) format for the 256 point */
+  /* output is in 7.25(q25) format for the 64 point */
+  /* output is in 5.27(q27) format for the 16 point */
+
+  /* End of last stage process */
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f16.c
new file mode 100755
index 00000000..b7eb37aa
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f16.c
@@ -0,0 +1,289 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix8_f16.c
+ * Description:  Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+/* ----------------------------------------------------------------------
+ * Internal helper function used by the FFTs
+ * -------------------------------------------------------------------- */
+
+/**
+  brief         Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type.
+  param[in]     fftLen           length of the FFT.
+  param[in]     pCoef            points to the twiddle coefficient buffer.
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  return        none
+*/
+
+void arm_radix8_butterfly_f16(
+  float16_t * pSrc,
+  uint16_t fftLen,
+  const float16_t * pCoef,
+  uint16_t twidCoefModifier)
+{
+   uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
+   uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
+   uint32_t id;
+   uint32_t n1, n2, j;
+
+   float16_t r1, r2, r3, r4, r5, r6, r7, r8;
+   float16_t t1, t2;
+   float16_t s1, s2, s3, s4, s5, s6, s7, s8;
+   float16_t p1, p2, p3, p4;
+   float16_t co2, co3, co4, co5, co6, co7, co8;
+   float16_t si2, si3, si4, si5, si6, si7, si8;
+   const float16_t C81 = 0.70710678118f16;
+
+   n2 = fftLen;
+
+   do
+   {
+      n1 = n2;
+      n2 = n2 >> 3;
+      i1 = 0;
+
+      do
+      {
+         i2 = i1 + n2;
+         i3 = i2 + n2;
+         i4 = i3 + n2;
+         i5 = i4 + n2;
+         i6 = i5 + n2;
+         i7 = i6 + n2;
+         i8 = i7 + n2;
+         r1 = (_Float16)pSrc[2 * i1] + (_Float16)pSrc[2 * i5];
+         r5 = (_Float16)pSrc[2 * i1] - (_Float16)pSrc[2 * i5];
+         r2 = (_Float16)pSrc[2 * i2] + (_Float16)pSrc[2 * i6];
+         r6 = (_Float16)pSrc[2 * i2] - (_Float16)pSrc[2 * i6];
+         r3 = (_Float16)pSrc[2 * i3] + (_Float16)pSrc[2 * i7];
+         r7 = (_Float16)pSrc[2 * i3] - (_Float16)pSrc[2 * i7];
+         r4 = (_Float16)pSrc[2 * i4] + (_Float16)pSrc[2 * i8];
+         r8 = (_Float16)pSrc[2 * i4] - (_Float16)pSrc[2 * i8];
+         t1 = (_Float16)r1 - (_Float16)r3;
+         r1 = (_Float16)r1 + (_Float16)r3;
+         r3 = (_Float16)r2 - (_Float16)r4;
+         r2 = (_Float16)r2 + (_Float16)r4;
+         pSrc[2 * i1] = (_Float16)r1 + (_Float16)r2;
+         pSrc[2 * i5] = (_Float16)r1 - (_Float16)r2;
+         r1 = (_Float16)pSrc[2 * i1 + 1] + (_Float16)pSrc[2 * i5 + 1];
+         s5 = (_Float16)pSrc[2 * i1 + 1] - (_Float16)pSrc[2 * i5 + 1];
+         r2 = (_Float16)pSrc[2 * i2 + 1] + (_Float16)pSrc[2 * i6 + 1];
+         s6 = (_Float16)pSrc[2 * i2 + 1] - (_Float16)pSrc[2 * i6 + 1];
+         s3 = (_Float16)pSrc[2 * i3 + 1] + (_Float16)pSrc[2 * i7 + 1];
+         s7 = (_Float16)pSrc[2 * i3 + 1] - (_Float16)pSrc[2 * i7 + 1];
+         r4 = (_Float16)pSrc[2 * i4 + 1] + (_Float16)pSrc[2 * i8 + 1];
+         s8 = (_Float16)pSrc[2 * i4 + 1] - (_Float16)pSrc[2 * i8 + 1];
+         t2 = (_Float16)r1 - (_Float16)s3;
+         r1 = (_Float16)r1 + (_Float16)s3;
+         s3 = (_Float16)r2 - (_Float16)r4;
+         r2 = (_Float16)r2 + (_Float16)r4;
+         pSrc[2 * i1 + 1] = (_Float16)r1 + (_Float16)r2;
+         pSrc[2 * i5 + 1] = (_Float16)r1 - (_Float16)r2;
+         pSrc[2 * i3]     = (_Float16)t1 + (_Float16)s3;
+         pSrc[2 * i7]     = (_Float16)t1 - (_Float16)s3;
+         pSrc[2 * i3 + 1] = (_Float16)t2 - (_Float16)r3;
+         pSrc[2 * i7 + 1] = (_Float16)t2 + (_Float16)r3;
+         r1 = ((_Float16)r6 - (_Float16)r8) * (_Float16)C81;
+         r6 = ((_Float16)r6 + (_Float16)r8) * (_Float16)C81;
+         r2 = ((_Float16)s6 - (_Float16)s8) * (_Float16)C81;
+         s6 = ((_Float16)s6 + (_Float16)s8) * (_Float16)C81;
+         t1 = (_Float16)r5 - (_Float16)r1;
+         r5 = (_Float16)r5 + (_Float16)r1;
+         r8 = (_Float16)r7 - (_Float16)r6;
+         r7 = (_Float16)r7 + (_Float16)r6;
+         t2 = (_Float16)s5 - (_Float16)r2;
+         s5 = (_Float16)s5 + (_Float16)r2;
+         s8 = (_Float16)s7 - (_Float16)s6;
+         s7 = (_Float16)s7 + (_Float16)s6;
+         pSrc[2 * i2]     = (_Float16)r5 + (_Float16)s7;
+         pSrc[2 * i8]     = (_Float16)r5 - (_Float16)s7;
+         pSrc[2 * i6]     = (_Float16)t1 + (_Float16)s8;
+         pSrc[2 * i4]     = (_Float16)t1 - (_Float16)s8;
+         pSrc[2 * i2 + 1] = (_Float16)s5 - (_Float16)r7;
+         pSrc[2 * i8 + 1] = (_Float16)s5 + (_Float16)r7;
+         pSrc[2 * i6 + 1] = (_Float16)t2 - (_Float16)r8;
+         pSrc[2 * i4 + 1] = (_Float16)t2 + (_Float16)r8;
+
+         i1 += n1;
+      } while (i1 < fftLen);
+
+      if (n2 < 8)
+         break;
+
+      ia1 = 0;
+      j = 1;
+
+      do
+      {
+         /*  index calculation for the coefficients */
+         id  = ia1 + twidCoefModifier;
+         ia1 = id;
+         ia2 = ia1 + id;
+         ia3 = ia2 + id;
+         ia4 = ia3 + id;
+         ia5 = ia4 + id;
+         ia6 = ia5 + id;
+         ia7 = ia6 + id;
+
+         co2 = pCoef[2 * ia1];
+         co3 = pCoef[2 * ia2];
+         co4 = pCoef[2 * ia3];
+         co5 = pCoef[2 * ia4];
+         co6 = pCoef[2 * ia5];
+         co7 = pCoef[2 * ia6];
+         co8 = pCoef[2 * ia7];
+         si2 = pCoef[2 * ia1 + 1];
+         si3 = pCoef[2 * ia2 + 1];
+         si4 = pCoef[2 * ia3 + 1];
+         si5 = pCoef[2 * ia4 + 1];
+         si6 = pCoef[2 * ia5 + 1];
+         si7 = pCoef[2 * ia6 + 1];
+         si8 = pCoef[2 * ia7 + 1];
+
+         i1 = j;
+
+         do
+         {
+            /*  index calculation for the input */
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+            i4 = i3 + n2;
+            i5 = i4 + n2;
+            i6 = i5 + n2;
+            i7 = i6 + n2;
+            i8 = i7 + n2;
+            r1 = (_Float16)pSrc[2 * i1] + (_Float16)pSrc[2 * i5];
+            r5 = (_Float16)pSrc[2 * i1] - (_Float16)pSrc[2 * i5];
+            r2 = (_Float16)pSrc[2 * i2] + (_Float16)pSrc[2 * i6];
+            r6 = (_Float16)pSrc[2 * i2] - (_Float16)pSrc[2 * i6];
+            r3 = (_Float16)pSrc[2 * i3] + (_Float16)pSrc[2 * i7];
+            r7 = (_Float16)pSrc[2 * i3] - (_Float16)pSrc[2 * i7];
+            r4 = (_Float16)pSrc[2 * i4] + (_Float16)pSrc[2 * i8];
+            r8 = (_Float16)pSrc[2 * i4] - (_Float16)pSrc[2 * i8];
+            t1 = (_Float16)r1 - (_Float16)r3;
+            r1 = (_Float16)r1 + (_Float16)r3;
+            r3 = (_Float16)r2 - (_Float16)r4;
+            r2 = (_Float16)r2 + (_Float16)r4;
+            pSrc[2 * i1] = (_Float16)r1 + (_Float16)r2;
+            r2 = (_Float16)r1 - (_Float16)r2;
+            s1 = (_Float16)pSrc[2 * i1 + 1] + (_Float16)pSrc[2 * i5 + 1];
+            s5 = (_Float16)pSrc[2 * i1 + 1] - (_Float16)pSrc[2 * i5 + 1];
+            s2 = (_Float16)pSrc[2 * i2 + 1] + (_Float16)pSrc[2 * i6 + 1];
+            s6 = (_Float16)pSrc[2 * i2 + 1] - (_Float16)pSrc[2 * i6 + 1];
+            s3 = (_Float16)pSrc[2 * i3 + 1] + (_Float16)pSrc[2 * i7 + 1];
+            s7 = (_Float16)pSrc[2 * i3 + 1] - (_Float16)pSrc[2 * i7 + 1];
+            s4 = (_Float16)pSrc[2 * i4 + 1] + (_Float16)pSrc[2 * i8 + 1];
+            s8 = (_Float16)pSrc[2 * i4 + 1] - (_Float16)pSrc[2 * i8 + 1];
+            t2 = (_Float16)s1 - (_Float16)s3;
+            s1 = (_Float16)s1 + (_Float16)s3;
+            s3 = (_Float16)s2 - (_Float16)s4;
+            s2 = (_Float16)s2 + (_Float16)s4;
+            r1 = (_Float16)t1 + (_Float16)s3;
+            t1 = (_Float16)t1 - (_Float16)s3;
+            pSrc[2 * i1 + 1] = (_Float16)s1 + (_Float16)s2;
+            s2 = (_Float16)s1 - (_Float16)s2;
+            s1 = (_Float16)t2 - (_Float16)r3;
+            t2 = (_Float16)t2 + (_Float16)r3;
+            p1 = (_Float16)co5 * (_Float16)r2;
+            p2 = (_Float16)si5 * (_Float16)s2;
+            p3 = (_Float16)co5 * (_Float16)s2;
+            p4 = (_Float16)si5 * (_Float16)r2;
+            pSrc[2 * i5]     = (_Float16)p1 + (_Float16)p2;
+            pSrc[2 * i5 + 1] = (_Float16)p3 - (_Float16)p4;
+            p1 = (_Float16)co3 * (_Float16)r1;
+            p2 = (_Float16)si3 * (_Float16)s1;
+            p3 = (_Float16)co3 * (_Float16)s1;
+            p4 = (_Float16)si3 * (_Float16)r1;
+            pSrc[2 * i3]     = (_Float16)p1 + (_Float16)p2;
+            pSrc[2 * i3 + 1] = (_Float16)p3 - (_Float16)p4;
+            p1 = (_Float16)co7 * (_Float16)t1;
+            p2 = (_Float16)si7 * (_Float16)t2;
+            p3 = (_Float16)co7 * (_Float16)t2;
+            p4 = (_Float16)si7 * (_Float16)t1;
+            pSrc[2 * i7]     = (_Float16)p1 + (_Float16)p2;
+            pSrc[2 * i7 + 1] = (_Float16)p3 - (_Float16)p4;
+            r1 = ((_Float16)r6 - (_Float16)r8) * (_Float16)C81;
+            r6 = ((_Float16)r6 + (_Float16)r8) * (_Float16)C81;
+            s1 = ((_Float16)s6 - (_Float16)s8) * (_Float16)C81;
+            s6 = ((_Float16)s6 + (_Float16)s8) * (_Float16)C81;
+            t1 = (_Float16)r5 - (_Float16)r1;
+            r5 = (_Float16)r5 + (_Float16)r1;
+            r8 = (_Float16)r7 - (_Float16)r6;
+            r7 = (_Float16)r7 + (_Float16)r6;
+            t2 = (_Float16)s5 - (_Float16)s1;
+            s5 = (_Float16)s5 + (_Float16)s1;
+            s8 = (_Float16)s7 - (_Float16)s6;
+            s7 = (_Float16)s7 + (_Float16)s6;
+            r1 = (_Float16)r5 + (_Float16)s7;
+            r5 = (_Float16)r5 - (_Float16)s7;
+            r6 = (_Float16)t1 + (_Float16)s8;
+            t1 = (_Float16)t1 - (_Float16)s8;
+            s1 = (_Float16)s5 - (_Float16)r7;
+            s5 = (_Float16)s5 + (_Float16)r7;
+            s6 = (_Float16)t2 - (_Float16)r8;
+            t2 = (_Float16)t2 + (_Float16)r8;
+            p1 = (_Float16)co2 * (_Float16)r1;
+            p2 = (_Float16)si2 * (_Float16)s1;
+            p3 = (_Float16)co2 * (_Float16)s1;
+            p4 = (_Float16)si2 * (_Float16)r1;
+            pSrc[2 * i2]     = (_Float16)p1 + (_Float16)p2;
+            pSrc[2 * i2 + 1] = (_Float16)p3 - (_Float16)p4;
+            p1 = (_Float16)co8 * (_Float16)r5;
+            p2 = (_Float16)si8 * (_Float16)s5;
+            p3 = (_Float16)co8 * (_Float16)s5;
+            p4 = (_Float16)si8 * (_Float16)r5;
+            pSrc[2 * i8]     = (_Float16)p1 + (_Float16)p2;
+            pSrc[2 * i8 + 1] = (_Float16)p3 - (_Float16)p4;
+            p1 = (_Float16)co6 * (_Float16)r6;
+            p2 = (_Float16)si6 * (_Float16)s6;
+            p3 = (_Float16)co6 * (_Float16)s6;
+            p4 = (_Float16)si6 * (_Float16)r6;
+            pSrc[2 * i6]     = (_Float16)p1 + (_Float16)p2;
+            pSrc[2 * i6 + 1] = (_Float16)p3 - (_Float16)p4;
+            p1 = (_Float16)co4 * (_Float16)t1;
+            p2 = (_Float16)si4 * (_Float16)t2;
+            p3 = (_Float16)co4 * (_Float16)t2;
+            p4 = (_Float16)si4 * (_Float16)t1;
+            pSrc[2 * i4]     = (_Float16)p1 + (_Float16)p2;
+            pSrc[2 * i4 + 1] = (_Float16)p3 - (_Float16)p4;
+
+            i1 += n1;
+         } while (i1 < fftLen);
+
+         j++;
+      } while (j < n2);
+
+      twidCoefModifier <<= 3;
+   } while (n2 > 7);
+}
+
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
index ae749774..7990d479 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_cfft_radix8_f32.c
@@ -1,285 +1,285 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_radix8_f32.c
- * Description:  Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-
-/* ----------------------------------------------------------------------
- * Internal helper function used by the FFTs
- * -------------------------------------------------------------------- */
-
-/**
-  brief         Core function for the floating-point CFFT butterfly process.
-  param[in,out] pSrc             points to the in-place buffer of floating-point data type.
-  param[in]     fftLen           length of the FFT.
-  param[in]     pCoef            points to the twiddle coefficient buffer.
-  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
-  return        none
-*/
-
-void arm_radix8_butterfly_f32(
-  float32_t * pSrc,
-  uint16_t fftLen,
-  const float32_t * pCoef,
-  uint16_t twidCoefModifier)
-{
-   uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
-   uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
-   uint32_t id;
-   uint32_t n1, n2, j;
-
-   float32_t r1, r2, r3, r4, r5, r6, r7, r8;
-   float32_t t1, t2;
-   float32_t s1, s2, s3, s4, s5, s6, s7, s8;
-   float32_t p1, p2, p3, p4;
-   float32_t co2, co3, co4, co5, co6, co7, co8;
-   float32_t si2, si3, si4, si5, si6, si7, si8;
-   const float32_t C81 = 0.70710678118f;
-
-   n2 = fftLen;
-
-   do
-   {
-      n1 = n2;
-      n2 = n2 >> 3;
-      i1 = 0;
-
-      do
-      {
-         i2 = i1 + n2;
-         i3 = i2 + n2;
-         i4 = i3 + n2;
-         i5 = i4 + n2;
-         i6 = i5 + n2;
-         i7 = i6 + n2;
-         i8 = i7 + n2;
-         r1 = pSrc[2 * i1] + pSrc[2 * i5];
-         r5 = pSrc[2 * i1] - pSrc[2 * i5];
-         r2 = pSrc[2 * i2] + pSrc[2 * i6];
-         r6 = pSrc[2 * i2] - pSrc[2 * i6];
-         r3 = pSrc[2 * i3] + pSrc[2 * i7];
-         r7 = pSrc[2 * i3] - pSrc[2 * i7];
-         r4 = pSrc[2 * i4] + pSrc[2 * i8];
-         r8 = pSrc[2 * i4] - pSrc[2 * i8];
-         t1 = r1 - r3;
-         r1 = r1 + r3;
-         r3 = r2 - r4;
-         r2 = r2 + r4;
-         pSrc[2 * i1] = r1 + r2;
-         pSrc[2 * i5] = r1 - r2;
-         r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
-         s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
-         r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
-         s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
-         s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
-         s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
-         r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
-         s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
-         t2 = r1 - s3;
-         r1 = r1 + s3;
-         s3 = r2 - r4;
-         r2 = r2 + r4;
-         pSrc[2 * i1 + 1] = r1 + r2;
-         pSrc[2 * i5 + 1] = r1 - r2;
-         pSrc[2 * i3]     = t1 + s3;
-         pSrc[2 * i7]     = t1 - s3;
-         pSrc[2 * i3 + 1] = t2 - r3;
-         pSrc[2 * i7 + 1] = t2 + r3;
-         r1 = (r6 - r8) * C81;
-         r6 = (r6 + r8) * C81;
-         r2 = (s6 - s8) * C81;
-         s6 = (s6 + s8) * C81;
-         t1 = r5 - r1;
-         r5 = r5 + r1;
-         r8 = r7 - r6;
-         r7 = r7 + r6;
-         t2 = s5 - r2;
-         s5 = s5 + r2;
-         s8 = s7 - s6;
-         s7 = s7 + s6;
-         pSrc[2 * i2]     = r5 + s7;
-         pSrc[2 * i8]     = r5 - s7;
-         pSrc[2 * i6]     = t1 + s8;
-         pSrc[2 * i4]     = t1 - s8;
-         pSrc[2 * i2 + 1] = s5 - r7;
-         pSrc[2 * i8 + 1] = s5 + r7;
-         pSrc[2 * i6 + 1] = t2 - r8;
-         pSrc[2 * i4 + 1] = t2 + r8;
-
-         i1 += n1;
-      } while (i1 < fftLen);
-
-      if (n2 < 8)
-         break;
-
-      ia1 = 0;
-      j = 1;
-
-      do
-      {
-         /*  index calculation for the coefficients */
-         id  = ia1 + twidCoefModifier;
-         ia1 = id;
-         ia2 = ia1 + id;
-         ia3 = ia2 + id;
-         ia4 = ia3 + id;
-         ia5 = ia4 + id;
-         ia6 = ia5 + id;
-         ia7 = ia6 + id;
-
-         co2 = pCoef[2 * ia1];
-         co3 = pCoef[2 * ia2];
-         co4 = pCoef[2 * ia3];
-         co5 = pCoef[2 * ia4];
-         co6 = pCoef[2 * ia5];
-         co7 = pCoef[2 * ia6];
-         co8 = pCoef[2 * ia7];
-         si2 = pCoef[2 * ia1 + 1];
-         si3 = pCoef[2 * ia2 + 1];
-         si4 = pCoef[2 * ia3 + 1];
-         si5 = pCoef[2 * ia4 + 1];
-         si6 = pCoef[2 * ia5 + 1];
-         si7 = pCoef[2 * ia6 + 1];
-         si8 = pCoef[2 * ia7 + 1];
-
-         i1 = j;
-
-         do
-         {
-            /*  index calculation for the input */
-            i2 = i1 + n2;
-            i3 = i2 + n2;
-            i4 = i3 + n2;
-            i5 = i4 + n2;
-            i6 = i5 + n2;
-            i7 = i6 + n2;
-            i8 = i7 + n2;
-            r1 = pSrc[2 * i1] + pSrc[2 * i5];
-            r5 = pSrc[2 * i1] - pSrc[2 * i5];
-            r2 = pSrc[2 * i2] + pSrc[2 * i6];
-            r6 = pSrc[2 * i2] - pSrc[2 * i6];
-            r3 = pSrc[2 * i3] + pSrc[2 * i7];
-            r7 = pSrc[2 * i3] - pSrc[2 * i7];
-            r4 = pSrc[2 * i4] + pSrc[2 * i8];
-            r8 = pSrc[2 * i4] - pSrc[2 * i8];
-            t1 = r1 - r3;
-            r1 = r1 + r3;
-            r3 = r2 - r4;
-            r2 = r2 + r4;
-            pSrc[2 * i1] = r1 + r2;
-            r2 = r1 - r2;
-            s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
-            s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
-            s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
-            s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
-            s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
-            s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
-            s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
-            s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
-            t2 = s1 - s3;
-            s1 = s1 + s3;
-            s3 = s2 - s4;
-            s2 = s2 + s4;
-            r1 = t1 + s3;
-            t1 = t1 - s3;
-            pSrc[2 * i1 + 1] = s1 + s2;
-            s2 = s1 - s2;
-            s1 = t2 - r3;
-            t2 = t2 + r3;
-            p1 = co5 * r2;
-            p2 = si5 * s2;
-            p3 = co5 * s2;
-            p4 = si5 * r2;
-            pSrc[2 * i5]     = p1 + p2;
-            pSrc[2 * i5 + 1] = p3 - p4;
-            p1 = co3 * r1;
-            p2 = si3 * s1;
-            p3 = co3 * s1;
-            p4 = si3 * r1;
-            pSrc[2 * i3]     = p1 + p2;
-            pSrc[2 * i3 + 1] = p3 - p4;
-            p1 = co7 * t1;
-            p2 = si7 * t2;
-            p3 = co7 * t2;
-            p4 = si7 * t1;
-            pSrc[2 * i7]     = p1 + p2;
-            pSrc[2 * i7 + 1] = p3 - p4;
-            r1 = (r6 - r8) * C81;
-            r6 = (r6 + r8) * C81;
-            s1 = (s6 - s8) * C81;
-            s6 = (s6 + s8) * C81;
-            t1 = r5 - r1;
-            r5 = r5 + r1;
-            r8 = r7 - r6;
-            r7 = r7 + r6;
-            t2 = s5 - s1;
-            s5 = s5 + s1;
-            s8 = s7 - s6;
-            s7 = s7 + s6;
-            r1 = r5 + s7;
-            r5 = r5 - s7;
-            r6 = t1 + s8;
-            t1 = t1 - s8;
-            s1 = s5 - r7;
-            s5 = s5 + r7;
-            s6 = t2 - r8;
-            t2 = t2 + r8;
-            p1 = co2 * r1;
-            p2 = si2 * s1;
-            p3 = co2 * s1;
-            p4 = si2 * r1;
-            pSrc[2 * i2]     = p1 + p2;
-            pSrc[2 * i2 + 1] = p3 - p4;
-            p1 = co8 * r5;
-            p2 = si8 * s5;
-            p3 = co8 * s5;
-            p4 = si8 * r5;
-            pSrc[2 * i8]     = p1 + p2;
-            pSrc[2 * i8 + 1] = p3 - p4;
-            p1 = co6 * r6;
-            p2 = si6 * s6;
-            p3 = co6 * s6;
-            p4 = si6 * r6;
-            pSrc[2 * i6]     = p1 + p2;
-            pSrc[2 * i6 + 1] = p3 - p4;
-            p1 = co4 * t1;
-            p2 = si4 * t2;
-            p3 = co4 * t2;
-            p4 = si4 * t1;
-            pSrc[2 * i4]     = p1 + p2;
-            pSrc[2 * i4 + 1] = p3 - p4;
-
-            i1 += n1;
-         } while (i1 < fftLen);
-
-         j++;
-      } while (j < n2);
-
-      twidCoefModifier <<= 3;
-   } while (n2 > 7);
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_cfft_radix8_f32.c
+ * Description:  Radix-8 Decimation in Frequency CFFT & CIFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+
+/* ----------------------------------------------------------------------
+ * Internal helper function used by the FFTs
+ * -------------------------------------------------------------------- */
+
+/**
+  brief         Core function for the floating-point CFFT butterfly process.
+  param[in,out] pSrc             points to the in-place buffer of floating-point data type.
+  param[in]     fftLen           length of the FFT.
+  param[in]     pCoef            points to the twiddle coefficient buffer.
+  param[in]     twidCoefModifier twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table.
+  return        none
+*/
+
+void arm_radix8_butterfly_f32(
+  float32_t * pSrc,
+  uint16_t fftLen,
+  const float32_t * pCoef,
+  uint16_t twidCoefModifier)
+{
+   uint32_t ia1, ia2, ia3, ia4, ia5, ia6, ia7;
+   uint32_t i1, i2, i3, i4, i5, i6, i7, i8;
+   uint32_t id;
+   uint32_t n1, n2, j;
+
+   float32_t r1, r2, r3, r4, r5, r6, r7, r8;
+   float32_t t1, t2;
+   float32_t s1, s2, s3, s4, s5, s6, s7, s8;
+   float32_t p1, p2, p3, p4;
+   float32_t co2, co3, co4, co5, co6, co7, co8;
+   float32_t si2, si3, si4, si5, si6, si7, si8;
+   const float32_t C81 = 0.70710678118f;
+
+   n2 = fftLen;
+
+   do
+   {
+      n1 = n2;
+      n2 = n2 >> 3;
+      i1 = 0;
+
+      do
+      {
+         i2 = i1 + n2;
+         i3 = i2 + n2;
+         i4 = i3 + n2;
+         i5 = i4 + n2;
+         i6 = i5 + n2;
+         i7 = i6 + n2;
+         i8 = i7 + n2;
+         r1 = pSrc[2 * i1] + pSrc[2 * i5];
+         r5 = pSrc[2 * i1] - pSrc[2 * i5];
+         r2 = pSrc[2 * i2] + pSrc[2 * i6];
+         r6 = pSrc[2 * i2] - pSrc[2 * i6];
+         r3 = pSrc[2 * i3] + pSrc[2 * i7];
+         r7 = pSrc[2 * i3] - pSrc[2 * i7];
+         r4 = pSrc[2 * i4] + pSrc[2 * i8];
+         r8 = pSrc[2 * i4] - pSrc[2 * i8];
+         t1 = r1 - r3;
+         r1 = r1 + r3;
+         r3 = r2 - r4;
+         r2 = r2 + r4;
+         pSrc[2 * i1] = r1 + r2;
+         pSrc[2 * i5] = r1 - r2;
+         r1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
+         s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
+         r2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
+         s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
+         s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
+         s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
+         r4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
+         s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
+         t2 = r1 - s3;
+         r1 = r1 + s3;
+         s3 = r2 - r4;
+         r2 = r2 + r4;
+         pSrc[2 * i1 + 1] = r1 + r2;
+         pSrc[2 * i5 + 1] = r1 - r2;
+         pSrc[2 * i3]     = t1 + s3;
+         pSrc[2 * i7]     = t1 - s3;
+         pSrc[2 * i3 + 1] = t2 - r3;
+         pSrc[2 * i7 + 1] = t2 + r3;
+         r1 = (r6 - r8) * C81;
+         r6 = (r6 + r8) * C81;
+         r2 = (s6 - s8) * C81;
+         s6 = (s6 + s8) * C81;
+         t1 = r5 - r1;
+         r5 = r5 + r1;
+         r8 = r7 - r6;
+         r7 = r7 + r6;
+         t2 = s5 - r2;
+         s5 = s5 + r2;
+         s8 = s7 - s6;
+         s7 = s7 + s6;
+         pSrc[2 * i2]     = r5 + s7;
+         pSrc[2 * i8]     = r5 - s7;
+         pSrc[2 * i6]     = t1 + s8;
+         pSrc[2 * i4]     = t1 - s8;
+         pSrc[2 * i2 + 1] = s5 - r7;
+         pSrc[2 * i8 + 1] = s5 + r7;
+         pSrc[2 * i6 + 1] = t2 - r8;
+         pSrc[2 * i4 + 1] = t2 + r8;
+
+         i1 += n1;
+      } while (i1 < fftLen);
+
+      if (n2 < 8)
+         break;
+
+      ia1 = 0;
+      j = 1;
+
+      do
+      {
+         /*  index calculation for the coefficients */
+         id  = ia1 + twidCoefModifier;
+         ia1 = id;
+         ia2 = ia1 + id;
+         ia3 = ia2 + id;
+         ia4 = ia3 + id;
+         ia5 = ia4 + id;
+         ia6 = ia5 + id;
+         ia7 = ia6 + id;
+
+         co2 = pCoef[2 * ia1];
+         co3 = pCoef[2 * ia2];
+         co4 = pCoef[2 * ia3];
+         co5 = pCoef[2 * ia4];
+         co6 = pCoef[2 * ia5];
+         co7 = pCoef[2 * ia6];
+         co8 = pCoef[2 * ia7];
+         si2 = pCoef[2 * ia1 + 1];
+         si3 = pCoef[2 * ia2 + 1];
+         si4 = pCoef[2 * ia3 + 1];
+         si5 = pCoef[2 * ia4 + 1];
+         si6 = pCoef[2 * ia5 + 1];
+         si7 = pCoef[2 * ia6 + 1];
+         si8 = pCoef[2 * ia7 + 1];
+
+         i1 = j;
+
+         do
+         {
+            /*  index calculation for the input */
+            i2 = i1 + n2;
+            i3 = i2 + n2;
+            i4 = i3 + n2;
+            i5 = i4 + n2;
+            i6 = i5 + n2;
+            i7 = i6 + n2;
+            i8 = i7 + n2;
+            r1 = pSrc[2 * i1] + pSrc[2 * i5];
+            r5 = pSrc[2 * i1] - pSrc[2 * i5];
+            r2 = pSrc[2 * i2] + pSrc[2 * i6];
+            r6 = pSrc[2 * i2] - pSrc[2 * i6];
+            r3 = pSrc[2 * i3] + pSrc[2 * i7];
+            r7 = pSrc[2 * i3] - pSrc[2 * i7];
+            r4 = pSrc[2 * i4] + pSrc[2 * i8];
+            r8 = pSrc[2 * i4] - pSrc[2 * i8];
+            t1 = r1 - r3;
+            r1 = r1 + r3;
+            r3 = r2 - r4;
+            r2 = r2 + r4;
+            pSrc[2 * i1] = r1 + r2;
+            r2 = r1 - r2;
+            s1 = pSrc[2 * i1 + 1] + pSrc[2 * i5 + 1];
+            s5 = pSrc[2 * i1 + 1] - pSrc[2 * i5 + 1];
+            s2 = pSrc[2 * i2 + 1] + pSrc[2 * i6 + 1];
+            s6 = pSrc[2 * i2 + 1] - pSrc[2 * i6 + 1];
+            s3 = pSrc[2 * i3 + 1] + pSrc[2 * i7 + 1];
+            s7 = pSrc[2 * i3 + 1] - pSrc[2 * i7 + 1];
+            s4 = pSrc[2 * i4 + 1] + pSrc[2 * i8 + 1];
+            s8 = pSrc[2 * i4 + 1] - pSrc[2 * i8 + 1];
+            t2 = s1 - s3;
+            s1 = s1 + s3;
+            s3 = s2 - s4;
+            s2 = s2 + s4;
+            r1 = t1 + s3;
+            t1 = t1 - s3;
+            pSrc[2 * i1 + 1] = s1 + s2;
+            s2 = s1 - s2;
+            s1 = t2 - r3;
+            t2 = t2 + r3;
+            p1 = co5 * r2;
+            p2 = si5 * s2;
+            p3 = co5 * s2;
+            p4 = si5 * r2;
+            pSrc[2 * i5]     = p1 + p2;
+            pSrc[2 * i5 + 1] = p3 - p4;
+            p1 = co3 * r1;
+            p2 = si3 * s1;
+            p3 = co3 * s1;
+            p4 = si3 * r1;
+            pSrc[2 * i3]     = p1 + p2;
+            pSrc[2 * i3 + 1] = p3 - p4;
+            p1 = co7 * t1;
+            p2 = si7 * t2;
+            p3 = co7 * t2;
+            p4 = si7 * t1;
+            pSrc[2 * i7]     = p1 + p2;
+            pSrc[2 * i7 + 1] = p3 - p4;
+            r1 = (r6 - r8) * C81;
+            r6 = (r6 + r8) * C81;
+            s1 = (s6 - s8) * C81;
+            s6 = (s6 + s8) * C81;
+            t1 = r5 - r1;
+            r5 = r5 + r1;
+            r8 = r7 - r6;
+            r7 = r7 + r6;
+            t2 = s5 - s1;
+            s5 = s5 + s1;
+            s8 = s7 - s6;
+            s7 = s7 + s6;
+            r1 = r5 + s7;
+            r5 = r5 - s7;
+            r6 = t1 + s8;
+            t1 = t1 - s8;
+            s1 = s5 - r7;
+            s5 = s5 + r7;
+            s6 = t2 - r8;
+            t2 = t2 + r8;
+            p1 = co2 * r1;
+            p2 = si2 * s1;
+            p3 = co2 * s1;
+            p4 = si2 * r1;
+            pSrc[2 * i2]     = p1 + p2;
+            pSrc[2 * i2 + 1] = p3 - p4;
+            p1 = co8 * r5;
+            p2 = si8 * s5;
+            p3 = co8 * s5;
+            p4 = si8 * r5;
+            pSrc[2 * i8]     = p1 + p2;
+            pSrc[2 * i8 + 1] = p3 - p4;
+            p1 = co6 * r6;
+            p2 = si6 * s6;
+            p3 = co6 * s6;
+            p4 = si6 * r6;
+            pSrc[2 * i6]     = p1 + p2;
+            pSrc[2 * i6 + 1] = p3 - p4;
+            p1 = co4 * t1;
+            p2 = si4 * t2;
+            p3 = co4 * t2;
+            p4 = si4 * t1;
+            pSrc[2 * i4]     = p1 + p2;
+            pSrc[2 * i4 + 1] = p3 - p4;
+
+            i1 += n1;
+         } while (i1 < fftLen);
+
+         j++;
+      } while (j < n2);
+
+      twidCoefModifier <<= 3;
+   } while (n2 > 7);
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
index 729ebf1d..b9dff3fb 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_f32.c
@@ -1,448 +1,448 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dct4_f32.c
- * Description:  Processing function of DCT4 & IDCT4 F32
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @defgroup DCT4_IDCT4 DCT Type IV Functions
-
-  Representation of signals by minimum number of values is important for storage and transmission.
-  The possibility of large discontinuity between the beginning and end of a period of a signal
-  in DFT can be avoided by extending the signal so that it is even-symmetric.
-  Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the
-  spectrum and is very widely used in signal and image coding applications.
-  The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.
-  DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.
-  
-  DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.
-  Reordering of the input data makes the computation of DCT just a problem of
-  computing the DFT of a real signal with a few additional operations.
-  This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.
-  
-  DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.
-  DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.
-  DCT2 implementation can be described in the following steps:
-  - Re-ordering input
-  - Calculating Real FFT
-  - Multiplication of weights and Real FFT output and getting real part from the product.
-  
-  This process is explained by the block diagram below:
-  \image html DCT4.gif "Discrete Cosine Transform - type-IV"
- 
-  @par           Algorithm
-                   The N-point type-IV DCT is defined as a real, linear transformation by the formula:
-                   \image html DCT4Equation.gif
-                   where <code>k = 0, 1, 2, ..., N-1</code>
-  @par
-                   Its inverse is defined as follows:
-                   \image html IDCT4Equation.gif
-                   where <code>n = 0, 1, 2, ..., N-1</code>
-  @par
-                   The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).
-                   The symmetry of the transform matrix indicates that the fast algorithms for the forward
-                   and inverse transform computation are identical.
-                   Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
- 
-  @par           Lengths supported by the transform:
-                   As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192.
-                   The library provides separate functions for Q15, Q31, and floating-point data types.
-
-  @par           Instance Structure
-                   The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.
-                   A separate instance structure must be defined for each transform.
-                   There are separate instance structure declarations for each of the 3 supported data types.
-                 
-  @par           Initialization Functions
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                   - Sets the values of the internal structure fields.
-                   - Initializes Real FFT as its process function is used internally in DCT4, by calling \ref arm_rfft_init_f32().
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
-                   To place an instance structure into a const data section, the instance structure must be manually initialized.
-                   Manually initialize the instance structure as follows:
-  <pre>
-      arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-      arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-      arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
-  </pre>
-                   where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;
-                   \c normalize is normalizing factor used and is equal to <code>sqrt(2/N)</code>;
-                   \c pTwiddle points to the twiddle factor table;
-                   \c pCosFactor points to the cosFactor table;
-                   \c pRfft points to the real FFT instance;
-                   \c pCfft points to the complex FFT instance;
-                   The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()
-                   and arm_rfft_f32() respectively for details regarding static initialization.
- 
-  @par           Fixed-Point Behavior
-                   Care must be taken when using the fixed-point versions of the DCT4 transform functions.
-                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
-                   Refer to the function specific documentation below for usage guidelines.
- */
-
- /**
-  @addtogroup DCT4_IDCT4
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point DCT4/IDCT4.
-  @param[in]     S             points to an instance of the floating-point DCT4/IDCT4 structure
-  @param[in]     pState        points to state buffer
-  @param[in,out] pInlineBuffer points to the in-place input and output buffer
-  @return        none
- */
-
-void arm_dct4_f32(
-  const arm_dct4_instance_f32 * S,
-        float32_t * pState,
-        float32_t * pInlineBuffer)
-{
-  const float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
-  const float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
-        float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
-        float32_t in;                                  /* Temporary variable */
-        uint32_t i;                                    /* Loop counter */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
-   * along with some pre-processing and post-processing.
-   * Computational procedure is explained as follows:
-   * (a) Pre-processing involves multiplying input with cos factor,
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
-   *              where,
-   *                 r(n) -- output of preprocessing
-   *                 u(n) -- input to preprocessing(actual Source buffer)
-   * (b) Calculation of DCT2 using FFT is divided into three steps:
-   *                  Step1: Re-ordering of even and odd elements of input.
-   *                  Step2: Calculating FFT of the re-ordered input.
-   *                  Step3: Taking the real part of the product of FFT output and weights.
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *                        where,
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
-   */
-
-  /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
-  arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------
-   * Step1: Re-ordering of even and odd elements as
-   *             pState[i] =  pInlineBuffer[2*i] and
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = S->Nby2 >> 2U;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2U;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-
-  /* ---------------------------------------------------------
-   *     Step2: Calculate RFFT for N-point input
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------
-   *  Step3: Multiply the FFT output with the weights.
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = (S->N - 1U) >> 2U;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  i = (S->N - 1U) % 0x4U;
-
-  while (i > 0U)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  }
-
-
-  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2U;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-
-#else
-
-  /* Initializing the loop counter to N/2 */
-  i = S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-
-  /* ---------------------------------------------------------
-   *     Step2: Calculate RFFT for N-point input
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------
-   *  Step3: Multiply the FFT output with the weights.
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ * (float32_t) 0.5;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = (S->N - 1U);
-
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing loop counter */
-  i = S->N;
-
-  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = in * S->normalize;
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-}
-
-/**
-  @} end of DCT4_IDCT4 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_f32.c
+ * Description:  Processing function of DCT4 & IDCT4 F32
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @defgroup DCT4_IDCT4 DCT Type IV Functions
+
+  Representation of signals by minimum number of values is important for storage and transmission.
+  The possibility of large discontinuity between the beginning and end of a period of a signal
+  in DFT can be avoided by extending the signal so that it is even-symmetric.
+  Discrete Cosine Transform (DCT) is constructed such that its energy is heavily concentrated in the lower part of the
+  spectrum and is very widely used in signal and image coding applications.
+  The family of DCTs (DCT type- 1,2,3,4) is the outcome of different combinations of homogeneous boundary conditions.
+  DCT has an excellent energy-packing capability, hence has many applications and in data compression in particular.
+  
+  DCT is essentially the Discrete Fourier Transform(DFT) of an even-extended real signal.
+  Reordering of the input data makes the computation of DCT just a problem of
+  computing the DFT of a real signal with a few additional operations.
+  This approach provides regular, simple, and very efficient DCT algorithms for practical hardware and software implementations.
+  
+  DCT type-II can be implemented using Fast fourier transform (FFT) internally, as the transform is applied on real values, Real FFT can be used.
+  DCT4 is implemented using DCT2 as their implementations are similar except with some added pre-processing and post-processing.
+  DCT2 implementation can be described in the following steps:
+  - Re-ordering input
+  - Calculating Real FFT
+  - Multiplication of weights and Real FFT output and getting real part from the product.
+  
+  This process is explained by the block diagram below:
+  \image html DCT4.gif "Discrete Cosine Transform - type-IV"
+ 
+  @par           Algorithm
+                   The N-point type-IV DCT is defined as a real, linear transformation by the formula:
+                   \image html DCT4Equation.gif
+                   where <code>k = 0, 1, 2, ..., N-1</code>
+  @par
+                   Its inverse is defined as follows:
+                   \image html IDCT4Equation.gif
+                   where <code>n = 0, 1, 2, ..., N-1</code>
+  @par
+                   The DCT4 matrices become involutory (i.e. they are self-inverse) by multiplying with an overall scale factor of sqrt(2/N).
+                   The symmetry of the transform matrix indicates that the fast algorithms for the forward
+                   and inverse transform computation are identical.
+                   Note that the implementation of Inverse DCT4 and DCT4 is same, hence same process function can be used for both.
+ 
+  @par           Lengths supported by the transform:
+                   As DCT4 internally uses Real FFT, it supports all the lengths 128, 512, 2048 and 8192.
+                   The library provides separate functions for Q15, Q31, and floating-point data types.
+
+  @par           Instance Structure
+                   The instances for Real FFT and FFT, cosine values table and twiddle factor table are stored in an instance data structure.
+                   A separate instance structure must be defined for each transform.
+                   There are separate instance structure declarations for each of the 3 supported data types.
+                 
+  @par           Initialization Functions
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                   - Sets the values of the internal structure fields.
+                   - Initializes Real FFT as its process function is used internally in DCT4, by calling \ref arm_rfft_init_f32().
+  @par
+                   Use of the initialization function is optional.
+                   However, if the initialization function is used, then the instance structure cannot be placed into a const data section.
+                   To place an instance structure into a const data section, the instance structure must be manually initialized.
+                   Manually initialize the instance structure as follows:
+  <pre>
+      arm_dct4_instance_f32 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+      arm_dct4_instance_q31 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+      arm_dct4_instance_q15 S = {N, Nby2, normalize, pTwiddle, pCosFactor, pRfft, pCfft};
+  </pre>
+                   where \c N is the length of the DCT4; \c Nby2 is half of the length of the DCT4;
+                   \c normalize is normalizing factor used and is equal to <code>sqrt(2/N)</code>;
+                   \c pTwiddle points to the twiddle factor table;
+                   \c pCosFactor points to the cosFactor table;
+                   \c pRfft points to the real FFT instance;
+                   \c pCfft points to the complex FFT instance;
+                   The CFFT and RFFT structures also needs to be initialized, refer to arm_cfft_radix4_f32()
+                   and arm_rfft_f32() respectively for details regarding static initialization.
+ 
+  @par           Fixed-Point Behavior
+                   Care must be taken when using the fixed-point versions of the DCT4 transform functions.
+                   In particular, the overflow and saturation behavior of the accumulator used in each function must be considered.
+                   Refer to the function specific documentation below for usage guidelines.
+ */
+
+ /**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point DCT4/IDCT4.
+  @param[in]     S             points to an instance of the floating-point DCT4/IDCT4 structure
+  @param[in]     pState        points to state buffer
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer
+  @return        none
+ */
+
+void arm_dct4_f32(
+  const arm_dct4_instance_f32 * S,
+        float32_t * pState,
+        float32_t * pInlineBuffer)
+{
+  const float32_t *weights = S->pTwiddle;              /* Pointer to the Weights table */
+  const float32_t *cosFact = S->pCosFactor;            /* Pointer to the cos factors table */
+        float32_t *pS1, *pS2, *pbuff;                  /* Temporary pointers for input buffer and pState buffer */
+        float32_t in;                                  /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
+
+
+  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
+   * along with some pre-processing and post-processing.
+   * Computational procedure is explained as follows:
+   * (a) Pre-processing involves multiplying input with cos factor,
+   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
+   *              where,
+   *                 r(n) -- output of preprocessing
+   *                 u(n) -- input to preprocessing(actual Source buffer)
+   * (b) Calculation of DCT2 using FFT is divided into three steps:
+   *                  Step1: Re-ordering of even and odd elements of input.
+   *                  Step2: Calculating FFT of the re-ordered input.
+   *                  Step3: Taking the real part of the product of FFT output and weights.
+   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
+   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *                        where,
+   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
+   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
+   */
+
+  /*-------- Pre-processing ------------*/
+  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
+  arm_scale_f32(pInlineBuffer, 2.0f, pInlineBuffer, S->N);
+  arm_mult_f32(pInlineBuffer, cosFact, pInlineBuffer, S->N);
+
+  /* ----------------------------------------------------------------
+   * Step1: Re-ordering of even and odd elements as
+   *             pState[i] =  pInlineBuffer[2*i] and
+   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
+   ---------------------------------------------------------------------*/
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
+  pS2 = pState + (S->N - 1U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
+  i = S->Nby2 >> 2U;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.
+   * Compute 4 outputs at a time */
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
+  i = (S->N - 1U) >> 2U;
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ * (float32_t) 0.5;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    /* points to the next real value */
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  i = (S->N - 1U) % 0x4U;
+
+  while (i > 0U)
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  }
+
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+#else
+
+  /* Initializing the loop counter to N/2 */
+  i = S->Nby2;
+
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter */
+  i = S->N;
+
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_f32 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_f32 (pState, weights, pState, S->N);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ * (float32_t) 0.5;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* Initializing the loop counter */
+  i = (S->N - 1U);
+
+  do
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing loop counter */
+  i = S->N;
+
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = in * S->normalize;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
index 7522454b..e1d80c0e 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_f32.c
@@ -1,131 +1,130 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dct4_init_f32.c
- * Description:  Initialization function of DCT-4 & IDCT4 F32
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup DCT4_IDCT4
- */
-
-
-/**
-  @addtogroup DCT4_IDCT4
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point DCT4/IDCT4.
-  @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure
-  @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure
-  @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure
-  @param[in]     N			length of the DCT4
-  @param[in]     Nby2       half of the length of the DCT4
-  @param[in]     normalize  normalizing factor.
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
-
-  @par           Normalizing factor
-                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
-                   Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
-
-                   \image html dct4NormalizingF32Table.gif
- */
-
-arm_status arm_dct4_init_f32(
-  arm_dct4_instance_f32 * S,
-  arm_rfft_instance_f32 * S_RFFT,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  float32_t normalize)
-{
-  /* Initialize the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
-    /* Initialize the table modifier values */
-  case 8192U:
-    S->pTwiddle = Weights_8192;
-    S->pCosFactor = cos_factors_8192;
-    break;
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
-  case 2048U:
-    S->pTwiddle = Weights_2048;
-    S->pCosFactor = cos_factors_2048;
-    break;
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
-  case 512U:
-    S->pTwiddle = Weights_512;
-    S->pCosFactor = cos_factors_512;
-    break;
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
-  case 128U:
-    S->pTwiddle = Weights_128;
-    S->pCosFactor = cos_factors_128;
-    break;
-  #endif
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT Function */
-  arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**
-  @} end of DCT4_IDCT4 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_init_f32.c
+ * Description:  Initialization function of DCT-4 & IDCT4 F32
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+ /**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point DCT4/IDCT4.
+  @param[in,out] S          points to an instance of floating-point DCT4/IDCT4 structure
+  @param[in]     S_RFFT     points to an instance of floating-point RFFT/RIFFT structure
+  @param[in]     S_CFFT     points to an instance of floating-point CFFT/CIFFT structure
+  @param[in]     N			length of the DCT4
+  @param[in]     Nby2       half of the length of the DCT4
+  @param[in]     normalize  normalizing factor.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
+
+  @par           Normalizing factor
+                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+                   Floating-point normalizing factors are mentioned in the table below for different DCT sizes:
+
+                   \image html dct4NormalizingF32Table.gif
+ */
+
+arm_status arm_dct4_init_f32(
+  arm_dct4_instance_f32 * S,
+  arm_rfft_instance_f32 * S_RFFT,
+  arm_cfft_radix4_instance_f32 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  float32_t normalize)
+{
+  /* Initialize the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+
+  /* Initialize the DCT4 length */
+  S->N = N;
+
+  /* Initialize the half of DCT4 length */
+  S->Nby2 = Nby2;
+
+  /* Initialize the DCT4 Normalizing factor */
+  S->normalize = normalize;
+
+  /* Initialize Real FFT Instance */
+  S->pRfft = S_RFFT;
+
+  /* Initialize Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  switch (N)
+  {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_8192)
+    /* Initialize the table modifier values */
+  case 8192U:
+    S->pTwiddle = Weights_8192;
+    S->pCosFactor = cos_factors_8192;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_2048)
+  case 2048U:
+    S->pTwiddle = Weights_2048;
+    S->pCosFactor = cos_factors_2048;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_512)
+  case 512U:
+    S->pTwiddle = Weights_512;
+    S->pCosFactor = cos_factors_512;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_F32_128)
+  case 128U:
+    S->pTwiddle = Weights_128;
+    S->pCosFactor = cos_factors_128;
+    break;
+  #endif
+  default:
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+
+  /* Initialize the RFFT/RIFFT Function */
+  arm_rfft_init_f32(S->pRfft, S->pCfft, S->N, 0U, 1U);
+
+  /* return the status of DCT4 Init function */
+  return (status);
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
index c5d834ac..5390da3c 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q15.c
@@ -1,130 +1,130 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dct4_init_q15.c
- * Description:  Initialization function of DCT-4 & IDCT4 Q15
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup DCT4_IDCT4
- */
-
-/**
-  @addtogroup DCT4_IDCT4
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 DCT4/IDCT4.
-  @param[in,out] S         points to an instance of Q15 DCT4/IDCT4 structure
-  @param[in]     S_RFFT    points to an instance of Q15 RFFT/RIFFT structure
-  @param[in]     S_CFFT    points to an instance of Q15 CFFT/CIFFT structure
-  @param[in]     N          length of the DCT4
-  @param[in]     Nby2       half of the length of the DCT4
-  @param[in]     normalize  normalizing factor
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
-
-  @par           Normalizing factor
-                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
-                   Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
-
-                   \image html dct4NormalizingQ15Table.gif
- */
-
-arm_status arm_dct4_init_q15(
-  arm_dct4_instance_q15 * S,
-  arm_rfft_instance_q15 * S_RFFT,
-  arm_cfft_radix4_instance_q15 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q15_t normalize)
-{
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
-    /* Initialize the table modifier values */
-  case 8192U:
-    S->pTwiddle = WeightsQ15_8192;
-    S->pCosFactor = cos_factorsQ15_8192;
-    break;
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
-  case 2048U:
-    S->pTwiddle = WeightsQ15_2048;
-    S->pCosFactor = cos_factorsQ15_2048;
-    break;
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
-  case 512U:
-    S->pTwiddle = WeightsQ15_512;
-    S->pCosFactor = cos_factorsQ15_512;
-    break;
-  #endif 
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
-  case 128U:
-    S->pTwiddle = WeightsQ15_128;
-    S->pCosFactor = cos_factorsQ15_128;
-    break;
-  #endif 
-
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT */
-  arm_rfft_init_q15(S->pRfft, S->N, 0U, 1U);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**
-  @} end of DCT4_IDCT4 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_init_q15.c
+ * Description:  Initialization function of DCT-4 & IDCT4 Q15
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+ /**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 DCT4/IDCT4.
+  @param[in,out] S         points to an instance of Q15 DCT4/IDCT4 structure
+  @param[in]     S_RFFT    points to an instance of Q15 RFFT/RIFFT structure
+  @param[in]     S_CFFT    points to an instance of Q15 CFFT/CIFFT structure
+  @param[in]     N          length of the DCT4
+  @param[in]     Nby2       half of the length of the DCT4
+  @param[in]     normalize  normalizing factor
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
+
+  @par           Normalizing factor
+                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+                   Normalizing factors in 1.15 format are mentioned in the table below for different DCT sizes:
+
+                   \image html dct4NormalizingQ15Table.gif
+ */
+
+arm_status arm_dct4_init_q15(
+  arm_dct4_instance_q15 * S,
+  arm_rfft_instance_q15 * S_RFFT,
+  arm_cfft_radix4_instance_q15 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  q15_t normalize)
+{
+  /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /* Initialize the DCT4 length */
+  S->N = N;
+
+  /* Initialize the half of DCT4 length */
+  S->Nby2 = Nby2;
+
+  /* Initialize the DCT4 Normalizing factor */
+  S->normalize = normalize;
+
+  /* Initialize Real FFT Instance */
+  S->pRfft = S_RFFT;
+
+  /* Initialize Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  switch (N)
+  {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_8192)
+    /* Initialize the table modifier values */
+  case 8192U:
+    S->pTwiddle = WeightsQ15_8192;
+    S->pCosFactor = cos_factorsQ15_8192;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_2048)
+  case 2048U:
+    S->pTwiddle = WeightsQ15_2048;
+    S->pCosFactor = cos_factorsQ15_2048;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_512)
+  case 512U:
+    S->pTwiddle = WeightsQ15_512;
+    S->pCosFactor = cos_factorsQ15_512;
+    break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q15_128)
+  case 128U:
+    S->pTwiddle = WeightsQ15_128;
+    S->pCosFactor = cos_factorsQ15_128;
+    break;
+  #endif 
+
+  default:
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+
+  /* Initialize the RFFT/RIFFT */
+  arm_rfft_init_q15(S->pRfft, S->N, 0U, 1U);
+
+  /* return the status of DCT4 Init function */
+  return (status);
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
index c0294d78..4c7622a1 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_init_q31.c
@@ -1,130 +1,129 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dct4_init_q31.c
- * Description:  Initialization function of DCT-4 & IDCT4 Q31
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup DCT4_IDCT4
- */
-
-
-/**
-  @addtogroup DCT4_IDCT4
-  @{
- */
-
-/**
-  @brief  Initialization function for the Q31 DCT4/IDCT4.
-  @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
-  @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
-  @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
-  @param[in]     N          length of the DCT4.
-  @param[in]     Nby2       half of the length of the DCT4.
-  @param[in]     normalize  normalizing factor.
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
-
-  @par           Normalizing factor:
-                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
-                   Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
-
-                   \image html dct4NormalizingQ31Table.gif
- */
-
-arm_status arm_dct4_init_q31(
-  arm_dct4_instance_q31 * S,
-  arm_rfft_instance_q31 * S_RFFT,
-  arm_cfft_radix4_instance_q31 * S_CFFT,
-  uint16_t N,
-  uint16_t Nby2,
-  q31_t normalize)
-{
-  /* Initialize the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /* Initialize the DCT4 length */
-  S->N = N;
-
-  /* Initialize the half of DCT4 length */
-  S->Nby2 = Nby2;
-
-  /* Initialize the DCT4 Normalizing factor */
-  S->normalize = normalize;
-
-  /* Initialize Real FFT Instance */
-  S->pRfft = S_RFFT;
-
-  /* Initialize Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  switch (N)
-  {
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
-    /* Initialize the table modifier values */
-  case 8192U:
-    S->pTwiddle = WeightsQ31_8192;
-    S->pCosFactor = cos_factorsQ31_8192;
-    break;
-  #endif
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
-  case 2048U:
-    S->pTwiddle = WeightsQ31_2048;
-    S->pCosFactor = cos_factorsQ31_2048;
-    break;
-  #endif 
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
-  case 512U:
-    S->pTwiddle = WeightsQ31_512;
-    S->pCosFactor = cos_factorsQ31_512;
-    break;
-  #endif 
-
-  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
-  case 128U:
-    S->pTwiddle = WeightsQ31_128;
-    S->pCosFactor = cos_factorsQ31_128;
-    break;
-  #endif
-  default:
-    status = ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  /* Initialize the RFFT/RIFFT Function */
-  arm_rfft_init_q31(S->pRfft,  S->N, 0U, 1U);
-
-  /* return the status of DCT4 Init function */
-  return (status);
-}
-
-/**
-  @} end of DCT4_IDCT4 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_init_q31.c
+ * Description:  Initialization function of DCT-4 & IDCT4 Q31
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+ /**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief  Initialization function for the Q31 DCT4/IDCT4.
+  @param[in,out] S          points to an instance of Q31 DCT4/IDCT4 structure.
+  @param[in]     S_RFFT     points to an instance of Q31 RFFT/RIFFT structure
+  @param[in]     S_CFFT     points to an instance of Q31 CFFT/CIFFT structure
+  @param[in]     N          length of the DCT4.
+  @param[in]     Nby2       half of the length of the DCT4.
+  @param[in]     normalize  normalizing factor.
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>N</code> is not a supported transform length
+
+  @par           Normalizing factor:
+                   The normalizing factor is <code>sqrt(2/N)</code>, which depends on the size of transform <code>N</code>.
+                   Normalizing factors in 1.31 format are mentioned in the table below for different DCT sizes:
+
+                   \image html dct4NormalizingQ31Table.gif
+ */
+
+arm_status arm_dct4_init_q31(
+  arm_dct4_instance_q31 * S,
+  arm_rfft_instance_q31 * S_RFFT,
+  arm_cfft_radix4_instance_q31 * S_CFFT,
+  uint16_t N,
+  uint16_t Nby2,
+  q31_t normalize)
+{
+  /* Initialize the default arm status */
+  arm_status status = ARM_MATH_SUCCESS;
+
+  /* Initialize the DCT4 length */
+  S->N = N;
+
+  /* Initialize the half of DCT4 length */
+  S->Nby2 = Nby2;
+
+  /* Initialize the DCT4 Normalizing factor */
+  S->normalize = normalize;
+
+  /* Initialize Real FFT Instance */
+  S->pRfft = S_RFFT;
+
+  /* Initialize Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  switch (N)
+  {
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
+    /* Initialize the table modifier values */
+  case 8192U:
+    S->pTwiddle = WeightsQ31_8192;
+    S->pCosFactor = cos_factorsQ31_8192;
+    break;
+  #endif
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
+  case 2048U:
+    S->pTwiddle = WeightsQ31_2048;
+    S->pCosFactor = cos_factorsQ31_2048;
+    break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
+  case 512U:
+    S->pTwiddle = WeightsQ31_512;
+    S->pCosFactor = cos_factorsQ31_512;
+    break;
+  #endif 
+
+  #if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
+  case 128U:
+    S->pTwiddle = WeightsQ31_128;
+    S->pCosFactor = cos_factorsQ31_128;
+    break;
+  #endif
+  default:
+    status = ARM_MATH_ARGUMENT_ERROR;
+  }
+
+  /* Initialize the RFFT/RIFFT Function */
+  arm_rfft_init_q31(S->pRfft,  S->N, 0U, 1U);
+
+  /* return the status of DCT4 Init function */
+  return (status);
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
index ba263004..a4650da2 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q15.c
@@ -1,381 +1,381 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dct4_q15.c
- * Description:  Processing function of DCT4 & IDCT4 Q15
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup DCT4_IDCT4
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 DCT4/IDCT4.
-  @param[in]     S             points to an instance of the Q15 DCT4 structure.
-  @param[in]     pState        points to state buffer.
-  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
-  @return        none
- 
-  @par           Input an output formats
-                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
-                   Number of bits downscaled, depends on the size of the transform. The input and output
-                   formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
-
-                   \image html dct4FormatsQ15Table.gif
- */
-
-void arm_dct4_q15(
-  const arm_dct4_instance_q15 * S,
-        q15_t * pState,
-        q15_t * pInlineBuffer)
-{
-  const q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  const q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-        q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-        q15_t in;                                      /* Temporary variable */
-        uint32_t i;                                    /* Loop counter */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
-   * along with some pre-processing and post-processing.
-   * Computational procedure is explained as follows:
-   * (a) Pre-processing involves multiplying input with cos factor,
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
-   *              where,
-   *                 r(n) -- output of preprocessing
-   *                 u(n) -- input to preprocessing(actual Source buffer)
-   * (b) Calculation of DCT2 using FFT is divided into three steps:
-   *                  Step1: Re-ordering of even and odd elements of input.
-   *                  Step2: Calculating FFT of the re-ordered input.
-   *                  Step3: Taking the real part of the product of FFT output and weights.
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *                        where,
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
-   */
-
-  /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------
-   * Step1: Re-ordering of even and odd elements as
-   *             pState[i] =  pInlineBuffer[2*i] and
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = S->Nby2 >> 2U;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2U;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-
-  /* ---------------------------------------------------------
-   *     Step2: Calculate RFFT for N-point input
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------
-   *  Step3: Multiply the FFT output with the weights.
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.13 format.
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15 (pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = (S->N - 1U) >> 2U;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1U;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  i = (S->N - 1U) % 0x4U;
-
-  while (i > 0U)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-
-  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2U;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-
-#else
-
-  /* Initializing the loop counter to N/2 */
-  i = S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-
-  /* ---------------------------------------------------------
-   *     Step2: Calculate RFFT for N-point input
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------
-   *  Step3: Multiply the FFT output with the weights.
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.13 format.
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
-  arm_shift_q15 (pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1U;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = (S->N - 1U);
-
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing loop counter */
-  i = S->N;
-
-  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
-
-    /* Decrement loop counter */
-    i--;
-
-  } while (i > 0U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-}
-
-/**
-  @} end of DCT4_IDCT4 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_q15.c
+ * Description:  Processing function of DCT4 & IDCT4 Q15
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+/**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 DCT4/IDCT4.
+  @param[in]     S             points to an instance of the Q15 DCT4 structure.
+  @param[in]     pState        points to state buffer.
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+  @return        none
+ 
+  @par           Input an output formats
+                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
+                   Number of bits downscaled, depends on the size of the transform. The input and output
+                   formats for different DCT sizes and number of bits to upscale are mentioned in the table below:
+
+                   \image html dct4FormatsQ15Table.gif
+ */
+
+void arm_dct4_q15(
+  const arm_dct4_instance_q15 * S,
+        q15_t * pState,
+        q15_t * pInlineBuffer)
+{
+  const q15_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
+  const q15_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
+        q15_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
+        q15_t in;                                      /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
+
+
+  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
+   * along with some pre-processing and post-processing.
+   * Computational procedure is explained as follows:
+   * (a) Pre-processing involves multiplying input with cos factor,
+   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
+   *              where,
+   *                 r(n) -- output of preprocessing
+   *                 u(n) -- input to preprocessing(actual Source buffer)
+   * (b) Calculation of DCT2 using FFT is divided into three steps:
+   *                  Step1: Re-ordering of even and odd elements of input.
+   *                  Step2: Calculating FFT of the re-ordered input.
+   *                  Step3: Taking the real part of the product of FFT output and weights.
+   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
+   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *                        where,
+   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
+   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
+   */
+
+  /*-------- Pre-processing ------------*/
+  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
+  arm_mult_q15 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+  arm_shift_q15 (pInlineBuffer, 1, pInlineBuffer, S->N);
+
+  /* ----------------------------------------------------------------
+   * Step1: Re-ordering of even and odd elements as
+   *             pState[i] =  pInlineBuffer[2*i] and
+   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
+   ---------------------------------------------------------------------*/
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
+  pS2 = pState + (S->N - 1U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
+  i = S->Nby2 >> 2U;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.
+   * Compute 4 outputs at a time */
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
+
+  /* The output of complex multiplication is in 3.13 format.
+   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
+  arm_shift_q15 (pState, 2, pState, S->N * 2);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
+  i = (S->N - 1U) >> 2U;
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ >> 1U;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    /* points to the next real value */
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  i = (S->N - 1U) % 0x4U;
+
+  while (i > 0U)
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
+
+    in = *pbuff;
+    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
+
+    in = *pbuff;
+    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
+
+    in = *pbuff;
+    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+
+#else
+
+  /* Initializing the loop counter to N/2 */
+  i = S->Nby2;
+
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter */
+  i = S->N;
+
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_q15 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q15 (pState, weights, pState, S->N);
+
+  /* The output of complex multiplication is in 3.13 format.
+   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.15 format by shifting left by 2 bits. */
+  arm_shift_q15 (pState, 2, pState, S->N * 2);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ >> 1U;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* Initializing the loop counter */
+  i = (S->N - 1U);
+
+  do
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing loop counter */
+  i = S->N;
+
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = ((q15_t) (((q31_t) in * S->normalize) >> 15));
+
+    /* Decrement loop counter */
+    i--;
+
+  } while (i > 0U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
index 5757083f..6cbccff8 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_dct4_q31.c
@@ -1,383 +1,383 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_dct4_q31.c
- * Description:  Processing function of DCT4 & IDCT4 Q31
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/**
-  @addtogroup DCT4_IDCT4
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 DCT4/IDCT4.
-  @param[in]     S             points to an instance of the Q31 DCT4 structure.
-  @param[in]     pState        points to state buffer.
-  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
-  @return        none
-
-  @par           Input an output formats
-                   Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,
-                   as the conversion from DCT2 to DCT4 involves one subtraction.
-                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
-                   Number of bits downscaled, depends on the size of the transform.
-                   The input and output formats for different DCT sizes and number of bits to upscale are
-                   mentioned in the table below:
-
-                   \image html dct4FormatsQ31Table.gif
- */
-
-void arm_dct4_q31(
-  const arm_dct4_instance_q31 * S,
-        q31_t * pState,
-        q31_t * pInlineBuffer)
-{
-  const q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
-  const q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
-        q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
-        q31_t in;                                      /* Temporary variable */
-        uint32_t i;                                    /* Loop counter */
-
-
-  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
-   * along with some pre-processing and post-processing.
-   * Computational procedure is explained as follows:
-   * (a) Pre-processing involves multiplying input with cos factor,
-   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
-   *              where,
-   *                 r(n) -- output of preprocessing
-   *                 u(n) -- input to preprocessing(actual Source buffer)
-   * (b) Calculation of DCT2 using FFT is divided into three steps:
-   *                  Step1: Re-ordering of even and odd elements of input.
-   *                  Step2: Calculating FFT of the re-ordered input.
-   *                  Step3: Taking the real part of the product of FFT output and weights.
-   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
-   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *                        where,
-   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
-   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
-   */
-
-  /*-------- Pre-processing ------------*/
-  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
-  arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
-  arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N);
-
-  /* ----------------------------------------------------------------
-   * Step1: Re-ordering of even and odd elements as
-   *             pState[i] =  pInlineBuffer[2*i] and
-   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
-   ---------------------------------------------------------------------*/
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
-  pS2 = pState + (S->N - 1U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-
-#if defined (ARM_MATH_LOOPUNROLL)
-
-  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
-  i = S->Nby2 >> 2U;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    *pS1++ = *pbuff++;
-    *pS2-- = *pbuff++;
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2U;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.
-   * Compute 4 outputs at a time */
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-
-  /* ---------------------------------------------------------
-   *     Step2: Calculate RFFT for N-point input
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------
-   *  Step3: Multiply the FFT output with the weights.
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.29 format.
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31 (pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
-  i = (S->N - 1U) >> 2U;
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1U;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
-   ** a second loop below computes the remaining 1 to 3 samples. */
-  do
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    /* points to the next real value */
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    in = *pS1++ - in;
-    *pbuff++ = in;
-    pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
-   ** No loop unrolling is used. */
-  i = (S->N - 1U) % 0x4U;
-
-  while (i > 0U)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-
-  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
-  i = S->N >> 2U;
-
-  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-
-#else
-
-  /* Initializing the loop counter to N/2 */
-  i = S->Nby2;
-
-  do
-  {
-    /* Re-ordering of even and odd elements */
-    /* pState[i] =  pInlineBuffer[2*i] */
-    *pS1++ = *pbuff++;
-    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
-    *pS2-- = *pbuff++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-  /* pbuff initialized to input buffer */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Initializing the loop counter */
-  i = S->N;
-
-  do
-  {
-    /* Writing the re-ordered output back to inplace input buffer */
-    *pbuff++ = *pS1++;
-
-    /* Decrement the loop counter */
-    i--;
-  } while (i > 0U);
-
-
-  /* ---------------------------------------------------------
-   *     Step2: Calculate RFFT for N-point input
-   * ---------------------------------------------------------- */
-  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
-  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
-
-  /*----------------------------------------------------------------------
-   *  Step3: Multiply the FFT output with the weights.
-   *----------------------------------------------------------------------*/
-  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
-
-  /* The output of complex multiplication is in 3.29 format.
-   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
-  arm_shift_q31(pState, 2, pState, S->N * 2);
-
-  /* ----------- Post-processing ---------- */
-  /* DCT-IV can be obtained from DCT-II by the equation,
-   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
-   *       Hence, Y4(0) = Y2(0)/2  */
-  /* Getting only real part from the output and Converting to DCT-IV */
-
-  /* pbuff initialized to input buffer. */
-  pbuff = pInlineBuffer;
-
-  /* pS1 initialized to pState */
-  pS1 = pState;
-
-  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
-  in = *pS1++ >> 1U;
-  /* input buffer acts as inplace, so output values are stored in the input itself. */
-  *pbuff++ = in;
-
-  /* pState pointer is incremented twice as the real values are located alternatively in the array */
-  pS1++;
-
-  /* Initializing the loop counter */
-  i = (S->N - 1U);
-
-  while (i > 0U)
-  {
-    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
-    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
-    in = *pS1++ - in;
-    *pbuff++ = in;
-
-    /* points to the next real value */
-    pS1++;
-
-    /* Decrement loop counter */
-    i--;
-  }
-
-  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
-
-  /* Initializing loop counter */
-  i = S->N;
-
-  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
-  pbuff = pInlineBuffer;
-
-  do
-  {
-    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
-    in = *pbuff;
-    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
-
-    /* Decrement loop counter */
-    i--;
-  } while (i > 0U);
-
-#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
-
-}
-
-/**
-  @} end of DCT4_IDCT4 group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_dct4_q31.c
+ * Description:  Processing function of DCT4 & IDCT4 Q31
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+/**
+  @addtogroup DCT4_IDCT4
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 DCT4/IDCT4.
+  @param[in]     S             points to an instance of the Q31 DCT4 structure.
+  @param[in]     pState        points to state buffer.
+  @param[in,out] pInlineBuffer points to the in-place input and output buffer.
+  @return        none
+
+  @par           Input an output formats
+                   Input samples need to be downscaled by 1 bit to avoid saturations in the Q31 DCT process,
+                   as the conversion from DCT2 to DCT4 involves one subtraction.
+                   Internally inputs are downscaled in the RFFT process function to avoid overflows.
+                   Number of bits downscaled, depends on the size of the transform.
+                   The input and output formats for different DCT sizes and number of bits to upscale are
+                   mentioned in the table below:
+
+                   \image html dct4FormatsQ31Table.gif
+ */
+
+void arm_dct4_q31(
+  const arm_dct4_instance_q31 * S,
+        q31_t * pState,
+        q31_t * pInlineBuffer)
+{
+  const q31_t *weights = S->pTwiddle;                  /* Pointer to the Weights table */
+  const q31_t *cosFact = S->pCosFactor;                /* Pointer to the cos factors table */
+        q31_t *pS1, *pS2, *pbuff;                      /* Temporary pointers for input buffer and pState buffer */
+        q31_t in;                                      /* Temporary variable */
+        uint32_t i;                                    /* Loop counter */
+
+
+  /* DCT4 computation involves DCT2 (which is calculated using RFFT)
+   * along with some pre-processing and post-processing.
+   * Computational procedure is explained as follows:
+   * (a) Pre-processing involves multiplying input with cos factor,
+   *     r(n) = 2 * u(n) * cos(pi*(2*n+1)/(4*n))
+   *              where,
+   *                 r(n) -- output of preprocessing
+   *                 u(n) -- input to preprocessing(actual Source buffer)
+   * (b) Calculation of DCT2 using FFT is divided into three steps:
+   *                  Step1: Re-ordering of even and odd elements of input.
+   *                  Step2: Calculating FFT of the re-ordered input.
+   *                  Step3: Taking the real part of the product of FFT output and weights.
+   * (c) Post-processing - DCT4 can be obtained from DCT2 output using the following equation:
+   *                   Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *                        where,
+   *                           Y4 -- DCT4 output,   Y2 -- DCT2 output
+   * (d) Multiplying the output with the normalizing factor sqrt(2/N).
+   */
+
+  /*-------- Pre-processing ------------*/
+  /* Multiplying input with cos factor i.e. r(n) = 2 * x(n) * cos(pi*(2*n+1)/(4*n)) */
+  arm_mult_q31 (pInlineBuffer, cosFact, pInlineBuffer, S->N);
+  arm_shift_q31 (pInlineBuffer, 1, pInlineBuffer, S->N);
+
+  /* ----------------------------------------------------------------
+   * Step1: Re-ordering of even and odd elements as
+   *             pState[i] =  pInlineBuffer[2*i] and
+   *             pState[N-i-1] = pInlineBuffer[2*i+1] where i = 0 to N/2
+   ---------------------------------------------------------------------*/
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* pS2 initialized to pState+N-1, so that it points to the end of the state buffer */
+  pS2 = pState + (S->N - 1U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+
+#if defined (ARM_MATH_LOOPUNROLL)
+
+  /* Initializing the loop counter to N/2 >> 2 for loop unrolling by 4 */
+  i = S->Nby2 >> 2U;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    *pS1++ = *pbuff++;
+    *pS2-- = *pbuff++;
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.
+   * Compute 4 outputs at a time */
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
+
+  /* The output of complex multiplication is in 3.29 format.
+   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
+  arm_shift_q31 (pState, 2, pState, S->N * 2);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* Initializing the loop counter to N >> 2 for loop unrolling by 4 */
+  i = (S->N - 1U) >> 2U;
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ >> 1U;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
+   ** a second loop below computes the remaining 1 to 3 samples. */
+  do
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    /* points to the next real value */
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    in = *pS1++ - in;
+    *pbuff++ = in;
+    pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
+   ** No loop unrolling is used. */
+  i = (S->N - 1U) % 0x4U;
+
+  while (i > 0U)
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing the loop counter to N/4 instead of N for loop unrolling */
+  i = S->N >> 2U;
+
+  /* pbuff initialized to the pInlineBuffer(now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  /* Processing with loop unrolling 4 times as N is always multiple of 4.  Compute 4 outputs at a time */
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
+
+    in = *pbuff;
+    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
+
+    in = *pbuff;
+    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
+
+    in = *pbuff;
+    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+
+#else
+
+  /* Initializing the loop counter to N/2 */
+  i = S->Nby2;
+
+  do
+  {
+    /* Re-ordering of even and odd elements */
+    /* pState[i] =  pInlineBuffer[2*i] */
+    *pS1++ = *pbuff++;
+    /* pState[N-i-1] = pInlineBuffer[2*i+1] */
+    *pS2-- = *pbuff++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+  /* pbuff initialized to input buffer */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Initializing the loop counter */
+  i = S->N;
+
+  do
+  {
+    /* Writing the re-ordered output back to inplace input buffer */
+    *pbuff++ = *pS1++;
+
+    /* Decrement the loop counter */
+    i--;
+  } while (i > 0U);
+
+
+  /* ---------------------------------------------------------
+   *     Step2: Calculate RFFT for N-point input
+   * ---------------------------------------------------------- */
+  /* pInlineBuffer is real input of length N , pState is the complex output of length 2N */
+  arm_rfft_q31 (S->pRfft, pInlineBuffer, pState);
+
+  /*----------------------------------------------------------------------
+   *  Step3: Multiply the FFT output with the weights.
+   *----------------------------------------------------------------------*/
+  arm_cmplx_mult_cmplx_q31 (pState, weights, pState, S->N);
+
+  /* The output of complex multiplication is in 3.29 format.
+   * Hence changing the format of N (i.e. 2*N elements) complex numbers to 1.31 format by shifting left by 2 bits. */
+  arm_shift_q31(pState, 2, pState, S->N * 2);
+
+  /* ----------- Post-processing ---------- */
+  /* DCT-IV can be obtained from DCT-II by the equation,
+   *       Y4(k) = Y2(k) - Y4(k-1) and Y4(-1) = Y4(0)
+   *       Hence, Y4(0) = Y2(0)/2  */
+  /* Getting only real part from the output and Converting to DCT-IV */
+
+  /* pbuff initialized to input buffer. */
+  pbuff = pInlineBuffer;
+
+  /* pS1 initialized to pState */
+  pS1 = pState;
+
+  /* Calculating Y4(0) from Y2(0) using Y4(0) = Y2(0)/2 */
+  in = *pS1++ >> 1U;
+  /* input buffer acts as inplace, so output values are stored in the input itself. */
+  *pbuff++ = in;
+
+  /* pState pointer is incremented twice as the real values are located alternatively in the array */
+  pS1++;
+
+  /* Initializing the loop counter */
+  i = (S->N - 1U);
+
+  while (i > 0U)
+  {
+    /* Calculating Y4(1) to Y4(N-1) from Y2 using equation Y4(k) = Y2(k) - Y4(k-1) */
+    /* pState pointer (pS1) is incremented twice as the real values are located alternatively in the array */
+    in = *pS1++ - in;
+    *pbuff++ = in;
+
+    /* points to the next real value */
+    pS1++;
+
+    /* Decrement loop counter */
+    i--;
+  }
+
+  /*------------ Normalizing the output by multiplying with the normalizing factor ----------*/
+
+  /* Initializing loop counter */
+  i = S->N;
+
+  /* pbuff initialized to the pInlineBuffer (now contains the output values) */
+  pbuff = pInlineBuffer;
+
+  do
+  {
+    /* Multiplying pInlineBuffer with the normalizing factor sqrt(2/N) */
+    in = *pbuff;
+    *pbuff++ = ((q31_t) (((q63_t) in * S->normalize) >> 31));
+
+    /* Decrement loop counter */
+    i--;
+  } while (i > 0U);
+
+#endif /* #if defined (ARM_MATH_LOOPUNROLL) */
+
+}
+
+/**
+  @} end of DCT4_IDCT4 group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f16.c
new file mode 100755
index 00000000..4ec6cd99
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f16.c
@@ -0,0 +1,161 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_f16.c
+ * Description:  MFCC function for the f16 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+#include "dsp/transform_functions_f16.h"
+#include "dsp/statistics_functions_f16.h"
+#include "dsp/basic_math_functions_f16.h"
+#include "dsp/complex_math_functions_f16.h"
+#include "dsp/fast_math_functions_f16.h"
+#include "dsp/matrix_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @defgroup MFCC MFCC
+
+  MFCC Transform
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+/**
+  @brief         MFCC F16
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples
+  @param[out]     pDst  points to the output MFCC values
+  @param[inout]     pTmp  points to a temporary buffer of complex
+
+  @return        none
+
+  @par           Description
+                   The number of input samples if the FFT length used
+                   when initializing the instance data structure.
+
+                   The temporary buffer has a 2*fft length size when MFCC
+                   is implemented with CFFT.
+                   It has length FFT Length + 2 when implemented with RFFT
+                   (default implementation).
+
+                   The source buffer is modified by this function.
+
+ */
+void arm_mfcc_f16(
+  const arm_mfcc_instance_f16 * S,
+  float16_t *pSrc,
+  float16_t *pDst,
+  float16_t *pTmp
+  )
+{
+  float16_t maxValue;
+  uint32_t  index; 
+  uint32_t i;
+  float16_t result;
+  const float16_t *coefs=S->filterCoefs;
+  arm_matrix_instance_f16 pDctMat;
+
+  /* Normalize */
+  arm_absmax_f16(pSrc,S->fftLen,&maxValue,&index);
+
+  arm_scale_f16(pSrc,1.0f16/(_Float16)maxValue,pSrc,S->fftLen);
+
+  /* Multiply by window */
+  arm_mult_f16(pSrc,S->windowCoefs,pSrc,S->fftLen);
+
+  /* Compute spectrum magnitude 
+  */
+#if defined(ARM_MFCC_CFFT_BASED)
+  /* some HW accelerator for CMSIS-DSP used in some boards
+     are only providing acceleration for CFFT.
+     With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC
+     will be accelerated on those boards.
+ 
+     The default is to use RFFT
+  */
+  /* Convert from real to complex */
+  for(i=0; i < S->fftLen ; i++)
+  {
+    pTmp[2*i] = pSrc[i];
+    pTmp[2*i+1] = 0.0f16;
+  }
+  arm_cfft_f16(&(S->cfft),pTmp,0,1);
+#else
+  /* Default RFFT based implementation */
+  arm_rfft_fast_f16(&(S->rfft),pSrc,pTmp,0);
+  /* Unpack real values */
+  pTmp[S->fftLen]=pTmp[1];
+  pTmp[S->fftLen+1]=0.0f16;
+  pTmp[1]=0.0f;
+#endif
+  arm_cmplx_mag_f16(pTmp,pSrc,S->fftLen);
+
+  /* Apply MEL filters */
+  for(i=0; i<S->nbMelFilters; i++)
+  {
+      arm_dot_prod_f16(pSrc+S->filterPos[i],
+        coefs,
+        S->filterLengths[i],
+        &result);
+
+      coefs += S->filterLengths[i];
+
+      pTmp[i] = result;
+
+  }
+
+  /* Compute the log */
+  arm_offset_f16(pTmp,1.0e-4f16,pTmp,S->nbMelFilters);
+  arm_vlog_f16(pTmp,pTmp,S->nbMelFilters);
+
+  /* Multiply with the DCT matrix */
+
+  pDctMat.numRows=S->nbDctOutputs;
+  pDctMat.numCols=S->nbMelFilters;
+  pDctMat.pData=(float16_t*)S->dctCoefs;
+
+  arm_mat_vec_mult_f16(&pDctMat, pTmp, pDst);
+      
+
+}
+
+#endif /* defined(ARM_FLOAT16_SUPPORTED) */
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f32.c
new file mode 100755
index 00000000..5ac94588
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_f32.c
@@ -0,0 +1,159 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_f32.c
+ * Description:  MFCC function for the f32 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#include "dsp/transform_functions.h"
+#include "dsp/statistics_functions.h"
+#include "dsp/basic_math_functions.h"
+#include "dsp/complex_math_functions.h"
+#include "dsp/fast_math_functions.h"
+#include "dsp/matrix_functions.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @defgroup MFCC MFCC
+
+  MFCC Transform
+
+  There are separate functions for floating-point, Q15, and Q31 data types.
+ */
+
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+/**
+  @brief         MFCC F32
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples
+  @param[out]     pDst  points to the output MFCC values
+  @param[inout]     pTmp  points to a temporary buffer of complex
+
+  @return        none
+
+  @par           Description
+                   The number of input samples if the FFT length used
+                   when initializing the instance data structure.
+
+                   The temporary buffer has a 2*fft length size when MFCC
+                   is implemented with CFFT.
+                   It has length FFT Length + 2 when implemented with RFFT
+                   (default implementation).
+
+                   The source buffer is modified by this function.
+
+ */
+void arm_mfcc_f32(
+  const arm_mfcc_instance_f32 * S,
+  float32_t *pSrc,
+  float32_t *pDst,
+  float32_t *pTmp
+  )
+{
+  float32_t maxValue;
+  uint32_t  index; 
+  uint32_t i;
+  float32_t result;
+  const float32_t *coefs=S->filterCoefs;
+  arm_matrix_instance_f32 pDctMat;
+
+  /* Normalize */
+  arm_absmax_f32(pSrc,S->fftLen,&maxValue,&index);
+
+  arm_scale_f32(pSrc,1.0f/maxValue,pSrc,S->fftLen);
+
+  /* Multiply by window */
+  arm_mult_f32(pSrc,S->windowCoefs,pSrc,S->fftLen);
+
+  /* Compute spectrum magnitude 
+  */
+#if defined(ARM_MFCC_CFFT_BASED)
+  /* some HW accelerator for CMSIS-DSP used in some boards
+     are only providing acceleration for CFFT.
+     With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC
+     will be accelerated on those boards.
+ 
+     The default is to use RFFT
+  */
+  /* Convert from real to complex */
+  for(i=0; i < S->fftLen ; i++)
+  {
+    pTmp[2*i] = pSrc[i];
+    pTmp[2*i+1] = 0.0f;
+  }
+  arm_cfft_f32(&(S->cfft),pTmp,0,1);
+#else
+  /* Default RFFT based implementation */
+  arm_rfft_fast_f32(&(S->rfft),pSrc,pTmp,0);
+  /* Unpack real values */
+  pTmp[S->fftLen]=pTmp[1];
+  pTmp[S->fftLen+1]=0.0f;
+  pTmp[1]=0.0f;
+#endif
+  arm_cmplx_mag_f32(pTmp,pSrc,S->fftLen);
+
+  /* Apply MEL filters */
+  for(i=0; i<S->nbMelFilters; i++)
+  {
+      arm_dot_prod_f32(pSrc+S->filterPos[i],
+        coefs,
+        S->filterLengths[i],
+        &result);
+
+      coefs += S->filterLengths[i];
+
+      pTmp[i] = result;
+
+  }
+
+  /* Compute the log */
+  arm_offset_f32(pTmp,1.0e-6f,pTmp,S->nbMelFilters);
+  arm_vlog_f32(pTmp,pTmp,S->nbMelFilters);
+
+  /* Multiply with the DCT matrix */
+
+  pDctMat.numRows=S->nbDctOutputs;
+  pDctMat.numCols=S->nbMelFilters;
+  pDctMat.pData=(float32_t*)S->dctCoefs;
+
+  arm_mat_vec_mult_f32(&pDctMat, pTmp, pDst);
+      
+
+}
+
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f16.c
new file mode 100755
index 00000000..d90fd0dc
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f16.c
@@ -0,0 +1,110 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_init_f16.c
+ * Description:  MFCC initialization function for the f16 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+
+#include "dsp/transform_functions_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+
+/**
+  @brief         Initialization of the MFCC F16 instance structure
+  @param[out]    S       points to the mfcc instance structure
+  @param[in]     fftLen  fft length
+  @param[in]     nbMelFilters  number of Mel filters
+  @param[in]     nbDctOutputs  number of Dct outputs
+  @param[in]     dctCoefs  points to an array of DCT coefficients
+  @param[in]     filterPos  points of the array of filter positions
+  @param[in]     filterLengths  points to the array of filter lengths
+  @param[in]     filterCoefs  points to the array of filter coefficients
+  @param[in]     windowCoefs  points to the array of window coefficients
+
+  @return        error status
+
+  @par           Description
+                   The matrix of Mel filter coefficients is sparse.
+                   Most of the coefficients are zero.
+                   To avoid multiplying the spectrogram by those zeros, the
+                   filter is applied only to a given position in the spectrogram
+                   and on a given number of FFT bins (the filter length).
+                   It is the reason for the arrays filterPos and filterLengths.
+
+                   window coefficients can describe (for instance) a Hamming window.
+                   The array has the same size as the FFT length.
+
+                   The folder Scripts is containing a Python script which can be used
+                   to generate the filter, dct and window arrays.
+ */
+
+arm_status arm_mfcc_init_f16(
+  arm_mfcc_instance_f16 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const float16_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const float16_t *filterCoefs,
+  const float16_t *windowCoefs
+  )
+{
+ arm_status status;
+
+ S->fftLen=fftLen;
+ S->nbMelFilters=nbMelFilters;
+ S->nbDctOutputs=nbDctOutputs;
+ S->dctCoefs=dctCoefs;
+ S->filterPos=filterPos;
+ S->filterLengths=filterLengths;
+ S->filterCoefs=filterCoefs;
+ S->windowCoefs=windowCoefs;
+
+ #if defined(ARM_MFCC_CFFT_BASED)
+ status=arm_cfft_init_f16(&(S->cfft),fftLen);
+ #else
+ status=arm_rfft_fast_init_f16(&(S->rfft),fftLen);
+ #endif
+ 
+ return(status);
+}
+
+#endif /* defined(ARM_FLOAT16_SUPPORTED) */
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f32.c
new file mode 100755
index 00000000..0690782e
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_f32.c
@@ -0,0 +1,107 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_init_f32.c
+ * Description:  MFCC initialization function for the f32 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+
+#include "dsp/transform_functions.h"
+
+
+
+/**
+  @brief         Initialization of the MFCC F32 instance structure
+  @param[out]    S       points to the mfcc instance structure
+  @param[in]     fftLen  fft length
+  @param[in]     nbMelFilters  number of Mel filters
+  @param[in]     nbDctOutputs  number of Dct outputs
+  @param[in]     dctCoefs  points to an array of DCT coefficients
+  @param[in]     filterPos  points of the array of filter positions
+  @param[in]     filterLengths  points to the array of filter lengths
+  @param[in]     filterCoefs  points to the array of filter coefficients
+  @param[in]     windowCoefs  points to the array of window coefficients
+
+  @return        error status
+
+  @par           Description
+                   The matrix of Mel filter coefficients is sparse.
+                   Most of the coefficients are zero.
+                   To avoid multiplying the spectrogram by those zeros, the
+                   filter is applied only to a given position in the spectrogram
+                   and on a given number of FFT bins (the filter length).
+                   It is the reason for the arrays filterPos and filterLengths.
+
+                   window coefficients can describe (for instance) a Hamming window.
+                   The array has the same size as the FFT length.
+
+                   The folder Scripts is containing a Python script which can be used
+                   to generate the filter, dct and window arrays.
+ */
+
+arm_status arm_mfcc_init_f32(
+  arm_mfcc_instance_f32 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const float32_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const float32_t *filterCoefs,
+  const float32_t *windowCoefs
+  )
+{
+ arm_status status;
+
+ S->fftLen=fftLen;
+ S->nbMelFilters=nbMelFilters;
+ S->nbDctOutputs=nbDctOutputs;
+ S->dctCoefs=dctCoefs;
+ S->filterPos=filterPos;
+ S->filterLengths=filterLengths;
+ S->filterCoefs=filterCoefs;
+ S->windowCoefs=windowCoefs;
+
+ #if defined(ARM_MFCC_CFFT_BASED)
+ status=arm_cfft_init_f32(&(S->cfft),fftLen);
+ #else
+ status=arm_rfft_fast_init_f32(&(S->rfft),fftLen);
+ #endif
+ 
+ return(status);
+}
+
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q15.c
new file mode 100755
index 00000000..60ff9f23
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q15.c
@@ -0,0 +1,107 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_init_q15.c
+ * Description:  MFCC initialization function for the q15 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+
+#include "dsp/transform_functions.h"
+
+
+
+/**
+  @brief         Initialization of the MFCC F32 instance structure
+  @param[out]    S       points to the mfcc instance structure
+  @param[in]     fftLen  fft length
+  @param[in]     nbMelFilters  number of Mel filters
+  @param[in]     nbDctOutputs  number of Dct outputs
+  @param[in]     dctCoefs  points to an array of DCT coefficients
+  @param[in]     filterPos  points of the array of filter positions
+  @param[in]     filterLengths  points to the array of filter lengths
+  @param[in]     filterCoefs  points to the array of filter coefficients
+  @param[in]     windowCoefs  points to the array of window coefficients
+
+  @return        error status
+
+  @par           Description
+                   The matrix of Mel filter coefficients is sparse.
+                   Most of the coefficients are zero.
+                   To avoid multiplying the spectrogram by those zeros, the
+                   filter is applied only to a given position in the spectrogram
+                   and on a given number of FFT bins (the filter length).
+                   It is the reason for the arrays filterPos and filterLengths.
+
+                   window coefficients can describe (for instance) a Hamming window.
+                   The array has the same size as the FFT length.
+
+                   The folder Scripts is containing a Python script which can be used
+                   to generate the filter, dct and window arrays.
+ */
+
+arm_status arm_mfcc_init_q15(
+  arm_mfcc_instance_q15 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const q15_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const q15_t *filterCoefs,
+  const q15_t *windowCoefs
+  )
+{
+ arm_status status;
+
+ S->fftLen=fftLen;
+ S->nbMelFilters=nbMelFilters;
+ S->nbDctOutputs=nbDctOutputs;
+ S->dctCoefs=dctCoefs;
+ S->filterPos=filterPos;
+ S->filterLengths=filterLengths;
+ S->filterCoefs=filterCoefs;
+ S->windowCoefs=windowCoefs;
+
+ #if defined(ARM_MFCC_CFFT_BASED)
+ status=arm_cfft_init_q15(&(S->cfft),fftLen);
+ #else
+ status=arm_rfft_init_q15(&(S->rfft),fftLen,0,1);
+ #endif
+ 
+ return(status);
+}
+
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q31.c
new file mode 100755
index 00000000..ce3d9dc0
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_init_q31.c
@@ -0,0 +1,107 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_init_q31.c
+ * Description:  MFCC initialization function for the q31 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+
+#include "dsp/transform_functions.h"
+
+
+
+/**
+  @brief         Initialization of the MFCC F32 instance structure
+  @param[out]    S       points to the mfcc instance structure
+  @param[in]     fftLen  fft length
+  @param[in]     nbMelFilters  number of Mel filters
+  @param[in]     nbDctOutputs  number of Dct outputs
+  @param[in]     dctCoefs  points to an array of DCT coefficients
+  @param[in]     filterPos  points of the array of filter positions
+  @param[in]     filterLengths  points to the array of filter lengths
+  @param[in]     filterCoefs  points to the array of filter coefficients
+  @param[in]     windowCoefs  points to the array of window coefficients
+
+  @return        error status
+
+  @par           Description
+                   The matrix of Mel filter coefficients is sparse.
+                   Most of the coefficients are zero.
+                   To avoid multiplying the spectrogram by those zeros, the
+                   filter is applied only to a given position in the spectrogram
+                   and on a given number of FFT bins (the filter length).
+                   It is the reason for the arrays filterPos and filterLengths.
+
+                   window coefficients can describe (for instance) a Hamming window.
+                   The array has the same size as the FFT length.
+
+                   The folder Scripts is containing a Python script which can be used
+                   to generate the filter, dct and window arrays.
+ */
+
+arm_status arm_mfcc_init_q31(
+  arm_mfcc_instance_q31 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const q31_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const q31_t *filterCoefs,
+  const q31_t *windowCoefs
+  )
+{
+ arm_status status;
+
+ S->fftLen=fftLen;
+ S->nbMelFilters=nbMelFilters;
+ S->nbDctOutputs=nbDctOutputs;
+ S->dctCoefs=dctCoefs;
+ S->filterPos=filterPos;
+ S->filterLengths=filterLengths;
+ S->filterCoefs=filterCoefs;
+ S->windowCoefs=windowCoefs;
+
+ #if defined(ARM_MFCC_CFFT_BASED)
+ status=arm_cfft_init_q31(&(S->cfft),fftLen);
+ #else
+ status=arm_rfft_init_q31(&(S->rfft),fftLen,0,1);
+ #endif
+ 
+ return(status);
+}
+
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q15.c
new file mode 100755
index 00000000..417cf9ee
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q15.c
@@ -0,0 +1,208 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_q15.c
+ * Description:  MFCC function for the q15 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#include "dsp/transform_functions.h"
+#include "dsp/statistics_functions.h"
+#include "dsp/basic_math_functions.h"
+#include "dsp/complex_math_functions.h"
+#include "dsp/fast_math_functions.h"
+#include "dsp/matrix_functions.h"
+
+/* Constants for Q15 implementation */
+#define LOG2TOLOG_Q15 0x02C5C860
+#define MICRO_Q15 0x00000219
+#define SHIFT_MELFILTER_SATURATION_Q15 10
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @defgroup MFCC MFCC
+
+  MFCC Transform
+
+  There are separate functions for floating-point, Q15, and Q15 data types.
+ */
+
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+/**
+  @brief         MFCC Q15
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples in Q15
+  @param[out]     pDst  points to the output MFCC values in q8.7 format
+  @param[inout]     pTmp  points to a temporary buffer of complex
+
+  @return        none
+
+  @par           Description
+                   The number of input samples is the FFT length used
+                   when initializing the instance data structure.
+
+                   The temporary buffer has a 2*fft length.
+
+                   The source buffer is modified by this function.
+
+                   The function may saturate. If the FFT length is too
+                   big and the number of MEL filters too small then the fixed
+                   point computations may saturate.
+
+ */
+
+arm_status arm_mfcc_q15(
+  const arm_mfcc_instance_q15 * S,
+  q15_t *pSrc,
+  q15_t *pDst,
+  q31_t *pTmp
+  )
+{
+    q15_t m;
+    uint32_t index;
+    uint32_t fftShift=0;
+    q31_t logExponent;
+    q63_t result;
+    arm_matrix_instance_q15 pDctMat;
+    uint32_t i;
+    uint32_t coefsPos;
+    uint32_t filterLimit;
+    q15_t *pTmp2=(q15_t*)pTmp;
+
+    arm_status status = ARM_MATH_SUCCESS;
+    
+    // q15
+    arm_absmax_q15(pSrc,S->fftLen,&m,&index);
+
+    if (m !=0)
+    {
+       q15_t quotient;
+       int16_t shift;
+
+       status = arm_divide_q15(0x7FFF,m,&quotient,&shift);
+       if (status != ARM_MATH_SUCCESS)
+       {
+          return(status);
+       }
+ 
+       arm_scale_q15(pSrc,quotient,shift,pSrc,S->fftLen);
+    }
+
+
+    // q15
+    arm_mult_q15(pSrc,S->windowCoefs, pSrc, S->fftLen);
+
+
+    /* Compute spectrum magnitude 
+    */
+    fftShift = 31 - __CLZ(S->fftLen);
+#if defined(ARM_MFCC_CFFT_BASED)
+    /* some HW accelerator for CMSIS-DSP used in some boards
+       are only providing acceleration for CFFT.
+       With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC
+       will be accelerated on those boards.
+ 
+       The default is to use RFFT
+    */
+    /* Convert from real to complex */
+    for(i=0; i < S->fftLen ; i++)
+    {
+      pTmp2[2*i] = pSrc[i];
+      pTmp2[2*i+1] = 0;
+    }
+    arm_cfft_q15(&(S->cfft),pTmp2,0,1);
+#else
+    /* Default RFFT based implementation */
+    arm_rfft_q15(&(S->rfft),pSrc,pTmp2);
+#endif
+    filterLimit = 1 + (S->fftLen >> 1);
+
+
+    // q15 - fftShift
+    arm_cmplx_mag_q15(pTmp2,pSrc,filterLimit);
+    // q14 - fftShift
+
+    /* Apply MEL filters */
+    coefsPos = 0;
+    for(i=0; i<S->nbMelFilters; i++)
+    {
+      arm_dot_prod_q15(pSrc+S->filterPos[i],
+        &(S->filterCoefs[coefsPos]),
+        S->filterLengths[i],
+        &result);
+
+      coefsPos += S->filterLengths[i];
+
+      // q34.29 - fftShift
+      result += MICRO_Q15;
+      result >>= SHIFT_MELFILTER_SATURATION_Q15;
+      // q34.29 - fftShift - satShift
+      pTmp[i] = __SSAT(result,31) ;
+
+    }
+
+
+    // q34.29 - fftShift - satShift
+    /* Compute the log */
+    arm_vlog_q31(pTmp,pTmp,S->nbMelFilters);
+
+
+    // q5.26
+   
+    logExponent = fftShift + 2 + SHIFT_MELFILTER_SATURATION_Q15;
+    logExponent = logExponent * LOG2TOLOG_Q15;
+
+
+    // q8.26
+    arm_offset_q31(pTmp,logExponent,pTmp,S->nbMelFilters);
+    arm_shift_q31(pTmp,-19,pTmp,S->nbMelFilters);
+    for(i=0; i<S->nbMelFilters; i++)
+    { 
+      pSrc[i] = __SSAT((q15_t)pTmp[i],16);
+    }
+
+    // q8.7
+
+    pDctMat.numRows=S->nbDctOutputs;
+    pDctMat.numCols=S->nbMelFilters;
+    pDctMat.pData=(q15_t*)S->dctCoefs;
+
+    arm_mat_vec_mult_q15(&pDctMat, pSrc, pDst);
+
+    return(status);
+}
+
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q31.c
new file mode 100755
index 00000000..57db4b35
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_mfcc_q31.c
@@ -0,0 +1,207 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_mfcc_q31.c
+ * Description:  MFCC function for the q31 version
+ *
+ * $Date:        07 September 2021
+ * $Revision:    V1.10.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+
+
+#include "dsp/transform_functions.h"
+#include "dsp/statistics_functions.h"
+#include "dsp/basic_math_functions.h"
+#include "dsp/complex_math_functions.h"
+#include "dsp/fast_math_functions.h"
+#include "dsp/matrix_functions.h"
+
+/* Constants for Q31 implementation */
+#define LOG2TOLOG_Q31 0x02C5C860
+#define MICRO_Q31 0x08637BD0
+#define SHIFT_MELFILTER_SATURATION_Q31 10
+/**
+  @ingroup groupTransforms
+ */
+
+
+/**
+  @defgroup MFCC MFCC
+
+  MFCC Transform
+
+  There are separate functions for floating-point, Q31, and Q31 data types.
+ */
+
+
+
+/**
+  @addtogroup MFCC
+  @{
+ */
+
+/**
+  @brief         MFCC Q31
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples in Q31
+  @param[out]     pDst  points to the output MFCC values in q8.23 format
+  @param[inout]     pTmp  points to a temporary buffer of complex
+
+  @return        none
+
+  @par           Description
+                   The number of input samples is the FFT length used
+                   when initializing the instance data structure.
+
+                   The temporary buffer has a 2*fft length.
+
+                   The source buffer is modified by this function.
+
+                   The function may saturate. If the FFT length is too
+                   big and the number of MEL filters too small then the fixed
+                   point computations may saturate.
+
+ */
+
+
+arm_status arm_mfcc_q31(
+  const arm_mfcc_instance_q31 * S,
+  q31_t *pSrc,
+  q31_t *pDst,
+  q31_t *pTmp
+  )
+{
+    q31_t m;
+    uint32_t index;
+    uint32_t fftShift=0;
+    q31_t logExponent;
+    q63_t result;
+    arm_matrix_instance_q31 pDctMat;
+    uint32_t i;
+    uint32_t coefsPos;
+    uint32_t filterLimit;
+    q31_t *pTmp2=(q31_t*)pTmp;
+
+    arm_status status = ARM_MATH_SUCCESS;
+    
+    // q31
+    arm_absmax_q31(pSrc,S->fftLen,&m,&index);
+
+    if (m !=0)
+    {
+       q31_t quotient;
+       int16_t shift;
+
+       status = arm_divide_q31(0x7FFFFFFF,m,&quotient,&shift);
+       if (status != ARM_MATH_SUCCESS)
+       {
+          return(status);
+       }
+ 
+       arm_scale_q31(pSrc,quotient,shift,pSrc,S->fftLen);
+    }
+
+
+    // q31
+    arm_mult_q31(pSrc,S->windowCoefs, pSrc, S->fftLen);
+
+
+    /* Compute spectrum magnitude 
+    */
+    fftShift = 31 - __CLZ(S->fftLen);
+#if defined(ARM_MFCC_CFFT_BASED)
+    /* some HW accelerator for CMSIS-DSP used in some boards
+       are only providing acceleration for CFFT.
+       With ARM_MFCC_CFFT_BASED enabled, CFFT is used and the MFCC
+       will be accelerated on those boards.
+ 
+       The default is to use RFFT
+    */
+    /* Convert from real to complex */
+    for(i=0; i < S->fftLen ; i++)
+    {
+      pTmp2[2*i] = pSrc[i];
+      pTmp2[2*i+1] = 0;
+    }
+    arm_cfft_q31(&(S->cfft),pTmp2,0,1);
+#else
+    /* Default RFFT based implementation */
+    arm_rfft_q31(&(S->rfft),pSrc,pTmp2);
+#endif
+    filterLimit = 1 + (S->fftLen >> 1);
+
+
+    // q31 - fftShift
+    arm_cmplx_mag_q31(pTmp2,pSrc,filterLimit);
+    // q30 - fftShift
+
+
+    /* Apply MEL filters */
+    coefsPos = 0;
+    for(i=0; i<S->nbMelFilters; i++)
+    {
+      arm_dot_prod_q31(pSrc+S->filterPos[i],
+        &(S->filterCoefs[coefsPos]),
+        S->filterLengths[i],
+        &result);
+
+      coefsPos += S->filterLengths[i];
+
+      // q16.48 - fftShift
+      result += MICRO_Q31;
+      result >>= (SHIFT_MELFILTER_SATURATION_Q31 + 18);
+      // q16.29 - fftShift - satShift
+      pTmp[i] = __SSAT(result,31) ;
+
+    }
+
+
+    // q16.29 - fftShift - satShift
+    /* Compute the log */
+    arm_vlog_q31(pTmp,pTmp,S->nbMelFilters);
+
+
+    // q5.26
+   
+    logExponent = fftShift + 2 + SHIFT_MELFILTER_SATURATION_Q31;
+    logExponent = logExponent * LOG2TOLOG_Q31;
+
+
+    // q5.26
+    arm_offset_q31(pTmp,logExponent,pTmp,S->nbMelFilters);
+    arm_shift_q31(pTmp,-3,pTmp,S->nbMelFilters);
+
+    
+    // q8.23
+
+    pDctMat.numRows=S->nbDctOutputs;
+    pDctMat.numCols=S->nbMelFilters;
+    pDctMat.pData=(q31_t*)S->dctCoefs;
+
+    arm_mat_vec_mult_q31(&pDctMat, pTmp, pDst);
+
+    return(status);
+}
+
+/**
+  @} end of MFCC group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
index 2ad336d9..8844b73a 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_f32.c
@@ -1,309 +1,318 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rfft_f32.c
- * Description:  RFFT & RIFFT Floating point process function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/* ----------------------------------------------------------------------
- * Internal functions prototypes
- * -------------------------------------------------------------------- */
-
-extern void arm_radix4_butterfly_f32(
-        float32_t * pSrc,
-        uint16_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier);
-
-extern void arm_radix4_butterfly_inverse_f32(
-        float32_t * pSrc,
-        uint16_t fftLen,
-  const float32_t * pCoef,
-        uint16_t twidCoefModifier,
-        float32_t onebyfftLen);
-
-extern void arm_bitreversal_f32(
-        float32_t * pSrc,
-        uint16_t fftSize,
-        uint16_t bitRevFactor,
-  const uint16_t * pBitRevTab);
-
-void arm_split_rfft_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pATable,
-  const float32_t * pBTable,
-        float32_t * pDst,
-        uint32_t modifier);
-
-void arm_split_rifft_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pATable,
-  const float32_t * pBTable,
-        float32_t * pDst,
-        uint32_t modifier);
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup RealFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the floating-point RFFT/RIFFT.
-  @deprecated    Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed in the future.
-  @param[in]     S    points to an instance of the floating-point RFFT/RIFFT structure
-  @param[in]     pSrc points to the input buffer
-  @param[out]    pDst points to the output buffer
-  @return        none
- */
-
-void arm_rfft_f32(
-  const arm_rfft_instance_f32 * S,
-        float32_t * pSrc,
-        float32_t * pDst)
-{
-  const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
-
-  /* Calculation of Real IFFT of input */
-  if (S->ifftFlagR == 1U)
-  {
-     /*  Real IFFT core process */
-     arm_split_rifft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-
-     /* Complex radix-4 IFFT process */
-     arm_radix4_butterfly_inverse_f32 (pDst, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier, S_CFFT->onebyfftLen);
-
-    /* Bit reversal process */
-    if (S->bitReverseFlagR == 1U)
-    {
-      arm_bitreversal_f32 (pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-  }
-  else
-  {
-    /* Calculation of RFFT of input */
-
-    /* Complex radix-4 FFT process */
-    arm_radix4_butterfly_f32 (pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
-
-    /* Bit reversal process */
-    if (S->bitReverseFlagR == 1U)
-    {
-      arm_bitreversal_f32 (pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
-    }
-
-    /*  Real FFT core process */
-    arm_split_rfft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-/**
-  @} end of RealFFT group
- */
-
-/**
-  @brief         Core Real FFT process
-  @param[in]     pSrc      points to input buffer
-  @param[in]     fftLen    length of FFT
-  @param[in]     pATable   points to twiddle Coef A buffer
-  @param[in]     pBTable   points to twiddle Coef B buffer
-  @param[out]    pDst      points to output buffer
-  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  @return        none
- */
-
-void arm_split_rfft_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pATable,
-  const float32_t * pBTable,
-        float32_t * pDst,
-        uint32_t modifier)
-{
-        uint32_t i;                                    /* Loop Counter */
-        float32_t outR, outI;                          /* Temporary variables for output */
-  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-        float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U];      /* temp pointers for output buffer */
-        float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U];      /* temp pointers for input buffer */
-
-  /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2];
-  pCoefB = &pBTable[modifier * 2];
-
-  i = fftLen - 1U;
-
-  while (i > 0U)
-  {
-     /*
-       outR = (  pSrc[2 * i]             * pATable[2 * i]
-               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
-               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
-               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
-       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
-               + pIn[2 * i]             * pATable[2 * i + 1]
-               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
-               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-      */
-
-    /* read pATable[2 * i] */
-    CoefA1 = *pCoefA++;
-    /* pATable[2 * i + 1] */
-    CoefA2 = *pCoefA;
-
-    /* pSrc[2 * i] * pATable[2 * i] */
-    outR = *pSrc1 * CoefA1;
-    /* pSrc[2 * i] * CoefA2 */
-    outI = *pSrc1++ * CoefA2;
-
-    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-    outR -= (*pSrc1 + *pSrc2) * CoefA2;
-    /* pSrc[2 * i + 1] * CoefA1 */
-    outI += *pSrc1++ * CoefA1;
-
-    CoefB1 = *pCoefB;
-
-    /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-    outI -= *pSrc2-- * CoefB1;
-    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-    outI -= *pSrc2 * CoefA2;
-
-    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-    outR += *pSrc2-- * CoefB1;
-
-    /* write output */
-    *pDst1++ = outR;
-    *pDst1++ = outI;
-
-    /* write complex conjugate output */
-    *pDst2-- = -outI;
-    *pDst2-- = outR;
-
-    /* update coefficient pointer */
-    pCoefB = pCoefB + (modifier * 2U);
-    pCoefA = pCoefA + ((modifier * 2U) - 1U);
-
-    i--;
-
-  }
-
-  pDst[2U * fftLen] = pSrc[0] - pSrc[1];
-  pDst[(2U * fftLen) + 1U] = 0.0f;
-
-  pDst[0] = pSrc[0] + pSrc[1];
-  pDst[1] = 0.0f;
-
-}
-
-
-/**
-  @brief         Core Real IFFT process
-  @param[in]     pSrc      points to input buffer
-  @param[in]     fftLen    length of FFT
-  @param[in]     pATable   points to twiddle Coef A buffer
-  @param[in]     pBTable   points to twiddle Coef B buffer
-  @param[out]    pDst      points to output buffer
-  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  @return        none
- */
-
-void arm_split_rifft_f32(
-        float32_t * pSrc,
-        uint32_t fftLen,
-  const float32_t * pATable,
-  const float32_t * pBTable,
-        float32_t * pDst,
-        uint32_t modifier)
-{
-        float32_t outR, outI;                          /* Temporary variables for output */
-  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
-        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
-        float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  while (fftLen > 0U)
-  {
-     /*
-       outR = (  pIn[2 * i]             * pATable[2 * i]
-               + pIn[2 * i + 1]         * pATable[2 * i + 1]
-               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
-               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
-       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
-               - pIn[2 * i]             * pATable[2 * i + 1]
-               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
-               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-      */
-
-     CoefA1 = *pCoefA++;
-     CoefA2 = *pCoefA;
-
-     /* outR = (pSrc[2 * i] * CoefA1 */
-     outR = *pSrc1 * CoefA1;
-
-     /* - pSrc[2 * i] * CoefA2 */
-     outI = -(*pSrc1++) * CoefA2;
-
-     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
-     outR += (*pSrc1 + *pSrc2) * CoefA2;
-
-     /* pSrc[2 * i + 1] * CoefA1 */
-     outI += (*pSrc1++) * CoefA1;
-
-     CoefB1 = *pCoefB;
-
-     /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
-     outI -= *pSrc2-- * CoefB1;
-
-     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
-     outR += *pSrc2 * CoefB1;
-
-     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
-     outI += *pSrc2-- * CoefA2;
-
-     /* write output */
-     *pDst++ = outR;
-     *pDst++ = outI;
-
-     /* update coefficient pointer */
-     pCoefB = pCoefB + (modifier * 2);
-     pCoefA = pCoefA + (modifier * 2 - 1);
-
-     /* Decrement loop count */
-     fftLen--;
-  }
-
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_f32.c
+ * Description:  RFFT & RIFFT Floating point process function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+/* ----------------------------------------------------------------------
+ * Internal functions prototypes
+ * -------------------------------------------------------------------- */
+
+extern void arm_radix4_butterfly_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier);
+
+extern void arm_radix4_butterfly_inverse_f32(
+        float32_t * pSrc,
+        uint16_t fftLen,
+  const float32_t * pCoef,
+        uint16_t twidCoefModifier,
+        float32_t onebyfftLen);
+
+extern void arm_bitreversal_f32(
+        float32_t * pSrc,
+        uint16_t fftSize,
+        uint16_t bitRevFactor,
+  const uint16_t * pBitRevTab);
+
+void arm_split_rfft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier);
+
+void arm_split_rifft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier);
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the floating-point RFFT/RIFFT.
+                 Source buffer is modified by this function.
+                 
+  @deprecated    Do not use this function.  It has been superceded by \ref arm_rfft_fast_f32 and will be removed in the future.
+  @param[in]     S    points to an instance of the floating-point RFFT/RIFFT structure
+  @param[in]     pSrc points to the input buffer
+  @param[out]    pDst points to the output buffer
+  @return        none
+
+  @par
+                   For the RIFFT, the source buffer must at least have length 
+                   fftLenReal + 2.
+                   The last two elements must be equal to what would be generated
+                   by the RFFT:
+                     (pSrc[0] - pSrc[1]) and 0.0f
+ */
+
+void arm_rfft_f32(
+  const arm_rfft_instance_f32 * S,
+        float32_t * pSrc,
+        float32_t * pDst)
+{
+  const arm_cfft_radix4_instance_f32 *S_CFFT = S->pCfft;
+
+  /* Calculation of Real IFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+
+
+     /* Complex radix-4 IFFT process */
+     arm_radix4_butterfly_inverse_f32 (pDst, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier, S_CFFT->onebyfftLen);
+
+    /* Bit reversal process */
+    if (S->bitReverseFlagR == 1U)
+    {
+      arm_bitreversal_f32 (pDst, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+    }
+  }
+  else
+  {
+    /* Calculation of RFFT of input */
+
+    /* Complex radix-4 FFT process */
+    arm_radix4_butterfly_f32 (pSrc, S_CFFT->fftLen, S_CFFT->pTwiddle, S_CFFT->twidCoefModifier);
+
+    /* Bit reversal process */
+    if (S->bitReverseFlagR == 1U)
+    {
+      arm_bitreversal_f32 (pSrc, S_CFFT->fftLen, S_CFFT->bitRevFactor, S_CFFT->pBitRevTable);
+    }
+
+    /*  Real FFT core process */
+    arm_split_rfft_f32 (pSrc, S->fftLenBy2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
+}
+
+/**
+  @} end of RealFFT group
+ */
+
+/**
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+void arm_split_rfft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier)
+{
+        uint32_t i;                                    /* Loop Counter */
+        float32_t outR, outI;                          /* Temporary variables for output */
+  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
+        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
+        float32_t *pDst1 = &pDst[2], *pDst2 = &pDst[(4U * fftLen) - 1U];      /* temp pointers for output buffer */
+        float32_t *pSrc1 = &pSrc[2], *pSrc2 = &pSrc[(2U * fftLen) - 1U];      /* temp pointers for input buffer */
+
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
+
+  i = fftLen - 1U;
+
+  while (i > 0U)
+  {
+     /*
+       outR = (  pSrc[2 * i]             * pATable[2 * i]
+               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               + pIn[2 * i]             * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+    /* read pATable[2 * i] */
+    CoefA1 = *pCoefA++;
+    /* pATable[2 * i + 1] */
+    CoefA2 = *pCoefA;
+
+    /* pSrc[2 * i] * pATable[2 * i] */
+    outR = *pSrc1 * CoefA1;
+    /* pSrc[2 * i] * CoefA2 */
+    outI = *pSrc1++ * CoefA2;
+
+    /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
+    outR -= (*pSrc1 + *pSrc2) * CoefA2;
+    /* pSrc[2 * i + 1] * CoefA1 */
+    outI += *pSrc1++ * CoefA1;
+
+    CoefB1 = *pCoefB;
+
+    /* pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
+    outI -= *pSrc2-- * CoefB1;
+    /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
+    outI -= *pSrc2 * CoefA2;
+
+    /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
+    outR += *pSrc2-- * CoefB1;
+
+    /* write output */
+    *pDst1++ = outR;
+    *pDst1++ = outI;
+
+    /* write complex conjugate output */
+    *pDst2-- = -outI;
+    *pDst2-- = outR;
+
+    /* update coefficient pointer */
+    pCoefB = pCoefB + (modifier * 2U);
+    pCoefA = pCoefA + ((modifier * 2U) - 1U);
+
+    i--;
+
+  }
+
+  pDst[2U * fftLen] = pSrc[0] - pSrc[1];
+  pDst[(2U * fftLen) + 1U] = 0.0f;
+
+  pDst[0] = pSrc[0] + pSrc[1];
+  pDst[1] = 0.0f;
+
+}
+
+
+/**
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+void arm_split_rifft_f32(
+        float32_t * pSrc,
+        uint32_t fftLen,
+  const float32_t * pATable,
+  const float32_t * pBTable,
+        float32_t * pDst,
+        uint32_t modifier)
+{
+        float32_t outR, outI;                          /* Temporary variables for output */
+  const float32_t *pCoefA, *pCoefB;                    /* Temporary pointers for twiddle factors */
+        float32_t CoefA1, CoefA2, CoefB1;              /* Temporary variables for twiddle coefficients */
+        float32_t *pSrc1 = &pSrc[0], *pSrc2 = &pSrc[(2U * fftLen) + 1U];
+
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
+
+  while (fftLen > 0U)
+  {
+     /*
+       outR = (  pIn[2 * i]             * pATable[2 * i]
+               + pIn[2 * i + 1]         * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               - pIn[2 * i]             * pATable[2 * i + 1]
+               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
+
+     /* outR = (pSrc[2 * i] * CoefA1 */
+     outR = *pSrc1 * CoefA1;
+
+     /* - pSrc[2 * i] * CoefA2 */
+     outI = -(*pSrc1++) * CoefA2;
+
+     /* (pSrc[2 * i + 1] + pSrc[2 * fftLen - 2 * i + 1]) * CoefA2 */
+     outR += (*pSrc1 + *pSrc2) * CoefA2;
+
+     /* pSrc[2 * i + 1] * CoefA1 */
+     outI += (*pSrc1++) * CoefA1;
+
+     CoefB1 = *pCoefB;
+
+     /* - pSrc[2 * fftLen - 2 * i + 1] * CoefB1 */
+     outI -= *pSrc2-- * CoefB1;
+
+     /* pSrc[2 * fftLen - 2 * i] * CoefB1 */
+     outR += *pSrc2 * CoefB1;
+
+     /* pSrc[2 * fftLen - 2 * i] * CoefA2 */
+     outI += *pSrc2-- * CoefA2;
+
+     /* write output */
+     *pDst++ = outR;
+     *pDst++ = outI;
+
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (modifier * 2);
+     pCoefA = pCoefA + (modifier * 2 - 1);
+
+     /* Decrement loop count */
+     fftLen--;
+  }
+
+}
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f16.c
new file mode 100755
index 00000000..9048f835
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f16.c
@@ -0,0 +1,612 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_fast_f16.c
+ * Description:  RFFT & RIFFT Floating point process function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+#include "arm_common_tables_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void stage_rfft_f16(
+  const arm_rfft_fast_instance_f16 * S,
+        float16_t * p,
+        float16_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float16_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float16_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
+        float16_t *pA = p;                          /* increasing pointer */
+        float16_t *pB = p;                          /* decreasing pointer */
+        float16_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float16_t t1a, t1b;                         /* temporary variables */
+        float16_t p0, p1, p2, p3;                   /* temporary variables */
+
+        float16x8x2_t tw,xA,xB;
+        float16x8x2_t tmp1, tmp2, res;
+
+        uint16x8_t     vecStridesBkwd;
+
+        vecStridesBkwd = vddupq_u16((uint16_t)14, 2);
+
+
+        int blockCnt;
+
+
+   k = (S->Sint).fftLen - 1;
+
+   /* Pack first and last sample of the frequency domain together */
+
+   xBR = pB[0];
+   xBI = pB[1];
+   xAR = pA[0];
+   xAI = pA[1];
+
+   twR = *pCoeff++ ;
+   twI = *pCoeff++ ;
+
+   // U1 = XA(1) + XB(1); % It is real
+   t1a = (_Float16)xBR + (_Float16)xAR  ;
+
+   // U2 = XB(1) - XA(1); % It is imaginary
+   t1b = (_Float16)xBI + (_Float16)xAI  ;
+
+   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+   *pOut++ = 0.5f16 * ( (_Float16)t1a + (_Float16)t1b );
+   *pOut++ = 0.5f16 * ( (_Float16)t1a - (_Float16)t1b );
+
+   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
+   pB  = p + 2*k - 14;
+   pA += 2;
+
+   blockCnt = k >> 3;
+   while (blockCnt > 0)
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+
+      xA = vld2q_f16(pA);
+      pA += 16;
+
+      xB = vld2q_f16(pB);
+
+      xB.val[0] = vldrhq_gather_shifted_offset_f16(pB, vecStridesBkwd);
+      xB.val[1] = vldrhq_gather_shifted_offset_f16(&pB[1], vecStridesBkwd);
+
+      xB.val[1] = vnegq_f16(xB.val[1]);
+      pB -= 16;
+
+
+      tw = vld2q_f16(pCoeff);
+      pCoeff += 16;
+
+
+      tmp1.val[0] = vaddq_f16(xA.val[0],xB.val[0]);
+      tmp1.val[1] = vaddq_f16(xA.val[1],xB.val[1]);
+
+      tmp2.val[0] = vsubq_f16(xB.val[0],xA.val[0]);
+      tmp2.val[1] = vsubq_f16(xB.val[1],xA.val[1]);
+
+      res.val[0] = vmulq(tw.val[0], tmp2.val[0]);
+      res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]);
+
+      res.val[1] = vmulq(tw.val[0], tmp2.val[1]);
+      res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]);
+
+      res.val[0] = vaddq_f16(res.val[0],tmp1.val[0] );
+      res.val[1] = vaddq_f16(res.val[1],tmp1.val[1] );
+
+      res.val[0] = vmulq_n_f16(res.val[0], 0.5f);
+      res.val[1] = vmulq_n_f16(res.val[1], 0.5f);
+
+
+      vst2q_f16(pOut, res);
+      pOut += 16;
+
+    
+      blockCnt--;
+   } 
+
+   pB += 14;
+   blockCnt = k & 7;
+   while (blockCnt > 0)
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+      xBI = pB[1];
+      xBR = pB[0];
+      xAR = pA[0];
+      xAI = pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = (_Float16)xBR - (_Float16)xAR ;
+      t1b = (_Float16)xBI + (_Float16)xAI ;
+
+      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+      p0 = (_Float16)twR * (_Float16)t1a;
+      p1 = (_Float16)twI * (_Float16)t1a;
+      p2 = (_Float16)twR * (_Float16)t1b;
+      p3 = (_Float16)twI * (_Float16)t1b;
+
+      *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR + (_Float16)p0 + (_Float16)p3 ); //xAR
+      *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)p1 - (_Float16)p2 ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      blockCnt--;
+   }
+}
+
+/* Prepares data for inverse cfft */
+void merge_rfft_f16(
+  const arm_rfft_fast_instance_f16 * S,
+        float16_t * p,
+        float16_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float16_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float16_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
+        float16_t *pA = p;                          /* increasing pointer */
+        float16_t *pB = p;                          /* decreasing pointer */
+        float16_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float16_t t1a, t1b, r, s, t, u;             /* temporary variables */
+
+        float16x8x2_t tw,xA,xB;
+        float16x8x2_t tmp1, tmp2, res;
+        uint16x8_t     vecStridesBkwd;
+
+        vecStridesBkwd = vddupq_u16((uint16_t)14, 2);
+
+        int blockCnt;
+        
+
+   k = (S->Sint).fftLen - 1;
+
+   xAR = pA[0];
+   xAI = pA[1];
+
+   pCoeff += 2 ;
+
+   *pOut++ = 0.5f16 * ( (_Float16)xAR + (_Float16)xAI );
+   *pOut++ = 0.5f16 * ( (_Float16)xAR - (_Float16)xAI );
+
+   pB  =  p + 2*k - 14;
+   pA +=  2    ;
+
+   blockCnt = k >> 3;
+   while (blockCnt > 0)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xA = vld2q_f16(pA);
+      pA += 16;
+
+      xB = vld2q_f16(pB);
+
+      xB.val[0] = vldrhq_gather_shifted_offset_f16(pB, vecStridesBkwd);
+      xB.val[1] = vldrhq_gather_shifted_offset_f16(&pB[1], vecStridesBkwd);
+
+      xB.val[1] = vnegq_f16(xB.val[1]);
+      pB -= 16;
+
+
+      tw = vld2q_f16(pCoeff);
+      tw.val[1] = vnegq_f16(tw.val[1]);
+      pCoeff += 16;
+
+
+      tmp1.val[0] = vaddq_f16(xA.val[0],xB.val[0]);
+      tmp1.val[1] = vaddq_f16(xA.val[1],xB.val[1]);
+
+      tmp2.val[0] = vsubq_f16(xB.val[0],xA.val[0]);
+      tmp2.val[1] = vsubq_f16(xB.val[1],xA.val[1]);
+
+      res.val[0] = vmulq(tw.val[0], tmp2.val[0]);
+      res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]);
+
+      res.val[1] = vmulq(tw.val[0], tmp2.val[1]);
+      res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]);
+
+      res.val[0] = vaddq_f16(res.val[0],tmp1.val[0] );
+      res.val[1] = vaddq_f16(res.val[1],tmp1.val[1] );
+
+      res.val[0] = vmulq_n_f16(res.val[0], 0.5f);
+      res.val[1] = vmulq_n_f16(res.val[1], 0.5f);
+
+
+      vst2q_f16(pOut, res);
+      pOut += 16;
+
+    
+      blockCnt--;
+   }
+
+   pB += 14;
+   blockCnt = k & 7;
+   while (blockCnt > 0)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xBI =   pB[1]    ;
+      xBR =   pB[0]    ;
+      xAR =  pA[0];
+      xAI =  pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = (_Float16)xAR - (_Float16)xBR ;
+      t1b = (_Float16)xAI + (_Float16)xBI ;
+
+      r = (_Float16)twR * (_Float16)t1a;
+      s = (_Float16)twI * (_Float16)t1b;
+      t = (_Float16)twI * (_Float16)t1a;
+      u = (_Float16)twR * (_Float16)t1b;
+
+      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
+      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
+      *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR - (_Float16)r - (_Float16)s ); //xAR
+      *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)t - (_Float16)u ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      blockCnt--;
+   }
+
+}
+#else
+void stage_rfft_f16(
+  const arm_rfft_fast_instance_f16 * S,
+        float16_t * p,
+        float16_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float16_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float16_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
+        float16_t *pA = p;                          /* increasing pointer */
+        float16_t *pB = p;                          /* decreasing pointer */
+        float16_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float16_t t1a, t1b;                         /* temporary variables */
+        float16_t p0, p1, p2, p3;                   /* temporary variables */
+
+
+   k = (S->Sint).fftLen - 1;
+
+   /* Pack first and last sample of the frequency domain together */
+
+   xBR = pB[0];
+   xBI = pB[1];
+   xAR = pA[0];
+   xAI = pA[1];
+
+   twR = *pCoeff++ ;
+   twI = *pCoeff++ ;
+
+
+   // U1 = XA(1) + XB(1); % It is real
+   t1a = (_Float16)xBR + (_Float16)xAR  ;
+
+   // U2 = XB(1) - XA(1); % It is imaginary
+   t1b = (_Float16)xBI + (_Float16)xAI  ;
+
+   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+   *pOut++ = 0.5f16 * ( (_Float16)t1a + (_Float16)t1b );
+   *pOut++ = 0.5f16 * ( (_Float16)t1a - (_Float16)t1b );
+
+   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
+   pB  = p + 2*k;
+   pA += 2;
+
+   do
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+      xBI = pB[1];
+      xBR = pB[0];
+      xAR = pA[0];
+      xAI = pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = (_Float16)xBR - (_Float16)xAR ;
+      t1b = (_Float16)xBI + (_Float16)xAI ;
+
+      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+      p0 = (_Float16)twR * (_Float16)t1a;
+      p1 = (_Float16)twI * (_Float16)t1a;
+      p2 = (_Float16)twR * (_Float16)t1b;
+      p3 = (_Float16)twI * (_Float16)t1b;
+
+      *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR + (_Float16)p0 + (_Float16)p3 ); //xAR
+      *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)p1 - (_Float16)p2 ); //xAI
+
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   } while (k > 0);
+}
+
+/* Prepares data for inverse cfft */
+void merge_rfft_f16(
+  const arm_rfft_fast_instance_f16 * S,
+        float16_t * p,
+        float16_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float16_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float16_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
+        float16_t *pA = p;                          /* increasing pointer */
+        float16_t *pB = p;                          /* decreasing pointer */
+        float16_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float16_t t1a, t1b, r, s, t, u;             /* temporary variables */
+
+   k = (S->Sint).fftLen - 1;
+
+   xAR = pA[0];
+   xAI = pA[1];
+
+   pCoeff += 2 ;
+
+   *pOut++ = 0.5f16 * ( (_Float16)xAR + (_Float16)xAI );
+   *pOut++ = 0.5f16 * ( (_Float16)xAR - (_Float16)xAI );
+
+   pB  =  p + 2*k ;
+   pA +=  2	   ;
+
+   while (k > 0)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xBI =   pB[1]    ;
+      xBR =   pB[0]    ;
+      xAR =  pA[0];
+      xAI =  pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = (_Float16)xAR - (_Float16)xBR ;
+      t1b = (_Float16)xAI + (_Float16)xBI ;
+
+      r = (_Float16)twR * (_Float16)t1a;
+      s = (_Float16)twI * (_Float16)t1b;
+      t = (_Float16)twI * (_Float16)t1a;
+      u = (_Float16)twR * (_Float16)t1b;
+
+      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
+      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
+      *pOut++ = 0.5f16 * ((_Float16)xAR + (_Float16)xBR - (_Float16)r - (_Float16)s ); //xAR
+      *pOut++ = 0.5f16 * ((_Float16)xAI - (_Float16)xBI + (_Float16)t - (_Float16)u ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   }
+
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @ingroup groupTransforms
+*/
+
+/**
+  @defgroup RealFFT Real FFT Functions
+ 
+  @par
+                   The CMSIS DSP library includes specialized algorithms for computing the
+                   FFT of real data sequences.  The FFT is defined over complex data but
+                   in many applications the input is real.  Real FFT algorithms take advantage
+                   of the symmetry properties of the FFT and have a speed advantage over complex
+                   algorithms of the same length.
+  @par
+                   The Fast RFFT algorithm relays on the mixed radix CFFT that save processor usage.
+  @par
+                   The real length N forward FFT of a sequence is computed using the steps shown below.
+  @par
+                   \image html RFFT.gif "Real Fast Fourier Transform"
+  @par
+                   The real sequence is initially treated as if it were complex to perform a CFFT.
+                   Later, a processing stage reshapes the data to obtain half of the frequency spectrum
+                   in complex format. Except the first complex number that contains the two real numbers
+                   X[0] and X[N/2] all the data is complex. In other words, the first complex sample
+                   contains two real values packed.
+  @par
+                   The input for the inverse RFFT should keep the same format as the output of the
+                   forward RFFT. A first processing stage pre-process the data to later perform an
+                   inverse CFFT.
+  @par
+                   \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
+  @par
+                   The algorithms for floating-point, Q15, and Q31 data are slightly different
+                   and we describe each algorithm in turn.
+  @par           Floating-point
+                   The main functions are \ref arm_rfft_fast_f16() and \ref arm_rfft_fast_init_f16().
+                   
+  @par
+                   The FFT of a real N-point sequence has even symmetry in the frequency domain. 
+                   The second half of the data equals the conjugate of the first half flipped in frequency. 
+                   Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers.
+                   These are packed into the output array in alternating real and imaginary components:
+  @par
+                   X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
+                   real[(N/2)-1], imag[(N/2)-1 }
+  @par
+                   It happens that the first complex number (real[0], imag[0]) is actually
+                   all real. real[0] represents the DC offset, and imag[0] should be 0.
+                   (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
+                   the first harmonic and so on.
+  @par
+                   The real FFT functions pack the frequency domain data in this fashion.
+                   The forward transform outputs the data in this form and the inverse
+                   transform expects input data in this form. The function always performs
+                   the needed bitreversal so that the input and output data is always in
+                   normal order. The functions support lengths of [32, 64, 128, ..., 4096]
+                   samples.
+  @par           Q15 and Q31
+                   The real algorithms are defined in a similar manner and utilize N/2 complex
+                   transforms behind the scenes.
+  @par
+                   The complex transforms used internally include scaling to prevent fixed-point
+                   overflows.  The overall scaling equals 1/(fftLen/2).
+                   Due to the use of complex transform internally, the source buffer is
+                   modified by the rfft.
+  @par
+                   A separate instance structure must be defined for each transform used but
+                   twiddle factor and bit reversal tables can be reused.
+  @par
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                    - Sets the values of the internal structure fields.
+                    - Initializes twiddle factor table and bit reversal table pointers.
+                    - Initializes the internal complex FFT data structure.
+  @par
+                   Use of the initialization function is optional **except for MVE versions where it is mandatory**.
+                   If you don't use the initialization functions, then the structures should be initialized with code
+                   similar to the one below:
+  <pre>
+      arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+      arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+  </pre>
+                   where <code>fftLenReal</code> is the length of the real transform;
+                   <code>fftLenBy2</code> length of  the internal complex transform (fftLenReal/2).
+                   <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform.
+                   <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order
+                   output (=1).
+                   <code>twidCoefRModifier</code> stride modifier for the twiddle factor table.
+                   The value is based on the FFT length;
+                   <code>pTwiddleAReal</code>points to the A array of twiddle coefficients;
+                   <code>pTwiddleBReal</code>points to the B array of twiddle coefficients;
+                   <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure
+                   must also be initialized.  
+@par
+                   Note that with MVE versions you can't initialize instance structures directly and **must
+                   use the initialization function**.
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+*/
+
+/**
+  @brief         Processing function for the floating-point real FFT.
+  @param[in]     S         points to an arm_rfft_fast_instance_f16 structure
+  @param[in]     p         points to input buffer (Source buffer is modified by this function.)
+  @param[in]     pOut      points to output buffer
+  @param[in]     ifftFlag
+                   - value = 0: RFFT
+                   - value = 1: RIFFT
+  @return        none
+*/
+
+void arm_rfft_fast_f16(
+  const arm_rfft_fast_instance_f16 * S,
+  float16_t * p,
+  float16_t * pOut,
+  uint8_t ifftFlag)
+{
+   const arm_cfft_instance_f16 * Sint = &(S->Sint);
+
+
+   /* Calculation of Real FFT */
+   if (ifftFlag)
+   {
+      /*  Real FFT compression */
+      merge_rfft_f16(S, p, pOut);
+      /* Complex radix-4 IFFT process */
+      arm_cfft_f16( Sint, pOut, ifftFlag, 1);
+   }
+   else
+   {
+
+      /* Calculation of RFFT of input */
+      arm_cfft_f16( Sint, p, ifftFlag, 1);
+
+      /*  Real FFT extraction */
+      stage_rfft_f16(S, p, pOut);
+   }
+}
+
+/**
+* @} end of RealFFT group
+*/
+
+#endif /*  #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
index ebaa7d95..67125043 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f32.c
@@ -1,320 +1,603 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rfft_f32.c
- * Description:  RFFT & RIFFT Floating point process function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-void stage_rfft_f32(
-  const arm_rfft_fast_instance_f32 * S,
-        float32_t * p,
-        float32_t * pOut)
-{
-        uint32_t  k;                                /* Loop Counter */
-        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
-  const float32_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
-        float32_t *pA = p;                          /* increasing pointer */
-        float32_t *pB = p;                          /* decreasing pointer */
-        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
-        float32_t t1a, t1b;                         /* temporary variables */
-        float32_t p0, p1, p2, p3;                   /* temporary variables */
-
-
-   k = (S->Sint).fftLen - 1;
-
-   /* Pack first and last sample of the frequency domain together */
-
-   xBR = pB[0];
-   xBI = pB[1];
-   xAR = pA[0];
-   xAI = pA[1];
-
-   twR = *pCoeff++ ;
-   twI = *pCoeff++ ;
-
-   // U1 = XA(1) + XB(1); % It is real
-   t1a = xBR + xAR  ;
-
-   // U2 = XB(1) - XA(1); % It is imaginary
-   t1b = xBI + xAI  ;
-
-   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
-   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
-   *pOut++ = 0.5f * ( t1a + t1b );
-   *pOut++ = 0.5f * ( t1a - t1b );
-
-   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
-   pB  = p + 2*k;
-   pA += 2;
-
-   do
-   {
-      /*
-         function X = my_split_rfft(X, ifftFlag)
-         % X is a series of real numbers
-         L  = length(X);
-         XC = X(1:2:end) +i*X(2:2:end);
-         XA = fft(XC);
-         XB = conj(XA([1 end:-1:2]));
-         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
-         for l = 2:L/2
-            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
-         end
-         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
-         X = XA;
-      */
-
-      xBI = pB[1];
-      xBR = pB[0];
-      xAR = pA[0];
-      xAI = pA[1];
-
-      twR = *pCoeff++;
-      twI = *pCoeff++;
-
-      t1a = xBR - xAR ;
-      t1b = xBI + xAI ;
-
-      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
-      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
-      p0 = twR * t1a;
-      p1 = twI * t1a;
-      p2 = twR * t1b;
-      p3 = twI * t1b;
-
-      *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR
-      *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI
-
-      pA += 2;
-      pB -= 2;
-      k--;
-   } while (k > 0U);
-}
-
-/* Prepares data for inverse cfft */
-void merge_rfft_f32(
-  const arm_rfft_fast_instance_f32 * S,
-        float32_t * p,
-        float32_t * pOut)
-{
-        uint32_t  k;                                /* Loop Counter */
-        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
-  const float32_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
-        float32_t *pA = p;                          /* increasing pointer */
-        float32_t *pB = p;                          /* decreasing pointer */
-        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
-        float32_t t1a, t1b, r, s, t, u;             /* temporary variables */
-
-   k = (S->Sint).fftLen - 1;
-
-   xAR = pA[0];
-   xAI = pA[1];
-
-   pCoeff += 2 ;
-
-   *pOut++ = 0.5f * ( xAR + xAI );
-   *pOut++ = 0.5f * ( xAR - xAI );
-
-   pB  =  p + 2*k ;
-   pA +=  2	   ;
-
-   while (k > 0U)
-   {
-      /* G is half of the frequency complex spectrum */
-      //for k = 2:N
-      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
-      xBI =   pB[1]    ;
-      xBR =   pB[0]    ;
-      xAR =  pA[0];
-      xAI =  pA[1];
-
-      twR = *pCoeff++;
-      twI = *pCoeff++;
-
-      t1a = xAR - xBR ;
-      t1b = xAI + xBI ;
-
-      r = twR * t1a;
-      s = twI * t1b;
-      t = twI * t1a;
-      u = twR * t1b;
-
-      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
-      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
-      *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR
-      *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI
-
-      pA += 2;
-      pB -= 2;
-      k--;
-   }
-
-}
-
-/**
-  @ingroup groupTransforms
-*/
-
-/**
-  @defgroup RealFFT Real FFT Functions
- 
-  @par
-                   The CMSIS DSP library includes specialized algorithms for computing the
-                   FFT of real data sequences.  The FFT is defined over complex data but
-                   in many applications the input is real.  Real FFT algorithms take advantage
-                   of the symmetry properties of the FFT and have a speed advantage over complex
-                   algorithms of the same length.
-  @par
-                   The Fast RFFT algorith relays on the mixed radix CFFT that save processor usage.
-  @par
-                   The real length N forward FFT of a sequence is computed using the steps shown below.
-  @par
-                   \image html RFFT.gif "Real Fast Fourier Transform"
-  @par
-                   The real sequence is initially treated as if it were complex to perform a CFFT.
-                   Later, a processing stage reshapes the data to obtain half of the frequency spectrum
-                   in complex format. Except the first complex number that contains the two real numbers
-                   X[0] and X[N/2] all the data is complex. In other words, the first complex sample
-                   contains two real values packed.
-  @par
-                   The input for the inverse RFFT should keep the same format as the output of the
-                   forward RFFT. A first processing stage pre-process the data to later perform an
-                   inverse CFFT.
-  @par
-                   \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
-  @par
-                   The algorithms for floating-point, Q15, and Q31 data are slightly different
-                   and we describe each algorithm in turn.
-  @par           Floating-point
-                   The main functions are \ref arm_rfft_fast_f32() and \ref arm_rfft_fast_init_f32().
-                   The older functions \ref arm_rfft_f32() and \ref arm_rfft_init_f32() have been deprecated
-                   but are still documented.
-  @par
-                   The FFT of a real N-point sequence has even symmetry in the frequency domain. 
-                   The second half of the data equals the conjugate of the first half flipped in frequency. 
-                   Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers.
-                   These are packed into the output array in alternating real and imaginary components:
-  @par
-                   X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
-                   real[(N/2)-1], imag[(N/2)-1 }
-  @par
-                   It happens that the first complex number (real[0], imag[0]) is actually
-                   all real. real[0] represents the DC offset, and imag[0] should be 0.
-                   (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
-                   the first harmonic and so on.
-  @par
-                   The real FFT functions pack the frequency domain data in this fashion.
-                   The forward transform outputs the data in this form and the inverse
-                   transform expects input data in this form. The function always performs
-                   the needed bitreversal so that the input and output data is always in
-                   normal order. The functions support lengths of [32, 64, 128, ..., 4096]
-                   samples.
-  @par           Q15 and Q31
-                   The real algorithms are defined in a similar manner and utilize N/2 complex
-                   transforms behind the scenes.
-  @par
-                   The complex transforms used internally include scaling to prevent fixed-point
-                   overflows.  The overall scaling equals 1/(fftLen/2).
-  @par
-                   A separate instance structure must be defined for each transform used but
-                   twiddle factor and bit reversal tables can be reused.
-  @par
-                   There is also an associated initialization function for each data type.
-                   The initialization function performs the following operations:
-                    - Sets the values of the internal structure fields.
-                    - Initializes twiddle factor table and bit reversal table pointers.
-                    - Initializes the internal complex FFT data structure.
-  @par
-                   Use of the initialization function is optional.
-                   However, if the initialization function is used, then the instance structure
-                   cannot be placed into a const data section. To place an instance structure
-                   into a const data section, the instance structure should be manually
-                   initialized as follows:
-  <pre>
-      arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
-      arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
-  </pre>
-                   where <code>fftLenReal</code> is the length of the real transform;
-                   <code>fftLenBy2</code> length of  the internal complex transform.
-                   <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform.
-                   <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order
-                   output (=1).
-                   <code>twidCoefRModifier</code> stride modifier for the twiddle factor table.
-                   The value is based on the FFT length;
-                   <code>pTwiddleAReal</code>points to the A array of twiddle coefficients;
-                   <code>pTwiddleBReal</code>points to the B array of twiddle coefficients;
-                   <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure
-                   must also be initialized.  Refer to arm_cfft_radix4_f32() for details regarding
-                   static initialization of the complex FFT instance structure.
- */
-
-/**
-  @addtogroup RealFFT
-  @{
-*/
-
-/**
-  @brief         Processing function for the floating-point real FFT.
-  @param[in]     S         points to an arm_rfft_fast_instance_f32 structure
-  @param[in]     p         points to input buffer
-  @param[in]     pOut      points to output buffer
-  @param[in]     ifftFlag
-                   - value = 0: RFFT
-                   - value = 1: RIFFT
-  @return        none
-*/
-
-void arm_rfft_fast_f32(
-  arm_rfft_fast_instance_f32 * S,
-  float32_t * p,
-  float32_t * pOut,
-  uint8_t ifftFlag)
-{
-   arm_cfft_instance_f32 * Sint = &(S->Sint);
-   Sint->fftLen = S->fftLenRFFT / 2;
-
-   /* Calculation of Real FFT */
-   if (ifftFlag)
-   {
-      /*  Real FFT compression */
-      merge_rfft_f32(S, p, pOut);
-
-      /* Complex radix-4 IFFT process */
-      arm_cfft_f32( Sint, pOut, ifftFlag, 1);
-   }
-   else
-   {
-      /* Calculation of RFFT of input */
-      arm_cfft_f32( Sint, p, ifftFlag, 1);
-
-      /*  Real FFT extraction */
-      stage_rfft_f32(S, p, pOut);
-   }
-}
-
-/**
-* @} end of RealFFT group
-*/
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_fast_f32.c
+ * Description:  RFFT & RIFFT Floating point process function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+#if defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE)
+void stage_rfft_f32(
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b;                         /* temporary variables */
+        float32_t p0, p1, p2, p3;                   /* temporary variables */
+
+        float32x4x2_t tw,xA,xB;
+        float32x4x2_t tmp1, tmp2, res;
+
+        uint32x4_t     vecStridesFwd, vecStridesBkwd;
+
+        vecStridesFwd = vidupq_u32((uint32_t)0, 2);
+        vecStridesBkwd = -vecStridesFwd;
+
+        int blockCnt;
+
+
+   k = (S->Sint).fftLen - 1;
+
+   /* Pack first and last sample of the frequency domain together */
+
+   xBR = pB[0];
+   xBI = pB[1];
+   xAR = pA[0];
+   xAI = pA[1];
+
+   twR = *pCoeff++ ;
+   twI = *pCoeff++ ;
+
+   // U1 = XA(1) + XB(1); % It is real
+   t1a = xBR + xAR  ;
+
+   // U2 = XB(1) - XA(1); % It is imaginary
+   t1b = xBI + xAI  ;
+
+   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+   *pOut++ = 0.5f * ( t1a + t1b );
+   *pOut++ = 0.5f * ( t1a - t1b );
+
+   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
+   pB  = p + 2*k;
+   pA += 2;
+
+   blockCnt = k >> 2;
+   while (blockCnt > 0)
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+
+      xA = vld2q_f32(pA);
+      pA += 8;
+
+      xB = vld2q_f32(pB);
+
+      xB.val[0] = vldrwq_gather_shifted_offset_f32(pB, vecStridesBkwd);
+      xB.val[1] = vldrwq_gather_shifted_offset_f32(&pB[1], vecStridesBkwd);
+
+      xB.val[1] = vnegq_f32(xB.val[1]);
+      pB -= 8;
+
+
+      tw = vld2q_f32(pCoeff);
+      pCoeff += 8;
+
+
+      tmp1.val[0] = vaddq_f32(xA.val[0],xB.val[0]);
+      tmp1.val[1] = vaddq_f32(xA.val[1],xB.val[1]);
+
+      tmp2.val[0] = vsubq_f32(xB.val[0],xA.val[0]);
+      tmp2.val[1] = vsubq_f32(xB.val[1],xA.val[1]);
+
+      res.val[0] = vmulq(tw.val[0], tmp2.val[0]);
+      res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]);
+
+      res.val[1] = vmulq(tw.val[0], tmp2.val[1]);
+      res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]);
+
+      res.val[0] = vaddq_f32(res.val[0],tmp1.val[0] );
+      res.val[1] = vaddq_f32(res.val[1],tmp1.val[1] );
+
+      res.val[0] = vmulq_n_f32(res.val[0], 0.5f);
+      res.val[1] = vmulq_n_f32(res.val[1], 0.5f);
+
+
+      vst2q_f32(pOut, res);
+      pOut += 8;
+
+    
+      blockCnt--;
+   } 
+
+   blockCnt = k & 3;
+   while (blockCnt > 0)
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+      xBI = pB[1];
+      xBR = pB[0];
+      xAR = pA[0];
+      xAI = pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xBR - xAR ;
+      t1b = xBI + xAI ;
+
+      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+      p0 = twR * t1a;
+      p1 = twI * t1a;
+      p2 = twR * t1b;
+      p3 = twI * t1b;
+
+      *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      blockCnt--;
+   }
+}
+
+/* Prepares data for inverse cfft */
+void merge_rfft_f32(
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b, r, s, t, u;             /* temporary variables */
+
+        float32x4x2_t tw,xA,xB;
+        float32x4x2_t tmp1, tmp2, res;
+        uint32x4_t     vecStridesFwd, vecStridesBkwd;
+
+        vecStridesFwd = vidupq_u32((uint32_t)0, 2);
+        vecStridesBkwd = -vecStridesFwd;
+
+        int blockCnt;
+        
+
+   k = (S->Sint).fftLen - 1;
+
+   xAR = pA[0];
+   xAI = pA[1];
+
+   pCoeff += 2 ;
+
+   *pOut++ = 0.5f * ( xAR + xAI );
+   *pOut++ = 0.5f * ( xAR - xAI );
+
+   pB  =  p + 2*k ;
+   pA +=  2    ;
+
+   blockCnt = k >> 2;
+   while (blockCnt > 0)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xA = vld2q_f32(pA);
+      pA += 8;
+
+      xB = vld2q_f32(pB);
+
+      xB.val[0] = vldrwq_gather_shifted_offset_f32(pB, vecStridesBkwd);
+      xB.val[1] = vldrwq_gather_shifted_offset_f32(&pB[1], vecStridesBkwd);
+
+      xB.val[1] = vnegq_f32(xB.val[1]);
+      pB -= 8;
+
+
+      tw = vld2q_f32(pCoeff);
+      tw.val[1] = vnegq_f32(tw.val[1]);
+      pCoeff += 8;
+
+
+      tmp1.val[0] = vaddq_f32(xA.val[0],xB.val[0]);
+      tmp1.val[1] = vaddq_f32(xA.val[1],xB.val[1]);
+
+      tmp2.val[0] = vsubq_f32(xB.val[0],xA.val[0]);
+      tmp2.val[1] = vsubq_f32(xB.val[1],xA.val[1]);
+
+      res.val[0] = vmulq(tw.val[0], tmp2.val[0]);
+      res.val[0] = vfmsq(res.val[0],tw.val[1], tmp2.val[1]);
+
+      res.val[1] = vmulq(tw.val[0], tmp2.val[1]);
+      res.val[1] = vfmaq(res.val[1], tw.val[1], tmp2.val[0]);
+
+      res.val[0] = vaddq_f32(res.val[0],tmp1.val[0] );
+      res.val[1] = vaddq_f32(res.val[1],tmp1.val[1] );
+
+      res.val[0] = vmulq_n_f32(res.val[0], 0.5f);
+      res.val[1] = vmulq_n_f32(res.val[1], 0.5f);
+
+
+      vst2q_f32(pOut, res);
+      pOut += 8;
+
+    
+      blockCnt--;
+   }
+
+   blockCnt = k & 3;
+   while (blockCnt > 0)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xBI =   pB[1]    ;
+      xBR =   pB[0]    ;
+      xAR =  pA[0];
+      xAI =  pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xAR - xBR ;
+      t1b = xAI + xBI ;
+
+      r = twR * t1a;
+      s = twI * t1b;
+      t = twI * t1a;
+      u = twR * t1b;
+
+      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
+      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
+      *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      blockCnt--;
+   }
+
+}
+#else
+void stage_rfft_f32(
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b;                         /* temporary variables */
+        float32_t p0, p1, p2, p3;                   /* temporary variables */
+
+
+   k = (S->Sint).fftLen - 1;
+
+   /* Pack first and last sample of the frequency domain together */
+
+   xBR = pB[0];
+   xBI = pB[1];
+   xAR = pA[0];
+   xAI = pA[1];
+
+   twR = *pCoeff++ ;
+   twI = *pCoeff++ ;
+
+
+   // U1 = XA(1) + XB(1); % It is real
+   t1a = xBR + xAR  ;
+
+   // U2 = XB(1) - XA(1); % It is imaginary
+   t1b = xBI + xAI  ;
+
+   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+   *pOut++ = 0.5f * ( t1a + t1b );
+   *pOut++ = 0.5f * ( t1a - t1b );
+
+   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
+   pB  = p + 2*k;
+   pA += 2;
+
+   do
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+      xBI = pB[1];
+      xBR = pB[0];
+      xAR = pA[0];
+      xAI = pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xBR - xAR ;
+      t1b = xBI + xAI ;
+
+      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+      p0 = twR * t1a;
+      p1 = twI * t1a;
+      p2 = twR * t1b;
+      p3 = twI * t1b;
+
+      *pOut++ = 0.5f * (xAR + xBR + p0 + p3 ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + p1 - p2 ); //xAI
+
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   } while (k > 0);
+}
+
+/* Prepares data for inverse cfft */
+void merge_rfft_f32(
+  const arm_rfft_fast_instance_f32 * S,
+        float32_t * p,
+        float32_t * pOut)
+{
+        int32_t  k;                                /* Loop Counter */
+        float32_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float32_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
+        float32_t *pA = p;                          /* increasing pointer */
+        float32_t *pB = p;                          /* decreasing pointer */
+        float32_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float32_t t1a, t1b, r, s, t, u;             /* temporary variables */
+
+   k = (S->Sint).fftLen - 1;
+
+   xAR = pA[0];
+   xAI = pA[1];
+
+   pCoeff += 2 ;
+
+   *pOut++ = 0.5f * ( xAR + xAI );
+   *pOut++ = 0.5f * ( xAR - xAI );
+
+   pB  =  p + 2*k ;
+   pA +=  2	   ;
+
+   while (k > 0)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xBI =   pB[1]    ;
+      xBR =   pB[0]    ;
+      xAR =  pA[0];
+      xAI =  pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xAR - xBR ;
+      t1b = xAI + xBI ;
+
+      r = twR * t1a;
+      s = twI * t1b;
+      t = twI * t1a;
+      u = twR * t1b;
+
+      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
+      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
+      *pOut++ = 0.5f * (xAR + xBR - r - s ); //xAR
+      *pOut++ = 0.5f * (xAI - xBI + t - u ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   }
+
+}
+
+#endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
+
+/**
+  @ingroup groupTransforms
+*/
+
+/**
+  @defgroup RealFFT Real FFT Functions
+ 
+  @par
+                   The CMSIS DSP library includes specialized algorithms for computing the
+                   FFT of real data sequences.  The FFT is defined over complex data but
+                   in many applications the input is real.  Real FFT algorithms take advantage
+                   of the symmetry properties of the FFT and have a speed advantage over complex
+                   algorithms of the same length.
+  @par
+                   The Fast RFFT algorithm relays on the mixed radix CFFT that save processor usage.
+  @par
+                   The real length N forward FFT of a sequence is computed using the steps shown below.
+  @par
+                   \image html RFFT.gif "Real Fast Fourier Transform"
+  @par
+                   The real sequence is initially treated as if it were complex to perform a CFFT.
+                   Later, a processing stage reshapes the data to obtain half of the frequency spectrum
+                   in complex format. Except the first complex number that contains the two real numbers
+                   X[0] and X[N/2] all the data is complex. In other words, the first complex sample
+                   contains two real values packed.
+  @par
+                   The input for the inverse RFFT should keep the same format as the output of the
+                   forward RFFT. A first processing stage pre-process the data to later perform an
+                   inverse CFFT.
+  @par
+                   \image html RIFFT.gif "Real Inverse Fast Fourier Transform"
+  @par
+                   The algorithms for floating-point, Q15, and Q31 data are slightly different
+                   and we describe each algorithm in turn.
+  @par           Floating-point
+                   The main functions are \ref arm_rfft_fast_f32() and \ref arm_rfft_fast_init_f32().
+                   The older functions \ref arm_rfft_f32() and \ref arm_rfft_init_f32() have been deprecated
+                   but are still documented.
+  @par
+                   The FFT of a real N-point sequence has even symmetry in the frequency domain. 
+                   The second half of the data equals the conjugate of the first half flipped in frequency. 
+                   Looking at the data, we see that we can uniquely represent the FFT using only N/2 complex numbers.
+                   These are packed into the output array in alternating real and imaginary components:
+  @par
+                   X = { real[0], imag[0], real[1], imag[1], real[2], imag[2] ...
+                   real[(N/2)-1], imag[(N/2)-1 }
+  @par
+                   It happens that the first complex number (real[0], imag[0]) is actually
+                   all real. real[0] represents the DC offset, and imag[0] should be 0.
+                   (real[1], imag[1]) is the fundamental frequency, (real[2], imag[2]) is
+                   the first harmonic and so on.
+  @par
+                   The real FFT functions pack the frequency domain data in this fashion.
+                   The forward transform outputs the data in this form and the inverse
+                   transform expects input data in this form. The function always performs
+                   the needed bitreversal so that the input and output data is always in
+                   normal order. The functions support lengths of [32, 64, 128, ..., 4096]
+                   samples.
+  @par           Q15 and Q31
+                   The real algorithms are defined in a similar manner and utilize N/2 complex
+                   transforms behind the scenes.
+  @par
+                   The complex transforms used internally include scaling to prevent fixed-point
+                   overflows.  The overall scaling equals 1/(fftLen/2).
+                   Due to the use of complex transform internally, the source buffer is
+                   modified by the rfft.
+  @par
+                   A separate instance structure must be defined for each transform used but
+                   twiddle factor and bit reversal tables can be reused.
+  @par
+                   There is also an associated initialization function for each data type.
+                   The initialization function performs the following operations:
+                    - Sets the values of the internal structure fields.
+                    - Initializes twiddle factor table and bit reversal table pointers.
+                    - Initializes the internal complex FFT data structure.
+  @par
+                   Use of the initialization function is optional **except for MVE versions where it is mandatory**.
+                   If you don't use the initialization functions, then the structures should be initialized with code
+                   similar to the one below:
+  <pre>
+      arm_rfft_instance_q31 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+      arm_rfft_instance_q15 S = {fftLenReal, fftLenBy2, ifftFlagR, bitReverseFlagR, twidCoefRModifier, pTwiddleAReal, pTwiddleBReal, pCfft};
+  </pre>
+                   where <code>fftLenReal</code> is the length of the real transform;
+                   <code>fftLenBy2</code> length of  the internal complex transform (fftLenReal/2).
+                   <code>ifftFlagR</code> Selects forward (=0) or inverse (=1) transform.
+                   <code>bitReverseFlagR</code> Selects bit reversed output (=0) or normal order
+                   output (=1).
+                   <code>twidCoefRModifier</code> stride modifier for the twiddle factor table.
+                   The value is based on the FFT length;
+                   <code>pTwiddleAReal</code>points to the A array of twiddle coefficients;
+                   <code>pTwiddleBReal</code>points to the B array of twiddle coefficients;
+                   <code>pCfft</code> points to the CFFT Instance structure. The CFFT structure
+                   must also be initialized.  
+@par
+                   Note that with MVE versions you can't initialize instance structures directly and **must
+                   use the initialization function**.
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+*/
+
+/**
+  @brief         Processing function for the floating-point real FFT.
+  @param[in]     S         points to an arm_rfft_fast_instance_f32 structure
+  @param[in]     p         points to input buffer (Source buffer is modified by this function.)
+  @param[in]     pOut      points to output buffer
+  @param[in]     ifftFlag
+                   - value = 0: RFFT
+                   - value = 1: RIFFT
+  @return        none
+*/
+
+void arm_rfft_fast_f32(
+  const arm_rfft_fast_instance_f32 * S,
+  float32_t * p,
+  float32_t * pOut,
+  uint8_t ifftFlag)
+{
+   const arm_cfft_instance_f32 * Sint = &(S->Sint);
+
+   /* Calculation of Real FFT */
+   if (ifftFlag)
+   {
+      /*  Real FFT compression */
+      merge_rfft_f32(S, p, pOut);
+      /* Complex radix-4 IFFT process */
+      arm_cfft_f32( Sint, pOut, ifftFlag, 1);
+   }
+   else
+   {
+      /* Calculation of RFFT of input */
+      arm_cfft_f32( Sint, p, ifftFlag, 1);
+
+      /*  Real FFT extraction */
+      stage_rfft_f32(S, p, pOut);
+   }
+}
+
+/**
+* @} end of RealFFT group
+*/
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c
new file mode 100755
index 00000000..a1e4ed01
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_f64.c
@@ -0,0 +1,228 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_fast_f64.c
+ * Description:  RFFT & RIFFT Double precision Floating point process function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+void stage_rfft_f64(
+  const arm_rfft_fast_instance_f64 * S,
+        float64_t * p,
+        float64_t * pOut)
+{
+        uint32_t  k;                                /* Loop Counter */
+        float64_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float64_t * pCoeff = S->pTwiddleRFFT;       /* Points to RFFT Twiddle factors */
+        float64_t *pA = p;                          /* increasing pointer */
+        float64_t *pB = p;                          /* decreasing pointer */
+        float64_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float64_t t1a, t1b;                         /* temporary variables */
+        float64_t p0, p1, p2, p3;                   /* temporary variables */
+
+
+   k = (S->Sint).fftLen - 1;
+
+   /* Pack first and last sample of the frequency domain together */
+
+   xBR = pB[0];
+   xBI = pB[1];
+   xAR = pA[0];
+   xAI = pA[1];
+
+   twR = *pCoeff++ ;
+   twI = *pCoeff++ ;
+
+   // U1 = XA(1) + XB(1); % It is real
+   t1a = xBR + xAR  ;
+
+   // U2 = XB(1) - XA(1); % It is imaginary
+   t1b = xBI + xAI  ;
+
+   // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+   // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+   *pOut++ = 0.5 * ( t1a + t1b );
+   *pOut++ = 0.5 * ( t1a - t1b );
+
+   // XA(1) = 1/2*( U1 - imag(U2) +  i*( U1 +imag(U2) ));
+   pB  = p + 2*k;
+   pA += 2;
+
+   do
+   {
+      /*
+         function X = my_split_rfft(X, ifftFlag)
+         % X is a series of real numbers
+         L  = length(X);
+         XC = X(1:2:end) +i*X(2:2:end);
+         XA = fft(XC);
+         XB = conj(XA([1 end:-1:2]));
+         TW = i*exp(-2*pi*i*[0:L/2-1]/L).';
+         for l = 2:L/2
+            XA(l) = 1/2 * (XA(l) + XB(l) + TW(l) * (XB(l) - XA(l)));
+         end
+         XA(1) = 1/2* (XA(1) + XB(1) + TW(1) * (XB(1) - XA(1))) + i*( 1/2*( XA(1) + XB(1) + i*( XA(1) - XB(1))));
+         X = XA;
+      */
+
+      xBI = pB[1];
+      xBR = pB[0];
+      xAR = pA[0];
+      xAI = pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xBR - xAR ;
+      t1b = xBI + xAI ;
+
+      // real(tw * (xB - xA)) = twR * (xBR - xAR) - twI * (xBI - xAI);
+      // imag(tw * (xB - xA)) = twI * (xBR - xAR) + twR * (xBI - xAI);
+      p0 = twR * t1a;
+      p1 = twI * t1a;
+      p2 = twR * t1b;
+      p3 = twI * t1b;
+
+      *pOut++ = 0.5 * (xAR + xBR + p0 + p3 ); //xAR
+      *pOut++ = 0.5 * (xAI - xBI + p1 - p2 ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   } while (k > 0U);
+}
+
+/* Prepares data for inverse cfft */
+void merge_rfft_f64(
+  const arm_rfft_fast_instance_f64 * S,
+        float64_t * p,
+        float64_t * pOut)
+{
+        uint32_t  k;                                /* Loop Counter */
+        float64_t twR, twI;                         /* RFFT Twiddle coefficients */
+  const float64_t *pCoeff = S->pTwiddleRFFT;        /* Points to RFFT Twiddle factors */
+        float64_t *pA = p;                          /* increasing pointer */
+        float64_t *pB = p;                          /* decreasing pointer */
+        float64_t xAR, xAI, xBR, xBI;               /* temporary variables */
+        float64_t t1a, t1b, r, s, t, u;             /* temporary variables */
+
+   k = (S->Sint).fftLen - 1;
+
+   xAR = pA[0];
+   xAI = pA[1];
+
+   pCoeff += 2 ;
+
+   *pOut++ = 0.5 * ( xAR + xAI );
+   *pOut++ = 0.5 * ( xAR - xAI );
+
+   pB  =  p + 2*k ;
+   pA +=  2	   ;
+
+   while (k > 0U)
+   {
+      /* G is half of the frequency complex spectrum */
+      //for k = 2:N
+      //    Xk(k) = 1/2 * (G(k) + conj(G(N-k+2)) + Tw(k)*( G(k) - conj(G(N-k+2))));
+      xBI =   pB[1]    ;
+      xBR =   pB[0]    ;
+      xAR =  pA[0];
+      xAI =  pA[1];
+
+      twR = *pCoeff++;
+      twI = *pCoeff++;
+
+      t1a = xAR - xBR ;
+      t1b = xAI + xBI ;
+
+      r = twR * t1a;
+      s = twI * t1b;
+      t = twI * t1a;
+      u = twR * t1b;
+
+      // real(tw * (xA - xB)) = twR * (xAR - xBR) - twI * (xAI - xBI);
+      // imag(tw * (xA - xB)) = twI * (xAR - xBR) + twR * (xAI - xBI);
+      *pOut++ = 0.5 * (xAR + xBR - r - s ); //xAR
+      *pOut++ = 0.5 * (xAI - xBI + t - u ); //xAI
+
+      pA += 2;
+      pB -= 2;
+      k--;
+   }
+
+}
+
+/**
+  @ingroup groupTransforms
+*/
+
+
+/**
+  @addtogroup RealFFT
+  @{
+*/
+
+/**
+  @brief         Processing function for the Double Precision floating-point real FFT.
+  @param[in]     S         points to an arm_rfft_fast_instance_f64 structure
+  @param[in]     p         points to input buffer (Source buffer is modified by this function.)
+  @param[in]     pOut      points to output buffer
+  @param[in]     ifftFlag
+                   - value = 0: RFFT
+                   - value = 1: RIFFT
+  @return        none
+*/
+
+void arm_rfft_fast_f64(
+  arm_rfft_fast_instance_f64 * S,
+  float64_t * p,
+  float64_t * pOut,
+  uint8_t ifftFlag)
+{
+   arm_cfft_instance_f64 * Sint = &(S->Sint);
+   Sint->fftLen = S->fftLenRFFT / 2;
+
+   /* Calculation of Real FFT */
+   if (ifftFlag)
+   {
+      /*  Real FFT compression */
+      merge_rfft_f64(S, p, pOut);
+
+      /* Complex radix-4 IFFT process */
+      arm_cfft_f64( Sint, pOut, ifftFlag, 1);
+   }
+   else
+   {
+      /* Calculation of RFFT of input */
+      arm_cfft_f64( Sint, p, ifftFlag, 1);
+
+      /*  Real FFT extraction */
+      stage_rfft_f64(S, p, pOut);
+   }
+}
+
+/**
+* @} end of RealFFT group
+*/
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f16.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f16.c
new file mode 100755
index 00000000..158180b4
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f16.c
@@ -0,0 +1,357 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_fast_init_f16.c
+ * Description:  Split Radix Decimation in Frequency CFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions_f16.h"
+#include "arm_common_tables_f16.h"
+#include "arm_const_structs_f16.h"
+
+#if defined(ARM_FLOAT16_SUPPORTED)
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32))
+
+/**
+  @private
+  @brief         Initialization function for the 32pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_32_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),16);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+
+  S->fftLenRFFT = 32U;
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_32;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64))
+
+/**
+  @private
+  @brief         Initialization function for the 64pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_64_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),32);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 64U;
+
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_64;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128))
+
+/**
+  @private
+  @brief         Initialization function for the 128pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_128_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),64);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 128;
+
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_128;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256))
+
+/**
+  @private
+  @brief         Initialization function for the 256pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+*/
+
+static arm_status arm_rfft_256_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),128);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 256U;
+
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_256;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512))
+
+/**
+  @private
+  @brief         Initialization function for the 512pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_512_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),256);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 512U;
+
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_512;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024))
+/**
+  @private
+  @brief         Initialization function for the 1024pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_1024_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),512);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 1024U;
+
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_1024;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048))
+/**
+  @private
+  @brief         Initialization function for the 2048pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+static arm_status arm_rfft_2048_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),1024);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 2048U;
+
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_2048;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096))
+/**
+  @private
+* @brief         Initialization function for the 4096pt floating-point real FFT.
+* @param[in,out] S  points to an arm_rfft_fast_instance_f16 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_4096_fast_init_f16( arm_rfft_fast_instance_f16 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f16(&(S->Sint),2048);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 4096U;
+
+  S->pTwiddleRFFT    = (float16_t *) twiddleCoefF16_rfft_4096;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+/**
+  @brief         Initialization function for the floating-point real FFT.
+  @param[in,out] S       points to an arm_rfft_fast_instance_f16 structure
+  @param[in]     fftLen  length of the Real Sequence
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Description
+                   The parameter <code>fftLen</code> specifies the length of RFFT/CIFFT process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_rfft_fast_init_f16(
+  arm_rfft_fast_instance_f16 * S,
+  uint16_t fftLen)
+{
+  typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f16 *);
+  fft_init_ptr fptr = 0x0;
+
+  switch (fftLen)
+  {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_4096))
+  case 4096U:
+    fptr = arm_rfft_4096_fast_init_f16;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_2048))
+  case 2048U:
+    fptr = arm_rfft_2048_fast_init_f16;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_1024))
+  case 1024U:
+    fptr = arm_rfft_1024_fast_init_f16;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_512))
+  case 512U:
+    fptr = arm_rfft_512_fast_init_f16;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_256))
+  case 256U:
+    fptr = arm_rfft_256_fast_init_f16;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_128))
+  case 128U:
+    fptr = arm_rfft_128_fast_init_f16;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_64))
+  case 64U:
+    fptr = arm_rfft_64_fast_init_f16;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F16_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F16_32))
+  case 32U:
+    fptr = arm_rfft_32_fast_init_f16;
+    break;
+#endif
+  default:
+    break;
+  }
+
+  if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR;
+  return fptr( S );
+
+}
+
+/**
+  @} end of RealFFT group
+ */
+
+#endif /*  #if defined(ARM_FLOAT16_SUPPORTED) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
index ca510cd5..e8273b47 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f32.c
@@ -1,344 +1,352 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_cfft_init_f32.c
- * Description:  Split Radix Decimation in Frequency CFFT Floating point processing function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-/**
-  @ingroup groupTransforms
- */
-
-/**
-  @addtogroup RealFFT
-  @{
- */
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
-
-/**
-  @brief         Initialization function for the 32pt floating-point real FFT.
-  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
- */
-
-arm_status arm_rfft_32_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 16U;
-  S->fftLenRFFT = 32U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_16_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable16;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_16;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_32;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
-
-/**
-  @brief         Initialization function for the 64pt floating-point real FFT.
-  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
- */
-
-arm_status arm_rfft_64_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 32U;
-  S->fftLenRFFT = 64U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_32_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable32;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_32;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_64;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
-
-/**
-  @brief         Initialization function for the 128pt floating-point real FFT.
-  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
- */
-
-arm_status arm_rfft_128_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 64U;
-  S->fftLenRFFT = 128U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_64_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable64;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_64;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_128;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
-
-/**
-  @brief         Initialization function for the 256pt floating-point real FFT.
-  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
-*/
-
-arm_status arm_rfft_256_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 128U;
-  S->fftLenRFFT = 256U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_128_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable128;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_128;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_256;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
-
-/**
-  @brief         Initialization function for the 512pt floating-point real FFT.
-  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
- */
-
-arm_status arm_rfft_512_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 256U;
-  S->fftLenRFFT = 512U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_256_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable256;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_256;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_512;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif 
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
-/**
-  @brief         Initialization function for the 1024pt floating-point real FFT.
-  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
- */
-
-arm_status arm_rfft_1024_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 512U;
-  S->fftLenRFFT = 1024U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_512_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable512;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_512;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_1024;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
-/**
-  @brief         Initialization function for the 2048pt floating-point real FFT.
-  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
- */
-arm_status arm_rfft_2048_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 1024U;
-  S->fftLenRFFT = 2048U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_1024_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable1024;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_1024;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_2048;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif
-
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
-/**
-* @brief         Initialization function for the 4096pt floating-point real FFT.
-* @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
- */
-
-arm_status arm_rfft_4096_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
-
-  arm_cfft_instance_f32 * Sint;
-
-  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
-
-  Sint = &(S->Sint);
-  Sint->fftLen = 2048U;
-  S->fftLenRFFT = 4096U;
-
-  Sint->bitRevLength = ARMBITREVINDEXTABLE_2048_TABLE_LENGTH;
-  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTable2048;
-  Sint->pTwiddle     = (float32_t *) twiddleCoef_2048;
-  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_4096;
-
-  return ARM_MATH_SUCCESS;
-}
-#endif 
-
-/**
-  @brief         Initialization function for the floating-point real FFT.
-  @param[in,out] S       points to an arm_rfft_fast_instance_f32 structure
-  @param[in]     fftLen  length of the Real Sequence
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
-
-  @par           Description
-                   The parameter <code>fftLen</code> specifies the length of RFFT/CIFFT process.
-                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
-  @par
-                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
- */
-
-arm_status arm_rfft_fast_init_f32(
-  arm_rfft_fast_instance_f32 * S,
-  uint16_t fftLen)
-{
-  typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f32 *);
-  fft_init_ptr fptr = 0x0;
-
-  switch (fftLen)
-  {
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
-  case 4096U:
-    fptr = arm_rfft_4096_fast_init_f32;
-    break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
-  case 2048U:
-    fptr = arm_rfft_2048_fast_init_f32;
-    break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
-  case 1024U:
-    fptr = arm_rfft_1024_fast_init_f32;
-    break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
-  case 512U:
-    fptr = arm_rfft_512_fast_init_f32;
-    break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
-  case 256U:
-    fptr = arm_rfft_256_fast_init_f32;
-    break;
-#endif
-#if (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
-  case 128U:
-    fptr = arm_rfft_128_fast_init_f32;
-    break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
-  case 64U:
-    fptr = arm_rfft_64_fast_init_f32;
-    break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
-  case 32U:
-    fptr = arm_rfft_32_fast_init_f32;
-    break;
-#endif
-  default:
-    return ARM_MATH_ARGUMENT_ERROR;
-  }
-
-  if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR;
-  return fptr( S );
-
-}
-
-/**
-  @} end of RealFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_fast_init_f32.c
+ * Description:  Split Radix Decimation in Frequency CFFT Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
+
+/**
+  @private
+  @brief         Initialization function for the 32pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_32_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),16);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+
+  S->fftLenRFFT = 32U;
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_32;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
+
+/**
+  @private
+  @brief         Initialization function for the 64pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_64_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),32);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 64U;
+
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_64;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
+
+/**
+  @private
+  @brief         Initialization function for the 128pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_128_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),64);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 128;
+
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_128;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
+
+/**
+  @private
+  @brief         Initialization function for the 256pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+*/
+
+static arm_status arm_rfft_256_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),128);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 256U;
+
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_256;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
+
+/**
+  @private
+  @brief         Initialization function for the 512pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_512_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),256);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 512U;
+
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_512;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
+/**
+  @private
+  @brief         Initialization function for the 1024pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_1024_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),512);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 1024U;
+
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_1024;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
+/**
+  @private
+  @brief         Initialization function for the 2048pt floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+static arm_status arm_rfft_2048_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),1024);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 2048U;
+
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_2048;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+/**
+  @private
+* @brief         Initialization function for the 4096pt floating-point real FFT.
+* @param[in,out] S  points to an arm_rfft_fast_instance_f32 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_4096_fast_init_f32( arm_rfft_fast_instance_f32 * S ) {
+
+  arm_status status;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  status=arm_cfft_init_f32(&(S->Sint),2048);
+  if (status != ARM_MATH_SUCCESS)
+  {
+    return(status);
+  }
+  S->fftLenRFFT = 4096U;
+
+  S->pTwiddleRFFT    = (float32_t *) twiddleCoef_rfft_4096;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif 
+
+/**
+  @brief         Initialization function for the floating-point real FFT.
+  @param[in,out] S       points to an arm_rfft_fast_instance_f32 structure
+  @param[in]     fftLen  length of the Real Sequence
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Description
+                   The parameter <code>fftLen</code> specifies the length of RFFT/CIFFT process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_rfft_fast_init_f32(
+  arm_rfft_fast_instance_f32 * S,
+  uint16_t fftLen)
+{
+  typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f32 *);
+  fft_init_ptr fptr = 0x0;
+
+  switch (fftLen)
+  {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_2048) && defined(ARM_TABLE_BITREVIDX_FLT_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096))
+  case 4096U:
+    fptr = arm_rfft_4096_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_1024) && defined(ARM_TABLE_BITREVIDX_FLT_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048))
+  case 2048U:
+    fptr = arm_rfft_2048_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_512) && defined(ARM_TABLE_BITREVIDX_FLT_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024))
+  case 1024U:
+    fptr = arm_rfft_1024_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_256) && defined(ARM_TABLE_BITREVIDX_FLT_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512))
+  case 512U:
+    fptr = arm_rfft_512_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_128) && defined(ARM_TABLE_BITREVIDX_FLT_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256))
+  case 256U:
+    fptr = arm_rfft_256_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_64) && defined(ARM_TABLE_BITREVIDX_FLT_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128))
+  case 128U:
+    fptr = arm_rfft_128_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_32) && defined(ARM_TABLE_BITREVIDX_FLT_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64))
+  case 64U:
+    fptr = arm_rfft_64_fast_init_f32;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F32_16) && defined(ARM_TABLE_BITREVIDX_FLT_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32))
+  case 32U:
+    fptr = arm_rfft_32_fast_init_f32;
+    break;
+#endif
+  default:
+    break;
+  }
+
+  if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR;
+  return fptr( S );
+
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c
new file mode 100755
index 00000000..c6d3e69c
--- /dev/null
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_fast_init_f64.c
@@ -0,0 +1,344 @@
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_fast_init_f64.c
+ * Description:  Split Radix Decimation in Frequency CFFT Double Precision Floating point processing function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+/**
+  @ingroup groupTransforms
+ */
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16) && defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32))
+
+/**
+  @brief         Initialization function for the 32pt double precision floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_32_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 16U;
+  S->fftLenRFFT = 32U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_16_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_16;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_16;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_32;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64))
+
+/**
+  @brief         Initialization function for the 64pt Double Precision floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_64_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 32U;
+  S->fftLenRFFT = 64U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_32_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_32;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_32;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_64;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128))
+
+/**
+  @brief         Initialization function for the 128pt Double Precision floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_128_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 64U;
+  S->fftLenRFFT = 128U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_64_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_64;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_64;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_128;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256))
+
+/**
+  @brief         Initialization function for the 256pt Double Precision floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+*/
+
+static arm_status arm_rfft_256_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 128U;
+  S->fftLenRFFT = 256U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_128_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_128;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_128;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_256;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512))
+
+/**
+  @brief         Initialization function for the 512pt Double Precision floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_512_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 256U;
+  S->fftLenRFFT = 512U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_256_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_256;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_256;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_512;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024))
+/**
+  @brief         Initialization function for the 1024pt Double Precision floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_1024_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 512U;
+  S->fftLenRFFT = 1024U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_512_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_512;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_512;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_1024;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048))
+/**
+  @brief         Initialization function for the 2048pt Double Precision floating-point real FFT.
+  @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+static arm_status arm_rfft_2048_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 1024U;
+  S->fftLenRFFT = 2048U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_1024_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_1024;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_1024;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_2048;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096))
+/**
+* @brief         Initialization function for the 4096pt Double Precision floating-point real FFT.
+* @param[in,out] S  points to an arm_rfft_fast_instance_f64 structure
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
+ */
+
+static arm_status arm_rfft_4096_fast_init_f64( arm_rfft_fast_instance_f64 * S ) {
+
+  arm_cfft_instance_f64 * Sint;
+
+  if( !S ) return ARM_MATH_ARGUMENT_ERROR;
+
+  Sint = &(S->Sint);
+  Sint->fftLen = 2048U;
+  S->fftLenRFFT = 4096U;
+
+  Sint->bitRevLength = ARMBITREVINDEXTABLEF64_2048_TABLE_LENGTH;
+  Sint->pBitRevTable = (uint16_t *)armBitRevIndexTableF64_2048;
+  Sint->pTwiddle     = (float64_t *) twiddleCoefF64_2048;
+  S->pTwiddleRFFT    = (float64_t *) twiddleCoefF64_rfft_4096;
+
+  return ARM_MATH_SUCCESS;
+}
+#endif
+
+/**
+  @brief         Initialization function for the Double Precision floating-point real FFT.
+  @param[in,out] S       points to an arm_rfft_fast_instance_f64 structure
+  @param[in]     fftLen  length of the Real Sequence
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLen</code> is not a supported length
+
+  @par           Description
+                   The parameter <code>fftLen</code> specifies the length of RFFT/CIFFT process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096.
+  @par
+                   This Function also initializes Twiddle factor table pointer and Bit reversal table pointer.
+ */
+
+arm_status arm_rfft_fast_init_f64(
+  arm_rfft_fast_instance_f64 * S,
+  uint16_t fftLen)
+{
+  typedef arm_status(*fft_init_ptr)( arm_rfft_fast_instance_f64 *);
+  fft_init_ptr fptr = 0x0;
+
+  switch (fftLen)
+  {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_BITREVIDX_FLT64_2048) && defined(ARM_TABLE_TWIDDLECOEF_F64_2048) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_4096))
+  case 4096U:
+    fptr = arm_rfft_4096_fast_init_f64;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_BITREVIDX_FLT64_1024) && defined(ARM_TABLE_TWIDDLECOEF_F64_1024) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_2048))
+  case 2048U:
+    fptr = arm_rfft_2048_fast_init_f64;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_BITREVIDX_FLT64_512) && defined(ARM_TABLE_TWIDDLECOEF_F64_512) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_1024))
+  case 1024U:
+    fptr = arm_rfft_1024_fast_init_f64;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_BITREVIDX_FLT64_256) && defined(ARM_TABLE_TWIDDLECOEF_F64_256) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_512))
+  case 512U:
+    fptr = arm_rfft_512_fast_init_f64;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_BITREVIDX_FLT64_128) && defined(ARM_TABLE_TWIDDLECOEF_F64_128) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_256))
+  case 256U:
+    fptr = arm_rfft_256_fast_init_f64;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_BITREVIDX_FLT64_64) && defined(ARM_TABLE_TWIDDLECOEF_F64_64) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_128))
+  case 128U:
+    fptr = arm_rfft_128_fast_init_f64;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_BITREVIDX_FLT64_32) && defined(ARM_TABLE_TWIDDLECOEF_F64_32) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_64))
+  case 64U:
+    fptr = arm_rfft_64_fast_init_f64;
+    break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_BITREVIDX_FLT64_16) && defined(ARM_TABLE_TWIDDLECOEF_F64_16) && defined(ARM_TABLE_TWIDDLECOEF_RFFT_F64_32))
+  case 32U:
+    fptr = arm_rfft_32_fast_init_f64;
+    break;
+#endif
+  default:
+    break;
+  }
+
+  if( ! fptr ) return ARM_MATH_ARGUMENT_ERROR;
+  return fptr( S );
+
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
index 3d57a212..0a32da66 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_f32.c
@@ -1,139 +1,147 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rfft_init_f32.c
- * Description:  RFFT & RIFFT Floating point initialisation function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-
-
-/**
-  @addtogroup RealFFT
-  @{
- */
-
-/**
-  @brief         Initialization function for the floating-point RFFT/RIFFT.
-  @deprecated    Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed in the future.
-  @param[in,out] S             points to an instance of the floating-point RFFT/RIFFT structure
-  @param[in,out] S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure
-  @param[in]     fftLenReal     length of the FFT.
-  @param[in]     ifftFlagR      flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
-
-  @par Description
-                   The parameter <code>fftLenReal</code>specifies length of RFFT/RIFFT Process.
-                   Supported FFT Lengths are 128, 512, 2048.
-  @par
-                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   This function also initializes Twiddle factor table.
- */
-
-arm_status arm_rfft_init_f32(
-  arm_rfft_instance_f32 * S,
-  arm_cfft_radix4_instance_f32 * S_CFFT,
-  uint32_t fftLenReal,
-  uint32_t ifftFlagR,
-  uint32_t bitReverseFlag)
-{
-
-  /*  Initialise the default arm status */
-  arm_status status = ARM_MATH_SUCCESS;
-
-  /*  Initialize the Real FFT length */
-  S->fftLenReal = (uint16_t) fftLenReal;
-
-  /*  Initialize the Complex FFT length */
-  S->fftLenBy2 = (uint16_t) fftLenReal / 2U;
-
-  /*  Initialize the Twiddle coefficientA pointer */
-  S->pTwiddleAReal = (float32_t *) realCoefA;
-
-  /*  Initialize the Twiddle coefficientB pointer */
-  S->pTwiddleBReal = (float32_t *) realCoefB;
-
-  /*  Initialize the Flag for selection of RFFT or RIFFT */
-  S->ifftFlagR = (uint8_t) ifftFlagR;
-
-  /*  Initialize the Flag for calculation Bit reversal or not */
-  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-  /*  Initializations of structure parameters depending on the FFT length */
-  switch (S->fftLenReal)
-  {
-    /* Init table modifier value */
-  case 8192U:
-    S->twidCoefRModifier = 1U;
-    break;
-  case 2048U:
-    S->twidCoefRModifier = 4U;
-    break;
-  case 512U:
-    S->twidCoefRModifier = 16U;
-    break;
-  case 128U:
-    S->twidCoefRModifier = 64U;
-    break;
-  default:
-    /*  Reporting argument error if rfftSize is not valid value */
-    status = ARM_MATH_ARGUMENT_ERROR;
-    break;
-  }
-
-  /* Init Complex FFT Instance */
-  S->pCfft = S_CFFT;
-
-  if (S->ifftFlagR)
-  {
-    /* Initializes the CIFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1U, 0U);
-  }
-  else
-  {
-    /* Initializes the CFFT Module for fftLenreal/2 length */
-    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0U, 0U);
-  }
-
-  /* return the status of RFFT Init function */
-  return (status);
-
-}
-
-/**
-  @} end of RealFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_init_f32.c
+ * Description:  RFFT & RIFFT Floating point initialisation function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the floating-point RFFT/RIFFT.
+  @deprecated    Do not use this function. It has been superceded by \ref arm_rfft_fast_init_f32 and will be removed in the future.
+  @param[in,out] S             points to an instance of the floating-point RFFT/RIFFT structure
+  @param[in,out] S_CFFT        points to an instance of the floating-point CFFT/CIFFT structure
+  @param[in]     fftLenReal     length of the FFT.
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
+
+  @par Description
+                   The parameter <code>fftLenReal</code>specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 128, 512, 2048.
+  @par
+                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
+ */
+
+arm_status arm_rfft_init_f32(
+  arm_rfft_instance_f32 * S,
+  arm_cfft_radix4_instance_f32 * S_CFFT,
+  uint32_t fftLenReal,
+  uint32_t ifftFlagR,
+  uint32_t bitReverseFlag)
+{
+   /*  Initialise the default arm status */
+  arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_F32)
+
+  /*  Initialise the default arm status */
+  status = ARM_MATH_SUCCESS;
+
+  /*  Initialize the Real FFT length */
+  S->fftLenReal = (uint16_t) fftLenReal;
+
+  /*  Initialize the Complex FFT length */
+  S->fftLenBy2 = (uint16_t) fftLenReal / 2U;
+
+  /*  Initialize the Twiddle coefficientA pointer */
+  S->pTwiddleAReal = (float32_t *) realCoefA;
+
+  /*  Initialize the Twiddle coefficientB pointer */
+  S->pTwiddleBReal = (float32_t *) realCoefB;
+
+  /*  Initialize the Flag for selection of RFFT or RIFFT */
+  S->ifftFlagR = (uint8_t) ifftFlagR;
+
+  /*  Initialize the Flag for calculation Bit reversal or not */
+  S->bitReverseFlagR = (uint8_t) bitReverseFlag;
+
+  /*  Initializations of structure parameters depending on the FFT length */
+  switch (S->fftLenReal)
+  {
+    /* Init table modifier value */
+  case 8192U:
+    S->twidCoefRModifier = 1U;
+    break;
+  case 2048U:
+    S->twidCoefRModifier = 4U;
+    break;
+  case 512U:
+    S->twidCoefRModifier = 16U;
+    break;
+  case 128U:
+    S->twidCoefRModifier = 64U;
+    break;
+  default:
+    /*  Reporting argument error if rfftSize is not valid value */
+    status = ARM_MATH_ARGUMENT_ERROR;
+    break;
+  }
+
+  /* Init Complex FFT Instance */
+  S->pCfft = S_CFFT;
+
+  if (S->ifftFlagR)
+  {
+    /* Initializes the CIFFT Module for fftLenreal/2 length */
+    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 1U, 0U);
+  }
+  else
+  {
+    /* Initializes the CFFT Module for fftLenreal/2 length */
+    arm_cfft_radix4_init_f32(S->pCfft, S->fftLenBy2, 0U, 0U);
+  }
+
+#endif
+#endif
+  /* return the status of RFFT Init function */
+  return (status);
+
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
index fb4c66cd..e70f8af9 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q15.c
@@ -1,158 +1,248 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rfft_init_q15.c
- * Description:  RFFT & RIFFT Q15 initialisation function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_const_structs.h"
-
-/**
-  @addtogroup RealFFT
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q15 RFFT/RIFFT.
-  @param[in,out] S              points to an instance of the Q15 RFFT/RIFFT structure
-  @param[in]     fftLenReal     length of the FFT
-  @param[in]     ifftFlagR      flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
-                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
-  @par
-                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   This function also initializes Twiddle factor table.
- */
-
-arm_status arm_rfft_init_q15(
-    arm_rfft_instance_q15 * S,
-    uint32_t fftLenReal,
-    uint32_t ifftFlagR,
-    uint32_t bitReverseFlag)
-{
-    /*  Initialise the default arm status */
-    arm_status status = ARM_MATH_SUCCESS;
-
-    /*  Initialize the Real FFT length */
-    S->fftLenReal = (uint16_t) fftLenReal;
-
-    /*  Initialize the Twiddle coefficientA pointer */
-    S->pTwiddleAReal = (q15_t *) realCoefAQ15;
-
-    /*  Initialize the Twiddle coefficientB pointer */
-    S->pTwiddleBReal = (q15_t *) realCoefBQ15;
-
-    /*  Initialize the Flag for selection of RFFT or RIFFT */
-    S->ifftFlagR = (uint8_t) ifftFlagR;
-
-    /*  Initialize the Flag for calculation Bit reversal or not */
-    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-    /*  Initialization of coef modifier depending on the FFT length */
-    switch (S->fftLenReal)
-    {
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
-    case 8192U:
-        S->twidCoefRModifier = 1U;
-        S->pCfft = &arm_cfft_sR_q15_len4096;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
-    case 4096U:
-        S->twidCoefRModifier = 2U;
-        S->pCfft = &arm_cfft_sR_q15_len2048;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
-    case 2048U:
-        S->twidCoefRModifier = 4U;
-        S->pCfft = &arm_cfft_sR_q15_len1024;
-        break;
-#endif 
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
-    case 1024U:
-        S->twidCoefRModifier = 8U;
-        S->pCfft = &arm_cfft_sR_q15_len512;
-        break;
-#endif 
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
-    case 512U:
-        S->twidCoefRModifier = 16U;
-        S->pCfft = &arm_cfft_sR_q15_len256;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
-    case 256U:
-        S->twidCoefRModifier = 32U;
-        S->pCfft = &arm_cfft_sR_q15_len128;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
-    case 128U:
-        S->twidCoefRModifier = 64U;
-        S->pCfft = &arm_cfft_sR_q15_len64;
-        break;
-#endif 
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
-    case 64U:
-        S->twidCoefRModifier = 128U;
-        S->pCfft = &arm_cfft_sR_q15_len32;
-        break;
-#endif 
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
-    case 32U:
-        S->twidCoefRModifier = 256U;
-        S->pCfft = &arm_cfft_sR_q15_len16;
-        break;
-#endif
-    default:
-        /*  Reporting argument error if rfftSize is not valid value */
-        status = ARM_MATH_ARGUMENT_ERROR;
-        break;
-    }
-
-    /* return the status of RFFT Init function */
-    return (status);
-}
-
-/**
-  @} end of RealFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_init_q15.c
+ * Description:  RFFT & RIFFT Q15 initialisation function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q15 RFFT/RIFFT.
+  @param[in,out] S              points to an instance of the Q15 RFFT/RIFFT structure
+  @param[in]     fftLenReal     length of the FFT
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+  @par
+                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
+ */
+
+arm_status arm_rfft_init_q15(
+    arm_rfft_instance_q15 * S,
+    uint32_t fftLenReal,
+    uint32_t ifftFlagR,
+    uint32_t bitReverseFlag)
+{
+     /*  Initialise the default arm status */
+    arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q15)
+
+    /*  Initialise the default arm status */
+    status = ARM_MATH_SUCCESS;
+
+    /*  Initialize the Real FFT length */
+    S->fftLenReal = (uint16_t) fftLenReal;
+
+    /*  Initialize the Twiddle coefficientA pointer */
+    S->pTwiddleAReal = (q15_t *) realCoefAQ15;
+
+    /*  Initialize the Twiddle coefficientB pointer */
+    S->pTwiddleBReal = (q15_t *) realCoefBQ15;
+
+    /*  Initialize the Flag for selection of RFFT or RIFFT */
+    S->ifftFlagR = (uint8_t) ifftFlagR;
+
+    /*  Initialize the Flag for calculation Bit reversal or not */
+    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
+
+    /*  Initialization of coef modifier depending on the FFT length */
+    switch (S->fftLenReal)
+    {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+    case 8192U:
+        S->twidCoefRModifier = 1U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),4096);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+          S->pCfft = &arm_cfft_sR_q15_len4096;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+    case 4096U:
+        S->twidCoefRModifier = 2U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),2048);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q15_len2048;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+    case 2048U:
+        S->twidCoefRModifier = 4U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),1024);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q15_len1024;
+        #endif
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+    case 1024U:
+        S->twidCoefRModifier = 8U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),512);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+          S->pCfft = &arm_cfft_sR_q15_len512;
+        #endif
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+    case 512U:
+        S->twidCoefRModifier = 16U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),256);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q15_len256;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+    case 256U:
+        S->twidCoefRModifier = 32U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),128);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q15_len128;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+    case 128U:
+        S->twidCoefRModifier = 64U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),64);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q15_len64;
+        #endif
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+    case 64U:
+        S->twidCoefRModifier = 128U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),32);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+          S->pCfft = &arm_cfft_sR_q15_len32;
+        #endif
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q15_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+    case 32U:
+        S->twidCoefRModifier = 256U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q15(&(S->cfftInst),16);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q15_len16;
+        #endif
+        break;
+#endif
+    default:
+        /*  Reporting argument error if rfftSize is not valid value */
+        status = ARM_MATH_ARGUMENT_ERROR;
+        break;
+    }
+
+#endif
+#endif
+    /* return the status of RFFT Init function */
+    return (status);
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
index efae1ea5..0a28719e 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_init_q31.c
@@ -1,160 +1,246 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rfft_init_q31.c
- * Description:  RFFT & RIFFT Q31 initialisation function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-#include "arm_common_tables.h"
-#include "arm_const_structs.h"
-
-
-
-/**
-  @addtogroup RealFFT
-  @{
- */
-
-/**
-  @brief         Initialization function for the Q31 RFFT/RIFFT.
-  @param[in,out] S              points to an instance of the Q31 RFFT/RIFFT structure
-  @param[in]     fftLenReal     length of the FFT
-  @param[in]     ifftFlagR      flag that selects transform direction
-                   - value = 0: forward transform
-                   - value = 1: inverse transform
-  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
-                   - value = 0: disables bit reversal of output
-                   - value = 1: enables bit reversal of output
-  @return        execution status
-                   - \ref ARM_MATH_SUCCESS        : Operation successful
-                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
-
-  @par           Details
-                   The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
-                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
-  @par
-                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
-                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
-  @par
-                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
-                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
-  @par
-                   This function also initializes Twiddle factor table.
-*/
-
-arm_status arm_rfft_init_q31(
-    arm_rfft_instance_q31 * S,
-    uint32_t fftLenReal,
-    uint32_t ifftFlagR,
-    uint32_t bitReverseFlag)
-{
-    /*  Initialise the default arm status */
-    arm_status status = ARM_MATH_SUCCESS;
-
-    /*  Initialize the Real FFT length */
-    S->fftLenReal = (uint16_t) fftLenReal;
-
-    /*  Initialize the Twiddle coefficientA pointer */
-    S->pTwiddleAReal = (q31_t *) realCoefAQ31;
-
-    /*  Initialize the Twiddle coefficientB pointer */
-    S->pTwiddleBReal = (q31_t *) realCoefBQ31;
-
-    /*  Initialize the Flag for selection of RFFT or RIFFT */
-    S->ifftFlagR = (uint8_t) ifftFlagR;
-
-    /*  Initialize the Flag for calculation Bit reversal or not */
-    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
-
-    /*  Initialization of coef modifier depending on the FFT length */
-    switch (S->fftLenReal)
-    {
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
-    case 8192U:
-        S->twidCoefRModifier = 1U;
-        S->pCfft = &arm_cfft_sR_q31_len4096;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
-    case 4096U:
-        S->twidCoefRModifier = 2U;
-        S->pCfft = &arm_cfft_sR_q31_len2048;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
-    case 2048U:
-        S->twidCoefRModifier = 4U;
-        S->pCfft = &arm_cfft_sR_q31_len1024;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
-    case 1024U:
-        S->twidCoefRModifier = 8U;
-        S->pCfft = &arm_cfft_sR_q31_len512;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
-    case 512U:
-        S->twidCoefRModifier = 16U;
-        S->pCfft = &arm_cfft_sR_q31_len256;
-        break;
-#endif 
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
-    case 256U:
-        S->twidCoefRModifier = 32U;
-        S->pCfft = &arm_cfft_sR_q31_len128;
-        break;
-#endif 
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
-    case 128U:
-        S->twidCoefRModifier = 64U;
-        S->pCfft = &arm_cfft_sR_q31_len64;
-        break;
-#endif
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
-    case 64U:
-        S->twidCoefRModifier = 128U;
-        S->pCfft = &arm_cfft_sR_q31_len32;
-        break;
-#endif 
-#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
-    case 32U:
-        S->twidCoefRModifier = 256U;
-        S->pCfft = &arm_cfft_sR_q31_len16;
-        break;
-#endif
-    default:
-        /*  Reporting argument error if rfftSize is not valid value */
-        status = ARM_MATH_ARGUMENT_ERROR;
-        break;
-    }
-
-    /* return the status of RFFT Init function */
-    return (status);
-}
-
-/**
-  @} end of RealFFT group
- */
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_init_q31.c
+ * Description:  RFFT & RIFFT Q31 initialisation function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+#include "arm_common_tables.h"
+#include "arm_const_structs.h"
+
+
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Initialization function for the Q31 RFFT/RIFFT.
+  @param[in,out] S              points to an instance of the Q31 RFFT/RIFFT structure
+  @param[in]     fftLenReal     length of the FFT
+  @param[in]     ifftFlagR      flag that selects transform direction
+                   - value = 0: forward transform
+                   - value = 1: inverse transform
+  @param[in]     bitReverseFlag flag that enables / disables bit reversal of output
+                   - value = 0: disables bit reversal of output
+                   - value = 1: enables bit reversal of output
+  @return        execution status
+                   - \ref ARM_MATH_SUCCESS        : Operation successful
+                   - \ref ARM_MATH_ARGUMENT_ERROR : <code>fftLenReal</code> is not a supported length
+
+  @par           Details
+                   The parameter <code>fftLenReal</code> specifies length of RFFT/RIFFT Process.
+                   Supported FFT Lengths are 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192.
+  @par
+                   The parameter <code>ifftFlagR</code> controls whether a forward or inverse transform is computed.
+                   Set(=1) ifftFlagR to calculate RIFFT, otherwise RFFT is calculated.
+  @par
+                   The parameter <code>bitReverseFlag</code> controls whether output is in normal order or bit reversed order.
+                   Set(=1) bitReverseFlag for output to be in normal order otherwise output is in bit reversed order.
+  @par
+                   This function also initializes Twiddle factor table.
+*/
+
+arm_status arm_rfft_init_q31(
+    arm_rfft_instance_q31 * S,
+    uint32_t fftLenReal,
+    uint32_t ifftFlagR,
+    uint32_t bitReverseFlag)
+{
+     /*  Initialise the default arm status */
+    arm_status status = ARM_MATH_ARGUMENT_ERROR;
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
+
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_REALCOEF_Q31)
+
+    /*  Initialise the default arm status */
+    status = ARM_MATH_SUCCESS;
+
+    /*  Initialize the Real FFT length */
+    S->fftLenReal = (uint16_t) fftLenReal;
+
+    /*  Initialize the Twiddle coefficientA pointer */
+    S->pTwiddleAReal = (q31_t *) realCoefAQ31;
+
+    /*  Initialize the Twiddle coefficientB pointer */
+    S->pTwiddleBReal = (q31_t *) realCoefBQ31;
+
+    /*  Initialize the Flag for selection of RFFT or RIFFT */
+    S->ifftFlagR = (uint8_t) ifftFlagR;
+
+    /*  Initialize the Flag for calculation Bit reversal or not */
+    S->bitReverseFlagR = (uint8_t) bitReverseFlag;
+
+    /*  Initialization of coef modifier depending on the FFT length */
+    switch (S->fftLenReal)
+    {
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_4096) && defined(ARM_TABLE_BITREVIDX_FXT_4096))
+    case 8192U:
+
+
+        S->twidCoefRModifier = 1U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),4096);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len4096;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_2048) && defined(ARM_TABLE_BITREVIDX_FXT_2048))
+    case 4096U:
+        S->twidCoefRModifier = 2U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),2048);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len2048;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_1024) && defined(ARM_TABLE_BITREVIDX_FXT_1024))
+    case 2048U:
+        S->twidCoefRModifier = 4U;
+
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),1024);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+          S->pCfft = &arm_cfft_sR_q31_len1024;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_512) && defined(ARM_TABLE_BITREVIDX_FXT_512))
+    case 1024U:
+        S->twidCoefRModifier = 8U;
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),512);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len512;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_256) && defined(ARM_TABLE_BITREVIDX_FXT_256))
+    case 512U:
+        S->twidCoefRModifier = 16U;
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),256);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len256;
+        #endif
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_128) && defined(ARM_TABLE_BITREVIDX_FXT_128))
+    case 256U:
+        S->twidCoefRModifier = 32U;
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),128);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len128;
+        #endif
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_64) && defined(ARM_TABLE_BITREVIDX_FXT_64))
+    case 128U:
+        S->twidCoefRModifier = 64U;
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),64);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len64;
+        #endif
+        break;
+#endif
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_32) && defined(ARM_TABLE_BITREVIDX_FXT_32))
+    case 64U:
+        S->twidCoefRModifier = 128U;
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),32);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len32;
+        #endif
+        break;
+#endif 
+#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || (defined(ARM_TABLE_TWIDDLECOEF_Q31_16) && defined(ARM_TABLE_BITREVIDX_FXT_16))
+    case 32U:
+        S->twidCoefRModifier = 256U;
+        #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+           status=arm_cfft_init_q31(&(S->cfftInst),16);
+           if (status != ARM_MATH_SUCCESS)
+           {
+               return(status);
+           }
+        #else
+           S->pCfft = &arm_cfft_sR_q31_len16;
+        #endif
+        break;
+#endif
+    default:
+        /*  Reporting argument error if rfftSize is not valid value */
+        status = ARM_MATH_ARGUMENT_ERROR;
+        break;
+    }
+
+#endif
+#endif
+    /* return the status of RFFT Init function */
+    return (status);
+}
+
+/**
+  @} end of RealFFT group
+ */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
index 29d12b78..7d149c60 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q15.c
@@ -1,380 +1,526 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rfft_q15.c
- * Description:  RFFT & RIFFT Q15 process function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/* ----------------------------------------------------------------------
- * Internal functions prototypes
- * -------------------------------------------------------------------- */
-
-void arm_split_rfft_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pATable,
-  const q15_t * pBTable,
-        q15_t * pDst,
-        uint32_t modifier);
-
-void arm_split_rifft_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pATable,
-  const q15_t * pBTable,
-        q15_t * pDst,
-        uint32_t modifier);
-
-/**
-  @addtogroup RealFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the Q15 RFFT/RIFFT.
-  @param[in]     S     points to an instance of the Q15 RFFT/RIFFT structure
-  @param[in]     pSrc  points to input buffer
-  @param[out]    pDst  points to output buffer
-  @return        none
-
-  @par           Input an output formats
-                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-                   Hence the output format is different for different RFFT sizes.
-                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
-  @par
-                   \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
-  @par
-                   \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
- */
-
-void arm_rfft_q15(
-  const arm_rfft_instance_q15 * S,
-        q15_t * pSrc,
-        q15_t * pDst)
-{
-  const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
-        uint32_t L2 = S->fftLenReal >> 1U;
-        uint32_t i;
-
-  /* Calculation of RIFFT of input */
-  if (S->ifftFlagR == 1U)
-  {
-     /*  Real IFFT core process */
-     arm_split_rifft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-     /* Complex IFFT process */
-     arm_cfft_q15 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
-
-     for(i = 0; i < S->fftLenReal; i++)
-     {
-        pDst[i] = pDst[i] << 1U;
-     }
-  }
-  else
-  {
-     /* Calculation of RFFT of input */
-
-     /* Complex FFT process */
-     arm_cfft_q15 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
-
-     /*  Real FFT core process */
-     arm_split_rfft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-/**
-  @} end of RealFFT group
- */
-
-/**
-  @brief         Core Real FFT process
-  @param[in]     pSrc      points to input buffer
-  @param[in]     fftLen    length of FFT
-  @param[in]     pATable   points to twiddle Coef A buffer
-  @param[in]     pBTable   points to twiddle Coef B buffer
-  @param[out]    pDst      points to output buffer
-  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  @return        none
-
-  @par
-                   The function implements a Real FFT
- */
-
-void arm_split_rfft_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pATable,
-  const q15_t * pBTable,
-        q15_t * pDst,
-        uint32_t modifier)
-{       
-        uint32_t i;                                    /* Loop Counter */
-        q31_t outR, outI;                              /* Temporary variables for output */
-  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-        q15_t *pSrc1, *pSrc2;
-#if defined (ARM_MATH_DSP)
-        q15_t *pD1, *pD2;
-#endif
-
-  /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2];
-  pCoefB = &pBTable[modifier * 2];
-
-  pSrc1 = &pSrc[2];
-  pSrc2 = &pSrc[(2U * fftLen) - 2U];
-
-#if defined (ARM_MATH_DSP)
-
-    i = 1U;
-    pD1 = pDst + 2;
-    pD2 = pDst + (4U * fftLen) - 2;
-
-    for (i = fftLen - 1; i > 0; i--)
-    {
-        /*
-          outR = (  pSrc[2 * i]             * pATable[2 * i]
-                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
-                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
-                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
-          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
-                  + pIn[2 * i]             * pATable[2 * i + 1]
-                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
-                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i])
-         */
-
-
-#ifndef ARM_MATH_BIG_ENDIAN
-        /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-        outR = __SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA));
-#else
-        /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
-        outR = -(__SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA)));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-        outR = __SMLAD(read_q15x2 (pSrc2), read_q15x2((q15_t *) pCoefB), outR) >> 16U;
-
-        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-#ifndef ARM_MATH_BIG_ENDIAN
-        outI = __SMUSDX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
-#else
-        outI = __SMUSDX(read_q15x2 ((q15_t *) pCoefB), read_q15x2_da (&pSrc2));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-        /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
-        outI = __SMLADX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), outI);
-
-        /* write output */
-        *pD1++ = (q15_t) outR;
-        *pD1++ = outI >> 16U;
-
-        /* write complex conjugate output */
-        pD2[0] = (q15_t) outR;
-        pD2[1] = -(outI >> 16U);
-        pD2 -= 2;
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2U * modifier);
-        pCoefA = pCoefA + (2U * modifier);
-    }
-
-    pDst[2U * fftLen]      = (pSrc[0] - pSrc[1]) >> 1U;
-    pDst[2U * fftLen + 1U] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
-    pDst[1] = 0;
-
-#else
-
-    i = 1U;
-
-    while (i < fftLen)
-    {
-        /*
-          outR = (  pSrc[2 * i]             * pATable[2 * i]
-                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
-                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
-                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-        */
-
-        outR = *pSrc1 * *pCoefA;
-        outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
-        outR = outR + (*pSrc2 * *pCoefB);
-        outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
-
-        /*
-          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
-                  + pIn[2 * i]             * pATable[2 * i + 1]
-                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
-                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-        */
-
-        outI = *pSrc2 * *(pCoefB + 1);
-        outI = outI - (*(pSrc2 + 1) * *pCoefB);
-        outI = outI + (*(pSrc1 + 1) * *pCoefA);
-        outI = outI + (*pSrc1 * *(pCoefA + 1));
-
-        /* update input pointers */
-        pSrc1 += 2U;
-        pSrc2 -= 2U;
-
-        /* write output */
-        pDst[2U * i] = (q15_t) outR;
-        pDst[2U * i + 1U] = outI >> 16U;
-
-        /* write complex conjugate output */
-        pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR;
-        pDst[((4U * fftLen) - (2U * i)) + 1U] = -(outI >> 16U);
-
-        /* update coefficient pointer */
-        pCoefB = pCoefB + (2U * modifier);
-        pCoefA = pCoefA + (2U * modifier);
-
-        i++;
-    }
-
-    pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
-    pDst[2U * fftLen + 1U] = 0;
-
-    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
-    pDst[1] = 0;
-
-#endif /* #if defined (ARM_MATH_DSP) */
-}
-
-
-/**
-  @brief         Core Real IFFT process
-  @param[in]     pSrc      points to input buffer
-  @param[in]     fftLen    length of FFT
-  @param[in]     pATable   points to twiddle Coef A buffer
-  @param[in]     pBTable   points to twiddle Coef B buffer
-  @param[out]    pDst      points to output buffer
-  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  @return        none
-
-  @par
-                   The function implements a Real IFFT
- */
-
-void arm_split_rifft_q15(
-        q15_t * pSrc,
-        uint32_t fftLen,
-  const q15_t * pATable,
-  const q15_t * pBTable,
-        q15_t * pDst,
-        uint32_t modifier)
-{
-        uint32_t i;                                    /* Loop Counter */
-        q31_t outR, outI;                              /* Temporary variables for output */
-  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-        q15_t *pSrc1, *pSrc2;
-        q15_t *pDst1 = &pDst[0];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  pSrc1 = &pSrc[0];
-  pSrc2 = &pSrc[2 * fftLen];
-
-  i = fftLen;
-  while (i > 0U)
-  {
-      /*
-        outR = (  pIn[2 * i]             * pATable[2 * i]
-                + pIn[2 * i + 1]         * pATable[2 * i + 1]
-                + pIn[2 * n - 2 * i]     * pBTable[2 * i]
-                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
-        outI = (  pIn[2 * i + 1]         * pATable[2 * i]
-                - pIn[2 * i]             * pATable[2 * i + 1]
-                - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
-                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-       */
-
-#if defined (ARM_MATH_DSP)
-
-#ifndef ARM_MATH_BIG_ENDIAN
-      /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
-      outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB));
-#else
-      /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
-      outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB)));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-      /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2 * n - 2 * i] * pBTable[2 * i] */
-      outR = __SMLAD(read_q15x2(pSrc1), read_q15x2 ((q15_t *) pCoefA), outR) >> 16U;
-
-      /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-      outI = __SMUADX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
-
-      /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
-#ifndef ARM_MATH_BIG_ENDIAN
-      outI = __SMLSDX(read_q15x2 ((q15_t *) pCoefA), read_q15x2_ia (&pSrc1), -outI);
-#else
-      outI = __SMLSDX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), -outI);
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-      /* write output */
-#ifndef ARM_MATH_BIG_ENDIAN
-      write_q15x2_ia (&pDst1, __PKHBT(outR, (outI >> 16U), 16));
-#else
-      write_q15x2_ia (&pDst1, __PKHBT((outI >> 16U), outR, 16));
-#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
-
-
-#else  /* #if defined (ARM_MATH_DSP) */
-
-      outR = *pSrc2 * *pCoefB;
-      outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
-      outR = outR + (*pSrc1 * *pCoefA);
-      outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
-
-      outI = *(pSrc1 + 1) * *pCoefA;
-      outI = outI - (*pSrc1 * *(pCoefA + 1));
-      outI = outI - (*pSrc2 * *(pCoefB + 1));
-      outI = outI - (*(pSrc2 + 1) * *(pCoefB));
-
-      /* update input pointers */
-      pSrc1 += 2U;
-      pSrc2 -= 2U;
-
-      /* write output */
-      *pDst1++ = (q15_t) outR;
-      *pDst1++ = (q15_t) (outI >> 16);
-
-#endif /* #if defined (ARM_MATH_DSP) */
-
-      /* update coefficient pointer */
-      pCoefB = pCoefB + (2 * modifier);
-      pCoefA = pCoefA + (2 * modifier);
-
-      i--;
-  }
-
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_q15.c
+ * Description:  RFFT & RIFFT Q15 process function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+/* ----------------------------------------------------------------------
+ * Internal functions prototypes
+ * -------------------------------------------------------------------- */
+
+void arm_split_rfft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier);
+
+void arm_split_rifft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier);
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q15 RFFT/RIFFT.
+  @param[in]     S     points to an instance of the Q15 RFFT/RIFFT structure
+  @param[in]     pSrc  points to input buffer (Source buffer is modified by this function.)
+  @param[out]    pDst  points to output buffer
+  @return        none
+
+  @par           Input an output formats
+                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                   Hence the output format is different for different RFFT sizes.
+                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+  @par
+                   \image html RFFTQ15.gif "Input and Output Formats for Q15 RFFT"
+  @par
+                   \image html RIFFTQ15.gif "Input and Output Formats for Q15 RIFFT"
+  @par
+                   If the input buffer is of length N, the output buffer must have length 2*N.
+                   The input buffer is modified by this function.
+  @par
+                   For the RIFFT, the source buffer must at least have length 
+                   fftLenReal + 2.
+                   The last two elements must be equal to what would be generated
+                   by the RFFT:
+                     (pSrc[0] - pSrc[1]) >> 1 and 0
+ */
+
+void arm_rfft_q15(
+  const arm_rfft_instance_q15 * S,
+        q15_t * pSrc,
+        q15_t * pDst)
+{
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+  const arm_cfft_instance_q15 *S_CFFT = &(S->cfftInst);
+#else
+  const arm_cfft_instance_q15 *S_CFFT = S->pCfft;
+#endif
+        uint32_t L2 = S->fftLenReal >> 1U;
+
+  /* Calculation of RIFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+
+     /* Complex IFFT process */
+     arm_cfft_q15 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+
+     arm_shift_q15(pDst, 1, pDst, S->fftLenReal);
+  }
+  else
+  {
+     /* Calculation of RFFT of input */
+
+     /* Complex FFT process */
+     arm_cfft_q15 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+
+     /*  Real FFT core process */
+     arm_split_rfft_q15 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
+}
+
+/**
+  @} end of RealFFT group
+ */
+
+/**
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+
+  @par
+                   The function implements a Real FFT
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_fft.h"
+
+#if defined(__CMSIS_GCC_H)
+#define MVE_CMPLX_MULT_FX_AxB_S16(A,B)          vqdmladhxq_s16(vqdmlsdhq_s16((__typeof(A))vuninitializedq_s16(), A, B), A, B)
+#define MVE_CMPLX_MULT_FX_AxConjB_S16(A,B)      vqdmladhq_s16(vqdmlsdhxq_s16((__typeof(A))vuninitializedq_s16(), A, B), A, B)
+
+#endif 
+
+void arm_split_rfft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
+{
+   uint32_t        i;          /* Loop Counter */
+    const q15_t    *pCoefA, *pCoefB;    /* Temporary pointers for twiddle factors */
+    q15_t          *pOut1 = &pDst[2];
+    q15_t          *pIn1 = &pSrc[2];
+    uint16x8_t      offsetIn = { 6, 7, 4, 5, 2, 3, 0, 1 };
+    uint16x8_t      offsetCoef;
+    const uint16_t  offsetCoefArr[16] = {
+        0, 0, 2, 2, 4, 4, 6, 6,
+        0, 1, 0, 1, 0, 1, 0, 1
+    };
+
+    offsetCoef = vmulq_n_u16(vld1q_u16(offsetCoefArr), modifier) + vld1q_u16(offsetCoefArr + 8);
+    offsetIn = vaddq_n_u16(offsetIn, (2 * fftLen - 8));
+
+    /* Init coefficient pointers */
+    pCoefA = &pATable[modifier * 2];
+    pCoefB = &pBTable[modifier * 2];
+
+    const q15_t    *pCoefAb, *pCoefBb;
+    pCoefAb = pCoefA;
+    pCoefBb = pCoefB;
+
+    pIn1 = &pSrc[2];
+
+    i = fftLen - 1U;
+    i = i / 4 + 1;
+    while (i > 0U) {
+        q15x8_t         in1 = vld1q_s16(pIn1);
+        q15x8_t         in2 = vldrhq_gather_shifted_offset_s16(pSrc, offsetIn);
+        q15x8_t         coefA = vldrhq_gather_shifted_offset_s16(pCoefAb, offsetCoef);
+        q15x8_t         coefB = vldrhq_gather_shifted_offset_s16(pCoefBb, offsetCoef);
+
+#if defined(__CMSIS_GCC_H)
+        q15x8_t         out = vhaddq_s16(MVE_CMPLX_MULT_FX_AxB_S16(in1, coefA),
+                                     MVE_CMPLX_MULT_FX_AxConjB_S16(coefB, in2));
+#else
+        q15x8_t         out = vhaddq_s16(MVE_CMPLX_MULT_FX_AxB(in1, coefA, q15x8_t),
+                                         MVE_CMPLX_MULT_FX_AxConjB(coefB, in2, q15x8_t));
+#endif
+        vst1q_s16(pOut1, out);
+        pOut1 += 8;
+
+        offsetCoef = vaddq_n_u16(offsetCoef, modifier * 8);
+        offsetIn -= 8;
+        pIn1 += 8;
+        i -= 1;
+    }
+
+    pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U;
+    pDst[2 * fftLen + 1] = 0;
+
+    pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+    pDst[1] = 0;
+}
+#else
+void arm_split_rfft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
+{       
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q15_t *pSrc1, *pSrc2;
+#if defined (ARM_MATH_DSP)
+        q15_t *pD1, *pD2;
+#endif
+
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
+
+  pSrc1 = &pSrc[2];
+  pSrc2 = &pSrc[(2U * fftLen) - 2U];
+
+#if defined (ARM_MATH_DSP)
+
+    i = 1U;
+    pD1 = pDst + 2;
+    pD2 = pDst + (4U * fftLen) - 2;
+
+    for (i = fftLen - 1; i > 0; i--)
+    {
+        /*
+          outR = (  pSrc[2 * i]             * pATable[2 * i]
+                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                  + pIn[2 * i]             * pATable[2 * i + 1]
+                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i])
+         */
+
+
+#ifndef ARM_MATH_BIG_ENDIAN
+        /* pSrc[2 * i] * pATable[2 * i] - pSrc[2 * i + 1] * pATable[2 * i + 1] */
+        outR = __SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA));
+#else
+        /* -(pSrc[2 * i + 1] * pATable[2 * i + 1] - pSrc[2 * i] * pATable[2 * i]) */
+        outR = -(__SMUSD(read_q15x2 (pSrc1), read_q15x2((q15_t *) pCoefA)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* pSrc[2 * n - 2 * i] * pBTable[2 * i] + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+        outR = __SMLAD(read_q15x2 (pSrc2), read_q15x2((q15_t *) pCoefB), outR) >> 16U;
+
+        /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+#ifndef ARM_MATH_BIG_ENDIAN
+        outI = __SMUSDX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
+#else
+        outI = __SMUSDX(read_q15x2 ((q15_t *) pCoefB), read_q15x2_da (&pSrc2));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+        /* (pIn[2 * i + 1] * pATable[2 * i] + pIn[2 * i] * pATable[2 * i + 1] */
+        outI = __SMLADX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), outI);
+
+        /* write output */
+        *pD1++ = (q15_t) outR;
+        *pD1++ = outI >> 16U;
+
+        /* write complex conjugate output */
+        pD2[0] = (q15_t) outR;
+        pD2[1] = -(outI >> 16U);
+        pD2 -= 2;
+
+        /* update coefficient pointer */
+        pCoefB = pCoefB + (2U * modifier);
+        pCoefA = pCoefA + (2U * modifier);
+    }
+
+    pDst[2U * fftLen]      = (pSrc[0] - pSrc[1]) >> 1U;
+    pDst[2U * fftLen + 1U] = 0;
+
+    pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+    pDst[1] = 0;
+
+#else
+
+    i = 1U;
+
+    while (i < fftLen)
+    {
+        /*
+          outR = (  pSrc[2 * i]             * pATable[2 * i]
+                  - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+                  + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+                  + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+        */
+
+        outR = *pSrc1 * *pCoefA;
+        outR = outR - (*(pSrc1 + 1) * *(pCoefA + 1));
+        outR = outR + (*pSrc2 * *pCoefB);
+        outR = (outR + (*(pSrc2 + 1) * *(pCoefB + 1))) >> 16;
+
+        /*
+          outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                  + pIn[2 * i]             * pATable[2 * i + 1]
+                  + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                  - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+        */
+
+        outI = *pSrc2 * *(pCoefB + 1);
+        outI = outI - (*(pSrc2 + 1) * *pCoefB);
+        outI = outI + (*(pSrc1 + 1) * *pCoefA);
+        outI = outI + (*pSrc1 * *(pCoefA + 1));
+
+        /* update input pointers */
+        pSrc1 += 2U;
+        pSrc2 -= 2U;
+
+        /* write output */
+        pDst[2U * i] = (q15_t) outR;
+        pDst[2U * i + 1U] = outI >> 16U;
+
+        /* write complex conjugate output */
+        pDst[(4U * fftLen) - (2U * i)] = (q15_t) outR;
+        pDst[((4U * fftLen) - (2U * i)) + 1U] = -(outI >> 16U);
+
+        /* update coefficient pointer */
+        pCoefB = pCoefB + (2U * modifier);
+        pCoefA = pCoefA + (2U * modifier);
+
+        i++;
+    }
+
+    pDst[2U * fftLen] = (pSrc[0] - pSrc[1]) >> 1;
+    pDst[2U * fftLen + 1U] = 0;
+
+    pDst[0] = (pSrc[0] + pSrc[1]) >> 1;
+    pDst[1] = 0;
+
+#endif /* #if defined (ARM_MATH_DSP) */
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+
+  @par
+                   The function implements a Real IFFT
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_fft.h"
+
+void arm_split_rifft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
+{
+   uint32_t        i;                  /* Loop Counter */
+    const q15_t    *pCoefA, *pCoefB;    /* Temporary pointers for twiddle factors */
+    q15_t          *pIn1;
+    uint16x8_t      offset = { 6, 7, 4, 5, 2, 3, 0, 1 };
+    uint16x8_t      offsetCoef;
+    int16x8_t       conj = { 1, -1, 1, -1, 1, -1, 1, -1 }; /* conjugate */
+    const uint16_t  offsetCoefArr[16] = {
+        0, 0, 2, 2, 4, 4, 6, 6,
+        0, 1, 0, 1, 0, 1, 0, 1
+    };
+
+    offsetCoef = vmulq_n_u16(vld1q_u16(offsetCoefArr), modifier) + vld1q_u16(offsetCoefArr + 8);
+
+    offset = vaddq_n_u16(offset, (2 * fftLen - 6));
+
+    /* Init coefficient pointers */
+    pCoefA = &pATable[0];
+    pCoefB = &pBTable[0];
+
+    const q15_t    *pCoefAb, *pCoefBb;
+    pCoefAb = pCoefA;
+    pCoefBb = pCoefB;
+
+    pIn1 = &pSrc[0];
+
+    i = fftLen;
+    i = i / 4;
+
+    while (i > 0U) {
+        q15x8_t         in1 = vld1q_s16(pIn1);
+        q15x8_t         in2 = vldrhq_gather_shifted_offset_s16(pSrc, offset);
+        q15x8_t         coefA = vldrhq_gather_shifted_offset_s16(pCoefAb, offsetCoef);
+        q15x8_t         coefB = vldrhq_gather_shifted_offset_s16(pCoefBb, offsetCoef);
+
+        /* can we avoid the conjugate here ? */
+        q15x8_t         out = vhaddq_s16(MVE_CMPLX_MULT_FX_AxConjB(in1, coefA, q15x8_t),
+                                         vmulq(conj, MVE_CMPLX_MULT_FX_AxB(in2, coefB, q15x8_t)));
+
+        vst1q_s16(pDst, out);
+        pDst += 8;
+
+        offsetCoef = vaddq_n_u16(offsetCoef, modifier * 8);
+        offset -= 8;
+
+        pIn1 += 8;
+        i -= 1;
+    }
+}
+#else
+void arm_split_rifft_q15(
+        q15_t * pSrc,
+        uint32_t fftLen,
+  const q15_t * pATable,
+  const q15_t * pBTable,
+        q15_t * pDst,
+        uint32_t modifier)
+{
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q15_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q15_t *pSrc1, *pSrc2;
+        q15_t *pDst1 = &pDst[0];
+
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
+
+  pSrc1 = &pSrc[0];
+  pSrc2 = &pSrc[2 * fftLen];
+
+  i = fftLen;
+  while (i > 0U)
+  {
+      /*
+        outR = (  pIn[2 * i]             * pATable[2 * i]
+                + pIn[2 * i + 1]         * pATable[2 * i + 1]
+                + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+        outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+                - pIn[2 * i]             * pATable[2 * i + 1]
+                - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+                - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+       */
+
+#if defined (ARM_MATH_DSP)
+
+#ifndef ARM_MATH_BIG_ENDIAN
+      /* pIn[2 * n - 2 * i] * pBTable[2 * i] - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]) */
+      outR = __SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB));
+#else
+      /* -(-pIn[2 * n - 2 * i] * pBTable[2 * i] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1])) */
+      outR = -(__SMUSD(read_q15x2(pSrc2), read_q15x2((q15_t *) pCoefB)));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* pIn[2 * i] * pATable[2 * i] + pIn[2 * i + 1] * pATable[2 * i + 1] + pIn[2 * n - 2 * i] * pBTable[2 * i] */
+      outR = __SMLAD(read_q15x2(pSrc1), read_q15x2 ((q15_t *) pCoefA), outR) >> 16U;
+
+      /* -pIn[2 * n - 2 * i] * pBTable[2 * i + 1] + pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+      outI = __SMUADX(read_q15x2_da (&pSrc2), read_q15x2((q15_t *) pCoefB));
+
+      /* pIn[2 * i + 1] * pATable[2 * i] - pIn[2 * i] * pATable[2 * i + 1] */
+#ifndef ARM_MATH_BIG_ENDIAN
+      outI = __SMLSDX(read_q15x2 ((q15_t *) pCoefA), read_q15x2_ia (&pSrc1), -outI);
+#else
+      outI = __SMLSDX(read_q15x2_ia (&pSrc1), read_q15x2 ((q15_t *) pCoefA), -outI);
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+      /* write output */
+#ifndef ARM_MATH_BIG_ENDIAN
+      write_q15x2_ia (&pDst1, __PKHBT(outR, (outI >> 16U), 16));
+#else
+      write_q15x2_ia (&pDst1, __PKHBT((outI >> 16U), outR, 16));
+#endif /* #ifndef ARM_MATH_BIG_ENDIAN */
+
+
+#else  /* #if defined (ARM_MATH_DSP) */
+
+      outR = *pSrc2 * *pCoefB;
+      outR = outR - (*(pSrc2 + 1) * *(pCoefB + 1));
+      outR = outR + (*pSrc1 * *pCoefA);
+      outR = (outR + (*(pSrc1 + 1) * *(pCoefA + 1))) >> 16;
+
+      outI = *(pSrc1 + 1) * *pCoefA;
+      outI = outI - (*pSrc1 * *(pCoefA + 1));
+      outI = outI - (*pSrc2 * *(pCoefB + 1));
+      outI = outI - (*(pSrc2 + 1) * *(pCoefB));
+
+      /* update input pointers */
+      pSrc1 += 2U;
+      pSrc2 -= 2U;
+
+      /* write output */
+      *pDst1++ = (q15_t) outR;
+      *pDst1++ = (q15_t) (outI >> 16);
+
+#endif /* #if defined (ARM_MATH_DSP) */
+
+      /* update coefficient pointer */
+      pCoefB = pCoefB + (2 * modifier);
+      pCoefA = pCoefA + (2 * modifier);
+
+      i--;
+  }
+
+}
+#endif /* defined(ARM_MATH_MVEI) */
diff --git a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
index 0cc595b1..ad3212db 100644
--- a/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
+++ b/Libraries/CMSIS/DSP/Source/TransformFunctions/arm_rfft_q31.c
@@ -1,292 +1,430 @@
-/* ----------------------------------------------------------------------
- * Project:      CMSIS DSP Library
- * Title:        arm_rfft_q31.c
- * Description:  FFT & RIFFT Q31 process function
- *
- * $Date:        18. March 2019
- * $Revision:    V1.6.0
- *
- * Target Processor: Cortex-M cores
- * -------------------------------------------------------------------- */
-/*
- * Copyright (C) 2010-2019 ARM Limited or its affiliates. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include "arm_math.h"
-
-/* ----------------------------------------------------------------------
- * Internal functions prototypes
- * -------------------------------------------------------------------- */
-
-void arm_split_rfft_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pATable,
-  const q31_t * pBTable,
-        q31_t * pDst,
-        uint32_t modifier);
-
-void arm_split_rifft_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pATable,
-  const q31_t * pBTable,
-        q31_t * pDst,
-        uint32_t modifier);
-
-/**
-  @addtogroup RealFFT
-  @{
- */
-
-/**
-  @brief         Processing function for the Q31 RFFT/RIFFT.
-  @param[in]     S     points to an instance of the Q31 RFFT/RIFFT structure
-  @param[in]     pSrc  points to input buffer
-  @param[out]    pDst  points to output buffer
-  @return        none
-
-  @par           Input an output formats
-                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
-                   Hence the output format is different for different RFFT sizes.
-                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
-  @par
-                   \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"
-  @par
-                   \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"
- */
-
-void arm_rfft_q31(
-  const arm_rfft_instance_q31 * S,
-        q31_t * pSrc,
-        q31_t * pDst)
-{
-  const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
-        uint32_t L2 = S->fftLenReal >> 1U;
-        uint32_t i;
-
-  /* Calculation of RIFFT of input */
-  if (S->ifftFlagR == 1U)
-  {
-     /*  Real IFFT core process */
-     arm_split_rifft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-
-     /* Complex IFFT process */
-     arm_cfft_q31 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
-
-     for(i = 0; i < S->fftLenReal; i++)
-     {
-        pDst[i] = pDst[i] << 1U;
-     }
-  }
-  else
-  {
-     /* Calculation of RFFT of input */
-
-     /* Complex FFT process */
-     arm_cfft_q31 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
-
-     /*  Real FFT core process */
-     arm_split_rfft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
-  }
-
-}
-
-/**
-  @} end of RealFFT group
- */
-
-/**
-  @brief         Core Real FFT process
-  @param[in]     pSrc      points to input buffer
-  @param[in]     fftLen    length of FFT
-  @param[in]     pATable   points to twiddle Coef A buffer
-  @param[in]     pBTable   points to twiddle Coef B buffer
-  @param[out]    pDst      points to output buffer
-  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  @return        none
- */
-
-void arm_split_rfft_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pATable,
-  const q31_t * pBTable,
-        q31_t * pDst,
-        uint32_t modifier)
-{
-        uint32_t i;                                    /* Loop Counter */
-        q31_t outR, outI;                              /* Temporary variables for output */
-  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-        q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1];
-        q31_t *pIn1 =  &pSrc[2], *pIn2 =  &pSrc[2 * fftLen - 1];
-
-  /* Init coefficient pointers */
-  pCoefA = &pATable[modifier * 2];
-  pCoefB = &pBTable[modifier * 2];
-
-  i = fftLen - 1U;
-
-  while (i > 0U)
-  {
-     /*
-       outR = (  pSrc[2 * i]             * pATable[2 * i]
-               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
-               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
-               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
-       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
-               + pIn[2 * i]             * pATable[2 * i + 1]
-               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
-               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-      */
-
-     CoefA1 = *pCoefA++;
-     CoefA2 = *pCoefA;
-
-     /* outR = (pSrc[2 * i] * pATable[2 * i] */
-     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
-
-     /* outI = pIn[2 * i] * pATable[2 * i + 1] */
-     mult_32x32_keep32_R (outI, *pIn1++, CoefA2);
-
-     /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
-     multSub_32x32_keep32_R (outR, *pIn1, CoefA2);
-
-     /* (pIn[2 * i + 1] * pATable[2 * i] */
-     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
-
-     /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
-     multSub_32x32_keep32_R (outR, *pIn2, CoefA2);
-     CoefB1 = *pCoefB;
-
-     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
-
-     /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
-
-     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-     multSub_32x32_keep32_R (outI, *pIn2--, CoefA2);
-
-     /* write output */
-     *pOut1++ = outR;
-     *pOut1++ = outI;
-
-     /* write complex conjugate output */
-     *pOut2-- = -outI;
-     *pOut2-- = outR;
-
-     /* update coefficient pointer */
-     pCoefB = pCoefB + (2 * modifier);
-     pCoefA = pCoefA + (2 * modifier - 1);
-
-     /* Decrement loop count */
-     i--;
-  }
-
-  pDst[2 * fftLen]     = (pSrc[0] - pSrc[1]) >> 1U;
-  pDst[2 * fftLen + 1] = 0;
-
-  pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
-  pDst[1] = 0;
-}
-
-
-/**
-  @brief         Core Real IFFT process
-  @param[in]     pSrc      points to input buffer
-  @param[in]     fftLen    length of FFT
-  @param[in]     pATable   points to twiddle Coef A buffer
-  @param[in]     pBTable   points to twiddle Coef B buffer
-  @param[out]    pDst      points to output buffer
-  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
-  @return        none
- */
-
-void arm_split_rifft_q31(
-        q31_t * pSrc,
-        uint32_t fftLen,
-  const q31_t * pATable,
-  const q31_t * pBTable,
-        q31_t * pDst,
-        uint32_t modifier)
-{       
-        q31_t outR, outI;                              /* Temporary variables for output */
-  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
-        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
-        q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1];
-
-  pCoefA = &pATable[0];
-  pCoefB = &pBTable[0];
-
-  while (fftLen > 0U)
-  {
-     /*
-       outR = (  pIn[2 * i]             * pATable[2 * i]
-               + pIn[2 * i + 1]         * pATable[2 * i + 1]
-               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
-               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
-
-       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
-               - pIn[2 * i]             * pATable[2 * i + 1]
-               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
-               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
-      */
-
-     CoefA1 = *pCoefA++;
-     CoefA2 = *pCoefA;
-
-     /* outR = (pIn[2 * i] * pATable[2 * i] */
-     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
-
-     /* - pIn[2 * i] * pATable[2 * i + 1] */
-     mult_32x32_keep32_R (outI, *pIn1++, -CoefA2);
-
-     /* pIn[2 * i + 1] * pATable[2 * i + 1] */
-     multAcc_32x32_keep32_R (outR, *pIn1, CoefA2);
-
-     /* pIn[2 * i + 1] * pATable[2 * i] */
-     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
-
-     /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
-     multAcc_32x32_keep32_R (outR, *pIn2, CoefA2);
-     CoefB1 = *pCoefB;
-
-     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
-     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
-
-     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
-     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
-
-     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
-     multAcc_32x32_keep32_R (outI, *pIn2--, CoefA2);
-
-     /* write output */
-     *pDst++ = outR;
-     *pDst++ = outI;
-
-     /* update coefficient pointer */
-     pCoefB = pCoefB + (modifier * 2);
-     pCoefA = pCoefA + (modifier * 2 - 1);
-
-     /* Decrement loop count */
-     fftLen--;
-  }
-
-}
+/* ----------------------------------------------------------------------
+ * Project:      CMSIS DSP Library
+ * Title:        arm_rfft_q31.c
+ * Description:  FFT & RIFFT Q31 process function
+ *
+ * $Date:        23 April 2021
+ * $Revision:    V1.9.0
+ *
+ * Target Processor: Cortex-M and Cortex-A cores
+ * -------------------------------------------------------------------- */
+/*
+ * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "dsp/transform_functions.h"
+
+/* ----------------------------------------------------------------------
+ * Internal functions prototypes
+ * -------------------------------------------------------------------- */
+
+void arm_split_rfft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier);
+
+void arm_split_rifft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier);
+
+/**
+  @addtogroup RealFFT
+  @{
+ */
+
+/**
+  @brief         Processing function for the Q31 RFFT/RIFFT.
+  @param[in]     S     points to an instance of the Q31 RFFT/RIFFT structure
+  @param[in]     pSrc  points to input buffer (Source buffer is modified by this function)
+  @param[out]    pDst  points to output buffer
+  @return        none
+
+  @par           Input an output formats
+                   Internally input is downscaled by 2 for every stage to avoid saturations inside CFFT/CIFFT process.
+                   Hence the output format is different for different RFFT sizes.
+                   The input and output formats for different RFFT sizes and number of bits to upscale are mentioned in the tables below for RFFT and RIFFT:
+  @par
+                   \image html RFFTQ31.gif "Input and Output Formats for Q31 RFFT"
+  @par
+                   \image html RIFFTQ31.gif "Input and Output Formats for Q31 RIFFT"
+  @par
+                   If the input buffer is of length N, the output buffer must have length 2*N.
+                   The input buffer is modified by this function.
+  @par
+                   For the RIFFT, the source buffer must at least have length 
+                   fftLenReal + 2.
+                   The last two elements must be equal to what would be generated
+                   by the RFFT:
+                     (pSrc[0] - pSrc[1]) >> 1 and 0
+
+ */
+
+void arm_rfft_q31(
+  const arm_rfft_instance_q31 * S,
+        q31_t * pSrc,
+        q31_t * pDst)
+{
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+  const arm_cfft_instance_q31 *S_CFFT = &(S->cfftInst);
+#else
+  const arm_cfft_instance_q31 *S_CFFT = S->pCfft;
+#endif
+        uint32_t L2 = S->fftLenReal >> 1U;
+
+  /* Calculation of RIFFT of input */
+  if (S->ifftFlagR == 1U)
+  {
+     /*  Real IFFT core process */
+     arm_split_rifft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+
+     /* Complex IFFT process */
+     arm_cfft_q31 (S_CFFT, pDst, S->ifftFlagR, S->bitReverseFlagR);
+
+     arm_shift_q31(pDst, 1, pDst, S->fftLenReal);
+  }
+  else
+  {
+     /* Calculation of RFFT of input */
+
+     /* Complex FFT process */
+     arm_cfft_q31 (S_CFFT, pSrc, S->ifftFlagR, S->bitReverseFlagR);
+
+     /*  Real FFT core process */
+     arm_split_rfft_q31 (pSrc, L2, S->pTwiddleAReal, S->pTwiddleBReal, pDst, S->twidCoefRModifier);
+  }
+
+}
+
+/**
+  @} end of RealFFT group
+ */
+
+/**
+  @brief         Core Real FFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_fft.h"
+
+#if defined(__CMSIS_GCC_H)
+
+#define MVE_CMPLX_MULT_FX_AxB_S32(A,B)          vqdmladhxq_s32(vqdmlsdhq_s32((__typeof(A))vuninitializedq_s32(), A, B), A, B)
+#define MVE_CMPLX_MULT_FX_AxConjB_S32(A,B)      vqdmladhq_s32(vqdmlsdhxq_s32((__typeof(A))vuninitializedq_s32(), A, B), A, B)
+
+#endif 
+
+void arm_split_rfft_q31(
+    q31_t       *pSrc,
+    uint32_t     fftLen,
+    const q31_t       *pATable,
+    const q31_t       *pBTable,
+    q31_t       *pDst,
+    uint32_t     modifier)
+{
+    uint32_t        i;          /* Loop Counter */
+    const q31_t    *pCoefA, *pCoefB;    /* Temporary pointers for twiddle factors */
+    q31_t          *pOut1 = &pDst[2];
+    q31_t          *pIn1 = &pSrc[2];
+    uint32x4_t      offset = { 2, 3, 0, 1 };
+    uint32x4_t      offsetCoef = { 0, 1, modifier * 2, modifier * 2 + 1 };
+
+    offset = offset + (2 * fftLen - 4);
+
+
+    /* Init coefficient pointers */
+    pCoefA = &pATable[modifier * 2];
+    pCoefB = &pBTable[modifier * 2];
+
+    const q31_t    *pCoefAb, *pCoefBb;
+    pCoefAb = pCoefA;
+    pCoefBb = pCoefB;
+
+    pIn1 = &pSrc[2];
+
+    i = fftLen - 1U;
+    i = i / 2 + 1;
+    while (i > 0U) {
+        q31x4_t         in1 = vld1q_s32(pIn1);
+        q31x4_t         in2 = vldrwq_gather_shifted_offset_s32(pSrc, offset);
+        q31x4_t         coefA = vldrwq_gather_shifted_offset_s32(pCoefAb, offsetCoef);
+        q31x4_t         coefB = vldrwq_gather_shifted_offset_s32(pCoefBb, offsetCoef);
+#if defined(__CMSIS_GCC_H)
+        q31x4_t         out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxB_S32(in1, coefA),MVE_CMPLX_MULT_FX_AxConjB_S32(coefB, in2));
+#else
+        q31x4_t         out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxB(in1, coefA, q31x4_t),
+                                         MVE_CMPLX_MULT_FX_AxConjB(coefB, in2, q31x4_t));
+#endif
+        vst1q(pOut1, out);
+        pOut1 += 4;
+
+        offsetCoef += modifier * 4;
+        offset -= 4;
+
+        pIn1 += 4;
+        i -= 1;
+    }
+
+    pDst[2 * fftLen] = (pSrc[0] - pSrc[1]) >> 1U;
+    pDst[2 * fftLen + 1] = 0;
+
+    pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+    pDst[1] = 0;
+}
+#else
+void arm_split_rfft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier)
+{
+        uint32_t i;                                    /* Loop Counter */
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
+        q31_t *pOut1 = &pDst[2], *pOut2 = &pDst[4 * fftLen - 1];
+        q31_t *pIn1 =  &pSrc[2], *pIn2 =  &pSrc[2 * fftLen - 1];
+
+  /* Init coefficient pointers */
+  pCoefA = &pATable[modifier * 2];
+  pCoefB = &pBTable[modifier * 2];
+
+  i = fftLen - 1U;
+
+  while (i > 0U)
+  {
+     /*
+       outR = (  pSrc[2 * i]             * pATable[2 * i]
+               - pSrc[2 * i + 1]         * pATable[2 * i + 1]
+               + pSrc[2 * n - 2 * i]     * pBTable[2 * i]
+               + pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               + pIn[2 * i]             * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
+
+     /* outR = (pSrc[2 * i] * pATable[2 * i] */
+     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
+
+     /* outI = pIn[2 * i] * pATable[2 * i + 1] */
+     mult_32x32_keep32_R (outI, *pIn1++, CoefA2);
+
+     /* - pSrc[2 * i + 1] * pATable[2 * i + 1] */
+     multSub_32x32_keep32_R (outR, *pIn1, CoefA2);
+
+     /* (pIn[2 * i + 1] * pATable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
+
+     /* pSrc[2 * n - 2 * i] * pBTable[2 * i]  */
+     multSub_32x32_keep32_R (outR, *pIn2, CoefA2);
+     CoefB1 = *pCoefB;
+
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
+
+     /* pSrc[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
+
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefA2);
+
+     /* write output */
+     *pOut1++ = outR;
+     *pOut1++ = outI;
+
+     /* write complex conjugate output */
+     *pOut2-- = -outI;
+     *pOut2-- = outR;
+
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (2 * modifier);
+     pCoefA = pCoefA + (2 * modifier - 1);
+
+     /* Decrement loop count */
+     i--;
+  }
+
+  pDst[2 * fftLen]     = (pSrc[0] - pSrc[1]) >> 1U;
+  pDst[2 * fftLen + 1] = 0;
+
+  pDst[0] = (pSrc[0] + pSrc[1]) >> 1U;
+  pDst[1] = 0;
+}
+#endif /* defined(ARM_MATH_MVEI) */
+
+/**
+  @brief         Core Real IFFT process
+  @param[in]     pSrc      points to input buffer
+  @param[in]     fftLen    length of FFT
+  @param[in]     pATable   points to twiddle Coef A buffer
+  @param[in]     pBTable   points to twiddle Coef B buffer
+  @param[out]    pDst      points to output buffer
+  @param[in]     modifier  twiddle coefficient modifier that supports different size FFTs with the same twiddle factor table
+  @return        none
+ */
+
+#if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+void arm_split_rifft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier)
+{
+    uint32_t        i;          /* Loop Counter */
+    const q31_t    *pCoefA, *pCoefB;    /* Temporary pointers for twiddle factors */
+    q31_t          *pIn1;
+    uint32x4_t      offset = { 2, 3, 0, 1 };
+    uint32x4_t      offsetCoef = { 0, 1, modifier * 2, modifier * 2 + 1 };
+    int32x4_t       conj = { 1, -1, 1, -1 };
+
+    offset = offset + (2 * fftLen - 2);
+
+    /* Init coefficient pointers */
+    pCoefA = &pATable[0];
+    pCoefB = &pBTable[0];
+
+    const q31_t    *pCoefAb, *pCoefBb;
+    pCoefAb = pCoefA;
+    pCoefBb = pCoefB;
+
+    pIn1 = &pSrc[0];
+
+    i = fftLen;
+    i = i >> 1;
+    while (i > 0U) {
+        q31x4_t         in1 = vld1q_s32(pIn1);
+        q31x4_t         in2 = vldrwq_gather_shifted_offset_s32(pSrc, offset);
+        q31x4_t         coefA = vldrwq_gather_shifted_offset_s32(pCoefAb, offsetCoef);
+        q31x4_t         coefB = vldrwq_gather_shifted_offset_s32(pCoefBb, offsetCoef);
+
+        /* can we avoid the conjugate here ? */
+#if defined(__CMSIS_GCC_H)
+        q31x4_t         out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxConjB_S32(in1, coefA),
+                                     vmulq_s32(conj, MVE_CMPLX_MULT_FX_AxB_S32(in2, coefB)));
+#else
+        q31x4_t         out = vhaddq_s32(MVE_CMPLX_MULT_FX_AxConjB(in1, coefA, q31x4_t),
+                                         vmulq_s32(conj, MVE_CMPLX_MULT_FX_AxB(in2, coefB, q31x4_t)));
+#endif
+        vst1q_s32(pDst, out);
+        pDst += 4;
+
+        offsetCoef += modifier * 4;
+        offset -= 4;
+
+        pIn1 += 4;
+        i -= 1;
+    }
+}
+#else
+void arm_split_rifft_q31(
+        q31_t * pSrc,
+        uint32_t fftLen,
+  const q31_t * pATable,
+  const q31_t * pBTable,
+        q31_t * pDst,
+        uint32_t modifier)
+{       
+        q31_t outR, outI;                              /* Temporary variables for output */
+  const q31_t *pCoefA, *pCoefB;                        /* Temporary pointers for twiddle factors */
+        q31_t CoefA1, CoefA2, CoefB1;                  /* Temporary variables for twiddle coefficients */
+        q31_t *pIn1 = &pSrc[0], *pIn2 = &pSrc[2 * fftLen + 1];
+
+  pCoefA = &pATable[0];
+  pCoefB = &pBTable[0];
+
+  while (fftLen > 0U)
+  {
+     /*
+       outR = (  pIn[2 * i]             * pATable[2 * i]
+               + pIn[2 * i + 1]         * pATable[2 * i + 1]
+               + pIn[2 * n - 2 * i]     * pBTable[2 * i]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1]);
+
+       outI = (  pIn[2 * i + 1]         * pATable[2 * i]
+               - pIn[2 * i]             * pATable[2 * i + 1]
+               - pIn[2 * n - 2 * i]     * pBTable[2 * i + 1]
+               - pIn[2 * n - 2 * i + 1] * pBTable[2 * i]);
+      */
+
+     CoefA1 = *pCoefA++;
+     CoefA2 = *pCoefA;
+
+     /* outR = (pIn[2 * i] * pATable[2 * i] */
+     mult_32x32_keep32_R (outR, *pIn1, CoefA1);
+
+     /* - pIn[2 * i] * pATable[2 * i + 1] */
+     mult_32x32_keep32_R (outI, *pIn1++, -CoefA2);
+
+     /* pIn[2 * i + 1] * pATable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn1, CoefA2);
+
+     /* pIn[2 * i + 1] * pATable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn1++, CoefA1);
+
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefA2);
+     CoefB1 = *pCoefB;
+
+     /* pIn[2 * n - 2 * i] * pBTable[2 * i + 1] */
+     multSub_32x32_keep32_R (outI, *pIn2--, CoefB1);
+
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i + 1] */
+     multAcc_32x32_keep32_R (outR, *pIn2, CoefB1);
+
+     /* pIn[2 * n - 2 * i + 1] * pBTable[2 * i] */
+     multAcc_32x32_keep32_R (outI, *pIn2--, CoefA2);
+
+     /* write output */
+     *pDst++ = outR;
+     *pDst++ = outI;
+
+     /* update coefficient pointer */
+     pCoefB = pCoefB + (modifier * 2);
+     pCoefA = pCoefA + (modifier * 2 - 1);
+
+     /* Decrement loop count */
+     fftLen--;
+  }
+
+}
+
+#endif /* defined(ARM_MATH_MVEI) */
diff --git a/Libraries/CMSIS/LICENSE.txt b/Libraries/CMSIS/LICENSE.txt
deleted file mode 100644
index c0ee8129..00000000
--- a/Libraries/CMSIS/LICENSE.txt
+++ /dev/null
@@ -1,201 +0,0 @@
-                                 Apache License
-                           Version 2.0, January 2004
-                        http://www.apache.org/licenses/
-
-   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
-
-   1. Definitions.
-
-      "License" shall mean the terms and conditions for use, reproduction,
-      and distribution as defined by Sections 1 through 9 of this document.
-
-      "Licensor" shall mean the copyright owner or entity authorized by
-      the copyright owner that is granting the License.
-
-      "Legal Entity" shall mean the union of the acting entity and all
-      other entities that control, are controlled by, or are under common
-      control with that entity. For the purposes of this definition,
-      "control" means (i) the power, direct or indirect, to cause the
-      direction or management of such entity, whether by contract or
-      otherwise, or (ii) ownership of fifty percent (50%) or more of the
-      outstanding shares, or (iii) beneficial ownership of such entity.
-
-      "You" (or "Your") shall mean an individual or Legal Entity
-      exercising permissions granted by this License.
-
-      "Source" form shall mean the preferred form for making modifications,
-      including but not limited to software source code, documentation
-      source, and configuration files.
-
-      "Object" form shall mean any form resulting from mechanical
-      transformation or translation of a Source form, including but
-      not limited to compiled object code, generated documentation,
-      and conversions to other media types.
-
-      "Work" shall mean the work of authorship, whether in Source or
-      Object form, made available under the License, as indicated by a
-      copyright notice that is included in or attached to the work
-      (an example is provided in the Appendix below).
-
-      "Derivative Works" shall mean any work, whether in Source or Object
-      form, that is based on (or derived from) the Work and for which the
-      editorial revisions, annotations, elaborations, or other modifications
-      represent, as a whole, an original work of authorship. For the purposes
-      of this License, Derivative Works shall not include works that remain
-      separable from, or merely link (or bind by name) to the interfaces of,
-      the Work and Derivative Works thereof.
-
-      "Contribution" shall mean any work of authorship, including
-      the original version of the Work and any modifications or additions
-      to that Work or Derivative Works thereof, that is intentionally
-      submitted to Licensor for inclusion in the Work by the copyright owner
-      or by an individual or Legal Entity authorized to submit on behalf of
-      the copyright owner. For the purposes of this definition, "submitted"
-      means any form of electronic, verbal, or written communication sent
-      to the Licensor or its representatives, including but not limited to
-      communication on electronic mailing lists, source code control systems,
-      and issue tracking systems that are managed by, or on behalf of, the
-      Licensor for the purpose of discussing and improving the Work, but
-      excluding communication that is conspicuously marked or otherwise
-      designated in writing by the copyright owner as "Not a Contribution."
-
-      "Contributor" shall mean Licensor and any individual or Legal Entity
-      on behalf of whom a Contribution has been received by Licensor and
-      subsequently incorporated within the Work.
-
-   2. Grant of Copyright License. Subject to the terms and conditions of
-      this License, each Contributor hereby grants to You a perpetual,
-      worldwide, non-exclusive, no-charge, royalty-free, irrevocable
-      copyright license to reproduce, prepare Derivative Works of,
-      publicly display, publicly perform, sublicense, and distribute the
-      Work and such Derivative Works in Source or Object form.
-
-   3. Grant of Patent License. Subject to the terms and conditions of
-      this License, each Contributor hereby grants to You a perpetual,
-      worldwide, non-exclusive, no-charge, royalty-free, irrevocable
-      (except as stated in this section) patent license to make, have made,
-      use, offer to sell, sell, import, and otherwise transfer the Work,
-      where such license applies only to those patent claims licensable
-      by such Contributor that are necessarily infringed by their
-      Contribution(s) alone or by combination of their Contribution(s)
-      with the Work to which such Contribution(s) was submitted. If You
-      institute patent litigation against any entity (including a
-      cross-claim or counterclaim in a lawsuit) alleging that the Work
-      or a Contribution incorporated within the Work constitutes direct
-      or contributory patent infringement, then any patent licenses
-      granted to You under this License for that Work shall terminate
-      as of the date such litigation is filed.
-
-   4. Redistribution. You may reproduce and distribute copies of the
-      Work or Derivative Works thereof in any medium, with or without
-      modifications, and in Source or Object form, provided that You
-      meet the following conditions:
-
-      (a) You must give any other recipients of the Work or
-          Derivative Works a copy of this License; and
-
-      (b) You must cause any modified files to carry prominent notices
-          stating that You changed the files; and
-
-      (c) You must retain, in the Source form of any Derivative Works
-          that You distribute, all copyright, patent, trademark, and
-          attribution notices from the Source form of the Work,
-          excluding those notices that do not pertain to any part of
-          the Derivative Works; and
-
-      (d) If the Work includes a "NOTICE" text file as part of its
-          distribution, then any Derivative Works that You distribute must
-          include a readable copy of the attribution notices contained
-          within such NOTICE file, excluding those notices that do not
-          pertain to any part of the Derivative Works, in at least one
-          of the following places: within a NOTICE text file distributed
-          as part of the Derivative Works; within the Source form or
-          documentation, if provided along with the Derivative Works; or,
-          within a display generated by the Derivative Works, if and
-          wherever such third-party notices normally appear. The contents
-          of the NOTICE file are for informational purposes only and
-          do not modify the License. You may add Your own attribution
-          notices within Derivative Works that You distribute, alongside
-          or as an addendum to the NOTICE text from the Work, provided
-          that such additional attribution notices cannot be construed
-          as modifying the License.
-
-      You may add Your own copyright statement to Your modifications and
-      may provide additional or different license terms and conditions
-      for use, reproduction, or distribution of Your modifications, or
-      for any such Derivative Works as a whole, provided Your use,
-      reproduction, and distribution of the Work otherwise complies with
-      the conditions stated in this License.
-
-   5. Submission of Contributions. Unless You explicitly state otherwise,
-      any Contribution intentionally submitted for inclusion in the Work
-      by You to the Licensor shall be under the terms and conditions of
-      this License, without any additional terms or conditions.
-      Notwithstanding the above, nothing herein shall supersede or modify
-      the terms of any separate license agreement you may have executed
-      with Licensor regarding such Contributions.
-
-   6. Trademarks. This License does not grant permission to use the trade
-      names, trademarks, service marks, or product names of the Licensor,
-      except as required for reasonable and customary use in describing the
-      origin of the Work and reproducing the content of the NOTICE file.
-
-   7. Disclaimer of Warranty. Unless required by applicable law or
-      agreed to in writing, Licensor provides the Work (and each
-      Contributor provides its Contributions) on an "AS IS" BASIS,
-      WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
-      implied, including, without limitation, any warranties or conditions
-      of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
-      PARTICULAR PURPOSE. You are solely responsible for determining the
-      appropriateness of using or redistributing the Work and assume any
-      risks associated with Your exercise of permissions under this License.
-
-   8. Limitation of Liability. In no event and under no legal theory,
-      whether in tort (including negligence), contract, or otherwise,
-      unless required by applicable law (such as deliberate and grossly
-      negligent acts) or agreed to in writing, shall any Contributor be
-      liable to You for damages, including any direct, indirect, special,
-      incidental, or consequential damages of any character arising as a
-      result of this License or out of the use or inability to use the
-      Work (including but not limited to damages for loss of goodwill,
-      work stoppage, computer failure or malfunction, or any and all
-      other commercial damages or losses), even if such Contributor
-      has been advised of the possibility of such damages.
-
-   9. Accepting Warranty or Additional Liability. While redistributing
-      the Work or Derivative Works thereof, You may choose to offer,
-      and charge a fee for, acceptance of support, warranty, indemnity,
-      or other liability obligations and/or rights consistent with this
-      License. However, in accepting such obligations, You may act only
-      on Your own behalf and on Your sole responsibility, not on behalf
-      of any other Contributor, and only if You agree to indemnify,
-      defend, and hold each Contributor harmless for any liability
-      incurred by, or claims asserted against, such Contributor by reason
-      of your accepting any such warranty or additional liability.
-
-   END OF TERMS AND CONDITIONS
-
-   APPENDIX: How to apply the Apache License to your work.
-
-      To apply the Apache License to your work, attach the following
-      boilerplate notice, with the fields enclosed by brackets "{}"
-      replaced with your own identifying information. (Don't include
-      the brackets!)  The text should be enclosed in the appropriate
-      comment syntax for the file format. We also recommend that a
-      file or class name and description of purpose be included on the
-      same "printed page" as the copyright notice for easier
-      identification within third-party archives.
-
-   Copyright {yyyy} {name of copyright owner}
-
-   Licensed under the Apache License, Version 2.0 (the "License");
-   you may not use this file except in compliance with the License.
-   You may obtain a copy of the License at
-
-       http://www.apache.org/licenses/LICENSE-2.0
-
-   Unless required by applicable law or agreed to in writing, software
-   distributed under the License is distributed on an "AS IS" BASIS,
-   WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-   See the License for the specific language governing permissions and
-   limitations under the License.
diff --git a/Makefile b/Makefile
index 375efe8d..20f9455e 100644
--- a/Makefile
+++ b/Makefile
@@ -101,10 +101,10 @@ $(BUILD)/registerpatch.h: .FORCE
 	@echo "#include \"$(PATCHFILE)\"" > $@
 
 $(BUILD)/Source/startup.s: .FORCE
-	@echo '.string "'$(PATCHNAME)'"' > $(BUILD)/Source/progname.s
+	@printf '.string "%.23s"\r\n' $(PATCHNAME) > $(BUILD)/Source/progname.s
 
 $(BUILD)/%.syx: $(BUILD)/%.bin
-	@$(FIRMWARESENDER) -q -in $< -save $@
+	@$(FIRMWARESENDER) -q -d 0 -in $< -save $@
 
 patch: $(DEPS) ## build patch binary
 	@$(MAKE) -s -f compile.mk compile
@@ -140,15 +140,15 @@ sysex: patch $(BUILD)/$(TARGET).syx ## package patch binary as MIDI sysex
 
 load: patch ## upload patch to attached OWL via MIDI
 	@echo Sending patch $(PATCHNAME) to $(OWLDEVICE) to load
-	@$(FIRMWARESENDER) -q -in $(BUILD)/$(TARGET).bin -out "$(OWLDEVICE)" -run
+	@$(FIRMWARESENDER) -q -d 2 -in $(BUILD)/$(TARGET).bin -out "$(OWLDEVICE)" -run
 
 store: patch ## upload and save patch to attached OWL
 	@echo Sending patch $(PATCHNAME) to $(OWLDEVICE) to store in slot $(SLOT)
-	@$(FIRMWARESENDER) -q -in $(BUILD)/$(TARGET).bin -out "$(OWLDEVICE)" -store $(SLOT)
+	@$(FIRMWARESENDER) -q -d 2 -in $(BUILD)/$(TARGET).bin -out "$(OWLDEVICE)" -store $(SLOT)
 
 resource: $(RESOURCE) ## upload and save resource to attached OWL
 	@echo Sending resource $(RESOURCE) to $(OWLDEVICE) to store in slot $(SLOT)
-	@$(FIRMWARESENDER) -q -in $(RESOURCE) -out "$(OWLDEVICE)" -store $(SLOT)
+	@$(FIRMWARESENDER) -q -d 2 -in $(RESOURCE) -out "$(OWLDEVICE)" -store $(SLOT)
 
 docs: ## generate HTML documentation
 	@doxygen Doxyfile
@@ -160,7 +160,7 @@ clean: ## remove generated patch files
 	@rm -rf $(BUILD)/*
 
 realclean: clean ## remove all library object files
-	@find Libraries/ -name '*.[a|o]' -delete
+	@find Libraries/ -maxdepth 1 -name '*.[a|o]' -delete
 
 size: patch ## show binary size metrics and large object summary
 	@$(MAKE) -s -f compile.mk size
diff --git a/Source/PatchProcessor.cpp b/Source/PatchProcessor.cpp
index 89153bb0..a0257ed8 100644
--- a/Source/PatchProcessor.cpp
+++ b/Source/PatchProcessor.cpp
@@ -60,6 +60,9 @@ class LinearParameterUpdater : public ParameterUpdater {
 public:
   LinearParameterUpdater(T min, T max, V initialValue)
     : parameter(NULL), minimum(min), maximum(max), value(initialValue) {}
+  V& getValue(){
+    return value;
+  }
   void update(int16_t newValue){
     value = (newValue*(maximum-minimum))/4096+minimum;
     if(parameter != NULL)
@@ -89,6 +92,9 @@ class ExponentialParameterUpdater : public ParameterUpdater {
     //    ASSERT(skew > 0.0 && skew <= 2.0, "Invalid exponential skew value");
     ASSERT(skew > 0.0, "Invalid exponential skew value");
   }
+  V& getValue(){
+    return value;
+  }
   void update(int16_t newValue){
     float v = newValue/4096.0f;
     v = expf(logf(v)/skew);
@@ -140,7 +146,11 @@ PatchParameter<T> PatchProcessor::getParameter(const char* name, T min, T max, T
       }else if(lambda == 0.0){      
 	updater = new LinearParameterUpdater<T, StiffValue<T> >(min, max, StiffValue<T>(d, defaultValue));
       }else{
-	updater = new LinearParameterUpdater<T, SmoothStiffValue<T> >(min, max, SmoothStiffValue<T>(l, d, defaultValue));
+	LinearParameterUpdater<T, SmoothStiffValue<T> >* obj =
+	  new LinearParameterUpdater<T, SmoothStiffValue<T> >(min, max, SmoothStiffValue<T>(defaultValue));
+	obj->getValue().lambda = l;
+	obj->getValue().delta = d;
+	updater = obj;
       }
     }else{
       if(lambda == 0.0 && delta == 0.0){
@@ -150,7 +160,11 @@ PatchParameter<T> PatchProcessor::getParameter(const char* name, T min, T max, T
       }else if(lambda == 0.0){      
 	updater = new ExponentialParameterUpdater<T, StiffValue<T> >(skew, min, max, StiffValue<T>(d, defaultValue));
       }else{
-	updater = new ExponentialParameterUpdater<T, SmoothStiffValue<T> >(skew, min, max, SmoothStiffValue<T>(l, d, defaultValue));
+	ExponentialParameterUpdater<T, SmoothStiffValue<T> >* obj =
+	  new ExponentialParameterUpdater<T, SmoothStiffValue<T> >(skew, min, max, SmoothStiffValue<T>(defaultValue));
+	obj->getValue().lambda = l;
+	obj->getValue().delta = d;
+	updater = obj;
       }
     }
     parameters[pid] = updater;
diff --git a/Source/ServiceCall.h b/Source/ServiceCall.h
index a272fbed..9a6da6ee 100644
--- a/Source/ServiceCall.h
+++ b/Source/ServiceCall.h
@@ -6,8 +6,8 @@
 #define OWL_SERVICE_GET_ARRAY              0x1010
 #define OWL_SERVICE_REGISTER_CALLBACK      0x1100
 #define OWL_SERVICE_REQUEST_CALLBACK       0x1101
-#define OWL_SERVICE_OK                     0x000
-#define OWL_SERVICE_INVALID_ARGS           -1
+#define OWL_SERVICE_OK                     0
+#define OWL_SERVICE_INVALID_ARGS           (-1)
 
 #define SYSTEM_TABLE_LOG                   "SLG"
 #define SYSTEM_TABLE_POW                   "SPW"
diff --git a/Source/main.cpp b/Source/main.cpp
index 80c379b2..d7574706 100644
--- a/Source/main.cpp
+++ b/Source/main.cpp
@@ -44,11 +44,11 @@ int main(void){
   }else{
     /* Defined by the linker */
     extern char _fastheap, _fasteheap; // internal RAM dedicated to heap
-    extern char _eprogram, _eram; // remaining program space
+    extern char _eprogram, _estack; // remaining program space
     extern char _heap, _eheap; // external memory
     int cnt = 0;
     regions[cnt++] = { (uint8_t*)&_fastheap, (size_t)(&_fasteheap - &_fastheap) };
-    regions[cnt++] = { (uint8_t*)&_eprogram, (size_t)(&_eram - &_eprogram) };
+    regions[cnt++] = { (uint8_t*)&_eprogram, (size_t)(&_estack - &_eprogram) };
     regions[cnt++] = { (uint8_t*)&_heap, (size_t)(&_eheap - &_heap) };
     regions[cnt] = {NULL, 0}; // terminate the array
   }
diff --git a/Source/owl1.ld b/Source/owl1.ld
index 1173b905..e9e5d28e 100644
--- a/Source/owl1.ld
+++ b/Source/owl1.ld
@@ -3,7 +3,6 @@ ENTRY(Reset_Handler)
 
 /* Generate a link error if heap and stack don't fit into RAM */
 _Min_Heap_Size  = 0x000; /* required amount of heap  */
-_Min_Stack_Size = 0x800; /* required amount of stack */
 
 /* Specify the memory areas */
 MEMORY
@@ -16,16 +15,14 @@ MEMORY
 /* Define output sections */
 SECTIONS
 {
-  /* The startup code goes first into FLASH */
+  /* The startup code goes first into PATCHRAM */
   .program_header :
   {
-    . = ALIGN(8);
     _startprog = ABSOLUTE(.);         /* define a global symbol at program start */
     KEEP(*(.program_header)) /* Startup code */
-    . = ALIGN(8);
-  } >PATCHRAM /* AT>PATCHFLASH */
+  } >PATCHRAM
 
-  /* The program code and other data goes into FLASH */
+  /* The program code and other data goes into PATCHRAM */
   .text :
   {
     . = ALIGN(8);
@@ -55,36 +52,36 @@ SECTIONS
     . = ALIGN(8);
     _etext = .;        /* define a global symbol at end of code */
     _text_end = .;
-  } >PATCHRAM /* AT>PATCHFLASH */
+  } >PATCHRAM
 
   _text_load = LOADADDR (.text);
-  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >PATCHRAM /* AT>PATCHFLASH */
+  .ARM.extab   : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >PATCHRAM
   .ARM : {
     __exidx_start = .;
     *(.ARM.exidx*)
     __exidx_end = .;
-  } >PATCHRAM /* AT>PATCHFLASH */
+  } >PATCHRAM
 
   .preinit_array     :
   {
     PROVIDE_HIDDEN (__preinit_array_start = .);
     KEEP (*(.preinit_array*))
     PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >PATCHRAM /* AT>PATCHFLASH */
+  } >PATCHRAM
   .init_array :
   {
     PROVIDE_HIDDEN (__init_array_start = .);
     KEEP (*(SORT(.init_array.*)))
     KEEP (*(.init_array*))
     PROVIDE_HIDDEN (__init_array_end = .);
-  } >PATCHRAM /* AT>PATCHFLASH */
+  } >PATCHRAM
   .fini_array :
   {
     PROVIDE_HIDDEN (__fini_array_start = .);
     KEEP (*(.fini_array*))
     KEEP (*(SORT(.fini_array.*)))
     PROVIDE_HIDDEN (__fini_array_end = .);
-  } >PATCHRAM /* AT>PATCHFLASH */
+  } >PATCHRAM
 
   /* used by the startup to initialize data */
   _sidata = .;
@@ -125,8 +122,7 @@ SECTIONS
     PROVIDE ( _eprogram = . );
     PROVIDE ( _stack = . );
   } >PATCHRAM
-  _eram = ORIGIN(PATCHRAM) + 80k;    /* Limit to 80k for OwlWare compatiblity */
-  _estack = ORIGIN(PATCHRAM) + 80k;
+  _estack = ORIGIN(PATCHRAM) + LENGTH(PATCHRAM);
 
   .fastheap (NOLOAD) :
   {
diff --git a/Source/owl2.ld b/Source/owl2.ld
index 10001c18..6077f239 100644
--- a/Source/owl2.ld
+++ b/Source/owl2.ld
@@ -18,11 +18,9 @@ SECTIONS
   /* The startup code goes first into PATCHRAM */
   .program_header :
   {
-    . = ALIGN(8);
     _startprog = ABSOLUTE(.);         /* define a global symbol at program start */
     KEEP(*(.program_header)) /* Startup code */
-    . = ALIGN(8);
-  } >PATCHRAM /* AT>PATCHFLASH */
+  } >PATCHRAM
 
   /* The program code and other data goes into PATCHRAM */
   .text :
@@ -124,8 +122,7 @@ SECTIONS
     PROVIDE ( _eprogram = . );
     PROVIDE ( _stack = . );
   } >PATCHRAM
-  _eram = ORIGIN(PATCHRAM) + 80k;    /* Limit to 80k for OwlWare compatiblity */
-  _estack = ORIGIN(PATCHRAM) + 80k;
+  _estack = ORIGIN(PATCHRAM) + 80K; /* for compatibility with older firmwares */
 
   .fastheap (NOLOAD) :
   {
diff --git a/Source/owl3.ld b/Source/owl3.ld
index 98f218eb..99daa9af 100644
--- a/Source/owl3.ld
+++ b/Source/owl3.ld
@@ -3,7 +3,6 @@ ENTRY(Reset_Handler)
 
 /* Generate a link error if heap and stack don't fit into RAM */
 _Min_Heap_Size  = 0x000; /* required amount of heap  */
-_Min_Stack_Size = 0x800; /* required amount of stack */
 
 /* Specify the memory areas */
 MEMORY
@@ -19,10 +18,8 @@ SECTIONS
   /* The startup code goes first into PATCHRAM */
   .program_header :
   {
-    . = ALIGN(8);
     _startprog = ABSOLUTE(.);         /* define a global symbol at program start */
     KEEP(*(.program_header)) /* Startup code */
-    . = ALIGN(8);
   } >PATCHRAM
 
   /* The program code and other data goes into PATCHRAM */
@@ -125,7 +122,6 @@ SECTIONS
     PROVIDE ( _eprogram = . );
     PROVIDE ( _stack = . );
   } >PATCHRAM
-  _eram = ORIGIN(PATCHRAM) + LENGTH(PATCHRAM);
   _estack = ORIGIN(PATCHRAM) + LENGTH(PATCHRAM);
 
   .fastheap (NOLOAD) :
diff --git a/TestPatches/InterpolatingSignalGeneratorTestPatch.hpp b/TestPatches/InterpolatingSignalGeneratorTestPatch.hpp
new file mode 100644
index 00000000..92438e42
--- /dev/null
+++ b/TestPatches/InterpolatingSignalGeneratorTestPatch.hpp
@@ -0,0 +1,58 @@
+#include "TestPatch.hpp"
+#include "InterpolatingSignalGenerator.h"
+#include <limits.h>
+
+
+class InterpolatingSignalGeneratorTestPatch : public TestPatch {
+public:
+  typedef InterpolatingSignalGenerator<LINEAR_INTERPOLATION> LerpGen;
+  typedef InterpolatingSignalGenerator<LINEAR_INTERPOLATION> TestGen;
+  // typedef InterpolatingSignalGenerator<LINEAR_INTERPOLATION> TestGen;
+  
+  InterpolatingSignalGeneratorTestPatch(){
+    {
+      TEST("create/destroy");
+      TestGen* gen = TestGen::create();
+      TestGen::destroy(gen);
+    }
+    {
+      TEST("generateSamples");
+      const size_t period = 16;
+      LerpGen* gen = LerpGen::create(period);
+      gen->update(period);
+      for(size_t i=0; i<period; ++i)
+	CHECK_CLOSE(gen->generate(), float(i), DEFAULT_TOLERANCE);
+      gen->update(period*2);
+      for(size_t i=0; i<period; ++i)
+	CHECK_CLOSE(gen->generate(), float(i)+period, DEFAULT_TOLERANCE);
+      LerpGen::destroy(gen);
+    }
+    {
+      TEST("generateBlock");
+      const size_t period = 32;
+      FloatArray a = FloatArray::create(period);
+      LerpGen* gen = LerpGen::create(period);
+      gen->update(1);
+      gen->generate(a);
+      for(size_t i=0; i<period; ++i)
+	CHECK_CLOSE(a[i], float(i)/period, DEFAULT_TOLERANCE);
+      LerpGen::destroy(gen);
+    }
+    {
+      TEST("set");
+      const size_t period = 48;
+      FloatArray a = FloatArray::create(period);
+      FloatArray b = FloatArray::create(period);
+      TestGen* gen = TestGen::create(period);
+      gen->set(0.55);
+      gen->generate(a);
+      b.setAll(0.55);
+      for(size_t i=0; i<period; ++i)
+	CHECK_CLOSE(a[i], b[i], DEFAULT_TOLERANCE);      
+      FloatArray::destroy(a);
+      FloatArray::destroy(b);
+      TestGen::destroy(gen);
+    }
+  }
+};
+
diff --git a/TestPatches/MovingAverageTestPatch.hpp b/TestPatches/MovingAverageTestPatch.hpp
new file mode 100644
index 00000000..9f95e2e3
--- /dev/null
+++ b/TestPatches/MovingAverageTestPatch.hpp
@@ -0,0 +1,49 @@
+#include "TestPatch.hpp"
+#include "MovingAverage.h"
+#include <limits.h>
+
+
+class MovingAverageTestPatch : public TestPatch {
+public:
+  
+  MovingAverageTestPatch(){
+    {
+      TEST("create/destroy");
+      ExponentialMovingAverage* ema = ExponentialMovingAverage::create(0.9);
+      SimpleMovingAverage* sma = SimpleMovingAverage::create(16);
+      CHECK(ema != NULL);
+      CHECK_EQUAL(ema->getLambda(), 0.9);
+      CHECK(sma != NULL);
+      CHECK_EQUAL(sma->getSize(), 16);
+      ExponentialMovingAverage::destroy(ema);
+      SimpleMovingAverage::destroy(sma);
+    }
+    {
+      TEST("ema");
+      ExponentialMovingAverage* ema = ExponentialMovingAverage::create(0.998);
+      const size_t len = 1024;
+      FloatArray a = FloatArray::create(len);
+      FloatArray b = FloatArray::create(len);
+      a.noise(); // generate noise in the range [-1, 1]
+      a.add(10); // bias
+      ema->set(10);
+      ema->process(a, b);
+      for(size_t i=32; i<len; ++i)
+	CHECK_CLOSE(b[i], 10, 0.1); // ensure average stays within 10% of bias
+      ExponentialMovingAverage::destroy(ema);
+    }
+    {
+      TEST("sma");
+      SimpleMovingAverage* sma = SimpleMovingAverage::create(16);
+      const size_t len = 512;
+      FloatArray a = FloatArray::create(len);
+      FloatArray b = FloatArray::create(len);
+      a.ramp(0, len);
+      sma->process(a, b);
+      for(size_t i=16; i<len; i+=16)
+	CHECK_CLOSE(b[i], i-16+8.5, DEFAULT_TOLERANCE);
+      SimpleMovingAverage::destroy(sma);
+    }
+  }
+};
+
diff --git a/TestPatches/SmoothValueTestPatch.hpp b/TestPatches/SmoothValueTestPatch.hpp
new file mode 100644
index 00000000..1252126a
--- /dev/null
+++ b/TestPatches/SmoothValueTestPatch.hpp
@@ -0,0 +1,47 @@
+#include "TestPatch.hpp"
+#include "SmoothValue.h"
+#include <limits.h>
+
+class SmoothValueTestPatch : public TestPatch {
+public:
+  
+  SmoothValueTestPatch(){
+    {
+      TEST("float");
+      SmoothFloat a = 0.5;
+      CHECK_CLOSE(a, 0.5, DEFAULT_TOLERANCE); // initialsed value
+      CHECK_CLOSE(a.lambda, 0.9, DEFAULT_TOLERANCE); // default lambda
+      a.lambda = 0.6;
+      a = 0;
+      CHECK_CLOSE(a, 0.5*0.6, DEFAULT_TOLERANCE); // correct smoothing
+      float prev = a;
+      for(int i=0; i<32; ++i){
+	a = -1;
+	CHECK(a < prev); // monotonically descending
+	prev = a;
+      }
+      CHECK_CLOSE(a, -1, DEFAULT_TOLERANCE); // arrives near target
+    }
+    {
+// typedef SmoothValue<int> SmoothInt;
+      TEST("int");
+      SmoothValue<float, SimpleValue<int>> a = 5;
+      CHECK_CLOSE(a, 5, DEFAULT_TOLERANCE);
+      CHECK_CLOSE(a.lambda, 0.9, DEFAULT_TOLERANCE); // default lambda
+      a = 0;
+      a.lambda = 0.6;
+      CHECK_CLOSE(a, 5*0.9, DEFAULT_TOLERANCE);
+      for(int i=0; i<32; ++i)
+	a = -10;
+      CHECK_CLOSE(a, -10, DEFAULT_TOLERANCE);
+    }
+    {
+      TEST("weirdint");
+      SmoothInt a = 5;
+      CHECK_CLOSE(a, 5, DEFAULT_TOLERANCE);
+      CHECK_CLOSE(a.lambda, 0.9, DEFAULT_TOLERANCE); // default lambda
+      a = 0;
+    }
+  }
+};
+
diff --git a/compile.mk b/compile.mk
index fc32481d..b16678ab 100644
--- a/compile.mk
+++ b/compile.mk
@@ -15,9 +15,7 @@ SOURCE       = $(BUILDROOT)/Source
 LIBSOURCE    = $(BUILDROOT)/LibSource
 BUILDSOURCE  = $(BUILD)/Source
 TESTPATCHES  = $(BUILDROOT)/TestPatches
-DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
-CMSIS        = $(BUILDROOT)/Libraries/CMSIS/Include/
-DSPINC       = $(BUILDROOT)/Libraries/CMSIS/DSP/Include
+CMSIS        = $(BUILDROOT)/Libraries/CMSIS
 DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP/Source
 
 # Tool path
@@ -79,10 +77,8 @@ ARCH_FLAGS += -fsingle-precision-constant -mthumb
 DEF_FLAGS +=  -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
 DEF_FLAGS += "-DPATCHNAME=\"$(PATCHNAME)\""
 # DEF_FLAGS = -DSTM32F745xx -DARM_MATH_CM7 -D__FPU_PRESENT=1 -D__FPU_USED=1U
-INC_FLAGS = -I$(BUILDROOT)/Libraries -I$(DEVICE) -I$(CMSIS) -I$(PERIPH_FILE)/inc -I$(SOURCE)
-INC_FLAGS += -I$(DEVICE)/Include -I$(CMSIS)
-INC_FLAGS += -I$(USB_DEVICE_FILE)/Core/inc -I$(USB_DEVICE_FILE)/Class/cdc/inc
-INC_FLAGS += -I$(USB_OTG_FILE)/inc
+INC_FLAGS = -I$(BUILDROOT)/Libraries -I$(PERIPH_FILE)/inc -I$(SOURCE)
+INC_FLAGS += -I$(CMSIS)/Include -I$(CMSIS)/Core/Include -I$(CMSIS)/DSP/Include
 CPPFLAGS += $(ARCH_FLAGS) $(INC_FLAGS) $(DEF_FLAGS)
 CPPFLAGS += -D__PROGRAM_START=1 # prevent compilation of __cmsis_start function
 CFLAGS   += -std=gnu11
@@ -92,17 +88,6 @@ CPPFLAGS += -I$(PATCHSOURCE)
 CPPFLAGS += -I$(LIBSOURCE)
 CPPFLAGS += -I$(BUILDSOURCE)
 CPPFLAGS += -I$(TESTPATCHES)
-CPPFLAGS += -I$(DSPINC)
-CPPFLAGS += -I$(DAISYSP)
-CPPFLAGS += -I$(DAISYSP)/Control
-CPPFLAGS += -I$(DAISYSP)/Drums
-CPPFLAGS += -I$(DAISYSP)/Dynamics
-CPPFLAGS += -I$(DAISYSP)/Effects
-CPPFLAGS += -I$(DAISYSP)/Filters
-CPPFLAGS += -I$(DAISYSP)/Noise
-CPPFLAGS += -I$(DAISYSP)/PhysicalModeling
-CPPFLAGS += -I$(DAISYSP)/Synthesis
-CPPFLAGS += -I$(DAISYSP)/Utility
 CPPFLAGS += -DARM_CORTEX
 CPPFLAGS += -DEXTERNAL_SRAM
 CPPFLAGS += -nostdlib -nostartfiles -fno-builtin -ffreestanding
@@ -132,8 +117,6 @@ endif
 PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_S_SRC:.s=.o)))
 PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_C_SRC:.c=.o)))
 PATCH_OBJS += $(addprefix $(BUILD)/, $(notdir $(PATCH_CPP_SRC:.cpp=.o)))
-DAISYSP_CPP_SRC = $(wildcard $(DAISYSP)/*/*.cpp)
-DAISYSP_OBJS = $(addprefix $(BUILD)/, $(notdir $(DAISYSP_CPP_SRC:.cpp=.o)))
 
 # include common make files
 include $(BUILDROOT)/libs.mk
@@ -151,11 +134,16 @@ OBJS = $(addprefix $(BUILD)/,$(notdir $(C_SRC:.c=.o)))
 OBJS += $(addprefix $(BUILD)/,$(notdir $(CPP_SRC:.cpp=.o)))
 OBJS += $(addprefix $(BUILD)/,$(notdir $(S_SRC:.S=.o)))
 
+include $(BUILDROOT)/daisysp.mk
+DAISYSP_CPP_SRC = $(wildcard $(DAISYSP)/*/*.cpp)
+DAISYSP_OBJS = $(addprefix $(BUILD)/, $(notdir $(DAISYSP_CPP_SRC:.cpp=.o)))
+
 # Set up search path
 vpath %.S $(sort $(dir $(S_SRC)))
 vpath %.s $(sort $(dir $(S_SRC) $(PATCH_S_SRC)))
 vpath %.c $(sort $(dir $(C_SRC) $(PATCH_C_SRC)))
-vpath %.cpp $(sort $(dir $(CPP_SRC) $(PATCH_CPP_SRC) $(DAISYSP_CPP_SRC)))
+vpath %.cpp $(sort $(dir $(CPP_SRC) $(PATCH_CPP_SRC)))
+vpath %.cpp $(sort $(dir $(DAISYSP_CPP_SRC)))
 
 .PHONY: libs as map compile size
 
diff --git a/daisysp.mk b/daisysp.mk
new file mode 100644
index 00000000..333e5a5a
--- /dev/null
+++ b/daisysp.mk
@@ -0,0 +1,11 @@
+DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
+CPPFLAGS    += -I$(DAISYSP)
+CPPFLAGS    += -I$(DAISYSP)/Control
+CPPFLAGS    += -I$(DAISYSP)/Drums
+CPPFLAGS    += -I$(DAISYSP)/Dynamics
+CPPFLAGS    += -I$(DAISYSP)/Effects
+CPPFLAGS    += -I$(DAISYSP)/Filters
+CPPFLAGS    += -I$(DAISYSP)/Noise
+CPPFLAGS    += -I$(DAISYSP)/PhysicalModeling
+CPPFLAGS    += -I$(DAISYSP)/Synthesis
+CPPFLAGS    += -I$(DAISYSP)/Utility
diff --git a/native.mk b/native.mk
index 6a766fa8..1d0a1004 100644
--- a/native.mk
+++ b/native.mk
@@ -16,23 +16,12 @@ BUILDSOURCE  = $(BUILD)/Source
 TESTPATCHES  = $(BUILDROOT)/TestPatches
 DSPINC       = $(BUILDROOT)/Libraries/CMSIS/DSP/Include
 DSPLIB       = $(BUILDROOT)/Libraries/CMSIS/DSP/Source
-DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
 CPPFLAGS    += -I$(SOURCE)
 CPPFLAGS    += -I$(PATCHSOURCE)
 CPPFLAGS    += -I$(LIBSOURCE)
 CPPFLAGS    += -I$(BUILDSOURCE)
 CPPFLAGS    += -I$(TESTPATCHES)
 CPPFLAGS    += -I$(DSPINC)
-CPPFLAGS    += -I$(DAISYSP)
-CPPFLAGS    += -I$(DAISYSP)/Control
-CPPFLAGS    += -I$(DAISYSP)/Drums
-CPPFLAGS    += -I$(DAISYSP)/Dynamics
-CPPFLAGS    += -I$(DAISYSP)/Effects
-CPPFLAGS    += -I$(DAISYSP)/Filters
-CPPFLAGS    += -I$(DAISYSP)/Noise
-CPPFLAGS    += -I$(DAISYSP)/PhysicalModeling
-CPPFLAGS    += -I$(DAISYSP)/Synthesis
-CPPFLAGS    += -I$(DAISYSP)/Utility
 CPPFLAGS    += -ILibraries -ILibraries/KissFFT
 CPPFLAGS    += -D__PROGRAM_START=1 # prevent compilation of __cmsis_start function
 CPPFLAGS    += "-DPATCHNAME=\"$(PATCHNAME)\""
@@ -40,6 +29,8 @@ CXXFLAGS     = -std=gnu++17
 LDLIBS       = -lm
 LDFLAGS      = -Wl,--gc-sections
 
+include $(BUILDROOT)/daisysp.mk
+
 # Tools
 CC=$(TOOLROOT)gcc
 LD=$(TOOLROOT)gcc
diff --git a/web.mk b/web.mk
index 6e77daf7..9cc232d8 100644
--- a/web.mk
+++ b/web.mk
@@ -1,40 +1,30 @@
 ifeq ($(CONFIG),Debug)
-EMCCFLAGS   ?= -g
+CPPFLAGS   ?= -g
 endif
 
 ifeq ($(CONFIG),Release)
-EMCCFLAGS   ?= -Oz # optimise for size
+CPPFLAGS   ?= -Oz # optimise for size
 endif
 
 LIBSOURCE    = $(BUILDROOT)/LibSource
 SOURCE       = $(BUILDROOT)/Source
 BUILDSOURCE    = $(BUILD)/Source
-DAISYSP      = $(BUILDROOT)/Libraries/DaisySP/Source
 
 # emscripten
 EMCC      ?= emcc
 EMAR      ?= emar
-EMCCFLAGS += -fno-rtti -fno-exceptions
-# EMCCFLAGS += -s ASSERTIONS=1 -Wall
-EMCCFLAGS += -I$(SOURCE) -I$(PATCHSOURCE) -I$(LIBSOURCE) -I$(BUILDSOURCE) -I$(BUILD)
-EMCCFLAGS += -I$(BUILD)/Source
-EMCCFLAGS += -I$(DAISYSP)
-EMCCFLAGS += -I$(DAISYSP)/Control
-EMCCFLAGS += -I$(DAISYSP)/Drums
-EMCCFLAGS += -I$(DAISYSP)/Dynamics
-EMCCFLAGS += -I$(DAISYSP)/Effects
-EMCCFLAGS += -I$(DAISYSP)/Filters
-EMCCFLAGS += -I$(DAISYSP)/Noise
-EMCCFLAGS += -I$(DAISYSP)/PhysicalModeling
-EMCCFLAGS += -I$(DAISYSP)/Synthesis
-EMCCFLAGS += -I$(DAISYSP)/Utility
-EMCCFLAGS +=  -ILibraries -ILibraries/KissFFT -DHV_SIMD_NONE -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
-EMCCFLAGS += -Wno-warn-absolute-paths
-EMCCFLAGS += -Wno-unknown-warning-option
-EMCCFLAGS += --memory-init-file 0 # don't create separate memory init file .mem
-EMCCFLAGS += -s EXPORTED_FUNCTIONS="['_WEB_setup','_WEB_setParameter','_WEB_getParameter','_WEB_processBlock','_WEB_getPatchName','_WEB_getParameterName','_WEB_getMessage','_WEB_getStatus','_WEB_getButtons','_WEB_setButton', '_WEB_processMidi', '_malloc']"
-EMCCFLAGS += -s "EXTRA_EXPORTED_RUNTIME_METHODS=['cwrap']"
-EMCCFLAGS += "-DPATCHNAME=\"$(PATCHNAME)\""
+CPPFLAGS += -fno-rtti -fno-exceptions
+# CPPFLAGS += -s ASSERTIONS=1 -Wall
+CPPFLAGS += -I$(SOURCE) -I$(PATCHSOURCE) -I$(LIBSOURCE) -I$(BUILDSOURCE) -I$(BUILD)
+CPPFLAGS += -I$(BUILD)/Source
+CPPFLAGS += -ILibraries -ILibraries/KissFFT -DHV_SIMD_NONE
+CPPFLAGS += -DDSY_CORE_DSP -DDSY_CUSTOM_DSP
+CPPFLAGS += -Wno-warn-absolute-paths
+CPPFLAGS += -Wno-unknown-warning-option
+CPPFLAGS += --memory-init-file 0 # don't create separate memory init file .mem
+CPPFLAGS += -s EXPORTED_FUNCTIONS="['_WEB_setup','_WEB_setParameter','_WEB_getParameter','_WEB_processBlock','_WEB_getPatchName','_WEB_getParameterName','_WEB_getMessage','_WEB_getStatus','_WEB_getButtons','_WEB_setButton', '_WEB_processMidi', '_malloc']"
+CPPFLAGS += -s "EXTRA_EXPORTED_RUNTIME_METHODS=['cwrap']"
+CPPFLAGS += "-DPATCHNAME=\"$(PATCHNAME)\""
 
 include $(BUILDROOT)/sources.mk
 CPP_SRC += Source/Patch.cpp
@@ -43,17 +33,18 @@ CPP_SRC += Source/message.cpp
 CPP_SRC += WebSource/web.cpp
 C_SRC   += Libraries/KissFFT/kiss_fft.c
 
+include $(BUILDROOT)/daisysp.mk
+
 ifdef MAXIMILIAN
 EMCC_SRC := $(filter-out $(PATCHSOURCE)/$(MAXIMILIAN).cpp, $(EMCC_SRC))
 endif
 WEBDIR   = $(BUILD)/web
 
-EMCCFLAGS += -s WASM=0 # disables wasm output
+CPPFLAGS += -s WASM=0 # disables wasm output
 
-CPPFLAGS =
-CFLAGS   = $(EMCCFLAGS) -std=gnu11
-CXXFLAGS = $(EMCCFLAGS) -std=gnu++17
-LDFLAGS  = $(EMCCFLAGS)
+CFLAGS   = -std=gnu11
+CXXFLAGS = -std=gnu++17
+LDFLAGS  = $(CPPFLAGS)
 
 EMCC_OBJS = $(addprefix $(WEBDIR)/, $(notdir $(CPP_SRC:.cpp=.o)))
 EMCC_OBJS += $(addprefix $(WEBDIR)/, $(notdir $(C_SRC:.c=.o)))
@@ -97,7 +88,7 @@ vpath %.cpp WebSource
 vpath %.c Libraries/KissFFT
 
 ifeq ($(CONFIG),Debug)
-EMCCFLAGS += -s ASSERTIONS=1
+CPPFLAGS += -s ASSERTIONS=1
 endif
 
 PHONY: libs web minify